xunge/DecIR huggingface dataset:
unsigned int djb2Hash(char lastName[]) {
  unsigned long hash = 5381;
  int c;
  while ((c = *lastName++)) {
    hash = ((hash << 5) + hash) + c;
  }
  return (unsigned int)hash % 591;
}


x86 assembly (clang, -O0):
<djb2Hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <djb2Hash+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <djb2Hash+0x10>
mov    -0x10(%rbp),%rax
mov    $0x24f,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<djb2Hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1144 <djb2Hash+0x44>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <djb2Hash+0x10>
mov    %eax,%ecx
mov    $0xddc7b04d,%edx
imul   %rcx,%rdx
shr    $0x29,%rdx
imul   $0x24f,%edx,%ecx
sub    %ecx,%eax
ret
mov    $0x3e,%eax
ret

LLVM IR (-O0):
define i32 @djb2Hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
%21 = trunc i64 %20 to i32
%22 = urem i32 %21, 591
ret i32 %22
}

LLVM IR (-O2):
define i32 @djb2Hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = trunc i64 %11 to i32
%16 = urem i32 %15, 591
br label %17
17: ; preds = %14, %1
%18 = phi i32 [ 62, %1 ], [ %16, %14 ]
ret i32 %18
}
/* Type definitions */
struct backlight {
  int dummy;
};

/* Variables and functions */
long backlight_get(struct backlight *, char *);
long backlight_get_max_brightness(struct backlight *backlight) {
  return backlight_get(backlight, "max_brightness");
}


x86 assembly (clang, -O0):
<backlight_get_max_brightness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <backlight_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<backlight_get_max_brightness>:
lea    0xee9(%rip),%rsi
jmp    1030 <backlight_get@plt>

LLVM IR (-O0):
%struct.backlight = type { i32 }
@.str = [15 x i8] c"max_brightness\00"
define i64 @backlight_get_max_brightness(%struct.backlight* %0) {
%2 = alloca %struct.backlight*
store %struct.backlight* %0, %struct.backlight** %2
%3 = load %struct.backlight*, %struct.backlight** %2
%4 = call i64 @backlight_get(%struct.backlight* %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i64 %4
}

LLVM IR (-O2):
%struct.backlight = type { i32 }
@.str = [15 x i8] c"max_brightness\00"
define i64 @backlight_get_max_brightness(%struct.backlight* %0) {
%2 = tail call i64 @backlight_get(%struct.backlight* %0, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ message;

/* Variables and functions */
int /*<<< orphan*/ current_log_function(int, char *);
int /*<<< orphan*/ vsnprintf(char *, int, char const *, int /*<<< orphan*/);
void log_vmsg(int priority, const char *format, va_list args) {
  char message[512];
  vsnprintf(message, sizeof(message), format, args);
  current_log_function(priority, message);
}


x86 assembly (clang, -O0):
<log_vmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x220,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    -0x220(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x200,%esi
call   1030 <vsnprintf@plt>
mov    -0x4(%rbp),%edi
lea    -0x220(%rbp),%rsi
call   1040 <current_log_function@plt>
add    $0x220,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_vmsg>:
push   %r14
push   %rbx
sub    $0x208,%rsp
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%ebx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x200,%esi
call   1030 <vsnprintf@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1040 <current_log_function@plt>
add    $0x208,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @log_vmsg(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [512 x i8]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [512 x i8], [512 x i8]* %7, i64 0, i64 0
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @vsnprintf(i8* %8, i32 512, i8* %9, i32 %10)
%12 = load i32, i32* %4
%13 = getelementptr inbounds [512 x i8], [512 x i8]* %7, i64 0, i64 0
%14 = call i32 @current_log_function(i32 %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @log_vmsg(i32 %0, i8* nocapture %1, i32 %2) {
%4 = alloca [512 x i8]
%5 = getelementptr inbounds [512 x i8], [512 x i8]* %4, i64 0, i64 0
%6 = call i32 @vsnprintf(i8* %5, i32 512, i8* %1, i32 %2)
%7 = call i32 @current_log_function(i32 %0, i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *me) {
  fprintf(stderr, "Syntax: %s -p <base-prefix> [-o <offset> | -i <id>]\n", me);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [53 x i8] c"Syntax: %s -p <base-prefix> [-o <offset> | -i <id>]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [53 x i8] c"Syntax: %s -p <base-prefix> [-o <offset> | -i <id>]\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int popcount(int bits) {
  bits = (bits & 0x55555555) + (bits >> 1 & 0x55555555);
  bits = (bits & 0x33333333) + (bits >> 2 & 0x33333333);
  bits = (bits & 0x0f0f0f0f) + (bits >> 4 & 0x0f0f0f0f);
  bits = (bits & 0x00ff00ff) + (bits >> 8 & 0x00ff00ff);
  return (bits & 0x0000ffff) + (bits >> 16 & 0x0000ffff);
}


x86 assembly (clang, -O0):
<popcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x55555555,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x55555555,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x33333333,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf0f0f0f,%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
and    $0xf0f0f0f,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00ff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00ff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
and    $0xffff,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcount>:
mov    %edi,%eax
and    $0x55555555,%eax
shr    %edi
and    $0x55555555,%edi
add    %edi,%eax
mov    %eax,%ecx
and    $0x33333333,%ecx
shr    $0x2,%eax
and    $0x13333333,%eax
add    %ecx,%eax
mov    %eax,%ecx
and    $0x7070707,%ecx
shr    $0x4,%eax
and    $0x7070707,%eax
add    %ecx,%eax
mov    %eax,%ecx
and    $0xf000f,%ecx
shr    $0x8,%eax
and    $0xf000f,%eax
add    %ecx,%eax
movzwl %ax,%ecx
shr    $0x10,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @popcount(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1431655765
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = and i32 %6, 1431655765
%8 = add nsw i32 %4, %7
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = and i32 %9, 858993459
%11 = load i32, i32* %2
%12 = ashr i32 %11, 2
%13 = and i32 %12, 858993459
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = and i32 %15, 252645135
%17 = load i32, i32* %2
%18 = ashr i32 %17, 4
%19 = and i32 %18, 252645135
%20 = add nsw i32 %16, %19
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = and i32 %21, 16711935
%23 = load i32, i32* %2
%24 = ashr i32 %23, 8
%25 = and i32 %24, 16711935
%26 = add nsw i32 %22, %25
store i32 %26, i32* %2
%27 = load i32, i32* %2
%28 = and i32 %27, 65535
%29 = load i32, i32* %2
%30 = ashr i32 %29, 16
%31 = and i32 %30, 65535
%32 = add nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @popcount(i32 %0) {
%2 = and i32 %0, 1431655765
%3 = lshr i32 %0, 1
%4 = and i32 %3, 1431655765
%5 = add nuw nsw i32 %4, %2
%6 = and i32 %5, 858993459
%7 = lshr i32 %5, 2
%8 = and i32 %7, 322122547
%9 = add nuw nsw i32 %8, %6
%10 = and i32 %9, 117901063
%11 = lshr i32 %9, 4
%12 = and i32 %11, 117901063
%13 = add nuw nsw i32 %12, %10
%14 = and i32 %13, 983055
%15 = lshr i32 %13, 8
%16 = and i32 %15, 983055
%17 = add nuw nsw i32 %16, %14
%18 = and i32 %17, 31
%19 = lshr i32 %17, 16
%20 = add nuw nsw i32 %18, %19
ret i32 %20
}
int main() { int *ptr; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int test(int a, int b, int c) {
  if (a < b && b < c)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1131 <test+0x31>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1131 <test+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1138 <test+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
cmp    %esi,%edi
setl   %al
cmp    %edx,%esi
setl   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %16
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 1, i32* %4
br label %17
16: ; preds = %11, %3
store i32 0, i32* %4
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp slt i32 %1, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
signed char fun_char(void) { return 5; }


x86 assembly (clang, -O0):
<fun_char>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_char>:
mov    $0x5,%al
ret

LLVM IR (-O0):
define signext i8 @fun_char() {
ret i8 5
}

LLVM IR (-O2):
define signext i8 @fun_char() {
ret i8 5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, int);
void Trace(double xx) {
  static int ik;
  printf("Trace ------> %f ,  %d\n", xx, ++ik);
}


x86 assembly (clang, -O0):
<Trace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2f04(%rip),%esi
add    $0x1,%esi
mov    %esi,0x2efb(%rip)
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Trace>:
mov    0x2f16(%rip),%esi
add    $0x1,%esi
mov    %esi,0x2f0d(%rip)
lea    0xeda(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@Trace.ik = internal global i32 0
@.str = [24 x i8] c"Trace ------> %f , %d\0A\00"
define void @Trace(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load i32, i32* @Trace.ik
%5 = add nsw i32 %4, 1
store i32 %5, i32* @Trace.ik
%6 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), double %3, i32 %5)
ret void
}

LLVM IR (-O2):
@Trace.ik = internal unnamed_addr global i32 0
@.str = [24 x i8] c"Trace ------> %f , %d\0A\00"
define void @Trace(double %0) {
%2 = load i32, i32* @Trace.ik
%3 = add nsw i32 %2, 1
store i32 %3, i32* @Trace.ik
%4 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), double %0, i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
long *newLong(long i) {
  long *tmp = (long *)malloc(sizeof(long));
  *tmp = i;
  return tmp;
}


x86 assembly (clang, -O0):
<newLong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newLong>:
push   %rbx
mov    %rdi,%rbx
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rbx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i64* @newLong(i64 %0) {
%2 = alloca i64
%3 = alloca i64*
store i64 %0, i64* %2
%4 = call i64 @malloc(i32 8)
%5 = inttoptr i64 %4 to i64*
store i64* %5, i64** %3
%6 = load i64, i64* %2
%7 = load i64*, i64** %3
store i64 %6, i64* %7
%8 = load i64*, i64** %3
ret i64* %8
}

LLVM IR (-O2):
define i64* @newLong(i64 %0) {
%2 = tail call i64 @malloc(i32 8)
%3 = inttoptr i64 %2 to i64*
store i64 %0, i64* %3
ret i64* %3
}
void __div0(void) {
  extern void board_hang(void);
  board_hang();
}


x86 assembly (clang, -O0):
<__div0>:
push   %rbp
mov    %rsp,%rbp
call   1030 <board_hang@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__div0>:
jmp    1030 <board_hang@plt>

LLVM IR (-O0):
define void @__div0() {
ret void
}

LLVM IR (-O2):
define void @__div0() {
tail call void @board_hang()
ret void
}
/* Type definitions */
struct timespec {
  unsigned int tv_sec;
  unsigned int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void Delay_Real(unsigned int msecs) {
  struct timespec spec;
  spec.tv_sec = msecs / 1000;
  spec.tv_nsec = (msecs % 1000) * 1000;
  nanosleep(&spec, NULL);
}


x86 assembly (clang, -O0):
<Delay_Real>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
imul   $0x3e8,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Delay_Real>:
push   %rax
mov    %edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
mov    %eax,(%rsp)
imul   $0x3e8,%eax,%eax
sub    %eax,%edi
imul   $0x3e8,%edi,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @Delay_Real(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = udiv i32 %4, 1000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = load i32, i32* %2
%8 = urem i32 %7, 1000
%9 = mul i32 %8, 1000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @Delay_Real(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = udiv i32 %0, 1000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %4, i32* %5
%6 = urem i32 %0, 1000
%7 = mul nuw nsw i32 %6, 1000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ aes_cbc(unsigned char *, unsigned char *, unsigned char *,
                           size_t, unsigned char *, int, int /*<<< orphan*/);
void openssl_AES_dec128_CBC(unsigned char *in, unsigned char *out,
                            unsigned char *key, size_t num_blocks,
                            unsigned char *iv) {
  aes_cbc(in, out, key, num_blocks, iv, 128, 0);
}


x86 assembly (clang, -O0):
<openssl_AES_dec128_CBC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    $0x80,%r9d
xor    %eax,%eax
movl   $0x0,(%rsp)
call   1030 <aes_cbc@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openssl_AES_dec128_CBC>:
push   %rax
movl   $0x0,(%rsp)
mov    $0x80,%r9d
call   1030 <aes_cbc@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @openssl_AES_dec128_CBC(i8* %0, i8* %1, i8* %2, i64 %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store i8* %4, i8** %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i64, i64* %9
%15 = load i8*, i8** %10
%16 = call i32 @aes_cbc(i8* %11, i8* %12, i8* %13, i64 %14, i8* %15, i32 128, i32 0)
ret void
}

LLVM IR (-O2):
define void @openssl_AES_dec128_CBC(i8* %0, i8* %1, i8* %2, i64 %3, i8* %4) {
%6 = tail call i32 @aes_cbc(i8* %0, i8* %1, i8* %2, i64 %3, i8* %4, i32 128, i32 0)
ret void
}
/* Variables and functions */
double factorial(unsigned int);
double combinatoria(unsigned m, unsigned n) {
  return factorial(m) / (factorial(n) * factorial(m - n));
}


x86 assembly (clang, -O0):
<combinatoria>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <factorial@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <factorial@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <factorial@plt>
movsd  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<combinatoria>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <factorial@plt>
movsd  %xmm0,0x10(%rsp)
mov    %ebx,%edi
call   1030 <factorial@plt>
movsd  %xmm0,0x8(%rsp)
sub    %ebx,%ebp
mov    %ebp,%edi
call   1030 <factorial@plt>
mulsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define double @combinatoria(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call double @factorial(i32 %5)
%7 = load i32, i32* %4
%8 = call double @factorial(i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub i32 %9, %10
%12 = call double @factorial(i32 %11)
%13 = fmul double %8, %12
%14 = fdiv double %6, %13
ret double %14
}

LLVM IR (-O2):
define double @combinatoria(i32 %0, i32 %1) {
%3 = tail call double @factorial(i32 %0)
%4 = tail call double @factorial(i32 %1)
%5 = sub i32 %0, %1
%6 = tail call double @factorial(i32 %5)
%7 = fmul double %4, %6
%8 = fdiv double %3, %7
ret double %8
}
int console_getch(void) { return 0; }


x86 assembly (clang, -O0):
<console_getch>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_getch>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @console_getch() {
ret i32 0
}

LLVM IR (-O2):
define i32 @console_getch() {
ret i32 0
}
unsigned double_to_unsigned(d)
double d;
{
  d += 2147483648.0;
  return ((int)d) - 2147483648;
}


x86 assembly (clang, -O0):
<double_to_unsigned>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
cltq
movabs $0x80000000,%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_unsigned>:
addsd  0xef8(%rip),%xmm0
cvttsd2si %xmm0,%eax
xor    $0x80000000,%eax
ret

LLVM IR (-O0):
define i32 @double_to_unsigned(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 0x41E0000000000000
store double %4, double* %2
%5 = load double, double* %2
%6 = fptosi double %5 to i32
%7 = sext i32 %6 to i64
%8 = sub nsw i64 %7, 2147483648
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @double_to_unsigned(double %0) {
%2 = fadd double %0, 0x41E0000000000000
%3 = fptosi double %2 to i32
%4 = xor i32 %3, -2147483648
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bench();
int /*<<< orphan*/ frequency();
scalar_t__ strcmp(char *, char *);
int main(int argc, char **argv) {
  if (argc > 1 && 0 == strcmp(argv[1], "-f"))
    frequency();
  bench();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1179 <main+0x49>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xea1(%rip),%rsi
call   1050 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jne    1179 <main+0x49>
mov    $0x0,%al
call   1040 <frequency@plt>
mov    $0x0,%al
call   1030 <bench@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     1152 <main+0x22>
mov    0x8(%rsi),%rdi
lea    0xebf(%rip),%rsi
call   1050 <strcmp@plt>
test   %rax,%rax
jne    1152 <main+0x22>
xor    %eax,%eax
call   1040 <frequency@plt>
xor    %eax,%eax
call   1030 <bench@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"-f\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i64 @strcmp(i8* %11, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%13 = icmp eq i64 0, %12
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = call i32 (...) @frequency()
br label %16
16: ; preds = %14, %8, %2
%17 = call i32 (...) @bench()
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"-f\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i64 @strcmp(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = tail call i32 (...) @frequency()
br label %11
11: ; preds = %9, %4, %2
%12 = tail call i32 (...) @bench()
ret i32 0
}
void MakeCommunicatorGPU(int src, int dest, int direction, int yminsrc,
                         int zminsrc, int ymaxsrc, int zmaxsrc, int ymindst,
                         int zmindst, int ymaxdst, int zmaxdst, int parity) {}


x86 assembly (clang, -O0):
<MakeCommunicatorGPU>:
push   %rbp
mov    %rsp,%rbp
mov    0x38(%rbp),%eax
mov    0x30(%rbp),%eax
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MakeCommunicatorGPU>:
ret

LLVM IR (-O0):
define void @MakeCommunicatorGPU(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11) {
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i32
%22 = alloca i32
%23 = alloca i32
%24 = alloca i32
store i32 %0, i32* %13
store i32 %1, i32* %14
store i32 %2, i32* %15
store i32 %3, i32* %16
store i32 %4, i32* %17
store i32 %5, i32* %18
store i32 %6, i32* %19
store i32 %7, i32* %20
store i32 %8, i32* %21
store i32 %9, i32* %22
store i32 %10, i32* %23
store i32 %11, i32* %24
ret void
}

LLVM IR (-O2):
define void @MakeCommunicatorGPU(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11) {
ret void
}
const char *cg_get_name(int nnames, const char **names, int type) {
  if (type < 0 || type >= nnames)
    return "<invalid>";
  return names[type];
}


x86 assembly (clang, -O0):
<cg_get_name>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jl     1124 <cg_get_name+0x24>
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1134 <cg_get_name+0x34>
lea    0xed5(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1144 <cg_get_name+0x44>
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cg_get_name>:
lea    0xef9(%rip),%rax
test   %edx,%edx
js     1115 <cg_get_name+0x15>
cmp    %edi,%edx
jge    1115 <cg_get_name+0x15>
mov    %edx,%eax
mov    (%rsi,%rax,8),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"<invalid>\00"
define i8* @cg_get_name(i32 %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i32
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp slt i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %3
%11 = load i32, i32* %7
%12 = load i32, i32* %5
%13 = icmp sge i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10, %3
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %4
br label %21
15: ; preds = %10
%16 = load i8**, i8*** %6
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
store i8* %20, i8** %4
br label %21
21: ; preds = %15, %14
%22 = load i8*, i8** %4
ret i8* %22
}

LLVM IR (-O2):
@.str = [10 x i8] c"<invalid>\00"
define i8* @cg_get_name(i32 %0, i8** nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, -1
%5 = icmp slt i32 %2, %0
%6 = and i1 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = zext i32 %2 to i64
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
br label %11
11: ; preds = %3, %7
%12 = phi i8* [ %10, %7 ], [ getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), %3 ]
ret i8* %12
}
/* Variables and functions */
scalar_t__ malloc(size_t);
char *AllocIdentifier(size_t len) { return (char *)malloc(len); }


x86 assembly (clang, -O0):
<AllocIdentifier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AllocIdentifier>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @AllocIdentifier(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @AllocIdentifier(i64 %0) {
%2 = tail call i64 @malloc(i64 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
int fun471() { return 471; }


x86 assembly (clang, -O0):
<fun471>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1d7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun471>:
mov    $0x1d7,%eax
ret

LLVM IR (-O0):
define i32 @fun471() {
ret i32 471
}

LLVM IR (-O2):
define i32 @fun471() {
ret i32 471
}
int msm_routing_get_dolby_dap_endpoint_control(
    struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  return 0;
}


x86 assembly (clang, -O0):
<msm_routing_get_dolby_dap_endpoint_control>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_routing_get_dolby_dap_endpoint_control>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.snd_kcontrol = type opaque
%struct.snd_ctl_elem_value = type opaque
define i32 @msm_routing_get_dolby_dap_endpoint_control(%struct.snd_kcontrol* %0, %struct.snd_ctl_elem_value* %1) {
%3 = alloca %struct.snd_kcontrol*
%4 = alloca %struct.snd_ctl_elem_value*
store %struct.snd_kcontrol* %0, %struct.snd_kcontrol** %3
store %struct.snd_ctl_elem_value* %1, %struct.snd_ctl_elem_value** %4
ret i32 0
}

LLVM IR (-O2):
%struct.snd_kcontrol = type opaque
%struct.snd_ctl_elem_value = type opaque
define i32 @msm_routing_get_dolby_dap_endpoint_control(%struct.snd_kcontrol* nocapture readnone %0, %struct.snd_ctl_elem_value* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int CodonToAmino(int const, int const);
int /*<<< orphan*/ IsValidBase(int const, int, int const);
int /*<<< orphan*/ IsValidGencode(int const);
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int IsStop(const int codon, const int gencode) {
  assert(IsValidGencode(gencode));
  assert(IsValidBase(codon, 2, gencode));
  if (CodonToAmino(codon, gencode) == -1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<IsStop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <IsValidGencode@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%edx
mov    $0x2,%esi
call   1050 <IsValidBase@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1060 <CodonToAmino@plt>
cmp    $0xffffffff,%eax
jne    1194 <IsStop+0x54>
movl   $0x1,-0x4(%rbp)
jmp    119b <IsStop+0x5b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsStop>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%edi
call   1040 <IsValidGencode@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    %ebp,%edi
mov    $0x2,%esi
mov    %ebx,%edx
call   1050 <IsValidBase@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    %ebp,%edi
mov    %ebx,%esi
call   1060 <CodonToAmino@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @IsStop(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = call i32 @IsValidGencode(i32 %6)
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = call i32 @IsValidBase(i32 %9, i32 2, i32 %10)
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call i32 @CodonToAmino(i32 %13, i32 %14)
%16 = icmp eq i32 %15, -1
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %19
18: ; preds = %2
store i32 0, i32* %3
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @IsStop(i32 %0, i32 %1) {
%3 = tail call i32 @IsValidGencode(i32 %1)
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @IsValidBase(i32 %0, i32 2, i32 %1)
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i32 @CodonToAmino(i32 %0, i32 %1)
%8 = icmp eq i32 %7, -1
%9 = zext i1 %8 to i32
ret i32 %9
}
long long c(long long n, long long k) {
  if (k == 0)
    return 1;
  else if (n == 0)
    return 0;
  else
    return c(n - 1, k - 1) + c(n - 1, k);
}


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1138 <c+0x28>
movq   $0x1,-0x8(%rbp)
jmp    1188 <c+0x78>
cmpq   $0x0,-0x10(%rbp)
jne    1150 <c+0x40>
movq   $0x0,-0x8(%rbp)
jmp    1188 <c+0x78>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
mov    -0x18(%rbp),%rsi
sub    $0x1,%rsi
call   1030 <c@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <c@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1146 <c+0x36>
mov    %rdi,%rbx
test   %rdi,%rdi
je     114e <c+0x3e>
mov    %rsi,%r14
add    $0xffffffffffffffff,%r14
add    $0xffffffffffffffff,%rbx
xor    %r15d,%r15d
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <c@plt>
add    %rax,%r15
add    $0xffffffffffffffff,%rbx
jb     1130 <c+0x20>
jmp    1151 <c+0x41>
mov    $0x1,%r15d
jmp    1151 <c+0x41>
xor    %r15d,%r15d
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @c(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 1, i64* %3
br label %24
9: ; preds = %2
%10 = load i64, i64* %4
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
store i64 0, i64* %3
br label %24
13: ; preds = %9
%14 = load i64, i64* %4
%15 = sub nsw i64 %14, 1
%16 = load i64, i64* %5
%17 = sub nsw i64 %16, 1
%18 = call i64 @c(i64 %15, i64 %17)
%19 = load i64, i64* %4
%20 = sub nsw i64 %19, 1
%21 = load i64, i64* %5
%22 = call i64 @c(i64 %20, i64 %21)
%23 = add nsw i64 %18, %22
store i64 %23, i64* %3
br label %24
24: ; preds = %13, %12, %8
%25 = load i64, i64* %3
ret i64 %25
}

LLVM IR (-O2):
define i64 @c(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = add nsw i64 %1, -1
%6 = icmp eq i64 %0, 0
br i1 %6, label %14, label %7
7: ; preds = %4, %7
%8 = phi i64 [ %12, %7 ], [ 0, %4 ]
%9 = phi i64 [ %10, %7 ], [ %0, %4 ]
%10 = add nsw i64 %9, -1
%11 = tail call i64 @c(i64 %10, i64 %5)
%12 = add nsw i64 %11, %8
%13 = icmp eq i64 %10, 0
br i1 %13, label %14, label %7
14: ; preds = %7, %4, %2
%15 = phi i64 [ 1, %2 ], [ 0, %4 ], [ %12, %7 ]
ret i64 %15
}
int test_imm_3Bint32_mem(int *val) {
  return ((*val) & (0x3B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Bint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x3b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Bint32_mem>:
testb  $0x3b,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Bint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 59
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Bint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 59
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int posix_memalign(void **, int, size_t);
void *new_malloc(size_t size) {
  void *alignedPointer;
  int alignError = 0;
  alignError = posix_memalign(&alignedPointer, 32, size);
  assert(!alignError);
  return alignedPointer;
}


x86 assembly (clang, -O0):
<new_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rdx
lea    -0x10(%rbp),%rdi
mov    $0x20,%esi
call   1040 <posix_memalign@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_malloc>:
push   %rax
mov    %rdi,%rdx
mov    %rsp,%rdi
mov    $0x20,%esi
call   1040 <posix_memalign@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @new_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %4
%5 = load i64, i64* %2
%6 = call i32 @posix_memalign(i8** %3, i32 32, i64 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @new_malloc(i64 %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = call i32 @posix_memalign(i8** %2, i32 32, i64 %0)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i8*, i8** %2
ret i8* %8
}
int g_sck_get_peer_cred(int sck, int *pid, int *uid, int *gid) { return 1; }


x86 assembly (clang, -O0):
<g_sck_get_peer_cred>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_sck_get_peer_cred>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @g_sck_get_peer_cred(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
ret i32 1
}

LLVM IR (-O2):
define i32 @g_sck_get_peer_cred(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i32* nocapture readnone %3) {
ret i32 1
}
float distance2(float ax, float ay, float bx, float by) {
  return (ax - bx) * (ax - bx) + (ay - by) * (ay - by);
}


x86 assembly (clang, -O0):
<distance2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
subss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
subss  -0x10(%rbp),%xmm1
movss  -0x8(%rbp),%xmm3
subss  -0x10(%rbp),%xmm3
mulss  %xmm3,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<distance2>:
subss  %xmm2,%xmm0
subss  %xmm3,%xmm1
mulss  %xmm1,%xmm1
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @distance2(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %7
%11 = fsub float %9, %10
%12 = load float, float* %5
%13 = load float, float* %7
%14 = fsub float %12, %13
%15 = load float, float* %6
%16 = load float, float* %8
%17 = fsub float %15, %16
%18 = load float, float* %6
%19 = load float, float* %8
%20 = fsub float %18, %19
%21 = fmul float %17, %20
%22 = call float @llvm.fmuladd.f32(float %11, float %14, float %21)
ret float %22
}

LLVM IR (-O2):
define float @distance2(float %0, float %1, float %2, float %3) {
%5 = fsub float %0, %2
%6 = fsub float %1, %3
%7 = fmul float %6, %6
%8 = tail call float @llvm.fmuladd.f32(float %5, float %5, float %7)
ret float %8
}
void RTAvllU32DoWithAll(void) {}


x86 assembly (clang, -O0):
<RTAvllU32DoWithAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvllU32DoWithAll>:
ret

LLVM IR (-O0):
define void @RTAvllU32DoWithAll() {
ret void
}

LLVM IR (-O2):
define void @RTAvllU32DoWithAll() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vla_func(int);
int main(void) {
  vla_func(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <vla_func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <vla_func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @vla_func(i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @vla_func(i32 5)
ret i32 0
}
/* Variables and functions */
unsigned int node_stack_at(int /*<<< orphan*/, unsigned int *, unsigned int);
int /*<<< orphan*/ pop_node_stack(unsigned int **, unsigned int *);
void parse_object_end(unsigned int **stack, unsigned int *stack_size,
                      unsigned int array_depth) {
  unsigned int stack_top = node_stack_at(0, *stack, *stack_size);
  if (stack_top != 0xFFFFFFFF && array_depth == 0) {
    pop_node_stack(stack, stack_size);
  }
}


x86 assembly (clang, -O0):
<parse_object_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
xor    %edi,%edi
call   1040 <node_stack_at@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0xffffffff,-0x18(%rbp)
je     116b <parse_object_end+0x4b>
cmpl   $0x0,-0x14(%rbp)
jne    116b <parse_object_end+0x4b>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <pop_node_stack@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_object_end>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebp
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%rsi
mov    (%r14),%edx
xor    %edi,%edi
call   1040 <node_stack_at@plt>
test   %ebp,%ebp
jne    1151 <parse_object_end+0x31>
cmp    $0xffffffff,%eax
je     1151 <parse_object_end+0x31>
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <pop_node_stack@plt>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @parse_object_end(i32** %0, i32* %1, i32 %2) {
%4 = alloca i32**
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32** %0, i32*** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = load i32**, i32*** %4
%9 = load i32*, i32** %8
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = call i32 @node_stack_at(i32 0, i32* %9, i32 %11)
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = icmp ne i32 %13, -1
br i1 %14, label %15, label %22
15: ; preds = %3
%16 = load i32, i32* %6
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32**, i32*** %4
%20 = load i32*, i32** %5
%21 = call i32 @pop_node_stack(i32** %19, i32* %20)
br label %22
22: ; preds = %18, %15, %3
ret void
}

LLVM IR (-O2):
define void @parse_object_end(i32** %0, i32* %1, i32 %2) {
%4 = load i32*, i32** %0
%5 = load i32, i32* %1
%6 = tail call i32 @node_stack_at(i32 0, i32* %4, i32 %5)
%7 = icmp ne i32 %6, -1
%8 = icmp eq i32 %2, 0
%9 = and i1 %8, %7
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = tail call i32 @pop_node_stack(i32** %0, i32* %1)
br label %12
12: ; preds = %10, %3
ret void
}
int testd() { return 1; }


x86 assembly (clang, -O0):
<testd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testd>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @testd() {
ret i32 1
}

LLVM IR (-O2):
define i32 @testd() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void emit_help(void) {
  fputs("Usage: epochal [-sg] [-y|-Y yyyy] -f input-format [-o output-fmt] "
        "[file|-]\n"
        "  Pass data in via standard input. See strftime(3) for formats.\n",
        stderr);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<emit_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<emit_help>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [140 x i8] c"Usage: epochal [-sg] [-y|-Y yyyy] -f input-format [-o output-fmt] [file|-]\0A Pass data in via standard input. See strftime(3) for formats.\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@.str = [140 x i8] c"Usage: epochal [-sg] [-y|-Y yyyy] -f input-format [-o output-fmt] [file|-]\0A Pass data in via standard input. See strftime(3) for formats.\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void gtk_cell_view_get_cell_renderers() {}


x86 assembly (clang, -O0):
<gtk_cell_view_get_cell_renderers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_cell_view_get_cell_renderers>:
ret

LLVM IR (-O0):
define void @gtk_cell_view_get_cell_renderers() {
ret void
}

LLVM IR (-O2):
define void @gtk_cell_view_get_cell_renderers() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ x_arg_error(char *, char const *, char const *);
void requires_arg(const char *name, char *arg, const char *try) {
  if (!arg)
    x_arg_error("Missing", name, try);
}


x86 assembly (clang, -O0):
<requires_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1143 <requires_arg+0x33>
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xec2(%rip),%rdi
call   1030 <x_arg_error@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<requires_arg>:
test   %rsi,%rsi
je     1116 <requires_arg+0x6>
ret
mov    %rdi,%rax
lea    0xee0(%rip),%rdi
mov    %rax,%rsi
jmp    1030 <x_arg_error@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Missing\00"
define void @requires_arg(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = icmp ne i8* %7, null
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = load i8*, i8** %6
%12 = call i32 @x_arg_error(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %10, i8* %11)
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"Missing\00"
define void @requires_arg(i8* %0, i8* readnone %1, i8* %2) {
%4 = icmp eq i8* %1, null
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @x_arg_error(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %2)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ testCatAndClose();
int /*<<< orphan*/ testDie();
int /*<<< orphan*/ testGreeting();
int main(int argc, char *argv[]) {
  testGreeting();
  testCatAndClose();
  testDie();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <testGreeting@plt>
mov    $0x0,%al
call   1030 <testCatAndClose@plt>
mov    $0x0,%al
call   1040 <testDie@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <testGreeting@plt>
xor    %eax,%eax
call   1030 <testCatAndClose@plt>
xor    %eax,%eax
call   1040 <testDie@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @testGreeting()
%6 = call i32 (...) @testCatAndClose()
%7 = call i32 (...) @testDie()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @testGreeting()
%4 = tail call i32 (...) @testCatAndClose()
%5 = tail call i32 (...) @testDie()
ret i32 0
}