int selCar(char a) {
  int ris = -1;
  if (a == '1')
    ris = 1;
  if (a == '2')
    ris = 2;
  if (a == '3')
    ris = 3;
  if (a == '4')
    ris = 4;
  if (a == '5')
    ris = 5;
  if (a == '6')
    ris = 6;
  if (a == '7')
    ris = 7;
  if (a == '8')
    ris = 8;
  if (a == '9')
    ris = 9;
  if (a == '0')
    ris = 0;
  return ris;
}


x86 assembly (clang, -O0):
<selCar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0xffffffff,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x31,%eax
jne    1125 <selCar+0x25>
movl   $0x1,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x32,%eax
jne    1139 <selCar+0x39>
movl   $0x2,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x33,%eax
jne    114d <selCar+0x4d>
movl   $0x3,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x34,%eax
jne    1161 <selCar+0x61>
movl   $0x4,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x35,%eax
jne    1175 <selCar+0x75>
movl   $0x5,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x36,%eax
jne    1189 <selCar+0x89>
movl   $0x6,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x37,%eax
jne    119d <selCar+0x9d>
movl   $0x7,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x38,%eax
jne    11b1 <selCar+0xb1>
movl   $0x8,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jne    11c5 <selCar+0xc5>
movl   $0x9,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x30,%eax
jne    11d9 <selCar+0xd9>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<selCar>:
xor    %eax,%eax
cmp    $0x31,%dil
sete   %al
add    %eax,%eax
add    $0xffffffff,%eax
cmp    $0x32,%dil
mov    $0x2,%ecx
cmovne %eax,%ecx
cmp    $0x33,%dil
mov    $0x3,%eax
cmovne %ecx,%eax
cmp    $0x34,%dil
mov    $0x4,%ecx
cmovne %eax,%ecx
cmp    $0x35,%dil
mov    $0x5,%eax
cmovne %ecx,%eax
cmp    $0x36,%dil
mov    $0x6,%ecx
cmovne %eax,%ecx
cmp    $0x37,%dil
mov    $0x7,%eax
cmovne %ecx,%eax
cmp    $0x38,%dil
mov    $0x8,%ecx
cmovne %eax,%ecx
cmp    $0x39,%dil
mov    $0x9,%edx
cmovne %ecx,%edx
xor    %eax,%eax
cmp    $0x30,%dil
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @selCar(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
store i32 -1, i32* %3
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 49
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %3
br label %8
8: ; preds = %7, %1
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 50
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 2, i32* %3
br label %13
13: ; preds = %12, %8
%14 = load i8, i8* %2
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 51
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 3, i32* %3
br label %18
18: ; preds = %17, %13
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 52
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 4, i32* %3
br label %23
23: ; preds = %22, %18
%24 = load i8, i8* %2
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 53
br i1 %26, label %27, label %28
27: ; preds = %23
store i32 5, i32* %3
br label %28
28: ; preds = %27, %23
%29 = load i8, i8* %2
%30 = sext i8 %29 to i32
%31 = icmp eq i32 %30, 54
br i1 %31, label %32, label %33
32: ; preds = %28
store i32 6, i32* %3
br label %33
33: ; preds = %32, %28
%34 = load i8, i8* %2
%35 = sext i8 %34 to i32
%36 = icmp eq i32 %35, 55
br i1 %36, label %37, label %38
37: ; preds = %33
store i32 7, i32* %3
br label %38
38: ; preds = %37, %33
%39 = load i8, i8* %2
%40 = sext i8 %39 to i32
%41 = icmp eq i32 %40, 56
br i1 %41, label %42, label %43
42: ; preds = %38
store i32 8, i32* %3
br label %43
43: ; preds = %42, %38
%44 = load i8, i8* %2
%45 = sext i8 %44 to i32
%46 = icmp eq i32 %45, 57
br i1 %46, label %47, label %48
47: ; preds = %43
store i32 9, i32* %3
br label %48
48: ; preds = %47, %43
%49 = load i8, i8* %2
%50 = sext i8 %49 to i32
%51 = icmp eq i32 %50, 48
br i1 %51, label %52, label %53
52: ; preds = %48
store i32 0, i32* %3
br label %53
53: ; preds = %52, %48
%54 = load i32, i32* %3
ret i32 %54
}

LLVM IR (-O2):
define i32 @selCar(i8 signext %0) {
%2 = icmp eq i8 %0, 49
%3 = select i1 %2, i32 1, i32 -1
%4 = icmp eq i8 %0, 50
%5 = select i1 %4, i32 2, i32 %3
%6 = icmp eq i8 %0, 51
%7 = select i1 %6, i32 3, i32 %5
%8 = icmp eq i8 %0, 52
%9 = select i1 %8, i32 4, i32 %7
%10 = icmp eq i8 %0, 53
%11 = select i1 %10, i32 5, i32 %9
%12 = icmp eq i8 %0, 54
%13 = select i1 %12, i32 6, i32 %11
%14 = icmp eq i8 %0, 55
%15 = select i1 %14, i32 7, i32 %13
%16 = icmp eq i8 %0, 56
%17 = select i1 %16, i32 8, i32 %15
%18 = icmp eq i8 %0, 57
%19 = select i1 %18, i32 9, i32 %17
%20 = icmp eq i8 %0, 48
%21 = select i1 %20, i32 0, i32 %19
ret i32 %21
}