xunge/DecIR huggingface dataset:
void spinlock_unlock(int *lock) {
  while (!__sync_bool_compare_and_swap(lock, 1, 0))
    ;
}


x86 assembly (clang, -O0):
<spinlock_unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
xor    %edx,%edx
lock cmpxchg %edx,(%rcx)
mov    %eax,%ecx
sete   %al
xor    $0xff,%al
test   $0x1,%al
jne    112b <spinlock_unlock+0x2b>
jmp    1130 <spinlock_unlock+0x30>
jmp    1108 <spinlock_unlock+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spinlock_unlock>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    $0x1,%eax
lock cmpxchg %ecx,(%rdi)
jne    1110 <spinlock_unlock+0x10>
ret

LLVM IR (-O0):
define void @spinlock_unlock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
br label %3
3: ; preds = %8, %1
%4 = load i32*, i32** %2
%5 = cmpxchg i32* %4, i32 1, i32 0 seq_cst seq_cst
%6 = extractvalue { i32, i1 } %5, 1
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @spinlock_unlock(i32* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = cmpxchg i32* %0, i32 1, i32 0 seq_cst seq_cst
%4 = extractvalue { i32, i1 } %3, 1
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
int hhmm2mmmm(int hhmm) {
  int hh, mm;
  hh = hhmm / 100;
  mm = hhmm % 100;
  if (mm > 59) {
    printf("ERROR: Minutes too large in %d:%2d - truncated to %d:00\n", hh, mm,
           hh);
    mm = 0;
  }
  return (hh * 60) + mm;
}


x86 assembly (clang, -O0):
<hhmm2mmmm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
cmpl   $0x3b,-0xc(%rbp)
jle    115d <hhmm2mmmm+0x4d>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0xc(%rbp)
imul   $0x3c,-0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hhmm2mmmm>:
push   %rbx
movslq %edi,%rdx
imul   $0x51eb851f,%rdx,%rbx
mov    %rbx,%rax
shr    $0x3f,%rax
sar    $0x25,%rbx
add    %eax,%ebx
imul   $0x64,%ebx,%eax
sub    %eax,%edx
cmp    $0x3c,%edx
jl     1144 <hhmm2mmmm+0x34>
lea    0xec7(%rip),%rdi
mov    %ebx,%esi
mov    %ebx,%ecx
call   1030 <printf@plt>
xor    %edx,%edx
imul   $0x3c,%ebx,%eax
add    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [57 x i8] c"ERROR: Minutes too large in %d:%2d - truncated to %d:00\0A\00"
define i32 @hhmm2mmmm(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 100
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 59
br i1 %10, label %11, label %16
11: ; preds = %1
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i32 %12, i32 %13, i32 %14)
store i32 0, i32* %4
br label %16
16: ; preds = %11, %1
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 60
%19 = load i32, i32* %4
%20 = add nsw i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
@.str = [57 x i8] c"ERROR: Minutes too large in %d:%2d - truncated to %d:00\0A\00"
define i32 @hhmm2mmmm(i32 %0) {
%2 = sdiv i32 %0, 100
%3 = srem i32 %0, 100
%4 = icmp sgt i32 %3, 59
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %3, i32 %2)
br label %7
7: ; preds = %5, %1
%8 = phi i32 [ 0, %5 ], [ %3, %1 ]
%9 = mul nsw i32 %2, 60
%10 = add nsw i32 %8, %9
ret i32 %10
}
/* Type definitions */
struct Pair {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct Pair *);
int pair_fin(struct Pair *q) {
  free(q);
  return 0;
}


x86 assembly (clang, -O0):
<pair_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pair_fin>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.Pair = type { i32 }
define i32 @pair_fin(%struct.Pair* %0) {
%2 = alloca %struct.Pair*
store %struct.Pair* %0, %struct.Pair** %2
%3 = load %struct.Pair*, %struct.Pair** %2
%4 = call i32 @free(%struct.Pair* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.Pair = type { i32 }
define i32 @pair_fin(%struct.Pair* nocapture %0) {
%2 = tail call i32 @free(%struct.Pair* %0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ fatal_error_with_errno(char *);
scalar_t__ pthread_mutex_init(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void init_mutex(pthread_mutex_t *mutex) {
  if (pthread_mutex_init(mutex, NULL))
    fatal_error_with_errno("Failed to initialize mutex");
}


x86 assembly (clang, -O0):
<init_mutex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <pthread_mutex_init@plt>
cmp    $0x0,%rax
je     114f <init_mutex+0x2f>
lea    0xeb6(%rip),%rdi
call   1030 <fatal_error_with_errno@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_mutex>:
push   %rax
xor    %esi,%esi
call   1040 <pthread_mutex_init@plt>
test   %rax,%rax
je     113a <init_mutex+0x1a>
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1030 <fatal_error_with_errno@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Failed to initialize mutex\00"
define void @init_mutex(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i64 @pthread_mutex_init(i32* %3, i32* null)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @fatal_error_with_errno(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"Failed to initialize mutex\00"
define void @init_mutex(i32* %0) {
%2 = tail call i64 @pthread_mutex_init(i32* %0, i32* null)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fatal_error_with_errno(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Init_tempfile();
int Make_temp_fd_in_dir(char **, int /*<<< orphan*/);
int Make_temp_fd(char **temppath) {
  return (Make_temp_fd_in_dir(temppath, Init_tempfile()));
}


x86 assembly (clang, -O0):
<Make_temp_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <Init_tempfile@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <Make_temp_fd_in_dir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Make_temp_fd>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <Init_tempfile@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <Make_temp_fd_in_dir@plt>

LLVM IR (-O0):
define i32 @Make_temp_fd(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 (...) @Init_tempfile()
%5 = call i32 @Make_temp_fd_in_dir(i8** %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @Make_temp_fd(i8** %0) {
%2 = tail call i32 (...) @Init_tempfile()
%3 = tail call i32 @Make_temp_fd_in_dir(i8** %0, i32 %2)
ret i32 %3
}
void VMR3AtRuntimeErrorRegister(void) {}


x86 assembly (clang, -O0):
<VMR3AtRuntimeErrorRegister>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMR3AtRuntimeErrorRegister>:
ret

LLVM IR (-O0):
define void @VMR3AtRuntimeErrorRegister() {
ret void
}

LLVM IR (-O2):
define void @VMR3AtRuntimeErrorRegister() {
ret void
}
/* Variables and functions */
void *stderr;
void *scalanative_libc_stderr() { return stderr; }


x86 assembly (clang, -O0):
<scalanative_libc_stderr>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalanative_libc_stderr>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@stderr = global i8* null
define i8* @scalanative_libc_stderr() {
%1 = load i8*, i8** @stderr
ret i8* %1
}

LLVM IR (-O2):
@stderr = global i8* null
define i8* @scalanative_libc_stderr() {
%1 = load i8*, i8** @stderr
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ SIGPIPE;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ s_usys_signal_catch();
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void usys_install_signal_handlers() {
  s_usys_signal_catch();
  signal(SIGPIPE, SIG_IGN);
}


x86 assembly (clang, -O0):
<usys_install_signal_handlers>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <s_usys_signal_catch@plt>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usys_install_signal_handlers>:
push   %rax
xor    %eax,%eax
call   1040 <s_usys_signal_catch@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
pop    %rax
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGPIPE = global i32 0
@SIG_IGN = global i32 0
define void @usys_install_signal_handlers() {
%1 = call i32 (...) @s_usys_signal_catch()
%2 = load i32, i32* @SIGPIPE
%3 = load i32, i32* @SIG_IGN
%4 = call i32 @signal(i32 %2, i32 %3)
ret void
}

LLVM IR (-O2):
@SIGPIPE = global i32 0
@SIG_IGN = global i32 0
define void @usys_install_signal_handlers() {
%1 = tail call i32 (...) @s_usys_signal_catch()
%2 = load i32, i32* @SIGPIPE
%3 = load i32, i32* @SIG_IGN
%4 = tail call i32 @signal(i32 %2, i32 %3)
ret void
}
/* Type definitions */
typedef void *(*memset_t)(void *, int, size_t);

/* Variables and functions */
void *memset(void *, int, size_t);
void OQS_MEM_cleanse(void *ptr, size_t len) {
  typedef void *(*memset_t)(void *, int, size_t);
  static volatile memset_t memset_func = memset;
  memset_func(ptr, 0, len);
}


x86 assembly (clang, -O0):
<OQS_MEM_cleanse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2f09(%rip),%rax
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OQS_MEM_cleanse>:
mov    %rsi,%rdx
mov    0x2f16(%rip),%rax
xor    %esi,%esi
jmp    *%rax

LLVM IR (-O0):
@OQS_MEM_cleanse.memset_func = internal global i8* (i8*, i32, i64)* @memset
define void @OQS_MEM_cleanse(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load volatile i8* (i8*, i32, i64)*, i8* (i8*, i32, i64)** @OQS_MEM_cleanse.memset_func
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* %5(i8* %6, i32 0, i64 %7)
ret void
}

LLVM IR (-O2):
@OQS_MEM_cleanse.memset_func = internal global i8* (i8*, i32, i64)* @memset
define void @OQS_MEM_cleanse(i8* %0, i64 %1) {
%3 = load volatile i8* (i8*, i32, i64)*, i8* (i8*, i32, i64)** @OQS_MEM_cleanse.memset_func
%4 = tail call i8* %3(i8* %0, i32 0, i64 %1)
ret void
}
int zpci_iov_setup_virtfn(struct zpci_bus *zbus, struct pci_dev *virtfn,
                          int vfn) {
  return 0;
}


x86 assembly (clang, -O0):
<zpci_iov_setup_virtfn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zpci_iov_setup_virtfn>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.zpci_bus = type opaque
%struct.pci_dev = type opaque
define i32 @zpci_iov_setup_virtfn(%struct.zpci_bus* %0, %struct.pci_dev* %1, i32 %2) {
%4 = alloca %struct.zpci_bus*
%5 = alloca %struct.pci_dev*
%6 = alloca i32
store %struct.zpci_bus* %0, %struct.zpci_bus** %4
store %struct.pci_dev* %1, %struct.pci_dev** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.zpci_bus = type opaque
%struct.pci_dev = type opaque
define i32 @zpci_iov_setup_virtfn(%struct.zpci_bus* nocapture readnone %0, %struct.pci_dev* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int min_jumps(int *, int);
int test_min_jumps_ones() {
  int input[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
  return 10 == min_jumps(input, 10);
}


x86 assembly (clang, -O0):
<test_min_jumps_ones>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
lea    0xecd(%rip),%rsi
mov    $0x28,%edx
call   1040 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1030 <min_jumps@plt>
mov    %eax,%ecx
mov    $0xa,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_min_jumps_ones>:
sub    $0x28,%rsp
mov    0xf05(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0xa,%esi
call   1030 <min_jumps@plt>
xor    %ecx,%ecx
cmp    $0xa,%eax
sete   %cl
mov    %ecx,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.test_min_jumps_ones.input = [10 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1]
define i32 @test_min_jumps_ones() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @min_jumps(i32* %3, i32 10)
%5 = icmp eq i32 10, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@__const.test_min_jumps_ones.input = [10 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1]
define i32 @test_min_jumps_ones() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @min_jumps(i32* %3, i32 10)
%5 = icmp eq i32 %4, 10
%6 = zext i1 %5 to i32
ret i32 %6
}
unsigned int hash(const char *k) {
  unsigned int hash = 0;
  for (; *k; ++k) {
    hash = (hash << 5 + hash) ^ *k;
  }
  return hash;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1144 <hash+0x44>
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x5,%ecx
shl    %cl,%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%dl
test   %dl,%dl
je     1128 <hash+0x28>
add    $0x1,%rdi
xor    %esi,%esi
nopl   0x0(%rax)
lea    0x5(%rsi),%ecx
shl    %cl,%esi
movsbl %dl,%eax
xor    %esi,%eax
movzbl (%rdi),%edx
add    $0x1,%rdi
mov    %eax,%esi
test   %dl,%dl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %4
%9 = load i32, i32* %3
%10 = load i32, i32* %3
%11 = add i32 5, %10
%12 = shl i32 %9, %11
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = xor i32 %12, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %8
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %4
20: ; preds = %4
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = add i32 %6, 5
%9 = shl i32 %6, %8
%10 = sext i8 %5 to i32
%11 = xor i32 %9, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
long UARTCharGetNonBlocking(unsigned long ulBase) {
  DEBUG_ASSERT(UARTBaseValid(ulBase));
  if (!((*((volatile unsigned long *)(ulBase + 0x00000018))) & 0x00000010)) {
    return ((*((volatile unsigned long *)(ulBase + 0x00000000))));
  } else {
    return (-1);
  }
}


x86 assembly (clang, -O0):
<UARTCharGetNonBlocking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%rax
and    $0x10,%rax
cmp    $0x0,%rax
jne    1162 <UARTCharGetNonBlocking+0x42>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    116a <UARTCharGetNonBlocking+0x4a>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTCharGetNonBlocking>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    $0xffffffffffffffff,%rax
testq  $0x10,0x18(%rbx)
jne    1144 <UARTCharGetNonBlocking+0x24>
mov    (%rbx),%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @UARTCharGetNonBlocking(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = call i32 @UARTBaseValid(i64 %4)
%6 = call i32 @DEBUG_ASSERT(i32 %5)
%7 = load i64, i64* %3
%8 = add i64 %7, 24
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, 16
%12 = icmp ne i64 %11, 0
br i1 %12, label %18, label %13
13: ; preds = %1
%14 = load i64, i64* %3
%15 = add i64 %14, 0
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
store i64 %17, i64* %2
br label %19
18: ; preds = %1
store i64 -1, i64* %2
br label %19
19: ; preds = %18, %13
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @UARTCharGetNonBlocking(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 24
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 16
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = inttoptr i64 %0 to i64*
%11 = load volatile i64, i64* %10
br label %12
12: ; preds = %1, %9
%13 = phi i64 [ %11, %9 ], [ -1, %1 ]
ret i64 %13
}
unsigned long rte_oo_make(int order, unsigned long size) {
  unsigned long x = {(order << 16) + (0x1000U << order) / size};
  return x;
}


x86 assembly (clang, -O0):
<rte_oo_make>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
cltq
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1000,%eax
shl    %cl,%eax
mov    %eax,%eax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_oo_make>:
mov    %edi,%ecx
mov    %edi,%eax
shl    $0x10,%eax
movslq %eax,%rdi
mov    $0x1000,%eax
shl    %cl,%eax
cmp    %rsi,%rax
jb     111e <rte_oo_make+0x1e>
xor    %edx,%edx
div    %esi
add    %rdi,%rax
ret
xor    %eax,%eax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @rte_oo_make(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = load i32, i32* %3
%7 = shl i32 %6, 16
%8 = sext i32 %7 to i64
%9 = load i32, i32* %3
%10 = shl i32 4096, %9
%11 = zext i32 %10 to i64
%12 = load i64, i64* %4
%13 = udiv i64 %11, %12
%14 = add i64 %8, %13
store i64 %14, i64* %5
%15 = load i64, i64* %5
ret i64 %15
}

LLVM IR (-O2):
define i64 @rte_oo_make(i32 %0, i64 %1) {
%3 = shl i32 %0, 16
%4 = sext i32 %3 to i64
%5 = shl i32 4096, %0
%6 = zext i32 %5 to i64
%7 = udiv i64 %6, %1
%8 = add nsw i64 %7, %4
ret i64 %8
}
unsigned char f64(unsigned char x, unsigned long int y) {
  return (x << (8 * sizeof(unsigned char) - y)) ^ (x >> y);
}


x86 assembly (clang, -O0):
<f64>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x10(%rbp),%rcx
sar    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f64>:
mov    $0x8,%cl
sub    %sil,%cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f64(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 8, %7
%9 = trunc i64 %8 to i32
%10 = shl i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = ashr i32 %12, %14
%16 = xor i32 %10, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f64(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 8, %4
%6 = shl i32 %3, %5
%7 = lshr i32 %3, %4
%8 = xor i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
/* Variables and functions */
int /*<<< orphan*/ benchmark();
int /*<<< orphan*/ verify();
int main() {
  verify();
  benchmark();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <verify@plt>
mov    $0x0,%al
call   1030 <benchmark@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <verify@plt>
xor    %eax,%eax
call   1030 <benchmark@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @verify()
%3 = call i32 (...) @benchmark()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @verify()
%2 = tail call i32 (...) @benchmark()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *stdout;
FILE *c_stdout(void) { return stdout; }


x86 assembly (clang, -O0):
<c_stdout>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_stdout>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@stdout = global i32* null
define i32* @c_stdout() {
%1 = load i32*, i32** @stdout
ret i32* %1
}

LLVM IR (-O2):
@stdout = global i32* null
define i32* @c_stdout() {
%1 = load i32*, i32** @stdout
ret i32* %1
}
/* Variables and functions */
int POLLHUP;
int POLLIN;
int POLLOUT;
int link_to_poll(int events) {
  int r = 0;
  if (events & 1)
    r |= POLLIN | POLLHUP;
  if (events & 2)
    r |= POLLOUT;
  return r;
}


x86 assembly (clang, -O0):
<link_to_poll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1135 <link_to_poll+0x35>
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
mov    0x2eb3(%rip),%rcx
or     (%rcx),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1153 <link_to_poll+0x53>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<link_to_poll>:
mov    %edi,%ecx
and    $0x1,%ecx
mov    0x2ecc(%rip),%rdx
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
or     (%rdx),%eax
neg    %ecx
and    %ecx,%eax
shl    $0x1e,%edi
sar    $0x1f,%edi
mov    0x2ed0(%rip),%rcx
and    (%rcx),%edi
or     %edi,%eax
ret

LLVM IR (-O0):
@POLLIN = global i32 0
@POLLHUP = global i32 0
@POLLOUT = global i32 0
define i32 @link_to_poll(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i32, i32* @POLLIN
%9 = load i32, i32* @POLLHUP
%10 = or i32 %8, %9
%11 = load i32, i32* %3
%12 = or i32 %11, %10
store i32 %12, i32* %3
br label %13
13: ; preds = %7, %1
%14 = load i32, i32* %2
%15 = and i32 %14, 2
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %13
%18 = load i32, i32* @POLLOUT
%19 = load i32, i32* %3
%20 = or i32 %19, %18
store i32 %20, i32* %3
br label %21
21: ; preds = %17, %13
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@POLLIN = global i32 0
@POLLHUP = global i32 0
@POLLOUT = global i32 0
define i32 @link_to_poll(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
%4 = load i32, i32* @POLLIN
%5 = load i32, i32* @POLLHUP
%6 = or i32 %5, %4
%7 = select i1 %3, i32 0, i32 %6
%8 = and i32 %0, 2
%9 = icmp eq i32 %8, 0
%10 = load i32, i32* @POLLOUT
%11 = select i1 %9, i32 0, i32 %10
%12 = or i32 %7, %11
ret i32 %12
}
long long bit17() { return 0x0000000000020000LL; }


x86 assembly (clang, -O0):
<bit17>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit17>:
mov    $0x20000,%eax
ret

LLVM IR (-O0):
define i64 @bit17() {
ret i64 131072
}

LLVM IR (-O2):
define i64 @bit17() {
ret i64 131072
}
/* Variables and functions */
double ighmm_determinant(double *, int);
int /*<<< orphan*/ ighmm_inverse(double *, int, double, double *);
int ighmm_invert_det(double *sigmainv, double *det, int length, double *cov) {
  *det = ighmm_determinant(cov, length);
  ighmm_inverse(cov, length, *det, sigmainv);
  return 0;
}


x86 assembly (clang, -O0):
<ighmm_invert_det>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <ighmm_determinant@plt>
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rdx
call   1040 <ighmm_inverse@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ighmm_invert_det>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %edx,%ebp
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rcx,%rdi
mov    %edx,%esi
call   1030 <ighmm_determinant@plt>
movsd  %xmm0,(%r14)
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r15,%rdx
call   1040 <ighmm_inverse@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ighmm_invert_det(double* %0, double* %1, i32 %2, double* %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca i32
%8 = alloca double*
store double* %0, double** %5
store double* %1, double** %6
store i32 %2, i32* %7
store double* %3, double** %8
%9 = load double*, double** %8
%10 = load i32, i32* %7
%11 = call double @ighmm_determinant(double* %9, i32 %10)
%12 = load double*, double** %6
store double %11, double* %12
%13 = load double*, double** %8
%14 = load i32, i32* %7
%15 = load double*, double** %6
%16 = load double, double* %15
%17 = load double*, double** %5
%18 = call i32 @ighmm_inverse(double* %13, i32 %14, double %16, double* %17)
ret i32 0
}

LLVM IR (-O2):
define i32 @ighmm_invert_det(double* %0, double* nocapture writeonly %1, i32 %2, double* %3) {
%5 = tail call double @ighmm_determinant(double* %3, i32 %2)
store double %5, double* %1
%6 = tail call i32 @ighmm_inverse(double* %3, i32 %2, double %5, double* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateRTCEnable(void) {
  (*((volatile unsigned long *)(0x400FC010))) |= 0x00000001;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateRTCEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0x400fc010,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCEnable>:
orq    $0x1,0x400fc010
40 01
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateRTCEnable() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
%3 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateRTCEnable() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
%3 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
/* Variables and functions */
int f(int, int /*<<< orphan*/, int);
int test_f() { return f(-1, 0, 1); }


x86 assembly (clang, -O0):
<test_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%edi
xor    %esi,%esi
mov    $0x1,%edx
call   1030 <f@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_f>:
mov    $0xffffffff,%edi
xor    %esi,%esi
mov    $0x1,%edx
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @test_f() {
%1 = call i32 @f(i32 -1, i32 0, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_f() {
%1 = tail call i32 @f(i32 -1, i32 0, i32 1)
ret i32 %1
}
/* Variables and functions */
int inp_emulate(int);
char TOSH_READ_EXTRA_LED_PIN() { return 0x01 & (inp_emulate(0x38) >> 4); }


x86 assembly (clang, -O0):
<TOSH_READ_EXTRA_LED_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x38,%edi
call   1030 <inp_emulate@plt>
sar    $0x4,%eax
and    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_READ_EXTRA_LED_PIN>:
push   %rax
mov    $0x38,%edi
call   1030 <inp_emulate@plt>
shr    $0x4,%al
and    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @TOSH_READ_EXTRA_LED_PIN() {
%1 = call i32 @inp_emulate(i32 56)
%2 = ashr i32 %1, 4
%3 = and i32 1, %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @TOSH_READ_EXTRA_LED_PIN() {
%1 = tail call i32 @inp_emulate(i32 56)
%2 = trunc i32 %1 to i8
%3 = lshr i8 %2, 4
%4 = and i8 %3, 1
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void EXTI4_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<EXTI4_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EXTI4_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @EXTI4_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @EXTI4_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
scalar_t__ hits(char *, char *, int);
int pseudo(char *, char *, int);
int test_no_hits_pseudo() {
  char actual[] = {'R', 'G', 'G', 'R'};
  char guess[] = {'G', 'R', 'Y', 'Y'};
  return 0 == hits(actual, guess, 4) && 2 == pseudo(actual, guess, 4);
}


x86 assembly (clang, -O0):
<test_no_hits_pseudo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x4(%rbp)
mov    0xecd(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1040 <hits@plt>
mov    %rax,%rdx
xor    %eax,%eax
xor    %ecx,%ecx
cmp    %rdx,%rcx
mov    %al,-0x9(%rbp)
jne    1180 <test_no_hits_pseudo+0x60>
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <pseudo@plt>
mov    %eax,%ecx
mov    $0x2,%eax
cmp    %ecx,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_no_hits_pseudo>:
push   %rax
movl   $0x52474752,0x4(%rsp)
52
movl   $0x59595247,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x4,%edx
call   1040 <hits@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     114e <test_no_hits_pseudo+0x2e>
pop    %rcx
ret
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x4,%edx
call   1030 <pseudo@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x2,%ecx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
@__const.test_no_hits_pseudo.actual = [4 x i8] c"RGGR"
@__const.test_no_hits_pseudo.guess = [4 x i8] c"GRYY"
define i32 @test_no_hits_pseudo() {
%1 = alloca [4 x i8]
%2 = alloca [4 x i8]
%3 = bitcast [4 x i8]* %1 to i8*
%4 = bitcast [4 x i8]* %2 to i8*
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%7 = call i64 @hits(i8* %5, i8* %6, i32 4)
%8 = icmp eq i64 0, %7
br i1 %8, label %9, label %14
9: ; preds = %0
%10 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%12 = call i32 @pseudo(i8* %10, i8* %11, i32 4)
%13 = icmp eq i32 2, %12
br label %14
14: ; preds = %9, %0
%15 = phi i1 [ false, %0 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @test_no_hits_pseudo() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 1380403026, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 1499025991, i32* %2
%5 = call i64 @hits(i8* %3, i8* %4, i32 4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %0
%8 = call i32 @pseudo(i8* %3, i8* %4, i32 4)
%9 = icmp eq i32 %8, 2
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %0
%12 = phi i32 [ 0, %0 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ show_rcu_gp_kthreads();
void sysrq_show_rcu(int key) { show_rcu_gp_kthreads(); }


x86 assembly (clang, -O0):
<sysrq_show_rcu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <show_rcu_gp_kthreads@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysrq_show_rcu>:
xor    %eax,%eax
jmp    1030 <show_rcu_gp_kthreads@plt>

LLVM IR (-O0):
define void @sysrq_show_rcu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @show_rcu_gp_kthreads()
ret void
}

LLVM IR (-O2):
define void @sysrq_show_rcu(i32 %0) {
%2 = tail call i32 (...) @show_rcu_gp_kthreads()
ret void
}
void console_tx_string(const char *str) {
  unsigned char ch;
  while (1) {
  }
  for (; 1;) {
  }
  do {
  } while (1);
  if (1) {
  } else {
  }
}


x86 assembly (clang, -O0):
<console_tx_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
jmp    1108 <console_tx_string+0x8>

x86 assembly (clang, -O2):
<console_tx_string>:
jmp    1100 <console_tx_string>

LLVM IR (-O0):
define void @console_tx_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
br label %4
4: ; preds = %1, %4
br label %4
}

LLVM IR (-O2):
define void @console_tx_string(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
int iHxFaceCRLCheck(unsigned char *psRid, unsigned char ucCaIndex,
                    unsigned char *psCertSerNo) {
  return (99);
}


x86 assembly (clang, -O0):
<iHxFaceCRLCheck>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iHxFaceCRLCheck>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @iHxFaceCRLCheck(i8* %0, i8 zeroext %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8* %2, i8** %6
ret i32 99
}

LLVM IR (-O2):
define i32 @iHxFaceCRLCheck(i8* nocapture readnone %0, i8 zeroext %1, i8* nocapture readnone %2) {
ret i32 99
}
/* Variables and functions */
int /*<<< orphan*/ test_gen_gen(int, int, int, unsigned char *);
void test_gen_gen_uat(void) {
  static unsigned char sample[21] = {0x01, 0x9b, 0x91, 0x8c, 0x91, 0xe1, 0x4f,
                                     0x0c, 0x7c, 0x91, 0x6c, 0x3a, 0xa2, 0x8e,
                                     0x42, 0xcb, 0x37, 0x80, 0x7b, 0xb4, 0x62};
  test_gen_gen(0x187, 120, 21, sample);
}


x86 assembly (clang, -O0):
<test_gen_gen_uat>:
push   %rbp
mov    %rsp,%rbp
mov    $0x187,%edi
mov    $0x78,%esi
mov    $0x15,%edx
lea    0x2f06(%rip),%rcx
call   1030 <test_gen_gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_gen_gen_uat>:
lea    0x2f19(%rip),%rcx
mov    $0x187,%edi
mov    $0x78,%esi
mov    $0x15,%edx
jmp    1030 <test_gen_gen@plt>

LLVM IR (-O0):
@test_gen_gen_uat.sample = internal global [21 x i8] c"\01\9B\91\8C\91\E1O\0C|\91l:\A2\8EB\CB7\80{\B4b"
define void @test_gen_gen_uat() {
%1 = call i32 @test_gen_gen(i32 391, i32 120, i32 21, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @test_gen_gen_uat.sample, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@test_gen_gen_uat.sample = internal global [21 x i8] c"\01\9B\91\8C\91\E1O\0C|\91l:\A2\8EB\CB7\80{\B4b"
define void @test_gen_gen_uat() {
%1 = tail call i32 @test_gen_gen(i32 391, i32 120, i32 21, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @test_gen_gen_uat.sample, i64 0, i64 0))
ret void
}
/* Variables and functions */
int EXIT_FAILURE;
int EXIT_SUCCESS;
int /*<<< orphan*/ STDOUT_FILENO;
scalar_t__ write(int /*<<< orphan*/, char *, int);
int ft_putchar(char c) {
  if (write(STDOUT_FILENO, &c, 1) < 0)
    return (EXIT_FAILURE);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<ft_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0x0,%rax
jge    1150 <ft_putchar+0x40>
mov    0x2e92(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <ft_putchar+0x4c>
mov    0x2e79(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putchar>:
push   %rax
mov    %dil,0x7(%rsp)
mov    0x2ed3(%rip),%rax
mov    (%rax),%edi
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
test   %rax,%rax
jns    113c <ft_putchar+0x2c>
mov    0x2e9e(%rip),%rax
jmp    1143 <ft_putchar+0x33>
mov    0x2e8d(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @ft_putchar(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i32, i32* @STDOUT_FILENO
%5 = call i64 @write(i32 %4, i8* %3, i32 1)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @EXIT_FAILURE
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* @EXIT_SUCCESS
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @ft_putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i32, i32* @STDOUT_FILENO
%4 = call i64 @write(i32 %3, i8* %2, i32 1)
%5 = icmp slt i64 %4, 0
%6 = load i32, i32* @EXIT_FAILURE
%7 = load i32, i32* @EXIT_SUCCESS
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
void INT_Excep_RIIC3_TXI3(void) {}


x86 assembly (clang, -O0):
<INT_Excep_RIIC3_TXI3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_RIIC3_TXI3>:
ret

LLVM IR (-O0):
define void @INT_Excep_RIIC3_TXI3() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_RIIC3_TXI3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
scalar_t__ access(char *, int /*<<< orphan*/);
bool logind_running(void) { return access("/run/systemd/seats/", F_OK) >= 0; }


x86 assembly (clang, -O0):
<logind_running>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <access@plt>
cmp    $0x0,%rax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logind_running>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <access@plt>
shr    $0x3f,%rax
xor    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"/run/systemd/seats/\00"
@F_OK = global i32 0
define i32 @logind_running() {
%1 = load i32, i32* @F_OK
%2 = call i64 @access(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = icmp sge i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
@.str = [20 x i8] c"/run/systemd/seats/\00"
@F_OK = global i32 0
define i32 @logind_running() {
%1 = load i32, i32* @F_OK
%2 = tail call i64 @access(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = lshr i64 %2, 63
%4 = trunc i64 %3 to i32
%5 = xor i32 %4, 1
ret i32 %5
}
float CToF(float CVal) { return (float)(CVal * 9.0 / 5.0 + 32.0); }


x86 assembly (clang, -O0):
<CToF>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xef6(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xece(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CToF>:
cvtss2sd %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
divsd  0xef4(%rip),%xmm0
addsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @CToF(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fmul double %4, 9.000000e+00
%6 = fdiv double %5, 5.000000e+00
%7 = fadd double %6, 3.200000e+01
%8 = fptrunc double %7 to float
ret float %8
}

LLVM IR (-O2):
define float @CToF(float %0) {
%2 = fpext float %0 to double
%3 = fmul double %2, 9.000000e+00
%4 = fdiv double %3, 5.000000e+00
%5 = fadd double %4, 3.200000e+01
%6 = fptrunc double %5 to float
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int /*<<< orphan*/);
void print() {
  int i = 1;
  printf("%d %d %d", ++i, i, i++);
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%esi
add    $0x1,%esi
mov    %esi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x4(%rbp),%ecx
mov    %ecx,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
lea    0xee9(%rip),%rdi
mov    $0x2,%esi
mov    $0x2,%edx
mov    $0x2,%ecx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%d %d %d\00"
define void @print() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = load i32, i32* %1
%6 = add nsw i32 %5, 1
store i32 %6, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4, i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d %d %d\00"
define void @print() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 2, i32 2, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ checkhubconfig();
void ircrehash(int hookhum, void *arg) { checkhubconfig(); }


x86 assembly (clang, -O0):
<ircrehash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <checkhubconfig@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ircrehash>:
xor    %eax,%eax
jmp    1030 <checkhubconfig@plt>

LLVM IR (-O0):
define void @ircrehash(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 (...) @checkhubconfig()
ret void
}

LLVM IR (-O2):
define void @ircrehash(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @checkhubconfig()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ divide_conquer();
int /*<<< orphan*/ scan_throgh();
int main() {
  divide_conquer();
  scan_throgh();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <divide_conquer@plt>
mov    $0x0,%al
call   1040 <scan_throgh@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <divide_conquer@plt>
xor    %eax,%eax
call   1040 <scan_throgh@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @divide_conquer()
%3 = call i32 (...) @scan_throgh()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @divide_conquer()
%2 = tail call i32 (...) @scan_throgh()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void getWebRoot(char *path) { strcpy(path, ""); }


x86 assembly (clang, -O0):
<getWebRoot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getWebRoot>:
lea    0xee9(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @getWebRoot(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @getWebRoot(i8* %0) {
%2 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int f415(int *);
int f416(int *p) { return f415(p); }


x86 assembly (clang, -O0):
<f416>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f415@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f416>:
jmp    1030 <f415@plt>

LLVM IR (-O0):
define i32 @f416(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f415(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f416(i32* %0) {
%2 = tail call i32 @f415(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef char const uint32_t;

/* Variables and functions */
uint32_t get_uint32(const char *buf) {
  return (buf[3] & 0xff) << 24 | (buf[2] & 0xff) << 16 | (buf[1] & 0xff) << 8 |
         (buf[0] & 0xff);
}


x86 assembly (clang, -O0):
<get_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x3(%rax),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x1(%rcx),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
and    $0xff,%ecx
or     %ecx,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_uint32>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define signext i8 @get_uint32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = and i32 %6, 255
%8 = shl i32 %7, 24
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = and i32 %12, 255
%14 = shl i32 %13, 16
%15 = or i32 %8, %14
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = and i32 %19, 255
%21 = shl i32 %20, 8
%22 = or i32 %15, %21
%23 = load i8*, i8** %2
%24 = getelementptr inbounds i8, i8* %23, i64 0
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = and i32 %26, 255
%28 = or i32 %22, %27
%29 = trunc i32 %28 to i8
ret i8 %29
}

LLVM IR (-O2):
define signext i8 @get_uint32(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
int sys_fork(struct tcb *tcp) { return 0100 | 003; }


x86 assembly (clang, -O0):
<sys_fork>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x43,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_fork>:
mov    $0x43,%eax
ret

LLVM IR (-O0):
%struct.tcb = type opaque
define i32 @sys_fork(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
ret i32 67
}

LLVM IR (-O2):
%struct.tcb = type opaque
define i32 @sys_fork(%struct.tcb* nocapture readnone %0) {
ret i32 67
}