#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int TimerBaseValid(unsigned long);
void TimerConfigure(unsigned long ulBase, unsigned long ulConfig) {
  DEBUG_ASSERT(TimerBaseValid(ulBase));
  DEBUG_ASSERT((ulConfig == 0x00000021) || (ulConfig == 0x00000031) ||
               (ulConfig == 0x00000022) || (ulConfig == 0x00000032) ||
               (ulConfig == 0x01000000) ||
               ((ulConfig & 0xff000000) == 0x04000000));
  DEBUG_ASSERT(((ulConfig & 0xff000000) != 0x04000000) ||
               ((((ulConfig & 0x000000ff) == 0x00000021) ||
                 ((ulConfig & 0x000000ff) == 0x00000031) ||
                 ((ulConfig & 0x000000ff) == 0x00000022) ||
                 ((ulConfig & 0x000000ff) == 0x00000032) ||
                 ((ulConfig & 0x000000ff) == 0x00000003) ||
                 ((ulConfig & 0x000000ff) == 0x00000007) ||
                 ((ulConfig & 0x000000ff) == 0x0000000A)) &&
                (((ulConfig & 0x0000ff00) == 0x00002100) ||
                 ((ulConfig & 0x0000ff00) == 0x00003100) ||
                 ((ulConfig & 0x0000ff00) == 0x00002200) ||
                 ((ulConfig & 0x0000ff00) == 0x00003200) ||
                 ((ulConfig & 0x0000ff00) == 0x00000300) ||
                 ((ulConfig & 0x0000ff00) == 0x00001300) ||
                 ((ulConfig & 0x0000ff00) == 0x00000700) ||
                 ((ulConfig & 0x0000ff00) == 0x00001700) ||
                 ((ulConfig & 0x0000ff00) == 0x00000A00))));
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) &=
      ~(0x00000001 | 0x00000100);
  (*((volatile unsigned long *)(ulBase + 0x00000000))) = ulConfig >> 24;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) =
      (ulConfig & 255) | 0x00000200;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) =
      ((ulConfig >> 8) & 255) | 0x00000200;
}


x86 assembly (clang, -O0):
<TimerConfigure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <TimerBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    $0x1,%al
cmpq   $0x21,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     11ad <TimerConfigure+0x8d>
mov    $0x1,%al
cmpq   $0x31,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     11ad <TimerConfigure+0x8d>
mov    $0x1,%al
cmpq   $0x22,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     11ad <TimerConfigure+0x8d>
mov    $0x1,%al
cmpq   $0x32,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     11ad <TimerConfigure+0x8d>
mov    $0x1,%al
cmpq   $0x1000000,-0x10(%rbp)
01
mov    %al,-0x11(%rbp)
je     11ad <TimerConfigure+0x8d>
movabs $0xff000000,%rax
and    -0x10(%rbp),%rax
cmp    $0x4000000,%rax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <DEBUG_ASSERT@plt>
movabs $0xff000000,%rcx
and    -0x10(%rbp),%rcx
mov    $0x1,%al
cmp    $0x4000000,%rcx
mov    %al,-0x12(%rbp)
jne    1376 <TimerConfigure+0x256>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x21,%rax
je     126c <TimerConfigure+0x14c>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x31,%rax
je     126c <TimerConfigure+0x14c>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x22,%rax
je     126c <TimerConfigure+0x14c>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x32,%rax
je     126c <TimerConfigure+0x14c>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x3,%rax
je     126c <TimerConfigure+0x14c>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x7,%rax
je     126c <TimerConfigure+0x14c>
mov    -0x10(%rbp),%rcx
and    $0xff,%rcx
xor    %eax,%eax
cmp    $0xa,%rcx
mov    %al,-0x13(%rbp)
jne    1370 <TimerConfigure+0x250>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x2100,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x3100,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x2200,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x3200,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x300,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x1300,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x700,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
mov    $0x1,%al
cmp    $0x1700,%rcx
mov    %al,-0x14(%rbp)
je     136a <TimerConfigure+0x24a>
mov    -0x10(%rbp),%rax
and    $0xff00,%rax
cmp    $0xa00,%rax
sete   %al
mov    %al,-0x14(%rbp)
mov    -0x14(%rbp),%al
mov    %al,-0x13(%rbp)
mov    -0x13(%rbp),%al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
and    $0xfffffffffffffefe,%rcx
mov    %rcx,0xc(%rax)
mov    -0x10(%rbp),%rcx
shr    $0x18,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
and    $0xff,%rcx
or     $0x200,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x4(%rax)
mov    -0x10(%rbp),%rcx
shr    $0x8,%rcx
and    $0xff,%rcx
or     $0x200,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerConfigure>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1030 <TimerBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    $0x1,%edi
cmp    $0x32,%rbx
ja     1151 <TimerConfigure+0x31>
movabs $0x6000600000000,%rax
bt     %rbx,%rax
jb     116c <TimerConfigure+0x4c>
cmp    $0x1000000,%rbx
je     116c <TimerConfigure+0x4c>
mov    %ebx,%eax
and    $0xff000000,%eax
xor    %edi,%edi
cmp    $0x4000000,%eax
sete   %dil
call   1040 <DEBUG_ASSERT@plt>
mov    %ebx,%eax
and    $0xff000000,%eax
cmp    $0x4000000,%eax
jne    11d3 <TimerConfigure+0xb3>
xor    %edi,%edi
cmp    $0x32,%bl
ja     11d8 <TimerConfigure+0xb8>
movzbl %bl,%eax
movabs $0x6000600000488,%rcx
bt     %rax,%rcx
jae    11d8 <TimerConfigure+0xb8>
mov    %ebx,%eax
and    $0xff00,%eax
movswl %ax,%ecx
movswl %ax,%edx
cmp    $0x20ff,%ecx
jg     1211 <TimerConfigure+0xf1>
movzwl %ax,%ecx
mov    $0x1,%edi
cmp    $0x12ff,%edx
jg     1233 <TimerConfigure+0x113>
cmp    $0x300,%ecx
je     11d8 <TimerConfigure+0xb8>
cmp    $0x700,%ecx
je     11d8 <TimerConfigure+0xb8>
jmp    1255 <TimerConfigure+0x135>
mov    $0x1,%edi
call   1040 <DEBUG_ASSERT@plt>
andq   $0xfffffffffffffefe,0xc(%r14)
ff
mov    %rbx,%rax
shr    $0x18,%rax
mov    %rax,(%r14)
movzbl %bl,%eax
or     $0x200,%rax
mov    %rax,0x4(%r14)
movzbl %bh,%eax
or     $0x200,%rax
mov    %rax,0x8(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
movzwl %ax,%ecx
mov    $0x1,%edi
cmp    $0x30ff,%edx
jg     1245 <TimerConfigure+0x125>
cmp    $0x2100,%ecx
je     11d8 <TimerConfigure+0xb8>
cmp    $0x2200,%ecx
je     11d8 <TimerConfigure+0xb8>
jmp    1255 <TimerConfigure+0x135>
cmp    $0x1300,%ecx
je     11d8 <TimerConfigure+0xb8>
cmp    $0x1700,%ecx
je     11d8 <TimerConfigure+0xb8>
jmp    1255 <TimerConfigure+0x135>
cmp    $0x3100,%ecx
je     11d8 <TimerConfigure+0xb8>
cmp    $0x3200,%ecx
je     11d8 <TimerConfigure+0xb8>
xor    %edi,%edi
cmp    $0xa00,%eax
sete   %dil
jmp    11d8 <TimerConfigure+0xb8>

LLVM IR (-O0):
define void @TimerConfigure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @TimerBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %4
%9 = icmp eq i64 %8, 33
br i1 %9, label %26, label %10
10: ; preds = %2
%11 = load i64, i64* %4
%12 = icmp eq i64 %11, 49
br i1 %12, label %26, label %13
13: ; preds = %10
%14 = load i64, i64* %4
%15 = icmp eq i64 %14, 34
br i1 %15, label %26, label %16
16: ; preds = %13
%17 = load i64, i64* %4
%18 = icmp eq i64 %17, 50
br i1 %18, label %26, label %19
19: ; preds = %16
%20 = load i64, i64* %4
%21 = icmp eq i64 %20, 16777216
br i1 %21, label %26, label %22
22: ; preds = %19
%23 = load i64, i64* %4
%24 = and i64 %23, 4278190080
%25 = icmp eq i64 %24, 67108864
br label %26
26: ; preds = %22, %19, %16, %13, %10, %2
%27 = phi i1 [ true, %19 ], [ true, %16 ], [ true, %13 ], [ true, %10 ], [ true, %2 ], [ %25, %22 ]
%28 = zext i1 %27 to i32
%29 = call i32 @DEBUG_ASSERT(i32 %28)
%30 = load i64, i64* %4
%31 = and i64 %30, 4278190080
%32 = icmp ne i64 %31, 67108864
br i1 %32, label %101, label %33
33: ; preds = %26
%34 = load i64, i64* %4
%35 = and i64 %34, 255
%36 = icmp eq i64 %35, 33
br i1 %36, label %61, label %37
37: ; preds = %33
%38 = load i64, i64* %4
%39 = and i64 %38, 255
%40 = icmp eq i64 %39, 49
br i1 %40, label %61, label %41
41: ; preds = %37
%42 = load i64, i64* %4
%43 = and i64 %42, 255
%44 = icmp eq i64 %43, 34
br i1 %44, label %61, label %45
45: ; preds = %41
%46 = load i64, i64* %4
%47 = and i64 %46, 255
%48 = icmp eq i64 %47, 50
br i1 %48, label %61, label %49
49: ; preds = %45
%50 = load i64, i64* %4
%51 = and i64 %50, 255
%52 = icmp eq i64 %51, 3
br i1 %52, label %61, label %53
53: ; preds = %49
%54 = load i64, i64* %4
%55 = and i64 %54, 255
%56 = icmp eq i64 %55, 7
br i1 %56, label %61, label %57
57: ; preds = %53
%58 = load i64, i64* %4
%59 = and i64 %58, 255
%60 = icmp eq i64 %59, 10
br i1 %60, label %61, label %99
61: ; preds = %57, %53, %49, %45, %41, %37, %33
%62 = load i64, i64* %4
%63 = and i64 %62, 65280
%64 = icmp eq i64 %63, 8448
br i1 %64, label %97, label %65
65: ; preds = %61
%66 = load i64, i64* %4
%67 = and i64 %66, 65280
%68 = icmp eq i64 %67, 12544
br i1 %68, label %97, label %69
69: ; preds = %65
%70 = load i64, i64* %4
%71 = and i64 %70, 65280
%72 = icmp eq i64 %71, 8704
br i1 %72, label %97, label %73
73: ; preds = %69
%74 = load i64, i64* %4
%75 = and i64 %74, 65280
%76 = icmp eq i64 %75, 12800
br i1 %76, label %97, label %77
77: ; preds = %73
%78 = load i64, i64* %4
%79 = and i64 %78, 65280
%80 = icmp eq i64 %79, 768
br i1 %80, label %97, label %81
81: ; preds = %77
%82 = load i64, i64* %4
%83 = and i64 %82, 65280
%84 = icmp eq i64 %83, 4864
br i1 %84, label %97, label %85
85: ; preds = %81
%86 = load i64, i64* %4
%87 = and i64 %86, 65280
%88 = icmp eq i64 %87, 1792
br i1 %88, label %97, label %89
89: ; preds = %85
%90 = load i64, i64* %4
%91 = and i64 %90, 65280
%92 = icmp eq i64 %91, 5888
br i1 %92, label %97, label %93
93: ; preds = %89
%94 = load i64, i64* %4
%95 = and i64 %94, 65280
%96 = icmp eq i64 %95, 2560
br label %97
97: ; preds = %93, %89, %85, %81, %77, %73, %69, %65, %61
%98 = phi i1 [ true, %89 ], [ true, %85 ], [ true, %81 ], [ true, %77 ], [ true, %73 ], [ true, %69 ], [ true, %65 ], [ true, %61 ], [ %96, %93 ]
br label %99
99: ; preds = %97, %57
%100 = phi i1 [ false, %57 ], [ %98, %97 ]
br label %101
101: ; preds = %99, %26
%102 = phi i1 [ true, %26 ], [ %100, %99 ]
%103 = zext i1 %102 to i32
%104 = call i32 @DEBUG_ASSERT(i32 %103)
%105 = load i64, i64* %3
%106 = add i64 %105, 12
%107 = inttoptr i64 %106 to i64*
%108 = load volatile i64, i64* %107
%109 = and i64 %108, -258
store volatile i64 %109, i64* %107
%110 = load i64, i64* %4
%111 = lshr i64 %110, 24
%112 = load i64, i64* %3
%113 = add i64 %112, 0
%114 = inttoptr i64 %113 to i64*
store volatile i64 %111, i64* %114
%115 = load i64, i64* %4
%116 = and i64 %115, 255
%117 = or i64 %116, 512
%118 = load i64, i64* %3
%119 = add i64 %118, 4
%120 = inttoptr i64 %119 to i64*
store volatile i64 %117, i64* %120
%121 = load i64, i64* %4
%122 = lshr i64 %121, 8
%123 = and i64 %122, 255
%124 = or i64 %123, 512
%125 = load i64, i64* %3
%126 = add i64 %125, 8
%127 = inttoptr i64 %126 to i64*
store volatile i64 %124, i64* %127
ret void
}

LLVM IR (-O2):
define void @TimerConfigure(i64 %0, i64 %1) {
%3 = tail call i32 @TimerBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
switch i64 %1, label %5 [
i64 16777216, label %9
i64 50, label %9
i64 49, label %9
i64 34, label %9
i64 33, label %9
]
5: ; preds = %2
%6 = and i64 %1, 4278190080
%7 = icmp eq i64 %6, 67108864
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %2, %2, %2, %2, %2, %5
%10 = phi i32 [ 1, %2 ], [ %8, %5 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ]
%11 = tail call i32 @DEBUG_ASSERT(i32 %10)
%12 = and i64 %1, 4278190080
%13 = icmp eq i64 %12, 67108864
br i1 %13, label %14, label %22
14: ; preds = %9
%15 = trunc i64 %1 to i8
switch i8 %15, label %22 [
i8 33, label %16
i8 49, label %16
i8 34, label %16
i8 50, label %16
i8 3, label %16
i8 7, label %16
i8 10, label %16
]
16: ; preds = %14, %14, %14, %14, %14, %14, %14
%17 = and i64 %1, 65280
%18 = trunc i64 %17 to i16
switch i16 %18, label %19 [
i16 8448, label %22
i16 12544, label %22
i16 8704, label %22
i16 12800, label %22
i16 768, label %22
i16 4864, label %22
i16 1792, label %22
i16 5888, label %22
]
19: ; preds = %16
%20 = icmp eq i64 %17, 2560
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %16, %16, %16, %16, %16, %16, %16, %16, %14, %19, %9
%23 = phi i32 [ 1, %9 ], [ 1, %16 ], [ %21, %19 ], [ 0, %14 ], [ 1, %16 ], [ 1, %16 ], [ 1, %16 ], [ 1, %16 ], [ 1, %16 ], [ 1, %16 ], [ 1, %16 ]
%24 = tail call i32 @DEBUG_ASSERT(i32 %23)
%25 = add i64 %0, 12
%26 = inttoptr i64 %25 to i64*
%27 = load volatile i64, i64* %26
%28 = and i64 %27, -258
store volatile i64 %28, i64* %26
%29 = lshr i64 %1, 24
%30 = inttoptr i64 %0 to i64*
store volatile i64 %29, i64* %30
%31 = and i64 %1, 255
%32 = or i64 %31, 512
%33 = add i64 %0, 4
%34 = inttoptr i64 %33 to i64*
store volatile i64 %32, i64* %34
%35 = lshr i64 %1, 8
%36 = and i64 %35, 255
%37 = or i64 %36, 512
%38 = add i64 %0, 8
%39 = inttoptr i64 %38 to i64*
store volatile i64 %37, i64* %39
ret void
}