#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int clamp(int);
unsigned int pack_rgb_alpha_0xff(int, int, int);
void draw_block4x4_rgb8_etc2_planar_mode(const unsigned char *bitstring,
                                         unsigned int *image_buffer) {
  int RO = (bitstring[0] & 0x7E) >> 1;
  int GO = ((bitstring[0] & 0x1) << 6) | ((bitstring[1] & 0x7E) >> 1);
  int BO = ((bitstring[1] & 0x1) << 5) | (bitstring[2] & 0x18) |
           ((bitstring[2] & 0x03) << 1) | ((bitstring[3] & 0x80) >> 7);
  int RH = ((bitstring[3] & 0x7C) >> 1) | (bitstring[3] & 0x1);
  int GH = (bitstring[4] & 0xFE) >> 1;
  int BH = ((bitstring[4] & 0x1) << 5) | ((bitstring[5] & 0xF8) >> 3);
  int RV = ((bitstring[5] & 0x7) << 3) | ((bitstring[6] & 0xE0) >> 5);
  int GV = ((bitstring[6] & 0x1F) << 2) | ((bitstring[7] & 0xC0) >> 6);
  int BV = bitstring[7] & 0x3F;
  RO = (RO << 2) | ((RO & 0x30) >> 4);
  GO = (GO << 1) | ((GO & 0x40) >> 6);
  BO = (BO << 2) | ((BO & 0x30) >> 4);
  RH = (RH << 2) | ((RH & 0x30) >> 4);
  GH = (GH << 1) | ((GH & 0x40) >> 6);
  BH = (BH << 2) | ((BH & 0x30) >> 4);
  RV = (RV << 2) | ((RV & 0x30) >> 4);
  GV = (GV << 1) | ((GV & 0x40) >> 6);
  BV = (BV << 2) | ((BV & 0x30) >> 4);
  for (int y = 0; y < 4; y++)
    for (int x = 0; x < 4; x++) {
      int r = clamp((x * (RH - RO) + y * (RV - RO) + 4 * RO + 2) >> 2);
      int g = clamp((x * (GH - GO) + y * (GV - GO) + 4 * GO + 2) >> 2);
      int b = clamp((x * (BH - BO) + y * (BV - BO) + 4 * BO + 2) >> 2);
      image_buffer[y * 4 + x] = pack_rgb_alpha_0xff(r, g, b);
    }
}


x86 assembly (clang, -O0):
<draw_block4x4_rgb8_etc2_planar_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0x7e,%eax
sar    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0x1,%eax
shl    $0x6,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
and    $0x7e,%ecx
sar    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
and    $0x1,%eax
shl    $0x5,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
and    $0x18,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
and    $0x3,%ecx
shl    $0x1,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
and    $0x80,%ecx
sar    $0x7,%ecx
or     %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
and    $0x7c,%eax
sar    $0x1,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
and    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x4(%rax),%eax
and    $0xfe,%eax
sar    $0x1,%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x4(%rax),%eax
and    $0x1,%eax
shl    $0x5,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5(%rcx),%ecx
and    $0xf8,%ecx
sar    $0x3,%ecx
or     %ecx,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x5(%rax),%eax
and    $0x7,%eax
shl    $0x3,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x6(%rcx),%ecx
and    $0xe0,%ecx
sar    $0x5,%ecx
or     %ecx,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%eax
and    $0x1f,%eax
shl    $0x2,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x7(%rcx),%ecx
and    $0xc0,%ecx
sar    $0x6,%ecx
or     %ecx,%eax
mov    %eax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x7(%rax),%eax
and    $0x3f,%eax
mov    %eax,-0x34(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x2,%eax
mov    -0x14(%rbp),%ecx
and    $0x30,%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
shl    $0x1,%eax
mov    -0x18(%rbp),%ecx
and    $0x40,%ecx
sar    $0x6,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
shl    $0x2,%eax
mov    -0x1c(%rbp),%ecx
and    $0x30,%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
shl    $0x2,%eax
mov    -0x20(%rbp),%ecx
and    $0x30,%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x24(%rbp),%eax
shl    $0x1,%eax
mov    -0x24(%rbp),%ecx
and    $0x40,%ecx
sar    $0x6,%ecx
or     %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x28(%rbp),%eax
shl    $0x2,%eax
mov    -0x28(%rbp),%ecx
and    $0x30,%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x28(%rbp)
mov    -0x2c(%rbp),%eax
shl    $0x2,%eax
mov    -0x2c(%rbp),%ecx
and    $0x30,%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x30(%rbp),%eax
shl    $0x1,%eax
mov    -0x30(%rbp),%ecx
and    $0x40,%ecx
sar    $0x6,%ecx
or     %ecx,%eax
mov    %eax,-0x30(%rbp)
mov    -0x34(%rbp),%eax
shl    $0x2,%eax
mov    -0x34(%rbp),%ecx
and    $0x30,%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x34(%rbp)
movl   $0x0,-0x38(%rbp)
cmpl   $0x4,-0x38(%rbp)
jge    13f6 <draw_block4x4_rgb8_etc2_planar_mode+0x2d6>
movl   $0x0,-0x3c(%rbp)
cmpl   $0x4,-0x3c(%rbp)
jge    13e3 <draw_block4x4_rgb8_etc2_planar_mode+0x2c3>
mov    -0x3c(%rbp),%edi
mov    -0x20(%rbp),%eax
sub    -0x14(%rbp),%eax
imul   %eax,%edi
mov    -0x38(%rbp),%eax
mov    -0x2c(%rbp),%ecx
sub    -0x14(%rbp),%ecx
imul   %ecx,%eax
add    %eax,%edi
mov    -0x14(%rbp),%eax
shl    $0x2,%eax
add    %eax,%edi
add    $0x2,%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,-0x40(%rbp)
mov    -0x3c(%rbp),%edi
mov    -0x24(%rbp),%eax
sub    -0x18(%rbp),%eax
imul   %eax,%edi
mov    -0x38(%rbp),%eax
mov    -0x30(%rbp),%ecx
sub    -0x18(%rbp),%ecx
imul   %ecx,%eax
add    %eax,%edi
mov    -0x18(%rbp),%eax
shl    $0x2,%eax
add    %eax,%edi
add    $0x2,%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,-0x44(%rbp)
mov    -0x3c(%rbp),%edi
mov    -0x28(%rbp),%eax
sub    -0x1c(%rbp),%eax
imul   %eax,%edi
mov    -0x38(%rbp),%eax
mov    -0x34(%rbp),%ecx
sub    -0x1c(%rbp),%ecx
imul   %ecx,%eax
add    %eax,%edi
mov    -0x1c(%rbp),%eax
shl    $0x2,%eax
add    %eax,%edi
add    $0x2,%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,-0x48(%rbp)
mov    -0x40(%rbp),%edi
mov    -0x44(%rbp),%esi
mov    -0x48(%rbp),%edx
call   1040 <pack_rgb_alpha_0xff@plt>
mov    %eax,%edx
mov    -0x10(%rbp),%rax
mov    -0x38(%rbp),%ecx
shl    $0x2,%ecx
add    -0x3c(%rbp),%ecx
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
jmp    1318 <draw_block4x4_rgb8_etc2_planar_mode+0x1f8>
jmp    13e8 <draw_block4x4_rgb8_etc2_planar_mode+0x2c8>
mov    -0x38(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x38(%rbp)
jmp    1307 <draw_block4x4_rgb8_etc2_planar_mode+0x1e7>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_block4x4_rgb8_etc2_planar_mode>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x78,%rsp
mov    %rsi,(%rsp)
movzbl (%rdi),%r9d
movzbl 0x1(%rdi),%r11d
mov    %r11d,%ecx
shl    $0x5,%ecx
and    $0x20,%ecx
movzbl 0x2(%rdi),%edx
mov    %edx,%ebp
and    $0x18,%ebp
or     %ecx,%ebp
and    $0x3,%edx
lea    0x0(%rbp,%rdx,2),%ecx
movzbl 0x3(%rdi),%r10d
mov    %r10d,%r15d
shr    $0x7,%r15d
or     %ecx,%r15d
mov    %r10d,%ecx
shr    %ecx
and    $0x3e,%ecx
mov    %r10d,%r8d
and    $0x1,%r8d
or     %ecx,%r8d
movzbl 0x4(%rdi),%r13d
mov    %r13d,%edx
shl    $0x5,%edx
and    $0x20,%edx
movzbl 0x5(%rdi),%ebx
mov    %ebx,%ecx
shr    $0x3,%ecx
or     %edx,%ecx
mov    %ebx,%esi
and    $0x7,%esi
movzbl 0x6(%rdi),%r14d
mov    %r14d,%edx
shr    $0x5,%edx
lea    (%rdx,%rsi,8),%edx
mov    %r14d,%esi
and    $0x1f,%esi
movzbl 0x7(%rdi),%r12d
mov    %r12d,%edi
shr    $0x6,%edi
lea    (%rdi,%rsi,4),%edi
mov    %r9d,%eax
and    $0x7e,%eax
mov    %r9d,%esi
shr    $0x5,%r9d
and    $0x3,%r9d
lea    (%r9,%rax,2),%r9d
shl    $0x6,%esi
and    $0x40,%esi
and    $0x7e,%r11d
lea    (%r11,%rsi,2),%eax
shr    $0x6,%esi
or     %eax,%esi
mov    %r13d,%eax
shr    $0x7,%eax
shr    $0x4,%ebp
lea    0x0(%rbp,%r15,4),%ebp
shr    $0x5,%r10d
and    $0x3,%r10d
and    $0xfffffffe,%r13d
or     %eax,%r13d
mov    %ecx,%eax
shr    $0x4,%eax
lea    (%rax,%rcx,4),%eax
shr    %ebx
and    $0x3,%ebx
shr    $0x4,%r14d
and    $0x1,%r14d
mov    %r12d,%ecx
and    $0x3f,%ecx
shr    $0x4,%r12d
and    $0x3,%r12d
sub    %r9d,%ebx
lea    (%rbx,%rdx,4),%edx
mov    %edx,0x10(%rsp)
sub    %esi,%r14d
lea    (%r14,%rdi,2),%edx
mov    %edx,0xc(%rsp)
sub    %ebp,%r12d
lea    (%r12,%rcx,4),%ecx
mov    %ecx,0x8(%rsp)
lea    0x2(,%rbp,4),%ecx
mov    %rcx,0x70(%rsp)
lea    0x0(%rbp,%rbp,2),%ecx
lea    0x2(%rax,%rcx,1),%ecx
mov    %rcx,0x68(%rsp)
lea    (%rax,%rax,2),%ecx
add    %ebp,%ecx
add    $0x2,%ecx
mov    %rcx,0x60(%rsp)
add    %eax,%ebp
lea    (%r9,%r9,2),%eax
lea    (%rax,%r8,4),%ecx
mov    %r9d,%eax
add    %r10d,%eax
add    %eax,%eax
lea    (%rax,%r8,8),%eax
mov    %rax,0x50(%rsp)
lea    (%r8,%r8,2),%eax
lea    (%r9,%rax,4),%eax
lea    0x0(,%r9,4),%edx
mov    %rdx,0x48(%rsp)
add    %r10d,%ecx
mov    %rcx,0x58(%rsp)
lea    (%r10,%r10,2),%ecx
add    %eax,%ecx
mov    %rcx,0x40(%rsp)
lea    (%rsi,%rsi,2),%eax
add    %r13d,%eax
add    $0x2,%eax
mov    %rax,0x38(%rsp)
lea    0x0(%r13,%r13,2),%eax
add    %esi,%eax
add    $0x2,%eax
mov    %rax,0x30(%rsp)
add    %esi,%r13d
lea    0x2(,%rsi,4),%eax
mov    %rax,0x28(%rsp)
lea    0x2(%rbp,%rbp,1),%eax
mov    %rax,0x20(%rsp)
lea    0x2(%r13,%r13,1),%eax
mov    %rax,0x18(%rsp)
xor    %r15d,%r15d
mov    $0x2,%r13d
xor    %r12d,%r12d
xor    %r14d,%r14d
cs nopw 0x0(%rax,%rax,1)
mov    0x48(%rsp),%rax
lea    (%rax,%r13,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebp
mov    0x28(%rsp),%rax
lea    (%rax,%r14,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebx
mov    0x70(%rsp),%rax
lea    (%rax,%r12,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    %eax,%edx
call   1040 <pack_rgb_alpha_0xff@plt>
mov    (%rsp),%rcx
mov    %eax,(%rcx,%r15,1)
mov    0x58(%rsp),%rax
lea    (%rax,%r13,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebx
mov    0x38(%rsp),%rax
lea    (%rax,%r14,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebp
mov    0x68(%rsp),%rax
lea    (%rax,%r12,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %ebx,%edi
mov    %ebp,%esi
mov    %eax,%edx
call   1040 <pack_rgb_alpha_0xff@plt>
mov    (%rsp),%rbx
mov    %eax,0x4(%rbx,%r15,1)
mov    0x50(%rsp),%rax
lea    (%rax,%r13,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,0x14(%rsp)
mov    0x18(%rsp),%rax
lea    (%rax,%r14,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebp
mov    0x20(%rsp),%rax
lea    (%rax,%r12,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    0x14(%rsp),%edi
mov    %ebp,%esi
mov    %eax,%edx
call   1040 <pack_rgb_alpha_0xff@plt>
mov    %eax,0x8(%rbx,%r15,1)
mov    0x40(%rsp),%rax
lea    (%rax,%r13,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebx
mov    0x30(%rsp),%rax
lea    (%rax,%r14,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %eax,%ebp
mov    0x60(%rsp),%rax
lea    (%rax,%r12,1),%edi
sar    $0x2,%edi
call   1030 <clamp@plt>
mov    %ebx,%edi
mov    %ebp,%esi
mov    %eax,%edx
call   1040 <pack_rgb_alpha_0xff@plt>
mov    (%rsp),%rcx
mov    %eax,0xc(%rcx,%r15,1)
add    0xc(%rsp),%r14d
add    0x8(%rsp),%r12d
add    $0x10,%r15
add    0x10(%rsp),%r13d
cmp    $0x40,%r15
jne    1300 <draw_block4x4_rgb8_etc2_planar_mode+0x1e0>
add    $0x78,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @draw_block4x4_rgb8_etc2_planar_mode(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
store i8* %0, i8** %3
store i32* %1, i32** %4
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i64 0
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = and i32 %22, 126
%24 = ashr i32 %23, 1
store i32 %24, i32* %5
%25 = load i8*, i8** %3
%26 = getelementptr inbounds i8, i8* %25, i64 0
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = and i32 %28, 1
%30 = shl i32 %29, 6
%31 = load i8*, i8** %3
%32 = getelementptr inbounds i8, i8* %31, i64 1
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = and i32 %34, 126
%36 = ashr i32 %35, 1
%37 = or i32 %30, %36
store i32 %37, i32* %6
%38 = load i8*, i8** %3
%39 = getelementptr inbounds i8, i8* %38, i64 1
%40 = load i8, i8* %39
%41 = zext i8 %40 to i32
%42 = and i32 %41, 1
%43 = shl i32 %42, 5
%44 = load i8*, i8** %3
%45 = getelementptr inbounds i8, i8* %44, i64 2
%46 = load i8, i8* %45
%47 = zext i8 %46 to i32
%48 = and i32 %47, 24
%49 = or i32 %43, %48
%50 = load i8*, i8** %3
%51 = getelementptr inbounds i8, i8* %50, i64 2
%52 = load i8, i8* %51
%53 = zext i8 %52 to i32
%54 = and i32 %53, 3
%55 = shl i32 %54, 1
%56 = or i32 %49, %55
%57 = load i8*, i8** %3
%58 = getelementptr inbounds i8, i8* %57, i64 3
%59 = load i8, i8* %58
%60 = zext i8 %59 to i32
%61 = and i32 %60, 128
%62 = ashr i32 %61, 7
%63 = or i32 %56, %62
store i32 %63, i32* %7
%64 = load i8*, i8** %3
%65 = getelementptr inbounds i8, i8* %64, i64 3
%66 = load i8, i8* %65
%67 = zext i8 %66 to i32
%68 = and i32 %67, 124
%69 = ashr i32 %68, 1
%70 = load i8*, i8** %3
%71 = getelementptr inbounds i8, i8* %70, i64 3
%72 = load i8, i8* %71
%73 = zext i8 %72 to i32
%74 = and i32 %73, 1
%75 = or i32 %69, %74
store i32 %75, i32* %8
%76 = load i8*, i8** %3
%77 = getelementptr inbounds i8, i8* %76, i64 4
%78 = load i8, i8* %77
%79 = zext i8 %78 to i32
%80 = and i32 %79, 254
%81 = ashr i32 %80, 1
store i32 %81, i32* %9
%82 = load i8*, i8** %3
%83 = getelementptr inbounds i8, i8* %82, i64 4
%84 = load i8, i8* %83
%85 = zext i8 %84 to i32
%86 = and i32 %85, 1
%87 = shl i32 %86, 5
%88 = load i8*, i8** %3
%89 = getelementptr inbounds i8, i8* %88, i64 5
%90 = load i8, i8* %89
%91 = zext i8 %90 to i32
%92 = and i32 %91, 248
%93 = ashr i32 %92, 3
%94 = or i32 %87, %93
store i32 %94, i32* %10
%95 = load i8*, i8** %3
%96 = getelementptr inbounds i8, i8* %95, i64 5
%97 = load i8, i8* %96
%98 = zext i8 %97 to i32
%99 = and i32 %98, 7
%100 = shl i32 %99, 3
%101 = load i8*, i8** %3
%102 = getelementptr inbounds i8, i8* %101, i64 6
%103 = load i8, i8* %102
%104 = zext i8 %103 to i32
%105 = and i32 %104, 224
%106 = ashr i32 %105, 5
%107 = or i32 %100, %106
store i32 %107, i32* %11
%108 = load i8*, i8** %3
%109 = getelementptr inbounds i8, i8* %108, i64 6
%110 = load i8, i8* %109
%111 = zext i8 %110 to i32
%112 = and i32 %111, 31
%113 = shl i32 %112, 2
%114 = load i8*, i8** %3
%115 = getelementptr inbounds i8, i8* %114, i64 7
%116 = load i8, i8* %115
%117 = zext i8 %116 to i32
%118 = and i32 %117, 192
%119 = ashr i32 %118, 6
%120 = or i32 %113, %119
store i32 %120, i32* %12
%121 = load i8*, i8** %3
%122 = getelementptr inbounds i8, i8* %121, i64 7
%123 = load i8, i8* %122
%124 = zext i8 %123 to i32
%125 = and i32 %124, 63
store i32 %125, i32* %13
%126 = load i32, i32* %5
%127 = shl i32 %126, 2
%128 = load i32, i32* %5
%129 = and i32 %128, 48
%130 = ashr i32 %129, 4
%131 = or i32 %127, %130
store i32 %131, i32* %5
%132 = load i32, i32* %6
%133 = shl i32 %132, 1
%134 = load i32, i32* %6
%135 = and i32 %134, 64
%136 = ashr i32 %135, 6
%137 = or i32 %133, %136
store i32 %137, i32* %6
%138 = load i32, i32* %7
%139 = shl i32 %138, 2
%140 = load i32, i32* %7
%141 = and i32 %140, 48
%142 = ashr i32 %141, 4
%143 = or i32 %139, %142
store i32 %143, i32* %7
%144 = load i32, i32* %8
%145 = shl i32 %144, 2
%146 = load i32, i32* %8
%147 = and i32 %146, 48
%148 = ashr i32 %147, 4
%149 = or i32 %145, %148
store i32 %149, i32* %8
%150 = load i32, i32* %9
%151 = shl i32 %150, 1
%152 = load i32, i32* %9
%153 = and i32 %152, 64
%154 = ashr i32 %153, 6
%155 = or i32 %151, %154
store i32 %155, i32* %9
%156 = load i32, i32* %10
%157 = shl i32 %156, 2
%158 = load i32, i32* %10
%159 = and i32 %158, 48
%160 = ashr i32 %159, 4
%161 = or i32 %157, %160
store i32 %161, i32* %10
%162 = load i32, i32* %11
%163 = shl i32 %162, 2
%164 = load i32, i32* %11
%165 = and i32 %164, 48
%166 = ashr i32 %165, 4
%167 = or i32 %163, %166
store i32 %167, i32* %11
%168 = load i32, i32* %12
%169 = shl i32 %168, 1
%170 = load i32, i32* %12
%171 = and i32 %170, 64
%172 = ashr i32 %171, 6
%173 = or i32 %169, %172
store i32 %173, i32* %12
%174 = load i32, i32* %13
%175 = shl i32 %174, 2
%176 = load i32, i32* %13
%177 = and i32 %176, 48
%178 = ashr i32 %177, 4
%179 = or i32 %175, %178
store i32 %179, i32* %13
store i32 0, i32* %14
br label %180
180: ; preds = %254, %2
%181 = load i32, i32* %14
%182 = icmp slt i32 %181, 4
br i1 %182, label %183, label %257
183: ; preds = %180
store i32 0, i32* %15
br label %184
184: ; preds = %250, %183
%185 = load i32, i32* %15
%186 = icmp slt i32 %185, 4
br i1 %186, label %187, label %253
187: ; preds = %184
%188 = load i32, i32* %15
%189 = load i32, i32* %8
%190 = load i32, i32* %5
%191 = sub nsw i32 %189, %190
%192 = mul nsw i32 %188, %191
%193 = load i32, i32* %14
%194 = load i32, i32* %11
%195 = load i32, i32* %5
%196 = sub nsw i32 %194, %195
%197 = mul nsw i32 %193, %196
%198 = add nsw i32 %192, %197
%199 = load i32, i32* %5
%200 = mul nsw i32 4, %199
%201 = add nsw i32 %198, %200
%202 = add nsw i32 %201, 2
%203 = ashr i32 %202, 2
%204 = call i32 @clamp(i32 %203)
store i32 %204, i32* %16
%205 = load i32, i32* %15
%206 = load i32, i32* %9
%207 = load i32, i32* %6
%208 = sub nsw i32 %206, %207
%209 = mul nsw i32 %205, %208
%210 = load i32, i32* %14
%211 = load i32, i32* %12
%212 = load i32, i32* %6
%213 = sub nsw i32 %211, %212
%214 = mul nsw i32 %210, %213
%215 = add nsw i32 %209, %214
%216 = load i32, i32* %6
%217 = mul nsw i32 4, %216
%218 = add nsw i32 %215, %217
%219 = add nsw i32 %218, 2
%220 = ashr i32 %219, 2
%221 = call i32 @clamp(i32 %220)
store i32 %221, i32* %17
%222 = load i32, i32* %15
%223 = load i32, i32* %10
%224 = load i32, i32* %7
%225 = sub nsw i32 %223, %224
%226 = mul nsw i32 %222, %225
%227 = load i32, i32* %14
%228 = load i32, i32* %13
%229 = load i32, i32* %7
%230 = sub nsw i32 %228, %229
%231 = mul nsw i32 %227, %230
%232 = add nsw i32 %226, %231
%233 = load i32, i32* %7
%234 = mul nsw i32 4, %233
%235 = add nsw i32 %232, %234
%236 = add nsw i32 %235, 2
%237 = ashr i32 %236, 2
%238 = call i32 @clamp(i32 %237)
store i32 %238, i32* %18
%239 = load i32, i32* %16
%240 = load i32, i32* %17
%241 = load i32, i32* %18
%242 = call i32 @pack_rgb_alpha_0xff(i32 %239, i32 %240, i32 %241)
%243 = load i32*, i32** %4
%244 = load i32, i32* %14
%245 = mul nsw i32 %244, 4
%246 = load i32, i32* %15
%247 = add nsw i32 %245, %246
%248 = sext i32 %247 to i64
%249 = getelementptr inbounds i32, i32* %243, i64 %248
store i32 %242, i32* %249
br label %250
250: ; preds = %187
%251 = load i32, i32* %15
%252 = add nsw i32 %251, 1
store i32 %252, i32* %15
br label %184
253: ; preds = %184
br label %254
254: ; preds = %253
%255 = load i32, i32* %14
%256 = add nsw i32 %255, 1
store i32 %256, i32* %14
br label %180
257: ; preds = %180
ret void
}

LLVM IR (-O2):
define void @draw_block4x4_rgb8_etc2_planar_mode(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = shl nuw nsw i32 %4, 6
%6 = and i32 %5, 64
%7 = getelementptr inbounds i8, i8* %0, i64 1
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = shl nuw nsw i32 %9, 5
%11 = and i32 %10, 32
%12 = getelementptr inbounds i8, i8* %0, i64 2
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = and i32 %14, 24
%16 = or i32 %11, %15
%17 = shl nuw nsw i32 %14, 1
%18 = and i32 %17, 6
%19 = or i32 %16, %18
%20 = getelementptr inbounds i8, i8* %0, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = lshr i32 %22, 7
%24 = or i32 %19, %23
%25 = lshr i32 %22, 1
%26 = and i32 %25, 62
%27 = and i32 %22, 1
%28 = or i32 %26, %27
%29 = getelementptr inbounds i8, i8* %0, i64 4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = lshr i32 %31, 7
%33 = shl nuw nsw i32 %31, 5
%34 = and i32 %33, 32
%35 = getelementptr inbounds i8, i8* %0, i64 5
%36 = load i8, i8* %35
%37 = zext i8 %36 to i32
%38 = lshr i32 %37, 3
%39 = or i32 %34, %38
%40 = shl nuw nsw i32 %37, 3
%41 = and i32 %40, 56
%42 = getelementptr inbounds i8, i8* %0, i64 6
%43 = load i8, i8* %42
%44 = zext i8 %43 to i32
%45 = lshr i32 %44, 5
%46 = or i32 %41, %45
%47 = shl nuw nsw i32 %44, 2
%48 = and i32 %47, 124
%49 = getelementptr inbounds i8, i8* %0, i64 7
%50 = load i8, i8* %49
%51 = zext i8 %50 to i32
%52 = lshr i32 %51, 6
%53 = or i32 %48, %52
%54 = shl nuw nsw i32 %4, 1
%55 = and i32 %54, 252
%56 = lshr i32 %4, 5
%57 = and i32 %56, 3
%58 = or i32 %55, %57
%59 = shl nuw nsw i32 %6, 1
%60 = and i32 %9, 126
%61 = or i32 %59, %60
%62 = lshr exact i32 %6, 6
%63 = or i32 %61, %62
%64 = shl nuw nsw i32 %24, 2
%65 = lshr i32 %16, 4
%66 = or i32 %64, %65
%67 = shl nuw nsw i32 %28, 2
%68 = lshr i32 %22, 5
%69 = and i32 %68, 3
%70 = and i32 %31, 254
%71 = or i32 %70, %32
%72 = shl nuw nsw i32 %39, 2
%73 = lshr i32 %39, 4
%74 = or i32 %72, %73
%75 = shl nuw nsw i32 %46, 2
%76 = lshr i32 %37, 1
%77 = and i32 %76, 3
%78 = shl nuw nsw i32 %53, 1
%79 = lshr i32 %44, 4
%80 = and i32 %79, 1
%81 = shl nuw nsw i32 %51, 2
%82 = and i32 %81, 252
%83 = lshr i32 %51, 4
%84 = and i32 %83, 3
%85 = sub nsw i32 %69, %58
%86 = add nsw i32 %85, %67
%87 = sub nsw i32 %77, %58
%88 = add nsw i32 %87, %75
%89 = shl nuw nsw i32 %58, 2
%90 = or i32 %89, 2
%91 = sub nsw i32 %71, %63
%92 = sub nsw i32 %80, %63
%93 = add nsw i32 %92, %78
%94 = shl nuw nsw i32 %63, 2
%95 = or i32 %94, 2
%96 = sub nsw i32 %74, %66
%97 = sub nsw i32 %84, %66
%98 = add i32 %97, %82
%99 = shl nuw nsw i32 %66, 2
%100 = or i32 %99, 2
%101 = zext i32 %86 to i64
%102 = zext i32 %88 to i64
%103 = zext i32 %90 to i64
%104 = zext i32 %93 to i64
%105 = zext i32 %95 to i64
%106 = zext i32 %98 to i64
%107 = zext i32 %100 to i64
%108 = shl nuw nsw i64 %101, 1
%109 = shl nsw i32 %91, 1
%110 = shl nsw i32 %96, 1
%111 = mul nuw nsw i64 %101, 3
%112 = mul nsw i32 %91, 3
%113 = mul nsw i32 %96, 3
br label %114
114: ; preds = %2, %114
%115 = phi i64 [ 0, %2 ], [ %182, %114 ]
%116 = trunc i64 %115 to i32
%117 = mul i64 %115, %102
%118 = add i64 %117, %103
%119 = mul i64 %115, %104
%120 = mul nsw i32 %93, %116
%121 = add i64 %119, %105
%122 = add nsw i32 %95, %120
%123 = mul i64 %115, %106
%124 = mul nsw i32 %98, %116
%125 = add i64 %123, %107
%126 = add nsw i32 %100, %124
%127 = shl nsw i64 %115, 2
%128 = trunc i64 %118 to i32
%129 = ashr i32 %128, 2
%130 = tail call i32 @clamp(i32 %129)
%131 = trunc i64 %121 to i32
%132 = ashr i32 %131, 2
%133 = tail call i32 @clamp(i32 %132)
%134 = trunc i64 %125 to i32
%135 = ashr i32 %134, 2
%136 = tail call i32 @clamp(i32 %135)
%137 = tail call i32 @pack_rgb_alpha_0xff(i32 %130, i32 %133, i32 %136)
%138 = getelementptr inbounds i32, i32* %1, i64 %127
store i32 %137, i32* %138
%139 = trunc i64 %118 to i32
%140 = add i32 %86, %139
%141 = ashr i32 %140, 2
%142 = tail call i32 @clamp(i32 %141)
%143 = add nsw i32 %122, %91
%144 = ashr i32 %143, 2
%145 = tail call i32 @clamp(i32 %144)
%146 = add nsw i32 %126, %96
%147 = ashr i32 %146, 2
%148 = tail call i32 @clamp(i32 %147)
%149 = tail call i32 @pack_rgb_alpha_0xff(i32 %142, i32 %145, i32 %148)
%150 = or i64 %127, 1
%151 = getelementptr inbounds i32, i32* %1, i64 %150
store i32 %149, i32* %151
%152 = add i64 %118, %108
%153 = trunc i64 %152 to i32
%154 = ashr i32 %153, 2
%155 = tail call i32 @clamp(i32 %154)
%156 = trunc i64 %121 to i32
%157 = add i32 %109, %156
%158 = ashr i32 %157, 2
%159 = tail call i32 @clamp(i32 %158)
%160 = trunc i64 %125 to i32
%161 = add i32 %110, %160
%162 = ashr i32 %161, 2
%163 = tail call i32 @clamp(i32 %162)
%164 = tail call i32 @pack_rgb_alpha_0xff(i32 %155, i32 %159, i32 %163)
%165 = or i64 %127, 2
%166 = getelementptr inbounds i32, i32* %1, i64 %165
store i32 %164, i32* %166
%167 = add i64 %118, %111
%168 = trunc i64 %167 to i32
%169 = ashr i32 %168, 2
%170 = tail call i32 @clamp(i32 %169)
%171 = trunc i64 %121 to i32
%172 = add i32 %112, %171
%173 = ashr i32 %172, 2
%174 = tail call i32 @clamp(i32 %173)
%175 = trunc i64 %125 to i32
%176 = add i32 %113, %175
%177 = ashr i32 %176, 2
%178 = tail call i32 @clamp(i32 %177)
%179 = tail call i32 @pack_rgb_alpha_0xff(i32 %170, i32 %174, i32 %178)
%180 = or i64 %127, 3
%181 = getelementptr inbounds i32, i32* %1, i64 %180
store i32 %179, i32* %181
%182 = add nuw nsw i64 %115, 1
%183 = icmp eq i64 %182, 4
br i1 %183, label %184, label %114
184: ; preds = %114
ret void
}