xunge/DecIR huggingface dataset:
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  int i = 0;
  if (i == 0) {
    printf("True\n");
  }
  if (i == 0)
    printf("True\n");
  if (i == 0)
    printf("True\n");
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1143 <main+0x33>
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x0,-0x14(%rbp)
jne    1159 <main+0x49>
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x0,-0x14(%rbp)
jne    116f <main+0x5f>
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e6a(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"True\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = load i32, i32* %6
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %11
%17 = load i32, i32* %6
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %16
%20 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %21
21: ; preds = %19, %16
%22 = load i32, i32* @EXIT_SUCCESS
ret i32 %22
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str.2 = [5 x i8] c"True\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str.2, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str.2, i64 0, i64 0))
%6 = load i32, i32* @EXIT_SUCCESS
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ write_imm(int);
int /*<<< orphan*/ write_instr(int);
int cpslck_handler(char **save) {
  write_instr(0x00);
  write_imm(0x39);
  write_instr(0x28);
  return 0;
}


x86 assembly (clang, -O0):
<cpslck_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x39,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpslck_handler>:
push   %rax
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x39,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cpslck_handler(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @write_instr(i32 0)
%4 = call i32 @write_imm(i32 57)
%5 = call i32 @write_instr(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @cpslck_handler(i8** nocapture readnone %0) {
%2 = tail call i32 @write_instr(i32 0)
%3 = tail call i32 @write_imm(i32 57)
%4 = tail call i32 @write_instr(i32 40)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void error1(char *mess1, char *mess2) { exit(1); }


x86 assembly (clang, -O0):
<error1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<error1>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @error1(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @error1(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int);
void int_const(const char *name, int value) {
  printf("   %s: constant integer := %d;\n", name, value);
}


x86 assembly (clang, -O0):
<int_const>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_const>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [32 x i8] c" %s: constant integer := %d;\0A\00"
define void @int_const(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c" %s: constant integer := %d;\0A\00"
define void @int_const(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
/* Type definitions */
struct cpufreq_policy {
  int dummy;
};

/* Variables and functions */
struct cpufreq_policy *sysfs_get_policy(unsigned int);
struct cpufreq_policy *cpufreq_get_policy(unsigned int cpu) {
  return sysfs_get_policy(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_policy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfs_get_policy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_policy>:
jmp    1030 <sysfs_get_policy@plt>

LLVM IR (-O0):
%struct.cpufreq_policy = type { i32 }
define %struct.cpufreq_policy* @cpufreq_get_policy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_policy* @sysfs_get_policy(i32 %3)
ret %struct.cpufreq_policy* %4
}

LLVM IR (-O2):
%struct.cpufreq_policy = type { i32 }
define %struct.cpufreq_policy* @cpufreq_get_policy(i32 %0) {
%2 = tail call %struct.cpufreq_policy* @sysfs_get_policy(i32 %0)
ret %struct.cpufreq_policy* %2
}
/* Variables and functions */
int /*<<< orphan*/ do_uninit_read_with_intermediate_frames(int, int *);
void uninit_test6(int *val_p) {
  do_uninit_read_with_intermediate_frames(5, val_p);
}


x86 assembly (clang, -O0):
<uninit_test6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x5,%edi
call   1030 <do_uninit_read_with_intermediate_frames@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninit_test6>:
mov    %rdi,%rsi
mov    $0x5,%edi
jmp    1030 <do_uninit_read_with_intermediate_frames@plt>

LLVM IR (-O0):
define void @uninit_test6(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @do_uninit_read_with_intermediate_frames(i32 5, i32* %3)
ret void
}

LLVM IR (-O2):
define void @uninit_test6(i32* %0) {
%2 = tail call i32 @do_uninit_read_with_intermediate_frames(i32 5, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isMagic(int **, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  while (n < 0 && n > 999)
    scanf("%d", &n);
  int square[999][999];
  isMagic(square, n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x3ce9e0,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xec7(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x3ce9d1(%rbp)
jge    1164 <main+0x44>
cmpl   $0x3e7,-0x8(%rbp)
setg   %al
mov    %al,-0x3ce9d1(%rbp)
mov    -0x3ce9d1(%rbp),%al
test   $0x1,%al
jne    1177 <main+0x57>
jmp    118c <main+0x6c>
lea    0xe82(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
jmp    1142 <main+0x22>
lea    -0x3ce9d0(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1030 <isMagic@plt>
xor    %eax,%eax
add    $0x3ce9e0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x3ce9d8,%rsp
lea    0xed2(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
lea    0x10(%rsp),%rdi
call   1030 <isMagic@plt>
xor    %eax,%eax
add    $0x3ce9d8,%rsp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [999 x [999 x i32]]
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
br label %5
5: ; preds = %13, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 999
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
br i1 %12, label %13, label %15
13: ; preds = %11
%14 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
br label %5
15: ; preds = %11
%16 = getelementptr inbounds [999 x [999 x i32]], [999 x [999 x i32]]* %3, i64 0, i64 0
%17 = bitcast [999 x i32]* %16 to i32**
%18 = load i32, i32* %2
%19 = call i32 @isMagic(i32** %17, i32 %18)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [999 x [999 x i32]]
%3 = bitcast i32* %1 to i8*
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%5 = bitcast [999 x [999 x i32]]* %2 to i8*
%6 = bitcast [999 x [999 x i32]]* %2 to i32**
%7 = load i32, i32* %1
%8 = call i32 @isMagic(i32** %6, i32 %7)
ret i32 0
}
int allselected(int *selected) {
  int i;
  for (i = 0; i < 7; i++)
    if (selected[i] == 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<allselected>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x7,-0x14(%rbp)
jge    114a <allselected+0x4a>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jne    1137 <allselected+0x37>
movl   $0x0,-0x4(%rbp)
jmp    1151 <allselected+0x51>
jmp    113c <allselected+0x3c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <allselected+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<allselected>:
xor    %eax,%eax
cmpl   $0x0,(%rdi)
je     112e <allselected+0x2e>
cmpl   $0x0,0x4(%rdi)
je     112e <allselected+0x2e>
cmpl   $0x0,0x8(%rdi)
je     112e <allselected+0x2e>
cmpl   $0x0,0xc(%rdi)
je     112e <allselected+0x2e>
cmpl   $0x0,0x10(%rdi)
je     112e <allselected+0x2e>
cmpl   $0x0,0x14(%rdi)
je     112e <allselected+0x2e>
xor    %eax,%eax
cmpl   $0x0,0x18(%rdi)
setne  %al
ret

LLVM IR (-O0):
define i32 @allselected(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 0, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 7
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
%13 = load i32, i32* %12
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %8
store i32 0, i32* %2
br label %21
16: ; preds = %8
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @allselected(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 0
br i1 %3, label %29, label %4
4: ; preds = %1
%5 = getelementptr inbounds i32, i32* %0, i64 1
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %29, label %8
8: ; preds = %4
%9 = getelementptr inbounds i32, i32* %0, i64 2
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %29, label %12
12: ; preds = %8
%13 = getelementptr inbounds i32, i32* %0, i64 3
%14 = load i32, i32* %13
%15 = icmp eq i32 %14, 0
br i1 %15, label %29, label %16
16: ; preds = %12
%17 = getelementptr inbounds i32, i32* %0, i64 4
%18 = load i32, i32* %17
%19 = icmp eq i32 %18, 0
br i1 %19, label %29, label %20
20: ; preds = %16
%21 = getelementptr inbounds i32, i32* %0, i64 5
%22 = load i32, i32* %21
%23 = icmp eq i32 %22, 0
br i1 %23, label %29, label %24
24: ; preds = %20
%25 = getelementptr inbounds i32, i32* %0, i64 6
%26 = load i32, i32* %25
%27 = icmp ne i32 %26, 0
%28 = zext i1 %27 to i32
br label %29
29: ; preds = %24, %20, %16, %12, %8, %4, %1
%30 = phi i32 [ 0, %1 ], [ 0, %4 ], [ 0, %8 ], [ 0, %12 ], [ 0, %16 ], [ 0, %20 ], [ %28, %24 ]
ret i32 %30
}
int Int_bit_MINUS_and(int x, int y) { return x & y; }


x86 assembly (clang, -O0):
<Int_bit_MINUS_and>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Int_bit_MINUS_and>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @Int_bit_MINUS_and(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @Int_bit_MINUS_and(i32 %0, i32 %1) {
%3 = and i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int epoll_create(int);
int main(void) { return epoll_create(10); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <epoll_create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%edi
jmp    1030 <epoll_create@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @epoll_create(i32 10)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @epoll_create(i32 10)
ret i32 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t dns_clip_ttl(uint32_t ttl) {
  if (ttl < 60)
    return 60;
  else if (ttl > (3 * 60 * 60))
    return (3 * 60 * 60);
  else
    return ttl;
}


x86 assembly (clang, -O0):
<dns_clip_ttl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x3c,-0x8(%rbp)
jge    111d <dns_clip_ttl+0x1d>
movl   $0x3c,-0x4(%rbp)
jmp    113c <dns_clip_ttl+0x3c>
cmpl   $0x2a30,-0x8(%rbp)
jle    1136 <dns_clip_ttl+0x36>
movl   $0x2a30,-0x4(%rbp)
jmp    113c <dns_clip_ttl+0x3c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_clip_ttl>:
cmp    $0x2a30,%edi
mov    $0x2a30,%ecx
cmovl  %edi,%ecx
cmp    $0x3d,%ecx
mov    $0x3c,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @dns_clip_ttl(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 60
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 60, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 10800
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 10800, i32* %2
br label %13
11: ; preds = %7
%12 = load i32, i32* %3
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %10, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @dns_clip_ttl(i32 %0) {
%2 = icmp slt i32 %0, 10800
%3 = select i1 %2, i32 %0, i32 10800
%4 = icmp sgt i32 %3, 60
%5 = select i1 %4, i32 %3, i32 60
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ cprintf(char *, unsigned int const);
void secure_swi(const unsigned int nIRQ) {
  cprintf("secure world SWI %d\n", nIRQ);
}


x86 assembly (clang, -O0):
<secure_swi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <cprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<secure_swi>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <cprintf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"secure world SWI %d\0A\00"
define void @secure_swi(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cprintf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"secure world SWI %d\0A\00"
define void @secure_swi(i32 %0) {
%2 = tail call i32 @cprintf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
int /*<<< orphan*/ usleep(int);
void ti_wsleep(unsigned int millisec) {
  if (millisec == 0)
    sched_yield();
  else
    usleep(1);
}


x86 assembly (clang, -O0):
<ti_wsleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1141 <ti_wsleep+0x21>
mov    $0x0,%al
call   1030 <sched_yield@plt>
jmp    114b <ti_wsleep+0x2b>
mov    $0x1,%edi
call   1040 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_wsleep>:
test   %edi,%edi
je     112e <ti_wsleep+0xe>
mov    $0x1,%edi
jmp    1040 <usleep@plt>
xor    %eax,%eax
jmp    1030 <sched_yield@plt>

LLVM IR (-O0):
define void @ti_wsleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @sched_yield()
br label %9
7: ; preds = %1
%8 = call i32 @usleep(i32 1)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @ti_wsleep(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @sched_yield()
br label %7
5: ; preds = %1
%6 = tail call i32 @usleep(i32 1)
br label %7
7: ; preds = %5, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_movehl_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_movehl_ps(__m128 A, __m128 B) { return _mm_movehl_ps(A, B); }


x86 assembly (clang, -O0):
<test_mm_movehl_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_movehl_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_movehl_ps>:
jmp    1030 <_mm_movehl_ps@plt>

LLVM IR (-O0):
define i32 @test_mm_movehl_ps(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_movehl_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_movehl_ps(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_movehl_ps(i32 %0, i32 %1)
ret i32 %3
}
int do_855() { return 855; }


x86 assembly (clang, -O0):
<do_855>:
push   %rbp
mov    %rsp,%rbp
mov    $0x357,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_855>:
mov    $0x357,%eax
ret

LLVM IR (-O0):
define i32 @do_855() {
ret i32 855
}

LLVM IR (-O2):
define i32 @do_855() {
ret i32 855
}
int cmp_elms(void *a, void *b) { return b - a; }


x86 assembly (clang, -O0):
<cmp_elms>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_elms>:
mov    %rsi,%rax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cmp_elms(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %5 to i64
%8 = ptrtoint i8* %6 to i64
%9 = sub i64 %7, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @cmp_elms(i8* %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = ptrtoint i8* %0 to i64
%5 = sub i64 %3, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Variables and functions */
int gcd(int, int);
int lcm(int first, int second) { return first / gcd(first, second) * second; }


x86 assembly (clang, -O0):
<lcm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <gcd@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
imul   -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcm>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <gcd@plt>
mov    %eax,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
imul   %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @lcm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @gcd(i32 %6, i32 %7)
%9 = sdiv i32 %5, %8
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @lcm(i32 %0, i32 %1) {
%3 = tail call i32 @gcd(i32 %0, i32 %1)
%4 = sdiv i32 %0, %3
%5 = mul nsw i32 %4, %1
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ swap(int /*<<< orphan*/);
uint32_t trace_read_int(FILE *f) {
  uint32_t sw;
  fread(&sw, 4, 1, f);
  return swap(sw);
}


x86 assembly (clang, -O0):
<trace_read_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    -0xc(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
mov    -0xc(%rbp),%edi
call   1040 <swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_read_int>:
push   %rax
mov    %rdi,%rcx
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
mov    0x4(%rsp),%edi
pop    %rax
jmp    1040 <swap@plt>

LLVM IR (-O0):
define i32 @trace_read_int(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fread(i32* %3, i32 4, i32 1, i32* %4)
%6 = load i32, i32* %3
%7 = call i32 @swap(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @trace_read_int(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fread(i32* %2, i32 4, i32 1, i32* %0)
%5 = load i32, i32* %2
%6 = tail call i32 @swap(i32 %5)
ret i32 %6
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_clear_multprec_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(457, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_clear_multprec_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1c9,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_clear_multprec_solutions>:
mov    $0x1c9,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @solcon_clear_multprec_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 457, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_clear_multprec_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 457, i32* undef, i32* undef, double* undef)
ret i32 %1
}
int random_generate(unsigned int seed_ext, unsigned char *buf, unsigned len) {
  return -1;
}


x86 assembly (clang, -O0):
<random_generate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_generate>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @random_generate(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @random_generate(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ CRYPTO_free_ex_index(int /*<<< orphan*/, int);
int /*<<< orphan*/ ERR_get_state();
int /*<<< orphan*/ OPENSSL_INIT_LOAD_CRYPTO_STRINGS;
int /*<<< orphan*/ OPENSSL_init_crypto(int /*<<< orphan*/,
                                       int /*<<< orphan*/ *);
int FuzzerInitialize(int *argc, char ***argv) {
  OPENSSL_init_crypto(OPENSSL_INIT_LOAD_CRYPTO_STRINGS, NULL);
  ERR_get_state();
  CRYPTO_free_ex_index(0, -1);
  return 1;
}


x86 assembly (clang, -O0):
<FuzzerInitialize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <OPENSSL_init_crypto@plt>
mov    $0x0,%al
call   1030 <ERR_get_state@plt>
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1050 <CRYPTO_free_ex_index@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FuzzerInitialize>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
call   1040 <OPENSSL_init_crypto@plt>
xor    %eax,%eax
call   1030 <ERR_get_state@plt>
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1050 <CRYPTO_free_ex_index@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@OPENSSL_INIT_LOAD_CRYPTO_STRINGS = global i32 0
define i32 @FuzzerInitialize(i32* %0, i8*** %1) {
%3 = alloca i32*
%4 = alloca i8***
store i32* %0, i32** %3
store i8*** %1, i8**** %4
%5 = load i32, i32* @OPENSSL_INIT_LOAD_CRYPTO_STRINGS
%6 = call i32 @OPENSSL_init_crypto(i32 %5, i32* null)
%7 = call i32 (...) @ERR_get_state()
%8 = call i32 @CRYPTO_free_ex_index(i32 0, i32 -1)
ret i32 1
}

LLVM IR (-O2):
@OPENSSL_INIT_LOAD_CRYPTO_STRINGS = global i32 0
define i32 @FuzzerInitialize(i32* nocapture readnone %0, i8*** nocapture readnone %1) {
%3 = load i32, i32* @OPENSSL_INIT_LOAD_CRYPTO_STRINGS
%4 = tail call i32 @OPENSSL_init_crypto(i32 %3, i32* null)
%5 = tail call i32 (...) @ERR_get_state()
%6 = tail call i32 @CRYPTO_free_ex_index(i32 0, i32 -1)
ret i32 1
}
int main() {
  int sum = 0;
  while (sum) {
    sum++;
  }
  return sum;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int cc_fips_init(struct cc_drvdata *p_drvdata) { return 0; }


x86 assembly (clang, -O0):
<cc_fips_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_fips_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cc_drvdata = type opaque
define i32 @cc_fips_init(%struct.cc_drvdata* %0) {
%2 = alloca %struct.cc_drvdata*
store %struct.cc_drvdata* %0, %struct.cc_drvdata** %2
ret i32 0
}

LLVM IR (-O2):
%struct.cc_drvdata = type opaque
define i32 @cc_fips_init(%struct.cc_drvdata* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, ...);
int main(void) {
  printf("%x %X %#x\n", 31, 31, 31);
  printf("**%d**% d**% d**\n", 42, 42, -42);
  printf("**%5d**%5.3d**%05d**%05.3d**\n", 6, 6, 6, 6);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x1f,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
mov    $0x2a,%edx
mov    $0xffffffd6,%ecx
mov    %edx,%esi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec6(%rip),%rdi
mov    $0x6,%r8d
mov    %r8d,%esi
mov    %r8d,%edx
mov    %r8d,%ecx
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1f,%esi
mov    $0x1f,%edx
mov    $0x1f,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed6(%rip),%rdi
mov    $0x2a,%esi
mov    $0x2a,%edx
mov    $0xffffffd6,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xecb(%rip),%rdi
mov    $0x6,%esi
mov    $0x6,%edx
mov    $0x6,%ecx
mov    $0x6,%r8d
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%x %X %#x\0A\00"
@.str.1 = [18 x i8] c"**%d**% d**% d**\0A\00"
@.str.2 = [30 x i8] c"**%5d**%5.3d**%05d**%05.3d**\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, i32, i32, i32, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 31, i32 31, i32 31)
%3 = call i32 (i8*, i32, i32, i32, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 42, i32 42, i32 -42)
%4 = call i32 (i8*, i32, i32, i32, ...) @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.2, i64 0, i64 0), i32 6, i32 6, i32 6, i32 6)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"%x %X %#x\0A\00"
@.str.1 = [18 x i8] c"**%d**% d**% d**\0A\00"
@.str.2 = [30 x i8] c"**%5d**%5.3d**%05d**%05.3d**\0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, i32, i32, i32, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 31, i32 31, i32 31)
%2 = tail call i32 (i8*, i32, i32, i32, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 42, i32 42, i32 -42)
%3 = tail call i32 (i8*, i32, i32, i32, ...) @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.2, i64 0, i64 0), i32 6, i32 6, i32 6, i32 6)
ret i32 0
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_add_signal(void *e, void **s, int sig, void *callback,
                    void *userdata) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_add_signal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
mov    0x2ec0(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_add_signal>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_add_signal(i8* %0, i8** %1, i32 %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i8** %1, i8*** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i32, i32* @EINVAL
%12 = sub nsw i32 0, %11
ret i32 %12
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_add_signal(i8* nocapture readnone %0, i8** nocapture readnone %1, i32 %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
%6 = load i32, i32* @EINVAL
%7 = sub nsw i32 0, %6
ret i32 %7
}
int fn11(a)
char a[];
{ return sizeof a; }


x86 assembly (clang, -O0):
<fn11>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn11>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @fn11(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 8
}

LLVM IR (-O2):
define i32 @fn11(i8* nocapture readnone %0) {
ret i32 8
}
unsigned short int f94(unsigned short int x, long int y) {
  return (x << (8 * sizeof(unsigned short) - y)) + (x >> y);
}


x86 assembly (clang, -O0):
<f94>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
mov    $0x10,%ecx
sub    -0x10(%rbp),%rcx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    -0x10(%rbp),%rcx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f94>:
mov    $0x10,%cl
sub    %sil,%cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f94(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 16, %7
%9 = trunc i64 %8 to i32
%10 = shl i32 %6, %9
%11 = load i16, i16* %3
%12 = zext i16 %11 to i32
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = ashr i32 %12, %14
%16 = add nsw i32 %10, %15
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define zeroext i16 @f94(i16 zeroext %0, i64 %1) {
%3 = zext i16 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 16, %4
%6 = shl i32 %3, %5
%7 = lshr i32 %3, %4
%8 = add nsw i32 %6, %7
%9 = trunc i32 %8 to i16
ret i16 %9
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
void regwrite16(uint16_t addr, uint16_t data) {
  *(volatile uint16_t *)addr = data;
}


x86 assembly (clang, -O0):
<regwrite16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<regwrite16>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @regwrite16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}

LLVM IR (-O2):
define void @regwrite16(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void batadc_reset() {
  mbus_remote_register_write(0x7, 0x3B,
                             ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
                              (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
                              (1 << 8) | (1 << 9) | (1 << 10) | (0 << 11) |
                              (0 << 12) | (1 << 13) | (1 << 14) | (1 << 15) |
                              (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19)));
  delay(100);
}


x86 assembly (clang, -O0):
<batadc_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
mov    $0x3b,%esi
mov    $0xfe7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<batadc_reset>:
push   %rax
mov    $0x7,%edi
mov    $0x3b,%esi
mov    $0xfe7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @batadc_reset() {
%1 = call i32 @mbus_remote_register_write(i32 7, i32 59, i32 1042431)
%2 = call i32 @delay(i32 100)
ret void
}

LLVM IR (-O2):
define void @batadc_reset() {
%1 = tail call i32 @mbus_remote_register_write(i32 7, i32 59, i32 1042431)
%2 = tail call i32 @delay(i32 100)
ret void
}
int is_stackable(const int symbology) {
  if (symbology < 55) {
    return 1;
  }
  switch (symbology) {
  case 60:
  case 69:
  case 72:
  case 75:
  case 77:
  case 86:
  case 87:
  case 89:
  case 129:
  case 74:
  case 110:
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_stackable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x37,-0x8(%rbp)
jge    111d <is_stackable+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1159 <is_stackable+0x59>
mov    -0x8(%rbp),%eax
add    $0xffffffc4,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x45,%eax
ja     1152 <is_stackable+0x52>
mov    -0x10(%rbp),%rax
lea    0xec3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1159 <is_stackable+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_stackable>:
mov    $0x1,%eax
cmp    $0x37,%edi
jl     1122 <is_stackable+0x22>
add    $0xffffffc4,%edi
cmp    $0x45,%edi
ja     1123 <is_stackable+0x23>
lea    0xee7(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_stackable(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 55
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %11
7: ; preds = %1
%8 = load i32, i32* %3
switch i32 %8, label %10 [
i32 60, label %9
i32 69, label %9
i32 72, label %9
i32 75, label %9
i32 77, label %9
i32 86, label %9
i32 87, label %9
i32 89, label %9
i32 129, label %9
i32 74, label %9
i32 110, label %9
]
9: ; preds = %7, %7, %7, %7, %7, %7, %7, %7, %7, %7, %7
store i32 1, i32* %2
br label %11
10: ; preds = %7
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_stackable(i32 %0) {
%2 = icmp slt i32 %0, 55
br i1 %2, label %5, label %3
3: ; preds = %1
switch i32 %0, label %4 [
i32 60, label %5
i32 69, label %5
i32 72, label %5
i32 75, label %5
i32 77, label %5
i32 86, label %5
i32 87, label %5
i32 89, label %5
i32 129, label %5
i32 74, label %5
i32 110, label %5
]
4: ; preds = %3
br label %5
5: ; preds = %3, %3, %3, %3, %3, %3, %3, %3, %3, %3, %3, %1, %4
%6 = phi i32 [ 0, %4 ], [ 1, %1 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ], [ 1, %3 ]
ret i32 %6
}
void nseel_asm_assign(void) {
  __asm__("movl (%eax), %ecx\n"
          "movl %ecx, (%edi)\n");
}


x86 assembly (clang, -O0):
<nseel_asm_assign>:
push   %rbp
mov    %rsp,%rbp
mov    (%eax),%ecx
mov    %ecx,(%edi)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_assign>:
mov    (%eax),%ecx
mov    %ecx,(%edi)
ret

LLVM IR (-O0):
define void @nseel_asm_assign() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_assign() {
tail call void asm sideeffect "movl (%eax), %ecx\0Amovl %ecx, (%edi)\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int fun_1();
int main() { return fun_1() + 8; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <fun_1@plt>
add    $0x8,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <fun_1@plt>
add    $0x8,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fun_1()
%3 = add nsw i32 %2, 8
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fun_1()
%2 = add nsw i32 %1, 8
ret i32 %2
}
void test18(int b) {
  test18_a(b, b);
  test18_a();
  test18_b();
  test18_c(b);
  test18_c(b, b, b);
  test18_d();
  test18_e();
}


x86 assembly (clang, -O0):
<test18>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    $0x0,%al
call   1060 <test18_a@plt>
mov    $0x0,%al
call   1060 <test18_a@plt>
mov    $0x0,%al
call   1030 <test18_b@plt>
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1050 <test18_c@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%edx
mov    $0x0,%al
call   1050 <test18_c@plt>
mov    $0x0,%al
call   1070 <test18_d@plt>
mov    $0x0,%al
call   1040 <test18_e@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test18>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%esi
xor    %eax,%eax
call   1060 <test18_a@plt>
xor    %eax,%eax
call   1060 <test18_a@plt>
xor    %eax,%eax
call   1030 <test18_b@plt>
mov    %ebx,%edi
xor    %eax,%eax
call   1050 <test18_c@plt>
mov    %ebx,%edi
mov    %ebx,%esi
mov    %ebx,%edx
xor    %eax,%eax
call   1050 <test18_c@plt>
xor    %eax,%eax
call   1070 <test18_d@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <test18_e@plt>

LLVM IR (-O0):
define void @test18(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @test18_a to i32 (i32, i32, ...)*)(i32 %3, i32 %4)
%6 = call i32 (...) @test18_a()
%7 = call i32 (...) @test18_b()
%8 = load i32, i32* %2
%9 = call i32 (i32, ...) bitcast (i32 (...)* @test18_c to i32 (i32, ...)*)(i32 %8)
%10 = load i32, i32* %2
%11 = load i32, i32* %2
%12 = load i32, i32* %2
%13 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @test18_c to i32 (i32, i32, i32, ...)*)(i32 %10, i32 %11, i32 %12)
%14 = call i32 (...) @test18_d()
%15 = call i32 (...) @test18_e()
ret void
}

LLVM IR (-O2):
define void @test18(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @test18_a to i32 (i32, i32, ...)*)(i32 %0, i32 %0)
%3 = tail call i32 (...) @test18_a()
%4 = tail call i32 (...) @test18_b()
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @test18_c to i32 (i32, ...)*)(i32 %0)
%6 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @test18_c to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %0, i32 %0)
%7 = tail call i32 (...) @test18_d()
%8 = tail call i32 (...) @test18_e()
ret void
}
/* Variables and functions */
long double powl(long double, long double);
long double h(long double x) { return 1.0L / (powl(x, 2.0L) + 1.0L); }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
flds   0xed6(%rip)
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <powl@plt>
fld1
fadd   %st,%st(1)
fdivp  %st,%st(1)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
fldt   0x8(%rsp)
fmul   %st,%st(0)
fld1
fadd   %st,%st(1)
fdivp  %st,%st(1)
ret

LLVM IR (-O0):
define x86_fp80 @h(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @powl(x86_fp80 %3, x86_fp80 0xK40008000000000000000)
%5 = fadd x86_fp80 %4, 0xK3FFF8000000000000000
%6 = fdiv x86_fp80 0xK3FFF8000000000000000, %5
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @h(x86_fp80 %0) {
%2 = fmul x86_fp80 %0, %0
%3 = fadd x86_fp80 %2, 0xK3FFF8000000000000000
%4 = fdiv x86_fp80 0xK3FFF8000000000000000, %3
ret x86_fp80 %4
}
int getAll() { return 100; }


x86 assembly (clang, -O0):
<getAll>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getAll>:
mov    $0x64,%eax
ret

LLVM IR (-O0):
define i32 @getAll() {
ret i32 100
}

LLVM IR (-O2):
define i32 @getAll() {
ret i32 100
}
void next_GENState(_loc, _Base_GENState, _loc_0, _Base_GENState_0) int *_loc,
    *_Base_GENState, _loc_0, _Base_GENState_0;
{ GENState_NEXT_FNC_OBJ(_loc, _Base_GENState, _loc_0, _Base_GENState_0); }


x86 assembly (clang, -O0):
<next_GENState>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    $0x0,%al
call   1030 <GENState_NEXT_FNC_OBJ@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_GENState>:
xor    %eax,%eax
jmp    1030 <GENState_NEXT_FNC_OBJ@plt>

LLVM IR (-O0):
define void @next_GENState(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @GENState_NEXT_FNC_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %9, i32* %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @next_GENState(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @GENState_NEXT_FNC_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %0, i32* %1, i32 %2, i32 %3)
ret void
}
void clear_string_my(char *string) {
  int i = 0;
  for (i = 0; i < 100; i++) {
    *string++ = 0;
  }
}


x86 assembly (clang, -O0):
<clear_string_my>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
jge    1140 <clear_string_my+0x40>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x0,(%rax)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <clear_string_my+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_string_my>:
xorps  %xmm0,%xmm0
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
movl   $0x0,0x60(%rdi)
ret

LLVM IR (-O0):
define void @clear_string_my(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
store i8 0, i8* %8
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @clear_string_my(i8* nocapture writeonly %0) {
ret void
}
/* Variables and functions */
char *strchr(char const *, char);
int /*<<< orphan*/ strstr(char const *, char *);
int has_dotdot_after_at(const char *string) {
  string = strchr(string, '@');
  if (!string)
    return 0;
  string++;
  return !!strstr(string, "..");
}


x86 assembly (clang, -O0):
<has_dotdot_after_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x40,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1155 <has_dotdot_after_at+0x35>
movl   $0x0,-0x4(%rbp)
jmp    1183 <has_dotdot_after_at+0x63>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xe94(%rip),%rsi
call   1040 <strstr@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_dotdot_after_at>:
push   %rax
mov    $0x40,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     114e <has_dotdot_after_at+0x2e>
add    $0x1,%rax
lea    0xec5(%rip),%rsi
mov    %rax,%rdi
call   1040 <strstr@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"..\00"
define i32 @has_dotdot_after_at(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i8* @strchr(i8* %4, i8 signext 64)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 0, i32* %2
br label %18
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = call i32 @strstr(i8* %12, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%14 = icmp ne i32 %13, 0
%15 = xor i1 %14, true
%16 = xor i1 %15, true
%17 = zext i1 %16 to i32
store i32 %17, i32* %2
br label %18
18: ; preds = %9, %8
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
@.str = [3 x i8] c"..\00"
define i32 @has_dotdot_after_at(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 64)
%3 = icmp eq i8* %2, null
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %2, i64 1
%6 = tail call i32 @strstr(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %1, %4
%10 = phi i32 [ %8, %4 ], [ 0, %1 ]
ret i32 %10
}
void none_feed(void *buf, int bytes) {}


x86 assembly (clang, -O0):
<none_feed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<none_feed>:
ret

LLVM IR (-O0):
define void @none_feed(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @none_feed(i8* nocapture %0, i32 %1) {
ret void
}