xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned char msg_send(int, unsigned char *, int);
unsigned char ANT_OpenRxScanMode(unsigned char chan) {
  return msg_send(0x5b, &chan, 1);
}


x86 assembly (clang, -O0):
<ANT_OpenRxScanMode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x5b,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <msg_send@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANT_OpenRxScanMode>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x5b,%edi
mov    $0x1,%edx
call   1030 <msg_send@plt>
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @ANT_OpenRxScanMode(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call zeroext i8 @msg_send(i32 91, i8* %2, i32 1)
ret i8 %3
}

LLVM IR (-O2):
define zeroext i8 @ANT_OpenRxScanMode(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call zeroext i8 @msg_send(i32 91, i8* %2, i32 1)
ret i8 %3
}
int bytes_needed(long n) {
  if (n <= 0x100l)
    return (1);
  if (n <= 0x10000l)
    return (2);
  if (n <= 0x1000000l)
    return (3);
  return (4);
}


x86 assembly (clang, -O0):
<bytes_needed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x100,-0x10(%rbp)
jg     1122 <bytes_needed+0x22>
movl   $0x1,-0x4(%rbp)
jmp    115d <bytes_needed+0x5d>
cmpq   $0x10000,-0x10(%rbp)
jg     113c <bytes_needed+0x3c>
movl   $0x2,-0x4(%rbp)
jmp    115d <bytes_needed+0x5d>
cmpq   $0x1000000,-0x10(%rbp)
01
jg     1156 <bytes_needed+0x56>
movl   $0x3,-0x4(%rbp)
jmp    115d <bytes_needed+0x5d>
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytes_needed>:
mov    $0x1,%eax
cmp    $0x101,%rdi
jl     112b <bytes_needed+0x2b>
mov    $0x2,%eax
cmp    $0x10001,%rdi
jb     112b <bytes_needed+0x2b>
cmp    $0x1000001,%rdi
mov    $0x4,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @bytes_needed(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp sle i64 %4, 256
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %16
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp sle i64 %8, 65536
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 2, i32* %2
br label %16
11: ; preds = %7
%12 = load i64, i64* %3
%13 = icmp sle i64 %12, 16777216
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 3, i32* %2
br label %16
15: ; preds = %11
store i32 4, i32* %2
br label %16
16: ; preds = %15, %14, %10, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @bytes_needed(i64 %0) {
%2 = icmp slt i64 %0, 257
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 65537
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i64 %0, 16777217
%7 = select i1 %6, i32 3, i32 4
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 1, %1 ], [ 2, %3 ], [ %7, %5 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void WatchdogResetEnable(unsigned long ulBase) {
  DEBUG_ASSERT((ulBase == 0x40000000) || (ulBase == 0x40001000));
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<WatchdogResetEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x40000000,-0x8(%rbp)
40
mov    %al,-0x9(%rbp)
je     113d <WatchdogResetEnable+0x2d>
cmpq   $0x40001000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x2,%rcx
mov    %rcx,0x8(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogResetEnable>:
push   %rbx
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40000000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
orq    $0x2,0x8(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @WatchdogResetEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 1073741824
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 1073745920
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @DEBUG_ASSERT(i32 %10)
%12 = load i64, i64* %2
%13 = add i64 %12, 8
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = or i64 %15, 2
store volatile i64 %16, i64* %14
ret void
}

LLVM IR (-O2):
define void @WatchdogResetEnable(i64 %0) {
%2 = and i64 %0, -4097
%3 = icmp eq i64 %2, 1073741824
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = add i64 %0, 8
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, 2
store volatile i64 %9, i64* %7
ret void
}
int ShrTest13(int Y, int X, unsigned C, int CC) {
  return (Y & ((X >> C) & CC)) << C;
}


x86 assembly (clang, -O0):
<ShrTest13>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    -0x10(%rbp),%ecx
and    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShrTest13>:
mov    %ecx,%eax
mov    %edx,%ecx
sar    %cl,%esi
and    %edi,%eax
and    %esi,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ShrTest13(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = ashr i32 %10, %11
%13 = load i32, i32* %8
%14 = and i32 %12, %13
%15 = and i32 %9, %14
%16 = load i32, i32* %7
%17 = shl i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @ShrTest13(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = ashr i32 %1, %2
%6 = and i32 %3, %0
%7 = and i32 %6, %5
%8 = shl i32 %7, %2
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ to_gps(int, int /*<<< orphan*/);
void ch_accum_reset(int ch) { to_gps((ch << 2) + 0x85, 0); }


x86 assembly (clang, -O0):
<ch_accum_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x2,%edi
add    $0x85,%edi
xor    %esi,%esi
call   1030 <to_gps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch_accum_reset>:
lea    0x85(,%rdi,4),%edi
xor    %esi,%esi
jmp    1030 <to_gps@plt>

LLVM IR (-O0):
define void @ch_accum_reset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 2
%5 = add nsw i32 %4, 133
%6 = call i32 @to_gps(i32 %5, i32 0)
ret void
}

LLVM IR (-O2):
define void @ch_accum_reset(i32 %0) {
%2 = shl i32 %0, 2
%3 = add nsw i32 %2, 133
%4 = tail call i32 @to_gps(i32 %3, i32 0)
ret void
}
/* Type definitions */
struct RNA2Dfold_args_info {
  int dummy;
};

/* Variables and functions */
int RNA2Dfold_cmdline_parser2(int, char **, struct RNA2Dfold_args_info *,
                              int /*<<< orphan*/, int, int);
int RNA2Dfold_cmdline_parser(int argc, char **argv,
                             struct RNA2Dfold_args_info *args_info) {
  return RNA2Dfold_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<RNA2Dfold_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <RNA2Dfold_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNA2Dfold_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <RNA2Dfold_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.RNA2Dfold_args_info = type { i32 }
define i32 @RNA2Dfold_cmdline_parser(i32 %0, i8** %1, %struct.RNA2Dfold_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.RNA2Dfold_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.RNA2Dfold_args_info* %2, %struct.RNA2Dfold_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.RNA2Dfold_args_info*, %struct.RNA2Dfold_args_info** %6
%10 = call i32 @RNA2Dfold_cmdline_parser2(i32 %7, i8** %8, %struct.RNA2Dfold_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.RNA2Dfold_args_info = type { i32 }
define i32 @RNA2Dfold_cmdline_parser(i32 %0, i8** %1, %struct.RNA2Dfold_args_info* %2) {
%4 = tail call i32 @RNA2Dfold_cmdline_parser2(i32 %0, i8** %1, %struct.RNA2Dfold_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ PANIC();
int /*<<< orphan*/ tprint(char *);
void error(char *strp) {
  tprint(strp);
  PANIC();
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <tprint@plt>
mov    $0x0,%al
call   1040 <PANIC@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1030 <tprint@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <PANIC@plt>

LLVM IR (-O0):
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @tprint(i8* %3)
%5 = call i32 (...) @PANIC()
ret void
}

LLVM IR (-O2):
define void @error(i8* %0) {
%2 = tail call i32 @tprint(i8* %0)
%3 = tail call i32 (...) @PANIC()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void matchfree(char *result[]) {
  int i = 0;
  while (i < 3)
    free(result[i++]);
}


x86 assembly (clang, -O0):
<matchfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jge    114d <matchfree+0x3d>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
jmp    1123 <matchfree+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matchfree>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
mov    0x8(%rbx),%rdi
call   1030 <free@plt>
mov    0x10(%rbx),%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @matchfree(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 3
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i8**, i8*** %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = sext i32 %9 to i64
%12 = getelementptr inbounds i8*, i8** %8, i64 %11
%13 = load i8*, i8** %12
%14 = call i32 @free(i8* %13)
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @matchfree(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
%4 = getelementptr inbounds i8*, i8** %0, i64 1
%5 = load i8*, i8** %4
%6 = tail call i32 @free(i8* %5)
%7 = getelementptr inbounds i8*, i8** %0, i64 2
%8 = load i8*, i8** %7
%9 = tail call i32 @free(i8* %8)
ret void
}
/* Variables and functions */
int f(int, int);
int bla() {
  int x;
  x = f(x, x);
  return x;
}


x86 assembly (clang, -O0):
<bla>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <f@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bla>:
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @bla() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @f(i32 %2, i32 %3)
store i32 %4, i32* %1
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @bla() {
%1 = tail call i32 @f(i32 undef, i32 undef)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ m5_initparam();
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ usage();
void do_initparam(int argc, char *argv[]) {
  if (argc != 0)
    usage();
  printf("%ld", m5_initparam());
}


x86 assembly (clang, -O0):
<do_initparam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1150 <do_initparam+0x20>
mov    $0x0,%al
call   1050 <usage@plt>
mov    $0x0,%al
call   1030 <m5_initparam@plt>
mov    %eax,%esi
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_initparam>:
push   %rax
test   %edi,%edi
je     113c <do_initparam+0xc>
xor    %eax,%eax
call   1050 <usage@plt>
xor    %eax,%eax
call   1030 <m5_initparam@plt>
lea    0xeb6(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%ld\00"
define void @do_initparam(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 (...) @usage()
br label %9
9: ; preds = %7, %2
%10 = call i32 (...) @m5_initparam()
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%ld\00"
define void @do_initparam(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @usage()
br label %6
6: ; preds = %4, %2
%7 = tail call i32 (...) @m5_initparam()
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delch();
int /*<<< orphan*/ refresh();
void delchar() {
  delch();
  refresh();
}


x86 assembly (clang, -O0):
<delchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <delch@plt>
mov    $0x0,%al
call   1040 <refresh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delchar>:
push   %rax
xor    %eax,%eax
call   1030 <delch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <refresh@plt>

LLVM IR (-O0):
define void @delchar() {
%1 = call i32 (...) @delch()
%2 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @delchar() {
%1 = tail call i32 (...) @delch()
%2 = tail call i32 (...) @refresh()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;
typedef int /*<<< orphan*/ sample;
typedef int /*<<< orphan*/ channel;

/* Variables and functions */
int /*<<< orphan*/ adc_sample(int /*<<< orphan*/);
size_t usart_in_waiting();
int /*<<< orphan*/ usart_read(int /*<<< orphan*/ *, int);
int /*<<< orphan*/ usart_write(int /*<<< orphan*/ *, int);
void rpc_adc_sample(void) {
  uint8_t channel;
  size_t argsize = sizeof(channel);
  uint16_t sample;
  while (usart_in_waiting() < argsize)
    ;
  usart_read(&channel, sizeof(channel));
  sample = adc_sample(channel);
  usart_write(&sample, sizeof(sample));
}


x86 assembly (clang, -O0):
<rpc_adc_sample>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x4,-0x10(%rbp)
mov    $0x0,%al
call   1040 <usart_in_waiting@plt>
cmp    -0x10(%rbp),%rax
jae    1166 <rpc_adc_sample+0x26>
jmp    1150 <rpc_adc_sample+0x10>
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1030 <usart_read@plt>
mov    -0x4(%rbp),%edi
call   1050 <adc_sample@plt>
mov    %eax,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
mov    $0x4,%esi
call   1060 <usart_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpc_adc_sample>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <usart_in_waiting@plt>
cmp    $0x4,%rax
jb     1150 <rpc_adc_sample+0x10>
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <usart_read@plt>
mov    0x4(%rsp),%edi
call   1050 <adc_sample@plt>
mov    %eax,(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1060 <usart_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @rpc_adc_sample() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i32
store i64 4, i64* %2
br label %4
4: ; preds = %8, %0
%5 = call i64 (...) @usart_in_waiting()
%6 = load i64, i64* %2
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
%10 = call i32 @usart_read(i32* %1, i32 4)
%11 = load i32, i32* %1
%12 = call i32 @adc_sample(i32 %11)
store i32 %12, i32* %3
%13 = call i32 @usart_write(i32* %3, i32 4)
ret void
}

LLVM IR (-O2):
define void @rpc_adc_sample() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
br label %5
5: ; preds = %5, %0
%6 = tail call i64 (...) @usart_in_waiting()
%7 = icmp ult i64 %6, 4
br i1 %7, label %5, label %8
8: ; preds = %5
%9 = call i32 @usart_read(i32* %1, i32 4)
%10 = load i32, i32* %1
%11 = call i32 @adc_sample(i32 %10)
store i32 %11, i32* %2
%12 = call i32 @usart_write(i32* %2, i32 4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m256i;
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm256_castsi128_si256(int /*<<< orphan*/);
int /*<<< orphan*/ _mm256_inserti128_si256(int /*<<< orphan*/ const,
                                           int /*<<< orphan*/, int);
int /*<<< orphan*/ _mm_loadl_epi64(int /*<<< orphan*/ const *);
__m256i mm256_loadu2_epi64(const void *lo, const void *hi) {
  const __m256i tmp =
      _mm256_castsi128_si256(_mm_loadl_epi64((const __m128i *)lo));
  return _mm256_inserti128_si256(tmp, _mm_loadl_epi64((const __m128i *)hi), 1);
}


x86 assembly (clang, -O0):
<mm256_loadu2_epi64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <_mm_loadl_epi64@plt>
mov    %eax,%edi
call   1050 <_mm256_castsi128_si256@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <_mm_loadl_epi64@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%esi
mov    $0x1,%edx
call   1030 <_mm256_inserti128_si256@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm256_loadu2_epi64>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <_mm_loadl_epi64@plt>
mov    %eax,%edi
call   1050 <_mm256_castsi128_si256@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <_mm_loadl_epi64@plt>
mov    %ebp,%edi
mov    %eax,%esi
mov    $0x1,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <_mm256_inserti128_si256@plt>

LLVM IR (-O0):
define i32 @mm256_loadu2_epi64(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
%8 = call i32 @_mm_loadl_epi64(i32* %7)
%9 = call i32 @_mm256_castsi128_si256(i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i32*
%13 = call i32 @_mm_loadl_epi64(i32* %12)
%14 = call i32 @_mm256_inserti128_si256(i32 %10, i32 %13, i32 1)
ret i32 %14
}

LLVM IR (-O2):
define i32 @mm256_loadu2_epi64(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i32 @_mm_loadl_epi64(i32* %3)
%5 = tail call i32 @_mm256_castsi128_si256(i32 %4)
%6 = bitcast i8* %1 to i32*
%7 = tail call i32 @_mm_loadl_epi64(i32* %6)
%8 = tail call i32 @_mm256_inserti128_si256(i32 %5, i32 %7, i32 1)
ret i32 %8
}
/* Variables and functions */
bool nrf51_errata_3(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_3>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_3>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_3() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_3() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int BIO_write(int /*<<< orphan*/ *, char const *, size_t);
int write_bio(const void *data, size_t len, void *bp) {
  return BIO_write((BIO *)bp, (const char *)data, len);
}


x86 assembly (clang, -O0):
<write_bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <BIO_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_bio>:
mov    %rdx,%rax
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %rax,%rdi
jmp    1030 <BIO_write@plt>

LLVM IR (-O0):
define i32 @write_bio(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = bitcast i8* %7 to i32*
%9 = load i8*, i8** %4
%10 = load i64, i64* %5
%11 = call i32 @BIO_write(i32* %8, i8* %9, i64 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @write_bio(i8* %0, i64 %1, i8* %2) {
%4 = bitcast i8* %2 to i32*
%5 = tail call i32 @BIO_write(i32* %4, i8* %0, i64 %1)
ret i32 %5
}
int set_bit(int var, int pos) { return var |= (1 << pos); }


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
mov    %edi,%eax
bts    %esi,%eax
ret

LLVM IR (-O0):
define i32 @set_bit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i32, i32* %3
%8 = or i32 %7, %6
store i32 %8, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @set_bit(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = or i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EBADF;
int /*<<< orphan*/ errno;
int _isatty(int file) {
  errno = EBADF;
  return 0;
}


x86 assembly (clang, -O0):
<_isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2eca(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec9(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isatty>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
@EBADF = global i32 0
@errno = global i32 0
define i32 @_isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @EBADF
store i32 %3, i32* @errno
ret i32 0
}

LLVM IR (-O2):
@EBADF = global i32 0
@errno = global i32 0
define i32 @_isatty(i32 %0) {
%2 = load i32, i32* @EBADF
store i32 %2, i32* @errno
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void QEIEnable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000000))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<QEIEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIEnable>:
orq    $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @QEIEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 0
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 1
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @QEIEnable(i64 %0) {
%2 = inttoptr i64 %0 to i64*
%3 = load volatile i64, i64* %2
%4 = or i64 %3, 1
store volatile i64 %4, i64* %2
ret void
}
unsigned sleep(unsigned seconds) {
  (void)(seconds);
  return 0;
}


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @sleep(i32 %0) {
ret i32 0
}
char *wceex_setlocale(int category, const char *locale) {
  (void)category;
  (void)locale;
  return "";
}


x86 assembly (clang, -O0):
<wceex_setlocale>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeee(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wceex_setlocale>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @wceex_setlocale(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @wceex_setlocale(i32 %0, i8* nocapture readnone %1) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
main() {
  printf("#define SIZEOF_INT %d\n", sizeof(int));
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"#define SIZEOF_INT %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 4)
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [23 x i8] c"#define SIZEOF_INT %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 4)
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int f467(int *);
int f468(int *p) { return f467(p); }


x86 assembly (clang, -O0):
<f468>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f467@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f468>:
jmp    1030 <f467@plt>

LLVM IR (-O0):
define i32 @f468(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f467(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f468(i32* %0) {
%2 = tail call i32 @f467(i32* %0)
ret i32 %2
}
/* Variables and functions */
#define IPPROTO_DSTOPTS 131
#define IPPROTO_FRAGMENT 130
#define IPPROTO_HOPOPTS 129
#define IPPROTO_ROUTING 128
int rw_packet_ipv6_valid_extension(int next_header) {
  switch (next_header) {
  case IPPROTO_HOPOPTS:
  case IPPROTO_ROUTING:
  case IPPROTO_FRAGMENT:
  case IPPROTO_DSTOPTS:
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<rw_packet_ipv6_valid_extension>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
sub    $0x3,%eax
ja     1127 <rw_packet_ipv6_valid_extension+0x27>
jmp    111b <rw_packet_ipv6_valid_extension+0x1b>
movl   $0x1,-0x4(%rbp)
jmp    112e <rw_packet_ipv6_valid_extension+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rw_packet_ipv6_valid_extension>:
and    $0xfffffffc,%edi
xor    %eax,%eax
cmp    $0x80,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @rw_packet_ipv6_valid_extension(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 129, label %5
i32 128, label %5
i32 130, label %5
i32 131, label %5
]
5: ; preds = %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @rw_packet_ipv6_valid_extension(i32 %0) {
%2 = and i32 %0, -4
%3 = icmp eq i32 %2, 128
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_65() {
  Assert_real((isqrt(65) == 8),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              330, ("Integer square root of 65 should be 8"));
}


x86 assembly (clang, -O0):
<t_sqrt_65>:
push   %rbp
mov    %rsp,%rbp
mov    $0x41,%edi
call   1030 <isqrt@plt>
cmp    $0x8,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x14a,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_65>:
push   %rax
mov    $0x41,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x8,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x14a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 65 should be 8\00"
define void @t_sqrt_65() {
%1 = call i32 @isqrt(i32 65)
%2 = icmp eq i32 %1, 8
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 330, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 65 should be 8\00"
define void @t_sqrt_65() {
%1 = tail call i32 @isqrt(i32 65)
%2 = icmp eq i32 %1, 8
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 330, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t josephus(int32_t n, int32_t k) {
  if (n == 1) {
    return 1;
  }
  return ((josephus(n - 1, k) + k - 1) % n) + 1;
}


x86 assembly (clang, -O0):
<josephus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1134 <josephus+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1152 <josephus+0x42>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
call   1030 <josephus@plt>
add    -0xc(%rbp),%eax
sub    $0x1,%eax
cltd
idivl  -0x8(%rbp)
add    $0x1,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<josephus>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     1140 <josephus+0x30>
push   %r14
push   %rbx
push   %rax
mov    %esi,%r14d
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <josephus@plt>
add    %r14d,%eax
add    $0xffffffff,%eax
cltd
idiv   %ebx
mov    %edx,%eax
add    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @josephus(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %20
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %5
%13 = call i32 @josephus(i32 %11, i32 %12)
%14 = load i32, i32* %5
%15 = add nsw i32 %13, %14
%16 = sub nsw i32 %15, 1
%17 = load i32, i32* %4
%18 = srem i32 %16, %17
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %20
20: ; preds = %9, %8
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @josephus(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi i32 [ %12, %6 ], [ 1, %2 ]
ret i32 %5
6: ; preds = %2
%7 = add nsw i32 %0, -1
%8 = tail call i32 @josephus(i32 %7, i32 %1)
%9 = add i32 %1, -1
%10 = add i32 %9, %8
%11 = srem i32 %10, %0
%12 = add nsw i32 %11, 1
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void netcdf_DatatypeInitSpatial() { printf("NetCDF output not supported\n"); }


x86 assembly (clang, -O0):
<netcdf_DatatypeInitSpatial>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<netcdf_DatatypeInitSpatial>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"NetCDF output not supported\0A\00"
define void @netcdf_DatatypeInitSpatial() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"NetCDF output not supported\00"
define void @netcdf_DatatypeInitSpatial() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char fget(int /*<<< orphan*/ *);
char *get_lexeme(FILE *i) {
  char c;
  while ((c = fget(i)) != '>') {
  }
  return NULL;
}


x86 assembly (clang, -O0):
<get_lexeme>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fget@plt>
mov    %al,-0x9(%rbp)
movsbl %al,%eax
cmp    $0x3e,%eax
je     1139 <get_lexeme+0x29>
jmp    111c <get_lexeme+0xc>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_lexeme>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <fget@plt>
cmp    $0x3e,%al
jne    1120 <get_lexeme+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @get_lexeme(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
store i32* %0, i32** %2
br label %4
4: ; preds = %9, %1
%5 = load i32*, i32** %2
%6 = call signext i8 @fget(i32* %5)
store i8 %6, i8* %3
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 62
br i1 %8, label %9, label %10
9: ; preds = %4
br label %4
10: ; preds = %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @get_lexeme(i32* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call signext i8 @fget(i32* %0)
%4 = icmp eq i8 %3, 62
br i1 %4, label %5, label %2
5: ; preds = %2
ret i8* null
}
double min(double a, double b) { return a <= b ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     1131 <min+0x31>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113b <min+0x3b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
movapd %xmm0,%xmm2
cmplesd %xmm1,%xmm2
andpd  %xmm2,%xmm0
andnpd %xmm1,%xmm2
orpd   %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @min(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ole double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @min(double %0, double %1) {
%3 = fcmp ole double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr,
          "Usage: tracepath [-n] [-b] [-l <len>] <destination>[/<port>]\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [62 x i8] c"Usage: tracepath [-n] [-b] [-l <len>] <destination>[/<port>]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [62 x i8] c"Usage: tracepath [-n] [-b] [-l <len>] <destination>[/<port>]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int prime(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int ret = prime(13);
  printf("%d\n", ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xd,%edi
call   1040 <prime@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xd,%edi
call   1040 <prime@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @prime(i32 13)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @prime(i32 13)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void debugpins_slot_clr() {}


x86 assembly (clang, -O0):
<debugpins_slot_clr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debugpins_slot_clr>:
ret

LLVM IR (-O0):
define void @debugpins_slot_clr() {
ret void
}

LLVM IR (-O2):
define void @debugpins_slot_clr() {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ x;
};
struct TYPE_4__ {
  TYPE_1__ xcreatewindow;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xcreatewindow_x(void *_p) {
  return (int)((XEvent *)_p)->xcreatewindow.x;
}


x86 assembly (clang, -O0):
<get_XEvent_xcreatewindow_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xcreatewindow_x>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xcreatewindow_x(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xcreatewindow_x(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
unsigned long read32(unsigned char *inword) {
  return ((unsigned long)(inword[0]) << 24) |
         ((unsigned long)(inword[1]) << 16) |
         ((unsigned long)(inword[2]) << 8) | inword[3];
}


x86 assembly (clang, -O0):
<read32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x18,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x10,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read32>:
mov    (%rdi),%eax
shl    $0x20,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @read32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = shl i64 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i64
%12 = shl i64 %11, 16
%13 = or i64 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i64
%18 = shl i64 %17, 8
%19 = or i64 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i64
%24 = or i64 %19, %23
ret i64 %24
}

LLVM IR (-O2):
define i64 @read32(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = shl nuw nsw i64 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = shl nuw nsw i64 %7, 16
%9 = or i64 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i64
%13 = shl nuw nsw i64 %12, 8
%14 = or i64 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i64
%18 = or i64 %14, %17
ret i64 %18
}
int ld_lt_mr2(long double *a1, long double a2) { return !(((*a1) < (a2))); }


x86 assembly (clang, -O0):
<ld_lt_mr2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
mov    %rdi,-0x8(%rbp)
fstpt  -0x20(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
fldt   -0x20(%rbp)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_lt_mr2>:
fldt   0x8(%rsp)
fldt   (%rdi)
xor    %eax,%eax
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
setbe  %al
ret

LLVM IR (-O0):
define i32 @ld_lt_mr2(x86_fp80* %0, x86_fp80 %1) {
%3 = alloca x86_fp80*
%4 = alloca x86_fp80
store x86_fp80* %0, x86_fp80** %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80*, x86_fp80** %3
%6 = load x86_fp80, x86_fp80* %5
%7 = load x86_fp80, x86_fp80* %4
%8 = fcmp olt x86_fp80 %6, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ld_lt_mr2(x86_fp80* nocapture %0, x86_fp80 %1) {
%3 = load x86_fp80, x86_fp80* %0
%4 = fcmp uge x86_fp80 %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void configurePatchOok(void) {
  uint8_t *pPatchTab = (uint8_t *)0x21000340;
  uint32_t *pIrqPatch = (uint32_t *)0x210003BC;
  pPatchTab[80] = 0;
  pPatchTab[53] = 1;
  pPatchTab[57] = 2;
  pPatchTab[55] = 3;
  pPatchTab[110] = 4;
  pPatchTab[107] = 5;
  pIrqPatch[1] = 0x210005dd;
}


x86 assembly (clang, -O0):
<configurePatchOok>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21000340,%eax
mov    %rax,-0x8(%rbp)
mov    $0x210003bc,%eax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,0x140(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1,0xd4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x2,0xe4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x3,0xdc(%rax)
mov    -0x8(%rbp),%rax
movl   $0x4,0x1b8(%rax)
mov    -0x8(%rbp),%rax
movl   $0x5,0x1ac(%rax)
mov    -0x10(%rbp),%rax
movl   $0x210005dd,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<configurePatchOok>:
movl   $0x0,0x21000480
movl   $0x1,0x21000414
movl   $0x2,0x21000424
movl   $0x3,0x2100041c
movl   $0x4,0x210004f8
movl   $0x5,0x210004ec
movl   $0x210005dd,0x210003c0
ret

LLVM IR (-O0):
define void @configurePatchOok() {
%1 = alloca i32*
%2 = alloca i32*
store i32* inttoptr (i64 553648960 to i32*), i32** %1
store i32* inttoptr (i64 553649084 to i32*), i32** %2
%3 = load i32*, i32** %1
%4 = getelementptr inbounds i32, i32* %3, i64 80
store i32 0, i32* %4
%5 = load i32*, i32** %1
%6 = getelementptr inbounds i32, i32* %5, i64 53
store i32 1, i32* %6
%7 = load i32*, i32** %1
%8 = getelementptr inbounds i32, i32* %7, i64 57
store i32 2, i32* %8
%9 = load i32*, i32** %1
%10 = getelementptr inbounds i32, i32* %9, i64 55
store i32 3, i32* %10
%11 = load i32*, i32** %1
%12 = getelementptr inbounds i32, i32* %11, i64 110
store i32 4, i32* %12
%13 = load i32*, i32** %1
%14 = getelementptr inbounds i32, i32* %13, i64 107
store i32 5, i32* %14
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 1
store i32 553649629, i32* %16
ret void
}

LLVM IR (-O2):
define void @configurePatchOok() {
store i32 0, i32* inttoptr (i64 553649280 to i32*)
store i32 1, i32* inttoptr (i64 553649172 to i32*)
store i32 2, i32* inttoptr (i64 553649188 to i32*)
store i32 3, i32* inttoptr (i64 553649180 to i32*)
store i32 4, i32* inttoptr (i64 553649400 to i32*)
store i32 5, i32* inttoptr (i64 553649388 to i32*)
store i32 553649629, i32* inttoptr (i64 553649088 to i32*)
ret void
}
void verificamaior(int n1, int n2, int *m) {
  if (n1 > n2)
    *m = n1;
  else
    *m = n2;
}


x86 assembly (clang, -O0):
<verificamaior>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1128 <verificamaior+0x28>
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    1131 <verificamaior+0x31>
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificamaior>:
cmp    %esi,%edi
cmovg  %edi,%esi
mov    %esi,(%rdx)
ret

LLVM IR (-O0):
define void @verificamaior(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load i32*, i32** %6
store i32 %11, i32* %12
br label %16
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32*, i32** %6
store i32 %14, i32* %15
br label %16
16: ; preds = %13, %10
ret void
}

LLVM IR (-O2):
define void @verificamaior(i32 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = icmp sgt i32 %0, %1
%5 = select i1 %4, i32 %0, i32 %1
store i32 %5, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memmove(short *, short *, int);
void move_svector_1left_block(short *v, long nl, long nh) {
  memmove(v + nl - 1, v + nl, 2 * (nh - nl + 1));
}


x86 assembly (clang, -O0):
<move_svector_1left_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
add    %rax,%rdi
add    $0xfffffffffffffffe,%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
add    %rax,%rsi
mov    -0x18(%rbp),%rax
sub    -0x10(%rbp),%rax
add    $0x1,%rax
shl    $0x1,%rax
mov    %eax,%edx
call   1030 <memmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_svector_1left_block>:
lea    (%rdi,%rsi,2),%rax
lea    (%rdi,%rsi,2),%rdi
add    $0xfffffffffffffffe,%rdi
sub    %esi,%edx
add    %edx,%edx
add    $0x2,%edx
mov    %rax,%rsi
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @move_svector_1left_block(i16* %0, i64 %1, i64 %2) {
%4 = alloca i16*
%5 = alloca i64
%6 = alloca i64
store i16* %0, i16** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i16*, i16** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i16, i16* %7, i64 %8
%10 = getelementptr inbounds i16, i16* %9, i64 -1
%11 = load i16*, i16** %4
%12 = load i64, i64* %5
%13 = getelementptr inbounds i16, i16* %11, i64 %12
%14 = load i64, i64* %6
%15 = load i64, i64* %5
%16 = sub nsw i64 %14, %15
%17 = add nsw i64 %16, 1
%18 = mul nsw i64 2, %17
%19 = trunc i64 %18 to i32
%20 = call i32 @memmove(i16* %10, i16* %13, i32 %19)
ret void
}

LLVM IR (-O2):
define void @move_svector_1left_block(i16* %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i16, i16* %0, i64 %1
%5 = getelementptr inbounds i16, i16* %4, i64 -1
%6 = sub nsw i64 %2, %1
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 1
%9 = add i32 %8, 2
%10 = tail call i32 @memmove(i16* %5, i16* %4, i32 %9)
ret void
}