unsigned long __xchg(long x, volatile void *ptr, int size) {
  switch (size) {
  case 1:
    __asm__ __volatile__("xchgb %b0,%1"
                         : "=q"(x)
                         : "m"(*((volatile long *)(ptr))), "0"(x)
                         : "memory");
    break;
  case 2:
    __asm__ __volatile__("xchgw %w0,%1"
                         : "=r"(x)
                         : "m"(*((volatile long *)(ptr))), "0"(x)
                         : "memory");
    break;
  case 4:
    __asm__ __volatile__("xchgl %k0,%1"
                         : "=r"(x)
                         : "m"(*((volatile long *)(ptr))), "0"(x)
                         : "memory");
    break;
  case 8:
    __asm__ __volatile__("xchgq %0,%1"
                         : "=r"(x)
                         : "m"(*((volatile long *)(ptr))), "0"(x)
                         : "memory");
    break;
  }
  return x;
}


x86 assembly (clang, -O0):
<__xchg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0x7,%eax
ja     1181 <__xchg+0x81>
mov    -0x20(%rbp),%rax
lea    0xed1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
xchg   %al,(%rcx)
mov    %rax,-0x8(%rbp)
jmp    1181 <__xchg+0x81>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
xchg   %ax,(%rcx)
mov    %rax,-0x8(%rbp)
jmp    1181 <__xchg+0x81>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
xchg   %eax,(%rcx)
mov    %rax,-0x8(%rbp)
jmp    1181 <__xchg+0x81>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
xchg   %rax,(%rcx)
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__xchg>:
mov    %rdi,%rax
add    $0xffffffff,%edx
cmp    $0x7,%edx
ja     1128 <__xchg+0x28>
lea    0xeee(%rip),%rcx
movslq (%rcx,%rdx,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
xchg   %al,(%rsi)
ret
xchg   %ax,(%rsi)
ret
xchg   %eax,(%rsi)
ret
xchg   %rax,(%rsi)
ret

LLVM IR (-O0):
define i64 @__xchg(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
switch i32 %7, label %28 [
i32 1, label %8
i32 2, label %13
i32 4, label %18
i32 8, label %23
]
8: ; preds = %3
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i64*
%11 = load i64, i64* %4
%12 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %10, i64 %11)
store i64 %12, i64* %4
br label %28
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = bitcast i8* %14 to i64*
%16 = load i64, i64* %4
%17 = call i64 asm sideeffect "xchgw ${0:w},$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %15, i64 %16)
store i64 %17, i64* %4
br label %28
18: ; preds = %3
%19 = load i8*, i8** %5
%20 = bitcast i8* %19 to i64*
%21 = load i64, i64* %4
%22 = call i64 asm sideeffect "xchgl ${0:k},$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %20, i64 %21)
store i64 %22, i64* %4
br label %28
23: ; preds = %3
%24 = load i8*, i8** %5
%25 = bitcast i8* %24 to i64*
%26 = load i64, i64* %4
%27 = call i64 asm sideeffect "xchgq $0,$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %25, i64 %26)
store i64 %27, i64* %4
br label %28
28: ; preds = %3, %23, %18, %13, %8
%29 = load i64, i64* %4
ret i64 %29
}

LLVM IR (-O2):
define i64 @__xchg(i64 %0, i8* %1, i32 %2) {
switch i32 %2, label %16 [
i32 1, label %4
i32 2, label %7
i32 4, label %10
i32 8, label %13
]
4: ; preds = %3
%5 = bitcast i8* %1 to i64*
%6 = tail call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %5, i64 %0)
br label %16
7: ; preds = %3
%8 = bitcast i8* %1 to i64*
%9 = tail call i64 asm sideeffect "xchgw ${0:w},$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %8, i64 %0)
br label %16
10: ; preds = %3
%11 = bitcast i8* %1 to i64*
%12 = tail call i64 asm sideeffect "xchgl ${0:k},$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %11, i64 %0)
br label %16
13: ; preds = %3
%14 = bitcast i8* %1 to i64*
%15 = tail call i64 asm sideeffect "xchgq $0,$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %14, i64 %0)
br label %16
16: ; preds = %3, %13, %10, %7, %4
%17 = phi i64 [ %0, %3 ], [ %15, %13 ], [ %12, %10 ], [ %9, %7 ], [ %6, %4 ]
ret i64 %17
}