xunge/DecIR huggingface dataset:
/* Type definitions */
struct DynArr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ exp(double);
int /*<<< orphan*/ popDynArr(struct DynArr *);
int /*<<< orphan*/ pushDynArr(struct DynArr *, int /*<<< orphan*/);
double topDynArr(struct DynArr *);
void exponential(struct DynArr *stack) {
  double i = topDynArr(stack);
  popDynArr(stack);
  pushDynArr(stack, exp(i));
}


x86 assembly (clang, -O0):
<exponential>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <topDynArr@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <popDynArr@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1050 <exp@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1060 <pushDynArr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exponential>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1030 <topDynArr@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1040 <popDynArr@plt>
movsd  0x8(%rsp),%xmm0
call   1050 <exp@plt>
mov    %rbx,%rdi
mov    %eax,%esi
add    $0x10,%rsp
pop    %rbx
jmp    1060 <pushDynArr@plt>

LLVM IR (-O0):
%struct.DynArr = type { i32 }
define void @exponential(%struct.DynArr* %0) {
%2 = alloca %struct.DynArr*
%3 = alloca double
store %struct.DynArr* %0, %struct.DynArr** %2
%4 = load %struct.DynArr*, %struct.DynArr** %2
%5 = call double @topDynArr(%struct.DynArr* %4)
store double %5, double* %3
%6 = load %struct.DynArr*, %struct.DynArr** %2
%7 = call i32 @popDynArr(%struct.DynArr* %6)
%8 = load %struct.DynArr*, %struct.DynArr** %2
%9 = load double, double* %3
%10 = call i32 @exp(double %9)
%11 = call i32 @pushDynArr(%struct.DynArr* %8, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.DynArr = type { i32 }
define void @exponential(%struct.DynArr* %0) {
%2 = tail call double @topDynArr(%struct.DynArr* %0)
%3 = tail call i32 @popDynArr(%struct.DynArr* %0)
%4 = tail call i32 @exp(double %2)
%5 = tail call i32 @pushDynArr(%struct.DynArr* %0, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) { printf("Hello, world!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, world!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello, world!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double sqrt(double);
double mysqrt(double x) { return sqrt(x); }


x86 assembly (clang, -O0):
<mysqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysqrt>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     111f <mysqrt+0xf>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @mysqrt(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sqrt(double %3)
ret double %4
}

LLVM IR (-O2):
define double @mysqrt(double %0) {
%2 = tail call double @sqrt(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ thr1(int /*<<< orphan*/);
int /*<<< orphan*/ thr2(int /*<<< orphan*/);
int /*<<< orphan*/ thr3(int /*<<< orphan*/);
int /*<<< orphan*/ thr4(int /*<<< orphan*/);
int /*<<< orphan*/ thr5(int /*<<< orphan*/);
int /*<<< orphan*/ thr6(int /*<<< orphan*/);
int /*<<< orphan*/ thr7(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  thr1(0);
__CPROVER_ASYNC_1:
  thr2(0);
__CPROVER_ASYNC_2:
  thr3(0);
__CPROVER_ASYNC_3:
  thr4(0);
__CPROVER_ASYNC_4:
  thr5(0);
__CPROVER_ASYNC_5:
  thr6(0);
__CPROVER_ASYNC_6:
  thr7(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
jmp    1179 <main+0x9>
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1080 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1070 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   1090 <thr7@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1080 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1070 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   1090 <thr7@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
br label %1
1: ; preds = %0
%2 = call i32 @thr1(i32 0)
br label %3
3: ; preds = %1
%4 = call i32 @thr2(i32 0)
br label %5
5: ; preds = %3
%6 = call i32 @thr3(i32 0)
br label %7
7: ; preds = %5
%8 = call i32 @thr4(i32 0)
br label %9
9: ; preds = %7
%10 = call i32 @thr5(i32 0)
br label %11
11: ; preds = %9
%12 = call i32 @thr6(i32 0)
br label %13
13: ; preds = %11
%14 = call i32 @thr7(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @thr1(i32 0)
%2 = tail call i32 @thr2(i32 0)
%3 = tail call i32 @thr3(i32 0)
%4 = tail call i32 @thr4(i32 0)
%5 = tail call i32 @thr5(i32 0)
%6 = tail call i32 @thr6(i32 0)
%7 = tail call i32 @thr7(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int /*<<< orphan*/,
                          int /*<<< orphan*/);
int /*<<< orphan*/ ropecap(char const *);
int /*<<< orphan*/ ropelen(char const *);
void rope_info(const char *str) {
  printf("\"%s\": { len = %zu, cap = %zu }\n", str, ropelen(str), ropecap(str));
}


x86 assembly (clang, -O0):
<rope_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <ropelen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ropecap@plt>
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    %eax,%ecx
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rope_info>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1050 <ropelen@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <ropecap@plt>
lea    0xeb4(%rip),%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
mov    %eax,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"\22%s\22: { len = %zu, cap = %zu }\0A\00"
define void @rope_info(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @ropelen(i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 @ropecap(i8* %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* %3, i32 %5, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"\22%s\22: { len = %zu, cap = %zu }\0A\00"
define void @rope_info(i8* %0) {
%2 = tail call i32 @ropelen(i8* %0)
%3 = tail call i32 @ropecap(i8* %0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
char const *cache_lookup_icon(char const *, int);
const char *_xdg_mime_cache_get_generic_icon(const char *mime) {
  return cache_lookup_icon(mime, 36);
}


x86 assembly (clang, -O0):
<_xdg_mime_cache_get_generic_icon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x24,%esi
call   1030 <cache_lookup_icon@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_xdg_mime_cache_get_generic_icon>:
mov    $0x24,%esi
jmp    1030 <cache_lookup_icon@plt>

LLVM IR (-O0):
define i8* @_xdg_mime_cache_get_generic_icon(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @cache_lookup_icon(i8* %3, i32 36)
ret i8* %4
}

LLVM IR (-O2):
define i8* @_xdg_mime_cache_get_generic_icon(i8* %0) {
%2 = tail call i8* @cache_lookup_icon(i8* %0, i32 36)
ret i8* %2
}
void set_perf_counter_pending(void) {}


x86 assembly (clang, -O0):
<set_perf_counter_pending>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_perf_counter_pending>:
ret

LLVM IR (-O0):
define void @set_perf_counter_pending() {
ret void
}

LLVM IR (-O2):
define void @set_perf_counter_pending() {
ret void
}
void new_handler(int signo) {}


x86 assembly (clang, -O0):
<new_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_handler>:
ret

LLVM IR (-O0):
define void @new_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @new_handler(i32 %0) {
ret void
}
/* Type definitions */
struct rtas_src_scn {
  int dummy;
};
struct rtas_event {
  int dummy;
};

/* Variables and functions */
scalar_t__ get_re_scn(struct rtas_event *, int);
struct rtas_src_scn *rtas_get_src_scn(struct rtas_event *re) {
  return (struct rtas_src_scn *)get_re_scn(re, 16);
}


x86 assembly (clang, -O0):
<rtas_get_src_scn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x10,%esi
call   1030 <get_re_scn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtas_get_src_scn>:
mov    $0x10,%esi
jmp    1030 <get_re_scn@plt>

LLVM IR (-O0):
%struct.rtas_src_scn = type { i32 }
%struct.rtas_event = type { i32 }
define %struct.rtas_src_scn* @rtas_get_src_scn(%struct.rtas_event* %0) {
%2 = alloca %struct.rtas_event*
store %struct.rtas_event* %0, %struct.rtas_event** %2
%3 = load %struct.rtas_event*, %struct.rtas_event** %2
%4 = call i64 @get_re_scn(%struct.rtas_event* %3, i32 16)
%5 = inttoptr i64 %4 to %struct.rtas_src_scn*
ret %struct.rtas_src_scn* %5
}

LLVM IR (-O2):
%struct.rtas_src_scn = type { i32 }
%struct.rtas_event = type { i32 }
define %struct.rtas_src_scn* @rtas_get_src_scn(%struct.rtas_event* %0) {
%2 = tail call i64 @get_re_scn(%struct.rtas_event* %0, i32 16)
%3 = inttoptr i64 %2 to %struct.rtas_src_scn*
ret %struct.rtas_src_scn* %3
}
/* Type definitions */
struct circle {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_object(int, short *);
void free_circle(struct circle *cir) { free_object(10, (short *)cir); }


x86 assembly (clang, -O0):
<free_circle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xa,%edi
call   1030 <free_object@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_circle>:
mov    %rdi,%rsi
mov    $0xa,%edi
jmp    1030 <free_object@plt>

LLVM IR (-O0):
%struct.circle = type { i32 }
define void @free_circle(%struct.circle* %0) {
%2 = alloca %struct.circle*
store %struct.circle* %0, %struct.circle** %2
%3 = load %struct.circle*, %struct.circle** %2
%4 = bitcast %struct.circle* %3 to i16*
%5 = call i32 @free_object(i32 10, i16* %4)
ret void
}

LLVM IR (-O2):
%struct.circle = type { i32 }
define void @free_circle(%struct.circle* %0) {
%2 = bitcast %struct.circle* %0 to i16*
%3 = tail call i32 @free_object(i32 10, i16* %2)
ret void
}
void cube_cp_y_line(unsigned char _from, unsigned char _to) {}


x86 assembly (clang, -O0):
<cube_cp_y_line>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cube_cp_y_line>:
ret

LLVM IR (-O0):
define void @cube_cp_y_line(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
ret void
}

LLVM IR (-O2):
define void @cube_cp_y_line(i8 zeroext %0, i8 zeroext %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void hm_u64_u64_entry_destroy(void *entry) { free(entry); }


x86 assembly (clang, -O0):
<hm_u64_u64_entry_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hm_u64_u64_entry_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @hm_u64_u64_entry_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @hm_u64_u64_entry_destroy(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int stbi__sse2_available() { return __builtin_cpu_supports("sse2"); }


x86 assembly (clang, -O0):
<stbi__sse2_available>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed2(%rip),%eax
and    $0x10,%eax
cmp    $0x10,%eax
sete   %al
and    $0x1,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi__sse2_available>:
mov    0x2ed6(%rip),%eax
shr    $0x4,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
@__cpu_model = external global { i32, i32, i32, [1 x i32] }
define i32 @stbi__sse2_available() {
%1 = load i32, i32* getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, { i32, i32, i32, [1 x i32] }* @__cpu_model, i32 0, i32 3, i32 0)
%2 = and i32 %1, 16
%3 = icmp eq i32 %2, 16
%4 = and i1 true, %3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
@__cpu_model = external global { i32, i32, i32, [1 x i32] }
define i32 @stbi__sse2_available() {
%1 = load i32, i32* getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, { i32, i32, i32, [1 x i32] }* @__cpu_model, i64 0, i32 3, i64 0)
%2 = lshr i32 %1, 4
%3 = and i32 %2, 1
ret i32 %3
}
int tileNorth(int tileIndex) {
  int canCheckN = tileIndex > 3;
  return canCheckN ? tileIndex - 4 : -1;
}


x86 assembly (clang, -O0):
<tileNorth>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112e <tileNorth+0x2e>
mov    -0x4(%rbp),%eax
sub    $0x4,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <tileNorth+0x3b>
mov    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <tileNorth+0x3b>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tileNorth>:
lea    -0x4(%rdi),%ecx
cmp    $0x4,%edi
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @tileNorth(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 3
%6 = zext i1 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 4
br label %13
12: ; preds = %1
br label %13
13: ; preds = %12, %9
%14 = phi i32 [ %11, %9 ], [ -1, %12 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @tileNorth(i32 %0) {
%2 = icmp sgt i32 %0, 3
%3 = add nsw i32 %0, -4
%4 = select i1 %2, i32 %3, i32 -1
ret i32 %4
}
/* Variables and functions */
int user1_prepre_init_specific_init();
int prepre_init_specific_init(void) {
  int funreturn;
  funreturn = user1_prepre_init_specific_init();
  if (funreturn != 0)
    return (funreturn);
  return (0);
}


x86 assembly (clang, -O0):
<prepre_init_specific_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <user1_prepre_init_specific_init@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1137 <prepre_init_specific_init+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113e <prepre_init_specific_init+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prepre_init_specific_init>:
xor    %eax,%eax
jmp    1030 <user1_prepre_init_specific_init@plt>

LLVM IR (-O0):
define i32 @prepre_init_specific_init() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @user1_prepre_init_specific_init()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
store i32 %7, i32* %1
br label %9
8: ; preds = %0
store i32 0, i32* %1
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @prepre_init_specific_init() {
%1 = tail call i32 (...) @user1_prepre_init_specific_init()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ memmove(double *, double *, int);
void copy_dmatrix(double **dst, double **src, int nr, int nc) {
  memmove(dst[0], src[0], sizeof(double) * nr * nc);
}


x86 assembly (clang, -O0):
<copy_dmatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
movslq -0x14(%rbp),%rax
shl    $0x3,%rax
movslq -0x18(%rbp),%rcx
imul   %rcx,%rax
mov    %eax,%edx
call   1030 <memmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_dmatrix>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
imul   %ecx,%edx
shl    $0x3,%edx
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @copy_dmatrix(double** %0, double** %1, i32 %2, i32 %3) {
%5 = alloca double**
%6 = alloca double**
%7 = alloca i32
%8 = alloca i32
store double** %0, double*** %5
store double** %1, double*** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load double**, double*** %5
%10 = getelementptr inbounds double*, double** %9, i64 0
%11 = load double*, double** %10
%12 = load double**, double*** %6
%13 = getelementptr inbounds double*, double** %12, i64 0
%14 = load double*, double** %13
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = mul i64 8, %16
%18 = load i32, i32* %8
%19 = sext i32 %18 to i64
%20 = mul i64 %17, %19
%21 = trunc i64 %20 to i32
%22 = call i32 @memmove(double* %11, double* %14, i32 %21)
ret void
}

LLVM IR (-O2):
define void @copy_dmatrix(double** nocapture %0, double** nocapture %1, i32 %2, i32 %3) {
%5 = load double*, double** %0
%6 = load double*, double** %1
%7 = shl i32 %2, 3
%8 = mul i32 %7, %3
%9 = tail call i32 @memmove(double* %5, double* %6, i32 %8)
ret void
}
void MD5_Transform(int buf[4], int const in[16]) {}


x86 assembly (clang, -O0):
<MD5_Transform>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MD5_Transform>:
ret

LLVM IR (-O0):
define void @MD5_Transform(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @MD5_Transform(i32* nocapture %0, i32* nocapture %1) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t maj(uint32_t x, uint32_t y, uint32_t z) {
  return ((x & y) ^ (x & z) ^ (y & z));
}


x86 assembly (clang, -O0):
<maj>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
and    -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maj>:
mov    %edx,%eax
xor    %esi,%eax
and    %edi,%eax
and    %esi,%edx
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @maj(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = and i32 %7, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %6
%12 = and i32 %10, %11
%13 = xor i32 %9, %12
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
%17 = xor i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @maj(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %2, %1
%5 = and i32 %4, %0
%6 = and i32 %2, %1
%7 = xor i32 %5, %6
ret i32 %7
}
void IBClockFree() {}


x86 assembly (clang, -O0):
<IBClockFree>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IBClockFree>:
ret

LLVM IR (-O0):
define void @IBClockFree() {
ret void
}

LLVM IR (-O2):
define void @IBClockFree() {
ret void
}
/* Variables and functions */
int fun_stub_in_so(int, int);
int fun_call_in_so(int x, int y) { return fun_stub_in_so(x, y); }


x86 assembly (clang, -O0):
<fun_call_in_so>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <fun_stub_in_so@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_call_in_so>:
jmp    1030 <fun_stub_in_so@plt>

LLVM IR (-O0):
define i32 @fun_call_in_so(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @fun_stub_in_so(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fun_call_in_so(i32 %0, i32 %1) {
%3 = tail call i32 @fun_stub_in_so(i32 %0, i32 %1)
ret i32 %3
}
void start_aa_pass(int n) {}


x86 assembly (clang, -O0):
<start_aa_pass>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_aa_pass>:
ret

LLVM IR (-O0):
define void @start_aa_pass(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @start_aa_pass(i32 %0) {
ret void
}
void GB_DIV_f_FP32(float *z, const float *x, const float *y) {
  (*z) = (*x) / (*y);
}


x86 assembly (clang, -O0):
<GB_DIV_f_FP32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
divss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GB_DIV_f_FP32>:
movss  (%rsi),%xmm0
divss  (%rdx),%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @GB_DIV_f_FP32(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = load float, float* %7
%9 = load float*, float** %6
%10 = load float, float* %9
%11 = fdiv float %8, %10
%12 = load float*, float** %4
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @GB_DIV_f_FP32(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fdiv float %4, %5
store float %6, float* %0
ret void
}
/* Type definitions */
struct _Locale_name_hint {
  int dummy;
};

/* Variables and functions */
char const *_Locale_extract_name(char const *, int *);
char const *_Locale_extract_time_name(const char *name, char *buf,
                                      struct _Locale_name_hint *hint,
                                      int *__err_code) {
  return _Locale_extract_name(name, __err_code);
}


x86 assembly (clang, -O0):
<_Locale_extract_time_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <_Locale_extract_name@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_extract_time_name>:
mov    %rcx,%rsi
jmp    1030 <_Locale_extract_name@plt>

LLVM IR (-O0):
%struct._Locale_name_hint = type { i32 }
define i8* @_Locale_extract_time_name(i8* %0, i8* %1, %struct._Locale_name_hint* %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca %struct._Locale_name_hint*
%8 = alloca i32*
store i8* %0, i8** %5
store i8* %1, i8** %6
store %struct._Locale_name_hint* %2, %struct._Locale_name_hint** %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i32*, i32** %8
%11 = call i8* @_Locale_extract_name(i8* %9, i32* %10)
ret i8* %11
}

LLVM IR (-O2):
%struct._Locale_name_hint = type { i32 }
define i8* @_Locale_extract_time_name(i8* %0, i8* nocapture readnone %1, %struct._Locale_name_hint* nocapture readnone %2, i32* %3) {
%5 = tail call i8* @_Locale_extract_name(i8* %0, i32* %3)
ret i8* %5
}
/* Variables and functions */
int Hoare_Partition(int *, int, int);
int /*<<< orphan*/ QuickSort(int *, int, int);
void Hoare_QuickSort(int *A, int p, int r) {
  if (p < r) {
    int q = Hoare_Partition(A, p, r);
    QuickSort(A, p, q - 1);
    QuickSort(A, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<Hoare_QuickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <Hoare_QuickSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <Hoare_Partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <QuickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <QuickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hoare_QuickSort>:
cmp    %edx,%esi
jge    1161 <Hoare_QuickSort+0x41>
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r15d
mov    %esi,%ebp
mov    %rdi,%r14
call   1030 <Hoare_Partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r14,%rdi
mov    %ebp,%esi
call   1040 <QuickSort@plt>
add    $0x1,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
mov    %r15d,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <QuickSort@plt>
ret

LLVM IR (-O0):
define void @Hoare_QuickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %26
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @Hoare_Partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = call i32 @QuickSort(i32* %16, i32 %17, i32 %19)
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
%25 = call i32 @QuickSort(i32* %21, i32 %23, i32 %24)
br label %26
26: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @Hoare_QuickSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3
%6 = tail call i32 @Hoare_Partition(i32* %0, i32 %1, i32 %2)
%7 = add nsw i32 %6, -1
%8 = tail call i32 @QuickSort(i32* %0, i32 %1, i32 %7)
%9 = add nsw i32 %6, 1
%10 = tail call i32 @QuickSort(i32* %0, i32 %9, i32 %2)
br label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
long div_ll_X_l_rem(long long, long, long *);
extern long div_ll_X_l(long long divs, long div) {
  long dum;
  return div_ll_X_l_rem(divs, div, &dum);
}


x86 assembly (clang, -O0):
<div_ll_X_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <div_ll_X_l_rem@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_ll_X_l>:
push   %rax
mov    %rsp,%rdx
call   1030 <div_ll_X_l_rem@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @div_ll_X_l(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i64 @div_ll_X_l_rem(i64 %6, i64 %7, i64* %5)
ret i64 %8
}

LLVM IR (-O2):
define i64 @div_ll_X_l(i64 %0, i64 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i64 @div_ll_X_l_rem(i64 %0, i64 %1, i64* %3)
ret i64 %5
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
bool room_free(uint64_t pos, uint64_t rooms) { return (0 == (pos & rooms)); }


x86 assembly (clang, -O0):
<room_free>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
and    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<room_free>:
xor    %eax,%eax
test   %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @room_free(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %5, %6
%8 = icmp eq i32 0, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @room_free(i32 %0, i32 %1) {
%3 = and i32 %1, %0
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned int rotate(unsigned int n, unsigned int d) {
  return (n >> d) | (n << (32 - d));
}


x86 assembly (clang, -O0):
<rotate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate>:
mov    %esi,%ecx
mov    %edi,%eax
ror    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rotate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub i32 32, %9
%11 = shl i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotate(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = sub i32 32, %1
%5 = shl i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
void vmk_WorldAssertIsSafeToBlock(void) {}


x86 assembly (clang, -O0):
<vmk_WorldAssertIsSafeToBlock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmk_WorldAssertIsSafeToBlock>:
ret

LLVM IR (-O0):
define void @vmk_WorldAssertIsSafeToBlock() {
ret void
}

LLVM IR (-O2):
define void @vmk_WorldAssertIsSafeToBlock() {
ret void
}
/* Type definitions */
struct termp {
  int dummy;
};

/* Variables and functions */
int wcwidth(int);
size_t locale_width(const struct termp *p, int c) {
  int rc;
  if (c == 31)
    c = ' ';
  rc = wcwidth(c);
  if (rc < 0)
    rc = 0;
  return rc;
}


x86 assembly (clang, -O0):
<locale_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1f,-0xc(%rbp)
jne    1130 <locale_width+0x20>
movl   $0x20,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <wcwidth@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    114c <locale_width+0x3c>
movl   $0x0,-0x10(%rbp)
movslq -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<locale_width>:
push   %rax
cmp    $0x1f,%esi
mov    $0x20,%edi
cmovne %esi,%edi
call   1030 <wcwidth@plt>
xor    %ecx,%ecx
test   %eax,%eax
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.termp = type { i32 }
define i64 @locale_width(%struct.termp* %0, i32 %1) {
%3 = alloca %struct.termp*
%4 = alloca i32
%5 = alloca i32
store %struct.termp* %0, %struct.termp** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 31
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 32, i32* %4
br label %9
9: ; preds = %8, %2
%10 = load i32, i32* %4
%11 = call i32 @wcwidth(i32 %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %5
br label %15
15: ; preds = %14, %9
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
ret i64 %17
}

LLVM IR (-O2):
%struct.termp = type { i32 }
define i64 @locale_width(%struct.termp* nocapture readnone %0, i32 %1) {
%3 = icmp eq i32 %1, 31
%4 = select i1 %3, i32 32, i32 %1
%5 = tail call i32 @wcwidth(i32 %4)
%6 = icmp sgt i32 %5, 0
%7 = select i1 %6, i32 %5, i32 0
%8 = zext i32 %7 to i64
ret i64 %8
}
void map_frames() {}


x86 assembly (clang, -O0):
<map_frames>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_frames>:
ret

LLVM IR (-O0):
define void @map_frames() {
ret void
}

LLVM IR (-O2):
define void @map_frames() {
ret void
}
int tapcfg_get_version() { return ((1 << 16) | 0); }


x86 assembly (clang, -O0):
<tapcfg_get_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tapcfg_get_version>:
mov    $0x10000,%eax
ret

LLVM IR (-O0):
define i32 @tapcfg_get_version() {
ret i32 65536
}

LLVM IR (-O2):
define i32 @tapcfg_get_version() {
ret i32 65536
}
/* Variables and functions */
int /*<<< orphan*/ assert(void **);
void unused_push(void **stack, void *ptr) {
  assert(ptr);
  assert(stack);
  *((void **)ptr) = *stack;
  *stack = ptr;
}


x86 assembly (clang, -O0):
<unused_push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unused_push>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <assert@plt>
mov    %rbx,%rdi
call   1030 <assert@plt>
mov    (%rbx),%rax
mov    %rax,(%r14)
mov    %r14,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @unused_push(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i8**
%7 = call i32 @assert(i8** %6)
%8 = load i8**, i8*** %3
%9 = call i32 @assert(i8** %8)
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
%12 = load i8*, i8** %4
%13 = bitcast i8* %12 to i8**
store i8* %11, i8** %13
%14 = load i8*, i8** %4
%15 = load i8**, i8*** %3
store i8* %14, i8** %15
ret void
}

LLVM IR (-O2):
define void @unused_push(i8** %0, i8* %1) {
%3 = bitcast i8* %1 to i8**
%4 = tail call i32 @assert(i8** %3)
%5 = tail call i32 @assert(i8** %0)
%6 = load i8*, i8** %0
store i8* %6, i8** %3
store i8* %1, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void error(const char *msg) {
  fprintf(stderr, "error: %s\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @error(i8* nocapture readnone %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
void rotr(int *a, int *b, int *c) {
  int helper;
  helper = *a;
  *a = *c;
  *c = *b;
  *b = helper;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rdi),%eax
mov    (%rdx),%ecx
mov    %ecx,(%rdi)
mov    (%rsi),%ecx
mov    %ecx,(%rdx)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
store i32 %9, i32* %7
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = load i32*, i32** %4
store i32 %11, i32* %12
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = load i32*, i32** %6
store i32 %14, i32* %15
%16 = load i32, i32* %7
%17 = load i32*, i32** %5
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %2
store i32 %5, i32* %0
%6 = load i32, i32* %1
store i32 %6, i32* %2
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *threadalloc(size_t size, int n) { return malloc(size); }


x86 assembly (clang, -O0):
<threadalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadalloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @threadalloc(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @threadalloc(i64 %0, i32 %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ lcd_draw_picture(int);
int /*<<< orphan*/ lcd_init();
int WB_lcd_init_and_display(void) {
  lcd_init();
  lcd_draw_picture(0x20007fc0);
}


x86 assembly (clang, -O0):
<WB_lcd_init_and_display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <lcd_init@plt>
mov    $0x20007fc0,%edi
call   1030 <lcd_draw_picture@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WB_lcd_init_and_display>:
push   %rax
xor    %eax,%eax
call   1040 <lcd_init@plt>
mov    $0x20007fc0,%edi
pop    %rax
jmp    1030 <lcd_draw_picture@plt>

LLVM IR (-O0):
define i32 @WB_lcd_init_and_display() {
%1 = alloca i32
%2 = call i32 (...) @lcd_init()
%3 = call i32 @lcd_draw_picture(i32 536903616)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @WB_lcd_init_and_display() {
%1 = tail call i32 (...) @lcd_init()
%2 = tail call i32 @lcd_draw_picture(i32 536903616)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ AsyncPowerManagerP__0__PowerDownCleanup__default__cleanup();
void AsyncPowerManagerP__0__PowerDownCleanup__cleanup(void) {
  AsyncPowerManagerP__0__PowerDownCleanup__default__cleanup();
}


x86 assembly (clang, -O0):
<AsyncPowerManagerP__0__PowerDownCleanup__cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AsyncPowerManagerP__0__PowerDownCleanup__default__cleanup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AsyncPowerManagerP__0__PowerDownCleanup__cleanup>:
xor    %eax,%eax
jmp    1030 <AsyncPowerManagerP__0__PowerDownCleanup__default__cleanup@plt>

LLVM IR (-O0):
define void @AsyncPowerManagerP__0__PowerDownCleanup__cleanup() {
%1 = call i32 (...) @AsyncPowerManagerP__0__PowerDownCleanup__default__cleanup()
ret void
}

LLVM IR (-O2):
define void @AsyncPowerManagerP__0__PowerDownCleanup__cleanup() {
%1 = tail call i32 (...) @AsyncPowerManagerP__0__PowerDownCleanup__default__cleanup()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int _otherbox_usage(void) {
  fputs("Usage: "
        "otherbox"
        " program [arguments...]\n"
        "       "
        "otherbox"
        " -l\n"
        "  -l	List available programs\n",
        stderr);
  return 1;
}


x86 assembly (clang, -O0):
<_otherbox_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_otherbox_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [88 x i8] c"Usage: otherbox program [arguments...]\0A otherbox -l\0A -l\09List available programs\0A\00"
@stderr = global i32 0
define i32 @_otherbox_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}

LLVM IR (-O2):
@.str = [88 x i8] c"Usage: otherbox program [arguments...]\0A otherbox -l\0A -l\09List available programs\0A\00"
@stderr = global i32 0
define i32 @_otherbox_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}
int ti_dpo_start(double const *options) { return (int)options[0] - 1; }


x86 assembly (clang, -O0):
<ti_dpo_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttsd2si (%rax),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_dpo_start>:
cvttsd2si (%rdi),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ti_dpo_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fptosi double %5 to i32
%7 = sub nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @ti_dpo_start(double* nocapture %0) {
%2 = load double, double* %0
%3 = fptosi double %2 to i32
%4 = add nsw i32 %3, -1
ret i32 %4
}
int set_tty() { return 0; }


x86 assembly (clang, -O0):
<set_tty>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_tty>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @set_tty() {
ret i32 0
}

LLVM IR (-O2):
define i32 @set_tty() {
ret i32 0
}
/* Variables and functions */
int partition(int *, int, int);
void QSort(int a[], int low, int high) {
  if (low < high) {
    int pivot = partition(a, low, high);
    QSort(a, low, pivot - 1);
    QSort(a, pivot + 1, high);
  }
}


x86 assembly (clang, -O0):
<QSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <QSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <QSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <QSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <QSort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <QSort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <QSort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @QSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @QSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @QSort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int fsync(int fd) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<fsync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsync>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @fsync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ENOSYS
%4 = call i32 @__set_errno(i32 %3)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @fsync(i32 %0) {
%2 = load i32, i32* @ENOSYS
%3 = tail call i32 @__set_errno(i32 %2)
ret i32 -1
}
const char *net_getSystem() { return "unix"; }


x86 assembly (clang, -O0):
<net_getSystem>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_getSystem>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"unix\00"
define i8* @net_getSystem() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"unix\00"
define i8* @net_getSystem() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct perf_target {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ perf_target__has_cpu(struct perf_target *);
int /*<<< orphan*/ perf_target__has_task(struct perf_target *);
bool perf_target__none(struct perf_target *target) {
  return !perf_target__has_task(target) && !perf_target__has_cpu(target);
}


x86 assembly (clang, -O0):
<perf_target__none>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <perf_target__has_task@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1159 <perf_target__none+0x39>
mov    -0x8(%rbp),%rdi
call   1030 <perf_target__has_cpu@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_target__none>:
push   %rbx
mov    %rdi,%rbx
call   1040 <perf_target__has_task@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1133 <perf_target__none+0x13>
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <perf_target__has_cpu@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
%struct.perf_target = type { i32 }
define i32 @perf_target__none(%struct.perf_target* %0) {
%2 = alloca %struct.perf_target*
store %struct.perf_target* %0, %struct.perf_target** %2
%3 = load %struct.perf_target*, %struct.perf_target** %2
%4 = call i32 @perf_target__has_task(%struct.perf_target* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load %struct.perf_target*, %struct.perf_target** %2
%8 = call i32 @perf_target__has_cpu(%struct.perf_target* %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
%struct.perf_target = type { i32 }
define i32 @perf_target__none(%struct.perf_target* %0) {
%2 = tail call i32 @perf_target__has_task(%struct.perf_target* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @perf_target__has_cpu(%struct.perf_target* %0)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}