xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void yyerror(const char *s) { fprintf(stderr, "%s\n", s); }


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyerror>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @yyerror(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int phy_read(int /*<<< orphan*/);
int /*<<< orphan*/ phy_write(int /*<<< orphan*/, int);
void phy_reset() {
  phy_write(0, 0x8000);
  while (phy_read(0) & 0x8000)
    ;
}


x86 assembly (clang, -O0):
<phy_reset>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x8000,%esi
call   1030 <phy_write@plt>
xor    %edi,%edi
call   1040 <phy_read@plt>
and    $0x8000,%eax
cmp    $0x0,%eax
je     114a <phy_reset+0x2a>
jmp    1130 <phy_reset+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<phy_reset>:
push   %rax
xor    %edi,%edi
mov    $0x8000,%esi
call   1030 <phy_write@plt>
nopl   (%rax)
xor    %edi,%edi
call   1040 <phy_read@plt>
test   $0x8000,%eax
jne    1130 <phy_reset+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @phy_reset() {
%1 = call i32 @phy_write(i32 0, i32 32768)
br label %2
2: ; preds = %6, %0
%3 = call i32 @phy_read(i32 0)
%4 = and i32 %3, 32768
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @phy_reset() {
%1 = tail call i32 @phy_write(i32 0, i32 32768)
br label %2
2: ; preds = %2, %0
%3 = tail call i32 @phy_read(i32 0)
%4 = and i32 %3, 32768
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
ret void
}
int test_imm_FFint8_reg(signed char val) {
  return ((val) & (-0xFF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FFint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff01,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FFint8_reg>:
test   $0xffffff01,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FFint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -255
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FFint8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -255
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ia_css_cpu_mem_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<ia_css_cpu_mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ia_css_cpu_mem_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ia_css_cpu_mem_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ia_css_cpu_mem_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ coco_is_nan(double const);
int coco_is_inf(const double x) {
  if (coco_is_nan(x))
    return 0;
  return ((0) || (x <= -1e22) || (x >= 1e22));
}


x86 assembly (clang, -O0):
<coco_is_inf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <coco_is_nan@plt>
cmp    $0x0,%rax
je     113d <coco_is_inf+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1177 <coco_is_inf+0x67>
mov    $0x1,%al
movsd  0xeb9(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
mov    %al,-0x11(%rbp)
jae    116c <coco_is_inf+0x5c>
movsd  -0x10(%rbp),%xmm0
movsd  0xea6(%rip),%xmm1
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coco_is_inf>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <coco_is_nan@plt>
test   %rax,%rax
sete   %al
movsd  0xed7(%rip),%xmm0
movsd  (%rsp),%xmm1
ucomisd %xmm1,%xmm0
setae  %cl
ucomisd 0xecb(%rip),%xmm1
setae  %dl
or     %cl,%dl
and    %al,%dl
movzbl %dl,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @coco_is_inf(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = call i64 @coco_is_nan(double %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %17
8: ; preds = %1
%9 = load double, double* %3
%10 = fcmp ole double %9, -1.000000e+22
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load double, double* %3
%13 = fcmp oge double %12, 1.000000e+22
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ true, %8 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
store i32 %16, i32* %2
br label %17
17: ; preds = %14, %7
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @coco_is_inf(double %0) {
%2 = tail call i64 @coco_is_nan(double %0)
%3 = icmp eq i64 %2, 0
%4 = fcmp ole double %0, -1.000000e+22
%5 = fcmp oge double %0, 1.000000e+22
%6 = or i1 %4, %5
%7 = and i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _rmdir(char *);
scalar_t__ stat(char *, struct stat *);
int fileServiceTestDone(char *path, int success) {
  struct stat dirStat;
  if (0 == stat(path, &dirStat))
    _rmdir(path);
  return success;
}


x86 assembly (clang, -O0):
<fileServiceTestDone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <stat@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jne    1153 <fileServiceTestDone+0x33>
mov    -0x8(%rbp),%rdi
call   1040 <_rmdir@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileServiceTestDone>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
jne    113d <fileServiceTestDone+0x1d>
mov    %rbx,%rdi
call   1040 <_rmdir@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @fileServiceTestDone(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.stat
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i64 @stat(i8* %6, %struct.stat* %5)
%8 = icmp eq i64 0, %7
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = call i32 @_rmdir(i8* %10)
br label %12
12: ; preds = %9, %2
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @fileServiceTestDone(i8* %0, i32 returned %1) {
%3 = alloca %struct.stat
%4 = bitcast %struct.stat* %3 to i8*
%5 = call i64 @stat(i8* %0, %struct.stat* %3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 @_rmdir(i8* %0)
br label %9
9: ; preds = %7, %2
ret i32 %1
}
int getCategoryID(char category) {
  if (category == 'F')
    return 1;
  else if (category == 'H')
    return 2;
  else if (category == 'P')
    return 3;
  else if (category == 'A')
    return 4;
}


x86 assembly (clang, -O0):
<getCategoryID>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jne    1123 <getCategoryID+0x23>
movl   $0x1,-0x4(%rbp)
jmp    117d <getCategoryID+0x7d>
movsbl -0x5(%rbp),%eax
cmp    $0x48,%eax
jne    113c <getCategoryID+0x3c>
movl   $0x2,-0x4(%rbp)
jmp    117d <getCategoryID+0x7d>
movsbl -0x5(%rbp),%eax
cmp    $0x50,%eax
jne    1155 <getCategoryID+0x55>
movl   $0x3,-0x4(%rbp)
jmp    117d <getCategoryID+0x7d>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jne    116e <getCategoryID+0x6e>
movl   $0x4,-0x4(%rbp)
jmp    117d <getCategoryID+0x7d>
jmp    1173 <getCategoryID+0x73>
jmp    1178 <getCategoryID+0x78>
jmp    117d <getCategoryID+0x7d>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCategoryID>:
cmp    $0x41,%dil
je     111d <getCategoryID+0x1d>
cmp    $0x50,%dil
je     1123 <getCategoryID+0x23>
mov    $0x1,%eax
cmp    $0x48,%dil
jne    1122 <getCategoryID+0x22>
mov    $0x2,%eax
ret
mov    $0x4,%eax
ret
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @getCategoryID(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 70
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %26
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 72
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 2, i32* %2
br label %26
13: ; preds = %8
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 80
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 3, i32* %2
br label %26
18: ; preds = %13
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 65
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 4, i32* %2
br label %26
23: ; preds = %18
br label %24
24: ; preds = %23
br label %25
25: ; preds = %24
br label %26
26: ; preds = %7, %12, %17, %22, %25
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @getCategoryID(i8 signext %0) {
switch i8 %0, label %5 [
i8 65, label %4
i8 72, label %2
i8 80, label %3
]
2: ; preds = %1
br label %5
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %2, %3, %4
%6 = phi i32 [ 2, %2 ], [ 3, %3 ], [ 4, %4 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
bool inner_point(int w, int h, int x, int y) {
  return (x >= 0) && (y >= 0) && (x < w) && (y < h);
}


x86 assembly (clang, -O0):
<inner_point>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0x11(%rbp)
jl     114b <inner_point+0x4b>
xor    %eax,%eax
cmpl   $0x0,-0x10(%rbp)
mov    %al,-0x11(%rbp)
jl     114b <inner_point+0x4b>
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    -0x4(%rbp),%ecx
mov    %al,-0x11(%rbp)
jge    114b <inner_point+0x4b>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inner_point>:
mov    %ecx,%eax
or     %edx,%eax
setns  %al
cmp    %edi,%edx
setl   %dl
and    %al,%dl
cmp    %esi,%ecx
setl   %al
and    %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @inner_point(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %4
%12 = load i32, i32* %8
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %11
%15 = load i32, i32* %7
%16 = load i32, i32* %5
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load i32, i32* %8
%20 = load i32, i32* %6
%21 = icmp slt i32 %19, %20
br label %22
22: ; preds = %18, %14, %11, %4
%23 = phi i1 [ false, %14 ], [ false, %11 ], [ false, %4 ], [ %21, %18 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @inner_point(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = or i32 %3, %2
%6 = icmp sgt i32 %5, -1
%7 = icmp slt i32 %2, %0
%8 = and i1 %7, %6
%9 = icmp slt i32 %3, %1
%10 = and i1 %9, %8
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void uDMAIntSwEventDisable(uint32_t ui32Base, uint32_t ui32IntChannel) {
  ;
  ;
  (*((volatile unsigned long
          *)(((unsigned long)(ui32Base + 0x00000520) & 0xF0000000) |
             0x02000000 |
             (((unsigned long)(ui32Base + 0x00000520) & 0x000FFFFF) << 5) |
             ((ui32IntChannel) << 2)))) = 0;
}


x86 assembly (clang, -O0):
<uDMAIntSwEventDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x520,%eax
cltq
movabs $0xf0000000,%rcx
and    %rcx,%rax
or     $0x2000000,%rax
mov    -0x4(%rbp),%ecx
add    $0x520,%ecx
movslq %ecx,%rcx
and    $0xfffff,%rcx
shl    $0x5,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%ecx
shl    $0x2,%ecx
movslq %ecx,%rcx
or     %rcx,%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAIntSwEventDisable>:
add    $0x520,%edi
mov    %edi,%eax
and    $0xf0000000,%eax
shl    $0x5,%edi
and    $0x1ffffe0,%edi
shl    $0x2,%esi
movslq %esi,%rcx
or     %rax,%rcx
or     %rdi,%rcx
or     $0x2000000,%rcx
movq   $0x0,(%rcx)
ret

LLVM IR (-O0):
define void @uDMAIntSwEventDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1312
%7 = sext i32 %6 to i64
%8 = and i64 %7, 4026531840
%9 = or i64 %8, 33554432
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1312
%12 = sext i32 %11 to i64
%13 = and i64 %12, 1048575
%14 = shl i64 %13, 5
%15 = or i64 %9, %14
%16 = load i32, i32* %4
%17 = shl i32 %16, 2
%18 = sext i32 %17 to i64
%19 = or i64 %15, %18
%20 = inttoptr i64 %19 to i64*
store volatile i64 0, i64* %20
ret void
}

LLVM IR (-O2):
define void @uDMAIntSwEventDisable(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 1312
%4 = sext i32 %3 to i64
%5 = and i64 %4, 4026531840
%6 = shl nsw i64 %4, 5
%7 = and i64 %6, 33554400
%8 = shl i32 %1, 2
%9 = sext i32 %8 to i64
%10 = or i64 %5, %9
%11 = or i64 %10, %7
%12 = or i64 %11, 33554432
%13 = inttoptr i64 %12 to i64*
store volatile i64 0, i64* %13
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emitln(char *);
int /*<<< orphan*/ factor();
int /*<<< orphan*/ match(char);
void multiply() {
  match('*');
  factor();
  emitln("pop\t%%ebx");
  emitln("mul\t%%ebx");
}


x86 assembly (clang, -O0):
<multiply>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%edi
call   1040 <match@plt>
mov    $0x0,%al
call   1050 <factor@plt>
lea    0xeb4(%rip),%rdi
call   1030 <emitln@plt>
lea    0xeb2(%rip),%rdi
call   1030 <emitln@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiply>:
push   %rax
mov    $0x2a,%edi
call   1040 <match@plt>
xor    %eax,%eax
call   1050 <factor@plt>
lea    0xeb7(%rip),%rdi
call   1030 <emitln@plt>
lea    0xeb5(%rip),%rdi
pop    %rax
jmp    1030 <emitln@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"pop\09%%ebx\00"
@.str.1 = [10 x i8] c"mul\09%%ebx\00"
define void @multiply() {
%1 = call i32 @match(i8 signext 42)
%2 = call i32 (...) @factor()
%3 = call i32 @emitln(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @emitln(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"pop\09%%ebx\00"
@.str.1 = [10 x i8] c"mul\09%%ebx\00"
define void @multiply() {
%1 = tail call i32 @match(i8 signext 42)
%2 = tail call i32 (...) @factor()
%3 = tail call i32 @emitln(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @emitln(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ find_level(int, int *, int *, int *, int *, int *, int *,
                              int *);
int comp_decomplev(int fw, int fh, int Xsiz, int Ysiz) {
  int level;
  int xmin, xmax, ymin, ymax;
  level = 0;
  xmin = ymin = 0;
  xmax = Xsiz;
  ymax = Ysiz;
  find_level(1000, &level, &fw, &fh, &xmin, &ymin, &xmax, &ymax);
  return level;
}


x86 assembly (clang, -O0):
<comp_decomplev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    $0x3e8,%edi
lea    -0x14(%rbp),%rsi
lea    -0x4(%rbp),%rdx
lea    -0x8(%rbp),%rcx
lea    -0x18(%rbp),%r8
lea    -0x20(%rbp),%r9
lea    -0x1c(%rbp),%r10
lea    -0x24(%rbp),%rax
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <find_level@plt>
mov    -0x14(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp_decomplev>:
sub    $0x28,%rsp
mov    %edi,0x24(%rsp)
mov    %esi,0x20(%rsp)
movl   $0x0,0xc(%rsp)
movl   $0x0,0x14(%rsp)
movl   $0x0,0x1c(%rsp)
mov    %edx,0x18(%rsp)
mov    %ecx,0x10(%rsp)
lea    0x10(%rsp),%rax
lea    0x18(%rsp),%r10
lea    0xc(%rsp),%rsi
lea    0x24(%rsp),%rdx
lea    0x20(%rsp),%rcx
lea    0x1c(%rsp),%r8
lea    0x14(%rsp),%r9
mov    $0x3e8,%edi
push   %rax
push   %r10
call   1030 <find_level@plt>
add    $0x10,%rsp
mov    0xc(%rsp),%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @comp_decomplev(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 0, i32* %9
store i32 0, i32* %12
store i32 0, i32* %10
%14 = load i32, i32* %7
store i32 %14, i32* %11
%15 = load i32, i32* %8
store i32 %15, i32* %13
%16 = call i32 @find_level(i32 1000, i32* %9, i32* %5, i32* %6, i32* %10, i32* %12, i32* %11, i32* %13)
%17 = load i32, i32* %9
ret i32 %17
}

LLVM IR (-O2):
define i32 @comp_decomplev(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
%12 = bitcast i32* %7 to i8*
%13 = bitcast i32* %8 to i8*
%14 = bitcast i32* %9 to i8*
%15 = bitcast i32* %10 to i8*
%16 = bitcast i32* %11 to i8*
store i32 0, i32* %7
store i32 0, i32* %10
store i32 0, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %11
%17 = call i32 @find_level(i32 1000, i32* %7, i32* %5, i32* %6, i32* %8, i32* %10, i32* %9, i32* %11)
%18 = load i32, i32* %7
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print_plain_text(const char *unsafe_text) {
  printf("plain text: %s\n", unsafe_text);
}


x86 assembly (clang, -O0):
<print_plain_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_plain_text>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"plain text: %s\0A\00"
define void @print_plain_text(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"plain text: %s\0A\00"
define void @print_plain_text(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void g_error(char *message) { printf("%s: %s\n", "cp", message); }


x86 assembly (clang, -O0):
<g_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_error>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee7(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
@.str.1 = [3 x i8] c"cp\00"
define void @g_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
@.str.1 = [3 x i8] c"cp\00"
define void @g_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
int dbg_create_files(struct ci_hdrc *ci) { return 0; }


x86 assembly (clang, -O0):
<dbg_create_files>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_create_files>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ci_hdrc = type opaque
define i32 @dbg_create_files(%struct.ci_hdrc* %0) {
%2 = alloca %struct.ci_hdrc*
store %struct.ci_hdrc* %0, %struct.ci_hdrc** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ci_hdrc = type opaque
define i32 @dbg_create_files(%struct.ci_hdrc* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void put32(uint8_t *ptr, uint32_t value) {
  ptr[0] = value & 0xFF;
  ptr[1] = (value >> 8) & 0xFF;
  ptr[2] = (value >> 16) & 0xFF;
  ptr[3] = (value >> 24) & 0xFF;
}


x86 assembly (clang, -O0):
<put32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put32>:
mov    %esi,%eax
movzbl %al,%ecx
mov    %ecx,(%rdi)
movzbl %ah,%ecx
mov    %ecx,0x4(%rdi)
mov    %esi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x8(%rdi)
shr    $0x18,%eax
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @put32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 255
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 1
store i32 %11, i32* %13
%14 = load i32, i32* %4
%15 = ashr i32 %14, 16
%16 = and i32 %15, 255
%17 = load i32*, i32** %3
%18 = getelementptr inbounds i32, i32* %17, i64 2
store i32 %16, i32* %18
%19 = load i32, i32* %4
%20 = ashr i32 %19, 24
%21 = and i32 %20, 255
%22 = load i32*, i32** %3
%23 = getelementptr inbounds i32, i32* %22, i64 3
store i32 %21, i32* %23
ret void
}

LLVM IR (-O2):
define void @put32(i32* nocapture writeonly %0, i32 %1) {
%3 = and i32 %1, 255
store i32 %3, i32* %0
%4 = lshr i32 %1, 8
%5 = and i32 %4, 255
%6 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %5, i32* %6
%7 = lshr i32 %1, 16
%8 = and i32 %7, 255
%9 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %8, i32* %9
%10 = lshr i32 %1, 24
%11 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %10, i32* %11
ret void
}
int iscntrl(int x) {
  unsigned char c = x & 0xff;
  return (c < 32) || (c >= 127 && c <= 160);
}


x86 assembly (clang, -O0):
<iscntrl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x6(%rbp)
jl     114b <iscntrl+0x4b>
movzbl -0x5(%rbp),%ecx
xor    %eax,%eax
cmp    $0x7f,%ecx
mov    %al,-0x7(%rbp)
jl     1145 <iscntrl+0x45>
movzbl -0x5(%rbp),%eax
cmp    $0xa0,%eax
setle  %al
mov    %al,-0x7(%rbp)
mov    -0x7(%rbp),%al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscntrl>:
movzbl %dil,%eax
cmp    $0x20,%eax
setb   %cl
add    $0xffffff81,%eax
cmp    $0x22,%eax
setb   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @iscntrl(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 255
%6 = trunc i32 %5 to i8
store i8 %6, i8* %3
%7 = load i8, i8* %3
%8 = zext i8 %7 to i32
%9 = icmp slt i32 %8, 32
br i1 %9, label %20, label %10
10: ; preds = %1
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = icmp sge i32 %12, 127
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = icmp sle i32 %16, 160
br label %18
18: ; preds = %14, %10
%19 = phi i1 [ false, %10 ], [ %17, %14 ]
br label %20
20: ; preds = %18, %1
%21 = phi i1 [ true, %1 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @iscntrl(i32 %0) {
%2 = and i32 %0, 255
%3 = icmp ult i32 %2, 32
%4 = add nsw i32 %2, -127
%5 = icmp ult i32 %4, 34
%6 = select i1 %3, i1 true, i1 %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
char *strchr(char *, char);
char *trunc_str(char *s, char c) {
  char *ch = strchr(s, c);
  if (ch != NULL) {
    *ch = '\0';
  }
  return s;
}


x86 assembly (clang, -O0):
<trunc_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1145 <trunc_str+0x35>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trunc_str>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strchr@plt>
test   %rax,%rax
je     1121 <trunc_str+0x11>
movb   $0x0,(%rax)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @trunc_str(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %4
%8 = call i8* @strchr(i8* %6, i8 signext %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i8*, i8** %5
store i8 0, i8* %12
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define i8* @trunc_str(i8* returned %0, i8 signext %1) {
%3 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %6, label %5
5: ; preds = %2
store i8 0, i8* %3
br label %6
6: ; preds = %5, %2
ret i8* %0
}
void rop3_60_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = T ^ S;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_60_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_60_0_1>:
mov    %edx,%eax
not    %al
and    %sil,%al
not    %sil
and    %dl,%sil
and    (%rdi),%sil
or     %al,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_60_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = xor i32 %9, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %7
%14 = load i8, i8* %7
%15 = zext i8 %14 to i32
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = and i32 %15, %17
%19 = load i8, i8* %7
%20 = zext i8 %19 to i32
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = xor i32 %22, -1
%24 = and i32 %20, %23
%25 = or i32 %18, %24
%26 = load i8, i8* %6
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8*, i8** %4
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = and i32 %31, %34
%36 = or i32 %25, %35
%37 = trunc i32 %36 to i8
%38 = load i8*, i8** %4
store i8 %37, i8* %38
ret void
}

LLVM IR (-O2):
define void @rop3_60_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, -1
%5 = and i8 %4, %1
%6 = xor i8 %1, -1
%7 = and i8 %6, %2
%8 = load i8, i8* %0
%9 = and i8 %7, %8
%10 = or i8 %9, %5
store i8 %10, i8* %0
ret void
}
void platform_udc_clk_finalize(struct platform_device *pdev) {}


x86 assembly (clang, -O0):
<platform_udc_clk_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_udc_clk_finalize>:
ret

LLVM IR (-O0):
%struct.platform_device = type opaque
define void @platform_udc_clk_finalize(%struct.platform_device* %0) {
%2 = alloca %struct.platform_device*
store %struct.platform_device* %0, %struct.platform_device** %2
ret void
}

LLVM IR (-O2):
%struct.platform_device = type opaque
define void @platform_udc_clk_finalize(%struct.platform_device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x4a() {
  Assert_real((isprint(74)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              375, ("isprint should be 1 for J"));
}


x86 assembly (clang, -O0):
<t_isprint_0x4a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4a,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x177,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x4a>:
push   %rax
mov    $0x4a,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x177,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for J\00"
define void @t_isprint_0x4a() {
%1 = call i32 @isprint(i32 74)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 375, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for J\00"
define void @t_isprint_0x4a() {
%1 = tail call i32 @isprint(i32 74)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 375, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
double exp(double);
double module_libc_exp(double x) { return exp(x); }


x86 assembly (clang, -O0):
<module_libc_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_libc_exp>:
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @module_libc_exp(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
ret double %4
}

LLVM IR (-O2):
define double @module_libc_exp(double %0) {
%2 = tail call double @exp(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ syscall(int, int, int /*<<< orphan*/);
int texit(int v) { syscall(57, v, 0); }


x86 assembly (clang, -O0):
<texit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x39,%edi
xor    %edx,%edx
call   1030 <syscall@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<texit>:
mov    %edi,%esi
mov    $0x39,%edi
xor    %edx,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @texit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @syscall(i32 57, i32 %4, i32 0)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @texit(i32 %0) {
%2 = tail call i32 @syscall(i32 57, i32 %0, i32 0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ SPI0_DriverIRQHandler();
__attribute__((weak)) void SPI0_IRQHandler(void) { SPI0_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<SPI0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SPI0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <SPI0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @SPI0_IRQHandler() {
%1 = call i32 (...) @SPI0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @SPI0_IRQHandler() {
%1 = tail call i32 (...) @SPI0_DriverIRQHandler()
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ y;
};
struct TYPE_4__ {
  TYPE_1__ xcreatewindow;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xcreatewindow_y(void *_p) {
  return (int)((XEvent *)_p)->xcreatewindow.y;
}


x86 assembly (clang, -O0):
<get_XEvent_xcreatewindow_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xcreatewindow_y>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xcreatewindow_y(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xcreatewindow_y(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
unsigned int SuperFastHash(char *, int);
unsigned int hash(unsigned long key) {
  return SuperFastHash((char *)&key, sizeof(unsigned long));
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <SuperFastHash@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
mov    $0x8,%esi
call   1030 <SuperFastHash@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hash(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = bitcast i64* %2 to i8*
%4 = call i32 @SuperFastHash(i8* %3, i32 8)
ret i32 %4
}

LLVM IR (-O2):
define i32 @hash(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = bitcast i64* %2 to i8*
%4 = call i32 @SuperFastHash(i8* %3, i32 8)
ret i32 %4
}
int _mpyhir(int src1, int src2) {
  short s1 = src1 >> 16;
  long long result = ((long long)src2) * s1 + (1 << 14);
  result >>= 15;
  return result;
}


x86 assembly (clang, -O0):
<_mpyhir>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
mov    %ax,-0xa(%rbp)
movslq -0x8(%rbp),%rax
movswq -0xa(%rbp),%rcx
imul   %rcx,%rax
add    $0x4000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
sar    $0xf,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mpyhir>:
shr    $0x10,%edi
movslq %esi,%rcx
movswq %di,%rax
imul   %rcx,%rax
add    $0x4000,%rax
shr    $0xf,%rax
ret

LLVM IR (-O0):
define i32 @_mpyhir(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i16
%6 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = ashr i32 %7, 16
%9 = trunc i32 %8 to i16
store i16 %9, i16* %5
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = load i16, i16* %5
%13 = sext i16 %12 to i64
%14 = mul nsw i64 %11, %13
%15 = add nsw i64 %14, 16384
store i64 %15, i64* %6
%16 = load i64, i64* %6
%17 = ashr i64 %16, 15
store i64 %17, i64* %6
%18 = load i64, i64* %6
%19 = trunc i64 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @_mpyhir(i32 %0, i32 %1) {
%3 = lshr i32 %0, 16
%4 = zext i32 %3 to i64
%5 = sext i32 %1 to i64
%6 = shl nuw i64 %4, 48
%7 = ashr exact i64 %6, 48
%8 = mul nsw i64 %7, %5
%9 = add nsw i64 %8, 16384
%10 = lshr i64 %9, 15
%11 = trunc i64 %10 to i32
ret i32 %11
}
void check_sig(r) int r;
{
  if (r != 0)
    efaterror("signal handling");
}


x86 assembly (clang, -O0):
<check_sig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1133 <check_sig+0x23>
lea    0xed4(%rip),%rdi
mov    $0x0,%al
call   1030 <efaterror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_sig>:
test   %edi,%edi
je     1122 <check_sig+0x12>
lea    0xee5(%rip),%rdi
xor    %eax,%eax
jmp    1030 <efaterror@plt>
ret

LLVM IR (-O0):
@.str = [16 x i8] c"signal handling\00"
define void @check_sig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @efaterror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"signal handling\00"
define void @check_sig(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @efaterror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
ret void
}
void foo577() {}


x86 assembly (clang, -O0):
<foo577>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo577>:
ret

LLVM IR (-O0):
define void @foo577() {
ret void
}

LLVM IR (-O2):
define void @foo577() {
ret void
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
scalar_t__ S_ISDIR(int /*<<< orphan*/);
int /*<<< orphan*/ assert(char const *);
scalar_t__ stat(char const *, struct stat *);
bool is_directory(const char *directory) {
  struct stat s;
  assert(directory);
  if (stat(directory, &s) < 0) {
    return false;
  }
  if (S_ISDIR(s.st_mode)) {
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<is_directory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1050 <stat@plt>
cmp    $0x0,%rax
jge    1168 <is_directory+0x38>
movl   $0x0,-0x4(%rbp)
jmp    118d <is_directory+0x5d>
mov    -0x18(%rbp),%edi
call   1030 <S_ISDIR@plt>
cmp    $0x0,%rax
je     1186 <is_directory+0x56>
movl   $0x1,-0x4(%rbp)
jmp    118d <is_directory+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_directory>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1040 <assert@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <stat@plt>
test   %rax,%rax
js     1165 <is_directory+0x35>
mov    0x8(%rsp),%edi
call   1030 <S_ISDIR@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
jmp    1167 <is_directory+0x37>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @is_directory(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %3
%8 = call i64 @stat(i8* %7, %struct.stat* %4)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %18
11: ; preds = %1
%12 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%13 = load i32, i32* %12
%14 = call i64 @S_ISDIR(i32 %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %11
store i32 1, i32* %2
br label %18
17: ; preds = %11
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16, %10
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @is_directory(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = tail call i32 @assert(i8* %0)
%5 = call i64 @stat(i8* %0, %struct.stat* %2)
%6 = icmp slt i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%9 = load i32, i32* %8
%10 = call i64 @S_ISDIR(i32 %9)
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %7, %1
%14 = phi i32 [ 0, %1 ], [ %12, %7 ]
ret i32 %14
}
void ADC14_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<ADC14_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <ADC14_IRQHandler+0x9>
jmp    1109 <ADC14_IRQHandler+0x9>

x86 assembly (clang, -O2):
<ADC14_IRQHandler>:
jmp    1100 <ADC14_IRQHandler>

LLVM IR (-O0):
define void @ADC14_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @ADC14_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ test_connection_buffer();
int main(int argc, char **argv) {
  test_connection_buffer();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test_connection_buffer@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_connection_buffer@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_connection_buffer()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_connection_buffer()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void dummy_ncp() { printf("\n"); }


x86 assembly (clang, -O0):
<dummy_ncp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_ncp>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @dummy_ncp() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @dummy_ncp() {
%1 = tail call i32 @putchar(i32 10)
ret void
}
int gl_fx_dummy_function_texman(void) { return 0; }


x86 assembly (clang, -O0):
<gl_fx_dummy_function_texman>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_fx_dummy_function_texman>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gl_fx_dummy_function_texman() {
ret i32 0
}

LLVM IR (-O2):
define i32 @gl_fx_dummy_function_texman() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ INIR(int, int, int, int);
void op_ED_0xb2(void) {
  INIR(12, 17, 6, 9);
  return;
}


x86 assembly (clang, -O0):
<op_ED_0xb2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
mov    $0x11,%esi
mov    $0x6,%edx
mov    $0x9,%ecx
call   1030 <INIR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ED_0xb2>:
mov    $0xc,%edi
mov    $0x11,%esi
mov    $0x6,%edx
mov    $0x9,%ecx
jmp    1030 <INIR@plt>

LLVM IR (-O0):
define void @op_ED_0xb2() {
%1 = call i32 @INIR(i32 12, i32 17, i32 6, i32 9)
ret void
}

LLVM IR (-O2):
define void @op_ED_0xb2() {
%1 = tail call i32 @INIR(i32 12, i32 17, i32 6, i32 9)
ret void
}
/* Variables and functions */
int f471(int *);
int f472(int *p) { return f471(p); }


x86 assembly (clang, -O0):
<f472>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f471@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f472>:
jmp    1030 <f471@plt>

LLVM IR (-O0):
define i32 @f472(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f471(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f472(i32* %0) {
%2 = tail call i32 @f471(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ getpid();
scalar_t__ getppid();
int /*<<< orphan*/ printf(char *, long, long, long);
void parent_process(pid_t pid) {
  printf("(PID %ld) Padre  in esecuzione, il Padre: %ld - pid=%ld\n",
         (long)getpid(), (long)getppid(), (long)pid);
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<parent_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1050 <getppid@plt>
mov    -0x10(%rbp),%rsi
mov    %rax,%rdx
mov    -0x8(%rbp),%rcx
lea    0xe90(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e64(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<parent_process>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1050 <getppid@plt>
lea    0xea1(%rip),%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
mov    %r14,%rcx
call   1040 <printf@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"(PID %ld) Padre in esecuzione, il Padre: %ld - pid=%ld\0A\00"
@EXIT_SUCCESS = global i32 0
define void @parent_process(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i64 (...) @getpid()
%4 = call i64 (...) @getppid()
%5 = load i64, i64* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i64 %3, i64 %4, i64 %5)
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@.str = [57 x i8] c"(PID %ld) Padre in esecuzione, il Padre: %ld - pid=%ld\0A\00"
@EXIT_SUCCESS = global i32 0
define void @parent_process(i64 %0) {
%2 = tail call i64 (...) @getpid()
%3 = tail call i64 (...) @getppid()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i64 %2, i64 %3, i64 %0)
%5 = load i32, i32* @EXIT_SUCCESS
%6 = tail call i32 @exit(i32 %5)
unreachable
}