xunge/DecIR huggingface dataset:
/* Variables and functions */
float __builtin_allegrex_sqrt_s(float);
float pspFpuSqrt(float fs) { return (__builtin_allegrex_sqrt_s(fs)); }


x86 assembly (clang, -O0):
<pspFpuSqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__builtin_allegrex_sqrt_s@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pspFpuSqrt>:
jmp    1030 <__builtin_allegrex_sqrt_s@plt>

LLVM IR (-O0):
define float @pspFpuSqrt(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__builtin_allegrex_sqrt_s(float %3)
ret float %4
}

LLVM IR (-O2):
define float @pspFpuSqrt(float %0) {
%2 = tail call float @__builtin_allegrex_sqrt_s(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x3a() {
  Assert_real((isodigit(58) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              295, ("isodigit should be 0 for :"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x3a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x127,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x3a>:
push   %rax
mov    $0x3a,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x127,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for :\00"
define void @t_isodigit_0x3a() {
%1 = call i64 @isodigit(i32 58)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 295, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for :\00"
define void @t_isodigit_0x3a() {
%1 = tail call i64 @isodigit(i32 58)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 295, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int fcs_u2p_flipped_status(const char *str) {
  while (*str != '\0') {
    if ((*str != ' ') && (*str != '\t')) {
      return (*str == '<');
    }
    str++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<fcs_u2p_flipped_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1163 <fcs_u2p_flipped_status+0x63>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
je     1152 <fcs_u2p_flipped_status+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x9,%eax
je     1152 <fcs_u2p_flipped_status+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x3c,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    116a <fcs_u2p_flipped_status+0x6a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <fcs_u2p_flipped_status+0x8>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcs_u2p_flipped_status>:
jmp    1114 <fcs_u2p_flipped_status+0x14>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    $0x1,%rdi
movzbl (%rdi),%ecx
cmp    $0x9,%cl
je     1110 <fcs_u2p_flipped_status+0x10>
cmp    $0x20,%cl
je     1110 <fcs_u2p_flipped_status+0x10>
xor    %eax,%eax
test   %cl,%cl
je     112d <fcs_u2p_flipped_status+0x2d>
cmp    $0x3c,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @fcs_u2p_flipped_status(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %25, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %28
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 32
br i1 %13, label %14, label %25
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 9
br i1 %18, label %19, label %25
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %22, 60
%24 = zext i1 %23 to i32
store i32 %24, i32* %2
br label %29
25: ; preds = %14, %9
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %3
br label %4
28: ; preds = %4
store i32 0, i32* %2
br label %29
29: ; preds = %28, %19
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @fcs_u2p_flipped_status(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %9, %8 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %10
i8 32, label %8
i8 9, label %8
]
5: ; preds = %2
%6 = icmp eq i8 %4, 60
%7 = zext i1 %6 to i32
br label %10
8: ; preds = %2, %2
%9 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
10: ; preds = %2, %5
%11 = phi i32 [ %7, %5 ], [ 0, %2 ]
ret i32 %11
}
/* Type definitions */
struct pollfd {
  int dummy;
};
struct _session {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ msglog(int, char *, int);
int stop_session(int, struct pollfd *, struct pollfd *, struct _session *);
int inner_failure(int sesno, struct pollfd *in_fd, struct pollfd *out_fd,
                  struct _session *sess) {
  msglog(1, "[%i.?] <session failure>\n", sesno);
  return stop_session(sesno, in_fd, out_fd, sess);
}


x86 assembly (clang, -O0):
<inner_failure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%edi
lea    0xeba(%rip),%rsi
call   1030 <msglog@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <stop_session@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inner_failure>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%rbx
mov    %edi,%ebp
lea    0xec7(%rip),%rsi
mov    $0x1,%edi
mov    %ebp,%edx
call   1030 <msglog@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <stop_session@plt>

LLVM IR (-O0):
%struct.pollfd = type { i32 }
%struct._session = type { i32 }
@.str = [26 x i8] c"[%i.?] <session failure>\0A\00"
define i32 @inner_failure(i32 %0, %struct.pollfd* %1, %struct.pollfd* %2, %struct._session* %3) {
%5 = alloca i32
%6 = alloca %struct.pollfd*
%7 = alloca %struct.pollfd*
%8 = alloca %struct._session*
store i32 %0, i32* %5
store %struct.pollfd* %1, %struct.pollfd** %6
store %struct.pollfd* %2, %struct.pollfd** %7
store %struct._session* %3, %struct._session** %8
%9 = load i32, i32* %5
%10 = call i32 @msglog(i32 1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %5
%12 = load %struct.pollfd*, %struct.pollfd** %6
%13 = load %struct.pollfd*, %struct.pollfd** %7
%14 = load %struct._session*, %struct._session** %8
%15 = call i32 @stop_session(i32 %11, %struct.pollfd* %12, %struct.pollfd* %13, %struct._session* %14)
ret i32 %15
}

LLVM IR (-O2):
%struct.pollfd = type { i32 }
%struct._session = type { i32 }
@.str = [26 x i8] c"[%i.?] <session failure>\0A\00"
define i32 @inner_failure(i32 %0, %struct.pollfd* %1, %struct.pollfd* %2, %struct._session* %3) {
%5 = tail call i32 @msglog(i32 1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %0)
%6 = tail call i32 @stop_session(i32 %0, %struct.pollfd* %1, %struct.pollfd* %2, %struct._session* %3)
ret i32 %6
}
void release_log_lock(void) {}


x86 assembly (clang, -O0):
<release_log_lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<release_log_lock>:
ret

LLVM IR (-O0):
define void @release_log_lock() {
ret void
}

LLVM IR (-O2):
define void @release_log_lock() {
ret void
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void mmio_or(uint32_t reg, uint32_t data) { *(volatile uint32_t *)reg |= data; }


x86 assembly (clang, -O0):
<mmio_or>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmio_or>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,(%rcx)
ret

LLVM IR (-O0):
define void @mmio_or(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, %5
store volatile i64 %9, i64* %7
ret void
}

LLVM IR (-O2):
define void @mmio_or(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, %5
store volatile i64 %9, i64* %7
ret void
}
void pixel_alpha_to_grey(float *p0, float *p1) {
  int ic;
  for (ic = 0; ic < 4; ic++)
    p1[ic] = p0[3];
}


x86 assembly (clang, -O0):
<pixel_alpha_to_grey>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jge    1141 <pixel_alpha_to_grey+0x41>
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <pixel_alpha_to_grey+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixel_alpha_to_grey>:
movss  0xc(%rdi),%xmm0
movss  %xmm0,(%rsi)
movss  0xc(%rdi),%xmm0
movss  %xmm0,0x4(%rsi)
movss  0xc(%rdi),%xmm0
movss  %xmm0,0x8(%rsi)
movss  0xc(%rdi),%xmm0
movss  %xmm0,0xc(%rsi)
ret

LLVM IR (-O0):
define void @pixel_alpha_to_grey(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca i32
store float* %0, float** %3
store float* %1, float** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 4
br i1 %8, label %9, label %20
9: ; preds = %6
%10 = load float*, float** %3
%11 = getelementptr inbounds float, float* %10, i64 3
%12 = load float, float* %11
%13 = load float*, float** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds float, float* %13, i64 %15
store float %12, float* %16
br label %17
17: ; preds = %9
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @pixel_alpha_to_grey(float* nocapture %0, float* nocapture writeonly %1) {
%3 = getelementptr inbounds float, float* %0, i64 3
%4 = load float, float* %3
store float %4, float* %1
%5 = load float, float* %3
%6 = getelementptr inbounds float, float* %1, i64 1
store float %5, float* %6
%7 = load float, float* %3
%8 = getelementptr inbounds float, float* %1, i64 2
store float %7, float* %8
%9 = load float, float* %3
%10 = getelementptr inbounds float, float* %1, i64 3
store float %9, float* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lua_error(char *);
void *malloc(size_t);
void *luaI_malloc(unsigned long size) {
  void *block = malloc((size_t)size);
  if (block == 0)
    lua_error("not enough memory");
  return block;
}


x86 assembly (clang, -O0):
<luaI_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <luaI_malloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <lua_error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<luaI_malloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <luaI_malloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <lua_error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"not enough memory\00"
define i8* @luaI_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @lua_error(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [18 x i8] c"not enough memory\00"
define noalias i8* @luaI_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @lua_error(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void ff_hevc_put_hevc_bi_pel_pixels48_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_pel_pixels48_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_pel_pixels48_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_pel_pixels48_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_pel_pixels48_8_avx2() {
ret void
}
unsigned short GetBit(unsigned short num, unsigned short pos) {
  unsigned short bitmask = (1 << pos);
  return (num & bitmask) ? 1 : 0;
}


x86 assembly (clang, -O0):
<GetBit>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %ax,-0x6(%rbp)
movzwl -0x2(%rbp),%edx
movzwl -0x6(%rbp),%eax
and    %eax,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetBit>:
xor    %eax,%eax
bt     %esi,%edi
setb   %al
ret

LLVM IR (-O0):
define zeroext i16 @GetBit(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = shl i32 1, %7
%9 = trunc i32 %8 to i16
store i16 %9, i16* %5
%10 = load i16, i16* %3
%11 = zext i16 %10 to i32
%12 = load i16, i16* %5
%13 = zext i16 %12 to i32
%14 = and i32 %11, %13
%15 = icmp ne i32 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 1, i32 0
%18 = trunc i32 %17 to i16
ret i16 %18
}

LLVM IR (-O2):
define zeroext i16 @GetBit(i16 zeroext %0, i16 zeroext %1) {
%3 = zext i16 %1 to i32
%4 = shl nuw i32 1, %3
%5 = zext i16 %0 to i32
%6 = and i32 %4, %5
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i16
ret i16 %8
}
int SIM_power_organizational_parameters_valid(rows, cols, Ndwl, Ndbl, Nspd,
                                              Ntwl, Ntbl, Ntspd)
int rows, cols, Ndwl, Ndbl, Nspd, Ntwl, Ntbl, Ntspd;
{
  if (Ndwl * Ndbl > (8))
    return (0);
  if (Ntwl * Ntbl > (8))
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<SIM_power_organizational_parameters_valid>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
imul   -0x14(%rbp),%eax
cmp    $0x8,%eax
jle    113a <SIM_power_organizational_parameters_valid+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    115d <SIM_power_organizational_parameters_valid+0x5d>
mov    -0x1c(%rbp),%eax
imul   0x10(%rbp),%eax
cmp    $0x8,%eax
jle    1156 <SIM_power_organizational_parameters_valid+0x56>
movl   $0x0,-0x4(%rbp)
jmp    115d <SIM_power_organizational_parameters_valid+0x5d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIM_power_organizational_parameters_valid>:
imul   %ecx,%edx
cmp    $0x9,%edx
setl   %al
imul   0x8(%rsp),%r9d
cmp    $0x9,%r9d
setl   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @SIM_power_organizational_parameters_valid(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i32 %3, i32* %13
store i32 %4, i32* %14
store i32 %5, i32* %15
store i32 %6, i32* %16
store i32 %7, i32* %17
%18 = load i32, i32* %12
%19 = load i32, i32* %13
%20 = mul nsw i32 %18, %19
%21 = icmp sgt i32 %20, 8
br i1 %21, label %22, label %23
22: ; preds = %8
store i32 0, i32* %9
br label %30
23: ; preds = %8
%24 = load i32, i32* %15
%25 = load i32, i32* %16
%26 = mul nsw i32 %24, %25
%27 = icmp sgt i32 %26, 8
br i1 %27, label %28, label %29
28: ; preds = %23
store i32 0, i32* %9
br label %30
29: ; preds = %23
store i32 1, i32* %9
br label %30
30: ; preds = %29, %28, %22
%31 = load i32, i32* %9
ret i32 %31
}

LLVM IR (-O2):
define i32 @SIM_power_organizational_parameters_valid(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = mul nsw i32 %3, %2
%10 = icmp slt i32 %9, 9
%11 = mul nsw i32 %6, %5
%12 = icmp slt i32 %11, 9
%13 = select i1 %10, i1 %12, i1 false
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ array_complete_dcl();
int /*<<< orphan*/ get_lexval();
int yyselect();
variable() {
  switch (yyselect()) {
  case 70: {
    get_lexval();
  } break;
  case 71: {
    get_lexval();
    array_complete_dcl();
  } break;
  }
}


x86 assembly (clang, -O0):
<variable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1040 <yyselect@plt>
mov    %eax,%ecx
mov    %ecx,-0x8(%rbp)
sub    $0x46,%eax
je     1163 <variable+0x33>
jmp    1152 <variable+0x22>
mov    -0x8(%rbp),%eax
sub    $0x47,%eax
je     116f <variable+0x3f>
jmp    117d <variable+0x4d>
mov    $0x0,%al
call   1050 <get_lexval@plt>
jmp    117d <variable+0x4d>
mov    $0x0,%al
call   1050 <get_lexval@plt>
mov    $0x0,%al
call   1030 <array_complete_dcl@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<variable>:
push   %rax
xor    %eax,%eax
call   1040 <yyselect@plt>
cmp    $0x47,%eax
je     114b <variable+0x1b>
cmp    $0x46,%eax
jne    1159 <variable+0x29>
xor    %eax,%eax
call   1050 <get_lexval@plt>
pop    %rcx
ret
xor    %eax,%eax
call   1050 <get_lexval@plt>
xor    %eax,%eax
call   1030 <array_complete_dcl@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @variable() {
%1 = alloca i32
%2 = call i32 (...) @yyselect()
switch i32 %2, label %8 [
i32 70, label %3
i32 71, label %5
]
3: ; preds = %0
%4 = call i32 (...) @get_lexval()
br label %8
5: ; preds = %0
%6 = call i32 (...) @get_lexval()
%7 = call i32 (...) @array_complete_dcl()
br label %8
8: ; preds = %0, %5, %3
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @variable() {
%1 = tail call i32 (...) @yyselect()
switch i32 %1, label %7 [
i32 70, label %2
i32 71, label %4
]
2: ; preds = %0
%3 = tail call i32 (...) @get_lexval()
br label %7
4: ; preds = %0
%5 = tail call i32 (...) @get_lexval()
%6 = tail call i32 (...) @array_complete_dcl()
br label %7
7: ; preds = %0, %4, %2
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ test_basics();
int /*<<< orphan*/ test_copying_keys();
int /*<<< orphan*/ test_copying_vals();
int /*<<< orphan*/ test_deletion();
int /*<<< orphan*/ test_get_modified();
int /*<<< orphan*/ test_get_nonexistant();
int /*<<< orphan*/ test_lru();
int /*<<< orphan*/ test_too_big();
int main(int argc, char *argv[]) {
  test_basics();
  test_get_modified();
  test_deletion();
  test_get_nonexistant();
  test_too_big();
  test_copying_keys();
  test_copying_vals();
  test_lru();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1080 <test_basics@plt>
mov    $0x0,%al
call   1090 <test_get_modified@plt>
mov    $0x0,%al
call   1050 <test_deletion@plt>
mov    $0x0,%al
call   1040 <test_get_nonexistant@plt>
mov    $0x0,%al
call   10a0 <test_too_big@plt>
mov    $0x0,%al
call   1070 <test_copying_keys@plt>
mov    $0x0,%al
call   1030 <test_copying_vals@plt>
mov    $0x0,%al
call   1060 <test_lru@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1080 <test_basics@plt>
xor    %eax,%eax
call   1090 <test_get_modified@plt>
xor    %eax,%eax
call   1050 <test_deletion@plt>
xor    %eax,%eax
call   1040 <test_get_nonexistant@plt>
xor    %eax,%eax
call   10a0 <test_too_big@plt>
xor    %eax,%eax
call   1070 <test_copying_keys@plt>
xor    %eax,%eax
call   1030 <test_copying_vals@plt>
xor    %eax,%eax
call   1060 <test_lru@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @test_basics()
%6 = call i32 (...) @test_get_modified()
%7 = call i32 (...) @test_deletion()
%8 = call i32 (...) @test_get_nonexistant()
%9 = call i32 (...) @test_too_big()
%10 = call i32 (...) @test_copying_keys()
%11 = call i32 (...) @test_copying_vals()
%12 = call i32 (...) @test_lru()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_basics()
%4 = tail call i32 (...) @test_get_modified()
%5 = tail call i32 (...) @test_deletion()
%6 = tail call i32 (...) @test_get_nonexistant()
%7 = tail call i32 (...) @test_too_big()
%8 = tail call i32 (...) @test_copying_keys()
%9 = tail call i32 (...) @test_copying_vals()
%10 = tail call i32 (...) @test_lru()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xd0() {
  Assert_real((isalpha(208) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1045, ("isalpha should be 0 for 0xd0"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xd0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd0,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x415,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xd0>:
push   %rax
mov    $0xd0,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x415,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xd0\00"
define void @t_isalpha_0xd0() {
%1 = call i64 @isalpha(i32 208)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1045, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xd0\00"
define void @t_isalpha_0xd0() {
%1 = tail call i64 @isalpha(i32 208)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1045, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void t6(int qz, int wh) {
  int jl = wh;
  while (1.0 / 0 < 1) {
    qz = wh * (wh + 2);
    while (wh < 1)
      jl = 0;
  }
  while (qz < 1)
    qz = jl * wh;
}


x86 assembly (clang, -O0):
<t6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
test   $0x1,%al
jne    111f <t6+0x1f>
jmp    1149 <t6+0x49>
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x2,%ecx
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x1,-0x8(%rbp)
jge    1144 <t6+0x44>
movl   $0x0,-0xc(%rbp)
jmp    112e <t6+0x2e>
jmp    1110 <t6+0x10>
jmp    114e <t6+0x4e>
cmpl   $0x1,-0x4(%rbp)
jge    1167 <t6+0x67>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114e <t6+0x4e>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t6>:
test   %edi,%edi
jg     1112 <t6+0x12>
imul   %esi,%esi
test   %esi,%esi
jne    1112 <t6+0x12>
nopl   0x0(%rax,%rax,1)
jmp    1110 <t6+0x10>
ret

LLVM IR (-O0):
define void @t6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
store i32 %6, i32* %5
br label %7
7: ; preds = %17, %2
br i1 false, label %8, label %18
8: ; preds = %7
%9 = load i32, i32* %4
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 2
%12 = mul nsw i32 %9, %11
store i32 %12, i32* %3
br label %13
13: ; preds = %16, %8
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 1
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 0, i32* %5
br label %13
17: ; preds = %13
br label %7
18: ; preds = %7
br label %19
19: ; preds = %22, %18
%20 = load i32, i32* %3
%21 = icmp slt i32 %20, 1
br i1 %21, label %22, label %26
22: ; preds = %19
%23 = load i32, i32* %5
%24 = load i32, i32* %4
%25 = mul nsw i32 %23, %24
store i32 %25, i32* %3
br label %19
26: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @t6(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 1
%4 = mul nsw i32 %1, %1
%5 = icmp eq i32 %4, 0
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %7, label %8
7: ; preds = %2, %7
br label %7
8: ; preds = %2
ret void
}
int test_imm_7Aint32_mem(int *val) {
  return ((*val) & (0x7A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Aint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x7a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Aint32_mem>:
testb  $0x7a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Aint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 122
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Aint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 122
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void scuClockControl(const unsigned int clkcr) {
  (*((volatile unsigned int *const)((0x40010000 + 0) + 0x24))) = 0x00C0;
  (*((volatile unsigned int *const)((0x40010000 + 0x300) + 0x00))) = clkcr;
  (*((volatile unsigned int *const)((0x40010000 + 0) + 0x24))) = 0x00C3;
  while ((*((volatile unsigned int *const)((0x40010000 + 0x300) + 0x00))) &
         ((1 << 31) | (1 << 30)))
    ;
}


x86 assembly (clang, -O0):
<scuClockControl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x40010024,%eax
movl   $0xc0,(%rax)
mov    -0x4(%rbp),%ecx
mov    $0x40010300,%eax
mov    %ecx,(%rax)
mov    $0x40010024,%eax
movl   $0xc3,(%rax)
mov    $0x40010300,%eax
mov    (%rax),%eax
and    $0xc0000000,%eax
cmp    $0x0,%eax
je     1141 <scuClockControl+0x41>
jmp    1127 <scuClockControl+0x27>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scuClockControl>:
movl   $0xc0,0x40010024
mov    %edi,0x40010300
movl   $0xc3,0x40010024
nopl   (%rax)
mov    0x40010300,%eax
cmp    $0x3fffffff,%eax
ja     1120 <scuClockControl+0x20>
ret

LLVM IR (-O0):
define void @scuClockControl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i32 192, i32* inttoptr (i64 1073807396 to i32*)
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1073808128 to i32*)
store volatile i32 195, i32* inttoptr (i64 1073807396 to i32*)
br label %4
4: ; preds = %8, %1
%5 = load volatile i32, i32* inttoptr (i64 1073808128 to i32*)
%6 = and i32 %5, -1073741824
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @scuClockControl(i32 %0) {
store volatile i32 192, i32* inttoptr (i64 1073807396 to i32*)
store volatile i32 %0, i32* inttoptr (i64 1073808128 to i32*)
store volatile i32 195, i32* inttoptr (i64 1073807396 to i32*)
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 1073808128 to i32*)
%4 = icmp ult i32 %3, 1073741824
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int /*<<< orphan*/ extended_addr_compare(int /*<<< orphan*/ const *,
                                         int /*<<< orphan*/ const *);
int /*<<< orphan*/ short_addr_compare(int /*<<< orphan*/ const *,
                                      int /*<<< orphan*/ const *);
int8_t addr_compare(const uint8_t *p_first_addr, const uint8_t *p_second_addr,
                    bool extended) {
  if (extended) {
    return extended_addr_compare(p_first_addr, p_second_addr);
  } else {
    return short_addr_compare(p_first_addr, p_second_addr);
  }
}


x86 assembly (clang, -O0):
<addr_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1152 <addr_compare+0x32>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <extended_addr_compare@plt>
mov    %eax,-0x4(%rbp)
jmp    1162 <addr_compare+0x42>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <short_addr_compare@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addr_compare>:
test   %edx,%edx
je     1129 <addr_compare+0x9>
jmp    1030 <extended_addr_compare@plt>
jmp    1040 <short_addr_compare@plt>

LLVM IR (-O0):
define i32 @addr_compare(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32*, i32** %5
%12 = load i32*, i32** %6
%13 = call i32 @extended_addr_compare(i32* %11, i32* %12)
store i32 %13, i32* %4
br label %18
14: ; preds = %3
%15 = load i32*, i32** %5
%16 = load i32*, i32** %6
%17 = call i32 @short_addr_compare(i32* %15, i32* %16)
store i32 %17, i32* %4
br label %18
18: ; preds = %14, %10
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @addr_compare(i32* %0, i32* %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @extended_addr_compare(i32* %0, i32* %1)
br label %9
7: ; preds = %3
%8 = tail call i32 @short_addr_compare(i32* %0, i32* %1)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
int blog(int n) {
  int m = 1, r = 2;
  while (r < n) {
    m++;
    r *= 2;
  }
  return 1 + m;
}


x86 assembly (clang, -O0):
<blog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1138 <blog+0x38>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <blog+0x15>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blog>:
mov    $0x2,%eax
cmp    $0x3,%edi
jl     1129 <blog+0x29>
mov    $0x2,%ecx
mov    $0x2,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    %ecx,%ecx
add    $0x1,%eax
cmp    %edi,%ecx
jl     1120 <blog+0x20>
ret

LLVM IR (-O0):
define i32 @blog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
%12 = load i32, i32* %4
%13 = mul nsw i32 %12, 2
store i32 %13, i32* %4
br label %5
14: ; preds = %5
%15 = load i32, i32* %3
%16 = add nsw i32 1, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @blog(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 2, %1 ]
%5 = phi i32 [ %7, %3 ], [ 2, %1 ]
%6 = shl nsw i32 %4, 1
%7 = add i32 %5, 1
%8 = icmp slt i32 %6, %0
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 2, %1 ], [ %7, %3 ]
ret i32 %10
}
void toi_alloc_print_debug_stats(void) {}


x86 assembly (clang, -O0):
<toi_alloc_print_debug_stats>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toi_alloc_print_debug_stats>:
ret

LLVM IR (-O0):
define void @toi_alloc_print_debug_stats() {
ret void
}

LLVM IR (-O2):
define void @toi_alloc_print_debug_stats() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int BinSearch(int *, int, int /*<<< orphan*/, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char const *argv[]) {
  int a[] = {1, 16, 24, 35, 4, 62, 73, 88, 99};
  int n;
  int key = 73;
  int key_w = 0;
  n = sizeof(a) / sizeof(int);
  key_w = BinSearch(a, key, 0, n - 1);
  printf("key_w: %d\n", key_w);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xeaf(%rip),%rsi
mov    $0x24,%edx
call   1050 <memcpy@plt>
movl   $0x49,-0x48(%rbp)
movl   $0x0,-0x4c(%rbp)
movl   $0x9,-0x44(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x48(%rbp),%esi
mov    -0x44(%rbp),%ecx
sub    $0x1,%ecx
xor    %edx,%edx
call   1040 <BinSearch@plt>
mov    %eax,-0x4c(%rbp)
mov    -0x4c(%rbp),%esi
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
mov    0xef6(%rip),%eax
mov    %eax,0x20(%rsp)
movaps 0xedb(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebf(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x49,%esi
xor    %edx,%edx
mov    $0x8,%ecx
call   1040 <BinSearch@plt>
lea    0xec4(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [9 x i32] [i32 1, i32 16, i32 24, i32 35, i32 4, i32 62, i32 73, i32 88, i32 99]
@.str = [11 x i8] c"key_w: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [9 x i32]
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%10 = bitcast [9 x i32]* %6 to i8*
store i32 73, i32* %8
store i32 0, i32* %9
store i32 9, i32* %7
%11 = getelementptr inbounds [9 x i32], [9 x i32]* %6, i64 0, i64 0
%12 = load i32, i32* %8
%13 = load i32, i32* %7
%14 = sub nsw i32 %13, 1
%15 = call i32 @BinSearch(i32* %11, i32 %12, i32 0, i32 %14)
store i32 %15, i32* %9
%16 = load i32, i32* %9
%17 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %16)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [9 x i32] [i32 1, i32 16, i32 24, i32 35, i32 4, i32 62, i32 73, i32 88, i32 99]
@.str = [11 x i8] c"key_w: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [9 x i32]
%4 = bitcast [9 x i32]* %3 to i8*
%5 = getelementptr inbounds [9 x i32], [9 x i32]* %3, i64 0, i64 0
%6 = call i32 @BinSearch(i32* %5, i32 73, i32 0, i32 8)
%7 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
int array_int_cmp(const void *x, const void *y) {
  return *(int *)x - *(int *)y;
}


x86 assembly (clang, -O0):
<array_int_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_int_cmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @array_int_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @array_int_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ strncmp(char *, char *, size_t);
void uninivar_strncmp(char *Ct, char *S, size_t N) {
  char *ct;
  char *s;
  size_t n;
  (void)strncmp(ct, s, n);
  (void)strncmp(ct, S, N);
  (void)strncmp(Ct, s, N);
  (void)strncmp(Ct, S, n);
  (void)strncmp(Ct, S, N);
}


x86 assembly (clang, -O0):
<uninivar_strncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninivar_strncmp>:
ret

LLVM IR (-O0):
define void @uninivar_strncmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i8*, i8** %7
%11 = load i8*, i8** %8
%12 = load i64, i64* %9
%13 = call i32 @strncmp(i8* %10, i8* %11, i64 %12)
%14 = load i8*, i8** %7
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = call i32 @strncmp(i8* %14, i8* %15, i64 %16)
%18 = load i8*, i8** %4
%19 = load i8*, i8** %8
%20 = load i64, i64* %6
%21 = call i32 @strncmp(i8* %18, i8* %19, i64 %20)
%22 = load i8*, i8** %4
%23 = load i8*, i8** %5
%24 = load i64, i64* %9
%25 = call i32 @strncmp(i8* %22, i8* %23, i64 %24)
%26 = load i8*, i8** %4
%27 = load i8*, i8** %5
%28 = load i64, i64* %6
%29 = call i32 @strncmp(i8* %26, i8* %27, i64 %28)
ret void
}

LLVM IR (-O2):
define void @uninivar_strncmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setState(char *);
int /*<<< orphan*/ sprintf(char *, char *, char const *);
void a(const char *from) {
  char buffer[100];
  sprintf(buffer, "a() from %s", from);
  setState(buffer);
}


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x70(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xec5(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x70(%rbp),%rdi
call   1030 <setState@plt>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
push   %rbx
sub    $0x70,%rsp
mov    %rdi,%rdx
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <setState@plt>
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"a() from %s\00"
define void @a(i8* %0) {
%2 = alloca i8*
%3 = alloca [100 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%8 = call i32 @setState(i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"a() from %s\00"
define void @a(i8* %0) {
%2 = alloca [100 x i8]
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = call i32 @setState(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int teste = 1000;
  printf(" %i \n", teste);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3e8,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3e8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c" %i \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1000, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c" %i \0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 1000)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ wRelative(int, int);
void wRelative12(int i, int code) {
  if (code & 0x0800) {
    wRelative(i, ((code & 0x7ff) - 0x800) + 1);
  } else {
    wRelative(i, (code & 0x7ff) + 1);
  }
}


x86 assembly (clang, -O0):
<wRelative12>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x800,%eax
cmp    $0x0,%eax
je     114e <wRelative12+0x3e>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
and    $0x7ff,%esi
sub    $0x800,%esi
add    $0x1,%esi
call   1030 <wRelative@plt>
jmp    1162 <wRelative12+0x52>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
and    $0x7ff,%esi
add    $0x1,%esi
call   1030 <wRelative@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wRelative12>:
mov    %esi,%eax
shl    $0x14,%eax
sar    $0x1f,%eax
and    $0x7ff,%esi
and    $0xfffff800,%eax
add    %eax,%esi
add    $0x1,%esi
jmp    1030 <wRelative@plt>

LLVM IR (-O0):
define void @wRelative12(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 2048
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 2047
%12 = sub nsw i32 %11, 2048
%13 = add nsw i32 %12, 1
%14 = call i32 @wRelative(i32 %9, i32 %13)
br label %21
15: ; preds = %2
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = and i32 %17, 2047
%19 = add nsw i32 %18, 1
%20 = call i32 @wRelative(i32 %16, i32 %19)
br label %21
21: ; preds = %15, %8
ret void
}

LLVM IR (-O2):
define void @wRelative12(i32 %0, i32 %1) {
%3 = and i32 %1, 2048
%4 = icmp eq i32 %3, 0
%5 = and i32 %1, 2047
%6 = select i1 %4, i32 0, i32 -2048
%7 = or i32 %5, %6
%8 = add nsw i32 %7, 1
%9 = tail call i32 @wRelative(i32 %0, i32 %8)
ret void
}
/* Type definitions */
typedef scalar_t__ wchar_t;

/* Variables and functions */
void remove_first_char(wchar_t *str) {
  while (*str != 0) {
    *str = *(str + 1);
    str++;
  }
}


x86 assembly (clang, -O0):
<remove_first_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1136 <remove_first_char+0x36>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <remove_first_char+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_first_char>:
cmpq   $0x0,(%rdi)
je     1120 <remove_first_char+0x20>
add    $0x8,%rdi
nopw   0x0(%rax,%rax,1)
mov    (%rdi),%rax
mov    %rax,-0x8(%rdi)
add    $0x8,%rdi
test   %rax,%rax
jne    1110 <remove_first_char+0x10>
ret

LLVM IR (-O0):
define void @remove_first_char(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
br label %3
3: ; preds = %7, %1
%4 = load i64*, i64** %2
%5 = load i64, i64* %4
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i64*, i64** %2
%9 = getelementptr inbounds i64, i64* %8, i64 1
%10 = load i64, i64* %9
%11 = load i64*, i64** %2
store i64 %10, i64* %11
%12 = load i64*, i64** %2
%13 = getelementptr inbounds i64, i64* %12, i32 1
store i64* %13, i64** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @remove_first_char(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1, %4
%5 = phi i64* [ %6, %4 ], [ %0, %1 ]
%6 = getelementptr inbounds i64, i64* %5, i64 1
%7 = load i64, i64* %6
store i64 %7, i64* %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %1
ret void
}
/* Variables and functions */
int inb(int);
int mouse_has_data() { return (inb(0x64) & 1) == 1; }


x86 assembly (clang, -O0):
<mouse_has_data>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
call   1030 <inb@plt>
and    $0x1,%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mouse_has_data>:
push   %rax
mov    $0x64,%edi
call   1030 <inb@plt>
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mouse_has_data() {
%1 = call i32 @inb(i32 100)
%2 = and i32 %1, 1
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @mouse_has_data() {
%1 = tail call i32 @inb(i32 100)
%2 = and i32 %1, 1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ chtype;

/* Variables and functions */
int A_ATTRIBUTES;
int /*<<< orphan*/ addch(int /*<<< orphan*/);
void term_addch(int c) { addch((chtype)(c & ~A_ATTRIBUTES)); }


x86 assembly (clang, -O0):
<term_addch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%eax
xor    $0xffffffff,%eax
and    %eax,%edi
call   1030 <addch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_addch>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
not    %eax
and    %eax,%edi
jmp    1030 <addch@plt>

LLVM IR (-O0):
@A_ATTRIBUTES = global i32 0
define void @term_addch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @A_ATTRIBUTES
%5 = xor i32 %4, -1
%6 = and i32 %3, %5
%7 = call i32 @addch(i32 %6)
ret void
}

LLVM IR (-O2):
@A_ATTRIBUTES = global i32 0
define void @term_addch(i32 %0) {
%2 = load i32, i32* @A_ATTRIBUTES
%3 = xor i32 %2, -1
%4 = and i32 %3, %0
%5 = tail call i32 @addch(i32 %4)
ret void
}