xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x84() {
  Assert_real((iscntrl(132) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              665, ("iscntrl should be 0 for 0x84"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x84>:
push   %rbp
mov    %rsp,%rbp
mov    $0x84,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x299,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x84>:
push   %rax
mov    $0x84,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x299,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0x84\00"
define void @t_iscntrl_0x84() {
%1 = call i64 @iscntrl(i32 132)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 665, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0x84\00"
define void @t_iscntrl_0x84() {
%1 = tail call i64 @iscntrl(i32 132)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 665, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool pes_get_dataalignment(const uint8_t *p_pes) { return !!(p_pes[6] & 0x4); }


x86 assembly (clang, -O0):
<pes_get_dataalignment>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%eax
and    $0x4,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pes_get_dataalignment>:
mov    0x18(%rdi),%eax
shr    $0x2,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pes_get_dataalignment(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 6
%5 = load i32, i32* %4
%6 = and i32 %5, 4
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @pes_get_dataalignment(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 6
%3 = load i32, i32* %2
%4 = lshr i32 %3, 2
%5 = and i32 %4, 1
ret i32 %5
}
/* Variables and functions */
float pow(float, float);
float exponential_in(float step, float max_steps, float max_val) {
  return (step == 0) ? 0 : pow(max_val, (float)step / max_steps);
}


x86 assembly (clang, -O0):
<exponential_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    114b <exponential_in+0x3b>
jp     114b <exponential_in+0x3b>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1164 <exponential_in+0x54>
movss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
divss  -0x8(%rbp),%xmm1
call   1030 <pow@plt>
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exponential_in>:
movaps %xmm0,%xmm3
xorps  %xmm0,%xmm0
ucomiss %xmm0,%xmm3
jne    1121 <exponential_in+0x11>
jp     1121 <exponential_in+0x11>
xorps  %xmm0,%xmm0
ret
divss  %xmm1,%xmm3
movaps %xmm2,%xmm0
movaps %xmm3,%xmm1
jmp    1030 <pow@plt>

LLVM IR (-O0):
define float @exponential_in(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = fcmp oeq float %7, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %3
br label %16
10: ; preds = %3
%11 = load float, float* %6
%12 = load float, float* %4
%13 = load float, float* %5
%14 = fdiv float %12, %13
%15 = call float @pow(float %11, float %14)
br label %16
16: ; preds = %10, %9
%17 = phi float [ 0.000000e+00, %9 ], [ %15, %10 ]
ret float %17
}

LLVM IR (-O2):
define float @exponential_in(float %0, float %1, float %2) {
%4 = fcmp oeq float %0, 0.000000e+00
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = fdiv float %0, %1
%7 = tail call float @pow(float %2, float %6)
br label %8
8: ; preds = %3, %5
%9 = phi float [ %7, %5 ], [ 0.000000e+00, %3 ]
ret float %9
}
/* Type definitions */
struct t_config_option {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gui_color_buffer_display();
void config_change_nick_colors(void *data, struct t_config_option *option) {
  (void)data;
  (void)option;
  gui_color_buffer_display();
}


x86 assembly (clang, -O0):
<config_change_nick_colors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <gui_color_buffer_display@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_change_nick_colors>:
xor    %eax,%eax
jmp    1030 <gui_color_buffer_display@plt>

LLVM IR (-O0):
%struct.t_config_option = type { i32 }
define void @config_change_nick_colors(i8* %0, %struct.t_config_option* %1) {
%3 = alloca i8*
%4 = alloca %struct.t_config_option*
store i8* %0, i8** %3
store %struct.t_config_option* %1, %struct.t_config_option** %4
%5 = load i8*, i8** %3
%6 = load %struct.t_config_option*, %struct.t_config_option** %4
%7 = call i32 (...) @gui_color_buffer_display()
ret void
}

LLVM IR (-O2):
%struct.t_config_option = type { i32 }
define void @config_change_nick_colors(i8* nocapture readnone %0, %struct.t_config_option* nocapture readnone %1) {
%3 = tail call i32 (...) @gui_color_buffer_display()
ret void
}
void *_dictStringCopyHTKeyDup(void *privdata, const void *key) {
  int len = strlen(key);
  char *copy = malloc(len + 1);
  ((void)privdata);
  memcpy(copy, key, len);
  copy[len] = '\0';
  return copy;
}


x86 assembly (clang, -O0):
<_dictStringCopyHTKeyDup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
movslq %eax,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dictStringCopyHTKeyDup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %rax,%r15
add    $0x1,%eax
movslq %eax,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
movslq %r15d,%r15
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
movb   $0x0,(%rbx,%r15,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @_dictStringCopyHTKeyDup(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = call i8* @malloc(i64 %12)
store i8* %13, i8** %6
%14 = load i8*, i8** %3
%15 = load i8*, i8** %6
%16 = load i8*, i8** %4
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = load i8*, i8** %6
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 0, i8* %22
%23 = load i8*, i8** %6
ret i8* %23
}

LLVM IR (-O2):
define noalias i8* @_dictStringCopyHTKeyDup(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = shl i64 %3, 32
%5 = add i64 %4, 4294967296
%6 = ashr exact i64 %5, 32
%7 = tail call i8* @malloc(i64 %6)
%8 = ashr exact i64 %4, 32
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %7, i8* align 1 %1, i64 %8, i1 false)
%9 = getelementptr inbounds i8, i8* %7, i64 %8
store i8 0, i8* %9
ret i8* %7
}
unsigned int getFPUStateX86(void) {
  unsigned int control = 0;
  __asm__ __volatile__("fnstcw %0" : "=m"(control));
  return control;
}


x86 assembly (clang, -O0):
<getFPUStateX86>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
fnstcw -0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFPUStateX86>:
movl   $0x0,-0x4(%rsp)
fnstcw -0x4(%rsp)
mov    -0x4(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @getFPUStateX86() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @getFPUStateX86() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hci_subevent_le_connection_complete_get_status(const uint8_t *event) {
  return event[3];
}


x86 assembly (clang, -O0):
<hci_subevent_le_connection_complete_get_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_subevent_le_connection_complete_get_status>:
mov    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hci_subevent_le_connection_complete_get_status(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hci_subevent_le_connection_complete_get_status(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int setpassent(int /*<<< orphan*/);
int setpwent() { return (setpassent(0)); }


x86 assembly (clang, -O0):
<setpwent>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <setpassent@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setpwent>:
xor    %edi,%edi
jmp    1030 <setpassent@plt>

LLVM IR (-O0):
define i32 @setpwent() {
%1 = call i32 @setpassent(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @setpwent() {
%1 = tail call i32 @setpassent(i32 0)
ret i32 %1
}
char *memory_get_identity() { return "no free"; }


x86 assembly (clang, -O0):
<memory_get_identity>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_get_identity>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"no free\00"
define i8* @memory_get_identity() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"no free\00"
define i8* @memory_get_identity() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
int scale_dim(int scale, int x) {
  int size = x * (scale + 10) / 10;
  return size;
}


x86 assembly (clang, -O0):
<scale_dim>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0xa,%ecx
imul   %ecx,%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_dim>:
add    $0xa,%edi
imul   %esi,%edi
movslq %edi,%rax
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @scale_dim(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 10
%9 = mul nsw i32 %6, %8
%10 = sdiv i32 %9, 10
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @scale_dim(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 10
%4 = mul nsw i32 %3, %1
%5 = sdiv i32 %4, 10
ret i32 %5
}
unsigned int toHex(char ch) {
  if ((ch >= '0') && (ch <= '9')) {
    return ((unsigned int)(ch)) - ((unsigned int)('0'));
  } else if ((ch >= 'A') && (ch <= 'F')) {
    return (((unsigned int)(ch)) - ((unsigned int)('A'))) + 10;
  } else {
    return (((unsigned int)(ch)) - ((unsigned int)('a'))) + 10;
  }
  __builtin_unreachable();
}


x86 assembly (clang, -O0):
<toHex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <toHex+0x33>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <toHex+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    116c <toHex+0x6c>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     115f <toHex+0x5f>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jg     115f <toHex+0x5f>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    116c <toHex+0x6c>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toHex>:
lea    -0x30(%rdi),%eax
lea    -0x41(%rdi),%ecx
xor    %edx,%edx
cmp    $0x6,%cl
setb   %dl
shl    $0x5,%edx
add    $0xffffffa9,%edx
cmp    $0xa,%al
mov    $0xffffffd0,%eax
cmovae %edx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @toHex(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub i32 %13, 48
store i32 %14, i32* %2
br label %33
15: ; preds = %7, %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sge i32 %17, 65
br i1 %18, label %19, label %28
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sle i32 %21, 70
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = sub i32 %25, 65
%27 = add i32 %26, 10
store i32 %27, i32* %2
br label %33
28: ; preds = %19, %15
%29 = load i8, i8* %3
%30 = sext i8 %29 to i32
%31 = sub i32 %30, 97
%32 = add i32 %31, 10
store i32 %32, i32* %2
br label %33
33: ; preds = %28, %23, %11
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @toHex(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -48
%4 = icmp ult i8 %3, 10
%5 = add i8 %0, -65
%6 = icmp ult i8 %5, 6
%7 = select i1 %6, i32 -55, i32 -87
%8 = select i1 %4, i32 -48, i32 %7
%9 = add nsw i32 %8, %2
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ long_test(int);
int /*<<< orphan*/ simple_test_b();
int /*<<< orphan*/ simple_test_l();
int main(void) {
  simple_test_b();
  simple_test_l();
  long_test(3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <simple_test_b@plt>
mov    $0x0,%al
call   1040 <simple_test_l@plt>
mov    $0x3,%edi
call   1050 <long_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <simple_test_b@plt>
xor    %eax,%eax
call   1040 <simple_test_l@plt>
mov    $0x3,%edi
call   1050 <long_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @simple_test_b()
%3 = call i32 (...) @simple_test_l()
%4 = call i32 @long_test(i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @simple_test_b()
%2 = tail call i32 (...) @simple_test_l()
%3 = tail call i32 @long_test(i32 3)
ret i32 0
}
void create_colinfo() {}


x86 assembly (clang, -O0):
<create_colinfo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_colinfo>:
ret

LLVM IR (-O0):
define void @create_colinfo() {
ret void
}

LLVM IR (-O2):
define void @create_colinfo() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int read(int, char *, int);
void empty_fd(int fd) {
  char buf[64];
  int res;
  for (;;) {
    res = read(fd, buf, sizeof(buf));
    if (res > 0 || (res < 0 && errno == EINTR))
      continue;
    break;
  }
}


x86 assembly (clang, -O0):
<empty_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x50(%rbp),%rsi
mov    $0x40,%edx
call   1030 <read@plt>
mov    %eax,-0x54(%rbp)
cmpl   $0x0,-0x54(%rbp)
jg     115d <empty_fd+0x4d>
cmpl   $0x0,-0x54(%rbp)
jge    1162 <empty_fd+0x52>
mov    0x2e96(%rip),%rax
mov    (%rax),%rax
mov    0x2e84(%rip),%rcx
cmp    (%rcx),%rax
jne    1162 <empty_fd+0x52>
jmp    111b <empty_fd+0xb>
jmp    1167 <empty_fd+0x57>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<empty_fd>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x48,%rsp
mov    %edi,%ebx
mov    %rsp,%r14
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x40,%edx
call   1030 <read@plt>
test   %eax,%eax
jg     1130 <empty_fd+0x20>
jns    114e <empty_fd+0x3e>
mov    (%r15),%rax
cmp    (%r12),%rax
je     1130 <empty_fd+0x20>
add    $0x48,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define void @empty_fd(i32 %0) {
%2 = alloca i32
%3 = alloca [64 x i8]
%4 = alloca i32
store i32 %0, i32* %2
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %2
%7 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%8 = call i32 @read(i32 %6, i8* %7, i32 64)
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 0
br i1 %10, label %18, label %11
11: ; preds = %5
%12 = load i32, i32* %4
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %11
%15 = load i64, i64* @errno
%16 = load i64, i64* @EINTR
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %19
18: ; preds = %14, %5
br label %5
19: ; preds = %14, %11
br label %20
20: ; preds = %19
ret void
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define void @empty_fd(i32 %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
br label %4
4: ; preds = %13, %1
%5 = call i32 @read(i32 %0, i8* %3, i32 64)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = icmp slt i32 %5, 0
br i1 %8, label %9, label %14
9: ; preds = %7
%10 = load i64, i64* @errno
%11 = load i64, i64* @EINTR
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %9, %4
br label %4
14: ; preds = %7, %9
ret void
}
void splash_get_pos(int *x, int *y) {}


x86 assembly (clang, -O0):
<splash_get_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<splash_get_pos>:
ret

LLVM IR (-O0):
define void @splash_get_pos(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @splash_get_pos(i32* nocapture %0, i32* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
bool ncurses_is_pad(const WINDOW *win) { return false; }


x86 assembly (clang, -O0):
<ncurses_is_pad>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ncurses_is_pad>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ncurses_is_pad(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ncurses_is_pad(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int read_ec(int, unsigned char *);
int both_fans_running() {
  unsigned char val;
  int ret = read_ec(147, &val);
  ret &= (val == 4);
  ret &= read_ec(150, &val);
  ret &= (val == 4);
  return ret;
}


x86 assembly (clang, -O0):
<both_fans_running>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x93,%edi
lea    -0x1(%rbp),%rsi
call   1030 <read_ec@plt>
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x4,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x96,%edi
lea    -0x1(%rbp),%rsi
call   1030 <read_ec@plt>
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x4,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<both_fans_running>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xf(%rsp),%r14
mov    $0x93,%edi
mov    %r14,%rsi
call   1030 <read_ec@plt>
mov    %eax,%ebp
xor    %ebx,%ebx
cmpb   $0x4,0xf(%rsp)
sete   %bl
mov    $0x96,%edi
mov    %r14,%rsi
call   1030 <read_ec@plt>
xor    %ecx,%ecx
cmpb   $0x4,0xf(%rsp)
sete   %cl
and    %ebp,%eax
and    %ebx,%eax
and    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @both_fans_running() {
%1 = alloca i8
%2 = alloca i32
%3 = call i32 @read_ec(i32 147, i8* %1)
store i32 %3, i32* %2
%4 = load i8, i8* %1
%5 = zext i8 %4 to i32
%6 = icmp eq i32 %5, 4
%7 = zext i1 %6 to i32
%8 = load i32, i32* %2
%9 = and i32 %8, %7
store i32 %9, i32* %2
%10 = call i32 @read_ec(i32 150, i8* %1)
%11 = load i32, i32* %2
%12 = and i32 %11, %10
store i32 %12, i32* %2
%13 = load i8, i8* %1
%14 = zext i8 %13 to i32
%15 = icmp eq i32 %14, 4
%16 = zext i1 %15 to i32
%17 = load i32, i32* %2
%18 = and i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @both_fans_running() {
%1 = alloca i8
%2 = call i32 @read_ec(i32 147, i8* %1)
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 4
%5 = zext i1 %4 to i32
%6 = call i32 @read_ec(i32 150, i8* %1)
%7 = load i8, i8* %1
%8 = icmp eq i8 %7, 4
%9 = zext i1 %8 to i32
%10 = and i32 %6, %2
%11 = and i32 %10, %5
%12 = and i32 %11, %9
ret i32 %12
}
float *k(const void *bin) { return (float *)bin; }


x86 assembly (clang, -O0):
<k>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<k>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define float* @k(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to float*
ret float* %4
}

LLVM IR (-O2):
define float* @k(i8* readnone %0) {
%2 = bitcast i8* %0 to float*
ret float* %2
}
void ADC_SAR_Seq_IRQ_Interrupt(void) {}


x86 assembly (clang, -O0):
<ADC_SAR_Seq_IRQ_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_SAR_Seq_IRQ_Interrupt>:
ret

LLVM IR (-O0):
define void @ADC_SAR_Seq_IRQ_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @ADC_SAR_Seq_IRQ_Interrupt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ helper_cliprdr_send_response(int /*<<< orphan*/ *,
                                                int /*<<< orphan*/);
void helper_cliprdr_send_empty_response() {
  helper_cliprdr_send_response(NULL, 0);
}


x86 assembly (clang, -O0):
<helper_cliprdr_send_empty_response>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
call   1030 <helper_cliprdr_send_response@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<helper_cliprdr_send_empty_response>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <helper_cliprdr_send_response@plt>

LLVM IR (-O0):
define void @helper_cliprdr_send_empty_response() {
%1 = call i32 @helper_cliprdr_send_response(i32* null, i32 0)
ret void
}

LLVM IR (-O2):
define void @helper_cliprdr_send_empty_response() {
%1 = tail call i32 @helper_cliprdr_send_response(i32* null, i32 0)
ret void
}
swap(int *val1, int *val2) {
  int temp = *val1;
  *val1 = *val2;
  *val2 = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define i32 @swap(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
store i32 %8, i32* %6
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i32*, i32** %4
store i32 %10, i32* %11
%12 = load i32, i32* %6
%13 = load i32*, i32** %5
store i32 %12, i32* %13
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret i32 undef
}
int get_elf_class(void) {
  if (sizeof(long) == 4)
    return 1;
  else if (sizeof(long) == 8)
    return 2;
  else
    return 0;
}


x86 assembly (clang, -O0):
<get_elf_class>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_elf_class>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @get_elf_class() {
ret i32 2
}

LLVM IR (-O2):
define i32 @get_elf_class() {
ret i32 2
}
/* Variables and functions */
int lenStr(char *);
scalar_t__ malloc(int);
char *cpyStr(char *s) {
  char *ret, *tmp;
  ret = (char *)malloc(sizeof(char) * (lenStr(s) + 1));
  for (tmp = ret; *tmp = *s; s++, tmp++)
    ;
  return ret;
}


x86 assembly (clang, -O0):
<cpyStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <lenStr@plt>
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %al,(%rcx)
cmp    $0x0,%al
je     1187 <cpyStr+0x67>
jmp    116a <cpyStr+0x4a>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1151 <cpyStr+0x31>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpyStr>:
push   %rbx
mov    %rdi,%rbx
call   1030 <lenStr@plt>
lea    0x1(%rax),%edi
call   1040 <malloc@plt>
mov    (%rbx),%cl
mov    %cl,(%rax)
test   %cl,%cl
je     114f <cpyStr+0x2f>
mov    $0x1,%ecx
xchg   %ax,%ax
movzbl (%rbx,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1140 <cpyStr+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define i8* @cpyStr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @lenStr(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
%9 = mul i64 1, %8
%10 = trunc i64 %9 to i32
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %3
%13 = load i8*, i8** %3
store i8* %13, i8** %4
br label %14
14: ; preds = %20, %1
%15 = load i8*, i8** %2
%16 = load i8, i8* %15
%17 = load i8*, i8** %4
store i8 %16, i8* %17
%18 = icmp ne i8 %16, 0
br i1 %18, label %19, label %25
19: ; preds = %14
br label %20
20: ; preds = %19
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %2
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %14
25: ; preds = %14
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
define i8* @cpyStr(i8* %0) {
%2 = tail call i32 @lenStr(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = load i8, i8* %0
store i8 %6, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %15, label %8
8: ; preds = %1, %8
%9 = phi i8* [ %12, %8 ], [ %5, %1 ]
%10 = phi i8* [ %11, %8 ], [ %0, %1 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = load i8, i8* %11
store i8 %13, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %8
15: ; preds = %8, %1
ret i8* %5
}
void EVP_CIPHER_iv_length(void) {}


x86 assembly (clang, -O0):
<EVP_CIPHER_iv_length>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_CIPHER_iv_length>:
ret

LLVM IR (-O0):
define void @EVP_CIPHER_iv_length() {
ret void
}

LLVM IR (-O2):
define void @EVP_CIPHER_iv_length() {
ret void
}
/* Variables and functions */
int __builtin_arm_crc32cd(int, long long);
int crc32cd(int a, long long b) { return __builtin_arm_crc32cd(a, b); }


x86 assembly (clang, -O0):
<crc32cd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <__builtin_arm_crc32cd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc32cd>:
jmp    1030 <__builtin_arm_crc32cd@plt>

LLVM IR (-O0):
define i32 @crc32cd(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = call i32 @__builtin_arm_crc32cd(i32 %5, i64 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @crc32cd(i32 %0, i64 %1) {
%3 = tail call i32 @__builtin_arm_crc32cd(i32 %0, i64 %1)
ret i32 %3
}
/* Variables and functions */
char *getenv(char *);
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char **argv) {
  if (argc == 1) {
    printf("Hello Classic!\n");
  } else {
    printf("TMPDIR=%s\n", getenv("TMPDIR"));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1153 <main+0x33>
lea    0xeb9(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    1170 <main+0x50>
lea    0xec1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rsi
lea    0xea7(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jne    1144 <main+0x14>
lea    0xed5(%rip),%rdi
call   1040 <puts@plt>
jmp    1161 <main+0x31>
lea    0xec0(%rip),%rdi
call   1030 <getenv@plt>
lea    0xea9(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Hello Classic!\0A\00"
@.str.1 = [11 x i8] c"TMPDIR=%s\0A\00"
@.str.2 = [7 x i8] c"TMPDIR\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %13
10: ; preds = %2
%11 = call i8* @getenv(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0))
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10, %8
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [11 x i8] c"TMPDIR=%s\0A\00"
@.str.2 = [7 x i8] c"TMPDIR\00"
@str = [15 x i8] c"Hello Classic!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
br label %9
6: ; preds = %2
%7 = tail call i8* @getenv(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0))
%8 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %7)
br label %9
9: ; preds = %6, %4
ret i32 0
}
/* Variables and functions */
char *strchr(char *, char);
char *pathToUnix(char *pcPath) {
  char *pcBwdSlash = pcPath;
  if (pcPath) {
    while ((pcBwdSlash = strchr(pcBwdSlash, '\\')))
      *pcBwdSlash = '/';
  }
  return pcPath;
}


x86 assembly (clang, -O0):
<pathToUnix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1161 <pathToUnix+0x51>
jmp    1134 <pathToUnix+0x24>
mov    -0x10(%rbp),%rdi
mov    $0x5c,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     115c <pathToUnix+0x4c>
mov    -0x10(%rbp),%rax
movb   $0x2f,(%rax)
jmp    1134 <pathToUnix+0x24>
jmp    1161 <pathToUnix+0x51>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathToUnix>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     1137 <pathToUnix+0x27>
mov    %rbx,%rdi
nopl   0x0(%rax)
mov    $0x5c,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     1137 <pathToUnix+0x27>
movb   $0x2f,(%rax)
mov    %rax,%rdi
jmp    1120 <pathToUnix+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @pathToUnix(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %15
7: ; preds = %1
br label %8
8: ; preds = %12, %7
%9 = load i8*, i8** %3
%10 = call i8* @strchr(i8* %9, i8 signext 92)
store i8* %10, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i8*, i8** %3
store i8 47, i8* %13
br label %8
14: ; preds = %8
br label %15
15: ; preds = %14, %1
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @pathToUnix(i8* returned %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 92)
%5 = icmp eq i8* %4, null
br i1 %5, label %10, label %6
6: ; preds = %3, %6
%7 = phi i8* [ %8, %6 ], [ %4, %3 ]
store i8 47, i8* %7
%8 = tail call i8* @strchr(i8* dereferenceable(1) %7, i8 signext 92)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %6
10: ; preds = %6, %3, %1
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ am_hal_flash_delay(int /*<<< orphan*/);
void am_util_delay_cycles(uint32_t ui32Iterations) {
  am_hal_flash_delay(ui32Iterations);
}


x86 assembly (clang, -O0):
<am_util_delay_cycles>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <am_hal_flash_delay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<am_util_delay_cycles>:
jmp    1030 <am_hal_flash_delay@plt>

LLVM IR (-O0):
define void @am_util_delay_cycles(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @am_hal_flash_delay(i32 %3)
ret void
}

LLVM IR (-O2):
define void @am_util_delay_cycles(i32 %0) {
%2 = tail call i32 @am_hal_flash_delay(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abstract_declarator();
int /*<<< orphan*/ specifier_qualifier_list();
int yyselect();
type_name() {
  switch (yyselect()) {
  case 36: {
    specifier_qualifier_list();
    switch (yyselect()) {
    case 135: {
      abstract_declarator();
    } break;
    default:;
    }
  } break;
  }
}


x86 assembly (clang, -O0):
<type_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1030 <yyselect@plt>
sub    $0x24,%eax
jne    1185 <type_name+0x55>
jmp    114d <type_name+0x1d>
xor    %eax,%eax
mov    %al,-0x5(%rbp)
call   1040 <specifier_qualifier_list@plt>
mov    -0x5(%rbp),%al
call   1030 <yyselect@plt>
sub    $0x87,%eax
jne    117b <type_name+0x4b>
jmp    116f <type_name+0x3f>
mov    $0x0,%al
call   1050 <abstract_declarator@plt>
jmp    1180 <type_name+0x50>
jmp    1180 <type_name+0x50>
jmp    1185 <type_name+0x55>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_name>:
push   %rax
xor    %eax,%eax
call   1030 <yyselect@plt>
cmp    $0x24,%eax
jne    1159 <type_name+0x29>
xor    %eax,%eax
call   1040 <specifier_qualifier_list@plt>
xor    %eax,%eax
call   1030 <yyselect@plt>
cmp    $0x87,%eax
jne    1159 <type_name+0x29>
xor    %eax,%eax
call   1050 <abstract_declarator@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @type_name() {
%1 = alloca i32
%2 = call i32 (...) @yyselect()
switch i32 %2, label %10 [
i32 36, label %3
]
3: ; preds = %0
%4 = call i32 (...) @specifier_qualifier_list()
%5 = call i32 (...) @yyselect()
switch i32 %5, label %8 [
i32 135, label %6
]
6: ; preds = %3
%7 = call i32 (...) @abstract_declarator()
br label %9
8: ; preds = %3
br label %9
9: ; preds = %8, %6
br label %10
10: ; preds = %0, %9
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @type_name() {
%1 = tail call i32 (...) @yyselect()
%2 = icmp eq i32 %1, 36
br i1 %2, label %3, label %9
3: ; preds = %0
%4 = tail call i32 (...) @specifier_qualifier_list()
%5 = tail call i32 (...) @yyselect()
%6 = icmp eq i32 %5, 135
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 (...) @abstract_declarator()
br label %9
9: ; preds = %7, %3, %0
ret i32 undef
}
void yy_1_TemplateArgumentChoice(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_1_TemplateArgumentChoice>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_1_TemplateArgumentChoice>:
ret

LLVM IR (-O0):
define void @yy_1_TemplateArgumentChoice(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_1_TemplateArgumentChoice(i8* nocapture %0, i32 %1) {
ret void
}
adr0adrreg1(r0, r1, x0, x1, p0, p1) unsigned int r0, r1;
unsigned int *p0, *p1;
{
  if ((*((unsigned int *)10000000)) <= (p1[1111111 / 4]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adr0adrreg1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    $0x989680,%eax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    0x10f444(%rcx),%eax
ja     113b <adr0adrreg1+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <adr0adrreg1+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0adrreg1>:
mov    0x989680,%ecx
xor    %eax,%eax
cmp    0x10f444(%r9),%ecx
setbe  %al
ret

LLVM IR (-O0):
define i32 @adr0adrreg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* inttoptr (i64 10000000 to i32*)
%15 = load i32*, i32** %13
%16 = getelementptr inbounds i32, i32* %15, i64 277777
%17 = load i32, i32* %16
%18 = icmp ule i32 %14, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @adr0adrreg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture %5) {
%7 = load i32, i32* inttoptr (i64 10000000 to i32*)
%8 = getelementptr inbounds i32, i32* %5, i64 277777
%9 = load i32, i32* %8
%10 = icmp ule i32 %7, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
double __nv_cospi(double);
double cospi(double __a) { return __nv_cospi(__a); }


x86 assembly (clang, -O0):
<cospi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__nv_cospi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cospi>:
jmp    1030 <__nv_cospi@plt>

LLVM IR (-O0):
define double @cospi(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__nv_cospi(double %3)
ret double %4
}

LLVM IR (-O2):
define double @cospi(double %0) {
%2 = tail call double @__nv_cospi(double %0)
ret double %2
}
int test_imm_79int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x79 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_79int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x79,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_79int64_midword_mem>:
testb  $0x79,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_79int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 121
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_79int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7929856
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
PHP_METHOD(IPv6Range, __construct) {}


x86 assembly (clang, -O0):
<PHP_METHOD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PHP_METHOD>:
ret

LLVM IR (-O0):
define i32 @PHP_METHOD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @PHP_METHOD(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
char *xml_tag(char *tag, char *arg, ...) { return NULL; }


x86 assembly (clang, -O0):
<xml_tag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xml_tag>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @xml_tag(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @xml_tag(i8* nocapture readnone %0, i8* nocapture readnone %1, ...) {
ret i8* null
}
/* Variables and functions */
int omap_rev();
int is_omap1610(void) {
  return (((omap_rev() >> 16) & 0xffff) == (0x1610)) ? 1 : 0;
}


x86 assembly (clang, -O0):
<is_omap1610>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <omap_rev@plt>
mov    %eax,%edx
sar    $0x10,%edx
and    $0xffff,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x1610,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_omap1610>:
push   %rax
xor    %eax,%eax
call   1030 <omap_rev@plt>
and    $0xffff0000,%eax
xor    %ecx,%ecx
cmp    $0x16100000,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_omap1610() {
%1 = call i32 (...) @omap_rev()
%2 = ashr i32 %1, 16
%3 = and i32 %2, 65535
%4 = icmp eq i32 %3, 5648
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_omap1610() {
%1 = tail call i32 (...) @omap_rev()
%2 = and i32 %1, -65536
%3 = icmp eq i32 %2, 370147328
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ outb_local(unsigned char, int);
__attribute__((always_)) void outb(unsigned char value, int port) {
  outb_local(value, port);
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%esi
movzbl %al,%edi
call   1030 <outb_local@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
jmp    1030 <outb_local@plt>

LLVM IR (-O0):
define void @outb(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
%7 = call i32 @outb_local(i8 zeroext %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @outb(i8 zeroext %0, i32 %1) {
%3 = tail call i32 @outb_local(i8 zeroext %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_WIND(int /*<<< orphan*/);
int gen_WIND() {
  handle_WIND(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_WIND>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_WIND@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_WIND>:
push   %rax
xor    %edi,%edi
call   1030 <handle_WIND@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_WIND() {
%1 = call i32 @handle_WIND(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_WIND() {
%1 = tail call i32 @handle_WIND(i32 0)
ret i32 0
}
/* Variables and functions */
char const *with_prefix(char *);
const char *bar() { return with_prefix("basoon"); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <with_prefix@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    0xee9(%rip),%rdi
jmp    1030 <with_prefix@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"basoon\00"
define i8* @bar() {
%1 = call i8* @with_prefix(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [7 x i8] c"basoon\00"
define i8* @bar() {
%1 = tail call i8* @with_prefix(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int all_full(char *vec, int len) {
  int i;
  for (i = 0; i < len; i++) {
    if (!vec[i])
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<all_full>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    114f <all_full+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
jne    113c <all_full+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1156 <all_full+0x56>
jmp    1141 <all_full+0x41>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <all_full+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_full>:
mov    $0x1,%eax
test   %esi,%esi
jle    111f <all_full+0x1f>
mov    %esi,%ecx
xor    %edx,%edx
nopl   (%rax)
cmpb   $0x0,(%rdi,%rdx,1)
je     1120 <all_full+0x20>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <all_full+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @all_full(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = icmp ne i8 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %11
store i32 0, i32* %3
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %7
23: ; preds = %7
store i32 1, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @all_full(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %13, %5
br i1 %7, label %14, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %13, %6 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
%13 = add nuw nsw i64 %9, 1
br i1 %12, label %14, label %6
14: ; preds = %8, %6, %2
%15 = phi i32 [ 1, %2 ], [ 1, %6 ], [ 0, %8 ]
ret i32 %15
}