xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ BMP180_Init(char *, int /*<<< orphan*/, int);
int /*<<< orphan*/ BMP180_ReadValues(float *, float *);
int /*<<< orphan*/ printf(char *, float, float);
int main(void) {
  float temperatura, pressione;
  BMP180_Init("/dev/i2c-0", 0, 1);
  BMP180_ReadValues(&temperatura, &pressione);
  printf("t: %f\tp:%f\n", temperatura, pressione);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1030 <BMP180_Init@plt>
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <BMP180_ReadValues@plt>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1030 <BMP180_Init@plt>
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1050 <BMP180_ReadValues@plt>
movss  0x4(%rsp),%xmm0
movss  (%rsp),%xmm1
lea    0xea8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"/dev/i2c-0\00"
@.str.1 = [12 x i8] c"t: %f\09p:%f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = call i32 @BMP180_Init(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 0, i32 1)
%4 = call i32 @BMP180_ReadValues(float* %1, float* %2)
%5 = load float, float* %1
%6 = load float, float* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), float %5, float %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"/dev/i2c-0\00"
@.str.1 = [12 x i8] c"t: %f\09p:%f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = bitcast float* %1 to i8*
%4 = bitcast float* %2 to i8*
%5 = tail call i32 @BMP180_Init(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 0, i32 1)
%6 = call i32 @BMP180_ReadValues(float* %1, float* %2)
%7 = load float, float* %1
%8 = load float, float* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), float %7, float %8)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
int iswupper(int /*<<< orphan*/);
int iswupper_l(wint_t c, locale_t l) { return iswupper(c); }


x86 assembly (clang, -O0):
<iswupper_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <iswupper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswupper_l>:
jmp    1030 <iswupper@plt>

LLVM IR (-O0):
define i32 @iswupper_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @iswupper(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @iswupper_l(i32 %0, i32 %1) {
%3 = tail call i32 @iswupper(i32 %0)
ret i32 %3
}
/* Type definitions */
struct dualtimer_cmsdk_dev_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
dualtimer_cmsdk_enable_interrupt_timer1(struct dualtimer_cmsdk_dev_t const *);
int /*<<< orphan*/
dualtimer_cmsdk_enable_interrupt_timer2(struct dualtimer_cmsdk_dev_t const *);
void dualtimer_cmsdk_enable_interrupt_both_timers(
    const struct dualtimer_cmsdk_dev_t *dev) {
  dualtimer_cmsdk_enable_interrupt_timer1(dev);
  dualtimer_cmsdk_enable_interrupt_timer2(dev);
}


x86 assembly (clang, -O0):
<dualtimer_cmsdk_enable_interrupt_both_timers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dualtimer_cmsdk_enable_interrupt_timer1@plt>
mov    -0x8(%rbp),%rdi
call   1040 <dualtimer_cmsdk_enable_interrupt_timer2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dualtimer_cmsdk_enable_interrupt_both_timers>:
push   %rbx
mov    %rdi,%rbx
call   1030 <dualtimer_cmsdk_enable_interrupt_timer1@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <dualtimer_cmsdk_enable_interrupt_timer2@plt>

LLVM IR (-O0):
%struct.dualtimer_cmsdk_dev_t = type { i32 }
define void @dualtimer_cmsdk_enable_interrupt_both_timers(%struct.dualtimer_cmsdk_dev_t* %0) {
%2 = alloca %struct.dualtimer_cmsdk_dev_t*
store %struct.dualtimer_cmsdk_dev_t* %0, %struct.dualtimer_cmsdk_dev_t** %2
%3 = load %struct.dualtimer_cmsdk_dev_t*, %struct.dualtimer_cmsdk_dev_t** %2
%4 = call i32 @dualtimer_cmsdk_enable_interrupt_timer1(%struct.dualtimer_cmsdk_dev_t* %3)
%5 = load %struct.dualtimer_cmsdk_dev_t*, %struct.dualtimer_cmsdk_dev_t** %2
%6 = call i32 @dualtimer_cmsdk_enable_interrupt_timer2(%struct.dualtimer_cmsdk_dev_t* %5)
ret void
}

LLVM IR (-O2):
%struct.dualtimer_cmsdk_dev_t = type { i32 }
define void @dualtimer_cmsdk_enable_interrupt_both_timers(%struct.dualtimer_cmsdk_dev_t* %0) {
%2 = tail call i32 @dualtimer_cmsdk_enable_interrupt_timer1(%struct.dualtimer_cmsdk_dev_t* %0)
%3 = tail call i32 @dualtimer_cmsdk_enable_interrupt_timer2(%struct.dualtimer_cmsdk_dev_t* %0)
ret void
}
/* Variables and functions */
int f429(int *);
int f430(int *p) { return f429(p); }


x86 assembly (clang, -O0):
<f430>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f429@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f430>:
jmp    1030 <f429@plt>

LLVM IR (-O0):
define i32 @f430(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f429(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f430(i32* %0) {
%2 = tail call i32 @f429(i32* %0)
ret i32 %2
}
struct group *getgrnam(const char *name) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  return 0;
}


x86 assembly (clang, -O0):
<getgrnam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
lea    0xedb(%rip),%rsi
lea    0xee6(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgrnam>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.group = type opaque
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.getgrnam = [9 x i8] c"getgrnam\00"
define %struct.group* @getgrnam(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.getgrnam, i64 0, i64 0))
ret %struct.group* null
}

LLVM IR (-O2):
%struct.group = type opaque
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.getgrnam = [9 x i8] c"getgrnam\00"
define %struct.group* @getgrnam(i8* nocapture readnone %0) {
%2 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.getgrnam, i64 0, i64 0))
ret %struct.group* null
}
/* Type definitions */
typedef int wint_t;

/* Variables and functions */
int iswblank(wint_t wc) {
  return (wc >= 0 && wc < 128 ? wc == ' ' || wc == '\t' : 0);
}


x86 assembly (clang, -O0):
<iswblank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1147 <iswblank+0x47>
cmpl   $0x80,-0x4(%rbp)
jge    1147 <iswblank+0x47>
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1137 <iswblank+0x37>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
jmp    1151 <iswblank+0x51>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    1151 <iswblank+0x51>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswblank>:
cmp    $0x20,%edi
sete   %al
cmp    $0x9,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @iswblank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 128
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 32
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 9
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ true, %8 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
br label %18
17: ; preds = %5, %1
br label %18
18: ; preds = %17, %14
%19 = phi i32 [ %16, %14 ], [ 0, %17 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @iswblank(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = icmp eq i32 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
time_t time___new_TimeT___impl() { return time(NULL); }


x86 assembly (clang, -O0):
<time___new_TimeT___impl>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<time___new_TimeT___impl>:
xor    %edi,%edi
jmp    1030 <time@plt>

LLVM IR (-O0):
define i32 @time___new_TimeT___impl() {
%1 = call i32 @time(i32* null)
ret i32 %1
}

LLVM IR (-O2):
define i32 @time___new_TimeT___impl() {
%1 = tail call i32 @time(i32* null)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ error_handler(char *);
void get_var_text_att(const char *file, const char *name, const char *attname,
                      char *att) {
  int ncid, varid, status;
  char msg[512];
  error_handler("read_mosaic: Add flag -Duse_netCDF when compiling");
}


x86 assembly (clang, -O0):
<get_var_text_att>:
push   %rbp
mov    %rsp,%rbp
sub    $0x230,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xece(%rip),%rdi
call   1030 <error_handler@plt>
add    $0x230,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_var_text_att>:
lea    0xee9(%rip),%rdi
jmp    1030 <error_handler@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"read_mosaic: Add flag -Duse_netCDF when compiling\00"
define void @get_var_text_att(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca [512 x i8]
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%13 = call i32 @error_handler(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c"read_mosaic: Add flag -Duse_netCDF when compiling\00"
define void @get_var_text_att(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 @error_handler(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  printf("Numele este %s\n", "Ana");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef1(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Numele este %s\0A\00"
@.str.1 = [4 x i8] c"Ana\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"Numele este %s\0A\00"
@.str.1 = [4 x i8] c"Ana\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int basecmp(char *, char *, int /*<<< orphan*/, int);
int dircmpi(char *s1, char *s2) { return basecmp(s1, s2, 0, 1); }


x86 assembly (clang, -O0):
<dircmpi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <basecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dircmpi>:
xor    %edx,%edx
mov    $0x1,%ecx
jmp    1030 <basecmp@plt>

LLVM IR (-O0):
define i32 @dircmpi(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @basecmp(i8* %5, i8* %6, i32 0, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @dircmpi(i8* %0, i8* %1) {
%3 = tail call i32 @basecmp(i8* %0, i8* %1, i32 0, i32 1)
ret i32 %3
}
void ff_hevc_put_hevc_uni_w_epel_hv8_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_hv8_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_hv8_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_hv8_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_hv8_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dot(int, int);
int popNumber();
int /*<<< orphan*/ pushNumber(int /*<<< orphan*/);
void basDot() {
  int x, y;
  y = popNumber();
  x = popNumber();
  pushNumber(dot(x, y));
}


x86 assembly (clang, -O0):
<basDot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <popNumber@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <popNumber@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <dot@plt>
mov    %eax,%edi
call   1040 <pushNumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basDot>:
push   %rbx
xor    %eax,%eax
call   1050 <popNumber@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <popNumber@plt>
mov    %eax,%edi
mov    %ebx,%esi
call   1030 <dot@plt>
mov    %eax,%edi
pop    %rbx
jmp    1040 <pushNumber@plt>

LLVM IR (-O0):
define void @basDot() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @popNumber()
store i32 %3, i32* %2
%4 = call i32 (...) @popNumber()
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = call i32 @dot(i32 %5, i32 %6)
%8 = call i32 @pushNumber(i32 %7)
ret void
}

LLVM IR (-O2):
define void @basDot() {
%1 = tail call i32 (...) @popNumber()
%2 = tail call i32 (...) @popNumber()
%3 = tail call i32 @dot(i32 %2, i32 %1)
%4 = tail call i32 @pushNumber(i32 %3)
ret void
}
int checkRange(int x, int y) {
  if (x > y || x < 2) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<checkRange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1120 <checkRange+0x20>
cmpl   $0x2,-0x8(%rbp)
jge    112c <checkRange+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    1133 <checkRange+0x33>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkRange>:
cmp    %esi,%edi
setg   %al
cmp    $0x2,%edi
setl   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @checkRange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 2
br i1 %11, label %12, label %13
12: ; preds = %9, %2
store i32 1, i32* %3
br label %14
13: ; preds = %9
store i32 0, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @checkRange(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = icmp slt i32 %0, 2
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int htonl(int);
uint32_t slash_to_netmask(unsigned slash) {
  if (slash == 0)
    return 0;
  else if (slash >= 32)
    return 0xFFFFFFFF;
  else
    return htonl(~((1 << (32 - slash)) - 1));
}


x86 assembly (clang, -O0):
<slash_to_netmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <slash_to_netmask+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1164 <slash_to_netmask+0x54>
cmpl   $0x20,-0x8(%rbp)
jb     1147 <slash_to_netmask+0x37>
movl   $0xffffffff,-0x4(%rbp)
jmp    1164 <slash_to_netmask+0x54>
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
sub    $0x1,%edi
xor    $0xffffffff,%edi
call   1030 <htonl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slash_to_netmask>:
test   %edi,%edi
je     111f <slash_to_netmask+0xf>
mov    $0xffffffff,%eax
cmp    $0x1f,%edi
jbe    1122 <slash_to_netmask+0x12>
ret
xor    %eax,%eax
ret
neg    %dil
mov    $0xffffffff,%eax
mov    %edi,%ecx
shl    %cl,%eax
mov    %eax,%edi
jmp    1030 <htonl@plt>

LLVM IR (-O0):
define i32 @slash_to_netmask(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %18
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp uge i32 %8, 32
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %18
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub i32 32, %12
%14 = shl i32 1, %13
%15 = sub nsw i32 %14, 1
%16 = xor i32 %15, -1
%17 = call i32 @htonl(i32 %16)
store i32 %17, i32* %2
br label %18
18: ; preds = %11, %10, %6
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @slash_to_netmask(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = icmp ugt i32 %0, 31
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = sub nuw nsw i32 32, %0
%7 = shl nsw i32 -1, %6
%8 = tail call i32 @htonl(i32 %7)
br label %9
9: ; preds = %3, %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ], [ -1, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, char *, size_t);
void swap(void *A, void *B, size_t size) {
  char T[size];
  memcpy(T, A, size);
  memcpy(A, B, size);
  memcpy(B, T, size);
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x30(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x30(%rbp),%rsi
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rsp,%rbx
lea    0xf(%rdx),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <memcpy@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %r12,%rdx
call   1030 <memcpy@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %r12,%rdx
call   1030 <memcpy@plt>
lea    -0x20(%rbp),%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%9 = load i64, i64* %6
%10 = call i8* @llvm.stacksave()
store i8* %10, i8** %7
%11 = alloca i8, i64 %9
store i64 %9, i64* %8
%12 = load i8*, i8** %4
%13 = load i64, i64* %6
%14 = call i32 @memcpy(i8* %11, i8* %12, i64 %13)
%15 = load i8*, i8** %4
%16 = load i8*, i8** %5
%17 = load i64, i64* %6
%18 = call i32 @memcpy(i8* %15, i8* %16, i64 %17)
%19 = load i8*, i8** %5
%20 = load i64, i64* %6
%21 = call i32 @memcpy(i8* %19, i8* %11, i64 %20)
%22 = load i8*, i8** %7
ret void
}

LLVM IR (-O2):
define void @swap(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8, i64 %2
%5 = call i32 @memcpy(i8* %4, i8* %0, i64 %2)
%6 = call i32 @memcpy(i8* %0, i8* %1, i64 %2)
%7 = call i32 @memcpy(i8* %1, i8* %4, i64 %2)
ret void
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ chain_node(struct node const **);
void create_sll(const struct node **pp1) { chain_node(pp1); }


x86 assembly (clang, -O0):
<create_sll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chain_node@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_sll>:
jmp    1030 <chain_node@plt>

LLVM IR (-O0):
%struct.node = type { i32 }
define void @create_sll(%struct.node** %0) {
%2 = alloca %struct.node**
store %struct.node** %0, %struct.node*** %2
%3 = load %struct.node**, %struct.node*** %2
%4 = call i32 @chain_node(%struct.node** %3)
ret void
}

LLVM IR (-O2):
%struct.node = type { i32 }
define void @create_sll(%struct.node** %0) {
%2 = tail call i32 @chain_node(%struct.node** %0)
ret void
}
char *stpcpy(char *dest, const char *src) {
  while ((*dest++ = *src++) != '\0')
    ;
  return dest - 1;
}


x86 assembly (clang, -O0):
<stpcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     113f <stpcpy+0x3f>
jmp    110c <stpcpy+0xc>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stpcpy>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl (%rsi),%ecx
add    $0x1,%rsi
mov    %cl,0x1(%rax)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <stpcpy+0x10>
ret

LLVM IR (-O0):
define i8* @stpcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %13, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = sext i8 %8 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %5
br label %5
14: ; preds = %5
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 -1
ret i8* %16
}

LLVM IR (-O2):
define i8* @stpcpy(i8* writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %4
}
void svc_handler() {}


x86 assembly (clang, -O0):
<svc_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<svc_handler>:
ret

LLVM IR (-O0):
define void @svc_handler() {
ret void
}

LLVM IR (-O2):
define void @svc_handler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, char *);
void function_name(char *name) {
  write("ganttproject.gan", " name=\"%s\"", name);
}


x86 assembly (clang, -O0):
<function_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_name>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xef0(%rip),%rsi
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"ganttproject.gan\00"
@.str.1 = [11 x i8] c" name=\22%s\22\00"
define void @function_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @write(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"ganttproject.gan\00"
@.str.1 = [11 x i8] c" name=\22%s\22\00"
define void @function_name(i8* %0) {
%2 = tail call i32 @write(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int u_char_to_u_n(int /*<<< orphan*/, char *, int);
int u_char_to_u(uint32_t c, char *result) {
  return u_char_to_u_n(c, result, 4);
}


x86 assembly (clang, -O0):
<u_char_to_u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <u_char_to_u_n@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_char_to_u>:
mov    $0x4,%edx
jmp    1030 <u_char_to_u_n@plt>

LLVM IR (-O0):
define i32 @u_char_to_u(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @u_char_to_u_n(i32 %5, i8* %6, i32 4)
ret i32 %7
}

LLVM IR (-O2):
define i32 @u_char_to_u(i32 %0, i8* %1) {
%3 = tail call i32 @u_char_to_u_n(i32 %0, i8* %1, i32 4)
ret i32 %3
}
/* Variables and functions */
int __simc(int, int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int simc_argc(void) { return __simc(1000, 0, 0, 0); }


x86 assembly (clang, -O0):
<simc_argc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3e8,%edi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <__simc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<simc_argc>:
mov    $0x3e8,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <__simc@plt>

LLVM IR (-O0):
define i32 @simc_argc() {
%1 = call i32 @__simc(i32 1000, i32 0, i32 0, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @simc_argc() {
%1 = tail call i32 @__simc(i32 1000, i32 0, i32 0, i32 0)
ret i32 %1
}
int triple(int x) { return 3 * x; }


x86 assembly (clang, -O0):
<triple>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<triple>:
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @triple(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 3, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @triple(i32 %0) {
%2 = mul nsw i32 %0, 3
ret i32 %2
}
void reiniciarSudoku(int sudoku[9][9]) {
  int i, j;
  for (i = 0; i < 9; i++) {
    for (j = 0; j < 9; j++) {
      sudoku[i][j] = 0;
    }
  }
}


x86 assembly (clang, -O0):
<reiniciarSudoku>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x9,-0xc(%rbp)
jge    1165 <reiniciarSudoku+0x65>
movl   $0x0,-0x10(%rbp)
cmpl   $0x9,-0x10(%rbp)
jge    1152 <reiniciarSudoku+0x52>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
imul   $0x24,%rcx,%rcx
add    %rcx,%rax
movslq -0x10(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1120 <reiniciarSudoku+0x20>
jmp    1157 <reiniciarSudoku+0x57>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <reiniciarSudoku+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reiniciarSudoku>:
push   %rax
mov    $0x144,%edx
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @reiniciarSudoku([9 x i32]* %0) {
%2 = alloca [9 x i32]*
%3 = alloca i32
%4 = alloca i32
store [9 x i32]* %0, [9 x i32]** %2
store i32 0, i32* %3
br label %5
5: ; preds = %24, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 9
br i1 %7, label %8, label %27
8: ; preds = %5
store i32 0, i32* %4
br label %9
9: ; preds = %20, %8
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 9
br i1 %11, label %12, label %23
12: ; preds = %9
%13 = load [9 x i32]*, [9 x i32]** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [9 x i32], [9 x i32]* %13, i64 %15
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds [9 x i32], [9 x i32]* %16, i64 0, i64 %18
store i32 0, i32* %19
br label %20
20: ; preds = %12
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %9
23: ; preds = %9
br label %24
24: ; preds = %23
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %5
27: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @reiniciarSudoku([9 x i32]* nocapture writeonly %0) {
%2 = bitcast [9 x i32]* %0 to i8*
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PrintErrorCode();
int /*<<< orphan*/ dxl_write_byte(int, int, int);
void changeID(int Id, int IdNew) {
  dxl_write_byte(Id, 3, IdNew);
  PrintErrorCode();
}


x86 assembly (clang, -O0):
<changeID>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x3,%esi
call   1030 <dxl_write_byte@plt>
mov    $0x0,%al
call   1040 <PrintErrorCode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<changeID>:
push   %rax
mov    %esi,%edx
mov    $0x3,%esi
call   1030 <dxl_write_byte@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <PrintErrorCode@plt>

LLVM IR (-O0):
define void @changeID(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @dxl_write_byte(i32 %5, i32 3, i32 %6)
%8 = call i32 (...) @PrintErrorCode()
ret void
}

LLVM IR (-O2):
define void @changeID(i32 %0, i32 %1) {
%3 = tail call i32 @dxl_write_byte(i32 %0, i32 3, i32 %1)
%4 = tail call i32 (...) @PrintErrorCode()
ret void
}
void test_3(void) {
  static unsigned bm[16];
  int am[16];
  int j;
  for (j = 0; j < 16; j++)
    bm[j] <<= am[j];
}


x86 assembly (clang, -O0):
<test_3>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x44(%rbp)
cmpl   $0x10,-0x44(%rbp)
jge    114d <test_3+0x4d>
movslq -0x44(%rbp),%rax
mov    -0x40(%rbp,%rax,4),%ecx
movslq -0x44(%rbp),%rdx
mov    %rdx,-0x50(%rbp)
lea    0x2f04(%rip),%rax
mov    (%rax,%rdx,4),%edx
shl    %cl,%edx
mov    -0x50(%rbp),%rcx
lea    0x2ef4(%rip),%rax
mov    %edx,(%rax,%rcx,4)
mov    -0x44(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x44(%rbp)
jmp    110b <test_3+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_3>:
ret

LLVM IR (-O0):
@test_3.bm = internal global [16 x i32] zeroinitializer
define void @test_3() {
%1 = alloca [16 x i32]
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %16, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 16
br i1 %5, label %6, label %19
6: ; preds = %3
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [16 x i32], [16 x i32]* %1, i64 0, i64 %8
%10 = load i32, i32* %9
%11 = load i32, i32* %2
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [16 x i32], [16 x i32]* @test_3.bm, i64 0, i64 %12
%14 = load i32, i32* %13
%15 = shl i32 %14, %10
store i32 %15, i32* %13
br label %16
16: ; preds = %6
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %3
19: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @test_3() {
ret void
}
void test84_MetaPinTestMod_targetInit__I() {}


x86 assembly (clang, -O0):
<test84_MetaPinTestMod_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test84_MetaPinTestMod_targetInit__I>:
ret

LLVM IR (-O0):
define void @test84_MetaPinTestMod_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test84_MetaPinTestMod_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scan(int, int, int, int *, int *);
int scanok(int atx, int aty, int d) {
  int dist, number;
  scan(atx, aty, d, &dist, &number);
  return number > 0 && dist <= number;
}


x86 assembly (clang, -O0):
<scanok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <scan@plt>
xor    %eax,%eax
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jle    1152 <scanok+0x42>
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
setle  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scanok>:
push   %rax
lea    0x4(%rsp),%rcx
mov    %rsp,%r8
call   1030 <scan@plt>
mov    (%rsp),%eax
test   %eax,%eax
setg   %cl
cmp    %eax,0x4(%rsp)
setle  %al
and    %cl,%al
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @scanok(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @scan(i32 %9, i32 %10, i32 %11, i32* %7, i32* %8)
%13 = load i32, i32* %8
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %3
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = icmp sle i32 %16, %17
br label %19
19: ; preds = %15, %3
%20 = phi i1 [ false, %3 ], [ %18, %15 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @scanok(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = bitcast i32* %4 to i8*
%7 = bitcast i32* %5 to i8*
%8 = call i32 @scan(i32 %0, i32 %1, i32 %2, i32* %4, i32* %5)
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 0
%11 = load i32, i32* %4
%12 = icmp sle i32 %11, %9
%13 = select i1 %10, i1 %12, i1 false
%14 = zext i1 %13 to i32
ret i32 %14
}
void gtk_bin_get_child() {}


x86 assembly (clang, -O0):
<gtk_bin_get_child>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_bin_get_child>:
ret

LLVM IR (-O0):
define void @gtk_bin_get_child() {
ret void
}

LLVM IR (-O2):
define void @gtk_bin_get_child() {
ret void
}
/* Type definitions */
struct cpl_allocator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void cpl_default_free(struct cpl_allocator *pAllocator, void *ptr) {
  free(ptr);
}


x86 assembly (clang, -O0):
<cpl_default_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpl_default_free>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.cpl_allocator = type { i32 }
define void @cpl_default_free(%struct.cpl_allocator* %0, i8* %1) {
%3 = alloca %struct.cpl_allocator*
%4 = alloca i8*
store %struct.cpl_allocator* %0, %struct.cpl_allocator** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
%struct.cpl_allocator = type { i32 }
define void @cpl_default_free(%struct.cpl_allocator* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ writestr(int, char *);
void usage(void) {
  writestr(2, "usage: mv SRC DST\n");
  writestr(2, "usage: mv FILE ... DIR\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
lea    0xee0(%rip),%rsi
call   1030 <writestr@plt>
mov    $0x2,%edi
lea    0xee2(%rip),%rsi
call   1030 <writestr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x2,%edi
call   1030 <writestr@plt>
lea    0xeea(%rip),%rsi
mov    $0x2,%edi
pop    %rax
jmp    1030 <writestr@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"usage: mv SRC DST\0A\00"
@.str.1 = [24 x i8] c"usage: mv FILE ... DIR\0A\00"
define void @usage() {
%1 = call i32 @writestr(i32 2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @writestr(i32 2, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"usage: mv SRC DST\0A\00"
@.str.1 = [24 x i8] c"usage: mv FILE ... DIR\0A\00"
define void @usage() {
%1 = tail call i32 @writestr(i32 2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @writestr(i32 2, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int modify_capability_raw(int);
int enable_capability_raw(void) { return modify_capability_raw(1); }


x86 assembly (clang, -O0):
<enable_capability_raw>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <modify_capability_raw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_capability_raw>:
mov    $0x1,%edi
jmp    1030 <modify_capability_raw@plt>

LLVM IR (-O0):
define i32 @enable_capability_raw() {
%1 = call i32 @modify_capability_raw(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @enable_capability_raw() {
%1 = tail call i32 @modify_capability_raw(i32 1)
ret i32 %1
}
int smp_vcpu_scheduled(int cpu) { return 1; }


x86 assembly (clang, -O0):
<smp_vcpu_scheduled>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_vcpu_scheduled>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @smp_vcpu_scheduled(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @smp_vcpu_scheduled(i32 %0) {
ret i32 1
}
void testRHSProblem(int *p) {
  int x = p ? 1 : *p;
  (void)x;
}


x86 assembly (clang, -O0):
<testRHSProblem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1120 <testRHSProblem+0x20>
mov    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1129 <testRHSProblem+0x29>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testRHSProblem>:
ret

LLVM IR (-O0):
define void @testRHSProblem(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
br label %10
10: ; preds = %7, %6
%11 = phi i32 [ 1, %6 ], [ %9, %7 ]
store i32 %11, i32* %3
%12 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @testRHSProblem(i32* nocapture %0) {
ret void
}
unsigned char telnet_opt_ack(unsigned char cmd) {
  switch (cmd) {
  case 253:
    return 251;
  case 254:
    return 252;
  case 251:
    return 253;
  case 252:
    return 254;
  }
  return 0;
}


x86 assembly (clang, -O0):
<telnet_opt_ack>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
add    $0xffffff05,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     115a <telnet_opt_ack+0x5a>
mov    -0x10(%rbp),%rax
lea    0xed3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0xfb,-0x1(%rbp)
jmp    115e <telnet_opt_ack+0x5e>
movb   $0xfc,-0x1(%rbp)
jmp    115e <telnet_opt_ack+0x5e>
movb   $0xfd,-0x1(%rbp)
jmp    115e <telnet_opt_ack+0x5e>
movb   $0xfe,-0x1(%rbp)
jmp    115e <telnet_opt_ack+0x5e>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<telnet_opt_ack>:
add    $0x5,%dil
movzbl %dil,%edx
lea    0x0(,%rdx,8),%ecx
mov    $0xfcfbfefd,%esi
shr    %cl,%esi
xor    %eax,%eax
cmp    $0x4,%dl
cmovb  %esi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @telnet_opt_ack(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
switch i32 %5, label %10 [
i32 253, label %6
i32 254, label %7
i32 251, label %8
i32 252, label %9
]
6: ; preds = %1
store i8 -5, i8* %2
br label %11
7: ; preds = %1
store i8 -4, i8* %2
br label %11
8: ; preds = %1
store i8 -3, i8* %2
br label %11
9: ; preds = %1
store i8 -2, i8* %2
br label %11
10: ; preds = %1
store i8 0, i8* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6
%12 = load i8, i8* %2
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @telnet_opt_ack(i8 zeroext %0) {
%2 = add i8 %0, 5
%3 = icmp ult i8 %2, 4
%4 = zext i8 %2 to i32
%5 = shl nuw nsw i32 %4, 3
%6 = lshr i32 -50594051, %5
%7 = trunc i32 %6 to i8
%8 = select i1 %3, i8 %7, i8 0
ret i8 %8
}
int main(void) {
  char s[20] = {"Awesome"};
  char t[] = {" and nice"};
  pstrcat(s, t);
  printf("%s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec5(%rip),%eax
mov    %eax,-0x10(%rbp)
mov    0xebf(%rip),%rax
mov    %rax,-0x2a(%rbp)
mov    0xebc(%rip),%ax
mov    %ax,-0x22(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x2a(%rbp),%rsi
mov    $0x0,%al
call   1040 <pstrcat@plt>
lea    -0x20(%rbp),%rsi
lea    0xea0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
movaps 0xed4(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movl   $0x0,0x20(%rsp)
movabs $0x63696e20646e6120,%rax
6e 69 63
mov    %rax,(%rsp)
movw   $0x65,0x8(%rsp)
lea    0x10(%rsp),%rbx
mov    %rsp,%rsi
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <pstrcat@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.s = [20 x i8] c"Awesome\00\00\00\00\00\00\00\00\00\00\00\00\00"
@__const.main.t = [10 x i8] c" and nice\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [20 x i8]
%3 = alloca [10 x i8]
store i32 0, i32* %1
%4 = bitcast [20 x i8]* %2 to i8*
%5 = bitcast [10 x i8]* %3 to i8*
%6 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%7 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%8 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @pstrcat to i32 (i8*, i8*, ...)*)(i8* %6, i8* %7)
%9 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.s = [20 x i8] c"Awesome\00\00\00\00\00\00\00\00\00\00\00\00\00"
@__const.main.t = [10 x i8] c" and nice\00"
define i32 @main() {
%1 = alloca [20 x i8]
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%5 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @pstrcat to i32 (i8*, i8*, ...)*)(i8* %3, i8* %4)
%6 = call i32 @puts(i8* %3)
ret i32 0
}
/* Variables and functions */
int __nv_ilogb(double);
int ilogb(double __a) { return __nv_ilogb(__a); }


x86 assembly (clang, -O0):
<ilogb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__nv_ilogb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilogb>:
jmp    1030 <__nv_ilogb@plt>

LLVM IR (-O0):
define i32 @ilogb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @__nv_ilogb(double %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ilogb(double %0) {
%2 = tail call i32 @__nv_ilogb(double %0)
ret i32 %2
}
void ff_hevc_put_hevc_qpel_v16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_v16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_v16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_v16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_v16_12_sse4() {
ret void
}
/* Type definitions */
struct ac_buffer {
  int dummy;
};
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int _buffer_read(struct ac_buffer *, int /*<<< orphan*/ *, int);
int buffer_read_short(struct ac_buffer *buffer, int16_t *value) {
  return _buffer_read(buffer, value, sizeof(short));
}


x86 assembly (clang, -O0):
<buffer_read_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x2,%edx
call   1030 <_buffer_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_read_short>:
mov    $0x2,%edx
jmp    1030 <_buffer_read@plt>

LLVM IR (-O0):
%struct.ac_buffer = type { i32 }
define i32 @buffer_read_short(%struct.ac_buffer* %0, i32* %1) {
%3 = alloca %struct.ac_buffer*
%4 = alloca i32*
store %struct.ac_buffer* %0, %struct.ac_buffer** %3
store i32* %1, i32** %4
%5 = load %struct.ac_buffer*, %struct.ac_buffer** %3
%6 = load i32*, i32** %4
%7 = call i32 @_buffer_read(%struct.ac_buffer* %5, i32* %6, i32 2)
ret i32 %7
}

LLVM IR (-O2):
%struct.ac_buffer = type { i32 }
define i32 @buffer_read_short(%struct.ac_buffer* %0, i32* %1) {
%3 = tail call i32 @_buffer_read(%struct.ac_buffer* %0, i32* %1, i32 2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ AND_();
int /*<<< orphan*/ c64_memAbsoluteAddrY();
void AND_absy(void) {
  c64_memAbsoluteAddrY();
  AND_();
}


x86 assembly (clang, -O0):
<AND_absy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <c64_memAbsoluteAddrY@plt>
mov    $0x0,%al
call   1030 <AND_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AND_absy>:
push   %rax
xor    %eax,%eax
call   1040 <c64_memAbsoluteAddrY@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <AND_@plt>

LLVM IR (-O0):
define void @AND_absy() {
%1 = call i32 (...) @c64_memAbsoluteAddrY()
%2 = call i32 (...) @AND_()
ret void
}

LLVM IR (-O2):
define void @AND_absy() {
%1 = tail call i32 (...) @c64_memAbsoluteAddrY()
%2 = tail call i32 (...) @AND_()
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int int8_t;
typedef int int16_t;

/* Variables and functions */
void st_i16_le(void *x, int16_t i) {
  ((((int8_t *)x)[1]) = ((i) >> 8) % 256, (((uint8_t *)x)[0]) = ((i) % 256));
}


x86 assembly (clang, -O0):
<st_i16_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
mov    %edx,0x4(%rax)
mov    -0xc(%rbp),%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_i16_le>:
mov    %esi,%eax
sar    $0x8,%eax
lea    0xff(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff00,%ecx
sub    %ecx,%eax
lea    0xff(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
mov    %eax,0x4(%rdi)
and    $0xffffff00,%ecx
sub    %ecx,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @st_i16_le(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = srem i32 %6, 256
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
%10 = getelementptr inbounds i32, i32* %9, i64 1
store i32 %7, i32* %10
%11 = load i32, i32* %4
%12 = srem i32 %11, 256
%13 = load i8*, i8** %3
%14 = bitcast i8* %13 to i32*
%15 = getelementptr inbounds i32, i32* %14, i64 0
store i32 %12, i32* %15
ret void
}

LLVM IR (-O2):
define void @st_i16_le(i8* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 8
%4 = srem i32 %3, 256
%5 = bitcast i8* %0 to i32*
%6 = getelementptr inbounds i8, i8* %0, i64 4
%7 = bitcast i8* %6 to i32*
store i32 %4, i32* %7
%8 = srem i32 %1, 256
store i32 %8, i32* %5
ret void
}
void foo689(int p) {}


x86 assembly (clang, -O0):
<foo689>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo689>:
ret

LLVM IR (-O0):
define void @foo689(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo689(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void randomize(void) { srand(time(NULL)); }


x86 assembly (clang, -O0):
<randomize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomize>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @randomize() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
ret void
}

LLVM IR (-O2):
define void @randomize() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}