xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_get_server_protocol_version() {
  printf("NOT IMPLEMENTED:"
         "pa_context_get_server_protocol_version"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_get_server_protocol_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_get_server_protocol_version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"NOT IMPLEMENTED:pa_context_get_server_protocol_version\0A\00"
define i32 @pa_context_get_server_protocol_version() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [55 x i8] c"NOT IMPLEMENTED:pa_context_get_server_protocol_version\00"
define i32 @pa_context_get_server_protocol_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ le16toh(int /*<<< orphan*/);
uint16_t ReadLE16(const unsigned char *ptr) {
  return le16toh(*((uint16_t *)ptr));
}


x86 assembly (clang, -O0):
<ReadLE16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <le16toh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadLE16>:
mov    (%rdi),%edi
jmp    1030 <le16toh@plt>

LLVM IR (-O0):
define i32 @ReadLE16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @le16toh(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @ReadLE16(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @le16toh(i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(unsigned long, unsigned char, int);
int /*<<< orphan*/ GPIOPadConfigSet(unsigned long, unsigned char, int, int);
void GPIOPinTypePECIRx(unsigned long ulPort, unsigned char ucPins) {
  ;
  GPIODirModeSet(ulPort, ucPins, 0x00000000);
  GPIOPadConfigSet(ulPort, ucPins, 0x00000001, 0x00000000);
}


x86 assembly (clang, -O0):
<GPIOPinTypePECIRx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
movzbl -0x9(%rbp),%esi
call   1040 <GPIODirModeSet@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%edx
xor    %ecx,%ecx
movzbl -0x9(%rbp),%esi
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypePECIRx>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %edx,%edx
call   1040 <GPIODirModeSet@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x1,%edx
xor    %ecx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypePECIRx(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = load i8, i8* %4
%7 = call i32 @GPIODirModeSet(i64 %5, i8 zeroext %6, i32 0)
%8 = load i64, i64* %3
%9 = load i8, i8* %4
%10 = call i32 @GPIOPadConfigSet(i64 %8, i8 zeroext %9, i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypePECIRx(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIODirModeSet(i64 %0, i8 zeroext %1, i32 0)
%4 = tail call i32 @GPIOPadConfigSet(i64 %0, i8 zeroext %1, i32 1, i32 0)
ret void
}
/* Variables and functions */
size_t ft_strlen(const char *str) {
  const char *keep;
  keep = str;
  while (*str != '\0')
    ++str;
  return ((size_t)(str - keep));
}


x86 assembly (clang, -O0):
<ft_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1131 <ft_strlen+0x31>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <ft_strlen+0x10>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <ft_strlen+0x10>
ret

LLVM IR (-O0):
define i64 @ft_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %5
13: ; preds = %5
%14 = load i8*, i8** %2
%15 = load i8*, i8** %3
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
ret i64 %18
}

LLVM IR (-O2):
define i64 @ft_strlen(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = ptrtoint i8* %3 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
ret i64 %10
}
/* Variables and functions */
int is_valid_in_Stipulations(size_t __tag) {
  switch (__tag) {
  case 233:
  case 234:
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_valid_in_Stipulations>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffff17,%rax
sub    $0x1,%rax
ja     112d <is_valid_in_Stipulations+0x2d>
jmp    1121 <is_valid_in_Stipulations+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1134 <is_valid_in_Stipulations+0x34>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_in_Stipulations>:
add    $0xffffffffffffff17,%rdi
xor    %eax,%eax
cmp    $0x2,%rdi
setb   %al
ret

LLVM IR (-O0):
define i32 @is_valid_in_Stipulations(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
switch i64 %4, label %6 [
i64 233, label %5
i64 234, label %5
]
5: ; preds = %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_valid_in_Stipulations(i64 %0) {
%2 = add i64 %0, -233
%3 = icmp ult i64 %2, 2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ f4();
int /*<<< orphan*/ f5();
int /*<<< orphan*/ f6();
int /*<<< orphan*/ f61();
int /*<<< orphan*/ pf1();
int /*<<< orphan*/ pf2();
int /*<<< orphan*/ pf3();
int /*<<< orphan*/ pf4();
int /*<<< orphan*/ pf5();
int /*<<< orphan*/ pf6();
int /*<<< orphan*/ pf7();
int main(void) {
  f4();
  f5();
  f6();
  f61();
  pf1();
  pf2();
  pf3();
  pf4();
  pf5();
  pf6();
  pf7();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10d0 <f4@plt>
mov    $0x0,%al
call   1090 <f5@plt>
mov    $0x0,%al
call   1030 <f6@plt>
mov    $0x0,%al
call   1080 <f61@plt>
mov    $0x0,%al
call   1040 <pf1@plt>
mov    $0x0,%al
call   10c0 <pf2@plt>
mov    $0x0,%al
call   1070 <pf3@plt>
mov    $0x0,%al
call   10a0 <pf4@plt>
mov    $0x0,%al
call   1060 <pf5@plt>
mov    $0x0,%al
call   10b0 <pf6@plt>
mov    $0x0,%al
call   1050 <pf7@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   10d0 <f4@plt>
xor    %eax,%eax
call   1090 <f5@plt>
xor    %eax,%eax
call   1030 <f6@plt>
xor    %eax,%eax
call   1080 <f61@plt>
xor    %eax,%eax
call   1040 <pf1@plt>
xor    %eax,%eax
call   10c0 <pf2@plt>
xor    %eax,%eax
call   1070 <pf3@plt>
xor    %eax,%eax
call   10a0 <pf4@plt>
xor    %eax,%eax
call   1060 <pf5@plt>
xor    %eax,%eax
call   10b0 <pf6@plt>
xor    %eax,%eax
call   1050 <pf7@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @f4()
%3 = call i32 (...) @f5()
%4 = call i32 (...) @f6()
%5 = call i32 (...) @f61()
%6 = call i32 (...) @pf1()
%7 = call i32 (...) @pf2()
%8 = call i32 (...) @pf3()
%9 = call i32 (...) @pf4()
%10 = call i32 (...) @pf5()
%11 = call i32 (...) @pf6()
%12 = call i32 (...) @pf7()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @f4()
%2 = tail call i32 (...) @f5()
%3 = tail call i32 (...) @f6()
%4 = tail call i32 (...) @f61()
%5 = tail call i32 (...) @pf1()
%6 = tail call i32 (...) @pf2()
%7 = tail call i32 (...) @pf3()
%8 = tail call i32 (...) @pf4()
%9 = tail call i32 (...) @pf5()
%10 = tail call i32 (...) @pf6()
%11 = tail call i32 (...) @pf7()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/
Atm128Rfa1Uart1InterruptsP__Uart1Interrupts__clearRxInterrupt();
void Atm128Rfa1SerialP__Uart1Interrupts__clearRxInterrupt(void) {
  Atm128Rfa1Uart1InterruptsP__Uart1Interrupts__clearRxInterrupt();
}


x86 assembly (clang, -O0):
<Atm128Rfa1SerialP__Uart1Interrupts__clearRxInterrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Atm128Rfa1Uart1InterruptsP__Uart1Interrupts__clearRxInterrupt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Atm128Rfa1SerialP__Uart1Interrupts__clearRxInterrupt>:
xor    %eax,%eax
jmp    1030 <Atm128Rfa1Uart1InterruptsP__Uart1Interrupts__clearRxInterrupt@plt>

LLVM IR (-O0):
define void @Atm128Rfa1SerialP__Uart1Interrupts__clearRxInterrupt() {
%1 = call i32 (...) @Atm128Rfa1Uart1InterruptsP__Uart1Interrupts__clearRxInterrupt()
ret void
}

LLVM IR (-O2):
define void @Atm128Rfa1SerialP__Uart1Interrupts__clearRxInterrupt() {
%1 = tail call i32 (...) @Atm128Rfa1Uart1InterruptsP__Uart1Interrupts__clearRxInterrupt()
ret void
}
vms_hello() {}


x86 assembly (clang, -O0):
<vms_hello>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vms_hello>:
ret

LLVM IR (-O0):
define i32 @vms_hello() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @vms_hello() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *stringCopy(char *);
int main() {
  char l[] = {'h', 'e', 'l', 'l', 'o'};
  printf("%s", stringCopy(&l[0]));
  char *copy = stringCopy(&l[0]);
  copy[2] = 'g';
  printf("%s", stringCopy(&l[0]));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0x9(%rbp)
mov    0xec6(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0x9(%rbp),%rdi
call   1040 <stringCopy@plt>
mov    %rax,%rsi
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
lea    -0x9(%rbp),%rdi
call   1040 <stringCopy@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x67,0x2(%rax)
lea    -0x9(%rbp),%rdi
call   1040 <stringCopy@plt>
mov    %rax,%rsi
lea    0xe84(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movb   $0x6f,0x4(%rsp)
movl   $0x6c6c6568,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <stringCopy@plt>
lea    0xec3(%rip),%r14
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <stringCopy@plt>
movb   $0x67,0x2(%rax)
mov    %rbx,%rdi
call   1040 <stringCopy@plt>
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.main.l = [5 x i8] c"hello"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i8]
%3 = alloca i8*
store i32 0, i32* %1
%4 = bitcast [5 x i8]* %2 to i8*
%5 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%6 = call i8* @stringCopy(i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%9 = call i8* @stringCopy(i8* %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 2
store i8 103, i8* %11
%12 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%13 = call i8* @stringCopy(i8* %12)
%14 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %13)
ret i32 0
}

LLVM IR (-O2):
@__const.main.l = [5 x i8] c"hello"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [5 x i8]
%2 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
%3 = call i8* @stringCopy(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i8* @stringCopy(i8* %2)
%6 = getelementptr inbounds i8, i8* %5, i64 2
store i8 103, i8* %6
%7 = call i8* @stringCopy(i8* %2)
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %7)
ret i32 0
}
/* Variables and functions */
double Vwca(double);
double exp(double);
double f_wca(double r, double T) { return exp(-Vwca(r) / T) - 1; }


x86 assembly (clang, -O0):
<f_wca>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <Vwca@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
divsd  -0x10(%rbp),%xmm0
call   1040 <exp@plt>
movsd  0xe9b(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_wca>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <Vwca@plt>
xorpd  0xecd(%rip),%xmm0
divsd  (%rsp),%xmm0
call   1040 <exp@plt>
addsd  0xecb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f_wca(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @Vwca(double %5)
%7 = fneg double %6
%8 = load double, double* %4
%9 = fdiv double %7, %8
%10 = call double @exp(double %9)
%11 = fsub double %10, 1.000000e+00
ret double %11
}

LLVM IR (-O2):
define double @f_wca(double %0, double %1) {
%3 = tail call double @Vwca(double %0)
%4 = fneg double %3
%5 = fdiv double %4, %1
%6 = tail call double @exp(double %5)
%7 = fadd double %6, -1.000000e+00
ret double %7
}
void nand_wait_ready(void) {
  while (!((*((volatile unsigned char *)0x4E000020)) & 1))
    ;
}


x86 assembly (clang, -O0):
<nand_wait_ready>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <nand_wait_ready+0x9>
mov    $0x4e000020,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    112b <nand_wait_ready+0x2b>
jmp    1130 <nand_wait_ready+0x30>
jmp    1109 <nand_wait_ready+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_wait_ready>:
testb  $0x1,0x4e000020
01
je     1100 <nand_wait_ready>
ret

LLVM IR (-O0):
define void @nand_wait_ready() {
br label %1
1: ; preds = %7, %0
%2 = load volatile i8, i8* inttoptr (i64 1308622880 to i8*)
%3 = zext i8 %2 to i32
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
br i1 %6, label %7, label %8
7: ; preds = %1
br label %1
8: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @nand_wait_ready() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i8, i8* inttoptr (i64 1308622880 to i8*)
%3 = and i8 %2, 1
%4 = icmp eq i8 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void PlaybackWrapper_Delete(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<PlaybackWrapper_Delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PlaybackWrapper_Delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @PlaybackWrapper_Delete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @PlaybackWrapper_Delete(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("generate-triples-for-GB91\n");
  printf("                          [-i start_idx]\n");
  printf("                          [-j end_idx]\n");
  printf("                          -f sin|tan\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef4(%rip),%rdi
call   1030 <printf@plt>
lea    0xf12(%rip),%rdi
call   1030 <printf@plt>
lea    0xf2e(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef6(%rip),%rdi
call   1030 <puts@plt>
lea    0xf13(%rip),%rdi
call   1030 <puts@plt>
lea    0xf2e(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"generate-triples-for-GB91\0A\00"
@.str.1 = [42 x i8] c" [-i start_idx]\0A\00"
@.str.2 = [40 x i8] c" [-j end_idx]\0A\00"
@.str.3 = [38 x i8] c" -f sin|tan\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [26 x i8] c"generate-triples-for-GB91\00"
@str.4 = [41 x i8] c" [-i start_idx]\00"
@str.5 = [39 x i8] c" [-j end_idx]\00"
@str.6 = [37 x i8] c" -f sin|tan\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str.6, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ UINT_MAX;
scalar_t__ stdout;
int vsnprintf(char *, int /*<<< orphan*/, char const *, int /*<<< orphan*/);
int vprintf(const char *format, va_list ap) {
  return vsnprintf((char *)stdout, UINT_MAX, format, ap);
}


x86 assembly (clang, -O0):
<vprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%rdi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
call   1030 <vsnprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vprintf>:
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2ebc(%rip),%rax
mov    (%rax),%rdi
mov    0x2ec2(%rip),%rax
mov    (%rax),%esi
jmp    1030 <vsnprintf@plt>

LLVM IR (-O0):
@stdout = global i64 0
@UINT_MAX = global i32 0
define i32 @vprintf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i64, i64* @stdout
%6 = inttoptr i64 %5 to i8*
%7 = load i32, i32* @UINT_MAX
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @vsnprintf(i8* %6, i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
@stdout = global i64 0
@UINT_MAX = global i32 0
define i32 @vprintf(i8* nocapture %0, i32 %1) {
%3 = load i64, i64* @stdout
%4 = inttoptr i64 %3 to i8*
%5 = load i32, i32* @UINT_MAX
%6 = tail call i32 @vsnprintf(i8* %4, i32 %5, i8* %0, i32 %1)
ret i32 %6
}
/* Variables and functions */
int strlen(char *);
int /*<<< orphan*/ strncpy(char *, char *, int);
void substring(char *string_orig, char *string_new, int n, int from) {
  int string_orig_length;
  int strncpy_start = 0;
  string_orig_length = strlen(string_orig);
  if (from < 0)
    strncpy_start = string_orig_length - n;
  strncpy(string_new, string_orig + strncpy_start, n);
}


x86 assembly (clang, -O0):
<substring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x18(%rbp)
jge    115c <substring+0x3c>
mov    -0x1c(%rbp),%eax
sub    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0x20(%rbp),%rax
add    %rax,%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<substring>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%r15d
mov    %rsi,%r14
mov    %rdi,%rbp
call   1040 <strlen@plt>
sub    %r15d,%eax
sar    $0x1f,%ebx
and    %eax,%ebx
movslq %ebx,%rsi
add    %rbp,%rsi
mov    %r14,%rdi
mov    %r15d,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define void @substring(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 0, i32* %10
%11 = load i8*, i8** %5
%12 = call i32 @strlen(i8* %11)
store i32 %12, i32* %9
%13 = load i32, i32* %8
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %4
%16 = load i32, i32* %9
%17 = load i32, i32* %7
%18 = sub nsw i32 %16, %17
store i32 %18, i32* %10
br label %19
19: ; preds = %15, %4
%20 = load i8*, i8** %6
%21 = load i8*, i8** %5
%22 = load i32, i32* %10
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i32, i32* %7
%26 = call i32 @strncpy(i8* %20, i8* %24, i32 %25)
ret void
}

LLVM IR (-O2):
define void @substring(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @strlen(i8* %0)
%6 = icmp slt i32 %3, 0
%7 = sub nsw i32 %5, %2
%8 = select i1 %6, i32 %7, i32 0
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = tail call i32 @strncpy(i8* %1, i8* %10, i32 %2)
ret void
}
/* Variables and functions */
int BSP_RawGetCoreId();
int BSP_GetCoreId(void) { return (BSP_RawGetCoreId() & 0xff); }


x86 assembly (clang, -O0):
<BSP_GetCoreId>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <BSP_RawGetCoreId@plt>
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_GetCoreId>:
push   %rax
xor    %eax,%eax
call   1030 <BSP_RawGetCoreId@plt>
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @BSP_GetCoreId() {
%1 = call i32 (...) @BSP_RawGetCoreId()
%2 = and i32 %1, 255
ret i32 %2
}

LLVM IR (-O2):
define i32 @BSP_GetCoreId() {
%1 = tail call i32 (...) @BSP_RawGetCoreId()
%2 = and i32 %1, 255
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ no_op();
int two_loops(int m) {
  for (int i = 0; i < m; i++) {
    no_op();
  }
  for (int j = 0; j < m; j++) {
    no_op();
  }
  return m;
}


x86 assembly (clang, -O0):
<two_loops>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1143 <two_loops+0x33>
mov    $0x0,%al
call   1030 <no_op@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <two_loops+0x12>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116b <two_loops+0x5b>
mov    $0x0,%al
call   1030 <no_op@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114a <two_loops+0x3a>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<two_loops>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
test   %edi,%edi
jle    114c <two_loops+0x3c>
mov    %ebx,%ebp
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <no_op@plt>
add    $0xffffffff,%ebp
jne    1120 <two_loops+0x10>
test   %ebx,%ebx
jle    114c <two_loops+0x3c>
mov    %ebx,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <no_op@plt>
add    $0xffffffff,%ebp
jne    1140 <two_loops+0x30>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @two_loops(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = call i32 (...) @no_op()
br label %11
11: ; preds = %9
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %5
14: ; preds = %5
store i32 0, i32* %4
br label %15
15: ; preds = %21, %14
%16 = load i32, i32* %4
%17 = load i32, i32* %2
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %24
19: ; preds = %15
%20 = call i32 (...) @no_op()
br label %21
21: ; preds = %19
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %15
24: ; preds = %15
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @two_loops(i32 returned %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %4, label %9
3: ; preds = %4
br i1 %2, label %10, label %9
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 (...) @no_op()
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %3, label %4
9: ; preds = %10, %1, %3
ret i32 %0
10: ; preds = %3, %10
%11 = phi i32 [ %13, %10 ], [ 0, %3 ]
%12 = tail call i32 (...) @no_op()
%13 = add nuw nsw i32 %11, 1
%14 = icmp eq i32 %13, %0
br i1 %14, label %9, label %10
}
/* Variables and functions */
int ioctl(int, unsigned long, unsigned long *);
int iioctl(int sock, unsigned long cmd, unsigned long *argp) {
  int retval;
  retval = ioctl(sock, cmd, argp);
  return retval;
}


x86 assembly (clang, -O0):
<iioctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <ioctl@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iioctl>:
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
define i32 @iioctl(i32 %0, i64 %1, i64* %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%8 = load i32, i32* %4
%9 = load i64, i64* %5
%10 = load i64*, i64** %6
%11 = call i32 @ioctl(i32 %8, i64 %9, i64* %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @iioctl(i32 %0, i64 %1, i64* %2) {
%4 = tail call i32 @ioctl(i32 %0, i64 %1, i64* %2)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int feof(int /*<<< orphan*/ *);
int stdio_eof(void *user) { return feof((FILE *)user); }


x86 assembly (clang, -O0):
<stdio_eof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <feof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdio_eof>:
jmp    1030 <feof@plt>

LLVM IR (-O0):
define i32 @stdio_eof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @feof(i32* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @stdio_eof(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @feof(i32* %2)
ret i32 %3
}
/* Variables and functions */
int func_inputs_max();
size_t count_all_inputs(void) {
  const size_t cells = 18 * 6;
  return 2 + cells * (1 + func_inputs_max());
}


x86 assembly (clang, -O0):
<count_all_inputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x6c,-0x8(%rbp)
mov    $0x0,%al
call   1030 <func_inputs_max@plt>
add    $0x1,%eax
cltq
imul   $0x6c,%rax,%rax
add    $0x2,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_all_inputs>:
push   %rax
xor    %eax,%eax
call   1030 <func_inputs_max@plt>
add    $0x1,%eax
cltq
imul   $0x6c,%rax,%rax
or     $0x2,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @count_all_inputs() {
%1 = alloca i64
store i64 108, i64* %1
%2 = call i32 (...) @func_inputs_max()
%3 = add nsw i32 1, %2
%4 = sext i32 %3 to i64
%5 = mul i64 108, %4
%6 = add i64 2, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @count_all_inputs() {
%1 = tail call i32 (...) @func_inputs_max()
%2 = add nsw i32 %1, 1
%3 = sext i32 %2 to i64
%4 = mul nsw i64 %3, 108
%5 = or i64 %4, 2
ret i64 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
uint64_t cpu_to_be64(uint64_t native) { return native; }


x86 assembly (clang, -O0):
<cpu_to_be64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_to_be64>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cpu_to_be64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @cpu_to_be64(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ AltitudeHoldDesiredHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void AltitudeHoldDesiredRequestUpdate() {
  UAVObjRequestUpdate(AltitudeHoldDesiredHandle());
}


x86 assembly (clang, -O0):
<AltitudeHoldDesiredRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AltitudeHoldDesiredHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AltitudeHoldDesiredRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <AltitudeHoldDesiredHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @AltitudeHoldDesiredRequestUpdate() {
%1 = call i32 (...) @AltitudeHoldDesiredHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AltitudeHoldDesiredRequestUpdate() {
%1 = tail call i32 (...) @AltitudeHoldDesiredHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
void ff_hevc_put_hevc_qpel_hv48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_hv48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_hv48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_hv48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_hv48_8_sse4() {
ret void
}
long FloorPowerOfTwo(const long value) {
  long x = value;
  x = x | (x >> 1);
  x = x | (x >> 2);
  x = x | (x >> 4);
  x = x | (x >> 8);
  x = x | (x >> 16);
  x = x | (x >> 32);
  return x - (x >> 1);
}


x86 assembly (clang, -O0):
<FloorPowerOfTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x1,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x2,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x4,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x10,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x20,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
sar    $0x1,%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FloorPowerOfTwo>:
mov    %rdi,%rax
sar    %rax
or     %rdi,%rax
mov    %rax,%rcx
sar    $0x2,%rcx
or     %rax,%rcx
mov    %rcx,%rax
sar    $0x4,%rax
or     %rcx,%rax
mov    %rax,%rcx
sar    $0x8,%rcx
or     %rax,%rcx
mov    %rcx,%rdx
sar    $0x10,%rdx
or     %rcx,%rdx
mov    %rdx,%rax
sar    $0x20,%rax
or     %rdx,%rax
mov    %rax,%rcx
sar    %rcx
sub    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @FloorPowerOfTwo(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
store i64 %4, i64* %3
%5 = load i64, i64* %3
%6 = load i64, i64* %3
%7 = ashr i64 %6, 1
%8 = or i64 %5, %7
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = load i64, i64* %3
%11 = ashr i64 %10, 2
%12 = or i64 %9, %11
store i64 %12, i64* %3
%13 = load i64, i64* %3
%14 = load i64, i64* %3
%15 = ashr i64 %14, 4
%16 = or i64 %13, %15
store i64 %16, i64* %3
%17 = load i64, i64* %3
%18 = load i64, i64* %3
%19 = ashr i64 %18, 8
%20 = or i64 %17, %19
store i64 %20, i64* %3
%21 = load i64, i64* %3
%22 = load i64, i64* %3
%23 = ashr i64 %22, 16
%24 = or i64 %21, %23
store i64 %24, i64* %3
%25 = load i64, i64* %3
%26 = load i64, i64* %3
%27 = ashr i64 %26, 32
%28 = or i64 %25, %27
store i64 %28, i64* %3
%29 = load i64, i64* %3
%30 = load i64, i64* %3
%31 = ashr i64 %30, 1
%32 = sub nsw i64 %29, %31
ret i64 %32
}

LLVM IR (-O2):
define i64 @FloorPowerOfTwo(i64 %0) {
%2 = ashr i64 %0, 1
%3 = or i64 %2, %0
%4 = ashr i64 %3, 2
%5 = or i64 %4, %3
%6 = ashr i64 %5, 4
%7 = or i64 %6, %5
%8 = ashr i64 %7, 8
%9 = or i64 %8, %7
%10 = ashr i64 %9, 16
%11 = or i64 %10, %9
%12 = ashr i64 %11, 32
%13 = or i64 %12, %11
%14 = ashr i64 %13, 1
%15 = sub nsw i64 %13, %14
ret i64 %15
}
void fun(int x) {
  while (x < 100) {
    if (x > 50) {
      x = x * x;
    }
    if (x < 100) {
      x = 51;
    }
  }
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    113b <fun+0x3b>
cmpl   $0x32,-0x4(%rbp)
jle    1125 <fun+0x25>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    1136 <fun+0x36>
movl   $0x33,-0x4(%rbp)
jmp    1107 <fun+0x7>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
cmp    $0x63,%edi
ret

LLVM IR (-O0):
define void @fun(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %17, %1
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %18
6: ; preds = %3
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 50
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %2
%11 = load i32, i32* %2
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %2
br label %13
13: ; preds = %9, %6
%14 = load i32, i32* %2
%15 = icmp slt i32 %14, 100
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 51, i32* %2
br label %17
17: ; preds = %16, %13
br label %3
18: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @fun(i32 %0) {
%2 = icmp slt i32 %0, 100
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = icmp sgt i32 %0, 50
%5 = select i1 %4, i32 %0, i32 1
%6 = mul nsw i32 %5, %0
%7 = icmp slt i32 %6, 100
br label %8
8: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;
typedef int /*<<< orphan*/ Elf64_Xword;
typedef int /*<<< orphan*/ Elf64_Sxword;

/* Variables and functions */
int elfrw_write_Xword(int /*<<< orphan*/ *, int /*<<< orphan*/ const *);
int elfrw_write_Sxword(FILE *fp, Elf64_Sxword const *out) {
  return elfrw_write_Xword(fp, (Elf64_Xword const *)out);
}


x86 assembly (clang, -O0):
<elfrw_write_Sxword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <elfrw_write_Xword@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<elfrw_write_Sxword>:
jmp    1030 <elfrw_write_Xword@plt>

LLVM IR (-O0):
define i32 @elfrw_write_Sxword(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @elfrw_write_Xword(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @elfrw_write_Sxword(i32* %0, i32* %1) {
%3 = tail call i32 @elfrw_write_Xword(i32* %0, i32* %1)
ret i32 %3
}
double dsqr(double x) { return (x * x); }


x86 assembly (clang, -O0):
<dsqr>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsqr>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @dsqr(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @dsqr(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
unsigned int INTDisableInterrupts();
int /*<<< orphan*/ INTRestoreInterrupts(unsigned int);
unsigned int SYSTEMConfigWaitStatesAndPB(unsigned int);
int /*<<< orphan*/ mBMXDisableDRMWaitState();
extern unsigned int __attribute__((always_))
SYSTEMConfigPerformance(unsigned int sys_clock) {
  unsigned int pb_clk;
  unsigned int int_status;
  pb_clk = SYSTEMConfigWaitStatesAndPB(sys_clock);
  int_status = INTDisableInterrupts();
  mBMXDisableDRMWaitState();
  INTRestoreInterrupts(int_status);
  return pb_clk;
}


x86 assembly (clang, -O0):
<SYSTEMConfigPerformance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <SYSTEMConfigWaitStatesAndPB@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <INTDisableInterrupts@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <mBMXDisableDRMWaitState@plt>
mov    -0xc(%rbp),%edi
call   1060 <INTRestoreInterrupts@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SYSTEMConfigPerformance>:
push   %rbp
push   %rbx
push   %rax
call   1030 <SYSTEMConfigWaitStatesAndPB@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <INTDisableInterrupts@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1040 <mBMXDisableDRMWaitState@plt>
mov    %ebp,%edi
call   1060 <INTRestoreInterrupts@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @SYSTEMConfigPerformance(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @SYSTEMConfigWaitStatesAndPB(i32 %5)
store i32 %6, i32* %3
%7 = call i32 (...) @INTDisableInterrupts()
store i32 %7, i32* %4
%8 = call i32 (...) @mBMXDisableDRMWaitState()
%9 = load i32, i32* %4
%10 = call i32 @INTRestoreInterrupts(i32 %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @SYSTEMConfigPerformance(i32 %0) {
%2 = tail call i32 @SYSTEMConfigWaitStatesAndPB(i32 %0)
%3 = tail call i32 (...) @INTDisableInterrupts()
%4 = tail call i32 (...) @mBMXDisableDRMWaitState()
%5 = tail call i32 @INTRestoreInterrupts(i32 %3)
ret i32 %2
}
int isupper(int c) { return (c >= 0x41 && c <= 0x5A); }


x86 assembly (clang, -O0):
<isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isupper+0x20>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void my_strcpy(char *dst, char *src) {
  int i = 0;
  for (i = 0; *(src + i) != '\0'; i++) {
    *(dst + i) = *(src + i);
  }
  *(dst + i) = 0;
}


x86 assembly (clang, -O0):
<my_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1153 <my_strcpy+0x53>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111a <my_strcpy+0x1a>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strcpy>:
mov    (%rsi),%al
test   %al,%al
je     1127 <my_strcpy+0x27>
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
mov    %al,(%rdi,%rcx,1)
movzbl 0x1(%rsi,%rcx,1),%eax
add    $0x1,%rcx
test   %al,%al
jne    1110 <my_strcpy+0x10>
mov    %ecx,%eax
movb   $0x0,(%rdi,%rax,1)
ret
xor    %eax,%eax
movb   $0x0,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @my_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %24, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %27
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = load i8*, i8** %3
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
store i8 %19, i8* %23
br label %24
24: ; preds = %14
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 1
store i32 %26, i32* %5
br label %6
27: ; preds = %6
%28 = load i8*, i8** %3
%29 = load i32, i32* %5
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i8, i8* %28, i64 %30
store i8 0, i8* %31
ret void
}

LLVM IR (-O2):
define void @my_strcpy(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8 [ %11, %5 ], [ %3, %2 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %7, i8* %8
%9 = add nuw nsw i64 %6, 1
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = and i64 %9, 4294967295
br label %15
15: ; preds = %13, %2
%16 = phi i64 [ 0, %2 ], [ %14, %13 ]
%17 = getelementptr inbounds i8, i8* %0, i64 %16
store i8 0, i8* %17
ret void
}
/* Variables and functions */
int /*<<< orphan*/ comparisonTestff(float, float);
int /*<<< orphan*/ printf(char *);
void comparisonOpsff() {
  printf("float op float:\n");
  comparisonTestff(1.0f, 2.0f);
  comparisonTestff(1.0f, 1.0f);
  comparisonTestff(2.0f, 1.0f);
}


x86 assembly (clang, -O0):
<comparisonOpsff>:
push   %rbp
mov    %rsp,%rbp
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
movss  0xecc(%rip),%xmm0
movss  0xec0(%rip),%xmm1
call   1040 <comparisonTestff@plt>
movss  0xeb7(%rip),%xmm1
movaps %xmm1,%xmm0
call   1040 <comparisonTestff@plt>
movss  0xea3(%rip),%xmm0
movss  0xe9f(%rip),%xmm1
call   1040 <comparisonTestff@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<comparisonOpsff>:
push   %rax
lea    0xee0(%rip),%rdi
call   1030 <puts@plt>
movss  0xecb(%rip),%xmm0
movss  0xec7(%rip),%xmm1
call   1040 <comparisonTestff@plt>
movss  0xeb6(%rip),%xmm0
movaps %xmm0,%xmm1
call   1040 <comparisonTestff@plt>
movss  0xeaa(%rip),%xmm0
movss  0xe9e(%rip),%xmm1
pop    %rax
jmp    1040 <comparisonTestff@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"float op float:\0A\00"
define void @comparisonOpsff() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @comparisonTestff(float 1.000000e+00, float 2.000000e+00)
%3 = call i32 @comparisonTestff(float 1.000000e+00, float 1.000000e+00)
%4 = call i32 @comparisonTestff(float 2.000000e+00, float 1.000000e+00)
ret void
}

LLVM IR (-O2):
@str = [16 x i8] c"float op float:\00"
define void @comparisonOpsff() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @comparisonTestff(float 1.000000e+00, float 2.000000e+00)
%3 = tail call i32 @comparisonTestff(float 1.000000e+00, float 1.000000e+00)
%4 = tail call i32 @comparisonTestff(float 2.000000e+00, float 1.000000e+00)
ret void
}
void glResumeTransformFeedback(void) { return; }


x86 assembly (clang, -O0):
<glResumeTransformFeedback>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glResumeTransformFeedback>:
ret

LLVM IR (-O0):
define void @glResumeTransformFeedback() {
ret void
}

LLVM IR (-O2):
define void @glResumeTransformFeedback() {
ret void
}
void nanos_ini_0x1a14720_380301290(int *const omp_priv, int *const omp_orig) {
  (*omp_priv) = 0;
}


x86 assembly (clang, -O0):
<nanos_ini_0x1a14720_380301290>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanos_ini_0x1a14720_380301290>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @nanos_ini_0x1a14720_380301290(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 0, i32* %5
ret void
}

LLVM IR (-O2):
define void @nanos_ini_0x1a14720_380301290(i32* nocapture writeonly %0, i32* nocapture readnone %1) {
store i32 0, i32* %0
ret void
}
int reglib_isalpha_upper(char letter) {
  if (letter >= 'A' && letter <= 'Z')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<reglib_isalpha_upper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1130 <reglib_isalpha_upper+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1130 <reglib_isalpha_upper+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <reglib_isalpha_upper+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reglib_isalpha_upper>:
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @reglib_isalpha_upper(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @reglib_isalpha_upper(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void disp_version(void) {
  printf("sloc-"
         "1.1"
         ", (c) 2013-14 Brian Kubisiak, "
         "see LICENSE for details\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<disp_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<disp_version>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [63 x i8] c"sloc-1.1, (c) 2013-14 Brian Kubisiak, see LICENSE for details\0A\00"
@EXIT_SUCCESS = global i32 0
define void @disp_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [62 x i8] c"sloc-1.1, (c) 2013-14 Brian Kubisiak, see LICENSE for details\00"
define void @disp_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([62 x i8], [62 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
void InitSynToMulticastDstIp(void) {}


x86 assembly (clang, -O0):
<InitSynToMulticastDstIp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitSynToMulticastDstIp>:
ret

LLVM IR (-O0):
define void @InitSynToMulticastDstIp() {
ret void
}

LLVM IR (-O2):
define void @InitSynToMulticastDstIp() {
ret void
}