xunge/DecIR huggingface dataset:
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_retrieve_quaddobl_Laurent_term(int i, int j, int n, int *exp,
                                          double *c) {
  int a[3], fail;
  a[0] = n;
  a[1] = i;
  a[2] = j;
  fail = _ada_use_c2phc4c(565, a, exp, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_retrieve_quaddobl_Laurent_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x24(%rbp)
lea    -0x2c(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x235,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x30(%rbp)
mov    -0x30(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_retrieve_quaddobl_Laurent_term>:
sub    $0x18,%rsp
mov    %edx,0xc(%rsp)
mov    %edi,0x10(%rsp)
mov    %esi,0x14(%rsp)
lea    0xc(%rsp),%rsi
mov    $0x235,%edi
mov    %rcx,%rdx
mov    %r8,%rcx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @syscon_retrieve_quaddobl_Laurent_term(i32 %0, i32 %1, i32 %2, i32* %3, double* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca double*
%11 = alloca [3 x i32]
%12 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store double* %4, double** %10
%13 = load i32, i32* %8
%14 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 0
store i32 %13, i32* %14
%15 = load i32, i32* %6
%16 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 1
store i32 %15, i32* %16
%17 = load i32, i32* %7
%18 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 2
store i32 %17, i32* %18
%19 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 0
%20 = load i32*, i32** %9
%21 = load double*, double** %10
%22 = call i32 @_ada_use_c2phc4c(i32 565, i32* %19, i32* %20, double* %21, i32 0)
store i32 %22, i32* %12
%23 = load i32, i32* %12
ret i32 %23
}

LLVM IR (-O2):
define i32 @syscon_retrieve_quaddobl_Laurent_term(i32 %0, i32 %1, i32 %2, i32* %3, double* %4) {
%6 = alloca [3 x i32]
%7 = bitcast [3 x i32]* %6 to i8*
%8 = getelementptr inbounds [3 x i32], [3 x i32]* %6, i64 0, i64 0
store i32 %2, i32* %8
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %6, i64 0, i64 1
store i32 %0, i32* %9
%10 = getelementptr inbounds [3 x i32], [3 x i32]* %6, i64 0, i64 2
store i32 %1, i32* %10
%11 = call i32 @_ada_use_c2phc4c(i32 565, i32* %8, i32* %3, double* %4, i32 0)
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
char *strndup(char *, int);
void f8() {
  char *x = (char *)malloc(4);
  free(x);
  char *y = strndup(x, 4);
}


x86 assembly (clang, -O0):
<f8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1040 <strndup@plt>
mov    %rax,-0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f8>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @f8() {
%1 = alloca i8*
%2 = alloca i8*
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i8*
store i8* %4, i8** %1
%5 = load i8*, i8** %1
%6 = call i32 @free(i8* %5)
%7 = load i8*, i8** %1
%8 = call i8* @strndup(i8* %7, i32 4)
store i8* %8, i8** %2
ret void
}

LLVM IR (-O2):
define void @f8() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
char *getString();
void IF_dropC(void) {
  char *S;
  S = getString();
  if (S != NULL)
    free((void *)S);
}


x86 assembly (clang, -O0):
<IF_dropC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getString@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1147 <IF_dropC+0x27>
mov    -0x8(%rbp),%rdi
call   1040 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_dropC>:
push   %rax
xor    %eax,%eax
call   1030 <getString@plt>
test   %rax,%rax
je     1136 <IF_dropC+0x16>
mov    %rax,%rdi
pop    %rax
jmp    1040 <free@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @IF_dropC() {
%1 = alloca i8*
%2 = call i8* (...) @getString()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i8*, i8** %1
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
define void @IF_dropC() {
%1 = tail call i8* (...) @getString()
%2 = icmp eq i8* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @free(i8* %1)
br label %5
5: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RogueCmd_require_type(void *);
void *RogueCmd_require_value(void *THIS) {
  RogueCmd_require_type(THIS);
  return THIS;
}


x86 assembly (clang, -O0):
<RogueCmd_require_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RogueCmd_require_type@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RogueCmd_require_value>:
push   %rbx
mov    %rdi,%rbx
call   1030 <RogueCmd_require_type@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @RogueCmd_require_value(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @RogueCmd_require_type(i8* %3)
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @RogueCmd_require_value(i8* returned %0) {
%2 = tail call i32 @RogueCmd_require_type(i8* %0)
ret i8* %0
}
int bitcount(register unsigned int c) {
  register int b;
  for (b = 0; c; c >>= 1) {
    if (c & 01)
      b++;
  }
  return (b);
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1143 <bitcount+0x43>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1130 <bitcount+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1135 <bitcount+0x35>
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <bitcount+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
br label %15
15: ; preds = %14
%16 = load i32, i32* %2
%17 = lshr i32 %16, 1
store i32 %17, i32* %2
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
void __imlib_CopyToRGB(unsigned int color, unsigned int *dst) {
  *dst = (*dst & 0xff000000) | (color & 0x00ffffff);
}


x86 assembly (clang, -O0):
<__imlib_CopyToRGB>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
and    $0xff000000,%ecx
mov    -0x4(%rbp),%eax
and    $0xffffff,%eax
or     %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__imlib_CopyToRGB>:
movzbl 0x3(%rsi),%eax
shl    $0x18,%eax
and    $0xffffff,%edi
or     %eax,%edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @__imlib_CopyToRGB(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = and i32 %6, -16777216
%8 = load i32, i32* %3
%9 = and i32 %8, 16777215
%10 = or i32 %7, %9
%11 = load i32*, i32** %4
store i32 %10, i32* %11
ret void
}

LLVM IR (-O2):
define void @__imlib_CopyToRGB(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = and i32 %3, -16777216
%5 = and i32 %0, 16777215
%6 = or i32 %4, %5
store i32 %6, i32* %1
ret void
}
int is_little_endian(void) {
  static const unsigned long a = 1;
  return *(const unsigned char *)&a;
}


x86 assembly (clang, -O0):
<is_little_endian>:
push   %rbp
mov    %rsp,%rbp
movzbl 0xef5(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@is_little_endian.a = internal constant i64 1
define i32 @is_little_endian() {
%1 = load i8, i8* bitcast (i64* @is_little_endian.a to i8*)
%2 = zext i8 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @is_little_endian() {
ret i32 1
}
int serverFun(int oldMaCookie) { return oldMaCookie; }


x86 assembly (clang, -O0):
<serverFun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<serverFun>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @serverFun(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @serverFun(i32 returned %0) {
ret i32 %0
}
int monotonic_increase(int *ordg, int filenum) {
  int i;
  for (i = 1; i <= filenum - 1; i++)
    if (ordg[i] < ordg[i - 1])
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<monotonic_increase>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jg     1163 <monotonic_increase+0x63>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%edx
sub    $0x1,%edx
movslq %edx,%rdx
cmp    (%rcx,%rdx,4),%eax
jge    1150 <monotonic_increase+0x50>
movl   $0x0,-0x4(%rbp)
jmp    116a <monotonic_increase+0x6a>
jmp    1155 <monotonic_increase+0x55>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <monotonic_increase+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<monotonic_increase>:
mov    $0x1,%eax
cmp    $0x2,%esi
jl     1132 <monotonic_increase+0x32>
mov    %esi,%r8d
mov    (%rdi),%edx
mov    $0x1,%esi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edx,%ecx
mov    (%rdi,%rsi,4),%edx
cmp    %ecx,%edx
jl     1133 <monotonic_increase+0x33>
add    $0x1,%rsi
cmp    %rsi,%r8
jne    1120 <monotonic_increase+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @monotonic_increase(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 1, i32* %6
br label %7
7: ; preds = %27, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = sub nsw i32 %9, 1
%11 = icmp sle i32 %8, %10
br i1 %11, label %12, label %30
12: ; preds = %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %6
%20 = sub nsw i32 %19, 1
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %18, i64 %21
%23 = load i32, i32* %22
%24 = icmp slt i32 %17, %23
br i1 %24, label %25, label %26
25: ; preds = %12
store i32 0, i32* %3
br label %31
26: ; preds = %12
br label %27
27: ; preds = %26
%28 = load i32, i32* %6
%29 = add nsw i32 %28, 1
store i32 %29, i32* %6
br label %7
30: ; preds = %7
store i32 1, i32* %3
br label %31
31: ; preds = %30, %25
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @monotonic_increase(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = load i32, i32* %0
br label %9
7: ; preds = %9
%8 = icmp eq i64 %15, %5
br i1 %8, label %16, label %9
9: ; preds = %4, %7
%10 = phi i32 [ %6, %4 ], [ %13, %7 ]
%11 = phi i64 [ 1, %4 ], [ %15, %7 ]
%12 = getelementptr inbounds i32, i32* %0, i64 %11
%13 = load i32, i32* %12
%14 = icmp slt i32 %13, %10
%15 = add nuw nsw i64 %11, 1
br i1 %14, label %16, label %7
16: ; preds = %9, %7, %2
%17 = phi i32 [ 1, %2 ], [ 1, %7 ], [ 0, %9 ]
ret i32 %17
}
int int_cmp(const int *a, const int *b) { return *a > *b; }


x86 assembly (clang, -O0):
<int_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_cmp>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
setg   %al
ret

LLVM IR (-O0):
define i32 @int_cmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = icmp sgt i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @int_cmp(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp sgt i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
std_len(cnt) struct s_content *cnt;
{ assert(!"any use????"); }


x86 assembly (clang, -O0):
<std_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
xor    %edi,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<std_len>:
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <assert@plt>

LLVM IR (-O0):
%struct.s_content = type opaque
@.str = [12 x i8] c"any use????\00"
define i32 @std_len(%struct.s_content* %0) {
%2 = alloca i32
%3 = alloca %struct.s_content*
store %struct.s_content* %0, %struct.s_content** %3
%4 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
%struct.s_content = type opaque
define i32 @std_len(%struct.s_content* nocapture readnone %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
ret i32 undef
}
void *Thread(void *x) { return 0; }


x86 assembly (clang, -O0):
<Thread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Thread>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @Thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @Thread(i8* nocapture readnone %0) {
ret i8* null
}
/* Type definitions */
struct hostent {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int _nss_sqlite_gethostbyname2_r(char const *, int, struct hostent *, char *,
                                 size_t, int *, int *);
enum nss_status _nss_sqlite_gethostbyname3_r(const char *name, int family,
                                             struct hostent *result,
                                             char *buffer, size_t buflen,
                                             int *errnop, int *h_errnop,
                                             int32_t *ttlp, char **canonp) {
  return _nss_sqlite_gethostbyname2_r(name, family, result, buffer, buflen,
                                      errnop, h_errnop);
}


x86 assembly (clang, -O0):
<_nss_sqlite_gethostbyname3_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <_nss_sqlite_gethostbyname2_r@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_sqlite_gethostbyname3_r>:
jmp    1030 <_nss_sqlite_gethostbyname2_r@plt>

LLVM IR (-O0):
%struct.hostent = type { i32 }
define i32 @_nss_sqlite_gethostbyname3_r(i8* %0, i32 %1, %struct.hostent* %2, i8* %3, i64 %4, i32* %5, i32* %6, i32* %7, i8** %8) {
%10 = alloca i8*
%11 = alloca i32
%12 = alloca %struct.hostent*
%13 = alloca i8*
%14 = alloca i64
%15 = alloca i32*
%16 = alloca i32*
%17 = alloca i32*
%18 = alloca i8**
store i8* %0, i8** %10
store i32 %1, i32* %11
store %struct.hostent* %2, %struct.hostent** %12
store i8* %3, i8** %13
store i64 %4, i64* %14
store i32* %5, i32** %15
store i32* %6, i32** %16
store i32* %7, i32** %17
store i8** %8, i8*** %18
%19 = load i8*, i8** %10
%20 = load i32, i32* %11
%21 = load %struct.hostent*, %struct.hostent** %12
%22 = load i8*, i8** %13
%23 = load i64, i64* %14
%24 = load i32*, i32** %15
%25 = load i32*, i32** %16
%26 = call i32 @_nss_sqlite_gethostbyname2_r(i8* %19, i32 %20, %struct.hostent* %21, i8* %22, i64 %23, i32* %24, i32* %25)
ret i32 %26
}

LLVM IR (-O2):
%struct.hostent = type { i32 }
define i32 @_nss_sqlite_gethostbyname3_r(i8* %0, i32 %1, %struct.hostent* %2, i8* %3, i64 %4, i32* %5, i32* %6, i32* nocapture readnone %7, i8** nocapture readnone %8) {
%10 = tail call i32 @_nss_sqlite_gethostbyname2_r(i8* %0, i32 %1, %struct.hostent* %2, i8* %3, i64 %4, i32* %5, i32* %6)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ runtime_error(int);
void __illegal__(void) { runtime_error(11); }


x86 assembly (clang, -O0):
<__illegal__>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%edi
call   1030 <runtime_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__illegal__>:
mov    $0xb,%edi
jmp    1030 <runtime_error@plt>

LLVM IR (-O0):
define void @__illegal__() {
%1 = call i32 @runtime_error(i32 11)
ret void
}

LLVM IR (-O2):
define void @__illegal__() {
%1 = tail call i32 @runtime_error(i32 11)
ret void
}
int twist_u_on_cornerperm(cperm)
int cperm;
{
  int temp_arr[8];
  cornerperm_unpack(cperm, temp_arr);
  four_cycle(temp_arr, 1, 2, 3, 0);
  return cornerperm_pack(temp_arr);
}


x86 assembly (clang, -O0):
<twist_u_on_cornerperm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x30(%rbp),%rsi
mov    $0x0,%al
call   1040 <cornerperm_unpack@plt>
lea    -0x30(%rbp),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
xor    %r8d,%r8d
mov    $0x0,%al
call   1030 <four_cycle@plt>
lea    -0x30(%rbp),%rdi
mov    $0x0,%al
call   1050 <cornerperm_pack@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twist_u_on_cornerperm>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <cornerperm_unpack@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
xor    %r8d,%r8d
xor    %eax,%eax
call   1030 <four_cycle@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1050 <cornerperm_pack@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @twist_u_on_cornerperm(i32 %0) {
%2 = alloca i32
%3 = alloca [8 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [8 x i32], [8 x i32]* %3, i64 0, i64 0
%6 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @cornerperm_unpack to i32 (i32, i32*, ...)*)(i32 %4, i32* %5)
%7 = getelementptr inbounds [8 x i32], [8 x i32]* %3, i64 0, i64 0
%8 = call i32 (i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @four_cycle to i32 (i32*, i32, i32, i32, i32, ...)*)(i32* %7, i32 1, i32 2, i32 3, i32 0)
%9 = getelementptr inbounds [8 x i32], [8 x i32]* %3, i64 0, i64 0
%10 = call i32 (i32*, ...) bitcast (i32 (...)* @cornerperm_pack to i32 (i32*, ...)*)(i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @twist_u_on_cornerperm(i32 %0) {
%2 = alloca [8 x i32]
%3 = bitcast [8 x i32]* %2 to i8*
%4 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%5 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @cornerperm_unpack to i32 (i32, i32*, ...)*)(i32 %0, i32* %4)
%6 = call i32 (i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @four_cycle to i32 (i32*, i32, i32, i32, i32, ...)*)(i32* %4, i32 1, i32 2, i32 3, i32 0)
%7 = call i32 (i32*, ...) bitcast (i32 (...)* @cornerperm_pack to i32 (i32*, ...)*)(i32* %4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char const *);
void build_filename(char *buf, int size, const char *root, const char *path) {
  strcat(buf, root);
  strcat(buf, path);
}


x86 assembly (clang, -O0):
<build_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_filename>:
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdi,%rbx
mov    %rdx,%rsi
call   1030 <strcat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <strcat@plt>

LLVM IR (-O0):
define void @build_filename(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %7
%11 = call i32 @strcat(i8* %9, i8* %10)
%12 = load i8*, i8** %5
%13 = load i8*, i8** %8
%14 = call i32 @strcat(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @build_filename(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i32 @strcat(i8* %0, i8* %2)
%6 = tail call i32 @strcat(i8* %0, i8* %3)
ret void
}
int _get_quote_seps(int value, int flags, struct lconv *lc) {
  int ret;
  if (!(flags & (1 << 7)))
    ret = 0;
  else {
    ret = (value - ((value % 3) == 0 ? 1 : 0)) / 3;
  }
  return ret;
}


x86 assembly (clang, -O0):
<_get_quote_seps>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    112b <_get_quote_seps+0x2b>
movl   $0x0,-0x14(%rbp)
jmp    115b <_get_quote_seps+0x5b>
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%eax
mov    %edx,%esi
xor    %ecx,%ecx
mov    $0x1,%edx
cmp    $0x0,%esi
cmove  %edx,%ecx
sub    %ecx,%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_quote_seps>:
xor    %eax,%eax
test   $0x80,%sil
je     1132 <_get_quote_seps+0x32>
imul   $0xaaaaaaab,%edi,%eax
add    $0x2aaaaaaa,%eax
cmp    $0x55555555,%eax
sbb    $0x0,%edi
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
%struct.lconv = type opaque
define i32 @_get_quote_seps(i32 %0, i32 %1, %struct.lconv* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.lconv*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.lconv* %2, %struct.lconv** %6
%8 = load i32, i32* %5
%9 = and i32 %8, 128
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %3
store i32 0, i32* %7
br label %21
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load i32, i32* %4
%15 = srem i32 %14, 3
%16 = icmp eq i32 %15, 0
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 1, i32 0
%19 = sub nsw i32 %13, %18
%20 = sdiv i32 %19, 3
store i32 %20, i32* %7
br label %21
21: ; preds = %12, %11
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
%struct.lconv = type opaque
define i32 @_get_quote_seps(i32 %0, i32 %1, %struct.lconv* nocapture readnone %2) {
%4 = and i32 %1, 128
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = srem i32 %0, 3
%8 = icmp eq i32 %7, 0
%9 = sext i1 %8 to i32
%10 = add i32 %9, %0
%11 = sdiv i32 %10, 3
br label %12
12: ; preds = %3, %6
%13 = phi i32 [ %11, %6 ], [ 0, %3 ]
ret i32 %13
}
/* Variables and functions */
bool tft_is_inverted(void) { return false; }


x86 assembly (clang, -O0):
<tft_is_inverted>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tft_is_inverted>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tft_is_inverted() {
ret i32 0
}

LLVM IR (-O2):
define i32 @tft_is_inverted() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr,
          "usage: %s -i <in_filename> -o <out_filename> [-p <pad_byte>]\n",
          "png2bin");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
lea    0xf13(%rip),%rdx
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
lea    0xf17(%rip),%rdx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [62 x i8] c"usage: %s -i <in_filename> -o <out_filename> [-p <pad_byte>]\0A\00"
@.str.1 = [8 x i8] c"png2bin\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [62 x i8] c"usage: %s -i <in_filename> -o <out_filename> [-p <pad_byte>]\0A\00"
@.str.1 = [8 x i8] c"png2bin\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int isLeapYear(int year) {
  int result = 0;
  if (((year) % 4 == 0) && ((year) % 100 != 0) || ((year) % 400 == 0))
    result = 1;
  return result;
}


x86 assembly (clang, -O0):
<isLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1136 <isLeapYear+0x36>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    114a <isLeapYear+0x4a>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1151 <isLeapYear+0x51>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeapYear>:
test   $0x3,%dil
sete   %al
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%edx
ror    $0x2,%edx
cmp    $0x28f5c29,%edx
setae  %dl
and    %al,%dl
ror    $0x4,%ecx
cmp    $0xa3d70b,%ecx
setb   %al
or     %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @isLeapYear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %2
%9 = srem i32 %8, 100
%10 = icmp ne i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %7, %1
%12 = load i32, i32* %2
%13 = srem i32 %12, 400
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11, %7
store i32 1, i32* %3
br label %16
16: ; preds = %15, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @isLeapYear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = srem i32 %0, 100
%5 = icmp ne i32 %4, 0
%6 = and i1 %3, %5
%7 = srem i32 %0, 400
%8 = icmp eq i32 %7, 0
%9 = or i1 %8, %6
%10 = zext i1 %9 to i32
ret i32 %10
}
void OPLCloseTable(void) {}


x86 assembly (clang, -O0):
<OPLCloseTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPLCloseTable>:
ret

LLVM IR (-O0):
define void @OPLCloseTable() {
ret void
}

LLVM IR (-O2):
define void @OPLCloseTable() {
ret void
}
/* Type definitions */
struct sprd_mcdt_chan {
  int dummy;
};

/* Variables and functions */
void sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan) {}


x86 assembly (clang, -O0):
<sprd_mcdt_chan_dma_disable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprd_mcdt_chan_dma_disable>:
ret

LLVM IR (-O0):
%struct.sprd_mcdt_chan = type { i32 }
define void @sprd_mcdt_chan_dma_disable(%struct.sprd_mcdt_chan* %0) {
%2 = alloca %struct.sprd_mcdt_chan*
store %struct.sprd_mcdt_chan* %0, %struct.sprd_mcdt_chan** %2
ret void
}

LLVM IR (-O2):
%struct.sprd_mcdt_chan = type { i32 }
define void @sprd_mcdt_chan_dma_disable(%struct.sprd_mcdt_chan* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ s2twc(int);
void s2twc_(int *enabledisable) { s2twc(*enabledisable); }


x86 assembly (clang, -O0):
<s2twc_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <s2twc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2twc_>:
mov    (%rdi),%edi
jmp    1030 <s2twc@plt>

LLVM IR (-O0):
define void @s2twc_(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @s2twc(i32 %4)
ret void
}

LLVM IR (-O2):
define void @s2twc_(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @s2twc(i32 %2)
ret void
}
int setPreambleLength(const unsigned int *const length,
                      int (*spiTransfer)(unsigned char *const, unsigned int,
                                         void *const customData),
                      void *const customData) {
  unsigned char data[] = {0x2C | 1 << 7, (unsigned char)(*length >> 8),
                          (unsigned char)*length};
  return (*spiTransfer)(data, 3, customData);
}


x86 assembly (clang, -O0):
<setPreambleLength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movb   $0xac,-0x1b(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shr    $0x8,%eax
mov    %al,-0x1a(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rax
lea    -0x1b(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    $0x3,%esi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setPreambleLength>:
push   %rax
mov    %rsi,%rax
movb   $0xac,0x5(%rsp)
movzwl (%rdi),%ecx
rol    $0x8,%cx
mov    %cx,0x6(%rsp)
lea    0x5(%rsp),%rdi
mov    $0x3,%esi
call   *%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @setPreambleLength(i32* %0, i32 (i8*, i32, i8*)* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32 (i8*, i32, i8*)*
%6 = alloca i8*
%7 = alloca [3 x i8]
store i32* %0, i32** %4
store i32 (i8*, i32, i8*)* %1, i32 (i8*, i32, i8*)** %5
store i8* %2, i8** %6
%8 = getelementptr inbounds [3 x i8], [3 x i8]* %7, i64 0, i64 0
store i8 -84, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = lshr i32 %11, 8
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = getelementptr inbounds i8, i8* %9, i64 1
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = trunc i32 %16 to i8
store i8 %17, i8* %14
%18 = load i32 (i8*, i32, i8*)*, i32 (i8*, i32, i8*)** %5
%19 = getelementptr inbounds [3 x i8], [3 x i8]* %7, i64 0, i64 0
%20 = load i8*, i8** %6
%21 = call i32 %18(i8* %19, i32 3, i8* %20)
ret i32 %21
}

LLVM IR (-O2):
define i32 @setPreambleLength(i32* nocapture %0, i32 (i8*, i32, i8*)* nocapture %1, i8* %2) {
%4 = alloca [3 x i8]
%5 = getelementptr inbounds [3 x i8], [3 x i8]* %4, i64 0, i64 0
store i8 -84, i8* %5
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %4, i64 0, i64 1
%7 = load i32, i32* %0
%8 = lshr i32 %7, 8
%9 = trunc i32 %8 to i8
store i8 %9, i8* %6
%10 = getelementptr inbounds [3 x i8], [3 x i8]* %4, i64 0, i64 2
%11 = trunc i32 %7 to i8
store i8 %11, i8* %10
%12 = call i32 %1(i8* %5, i32 3, i8* %2)
ret i32 %12
}
int mm_seq_to_idx(long long seq) { return ((seq >> 26) & ((1 << 10) - 1)); }


x86 assembly (clang, -O0):
<mm_seq_to_idx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x1a,%rax
and    $0x3ff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_seq_to_idx>:
mov    %rdi,%rax
shr    $0x1a,%rax
and    $0x3ff,%eax
ret

LLVM IR (-O0):
define i32 @mm_seq_to_idx(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 26
%5 = and i64 %4, 1023
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @mm_seq_to_idx(i64 %0) {
%2 = lshr i64 %0, 26
%3 = trunc i64 %2 to i32
%4 = and i32 %3, 1023
ret i32 %4
}
float clad_maxf(float one, float two) { return (one > two) ? one : two; }


x86 assembly (clang, -O0):
<clad_maxf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    112c <clad_maxf+0x2c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <clad_maxf+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clad_maxf>:
maxss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @clad_maxf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @clad_maxf(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
int default_on_ac(struct battery *b) { return 0; }


x86 assembly (clang, -O0):
<default_on_ac>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_on_ac>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.battery = type opaque
define i32 @default_on_ac(%struct.battery* %0) {
%2 = alloca %struct.battery*
store %struct.battery* %0, %struct.battery** %2
ret i32 0
}

LLVM IR (-O2):
%struct.battery = type opaque
define i32 @default_on_ac(%struct.battery* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cc1101_strobe(int, int);
int /*<<< orphan*/ cc1101_wr_reg(int, int);
int /*<<< orphan*/ gpio_read(int);
void cca_wait() {
  cc1101_strobe(0x3A, 0x00u);
  cc1101_wr_reg(0x00, 0x09);
  cc1101_strobe(0x34, 0x00u);
  while (!(gpio_read(4)))
    ;
}


x86 assembly (clang, -O0):
<cca_wait>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a,%edi
xor    %esi,%esi
call   1050 <cc1101_strobe@plt>
xor    %edi,%edi
mov    $0x9,%esi
call   1030 <cc1101_wr_reg@plt>
mov    $0x34,%edi
xor    %esi,%esi
call   1050 <cc1101_strobe@plt>
mov    $0x4,%edi
call   1040 <gpio_read@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1177 <cca_wait+0x47>
jmp    117c <cca_wait+0x4c>
jmp    1158 <cca_wait+0x28>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cca_wait>:
push   %rax
mov    $0x3a,%edi
xor    %esi,%esi
call   1050 <cc1101_strobe@plt>
xor    %edi,%edi
mov    $0x9,%esi
call   1030 <cc1101_wr_reg@plt>
mov    $0x34,%edi
xor    %esi,%esi
call   1050 <cc1101_strobe@plt>
cs nopw 0x0(%rax,%rax,1)
nop
mov    $0x4,%edi
call   1040 <gpio_read@plt>
test   %eax,%eax
je     1160 <cca_wait+0x30>
pop    %rax
ret

LLVM IR (-O0):
define void @cca_wait() {
%1 = call i32 @cc1101_strobe(i32 58, i32 0)
%2 = call i32 @cc1101_wr_reg(i32 0, i32 9)
%3 = call i32 @cc1101_strobe(i32 52, i32 0)
br label %4
4: ; preds = %8, %0
%5 = call i32 @gpio_read(i32 4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @cca_wait() {
%1 = tail call i32 @cc1101_strobe(i32 58, i32 0)
%2 = tail call i32 @cc1101_wr_reg(i32 0, i32 9)
%3 = tail call i32 @cc1101_strobe(i32 52, i32 0)
br label %4
4: ; preds = %4, %0
%5 = tail call i32 @gpio_read(i32 4)
%6 = icmp eq i32 %5, 0
br i1 %6, label %4, label %7
7: ; preds = %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void print_usage(const char *name) {
  fprintf(stderr, "usage: %s num_clients num_printers buffer_size\n", name);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [48 x i8] c"usage: %s num_clients num_printers buffer_size\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [48 x i8] c"usage: %s num_clients num_printers buffer_size\0A\00"
define void @print_usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
void mixedSignedness2(int a) {
  unsigned max = (~0U);
  clang_analyzer_eval(a <= max);
  clang_analyzer_eval((a + 2) <= max);
  clang_analyzer_eval((a + 2U) <= max);
}


x86 assembly (clang, -O0):
<mixedSignedness2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
mov    -0x4(%rbp),%eax
add    $0x2,%eax
cmp    -0x8(%rbp),%eax
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
mov    -0x4(%rbp),%eax
add    $0x2,%eax
cmp    -0x8(%rbp),%eax
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mixedSignedness2>:
push   %rax
mov    $0x1,%edi
call   1030 <clang_analyzer_eval@plt>
mov    $0x1,%edi
call   1030 <clang_analyzer_eval@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @mixedSignedness2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp ule i32 %4, %5
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 2
%11 = load i32, i32* %3
%12 = icmp ule i32 %10, %11
%13 = zext i1 %12 to i32
%14 = call i32 @clang_analyzer_eval(i32 %13)
%15 = load i32, i32* %2
%16 = add i32 %15, 2
%17 = load i32, i32* %3
%18 = icmp ule i32 %16, %17
%19 = zext i1 %18 to i32
%20 = call i32 @clang_analyzer_eval(i32 %19)
ret void
}

LLVM IR (-O2):
define void @mixedSignedness2(i32 %0) {
%2 = tail call i32 @clang_analyzer_eval(i32 1)
%3 = tail call i32 @clang_analyzer_eval(i32 1)
%4 = tail call i32 @clang_analyzer_eval(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CompileMark(int, int);
int /*<<< orphan*/ MakeLink(int, int /*<<< orphan*/);
void DoDone(void) {
  MakeLink(4, 0);
  CompileMark(29, 4);
}


x86 assembly (clang, -O0):
<DoDone>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
xor    %esi,%esi
call   1040 <MakeLink@plt>
mov    $0x1d,%edi
mov    $0x4,%esi
call   1030 <CompileMark@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoDone>:
push   %rax
mov    $0x4,%edi
xor    %esi,%esi
call   1040 <MakeLink@plt>
mov    $0x1d,%edi
mov    $0x4,%esi
pop    %rax
jmp    1030 <CompileMark@plt>

LLVM IR (-O0):
define void @DoDone() {
%1 = call i32 @MakeLink(i32 4, i32 0)
%2 = call i32 @CompileMark(i32 29, i32 4)
ret void
}

LLVM IR (-O2):
define void @DoDone() {
%1 = tail call i32 @MakeLink(i32 4, i32 0)
%2 = tail call i32 @CompileMark(i32 29, i32 4)
ret void
}
int func2(int in) { return in % 2; }


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
mov    %edi,%eax
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @func2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @func2(i32 %0) {
%2 = srem i32 %0, 2
ret i32 %2
}
void gtk_accel_map_save_fd() {}


x86 assembly (clang, -O0):
<gtk_accel_map_save_fd>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accel_map_save_fd>:
ret

LLVM IR (-O0):
define void @gtk_accel_map_save_fd() {
ret void
}

LLVM IR (-O2):
define void @gtk_accel_map_save_fd() {
ret void
}
int on_segment(double x1, double y1, double x2, double y2, double tpx,
               double tpy) {
  return 0;
}


x86 assembly (clang, -O0):
<on_segment>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  %xmm5,-0x30(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_segment>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @on_segment(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @on_segment(double %0, double %1, double %2, double %3, double %4, double %5) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ libewf_fatal_print(char *);
int /*<<< orphan*/ memset(int /*<<< orphan*/ *, int /*<<< orphan*/, size_t);
uint8_t *ewf_sectors_chunk_wipe(uint8_t *sectors_chunk, size_t size) {
  size_t sectors_chunk_size = sizeof(uint8_t) * size;
  if (sectors_chunk == NULL) {
    libewf_fatal_print("ewf_sectors_chunk_realloc: invalid sectors_chunk\n");
  }
  memset(sectors_chunk, 0, sectors_chunk_size);
  return (sectors_chunk);
}


x86 assembly (clang, -O0):
<ewf_sectors_chunk_wipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x2,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1153 <ewf_sectors_chunk_wipe+0x33>
lea    0xeb2(%rip),%rdi
call   1030 <libewf_fatal_print@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ewf_sectors_chunk_wipe>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
test   %rdi,%rdi
jne    113b <ewf_sectors_chunk_wipe+0x1b>
lea    0xeca(%rip),%rdi
call   1030 <libewf_fatal_print@plt>
shl    $0x2,%rbx
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1040 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [50 x i8] c"ewf_sectors_chunk_realloc: invalid sectors_chunk\0A\00"
define i32* @ewf_sectors_chunk_wipe(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = mul i64 4, %6
store i64 %7, i64* %5
%8 = load i32*, i32** %3
%9 = icmp eq i32* %8, null
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @libewf_fatal_print(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
%13 = load i32*, i32** %3
%14 = load i64, i64* %5
%15 = call i32 @memset(i32* %13, i32 0, i64 %14)
%16 = load i32*, i32** %3
ret i32* %16
}

LLVM IR (-O2):
@.str = [50 x i8] c"ewf_sectors_chunk_realloc: invalid sectors_chunk\0A\00"
define i32* @ewf_sectors_chunk_wipe(i32* returned %0, i64 %1) {
%3 = icmp eq i32* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @libewf_fatal_print(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %2
%7 = shl i64 %1, 2
%8 = tail call i32 @memset(i32* %0, i32 0, i64 %7)
ret i32* %0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int close(int);
int /*<<< orphan*/ err_msg(char *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
int Close(int sockfd) {
  int ret;
  if ((ret = close(sockfd)) == -1) {
    err_msg("error closing socket: %s", strerror(errno));
    exit(EXIT_FAILURE);
  }
  return ret;
}


x86 assembly (clang, -O0):
<Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    %eax,-0x8(%rbp)
cmp    $0xffffffff,%eax
jne    1189 <Close+0x49>
mov    0x2e7a(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
mov    %eax,%esi
lea    0xe8a(%rip),%rdi
call   1040 <err_msg@plt>
mov    0x2e56(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Close>:
push   %rax
call   1030 <close@plt>
cmp    $0xffffffff,%eax
je     114d <Close+0xd>
pop    %rcx
ret
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
lea    0xe9e(%rip),%rdi
mov    %eax,%esi
call   1040 <err_msg@plt>
mov    0x2e68(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"error closing socket: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @Close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @close(i32 %4)
store i32 %5, i32* %3
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i32, i32* @errno
%9 = call i32 @strerror(i32 %8)
%10 = call i32 @err_msg(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [25 x i8] c"error closing socket: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @Close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = load i32, i32* @errno
%6 = tail call i32 @strerror(i32 %5)
%7 = tail call i32 @err_msg(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
ret i32 %2
}
int test_imm_CEint64_lowword_reg(long long val) {
  return ((val) & (0xCE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CEint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xce,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CEint64_lowword_reg>:
test   $0xce,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CEint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 206
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_CEint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 206
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}