#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase) {
  ASSERT((ui32Base == 0x40038000) || (ui32Base == 0x40039000));
  ASSERT((ui32Phase == 0x00000000) || (ui32Phase == 0x00000001) ||
         (ui32Phase == 0x00000002) || (ui32Phase == 0x00000003) ||
         (ui32Phase == 0x00000004) || (ui32Phase == 0x00000005) ||
         (ui32Phase == 0x00000006) || (ui32Phase == 0x00000007) ||
         (ui32Phase == 0x00000008) || (ui32Phase == 0x00000009) ||
         (ui32Phase == 0x0000000A) || (ui32Phase == 0x0000000B) ||
         (ui32Phase == 0x0000000C) || (ui32Phase == 0x0000000D) ||
         (ui32Phase == 0x0000000E) || (ui32Phase == 0x0000000F));
  (*((volatile uint32_t *)(ui32Base + 0x00000024))) = ui32Phase;
}


x86 assembly (clang, -O0):
<ADCPhaseDelaySet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40038000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <ADCPhaseDelaySet+0x2d>
cmpl   $0x40039000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x1,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x2,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x3,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x4,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x5,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x6,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x7,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x8,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0x9,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0xa,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0xb,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0xc,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0xd,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
mov    $0x1,%al
cmpl   $0xe,-0x8(%rbp)
mov    %al,-0xa(%rbp)
je     1235 <ADCPhaseDelaySet+0x125>
cmpl   $0xf,-0x8(%rbp)
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x24,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCPhaseDelaySet>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40038000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x10,%ebx
setb   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x24(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ADCPhaseDelaySet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = icmp eq i32 %14, 0
br i1 %15, label %61, label %16
16: ; preds = %10
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 1
br i1 %18, label %61, label %19
19: ; preds = %16
%20 = load i32, i32* %4
%21 = icmp eq i32 %20, 2
br i1 %21, label %61, label %22
22: ; preds = %19
%23 = load i32, i32* %4
%24 = icmp eq i32 %23, 3
br i1 %24, label %61, label %25
25: ; preds = %22
%26 = load i32, i32* %4
%27 = icmp eq i32 %26, 4
br i1 %27, label %61, label %28
28: ; preds = %25
%29 = load i32, i32* %4
%30 = icmp eq i32 %29, 5
br i1 %30, label %61, label %31
31: ; preds = %28
%32 = load i32, i32* %4
%33 = icmp eq i32 %32, 6
br i1 %33, label %61, label %34
34: ; preds = %31
%35 = load i32, i32* %4
%36 = icmp eq i32 %35, 7
br i1 %36, label %61, label %37
37: ; preds = %34
%38 = load i32, i32* %4
%39 = icmp eq i32 %38, 8
br i1 %39, label %61, label %40
40: ; preds = %37
%41 = load i32, i32* %4
%42 = icmp eq i32 %41, 9
br i1 %42, label %61, label %43
43: ; preds = %40
%44 = load i32, i32* %4
%45 = icmp eq i32 %44, 10
br i1 %45, label %61, label %46
46: ; preds = %43
%47 = load i32, i32* %4
%48 = icmp eq i32 %47, 11
br i1 %48, label %61, label %49
49: ; preds = %46
%50 = load i32, i32* %4
%51 = icmp eq i32 %50, 12
br i1 %51, label %61, label %52
52: ; preds = %49
%53 = load i32, i32* %4
%54 = icmp eq i32 %53, 13
br i1 %54, label %61, label %55
55: ; preds = %52
%56 = load i32, i32* %4
%57 = icmp eq i32 %56, 14
br i1 %57, label %61, label %58
58: ; preds = %55
%59 = load i32, i32* %4
%60 = icmp eq i32 %59, 15
br label %61
61: ; preds = %58, %55, %52, %49, %46, %43, %40, %37, %34, %31, %28, %25, %22, %19, %16, %10
%62 = phi i1 [ true, %55 ], [ true, %52 ], [ true, %49 ], [ true, %46 ], [ true, %43 ], [ true, %40 ], [ true, %37 ], [ true, %34 ], [ true, %31 ], [ true, %28 ], [ true, %25 ], [ true, %22 ], [ true, %19 ], [ true, %16 ], [ true, %10 ], [ %60, %58 ]
%63 = zext i1 %62 to i32
%64 = call i32 @ASSERT(i32 %63)
%65 = load i32, i32* %4
%66 = load i32, i32* %3
%67 = add nsw i32 %66, 36
%68 = sext i32 %67 to i64
%69 = inttoptr i64 %68 to i32*
store volatile i32 %65, i32* %69
ret void
}

LLVM IR (-O2):
define void @ADCPhaseDelaySet(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp ult i32 %1, 16
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 36
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %1, i32* %12
ret void
}