xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  (void)argc;
  (void)argv;
  printf("Hello World (built with make)\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [31 x i8] c"Hello World (built with make)\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [30 x i8] c"Hello World (built with make)\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
ret i32 0
}
unsigned int scuUngatePeripheralClock(const unsigned int peripheral) {
  (*((volatile unsigned int *const)((0x40010000 + 0) + 0x24))) = 0x00C0;
  (*((volatile unsigned int *const)((0x40010000 + 0x300) + 0x10))) = peripheral;
  (*((volatile unsigned int *const)((0x40010000 + 0) + 0x24))) = 0x00C3;
  while ((*((volatile unsigned int *const)((0x40010000 + 0x300) + 0x00))) &
         ((1 << 31) | (1 << 30)))
    ;
  return 0;
}


x86 assembly (clang, -O0):
<scuUngatePeripheralClock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x40010024,%eax
movl   $0xc0,(%rax)
mov    -0x4(%rbp),%ecx
mov    $0x40010310,%eax
mov    %ecx,(%rax)
mov    $0x40010024,%eax
movl   $0xc3,(%rax)
mov    $0x40010300,%eax
mov    (%rax),%eax
and    $0xc0000000,%eax
cmp    $0x0,%eax
je     1141 <scuUngatePeripheralClock+0x41>
jmp    1127 <scuUngatePeripheralClock+0x27>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scuUngatePeripheralClock>:
movl   $0xc0,0x40010024
mov    %edi,0x40010310
movl   $0xc3,0x40010024
nopl   (%rax)
mov    0x40010300,%eax
cmp    $0x3fffffff,%eax
ja     1120 <scuUngatePeripheralClock+0x20>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @scuUngatePeripheralClock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i32 192, i32* inttoptr (i64 1073807396 to i32*)
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1073808144 to i32*)
store volatile i32 195, i32* inttoptr (i64 1073807396 to i32*)
br label %4
4: ; preds = %8, %1
%5 = load volatile i32, i32* inttoptr (i64 1073808128 to i32*)
%6 = and i32 %5, -1073741824
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @scuUngatePeripheralClock(i32 %0) {
store volatile i32 192, i32* inttoptr (i64 1073807396 to i32*)
store volatile i32 %0, i32* inttoptr (i64 1073808144 to i32*)
store volatile i32 195, i32* inttoptr (i64 1073807396 to i32*)
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 1073808128 to i32*)
%4 = icmp ult i32 %3, 1073741824
br i1 %4, label %5, label %2
5: ; preds = %2
ret i32 0
}
/* Variables and functions */
size_t strlen(char const *);
char *strcat(char *restrict dest, const char *restrict src) {
  const size_t len = strlen(dest);
  for (size_t i = 0; i < strlen(src); i++) {
    dest[len + i] = src[i];
  }
  return dest;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
jae    1181 <strcat+0x71>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
add    -0x20(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1135 <strcat+0x25>
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <strlen@plt>
test   %rax,%rax
je     1152 <strcat+0x32>
mov    %rax,%r15
mov    %rbx,%rdi
call   1030 <strlen@plt>
lea    (%rax,%rbx,1),%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strcat(i8* noalias %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
store i64 0, i64* %6
br label %9
9: ; preds = %24, %2
%10 = load i64, i64* %6
%11 = load i8*, i8** %4
%12 = call i64 @strlen(i8* %11)
%13 = icmp ult i64 %10, %12
br i1 %13, label %14, label %27
14: ; preds = %9
%15 = load i8*, i8** %4
%16 = load i64, i64* %6
%17 = getelementptr inbounds i8, i8* %15, i64 %16
%18 = load i8, i8* %17
%19 = load i8*, i8** %3
%20 = load i64, i64* %5
%21 = load i64, i64* %6
%22 = add i64 %20, %21
%23 = getelementptr inbounds i8, i8* %19, i64 %22
store i8 %18, i8* %23
br label %24
24: ; preds = %14
%25 = load i64, i64* %6
%26 = add i64 %25, 1
store i64 %26, i64* %6
br label %9
27: ; preds = %9
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @strcat(i8* noalias returned %0, i8* noalias nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%7 = getelementptr i8, i8* %0, i64 %6
br label %8
8: ; preds = %5, %2
ret i8* %0
}
int make_the_num_positive(int num) {
  if (num > 0)
    ;
  else
    num *= -1;
  return num;
}


x86 assembly (clang, -O0):
<make_the_num_positive>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1116 <make_the_num_positive+0x16>
jmp    111d <make_the_num_positive+0x1d>
imul   $0xffffffff,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_the_num_positive>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @make_the_num_positive(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, -1
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %5
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @make_the_num_positive(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  long tv_usec;
};
struct itimerval {
  TYPE_1__ it_interval;
};

/* Variables and functions */
void _set_itimerval_interval_tvusec(struct itimerval *timer, long tv_usec) {
  timer->it_interval.tv_usec = tv_usec;
}


x86 assembly (clang, -O0):
<_set_itimerval_interval_tvusec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_set_itimerval_interval_tvusec>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.itimerval = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
define void @_set_itimerval_interval_tvusec(%struct.itimerval* %0, i64 %1) {
%3 = alloca %struct.itimerval*
%4 = alloca i64
store %struct.itimerval* %0, %struct.itimerval** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load %struct.itimerval*, %struct.itimerval** %3
%7 = getelementptr inbounds %struct.itimerval, %struct.itimerval* %6, i32 0, i32 0
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
%struct.itimerval = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
define void @_set_itimerval_interval_tvusec(%struct.itimerval* nocapture writeonly %0, i64 %1) {
%3 = getelementptr inbounds %struct.itimerval, %struct.itimerval* %0, i64 0, i32 0, i32 0
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
size_t strlen(char const *);
char *strcpy(char *dest, const char *src) {
  size_t len = strlen(src);
  memcpy(dest, src, len);
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1040 <memcpy@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %5
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = load i64, i64* %5
%11 = call i32 @memcpy(i8* %8, i8* %9, i64 %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %3)
ret i8* %0
}
/* Variables and functions */
int SIGINT;
int SIGTERM;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void sighandle(int signal) {
  if (signal == SIGINT || signal == SIGTERM)
    exit(0);
}


x86 assembly (clang, -O0):
<sighandle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
je     113f <sighandle+0x2f>
mov    -0x4(%rbp),%eax
mov    0x2ea9(%rip),%rcx
cmp    (%rcx),%eax
jne    1146 <sighandle+0x36>
xor    %edi,%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandle>:
push   %rax
mov    0x2ed0(%rip),%rax
cmp    %edi,(%rax)
je     1129 <sighandle+0x19>
mov    0x2ebd(%rip),%rax
cmp    %edi,(%rax)
je     1129 <sighandle+0x19>
pop    %rax
ret
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@SIGTERM = global i32 0
define void @sighandle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = load i32, i32* @SIGTERM
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %6, %1
%11 = call i32 @exit(i32 0)
unreachable
12: ; preds = %6
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIGTERM = global i32 0
define void @sighandle(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
%4 = load i32, i32* @SIGTERM
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 @exit(i32 0)
unreachable
9: ; preds = %1
ret void
}
/* Variables and functions */
int mmc_datatrans(int /*<<< orphan*/, void *, unsigned long, int);
int mmc_readmultiplesector(void *data, unsigned long sector, int cnt) {
  return mmc_datatrans(0, data, sector, cnt);
}


x86 assembly (clang, -O0):
<mmc_readmultiplesector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %edi,%edi
call   1030 <mmc_datatrans@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmc_readmultiplesector>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <mmc_datatrans@plt>

LLVM IR (-O0):
define i32 @mmc_readmultiplesector(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = call i32 @mmc_datatrans(i32 0, i8* %7, i64 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @mmc_readmultiplesector(i8* %0, i64 %1, i32 %2) {
%4 = tail call i32 @mmc_datatrans(i32 0, i8* %0, i64 %1, i32 %2)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;
typedef int /*<<< orphan*/ Elf64_Off;
typedef int /*<<< orphan*/ Elf64_Addr;

/* Variables and functions */
int elfrw_read_Addr(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int elfrw_read_Off(FILE *fp, Elf64_Off *in) {
  return elfrw_read_Addr(fp, (Elf64_Addr *)in);
}


x86 assembly (clang, -O0):
<elfrw_read_Off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <elfrw_read_Addr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<elfrw_read_Off>:
jmp    1030 <elfrw_read_Addr@plt>

LLVM IR (-O0):
define i32 @elfrw_read_Off(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @elfrw_read_Addr(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @elfrw_read_Off(i32* %0, i32* %1) {
%3 = tail call i32 @elfrw_read_Addr(i32* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int yas_bma250_read_reg_byte(int);
int yas_bma250_write_reg_byte(int, int);
int yas_bma250_set_selftest_stn(unsigned char stn) {
  int ret = (0);
  int reg_data = 0;
  reg_data = yas_bma250_read_reg_byte(0x32);
  reg_data = ((reg_data & ~0x04) | ((stn << 2) & 0x04));
  ret = yas_bma250_write_reg_byte(0x32, reg_data);
  return ret;
}


x86 assembly (clang, -O0):
<yas_bma250_set_selftest_stn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x32,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xfffffffb,%eax
movzbl -0x1(%rbp),%ecx
shl    $0x2,%ecx
and    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x32,%edi
call   1030 <yas_bma250_write_reg_byte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_bma250_set_selftest_stn>:
push   %rbx
mov    %edi,%ebx
mov    $0x32,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
and    $0xfffffffb,%eax
and    $0x1,%ebx
lea    (%rax,%rbx,4),%esi
mov    $0x32,%edi
pop    %rbx
jmp    1030 <yas_bma250_write_reg_byte@plt>

LLVM IR (-O0):
define i32 @yas_bma250_set_selftest_stn(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @yas_bma250_read_reg_byte(i32 50)
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = and i32 %6, -5
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 2
%11 = and i32 %10, 4
%12 = or i32 %7, %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = call i32 @yas_bma250_write_reg_byte(i32 50, i32 %13)
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @yas_bma250_set_selftest_stn(i8 zeroext %0) {
%2 = tail call i32 @yas_bma250_read_reg_byte(i32 50)
%3 = and i32 %2, -5
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 2
%6 = and i32 %5, 4
%7 = or i32 %3, %6
%8 = tail call i32 @yas_bma250_write_reg_byte(i32 50, i32 %7)
ret i32 %8
}
/* Variables and functions */
scalar_t__ isgreaterequal(double, double);
scalar_t__ isnan(double);
double __fmax(double x, double y) {
  return (isgreaterequal(x, y) || isnan(y)) ? x : y;
}


x86 assembly (clang, -O0):
<__fmax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <isgreaterequal@plt>
cmp    $0x0,%rax
jne    115f <__fmax+0x3f>
movsd  -0x10(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
je     116e <__fmax+0x4e>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1178 <__fmax+0x58>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fmax>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
call   1040 <isgreaterequal@plt>
test   %rax,%rax
je     1145 <__fmax+0x25>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x8(%rsp),%xmm0
call   1030 <isnan@plt>
test   %rax,%rax
je     1161 <__fmax+0x41>
movsd  0x10(%rsp),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @__fmax(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i64 @isgreaterequal(double %5, double %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load double, double* %4
%11 = call i64 @isnan(double %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9, %2
%14 = load double, double* %3
br label %17
15: ; preds = %9
%16 = load double, double* %4
br label %17
17: ; preds = %15, %13
%18 = phi double [ %14, %13 ], [ %16, %15 ]
ret double %18
}

LLVM IR (-O2):
define double @__fmax(double %0, double %1) {
%3 = tail call i64 @isgreaterequal(double %0, double %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @isnan(double %1)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, double %1, double %0
br label %9
9: ; preds = %5, %2
%10 = phi double [ %0, %2 ], [ %8, %5 ]
ret double %10
}
int testb(void *s, unsigned int i) {
  unsigned char *v = s;
  v += i >> 3;
  return (*v & (1 << (7 - (i % 8)))) != 0;
}


x86 assembly (clang, -O0):
<testb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
shr    $0x3,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,%ecx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
mov    -0xc(%rbp),%edx
and    $0x7,%edx
mov    $0x7,%ecx
sub    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testb>:
mov    %esi,%ecx
mov    %esi,%eax
shr    $0x3,%rax
movzbl (%rdi,%rax,1),%eax
not    %cl
and    $0x7,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @testb(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = lshr i32 %7, 3
%9 = load i8*, i8** %5
%10 = zext i32 %8 to i64
%11 = getelementptr inbounds i8, i8* %9, i64 %10
store i8* %11, i8** %5
%12 = load i8*, i8** %5
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = load i32, i32* %4
%16 = urem i32 %15, 8
%17 = sub i32 7, %16
%18 = shl i32 1, %17
%19 = and i32 %14, %18
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @testb(i8* nocapture %0, i32 %1) {
%3 = lshr i32 %1, 3
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %1, 7
%9 = xor i32 %8, 7
%10 = lshr i32 %7, %9
%11 = and i32 %10, 1
ret i32 %11
}
int test_imm_8Eint8_reg(signed char val) {
  return ((val) & (-0x8E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Eint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff72,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Eint8_reg>:
test   $0xffffff72,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Eint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -142
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Eint8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -142
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int is_lookup(x)
int x;
{
  if ((x / 20000000) == 7)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<is_lookup>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x1312d00,%ecx
cltd
idiv   %ecx
cmp    $0x7,%eax
jne    1127 <is_lookup+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <is_lookup+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_lookup>:
add    $0xf7a7c500,%edi
xor    %eax,%eax
cmp    $0x1312d00,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @is_lookup(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sdiv i32 %4, 20000000
%6 = icmp eq i32 %5, 7
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_lookup(i32 %0) {
%2 = add i32 %0, -140000000
%3 = icmp ult i32 %2, 20000000
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ sleep(int);
void *print_msg(void *ptr) {
  sleep(5);
  printf("Message from thread: %s \n", (char *)ptr);
  return NULL;
}


x86 assembly (clang, -O0):
<print_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x5,%edi
call   1040 <sleep@plt>
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_msg>:
push   %rbx
mov    %rdi,%rbx
mov    $0x5,%edi
call   1040 <sleep@plt>
lea    0xecb(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Message from thread: %s \0A\00"
define i8* @print_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @sleep(i32 5)
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i8* null
}

LLVM IR (-O2):
@.str = [26 x i8] c"Message from thread: %s \0A\00"
define noalias i8* @print_msg(i8* %0) {
%2 = tail call i32 @sleep(i32 5)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* null
}
/* Type definitions */
struct epoll_event {
  int dummy;
};
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int _NSIG;
int syscall(int, int, struct epoll_event *, int, int,
            int /*<<< orphan*/ const *, int);
int epoll_pwait(int fd, struct epoll_event *ev, int cnt, int to,
                const sigset_t *sigs) {
  return syscall(346, fd, ev, cnt, to, sigs, _NSIG / 8);
}


x86 assembly (clang, -O0):
<epoll_pwait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x20(%rbp),%r9
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    $0x8,%edi
cltd
idiv   %edi
mov    -0x28(%rbp),%rdx
mov    $0x15a,%edi
mov    %eax,(%rsp)
call   1030 <syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epoll_pwait>:
push   %rax
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ecb(%rip),%rax
mov    (%rax),%eax
lea    0x7(%rax),%edi
test   %eax,%eax
cmovns %eax,%edi
sar    $0x3,%edi
mov    %edi,(%rsp)
mov    $0x15a,%edi
call   1030 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.epoll_event = type { i32 }
@_NSIG = global i32 0
define i32 @epoll_pwait(i32 %0, %struct.epoll_event* %1, i32 %2, i32 %3, i32* %4) {
%6 = alloca i32
%7 = alloca %struct.epoll_event*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32*
store i32 %0, i32* %6
store %struct.epoll_event* %1, %struct.epoll_event** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32* %4, i32** %10
%11 = load i32, i32* %6
%12 = load %struct.epoll_event*, %struct.epoll_event** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32*, i32** %10
%16 = load i32, i32* @_NSIG
%17 = sdiv i32 %16, 8
%18 = call i32 @syscall(i32 346, i32 %11, %struct.epoll_event* %12, i32 %13, i32 %14, i32* %15, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
%struct.epoll_event = type { i32 }
@_NSIG = global i32 0
define i32 @epoll_pwait(i32 %0, %struct.epoll_event* %1, i32 %2, i32 %3, i32* %4) {
%6 = load i32, i32* @_NSIG
%7 = sdiv i32 %6, 8
%8 = tail call i32 @syscall(i32 346, i32 %0, %struct.epoll_event* %1, i32 %2, i32 %3, i32* %4, i32 %7)
ret i32 %8
}
/* Variables and functions */
int O_RDWR;
int O_SYNC;
int /*<<< orphan*/ check_pagesize();
int open(char *, int);
int pwm_open_devmem(void) {
  check_pagesize();
  return open("/dev/mem", O_RDWR | O_SYNC);
}


x86 assembly (clang, -O0):
<pwm_open_devmem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <check_pagesize@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
mov    0x2ea5(%rip),%rax
or     (%rax),%esi
lea    0xebc(%rip),%rdi
call   1040 <open@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwm_open_devmem>:
push   %rax
xor    %eax,%eax
call   1030 <check_pagesize@plt>
mov    0x2eb9(%rip),%rax
mov    0x2eaa(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xebf(%rip),%rdi
pop    %rax
jmp    1040 <open@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"/dev/mem\00"
@O_RDWR = global i32 0
@O_SYNC = global i32 0
define i32 @pwm_open_devmem() {
%1 = call i32 (...) @check_pagesize()
%2 = load i32, i32* @O_RDWR
%3 = load i32, i32* @O_SYNC
%4 = or i32 %2, %3
%5 = call i32 @open(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@.str = [9 x i8] c"/dev/mem\00"
@O_RDWR = global i32 0
@O_SYNC = global i32 0
define i32 @pwm_open_devmem() {
%1 = tail call i32 (...) @check_pagesize()
%2 = load i32, i32* @O_RDWR
%3 = load i32, i32* @O_SYNC
%4 = or i32 %3, %2
%5 = tail call i32 @open(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 %5
}
alwaysFalse(void) { return 0; }


x86 assembly (clang, -O0):
<alwaysFalse>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alwaysFalse>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @alwaysFalse() {
ret i32 0
}

LLVM IR (-O2):
define i32 @alwaysFalse() {
ret i32 0
}
void gtk_drag_set_icon_stock() {}


x86 assembly (clang, -O0):
<gtk_drag_set_icon_stock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_drag_set_icon_stock>:
ret

LLVM IR (-O0):
define void @gtk_drag_set_icon_stock() {
ret void
}

LLVM IR (-O2):
define void @gtk_drag_set_icon_stock() {
ret void
}
/* Variables and functions */
scalar_t__ is_labeled(char *);
int strlen(char *);
char *remove_label(char *s) {
  if (is_labeled(s))
    s[strlen(s) - 1] = '\0';
  return s;
}


x86 assembly (clang, -O0):
<remove_label>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <is_labeled@plt>
cmp    $0x0,%rax
je     1160 <remove_label+0x40>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_label>:
push   %rbx
mov    %rdi,%rbx
call   1040 <is_labeled@plt>
test   %rax,%rax
je     113d <remove_label+0x1d>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @remove_label(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @is_labeled(i8* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = load i8*, i8** %2
%9 = call i32 @strlen(i8* %8)
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %7, i64 %11
store i8 0, i8* %12
br label %13
13: ; preds = %6, %1
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
define i8* @remove_label(i8* returned %0) {
%2 = tail call i64 @is_labeled(i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = tail call i32 @strlen(i8* %0)
%6 = add nsw i32 %5, -1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 0, i8* %8
br label %9
9: ; preds = %4, %1
ret i8* %0
}
/* Variables and functions */
double copysign(double, double);
double SDL_copysign(double x, double y) { return copysign(x, y); }


x86 assembly (clang, -O0):
<SDL_copysign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movaps 0xee1(%rip),%xmm2
pand   %xmm2,%xmm1
movaps 0xee6(%rip),%xmm2
pand   %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_copysign>:
andps  0xef9(%rip),%xmm1
andps  0xf02(%rip),%xmm0
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @SDL_copysign(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @llvm.copysign.f64(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @SDL_copysign(double %0, double %1) {
%3 = tail call double @llvm.copysign.f64(double %0, double %1)
ret double %3
}
void _M2_Indexing_init(__attribute__((unused)) int argc,
                       __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_Indexing_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_Indexing_init>:
ret

LLVM IR (-O0):
define void @_M2_Indexing_init(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_Indexing_init(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
int average(int, int, int, int, int, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("%d\n", average(5, 1, 2, 3, 4, 5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%r9d
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
mov    $0x4,%r8d
mov    %r9d,%edi
call   1040 <average@plt>
mov    %eax,%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
mov    $0x4,%r8d
mov    $0x5,%r9d
call   1040 <average@plt>
lea    0xeb3(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @average(i32 5, i32 1, i32 2, i32 3, i32 4, i32 5)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @average(i32 5, i32 1, i32 2, i32 3, i32 4, i32 5)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int process_vm_readv(int /*<<< orphan*/, int /*<<< orphan*/ *,
                     int /*<<< orphan*/, int /*<<< orphan*/ *,
                     int /*<<< orphan*/, int /*<<< orphan*/);
int process_vm_writev(int /*<<< orphan*/, int /*<<< orphan*/ *,
                      int /*<<< orphan*/, int /*<<< orphan*/ *,
                      int /*<<< orphan*/, int /*<<< orphan*/);
int main(void) {
  return process_vm_readv(0, NULL, 0, NULL, 0, 0) +
         process_vm_writev(0, NULL, 0, NULL, 0, 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %r9d,%r9d
xor    %eax,%eax
mov    %eax,%ecx
mov    %r9d,%edi
mov    %rcx,%rsi
mov    %r9d,%edx
mov    %r9d,%r8d
call   1030 <process_vm_readv@plt>
mov    %eax,-0x8(%rbp)
xor    %r9d,%r9d
xor    %eax,%eax
mov    %eax,%ecx
mov    %r9d,%edi
mov    %rcx,%rsi
mov    %r9d,%edx
mov    %r9d,%r8d
call   1040 <process_vm_writev@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <process_vm_readv@plt>
mov    %eax,%ebx
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1040 <process_vm_writev@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @process_vm_readv(i32 0, i32* null, i32 0, i32* null, i32 0, i32 0)
%3 = call i32 @process_vm_writev(i32 0, i32* null, i32 0, i32* null, i32 0, i32 0)
%4 = add nsw i32 %2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @process_vm_readv(i32 0, i32* null, i32 0, i32* null, i32 0, i32 0)
%2 = tail call i32 @process_vm_writev(i32 0, i32* null, i32 0, i32* null, i32 0, i32 0)
%3 = add nsw i32 %2, %1
ret i32 %3
}
/* Variables and functions */
char *very_ugly_ipv4_code(char *, int, int /*<<< orphan*/);
char *subnet_id(char *ip, int bitmask) {
  return very_ugly_ipv4_code(ip, bitmask, 0);
}


x86 assembly (clang, -O0):
<subnet_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <very_ugly_ipv4_code@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subnet_id>:
xor    %edx,%edx
jmp    1030 <very_ugly_ipv4_code@plt>

LLVM IR (-O0):
define i8* @subnet_id(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @very_ugly_ipv4_code(i8* %5, i32 %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @subnet_id(i8* %0, i32 %1) {
%3 = tail call i8* @very_ugly_ipv4_code(i8* %0, i32 %1, i32 0)
ret i8* %3
}
/* Variables and functions */
unsigned short VIM_HIF_GetReg16(int);
int /*<<< orphan*/ VIM_HIF_SetReg8(int, unsigned char);
void VIM_HIF_SetModClkClose(unsigned short wVal) {
  unsigned short wClockSetting = 0;
  wClockSetting = VIM_HIF_GetReg16((0x1400 + 0x00A));
  wClockSetting |= wVal;
  VIM_HIF_SetReg8((0x1400 + 0x00A), (unsigned char)(wClockSetting));
  VIM_HIF_SetReg8((0x1400 + 0x00B), (unsigned char)(wClockSetting >> 8));
}


x86 assembly (clang, -O0):
<VIM_HIF_SetModClkClose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movw   $0x0,-0x4(%rbp)
mov    $0x140a,%edi
call   1030 <VIM_HIF_GetReg16@plt>
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%ecx
movzwl -0x4(%rbp),%eax
or     %ecx,%eax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
mov    $0x140a,%edi
movzbl %al,%esi
call   1040 <VIM_HIF_SetReg8@plt>
movzwl -0x4(%rbp),%eax
sar    $0x8,%eax
mov    $0x140b,%edi
movzbl %al,%esi
call   1040 <VIM_HIF_SetReg8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIM_HIF_SetModClkClose>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x140a,%edi
call   1030 <VIM_HIF_GetReg16@plt>
mov    %eax,%ebx
or     %ebp,%ebx
movzbl %bl,%esi
mov    $0x140a,%edi
call   1040 <VIM_HIF_SetReg8@plt>
movzbl %bh,%esi
mov    $0x140b,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <VIM_HIF_SetReg8@plt>

LLVM IR (-O0):
define void @VIM_HIF_SetModClkClose(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
store i16 0, i16* %3
%4 = call zeroext i16 @VIM_HIF_GetReg16(i32 5130)
store i16 %4, i16* %3
%5 = load i16, i16* %2
%6 = zext i16 %5 to i32
%7 = load i16, i16* %3
%8 = zext i16 %7 to i32
%9 = or i32 %8, %6
%10 = trunc i32 %9 to i16
store i16 %10, i16* %3
%11 = load i16, i16* %3
%12 = trunc i16 %11 to i8
%13 = call i32 @VIM_HIF_SetReg8(i32 5130, i8 zeroext %12)
%14 = load i16, i16* %3
%15 = zext i16 %14 to i32
%16 = ashr i32 %15, 8
%17 = trunc i32 %16 to i8
%18 = call i32 @VIM_HIF_SetReg8(i32 5131, i8 zeroext %17)
ret void
}

LLVM IR (-O2):
define void @VIM_HIF_SetModClkClose(i16 zeroext %0) {
%2 = tail call zeroext i16 @VIM_HIF_GetReg16(i32 5130)
%3 = or i16 %2, %0
%4 = trunc i16 %3 to i8
%5 = tail call i32 @VIM_HIF_SetReg8(i32 5130, i8 zeroext %4)
%6 = lshr i16 %3, 8
%7 = trunc i16 %6 to i8
%8 = tail call i32 @VIM_HIF_SetReg8(i32 5131, i8 zeroext %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ bar(int *);
int /*<<< orphan*/ foo(int *);
int main() {
  int x = -1;
#pragma omp task inout(x) final(1)
  { foo(&x); }
#pragma omp taskwait on(x)
  assert(x == 2);
  bar(&x);
#pragma omp taskwait on(x)
  assert(x == 4);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1050 <foo@plt>
cmpl   $0x2,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
lea    -0x4(%rbp),%rdi
call   1030 <bar@plt>
cmpl   $0x4,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0xffffffff,0xc(%rsp)
ff
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1050 <foo@plt>
xor    %edi,%edi
cmpl   $0x2,0xc(%rsp)
sete   %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1030 <bar@plt>
xor    %edi,%edi
cmpl   $0x4,0xc(%rsp)
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 @foo(i32* %1)
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 2
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = call i32 @bar(i32* %1)
%8 = load i32, i32* %1
%9 = icmp eq i32 %8, 4
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 -1, i32* %1
%3 = call i32 @foo(i32* %1)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 2
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = call i32 @bar(i32* %1)
%9 = load i32, i32* %1
%10 = icmp eq i32 %9, 4
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
ret i32 0
}
int isign(int value) {
  if (value > 0)
    return 1;
  else if (value < 0)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    111d <isign+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    113a <isign+0x3a>
cmpl   $0x0,-0x8(%rbp)
jge    1133 <isign+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    113a <isign+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isign>:
mov    %edi,%ecx
sar    $0x1f,%ecx
test   %edi,%edi
mov    $0x1,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isign(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @isign(i32 %0) {
%2 = ashr i32 %0, 31
%3 = icmp slt i32 %0, 1
%4 = select i1 %3, i32 %2, i32 1
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wcscpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *);
int wcslen(int /*<<< orphan*/ *);
wchar_t *wcscat(wchar_t *restrict dest, const wchar_t *restrict src) {
  wcscpy(dest + wcslen(dest), src);
  return dest;
}


x86 assembly (clang, -O0):
<wcscat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wcslen@plt>
mov    -0x18(%rbp),%rdi
cltq
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1040 <wcscpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcscat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <wcslen@plt>
cltq
lea    (%rbx,%rax,4),%rdi
mov    %r14,%rsi
call   1040 <wcscpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32* @wcscat(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 @wcslen(i32* %6)
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32*, i32** %4
%11 = call i32 @wcscpy(i32* %9, i32* %10)
%12 = load i32*, i32** %3
ret i32* %12
}

LLVM IR (-O2):
define i32* @wcscat(i32* noalias returned %0, i32* noalias %1) {
%3 = tail call i32 @wcslen(i32* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = tail call i32 @wcscpy(i32* %5, i32* %1)
ret i32* %0
}
float Absff_Atof(s)
char *s;
{
  float f;
  if (sscanf(s, "%f", &f) > 0)
    return f;
  else
    return 0.0;
}


x86 assembly (clang, -O0):
<Absff_Atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x14(%rbp),%rdx
mov    $0x0,%al
call   1030 <sscanf@plt>
cmp    $0x0,%eax
jle    114a <Absff_Atof+0x3a>
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1152 <Absff_Atof+0x42>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Absff_Atof>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0x4(%rsp),%rdx
xor    %eax,%eax
call   1030 <sscanf@plt>
test   %eax,%eax
jg     112d <Absff_Atof+0x1d>
xorps  %xmm0,%xmm0
pop    %rax
ret
movss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define float @Absff_Atof(i8* %0) {
%2 = alloca float
%3 = alloca i8*
%4 = alloca float
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 (i8*, i8*, ...) @sscanf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float* %4)
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load float, float* %4
store float %9, float* %2
br label %11
10: ; preds = %1
store float 0.000000e+00, float* %2
br label %11
11: ; preds = %10, %8
%12 = load float, float* %2
ret float %12
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define float @Absff_Atof(i8* nocapture %0) {
%2 = alloca float
%3 = bitcast float* %2 to i8*
%4 = call i32 (i8*, i8*, ...) @sscanf(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float* %2)
%5 = icmp sgt i32 %4, 0
%6 = load float, float* %2
%7 = select i1 %5, float %6, float 0.000000e+00
ret float %7
}
int fat_fclose(struct fs *fs, struct vfs_file *fp) {
  (void)fs;
  (void)fp;
  return 0;
}


x86 assembly (clang, -O0):
<fat_fclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat_fclose>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fs = type opaque
%struct.vfs_file = type opaque
define i32 @fat_fclose(%struct.fs* %0, %struct.vfs_file* %1) {
%3 = alloca %struct.fs*
%4 = alloca %struct.vfs_file*
store %struct.fs* %0, %struct.fs** %3
store %struct.vfs_file* %1, %struct.vfs_file** %4
%5 = load %struct.fs*, %struct.fs** %3
%6 = load %struct.vfs_file*, %struct.vfs_file** %4
ret i32 0
}

LLVM IR (-O2):
%struct.fs = type opaque
%struct.vfs_file = type opaque
define i32 @fat_fclose(%struct.fs* nocapture readnone %0, %struct.vfs_file* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
scalar_t__ system(char *);
int /*<<< orphan*/ warn(char *, char *);
void teardown_ipfw_rules() {
  static char *cmd = "pfctl -d";
  printf("Restoring ipfw to previous configuration...");
  if (system(cmd))
    warn("ipfw warning: %s", cmd);
  printf("OK\n");
}


x86 assembly (clang, -O0):
<teardown_ipfw_rules>:
push   %rbp
mov    %rsp,%rbp
lea    0xece(%rip),%rdi
call   1050 <printf@plt>
mov    0x2ef1(%rip),%rdi
call   1040 <system@plt>
cmp    $0x0,%rax
je     1169 <teardown_ipfw_rules+0x39>
mov    0x2edb(%rip),%rsi
lea    0xed1(%rip),%rdi
call   1030 <warn@plt>
lea    0xed6(%rip),%rdi
call   1050 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<teardown_ipfw_rules>:
push   %rax
lea    0xec1(%rip),%rdi
call   1060 <printf@plt>
lea    0xeac(%rip),%rdi
call   1050 <system@plt>
test   %rax,%rax
je     1171 <teardown_ipfw_rules+0x31>
lea    0xed0(%rip),%rdi
lea    0xe94(%rip),%rsi
call   1030 <warn@plt>
lea    0xece(%rip),%rdi
pop    %rax
jmp    1040 <puts@plt>

LLVM IR (-O0):
@teardown_ipfw_rules.cmd = internal global i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0)
@.str = [9 x i8] c"pfctl -d\00"
@.str.1 = [44 x i8] c"Restoring ipfw to previous configuration...\00"
@.str.2 = [17 x i8] c"ipfw warning: %s\00"
@.str.3 = [4 x i8] c"OK\0A\00"
define void @teardown_ipfw_rules() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.1, i64 0, i64 0))
%2 = load i8*, i8** @teardown_ipfw_rules.cmd
%3 = call i64 @system(i8* %2)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i8*, i8** @teardown_ipfw_rules.cmd
%7 = call i32 @warn(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i8* %6)
br label %8
8: ; preds = %5, %0
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"pfctl -d\00"
@.str.1 = [44 x i8] c"Restoring ipfw to previous configuration...\00"
@.str.2 = [17 x i8] c"ipfw warning: %s\00"
@str = [3 x i8] c"OK\00"
define void @teardown_ipfw_rules() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i64 @system(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @warn(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
ret void
}
void __mmu_cache_off(void) {}


x86 assembly (clang, -O0):
<__mmu_cache_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mmu_cache_off>:
ret

LLVM IR (-O0):
define void @__mmu_cache_off() {
ret void
}

LLVM IR (-O2):
define void @__mmu_cache_off() {
ret void
}