xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ help();
int sscanf(char *, char *, unsigned int *);
void scanoneu(int argc, char *argv[], int i, unsigned int *varptr) {
  if (i >= argc)
    help();
  if (sscanf(argv[i], " %u", varptr) != 1)
    help();
}


x86 assembly (clang, -O0):
<scanoneu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jl     1149 <scanoneu+0x29>
mov    $0x0,%al
call   1040 <help@plt>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x20(%rbp),%rdx
lea    0xea0(%rip),%rsi
call   1030 <sscanf@plt>
cmp    $0x1,%eax
je     1175 <scanoneu+0x55>
mov    $0x0,%al
call   1040 <help@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scanoneu>:
push   %rbp
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %edx,%ebp
mov    %rsi,%rbx
cmp    %edi,%edx
jl     1137 <scanoneu+0x17>
xor    %eax,%eax
call   1040 <help@plt>
movslq %ebp,%rax
mov    (%rbx,%rax,8),%rdi
lea    0xebb(%rip),%rsi
mov    %r14,%rdx
call   1030 <sscanf@plt>
cmp    $0x1,%eax
jne    1157 <scanoneu+0x37>
pop    %rbx
pop    %r14
pop    %rbp
ret
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <help@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" %u\00"
define void @scanoneu(i32 %0, i8** %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i32
%8 = alloca i32*
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32, i32* %7
%10 = load i32, i32* %5
%11 = icmp sge i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = call i32 (...) @help()
br label %14
14: ; preds = %12, %4
%15 = load i8**, i8*** %6
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8*, i8** %15, i64 %17
%19 = load i8*, i8** %18
%20 = load i32*, i32** %8
%21 = call i32 @sscanf(i8* %19, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %20)
%22 = icmp ne i32 %21, 1
br i1 %22, label %23, label %25
23: ; preds = %14
%24 = call i32 (...) @help()
br label %25
25: ; preds = %23, %14
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" %u\00"
define void @scanoneu(i32 %0, i8** nocapture %1, i32 %2, i32* %3) {
%5 = icmp slt i32 %2, %0
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 (...) @help()
br label %8
8: ; preds = %6, %4
%9 = sext i32 %2 to i64
%10 = getelementptr inbounds i8*, i8** %1, i64 %9
%11 = load i8*, i8** %10
%12 = tail call i32 @sscanf(i8* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %3)
%13 = icmp eq i32 %12, 1
br i1 %13, label %16, label %14
14: ; preds = %8
%15 = tail call i32 (...) @help()
br label %16
16: ; preds = %14, %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int /*<<< orphan*/ term_control_seq_exec_api(char const *);
void term_emphasized_print_str(const char str[]) {
  const char emp[] = {27, '[', '4', ';', '5', 'm', '\0'};
  const char emp_res[] = {27, '[', '0', 'm', '\0'};
  term_control_seq_exec_api(emp);
  printf("%s\n", str);
  term_control_seq_exec_api(emp_res);
}


x86 assembly (clang, -O0):
<term_emphasized_print_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xece(%rip),%eax
mov    %eax,-0xf(%rbp)
mov    0xec8(%rip),%ax
mov    %ax,-0xb(%rbp)
mov    0xec0(%rip),%al
mov    %al,-0x9(%rbp)
mov    0xeb8(%rip),%eax
mov    %eax,-0x14(%rbp)
mov    0xeb3(%rip),%al
mov    %al,-0x10(%rbp)
lea    -0xf(%rbp),%rdi
call   1040 <term_control_seq_exec_api@plt>
mov    -0x8(%rbp),%rsi
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
lea    -0x14(%rbp),%rdi
call   1040 <term_control_seq_exec_api@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_emphasized_print_str>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movl   $0x6d353b,0xb(%rsp)
movl   $0x3b345b1b,0x8(%rsp)
3b
movb   $0x0,0x4(%rsp)
movl   $0x6d305b1b,(%rsp)
lea    0x8(%rsp),%rdi
call   1040 <term_control_seq_exec_api@plt>
lea    0xeb7(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rsp,%rdi
call   1040 <term_control_seq_exec_api@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.term_emphasized_print_str.emp = [7 x i8] c"\1B[4;5m\00"
@__const.term_emphasized_print_str.emp_res = [5 x i8] c"\1B[0m\00"
@.str = [4 x i8] c"%s\0A\00"
define void @term_emphasized_print_str(i8* %0) {
%2 = alloca i8*
%3 = alloca [7 x i8]
%4 = alloca [5 x i8]
store i8* %0, i8** %2
%5 = bitcast [7 x i8]* %3 to i8*
%6 = bitcast [5 x i8]* %4 to i8*
%7 = getelementptr inbounds [7 x i8], [7 x i8]* %3, i64 0, i64 0
%8 = call i32 @term_control_seq_exec_api(i8* %7)
%9 = load i8*, i8** %2
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = getelementptr inbounds [5 x i8], [5 x i8]* %4, i64 0, i64 0
%12 = call i32 @term_control_seq_exec_api(i8* %11)
ret void
}

LLVM IR (-O2):
@__const.term_emphasized_print_str.emp = [7 x i8] c"\1B[4;5m\00"
@__const.term_emphasized_print_str.emp_res = [5 x i8] c"\1B[0m\00"
@.str = [4 x i8] c"%s\0A\00"
define void @term_emphasized_print_str(i8* %0) {
%2 = alloca [7 x i8]
%3 = alloca [5 x i8]
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
%6 = call i32 @term_control_seq_exec_api(i8* %4)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%8 = call i32 @term_control_seq_exec_api(i8* %5)
ret void
}
int f(void *i) {
  *(double *)i = *(double *)(i + 4);
  return *(char *)i;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movq   0x4(%rdi),%xmm0
movq   %xmm0,(%rdi)
movq   %xmm0,%rax
movsbl %al,%eax
ret

LLVM IR (-O0):
define i32 @f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 4
%5 = bitcast i8* %4 to double*
%6 = load double, double* %5
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to double*
store double %6, double* %8
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @f(i8* nocapture %0) {
%2 = getelementptr i8, i8* %0, i64 4
%3 = bitcast i8* %2 to double*
%4 = load double, double* %3
%5 = bitcast i8* %0 to double*
store double %4, double* %5
%6 = bitcast double %4 to i64
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 24
%9 = ashr exact i32 %8, 24
ret i32 %9
}
float inv_sqrt(float x) {
  float xhalf = 0.5f * x;
  int i;
  memcpy(&i, &x, sizeof(i));
  i = 0x5f375a84 - (i >> 1);
  memcpy(&x, &i, sizeof(x));
  x = x * (1.5f - xhalf * x * x);
  return x;
}


x86 assembly (clang, -O0):
<inv_sqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f375a84,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe9c(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_sqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f375a84,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xedb(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @inv_sqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32
store float %0, float* %2
%5 = load float, float* %2
%6 = fmul float 5.000000e-01, %5
store float %6, float* %3
%7 = bitcast i32* %4 to i8*
%8 = bitcast float* %2 to i8*
%9 = load i32, i32* %4
%10 = ashr i32 %9, 1
%11 = sub nsw i32 1597463172, %10
store i32 %11, i32* %4
%12 = bitcast float* %2 to i8*
%13 = bitcast i32* %4 to i8*
%14 = load float, float* %2
%15 = load float, float* %3
%16 = load float, float* %2
%17 = fmul float %15, %16
%18 = load float, float* %2
%19 = fneg float %17
%20 = call float @llvm.fmuladd.f32(float %19, float %18, float 1.500000e+00)
%21 = fmul float %14, %20
store float %21, float* %2
%22 = load float, float* %2
ret float %22
}

LLVM IR (-O2):
define float @inv_sqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597463172, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
ret float %9
}
/* Variables and functions */
double exp(double);
double norm_distribution(double x, double mean, double stdev) {
  return (0.398942280401433 * (1.0 / stdev) *
          exp((-1.0 * (x - mean) * (x - mean)) / (2.0 * stdev * stdev)));
}


x86 assembly (clang, -O0):
<norm_distribution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee9(%rip),%xmm1
divsd  -0x18(%rbp),%xmm1
movsd  0xed4(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xeb1(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe8f(%rip),%xmm1
mulsd  -0x18(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm_distribution>:
push   %rax
movsd  0xee7(%rip),%xmm3
divsd  %xmm2,%xmm3
mulsd  0xee3(%rip),%xmm3
movsd  %xmm3,(%rsp)
subsd  %xmm1,%xmm0
movapd 0xeda(%rip),%xmm1
xorpd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
movapd %xmm2,%xmm1
addsd  %xmm2,%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
call   1030 <exp@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @norm_distribution(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %6
%8 = fdiv double 1.000000e+00, %7
%9 = fmul double 0x3FD9884533D43656, %8
%10 = load double, double* %4
%11 = load double, double* %5
%12 = fsub double %10, %11
%13 = fmul double -1.000000e+00, %12
%14 = load double, double* %4
%15 = load double, double* %5
%16 = fsub double %14, %15
%17 = fmul double %13, %16
%18 = load double, double* %6
%19 = fmul double 2.000000e+00, %18
%20 = load double, double* %6
%21 = fmul double %19, %20
%22 = fdiv double %17, %21
%23 = call double @exp(double %22)
%24 = fmul double %9, %23
ret double %24
}

LLVM IR (-O2):
define double @norm_distribution(double %0, double %1, double %2) {
%4 = fdiv double 1.000000e+00, %2
%5 = fmul double %4, 0x3FD9884533D43656
%6 = fsub double %0, %1
%7 = fneg double %6
%8 = fmul double %6, %7
%9 = fmul double %2, 2.000000e+00
%10 = fmul double %9, %2
%11 = fdiv double %8, %10
%12 = tail call double @exp(double %11)
%13 = fmul double %5, %12
ret double %13
}
/* Type definitions */
typedef scalar_t__ vaddr;
typedef int uint32_t;
struct process {
  int dummy;
};

/* Variables and functions */
int virt_to_phys_page_proc(struct process *, int);
uint32_t virt_to_phys_proc(struct process *p, uint32_t vaddr) {
  int pg;
  uint32_t pgaddr;
  if ((pg = virt_to_phys_page_proc(p, ((uint32_t)(vaddr) >> 12))) == -1) {
    return 0;
  }
  pgaddr = ((uint32_t)(pg) << 12);
  return pgaddr | ((uint32_t)(vaddr)&0xfff);
}


x86 assembly (clang, -O0):
<virt_to_phys_proc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sar    $0xc,%esi
call   1030 <virt_to_phys_page_proc@plt>
mov    %eax,-0x18(%rbp)
cmp    $0xffffffff,%eax
jne    1146 <virt_to_phys_proc+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1160 <virt_to_phys_proc+0x50>
mov    -0x18(%rbp),%eax
shl    $0xc,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x14(%rbp),%ecx
and    $0xfff,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<virt_to_phys_proc>:
push   %rbx
mov    %esi,%ebx
sar    $0xc,%esi
call   1030 <virt_to_phys_page_proc@plt>
mov    %eax,%ecx
shl    $0xc,%ecx
and    $0xfff,%ebx
or     %ecx,%ebx
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
cmovne %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.process = type { i32 }
define i32 @virt_to_phys_proc(%struct.process* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.process*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store %struct.process* %0, %struct.process** %4
store i32 %1, i32* %5
%8 = load %struct.process*, %struct.process** %4
%9 = load i32, i32* %5
%10 = ashr i32 %9, 12
%11 = call i32 @virt_to_phys_page_proc(%struct.process* %8, i32 %10)
store i32 %11, i32* %6
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %21
14: ; preds = %2
%15 = load i32, i32* %6
%16 = shl i32 %15, 12
store i32 %16, i32* %7
%17 = load i32, i32* %7
%18 = load i32, i32* %5
%19 = and i32 %18, 4095
%20 = or i32 %17, %19
store i32 %20, i32* %3
br label %21
21: ; preds = %14, %13
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
%struct.process = type { i32 }
define i32 @virt_to_phys_proc(%struct.process* %0, i32 %1) {
%3 = ashr i32 %1, 12
%4 = tail call i32 @virt_to_phys_page_proc(%struct.process* %0, i32 %3)
%5 = icmp eq i32 %4, -1
%6 = shl i32 %4, 12
%7 = and i32 %1, 4095
%8 = or i32 %6, %7
%9 = select i1 %5, i32 0, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ fatal_error(int /*<<< orphan*/, char *, char *, char *, int);
void gmx_abort(int nodeid, int nnodes, int errorno) {
  fatal_error(0, "Routine %s called in %s, %d", "gmx_abort",
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/Chadi-akel/cere/refs/heads/master/"
              "tests/test_07/network.c",
              318);
}


x86 assembly (clang, -O0):
<gmx_abort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %edi,%edi
lea    0xed6(%rip),%rsi
lea    0xeeb(%rip),%rdx
lea    0xeee(%rip),%rcx
mov    $0x13e,%r8d
call   1030 <fatal_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gmx_abort>:
lea    0xee9(%rip),%rsi
lea    0xefe(%rip),%rdx
lea    0xf01(%rip),%rcx
xor    %edi,%edi
mov    $0x13e,%r8d
jmp    1030 <fatal_error@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Routine %s called in %s, %d\00"
@.str.1 = [10 x i8] c"gmx_abort\00"
@.str.2 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Chadi-akel/cere/refs/heads/master/tests/test_07/network.c\00"
define void @gmx_abort(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @fatal_error(i32 0, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.2, i64 0, i64 0), i32 318)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"Routine %s called in %s, %d\00"
@.str.1 = [10 x i8] c"gmx_abort\00"
@.str.2 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Chadi-akel/cere/refs/heads/master/tests/test_07/network.c\00"
define void @gmx_abort(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @fatal_error(i32 0, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.2, i64 0, i64 0), i32 318)
ret void
}
/* Type definitions */
struct msghdr {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ bsd_syscall_sendmsg(int, char *, int);
ssize_t uptcp_sendmsg(int s, const struct msghdr *msg, int flags) {
  return bsd_syscall_sendmsg(s, (char *)msg, flags);
}


x86 assembly (clang, -O0):
<uptcp_sendmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <bsd_syscall_sendmsg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uptcp_sendmsg>:
jmp    1030 <bsd_syscall_sendmsg@plt>

LLVM IR (-O0):
%struct.msghdr = type { i32 }
define i32 @uptcp_sendmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msghdr*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load %struct.msghdr*, %struct.msghdr** %5
%9 = bitcast %struct.msghdr* %8 to i8*
%10 = load i32, i32* %6
%11 = call i32 @bsd_syscall_sendmsg(i32 %7, i8* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.msghdr = type { i32 }
define i32 @uptcp_sendmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = bitcast %struct.msghdr* %1 to i8*
%5 = tail call i32 @bsd_syscall_sendmsg(i32 %0, i8* %4, i32 %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int atoi(char *);
int /*<<< orphan*/ kill(int, int /*<<< orphan*/);
int main(int argc, char **argv) {
  int pid = atoi(argv[1]);
  if (pid) {
    kill(pid, SIGINT);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1161 <main+0x41>
mov    -0x14(%rbp),%edi
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
call   1030 <kill@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
test   %eax,%eax
je     113e <main+0x1e>
mov    0x2eb3(%rip),%rcx
mov    (%rcx),%esi
mov    %eax,%edi
call   1030 <kill@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGINT = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i32 @atoi(i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i32, i32* %6
%15 = load i32, i32* @SIGINT
%16 = call i32 @kill(i32 %14, i32 %15)
br label %17
17: ; preds = %13, %2
ret i32 0
}

LLVM IR (-O2):
@SIGINT = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* @SIGINT
%9 = tail call i32 @kill(i32 %5, i32 %8)
br label %10
10: ; preds = %7, %2
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int x;
};
struct TYPE_4__ {
  TYPE_1__ xbutton;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xbutton_x(void *_p, int _v) {
  ((XEvent *)_p)->xbutton.x = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xbutton_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xbutton_x>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xbutton_x(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xbutton_x(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Type definitions */
struct ql_adapter {
  int dummy;
};

/* Variables and functions */
int ql_idc_wait(struct ql_adapter *);
int ql_mb_set_port_cfg(struct ql_adapter *);
int ql_set_port_cfg(struct ql_adapter *qdev) {
  int status;
  status = ql_mb_set_port_cfg(qdev);
  if (status)
    return status;
  status = ql_idc_wait(qdev);
  return status;
}


x86 assembly (clang, -O0):
<ql_set_port_cfg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ql_mb_set_port_cfg@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     114d <ql_set_port_cfg+0x2d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115f <ql_set_port_cfg+0x3f>
mov    -0x10(%rbp),%rdi
call   1040 <ql_idc_wait@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ql_set_port_cfg>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ql_mb_set_port_cfg@plt>
test   %eax,%eax
je     112f <ql_set_port_cfg+0xf>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <ql_idc_wait@plt>

LLVM IR (-O0):
%struct.ql_adapter = type { i32 }
define i32 @ql_set_port_cfg(%struct.ql_adapter* %0) {
%2 = alloca i32
%3 = alloca %struct.ql_adapter*
%4 = alloca i32
store %struct.ql_adapter* %0, %struct.ql_adapter** %3
%5 = load %struct.ql_adapter*, %struct.ql_adapter** %3
%6 = call i32 @ql_mb_set_port_cfg(%struct.ql_adapter* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = load %struct.ql_adapter*, %struct.ql_adapter** %3
%13 = call i32 @ql_idc_wait(%struct.ql_adapter* %12)
store i32 %13, i32* %4
%14 = load i32, i32* %4
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.ql_adapter = type { i32 }
define i32 @ql_set_port_cfg(%struct.ql_adapter* %0) {
%2 = tail call i32 @ql_mb_set_port_cfg(%struct.ql_adapter* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @ql_idc_wait(%struct.ql_adapter* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ %2, %1 ]
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ ssize_t;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
scalar_t__ write(int, void const *, size_t);
ssize_t safe_write(int fd, const void *buf, size_t count) {
  ssize_t n;
  do {
    n = write(fd, buf, count);
  } while (n < 0 && errno == EINTR);
  return n;
}


x86 assembly (clang, -O0):
<safe_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
mov    %rax,-0x20(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x20(%rbp)
mov    %al,-0x21(%rbp)
jge    1161 <safe_write+0x51>
mov    0x2e92(%rip),%rax
mov    (%rax),%rax
mov    0x2e80(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1123 <safe_write+0x13>
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_write>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <write@plt>
test   %rax,%rax
jns    114b <safe_write+0x3b>
mov    (%r12),%rcx
cmp    %rcx,(%r15)
je     1130 <safe_write+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i64 @safe_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %4
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = call i64 @write(i32 %9, i8* %10, i64 %11)
store i64 %12, i64* %7
br label %13
13: ; preds = %8
%14 = load i64, i64* %7
%15 = icmp slt i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %13
%17 = load i64, i64* @errno
%18 = load i64, i64* @EINTR
%19 = icmp eq i64 %17, %18
br label %20
20: ; preds = %16, %13
%21 = phi i1 [ false, %13 ], [ %19, %16 ]
br i1 %21, label %8, label %22
22: ; preds = %20
%23 = load i64, i64* %7
ret i64 %23
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i64 @safe_write(i32 %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %4, %3
%5 = tail call i64 @write(i32 %0, i8* %1, i64 %2)
%6 = icmp slt i64 %5, 0
%7 = load i64, i64* @errno
%8 = load i64, i64* @EINTR
%9 = icmp eq i64 %7, %8
%10 = select i1 %6, i1 %9, i1 false
br i1 %10, label %4, label %11
11: ; preds = %4
ret i64 %5
}
/* Variables and functions */
int lua_getnumber(int /*<<< orphan*/);
int /*<<< orphan*/ lua_lua2C(int);
int gettag(int i) { return lua_getnumber(lua_lua2C(i)); }


x86 assembly (clang, -O0):
<gettag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <lua_lua2C@plt>
mov    %eax,%edi
call   1030 <lua_getnumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettag>:
push   %rax
call   1040 <lua_lua2C@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <lua_getnumber@plt>

LLVM IR (-O0):
define i32 @gettag(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @lua_lua2C(i32 %3)
%5 = call i32 @lua_getnumber(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @gettag(i32 %0) {
%2 = tail call i32 @lua_lua2C(i32 %0)
%3 = tail call i32 @lua_getnumber(i32 %2)
ret i32 %3
}
void saveaddr(char c, void *ptr) { *(*(char **)ptr)++ = c; }


x86 assembly (clang, -O0):
<saveaddr>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x10(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<saveaddr>:
mov    (%rsi),%rax
lea    0x1(%rax),%rcx
mov    %rcx,(%rsi)
mov    %dil,(%rax)
ret

LLVM IR (-O0):
define void @saveaddr(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8, i8* %3
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i8**
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %7
store i8 %5, i8* %8
ret void
}

LLVM IR (-O2):
define void @saveaddr(i8 signext %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i8**
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %3
store i8 %0, i8* %4
ret void
}
/* Variables and functions */
int isupper(int c) { return ((c >= 'A') && (c <= 'Z')); }


x86 assembly (clang, -O0):
<isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isupper+0x20>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printUsage(char *commandName) {
  printf("Usage: %s [PORT]\n", commandName);
  printf("Spawns a server capable of interpreting cubbyhole commands.\n");
}


x86 assembly (clang, -O0):
<printUsage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printUsage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed9(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Usage: %s [PORT]\0A\00"
@.str.1 = [61 x i8] c"Spawns a server capable of interpreting cubbyhole commands.\0A\00"
define void @printUsage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Usage: %s [PORT]\0A\00"
@str = [60 x i8] c"Spawns a server capable of interpreting cubbyhole commands.\00"
define void @printUsage(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([60 x i8], [60 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int shutdown(int, int);
int metautils_syscall_shutdown(int fd, int how) { return shutdown(fd, how); }


x86 assembly (clang, -O0):
<metautils_syscall_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<metautils_syscall_shutdown>:
jmp    1030 <shutdown@plt>

LLVM IR (-O0):
define i32 @metautils_syscall_shutdown(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @shutdown(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @metautils_syscall_shutdown(i32 %0, i32 %1) {
%3 = tail call i32 @shutdown(i32 %0, i32 %1)
ret i32 %3
}
char *stringfix(type)
char *type;
{
  if (streq(type, "string")) {
    return ("wrapstring");
  } else {
    return (type);
  }
}


x86 assembly (clang, -O0):
<stringfix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xedd(%rip),%rsi
mov    $0x0,%al
call   1030 <streq@plt>
cmp    $0x0,%eax
je     1147 <stringfix+0x37>
lea    0xec2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    114f <stringfix+0x3f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringfix>:
push   %rbx
mov    %rdi,%rbx
lea    0xee9(%rip),%rsi
xor    %eax,%eax
call   1030 <streq@plt>
test   %eax,%eax
lea    0xed5(%rip),%rax
cmove  %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"string\00"
@.str.1 = [11 x i8] c"wrapstring\00"
define i8* @stringfix(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @streq to i32 (i8*, i8*, ...)*)(i8* %4, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %10
8: ; preds = %1
%9 = load i8*, i8** %3
store i8* %9, i8** %2
br label %10
10: ; preds = %8, %7
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"string\00"
@.str.1 = [11 x i8] c"wrapstring\00"
define i8* @stringfix(i8* %0) {
%2 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @streq to i32 (i8*, i8*, ...)*)(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i8* %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void main() {
  int i = 0;
  for (; i < 10; i++) {
    for (int j = 0; j < 10; j++)
      ;
  }
  assert(i == 10);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1160 <main+0x50>
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    114d <main+0x3d>
jmp    113f <main+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1130 <main+0x20>
jmp    1152 <main+0x42>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <main+0xf>
cmpl   $0xa,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %15, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %18
6: ; preds = %3
store i32 0, i32* %2
br label %7
7: ; preds = %11, %6
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 10
br i1 %9, label %10, label %14
10: ; preds = %7
br label %11
11: ; preds = %10
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %7
14: ; preds = %7
br label %15
15: ; preds = %14
%16 = load i32, i32* %1
%17 = add nsw i32 %16, 1
store i32 %17, i32* %1
br label %3
18: ; preds = %3
%19 = load i32, i32* %1
%20 = icmp eq i32 %19, 10
%21 = zext i1 %20 to i32
%22 = call i32 @assert(i32 %21)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @assert(i32 1)
ret void
}
/* Variables and functions */
scalar_t__ isspace(char);
char *cliSkipSpace(char *pc) {
  while (pc && *pc && isspace(*pc)) {
    pc++;
  }
  return pc;
}


x86 assembly (clang, -O0):
<cliSkipSpace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1157 <cliSkipSpace+0x47>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1157 <cliSkipSpace+0x47>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1167 <cliSkipSpace+0x57>
jmp    1178 <cliSkipSpace+0x68>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <cliSkipSpace+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cliSkipSpace>:
push   %rbx
test   %rdi,%rdi
je     113b <cliSkipSpace+0x2b>
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     113d <cliSkipSpace+0x2d>
nop
movsbl %al,%edi
call   1030 <isspace@plt>
test   %rax,%rax
je     113d <cliSkipSpace+0x2d>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <cliSkipSpace+0x10>
jmp    113d <cliSkipSpace+0x2d>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @cliSkipSpace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %18, %1
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %6
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = call i64 @isspace(i8 signext %13)
%15 = icmp ne i64 %14, 0
br label %16
16: ; preds = %11, %6, %3
%17 = phi i1 [ false, %6 ], [ false, %3 ], [ %15, %11 ]
br i1 %17, label %18, label %21
18: ; preds = %16
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
br label %3
21: ; preds = %16
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @cliSkipSpace(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %11
%7 = phi i8 [ %13, %11 ], [ %4, %3 ]
%8 = phi i8* [ %12, %11 ], [ %0, %3 ]
%9 = tail call i64 @isspace(i8 signext %7)
%10 = icmp eq i64 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %6
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %11, %6, %3, %1
%16 = phi i8* [ null, %1 ], [ %0, %3 ], [ %8, %6 ], [ %12, %11 ]
ret i8* %16
}
void byte_zero(void *to, unsigned int k) {
  char *d = (char *)to;
  while (k) {
    k--;
    d[k] = 0;
  }
}


x86 assembly (clang, -O0):
<byte_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1136 <byte_zero+0x36>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
jmp    1113 <byte_zero+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_zero>:
test   %esi,%esi
je     1122 <byte_zero+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @byte_zero(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i32, i32* %4
%12 = add i32 %11, -1
store i32 %12, i32* %4
%13 = load i8*, i8** %5
%14 = load i32, i32* %4
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @byte_zero(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
int execute_stat64() { return 0; }


x86 assembly (clang, -O0):
<execute_stat64>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_stat64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_stat64() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_stat64() {
ret i32 0
}
/* Variables and functions */
int smack_set_file(char const *, char *);
int smack_set_onlycap(const char *label) {
  return smack_set_file(label, "onlycap");
}


x86 assembly (clang, -O0):
<smack_set_onlycap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <smack_set_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smack_set_onlycap>:
lea    0xee9(%rip),%rsi
jmp    1030 <smack_set_file@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"onlycap\00"
define i32 @smack_set_onlycap(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @smack_set_file(i8* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [8 x i8] c"onlycap\00"
define i32 @smack_set_onlycap(i8* %0) {
%2 = tail call i32 @smack_set_file(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ add(int *, int);
int /*<<< orphan*/ print(int *, int);
int /*<<< orphan*/ reverse(int *, int);
int main(void) {
  int a[5] = {1, 2, 3, 4, 5};
  add(a, 5);
  reverse(a, 5);
  print(a, 5);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0xec1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xebe(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xebc(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1040 <add@plt>
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1030 <reverse@plt>
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1050 <print@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xed5(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xeba(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x5,%esi
call   1040 <add@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1030 <reverse@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1050 <print@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @add(i32* %3, i32 5)
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%6 = call i32 @reverse(i32* %5, i32 5)
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%8 = call i32 @print(i32* %7, i32 5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @add(i32* %3, i32 5)
%5 = call i32 @reverse(i32* %3, i32 5)
%6 = call i32 @print(i32* %3, i32 5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ nsblk_spam_reg(int);
void nsblk_spam_reg6(void) { nsblk_spam_reg(6); }


x86 assembly (clang, -O0):
<nsblk_spam_reg6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <nsblk_spam_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsblk_spam_reg6>:
mov    $0x6,%edi
jmp    1030 <nsblk_spam_reg@plt>

LLVM IR (-O0):
define void @nsblk_spam_reg6() {
%1 = call i32 @nsblk_spam_reg(i32 6)
ret void
}

LLVM IR (-O2):
define void @nsblk_spam_reg6() {
%1 = tail call i32 @nsblk_spam_reg(i32 6)
ret void
}
void SPIIntDisable(unsigned long ulBase, unsigned long ulIntFlags) {

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) &= ~ulIntFlags;
}


x86 assembly (clang, -O0):
<SPIIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIIntDisable>:
not    %rsi
and    %rsi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @SPIIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = xor i64 %5, -1
%7 = load i64, i64* %3
%8 = add i64 %7, 4
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @SPIIntDisable(i64 %0, i64 %1) {
%3 = xor i64 %1, -1
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, %3
store volatile i64 %7, i64* %5
ret void
}
/* Type definitions */
struct pci_card {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct pci_card *);
void free_pci_card(struct pci_card *device) { free(device); }


x86 assembly (clang, -O0):
<free_pci_card>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_pci_card>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.pci_card = type { i32 }
define void @free_pci_card(%struct.pci_card* %0) {
%2 = alloca %struct.pci_card*
store %struct.pci_card* %0, %struct.pci_card** %2
%3 = load %struct.pci_card*, %struct.pci_card** %2
%4 = call i32 @free(%struct.pci_card* %3)
ret void
}

LLVM IR (-O2):
%struct.pci_card = type { i32 }
define void @free_pci_card(%struct.pci_card* nocapture %0) {
%2 = tail call i32 @free(%struct.pci_card* %0)
ret void
}
/* Type definitions */
typedef scalar_t__ __v8hi;
typedef scalar_t__ __m128i;

/* Variables and functions */
__m128i __attribute__((__always___, __nodebug__))
_mm_sub_epi16(__m128i a, __m128i b) {
  return (__m128i)((__v8hi)a - (__v8hi)b);
}


x86 assembly (clang, -O0):
<_mm_sub_epi16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_sub_epi16>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @_mm_sub_epi16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @_mm_sub_epi16(i64 %0, i64 %1) {
%3 = sub nsw i64 %0, %1
ret i64 %3
}
void resize_file() {}


x86 assembly (clang, -O0):
<resize_file>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resize_file>:
ret

LLVM IR (-O0):
define void @resize_file() {
ret void
}

LLVM IR (-O2):
define void @resize_file() {
ret void
}
/* Variables and functions */
scalar_t__ pow(int, int);
int pythagorean(int a, int b, int c) {
  return (pow(a, 2) + pow(b, 2) == pow(c, 2));
}


x86 assembly (clang, -O0):
<pythagorean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1030 <pow@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x2,%esi
call   1030 <pow@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    $0x2,%esi
call   1030 <pow@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pythagorean>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    $0x2,%esi
call   1030 <pow@plt>
mov    %rax,%rbx
mov    %ebp,%edi
mov    $0x2,%esi
call   1030 <pow@plt>
mov    %rax,%rbp
add    %rbx,%rbp
mov    %r14d,%edi
mov    $0x2,%esi
call   1030 <pow@plt>
xor    %ecx,%ecx
cmp    %rax,%rbp
sete   %cl
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @pythagorean(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = call i64 @pow(i32 %7, i32 2)
%9 = load i32, i32* %5
%10 = call i64 @pow(i32 %9, i32 2)
%11 = add nsw i64 %8, %10
%12 = load i32, i32* %6
%13 = call i64 @pow(i32 %12, i32 2)
%14 = icmp eq i64 %11, %13
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @pythagorean(i32 %0, i32 %1, i32 %2) {
%4 = tail call i64 @pow(i32 %0, i32 2)
%5 = tail call i64 @pow(i32 %1, i32 2)
%6 = add nsw i64 %5, %4
%7 = tail call i64 @pow(i32 %2, i32 2)
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
int sched_ncpus() { return 1; }


x86 assembly (clang, -O0):
<sched_ncpus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_ncpus>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @sched_ncpus() {
ret i32 1
}

LLVM IR (-O2):
define i32 @sched_ncpus() {
ret i32 1
}
void hud_draw() {}


x86 assembly (clang, -O0):
<hud_draw>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hud_draw>:
ret

LLVM IR (-O0):
define void @hud_draw() {
ret void
}

LLVM IR (-O2):
define void @hud_draw() {
ret void
}
int B(int x) { return !x; }


x86 assembly (clang, -O0):
<B>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<B>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @B(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @B(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}