void closure_mapping_order3_square(int *out_1434872603480458915) {
  out_1434872603480458915[0] = 5;
  out_1434872603480458915[1] = 6;
  out_1434872603480458915[2] = 9;
  out_1434872603480458915[3] = 10;
  out_1434872603480458915[4] = 1;
  out_1434872603480458915[5] = 2;
  out_1434872603480458915[6] = 7;
  out_1434872603480458915[7] = 11;
  out_1434872603480458915[8] = 14;
  out_1434872603480458915[9] = 13;
  out_1434872603480458915[10] = 8;
  out_1434872603480458915[11] = 4;
  out_1434872603480458915[12] = 0;
  out_1434872603480458915[13] = 3;
  out_1434872603480458915[14] = 15;
  out_1434872603480458915[15] = 12;
}


x86 assembly (clang, -O0):
<closure_mapping_order3_square>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x6,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x9,0x8(%rax)
mov    -0x8(%rbp),%rax
movl   $0xa,0xc(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1,0x10(%rax)
mov    -0x8(%rbp),%rax
movl   $0x2,0x14(%rax)
mov    -0x8(%rbp),%rax
movl   $0x7,0x18(%rax)
mov    -0x8(%rbp),%rax
movl   $0xb,0x1c(%rax)
mov    -0x8(%rbp),%rax
movl   $0xe,0x20(%rax)
mov    -0x8(%rbp),%rax
movl   $0xd,0x24(%rax)
mov    -0x8(%rbp),%rax
movl   $0x8,0x28(%rax)
mov    -0x8(%rbp),%rax
movl   $0x4,0x2c(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x30(%rax)
mov    -0x8(%rbp),%rax
movl   $0x3,0x34(%rax)
mov    -0x8(%rbp),%rax
movl   $0xf,0x38(%rax)
mov    -0x8(%rbp),%rax
movl   $0xc,0x3c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<closure_mapping_order3_square>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movaps 0xeff(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movaps 0xf04(%rip),%xmm0
movups %xmm0,0x20(%rdi)
movaps 0xf09(%rip),%xmm0
movups %xmm0,0x30(%rdi)
ret

LLVM IR (-O0):
define void @closure_mapping_order3_square(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 5, i32* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32 6, i32* %6
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 9, i32* %8
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 3
store i32 10, i32* %10
%11 = load i32*, i32** %2
%12 = getelementptr inbounds i32, i32* %11, i64 4
store i32 1, i32* %12
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 5
store i32 2, i32* %14
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 6
store i32 7, i32* %16
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 7
store i32 11, i32* %18
%19 = load i32*, i32** %2
%20 = getelementptr inbounds i32, i32* %19, i64 8
store i32 14, i32* %20
%21 = load i32*, i32** %2
%22 = getelementptr inbounds i32, i32* %21, i64 9
store i32 13, i32* %22
%23 = load i32*, i32** %2
%24 = getelementptr inbounds i32, i32* %23, i64 10
store i32 8, i32* %24
%25 = load i32*, i32** %2
%26 = getelementptr inbounds i32, i32* %25, i64 11
store i32 4, i32* %26
%27 = load i32*, i32** %2
%28 = getelementptr inbounds i32, i32* %27, i64 12
store i32 0, i32* %28
%29 = load i32*, i32** %2
%30 = getelementptr inbounds i32, i32* %29, i64 13
store i32 3, i32* %30
%31 = load i32*, i32** %2
%32 = getelementptr inbounds i32, i32* %31, i64 14
store i32 15, i32* %32
%33 = load i32*, i32** %2
%34 = getelementptr inbounds i32, i32* %33, i64 15
store i32 12, i32* %34
ret void
}

LLVM IR (-O2):
define void @closure_mapping_order3_square(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 5, i32 6, i32 9, i32 10>, <4 x i32>* %2
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = bitcast i32* %3 to <4 x i32>*
store <4 x i32> <i32 1, i32 2, i32 7, i32 11>, <4 x i32>* %4
%5 = getelementptr inbounds i32, i32* %0, i64 8
%6 = bitcast i32* %5 to <4 x i32>*
store <4 x i32> <i32 14, i32 13, i32 8, i32 4>, <4 x i32>* %6
%7 = getelementptr inbounds i32, i32* %0, i64 12
%8 = bitcast i32* %7 to <4 x i32>*
store <4 x i32> <i32 0, i32 3, i32 15, i32 12>, <4 x i32>* %8
ret void
}