xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ getdelim(char **, size_t *, char, int /*<<< orphan*/ *);
ssize_t getline(char **__restrict buf, size_t *__restrict buflen,
                FILE *__restrict fp) {
  return getdelim(buf, buflen, '\n', fp);
}


x86 assembly (clang, -O0):
<getline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0xa,%edx
call   1030 <getdelim@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getline>:
mov    %rdx,%rcx
mov    $0xa,%edx
jmp    1030 <getdelim@plt>

LLVM IR (-O0):
define i32 @getline(i8** noalias %0, i64* noalias %1, i32* noalias %2) {
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i32*
store i8** %0, i8*** %4
store i64* %1, i64** %5
store i32* %2, i32** %6
%7 = load i8**, i8*** %4
%8 = load i64*, i64** %5
%9 = load i32*, i32** %6
%10 = call i32 @getdelim(i8** %7, i64* %8, i8 signext 10, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getline(i8** noalias %0, i64* noalias %1, i32* noalias %2) {
%4 = tail call i32 @getdelim(i8** %0, i64* %1, i8 signext 10, i32* %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
void func6() { print("time where be on light\n after laser passed"); }


x86 assembly (clang, -O0):
<func6>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func6>:
lea    0xee9(%rip),%rdi
jmp    1030 <print@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"time where be on light\0A after laser passed\00"
define void @func6() {
%1 = call i32 @print(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"time where be on light\0A after laser passed\00"
define void @func6() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char const *, char *, long *);
long atol(const char *str) {
  long result;
  sscanf(str, "%ld", &result);
  return result;
}


x86 assembly (clang, -O0):
<atol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <sscanf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atol>:
push   %rax
lea    0xee8(%rip),%rsi
mov    %rsp,%rdx
call   1030 <sscanf@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%ld\00"
define i64 @atol(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64* %3)
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"%ld\00"
define i64 @atol(i8* nocapture %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64* %2)
%5 = load i64, i64* %2
ret i64 %5
}
int notifier_to_errno(int ret) {
  ret &= ~0x8000;
  return ret > 0x0001 ? 0x0001 - ret : 0;
}


x86 assembly (clang, -O0):
<notifier_to_errno>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff7fff,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    112c <notifier_to_errno+0x2c>
mov    $0x1,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <notifier_to_errno+0x36>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <notifier_to_errno+0x36>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<notifier_to_errno>:
and    $0xffff7fff,%edi
mov    $0x1,%ecx
sub    %edi,%ecx
xor    %eax,%eax
cmp    $0x2,%edi
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @notifier_to_errno(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -32769
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 1, %8
br label %11
10: ; preds = %1
br label %11
11: ; preds = %10, %7
%12 = phi i32 [ %9, %7 ], [ 0, %10 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @notifier_to_errno(i32 %0) {
%2 = and i32 %0, -32769
%3 = icmp sgt i32 %2, 1
%4 = sub nsw i32 1, %2
%5 = select i1 %3, i32 %4, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _IONBF;
int /*<<< orphan*/ libcbc_init();
int /*<<< orphan*/ setvbuf(int /*<<< orphan*/, int /*<<< orphan*/ *,
                           int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void init() {
  setvbuf(stdout, NULL, _IONBF, 0);
  libcbc_init();
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
xor    %ecx,%ecx
call   1040 <setvbuf@plt>
mov    $0x0,%al
call   1030 <libcbc_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    0x2eb7(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
xor    %ecx,%ecx
call   1040 <setvbuf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <libcbc_init@plt>

LLVM IR (-O0):
@stdout = global i32 0
@_IONBF = global i32 0
define void @init() {
%1 = load i32, i32* @stdout
%2 = load i32, i32* @_IONBF
%3 = call i32 @setvbuf(i32 %1, i32* null, i32 %2, i32 0)
%4 = call i32 (...) @libcbc_init()
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@_IONBF = global i32 0
define void @init() {
%1 = load i32, i32* @stdout
%2 = load i32, i32* @_IONBF
%3 = tail call i32 @setvbuf(i32 %1, i32* null, i32 %2, i32 0)
%4 = tail call i32 (...) @libcbc_init()
ret void
}
void serial_putc(const char c) {
  while (!((*((volatile unsigned long *)0xE2900010)) & (1 << 2)))
    ;
  (*((volatile unsigned long *)0xE2900020)) = c;
  if (c == '\n') {
    serial_putc('\r');
  }
}


x86 assembly (clang, -O0):
<serial_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xe2900010,%eax
mov    (%rax),%rax
and    $0x4,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1140 <serial_putc+0x30>
jmp    1145 <serial_putc+0x35>
jmp    111e <serial_putc+0xe>
movsbq -0x1(%rbp),%rcx
mov    $0xe2900020,%eax
mov    %rcx,(%rax)
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jne    1169 <serial_putc+0x59>
mov    $0xd,%edi
call   1030 <serial_putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_putc>:
mov    $0xe2900010,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testq  $0x4,(%rax)
je     1110 <serial_putc+0x10>
movsbq %dil,%rcx
mov    %rcx,0x10(%rax)
cmp    $0xa,%cl
jne    1141 <serial_putc+0x41>
cs nopw 0x0(%rax,%rax,1)
testq  $0x4,(%rax)
je     1130 <serial_putc+0x30>
movq   $0xd,0x10(%rax)
ret

LLVM IR (-O0):
define void @serial_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %8, %1
%4 = load volatile i64, i64* inttoptr (i64 3801088016 to i64*)
%5 = and i64 %4, 4
%6 = icmp ne i64 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = load i8, i8* %2
%11 = sext i8 %10 to i64
store volatile i64 %11, i64* inttoptr (i64 3801088032 to i64*)
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 10
br i1 %14, label %15, label %16
15: ; preds = %9
br label %16
16: ; preds = %15, %9
ret void
}

LLVM IR (-O2):
define void @serial_putc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i64, i64* inttoptr (i64 3801088016 to i64*)
%4 = and i64 %3, 4
%5 = icmp eq i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = sext i8 %0 to i64
store volatile i64 %7, i64* inttoptr (i64 3801088032 to i64*)
%8 = icmp eq i8 %0, 10
br i1 %8, label %9, label %14
9: ; preds = %6, %9
%10 = load volatile i64, i64* inttoptr (i64 3801088016 to i64*)
%11 = and i64 %10, 4
%12 = icmp eq i64 %11, 0
br i1 %12, label %9, label %13
13: ; preds = %9
store volatile i64 13, i64* inttoptr (i64 3801088032 to i64*)
br label %14
14: ; preds = %13, %6
ret void
}
void gtk_tree_view_column_get_cell_renderers() {}


x86 assembly (clang, -O0):
<gtk_tree_view_column_get_cell_renderers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_column_get_cell_renderers>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_column_get_cell_renderers() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_column_get_cell_renderers() {
ret void
}
/* Type definitions */
typedef unsigned long long uint64_t;

/* Variables and functions */
int _div_mulhi64(int, unsigned long long);
uint64_t div_u64_by_15625div512(uint64_t val) {
  if (val > 16383999997ull) {
    return (_div_mulhi64(0x431bde82d7b634dbull, val) >> (12 - 9));
  }
  return (val * 0x431bde83ul) >> (12 + 32 - 9);
}


x86 assembly (clang, -O0):
<div_u64_by_15625div512>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
movabs $0x3d08ffffd,%rax
cmp    %rax,-0x10(%rbp)
jbe    114c <div_u64_by_15625div512+0x3c>
mov    -0x10(%rbp),%rsi
mov    $0xd7b634db,%edi
call   1030 <_div_mulhi64@plt>
sar    $0x3,%eax
cltq
mov    %rax,-0x8(%rbp)
jmp    115c <div_u64_by_15625div512+0x4c>
imul   $0x431bde83,-0x10(%rbp),%rax
43
shr    $0x23,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_u64_by_15625div512>:
mov    %rdi,%rsi
movabs $0x3d08ffffe,%rax
cmp    %rax,%rdi
jb     1137 <div_u64_by_15625div512+0x27>
push   %rax
mov    $0xd7b634db,%edi
call   1030 <_div_mulhi64@plt>
sar    $0x3,%eax
cltq
add    $0x8,%rsp
ret
imul   $0x431bde83,%rsi,%rax
shr    $0x23,%rax
ret

LLVM IR (-O0):
define i64 @div_u64_by_15625div512(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ugt i64 %4, 16383999997
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i64, i64* %3
%8 = call i32 @_div_mulhi64(i32 -675924773, i64 %7)
%9 = ashr i32 %8, 3
%10 = sext i32 %9 to i64
store i64 %10, i64* %2
br label %15
11: ; preds = %1
%12 = load i64, i64* %3
%13 = mul i64 %12, 1125899907
%14 = lshr i64 %13, 35
store i64 %14, i64* %2
br label %15
15: ; preds = %11, %6
%16 = load i64, i64* %2
ret i64 %16
}

LLVM IR (-O2):
define i64 @div_u64_by_15625div512(i64 %0) {
%2 = icmp ugt i64 %0, 16383999997
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i32 @_div_mulhi64(i32 -675924773, i64 %0)
%5 = ashr i32 %4, 3
%6 = sext i32 %5 to i64
br label %10
7: ; preds = %1
%8 = mul nuw i64 %0, 1125899907
%9 = lshr i64 %8, 35
br label %10
10: ; preds = %7, %3
%11 = phi i64 [ %6, %3 ], [ %9, %7 ]
ret i64 %11
}
/* Variables and functions */
int /*<<< orphan*/ printValue(int, int);
int /*<<< orphan*/ printf(char *);
int turnOnRightmostZero(int value) {
  value |= (value + 1);
  printValue(value, 8);
  printf(" TORZ\n");
  return value;
}


x86 assembly (clang, -O0):
<turnOnRightmostZero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1040 <printValue@plt>
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<turnOnRightmostZero>:
push   %rbx
lea    0x1(%rdi),%ebx
or     %edi,%ebx
mov    %ebx,%edi
mov    $0x8,%esi
call   1040 <printValue@plt>
lea    0xec7(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c" TORZ\0A\00"
define i32 @turnOnRightmostZero(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = load i32, i32* %2
%6 = or i32 %5, %4
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printValue(i32 %7, i32 8)
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@str = [6 x i8] c" TORZ\00"
define i32 @turnOnRightmostZero(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = or i32 %2, %0
%4 = tail call i32 @printValue(i32 %3, i32 8)
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *,
                           int);
int /*<<< orphan*/ stderr;
void bt_warn_fn(const char *str, char *file, int line) {
  fprintf(stderr, "%s in file:%s, line:%d.\n", str, file, line);
}


x86 assembly (clang, -O0):
<bt_warn_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
lea    0xec1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bt_warn_fn>:
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
lea    0xed7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [25 x i8] c"%s in file:%s, line:%d.\0A\00"
define void @bt_warn_fn(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [25 x i8] c"%s in file:%s, line:%d.\0A\00"
define void @bt_warn_fn(i8* %0, i8* %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i32 %2)
ret void
}
__attribute__((__always___)) unsigned int readl(const volatile void *addr) {
  return *(volatile unsigned int *)addr;
}


x86 assembly (clang, -O0):
<readl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readl>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @readl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @readl(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) { printf("Hello Gitters"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello Gitters\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello Gitters\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void delete_file() {}


x86 assembly (clang, -O0):
<delete_file>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_file>:
ret

LLVM IR (-O0):
define void @delete_file() {
ret void
}

LLVM IR (-O2):
define void @delete_file() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stopTask(int);
void allTasksStop() {
  stopTask(1);
  stopTask(2);
  stopTask(3);
  stopTask(4);
}


x86 assembly (clang, -O0):
<allTasksStop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <stopTask@plt>
mov    $0x2,%edi
call   1030 <stopTask@plt>
mov    $0x3,%edi
call   1030 <stopTask@plt>
mov    $0x4,%edi
call   1030 <stopTask@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<allTasksStop>:
push   %rax
mov    $0x1,%edi
call   1030 <stopTask@plt>
mov    $0x2,%edi
call   1030 <stopTask@plt>
mov    $0x3,%edi
call   1030 <stopTask@plt>
mov    $0x4,%edi
pop    %rax
jmp    1030 <stopTask@plt>

LLVM IR (-O0):
define void @allTasksStop() {
%1 = call i32 @stopTask(i32 1)
%2 = call i32 @stopTask(i32 2)
%3 = call i32 @stopTask(i32 3)
%4 = call i32 @stopTask(i32 4)
ret void
}

LLVM IR (-O2):
define void @allTasksStop() {
%1 = tail call i32 @stopTask(i32 1)
%2 = tail call i32 @stopTask(i32 2)
%3 = tail call i32 @stopTask(i32 3)
%4 = tail call i32 @stopTask(i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _ptrc_glFlush();
__attribute__((visibility("default"))) void emu_glFlush() { _ptrc_glFlush(); }


x86 assembly (clang, -O0):
<emu_glFlush>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_ptrc_glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<emu_glFlush>:
xor    %eax,%eax
jmp    1030 <_ptrc_glFlush@plt>

LLVM IR (-O0):
define void @emu_glFlush() {
%1 = call i32 (...) @_ptrc_glFlush()
ret void
}

LLVM IR (-O2):
define void @emu_glFlush() {
%1 = tail call i32 (...) @_ptrc_glFlush()
ret void
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ sprintf(char *, char *, char *, char const *);
scalar_t__ strlen(char const *);
char *test_file(const char *name) {
  char *fullname = malloc(strlen("/tmp/avfstest") + 1 + strlen(name) + 1);
  sprintf(fullname, "%s/%s", "/tmp/avfstest", name);
  return fullname;
}


x86 assembly (clang, -O0):
<test_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <strlen@plt>
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
add    %rax,%rdi
add    $0x1,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
lea    0xe92(%rip),%rsi
lea    0xe7d(%rip),%rdx
call   1050 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_file>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
lea    0xf(%rax),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xebf(%rip),%rsi
lea    0xeaa(%rip),%rdx
mov    %rax,%rdi
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [14 x i8] c"/tmp/avfstest\00"
@.str.1 = [6 x i8] c"%s/%s\00"
define i8* @test_file(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 @strlen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = add nsw i64 %4, 1
%6 = load i8*, i8** %2
%7 = call i64 @strlen(i8* %6)
%8 = add nsw i64 %5, %7
%9 = add nsw i64 %8, 1
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [14 x i8] c"/tmp/avfstest\00"
@.str.1 = [6 x i8] c"%s/%s\00"
define noalias i8* @test_file(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 15
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %4, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %4
}
int *voidfunc(void) {
  static int twentythree = 23;
  return &twentythree;
}


x86 assembly (clang, -O0):
<voidfunc>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<voidfunc>:
lea    0x2f19(%rip),%rax
ret

LLVM IR (-O0):
@voidfunc.twentythree = internal global i32 23
define i32* @voidfunc() {
ret i32* @voidfunc.twentythree
}

LLVM IR (-O2):
@voidfunc.twentythree = internal global i32 23
define i32* @voidfunc() {
ret i32* @voidfunc.twentythree
}
void hdd0(void) { return; }


x86 assembly (clang, -O0):
<hdd0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdd0>:
ret

LLVM IR (-O0):
define void @hdd0() {
ret void
}

LLVM IR (-O2):
define void @hdd0() {
ret void
}
/* Variables and functions */
int atoi(char const *);
char *roadmap_option_get_geometry(char const *);
int roadmap_option_width(const char *name) {
  const char *option = roadmap_option_get_geometry(name);
  if (option == NULL || option[0] == 0) {
    return 300;
  }
  return atoi(option);
}


x86 assembly (clang, -O0):
<roadmap_option_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <roadmap_option_get_geometry@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1154 <roadmap_option_width+0x34>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1160 <roadmap_option_width+0x40>
movl   $0x12c,-0x4(%rbp)
jmp    116c <roadmap_option_width+0x4c>
mov    -0x18(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_option_width>:
push   %rax
call   1030 <roadmap_option_get_geometry@plt>
test   %rax,%rax
je     1139 <roadmap_option_width+0x19>
cmpb   $0x0,(%rax)
je     1139 <roadmap_option_width+0x19>
mov    %rax,%rdi
pop    %rax
jmp    1040 <atoi@plt>
mov    $0x12c,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @roadmap_option_width(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @roadmap_option_get_geometry(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %15, label %9
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %9, %1
store i32 300, i32* %2
br label %19
16: ; preds = %9
%17 = load i8*, i8** %4
%18 = call i32 @atoi(i8* %17)
store i32 %18, i32* %2
br label %19
19: ; preds = %16, %15
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @roadmap_option_width(i8* %0) {
%2 = tail call i8* @roadmap_option_get_geometry(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i8, i8* %2
%6 = icmp eq i8 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @atoi(i8* %2)
br label %9
9: ; preds = %1, %4, %7
%10 = phi i32 [ %8, %7 ], [ 300, %4 ], [ 300, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ st103_ep_set_tx_status(int, int);
void usb_lld_stall_tx(int ep_num) { st103_ep_set_tx_status(ep_num, (0x0010)); }


x86 assembly (clang, -O0):
<usb_lld_stall_tx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x10,%esi
call   1030 <st103_ep_set_tx_status@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_lld_stall_tx>:
mov    $0x10,%esi
jmp    1030 <st103_ep_set_tx_status@plt>

LLVM IR (-O0):
define void @usb_lld_stall_tx(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @st103_ep_set_tx_status(i32 %3, i32 16)
ret void
}

LLVM IR (-O2):
define void @usb_lld_stall_tx(i32 %0) {
%2 = tail call i32 @st103_ep_set_tx_status(i32 %0, i32 16)
ret void
}
void rc5_advance_pulse(unsigned *buf, unsigned *n, unsigned length) {
  if (*n % 2)
    buf[++(*n)] = length;
  else
    buf[*n] += length;
}


x86 assembly (clang, -O0):
<rc5_advance_pulse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113d <rc5_advance_pulse+0x3d>
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rsi
mov    (%rsi),%ecx
add    $0x1,%ecx
mov    %ecx,(%rsi)
mov    %ecx,%ecx
mov    %edx,(%rax,%rcx,4)
jmp    1150 <rc5_advance_pulse+0x50>
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
add    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rc5_advance_pulse>:
mov    (%rsi),%eax
test   $0x1,%al
jne    110a <rc5_advance_pulse+0xa>
add    %edx,(%rdi,%rax,4)
ret
add    $0x1,%eax
mov    %eax,(%rsi)
mov    %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @rc5_advance_pulse(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32, i32* %7
%9 = urem i32 %8, 2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32*, i32** %4
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = add i32 %15, 1
store i32 %16, i32* %14
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %13, i64 %17
store i32 %12, i32* %18
br label %28
19: ; preds = %3
%20 = load i32, i32* %6
%21 = load i32*, i32** %4
%22 = load i32*, i32** %5
%23 = load i32, i32* %22
%24 = zext i32 %23 to i64
%25 = getelementptr inbounds i32, i32* %21, i64 %24
%26 = load i32, i32* %25
%27 = add i32 %26, %20
store i32 %27, i32* %25
br label %28
28: ; preds = %19, %11
ret void
}

LLVM IR (-O2):
define void @rc5_advance_pulse(i32* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = load i32, i32* %1
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %3
%8 = add i32 %4, 1
store i32 %8, i32* %1
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %2, i32* %10
br label %16
11: ; preds = %3
%12 = zext i32 %4 to i64
%13 = getelementptr inbounds i32, i32* %0, i64 %12
%14 = load i32, i32* %13
%15 = add i32 %14, %2
store i32 %15, i32* %13
br label %16
16: ; preds = %11, %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int n, s = 1;
  for (n = 3; n <= 1001; n += 2)
    s += 4 * n * n - 6 * n + 6;
  printf("%d\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x18(%rbp)
movl   $0x3,-0x14(%rbp)
cmpl   $0x3e9,-0x14(%rbp)
jg     1168 <main+0x58>
mov    -0x14(%rbp),%eax
shl    $0x2,%eax
imul   -0x14(%rbp),%eax
imul   $0x6,-0x14(%rbp),%ecx
sub    %ecx,%eax
add    $0x6,%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x14(%rbp)
jmp    1134 <main+0x24>
mov    -0x18(%rbp),%esi
lea    0xe8e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x27e2bd39,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %7
store i32 3, i32* %6
br label %8
8: ; preds = %22, %2
%9 = load i32, i32* %6
%10 = icmp sle i32 %9, 1001
br i1 %10, label %11, label %25
11: ; preds = %8
%12 = load i32, i32* %6
%13 = mul nsw i32 4, %12
%14 = load i32, i32* %6
%15 = mul nsw i32 %13, %14
%16 = load i32, i32* %6
%17 = mul nsw i32 6, %16
%18 = sub nsw i32 %15, %17
%19 = add nsw i32 %18, 6
%20 = load i32, i32* %7
%21 = add nsw i32 %20, %19
store i32 %21, i32* %7
br label %22
22: ; preds = %11
%23 = load i32, i32* %6
%24 = add nsw i32 %23, 2
store i32 %24, i32* %6
br label %8
25: ; preds = %8
%26 = load i32, i32* %7
%27 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %26)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 669171001)
ret i32 0
}
int fme_hssi_eth_init(struct ifpga_feature *feature) {
  (void)(feature);
  return 0;
}


x86 assembly (clang, -O0):
<fme_hssi_eth_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fme_hssi_eth_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ifpga_feature = type opaque
define i32 @fme_hssi_eth_init(%struct.ifpga_feature* %0) {
%2 = alloca %struct.ifpga_feature*
store %struct.ifpga_feature* %0, %struct.ifpga_feature** %2
%3 = load %struct.ifpga_feature*, %struct.ifpga_feature** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ifpga_feature = type opaque
define i32 @fme_hssi_eth_init(%struct.ifpga_feature* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __NR_open;
int syscall(int /*<<< orphan*/, char const *, int, int);
int open_(const char *pathname, int flags, int mode) {
  return syscall(__NR_open, pathname, flags, mode);
}


x86 assembly (clang, -O0):
<open_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ed2(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_open = global i32 0
define i32 @open_(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @__NR_open
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @syscall(i32 %7, i8* %8, i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
@__NR_open = global i32 0
define i32 @open_(i8* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @__NR_open
%5 = tail call i32 @syscall(i32 %4, i8* %0, i32 %1, i32 %2)
ret i32 %5
}
double atan2(double __y, double __x) {
  register double __val;
  __asm __volatile__("fpatan\n\t"
                     "fld %%st(0)"
                     : "=t"(__val)
                     : "0"(__x), "u"(__y));
  return __val;
}


x86 assembly (clang, -O0):
<atan2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  %xmm1,-0x20(%rbp)
movsd  %xmm0,-0x28(%rbp)
fldl   -0x20(%rbp)
fldl   -0x28(%rbp)
fxch   %st(1)
fpatan
fld    %st(0)
fstp   %st(1)
fstpl  -0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan2>:
movsd  %xmm1,-0x10(%rsp)
movsd  %xmm0,-0x8(%rsp)
fldl   -0x10(%rsp)
fldl   -0x8(%rsp)
fxch   %st(1)
fpatan
fld    %st(0)
fstp   %st(1)
fstpl  -0x18(%rsp)
movsd  -0x18(%rsp),%xmm0
ret

LLVM IR (-O0):
define double @atan2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = load double, double* %3
%8 = call double asm sideeffect "fpatan\0A\09fld %st(0)", "={st},0,{st(1)},~{dirflag},~{fpsr},~{flags}"(double %6, double %7)
store double %8, double* %5
%9 = load double, double* %5
ret double %9
}

LLVM IR (-O2):
define double @atan2(double %0, double %1) {
%3 = tail call double asm sideeffect "fpatan\0A\09fld %st(0)", "={st},0,{st(1)},~{dirflag},~{fpsr},~{flags}"(double %1, double %0)
ret double %3
}
int vde_chain_nm3_init(int *n_in, int *n_out, int *n_int, int *n_real) {
  if (n_in)
    *n_in = 4;
  if (n_out)
    *n_out = 3;
  if (n_int)
    *n_int = 0;
  if (n_real)
    *n_real = 0;
  return 0;
}


x86 assembly (clang, -O0):
<vde_chain_nm3_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <vde_chain_nm3_init+0x29>
mov    -0x8(%rbp),%rax
movl   $0x4,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <vde_chain_nm3_init+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x3,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <vde_chain_nm3_init+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <vde_chain_nm3_init+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm3_init>:
test   %rdi,%rdi
je     110b <vde_chain_nm3_init+0xb>
movl   $0x4,(%rdi)
test   %rsi,%rsi
je     1116 <vde_chain_nm3_init+0x16>
movl   $0x3,(%rsi)
test   %rdx,%rdx
je     1121 <vde_chain_nm3_init+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <vde_chain_nm3_init+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vde_chain_nm3_init(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 4, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 3, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @vde_chain_nm3_init(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 4, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 3, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
int __ffs(int x) {
  int cnt;
  int tmp;
  asm("xorl %0,%0\n"
      "bsfl %2,%1\n"
      "jz 1f\n"
      "leal 1(%1),%0\n"
      "1:"
      : "=&a"(cnt), "=r"(tmp)
      : "rm"(x));
  return cnt;
}


x86 assembly (clang, -O0):
<__ffs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
bsf    -0x10(%rbp),%ecx
je     111d <__ffs+0x1d>
lea    0x1(%ecx),%eax
mov    %ecx,-0x14(%rbp)
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
mov    %ecx,-0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ffs>:
mov    %edi,-0x4(%rsp)
xor    %eax,%eax
bsf    -0x4(%rsp),%ecx
je     1111 <__ffs+0x11>
lea    0x1(%ecx),%eax
ret

LLVM IR (-O0):
define i32 @__ffs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call { i32, i32 } asm "xorl $0,$0\0Absfl $2,$1\0Ajz 1f\0Aleal 1($1),$0\0A1:", "=&{ax},=r,rm,~{dirflag},~{fpsr},~{flags}"(i32 %5)
%7 = extractvalue { i32, i32 } %6, 0
%8 = extractvalue { i32, i32 } %6, 1
store i32 %7, i32* %3
store i32 %8, i32* %4
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @__ffs(i32 %0) {
%2 = tail call { i32, i32 } asm "xorl $0,$0\0Absfl $2,$1\0Ajz 1f\0Aleal 1($1),$0\0A1:", "=&{ax},=r,rm,~{dirflag},~{fpsr},~{flags}"(i32 %0)
%3 = extractvalue { i32, i32 } %2, 0
ret i32 %3
}
/* Variables and functions */
scalar_t__ ALPHABET();
int FXNNAME() {
  if (ALPHABET()) {
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<FXNNAME>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <ALPHABET@plt>
cmp    $0x0,%rax
je     112e <FXNNAME+0x1e>
jmp    1135 <FXNNAME+0x25>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FXNNAME>:
push   %rax
xor    %eax,%eax
call   1030 <ALPHABET@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @FXNNAME() {
%1 = alloca i32
%2 = call i64 (...) @ALPHABET()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @FXNNAME() {
%1 = tail call i64 (...) @ALPHABET()
ret i32 0
}
/* Variables and functions */
size_t b64_encodedLength(size_t length) { return (length + 2) / 3 * 4; }


x86 assembly (clang, -O0):
<b64_encodedLength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x2,%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
shl    $0x2,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b64_encodedLength>:
lea    0x2(%rdi),%rax
movabs $0xaaaaaaaaaaaaaaab,%rcx
aa aa aa
mul    %rcx
lea    (%rdx,%rdx,1),%rax
and    $0xfffffffffffffffc,%rax
ret

LLVM IR (-O0):
define i64 @b64_encodedLength(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 2
%5 = udiv i64 %4, 3
%6 = mul i64 %5, 4
ret i64 %6
}

LLVM IR (-O2):
define i64 @b64_encodedLength(i64 %0) {
%2 = add i64 %0, 2
%3 = udiv i64 %2, 3
%4 = shl i64 %3, 2
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void causeSigsegv(char *mem, long pagesize, long memorysize) {
  int pages;
  pages = memorysize / pagesize;
  char x = mem[(pages + 10) * pagesize];
  printf("x: %c\n", x);
}


x86 assembly (clang, -O0):
<causeSigsegv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x1c(%rbp),%ecx
add    $0xa,%ecx
movslq %ecx,%rcx
imul   -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x1d(%rbp)
lea    0xeb0(%rip),%rdi
movsbl -0x1d(%rbp),%esi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<causeSigsegv>:
mov    %rdx,%rax
mov    %rdx,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1126 <causeSigsegv+0x16>
cqto
idiv   %rsi
jmp    112a <causeSigsegv+0x1a>
xor    %edx,%edx
div    %esi
add    $0xa,%eax
cltq
imul   %rsi,%rax
movsbl (%rdi,%rax,1),%esi
lea    0xec2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"x: %c\0A\00"
define void @causeSigsegv(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = load i64, i64* %6
%10 = load i64, i64* %5
%11 = sdiv i64 %9, %10
%12 = trunc i64 %11 to i32
store i32 %12, i32* %7
%13 = load i8*, i8** %4
%14 = load i32, i32* %7
%15 = add nsw i32 %14, 10
%16 = sext i32 %15 to i64
%17 = load i64, i64* %5
%18 = mul nsw i64 %16, %17
%19 = getelementptr inbounds i8, i8* %13, i64 %18
%20 = load i8, i8* %19
store i8 %20, i8* %8
%21 = load i8, i8* %8
%22 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext %21)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"x: %c\0A\00"
define void @causeSigsegv(i8* nocapture %0, i64 %1, i64 %2) {
%4 = sdiv i64 %2, %1
%5 = shl i64 %4, 32
%6 = add i64 %5, 42949672960
%7 = ashr exact i64 %6, 32
%8 = mul nsw i64 %7, %1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext %10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int get_cycle_count_sweet16(uint16_t opcode) { return -1; }


x86 assembly (clang, -O0):
<get_cycle_count_sweet16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cycle_count_sweet16>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @get_cycle_count_sweet16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @get_cycle_count_sweet16(i32 %0) {
ret i32 -1
}
/* Variables and functions */
char *strchr(char const *, int /*<<< orphan*/);
char *ey_basename(const char *filename) {
  char *p = strchr(filename, 0);
  while (p > filename && p[-1] != '/')
    --p;
  return p;
}


x86 assembly (clang, -O0):
<ey_basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
cmp    -0x8(%rbp),%rcx
mov    %al,-0x11(%rbp)
jbe    114f <ey_basename+0x3f>
mov    -0x10(%rbp),%rax
movsbl -0x1(%rax),%eax
cmp    $0x2f,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115f <ey_basename+0x4f>
jmp    1170 <ey_basename+0x60>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    112b <ey_basename+0x1b>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ey_basename>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rax,%rcx
add    %rbx,%rcx
nop
mov    %rcx,%rax
cmp    %rbx,%rcx
jbe    1132 <ey_basename+0x22>
lea    -0x1(%rax),%rcx
cmpb   $0x2f,-0x1(%rax)
jne    1120 <ey_basename+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ey_basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i32 0)
store i8* %5, i8** %3
br label %6
6: ; preds = %18, %1
%7 = load i8*, i8** %3
%8 = load i8*, i8** %2
%9 = icmp ugt i8* %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 -1
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 47
br label %16
16: ; preds = %10, %6
%17 = phi i1 [ false, %6 ], [ %15, %10 ]
br i1 %17, label %18, label %21
18: ; preds = %16
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 -1
store i8* %20, i8** %3
br label %6
21: ; preds = %16
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @ey_basename(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = getelementptr i8, i8* %0, i64 %2
br label %4
4: ; preds = %7, %1
%5 = phi i8* [ %3, %1 ], [ %8, %7 ]
%6 = icmp ugt i8* %5, %0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = getelementptr inbounds i8, i8* %5, i64 -1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 47
br i1 %10, label %11, label %4
11: ; preds = %4, %7
ret i8* %5
}
void param_unset_file(char *fn) {}


x86 assembly (clang, -O0):
<param_unset_file>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<param_unset_file>:
ret

LLVM IR (-O0):
define void @param_unset_file(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @param_unset_file(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err_template(int, char *);
void errInstSig(int n_error) {
  err_template(n_error, "\nErro ao instalar o sinal\n");
}


x86 assembly (clang, -O0):
<errInstSig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <err_template@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errInstSig>:
lea    0xee9(%rip),%rsi
jmp    1030 <err_template@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"\0AErro ao instalar o sinal\0A\00"
define void @errInstSig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @err_template(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"\0AErro ao instalar o sinal\0A\00"
define void @errInstSig(i32 %0) {
%2 = tail call i32 @err_template(i32 %0, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
scalar_t__ setsid();
int a_daemon() {
  pid_t pid = fork();
  if (pid < 0) {
    return -1;
  }
  if (pid > 0) {
    exit(0);
  }
  if (setsid() < 0) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<a_daemon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <fork@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    115a <a_daemon+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1190 <a_daemon+0x60>
cmpq   $0x0,-0x10(%rbp)
jle    116c <a_daemon+0x3c>
xor    %edi,%edi
call   1040 <exit@plt>
mov    $0x0,%al
call   1030 <setsid@plt>
cmp    $0x0,%rax
jge    1189 <a_daemon+0x59>
movl   $0xffffffff,-0x4(%rbp)
jmp    1190 <a_daemon+0x60>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_daemon>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
test   %rax,%rax
js     114c <a_daemon+0x1c>
jne    1153 <a_daemon+0x23>
xor    %eax,%eax
call   1030 <setsid@plt>
sar    $0x3f,%rax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @a_daemon() {
%1 = alloca i32
%2 = alloca i64
%3 = call i64 (...) @fork()
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 -1, i32* %1
br label %17
7: ; preds = %0
%8 = load i64, i64* %2
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @exit(i32 0)
unreachable
12: ; preds = %7
%13 = call i64 (...) @setsid()
%14 = icmp slt i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 -1, i32* %1
br label %17
16: ; preds = %12
store i32 0, i32* %1
br label %17
17: ; preds = %16, %15, %6
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @a_daemon() {
%1 = tail call i64 (...) @fork()
%2 = icmp slt i64 %1, 0
br i1 %2, label %11, label %3
3: ; preds = %0
%4 = icmp eq i64 %1, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %3
%8 = tail call i64 (...) @setsid()
%9 = ashr i64 %8, 63
%10 = trunc i64 %9 to i32
br label %11
11: ; preds = %7, %0
%12 = phi i32 [ -1, %0 ], [ %10, %7 ]
ret i32 %12
}
unsigned char is_n_bit_set(unsigned char *var, unsigned char num) {
  const unsigned char mask[] = {1, 2, 4, 8, 16, 32, 64, 128};
  return (*var & mask[num]);
}


x86 assembly (clang, -O0):
<is_n_bit_set>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    0xeeb(%rip),%rax
mov    %rax,-0x11(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
movzbl -0x11(%rbp,%rcx,1),%ecx
and    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_n_bit_set>:
mov    %esi,%eax
lea    0xef7(%rip),%rcx
mov    (%rax,%rcx,1),%al
and    (%rdi),%al
ret

LLVM IR (-O0):
@__const.is_n_bit_set.mask = [8 x i8] c"\01\02\04\08\10 @\80"
define zeroext i8 @is_n_bit_set(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca [8 x i8]
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = bitcast [8 x i8]* %5 to i8*
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = load i8, i8* %4
%11 = zext i8 %10 to i64
%12 = getelementptr inbounds [8 x i8], [8 x i8]* %5, i64 0, i64 %11
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = and i32 %9, %14
%16 = trunc i32 %15 to i8
ret i8 %16
}

LLVM IR (-O2):
@__const.is_n_bit_set.mask = [8 x i8] c"\01\02\04\08\10 @\80"
define zeroext i8 @is_n_bit_set(i8* nocapture %0, i8 zeroext %1) {
%3 = load i8, i8* %0
%4 = zext i8 %1 to i64
%5 = getelementptr inbounds [8 x i8], [8 x i8]* @__const.is_n_bit_set.mask, i64 0, i64 %4
%6 = load i8, i8* %5
%7 = and i8 %6, %3
ret i8 %7
}