xunge/DecIR huggingface dataset:
int test_imm_64uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x64 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_64uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x64,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_64uint64_lowword_reg>:
test   $0x64,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_64uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 100
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_64uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 100
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void ff_hevc_put_hevc_bi_epel_h48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_h48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_h48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_h48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_h48_8_sse4() {
ret void
}
/* Variables and functions */
scalar_t__ ConvertBitOrder();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
int main(int argc, char *argv[]) {
  if (ConvertBitOrder() != 0)
    fprintf(stdout, "Little Endian machine.\n");
  else
    fprintf(stdout, "Big Endian machine.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <ConvertBitOrder@plt>
cmp    $0x0,%rax
je     1161 <main+0x41>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
lea    0xea9(%rip),%rsi
call   1030 <fprintf@plt>
jmp    1176 <main+0x56>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
lea    0xea7(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <ConvertBitOrder@plt>
test   %rax,%rax
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rax
lea    0xebe(%rip),%rsi
cmove  %rax,%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [24 x i8] c"Little Endian machine.\0A\00"
@.str.1 = [21 x i8] c"Big Endian machine.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @ConvertBitOrder()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @stdout
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %14
11: ; preds = %2
%12 = load i32, i32* @stdout
%13 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
br label %14
14: ; preds = %11, %8
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [24 x i8] c"Little Endian machine.\0A\00"
@.str.1 = [21 x i8] c"Big Endian machine.\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @ConvertBitOrder()
%4 = icmp eq i64 %3, 0
%5 = load i32, i32* @stdout
%6 = select i1 %4, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0)
%7 = tail call i32 @fprintf(i32 %5, i8* %6)
ret i32 0
}
int _is_whitespace(char c) {
  return (c == ' ' || c == '\t' || c == '\n' || c == '\r' || c == '\f' ||
          c == '\v');
}


x86 assembly (clang, -O0):
<_is_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_is_whitespace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_is_whitespace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_is_whitespace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_is_whitespace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xc,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_is_whitespace+0x71>
movsbl -0x1(%rbp),%eax
cmp    $0xb,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_whitespace>:
cmp    $0x20,%dil
ja     1120 <_is_whitespace+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100003600,%rdx
bt     %rcx,%rdx
jae    1120 <_is_whitespace+0x20>
ret
xor    %eax,%eax
cmp    $0xb,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_is_whitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %26, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br i1 %9, label %26, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %26, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 13
br i1 %17, label %26, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 12
br i1 %21, label %26, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 11
br label %26
26: ; preds = %22, %18, %14, %10, %6, %1
%27 = phi i1 [ true, %18 ], [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %25, %22 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @_is_whitespace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 13, label %5
i8 12, label %5
i8 10, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 11
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_greetings_patched(void) {
  printf("Hello. This is a PATCHED version\n");
}


x86 assembly (clang, -O0):
<print_greetings_patched>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_greetings_patched>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"Hello. This is a PATCHED version\0A\00"
define void @print_greetings_patched() {
%1 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [33 x i8] c"Hello. This is a PATCHED version\00"
define void @print_greetings_patched() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret void
}
void ff_hevc_put_hevc_bi_w_pel_pixels32_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_pel_pixels32_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_pel_pixels32_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_pel_pixels32_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_pel_pixels32_10_sse4() {
ret void
}
void os_program_deinit(void) {}


x86 assembly (clang, -O0):
<os_program_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_program_deinit>:
ret

LLVM IR (-O0):
define void @os_program_deinit() {
ret void
}

LLVM IR (-O2):
define void @os_program_deinit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bla();
int /*<<< orphan*/ foo();
void thread_latch_through_header(void) {
  int i = 0;
  int first = 1;
  do {
    if (first)
      foo();
    first = 0;
    bla();
  } while (i++ < 100);
}


x86 assembly (clang, -O0):
<thread_latch_through_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1147 <thread_latch_through_header+0x27>
mov    $0x0,%al
call   1040 <foo@plt>
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <bla@plt>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x64,%eax
jl     1136 <thread_latch_through_header+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_latch_through_header>:
push   %rbx
xor    %eax,%eax
call   1040 <foo@plt>
xor    %eax,%eax
call   1030 <bla@plt>
mov    $0x64,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <bla@plt>
add    $0xffffffff,%ebx
jne    1140 <thread_latch_through_header+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define void @thread_latch_through_header() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = call i32 (...) @foo()
br label %8
8: ; preds = %6, %3
store i32 0, i32* %2
%9 = call i32 (...) @bla()
br label %10
10: ; preds = %8
%11 = load i32, i32* %1
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1
%13 = icmp slt i32 %11, 100
br i1 %13, label %3, label %14
14: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @thread_latch_through_header() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @bla()
br label %3
3: ; preds = %0, %3
%4 = phi i32 [ 1, %0 ], [ %6, %3 ]
%5 = tail call i32 (...) @bla()
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 101
br i1 %7, label %8, label %3
8: ; preds = %3
ret void
}
double div(double x1) { return x1 / 2; }


x86 assembly (clang, -O0):
<div>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<div>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @div(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 2.000000e+00
ret double %4
}

LLVM IR (-O2):
define double @div(double %0) {
%2 = fmul double %0, 5.000000e-01
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *);
void *realloc(void *, size_t);
void *xrealloc(void *ptr, size_t size) {
  if ((ptr = realloc(ptr, size)) == NULL)
    errx(1, "out of memory");
  return (ptr);
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    115c <xrealloc+0x3c>
mov    $0x1,%edi
lea    0xea9(%rip),%rsi
call   1030 <errx@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113f <xrealloc+0x1f>
lea    0xecb(%rip),%rsi
mov    $0x1,%edi
call   1030 <errx@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"out of memory\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
store i8* %7, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @errx(i32 1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [14 x i8] c"out of memory\00"
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
void *bm(size_t);
void *b2(size_t n) { return bm(n); }


x86 assembly (clang, -O0):
<b2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b2>:
jmp    1030 <bm@plt>

LLVM IR (-O0):
define i8* @b2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @bm(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @b2(i64 %0) {
%2 = tail call i8* @bm(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ put_byte(int, int);
__attribute__((always_)) void patch_NCAS_3_0_2_1791_extra(void) {
  put_byte(0x10079243, 0xEA);
}


x86 assembly (clang, -O0):
<patch_NCAS_3_0_2_1791_extra>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10079243,%edi
mov    $0xea,%esi
call   1030 <put_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<patch_NCAS_3_0_2_1791_extra>:
mov    $0x10079243,%edi
mov    $0xea,%esi
jmp    1030 <put_byte@plt>

LLVM IR (-O0):
define void @patch_NCAS_3_0_2_1791_extra() {
%1 = call i32 @put_byte(i32 268931651, i32 234)
ret void
}

LLVM IR (-O2):
define void @patch_NCAS_3_0_2_1791_extra() {
%1 = tail call i32 @put_byte(i32 268931651, i32 234)
ret void
}
/* Variables and functions */
int atoi(char const *);
int int_arg(const char *str, int def) {
  if (str == NULL)
    return def;
  return atoi(str);
}


x86 assembly (clang, -O0):
<int_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1135 <int_arg+0x25>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <int_arg+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_arg>:
test   %rdi,%rdi
je     111a <int_arg+0xa>
jmp    1030 <atoi@plt>
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @int_arg(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %5
store i32 %9, i32* %3
br label %13
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i32 @atoi(i8* %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @int_arg(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @atoi(i8* %0)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ %1, %2 ]
ret i32 %7
}
/* Variables and functions */
int min(int x, int y) {
  if (x < y)
    return x;
  else
    return y;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int accept4(int, struct sockaddr *, int /*<<< orphan*/ *, int /*<<< orphan*/);
int accept(int fd, struct sockaddr *restrict address,
           socklen_t *restrict length) {
  return accept4(fd, address, length, 0);
}


x86 assembly (clang, -O0):
<accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <accept4@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<accept>:
xor    %ecx,%ecx
jmp    1030 <accept4@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @accept(i32 %0, %struct.sockaddr* noalias %1, i32* noalias %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i32*
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load %struct.sockaddr*, %struct.sockaddr** %5
%9 = load i32*, i32** %6
%10 = call i32 @accept4(i32 %7, %struct.sockaddr* %8, i32* %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @accept(i32 %0, %struct.sockaddr* noalias %1, i32* noalias %2) {
%4 = tail call i32 @accept4(i32 %0, %struct.sockaddr* %1, i32* %2, i32 0)
ret i32 %4
}
/* Variables and functions */
int gfx_get_display_video_downscale_enable();
int redcloud_get_video_vertical_downscale_enable(void) {
  return (gfx_get_display_video_downscale_enable());
}


x86 assembly (clang, -O0):
<redcloud_get_video_vertical_downscale_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gfx_get_display_video_downscale_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<redcloud_get_video_vertical_downscale_enable>:
xor    %eax,%eax
jmp    1030 <gfx_get_display_video_downscale_enable@plt>

LLVM IR (-O0):
define i32 @redcloud_get_video_vertical_downscale_enable() {
%1 = call i32 (...) @gfx_get_display_video_downscale_enable()
ret i32 %1
}

LLVM IR (-O2):
define i32 @redcloud_get_video_vertical_downscale_enable() {
%1 = tail call i32 (...) @gfx_get_display_video_downscale_enable()
ret i32 %1
}
/* Variables and functions */
char *alloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *strsave(char *s) {
  char *p;
  if ((p = alloc(strlen(s) + 1)) != NULL)
    strcpy(p, s);
  return (p);
}


x86 assembly (clang, -O0):
<strsave>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <alloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     116c <strsave+0x3c>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strsave>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <alloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <strsave+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strsave(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @alloc(i64 %6)
store i8* %7, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = load i8*, i8** %2
%12 = call i32 @strcpy(i8* %10, i8* %11)
br label %13
13: ; preds = %9, %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define i8* @strsave(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @alloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %4, i8* %0)
br label %8
8: ; preds = %6, %1
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void show_banner(void) { printf("sChat v0.1\nUsage: ./schat [-flags] peer\n"); }


x86 assembly (clang, -O0):
<show_banner>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_banner>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"sChat v0.1\0AUsage: ./schat [-flags] peer\0A\00"
define void @show_banner() {
%1 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [40 x i8] c"sChat v0.1\0AUsage: ./schat [-flags] peer\00"
define void @show_banner() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
ret void
}
void msg_convert_request_head(struct msg_request_head *request_head) {}


x86 assembly (clang, -O0):
<msg_convert_request_head>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_convert_request_head>:
ret

LLVM IR (-O0):
%struct.msg_request_head = type opaque
define void @msg_convert_request_head(%struct.msg_request_head* %0) {
%2 = alloca %struct.msg_request_head*
store %struct.msg_request_head* %0, %struct.msg_request_head** %2
ret void
}

LLVM IR (-O2):
%struct.msg_request_head = type opaque
define void @msg_convert_request_head(%struct.msg_request_head* nocapture %0) {
ret void
}
unsigned blend_overlay(register unsigned color1, register unsigned color2) {
  return (
      (color2) < 128
          ? ((((color2) << 1) * ((color1))) >> 8)
          : ((((((color2)-128) << 1) ^ 255) * (((color1)) ^ 255) / 255) ^ 255));
}


x86 assembly (clang, -O0):
<blend_overlay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x80,-0x8(%rbp)
jae    112c <blend_overlay+0x2c>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
imul   -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %eax,-0xc(%rbp)
jmp    1159 <blend_overlay+0x59>
mov    -0x8(%rbp),%eax
sub    $0x80,%eax
shl    $0x1,%eax
xor    $0xff,%eax
mov    -0x4(%rbp),%ecx
xor    $0xff,%ecx
imul   %ecx,%eax
mov    $0xff,%ecx
xor    %edx,%edx
div    %ecx
xor    $0xff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blend_overlay>:
mov    %edi,%eax
cmp    $0x7f,%esi
ja     1110 <blend_overlay+0x10>
imul   %esi,%eax
add    %eax,%eax
shr    $0x8,%eax
ret
lea    (%rsi,%rsi,1),%ecx
add    $0xffffff00,%ecx
xor    $0xff,%ecx
xor    $0xff,%eax
imul   %ecx,%eax
mov    $0x80808081,%ecx
imul   %rax,%rcx
shr    $0x27,%rcx
xor    $0xff,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @blend_overlay(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ult i32 %5, 128
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i32, i32* %4
%9 = shl i32 %8, 1
%10 = load i32, i32* %3
%11 = mul i32 %9, %10
%12 = lshr i32 %11, 8
br label %23
13: ; preds = %2
%14 = load i32, i32* %4
%15 = sub i32 %14, 128
%16 = shl i32 %15, 1
%17 = xor i32 %16, 255
%18 = load i32, i32* %3
%19 = xor i32 %18, 255
%20 = mul i32 %17, %19
%21 = udiv i32 %20, 255
%22 = xor i32 %21, 255
br label %23
23: ; preds = %13, %7
%24 = phi i32 [ %12, %7 ], [ %22, %13 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @blend_overlay(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, 128
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = shl i32 %0, 1
%6 = mul i32 %5, %1
%7 = lshr i32 %6, 8
br label %16
8: ; preds = %2
%9 = shl i32 %1, 1
%10 = add i32 %9, -256
%11 = xor i32 %10, 255
%12 = xor i32 %0, 255
%13 = mul i32 %11, %12
%14 = udiv i32 %13, 255
%15 = xor i32 %14, 255
br label %16
16: ; preds = %8, %4
%17 = phi i32 [ %7, %4 ], [ %15, %8 ]
ret i32 %17
}
void cache_flush(char *start, char *end) { __clear_cache(start, end); }


x86 assembly (clang, -O0):
<cache_flush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1130 <__clear_cache>
add    $0x10,%rsp
pop    %rbp
ret
cs nopw 0x0(%rax,%rax,1)
nop

x86 assembly (clang, -O2):
<cache_flush>:
xor    %eax,%eax
jmp    1110 <__clear_cache>
nopw   0x0(%rax,%rax,1)

LLVM IR (-O0):
define void @cache_flush(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @__clear_cache to i32 (i8*, i8*, ...)*)(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @cache_flush(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @__clear_cache to i32 (i8*, i8*, ...)*)(i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printInt(char headerMessage[], int value) {
  printf("%s", headerMessage);
  printf("%d\n", value);
}


x86 assembly (clang, -O0):
<printInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0xc(%rbp),%esi
lea    0xec8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printInt>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed8(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define void @printInt(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i32, i32* %4
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define void @printInt(i8* %0, i32 %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int vlist_def_att(int, int, int, int, char const *, size_t, size_t,
                  int const *);
int vlistDefAttInt(int vlistID, int varID, const char *name, int type, int len,
                   const int *ip) {
  return vlist_def_att(251, type, vlistID, varID, name, (size_t)len,
                       (size_t)len * sizeof(int), ip);
}


x86 assembly (clang, -O0):
<vlistDefAttInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%r8
movslq -0x18(%rbp),%r9
movslq -0x18(%rbp),%r10
shl    $0x2,%r10
mov    -0x20(%rbp),%rax
mov    $0xfb,%edi
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <vlist_def_att@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlistDefAttInt>:
push   %rbx
mov    %r9,%r10
mov    %rdx,%r11
mov    %esi,%eax
mov    %edi,%edx
movslq %r8d,%r9
lea    0x0(,%r9,4),%rbx
mov    $0xfb,%edi
mov    %ecx,%esi
mov    %eax,%ecx
mov    %r11,%r8
push   %r10
push   %rbx
call   1030 <vlist_def_att@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @vlistDefAttInt(i32 %0, i32 %1, i8* %2, i32 %3, i32 %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
store i32 %0, i32* %7
store i32 %1, i32* %8
store i8* %2, i8** %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32* %5, i32** %12
%13 = load i32, i32* %10
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = load i8*, i8** %9
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = mul i64 %20, 4
%22 = load i32*, i32** %12
%23 = call i32 @vlist_def_att(i32 251, i32 %13, i32 %14, i32 %15, i8* %16, i64 %18, i64 %21, i32* %22)
ret i32 %23
}

LLVM IR (-O2):
define i32 @vlistDefAttInt(i32 %0, i32 %1, i8* %2, i32 %3, i32 %4, i32* %5) {
%7 = sext i32 %4 to i64
%8 = shl nsw i64 %7, 2
%9 = tail call i32 @vlist_def_att(i32 251, i32 %3, i32 %0, i32 %1, i8* %2, i64 %7, i64 %8, i32* %5)
ret i32 %9
}
int mstring_a_get_length(char **in) {
  int out;
  for (out = 0; in[out]; out++)
    ;
  return out;
}


x86 assembly (clang, -O0):
<mstring_a_get_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1135 <mstring_a_get_length+0x35>
jmp    1127 <mstring_a_get_length+0x27>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <mstring_a_get_length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mstring_a_get_length>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpq   $0x0,(%rdi)
lea    0x8(%rdi),%rdi
jne    1110 <mstring_a_get_length+0x10>
ret

LLVM IR (-O0):
define i32 @mstring_a_get_length(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %4
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @mstring_a_get_length(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t __bswap32(uint32_t __x) {
  return __x >> 24 | (__x >> 8 & 0xff00) | (__x << 8 & 0xff0000) | __x << 24;
}


x86 assembly (clang, -O0):
<__bswap32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
and    $0xff0000,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__bswap32>:
mov    %edi,%eax
sar    $0x18,%eax
mov    %edi,%ecx
shr    $0x8,%ecx
and    $0xff00,%ecx
mov    %edi,%edx
shl    $0x8,%edx
and    $0xff0000,%edx
shl    $0x18,%edi
or     %edi,%eax
or     %ecx,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @__bswap32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 24
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = and i32 %6, 65280
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = shl i32 %9, 8
%11 = and i32 %10, 16711680
%12 = or i32 %8, %11
%13 = load i32, i32* %2
%14 = shl i32 %13, 24
%15 = or i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @__bswap32(i32 %0) {
%2 = ashr i32 %0, 24
%3 = lshr i32 %0, 8
%4 = and i32 %3, 65280
%5 = shl i32 %0, 8
%6 = and i32 %5, 16711680
%7 = shl i32 %0, 24
%8 = or i32 %7, %2
%9 = or i32 %8, %4
%10 = or i32 %9, %6
ret i32 %10
}
int test(int x) {
  if ((long long)x <= 0x123456789ABCLL)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movslq -0x8(%rbp),%rax
movabs $0x123456789abc,%rcx
cmp    %rcx,%rax
jg     112a <test+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <test+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = icmp sle i64 %5, 20015998343868
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @test(i32 %0) {
ret i32 1
}
int lseek(int file, int ptr, int dir) {}


x86 assembly (clang, -O0):
<lseek>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lseek>:
ret

LLVM IR (-O0):
define i32 @lseek(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @lseek(i32 %0, i32 %1, i32 %2) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ test_felica_push();
int /*<<< orphan*/ test_felica_push_no_label();
int /*<<< orphan*/ test_url_error_returns_zero();
void felica_push_test(void) {
  test_felica_push();
  test_felica_push_no_label();
  test_url_error_returns_zero();
}


x86 assembly (clang, -O0):
<felica_push_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_felica_push@plt>
mov    $0x0,%al
call   1050 <test_felica_push_no_label@plt>
mov    $0x0,%al
call   1030 <test_url_error_returns_zero@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<felica_push_test>:
push   %rax
xor    %eax,%eax
call   1040 <test_felica_push@plt>
xor    %eax,%eax
call   1050 <test_felica_push_no_label@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_url_error_returns_zero@plt>

LLVM IR (-O0):
define void @felica_push_test() {
%1 = call i32 (...) @test_felica_push()
%2 = call i32 (...) @test_felica_push_no_label()
%3 = call i32 (...) @test_url_error_returns_zero()
ret void
}

LLVM IR (-O2):
define void @felica_push_test() {
%1 = tail call i32 (...) @test_felica_push()
%2 = tail call i32 (...) @test_felica_push_no_label()
%3 = tail call i32 (...) @test_url_error_returns_zero()
ret void
}
POS_to_INT(pos, ref_number) long pos;
long *ref_number;
{ *ref_number = pos; }


x86 assembly (clang, -O0):
<POS_to_INT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<POS_to_INT>:
mov    %rdi,(%rsi)
ret

LLVM IR (-O0):
define i32 @POS_to_INT(i64 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64*
store i64 %0, i64* %4
store i64* %1, i64** %5
%6 = load i64, i64* %4
%7 = load i64*, i64** %5
store i64 %6, i64* %7
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @POS_to_INT(i64 %0, i64* nocapture writeonly %1) {
store i64 %0, i64* %1
ret i32 undef
}
/* Variables and functions */
void *calloc(int, size_t);
void *dstring_alloc(void *data, size_t size) { return calloc(1, size); }


x86 assembly (clang, -O0):
<dstring_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dstring_alloc>:
mov    $0x1,%edi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @dstring_alloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i8* @calloc(i32 1, i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @dstring_alloc(i8* nocapture readnone %0, i64 %1) {
%3 = tail call i8* @calloc(i32 1, i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ exite();
void checkCtrlD() { exite(); }


x86 assembly (clang, -O0):
<checkCtrlD>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <exite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkCtrlD>:
xor    %eax,%eax
jmp    1030 <exite@plt>

LLVM IR (-O0):
define void @checkCtrlD() {
%1 = call i32 (...) @exite()
ret void
}

LLVM IR (-O2):
define void @checkCtrlD() {
%1 = tail call i32 (...) @exite()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ rdpmc(int /*<<< orphan*/);
int main(int argc, char **argv) {
  printf("%lld\n", rdpmc(0));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1040 <rdpmc@plt>
mov    %eax,%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <rdpmc@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @rdpmc(i32 0)
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @rdpmc(i32 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
void main() {
  int cel;
  int far;
  scanf("%d", &cel);
  far = cel * 1.8 + 32;
  printf("%d", far);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xebb(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb7(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xee4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
cvtsi2sdl 0xc(%rsp),%xmm0
mulsd  0xeb9(%rip),%xmm0
addsd  0xeb9(%rip),%xmm0
cvttsd2si %xmm0,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = sitofp i32 %4 to double
%6 = call double @llvm.fmuladd.f64(double %5, double 1.800000e+00, double 3.200000e+01)
%7 = fptosi double %6 to i32
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = sitofp i32 %4 to double
%6 = call double @llvm.fmuladd.f64(double %5, double 1.800000e+00, double 3.200000e+01)
%7 = fptosi double %6 to i32
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handler(int signal_number) { printf("Son finished\n"); }


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Son finished\0A\00"
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"Son finished\00"
define void @handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ compute_pi_baseline(int);
int getpid();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
int main() {
  printf("pid: %d\n", getpid());
  sleep(10);
  compute_pi_baseline(50000000);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1060 <sleep@plt>
mov    $0x2faf080,%edi
call   1050 <compute_pi_baseline@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1060 <sleep@plt>
mov    $0x2faf080,%edi
call   1050 <compute_pi_baseline@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"pid: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getpid()
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 @sleep(i32 10)
%5 = call i32 @compute_pi_baseline(i32 50000000)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"pid: %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @sleep(i32 10)
%4 = tail call i32 @compute_pi_baseline(i32 50000000)
ret i32 0
}
void XGetWMSizeHints() {}


x86 assembly (clang, -O0):
<XGetWMSizeHints>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetWMSizeHints>:
ret

LLVM IR (-O0):
define void @XGetWMSizeHints() {
ret void
}

LLVM IR (-O2):
define void @XGetWMSizeHints() {
ret void
}
int test_imm_F8uint8_mem(unsigned char *val) {
  return ((*val) & (0xF8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F8uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xf8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F8uint8_mem>:
cmpb   $0x8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F8uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 248
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F8uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp ult i8 %2, 8
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
double MMtoM(double MM) { return MM / 1000; }


x86 assembly (clang, -O0):
<MMtoM>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMtoM>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @MMtoM(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+03
ret double %4
}

LLVM IR (-O2):
define double @MMtoM(double %0) {
%2 = fdiv double %0, 1.000000e+03
ret double %2
}
void free_vector(v, nl, nh) float *v;
long nh, nl;
{ free((char *)(v + nl - 1)); }


x86 assembly (clang, -O0):
<free_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
add    $0xfffffffffffffffc,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_vector>:
lea    (%rdi,%rsi,4),%rdi
add    $0xfffffffffffffffc,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_vector(float* %0, i64 %1, i64 %2) {
%4 = alloca float*
%5 = alloca i64
%6 = alloca i64
store float* %0, float** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load float*, float** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds float, float* %7, i64 %8
%10 = getelementptr inbounds float, float* %9, i64 -1
%11 = bitcast float* %10 to i8*
ret void
}

LLVM IR (-O2):
define void @free_vector(float* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds float, float* %0, i64 %1
%5 = getelementptr inbounds float, float* %4, i64 -1
%6 = bitcast float* %5 to i8*
tail call void @free(i8* %6)
ret void
}
int test_imm_25uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x25 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_25uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x25,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_25uint64_midword_reg>:
test   $0x250000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_25uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 37
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_25uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 2424832
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ f();
void testTortureExecute(void) { f(); }


x86 assembly (clang, -O0):
<testTortureExecute>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <f@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testTortureExecute>:
xor    %eax,%eax
jmp    1030 <f@plt>

LLVM IR (-O0):
define void @testTortureExecute() {
%1 = call i32 (...) @f()
ret void
}

LLVM IR (-O2):
define void @testTortureExecute() {
%1 = tail call i32 (...) @f()
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ rdx;

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
bool cpuid_misc_enable_XDBitDisable(void) {
  uint64_t rax, rbx, rcx, rdx;
  int leaf = 2147483649;
  cpuid(leaf, &rax, &rbx, &rcx, &rdx);
  if ((((uint64_t)(rdx) &
        ((((uint64_t)1 << (((20)) - ((20)) + 1)) - 1) << ((20)))) >>
       (20)) == 1) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<cpuid_misc_enable_XDBitDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x80000001,-0x18(%rbp)
mov    -0x18(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <cpuid@plt>
mov    -0x14(%rbp),%eax
and    $0x100000,%eax
sar    $0x14,%eax
cmp    $0x1,%eax
jne    1157 <cpuid_misc_enable_XDBitDisable+0x47>
movl   $0x1,-0x4(%rbp)
jmp    115e <cpuid_misc_enable_XDBitDisable+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_misc_enable_XDBitDisable>:
sub    $0x18,%rsp
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
mov    $0x80000001,%edi
call   1030 <cpuid@plt>
mov    0x8(%rsp),%eax
shr    $0x14,%eax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @cpuid_misc_enable_XDBitDisable() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 -2147483647, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @cpuid(i32 %7, i32* %2, i32* %3, i32* %4, i32* %5)
%9 = load i32, i32* %5
%10 = and i32 %9, 1048576
%11 = ashr i32 %10, 20
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, i32* %1
br label %15
14: ; preds = %0
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @cpuid_misc_enable_XDBitDisable() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @cpuid(i32 -2147483647, i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %4
%11 = lshr i32 %10, 20
%12 = and i32 %11, 1
ret i32 %12
}