xunge/DecIR huggingface dataset:
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long clip_mask;
};
typedef TYPE_1__ XGCValues;

/* Variables and functions */
void set_XGCValues_clip_mask(void *_p, unsigned long _v) {
  ((XGCValues *)_p)->clip_mask = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XGCValues_clip_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XGCValues_clip_mask>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XGCValues_clip_mask(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XGCValues_clip_mask(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
void init_fm_queen(int fm[][2]) {
  int i;
  for (i = 0; i < 28; i++) {
    fm[i][0] = -1;
    fm[i][1] = -1;
  }
}


x86 assembly (clang, -O0):
<init_fm_queen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1c,-0xc(%rbp)
jge    1146 <init_fm_queen+0x46>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0xffffffff,(%rax,%rcx,8)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0xffffffff,0x4(%rax,%rcx,8)
ff
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <init_fm_queen+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_fm_queen>:
pcmpeqd %xmm0,%xmm0
movdqu %xmm0,0xd0(%rdi)
movdqu %xmm0,0xc0(%rdi)
movdqu %xmm0,0xb0(%rdi)
movdqu %xmm0,0xa0(%rdi)
movdqu %xmm0,0x90(%rdi)
movdqu %xmm0,0x80(%rdi)
movdqu %xmm0,0x70(%rdi)
movdqu %xmm0,0x60(%rdi)
movdqu %xmm0,0x50(%rdi)
movdqu %xmm0,0x40(%rdi)
movdqu %xmm0,0x30(%rdi)
movdqu %xmm0,0x20(%rdi)
movdqu %xmm0,0x10(%rdi)
movdqu %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @init_fm_queen([2 x i32]* %0) {
%2 = alloca [2 x i32]*
%3 = alloca i32
store [2 x i32]* %0, [2 x i32]** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 28
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load [2 x i32]*, [2 x i32]** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 %10
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %11, i64 0, i64 0
store i32 -1, i32* %12
%13 = load [2 x i32]*, [2 x i32]** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [2 x i32], [2 x i32]* %13, i64 %15
%17 = getelementptr inbounds [2 x i32], [2 x i32]* %16, i64 0, i64 1
store i32 -1, i32* %17
br label %18
18: ; preds = %7
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @init_fm_queen([2 x i32]* nocapture writeonly %0) {
%2 = bitcast [2 x i32]* %0 to i8*
ret void
}
float nvg__quantize(float a, float d) { return ((int)(a / d + 0.5f)) * d; }


x86 assembly (clang, -O0):
<nvg__quantize>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
movss  0xee0(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
cvtsi2ss %eax,%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvg__quantize>:
divss  %xmm1,%xmm0
addss  0xef4(%rip),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @nvg__quantize(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fdiv float %5, %6
%8 = fadd float %7, 5.000000e-01
%9 = fptosi float %8 to i32
%10 = sitofp i32 %9 to float
%11 = load float, float* %4
%12 = fmul float %10, %11
ret float %12
}

LLVM IR (-O2):
define float @nvg__quantize(float %0, float %1) {
%3 = fdiv float %0, %1
%4 = fadd float %3, 5.000000e-01
%5 = fptosi float %4 to i32
%6 = sitofp i32 %5 to float
%7 = fmul float %6, %1
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(float *, float const *, int);
void mlTriangleCopy(const float *a, float *result) {
  memcpy(result, a, 3 * 3 * sizeof(float));
}


x86 assembly (clang, -O0):
<mlTriangleCopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x24,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlTriangleCopy>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
mov    $0x24,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @mlTriangleCopy(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = load float*, float** %3
%7 = call i32 @memcpy(float* %5, float* %6, i32 36)
ret void
}

LLVM IR (-O2):
define void @mlTriangleCopy(float* %0, float* %1) {
%3 = tail call i32 @memcpy(float* %1, float* %0, i32 36)
ret void
}
int getBitNum(void) { return 8; }


x86 assembly (clang, -O0):
<getBitNum>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBitNum>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @getBitNum() {
ret i32 8
}

LLVM IR (-O2):
define i32 @getBitNum() {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
void doexx(void) { ol("exx"); }


x86 assembly (clang, -O0):
<doexx>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <ol@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doexx>:
lea    0xee9(%rip),%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"exx\00"
define void @doexx() {
%1 = call i32 @ol(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"exx\00"
define void @doexx() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
rnd(range) int range;
{
  unsigned int rand();
  return rand() % range;
}


x86 assembly (clang, -O0):
<rnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
xor    %edx,%edx
divl   -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
xor    %edx,%edx
div    %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rnd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = urem i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @rnd(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = urem i32 %2, %0
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ __setCHRBank3High(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ m22_SetChrROMBank3();
void m22_setParamsCXX3(uint16_t addr, uint8_t val) {
  __setCHRBank3High(addr, val);
  m22_SetChrROMBank3();
}


x86 assembly (clang, -O0):
<m22_setParamsCXX3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__setCHRBank3High@plt>
mov    $0x0,%al
call   1040 <m22_SetChrROMBank3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m22_setParamsCXX3>:
push   %rax
call   1030 <__setCHRBank3High@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <m22_SetChrROMBank3@plt>

LLVM IR (-O0):
define void @m22_setParamsCXX3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__setCHRBank3High(i32 %5, i32 %6)
%8 = call i32 (...) @m22_SetChrROMBank3()
ret void
}

LLVM IR (-O2):
define void @m22_setParamsCXX3(i32 %0, i32 %1) {
%3 = tail call i32 @__setCHRBank3High(i32 %0, i32 %1)
%4 = tail call i32 (...) @m22_SetChrROMBank3()
ret void
}
void UYVYToUVRow_AVX2() {}


x86 assembly (clang, -O0):
<UYVYToUVRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UYVYToUVRow_AVX2>:
ret

LLVM IR (-O0):
define void @UYVYToUVRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @UYVYToUVRow_AVX2() {
ret void
}
int __attribute__((target("default"))) fwd_decl_avx(void) { return 2; }


x86 assembly (clang, -O0):
<fwd_decl_avx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwd_decl_avx>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @fwd_decl_avx() {
ret i32 2
}

LLVM IR (-O2):
define i32 @fwd_decl_avx() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, int);
void __attribute__((regparm(3))) memcpy_7(void *dest, void *src) {
  memcpy(dest, src, 7);
}


x86 assembly (clang, -O0):
<memcpy_7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x7,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_7>:
mov    $0x7,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @memcpy_7(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 7)
ret void
}

LLVM IR (-O2):
define void @memcpy_7(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 7)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t log_sense_param_flags(uint8_t *param) { return param[2]; }


x86 assembly (clang, -O0):
<log_sense_param_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_sense_param_flags>:
mov    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @log_sense_param_flags(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @log_sense_param_flags(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int find_cycle(int);
int max_cycle(int lim) {
  int n = lim;
  int i = lim;
  int res = 0;
  while (res < i) {
    int tmp = find_cycle(i);
    if (tmp > res) {
      res = tmp;
      n = i;
    }
    i--;
  }
  return n;
}


x86 assembly (clang, -O0):
<max_cycle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    116b <max_cycle+0x5b>
mov    -0xc(%rbp),%edi
call   1030 <find_cycle@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    115d <max_cycle+0x4d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    112e <max_cycle+0x1e>
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_cycle>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
test   %edi,%edi
jle    1137 <max_cycle+0x27>
xor    %ebx,%ebx
mov    %r14d,%ebp
mov    %ebp,%edi
call   1030 <find_cycle@plt>
cmp    %ebx,%eax
cmovg  %eax,%ebx
cmovg  %ebp,%r14d
add    $0xffffffff,%ebp
cmp    %ebp,%ebx
jl     1120 <max_cycle+0x10>
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @max_cycle(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
store i32 %7, i32* %3
%8 = load i32, i32* %2
store i32 %8, i32* %4
store i32 0, i32* %5
br label %9
9: ; preds = %22, %1
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = load i32, i32* %4
%15 = call i32 @find_cycle(i32 %14)
store i32 %15, i32* %6
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = icmp sgt i32 %16, %17
br i1 %18, label %19, label %22
19: ; preds = %13
%20 = load i32, i32* %6
store i32 %20, i32* %5
%21 = load i32, i32* %4
store i32 %21, i32* %3
br label %22
22: ; preds = %19, %13
%23 = load i32, i32* %4
%24 = add nsw i32 %23, -1
store i32 %24, i32* %4
br label %9
25: ; preds = %9
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @max_cycle(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %13
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = phi i32 [ %11, %3 ], [ %0, %1 ]
%7 = tail call i32 @find_cycle(i32 %6)
%8 = icmp sgt i32 %7, %5
%9 = select i1 %8, i32 %7, i32 %5
%10 = select i1 %8, i32 %6, i32 %4
%11 = add nsw i32 %6, -1
%12 = icmp slt i32 %9, %11
br i1 %12, label %3, label %13
13: ; preds = %3, %1
%14 = phi i32 [ %0, %1 ], [ %10, %3 ]
ret i32 %14
}
int getSize() { return 5 * 4; }


x86 assembly (clang, -O0):
<getSize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSize>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @getSize() {
ret i32 20
}

LLVM IR (-O2):
define i32 @getSize() {
ret i32 20
}
void NullFilledRectangle(struct ADrawTag *ctx __attribute__((unused)),
                         unsigned int x1 __attribute__((unused)),
                         unsigned int y1 __attribute__((unused)),
                         unsigned int x2 __attribute__((unused)),
                         unsigned int y2 __attribute__((unused))) {}


x86 assembly (clang, -O0):
<NullFilledRectangle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NullFilledRectangle>:
ret

LLVM IR (-O0):
%struct.ADrawTag = type opaque
define void @NullFilledRectangle(%struct.ADrawTag* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.ADrawTag*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.ADrawTag* %0, %struct.ADrawTag** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
ret void
}

LLVM IR (-O2):
%struct.ADrawTag = type opaque
define void @NullFilledRectangle(%struct.ADrawTag* nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4) {
ret void
}
int ioprio_prio_data(int value) { return value & ((1 << 13) - 1); }


x86 assembly (clang, -O0):
<ioprio_prio_data>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1fff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioprio_prio_data>:
mov    %edi,%eax
and    $0x1fff,%eax
ret

LLVM IR (-O0):
define i32 @ioprio_prio_data(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 8191
ret i32 %4
}

LLVM IR (-O2):
define i32 @ioprio_prio_data(i32 %0) {
%2 = and i32 %0, 8191
ret i32 %2
}
/* Variables and functions */
int try_parse_int_imp(char *, void *, int, int);
bool try_parse_long(char *str, long *value_ptr) {
  return try_parse_int_imp(str, (void *)value_ptr, sizeof(long), true);
}


x86 assembly (clang, -O0):
<try_parse_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x8,%edx
mov    $0x1,%ecx
call   1030 <try_parse_int_imp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<try_parse_long>:
mov    $0x8,%edx
mov    $0x1,%ecx
jmp    1030 <try_parse_int_imp@plt>

LLVM IR (-O0):
define i32 @try_parse_long(i8* %0, i64* %1) {
%3 = alloca i8*
%4 = alloca i64*
store i8* %0, i8** %3
store i64* %1, i64** %4
%5 = load i8*, i8** %3
%6 = load i64*, i64** %4
%7 = bitcast i64* %6 to i8*
%8 = call i32 @try_parse_int_imp(i8* %5, i8* %7, i32 8, i32 1)
ret i32 %8
}

LLVM IR (-O2):
define i32 @try_parse_long(i8* %0, i64* %1) {
%3 = bitcast i64* %1 to i8*
%4 = tail call i32 @try_parse_int_imp(i8* %0, i8* %3, i32 8, i32 1)
ret i32 %4
}
void bar_ldouble_t(long double *x) { *x = __real foo_ldouble_t(5); }


x86 assembly (clang, -O0):
<bar_ldouble_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    $0x5,%edi
call   1030 <foo_ldouble_t@plt>
mov    %eax,-0xc(%rbp)
fildl  -0xc(%rbp)
mov    -0x8(%rbp),%rax
fstpt  (%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar_ldouble_t>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    $0x5,%edi
xor    %eax,%eax
call   1030 <foo_ldouble_t@plt>
mov    %eax,0xc(%rsp)
fildl  0xc(%rsp)
fstpt  (%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @bar_ldouble_t(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @foo_ldouble_t to i32 (i32, ...)*)(i32 5)
%4 = sitofp i32 %3 to x86_fp80
%5 = load x86_fp80*, x86_fp80** %2
store x86_fp80 %4, x86_fp80* %5
ret void
}

LLVM IR (-O2):
define void @bar_ldouble_t(x86_fp80* nocapture writeonly %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @foo_ldouble_t to i32 (i32, ...)*)(i32 5)
%3 = sitofp i32 %2 to x86_fp80
store x86_fp80 %3, x86_fp80* %0
ret void
}
__attribute__((__weak__, __always___)) char *softboundcets_stpcpy(char *dest,
                                                                  char *src) {
  void *ret_ptr = stpcpy(dest, src);
  __softboundcets_propagate_metadata_shadow_stack_from(1, 0);
  return ret_ptr;
}


x86 assembly (clang, -O0):
<softboundcets_stpcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stpcpy@plt>
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1040 <__softboundcets_propagate_metadata_shadow_stack_from@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_stpcpy>:
push   %rbx
call   1030 <stpcpy@plt>
mov    %rax,%rbx
mov    $0x1,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1040 <__softboundcets_propagate_metadata_shadow_stack_from@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define weak i8* @softboundcets_stpcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i8* @stpcpy(i8* %6, i8* %7)
store i8* %8, i8** %5
%9 = call i32 (i32, i32, ...) bitcast (i32 (...)* @__softboundcets_propagate_metadata_shadow_stack_from to i32 (i32, i32, ...)*)(i32 1, i32 0)
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define weak i8* @softboundcets_stpcpy(i8* %0, i8* %1) {
%3 = tail call i8* @stpcpy(i8* %0, i8* %1)
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @__softboundcets_propagate_metadata_shadow_stack_from to i32 (i32, i32, ...)*)(i32 1, i32 0)
ret i8* %3
}
/* Variables and functions */
const char *rstrchr(const char *str, int max, char c) {
  while (max) {
    if (str[max] == c) {
      return &str[max];
    }
    max--;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<rstrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %al,-0x15(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1154 <rstrchr+0x54>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x15(%rbp),%ecx
cmp    %ecx,%eax
jne    1146 <rstrchr+0x46>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    115c <rstrchr+0x5c>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1110 <rstrchr+0x10>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rstrchr>:
test   %esi,%esi
je     111d <rstrchr+0x1d>
mov    %rdi,%rax
movslq %esi,%rcx
add    %rcx,%rax
nopl   (%rax)
cmp    %dl,(%rax)
je     111f <rstrchr+0x1f>
add    $0xffffffffffffffff,%rax
add    $0xffffffff,%esi
jne    1110 <rstrchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @rstrchr(i8* %0, i32 %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8 %2, i8* %7
br label %8
8: ; preds = %26, %3
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %29
11: ; preds = %8
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i8, i8* %7
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %17, %19
br i1 %20, label %21, label %26
21: ; preds = %11
%22 = load i8*, i8** %5
%23 = load i32, i32* %6
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %22, i64 %24
store i8* %25, i8** %4
br label %30
26: ; preds = %11
%27 = load i32, i32* %6
%28 = add nsw i32 %27, -1
store i32 %28, i32* %6
br label %8
29: ; preds = %8
store i8* null, i8** %4
br label %30
30: ; preds = %29, %21
%31 = load i8*, i8** %4
ret i8* %31
}

LLVM IR (-O2):
define i8* @rstrchr(i8* %0, i32 %1, i8 signext %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %18, label %5
5: ; preds = %3
%6 = sext i32 %1 to i64
br label %10
7: ; preds = %10
%8 = trunc i64 %15 to i32
%9 = icmp eq i32 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %5, %7
%11 = phi i64 [ %6, %5 ], [ %15, %7 ]
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, %2
%15 = add nsw i64 %11, -1
br i1 %14, label %16, label %7
16: ; preds = %10
%17 = getelementptr inbounds i8, i8* %0, i64 %11
br label %18
18: ; preds = %7, %16, %3
%19 = phi i8* [ null, %3 ], [ %17, %16 ], [ null, %7 ]
ret i8* %19
}
long sys_reboot(int magic1, int magic2, int cmd, void *arg) {
  switch (cmd) {
  case 0x89ABCDEF:
    break;
  case 0x00000000:
    break;
  case 0xCDEF0123:
    break;
  case 0x4321FEDC:
    break;
  case 0xA1B2C3D4:
    break;
  default:
    break;
  };
  return 0;
}


x86 assembly (clang, -O0):
<sys_reboot>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
sub    $0x89abcdef,%eax
je     1170 <sys_reboot+0x70>
jmp    1127 <sys_reboot+0x27>
mov    -0x1c(%rbp),%eax
sub    $0xa1b2c3d4,%eax
je     1184 <sys_reboot+0x84>
jmp    113a <sys_reboot+0x3a>
mov    -0x1c(%rbp),%eax
sub    $0xcdef0123,%eax
je     117a <sys_reboot+0x7a>
jmp    114d <sys_reboot+0x4d>
mov    -0x1c(%rbp),%eax
test   %eax,%eax
je     1175 <sys_reboot+0x75>
jmp    115d <sys_reboot+0x5d>
mov    -0x1c(%rbp),%eax
sub    $0x4321fedc,%eax
je     117f <sys_reboot+0x7f>
jmp    1189 <sys_reboot+0x89>
jmp    118e <sys_reboot+0x8e>
jmp    118e <sys_reboot+0x8e>
jmp    118e <sys_reboot+0x8e>
jmp    118e <sys_reboot+0x8e>
jmp    118e <sys_reboot+0x8e>
jmp    118e <sys_reboot+0x8e>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_reboot>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @sys_reboot(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %7
switch i32 %9, label %15 [
i32 -1985229329, label %10
i32 0, label %11
i32 -839974621, label %12
i32 1126301404, label %13
i32 -1582119980, label %14
]
10: ; preds = %4
br label %16
11: ; preds = %4
br label %16
12: ; preds = %4
br label %16
13: ; preds = %4
br label %16
14: ; preds = %4
br label %16
15: ; preds = %4
br label %16
16: ; preds = %15, %14, %13, %12, %11, %10
ret i64 0
}

LLVM IR (-O2):
define i64 @sys_reboot(i32 %0, i32 %1, i32 %2, i8* nocapture readnone %3) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xec() {
  Assert_real((islower(236) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1185, ("islower should be 0 for 0xec"));
}


x86 assembly (clang, -O0):
<t_islower_0xec>:
push   %rbp
mov    %rsp,%rbp
mov    $0xec,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4a1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xec>:
push   %rax
mov    $0xec,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4a1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xec\00"
define void @t_islower_0xec() {
%1 = call i64 @islower(i32 236)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1185, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xec\00"
define void @t_islower_0xec() {
%1 = tail call i64 @islower(i32 236)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1185, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xba() {
  Assert_real((isalnum(186) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              935, ("isalnum should be 0 for 0xba"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xba>:
push   %rbp
mov    %rsp,%rbp
mov    $0xba,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3a7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xba>:
push   %rax
mov    $0xba,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3a7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xba\00"
define void @t_isalnum_0xba() {
%1 = call i64 @isalnum(i32 186)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 935, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xba\00"
define void @t_isalnum_0xba() {
%1 = tail call i64 @isalnum(i32 186)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 935, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int cmp_chr(const char item1, const char item2) { return item1 - item2; }


x86 assembly (clang, -O0):
<cmp_chr>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_chr>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @cmp_chr(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @cmp_chr(i8 signext %0, i8 signext %1) {
%3 = sext i8 %0 to i32
%4 = sext i8 %1 to i32
%5 = sub nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ __ensure_init_started();
void __attribute__((constructor)) __ipc_init_ctor() { __ensure_init_started(); }


x86 assembly (clang, -O0):
<__ipc_init_ctor>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__ensure_init_started@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ipc_init_ctor>:
xor    %eax,%eax
jmp    1030 <__ensure_init_started@plt>

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__ipc_init_ctor, i8* null }]
define void @__ipc_init_ctor() {
%1 = call i32 (...) @__ensure_init_started()
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__ipc_init_ctor, i8* null }]
define void @__ipc_init_ctor() {
%1 = tail call i32 (...) @__ensure_init_started()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void json_print_level(int level, void *out) {
  while (level-- > 0)
    printf("  ");
}


x86 assembly (clang, -O0):
<json_print_level>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    1144 <json_print_level+0x34>
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
jmp    111f <json_print_level+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_print_level>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1140 <json_print_level+0x30>
mov    %edi,%ebx
add    $0x1,%ebx
lea    0xedc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <json_print_level+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c" \00"
define void @json_print_level(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, -1
store i32 %7, i32* %3
%8 = icmp sgt i32 %6, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %5
11: ; preds = %5
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c" \00"
define void @json_print_level(i32 %0, i8* nocapture readnone %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = add nsw i32 %5, -1
%7 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%8 = icmp ugt i32 %5, 1
br i1 %8, label %4, label %9
9: ; preds = %4, %2
ret void
}
int next_any(int row[4], int start) {
  for (int i = start; i < 4; i++)
    if (row[i] > 0)
      return i;
  return -1;
}


x86 assembly (clang, -O0):
<next_any>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
cmpl   $0x4,-0x18(%rbp)
jge    114b <next_any+0x4b>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jle    1138 <next_any+0x38>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <next_any+0x52>
jmp    113d <next_any+0x3d>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1111 <next_any+0x11>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_any>:
mov    $0xffffffff,%eax
cmp    $0x3,%esi
jg     1131 <next_any+0x31>
movslq %esi,%rcx
lea    (%rdi,%rcx,4),%rcx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmpl   $0x0,(%rcx)
jg     1132 <next_any+0x32>
add    $0x1,%esi
add    $0x4,%rcx
cmp    $0x4,%esi
jne    1120 <next_any+0x20>
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @next_any(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
store i32 %7, i32* %6
br label %8
8: ; preds = %21, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 4
br i1 %10, label %11, label %24
11: ; preds = %8
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %11
%19 = load i32, i32* %6
store i32 %19, i32* %3
br label %25
20: ; preds = %11
br label %21
21: ; preds = %20
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 1
store i32 %23, i32* %6
br label %8
24: ; preds = %8
store i32 -1, i32* %3
br label %25
25: ; preds = %24, %18
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @next_any(i32* nocapture %0, i32 %1) {
%3 = icmp slt i32 %1, 4
br i1 %3, label %4, label %17
4: ; preds = %2
%5 = sext i32 %1 to i64
br label %6
6: ; preds = %4, %11
%7 = phi i64 [ %5, %4 ], [ %12, %11 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = icmp sgt i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %6
%12 = add nsw i64 %7, 1
%13 = trunc i64 %12 to i32
%14 = icmp eq i32 %13, 4
br i1 %14, label %17, label %6
15: ; preds = %6
%16 = trunc i64 %7 to i32
br label %17
17: ; preds = %11, %15, %2
%18 = phi i32 [ -1, %2 ], [ %16, %15 ], [ -1, %11 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ yyparse();
int main(int argc, char *argv[]) {
  yyparse();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <yyparse@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <yyparse@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @yyparse()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @yyparse()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ board_dbg(char const *const, unsigned int);
void write_handler(const char *const buf, unsigned int size, void *param) {
  board_dbg(buf, size);
}


x86 assembly (clang, -O0):
<write_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <board_dbg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_handler>:
jmp    1030 <board_dbg@plt>

LLVM IR (-O0):
define void @write_handler(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i32 @board_dbg(i8* %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @write_handler(i8* %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @board_dbg(i8* %0, i32 %1)
ret void
}
struct sb *vfs_sb(struct sb *sb) {
  return sb;
}


x86 assembly (clang, -O0):
<vfs_sb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfs_sb>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.sb = type opaque
define %struct.sb* @vfs_sb(%struct.sb* %0) {
%2 = alloca %struct.sb*
store %struct.sb* %0, %struct.sb** %2
%3 = load %struct.sb*, %struct.sb** %2
ret %struct.sb* %3
}

LLVM IR (-O2):
%struct.sb = type opaque
define %struct.sb* @vfs_sb(%struct.sb* readnone returned %0) {
ret %struct.sb* %0
}
/* Variables and functions */
int /*<<< orphan*/ escape(char *, char *);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ unescape(char *, char *);
int main(void) {
  char s1[128];
  char s2[128];
  escape("Hello\tworld\n!", s1);
  puts(s1);
  unescape(s1, s2);
  puts(s2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x90(%rbp),%rsi
lea    0xeb0(%rip),%rdi
call   1050 <escape@plt>
lea    -0x90(%rbp),%rdi
call   1030 <puts@plt>
lea    -0x90(%rbp),%rdi
lea    -0x110(%rbp),%rsi
call   1040 <unescape@plt>
lea    -0x110(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x108,%rsp
lea    0xebf(%rip),%rdi
lea    0x80(%rsp),%rbx
mov    %rbx,%rsi
call   1050 <escape@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rsp,%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <unescape@plt>
mov    %r14,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello\09world\0A!\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [128 x i8]
%3 = alloca [128 x i8]
store i32 0, i32* %1
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%5 = call i32 @escape(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%7 = call i32 @puts(i8* %6)
%8 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%9 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%10 = call i32 @unescape(i8* %8, i8* %9)
%11 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%12 = call i32 @puts(i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello\09world\0A!\00"
define i32 @main() {
%1 = alloca [128 x i8]
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%5 = call i32 @escape(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %3)
%6 = call i32 @puts(i8* %3)
%7 = call i32 @unescape(i8* %3, i8* %4)
%8 = call i32 @puts(i8* %4)
ret i32 0
}
/* Variables and functions */
double fabs(double);
int dequals_mag(double a, double b, double thresh) {
  return (fabs(a - b) < thresh);
}


x86 assembly (clang, -O0):
<dequals_mag>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movaps 0xedc(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dequals_mag>:
subsd  %xmm1,%xmm0
andpd  0xef4(%rip),%xmm0
xor    %eax,%eax
ucomisd %xmm0,%xmm2
seta   %al
ret

LLVM IR (-O0):
define i32 @dequals_mag(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fsub double %7, %8
%10 = call double @llvm.fabs.f64(double %9)
%11 = load double, double* %6
%12 = fcmp olt double %10, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @dequals_mag(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = tail call double @llvm.fabs.f64(double %4)
%6 = fcmp olt double %5, %2
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ execvp(char *, char **);
main(int argc, char *argv[]) { execvp(argv[1], argv + 1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rsi
add    $0x8,%rsi
call   1030 <execvp@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
add    $0x8,%rsi
call   1030 <execvp@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 1
%7 = load i8*, i8** %6
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = call i32 @execvp(i8* %7, i8** %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @execvp(i8* %4, i8** %3)
ret i32 0
}
/* Variables and functions */
scalar_t__ calloc(int, int);
char **ll_new_list(int length) {
  if (length < 0)
    length = 0;
  return (char **)calloc(length + 1, sizeof(char *));
}


x86 assembly (clang, -O0):
<ll_new_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    112c <ll_new_list+0x1c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ll_new_list>:
xor    %eax,%eax
test   %edi,%edi
cmovs  %eax,%edi
add    $0x1,%edi
mov    $0x8,%esi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8** @ll_new_list(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 0, i32* %2
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
%9 = call i64 @calloc(i32 %8, i32 8)
%10 = inttoptr i64 %9 to i8**
ret i8** %10
}

LLVM IR (-O2):
define i8** @ll_new_list(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = select i1 %2, i32 %0, i32 0
%4 = add nuw nsw i32 %3, 1
%5 = tail call i64 @calloc(i32 %4, i32 8)
%6 = inttoptr i64 %5 to i8**
ret i8** %6
}
/* Variables and functions */
int minCut(char *);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  printf("%d\n", minCut(argv[1]));
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <minCut@plt>
mov    %eax,%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <minCut@plt>
lea    0xecf(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @minCut(i8* %8)
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @minCut(i8* %4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void grpcsharp_request_call_context_host() {
  fprintf(stderr, "Should never reach here");
  abort();
}


x86 assembly (clang, -O0):
<grpcsharp_request_call_context_host>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<grpcsharp_request_call_context_host>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_request_call_context_host() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_request_call_context_host() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
int epidx_n(int idx) { return idx >> 1; }


x86 assembly (clang, -O0):
<epidx_n>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<epidx_n>:
mov    %edi,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @epidx_n(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @epidx_n(i32 %0) {
%2 = ashr i32 %0, 1
ret i32 %2
}
void square_and_cube(int *square, int *cube, const int n) {
  *square = n * n;
  *cube = n * n * n;
}


x86 assembly (clang, -O0):
<square_and_cube>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
imul   -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
imul   -0x14(%rbp),%ecx
imul   -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<square_and_cube>:
mov    %edx,%eax
imul   %edx,%eax
mov    %eax,(%rdi)
imul   %edx,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @square_and_cube(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %6
%9 = mul nsw i32 %7, %8
%10 = load i32*, i32** %4
store i32 %9, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %6
%13 = mul nsw i32 %11, %12
%14 = load i32, i32* %6
%15 = mul nsw i32 %13, %14
%16 = load i32*, i32** %5
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @square_and_cube(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i32 %2) {
%4 = mul nsw i32 %2, %2
store i32 %4, i32* %0
%5 = mul nsw i32 %4, %2
store i32 %5, i32* %1
ret void
}