xunge/DecIR huggingface dataset:
/* Variables and functions */
char *strchr(const char *s, int c) {
  while (*s != c && *s != '\0')
    s++;
  if (*s == '\0')
    return NULL;
  return (char *)s;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    -0x14(%rbp),%ecx
mov    %al,-0x15(%rbp)
je     1130 <strchr+0x30>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1140 <strchr+0x40>
jmp    1151 <strchr+0x51>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchr+0xb>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    116e <strchr+0x6e>
movq   $0x0,-0x8(%rbp)
jmp    1176 <strchr+0x76>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movsbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %ecx,%ecx
je     1120 <strchr+0x20>
cmp    %esi,%ecx
jne    1110 <strchr+0x10>
xor    %edx,%edx
test   %cl,%cl
cmove  %rdx,%rax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = icmp ne i32 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %6
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br label %17
17: ; preds = %12, %6
%18 = phi i1 [ false, %6 ], [ %16, %12 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %17
%23 = load i8*, i8** %4
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %22
store i8* null, i8** %3
br label %30
28: ; preds = %22
%29 = load i8*, i8** %4
store i8* %29, i8** %3
br label %30
30: ; preds = %28, %27
%31 = load i8*, i8** %3
ret i8* %31
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, %1
%8 = icmp eq i8 %5, 0
%9 = or i1 %8, %7
%10 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %9, label %11, label %3
11: ; preds = %3
%12 = select i1 %8, i8* null, i8* %4
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ getenv(char *);
int TargetEnableVerySlowTests(void) {
  return !!getenv("ENABLE_VERY_SLOW_TESTS");
}


x86 assembly (clang, -O0):
<TargetEnableVerySlowTests>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <getenv@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TargetEnableVerySlowTests>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <getenv@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"ENABLE_VERY_SLOW_TESTS\00"
define i32 @TargetEnableVerySlowTests() {
%1 = call i32 @getenv(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%2 = icmp ne i32 %1, 0
%3 = xor i1 %2, true
%4 = xor i1 %3, true
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
@.str = [23 x i8] c"ENABLE_VERY_SLOW_TESTS\00"
define i32 @TargetEnableVerySlowTests() {
%1 = tail call i32 @getenv(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%2 = icmp ne i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
const char *font_renderer_get_default_font(void) { return ""; }


x86 assembly (clang, -O0):
<font_renderer_get_default_font>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<font_renderer_get_default_font>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @font_renderer_get_default_font() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @font_renderer_get_default_font() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
char *convStrDup(char *string) { return NULL; }


x86 assembly (clang, -O0):
<convStrDup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convStrDup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @convStrDup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @convStrDup(i8* nocapture readnone %0) {
ret i8* null
}
int okn_mtx4_init(struct okn_mtx4 *mtx) {}


x86 assembly (clang, -O0):
<okn_mtx4_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<okn_mtx4_init>:
ret

LLVM IR (-O0):
%struct.okn_mtx4 = type opaque
define i32 @okn_mtx4_init(%struct.okn_mtx4* %0) {
%2 = alloca i32
%3 = alloca %struct.okn_mtx4*
store %struct.okn_mtx4* %0, %struct.okn_mtx4** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
%struct.okn_mtx4 = type opaque
define i32 @okn_mtx4_init(%struct.okn_mtx4* nocapture readnone %0) {
ret i32 undef
}
int main() {
  int n = 0;
  while (1000 > n) {
    n++;
  }
  return n;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x3e8,%eax
cmp    -0x8(%rbp),%eax
jle    112e <main+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3e8,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp sgt i32 1000, %4
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1000
}
char _default_storage_is_readonly() { return 1; }


x86 assembly (clang, -O0):
<_default_storage_is_readonly>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_default_storage_is_readonly>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @_default_storage_is_readonly() {
ret i8 1
}

LLVM IR (-O2):
define signext i8 @_default_storage_is_readonly() {
ret i8 1
}
/* Variables and functions */
int _inport(int);
int /*<<< orphan*/ _outport(int, int);
void pause() { _outport(0x61, _inport(0x61) & 0xFC); }


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
call   1040 <_inport@plt>
mov    %eax,%esi
and    $0xfc,%esi
mov    $0x61,%edi
call   1030 <_outport@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
push   %rax
mov    $0x61,%edi
call   1040 <_inport@plt>
and    $0xfc,%eax
mov    $0x61,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <_outport@plt>

LLVM IR (-O0):
define void @pause() {
%1 = call i32 @_inport(i32 97)
%2 = and i32 %1, 252
%3 = call i32 @_outport(i32 97, i32 %2)
ret void
}

LLVM IR (-O2):
define void @pause() {
%1 = tail call i32 @_inport(i32 97)
%2 = and i32 %1, 252
%3 = tail call i32 @_outport(i32 97, i32 %2)
ret void
}
/* Variables and functions */
double log10(int);
bool isPowerOfThree6(int n) {
  double ret = log10(n) / log10(3);
  return ret == (int)ret;
}


x86 assembly (clang, -O0):
<isPowerOfThree6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <log10@plt>
movsd  %xmm0,-0x18(%rbp)
mov    $0x3,%edi
call   1030 <log10@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPowerOfThree6>:
sub    $0x18,%rsp
call   1030 <log10@plt>
movapd %xmm0,(%rsp)
mov    $0x3,%edi
call   1030 <log10@plt>
movapd (%rsp),%xmm1
divsd  %xmm0,%xmm1
cvttpd2dq %xmm1,%xmm0
cvtdq2pd %xmm0,%xmm0
cmpeqsd %xmm1,%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @isPowerOfThree6(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call double @log10(i32 %4)
%6 = call double @log10(i32 3)
%7 = fdiv double %5, %6
store double %7, double* %3
%8 = load double, double* %3
%9 = load double, double* %3
%10 = fptosi double %9 to i32
%11 = sitofp i32 %10 to double
%12 = fcmp oeq double %8, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @isPowerOfThree6(i32 %0) {
%2 = tail call double @log10(i32 %0)
%3 = tail call double @log10(i32 3)
%4 = fdiv double %2, %3
%5 = fptosi double %4 to i32
%6 = sitofp i32 %5 to double
%7 = fcmp oeq double %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ isprint(int);
int nc_charlen(int ch) {
  int l = 1;
  switch (ch) {
  case '\r':
    l++;
    break;
  case '\t':
    break;
  default:
    if (!isprint(ch))
      l++;
  }
  return l;
}


x86 assembly (clang, -O0):
<nc_charlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x9,%eax
je     1155 <nc_charlen+0x45>
jmp    1136 <nc_charlen+0x26>
mov    -0xc(%rbp),%eax
sub    $0xd,%eax
jne    115a <nc_charlen+0x4a>
jmp    1147 <nc_charlen+0x37>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1179 <nc_charlen+0x69>
jmp    1179 <nc_charlen+0x69>
mov    -0x4(%rbp),%edi
call   1030 <isprint@plt>
cmp    $0x0,%eax
jne    1174 <nc_charlen+0x64>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1179 <nc_charlen+0x69>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nc_charlen>:
cmp    $0x9,%edi
je     1120 <nc_charlen+0x10>
cmp    $0xd,%edi
jne    1126 <nc_charlen+0x16>
mov    $0x2,%eax
ret
mov    $0x1,%eax
ret
push   %rax
call   1030 <isprint@plt>
cmp    $0x1,%eax
mov    $0x1,%eax
adc    $0x0,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @nc_charlen(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %9 [
i32 13, label %5
i32 9, label %8
]
5: ; preds = %1
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
br label %17
8: ; preds = %1
br label %17
9: ; preds = %1
%10 = load i32, i32* %2
%11 = call i32 @isprint(i32 %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %9
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %9
br label %17
17: ; preds = %16, %8, %5
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @nc_charlen(i32 %0) {
switch i32 %0, label %3 [
i32 13, label %2
i32 9, label %7
]
2: ; preds = %1
br label %7
3: ; preds = %1
%4 = tail call i32 @isprint(i32 %0)
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 2, i32 1
br label %7
7: ; preds = %3, %1, %2
%8 = phi i32 [ 1, %1 ], [ 2, %2 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
bool nrf52_errata_216(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_216>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_216>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_216() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_216() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ writeidew(int /*<<< orphan*/, int /*<<< orphan*/);
void ide_write_pri_w(uint16_t addr, uint16_t val, void *priv) {
  writeidew(0, val);
}


x86 assembly (clang, -O0):
<ide_write_pri_w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%esi
xor    %edi,%edi
call   1030 <writeidew@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_write_pri_w>:
xor    %edi,%edi
jmp    1030 <writeidew@plt>

LLVM IR (-O0):
define void @ide_write_pri_w(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @writeidew(i32 0, i32 %7)
ret void
}

LLVM IR (-O2):
define void @ide_write_pri_w(i32 %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @writeidew(i32 0, i32 %1)
ret void
}
/* Variables and functions */
int log(double);
float pow(float, int);
float bias(float a, float b) { return pow(a, log(b) / log(0.5)); }


x86 assembly (clang, -O0):
<bias>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <log@plt>
mov    %eax,-0xc(%rbp)
movsd  0xeab(%rip),%xmm0
call   1030 <log@plt>
movss  -0x10(%rbp),%xmm0
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bias>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
call   1030 <log@plt>
mov    %eax,%ebx
movsd  0xebf(%rip),%xmm0
call   1030 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
movss  0xc(%rsp),%xmm0
mov    %eax,%edi
add    $0x10,%rsp
pop    %rbx
jmp    1040 <pow@plt>

LLVM IR (-O0):
define float @bias(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fpext float %6 to double
%8 = call i32 @log(double %7)
%9 = call i32 @log(double 5.000000e-01)
%10 = sdiv i32 %8, %9
%11 = call float @pow(float %5, i32 %10)
ret float %11
}

LLVM IR (-O2):
define float @bias(float %0, float %1) {
%3 = fpext float %1 to double
%4 = tail call i32 @log(double %3)
%5 = tail call i32 @log(double 5.000000e-01)
%6 = sdiv i32 %4, %5
%7 = tail call float @pow(float %0, i32 %6)
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ indirect1();
void __attribute__((flatten)) indirect(void) { indirect1(); }


x86 assembly (clang, -O0):
<indirect>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <indirect1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<indirect>:
xor    %eax,%eax
jmp    1030 <indirect1@plt>

LLVM IR (-O0):
define void @indirect() {
%1 = call i32 (...) @indirect1()
ret void
}

LLVM IR (-O2):
define void @indirect() {
%1 = tail call i32 (...) @indirect1()
ret void
}
unsigned char encode64Char1(char ci1) {
  unsigned char c1 = ci1 >> 2;
  c1 = c1 & 63;
  return c1;
}


x86 assembly (clang, -O0):
<encode64Char1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sar    $0x2,%eax
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
and    $0x3f,%eax
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode64Char1>:
mov    %edi,%eax
shr    $0x2,%al
ret

LLVM IR (-O0):
define zeroext i8 @encode64Char1(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = ashr i32 %5, 2
%7 = trunc i32 %6 to i8
store i8 %7, i8* %3
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = and i32 %9, 63
%11 = trunc i32 %10 to i8
store i8 %11, i8* %3
%12 = load i8, i8* %3
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @encode64Char1(i8 signext %0) {
%2 = lshr i8 %0, 2
ret i8 %2
}
void brcm_pm_enet_add(void) {}


x86 assembly (clang, -O0):
<brcm_pm_enet_add>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brcm_pm_enet_add>:
ret

LLVM IR (-O0):
define void @brcm_pm_enet_add() {
ret void
}

LLVM IR (-O2):
define void @brcm_pm_enet_add() {
ret void
}
int div10(int a) {
  int b;
  b = a / 10;
  a -= b * 10;
  if (a >= 5)
    b++;
  return b;
}


x86 assembly (clang, -O0):
<div10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jl     1134 <div10+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<div10>:
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x22,%rdx
add    %eax,%edx
lea    (%rdx,%rdx,1),%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%ecx
xor    %eax,%eax
cmp    $0x5,%ecx
setge  %al
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @div10(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 10
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = mul nsw i32 %6, 10
%8 = load i32, i32* %2
%9 = sub nsw i32 %8, %7
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = icmp sge i32 %10, 5
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %15
15: ; preds = %12, %1
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @div10(i32 %0) {
%2 = sdiv i32 %0, 10
%3 = mul nsw i32 %2, -10
%4 = add i32 %3, %0
%5 = icmp sgt i32 %4, 4
%6 = zext i1 %5 to i32
%7 = add nsw i32 %2, %6
ret i32 %7
}
int integerPartOfQuotient(int a, int b) { return a / b; }


x86 assembly (clang, -O0):
<integerPartOfQuotient>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<integerPartOfQuotient>:
mov    %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @integerPartOfQuotient(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sdiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @integerPartOfQuotient(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
ret i32 %3
}
void rpn_nn_analyze() {}


x86 assembly (clang, -O0):
<rpn_nn_analyze>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpn_nn_analyze>:
ret

LLVM IR (-O0):
define void @rpn_nn_analyze() {
ret void
}

LLVM IR (-O2):
define void @rpn_nn_analyze() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *readLine();
int main() {
  char *string = readLine();
  printf("%s\n", string);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <readLine@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <readLine@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* (...) @readLine()
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i8* (...) @readLine()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}
void kernel_main() {}


x86 assembly (clang, -O0):
<kernel_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_main>:
ret

LLVM IR (-O0):
define void @kernel_main() {
ret void
}

LLVM IR (-O2):
define void @kernel_main() {
ret void
}
/* Variables and functions */
double __ocml_atanh_f64(double);
double atanh(double x) { return __ocml_atanh_f64(x); }


x86 assembly (clang, -O0):
<atanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_atanh_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atanh>:
jmp    1030 <__ocml_atanh_f64@plt>

LLVM IR (-O0):
define double @atanh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ocml_atanh_f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @atanh(double %0) {
%2 = tail call double @__ocml_atanh_f64(double %0)
ret double %2
}
void CFGMR3GetValueName(void) {}


x86 assembly (clang, -O0):
<CFGMR3GetValueName>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3GetValueName>:
ret

LLVM IR (-O0):
define void @CFGMR3GetValueName() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3GetValueName() {
ret void
}
/* Variables and functions */
int dlclose(void *);
int unload_mod(void *mod_handle) { return (dlclose(mod_handle)); }


x86 assembly (clang, -O0):
<unload_mod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dlclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unload_mod>:
jmp    1030 <dlclose@plt>

LLVM IR (-O0):
define i32 @unload_mod(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dlclose(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @unload_mod(i8* %0) {
%2 = tail call i32 @dlclose(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(char *const);
scalar_t__ malloc(int);
void buffer_overflow() {
  char *const memory = (char *)malloc(sizeof(int));
  memory[sizeof(int)] = '!';
  free(memory);
}


x86 assembly (clang, -O0):
<buffer_overflow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x21,0x4(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_overflow>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
movb   $0x21,0x4(%rax)
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @buffer_overflow() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i64 4
store i8 33, i8* %5
%6 = load i8*, i8** %1
%7 = call i32 @free(i8* %6)
ret void
}

LLVM IR (-O2):
define void @buffer_overflow() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i8*
%3 = getelementptr inbounds i8, i8* %2, i64 4
store i8 33, i8* %3
%4 = tail call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ NXTransExit(int);
void nxagentBinderExit(int code) { NXTransExit(code); }


x86 assembly (clang, -O0):
<nxagentBinderExit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <NXTransExit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nxagentBinderExit>:
jmp    1030 <NXTransExit@plt>

LLVM IR (-O0):
define void @nxagentBinderExit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @NXTransExit(i32 %3)
ret void
}

LLVM IR (-O2):
define void @nxagentBinderExit(i32 %0) {
%2 = tail call i32 @NXTransExit(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ check_vect();
int /*<<< orphan*/ main1(int);
int main(void) {
  check_vect();
  main1(0);
  main1(3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
xor    %edi,%edi
call   1040 <main1@plt>
mov    $0x3,%edi
call   1040 <main1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <check_vect@plt>
xor    %edi,%edi
call   1040 <main1@plt>
mov    $0x3,%edi
call   1040 <main1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @check_vect()
%3 = call i32 @main1(i32 0)
%4 = call i32 @main1(i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @check_vect()
%2 = tail call i32 @main1(i32 0)
%3 = tail call i32 @main1(i32 3)
ret i32 0
}
void pthread_cleanup_pop(int execute) {}


x86 assembly (clang, -O0):
<pthread_cleanup_pop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cleanup_pop>:
ret

LLVM IR (-O0):
define void @pthread_cleanup_pop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @pthread_cleanup_pop(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("Usage: f2fstat [option]\n"
         "    -d    delay (secs)\n"
         "    -i    interval of head info\n"
         "    -p    partition name (e.g. /dev/sda3)\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [122 x i8] c"Usage: f2fstat [option]\0A -d delay (secs)\0A -i interval of head info\0A -p partition name (e.g. /dev/sda3)\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([122 x i8], [122 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_FAILURE
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@str = [121 x i8] c"Usage: f2fstat [option]\0A -d delay (secs)\0A -i interval of head info\0A -p partition name (e.g. /dev/sda3)\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([121 x i8], [121 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_FAILURE
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
double tanh(double);
double ECtanh(double x) {
  double y;
  double r;
  y = x;
  r = tanh(y);
  return (r);
}


x86 assembly (clang, -O0):
<ECtanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <tanh@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECtanh>:
jmp    1030 <tanh@plt>

LLVM IR (-O0):
define double @ECtanh(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
store double %5, double* %3
%6 = load double, double* %3
%7 = call double @tanh(double %6)
store double %7, double* %4
%8 = load double, double* %4
ret double %8
}

LLVM IR (-O2):
define double @ECtanh(double %0) {
%2 = tail call double @tanh(double %0)
ret double %2
}
void bmp_swap(int *x, int *y) {
  int a = *x;
  *x = *y;
  *y = a;
}


x86 assembly (clang, -O0):
<bmp_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmp_swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @bmp_swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @bmp_swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
void __attribute__((weak)) dma2_ch4_5_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<dma2_ch4_5_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dma2_ch4_5_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.dma2_ch4_5_isr = [15 x i8] c"dma2_ch4_5_isr\00"
define weak void @dma2_ch4_5_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__FUNCTION__.dma2_ch4_5_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.dma2_ch4_5_isr = [15 x i8] c"dma2_ch4_5_isr\00"
define weak void @dma2_ch4_5_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__FUNCTION__.dma2_ch4_5_isr, i64 0, i64 0))
ret void
}
const char *eraVersion(void) { return "1.6.0"; }


x86 assembly (clang, -O0):
<eraVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eraVersion>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1.6.0\00"
define i8* @eraVersion() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.6.0\00"
define i8* @eraVersion() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
size_t fwrite(void *, int, size_t, void *);
size_t def_write(void *buf, size_t bytes, void *uptr) {
  return uptr ? fwrite(buf, 1, bytes, uptr) : 0;
}


x86 assembly (clang, -O0):
<def_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114e <def_write+0x3e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
mov    %rax,-0x20(%rbp)
jmp    1159 <def_write+0x49>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
jmp    1159 <def_write+0x49>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<def_write>:
mov    %rdx,%rcx
test   %rdx,%rdx
je     1125 <def_write+0x15>
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <fwrite@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @def_write(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = load i64, i64* %5
%12 = load i8*, i8** %6
%13 = call i64 @fwrite(i8* %10, i32 1, i64 %11, i8* %12)
br label %15
14: ; preds = %3
br label %15
15: ; preds = %14, %9
%16 = phi i64 [ %13, %9 ], [ 0, %14 ]
ret i64 %16
}

LLVM IR (-O2):
define i64 @def_write(i8* nocapture %0, i64 %1, i8* %2) {
%4 = icmp eq i8* %2, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i64 @fwrite(i8* %0, i32 1, i64 %1, i8* %2)
br label %7
7: ; preds = %3, %5
%8 = phi i64 [ %6, %5 ], [ 0, %3 ]
ret i64 %8
}
unsigned char inportb(unsigned short port) {
  unsigned char rv;
  asm volatile("inb %1, %0" : "=a"(rv) : "dN"(port));
  return rv;
}


x86 assembly (clang, -O0):
<inportb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inportb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inportb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inportb(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
void swresample_configuration() {}


x86 assembly (clang, -O0):
<swresample_configuration>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swresample_configuration>:
ret

LLVM IR (-O0):
define void @swresample_configuration() {
ret void
}

LLVM IR (-O2):
define void @swresample_configuration() {
ret void
}
int sd_zbc_init_zones(struct scsi_disk *sdkp, unsigned char *buf, int buf_len) {
  return 0;
}


x86 assembly (clang, -O0):
<sd_zbc_init_zones>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_zbc_init_zones>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.scsi_disk = type opaque
define i32 @sd_zbc_init_zones(%struct.scsi_disk* %0, i8* %1, i32 %2) {
%4 = alloca %struct.scsi_disk*
%5 = alloca i8*
%6 = alloca i32
store %struct.scsi_disk* %0, %struct.scsi_disk** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.scsi_disk = type opaque
define i32 @sd_zbc_init_zones(%struct.scsi_disk* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int getdtablesize();
int get_dtablesize() { return getdtablesize(); }


x86 assembly (clang, -O0):
<get_dtablesize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getdtablesize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_dtablesize>:
xor    %eax,%eax
jmp    1030 <getdtablesize@plt>

LLVM IR (-O0):
define i32 @get_dtablesize() {
%1 = call i32 (...) @getdtablesize()
ret i32 %1
}

LLVM IR (-O2):
define i32 @get_dtablesize() {
%1 = tail call i32 (...) @getdtablesize()
ret i32 %1
}
int sat_div(int num, int den) { return (num + den - 1) / den; }


x86 assembly (clang, -O0):
<sat_div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
sub    $0x1,%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sat_div>:
lea    (%rdi,%rsi,1),%eax
add    $0xffffffff,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @sat_div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = sub nsw i32 %7, 1
%9 = load i32, i32* %4
%10 = sdiv i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @sat_div(i32 %0, i32 %1) {
%3 = add i32 %0, -1
%4 = add i32 %3, %1
%5 = sdiv i32 %4, %1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello android kernel!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"hello android kernel!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [22 x i8] c"hello android kernel!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
size_t indexFor(uint32_t hash, size_t length) { return hash & (length - 1); }


x86 assembly (clang, -O0):
<indexFor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indexFor>:
lea    -0x1(%rsi),%rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @indexFor(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = and i64 %5, %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @indexFor(i64 %0, i64 %1) {
%3 = add i64 %1, -1
%4 = and i64 %3, %0
ret i64 %4
}
unsigned int time_diff(struct timeval *end, struct timeval *begin) { return 0; }


x86 assembly (clang, -O0):
<time_diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_diff>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timeval = type opaque
define i32 @time_diff(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
ret i32 0
}

LLVM IR (-O2):
%struct.timeval = type opaque
define i32 @time_diff(%struct.timeval* nocapture readnone %0, %struct.timeval* nocapture readnone %1) {
ret i32 0
}
void event_slur(t) int t;
{
  if (t) {
    event_sluron(1);
  } else {
    event_sluroff(0);
  };
}


x86 assembly (clang, -O0):
<event_slur>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1146 <event_slur+0x26>
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <event_sluron@plt>
jmp    114f <event_slur+0x2f>
xor    %edi,%edi
mov    $0x0,%al
call   1040 <event_sluroff@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_slur>:
test   %edi,%edi
je     1130 <event_slur+0x10>
mov    $0x1,%edi
xor    %eax,%eax
jmp    1030 <event_sluron@plt>
xor    %edi,%edi
xor    %eax,%eax
jmp    1040 <event_sluroff@plt>

LLVM IR (-O0):
define void @event_slur(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (i32, ...) bitcast (i32 (...)* @event_sluron to i32 (i32, ...)*)(i32 1)
br label %9
7: ; preds = %1
%8 = call i32 (i32, ...) bitcast (i32 (...)* @event_sluroff to i32 (i32, ...)*)(i32 0)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @event_slur(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @event_sluron to i32 (i32, ...)*)(i32 1)
br label %7
5: ; preds = %1
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @event_sluroff to i32 (i32, ...)*)(i32 0)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Get_Saddle(int **);
int /*<<< orphan*/ getch();
void main() {
  int A[3][3] = {1, 2, 3, 4, 5, 6, 7, 8, 9};
  Get_Saddle(A);
  getch();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x24,%edx
call   1040 <memcpy@plt>
lea    -0x30(%rbp),%rdi
call   1030 <Get_Saddle@plt>
mov    $0x0,%al
call   1050 <getch@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
mov    0xef6(%rip),%eax
mov    %eax,0x20(%rsp)
movaps 0xedb(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebf(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <Get_Saddle@plt>
xor    %eax,%eax
call   1040 <getch@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.A = [3 x [3 x i32]] [[3 x i32] [i32 1, i32 2, i32 3], [3 x i32] [i32 4, i32 5, i32 6], [3 x i32] [i32 7, i32 8, i32 9]]
define void @main() {
%1 = alloca [3 x [3 x i32]]
%2 = bitcast [3 x [3 x i32]]* %1 to i8*
%3 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* %1, i64 0, i64 0
%4 = bitcast [3 x i32]* %3 to i32**
%5 = call i32 @Get_Saddle(i32** %4)
%6 = call i32 (...) @getch()
ret void
}

LLVM IR (-O2):
@__const.main.A = [3 x [3 x i32]] [[3 x i32] [i32 1, i32 2, i32 3], [3 x i32] [i32 4, i32 5, i32 6], [3 x i32] [i32 7, i32 8, i32 9]]
define void @main() {
%1 = alloca [3 x [3 x i32]]
%2 = bitcast [3 x [3 x i32]]* %1 to i8*
%3 = bitcast [3 x [3 x i32]]* %1 to i32**
%4 = call i32 @Get_Saddle(i32** %3)
%5 = call i32 (...) @getch()
ret void
}
int float_to_fixed(float f) { return ((int)(f * (1 << 16))); }


x86 assembly (clang, -O0):
<float_to_fixed>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_to_fixed>:
mulss  0xef8(%rip),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @float_to_fixed(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 6.553600e+04
%5 = fptosi float %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @float_to_fixed(float %0) {
%2 = fmul float %0, 6.553600e+04
%3 = fptosi float %2 to i32
ret i32 %3
}
/* Variables and functions */
bool nrf52_errata_153(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_153>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_153>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_153() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_153() {
ret i32 0
}
void w17(void *x, double y) { *(double *)(x + 32751) = y; }


x86 assembly (clang, -O0):
<w17>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x7fef(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<w17>:
movsd  %xmm0,0x7fef(%rdi)
ret

LLVM IR (-O0):
define void @w17(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load i8*, i8** %3
%7 = getelementptr i8, i8* %6, i64 32751
%8 = bitcast i8* %7 to double*
store double %5, double* %8
ret void
}

LLVM IR (-O2):
define void @w17(i8* nocapture writeonly %0, double %1) {
%3 = getelementptr i8, i8* %0, i64 32751
%4 = bitcast i8* %3 to double*
store double %1, double* %4
ret void
}
unsigned int TRAILING_ZEROES(unsigned int x) {
  return x ? __builtin_ctz(x) : 32;
}


x86 assembly (clang, -O0):
<TRAILING_ZEROES>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111f <TRAILING_ZEROES+0x1f>
mov    -0x4(%rbp),%eax
bsf    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    112c <TRAILING_ZEROES+0x2c>
mov    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    112c <TRAILING_ZEROES+0x2c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TRAILING_ZEROES>:
test   %edi,%edi
je     1108 <TRAILING_ZEROES+0x8>
bsf    %edi,%eax
ret
mov    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @TRAILING_ZEROES(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @llvm.cttz.i32(i32 %6, i1 true)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ %7, %5 ], [ 32, %8 ]
ret i32 %10
}

LLVM IR (-O2):
define i32 @TRAILING_ZEROES(i32 %0) {
%2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
ret i32 %2
}
int do_531() { return 531; }


x86 assembly (clang, -O0):
<do_531>:
push   %rbp
mov    %rsp,%rbp
mov    $0x213,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_531>:
mov    $0x213,%eax
ret

LLVM IR (-O0):
define i32 @do_531() {
ret i32 531
}

LLVM IR (-O2):
define i32 @do_531() {
ret i32 531
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ putchar(char);
main() {
  char c;
  while ((c = getchar()) != '\n') {
    if (c == ' ')
      printf("\n");
    else
      putchar(c);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%eax
cmp    $0xa,%eax
je     1181 <main+0x51>
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
jne    1173 <main+0x43>
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
jmp    117c <main+0x4c>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
jmp    113f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
jmp    113a <main+0x1a>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    $0x20,%al
je     1130 <main+0x10>
cmp    $0xa,%al
je     1153 <main+0x33>
movsbl %al,%edi
call   1030 <putchar@plt>
jmp    113a <main+0x1a>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %16, %0
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %17
7: ; preds = %3
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 32
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %16
13: ; preds = %7
%14 = load i8, i8* %2
%15 = call i32 @putchar(i8 signext %14)
br label %16
16: ; preds = %13, %11
br label %3
17: ; preds = %3
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %7, %0
%2 = tail call signext i8 (...) @getchar()
switch i8 %2, label %5 [
i8 10, label %8
i8 32, label %3
]
3: ; preds = %1
%4 = tail call i32 bitcast (i32 (i8)* @putchar to i32 (i32)*)(i32 10)
br label %7
5: ; preds = %1
%6 = tail call i32 @putchar(i8 signext %2)
br label %7
7: ; preds = %5, %3
br label %1
8: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
scalar_t__ waitpid(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
void sigchld_handler(int signo) {
  while (waitpid(-1, NULL, WNOHANG) > 0)
    ;
}


x86 assembly (clang, -O0):
<sigchld_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jle    1141 <sigchld_handler+0x31>
jmp    111b <sigchld_handler+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigchld_handler>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    (%rbx),%edx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1030 <waitpid@plt>
test   %rax,%rax
jg     1120 <sigchld_handler+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* @WNOHANG
%5 = call i64 @waitpid(i32 -1, i32* null, i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define void @sigchld_handler(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load i32, i32* @WNOHANG
%4 = tail call i64 @waitpid(i32 -1, i32* null, i32 %3)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
ret void
}
int main() { return sizeof(unsigned long int); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 8
}