#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ atomic_signal_fence(int /*<<< orphan*/);
int /*<<< orphan*/ atomic_thread_fence(int /*<<< orphan*/);
int /*<<< orphan*/ memory_order_acq_rel;
int /*<<< orphan*/ memory_order_acquire;
int /*<<< orphan*/ memory_order_consume;
int /*<<< orphan*/ memory_order_relaxed;
int /*<<< orphan*/ memory_order_release;
int /*<<< orphan*/ memory_order_seq_cst;
int main() {
  atomic_thread_fence(memory_order_relaxed);
  atomic_thread_fence(memory_order_consume);
  atomic_thread_fence(memory_order_acquire);
  atomic_thread_fence(memory_order_release);
  atomic_thread_fence(memory_order_acq_rel);
  atomic_thread_fence(memory_order_seq_cst);
  atomic_signal_fence(memory_order_relaxed);
  atomic_signal_fence(memory_order_consume);
  atomic_signal_fence(memory_order_acquire);
  atomic_signal_fence(memory_order_release);
  atomic_signal_fence(memory_order_acq_rel);
  atomic_signal_fence(memory_order_seq_cst);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e74(%rip),%rax
mov    (%rax),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e80(%rip),%rax
mov    (%rax),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e52(%rip),%rax
mov    (%rax),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e54(%rip),%rax
mov    (%rax),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e5e(%rip),%rax
mov    (%rax),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x2e20(%rip),%rax
mov    (%rax),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x2e32(%rip),%rax
mov    (%rax),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x2e2c(%rip),%rax
mov    (%rax),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x2dfe(%rip),%rax
mov    (%rax),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x2e00(%rip),%rax
mov    (%rax),%edi
call   1030 <atomic_signal_fence@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    0x2eb6(%rip),%r14
mov    (%r14),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e77(%rip),%r15
mov    (%r15),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e88(%rip),%r12
mov    (%r12),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e80(%rip),%r13
mov    0x0(%r13),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e50(%rip),%rbx
mov    (%rbx),%edi
call   1040 <atomic_thread_fence@plt>
mov    0x2e52(%rip),%rbp
mov    0x0(%rbp),%edi
call   1040 <atomic_thread_fence@plt>
mov    (%r14),%edi
call   1030 <atomic_signal_fence@plt>
mov    (%r15),%edi
call   1030 <atomic_signal_fence@plt>
mov    (%r12),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x0(%r13),%edi
call   1030 <atomic_signal_fence@plt>
mov    (%rbx),%edi
call   1030 <atomic_signal_fence@plt>
mov    0x0(%rbp),%edi
call   1030 <atomic_signal_fence@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@memory_order_relaxed = global i32 0
@memory_order_consume = global i32 0
@memory_order_acquire = global i32 0
@memory_order_release = global i32 0
@memory_order_acq_rel = global i32 0
@memory_order_seq_cst = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @memory_order_relaxed
%3 = call i32 @atomic_thread_fence(i32 %2)
%4 = load i32, i32* @memory_order_consume
%5 = call i32 @atomic_thread_fence(i32 %4)
%6 = load i32, i32* @memory_order_acquire
%7 = call i32 @atomic_thread_fence(i32 %6)
%8 = load i32, i32* @memory_order_release
%9 = call i32 @atomic_thread_fence(i32 %8)
%10 = load i32, i32* @memory_order_acq_rel
%11 = call i32 @atomic_thread_fence(i32 %10)
%12 = load i32, i32* @memory_order_seq_cst
%13 = call i32 @atomic_thread_fence(i32 %12)
%14 = load i32, i32* @memory_order_relaxed
%15 = call i32 @atomic_signal_fence(i32 %14)
%16 = load i32, i32* @memory_order_consume
%17 = call i32 @atomic_signal_fence(i32 %16)
%18 = load i32, i32* @memory_order_acquire
%19 = call i32 @atomic_signal_fence(i32 %18)
%20 = load i32, i32* @memory_order_release
%21 = call i32 @atomic_signal_fence(i32 %20)
%22 = load i32, i32* @memory_order_acq_rel
%23 = call i32 @atomic_signal_fence(i32 %22)
%24 = load i32, i32* @memory_order_seq_cst
%25 = call i32 @atomic_signal_fence(i32 %24)
ret i32 0
}

LLVM IR (-O2):
@memory_order_relaxed = global i32 0
@memory_order_consume = global i32 0
@memory_order_acquire = global i32 0
@memory_order_release = global i32 0
@memory_order_acq_rel = global i32 0
@memory_order_seq_cst = global i32 0
define i32 @main() {
%1 = load i32, i32* @memory_order_relaxed
%2 = tail call i32 @atomic_thread_fence(i32 %1)
%3 = load i32, i32* @memory_order_consume
%4 = tail call i32 @atomic_thread_fence(i32 %3)
%5 = load i32, i32* @memory_order_acquire
%6 = tail call i32 @atomic_thread_fence(i32 %5)
%7 = load i32, i32* @memory_order_release
%8 = tail call i32 @atomic_thread_fence(i32 %7)
%9 = load i32, i32* @memory_order_acq_rel
%10 = tail call i32 @atomic_thread_fence(i32 %9)
%11 = load i32, i32* @memory_order_seq_cst
%12 = tail call i32 @atomic_thread_fence(i32 %11)
%13 = load i32, i32* @memory_order_relaxed
%14 = tail call i32 @atomic_signal_fence(i32 %13)
%15 = load i32, i32* @memory_order_consume
%16 = tail call i32 @atomic_signal_fence(i32 %15)
%17 = load i32, i32* @memory_order_acquire
%18 = tail call i32 @atomic_signal_fence(i32 %17)
%19 = load i32, i32* @memory_order_release
%20 = tail call i32 @atomic_signal_fence(i32 %19)
%21 = load i32, i32* @memory_order_acq_rel
%22 = tail call i32 @atomic_signal_fence(i32 %21)
%23 = load i32, i32* @memory_order_seq_cst
%24 = tail call i32 @atomic_signal_fence(i32 %23)
ret i32 0
}