xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ safefree(void *);
void blowfish_free_context(void *handle) { safefree(handle); }


x86 assembly (clang, -O0):
<blowfish_free_context>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <safefree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blowfish_free_context>:
jmp    1030 <safefree@plt>

LLVM IR (-O0):
define void @blowfish_free_context(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @safefree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @blowfish_free_context(i8* %0) {
%2 = tail call i32 @safefree(i8* %0)
ret void
}
int do_835() { return 835; }


x86 assembly (clang, -O0):
<do_835>:
push   %rbp
mov    %rsp,%rbp
mov    $0x343,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_835>:
mov    $0x343,%eax
ret

LLVM IR (-O0):
define i32 @do_835() {
ret i32 835
}

LLVM IR (-O2):
define i32 @do_835() {
ret i32 835
}
int g_DUMMY_cons_puts(const char *string) {
  string = string;
  return 0;
}


x86 assembly (clang, -O0):
<g_DUMMY_cons_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_cons_puts>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @g_DUMMY_cons_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
store i8* %3, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @g_DUMMY_cons_puts(i8* nocapture readnone %0) {
ret i32 0
}
void complement(int elen, char *s) {
  char *t;
  int c;
  t = s + (elen - 1);
  while (s <= t) {
    c = *s;
    *s = (char)(3 - *t);
    *t = (char)(3 - c);
    s += 1;
    t -= 1;
  }
}


x86 assembly (clang, -O0):
<complement>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
ja     117a <complement+0x7a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x3,%eax
sub    %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    $0x3,%eax
sub    -0x1c(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    111f <complement+0x1f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<complement>:
test   %edi,%edi
jle    112e <complement+0x2e>
add    $0xffffffff,%edi
lea    (%rdi,%rsi,1),%rax
add    $0xffffffffffffffff,%rax
nop
mov    $0x3,%cl
sub    0x1(%rax),%cl
mov    $0x3,%dl
sub    (%rsi),%dl
mov    %cl,(%rsi)
mov    %dl,0x1(%rax)
add    $0x1,%rsi
lea    -0x1(%rax),%rcx
cmp    %rax,%rsi
mov    %rcx,%rax
jbe    1110 <complement+0x10>
ret

LLVM IR (-O0):
define void @complement(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
store i8* %11, i8** %5
br label %12
12: ; preds = %16, %2
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = icmp ule i8* %13, %14
br i1 %15, label %16, label %34
16: ; preds = %12
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
store i32 %19, i32* %6
%20 = load i8*, i8** %5
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = sub nsw i32 3, %22
%24 = trunc i32 %23 to i8
%25 = load i8*, i8** %4
store i8 %24, i8* %25
%26 = load i32, i32* %6
%27 = sub nsw i32 3, %26
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %5
store i8 %28, i8* %29
%30 = load i8*, i8** %4
%31 = getelementptr inbounds i8, i8* %30, i64 1
store i8* %31, i8** %4
%32 = load i8*, i8** %5
%33 = getelementptr inbounds i8, i8* %32, i64 -1
store i8* %33, i8** %5
br label %12
34: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @complement(i32 %0, i8* %1) {
%3 = icmp slt i32 %0, 1
br i1 %3, label %18, label %4
4: ; preds = %2
%5 = add nsw i32 %0, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %1, i64 %6
br label %8
8: ; preds = %4, %8
%9 = phi i8* [ %15, %8 ], [ %1, %4 ]
%10 = phi i8* [ %16, %8 ], [ %7, %4 ]
%11 = load i8, i8* %9
%12 = load i8, i8* %10
%13 = sub i8 3, %12
store i8 %13, i8* %9
%14 = sub i8 3, %11
store i8 %14, i8* %10
%15 = getelementptr inbounds i8, i8* %9, i64 1
%16 = getelementptr inbounds i8, i8* %10, i64 -1
%17 = icmp ugt i8* %15, %16
br i1 %17, label %18, label %8
18: ; preds = %8, %2
ret void
}
/* Variables and functions */
float atanf(float);
float HMM_ATanF(float Radians) {
  ;
  float Result = atanf(Radians);
  return (Result);
}


x86 assembly (clang, -O0):
<HMM_ATanF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanf@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMM_ATanF>:
jmp    1030 <atanf@plt>

LLVM IR (-O0):
define float @HMM_ATanF(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @atanf(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @HMM_ATanF(float %0) {
%2 = tail call float @atanf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ send_int_to_srv(int);
void cmd_clear_queue() { send_int_to_srv(0x3e); }


x86 assembly (clang, -O0):
<cmd_clear_queue>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3e,%edi
call   1030 <send_int_to_srv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_clear_queue>:
mov    $0x3e,%edi
jmp    1030 <send_int_to_srv@plt>

LLVM IR (-O0):
define void @cmd_clear_queue() {
%1 = call i32 @send_int_to_srv(i32 62)
ret void
}

LLVM IR (-O2):
define void @cmd_clear_queue() {
%1 = tail call i32 @send_int_to_srv(i32 62)
ret void
}
/* Variables and functions */
char const *gettext(char *);
const char *getTitle_HelpScreen(void) { return gettext("Help Screen"); }


x86 assembly (clang, -O0):
<getTitle_HelpScreen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gettext@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTitle_HelpScreen>:
lea    0xee9(%rip),%rdi
jmp    1030 <gettext@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Help Screen\00"
define i8* @getTitle_HelpScreen() {
%1 = call i8* @gettext(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [12 x i8] c"Help Screen\00"
define i8* @getTitle_HelpScreen() {
%1 = tail call i8* @gettext(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ s3d_strstartswith(char *, char const *);
int /*<<< orphan*/ strlen(char const *);
int s3d_strconsume(char **const s, const char *token) {
  if (!s3d_strstartswith(*s, token)) {
    return 0;
  }
  *s += strlen(token);
  return 1;
}


x86 assembly (clang, -O0):
<s3d_strconsume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <s3d_strstartswith@plt>
cmp    $0x0,%eax
jne    1155 <s3d_strconsume+0x35>
movl   $0x0,-0x4(%rbp)
jmp    1177 <s3d_strconsume+0x57>
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%edx
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
movslq %edx,%rdx
add    %rdx,%rcx
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3d_strconsume>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    (%rdi),%rdi
call   1030 <s3d_strstartswith@plt>
test   %eax,%eax
je     114a <s3d_strconsume+0x2a>
mov    %rbx,%rdi
call   1040 <strlen@plt>
cltq
add    %rax,(%r14)
mov    $0x1,%eax
jmp    114c <s3d_strconsume+0x2c>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @s3d_strconsume(i8** %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
store i8** %0, i8*** %4
store i8* %1, i8** %5
%6 = load i8**, i8*** %4
%7 = load i8*, i8** %6
%8 = load i8*, i8** %5
%9 = call i32 @s3d_strstartswith(i8* %7, i8* %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 0, i32* %3
br label %19
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = call i32 @strlen(i8* %13)
%15 = load i8**, i8*** %4
%16 = load i8*, i8** %15
%17 = sext i32 %14 to i64
%18 = getelementptr inbounds i8, i8* %16, i64 %17
store i8* %18, i8** %15
store i32 1, i32* %3
br label %19
19: ; preds = %12, %11
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @s3d_strconsume(i8** nocapture %0, i8* %1) {
%3 = load i8*, i8** %0
%4 = tail call i32 @s3d_strstartswith(i8* %3, i8* %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = tail call i32 @strlen(i8* %1)
%8 = load i8*, i8** %0
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds i8, i8* %8, i64 %9
store i8* %10, i8** %0
br label %11
11: ; preds = %2, %6
%12 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %12
}
void del_dir(char *name) {}


x86 assembly (clang, -O0):
<del_dir>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_dir>:
ret

LLVM IR (-O0):
define void @del_dir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @del_dir(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned int *);
void freePatternSetsExtract(unsigned int *IDs) { free(IDs); }


x86 assembly (clang, -O0):
<freePatternSetsExtract>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freePatternSetsExtract>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freePatternSetsExtract(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @free(i32* %3)
ret void
}

LLVM IR (-O2):
define void @freePatternSetsExtract(i32* nocapture %0) {
%2 = tail call i32 @free(i32* %0)
ret void
}
void port_word_out(unsigned short port, unsigned char data) {
  __asm__("out %%ax, %%dx" : : "a"(data), "d"(port));
}


x86 assembly (clang, -O0):
<port_word_out>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    -0x2(%rbp),%dx
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_word_out>:
mov    %esi,%eax
mov    %edi,%edx
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @port_word_out(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @port_word_out(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "out %ax, %dx", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 %1, i16 %0)
ret void
}
/* Variables and functions */
char *cloneString(int /*<<< orphan*/);
int /*<<< orphan*/ sqlGetOptQuoteString(char **);
char *sqlStringComma(char **pS) {
  return cloneString(sqlGetOptQuoteString(pS));
}


x86 assembly (clang, -O0):
<sqlStringComma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sqlGetOptQuoteString@plt>
mov    %eax,%edi
call   1040 <cloneString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlStringComma>:
push   %rax
call   1030 <sqlGetOptQuoteString@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <cloneString@plt>

LLVM IR (-O0):
define i8* @sqlStringComma(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @sqlGetOptQuoteString(i8** %3)
%5 = call i8* @cloneString(i32 %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @sqlStringComma(i8** %0) {
%2 = tail call i32 @sqlGetOptQuoteString(i8** %0)
%3 = tail call i8* @cloneString(i32 %2)
ret i8* %3
}
double calc_thermal_penalty(temp, tempcrit)
double temp, tempcrit;
{
  double value;
  value = 0.0;
  return (value);
}


x86 assembly (clang, -O0):
<calc_thermal_penalty>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_thermal_penalty>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @calc_thermal_penalty(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
store double 0.000000e+00, double* %5
%6 = load double, double* %5
ret double %6
}

LLVM IR (-O2):
define double @calc_thermal_penalty(double %0, double %1) {
ret double 0.000000e+00
}
void openvpn_thread_cleanup(void) {}


x86 assembly (clang, -O0):
<openvpn_thread_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openvpn_thread_cleanup>:
ret

LLVM IR (-O0):
define void @openvpn_thread_cleanup() {
ret void
}

LLVM IR (-O2):
define void @openvpn_thread_cleanup() {
ret void
}
int CONFIG_WriteInt(const char *FileName, const char *ConfName, int Value) {
  return 42;
}


x86 assembly (clang, -O0):
<CONFIG_WriteInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CONFIG_WriteInt>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @CONFIG_WriteInt(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 42
}

LLVM IR (-O2):
define i32 @CONFIG_WriteInt(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 42
}
/* Type definitions */
typedef int __u32;

/* Variables and functions */
unsigned int tipc_zone(__u32 addr) { return addr >> (12 + 12); }


x86 assembly (clang, -O0):
<tipc_zone>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tipc_zone>:
mov    %edi,%eax
sar    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @tipc_zone(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 24
ret i32 %4
}

LLVM IR (-O2):
define i32 @tipc_zone(i32 %0) {
%2 = ashr i32 %0, 24
ret i32 %2
}
/* Variables and functions */
float exp(double);
float impulse(float k, float x) {
  float h = k * x;
  return h * exp(1.0 - h);
}


x86 assembly (clang, -O0):
<impulse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeb4(%rip),%xmm0
subsd  %xmm1,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<impulse>:
push   %rax
mulss  %xmm1,%xmm0
movss  %xmm0,0x4(%rsp)
xorps  %xmm1,%xmm1
cvtss2sd %xmm0,%xmm1
movsd  0xed6(%rip),%xmm0
subsd  %xmm1,%xmm0
call   1030 <exp@plt>
mulss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @impulse(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = fmul float %6, %7
store float %8, float* %5
%9 = load float, float* %5
%10 = load float, float* %5
%11 = fpext float %10 to double
%12 = fsub double 1.000000e+00, %11
%13 = call float @exp(double %12)
%14 = fmul float %9, %13
ret float %14
}

LLVM IR (-O2):
define float @impulse(float %0, float %1) {
%3 = fmul float %0, %1
%4 = fpext float %3 to double
%5 = fsub double 1.000000e+00, %4
%6 = tail call float @exp(double %5)
%7 = fmul float %3, %6
ret float %7
}
int is_space_char(c)
char c;
{ return (c == '\n' || c == ' ' || c == '\t'); }


x86 assembly (clang, -O0):
<is_space_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     113b <is_space_char+0x3b>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     113b <is_space_char+0x3b>
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_space_char>:
shl    $0x18,%edi
mov    $0x1,%eax
cmp    $0xa000000,%edi
je     1118 <is_space_char+0x18>
cmp    $0x20000000,%edi
jne    1119 <is_space_char+0x19>
ret
xor    %eax,%eax
cmp    $0x9000000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_space_char(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 10
br i1 %6, label %15, label %7
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 32
br i1 %10, label %15, label %11
11: ; preds = %7
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br label %15
15: ; preds = %11, %7, %1
%16 = phi i1 [ true, %7 ], [ true, %1 ], [ %14, %11 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @is_space_char(i32 %0) {
%2 = shl i32 %0, 24
switch i32 %2, label %3 [
i32 536870912, label %6
i32 167772160, label %6
]
3: ; preds = %1
%4 = icmp eq i32 %2, 150994944
%5 = zext i1 %4 to i32
br label %6
6: ; preds = %1, %1, %3
%7 = phi i32 [ 1, %1 ], [ %5, %3 ], [ 1, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ LedsP__Led1__toggle();
void LedsP__Leds__led1Toggle(void) {
  LedsP__Led1__toggle();
  ;
  ;
}


x86 assembly (clang, -O0):
<LedsP__Leds__led1Toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LedsP__Led1__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Leds__led1Toggle>:
xor    %eax,%eax
jmp    1030 <LedsP__Led1__toggle@plt>

LLVM IR (-O0):
define void @LedsP__Leds__led1Toggle() {
%1 = call i32 (...) @LedsP__Led1__toggle()
ret void
}

LLVM IR (-O2):
define void @LedsP__Leds__led1Toggle() {
%1 = tail call i32 (...) @LedsP__Led1__toggle()
ret void
}
int absolute(int i) { return i > 0 ? i : -i; }


x86 assembly (clang, -O0):
<absolute>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    111c <absolute+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <absolute+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<absolute>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @absolute(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @absolute(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int __test() {
  _Static_assert(1, "foo");
  return 0;
}


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__test() {
ret i32 0
}

LLVM IR (-O2):
define i32 @__test() {
ret i32 0
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void millisleep(unsigned int ms) {
  struct timespec ts = {
      .tv_sec = 0,
      .tv_nsec = 1000000 * ms,
  };
  nanosleep(&ts, NULL);
}


x86 assembly (clang, -O0):
<millisleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0xf4240,-0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<millisleep>:
push   %rax
imul   $0xf4240,%edi,%eax
mov    %eax,(%rsp)
movl   $0x0,0x4(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @millisleep(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%5 = load i32, i32* %2
%6 = mul i32 1000000, %5
store i32 %6, i32* %4
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 0, i32* %7
%8 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @millisleep(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
%5 = mul i32 %0, 1000000
store i32 %5, i32* %4
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 0, i32* %6
%7 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
void AONBatMonDisable(void) {
  (*((volatile unsigned long *)(0x40095000 + 0x00000000))) = 0;
}


x86 assembly (clang, -O0):
<AONBatMonDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40095000,%eax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AONBatMonDisable>:
movq   $0x0,0x40095000
ret

LLVM IR (-O0):
define void @AONBatMonDisable() {
store volatile i64 0, i64* inttoptr (i64 1074352128 to i64*)
ret void
}

LLVM IR (-O2):
define void @AONBatMonDisable() {
store volatile i64 0, i64* inttoptr (i64 1074352128 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_exceptions();
int /*<<< orphan*/ test_fill_with_deleted_items();
int /*<<< orphan*/ test_gaps();
int /*<<< orphan*/ test_iterating();
int /*<<< orphan*/ test_rehashing_items_placed_beyond_nitems();
int /*<<< orphan*/ trivial();
int main(int argc, char *argv[]) {
  trivial();
  test_gaps();
  test_exceptions();
  test_rehashing_items_placed_beyond_nitems();
  test_iterating();
  test_fill_with_deleted_items();
  (void)argc;
  (void)argv;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1060 <trivial@plt>
mov    $0x0,%al
call   1070 <test_gaps@plt>
mov    $0x0,%al
call   1050 <test_exceptions@plt>
mov    $0x0,%al
call   1030 <test_rehashing_items_placed_beyond_nitems@plt>
mov    $0x0,%al
call   1080 <test_iterating@plt>
mov    $0x0,%al
call   1040 <test_fill_with_deleted_items@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <trivial@plt>
xor    %eax,%eax
call   1070 <test_gaps@plt>
xor    %eax,%eax
call   1050 <test_exceptions@plt>
xor    %eax,%eax
call   1030 <test_rehashing_items_placed_beyond_nitems@plt>
xor    %eax,%eax
call   1080 <test_iterating@plt>
xor    %eax,%eax
call   1040 <test_fill_with_deleted_items@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @trivial()
%7 = call i32 (...) @test_gaps()
%8 = call i32 (...) @test_exceptions()
%9 = call i32 (...) @test_rehashing_items_placed_beyond_nitems()
%10 = call i32 (...) @test_iterating()
%11 = call i32 (...) @test_fill_with_deleted_items()
%12 = load i32, i32* %4
%13 = load i8**, i8*** %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @trivial()
%4 = tail call i32 (...) @test_gaps()
%5 = tail call i32 (...) @test_exceptions()
%6 = tail call i32 (...) @test_rehashing_items_placed_beyond_nitems()
%7 = tail call i32 (...) @test_iterating()
%8 = tail call i32 (...) @test_fill_with_deleted_items()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int /*<<< orphan*/ *uc_link;
};
typedef TYPE_1__ ucontext_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ setcontext(TYPE_1__ const *);
void resumecontext(ucontext_t *ucp) {
  if (ucp->uc_link == NULL) {
    exit(0);
  }
  (void)setcontext((const ucontext_t *)ucp->uc_link);
  exit(1);
}


x86 assembly (clang, -O0):
<resumecontext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1141 <resumecontext+0x21>
xor    %edi,%edi
call   1040 <exit@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <setcontext@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<resumecontext>:
push   %rax
mov    (%rdi),%rdi
test   %rdi,%rdi
jne    1130 <resumecontext+0x10>
xor    %edi,%edi
call   1040 <exit@plt>
call   1030 <setcontext@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
%struct.TYPE_4__ = type { i32* }
define void @resumecontext(%struct.TYPE_4__* %0) {
%2 = alloca %struct.TYPE_4__*
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %2
%3 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%4 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %3, i32 0, i32 0
%5 = load i32*, i32** %4
%6 = icmp eq i32* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @exit(i32 0)
unreachable
9: ; preds = %1
%10 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%11 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %10, i32 0, i32 0
%12 = load i32*, i32** %11
%13 = bitcast i32* %12 to %struct.TYPE_4__*
%14 = call i32 @setcontext(%struct.TYPE_4__* %13)
%15 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { i32* }
define void @resumecontext(%struct.TYPE_4__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %0, i64 0, i32 0
%3 = load i32*, i32** %2
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %1
%8 = bitcast i32* %3 to %struct.TYPE_4__*
%9 = tail call i32 @setcontext(%struct.TYPE_4__* %8)
%10 = tail call i32 @exit(i32 1)
unreachable
}
int mallocSize(void *p) { return -1; }


x86 assembly (clang, -O0):
<mallocSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocSize>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mallocSize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @mallocSize(i8* nocapture readnone %0) {
ret i32 -1
}
int getPosition(int *board, int x) {
  if (board[x] > 0)
    return board[x] - 1;
  else if (board[x] < 0)
    return -(board[x]) - 1;
  else
    return -1;
}


x86 assembly (clang, -O0):
<getPosition>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jle    1133 <getPosition+0x33>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <getPosition+0x64>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jge    115d <getPosition+0x5d>
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
xor    %eax,%eax
sub    (%rcx,%rdx,4),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <getPosition+0x64>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPosition>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
lea    -0x1(%rcx),%edx
mov    %ecx,%eax
sar    $0x1f,%eax
and    %ecx,%eax
test   %ecx,%ecx
not    %eax
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @getPosition(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %5
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %6, i64 %8
%10 = load i32, i32* %9
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %19
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = sub nsw i32 %17, 1
store i32 %18, i32* %3
br label %35
19: ; preds = %2
%20 = load i32*, i32** %4
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
%24 = load i32, i32* %23
%25 = icmp slt i32 %24, 0
br i1 %25, label %26, label %34
26: ; preds = %19
%27 = load i32*, i32** %4
%28 = load i32, i32* %5
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i32, i32* %27, i64 %29
%31 = load i32, i32* %30
%32 = sub nsw i32 0, %31
%33 = sub nsw i32 %32, 1
store i32 %33, i32* %3
br label %35
34: ; preds = %19
store i32 -1, i32* %3
br label %35
35: ; preds = %34, %26, %12
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
define i32 @getPosition(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
%7 = add nsw i32 %5, -1
%8 = icmp slt i32 %5, 0
%9 = select i1 %8, i32 %5, i32 0
%10 = xor i32 %9, -1
%11 = select i1 %6, i32 %7, i32 %10
ret i32 %11
}
int test_imm_2Duint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x2D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Duint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x2d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Duint64_highword_reg>:
movabs $0x2d00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Duint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 45
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Duint64_highword_reg(i64 %0) {
%2 = and i64 %0, 193273528320
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, long, char *);
void func5_print_but_do_not_free_string(char *ptr) {
  printf("         About to free %p(%ld):  %s\n", ptr, (long int)ptr, ptr);
}


x86 assembly (clang, -O0):
<func5_print_but_do_not_free_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rdx
mov    -0x8(%rbp),%rcx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func5_print_but_do_not_free_string>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    %rcx,%rsi
mov    %rcx,%rdx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [37 x i8] c" About to free %p(%ld): %s\0A\00"
define void @func5_print_but_do_not_free_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
%6 = load i8*, i8** %2
%7 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %3, i64 %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c" About to free %p(%ld): %s\0A\00"
define void @func5_print_but_do_not_free_string(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %0, i64 %2, i8* %0)
ret void
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ putchar(int /*<<< orphan*/);
int /*<<< orphan*/ toupper(int);
int main() {
  int ch;
  while ((ch = getchar()) != EOF) {
    putchar(toupper(ch));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2e98(%rip),%rcx
cmp    (%rcx),%eax
je     116c <main+0x3c>
mov    -0x8(%rbp),%edi
call   1040 <toupper@plt>
mov    %eax,%edi
call   1030 <putchar@plt>
jmp    113f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <getchar@plt>
mov    0x2ea9(%rip),%rbx
cmp    (%rbx),%eax
je     1169 <main+0x39>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%edi
call   1040 <toupper@plt>
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
cmp    (%rbx),%eax
jne    1150 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = call i32 (...) @getchar()
store i32 %4, i32* %2
%5 = load i32, i32* @EOF
%6 = icmp ne i32 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = load i32, i32* %2
%9 = call i32 @toupper(i32 %8)
%10 = call i32 @putchar(i32 %9)
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %11, label %4
4: ; preds = %0, %4
%5 = phi i32 [ %8, %4 ], [ %1, %0 ]
%6 = tail call i32 @toupper(i32 %5)
%7 = tail call i32 @putchar(i32 %6)
%8 = tail call i32 (...) @getchar()
%9 = load i32, i32* @EOF
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %4
11: ; preds = %4, %0
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t op_number(uint32_t a, uint32_t b) { return 0; }


x86 assembly (clang, -O0):
<op_number>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_number>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @op_number(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @op_number(i32 %0, i32 %1) {
ret i32 0
}
void initialize_hardware(void) {}


x86 assembly (clang, -O0):
<initialize_hardware>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_hardware>:
ret

LLVM IR (-O0):
define void @initialize_hardware() {
ret void
}

LLVM IR (-O2):
define void @initialize_hardware() {
ret void
}
void avformat_transfer_internal_stream_timing_info() {}


x86 assembly (clang, -O0):
<avformat_transfer_internal_stream_timing_info>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avformat_transfer_internal_stream_timing_info>:
ret

LLVM IR (-O0):
define void @avformat_transfer_internal_stream_timing_info() {
ret void
}

LLVM IR (-O2):
define void @avformat_transfer_internal_stream_timing_info() {
ret void
}
int f(int a) {
  if (a != 0) {
    a = a > 0 ? a : -a;
    if (a == 0)
      return 1;
    return 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1156 <f+0x56>
cmpl   $0x0,-0x8(%rbp)
jle    1126 <f+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112e <f+0x2e>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    114a <f+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    115d <f+0x5d>
movl   $0x0,-0x4(%rbp)
jmp    115d <f+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %20
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = load i32, i32* %3
br label %14
11: ; preds = %6
%12 = load i32, i32* %3
%13 = sub nsw i32 0, %12
br label %14
14: ; preds = %11, %9
%15 = phi i32 [ %10, %9 ], [ %13, %11 ]
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 1, i32* %2
br label %21
19: ; preds = %14
store i32 0, i32* %2
br label %21
20: ; preds = %1
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19, %18
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
ret i32 0
}
long nelln1(long a) { return -(a != 1); }


x86 assembly (clang, -O0):
<nelln1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x1,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<nelln1>:
xor    %eax,%eax
cmp    $0x1,%rdi
setne  %al
neg    %rax
ret

LLVM IR (-O0):
define i64 @nelln1(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 1
%5 = zext i1 %4 to i32
%6 = sub nsw i32 0, %5
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @nelln1(i64 %0) {
%2 = icmp ne i64 %0, 1
%3 = sext i1 %2 to i64
ret i64 %3
}
int test_imm_B0uint8_mem(unsigned char *val) {
  return ((*val) & (0xB0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B0uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xb0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B0uint8_mem>:
testb  $0xb0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B0uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 176
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B0uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -80
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int vmcoreinfo_item_ulong(unsigned long *, char *, char const *, int);
int dfi_vmcoreinfo_size(unsigned long *size, const char *sym) {
  return vmcoreinfo_item_ulong(size, "SIZE", sym, 10);
}


x86 assembly (clang, -O0):
<dfi_vmcoreinfo_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
mov    $0xa,%ecx
call   1030 <vmcoreinfo_item_ulong@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfi_vmcoreinfo_size>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
mov    $0xa,%ecx
jmp    1030 <vmcoreinfo_item_ulong@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"SIZE\00"
define i32 @dfi_vmcoreinfo_size(i64* %0, i8* %1) {
%3 = alloca i64*
%4 = alloca i8*
store i64* %0, i64** %3
store i8* %1, i8** %4
%5 = load i64*, i64** %3
%6 = load i8*, i8** %4
%7 = call i32 @vmcoreinfo_item_ulong(i64* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %6, i32 10)
ret i32 %7
}

LLVM IR (-O2):
@.str = [5 x i8] c"SIZE\00"
define i32 @dfi_vmcoreinfo_size(i64* %0, i8* %1) {
%3 = tail call i32 @vmcoreinfo_item_ulong(i64* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1, i32 10)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
void maybe_print_80(char line[], int len) {
  if (len > 80) {
    printf("Line longer than 80[%d]: %s", len, line);
  }
}


x86 assembly (clang, -O0):
<maybe_print_80>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x50,-0xc(%rbp)
jle    113c <maybe_print_80+0x2c>
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%rdx
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maybe_print_80>:
cmp    $0x51,%esi
jl     1124 <maybe_print_80+0x14>
mov    %rdi,%rdx
lea    0xee1(%rip),%rdi
jmp    1030 <printf@plt>
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Line longer than 80[%d]: %s\00"
define void @maybe_print_80(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 80
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %4
%9 = load i8*, i8** %3
%10 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %8, i8* %9)
br label %11
11: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"Line longer than 80[%d]: %s\00"
define void @maybe_print_80(i8* %0, i32 %1) {
%3 = icmp sgt i32 %1, 80
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %0)
br label %6
6: ; preds = %4, %2
ret void
}
unsigned int get_be24(unsigned int v_) {
  const unsigned char *v = (const unsigned char *)&v_;
  unsigned int r = v[0];
  r <<= 8;
  r |= v[1];
  r <<= 8;
  r |= v[2];
  return r;
}


x86 assembly (clang, -O0):
<get_be24>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x2(%rax),%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_be24>:
mov    %edi,%eax
shr    $0x10,%eax
rol    $0x8,%di
movzwl %di,%ecx
shl    $0x8,%ecx
movzbl %al,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @get_be24(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast i32* %2 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = shl i32 %10, 8
store i32 %11, i32* %4
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i32, i32* %4
%17 = or i32 %16, %15
store i32 %17, i32* %4
%18 = load i32, i32* %4
%19 = shl i32 %18, 8
store i32 %19, i32* %4
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 2
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i32, i32* %4
%25 = or i32 %24, %23
store i32 %25, i32* %4
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @get_be24(i32 %0) {
%2 = lshr i32 %0, 16
%3 = trunc i32 %0 to i16
%4 = tail call i16 @llvm.bswap.i16(i16 %3)
%5 = zext i16 %4 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = and i32 %2, 255
%8 = or i32 %6, %7
ret i32 %8
}
/* Type definitions */
struct task_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ run_cbs_gc(struct task_struct *);
void task_dead_rt(struct task_struct *p) { run_cbs_gc(p); }


x86 assembly (clang, -O0):
<task_dead_rt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <run_cbs_gc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_dead_rt>:
jmp    1030 <run_cbs_gc@plt>

LLVM IR (-O0):
%struct.task_struct = type { i32 }
define void @task_dead_rt(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
%3 = load %struct.task_struct*, %struct.task_struct** %2
%4 = call i32 @run_cbs_gc(%struct.task_struct* %3)
ret void
}

LLVM IR (-O2):
%struct.task_struct = type { i32 }
define void @task_dead_rt(%struct.task_struct* %0) {
%2 = tail call i32 @run_cbs_gc(%struct.task_struct* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t rtp2435_get_type(uint8_t *header) { return header[4]; }


x86 assembly (clang, -O0):
<rtp2435_get_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtp2435_get_type>:
mov    0x10(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @rtp2435_get_type(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @rtp2435_get_type(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
ret i32 %3
}
long IS_ERR(const void *ptr) {
  return ((unsigned long)ptr) >= (unsigned long)-524;
}


x86 assembly (clang, -O0):
<IS_ERR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffffdf4,%rax
setae  %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR>:
xor    %eax,%eax
cmp    $0xfffffffffffffdf4,%rdi
setae  %al
ret

LLVM IR (-O0):
define i64 @IS_ERR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp uge i64 %4, -524
%6 = zext i1 %5 to i32
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @IS_ERR(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 -525 to i8*)
%3 = zext i1 %2 to i64
ret i64 %3
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
uint32_t rtc_mem_read(uint32_t addr) { return ((uint32_t *)0x60001200)[addr]; }


x86 assembly (clang, -O0):
<rtc_mem_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x60001200,%eax
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_mem_read>:
mov    0x60001200(,%rdi,8),%rax
60
ret

LLVM IR (-O0):
define i64 @rtc_mem_read(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = getelementptr inbounds i64, i64* inttoptr (i64 1610617344 to i64*), i64 %3
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @rtc_mem_read(i64 %0) {
%2 = getelementptr inbounds i64, i64* inttoptr (i64 1610617344 to i64*), i64 %0
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xf1() {
  Assert_real((isprint(241) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1210, ("isprint should be 0 for 0xf1"));
}


x86 assembly (clang, -O0):
<t_isprint_0xf1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf1,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ba,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xf1>:
push   %rax
mov    $0xf1,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4ba,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xf1\00"
define void @t_isprint_0xf1() {
%1 = call i64 @isprint(i32 241)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xf1\00"
define void @t_isprint_0xf1() {
%1 = tail call i64 @isprint(i32 241)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}