xunge/DecIR huggingface dataset:
int fibonacci(int n) {
  if (n > 2)
    return fibonacci(n - 1) + fibonacci(n - 2);
  else if (n == 2)
    return 1;
  else if (n == 1)
    return 1;
  else if (n == 0)
    return 0;
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jle    114d <fibonacci+0x3d>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    119e <fibonacci+0x8e>
cmpl   $0x2,-0x8(%rbp)
jne    1163 <fibonacci+0x53>
movl   $0x1,-0x4(%rbp)
jmp    119e <fibonacci+0x8e>
cmpl   $0x1,-0x8(%rbp)
jne    1179 <fibonacci+0x69>
movl   $0x1,-0x4(%rbp)
jmp    119e <fibonacci+0x8e>
cmpl   $0x0,-0x8(%rbp)
jne    118f <fibonacci+0x7f>
movl   $0x0,-0x4(%rbp)
jmp    119e <fibonacci+0x8e>
jmp    1194 <fibonacci+0x84>
jmp    1199 <fibonacci+0x89>
jmp    119e <fibonacci+0x8e>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x3,%edi
jl     1136 <fibonacci+0x26>
xor    %ebp,%ebp
xchg   %ax,%ax
lea    -0x1(%rbx),%edi
call   1030 <fibonacci@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x4,%ebx
mov    %ecx,%ebx
ja     1120 <fibonacci+0x10>
jmp    1138 <fibonacci+0x28>
mov    %ebx,%ecx
cmp    $0x1,%ecx
sbb    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 2
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = call i32 @fibonacci(i32 %8)
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 2
%12 = call i32 @fibonacci(i32 %11)
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
br label %29
14: ; preds = %1
%15 = load i32, i32* %3
%16 = icmp eq i32 %15, 2
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 1, i32* %2
br label %29
18: ; preds = %14
%19 = load i32, i32* %3
%20 = icmp eq i32 %19, 1
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 1, i32* %2
br label %29
22: ; preds = %18
%23 = load i32, i32* %3
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22
store i32 0, i32* %2
br label %29
26: ; preds = %22
br label %27
27: ; preds = %26
br label %28
28: ; preds = %27
br label %29
29: ; preds = %6, %17, %21, %25, %28
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibonacci(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ugt i32 %4, 4
br i1 %10, label %3, label %11
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
%16 = add nsw i32 %12, %15
ret i32 %16
}
void test_no_clause() {
  int i;
#pragma omp master taskloop
  for (i = 0; i < 16; ++i)
    ;
#pragma omp master taskloop
  ++i;
}


x86 assembly (clang, -O0):
<test_no_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_no_clause+0x28>
jmp    111a <test_no_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_no_clause+0xb>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_no_clause>:
ret

LLVM IR (-O0):
define void @test_no_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
ret void
}

LLVM IR (-O2):
define void @test_no_clause() {
ret void
}
float vec3_dist2(const float a[3], const float b[3]) {
  float d[3];
  vec3_sub(a, b, d);
  return vec3_norm2(d);
}


x86 assembly (clang, -O0):
<vec3_dist2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
mov    $0x0,%al
call   1040 <vec3_sub@plt>
lea    -0x1c(%rbp),%rdi
mov    $0x0,%al
call   1030 <vec3_norm2@plt>
cvtsi2ss %eax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_dist2>:
push   %rbx
sub    $0x10,%rsp
lea    0x4(%rsp),%rbx
mov    %rbx,%rdx
xor    %eax,%eax
call   1040 <vec3_sub@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <vec3_norm2@plt>
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @vec3_dist2(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca [3 x float]
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %3
%7 = load float*, float** %4
%8 = getelementptr inbounds [3 x float], [3 x float]* %5, i64 0, i64 0
%9 = call i32 (float*, float*, float*, ...) bitcast (i32 (...)* @vec3_sub to i32 (float*, float*, float*, ...)*)(float* %6, float* %7, float* %8)
%10 = getelementptr inbounds [3 x float], [3 x float]* %5, i64 0, i64 0
%11 = call i32 (float*, ...) bitcast (i32 (...)* @vec3_norm2 to i32 (float*, ...)*)(float* %10)
%12 = sitofp i32 %11 to float
ret float %12
}

LLVM IR (-O2):
define float @vec3_dist2(float* %0, float* %1) {
%3 = alloca [3 x float]
%4 = bitcast [3 x float]* %3 to i8*
%5 = getelementptr inbounds [3 x float], [3 x float]* %3, i64 0, i64 0
%6 = call i32 (float*, float*, float*, ...) bitcast (i32 (...)* @vec3_sub to i32 (float*, float*, float*, ...)*)(float* %0, float* %1, float* %5)
%7 = call i32 (float*, ...) bitcast (i32 (...)* @vec3_norm2 to i32 (float*, ...)*)(float* %5)
%8 = sitofp i32 %7 to float
ret float %8
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_srai_epi16(int /*<<< orphan*/, int);
__m128i test_mm_srai_epi16(__m128i A) { return _mm_srai_epi16(A, 1); }


x86 assembly (clang, -O0):
<test_mm_srai_epi16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <_mm_srai_epi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_srai_epi16>:
mov    $0x1,%esi
jmp    1030 <_mm_srai_epi16@plt>

LLVM IR (-O0):
define i32 @test_mm_srai_epi16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_srai_epi16(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_srai_epi16(i32 %0) {
%2 = tail call i32 @_mm_srai_epi16(i32 %0, i32 1)
ret i32 %2
}
void coresight_cti_put(struct coresight_cti *cti) {}


x86 assembly (clang, -O0):
<coresight_cti_put>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<coresight_cti_put>:
ret

LLVM IR (-O0):
%struct.coresight_cti = type opaque
define void @coresight_cti_put(%struct.coresight_cti* %0) {
%2 = alloca %struct.coresight_cti*
store %struct.coresight_cti* %0, %struct.coresight_cti** %2
ret void
}

LLVM IR (-O2):
%struct.coresight_cti = type opaque
define void @coresight_cti_put(%struct.coresight_cti* nocapture %0) {
ret void
}
const char *gtCSVFilename(const char *pszBasename) { return pszBasename; }


x86 assembly (clang, -O0):
<gtCSVFilename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtCSVFilename>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @gtCSVFilename(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @gtCSVFilename(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int rand();
int randindex(int low, int high) { return rand() % (high - low) + low; }


x86 assembly (clang, -O0):
<randindex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randindex>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @randindex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = srem i32 %5, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @randindex(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub nsw i32 %1, %0
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
int cast_ushort_int_fast(unsigned short int x) { return (int)x; }


x86 assembly (clang, -O0):
<cast_ushort_int_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_ushort_int_fast>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cast_ushort_int_fast(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @cast_ushort_int_fast(i16 zeroext %0) {
%2 = zext i16 %0 to i32
ret i32 %2
}
int test_imm_EAint64_highword_reg(long long val) {
  return ((val >> 32) & (0xEA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EAint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xea,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EAint64_highword_reg>:
movabs $0xea00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EAint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 234
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EAint64_highword_reg(i64 %0) {
%2 = and i64 %0, 1005022347264
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void d2_putc(int fd, char c) { write(fd, &c, 1); }


x86 assembly (clang, -O0):
<d2_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2_putc>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @d2_putc(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = call i32 @write(i32 %5, i8* %4, i32 1)
ret void
}

LLVM IR (-O2):
define void @d2_putc(i32 %0, i8 signext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i32 @write(i32 %0, i8* %3, i32 1)
ret void
}
int ioCanRenameFileOfSize(char *pathString, int pathStringLength) { return 1; }


x86 assembly (clang, -O0):
<ioCanRenameFileOfSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioCanRenameFileOfSize>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ioCanRenameFileOfSize(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @ioCanRenameFileOfSize(i8* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int arch_intsize();
int /*<<< orphan*/ cgbss(char *, int);
int /*<<< orphan*/ gendata();
void genbss(char *name, int len) {
  gendata();
  cgbss(name, (len + arch_intsize() - 1) / arch_intsize() * arch_intsize());
}


x86 assembly (clang, -O0):
<genbss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <gendata@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    $0x0,%al
call   1040 <arch_intsize@plt>
mov    %eax,%ecx
mov    -0x24(%rbp),%eax
add    %ecx,%eax
sub    $0x1,%eax
mov    %eax,-0x20(%rbp)
mov    $0x0,%al
call   1040 <arch_intsize@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1040 <arch_intsize@plt>
mov    -0x1c(%rbp),%esi
mov    -0x18(%rbp),%rdi
imul   %eax,%esi
call   1050 <cgbss@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbss>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <gendata@plt>
xor    %eax,%eax
call   1040 <arch_intsize@plt>
add    %eax,%ebx
add    $0xffffffff,%ebx
xor    %eax,%eax
call   1040 <arch_intsize@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <arch_intsize@plt>
imul   %eax,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <cgbss@plt>

LLVM IR (-O0):
define void @genbss(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 (...) @gendata()
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 (...) @arch_intsize()
%9 = add nsw i32 %7, %8
%10 = sub nsw i32 %9, 1
%11 = call i32 (...) @arch_intsize()
%12 = sdiv i32 %10, %11
%13 = call i32 (...) @arch_intsize()
%14 = mul nsw i32 %12, %13
%15 = call i32 @cgbss(i8* %6, i32 %14)
ret void
}

LLVM IR (-O2):
define void @genbss(i8* %0, i32 %1) {
%3 = tail call i32 (...) @gendata()
%4 = tail call i32 (...) @arch_intsize()
%5 = add i32 %1, -1
%6 = add i32 %5, %4
%7 = tail call i32 (...) @arch_intsize()
%8 = sdiv i32 %6, %7
%9 = tail call i32 (...) @arch_intsize()
%10 = mul nsw i32 %9, %8
%11 = tail call i32 @cgbss(i8* %0, i32 %10)
ret void
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/);
int randint(int l, int u) {
  srand(time(0));
  return (int)(rand() % (u - l + 1) + l);
}


x86 assembly (clang, -O0):
<randint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randint>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @randint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @time(i32 0)
%6 = call i32 @srand(i32 %5)
%7 = call i32 (...) @rand()
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = sub nsw i32 %8, %9
%11 = add nsw i32 %10, 1
%12 = srem i32 %7, %11
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @randint(i32 %0, i32 %1) {
%3 = tail call i32 @time(i32 0)
%4 = tail call i32 @srand(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = sub i32 1, %0
%7 = add i32 %6, %1
%8 = srem i32 %5, %7
%9 = add nsw i32 %8, %0
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int ssock(int /*<<< orphan*/, char *);
int ssock_v4(char *port) { return ssock(AF_INET, port); }


x86 assembly (clang, -O0):
<ssock_v4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <ssock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssock_v4>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
jmp    1030 <ssock@plt>

LLVM IR (-O0):
@AF_INET = global i32 0
define i32 @ssock_v4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @AF_INET
%4 = load i8*, i8** %2
%5 = call i32 @ssock(i32 %3, i8* %4)
ret i32 %5
}

LLVM IR (-O2):
@AF_INET = global i32 0
define i32 @ssock_v4(i8* %0) {
%2 = load i32, i32* @AF_INET
%3 = tail call i32 @ssock(i32 %2, i8* %0)
ret i32 %3
}
void foo242() {}


x86 assembly (clang, -O0):
<foo242>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo242>:
ret

LLVM IR (-O0):
define void @foo242() {
ret void
}

LLVM IR (-O2):
define void @foo242() {
ret void
}
int main() {
  int a = 4;
  return (int)((int)3 + (int)a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 4, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 3, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 7
}
/* Variables and functions */
unsigned long tech_getTicks();
int /*<<< orphan*/ yield();
void task2(void *params) {
  unsigned char *var = (unsigned char *)params;
  unsigned long ticks, current;
  ticks = tech_getTicks();
  for (;;) {
    current = tech_getTicks();
    if (current - ticks > 1000) {
      ticks = current;
      *var = !*var;
      yield();
    }
  }
}


x86 assembly (clang, -O0):
<task2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <tech_getTicks@plt>
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1040 <tech_getTicks@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
cmp    $0x3e8,%rax
jbe    1186 <task2+0x66>
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    $0x0,%al
call   1030 <yield@plt>
jmp    113f <task2+0x1f>

x86 assembly (clang, -O2):
<task2>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <tech_getTicks@plt>
mov    %rax,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <tech_getTicks@plt>
mov    %rax,%rbx
sub    %r15,%rax
cmp    $0x3e9,%rax
jb     1140 <task2+0x20>
cmpb   $0x0,(%r14)
sete   (%r14)
xor    %eax,%eax
call   1030 <yield@plt>
mov    %rbx,%r15
jmp    1140 <task2+0x20>

LLVM IR (-O0):
define void @task2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %2
%6 = load i8*, i8** %2
store i8* %6, i8** %3
%7 = call i64 (...) @tech_getTicks()
store i64 %7, i64* %4
br label %8
8: ; preds = %24, %1
%9 = call i64 (...) @tech_getTicks()
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = load i64, i64* %4
%12 = sub i64 %10, %11
%13 = icmp ugt i64 %12, 1000
br i1 %13, label %14, label %24
14: ; preds = %8
%15 = load i64, i64* %5
store i64 %15, i64* %4
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = icmp ne i8 %17, 0
%19 = xor i1 %18, true
%20 = zext i1 %19 to i32
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %3
store i8 %21, i8* %22
%23 = call i32 (...) @yield()
br label %24
24: ; preds = %14, %8
br label %8
}

LLVM IR (-O2):
define void @task2(i8* nocapture %0) {
%2 = tail call i64 (...) @tech_getTicks()
br label %3
3: ; preds = %9, %1
%4 = phi i64 [ %6, %9 ], [ %2, %1 ]
br label %5
5: ; preds = %3, %5
%6 = tail call i64 (...) @tech_getTicks()
%7 = sub i64 %6, %4
%8 = icmp ugt i64 %7, 1000
br i1 %8, label %9, label %5
9: ; preds = %5
%10 = load i8, i8* %0
%11 = icmp eq i8 %10, 0
%12 = zext i1 %11 to i8
store i8 %12, i8* %0
%13 = tail call i32 (...) @yield()
br label %3
}
unsigned short int f37(unsigned short int x, int y) {
  return (x >> y) | (x << (8 * 2 - y));
}


x86 assembly (clang, -O0):
<f37>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    $0x10,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f37>:
mov    %esi,%ecx
mov    %edi,%eax
ror    %cl,%ax
ret

LLVM IR (-O0):
define zeroext i16 @f37(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i32, i32* %4
%8 = ashr i32 %6, %7
%9 = load i16, i16* %3
%10 = zext i16 %9 to i32
%11 = load i32, i32* %4
%12 = sub nsw i32 16, %11
%13 = shl i32 %10, %12
%14 = or i32 %8, %13
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @f37(i16 zeroext %0, i32 %1) {
%3 = trunc i32 %1 to i16
%4 = tail call i16 @llvm.fshr.i16(i16 %0, i16 %0, i16 %3)
ret i16 %4
}
/* Variables and functions */
int sysfs_modify_policy_min(unsigned int, unsigned long);
int cpufreq_modify_policy_min(unsigned int cpu, unsigned long min_freq) {
  return sysfs_modify_policy_min(cpu, min_freq);
}


x86 assembly (clang, -O0):
<cpufreq_modify_policy_min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <sysfs_modify_policy_min@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_modify_policy_min>:
jmp    1030 <sysfs_modify_policy_min@plt>

LLVM IR (-O0):
define i32 @cpufreq_modify_policy_min(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = call i32 @sysfs_modify_policy_min(i32 %5, i64 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cpufreq_modify_policy_min(i32 %0, i64 %1) {
%3 = tail call i32 @sysfs_modify_policy_min(i32 %0, i64 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ perf_reset_clock();
int /*<<< orphan*/ perf_start_clock();
void perf_reset_and_start_timer() {
  perf_reset_clock();
  perf_start_clock();
}


x86 assembly (clang, -O0):
<perf_reset_and_start_timer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <perf_reset_clock@plt>
mov    $0x0,%al
call   1030 <perf_start_clock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_reset_and_start_timer>:
push   %rax
xor    %eax,%eax
call   1040 <perf_reset_clock@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <perf_start_clock@plt>

LLVM IR (-O0):
define void @perf_reset_and_start_timer() {
%1 = call i32 (...) @perf_reset_clock()
%2 = call i32 (...) @perf_start_clock()
ret void
}

LLVM IR (-O2):
define void @perf_reset_and_start_timer() {
%1 = tail call i32 (...) @perf_reset_clock()
%2 = tail call i32 (...) @perf_start_clock()
ret void
}
/* Variables and functions */
int gRecv(int const, void *, int const);
int gRecvPktBody(const int sd, void *buf, const int bufLen) {
  if (sd < 0 || buf <= 0 || bufLen < 0)
    return -1;
  if (bufLen == 0)
    return 0;
  return (gRecv(sd, buf, bufLen));
}


x86 assembly (clang, -O0):
<gRecvPktBody>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1141 <gRecvPktBody+0x31>
cmpq   $0x0,-0x10(%rbp)
jbe    1141 <gRecvPktBody+0x31>
cmpl   $0x0,-0x14(%rbp)
jge    114d <gRecvPktBody+0x3d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1175 <gRecvPktBody+0x65>
cmpl   $0x0,-0x14(%rbp)
jne    1163 <gRecvPktBody+0x53>
movl   $0x0,-0x4(%rbp)
jmp    1175 <gRecvPktBody+0x65>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <gRecv@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gRecvPktBody>:
mov    $0xffffffff,%eax
test   %rsi,%rsi
je     112b <gRecvPktBody+0x1b>
mov    %edx,%ecx
or     %edi,%ecx
js     112b <gRecvPktBody+0x1b>
test   %edx,%edx
je     1129 <gRecvPktBody+0x19>
jmp    1030 <gRecv@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gRecvPktBody(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 0
br i1 %9, label %16, label %10
10: ; preds = %3
%11 = load i8*, i8** %6
%12 = icmp ule i8* %11, null
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32, i32* %7
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %13, %10, %3
store i32 -1, i32* %4
br label %26
17: ; preds = %13
%18 = load i32, i32* %7
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 0, i32* %4
br label %26
21: ; preds = %17
%22 = load i32, i32* %5
%23 = load i8*, i8** %6
%24 = load i32, i32* %7
%25 = call i32 @gRecv(i32 %22, i8* %23, i32 %24)
store i32 %25, i32* %4
br label %26
26: ; preds = %21, %20, %16
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @gRecvPktBody(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i8* %1, null
%5 = or i32 %2, %0
%6 = icmp slt i32 %5, 0
%7 = or i1 %4, %6
br i1 %7, label %12, label %8
8: ; preds = %3
%9 = icmp eq i32 %2, 0
br i1 %9, label %12, label %10
10: ; preds = %8
%11 = tail call i32 @gRecv(i32 %0, i8* %1, i32 %2)
br label %12
12: ; preds = %8, %3, %10
%13 = phi i32 [ %11, %10 ], [ -1, %3 ], [ 0, %8 ]
ret i32 %13
}
int sas_rle_is_special_byte(unsigned char last_byte) {
  return (last_byte == '@' || last_byte == ' ' || last_byte == '\0');
}


x86 assembly (clang, -O0):
<sas_rle_is_special_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x40,%ecx
mov    %al,-0x2(%rbp)
je     113b <sas_rle_is_special_byte+0x3b>
movzbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     113b <sas_rle_is_special_byte+0x3b>
movzbl -0x1(%rbp),%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sas_rle_is_special_byte>:
mov    $0x1,%eax
cmp    $0x20,%dil
je     1111 <sas_rle_is_special_byte+0x11>
cmp    $0x40,%dil
jne    1112 <sas_rle_is_special_byte+0x12>
ret
xor    %eax,%eax
test   %dil,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @sas_rle_is_special_byte(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 64
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = zext i8 %11 to i32
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @sas_rle_is_special_byte(i8 zeroext %0) {
switch i8 %0, label %2 [
i8 64, label %5
i8 32, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 0
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ]
ret i32 %6
}
void BUF_MEM_grow_clean(void) {}


x86 assembly (clang, -O0):
<BUF_MEM_grow_clean>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BUF_MEM_grow_clean>:
ret

LLVM IR (-O0):
define void @BUF_MEM_grow_clean() {
ret void
}

LLVM IR (-O2):
define void @BUF_MEM_grow_clean() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(unsigned char *, int, int, int /*<<< orphan*/ *);
unsigned short fa_read_u16(FILE *fp) {
  unsigned short cx;
  unsigned char temp[2];
  fread(temp, sizeof(*temp), 2, fp);
  cx = temp[0] | (temp[1] * 256);
  return cx;
}


x86 assembly (clang, -O0):
<fa_read_u16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <fread@plt>
movzbl -0xc(%rbp),%eax
movzbl -0xb(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fa_read_u16>:
push   %rax
mov    %rdi,%rcx
lea    0x6(%rsp),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <fread@plt>
movzwl 0x6(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i16 @fa_read_u16(i32* %0) {
%2 = alloca i32*
%3 = alloca i16
%4 = alloca [2 x i8]
store i32* %0, i32** %2
%5 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 0
%6 = load i32*, i32** %2
%7 = call i32 @fread(i8* %5, i32 1, i32 2, i32* %6)
%8 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 0
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = mul nsw i32 %13, 256
%15 = or i32 %10, %14
%16 = trunc i32 %15 to i16
store i16 %16, i16* %3
%17 = load i16, i16* %3
ret i16 %17
}

LLVM IR (-O2):
define zeroext i16 @fa_read_u16(i32* nocapture %0) {
%2 = alloca [2 x i8]
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%4 = call i32 @fread(i8* %3, i32 1, i32 2, i32* %0)
%5 = load i8, i8* %3
%6 = zext i8 %5 to i16
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 1
%8 = load i8, i8* %7
%9 = zext i8 %8 to i16
%10 = shl nuw i16 %9, 8
%11 = or i16 %10, %6
ret i16 %11
}
int main() {
  int a[3];
  a[0] = 0;
  a[1] = 0;
  a[2] = 0;
  return a[0];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
store i32 0, i32* %3
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 1
store i32 0, i32* %4
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 2
store i32 0, i32* %5
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ mpz_ptr;

/* Variables and functions */
int mpz_sgn(int /*<<< orphan*/);
int gmp_mpz_sign(mpz_ptr value) { return mpz_sgn(value); }


x86 assembly (clang, -O0):
<gmp_mpz_sign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <mpz_sgn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gmp_mpz_sign>:
jmp    1030 <mpz_sgn@plt>

LLVM IR (-O0):
define i32 @gmp_mpz_sign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @mpz_sgn(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @gmp_mpz_sign(i32 %0) {
%2 = tail call i32 @mpz_sgn(i32 %0)
ret i32 %2
}
/* Variables and functions */
unsigned long nam2num(char const *);
void *rtai_malloc(unsigned long, unsigned long);
void *rtai_shm_attach(const char *name, unsigned long size) {
  unsigned long name_as_num = nam2num(name);
  return rtai_malloc(name_as_num, size);
}


x86 assembly (clang, -O0):
<rtai_shm_attach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <nam2num@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rtai_malloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtai_shm_attach>:
push   %rbx
mov    %rsi,%rbx
call   1040 <nam2num@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <rtai_malloc@plt>

LLVM IR (-O0):
define i8* @rtai_shm_attach(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = call i64 @nam2num(i8* %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = call i8* @rtai_malloc(i64 %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @rtai_shm_attach(i8* %0, i64 %1) {
%3 = tail call i64 @nam2num(i8* %0)
%4 = tail call i8* @rtai_malloc(i64 %3, i64 %1)
ret i8* %4
}
indreg0imm1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{
  if ((*p0) <= 33)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<indreg0imm1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movswl (%rax),%eax
cmp    $0x21,%eax
jg     113b <indreg0imm1+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <indreg0imm1+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0imm1>:
xor    %eax,%eax
cmpw   $0x22,(%r8)
setl   %al
ret

LLVM IR (-O0):
define i32 @indreg0imm1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %12
%17 = load i16, i16* %16
%18 = sext i16 %17 to i32
%19 = icmp sle i32 %18, 33
br i1 %19, label %20, label %21
20: ; preds = %6
store i32 1, i32* %7
br label %22
21: ; preds = %6
store i32 0, i32* %7
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @indreg0imm1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture %4, i16* nocapture readnone %5) {
%7 = load i16, i16* %4
%8 = icmp slt i16 %7, 34
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_barrier_t;

/* Variables and functions */
int PTHREAD_BARRIER_SERIAL_THREAD;
int pthread_barrier_wait(int /*<<< orphan*/ *);
int my_pthread_barrier_wait(pthread_barrier_t *p) {
  int rc;
  rc = pthread_barrier_wait(p);
  if (rc == PTHREAD_BARRIER_SERIAL_THREAD)
    rc = 0;
  return rc;
}


x86 assembly (clang, -O0):
<my_pthread_barrier_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_barrier_wait@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2eb6(%rip),%rcx
cmp    (%rcx),%eax
jne    1141 <my_pthread_barrier_wait+0x31>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_barrier_wait>:
push   %rax
call   1030 <pthread_barrier_wait@plt>
mov    0x2ecb(%rip),%rcx
xor    %edx,%edx
cmp    (%rcx),%eax
cmove  %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@PTHREAD_BARRIER_SERIAL_THREAD = global i32 0
define i32 @my_pthread_barrier_wait(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @pthread_barrier_wait(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* @PTHREAD_BARRIER_SERIAL_THREAD
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %3
br label %10
10: ; preds = %9, %1
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@PTHREAD_BARRIER_SERIAL_THREAD = global i32 0
define i32 @my_pthread_barrier_wait(i32* %0) {
%2 = tail call i32 @pthread_barrier_wait(i32* %0)
%3 = load i32, i32* @PTHREAD_BARRIER_SERIAL_THREAD
%4 = icmp eq i32 %2, %3
%5 = select i1 %4, i32 0, i32 %2
ret i32 %5
}
/* Variables and functions */
size_t arr_util_getstep(double a, double b, double rate) {
  size_t steps = 0;
  double val = a;
  do {
    val += rate;
    steps++;
  } while (val < b);
  return steps;
}


x86 assembly (clang, -O0):
<arr_util_getstep>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
addsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
movsd  -0x28(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
ja     1125 <arr_util_getstep+0x25>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arr_util_getstep>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
addsd  %xmm2,%xmm0
add    $0x1,%rax
ucomisd %xmm0,%xmm1
ja     1110 <arr_util_getstep+0x10>
ret

LLVM IR (-O0):
define i64 @arr_util_getstep(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca i64
%8 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store i64 0, i64* %7
%9 = load double, double* %4
store double %9, double* %8
br label %10
10: ; preds = %16, %3
%11 = load double, double* %6
%12 = load double, double* %8
%13 = fadd double %12, %11
store double %13, double* %8
%14 = load i64, i64* %7
%15 = add i64 %14, 1
store i64 %15, i64* %7
br label %16
16: ; preds = %10
%17 = load double, double* %8
%18 = load double, double* %5
%19 = fcmp olt double %17, %18
br i1 %19, label %10, label %20
20: ; preds = %16
%21 = load i64, i64* %7
ret i64 %21
}

LLVM IR (-O2):
define i64 @arr_util_getstep(double %0, double %1, double %2) {
br label %4
4: ; preds = %4, %3
%5 = phi i64 [ 0, %3 ], [ %8, %4 ]
%6 = phi double [ %0, %3 ], [ %7, %4 ]
%7 = fadd double %6, %2
%8 = add i64 %5, 1
%9 = fcmp olt double %7, %1
br i1 %9, label %4, label %10
10: ; preds = %4
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ fatal_error(int);
scalar_t__ trasmetti_opzione(int, char);
void *r_stampa_contatti(void *id_c) {
  int id_connessione = *((int *)id_c);
  if (trasmetti_opzione(id_connessione, 'a'))
    fatal_error(id_connessione);
  return NULL;
}


x86 assembly (clang, -O0):
<r_stampa_contatti>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    $0x61,%esi
call   1030 <trasmetti_opzione@plt>
cmp    $0x0,%rax
je     1154 <r_stampa_contatti+0x34>
mov    -0xc(%rbp),%edi
call   1040 <fatal_error@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r_stampa_contatti>:
push   %rbx
mov    (%rdi),%ebx
mov    %ebx,%edi
mov    $0x61,%esi
call   1030 <trasmetti_opzione@plt>
test   %rax,%rax
je     113b <r_stampa_contatti+0x1b>
mov    %ebx,%edi
call   1040 <fatal_error@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @r_stampa_contatti(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i64 @trasmetti_opzione(i32 %7, i8 signext 97)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = call i32 @fatal_error(i32 %11)
br label %13
13: ; preds = %10, %1
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @r_stampa_contatti(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i64 @trasmetti_opzione(i32 %3, i8 signext 97)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @fatal_error(i32 %3)
br label %8
8: ; preds = %6, %1
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_getppid;
int /*<<< orphan*/ _real_syscall(int /*<<< orphan*/);
__attribute__((visibility("hidden"))) pid_t _real_getppid(void) {
  return (pid_t)_real_syscall(SYS_getppid);
}


x86 assembly (clang, -O0):
<_real_getppid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <_real_syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_real_getppid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <_real_syscall@plt>

LLVM IR (-O0):
@SYS_getppid = global i32 0
define hidden i32 @_real_getppid() {
%1 = load i32, i32* @SYS_getppid
%2 = call i32 @_real_syscall(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@SYS_getppid = global i32 0
define hidden i32 @_real_getppid() {
%1 = load i32, i32* @SYS_getppid
%2 = tail call i32 @_real_syscall(i32 %1)
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void put_be16_ptr(uint8_t *p, uint16_t v) {
  p[1] = (v & 0xFF);
  p[0] = (v >> 8);
}


x86 assembly (clang, -O0):
<put_be16_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_be16_ptr>:
movzbl %sil,%eax
mov    %eax,0x4(%rdi)
sar    $0x8,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @put_be16_ptr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 255
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 1
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 0
store i32 %10, i32* %12
ret void
}

LLVM IR (-O2):
define void @put_be16_ptr(i32* nocapture writeonly %0, i32 %1) {
%3 = and i32 %1, 255
%4 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %3, i32* %4
%5 = ashr i32 %1, 8
store i32 %5, i32* %0
ret void
}
void foo_2_2_1_1_1_1_1_2_2() {}


x86 assembly (clang, -O0):
<foo_2_2_1_1_1_1_1_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_1_1_1_1_1_2_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_1_1_1_1_1_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_1_1_1_1_1_2_2() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_noop_access(int /*<<< orphan*/ *);
extern int pthread_attr_destroy(pthread_attr_t *pattr) {
  pthread_noop_access(pattr);
  return 0;
}


x86 assembly (clang, -O0):
<pthread_attr_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_noop_access@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_destroy>:
push   %rax
call   1030 <pthread_noop_access@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pthread_attr_destroy(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pthread_noop_access(i32* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_attr_destroy(i32* %0) {
%2 = tail call i32 @pthread_noop_access(i32* %0)
ret i32 0
}
int fun758() { return 758; }


x86 assembly (clang, -O0):
<fun758>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2f6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun758>:
mov    $0x2f6,%eax
ret

LLVM IR (-O0):
define i32 @fun758() {
ret i32 758
}

LLVM IR (-O2):
define i32 @fun758() {
ret i32 758
}
/* Variables and functions */
int /*<<< orphan*/ ResetBuffer();
int /*<<< orphan*/ open_next_file();
next_file() {
  open_next_file();
  ResetBuffer();
}


x86 assembly (clang, -O0):
<next_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <open_next_file@plt>
mov    $0x0,%al
call   1030 <ResetBuffer@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_file>:
push   %rax
xor    %eax,%eax
call   1040 <open_next_file@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <ResetBuffer@plt>

LLVM IR (-O0):
define i32 @next_file() {
%1 = alloca i32
%2 = call i32 (...) @open_next_file()
%3 = call i32 (...) @ResetBuffer()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @next_file() {
%1 = tail call i32 (...) @open_next_file()
%2 = tail call i32 (...) @ResetBuffer()
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_mutex_lock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
void munge(pthread_mutex_t *m, int *v) {
  pthread_mutex_lock(m);
  *v = *v + 1;
  pthread_mutex_unlock(m);
}


x86 assembly (clang, -O0):
<munge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <pthread_mutex_lock@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<munge>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <pthread_mutex_lock@plt>
addl   $0x1,(%r14)
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <pthread_mutex_unlock@plt>

LLVM IR (-O0):
define void @munge(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = call i32 @pthread_mutex_lock(i32* %5)
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = add nsw i32 %8, 1
%10 = load i32*, i32** %4
store i32 %9, i32* %10
%11 = load i32*, i32** %3
%12 = call i32 @pthread_mutex_unlock(i32* %11)
ret void
}

LLVM IR (-O2):
define void @munge(i32* %0, i32* nocapture %1) {
%3 = tail call i32 @pthread_mutex_lock(i32* %0)
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
%6 = tail call i32 @pthread_mutex_unlock(i32* %0)
ret void
}
void deletevdifmark6muxstatistics(struct vdif_mark6_mux_statistics *stats) {}


x86 assembly (clang, -O0):
<deletevdifmark6muxstatistics>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<deletevdifmark6muxstatistics>:
ret

LLVM IR (-O0):
%struct.vdif_mark6_mux_statistics = type opaque
define void @deletevdifmark6muxstatistics(%struct.vdif_mark6_mux_statistics* %0) {
%2 = alloca %struct.vdif_mark6_mux_statistics*
store %struct.vdif_mark6_mux_statistics* %0, %struct.vdif_mark6_mux_statistics** %2
ret void
}

LLVM IR (-O2):
%struct.vdif_mark6_mux_statistics = type opaque
define void @deletevdifmark6muxstatistics(%struct.vdif_mark6_mux_statistics* nocapture %0) {
ret void
}
int test_imm_99uint8_mem(unsigned char *val) {
  return ((*val) & (0x99 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_99uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x99,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_99uint8_mem>:
testb  $0x99,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_99uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 153
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_99uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -103
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void USBFS_SOF_ISR(void) {}


x86 assembly (clang, -O0):
<USBFS_SOF_ISR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBFS_SOF_ISR>:
ret

LLVM IR (-O0):
define void @USBFS_SOF_ISR() {
ret void
}

LLVM IR (-O2):
define void @USBFS_SOF_ISR() {
ret void
}