xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ debug(char *, int /*<<< orphan*/);
int /*<<< orphan*/ getpid();
void sig_cleanup(int dummy) {
  (void)(dummy);
  debug("sig_cleanup (PID: %d)", getpid());
  cleanup();
}


x86 assembly (clang, -O0):
<sig_cleanup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xeb5(%rip),%rdi
call   1040 <debug@plt>
mov    $0x0,%al
call   1050 <cleanup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_cleanup>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1040 <debug@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <cleanup@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"sig_cleanup (PID: %d)\00"
define void @sig_cleanup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @getpid()
%5 = call i32 @debug(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 (...) @cleanup()
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"sig_cleanup (PID: %d)\00"
define void @sig_cleanup(i32 %0) {
%2 = tail call i32 (...) @getpid()
%3 = tail call i32 @debug(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 (...) @cleanup()
ret void
}
int test_imm_D2uint16_reg(unsigned short val) {
  return ((val) & (-0xD2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D2uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff2e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D2uint16_reg>:
test   $0xff2e,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D2uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -210
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D2uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -210
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
void mpack_store_u16(char *p, uint16_t val) {
  uint8_t *u = (uint8_t *)p;
  u[0] = (uint8_t)((val >> 8) & 0xFF);
  u[1] = (uint8_t)(val & 0xFF);
}


x86 assembly (clang, -O0):
<mpack_store_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpack_store_u16>:
mov    %esi,%eax
movzbl %ah,%ecx
mov    %rcx,(%rdi)
movzbl %al,%eax
mov    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @mpack_store_u16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
store i64* %7, i64** %5
%8 = load i32, i32* %4
%9 = ashr i32 %8, 8
%10 = and i32 %9, 255
%11 = sext i32 %10 to i64
%12 = load i64*, i64** %5
%13 = getelementptr inbounds i64, i64* %12, i64 0
store i64 %11, i64* %13
%14 = load i32, i32* %4
%15 = and i32 %14, 255
%16 = sext i32 %15 to i64
%17 = load i64*, i64** %5
%18 = getelementptr inbounds i64, i64* %17, i64 1
store i64 %16, i64* %18
ret void
}

LLVM IR (-O2):
define void @mpack_store_u16(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i64*
%4 = lshr i32 %1, 8
%5 = and i32 %4, 255
%6 = zext i32 %5 to i64
store i64 %6, i64* %3
%7 = and i32 %1, 255
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 8
%10 = bitcast i8* %9 to i64*
store i64 %8, i64* %10
ret void
}
int negate(int n) {
  int out = 0;
  int sign = n > 0 ? -1 : 1;
  while (n != 0) {
    out += sign;
    n += sign;
  }
  return out;
}


x86 assembly (clang, -O0):
<negate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovg  %ecx,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1145 <negate+0x45>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <negate+0x24>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<negate>:
xor    %eax,%eax
test   %edi,%edi
setle  %cl
je     1129 <negate+0x29>
mov    %cl,%al
lea    (%rax,%rax,1),%ecx
add    $0xffffffff,%ecx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
sub    %ecx,%eax
cmp    %eax,%edi
jne    1120 <negate+0x20>
neg    %eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @negate(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -1, i32 1
store i32 %8, i32* %4
br label %9
9: ; preds = %12, %1
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %4
%17 = load i32, i32* %2
%18 = add nsw i32 %17, %16
store i32 %18, i32* %2
br label %9
19: ; preds = %9
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @negate(i32 %0) {
%2 = icmp slt i32 %0, 1
%3 = select i1 %2, i32 1, i32 -1
%4 = icmp eq i32 %0, 0
br i1 %4, label %11, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %9, %5 ], [ %0, %1 ]
%7 = phi i32 [ %8, %5 ], [ 0, %1 ]
%8 = add nsw i32 %7, %3
%9 = add nsw i32 %6, %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %5
11: ; preds = %5, %1
%12 = phi i32 [ 0, %1 ], [ %8, %5 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("*%d*\n", 931);
  printf("*%2d*\n", 931);
  printf("*%10d*\n", 931);
  printf("*%-10d*\n", 931);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
lea    0xecf(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
lea    0xec5(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
lea    0xebc(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
lea    0xed3(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
lea    0xeca(%rip),%rdi
mov    $0x3a3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"*%d*\0A\00"
@.str.1 = [7 x i8] c"*%2d*\0A\00"
@.str.2 = [8 x i8] c"*%10d*\0A\00"
@.str.3 = [9 x i8] c"*%-10d*\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 931)
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 931)
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i32 931)
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 931)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"*%d*\0A\00"
@.str.1 = [7 x i8] c"*%2d*\0A\00"
@.str.2 = [8 x i8] c"*%10d*\0A\00"
@.str.3 = [9 x i8] c"*%-10d*\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 931)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 931)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i32 931)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 931)
ret i32 0
}
unsigned int fake_sysoff_status_query(void) { return 0; }


x86 assembly (clang, -O0):
<fake_sysoff_status_query>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fake_sysoff_status_query>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fake_sysoff_status_query() {
ret i32 0
}

LLVM IR (-O2):
define i32 @fake_sysoff_status_query() {
ret i32 0
}
int look_cond(naibupp, flg)
int **naibupp, flg;
{
  register int condrsl;
  int *naibup;
  naibup = *naibupp;
  condrsl = evlcond(&naibup);
  look_choose(&naibup, flg &= condrsl);
  *naibupp = naibup;
  return (flg);
}


x86 assembly (clang, -O0):
<look_cond>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <evlcond@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
and    -0xc(%rbp),%esi
mov    %esi,-0xc(%rbp)
lea    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1040 <look_choose@plt>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<look_cond>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %rdi,%rbx
mov    (%rdi),%rax
mov    %rax,(%rsp)
mov    %rsp,%r14
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <evlcond@plt>
mov    %eax,%ebp
and    %r15d,%ebp
mov    %r14,%rdi
mov    %ebp,%esi
xor    %eax,%eax
call   1040 <look_choose@plt>
mov    (%rsp),%rax
mov    %rax,(%rbx)
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @look_cond(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32** %0, i32*** %3
store i32 %1, i32* %4
%7 = load i32**, i32*** %3
%8 = load i32*, i32** %7
store i32* %8, i32** %6
%9 = call i32 (i32**, ...) bitcast (i32 (...)* @evlcond to i32 (i32**, ...)*)(i32** %6)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = and i32 %11, %10
store i32 %12, i32* %4
%13 = call i32 (i32**, i32, ...) bitcast (i32 (...)* @look_choose to i32 (i32**, i32, ...)*)(i32** %6, i32 %12)
%14 = load i32*, i32** %6
%15 = load i32**, i32*** %3
store i32* %14, i32** %15
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @look_cond(i32** nocapture %0, i32 %1) {
%3 = alloca i32*
%4 = bitcast i32** %3 to i8*
%5 = load i32*, i32** %0
store i32* %5, i32** %3
%6 = call i32 (i32**, ...) bitcast (i32 (...)* @evlcond to i32 (i32**, ...)*)(i32** %3)
%7 = and i32 %6, %1
%8 = call i32 (i32**, i32, ...) bitcast (i32 (...)* @look_choose to i32 (i32**, i32, ...)*)(i32** %3, i32 %7)
%9 = load i32*, i32** %3
store i32* %9, i32** %0
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int /*<<< orphan*/ CPU_SET(unsigned int, int /*<<< orphan*/ *);
int /*<<< orphan*/ CPU_ZERO(int /*<<< orphan*/ *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int sched_setaffinity(int /*<<< orphan*/, int, int /*<<< orphan*/ *);
void setaffinity_oncpu(unsigned int cpu) {
  cpu_set_t cpu_mask;
  int err;
  CPU_ZERO(&cpu_mask);
  CPU_SET(cpu, &cpu_mask);
  err = sched_setaffinity(0, sizeof(cpu_set_t), &cpu_mask);
  if (err) {
    perror("sched_setaffinity");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<setaffinity_oncpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <CPU_ZERO@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1070 <CPU_SET@plt>
xor    %edi,%edi
mov    $0x4,%esi
lea    -0x8(%rbp),%rdx
call   1030 <sched_setaffinity@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     11a3 <setaffinity_oncpu+0x53>
lea    0xe6c(%rip),%rdi
call   1050 <perror@plt>
mov    $0x1,%edi
call   1060 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setaffinity_oncpu>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <CPU_ZERO@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1070 <CPU_SET@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    %r14,%rdx
call   1030 <sched_setaffinity@plt>
test   %eax,%eax
jne    1188 <setaffinity_oncpu+0x38>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe71(%rip),%rdi
call   1050 <perror@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"sched_setaffinity\00"
define void @setaffinity_oncpu(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i32 @CPU_ZERO(i32* %3)
%6 = load i32, i32* %2
%7 = call i32 @CPU_SET(i32 %6, i32* %3)
%8 = call i32 @sched_setaffinity(i32 0, i32 4, i32* %3)
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = call i32 @perror(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"sched_setaffinity\00"
define void @setaffinity_oncpu(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @CPU_ZERO(i32* %2)
%5 = call i32 @CPU_SET(i32 %0, i32* %2)
%6 = call i32 @sched_setaffinity(i32 0, i32 4, i32* %2)
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = call i32 @perror(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %1
ret void
}
void int_marshal(i) int *i;
{
  DI_object_marshal(i);
  return;
}


x86 assembly (clang, -O0):
<int_marshal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <DI_object_marshal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_marshal>:
xor    %eax,%eax
jmp    1030 <DI_object_marshal@plt>

LLVM IR (-O0):
define void @int_marshal(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 (i32*, ...) bitcast (i32 (...)* @DI_object_marshal to i32 (i32*, ...)*)(i32* %3)
ret void
}

LLVM IR (-O2):
define void @int_marshal(i32* %0) {
%2 = tail call i32 (i32*, ...) bitcast (i32 (...)* @DI_object_marshal to i32 (i32*, ...)*)(i32* %0)
ret void
}
int utf32_is_non_character(unsigned long cp) {
  return ((0xfffeU == (0xffeffffeU & cp) || (cp >= 0xfdd0U && cp <= 0xfdefU)));
}


x86 assembly (clang, -O0):
<utf32_is_non_character>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xffeffffe,%rdx
and    -0x8(%rbp),%rdx
mov    $0x1,%al
mov    $0xfffe,%ecx
cmp    %rdx,%rcx
mov    %al,-0x9(%rbp)
je     1150 <utf32_is_non_character+0x50>
xor    %eax,%eax
cmpq   $0xfdd0,-0x8(%rbp)
mov    %al,-0xa(%rbp)
jb     114a <utf32_is_non_character+0x4a>
cmpq   $0xfdef,-0x8(%rbp)
setbe  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf32_is_non_character>:
mov    %edi,%eax
and    $0xffeffffe,%eax
cmp    $0xfffe,%eax
sete   %al
add    $0xffffffffffff0230,%rdi
cmp    $0x20,%rdi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @utf32_is_non_character(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 4293918718, %3
%5 = icmp eq i64 65534, %4
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i64, i64* %2
%8 = icmp uge i64 %7, 64976
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i64, i64* %2
%11 = icmp ule i64 %10, 65007
br label %12
12: ; preds = %9, %6
%13 = phi i1 [ false, %6 ], [ %11, %9 ]
br label %14
14: ; preds = %12, %1
%15 = phi i1 [ true, %1 ], [ %13, %12 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @utf32_is_non_character(i64 %0) {
%2 = and i64 %0, 4293918718
%3 = icmp eq i64 %2, 65534
%4 = add i64 %0, -64976
%5 = icmp ult i64 %4, 32
%6 = or i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
int fun397() { return 397; }


x86 assembly (clang, -O0):
<fun397>:
push   %rbp
mov    %rsp,%rbp
mov    $0x18d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun397>:
mov    $0x18d,%eax
ret

LLVM IR (-O0):
define i32 @fun397() {
ret i32 397
}

LLVM IR (-O2):
define i32 @fun397() {
ret i32 397
}
unsigned int min(unsigned int a, unsigned int b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
float tdNoiseAt(int x, int y) {
  return ((x * 13241 * y + y * 33455927) % 9293) / 4646. - 1.0;
}


x86 assembly (clang, -O0):
<tdNoiseAt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x33b9,-0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
imul   $0x1fe7f37,-0x8(%rbp),%ecx
add    %ecx,%eax
mov    $0x244d,%ecx
cltd
idiv   %ecx
cvtsi2sd %edx,%xmm0
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xec2(%rip),%xmm1
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdNoiseAt>:
imul   $0x33b9,%edi,%eax
add    $0x1fe7f37,%eax
imul   %esi,%eax
cltq
imul   $0x70d5c4ff,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x2c,%rcx
add    %edx,%ecx
imul   $0x244d,%ecx,%ecx
sub    %ecx,%eax
cvtsi2sd %eax,%xmm0
divsd  0xec8(%rip),%xmm0
addsd  0xec8(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @tdNoiseAt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul nsw i32 %5, 13241
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
%9 = load i32, i32* %4
%10 = mul nsw i32 %9, 33455927
%11 = add nsw i32 %8, %10
%12 = srem i32 %11, 9293
%13 = sitofp i32 %12 to double
%14 = fdiv double %13, 4.646000e+03
%15 = fsub double %14, 1.000000e+00
%16 = fptrunc double %15 to float
ret float %16
}

LLVM IR (-O2):
define float @tdNoiseAt(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, 13241
%4 = add i32 %3, 33455927
%5 = mul i32 %4, %1
%6 = srem i32 %5, 9293
%7 = sitofp i32 %6 to double
%8 = fdiv double %7, 4.646000e+03
%9 = fadd double %8, -1.000000e+00
%10 = fptrunc double %9 to float
ret float %10
}
/* Type definitions */
struct ringbuffer {
  int dummy;
};
typedef int int32_t;

/* Variables and functions */
scalar_t__ calc_unused_space(struct ringbuffer *, int /*<<< orphan*/);
int32_t rb_is_full(struct ringbuffer *rb) {
  if (!rb) {
    return 1;
  }
  return calc_unused_space(rb, 0) == 0;
}


x86 assembly (clang, -O0):
<rb_is_full>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <rb_is_full+0x23>
movl   $0x1,-0x4(%rbp)
jmp    114d <rb_is_full+0x3d>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <calc_unused_space@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_is_full>:
test   %rdi,%rdi
je     112d <rb_is_full+0x1d>
push   %rax
xor    %esi,%esi
call   1030 <calc_unused_space@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.ringbuffer = type { i32 }
define i32 @rb_is_full(%struct.ringbuffer* %0) {
%2 = alloca i32
%3 = alloca %struct.ringbuffer*
store %struct.ringbuffer* %0, %struct.ringbuffer** %3
%4 = load %struct.ringbuffer*, %struct.ringbuffer** %3
%5 = icmp ne %struct.ringbuffer* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load %struct.ringbuffer*, %struct.ringbuffer** %3
%9 = call i64 @calc_unused_space(%struct.ringbuffer* %8, i32 0)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
store i32 %11, i32* %2
br label %12
12: ; preds = %7, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.ringbuffer = type { i32 }
define i32 @rb_is_full(%struct.ringbuffer* %0) {
%2 = icmp eq %struct.ringbuffer* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i64 @calc_unused_space(%struct.ringbuffer* %0, i32 0)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 1, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ start_testing();
int main(void) {
  printf("Starting to test.\n\n");
  start_testing();
  printf("\nCompleted all tests.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <start_testing@plt>
lea    0xecb(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <start_testing@plt>
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Starting to test.\0A\0A\00"
@.str.1 = [23 x i8] c"\0ACompleted all tests.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @start_testing()
%4 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [19 x i8] c"Starting to test.\0A\00"
@str.2 = [22 x i8] c"\0ACompleted all tests.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @start_testing()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct _rtext {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rtext_senditup(struct _rtext *, int /*<<< orphan*/, int *,
                                  int *, int *);
int rtext_width(struct _rtext *x) {
  int w = 0, h = 0, indx;
  rtext_senditup(x, 0, &w, &h, &indx);
  return (w);
}


x86 assembly (clang, -O0):
<rtext_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <rtext_senditup@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtext_width>:
sub    $0x18,%rsp
movl   $0x0,0xc(%rsp)
movl   $0x0,0x10(%rsp)
lea    0xc(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0x14(%rsp),%r8
xor    %esi,%esi
call   1030 <rtext_senditup@plt>
mov    0xc(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct._rtext = type { i32 }
define i32 @rtext_width(%struct._rtext* %0) {
%2 = alloca %struct._rtext*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store %struct._rtext* %0, %struct._rtext** %2
store i32 0, i32* %3
store i32 0, i32* %4
%6 = load %struct._rtext*, %struct._rtext** %2
%7 = call i32 @rtext_senditup(%struct._rtext* %6, i32 0, i32* %3, i32* %4, i32* %5)
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
%struct._rtext = type { i32 }
define i32 @rtext_width(%struct._rtext* %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%6 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%7 = bitcast i32* %4 to i8*
%8 = call i32 @rtext_senditup(%struct._rtext* %0, i32 0, i32* %2, i32* %3, i32* %4)
%9 = load i32, i32* %2
ret i32 %9
}
void PWMIntDisable(unsigned long ulBase, unsigned long ulChannel,
                   unsigned long ulIntType) {
  ;
  ;
  ;
  if (ulIntType == 0x00000001) {
    (*((volatile unsigned long *)(ulBase + 0x0000000C))) &= ~0x00000001;
  } else {
    (*((volatile unsigned long *)(ulBase + 0x0000000C))) &=
        ~(0x00000002 << ulChannel);
  }
}


x86 assembly (clang, -O0):
<PWMIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jne    1130 <PWMIntDisable+0x30>
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    %rcx,0xc(%rax)
jmp    1152 <PWMIntDisable+0x52>
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x2,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMIntDisable>:
mov    %rsi,%rcx
mov    $0x2,%eax
shl    %cl,%eax
cmp    $0x1,%rdx
not    %eax
cltq
mov    $0xfffffffffffffffe,%rcx
cmovne %rax,%rcx
and    %rcx,0xc(%rdi)
ret

LLVM IR (-O0):
define void @PWMIntDisable(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp eq i64 %7, 1
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i64, i64* %4
%11 = add i64 %10, 12
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, -2
store volatile i64 %14, i64* %12
br label %26
15: ; preds = %3
%16 = load i64, i64* %5
%17 = trunc i64 %16 to i32
%18 = shl i32 2, %17
%19 = xor i32 %18, -1
%20 = sext i32 %19 to i64
%21 = load i64, i64* %4
%22 = add i64 %21, 12
%23 = inttoptr i64 %22 to i64*
%24 = load volatile i64, i64* %23
%25 = and i64 %24, %20
store volatile i64 %25, i64* %23
br label %26
26: ; preds = %15, %9
ret void
}

LLVM IR (-O2):
define void @PWMIntDisable(i64 %0, i64 %1, i64 %2) {
%4 = icmp eq i64 %2, 1
%5 = trunc i64 %1 to i32
%6 = shl i32 2, %5
%7 = xor i32 %6, -1
%8 = sext i32 %7 to i64
%9 = select i1 %4, i64 -2, i64 %8
%10 = add i64 %0, 12
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, %9
store volatile i64 %13, i64* %11
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t srl_bytes_to_int32(unsigned char *buf, size_t offset) {
  int32_t bd = 0;
  int i;
  for (i = 0; i < 4; i++) {
    int32_t c = buf[i + offset];
    c <<= 24 - i * 8;
    bd |= c;
  }
  return bd;
}


x86 assembly (clang, -O0):
<srl_bytes_to_int32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x4,-0x18(%rbp)
jge    1163 <srl_bytes_to_int32+0x63>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
add    -0x10(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
shl    $0x3,%eax
mov    $0x18,%ecx
sub    %eax,%ecx
mov    -0x1c(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111a <srl_bytes_to_int32+0x1a>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<srl_bytes_to_int32>:
mov    (%rdi,%rsi,1),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @srl_bytes_to_int32(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %8
8: ; preds = %28, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 4
br i1 %10, label %11, label %31
11: ; preds = %8
%12 = load i8*, i8** %3
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = load i64, i64* %4
%16 = add i64 %14, %15
%17 = getelementptr inbounds i8, i8* %12, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
store i32 %19, i32* %7
%20 = load i32, i32* %6
%21 = mul nsw i32 %20, 8
%22 = sub nsw i32 24, %21
%23 = load i32, i32* %7
%24 = shl i32 %23, %22
store i32 %24, i32* %7
%25 = load i32, i32* %7
%26 = load i32, i32* %5
%27 = or i32 %26, %25
store i32 %27, i32* %5
br label %28
28: ; preds = %11
%29 = load i32, i32* %6
%30 = add nsw i32 %29, 1
store i32 %30, i32* %6
br label %8
31: ; preds = %8
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
define i32 @srl_bytes_to_int32(i8* nocapture %0, i64 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 %1
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = shl nuw i32 %5, 24
%7 = add i64 %1, 1
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl nuw nsw i32 %10, 16
%12 = or i32 %11, %6
%13 = add i64 %1, 2
%14 = getelementptr inbounds i8, i8* %0, i64 %13
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw nsw i32 %16, 8
%18 = or i32 %17, %12
%19 = add i64 %1, 3
%20 = getelementptr inbounds i8, i8* %0, i64 %19
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = or i32 %18, %22
ret i32 %23
}
void wifi_evt_sme_scanned(const struct wifi_msg_sme_scanned_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_sme_scanned>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_sme_scanned>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_scanned_evt_t = type opaque
define void @wifi_evt_sme_scanned(%struct.wifi_msg_sme_scanned_evt_t* %0) {
%2 = alloca %struct.wifi_msg_sme_scanned_evt_t*
store %struct.wifi_msg_sme_scanned_evt_t* %0, %struct.wifi_msg_sme_scanned_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_scanned_evt_t = type opaque
define void @wifi_evt_sme_scanned(%struct.wifi_msg_sme_scanned_evt_t* nocapture %0) {
ret void
}
/* Variables and functions */
void *realloc(void *, size_t);
void *tlib_realloc(void *ptr, size_t size) { return realloc(ptr, size); }


x86 assembly (clang, -O0):
<tlib_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tlib_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @tlib_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @tlib_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
ret i8* %3
}
int pft_inode_rename(struct inode *inode, struct dentry *dentry,
                     struct inode *new_inode, struct dentry *new_dentry) {
  return 0;
}


x86 assembly (clang, -O0):
<pft_inode_rename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pft_inode_rename>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.dentry = type opaque
define i32 @pft_inode_rename(%struct.inode* %0, %struct.dentry* %1, %struct.inode* %2, %struct.dentry* %3) {
%5 = alloca %struct.inode*
%6 = alloca %struct.dentry*
%7 = alloca %struct.inode*
%8 = alloca %struct.dentry*
store %struct.inode* %0, %struct.inode** %5
store %struct.dentry* %1, %struct.dentry** %6
store %struct.inode* %2, %struct.inode** %7
store %struct.dentry* %3, %struct.dentry** %8
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.dentry = type opaque
define i32 @pft_inode_rename(%struct.inode* nocapture readnone %0, %struct.dentry* nocapture readnone %1, %struct.inode* nocapture readnone %2, %struct.dentry* nocapture readnone %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ IntRegister(int, void (*)());
void SysTickIntRegister(void (*pfnHandler)(void)) {
  IntRegister(15, pfnHandler);
  (*((volatile unsigned long *)(0xE000E010))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<SysTickIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xf,%edi
call   1030 <IntRegister@plt>
mov    $0xe000e010,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0xe000e010,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysTickIntRegister>:
push   %rax
mov    %rdi,%rsi
mov    $0xf,%edi
call   1030 <IntRegister@plt>
mov    $0xe000e010,%eax
orq    $0x2,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @SysTickIntRegister(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @IntRegister(i32 15, void (...)* %4)
%6 = load volatile i64, i64* inttoptr (i64 3758153744 to i64*)
%7 = or i64 %6, 2
store volatile i64 %7, i64* inttoptr (i64 3758153744 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysTickIntRegister(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @IntRegister(i32 15, void (...)* %2)
%4 = load volatile i64, i64* inttoptr (i64 3758153744 to i64*)
%5 = or i64 %4, 2
store volatile i64 %5, i64* inttoptr (i64 3758153744 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
int /*<<< orphan*/ free(int *);
int *realloc(int *, uintptr_t);
bool *reallocBool(bool *old, uintptr_t numBools) {
  {};
  bool *new = NULL;
  if (numBools == 0) {
    free(old);
  } else {
    new = realloc(old, numBools * sizeof(bool));
    if (new == NULL) {
      fatal("Memory allocation error.\n");
    }
  }
  {};
  return new;
}


x86 assembly (clang, -O0):
<reallocBool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1161 <reallocBool+0x31>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
jmp    1192 <reallocBool+0x62>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
shl    $0x2,%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    118d <reallocBool+0x5d>
lea    0xe78(%rip),%rdi
call   1050 <fatal@plt>
jmp    1192 <reallocBool+0x62>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reallocBool>:
push   %rax
test   %rsi,%rsi
je     1146 <reallocBool+0x16>
shl    $0x2,%rsi
call   1040 <realloc@plt>
test   %rax,%rax
je     114d <reallocBool+0x1d>
pop    %rcx
ret
call   1030 <free@plt>
jmp    1159 <reallocBool+0x29>
lea    0xeac(%rip),%rdi
call   1050 <fatal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Memory allocation error.\0A\00"
define i32* @reallocBool(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32*
store i32* %0, i32** %3
store i64 %1, i64* %4
store i32* null, i32** %5
%6 = load i64, i64* %4
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32*, i32** %3
%10 = call i32 @free(i32* %9)
br label %21
11: ; preds = %2
%12 = load i32*, i32** %3
%13 = load i64, i64* %4
%14 = mul i64 %13, 4
%15 = call i32* @realloc(i32* %12, i64 %14)
store i32* %15, i32** %5
%16 = load i32*, i32** %5
%17 = icmp eq i32* %16, null
br i1 %17, label %18, label %20
18: ; preds = %11
%19 = call i32 @fatal(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %20
20: ; preds = %18, %11
br label %21
21: ; preds = %20, %8
%22 = load i32*, i32** %5
ret i32* %22
}

LLVM IR (-O2):
@.str = [26 x i8] c"Memory allocation error.\0A\00"
define noalias i32* @reallocBool(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @free(i32* %0)
br label %12
6: ; preds = %2
%7 = shl i64 %1, 2
%8 = tail call i32* @realloc(i32* %0, i64 %7)
%9 = icmp eq i32* %8, null
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = tail call i32 @fatal(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %6, %10, %4
%13 = phi i32* [ null, %4 ], [ null, %10 ], [ %8, %6 ]
ret i32* %13
}
int onesInRow(int row, int table[][16]) {
  int i, count = 0;
  for (i = 0; i < 16; i++)
    if (table[row][i] == 1)
      count++;
  return count;
}


x86 assembly (clang, -O0):
<onesInRow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x10,-0x14(%rbp)
jge    115c <onesInRow+0x5c>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
shl    $0x6,%rcx
add    %rcx,%rax
movslq -0x14(%rbp),%rcx
cmpl   $0x1,(%rax,%rcx,4)
jne    1149 <onesInRow+0x49>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    114e <onesInRow+0x4e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <onesInRow+0x19>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<onesInRow>:
movslq %edi,%rax
shl    $0x6,%rax
movdqu (%rsi,%rax,1),%xmm0
movdqu 0x10(%rsi,%rax,1),%xmm1
movdqu 0x20(%rsi,%rax,1),%xmm2
movdqu 0x30(%rsi,%rax,1),%xmm3
movdqa 0xeda(%rip),%xmm4
pcmpeqd %xmm4,%xmm3
pcmpeqd %xmm4,%xmm2
packssdw %xmm3,%xmm2
pcmpeqd %xmm4,%xmm1
pcmpeqd %xmm4,%xmm0
packssdw %xmm1,%xmm0
packsswb %xmm2,%xmm0
pmovmskb %xmm0,%eax
mov    %eax,%ecx
shr    %ecx
and    $0x5555,%ecx
sub    %ecx,%eax
mov    %eax,%ecx
and    $0x3333,%ecx
shr    $0x2,%eax
and    $0x3333,%eax
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %eax,%ecx
and    $0xf0f,%ecx
mov    %ecx,%eax
shl    $0x8,%eax
add    %ecx,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @onesInRow(i32 %0, [16 x i32]* %1) {
%3 = alloca i32
%4 = alloca [16 x i32]*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store [16 x i32]* %1, [16 x i32]** %4
store i32 0, i32* %6
store i32 0, i32* %5
br label %7
7: ; preds = %24, %2
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 16
br i1 %9, label %10, label %27
10: ; preds = %7
%11 = load [16 x i32]*, [16 x i32]** %4
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [16 x i32], [16 x i32]* %11, i64 %13
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds [16 x i32], [16 x i32]* %14, i64 0, i64 %16
%18 = load i32, i32* %17
%19 = icmp eq i32 %18, 1
br i1 %19, label %20, label %23
20: ; preds = %10
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %23
23: ; preds = %20, %10
br label %24
24: ; preds = %23
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 1
store i32 %26, i32* %5
br label %7
27: ; preds = %7
%28 = load i32, i32* %6
ret i32 %28
}

LLVM IR (-O2):
define i32 @onesInRow(i32 %0, [16 x i32]* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = getelementptr inbounds [16 x i32], [16 x i32]* %1, i64 %3, i64 0
%5 = bitcast i32* %4 to <16 x i32>*
%6 = load <16 x i32>, <16 x i32>* %5
%7 = icmp eq <16 x i32> %6, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%8 = bitcast <16 x i1> %7 to i16
%9 = call i16 @llvm.ctpop.i16(i16 %8)
%10 = zext i16 %9 to i32
ret i32 %10
}
/* Variables and functions */
scalar_t__ islower(int);
int toupper(int c) { return (islower(c) ? c + ('A' - 'a') : c); }


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     113b <toupper+0x2b>
mov    -0x4(%rbp),%eax
add    $0xffffffe0,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <toupper+0x31>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, -32
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_rwlock_wrlock(int /*<<< orphan*/ *);
void __attribute__((__unused__))
_hash_pthread_rwlock_wlock_hnode_hh(void *m,
                                    void *_HU_d __attribute__((__unused__))) {
  pthread_rwlock_t *rwlck = (pthread_rwlock_t *)m;
  pthread_rwlock_wrlock(rwlck);
}


x86 assembly (clang, -O0):
<_hash_pthread_rwlock_wlock_hnode_hh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <pthread_rwlock_wrlock@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hash_pthread_rwlock_wlock_hnode_hh>:
jmp    1030 <pthread_rwlock_wrlock@plt>

LLVM IR (-O0):
define void @_hash_pthread_rwlock_wlock_hnode_hh(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = call i32 @pthread_rwlock_wrlock(i32* %8)
ret void
}

LLVM IR (-O2):
define void @_hash_pthread_rwlock_wlock_hnode_hh(i8* %0, i8* nocapture readnone %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i32 @pthread_rwlock_wrlock(i32* %3)
ret void
}
/* Variables and functions */
scalar_t__ check_number(char *);
scalar_t__ check_year(char *);
int strlen(char *);
int valid_id(char *id) {
  if (strlen(id) != 10)
    return 0;
  if (check_year(id) && check_number(id))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<valid_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0xa,%eax
je     115a <valid_id+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1193 <valid_id+0x63>
mov    -0x10(%rbp),%rdi
call   1040 <check_year@plt>
cmp    $0x0,%rax
je     118c <valid_id+0x5c>
mov    -0x10(%rbp),%rdi
call   1050 <check_number@plt>
cmp    $0x0,%rax
je     118c <valid_id+0x5c>
movl   $0x1,-0x4(%rbp)
jmp    1193 <valid_id+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_id>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xa,%ecx
jne    1164 <valid_id+0x34>
mov    %rbx,%rdi
call   1040 <check_year@plt>
test   %rax,%rax
je     1166 <valid_id+0x36>
mov    %rbx,%rdi
call   1050 <check_number@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1166 <valid_id+0x36>
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @valid_id(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @strlen(i8* %4)
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %18
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @check_year(i8* %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %8
%13 = load i8*, i8** %3
%14 = call i64 @check_number(i8* %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 1, i32* %2
br label %18
17: ; preds = %12, %8
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @valid_id(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp eq i32 %2, 10
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i64 @check_year(i8* %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = tail call i64 @check_number(i8* %0)
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %4
br label %11
11: ; preds = %7, %1, %10
%12 = phi i32 [ 0, %10 ], [ 0, %1 ], [ 1, %7 ]
ret i32 %12
}
long __TBB_machine_fetchadd4(volatile void *ptr, long addend) {
  long result;
  __asm__ __volatile__("lock\nxadd %0,%1"
                       : "=r"(result), "=m"(*(int *)ptr)
                       : "0"(addend), "m"(*(int *)ptr)
                       : "memory");
  return result;
}


x86 assembly (clang, -O0):
<__TBB_machine_fetchadd4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
lock xadd %rax,(%rcx)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__TBB_machine_fetchadd4>:
mov    %rsi,%rax
lock xadd %rax,(%rdi)
ret

LLVM IR (-O0):
define i64 @__TBB_machine_fetchadd4(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
%8 = load i64, i64* %4
%9 = load i8*, i8** %3
%10 = bitcast i8* %9 to i32*
%11 = call i64 asm sideeffect "lock\0Axadd $0,$1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %7, i64 %8, i32* elementtype(i32) %10)
store i64 %11, i64* %5
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @__TBB_machine_fetchadd4(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i64 asm sideeffect "lock\0Axadd $0,$1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %3, i64 %1, i32* elementtype(i32) %3)
ret i64 %4
}
void i915_pmu_unregister(struct drm_i915_private *i915) {}


x86 assembly (clang, -O0):
<i915_pmu_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<i915_pmu_unregister>:
ret

LLVM IR (-O0):
%struct.drm_i915_private = type opaque
define void @i915_pmu_unregister(%struct.drm_i915_private* %0) {
%2 = alloca %struct.drm_i915_private*
store %struct.drm_i915_private* %0, %struct.drm_i915_private** %2
ret void
}

LLVM IR (-O2):
%struct.drm_i915_private = type opaque
define void @i915_pmu_unregister(%struct.drm_i915_private* nocapture %0) {
ret void
}
int ls_cost_nm2_n_in(void) { return 2; }


x86 assembly (clang, -O0):
<ls_cost_nm2_n_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm2_n_in>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @ls_cost_nm2_n_in() {
ret i32 2
}

LLVM IR (-O2):
define i32 @ls_cost_nm2_n_in() {
ret i32 2
}
int test_imm_A3uint16_reg(unsigned short val) {
  return ((val) & (-0xA3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A3uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff5d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A3uint16_reg>:
test   $0xff5d,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A3uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -163
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A3uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -163
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int run(char *);
int main(int argc, char **argv) { return run(argv[1]); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <run@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x8(%rsi),%rdi
jmp    1030 <run@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @run(i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @run(i8* %4)
ret i32 %5
}