xunge/DecIR huggingface dataset:
long double __attribute__((no)) fcmovnb(long flags) {
  long double out;
  asm("\n"
      "	push	%1"
      "\n"
      "	popf"
      "\n"
      "	fldpi"
      "\n"
      "	fld1"
      "\n"
      "	"
      "fcmovnb"
      " %%st(1), %%st"
      "\n"
      "	ffree	%%st(1)"
      "\n"
      : "=t"(out)
      : "r"(flags));
  return out;
}


x86 assembly (clang, -O0):
<fcmovnb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
push   %rax
popf
fldpi
fld1
fcmovnb %st(1),%st
ffree  %st(1)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcmovnb>:
push   %rdi
popf
fldpi
fld1
fcmovnb %st(1),%st
ffree  %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fcmovnb(i64 %0) {
%2 = alloca i64
%3 = alloca x86_fp80
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call x86_fp80 asm "\0A\09push\09$1\0A\09popf\0A\09fldpi\0A\09fld1\0A\09fcmovnb %st(1), %st\0A\09ffree\09%st(1)\0A", "={st},r,~{dirflag},~{fpsr},~{flags}"(i64 %4)
store x86_fp80 %5, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @fcmovnb(i64 %0) {
%2 = tail call x86_fp80 asm "\0A\09push\09$1\0A\09popf\0A\09fldpi\0A\09fld1\0A\09fcmovnb %st(1), %st\0A\09ffree\09%st(1)\0A", "={st},r,~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int /*<<< orphan*/ com_flush();
int /*<<< orphan*/ com_putc(int /*<<< orphan*/);
void com_puts(const char *text) {
  while (*text) {
    com_flush();
    com_putc(*text++);
  }
}


x86 assembly (clang, -O0):
<com_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115c <com_puts+0x3c>
mov    $0x0,%al
call   1030 <com_flush@plt>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1040 <com_putc@plt>
jmp    112c <com_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<com_puts>:
push   %rbx
cmpb   $0x0,(%rdi)
je     1149 <com_puts+0x29>
mov    %rdi,%rbx
add    $0x1,%rbx
nopl   (%rax)
xor    %eax,%eax
call   1030 <com_flush@plt>
movsbl -0x1(%rbx),%edi
call   1040 <com_putc@plt>
cmpb   $0x0,(%rbx)
lea    0x1(%rbx),%rbx
jne    1130 <com_puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @com_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = call i32 (...) @com_flush()
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = call i32 @com_putc(i32 %12)
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @com_puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %0, %1 ]
%6 = tail call i32 (...) @com_flush()
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = load i8, i8* %5
%9 = sext i8 %8 to i32
%10 = tail call i32 @com_putc(i32 %9)
%11 = load i8, i8* %7
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char *argv[]) {
  if (argc != 3) {
    printf("wrong argc!");
    return 1;
  }
  printf("%s, %s", argv[1], argv[2]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x8(%rbp)
je     114a <main+0x3a>
lea    0xec9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    116f <main+0x5f>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rdx
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
cmp    $0x3,%edi
jne    1133 <main+0x23>
mov    0x8(%rsi),%rax
mov    0x10(%rsi),%rdx
lea    0xee7(%rip),%rdi
xor    %ebx,%ebx
mov    %rax,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
jmp    1146 <main+0x36>
lea    0xec6(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"wrong argc!\00"
@.str.1 = [7 x i8] c"%s, %s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 3
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %3
br label %18
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 2
%16 = load i8*, i8** %15
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %13, i8* %16)
store i32 0, i32* %3
br label %18
18: ; preds = %10, %8
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [12 x i8] c"wrong argc!\00"
@.str.1 = [7 x i8] c"%s, %s\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 3
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %12
6: ; preds = %2
%7 = getelementptr inbounds i8*, i8** %1, i64 1
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8*, i8** %1, i64 2
%10 = load i8*, i8** %9
%11 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %8, i8* %10)
br label %12
12: ; preds = %6, %4
%13 = phi i32 [ 1, %4 ], [ 0, %6 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int sctp_unregisterStdinCallback();
int /*<<< orphan*/ stderr;
int SCTP_unregisterStdinCallback() {
  int result;
  if ((result = sctp_unregisterStdinCallback()) < 0) {
    fprintf(stderr,
            "sctp_unregisterStdinCallback: error value (%i) returned.\n",
            result);
    fflush(stderr);
  }
  return result;
}


x86 assembly (clang, -O0):
<SCTP_unregisterStdinCallback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <sctp_unregisterStdinCallback@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    1171 <SCTP_unregisterStdinCallback+0x41>
mov    0x2e8e(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xea2(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCTP_unregisterStdinCallback>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <sctp_unregisterStdinCallback@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1161 <SCTP_unregisterStdinCallback+0x31>
mov    0x2e98(%rip),%r14
mov    (%r14),%edi
lea    0xeae(%rip),%rsi
mov    %ebx,%edx
call   1040 <fprintf@plt>
mov    (%r14),%edi
call   1050 <fflush@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [58 x i8] c"sctp_unregisterStdinCallback: error value (%i) returned.\0A\00"
define i32 @SCTP_unregisterStdinCallback() {
%1 = alloca i32
%2 = call i32 (...) @sctp_unregisterStdinCallback()
store i32 %2, i32* %1
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %0
%5 = load i32, i32* @stderr
%6 = load i32, i32* %1
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* @stderr
%9 = call i32 @fflush(i32 %8)
br label %10
10: ; preds = %4, %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [58 x i8] c"sctp_unregisterStdinCallback: error value (%i) returned.\0A\00"
define i32 @SCTP_unregisterStdinCallback() {
%1 = tail call i32 (...) @sctp_unregisterStdinCallback()
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i32 %1)
%6 = load i32, i32* @stderr
%7 = tail call i32 @fflush(i32 %6)
br label %8
8: ; preds = %3, %0
ret i32 %1
}
/* Type definitions */
struct isal_zstream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ isal_deflate_icf_finish_hash_map_base(struct isal_zstream *);
void isal_deflate_icf_finish_lvl3(struct isal_zstream *stream) {
  isal_deflate_icf_finish_hash_map_base(stream);
}


x86 assembly (clang, -O0):
<isal_deflate_icf_finish_lvl3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <isal_deflate_icf_finish_hash_map_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isal_deflate_icf_finish_lvl3>:
jmp    1030 <isal_deflate_icf_finish_hash_map_base@plt>

LLVM IR (-O0):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_icf_finish_lvl3(%struct.isal_zstream* %0) {
%2 = alloca %struct.isal_zstream*
store %struct.isal_zstream* %0, %struct.isal_zstream** %2
%3 = load %struct.isal_zstream*, %struct.isal_zstream** %2
%4 = call i32 @isal_deflate_icf_finish_hash_map_base(%struct.isal_zstream* %3)
ret void
}

LLVM IR (-O2):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_icf_finish_lvl3(%struct.isal_zstream* %0) {
%2 = tail call i32 @isal_deflate_icf_finish_hash_map_base(%struct.isal_zstream* %0)
ret void
}
char *Sys_GetClipboardData(void) { return ((void *)0); }


x86 assembly (clang, -O0):
<Sys_GetClipboardData>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_GetClipboardData>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @Sys_GetClipboardData() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @Sys_GetClipboardData() {
ret i8* null
}
/* Variables and functions */
void *nullary_emit(void *, size_t, int);
void *bu_bzero(void *dst, size_t n) {
  return nullary_emit(dst, n, (0 | 0 | 0 | 0));
}


x86 assembly (clang, -O0):
<bu_bzero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <nullary_emit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bu_bzero>:
xor    %edx,%edx
jmp    1030 <nullary_emit@plt>

LLVM IR (-O0):
define i8* @bu_bzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @nullary_emit(i8* %5, i64 %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @bu_bzero(i8* %0, i64 %1) {
%3 = tail call i8* @nullary_emit(i8* %0, i64 %1, i32 0)
ret i8* %3
}
int is_concordable(char *word, int *charmap) {
  unsigned char *cptr;
  for (cptr = (unsigned char *)word; *cptr != 0; cptr++)
    if ((charmap[*cptr] & 0x1000) != 0)
      break;
  return (*cptr == 0);
}


x86 assembly (clang, -O0):
<is_concordable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
je     115b <is_concordable+0x5b>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movzbl (%rcx),%ecx
mov    (%rax,%rcx,4),%eax
and    $0x1000,%eax
cmp    $0x0,%eax
je     1145 <is_concordable+0x45>
jmp    115b <is_concordable+0x5b>
jmp    114a <is_concordable+0x4a>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <is_concordable+0x14>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_concordable>:
mov    (%rdi),%dl
test   %dl,%dl
je     112c <is_concordable+0x2c>
add    $0x1,%rdi
mov    $0x1000,%ecx
nop
movzbl %dl,%eax
mov    (%rsi,%rax,4),%eax
and    %ecx,%eax
jne    1125 <is_concordable+0x25>
movzbl (%rdi),%edx
add    $0x1,%rdi
test   %dl,%dl
jne    1110 <is_concordable+0x10>
shr    $0xc,%eax
xor    $0x1,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_concordable(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i8*
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %23, %2
%8 = load i8*, i8** %5
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %7
%13 = load i32*, i32** %4
%14 = load i8*, i8** %5
%15 = load i8, i8* %14
%16 = zext i8 %15 to i64
%17 = getelementptr inbounds i32, i32* %13, i64 %16
%18 = load i32, i32* %17
%19 = and i32 %18, 4096
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %12
br label %26
22: ; preds = %12
br label %23
23: ; preds = %22
%24 = load i8*, i8** %5
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %5
br label %7
26: ; preds = %21, %7
%27 = load i8*, i8** %5
%28 = load i8, i8* %27
%29 = zext i8 %28 to i32
%30 = icmp eq i32 %29, 0
%31 = zext i1 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @is_concordable(i8* nocapture %0, i32* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %20, label %8
5: ; preds = %8
%6 = load i8, i8* %16
%7 = icmp eq i8 %6, 0
br i1 %7, label %17, label %8
8: ; preds = %2, %5
%9 = phi i8 [ %6, %5 ], [ %3, %2 ]
%10 = phi i8* [ %16, %5 ], [ %0, %2 ]
%11 = zext i8 %9 to i64
%12 = getelementptr inbounds i32, i32* %1, i64 %11
%13 = load i32, i32* %12
%14 = and i32 %13, 4096
%15 = icmp eq i32 %14, 0
%16 = getelementptr inbounds i8, i8* %10, i64 1
br i1 %15, label %5, label %17
17: ; preds = %8, %5
%18 = lshr exact i32 %14, 12
%19 = xor i32 %18, 1
br label %20
20: ; preds = %17, %2
%21 = phi i32 [ 1, %2 ], [ %19, %17 ]
ret i32 %21
}
/* Variables and functions */
scalar_t__ malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *strdup(const char *s) {
  char *sret;
  size_t len;
  len = strlen(s) + 1;
  if ((sret = (char *)malloc(len)) == NULL) {
    return NULL;
  }
  memcpy(sret, s, len);
  return sret;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1172 <strdup+0x42>
movq   $0x0,-0x8(%rbp)
jmp    118b <strdup+0x5b>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
test   %rax,%rax
je     1163 <strdup+0x33>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
jmp    1165 <strdup+0x35>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = add nsw i32 %7, 1
%9 = sext i32 %8 to i64
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = call i64 @malloc(i64 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %4
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %15
14: ; preds = %1
store i8* null, i8** %2
br label %21
15: ; preds = %1
%16 = load i8*, i8** %4
%17 = load i8*, i8** %3
%18 = load i64, i64* %5
%19 = call i32 @memcpy(i8* %16, i8* %17, i64 %18)
%20 = load i8*, i8** %4
store i8* %20, i8** %2
br label %21
21: ; preds = %15, %14
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i64 @malloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i64 %5, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @memcpy(i8* %6, i8* %0, i64 %4)
br label %10
10: ; preds = %1, %8
%11 = phi i8* [ %6, %8 ], [ null, %1 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ testQuickSort();
void runTests() { testQuickSort(); }


x86 assembly (clang, -O0):
<runTests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <testQuickSort@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<runTests>:
xor    %eax,%eax
jmp    1030 <testQuickSort@plt>

LLVM IR (-O0):
define void @runTests() {
%1 = call i32 (...) @testQuickSort()
ret void
}

LLVM IR (-O2):
define void @runTests() {
%1 = tail call i32 (...) @testQuickSort()
ret void
}
void d2i_ASN1_SET(void) {}


x86 assembly (clang, -O0):
<d2i_ASN1_SET>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_ASN1_SET>:
ret

LLVM IR (-O0):
define void @d2i_ASN1_SET() {
ret void
}

LLVM IR (-O2):
define void @d2i_ASN1_SET() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x49() {
  Assert_real((isalnum(73)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              370, ("isalnum should be 1 for I"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x49>:
push   %rbp
mov    %rsp,%rbp
mov    $0x49,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x172,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x49>:
push   %rax
mov    $0x49,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x172,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for I\00"
define void @t_isalnum_0x49() {
%1 = call i32 @isalnum(i32 73)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 370, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for I\00"
define void @t_isalnum_0x49() {
%1 = tail call i32 @isalnum(i32 73)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 370, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void puts(s) char *s;
{
  while (*s)
    putchar(*s++);
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1147 <puts+0x37>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <putchar@plt>
jmp    111c <puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1135 <puts+0x25>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
xor    %eax,%eax
call   1030 <putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 (i32, ...) bitcast (i32 (...)* @putchar to i32 (i32, ...)*)(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 (i32, ...) bitcast (i32 (...)* @putchar to i32 (i32, ...)*)(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
unsigned long namehash(const char *name, int len) {
  return len * *(unsigned char *)name;
}


x86 assembly (clang, -O0):
<namehash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
imul   %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<namehash>:
movzbl (%rdi),%ecx
movslq %esi,%rax
imul   %rcx,%rax
ret

LLVM IR (-O0):
define i64 @namehash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = mul nsw i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
define i64 @namehash(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = mul nsw i32 %4, %1
%6 = sext i32 %5 to i64
ret i64 %6
}
int GLOB_SYSTEM_FATAL_ERROR(void) { return 0; }


x86 assembly (clang, -O0):
<GLOB_SYSTEM_FATAL_ERROR>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLOB_SYSTEM_FATAL_ERROR>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @GLOB_SYSTEM_FATAL_ERROR() {
ret i32 0
}

LLVM IR (-O2):
define i32 @GLOB_SYSTEM_FATAL_ERROR() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef scalar_t__ caddr_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(scalar_t__, double *, int);
void ptr_set_double(void *arg1, int offset, double value) {
  memcpy((caddr_t)arg1 + offset, &value, sizeof(value));
}


x86 assembly (clang, -O0):
<ptr_set_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
lea    -0x18(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_set_double>:
push   %rax
movsd  %xmm0,(%rsp)
movslq %esi,%rax
add    %rax,%rdi
mov    %rsp,%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ptr_set_double(i8* %0, i32 %1, double %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca double
store i8* %0, i8** %4
store i32 %1, i32* %5
store double %2, double* %6
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = add nsw i64 %8, %10
%12 = call i32 @memcpy(i64 %11, double* %6, i32 8)
ret void
}

LLVM IR (-O2):
define void @ptr_set_double(i8* %0, i32 %1, double %2) {
%4 = alloca double
store double %2, double* %4
%5 = ptrtoint i8* %0 to i64
%6 = sext i32 %1 to i64
%7 = add nsw i64 %6, %5
%8 = call i32 @memcpy(i64 %7, double* %4, i32 8)
ret void
}
int main() {
  goto succ;
fail:
  return 1;
succ:
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %3
2: ; No predecessors!
store i32 1, i32* %1
br label %4
3: ; preds = %0
store i32 0, i32* %1
br label %4
4: ; preds = %3, %2
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void debug(char *fmt, ...) {}


x86 assembly (clang, -O0):
<debug>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug>:
ret

LLVM IR (-O0):
define void @debug(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @debug(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ V8_Fatal(char const *, int, char *, char const *,
                            char const *, int, int);
void CheckEqualsHelper(const char *file, int line, const char *expected_source,
                       int expected, const char *value_source, int value) {
  if (expected != value) {
    V8_Fatal(file, line,
             "CHECK_EQ(%s, %s) failed\n#   Expected: %i\n#   Found: %i",
             expected_source, value_source, expected, value);
  }
}


x86 assembly (clang, -O0):
<CheckEqualsHelper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x2c(%rbp),%eax
je     115f <CheckEqualsHelper+0x4f>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    -0x2c(%rbp),%eax
lea    0xea9(%rip),%rdx
mov    %eax,(%rsp)
call   1030 <V8_Fatal@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckEqualsHelper>:
mov    %ecx,%eax
cmp    %r9d,%ecx
je     112f <CheckEqualsHelper+0x1f>
push   %rax
mov    %rdx,%rcx
mov    %r9d,(%rsp)
lea    0xeda(%rip),%rdx
mov    %eax,%r9d
call   1030 <V8_Fatal@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [55 x i8] c"CHECK_EQ(%s, %s) failed\0A# Expected: %i\0A# Found: %i\00"
define void @CheckEqualsHelper(i8* %0, i32 %1, i8* %2, i32 %3, i8* %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i32
store i8* %0, i8** %7
store i32 %1, i32* %8
store i8* %2, i8** %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i32 %5, i32* %12
%13 = load i32, i32* %10
%14 = load i32, i32* %12
%15 = icmp ne i32 %13, %14
br i1 %15, label %16, label %24
16: ; preds = %6
%17 = load i8*, i8** %7
%18 = load i32, i32* %8
%19 = load i8*, i8** %9
%20 = load i8*, i8** %11
%21 = load i32, i32* %10
%22 = load i32, i32* %12
%23 = call i32 @V8_Fatal(i8* %17, i32 %18, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %19, i8* %20, i32 %21, i32 %22)
br label %24
24: ; preds = %16, %6
ret void
}

LLVM IR (-O2):
@.str = [55 x i8] c"CHECK_EQ(%s, %s) failed\0A# Expected: %i\0A# Found: %i\00"
define void @CheckEqualsHelper(i8* %0, i32 %1, i8* %2, i32 %3, i8* %4, i32 %5) {
%7 = icmp eq i32 %3, %5
br i1 %7, label %10, label %8
8: ; preds = %6
%9 = tail call i32 @V8_Fatal(i8* %0, i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %4, i32 %3, i32 %5)
br label %10
10: ; preds = %8, %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ __builtin_ia32_loaddqu(char const *);
__m128i _mm_loadu_si128(__m128i const *a) {
  return (__m128i)__builtin_ia32_loaddqu((const char *)a);
}


x86 assembly (clang, -O0):
<_mm_loadu_si128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__builtin_ia32_loaddqu@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_loadu_si128>:
jmp    1030 <__builtin_ia32_loaddqu@plt>

LLVM IR (-O0):
define i32 @_mm_loadu_si128(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = bitcast i32* %3 to i8*
%5 = call i32 @__builtin_ia32_loaddqu(i8* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @_mm_loadu_si128(i32* %0) {
%2 = bitcast i32* %0 to i8*
%3 = tail call i32 @__builtin_ia32_loaddqu(i8* %2)
ret i32 %3
}
int is_option(char *argv_element, int only) {
  return ((argv_element == 0) || (argv_element[0] == '-' && argv_element[1]) ||
          (only && argv_element[0] == '+'));
}


x86 assembly (clang, -O0):
<is_option>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%al
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
je     1166 <is_option+0x66>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
jne    1141 <is_option+0x41>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0xd(%rbp)
jne    1166 <is_option+0x66>
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xe(%rbp)
je     1160 <is_option+0x60>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2b,%eax
sete   %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_option>:
mov    $0x1,%eax
test   %rdi,%rdi
je     1117 <is_option+0x17>
mov    (%rdi),%cl
cmp    $0x2d,%cl
jne    1118 <is_option+0x18>
cmpb   $0x0,0x1(%rdi)
je     1118 <is_option+0x18>
ret
xor    %eax,%eax
test   %esi,%esi
je     1117 <is_option+0x17>
cmp    $0x2b,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @is_option(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %30, label %7
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 45
br i1 %12, label %13, label %19
13: ; preds = %7
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %30, label %19
19: ; preds = %13, %7
%20 = load i32, i32* %4
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %28
22: ; preds = %19
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i64 0
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp eq i32 %26, 43
br label %28
28: ; preds = %22, %19
%29 = phi i1 [ false, %19 ], [ %27, %22 ]
br label %30
30: ; preds = %28, %13, %2
%31 = phi i1 [ true, %13 ], [ true, %2 ], [ %29, %28 ]
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @is_option(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 45
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = getelementptr inbounds i8, i8* %0, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %7, %4
%12 = icmp eq i32 %1, 0
br i1 %12, label %16, label %13
13: ; preds = %11
%14 = icmp eq i8 %5, 43
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %11, %13, %7, %2
%17 = phi i32 [ 1, %7 ], [ 1, %2 ], [ 0, %11 ], [ %15, %13 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ insertion_sort(int *, int, int);
void shell_sort(int *input, int n) {
  int span = n / 2;
  while (span > 0) {
    insertion_sort(input, n, span);
    span = span / 2;
  }
}


x86 assembly (clang, -O0):
<shell_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1159 <shell_sort+0x49>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <insertion_sort@plt>
mov    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
jmp    112d <shell_sort+0x1d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shell_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    $0x2,%esi
jl     114b <shell_sort+0x3b>
mov    %esi,%r15d
mov    %rdi,%r14
mov    %esi,%ebx
mov    %r15d,%ebp
nopw   0x0(%rax,%rax,1)
shr    $0x1f,%ebp
add    %ebx,%ebp
sar    %ebp
mov    %r14,%rdi
mov    %r15d,%esi
mov    %ebp,%edx
call   1030 <insertion_sort@plt>
cmp    $0x3,%ebx
mov    %ebp,%ebx
jg     1130 <shell_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @shell_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sdiv i32 %6, 2
store i32 %7, i32* %5
br label %8
8: ; preds = %11, %2
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32*, i32** %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call i32 @insertion_sort(i32* %12, i32 %13, i32 %14)
%16 = load i32, i32* %5
%17 = sdiv i32 %16, 2
store i32 %17, i32* %5
br label %8
18: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @shell_sort(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = sdiv i32 %5, 2
%7 = tail call i32 @insertion_sort(i32* %0, i32 %1, i32 %6)
%8 = icmp sgt i32 %5, 3
br i1 %8, label %4, label %9
9: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xeb() {
  Assert_real((isdigit(235) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              1180, ("isdigit should be 0 for 0xeb"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xeb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xeb,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x49c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xeb>:
push   %rax
mov    $0xeb,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x49c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xeb\00"
define void @t_isdigit_0xeb() {
%1 = call i64 @isdigit(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xeb\00"
define void @t_isdigit_0xeb() {
%1 = tail call i64 @isdigit(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2CMasterIntEnable(uint32_t ui32Base) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000010))) = 1;
}


x86 assembly (clang, -O0):
<I2CMasterIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
cltq
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterIntEnable>:
movslq %edi,%rax
movl   $0x1,0x10(%rax)
ret

LLVM IR (-O0):
define void @I2CMasterIntEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 16
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 1, i32* %6
ret void
}

LLVM IR (-O2):
define void @I2CMasterIntEnable(i32 %0) {
%2 = add nsw i32 %0, 16
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
store volatile i32 1, i32* %4
ret void
}
/* Variables and functions */
int _i2cwrite(int, int, unsigned char *, int);
int /*<<< orphan*/ monLock();
int /*<<< orphan*/ monUnlock();
int mon_i2cwrite(int interface, int bigaddr, unsigned char *data, int len) {
  int val;
  monLock();
  val = _i2cwrite(interface, bigaddr, data, len);
  monUnlock();
  return (val);
}


x86 assembly (clang, -O0):
<mon_i2cwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <monLock@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1050 <_i2cwrite@plt>
mov    %eax,-0x18(%rbp)
mov    $0x0,%al
call   1040 <monUnlock@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mon_i2cwrite>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %rdx,%r15
mov    %esi,%ebp
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <monLock@plt>
mov    %ebx,%edi
mov    %ebp,%esi
mov    %r15,%rdx
mov    %r14d,%ecx
call   1050 <_i2cwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <monUnlock@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mon_i2cwrite(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = call i32 (...) @monLock()
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = call i32 @_i2cwrite(i32 %11, i32 %12, i8* %13, i32 %14)
store i32 %15, i32* %9
%16 = call i32 (...) @monUnlock()
%17 = load i32, i32* %9
ret i32 %17
}

LLVM IR (-O2):
define i32 @mon_i2cwrite(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 (...) @monLock()
%6 = tail call i32 @_i2cwrite(i32 %0, i32 %1, i8* %2, i32 %3)
%7 = tail call i32 (...) @monUnlock()
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ init_adc();
int /*<<< orphan*/ init_port_b();
int /*<<< orphan*/ init_port_c();
int /*<<< orphan*/ init_port_d();
int /*<<< orphan*/ init_timer_0();
int /*<<< orphan*/ init_timer_1();
int /*<<< orphan*/ init_timer_2();
int /*<<< orphan*/ init_usart();
int /*<<< orphan*/ sei();
void init() {
  init_port_b();
  init_port_c();
  init_port_d();
  init_timer_0();
  init_timer_1();
  init_timer_2();
  init_usart();
  init_adc();
  sei();
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1080 <init_port_b@plt>
mov    $0x0,%al
call   10b0 <init_port_c@plt>
mov    $0x0,%al
call   1060 <init_port_d@plt>
mov    $0x0,%al
call   1040 <init_timer_0@plt>
mov    $0x0,%al
call   10a0 <init_timer_1@plt>
mov    $0x0,%al
call   1030 <init_timer_2@plt>
mov    $0x0,%al
call   1050 <init_usart@plt>
mov    $0x0,%al
call   1070 <init_adc@plt>
mov    $0x0,%al
call   1090 <sei@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %eax,%eax
call   1080 <init_port_b@plt>
xor    %eax,%eax
call   10b0 <init_port_c@plt>
xor    %eax,%eax
call   1060 <init_port_d@plt>
xor    %eax,%eax
call   1040 <init_timer_0@plt>
xor    %eax,%eax
call   10a0 <init_timer_1@plt>
xor    %eax,%eax
call   1030 <init_timer_2@plt>
xor    %eax,%eax
call   1050 <init_usart@plt>
xor    %eax,%eax
call   1070 <init_adc@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <sei@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @init_port_b()
%2 = call i32 (...) @init_port_c()
%3 = call i32 (...) @init_port_d()
%4 = call i32 (...) @init_timer_0()
%5 = call i32 (...) @init_timer_1()
%6 = call i32 (...) @init_timer_2()
%7 = call i32 (...) @init_usart()
%8 = call i32 (...) @init_adc()
%9 = call i32 (...) @sei()
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @init_port_b()
%2 = tail call i32 (...) @init_port_c()
%3 = tail call i32 (...) @init_port_d()
%4 = tail call i32 (...) @init_timer_0()
%5 = tail call i32 (...) @init_timer_1()
%6 = tail call i32 (...) @init_timer_2()
%7 = tail call i32 (...) @init_usart()
%8 = tail call i32 (...) @init_adc()
%9 = tail call i32 (...) @sei()
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void ADI4SetValBit(uint32_t ui32Base, uint32_t ui32Reg, bool bWriteHigh,
                   uint8_t ui8Mask, uint8_t ui8Val) {
  uint32_t ui32RegOffset;
  ;
  ;
  ;
  ;
  ui32RegOffset = 0x00000040 + (ui32Reg << 1) + (bWriteHigh ? 1 : 0);
  (*((volatile unsigned char *)(ui32Base + ui32RegOffset))) =
      (ui8Mask << 4) | ui8Val;
}


x86 assembly (clang, -O0):
<ADI4SetValBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
add    $0x40,%eax
mov    -0xc(%rbp),%esi
xor    %ecx,%ecx
mov    $0x1,%edx
cmp    $0x0,%esi
cmovne %edx,%ecx
add    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x4,%eax
or     -0x14(%rbp),%eax
mov    %al,%cl
mov    -0x4(%rbp),%eax
add    -0x18(%rbp),%eax
cltq
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADI4SetValBit>:
shl    $0x4,%ecx
or     %r8d,%ecx
lea    (%rdi,%rsi,2),%eax
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
add    $0x40,%eax
cltq
mov    %cl,(%rax)
ret

LLVM IR (-O0):
define void @ADI4SetValBit(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load i32, i32* %7
%13 = shl i32 %12, 1
%14 = add nsw i32 64, %13
%15 = load i32, i32* %8
%16 = icmp ne i32 %15, 0
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 1, i32 0
%19 = add nsw i32 %14, %18
store i32 %19, i32* %11
%20 = load i32, i32* %9
%21 = shl i32 %20, 4
%22 = load i32, i32* %10
%23 = or i32 %21, %22
%24 = trunc i32 %23 to i8
%25 = load i32, i32* %6
%26 = load i32, i32* %11
%27 = add nsw i32 %25, %26
%28 = sext i32 %27 to i64
%29 = inttoptr i64 %28 to i8*
store volatile i8 %24, i8* %29
ret void
}

LLVM IR (-O2):
define void @ADI4SetValBit(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl i32 %1, 1
%7 = icmp ne i32 %2, 0
%8 = zext i1 %7 to i32
%9 = shl i32 %3, 4
%10 = or i32 %9, %4
%11 = trunc i32 %10 to i8
%12 = add i32 %0, 64
%13 = add i32 %12, %6
%14 = add i32 %13, %8
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i8*
store volatile i8 %11, i8* %16
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_read_standard_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(20, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_read_standard_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x14,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_read_standard_system>:
mov    $0x14,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @syscon_read_standard_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 20, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_read_standard_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 20, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void g_type_plugin_complete_type_info() {}


x86 assembly (clang, -O0):
<g_type_plugin_complete_type_info>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_type_plugin_complete_type_info>:
ret

LLVM IR (-O0):
define void @g_type_plugin_complete_type_info() {
ret void
}

LLVM IR (-O2):
define void @g_type_plugin_complete_type_info() {
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int __xstat(int, char const *, struct stat *);
int __lxstat(int vers, const char *name, struct stat *buf) {
  return __xstat(vers, name, buf);
}


x86 assembly (clang, -O0):
<__lxstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__xstat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__lxstat>:
jmp    1030 <__xstat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @__lxstat(i32 %0, i8* %1, %struct.stat* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca %struct.stat*
store i32 %0, i32* %4
store i8* %1, i8** %5
store %struct.stat* %2, %struct.stat** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load %struct.stat*, %struct.stat** %6
%10 = call i32 @__xstat(i32 %7, i8* %8, %struct.stat* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @__lxstat(i32 %0, i8* %1, %struct.stat* %2) {
%4 = tail call i32 @__xstat(i32 %0, i8* %1, %struct.stat* %2)
ret i32 %4
}
/* Variables and functions */
short *BGBMID_LoadWAV_RateStereo16(char const *, int *, int);
short *BGBMID_LoadWAV_32Stereo16(const char *name, int *rlen) {
  return (BGBMID_LoadWAV_RateStereo16(name, rlen, 32000));
}


x86 assembly (clang, -O0):
<BGBMID_LoadWAV_32Stereo16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x7d00,%edx
call   1030 <BGBMID_LoadWAV_RateStereo16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGBMID_LoadWAV_32Stereo16>:
mov    $0x7d00,%edx
jmp    1030 <BGBMID_LoadWAV_RateStereo16@plt>

LLVM IR (-O0):
define i16* @BGBMID_LoadWAV_32Stereo16(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i16* @BGBMID_LoadWAV_RateStereo16(i8* %5, i32* %6, i32 32000)
ret i16* %7
}

LLVM IR (-O2):
define i16* @BGBMID_LoadWAV_32Stereo16(i8* %0, i32* %1) {
%3 = tail call i16* @BGBMID_LoadWAV_RateStereo16(i8* %0, i32* %1, i32 32000)
ret i16* %3
}
/* Variables and functions */
int get_carry();
int const intLSL(long long);
long long mask_value(int const);
int /*<<< orphan*/ set_carry(int);
long long topbit_mask();
long long int intRLC(long long int x) {
  const int cin = get_carry();
  set_carry((topbit_mask() & x) ? 1 : 0);
  return mask_value(intLSL(x) | cin);
}


x86 assembly (clang, -O0):
<intRLC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1060 <get_carry@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1050 <topbit_mask@plt>
mov    %rax,%rcx
and    -0x8(%rbp),%rcx
xor    %edi,%edi
mov    $0x1,%eax
cmp    $0x0,%rcx
cmovne %eax,%edi
call   1030 <set_carry@plt>
mov    -0x8(%rbp),%rdi
call   1070 <intLSL@plt>
mov    %eax,%edi
or     -0xc(%rbp),%edi
call   1040 <mask_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intRLC>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1060 <get_carry@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1050 <topbit_mask@plt>
xor    %edi,%edi
test   %rbx,%rax
setne  %dil
call   1030 <set_carry@plt>
mov    %rbx,%rdi
call   1070 <intLSL@plt>
or     %eax,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <mask_value@plt>

LLVM IR (-O0):
define i64 @intRLC(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = call i32 (...) @get_carry()
store i32 %4, i32* %3
%5 = call i64 (...) @topbit_mask()
%6 = load i64, i64* %2
%7 = and i64 %5, %6
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 1, i32 0
%11 = call i32 @set_carry(i32 %10)
%12 = load i64, i64* %2
%13 = call i32 @intLSL(i64 %12)
%14 = load i32, i32* %3
%15 = or i32 %13, %14
%16 = call i64 @mask_value(i32 %15)
ret i64 %16
}

LLVM IR (-O2):
define i64 @intRLC(i64 %0) {
%2 = tail call i32 (...) @get_carry()
%3 = tail call i64 (...) @topbit_mask()
%4 = and i64 %3, %0
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @set_carry(i32 %6)
%8 = tail call i32 @intLSL(i64 %0)
%9 = or i32 %8, %2
%10 = tail call i64 @mask_value(i32 %9)
ret i64 %10
}