xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ M_PI;
double exp(double);
float ricker_wavelet(float t, float fc) {
  double x = ((double)M_PI) * fc * t;
  double aux = x * x;
  return (1.0 - 2.0 * aux) * exp(-aux);
}


x86 assembly (clang, -O0):
<ricker_wavelet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    0x2ebf(%rip),%rax
cvtsi2sdq (%rax),%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
addsd  %xmm1,%xmm1
movsd  0xe93(%rip),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ricker_wavelet>:
push   %rax
mov    0x2ed0(%rip),%rax
cvtsi2sdq (%rax),%xmm2
cvtss2sd %xmm1,%xmm1
mulsd  %xmm2,%xmm1
cvtss2sd %xmm0,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm0,%xmm0
movapd %xmm0,%xmm1
addsd  %xmm0,%xmm1
movsd  0xebf(%rip),%xmm2
subsd  %xmm1,%xmm2
movsd  %xmm2,(%rsp)
xorpd  0xebe(%rip),%xmm0
call   1030 <exp@plt>
mulsd  (%rsp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = global i64 0
define float @ricker_wavelet(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca double
%6 = alloca double
store float %0, float* %3
store float %1, float* %4
%7 = load i64, i64* @M_PI
%8 = sitofp i64 %7 to double
%9 = load float, float* %4
%10 = fpext float %9 to double
%11 = fmul double %8, %10
%12 = load float, float* %3
%13 = fpext float %12 to double
%14 = fmul double %11, %13
store double %14, double* %5
%15 = load double, double* %5
%16 = load double, double* %5
%17 = fmul double %15, %16
store double %17, double* %6
%18 = load double, double* %6
%19 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %18, double 1.000000e+00)
%20 = load double, double* %6
%21 = fneg double %20
%22 = call double @exp(double %21)
%23 = fmul double %19, %22
%24 = fptrunc double %23 to float
ret float %24
}

LLVM IR (-O2):
@M_PI = global i64 0
define float @ricker_wavelet(float %0, float %1) {
%3 = load i64, i64* @M_PI
%4 = sitofp i64 %3 to double
%5 = fpext float %1 to double
%6 = fmul double %5, %4
%7 = fpext float %0 to double
%8 = fmul double %6, %7
%9 = fmul double %8, %8
%10 = tail call double @llvm.fmuladd.f64(double %9, double -2.000000e+00, double 1.000000e+00)
%11 = fneg double %9
%12 = tail call double @exp(double %11)
%13 = fmul double %12, %10
%14 = fptrunc double %13 to float
ret float %14
}
unsigned int read_word(unsigned char *addr) { return *(unsigned short *)addr; }


x86 assembly (clang, -O0):
<read_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_word>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_word(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i16*
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @read_word(i8* nocapture %0) {
%2 = bitcast i8* %0 to i16*
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ mtspr(int, unsigned int);
void cpu_perf_conf(unsigned int confMask) {
  mtspr(((7 << (11)) + 33), confMask);
}


x86 assembly (clang, -O0):
<cpu_perf_conf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x3821,%edi
call   1030 <mtspr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_perf_conf>:
mov    %edi,%esi
mov    $0x3821,%edi
jmp    1030 <mtspr@plt>

LLVM IR (-O0):
define void @cpu_perf_conf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @mtspr(i32 14369, i32 %3)
ret void
}

LLVM IR (-O2):
define void @cpu_perf_conf(i32 %0) {
%2 = tail call i32 @mtspr(i32 14369, i32 %0)
ret void
}
void visc_source(const double *prim, const double *gradr, const double *gradp,
                 const double *gradt, double *cons, const double *xp,
                 const double *xm, double dVdt) {}


x86 assembly (clang, -O0):
<visc_source>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
movsd  %xmm0,-0x38(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<visc_source>:
ret

LLVM IR (-O0):
define void @visc_source(double* %0, double* %1, double* %2, double* %3, double* %4, double* %5, double* %6, double %7) {
%9 = alloca double*
%10 = alloca double*
%11 = alloca double*
%12 = alloca double*
%13 = alloca double*
%14 = alloca double*
%15 = alloca double*
%16 = alloca double
store double* %0, double** %9
store double* %1, double** %10
store double* %2, double** %11
store double* %3, double** %12
store double* %4, double** %13
store double* %5, double** %14
store double* %6, double** %15
store double %7, double* %16
ret void
}

LLVM IR (-O2):
define void @visc_source(double* nocapture %0, double* nocapture %1, double* nocapture %2, double* nocapture %3, double* nocapture %4, double* nocapture %5, double* nocapture %6, double %7) {
ret void
}
/* Type definitions */
struct dirent {
  scalar_t__ d_type;
  int /*<<< orphan*/ d_name;
};

/* Variables and functions */
scalar_t__ DT_DIR;
scalar_t__ atoi(int /*<<< orphan*/);
int is_proc_dir(const struct dirent *d) {
  const bool is_dir = (d->d_type == DT_DIR);
  const bool only_digits = (atoi(d->d_name) != 0);
  return is_dir && only_digits;
}


x86 assembly (clang, -O0):
<is_proc_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x2eb6(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%edi
call   1030 <atoi@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0x11(%rbp)
je     116c <is_proc_dir+0x5c>
cmpl   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_proc_dir>:
push   %rbx
mov    (%rdi),%rax
mov    0x2ec5(%rip),%rcx
cmp    (%rcx),%rax
sete   %bl
mov    0x8(%rdi),%edi
call   1030 <atoi@plt>
test   %rax,%rax
setne  %al
and    %bl,%al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.dirent = type { i64, i32 }
@DT_DIR = global i64 0
define i32 @is_proc_dir(%struct.dirent* %0) {
%2 = alloca %struct.dirent*
%3 = alloca i32
%4 = alloca i32
store %struct.dirent* %0, %struct.dirent** %2
%5 = load %struct.dirent*, %struct.dirent** %2
%6 = getelementptr inbounds %struct.dirent, %struct.dirent* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = load i64, i64* @DT_DIR
%9 = icmp eq i64 %7, %8
%10 = zext i1 %9 to i32
store i32 %10, i32* %3
%11 = load %struct.dirent*, %struct.dirent** %2
%12 = getelementptr inbounds %struct.dirent, %struct.dirent* %11, i32 0, i32 1
%13 = load i32, i32* %12
%14 = call i64 @atoi(i32 %13)
%15 = icmp ne i64 %14, 0
%16 = zext i1 %15 to i32
store i32 %16, i32* %4
%17 = load i32, i32* %3
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %1
%20 = load i32, i32* %4
%21 = icmp ne i32 %20, 0
br label %22
22: ; preds = %19, %1
%23 = phi i1 [ false, %1 ], [ %21, %19 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
%struct.dirent = type { i64, i32 }
@DT_DIR = global i64 0
define i32 @is_proc_dir(%struct.dirent* nocapture %0) {
%2 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = load i64, i64* @DT_DIR
%5 = icmp eq i64 %3, %4
%6 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 1
%7 = load i32, i32* %6
%8 = tail call i64 @atoi(i32 %7)
%9 = icmp ne i64 %8, 0
%10 = select i1 %5, i1 %9, i1 false
%11 = zext i1 %10 to i32
ret i32 %11
}
void merge_power_grids(struct power_grid *g1, struct power_grid *g2) {}


x86 assembly (clang, -O0):
<merge_power_grids>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_power_grids>:
ret

LLVM IR (-O0):
%struct.power_grid = type opaque
define void @merge_power_grids(%struct.power_grid* %0, %struct.power_grid* %1) {
%3 = alloca %struct.power_grid*
%4 = alloca %struct.power_grid*
store %struct.power_grid* %0, %struct.power_grid** %3
store %struct.power_grid* %1, %struct.power_grid** %4
ret void
}

LLVM IR (-O2):
%struct.power_grid = type opaque
define void @merge_power_grids(%struct.power_grid* nocapture %0, %struct.power_grid* nocapture %1) {
ret void
}
/* Variables and functions */
float __rcosd(float);
float intr_wrap_033(float p1) { return __rcosd(p1); }


x86 assembly (clang, -O0):
<intr_wrap_033>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__rcosd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_033>:
jmp    1030 <__rcosd@plt>

LLVM IR (-O0):
define float @intr_wrap_033(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__rcosd(float %3)
ret float %4
}

LLVM IR (-O2):
define float @intr_wrap_033(float %0) {
%2 = tail call float @__rcosd(float %0)
ret float %2
}
int security_shm_shmctl(struct shmid_kernel *shp, int cmd) { return 0; }


x86 assembly (clang, -O0):
<security_shm_shmctl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_shm_shmctl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.shmid_kernel = type opaque
define i32 @security_shm_shmctl(%struct.shmid_kernel* %0, i32 %1) {
%3 = alloca %struct.shmid_kernel*
%4 = alloca i32
store %struct.shmid_kernel* %0, %struct.shmid_kernel** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.shmid_kernel = type opaque
define i32 @security_shm_shmctl(%struct.shmid_kernel* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int /*<<< orphan*/);
__attribute__((__nonnull__)) bool str_has_prefix(const char *str,
                                                 const char *prefix) {
  return strncmp(str, prefix, strlen(prefix)) == 0;
}


x86 assembly (clang, -O0):
<str_has_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_has_prefix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @str_has_prefix(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i64 @strncmp(i8* %5, i8* %6, i32 %8)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @str_has_prefix(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void pending(char *test_name) {
  printf("\033[0;33m Pending test %s\n\e[0m", test_name);
}


x86 assembly (clang, -O0):
<pending>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pending>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"\1B[0;33m Pending test %s\0A\1B[0m\00"
define void @pending(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"\1B[0;33m Pending test %s\0A\1B[0m\00"
define void @pending(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
kick_tcp(tcb) register struct tcb *tcb;
{
  void tcp_timeout();
  if (!tcpval(tcb))
    return -1;
  tcp_timeout((char *)tcb);
  return 0;
}


x86 assembly (clang, -O0):
<kick_tcp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1040 <tcpval@plt>
cmp    $0x0,%eax
jne    114c <kick_tcp+0x2c>
movl   $0xffffffff,-0x4(%rbp)
jmp    115e <kick_tcp+0x3e>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <tcp_timeout@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kick_tcp>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <tcpval@plt>
test   %eax,%eax
je     113f <kick_tcp+0x1f>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <tcp_timeout@plt>
jmp    1144 <kick_tcp+0x24>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.tcb = type opaque
define i32 @kick_tcp(%struct.tcb* %0) {
%2 = alloca i32
%3 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %3
%4 = load %struct.tcb*, %struct.tcb** %3
%5 = call i32 (%struct.tcb*, ...) bitcast (i32 (...)* @tcpval to i32 (%struct.tcb*, ...)*)(%struct.tcb* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 -1, i32* %2
br label %11
8: ; preds = %1
%9 = load %struct.tcb*, %struct.tcb** %3
%10 = bitcast %struct.tcb* %9 to i8*
store i32 0, i32* %2
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.tcb = type opaque
define i32 @kick_tcp(%struct.tcb* %0) {
%2 = tail call i32 (%struct.tcb*, ...) bitcast (i32 (...)* @tcpval to i32 (%struct.tcb*, ...)*)(%struct.tcb* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = bitcast %struct.tcb* %0 to i8*
tail call void (i8*, ...) bitcast (void (...)* @tcp_timeout to void (i8*, ...)*)(i8* %5)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 0, %4 ], [ -1, %1 ]
ret i32 %7
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long target;
};
struct TYPE_4__ {
  TYPE_1__ xselection;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xselection_target(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xselection.target = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xselection_target>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xselection_target>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xselection_target(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xselection_target(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
void *move_ptr_align16(void *ptr, unsigned long offset) {
  return (void *)(((unsigned long)(ptr + offset) + 15) & (~15));
}


x86 assembly (clang, -O0):
<move_ptr_align16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_ptr_align16>:
lea    (%rdi,%rsi,1),%rax
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
ret

LLVM IR (-O0):
define i8* @move_ptr_align16(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = getelementptr i8, i8* %5, i64 %6
%8 = ptrtoint i8* %7 to i64
%9 = add i64 %8, 15
%10 = and i64 %9, -16
%11 = inttoptr i64 %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define i8* @move_ptr_align16(i8* %0, i64 %1) {
%3 = getelementptr i8, i8* %0, i64 %1
%4 = ptrtoint i8* %3 to i64
%5 = add i64 %4, 15
%6 = and i64 %5, -16
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void _CATMSG_Xlen(void) {
  fputs("Length error: dynamic array too long\n", stderr);
  abort();
}


x86 assembly (clang, -O0):
<_CATMSG_Xlen>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1040 <fputs@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<_CATMSG_Xlen>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"Length error: dynamic array too long\0A\00"
@stderr = global i32 0
define void @_CATMSG_Xlen() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@.str = [38 x i8] c"Length error: dynamic array too long\0A\00"
@stderr = global i32 0
define void @_CATMSG_Xlen() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rotl32(uint32_t x, int n) { return x << n | (x >> (-n & 31)); }


x86 assembly (clang, -O0):
<rotl32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x1f,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl32>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotl32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
%11 = and i32 %10, 31
%12 = ashr i32 %8, %11
%13 = or i32 %7, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @rotl32(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 0, %1
%5 = and i32 %4, 31
%6 = ashr i32 %0, %5
%7 = or i32 %6, %3
ret i32 %7
}
int sequenceSimilarity(char *tipJ, char *tipK, int n) {
  int i;
  for (i = 0; i < n; i++)
    if (*tipJ++ != *tipK++)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<sequenceSimilarity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    116d <sequenceSimilarity+0x6d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     115a <sequenceSimilarity+0x5a>
movl   $0x0,-0x4(%rbp)
jmp    1174 <sequenceSimilarity+0x74>
jmp    115f <sequenceSimilarity+0x5f>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1116 <sequenceSimilarity+0x16>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequenceSimilarity>:
mov    $0x1,%eax
test   %edx,%edx
jle    1122 <sequenceSimilarity+0x22>
mov    %edx,%r8d
xor    %edx,%edx
xchg   %ax,%ax
movzbl (%rdi,%rdx,1),%ecx
cmp    (%rsi,%rdx,1),%cl
jne    1123 <sequenceSimilarity+0x23>
add    $0x1,%rdx
cmp    %edx,%r8d
jne    1110 <sequenceSimilarity+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sequenceSimilarity(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %25, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %6
%20 = load i8, i8* %18
%21 = sext i8 %20 to i32
%22 = icmp ne i32 %17, %21
br i1 %22, label %23, label %24
23: ; preds = %13
store i32 0, i32* %4
br label %29
24: ; preds = %13
br label %25
25: ; preds = %24
%26 = load i32, i32* %8
%27 = add nsw i32 %26, 1
store i32 %27, i32* %8
br label %9
28: ; preds = %9
store i32 1, i32* %4
br label %29
29: ; preds = %28, %23
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @sequenceSimilarity(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3, %12
%6 = phi i32 [ %15, %12 ], [ 0, %3 ]
%7 = phi i8* [ %13, %12 ], [ %1, %3 ]
%8 = phi i8* [ %14, %12 ], [ %0, %3 ]
%9 = load i8, i8* %8
%10 = load i8, i8* %7
%11 = icmp eq i8 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %5
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = getelementptr inbounds i8, i8* %8, i64 1
%15 = add nuw nsw i32 %6, 1
%16 = icmp eq i32 %15, %2
br i1 %16, label %17, label %5
17: ; preds = %5, %12, %3
%18 = phi i32 [ 1, %3 ], [ 1, %12 ], [ 0, %5 ]
ret i32 %18
}
void waitForIRQ(unsigned int irq_number) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<waitForIRQ>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <waitForIRQ+0x7>

x86 assembly (clang, -O2):
<waitForIRQ>:
jmp    1100 <waitForIRQ>

LLVM IR (-O0):
define void @waitForIRQ(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1, %3
br label %3
}

LLVM IR (-O2):
define void @waitForIRQ(i32 %0) {
br label %2
2: ; preds = %1, %2
br label %2
}
int multiplyByTwo(int value) { return value * 2; }


x86 assembly (clang, -O0):
<multiplyByTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiplyByTwo>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @multiplyByTwo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @multiplyByTwo(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
void PDMR3DriverAttach(void) {}


x86 assembly (clang, -O0):
<PDMR3DriverAttach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMR3DriverAttach>:
ret

LLVM IR (-O0):
define void @PDMR3DriverAttach() {
ret void
}

LLVM IR (-O2):
define void @PDMR3DriverAttach() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_MultiplyQuaternionF_init(void) {
  _hmt_register_covercase("HMM_MultiplyQuaternionF", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_MultiplyQuaternionF_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef6(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_MultiplyQuaternionF_init>:
lea    0xee9(%rip),%rdi
lea    0xefa(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"HMM_MultiplyQuaternionF\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_MultiplyQuaternionF_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"HMM_MultiplyQuaternionF\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_MultiplyQuaternionF_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
AX0AX1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if ((((unsigned short *)10000000)[x0]) <= (((unsigned short *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AX0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x989680,%eax
movzwl (%rax,%rcx,2),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movzwl (%rcx,%rdx,2),%ecx
cmp    %ecx,%eax
jg     114d <AX0AX1+0x4d>
movl   $0x1,-0x4(%rbp)
jmp    1154 <AX0AX1+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AX0AX1>:
movslq %edx,%rax
movzwl 0x989680(%rax,%rax,1),%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx,%rcx,1),%dx
setbe  %al
ret

LLVM IR (-O0):
define i32 @AX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i32, i32* %10
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i16, i16* inttoptr (i64 10000000 to i16*), i64 %17
%19 = load i16, i16* %18
%20 = zext i16 %19 to i32
%21 = load i32, i32* %11
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %22
%24 = load i16, i16* %23
%25 = zext i16 %24 to i32
%26 = icmp sle i32 %20, %25
br i1 %26, label %27, label %28
27: ; preds = %6
store i32 1, i32* %7
br label %29
28: ; preds = %6
store i32 0, i32* %7
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %7
ret i32 %30
}

LLVM IR (-O2):
define i32 @AX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i16, i16* inttoptr (i64 10000000 to i16*), i64 %7
%9 = load i16, i16* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %10
%12 = load i16, i16* %11
%13 = icmp ule i16 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
int fun590() { return 590; }


x86 assembly (clang, -O0):
<fun590>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun590>:
mov    $0x24e,%eax
ret

LLVM IR (-O0):
define i32 @fun590() {
ret i32 590
}

LLVM IR (-O2):
define i32 @fun590() {
ret i32 590
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ helper(struct TreeNode *, int /*<<< orphan*/, int, int *);
int kthSmallest(struct TreeNode *root, int k) {
  int res = 0;
  helper(root, 0, k, &res);
  return res;
}


x86 assembly (clang, -O0):
<kthSmallest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
lea    -0x10(%rbp),%rcx
call   1030 <helper@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kthSmallest>:
push   %rax
mov    %esi,%edx
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rcx
xor    %esi,%esi
call   1030 <helper@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32 @kthSmallest(%struct.TreeNode* %0, i32 %1) {
%3 = alloca %struct.TreeNode*
%4 = alloca i32
%5 = alloca i32
store %struct.TreeNode* %0, %struct.TreeNode** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load %struct.TreeNode*, %struct.TreeNode** %3
%7 = load i32, i32* %4
%8 = call i32 @helper(%struct.TreeNode* %6, i32 0, i32 %7, i32* %5)
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32 @kthSmallest(%struct.TreeNode* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%5 = call i32 @helper(%struct.TreeNode* %0, i32 0, i32 %1, i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
int write(int, char *, int);
void send_message(int sock, char *msg) {
  int n;
  n = write(sock, msg, 256);
  if (n < 0) {
    printf("ERROR writing to socket");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<send_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x100,%edx
call   1030 <write@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1173 <send_message+0x43>
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_message>:
push   %rax
mov    $0x100,%edx
call   1030 <write@plt>
test   %eax,%eax
js     1141 <send_message+0x11>
pop    %rax
ret
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"ERROR writing to socket\00"
define void @send_message(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @write(i32 %6, i8* %7, i32 256)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"ERROR writing to socket\00"
define void @send_message(i32 %0, i8* nocapture %1) {
%3 = tail call i32 @write(i32 %0, i8* %1, i32 256)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
scalar_t__ isdigit(char const);
size_t strlen(char const *);
int is_numeric(const char *s) {
  int i = 0;
  size_t len = strlen(s);
  for (; isdigit(s[i]); i++)
    ;
  return (i == len ? 1 : 0);
}


x86 assembly (clang, -O0):
<is_numeric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     116e <is_numeric+0x4e>
jmp    1160 <is_numeric+0x40>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1140 <is_numeric+0x20>
movslq -0xc(%rbp),%rdx
mov    -0x18(%rbp),%rsi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_numeric>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%r14
mov    $0xffffffffffffffff,%rbx
nopw   0x0(%rax,%rax,1)
movsbl 0x1(%r15,%rbx,1),%edi
call   1030 <isdigit@plt>
add    $0x1,%rbx
test   %rax,%rax
jne    1140 <is_numeric+0x20>
mov    %ebx,%ecx
xor    %eax,%eax
cmp    %rcx,%r14
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @is_numeric(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i64
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %4
br label %7
7: ; preds = %16, %1
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = call i64 @isdigit(i8 signext %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %7
br label %16
16: ; preds = %15
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %7
19: ; preds = %7
%20 = load i32, i32* %3
%21 = sext i32 %20 to i64
%22 = load i64, i64* %4
%23 = icmp eq i64 %21, %22
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 1, i32 0
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_numeric(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
br label %3
3: ; preds = %3, %1
%4 = phi i64 [ %9, %3 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = tail call i64 @isdigit(i8 signext %6)
%8 = icmp eq i64 %7, 0
%9 = add nuw i64 %4, 1
br i1 %8, label %10, label %3
10: ; preds = %3
%11 = and i64 %4, 4294967295
%12 = icmp eq i64 %2, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ filestream_close(void *);
int /*<<< orphan*/ free(void *);
void filestream_destroy(void *obj) {
  filestream_close(obj);
  free(obj);
}


x86 assembly (clang, -O0):
<filestream_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <filestream_close@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filestream_destroy>:
push   %rbx
mov    %rdi,%rbx
call   1040 <filestream_close@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @filestream_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @filestream_close(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @filestream_destroy(i8* %0) {
%2 = tail call i32 @filestream_close(i8* %0)
%3 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct user_desc {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int clone4_(uint64_t flags, pid_t *ptid, struct user_desc *tls, pid_t *ctid,
            int *fd, int fd_flags) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<clone4_>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ead(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clone4_>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.user_desc = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @clone4_(i32 %0, i32* %1, %struct.user_desc* %2, i32* %3, i32* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32*
%9 = alloca %struct.user_desc*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32
store i32 %0, i32* %7
store i32* %1, i32** %8
store %struct.user_desc* %2, %struct.user_desc** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32 %5, i32* %12
%13 = load i32, i32* @ENOSYS
store i32 %13, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.user_desc = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @clone4_(i32 %0, i32* nocapture readnone %1, %struct.user_desc* nocapture readnone %2, i32* nocapture readnone %3, i32* nocapture readnone %4, i32 %5) {
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}
void gtk_tree_view_get_model() {}


x86 assembly (clang, -O0):
<gtk_tree_view_get_model>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_get_model>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_get_model() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_get_model() {
ret void
}
/* Variables and functions */
long hv_generic(int, unsigned long, unsigned long);
long h_add_logical_lan_buffer(unsigned long unit_address,
                              unsigned long buffer) {
  return hv_generic(0x11C, unit_address, buffer);
}


x86 assembly (clang, -O0):
<h_add_logical_lan_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x11c,%edi
call   1030 <hv_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h_add_logical_lan_buffer>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x11c,%edi
jmp    1030 <hv_generic@plt>

LLVM IR (-O0):
define i64 @h_add_logical_lan_buffer(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @hv_generic(i32 284, i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @h_add_logical_lan_buffer(i64 %0, i64 %1) {
%3 = tail call i64 @hv_generic(i32 284, i64 %0, i64 %1)
ret i64 %3
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ encoding;
};
typedef TYPE_1__ XTextProperty;

/* Variables and functions */
unsigned long get_XTextProperty_encoding(void *_p) {
  return (unsigned long)((XTextProperty *)_p)->encoding;
}


x86 assembly (clang, -O0):
<get_XTextProperty_encoding>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XTextProperty_encoding>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XTextProperty_encoding(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XTextProperty_encoding(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
time_t convert_timestamp_to_time_t(unsigned long timestamp) {
  return (time_t)timestamp;
}


x86 assembly (clang, -O0):
<convert_timestamp_to_time_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_timestamp_to_time_t>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @convert_timestamp_to_time_t(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @convert_timestamp_to_time_t(i64 %0) {
%2 = trunc i64 %0 to i32
ret i32 %2
}
int check_parameter_value(char str, char *tab, int size) {
  int i = 0;
  while (i < size) {
    if (str == tab[i]) {
      return i;
    }
    i++;
  }
  return -1;
}


x86 assembly (clang, -O0):
<check_parameter_value>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1155 <check_parameter_value+0x55>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    1147 <check_parameter_value+0x47>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <check_parameter_value+0x5c>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1118 <check_parameter_value+0x18>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_parameter_value>:
mov    $0xffffffff,%eax
test   %edx,%edx
jle    111f <check_parameter_value+0x1f>
mov    %edx,%edx
xor    %ecx,%ecx
nopl   (%rax)
cmp    %dil,(%rsi,%rcx,1)
je     1120 <check_parameter_value+0x20>
add    $0x1,%rcx
cmp    %rcx,%rdx
jne    1110 <check_parameter_value+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @check_parameter_value(i8 signext %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %25, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i8, i8* %5
%15 = sext i8 %14 to i32
%16 = load i8*, i8** %6
%17 = load i32, i32* %8
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %15, %21
br i1 %22, label %23, label %25
23: ; preds = %13
%24 = load i32, i32* %8
store i32 %24, i32* %4
br label %29
25: ; preds = %13
%26 = load i32, i32* %8
%27 = add nsw i32 %26, 1
store i32 %27, i32* %8
br label %9
28: ; preds = %9
store i32 -1, i32* %4
br label %29
29: ; preds = %28, %23
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @check_parameter_value(i8 signext %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i8, i8* %1, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
int INT_MIN;
int expect_int_sum(int (*f)(int, int)) { return f(INT_MIN + 1, -1) == INT_MIN; }


x86 assembly (clang, -O0):
<expect_int_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ed1(%rip),%rcx
mov    (%rcx),%edi
add    $0x1,%edi
mov    $0xffffffff,%esi
call   *%rax
mov    0x2ebe(%rip),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect_int_sum>:
push   %rbx
mov    %rdi,%rax
mov    0x2edd(%rip),%rbx
mov    (%rbx),%edi
add    $0x1,%edi
mov    $0xffffffff,%esi
call   *%rax
xor    %ecx,%ecx
cmp    (%rbx),%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @expect_int_sum(i32 (i32, i32)* %0) {
%2 = alloca i32 (i32, i32)*
store i32 (i32, i32)* %0, i32 (i32, i32)** %2
%3 = load i32 (i32, i32)*, i32 (i32, i32)** %2
%4 = load i32, i32* @INT_MIN
%5 = add nsw i32 %4, 1
%6 = call i32 %3(i32 %5, i32 -1)
%7 = load i32, i32* @INT_MIN
%8 = icmp eq i32 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @expect_int_sum(i32 (i32, i32)* nocapture %0) {
%2 = load i32, i32* @INT_MIN
%3 = add nsw i32 %2, 1
%4 = tail call i32 %0(i32 %3, i32 -1)
%5 = load i32, i32* @INT_MIN
%6 = icmp eq i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int main() {
  fputc(350, stderr);
  fputc('\n', stderr);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
mov    $0x5e,%edi
call   1030 <fputc@plt>
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1030 <fputc@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%esi
mov    $0x5e,%edi
call   1030 <fputc@plt>
mov    (%rbx),%esi
mov    $0xa,%edi
call   1030 <fputc@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputc(i8 signext 94, i32 %1)
%3 = load i32, i32* @stderr
%4 = call i32 @fputc(i8 signext 10, i32 %3)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputc(i8 signext 94, i32 %1)
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputc(i8 signext 10, i32 %3)
ret i32 0
}
int compare_chars(void *data1, void *data2) {
  char c1 = *(char *)data1;
  char c2 = *(char *)data2;
  return c1 == c2;
}


x86 assembly (clang, -O0):
<compare_chars>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x12(%rbp)
movsbl -0x11(%rbp),%eax
movsbl -0x12(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_chars>:
mov    (%rdi),%cl
xor    %eax,%eax
cmp    (%rsi),%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @compare_chars(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
store i8 %8, i8* %5
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
store i8 %10, i8* %6
%11 = load i8, i8* %5
%12 = sext i8 %11 to i32
%13 = load i8, i8* %6
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %12, %14
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @compare_chars(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void touch_main(void) {}


x86 assembly (clang, -O0):
<touch_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<touch_main>:
ret

LLVM IR (-O0):
define void @touch_main() {
ret void
}

LLVM IR (-O2):
define void @touch_main() {
ret void
}
float inttof(unsigned int i) { return *((float *)&i); }


x86 assembly (clang, -O0):
<inttof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<inttof>:
movd   %edi,%xmm0
ret

LLVM IR (-O0):
define float @inttof(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = bitcast i32* %2 to float*
%4 = load float, float* %3
ret float %4
}

LLVM IR (-O2):
define float @inttof(i32 %0) {
%2 = bitcast i32 %0 to float
ret float %2
}
/* Type definitions */
struct backlight {
  int dummy;
};

/* Variables and functions */
int EOPNOTSUPP;
int default_screen_lock(struct backlight *b, int lock) { return -EOPNOTSUPP; }


x86 assembly (clang, -O0):
<default_screen_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    0x2ecc(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_screen_lock>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.backlight = type { i32 }
@EOPNOTSUPP = global i32 0
define i32 @default_screen_lock(%struct.backlight* %0, i32 %1) {
%3 = alloca %struct.backlight*
%4 = alloca i32
store %struct.backlight* %0, %struct.backlight** %3
store i32 %1, i32* %4
%5 = load i32, i32* @EOPNOTSUPP
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
%struct.backlight = type { i32 }
@EOPNOTSUPP = global i32 0
define i32 @default_screen_lock(%struct.backlight* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @EOPNOTSUPP
%4 = sub nsw i32 0, %3
ret i32 %4
}