xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ be200_uart_check_idle();
int /*<<< orphan*/ be200_uart_nonce_test();
int /*<<< orphan*/ be200_uart_set_freq();
int uart1_read();
void be200_uart_handler() {
  uint8_t cmd;
  cmd = uart1_read();
  switch (cmd) {
  case 0x01:
    be200_uart_set_freq();
    break;
  case 0x02:
    be200_uart_nonce_test();
    break;
  case 0x03:
    be200_uart_check_idle();
    break;
  default:
    break;
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1060 <uart1_read@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x1,%eax
je     1188 <be200_uart_handler+0x48>
jmp    1166 <be200_uart_handler+0x26>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
je     1194 <be200_uart_handler+0x54>
jmp    1177 <be200_uart_handler+0x37>
mov    -0x8(%rbp),%eax
sub    $0x3,%eax
je     11a0 <be200_uart_handler+0x60>
jmp    11ac <be200_uart_handler+0x6c>
mov    $0x0,%al
call   1030 <be200_uart_set_freq@plt>
jmp    11b1 <be200_uart_handler+0x71>
mov    $0x0,%al
call   1050 <be200_uart_nonce_test@plt>
jmp    11b1 <be200_uart_handler+0x71>
mov    $0x0,%al
call   1040 <be200_uart_check_idle@plt>
jmp    11b1 <be200_uart_handler+0x71>
jmp    11b1 <be200_uart_handler+0x71>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1060 <uart1_read@plt>
cmp    $0x3,%eax
je     115f <be200_uart_handler+0x1f>
cmp    $0x2,%eax
je     1167 <be200_uart_handler+0x27>
cmp    $0x1,%eax
jne    116f <be200_uart_handler+0x2f>
xor    %eax,%eax
pop    %rcx
jmp    1030 <be200_uart_set_freq@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <be200_uart_check_idle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <be200_uart_nonce_test@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @be200_uart_handler() {
%1 = alloca i32
%2 = call i32 (...) @uart1_read()
store i32 %2, i32* %1
%3 = load i32, i32* %1
switch i32 %3, label %10 [
i32 1, label %4
i32 2, label %6
i32 3, label %8
]
4: ; preds = %0
%5 = call i32 (...) @be200_uart_set_freq()
br label %11
6: ; preds = %0
%7 = call i32 (...) @be200_uart_nonce_test()
br label %11
8: ; preds = %0
%9 = call i32 (...) @be200_uart_check_idle()
br label %11
10: ; preds = %0
br label %11
11: ; preds = %10, %8, %6, %4
ret void
}

LLVM IR (-O2):
define void @be200_uart_handler() {
%1 = tail call i32 (...) @uart1_read()
switch i32 %1, label %8 [
i32 1, label %2
i32 2, label %4
i32 3, label %6
]
2: ; preds = %0
%3 = tail call i32 (...) @be200_uart_set_freq()
br label %8
4: ; preds = %0
%5 = tail call i32 (...) @be200_uart_nonce_test()
br label %8
6: ; preds = %0
%7 = tail call i32 (...) @be200_uart_check_idle()
br label %8
8: ; preds = %0, %6, %4, %2
ret void
}
int brokenCalc(int X, int Y) {
  int step = 0;
  while (X < Y) {
    Y = Y & 1 ? Y + 1 : Y / 2;
    step++;
  }
  step += X - Y;
  return step;
}


x86 assembly (clang, -O0):
<brokenCalc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115c <brokenCalc+0x5c>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113a <brokenCalc+0x3a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1148 <brokenCalc+0x48>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <brokenCalc+0x11>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<brokenCalc>:
mov    %edi,%eax
xor    %ecx,%ecx
cmp    %edi,%esi
jle    112d <brokenCalc+0x2d>
xor    %ecx,%ecx
jmp    1122 <brokenCalc+0x22>
nopl   0x0(%rax)
mov    %esi,%edx
shr    $0x1f,%edx
add    %esi,%edx
sar    %edx
mov    %edx,%esi
add    $0x1,%ecx
cmp    %eax,%esi
jle    112d <brokenCalc+0x2d>
test   $0x1,%sil
je     1110 <brokenCalc+0x10>
add    $0x1,%esi
jmp    111b <brokenCalc+0x1b>
sub    %esi,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @brokenCalc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i32, i32* %4
%12 = and i32 %11, 1
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
br label %20
17: ; preds = %10
%18 = load i32, i32* %4
%19 = sdiv i32 %18, 2
br label %20
20: ; preds = %17, %14
%21 = phi i32 [ %16, %14 ], [ %19, %17 ]
store i32 %21, i32* %4
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
%25 = load i32, i32* %3
%26 = load i32, i32* %4
%27 = sub nsw i32 %25, %26
%28 = load i32, i32* %5
%29 = add nsw i32 %28, %27
store i32 %29, i32* %5
%30 = load i32, i32* %5
ret i32 %30
}

LLVM IR (-O2):
define i32 @brokenCalc(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
br i1 %3, label %4, label %17
4: ; preds = %2, %13
%5 = phi i32 [ %15, %13 ], [ 0, %2 ]
%6 = phi i32 [ %14, %13 ], [ %1, %2 ]
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = add nsw i32 %6, 1
br label %13
11: ; preds = %4
%12 = sdiv i32 %6, 2
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
%15 = add nuw nsw i32 %5, 1
%16 = icmp sgt i32 %14, %0
br i1 %16, label %4, label %17
17: ; preds = %13, %2
%18 = phi i32 [ %1, %2 ], [ %14, %13 ]
%19 = phi i32 [ 0, %2 ], [ %15, %13 ]
%20 = sub i32 %0, %18
%21 = add nsw i32 %20, %19
ret i32 %21
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t parity(uint32_t dat) {
  uint32_t ret = 0;
  for (; dat; dat >>= 1)
    ret ^= dat & 1;
  return ret & 1;
}


x86 assembly (clang, -O0):
<parity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <parity+0x32>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <parity+0xe>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parity>:
xor    %eax,%eax
test   %edi,%edi
je     1123 <parity+0x23>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
xor    %edx,%eax
sar    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <parity+0x10>
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @parity(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = load i32, i32* %3
%11 = xor i32 %10, %9
store i32 %11, i32* %3
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = ashr i32 %13, 1
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
%17 = and i32 %16, 1
ret i32 %17
}

LLVM IR (-O2):
define i32 @parity(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = xor i32 %4, %6
%8 = ashr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = and i32 %7, 1
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ 0, %1 ], [ %11, %10 ]
ret i32 %13
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ close(int);
int main() {
  int ret;
  int srv_sock;
  ret = EXIT_SUCCESS;
close:
  close(srv_sock);
error:
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2ec8(%rip),%rax
mov    (%rax),%ebx
call   1030 <close@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* @EXIT_SUCCESS
store i32 %4, i32* %2
br label %5
5: ; preds = %0
%6 = load i32, i32* %3
%7 = call i32 @close(i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @EXIT_SUCCESS
%2 = tail call i32 @close(i32 undef)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ assume(int);
int main() {
  int i;
  int n;
  assume(n >= 50000);
  assume(n <= 100000);
  assume((n % 4) == 0);
  i = 0;
  while (i < n) {
    i = i + 2;
  }
  assert(i == n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xc350,-0xc(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assume@plt>
cmpl   $0x186a0,-0xc(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assume@plt>
mov    -0xc(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assume@plt>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1193 <main+0x73>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    1179 <main+0x59>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <assume@plt>
mov    $0x1,%edi
call   1040 <assume@plt>
mov    $0x1,%edi
call   1040 <assume@plt>
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 50000
%6 = zext i1 %5 to i32
%7 = call i32 @assume(i32 %6)
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 100000
%10 = zext i1 %9 to i32
%11 = call i32 @assume(i32 %10)
%12 = load i32, i32* %3
%13 = srem i32 %12, 4
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
%16 = call i32 @assume(i32 %15)
store i32 0, i32* %2
br label %17
17: ; preds = %21, %0
%18 = load i32, i32* %2
%19 = load i32, i32* %3
%20 = icmp slt i32 %18, %19
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load i32, i32* %2
%23 = add nsw i32 %22, 2
store i32 %23, i32* %2
br label %17
24: ; preds = %17
%25 = load i32, i32* %2
%26 = load i32, i32* %3
%27 = icmp eq i32 %25, %26
%28 = zext i1 %27 to i32
%29 = call i32 @assert(i32 %28)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assume(i32 1)
%2 = tail call i32 @assume(i32 1)
%3 = tail call i32 @assume(i32 1)
%4 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __be32;

/* Variables and functions */
void __ipv6_addr_set_half(__be32 *addr, __be32 wh, __be32 wl) {
  addr[0] = wh;
  addr[1] = wl;
}


x86 assembly (clang, -O0):
<__ipv6_addr_set_half>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ipv6_addr_set_half>:
mov    %esi,(%rdi)
mov    %edx,0x4(%rdi)
ret

LLVM IR (-O0):
define void @__ipv6_addr_set_half(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32, i32* %6
%11 = load i32*, i32** %4
%12 = getelementptr inbounds i32, i32* %11, i64 1
store i32 %10, i32* %12
ret void
}

LLVM IR (-O2):
define void @__ipv6_addr_set_half(i32* nocapture writeonly %0, i32 %1, i32 %2) {
store i32 %1, i32* %0
%4 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %2, i32* %4
ret void
}
/* Variables and functions */
scalar_t__ PpointSubtract();
scalar_t__ PpointSum();
scalar_t__ Ppt();
scalar_t__ PvalueNameRef();
PpointValue() {
  int b = -1;
  ;
  b = Ppt() || PvalueNameRef() || PpointSum() || PpointSubtract();
  return (b);
}


x86 assembly (clang, -O0):
<PpointValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x0,%al
call   1060 <Ppt@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    11ab <PpointValue+0x6b>
mov    $0x0,%al
call   1040 <PvalueNameRef@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    11ab <PpointValue+0x6b>
mov    $0x0,%al
call   1030 <PpointSum@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    11ab <PpointValue+0x6b>
mov    $0x0,%al
call   1050 <PpointSubtract@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PpointValue>:
push   %rbx
xor    %eax,%eax
call   1060 <Ppt@plt>
mov    $0x1,%ebx
test   %rax,%rax
jne    1179 <PpointValue+0x39>
xor    %eax,%eax
call   1040 <PvalueNameRef@plt>
test   %rax,%rax
jne    1179 <PpointValue+0x39>
xor    %eax,%eax
call   1030 <PpointSum@plt>
test   %rax,%rax
jne    1179 <PpointValue+0x39>
xor    %eax,%eax
call   1050 <PpointSubtract@plt>
xor    %ebx,%ebx
test   %rax,%rax
setne  %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @PpointValue() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i64 (...) @Ppt()
%3 = icmp ne i64 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %0
%5 = call i64 (...) @PvalueNameRef()
%6 = icmp ne i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = call i64 (...) @PpointSum()
%9 = icmp ne i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = call i64 (...) @PpointSubtract()
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %10, %7, %4, %0
%14 = phi i1 [ true, %7 ], [ true, %4 ], [ true, %0 ], [ %12, %10 ]
%15 = zext i1 %14 to i32
store i32 %15, i32* %1
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @PpointValue() {
%1 = tail call i64 (...) @Ppt()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %13
3: ; preds = %0
%4 = tail call i64 (...) @PvalueNameRef()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = tail call i64 (...) @PpointSum()
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = tail call i64 (...) @PpointSubtract()
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %9, %6, %3, %0
%14 = phi i32 [ 1, %6 ], [ 1, %3 ], [ 1, %0 ], [ %12, %9 ]
ret i32 %14
}
__attribute__((no, noclone)) signed __int128 t129_2add(unsigned __int128 y) {
  signed __int128 x =
      ((-((signed __int128)(((unsigned __int128)1 << (16 * 8 - 1)) - 1)) - 1));
  signed __int128 r;
  if (__builtin_add_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t129_2add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
movabs $0x8000000000000000,%rax
mov    %rax,-0x38(%rbp)
movq   $0x0,-0x40(%rbp)
mov    -0x40(%rbp),%rdx
mov    -0x38(%rbp),%rcx
mov    %rcx,%r9
sar    $0x3f,%r9
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rax
add    %rsi,%rdx
adc    %rax,%rcx
mov    %r9,%r8
adc    $0x0,%r8
adc    $0x0,%r9
mov    %r8d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%rdi
xor    %r9,%rdi
xor    %r8,%rax
or     %rdi,%rax
mov    %rcx,%rdi
shr    $0x3f,%rdi
xor    %rdi,%rsi
or     %rsi,%rax
setne  %al
mov    %rdx,-0x50(%rbp)
mov    %rcx,-0x48(%rbp)
test   $0x1,%al
jne    11ad <t129_2add+0x9d>
jmp    11b4 <t129_2add+0xa4>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t129_2add>:
mov    %rdi,%rax
movabs $0x8000000000000000,%rdx
add    %rsi,%rdx
ret

LLVM IR (-O0):
define { i64, i64 } @t129_2add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = bitcast i128* %4 to { i64, i64 }*
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 0
store i64 %0, i64* %9
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 1
store i64 %1, i64* %10
%11 = load i128, i128* %4
store i128 %11, i128* %5
store i128 -170141183460469231731687303715884105728, i128* %6
%12 = load i128, i128* %6
%13 = load i128, i128* %5
%14 = sext i128 %12 to i129
%15 = zext i128 %13 to i129
%16 = call { i129, i1 } @llvm.sadd.with.overflow.i129(i129 %14, i129 %15)
%17 = extractvalue { i129, i1 } %16, 1
%18 = extractvalue { i129, i1 } %16, 0
%19 = trunc i129 %18 to i128
%20 = sext i128 %19 to i129
%21 = icmp ne i129 %18, %20
%22 = or i1 %17, %21
store i128 %19, i128* %7
br i1 %22, label %23, label %25
23: ; preds = %2
%24 = call i32 (...) @bar()
br label %25
25: ; preds = %23, %2
%26 = load i128, i128* %7
store i128 %26, i128* %3
%27 = bitcast i128* %3 to { i64, i64 }*
%28 = load { i64, i64 }, { i64, i64 }* %27
ret { i64, i64 } %28
}

LLVM IR (-O2):
define { i64, i64 } @t129_2add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = add nsw i129 %7, -170141183460469231731687303715884105728
%9 = trunc i129 %8 to i64
%10 = lshr i129 %8, 64
%11 = trunc i129 %10 to i64
%12 = insertvalue { i64, i64 } poison, i64 %9, 0
%13 = insertvalue { i64, i64 } %12, i64 %11, 1
ret { i64, i64 } %13
}
/* Variables and functions */
int v_atomic_fetch_and_add_int(int volatile *, int);
int v_atomic_fetch_and_add_acquire_int(volatile int *ptr, int value) {
  return v_atomic_fetch_and_add_int(ptr, value);
}


x86 assembly (clang, -O0):
<v_atomic_fetch_and_add_acquire_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <v_atomic_fetch_and_add_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v_atomic_fetch_and_add_acquire_int>:
jmp    1030 <v_atomic_fetch_and_add_int@plt>

LLVM IR (-O0):
define i32 @v_atomic_fetch_and_add_acquire_int(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @v_atomic_fetch_and_add_int(i32* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @v_atomic_fetch_and_add_acquire_int(i32* %0, i32 %1) {
%3 = tail call i32 @v_atomic_fetch_and_add_int(i32* %0, i32 %1)
ret i32 %3
}
void FrnoToStr(buf, val) char buf[];
int val;
{
  int aa;
  if (aa = (val > 1000)) {
    val -= 10000;
  }
  sprintf(buf, "%2d%c", val, aa ? 'A' : ' ');
}


x86 assembly (clang, -O0):
<FrnoToStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x3e8,-0xc(%rbp)
setg   %al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x10(%rbp)
test   $0x1,%al
jne    1141 <FrnoToStr+0x31>
jmp    114c <FrnoToStr+0x3c>
mov    -0xc(%rbp),%eax
sub    $0x2710,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%esi
mov    $0x20,%ecx
mov    $0x41,%eax
cmp    $0x0,%esi
cmovne %eax,%ecx
lea    0xe93(%rip),%rsi
mov    $0x0,%al
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FrnoToStr>:
lea    -0x2710(%rsi),%edx
cmp    $0x3e9,%esi
mov    $0x41,%eax
mov    $0x20,%ecx
cmovge %eax,%ecx
cmovl  %esi,%edx
lea    0xecd(%rip),%rsi
xor    %eax,%eax
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%2d%c\00"
define void @FrnoToStr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1000
%8 = zext i1 %7 to i32
store i32 %8, i32* %5
br i1 %7, label %9, label %12
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 10000
store i32 %11, i32* %4
br label %12
12: ; preds = %9, %2
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = icmp ne i32 %15, 0
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 65, i32 32
%19 = call i32 (i8*, i8*, ...) @sprintf(i8* %13, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %14, i32 %18)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%2d%c\00"
define void @FrnoToStr(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 1000
%4 = add nsw i32 %1, -10000
%5 = select i1 %3, i32 65, i32 32
%6 = select i1 %3, i32 %4, i32 %1
%7 = tail call i32 (i8*, i8*, ...) @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("%+09d\n", 452);
  printf("%09d\n", 452);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x1c4,%esi
call   1030 <printf@plt>
lea    0xed0(%rip),%rdi
mov    $0x1c4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1c4,%esi
call   1030 <printf@plt>
lea    0xede(%rip),%rdi
mov    $0x1c4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%+09d\0A\00"
@.str.1 = [6 x i8] c"%09d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 452)
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 452)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%+09d\0A\00"
@.str.1 = [6 x i8] c"%09d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 452)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 452)
ret i32 0
}
int FreeTimer(void) { return 0; }


x86 assembly (clang, -O0):
<FreeTimer>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FreeTimer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @FreeTimer() {
ret i32 0
}

LLVM IR (-O2):
define i32 @FreeTimer() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_printMsg(char *, char *, int, char *);
int /*<<< orphan*/ DEBUG_printMsgString(char *, char *, int, char *, void *);
int strcmp(char *, char *);
int CompareStringPtr(void *Data1, void *Data2) {
  {
    if (0 & 0x0001) {
      DEBUG_printMsg("list",
                     "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                     "outputs/2022-01-22/02-19-57/repos/reality3d/rgba/refs/"
                     "heads/master/epopeia/list.c",
                     34, "CompareStringStr");
    }
  };
  {
    if (0 & 0x0001) {
      DEBUG_printMsgString("list",
                           "/scratch/repos/new/home/jordi_armengol_estape/"
                           "c-scraper/outputs/2022-01-22/02-19-57/repos/"
                           "reality3d/rgba/refs/heads/master/epopeia/list.c",
                           35, "1", Data1);
    }
  };
  {
    if (0 & 0x0001) {
      DEBUG_printMsgString("list",
                           "/scratch/repos/new/home/jordi_armengol_estape/"
                           "c-scraper/outputs/2022-01-22/02-19-57/repos/"
                           "reality3d/rgba/refs/heads/master/epopeia/list.c",
                           36, "2", Data2);
    }
  };
  return strcmp((char *)Data1, (char *)Data2);
}


x86 assembly (clang, -O0):
<CompareStringPtr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CompareStringPtr>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @CompareStringPtr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @CompareStringPtr(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
int main() {
  double a = 5.0;
  return (int)a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movsd  0xeed(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double
store i32 0, i32* %1
store double 5.000000e+00, double* %2
%3 = load double, double* %2
%4 = fptosi double %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xf9() {
  Assert_real((isascii(249) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              1250, ("isascii should be 0 for 0xf9"));
}


x86 assembly (clang, -O0):
<t_isascii_0xf9>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf9,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4e2,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xf9>:
push   %rax
mov    $0xf9,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4e2,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xf9\00"
define void @t_isascii_0xf9() {
%1 = call i64 @isascii(i32 249)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1250, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xf9\00"
define void @t_isascii_0xf9() {
%1 = tail call i64 @isascii(i32 249)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1250, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
double sqrt(double const);
double bot_vector_magnitude_3d(const double v[3]) {
  return sqrt(v[0] * v[0] + v[1] * v[1] + v[2] * v[2]);
}


x86 assembly (clang, -O0):
<bot_vector_magnitude_3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bot_vector_magnitude_3d>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1141 <bot_vector_magnitude_3d+0x31>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @bot_vector_magnitude_3d(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
%24 = call double @sqrt(double %23)
ret double %24
}

LLVM IR (-O2):
define double @bot_vector_magnitude_3d(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
%10 = tail call double @sqrt(double %9)
ret double %10
}
int detecta(char letra) {
  if (letra >= 'A' && letra <= 'Z')
    return 1;
  else
    return (letra >= 'a' && letra <= 'z') - 1;
}


x86 assembly (clang, -O0):
<detecta>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1130 <detecta+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1130 <detecta+0x30>
movl   $0x1,-0x4(%rbp)
jmp    115d <detecta+0x5d>
movsbl -0x5(%rbp),%ecx
xor    %eax,%eax
cmp    $0x61,%ecx
mov    %al,-0x6(%rbp)
jl     114f <detecta+0x4f>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<detecta>:
lea    -0x41(%rdi),%eax
add    $0x85,%dil
cmp    $0xe6,%dil
sbb    %ecx,%ecx
cmp    $0x1a,%al
mov    $0x1,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @detecta(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %24
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 97
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 122
br label %20
20: ; preds = %16, %12
%21 = phi i1 [ false, %12 ], [ %19, %16 ]
%22 = zext i1 %21 to i32
%23 = sub nsw i32 %22, 1
store i32 %23, i32* %2
br label %24
24: ; preds = %20, %11
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @detecta(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -123
%5 = icmp ult i8 %4, -26
%6 = sext i1 %5 to i32
%7 = select i1 %3, i32 1, i32 %6
ret i32 %7
}
int is_right_end(char c) { return c == ',' || c == ']' || c == '-'; }


x86 assembly (clang, -O0):
<is_right_end>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2c,%ecx
mov    %al,-0x2(%rbp)
je     113b <is_right_end+0x3b>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5d,%ecx
mov    %al,-0x2(%rbp)
je     113b <is_right_end+0x3b>
movsbl -0x1(%rbp),%eax
cmp    $0x2d,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_right_end>:
mov    $0x1,%eax
cmp    $0x2c,%dil
je     1111 <is_right_end+0x11>
cmp    $0x5d,%dil
jne    1112 <is_right_end+0x12>
ret
xor    %eax,%eax
cmp    $0x2d,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_right_end(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 44
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 93
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 45
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_right_end(i8 signext %0) {
switch i8 %0, label %2 [
i8 93, label %5
i8 44, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 45
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xd9() {
  Assert_real((islower(217) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1090, ("islower should be 0 for 0xd9"));
}


x86 assembly (clang, -O0):
<t_islower_0xd9>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd9,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x442,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xd9>:
push   %rax
mov    $0xd9,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x442,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xd9\00"
define void @t_islower_0xd9() {
%1 = call i64 @islower(i32 217)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1090, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xd9\00"
define void @t_islower_0xd9() {
%1 = tail call i64 @islower(i32 217)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1090, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(unsigned int);
void sleep_(unsigned long int_time) { sleep((unsigned int)int_time); }


x86 assembly (clang, -O0):
<sleep_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_>:
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @sleep_(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @sleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @sleep_(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @sleep(i32 %2)
ret void
}
/* Variables and functions */
double fabs(double);
double sign(double a) { return a / fabs(a); }


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movaps 0xee6(%rip),%xmm2
pand   %xmm2,%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
movapd 0xef8(%rip),%xmm1
andpd  %xmm0,%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @llvm.fabs.f64(double %4)
%6 = fdiv double %3, %5
ret double %6
}

LLVM IR (-O2):
define double @sign(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
%3 = fdiv double %0, %2
ret double %3
}
long double _U_Qfcopysign(long double a, long double b) {
  union {
    long double ld;
    int i[4];
  } ua, ub;
  ua.ld = a;
  ub.ld = b;
  ua.i[0] &= 0x7fffffff;
  ua.i[0] |= (0x80000000 & ub.i[0]);
  return ua.ld;
}


x86 assembly (clang, -O0):
<_U_Qfcopysign>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fstpt  -0x30(%rbp)
fldt   -0x20(%rbp)
fstpt  -0x40(%rbp)
mov    -0x2d(%rbp),%al
and    $0x7f,%al
mov    %al,-0x2d(%rbp)
mov    -0x40(%rbp),%ecx
and    $0x80000000,%ecx
mov    -0x30(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x30(%rbp)
fldt   -0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_U_Qfcopysign>:
mov    0x10(%rsp),%eax
mov    0x8(%rsp),%rcx
mov    $0x80000000,%edx
and    0x18(%rsp),%edx
movabs $0xffffffff00000000,%rsi
ff ff ff
and    %rcx,%rsi
and    $0x7fffffff,%ecx
or     %edx,%ecx
or     %rcx,%rsi
mov    %ax,-0x10(%rsp)
mov    %rsi,-0x18(%rsp)
fldt   -0x18(%rsp)
ret

LLVM IR (-O0):
%union.anon = type { x86_fp80 }
define x86_fp80 @_U_Qfcopysign(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca %union.anon
%6 = alloca %union.anon
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%7 = load x86_fp80, x86_fp80* %3
%8 = bitcast %union.anon* %5 to x86_fp80*
store x86_fp80 %7, x86_fp80* %8
%9 = load x86_fp80, x86_fp80* %4
%10 = bitcast %union.anon* %6 to x86_fp80*
store x86_fp80 %9, x86_fp80* %10
%11 = bitcast %union.anon* %5 to [4 x i32]*
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %11, i64 0, i64 0
%13 = load i32, i32* %12
%14 = and i32 %13, 2147483647
store i32 %14, i32* %12
%15 = bitcast %union.anon* %6 to [4 x i32]*
%16 = getelementptr inbounds [4 x i32], [4 x i32]* %15, i64 0, i64 0
%17 = load i32, i32* %16
%18 = and i32 -2147483648, %17
%19 = bitcast %union.anon* %5 to [4 x i32]*
%20 = getelementptr inbounds [4 x i32], [4 x i32]* %19, i64 0, i64 0
%21 = load i32, i32* %20
%22 = or i32 %21, %18
store i32 %22, i32* %20
%23 = bitcast %union.anon* %5 to x86_fp80*
%24 = load x86_fp80, x86_fp80* %23
ret x86_fp80 %24
}

LLVM IR (-O2):
define x86_fp80 @_U_Qfcopysign(x86_fp80 %0, x86_fp80 %1) {
%3 = bitcast x86_fp80 %0 to i80
%4 = bitcast x86_fp80 %1 to i80
%5 = trunc i80 %4 to i32
%6 = and i32 %5, -2147483648
%7 = trunc i80 %3 to i32
%8 = and i32 %7, 2147483647
%9 = or i32 %6, %8
%10 = zext i32 %9 to i80
%11 = and i80 %3, -4294967296
%12 = or i80 %11, %10
%13 = bitcast i80 %12 to x86_fp80
ret x86_fp80 %13
}
/* Variables and functions */
unsigned int CC3RandomUInt();
unsigned int CC3RandomUIntBelow(unsigned int max) {
  return CC3RandomUInt() % max;
}


x86 assembly (clang, -O0):
<CC3RandomUIntBelow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <CC3RandomUInt@plt>
xor    %edx,%edx
divl   -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC3RandomUIntBelow>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <CC3RandomUInt@plt>
xor    %edx,%edx
div    %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @CC3RandomUIntBelow(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @CC3RandomUInt()
%4 = load i32, i32* %2
%5 = urem i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @CC3RandomUIntBelow(i32 %0) {
%2 = tail call i32 (...) @CC3RandomUInt()
%3 = urem i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int _usage(void) {
  fputs("Usage: "
        "makedepend"
        "\n",
        stderr);
  return 1;
}


x86 assembly (clang, -O0):
<_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Usage: makedepend\0A\00"
@stderr = global i32 0
define i32 @_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}

LLVM IR (-O2):
@.str = [19 x i8] c"Usage: makedepend\0A\00"
@stderr = global i32 0
define i32 @_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}
int RightChild(int Parent) { return Parent * 2 + 2; }


x86 assembly (clang, -O0):
<RightChild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RightChild>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @RightChild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
%5 = add nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @RightChild(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = add nsw i32 %2, 2
ret i32 %3
}
void test22(struct { int foo; } test23(short)) {}


x86 assembly (clang, -O0):
<test22>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test22>:
ret

LLVM IR (-O0):
define void @test22(i32 (i16)* %0) {
%2 = alloca i32 (i16)*
store i32 (i16)* %0, i32 (i16)** %2
ret void
}

LLVM IR (-O2):
define void @test22(i32 (i16)* nocapture %0) {
ret void
}
void HMR3IsEnabled(void) {}


x86 assembly (clang, -O0):
<HMR3IsEnabled>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMR3IsEnabled>:
ret

LLVM IR (-O0):
define void @HMR3IsEnabled() {
ret void
}

LLVM IR (-O2):
define void @HMR3IsEnabled() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_sigs_intern(int /*<<< orphan*/);
void set_signals(void) { set_sigs_intern(0); }


x86 assembly (clang, -O0):
<set_signals>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <set_sigs_intern@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_signals>:
xor    %edi,%edi
jmp    1030 <set_sigs_intern@plt>

LLVM IR (-O0):
define void @set_signals() {
%1 = call i32 @set_sigs_intern(i32 0)
ret void
}

LLVM IR (-O2):
define void @set_signals() {
%1 = tail call i32 @set_sigs_intern(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int f(int);
int g(int y) {
  if (y > 5) {
    exit(42);
  }
  return f(y - 1);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jle    113f <g+0x1f>
mov    $0x2a,%edi
call   1040 <exit@plt>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
cmp    $0x6,%edi
jge    112d <g+0xd>
add    $0xffffffff,%edi
jmp    1030 <f@plt>
push   %rax
mov    $0x2a,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 5
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @exit(i32 42)
unreachable
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 %8, 1
%10 = call i32 @f(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = icmp sgt i32 %0, 5
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @exit(i32 42)
unreachable
5: ; preds = %1
%6 = add nsw i32 %0, -1
%7 = tail call i32 @f(i32 %6)
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int errno;
int /*<<< orphan*/ perrno_stderr_vsyslog(int, int, char const *,
                                         int /*<<< orphan*/);
void stderr_vsyslog(int priority, const char *format, va_list args) {
  int perrno = errno;
  perrno_stderr_vsyslog(perrno, priority, format, args);
  errno = perrno;
}


x86 assembly (clang, -O0):
<stderr_vsyslog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb7(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <perrno_stderr_vsyslog@plt>
mov    -0x18(%rbp),%ecx
mov    0x2e96(%rip),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stderr_vsyslog>:
push   %r14
push   %rbx
push   %rax
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ebe(%rip),%r14
mov    (%r14),%ebx
mov    %ebx,%edi
call   1030 <perrno_stderr_vsyslog@plt>
mov    %ebx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@errno = global i32 0
define void @stderr_vsyslog(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* @errno
store i32 %8, i32* %7
%9 = load i32, i32* %7
%10 = load i32, i32* %4
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @perrno_stderr_vsyslog(i32 %9, i32 %10, i8* %11, i32 %12)
%14 = load i32, i32* %7
store i32 %14, i32* @errno
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @stderr_vsyslog(i32 %0, i8* %1, i32 %2) {
%4 = load i32, i32* @errno
%5 = tail call i32 @perrno_stderr_vsyslog(i32 %4, i32 %0, i8* %1, i32 %2)
store i32 %4, i32* @errno
ret void
}
void XEventsQueued() {}


x86 assembly (clang, -O0):
<XEventsQueued>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XEventsQueued>:
ret

LLVM IR (-O0):
define void @XEventsQueued() {
ret void
}

LLVM IR (-O2):
define void @XEventsQueued() {
ret void
}
/* Variables and functions */
int string_unescape(char *, char *, int /*<<< orphan*/, unsigned int);
int string_unescape_inplace(char *buf, unsigned int flags) {
  return string_unescape(buf, buf, 0, flags);
}


x86 assembly (clang, -O0):
<string_unescape_inplace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%ecx
xor    %edx,%edx
call   1030 <string_unescape@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_unescape_inplace>:
mov    %esi,%ecx
mov    %rdi,%rsi
xor    %edx,%edx
jmp    1030 <string_unescape@plt>

LLVM IR (-O0):
define i32 @string_unescape_inplace(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @string_unescape(i8* %5, i8* %6, i32 0, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @string_unescape_inplace(i8* %0, i32 %1) {
%3 = tail call i32 @string_unescape(i8* %0, i8* %0, i32 0, i32 %1)
ret i32 %3
}