xunge/DecIR huggingface dataset:
int test_int(int i) { return i * 2; }


x86 assembly (clang, -O0):
<test_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_int>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @test_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_int(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ send_text(char *);
void SVC_Handler(void) { send_text("SVC Fault.\n"); }


x86 assembly (clang, -O0):
<SVC_Handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <send_text@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SVC_Handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <send_text@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"SVC Fault.\0A\00"
define void @SVC_Handler() {
%1 = call i32 @send_text(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"SVC Fault.\0A\00"
define void @SVC_Handler() {
%1 = tail call i32 @send_text(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double _fatan2(double const, int, char const *, char const *,
               unsigned int const);
double _fatan(const double y, const char *parent_func, const char *parent_file,
              const unsigned int parent_line) {
  return _fatan2(y, 1, parent_func, parent_file, parent_line);
}


x86 assembly (clang, -O0):
<_fatan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x1,%edi
call   1030 <_fatan2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fatan>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <_fatan2@plt>

LLVM IR (-O0):
define double @_fatan(double %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca double
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store double %0, double* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load double, double* %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call double @_fatan2(double %9, i32 1, i8* %10, i8* %11, i32 %12)
ret double %13
}

LLVM IR (-O2):
define double @_fatan(double %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call double @_fatan2(double %0, i32 1, i8* %1, i8* %2, i32 %3)
ret double %5
}
void xbson_swap_endian32(void *outp, const void *inp) {
  const char *in = (const char *)inp;
  char *out = (char *)outp;
  out[0] = in[3];
  out[1] = in[2];
  out[2] = in[1];
  out[3] = in[0];
}


x86 assembly (clang, -O0):
<xbson_swap_endian32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x20(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x20(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x18(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x20(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x20(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xbson_swap_endian32>:
mov    0x3(%rsi),%al
mov    %al,(%rdi)
mov    0x2(%rsi),%al
mov    %al,0x1(%rdi)
mov    0x1(%rsi),%al
mov    %al,0x2(%rdi)
mov    (%rsi),%al
mov    %al,0x3(%rdi)
ret

LLVM IR (-O0):
define void @xbson_swap_endian32(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
store i8* %7, i8** %5
%8 = load i8*, i8** %3
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i64 3
%11 = load i8, i8* %10
%12 = load i8*, i8** %6
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %11, i8* %13
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i64 1
store i8 %16, i8* %18
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i64 1
%21 = load i8, i8* %20
%22 = load i8*, i8** %6
%23 = getelementptr inbounds i8, i8* %22, i64 2
store i8 %21, i8* %23
%24 = load i8*, i8** %5
%25 = getelementptr inbounds i8, i8* %24, i64 0
%26 = load i8, i8* %25
%27 = load i8*, i8** %6
%28 = getelementptr inbounds i8, i8* %27, i64 3
store i8 %26, i8* %28
ret void
}

LLVM IR (-O2):
define void @xbson_swap_endian32(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %1, i64 3
%4 = load i8, i8* %3
store i8 %4, i8* %0
%5 = getelementptr inbounds i8, i8* %1, i64 2
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %6, i8* %7
%8 = getelementptr inbounds i8, i8* %1, i64 1
%9 = load i8, i8* %8
%10 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %9, i8* %10
%11 = load i8, i8* %1
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
double baz(double x, double y, double z) {
  return (__builtin_pow(x, 3.0) * __builtin_pow(y, 2.0) *
          __builtin_pow(z, 5.0));
}


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xedc(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xebd(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xe92(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
sub    $0x18,%rsp
movsd  %xmm2,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
movsd  0xed8(%rip),%xmm1
call   1030 <pow@plt>
movsd  0x8(%rsp),%xmm1
mulsd  %xmm1,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0xebf(%rip),%xmm1
movsd  0x10(%rsp),%xmm0
call   1030 <pow@plt>
mulsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @baz(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = call double @pow(double %7, double 3.000000e+00)
%9 = load double, double* %5
%10 = call double @pow(double %9, double 2.000000e+00)
%11 = fmul double %8, %10
%12 = load double, double* %6
%13 = call double @pow(double %12, double 5.000000e+00)
%14 = fmul double %11, %13
ret double %14
}

LLVM IR (-O2):
define double @baz(double %0, double %1, double %2) {
%4 = tail call double @pow(double %0, double 3.000000e+00)
%5 = fmul double %1, %1
%6 = fmul double %5, %4
%7 = tail call double @pow(double %2, double 5.000000e+00)
%8 = fmul double %6, %7
ret double %8
}
void gensqrt_s() {}


x86 assembly (clang, -O0):
<gensqrt_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensqrt_s>:
ret

LLVM IR (-O0):
define void @gensqrt_s() {
ret void
}

LLVM IR (-O2):
define void @gensqrt_s() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ parse_qosdata();
int /*<<< orphan*/ print_config();
scalar_t__ strcmp(char *, char *);
int main(int argc, char **argv) {
  if (argc > 1 && strcmp(argv[1], "config") == 0) {
    print_config();
  } else {
    parse_qosdata();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    117a <main+0x4a>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xea1(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
jne    117a <main+0x4a>
mov    $0x0,%al
call   1050 <print_config@plt>
jmp    1181 <main+0x51>
mov    $0x0,%al
call   1030 <parse_qosdata@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     114b <main+0x1b>
mov    0x8(%rsi),%rdi
lea    0xebf(%rip),%rsi
call   1040 <strcmp@plt>
test   %rax,%rax
je     1154 <main+0x24>
xor    %eax,%eax
call   1030 <parse_qosdata@plt>
jmp    115b <main+0x2b>
xor    %eax,%eax
call   1050 <print_config@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"config\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i64 @strcmp(i8* %11, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = call i32 (...) @print_config()
br label %18
16: ; preds = %8, %2
%17 = call i32 (...) @parse_qosdata()
br label %18
18: ; preds = %16, %14
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"config\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i64 @strcmp(i8* %6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = tail call i32 (...) @print_config()
br label %13
11: ; preds = %4, %2
%12 = tail call i32 (...) @parse_qosdata()
br label %13
13: ; preds = %11, %9
ret i32 0
}
/* Type definitions */
struct ff_effect {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EVIOCSFF;
int ioctl(int, int /*<<< orphan*/, struct ff_effect *);
int /*<<< orphan*/ perror(char *);
int ffmemless_upload_effect(struct ff_effect *effect, int device_file) {
  if (ioctl(device_file, EVIOCSFF, effect) == -1) {
    perror("Vibra upload effect");
    return -1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<ffmemless_upload_effect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    0x2ea7(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
cmp    $0xffffffff,%eax
jne    1165 <ffmemless_upload_effect+0x45>
lea    0xeac(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116c <ffmemless_upload_effect+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffmemless_upload_effect>:
push   %rax
mov    %esi,%eax
mov    %rdi,%rdx
mov    0x2eb3(%rip),%rcx
mov    (%rcx),%esi
mov    %eax,%edi
call   1030 <ioctl@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xffffffff,%ecx
je     1141 <ffmemless_upload_effect+0x21>
pop    %rcx
ret
lea    0xeb8(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.ff_effect = type { i32 }
@EVIOCSFF = global i32 0
@.str = [20 x i8] c"Vibra upload effect\00"
define i32 @ffmemless_upload_effect(%struct.ff_effect* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.ff_effect*
%5 = alloca i32
store %struct.ff_effect* %0, %struct.ff_effect** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* @EVIOCSFF
%8 = load %struct.ff_effect*, %struct.ff_effect** %4
%9 = call i32 @ioctl(i32 %6, i32 %7, %struct.ff_effect* %8)
%10 = icmp eq i32 %9, -1
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.ff_effect = type { i32 }
@EVIOCSFF = global i32 0
@.str = [20 x i8] c"Vibra upload effect\00"
define i32 @ffmemless_upload_effect(%struct.ff_effect* %0, i32 %1) {
%3 = load i32, i32* @EVIOCSFF
%4 = tail call i32 @ioctl(i32 %1, i32 %3, %struct.ff_effect* %0)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned short, unsigned short);
void func_ushort(unsigned short x1, unsigned short x2) {
  printf("ushort: %hu %hu\n", x1, x2);
}


x86 assembly (clang, -O0):
<func_ushort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
lea    0xecf(%rip),%rdi
movzwl %ax,%esi
movzwl -0x4(%rbp),%edx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_ushort>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"ushort: %hu %hu\0A\00"
define void @func_ushort(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i16 zeroext %5, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"ushort: %hu %hu\0A\00"
define void @func_ushort(i16 zeroext %0, i16 zeroext %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i16 zeroext %0, i16 zeroext %1)
ret void
}
int charinstr(char str[256], char target, int max) {
  int i;
  for (i = 0; i < max; i++)
    if (str[i] == target)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<charinstr>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    115b <charinstr+0x5b>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    1148 <charinstr+0x48>
movl   $0x1,-0x4(%rbp)
jmp    1162 <charinstr+0x62>
jmp    114d <charinstr+0x4d>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1118 <charinstr+0x18>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charinstr>:
test   %edx,%edx
jle    111f <charinstr+0x1f>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %sil,(%rdi,%rcx,1)
je     1122 <charinstr+0x22>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <charinstr+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @charinstr(i8* %0, i8 signext %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8 %1, i8* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %25, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8, i8* %6
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %19, %21
br i1 %22, label %23, label %24
23: ; preds = %13
store i32 1, i32* %4
br label %29
24: ; preds = %13
br label %25
25: ; preds = %24
%26 = load i32, i32* %8
%27 = add nsw i32 %26, 1
store i32 %27, i32* %8
br label %9
28: ; preds = %9
store i32 0, i32* %4
br label %29
29: ; preds = %28, %23
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @charinstr(i8* nocapture %0, i8 signext %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, %1
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
int align(int n, int m) {
  int rem = n % m;
  return (rem == 0) ? n : n - rem + m;
}


x86 assembly (clang, -O0):
<align>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1129 <align+0x29>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1135 <align+0x35>
mov    -0x4(%rbp),%eax
sub    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align>:
mov    %edi,%eax
cltd
idiv   %esi
lea    (%rsi,%rdi,1),%eax
sub    %edx,%eax
test   %edx,%edx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @align(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* %3
br label %19
13: ; preds = %2
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = sub nsw i32 %14, %15
%17 = load i32, i32* %4
%18 = add nsw i32 %16, %17
br label %19
19: ; preds = %13, %11
%20 = phi i32 [ %12, %11 ], [ %18, %13 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @align(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
%5 = add i32 %1, %0
%6 = sub i32 %5, %3
%7 = select i1 %4, i32 %0, i32 %6
ret i32 %7
}
void freeparsedargs(char **argv) {
  if (argv) {
    free(argv[-1]);
    free(argv - 1);
  }
}


x86 assembly (clang, -O0):
<freeparsedargs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1141 <freeparsedargs+0x31>
mov    -0x8(%rbp),%rax
mov    -0x8(%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeparsedargs>:
test   %rdi,%rdi
je     112f <freeparsedargs+0x1f>
push   %rbx
mov    %rdi,%rbx
mov    -0x8(%rdi),%rdi
add    $0xfffffffffffffff8,%rbx
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @freeparsedargs(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = icmp ne i8** %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i8**, i8*** %2
%7 = getelementptr inbounds i8*, i8** %6, i64 -1
%8 = load i8*, i8** %7
%9 = load i8**, i8*** %2
%10 = getelementptr inbounds i8*, i8** %9, i64 -1
%11 = bitcast i8** %10 to i8*
br label %12
12: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @freeparsedargs(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8*, i8** %0, i64 -1
%5 = load i8*, i8** %4
tail call void @free(i8* %5)
%6 = bitcast i8** %4 to i8*
tail call void @free(i8* %6)
br label %7
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
void *calloc(int, int);
void *myalloc(int siz) { return calloc(1, siz); }


x86 assembly (clang, -O0):
<myalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myalloc>:
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @myalloc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @calloc(i32 1, i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @myalloc(i32 %0) {
%2 = tail call i8* @calloc(i32 1, i32 %0)
ret i8* %2
}
void *nodekey(void *n) { return n; }


x86 assembly (clang, -O0):
<nodekey>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nodekey>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @nodekey(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @nodekey(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
struct iax_ie_data {
  int dummy;
};
typedef int /*<<< orphan*/ newval;

/* Variables and functions */
unsigned short htons(unsigned short);
int iax_ie_append_raw(struct iax_ie_data *, unsigned char, unsigned short *,
                      int);
int iax_ie_append_short(struct iax_ie_data *ied, unsigned char ie,
                        unsigned short value) {
  unsigned short newval;
  newval = htons(value);
  return iax_ie_append_raw(ied, ie, &newval, (int)sizeof(newval));
}


x86 assembly (clang, -O0):
<iax_ie_append_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dx,%ax
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %ax,-0xc(%rbp)
movzwl -0xc(%rbp),%edi
call   1030 <htons@plt>
mov    %ax,-0xe(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xe(%rbp),%rdx
mov    $0x2,%ecx
movzbl -0x9(%rbp),%esi
call   1040 <iax_ie_append_raw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iax_ie_append_short>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %edx,%edi
call   1030 <htons@plt>
mov    %ax,0x6(%rsp)
lea    0x6(%rsp),%rdx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x2,%ecx
call   1040 <iax_ie_append_raw@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.iax_ie_data = type { i32 }
define i32 @iax_ie_append_short(%struct.iax_ie_data* %0, i8 zeroext %1, i16 zeroext %2) {
%4 = alloca %struct.iax_ie_data*
%5 = alloca i8
%6 = alloca i16
%7 = alloca i16
store %struct.iax_ie_data* %0, %struct.iax_ie_data** %4
store i8 %1, i8* %5
store i16 %2, i16* %6
%8 = load i16, i16* %6
%9 = call zeroext i16 @htons(i16 zeroext %8)
store i16 %9, i16* %7
%10 = load %struct.iax_ie_data*, %struct.iax_ie_data** %4
%11 = load i8, i8* %5
%12 = call i32 @iax_ie_append_raw(%struct.iax_ie_data* %10, i8 zeroext %11, i16* %7, i32 2)
ret i32 %12
}

LLVM IR (-O2):
%struct.iax_ie_data = type { i32 }
define i32 @iax_ie_append_short(%struct.iax_ie_data* %0, i8 zeroext %1, i16 zeroext %2) {
%4 = alloca i16
%5 = bitcast i16* %4 to i8*
%6 = tail call zeroext i16 @htons(i16 zeroext %2)
store i16 %6, i16* %4
%7 = call i32 @iax_ie_append_raw(%struct.iax_ie_data* %0, i8 zeroext %1, i16* %4, i32 2)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ complete_user_name(char const *);
int complete_owner(const char str[], void *arg) {
  complete_user_name(str);
  return 0;
}


x86 assembly (clang, -O0):
<complete_owner>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <complete_user_name@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<complete_owner>:
push   %rax
call   1030 <complete_user_name@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @complete_owner(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @complete_user_name(i8* %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @complete_owner(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @complete_user_name(i8* %0)
ret i32 0
}
int test_imm_C0int16_mem(short *val) {
  return ((*val) & (-0xC0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C0int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff40,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C0int16_mem>:
movzwl (%rdi),%eax
test   $0xff40,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C0int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -192
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C0int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -192
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ os_memcpy(char *, char *, int);
char *__string_copy(char *dst, char *src, int len) {
  os_memcpy(dst, src, len);
  dst[len] = 0;
  return dst;
}


x86 assembly (clang, -O0):
<__string_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <os_memcpy@plt>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__string_copy>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rdi,%rbx
call   1030 <os_memcpy@plt>
movslq %ebp,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @__string_copy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @os_memcpy(i8* %7, i8* %8, i32 %9)
%11 = load i8*, i8** %4
%12 = load i32, i32* %6
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @__string_copy(i8* returned %0, i8* %1, i32 %2) {
%4 = tail call i32 @os_memcpy(i8* %0, i8* %1, i32 %2)
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ free_entries();
void switch_done(void) { free_entries(); }


x86 assembly (clang, -O0):
<switch_done>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <free_entries@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_done>:
xor    %eax,%eax
jmp    1030 <free_entries@plt>

LLVM IR (-O0):
define void @switch_done() {
%1 = call i32 (...) @free_entries()
ret void
}

LLVM IR (-O2):
define void @switch_done() {
%1 = tail call i32 (...) @free_entries()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ start_main();
int main() { start_main(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <start_main@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <start_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @start_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @start_main()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  printf(
      "This demonstrates how the value 0.01 is saved in a float variable: \n");
  float f = 0.01;
  printf("%.50f\n", f);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movss  0xed2(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
lea    0xf06(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee7(%rip),%rdi
call   1030 <puts@plt>
lea    0xed4(%rip),%rdi
movsd  0xec4(%rip),%xmm0
mov    $0x1,%al
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [69 x i8] c"This demonstrates how the value 0.01 is saved in a float variable: \0A\00"
@.str.1 = [7 x i8] c"%.50f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0))
store float 0x3F847AE140000000, float* %1
%3 = load float, float* %1
%4 = fpext float %3 to double
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), double %4)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [7 x i8] c"%.50f\0A\00"
@str = [68 x i8] c"This demonstrates how the value 0.01 is saved in a float variable: \00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([68 x i8], [68 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), double 0x3F847AE140000000)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ append_command(char, char *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, ...);
void set_login_message(char *message) {
  if (!message) {
    printf("No message chosen\n");
    exit(1);
  }
  printf("Login message set!\n%s\n", message);
  append_command('l', message);
  exit(0);
}


x86 assembly (clang, -O0):
<set_login_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    115f <set_login_message+0x2f>
lea    0xeb2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rsi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
mov    $0x6c,%edi
call   1040 <append_command@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<set_login_message>:
push   %rbx
test   %rdi,%rdi
jne    115c <set_login_message+0x1c>
lea    0xeca(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1060 <exit@plt>
mov    %rdi,%rbx
lea    0xe9a(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0x6c,%edi
mov    %rbx,%rsi
call   1050 <append_command@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"No message chosen\0A\00"
@.str.1 = [23 x i8] c"Login message set!\0A%s\0A\00"
define void @set_login_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* %9)
%11 = load i8*, i8** %2
%12 = call i32 @append_command(i8 signext 108, i8* %11)
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str.1 = [23 x i8] c"Login message set!\0A%s\0A\00"
@str = [18 x i8] c"No message chosen\00"
define void @set_login_message(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %1
%7 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%8 = tail call i32 @append_command(i8 signext 108, i8* %0)
%9 = tail call i32 @exit(i32 0)
unreachable
}
void check_bogus_fp_exceptions() {}


x86 assembly (clang, -O0):
<check_bogus_fp_exceptions>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_bogus_fp_exceptions>:
ret

LLVM IR (-O0):
define void @check_bogus_fp_exceptions() {
ret void
}

LLVM IR (-O2):
define void @check_bogus_fp_exceptions() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ fread(long *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int, int /*<<< orphan*/);
long _gzsize_f(FILE *f) {
  long size = -1;
  fseek(f, -4, SEEK_END);
  fread(&size, 4, 1, f);
  return size;
}


x86 assembly (clang, -O0):
<_gzsize_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0xffffffffffffffff,-0x10(%rbp)
ff
mov    -0x8(%rbp),%rdi
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
mov    $0xfffffffc,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rcx
lea    -0x10(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gzsize_f>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movq   $0xffffffffffffffff,0x8(%rsp)
ff ff
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
mov    $0xfffffffc,%esi
call   1040 <fseek@plt>
lea    0x8(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fread@plt>
mov    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
define i64 @_gzsize_f(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
store i64 -1, i64* %3
%4 = load i32*, i32** %2
%5 = load i32, i32* @SEEK_END
%6 = call i32 @fseek(i32* %4, i32 -4, i32 %5)
%7 = load i32*, i32** %2
%8 = call i32 @fread(i64* %3, i32 4, i32 1, i32* %7)
%9 = load i64, i64* %3
ret i64 %9
}

LLVM IR (-O2):
@SEEK_END = global i32 0
define i64 @_gzsize_f(i32* nocapture %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
store i64 -1, i64* %2
%4 = load i32, i32* @SEEK_END
%5 = tail call i32 @fseek(i32* %0, i32 -4, i32 %4)
%6 = call i32 @fread(i64* %2, i32 4, i32 1, i32* %0)
%7 = load i64, i64* %2
ret i64 %7
}
int checkMode() {}


x86 assembly (clang, -O0):
<checkMode>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkMode>:
ret

LLVM IR (-O0):
define i32 @checkMode() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @checkMode() {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_put_x_mmx(int, int, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ const *, int);
void MC_put_x_16_mmx(uint8_t *dest, const uint8_t *ref, int stride,
                     int height) {
  MC_put_x_mmx(16, height, dest, ref, stride);
}


x86 assembly (clang, -O0):
<MC_put_x_16_mmx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%esi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    $0x10,%edi
call   1030 <MC_put_x_mmx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_put_x_16_mmx>:
mov    %edx,%r8d
mov    %rsi,%rax
mov    %rdi,%rdx
mov    $0x10,%edi
mov    %ecx,%esi
mov    %rax,%rcx
jmp    1030 <MC_put_x_mmx@plt>

LLVM IR (-O0):
define void @MC_put_x_16_mmx(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @MC_put_x_mmx(i32 16, i32 %9, i32* %10, i32* %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @MC_put_x_16_mmx(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_put_x_mmx(i32 16, i32 %3, i32* %0, i32* %1, i32 %2)
ret void
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ pmap_unset(int, int);
int /*<<< orphan*/ svc_unregister(int, int);
int main(int argc, char *argv[]) {
  int prog_num = atoi(argv[1]);
  pmap_unset(prog_num, 1);
  svc_unregister(prog_num, 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x1,%esi
call   1030 <pmap_unset@plt>
mov    -0x14(%rbp),%edi
mov    $0x1,%esi
call   1050 <svc_unregister@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%ebx
mov    %eax,%edi
mov    $0x1,%esi
call   1030 <pmap_unset@plt>
mov    %ebx,%edi
mov    $0x1,%esi
call   1050 <svc_unregister@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i32 @atoi(i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = call i32 @pmap_unset(i32 %11, i32 1)
%13 = load i32, i32* %6
%14 = call i32 @svc_unregister(i32 %13, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = tail call i32 @pmap_unset(i32 %5, i32 1)
%7 = tail call i32 @svc_unregister(i32 %5, i32 1)
ret i32 0
}
/* Type definitions */
struct node {
  int dummy;
};
struct DLLHead_q {
  int dummy;
};

/* Variables and functions */
struct DLLHead_q *create_new_queue();
int /*<<< orphan*/ level_order_main(struct node *, struct DLLHead_q **);
void level_order(struct node *node) {
  struct DLLHead_q *head_q = NULL;
  head_q = create_new_queue();
  level_order_main(node, &head_q);
}


x86 assembly (clang, -O0):
<level_order>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1040 <create_new_queue@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <level_order_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<level_order>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <create_new_queue@plt>
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1030 <level_order_main@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.node = type { i32 }
%struct.DLLHead_q = type { i32 }
define void @level_order(%struct.node* %0) {
%2 = alloca %struct.node*
%3 = alloca %struct.DLLHead_q*
store %struct.node* %0, %struct.node** %2
store %struct.DLLHead_q* null, %struct.DLLHead_q** %3
%4 = call %struct.DLLHead_q* (...) @create_new_queue()
store %struct.DLLHead_q* %4, %struct.DLLHead_q** %3
%5 = load %struct.node*, %struct.node** %2
%6 = call i32 @level_order_main(%struct.node* %5, %struct.DLLHead_q** %3)
ret void
}

LLVM IR (-O2):
%struct.node = type { i32 }
%struct.DLLHead_q = type { i32 }
define void @level_order(%struct.node* %0) {
%2 = alloca %struct.DLLHead_q*
%3 = bitcast %struct.DLLHead_q** %2 to i8*
%4 = tail call %struct.DLLHead_q* (...) @create_new_queue()
store %struct.DLLHead_q* %4, %struct.DLLHead_q** %2
%5 = call i32 @level_order_main(%struct.node* %0, %struct.DLLHead_q** %2)
ret void
}
void rop3_127_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T & S;
  stk1 = *D & stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_127_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_127_0_0>:
and    %edx,%esi
and    (%rdi),%sil
not    %sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_127_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = and i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = load i8*, i8** %4
store i8 %26, i8* %27
ret void
}

LLVM IR (-O2):
define void @rop3_127_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = and i8 %2, %1
%5 = load i8, i8* %0
%6 = and i8 %4, %5
%7 = xor i8 %6, -1
store i8 %7, i8* %0
ret void
}
/* Variables and functions */
char *medusaReceiveDataInternal(int, int *, int, int, int /*<<< orphan*/);
char *medusaReceiveLine(int socket, int *nBufferSize) {
  return medusaReceiveDataInternal(socket, nBufferSize, 1, 20 * 1000000, 0);
}


x86 assembly (clang, -O0):
<medusaReceiveLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
mov    $0x1312d00,%ecx
xor    %r8d,%r8d
call   1030 <medusaReceiveDataInternal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<medusaReceiveLine>:
mov    $0x1,%edx
mov    $0x1312d00,%ecx
xor    %r8d,%r8d
jmp    1030 <medusaReceiveDataInternal@plt>

LLVM IR (-O0):
define i8* @medusaReceiveLine(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i8* @medusaReceiveDataInternal(i32 %5, i32* %6, i32 1, i32 20000000, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @medusaReceiveLine(i32 %0, i32* %1) {
%3 = tail call i8* @medusaReceiveDataInternal(i32 %0, i32* %1, i32 1, i32 20000000, i32 0)
ret i8* %3
}
signed long int signedlongint_ignoring_unsignedshortint(signed long int x,
                                                        unsigned short int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedlongint_ignoring_unsignedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlongint_ignoring_unsignedshortint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlongint_ignoring_unsignedshortint(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlongint_ignoring_unsignedshortint(i64 returned %0, i16 zeroext %1) {
ret i64 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t rtp2435_get_q(uint8_t *header) { return header[5]; }


x86 assembly (clang, -O0):
<rtp2435_get_q>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtp2435_get_q>:
mov    0x14(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @rtp2435_get_q(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @rtp2435_get_q(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
ret i32 %3
}
void gs_premultiply_float4(float *f) {
  f[0] *= f[3];
  f[1] *= f[3];
  f[2] *= f[3];
}


x86 assembly (clang, -O0):
<gs_premultiply_float4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  (%rax),%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x8(%rax),%xmm0
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs_premultiply_float4>:
movss  0xc(%rdi),%xmm0
movss  (%rdi),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
movss  0x4(%rdi),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,0x4(%rdi)
mulss  0x8(%rdi),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @gs_premultiply_float4(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 3
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = fmul float %8, %5
store float %9, float* %7
%10 = load float*, float** %2
%11 = getelementptr inbounds float, float* %10, i64 3
%12 = load float, float* %11
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 1
%15 = load float, float* %14
%16 = fmul float %15, %12
store float %16, float* %14
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 3
%19 = load float, float* %18
%20 = load float*, float** %2
%21 = getelementptr inbounds float, float* %20, i64 2
%22 = load float, float* %21
%23 = fmul float %22, %19
store float %23, float* %21
ret void
}

LLVM IR (-O2):
define void @gs_premultiply_float4(float* nocapture %0) {
%2 = getelementptr inbounds float, float* %0, i64 3
%3 = load float, float* %2
%4 = load float, float* %0
%5 = fmul float %3, %4
store float %5, float* %0
%6 = getelementptr inbounds float, float* %0, i64 1
%7 = load float, float* %6
%8 = fmul float %3, %7
store float %8, float* %6
%9 = getelementptr inbounds float, float* %0, i64 2
%10 = load float, float* %9
%11 = fmul float %3, %10
store float %11, float* %9
ret void
}
int ft_isprint(int c) {
  if (c <= 126 && c >= 32)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x7e,-0x8(%rbp)
jg     1127 <ft_isprint+0x27>
cmpl   $0x20,-0x8(%rbp)
jl     1127 <ft_isprint+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <ft_isprint+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isprint(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 126
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 32
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ft_isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
int abs(int a) {
  if (a < 0)
    return -1 * a;
  else
    return a;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1120 <abs+0x20>
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1126 <abs+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = mul nsw i32 -1, %7
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
void gswap(short *a, short *b) {
  short tmp;
  tmp = *a;
  *a = *b;
  *b = tmp;
}


x86 assembly (clang, -O0):
<gswap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cx
mov    -0x8(%rbp),%rax
mov    %cx,(%rax)
mov    -0x12(%rbp),%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gswap>:
movzwl (%rdi),%eax
movzwl (%rsi),%ecx
mov    %cx,(%rdi)
mov    %ax,(%rsi)
ret

LLVM IR (-O0):
define void @gswap(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%6 = load i16*, i16** %3
%7 = load i16, i16* %6
store i16 %7, i16* %5
%8 = load i16*, i16** %4
%9 = load i16, i16* %8
%10 = load i16*, i16** %3
store i16 %9, i16* %10
%11 = load i16, i16* %5
%12 = load i16*, i16** %4
store i16 %11, i16* %12
ret void
}

LLVM IR (-O2):
define void @gswap(i16* nocapture %0, i16* nocapture %1) {
%3 = load i16, i16* %0
%4 = load i16, i16* %1
store i16 %4, i16* %0
store i16 %3, i16* %1
ret void
}