unsigned int GPMCErrStatusGet(unsigned int baseAddr, unsigned int err) {
  unsigned int retVal;
  retVal = 0;
  switch (err) {
  case (0):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x48)))) & (0x00000004u)) >>
         (0x00000002u));
    break;
  case (1):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x48)))) & (0x00000008u)) >>
         (0x00000003u));
    break;
  case (2):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x48)))) & (0x00000010u)) >>
         (0x00000004u));
    break;
  }
  return (retVal);
}


x86 assembly (clang, -O0):
<GPMCErrStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     1146 <GPMCErrStatusGet+0x46>
jmp    1124 <GPMCErrStatusGet+0x24>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     115e <GPMCErrStatusGet+0x5e>
jmp    1135 <GPMCErrStatusGet+0x35>
mov    -0x10(%rbp),%eax
sub    $0x2,%eax
je     1176 <GPMCErrStatusGet+0x76>
jmp    1189 <GPMCErrStatusGet+0x89>
mov    -0x4(%rbp),%eax
add    $0x48,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x4,%eax
shr    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1189 <GPMCErrStatusGet+0x89>
mov    -0x4(%rbp),%eax
add    $0x48,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x8,%eax
shr    $0x3,%eax
mov    %eax,-0xc(%rbp)
jmp    1189 <GPMCErrStatusGet+0x89>
mov    -0x4(%rbp),%eax
add    $0x48,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x10,%eax
shr    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCErrStatusGet>:
xor    %eax,%eax
cmp    $0x2,%esi
ja     1117 <GPMCErrStatusGet+0x17>
add    $0x48,%edi
mov    (%rdi),%eax
add    $0x2,%sil
mov    %esi,%ecx
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @GPMCErrStatusGet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %4
switch i32 %6, label %31 [
i32 0, label %7
i32 1, label %15
i32 2, label %23
]
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add i32 %8, 72
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, 4
%14 = lshr i32 %13, 2
store i32 %14, i32* %5
br label %31
15: ; preds = %2
%16 = load i32, i32* %3
%17 = add i32 %16, 72
%18 = zext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
%21 = and i32 %20, 8
%22 = lshr i32 %21, 3
store i32 %22, i32* %5
br label %31
23: ; preds = %2
%24 = load i32, i32* %3
%25 = add i32 %24, 72
%26 = zext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
%28 = load volatile i32, i32* %27
%29 = and i32 %28, 16
%30 = lshr i32 %29, 4
store i32 %30, i32* %5
br label %31
31: ; preds = %2, %23, %15, %7
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
define i32 @GPMCErrStatusGet(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, 3
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = add i32 %1, 2
%6 = add i32 %0, 72
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = lshr i32 %9, %5
%11 = and i32 %10, 1
br label %12
12: ; preds = %2, %4
%13 = phi i32 [ 0, %2 ], [ %11, %4 ]
ret i32 %13
}