unsigned char *expandBitMap(unsigned char *bits, unsigned char *display) {
  int i, j;
  for (i = 0; i < (40 * 32 / 8); i++) {
    for (j = 0; j < 8; j++) {
      display[i * 8 + j] = (bits[i] & (1 << j)) >> j;
      if (0 == 1) {
        if (display[i * 8 + j] == 0)
          display[i * 8 + j] = 1;
        else
          display[i * 8 + j] = 0;
      }
    }
  }
  return display;
}


x86 assembly (clang, -O0):
<expandBitMap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0xa0,-0x14(%rbp)
jge    1186 <expandBitMap+0x86>
movl   $0x0,-0x18(%rbp)
cmpl   $0x8,-0x18(%rbp)
jge    1173 <expandBitMap+0x73>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x18(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
mov    -0x18(%rbp),%ecx
sar    %cl,%eax
mov    %al,%dl
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
shl    $0x3,%ecx
add    -0x18(%rbp),%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1127 <expandBitMap+0x27>
jmp    1178 <expandBitMap+0x78>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <expandBitMap+0x13>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<expandBitMap>:
mov    %rsi,%rax
lea    0xa0(%rdi),%rcx
cmp    %rsi,%rcx
jbe    11aa <expandBitMap+0xaa>
lea    0x500(%rax),%rcx
cmp    %rdi,%rcx
jbe    11aa <expandBitMap+0xaa>
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rdi,%rcx,1),%edx
and    $0x1,%dl
mov    %dl,(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    %dl
and    $0x1,%dl
mov    %dl,0x1(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    $0x2,%dl
and    $0x1,%dl
mov    %dl,0x2(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    $0x3,%dl
and    $0x1,%dl
mov    %dl,0x3(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    $0x4,%dl
and    $0x1,%dl
mov    %dl,0x4(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    $0x5,%dl
and    $0x1,%dl
mov    %dl,0x5(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    $0x6,%dl
and    $0x1,%dl
mov    %dl,0x6(%rax,%rcx,8)
movzbl (%rdi,%rcx,1),%edx
shr    $0x7,%dl
mov    %dl,0x7(%rax,%rcx,8)
add    $0x1,%rcx
cmp    $0xa0,%rcx
jne    1130 <expandBitMap+0x30>
jmp    15e6 <expandBitMap+0x4e6>
xor    %ecx,%ecx
nopl   0x0(%rax)
movdqu (%rdi,%rcx,1),%xmm7
movdqa %xmm7,%xmm1
movdqa 0xe3f(%rip),%xmm0
pand   %xmm0,%xmm1
movdqa %xmm1,%xmm11
movdqa %xmm1,-0x38(%rsp)
movdqa %xmm7,%xmm1
psrlw  $0x1,%xmm1
pand   %xmm0,%xmm1
movdqa %xmm1,%xmm5
movdqa %xmm1,-0x48(%rsp)
movdqa %xmm7,%xmm9
psrlw  $0x2,%xmm9
pand   %xmm0,%xmm9
movdqa %xmm7,%xmm15
psrlw  $0x3,%xmm15
pand   %xmm0,%xmm15
movdqa %xmm7,%xmm8
psrlw  $0x4,%xmm8
pand   %xmm0,%xmm8
movdqa %xmm7,%xmm13
psrlw  $0x5,%xmm13
pand   %xmm0,%xmm13
movdqa %xmm7,%xmm1
psrlw  $0x6,%xmm1
pand   %xmm0,%xmm1
psrlw  $0x7,%xmm7
pand   %xmm0,%xmm7
movdqa %xmm1,%xmm14
punpcklbw %xmm7,%xmm14
pshuflw $0x60,%xmm14,%xmm3
pshufd $0x60,%xmm3,%xmm3
movdqa 0xdb6(%rip),%xmm0
movdqa %xmm0,%xmm4
pandn  %xmm3,%xmm4
movdqa %xmm8,%xmm6
punpcklbw %xmm13,%xmm6
pshuflw $0xd4,%xmm6,%xmm3
pshufd $0x60,%xmm3,%xmm3
pand   %xmm0,%xmm3
por    %xmm4,%xmm3
pshufd $0xed,%xmm3,%xmm10
movdqa %xmm9,%xmm4
punpcklbw %xmm15,%xmm4
pshuflw $0x60,%xmm4,%xmm3
pshufd $0xd4,%xmm3,%xmm3
movdqa 0xd80(%rip),%xmm2
movdqa %xmm2,%xmm12
pandn  %xmm3,%xmm12
movdqa %xmm11,%xmm3
punpcklbw %xmm5,%xmm3
pshufd $0x0,%xmm3,%xmm11
pshufhw $0x55,%xmm11,%xmm0
pand   %xmm2,%xmm0
por    %xmm12,%xmm0
pshufd $0xe8,%xmm0,%xmm0
punpckldq %xmm10,%xmm0
movdqa %xmm0,-0x18(%rsp)
pshuflw $0xe8,%xmm14,%xmm0
pshufd $0x60,%xmm0,%xmm10
movdqa 0xd24(%rip),%xmm5
movdqa %xmm5,%xmm0
pandn  %xmm10,%xmm0
pshuflw $0xf6,%xmm6,%xmm2
pshufd $0x60,%xmm2,%xmm2
pand   %xmm5,%xmm2
movdqa %xmm5,%xmm10
por    %xmm0,%xmm2
pshufd $0xed,%xmm2,%xmm11
pshuflw $0xe8,%xmm4,%xmm2
pshufd $0xd4,%xmm2,%xmm2
movdqa 0xcfb(%rip),%xmm12
movdqa %xmm12,%xmm0
pandn  %xmm2,%xmm0
pshufd $0x55,%xmm3,%xmm2
pshufhw $0x55,%xmm2,%xmm2
pand   %xmm12,%xmm2
por    %xmm0,%xmm2
pshufd $0xe8,%xmm2,%xmm0
punpckldq %xmm11,%xmm0
movdqa %xmm0,-0x28(%rsp)
pshufhw $0x60,%xmm14,%xmm0
pshufd $0xe8,%xmm0,%xmm0
movdqa %xmm5,%xmm2
pandn  %xmm0,%xmm2
pshufhw $0xd4,%xmm6,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pand   %xmm5,%xmm0
por    %xmm2,%xmm0
pshufhw $0x60,%xmm4,%xmm2
pshufd $0xf6,%xmm2,%xmm11
movdqa %xmm12,%xmm2
pandn  %xmm11,%xmm2
pshufd $0xaa,%xmm3,%xmm5
pshufhw $0x55,%xmm5,%xmm5
pand   %xmm12,%xmm5
por    %xmm2,%xmm5
pshufd $0xed,%xmm0,%xmm0
pshufd $0xe8,%xmm5,%xmm2
punpckldq %xmm0,%xmm2
movdqa %xmm2,-0x58(%rsp)
pshufhw $0xe8,%xmm14,%xmm0
pshufd $0xe8,%xmm0,%xmm0
movdqa %xmm10,%xmm2
pandn  %xmm0,%xmm2
pshufhw $0xf6,%xmm6,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pand   %xmm10,%xmm0
por    %xmm2,%xmm0
pshufhw $0xe8,%xmm4,%xmm2
pshufd $0xf6,%xmm2,%xmm2
movdqa %xmm12,%xmm4
pandn  %xmm2,%xmm4
pshufd $0xff,%xmm3,%xmm2
pshufhw $0x55,%xmm2,%xmm2
pand   %xmm12,%xmm2
por    %xmm4,%xmm2
pshufd $0xed,%xmm0,%xmm0
pshufd $0xe8,%xmm2,%xmm14
punpckldq %xmm0,%xmm14
punpckhbw %xmm7,%xmm1
pshuflw $0x60,%xmm1,%xmm0
pshufd $0x60,%xmm0,%xmm0
movdqa %xmm10,%xmm2
pandn  %xmm0,%xmm2
punpckhbw %xmm13,%xmm8
pshuflw $0xd4,%xmm8,%xmm0
pshufd $0x60,%xmm0,%xmm0
pand   %xmm10,%xmm0
por    %xmm2,%xmm0
pshufd $0xed,%xmm0,%xmm2
punpckhbw %xmm15,%xmm9
pshuflw $0x60,%xmm9,%xmm0
pshufd $0xd4,%xmm0,%xmm0
movdqa %xmm12,%xmm3
pandn  %xmm0,%xmm3
movdqa -0x38(%rsp),%xmm6
punpckhbw -0x48(%rsp),%xmm6
pshufd $0x0,%xmm6,%xmm0
pshufhw $0x55,%xmm0,%xmm0
pand   %xmm12,%xmm0
por    %xmm3,%xmm0
pshufd $0xe8,%xmm0,%xmm0
punpckldq %xmm2,%xmm0
pshuflw $0xe8,%xmm1,%xmm2
pshufd $0x60,%xmm2,%xmm2
movdqa %xmm10,%xmm3
pandn  %xmm2,%xmm3
pshuflw $0xf6,%xmm8,%xmm2
pshufd $0x60,%xmm2,%xmm2
pand   %xmm10,%xmm2
por    %xmm3,%xmm2
pshufd $0xed,%xmm2,%xmm3
pshuflw $0xe8,%xmm9,%xmm2
pshufd $0xd4,%xmm2,%xmm2
movdqa %xmm12,%xmm4
pandn  %xmm2,%xmm4
pshufd $0x55,%xmm6,%xmm2
pshufhw $0x55,%xmm2,%xmm2
pand   %xmm12,%xmm2
por    %xmm4,%xmm2
pshufd $0xe8,%xmm2,%xmm2
punpckldq %xmm3,%xmm2
pshufhw $0x60,%xmm1,%xmm3
pshufd $0xe8,%xmm3,%xmm3
movdqa %xmm10,%xmm4
pandn  %xmm3,%xmm4
pshufhw $0xd4,%xmm8,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pand   %xmm10,%xmm3
por    %xmm4,%xmm3
pshufhw $0x60,%xmm9,%xmm4
pshufd $0xf6,%xmm4,%xmm4
movdqa %xmm12,%xmm5
pandn  %xmm4,%xmm5
pshufd $0xaa,%xmm6,%xmm4
pshufhw $0x55,%xmm4,%xmm4
pand   %xmm12,%xmm4
por    %xmm5,%xmm4
pshufd $0xed,%xmm3,%xmm3
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm3,%xmm4
pshufhw $0xe8,%xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
movdqa %xmm10,%xmm3
pandn  %xmm1,%xmm3
pshufhw $0xf6,%xmm8,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pand   %xmm10,%xmm1
por    %xmm3,%xmm1
pshufhw $0xe8,%xmm9,%xmm3
pshufd $0xf6,%xmm3,%xmm3
movdqa %xmm12,%xmm5
pandn  %xmm3,%xmm5
pshufd $0xff,%xmm6,%xmm3
pshufhw $0x55,%xmm3,%xmm3
pand   %xmm12,%xmm3
por    %xmm5,%xmm3
pshufd $0xed,%xmm1,%xmm1
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm1,%xmm3
movdqu %xmm3,0x70(%rax,%rcx,8)
movdqu %xmm4,0x60(%rax,%rcx,8)
movdqu %xmm2,0x50(%rax,%rcx,8)
movdqu %xmm0,0x40(%rax,%rcx,8)
movdqu %xmm14,0x30(%rax,%rcx,8)
movaps -0x58(%rsp),%xmm0
movups %xmm0,0x20(%rax,%rcx,8)
movaps -0x28(%rsp),%xmm0
movups %xmm0,0x10(%rax,%rcx,8)
movaps -0x18(%rsp),%xmm0
movups %xmm0,(%rax,%rcx,8)
add    $0x10,%rcx
cmp    $0xa0,%rcx
jne    11b0 <expandBitMap+0xb0>
ret

LLVM IR (-O0):
define i8* @expandBitMap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %7
7: ; preds = %38, %2
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 160
br i1 %9, label %10, label %41
10: ; preds = %7
store i32 0, i32* %6
br label %11
11: ; preds = %34, %10
%12 = load i32, i32* %6
%13 = icmp slt i32 %12, 8
br i1 %13, label %14, label %37
14: ; preds = %11
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = load i32, i32* %6
%22 = shl i32 1, %21
%23 = and i32 %20, %22
%24 = load i32, i32* %6
%25 = ashr i32 %23, %24
%26 = trunc i32 %25 to i8
%27 = load i8*, i8** %4
%28 = load i32, i32* %5
%29 = mul nsw i32 %28, 8
%30 = load i32, i32* %6
%31 = add nsw i32 %29, %30
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds i8, i8* %27, i64 %32
store i8 %26, i8* %33
br label %34
34: ; preds = %14
%35 = load i32, i32* %6
%36 = add nsw i32 %35, 1
store i32 %36, i32* %6
br label %11
37: ; preds = %11
br label %38
38: ; preds = %37
%39 = load i32, i32* %5
%40 = add nsw i32 %39, 1
store i32 %40, i32* %5
br label %7
41: ; preds = %7
%42 = load i8*, i8** %4
ret i8* %42
}

LLVM IR (-O2):
define i8* @expandBitMap(i8* nocapture %0, i8* returned writeonly %1) {
%3 = getelementptr i8, i8* %1, i64 1280
%4 = getelementptr i8, i8* %0, i64 160
%5 = icmp ugt i8* %4, %1
%6 = icmp ugt i8* %3, %0
%7 = and i1 %5, %6
br i1 %7, label %46, label %8
8: ; preds = %2
%9 = getelementptr inbounds i8, i8* %1, i64 -7
br label %10
10: ; preds = %8, %10
%11 = phi i64 [ %44, %10 ], [ 0, %8 ]
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = shl nsw i64 %11, 3
%14 = bitcast i8* %12 to <16 x i8>*
%15 = load <16 x i8>, <16 x i8>* %14
%16 = and <16 x i8> %15, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%17 = lshr <16 x i8> %15, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%18 = and <16 x i8> %17, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%19 = lshr <16 x i8> %15, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
%20 = and <16 x i8> %19, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%21 = bitcast i8* %12 to <16 x i8>*
%22 = load <16 x i8>, <16 x i8>* %21
%23 = lshr <16 x i8> %22, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
%24 = and <16 x i8> %23, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%25 = lshr <16 x i8> %22, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
%26 = and <16 x i8> %25, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%27 = lshr <16 x i8> %22, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
%28 = and <16 x i8> %27, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%29 = bitcast i8* %12 to <16 x i8>*
%30 = load <16 x i8>, <16 x i8>* %29
%31 = lshr <16 x i8> %30, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
%32 = and <16 x i8> %31, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%33 = lshr <16 x i8> %30, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%34 = or i64 %13, 7
%35 = getelementptr inbounds i8, i8* %9, i64 %34
%36 = bitcast i8* %35 to <128 x i8>*
%37 = shufflevector <16 x i8> %16, <16 x i8> %18, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%38 = shufflevector <16 x i8> %20, <16 x i8> %24, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%39 = shufflevector <16 x i8> %26, <16 x i8> %28, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%40 = shufflevector <16 x i8> %32, <16 x i8> %33, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%41 = shufflevector <32 x i8> %37, <32 x i8> %38, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%42 = shufflevector <32 x i8> %39, <32 x i8> %40, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%43 = shufflevector <64 x i8> %41, <64 x i8> %42, <128 x i32> <i32 0, i32 16, i32 32, i32 48, i32 64, i32 80, i32 96, i32 112, i32 1, i32 17, i32 33, i32 49, i32 65, i32 81, i32 97, i32 113, i32 2, i32 18, i32 34, i32 50, i32 66, i32 82, i32 98, i32 114, i32 3, i32 19, i32 35, i32 51, i32 67, i32 83, i32 99, i32 115, i32 4, i32 20, i32 36, i32 52, i32 68, i32 84, i32 100, i32 116, i32 5, i32 21, i32 37, i32 53, i32 69, i32 85, i32 101, i32 117, i32 6, i32 22, i32 38, i32 54, i32 70, i32 86, i32 102, i32 118, i32 7, i32 23, i32 39, i32 55, i32 71, i32 87, i32 103, i32 119, i32 8, i32 24, i32 40, i32 56, i32 72, i32 88, i32 104, i32 120, i32 9, i32 25, i32 41, i32 57, i32 73, i32 89, i32 105, i32 121, i32 10, i32 26, i32 42, i32 58, i32 74, i32 90, i32 106, i32 122, i32 11, i32 27, i32 43, i32 59, i32 75, i32 91, i32 107, i32 123, i32 12, i32 28, i32 44, i32 60, i32 76, i32 92, i32 108, i32 124, i32 13, i32 29, i32 45, i32 61, i32 77, i32 93, i32 109, i32 125, i32 14, i32 30, i32 46, i32 62, i32 78, i32 94, i32 110, i32 126, i32 15, i32 31, i32 47, i32 63, i32 79, i32 95, i32 111, i32 127>
store <128 x i8> %43, <128 x i8>* %36
%44 = add nuw i64 %11, 16
%45 = icmp eq i64 %44, 160
br i1 %45, label %89, label %10
46: ; preds = %2, %46
%47 = phi i64 [ %87, %46 ], [ 0, %2 ]
%48 = getelementptr inbounds i8, i8* %0, i64 %47
%49 = shl nsw i64 %47, 3
%50 = load i8, i8* %48
%51 = and i8 %50, 1
%52 = getelementptr inbounds i8, i8* %1, i64 %49
store i8 %51, i8* %52
%53 = load i8, i8* %48
%54 = lshr i8 %53, 1
%55 = and i8 %54, 1
%56 = or i64 %49, 1
%57 = getelementptr inbounds i8, i8* %1, i64 %56
store i8 %55, i8* %57
%58 = load i8, i8* %48
%59 = lshr i8 %58, 2
%60 = and i8 %59, 1
%61 = or i64 %49, 2
%62 = getelementptr inbounds i8, i8* %1, i64 %61
store i8 %60, i8* %62
%63 = load i8, i8* %48
%64 = lshr i8 %63, 3
%65 = and i8 %64, 1
%66 = or i64 %49, 3
%67 = getelementptr inbounds i8, i8* %1, i64 %66
store i8 %65, i8* %67
%68 = load i8, i8* %48
%69 = lshr i8 %68, 4
%70 = and i8 %69, 1
%71 = or i64 %49, 4
%72 = getelementptr inbounds i8, i8* %1, i64 %71
store i8 %70, i8* %72
%73 = load i8, i8* %48
%74 = lshr i8 %73, 5
%75 = and i8 %74, 1
%76 = or i64 %49, 5
%77 = getelementptr inbounds i8, i8* %1, i64 %76
store i8 %75, i8* %77
%78 = load i8, i8* %48
%79 = lshr i8 %78, 6
%80 = and i8 %79, 1
%81 = or i64 %49, 6
%82 = getelementptr inbounds i8, i8* %1, i64 %81
store i8 %80, i8* %82
%83 = load i8, i8* %48
%84 = lshr i8 %83, 7
%85 = or i64 %49, 7
%86 = getelementptr inbounds i8, i8* %1, i64 %85
store i8 %84, i8* %86
%87 = add nuw nsw i64 %47, 1
%88 = icmp eq i64 %87, 160
br i1 %88, label %89, label %46
89: ; preds = %10, %46
ret i8* %1
}