xunge/DecIR huggingface dataset:
void rop3_208_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = S | stk3;
  stk1 = T & stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_208_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_208_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_208_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_208_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
int main(void) {
  union ClassOrOfficeType {
    int clas;
    char office[10];
  };
  union ClassOrOfficeType classOrOffice;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%union.ClassOrOfficeType = type { i32, [8 x i8] }
define i32 @main() {
%1 = alloca %union.ClassOrOfficeType
ret i32 0
}

LLVM IR (-O2):
%union.ClassOrOfficeType = type { i32, [8 x i8] }
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int stone(int /*<<< orphan*/);
int /*<<< orphan*/ strtol(char *, int /*<<< orphan*/ *, int /*<<< orphan*/);
int main(int argc, char **argv) {
  if (argc == 2) {
    return stone(strtol(argv[1], NULL, 0));
  } else
    return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    1162 <main+0x42>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <strtol@plt>
mov    %eax,%edi
call   1040 <stone@plt>
mov    %eax,-0x4(%rbp)
jmp    1169 <main+0x49>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jne    113b <main+0x1b>
push   %rax
mov    0x8(%rsi),%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <strtol@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <stone@plt>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 2
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @strtol(i8* %11, i32* null, i32 0)
%13 = call i32 @stone(i32 %12)
store i32 %13, i32* %3
br label %15
14: ; preds = %2
store i32 1, i32* %3
br label %15
15: ; preds = %14, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @strtol(i8* nocapture %6, i32* null, i32 0)
%8 = tail call i32 @stone(i32 %7)
br label %9
9: ; preds = %2, %4
%10 = phi i32 [ %8, %4 ], [ 1, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ memmove(void *, void const *, scalar_t__);
scalar_t__ strlen(void const *);
void *strmove(void *dest, const void *src) {
  memmove(dest, src, strlen(src) + 1);
}


x86 assembly (clang, -O0):
<strmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1040 <memmove@plt>
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strmove>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <memmove@plt>

LLVM IR (-O0):
define i8* @strmove(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = load i8*, i8** %5
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %9, 1
%11 = call i32 @memmove(i8* %6, i8* %7, i64 %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define noalias i8* @strmove(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = add nsw i64 %3, 1
%5 = tail call i32 @memmove(i8* %0, i8* %1, i64 %4)
ret i8* undef
}
/* Variables and functions */
int eg_indirect_table_set(unsigned int, int, unsigned int, int, unsigned int *);
int eg_sa_table_set(unsigned int dev_id, unsigned int index,
                    unsigned int *pentry) {
  if ((index < 32) || (index > 63)) {
    return -1;
  }
  return eg_indirect_table_set(dev_id, 2, index, 4, pentry);
}


x86 assembly (clang, -O0):
<eg_sa_table_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x20,-0xc(%rbp)
jb     1136 <eg_sa_table_set+0x26>
cmpl   $0x3f,-0xc(%rbp)
jbe    1142 <eg_sa_table_set+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    115e <eg_sa_table_set+0x4e>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%r8
mov    $0x2,%esi
mov    $0x4,%ecx
call   1030 <eg_indirect_table_set@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eg_sa_table_set>:
mov    %esi,%eax
and    $0xffffffe0,%eax
cmp    $0x20,%eax
jne    112e <eg_sa_table_set+0x1e>
mov    %rdx,%r8
mov    %esi,%edx
mov    $0x2,%esi
mov    $0x4,%ecx
jmp    1030 <eg_indirect_table_set@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @eg_sa_table_set(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i32, i32* %6
%9 = icmp ult i32 %8, 32
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp ugt i32 %11, 63
br i1 %12, label %13, label %14
13: ; preds = %10, %3
store i32 -1, i32* %4
br label %19
14: ; preds = %10
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = load i32*, i32** %7
%18 = call i32 @eg_indirect_table_set(i32 %15, i32 2, i32 %16, i32 4, i32* %17)
store i32 %18, i32* %4
br label %19
19: ; preds = %14, %13
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @eg_sa_table_set(i32 %0, i32 %1, i32* %2) {
%4 = and i32 %1, -32
%5 = icmp eq i32 %4, 32
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @eg_indirect_table_set(i32 %0, i32 2, i32 %1, i32 4, i32* %2)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ -1, %3 ]
ret i32 %9
}
void early_init() {}


x86 assembly (clang, -O0):
<early_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<early_init>:
ret

LLVM IR (-O0):
define void @early_init() {
ret void
}

LLVM IR (-O2):
define void @early_init() {
ret void
}
void RTRtipopen() {}


x86 assembly (clang, -O0):
<RTRtipopen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTRtipopen>:
ret

LLVM IR (-O0):
define void @RTRtipopen() {
ret void
}

LLVM IR (-O2):
define void @RTRtipopen() {
ret void
}
void av_strlcat() {}


x86 assembly (clang, -O0):
<av_strlcat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_strlcat>:
ret

LLVM IR (-O0):
define void @av_strlcat() {
ret void
}

LLVM IR (-O2):
define void @av_strlcat() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ ffs(scalar_t__);
uint32_t op_ctz(uint32_t a, uint32_t b) { return ffs(a) - 1; }


x86 assembly (clang, -O0):
<op_ctz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ffs@plt>
sub    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ctz>:
push   %rax
call   1030 <ffs@plt>
add    $0xffffffffffffffff,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @op_ctz(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i64 @ffs(i64 %5)
%7 = sub nsw i64 %6, 1
ret i64 %7
}

LLVM IR (-O2):
define i64 @op_ctz(i64 %0, i64 %1) {
%3 = tail call i64 @ffs(i64 %0)
%4 = add nsw i64 %3, -1
ret i64 %4
}
int test_imm_ABint32_reg(int val) { return ((val) & (0xAB << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_ABint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xab,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ABint32_reg>:
test   $0xab,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ABint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 171
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_ABint32_reg(i32 %0) {
%2 = and i32 %0, 171
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
unsigned long long _FNV_(char *, int /*<<< orphan*/, int);
unsigned long long fnv1a_64(char *raw) { return _FNV_(raw, 0, 1); }


x86 assembly (clang, -O0):
<fnv1a_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1030 <_FNV_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fnv1a_64>:
xor    %esi,%esi
mov    $0x1,%edx
jmp    1030 <_FNV_@plt>

LLVM IR (-O0):
define i64 @fnv1a_64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @_FNV_(i8* %3, i32 0, i32 1)
ret i64 %4
}

LLVM IR (-O2):
define i64 @fnv1a_64(i8* %0) {
%2 = tail call i64 @_FNV_(i8* %0, i32 0, i32 1)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int i = 10, j = 2;
  printf("i/j"
         "=%d\n",
         (i / j));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"i/j=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = sdiv i32 %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"i/j=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ log_set_callback(void (*)(int, char const *));
int lre_init();
int /*<<< orphan*/ lre_set_conf_path(char const *);
int lre_initX(const char *confpath, void (*logcb)(int, const char *)) {
  log_set_callback(logcb);
  lre_set_conf_path(confpath);
  return lre_init();
}


x86 assembly (clang, -O0):
<lre_initX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <log_set_callback@plt>
mov    -0x8(%rbp),%rdi
call   1050 <lre_set_conf_path@plt>
mov    $0x0,%al
call   1040 <lre_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lre_initX>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <log_set_callback@plt>
mov    %rbx,%rdi
call   1050 <lre_set_conf_path@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <lre_init@plt>

LLVM IR (-O0):
define i32 @lre_initX(i8* %0, void (i32, i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i32, i8*)*
store i8* %0, i8** %3
store void (i32, i8*)* %1, void (i32, i8*)** %4
%5 = load void (i32, i8*)*, void (i32, i8*)** %4
%6 = call i32 @log_set_callback(void (i32, i8*)* %5)
%7 = load i8*, i8** %3
%8 = call i32 @lre_set_conf_path(i8* %7)
%9 = call i32 (...) @lre_init()
ret i32 %9
}

LLVM IR (-O2):
define i32 @lre_initX(i8* %0, void (i32, i8*)* %1) {
%3 = tail call i32 @log_set_callback(void (i32, i8*)* %1)
%4 = tail call i32 @lre_set_conf_path(i8* %0)
%5 = tail call i32 (...) @lre_init()
ret i32 %5
}
/* Variables and functions */
int getchar();
int /*<<< orphan*/ printf(char *, int, int);
int main(int argc, char **argv) {
  int count = 1, amp;
  while (count < 500) {
    amp = getchar();
    printf("\t%d %d\n", count, amp);
    count += 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x1f4,-0x14(%rbp)
jge    1174 <main+0x54>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%ebx
lea    0xed0(%rip),%r14
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %r14,%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x1f4,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"\09%d %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %8
8: ; preds = %11, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 500
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = call i32 (...) @getchar()
store i32 %12, i32* %7
%13 = load i32, i32* %6
%14 = load i32, i32* %7
%15 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %14)
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %8
18: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"\09%d %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 1, %2 ], [ %7, %3 ]
%5 = tail call i32 (...) @getchar()
%6 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = add nuw nsw i32 %4, 1
%8 = icmp eq i32 %7, 500
br i1 %8, label %9, label %3
9: ; preds = %3
ret i32 0
}
int cube(int i) { return i * i * i; }


x86 assembly (clang, -O0):
<cube>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cube>:
mov    %edi,%eax
imul   %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @cube(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @cube(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = mul nsw i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ end();
void enddiff(void) { end(); }


x86 assembly (clang, -O0):
<enddiff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <end@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<enddiff>:
xor    %eax,%eax
jmp    1030 <end@plt>

LLVM IR (-O0):
define void @enddiff() {
%1 = call i32 (...) @end()
ret void
}

LLVM IR (-O2):
define void @enddiff() {
%1 = tail call i32 (...) @end()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ func1(int *);
func2(const int *fb) { func1((int *)fb); }


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <func1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
jmp    1030 <func1@plt>

LLVM IR (-O0):
define i32 @func2(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @func1(i32* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @func2(i32* %0) {
%2 = tail call i32 @func1(i32* %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ _optimize_merge_sort(int *, int *, int /*<<< orphan*/, int);
void optimize_merge_sort(int *array, int length) {
  int aux[length];
  _optimize_merge_sort(array, aux, 0, length - 1);
}


x86 assembly (clang, -O0):
<optimize_merge_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rsi
sub    %rcx,%rsi
mov    %rsi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
xor    %edx,%edx
call   1030 <_optimize_merge_sort@plt>
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<optimize_merge_sort>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%ecx
mov    %rsp,%rax
lea    0xf(,%rcx,4),%rcx
and    $0xfffffffffffffff0,%rcx
sub    %rcx,%rax
mov    %rax,%rsp
lea    -0x1(%rsi),%ecx
mov    %rax,%rsi
xor    %edx,%edx
call   1030 <_optimize_merge_sort@plt>
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
define void @optimize_merge_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i32, i64 %8
store i64 %8, i64* %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
%14 = call i32 @_optimize_merge_sort(i32* %11, i32* %10, i32 0, i32 %13)
%15 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
define void @optimize_merge_sort(i32* %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = alloca i32, i64 %3
%5 = add nsw i32 %1, -1
%6 = call i32 @_optimize_merge_sort(i32* %0, i32* %4, i32 0, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __dbg_check_unlock_from_isr();
int /*<<< orphan*/ __stats_stop_measure_crit_isr();
int /*<<< orphan*/ port_unlock_from_isr();
void chSysUnlockFromISR(void) {
  __dbg_check_unlock_from_isr();
  __stats_stop_measure_crit_isr();
  port_unlock_from_isr();
}


x86 assembly (clang, -O0):
<chSysUnlockFromISR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <__dbg_check_unlock_from_isr@plt>
mov    $0x0,%al
call   1050 <__stats_stop_measure_crit_isr@plt>
mov    $0x0,%al
call   1030 <port_unlock_from_isr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chSysUnlockFromISR>:
push   %rax
xor    %eax,%eax
call   1040 <__dbg_check_unlock_from_isr@plt>
xor    %eax,%eax
call   1050 <__stats_stop_measure_crit_isr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <port_unlock_from_isr@plt>

LLVM IR (-O0):
define void @chSysUnlockFromISR() {
%1 = call i32 (...) @__dbg_check_unlock_from_isr()
%2 = call i32 (...) @__stats_stop_measure_crit_isr()
%3 = call i32 (...) @port_unlock_from_isr()
ret void
}

LLVM IR (-O2):
define void @chSysUnlockFromISR() {
%1 = tail call i32 (...) @__dbg_check_unlock_from_isr()
%2 = tail call i32 (...) @__stats_stop_measure_crit_isr()
%3 = tail call i32 (...) @port_unlock_from_isr()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
int /*<<< orphan*/ gen_pop();
void gen_usigned_greater_than(void) {
  gen_pop();
  gen_call("ccugt");
}


x86 assembly (clang, -O0):
<gen_usigned_greater_than>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xece(%rip),%rdi
call   1040 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_usigned_greater_than>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <gen_call@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ccugt\00"
define void @gen_usigned_greater_than() {
%1 = call i32 (...) @gen_pop()
%2 = call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ccugt\00"
define void @gen_usigned_greater_than() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void SHA2IntEnable(uint32_t intFlags) {

  ;
  (*((volatile unsigned long *)(0x40024000 + 0x00000780))) = 0x00000001;
  (*((volatile unsigned long *)(0x40024000 + 0x00000784))) |= intFlags;
}


x86 assembly (clang, -O0):
<SHA2IntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x40024780,%eax
movq   $0x1,(%rax)
mov    -0x8(%rbp),%rax
mov    $0x40024784,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x40024784,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA2IntEnable>:
mov    %rdi,-0x8(%rsp)
movq   $0x1,0x40024780
mov    -0x8(%rsp),%rax
or     %rax,0x40024784
40
ret

LLVM IR (-O0):
define void @SHA2IntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
store volatile i64 1, i64* inttoptr (i64 1073891200 to i64*)
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1073891204 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1073891204 to i64*)
ret void
}

LLVM IR (-O2):
define void @SHA2IntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
store volatile i64 1, i64* inttoptr (i64 1073891200 to i64*)
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1073891204 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1073891204 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getpid();
scalar_t__ random();
int /*<<< orphan*/ srandom(int /*<<< orphan*/);
void fill_buffer(int *buf) {
  int i;
  srandom(getpid());
  for (i = 0; i < (16384) / (sizeof(int)); i++)
    buf[i] = (int)random();
}


x86 assembly (clang, -O0):
<fill_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <getpid@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
cmp    $0x1000,%rax
jae    1183 <fill_buffer+0x53>
mov    $0x0,%al
call   1050 <random@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1151 <fill_buffer+0x21>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_buffer>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <getpid@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <random@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    $0x1000,%rbx
jne    1150 <fill_buffer+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @fill_buffer(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = call i32 (...) @getpid()
%5 = call i32 @srandom(i32 %4)
store i32 0, i32* %3
br label %6
6: ; preds = %17, %1
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = icmp ult i64 %8, 4096
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = call i64 (...) @random()
%12 = trunc i64 %11 to i32
%13 = load i32*, i32** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
store i32 %12, i32* %16
br label %17
17: ; preds = %10
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @fill_buffer(i32* nocapture writeonly %0) {
%2 = tail call i32 (...) @getpid()
%3 = tail call i32 @srandom(i32 %2)
br label %4
4: ; preds = %1, %4
%5 = phi i64 [ 0, %1 ], [ %9, %4 ]
%6 = tail call i64 (...) @random()
%7 = trunc i64 %6 to i32
%8 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %7, i32* %8
%9 = add nuw nsw i64 %5, 1
%10 = icmp eq i64 %9, 4096
br i1 %10, label %11, label %4
11: ; preds = %4
ret void
}
int atoi8(char *s) {
  int res = 0;
  while (('0' <= *s) && (*s <= '7')) {
    res = res * 8 + (*s - '0');
    s++;
  }
  return res;
}


x86 assembly (clang, -O0):
<atoi8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0xd(%rbp)
jg     1138 <atoi8+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x37,%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1148 <atoi8+0x48>
jmp    116e <atoi8+0x6e>
mov    -0xc(%rbp),%eax
shl    $0x3,%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <atoi8+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi8>:
mov    (%rdi),%cl
mov    %ecx,%edx
and    $0xf8,%dl
xor    %eax,%eax
cmp    $0x30,%dl
jne    113a <atoi8+0x3a>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl %cl,%ecx
lea    (%rcx,%rax,8),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
mov    %ecx,%edx
and    $0xf8,%dl
add    $0x1,%rdi
cmp    $0x30,%dl
je     1120 <atoi8+0x20>
ret

LLVM IR (-O0):
define i32 @atoi8(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp sle i32 48, %7
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 55
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %26
16: ; preds = %14
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 8
%19 = load i8*, i8** %2
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = sub nsw i32 %21, 48
%23 = add nsw i32 %18, %22
store i32 %23, i32* %3
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %2
br label %4
26: ; preds = %14
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @atoi8(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -8
%4 = icmp eq i8 %3, 48
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i32 [ %12, %5 ], [ 0, %1 ]
%8 = phi i8* [ %13, %5 ], [ %0, %1 ]
%9 = zext i8 %6 to i32
%10 = shl nsw i32 %7, 3
%11 = add i32 %10, -48
%12 = add i32 %11, %9
%13 = getelementptr inbounds i8, i8* %8, i64 1
%14 = load i8, i8* %13
%15 = and i8 %14, -8
%16 = icmp eq i8 %15, 48
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %12, %5 ]
ret i32 %18
}
regx0adrx1_set(r0, r1, x0, x1, p0, p1) float r0, r1;
float *p0, *p1;
{ (p0[x0]) = (((float *)11111111)[x1]); }


x86 assembly (clang, -O0):
<regx0adrx1_set>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm1,-0x30(%rbp)
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
movslq -0x14(%rbp),%rcx
mov    $0xa98ac7,%eax
movss  (%rax,%rcx,4),%xmm0
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0adrx1_set>:
movslq %esi,%rax
movss  0xa98ac7(,%rax,4),%xmm0
movslq %edi,%rax
movss  %xmm0,(%rdx,%rax,4)
ret

LLVM IR (-O0):
define i32 @regx0adrx1_set(double %0, double %1, i32 %2, i32 %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca i32
%12 = alloca float*
%13 = alloca float*
%14 = fptrunc double %0 to float
%15 = fptrunc double %1 to float
store float %14, float* %8
store float %15, float* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store float* %4, float** %12
store float* %5, float** %13
%16 = load i32, i32* %11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds float, float* inttoptr (i64 11111111 to float*), i64 %17
%19 = load float, float* %18
%20 = load float*, float** %12
%21 = load i32, i32* %10
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds float, float* %20, i64 %22
store float %19, float* %23
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @regx0adrx1_set(double %0, double %1, i32 %2, i32 %3, float* nocapture writeonly %4, float* nocapture readnone %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds float, float* inttoptr (i64 11111111 to float*), i64 %7
%9 = load float, float* %8
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds float, float* %4, i64 %10
store float %9, float* %11
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
scalar_t__ setpgid(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ unix_error(char *);
void Setpgid(pid_t pid, pid_t gid) {
  if (setpgid(pid, gid) < 0) {
    unix_error("Setgpid error");
  }
}


x86 assembly (clang, -O0):
<Setpgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <setpgid@plt>
cmp    $0x0,%rax
jge    114f <Setpgid+0x2f>
lea    0xeb6(%rip),%rdi
call   1030 <unix_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Setpgid>:
push   %rax
call   1040 <setpgid@plt>
test   %rax,%rax
js     112d <Setpgid+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1030 <unix_error@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Setgpid error\00"
define void @Setpgid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i64 @setpgid(i32 %5, i32 %6)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @unix_error(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Setgpid error\00"
define void @Setpgid(i32 %0, i32 %1) {
%3 = tail call i64 @setpgid(i32 %0, i32 %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @unix_error(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_GENERALIZEDTIME;

/* Variables and functions */
int /*<<< orphan*/ ASN1_GENERALIZEDTIME_it;
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void ASN1_GENERALIZEDTIME_free(ASN1_GENERALIZEDTIME *a) {
  ASN1_item_free((ASN1_VALUE *)a, &ASN1_GENERALIZEDTIME_it);
}


x86 assembly (clang, -O0):
<ASN1_GENERALIZEDTIME_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_GENERALIZEDTIME_free>:
mov    0x2ec1(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@ASN1_GENERALIZEDTIME_it = global i32 0
define void @ASN1_GENERALIZEDTIME_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @ASN1_GENERALIZEDTIME_it)
ret void
}

LLVM IR (-O2):
@ASN1_GENERALIZEDTIME_it = global i32 0
define void @ASN1_GENERALIZEDTIME_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @ASN1_GENERALIZEDTIME_it)
ret void
}
/* Type definitions */
struct ft_cxt {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ft_put_word(struct ft_cxt *, int);
void ft_nop(struct ft_cxt *cxt) { ft_put_word(cxt, 0x4); }


x86 assembly (clang, -O0):
<ft_nop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <ft_put_word@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_nop>:
mov    $0x4,%esi
jmp    1030 <ft_put_word@plt>

LLVM IR (-O0):
%struct.ft_cxt = type { i32 }
define void @ft_nop(%struct.ft_cxt* %0) {
%2 = alloca %struct.ft_cxt*
store %struct.ft_cxt* %0, %struct.ft_cxt** %2
%3 = load %struct.ft_cxt*, %struct.ft_cxt** %2
%4 = call i32 @ft_put_word(%struct.ft_cxt* %3, i32 4)
ret void
}

LLVM IR (-O2):
%struct.ft_cxt = type { i32 }
define void @ft_nop(%struct.ft_cxt* %0) {
%2 = tail call i32 @ft_put_word(%struct.ft_cxt* %0, i32 4)
ret void
}
void INT_Excep_PERIB_INTB143(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB143>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB143>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB143() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB143() {
ret void
}
char *token(char **str, char sep) {
  char *start = *str;
  char *cur;
  for (cur = start; *cur && (*cur != sep); ++cur)
    ;
  *cur = 0;
  *str = cur + 1;
  return start;
}


x86 assembly (clang, -O0):
<token>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x21(%rbp)
je     1149 <token+0x49>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1159 <token+0x59>
jmp    116f <token+0x6f>
jmp    115e <token+0x5e>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1121 <token+0x21>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x20(%rbp),%rcx
add    $0x1,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<token>:
mov    (%rdi),%rax
mov    %rax,%rcx
cs nopw 0x0(%rax,%rax,1)
movzbl (%rcx),%edx
add    $0x1,%rcx
test   %dl,%dl
je     1120 <token+0x20>
cmp    %sil,%dl
jne    1110 <token+0x10>
movb   $0x0,-0x1(%rcx)
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i8* @token(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i8*
store i8** %0, i8*** %3
store i8 %1, i8* %4
%7 = load i8**, i8*** %3
%8 = load i8*, i8** %7
store i8* %8, i8** %5
%9 = load i8*, i8** %5
store i8* %9, i8** %6
br label %10
10: ; preds = %25, %2
%11 = load i8*, i8** %6
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %22
15: ; preds = %10
%16 = load i8*, i8** %6
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = icmp ne i32 %18, %20
br label %22
22: ; preds = %15, %10
%23 = phi i1 [ false, %10 ], [ %21, %15 ]
br i1 %23, label %24, label %28
24: ; preds = %22
br label %25
25: ; preds = %24
%26 = load i8*, i8** %6
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %6
br label %10
28: ; preds = %22
%29 = load i8*, i8** %6
store i8 0, i8* %29
%30 = load i8*, i8** %6
%31 = getelementptr inbounds i8, i8* %30, i64 1
%32 = load i8**, i8*** %3
store i8* %31, i8** %32
%33 = load i8*, i8** %5
ret i8* %33
}

LLVM IR (-O2):
define i8* @token(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
br label %4
4: ; preds = %4, %2
%5 = phi i8* [ %3, %2 ], [ %10, %4 ]
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = icmp eq i8 %6, %1
%9 = or i1 %7, %8
%10 = getelementptr inbounds i8, i8* %5, i64 1
br i1 %9, label %11, label %4
11: ; preds = %4
store i8 0, i8* %5
store i8* %10, i8** %0
ret i8* %3
}
int execute_getpgrp() { return 0; }


x86 assembly (clang, -O0):
<execute_getpgrp>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_getpgrp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_getpgrp() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_getpgrp() {
ret i32 0
}
void instruc_10() {}


x86 assembly (clang, -O0):
<instruc_10>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruc_10>:
ret

LLVM IR (-O0):
define void @instruc_10() {
ret void
}

LLVM IR (-O2):
define void @instruc_10() {
ret void
}
char *Field_FindFirstSeparator(char *s) {
  char c;
  while ((c = *s) != '\0') {
    if (c == ';')
      return s;
    s++;
  }
  return ((void *)0);
}


x86 assembly (clang, -O0):
<Field_FindFirstSeparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
je     1148 <Field_FindFirstSeparator+0x48>
movsbl -0x11(%rbp),%eax
cmp    $0x3b,%eax
jne    1137 <Field_FindFirstSeparator+0x37>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1150 <Field_FindFirstSeparator+0x50>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <Field_FindFirstSeparator+0x8>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Field_FindFirstSeparator>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rax),%ecx
test   %cl,%cl
je     1122 <Field_FindFirstSeparator+0x22>
cmp    $0x3b,%cl
je     1124 <Field_FindFirstSeparator+0x24>
add    $0x1,%rax
jmp    1110 <Field_FindFirstSeparator+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @Field_FindFirstSeparator(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
br label %5
5: ; preds = %16, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %5
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 59
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i8*, i8** %3
store i8* %15, i8** %2
br label %20
16: ; preds = %10
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
br label %5
19: ; preds = %5
store i8* null, i8** %2
br label %20
20: ; preds = %19, %14
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define i8* @Field_FindFirstSeparator(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %8
i8 59, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2
br label %8
8: ; preds = %2, %7
%9 = phi i8* [ %3, %7 ], [ null, %2 ]
ret i8* %9
}
int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd) { return 0; }


x86 assembly (clang, -O0):
<uniphier_ld4_sbc_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uniphier_ld4_sbc_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.uniphier_board_data = type opaque
define i32 @uniphier_ld4_sbc_init(%struct.uniphier_board_data* %0) {
%2 = alloca %struct.uniphier_board_data*
store %struct.uniphier_board_data* %0, %struct.uniphier_board_data** %2
ret i32 0
}

LLVM IR (-O2):
%struct.uniphier_board_data = type opaque
define i32 @uniphier_ld4_sbc_init(%struct.uniphier_board_data* nocapture readnone %0) {
ret i32 0
}
void SIO1_writeData32(unsigned long val) {}


x86 assembly (clang, -O0):
<SIO1_writeData32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIO1_writeData32>:
ret

LLVM IR (-O0):
define void @SIO1_writeData32(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @SIO1_writeData32(i64 %0) {
ret void
}
/* Variables and functions */
double cosh(double);
double sinh(double);
double dAUX1bp3a(double x) {
  return (sinh(x) - x * cosh(x)) / (sinh(x) * sinh(x));
}


x86 assembly (clang, -O0):
<dAUX1bp3a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sinh@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <cosh@plt>
movsd  -0x28(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sinh@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sinh@plt>
movsd  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dAUX1bp3a>:
sub    $0x18,%rsp
movsd  %xmm0,(%rsp)
call   1030 <sinh@plt>
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
call   1040 <cosh@plt>
movsd  (%rsp),%xmm2
mulsd  %xmm2,%xmm0
movsd  0x8(%rsp),%xmm1
subsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
movapd %xmm2,%xmm0
call   1030 <sinh@plt>
movsd  %xmm0,0x10(%rsp)
movsd  (%rsp),%xmm0
call   1030 <sinh@plt>
mulsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @dAUX1bp3a(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sinh(double %3)
%5 = load double, double* %2
%6 = load double, double* %2
%7 = call double @cosh(double %6)
%8 = fneg double %5
%9 = call double @llvm.fmuladd.f64(double %8, double %7, double %4)
%10 = load double, double* %2
%11 = call double @sinh(double %10)
%12 = load double, double* %2
%13 = call double @sinh(double %12)
%14 = fmul double %11, %13
%15 = fdiv double %9, %14
ret double %15
}

LLVM IR (-O2):
define double @dAUX1bp3a(double %0) {
%2 = tail call double @sinh(double %0)
%3 = tail call double @cosh(double %0)
%4 = fneg double %0
%5 = tail call double @llvm.fmuladd.f64(double %4, double %3, double %2)
%6 = tail call double @sinh(double %0)
%7 = tail call double @sinh(double %0)
%8 = fmul double %6, %7
%9 = fdiv double %5, %8
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void merge_sort(int *A, int p, int r) {
  if (p < r) {
    int q = (r + p) / 2;
    merge_sort(A, p, q);
    merge_sort(A, q + 1, r);
    merge(A, p, q, r);
  }
}


x86 assembly (clang, -O0):
<merge_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <merge_sort+0x62>
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <merge_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <merge_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_sort>:
cmp    %edx,%esi
jge    1172 <merge_sort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1040 <merge_sort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1040 <merge_sort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <merge@plt>
ret

LLVM IR (-O0):
define void @merge_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %5
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @merge_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @merge_sort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @merge_sort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
void scale2(double *z, const double *x) { (*z) = (*x) / 2.0; }


x86 assembly (clang, -O0):
<scale2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  0xee4(%rip),%xmm1
divsd  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale2>:
movsd  (%rsi),%xmm0
mulsd  0xef4(%rip),%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @scale2(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %4
%6 = load double, double* %5
%7 = fdiv double %6, 2.000000e+00
%8 = load double*, double** %3
store double %7, double* %8
ret void
}

LLVM IR (-O2):
define void @scale2(double* nocapture writeonly %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = fmul double %3, 5.000000e-01
store double %4, double* %0
ret void
}
int util_func() { return 5; }


x86 assembly (clang, -O0):
<util_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_func>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @util_func() {
ret i32 5
}

LLVM IR (-O2):
define i32 @util_func() {
ret i32 5
}