xunge/DecIR huggingface dataset:
/* Variables and functions */
float ANTweenTimingFunctionElasticIn(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionElasticIn(float time, float duration) {
  return ANTweenTimingFunctionElasticIn(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionElasticIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionElasticIn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionElasticIn>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionElasticIn@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionElasticIn(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionElasticIn(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionElasticIn(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionElasticIn(float %0, i32 0, i32 1, float %1)
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ modadd(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/);
uint64_t modshl(uint64_t a, unsigned int s, uint64_t mod) {
  while (s--)
    a = modadd(a, a, mod);
  return a;
}


x86 assembly (clang, -O0):
<modshl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     114b <modshl+0x3b>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <modadd@plt>
mov    %eax,-0x4(%rbp)
jmp    1121 <modshl+0x11>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modshl>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%eax
test   %esi,%esi
je     1130 <modshl+0x20>
mov    %edx,%ebx
mov    %esi,%ebp
nopl   (%rax)
mov    %eax,%edi
mov    %eax,%esi
mov    %ebx,%edx
call   1030 <modadd@plt>
add    $0xffffffff,%ebp
jne    1120 <modshl+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @modshl(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %5
%9 = add i32 %8, -1
store i32 %9, i32* %5
%10 = icmp ne i32 %8, 0
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i32, i32* %4
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = call i32 @modadd(i32 %12, i32 %13, i32 %14)
store i32 %15, i32* %4
br label %7
16: ; preds = %7
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @modshl(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %11, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %0, %3 ]
%7 = phi i32 [ %8, %5 ], [ %1, %3 ]
%8 = add i32 %7, -1
%9 = tail call i32 @modadd(i32 %6, i32 %6, i32 %2)
%10 = icmp eq i32 %8, 0
br i1 %10, label %11, label %5
11: ; preds = %5, %3
%12 = phi i32 [ %0, %3 ], [ %9, %5 ]
ret i32 %12
}
int ls_cost_nm7_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 2;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 1;
  return 0;
}


x86 assembly (clang, -O0):
<ls_cost_nm7_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <ls_cost_nm7_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <ls_cost_nm7_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <ls_cost_nm7_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <ls_cost_nm7_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x1,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm7_work>:
test   %rdi,%rdi
je     110b <ls_cost_nm7_work+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <ls_cost_nm7_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <ls_cost_nm7_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <ls_cost_nm7_work+0x2c>
movl   $0x1,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ls_cost_nm7_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 1, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @ls_cost_nm7_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 1, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int err_syntax10_parse();
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("yyparse() = %d\n", err_syntax10_parse());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <err_syntax10_parse@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <err_syntax10_parse@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"yyparse() = %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @err_syntax10_parse()
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"yyparse() = %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @err_syntax10_parse()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ hello_smews();
int main(void) {
  hello_smews();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hello_smews@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <hello_smews@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hello_smews()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @hello_smews()
ret i32 0
}
int main(void) {
  int a = 1;
  volatile int b = -5;
  long long int c = -6;
  a << -3;
  1 << -4;
  1 << b;
  a << c;
  a << (b + c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0xfffffffb,-0xc(%rbp)
movq   $0xfffffffffffffffa,-0x18(%rbp)
ff
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%eax
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0xfffffffb,-0x4(%rsp)
ff
mov    -0x4(%rsp),%eax
mov    -0x4(%rsp),%eax
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
store i32 0, i32* %1
store i32 1, i32* %2
store volatile i32 -5, i32* %3
store i64 -6, i64* %4
%5 = load i32, i32* %2
%6 = shl i32 %5, -3
%7 = load volatile i32, i32* %3
%8 = shl i32 1, %7
%9 = load i32, i32* %2
%10 = load i64, i64* %4
%11 = trunc i64 %10 to i32
%12 = shl i32 %9, %11
%13 = load i32, i32* %2
%14 = load volatile i32, i32* %3
%15 = sext i32 %14 to i64
%16 = load i64, i64* %4
%17 = add nsw i64 %15, %16
%18 = trunc i64 %17 to i32
%19 = shl i32 %13, %18
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 -5, i32* %1
%3 = load volatile i32, i32* %1
%4 = load volatile i32, i32* %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ dprintf(int, char *, char const *, char const *);
int /*<<< orphan*/ exit(int);
int strtol(char const *, char **, int);
int my_atoi(const char *name, const char *s) {
  char *endptr = 0;
  int n = strtol(s, &endptr, 10);
  if (*endptr) {
    dprintf(2, "%s must be a number (got: '%s')\n", name, s);
    exit(1);
  }
  return n;
}


x86 assembly (clang, -O0):
<my_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0xa,%edx
call   1040 <strtol@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     118d <my_atoi+0x5d>
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x2,%edi
lea    0xe82(%rip),%rsi
call   1030 <dprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_atoi>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
movq   $0x0,(%rsp)
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0xa,%edx
call   1040 <strtol@plt>
mov    (%rsp),%rcx
cmpb   $0x0,(%rcx)
jne    1163 <my_atoi+0x33>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe96(%rip),%rsi
mov    $0x2,%edi
mov    %r14,%rdx
mov    %rbx,%rcx
call   1030 <dprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"%s must be a number (got: '%s')\0A\00"
define i32 @my_atoi(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i8* null, i8** %5
%7 = load i8*, i8** %4
%8 = call i32 @strtol(i8* %7, i8** %5, i32 10)
store i32 %8, i32* %6
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %2
%13 = load i8*, i8** %3
%14 = load i8*, i8** %4
%15 = call i32 @dprintf(i32 2, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %13, i8* %14)
%16 = call i32 @exit(i32 1)
unreachable
17: ; preds = %2
%18 = load i32, i32* %6
ret i32 %18
}

LLVM IR (-O2):
@.str = [33 x i8] c"%s must be a number (got: '%s')\0A\00"
define i32 @my_atoi(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
store i8* null, i8** %3
%5 = call i32 @strtol(i8* %1, i8** %3, i32 10)
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = tail call i32 @dprintf(i32 2, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%11 = tail call i32 @exit(i32 1)
unreachable
12: ; preds = %2
ret i32 %5
}
/* Variables and functions */
bool nrf52_errata_41(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_41>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_41>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_41() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_41() {
ret i32 0
}
void sip_api_end_thread(void) {}


x86 assembly (clang, -O0):
<sip_api_end_thread>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sip_api_end_thread>:
ret

LLVM IR (-O0):
define void @sip_api_end_thread() {
ret void
}

LLVM IR (-O2):
define void @sip_api_end_thread() {
ret void
}
unsigned short int f13(unsigned short int x, int y) {
  return (x << y) | (x >> ((-y) & (8 * sizeof(unsigned short) - 1)));
}


x86 assembly (clang, -O0):
<f13>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
movslq %ecx,%rcx
and    $0xf,%rcx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f13>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
and    $0xf,%cl
shr    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f13(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 %6, %7
%9 = load i16, i16* %3
%10 = zext i16 %9 to i32
%11 = load i32, i32* %4
%12 = sub nsw i32 0, %11
%13 = sext i32 %12 to i64
%14 = and i64 %13, 15
%15 = trunc i64 %14 to i32
%16 = ashr i32 %10, %15
%17 = or i32 %8, %16
%18 = trunc i32 %17 to i16
ret i16 %18
}

LLVM IR (-O2):
define zeroext i16 @f13(i16 zeroext %0, i32 %1) {
%3 = zext i16 %0 to i32
%4 = shl i32 %3, %1
%5 = sub nsw i32 0, %1
%6 = and i32 %5, 15
%7 = lshr i32 %3, %6
%8 = or i32 %7, %4
%9 = trunc i32 %8 to i16
ret i16 %9
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ bus_write(int, int);
void write_reg(uint8_t addr, uint8_t data) { bus_write(addr | 0x80, data); }


x86 assembly (clang, -O0):
<write_reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
or     $0x80,%edi
mov    -0x8(%rbp),%esi
call   1030 <bus_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_reg>:
or     $0x80,%edi
jmp    1030 <bus_write@plt>

LLVM IR (-O0):
define void @write_reg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = or i32 %5, 128
%7 = load i32, i32* %4
%8 = call i32 @bus_write(i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
define void @write_reg(i32 %0, i32 %1) {
%3 = or i32 %0, 128
%4 = tail call i32 @bus_write(i32 %3, i32 %1)
ret void
}
unsigned int spi_min_clk_divisor(unsigned int input_khz,
                                 unsigned int max_target_khz) {
  unsigned int quotient =
      (input_khz + 2 * max_target_khz - 1) / (2 * max_target_khz);
  if (quotient == 0)
    return 0;
  return quotient - 1;
}


x86 assembly (clang, -O0):
<spi_min_clk_divisor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
add    %ecx,%eax
sub    $0x1,%eax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    113b <spi_min_clk_divisor+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1144 <spi_min_clk_divisor+0x44>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_min_clk_divisor>:
add    %esi,%esi
add    $0xffffffff,%edi
xor    %eax,%eax
add    %esi,%edi
jb     1114 <spi_min_clk_divisor+0x14>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @spi_min_clk_divisor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul i32 2, %8
%10 = add i32 %7, %9
%11 = sub i32 %10, 1
%12 = load i32, i32* %5
%13 = mul i32 2, %12
%14 = udiv i32 %11, %13
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 0, i32* %3
br label %21
18: ; preds = %2
%19 = load i32, i32* %6
%20 = sub i32 %19, 1
store i32 %20, i32* %3
br label %21
21: ; preds = %18, %17
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @spi_min_clk_divisor(i32 %0, i32 %1) {
%3 = shl i32 %1, 1
%4 = add i32 %0, -1
%5 = add i32 %4, %3
%6 = icmp ugt i32 %3, %5
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = udiv i32 %5, %3
%9 = add i32 %8, -1
br label %10
10: ; preds = %2, %7
%11 = phi i32 [ %9, %7 ], [ 0, %2 ]
ret i32 %11
}
int omap_pm_if_init_helper(void) { return 0; }


x86 assembly (clang, -O0):
<omap_pm_if_init_helper>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_pm_if_init_helper>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @omap_pm_if_init_helper() {
ret i32 0
}

LLVM IR (-O2):
define i32 @omap_pm_if_init_helper() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ hex_chunk(char *, int);
scalar_t__ strcmp(char *, char *);
char *hex_chunk_01b() {
  char chunk[4 + 1];
  hex_chunk(chunk, 241);
  do {
    if (!(strcmp(chunk, "00F1") == 0))
      return "return '00F1' for integer 241'";
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<hex_chunk_01b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0xd(%rbp),%rdi
mov    $0xf1,%esi
call   1030 <hex_chunk@plt>
lea    -0xd(%rbp),%rdi
lea    0xebf(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
je     1160 <hex_chunk_01b+0x40>
lea    0xeae(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    116d <hex_chunk_01b+0x4d>
jmp    1165 <hex_chunk_01b+0x45>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex_chunk_01b>:
push   %rbx
sub    $0x10,%rsp
lea    0xb(%rsp),%rbx
mov    %rbx,%rdi
mov    $0xf1,%esi
call   1030 <hex_chunk@plt>
lea    0xec2(%rip),%rsi
mov    %rbx,%rdi
call   1040 <strcmp@plt>
test   %rax,%rax
lea    0xeb5(%rip),%rcx
cmovne %rcx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"00F1\00"
@.str.1 = [31 x i8] c"return '00F1' for integer 241'\00"
define i8* @hex_chunk_01b() {
%1 = alloca i8*
%2 = alloca [5 x i8]
%3 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%4 = call i32 @hex_chunk(i8* %3, i32 241)
br label %5
5: ; preds = %0
%6 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%7 = call i64 @strcmp(i8* %6, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%8 = icmp eq i64 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %5
store i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i8** %1
br label %12
10: ; preds = %5
br label %11
11: ; preds = %10
store i8* null, i8** %1
br label %12
12: ; preds = %11, %9
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"00F1\00"
@.str.1 = [31 x i8] c"return '00F1' for integer 241'\00"
define i8* @hex_chunk_01b() {
%1 = alloca [5 x i8]
%2 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
%3 = call i32 @hex_chunk(i8* %2, i32 241)
%4 = call i64 @strcmp(i8* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
%6 = select i1 %5, i8* null, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int fs_lsdir(char *parameter) { fprintf(stderr, "lsdir: UNDER DEVELOPMENT\n"); }


x86 assembly (clang, -O0):
<fs_lsdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_lsdir>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"lsdir: UNDER DEVELOPMENT\0A\00"
define i32 @fs_lsdir(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* @stderr
%5 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"lsdir: UNDER DEVELOPMENT\0A\00"
define i32 @fs_lsdir(i8* nocapture readnone %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
struct nlattr {
  int nla_len;
};

/* Variables and functions */
int NLA_HDRLEN;
int nla_len(const struct nlattr *nla) { return nla->nla_len - NLA_HDRLEN; }


x86 assembly (clang, -O0):
<nla_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_len>:
mov    (%rdi),%eax
mov    0x2ed7(%rip),%rcx
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.nlattr = type { i32 }
@NLA_HDRLEN = global i32 0
define i32 @nla_len(%struct.nlattr* %0) {
%2 = alloca %struct.nlattr*
store %struct.nlattr* %0, %struct.nlattr** %2
%3 = load %struct.nlattr*, %struct.nlattr** %2
%4 = getelementptr inbounds %struct.nlattr, %struct.nlattr* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = load i32, i32* @NLA_HDRLEN
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
%struct.nlattr = type { i32 }
@NLA_HDRLEN = global i32 0
define i32 @nla_len(%struct.nlattr* nocapture %0) {
%2 = getelementptr inbounds %struct.nlattr, %struct.nlattr* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = load i32, i32* @NLA_HDRLEN
%5 = sub nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void set_op(int op) {
  outb(3, 0x3ce);
  outb(op, 0x3cf);
}


x86 assembly (clang, -O0):
<set_op>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x3,%edi
mov    $0x3ce,%esi
call   1030 <outb@plt>
mov    -0x4(%rbp),%edi
mov    $0x3cf,%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_op>:
push   %rbx
mov    %edi,%ebx
mov    $0x3,%edi
mov    $0x3ce,%esi
call   1030 <outb@plt>
mov    %ebx,%edi
mov    $0x3cf,%esi
pop    %rbx
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @set_op(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @outb(i32 3, i32 974)
%4 = load i32, i32* %2
%5 = call i32 @outb(i32 %4, i32 975)
ret void
}

LLVM IR (-O2):
define void @set_op(i32 %0) {
%2 = tail call i32 @outb(i32 3, i32 974)
%3 = tail call i32 @outb(i32 %0, i32 975)
ret void
}
/* Variables and functions */
int als_enable_write(int /*<<< orphan*/);
int als_disable(void) { return als_enable_write(0); }


x86 assembly (clang, -O0):
<als_disable>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <als_enable_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<als_disable>:
xor    %edi,%edi
jmp    1030 <als_enable_write@plt>

LLVM IR (-O0):
define i32 @als_disable() {
%1 = call i32 @als_enable_write(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @als_disable() {
%1 = tail call i32 @als_enable_write(i32 0)
ret i32 %1
}
/* Variables and functions */
char const *strdup(char *);
const char *return_string_test(void) { return strdup("return string test"); }


x86 assembly (clang, -O0):
<return_string_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <strdup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_string_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <strdup@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"return string test\00"
define i8* @return_string_test() {
%1 = call i8* @strdup(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [19 x i8] c"return string test\00"
define noalias i8* @return_string_test() {
%1 = tail call dereferenceable_or_null(19) i8* @strdup(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ glutPostRedisplay();
int /*<<< orphan*/ usleep(int);
void idle(void) {
  glutPostRedisplay();
  usleep(10000);
}


x86 assembly (clang, -O0):
<idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glutPostRedisplay@plt>
mov    $0x2710,%edi
call   1040 <usleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<idle>:
push   %rax
xor    %eax,%eax
call   1030 <glutPostRedisplay@plt>
mov    $0x2710,%edi
pop    %rax
jmp    1040 <usleep@plt>

LLVM IR (-O0):
define void @idle() {
%1 = call i32 (...) @glutPostRedisplay()
%2 = call i32 @usleep(i32 10000)
ret void
}

LLVM IR (-O2):
define void @idle() {
%1 = tail call i32 (...) @glutPostRedisplay()
%2 = tail call i32 @usleep(i32 10000)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void main(void) {
  int i = 0;
  for (i = 0; i < 256; i++) {
    printf("%c", i);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
jge    1150 <main+0x40>
mov    -0x4(%rbp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1126 <main+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @main() {
%1 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 256
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int sd_resolve_get_fd(void *resolve) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_resolve_get_fd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_resolve_get_fd>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_resolve_get_fd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_resolve_get_fd(i8* nocapture readnone %0) {
%2 = load i32, i32* @EINVAL
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Type definitions */
struct dhcpmsg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_option_string(struct dhcpmsg *, int, char const *const,
                                     size_t);
void add_option_vendor(struct dhcpmsg *packet, const char *const vendor,
                       size_t vsize) {
  if (vsize)
    add_option_string(packet, 0x3c, vendor, vsize);
}


x86 assembly (clang, -O0):
<add_option_vendor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1145 <add_option_vendor+0x35>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x3c,%esi
call   1030 <add_option_string@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_option_vendor>:
mov    %rdx,%rcx
test   %rdx,%rdx
je     1125 <add_option_vendor+0x15>
mov    %rsi,%rdx
mov    $0x3c,%esi
jmp    1030 <add_option_string@plt>
ret

LLVM IR (-O0):
%struct.dhcpmsg = type { i32 }
define void @add_option_vendor(%struct.dhcpmsg* %0, i8* %1, i64 %2) {
%4 = alloca %struct.dhcpmsg*
%5 = alloca i8*
%6 = alloca i64
store %struct.dhcpmsg* %0, %struct.dhcpmsg** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load %struct.dhcpmsg*, %struct.dhcpmsg** %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @add_option_string(%struct.dhcpmsg* %10, i32 60, i8* %11, i64 %12)
br label %14
14: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
%struct.dhcpmsg = type { i32 }
define void @add_option_vendor(%struct.dhcpmsg* %0, i8* %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @add_option_string(%struct.dhcpmsg* %0, i32 60, i8* %1, i64 %2)
br label %7
7: ; preds = %5, %3
ret void
}
void size_fun(void **data, int *cl) { *cl += 1; }


x86 assembly (clang, -O0):
<size_fun>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_fun>:
addl   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @size_fun(i8** %0, i32* %1) {
%3 = alloca i8**
%4 = alloca i32*
store i8** %0, i8*** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
store i32 %7, i32* %5
ret void
}

LLVM IR (-O2):
define void @size_fun(i8** nocapture readnone %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_free__(void *);
void EC_KEY_free(void *key) { __coverity_free__(key); }


x86 assembly (clang, -O0):
<EC_KEY_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__coverity_free__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_KEY_free>:
jmp    1030 <__coverity_free__@plt>

LLVM IR (-O0):
define void @EC_KEY_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__coverity_free__(i8* %3)
ret void
}

LLVM IR (-O2):
define void @EC_KEY_free(i8* %0) {
%2 = tail call i32 @__coverity_free__(i8* %0)
ret void
}
int test_imm_CAint64_midword_reg(long long val) {
  return ((val >> 16) & (0xCA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CAint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xca,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CAint64_midword_reg>:
test   $0xca0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CAint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 202
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CAint64_midword_reg(i64 %0) {
%2 = and i64 %0, 13238272
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int md6_default_r(int d, int keylen) {
  int r;
  r = 40 + (d / 4);
  if (keylen > 0)
    r = ((80) > (r) ? (80) : (r));
  return r;
}


x86 assembly (clang, -O0):
<md6_default_r>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
add    $0x28,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    114c <md6_default_r+0x4c>
mov    $0x50,%eax
cmp    -0xc(%rbp),%eax
jle    1140 <md6_default_r+0x40>
mov    $0x50,%eax
mov    %eax,-0x10(%rbp)
jmp    1146 <md6_default_r+0x46>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<md6_default_r>:
lea    0x3(%rdi),%ecx
test   %edi,%edi
cmovns %edi,%ecx
sar    $0x2,%ecx
add    $0x28,%ecx
cmp    $0x51,%ecx
mov    $0x50,%eax
cmovge %ecx,%eax
test   %esi,%esi
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @md6_default_r(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 4
%8 = add nsw i32 40, %7
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp sgt i32 80, %12
br i1 %13, label %14, label %15
14: ; preds = %11
br label %17
15: ; preds = %11
%16 = load i32, i32* %5
br label %17
17: ; preds = %15, %14
%18 = phi i32 [ 80, %14 ], [ %16, %15 ]
store i32 %18, i32* %5
br label %19
19: ; preds = %17, %2
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @md6_default_r(i32 %0, i32 %1) {
%3 = sdiv i32 %0, 4
%4 = add nsw i32 %3, 40
%5 = icmp sgt i32 %1, 0
%6 = icmp sgt i32 %4, 80
%7 = select i1 %6, i32 %4, i32 80
%8 = select i1 %5, i32 %7, i32 %4
ret i32 %8
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
double rp() { return ((double)rand()) / RAND_MAX; }


x86 assembly (clang, -O0):
<rp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
divsd  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rp>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
divsd  (%rax),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @rp() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
ret double %4
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @rp() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ japi_setshortcut(int, char);
void j_setshortcut(int arg0, char arg1) { japi_setshortcut(arg0, arg1); }


x86 assembly (clang, -O0):
<j_setshortcut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
movsbl -0x5(%rbp),%esi
call   1030 <japi_setshortcut@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_setshortcut>:
jmp    1030 <japi_setshortcut@plt>

LLVM IR (-O0):
define void @j_setshortcut(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = load i8, i8* %4
%7 = call i32 @japi_setshortcut(i32 %5, i8 signext %6)
ret void
}

LLVM IR (-O2):
define void @j_setshortcut(i32 %0, i8 signext %1) {
%3 = tail call i32 @japi_setshortcut(i32 %0, i8 signext %1)
ret void
}
unsigned int test_27(unsigned int a, unsigned int b) {
  return (a << 1) | ((b >> 4) & 1);
}


x86 assembly (clang, -O0):
<test_27>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x8(%rbp),%ecx
shr    $0x4,%ecx
and    $0x1,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_27>:
shr    $0x4,%esi
and    $0x1,%esi
lea    (%rsi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @test_27(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 1
%7 = load i32, i32* %4
%8 = lshr i32 %7, 4
%9 = and i32 %8, 1
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @test_27(i32 %0, i32 %1) {
%3 = shl i32 %0, 1
%4 = lshr i32 %1, 4
%5 = and i32 %4, 1
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ unexpected_error(char *, char *, int);
void init_cholesky_mpi() {
  unexpected_error(
      "Unimplemented init_cholesky_mpi, use --with-scalapack and --enable-mpi",
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/slitvinov/BD_BOX/refs/heads/master/src/"
      "diff_alg/cholesky_mpi.c",
      97);
}


x86 assembly (clang, -O0):
<init_cholesky_mpi>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf25(%rip),%rsi
mov    $0x61,%edx
call   1030 <unexpected_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_cholesky_mpi>:
lea    0xee9(%rip),%rdi
lea    0xf29(%rip),%rsi
mov    $0x61,%edx
jmp    1030 <unexpected_error@plt>

LLVM IR (-O0):
@.str = [71 x i8] c"Unimplemented init_cholesky_mpi, use --with-scalapack and --enable-mpi\00"
@.str.1 = [153 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/slitvinov/BD_BOX/refs/heads/master/src/diff_alg/cholesky_mpi.c\00"
define void @init_cholesky_mpi() {
%1 = call i32 @unexpected_error(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([153 x i8], [153 x i8]* @.str.1, i64 0, i64 0), i32 97)
ret void
}

LLVM IR (-O2):
@.str = [71 x i8] c"Unimplemented init_cholesky_mpi, use --with-scalapack and --enable-mpi\00"
@.str.1 = [153 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/slitvinov/BD_BOX/refs/heads/master/src/diff_alg/cholesky_mpi.c\00"
define void @init_cholesky_mpi() {
%1 = tail call i32 @unexpected_error(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([153 x i8], [153 x i8]* @.str.1, i64 0, i64 0), i32 97)
ret void
}
int berlin_gcd(unsigned int m, unsigned int n) {
  int rem;
  while (n != 0) {
    rem = m % n;
    m = n;
    n = rem;
  }
  return (m);
}


x86 assembly (clang, -O0):
<berlin_gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1130 <berlin_gcd+0x30>
mov    -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <berlin_gcd+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<berlin_gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111e <berlin_gcd+0x1e>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
xor    %edx,%edx
div    %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <berlin_gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @berlin_gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = urem i32 %10, %11
store i32 %12, i32* %5
%13 = load i32, i32* %4
store i32 %13, i32* %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @berlin_gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = urem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int truncate(char const *, int /*<<< orphan*/);
int outside_truncate(const char *path, off_t length) {
  return truncate(path, length);
}


x86 assembly (clang, -O0):
<outside_truncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <truncate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outside_truncate>:
jmp    1030 <truncate@plt>

LLVM IR (-O0):
define i32 @outside_truncate(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @truncate(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @outside_truncate(i8* %0, i32 %1) {
%3 = tail call i32 @truncate(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
char *strstr(char *, char *);
short StartsWith(char *base, char *str) {
  return (strstr(base, str) - base) == 0;
}


x86 assembly (clang, -O0):
<StartsWith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StartsWith>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define signext i16 @StartsWith(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = ptrtoint i8* %7 to i64
%10 = ptrtoint i8* %8 to i64
%11 = sub i64 %9, %10
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
%14 = trunc i32 %13 to i16
ret i16 %14
}

LLVM IR (-O2):
define signext i16 @StartsWith(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i16
ret i16 %6
}
int test_imm_FDint8_reg(signed char val) {
  return ((val) & (0xFD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FDint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xfd,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FDint8_reg>:
test   $0xfd,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FDint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 253
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FDint8_reg(i8 signext %0) {
%2 = and i8 %0, -3
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct list_sp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_sp_free_callback(struct list_sp *,
                                         int /*<<< orphan*/ *);
void list_sp_free(struct list_sp *target) {
  list_sp_free_callback(target, NULL);
}


x86 assembly (clang, -O0):
<list_sp_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <list_sp_free_callback@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_sp_free>:
xor    %esi,%esi
jmp    1030 <list_sp_free_callback@plt>

LLVM IR (-O0):
%struct.list_sp = type { i32 }
define void @list_sp_free(%struct.list_sp* %0) {
%2 = alloca %struct.list_sp*
store %struct.list_sp* %0, %struct.list_sp** %2
%3 = load %struct.list_sp*, %struct.list_sp** %2
%4 = call i32 @list_sp_free_callback(%struct.list_sp* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.list_sp = type { i32 }
define void @list_sp_free(%struct.list_sp* %0) {
%2 = tail call i32 @list_sp_free_callback(%struct.list_sp* %0, i32* null)
ret void
}
int test_imm_D0int64_highword_reg(long long val) {
  return ((val >> 32) & (0xD0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D0int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xd0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D0int64_highword_reg>:
movabs $0xd000000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D0int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 208
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D0int64_highword_reg(i64 %0) {
%2 = and i64 %0, 893353197568
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int cond_broadcast(int /*<<< orphan*/ *);
int pthread_cond_broadcast(pthread_cond_t *cond) {
  return cond_broadcast(cond);
}


x86 assembly (clang, -O0):
<pthread_cond_broadcast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cond_broadcast@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_broadcast>:
jmp    1030 <cond_broadcast@plt>

LLVM IR (-O0):
define i32 @pthread_cond_broadcast(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @cond_broadcast(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pthread_cond_broadcast(i32* %0) {
%2 = tail call i32 @cond_broadcast(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Atm128AlarmAsyncP__0__Compare__fired();
void HplAtm128Timer0AsyncP__Compare__fired(void) {
  Atm128AlarmAsyncP__0__Compare__fired();
}


x86 assembly (clang, -O0):
<HplAtm128Timer0AsyncP__Compare__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Atm128AlarmAsyncP__0__Compare__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplAtm128Timer0AsyncP__Compare__fired>:
xor    %eax,%eax
jmp    1030 <Atm128AlarmAsyncP__0__Compare__fired@plt>

LLVM IR (-O0):
define void @HplAtm128Timer0AsyncP__Compare__fired() {
%1 = call i32 (...) @Atm128AlarmAsyncP__0__Compare__fired()
ret void
}

LLVM IR (-O2):
define void @HplAtm128Timer0AsyncP__Compare__fired() {
%1 = tail call i32 (...) @Atm128AlarmAsyncP__0__Compare__fired()
ret void
}
void handle_PHONE(int sig) {}


x86 assembly (clang, -O0):
<handle_PHONE>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_PHONE>:
ret

LLVM IR (-O0):
define void @handle_PHONE(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_PHONE(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_charstoint();
void test() { test_charstoint(); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_charstoint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
jmp    1030 <test_charstoint@plt>

LLVM IR (-O0):
define void @test() {
%1 = call i32 (...) @test_charstoint()
ret void
}

LLVM IR (-O2):
define void @test() {
%1 = tail call i32 (...) @test_charstoint()
ret void
}