xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ write_src(char *);
void lsh_handler(void) {
  write_src("{\n");
  write_src("imm_t b = POP();\n");
  write_src("imm_t a = POP();\n");
  write_src("PUSH(a<<b);\n");
  write_src("}\n");
}


x86 assembly (clang, -O0):
<lsh_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <write_src@plt>
lea    0xedc(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee2(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee8(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee9(%rip),%rdi
call   1030 <write_src@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsh_handler>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <write_src@plt>
lea    0xedf(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee5(%rip),%rdi
call   1030 <write_src@plt>
lea    0xeeb(%rip),%rdi
call   1030 <write_src@plt>
lea    0xeec(%rip),%rdi
pop    %rax
jmp    1030 <write_src@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"{\0A\00"
@.str.1 = [18 x i8] c"imm_t b = POP();\0A\00"
@.str.2 = [18 x i8] c"imm_t a = POP();\0A\00"
@.str.3 = [13 x i8] c"PUSH(a<<b);\0A\00"
@.str.4 = [3 x i8] c"}\0A\00"
define void @lsh_handler() {
%1 = call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @write_src(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"{\0A\00"
@.str.1 = [18 x i8] c"imm_t b = POP();\0A\00"
@.str.2 = [18 x i8] c"imm_t a = POP();\0A\00"
@.str.3 = [13 x i8] c"PUSH(a<<b);\0A\00"
@.str.4 = [3 x i8] c"}\0A\00"
define void @lsh_handler() {
%1 = tail call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @write_src(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.4, i64 0, i64 0))
ret void
}
int mult(int zahl1, int zahl2) {
  int E = 0;
  for (int i = 1; i <= zahl2; i++) {
    E += zahl1;
  }
  return E;
}


x86 assembly (clang, -O0):
<mult>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     113b <mult+0x3b>
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1118 <mult+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mult>:
imul   %esi,%edi
xor    %eax,%eax
test   %esi,%esi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @mult(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 1, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i32, i32* %3
%13 = load i32, i32* %5
%14 = add nsw i32 %13, %12
store i32 %14, i32* %5
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @mult(i32 %0, i32 %1) {
%3 = mul i32 %1, %0
%4 = icmp sgt i32 %1, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int *, int *);
int main() {
  int a = 0xFE;
  int b;
  b = 0xFB;
  int c;
  c = 0xFA;
  printf("c addr:%p, b addr:%p\n", &c, &b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xfe,-0x8(%rbp)
movl   $0xfb,-0xc(%rbp)
movl   $0xfa,-0x10(%rbp)
lea    0xec5(%rip),%rdi
lea    -0x10(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0xfb,0x4(%rsp)
movl   $0xfa,(%rsp)
lea    0xed9(%rip),%rdi
mov    %rsp,%rsi
lea    0x4(%rsp),%rdx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"c addr:%p, b addr:%p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 254, i32* %2
store i32 251, i32* %3
store i32 250, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32* %4, i32* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"c addr:%p, b addr:%p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 251, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 250, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void mat_dump(const char *s, const uint32_t *vec, unsigned len) {
  ((void)s);
  ((void)vec);
  ((void)len);
}


x86 assembly (clang, -O0):
<mat_dump>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_dump>:
ret

LLVM IR (-O0):
define void @mat_dump(i8* %0, i32* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @mat_dump(i8* nocapture %0, i32* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ beginningz(float, float, float, float, int);
float cos(float);
scalar_t__ powf(int /*<<< orphan*/, float);
float sqrtf(scalar_t__);
float beginningx(float cosqr, float a, float alpha, float A, int r) {
  return cos(alpha) * sqrtf(1 - powf(beginningz(cosqr, a, alpha, A, r), 2.0f));
}


x86 assembly (clang, -O0):
<beginningx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
call   1060 <cos@plt>
movss  %xmm0,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movss  -0x10(%rbp),%xmm3
mov    -0x14(%rbp),%edi
call   1030 <beginningz@plt>
mov    %eax,%edi
movss  0xe6c(%rip),%xmm0
call   1040 <powf@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1050 <sqrtf@plt>
movaps %xmm0,%xmm1
movss  -0x18(%rbp),%xmm0
mulss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beginningx>:
push   %rbx
sub    $0x20,%rsp
mov    %edi,%ebx
movss  %xmm3,0x18(%rsp)
movss  %xmm2,0xc(%rsp)
movss  %xmm1,0x14(%rsp)
movss  %xmm0,0x10(%rsp)
movaps %xmm2,%xmm0
call   1060 <cos@plt>
movss  %xmm0,0x1c(%rsp)
movss  0x10(%rsp),%xmm0
movss  0x14(%rsp),%xmm1
movss  0xc(%rsp),%xmm2
movss  0x18(%rsp),%xmm3
mov    %ebx,%edi
call   1030 <beginningz@plt>
movss  0xe6c(%rip),%xmm0
mov    %eax,%edi
call   1040 <powf@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1050 <sqrtf@plt>
mulss  0x1c(%rsp),%xmm0
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @beginningx(float %0, float %1, float %2, float %3, i32 %4) {
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca i32
store float %0, float* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store i32 %4, i32* %10
%11 = load float, float* %8
%12 = call float @cos(float %11)
%13 = load float, float* %6
%14 = load float, float* %7
%15 = load float, float* %8
%16 = load float, float* %9
%17 = load i32, i32* %10
%18 = call i32 @beginningz(float %13, float %14, float %15, float %16, i32 %17)
%19 = call i64 @powf(i32 %18, float 2.000000e+00)
%20 = sub nsw i64 1, %19
%21 = call float @sqrtf(i64 %20)
%22 = fmul float %12, %21
ret float %22
}

LLVM IR (-O2):
define float @beginningx(float %0, float %1, float %2, float %3, i32 %4) {
%6 = tail call float @cos(float %2)
%7 = tail call i32 @beginningz(float %0, float %1, float %2, float %3, i32 %4)
%8 = tail call i64 @powf(i32 %7, float 2.000000e+00)
%9 = sub nsw i64 1, %8
%10 = tail call float @sqrtf(i64 %9)
%11 = fmul float %6, %10
ret float %11
}
/* Variables and functions */
int /*<<< orphan*/ spgam(long);
void main() {
  long M = 5000;
  spgam(M);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x1388,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <spgam@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1388,%edi
jmp    1030 <spgam@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i64
store i64 5000, i64* %1
%2 = load i64, i64* %1
%3 = call i32 @spgam(i64 %2)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @spgam(i64 5000)
ret void
}
int op_ge(int a, int b) { return a >= b; }


x86 assembly (clang, -O0):
<op_ge>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ge>:
xor    %eax,%eax
cmp    %esi,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @op_ge(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sge i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @op_ge(i32 %0, i32 %1) {
%3 = icmp sge i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
scalar_t__ waitpid(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
void sighanler(int sig) {
  while (waitpid(-1, NULL, WNOHANG) > 0)
    ;
}


x86 assembly (clang, -O0):
<sighanler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jle    1141 <sighanler+0x31>
jmp    111b <sighanler+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighanler>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    (%rbx),%edx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1030 <waitpid@plt>
test   %rax,%rax
jg     1120 <sighanler+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define void @sighanler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* @WNOHANG
%5 = call i64 @waitpid(i32 -1, i32* null, i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define void @sighanler(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load i32, i32* @WNOHANG
%4 = tail call i64 @waitpid(i32 -1, i32* null, i32 %3)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vt_pos_move_columns(int /*<<< orphan*/);
int /*<<< orphan*/ vt_pos_move_rows(int /*<<< orphan*/);
void vt_pos_move(int32_t rows, int32_t columns) {
  vt_pos_move_rows(rows);
  vt_pos_move_columns(columns);
}


x86 assembly (clang, -O0):
<vt_pos_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <vt_pos_move_rows@plt>
mov    -0x8(%rbp),%edi
call   1040 <vt_pos_move_columns@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vt_pos_move>:
push   %rbx
mov    %esi,%ebx
call   1030 <vt_pos_move_rows@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <vt_pos_move_columns@plt>

LLVM IR (-O0):
define void @vt_pos_move(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @vt_pos_move_rows(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @vt_pos_move_columns(i32 %7)
ret void
}

LLVM IR (-O2):
define void @vt_pos_move(i32 %0, i32 %1) {
%3 = tail call i32 @vt_pos_move_rows(i32 %0)
%4 = tail call i32 @vt_pos_move_columns(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
void test_vmvn_s16x8(int16_t *__restrict__ dest, int16_t *a) {
  int i;
  for (i = 0; i < 8; i++) {
    dest[i] = ~a[i];
  }
}


x86 assembly (clang, -O0):
<test_vmvn_s16x8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x8,-0x14(%rbp)
jge    1144 <test_vmvn_s16x8+0x44>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <test_vmvn_s16x8+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_vmvn_s16x8>:
movdqu (%rsi),%xmm0
pcmpeqd %xmm1,%xmm1
pxor   %xmm1,%xmm0
movdqu %xmm0,(%rdi)
movdqu 0x10(%rsi),%xmm0
pxor   %xmm1,%xmm0
movdqu %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @test_vmvn_s16x8(i32* noalias %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 8
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i32*, i32** %4
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = xor i32 %14, -1
%16 = load i32*, i32** %3
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
store i32 %15, i32* %19
br label %20
20: ; preds = %9
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @test_vmvn_s16x8(i32* noalias nocapture writeonly %0, i32* nocapture %1) {
%3 = bitcast i32* %1 to <4 x i32>*
%4 = load <4 x i32>, <4 x i32>* %3
%5 = xor <4 x i32> %4, <i32 -1, i32 -1, i32 -1, i32 -1>
%6 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> %5, <4 x i32>* %6
%7 = getelementptr inbounds i32, i32* %1, i64 4
%8 = getelementptr inbounds i32, i32* %0, i64 4
%9 = bitcast i32* %7 to <4 x i32>*
%10 = load <4 x i32>, <4 x i32>* %9
%11 = xor <4 x i32> %10, <i32 -1, i32 -1, i32 -1, i32 -1>
%12 = bitcast i32* %8 to <4 x i32>*
store <4 x i32> %11, <4 x i32>* %12
ret void
}
void XkbSetGeometry() {}


x86 assembly (clang, -O0):
<XkbSetGeometry>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbSetGeometry>:
ret

LLVM IR (-O0):
define void @XkbSetGeometry() {
ret void
}

LLVM IR (-O2):
define void @XkbSetGeometry() {
ret void
}
/* Variables and functions */
float M_PI_2;
float sin(float);
float sineEaseInf(float p) { return sin((p - 1) * M_PI_2) + 1; }


x86 assembly (clang, -O0):
<sineEaseInf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
subss  %xmm1,%xmm0
mov    0x2eb3(%rip),%rax
mulss  (%rax),%xmm0
call   1030 <sin@plt>
movss  0xeba(%rip),%xmm1
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sineEaseInf>:
push   %rax
addss  0xee7(%rip),%xmm0
mov    0x2ec8(%rip),%rax
mulss  (%rax),%xmm0
call   1030 <sin@plt>
addss  0xed3(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI_2 = global float 0.000000e+00
define float @sineEaseInf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fsub float %3, 1.000000e+00
%5 = load float, float* @M_PI_2
%6 = fmul float %4, %5
%7 = call float @sin(float %6)
%8 = fadd float %7, 1.000000e+00
ret float %8
}

LLVM IR (-O2):
@M_PI_2 = global float 0.000000e+00
define float @sineEaseInf(float %0) {
%2 = fadd float %0, -1.000000e+00
%3 = load float, float* @M_PI_2
%4 = fmul float %2, %3
%5 = tail call float @sin(float %4)
%6 = fadd float %5, 1.000000e+00
ret float %6
}
void qstat_hop(int hopcnt) {}


x86 assembly (clang, -O0):
<qstat_hop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<qstat_hop>:
ret

LLVM IR (-O0):
define void @qstat_hop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @qstat_hop(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ execl(char *, char *, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ perror(char *);
int main(void) {
  execl("/bin/ls", "ls", "-al", NULL);
  perror("execl");
  return -1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    0xec8(%rip),%rsi
lea    0xec4(%rip),%rdx
xor    %eax,%eax
mov    %eax,%ecx
call   1040 <execl@plt>
lea    0xeb8(%rip),%rdi
call   1030 <perror@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed6(%rip),%rsi
lea    0xed2(%rip),%rdx
xor    %ecx,%ecx
call   1040 <execl@plt>
lea    0xec8(%rip),%rdi
call   1030 <perror@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"/bin/ls\00"
@.str.1 = [3 x i8] c"ls\00"
@.str.2 = [4 x i8] c"-al\00"
@.str.3 = [6 x i8] c"execl\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @execl(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32* null)
%3 = call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [8 x i8] c"/bin/ls\00"
@.str.1 = [3 x i8] c"ls\00"
@.str.2 = [4 x i8] c"-al\00"
@.str.3 = [6 x i8] c"execl\00"
define i32 @main() {
%1 = tail call i32 @execl(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32* null)
%2 = tail call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0))
ret i32 -1
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __sched_rr_get_interval(pid_t pid, struct timespec *t) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__sched_rr_get_interval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sched_rr_get_interval>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @__sched_rr_get_interval(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret i32 -1
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @__sched_rr_get_interval(i32 %0, %struct.timespec* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
%4 = tail call i32 @__set_errno(i32 %3)
ret i32 -1
}
int __dummy__(void) { return 4; }


x86 assembly (clang, -O0):
<__dummy__>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dummy__>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @__dummy__() {
ret i32 4
}

LLVM IR (-O2):
define i32 @__dummy__() {
ret i32 4
}
/* Variables and functions */
float __nv_fmaf_rn(float, float, float);
float __fmaf_rn(float __a, float __b, float __c) {
  return __nv_fmaf_rn(__a, __b, __c);
}


x86 assembly (clang, -O0):
<__fmaf_rn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <__nv_fmaf_rn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fmaf_rn>:
jmp    1030 <__nv_fmaf_rn@plt>

LLVM IR (-O0):
define float @__fmaf_rn(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @__nv_fmaf_rn(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @__fmaf_rn(float %0, float %1, float %2) {
%4 = tail call float @__nv_fmaf_rn(float %0, float %1, float %2)
ret float %4
}
int init_parser() { return (0); }


x86 assembly (clang, -O0):
<init_parser>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_parser>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @init_parser() {
ret i32 0
}

LLVM IR (-O2):
define i32 @init_parser() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int fail_bz(int i) {
  if (i > 2) {
    printf(">2\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<fail_bz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    1131 <fail_bz+0x21>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fail_bz>:
cmp    $0x3,%edi
jl     1126 <fail_bz+0x16>
push   %rax
lea    0xee3(%rip),%rdi
call   1030 <puts@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c">2\0A\00"
define i32 @fail_bz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 2
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret i32 0
}

LLVM IR (-O2):
@str = [3 x i8] c">2\00"
define i32 @fail_bz(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
ret i32 0
}
void getconfig() { return; }


x86 assembly (clang, -O0):
<getconfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getconfig>:
ret

LLVM IR (-O0):
define void @getconfig() {
ret void
}

LLVM IR (-O2):
define void @getconfig() {
ret void
}
int test_imm_C3uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xC3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C3uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xc3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C3uint64_lowword_mem>:
testb  $0xc3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C3uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 195
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C3uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 195
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned long proto_hash_code(const char *str) {
  unsigned long hash = 5381;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<proto_hash_code>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <proto_hash_code+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <proto_hash_code+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proto_hash_code>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <proto_hash_code+0x2d>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <proto_hash_code+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @proto_hash_code(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @proto_hash_code(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ kernel_dgemm_nt_2x2_vs_lib4(int, int, int, double *,
                                               double *, double *, double *,
                                               int, int, int);
void kernel_dgemm_nt_2x2_lib4(int kmax, double *A, double *B, double *C,
                              double *D, int alg, int tc, int td) {
  kernel_dgemm_nt_2x2_vs_lib4(2, 2, kmax, A, B, C, D, alg, tc, td);
}


x86 assembly (clang, -O0):
<kernel_dgemm_nt_2x2_lib4>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x58,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9d,-0x34(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    -0x30(%rbp),%rbx
mov    -0x34(%rbp),%r11d
mov    0x10(%rbp),%r10d
mov    0x18(%rbp),%eax
mov    $0x2,%esi
mov    %esi,%edi
mov    %rbx,(%rsp)
mov    %r11d,0x8(%rsp)
mov    %r10d,0x10(%rsp)
mov    %eax,0x18(%rsp)
call   1030 <kernel_dgemm_nt_2x2_vs_lib4@plt>
add    $0x58,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_dgemm_nt_2x2_lib4>:
push   %rbx
mov    %r9d,%eax
mov    %r8,%r10
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %edi,%edx
mov    0x10(%rsp),%r11d
mov    0x18(%rsp),%ebx
mov    $0x2,%edi
mov    $0x2,%esi
push   %rbx
push   %r11
push   %rax
push   %r10
call   1030 <kernel_dgemm_nt_2x2_vs_lib4@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @kernel_dgemm_nt_2x2_lib4(i32 %0, double* %1, double* %2, double* %3, double* %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca double*
%11 = alloca double*
%12 = alloca double*
%13 = alloca double*
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
store i32 %0, i32* %9
store double* %1, double** %10
store double* %2, double** %11
store double* %3, double** %12
store double* %4, double** %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%17 = load i32, i32* %9
%18 = load double*, double** %10
%19 = load double*, double** %11
%20 = load double*, double** %12
%21 = load double*, double** %13
%22 = load i32, i32* %14
%23 = load i32, i32* %15
%24 = load i32, i32* %16
%25 = call i32 @kernel_dgemm_nt_2x2_vs_lib4(i32 2, i32 2, i32 %17, double* %18, double* %19, double* %20, double* %21, i32 %22, i32 %23, i32 %24)
ret void
}

LLVM IR (-O2):
define void @kernel_dgemm_nt_2x2_lib4(i32 %0, double* %1, double* %2, double* %3, double* %4, i32 %5, i32 %6, i32 %7) {
%9 = tail call i32 @kernel_dgemm_nt_2x2_vs_lib4(i32 2, i32 2, i32 %0, double* %1, double* %2, double* %3, double* %4, i32 %5, i32 %6, i32 %7)
ret void
}
/* Variables and functions */
int syscall(int, int, int /*<<< orphan*/);
int _exit(int exitValue) { return syscall(6, exitValue, 0); }


x86 assembly (clang, -O0):
<_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x6,%edi
xor    %edx,%edx
call   1030 <syscall@plt>
mov    %eax,-0x4(%rbp)

x86 assembly (clang, -O2):
<_exit>:
push   %rax
mov    %edi,%esi
mov    $0x6,%edi
xor    %edx,%edx
call   1030 <syscall@plt>

LLVM IR (-O0):
define i32 @_exit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @syscall(i32 6, i32 %4, i32 0)
store i32 %5, i32* %2
unreachable
}

LLVM IR (-O2):
define i32 @_exit(i32 %0) {
%2 = tail call i32 @syscall(i32 6, i32 %0, i32 0)
unreachable
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ htonl(int /*<<< orphan*/);
void minipack_pack_map32(void *ptr, uint32_t count, size_t *sz) {
  *sz = 5;
  *((uint8_t *)ptr) = 0xDF;
  *((uint32_t *)(ptr + 1)) = htonl(count);
}


x86 assembly (clang, -O0):
<minipack_pack_map32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x5,(%rax)
mov    -0x8(%rbp),%rax
movl   $0xdf,(%rax)
mov    -0xc(%rbp),%edi
call   1030 <htonl@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x1(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minipack_pack_map32>:
push   %rbx
mov    %rdi,%rbx
movq   $0x5,(%rdx)
movl   $0xdf,(%rdi)
mov    %esi,%edi
call   1030 <htonl@plt>
mov    %eax,0x1(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @minipack_pack_map32(i8* %0, i32 %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64* %2, i64** %6
%7 = load i64*, i64** %6
store i64 5, i64* %7
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32 223, i32* %9
%10 = load i32, i32* %5
%11 = call i32 @htonl(i32 %10)
%12 = load i8*, i8** %4
%13 = getelementptr i8, i8* %12, i64 1
%14 = bitcast i8* %13 to i32*
store i32 %11, i32* %14
ret void
}

LLVM IR (-O2):
define void @minipack_pack_map32(i8* nocapture writeonly %0, i32 %1, i64* nocapture writeonly %2) {
store i64 5, i64* %2
%4 = bitcast i8* %0 to i32*
store i32 223, i32* %4
%5 = tail call i32 @htonl(i32 %1)
%6 = getelementptr i8, i8* %0, i64 1
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}
int do_881() { return 881; }


x86 assembly (clang, -O0):
<do_881>:
push   %rbp
mov    %rsp,%rbp
mov    $0x371,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_881>:
mov    $0x371,%eax
ret

LLVM IR (-O0):
define i32 @do_881() {
ret i32 881
}

LLVM IR (-O2):
define i32 @do_881() {
ret i32 881
}
void test_no_clause() {
  int i;
#pragma omp master taskloop simd
  for (i = 0; i < 16; ++i)
    ;
#pragma omp master taskloop simd
  ++i;
}


x86 assembly (clang, -O0):
<test_no_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_no_clause+0x28>
jmp    111a <test_no_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_no_clause+0xb>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_no_clause>:
ret

LLVM IR (-O0):
define void @test_no_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
ret void
}

LLVM IR (-O2):
define void @test_no_clause() {
ret void
}
/* Variables and functions */
scalar_t__ malloc_helper_fake_realloc(char *, scalar_t__);
int /*<<< orphan*/ strcat(char *, char *);
scalar_t__ strlen(char *);
char *soru_3(char *x) {
  x = (char *)malloc_helper_fake_realloc(x,
                                         (strlen(x) + 1) + (3 * sizeof(char)));
  strcat(x, "...");
  return x;
}


x86 assembly (clang, -O0):
<soru_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rsi
add    $0x1,%rsi
add    $0x3,%rsi
call   1040 <malloc_helper_fake_realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe90(%rip),%rsi
call   1050 <strcat@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<soru_3>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
lea    0x4(%rax),%rsi
mov    %rbx,%rdi
call   1040 <malloc_helper_fake_realloc@plt>
mov    %rax,%rbx
lea    0xeb1(%rip),%rsi
mov    %rax,%rdi
call   1050 <strcat@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"...\00"
define i8* @soru_3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = add i64 %6, 3
%8 = call i64 @malloc_helper_fake_realloc(i8* %3, i64 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %2
%10 = load i8*, i8** %2
%11 = call i32 @strcat(i8* %10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
@.str = [4 x i8] c"...\00"
define i8* @soru_3(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 4
%4 = tail call i64 @malloc_helper_fake_realloc(i8* %0, i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strcat(i8* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
void unlocka(pthread_mutex_t *a, pthread_mutex_t *b) {
  pthread_mutex_unlock(a);
  return;
}


x86 assembly (clang, -O0):
<unlocka>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlocka>:
jmp    1030 <pthread_mutex_unlock@plt>

LLVM IR (-O0):
define void @unlocka(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = call i32 @pthread_mutex_unlock(i32* %5)
ret void
}

LLVM IR (-O2):
define void @unlocka(i32* %0, i32* nocapture readnone %1) {
%3 = tail call i32 @pthread_mutex_unlock(i32* %0)
ret void
}
void swap(int *x, int *y) {
  int tmp = *x;
  *x = *y;
  *y = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Type definitions */
typedef int const uint16_t;

/* Variables and functions */
int is_pattern_old(uint16_t x) {
  const uint16_t n = -x;
  return (x > 0) && n == (n & x);
}


x86 assembly (clang, -O0):
<is_pattern_old>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jle    112f <is_pattern_old+0x2f>
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
and    -0x4(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_pattern_old>:
mov    %edi,%eax
neg    %eax
test   %edi,%edi
setg   %cl
not    %edi
test   %edi,%eax
sete   %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_pattern_old(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i32, i32* %3
%10 = load i32, i32* %3
%11 = load i32, i32* %2
%12 = and i32 %10, %11
%13 = icmp eq i32 %9, %12
br label %14
14: ; preds = %8, %1
%15 = phi i1 [ false, %1 ], [ %13, %8 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_pattern_old(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = icmp sgt i32 %0, 0
%4 = and i32 %2, %0
%5 = icmp eq i32 %4, %2
%6 = select i1 %3, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
unsigned short MMCSD_sendCmd(int, unsigned long, int, int);
unsigned short MMCSD_appCmd(unsigned long rca) {
  return MMCSD_sendCmd((55 | 0x0200), rca << 16, 1, 0x0004);
}


x86 assembly (clang, -O0):
<MMCSD_appCmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
shl    $0x10,%rsi
mov    $0x237,%edi
mov    $0x1,%edx
mov    $0x4,%ecx
call   1030 <MMCSD_sendCmd@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMCSD_appCmd>:
mov    %rdi,%rsi
shl    $0x10,%rsi
mov    $0x237,%edi
mov    $0x1,%edx
mov    $0x4,%ecx
jmp    1030 <MMCSD_sendCmd@plt>

LLVM IR (-O0):
define zeroext i16 @MMCSD_appCmd(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 16
%5 = call zeroext i16 @MMCSD_sendCmd(i32 567, i64 %4, i32 1, i32 4)
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @MMCSD_appCmd(i64 %0) {
%2 = shl i64 %0, 16
%3 = tail call zeroext i16 @MMCSD_sendCmd(i32 567, i64 %2, i32 1, i32 4)
ret i16 %3
}
/* Type definitions */
typedef int clock_t;

/* Variables and functions */
int CLOCKS_PER_SEC;
int /*<<< orphan*/ sleep(int);
void OS_udelay(int microseconds) {
  sleep((clock_t)microseconds * CLOCKS_PER_SEC / 1000000);
}


x86 assembly (clang, -O0):
<OS_udelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
imul   (%rcx),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OS_udelay>:
mov    0x2ed1(%rip),%rax
imul   (%rax),%edi
movslq %edi,%rax
imul   $0x431bde83,%rax,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
sar    $0x32,%rdi
add    %eax,%edi
jmp    1030 <sleep@plt>

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i32 0
define void @OS_udelay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @CLOCKS_PER_SEC
%5 = mul nsw i32 %3, %4
%6 = sdiv i32 %5, 1000000
%7 = call i32 @sleep(i32 %6)
ret void
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i32 0
define void @OS_udelay(i32 %0) {
%2 = load i32, i32* @CLOCKS_PER_SEC
%3 = mul nsw i32 %2, %0
%4 = sdiv i32 %3, 1000000
%5 = tail call i32 @sleep(i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void no_keys(void) {
  fputs("safeu: error: agent does not hold any keys\n", stderr);
}


x86 assembly (clang, -O0):
<no_keys>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_keys>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"safeu: error: agent does not hold any keys\0A\00"
@stderr = global i32 0
define void @no_keys() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"safeu: error: agent does not hold any keys\0A\00"
@stderr = global i32 0
define void @no_keys() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
float flerp(float _a, float _b, float _t) { return _a + (_b - _a) * _t; }


x86 assembly (clang, -O0):
<flerp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flerp>:
subss  %xmm0,%xmm1
mulss  %xmm2,%xmm1
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @flerp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %4
%10 = fsub float %8, %9
%11 = load float, float* %6
%12 = call float @llvm.fmuladd.f32(float %10, float %11, float %7)
ret float %12
}

LLVM IR (-O2):
define float @flerp(float %0, float %1, float %2) {
%4 = fsub float %1, %0
%5 = tail call float @llvm.fmuladd.f32(float %4, float %2, float %0)
ret float %5
}
int NeedCarrierFrequency() { return 0; }


x86 assembly (clang, -O0):
<NeedCarrierFrequency>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NeedCarrierFrequency>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @NeedCarrierFrequency() {
ret i32 0
}

LLVM IR (-O2):
define i32 @NeedCarrierFrequency() {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ depth;
};
typedef TYPE_1__ XVisualInfo;

/* Variables and functions */
int get_XVisualInfo_depth(void *_p) { return (int)((XVisualInfo *)_p)->depth; }


x86 assembly (clang, -O0):
<get_XVisualInfo_depth>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XVisualInfo_depth>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XVisualInfo_depth(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XVisualInfo_depth(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ htobe64(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(char *, int /*<<< orphan*/ *, int);
void buf_add_uint64(char *buf, uint64_t val) {
  uint64_t nval = htobe64(val);
  memcpy(buf, &nval, sizeof nval);
}


x86 assembly (clang, -O0):
<buf_add_uint64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <htobe64@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_add_uint64>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <htobe64@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @buf_add_uint64(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @htobe64(i32 %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = call i32 @memcpy(i8* %8, i32* %5, i32 4)
ret void
}

LLVM IR (-O2):
define void @buf_add_uint64(i8* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @htobe64(i32 %1)
store i32 %5, i32* %3
%6 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
ret void
}
int test_imm_2Buint8_mem(unsigned char *val) {
  return ((*val) & (-0x2B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Buint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffd5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Buint8_mem>:
testb  $0xd5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Buint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -43
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Buint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -43
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ I2C_ReadBytes(int, unsigned char, unsigned char *,
                                 unsigned char);
void AT24C02_ReadBytes(unsigned char regAddr, unsigned char *byte,
                       unsigned char len) {
  I2C_ReadBytes(0x50, regAddr, byte, len);
}


x86 assembly (clang, -O0):
<AT24C02_ReadBytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rdx
mov    $0x50,%edi
movzbl %al,%esi
movzbl -0x11(%rbp),%ecx
call   1030 <I2C_ReadBytes@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AT24C02_ReadBytes>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x50,%edi
jmp    1030 <I2C_ReadBytes@plt>

LLVM IR (-O0):
define void @AT24C02_ReadBytes(i8 zeroext %0, i8* %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i8
store i8 %0, i8* %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = load i8*, i8** %5
%9 = load i8, i8* %6
%10 = call i32 @I2C_ReadBytes(i32 80, i8 zeroext %7, i8* %8, i8 zeroext %9)
ret void
}

LLVM IR (-O2):
define void @AT24C02_ReadBytes(i8 zeroext %0, i8* %1, i8 zeroext %2) {
%4 = tail call i32 @I2C_ReadBytes(i32 80, i8 zeroext %0, i8* %1, i8 zeroext %2)
ret void
}
int test_imm_40uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x40 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_40uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x40,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_40uint64_highword_reg>:
bt     $0x26,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_40uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 64
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_40uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 274877906944
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}