xunge/DecIR huggingface dataset:
int byte_cmp(s1, s2, lth)
unsigned char *s1, *s2;
int lth;
{
  while (*s1++ == *s2++ && lth)
    lth--;
  return ((lth) ? -1 : 0);
}


x86 assembly (clang, -O0):
<byte_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movzbl (%rax),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x15(%rbp)
jne    114a <byte_cmp+0x4a>
cmpl   $0x0,-0x14(%rbp)
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    115a <byte_cmp+0x5a>
jmp    1168 <byte_cmp+0x68>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <byte_cmp+0xf>
mov    -0x14(%rbp),%edx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_cmp>:
mov    (%rdi),%cl
test   %edx,%edx
setne  %al
cmp    (%rsi),%cl
jne    113e <byte_cmp+0x3e>
test   %edx,%edx
je     113e <byte_cmp+0x3e>
mov    %edx,%r8d
mov    $0x1,%edx
nopw   0x0(%rax,%rax,1)
movzbl (%rdi,%rdx,1),%ecx
cmp    %edx,%r8d
setne  %al
cmp    (%rsi,%rdx,1),%cl
jne    113e <byte_cmp+0x3e>
mov    %rdx,%rcx
add    $0x1,%rcx
cmp    %edx,%r8d
mov    %rcx,%rdx
jne    1120 <byte_cmp+0x20>
movzbl %al,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @byte_cmp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
br label %7
7: ; preds = %22, %3
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = zext i8 %10 to i32
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
%14 = load i8, i8* %12
%15 = zext i8 %14 to i32
%16 = icmp eq i32 %11, %15
br i1 %16, label %17, label %20
17: ; preds = %7
%18 = load i32, i32* %6
%19 = icmp ne i32 %18, 0
br label %20
20: ; preds = %17, %7
%21 = phi i1 [ false, %7 ], [ %19, %17 ]
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i32, i32* %6
%24 = add nsw i32 %23, -1
store i32 %24, i32* %6
br label %7
25: ; preds = %20
%26 = load i32, i32* %6
%27 = icmp ne i32 %26, 0
%28 = zext i1 %27 to i64
%29 = select i1 %27, i32 -1, i32 0
ret i32 %29
}

LLVM IR (-O2):
define i32 @byte_cmp(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = load i8, i8* %0
%5 = load i8, i8* %1
%6 = icmp eq i8 %4, %5
%7 = icmp ne i32 %2, 0
%8 = and i1 %6, %7
br i1 %8, label %9, label %21
9: ; preds = %3, %9
%10 = phi i32 [ %15, %9 ], [ %2, %3 ]
%11 = phi i8* [ %13, %9 ], [ %1, %3 ]
%12 = phi i8* [ %14, %9 ], [ %0, %3 ]
%13 = getelementptr inbounds i8, i8* %11, i64 1
%14 = getelementptr inbounds i8, i8* %12, i64 1
%15 = add nsw i32 %10, -1
%16 = load i8, i8* %14
%17 = load i8, i8* %13
%18 = icmp eq i8 %16, %17
%19 = icmp ne i32 %15, 0
%20 = select i1 %18, i1 %19, i1 false
br i1 %20, label %9, label %21
21: ; preds = %9, %3
%22 = phi i1 [ %7, %3 ], [ %19, %9 ]
%23 = sext i1 %22 to i32
ret i32 %23
}
/* Variables and functions */
int /*<<< orphan*/ frmni(char *);
void notImplementedI5() { frmni("Interleaf5"); }


x86 assembly (clang, -O0):
<notImplementedI5>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <frmni@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<notImplementedI5>:
lea    0xee9(%rip),%rdi
jmp    1030 <frmni@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Interleaf5\00"
define void @notImplementedI5() {
%1 = call i32 @frmni(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Interleaf5\00"
define void @notImplementedI5() {
%1 = tail call i32 @frmni(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
void seek_internal(struct _file_stream *s, long position) {}


x86 assembly (clang, -O0):
<seek_internal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<seek_internal>:
ret

LLVM IR (-O0):
%struct._file_stream = type opaque
define void @seek_internal(%struct._file_stream* %0, i64 %1) {
%3 = alloca %struct._file_stream*
%4 = alloca i64
store %struct._file_stream* %0, %struct._file_stream** %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
%struct._file_stream = type opaque
define void @seek_internal(%struct._file_stream* nocapture %0, i64 %1) {
ret void
}
int fromhex(int a) {
  if (a >= 'A' && a <= 'F')
    return a - 'A' + 0xA;
  if (a >= 'a' && a <= 'f')
    return a - 'a' + 0xA;
  if (a >= '0' && a <= '9')
    return a - '0';
  return 0;
}


x86 assembly (clang, -O0):
<fromhex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     112c <fromhex+0x2c>
cmpl   $0x46,-0x8(%rbp)
jg     112c <fromhex+0x2c>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <fromhex+0x7a>
cmpl   $0x61,-0x8(%rbp)
jl     1151 <fromhex+0x51>
cmpl   $0x66,-0x8(%rbp)
jg     1151 <fromhex+0x51>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <fromhex+0x7a>
cmpl   $0x30,-0x8(%rbp)
jl     1173 <fromhex+0x73>
cmpl   $0x39,-0x8(%rbp)
jg     1173 <fromhex+0x73>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <fromhex+0x7a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fromhex>:
mov    %edi,%eax
lea    -0x41(%rax),%ecx
cmp    $0x5,%ecx
ja     110e <fromhex+0xe>
add    $0xffffffc9,%eax
ret
lea    -0x61(%rax),%ecx
cmp    $0x5,%ecx
ja     111a <fromhex+0x1a>
add    $0xffffffa9,%eax
ret
add    $0xffffffd0,%eax
xor    %ecx,%ecx
cmp    $0xa,%eax
cmovb  %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fromhex(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 70
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 65
%12 = add nsw i32 %11, 10
store i32 %12, i32* %2
br label %33
13: ; preds = %6, %1
%14 = load i32, i32* %3
%15 = icmp sge i32 %14, 97
br i1 %15, label %16, label %23
16: ; preds = %13
%17 = load i32, i32* %3
%18 = icmp sle i32 %17, 102
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = load i32, i32* %3
%21 = sub nsw i32 %20, 97
%22 = add nsw i32 %21, 10
store i32 %22, i32* %2
br label %33
23: ; preds = %16, %13
%24 = load i32, i32* %3
%25 = icmp sge i32 %24, 48
br i1 %25, label %26, label %32
26: ; preds = %23
%27 = load i32, i32* %3
%28 = icmp sle i32 %27, 57
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, i32* %3
%31 = sub nsw i32 %30, 48
store i32 %31, i32* %2
br label %33
32: ; preds = %26, %23
store i32 0, i32* %2
br label %33
33: ; preds = %32, %29, %19, %9
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @fromhex(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 6
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nsw i32 %0, -55
br label %15
6: ; preds = %1
%7 = add i32 %0, -97
%8 = icmp ult i32 %7, 6
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = add nsw i32 %0, -87
br label %15
11: ; preds = %6
%12 = add i32 %0, -48
%13 = icmp ult i32 %12, 10
%14 = select i1 %13, i32 %12, i32 0
br label %15
15: ; preds = %11, %9, %4
%16 = phi i32 [ %5, %4 ], [ %10, %9 ], [ %14, %11 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ log_allocation(char *, size_t, void *);
void *real_malloc(size_t);
void *malloc(size_t size) {
  void *ptr = real_malloc(size);
  log_allocation("malloc", size, ptr);
  return ptr;
}


x86 assembly (clang, -O0):
<malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <real_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xeb8(%rip),%rdi
call   1040 <log_allocation@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <real_malloc@plt>
mov    %rax,%rbx
lea    0xeca(%rip),%rdi
mov    %r14,%rsi
mov    %rax,%rdx
call   1040 <log_allocation@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"malloc\00"
define i8* @malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @real_malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i64, i64* %2
%7 = load i8*, i8** %3
%8 = call i32 @log_allocation(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %6, i8* %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
@.str = [7 x i8] c"malloc\00"
define i8* @malloc(i64 %0) {
%2 = tail call i8* @real_malloc(i64 %0)
%3 = tail call i32 @log_allocation(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %0, i8* %2)
ret i8* %2
}
int scale_color(int c, double scale) {
  if (scale == 1.0) {
    return c;
  }
  int nonzeroscale = (scale != 0) ? 1 : 0;
  return (c == 0) ? 0 : (c * scale) + nonzeroscale;
}


x86 assembly (clang, -O0):
<scale_color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xee7(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1134 <scale_color+0x34>
jp     1134 <scale_color+0x34>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1196 <scale_color+0x96>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
xor    %eax,%eax
mov    $0x1,%ecx
ucomisd %xmm1,%xmm0
setp   %sil
setne  %dl
or     %sil,%dl
cmovne %ecx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    116e <scale_color+0x6e>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    118a <scale_color+0x8a>
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
cvtsi2sdl -0x14(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_color>:
mov    %edi,%eax
ucomisd 0xef6(%rip),%xmm0
jne    110f <scale_color+0xf>
jp     110f <scale_color+0xf>
ret
test   %eax,%eax
je     1139 <scale_color+0x39>
cvtsi2sd %eax,%xmm1
xorpd  %xmm2,%xmm2
cmpneqsd %xmm0,%xmm2
movsd  0xed8(%rip),%xmm3
andpd  %xmm2,%xmm3
mulsd  %xmm0,%xmm1
addsd  %xmm3,%xmm1
cvttsd2si %xmm1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @scale_color(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
%6 = alloca i32
store i32 %0, i32* %4
store double %1, double* %5
%7 = load double, double* %5
%8 = fcmp oeq double %7, 1.000000e+00
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %29
11: ; preds = %2
%12 = load double, double* %5
%13 = fcmp une double %12, 0.000000e+00
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 1, i32 0
store i32 %15, i32* %6
%16 = load i32, i32* %4
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %11
br label %26
19: ; preds = %11
%20 = load i32, i32* %4
%21 = sitofp i32 %20 to double
%22 = load double, double* %5
%23 = load i32, i32* %6
%24 = sitofp i32 %23 to double
%25 = call double @llvm.fmuladd.f64(double %21, double %22, double %24)
br label %26
26: ; preds = %19, %18
%27 = phi double [ 0.000000e+00, %18 ], [ %25, %19 ]
%28 = fptosi double %27 to i32
store i32 %28, i32* %3
br label %29
29: ; preds = %26, %9
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @scale_color(i32 %0, double %1) {
%3 = fcmp oeq double %1, 1.000000e+00
br i1 %3, label %12, label %4
4: ; preds = %2
%5 = icmp eq i32 %0, 0
br i1 %5, label %12, label %6
6: ; preds = %4
%7 = fcmp une double %1, 0.000000e+00
%8 = sitofp i32 %0 to double
%9 = uitofp i1 %7 to double
%10 = tail call double @llvm.fmuladd.f64(double %8, double %1, double %9)
%11 = fptosi double %10 to i32
br label %12
12: ; preds = %6, %4, %2
%13 = phi i32 [ %0, %2 ], [ %11, %6 ], [ 0, %4 ]
ret i32 %13
}
extern void libvamphostsdk_v_2_6_present(void) {}


x86 assembly (clang, -O0):
<libvamphostsdk_v_2_6_present>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libvamphostsdk_v_2_6_present>:
ret

LLVM IR (-O0):
define void @libvamphostsdk_v_2_6_present() {
ret void
}

LLVM IR (-O2):
define void @libvamphostsdk_v_2_6_present() {
ret void
}
void uart_init() {
  (*((volatile unsigned long *)0xE0200000)) = 0x22222222;
  (*((volatile unsigned long *)0xE0200020)) = 0x2222;
  (*((volatile unsigned long *)0xE2900008)) = 0x1;
  (*((volatile unsigned long *)0xE290000C)) = 0x0;
  (*((volatile unsigned long *)0xE2900000)) = 0x3;
  (*((volatile unsigned long *)0xE2900004)) = 0x5;
  (*((volatile unsigned long *)0xE2900028)) = 35;
  (*((volatile unsigned long *)0xE290002C)) = 0x1;
}


x86 assembly (clang, -O0):
<uart_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0200000,%eax
movq   $0x22222222,(%rax)
mov    $0xe0200020,%eax
movq   $0x2222,(%rax)
mov    $0xe2900008,%eax
movq   $0x1,(%rax)
mov    $0xe290000c,%eax
movq   $0x0,(%rax)
mov    $0xe2900000,%eax
movq   $0x3,(%rax)
mov    $0xe2900004,%eax
movq   $0x5,(%rax)
mov    $0xe2900028,%eax
movq   $0x23,(%rax)
mov    $0xe290002c,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_init>:
mov    $0xe0200000,%eax
movq   $0x22222222,(%rax)
movq   $0x2222,0x20(%rax)
movq   $0x1,0x2700008(%rax)
movq   $0x0,0x270000c(%rax)
movq   $0x3,0x2700000(%rax)
movq   $0x5,0x2700004(%rax)
movq   $0x23,0x2700028(%rax)
movq   $0x1,0x270002c(%rax)
ret

LLVM IR (-O0):
define void @uart_init() {
store volatile i64 572662306, i64* inttoptr (i64 3760193536 to i64*)
store volatile i64 8738, i64* inttoptr (i64 3760193568 to i64*)
store volatile i64 1, i64* inttoptr (i64 3801088008 to i64*)
store volatile i64 0, i64* inttoptr (i64 3801088012 to i64*)
store volatile i64 3, i64* inttoptr (i64 3801088000 to i64*)
store volatile i64 5, i64* inttoptr (i64 3801088004 to i64*)
store volatile i64 35, i64* inttoptr (i64 3801088040 to i64*)
store volatile i64 1, i64* inttoptr (i64 3801088044 to i64*)
ret void
}

LLVM IR (-O2):
define void @uart_init() {
store volatile i64 572662306, i64* inttoptr (i64 3760193536 to i64*)
store volatile i64 8738, i64* inttoptr (i64 3760193568 to i64*)
store volatile i64 1, i64* inttoptr (i64 3801088008 to i64*)
store volatile i64 0, i64* inttoptr (i64 3801088012 to i64*)
store volatile i64 3, i64* inttoptr (i64 3801088000 to i64*)
store volatile i64 5, i64* inttoptr (i64 3801088004 to i64*)
store volatile i64 35, i64* inttoptr (i64 3801088040 to i64*)
store volatile i64 1, i64* inttoptr (i64 3801088044 to i64*)
ret void
}
void TimerM$AlarmControl$enableEvents(void) {
  MSP430TimerM$ControlB3$enableEvents();
}


x86 assembly (clang, -O0):
<TimerM$AlarmControl$enableEvents>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MSP430TimerM$ControlB3$enableEvents@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerM$AlarmControl$enableEvents>:
xor    %eax,%eax
jmp    1030 <MSP430TimerM$ControlB3$enableEvents@plt>

LLVM IR (-O0):
define void @"TimerM$AlarmControl$enableEvents"() {
%1 = call i32 (...) @"MSP430TimerM$ControlB3$enableEvents"()
ret void
}

LLVM IR (-O2):
define void @"TimerM$AlarmControl$enableEvents"() {
%1 = tail call i32 (...) @"MSP430TimerM$ControlB3$enableEvents"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
scalar_t__ readN(int /*<<< orphan*/, void const *, int /*<<< orphan*/ *, int);
uint8_t get8(pid_t pid, const void *addr) {
  uint8_t ret;
  return readN(pid, addr, &ret, sizeof(uint8_t)) ? ret : 0;
}


x86 assembly (clang, -O0):
<get8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <readN@plt>
cmp    $0x0,%rax
je     1149 <get8+0x39>
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    1153 <get8+0x43>
xor    %eax,%eax
mov    %eax,-0x18(%rbp)
jmp    1153 <get8+0x43>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get8>:
push   %rax
lea    0x4(%rsp),%rdx
mov    $0x4,%ecx
call   1030 <readN@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     112e <get8+0x1e>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get8(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i64 @readN(i32 %6, i8* %7, i32* %5, i32 4)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %5
br label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %10
%14 = phi i32 [ %11, %10 ], [ 0, %12 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @get8(i32 %0, i8* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i64 @readN(i32 %0, i8* %1, i32* %3, i32 4)
%6 = icmp eq i64 %5, 0
%7 = load i32, i32* %3
%8 = select i1 %6, i32 0, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
int uart_send_bytes(int /*<<< orphan*/, unsigned char const *);
int uart_send_str(const char *str) {
  return uart_send_bytes(strlen(str), (const unsigned char *)str);
}


x86 assembly (clang, -O0):
<uart_send_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1040 <uart_send_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_send_str>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <uart_send_bytes@plt>

LLVM IR (-O0):
define i32 @uart_send_str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @uart_send_bytes(i32 %4, i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @uart_send_str(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @uart_send_bytes(i32 %2, i8* %0)
ret i32 %3
}
int d6_to_int(int x) { return (x + 32) >> 6; }


x86 assembly (clang, -O0):
<d6_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%eax
sar    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d6_to_int>:
lea    0x20(%rdi),%eax
sar    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @d6_to_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 32
%5 = ashr i32 %4, 6
ret i32 %5
}

LLVM IR (-O2):
define i32 @d6_to_int(i32 %0) {
%2 = add nsw i32 %0, 32
%3 = ashr i32 %2, 6
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ gfx_set_display_video_vertical_downscale_enable(int);
void redcloud_set_video_vertical_downscale_enable(int enable) {
  gfx_set_display_video_vertical_downscale_enable(enable);
}


x86 assembly (clang, -O0):
<redcloud_set_video_vertical_downscale_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <gfx_set_display_video_vertical_downscale_enable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<redcloud_set_video_vertical_downscale_enable>:
jmp    1030 <gfx_set_display_video_vertical_downscale_enable@plt>

LLVM IR (-O0):
define void @redcloud_set_video_vertical_downscale_enable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gfx_set_display_video_vertical_downscale_enable(i32 %3)
ret void
}

LLVM IR (-O2):
define void @redcloud_set_video_vertical_downscale_enable(i32 %0) {
%2 = tail call i32 @gfx_set_display_video_vertical_downscale_enable(i32 %0)
ret void
}
int fc8080_tuner_deinit(void *handle) { return 0; }


x86 assembly (clang, -O0):
<fc8080_tuner_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8080_tuner_deinit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fc8080_tuner_deinit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8080_tuner_deinit(i8* nocapture readnone %0) {
ret i32 0
}
unsigned short make_vgaentry(char c, unsigned char color) {
  unsigned short c16 = c;
  unsigned short color16 = color;
  return c16 | color16 << 8;
}


x86 assembly (clang, -O0):
<make_vgaentry>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
mov    %ax,-0x4(%rbp)
movzbl -0x2(%rbp),%eax
mov    %ax,-0x6(%rbp)
movzwl -0x4(%rbp),%eax
movzwl -0x6(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_vgaentry>:
mov    %esi,%eax
shl    $0x8,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @make_vgaentry(i8 signext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i16
%6 = alloca i16
store i8 %0, i8* %3
store i8 %1, i8* %4
%7 = load i8, i8* %3
%8 = sext i8 %7 to i16
store i16 %8, i16* %5
%9 = load i8, i8* %4
%10 = zext i8 %9 to i16
store i16 %10, i16* %6
%11 = load i16, i16* %5
%12 = zext i16 %11 to i32
%13 = load i16, i16* %6
%14 = zext i16 %13 to i32
%15 = shl i32 %14, 8
%16 = or i32 %12, %15
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define zeroext i16 @make_vgaentry(i8 signext %0, i8 zeroext %1) {
%3 = sext i8 %0 to i16
%4 = zext i8 %1 to i16
%5 = shl nuw i16 %4, 8
%6 = or i16 %5, %3
ret i16 %6
}
/* Variables and functions */
int chroot(char const *);
int UnixVfs_chroot(const char *zRootDir) {
  int rc;
  rc = chroot(zRootDir);
  return rc == 0 ? 0 : -1;
}


x86 assembly (clang, -O0):
<UnixVfs_chroot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chroot@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnixVfs_chroot>:
push   %rax
call   1030 <chroot@plt>
neg    %eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @UnixVfs_chroot(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @chroot(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 -1
ret i32 %9
}

LLVM IR (-O2):
define i32 @UnixVfs_chroot(i8* %0) {
%2 = tail call i32 @chroot(i8* %0)
%3 = icmp ne i32 %2, 0
%4 = sext i1 %3 to i32
ret i32 %4
}
int seq_utils_get_wrapped_range(int pos, int start, int length, int total_len) {
  int offset = (pos - start) % total_len;
  if (offset < 0) {
    offset += total_len;
  }
  if ((offset % total_len) < length) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<seq_utils_get_wrapped_range>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0x14(%rbp)
mov    %edx,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jge    1130 <seq_utils_get_wrapped_range+0x30>
mov    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cltd
idivl  -0x14(%rbp)
cmp    -0x10(%rbp),%edx
jge    114c <seq_utils_get_wrapped_range+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    1153 <seq_utils_get_wrapped_range+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<seq_utils_get_wrapped_range>:
mov    %edx,%r8d
mov    %edi,%eax
sub    %esi,%eax
cltd
idiv   %ecx
mov    %edx,%eax
sar    $0x1f,%eax
and    %ecx,%eax
add    %edx,%eax
cltd
idiv   %ecx
xor    %eax,%eax
cmp    %r8d,%edx
setl   %al
ret

LLVM IR (-O0):
define i32 @seq_utils_get_wrapped_range(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = sub nsw i32 %11, %12
%14 = load i32, i32* %9
%15 = srem i32 %13, %14
store i32 %15, i32* %10
%16 = load i32, i32* %10
%17 = icmp slt i32 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %4
%19 = load i32, i32* %9
%20 = load i32, i32* %10
%21 = add nsw i32 %20, %19
store i32 %21, i32* %10
br label %22
22: ; preds = %18, %4
%23 = load i32, i32* %10
%24 = load i32, i32* %9
%25 = srem i32 %23, %24
%26 = load i32, i32* %8
%27 = icmp slt i32 %25, %26
br i1 %27, label %28, label %29
28: ; preds = %22
store i32 1, i32* %5
br label %30
29: ; preds = %22
store i32 0, i32* %5
br label %30
30: ; preds = %29, %28
%31 = load i32, i32* %5
ret i32 %31
}

LLVM IR (-O2):
define i32 @seq_utils_get_wrapped_range(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = sub nsw i32 %0, %1
%6 = srem i32 %5, %3
%7 = icmp slt i32 %6, 0
%8 = select i1 %7, i32 %3, i32 0
%9 = add nsw i32 %8, %6
%10 = srem i32 %9, %3
%11 = icmp slt i32 %10, %2
%12 = zext i1 %11 to i32
ret i32 %12
}
int test1(char x) { return x / 100 == 3; }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x3,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test1(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sdiv i32 %4, 100
%6 = icmp eq i32 %5, 3
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @test1(i8 signext %0) {
ret i32 0
}
void Sendchar(unsigned int C) {
  *(unsigned int *)0xfe000000 = C;
  return;
}


x86 assembly (clang, -O0):
<Sendchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0xfe000000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sendchar>:
mov    $0xfe000000,%eax
mov    %edi,(%rax)
ret

LLVM IR (-O0):
define void @Sendchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* inttoptr (i64 4261412864 to i32*)
ret void
}

LLVM IR (-O2):
define void @Sendchar(i32 %0) {
store i32 %0, i32* inttoptr (i64 4261412864 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ benchmark(int);
int /*<<< orphan*/ initialise_board();
int /*<<< orphan*/ start_trigger();
int /*<<< orphan*/ stop_trigger();
int main() {
  int n;
  initialise_board();
  start_trigger();
  for (n = 0; n < (4096 >> 6); ++n)
    benchmark(1000);
  stop_trigger();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <initialise_board@plt>
mov    $0x0,%al
call   1030 <start_trigger@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x40,-0x8(%rbp)
jge    1186 <main+0x46>
mov    $0x3e8,%edi
call   1050 <benchmark@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1164 <main+0x24>
mov    $0x0,%al
call   1040 <stop_trigger@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1060 <initialise_board@plt>
xor    %eax,%eax
call   1030 <start_trigger@plt>
mov    $0x40,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    $0x3e8,%edi
call   1050 <benchmark@plt>
add    $0xffffffff,%ebx
jne    1160 <main+0x20>
xor    %eax,%eax
call   1040 <stop_trigger@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @initialise_board()
%4 = call i32 (...) @start_trigger()
store i32 0, i32* %2
br label %5
5: ; preds = %10, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 64
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = call i32 @benchmark(i32 1000)
br label %10
10: ; preds = %8
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %5
13: ; preds = %5
%14 = call i32 (...) @stop_trigger()
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @initialise_board()
%2 = tail call i32 (...) @start_trigger()
br label %3
3: ; preds = %0, %3
%4 = phi i32 [ 0, %0 ], [ %6, %3 ]
%5 = tail call i32 @benchmark(i32 1000)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 64
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = tail call i32 (...) @stop_trigger()
ret i32 0
}
__attribute__((always_)) void __SEV(void) {}


x86 assembly (clang, -O0):
<__SEV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__SEV>:
ret

LLVM IR (-O0):
define void @__SEV() {
ret void
}

LLVM IR (-O2):
define void @__SEV() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_arr(int *, int);
int /*<<< orphan*/ quick_sort(int *, int /*<<< orphan*/, int);
int main() {
  int arr[10] = {8, 4, 0, -1, 5, -7, 10, -3, 6, 9};
  print_arr(arr, 10);
  quick_sort(arr, 0, 10 - 1);
  print_arr(arr, 10);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x28,%edx
call   1040 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1030 <print_arr@plt>
lea    -0x30(%rbp),%rdi
xor    %esi,%esi
mov    $0x9,%edx
call   1050 <quick_sort@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1030 <print_arr@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    0xef4(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xed8(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebc(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <print_arr@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x9,%edx
call   1040 <quick_sort@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <print_arr@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.arr = [10 x i32] [i32 8, i32 4, i32 0, i32 -1, i32 5, i32 -7, i32 10, i32 -3, i32 6, i32 9]
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @print_arr(i32* %3, i32 10)
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%6 = call i32 @quick_sort(i32* %5, i32 0, i32 9)
%7 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%8 = call i32 @print_arr(i32* %7, i32 10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [10 x i32] [i32 8, i32 4, i32 0, i32 -1, i32 5, i32 -7, i32 10, i32 -3, i32 6, i32 9]
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @print_arr(i32* %3, i32 10)
%5 = call i32 @quick_sort(i32* %3, i32 0, i32 9)
%6 = call i32 @print_arr(i32* %3, i32 10)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t esp_cpu_process_stack_pc(uint32_t pc) {
  if (pc & 0x80000000) {
    pc = (pc & 0x3fffffff) | 0x40000000;
  }
  return pc - 3;
}


x86 assembly (clang, -O0):
<esp_cpu_process_stack_pc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     1128 <esp_cpu_process_stack_pc+0x28>
mov    -0x4(%rbp),%eax
and    $0x3fffffff,%eax
or     $0x40000000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<esp_cpu_process_stack_pc>:
mov    %edi,%eax
and    $0x3fffffff,%eax
or     $0x40000000,%eax
test   %edi,%edi
cmovns %edi,%eax
add    $0xfffffffd,%eax
ret

LLVM IR (-O0):
define i32 @esp_cpu_process_stack_pc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -2147483648
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = and i32 %7, 1073741823
%9 = or i32 %8, 1073741824
store i32 %9, i32* %2
br label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
%12 = sub nsw i32 %11, 3
ret i32 %12
}

LLVM IR (-O2):
define i32 @esp_cpu_process_stack_pc(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = and i32 %0, 1073741823
%4 = or i32 %3, 1073741824
%5 = select i1 %2, i32 %0, i32 %4
%6 = add nsw i32 %5, -3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
g() { f(sizeof("xxxxxx")); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x7,%edi
call   1030 <f@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x7,%edi
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @g() {
%1 = alloca i32
%2 = call i32 @f(i32 7)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @g() {
%1 = tail call i32 @f(i32 7)
ret i32 undef
}
/* Variables and functions */
int B(int);
int D(int x) { return B((x >> ((sizeof(int) - 1) << 3)) & 0xff); }


x86 assembly (clang, -O0):
<D>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x18,%edi
and    $0xff,%edi
call   1030 <B@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<D>:
shr    $0x18,%edi
jmp    1030 <B@plt>

LLVM IR (-O0):
define i32 @D(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 24
%5 = and i32 %4, 255
%6 = call i32 @B(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @D(i32 %0) {
%2 = lshr i32 %0, 24
%3 = tail call i32 @B(i32 %2)
ret i32 %3
}
void __attribute__((fastcall)) test0() {}


x86 assembly (clang, -O0):
<test0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test0>:
ret

LLVM IR (-O0):
define void @test0() {
ret void
}

LLVM IR (-O2):
define void @test0() {
ret void
}
int sys_stat64(tcp)
struct tcb *tcp;
{
  return printargs(tcp);
}


x86 assembly (clang, -O0):
<sys_stat64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <printargs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_stat64>:
xor    %eax,%eax
jmp    1030 <printargs@plt>

LLVM IR (-O0):
%struct.tcb = type opaque
define i32 @sys_stat64(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 (%struct.tcb*, ...) bitcast (i32 (...)* @printargs to i32 (%struct.tcb*, ...)*)(%struct.tcb* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tcb = type opaque
define i32 @sys_stat64(%struct.tcb* %0) {
%2 = tail call i32 (%struct.tcb*, ...) bitcast (i32 (...)* @printargs to i32 (%struct.tcb*, ...)*)(%struct.tcb* %0)
ret i32 %2
}
main() { char b[2] = {'2'}; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0xef5(%rip),%ax
mov    %ax,-0x2(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.b = [2 x i8] c"2\00"
define i32 @main() {
%1 = alloca [2 x i8]
%2 = bitcast [2 x i8]* %1 to i8*
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int mi(int i) {
  int tmp = 1, j;
  for (j = 0; j < i; j++)
    tmp *= 2;
  return tmp;
}


x86 assembly (clang, -O0):
<mi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1138 <mi+0x38>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <mi+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mi>:
test   %edi,%edi
jle    1118 <mi+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <mi+0x1e>
mov    $0x1,%eax
jmp    1138 <mi+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <mi+0x30>
test   %ecx,%ecx
je     1147 <mi+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <mi+0x40>
ret

LLVM IR (-O0):
define i32 @mi(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %3
%11 = mul nsw i32 %10, 2
store i32 %11, i32* %3
br label %12
12: ; preds = %9
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %5
15: ; preds = %5
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @mi(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %25
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl nsw i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
/* Variables and functions */
char *gpioPath(char *);
char *malloc(int);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
char *valuePath(char *gpio_number) {
  char filename[50];
  sprintf(filename, "%s/value", gpioPath(gpio_number));
  char *returnValue = malloc(sizeof(char) * 50);
  strcpy(returnValue, filename);
  return returnValue;
}


x86 assembly (clang, -O0):
<valuePath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x40(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <gpioPath@plt>
mov    -0x50(%rbp),%rdi
mov    %rax,%rdx
lea    0xe95(%rip),%rsi
call   1060 <sprintf@plt>
mov    $0x32,%edi
call   1050 <malloc@plt>
mov    %rax,-0x48(%rbp)
mov    -0x48(%rbp),%rdi
lea    -0x40(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x48(%rbp),%rax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valuePath>:
push   %r14
push   %rbx
sub    $0x38,%rsp
call   1040 <gpioPath@plt>
lea    0xead(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
mov    %rax,%rdx
call   1060 <sprintf@plt>
mov    $0x32,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x38,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%s/value\00"
define i8* @valuePath(i8* %0) {
%2 = alloca i8*
%3 = alloca [50 x i8]
%4 = alloca i8*
store i8* %0, i8** %2
%5 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i8* @gpioPath(i8* %6)
%8 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = call i8* @malloc(i32 50)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%12 = call i32 @strcpy(i8* %10, i8* %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s/value\00"
define i8* @valuePath(i8* %0) {
%2 = alloca [50 x i8]
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%4 = tail call i8* @gpioPath(i8* %0)
%5 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = tail call dereferenceable_or_null(50) i8* @malloc(i32 50)
%7 = call i32 @strcpy(i8* %6, i8* %3)
ret i8* %6
}
/* Variables and functions */
scalar_t__ isdigit(char const);
int sym_is_redefinable(const char *name) {
  return name[0] == '.' && isdigit(name[1]);
}


x86 assembly (clang, -O0):
<sym_is_redefinable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x2e,%ecx
mov    %al,-0x9(%rbp)
jne    1148 <sym_is_redefinable+0x38>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sym_is_redefinable>:
push   %rax
xor    %eax,%eax
cmpb   $0x2e,(%rdi)
jne    112c <sym_is_redefinable+0x1c>
movsbl 0x1(%rdi),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sym_is_redefinable(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 46
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = call i64 @isdigit(i8 signext %11)
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %8, %1
%15 = phi i1 [ false, %1 ], [ %13, %8 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @sym_is_redefinable(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 46
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = tail call i64 @isdigit(i8 signext %6)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %4, %1
%11 = phi i32 [ 0, %1 ], [ %9, %4 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ abort();
_flsbuf() { abort(); }


x86 assembly (clang, -O0):
<_flsbuf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<_flsbuf>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @_flsbuf() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define i32 @_flsbuf() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void IPv4head(int osvers, int osrel, int ossub) {
  printf("in: dsc/s hder/s ader/s unkp/s ratim/s rfail/s "
         "out: dsc/s nrt/s_ipv4_");
}


x86 assembly (clang, -O0):
<IPv4head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IPv4head>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [70 x i8] c"in: dsc/s hder/s ader/s unkp/s ratim/s rfail/s out: dsc/s nrt/s_ipv4_\00"
define void @IPv4head(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [70 x i8] c"in: dsc/s hder/s ader/s unkp/s ratim/s rfail/s out: dsc/s nrt/s_ipv4_\00"
define void @IPv4head(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *getenv(char *);
const char *XcursorLibraryPath(void) {
  static const char *path;
  if (!path) {
    path = getenv("XCURSOR_PATH");
    if (!path)
      path = "~/.icons:/usr/share/icons:/usr/share/pixmaps:~/.cursors:/usr/"
             "share/cursors/xorg-x11:"
             "/usr/X11R6/lib/X11/icons";
  }
  return path;
}


x86 assembly (clang, -O0):
<XcursorLibraryPath>:
push   %rbp
mov    %rsp,%rbp
cmpq   $0x0,0x2f14(%rip)
jne    1156 <XcursorLibraryPath+0x46>
lea    0xed7(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,0x2efb(%rip)
cmpq   $0x0,0x2ef3(%rip)
jne    1151 <XcursorLibraryPath+0x41>
lea    0xec3(%rip),%rax
mov    %rax,0x2edf(%rip)
jmp    1156 <XcursorLibraryPath+0x46>
mov    0x2ed3(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XcursorLibraryPath>:
push   %rax
mov    0x2f18(%rip),%rax
test   %rax,%rax
je     111f <XcursorLibraryPath+0xf>
pop    %rcx
ret
lea    0xeda(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rcx
test   %rax,%rax
lea    0xed5(%rip),%rax
cmovne %rcx,%rax
mov    %rax,0x2eed(%rip)
pop    %rcx
ret

LLVM IR (-O0):
@XcursorLibraryPath.path = internal global i8* null
@.str = [13 x i8] c"XCURSOR_PATH\00"
@.str.1 = [109 x i8] c"~/.icons:/usr/share/icons:/usr/share/pixmaps:~/.cursors:/usr/share/cursors/xorg-x11:/usr/X11R6/lib/X11/icons\00"
define i8* @XcursorLibraryPath() {
%1 = load i8*, i8** @XcursorLibraryPath.path
%2 = icmp ne i8* %1, null
br i1 %2, label %9, label %3
3: ; preds = %0
%4 = call i8* @getenv(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
store i8* %4, i8** @XcursorLibraryPath.path
%5 = load i8*, i8** @XcursorLibraryPath.path
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %3
store i8* getelementptr inbounds ([109 x i8], [109 x i8]* @.str.1, i64 0, i64 0), i8** @XcursorLibraryPath.path
br label %8
8: ; preds = %7, %3
br label %9
9: ; preds = %8, %0
%10 = load i8*, i8** @XcursorLibraryPath.path
ret i8* %10
}

LLVM IR (-O2):
@XcursorLibraryPath.path = internal unnamed_addr global i8* null
@.str = [13 x i8] c"XCURSOR_PATH\00"
@.str.1 = [109 x i8] c"~/.icons:/usr/share/icons:/usr/share/pixmaps:~/.cursors:/usr/share/cursors/xorg-x11:/usr/X11R6/lib/X11/icons\00"
define i8* @XcursorLibraryPath() {
%1 = load i8*, i8** @XcursorLibraryPath.path
%2 = icmp eq i8* %1, null
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i8* @getenv(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i8* %4, null
%6 = select i1 %5, i8* getelementptr inbounds ([109 x i8], [109 x i8]* @.str.1, i64 0, i64 0), i8* %4
store i8* %6, i8** @XcursorLibraryPath.path
br label %7
7: ; preds = %3, %0
%8 = phi i8* [ %6, %3 ], [ %1, %0 ]
ret i8* %8
}
/* Variables and functions */
long double atanl(long double);
long double atand(long double x) {
  return atanl(x) / 3.141592653589793238462643383279502884L * 180.0L;
}


x86 assembly (clang, -O0):
<atand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <atanl@plt>
fldt   0xecf(%rip)
fdivrp %st,%st(1)
flds   0xed7(%rip)
fmulp  %st,%st(1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atand>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1030 <atanl@plt>
fldt   0xeda(%rip)
fdivrp %st,%st(1)
fmuls  0xee2(%rip)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @atand(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @atanl(x86_fp80 %3)
%5 = fdiv x86_fp80 %4, 0xK4000C90FDAA22168C235
%6 = fmul x86_fp80 %5, 0xK4006B400000000000000
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @atand(x86_fp80 %0) {
%2 = tail call x86_fp80 @atanl(x86_fp80 %0)
%3 = fdiv x86_fp80 %2, 0xK4000C90FDAA22168C235
%4 = fmul x86_fp80 %3, 0xK4006B400000000000000
ret x86_fp80 %4
}
/* Variables and functions */
bool test(int val, bool cond) { return cond; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 returned %1) {
ret i32 %1
}
/* Variables and functions */
double pow(double, int);
double mm_to_mil(double mm, int exponent) {
  return mm * pow(0.0254, -exponent);
}


x86 assembly (clang, -O0):
<mm_to_mil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
xor    %edi,%edi
sub    -0xc(%rbp),%edi
movsd  0xec9(%rip),%xmm0
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_to_mil>:
push   %rax
movsd  %xmm0,(%rsp)
neg    %edi
movsd  0xee0(%rip),%xmm0
call   1030 <pow@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @mm_to_mil(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 0, %6
%8 = call double @pow(double 2.540000e-02, i32 %7)
%9 = fmul double %5, %8
ret double %9
}

LLVM IR (-O2):
define double @mm_to_mil(double %0, i32 %1) {
%3 = sub nsw i32 0, %1
%4 = tail call double @pow(double 2.540000e-02, i32 %3)
%5 = fmul double %4, %0
ret double %5
}