int _saddus2(unsigned int src1, int src2) {
  int res0, res1;
  unsigned int s1_0 = (src1 & 0xffff);
  unsigned int s1_1 = (src1 & 0xffff0000) >> 16;
  short s2_0 = (src2 & 0xffff);
  short s2_1 = (src2 & 0xffff0000) >> 16;
  res0 = s1_0 + s2_0;
  res1 = s1_1 + s2_1;
  if (res0 >= 0x10000)
    res0 = 0xffff;
  else if (res0 < 0)
    res0 = 0;
  if (res1 >= 0x10000)
    res1 = 0xffff;
  else if (res1 < 0)
    res1 = 0;
  return (res1 << 16) | res0;
}


x86 assembly (clang, -O0):
<_saddus2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff0000,%eax
shr    $0x10,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffff,%eax
mov    %ax,-0x1a(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffff0000,%eax
shr    $0x10,%eax
mov    %ax,-0x1c(%rbp)
mov    -0x14(%rbp),%eax
movswl -0x1a(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%eax
movswl -0x1c(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x10000,-0xc(%rbp)
jl     116f <_saddus2+0x6f>
movl   $0xffff,-0xc(%rbp)
jmp    1185 <_saddus2+0x85>
cmpl   $0x0,-0xc(%rbp)
jge    1180 <_saddus2+0x80>
movl   $0x0,-0xc(%rbp)
jmp    1185 <_saddus2+0x85>
cmpl   $0x10000,-0x10(%rbp)
jl     119e <_saddus2+0x9e>
movl   $0xffff,-0x10(%rbp)
jmp    11b4 <_saddus2+0xb4>
cmpl   $0x0,-0x10(%rbp)
jge    11af <_saddus2+0xaf>
movl   $0x0,-0x10(%rbp)
jmp    11b4 <_saddus2+0xb4>
mov    -0x10(%rbp),%eax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_saddus2>:
movzwl %di,%eax
shr    $0x10,%edi
movswl %si,%ecx
add    %eax,%ecx
sar    $0x10,%esi
add    %edi,%esi
xor    %edx,%edx
test   %ecx,%ecx
cmovs  %edx,%ecx
cmp    $0xffff,%ecx
mov    $0xffff,%edi
cmovb  %ecx,%edi
test   %esi,%esi
cmovns %esi,%edx
shl    $0x10,%edx
cmp    $0x10000,%esi
mov    $0xffff0000,%eax
cmovl  %edx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @_saddus2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i16
%10 = alloca i16
store i32 %0, i32* %3
store i32 %1, i32* %4
%11 = load i32, i32* %3
%12 = and i32 %11, 65535
store i32 %12, i32* %7
%13 = load i32, i32* %3
%14 = and i32 %13, -65536
%15 = lshr i32 %14, 16
store i32 %15, i32* %8
%16 = load i32, i32* %4
%17 = and i32 %16, 65535
%18 = trunc i32 %17 to i16
store i16 %18, i16* %9
%19 = load i32, i32* %4
%20 = and i32 %19, -65536
%21 = lshr i32 %20, 16
%22 = trunc i32 %21 to i16
store i16 %22, i16* %10
%23 = load i32, i32* %7
%24 = load i16, i16* %9
%25 = sext i16 %24 to i32
%26 = add i32 %23, %25
store i32 %26, i32* %5
%27 = load i32, i32* %8
%28 = load i16, i16* %10
%29 = sext i16 %28 to i32
%30 = add i32 %27, %29
store i32 %30, i32* %6
%31 = load i32, i32* %5
%32 = icmp sge i32 %31, 65536
br i1 %32, label %33, label %34
33: ; preds = %2
store i32 65535, i32* %5
br label %39
34: ; preds = %2
%35 = load i32, i32* %5
%36 = icmp slt i32 %35, 0
br i1 %36, label %37, label %38
37: ; preds = %34
store i32 0, i32* %5
br label %38
38: ; preds = %37, %34
br label %39
39: ; preds = %38, %33
%40 = load i32, i32* %6
%41 = icmp sge i32 %40, 65536
br i1 %41, label %42, label %43
42: ; preds = %39
store i32 65535, i32* %6
br label %48
43: ; preds = %39
%44 = load i32, i32* %6
%45 = icmp slt i32 %44, 0
br i1 %45, label %46, label %47
46: ; preds = %43
store i32 0, i32* %6
br label %47
47: ; preds = %46, %43
br label %48
48: ; preds = %47, %42
%49 = load i32, i32* %6
%50 = shl i32 %49, 16
%51 = load i32, i32* %5
%52 = or i32 %50, %51
ret i32 %52
}

LLVM IR (-O2):
define i32 @_saddus2(i32 %0, i32 %1) {
%3 = and i32 %0, 65535
%4 = lshr i32 %0, 16
%5 = shl i32 %1, 16
%6 = ashr exact i32 %5, 16
%7 = add nsw i32 %6, %3
%8 = ashr i32 %1, 16
%9 = add nsw i32 %8, %4
%10 = icmp sgt i32 %7, 0
%11 = select i1 %10, i32 %7, i32 0
%12 = icmp ult i32 %11, 65535
%13 = select i1 %12, i32 %11, i32 65535
%14 = icmp sgt i32 %9, 65535
%15 = icmp sgt i32 %9, 0
%16 = select i1 %15, i32 %9, i32 0
%17 = shl i32 %16, 16
%18 = select i1 %14, i32 -65536, i32 %17
%19 = or i32 %13, %18
ret i32 %19
}