xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x3_setup() {
  char cmd[256];
  sprintf(cmd,
          "iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x3_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x3_setup>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x3_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x3_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LOG(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
scalar_t__ getuid();
int setuid(int /*<<< orphan*/);
int becomeRoot() {
  if (getuid() != 0) {
    int ret = setuid(0);
    if (ret != 0) {
      LOG("setuid failed(%d) with error %d\n", ret, errno);
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<becomeRoot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getuid@plt>
cmp    $0x0,%rax
je     117a <becomeRoot+0x4a>
xor    %edi,%edi
call   1050 <setuid@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1175 <becomeRoot+0x45>
mov    -0x4(%rbp),%esi
mov    0x2e79(%rip),%rax
mov    (%rax),%edx
lea    0xe90(%rip),%rdi
call   1040 <LOG@plt>
jmp    117a <becomeRoot+0x4a>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<becomeRoot>:
push   %rax
xor    %eax,%eax
call   1030 <getuid@plt>
test   %rax,%rax
je     115f <becomeRoot+0x2f>
xor    %edi,%edi
call   1050 <setuid@plt>
test   %eax,%eax
je     115f <becomeRoot+0x2f>
mov    0x2e91(%rip),%rcx
mov    (%rcx),%edx
lea    0xea8(%rip),%rdi
mov    %eax,%esi
call   1040 <LOG@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"setuid failed(%d) with error %d\0A\00"
@errno = global i32 0
define i32 @becomeRoot() {
%1 = alloca i32
%2 = call i64 (...) @getuid()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %0
%5 = call i32 @setuid(i32 0)
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = load i32, i32* %1
%10 = load i32, i32* @errno
%11 = call i32 @LOG(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
br label %12
12: ; preds = %8, %4
br label %13
13: ; preds = %12, %0
ret i32 0
}

LLVM IR (-O2):
@.str = [33 x i8] c"setuid failed(%d) with error %d\0A\00"
@errno = global i32 0
define i32 @becomeRoot() {
%1 = tail call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %9, label %3
3: ; preds = %0
%4 = tail call i32 @setuid(i32 0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, i32* @errno
%8 = tail call i32 @LOG(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %7)
br label %9
9: ; preds = %3, %6, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int raita(char *, char *);
int main(int argc, char *argv[]) {
  int res;
  res = raita("stupid_spring_string", "string");
  res = raita("stupid_int_spring_string", "int");
  printf("Found at %d\n", res);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
lea    0xeca(%rip),%rsi
call   1040 <raita@plt>
mov    %eax,-0x14(%rbp)
lea    0xec2(%rip),%rdi
lea    0xed4(%rip),%rsi
call   1040 <raita@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xedf(%rip),%rsi
call   1040 <raita@plt>
lea    0xeda(%rip),%rdi
lea    0xeec(%rip),%rsi
call   1040 <raita@plt>
lea    0xee4(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"stupid_spring_string\00"
@.str.1 = [7 x i8] c"string\00"
@.str.2 = [25 x i8] c"stupid_int_spring_string\00"
@.str.3 = [4 x i8] c"int\00"
@.str.4 = [13 x i8] c"Found at %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @raita(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
store i32 %7, i32* %6
%8 = call i32 @raita(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0))
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.4, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"stupid_spring_string\00"
@.str.1 = [7 x i8] c"string\00"
@.str.2 = [25 x i8] c"stupid_int_spring_string\00"
@.str.3 = [4 x i8] c"int\00"
@.str.4 = [13 x i8] c"Found at %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @raita(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @raita(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.4, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ JTAG_RunTestldleState();
int /*<<< orphan*/ JTAG_ShiftIRState(char *);
int /*<<< orphan*/ S2410_SetPin(int, int /*<<< orphan*/);
void K9Fxx08_JtagInit(void) {
  JTAG_RunTestldleState();
  JTAG_ShiftIRState("0000");
  S2410_SetPin((168), '0');
  S2410_SetPin((169), '0');
}


x86 assembly (clang, -O0):
<K9Fxx08_JtagInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <JTAG_RunTestldleState@plt>
lea    0xebe(%rip),%rdi
call   1030 <JTAG_ShiftIRState@plt>
mov    $0xa8,%edi
mov    $0x30,%esi
call   1040 <S2410_SetPin@plt>
mov    $0xa9,%edi
mov    $0x30,%esi
call   1040 <S2410_SetPin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<K9Fxx08_JtagInit>:
push   %rax
xor    %eax,%eax
call   1050 <JTAG_RunTestldleState@plt>
lea    0xec1(%rip),%rdi
call   1030 <JTAG_ShiftIRState@plt>
mov    $0xa8,%edi
mov    $0x30,%esi
call   1040 <S2410_SetPin@plt>
mov    $0xa9,%edi
mov    $0x30,%esi
pop    %rax
jmp    1040 <S2410_SetPin@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"0000\00"
define void @K9Fxx08_JtagInit() {
%1 = call i32 (...) @JTAG_RunTestldleState()
%2 = call i32 @JTAG_ShiftIRState(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @S2410_SetPin(i32 168, i32 48)
%4 = call i32 @S2410_SetPin(i32 169, i32 48)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"0000\00"
define void @K9Fxx08_JtagInit() {
%1 = tail call i32 (...) @JTAG_RunTestldleState()
%2 = tail call i32 @JTAG_ShiftIRState(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @S2410_SetPin(i32 168, i32 48)
%4 = tail call i32 @S2410_SetPin(i32 169, i32 48)
ret void
}
int fvin_get_configuration(int opcode) {
  switch (opcode) {
  case 0:
    return (25);
  case 1:
    return (10);
  case 2:
    return (0xffff);
  case 3:
    return (0);
  }
}


x86 assembly (clang, -O0):
<fvin_get_configuration>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     1157 <fvin_get_configuration+0x57>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x19,-0x4(%rbp)
jmp    1157 <fvin_get_configuration+0x57>
movl   $0xa,-0x4(%rbp)
jmp    1157 <fvin_get_configuration+0x57>
movl   $0xffff,-0x4(%rbp)
jmp    1157 <fvin_get_configuration+0x57>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fvin_get_configuration>:
add    $0xffffffff,%edi
mov    $0x19,%eax
cmp    $0x2,%edi
ja     111a <fvin_get_configuration+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @fvin_get_configuration(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i32 25, i32* %2
br label %9
6: ; preds = %1
store i32 10, i32* %2
br label %9
7: ; preds = %1
store i32 65535, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %5, %6, %7, %8, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@switch.table.fvin_get_configuration = [3 x i32] [i32 10, i32 65535, i32 0]
define i32 @fvin_get_configuration(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [3 x i32], [3 x i32]* @switch.table.fvin_get_configuration, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 25, %1 ], [ %7, %4 ]
ret i32 %9
}
int foo3(int a) {
  int b = a + 1;
  if (b >= 0)
    return b;
  return 1;
}


x86 assembly (clang, -O0):
<foo3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1125 <foo3+0x25>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112c <foo3+0x2c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo3>:
lea    0x1(%rdi),%ecx
cmp    $0xffffffff,%edi
mov    $0x1,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo3(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 1, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @foo3(i32 %0) {
%2 = icmp sgt i32 %0, -2
%3 = add nsw i32 %0, 1
%4 = select i1 %2, i32 %3, i32 1
ret i32 %4
}
void hicsetpalettetint(long palnum, unsigned char r, unsigned char g,
                       unsigned char b, unsigned char effect) {}


x86 assembly (clang, -O0):
<hicsetpalettetint>:
push   %rbp
mov    %rsp,%rbp
mov    %r8b,%al
mov    %rdi,-0x8(%rbp)
mov    %sil,-0x9(%rbp)
mov    %dl,-0xa(%rbp)
mov    %cl,-0xb(%rbp)
mov    %al,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hicsetpalettetint>:
ret

LLVM IR (-O0):
define void @hicsetpalettetint(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4) {
%6 = alloca i64
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i64 %0, i64* %6
store i8 %1, i8* %7
store i8 %2, i8* %8
store i8 %3, i8* %9
store i8 %4, i8* %10
ret void
}

LLVM IR (-O2):
define void @hicsetpalettetint(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4) {
ret void
}
/* Type definitions */
struct RNAsnoop_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ RNAsnoop_cmdline_parser_release(struct RNAsnoop_args_info *);
void RNAsnoop_cmdline_parser_free(struct RNAsnoop_args_info *args_info) {
  RNAsnoop_cmdline_parser_release(args_info);
}


x86 assembly (clang, -O0):
<RNAsnoop_cmdline_parser_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RNAsnoop_cmdline_parser_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAsnoop_cmdline_parser_free>:
jmp    1030 <RNAsnoop_cmdline_parser_release@plt>

LLVM IR (-O0):
%struct.RNAsnoop_args_info = type { i32 }
define void @RNAsnoop_cmdline_parser_free(%struct.RNAsnoop_args_info* %0) {
%2 = alloca %struct.RNAsnoop_args_info*
store %struct.RNAsnoop_args_info* %0, %struct.RNAsnoop_args_info** %2
%3 = load %struct.RNAsnoop_args_info*, %struct.RNAsnoop_args_info** %2
%4 = call i32 @RNAsnoop_cmdline_parser_release(%struct.RNAsnoop_args_info* %3)
ret void
}

LLVM IR (-O2):
%struct.RNAsnoop_args_info = type { i32 }
define void @RNAsnoop_cmdline_parser_free(%struct.RNAsnoop_args_info* %0) {
%2 = tail call i32 @RNAsnoop_cmdline_parser_release(%struct.RNAsnoop_args_info* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ QTV_Stream_by_ID(unsigned int);
unsigned int QTV_GenerateStreamID(void) {
  unsigned int id;
  for (id = 1;; id++) {
    if (!QTV_Stream_by_ID(id))
      return id;
  }
}


x86 assembly (clang, -O0):
<QTV_GenerateStreamID>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <QTV_Stream_by_ID@plt>
cmp    $0x0,%eax
jne    1139 <QTV_GenerateStreamID+0x29>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret
jmp    113e <QTV_GenerateStreamID+0x2e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <QTV_GenerateStreamID+0xf>

x86 assembly (clang, -O2):
<QTV_GenerateStreamID>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <QTV_Stream_by_ID@plt>
test   %eax,%eax
jne    1120 <QTV_GenerateStreamID+0x10>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @QTV_GenerateStreamID() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %9, %0
%3 = load i32, i32* %1
%4 = call i32 @QTV_Stream_by_ID(i32 %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = load i32, i32* %1
ret i32 %7
8: ; preds = %2
br label %9
9: ; preds = %8
%10 = load i32, i32* %1
%11 = add i32 %10, 1
store i32 %11, i32* %1
br label %2
}

LLVM IR (-O2):
define i32 @QTV_GenerateStreamID() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 1, %0 ], [ %5, %1 ]
%3 = tail call i32 @QTV_Stream_by_ID(i32 %2)
%4 = icmp eq i32 %3, 0
%5 = add i32 %2, 1
br i1 %4, label %6, label %1
6: ; preds = %1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_strlist_reverse() {
  printf("NOT IMPLEMENTED:"
         "pa_strlist_reverse"
         "\n");
}


x86 assembly (clang, -O0):
<pa_strlist_reverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_strlist_reverse>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_strlist_reverse\0A\00"
define i32 @pa_strlist_reverse() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_strlist_reverse\00"
define i32 @pa_strlist_reverse() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void INT_Excep_ICU_SWINT(void) {}


x86 assembly (clang, -O0):
<INT_Excep_ICU_SWINT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_ICU_SWINT>:
ret

LLVM IR (-O0):
define void @INT_Excep_ICU_SWINT() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_ICU_SWINT() {
ret void
}
unsigned setbits(unsigned x, int p, int n, unsigned y) {
  return (x & (~0 << p + 1)) | (y & ~(~0 << n)) << (p + 1 - n) |
         (x & ~(~0 << (p + 1 - n)));
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%esi
shl    %cl,%esi
mov    %esi,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%edx
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    -0x14(%rbp),%ecx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%r9d
add    $0x1,%esi
mov    %edi,%r8d
mov    %esi,%ecx
shr    %cl,%r8d
mov    %edx,%eax
shl    %cl,%r8d
mov    $0xffffffff,%edx
mov    %eax,%ecx
shl    %cl,%edx
not    %edx
and    %r9d,%edx
sub    %eax,%esi
mov    %esi,%ecx
shl    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
or     %r8d,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 1
%12 = shl i32 -1, %11
%13 = and i32 %9, %12
%14 = load i32, i32* %8
%15 = load i32, i32* %7
%16 = shl i32 -1, %15
%17 = xor i32 %16, -1
%18 = and i32 %14, %17
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
%21 = load i32, i32* %7
%22 = sub nsw i32 %20, %21
%23 = shl i32 %18, %22
%24 = or i32 %13, %23
%25 = load i32, i32* %5
%26 = load i32, i32* %6
%27 = add nsw i32 %26, 1
%28 = load i32, i32* %7
%29 = sub nsw i32 %27, %28
%30 = shl i32 -1, %29
%31 = xor i32 %30, -1
%32 = and i32 %25, %31
%33 = or i32 %24, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %1, 1
%6 = shl nsw i32 -1, %5
%7 = and i32 %6, %0
%8 = shl nsw i32 -1, %2
%9 = xor i32 %8, -1
%10 = and i32 %9, %3
%11 = sub nsw i32 %5, %2
%12 = shl i32 %10, %11
%13 = or i32 %12, %7
%14 = shl nsw i32 -1, %11
%15 = xor i32 %14, -1
%16 = and i32 %15, %0
%17 = or i32 %13, %16
ret i32 %17
}
int deref(const char *s) { return *s; }


x86 assembly (clang, -O0):
<deref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deref>:
movsbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @deref(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @deref(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ convertToRPN(char *);
void mainTest(int argc, char **argv) {
  convertToRPN("(a+(b*c))");
  convertToRPN("a*b+c");
  convertToRPN("((a+t)*((b+(a+c))^(c+d)))");
}


x86 assembly (clang, -O0):
<mainTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <convertToRPN@plt>
lea    0xed8(%rip),%rdi
call   1030 <convertToRPN@plt>
lea    0xed2(%rip),%rdi
call   1030 <convertToRPN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mainTest>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <convertToRPN@plt>
lea    0xee6(%rip),%rdi
call   1030 <convertToRPN@plt>
lea    0xee0(%rip),%rdi
pop    %rax
jmp    1030 <convertToRPN@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"(a+(b*c))\00"
@.str.1 = [6 x i8] c"a*b+c\00"
@.str.2 = [26 x i8] c"((a+t)*((b+(a+c))^(c+d)))\00"
define void @mainTest(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @convertToRPN(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @convertToRPN(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @convertToRPN(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"(a+(b*c))\00"
@.str.1 = [6 x i8] c"a*b+c\00"
@.str.2 = [26 x i8] c"((a+t)*((b+(a+c))^(c+d)))\00"
define void @mainTest(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @convertToRPN(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @convertToRPN(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @convertToRPN(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dlfree(void *);
void mem_free(void *x) { dlfree(x); }


x86 assembly (clang, -O0):
<mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dlfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_free>:
jmp    1030 <dlfree@plt>

LLVM IR (-O0):
define void @mem_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dlfree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mem_free(i8* %0) {
%2 = tail call i32 @dlfree(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rotate(int *, int, int);
int main() {
  int a[7] = {1, 2, 3, 4, 5, 6, 7};
  int k = 10;
  rotate(a, 7, k);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xed2(%rip),%eax
mov    %eax,-0x8(%rbp)
movl   $0xa,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%edx
mov    $0x7,%esi
call   1030 <rotate@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movups 0xef1(%rip),%xmm0
movups %xmm0,0xc(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x7,%esi
mov    $0xa,%edx
call   1030 <rotate@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [7 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7]
define i32 @main() {
%1 = alloca i32
%2 = alloca [7 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [7 x i32]* %2 to i8*
store i32 10, i32* %3
%5 = getelementptr inbounds [7 x i32], [7 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = call i32 @rotate(i32* %5, i32 7, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [7 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7]
define i32 @main() {
%1 = alloca [7 x i32]
%2 = bitcast [7 x i32]* %1 to i8*
%3 = getelementptr inbounds [7 x i32], [7 x i32]* %1, i64 0, i64 0
%4 = call i32 @rotate(i32* %3, i32 7, i32 10)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(unsigned char *, int, int, int /*<<< orphan*/ *);
int write_be_long(unsigned long val, FILE *fp) {
  unsigned char c[4];
  c[0] = (val >> 24) & 0xFFL;
  c[1] = (val >> 16) & 0xFFL;
  c[2] = (val >> 8) & 0xFFL;
  c[3] = val & 0xFFL;
  return fwrite(c, 1, 4, fp);
}


x86 assembly (clang, -O0):
<write_be_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x18,%rax
and    $0xff,%rax
mov    %al,-0x14(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
and    $0xff,%rax
mov    %al,-0x13(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
and    $0xff,%rax
mov    %al,-0x12(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff,%rax
mov    %al,-0x11(%rbp)
lea    -0x14(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_be_long>:
push   %rax
mov    %rsi,%rcx
bswap  %edi
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fwrite@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_be_long(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
%5 = alloca [4 x i8]
store i64 %0, i64* %3
store i32* %1, i32** %4
%6 = load i64, i64* %3
%7 = lshr i64 %6, 24
%8 = and i64 %7, 255
%9 = trunc i64 %8 to i8
%10 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
store i8 %9, i8* %10
%11 = load i64, i64* %3
%12 = lshr i64 %11, 16
%13 = and i64 %12, 255
%14 = trunc i64 %13 to i8
%15 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 1
store i8 %14, i8* %15
%16 = load i64, i64* %3
%17 = lshr i64 %16, 8
%18 = and i64 %17, 255
%19 = trunc i64 %18 to i8
%20 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 2
store i8 %19, i8* %20
%21 = load i64, i64* %3
%22 = and i64 %21, 255
%23 = trunc i64 %22 to i8
%24 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 3
store i8 %23, i8* %24
%25 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
%26 = load i32*, i32** %4
%27 = call i32 @fwrite(i8* %25, i32 1, i32 4, i32* %26)
ret i32 %27
}

LLVM IR (-O2):
define i32 @write_be_long(i64 %0, i32* nocapture %1) {
%3 = alloca [4 x i8]
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = lshr i64 %0, 24
%6 = trunc i64 %5 to i8
store i8 %6, i8* %4
%7 = lshr i64 %0, 16
%8 = trunc i64 %7 to i8
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 1
store i8 %8, i8* %9
%10 = lshr i64 %0, 8
%11 = trunc i64 %10 to i8
%12 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 2
store i8 %11, i8* %12
%13 = trunc i64 %0 to i8
%14 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 3
store i8 %13, i8* %14
%15 = call i32 @fwrite(i8* %4, i32 1, i32 4, i32* %1)
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ z_streamp;

/* Variables and functions */
int /*<<< orphan*/ free(int /*<<< orphan*/);
int /*<<< orphan*/ inflateEnd(int /*<<< orphan*/);
void GZ_Close(z_streamp zsp) {
  inflateEnd(zsp);
  free(zsp);
}


x86 assembly (clang, -O0):
<GZ_Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <inflateEnd@plt>
mov    -0x4(%rbp),%edi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GZ_Close>:
push   %rbx
mov    %edi,%ebx
call   1040 <inflateEnd@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @GZ_Close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @inflateEnd(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @free(i32 %5)
ret void
}

LLVM IR (-O2):
define void @GZ_Close(i32 %0) {
%2 = tail call i32 @inflateEnd(i32 %0)
%3 = tail call i32 @free(i32 %0)
ret void
}
void bash_malloc_stub() {}


x86 assembly (clang, -O0):
<bash_malloc_stub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bash_malloc_stub>:
ret

LLVM IR (-O0):
define void @bash_malloc_stub() {
ret void
}

LLVM IR (-O2):
define void @bash_malloc_stub() {
ret void
}
int test31(int a, int b) {
  return ((a & 0x7F) == 1) | ((a & 0xFF00) == 0x0200) |
         ((a & 0xFF0000) == 0x030000) | ((a & 0xFF000000) == 0x04000000);
}


x86 assembly (clang, -O0):
<test31>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f,%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
cmp    $0x200,%ecx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
cmp    $0x30000,%ecx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
cmp    $0x4000000,%ecx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test31>:
movd   %edi,%xmm0
pshufd $0x0,%xmm0,%xmm0
pand   0xeef(%rip),%xmm0
pcmpeqd 0xef7(%rip),%xmm0
movmskps %xmm0,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @test31(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 127
%7 = icmp eq i32 %6, 1
%8 = zext i1 %7 to i32
%9 = load i32, i32* %3
%10 = and i32 %9, 65280
%11 = icmp eq i32 %10, 512
%12 = zext i1 %11 to i32
%13 = or i32 %8, %12
%14 = load i32, i32* %3
%15 = and i32 %14, 16711680
%16 = icmp eq i32 %15, 196608
%17 = zext i1 %16 to i32
%18 = or i32 %13, %17
%19 = load i32, i32* %3
%20 = and i32 %19, -16777216
%21 = icmp eq i32 %20, 67108864
%22 = zext i1 %21 to i32
%23 = or i32 %18, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @test31(i32 %0, i32 %1) {
%3 = insertelement <4 x i32> poison, i32 %0, i64 0
%4 = shufflevector <4 x i32> %3, <4 x i32> poison, <4 x i32> zeroinitializer
%5 = and <4 x i32> %4, <i32 -16777216, i32 16711680, i32 127, i32 65280>
%6 = icmp eq <4 x i32> %5, <i32 67108864, i32 196608, i32 1, i32 512>
%7 = bitcast <4 x i1> %6 to i4
%8 = icmp ne i4 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
struct ottery_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ottery_st_prevent_backtracking_nolock(struct ottery_state *);
void ottery_st_prevent_backtracking(struct ottery_state *st) {
  ((void)0);
  ottery_st_prevent_backtracking_nolock(st);
  ((void)0);
}


x86 assembly (clang, -O0):
<ottery_st_prevent_backtracking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ottery_st_prevent_backtracking_nolock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ottery_st_prevent_backtracking>:
jmp    1030 <ottery_st_prevent_backtracking_nolock@plt>

LLVM IR (-O0):
%struct.ottery_state = type { i32 }
define void @ottery_st_prevent_backtracking(%struct.ottery_state* %0) {
%2 = alloca %struct.ottery_state*
store %struct.ottery_state* %0, %struct.ottery_state** %2
%3 = load %struct.ottery_state*, %struct.ottery_state** %2
%4 = call i32 @ottery_st_prevent_backtracking_nolock(%struct.ottery_state* %3)
ret void
}

LLVM IR (-O2):
%struct.ottery_state = type { i32 }
define void @ottery_st_prevent_backtracking(%struct.ottery_state* %0) {
%2 = tail call i32 @ottery_st_prevent_backtracking_nolock(%struct.ottery_state* %0)
ret void
}
void gtk_tree_view_column_get_widget() {}


x86 assembly (clang, -O0):
<gtk_tree_view_column_get_widget>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_column_get_widget>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_column_get_widget() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_column_get_widget() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setup_IO();
int /*<<< orphan*/ setup_TIM1();
int /*<<< orphan*/ setup_TIM8();
void setup() {
  setup_IO();
  setup_TIM1();
  setup_TIM8();
}


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setup_IO@plt>
mov    $0x0,%al
call   1050 <setup_TIM1@plt>
mov    $0x0,%al
call   1040 <setup_TIM8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
push   %rax
xor    %eax,%eax
call   1030 <setup_IO@plt>
xor    %eax,%eax
call   1050 <setup_TIM1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <setup_TIM8@plt>

LLVM IR (-O0):
define void @setup() {
%1 = call i32 (...) @setup_IO()
%2 = call i32 (...) @setup_TIM1()
%3 = call i32 (...) @setup_TIM8()
ret void
}

LLVM IR (-O2):
define void @setup() {
%1 = tail call i32 (...) @setup_IO()
%2 = tail call i32 (...) @setup_TIM1()
%3 = tail call i32 (...) @setup_TIM8()
ret void
}
int Athena_PlotCourse(struct Athena_Course *course,
                      struct Athena_Field *field) {
  return 0;
}


x86 assembly (clang, -O0):
<Athena_PlotCourse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Athena_PlotCourse>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.Athena_Course = type opaque
%struct.Athena_Field = type opaque
define i32 @Athena_PlotCourse(%struct.Athena_Course* %0, %struct.Athena_Field* %1) {
%3 = alloca %struct.Athena_Course*
%4 = alloca %struct.Athena_Field*
store %struct.Athena_Course* %0, %struct.Athena_Course** %3
store %struct.Athena_Field* %1, %struct.Athena_Field** %4
ret i32 0
}

LLVM IR (-O2):
%struct.Athena_Course = type opaque
%struct.Athena_Field = type opaque
define i32 @Athena_PlotCourse(%struct.Athena_Course* nocapture readnone %0, %struct.Athena_Field* nocapture readnone %1) {
ret i32 0
}
void outb(unsigned char value, int port) {
  asm volatile("outb %b0, %w1" : : "a"(value), "Nd"(port));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%edx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%edx
mov    %edi,%eax
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @outb(i8 zeroext %0, i32 %1) {
tail call void asm sideeffect "outb ${0:b}, ${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %0, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ caddr_t;

/* Variables and functions */
int PROT_READ;
int PROT_WRITE;
scalar_t__ mprotect(int /*<<< orphan*/, size_t, int);
int /*<<< orphan*/ mprotectFailed();
void Page_AllowAccess(void *address, size_t size) {
  if (mprotect((caddr_t)address, size, PROT_READ | PROT_WRITE) < 0)
    mprotectFailed();
}


x86 assembly (clang, -O0):
<Page_AllowAccess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
mov    0x2eb7(%rip),%rax
mov    (%rax),%edx
mov    0x2e8e(%rip),%rax
or     (%rax),%edx
call   1040 <mprotect@plt>
cmp    $0x0,%rax
jge    1162 <Page_AllowAccess+0x42>
mov    $0x0,%al
call   1030 <mprotectFailed@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Page_AllowAccess>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
call   1040 <mprotect@plt>
test   %rax,%rax
js     113f <Page_AllowAccess+0x1f>
pop    %rax
ret
xor    %eax,%eax
pop    %rcx
jmp    1030 <mprotectFailed@plt>

LLVM IR (-O0):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
define void @Page_AllowAccess(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i32
%7 = load i64, i64* %4
%8 = load i32, i32* @PROT_READ
%9 = load i32, i32* @PROT_WRITE
%10 = or i32 %8, %9
%11 = call i64 @mprotect(i32 %6, i64 %7, i32 %10)
%12 = icmp slt i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = call i32 (...) @mprotectFailed()
br label %15
15: ; preds = %13, %2
ret void
}

LLVM IR (-O2):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
define void @Page_AllowAccess(i8* %0, i64 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = trunc i64 %3 to i32
%5 = load i32, i32* @PROT_READ
%6 = load i32, i32* @PROT_WRITE
%7 = or i32 %6, %5
%8 = tail call i64 @mprotect(i32 %4, i64 %1, i32 %7)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @mprotectFailed()
br label %12
12: ; preds = %10, %2
ret void
}
void *wtypeDouble_clone(const void *element) {
  double *clone = __wxmalloc(sizeof(double));
  *clone = *(double *)element;
  return clone;
}


x86 assembly (clang, -O0):
<wtypeDouble_clone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x8,%edi
mov    $0x0,%al
call   1030 <__wxmalloc@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wtypeDouble_clone>:
push   %rbx
mov    %rdi,%rbx
mov    $0x8,%edi
xor    %eax,%eax
call   1030 <__wxmalloc@plt>
cltq
movsd  (%rbx),%xmm0
movsd  %xmm0,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @wtypeDouble_clone(i8* %0) {
%2 = alloca i8*
%3 = alloca double*
store i8* %0, i8** %2
%4 = call i32 (i64, ...) bitcast (i32 (...)* @__wxmalloc to i32 (i64, ...)*)(i64 8)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to double*
store double* %6, double** %3
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to double*
%9 = load double, double* %8
%10 = load double*, double** %3
store double %9, double* %10
%11 = load double*, double** %3
%12 = bitcast double* %11 to i8*
ret i8* %12
}

LLVM IR (-O2):
define i8* @wtypeDouble_clone(i8* nocapture %0) {
%2 = tail call i32 (i64, ...) bitcast (i32 (...)* @__wxmalloc to i32 (i64, ...)*)(i64 8)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to double*
%5 = bitcast i8* %0 to double*
%6 = load double, double* %5
store double %6, double* %4
%7 = inttoptr i64 %3 to i8*
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, unsigned long);
void __generic_memcpy_fromfs(void *to, const void *from, unsigned long n) {
  memcpy(to, from, n);
}


x86 assembly (clang, -O0):
<__generic_memcpy_fromfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__generic_memcpy_fromfs>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @__generic_memcpy_fromfs(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @__generic_memcpy_fromfs(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ si_addr;
};
typedef TYPE_1__ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void sigsegv_handler(int signum, siginfo_t *si, void *context) {
  do {
    cleanup();
    printf("FAIL\t"
           "Segmentation fault in parent at address %p"
           "\n",
           si->si_addr);
    exit(2);
  } while (0);
}


x86 assembly (clang, -O0):
<sigsegv_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1040 <cleanup@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<sigsegv_handler>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
call   1040 <cleanup@plt>
mov    (%rbx),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
@.str = [49 x i8] c"FAIL\09Segmentation fault in parent at address %p\0A\00"
define void @sigsegv_handler(i32 %0, %struct.TYPE_3__* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.TYPE_3__*
%6 = alloca i8*
store i32 %0, i32* %4
store %struct.TYPE_3__* %1, %struct.TYPE_3__** %5
store i8* %2, i8** %6
br label %7
7: ; preds = %3
%8 = call i32 (...) @cleanup()
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = call i32 @exit(i32 2)
unreachable
14: ; No predecessors!
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
@.str = [49 x i8] c"FAIL\09Segmentation fault in parent at address %p\0A\00"
define void @sigsegv_handler(i32 %0, %struct.TYPE_3__* nocapture %1, i8* nocapture readnone %2) {
%4 = tail call i32 (...) @cleanup()
%5 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = tail call i32 @exit(i32 2)
unreachable
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void eth_addr_mark_random(uint8_t ea[6]) {
  ea[0] &= ~1;
  ea[0] |= 2;
}


x86 assembly (clang, -O0):
<eth_addr_mark_random>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<eth_addr_mark_random>:
mov    (%rdi),%eax
and    $0xfffffffc,%eax
or     $0x2,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @eth_addr_mark_random(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = and i32 %5, -2
store i32 %6, i32* %4
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 0
%9 = load i32, i32* %8
%10 = or i32 %9, 2
store i32 %10, i32* %8
ret void
}

LLVM IR (-O2):
define void @eth_addr_mark_random(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, -4
%4 = or i32 %3, 2
store i32 %4, i32* %0
ret void
}
int ddsGetRedMask(unsigned const char *buffer) {
  return (buffer[92] & 0xFF) | (buffer[93] & 0xFF) << 8 |
         (buffer[94] & 0xFF) << 16 | (buffer[95] & 0xFF) << 24;
}


x86 assembly (clang, -O0):
<ddsGetRedMask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x5c(%rax),%eax
and    $0xff,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5d(%rcx),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5e(%rcx),%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5f(%rcx),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddsGetRedMask>:
mov    0x5c(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ddsGetRedMask(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 92
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = and i32 %6, 255
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 93
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = and i32 %11, 255
%13 = shl i32 %12, 8
%14 = or i32 %7, %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 94
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = and i32 %18, 255
%20 = shl i32 %19, 16
%21 = or i32 %14, %20
%22 = load i8*, i8** %2
%23 = getelementptr inbounds i8, i8* %22, i64 95
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = and i32 %25, 255
%27 = shl i32 %26, 24
%28 = or i32 %21, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @ddsGetRedMask(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 92
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = getelementptr inbounds i8, i8* %0, i64 93
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 8
%9 = or i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 94
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 16
%14 = or i32 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 95
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl nuw i32 %17, 24
%19 = or i32 %14, %18
ret i32 %19
}
x(a) {
  static void *j[] = {&&l1, &&l2};
  goto *j[a];
l1:
  return 0;
l2:
  return 1;
}


x86 assembly (clang, -O0):
<x>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movslq -0x8(%rbp),%rcx
lea    0x2f1e(%rip),%rax
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <x+0x37>
movl   $0x0,-0x4(%rbp)
jmp    1132 <x+0x32>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret
mov    -0x10(%rbp),%rax
jmp    *%rax

x86 assembly (clang, -O2):
<x>:
movslq %edi,%rax
lea    0x2d36(%rip),%rcx
jmp    *(%rcx,%rax,8)
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
@x.j = internal global [2 x i8*] [i8* blockaddress(@x, %8), i8* blockaddress(@x, %9)]
define i32 @x(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds [2 x i8*], [2 x i8*]* @x.j, i64 0, i64 %5
%7 = load i8*, i8** %6
br label %12
8: ; preds = %12
store i32 0, i32* %2
br label %10
9: ; preds = %12
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
12: ; preds = %1
%13 = phi i8* [ %7, %1 ]
indirectbr i8* %13, [label %8, label %9]
}

LLVM IR (-O2):
@x.j = internal unnamed_addr constant [2 x i8*] [i8* blockaddress(@x, %6), i8* blockaddress(@x, %5)]
define i32 @x(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds [2 x i8*], [2 x i8*]* @x.j, i64 0, i64 %2
%4 = load i8*, i8** %3
indirectbr i8* %4, [label %6, label %5]
5: ; preds = %1
br label %6
6: ; preds = %1, %5
%7 = phi i32 [ 1, %5 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
long getSonarDistance(int, int);
long allignement(int SonarTriggerDroite, int SonarEchoDroite,
                 int SonarTriggerAllign, int SonarEchoAllign) {
  long mmAvant, mmAllign, delta;
  mmAvant = getSonarDistance(SonarTriggerDroite, SonarEchoDroite);
  delay(10);
  mmAllign = getSonarDistance(SonarTriggerAllign, SonarEchoAllign);
  delay(10);
  delta = mmAvant - mmAllign;
  return delta;
}


x86 assembly (clang, -O0):
<allignement>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <getSonarDistance@plt>
mov    %rax,-0x18(%rbp)
mov    $0xa,%edi
call   1030 <delay@plt>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <getSonarDistance@plt>
mov    %rax,-0x20(%rbp)
mov    $0xa,%edi
call   1030 <delay@plt>
mov    -0x18(%rbp),%rax
sub    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allignement>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
call   1040 <getSonarDistance@plt>
mov    %rax,%rbx
mov    $0xa,%edi
call   1030 <delay@plt>
mov    %ebp,%edi
mov    %r14d,%esi
call   1040 <getSonarDistance@plt>
mov    %rax,%rbp
mov    $0xa,%edi
call   1030 <delay@plt>
sub    %rbp,%rbx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @allignement(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = call i64 @getSonarDistance(i32 %12, i32 %13)
store i64 %14, i64* %9
%15 = call i32 @delay(i32 10)
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = call i64 @getSonarDistance(i32 %16, i32 %17)
store i64 %18, i64* %10
%19 = call i32 @delay(i32 10)
%20 = load i64, i64* %9
%21 = load i64, i64* %10
%22 = sub nsw i64 %20, %21
store i64 %22, i64* %11
%23 = load i64, i64* %11
ret i64 %23
}

LLVM IR (-O2):
define i64 @allignement(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i64 @getSonarDistance(i32 %0, i32 %1)
%6 = tail call i32 @delay(i32 10)
%7 = tail call i64 @getSonarDistance(i32 %2, i32 %3)
%8 = tail call i32 @delay(i32 10)
%9 = sub nsw i64 %5, %7
ret i64 %9
}