void UARTConfigSetExpClk(unsigned int baseAdd, unsigned int uartClk,
                         unsigned int baudrate, unsigned int config,
                         unsigned int overSampRate) {
  unsigned int divisor = 0;
  switch (overSampRate) {
  case (0x00000001u):
    divisor = uartClk / (baudrate * 13);
    (*((volatile unsigned int *)(baseAdd + (0x34)))) = (0x00000001u);
    break;
  case (0x00000000u):
  default:
    divisor = uartClk / (baudrate * 16);
    (*((volatile unsigned int *)(baseAdd + (0x34)))) &= ~(0x00000001u);
    break;
  }
  (*((volatile unsigned int *)(baseAdd + (0x20)))) = ((divisor & 0xFF));
  (*((volatile unsigned int *)(baseAdd + (0x24)))) = ((divisor & 0xFF00) >> 8);
  (*((volatile unsigned int *)(baseAdd + (0xC)))) =
      (config & ((0x00000004u) | (0x00000003u) | (0x00000008u) | (0x00000010u) |
                 (0x00000020u) | (0x00000040u) | (0x00000080u)));
}


x86 assembly (clang, -O0):
<UARTConfigSetExpClk>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
test   %eax,%eax
je     1160 <UARTConfigSetExpClk+0x60>
jmp    112e <UARTConfigSetExpClk+0x2e>
mov    -0x1c(%rbp),%eax
sub    $0x1,%eax
jne    1165 <UARTConfigSetExpClk+0x65>
jmp    113f <UARTConfigSetExpClk+0x3f>
mov    -0x8(%rbp),%eax
imul   $0xd,-0xc(%rbp),%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x34,%eax
mov    %eax,%eax
movl   $0x1,(%rax)
jmp    1184 <UARTConfigSetExpClk+0x84>
jmp    1165 <UARTConfigSetExpClk+0x65>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x4,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x34,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%ecx
and    $0xff,%ecx
mov    -0x4(%rbp),%eax
add    $0x20,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%ecx
and    $0xff00,%ecx
shr    $0x8,%ecx
mov    -0x4(%rbp),%eax
add    $0x24,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
and    $0xff,%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTConfigSetExpClk>:
mov    %edx,%r9d
mov    %esi,%eax
cmp    $0x1,%r8d
jne    111e <UARTConfigSetExpClk+0x1e>
lea    (%r9,%r9,2),%edx
lea    (%r9,%rdx,4),%r9d
lea    0x34(%rdi),%edx
movl   $0x1,(%rdx)
jmp    1128 <UARTConfigSetExpClk+0x28>
shl    $0x4,%r9d
lea    0x34(%rdi),%edx
andl   $0xfffffffe,(%rdx)
xor    %edx,%edx
div    %r9d
movzbl %al,%edx
lea    0x20(%rdi),%esi
mov    %edx,(%rsi)
movzbl %ah,%eax
lea    0x24(%rdi),%edx
mov    %eax,(%rdx)
movzbl %cl,%eax
add    $0xc,%edi
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @UARTConfigSetExpClk(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
store i32 0, i32* %11
%12 = load i32, i32* %10
switch i32 %12, label %23 [
i32 1, label %13
i32 0, label %22
]
13: ; preds = %5
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = mul i32 %15, 13
%17 = udiv i32 %14, %16
store i32 %17, i32* %11
%18 = load i32, i32* %6
%19 = add i32 %18, 52
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 1, i32* %21
br label %34
22: ; preds = %5
br label %23
23: ; preds = %5, %22
%24 = load i32, i32* %7
%25 = load i32, i32* %8
%26 = mul i32 %25, 16
%27 = udiv i32 %24, %26
store i32 %27, i32* %11
%28 = load i32, i32* %6
%29 = add i32 %28, 52
%30 = zext i32 %29 to i64
%31 = inttoptr i64 %30 to i32*
%32 = load volatile i32, i32* %31
%33 = and i32 %32, -2
store volatile i32 %33, i32* %31
br label %34
34: ; preds = %23, %13
%35 = load i32, i32* %11
%36 = and i32 %35, 255
%37 = load i32, i32* %6
%38 = add i32 %37, 32
%39 = zext i32 %38 to i64
%40 = inttoptr i64 %39 to i32*
store volatile i32 %36, i32* %40
%41 = load i32, i32* %11
%42 = and i32 %41, 65280
%43 = lshr i32 %42, 8
%44 = load i32, i32* %6
%45 = add i32 %44, 36
%46 = zext i32 %45 to i64
%47 = inttoptr i64 %46 to i32*
store volatile i32 %43, i32* %47
%48 = load i32, i32* %9
%49 = and i32 %48, 255
%50 = load i32, i32* %6
%51 = add i32 %50, 12
%52 = zext i32 %51 to i64
%53 = inttoptr i64 %52 to i32*
store volatile i32 %49, i32* %53
ret void
}

LLVM IR (-O2):
define void @UARTConfigSetExpClk(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = icmp eq i32 %4, 1
br i1 %6, label %7, label %12
7: ; preds = %5
%8 = mul i32 %2, 13
%9 = add i32 %0, 52
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
store volatile i32 1, i32* %11
br label %19
12: ; preds = %5
%13 = shl i32 %2, 4
%14 = add i32 %0, 52
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = and i32 %17, -2
store volatile i32 %18, i32* %16
br label %19
19: ; preds = %12, %7
%20 = phi i32 [ %8, %7 ], [ %13, %12 ]
%21 = udiv i32 %1, %20
%22 = and i32 %21, 255
%23 = add i32 %0, 32
%24 = zext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
store volatile i32 %22, i32* %25
%26 = lshr i32 %21, 8
%27 = and i32 %26, 255
%28 = add i32 %0, 36
%29 = zext i32 %28 to i64
%30 = inttoptr i64 %29 to i32*
store volatile i32 %27, i32* %30
%31 = and i32 %3, 255
%32 = add i32 %0, 12
%33 = zext i32 %32 to i64
%34 = inttoptr i64 %33 to i32*
store volatile i32 %31, i32* %34
ret void
}