void vchecker1(float x1, float y1, float x2, float y2, float *hcheckerx1,
               float *hcheckery1, float *lcheckerx1, float *lcheckery1) {
  if (y1 > y2) {
    *hcheckerx1 = x1;
    *hcheckery1 = y1;
    *lcheckerx1 = x2;
    *lcheckery1 = y2;
  } else {
    *hcheckerx1 = x2;
    *hcheckery1 = y2;
    *lcheckerx1 = x1;
    *lcheckery1 = y1;
  }
}


x86 assembly (clang, -O0):
<vchecker1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1170 <vchecker1+0x70>
movss  -0x4(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x8(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x28(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x10(%rbp),%xmm0
mov    -0x30(%rbp),%rax
movss  %xmm0,(%rax)
jmp    11a4 <vchecker1+0xa4>
movss  -0xc(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x10(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
mov    -0x28(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x8(%rbp),%xmm0
mov    -0x30(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vchecker1>:
ucomiss %xmm3,%xmm1
movaps %xmm3,%xmm4
cmpltss %xmm1,%xmm4
movaps %xmm4,%xmm5
andps  %xmm0,%xmm5
andnps %xmm2,%xmm4
orps   %xmm5,%xmm4
movaps %xmm1,%xmm5
maxss  %xmm3,%xmm5
ja     1123 <vchecker1+0x23>
movaps %xmm0,%xmm2
minss  %xmm1,%xmm3
movss  %xmm4,(%rdi)
movss  %xmm5,(%rsi)
movss  %xmm2,(%rdx)
movss  %xmm3,(%rcx)
ret

LLVM IR (-O0):
define void @vchecker1(float %0, float %1, float %2, float %3, float* %4, float* %5, float* %6, float* %7) {
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
%13 = alloca float*
%14 = alloca float*
%15 = alloca float*
%16 = alloca float*
store float %0, float* %9
store float %1, float* %10
store float %2, float* %11
store float %3, float* %12
store float* %4, float** %13
store float* %5, float** %14
store float* %6, float** %15
store float* %7, float** %16
%17 = load float, float* %10
%18 = load float, float* %12
%19 = fcmp ogt float %17, %18
br i1 %19, label %20, label %29
20: ; preds = %8
%21 = load float, float* %9
%22 = load float*, float** %13
store float %21, float* %22
%23 = load float, float* %10
%24 = load float*, float** %14
store float %23, float* %24
%25 = load float, float* %11
%26 = load float*, float** %15
store float %25, float* %26
%27 = load float, float* %12
%28 = load float*, float** %16
store float %27, float* %28
br label %38
29: ; preds = %8
%30 = load float, float* %11
%31 = load float*, float** %13
store float %30, float* %31
%32 = load float, float* %12
%33 = load float*, float** %14
store float %32, float* %33
%34 = load float, float* %9
%35 = load float*, float** %15
store float %34, float* %35
%36 = load float, float* %10
%37 = load float*, float** %16
store float %36, float* %37
br label %38
38: ; preds = %29, %20
ret void
}

LLVM IR (-O2):
define void @vchecker1(float %0, float %1, float %2, float %3, float* nocapture writeonly %4, float* nocapture writeonly %5, float* nocapture writeonly %6, float* nocapture writeonly %7) {
%9 = fcmp ogt float %1, %3
%10 = select i1 %9, float %0, float %2
%11 = select i1 %9, float %1, float %3
%12 = select i1 %9, float %2, float %0
%13 = select i1 %9, float %3, float %1
store float %10, float* %4
store float %11, float* %5
store float %12, float* %6
store float %13, float* %7
ret void
}