int local_compensation(int local_code) {
  float tmp, local_temp;
  int comp;
  local_code = local_code / 4;
  local_temp = (float)local_code / 32;
  if (local_temp >= 0 && local_temp <= 5) {
    tmp = (0x0019 * local_temp) / 5;
    comp = tmp;
  } else if (local_temp > 5 && local_temp <= 10) {
    tmp = (0x001A * (local_temp - 5)) / 5 + 0x0019;
    comp = tmp;
  } else if (local_temp > 10 && local_temp <= 20) {
    tmp = (0x0033 * (local_temp - 10)) / 10 + 0x0033;
    comp = tmp;
  } else if (local_temp > 20 && local_temp <= 30) {
    tmp = (0x0034 * (local_temp - 20)) / 10 + 0x0066;
    comp = tmp;
  } else if (local_temp > 30 && local_temp <= 40) {
    tmp = (0x0034 * (local_temp - 30)) / 10 + 0x009A;
    comp = tmp;
  } else if (local_temp > 40 && local_temp <= 50) {
    tmp = (0x0035 * (local_temp - 40)) / 10 + 0x00CE;
    comp = tmp;
  } else if (local_temp > 50 && local_temp <= 60) {
    tmp = (0x0035 * (local_temp - 50)) / 10 + 0x0103;
    comp = tmp;
  } else if (local_temp > 60 && local_temp <= 80) {
    tmp = (0x006A * (local_temp - 60)) / 20 + 0x0138;
    comp = tmp;
  } else if (local_temp > 80 && local_temp <= 125) {
    tmp = (0x00EE * (local_temp - 80)) / 45 + 0x01A2;
    comp = tmp;
  } else {
    comp = 0;
  }
  return comp;
}


x86 assembly (clang, -O0):
<local_compensation>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  0xede(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1179 <local_compensation+0x79>
movss  0xec0(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     1179 <local_compensation+0x79>
movss  0xf02(%rip),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  0xea1(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1520 <local_compensation+0x420>
movss  -0xc(%rbp),%xmm0
movss  0xe7e(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    11e8 <local_compensation+0xe8>
movss  0xe71(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     11e8 <local_compensation+0xe8>
movss  -0xc(%rbp),%xmm1
movss  0xe56(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xea2(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xe3e(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xe86(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    151b <local_compensation+0x41b>
movss  -0xc(%rbp),%xmm0
movss  0xe13(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1257 <local_compensation+0x157>
movss  0xe06(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     1257 <local_compensation+0x157>
movss  -0xc(%rbp),%xmm1
movss  0xdeb(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xe2b(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xdd3(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xe13(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1516 <local_compensation+0x416>
movss  -0xc(%rbp),%xmm0
movss  0xda8(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    12c6 <local_compensation+0x1c6>
movss  0xd9b(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     12c6 <local_compensation+0x1c6>
movss  -0xc(%rbp),%xmm1
movss  0xd80(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xdb4(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xd64(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xda0(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1511 <local_compensation+0x411>
movss  -0xc(%rbp),%xmm0
movss  0xd3d(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1335 <local_compensation+0x235>
movss  0xd30(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     1335 <local_compensation+0x235>
movss  -0xc(%rbp),%xmm1
movss  0xd15(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xd45(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xcf5(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xd29(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    150c <local_compensation+0x40c>
movss  -0xc(%rbp),%xmm0
movss  0xcd2(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    13a4 <local_compensation+0x2a4>
movss  0xcc5(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     13a4 <local_compensation+0x2a4>
movss  -0xc(%rbp),%xmm1
movss  0xcaa(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xcca(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xc86(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xcb6(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1507 <local_compensation+0x407>
movss  -0xc(%rbp),%xmm0
movss  0xc67(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1413 <local_compensation+0x313>
movss  0xc5a(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     1413 <local_compensation+0x313>
movss  -0xc(%rbp),%xmm1
movss  0xc3f(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xc5b(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xc17(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xc3f(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1502 <local_compensation+0x402>
movss  -0xc(%rbp),%xmm0
movss  0xbfc(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1482 <local_compensation+0x382>
movss  0xbef(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     1482 <local_compensation+0x382>
movss  -0xc(%rbp),%xmm1
movss  0xbd4(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xbe4(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xbac(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xbc8(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    14fd <local_compensation+0x3fd>
movss  -0xc(%rbp),%xmm0
movss  0xb91(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    14f1 <local_compensation+0x3f1>
movss  0xb84(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jb     14f1 <local_compensation+0x3f1>
movss  -0xc(%rbp),%xmm1
movss  0xb69(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xb6d(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  0xb5d(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xb4d(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    14f8 <local_compensation+0x3f8>
movl   $0x0,-0x10(%rbp)
jmp    14fd <local_compensation+0x3fd>
jmp    1502 <local_compensation+0x402>
jmp    1507 <local_compensation+0x407>
jmp    150c <local_compensation+0x40c>
jmp    1511 <local_compensation+0x411>
jmp    1516 <local_compensation+0x416>
jmp    151b <local_compensation+0x41b>
jmp    1520 <local_compensation+0x420>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_compensation>:
lea    0x3(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x2,%eax
cvtsi2ss %eax,%xmm0
mulss  0xee9(%rip),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1141 <local_compensation+0x41>
movss  0xedd(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     1141 <local_compensation+0x41>
mulss  0xf48(%rip),%xmm0
divss  0xec8(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xebc(%rip),%xmm0
jbe    117c <local_compensation+0x7c>
movss  0xeb6(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     117c <local_compensation+0x7c>
addss  0xf15(%rip),%xmm0
mulss  0xf11(%rip),%xmm0
divss  0xe95(%rip),%xmm0
addss  0xf05(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xe85(%rip),%xmm0
jbe    11b7 <local_compensation+0xb7>
movss  0xe7f(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     11b7 <local_compensation+0xb7>
addss  0xed2(%rip),%xmm0
movss  0xece(%rip),%xmm1
mulss  %xmm1,%xmm0
divss  0xe5a(%rip),%xmm0
addss  %xmm1,%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xe4e(%rip),%xmm0
jbe    11f2 <local_compensation+0xf2>
movss  0xe48(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     11f2 <local_compensation+0xf2>
addss  0xe8f(%rip),%xmm0
mulss  0xe7f(%rip),%xmm0
divss  0xe23(%rip),%xmm0
addss  0xe7b(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xe17(%rip),%xmm0
jbe    122d <local_compensation+0x12d>
movss  0xe11(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     122d <local_compensation+0x12d>
addss  0xe48(%rip),%xmm0
mulss  0xe44(%rip),%xmm0
divss  0xde8(%rip),%xmm0
addss  0xe38(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xde0(%rip),%xmm0
jbe    1268 <local_compensation+0x168>
movss  0xdda(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     1268 <local_compensation+0x168>
addss  0xe05(%rip),%xmm0
mulss  0xdf5(%rip),%xmm0
divss  0xdad(%rip),%xmm0
addss  0xdf1(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xda9(%rip),%xmm0
jbe    12a0 <local_compensation+0x1a0>
movss  0xda3(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     12a0 <local_compensation+0x1a0>
addss  0xdbe(%rip),%xmm0
mulss  0xdba(%rip),%xmm0
divss  0xd72(%rip),%xmm0
addss  0xdae(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
ucomiss 0xd75(%rip),%xmm0
jbe    12d8 <local_compensation+0x1d8>
movss  0xd6f(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     12d8 <local_compensation+0x1d8>
addss  0xd7a(%rip),%xmm0
mulss  0xd76(%rip),%xmm0
divss  0xd3e(%rip),%xmm0
addss  0xd6a(%rip),%xmm0
jmp    1310 <local_compensation+0x210>
xor    %eax,%eax
ucomiss 0xd3f(%rip),%xmm0
jbe    1314 <local_compensation+0x214>
movss  0xd39(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     1314 <local_compensation+0x214>
addss  0xd30(%rip),%xmm0
mulss  0xd2c(%rip),%xmm0
divss  0xd28(%rip),%xmm0
addss  0xd24(%rip),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @local_compensation(i32 %0) {
%2 = alloca i32
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = sdiv i32 %6, 4
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = sitofp i32 %8 to float
%10 = fdiv float %9, 3.200000e+01
store float %10, float* %4
%11 = load float, float* %4
%12 = fcmp oge float %11, 0.000000e+00
br i1 %12, label %13, label %22
13: ; preds = %1
%14 = load float, float* %4
%15 = fcmp ole float %14, 5.000000e+00
br i1 %15, label %16, label %22
16: ; preds = %13
%17 = load float, float* %4
%18 = fmul float 2.500000e+01, %17
%19 = fdiv float %18, 5.000000e+00
store float %19, float* %3
%20 = load float, float* %3
%21 = fptosi float %20 to i32
store i32 %21, i32* %5
br label %143
22: ; preds = %13, %1
%23 = load float, float* %4
%24 = fcmp ogt float %23, 5.000000e+00
br i1 %24, label %25, label %36
25: ; preds = %22
%26 = load float, float* %4
%27 = fcmp ole float %26, 1.000000e+01
br i1 %27, label %28, label %36
28: ; preds = %25
%29 = load float, float* %4
%30 = fsub float %29, 5.000000e+00
%31 = fmul float 2.600000e+01, %30
%32 = fdiv float %31, 5.000000e+00
%33 = fadd float %32, 2.500000e+01
store float %33, float* %3
%34 = load float, float* %3
%35 = fptosi float %34 to i32
store i32 %35, i32* %5
br label %142
36: ; preds = %25, %22
%37 = load float, float* %4
%38 = fcmp ogt float %37, 1.000000e+01
br i1 %38, label %39, label %50
39: ; preds = %36
%40 = load float, float* %4
%41 = fcmp ole float %40, 2.000000e+01
br i1 %41, label %42, label %50
42: ; preds = %39
%43 = load float, float* %4
%44 = fsub float %43, 1.000000e+01
%45 = fmul float 5.100000e+01, %44
%46 = fdiv float %45, 1.000000e+01
%47 = fadd float %46, 5.100000e+01
store float %47, float* %3
%48 = load float, float* %3
%49 = fptosi float %48 to i32
store i32 %49, i32* %5
br label %141
50: ; preds = %39, %36
%51 = load float, float* %4
%52 = fcmp ogt float %51, 2.000000e+01
br i1 %52, label %53, label %64
53: ; preds = %50
%54 = load float, float* %4
%55 = fcmp ole float %54, 3.000000e+01
br i1 %55, label %56, label %64
56: ; preds = %53
%57 = load float, float* %4
%58 = fsub float %57, 2.000000e+01
%59 = fmul float 5.200000e+01, %58
%60 = fdiv float %59, 1.000000e+01
%61 = fadd float %60, 1.020000e+02
store float %61, float* %3
%62 = load float, float* %3
%63 = fptosi float %62 to i32
store i32 %63, i32* %5
br label %140
64: ; preds = %53, %50
%65 = load float, float* %4
%66 = fcmp ogt float %65, 3.000000e+01
br i1 %66, label %67, label %78
67: ; preds = %64
%68 = load float, float* %4
%69 = fcmp ole float %68, 4.000000e+01
br i1 %69, label %70, label %78
70: ; preds = %67
%71 = load float, float* %4
%72 = fsub float %71, 3.000000e+01
%73 = fmul float 5.200000e+01, %72
%74 = fdiv float %73, 1.000000e+01
%75 = fadd float %74, 1.540000e+02
store float %75, float* %3
%76 = load float, float* %3
%77 = fptosi float %76 to i32
store i32 %77, i32* %5
br label %139
78: ; preds = %67, %64
%79 = load float, float* %4
%80 = fcmp ogt float %79, 4.000000e+01
br i1 %80, label %81, label %92
81: ; preds = %78
%82 = load float, float* %4
%83 = fcmp ole float %82, 5.000000e+01
br i1 %83, label %84, label %92
84: ; preds = %81
%85 = load float, float* %4
%86 = fsub float %85, 4.000000e+01
%87 = fmul float 5.300000e+01, %86
%88 = fdiv float %87, 1.000000e+01
%89 = fadd float %88, 2.060000e+02
store float %89, float* %3
%90 = load float, float* %3
%91 = fptosi float %90 to i32
store i32 %91, i32* %5
br label %138
92: ; preds = %81, %78
%93 = load float, float* %4
%94 = fcmp ogt float %93, 5.000000e+01
br i1 %94, label %95, label %106
95: ; preds = %92
%96 = load float, float* %4
%97 = fcmp ole float %96, 6.000000e+01
br i1 %97, label %98, label %106
98: ; preds = %95
%99 = load float, float* %4
%100 = fsub float %99, 5.000000e+01
%101 = fmul float 5.300000e+01, %100
%102 = fdiv float %101, 1.000000e+01
%103 = fadd float %102, 2.590000e+02
store float %103, float* %3
%104 = load float, float* %3
%105 = fptosi float %104 to i32
store i32 %105, i32* %5
br label %137
106: ; preds = %95, %92
%107 = load float, float* %4
%108 = fcmp ogt float %107, 6.000000e+01
br i1 %108, label %109, label %120
109: ; preds = %106
%110 = load float, float* %4
%111 = fcmp ole float %110, 8.000000e+01
br i1 %111, label %112, label %120
112: ; preds = %109
%113 = load float, float* %4
%114 = fsub float %113, 6.000000e+01
%115 = fmul float 1.060000e+02, %114
%116 = fdiv float %115, 2.000000e+01
%117 = fadd float %116, 3.120000e+02
store float %117, float* %3
%118 = load float, float* %3
%119 = fptosi float %118 to i32
store i32 %119, i32* %5
br label %136
120: ; preds = %109, %106
%121 = load float, float* %4
%122 = fcmp ogt float %121, 8.000000e+01
br i1 %122, label %123, label %134
123: ; preds = %120
%124 = load float, float* %4
%125 = fcmp ole float %124, 1.250000e+02
br i1 %125, label %126, label %134
126: ; preds = %123
%127 = load float, float* %4
%128 = fsub float %127, 8.000000e+01
%129 = fmul float 2.380000e+02, %128
%130 = fdiv float %129, 4.500000e+01
%131 = fadd float %130, 4.180000e+02
store float %131, float* %3
%132 = load float, float* %3
%133 = fptosi float %132 to i32
store i32 %133, i32* %5
br label %135
134: ; preds = %123, %120
store i32 0, i32* %5
br label %135
135: ; preds = %134, %126
br label %136
136: ; preds = %135, %112
br label %137
137: ; preds = %136, %98
br label %138
138: ; preds = %137, %84
br label %139
139: ; preds = %138, %70
br label %140
140: ; preds = %139, %56
br label %141
141: ; preds = %140, %42
br label %142
142: ; preds = %141, %28
br label %143
143: ; preds = %142, %16
%144 = load i32, i32* %5
ret i32 %144
}

LLVM IR (-O2):
define i32 @local_compensation(i32 %0) {
%2 = sdiv i32 %0, 4
%3 = sitofp i32 %2 to float
%4 = fmul float %3, 3.125000e-02
%5 = fcmp oge float %4, 0.000000e+00
%6 = fcmp ole float %4, 5.000000e+00
%7 = and i1 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = fmul float %4, 2.500000e+01
%10 = fdiv float %9, 5.000000e+00
%11 = fptosi float %10 to i32
br label %92
12: ; preds = %1
%13 = fcmp ogt float %4, 5.000000e+00
%14 = fcmp ole float %4, 1.000000e+01
%15 = and i1 %13, %14
br i1 %15, label %16, label %22
16: ; preds = %12
%17 = fadd float %4, -5.000000e+00
%18 = fmul float %17, 2.600000e+01
%19 = fdiv float %18, 5.000000e+00
%20 = fadd float %19, 2.500000e+01
%21 = fptosi float %20 to i32
br label %92
22: ; preds = %12
%23 = fcmp ogt float %4, 1.000000e+01
%24 = fcmp ole float %4, 2.000000e+01
%25 = and i1 %23, %24
br i1 %25, label %26, label %32
26: ; preds = %22
%27 = fadd float %4, -1.000000e+01
%28 = fmul float %27, 5.100000e+01
%29 = fdiv float %28, 1.000000e+01
%30 = fadd float %29, 5.100000e+01
%31 = fptosi float %30 to i32
br label %92
32: ; preds = %22
%33 = fcmp ogt float %4, 2.000000e+01
%34 = fcmp ole float %4, 3.000000e+01
%35 = and i1 %33, %34
br i1 %35, label %36, label %42
36: ; preds = %32
%37 = fadd float %4, -2.000000e+01
%38 = fmul float %37, 5.200000e+01
%39 = fdiv float %38, 1.000000e+01
%40 = fadd float %39, 1.020000e+02
%41 = fptosi float %40 to i32
br label %92
42: ; preds = %32
%43 = fcmp ogt float %4, 3.000000e+01
%44 = fcmp ole float %4, 4.000000e+01
%45 = and i1 %43, %44
br i1 %45, label %46, label %52
46: ; preds = %42
%47 = fadd float %4, -3.000000e+01
%48 = fmul float %47, 5.200000e+01
%49 = fdiv float %48, 1.000000e+01
%50 = fadd float %49, 1.540000e+02
%51 = fptosi float %50 to i32
br label %92
52: ; preds = %42
%53 = fcmp ogt float %4, 4.000000e+01
%54 = fcmp ole float %4, 5.000000e+01
%55 = and i1 %53, %54
br i1 %55, label %56, label %62
56: ; preds = %52
%57 = fadd float %4, -4.000000e+01
%58 = fmul float %57, 5.300000e+01
%59 = fdiv float %58, 1.000000e+01
%60 = fadd float %59, 2.060000e+02
%61 = fptosi float %60 to i32
br label %92
62: ; preds = %52
%63 = fcmp ogt float %4, 5.000000e+01
%64 = fcmp ole float %4, 6.000000e+01
%65 = and i1 %63, %64
br i1 %65, label %66, label %72
66: ; preds = %62
%67 = fadd float %4, -5.000000e+01
%68 = fmul float %67, 5.300000e+01
%69 = fdiv float %68, 1.000000e+01
%70 = fadd float %69, 2.590000e+02
%71 = fptosi float %70 to i32
br label %92
72: ; preds = %62
%73 = fcmp ogt float %4, 6.000000e+01
%74 = fcmp ole float %4, 8.000000e+01
%75 = and i1 %73, %74
br i1 %75, label %76, label %82
76: ; preds = %72
%77 = fadd float %4, -6.000000e+01
%78 = fmul float %77, 1.060000e+02
%79 = fdiv float %78, 2.000000e+01
%80 = fadd float %79, 3.120000e+02
%81 = fptosi float %80 to i32
br label %92
82: ; preds = %72
%83 = fcmp ogt float %4, 8.000000e+01
%84 = fcmp ole float %4, 1.250000e+02
%85 = and i1 %83, %84
br i1 %85, label %86, label %92
86: ; preds = %82
%87 = fadd float %4, -8.000000e+01
%88 = fmul float %87, 2.380000e+02
%89 = fdiv float %88, 4.500000e+01
%90 = fadd float %89, 4.180000e+02
%91 = fptosi float %90 to i32
br label %92
92: ; preds = %82, %16, %36, %56, %76, %86, %66, %46, %26, %8
%93 = phi i32 [ %11, %8 ], [ %21, %16 ], [ %31, %26 ], [ %41, %36 ], [ %51, %46 ], [ %61, %56 ], [ %71, %66 ], [ %81, %76 ], [ %91, %86 ], [ 0, %82 ]
ret i32 %93
}