xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned char);
const char *ip_sprintf_short(const unsigned int ip) {
  static char ipbuf[5];
  unsigned char *cip = (unsigned char *)&ip;
  sprintf(ipbuf, ".%d", cip[3]);
  return ipbuf;
}


x86 assembly (clang, -O0):
<ip_sprintf_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
lea    0x2efb(%rip),%rdi
lea    0xecb(%rip),%rsi
movzbl 0x3(%rax),%edx
call   1030 <sprintf@plt>
lea    0x2ee4(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_sprintf_short>:
push   %rbx
mov    %edi,%edx
shr    $0x18,%edx
lea    0x2f0c(%rip),%rbx
lea    0xedc(%rip),%rsi
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@ip_sprintf_short.ipbuf = internal global [5 x i8] zeroinitializer
@.str = [4 x i8] c".%d\00"
define i8* @ip_sprintf_short(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = bitcast i32* %2 to i8*
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 3
%7 = load i8, i8* %6
%8 = call i32 @sprintf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @ip_sprintf_short.ipbuf, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %7)
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @ip_sprintf_short.ipbuf, i64 0, i64 0)
}

LLVM IR (-O2):
@ip_sprintf_short.ipbuf = internal global [5 x i8] zeroinitializer
@.str = [4 x i8] c".%d\00"
define i8* @ip_sprintf_short(i32 %0) {
%2 = lshr i32 %0, 24
%3 = trunc i32 %2 to i8
%4 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @ip_sprintf_short.ipbuf, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @ip_sprintf_short.ipbuf, i64 0, i64 0)
}
char *hash_plugin_summary(void) {
  return ("truecrypt \tTrueCrypt encrypted block device plugin");
}


x86 assembly (clang, -O0):
<hash_plugin_summary>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_summary>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [51 x i8] c"truecrypt \09TrueCrypt encrypted block device plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [51 x i8] c"truecrypt \09TrueCrypt encrypted block device plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ GL_COLOR_BUFFER_BIT;
int /*<<< orphan*/ glClear(int /*<<< orphan*/);
int /*<<< orphan*/ glClearColor(int /*<<< orphan*/, int, int /*<<< orphan*/,
                                int);
int /*<<< orphan*/ glutSwapBuffers();
int /*<<< orphan*/ write_and_read_timerqueries();
void draw() {
  glClearColor(0, 1, 0, 1);
  glClear(GL_COLOR_BUFFER_BIT);
  write_and_read_timerqueries();
  glutSwapBuffers();
}


x86 assembly (clang, -O0):
<draw>:
push   %rbp
mov    %rsp,%rbp
xor    %edx,%edx
mov    $0x1,%ecx
mov    %edx,%edi
mov    %ecx,%esi
call   1050 <glClearColor@plt>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
mov    $0x0,%al
call   1060 <write_and_read_timerqueries@plt>
mov    $0x0,%al
call   1040 <glutSwapBuffers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1050 <glClearColor@plt>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
xor    %eax,%eax
call   1060 <write_and_read_timerqueries@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <glutSwapBuffers@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @draw() {
%1 = call i32 @glClearColor(i32 0, i32 1, i32 0, i32 1)
%2 = load i32, i32* @GL_COLOR_BUFFER_BIT
%3 = call i32 @glClear(i32 %2)
%4 = call i32 (...) @write_and_read_timerqueries()
%5 = call i32 (...) @glutSwapBuffers()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @draw() {
%1 = tail call i32 @glClearColor(i32 0, i32 1, i32 0, i32 1)
%2 = load i32, i32* @GL_COLOR_BUFFER_BIT
%3 = tail call i32 @glClear(i32 %2)
%4 = tail call i32 (...) @write_and_read_timerqueries()
%5 = tail call i32 (...) @glutSwapBuffers()
ret void
}
int btic1h_subfold(int a, int b) {
  int c;
  c = a - b;
  c = (c << 1) ^ (c >> 31);
  return (c);
}


x86 assembly (clang, -O0):
<btic1h_subfold>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    -0xc(%rbp),%ecx
sar    $0x1f,%ecx
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<btic1h_subfold>:
sub    %esi,%edi
lea    (%rdi,%rdi,1),%eax
sar    $0x1f,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @btic1h_subfold(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = shl i32 %9, 1
%11 = load i32, i32* %5
%12 = ashr i32 %11, 31
%13 = xor i32 %10, %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @btic1h_subfold(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
%4 = shl i32 %3, 1
%5 = ashr i32 %3, 31
%6 = xor i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ ot(char *);
defstorage() { ot("DS "); }


x86 assembly (clang, -O0):
<defstorage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ot@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defstorage>:
lea    0xee9(%rip),%rdi
jmp    1030 <ot@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"DS \00"
define i32 @defstorage() {
%1 = alloca i32
%2 = call i32 @ot(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [4 x i8] c"DS \00"
define i32 @defstorage() {
%1 = tail call i32 @ot(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ GL_PROJECTION;
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ glMatrixMode(int /*<<< orphan*/);
int /*<<< orphan*/ glOrtho(int, int, int, int, int, int);
void init(void) {
  glMatrixMode(GL_PROJECTION);
  glLoadIdentity();
  glOrtho(-1, 1, -1, 1, -1, 1);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1050 <glLoadIdentity@plt>
mov    $0xffffffff,%r8d
mov    $0x1,%r9d
mov    %r8d,%edi
mov    %r9d,%esi
mov    %r8d,%edx
mov    %r9d,%ecx
call   1040 <glOrtho@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
call   1050 <glLoadIdentity@plt>
mov    $0xffffffff,%edi
mov    $0x1,%esi
mov    $0xffffffff,%edx
mov    $0x1,%ecx
mov    $0xffffffff,%r8d
mov    $0x1,%r9d
pop    %rax
jmp    1040 <glOrtho@plt>

LLVM IR (-O0):
@GL_PROJECTION = global i32 0
define void @init() {
%1 = load i32, i32* @GL_PROJECTION
%2 = call i32 @glMatrixMode(i32 %1)
%3 = call i32 (...) @glLoadIdentity()
%4 = call i32 @glOrtho(i32 -1, i32 1, i32 -1, i32 1, i32 -1, i32 1)
ret void
}

LLVM IR (-O2):
@GL_PROJECTION = global i32 0
define void @init() {
%1 = load i32, i32* @GL_PROJECTION
%2 = tail call i32 @glMatrixMode(i32 %1)
%3 = tail call i32 (...) @glLoadIdentity()
%4 = tail call i32 @glOrtho(i32 -1, i32 1, i32 -1, i32 1, i32 -1, i32 1)
ret void
}
long Q_ftol(float f) { return (long)f; }


x86 assembly (clang, -O0):
<Q_ftol>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_ftol>:
cvttss2si %xmm0,%rax
ret

LLVM IR (-O0):
define i64 @Q_ftol(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fptosi float %3 to i64
ret i64 %4
}

LLVM IR (-O2):
define i64 @Q_ftol(float %0) {
%2 = fptosi float %0 to i64
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ lagrange(int *, float *, int, int, float *);
float sdc_interp(int *t, float *d, int n, int time) {
  float y;
  lagrange(t, d, n, time, &y);
  return (y);
}


x86 assembly (clang, -O0):
<sdc_interp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
lea    -0x1c(%rbp),%r8
call   1030 <lagrange@plt>
movss  -0x1c(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdc_interp>:
push   %rax
lea    0x4(%rsp),%r8
call   1030 <lagrange@plt>
movss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @sdc_interp(i32* %0, float* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca float*
%7 = alloca i32
%8 = alloca i32
%9 = alloca float
store i32* %0, i32** %5
store float* %1, float** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32*, i32** %5
%11 = load float*, float** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @lagrange(i32* %10, float* %11, i32 %12, i32 %13, float* %9)
%15 = load float, float* %9
ret float %15
}

LLVM IR (-O2):
define float @sdc_interp(i32* %0, float* %1, i32 %2, i32 %3) {
%5 = alloca float
%6 = bitcast float* %5 to i8*
%7 = call i32 @lagrange(i32* %0, float* %1, i32 %2, i32 %3, float* %5)
%8 = load float, float* %5
ret float %8
}
/* Variables and functions */
int __semi_call(int, int *);
int semi_close(int fd) { return __semi_call(2, &fd); }


x86 assembly (clang, -O0):
<semi_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2,%edi
lea    -0x4(%rbp),%rsi
call   1030 <__semi_call@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semi_close>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x2,%edi
call   1030 <__semi_call@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @semi_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @__semi_call(i32 2, i32* %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @semi_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @__semi_call(i32 2, i32* %2)
ret i32 %3
}
unsigned getval_266() { return 3284633930U; }


x86 assembly (clang, -O0):
<getval_266>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc3c7894a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getval_266>:
mov    $0xc3c7894a,%eax
ret

LLVM IR (-O0):
define i32 @getval_266() {
ret i32 -1010333366
}

LLVM IR (-O2):
define i32 @getval_266() {
ret i32 -1010333366
}
/* Variables and functions */
int /*<<< orphan*/ bitmap_free(void *);
void BitmapFree(void *value) { bitmap_free(value); }


x86 assembly (clang, -O0):
<BitmapFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bitmap_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BitmapFree>:
jmp    1030 <bitmap_free@plt>

LLVM IR (-O0):
define void @BitmapFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @bitmap_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @BitmapFree(i8* %0) {
%2 = tail call i32 @bitmap_free(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
void weak_update_malloc_Bad() {
  int a[10];
  int *x = (int *)malloc(sizeof(int) * 2);
  x[0] = 0;
  x[1] = 10;
  a[x[1]] = 0;
}


x86 assembly (clang, -O0):
<weak_update_malloc_Bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x38(%rbp),%rax
movl   $0xa,0x4(%rax)
mov    -0x38(%rbp),%rax
movslq 0x4(%rax),%rax
movl   $0x0,-0x30(%rbp,%rax,4)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<weak_update_malloc_Bad>:
push   %rax
mov    $0x8,%edi
call   1030 <malloc@plt>
movabs $0xa00000000,%rcx
mov    %rcx,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @weak_update_malloc_Bad() {
%1 = alloca [10 x i32]
%2 = alloca i32*
%3 = call i64 @malloc(i32 8)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 0, i32* %6
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
store i32 10, i32* %8
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 %12
store i32 0, i32* %13
ret void
}

LLVM IR (-O2):
define void @weak_update_malloc_Bad() {
%1 = tail call i64 @malloc(i32 8)
%2 = inttoptr i64 %1 to i32*
store i32 0, i32* %2
%3 = getelementptr inbounds i32, i32* %2, i64 1
store i32 10, i32* %3
ret void
}
float fmodf(float x, float div) { return __builtin_fmodf(x, div); }


x86 assembly (clang, -O0):
<fmodf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <fmodf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmodf>:
jmp    1100 <fmodf>

LLVM IR (-O0):
define float @fmodf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @fmodf(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @fmodf(float %0, float %1) {
br label %3
3: ; preds = %3, %2
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ I200M_ResetMotionTimer();
void N_ResetMotionTimer() {
  I200M_ResetMotionTimer();
  return;
}


x86 assembly (clang, -O0):
<N_ResetMotionTimer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <I200M_ResetMotionTimer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<N_ResetMotionTimer>:
xor    %eax,%eax
jmp    1030 <I200M_ResetMotionTimer@plt>

LLVM IR (-O0):
define void @N_ResetMotionTimer() {
%1 = call i32 (...) @I200M_ResetMotionTimer()
ret void
}

LLVM IR (-O2):
define void @N_ResetMotionTimer() {
%1 = tail call i32 (...) @I200M_ResetMotionTimer()
ret void
}
int Operand_br_encode(unsigned int *valp) {
  int error;
  error = (*valp & ~0xf) != 0;
  return error;
}


x86 assembly (clang, -O0):
<Operand_br_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xfffffff0,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_br_encode>:
xor    %eax,%eax
cmpl   $0x10,(%rdi)
setae  %al
ret

LLVM IR (-O0):
define i32 @Operand_br_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = and i32 %5, -16
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @Operand_br_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp ugt i32 %2, 15
%4 = zext i1 %3 to i32
ret i32 %4
}
int do_display_effect(int effect) { return 0; }


x86 assembly (clang, -O0):
<do_display_effect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_display_effect>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @do_display_effect(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @do_display_effect(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int p1(void) {
  foo();
  return 1;
}


x86 assembly (clang, -O0):
<p1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<p1>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @p1() {
%1 = call i32 (...) @foo()
ret i32 1
}

LLVM IR (-O2):
define i32 @p1() {
%1 = tail call i32 (...) @foo()
ret i32 1
}
int g_is_higherorequal_f(float s, float d) { return (s >= d); }


x86 assembly (clang, -O0):
<g_is_higherorequal_f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_is_higherorequal_f>:
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @g_is_higherorequal_f(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp oge float %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @g_is_higherorequal_f(float %0, float %1) {
%3 = fcmp oge float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("\nusage: multiraw [-enatvoh] /path/to/file\n\n");
  printf("-e\tCommand Line Options to pass to dcraw-m, example: -e '-e -R' "
         "\n-n\tNumber of Threads\n-a\tAutomatically determine number of "
         "threads\n-t\tReport Exec Time (secs)\n-v\tVerbose Messages\n-o\tUse "
         "original dcraw\n-h\tHelp\n\n\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf05(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf07(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"\0Ausage: multiraw [-enatvoh] /path/to/file\0A\0A\00"
@.str.1 = [211 x i8] c"-e\09Command Line Options to pass to dcraw-m, example: -e '-e -R' \0A-n\09Number of Threads\0A-a\09Automatically determine number of threads\0A-t\09Report Exec Time (secs)\0A-v\09Verbose Messages\0A-o\09Use original dcraw\0A-h\09Help\0A\0A\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([211 x i8], [211 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [43 x i8] c"\0Ausage: multiraw [-enatvoh] /path/to/file\0A\00"
@str.2 = [210 x i8] c"-e\09Command Line Options to pass to dcraw-m, example: -e '-e -R' \0A-n\09Number of Threads\0A-a\09Automatically determine number of threads\0A-t\09Report Exec Time (secs)\0A-v\09Verbose Messages\0A-o\09Use original dcraw\0A-h\09Help\0A\0A\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([210 x i8], [210 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, int *);
void get_command_line_arg_as_int(int *variable, char *cli_input) {
  sscanf(cli_input, "%d", variable);
}


x86 assembly (clang, -O0):
<get_command_line_arg_as_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <sscanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_command_line_arg_as_int>:
mov    %rsi,%rax
mov    %rdi,%rdx
lea    0xee3(%rip),%rsi
mov    %rax,%rdi
jmp    1030 <sscanf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @get_command_line_arg_as_int(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32*, i32** %3
%7 = call i32 @sscanf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @get_command_line_arg_as_int(i32* %0, i8* nocapture %1) {
%3 = tail call i32 @sscanf(i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %0)
ret void
}
/* Variables and functions */
int mkdir(char const *, int);
int makedir(const char *dir) { return mkdir(dir, 0777); }


x86 assembly (clang, -O0):
<makedir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1ff,%esi
call   1030 <mkdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makedir>:
mov    $0x1ff,%esi
jmp    1030 <mkdir@plt>

LLVM IR (-O0):
define i32 @makedir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @mkdir(i8* %3, i32 511)
ret i32 %4
}

LLVM IR (-O2):
define i32 @makedir(i8* nocapture %0) {
%2 = tail call i32 @mkdir(i8* %0, i32 511)
ret i32 %2
}
void d2i_POLICYINFO(void) {}


x86 assembly (clang, -O0):
<d2i_POLICYINFO>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_POLICYINFO>:
ret

LLVM IR (-O0):
define void @d2i_POLICYINFO() {
ret void
}

LLVM IR (-O2):
define void @d2i_POLICYINFO() {
ret void
}
void gtk_misc_get_type() {}


x86 assembly (clang, -O0):
<gtk_misc_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_misc_get_type>:
ret

LLVM IR (-O0):
define void @gtk_misc_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_misc_get_type() {
ret void
}
int s39ini_remove() { return 0; }


x86 assembly (clang, -O0):
<s39ini_remove>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s39ini_remove>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @s39ini_remove() {
ret i32 0
}

LLVM IR (-O2):
define i32 @s39ini_remove() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int string_is_oneof(char *s, char **ss) {
  while (*ss) {
    if (!strcmp(s, *ss))
      return 1;
    ss++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<string_is_oneof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpq   $0x0,(%rax)
je     1164 <string_is_oneof+0x54>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
jne    1153 <string_is_oneof+0x43>
movl   $0x1,-0x4(%rbp)
jmp    116b <string_is_oneof+0x5b>
mov    -0x18(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x18(%rbp)
jmp    1120 <string_is_oneof+0x10>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_is_oneof>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    (%rsi),%rsi
xor    %r14d,%r14d
test   %rsi,%rsi
je     1150 <string_is_oneof+0x40>
mov    %rdi,%rbp
add    $0x8,%rbx
nopl   0x0(%rax)
mov    %rbp,%rdi
call   1030 <strcmp@plt>
test   %eax,%eax
je     114a <string_is_oneof+0x3a>
mov    (%rbx),%rsi
add    $0x8,%rbx
test   %rsi,%rsi
jne    1130 <string_is_oneof+0x20>
jmp    1150 <string_is_oneof+0x40>
mov    $0x1,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @string_is_oneof(i8* %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %17, %2
%7 = load i8**, i8*** %5
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8**, i8*** %5
%13 = load i8*, i8** %12
%14 = call i32 @strcmp(i8* %11, i8* %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %10
store i32 1, i32* %3
br label %21
17: ; preds = %10
%18 = load i8**, i8*** %5
%19 = getelementptr inbounds i8*, i8** %18, i32 1
store i8** %19, i8*** %5
br label %6
20: ; preds = %6
store i32 0, i32* %3
br label %21
21: ; preds = %20, %16
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @string_is_oneof(i8* nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = icmp eq i8* %3, null
br i1 %4, label %14, label %8
5: ; preds = %8
%6 = load i8*, i8** %13
%7 = icmp eq i8* %6, null
br i1 %7, label %14, label %8
8: ; preds = %2, %5
%9 = phi i8* [ %6, %5 ], [ %3, %2 ]
%10 = phi i8** [ %13, %5 ], [ %1, %2 ]
%11 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* %9)
%12 = icmp eq i32 %11, 0
%13 = getelementptr inbounds i8*, i8** %10, i64 1
br i1 %12, label %14, label %5
14: ; preds = %8, %5, %2
%15 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %8 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ EOPNOTSUPP;
int /*<<< orphan*/ errno;
int set_rcvtimeo(int fd, void *optval, int optlen) {
  errno = EOPNOTSUPP;
  return -1;
}


x86 assembly (clang, -O0):
<set_rcvtimeo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_rcvtimeo>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EOPNOTSUPP = global i32 0
@errno = global i32 0
define i32 @set_rcvtimeo(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @EOPNOTSUPP
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EOPNOTSUPP = global i32 0
@errno = global i32 0
define i32 @set_rcvtimeo(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = load i32, i32* @EOPNOTSUPP
store i32 %4, i32* @errno
ret i32 -1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
unsigned int umul16_hi(unsigned short a, unsigned short b) {
  uint32_t c;
  c = a * b;
  return (c >> 16) & 0xffff;
}


x86 assembly (clang, -O0):
<umul16_hi>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
movzwl -0x4(%rbp),%ecx
imul   %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x10,%eax
and    $0xffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umul16_hi>:
mov    %edi,%eax
imul   %esi,%eax
shr    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @umul16_hi(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i32
store i16 %0, i16* %3
store i16 %1, i16* %4
%6 = load i16, i16* %3
%7 = zext i16 %6 to i32
%8 = load i16, i16* %4
%9 = zext i16 %8 to i32
%10 = mul nsw i32 %7, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = ashr i32 %11, 16
%13 = and i32 %12, 65535
ret i32 %13
}

LLVM IR (-O2):
define i32 @umul16_hi(i16 zeroext %0, i16 zeroext %1) {
%3 = zext i16 %0 to i32
%4 = zext i16 %1 to i32
%5 = mul nuw nsw i32 %4, %3
%6 = lshr i32 %5, 16
ret i32 %6
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ attributes;
};
struct TYPE_4__ {
  TYPE_1__ max_bounds;
};
typedef TYPE_2__ XFontStruct;

/* Variables and functions */
unsigned short get_XFontStruct_max_bounds_attributes(void *_p) {
  return (unsigned short)((XFontStruct *)_p)->max_bounds.attributes;
}


x86 assembly (clang, -O0):
<get_XFontStruct_max_bounds_attributes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XFontStruct_max_bounds_attributes>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define zeroext i16 @get_XFontStruct_max_bounds_attributes(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i16
ret i16 %8
}

LLVM IR (-O2):
define zeroext i16 @get_XFontStruct_max_bounds_attributes(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i16
ret i16 %4
}
/* Variables and functions */
int fegetround();
int get_fpu_rounding_mode(void) {
  int rnd_mode;
  rnd_mode = fegetround();
  switch (rnd_mode) {
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<get_fpu_rounding_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1030 <fegetround@plt>
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fpu_rounding_mode>:
push   %rax
xor    %eax,%eax
call   1030 <fegetround@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_fpu_rounding_mode() {
%1 = alloca i32
%2 = call i32 (...) @fegetround()
store i32 %2, i32* %1
%3 = load i32, i32* %1
switch i32 %3, label %4 [
]
4: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @get_fpu_rounding_mode() {
%1 = tail call i32 (...) @fegetround()
ret i32 0
}
void inc(const void *x, unsigned int *n) { *n += 1; }


x86 assembly (clang, -O0):
<inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc>:
addl   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @inc(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = add i32 %6, 1
store i32 %7, i32* %5
ret void
}

LLVM IR (-O2):
define void @inc(i8* nocapture readnone %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = add i32 %3, 1
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int voltearBits(unsigned char const);
unsigned char getNs(unsigned int tam, const unsigned char *tr) {
  if (tam < 4)
    return voltearBits(tr[16]) & 112;
  else
    return voltearBits(tr[17]) & 127;
}


x86 assembly (clang, -O0):
<getNs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x4,-0x8(%rbp)
jae    1141 <getNs+0x31>
mov    -0x10(%rbp),%rax
movzbl 0x10(%rax),%edi
call   1030 <voltearBits@plt>
and    $0x70,%eax
mov    %al,-0x1(%rbp)
jmp    1154 <getNs+0x44>
mov    -0x10(%rbp),%rax
movzbl 0x11(%rax),%edi
call   1030 <voltearBits@plt>
and    $0x7f,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNs>:
push   %rbx
cmp    $0x4,%edi
sbb    $0x0,%rsi
cmp    $0x4,%edi
mov    $0x70,%eax
mov    $0x7f,%ebx
cmovb  %eax,%ebx
movzbl 0x11(%rsi),%edi
call   1030 <voltearBits@plt>
and    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @getNs(i32 %0, i8* %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = icmp ult i32 %6, 4
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i64 16
%11 = load i8, i8* %10
%12 = call i32 @voltearBits(i8 zeroext %11)
%13 = and i32 %12, 112
%14 = trunc i32 %13 to i8
store i8 %14, i8* %3
br label %22
15: ; preds = %2
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i64 17
%18 = load i8, i8* %17
%19 = call i32 @voltearBits(i8 zeroext %18)
%20 = and i32 %19, 127
%21 = trunc i32 %20 to i8
store i8 %21, i8* %3
br label %22
22: ; preds = %15, %8
%23 = load i8, i8* %3
ret i8 %23
}

LLVM IR (-O2):
define zeroext i8 @getNs(i32 %0, i8* nocapture %1) {
%3 = icmp ult i32 %0, 4
%4 = select i1 %3, i64 16, i64 17
%5 = select i1 %3, i8 112, i8 127
%6 = getelementptr inbounds i8, i8* %1, i64 %4
%7 = load i8, i8* %6
%8 = tail call i32 @voltearBits(i8 zeroext %7)
%9 = trunc i32 %8 to i8
%10 = and i8 %5, %9
ret i8 %10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xb4() {
  Assert_real((isspace(180) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              905, ("isspace should be 0 for 0xb4"));
}


x86 assembly (clang, -O0):
<t_isspace_0xb4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb4,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x389,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xb4>:
push   %rax
mov    $0xb4,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x389,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xb4\00"
define void @t_isspace_0xb4() {
%1 = call i64 @isspace(i32 180)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 905, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xb4\00"
define void @t_isspace_0xb4() {
%1 = tail call i64 @isspace(i32 180)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 905, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mpop();
int /*<<< orphan*/ pexec(int /*<<< orphan*/);
void exec() { pexec(mpop()); }


x86 assembly (clang, -O0):
<exec>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mpop@plt>
mov    %eax,%edi
call   1040 <pexec@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec>:
push   %rax
xor    %eax,%eax
call   1030 <mpop@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <pexec@plt>

LLVM IR (-O0):
define void @exec() {
%1 = call i32 (...) @mpop()
%2 = call i32 @pexec(i32 %1)
ret void
}

LLVM IR (-O2):
define void @exec() {
%1 = tail call i32 (...) @mpop()
%2 = tail call i32 @pexec(i32 %1)
ret void
}
int sizeof_eval_good(void) {
  int a = 4;
  int b = sizeof(a);
  char c[2];
  if (a % 4) {
    return a / 0;
  }
  if (b % sizeof(a)) {
    return a / 0;
  }
  if (sizeof(c) > 2) {
    return a / 0;
  }
  if ((sizeof(c) / sizeof(c[0])) != 2) {
    return a / 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<sizeof_eval_good>:
push   %rbp
mov    %rsp,%rbp
movl   $0x4,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1136 <sizeof_eval_good+0x36>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    115f <sizeof_eval_good+0x5f>
movslq -0xc(%rbp),%rax
and    $0x3,%rax
cmp    $0x0,%rax
je     1158 <sizeof_eval_good+0x58>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    115f <sizeof_eval_good+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeof_eval_good>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sizeof_eval_good() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [2 x i8]
store i32 4, i32* %2
store i32 4, i32* %3
%5 = load i32, i32* %2
%6 = srem i32 %5, 4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = load i32, i32* %2
%10 = sdiv i32 %9, 0
store i32 %10, i32* %1
br label %20
11: ; preds = %0
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = urem i64 %13, 4
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i32, i32* %2
%18 = sdiv i32 %17, 0
store i32 %18, i32* %1
br label %20
19: ; preds = %11
store i32 0, i32* %1
br label %20
20: ; preds = %19, %16, %8
%21 = load i32, i32* %1
ret i32 %21
}

LLVM IR (-O2):
define i32 @sizeof_eval_good() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ synchronize_sched_expedited();
void synchronize_rcu_expedited(void) { synchronize_sched_expedited(); }


x86 assembly (clang, -O0):
<synchronize_rcu_expedited>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <synchronize_sched_expedited@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<synchronize_rcu_expedited>:
xor    %eax,%eax
jmp    1030 <synchronize_sched_expedited@plt>

LLVM IR (-O0):
define void @synchronize_rcu_expedited() {
%1 = call i32 (...) @synchronize_sched_expedited()
ret void
}

LLVM IR (-O2):
define void @synchronize_rcu_expedited() {
%1 = tail call i32 (...) @synchronize_sched_expedited()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glRasterPos2i(int /*<<< orphan*/, int /*<<< orphan*/);
void RasterPos2i(GLint x, GLint y) { glRasterPos2i(x, y); }


x86 assembly (clang, -O0):
<RasterPos2i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <glRasterPos2i@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterPos2i>:
jmp    1030 <glRasterPos2i@plt>

LLVM IR (-O0):
define void @RasterPos2i(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @glRasterPos2i(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @RasterPos2i(i32 %0, i32 %1) {
%3 = tail call i32 @glRasterPos2i(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
unsigned long long ULLONG_MAX;
unsigned long long dsum(unsigned long long);
unsigned long long int s(unsigned long long int n) {
  for (unsigned long long int i = 0; i < ULLONG_MAX; ++i) {
    if (dsum(i) == n)
      return i;
  }
  return 0;
}


x86 assembly (clang, -O0):

:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x2eb9(%rip),%rcx
cmp    (%rcx),%rax
jae    116e <s+0x5e>
mov    -0x18(%rbp),%rdi
call   1030 <dsum@plt>
cmp    -0x10(%rbp),%rax
jne    1158 <s+0x48>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1176 <s+0x66>
jmp    115d <s+0x4d>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1124 <s+0x14>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):

:
push   %r15
push   %r14
push   %rbx
mov    0x2ecc(%rip),%r15
cmpq   $0x0,(%r15)
je     1146 <s+0x36>
mov    %rdi,%r14
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <dsum@plt>
cmp    %r14,%rax
je     1148 <s+0x38>
add    $0x1,%rbx
cmp    (%r15),%rbx
jb     1130 <s+0x20>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@ULLONG_MAX = global i64 0
define i64 @s(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 0, i64* %4
br label %5
5: ; preds = %17, %1
%6 = load i64, i64* %4
%7 = load i64, i64* @ULLONG_MAX
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i64, i64* %4
%11 = call i64 @dsum(i64 %10)
%12 = load i64, i64* %3
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = load i64, i64* %4
store i64 %15, i64* %2
br label %21
16: ; preds = %9
br label %17
17: ; preds = %16
%18 = load i64, i64* %4
%19 = add i64 %18, 1
store i64 %19, i64* %4
br label %5
20: ; preds = %5
store i64 0, i64* %2
br label %21
21: ; preds = %20, %14
%22 = load i64, i64* %2
ret i64 %22
}

LLVM IR (-O2):
@ULLONG_MAX = global i64 0
define i64 @s(i64 %0) {
%2 = load i64, i64* @ULLONG_MAX
%3 = icmp eq i64 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %8
%5 = phi i64 [ %9, %8 ], [ 0, %1 ]
%6 = tail call i64 @dsum(i64 %5)
%7 = icmp eq i64 %6, %0
br i1 %7, label %12, label %8
8: ; preds = %4
%9 = add nuw i64 %5, 1
%10 = load i64, i64* @ULLONG_MAX
%11 = icmp ult i64 %9, %10
br i1 %11, label %4, label %12
12: ; preds = %8, %4, %1
%13 = phi i64 [ 0, %1 ], [ %5, %4 ], [ 0, %8 ]
ret i64 %13
}
int foo(double bar) { return (int)bar; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @foo(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fptosi double %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo(double %0) {
%2 = fptosi double %0 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(void const *);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *smalloc(size_t);
void *memdup(const void *ptr, size_t len, size_t esz) {
  void *dup = smalloc(len * esz);
  assert(ptr);
  memcpy(dup, ptr, len * esz);
  return dup;
}


x86 assembly (clang, -O0):
<memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
imul   -0x18(%rbp),%rdi
call   1050 <smalloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
imul   -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rdi,%r14
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1050 <smalloc@plt>
mov    %rax,%r15
mov    %r14,%rdi
call   1030 <assert@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1040 <memcpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @memdup(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = mul i64 %8, %9
%11 = call i8* @smalloc(i64 %10)
store i8* %11, i8** %7
%12 = load i8*, i8** %4
%13 = call i32 @assert(i8* %12)
%14 = load i8*, i8** %7
%15 = load i8*, i8** %4
%16 = load i64, i64* %5
%17 = load i64, i64* %6
%18 = mul i64 %16, %17
%19 = call i32 @memcpy(i8* %14, i8* %15, i64 %18)
%20 = load i8*, i8** %7
ret i8* %20
}

LLVM IR (-O2):
define i8* @memdup(i8* %0, i64 %1, i64 %2) {
%4 = mul i64 %2, %1
%5 = tail call i8* @smalloc(i64 %4)
%6 = tail call i32 @assert(i8* %0)
%7 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void HMM_fatal(char *s) {
  fprintf(stderr, s);
  exit(-1);
}


x86 assembly (clang, -O0):
<HMM_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<HMM_fatal>:
push   %rax
mov    %rdi,%rsi
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @HMM_fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
%6 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
define void @HMM_fatal(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
%4 = tail call i32 @exit(i32 -1)
unreachable
}
int hash(int val, int nslots) { return (val % nslots); }


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hash(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @hash(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
/* Variables and functions */
bool nrf53_errata_47(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_47>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_47>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_47() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_47() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef uintptr_t uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ htole16(int /*<<< orphan*/);
int /*<<< orphan*/ rgph_murmur32s_finalise(int, uintptr_t *);
int /*<<< orphan*/ rgph_murmur32s_mix(int /*<<< orphan*/, uintptr_t *, int);
uint32_t rgph_u32_murmur32s_u16(uint16_t value, uintptr_t seed) {
  uint32_t h[1] = {seed};
  rgph_murmur32s_mix(htole16(value), h, 1);
  rgph_murmur32s_finalise(sizeof(value), h);
  return h[0];
}


x86 assembly (clang, -O0):
<rgph_u32_murmur32s_u16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <htole16@plt>
mov    %eax,%edi
lea    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1040 <rgph_murmur32s_mix@plt>
lea    -0x18(%rbp),%rsi
mov    $0x4,%edi
call   1050 <rgph_murmur32s_finalise@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u32_murmur32s_u16>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,0x8(%rsp)
call   1030 <htole16@plt>
lea    0x8(%rsp),%rbx
mov    %eax,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <rgph_murmur32s_mix@plt>
mov    $0x4,%edi
mov    %rbx,%rsi
call   1050 <rgph_murmur32s_finalise@plt>
mov    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i64 @rgph_u32_murmur32s_u16(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca [1 x i64]
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%7 = load i64, i64* %4
store i64 %7, i64* %6
%8 = load i32, i32* %3
%9 = call i32 @htole16(i32 %8)
%10 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%11 = call i32 @rgph_murmur32s_mix(i32 %9, i64* %10, i32 1)
%12 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%13 = call i32 @rgph_murmur32s_finalise(i32 4, i64* %12)
%14 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%15 = load i64, i64* %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @rgph_u32_murmur32s_u16(i32 %0, i64 %1) {
%3 = alloca [1 x i64]
%4 = bitcast [1 x i64]* %3 to i8*
%5 = getelementptr inbounds [1 x i64], [1 x i64]* %3, i64 0, i64 0
store i64 %1, i64* %5
%6 = tail call i32 @htole16(i32 %0)
%7 = call i32 @rgph_murmur32s_mix(i32 %6, i64* %5, i32 1)
%8 = call i32 @rgph_murmur32s_finalise(i32 4, i64* %5)
%9 = load i64, i64* %5
ret i64 %9
}