int HSMMCSDSoftReset(unsigned int baseAddr) {
  volatile unsigned int timeout = 0xFFFF;
  (*((volatile unsigned int *)(baseAddr + (0x110)))) |= (0x00000002u);
  do {
    if (((*((volatile unsigned int *)(baseAddr + (0x114)))) & (0x00000001u)) ==
        (0x00000001u)) {
      break;
    }
  } while (timeout--);
  if (0 == timeout) {
    return -1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<HSMMCSDSoftReset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0xffff,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x110,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
add    $0x114,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x1,%eax
jne    113c <HSMMCSDSoftReset+0x3c>
jmp    1155 <HSMMCSDSoftReset+0x55>
jmp    1141 <HSMMCSDSoftReset+0x41>
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jne    111f <HSMMCSDSoftReset+0x1f>
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    116e <HSMMCSDSoftReset+0x6e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1175 <HSMMCSDSoftReset+0x75>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HSMMCSDSoftReset>:
movl   $0xffff,-0x4(%rsp)
lea    0x110(%rdi),%eax
orl    $0x2,(%rax)
add    $0x114,%edi
nopw   0x0(%rax,%rax,1)
mov    (%rdi),%eax
test   $0x1,%al
jne    112d <HSMMCSDSoftReset+0x2d>
subl   $0x1,-0x4(%rsp)
jae    1120 <HSMMCSDSoftReset+0x20>
mov    -0x4(%rsp),%eax
cmp    $0x1,%eax
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HSMMCSDSoftReset(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store volatile i32 65535, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 272
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = or i32 %9, 2
store volatile i32 %10, i32* %8
br label %11
11: ; preds = %21, %1
%12 = load i32, i32* %3
%13 = add i32 %12, 276
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = and i32 %16, 1
%18 = icmp eq i32 %17, 1
br i1 %18, label %19, label %20
19: ; preds = %11
br label %25
20: ; preds = %11
br label %21
21: ; preds = %20
%22 = load volatile i32, i32* %4
%23 = add i32 %22, -1
store volatile i32 %23, i32* %4
%24 = icmp ne i32 %22, 0
br i1 %24, label %11, label %25
25: ; preds = %21, %19
%26 = load volatile i32, i32* %4
%27 = icmp eq i32 0, %26
br i1 %27, label %28, label %29
28: ; preds = %25
store i32 -1, i32* %2
br label %30
29: ; preds = %25
store i32 0, i32* %2
br label %30
30: ; preds = %29, %28
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @HSMMCSDSoftReset(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store volatile i32 65535, i32* %2
%4 = add i32 %0, 272
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 2
store volatile i32 %8, i32* %6
%9 = add i32 %0, 276
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
br label %12
12: ; preds = %16, %1
%13 = load volatile i32, i32* %11
%14 = and i32 %13, 1
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load volatile i32, i32* %2
%18 = add i32 %17, -1
store volatile i32 %18, i32* %2
%19 = icmp eq i32 %17, 0
br i1 %19, label %20, label %12
20: ; preds = %12, %16
%21 = load volatile i32, i32* %2
%22 = icmp eq i32 %21, 0
%23 = sext i1 %22 to i32
ret i32 %23
}