unsigned long bn_sub_words(unsigned long *rp, const unsigned long *ap,
                           const unsigned long *bp, int n) {
  unsigned long ret = 0, i = 0;
  if (n <= 0)
    return 0;
  asm volatile("       subq    %2,%2           \n"
               ".align 16                      \n"
               "1:     movq    (%4,%2,8),%0    \n"
               "       sbbq    (%5,%2,8),%0    \n"
               "       movq    %0,(%3,%2,8)    \n"
               "       leaq    1(%2),%2        \n"
               "       loop    1b              \n"
               "       sbbq    %0,%0           \n"
               : "=&a"(ret), "+c"(n), "=&r"(i)
               : "r"(rp), "r"(ap), "r"(bp)
               : "cc", "memory");
  return ret & 1;
}


x86 assembly (clang, -O0):
<bn_sub_words>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
movq   $0x0,-0x30(%rbp)
movq   $0x0,-0x38(%rbp)
cmpl   $0x0,-0x24(%rbp)
jg     113a <bn_sub_words+0x3a>
movq   $0x0,-0x8(%rbp)
jmp    1187 <bn_sub_words+0x87>
mov    -0x24(%rbp),%ecx
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%r8
sub    %rdx,%rdx
nopl   0x0(%rax)
mov    (%rdi,%rdx,8),%rax
sbb    (%r8,%rdx,8),%rax
mov    %rax,(%rsi,%rdx,8)
lea    0x1(%rdx),%rdx
loop   1150 <bn_sub_words+0x50>
sbb    %rax,%rax
mov    %rdx,-0x40(%rbp)
mov    %rax,%rdx
mov    -0x40(%rbp),%rax
mov    %rdx,-0x30(%rbp)
mov    %ecx,-0x24(%rbp)
mov    %rax,-0x38(%rbp)
mov    -0x30(%rbp),%rax
and    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bn_sub_words>:
test   %ecx,%ecx
jle    1129 <bn_sub_words+0x29>
sub    %r8,%r8
nopw   0x0(%rax,%rax,1)
mov    (%rsi,%r8,8),%rax
sbb    (%rdx,%r8,8),%rax
mov    %rax,(%rdi,%r8,8)
lea    0x1(%r8),%r8
loop   1110 <bn_sub_words+0x10>
sbb    %rax,%rax
and    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @bn_sub_words(i64* %0, i64* %1, i64* %2, i32 %3) {
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64*
%8 = alloca i64*
%9 = alloca i32
%10 = alloca i64
%11 = alloca i64
store i64* %0, i64** %6
store i64* %1, i64** %7
store i64* %2, i64** %8
store i32 %3, i32* %9
store i64 0, i64* %10
store i64 0, i64* %11
%12 = load i32, i32* %9
%13 = icmp sle i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %4
store i64 0, i64* %5
br label %26
15: ; preds = %4
%16 = load i32, i32* %9
%17 = load i64*, i64** %6
%18 = load i64*, i64** %7
%19 = load i64*, i64** %8
%20 = call { i64, i32, i64 } asm sideeffect " subq $2,$2 \0A.align 16 \0A1: movq ($4,$2,8),$0 \0A sbbq ($5,$2,8),$0 \0A movq $0,($3,$2,8) \0A leaq 1($2),$2 \0A loop 1b \0A sbbq $0,$0 \0A", "=&{ax},={cx},=&r,r,r,r,1,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %17, i64* %18, i64* %19, i32 %16)
%21 = extractvalue { i64, i32, i64 } %20, 0
%22 = extractvalue { i64, i32, i64 } %20, 1
%23 = extractvalue { i64, i32, i64 } %20, 2
store i64 %21, i64* %10
store i32 %22, i32* %9
store i64 %23, i64* %11
%24 = load i64, i64* %10
%25 = and i64 %24, 1
store i64 %25, i64* %5
br label %26
26: ; preds = %15, %14
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @bn_sub_words(i64* %0, i64* %1, i64* %2, i32 %3) {
%5 = icmp slt i32 %3, 1
br i1 %5, label %10, label %6
6: ; preds = %4
%7 = tail call { i64, i32, i64 } asm sideeffect " subq $2,$2 \0A.align 16 \0A1: movq ($4,$2,8),$0 \0A sbbq ($5,$2,8),$0 \0A movq $0,($3,$2,8) \0A leaq 1($2),$2 \0A loop 1b \0A sbbq $0,$0 \0A", "=&{ax},={cx},=&r,r,r,r,1,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %0, i64* %1, i64* %2, i32 %3)
%8 = extractvalue { i64, i32, i64 } %7, 0
%9 = and i64 %8, 1
br label %10
10: ; preds = %4, %6
%11 = phi i64 [ %9, %6 ], [ 0, %4 ]
ret i64 %11
}