#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ LoadRegistre(int, unsigned int);
char StoreByteRegistre(int);
int StoreRegistre(int);
int /*<<< orphan*/ ipc(int, int);
int read(int fd, char *buff, unsigned count) {
  count = (count > 240) ? 240 : count;
  LoadRegistre(0, 5);
  LoadRegistre(1, 5);
  LoadRegistre(2, 2);
  LoadRegistre(3, fd);
  LoadRegistre(4, count);
  ipc(3, 5);
  int result = StoreRegistre(2);
  for (int i = 0; i < result; i++)
    buff[i] = StoreByteRegistre(12 + i);
  return result;
}


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0xf0,-0x14(%rbp)
jbe    116c <read+0x2c>
mov    $0xf0,%eax
mov    %eax,-0x20(%rbp)
jmp    1172 <read+0x32>
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x14(%rbp)
xor    %edi,%edi
mov    $0x5,%esi
call   1030 <LoadRegistre@plt>
mov    $0x1,%edi
mov    $0x5,%esi
call   1030 <LoadRegistre@plt>
mov    $0x2,%esi
mov    %esi,%edi
call   1030 <LoadRegistre@plt>
mov    -0x4(%rbp),%esi
mov    $0x3,%edi
call   1030 <LoadRegistre@plt>
mov    -0x14(%rbp),%esi
mov    $0x4,%edi
call   1030 <LoadRegistre@plt>
mov    $0x3,%edi
mov    $0x5,%esi
call   1050 <ipc@plt>
mov    $0x2,%edi
call   1040 <StoreRegistre@plt>
mov    %eax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    120e <read+0xce>
mov    -0x1c(%rbp),%edi
add    $0xc,%edi
call   1060 <StoreByteRegistre@plt>
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    11dc <read+0x9c>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r15
mov    %edi,%r14d
cmp    $0xf0,%edx
mov    $0xf0,%ebp
cmovb  %edx,%ebp
xor    %edi,%edi
mov    $0x5,%esi
call   1030 <LoadRegistre@plt>
mov    $0x1,%edi
mov    $0x5,%esi
call   1030 <LoadRegistre@plt>
mov    $0x2,%edi
mov    $0x2,%esi
call   1030 <LoadRegistre@plt>
mov    $0x3,%edi
mov    %r14d,%esi
call   1030 <LoadRegistre@plt>
mov    $0x4,%edi
mov    %ebp,%esi
call   1030 <LoadRegistre@plt>
mov    $0x3,%edi
mov    $0x5,%esi
call   1050 <ipc@plt>
mov    $0x2,%edi
call   1040 <StoreRegistre@plt>
mov    %eax,%r14d
test   %eax,%eax
jle    11e5 <read+0xa5>
mov    %r14d,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
lea    0xc(%rbx),%edi
call   1060 <StoreByteRegistre@plt>
mov    %al,(%r15,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%rbp
jne    11d0 <read+0x90>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%9 = load i32, i32* %6
%10 = icmp ugt i32 %9, 240
br i1 %10, label %11, label %12
11: ; preds = %3
br label %14
12: ; preds = %3
%13 = load i32, i32* %6
br label %14
14: ; preds = %12, %11
%15 = phi i32 [ 240, %11 ], [ %13, %12 ]
store i32 %15, i32* %6
%16 = call i32 @LoadRegistre(i32 0, i32 5)
%17 = call i32 @LoadRegistre(i32 1, i32 5)
%18 = call i32 @LoadRegistre(i32 2, i32 2)
%19 = load i32, i32* %4
%20 = call i32 @LoadRegistre(i32 3, i32 %19)
%21 = load i32, i32* %6
%22 = call i32 @LoadRegistre(i32 4, i32 %21)
%23 = call i32 @ipc(i32 3, i32 5)
%24 = call i32 @StoreRegistre(i32 2)
store i32 %24, i32* %7
store i32 0, i32* %8
br label %25
25: ; preds = %37, %14
%26 = load i32, i32* %8
%27 = load i32, i32* %7
%28 = icmp slt i32 %26, %27
br i1 %28, label %29, label %40
29: ; preds = %25
%30 = load i32, i32* %8
%31 = add nsw i32 12, %30
%32 = call signext i8 @StoreByteRegistre(i32 %31)
%33 = load i8*, i8** %5
%34 = load i32, i32* %8
%35 = sext i32 %34 to i64
%36 = getelementptr inbounds i8, i8* %33, i64 %35
store i8 %32, i8* %36
br label %37
37: ; preds = %29
%38 = load i32, i32* %8
%39 = add nsw i32 %38, 1
store i32 %39, i32* %8
br label %25
40: ; preds = %25
%41 = load i32, i32* %7
ret i32 %41
}

LLVM IR (-O2):
define i32 @read(i32 %0, i8* nocapture writeonly %1, i32 %2) {
%4 = icmp ult i32 %2, 240
%5 = select i1 %4, i32 %2, i32 240
%6 = tail call i32 @LoadRegistre(i32 0, i32 5)
%7 = tail call i32 @LoadRegistre(i32 1, i32 5)
%8 = tail call i32 @LoadRegistre(i32 2, i32 2)
%9 = tail call i32 @LoadRegistre(i32 3, i32 %0)
%10 = tail call i32 @LoadRegistre(i32 4, i32 %5)
%11 = tail call i32 @ipc(i32 3, i32 5)
%12 = tail call i32 @StoreRegistre(i32 2)
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = zext i32 %12 to i64
br label %17
16: ; preds = %17, %3
ret i32 %12
17: ; preds = %14, %17
%18 = phi i64 [ 0, %14 ], [ %23, %17 ]
%19 = trunc i64 %18 to i32
%20 = add i32 %19, 12
%21 = tail call signext i8 @StoreByteRegistre(i32 %20)
%22 = getelementptr inbounds i8, i8* %1, i64 %18
store i8 %21, i8* %22
%23 = add nuw nsw i64 %18, 1
%24 = icmp eq i64 %23, %15
br i1 %24, label %16, label %17
}