xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ report(char const *, char const *, long);
void pubnub_assert_handler_loop(char const *s, char const *file, long line) {
  report(s, file, line);
  for (;;)
    continue;
}


x86 assembly (clang, -O0):
<pubnub_assert_handler_loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <report@plt>
jmp    1135 <pubnub_assert_handler_loop+0x25>

x86 assembly (clang, -O2):
<pubnub_assert_handler_loop>:
push   %rax
call   1030 <report@plt>
cs nopw 0x0(%rax,%rax,1)
jmp    1120 <pubnub_assert_handler_loop+0x10>

LLVM IR (-O0):
define void @pubnub_assert_handler_loop(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @report(i8* %7, i8* %8, i64 %9)
br label %11
11: ; preds = %11, %3
br label %11
}

LLVM IR (-O2):
define void @pubnub_assert_handler_loop(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @report(i8* %0, i8* %1, i64 %2)
br label %5
5: ; preds = %5, %3
br label %5
}
int rq_trade_mgr_cmp(void *x, void *y) { return ((int)x) != ((int)y); }


x86 assembly (clang, -O0):
<rq_trade_mgr_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rq_trade_mgr_cmp>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @rq_trade_mgr_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i32
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i32
%9 = icmp ne i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @rq_trade_mgr_cmp(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = trunc i64 %3 to i32
%5 = ptrtoint i8* %1 to i64
%6 = trunc i64 %5 to i32
%7 = icmp ne i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
char *Realloc(ptr, sz)
char ptr[];
unsigned int sz;
{
  register char *mptr;
  if (!ptr)
    mptr = malloc(sz);
  else
    mptr = realloc(ptr, sz);
  if (sz && mptr == 0)
    No_Mem();
  return mptr;
}


x86 assembly (clang, -O0):
<Realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    115d <Realloc+0x2d>
mov    -0xc(%rbp),%eax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
jmp    116f <Realloc+0x3f>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%eax
mov    %eax,%esi
call   1050 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     118b <Realloc+0x5b>
cmpq   $0x0,-0x18(%rbp)
jne    118b <Realloc+0x5b>
mov    $0x0,%al
call   1030 <No_Mem@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Realloc>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %esi,%esi
test   %rdi,%rdi
je     1144 <Realloc+0x14>
call   1050 <realloc@plt>
jmp    114c <Realloc+0x1c>
mov    %rsi,%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %ebx,%ebx
je     115f <Realloc+0x2f>
test   %r14,%r14
jne    115f <Realloc+0x2f>
xor    %eax,%eax
call   1030 <No_Mem@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @Realloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %5
br label %17
12: ; preds = %2
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = zext i32 %14 to i64
%16 = call i8* @realloc(i8* %13, i64 %15)
store i8* %16, i8** %5
br label %17
17: ; preds = %12, %8
%18 = load i32, i32* %4
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %17
%21 = load i8*, i8** %5
%22 = icmp eq i8* %21, null
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = call i32 (...) @No_Mem()
br label %25
25: ; preds = %23, %20, %17
%26 = load i8*, i8** %5
ret i8* %26
}

LLVM IR (-O2):
define i8* @Realloc(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
%4 = zext i32 %1 to i64
br i1 %3, label %5, label %7
5: ; preds = %2
%6 = tail call i8* @malloc(i64 %4)
br label %9
7: ; preds = %2
%8 = tail call i8* @realloc(i8* %0, i64 %4)
br label %9
9: ; preds = %7, %5
%10 = phi i8* [ %8, %7 ], [ %6, %5 ]
%11 = icmp ne i32 %1, 0
%12 = icmp eq i8* %10, null
%13 = and i1 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = tail call i32 (...) @No_Mem()
br label %16
16: ; preds = %14, %9
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf_skip(char *, char const *);
int /*<<< orphan*/ stress_check_capability(int);
int stress_memhotplug_supported(const char *name) {
  if (!stress_check_capability((-1))) {
    pr_inf_skip("%s stressor will be skipped, "
                "need to be running with CAP_SYS_ADMIN "
                "rights for this stressor\n",
                name);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<stress_memhotplug_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0xffffffff,%edi
call   1030 <stress_check_capability@plt>
cmp    $0x0,%eax
jne    115b <stress_memhotplug_supported+0x3b>
mov    -0x10(%rbp),%rsi
lea    0xeb6(%rip),%rdi
call   1040 <pr_inf_skip@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1162 <stress_memhotplug_supported+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_memhotplug_supported>:
push   %rbx
mov    %rdi,%rbx
mov    $0xffffffff,%edi
call   1030 <stress_check_capability@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1138 <stress_memhotplug_supported+0x18>
pop    %rbx
ret
lea    0xec1(%rip),%rdi
mov    %rbx,%rsi
call   1040 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_memhotplug_supported(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @stress_check_capability(i32 -1)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i32 @pr_inf_skip(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %7)
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_memhotplug_supported(i8* %0) {
%2 = tail call i32 @stress_check_capability(i32 -1)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_inf_skip(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
int md_pre_update(void) { return 1; }


x86 assembly (clang, -O0):
<md_pre_update>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_pre_update>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @md_pre_update() {
ret i32 1
}

LLVM IR (-O2):
define i32 @md_pre_update() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ apagaCaracter(char *, char);
int /*<<< orphan*/ leLinha(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char buffer[80], c;
  leLinha(buffer);
  scanf("%c", &c);
  apagaCaracter(buffer, c);
  printf("%s\n", buffer);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x60(%rbp),%rdi
call   1040 <leLinha@plt>
lea    0xea1(%rip),%rdi
lea    -0x61(%rbp),%rsi
call   1060 <scanf@plt>
lea    -0x60(%rbp),%rdi
movsbl -0x61(%rbp),%esi
call   1030 <apagaCaracter@plt>
lea    -0x60(%rbp),%rsi
lea    0xe83(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x60,%rsp
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <leLinha@plt>
lea    0xea7(%rip),%rdi
lea    0xf(%rsp),%rsi
call   1060 <scanf@plt>
movsbl 0xf(%rsp),%esi
mov    %rbx,%rdi
call   1030 <apagaCaracter@plt>
lea    0xe8c(%rip),%rdi
mov    %rbx,%rsi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [80 x i8]
%3 = alloca i8
store i32 0, i32* %1
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%5 = call i32 @leLinha(i8* %4)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%7 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%8 = load i8, i8* %3
%9 = call i32 @apagaCaracter(i8* %7, i8 signext %8)
%10 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [80 x i8]
%2 = alloca i8
%3 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%4 = call i32 @leLinha(i8* %3)
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%6 = load i8, i8* %2
%7 = call i32 @apagaCaracter(i8* %3, i8 signext %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __cpuid(unsigned int, unsigned int, unsigned int,
                           unsigned int, unsigned int);
unsigned int cpuid_ebx(unsigned int op) {
  unsigned int eax, ebx, ecx, edx;
  __cpuid(op, eax, ebx, ecx, edx);
  return ebx;
}


x86 assembly (clang, -O0):
<cpuid_ebx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
call   1030 <__cpuid@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_ebx>:
jmp    1030 <__cpuid@plt>

LLVM IR (-O0):
define i32 @cpuid_ebx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @__cpuid(i32 %7, i32 %8, i32 %9, i32 %10, i32 %11)
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @cpuid_ebx(i32 %0) {
%2 = tail call i32 @__cpuid(i32 %0, i32 undef, i32 undef, i32 undef, i32 undef)
ret i32 undef
}
/* Variables and functions */
float vec3f_norm(float const *);
int /*<<< orphan*/ vec3f_scalarDiv_new(float *, float const *, float);
void vec3f_normalize_new(float dest[3], const float src[3]) {
  float len = vec3f_norm(src);
  vec3f_scalarDiv_new(dest, src, len);
}


x86 assembly (clang, -O0):
<vec3f_normalize_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <vec3f_norm@plt>
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
call   1030 <vec3f_scalarDiv_new@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3f_normalize_new>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <vec3f_norm@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <vec3f_scalarDiv_new@plt>

LLVM IR (-O0):
define void @vec3f_normalize_new(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca float
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %4
%7 = call float @vec3f_norm(float* %6)
store float %7, float* %5
%8 = load float*, float** %3
%9 = load float*, float** %4
%10 = load float, float* %5
%11 = call i32 @vec3f_scalarDiv_new(float* %8, float* %9, float %10)
ret void
}

LLVM IR (-O2):
define void @vec3f_normalize_new(float* %0, float* %1) {
%3 = tail call float @vec3f_norm(float* %1)
%4 = tail call i32 @vec3f_scalarDiv_new(float* %0, float* %1, float %3)
ret void
}
int test_imm_ACuint16_reg(unsigned short val) {
  return ((val) & (-0xAC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ACuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff54,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ACuint16_reg>:
test   $0xff54,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ACuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -172
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_ACuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -172
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
__attribute__((no)) int bar(void) { return 42; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @bar() {
ret i32 42
}

LLVM IR (-O2):
define i32 @bar() {
ret i32 42
}
void musicoff(void) {}


x86 assembly (clang, -O0):
<musicoff>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<musicoff>:
ret

LLVM IR (-O0):
define void @musicoff() {
ret void
}

LLVM IR (-O2):
define void @musicoff() {
ret void
}
char isWhite(char pieceId) { return !(pieceId == 0 || pieceId > 50); }


x86 assembly (clang, -O0):
<isWhite>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
je     1129 <isWhite+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x32,%eax
setg   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isWhite>:
test   %dil,%dil
setne  %cl
cmp    $0x33,%dil
setl   %al
and    %cl,%al
ret

LLVM IR (-O0):
define signext i8 @isWhite(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sgt i32 %8, 50
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = trunc i32 %13 to i8
ret i8 %14
}

LLVM IR (-O2):
define signext i8 @isWhite(i8 signext %0) {
%2 = icmp ne i8 %0, 0
%3 = icmp slt i8 %0, 51
%4 = and i1 %2, %3
%5 = zext i1 %4 to i8
ret i8 %5
}
int countdigit(int n, int d) {
  int a, count;
  d = 2;
  count = 0;
  do {
    a = n % 10;
    n = n / 10;
    if (a == d) {
      count++;
    }
  } while (n != 0);
  return count;
}


x86 assembly (clang, -O0):
<countdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1149 <countdigit+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114e <countdigit+0x4e>
cmpl   $0x0,-0x4(%rbp)
jne    1118 <countdigit+0x18>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countdigit>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
xor    %edx,%edx
cmp    $0x2,%esi
sete   %dl
add    %edx,%eax
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <countdigit+0x10>
ret

LLVM IR (-O0):
define i32 @countdigit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 2, i32* %4
store i32 0, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %3
%9 = srem i32 %8, 10
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = sdiv i32 %10, 10
store i32 %11, i32* %3
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %18
15: ; preds = %7
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %18
18: ; preds = %15, %7
br label %19
19: ; preds = %18
%20 = load i32, i32* %3
%21 = icmp ne i32 %20, 0
br i1 %21, label %7, label %22
22: ; preds = %19
%23 = load i32, i32* %6
ret i32 %23
}

LLVM IR (-O2):
define i32 @countdigit(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %7, %3 ]
%5 = phi i32 [ 0, %2 ], [ %10, %3 ]
%6 = srem i32 %4, 10
%7 = sdiv i32 %4, 10
%8 = icmp eq i32 %6, 2
%9 = zext i1 %8 to i32
%10 = add nuw nsw i32 %5, %9
%11 = add i32 %4, 9
%12 = icmp ult i32 %11, 19
br i1 %12, label %13, label %3
13: ; preds = %3
ret i32 %10
}
void lace_pin_worker(void) {}


x86 assembly (clang, -O0):
<lace_pin_worker>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lace_pin_worker>:
ret

LLVM IR (-O0):
define void @lace_pin_worker() {
ret void
}

LLVM IR (-O2):
define void @lace_pin_worker() {
ret void
}
/* Variables and functions */
void *compare_ldouble_context(void) { return NULL; }


x86 assembly (clang, -O0):
<compare_ldouble_context>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_ldouble_context>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @compare_ldouble_context() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @compare_ldouble_context() {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_nondet_String();
int /*<<< orphan*/ __VERIFIER_nondet_int();
int /*<<< orphan*/ cstrchr(int /*<<< orphan*/, int /*<<< orphan*/);
int main() {
  cstrchr(__VERIFIER_nondet_String(), __VERIFIER_nondet_int());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_String@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <__VERIFIER_nondet_int@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1040 <cstrchr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_String@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <__VERIFIER_nondet_int@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1040 <cstrchr@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @__VERIFIER_nondet_String()
%3 = call i32 (...) @__VERIFIER_nondet_int()
%4 = call i32 @cstrchr(i32 %2, i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_String()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 @cstrchr(i32 %1, i32 %2)
ret i32 0
}
/* Variables and functions */
void strncopy(char *dest, char *source, size_t count) {
  while (count-- > 0 && (*dest++ = *source++) != '\0')
    ;
}


x86 assembly (clang, -O0):
<strncopy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    %rcx,%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x19(%rbp)
jbe    115c <strncopy+0x5c>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    116c <strncopy+0x6c>
jmp    1171 <strncopy+0x71>
jmp    1110 <strncopy+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncopy>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    %rax,%rdx
je     1124 <strncopy+0x24>
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strncopy+0x10>
ret

LLVM IR (-O0):
define void @strncopy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %7
7: ; preds = %21, %3
%8 = load i64, i64* %6
%9 = add i64 %8, -1
store i64 %9, i64* %6
%10 = icmp ugt i64 %8, 0
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
%14 = load i8, i8* %12
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
store i8 %14, i8* %15
%17 = sext i8 %14 to i32
%18 = icmp ne i32 %17, 0
br label %19
19: ; preds = %11, %7
%20 = phi i1 [ false, %7 ], [ %18, %11 ]
br i1 %20, label %21, label %22
21: ; preds = %19
br label %7
22: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @strncopy(i8* nocapture writeonly %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i8* [ %0, %3 ], [ %13, %9 ]
%6 = phi i8* [ %1, %3 ], [ %11, %9 ]
%7 = phi i64 [ %2, %3 ], [ %10, %9 ]
%8 = icmp eq i64 %7, 0
br i1 %8, label %15, label %9
9: ; preds = %4
%10 = add i64 %7, -1
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = load i8, i8* %6
%13 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %12, i8* %5
%14 = icmp eq i8 %12, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void prMarge(int n) {
  int N, i;
  N = n * 3;
  for (i = 0; i < N; i++)
    printf(" ");
}


x86 assembly (clang, -O0):
<prMarge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114f <prMarge+0x3f>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <prMarge+0x19>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prMarge>:
push   %rbx
test   %edi,%edi
jle    113f <prMarge+0x2f>
lea    (%rdi,%rdi,2),%eax
cmp    $0x2,%eax
mov    $0x1,%ebx
cmovge %eax,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1130 <prMarge+0x20>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define void @prMarge(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %5, 3
store i32 %6, i32* %3
store i32 0, i32* %4
br label %7
7: ; preds = %13, %1
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %7
16: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @prMarge(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1
%4 = mul i32 %0, 3
%5 = call i32 @llvm.smax.i32(i32 %4, i32 1)
br label %6
6: ; preds = %3, %6
%7 = phi i32 [ %9, %6 ], [ 0, %3 ]
%8 = tail call i32 @putchar(i32 32)
%9 = add nuw nsw i32 %7, 1
%10 = icmp eq i32 %9, %5
br i1 %10, label %11, label %6
11: ; preds = %6, %1
ret void
}
void forever() {
  while (1) {
    asm volatile("nop");
  }
}


x86 assembly (clang, -O0):
<forever>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <forever+0x9>
nop
jmp    1109 <forever+0x9>

x86 assembly (clang, -O2):
<forever>:
nop
jmp    1100 <forever>

LLVM IR (-O0):
define void @forever() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @forever() {
br label %1
1: ; preds = %0, %1
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
void noop_sig_handler(int signo) { (void)signo; }


x86 assembly (clang, -O0):
<noop_sig_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop_sig_handler>:
ret

LLVM IR (-O0):
define void @noop_sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @noop_sig_handler(i32 %0) {
ret void
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
size_t ziplistBlobLen(unsigned char *zl) { return (*((uint32_t *)(zl))); }


x86 assembly (clang, -O0):
<ziplistBlobLen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ziplistBlobLen>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @ziplistBlobLen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i64*
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @ziplistBlobLen(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ utest_control();
void utest_adts_meas(void) {
  utest_control();
  return;
}


x86 assembly (clang, -O0):
<utest_adts_meas>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <utest_control@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utest_adts_meas>:
xor    %eax,%eax
jmp    1030 <utest_control@plt>

LLVM IR (-O0):
define void @utest_adts_meas() {
%1 = call i32 (...) @utest_control()
ret void
}

LLVM IR (-O2):
define void @utest_adts_meas() {
%1 = tail call i32 (...) @utest_control()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WeDoClosePort();
void __attribute__((destructor)) libDesWeDo(void) { WeDoClosePort(); }


x86 assembly (clang, -O0):
<libDesWeDo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WeDoClosePort@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<libDesWeDo>:
xor    %eax,%eax
jmp    1030 <WeDoClosePort@plt>

LLVM IR (-O0):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @libDesWeDo, i8* null }]
define void @libDesWeDo() {
%1 = call i32 (...) @WeDoClosePort()
ret void
}

LLVM IR (-O2):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @libDesWeDo, i8* null }]
define void @libDesWeDo() {
%1 = tail call i32 (...) @WeDoClosePort()
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t make_color(uint8_t foreground, uint8_t background) {
  return foreground | background << 4;
}


x86 assembly (clang, -O0):
<make_color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_color>:
mov    %esi,%eax
shl    $0x4,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @make_color(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 4
%8 = or i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @make_color(i32 %0, i32 %1) {
%3 = shl i32 %1, 4
%4 = or i32 %3, %0
ret i32 %4
}
const char *ssh_sigstrlong(int i) { return "UNKNOWN SIGNAL"; }


x86 assembly (clang, -O0):
<ssh_sigstrlong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssh_sigstrlong>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [15 x i8] c"UNKNOWN SIGNAL\00"
define i8* @ssh_sigstrlong(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [15 x i8] c"UNKNOWN SIGNAL\00"
define i8* @ssh_sigstrlong(i32 %0) {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ pffft_zconvolve(void *, float *, float const *, float *);
void convolve(int length, void *setup, float *H, float const *with) {
  pffft_zconvolve(setup, H, with, H);
  (void)length;
}


x86 assembly (clang, -O0):
<convolve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <pffft_zconvolve@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convolve>:
mov    %rdx,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %rax,%rcx
jmp    1030 <pffft_zconvolve@plt>

LLVM IR (-O0):
define void @convolve(i32 %0, i8* %1, float* %2, float* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca float*
%8 = alloca float*
store i32 %0, i32* %5
store i8* %1, i8** %6
store float* %2, float** %7
store float* %3, float** %8
%9 = load i8*, i8** %6
%10 = load float*, float** %7
%11 = load float*, float** %8
%12 = load float*, float** %7
%13 = call i32 @pffft_zconvolve(i8* %9, float* %10, float* %11, float* %12)
%14 = load i32, i32* %5
ret void
}

LLVM IR (-O2):
define void @convolve(i32 %0, i8* %1, float* %2, float* %3) {
%5 = tail call i32 @pffft_zconvolve(i8* %1, float* %2, float* %3, float* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outw(int /*<<< orphan*/, unsigned long);
void outsw(unsigned long port, const void *src, unsigned long count) {
  const unsigned short *p = src;
  while (count--)
    outw(*p++, port);
}


x86 assembly (clang, -O0):
<outsw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     1165 <outsw+0x55>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x2,%rcx
mov    %rcx,-0x20(%rbp)
movzwl (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <outw@plt>
jmp    112c <outsw+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsw>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     1146 <outsw+0x36>
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
movzwl (%r14,%rbx,2),%edi
mov    %r15,%rsi
call   1030 <outw@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <outsw+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @outsw(i64 %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i16*
store i64 %0, i64* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to i16*
store i16* %9, i16** %7
br label %10
10: ; preds = %14, %3
%11 = load i64, i64* %6
%12 = add i64 %11, -1
store i64 %12, i64* %6
%13 = icmp ne i64 %11, 0
br i1 %13, label %14, label %21
14: ; preds = %10
%15 = load i16*, i16** %7
%16 = getelementptr inbounds i16, i16* %15, i32 1
store i16* %16, i16** %7
%17 = load i16, i16* %15
%18 = zext i16 %17 to i32
%19 = load i64, i64* %4
%20 = call i32 @outw(i32 %18, i64 %19)
br label %10
21: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @outsw(i64 %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %16, label %5
5: ; preds = %3
%6 = bitcast i8* %1 to i16*
br label %7
7: ; preds = %5, %7
%8 = phi i16* [ %11, %7 ], [ %6, %5 ]
%9 = phi i64 [ %10, %7 ], [ %2, %5 ]
%10 = add i64 %9, -1
%11 = getelementptr inbounds i16, i16* %8, i64 1
%12 = load i16, i16* %8
%13 = zext i16 %12 to i32
%14 = tail call i32 @outw(i32 %13, i64 %0)
%15 = icmp eq i64 %10, 0
br i1 %15, label %16, label %7
16: ; preds = %7, %3
ret void
}
int add1(int x, int y) { return x + y; }


x86 assembly (clang, -O0):
<add1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add1>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @add1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @add1(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
void quatsetnone(float *q) {
  q[0] = 0;
  q[1] = 0;
  q[2] = 0;
  q[3] = 1;
}


x86 assembly (clang, -O0):
<quatsetnone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xec9(%rip),%xmm0
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quatsetnone>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @quatsetnone(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
store float 0.000000e+00, float* %4
%5 = load float*, float** %2
%6 = getelementptr inbounds float, float* %5, i64 1
store float 0.000000e+00, float* %6
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 2
store float 0.000000e+00, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 3
store float 1.000000e+00, float* %10
ret void
}

LLVM IR (-O2):
define void @quatsetnone(float* nocapture writeonly %0) {
%2 = bitcast float* %0 to <4 x float>*
store <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x float>* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ system(char *);
void deposit(int balance) {
  int i, money;
  system("clear");
  for (i = 0; i < 6; i++)
    puts("");
  puts("");
}


x86 assembly (clang, -O0):
<deposit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <system@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x6,-0x8(%rbp)
jge    1162 <deposit+0x42>
lea    0xeb6(%rip),%rdi
call   1030 <puts@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113e <deposit+0x1e>
lea    0xe9c(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deposit>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <system@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"clear\00"
@.str.1 = [1 x i8] zeroinitializer
define void @deposit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %3
br label %6
6: ; preds = %11, %1
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 6
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %6
14: ; preds = %6
%15 = call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"clear\00"
define void @deposit(i32 %0) {
%2 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @putchar(i32 10)
%4 = tail call i32 @putchar(i32 10)
%5 = tail call i32 @putchar(i32 10)
%6 = tail call i32 @putchar(i32 10)
%7 = tail call i32 @putchar(i32 10)
%8 = tail call i32 @putchar(i32 10)
%9 = tail call i32 @putchar(i32 10)
ret void
}
int get_pos_weight(int pos) {
  int weight = 1;
  while (pos-- > 0) {
    weight *= 2;
  }
  return weight;
}


x86 assembly (clang, -O0):
<get_pos_weight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    1130 <get_pos_weight+0x30>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <get_pos_weight+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pos_weight>:
test   %edi,%edi
jle    1118 <get_pos_weight+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <get_pos_weight+0x1e>
mov    $0x1,%eax
jmp    1138 <get_pos_weight+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <get_pos_weight+0x30>
test   %ecx,%ecx
je     1147 <get_pos_weight+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <get_pos_weight+0x40>
ret

LLVM IR (-O0):
define i32 @get_pos_weight(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = add nsw i32 %5, -1
store i32 %6, i32* %2
%7 = icmp sgt i32 %5, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 2
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @get_pos_weight(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %25
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl nsw i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
/* Variables and functions */
int /*<<< orphan*/ ee24_read_sequential(char, short, char *, int);
void ee24_read_byte(char device_address, short data_address, char byte) {
  ee24_read_sequential(device_address, data_address, &byte, 1);
}


x86 assembly (clang, -O0):
<ee24_read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %si,%cx
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cx,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x1(%rbp),%al
lea    -0x5(%rbp),%rdx
mov    $0x1,%ecx
movsbl %al,%edi
movswl -0x4(%rbp),%esi
call   1030 <ee24_read_sequential@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ee24_read_byte>:
push   %rax
mov    %dl,0x7(%rsp)
lea    0x7(%rsp),%rdx
mov    $0x1,%ecx
call   1030 <ee24_read_sequential@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ee24_read_byte(i8 signext %0, i16 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i16
%6 = alloca i8
store i8 %0, i8* %4
store i16 %1, i16* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = load i16, i16* %5
%9 = call i32 @ee24_read_sequential(i8 signext %7, i16 signext %8, i8* %6, i32 1)
ret void
}

LLVM IR (-O2):
define void @ee24_read_byte(i8 signext %0, i16 signext %1, i8 signext %2) {
%4 = alloca i8
store i8 %2, i8* %4
%5 = call i32 @ee24_read_sequential(i8 signext %0, i16 signext %1, i8* %4, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g(int, int);
main() {
  g(2, 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <g@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <g@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @g(i32 2, i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @g(i32 2, i32 3)
ret i32 0
}
void DebugBreakPoint(void) { return; }


x86 assembly (clang, -O0):
<DebugBreakPoint>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DebugBreakPoint>:
ret

LLVM IR (-O0):
define void @DebugBreakPoint() {
ret void
}

LLVM IR (-O2):
define void @DebugBreakPoint() {
ret void
}
void PGMTHandler() {}


x86 assembly (clang, -O0):
<PGMTHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PGMTHandler>:
ret

LLVM IR (-O0):
define void @PGMTHandler() {
ret void
}

LLVM IR (-O2):
define void @PGMTHandler() {
ret void
}
int test_imm_1Fint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x1F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Fint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x1f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Fint64_midword_mem>:
testb  $0x1f,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Fint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 31
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Fint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 2031616
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int g() { return 2; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @g() {
ret i32 2
}

LLVM IR (-O2):
define i32 @g() {
ret i32 2
}
void fake_sysoff_work_cancel(void) {}


x86 assembly (clang, -O0):
<fake_sysoff_work_cancel>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fake_sysoff_work_cancel>:
ret

LLVM IR (-O0):
define void @fake_sysoff_work_cancel() {
ret void
}

LLVM IR (-O2):
define void @fake_sysoff_work_cancel() {
ret void
}
int gpsstrcmp(const char *str1, const char *str2) {
  while (*str1 && *str1 == *str2)
    ++str1, ++str2;
  return *str1;
}


x86 assembly (clang, -O0):
<gpsstrcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     1137 <gpsstrcmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <gpsstrcmp+0x47>
jmp    1164 <gpsstrcmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <gpsstrcmp+0xc>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpsstrcmp>:
mov    (%rdi),%al
test   %al,%al
je     1122 <gpsstrcmp+0x22>
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    (%rsi,%rcx,1),%al
jne    1124 <gpsstrcmp+0x24>
movzbl 0x1(%rdi,%rcx,1),%eax
add    $0x1,%rcx
test   %al,%al
jne    1110 <gpsstrcmp+0x10>
xor    %eax,%eax
movsbl %al,%eax
ret

LLVM IR (-O0):
define i32 @gpsstrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br label %18
18: ; preds = %10, %5
%19 = phi i1 [ false, %5 ], [ %17, %10 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = sext i8 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @gpsstrcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %14, %11 ], [ %3, %2 ]
%7 = phi i8* [ %13, %11 ], [ %1, %2 ]
%8 = phi i8* [ %12, %11 ], [ %0, %2 ]
%9 = load i8, i8* %7
%10 = icmp eq i8 %6, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %11, %2
%17 = phi i8 [ 0, %2 ], [ 0, %11 ], [ %6, %5 ]
%18 = sext i8 %17 to i32
ret i32 %18
}
/* Variables and functions */
int stat_file(char *);
int /*<<< orphan*/ usage(char *);
int main(int argc, char **argv) {
  int ret = 0;
  if (argc == 2) {
    ret = stat_file(argv[1]);
  } else {
    usage(argv[0]);
  }
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    115c <main+0x3c>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <stat_file@plt>
mov    %eax,-0x14(%rbp)
jmp    1168 <main+0x48>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1040 <usage@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1130 <main+0x10>
mov    0x8(%rsi),%rdi
pop    %rax
jmp    1030 <stat_file@plt>
mov    (%rsi),%rdi
call   1040 <usage@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @stat_file(i8* %12)
store i32 %13, i32* %6
br label %19
14: ; preds = %2
%15 = load i8**, i8*** %5
%16 = getelementptr inbounds i8*, i8** %15, i64 0
%17 = load i8*, i8** %16
%18 = call i32 @usage(i8* %17)
br label %19
19: ; preds = %14, %9
%20 = load i32, i32* %6
ret i32 %20
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @stat_file(i8* %6)
br label %11
8: ; preds = %2
%9 = load i8*, i8** %1
%10 = tail call i32 @usage(i8* %9)
br label %11
11: ; preds = %8, %4
%12 = phi i32 [ %7, %4 ], [ 0, %8 ]
ret i32 %12
}