#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ SysCtlDelay(int);
void SysCtlClockSet(uint32_t ui32Config) {
  uint32_t ui32Delay, ui32RCC, ui32RCC2;
  ui32RCC = (*((volatile unsigned long *)(0x400FE060)));
  ui32RCC2 = (*((volatile unsigned long *)(0x400FE070)));
  ui32RCC |= 0x00000800;
  ui32RCC &= ~(0x00400000);
  ui32RCC2 |= 0x00000800;
  (*((volatile unsigned long *)(0x400FE060))) = ui32RCC;
  (*((volatile unsigned long *)(0x400FE070))) = ui32RCC2;
  if ((ui32RCC & 0x00000001) && !(ui32Config & 0x00000001)) {
    ui32RCC &= (~0x00000001 | (ui32Config & 0x00000001));
    (*((volatile unsigned long *)(0x400FE058))) = 0x00000100;
    (*((volatile unsigned long *)(0x400FE060))) = ui32RCC;
    ui32Delay = 524288;
    while (((*((volatile unsigned long *)(0x400FE050))) & 0x00000100) == 0) {
      ui32Delay--;
      if (ui32Delay == 0) {
        break;
      }
    }
    if (ui32Delay == 0) {
      return;
    }
  }
  ui32RCC &= ~(0x000007C0 | 0x00000030);
  ui32RCC |= ui32Config & (0x000007C0 | 0x00000030);
  ui32RCC2 &= ~(0x80000000 | 0x00000070);
  ui32RCC2 |= ui32Config & (0x80000000 | 0x00000030);
  ui32RCC2 |= (ui32Config & 0x00000008) << 3;
  (*((volatile unsigned long *)(0x400FE060))) = ui32RCC;
  (*((volatile unsigned long *)(0x400FE070))) = ui32RCC2;
  ui32RCC &= ~0x00002000;
  ui32RCC |= ui32Config & 0x00002000;
  ui32RCC2 &= ~0x00002000;
  ui32RCC2 |= ui32Config & 0x00002000;
  (*((volatile unsigned long *)(0x400FE058))) = 0x00000040;
  if (ui32RCC2 & 0x80000000) {
    (*((volatile unsigned long *)(0x400FE070))) = ui32RCC2;
    (*((volatile unsigned long *)(0x400FE060))) = ui32RCC;
  } else {
    (*((volatile unsigned long *)(0x400FE060))) = ui32RCC;
    (*((volatile unsigned long *)(0x400FE070))) = ui32RCC2;
  }
  ui32RCC &= ~(0x07800000 | 0x00400000 | 0x00000001);
  ui32RCC |= ui32Config & (0x07800000 | 0x00400000 | 0x00000001);
  ui32RCC2 &= ~(0x1F800000);
  ui32RCC2 |= ui32Config & 0x1F800000;
  if (ui32Config & 0x40000000) {
    ui32RCC |= 0x00400000;
    ui32RCC2 &= ~(0x00400000);
    ui32RCC2 |= ui32Config & (0x40000000 | 0x00400000);
  } else {
    ui32RCC2 &= ~(0x40000000);
  }
  if (!(ui32Config & 0x00000800)) {
    for (ui32Delay = 32768; ui32Delay > 0; ui32Delay--) {
      if (((*((volatile unsigned long *)(0x400FE168))) & 0x00000001)) {
        break;
      }
    }
    ui32RCC &= ~(0x00000800);
    ui32RCC2 &= ~(0x00000800);
  }
  (*((volatile unsigned long *)(0x400FE060))) = ui32RCC;
  (*((volatile unsigned long *)(0x400FE070))) = ui32RCC2;
  SysCtlDelay(16);
}


x86 assembly (clang, -O0):
<SysCtlClockSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x400fe060,%eax
mov    (%rax),%rax
mov    %eax,-0xc(%rbp)
mov    $0x400fe070,%eax
mov    (%rax),%rax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     $0x800,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffbfffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
or     $0x800,%eax
mov    %eax,-0x10(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x400fe060,%eax
mov    %rcx,(%rax)
movslq -0x10(%rbp),%rcx
mov    $0x400fe070,%eax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1201 <SysCtlClockSet+0xf1>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1201 <SysCtlClockSet+0xf1>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
or     $0xfffffffe,%eax
and    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x400fe058,%eax
movq   $0x100,(%rax)
movslq -0xc(%rbp),%rcx
mov    $0x400fe060,%eax
mov    %rcx,(%rax)
movl   $0x80000,-0x8(%rbp)
mov    $0x400fe050,%eax
mov    (%rax),%rax
and    $0x100,%rax
cmp    $0x0,%rax
jne    11ed <SysCtlClockSet+0xdd>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    11e8 <SysCtlClockSet+0xd8>
jmp    11ed <SysCtlClockSet+0xdd>
jmp    11b8 <SysCtlClockSet+0xa8>
cmpl   $0x0,-0x8(%rbp)
jne    11fc <SysCtlClockSet+0xec>
jmp    13dd <SysCtlClockSet+0x2cd>
jmp    1201 <SysCtlClockSet+0xf1>
mov    -0xc(%rbp),%eax
and    $0xfffff80f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f0,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0x7fffff8f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80000030,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
shl    $0x3,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x400fe060,%eax
mov    %rcx,(%rax)
movslq -0x10(%rbp),%rcx
mov    $0x400fe070,%eax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xffffdfff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2000,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xffffdfff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x400fe058,%eax
movq   $0x40,(%rax)
mov    -0x10(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     12c6 <SysCtlClockSet+0x1b6>
movslq -0x10(%rbp),%rcx
mov    $0x400fe070,%eax
mov    %rcx,(%rax)
movslq -0xc(%rbp),%rcx
mov    $0x400fe060,%eax
mov    %rcx,(%rax)
jmp    12de <SysCtlClockSet+0x1ce>
movslq -0xc(%rbp),%rcx
mov    $0x400fe060,%eax
mov    %rcx,(%rax)
movslq -0x10(%rbp),%rcx
mov    $0x400fe070,%eax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xf83ffffe,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7c00001,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xe07fffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f800000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x40000000,%eax
cmp    $0x0,%eax
je     134a <SysCtlClockSet+0x23a>
mov    -0xc(%rbp),%eax
or     $0x400000,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xffbfffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x40400000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1355 <SysCtlClockSet+0x245>
mov    -0x10(%rbp),%eax
and    $0xbfffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x800,%eax
cmp    $0x0,%eax
jne    13bb <SysCtlClockSet+0x2ab>
movl   $0x8000,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    13a5 <SysCtlClockSet+0x295>
mov    $0x400fe168,%eax
mov    (%rax),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1392 <SysCtlClockSet+0x282>
jmp    13a5 <SysCtlClockSet+0x295>
jmp    1397 <SysCtlClockSet+0x287>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    136d <SysCtlClockSet+0x25d>
mov    -0xc(%rbp),%eax
and    $0xfffff7ff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xfffff7ff,%eax
mov    %eax,-0x10(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x400fe060,%eax
mov    %rcx,(%rax)
movslq -0x10(%rbp),%rcx
mov    $0x400fe070,%eax
mov    %rcx,(%rax)
mov    $0x10,%edi
call   1030 <SysCtlDelay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlClockSet>:
mov    0x400fe060,%rdx
40
mov    0x400fe070,%rax
40
mov    %edx,%ecx
and    $0xffbff7ff,%ecx
or     $0x800,%ecx
or     $0x800,%eax
movslq %ecx,%rsi
mov    %rsi,0x400fe060
40
movslq %eax,%rsi
mov    %rsi,0x400fe070
40
test   $0x1,%dil
jne    11cc <SysCtlClockSet+0xbc>
and    $0x1,%edx
je     11cc <SysCtlClockSet+0xbc>
and    $0xffbffffe,%ecx
movq   $0x100,0x400fe058
movslq %ecx,%rdx
mov    %rdx,0x400fe060
40
mov    $0x80000,%edx
mov    $0x1,%esi
nopl   0x0(%rax,%rax,1)
testq  $0x100,0x400fe050
jne    11c2 <SysCtlClockSet+0xb2>
testq  $0x100,0x400fe050
jne    11c4 <SysCtlClockSet+0xb4>
testq  $0x100,0x400fe050
jne    11c4 <SysCtlClockSet+0xb4>
testq  $0x100,0x400fe050
jne    11c4 <SysCtlClockSet+0xb4>
add    $0xfffffffc,%edx
jne    1180 <SysCtlClockSet+0x70>
jmp    1302 <SysCtlClockSet+0x1f2>
mov    %edx,%esi
test   %esi,%esi
je     1302 <SysCtlClockSet+0x1f2>
and    $0xfffff80f,%ecx
mov    %edi,%edx
and    $0x7f0,%edx
or     %ecx,%edx
and    $0x7fffff8f,%eax
mov    %edi,%ecx
and    $0x80000030,%ecx
mov    %edi,%esi
and    $0x8,%esi
lea    (%rcx,%rsi,8),%ecx
or     %eax,%ecx
movslq %edx,%rdx
mov    %rdx,0x400fe060
40
movslq %ecx,%rcx
mov    %rcx,0x400fe070
40
and    $0xffffdfff,%edx
mov    %edi,%eax
and    $0x2000,%eax
or     %eax,%edx
and    $0xffffdfff,%ecx
or     %eax,%ecx
movq   $0x40,0x400fe058
test   %edi,%edi
js     1248 <SysCtlClockSet+0x138>
movslq %edx,%rax
mov    %rax,0x400fe060
40
movslq %ecx,%rax
mov    %rax,0x400fe070
40
jmp    125e <SysCtlClockSet+0x14e>
movslq %ecx,%rax
mov    %rax,0x400fe070
40
movslq %edx,%rax
mov    %rax,0x400fe060
40
and    $0xf83ffffe,%edx
mov    %edi,%eax
and    $0x7c00001,%eax
or     %edx,%eax
and    $0xe07fffff,%ecx
mov    %edi,%edx
and    $0x1f800000,%edx
or     %ecx,%edx
test   $0x40000000,%edi
jne    1297 <SysCtlClockSet+0x187>
and    $0xbfffffff,%edx
mov    %edx,%ecx
test   $0x800,%edi
je     12b4 <SysCtlClockSet+0x1a4>
jmp    12e3 <SysCtlClockSet+0x1d3>
or     $0x400000,%eax
and    $0xffbfffff,%edx
mov    %edi,%ecx
and    $0x40400000,%ecx
or     %edx,%ecx
test   $0x800,%edi
jne    12e3 <SysCtlClockSet+0x1d3>
mov    $0x8000,%edx
nopl   0x0(%rax)
mov    0x400fe168,%rsi
40
test   $0x1,%sil
jne    12d8 <SysCtlClockSet+0x1c8>
lea    -0x1(%rdx),%esi
cmp    $0x1,%edx
mov    %esi,%edx
ja     12c0 <SysCtlClockSet+0x1b0>
and    $0xfffff7ff,%eax
and    $0xfffff7ff,%ecx
cltq
mov    %rax,0x400fe060
40
movslq %ecx,%rax
mov    %rax,0x400fe070
40
mov    $0x10,%edi
jmp    1030 <SysCtlDelay@plt>
ret

LLVM IR (-O0):
define void @SysCtlClockSet(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load volatile i64, i64* inttoptr (i64 1074782304 to i64*)
%7 = trunc i64 %6 to i32
store i32 %7, i32* %4
%8 = load volatile i64, i64* inttoptr (i64 1074782320 to i64*)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = or i32 %10, 2048
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = and i32 %12, -4194305
store i32 %13, i32* %4
%14 = load i32, i32* %5
%15 = or i32 %14, 2048
store i32 %15, i32* %5
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
store volatile i64 %17, i64* inttoptr (i64 1074782304 to i64*)
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
store volatile i64 %19, i64* inttoptr (i64 1074782320 to i64*)
%20 = load i32, i32* %4
%21 = and i32 %20, 1
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %51
23: ; preds = %1
%24 = load i32, i32* %2
%25 = and i32 %24, 1
%26 = icmp ne i32 %25, 0
br i1 %26, label %51, label %27
27: ; preds = %23
%28 = load i32, i32* %2
%29 = and i32 %28, 1
%30 = or i32 -2, %29
%31 = load i32, i32* %4
%32 = and i32 %31, %30
store i32 %32, i32* %4
store volatile i64 256, i64* inttoptr (i64 1074782296 to i64*)
%33 = load i32, i32* %4
%34 = sext i32 %33 to i64
store volatile i64 %34, i64* inttoptr (i64 1074782304 to i64*)
store i32 524288, i32* %3
br label %35
35: ; preds = %45, %27
%36 = load volatile i64, i64* inttoptr (i64 1074782288 to i64*)
%37 = and i64 %36, 256
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %46
39: ; preds = %35
%40 = load i32, i32* %3
%41 = add nsw i32 %40, -1
store i32 %41, i32* %3
%42 = load i32, i32* %3
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %45
44: ; preds = %39
br label %46
45: ; preds = %39
br label %35
46: ; preds = %44, %35
%47 = load i32, i32* %3
%48 = icmp eq i32 %47, 0
br i1 %48, label %49, label %50
49: ; preds = %46
br label %154
50: ; preds = %46
br label %51
51: ; preds = %50, %23, %1
%52 = load i32, i32* %4
%53 = and i32 %52, -2033
store i32 %53, i32* %4
%54 = load i32, i32* %2
%55 = and i32 %54, 2032
%56 = load i32, i32* %4
%57 = or i32 %56, %55
store i32 %57, i32* %4
%58 = load i32, i32* %5
%59 = and i32 %58, 2147483535
store i32 %59, i32* %5
%60 = load i32, i32* %2
%61 = and i32 %60, -2147483600
%62 = load i32, i32* %5
%63 = or i32 %62, %61
store i32 %63, i32* %5
%64 = load i32, i32* %2
%65 = and i32 %64, 8
%66 = shl i32 %65, 3
%67 = load i32, i32* %5
%68 = or i32 %67, %66
store i32 %68, i32* %5
%69 = load i32, i32* %4
%70 = sext i32 %69 to i64
store volatile i64 %70, i64* inttoptr (i64 1074782304 to i64*)
%71 = load i32, i32* %5
%72 = sext i32 %71 to i64
store volatile i64 %72, i64* inttoptr (i64 1074782320 to i64*)
%73 = load i32, i32* %4
%74 = and i32 %73, -8193
store i32 %74, i32* %4
%75 = load i32, i32* %2
%76 = and i32 %75, 8192
%77 = load i32, i32* %4
%78 = or i32 %77, %76
store i32 %78, i32* %4
%79 = load i32, i32* %5
%80 = and i32 %79, -8193
store i32 %80, i32* %5
%81 = load i32, i32* %2
%82 = and i32 %81, 8192
%83 = load i32, i32* %5
%84 = or i32 %83, %82
store i32 %84, i32* %5
store volatile i64 64, i64* inttoptr (i64 1074782296 to i64*)
%85 = load i32, i32* %5
%86 = and i32 %85, -2147483648
%87 = icmp ne i32 %86, 0
br i1 %87, label %88, label %93
88: ; preds = %51
%89 = load i32, i32* %5
%90 = sext i32 %89 to i64
store volatile i64 %90, i64* inttoptr (i64 1074782320 to i64*)
%91 = load i32, i32* %4
%92 = sext i32 %91 to i64
store volatile i64 %92, i64* inttoptr (i64 1074782304 to i64*)
br label %98
93: ; preds = %51
%94 = load i32, i32* %4
%95 = sext i32 %94 to i64
store volatile i64 %95, i64* inttoptr (i64 1074782304 to i64*)
%96 = load i32, i32* %5
%97 = sext i32 %96 to i64
store volatile i64 %97, i64* inttoptr (i64 1074782320 to i64*)
br label %98
98: ; preds = %93, %88
%99 = load i32, i32* %4
%100 = and i32 %99, -130023426
store i32 %100, i32* %4
%101 = load i32, i32* %2
%102 = and i32 %101, 130023425
%103 = load i32, i32* %4
%104 = or i32 %103, %102
store i32 %104, i32* %4
%105 = load i32, i32* %5
%106 = and i32 %105, -528482305
store i32 %106, i32* %5
%107 = load i32, i32* %2
%108 = and i32 %107, 528482304
%109 = load i32, i32* %5
%110 = or i32 %109, %108
store i32 %110, i32* %5
%111 = load i32, i32* %2
%112 = and i32 %111, 1073741824
%113 = icmp ne i32 %112, 0
br i1 %113, label %114, label %123
114: ; preds = %98
%115 = load i32, i32* %4
%116 = or i32 %115, 4194304
store i32 %116, i32* %4
%117 = load i32, i32* %5
%118 = and i32 %117, -4194305
store i32 %118, i32* %5
%119 = load i32, i32* %2
%120 = and i32 %119, 1077936128
%121 = load i32, i32* %5
%122 = or i32 %121, %120
store i32 %122, i32* %5
br label %126
123: ; preds = %98
%124 = load i32, i32* %5
%125 = and i32 %124, -1073741825
store i32 %125, i32* %5
br label %126
126: ; preds = %123, %114
%127 = load i32, i32* %2
%128 = and i32 %127, 2048
%129 = icmp ne i32 %128, 0
br i1 %129, label %148, label %130
130: ; preds = %126
store i32 32768, i32* %3
br label %131
131: ; preds = %140, %130
%132 = load i32, i32* %3
%133 = icmp sgt i32 %132, 0
br i1 %133, label %134, label %143
134: ; preds = %131
%135 = load volatile i64, i64* inttoptr (i64 1074782568 to i64*)
%136 = and i64 %135, 1
%137 = icmp ne i64 %136, 0
br i1 %137, label %138, label %139
138: ; preds = %134
br label %143
139: ; preds = %134
br label %140
140: ; preds = %139
%141 = load i32, i32* %3
%142 = add nsw i32 %141, -1
store i32 %142, i32* %3
br label %131
143: ; preds = %138, %131
%144 = load i32, i32* %4
%145 = and i32 %144, -2049
store i32 %145, i32* %4
%146 = load i32, i32* %5
%147 = and i32 %146, -2049
store i32 %147, i32* %5
br label %148
148: ; preds = %143, %126
%149 = load i32, i32* %4
%150 = sext i32 %149 to i64
store volatile i64 %150, i64* inttoptr (i64 1074782304 to i64*)
%151 = load i32, i32* %5
%152 = sext i32 %151 to i64
store volatile i64 %152, i64* inttoptr (i64 1074782320 to i64*)
%153 = call i32 @SysCtlDelay(i32 16)
br label %154
154: ; preds = %148, %49
ret void
}

LLVM IR (-O2):
define void @SysCtlClockSet(i32 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074782304 to i64*)
%3 = trunc i64 %2 to i32
%4 = load volatile i64, i64* inttoptr (i64 1074782320 to i64*)
%5 = trunc i64 %4 to i32
%6 = and i32 %3, -4196353
%7 = or i32 %6, 2048
%8 = or i32 %5, 2048
%9 = sext i32 %7 to i64
store volatile i64 %9, i64* inttoptr (i64 1074782304 to i64*)
%10 = sext i32 %8 to i64
store volatile i64 %10, i64* inttoptr (i64 1074782320 to i64*)
%11 = and i32 %3, 1
%12 = icmp ne i32 %11, 0
%13 = and i32 %0, 1
%14 = icmp eq i32 %13, 0
%15 = and i1 %14, %12
br i1 %15, label %16, label %42
16: ; preds = %1
%17 = and i32 %7, -4194306
store volatile i64 256, i64* inttoptr (i64 1074782296 to i64*)
%18 = sext i32 %17 to i64
store volatile i64 %18, i64* inttoptr (i64 1074782304 to i64*)
br label %19
19: ; preds = %36, %16
%20 = phi i32 [ 524288, %16 ], [ %37, %36 ]
%21 = load volatile i64, i64* inttoptr (i64 1074782288 to i64*)
%22 = and i64 %21, 256
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %39
24: ; preds = %19
%25 = load volatile i64, i64* inttoptr (i64 1074782288 to i64*)
%26 = and i64 %25, 256
%27 = icmp eq i64 %26, 0
br i1 %27, label %28, label %39
28: ; preds = %24
%29 = load volatile i64, i64* inttoptr (i64 1074782288 to i64*)
%30 = and i64 %29, 256
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %39
32: ; preds = %28
%33 = load volatile i64, i64* inttoptr (i64 1074782288 to i64*)
%34 = and i64 %33, 256
%35 = icmp eq i64 %34, 0
br i1 %35, label %36, label %39
36: ; preds = %32
%37 = add nsw i32 %20, -4
%38 = icmp eq i32 %37, 0
br i1 %38, label %105, label %19
39: ; preds = %32, %28, %24, %19
%40 = phi i32 [ %20, %19 ], [ 1, %24 ], [ 1, %28 ], [ 1, %32 ]
%41 = icmp eq i32 %40, 0
br i1 %41, label %105, label %42
42: ; preds = %39, %1
%43 = phi i32 [ %17, %39 ], [ %7, %1 ]
%44 = and i32 %43, -2033
%45 = and i32 %0, 2032
%46 = or i32 %44, %45
%47 = and i32 %8, 2147483535
%48 = and i32 %0, -2147483600
%49 = shl i32 %0, 3
%50 = and i32 %49, 64
%51 = or i32 %50, %48
%52 = or i32 %51, %47
%53 = sext i32 %46 to i64
store volatile i64 %53, i64* inttoptr (i64 1074782304 to i64*)
%54 = sext i32 %52 to i64
store volatile i64 %54, i64* inttoptr (i64 1074782320 to i64*)
%55 = and i32 %46, -8193
%56 = and i32 %0, 8192
%57 = or i32 %55, %56
%58 = and i32 %52, -8193
%59 = or i32 %58, %56
store volatile i64 64, i64* inttoptr (i64 1074782296 to i64*)
%60 = icmp sgt i32 %0, -1
br i1 %60, label %64, label %61
61: ; preds = %42
%62 = sext i32 %59 to i64
store volatile i64 %62, i64* inttoptr (i64 1074782320 to i64*)
%63 = sext i32 %57 to i64
store volatile i64 %63, i64* inttoptr (i64 1074782304 to i64*)
br label %67
64: ; preds = %42
%65 = sext i32 %57 to i64
store volatile i64 %65, i64* inttoptr (i64 1074782304 to i64*)
%66 = sext i32 %59 to i64
store volatile i64 %66, i64* inttoptr (i64 1074782320 to i64*)
br label %67
67: ; preds = %64, %61
%68 = and i32 %57, -130023426
%69 = and i32 %0, 130023425
%70 = or i32 %68, %69
%71 = and i32 %59, -528482305
%72 = and i32 %0, 528482304
%73 = or i32 %71, %72
%74 = and i32 %0, 1073741824
%75 = icmp eq i32 %74, 0
br i1 %75, label %81, label %76
76: ; preds = %67
%77 = or i32 %70, 4194304
%78 = and i32 %73, -4194305
%79 = and i32 %0, 1077936128
%80 = or i32 %78, %79
br label %83
81: ; preds = %67
%82 = and i32 %73, -1073741825
br label %83
83: ; preds = %81, %76
%84 = phi i32 [ %77, %76 ], [ %70, %81 ]
%85 = phi i32 [ %80, %76 ], [ %82, %81 ]
%86 = and i32 %0, 2048
%87 = icmp eq i32 %86, 0
br i1 %87, label %88, label %99
88: ; preds = %83, %88
%89 = phi i32 [ %93, %88 ], [ 32768, %83 ]
%90 = load volatile i64, i64* inttoptr (i64 1074782568 to i64*)
%91 = and i64 %90, 1
%92 = icmp eq i64 %91, 0
%93 = add nsw i32 %89, -1
%94 = icmp ugt i32 %89, 1
%95 = select i1 %92, i1 %94, i1 false
br i1 %95, label %88, label %96
96: ; preds = %88
%97 = and i32 %84, -2049
%98 = and i32 %85, -2049
br label %99
99: ; preds = %96, %83
%100 = phi i32 [ %84, %83 ], [ %97, %96 ]
%101 = phi i32 [ %85, %83 ], [ %98, %96 ]
%102 = sext i32 %100 to i64
store volatile i64 %102, i64* inttoptr (i64 1074782304 to i64*)
%103 = sext i32 %101 to i64
store volatile i64 %103, i64* inttoptr (i64 1074782320 to i64*)
%104 = tail call i32 @SysCtlDelay(i32 16)
br label %105
105: ; preds = %36, %39, %99
ret void
}