#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct nand_store {
  int dummy;
};
struct nand_chip {
  int dummy;
};

/* Variables and functions */
struct nand_chip *nandsim_init(struct nand_store *, int);
struct nand_store *nandstore_file_init(char const *, int, int, int, int);
struct nand_chip *nandsim_file_init(const char *fname, int blocks,
                                    int pages_per_block,
                                    int data_bytes_per_page,
                                    int spare_bytes_per_page,
                                    int bus_width_shift) {
  struct nand_store *store = NULL;
  struct nand_chip *chip = NULL;
  store = nandstore_file_init(fname, blocks, pages_per_block,
                              data_bytes_per_page, spare_bytes_per_page);
  if (store)
    chip = nandsim_init(store, bus_width_shift);
  if (chip)
    return chip;
  if (store) {
  }
  return NULL;
}


x86 assembly (clang, -O0):
<nandsim_file_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movq   $0x0,-0x30(%rbp)
movq   $0x0,-0x38(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
call   1040 <nandstore_file_init@plt>
mov    %rax,-0x30(%rbp)
cmpq   $0x0,-0x30(%rbp)
je     1182 <nandsim_file_init+0x62>
mov    -0x30(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1030 <nandsim_init@plt>
mov    %rax,-0x38(%rbp)
cmpq   $0x0,-0x38(%rbp)
je     119a <nandsim_file_init+0x7a>
mov    -0x38(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    11b2 <nandsim_file_init+0x92>
cmpq   $0x0,-0x30(%rbp)
je     11aa <nandsim_file_init+0x8a>
jmp    11aa <nandsim_file_init+0x8a>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nandsim_file_init>:
push   %rbx
mov    %r9d,%ebx
call   1040 <nandstore_file_init@plt>
test   %rax,%rax
je     1139 <nandsim_file_init+0x19>
mov    %rax,%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <nandsim_init@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.nand_chip = type { i32 }
%struct.nand_store = type { i32 }
define %struct.nand_chip* @nandsim_file_init(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca %struct.nand_chip*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca %struct.nand_store*
%15 = alloca %struct.nand_chip*
store i8* %0, i8** %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store %struct.nand_store* null, %struct.nand_store** %14
store %struct.nand_chip* null, %struct.nand_chip** %15
%16 = load i8*, i8** %8
%17 = load i32, i32* %9
%18 = load i32, i32* %10
%19 = load i32, i32* %11
%20 = load i32, i32* %12
%21 = call %struct.nand_store* @nandstore_file_init(i8* %16, i32 %17, i32 %18, i32 %19, i32 %20)
store %struct.nand_store* %21, %struct.nand_store** %14
%22 = load %struct.nand_store*, %struct.nand_store** %14
%23 = icmp ne %struct.nand_store* %22, null
br i1 %23, label %24, label %28
24: ; preds = %6
%25 = load %struct.nand_store*, %struct.nand_store** %14
%26 = load i32, i32* %13
%27 = call %struct.nand_chip* @nandsim_init(%struct.nand_store* %25, i32 %26)
store %struct.nand_chip* %27, %struct.nand_chip** %15
br label %28
28: ; preds = %24, %6
%29 = load %struct.nand_chip*, %struct.nand_chip** %15
%30 = icmp ne %struct.nand_chip* %29, null
br i1 %30, label %31, label %33
31: ; preds = %28
%32 = load %struct.nand_chip*, %struct.nand_chip** %15
store %struct.nand_chip* %32, %struct.nand_chip** %7
br label %38
33: ; preds = %28
%34 = load %struct.nand_store*, %struct.nand_store** %14
%35 = icmp ne %struct.nand_store* %34, null
br i1 %35, label %36, label %37
36: ; preds = %33
br label %37
37: ; preds = %36, %33
store %struct.nand_chip* null, %struct.nand_chip** %7
br label %38
38: ; preds = %37, %31
%39 = load %struct.nand_chip*, %struct.nand_chip** %7
ret %struct.nand_chip* %39
}

LLVM IR (-O2):
%struct.nand_chip = type { i32 }
%struct.nand_store = type { i32 }
define %struct.nand_chip* @nandsim_file_init(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call %struct.nand_store* @nandstore_file_init(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4)
%8 = icmp eq %struct.nand_store* %7, null
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = tail call %struct.nand_chip* @nandsim_init(%struct.nand_store* %7, i32 %5)
br label %11
11: ; preds = %9, %6
%12 = phi %struct.nand_chip* [ %10, %9 ], [ null, %6 ]
ret %struct.nand_chip* %12
}