xunge/DecIR huggingface dataset:
long longconv(long inval) {
  char *ptc1, *ptc2;
  int i, j;
  long outval;
  ptc1 = (char *)(&inval);
  ptc2 = (char *)(&outval);
  for (i = 0, j = 3; i < 4; i++, j--) {
    *(ptc2 + i) = *(ptc1 + j);
  }
  return (outval);
}


x86 assembly (clang, -O0):
<longconv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x28(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x3,-0x20(%rbp)
cmpl   $0x4,-0x1c(%rbp)
jge    115d <longconv+0x5d>
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x20(%rbp)
jmp    1126 <longconv+0x26>
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longconv>:
mov    %rdi,%rax
bswap  %eax
ret

LLVM IR (-O0):
define i64 @longconv(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i64 %0, i64* %2
%8 = bitcast i64* %2 to i8*
store i8* %8, i8** %3
%9 = bitcast i64* %7 to i8*
store i8* %9, i8** %4
store i32 0, i32* %5
store i32 3, i32* %6
br label %10
10: ; preds = %23, %1
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 4
br i1 %12, label %13, label %28
13: ; preds = %10
%14 = load i8*, i8** %3
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = load i8*, i8** %4
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 %18, i8* %22
br label %23
23: ; preds = %13
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
%26 = load i32, i32* %6
%27 = add nsw i32 %26, -1
store i32 %27, i32* %6
br label %10
28: ; preds = %10
%29 = load i64, i64* %7
ret i64 %29
}

LLVM IR (-O2):
define i64 @longconv(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = call i32 @llvm.bswap.i32(i32 %2)
%4 = zext i32 %3 to i64
ret i64 %4
}
void WatchdogResetEnable(void) {
  (*((volatile unsigned long
          *)(((unsigned long)(0x40080000 + 0x00000008) & 0xF0000000) |
             0x02000000 |
             (((unsigned long)(0x40080000 + 0x00000008) & 0x000FFFFF) << 5) |
             ((1) << 2)))) = 1;
}


x86 assembly (clang, -O0):
<WatchdogResetEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43000104,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogResetEnable>:
movq   $0x1,0x43000104
ret

LLVM IR (-O0):
define void @WatchdogResetEnable() {
store volatile i64 1, i64* inttoptr (i64 1124073732 to i64*)
ret void
}

LLVM IR (-O2):
define void @WatchdogResetEnable() {
store volatile i64 1, i64* inttoptr (i64 1124073732 to i64*)
ret void
}
/* Type definitions */
struct mg_connection {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mg_printf(struct mg_connection *, char *, int /*<<< orphan*/,
                             char const *);
int /*<<< orphan*/ strlen(char const *);
void send_error(struct mg_connection *conn, const char *msg) {
  mg_printf(conn,
            "HTTP/1.1 500 Internal Server Error\r\n"
            "Expires: Thu, 01-Jan-1970 00:00:01 GMT\r\n"
            "Cache: no-cache\r\n"
            "max-age: 0\r\n"
            "s-maxage: 0\r\n"
            "Cache-Control: no-cache, no-store, must-revalidate\r\n"
            "Content-Type: text/plain\r\n"
            "Content-Length: %d\r\n\r\n"
            "%s",
            strlen(msg), msg);
}


x86 assembly (clang, -O0):
<send_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%edx
mov    -0x10(%rbp),%rcx
lea    0xeae(%rip),%rsi
call   1030 <mg_printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_error>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
lea    0xec7(%rip),%rsi
mov    %r14,%rdi
mov    %eax,%edx
mov    %rbx,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <mg_printf@plt>

LLVM IR (-O0):
%struct.mg_connection = type { i32 }
@.str = [221 x i8] c"HTTP/1.1 500 Internal Server Error\0D\0AExpires: Thu, 01-Jan-1970 00:00:01 GMT\0D\0ACache: no-cache\0D\0Amax-age: 0\0D\0As-maxage: 0\0D\0ACache-Control: no-cache, no-store, must-revalidate\0D\0AContent-Type: text/plain\0D\0AContent-Length: %d\0D\0A\0D\0A%s\00"
define void @send_error(%struct.mg_connection* %0, i8* %1) {
%3 = alloca %struct.mg_connection*
%4 = alloca i8*
store %struct.mg_connection* %0, %struct.mg_connection** %3
store i8* %1, i8** %4
%5 = load %struct.mg_connection*, %struct.mg_connection** %3
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i32 @mg_printf(%struct.mg_connection* %5, i8* getelementptr inbounds ([221 x i8], [221 x i8]* @.str, i64 0, i64 0), i32 %7, i8* %8)
ret void
}

LLVM IR (-O2):
%struct.mg_connection = type { i32 }
@.str = [221 x i8] c"HTTP/1.1 500 Internal Server Error\0D\0AExpires: Thu, 01-Jan-1970 00:00:01 GMT\0D\0ACache: no-cache\0D\0Amax-age: 0\0D\0As-maxage: 0\0D\0ACache-Control: no-cache, no-store, must-revalidate\0D\0AContent-Type: text/plain\0D\0AContent-Length: %d\0D\0A\0D\0A%s\00"
define void @send_error(%struct.mg_connection* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @mg_printf(%struct.mg_connection* %0, i8* getelementptr inbounds ([221 x i8], [221 x i8]* @.str, i64 0, i64 0), i32 %3, i8* %1)
ret void
}
int double_interpolate(double z, double a, double b, double *c) {
  *c = (1.0 - z) * a + z * b;
  return 0;
}


x86 assembly (clang, -O0):
<double_interpolate>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
mov    %rdi,-0x20(%rbp)
movsd  0xee1(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
mov    -0x20(%rbp),%rax
movsd  %xmm0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_interpolate>:
movsd  0xef8(%rip),%xmm3
subsd  %xmm0,%xmm3
mulsd  %xmm0,%xmm2
mulsd  %xmm1,%xmm3
addsd  %xmm2,%xmm3
movsd  %xmm3,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @double_interpolate(double %0, double %1, double %2, double* %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double*
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double* %3, double** %8
%9 = load double, double* %5
%10 = fsub double 1.000000e+00, %9
%11 = load double, double* %6
%12 = load double, double* %5
%13 = load double, double* %7
%14 = fmul double %12, %13
%15 = call double @llvm.fmuladd.f64(double %10, double %11, double %14)
%16 = load double*, double** %8
store double %15, double* %16
ret i32 0
}

LLVM IR (-O2):
define i32 @double_interpolate(double %0, double %1, double %2, double* nocapture writeonly %3) {
%5 = fsub double 1.000000e+00, %0
%6 = fmul double %0, %2
%7 = tail call double @llvm.fmuladd.f64(double %5, double %1, double %6)
store double %7, double* %3
ret i32 0
}
/* Variables and functions */
int genrand_int32();
double genrand_res53(void) {
  unsigned long a = genrand_int32() >> 5, b = genrand_int32() >> 6;
  return (1.0 * a * 67108864.0 + b) * (1.0 / 9007199254740992.0);
}


x86 assembly (clang, -O0):
<genrand_res53>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %eax,%eax
mov    %al,-0x11(%rbp)
call   1030 <genrand_int32@plt>
mov    %eax,%ecx
mov    -0x11(%rbp),%al
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    %rcx,-0x8(%rbp)
call   1030 <genrand_int32@plt>
sar    $0x6,%eax
cltq
mov    %rax,-0x10(%rbp)
movaps 0xeca(%rip),%xmm3
movq   -0x8(%rbp),%xmm0
punpckldq %xmm3,%xmm0
movapd 0xec9(%rip),%xmm2
subpd  %xmm2,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movq   -0x10(%rbp),%xmm1
punpckldq %xmm3,%xmm1
subpd  %xmm2,%xmm1
movaps %xmm1,%xmm2
unpckhpd %xmm1,%xmm1
addsd  %xmm2,%xmm1
movsd  0xe82(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe6a(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_res53>:
push   %rbx
xor    %eax,%eax
call   1030 <genrand_int32@plt>
sar    $0x5,%eax
movslq %eax,%rbx
xor    %eax,%eax
call   1030 <genrand_int32@plt>
sar    $0x6,%eax
cltq
movq   %rbx,%xmm1
movdqa 0xec9(%rip),%xmm2
punpckldq %xmm2,%xmm1
movapd 0xecd(%rip),%xmm3
subpd  %xmm3,%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
movq   %rax,%xmm1
punpckldq %xmm2,%xmm1
subpd  %xmm3,%xmm1
movapd %xmm1,%xmm2
unpckhpd %xmm1,%xmm2
mulsd  0xeb0(%rip),%xmm0
addsd  %xmm1,%xmm2
addsd  %xmm2,%xmm0
mulsd  0xea8(%rip),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @genrand_res53() {
%1 = alloca i64
%2 = alloca i64
%3 = call i32 (...) @genrand_int32()
%4 = ashr i32 %3, 5
%5 = sext i32 %4 to i64
store i64 %5, i64* %1
%6 = call i32 (...) @genrand_int32()
%7 = ashr i32 %6, 6
%8 = sext i32 %7 to i64
store i64 %8, i64* %2
%9 = load i64, i64* %1
%10 = uitofp i64 %9 to double
%11 = fmul double 1.000000e+00, %10
%12 = load i64, i64* %2
%13 = uitofp i64 %12 to double
%14 = call double @llvm.fmuladd.f64(double %11, double 0x4190000000000000, double %13)
%15 = fmul double %14, 0x3CA0000000000000
ret double %15
}

LLVM IR (-O2):
define double @genrand_res53() {
%1 = tail call i32 (...) @genrand_int32()
%2 = ashr i32 %1, 5
%3 = sext i32 %2 to i64
%4 = tail call i32 (...) @genrand_int32()
%5 = ashr i32 %4, 6
%6 = sext i32 %5 to i64
%7 = uitofp i64 %3 to double
%8 = uitofp i64 %6 to double
%9 = tail call double @llvm.fmuladd.f64(double %7, double 0x4190000000000000, double %8)
%10 = fmul double %9, 0x3CA0000000000000
ret double %10
}
unsigned short int cast_ulong_ushort_fast(unsigned long int x) {
  return (unsigned short int)x;
}


x86 assembly (clang, -O0):
<cast_ulong_ushort_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_ulong_ushort_fast>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define zeroext i16 @cast_ulong_ushort_fast(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @cast_ulong_ushort_fast(i64 %0) {
%2 = trunc i64 %0 to i16
ret i16 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int cichlid_rotate_right_32(int, int);
uint32_t sigma1(uint32_t x) {
  return cichlid_rotate_right_32(x, 17) ^ cichlid_rotate_right_32(x, 19) ^
         (x >> 10);
}


x86 assembly (clang, -O0):
<sigma1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x11,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x13,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
xor    %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0xa,%ecx
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigma1>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x11,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    $0x13,%esi
call   1030 <cichlid_rotate_right_32@plt>
sar    $0xa,%ebx
xor    %ebp,%ebx
xor    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sigma1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cichlid_rotate_right_32(i32 %3, i32 17)
%5 = load i32, i32* %2
%6 = call i32 @cichlid_rotate_right_32(i32 %5, i32 19)
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = ashr i32 %8, 10
%10 = xor i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @sigma1(i32 %0) {
%2 = tail call i32 @cichlid_rotate_right_32(i32 %0, i32 17)
%3 = tail call i32 @cichlid_rotate_right_32(i32 %0, i32 19)
%4 = ashr i32 %0, 10
%5 = xor i32 %2, %4
%6 = xor i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void error(char *errorMessage) {
  perror(errorMessage);
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @error(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void clear_screen() { printf("\033[1;1H\033[2J"); }


x86 assembly (clang, -O0):
<clear_screen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_screen>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\1B[1;1H\1B[2J\00"
define void @clear_screen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"\1B[1;1H\1B[2J\00"
define void @clear_screen() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double __nv_rnorm3d(double, double, double);
double rnorm3d(double __a, double __b, double __c) {
  return __nv_rnorm3d(__a, __b, __c);
}


x86 assembly (clang, -O0):
<rnorm3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <__nv_rnorm3d@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnorm3d>:
jmp    1030 <__nv_rnorm3d@plt>

LLVM IR (-O0):
define double @rnorm3d(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @__nv_rnorm3d(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @rnorm3d(double %0, double %1, double %2) {
%4 = tail call double @__nv_rnorm3d(double %0, double %1, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ my_printnbr(unsigned long, char *, int);
int /*<<< orphan*/ my_putchar(int /*<<< orphan*/);
int /*<<< orphan*/ my_putstr(char *);
int my_putptr(unsigned long nbr) {
  if (nbr == 0) {
    my_putchar('0');
    return (0);
  }
  my_putstr("0x");
  my_printnbr(nbr, "0123456789abcdef", 16);
  return (0);
}


x86 assembly (clang, -O0):
<my_putptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115d <my_putptr+0x2d>
mov    $0x30,%edi
call   1030 <my_putchar@plt>
movl   $0x0,-0x4(%rbp)
jmp    1185 <my_putptr+0x55>
lea    0xe9c(%rip),%rdi
call   1040 <my_putstr@plt>
mov    -0x10(%rbp),%rdi
lea    0xe8f(%rip),%rsi
mov    $0x10,%edx
call   1050 <my_printnbr@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_putptr>:
push   %rbx
test   %rdi,%rdi
je     115b <my_putptr+0x2b>
mov    %rdi,%rbx
lea    0xec0(%rip),%rdi
call   1040 <my_putstr@plt>
lea    0xeb7(%rip),%rsi
mov    %rbx,%rdi
mov    $0x10,%edx
call   1050 <my_printnbr@plt>
jmp    1165 <my_putptr+0x35>
mov    $0x30,%edi
call   1030 <my_putchar@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"0x\00"
@.str.1 = [17 x i8] c"0123456789abcdef\00"
define i32 @my_putptr(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @my_putchar(i32 48)
store i32 0, i32* %2
br label %12
8: ; preds = %1
%9 = call i32 @my_putstr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%10 = load i64, i64* %3
%11 = call i32 @my_printnbr(i64 %10, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 16)
store i32 0, i32* %2
br label %12
12: ; preds = %8, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [3 x i8] c"0x\00"
@.str.1 = [17 x i8] c"0123456789abcdef\00"
define i32 @my_putptr(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @my_putchar(i32 48)
br label %8
5: ; preds = %1
%6 = tail call i32 @my_putstr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @my_printnbr(i64 %0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 16)
br label %8
8: ; preds = %5, %3
ret i32 0
}
int getWaitExitCore(int *statp) { return -1; }


x86 assembly (clang, -O0):
<getWaitExitCore>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getWaitExitCore>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @getWaitExitCore(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @getWaitExitCore(i32* nocapture readnone %0) {
ret i32 -1
}
/* Type definitions */
typedef size_t uint8_t;

/* Variables and functions */
int maxDisplayFigure(uint8_t figure, uint8_t *display, uint8_t start_digit,
                     uint8_t len) {
  uint8_t i = 3, limit = 1;
  uint8_t aux = 123;
  display[i] = aux;
  return 0;
}


x86 assembly (clang, -O0):
<maxDisplayFigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movq   $0x3,-0x28(%rbp)
movq   $0x1,-0x30(%rbp)
movq   $0x7b,-0x38(%rbp)
mov    -0x38(%rbp),%rdx
mov    -0x10(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxDisplayFigure>:
movq   $0x7b,0x18(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @maxDisplayFigure(i64 %0, i64* %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store i64 %0, i64* %5
store i64* %1, i64** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
store i64 3, i64* %9
store i64 1, i64* %10
store i64 123, i64* %11
%12 = load i64, i64* %11
%13 = load i64*, i64** %6
%14 = load i64, i64* %9
%15 = getelementptr inbounds i64, i64* %13, i64 %14
store i64 %12, i64* %15
ret i32 0
}

LLVM IR (-O2):
define i32 @maxDisplayFigure(i64 %0, i64* nocapture writeonly %1, i64 %2, i64 %3) {
%5 = getelementptr inbounds i64, i64* %1, i64 3
store i64 123, i64* %5
ret i32 0
}
unsigned long get_cr3_raw(void) {
  unsigned long cr3;
  __asm__ volatile("mov %%cr3, %0" : "=r"(cr3));
  return (cr3);
}


x86 assembly (clang, -O0):
<get_cr3_raw>:
push   %rbp
mov    %rsp,%rbp
mov    %cr3,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cr3_raw>:
mov    %cr3,%rax
ret

LLVM IR (-O0):
define i64 @get_cr3_raw() {
%1 = alloca i64
%2 = call i64 asm sideeffect "mov %cr3, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @get_cr3_raw() {
%1 = tail call i64 asm sideeffect "mov %cr3, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int warterm_move(int r, int c) {
  printf("@\01%d\01%d\01\n", r, c);
  return 0;
}


x86 assembly (clang, -O0):
<warterm_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<warterm_move>:
push   %rax
mov    %esi,%edx
mov    %edi,%esi
lea    0xee4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"@\01%d\01%d\01\0A\00"
define i32 @warterm_move(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"@\01%d\01%d\01\0A\00"
define i32 @warterm_move(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_pstream_send_error() {
  printf("NOT IMPLEMENTED:"
         "pa_pstream_send_error"
         "\n");
}


x86 assembly (clang, -O0):
<pa_pstream_send_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_pstream_send_error>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"NOT IMPLEMENTED:pa_pstream_send_error\0A\00"
define i32 @pa_pstream_send_error() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [38 x i8] c"NOT IMPLEMENTED:pa_pstream_send_error\00"
define i32 @pa_pstream_send_error() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
int __byte_clone_array(const uint8_t *p, uint8_t *q, int elements) {
  memcpy(q, p, elements * sizeof(uint8_t));
  return 0;
}


x86 assembly (clang, -O0):
<__byte_clone_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0x14(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__byte_clone_array>:
push   %rax
mov    %rdi,%rax
shl    $0x2,%edx
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <memcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__byte_clone_array(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 4
%12 = trunc i64 %11 to i32
%13 = call i32 @memcpy(i32* %7, i32* %8, i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @__byte_clone_array(i32* %0, i32* %1, i32 %2) {
%4 = shl i32 %2, 2
%5 = tail call i32 @memcpy(i32* %1, i32* %0, i32 %4)
ret i32 0
}
void lowerize(string) char *string;
{
  char *p;
  p = string;
  while (*p != '\0') {
    *p = tolower(*p);
    p++;
  }
}


x86 assembly (clang, -O0):
<lowerize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1159 <lowerize+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <lowerize+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowerize>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1136 <lowerize+0x26>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <lowerize+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @lowerize(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = call i32 @tolower(i32 %13)
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %3
store i8 %15, i8* %16
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
br label %5
19: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @lowerize(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %11, %4 ], [ %2, %1 ]
%6 = phi i8* [ %10, %4 ], [ %0, %1 ]
%7 = sext i8 %5 to i32
%8 = tail call i32 @tolower(i32 %7)
%9 = trunc i32 %8 to i8
store i8 %9, i8* %6
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
ret void
}
void rop3_17_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = *D | S;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_17_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_17_0_0>:
or     (%rdi),%sil
not    %sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_17_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8, i8* %7
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %7
%19 = load i8, i8* %7
%20 = load i8*, i8** %4
store i8 %19, i8* %20
ret void
}

LLVM IR (-O2):
define void @rop3_17_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = xor i8 %5, -1
store i8 %6, i8* %0
ret void
}
int isEmpty(struct StackNode *root) { return !root; }


x86 assembly (clang, -O0):
<isEmpty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEmpty>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.StackNode = type opaque
define i32 @isEmpty(%struct.StackNode* %0) {
%2 = alloca %struct.StackNode*
store %struct.StackNode* %0, %struct.StackNode** %2
%3 = load %struct.StackNode*, %struct.StackNode** %2
%4 = icmp ne %struct.StackNode* %3, null
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.StackNode = type opaque
define i32 @isEmpty(%struct.StackNode* readnone %0) {
%2 = icmp eq %struct.StackNode* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
scalar_t__ isdigit(int);
int isxdigit(int c) {
  return isdigit(c) || (c >= 'a' && c <= 'f') || (c >= 'A' && c <= 'F');
}


x86 assembly (clang, -O0):
<isxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    116d <isxdigit+0x5d>
cmpl   $0x61,-0x4(%rbp)
jl     114e <isxdigit+0x3e>
mov    $0x1,%al
cmpl   $0x66,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116d <isxdigit+0x5d>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1167 <isxdigit+0x57>
cmpl   $0x46,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
setne  %al
and    $0xffffffdf,%ebx
add    $0xffffffbf,%ebx
cmp    $0x6,%ebx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %20, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 97
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 102
br i1 %11, label %20, label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp sle i32 %16, 70
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %9, %1
%21 = phi i1 [ true, %9 ], [ true, %1 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isxdigit(i32 %0) {
%2 = tail call i64 @isdigit(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
void add_history(const char *c) {}


x86 assembly (clang, -O0):
<add_history>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_history>:
ret

LLVM IR (-O0):
define void @add_history(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @add_history(i8* nocapture %0) {
ret void
}
int Increment(int a) { return ++a; }


x86 assembly (clang, -O0):
<Increment>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Increment>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @Increment(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @Increment(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int celcon_solve_quaddobl_start_system(int k, int *mv) {
  int fail;
  double *c;
  fail = _ada_use_c2phc(476, &k, mv, c);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_solve_quaddobl_start_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1dc,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_solve_quaddobl_start_system>:
push   %rax
mov    %rsi,%rdx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1dc,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @celcon_solve_quaddobl_start_system(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32*, i32** %4
%8 = load double*, double** %6
%9 = call i32 @_ada_use_c2phc(i32 476, i32* %3, i32* %7, double* %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @celcon_solve_quaddobl_start_system(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @_ada_use_c2phc(i32 476, i32* %3, i32* %1, double* undef)
ret i32 %4
}
/* Type definitions */
struct hdhomerun_channelscan_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct hdhomerun_channelscan_t *);
void channelscan_destroy(struct hdhomerun_channelscan_t *scan) { free(scan); }


x86 assembly (clang, -O0):
<channelscan_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<channelscan_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.hdhomerun_channelscan_t = type { i32 }
define void @channelscan_destroy(%struct.hdhomerun_channelscan_t* %0) {
%2 = alloca %struct.hdhomerun_channelscan_t*
store %struct.hdhomerun_channelscan_t* %0, %struct.hdhomerun_channelscan_t** %2
%3 = load %struct.hdhomerun_channelscan_t*, %struct.hdhomerun_channelscan_t** %2
%4 = call i32 @free(%struct.hdhomerun_channelscan_t* %3)
ret void
}

LLVM IR (-O2):
%struct.hdhomerun_channelscan_t = type { i32 }
define void @channelscan_destroy(%struct.hdhomerun_channelscan_t* nocapture %0) {
%2 = tail call i32 @free(%struct.hdhomerun_channelscan_t* %0)
ret void
}
/* Variables and functions */
int GenerateFastRandom();
float PRANDFloat(void) {
  float x = (float)(GenerateFastRandom() & 0xffff);
  return (1 - 2 * x / 65535.0f);
}


x86 assembly (clang, -O0):
<PRANDFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <GenerateFastRandom@plt>
and    $0xffff,%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xed3(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  0xec2(%rip),%xmm0
divss  %xmm0,%xmm1
movss  0xeb2(%rip),%xmm0
subss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRANDFloat>:
push   %rax
xor    %eax,%eax
call   1030 <GenerateFastRandom@plt>
movzwl %ax,%eax
cvtsi2ss %eax,%xmm0
addss  %xmm0,%xmm0
divss  0xed5(%rip),%xmm0
addss  0xed1(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @PRANDFloat() {
%1 = alloca float
%2 = call i32 (...) @GenerateFastRandom()
%3 = and i32 %2, 65535
%4 = sitofp i32 %3 to float
store float %4, float* %1
%5 = load float, float* %1
%6 = fmul float 2.000000e+00, %5
%7 = fdiv float %6, 6.553500e+04
%8 = fsub float 1.000000e+00, %7
ret float %8
}

LLVM IR (-O2):
define float @PRANDFloat() {
%1 = tail call i32 (...) @GenerateFastRandom()
%2 = and i32 %1, 65535
%3 = sitofp i32 %2 to float
%4 = fmul float %3, 2.000000e+00
%5 = fdiv float %4, 6.553500e+04
%6 = fsub float 1.000000e+00, %5
ret float %6
}
/* Variables and functions */
double *malloc(int);
void init1DArr(double **array, int size) {
  *array = malloc(size * sizeof(double));
}


x86 assembly (clang, -O0):
<init1DArr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init1DArr>:
push   %rbx
mov    %rdi,%rbx
lea    0x0(,%rsi,8),%edi
call   1030 <malloc@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @init1DArr(double** %0, i32 %1) {
%3 = alloca double**
%4 = alloca i32
store double** %0, double*** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 8
%8 = trunc i64 %7 to i32
%9 = call double* @malloc(i32 %8)
%10 = load double**, double*** %3
store double* %9, double** %10
ret void
}

LLVM IR (-O2):
define void @init1DArr(double** nocapture writeonly %0, i32 %1) {
%3 = shl i32 %1, 3
%4 = tail call double* @malloc(i32 %3)
store double* %4, double** %0
ret void
}
/* Variables and functions */
void *__builtin___bnd_init_ptr_bounds(void *);
void *chkp_test(void *p) { return __builtin___bnd_init_ptr_bounds(p); }


x86 assembly (clang, -O0):
<chkp_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__builtin___bnd_init_ptr_bounds@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chkp_test>:
jmp    1030 <__builtin___bnd_init_ptr_bounds@plt>

LLVM IR (-O0):
define i8* @chkp_test(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @__builtin___bnd_init_ptr_bounds(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @chkp_test(i8* %0) {
%2 = tail call i8* @__builtin___bnd_init_ptr_bounds(i8* %0)
ret i8* %2
}
/* Variables and functions */
scalar_t__ isdigit(char);
float tolower(char);
int is_hex_digit(char c) {
  return isdigit(c) || (tolower(c) >= 'a' && tolower(c) <= 'f');
}


x86 assembly (clang, -O0):
<is_hex_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    118b <is_hex_digit+0x6b>
movsbl -0x1(%rbp),%edi
call   1040 <tolower@plt>
xor    %eax,%eax
movss  0xea4(%rip),%xmm1
ucomiss %xmm1,%xmm0
mov    %al,-0x3(%rbp)
jb     1185 <is_hex_digit+0x65>
movsbl -0x1(%rbp),%edi
call   1040 <tolower@plt>
movaps %xmm0,%xmm1
movss  0xe88(%rip),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_hex_digit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <is_hex_digit+0x17>
pop    %rbx
ret
movsbl %bl,%ebx
mov    %ebx,%edi
call   1040 <tolower@plt>
xor    %eax,%eax
ucomiss 0xeb6(%rip),%xmm0
jb     1135 <is_hex_digit+0x15>
mov    %ebx,%edi
call   1040 <tolower@plt>
movss  0xea9(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setae  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_hex_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isdigit(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call float @tolower(i8 signext %7)
%9 = fcmp oge float %8, 9.700000e+01
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = call float @tolower(i8 signext %11)
%13 = fcmp ole float %12, 1.020000e+02
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ false, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ true, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_hex_digit(i8 signext %0) {
%2 = tail call i64 @isdigit(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call float @tolower(i8 signext %0)
%6 = fcmp ult float %5, 9.700000e+01
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = tail call float @tolower(i8 signext %0)
%9 = fcmp ole float %8, 1.020000e+02
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 1, %1 ], [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
int iscommand(unsigned char ch) {
  if (ch <= 0x04 || (ch >= 0x06 && ch <= 0x09) || ch == 0x0b)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<iscommand>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x4,%eax
jle    113e <iscommand+0x3e>
movzbl -0x5(%rbp),%eax
cmp    $0x6,%eax
jl     1131 <iscommand+0x31>
movzbl -0x5(%rbp),%eax
cmp    $0x9,%eax
jle    113e <iscommand+0x3e>
movzbl -0x5(%rbp),%eax
cmp    $0xb,%eax
jne    114a <iscommand+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <iscommand+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscommand>:
mov    $0x1,%eax
cmp    $0x5,%dil
jb     1123 <iscommand+0x23>
setne  %al
cmp    $0xa,%dil
setb   %cl
and    %al,%cl
cmp    $0xb,%dil
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @iscommand(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sle i32 %5, 4
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sge i32 %9, 6
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = icmp sle i32 %13, 9
br i1 %14, label %19, label %15
15: ; preds = %11, %7
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp eq i32 %17, 11
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %1
store i32 1, i32* %2
br label %21
20: ; preds = %15
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @iscommand(i8 zeroext %0) {
%2 = icmp ult i8 %0, 5
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ne i8 %0, 5
%5 = icmp ult i8 %0, 10
%6 = and i1 %4, %5
%7 = icmp eq i8 %0, 11
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %3, %1
%11 = phi i32 [ 1, %1 ], [ %9, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printline(char *, size_t);
void __mp_printmemory(void *p, size_t l) {
  while (l >= 16) {
    printline((char *)p, 16);
    p = (char *)p + 16;
    l -= 16;
  }
  if (l > 0)
    printline((char *)p, l);
}


x86 assembly (clang, -O0):
<__mp_printmemory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x10,-0x10(%rbp)
jb     1156 <__mp_printmemory+0x46>
mov    -0x8(%rbp),%rdi
mov    $0x10,%esi
call   1030 <printline@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x10,%rax
mov    %rax,-0x10(%rbp)
jmp    1120 <__mp_printmemory+0x10>
cmpq   $0x0,-0x10(%rbp)
jbe    116e <__mp_printmemory+0x5e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <printline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mp_printmemory>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
cmp    $0x10,%rsi
jb     113b <__mp_printmemory+0x2b>
mov    $0x10,%esi
mov    %rbx,%rdi
call   1030 <printline@plt>
add    $0x10,%rbx
add    $0xfffffffffffffff0,%r14
cmp    $0xf,%r14
ja     1120 <__mp_printmemory+0x10>
test   %r14,%r14
je     1152 <__mp_printmemory+0x42>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printline@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @__mp_printmemory(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
br label %5
5: ; preds = %8, %2
%6 = load i64, i64* %4
%7 = icmp uge i64 %6, 16
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = call i32 @printline(i8* %9, i64 16)
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 16
store i8* %12, i8** %3
%13 = load i64, i64* %4
%14 = sub i64 %13, 16
store i64 %14, i64* %4
br label %5
15: ; preds = %5
%16 = load i64, i64* %4
%17 = icmp ugt i64 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i8*, i8** %3
%20 = load i64, i64* %4
%21 = call i32 @printline(i8* %19, i64 %20)
br label %22
22: ; preds = %18, %15
ret void
}

LLVM IR (-O2):
define void @__mp_printmemory(i8* %0, i64 %1) {
%3 = icmp ugt i64 %1, 15
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ %1, %2 ]
%6 = phi i8* [ %8, %4 ], [ %0, %2 ]
%7 = tail call i32 @printline(i8* %6, i64 16)
%8 = getelementptr inbounds i8, i8* %6, i64 16
%9 = add i64 %5, -16
%10 = icmp ugt i64 %9, 15
br i1 %10, label %4, label %11
11: ; preds = %4, %2
%12 = phi i8* [ %0, %2 ], [ %8, %4 ]
%13 = phi i64 [ %1, %2 ], [ %9, %4 ]
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 @printline(i8* %12, i64 %13)
br label %17
17: ; preds = %15, %11
ret void
}
void _XtCheckSubclassFlag() {}


x86 assembly (clang, -O0):
<_XtCheckSubclassFlag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_XtCheckSubclassFlag>:
ret

LLVM IR (-O0):
define void @_XtCheckSubclassFlag() {
ret void
}

LLVM IR (-O2):
define void @_XtCheckSubclassFlag() {
ret void
}
int findsymb(char *symbarr, int symbarr_len, char symb) {
  for (int i = 0; i < symbarr_len; i++) {
    if (symbarr[i] == symb) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<findsymb>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %al,-0x15(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1159 <findsymb+0x59>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x15(%rbp),%ecx
cmp    %ecx,%eax
jne    1146 <findsymb+0x46>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <findsymb+0x60>
jmp    114b <findsymb+0x4b>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <findsymb+0x17>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findsymb>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <findsymb+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %dl,(%rdi,%rcx,1)
je     111f <findsymb+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <findsymb+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @findsymb(i8* %0, i32 %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8 %2, i8* %7
store i32 0, i32* %8
br label %9
9: ; preds = %26, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %29
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8, i8* %7
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %19, %21
br i1 %22, label %23, label %25
23: ; preds = %13
%24 = load i32, i32* %8
store i32 %24, i32* %4
br label %30
25: ; preds = %13
br label %26
26: ; preds = %25
%27 = load i32, i32* %8
%28 = add nsw i32 %27, 1
store i32 %28, i32* %8
br label %9
29: ; preds = %9
store i32 -1, i32* %4
br label %30
30: ; preds = %29, %23
%31 = load i32, i32* %4
ret i32 %31
}

LLVM IR (-O2):
define i32 @findsymb(i8* nocapture %0, i32 %1, i8 signext %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
double __infer_nondet_double();
double hypot(double x, double y) { return __infer_nondet_double(); }


x86 assembly (clang, -O0):
<hypot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hypot>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_double@plt>

LLVM IR (-O0):
define double @hypot(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = call double (...) @__infer_nondet_double()
ret double %5
}

LLVM IR (-O2):
define double @hypot(double %0, double %1) {
%3 = tail call double (...) @__infer_nondet_double()
ret double %3
}