xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ksh_command_longhelp() {
  printf("ex"
         "it         return to user mode\n"
         "te"
         "st\n"
         "pfault, div0 test faults\n"
         "mem          show memory (frames, pages) info\n"
         "st"
         "at\n"
         "uname        show Ulix version\n"
         "hex"
         "dump      show hex"
         "dump of some memory area\n"
         "clear        clear the screen\n"
         "gf, g"
         "p, gp1k get a frame, a page, 1000 pages\n"
         "rp           release page\n"
         "bdump\n"
         "malloc       test kernel malloc\n"
         "time         show time\n"
         "cloneas <n>  clone address space (argument: size)\n"
         "listas       show address spaces\n"
         "ps           process list\n"
         "disable      disable sche"
         "duler\n"
         "enable       (re-)enable sche"
         "duler\n");
}


x86 assembly (clang, -O0):
<ksh_command_longhelp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ksh_command_longhelp>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [529 x i8] c"exit return to user mode\0Atest\0Apfault, div0 test faults\0Amem show memory (frames, pages) info\0Astat\0Auname show Ulix version\0Ahexdump show hexdump of some memory area\0Aclear clear the screen\0Agf, gp, gp1k get a frame, a page, 1000 pages\0Arp release page\0Abdump\0Amalloc test kernel malloc\0Atime show time\0Acloneas <n> clone address space (argument: size)\0Alistas show address spaces\0Aps process list\0Adisable disable scheduler\0Aenable (re-)enable scheduler\0A\00"
define void @ksh_command_longhelp() {
%1 = call i32 @printf(i8* getelementptr inbounds ([529 x i8], [529 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [528 x i8] c"exit return to user mode\0Atest\0Apfault, div0 test faults\0Amem show memory (frames, pages) info\0Astat\0Auname show Ulix version\0Ahexdump show hexdump of some memory area\0Aclear clear the screen\0Agf, gp, gp1k get a frame, a page, 1000 pages\0Arp release page\0Abdump\0Amalloc test kernel malloc\0Atime show time\0Acloneas <n> clone address space (argument: size)\0Alistas show address spaces\0Aps process list\0Adisable disable scheduler\0Aenable (re-)enable scheduler\00"
define void @ksh_command_longhelp() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([528 x i8], [528 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ COND_VS();
int /*<<< orphan*/ EA_AL_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_svs_8_al(void) { m68ki_write_8(EA_AL_8(), COND_VS() ? 0xff : 0); }


x86 assembly (clang, -O0):
<m68k_op_svs_8_al>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_AL_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_VS@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_svs_8_al>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_AL_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_VS@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_svs_8_al() {
%1 = call i32 (...) @EA_AL_8()
%2 = call i64 (...) @COND_VS()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_svs_8_al() {
%1 = tail call i32 (...) @EA_AL_8()
%2 = tail call i64 (...) @COND_VS()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_alphabet();
int main(void) {
  print_alphabet();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <print_alphabet@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print_alphabet@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @print_alphabet()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @print_alphabet()
ret i32 0
}
/* Variables and functions */
float sqrtf(float);
float intr_wrap_071(float p1) { return sqrtf(p1); }


x86 assembly (clang, -O0):
<intr_wrap_071>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_071>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111d <intr_wrap_071+0xd>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @intr_wrap_071(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrtf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @intr_wrap_071(float %0) {
%2 = tail call float @sqrtf(float %0)
ret float %2
}
int test_imm_6Aint16_mem(short *val) {
  return ((*val) & (-0x6A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Aint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff96,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Aint16_mem>:
movzwl (%rdi),%eax
test   $0xff96,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Aint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -106
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Aint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -106
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void plug_nl_wordizer_shutdown(void *in_context) {}


x86 assembly (clang, -O0):
<plug_nl_wordizer_shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<plug_nl_wordizer_shutdown>:
ret

LLVM IR (-O0):
define void @plug_nl_wordizer_shutdown(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @plug_nl_wordizer_shutdown(i8* nocapture %0) {
ret void
}
void control_event_guard_deferred(void) {}


x86 assembly (clang, -O0):
<control_event_guard_deferred>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<control_event_guard_deferred>:
ret

LLVM IR (-O0):
define void @control_event_guard_deferred() {
ret void
}

LLVM IR (-O2):
define void @control_event_guard_deferred() {
ret void
}
msgsnd(msqid, msgp, msgsz, msgflg) int msqid;
struct msgbuf *msgp;
int msgsz, msgflg;
{ return (syscall(49, 3, msqid, msgp, msgsz, msgflg)); }


x86 assembly (clang, -O0):
<msgsnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    $0x31,%edi
mov    $0x3,%esi
mov    $0x0,%al
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgsnd>:
mov    %ecx,%r9d
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %edi,%edx
mov    $0x31,%edi
mov    $0x3,%esi
xor    %eax,%eax
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.msgbuf = type opaque
define i32 @msgsnd(i32 %0, %struct.msgbuf* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca %struct.msgbuf*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store %struct.msgbuf* %1, %struct.msgbuf** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load %struct.msgbuf*, %struct.msgbuf** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 (i32, i32, i32, %struct.msgbuf*, i32, i32, ...) bitcast (i32 (...)* @syscall to i32 (i32, i32, i32, %struct.msgbuf*, i32, i32, ...)*)(i32 49, i32 3, i32 %9, %struct.msgbuf* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.msgbuf = type opaque
define i32 @msgsnd(i32 %0, %struct.msgbuf* %1, i32 %2, i32 %3) {
%5 = tail call i32 (i32, i32, i32, %struct.msgbuf*, i32, i32, ...) bitcast (i32 (...)* @syscall to i32 (i32, i32, i32, %struct.msgbuf*, i32, i32, ...)*)(i32 49, i32 3, i32 %0, %struct.msgbuf* %1, i32 %2, i32 %3)
ret i32 %5
}
int test_imm_41uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x41 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_41uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x41,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_41uint64_highword_mem>:
testb  $0x41,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_41uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 65
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_41uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 279172874240
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_79int8_reg(signed char val) {
  return ((val) & (-0x79 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_79int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff87,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_79int8_reg>:
test   $0x87,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_79int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -121
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_79int8_reg(i8 signext %0) {
%2 = and i8 %0, -121
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
char *malloc(long);
int /*<<< orphan*/ memcpy(char *, char const *, long);
char *copyn(const char *str, long n) {
  char *ret;
  if (str == NULL)
    return (NULL);
  ret = malloc(n + 1);
  memcpy(ret, str, n);
  ret[n] = '\0';
  return (ret);
}


x86 assembly (clang, -O0):
<copyn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1148 <copyn+0x28>
movq   $0x0,-0x8(%rbp)
jmp    117e <copyn+0x5e>
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyn>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1151 <copyn+0x31>
mov    %rsi,%r14
mov    %rdi,%r15
lea    0x1(%rsi),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1030 <memcpy@plt>
movb   $0x0,(%rbx,%r14,1)
jmp    1153 <copyn+0x33>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @copyn(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %2
store i8* null, i8** %3
br label %22
10: ; preds = %2
%11 = load i64, i64* %5
%12 = add nsw i64 %11, 1
%13 = call i8* @malloc(i64 %12)
store i8* %13, i8** %6
%14 = load i8*, i8** %6
%15 = load i8*, i8** %4
%16 = load i64, i64* %5
%17 = call i32 @memcpy(i8* %14, i8* %15, i64 %16)
%18 = load i8*, i8** %6
%19 = load i64, i64* %5
%20 = getelementptr inbounds i8, i8* %18, i64 %19
store i8 0, i8* %20
%21 = load i8*, i8** %6
store i8* %21, i8** %3
br label %22
22: ; preds = %10, %9
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @copyn(i8* %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = add nsw i64 %1, 1
%6 = tail call i8* @malloc(i64 %5)
%7 = tail call i32 @memcpy(i8* %6, i8* %0, i64 %1)
%8 = getelementptr inbounds i8, i8* %6, i64 %1
store i8 0, i8* %8
br label %9
9: ; preds = %2, %4
%10 = phi i8* [ %6, %4 ], [ null, %2 ]
ret i8* %10
}
/* Variables and functions */
scalar_t__ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
char CommonInput(void) {
  char line[64];
  if (fgets(line, 64, stdin)) {
    return line[0];
  }
  return (char)0;
}


x86 assembly (clang, -O0):
<CommonInput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    -0x50(%rbp),%rdi
mov    0x2ec5(%rip),%rax
mov    (%rax),%edx
mov    $0x40,%esi
call   1030 <fgets@plt>
cmp    $0x0,%rax
je     1144 <CommonInput+0x34>
mov    -0x50(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1148 <CommonInput+0x38>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CommonInput>:
sub    $0x48,%rsp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rdi
mov    $0x40,%esi
call   1030 <fgets@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1137 <CommonInput+0x27>
mov    (%rsp),%eax
add    $0x48,%rsp
ret

LLVM IR (-O0):
@stdin = global i32 0
define signext i8 @CommonInput() {
%1 = alloca i8
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @stdin
%5 = call i64 @fgets(i8* %3, i32 64, i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%9 = load i8, i8* %8
store i8 %9, i8* %1
br label %11
10: ; preds = %0
store i8 0, i8* %1
br label %11
11: ; preds = %10, %7
%12 = load i8, i8* %1
ret i8 %12
}

LLVM IR (-O2):
@stdin = global i32 0
define signext i8 @CommonInput() {
%1 = alloca [64 x i8]
%2 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i64 @fgets(i8* %2, i32 64, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = load i8, i8* %2
%7 = select i1 %5, i8 0, i8 %6
ret i8 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ GLdouble;

/* Variables and functions */
int /*<<< orphan*/ glRasterPos4dv(int /*<<< orphan*/ *);
void RasterPos4dv(GLdouble v[4]) { glRasterPos4dv(v); }


x86 assembly (clang, -O0):
<RasterPos4dv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glRasterPos4dv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterPos4dv>:
jmp    1030 <glRasterPos4dv@plt>

LLVM IR (-O0):
define void @RasterPos4dv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glRasterPos4dv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @RasterPos4dv(i32* %0) {
%2 = tail call i32 @glRasterPos4dv(i32* %0)
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
float generateRandomFloat() {
  float r = (float)rand() / (float)RAND_MAX;
  return r;
}


x86 assembly (clang, -O0):
<generateRandomFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ebd(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateRandomFloat>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ec4(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define float @generateRandomFloat() {
%1 = alloca float
%2 = call i64 (...) @rand()
%3 = sitofp i64 %2 to float
%4 = load i64, i64* @RAND_MAX
%5 = sitofp i64 %4 to float
%6 = fdiv float %3, %5
store float %6, float* %1
%7 = load float, float* %1
ret float %7
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define float @generateRandomFloat() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to float
%5 = fdiv float %2, %4
ret float %5
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ type;
};
typedef TYPE_1__ XKeyEvent;

/* Variables and functions */
int get_XKeyEvent_type(void *_p) { return (int)((XKeyEvent *)_p)->type; }


x86 assembly (clang, -O0):
<get_XKeyEvent_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyEvent_type>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XKeyEvent_type(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XKeyEvent_type(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void cgiMakeOnClickButton(char *command, char *value) {
  printf("<INPUT TYPE=\"button\" VALUE=\"%s\" onClick=\"%s\">", value, command);
}


x86 assembly (clang, -O0):
<cgiMakeOnClickButton>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgiMakeOnClickButton>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"<INPUT TYPE=\22button\22 VALUE=\22%s\22 onClick=\22%s\22>\00"
define void @cgiMakeOnClickButton(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"<INPUT TYPE=\22button\22 VALUE=\22%s\22 onClick=\22%s\22>\00"
define void @cgiMakeOnClickButton(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %0)
ret void
}
int mat_frame_is_valid(struct frame *fp) { return ((((long)fp) != 0)); }


x86 assembly (clang, -O0):
<mat_frame_is_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_frame_is_valid>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
ret

LLVM IR (-O0):
%struct.frame = type opaque
define i32 @mat_frame_is_valid(%struct.frame* %0) {
%2 = alloca %struct.frame*
store %struct.frame* %0, %struct.frame** %2
%3 = load %struct.frame*, %struct.frame** %2
%4 = ptrtoint %struct.frame* %3 to i64
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.frame = type opaque
define i32 @mat_frame_is_valid(%struct.frame* readnone %0) {
%2 = icmp ne %struct.frame* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
char *_s2_f2cstr(char *, long);
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ ss2wtga(char *);
void ss2wtga_(char *fname, long int textlen) {
  char *string = _s2_f2cstr(fname, textlen);
  ss2wtga(string);
  free(string);
}


x86 assembly (clang, -O0):
<ss2wtga_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <_s2_f2cstr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <ss2wtga@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ss2wtga_>:
push   %rbx
call   1050 <_s2_f2cstr@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <ss2wtga@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ss2wtga_(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @_s2_f2cstr(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i32 @ss2wtga(i8* %9)
%11 = load i8*, i8** %5
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @ss2wtga_(i8* %0, i64 %1) {
%3 = tail call i8* @_s2_f2cstr(i8* %0, i64 %1)
%4 = tail call i32 @ss2wtga(i8* %3)
%5 = tail call i32 @free(i8* %3)
ret void
}
int abs(int x) {
  if (x < 0)
    return (-x);
  else
    return x;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <abs+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int isdigit(int c) {
  if (c < 48 || c > 57)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     111b <isdigit+0x1b>
cmpl   $0x39,-0x8(%rbp)
jle    1127 <isdigit+0x27>
movl   $0x0,-0x4(%rbp)
jmp    112e <isdigit+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 48
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 57
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_run_once() {
  printf("NOT IMPLEMENTED:"
         "pa_run_once"
         "\n");
}


x86 assembly (clang, -O0):
<pa_run_once>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_run_once>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"NOT IMPLEMENTED:pa_run_once\0A\00"
define i32 @pa_run_once() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [28 x i8] c"NOT IMPLEMENTED:pa_run_once\00"
define i32 @pa_run_once() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int odd(uint16_t byte) {
  int parity;
  parity = 0;
  while (byte) {
    parity ^= byte;
    byte = byte >> 1;
  }
  return (parity & 1);
}


x86 assembly (clang, -O0):
<odd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <odd+0x2f>
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <odd+0xe>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<odd>:
xor    %eax,%eax
test   %edi,%edi
je     111e <odd+0x1e>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
xor    %edi,%eax
sar    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <odd+0x10>
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @odd(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = xor i32 %9, %8
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = ashr i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
%15 = and i32 %14, 1
ret i32 %15
}

LLVM IR (-O2):
define i32 @odd(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = xor i32 %4, %5
%7 = ashr i32 %5, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3
%10 = and i32 %6, 1
br label %11
11: ; preds = %9, %1
%12 = phi i32 [ 0, %1 ], [ %10, %9 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ I2CIntHandler();
void I2C2_Handler(void) { I2CIntHandler(); }


x86 assembly (clang, -O0):
<I2C2_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <I2CIntHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C2_Handler>:
xor    %eax,%eax
jmp    1030 <I2CIntHandler@plt>

LLVM IR (-O0):
define void @I2C2_Handler() {
%1 = call i32 (...) @I2CIntHandler()
ret void
}

LLVM IR (-O2):
define void @I2C2_Handler() {
%1 = tail call i32 (...) @I2CIntHandler()
ret void
}
int test_imm_07int64_lowword_mem(long long *val) {
  return ((*val) & (0x07 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_07int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_07int64_lowword_mem>:
testb  $0x7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_07int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 7
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_07int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _putcon(int /*<<< orphan*/);
void _puts(const char *str) {
  while (*str)
    _putcon(*(str++));
}


x86 assembly (clang, -O0):
<_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <_puts+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <_putcon@plt>
jmp    111c <_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <_puts+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <_putcon@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <_puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @_putcon(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @_puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @_putcon(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
int setup_perf_record(struct uftrace_perf_writer *perf, int nr_cpu, int pid,
                      const char *dirname) {
  return -1;
}


x86 assembly (clang, -O0):
<setup_perf_record>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_perf_record>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.uftrace_perf_writer = type opaque
define i32 @setup_perf_record(%struct.uftrace_perf_writer* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.uftrace_perf_writer*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store %struct.uftrace_perf_writer* %0, %struct.uftrace_perf_writer** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
ret i32 -1
}

LLVM IR (-O2):
%struct.uftrace_perf_writer = type opaque
define i32 @setup_perf_record(%struct.uftrace_perf_writer* nocapture readnone %0, i32 %1, i32 %2, i8* nocapture readnone %3) {
ret i32 -1
}
int vdma_request_dma(unsigned int dmanr, const char *device_id) { return 0; }


x86 assembly (clang, -O0):
<vdma_request_dma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdma_request_dma>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vdma_request_dma(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @vdma_request_dma(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void perror_exit(char *error) {
  perror(error);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<perror_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<perror_exit>:
push   %rax
call   1030 <perror@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @perror_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @perror_exit(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void asm_runcommand(const char *cmd) {
  asm volatile("int $0x22" : : "a"(0x0003), "b"(cmd));
}


x86 assembly (clang, -O0):
<asm_runcommand>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rbx
mov    $0x3,%eax
int    $0x22
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm_runcommand>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3,%eax
int    $0x22
pop    %rbx
ret

LLVM IR (-O0):
define void @asm_runcommand(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @asm_runcommand(i8* %0) {
tail call void asm sideeffect "int $$0x22", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 3, i8* %0)
ret void
}
/* Variables and functions */
bool OSC_IsHPOSCEnabled(void) {
  bool enabled = false;
  if ((((*((volatile unsigned long *)(0x50003000 + 0x00001FB4))) &
        0x000C0000) == 0x00040000) &&
      (((*((volatile unsigned long *)(0x50001000 + 0x0000038C))) &
        0x00020000) == 0)) {
    enabled = true;
  }
  return (enabled);
}


x86 assembly (clang, -O0):
<OSC_IsHPOSCEnabled>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x50004fb4,%eax
mov    (%rax),%rax
and    $0xc0000,%rax
cmp    $0x40000,%rax
jne    1144 <OSC_IsHPOSCEnabled+0x44>
mov    $0x5000138c,%eax
mov    (%rax),%rax
and    $0x20000,%rax
cmp    $0x0,%rax
jne    1144 <OSC_IsHPOSCEnabled+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSC_IsHPOSCEnabled>:
mov    0x50004fb4,%rcx
50
and    $0xc0000,%ecx
xor    %eax,%eax
cmp    $0x40000,%ecx
jne    112b <OSC_IsHPOSCEnabled+0x2b>
mov    0x5000138c,%rcx
50
xor    %eax,%eax
test   $0x20000,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @OSC_IsHPOSCEnabled() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load volatile i64, i64* inttoptr (i64 1342197684 to i64*)
%3 = and i64 %2, 786432
%4 = icmp eq i64 %3, 262144
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = load volatile i64, i64* inttoptr (i64 1342182284 to i64*)
%7 = and i64 %6, 131072
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
store i32 1, i32* %1
br label %10
10: ; preds = %9, %5, %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @OSC_IsHPOSCEnabled() {
%1 = load volatile i64, i64* inttoptr (i64 1342197684 to i64*)
%2 = and i64 %1, 786432
%3 = icmp eq i64 %2, 262144
br i1 %3, label %4, label %10
4: ; preds = %0
%5 = load volatile i64, i64* inttoptr (i64 1342182284 to i64*)
%6 = trunc i64 %5 to i32
%7 = lshr i32 %6, 17
%8 = and i32 %7, 1
%9 = xor i32 %8, 1
br label %10
10: ; preds = %4, %0
%11 = phi i32 [ 0, %0 ], [ %9, %4 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ utempter_remove_added_record();
void removeFromUtmp(void) { (void)utempter_remove_added_record(); }


x86 assembly (clang, -O0):
<removeFromUtmp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <utempter_remove_added_record@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<removeFromUtmp>:
xor    %eax,%eax
jmp    1030 <utempter_remove_added_record@plt>

LLVM IR (-O0):
define void @removeFromUtmp() {
%1 = call i32 (...) @utempter_remove_added_record()
ret void
}

LLVM IR (-O2):
define void @removeFromUtmp() {
%1 = tail call i32 (...) @utempter_remove_added_record()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lprintf(int, char *, char *, char *);
int p_CopyFile(char *, char *);
int copy_pic(char *source, char *target) {
  lprintf(1, "Copy %s to %s\n", source, target);
  return p_CopyFile(source, target);
}


x86 assembly (clang, -O0):
<copy_pic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x1,%edi
lea    0xebc(%rip),%rsi
call   1040 <lprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <p_CopyFile@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_pic>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rsi
mov    $0x1,%edi
mov    %rbx,%rdx
mov    %r14,%rcx
call   1040 <lprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <p_CopyFile@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Copy %s to %s\0A\00"
define i32 @copy_pic(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @lprintf(i32 1, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 @p_CopyFile(i8* %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
@.str = [15 x i8] c"Copy %s to %s\0A\00"
define i32 @copy_pic(i8* %0, i8* %1) {
%3 = tail call i32 @lprintf(i32 1, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = tail call i32 @p_CopyFile(i8* %0, i8* %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i = 0;
  char c;
  for (i = 0; i <= 255; i++) {
    c = i;
    printf("\n %d %c", i, i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xff,-0x8(%rbp)
jg     1160 <main+0x50>
mov    -0x8(%rbp),%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"\0A %d %c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %2
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %2
%6 = icmp sle i32 %5, 255
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %2
%9 = trunc i32 %8 to i8
store i8 %9, i8* %3
%10 = load i32, i32* %2
%11 = load i32, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11)
br label %13
13: ; preds = %7
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %4
16: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"\0A %d %c\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
void mce_exit() {}


x86 assembly (clang, -O0):
<mce_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mce_exit>:
ret

LLVM IR (-O0):
define void @mce_exit() {
ret void
}

LLVM IR (-O2):
define void @mce_exit() {
ret void
}
void SSL_new(void) {}


x86 assembly (clang, -O0):
<SSL_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSL_new>:
ret

LLVM IR (-O0):
define void @SSL_new() {
ret void
}

LLVM IR (-O2):
define void @SSL_new() {
ret void
}
void XRotateBuffers() {}


x86 assembly (clang, -O0):
<XRotateBuffers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XRotateBuffers>:
ret

LLVM IR (-O0):
define void @XRotateBuffers() {
ret void
}

LLVM IR (-O2):
define void @XRotateBuffers() {
ret void
}
void foo034() {}


x86 assembly (clang, -O0):
<foo034>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo034>:
ret

LLVM IR (-O0):
define void @foo034() {
ret void
}

LLVM IR (-O2):
define void @foo034() {
ret void
}
__attribute__((always_)) void memory_present(int nid, unsigned long start,
                                             unsigned long end) {}


x86 assembly (clang, -O0):
<memory_present>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_present>:
ret

LLVM IR (-O0):
define void @memory_present(i32 %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
define void @memory_present(i32 %0, i64 %1, i64 %2) {
ret void
}
void foo_1_1_1_1_2_2_2_1_2() {}


x86 assembly (clang, -O0):
<foo_1_1_1_1_2_2_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_1_1_2_2_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_1_1_1_1_2_2_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_1_1_2_2_2_1_2() {
ret void
}
double RayleighNum(double DeltaTemp, double TempOut, double Height) {
  double Ra;
  Ra = ((9.81) * (1 / TempOut) * (DeltaTemp) * (pow(Height, 3)) * (0.7));
  Ra = Ra / pow(1.78e-5, 2);
  return Ra;
}


x86 assembly (clang, -O0):
<RayleighNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xef9(%rip),%xmm1
divsd  -0x10(%rbp),%xmm1
movsd  0xee4(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xec1(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xea0(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xe75(%rip),%xmm0
movsd  0xe75(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RayleighNum>:
push   %rax
movsd  0xee7(%rip),%xmm3
divsd  %xmm1,%xmm3
mulsd  0xee3(%rip),%xmm3
mulsd  %xmm3,%xmm0
movsd  %xmm0,(%rsp)
movsd  0xeda(%rip),%xmm1
movapd %xmm2,%xmm0
call   1030 <pow@plt>
mulsd  (%rsp),%xmm0
mulsd  0xecc(%rip),%xmm0
divsd  0xecc(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @RayleighNum(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %5
%9 = fdiv double 1.000000e+00, %8
%10 = fmul double 9.810000e+00, %9
%11 = load double, double* %4
%12 = fmul double %10, %11
%13 = load double, double* %6
%14 = call double @pow(double %13, double 3.000000e+00)
%15 = fmul double %12, %14
%16 = fmul double %15, 0x3FE6666666666666
store double %16, double* %7
%17 = load double, double* %7
%18 = call double @pow(double 1.780000e-05, double 2.000000e+00)
%19 = fdiv double %17, %18
store double %19, double* %7
%20 = load double, double* %7
ret double %20
}

LLVM IR (-O2):
define double @RayleighNum(double %0, double %1, double %2) {
%4 = fdiv double 1.000000e+00, %1
%5 = fmul double %4, 9.810000e+00
%6 = fmul double %5, %0
%7 = tail call double @pow(double %2, double 3.000000e+00)
%8 = fmul double %6, %7
%9 = fmul double %8, 0x3FE6666666666666
%10 = fdiv double %9, 0x3DF5C5E8818506B1
ret double %10
}
adr0indreg1_set(r0, r1, x0, x1, p0, p1) float r0, r1;
float *p0, *p1;
{ (*((float *)10000000)) = (*p1); }


x86 assembly (clang, -O0):
<adr0indreg1_set>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm1,-0x30(%rbp)
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movss  (%rax),%xmm0
mov    $0x989680,%eax
movss  %xmm0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0indreg1_set>:
movss  (%rcx),%xmm0
movss  %xmm0,0x989680
ret

LLVM IR (-O0):
define i32 @adr0indreg1_set(double %0, double %1, i32 %2, i32 %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca i32
%12 = alloca float*
%13 = alloca float*
%14 = fptrunc double %0 to float
%15 = fptrunc double %1 to float
store float %14, float* %8
store float %15, float* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store float* %4, float** %12
store float* %5, float** %13
%16 = load float*, float** %13
%17 = load float, float* %16
store float %17, float* inttoptr (i64 10000000 to float*)
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @adr0indreg1_set(double %0, double %1, i32 %2, i32 %3, float* nocapture readnone %4, float* nocapture %5) {
%7 = load float, float* %5
store float %7, float* inttoptr (i64 10000000 to float*)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ nqueens(int);
int main(int argc, char **argv) {
  nqueens(4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1030 <nqueens@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <nqueens@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @nqueens(i32 4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @nqueens(i32 4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ TIOCLINUX;
scalar_t__ ioctl(int /*<<< orphan*/, int /*<<< orphan*/, char **);
int /*<<< orphan*/ perror(char *);
int main(void) {
  char console[2] = {11, 10};
  if (ioctl(0, TIOCLINUX, &console) < 0)
    perror("TIOCLINUX");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%ax
mov    %ax,-0x6(%rbp)
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
lea    -0x6(%rbp),%rdx
xor    %edi,%edi
call   1030 <ioctl@plt>
cmp    $0x0,%rax
jge    1164 <main+0x44>
lea    0xea3(%rip),%rdi
call   1040 <perror@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movw   $0xa0b,0x6(%rsp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0x6(%rsp),%rdx
xor    %edi,%edi
call   1030 <ioctl@plt>
test   %rax,%rax
js     1146 <main+0x26>
xor    %eax,%eax
pop    %rcx
ret
lea    0xeb3(%rip),%rdi
call   1040 <perror@plt>
jmp    1142 <main+0x22>

LLVM IR (-O0):
@__const.main.console = [2 x i8] c"\0B\0A"
@TIOCLINUX = global i32 0
@.str = [10 x i8] c"TIOCLINUX\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i8]
store i32 0, i32* %1
%3 = bitcast [2 x i8]* %2 to i8*
%4 = load i32, i32* @TIOCLINUX
%5 = bitcast [2 x i8]* %2 to i8**
%6 = call i64 @ioctl(i32 0, i32 %4, i8** %5)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @perror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@TIOCLINUX = global i32 0
@.str = [10 x i8] c"TIOCLINUX\00"
define i32 @main() {
%1 = alloca i16
%2 = bitcast i16* %1 to i8*
store i16 2571, i16* %1
%3 = load i32, i32* @TIOCLINUX
%4 = bitcast i16* %1 to i8**
%5 = call i64 @ioctl(i32 0, i32 %3, i8** %4)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @perror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %0
ret i32 0
}