xunge/DecIR huggingface dataset:
unsigned int invert(unsigned x, int p, int n) {
  return (~x & ~((~(~0 << (p + 1 - n))) | (~0 << (p + 1)))) |
         (x & ((~(~0 << (p + 1 - n))) | (~0 << (p + 1))));
}


x86 assembly (clang, -O0):
<invert>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    -0x14(%rbp),%ecx
or     %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x4(%rbp),%ecx
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
mov    $0xffffffff,%esi
shl    %cl,%esi
mov    -0x10(%rbp),%ecx
or     %esi,%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<invert>:
add    $0x1,%esi
mov    %esi,%ecx
sub    %edx,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %edx
or     %edx,%eax
xor    %edi,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @invert(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = xor i32 %7, -1
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
%11 = load i32, i32* %6
%12 = sub nsw i32 %10, %11
%13 = shl i32 -1, %12
%14 = xor i32 %13, -1
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
%17 = shl i32 -1, %16
%18 = or i32 %14, %17
%19 = xor i32 %18, -1
%20 = and i32 %8, %19
%21 = load i32, i32* %4
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
%25 = sub nsw i32 %23, %24
%26 = shl i32 -1, %25
%27 = xor i32 %26, -1
%28 = load i32, i32* %5
%29 = add nsw i32 %28, 1
%30 = shl i32 -1, %29
%31 = or i32 %27, %30
%32 = and i32 %21, %31
%33 = or i32 %20, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @invert(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, 1
%5 = sub nsw i32 %4, %2
%6 = shl nsw i32 -1, %5
%7 = xor i32 %6, -1
%8 = shl nsw i32 -1, %4
%9 = or i32 %8, %7
%10 = xor i32 %9, %0
%11 = xor i32 %10, -1
ret i32 %11
}
unsigned long paddedLength(unsigned long len) { return len + len % 2; }


x86 assembly (clang, -O0):
<paddedLength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
and    $0x1,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<paddedLength>:
mov    %edi,%eax
and    $0x1,%eax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @paddedLength(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = urem i64 %4, 2
%6 = add i64 %3, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @paddedLength(i64 %0) {
%2 = and i64 %0, 1
%3 = add i64 %2, %0
ret i64 %3
}
int test_set_feature() { return 0; }


x86 assembly (clang, -O0):
<test_set_feature>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_set_feature>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_set_feature() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test_set_feature() {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int const);
void hash_to_string(char string[65], const uint8_t hash[32]) {
  size_t i;
  for (i = 0; i < 32; i++) {
    string += sprintf(string, "%02x", hash[i]);
  }
}


x86 assembly (clang, -O0):
<hash_to_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x20,-0x18(%rbp)
jae    116f <hash_to_string+0x5f>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
lea    0xeb7(%rip),%rsi
call   1030 <sprintf@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <hash_to_string+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_to_string>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r12
xor    %ebx,%ebx
lea    0xed9(%rip),%r15
nopw   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edx
mov    %r12,%rdi
mov    %r15,%rsi
call   1030 <sprintf@plt>
cltq
add    %rax,%r12
add    $0x1,%rbx
cmp    $0x20,%rbx
jne    1130 <hash_to_string+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%02x\00"
define void @hash_to_string(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i64
store i8* %0, i8** %3
store i32* %1, i32** %4
store i64 0, i64* %5
br label %6
6: ; preds = %19, %2
%7 = load i64, i64* %5
%8 = icmp ult i64 %7, 32
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i8*, i8** %3
%11 = load i32*, i32** %4
%12 = load i64, i64* %5
%13 = getelementptr inbounds i32, i32* %11, i64 %12
%14 = load i32, i32* %13
%15 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %14)
%16 = load i8*, i8** %3
%17 = sext i32 %15 to i64
%18 = getelementptr inbounds i8, i8* %16, i64 %17
store i8* %18, i8** %3
br label %19
19: ; preds = %9
%20 = load i64, i64* %5
%21 = add i64 %20, 1
store i64 %21, i64* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%02x\00"
define void @hash_to_string(i8* nocapture writeonly %0, i32* nocapture %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i64 [ 0, %2 ], [ %11, %3 ]
%5 = phi i8* [ %0, %2 ], [ %10, %3 ]
%6 = getelementptr inbounds i32, i32* %1, i64 %4
%7 = load i32, i32* %6
%8 = tail call i32 @sprintf(i8* dereferenceable(1) %5, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %5, i64 %9
%11 = add nuw nsw i64 %4, 1
%12 = icmp eq i64 %11, 32
br i1 %12, label %13, label %3
13: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void fn_error(char *message) { printf("%s", message); }


x86 assembly (clang, -O0):
<fn_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_error>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @fn_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @fn_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
double __VERIFIER_nondet_double() {
  double initialValue;
  int byteOffset = 0;
  uint8_t *initialValueAsByte = (uint8_t *)&initialValue;
  for (; byteOffset < sizeof(double); ++byteOffset) {
    initialValueAsByte[byteOffset] = 0;
  }
  return initialValue;
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_double>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0xc(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movslq -0xc(%rbp),%rax
cmp    $0x8,%rax
jae    113f <__VERIFIER_nondet_double+0x3f>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1113 <__VERIFIER_nondet_double+0x13>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_double>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @__VERIFIER_nondet_double() {
%1 = alloca double
%2 = alloca i32
%3 = alloca i64*
store i32 0, i32* %2
%4 = bitcast double* %1 to i64*
store i64* %4, i64** %3
br label %5
5: ; preds = %14, %0
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = icmp ult i64 %7, 8
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i64*, i64** %3
%11 = load i32, i32* %2
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i64, i64* %10, i64 %12
store i64 0, i64* %13
br label %14
14: ; preds = %9
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %5
17: ; preds = %5
%18 = load double, double* %1
ret double %18
}

LLVM IR (-O2):
define double @__VERIFIER_nondet_double() {
ret double 0.000000e+00
}
/* Variables and functions */
int errno;
int madvise(void *, size_t, int);
int posix_madvise(void *address, size_t size, int how) {
  int ret, saved_errno;
  saved_errno = errno;
  if (madvise(address, size, how) == -1) {
    ret = errno;
    errno = saved_errno;
  } else {
    ret = 0;
  }
  return (ret);
}


x86 assembly (clang, -O0):
<posix_madvise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <madvise@plt>
cmp    $0xffffffff,%eax
jne    1165 <posix_madvise+0x55>
mov    0x2e91(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%ecx
mov    0x2e82(%rip),%rax
mov    %ecx,(%rax)
jmp    116c <posix_madvise+0x5c>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_madvise>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <madvise@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xffffffff,%ecx
jne    112e <posix_madvise+0x1e>
mov    (%rbx),%eax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @posix_madvise(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%9 = load i32, i32* @errno
store i32 %9, i32* %8
%10 = load i8*, i8** %4
%11 = load i64, i64* %5
%12 = load i32, i32* %6
%13 = call i32 @madvise(i8* %10, i64 %11, i32 %12)
%14 = icmp eq i32 %13, -1
br i1 %14, label %15, label %18
15: ; preds = %3
%16 = load i32, i32* @errno
store i32 %16, i32* %7
%17 = load i32, i32* %8
store i32 %17, i32* @errno
br label %19
18: ; preds = %3
store i32 0, i32* %7
br label %19
19: ; preds = %18, %15
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @posix_madvise(i8* %0, i64 %1, i32 %2) {
%4 = load i32, i32* @errno
%5 = tail call i32 @madvise(i8* %0, i64 %1, i32 %2)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = load i32, i32* @errno
store i32 %4, i32* @errno
br label %9
9: ; preds = %3, %7
%10 = phi i32 [ %8, %7 ], [ 0, %3 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_SETMASK;
scalar_t__ sigemptyset(int /*<<< orphan*/ *);
scalar_t__ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                       int /*<<< orphan*/ *);
int clear_signal_mask(void) {
  sigset_t set;
  return ((sigemptyset(&set) == 0) &&
          (sigprocmask(SIG_SETMASK, &set, NULL) == 0));
}


x86 assembly (clang, -O0):
<clear_signal_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <sigemptyset@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1163 <clear_signal_mask+0x43>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
lea    -0x4(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
cmp    $0x0,%rax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_signal_mask>:
push   %rax
lea    0x4(%rsp),%rdi
call   1040 <sigemptyset@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1137 <clear_signal_mask+0x17>
pop    %rcx
ret
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
lea    0x4(%rsp),%rsi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
@SIG_SETMASK = global i32 0
define i32 @clear_signal_mask() {
%1 = alloca i32
%2 = call i64 @sigemptyset(i32* %1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = load i32, i32* @SIG_SETMASK
%6 = call i64 @sigprocmask(i32 %5, i32* %1, i32* null)
%7 = icmp eq i64 %6, 0
br label %8
8: ; preds = %4, %0
%9 = phi i1 [ false, %0 ], [ %7, %4 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
@SIG_SETMASK = global i32 0
define i32 @clear_signal_mask() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @sigemptyset(i32* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = load i32, i32* @SIG_SETMASK
%7 = call i64 @sigprocmask(i32 %6, i32* %1, i32* null)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %0
%11 = phi i32 [ 0, %0 ], [ %9, %5 ]
ret i32 %11
}
void *__attribute__((no)) baz(void **lab) {
  asm volatile("" : "+r"(lab));
  return *lab;
}


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i8* @baz(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i8** asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8** %3)
store i8** %4, i8*** %2
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
ret i8* %6
}

LLVM IR (-O2):
define i8* @baz(i8** %0) {
%2 = tail call i8** asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8** %0)
%3 = load i8*, i8** %2
ret i8* %3
}
/* Type definitions */
typedef scalar_t__ uint_fast32_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_EQUALS_uint_fast32_t(uint_fast32_t const k1,
                                            uint_fast32_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_EQUALS_uint_fast32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_EQUALS_uint_fast32_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_EQUALS_uint_fast32_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_EQUALS_uint_fast32_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_FBuint16_mem(unsigned short *val) {
  return ((*val) & (0xFB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FBuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xfb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FBuint16_mem>:
testb  $0xfb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FBuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 251
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_FBuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 251
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int foo4(int *, int *);
int foo5(int *a) {
  int b = 5;
  return foo4(a, &b);
}


x86 assembly (clang, -O0):
<foo5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <foo4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo5>:
push   %rax
movl   $0x5,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <foo4@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @foo5(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 5, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 @foo4(i32* %4, i32* %3)
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo5(i32* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 5, i32* %2
%4 = call i32 @foo4(i32* %0, i32* %2)
ret i32 %4
}
void asxInit(void) {}


x86 assembly (clang, -O0):
<asxInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asxInit>:
ret

LLVM IR (-O0):
define void @asxInit() {
ret void
}

LLVM IR (-O2):
define void @asxInit() {
ret void
}
int int_compar(const void *x, const void *y, void *context) {
  (void)context;
  return *(int *)x - *(int *)y;
}


x86 assembly (clang, -O0):
<int_compar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_compar>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @int_compar(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
%14 = sub nsw i32 %10, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @int_compar(i8* nocapture %0, i8* nocapture %1, i8* nocapture readnone %2) {
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
%6 = bitcast i8* %1 to i32*
%7 = load i32, i32* %6
%8 = sub nsw i32 %5, %7
ret i32 %8
}
void beep_quick(int n) {}


x86 assembly (clang, -O0):
<beep_quick>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<beep_quick>:
ret

LLVM IR (-O0):
define void @beep_quick(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @beep_quick(i32 %0) {
ret void
}
/* Variables and functions */
int lcall(int /*<<< orphan*/, int);
int report(int);
int docall(int status) {
  if (status == 0)
    status = lcall(0, 1);
  return report(status);
}


x86 assembly (clang, -O0):
<docall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1144 <docall+0x24>
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <lcall@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <report@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<docall>:
test   %edi,%edi
je     1129 <docall+0x9>
jmp    1040 <report@plt>
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <lcall@plt>
mov    %eax,%edi
add    $0x8,%rsp
jmp    1040 <report@plt>

LLVM IR (-O0):
define i32 @docall(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @lcall(i32 0, i32 1)
store i32 %6, i32* %2
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* %2
%9 = call i32 @report(i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @docall(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @lcall(i32 0, i32 1)
br label %5
5: ; preds = %3, %1
%6 = phi i32 [ %4, %3 ], [ %0, %1 ]
%7 = tail call i32 @report(i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ console_putc(char);
void console_puts(char *str) {
  while (*str) {
    if (*str == '\n') {
      console_putc('\r');
    }
    console_putc(*str++);
  }
}


x86 assembly (clang, -O0):
<console_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115f <console_puts+0x4f>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    1143 <console_puts+0x33>
mov    $0xd,%edi
call   1030 <console_putc@plt>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <console_putc@plt>
jmp    111c <console_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_puts>:
push   %rbx
mov    %rdi,%rbx
jmp    1139 <console_puts+0x29>
cs nopw 0x0(%rax,%rax,1)
mov    $0xd,%edi
call   1030 <console_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
movsbl %al,%edi
call   1030 <console_putc@plt>
movzbl (%rbx),%eax
cmp    $0xa,%al
je     1120 <console_puts+0x10>
test   %al,%al
jne    112d <console_puts+0x1d>
pop    %rbx
ret

LLVM IR (-O0):
define void @console_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %14, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 10
br i1 %11, label %12, label %14
12: ; preds = %7
%13 = call i32 @console_putc(i8 signext 13)
br label %14
14: ; preds = %12, %7
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %2
%17 = load i8, i8* %15
%18 = call i32 @console_putc(i8 signext %17)
br label %3
19: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @console_puts(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %10, %8 ]
%4 = load i8, i8* %3
switch i8 %4, label %8 [
i8 0, label %12
i8 10, label %5
]
5: ; preds = %2
%6 = tail call i32 @console_putc(i8 signext 13)
%7 = load i8, i8* %3
br label %8
8: ; preds = %2, %5
%9 = phi i8 [ %4, %2 ], [ %7, %5 ]
%10 = getelementptr inbounds i8, i8* %3, i64 1
%11 = tail call i32 @console_putc(i8 signext %9)
br label %2
12: ; preds = %2
ret void
}
void gensdc1() {}


x86 assembly (clang, -O0):
<gensdc1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensdc1>:
ret

LLVM IR (-O0):
define void @gensdc1() {
ret void
}

LLVM IR (-O2):
define void @gensdc1() {
ret void
}
int g1(int (*h)(int, int), int x, int y, int z) { return h(x, y) + z; }


x86 assembly (clang, -O0):
<g1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   *%rax
add    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g1>:
push   %rbx
mov    %ecx,%ebx
mov    %rdi,%rax
mov    %esi,%edi
mov    %edx,%esi
call   *%rax
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @g1(i32 (i32, i32)* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32 (i32, i32)*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 (i32, i32)* %0, i32 (i32, i32)** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32 (i32, i32)*, i32 (i32, i32)** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = call i32 %9(i32 %10, i32 %11)
%13 = load i32, i32* %8
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @g1(i32 (i32, i32)* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 %0(i32 %1, i32 %2)
%6 = add nsw i32 %5, %3
ret i32 %6
}
int iso_712(c)
char *c;
{
  int n;
  n = *c;
  if (n & 0x80)
    n |= 0xffffff00;
  return n;
}


x86 assembly (clang, -O0):
<iso_712>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     112e <iso_712+0x2e>
mov    -0xc(%rbp),%eax
or     $0xffffff00,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso_712>:
movsbl (%rdi),%ecx
mov    %ecx,%eax
or     $0xffffff00,%eax
test   $0x80,%cl
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @iso_712(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = and i32 %7, 128
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = or i32 %11, -256
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @iso_712(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, 128
%5 = icmp eq i32 %4, 0
%6 = or i32 %3, -256
%7 = select i1 %5, i32 %3, i32 %6
ret i32 %7
}
int get_fips_error_state(void) { return 0; }


x86 assembly (clang, -O0):
<get_fips_error_state>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fips_error_state>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_fips_error_state() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_fips_error_state() {
ret i32 0
}
void _sedgesort_float(array, len) register float array[];
register int len;
{
  partial_quickersort_float(array, 0, len - 1);
  insort_float(array, len);
}


x86 assembly (clang, -O0):
<_sedgesort_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
mov    $0x0,%al
call   1030 <partial_quickersort_float@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1040 <insort_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sedgesort_float>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%r14d
mov    %rdi,%rbx
lea    -0x1(%r14),%edx
xor    %esi,%esi
xor    %eax,%eax
call   1030 <partial_quickersort_float@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <insort_float@plt>

LLVM IR (-O0):
define void @_sedgesort_float(float* %0, i32 %1) {
%3 = alloca float*
%4 = alloca i32
store float* %0, float** %3
store i32 %1, i32* %4
%5 = load float*, float** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 (float*, i32, i32, ...) bitcast (i32 (...)* @partial_quickersort_float to i32 (float*, i32, i32, ...)*)(float* %5, i32 0, i32 %7)
%9 = load float*, float** %3
%10 = load i32, i32* %4
%11 = call i32 (float*, i32, ...) bitcast (i32 (...)* @insort_float to i32 (float*, i32, ...)*)(float* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @_sedgesort_float(float* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 (float*, i32, i32, ...) bitcast (i32 (...)* @partial_quickersort_float to i32 (float*, i32, i32, ...)*)(float* %0, i32 0, i32 %3)
%5 = tail call i32 (float*, i32, ...) bitcast (i32 (...)* @insort_float to i32 (float*, i32, ...)*)(float* %0, i32 %1)
ret void
}
/* Variables and functions */
void *QSDK_alloc_memory_region();
int /*<<< orphan*/ qsdk_set_mr(void *, void *);
void *generic_rom_init(void *dev, void *init_data) {
  void *rom_dev = QSDK_alloc_memory_region();
  qsdk_set_mr(dev, rom_dev);
  return rom_dev;
}


x86 assembly (clang, -O0):
<generic_rom_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <QSDK_alloc_memory_region@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <qsdk_set_mr@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generic_rom_init>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <QSDK_alloc_memory_region@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <qsdk_set_mr@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @generic_rom_init(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i8* (...) @QSDK_alloc_memory_region()
store i8* %6, i8** %5
%7 = load i8*, i8** %3
%8 = load i8*, i8** %5
%9 = call i32 @qsdk_set_mr(i8* %7, i8* %8)
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define i8* @generic_rom_init(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i8* (...) @QSDK_alloc_memory_region()
%4 = tail call i32 @qsdk_set_mr(i8* %0, i8* %3)
ret i8* %3
}
/* Variables and functions */
void iccF(char *x) {
  int *y;
  y = x;
}


x86 assembly (clang, -O0):
<iccF>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<iccF>:
ret

LLVM IR (-O0):
define void @iccF(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
ret void
}

LLVM IR (-O2):
define void @iccF(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(char *);
int __attribute__((no)) bar(void) {
  char s[4096];
  s[0] = 'a';
  s[4096 - 1] = 'b';
  foo(s);
  foo(s);
  return 0;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1000,%rsp
movb   $0x61,-0x1000(%rbp)
movb   $0x62,-0x1(%rbp)
lea    -0x1000(%rbp),%rdi
call   1030 <foo@plt>
lea    -0x1000(%rbp),%rdi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x1000,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbx
sub    $0x1000,%rsp
movb   $0x61,(%rsp)
movb   $0x62,0xfff(%rsp)
62
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <foo@plt>
mov    %rbx,%rdi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x1000,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = alloca [4096 x i8]
%2 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 0
store i8 97, i8* %2
%3 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 4095
store i8 98, i8* %3
%4 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 0
%5 = call i32 @foo(i8* %4)
%6 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 0
%7 = call i32 @foo(i8* %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @bar() {
%1 = alloca [4096 x i8]
%2 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 0
store i8 97, i8* %2
%3 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 4095
store i8 98, i8* %3
%4 = call i32 @foo(i8* %2)
%5 = call i32 @foo(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ multiplyNumbers(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  printf("Enter a positive integer: ");
  scanf("%d", &n);
  printf("Factorial of %d = %ld", n, multiplyNumbers(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xec7(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <multiplyNumbers@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xea7(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed1(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%ebx
mov    %ebx,%edi
call   1030 <multiplyNumbers@plt>
lea    0xeb8(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Enter a positive integer: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [22 x i8] c"Factorial of %d = %ld\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @multiplyNumbers(i32 %6)
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0), i32 %5, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"Enter a positive integer: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [22 x i8] c"Factorial of %d = %ld\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @multiplyNumbers(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0), i32 %5, i32 %6)
ret i32 0
}
unsigned long crb_open(const char *devstr, unsigned long length) {
  return 0x8000000000000000ul;
}


x86 assembly (clang, -O0):
<crb_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0x8000000000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crb_open>:
movabs $0x8000000000000000,%rax
ret

LLVM IR (-O0):
define i64 @crb_open(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i64 -9223372036854775808
}

LLVM IR (-O2):
define i64 @crb_open(i8* nocapture readnone %0, i64 %1) {
ret i64 -9223372036854775808
}
/* Variables and functions */
int /*<<< orphan*/ ROM_IntEnable(int);
int /*<<< orphan*/ ROM_WatchdogEnable(int);
int /*<<< orphan*/ ROM_WatchdogReloadSet(int, int);
int /*<<< orphan*/ ROM_WatchdogStallEnable(int);
void WatchdogInit(void) {
  ROM_WatchdogReloadSet(0x40000000, (16000000 * 0.2));
  ROM_WatchdogStallEnable(0x40000000);
  ROM_WatchdogEnable(0x40000000);
  ROM_IntEnable(34);
}


x86 assembly (clang, -O0):
<WatchdogInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40000000,%edi
mov    $0x30d400,%esi
call   1030 <ROM_WatchdogReloadSet@plt>
mov    $0x40000000,%edi
call   1050 <ROM_WatchdogStallEnable@plt>
mov    $0x40000000,%edi
call   1040 <ROM_WatchdogEnable@plt>
mov    $0x22,%edi
call   1060 <ROM_IntEnable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogInit>:
push   %rax
mov    $0x40000000,%edi
mov    $0x30d400,%esi
call   1030 <ROM_WatchdogReloadSet@plt>
mov    $0x40000000,%edi
call   1050 <ROM_WatchdogStallEnable@plt>
mov    $0x40000000,%edi
call   1040 <ROM_WatchdogEnable@plt>
mov    $0x22,%edi
pop    %rax
jmp    1060 <ROM_IntEnable@plt>

LLVM IR (-O0):
define void @WatchdogInit() {
%1 = call i32 @ROM_WatchdogReloadSet(i32 1073741824, i32 3200000)
%2 = call i32 @ROM_WatchdogStallEnable(i32 1073741824)
%3 = call i32 @ROM_WatchdogEnable(i32 1073741824)
%4 = call i32 @ROM_IntEnable(i32 34)
ret void
}

LLVM IR (-O2):
define void @WatchdogInit() {
%1 = tail call i32 @ROM_WatchdogReloadSet(i32 1073741824, i32 3200000)
%2 = tail call i32 @ROM_WatchdogStallEnable(i32 1073741824)
%3 = tail call i32 @ROM_WatchdogEnable(i32 1073741824)
%4 = tail call i32 @ROM_IntEnable(i32 34)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int memcmp(void const *, void const *, int);
int cmp_ipdata_raw(size_t size_a, const void *key_a, size_t size_b,
                   const void *key_b) {
  assert(size_a == 16);
  assert(size_b == 16);
  return memcmp(key_a, key_b, 16);
}


x86 assembly (clang, -O0):
<cmp_ipdata_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x10,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
cmpq   $0x10,-0x18(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x10,%edx
call   1030 <memcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_ipdata_raw>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %rsi,%r15
xor    %eax,%eax
cmp    $0x10,%rdi
sete   %al
mov    %eax,%edi
call   1040 <assert@plt>
xor    %edi,%edi
cmp    $0x10,%rbx
sete   %dil
call   1040 <assert@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    $0x10,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define i32 @cmp_ipdata_raw(i64 %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i64 %0, i64* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i64, i64* %5
%10 = icmp eq i64 %9, 16
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i64, i64* %7
%14 = icmp eq i64 %13, 16
%15 = zext i1 %14 to i32
%16 = call i32 @assert(i32 %15)
%17 = load i8*, i8** %6
%18 = load i8*, i8** %8
%19 = call i32 @memcmp(i8* %17, i8* %18, i32 16)
ret i32 %19
}

LLVM IR (-O2):
define i32 @cmp_ipdata_raw(i64 %0, i8* %1, i64 %2, i8* %3) {
%5 = icmp eq i64 %0, 16
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = icmp eq i64 %2, 16
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
%11 = tail call i32 @memcmp(i8* %1, i8* %3, i32 16)
ret i32 %11
}
int C(int x) { return (x << 6) - (x << 2); }


x86 assembly (clang, -O0):
<C>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x6,%eax
mov    -0x4(%rbp),%ecx
shl    $0x2,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C>:
imul   $0x3c,%edi,%eax
ret

LLVM IR (-O0):
define i32 @C(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 6
%5 = load i32, i32* %2
%6 = shl i32 %5, 2
%7 = sub nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @C(i32 %0) {
%2 = mul i32 %0, 60
ret i32 %2
}
int input_map_c1(char c) {
  if (c >= '0' && c <= '3')
    return 1;
  else if (c >= '4' && c <= '7')
    return 2;
  else if (c >= '8' && c < '9')
    return 3;
  else if (c == 'a')
    return 4;
  else
    return 0;
}


x86 assembly (clang, -O0):
<input_map_c1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <input_map_c1+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x33,%eax
jg     1130 <input_map_c1+0x30>
movl   $0x1,-0x4(%rbp)
jmp    119c <input_map_c1+0x9c>
movsbl -0x5(%rbp),%eax
cmp    $0x34,%eax
jl     1156 <input_map_c1+0x56>
movsbl -0x5(%rbp),%eax
cmp    $0x37,%eax
jg     1156 <input_map_c1+0x56>
movl   $0x2,-0x4(%rbp)
jmp    119c <input_map_c1+0x9c>
movsbl -0x5(%rbp),%eax
cmp    $0x38,%eax
jl     117c <input_map_c1+0x7c>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jge    117c <input_map_c1+0x7c>
movl   $0x3,-0x4(%rbp)
jmp    119c <input_map_c1+0x9c>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jne    1195 <input_map_c1+0x95>
movl   $0x4,-0x4(%rbp)
jmp    119c <input_map_c1+0x9c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_map_c1>:
mov    %edi,%eax
and    $0xfc,%al
cmp    $0x30,%al
je     1112 <input_map_c1+0x12>
cmp    $0x34,%al
jne    1118 <input_map_c1+0x18>
mov    $0x2,%eax
ret
mov    $0x1,%eax
ret
xor    %ecx,%ecx
cmp    $0x61,%dil
sete   %cl
shl    $0x2,%ecx
cmp    $0x38,%dil
mov    $0x3,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @input_map_c1(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 51
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %36
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 52
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 55
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 2, i32* %2
br label %36
21: ; preds = %16, %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp sge i32 %23, 56
br i1 %24, label %25, label %30
25: ; preds = %21
%26 = load i8, i8* %3
%27 = sext i8 %26 to i32
%28 = icmp slt i32 %27, 57
br i1 %28, label %29, label %30
29: ; preds = %25
store i32 3, i32* %2
br label %36
30: ; preds = %25, %21
%31 = load i8, i8* %3
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 97
br i1 %33, label %34, label %35
34: ; preds = %30
store i32 4, i32* %2
br label %36
35: ; preds = %30
store i32 0, i32* %2
br label %36
36: ; preds = %35, %34, %29, %20, %11
%37 = load i32, i32* %2
ret i32 %37
}

LLVM IR (-O2):
define i32 @input_map_c1(i8 signext %0) {
%2 = and i8 %0, -4
switch i8 %2, label %3 [
i8 48, label %9
i8 52, label %8
]
3: ; preds = %1
%4 = icmp eq i8 %0, 97
%5 = select i1 %4, i32 4, i32 0
%6 = icmp eq i8 %0, 56
%7 = select i1 %6, i32 3, i32 %5
br label %9
8: ; preds = %1
br label %9
9: ; preds = %1, %8, %3
%10 = phi i32 [ 1, %1 ], [ %7, %3 ], [ 2, %8 ]
ret i32 %10
}
int _gfortran_caf_sync_all(char *errmsg __attribute__((unused)),
                           int errmsg_len __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<_gfortran_caf_sync_all>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gfortran_caf_sync_all>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_gfortran_caf_sync_all(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @_gfortran_caf_sync_all(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int clock_getres(int, struct timespec *);
int /*<<< orphan*/ printf(char *);
int main(void) {
  struct timespec res;
  if (clock_getres(99999, &res) == -1) {
    printf("Test PASSED\n");
    return 0;
  } else {
    printf("Test FAILED\n");
    return 1;
  }
  printf("This code should not be executed\n");
  return 2;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1869f,%edi
lea    -0x8(%rbp),%rsi
call   1040 <clock_getres@plt>
cmp    $0xffffffff,%eax
jne    115e <main+0x3e>
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
jmp    1171 <main+0x51>
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0x8(%rsp),%rsi
mov    $0x1869f,%edi
call   1040 <clock_getres@plt>
xor    %ebx,%ebx
cmp    $0xffffffff,%eax
setne  %bl
lea    0xec9(%rip),%rax
lea    0xeb6(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@.str = [13 x i8] c"Test PASSED\0A\00"
@.str.1 = [13 x i8] c"Test FAILED\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.timespec
store i32 0, i32* %1
%3 = call i32 @clock_getres(i32 99999, %struct.timespec* %2)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %1
br label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
store i32 1, i32* %1
br label %9
9: ; preds = %7, %5
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@str = [12 x i8] c"Test FAILED\00"
@str.2 = [12 x i8] c"Test PASSED\00"
define i32 @main() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = call i32 @clock_getres(i32 99999, %struct.timespec* %1)
%4 = icmp eq i32 %3, -1
%5 = select i1 %4, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0)
%6 = xor i1 %4, true
%7 = zext i1 %6 to i32
%8 = call i32 @puts(i8* dereferenceable(1) %5)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ z80_ed_44_neg();
void z80_ed_54_neg(void) { z80_ed_44_neg(); }


x86 assembly (clang, -O0):
<z80_ed_54_neg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <z80_ed_44_neg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<z80_ed_54_neg>:
xor    %eax,%eax
jmp    1030 <z80_ed_44_neg@plt>

LLVM IR (-O0):
define void @z80_ed_54_neg() {
%1 = call i32 (...) @z80_ed_44_neg()
ret void
}

LLVM IR (-O2):
define void @z80_ed_54_neg() {
%1 = tail call i32 (...) @z80_ed_44_neg()
ret void
}
void SVC_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<SVC_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <SVC_Handler+0x9>
jmp    1109 <SVC_Handler+0x9>

x86 assembly (clang, -O2):
<SVC_Handler>:
jmp    1100 <SVC_Handler>

LLVM IR (-O0):
define void @SVC_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @SVC_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void int_printer(int x) { printf("%d\n", x); }


x86 assembly (clang, -O0):
<int_printer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_printer>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @int_printer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @int_printer(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
struct qcc_list {
  int dummy;
};
struct qcc_interval_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ qcc_list_init(struct qcc_list *);
void qcc_interval_data_init(struct qcc_interval_data *list) {
  qcc_list_init((struct qcc_list *)list);
}


x86 assembly (clang, -O0):
<qcc_interval_data_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <qcc_list_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcc_interval_data_init>:
jmp    1030 <qcc_list_init@plt>

LLVM IR (-O0):
%struct.qcc_interval_data = type { i32 }
%struct.qcc_list = type { i32 }
define void @qcc_interval_data_init(%struct.qcc_interval_data* %0) {
%2 = alloca %struct.qcc_interval_data*
store %struct.qcc_interval_data* %0, %struct.qcc_interval_data** %2
%3 = load %struct.qcc_interval_data*, %struct.qcc_interval_data** %2
%4 = bitcast %struct.qcc_interval_data* %3 to %struct.qcc_list*
%5 = call i32 @qcc_list_init(%struct.qcc_list* %4)
ret void
}

LLVM IR (-O2):
%struct.qcc_interval_data = type { i32 }
%struct.qcc_list = type { i32 }
define void @qcc_interval_data_init(%struct.qcc_interval_data* %0) {
%2 = bitcast %struct.qcc_interval_data* %0 to %struct.qcc_list*
%3 = tail call i32 @qcc_list_init(%struct.qcc_list* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ll_free(void *ud, void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<ll_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ll_free>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ll_free(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @ll_free(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int cstart() {
  puts("Hello, World!\n\r");
  while (1)
    ;
}


x86 assembly (clang, -O0):
<cstart>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
jmp    1120 <cstart+0x10>

x86 assembly (clang, -O2):
<cstart>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
jmp    1120 <cstart+0x10>

LLVM IR (-O0):
@.str = [16 x i8] c"Hello, World!\0A\0D\00"
define i32 @cstart() {
%1 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [16 x i8] c"Hello, World!\0A\0D\00"
define i32 @cstart() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}