xunge/DecIR huggingface dataset:
int sub(int par, int a, int b) {
  if (par <= 0) {
    return a + b;
  } else {
    int c = sub(par - 1, a - 1, b + a);
    return c + 1 - a + sub(-1, a - b, b - a);
  }
}


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1139 <sub+0x29>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <sub+0x6f>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
mov    -0x10(%rbp),%edx
add    -0xc(%rbp),%edx
call   1030 <sub@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%esi
sub    -0x10(%rbp),%esi
mov    -0x10(%rbp),%edx
sub    -0xc(%rbp),%edx
mov    $0xffffffff,%edi
call   1030 <sub@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
push   %rbx
mov    %edx,%eax
mov    %esi,%ebx
test   %edi,%edi
jle    112f <sub+0x1f>
add    $0xffffffff,%edi
lea    -0x1(%rbx),%esi
add    %ebx,%eax
mov    %eax,%edx
call   1030 <sub@plt>
sub    %ebx,%eax
add    $0x1,%eax
pop    %rbx
ret
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sub(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = icmp sle i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = add nsw i32 %12, %13
store i32 %14, i32* %4
br label %36
15: ; preds = %3
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 1
%18 = load i32, i32* %6
%19 = sub nsw i32 %18, 1
%20 = load i32, i32* %7
%21 = load i32, i32* %6
%22 = add nsw i32 %20, %21
%23 = call i32 @sub(i32 %17, i32 %19, i32 %22)
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
%26 = load i32, i32* %6
%27 = sub nsw i32 %25, %26
%28 = load i32, i32* %6
%29 = load i32, i32* %7
%30 = sub nsw i32 %28, %29
%31 = load i32, i32* %7
%32 = load i32, i32* %6
%33 = sub nsw i32 %31, %32
%34 = call i32 @sub(i32 -1, i32 %30, i32 %33)
%35 = add nsw i32 %27, %34
store i32 %35, i32* %4
br label %36
36: ; preds = %15, %11
%37 = load i32, i32* %4
ret i32 %37
}

LLVM IR (-O2):
define i32 @sub(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, 1
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = add nsw i32 %2, %1
br label %7
7: ; preds = %5, %9
%8 = phi i32 [ %15, %9 ], [ %6, %5 ]
ret i32 %8
9: ; preds = %3
%10 = add nsw i32 %0, -1
%11 = add nsw i32 %1, -1
%12 = add nsw i32 %2, %1
%13 = tail call i32 @sub(i32 %10, i32 %11, i32 %12)
%14 = sub i32 1, %1
%15 = add i32 %14, %13
br label %7
}
/* Variables and functions */
int /*<<< orphan*/ poe_isdigit(char);
int poe_isnotdigit(char c) { return !poe_isdigit(c); }


x86 assembly (clang, -O0):
<poe_isnotdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <poe_isdigit@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<poe_isnotdigit>:
push   %rax
call   1030 <poe_isdigit@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @poe_isnotdigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @poe_isdigit(i8 signext %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @poe_isnotdigit(i8 signext %0) {
%2 = tail call i32 @poe_isdigit(i8 signext %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void periph_lock(void) {}


x86 assembly (clang, -O0):
<periph_lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<periph_lock>:
ret

LLVM IR (-O0):
define void @periph_lock() {
ret void
}

LLVM IR (-O2):
define void @periph_lock() {
ret void
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  printf("%d\n", getchar() != EOF);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2ea4(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%esi
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rcx
xor    %esi,%esi
cmp    (%rcx),%rax
setne  %sil
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@EOF = global i64 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @getchar()
%7 = load i64, i64* @EOF
%8 = icmp ne i64 %6, %7
%9 = zext i1 %8 to i32
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@EOF = global i64 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @getchar()
%4 = load i64, i64* @EOF
%5 = icmp ne i64 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int num;
  scanf("%d", &num);
  if (num > 0)
    printf("%d", num);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
jle    1158 <main+0x38>
mov    -0x8(%rbp),%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
test   %esi,%esi
jle    1146 <main+0x26>
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6, %0
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
br label %8
8: ; preds = %6, %0
ret i32 0
}
/* Type definitions */
typedef char *uint64_t;
typedef char *int64_t;

/* Variables and functions */
int64_t syscall1(uint64_t msg, uint64_t dest) {
  uint64_t res;
  __asm__ __volatile__("syscall"
                       : "=a"(res), "=D"(dest)
                       : "a"(msg), "D"(dest)
                       : "%rsi", "%rdx", "r8", "r9", "r10", "r11", "%rcx",
                         "memory");
  return res;
}


x86 assembly (clang, -O0):
<syscall1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
syscall
mov    %rax,-0x18(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall1>:
mov    %rdi,%rax
mov    %rsi,%rdi
syscall
ret

LLVM IR (-O0):
define i8* @syscall1(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call { i8*, i8* } asm sideeffect "syscall", "={ax},={di},{ax},{di},~{rsi},~{rdx},~{r8},~{r9},~{r10},~{r11},~{rcx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %6, i8* %7)
%9 = extractvalue { i8*, i8* } %8, 0
%10 = extractvalue { i8*, i8* } %8, 1
store i8* %9, i8** %5
store i8* %10, i8** %4
%11 = load i8*, i8** %5
ret i8* %11
}

LLVM IR (-O2):
define i8* @syscall1(i8* %0, i8* %1) {
%3 = tail call { i8*, i8* } asm sideeffect "syscall", "={ax},={di},{ax},{di},~{rsi},~{rdx},~{r8},~{r9},~{r10},~{r11},~{rcx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1)
%4 = extractvalue { i8*, i8* } %3, 0
ret i8* %4
}
const char *GetGreeting3() { return "Hello, universe"; }


x86 assembly (clang, -O0):
<GetGreeting3>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetGreeting3>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Hello, universe\00"
define i8* @GetGreeting3() {
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [16 x i8] c"Hello, universe\00"
define i8* @GetGreeting3() {
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x3f() {
  Assert_real((isascii(63)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              320, ("isascii should be 1 for ?"));
}


x86 assembly (clang, -O0):
<t_isascii_0x3f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x140,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x3f>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x140,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for ?\00"
define void @t_isascii_0x3f() {
%1 = call i32 @isascii(i32 63)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 320, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for ?\00"
define void @t_isascii_0x3f() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 320, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void instruction_prefetch_flush(void) {}


x86 assembly (clang, -O0):
<instruction_prefetch_flush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruction_prefetch_flush>:
ret

LLVM IR (-O0):
define void @instruction_prefetch_flush() {
ret void
}

LLVM IR (-O2):
define void @instruction_prefetch_flush() {
ret void
}
int mdb_is_null(unsigned char *null_mask, int col_num) {
  int byte_num = (col_num - 1) / 8;
  int bit_num = (col_num - 1) % 8;
  if ((1 << bit_num) & null_mask[byte_num]) {
    return 0;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<mdb_is_null>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,-0x1c(%rbp)
mov    -0x1c(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
movzbl (%rcx,%rdx,1),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     115a <mdb_is_null+0x5a>
movl   $0x0,-0x4(%rbp)
jmp    1161 <mdb_is_null+0x61>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdb_is_null>:
lea    -0x1(%rsi),%ecx
add    $0x6,%esi
test   %ecx,%ecx
cmovns %ecx,%esi
sar    $0x3,%esi
movslq %esi,%rax
movzbl (%rdi,%rax,1),%eax
not    %eax
and    $0x7,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mdb_is_null(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%8 = load i32, i32* %5
%9 = sub nsw i32 %8, 1
%10 = sdiv i32 %9, 8
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = srem i32 %12, 8
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = shl i32 1, %14
%16 = load i8*, i8** %4
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = and i32 %15, %21
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %25
24: ; preds = %2
store i32 0, i32* %3
br label %26
25: ; preds = %2
store i32 1, i32* %3
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @mdb_is_null(i8* nocapture %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = sdiv i32 %3, 8
%5 = and i32 %3, 7
%6 = sext i32 %4 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = xor i32 %9, -1
%11 = lshr i32 %10, %5
%12 = and i32 %11, 1
ret i32 %12
}
/* Variables and functions */
double sin(double const);
double _sine(const int numInputs, const double *inputs,
             const double *connectionWeights) {
  return sin(inputs[0]);
}


x86 assembly (clang, -O0):
<_sine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <sin@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sine>:
movsd  (%rsi),%xmm0
jmp    1030 <sin@plt>

LLVM IR (-O0):
define double @_sine(i32 %0, double* %1, double* %2) {
%4 = alloca i32
%5 = alloca double*
%6 = alloca double*
store i32 %0, i32* %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %5
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = call double @sin(double %9)
ret double %10
}

LLVM IR (-O2):
define double @_sine(i32 %0, double* nocapture %1, double* nocapture readnone %2) {
%4 = load double, double* %1
%5 = tail call double @sin(double %4)
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_SIZE16_swap(char *, int);
int /*<<< orphan*/ bitmap16_swap(char *);
void U_WMRCREATEPATTERNBRUSH_swap(char *record, int torev) {
  U_WMRCORE_SIZE16_swap(record, torev);
  bitmap16_swap(record + 6);
}


x86 assembly (clang, -O0):
<U_WMRCREATEPATTERNBRUSH_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <U_WMRCORE_SIZE16_swap@plt>
mov    -0x8(%rbp),%rdi
add    $0x6,%rdi
call   1030 <bitmap16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRCREATEPATTERNBRUSH_swap>:
push   %rbx
mov    %rdi,%rbx
call   1040 <U_WMRCORE_SIZE16_swap@plt>
add    $0x6,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <bitmap16_swap@plt>

LLVM IR (-O0):
define void @U_WMRCREATEPATTERNBRUSH_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_SIZE16_swap(i8* %5, i32 %6)
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 6
%10 = call i32 @bitmap16_swap(i8* %9)
ret void
}

LLVM IR (-O2):
define void @U_WMRCREATEPATTERNBRUSH_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_SIZE16_swap(i8* %0, i32 %1)
%4 = getelementptr inbounds i8, i8* %0, i64 6
%5 = tail call i32 @bitmap16_swap(i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bprintf(char *, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ write_output();
void error(char *fmt, int n) {
  bprintf(fmt, n);
  write_output();
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <bprintf@plt>
mov    $0x0,%al
call   1030 <write_output@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1040 <bprintf@plt>
xor    %eax,%eax
call   1030 <write_output@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @bprintf(i8* %5, i32 %6)
%8 = call i32 (...) @write_output()
%9 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @error(i8* %0, i32 %1) {
%3 = tail call i32 @bprintf(i8* %0, i32 %1)
%4 = tail call i32 (...) @write_output()
%5 = tail call i32 @exit(i32 1)
unreachable
}
char *replace(char *s, char old, char new) {
  char *p = s;
  while (*p) {
    if (*p == old)
      *p = new;
    ++p;
  }
  return s;
}


x86 assembly (clang, -O0):
<replace>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1155 <replace+0x55>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1144 <replace+0x44>
mov    -0xa(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111b <replace+0x1b>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<replace>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1125 <replace+0x25>
lea    0x1(%rax),%rdi
jmp    111b <replace+0x1b>
nop
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
je     1125 <replace+0x25>
cmp    %sil,%cl
jne    1110 <replace+0x10>
mov    %dl,-0x1(%rdi)
jmp    1110 <replace+0x10>
ret

LLVM IR (-O0):
define i8* @replace(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %23, %3
%10 = load i8*, i8** %7
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i8*, i8** %7
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i8, i8* %6
%22 = load i8*, i8** %7
store i8 %21, i8* %22
br label %23
23: ; preds = %20, %13
%24 = load i8*, i8** %7
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %7
br label %9
26: ; preds = %9
%27 = load i8*, i8** %4
ret i8* %27
}

LLVM IR (-O2):
define i8* @replace(i8* returned %0, i8 signext %1, i8 signext %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %11
%7 = phi i8 [ %13, %11 ], [ %4, %3 ]
%8 = phi i8* [ %12, %11 ], [ %0, %3 ]
%9 = icmp eq i8 %7, %1
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 %2, i8* %8
br label %11
11: ; preds = %10, %6
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %11, %3
ret i8* %0
}
/* Type definitions */
struct linked_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ linked_list_append(struct linked_list *, int *);
int *malloc(int);
void append_parsed_rule(struct linked_list *parsed_rules, int rule_index) {
  int *rule_ptr;
  rule_ptr = malloc(sizeof(*rule_ptr));
  *rule_ptr = rule_index;
  linked_list_append(parsed_rules, rule_ptr);
}


x86 assembly (clang, -O0):
<append_parsed_rule>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <linked_list_append@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append_parsed_rule>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %ebx,(%rax)
mov    %r14,%rdi
mov    %rax,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <linked_list_append@plt>

LLVM IR (-O0):
%struct.linked_list = type { i32 }
define void @append_parsed_rule(%struct.linked_list* %0, i32 %1) {
%3 = alloca %struct.linked_list*
%4 = alloca i32
%5 = alloca i32*
store %struct.linked_list* %0, %struct.linked_list** %3
store i32 %1, i32* %4
%6 = call i32* @malloc(i32 4)
store i32* %6, i32** %5
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
store i32 %7, i32* %8
%9 = load %struct.linked_list*, %struct.linked_list** %3
%10 = load i32*, i32** %5
%11 = call i32 @linked_list_append(%struct.linked_list* %9, i32* %10)
ret void
}

LLVM IR (-O2):
%struct.linked_list = type { i32 }
define void @append_parsed_rule(%struct.linked_list* %0, i32 %1) {
%3 = tail call i32* @malloc(i32 4)
store i32 %1, i32* %3
%4 = tail call i32 @linked_list_append(%struct.linked_list* %0, i32* %3)
ret void
}
void test_isdigit(void) {
  int i, j;
  for (i = -127; i < 256;)
    j = i, printf("%s: %d -> %d\n", __FUNCTION__, j, isdigit(i++) ? 1 : 0);
}


x86 assembly (clang, -O0):
<test_isdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffff81,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
jge    1184 <test_isdigit+0x64>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    %edi,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
call   1030 <isdigit@plt>
mov    -0xc(%rbp),%edx
mov    %eax,%esi
xor    %ecx,%ecx
mov    $0x1,%eax
cmp    $0x0,%esi
cmovne %eax,%ecx
lea    0xe8f(%rip),%rdi
lea    0xe96(%rip),%rsi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    112f <test_isdigit+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_isdigit>:
push   %r15
push   %r14
push   %rbx
mov    $0xffffff51,%ebx
lea    0xedf(%rip),%r14
lea    0xee6(%rip),%r15
nopl   0x0(%rax,%rax,1)
lea    0x30(%rbx),%edx
xor    %ecx,%ecx
cmp    $0xa,%ebx
setb   %cl
mov    %r14,%rdi
mov    %r15,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0xd0,%ebx
jne    1130 <test_isdigit+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%s: %d -> %d\0A\00"
@__FUNCTION__.test_isdigit = [13 x i8] c"test_isdigit\00"
define void @test_isdigit() {
%1 = alloca i32
%2 = alloca i32
store i32 -127, i32* %1
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i32, i32* %1
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
%11 = call i32 @isdigit(i32 %9)
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
%15 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.test_isdigit, i64 0, i64 0), i32 %8, i32 %14)
br label %3
16: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"%s: %d -> %d\0A\00"
@__FUNCTION__.test_isdigit = [13 x i8] c"test_isdigit\00"
define void @test_isdigit() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ -127, %0 ], [ %3, %1 ]
%3 = add nsw i32 %2, 1
%4 = add nsw i32 %2, -48
%5 = icmp ult i32 %4, 10
%6 = zext i1 %5 to i32
%7 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.test_isdigit, i64 0, i64 0), i32 %2, i32 %6)
%8 = icmp eq i32 %3, 256
br i1 %8, label %9, label %1
9: ; preds = %1
ret void
}
void g_param_spec_uchar() {}


x86 assembly (clang, -O0):
<g_param_spec_uchar>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_uchar>:
ret

LLVM IR (-O0):
define void @g_param_spec_uchar() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_uchar() {
ret void
}
/* Variables and functions */
int fltcmp(float, float);
int fltcmp_desc(float v1, float v2) { return fltcmp(v1, v2) * -1; }


x86 assembly (clang, -O0):
<fltcmp_desc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <fltcmp@plt>
imul   $0xffffffff,%eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fltcmp_desc>:
push   %rax
call   1030 <fltcmp@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fltcmp_desc(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @fltcmp(float %5, float %6)
%8 = mul nsw i32 %7, -1
ret i32 %8
}

LLVM IR (-O2):
define i32 @fltcmp_desc(float %0, float %1) {
%3 = tail call i32 @fltcmp(float %0, float %1)
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int add(int, int);
int main() { return add(17, 3); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x11,%edi
mov    $0x3,%esi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x11,%edi
mov    $0x3,%esi
jmp    1030 <add@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @add(i32 17, i32 3)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @add(i32 17, i32 3)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ thbrk_on_unload();
__attribute__((destructor)) void _libthai_on_unload() { thbrk_on_unload(); }


x86 assembly (clang, -O0):
<_libthai_on_unload>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <thbrk_on_unload@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_libthai_on_unload>:
xor    %eax,%eax
jmp    1030 <thbrk_on_unload@plt>

LLVM IR (-O0):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_libthai_on_unload, i8* null }]
define void @_libthai_on_unload() {
%1 = call i32 (...) @thbrk_on_unload()
ret void
}

LLVM IR (-O2):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_libthai_on_unload, i8* null }]
define void @_libthai_on_unload() {
%1 = tail call i32 (...) @thbrk_on_unload()
ret void
}
/* Variables and functions */
scalar_t__ islower(char);
scalar_t__ isupper(char);
int DecodePosChar(char c) {
  if (islower(c))
    return (c - 'a' + 1);
  else if (isupper(c))
    return (c - 'A' + 27);
  else
    return (0);
}


x86 assembly (clang, -O0):
<DecodePosChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     1153 <DecodePosChar+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    117f <DecodePosChar+0x5f>
movsbl -0x5(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
je     1178 <DecodePosChar+0x58>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
add    $0x1b,%eax
mov    %eax,-0x4(%rbp)
jmp    117f <DecodePosChar+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DecodePosChar>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
movsbl %bl,%ebx
test   %rax,%rax
je     1135 <DecodePosChar+0x15>
add    $0xffffffa0,%ebx
jmp    1148 <DecodePosChar+0x28>
mov    %ebx,%edi
call   1040 <isupper@plt>
test   %rax,%rax
je     1146 <DecodePosChar+0x26>
add    $0xffffffda,%ebx
jmp    1148 <DecodePosChar+0x28>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @DecodePosChar(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @islower(i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 97
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %22
12: ; preds = %1
%13 = load i8, i8* %3
%14 = call i64 @isupper(i8 signext %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = sub nsw i32 %18, 65
%20 = add nsw i32 %19, 27
store i32 %20, i32* %2
br label %22
21: ; preds = %12
store i32 0, i32* %2
br label %22
22: ; preds = %21, %16, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @DecodePosChar(i8 signext %0) {
%2 = tail call i64 @islower(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = sext i8 %0 to i32
%6 = add nsw i32 %5, -96
br label %13
7: ; preds = %1
%8 = tail call i64 @isupper(i8 signext %0)
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = sext i8 %0 to i32
%12 = add nsw i32 %11, -38
br label %13
13: ; preds = %7, %10, %4
%14 = phi i32 [ %6, %4 ], [ %12, %10 ], [ 0, %7 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ haptic_hal_write8(int, int);
void haptic_reset() { haptic_hal_write8(0x01, 0x80); }


x86 assembly (clang, -O0):
<haptic_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x80,%esi
call   1030 <haptic_hal_write8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<haptic_reset>:
mov    $0x1,%edi
mov    $0x80,%esi
jmp    1030 <haptic_hal_write8@plt>

LLVM IR (-O0):
define void @haptic_reset() {
%1 = call i32 @haptic_hal_write8(i32 1, i32 128)
ret void
}

LLVM IR (-O2):
define void @haptic_reset() {
%1 = tail call i32 @haptic_hal_write8(i32 1, i32 128)
ret void
}
int test_imm_7Euint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x7E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Euint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x7e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Euint64_highword_mem>:
testb  $0x7e,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Euint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 126
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Euint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 541165879296
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
long fromMilli(long);
long toMilli(long);
long Add_seconds(long tm, long sec) {
  long ms = toMilli(tm);
  long sa = sec * 1000L;
  return fromMilli(ms + sa);
}


x86 assembly (clang, -O0):
<Add_seconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <toMilli@plt>
mov    %rax,-0x18(%rbp)
imul   $0x3e8,-0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
add    -0x20(%rbp),%rdi
call   1040 <fromMilli@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Add_seconds>:
push   %rbx
mov    %rsi,%rbx
call   1030 <toMilli@plt>
imul   $0x3e8,%rbx,%rdi
add    %rax,%rdi
pop    %rbx
jmp    1040 <fromMilli@plt>

LLVM IR (-O0):
define i64 @Add_seconds(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = call i64 @toMilli(i64 %7)
store i64 %8, i64* %5
%9 = load i64, i64* %4
%10 = mul nsw i64 %9, 1000
store i64 %10, i64* %6
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = add nsw i64 %11, %12
%14 = call i64 @fromMilli(i64 %13)
ret i64 %14
}

LLVM IR (-O2):
define i64 @Add_seconds(i64 %0, i64 %1) {
%3 = tail call i64 @toMilli(i64 %0)
%4 = mul nsw i64 %1, 1000
%5 = add nsw i64 %3, %4
%6 = tail call i64 @fromMilli(i64 %5)
ret i64 %6
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void *gs_alloc(size_t nmemb, size_t size) {
  void *p = NULL;
  p = calloc(nmemb, size);
  if (p == NULL)
    fprintf(stderr, "Out of memory.\n");
  return p;
}


x86 assembly (clang, -O0):
<gs_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1169 <gs_alloc+0x49>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs_alloc>:
push   %rbx
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1143 <gs_alloc+0x23>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
lea    0xec2(%rip),%rsi
call   1040 <fprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [16 x i8] c"Out of memory.\0A\00"
define i8* @gs_alloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
store i8* null, i8** %5
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %11, %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [16 x i8] c"Out of memory.\0A\00"
define noalias i8* @gs_alloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5, %2
ret i8* %3
}
int test_imm_0Auint8_reg(unsigned char val) {
  return ((val) & (0x0A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Auint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xa,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Auint8_reg>:
test   $0xa,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Auint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 10
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Auint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 10
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int mspack_version(int entity) {
  switch (entity) {
  case (0):
  case (1):
  case (2):
  case (4):
    return 1;
  case (3):
  case (5):
  case (6):
  case (7):
  case (8):
  case (9):
  case (10):
  case (11):
  case (12):
  case (13):
    return 0;
  }
  return -1;
}


x86 assembly (clang, -O0):
<mspack_version>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x3,%eax
jb     1151 <mspack_version+0x51>
jmp    111b <mspack_version+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x3,%eax
je     115d <mspack_version+0x5d>
jmp    112c <mspack_version+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x4,%eax
je     1151 <mspack_version+0x51>
jmp    113d <mspack_version+0x3d>
mov    -0xc(%rbp),%eax
add    $0xfffffffb,%eax
sub    $0x9,%eax
jb     115d <mspack_version+0x5d>
jmp    1169 <mspack_version+0x69>
movl   $0x1,-0x4(%rbp)
jmp    1170 <mspack_version+0x70>
movl   $0x0,-0x4(%rbp)
jmp    1170 <mspack_version+0x70>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mspack_version>:
mov    $0xffffffff,%eax
cmp    $0xd,%edi
ja     1117 <mspack_version+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @mspack_version(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %5
i32 2, label %5
i32 4, label %5
i32 3, label %6
i32 5, label %6
i32 6, label %6
i32 7, label %6
i32 8, label %6
i32 9, label %6
i32 10, label %6
i32 11, label %6
i32 12, label %6
i32 13, label %6
]
5: ; preds = %1, %1, %1, %1
store i32 1, i32* %2
br label %8
6: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@switch.table.mspack_version = [14 x i32] [i32 1, i32 1, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0]
define i32 @mspack_version(i32 %0) {
%2 = icmp ult i32 %0, 14
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [14 x i32], [14 x i32]* @switch.table.mspack_version, i64 0, i64 %4
%6 = load i32, i32* %5
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ -1, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ BNCIO(int);
long int BNCArbitrary() {
  long int stat = 99;
  BNCIO(24);
  return (stat);
}


x86 assembly (clang, -O0):
<BNCArbitrary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x63,-0x8(%rbp)
mov    $0x18,%edi
call   1030 <BNCIO@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BNCArbitrary>:
push   %rax
mov    $0x18,%edi
call   1030 <BNCIO@plt>
mov    $0x63,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @BNCArbitrary() {
%1 = alloca i64
store i64 99, i64* %1
%2 = call i32 @BNCIO(i32 24)
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @BNCArbitrary() {
%1 = tail call i32 @BNCIO(i32 24)
ret i64 99
}
/* Type definitions */
typedef int wint_t;

/* Variables and functions */
int iswupper(wint_t wc) {
  return (wc >= 0 && wc < 128 ? wc >= 'A' && wc <= 'Z' : 0);
}


x86 assembly (clang, -O0):
<iswupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1147 <iswupper+0x47>
cmpl   $0x80,-0x4(%rbp)
jge    1147 <iswupper+0x47>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1137 <iswupper+0x37>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
jmp    1151 <iswupper+0x51>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    1151 <iswupper+0x51>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @iswupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 128
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ false, %8 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
br label %18
17: ; preds = %5, %1
br label %18
18: ; preds = %17, %14
%19 = phi i32 [ %16, %14 ], [ 0, %17 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @iswupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ acos(double);
float acosf(float x) { return (float)acos((double)x); }


x86 assembly (clang, -O0):
<acosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <acos@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acosf>:
push   %rax
cvtss2sd %xmm0,%xmm0
call   1030 <acos@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @acosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i64 @acos(double %4)
%6 = sitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @acosf(float %0) {
%2 = fpext float %0 to double
%3 = tail call i64 @acos(double %2)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef int int32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t __SMLADX(uint32_t x, uint32_t y,
                                           uint32_t sum) {
  return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) +
                     ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)) +
                     (((int32_t)sum))));
}


x86 assembly (clang, -O0):
<__SMLADX>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x10,%eax
sar    $0x10,%eax
mov    -0x10(%rbp),%rcx
sar    $0x10,%ecx
imul   %ecx,%eax
mov    -0x8(%rbp),%rcx
sar    $0x10,%ecx
mov    -0x10(%rbp),%rdx
shl    $0x10,%edx
sar    $0x10,%edx
imul   %edx,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
add    %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<__SMLADX>:
movswl %di,%eax
movswl %si,%ecx
sar    $0x10,%esi
imul   %eax,%esi
sar    $0x10,%edi
imul   %edi,%ecx
add    %esi,%edx
add    %ecx,%edx
movslq %edx,%rax
ret

LLVM IR (-O0):
define i64 @__SMLADX(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %8, 16
%10 = ashr i32 %9, 16
%11 = load i64, i64* %5
%12 = trunc i64 %11 to i32
%13 = ashr i32 %12, 16
%14 = mul nsw i32 %10, %13
%15 = load i64, i64* %4
%16 = trunc i64 %15 to i32
%17 = ashr i32 %16, 16
%18 = load i64, i64* %5
%19 = trunc i64 %18 to i32
%20 = shl i32 %19, 16
%21 = ashr i32 %20, 16
%22 = mul nsw i32 %17, %21
%23 = add nsw i32 %14, %22
%24 = load i64, i64* %6
%25 = trunc i64 %24 to i32
%26 = add nsw i32 %23, %25
%27 = sext i32 %26 to i64
ret i64 %27
}

LLVM IR (-O2):
define i64 @__SMLADX(i64 %0, i64 %1, i64 %2) {
%4 = trunc i64 %0 to i32
%5 = shl i32 %4, 16
%6 = ashr exact i32 %5, 16
%7 = trunc i64 %1 to i32
%8 = ashr i32 %7, 16
%9 = mul nsw i32 %6, %8
%10 = ashr i32 %4, 16
%11 = shl i32 %7, 16
%12 = ashr exact i32 %11, 16
%13 = mul nsw i32 %12, %10
%14 = trunc i64 %2 to i32
%15 = add i32 %9, %14
%16 = add i32 %15, %13
%17 = sext i32 %16 to i64
ret i64 %17
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
long int telldir(DIR *dirp) {
  if (dirp == NULL) {
    __set_errno(EINVAL);
    return -1l;
  }
  __set_errno(ENOSYS);
  return -1l;
}


x86 assembly (clang, -O0):
<telldir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1142 <telldir+0x32>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1158 <telldir+0x48>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<telldir>:
push   %rax
test   %rdi,%rdi
jne    111f <telldir+0xf>
mov    0x2ebb(%rip),%rax
jmp    1126 <telldir+0x16>
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffffffffffff,%rax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i64 @telldir(i32* %0) {
%2 = alloca i64
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* @EINVAL
%8 = call i32 @__set_errno(i32 %7)
store i64 -1, i64* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* @ENOSYS
%11 = call i32 @__set_errno(i32 %10)
store i64 -1, i64* %2
br label %12
12: ; preds = %9, %6
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i64 @telldir(i32* readnone %0) {
%2 = icmp eq i32* %0, null
%3 = load i32, i32* @EINVAL
%4 = load i32, i32* @ENOSYS
%5 = select i1 %2, i32 %3, i32 %4
%6 = tail call i32 @__set_errno(i32 %5)
ret i64 -1
}
extern void insb(unsigned short port, void *addr, unsigned long count) {
  __asm__ __volatile__("cld ; rep ; ins"
                       "b"
                       : "=D"(addr), "=c"(count)
                       : "d"(port), "0"(addr), "1"(count));
}


x86 assembly (clang, -O0):
<insb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
cld
rep insb (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insb>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
cld
rep insb (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insb(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i16, i16* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call { i8*, i64 } asm sideeffect "cld ; rep ; insb", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %7, i8* %8, i64 %9)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insb(i16 zeroext %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "cld ; rep ; insb", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %0, i8* %1, i64 %2)
ret void
}
unsigned constant_time_ge(unsigned a, unsigned b) {
  a -= b;
  return ((unsigned)((int)(~a) >> (sizeof(int) * 8 - 1)));
}


x86 assembly (clang, -O0):
<constant_time_ge>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
sar    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constant_time_ge>:
not    %edi
lea    (%rdi,%rsi,1),%eax
sar    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @constant_time_ge(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sub i32 %6, %5
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = xor i32 %8, -1
%10 = ashr i32 %9, 31
ret i32 %10
}

LLVM IR (-O2):
define i32 @constant_time_ge(i32 %0, i32 %1) {
%3 = xor i32 %0, -1
%4 = add i32 %3, %1
%5 = ashr i32 %4, 31
ret i32 %5
}