xunge/DecIR huggingface dataset:
int atoi(char *str) {
  int res = 0;
  int i;
  for (i = 0; str[i] != '\0'; ++i)
    res = res * 10 + str[i] - '0';
  return res;
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1151 <atoi+0x51>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <atoi+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <atoi+0x28>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <atoi+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %24, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %27
13: ; preds = %5
%14 = load i32, i32* %3
%15 = mul nsw i32 %14, 10
%16 = load i8*, i8** %2
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = add nsw i32 %15, %21
%23 = sub nsw i32 %22, 48
store i32 %23, i32* %3
br label %24
24: ; preds = %13
%25 = load i32, i32* %4
%26 = add nsw i32 %25, 1
store i32 %26, i32* %4
br label %5
27: ; preds = %5
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @atoi(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %12, %4 ], [ 0, %1 ]
%6 = phi i8 [ %14, %4 ], [ %2, %1 ]
%7 = phi i32 [ %11, %4 ], [ 0, %1 ]
%8 = sext i8 %6 to i32
%9 = mul nsw i32 %7, 10
%10 = add i32 %9, -48
%11 = add i32 %10, %8
%12 = add nuw nsw i64 %5, 1
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4, %1
%17 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %17
}
/* Variables and functions */
const char *udev_get_sys_path(void *udev) {
  if (!udev)
    return NULL;
  return "/sys";
}


x86 assembly (clang, -O0):
<udev_get_sys_path>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1120 <udev_get_sys_path+0x20>
movq   $0x0,-0x8(%rbp)
jmp    112b <udev_get_sys_path+0x2b>
lea    0xed9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<udev_get_sys_path>:
test   %rdi,%rdi
lea    0xef6(%rip),%rax
cmove  %rdi,%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"/sys\00"
define i8* @udev_get_sys_path(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i8* null, i8** %2
br label %8
7: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %6
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [5 x i8] c"/sys\00"
define i8* @udev_get_sys_path(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = select i1 %2, i8* null, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
/* Type definitions */
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pci_release_region(struct pci_dev *, int);
void pci_release_regions(struct pci_dev *pdev) {
  int i;
  {
    i = 0;
    while (i < 6) {
      pci_release_region(pdev, i);
      i++;
    }
    return;
  }
}


x86 assembly (clang, -O0):
<pci_release_regions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x6,-0xc(%rbp)
jge    1147 <pci_release_regions+0x37>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <pci_release_region@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <pci_release_regions+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_release_regions>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
call   1030 <pci_release_region@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <pci_release_region@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <pci_release_region@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <pci_release_region@plt>
mov    %rbx,%rdi
mov    $0x4,%esi
call   1030 <pci_release_region@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
pop    %rbx
jmp    1030 <pci_release_region@plt>

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
define void @pci_release_regions(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
%3 = alloca i32
store %struct.pci_dev* %0, %struct.pci_dev** %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 6
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load %struct.pci_dev*, %struct.pci_dev** %2
%9 = load i32, i32* %3
%10 = call i32 @pci_release_region(%struct.pci_dev* %8, i32 %9)
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
define void @pci_release_regions(%struct.pci_dev* %0) {
%2 = tail call i32 @pci_release_region(%struct.pci_dev* %0, i32 0)
%3 = tail call i32 @pci_release_region(%struct.pci_dev* %0, i32 1)
%4 = tail call i32 @pci_release_region(%struct.pci_dev* %0, i32 2)
%5 = tail call i32 @pci_release_region(%struct.pci_dev* %0, i32 3)
%6 = tail call i32 @pci_release_region(%struct.pci_dev* %0, i32 4)
%7 = tail call i32 @pci_release_region(%struct.pci_dev* %0, i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char **);
void freelist(char **list) {
  char **cp = list;
  while (*cp)
    free(*cp++);
  free(list);
}


x86 assembly (clang, -O0):
<freelist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     114e <freelist+0x3e>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%rdi
call   1030 <free@plt>
jmp    1124 <freelist+0x14>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freelist>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <freelist+0x31>
lea    0x8(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <freelist+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freelist(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
store i8** %4, i8*** %3
br label %5
5: ; preds = %9, %1
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8**, i8*** %3
%11 = getelementptr inbounds i8*, i8** %10, i32 1
store i8** %11, i8*** %3
%12 = load i8*, i8** %10
%13 = bitcast i8* %12 to i8**
%14 = call i32 @free(i8** %13)
br label %5
15: ; preds = %5
%16 = load i8**, i8*** %2
%17 = call i32 @free(i8** %16)
ret void
}

LLVM IR (-O2):
define void @freelist(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %10, %4 ], [ %2, %1 ]
%6 = phi i8** [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = bitcast i8* %5 to i8**
%9 = tail call i32 @free(i8** %8)
%10 = load i8*, i8** %7
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %4
12: ; preds = %4, %1
%13 = tail call i32 @free(i8** %0)
ret void
}
/* Variables and functions */
int xatoll_range(char const *, int, int);
__attribute__((always_)) int xatoi_range(const char *str, int l, int u) {
  return xatoll_range(str, l, u);
}


x86 assembly (clang, -O0):
<xatoi_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <xatoll_range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xatoi_range>:
jmp    1030 <xatoll_range@plt>

LLVM IR (-O0):
define i32 @xatoi_range(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @xatoll_range(i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @xatoi_range(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @xatoll_range(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
int is_blank(int c) { return 0; }


x86 assembly (clang, -O0):
<is_blank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_blank>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_blank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @is_blank(i32 %0) {
ret i32 0
}
int hex2dec3Byte(unsigned char byte2, unsigned char byte1,
                 unsigned char byte0) {
  return (byte2 << 16) + (byte1 << 8) + byte0;
}


x86 assembly (clang, -O0):
<hex2dec3Byte>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x10,%eax
movzbl -0x2(%rbp),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
movzbl -0x3(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex2dec3Byte>:
shl    $0x10,%edi
shl    $0x8,%esi
lea    (%rsi,%rdi,1),%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @hex2dec3Byte(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 16
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = add nsw i32 %9, %12
%14 = load i8, i8* %6
%15 = zext i8 %14 to i32
%16 = add nsw i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @hex2dec3Byte(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 16
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %5
%9 = zext i8 %2 to i32
%10 = or i32 %8, %9
ret i32 %10
}
/* Type definitions */
struct String {
  int dummy;
};

/* Variables and functions */
struct String *auto_ftoa(double);
struct String *String_0_toString_2_Double(double value) {
  return auto_ftoa(value);
}


x86 assembly (clang, -O0):
<String_0_toString_2_Double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <auto_ftoa@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<String_0_toString_2_Double>:
jmp    1030 <auto_ftoa@plt>

LLVM IR (-O0):
%struct.String = type { i32 }
define %struct.String* @String_0_toString_2_Double(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call %struct.String* @auto_ftoa(double %3)
ret %struct.String* %4
}

LLVM IR (-O2):
%struct.String = type { i32 }
define %struct.String* @String_0_toString_2_Double(double %0) {
%2 = tail call %struct.String* @auto_ftoa(double %0)
ret %struct.String* %2
}
int cnotint(char c, char t[]) {
  int i, out;
  out = 1;
  for (i = 0; t[i] != '\0'; i++)
    if (c == t[i])
      out = 0;
  return out;
}


x86 assembly (clang, -O0):
<cnotint>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1163 <cnotint+0x63>
movsbl -0x1(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    1150 <cnotint+0x50>
movl   $0x0,-0x18(%rbp)
jmp    1155 <cnotint+0x55>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111c <cnotint+0x1c>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnotint>:
mov    (%rsi),%cl
test   %cl,%cl
je     1132 <cnotint+0x32>
add    $0x1,%rsi
mov    $0x1,%eax
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    %dil,%cl
cmove  %edx,%eax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <cnotint+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cnotint(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %3
store i8* %1, i8** %4
store i32 1, i32* %6
store i32 0, i32* %5
br label %7
7: ; preds = %27, %2
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %30
15: ; preds = %7
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = load i8*, i8** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %17, %23
br i1 %24, label %25, label %26
25: ; preds = %15
store i32 0, i32* %6
br label %26
26: ; preds = %25, %15
br label %27
27: ; preds = %26
%28 = load i32, i32* %5
%29 = add nsw i32 %28, 1
store i32 %29, i32* %5
br label %7
30: ; preds = %7
%31 = load i32, i32* %6
ret i32 %31
}

LLVM IR (-O2):
define i32 @cnotint(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %11, %5 ], [ 0, %2 ]
%7 = phi i8 [ %13, %5 ], [ %3, %2 ]
%8 = phi i32 [ %10, %5 ], [ 1, %2 ]
%9 = icmp eq i8 %7, %0
%10 = select i1 %9, i32 0, i32 %8
%11 = add nuw nsw i64 %6, 1
%12 = getelementptr inbounds i8, i8* %1, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 1, %2 ], [ %10, %5 ]
ret i32 %16
}
int test_imm_18uint16_mem(unsigned short *val) {
  return ((*val) & (-0x18 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_18uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffffe8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_18uint16_mem>:
movzwl (%rdi),%eax
test   $0xffe8,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_18uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -24
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_18uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -24
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
bool IsMathFunction(char ch) { return ch >= 'a' && ch <= 'z'; }


x86 assembly (clang, -O0):
<IsMathFunction>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x61,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <IsMathFunction+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsMathFunction>:
add    $0x9f,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @IsMathFunction(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @IsMathFunction(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void mallocate(char *array, char c, register int size) {
  while (--size)
    array[size] = c;
}


x86 assembly (clang, -O0):
<mallocate>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
je     1136 <mallocate+0x36>
mov    -0x9(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
jmp    1111 <mallocate+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocate>:
mov    %edx,%eax
add    $0xffffffff,%eax
je     1136 <mallocate+0x26>
push   %rax
movslq %eax,%rcx
add    $0xfffffffe,%edx
mov    %ecx,%eax
sub    %rdx,%rcx
add    %rcx,%rdi
movzbl %sil,%esi
mov    %rax,%rdx
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @mallocate(i8* %0, i8 signext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %6
%9 = add nsw i32 %8, -1
store i32 %9, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %5
%13 = load i8*, i8** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 %12, i8* %16
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @mallocate(i8* nocapture writeonly %0, i8 signext %1, i32 %2) {
%4 = add i32 %2, -1
%5 = icmp eq i32 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %3
%7 = sext i32 %4 to i64
%8 = add i32 %2, -2
%9 = zext i32 %8 to i64
%10 = sub nsw i64 %7, %9
%11 = getelementptr i8, i8* %0, i64 %10
%12 = zext i32 %4 to i64
br label %13
13: ; preds = %6, %3
ret void
}
/* Variables and functions */
int INT_MAX;
int INT_MIN;
scalar_t__ __infer_nondet_int();
int atoi(const char *str) {
  int retu = INT_MAX;
  int retl = INT_MIN;
  int ret;
  if (__infer_nondet_int())
    ret = retu;
  else
    ret = retl;
  return ret;
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
cmp    $0x0,%rax
je     1150 <atoi+0x40>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1156 <atoi+0x46>
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ece(%rip),%rax
mov    (%rax),%ebp
mov    0x2ebd(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
test   %rax,%rax
cmovne %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@INT_MAX = global i32 0
@INT_MIN = global i32 0
define i32 @atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i32, i32* @INT_MAX
store i32 %6, i32* %3
%7 = load i32, i32* @INT_MIN
store i32 %7, i32* %4
%8 = call i64 (...) @__infer_nondet_int()
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %5
br label %14
12: ; preds = %1
%13 = load i32, i32* %4
store i32 %13, i32* %5
br label %14
14: ; preds = %12, %10
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@INT_MAX = global i32 0
@INT_MIN = global i32 0
define i32 @atoi(i8* nocapture readnone %0) {
%2 = load i32, i32* @INT_MAX
%3 = load i32, i32* @INT_MIN
%4 = tail call i64 (...) @__infer_nondet_int()
%5 = icmp eq i64 %4, 0
%6 = select i1 %5, i32 %3, i32 %2
ret i32 %6
}
void g_DUMMY_menu_destroy_menubar2(int win_id) { win_id = win_id; }


x86 assembly (clang, -O0):
<g_DUMMY_menu_destroy_menubar2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_menu_destroy_menubar2>:
ret

LLVM IR (-O0):
define void @g_DUMMY_menu_destroy_menubar2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @g_DUMMY_menu_destroy_menubar2(i32 %0) {
ret void
}
void DBGFR3RegNmQueryAll(void) {}


x86 assembly (clang, -O0):
<DBGFR3RegNmQueryAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3RegNmQueryAll>:
ret

LLVM IR (-O0):
define void @DBGFR3RegNmQueryAll() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3RegNmQueryAll() {
ret void
}
int p2(int x, int y) { return x + y; }


x86 assembly (clang, -O0):
<p2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<p2>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @p2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @p2(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
unsigned long long f(unsigned long long i) { return i & 0xffffffff; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xffffffff,%rax
and    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i64 @f(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 4294967295
ret i64 %4
}

LLVM IR (-O2):
define i64 @f(i64 %0) {
%2 = and i64 %0, 4294967295
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_submatrix(float **b, long nrl, long nrh, long ncl, long nch) {
  free((void *)(b + nrl - 1));
}


x86 assembly (clang, -O0):
<free_submatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_submatrix>:
lea    (%rdi,%rsi,8),%rdi
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_submatrix(float** %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca float**
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store float** %0, float*** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%11 = load float**, float*** %6
%12 = load i64, i64* %7
%13 = getelementptr inbounds float*, float** %11, i64 %12
%14 = getelementptr inbounds float*, float** %13, i64 -1
%15 = bitcast float** %14 to i8*
%16 = call i32 @free(i8* %15)
ret void
}

LLVM IR (-O2):
define void @free_submatrix(float** nocapture %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = getelementptr inbounds float*, float** %0, i64 %1
%7 = getelementptr inbounds float*, float** %6, i64 -1
%8 = bitcast float** %7 to i8*
%9 = tail call i32 @free(i8* %8)
ret void
}
void nfs_fscache_set_size(struct inode *inode) {}


x86 assembly (clang, -O0):
<nfs_fscache_set_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfs_fscache_set_size>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @nfs_fscache_set_size(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @nfs_fscache_set_size(%struct.inode* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void MemFree(void *mem) {
  if (mem != (void *)0)
    free(mem);
}


x86 assembly (clang, -O0):
<MemFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <MemFree+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemFree>:
test   %rdi,%rdi
je     111a <MemFree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @MemFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @MemFree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ code;

/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char *, int);
size_t emit_code_into_memory(unsigned char *m) {
  unsigned char code[] = {0x48, 0x89, 0xf8, 0x48, 0x83, 0xc0, 0x04, 0xc3};
  memcpy(m, code, sizeof(code));
  return sizeof(code);
}


x86 assembly (clang, -O0):
<emit_code_into_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xedd(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    $0x8,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_code_into_memory>:
push   %rax
movabs $0xc304c08348f88948,%rax
c0 04 c3
mov    %rax,(%rsp)
mov    %rsp,%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    $0x8,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.emit_code_into_memory.code = [8 x i8] c"H\89\F8H\83\C0\04\C3"
define i64 @emit_code_into_memory(i8* %0) {
%2 = alloca i8*
%3 = alloca [8 x i8]
store i8* %0, i8** %2
%4 = bitcast [8 x i8]* %3 to i8*
%5 = load i8*, i8** %2
%6 = getelementptr inbounds [8 x i8], [8 x i8]* %3, i64 0, i64 0
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 8)
ret i64 8
}

LLVM IR (-O2):
define i64 @emit_code_into_memory(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
store i64 -4394175666309265080, i64* %2
%4 = call i32 @memcpy(i8* %0, i8* %3, i32 8)
ret i64 8
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
scalar_t__ strlen(char *);
scalar_t__ sysMalloc(scalar_t__);
char *getDllName(char *path, char *name) {
  char *buf = (char *)sysMalloc(strlen(path) + strlen(name) + 8);
  sprintf(buf, "%s/lib%s.so", path, name);
  return buf;
}


x86 assembly (clang, -O0):
<getDllName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
add    %rax,%rdi
add    $0x8,%rdi
call   1030 <sysMalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe83(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getDllName>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r12
call   1040 <strlen@plt>
mov    %rax,%r15
mov    %r14,%rdi
call   1040 <strlen@plt>
lea    (%r15,%rax,1),%rdi
add    $0x8,%rdi
call   1030 <sysMalloc@plt>
mov    %rax,%rbx
lea    0xe9b(%rip),%rsi
mov    %rax,%rdi
mov    %r12,%rdx
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%s/lib%s.so\00"
define i8* @getDllName(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %7, %9
%11 = add nsw i64 %10, 8
%12 = call i64 @sysMalloc(i64 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = load i8*, i8** %4
%17 = call i32 @sprintf(i8* %14, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %15, i8* %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s/lib%s.so\00"
define i8* @getDllName(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add i64 %3, 8
%6 = add i64 %5, %4
%7 = tail call i64 @sysMalloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @sprintf(i8* dereferenceable(1) %8, i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret i8* %8
}
/* Variables and functions */
double _pow(double, double);
double pow(double x, double y) { return _pow(x, y); }


x86 assembly (clang, -O0):
<pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <_pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow>:
jmp    1030 <_pow@plt>

LLVM IR (-O0):
define double @pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @_pow(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @pow(double %0, double %1) {
%3 = tail call double @_pow(double %0, double %1)
ret double %3
}
/* Variables and functions */
unsigned long get_cause();
unsigned long get_epc();
int /*<<< orphan*/ printf(char *, ...);
void exception(void) {
  unsigned long n;
  printf("There is an exception!!\n");
  n = get_epc();
  printf("The epc is %x\n", n);
  n = get_cause();
  printf("The cause is %x\n", n);
  return;
}


x86 assembly (clang, -O0):
<exception>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <get_epc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xebd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x0,%al
call   1050 <get_cause@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeaf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exception>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1050 <get_epc@plt>
lea    0xea5(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
call   1060 <get_cause@plt>
lea    0xe9c(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
pop    %rcx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"There is an exception!!\0A\00"
@.str.1 = [15 x i8] c"The epc is %x\0A\00"
@.str.2 = [17 x i8] c"The cause is %x\0A\00"
define void @exception() {
%1 = alloca i64
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = call i64 (...) @get_epc()
store i64 %3, i64* %1
%4 = load i64, i64* %1
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i64 %4)
%6 = call i64 (...) @get_cause()
store i64 %6, i64* %1
%7 = load i64, i64* %1
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i64 %7)
ret void
}

LLVM IR (-O2):
@.str.1 = [15 x i8] c"The epc is %x\0A\00"
@.str.2 = [17 x i8] c"The cause is %x\0A\00"
@str = [24 x i8] c"There is an exception!!\00"
define void @exception() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%2 = tail call i64 (...) @get_epc()
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i64 %2)
%4 = tail call i64 (...) @get_cause()
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i64 %4)
ret void
}
void quadToTri(double xi, double eta, double *r, double *s, double *J) {
  double r1;
  *r = 0.5e0 * (1.0e0 + xi);
  r1 = 1.0e0 - (*r);
  *s = 0.5e0 * (1.0e0 + eta) * r1;
  *J = 0.25e0 * r1;
}


x86 assembly (clang, -O0):
<quadToTri>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
movsd  0xeee(%rip),%xmm1
addsd  -0x8(%rbp),%xmm1
movsd  0xed9(%rip),%xmm0
mulsd  %xmm1,%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
movsd  0xec9(%rip),%xmm0
subsd  (%rax),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xeb8(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
movsd  0xea3(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  -0x30(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  0xe82(%rip),%xmm0
mulsd  -0x30(%rbp),%xmm0
mov    -0x28(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quadToTri>:
movsd  0xef8(%rip),%xmm2
addsd  %xmm2,%xmm0
movsd  0xef4(%rip),%xmm3
mulsd  %xmm3,%xmm0
movsd  %xmm0,(%rdi)
addsd  %xmm2,%xmm1
subsd  %xmm0,%xmm2
mulsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm1
movsd  %xmm1,(%rsi)
mulsd  0xed8(%rip),%xmm2
movsd  %xmm2,(%rdx)
ret

LLVM IR (-O0):
define void @quadToTri(double %0, double %1, double* %2, double* %3, double* %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double*
%9 = alloca double*
%10 = alloca double*
%11 = alloca double
store double %0, double* %6
store double %1, double* %7
store double* %2, double** %8
store double* %3, double** %9
store double* %4, double** %10
%12 = load double, double* %6
%13 = fadd double 1.000000e+00, %12
%14 = fmul double 5.000000e-01, %13
%15 = load double*, double** %8
store double %14, double* %15
%16 = load double*, double** %8
%17 = load double, double* %16
%18 = fsub double 1.000000e+00, %17
store double %18, double* %11
%19 = load double, double* %7
%20 = fadd double 1.000000e+00, %19
%21 = fmul double 5.000000e-01, %20
%22 = load double, double* %11
%23 = fmul double %21, %22
%24 = load double*, double** %9
store double %23, double* %24
%25 = load double, double* %11
%26 = fmul double 2.500000e-01, %25
%27 = load double*, double** %10
store double %26, double* %27
ret void
}

LLVM IR (-O2):
define void @quadToTri(double %0, double %1, double* nocapture writeonly %2, double* nocapture writeonly %3, double* nocapture writeonly %4) {
%6 = fadd double %0, 1.000000e+00
%7 = fmul double %6, 5.000000e-01
store double %7, double* %2
%8 = fsub double 1.000000e+00, %7
%9 = fadd double %1, 1.000000e+00
%10 = fmul double %9, 5.000000e-01
%11 = fmul double %10, %8
store double %11, double* %3
%12 = fmul double %8, 2.500000e-01
store double %12, double* %4
ret void
}
unsigned setbits(unsigned src_bf, unsigned src_pos, unsigned sub_len,
                 unsigned sub_bf) {
  unsigned mask_1, mask_2;
  mask_1 = src_bf | (((1 << sub_len) - 1) << ((src_pos + 1) - sub_len));
  mask_2 = (((~0 << sub_len) | sub_bf) << ((src_pos + 1) - sub_len)) |
           ~(~0 << ((src_pos + 1) - sub_len));
  return mask_1 & mask_2;
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
sub    $0x1,%edx
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
or     -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
and    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%eax
mov    %edx,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%r8d
not    %r8d
sub    %ecx,%esi
lea    0x1(%rsi),%ecx
shl    %cl,%r8d
or     %eax,%edx
shl    %cl,%edx
mov    $0xffffffff,%eax
shl    %cl,%eax
or     %edi,%r8d
not    %eax
or     %edx,%eax
and    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* %5
%12 = load i32, i32* %7
%13 = shl i32 1, %12
%14 = sub nsw i32 %13, 1
%15 = load i32, i32* %6
%16 = add i32 %15, 1
%17 = load i32, i32* %7
%18 = sub i32 %16, %17
%19 = shl i32 %14, %18
%20 = or i32 %11, %19
store i32 %20, i32* %9
%21 = load i32, i32* %7
%22 = shl i32 -1, %21
%23 = load i32, i32* %8
%24 = or i32 %22, %23
%25 = load i32, i32* %6
%26 = add i32 %25, 1
%27 = load i32, i32* %7
%28 = sub i32 %26, %27
%29 = shl i32 %24, %28
%30 = load i32, i32* %6
%31 = add i32 %30, 1
%32 = load i32, i32* %7
%33 = sub i32 %31, %32
%34 = shl i32 -1, %33
%35 = xor i32 %34, -1
%36 = or i32 %29, %35
store i32 %36, i32* %10
%37 = load i32, i32* %9
%38 = load i32, i32* %10
%39 = and i32 %37, %38
ret i32 %39
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = add i32 %1, 1
%8 = sub i32 %7, %2
%9 = shl i32 %6, %8
%10 = or i32 %9, %0
%11 = or i32 %5, %3
%12 = shl i32 %11, %8
%13 = shl nsw i32 -1, %8
%14 = xor i32 %13, -1
%15 = or i32 %12, %14
%16 = and i32 %15, %10
ret i32 %16
}
/* Variables and functions */
int gf32_mod(unsigned long long, int);
unsigned gf32_shl(unsigned int a, int shift) {
  unsigned long long r = a;
  r <<= shift;
  return gf32_mod(r, 31 + shift);
}


x86 assembly (clang, -O0):
<gf32_shl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,%ecx
shl    %cl,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
add    $0x1f,%esi
call   1030 <gf32_mod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf32_shl>:
mov    %edi,%edi
mov    %esi,%ecx
shl    %cl,%rdi
add    $0x1f,%esi
jmp    1030 <gf32_mod@plt>

LLVM IR (-O0):
define i32 @gf32_shl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
store i64 %7, i64* %5
%8 = load i32, i32* %4
%9 = load i64, i64* %5
%10 = zext i32 %8 to i64
%11 = shl i64 %9, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = load i32, i32* %4
%14 = add nsw i32 31, %13
%15 = call i32 @gf32_mod(i64 %12, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @gf32_shl(i32 %0, i32 %1) {
%3 = zext i32 %0 to i64
%4 = zext i32 %1 to i64
%5 = shl i64 %3, %4
%6 = add nsw i32 %1, 31
%7 = tail call i32 @gf32_mod(i64 %5, i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *xmalloc(size_t s) {
  void *p = malloc(s);
  if (!p) {
    fprintf(stderr, "Out of memory\n");
    exit(1);
  }
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1173 <xmalloc+0x43>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <xmalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"Out of memory\0A\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"Out of memory\0A\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
unsigned long SPIIntNumberGet(unsigned long);
void SPIIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  unsigned long ulInt;
  ulInt = SPIIntNumberGet(ulBase);
  IntRegister(ulInt, pfnHandler);
  IntEnable(ulInt);
}


x86 assembly (clang, -O0):
<SPIIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <SPIIntNumberGet@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1050 <SPIIntNumberGet@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @SPIIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
%5 = alloca i64
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%6 = load i64, i64* %3
%7 = call i64 @SPIIntNumberGet(i64 %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load void ()*, void ()** %4
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i64 %8, void (...)* %10)
%12 = load i64, i64* %5
%13 = call i32 @IntEnable(i64 %12)
ret void
}

LLVM IR (-O2):
define void @SPIIntRegister(i64 %0, void ()* %1) {
%3 = tail call i64 @SPIIntNumberGet(i64 %0)
%4 = bitcast void ()* %1 to void (...)*
%5 = tail call i32 @IntRegister(i64 %3, void (...)* %4)
%6 = tail call i32 @IntEnable(i64 %3)
ret void
}
void __attribute__((weak)) rcc_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<rcc_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcc_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.rcc_isr = [8 x i8] c"rcc_isr\00"
define weak void @rcc_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__FUNCTION__.rcc_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.rcc_isr = [8 x i8] c"rcc_isr\00"
define weak void @rcc_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__FUNCTION__.rcc_isr, i64 0, i64 0))
ret void
}
unsigned char asm_sleep(unsigned int milli) {
  unsigned char ans;
  asm volatile("mul  %%cx; "
               "xchg %%dx, %%ax; "
               "movw %%ax, %%cx; "
               "movb $0x86, %%ah;"
               "int $0x15;"
               "setnc %0"
               : "=r"(ans)
               : "a"(milli), "c"(1000)
               : "edx");
  return ans;
}


x86 assembly (clang, -O0):
<asm_sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
mul    %cx
xchg   %ax,%dx
mov    %ax,%cx
mov    $0x86,%ah
int    $0x15
setae  %al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm_sleep>:
mov    %edi,%eax
mov    $0x3e8,%ecx
mul    %cx
xchg   %ax,%dx
mov    %ax,%cx
mov    $0x86,%ah
int    $0x15
setae  %al
ret

LLVM IR (-O0):
define zeroext i8 @asm_sleep(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8 asm sideeffect "mul %cx; xchg %dx, %ax; movw %ax, %cx; movb $$0x86, %ah;int $$0x15;setnc $0", "=r,{ax},{cx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %4, i32 1000)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @asm_sleep(i32 %0) {
%2 = tail call i8 asm sideeffect "mul %cx; xchg %dx, %ax; movw %ax, %cx; movb $$0x86, %ah;int $$0x15;setnc $0", "=r,{ax},{cx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 1000)
ret i8 %2
}
void nrf_drv_radio802154_priority_drop_init(void) {}


x86 assembly (clang, -O0):
<nrf_drv_radio802154_priority_drop_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_drv_radio802154_priority_drop_init>:
ret

LLVM IR (-O0):
define void @nrf_drv_radio802154_priority_drop_init() {
ret void
}

LLVM IR (-O2):
define void @nrf_drv_radio802154_priority_drop_init() {
ret void
}
int do_180() { return 180; }


x86 assembly (clang, -O0):
<do_180>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_180>:
mov    $0xb4,%eax
ret

LLVM IR (-O0):
define i32 @do_180() {
ret i32 180
}

LLVM IR (-O2):
define i32 @do_180() {
ret i32 180
}
/* Variables and functions */
int /*<<< orphan*/ depth_1();
__attribute__((always_)) void depth_2(void) { depth_1(); }


x86 assembly (clang, -O0):
<depth_2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <depth_1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<depth_2>:
xor    %eax,%eax
jmp    1030 <depth_1@plt>

LLVM IR (-O0):
define void @depth_2() {
%1 = call i32 (...) @depth_1()
ret void
}

LLVM IR (-O2):
define void @depth_2() {
%1 = tail call i32 (...) @depth_1()
ret void
}