xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ agarraGarfo(int);
int /*<<< orphan*/ deixaGarfo(int);
int /*<<< orphan*/ sleep(int);
void *filosofo(void *num) {
  while (1) {
    int *i = num;
    sleep(1);
    agarraGarfo(*i);
    sleep(1);
    deixaGarfo(*i);
  }
}


x86 assembly (clang, -O0):
<filosofo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1040 <agarraGarfo@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <deixaGarfo@plt>
jmp    113c <filosofo+0xc>

x86 assembly (clang, -O2):
<filosofo>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    (%rbx),%edi
call   1040 <agarraGarfo@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    (%rbx),%edi
call   1030 <deixaGarfo@plt>
jmp    1140 <filosofo+0x10>

LLVM IR (-O0):
define i8* @filosofo(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
br label %4
4: ; preds = %1, %4
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to i32*
store i32* %6, i32** %3
%7 = call i32 @sleep(i32 1)
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = call i32 @agarraGarfo(i32 %9)
%11 = call i32 @sleep(i32 1)
%12 = load i32*, i32** %3
%13 = load i32, i32* %12
%14 = call i32 @deixaGarfo(i32 %13)
br label %4
}

LLVM IR (-O2):
define noalias i8* @filosofo(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
br label %3
3: ; preds = %1, %3
%4 = tail call i32 @sleep(i32 1)
%5 = load i32, i32* %2
%6 = tail call i32 @agarraGarfo(i32 %5)
%7 = tail call i32 @sleep(i32 1)
%8 = load i32, i32* %2
%9 = tail call i32 @deixaGarfo(i32 %8)
br label %3
}
long umax(long a, long b) {
  if ((unsigned long)a < (unsigned long)b)
    return b;
  return a;
}


x86 assembly (clang, -O0):
<umax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1127 <umax+0x27>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <umax+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umax>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovb  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @umax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = load i64, i64* %5
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i64, i64* %5
store i64 %10, i64* %3
br label %13
11: ; preds = %2
%12 = load i64, i64* %4
store i64 %12, i64* %3
br label %13
13: ; preds = %11, %9
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @umax(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
/* Variables and functions */
int getdtablesize();
int how_many_fds(void) {
  static int open_max = 0;
  if (open_max)
    return open_max;
  open_max = 0;
  return getdtablesize();
}


x86 assembly (clang, -O0):
<how_many_fds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,0x2f0d(%rip)
je     1133 <how_many_fds+0x23>
mov    0x2f01(%rip),%eax
mov    %eax,-0x4(%rbp)
jmp    1147 <how_many_fds+0x37>
movl   $0x0,0x2eef(%rip)
mov    $0x0,%al
call   1030 <getdtablesize@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<how_many_fds>:
xor    %eax,%eax
jmp    1030 <getdtablesize@plt>

LLVM IR (-O0):
@how_many_fds.open_max = internal global i32 0
define i32 @how_many_fds() {
%1 = alloca i32
%2 = load i32, i32* @how_many_fds.open_max
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = load i32, i32* @how_many_fds.open_max
store i32 %5, i32* %1
br label %8
6: ; preds = %0
store i32 0, i32* @how_many_fds.open_max
%7 = call i32 (...) @getdtablesize()
store i32 %7, i32* %1
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @how_many_fds() {
%1 = tail call i32 (...) @getdtablesize()
ret i32 %1
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ debug_mul_u32_u32(int, int, int, int, int);
uint64_t mul_u32_u32(uint32_t a, uint32_t b, int a_shift, int b_shift) {
  uint64_t ret = (uint64_t)a * b;
  debug_mul_u32_u32(a, b, a_shift, b_shift, ret);
  return ret;
}


x86 assembly (clang, -O0):
<mul_u32_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
call   1030 <debug_mul_u32_u32@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul_u32_u32>:
push   %rbx
mov    %esi,%ebx
imul   %edi,%ebx
mov    %ebx,%r8d
call   1030 <debug_mul_u32_u32@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mul_u32_u32(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %9
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = load i32, i32* %9
%18 = call i32 @debug_mul_u32_u32(i32 %13, i32 %14, i32 %15, i32 %16, i32 %17)
%19 = load i32, i32* %9
ret i32 %19
}

LLVM IR (-O2):
define i32 @mul_u32_u32(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = mul nsw i32 %1, %0
%6 = tail call i32 @debug_mul_u32_u32(i32 %0, i32 %1, i32 %2, i32 %3, i32 %5)
ret i32 %5
}
void maze_solve_usage(void) {}


x86 assembly (clang, -O0):
<maze_solve_usage>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maze_solve_usage>:
ret

LLVM IR (-O0):
define void @maze_solve_usage() {
ret void
}

LLVM IR (-O2):
define void @maze_solve_usage() {
ret void
}
/* Variables and functions */
void pgtrace_init(void) {}


x86 assembly (clang, -O0):
<pgtrace_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgtrace_init>:
ret

LLVM IR (-O0):
define void @pgtrace_init() {
ret void
}

LLVM IR (-O2):
define void @pgtrace_init() {
ret void
}
int test_imm_49int16_reg(short val) {
  return ((val) & (0x49 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_49int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x49,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_49int16_reg>:
test   $0x49,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_49int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 73
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_49int16_reg(i16 signext %0) {
%2 = and i16 %0, 73
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ReloadGame(int);
void AnalyzeNextGame() { ReloadGame(1); }


x86 assembly (clang, -O0):
<AnalyzeNextGame>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <ReloadGame@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnalyzeNextGame>:
mov    $0x1,%edi
jmp    1030 <ReloadGame@plt>

LLVM IR (-O0):
define void @AnalyzeNextGame() {
%1 = call i32 @ReloadGame(i32 1)
ret void
}

LLVM IR (-O2):
define void @AnalyzeNextGame() {
%1 = tail call i32 @ReloadGame(i32 1)
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void GPIO_clr_many(uint64_t pins) {
  (*((volatile uint32_t *)(0x00200028))) = (uint32_t)pins;
  (*((volatile uint32_t *)(0x0020002C))) = (uint32_t)(0x3FFFFF & (pins >> 32));
}


x86 assembly (clang, -O0):
<GPIO_clr_many>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
mov    $0x200028,%eax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
and    $0x3fffff,%eax
movslq %eax,%rcx
mov    $0x20002c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO_clr_many>:
movslq %edi,%rax
mov    %rax,0x200028
ret

LLVM IR (-O0):
define void @GPIO_clr_many(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
store volatile i64 %4, i64* inttoptr (i64 2097192 to i64*)
%5 = load i32, i32* %2
%6 = ashr i32 %5, 32
%7 = and i32 4194303, %6
%8 = sext i32 %7 to i64
store volatile i64 %8, i64* inttoptr (i64 2097196 to i64*)
ret void
}

LLVM IR (-O2):
define void @GPIO_clr_many(i32 %0) {
%2 = sext i32 %0 to i64
store volatile i64 %2, i64* inttoptr (i64 2097192 to i64*)
store volatile i64 poison, i64* inttoptr (i64 2097196 to i64*)
ret void
}
double MBtoHPA(double MB) { return MB; }


x86 assembly (clang, -O0):
<MBtoHPA>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MBtoHPA>:
ret

LLVM IR (-O0):
define double @MBtoHPA(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @MBtoHPA(double returned %0) {
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void get_endian(void) {
  int i = 0x01;
  if (*(char *)(&i) > 0) {
    printf("little endian \n");
  } else {
    printf("big endian \n");
  }
}


x86 assembly (clang, -O0):
<get_endian>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movsbl -0x4(%rbp),%eax
cmp    $0x0,%eax
jle    113d <get_endian+0x2d>
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
jmp    1149 <get_endian+0x39>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_endian>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"little endian \0A\00"
@.str.1 = [13 x i8] c"big endian \0A\00"
define void @get_endian() {
%1 = alloca i32
store i32 1, i32* %1
%2 = bitcast i32* %1 to i8*
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
@str = [15 x i8] c"little endian \00"
define void @get_endian() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, char *, int, int, char);
int main() {
  char *str = "asdfasdf";
  printf("char: %f %s %d %d %c\n", 3.1231233252435, str, 4, 5, 'a');
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xee3(%rip),%rdi
movsd  0xeca(%rip),%xmm0
mov    $0x4,%edx
mov    $0x5,%ecx
mov    $0x61,%r8d
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef9(%rip),%rdi
lea    0xee9(%rip),%rsi
movsd  0xed9(%rip),%xmm0
mov    $0x4,%edx
mov    $0x5,%ecx
mov    $0x61,%r8d
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"asdfasdf\00"
@.str.1 = [22 x i8] c"char: %f %s %d %d %c\0A\00"
define i32 @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double 0x4008FC2814FA5D65, i8* %2, i32 4, i32 5, i8 signext 97)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"asdfasdf\00"
@.str.1 = [22 x i8] c"char: %f %s %d %d %c\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double 0x4008FC2814FA5D65, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 4, i32 5, i8 signext 97)
ret i32 0
}
/* Variables and functions */
unsigned int radio_change_frequency(int);
unsigned int radio_dec_frequency(void) { return radio_change_frequency(1); }


x86 assembly (clang, -O0):
<radio_dec_frequency>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <radio_change_frequency@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_dec_frequency>:
mov    $0x1,%edi
jmp    1030 <radio_change_frequency@plt>

LLVM IR (-O0):
define i32 @radio_dec_frequency() {
%1 = call i32 @radio_change_frequency(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @radio_dec_frequency() {
%1 = tail call i32 @radio_change_frequency(i32 1)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_slli_epi32(int /*<<< orphan*/, int);
__m128i __attribute__((no, unused)) testneg32(__m128i s1) {
  return _mm_slli_epi32(s1, -32);
}


x86 assembly (clang, -O0):
<testneg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xffffffe0,%esi
call   1030 <_mm_slli_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testneg32>:
mov    $0xffffffe0,%esi
jmp    1030 <_mm_slli_epi32@plt>

LLVM IR (-O0):
define i32 @testneg32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_slli_epi32(i32 %3, i32 -32)
ret i32 %4
}

LLVM IR (-O2):
define i32 @testneg32(i32 %0) {
%2 = tail call i32 @_mm_slli_epi32(i32 %0, i32 -32)
ret i32 %2
}
void genc_seq_s() {}


x86 assembly (clang, -O0):
<genc_seq_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genc_seq_s>:
ret

LLVM IR (-O0):
define void @genc_seq_s() {
ret void
}

LLVM IR (-O2):
define void @genc_seq_s() {
ret void
}
void cmov_(x, y, z) float *x, *y, *z;
{ cmov(*x, *y, *z); }


x86 assembly (clang, -O0):
<cmov_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm1
cvtss2sd %xmm1,%xmm1
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm2
cvtss2sd %xmm2,%xmm2
mov    $0x3,%al
call   1030 <cmov@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmov_>:
movss  (%rdi),%xmm0
cvtss2sd %xmm0,%xmm0
movss  (%rsi),%xmm1
cvtss2sd %xmm1,%xmm1
movss  (%rdx),%xmm2
cvtss2sd %xmm2,%xmm2
mov    $0x3,%al
jmp    1030 <cmov@plt>

LLVM IR (-O0):
define void @cmov_(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = fpext float %8 to double
%10 = load float*, float** %5
%11 = load float, float* %10
%12 = fpext float %11 to double
%13 = load float*, float** %6
%14 = load float, float* %13
%15 = fpext float %14 to double
%16 = call i32 (double, double, double, ...) bitcast (i32 (...)* @cmov to i32 (double, double, double, ...)*)(double %9, double %12, double %15)
ret void
}

LLVM IR (-O2):
define void @cmov_(float* nocapture %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %0
%5 = fpext float %4 to double
%6 = load float, float* %1
%7 = fpext float %6 to double
%8 = load float, float* %2
%9 = fpext float %8 to double
%10 = tail call i32 (double, double, double, ...) bitcast (i32 (...)* @cmov to i32 (double, double, double, ...)*)(double %5, double %7, double %9)
ret void
}
int fun230() { return 230; }


x86 assembly (clang, -O0):
<fun230>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun230>:
mov    $0xe6,%eax
ret

LLVM IR (-O0):
define i32 @fun230() {
ret i32 230
}

LLVM IR (-O2):
define i32 @fun230() {
ret i32 230
}
int aee_system_exception(const char *module, const char *path,
                         unsigned int flags, const char *msg, ...) {
  return 0;
}


x86 assembly (clang, -O0):
<aee_system_exception>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aee_system_exception>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @aee_system_exception(i8* %0, i8* %1, i32 %2, i8* %3, ...) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
ret i32 0
}

LLVM IR (-O2):
define i32 @aee_system_exception(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8* nocapture readnone %3, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
usage() {
  printf("Usage: crck [-t|c|u|i] [filename ... ]\n");
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Usage: crck [-t|c|u|i] [filename ... ]\0A\00"
define i32 @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [39 x i8] c"Usage: crck [-t|c|u|i] [filename ... ]\00"
define i32 @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t prv_gt_int32_fn(int32_t a, int32_t b) { return a > b ? -1 : 0; }


x86 assembly (clang, -O0):
<prv_gt_int32_fn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    %rsi,%rdx
cmovg  %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_gt_int32_fn>:
xor    %eax,%eax
cmp    %rsi,%rdi
setg   %al
neg    %rax
ret

LLVM IR (-O0):
define i64 @prv_gt_int32_fn(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -1, i32 0
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
define i64 @prv_gt_int32_fn(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = sext i1 %3 to i64
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isupper(int);
void t_isupper_0x4b() {
  Assert_real((isupper(75)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              380, ("isupper should be 1 for K"));
}


x86 assembly (clang, -O0):
<t_isupper_0x4b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4b,%edi
call   1030 <isupper@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x17c,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x4b>:
push   %rax
mov    $0x4b,%edi
call   1030 <isupper@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x17c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 1 for K\00"
define void @t_isupper_0x4b() {
%1 = call i32 @isupper(i32 75)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 380, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 1 for K\00"
define void @t_isupper_0x4b() {
%1 = tail call i32 @isupper(i32 75)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 380, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void inc_rt_migration(struct sched_rt_entity *rt_se, struct rt_rq *rt_rq) {}


x86 assembly (clang, -O0):
<inc_rt_migration>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_rt_migration>:
ret

LLVM IR (-O0):
%struct.sched_rt_entity = type opaque
%struct.rt_rq = type opaque
define void @inc_rt_migration(%struct.sched_rt_entity* %0, %struct.rt_rq* %1) {
%3 = alloca %struct.sched_rt_entity*
%4 = alloca %struct.rt_rq*
store %struct.sched_rt_entity* %0, %struct.sched_rt_entity** %3
store %struct.rt_rq* %1, %struct.rt_rq** %4
ret void
}

LLVM IR (-O2):
%struct.sched_rt_entity = type opaque
%struct.rt_rq = type opaque
define void @inc_rt_migration(%struct.sched_rt_entity* nocapture %0, %struct.rt_rq* nocapture %1) {
ret void
}
int MARCH_SADDLES(void) {
  static int reat = 0;
  static int value = 3;
  return value;
}


x86 assembly (clang, -O0):
<MARCH_SADDLES>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MARCH_SADDLES>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
@MARCH_SADDLES.reat = internal global i32 0
@MARCH_SADDLES.value = internal global i32 3
define i32 @MARCH_SADDLES() {
%1 = load i32, i32* @MARCH_SADDLES.value
ret i32 %1
}

LLVM IR (-O2):
define i32 @MARCH_SADDLES() {
ret i32 3
}
void prom_smp_finish(void) {}


x86 assembly (clang, -O0):
<prom_smp_finish>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prom_smp_finish>:
ret

LLVM IR (-O0):
define void @prom_smp_finish() {
ret void
}

LLVM IR (-O2):
define void @prom_smp_finish() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int cTools_mutexInit(uint32_t mutexId) {
  mutexId = mutexId;
  return 0;
}


x86 assembly (clang, -O0):
<cTools_mutexInit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cTools_mutexInit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cTools_mutexInit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @cTools_mutexInit(i32 %0) {
ret i32 0
}
int ade7759_configure_ring(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<ade7759_configure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7759_configure_ring>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @ade7759_configure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @ade7759_configure_ring(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
char *getwd(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ pthread_init();
main(int argc, char **argv) {
  char wd[1024], *getcwd(), *getwd();
  pthread_init();
  printf("getcwd => %s\n", getcwd(wd, 1024));
  printf("getwd => %s\n", getwd(wd));
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1060 <pthread_init@plt>
lea    -0x410(%rbp),%rdi
mov    $0x400,%esi
mov    $0x0,%al
call   1040 <getcwd@plt>
mov    %rax,%rsi
lea    0xe73(%rip),%rdi
call   1030 <printf@plt>
lea    -0x410(%rbp),%rdi
call   1050 <getwd@plt>
mov    %rax,%rsi
lea    0xe66(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1070 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x400,%rsp
xor    %eax,%eax
call   1060 <pthread_init@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x400,%esi
xor    %eax,%eax
call   1040 <getcwd@plt>
lea    0xe88(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1050 <getwd@plt>
lea    0xe7f(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %edi,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"getcwd => %s\0A\00"
@.str.1 = [13 x i8] c"getwd => %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [1024 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @pthread_init()
%8 = getelementptr inbounds [1024 x i8], [1024 x i8]* %6, i64 0, i64 0
%9 = call i8* (i8*, i32, ...) bitcast (i8* (...)* @getcwd to i8* (i8*, i32, ...)*)(i8* %8, i32 1024)
%10 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = getelementptr inbounds [1024 x i8], [1024 x i8]* %6, i64 0, i64 0
%12 = call i8* @getwd(i8* %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %12)
%14 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [14 x i8] c"getcwd => %s\0A\00"
@.str.1 = [13 x i8] c"getwd => %s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [1024 x i8]
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = tail call i32 (...) @pthread_init()
%6 = call i8* (i8*, i32, ...) bitcast (i8* (...)* @getcwd to i8* (i8*, i32, ...)*)(i8* %4, i32 1024)
%7 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = call i8* @getwd(i8* %4)
%9 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %8)
%10 = call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
void *malloc(size_t);
void *calloc(size_t nmemb, size_t size) { return malloc(nmemb * size); }


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
imul   %rsi,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = mul i64 %5, %6
%8 = call i8* @malloc(i64 %7)
ret i8* %8
}

LLVM IR (-O2):
define noalias i8* @calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @malloc(i64 %3)
ret i8* %4
}
void test___atomic_fetch_nand_1(short *mem) { __atomic_fetch_nand(mem, -1, 4); }


x86 assembly (clang, -O0):
<test___atomic_fetch_nand_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0xffff,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x28(%rbp)
and    %esi,%edx
mov    %edx,-0x24(%rbp)
not    %edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    1162 <test___atomic_fetch_nand_1+0x62>
jmp    1125 <test___atomic_fetch_nand_1+0x25>
mov    -0x1a(%rbp),%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_fetch_nand_1>:
movzwl (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%ecx
not    %ecx
lock cmpxchg %cx,(%rdi)
jne    1110 <test___atomic_fetch_nand_1+0x10>
ret

LLVM IR (-O0):
define void @test___atomic_fetch_nand_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 -1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw nand i16* %5, i16 %6 acq_rel
store i16 %7, i16* %4
%8 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_fetch_nand_1(i16* nocapture %0) {
%2 = atomicrmw nand i16* %0, i16 -1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stress_set_funcret_method(char *);
void stress_funcret_set_default(void) { stress_set_funcret_method("uint64"); }


x86 assembly (clang, -O0):
<stress_funcret_set_default>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <stress_set_funcret_method@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_funcret_set_default>:
lea    0xee9(%rip),%rdi
jmp    1030 <stress_set_funcret_method@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"uint64\00"
define void @stress_funcret_set_default() {
%1 = call i32 @stress_set_funcret_method(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"uint64\00"
define void @stress_funcret_set_default() {
%1 = tail call i32 @stress_set_funcret_method(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ thr1(int /*<<< orphan*/);
int /*<<< orphan*/ thr2(int /*<<< orphan*/);
int /*<<< orphan*/ thr3(int /*<<< orphan*/);
int /*<<< orphan*/ thr4(int /*<<< orphan*/);
int /*<<< orphan*/ thr5(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  thr1(0);
__CPROVER_ASYNC_1:
  thr2(0);
__CPROVER_ASYNC_2:
  thr3(0);
__CPROVER_ASYNC_3:
  thr4(0);
__CPROVER_ASYNC_4:
  thr5(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
jmp    1159 <main+0x9>
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1070 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1060 <thr5@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1070 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1060 <thr5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
br label %1
1: ; preds = %0
%2 = call i32 @thr1(i32 0)
br label %3
3: ; preds = %1
%4 = call i32 @thr2(i32 0)
br label %5
5: ; preds = %3
%6 = call i32 @thr3(i32 0)
br label %7
7: ; preds = %5
%8 = call i32 @thr4(i32 0)
br label %9
9: ; preds = %7
%10 = call i32 @thr5(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @thr1(i32 0)
%2 = tail call i32 @thr2(i32 0)
%3 = tail call i32 @thr3(i32 0)
%4 = tail call i32 @thr4(i32 0)
%5 = tail call i32 @thr5(i32 0)
ret i32 0
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
void _next_id(uint16_t *id) {
  (*id)++;
  if (*id == 0)
    (*id)++;
  if ((*id) & 0x8000)
    *id = 1;
}


x86 assembly (clang, -O0):
<_next_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
jne    112b <_next_id+0x2b>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x8000,%eax
cmp    $0x0,%eax
je     1149 <_next_id+0x49>
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_next_id>:
mov    (%rdi),%eax
inc    %eax
mov    $0x1,%ecx
cmove  %ecx,%eax
test   $0x8000,%eax
cmovne %ecx,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @_next_id(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
store i32 %5, i32* %3
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i32*, i32** %2
%11 = load i32, i32* %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %10
br label %13
13: ; preds = %9, %1
%14 = load i32*, i32** %2
%15 = load i32, i32* %14
%16 = and i32 %15, 32768
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %13
%19 = load i32*, i32** %2
store i32 1, i32* %19
br label %20
20: ; preds = %18, %13
ret void
}

LLVM IR (-O2):
define void @_next_id(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add nsw i32 %2, 1
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 1, i32 %3
%6 = and i32 %5, 32768
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i32 %5, i32 1
store i32 %8, i32* %0
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *my_malloc(size_t size) {
  void *ptr = malloc(size);
  return ptr;
}


x86 assembly (clang, -O0):
<my_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @my_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @my_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ fft_rec(int, int /*<<< orphan*/, int, double **, double **,
                           double **, int /*<<< orphan*/);
int /*<<< orphan*/ free(double **);
double **malloc(int);
void fft(int N, double (*x)[2], double (*X)[2]) {
  double(*XX)[2] = malloc(2 * N * sizeof(double));
  fft_rec(N, 0, 1, x, X, XX, 0);
  free(XX);
}


x86 assembly (clang, -O0):
<fft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
cltq
shl    $0x3,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
xor    %esi,%esi
mov    $0x1,%edx
movl   $0x0,(%rsp)
call   1050 <fft_rec@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fft>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r15
mov    %edi,%ebp
shl    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
movl   $0x0,(%rsp)
mov    %ebp,%edi
xor    %esi,%esi
mov    $0x1,%edx
mov    %r15,%rcx
mov    %r14,%r8
mov    %rax,%r9
call   1050 <fft_rec@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @fft(i32 %0, [2 x double]* %1, [2 x double]* %2) {
%4 = alloca i32
%5 = alloca [2 x double]*
%6 = alloca [2 x double]*
%7 = alloca [2 x double]*
store i32 %0, i32* %4
store [2 x double]* %1, [2 x double]** %5
store [2 x double]* %2, [2 x double]** %6
%8 = load i32, i32* %4
%9 = mul nsw i32 2, %8
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = trunc i64 %11 to i32
%13 = call double** @malloc(i32 %12)
%14 = bitcast double** %13 to [2 x double]*
store [2 x double]* %14, [2 x double]** %7
%15 = load i32, i32* %4
%16 = load [2 x double]*, [2 x double]** %5
%17 = bitcast [2 x double]* %16 to double**
%18 = load [2 x double]*, [2 x double]** %6
%19 = bitcast [2 x double]* %18 to double**
%20 = load [2 x double]*, [2 x double]** %7
%21 = bitcast [2 x double]* %20 to double**
%22 = call i32 @fft_rec(i32 %15, i32 0, i32 1, double** %17, double** %19, double** %21, i32 0)
%23 = load [2 x double]*, [2 x double]** %7
%24 = bitcast [2 x double]* %23 to double**
%25 = call i32 @free(double** %24)
ret void
}

LLVM IR (-O2):
define void @fft(i32 %0, [2 x double]* %1, [2 x double]* %2) {
%4 = shl i32 %0, 4
%5 = tail call double** @malloc(i32 %4)
%6 = bitcast [2 x double]* %1 to double**
%7 = bitcast [2 x double]* %2 to double**
%8 = tail call i32 @fft_rec(i32 %0, i32 0, i32 1, double** %6, double** %7, double** %5, i32 0)
%9 = tail call i32 @free(double** %5)
ret void
}
/* Variables and functions */
char fold();
main() {
  char i;
  i = fold();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <fold@plt>
mov    %al,-0x5(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <fold@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call signext i8 (...) @fold()
store i8 %3, i8* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call signext i8 (...) @fold()
ret i32 0
}
int test_imm_75int64_midword_reg(long long val) {
  return ((val >> 16) & (0x75 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_75int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x75,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_75int64_midword_reg>:
test   $0x750000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_75int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 117
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_75int64_midword_reg(i64 %0) {
%2 = and i64 %0, 7667712
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ shmdt(void *);
void shm_shared_no_ref(void *shmaddr) { shmdt(shmaddr); }


x86 assembly (clang, -O0):
<shm_shared_no_ref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <shmdt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shm_shared_no_ref>:
jmp    1030 <shmdt@plt>

LLVM IR (-O0):
define void @shm_shared_no_ref(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @shmdt(i8* %3)
ret void
}

LLVM IR (-O2):
define void @shm_shared_no_ref(i8* %0) {
%2 = tail call i32 @shmdt(i8* %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
struct timeval {
  int tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
uint32_t get_time(void) {
  static struct timeval T;
  gettimeofday(&T, NULL);
  return (T.tv_sec * 1000000) + T.tv_usec;
}


x86 assembly (clang, -O0):
<get_time>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f15(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x2f02(%rip),%eax
cltq
add    0x2f01(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_time>:
push   %rax
lea    0x2f18(%rip),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq 0x2f0a(%rip),%rax
imul   $0xf4240,%rax,%rax
add    0x2f04(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
@get_time.T = internal global %struct.timeval zeroinitializer
define i64 @get_time() {
%1 = call i32 @gettimeofday(%struct.timeval* @get_time.T, i32* null)
%2 = load i32, i32* getelementptr inbounds (%struct.timeval, %struct.timeval* @get_time.T, i32 0, i32 0)
%3 = mul nsw i32 %2, 1000000
%4 = sext i32 %3 to i64
%5 = load i64, i64* getelementptr inbounds (%struct.timeval, %struct.timeval* @get_time.T, i32 0, i32 1)
%6 = add nsw i64 %4, %5
ret i64 %6
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
@get_time.T = internal global %struct.timeval zeroinitializer
define i64 @get_time() {
%1 = tail call i32 @gettimeofday(%struct.timeval* @get_time.T, i32* null)
%2 = load i32, i32* getelementptr inbounds (%struct.timeval, %struct.timeval* @get_time.T, i64 0, i32 0)
%3 = mul nsw i32 %2, 1000000
%4 = sext i32 %3 to i64
%5 = load i64, i64* getelementptr inbounds (%struct.timeval, %struct.timeval* @get_time.T, i64 0, i32 1)
%6 = add nsw i64 %5, %4
ret i64 %6
}
/* Type definitions */
typedef uintptr_t uint32_t;

/* Variables and functions */
int getpagesize();
int munmap(void *, uintptr_t);
int /*<<< orphan*/ perror(char *);
void *unmapmem(void *addr, uint32_t size) {
  uint32_t pagemask = ~0UL ^ (getpagesize() - 1);
  uintptr_t baseaddr = (uintptr_t)addr & pagemask;
  int s;
  s = munmap((void *)baseaddr, size);
  if (s != 0) {
    perror("munmap error\n");
  }
  return NULL;
}


x86 assembly (clang, -O0):
<unmapmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <getpagesize@plt>
sub    $0x1,%eax
cltq
xor    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <munmap@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
je     1186 <unmapmem+0x56>
lea    0xe7f(%rip),%rdi
call   1040 <perror@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmapmem>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <getpagesize@plt>
neg    %eax
cltq
and    %rax,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <munmap@plt>
test   %eax,%eax
jne    1161 <unmapmem+0x31>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe98(%rip),%rdi
call   1040 <perror@plt>
jmp    1157 <unmapmem+0x27>

LLVM IR (-O0):
@.str = [14 x i8] c"munmap error\0A\00"
define i8* @unmapmem(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
%8 = call i32 (...) @getpagesize()
%9 = sub nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = xor i64 -1, %10
store i64 %11, i64* %5
%12 = load i8*, i8** %3
%13 = ptrtoint i8* %12 to i64
%14 = load i64, i64* %5
%15 = and i64 %13, %14
store i64 %15, i64* %6
%16 = load i64, i64* %6
%17 = inttoptr i64 %16 to i8*
%18 = load i64, i64* %4
%19 = call i32 @munmap(i8* %17, i64 %18)
store i32 %19, i32* %7
%20 = load i32, i32* %7
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %2
%23 = call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %24
24: ; preds = %22, %2
ret i8* null
}

LLVM IR (-O2):
@.str = [14 x i8] c"munmap error\0A\00"
define noalias i8* @unmapmem(i8* %0, i64 %1) {
%3 = tail call i32 (...) @getpagesize()
%4 = sub i32 0, %3
%5 = sext i32 %4 to i64
%6 = ptrtoint i8* %0 to i64
%7 = and i64 %5, %6
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @munmap(i8* %8, i64 %1)
%10 = icmp eq i32 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = tail call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ gen_emit_impl(int, char *, ...);
void gen_je(const char *label) {
  gen_emit_impl(449, "\t"
                     "test %%rax, %%rax");
  gen_emit_impl(450,
                "\t"
                "je %s",
                label);
}


x86 assembly (clang, -O0):
<gen_je>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1c1,%edi
lea    0xed8(%rip),%rsi
mov    $0x0,%al
call   1030 <gen_emit_impl@plt>
mov    -0x8(%rbp),%rdx
mov    $0x1c2,%edi
lea    0xed4(%rip),%rsi
mov    $0x0,%al
call   1030 <gen_emit_impl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_je>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
mov    $0x1c1,%edi
xor    %eax,%eax
call   1030 <gen_emit_impl@plt>
lea    0xee5(%rip),%rsi
mov    $0x1c2,%edi
mov    %rbx,%rdx
xor    %eax,%eax
pop    %rbx
jmp    1030 <gen_emit_impl@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"\09test %%rax, %%rax\00"
@.str.1 = [7 x i8] c"\09je %s\00"
define void @gen_je(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i8*, ...) @gen_emit_impl(i32 449, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i32, i8*, ...) @gen_emit_impl(i32 450, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"\09test %%rax, %%rax\00"
@.str.1 = [7 x i8] c"\09je %s\00"
define void @gen_je(i8* %0) {
%2 = tail call i32 (i32, i8*, ...) @gen_emit_impl(i32 449, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i32, i8*, ...) @gen_emit_impl(i32 450, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_failed(char *, int);
void Spurious_Handler(void) {
  assert_failed("startup", 263);
  for (;;) {
  }
}


x86 assembly (clang, -O0):
<Spurious_Handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x107,%esi
call   1030 <assert_failed@plt>
jmp    1125 <Spurious_Handler+0x15>

x86 assembly (clang, -O2):
<Spurious_Handler>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x107,%esi
call   1030 <assert_failed@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
jmp    1130 <Spurious_Handler+0x20>

LLVM IR (-O0):
@.str = [8 x i8] c"startup\00"
define void @Spurious_Handler() {
%1 = call i32 @assert_failed(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 263)
br label %2
2: ; preds = %2, %0
br label %2
}

LLVM IR (-O2):
@.str = [8 x i8] c"startup\00"
define void @Spurious_Handler() {
%1 = tail call i32 @assert_failed(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 263)
br label %2
2: ; preds = %2, %0
br label %2
}