xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ exists(char *);
const char *scan_brightness() {
  if (exists("/sys/class/backlight/gta02-bl/brightness"))
    return "/sys/class/backlight/gta02-bl/brightness";
  if (exists("/sys/devices/virtual/backlight/acpi_video0/brightness"))
    return "/sys/devices/virtual/backlight/acpi_video0/brightness";
  return NULL;
}


x86 assembly (clang, -O0):
<scan_brightness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <exists@plt>
cmp    $0x0,%rax
je     113e <scan_brightness+0x2e>
lea    0xecb(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    116c <scan_brightness+0x5c>
lea    0xee4(%rip),%rdi
call   1030 <exists@plt>
cmp    $0x0,%rax
je     1164 <scan_brightness+0x54>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    116c <scan_brightness+0x5c>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_brightness>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <exists@plt>
test   %rax,%rax
jne    113b <scan_brightness+0x2b>
lea    0xefd(%rip),%rbx
mov    %rbx,%rdi
call   1030 <exists@plt>
test   %rax,%rax
cmove  %rax,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"/sys/class/backlight/gta02-bl/brightness\00"
@.str.1 = [54 x i8] c"/sys/devices/virtual/backlight/acpi_video0/brightness\00"
define i8* @scan_brightness() {
%1 = alloca i8*
%2 = call i64 @exists(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8** %1
br label %10
5: ; preds = %0
%6 = call i64 @exists(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %5
store i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0), i8** %1
br label %10
9: ; preds = %5
store i8* null, i8** %1
br label %10
10: ; preds = %9, %8, %4
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
@.str = [41 x i8] c"/sys/class/backlight/gta02-bl/brightness\00"
@.str.1 = [54 x i8] c"/sys/devices/virtual/backlight/acpi_video0/brightness\00"
define i8* @scan_brightness() {
%1 = tail call i64 @exists(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i64 @exists(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
%6 = select i1 %5, i8* null, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0)
br label %7
7: ; preds = %3, %0
%8 = phi i8* [ getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), %0 ], [ %6, %3 ]
ret i8* %8
}
/* Variables and functions */
unsigned long atol(char *);
int /*<<< orphan*/ sscanf(char *, char *, unsigned long *);
int /*<<< orphan*/ strncmp(char *, char *, int);
unsigned long str_to_ul(char *str) {
  unsigned long ret;
  if (!strncmp(str, "0x", 2)) {
    sscanf(str + 2, "%lx", &ret);
  } else {
    ret = atol(str);
  }
  return ret;
}


x86 assembly (clang, -O0):
<str_to_ul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
mov    $0x2,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
jne    1177 <str_to_ul+0x47>
mov    -0x8(%rbp),%rdi
add    $0x2,%rdi
lea    0xe9a(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1040 <sscanf@plt>
jmp    1184 <str_to_ul+0x54>
mov    -0x8(%rbp),%rdi
call   1050 <atol@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_to_ul>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xec1(%rip),%rsi
mov    $0x2,%edx
call   1030 <strncmp@plt>
test   %eax,%eax
je     115a <str_to_ul+0x2a>
mov    %rbx,%rdi
add    $0x10,%rsp
pop    %rbx
jmp    1050 <atol@plt>
add    $0x2,%rbx
lea    0xe9e(%rip),%rsi
lea    0x8(%rsp),%rdx
mov    %rbx,%rdi
call   1040 <sscanf@plt>
mov    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"0x\00"
@.str.1 = [4 x i8] c"%lx\00"
define i64 @str_to_ul(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strncmp(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%6 = icmp ne i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 2
%10 = call i32 @sscanf(i8* %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i64* %3)
br label %14
11: ; preds = %1
%12 = load i8*, i8** %2
%13 = call i64 @atol(i8* %12)
store i64 %13, i64* %3
br label %14
14: ; preds = %11, %7
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
@.str = [3 x i8] c"0x\00"
@.str.1 = [4 x i8] c"%lx\00"
define i64 @str_to_ul(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = tail call i32 @strncmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = getelementptr inbounds i8, i8* %0, i64 2
%8 = call i32 @sscanf(i8* %7, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i64* %2)
%9 = load i64, i64* %2
br label %12
10: ; preds = %1
%11 = tail call i64 @atol(i8* %0)
br label %12
12: ; preds = %10, %6
%13 = phi i64 [ %11, %10 ], [ %9, %6 ]
ret i64 %13
}
int test_imm_55int16_mem(short *val) {
  return ((*val) & (-0x55 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_55int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffffab,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_55int16_mem>:
movzwl (%rdi),%eax
test   $0xffab,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_55int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -85
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_55int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -85
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ init();
int main() {
  init();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <init@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <init@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init()
ret i32 0
}
unsigned short inports(unsigned short _port) {
  unsigned short rv;
  asm volatile("inw %1, %0" : "=a"(rv) : "dN"(_port));
  return rv;
}


x86 assembly (clang, -O0):
<inports>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inports>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @inports(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inports(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ uart_put(char);
void print(const char *chars) {
  char *char_ptr = (char *)chars;
  while (*char_ptr != '\0') {
    uart_put(*char_ptr);
    char_ptr++;
  }
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1151 <print+0x41>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <uart_put@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <print+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <print+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <uart_put@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <print+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @print(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = call i32 @uart_put(i8 signext %12)
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
br label %5
16: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @print(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @uart_put(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
uint32_t __int16_t_clone_array(const int16_t *p, int16_t *q,
                               uint32_t elements) {
  uint32_t n = elements * sizeof(int16_t);
  memcpy(q, p, n);
  return n;
}


x86 assembly (clang, -O0):
<__int16_t_clone_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movslq -0x14(%rbp),%rax
shl    $0x2,%rax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__int16_t_clone_array>:
push   %rbx
mov    %rdi,%rax
lea    0x0(,%rdx,4),%ebx
mov    %rsi,%rdi
mov    %rax,%rsi
mov    %ebx,%edx
call   1030 <memcpy@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__int16_t_clone_array(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = mul i64 %9, 4
%11 = trunc i64 %10 to i32
store i32 %11, i32* %7
%12 = load i32*, i32** %5
%13 = load i32*, i32** %4
%14 = load i32, i32* %7
%15 = call i32 @memcpy(i32* %12, i32* %13, i32 %14)
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @__int16_t_clone_array(i32* %0, i32* %1, i32 %2) {
%4 = shl i32 %2, 2
%5 = tail call i32 @memcpy(i32* %1, i32* %0, i32 %4)
ret i32 %4
}
int myCeil(double data) {
  if (data - (int)data == 0)
    return data;
  if (data > 0)
    return ((int)data + 1);
  else
    return ((int)data);
}


x86 assembly (clang, -O0):
<myCeil>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
subsd  %xmm1,%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    113b <myCeil+0x3b>
jp     113b <myCeil+0x3b>
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1165 <myCeil+0x65>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    115d <myCeil+0x5d>
cvttsd2si -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1165 <myCeil+0x65>
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myCeil>:
cvttsd2si %xmm0,%ecx
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
movapd %xmm0,%xmm2
subsd  %xmm1,%xmm2
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm2
setp   %al
setne  %dl
or     %al,%dl
ucomisd %xmm1,%xmm0
seta   %al
and    %dl,%al
movzbl %al,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @myCeil(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = load double, double* %3
%6 = fptosi double %5 to i32
%7 = sitofp i32 %6 to double
%8 = fsub double %4, %7
%9 = fcmp oeq double %8, 0.000000e+00
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load double, double* %3
%12 = fptosi double %11 to i32
store i32 %12, i32* %2
br label %23
13: ; preds = %1
%14 = load double, double* %3
%15 = fcmp ogt double %14, 0.000000e+00
br i1 %15, label %16, label %20
16: ; preds = %13
%17 = load double, double* %3
%18 = fptosi double %17 to i32
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
br label %23
20: ; preds = %13
%21 = load double, double* %3
%22 = fptosi double %21 to i32
store i32 %22, i32* %2
br label %23
23: ; preds = %20, %16, %10
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @myCeil(double %0) {
%2 = fptosi double %0 to i32
%3 = sitofp i32 %2 to double
%4 = fsub double %0, %3
%5 = fcmp une double %4, 0.000000e+00
%6 = fcmp ogt double %0, 0.000000e+00
%7 = and i1 %6, %5
%8 = zext i1 %7 to i32
%9 = add nsw i32 %8, %2
ret i32 %9
}
int trueFiveEighths(int x) {
  int mod8 = 7;
  int eighthx;
  int fivex;
  int remainder;
  int sign = !!(x >> 31);
  int test = !((1 << 31) ^ x);
  mod8 = x & mod8;
  eighthx = x >> 3;
  fivex = (eighthx << 2) + eighthx;
  remainder = (mod8 << 2) + mod8;
  remainder = remainder >> 3;
  return fivex + remainder + sign + 1 + (~test);
}


x86 assembly (clang, -O0):
<trueFiveEighths>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x80000000,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x2,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x3,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
add    $0x1,%eax
mov    -0x1c(%rbp),%ecx
xor    $0xffffffff,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trueFiveEighths>:
mov    %edi,%ecx
shr    $0x1f,%ecx
xor    %edx,%edx
cmp    $0x80000000,%edi
sete   %dl
mov    %edi,%esi
and    $0x7,%esi
sar    $0x3,%edi
lea    (%rdi,%rdi,4),%eax
add    %ecx,%eax
lea    (%rsi,%rsi,4),%ecx
shr    $0x3,%ecx
sub    %edx,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @trueFiveEighths(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %2
store i32 7, i32* %3
%9 = load i32, i32* %2
%10 = ashr i32 %9, 31
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = xor i1 %12, true
%14 = zext i1 %13 to i32
store i32 %14, i32* %7
%15 = load i32, i32* %2
%16 = xor i32 -2147483648, %15
%17 = icmp ne i32 %16, 0
%18 = xor i1 %17, true
%19 = zext i1 %18 to i32
store i32 %19, i32* %8
%20 = load i32, i32* %2
%21 = load i32, i32* %3
%22 = and i32 %20, %21
store i32 %22, i32* %3
%23 = load i32, i32* %2
%24 = ashr i32 %23, 3
store i32 %24, i32* %4
%25 = load i32, i32* %4
%26 = shl i32 %25, 2
%27 = load i32, i32* %4
%28 = add nsw i32 %26, %27
store i32 %28, i32* %5
%29 = load i32, i32* %3
%30 = shl i32 %29, 2
%31 = load i32, i32* %3
%32 = add nsw i32 %30, %31
store i32 %32, i32* %6
%33 = load i32, i32* %6
%34 = ashr i32 %33, 3
store i32 %34, i32* %6
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = add nsw i32 %35, %36
%38 = load i32, i32* %7
%39 = add nsw i32 %37, %38
%40 = add nsw i32 %39, 1
%41 = load i32, i32* %8
%42 = xor i32 %41, -1
%43 = add nsw i32 %40, %42
ret i32 %43
}

LLVM IR (-O2):
define i32 @trueFiveEighths(i32 %0) {
%2 = lshr i32 %0, 31
%3 = icmp eq i32 %0, -2147483648
%4 = sext i1 %3 to i32
%5 = and i32 %0, 7
%6 = ashr i32 %0, 3
%7 = mul nsw i32 %6, 5
%8 = mul nuw nsw i32 %5, 5
%9 = lshr i32 %8, 3
%10 = add nsw i32 %7, %2
%11 = add nsw i32 %10, %4
%12 = add nsw i32 %11, %9
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ io2w_init();
void si475x_reset(void) {
  io2w_init();
  return;
}


x86 assembly (clang, -O0):
<si475x_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <io2w_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<si475x_reset>:
xor    %eax,%eax
jmp    1030 <io2w_init@plt>

LLVM IR (-O0):
define void @si475x_reset() {
%1 = call i32 (...) @io2w_init()
ret void
}

LLVM IR (-O2):
define void @si475x_reset() {
%1 = tail call i32 (...) @io2w_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dap_write_word(int, int);
void target_lock(void) {
  dap_write_word((0x400e0a04 + (0) * 0x200), 0x5a00000b | (0 << 8));
}


x86 assembly (clang, -O0):
<target_lock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400e0a04,%edi
mov    $0x5a00000b,%esi
call   1030 <dap_write_word@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<target_lock>:
mov    $0x400e0a04,%edi
mov    $0x5a00000b,%esi
jmp    1030 <dap_write_word@plt>

LLVM IR (-O0):
define void @target_lock() {
%1 = call i32 @dap_write_word(i32 1074661892, i32 1509949451)
ret void
}

LLVM IR (-O2):
define void @target_lock() {
%1 = tail call i32 @dap_write_word(i32 1074661892, i32 1509949451)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int getc(int /*<<< orphan*/ *);
int /*<<< orphan*/ ungetc(int, int /*<<< orphan*/ *);
int next_char(FILE *i) {
  int ch = getc(i);
  ungetc(ch, i);
  return ch;
}


x86 assembly (clang, -O0):
<next_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getc@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   1030 <ungetc@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_char>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <getc@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
call   1030 <ungetc@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @next_char(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @getc(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32*, i32** %2
%8 = call i32 @ungetc(i32 %6, i32* %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @next_char(i32* nocapture %0) {
%2 = tail call i32 @getc(i32* %0)
%3 = tail call i32 @ungetc(i32 %2, i32* %0)
ret i32 %2
}
void rop3_168_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T | S;
  stk1 = *D & stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_168_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_168_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_168_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = xor i32 %25, -1
%27 = and i32 %23, %26
%28 = load i8, i8* %6
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8*, i8** %4
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = and i32 %34, %36
%38 = or i32 %31, %37
%39 = load i8*, i8** %4
%40 = load i8, i8* %39
%41 = zext i8 %40 to i32
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = and i32 %41, %43
%45 = or i32 %38, %44
%46 = trunc i32 %45 to i8
%47 = load i8*, i8** %4
store i8 %46, i8* %47
ret void
}

LLVM IR (-O2):
define void @rop3_168_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
char toupper(char);
void toUpper(char *str) {
  while (*str) {
    *str = toupper(*str);
    str++;
  }
}


x86 assembly (clang, -O0):
<toUpper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114e <toUpper+0x3e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <toUpper+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toUpper>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1136 <toUpper+0x26>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <toupper@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <toUpper+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @toUpper(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call signext i8 @toupper(i8 signext %9)
%11 = load i8*, i8** %2
store i8 %10, i8* %11
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @toUpper(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call signext i8 @toupper(i8 signext %5)
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mensaje() { printf("Hasta luego\n"); }


x86 assembly (clang, -O0):
<mensaje>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mensaje>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hasta luego\0A\00"
define void @mensaje() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"Hasta luego\00"
define void @mensaje() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outstr(char *);
olprfix() { outstr("LL"); }


x86 assembly (clang, -O0):
<olprfix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <outstr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<olprfix>:
lea    0xee9(%rip),%rdi
jmp    1030 <outstr@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"LL\00"
define i32 @olprfix() {
%1 = alloca i32
%2 = call i32 @outstr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [3 x i8] c"LL\00"
define i32 @olprfix() {
%1 = tail call i32 @outstr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int f_le_rr2(float a1, float a2) { return !(((a1) <= (a2))); }


x86 assembly (clang, -O0):
<f_le_rr2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_le_rr2>:
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setb   %al
ret

LLVM IR (-O0):
define i32 @f_le_rr2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ole float %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f_le_rr2(float %0, float %1) {
%3 = fcmp ugt float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fs__exit();
void fs_exit(void) { fs__exit(); }


x86 assembly (clang, -O0):
<fs_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fs__exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_exit>:
xor    %eax,%eax
jmp    1030 <fs__exit@plt>

LLVM IR (-O0):
define void @fs_exit() {
%1 = call i32 (...) @fs__exit()
ret void
}

LLVM IR (-O2):
define void @fs_exit() {
%1 = tail call i32 (...) @fs__exit()
ret void
}
/* Variables and functions */
int FastBar10(int, int, int, int, int, int, int /*<<< orphan*/, int, int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int sum;
  sum = FastBar10(6, 2, 4, 8, 1, 9, 0, 7, 3, 5);
  printf(" main: sum=%d\n", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x6,%edi
mov    $0x2,%esi
mov    $0x4,%edx
mov    $0x8,%ecx
mov    $0x1,%r8d
mov    $0x9,%r9d
xor    %eax,%eax
movl   $0x0,(%rsp)
movl   $0x7,0x8(%rsp)
movl   $0x3,0x10(%rsp)
movl   $0x5,0x18(%rsp)
call   1040 <FastBar10@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe7e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x6,%edi
mov    $0x2,%esi
mov    $0x4,%edx
mov    $0x8,%ecx
mov    $0x1,%r8d
mov    $0x9,%r9d
push   $0x5
push   $0x3
push   $0x7
push   $0x0
call   1040 <FastBar10@plt>
add    $0x20,%rsp
lea    0xea7(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c" main: sum=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @FastBar10(i32 6, i32 2, i32 4, i32 8, i32 1, i32 9, i32 0, i32 7, i32 3, i32 5)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c" main: sum=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @FastBar10(i32 6, i32 2, i32 4, i32 8, i32 1, i32 9, i32 0, i32 7, i32 3, i32 5)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ intmax_t;

/* Variables and functions */
int /*<<< orphan*/ ft_putnbr_fd(int /*<<< orphan*/, int);
void ft_putnbr(intmax_t n) { ft_putnbr_fd(n, 1); }


x86 assembly (clang, -O0):
<ft_putnbr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <ft_putnbr_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr>:
mov    $0x1,%esi
jmp    1030 <ft_putnbr_fd@plt>

LLVM IR (-O0):
define void @ft_putnbr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ft_putnbr_fd(i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @ft_putnbr(i32 %0) {
%2 = tail call i32 @ft_putnbr_fd(i32 %0, i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ HMAC_CTX;

/* Variables and functions */
int /*<<< orphan*/ HMAC_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ HMAC_CTX_init(int /*<<< orphan*/ *);
int HMAC_CTX_reset(HMAC_CTX *ctx) {
  HMAC_CTX_cleanup(ctx);
  HMAC_CTX_init(ctx);
  return 1;
}


x86 assembly (clang, -O0):
<HMAC_CTX_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <HMAC_CTX_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1030 <HMAC_CTX_init@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMAC_CTX_reset>:
push   %rbx
mov    %rdi,%rbx
call   1040 <HMAC_CTX_cleanup@plt>
mov    %rbx,%rdi
call   1030 <HMAC_CTX_init@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @HMAC_CTX_reset(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @HMAC_CTX_cleanup(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @HMAC_CTX_init(i32* %5)
ret i32 1
}

LLVM IR (-O2):
define i32 @HMAC_CTX_reset(i32* %0) {
%2 = tail call i32 @HMAC_CTX_cleanup(i32* %0)
%3 = tail call i32 @HMAC_CTX_init(i32* %0)
ret i32 1
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int initialize_standard_Laurent_sampler(int dim) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(804, &dim, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<initialize_standard_Laurent_sampler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x324,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_standard_Laurent_sampler>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x324,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @initialize_standard_Laurent_sampler(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %3
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc4c(i32 804, i32* %2, i32* %6, double* %7, i32 0)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @initialize_standard_Laurent_sampler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc4c(i32 804, i32* %2, i32* undef, double* undef, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ clear_gpio_function(int *, int);
int /*<<< orphan*/ set_gpio_function(int *, int, int);
void change_gpio_function(int *function_select_register,
                          int function_select_value, int bit_offset) {
  clear_gpio_function(function_select_register, bit_offset);
  set_gpio_function(function_select_register, function_select_value,
                    bit_offset);
}


x86 assembly (clang, -O0):
<change_gpio_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1040 <clear_gpio_function@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <set_gpio_function@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_gpio_function>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %rdi,%rbp
mov    %edx,%esi
call   1040 <clear_gpio_function@plt>
mov    %rbp,%rdi
mov    %r14d,%esi
mov    %ebx,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <set_gpio_function@plt>

LLVM IR (-O0):
define void @change_gpio_function(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %6
%9 = call i32 @clear_gpio_function(i32* %7, i32 %8)
%10 = load i32*, i32** %4
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = call i32 @set_gpio_function(i32* %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @change_gpio_function(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @clear_gpio_function(i32* %0, i32 %2)
%5 = tail call i32 @set_gpio_function(i32* %0, i32 %1, i32 %2)
ret void
}
int test_imm_04uint16_reg(unsigned short val) {
  return ((val) & (0x04 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_04uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_04uint16_reg>:
test   $0x4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_04uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 4
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_04uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 4
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int teens(int n, int n1) {
  switch (n1) {
  case '0':
    return 3;
  case '1':
    return 6;
  case '2':
    return 6;
  case '3':
    return 8;
  case '4':
    return 8;
  case '5':
    return 7;
  case '6':
    return 7;
  case '7':
    return 9;
  case '8':
    return 8;
  case '9':
    return 8;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<teens>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffd0,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x9,%eax
ja     11ab <teens+0xab>
mov    -0x18(%rbp),%rax
lea    0xed6(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x6,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x6,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x8,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x8,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x7,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x7,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x9,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x8,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x8,-0x4(%rbp)
jmp    11b2 <teens+0xb2>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<teens>:
add    $0xffffffd0,%esi
xor    %eax,%eax
cmp    $0x9,%esi
ja     1117 <teens+0x17>
movslq %esi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @teens(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
switch i32 %6, label %17 [
i32 48, label %7
i32 49, label %8
i32 50, label %9
i32 51, label %10
i32 52, label %11
i32 53, label %12
i32 54, label %13
i32 55, label %14
i32 56, label %15
i32 57, label %16
]
7: ; preds = %2
store i32 3, i32* %3
br label %18
8: ; preds = %2
store i32 6, i32* %3
br label %18
9: ; preds = %2
store i32 6, i32* %3
br label %18
10: ; preds = %2
store i32 8, i32* %3
br label %18
11: ; preds = %2
store i32 8, i32* %3
br label %18
12: ; preds = %2
store i32 7, i32* %3
br label %18
13: ; preds = %2
store i32 7, i32* %3
br label %18
14: ; preds = %2
store i32 9, i32* %3
br label %18
15: ; preds = %2
store i32 8, i32* %3
br label %18
16: ; preds = %2
store i32 8, i32* %3
br label %18
17: ; preds = %2
store i32 0, i32* %3
br label %18
18: ; preds = %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@switch.table.teens = [10 x i32] [i32 3, i32 6, i32 6, i32 8, i32 8, i32 7, i32 7, i32 9, i32 8, i32 8]
define i32 @teens(i32 %0, i32 %1) {
%3 = add i32 %1, -48
%4 = icmp ult i32 %3, 10
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.teens, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %2, %5
%10 = phi i32 [ %8, %5 ], [ 0, %2 ]
ret i32 %10
}
void delay_cycles(unsigned long long delay) {
  unsigned long long i;
  for (i = 0; i < delay; i++) {
  }
}


x86 assembly (clang, -O0):
<delay_cycles>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1134 <delay_cycles+0x34>
jmp    1123 <delay_cycles+0x23>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <delay_cycles+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_cycles>:
ret

LLVM IR (-O0):
define void @delay_cycles(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay_cycles(i64 %0) {
ret void
}
void BlendPlaneRow_Any_SSSE3() {}


x86 assembly (clang, -O0):
<BlendPlaneRow_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BlendPlaneRow_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @BlendPlaneRow_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @BlendPlaneRow_Any_SSSE3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ kill(int /*<<< orphan*/, int);
int /*<<< orphan*/ signal(int, int /*<<< orphan*/);
void sighandler(int sig) {
  signal(sig, SIG_DFL);
  cleanup();
  kill(getpid(), sig);
}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
mov    $0x0,%al
call   1060 <cleanup@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
call   1050 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
push   %rbx
mov    %edi,%ebx
mov    0x2e96(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
xor    %eax,%eax
call   1060 <cleanup@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1050 <kill@plt>

LLVM IR (-O0):
@SIG_DFL = global i32 0
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIG_DFL
%5 = call i32 @signal(i32 %3, i32 %4)
%6 = call i32 (...) @cleanup()
%7 = call i32 (...) @getpid()
%8 = load i32, i32* %2
%9 = call i32 @kill(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
@SIG_DFL = global i32 0
define void @sighandler(i32 %0) {
%2 = load i32, i32* @SIG_DFL
%3 = tail call i32 @signal(i32 %0, i32 %2)
%4 = tail call i32 (...) @cleanup()
%5 = tail call i32 (...) @getpid()
%6 = tail call i32 @kill(i32 %5, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int fcntl(int, int /*<<< orphan*/, int /*<<< orphan*/ *);
int fd_get_flags(int fd) { return fcntl(fd, F_GETFL, NULL); }


x86 assembly (clang, -O0):
<fd_get_flags>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_get_flags>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_GETFL = global i32 0
define i32 @fd_get_flags(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_GETFL
%5 = call i32 @fcntl(i32 %3, i32 %4, i32* null)
ret i32 %5
}

LLVM IR (-O2):
@F_GETFL = global i32 0
define i32 @fd_get_flags(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 @fcntl(i32 %0, i32 %2, i32* null)
ret i32 %3
}
int main() {
  signed int i;
  signed char c;
  i = 0;
  c = 0x01;
  i = c;
  i = 0;
  c = 0xFF;
  i = c;
  i = 0;
  c = 0x80;
  i = c;
  i = 0;
  c = 0x7F;
  i = c;
  i = 0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movb   $0x1,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
movb   $0xff,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
movb   $0x80,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
movb   $0x7f,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
store i32 0, i32* %1
store i32 0, i32* %2
store i8 1, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
store i32 %5, i32* %2
store i32 0, i32* %2
store i8 -1, i8* %3
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
store i32 %7, i32* %2
store i32 0, i32* %2
store i8 -128, i8* %3
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
store i32 %9, i32* %2
store i32 0, i32* %2
store i8 127, i8* %3
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
store i32 %11, i32* %2
store i32 0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void cleanup() { printf("sprzątam, sprzątam!\n"); }


x86 assembly (clang, -O0):
<cleanup>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"sprz\C4\85tam, sprz\C4\85tam!\0A\00"
define void @cleanup() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"sprz\C4\85tam, sprz\C4\85tam!\00"
define void @cleanup() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int pow(int, int);
float section_modulus(int base, int height) {
  return (base * pow(height, 2)) / 6.0;
}


x86 assembly (clang, -O0):
<section_modulus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x2,%esi
call   1030 <pow@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
cvtsi2sd %eax,%xmm0
movsd  0xebb(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_modulus>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
mov    $0x2,%esi
call   1030 <pow@plt>
imul   %ebx,%eax
cvtsi2sd %eax,%xmm0
divsd  0xed2(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define float @section_modulus(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @pow(i32 %6, i32 2)
%8 = mul nsw i32 %5, %7
%9 = sitofp i32 %8 to double
%10 = fdiv double %9, 6.000000e+00
%11 = fptrunc double %10 to float
ret float %11
}

LLVM IR (-O2):
define float @section_modulus(i32 %0, i32 %1) {
%3 = tail call i32 @pow(i32 %1, i32 2)
%4 = mul nsw i32 %3, %0
%5 = sitofp i32 %4 to double
%6 = fdiv double %5, 6.000000e+00
%7 = fptrunc double %6 to float
ret float %7
}
int fatorialIterativa(int n) {
  int i, f = 1;
  for (i = 1; i <= 5; i++) {
    f = f * i;
  }
  return f;
}


x86 assembly (clang, -O0):
<fatorialIterativa>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jg     1137 <fatorialIterativa+0x37>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <fatorialIterativa+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatorialIterativa>:
mov    $0x78,%eax
ret

LLVM IR (-O0):
define i32 @fatorialIterativa(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 5
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = mul nsw i32 %9, %10
store i32 %11, i32* %4
br label %12
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @fatorialIterativa(i32 %0) {
ret i32 120
}
/* Variables and functions */
int /*<<< orphan*/ cbmarch_driver_close(int);
void cbm_driver_close(int HandleDevice) {
  ;
  cbmarch_driver_close(HandleDevice);
  return;
}


x86 assembly (clang, -O0):
<cbm_driver_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <cbmarch_driver_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbm_driver_close>:
jmp    1030 <cbmarch_driver_close@plt>

LLVM IR (-O0):
define void @cbm_driver_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cbmarch_driver_close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @cbm_driver_close(i32 %0) {
%2 = tail call i32 @cbmarch_driver_close(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
int strcspn(char *, char *);
main(void) {
  char cadena[] = "xyzabc";
  int pos;
  pos = strcspn(cadena, "abc");
  printf("Primer a, b o c en %s es el carácter %d\n", cadena, pos);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x7(%rbp)
mov    0xecc(%rip),%ax
mov    %ax,-0x3(%rbp)
mov    0xec4(%rip),%al
mov    %al,-0x1(%rbp)
lea    -0x7(%rbp),%rdi
lea    0xeb3(%rip),%rsi
call   1040 <strcspn@plt>
mov    %eax,-0xc(%rbp)
lea    -0x7(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x636261,0xb(%rsp)
movl   $0x617a7978,0x8(%rsp)
61
lea    0xec7(%rip),%rsi
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <strcspn@plt>
lea    0xeb7(%rip),%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.cadena = [7 x i8] c"xyzabc\00"
@.str = [4 x i8] c"abc\00"
@.str.1 = [42 x i8] c"Primer a, b o c en %s es el car\C3\A1cter %d\0A\00"
define i32 @main() {
%1 = alloca [7 x i8]
%2 = alloca i32
%3 = bitcast [7 x i8]* %1 to i8*
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%5 = call i32 @strcspn(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store i32 %5, i32* %2
%6 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.1, i64 0, i64 0), i8* %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.cadena = [7 x i8] c"xyzabc\00"
@.str = [4 x i8] c"abc\00"
@.str.1 = [42 x i8] c"Primer a, b o c en %s es el car\C3\A1cter %d\0A\00"
define i32 @main() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcspn(i8* %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.1, i64 0, i64 0), i8* %2, i32 %3)
ret i32 0
}