#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct timespec {
  int tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ clock_nanosleep(int /*<<< orphan*/, int /*<<< orphan*/,
                                   struct timespec *, int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ stderr;
int _config_FPGA(char *BASE1, int write_FPGA, int flash_image, int print) {
  int temp = 0;
  unsigned int address;
  struct timespec sleep;
  if (flash_image == 0) {
    address = 0x00000000;
  } else if (flash_image == 1) {
    address = 0x00200000;
  } else {
    fprintf(stderr, "INVALID IMAGE NUMBER\n");
    return -1;
  }
  if (write_FPGA == 1) {
    if (print == 1) {
      printf("RECONFIGURING FPGA WITH IMAGE %d\n", flash_image);
    }
    *((unsigned int *)(BASE1 + 0x04)) = (0x80000000 | address);
    sleep.tv_sec = 1;
    sleep.tv_nsec = 0;
    clock_nanosleep(CLOCK_REALTIME, 0, &sleep, 0);
  }
  if ((*((unsigned int *)(BASE1 + 0x00)) & 0x00000001) == 0) {
    fprintf(stderr, "FPGA not properly configured");
    return -1;
  }
  *((unsigned int *)(BASE1 + 0x00)) =
      (*((unsigned int *)(BASE1 + 0x00)) | 0x00000010);
  *((unsigned int *)(BASE1 + 0x00)) =
      (*((unsigned int *)(BASE1 + 0x00)) | 0x00000020);
  if ((*((unsigned int *)(BASE1 + 0x00)) & 0x00000001) == 0) {
    fprintf(stderr, "FPGA not properly configured");
    temp = 1;
    return -1;
  }
  if (print == 1) {
    printf("	STX_FLASH PARAMETERS:\n");
    if (temp == 0) {
      printf("	  FPGA configured properly\n");
    }
    printf("	  GC314FS_SF_CSR=	0x%x\n",
           *((unsigned int *)(BASE1 + 0x00)));
    printf("	  FLASH VERSION=	0x%x\n",
           *((unsigned int *)(BASE1 + 0x3c)));
  }
  return 1;
}


x86 assembly (clang, -O0):
<_config_FPGA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1162 <_config_FPGA+0x32>
movl   $0x0,-0x24(%rbp)
jmp    119e <_config_FPGA+0x6e>
cmpl   $0x1,-0x18(%rbp)
jne    1178 <_config_FPGA+0x48>
movl   $0x200000,-0x24(%rbp)
jmp    1199 <_config_FPGA+0x69>
mov    0x2e61(%rip),%rax
mov    (%rax),%edi
lea    0xe78(%rip),%rsi
call   1040 <fprintf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    12e3 <_config_FPGA+0x1b3>
jmp    119e <_config_FPGA+0x6e>
cmpl   $0x1,-0x14(%rbp)
jne    11f8 <_config_FPGA+0xc8>
cmpl   $0x1,-0x1c(%rbp)
jne    11c3 <_config_FPGA+0x93>
mov    -0x18(%rbp),%esi
lea    0xe5a(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x24(%rbp),%ecx
or     $0x80000000,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
movl   $0x1,-0x38(%rbp)
movq   $0x0,-0x30(%rbp)
mov    0x2def(%rip),%rax
mov    (%rax),%edi
xor    %ecx,%ecx
lea    -0x38(%rbp),%rdx
mov    %ecx,%esi
call   1050 <clock_nanosleep@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    122b <_config_FPGA+0xfb>
mov    0x2dcf(%rip),%rax
mov    (%rax),%edi
lea    0xe1e(%rip),%rsi
call   1040 <fprintf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    12e3 <_config_FPGA+0x1b3>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
or     $0x20,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1283 <_config_FPGA+0x153>
mov    0x2d7e(%rip),%rax
mov    (%rax),%edi
lea    0xdcd(%rip),%rsi
call   1040 <fprintf@plt>
movl   $0x1,-0x20(%rbp)
movl   $0xffffffff,-0x4(%rbp)
jmp    12e3 <_config_FPGA+0x1b3>
cmpl   $0x1,-0x1c(%rbp)
jne    12dc <_config_FPGA+0x1ac>
lea    0xdc1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
cmpl   $0x0,-0x20(%rbp)
jne    12b3 <_config_FPGA+0x183>
lea    0xdc1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xdca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    0x3c(%rax),%esi
lea    0xdce(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_config_FPGA>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %ecx,%r14d
mov    %rdi,%rbx
test   %edx,%edx
je     1163 <_config_FPGA+0x23>
cmp    $0x1,%edx
jne    11c3 <_config_FPGA+0x83>
mov    $0x80200000,%ebp
cmp    $0x1,%esi
je     116d <_config_FPGA+0x2d>
jmp    11ab <_config_FPGA+0x6b>
mov    $0x80000000,%ebp
cmp    $0x1,%esi
jne    11ab <_config_FPGA+0x6b>
cmp    $0x1,%r14d
jne    1183 <_config_FPGA+0x43>
lea    0xe9c(%rip),%rdi
mov    %edx,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %ebp,0x4(%rbx)
movl   $0x1,(%rsp)
movq   $0x0,0x8(%rsp)
mov    0x2e3b(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
xor    %esi,%esi
xor    %ecx,%ecx
call   1060 <clock_nanosleep@plt>
mov    (%rbx),%eax
test   $0x1,%al
jne    11df <_config_FPGA+0x9f>
mov    0x2e28(%rip),%rax
mov    (%rax),%edi
lea    0xe77(%rip),%rsi
jmp    11d3 <_config_FPGA+0x93>
mov    0x2e16(%rip),%rax
mov    (%rax),%edi
lea    0xe2d(%rip),%rsi
call   1050 <fprintf@plt>
mov    $0xffffffff,%ebp
jmp    1228 <_config_FPGA+0xe8>
or     $0x30,%eax
mov    %eax,(%rbx)
mov    $0x1,%ebp
cmp    $0x1,%r14d
jne    1228 <_config_FPGA+0xe8>
lea    0xe90(%rip),%rdi
call   1030 <puts@plt>
lea    0xe9b(%rip),%rdi
call   1030 <puts@plt>
mov    (%rbx),%esi
lea    0xe45(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x3c(%rbx),%esi
lea    0xe4d(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %ebp,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
@stderr = global i32 0
@.str = [22 x i8] c"INVALID IMAGE NUMBER\0A\00"
@.str.1 = [34 x i8] c"RECONFIGURING FPGA WITH IMAGE %d\0A\00"
@CLOCK_REALTIME = global i32 0
@.str.2 = [29 x i8] c"FPGA not properly configured\00"
@.str.3 = [24 x i8] c"\09STX_FLASH PARAMETERS:\0A\00"
@.str.4 = [29 x i8] c"\09 FPGA configured properly\0A\00"
@.str.5 = [25 x i8] c"\09 GC314FS_SF_CSR=\090x%x\0A\00"
@.str.6 = [24 x i8] c"\09 FLASH VERSION=\090x%x\0A\00"
define i32 @_config_FPGA(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca %struct.timespec
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 0, i32* %10
%13 = load i32, i32* %8
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %4
store i32 0, i32* %11
br label %24
16: ; preds = %4
%17 = load i32, i32* %8
%18 = icmp eq i32 %17, 1
br i1 %18, label %19, label %20
19: ; preds = %16
store i32 2097152, i32* %11
br label %23
20: ; preds = %16
%21 = load i32, i32* @stderr
%22 = call i32 @fprintf(i32 %21, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %5
br label %100
23: ; preds = %19
br label %24
24: ; preds = %23, %15
%25 = load i32, i32* %7
%26 = icmp eq i32 %25, 1
br i1 %26, label %27, label %43
27: ; preds = %24
%28 = load i32, i32* %9
%29 = icmp eq i32 %28, 1
br i1 %29, label %30, label %33
30: ; preds = %27
%31 = load i32, i32* %8
%32 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0), i32 %31)
br label %33
33: ; preds = %30, %27
%34 = load i32, i32* %11
%35 = or i32 -2147483648, %34
%36 = load i8*, i8** %6
%37 = getelementptr inbounds i8, i8* %36, i64 4
%38 = bitcast i8* %37 to i32*
store i32 %35, i32* %38
%39 = getelementptr inbounds %struct.timespec, %struct.timespec* %12, i32 0, i32 0
store i32 1, i32* %39
%40 = getelementptr inbounds %struct.timespec, %struct.timespec* %12, i32 0, i32 1
store i64 0, i64* %40
%41 = load i32, i32* @CLOCK_REALTIME
%42 = call i32 @clock_nanosleep(i32 %41, i32 0, %struct.timespec* %12, i32 0)
br label %43
43: ; preds = %33, %24
%44 = load i8*, i8** %6
%45 = getelementptr inbounds i8, i8* %44, i64 0
%46 = bitcast i8* %45 to i32*
%47 = load i32, i32* %46
%48 = and i32 %47, 1
%49 = icmp eq i32 %48, 0
br i1 %49, label %50, label %53
50: ; preds = %43
%51 = load i32, i32* @stderr
%52 = call i32 @fprintf(i32 %51, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0))
store i32 -1, i32* %5
br label %100
53: ; preds = %43
%54 = load i8*, i8** %6
%55 = getelementptr inbounds i8, i8* %54, i64 0
%56 = bitcast i8* %55 to i32*
%57 = load i32, i32* %56
%58 = or i32 %57, 16
%59 = load i8*, i8** %6
%60 = getelementptr inbounds i8, i8* %59, i64 0
%61 = bitcast i8* %60 to i32*
store i32 %58, i32* %61
%62 = load i8*, i8** %6
%63 = getelementptr inbounds i8, i8* %62, i64 0
%64 = bitcast i8* %63 to i32*
%65 = load i32, i32* %64
%66 = or i32 %65, 32
%67 = load i8*, i8** %6
%68 = getelementptr inbounds i8, i8* %67, i64 0
%69 = bitcast i8* %68 to i32*
store i32 %66, i32* %69
%70 = load i8*, i8** %6
%71 = getelementptr inbounds i8, i8* %70, i64 0
%72 = bitcast i8* %71 to i32*
%73 = load i32, i32* %72
%74 = and i32 %73, 1
%75 = icmp eq i32 %74, 0
br i1 %75, label %76, label %79
76: ; preds = %53
%77 = load i32, i32* @stderr
%78 = call i32 @fprintf(i32 %77, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0))
store i32 1, i32* %10
store i32 -1, i32* %5
br label %100
79: ; preds = %53
%80 = load i32, i32* %9
%81 = icmp eq i32 %80, 1
br i1 %81, label %82, label %99
82: ; preds = %79
%83 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.3, i64 0, i64 0))
%84 = load i32, i32* %10
%85 = icmp eq i32 %84, 0
br i1 %85, label %86, label %88
86: ; preds = %82
%87 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.4, i64 0, i64 0))
br label %88
88: ; preds = %86, %82
%89 = load i8*, i8** %6
%90 = getelementptr inbounds i8, i8* %89, i64 0
%91 = bitcast i8* %90 to i32*
%92 = load i32, i32* %91
%93 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.5, i64 0, i64 0), i32 %92)
%94 = load i8*, i8** %6
%95 = getelementptr inbounds i8, i8* %94, i64 60
%96 = bitcast i8* %95 to i32*
%97 = load i32, i32* %96
%98 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.6, i64 0, i64 0), i32 %97)
br label %99
99: ; preds = %88, %79
store i32 1, i32* %5
br label %100
100: ; preds = %99, %76, %50, %20
%101 = load i32, i32* %5
ret i32 %101
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
@stderr = global i32 0
@.str = [22 x i8] c"INVALID IMAGE NUMBER\0A\00"
@.str.1 = [34 x i8] c"RECONFIGURING FPGA WITH IMAGE %d\0A\00"
@CLOCK_REALTIME = global i32 0
@.str.2 = [29 x i8] c"FPGA not properly configured\00"
@.str.5 = [25 x i8] c"\09 GC314FS_SF_CSR=\090x%x\0A\00"
@.str.6 = [24 x i8] c"\09 FLASH VERSION=\090x%x\0A\00"
@str = [23 x i8] c"\09STX_FLASH PARAMETERS:\00"
@str.7 = [28 x i8] c"\09 FPGA configured properly\00"
define i32 @_config_FPGA(i8* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %struct.timespec
%6 = bitcast %struct.timespec* %5 to i8*
switch i32 %2, label %8 [
i32 0, label %11
i32 1, label %7
]
7: ; preds = %4
br label %11
8: ; preds = %4
%9 = load i32, i32* @stderr
%10 = tail call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %45
11: ; preds = %4, %7
%12 = phi i32 [ -2145386496, %7 ], [ -2147483648, %4 ]
%13 = icmp eq i32 %1, 1
br i1 %13, label %14, label %25
14: ; preds = %11
%15 = icmp eq i32 %3, 1
br i1 %15, label %16, label %18
16: ; preds = %14
%17 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0), i32 %2)
br label %18
18: ; preds = %16, %14
%19 = getelementptr inbounds i8, i8* %0, i64 4
%20 = bitcast i8* %19 to i32*
store i32 %12, i32* %20
%21 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i64 0, i32 0
store i32 1, i32* %21
%22 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i64 0, i32 1
store i64 0, i64* %22
%23 = load i32, i32* @CLOCK_REALTIME
%24 = call i32 @clock_nanosleep(i32 %23, i32 0, %struct.timespec* %5, i32 0)
br label %25
25: ; preds = %18, %11
%26 = bitcast i8* %0 to i32*
%27 = load i32, i32* %26
%28 = and i32 %27, 1
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %33
30: ; preds = %25
%31 = load i32, i32* @stderr
%32 = call i32 @fprintf(i32 %31, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0))
br label %45
33: ; preds = %25
%34 = or i32 %27, 48
store i32 %34, i32* %26
%35 = icmp eq i32 %3, 1
br i1 %35, label %36, label %45
36: ; preds = %33
%37 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%38 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str.7, i64 0, i64 0))
%39 = load i32, i32* %26
%40 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str.5, i64 0, i64 0), i32 %39)
%41 = getelementptr inbounds i8, i8* %0, i64 60
%42 = bitcast i8* %41 to i32*
%43 = load i32, i32* %42
%44 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str.6, i64 0, i64 0), i32 %43)
br label %45
45: ; preds = %33, %36, %30, %8
%46 = phi i32 [ -1, %30 ], [ -1, %8 ], [ 1, %36 ], [ 1, %33 ]
ret i32 %46
}