xunge/DecIR huggingface dataset:
/* Variables and functions */
int __builtin_mips_cabs_olt_s(float, float);
int test4(float a, float b) { return __builtin_mips_cabs_olt_s(a, b); }


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__builtin_mips_cabs_olt_s@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
jmp    1030 <__builtin_mips_cabs_olt_s@plt>

LLVM IR (-O0):
define i32 @test4(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @__builtin_mips_cabs_olt_s(float %5, float %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test4(float %0, float %1) {
%3 = tail call i32 @__builtin_mips_cabs_olt_s(float %0, float %1)
ret i32 %3
}
void capturing2capturingNegahead_rv_endCapturing() {}


x86 assembly (clang, -O0):
<capturing2capturingNegahead_rv_endCapturing>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capturing2capturingNegahead_rv_endCapturing>:
ret

LLVM IR (-O0):
define void @capturing2capturingNegahead_rv_endCapturing() {
ret void
}

LLVM IR (-O2):
define void @capturing2capturingNegahead_rv_endCapturing() {
ret void
}
/* Variables and functions */
char *BG_Alloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *BG_StringAlloc(const char *source) {
  char *dest;
  dest = BG_Alloc(strlen(source) + 1);
  strcpy(dest, source);
  return dest;
}


x86 assembly (clang, -O0):
<BG_StringAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <BG_Alloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BG_StringAlloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <BG_Alloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @BG_StringAlloc(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @BG_Alloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @BG_StringAlloc(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @BG_Alloc(i64 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
/* Variables and functions */
int rbt_cmp_default(void *key1, void *key2) {
  if (((size_t)key1) == ((size_t)key2))
    return 0;
  return (((size_t)key1) < ((size_t)key2)) ? -1 : 1;
}


x86 assembly (clang, -O0):
<rbt_cmp_default>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
cmp    %rcx,%rax
jne    1129 <rbt_cmp_default+0x29>
movl   $0x0,-0x4(%rbp)
jmp    1144 <rbt_cmp_default+0x44>
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rsi
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    %rsi,%rdx
cmovb  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rbt_cmp_default>:
xor    %ecx,%ecx
xor    %eax,%eax
cmp    %rsi,%rdi
setae  %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @rbt_cmp_default(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = ptrtoint i8* %6 to i64
%8 = load i8*, i8** %5
%9 = ptrtoint i8* %8 to i64
%10 = icmp eq i64 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %20
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = ptrtoint i8* %13 to i64
%15 = load i8*, i8** %5
%16 = ptrtoint i8* %15 to i64
%17 = icmp ult i64 %14, %16
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 -1, i32 1
store i32 %19, i32* %3
br label %20
20: ; preds = %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @rbt_cmp_default(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = icmp ult i8* %0, %1
%5 = select i1 %4, i32 -1, i32 1
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int swap_quaddobl_slices(void) {
  double *c;
  int fail, *a, *b;
  fail = _ada_use_c2phc4c(666, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<swap_quaddobl_slices>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    $0x29a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_quaddobl_slices>:
mov    $0x29a,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @swap_quaddobl_slices() {
%1 = alloca double*
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32*
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = load double*, double** %1
%8 = call i32 @_ada_use_c2phc4c(i32 666, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %2
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @swap_quaddobl_slices() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 666, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMRB2_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMRB2_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRB2_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMRB2_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRB2_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
double log(int);
double rah(double ustar, double psih2, double psih01) {
  return ((log(2 / 0.1) - psih2 + psih01) / (ustar * 0.41));
}


x86 assembly (clang, -O0):
<rah>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
mov    $0x14,%edi
call   1030 <log@plt>
subsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  0xebd(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rah>:
sub    $0x18,%rsp
movsd  %xmm2,0x10(%rsp)
movsd  %xmm1,(%rsp)
movsd  %xmm0,0x8(%rsp)
mov    $0x14,%edi
call   1030 <log@plt>
subsd  (%rsp),%xmm0
addsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
mulsd  0xeb8(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @rah(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = call double @log(i32 20)
%8 = load double, double* %5
%9 = fsub double %7, %8
%10 = load double, double* %6
%11 = fadd double %9, %10
%12 = load double, double* %4
%13 = fmul double %12, 4.100000e-01
%14 = fdiv double %11, %13
ret double %14
}

LLVM IR (-O2):
define double @rah(double %0, double %1, double %2) {
%4 = tail call double @log(i32 20)
%5 = fsub double %4, %1
%6 = fadd double %5, %2
%7 = fmul double %0, 4.100000e-01
%8 = fdiv double %6, %7
ret double %8
}
int fun1255() { return 1255; }


x86 assembly (clang, -O0):
<fun1255>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4e7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1255>:
mov    $0x4e7,%eax
ret

LLVM IR (-O0):
define i32 @fun1255() {
ret i32 1255
}

LLVM IR (-O2):
define i32 @fun1255() {
ret i32 1255
}
void g_string_insert() {}


x86 assembly (clang, -O0):
<g_string_insert>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_string_insert>:
ret

LLVM IR (-O0):
define void @g_string_insert() {
ret void
}

LLVM IR (-O2):
define void @g_string_insert() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint;

/* Variables and functions */
uint umin(uint a, uint b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<umin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <umin+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umin+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umin>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @umin(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umin(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void print_epilog(FILE *out) {
  fprintf(out, "};\n"
               "}\n");
}


x86 assembly (clang, -O0):
<print_epilog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_epilog>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x5,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"};\0A}\0A\00"
define void @print_epilog(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"};\0A}\0A\00"
define void @print_epilog(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 5, i64 1, i32* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int send_event;
};
struct TYPE_4__ {
  TYPE_1__ xdestroywindow;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xdestroywindow_send_event(void *_p, int _v) {
  ((XEvent *)_p)->xdestroywindow.send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xdestroywindow_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xdestroywindow_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xdestroywindow_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xdestroywindow_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int absVal(int x) {
  int t = x >> 31;
  return (t + x) ^ t;
}


x86 assembly (clang, -O0):
<absVal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<absVal>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @absVal(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 31
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = add nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = xor i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @absVal(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Type definitions */
struct glob_f {
  int dummy;
};

/* Variables and functions */
char *_glio_malloc(struct glob_f *, int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *_glio_strdup(struct glob_f *glob_info, const char *str) {
  int size;
  char *c;
  size = strlen(str) + 1 + (0 + (sizeof(long long)) - 1);
  c = _glio_malloc(glob_info, size);
  if (c != NULL)
    strcpy(c, str);
  return (c);
}


x86 assembly (clang, -O0):
<_glio_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <strlen@plt>
add    $0x1,%eax
cltq
add    $0x7,%rax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <_glio_malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     117d <_glio_strdup+0x4d>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_glio_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1050 <strlen@plt>
lea    0x8(%rax),%esi
mov    %rbx,%rdi
call   1030 <_glio_malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1160 <_glio_strdup+0x30>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.glob_f = type { i32 }
define i8* @_glio_strdup(%struct.glob_f* %0, i8* %1) {
%3 = alloca %struct.glob_f*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store %struct.glob_f* %0, %struct.glob_f** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = add nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = add i64 %10, 7
%12 = trunc i64 %11 to i32
store i32 %12, i32* %5
%13 = load %struct.glob_f*, %struct.glob_f** %3
%14 = load i32, i32* %5
%15 = call i8* @_glio_malloc(%struct.glob_f* %13, i32 %14)
store i8* %15, i8** %6
%16 = load i8*, i8** %6
%17 = icmp ne i8* %16, null
br i1 %17, label %18, label %22
18: ; preds = %2
%19 = load i8*, i8** %6
%20 = load i8*, i8** %4
%21 = call i32 @strcpy(i8* %19, i8* %20)
br label %22
22: ; preds = %18, %2
%23 = load i8*, i8** %6
ret i8* %23
}

LLVM IR (-O2):
%struct.glob_f = type { i32 }
define i8* @_glio_strdup(%struct.glob_f* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = add i32 %3, 8
%5 = tail call i8* @_glio_malloc(%struct.glob_f* %0, i32 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @strcpy(i8* %5, i8* %1)
br label %9
9: ; preds = %7, %2
ret i8* %5
}
/* Variables and functions */
double myrandom(int);
int /*<<< orphan*/ printf(char *);
double random_uniform_real(int sn, double a, double b) {
  if (a > b)
    printf("uniform-real argument error: a > b");
  return (a + (b - a) * myrandom(sn));
}


x86 assembly (clang, -O0):
<random_uniform_real>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    1151 <random_uniform_real+0x31>
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <myrandom@plt>
movsd  -0x28(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_uniform_real>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
movsd  %xmm0,0x8(%rsp)
movsd  %xmm1,(%rsp)
ucomisd %xmm1,%xmm0
jbe    1144 <random_uniform_real+0x24>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
movsd  (%rsp),%xmm0
subsd  0x8(%rsp),%xmm0
movsd  %xmm0,(%rsp)
mov    %ebx,%edi
call   1040 <myrandom@plt>
mulsd  (%rsp),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"uniform-real argument error: a > b\00"
define double @random_uniform_real(i32 %0, double %1, double %2) {
%4 = alloca i32
%5 = alloca double
%6 = alloca double
store i32 %0, i32* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %6
%9 = fcmp ogt double %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %3
%13 = load double, double* %5
%14 = load double, double* %6
%15 = load double, double* %5
%16 = fsub double %14, %15
%17 = load i32, i32* %4
%18 = call double @myrandom(i32 %17)
%19 = call double @llvm.fmuladd.f64(double %16, double %18, double %13)
ret double %19
}

LLVM IR (-O2):
@.str = [35 x i8] c"uniform-real argument error: a > b\00"
define double @random_uniform_real(i32 %0, double %1, double %2) {
%4 = fcmp ogt double %1, %2
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %3
%8 = fsub double %2, %1
%9 = tail call double @myrandom(i32 %0)
%10 = tail call double @llvm.fmuladd.f64(double %8, double %9, double %1)
ret double %10
}
/* Type definitions */
struct expression {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ expr_cg_constant_expression(struct expression *, char *);
void expr_cg_sign_extend(struct expression *e) {
  expr_cg_constant_expression(e, "sext");
}


x86 assembly (clang, -O0):
<expr_cg_sign_extend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <expr_cg_constant_expression@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_cg_sign_extend>:
lea    0xee9(%rip),%rsi
jmp    1030 <expr_cg_constant_expression@plt>

LLVM IR (-O0):
%struct.expression = type { i32 }
@.str = [5 x i8] c"sext\00"
define void @expr_cg_sign_extend(%struct.expression* %0) {
%2 = alloca %struct.expression*
store %struct.expression* %0, %struct.expression** %2
%3 = load %struct.expression*, %struct.expression** %2
%4 = call i32 @expr_cg_constant_expression(%struct.expression* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.expression = type { i32 }
@.str = [5 x i8] c"sext\00"
define void @expr_cg_sign_extend(%struct.expression* %0) {
%2 = tail call i32 @expr_cg_constant_expression(%struct.expression* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void sig_SIGXCPU(int sig) { exit(0); }


x86 assembly (clang, -O0):
<sig_SIGXCPU>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<sig_SIGXCPU>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @sig_SIGXCPU(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @sig_SIGXCPU(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
int __aeabi_unwind_cpp_pr0(void) {
  do {
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<__aeabi_unwind_cpp_pr0>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__aeabi_unwind_cpp_pr0+0x9>
jmp    110e <__aeabi_unwind_cpp_pr0+0xe>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_unwind_cpp_pr0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__aeabi_unwind_cpp_pr0() {
br label %1
1: ; preds = %0
br label %2
2: ; preds = %1
ret i32 0
}

LLVM IR (-O2):
define i32 @__aeabi_unwind_cpp_pr0() {
ret i32 0
}
/* Variables and functions */
float RAND_MAX;
scalar_t__ rand();
float rand_float(float min, float max) {
  return min + (((float)rand() / (float)(RAND_MAX / (max - min))));
}


x86 assembly (clang, -O0):
<rand_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0xc(%rbp),%xmm0
cvtsi2ss %rax,%xmm1
mov    0x2ea4(%rip),%rax
movss  (%rax),%xmm2
movss  -0x8(%rbp),%xmm3
subss  -0x4(%rbp),%xmm3
divss  %xmm3,%xmm2
divss  %xmm2,%xmm1
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_float>:
push   %rax
movss  %xmm1,0x4(%rsp)
movss  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
mov    0x2eb6(%rip),%rax
movss  (%rax),%xmm1
movss  (%rsp),%xmm2
movss  0x4(%rsp),%xmm3
subss  %xmm2,%xmm3
divss  %xmm3,%xmm1
divss  %xmm1,%xmm0
addss  %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global float 0.000000e+00
define float @rand_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call i64 (...) @rand()
%7 = sitofp i64 %6 to float
%8 = load float, float* @RAND_MAX
%9 = load float, float* %4
%10 = load float, float* %3
%11 = fsub float %9, %10
%12 = fdiv float %8, %11
%13 = fdiv float %7, %12
%14 = fadd float %5, %13
ret float %14
}

LLVM IR (-O2):
@RAND_MAX = global float 0.000000e+00
define float @rand_float(float %0, float %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to float
%5 = load float, float* @RAND_MAX
%6 = fsub float %1, %0
%7 = fdiv float %5, %6
%8 = fdiv float %4, %7
%9 = fadd float %8, %0
ret float %9
}
__attribute__((always_)) void generic_apic_probe(void) {}


x86 assembly (clang, -O0):
<generic_apic_probe>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generic_apic_probe>:
ret

LLVM IR (-O0):
define void @generic_apic_probe() {
ret void
}

LLVM IR (-O2):
define void @generic_apic_probe() {
ret void
}
/* Variables and functions */
int dynamic_flips_per_assignment_per_mille();
int medium_agility(void) {
  return dynamic_flips_per_assignment_per_mille() >= 230;
}


x86 assembly (clang, -O0):
<medium_agility>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dynamic_flips_per_assignment_per_mille@plt>
cmp    $0xe6,%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<medium_agility>:
push   %rax
xor    %eax,%eax
call   1030 <dynamic_flips_per_assignment_per_mille@plt>
xor    %ecx,%ecx
cmp    $0xe6,%eax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @medium_agility() {
%1 = call i32 (...) @dynamic_flips_per_assignment_per_mille()
%2 = icmp sge i32 %1, 230
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @medium_agility() {
%1 = tail call i32 (...) @dynamic_flips_per_assignment_per_mille()
%2 = icmp sgt i32 %1, 229
%3 = zext i1 %2 to i32
ret i32 %3
}
void out1(x) {
  writeop(x);
  wrc(' ');
}


x86 assembly (clang, -O0):
<out1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1040 <writeop@plt>
mov    $0x20,%edi
mov    $0x0,%al
call   1030 <wrc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out1>:
push   %rax
xor    %eax,%eax
call   1040 <writeop@plt>
mov    $0x20,%edi
xor    %eax,%eax
pop    %rcx
jmp    1030 <wrc@plt>

LLVM IR (-O0):
define void @out1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @writeop to i32 (i32, ...)*)(i32 %3)
%5 = call i32 (i32, ...) bitcast (i32 (...)* @wrc to i32 (i32, ...)*)(i32 32)
ret void
}

LLVM IR (-O2):
define void @out1(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @writeop to i32 (i32, ...)*)(i32 %0)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @wrc to i32 (i32, ...)*)(i32 32)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ amaret_local_A1_set__E();
void pollen_hardware_Led_on__E() {
  { amaret_local_A1_set__E(); }
}


x86 assembly (clang, -O0):
<pollen_hardware_Led_on__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <amaret_local_A1_set__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_hardware_Led_on__E>:
xor    %eax,%eax
jmp    1030 <amaret_local_A1_set__E@plt>

LLVM IR (-O0):
define void @pollen_hardware_Led_on__E() {
%1 = call i32 (...) @amaret_local_A1_set__E()
ret void
}

LLVM IR (-O2):
define void @pollen_hardware_Led_on__E() {
%1 = tail call i32 (...) @amaret_local_A1_set__E()
ret void
}
/* Variables and functions */
void *malloc(unsigned int);
void *allocatePhysical(void *base_address, unsigned int byte_count) {
  return malloc(byte_count);
}


x86 assembly (clang, -O0):
<allocatePhysical>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocatePhysical>:
mov    %esi,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @allocatePhysical(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i8* @malloc(i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @allocatePhysical(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i8* @malloc(i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ passphrase_reenable_echo1(int /*<<< orphan*/);
void passphrase_reenable_echo(void) { passphrase_reenable_echo1(STDIN_FILENO); }


x86 assembly (clang, -O0):
<passphrase_reenable_echo>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <passphrase_reenable_echo1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<passphrase_reenable_echo>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <passphrase_reenable_echo1@plt>

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
define void @passphrase_reenable_echo() {
%1 = load i32, i32* @STDIN_FILENO
%2 = call i32 @passphrase_reenable_echo1(i32 %1)
ret void
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
define void @passphrase_reenable_echo() {
%1 = load i32, i32* @STDIN_FILENO
%2 = tail call i32 @passphrase_reenable_echo1(i32 %1)
ret void
}
void HardFault_Handler() {
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<HardFault_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <HardFault_Handler+0x9>
jmp    1109 <HardFault_Handler+0x9>

x86 assembly (clang, -O2):
<HardFault_Handler>:
jmp    1100 <HardFault_Handler>

LLVM IR (-O0):
define void @HardFault_Handler() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @HardFault_Handler() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t hash(const char *s) {
  uint64_t hash;
  hash = 0;
  while (*s) {
    hash = hash * 101 + (unsigned char)*s++;
  }
  return (hash);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113c <hash+0x3c>
imul   $0x65,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1124 <hash+0x24>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x65,%eax,%edx
movzbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 101
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = zext i8 %13 to i32
%15 = add nsw i32 %10, %14
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 101
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = zext i8 %5 to i32
%11 = add nsw i32 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ CONF;

/* Variables and functions */
scalar_t__ def_destroy_data(int /*<<< orphan*/ *);
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
int def_destroy(CONF *conf) {
  if (def_destroy_data(conf)) {
    free(conf);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<def_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <def_destroy_data@plt>
cmp    $0x0,%rax
je     1154 <def_destroy+0x34>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movl   $0x1,-0x4(%rbp)
jmp    115b <def_destroy+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<def_destroy>:
push   %rbx
mov    %rdi,%rbx
call   1040 <def_destroy_data@plt>
test   %rax,%rax
je     113d <def_destroy+0x1d>
mov    %rbx,%rdi
call   1030 <free@plt>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @def_destroy(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i64 @def_destroy_data(i32* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32*, i32** %3
%9 = call i32 @free(i32* %8)
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @def_destroy(i32* %0) {
%2 = tail call i64 @def_destroy_data(i32* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @free(i32* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
int main() {
  int a = 0;
  int b = 1;
  if (b > a)
    b += 3;
  else
    b -= 3;
  return b;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1133 <main+0x33>
mov    -0xc(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0xc(%rbp)
jmp    113c <main+0x3c>
mov    -0xc(%rbp),%eax
sub    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
%6 = icmp sgt i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 3
store i32 %9, i32* %3
br label %13
10: ; preds = %0
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 3
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %7
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
ret i32 4
}
/* Variables and functions */
int /*<<< orphan*/ LDY_();
int /*<<< orphan*/ c64_memAbsoluteAddrX();
void LDY_absx(void) {
  c64_memAbsoluteAddrX();
  LDY_();
}


x86 assembly (clang, -O0):
<LDY_absx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <c64_memAbsoluteAddrX@plt>
mov    $0x0,%al
call   1040 <LDY_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LDY_absx>:
push   %rax
xor    %eax,%eax
call   1030 <c64_memAbsoluteAddrX@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <LDY_@plt>

LLVM IR (-O0):
define void @LDY_absx() {
%1 = call i32 (...) @c64_memAbsoluteAddrX()
%2 = call i32 (...) @LDY_()
ret void
}

LLVM IR (-O2):
define void @LDY_absx() {
%1 = tail call i32 (...) @c64_memAbsoluteAddrX()
%2 = tail call i32 (...) @LDY_()
ret void
}
void copy_summary(int b[1000], int a[1000], int pos, int c[1000]) {
  b[pos] = 0;
  int d = a[pos];
}


x86 assembly (clang, -O0):
<copy_summary>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x24(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_summary>:
movslq %edx,%rax
movl   $0x0,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @copy_summary(i32* %0, i32* %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%10 = load i32*, i32** %5
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
store i32 0, i32* %13
%14 = load i32*, i32** %6
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
store i32 %18, i32* %9
ret void
}

LLVM IR (-O2):
define void @copy_summary(i32* nocapture writeonly %0, i32* nocapture readnone %1, i32 %2, i32* nocapture readnone %3) {
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 0, i32* %6
ret void
}
/* Variables and functions */
int Q_stricmpn(char const *, char const *, int);
int Q_stricmp(const char *s1, const char *s2) {
  return (s1 && s2) ? Q_stricmpn(s1, s2, 99999) : -1;
}


x86 assembly (clang, -O0):
<Q_stricmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1150 <Q_stricmp+0x40>
cmpq   $0x0,-0x10(%rbp)
je     1150 <Q_stricmp+0x40>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1869f,%edx
call   1030 <Q_stricmpn@plt>
mov    %eax,-0x14(%rbp)
jmp    115d <Q_stricmp+0x4d>
mov    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    115d <Q_stricmp+0x4d>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_stricmp>:
test   %rdi,%rdi
je     1124 <Q_stricmp+0x14>
test   %rsi,%rsi
je     1124 <Q_stricmp+0x14>
mov    $0x1869f,%edx
jmp    1030 <Q_stricmpn@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Q_stricmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i8*, i8** %3
%12 = load i8*, i8** %4
%13 = call i32 @Q_stricmpn(i8* %11, i8* %12, i32 99999)
br label %15
14: ; preds = %7, %2
br label %15
15: ; preds = %14, %10
%16 = phi i32 [ %13, %10 ], [ -1, %14 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @Q_stricmp(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @Q_stricmpn(i8* %0, i8* %1, i32 99999)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ -1, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ read(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stdin;
int main(int argc, char *argv[]) {
  char buffer[100];
  read(stdin, buffer, 99);
  printf("%s", buffer);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
lea    -0x80(%rbp),%rsi
mov    $0x63,%edx
call   1040 <read@plt>
lea    -0x80(%rbp),%rsi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rbx
mov    %rbx,%rsi
mov    $0x63,%edx
call   1040 <read@plt>
lea    0xebb(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [100 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* @stdin
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %6, i64 0, i64 0
%9 = call i32 @read(i32 %7, i8* %8, i32 99)
%10 = getelementptr inbounds [100 x i8], [100 x i8]* %6, i64 0, i64 0
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [100 x i8]
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i32 @read(i32 %5, i8* %4, i32 99)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__4__GeneralIO__set();
void CC2420ReceiveP__CSN__set(void) { Msp430GpioC__4__GeneralIO__set(); }


x86 assembly (clang, -O0):
<CC2420ReceiveP__CSN__set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__4__GeneralIO__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420ReceiveP__CSN__set>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__4__GeneralIO__set@plt>

LLVM IR (-O0):
define void @CC2420ReceiveP__CSN__set() {
%1 = call i32 (...) @Msp430GpioC__4__GeneralIO__set()
ret void
}

LLVM IR (-O2):
define void @CC2420ReceiveP__CSN__set() {
%1 = tail call i32 (...) @Msp430GpioC__4__GeneralIO__set()
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int tahoe_opmode_get_cfg(char *cfg) {
  if (strcmp(cfg, "ON") == 0) {
    return (1);
  } else if (strcmp(cfg, "OFF") == 0) {
    return (0);
  }
  return (-1);
}


x86 assembly (clang, -O0):
<tahoe_opmode_get_cfg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1142 <tahoe_opmode_get_cfg+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1174 <tahoe_opmode_get_cfg+0x64>
mov    -0x10(%rbp),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1168 <tahoe_opmode_get_cfg+0x58>
movl   $0x0,-0x4(%rbp)
jmp    1174 <tahoe_opmode_get_cfg+0x64>
jmp    116d <tahoe_opmode_get_cfg+0x5d>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tahoe_opmode_get_cfg>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     113b <tahoe_opmode_get_cfg+0x2b>
lea    0xed7(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
neg    %rax
sbb    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"ON\00"
@.str.1 = [4 x i8] c"OFF\00"
define i32 @tahoe_opmode_get_cfg(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %15
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strcmp(i8* %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %2
br label %15
13: ; preds = %8
br label %14
14: ; preds = %13
store i32 -1, i32* %2
br label %15
15: ; preds = %14, %12, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
@.str = [3 x i8] c"ON\00"
@.str.1 = [4 x i8] c"OFF\00"
define i32 @tahoe_opmode_get_cfg(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp ne i64 %5, 0
%7 = sext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
char *k_strupr(char *p) {
  char *s = p;
  for (; *s; ++s) {
    if ((*s >= 'a') && (*s <= 'z'))
      *s -= 'a' - 'A';
  }
  return p;
}


x86 assembly (clang, -O0):
<k_strupr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115f <k_strupr+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x61,%eax
jl     1149 <k_strupr+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7a,%eax
jg     1149 <k_strupr+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
sub    $0x20,%ecx
mov    %cl,(%rax)
jmp    114e <k_strupr+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <k_strupr+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_strupr>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     112c <k_strupr+0x2c>
lea    0x1(%rax),%rdx
jmp    111b <k_strupr+0x1b>
nop
movzbl (%rdx),%ecx
add    $0x1,%rdx
test   %cl,%cl
je     112c <k_strupr+0x2c>
lea    -0x61(%rcx),%esi
cmp    $0x19,%sil
ja     1110 <k_strupr+0x10>
add    $0xe0,%cl
mov    %cl,-0x1(%rdx)
jmp    1110 <k_strupr+0x10>
ret

LLVM IR (-O0):
define i8* @k_strupr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %26, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %25
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 122
br i1 %18, label %19, label %25
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = sub nsw i32 %22, 32
%24 = trunc i32 %23 to i8
store i8 %24, i8* %20
br label %25
25: ; preds = %19, %14, %9
br label %26
26: ; preds = %25
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %3
br label %5
29: ; preds = %5
%30 = load i8*, i8** %2
ret i8* %30
}

LLVM IR (-O2):
define i8* @k_strupr(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -97
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nsw i8 %5, -32
store i8 %10, i8* %6
br label %11
11: ; preds = %4, %9
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret i8* %0
}
int is_in_bound(int *arr, int size, int *ptr) {
  int i;
  for (i = 0; i < size; i++) {
    if (ptr == &arr[i])
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115d <is_in_bound+0x5d>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x24(%rbp),%rdx
shl    $0x2,%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
jne    114a <is_in_bound+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1164 <is_in_bound+0x64>
jmp    114f <is_in_bound+0x4f>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1116 <is_in_bound+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
xor    %eax,%eax
test   %esi,%esi
jle    111f <is_in_bound+0x1f>
mov    %esi,%ecx
add    $0xfffffffffffffffc,%rdi
nopl   0x0(%rax)
add    $0x4,%rdi
cmp    %rdx,%rdi
je     1120 <is_in_bound+0x20>
add    $0xffffffffffffffff,%rcx
jne    1110 <is_in_bound+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 0, i32* %8
br label %9
9: ; preds = %22, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = load i32*, i32** %7
%15 = load i32*, i32** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = icmp eq i32* %14, %18
br i1 %19, label %20, label %21
20: ; preds = %13
store i32 1, i32* %4
br label %26
21: ; preds = %13
br label %22
22: ; preds = %21
%23 = load i32, i32* %8
%24 = add nsw i32 %23, 1
store i32 %24, i32* %8
br label %9
25: ; preds = %9
store i32 0, i32* %4
br label %26
26: ; preds = %25, %20
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* readnone %0, i32 %1, i32* readnone %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %14
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %13, %6
br i1 %8, label %14, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %13, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = icmp eq i32* %11, %2
%13 = add nuw nsw i64 %10, 1
br i1 %12, label %14, label %7
14: ; preds = %9, %7, %3
%15 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %15
}
/* Variables and functions */
int strcmp(char const *, char const *);
int compare_fun(const void *p, const void *q) {
  const char *l = p;
  const char *r = q;
  int cmp;
  cmp = strcmp(l, r);
  return cmp;
}


x86 assembly (clang, -O0):
<compare_fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_fun>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare_fun(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
store i8* %8, i8** %5
%9 = load i8*, i8** %4
store i8* %9, i8** %6
%10 = load i8*, i8** %5
%11 = load i8*, i8** %6
%12 = call i32 @strcmp(i8* %10, i8* %11)
store i32 %12, i32* %7
%13 = load i32, i32* %7
ret i32 %13
}

LLVM IR (-O2):
define i32 @compare_fun(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void g(int x, int *p) { *p = x; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @g(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @g(i32 %0, i32* nocapture writeonly %1) {
store i32 %0, i32* %1
ret void
}