xunge/DecIR huggingface dataset:
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
char *dirname(char *);
int mkdir(char *, int);
int stat(char *, struct stat *);
char *strdup(char *);
int create_path(char *filename) {
  char *path;
  char *cfilename;
  struct stat st;
  cfilename = strdup(filename);
  path = dirname(cfilename);
  if (stat(path, &st) == -1) {
    return mkdir(path, 0700);
  }
  return 0;
}


x86 assembly (clang, -O0):
<create_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1060 <strdup@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <dirname@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1050 <stat@plt>
cmp    $0xffffffff,%eax
jne    1192 <create_path+0x52>
mov    -0x18(%rbp),%rdi
mov    $0x1c0,%esi
call   1030 <mkdir@plt>
mov    %eax,-0x4(%rbp)
jmp    1199 <create_path+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_path>:
push   %rbx
sub    $0x10,%rsp
call   1060 <strdup@plt>
mov    %rax,%rdi
call   1040 <dirname@plt>
mov    %rax,%rbx
lea    0x8(%rsp),%rsi
mov    %rax,%rdi
call   1050 <stat@plt>
cmp    $0xffffffff,%eax
je     116f <create_path+0x2f>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret
mov    %rbx,%rdi
mov    $0x1c0,%esi
add    $0x10,%rsp
pop    %rbx
jmp    1030 <mkdir@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @create_path(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct.stat
store i8* %0, i8** %3
%7 = load i8*, i8** %3
%8 = call i8* @strdup(i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i8* @dirname(i8* %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @stat(i8* %11, %struct.stat* %6)
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %17
14: ; preds = %1
%15 = load i8*, i8** %4
%16 = call i32 @mkdir(i8* %15, i32 448)
store i32 %16, i32* %2
br label %18
17: ; preds = %1
store i32 0, i32* %2
br label %18
18: ; preds = %17, %14
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @create_path(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = tail call i8* @strdup(i8* %0)
%5 = tail call i8* @dirname(i8* %4)
%6 = call i32 @stat(i8* %5, %struct.stat* %2)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = tail call i32 @mkdir(i8* %5, i32 448)
br label %10
10: ; preds = %1, %8
%11 = phi i32 [ %9, %8 ], [ 0, %1 ]
ret i32 %11
}
/* Variables and functions */
int ucnv_compareNames(char const *, char const *);
int __hs_ucnv_compareNames(const char *name1, const char *name2) {
  return ucnv_compareNames(name1, name2);
}


x86 assembly (clang, -O0):
<__hs_ucnv_compareNames>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ucnv_compareNames@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hs_ucnv_compareNames>:
jmp    1030 <ucnv_compareNames@plt>

LLVM IR (-O0):
define i32 @__hs_ucnv_compareNames(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @ucnv_compareNames(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @__hs_ucnv_compareNames(i8* %0, i8* %1) {
%3 = tail call i32 @ucnv_compareNames(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void TimerPrescaleSet(uint32_t ui32Base, uint32_t ui32Timer,
                      uint32_t ui32Value) {
  ;

  ;
  ;
  if (ui32Timer & 0x000000ff) {
    (*((volatile unsigned long *)(ui32Base + 0x00000038))) = ui32Value;
  }
  if (ui32Timer & 0x0000ff00) {
    (*((volatile unsigned long *)(ui32Base + 0x0000003C))) = ui32Value;
  }
}


x86 assembly (clang, -O0):
<TimerPrescaleSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
cmp    $0x0,%eax
je     112d <TimerPrescaleSet+0x2d>
movslq -0xc(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    $0x38,%eax
cltq
mov    %rcx,(%rax)
mov    -0x8(%rbp),%eax
and    $0xff00,%eax
cmp    $0x0,%eax
je     114d <TimerPrescaleSet+0x4d>
movslq -0xc(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    $0x3c,%eax
cltq
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerPrescaleSet>:
movslq %edx,%rax
movslq %edi,%rcx
test   %sil,%sil
je     110f <TimerPrescaleSet+0xf>
mov    %rax,0x38(%rcx)
test   $0xff00,%esi
je     111b <TimerPrescaleSet+0x1b>
mov    %rax,0x3c(%rcx)
ret

LLVM IR (-O0):
define void @TimerPrescaleSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = and i32 %7, 255
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 56
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i64*
store volatile i64 %12, i64* %16
br label %17
17: ; preds = %10, %3
%18 = load i32, i32* %5
%19 = and i32 %18, 65280
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %28
21: ; preds = %17
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 60
%26 = sext i32 %25 to i64
%27 = inttoptr i64 %26 to i64*
store volatile i64 %23, i64* %27
br label %28
28: ; preds = %21, %17
ret void
}

LLVM IR (-O2):
define void @TimerPrescaleSet(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, 255
%5 = icmp eq i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %3
%7 = sext i32 %2 to i64
%8 = add nsw i32 %0, 56
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i64*
store volatile i64 %7, i64* %10
br label %11
11: ; preds = %6, %3
%12 = and i32 %1, 65280
%13 = icmp eq i32 %12, 0
br i1 %13, label %19, label %14
14: ; preds = %11
%15 = sext i32 %2 to i64
%16 = add nsw i32 %0, 60
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i64*
store volatile i64 %15, i64* %18
br label %19
19: ; preds = %14, %11
ret void
}
int sqr(const int x) { return (x * x); }


x86 assembly (clang, -O0):
<sqr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqr>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @sqr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sqr(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(int *, int *, int);
void copy2(int *x, int *y) { memcpy(x, y, 2); }


x86 assembly (clang, -O0):
<copy2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x2,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy2>:
mov    $0x2,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @copy2(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @memcpy(i32* %5, i32* %6, i32 2)
ret void
}

LLVM IR (-O2):
define void @copy2(i32* %0, i32* %1) {
%3 = tail call i32 @memcpy(i32* %0, i32* %1, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dlg_exit(int);
int /*<<< orphan*/ end_dialog();
void finish_bg(int sig) {
  end_dialog();
  dlg_exit(-1);
}


x86 assembly (clang, -O0):
<finish_bg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <end_dialog@plt>
mov    $0xffffffff,%edi
call   1030 <dlg_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<finish_bg>:
push   %rax
xor    %eax,%eax
call   1040 <end_dialog@plt>
mov    $0xffffffff,%edi
pop    %rax
jmp    1030 <dlg_exit@plt>

LLVM IR (-O0):
define void @finish_bg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @end_dialog()
%4 = call i32 @dlg_exit(i32 -1)
ret void
}

LLVM IR (-O2):
define void @finish_bg(i32 %0) {
%2 = tail call i32 (...) @end_dialog()
%3 = tail call i32 @dlg_exit(i32 -1)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void SHAMD5DMAEnable(uint32_t ui32Base) {
  ASSERT(ui32Base == 0x44034000);
  (*((volatile uint32_t *)(ui32Base + 0x00000110))) |= 0x00000080 | 0x00000008;
}


x86 assembly (clang, -O0):
<SHAMD5DMAEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x44034000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x110,%eax
cltq
mov    (%rax),%ecx
or     $0x88,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5DMAEnable>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x44034000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
orl    $0x88,0x110(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @SHAMD5DMAEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1141063680
%5 = zext i1 %4 to i32
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 272
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %11, 136
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @SHAMD5DMAEnable(i32 %0) {
%2 = icmp eq i32 %0, 1141063680
%3 = zext i1 %2 to i32
%4 = tail call i32 @ASSERT(i32 %3)
%5 = add nsw i32 %0, 272
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = or i32 %8, 136
store volatile i32 %9, i32* %7
ret void
}
void right(void) {}


x86 assembly (clang, -O0):
<right>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<right>:
ret

LLVM IR (-O0):
define void @right() {
ret void
}

LLVM IR (-O2):
define void @right() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Unlink_tempfiles();
void Remove_tempfiles(void) { Unlink_tempfiles(); }


x86 assembly (clang, -O0):
<Remove_tempfiles>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Unlink_tempfiles@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Remove_tempfiles>:
xor    %eax,%eax
jmp    1030 <Unlink_tempfiles@plt>

LLVM IR (-O0):
define void @Remove_tempfiles() {
%1 = call i32 (...) @Unlink_tempfiles()
ret void
}

LLVM IR (-O2):
define void @Remove_tempfiles() {
%1 = tail call i32 (...) @Unlink_tempfiles()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void fh_print_version() { printf("%s\n", "0.7.0"); }


x86 assembly (clang, -O0):
<fh_print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fh_print_version>:
lea    0xee9(%rip),%rdi
lea    0xee6(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [6 x i8] c"0.7.0\00"
define void @fh_print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [6 x i8] c"0.7.0\00"
define void @fh_print_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_1Buint32_mem(unsigned int *val) {
  return ((*val) & (0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x1b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint32_mem>:
testb  $0x1b,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 27
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Buint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 27
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
__attribute__((always_)) void set_numa_mem(int node) {}


x86 assembly (clang, -O0):
<set_numa_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_numa_mem>:
ret

LLVM IR (-O0):
define void @set_numa_mem(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @set_numa_mem(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ close(int);
scalar_t__ errno;
int restart_close(int fd) {
  while (close(fd) < 0) {
    if (errno != EINTR)
      return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<restart_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
cmp    $0x0,%rax
jge    1158 <restart_close+0x48>
mov    0x2eac(%rip),%rax
mov    (%rax),%rax
mov    0x2e9a(%rip),%rcx
cmp    (%rcx),%rax
je     1153 <restart_close+0x43>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <restart_close+0x4f>
jmp    111b <restart_close+0xb>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<restart_close>:
push   %r15
push   %r14
push   %rbx
mov    %edi,%ebx
mov    0x2ec2(%rip),%r14
mov    0x2eb3(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ebx,%edi
call   1030 <close@plt>
test   %rax,%rax
jns    114b <restart_close+0x3b>
mov    (%r14),%rax
cmp    (%r15),%rax
je     1130 <restart_close+0x20>
mov    $0xffffffff,%eax
jmp    114d <restart_close+0x3d>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @restart_close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i32, i32* %3
%6 = call i64 @close(i32 %5)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i64, i64* @errno
%10 = load i64, i64* @EINTR
%11 = icmp ne i64 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 -1, i32* %2
br label %15
13: ; preds = %8
br label %4
14: ; preds = %4
store i32 0, i32* %2
br label %15
15: ; preds = %14, %12
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @restart_close(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = tail call i64 @close(i32 %0)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i64, i64* @errno
%7 = load i64, i64* @EINTR
%8 = icmp eq i64 %6, %7
br i1 %8, label %2, label %9
9: ; preds = %2, %5
%10 = phi i32 [ -1, %5 ], [ 0, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ baz(int, int, void *);
void testTortureExecute(void) {
  baz(10, 11, (void *)12);
  return;
}


x86 assembly (clang, -O0):
<testTortureExecute>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
mov    $0xb,%esi
mov    $0xc,%edx
call   1030 <baz@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testTortureExecute>:
mov    $0xc,%edx
mov    $0xa,%edi
mov    $0xb,%esi
jmp    1030 <baz@plt>

LLVM IR (-O0):
define void @testTortureExecute() {
%1 = call i32 @baz(i32 10, i32 11, i8* inttoptr (i64 12 to i8*))
ret void
}

LLVM IR (-O2):
define void @testTortureExecute() {
%1 = tail call i32 @baz(i32 10, i32 11, i8* inttoptr (i64 12 to i8*))
ret void
}
int cmp(const void *k1, const void *k2) {
  int a = *((int *)k1);
  int b = *((int *)k2);
  if (a < b)
    return -1;
  else if (a > b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    1136 <cmp+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <cmp+0x55>
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jle    114e <cmp+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1155 <cmp+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
store i32 %13, i32* %7
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = icmp sgt i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = icmp sgt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Type definitions */
struct mallinfo {
  int dummy;
};
typedef int /*<<< orphan*/ info;

/* Variables and functions */
int /*<<< orphan*/ memset(struct mallinfo *, int /*<<< orphan*/, int);
struct mallinfo mallinfo(void) {
  struct mallinfo info;
  memset(&info, 0, sizeof(info));
  return info;
}


x86 assembly (clang, -O0):
<mallinfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallinfo>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.mallinfo = type { i32 }
define i32 @mallinfo() {
%1 = alloca %struct.mallinfo
%2 = call i32 @memset(%struct.mallinfo* %1, i32 0, i32 4)
%3 = getelementptr inbounds %struct.mallinfo, %struct.mallinfo* %1, i32 0, i32 0
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.mallinfo = type { i32 }
define i32 @mallinfo() {
%1 = alloca %struct.mallinfo
%2 = call i32 @memset(%struct.mallinfo* %1, i32 0, i32 4)
%3 = getelementptr inbounds %struct.mallinfo, %struct.mallinfo* %1, i64 0, i32 0
%4 = load i32, i32* %3
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t bp__compute_hash(uint32_t key) {
  uint32_t hash = key;
  hash = ~hash + (hash << 15);
  hash = hash ^ (hash >> 12);
  hash = hash + (hash << 2);
  hash = hash ^ (hash >> 4);
  hash = hash * 2057;
  hash = hash ^ (hash >> 16);
  return hash;
}


x86 assembly (clang, -O0):
<bp__compute_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x8(%rbp),%ecx
shl    $0xf,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0xc,%ecx
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x2,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x4,%ecx
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
imul   $0x809,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x10,%ecx
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bp__compute_hash>:
mov    %edi,%eax
not    %eax
shl    $0xf,%edi
add    %eax,%edi
mov    %edi,%eax
sar    $0xc,%eax
xor    %edi,%eax
lea    (%rax,%rax,4),%eax
mov    %eax,%ecx
sar    $0x4,%ecx
xor    %eax,%ecx
imul   $0x809,%ecx,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @bp__compute_hash(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = xor i32 %5, -1
%7 = load i32, i32* %3
%8 = shl i32 %7, 15
%9 = add nsw i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = load i32, i32* %3
%12 = ashr i32 %11, 12
%13 = xor i32 %10, %12
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = load i32, i32* %3
%16 = shl i32 %15, 2
%17 = add nsw i32 %14, %16
store i32 %17, i32* %3
%18 = load i32, i32* %3
%19 = load i32, i32* %3
%20 = ashr i32 %19, 4
%21 = xor i32 %18, %20
store i32 %21, i32* %3
%22 = load i32, i32* %3
%23 = mul nsw i32 %22, 2057
store i32 %23, i32* %3
%24 = load i32, i32* %3
%25 = load i32, i32* %3
%26 = ashr i32 %25, 16
%27 = xor i32 %24, %26
store i32 %27, i32* %3
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @bp__compute_hash(i32 %0) {
%2 = xor i32 %0, -1
%3 = shl i32 %0, 15
%4 = add nsw i32 %3, %2
%5 = ashr i32 %4, 12
%6 = xor i32 %5, %4
%7 = mul i32 %6, 5
%8 = ashr i32 %7, 4
%9 = xor i32 %8, %7
%10 = mul nsw i32 %9, 2057
%11 = ashr i32 %10, 16
%12 = xor i32 %11, %10
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t net_addr_finalize(void *self) { return 0; }


x86 assembly (clang, -O0):
<net_addr_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_addr_finalize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @net_addr_finalize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @net_addr_finalize(i8* nocapture readnone %0) {
ret i32 0
}
foo(a, p) int *p;
{
  p[0] = a;
  a = (short)a;
  return a;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
cwtl
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,(%rsi)
movswl %di,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load i32, i32* %3
%9 = trunc i32 %8 to i16
%10 = sext i16 %9 to i32
store i32 %10, i32* %3
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32* nocapture writeonly %1) {
store i32 %0, i32* %1
%3 = shl i32 %0, 16
%4 = ashr exact i32 %3, 16
ret i32 %4
}
void copy_to_vram(unsigned int adr, const unsigned char *src,
                  unsigned int size) {
  *((unsigned short *)0x2116) = (adr);
  ;
  *((unsigned short *)(0x4300 | ((7) << 4))) = (0x1801);
  ;
  *((void **)(0x4302 | ((7) << 4))) = ((unsigned char *)src);
  ;
  *((unsigned short *)(0x4305 | ((7) << 4))) = (size);
  ;
  *((unsigned char *)0x420b) = (1 << 7);
  ;
}


x86 assembly (clang, -O0):
<copy_to_vram>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %ax,%cx
mov    $0x2116,%eax
mov    %cx,(%rax)
mov    $0x4370,%eax
movw   $0x1801,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x4372,%eax
mov    %rcx,(%rax)
mov    -0x14(%rbp),%eax
mov    %ax,%cx
mov    $0x4375,%eax
mov    %cx,(%rax)
mov    $0x420b,%eax
movb   $0x80,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_to_vram>:
mov    %di,0x2116
movw   $0x1801,0x4370
mov    %rsi,0x4372
mov    %dx,0x4375
movb   $0x80,0x420b
80
ret

LLVM IR (-O0):
define void @copy_to_vram(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = trunc i32 %7 to i16
store i16 %8, i16* inttoptr (i64 8470 to i16*)
store i16 6145, i16* inttoptr (i64 17264 to i16*)
%9 = load i8*, i8** %5
store i8* %9, i8** inttoptr (i64 17266 to i8**)
%10 = load i32, i32* %6
%11 = trunc i32 %10 to i16
store i16 %11, i16* inttoptr (i64 17269 to i16*)
store i8 -128, i8* inttoptr (i64 16907 to i8*)
ret void
}

LLVM IR (-O2):
define void @copy_to_vram(i32 %0, i8* %1, i32 %2) {
%4 = trunc i32 %0 to i16
store i16 %4, i16* inttoptr (i64 8470 to i16*)
store i16 6145, i16* inttoptr (i64 17264 to i16*)
store i8* %1, i8** inttoptr (i64 17266 to i8**)
%5 = trunc i32 %2 to i16
store i16 %5, i16* inttoptr (i64 17269 to i16*)
store i8 -128, i8* inttoptr (i64 16907 to i8*)
ret void
}
/* Type definitions */
struct membuffer {
  int dummy;
};

/* Variables and functions */
char *detach_buffer(struct membuffer *);
int /*<<< orphan*/ mb_cstring(struct membuffer *);
char *detach_cstring(struct membuffer *b) {
  mb_cstring(b);
  return detach_buffer(b);
}


x86 assembly (clang, -O0):
<detach_cstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mb_cstring@plt>
mov    -0x8(%rbp),%rdi
call   1030 <detach_buffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<detach_cstring>:
push   %rbx
mov    %rdi,%rbx
call   1040 <mb_cstring@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <detach_buffer@plt>

LLVM IR (-O0):
%struct.membuffer = type { i32 }
define i8* @detach_cstring(%struct.membuffer* %0) {
%2 = alloca %struct.membuffer*
store %struct.membuffer* %0, %struct.membuffer** %2
%3 = load %struct.membuffer*, %struct.membuffer** %2
%4 = call i32 @mb_cstring(%struct.membuffer* %3)
%5 = load %struct.membuffer*, %struct.membuffer** %2
%6 = call i8* @detach_buffer(%struct.membuffer* %5)
ret i8* %6
}

LLVM IR (-O2):
%struct.membuffer = type { i32 }
define i8* @detach_cstring(%struct.membuffer* %0) {
%2 = tail call i32 @mb_cstring(%struct.membuffer* %0)
%3 = tail call i8* @detach_buffer(%struct.membuffer* %0)
ret i8* %3
}
/* Variables and functions */
double atan(double);
double atan_wrapper(double *arg_list) { return (atan(arg_list[0])); }


x86 assembly (clang, -O0):
<atan_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <atan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan_wrapper>:
movsd  (%rdi),%xmm0
jmp    1030 <atan@plt>

LLVM IR (-O0):
define double @atan_wrapper(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = call double @atan(double %5)
ret double %6
}

LLVM IR (-O2):
define double @atan_wrapper(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @atan(double %2)
ret double %3
}
/* Variables and functions */
size_t json_parse_nested_struct(char const *, char, char, char *, size_t);
size_t json_parse_nested_object(const char *str, char *buf, size_t size) {
  return json_parse_nested_struct(str, '{', '}', buf, size);
}


x86 assembly (clang, -O0):
<json_parse_nested_object>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    $0x7b,%esi
mov    $0x7d,%edx
call   1030 <json_parse_nested_struct@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_parse_nested_object>:
mov    %rdx,%r8
mov    %rsi,%rcx
mov    $0x7b,%esi
mov    $0x7d,%edx
jmp    1030 <json_parse_nested_struct@plt>

LLVM IR (-O0):
define i64 @json_parse_nested_object(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @json_parse_nested_struct(i8* %7, i8 signext 123, i8 signext 125, i8* %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @json_parse_nested_object(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @json_parse_nested_struct(i8* %0, i8 signext 123, i8 signext 125, i8* %1, i64 %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void prool_version() {
  printf(
      "Built by Prool %s %s proolix@gmail.com\nhttp://calculixforwin.com\nUse "
      "PROOL command in CGX main window for additional info\n",
      "Mar 18 2022", "23:27:19");
}


x86 assembly (clang, -O0):
<prool_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf59(%rip),%rsi
lea    0xf5e(%rip),%rdx
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<prool_version>:
lea    0xee9(%rip),%rdi
lea    0xf5d(%rip),%rsi
lea    0xf62(%rip),%rdx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [123 x i8] c"Built by Prool %s %s proolix@gmail.com\0Ahttp://calculixforwin.com\0AUse PROOL command in CGX main window for additional info\0A\00"
@.str.1 = [12 x i8] c"Mar 18 2022\00"
@.str.2 = [9 x i8] c"23:27:19\00"
define void @prool_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([123 x i8], [123 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [123 x i8] c"Built by Prool %s %s proolix@gmail.com\0Ahttp://calculixforwin.com\0AUse PROOL command in CGX main window for additional info\0A\00"
@.str.1 = [12 x i8] c"Mar 18 2022\00"
@.str.2 = [9 x i8] c"23:27:19\00"
define void @prool_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([123 x i8], [123 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int cnss_logger_nl_ucast(struct sk_buff *skb, int portid, int flag) {
  return 0;
}


x86 assembly (clang, -O0):
<cnss_logger_nl_ucast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnss_logger_nl_ucast>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sk_buff = type opaque
define i32 @cnss_logger_nl_ucast(%struct.sk_buff* %0, i32 %1, i32 %2) {
%4 = alloca %struct.sk_buff*
%5 = alloca i32
%6 = alloca i32
store %struct.sk_buff* %0, %struct.sk_buff** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.sk_buff = type opaque
define i32 @cnss_logger_nl_ucast(%struct.sk_buff* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
void set_black(char *p) { *p |= (1 << 6); }


x86 assembly (clang, -O0):
<set_black>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
or     $0x40,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_black>:
orb    $0x40,(%rdi)
ret

LLVM IR (-O0):
define void @set_black(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = or i32 %5, 64
%7 = trunc i32 %6 to i8
store i8 %7, i8* %3
ret void
}

LLVM IR (-O2):
define void @set_black(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = or i8 %2, 64
store i8 %3, i8* %0
ret void
}
/* Type definitions */
struct yamc_sub_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_args(struct yamc_sub_args_info *);
int /*<<< orphan*/ clear_given(struct yamc_sub_args_info *);
int /*<<< orphan*/ init_args_info(struct yamc_sub_args_info *);
void yamc_sub_cmd_parser_init(struct yamc_sub_args_info *args_info) {
  clear_given(args_info);
  clear_args(args_info);
  init_args_info(args_info);
}


x86 assembly (clang, -O0):
<yamc_sub_cmd_parser_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <clear_given@plt>
mov    -0x8(%rbp),%rdi
call   1030 <clear_args@plt>
mov    -0x8(%rbp),%rdi
call   1050 <init_args_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yamc_sub_cmd_parser_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <clear_given@plt>
mov    %rbx,%rdi
call   1030 <clear_args@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <init_args_info@plt>

LLVM IR (-O0):
%struct.yamc_sub_args_info = type { i32 }
define void @yamc_sub_cmd_parser_init(%struct.yamc_sub_args_info* %0) {
%2 = alloca %struct.yamc_sub_args_info*
store %struct.yamc_sub_args_info* %0, %struct.yamc_sub_args_info** %2
%3 = load %struct.yamc_sub_args_info*, %struct.yamc_sub_args_info** %2
%4 = call i32 @clear_given(%struct.yamc_sub_args_info* %3)
%5 = load %struct.yamc_sub_args_info*, %struct.yamc_sub_args_info** %2
%6 = call i32 @clear_args(%struct.yamc_sub_args_info* %5)
%7 = load %struct.yamc_sub_args_info*, %struct.yamc_sub_args_info** %2
%8 = call i32 @init_args_info(%struct.yamc_sub_args_info* %7)
ret void
}

LLVM IR (-O2):
%struct.yamc_sub_args_info = type { i32 }
define void @yamc_sub_cmd_parser_init(%struct.yamc_sub_args_info* %0) {
%2 = tail call i32 @clear_given(%struct.yamc_sub_args_info* %0)
%3 = tail call i32 @clear_args(%struct.yamc_sub_args_info* %0)
%4 = tail call i32 @init_args_info(%struct.yamc_sub_args_info* %0)
ret void
}
float f(float x) { return x / 2; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 2.000000e+00
ret float %4
}

LLVM IR (-O2):
define float @f(float %0) {
%2 = fmul float %0, 5.000000e-01
ret float %2
}
int event_add(struct event *x, const struct timeval *tv) {
  (void)x;
  (void)tv;
  return 0;
}


x86 assembly (clang, -O0):
<event_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.event = type opaque
%struct.timeval = type opaque
define i32 @event_add(%struct.event* %0, %struct.timeval* %1) {
%3 = alloca %struct.event*
%4 = alloca %struct.timeval*
store %struct.event* %0, %struct.event** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.event*, %struct.event** %3
%6 = load %struct.timeval*, %struct.timeval** %4
ret i32 0
}

LLVM IR (-O2):
%struct.event = type opaque
%struct.timeval = type opaque
define i32 @event_add(%struct.event* nocapture readnone %0, %struct.timeval* nocapture readnone %1) {
ret i32 0
}
long SG_ResidentSetSize(void) { return 0; }


x86 assembly (clang, -O0):
<SG_ResidentSetSize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SG_ResidentSetSize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @SG_ResidentSetSize() {
ret i64 0
}

LLVM IR (-O2):
define i64 @SG_ResidentSetSize() {
ret i64 0
}
unsigned char lookupb(unsigned char *p, int n) { return p[n]; }


x86 assembly (clang, -O0):
<lookupb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookupb>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%al
ret

LLVM IR (-O0):
define zeroext i8 @lookupb(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @lookupb(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
ret i8 %5
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_disable_blockprotect_bp2_srwd(struct flashrom_flashctx *);
int spi_disable_blockprotect_bp2_ep_srwd(struct flashrom_flashctx *flash) {
  return spi_disable_blockprotect_bp2_srwd(flash);
}


x86 assembly (clang, -O0):
<spi_disable_blockprotect_bp2_ep_srwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <spi_disable_blockprotect_bp2_srwd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_disable_blockprotect_bp2_ep_srwd>:
jmp    1030 <spi_disable_blockprotect_bp2_srwd@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_disable_blockprotect_bp2_ep_srwd(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @spi_disable_blockprotect_bp2_srwd(%struct.flashrom_flashctx* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_disable_blockprotect_bp2_ep_srwd(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @spi_disable_blockprotect_bp2_srwd(%struct.flashrom_flashctx* %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
uint8_t ses_config_num_sub_enclosures(uint8_t *data) { return data[1] + 1; }


x86 assembly (clang, -O0):
<ses_config_num_sub_enclosures>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ses_config_num_sub_enclosures>:
mov    0x8(%rdi),%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @ses_config_num_sub_enclosures(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 1
%5 = load i64, i64* %4
%6 = add nsw i64 %5, 1
ret i64 %6
}

LLVM IR (-O2):
define i64 @ses_config_num_sub_enclosures(i64* nocapture %0) {
%2 = getelementptr inbounds i64, i64* %0, i64 1
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1
ret i64 %4
}
int fib(int n) {
  if (n <= 2)
    return 1;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fib+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x4,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fib(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
int parse_args(int argc, char *argv[]) { return 0; }


x86 assembly (clang, -O0):
<parse_args>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_args>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @parse_args(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @parse_args(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
struct bigint {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct bigint *);
void bigint_array_delete(struct bigint *arr) { free(arr); }


x86 assembly (clang, -O0):
<bigint_array_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bigint_array_delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.bigint = type { i32 }
define void @bigint_array_delete(%struct.bigint* %0) {
%2 = alloca %struct.bigint*
store %struct.bigint* %0, %struct.bigint** %2
%3 = load %struct.bigint*, %struct.bigint** %2
%4 = call i32 @free(%struct.bigint* %3)
ret void
}

LLVM IR (-O2):
%struct.bigint = type { i32 }
define void @bigint_array_delete(%struct.bigint* nocapture %0) {
%2 = tail call i32 @free(%struct.bigint* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, double);
int /*<<< orphan*/ vis5d_debug_msg2(char *, char *);
double vis5d_time_usec(double);
int vis5d_time_msg(double usec_beg, char *str1, char *str2) {
  double usec;
  char str3[256];
  usec = vis5d_time_usec(usec_beg);
  sprintf(str3, "%s time: %.0lf usec", str2, usec);
  vis5d_debug_msg2(str1, str3);
  return 1;
}


x86 assembly (clang, -O0):
<vis5d_time_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <vis5d_time_usec@plt>
movsd  %xmm0,-0x20(%rbp)
lea    -0x120(%rbp),%rdi
mov    -0x18(%rbp),%rdx
movsd  -0x20(%rbp),%xmm0
lea    0xe92(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x10(%rbp),%rdi
lea    -0x120(%rbp),%rsi
call   1050 <vis5d_debug_msg2@plt>
mov    $0x1,%eax
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vis5d_time_msg>:
push   %r15
push   %r14
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%rbx
mov    %rdi,%r14
call   1030 <vis5d_time_usec@plt>
lea    0xeb2(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdi
mov    %rbx,%rdx
call   1040 <sprintf@plt>
mov    %r14,%rdi
mov    %r15,%rsi
call   1050 <vis5d_debug_msg2@plt>
mov    $0x1,%eax
add    $0x100,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [20 x i8] c"%s time: %.0lf usec\00"
define i32 @vis5d_time_msg(double %0, i8* %1, i8* %2) {
%4 = alloca double
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca double
%8 = alloca [256 x i8]
store double %0, double* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%9 = load double, double* %4
%10 = call double @vis5d_time_usec(double %9)
store double %10, double* %7
%11 = getelementptr inbounds [256 x i8], [256 x i8]* %8, i64 0, i64 0
%12 = load i8*, i8** %6
%13 = load double, double* %7
%14 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %12, double %13)
%15 = load i8*, i8** %5
%16 = getelementptr inbounds [256 x i8], [256 x i8]* %8, i64 0, i64 0
%17 = call i32 @vis5d_debug_msg2(i8* %15, i8* %16)
ret i32 1
}

LLVM IR (-O2):
@.str = [20 x i8] c"%s time: %.0lf usec\00"
define i32 @vis5d_time_msg(double %0, i8* %1, i8* %2) {
%4 = alloca [256 x i8]
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%6 = tail call double @vis5d_time_usec(double %0)
%7 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %2, double %6)
%8 = call i32 @vis5d_debug_msg2(i8* %1, i8* %5)
ret i32 1
}
/* Variables and functions */
scalar_t__ drand48();
double log(scalar_t__);
double randexp() { return -log(1 - drand48()); }


x86 assembly (clang, -O0):
<randexp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <drand48@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1030 <log@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<randexp>:
push   %rax
xor    %eax,%eax
call   1040 <drand48@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1030 <log@plt>
xorps  0xec4(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @randexp() {
%1 = call i64 (...) @drand48()
%2 = sub nsw i64 1, %1
%3 = call double @log(i64 %2)
%4 = fneg double %3
ret double %4
}

LLVM IR (-O2):
define double @randexp() {
%1 = tail call i64 (...) @drand48()
%2 = sub nsw i64 1, %1
%3 = tail call double @log(i64 %2)
%4 = fneg double %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int a, b, c, d, e, f, g, h;
  a = 1;
  b = 2;
  c = 3;
  d = 4;
  printf("Hello World\n");
  e = 5;
  f = 6;
  g = 7;
  h = 8;
  printf("hello World!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0x4,-0x14(%rbp)
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
movl   $0x5,-0x18(%rbp)
movl   $0x6,-0x1c(%rbp)
movl   $0x7,-0x20(%rbp)
movl   $0x8,-0x24(%rbp)
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
@.str.1 = [13 x i8] c"hello World!\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
store i32 3, i32* %4
store i32 4, i32* %5
%10 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
store i32 5, i32* %6
store i32 6, i32* %7
store i32 7, i32* %8
store i32 8, i32* %9
%11 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [13 x i8] c"hello World!\00"
@str = [12 x i8] c"Hello World\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int right_child_index(int parent_index) { return 2 * parent_index + 2; }


x86 assembly (clang, -O0):
<right_child_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<right_child_index>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @right_child_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @right_child_index(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = add nsw i32 %2, 2
ret i32 %3
}
int foo() {
  int i = 0;
  int j;
  if (1 == i)
    return j;
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
mov    $0x1,%eax
cmp    -0x8(%rbp),%eax
jne    1124 <foo+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112b <foo+0x2b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 1, %4
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %3
store i32 %7, i32* %1
br label %9
8: ; preds = %0
store i32 0, i32* %1
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 0
}