xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ exp2(double);
float exp2f(float x) { return (float)exp2((double)x); }


x86 assembly (clang, -O0):
<exp2f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <exp2@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exp2f>:
push   %rax
cvtss2sd %xmm0,%xmm0
call   1030 <exp2@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @exp2f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i64 @exp2(double %4)
%6 = sitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @exp2f(float %0) {
%2 = fpext float %0 to double
%3 = tail call i64 @exp2(double %2)
%4 = sitofp i64 %3 to float
ret float %4
}
int fun156() { return 156; }


x86 assembly (clang, -O0):
<fun156>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun156>:
mov    $0x9c,%eax
ret

LLVM IR (-O0):
define i32 @fun156() {
ret i32 156
}

LLVM IR (-O2):
define i32 @fun156() {
ret i32 156
}
/* Variables and functions */
float ceilf(float);
float *vec2_ceil(float *result, float *a) {
  result[0] = ceilf(a[0]);
  result[1] = ceilf(a[1]);
  return result;
}


x86 assembly (clang, -O0):
<vec2_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <ceilf@plt>
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
call   1030 <ceilf@plt>
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec2_ceil>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movss  (%rsi),%xmm0
call   1030 <ceilf@plt>
movss  %xmm0,(%rbx)
movss  0x4(%r14),%xmm0
call   1030 <ceilf@plt>
movss  %xmm0,0x4(%rbx)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define float* @vec2_ceil(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = call float @llvm.ceil.f32(float %7)
%9 = load float*, float** %3
%10 = getelementptr inbounds float, float* %9, i64 0
store float %8, float* %10
%11 = load float*, float** %4
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = call float @llvm.ceil.f32(float %13)
%15 = load float*, float** %3
%16 = getelementptr inbounds float, float* %15, i64 1
store float %14, float* %16
%17 = load float*, float** %3
ret float* %17
}

LLVM IR (-O2):
define float* @vec2_ceil(float* returned writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = tail call float @llvm.ceil.f32(float %3)
store float %4, float* %0
%5 = getelementptr inbounds float, float* %1, i64 1
%6 = load float, float* %5
%7 = tail call float @llvm.ceil.f32(float %6)
%8 = getelementptr inbounds float, float* %0, i64 1
store float %7, float* %8
ret float* %0
}
/* Type definitions */
struct ui_out {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wrap_here(char *);
void mi_wrap_hint(struct ui_out *uiout, char *identstring) {
  wrap_here(identstring);
}


x86 assembly (clang, -O0):
<mi_wrap_hint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <wrap_here@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mi_wrap_hint>:
mov    %rsi,%rdi
jmp    1030 <wrap_here@plt>

LLVM IR (-O0):
%struct.ui_out = type { i32 }
define void @mi_wrap_hint(%struct.ui_out* %0, i8* %1) {
%3 = alloca %struct.ui_out*
%4 = alloca i8*
store %struct.ui_out* %0, %struct.ui_out** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @wrap_here(i8* %5)
ret void
}

LLVM IR (-O2):
%struct.ui_out = type { i32 }
define void @mi_wrap_hint(%struct.ui_out* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @wrap_here(i8* %1)
ret void
}
int test_imm_F9int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xF9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F9int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xf9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F9int64_midword_mem>:
testb  $0xf9,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F9int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 249
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F9int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 16318464
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *const);
void usage(const char *const exe) {
  printf("Usage: %s [-h] [-q] [-r] [-t<n>] <m>\n"
         "-h: display this information.\n"
         "-q: quiet mode -- do not print computed error.\n"
         "-r: trigger a race condition.\n"
         "-t<n>: use <n> threads.\n"
         "<m>: matrix size.\n",
         exe);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [187 x i8] c"Usage: %s [-h] [-q] [-r] [-t<n>] <m>\0A-h: display this information.\0A-q: quiet mode -- do not print computed error.\0A-r: trigger a race condition.\0A-t<n>: use <n> threads.\0A<m>: matrix size.\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([187 x i8], [187 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [187 x i8] c"Usage: %s [-h] [-q] [-r] [-t<n>] <m>\0A-h: display this information.\0A-q: quiet mode -- do not print computed error.\0A-r: trigger a race condition.\0A-t<n>: use <n> threads.\0A<m>: matrix size.\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([187 x i8], [187 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printXmlDigits(long long *data, unsigned int offset, const char *name) {
  if (offset > 0) {
    printf("%*c", offset, ' ');
  }
  printf("<%s>%lli</%s>\n", name, *data, name);
}


x86 assembly (clang, -O0):
<printXmlDigits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
jbe    1143 <printXmlDigits+0x33>
mov    -0xc(%rbp),%esi
lea    0xec9(%rip),%rdi
mov    $0x20,%edx
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x18(%rbp),%rsi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
mov    -0x18(%rbp),%rcx
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printXmlDigits>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rdi,%r14
test   %esi,%esi
je     1131 <printXmlDigits+0x21>
lea    0xedb(%rip),%rdi
mov    $0x20,%edx
xor    %eax,%eax
call   1030 <printf@plt>
mov    (%r14),%rdx
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
mov    %rbx,%rcx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%*c\00"
@.str.1 = [15 x i8] c"<%s>%lli</%s>\0A\00"
define void @printXmlDigits(i64* %0, i32 %1, i8* %2) {
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i8*
store i64* %0, i64** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = icmp ugt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %5
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10, i32 32)
br label %12
12: ; preds = %9, %3
%13 = load i8*, i8** %6
%14 = load i64*, i64** %4
%15 = load i64, i64* %14
%16 = load i8*, i8** %6
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %13, i64 %15, i8* %16)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%*c\00"
@.str.1 = [15 x i8] c"<%s>%lli</%s>\0A\00"
define void @printXmlDigits(i64* nocapture %0, i32 %1, i8* %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1, i32 32)
br label %7
7: ; preds = %5, %3
%8 = load i64, i64* %0
%9 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %2, i64 %8, i8* %2)
ret void
}
/* Variables and functions */
int shadow_user_pass_verify(char const *, char const *);
int auth_shadow_verify(const char *username, const char *password) {
  return shadow_user_pass_verify(username, password);
}


x86 assembly (clang, -O0):
<auth_shadow_verify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <shadow_user_pass_verify@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<auth_shadow_verify>:
jmp    1030 <shadow_user_pass_verify@plt>

LLVM IR (-O0):
define i32 @auth_shadow_verify(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @shadow_user_pass_verify(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @auth_shadow_verify(i8* %0, i8* %1) {
%3 = tail call i32 @shadow_user_pass_verify(i8* %0, i8* %1)
ret i32 %3
}
int vlan_gvrp_init_applicant(struct net_device *dev) { return 0; }


x86 assembly (clang, -O0):
<vlan_gvrp_init_applicant>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlan_gvrp_init_applicant>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define i32 @vlan_gvrp_init_applicant(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.net_device = type opaque
define i32 @vlan_gvrp_init_applicant(%struct.net_device* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ do_merge_sort(int *, int *, int /*<<< orphan*/, int);
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
void merge_sort(int arr[], int n) {
  int *tem = (int *)malloc(n * sizeof(*arr));
  do_merge_sort(arr, tem, 0, n - 1);
  free(tem);
}


x86 assembly (clang, -O0):
<merge_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
xor    %edx,%edx
call   1050 <do_merge_sort@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_sort>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
lea    0x0(,%rbx,4),%edi
call   1040 <malloc@plt>
mov    %rax,%r15
add    $0xffffffff,%ebx
mov    %r14,%rdi
mov    %rax,%rsi
xor    %edx,%edx
mov    %ebx,%ecx
call   1050 <do_merge_sort@plt>
mov    %r15,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @merge_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 4
%9 = trunc i64 %8 to i32
%10 = call i64 @malloc(i32 %9)
%11 = inttoptr i64 %10 to i32*
store i32* %11, i32** %5
%12 = load i32*, i32** %3
%13 = load i32*, i32** %5
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = call i32 @do_merge_sort(i32* %12, i32* %13, i32 0, i32 %15)
%17 = load i32*, i32** %5
%18 = call i32 @free(i32* %17)
ret void
}

LLVM IR (-O2):
define void @merge_sort(i32* %0, i32 %1) {
%3 = shl i32 %1, 2
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i32*
%6 = add nsw i32 %1, -1
%7 = tail call i32 @do_merge_sort(i32* %0, i32* %5, i32 0, i32 %6)
%8 = tail call i32 @free(i32* %5)
ret void
}
int Checkleapyear(int year) {
  if (year % 100 == 0) {
    if (year % 400 == 0)
      return 1;
    else
      return 0;
  } else {
    if (year % 4 == 0)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<Checkleapyear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1147 <Checkleapyear+0x47>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113b <Checkleapyear+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1173 <Checkleapyear+0x73>
movl   $0x0,-0x4(%rbp)
jmp    1173 <Checkleapyear+0x73>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1167 <Checkleapyear+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1173 <Checkleapyear+0x73>
jmp    116c <Checkleapyear+0x6c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Checkleapyear>:
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
ror    $0x2,%eax
cmp    $0x28f5c28,%eax
jbe    111a <Checkleapyear+0x1a>
and    $0x3,%edi
jmp    1139 <Checkleapyear+0x39>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x27,%rax
add    %ecx,%eax
imul   $0x190,%eax,%eax
sub    %eax,%edi
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @Checkleapyear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 400
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %20
12: ; preds = %7
store i32 0, i32* %2
br label %20
13: ; preds = %1
%14 = load i32, i32* %3
%15 = srem i32 %14, 4
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %2
br label %20
18: ; preds = %13
br label %19
19: ; preds = %18
store i32 0, i32* %2
br label %20
20: ; preds = %19, %17, %12, %11
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @Checkleapyear(i32 %0) {
%2 = srem i32 %0, 100
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = srem i32 %0, 400
br label %8
6: ; preds = %1
%7 = and i32 %0, 3
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ]
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
void strncpy_from_user(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<strncpy_from_user>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpy_from_user>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.strncpy_from_user = [18 x i8] c"strncpy_from_user\00"
define void @strncpy_from_user() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.strncpy_from_user, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.strncpy_from_user = [18 x i8] c"strncpy_from_user\00"
define void @strncpy_from_user() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.strncpy_from_user, i64 0, i64 0))
ret void
}
void enterMultiProtocolSysPatch(void) {}


x86 assembly (clang, -O0):
<enterMultiProtocolSysPatch>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enterMultiProtocolSysPatch>:
ret

LLVM IR (-O0):
define void @enterMultiProtocolSysPatch() {
ret void
}

LLVM IR (-O2):
define void @enterMultiProtocolSysPatch() {
ret void
}
/* Variables and functions */
float min(float, float);
float blendColorDodge(float base, float blend) {
  return (blend == 1.0f) ? blend : min(base / (1.0f - blend), 1.0f);
}


x86 assembly (clang, -O0):
<blendColorDodge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xed1(%rip),%xmm1
ucomiss %xmm1,%xmm0
jne    114d <blendColorDodge+0x3d>
jp     114d <blendColorDodge+0x3d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1175 <blendColorDodge+0x65>
movss  -0x4(%rbp),%xmm0
movss  0xea6(%rip),%xmm1
subss  -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  0xe95(%rip),%xmm1
call   1030 <min@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blendColorDodge>:
ucomiss 0xee9(%rip),%xmm1
jne    1124 <blendColorDodge+0x14>
jp     1124 <blendColorDodge+0x14>
movss  0xedd(%rip),%xmm0
ret
movss  0xed4(%rip),%xmm2
movaps %xmm2,%xmm3
subss  %xmm1,%xmm3
divss  %xmm3,%xmm0
movaps %xmm2,%xmm1
jmp    1030 <min@plt>

LLVM IR (-O0):
define float @blendColorDodge(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = fcmp oeq float %5, 1.000000e+00
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load float, float* %4
br label %15
9: ; preds = %2
%10 = load float, float* %3
%11 = load float, float* %4
%12 = fsub float 1.000000e+00, %11
%13 = fdiv float %10, %12
%14 = call float @min(float %13, float 1.000000e+00)
br label %15
15: ; preds = %9, %7
%16 = phi float [ %8, %7 ], [ %14, %9 ]
ret float %16
}

LLVM IR (-O2):
define float @blendColorDodge(float %0, float %1) {
%3 = fcmp oeq float %1, 1.000000e+00
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = fsub float 1.000000e+00, %1
%6 = fdiv float %0, %5
%7 = tail call float @min(float %6, float 1.000000e+00)
br label %8
8: ; preds = %2, %4
%9 = phi float [ %7, %4 ], [ 1.000000e+00, %2 ]
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ abortControlTransfer();
int /*<<< orphan*/ usbStallEndpoint(int /*<<< orphan*/);
void usbControlProtocolStall(void) {
  abortControlTransfer();
  usbStallEndpoint(0);
}


x86 assembly (clang, -O0):
<usbControlProtocolStall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abortControlTransfer@plt>
xor    %edi,%edi
call   1040 <usbStallEndpoint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usbControlProtocolStall>:
push   %rax
xor    %eax,%eax
call   1030 <abortControlTransfer@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <usbStallEndpoint@plt>

LLVM IR (-O0):
define void @usbControlProtocolStall() {
%1 = call i32 (...) @abortControlTransfer()
%2 = call i32 @usbStallEndpoint(i32 0)
ret void
}

LLVM IR (-O2):
define void @usbControlProtocolStall() {
%1 = tail call i32 (...) @abortControlTransfer()
%2 = tail call i32 @usbStallEndpoint(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ parse(char *);
int /*<<< orphan*/ stderr;
int main(int c, char *v[]) {
  if (c != 2) {
    fprintf(stderr, "usage: %s <filename>\n", v[0]);
    exit(EXIT_FAILURE);
  }
  parse(v[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     117a <main+0x4a>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xe99(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e65(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <parse@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1143 <main+0x13>
mov    0x8(%rsi),%rdi
call   1040 <parse@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    (%rsi),%rdx
lea    0xeaa(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"usage: %s <filename>\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = load i32, i32* @EXIT_FAILURE
%15 = call i32 @exit(i32 %14)
unreachable
16: ; preds = %2
%17 = load i8**, i8*** %5
%18 = getelementptr inbounds i8*, i8** %17, i64 1
%19 = load i8*, i8** %18
%20 = call i32 @parse(i8* %19)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"usage: %s <filename>\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %1
%7 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %2
%11 = getelementptr inbounds i8*, i8** %1, i64 1
%12 = load i8*, i8** %11
%13 = tail call i32 @parse(i8* %12)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test1(int /*<<< orphan*/);
int /*<<< orphan*/ test2(int);
int /*<<< orphan*/ test3(int);
int /*<<< orphan*/ test4(int);
int main(void) {
  test1(0);
  test2(1);
  test3(1);
  test4(2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <test1@plt>
mov    $0x1,%edi
call   1060 <test2@plt>
mov    $0x1,%edi
call   1030 <test3@plt>
mov    $0x2,%edi
call   1050 <test4@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <test1@plt>
mov    $0x1,%edi
call   1060 <test2@plt>
mov    $0x1,%edi
call   1030 <test3@plt>
mov    $0x2,%edi
call   1050 <test4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @test1(i32 0)
%2 = call i32 @test2(i32 1)
%3 = call i32 @test3(i32 1)
%4 = call i32 @test4(i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test1(i32 0)
%2 = tail call i32 @test2(i32 1)
%3 = tail call i32 @test3(i32 1)
%4 = tail call i32 @test4(i32 2)
ret i32 0
}
int test_764() { return 764; }


x86 assembly (clang, -O0):
<test_764>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2fc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_764>:
mov    $0x2fc,%eax
ret

LLVM IR (-O0):
define i32 @test_764() {
ret i32 764
}

LLVM IR (-O2):
define i32 @test_764() {
ret i32 764
}
unsigned long insert_ds(insn, value, errmsg)
unsigned long insn;
long value;
const char **errmsg;
{ return insn | (value & 0xfffc); }


x86 assembly (clang, -O0):
<insert_ds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
and    $0xfffc,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_ds>:
mov    %rsi,%rax
and    $0xfffc,%eax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @insert_ds(i64 %0, i64 %1, i8** %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8**
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8** %2, i8*** %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = and i64 %8, 65532
%10 = or i64 %7, %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @insert_ds(i64 %0, i64 %1, i8** nocapture readnone %2) {
%4 = and i64 %1, 65532
%5 = or i64 %4, %0
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int open(char *, int /*<<< orphan*/, int);
scalar_t__ read(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ write(int, char *, int);
int main(int argc, char *argv[]) {
  int pipe = open("fifo", O_WRONLY, 0666);
  char buf;
  while (read(0, &buf, 1)) {
    write(pipe, &buf, 1);
  }
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
lea    0xeaa(%rip),%rdi
mov    $0x1b6,%edx
call   1050 <open@plt>
mov    %eax,-0x14(%rbp)
xor    %edi,%edi
lea    -0x15(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
cmp    $0x0,%rax
je     1193 <main+0x63>
mov    -0x14(%rbp),%edi
lea    -0x15(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
jmp    1163 <main+0x33>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
lea    0xebd(%rip),%rdi
mov    $0x1b6,%edx
call   1050 <open@plt>
mov    %eax,%ebp
lea    0x7(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1040 <read@plt>
test   %rax,%rax
je     1193 <main+0x63>
lea    0x7(%rsp),%rbx
nopw   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <read@plt>
test   %rax,%rax
jne    1170 <main+0x40>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fifo\00"
@O_WRONLY = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i8
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i32, i32* @O_WRONLY
%9 = call i32 @open(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %8, i32 438)
store i32 %9, i32* %6
br label %10
10: ; preds = %13, %2
%11 = call i64 @read(i32 0, i8* %7, i32 1)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %6
%15 = call i32 @write(i32 %14, i8* %7, i32 1)
br label %10
16: ; preds = %10
ret i32 1
}

LLVM IR (-O2):
@.str = [5 x i8] c"fifo\00"
@O_WRONLY = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i8
%4 = load i32, i32* @O_WRONLY
%5 = tail call i32 @open(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %4, i32 438)
%6 = call i64 @read(i32 0, i8* %3, i32 1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2, %8
%9 = call i32 @write(i32 %5, i8* %3, i32 1)
%10 = call i64 @read(i32 0, i8* %3, i32 1)
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %8
12: ; preds = %8, %2
ret i32 1
}
__attribute__((always_)) unsigned long __fls(unsigned long word) {
  return (sizeof(word) * 8) - 1 - __builtin_clzl(word);
}


x86 assembly (clang, -O0):
<__fls>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bsr    %rax,%rax
xor    $0x3f,%rax
movslq %eax,%rcx
mov    $0x3f,%eax
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fls>:
bsr    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @__fls(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llvm.ctlz.i64(i64 %3, i1 true)
%5 = trunc i64 %4 to i32
%6 = sext i32 %5 to i64
%7 = sub i64 63, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @__fls(i64 %0) {
%2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 true)
%3 = xor i64 %2, 63
ret i64 %3
}
float G1V(float dotNV, float k) { return 1.0f / (dotNV * (1.0f - k) + k); }


x86 assembly (clang, -O0):
<G1V>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  0xee5(%rip),%xmm2
subss  -0x8(%rbp),%xmm2
movss  -0x8(%rbp),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  0xecb(%rip),%xmm0
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<G1V>:
movss  0xef8(%rip),%xmm2
movaps %xmm2,%xmm3
subss  %xmm1,%xmm3
mulss  %xmm0,%xmm3
addss  %xmm1,%xmm3
divss  %xmm3,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @G1V(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fsub float 1.000000e+00, %6
%8 = load float, float* %4
%9 = call float @llvm.fmuladd.f32(float %5, float %7, float %8)
%10 = fdiv float 1.000000e+00, %9
ret float %10
}

LLVM IR (-O2):
define float @G1V(float %0, float %1) {
%3 = fsub float 1.000000e+00, %1
%4 = tail call float @llvm.fmuladd.f32(float %0, float %3, float %1)
%5 = fdiv float 1.000000e+00, %4
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *calloc(int, size_t);
void *xcalloc(size_t len) {
  void *v = calloc(1, len);
  if (!v) {
    abort();
  }
  return v;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <xcalloc+0x30>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rax
mov    %rdi,%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
test   %rax,%rax
je     1135 <xcalloc+0x15>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @xcalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @calloc(i32 1, i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @xcalloc(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ drawEllipse(int, int, int, int);
void drawCircle(int x, int y, int r) {
  drawEllipse(x, y, r, r);
  return;
}


x86 assembly (clang, -O0):
<drawCircle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0xc(%rbp),%ecx
call   1030 <drawEllipse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawCircle>:
mov    %edx,%ecx
jmp    1030 <drawEllipse@plt>

LLVM IR (-O0):
define void @drawCircle(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* %6
%11 = call i32 @drawEllipse(i32 %7, i32 %8, i32 %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @drawCircle(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @drawEllipse(i32 %0, i32 %1, i32 %2, i32 %2)
ret void
}
int test_imm_30uint8_mem(unsigned char *val) {
  return ((*val) & (-0x30 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_30uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffd0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_30uint8_mem>:
testb  $0xd0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_30uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -48
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_30uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -48
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int bit_count(unsigned long long const);
int get_corner_stability(const unsigned long long P) {
  const unsigned long long stable =
      ((((0x0100000000000001ULL & P) << 1) |
        ((0x8000000000000080ULL & P) >> 1) |
        ((0x0000000000000081ULL & P) << 8) |
        ((0x8100000000000000ULL & P) >> 8) | 0x8100000000000081ULL) &
       P);
  return bit_count(stable);
}


x86 assembly (clang, -O0):
<get_corner_stability>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movabs $0x100000000000001,%rax
and    -0x8(%rbp),%rax
shl    $0x1,%rax
movabs $0x8000000000000080,%rcx
and    -0x8(%rbp),%rcx
shr    $0x1,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
and    $0x81,%rcx
shl    $0x8,%rcx
or     %rcx,%rax
movabs $0x8100000000000000,%rcx
and    -0x8(%rbp),%rcx
shr    $0x8,%rcx
or     %rcx,%rax
movabs $0x8100000000000081,%rcx
or     %rcx,%rax
and    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <bit_count@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_corner_stability>:
movabs $0x100000000000001,%r8
and    %rdi,%r8
mov    %rdi,%rcx
shr    %rcx
movabs $0x4000000000000040,%rdx
and    %rcx,%rdx
mov    %edi,%ecx
shl    $0x8,%ecx
and    $0x8100,%ecx
mov    %rdi,%rsi
shr    $0x8,%rsi
movabs $0x81000000000000,%rax
and    %rsi,%rax
lea    (%rdx,%r8,2),%rdx
or     %rcx,%rdx
or     %rax,%rdx
movabs $0x8100000000000081,%rax
or     %rdx,%rax
and    %rax,%rdi
jmp    1030 <bit_count@plt>

LLVM IR (-O0):
define i32 @get_corner_stability(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 72057594037927937, %4
%6 = shl i64 %5, 1
%7 = load i64, i64* %2
%8 = and i64 -9223372036854775680, %7
%9 = lshr i64 %8, 1
%10 = or i64 %6, %9
%11 = load i64, i64* %2
%12 = and i64 129, %11
%13 = shl i64 %12, 8
%14 = or i64 %10, %13
%15 = load i64, i64* %2
%16 = and i64 -9151314442816847872, %15
%17 = lshr i64 %16, 8
%18 = or i64 %14, %17
%19 = or i64 %18, -9151314442816847743
%20 = load i64, i64* %2
%21 = and i64 %19, %20
store i64 %21, i64* %3
%22 = load i64, i64* %3
%23 = call i32 @bit_count(i64 %22)
ret i32 %23
}

LLVM IR (-O2):
define i32 @get_corner_stability(i64 %0) {
%2 = shl i64 %0, 1
%3 = and i64 %2, 144115188075855874
%4 = lshr i64 %0, 1
%5 = and i64 %4, 4611686018427387968
%6 = shl i64 %0, 8
%7 = and i64 %6, 33024
%8 = lshr i64 %0, 8
%9 = and i64 %8, 36310271995674624
%10 = or i64 %5, %3
%11 = or i64 %10, %7
%12 = or i64 %11, %9
%13 = or i64 %12, -9151314442816847743
%14 = and i64 %13, %0
%15 = tail call i32 @bit_count(i64 %14)
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void menu() {
  puts("");
  puts("1. Insert an age");
  puts("2. Print ages ordered");
  puts("9. Remover age");
  puts("10. exit");
}


x86 assembly (clang, -O0):
<menu>:
push   %rbp
mov    %rsp,%rbp
lea    0xf0b(%rip),%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeeb(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<menu>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
lea    0xece(%rip),%rdi
call   1040 <puts@plt>
lea    0xed3(%rip),%rdi
call   1040 <puts@plt>
lea    0xedd(%rip),%rdi
call   1040 <puts@plt>
lea    0xee0(%rip),%rdi
pop    %rax
jmp    1040 <puts@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [17 x i8] c"1. Insert an age\00"
@.str.2 = [22 x i8] c"2. Print ages ordered\00"
@.str.3 = [15 x i8] c"9. Remover age\00"
@.str.4 = [9 x i8] c"10. exit\00"
define void @menu() {
%1 = call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @puts(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @puts(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [17 x i8] c"1. Insert an age\00"
@.str.2 = [22 x i8] c"2. Print ages ordered\00"
@.str.3 = [15 x i8] c"9. Remover age\00"
@.str.4 = [9 x i8] c"10. exit\00"
define void @menu() {
%1 = tail call i32 @putchar(i32 10)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0))
ret void
}
/* Type definitions */
struct rtattr {
  int rta_len;
};
struct nlmsghdr {
  int /*<<< orphan*/ nlmsg_len;
};

/* Variables and functions */
int NLMSG_ALIGN(int /*<<< orphan*/);
void end_rtattr_nest(struct nlmsghdr *n, struct rtattr *nest) {
  nest->rta_len =
      (void *)((struct rtattr *)(((void *)(n)) + NLMSG_ALIGN((n)->nlmsg_len))) -
      (void *)nest;
}


x86 assembly (clang, -O0):
<end_rtattr_nest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <NLMSG_ALIGN@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_rtattr_nest>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <NLMSG_ALIGN@plt>
add    %eax,%ebx
sub    %r14d,%ebx
mov    %ebx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.nlmsghdr = type { i32 }
%struct.rtattr = type { i32 }
define void @end_rtattr_nest(%struct.nlmsghdr* %0, %struct.rtattr* %1) {
%3 = alloca %struct.nlmsghdr*
%4 = alloca %struct.rtattr*
store %struct.nlmsghdr* %0, %struct.nlmsghdr** %3
store %struct.rtattr* %1, %struct.rtattr** %4
%5 = load %struct.nlmsghdr*, %struct.nlmsghdr** %3
%6 = bitcast %struct.nlmsghdr* %5 to i8*
%7 = load %struct.nlmsghdr*, %struct.nlmsghdr** %3
%8 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %7, i32 0, i32 0
%9 = load i32, i32* %8
%10 = call i32 @NLMSG_ALIGN(i32 %9)
%11 = sext i32 %10 to i64
%12 = getelementptr i8, i8* %6, i64 %11
%13 = bitcast i8* %12 to %struct.rtattr*
%14 = bitcast %struct.rtattr* %13 to i8*
%15 = load %struct.rtattr*, %struct.rtattr** %4
%16 = bitcast %struct.rtattr* %15 to i8*
%17 = ptrtoint i8* %14 to i64
%18 = ptrtoint i8* %16 to i64
%19 = sub i64 %17, %18
%20 = trunc i64 %19 to i32
%21 = load %struct.rtattr*, %struct.rtattr** %4
%22 = getelementptr inbounds %struct.rtattr, %struct.rtattr* %21, i32 0, i32 0
store i32 %20, i32* %22
ret void
}

LLVM IR (-O2):
%struct.nlmsghdr = type { i32 }
%struct.rtattr = type { i32 }
define void @end_rtattr_nest(%struct.nlmsghdr* %0, %struct.rtattr* %1) {
%3 = bitcast %struct.nlmsghdr* %0 to i8*
%4 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = tail call i32 @NLMSG_ALIGN(i32 %5)
%7 = sext i32 %6 to i64
%8 = getelementptr i8, i8* %3, i64 %7
%9 = ptrtoint i8* %8 to i64
%10 = ptrtoint %struct.rtattr* %1 to i64
%11 = sub i64 %9, %10
%12 = trunc i64 %11 to i32
%13 = getelementptr inbounds %struct.rtattr, %struct.rtattr* %1, i64 0, i32 0
store i32 %12, i32* %13
ret void
}
int boot_func5(void) { return 5; }


x86 assembly (clang, -O0):
<boot_func5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<boot_func5>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @boot_func5() {
ret i32 5
}

LLVM IR (-O2):
define i32 @boot_func5() {
ret i32 5
}
int f(int a, int b) {
  a = (a & ~(0xfffffull << 4)) | ((b << 4) & (0xfffffull << 4));
  return a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
and    $0xffffffffff00000f,%rax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
movslq %ecx,%rcx
and    $0xfffff0,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
and    $0xff00000f,%edi
shl    $0x4,%esi
and    $0xfffff0,%esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = and i64 %6, -16777201
%8 = load i32, i32* %4
%9 = shl i32 %8, 4
%10 = sext i32 %9 to i64
%11 = and i64 %10, 16777200
%12 = or i64 %7, %11
%13 = trunc i64 %12 to i32
store i32 %13, i32* %3
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
%3 = and i32 %0, -16777201
%4 = shl i32 %1, 4
%5 = and i32 %4, 16777200
%6 = or i32 %5, %3
ret i32 %6
}
double ceil(double x) {
  int y;
  y = (int)x;
  if ((double)y < x) {
    y++;
  }
  return ((double)y);
}


x86 assembly (clang, -O0):
<ceil>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    112e <ceil+0x2e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil>:
cvttsd2si %xmm0,%eax
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
add    %eax,%ecx
xorps  %xmm0,%xmm0
cvtsi2sd %ecx,%xmm0
ret

LLVM IR (-O0):
define double @ceil(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = fptosi double %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to double
%8 = load double, double* %2
%9 = fcmp olt double %7, %8
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %1
%14 = load i32, i32* %3
%15 = sitofp i32 %14 to double
ret double %15
}

LLVM IR (-O2):
define double @ceil(double %0) {
%2 = fptosi double %0 to i32
%3 = sitofp i32 %2 to double
%4 = fcmp olt double %3, %0
%5 = zext i1 %4 to i32
%6 = add nsw i32 %5, %2
%7 = sitofp i32 %6 to double
ret double %7
}
void INT_Excep_Ether_EINT(void) {}


x86 assembly (clang, -O0):
<INT_Excep_Ether_EINT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_Ether_EINT>:
ret

LLVM IR (-O0):
define void @INT_Excep_Ether_EINT() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_Ether_EINT() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int);
void init_1(void) { write(STDOUT_FILENO, "DSO init array 1\n", 17); }


x86 assembly (clang, -O0):
<init_1>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
mov    $0x11,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_1>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
mov    $0x11,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [18 x i8] c"DSO init array 1\0A\00"
define void @init_1() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = call i32 @write(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 17)
ret void
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@.str = [18 x i8] c"DSO init array 1\0A\00"
define void @init_1() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = tail call i32 @write(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 17)
ret void
}
/* Variables and functions */
scalar_t__ f1();
scalar_t__ f2();
scalar_t__ f3();
int main() { return (f1() == f2()) + (f2() == f3()) + (f1() == f3()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <f1@plt>
mov    %rax,-0x28(%rbp)
mov    $0x0,%al
call   1030 <f2@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <f2@plt>
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1040 <f3@plt>
mov    -0x20(%rbp),%rcx
mov    %rax,%rdx
mov    -0x14(%rbp),%eax
cmp    %rdx,%rcx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <f1@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <f3@plt>
mov    -0x10(%rbp),%rcx
mov    %rax,%rdx
mov    -0x8(%rbp),%eax
cmp    %rdx,%rcx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
xor    %eax,%eax
call   1050 <f1@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <f2@plt>
xor    %ebp,%ebp
cmp    %rax,%rbx
sete   %bpl
xor    %eax,%eax
call   1030 <f2@plt>
mov    %rax,%r14
xor    %eax,%eax
call   1040 <f3@plt>
xor    %ebx,%ebx
cmp    %rax,%r14
sete   %bl
add    %ebp,%ebx
xor    %eax,%eax
call   1050 <f1@plt>
mov    %rax,%rbp
xor    %eax,%eax
call   1040 <f3@plt>
xor    %ecx,%ecx
cmp    %rax,%rbp
sete   %cl
add    %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @f1()
%3 = call i64 (...) @f2()
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
%6 = call i64 (...) @f2()
%7 = call i64 (...) @f3()
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
%10 = add nsw i32 %5, %9
%11 = call i64 (...) @f1()
%12 = call i64 (...) @f3()
%13 = icmp eq i64 %11, %12
%14 = zext i1 %13 to i32
%15 = add nsw i32 %10, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @f1()
%2 = tail call i64 (...) @f2()
%3 = icmp eq i64 %1, %2
%4 = zext i1 %3 to i32
%5 = tail call i64 (...) @f2()
%6 = tail call i64 (...) @f3()
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
%9 = add nuw nsw i32 %8, %4
%10 = tail call i64 (...) @f1()
%11 = tail call i64 (...) @f3()
%12 = icmp eq i64 %10, %11
%13 = zext i1 %12 to i32
%14 = add nuw nsw i32 %9, %13
ret i32 %14
}
int stats_atomic_add_exchange_int(int *var, int val) {
  int temp = 0;
  int res = 0;
  return res;
}


x86 assembly (clang, -O0):
<stats_atomic_add_exchange_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stats_atomic_add_exchange_int>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stats_atomic_add_exchange_int(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @stats_atomic_add_exchange_int(i32* nocapture readnone %0, i32 %1) {
ret i32 0
}