#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned char opcode_bbb_set_addr_mode(unsigned char, unsigned char);
unsigned char opcode_CC10_set_addr_mode(unsigned char base,
                                        unsigned char addr_mode) {
  unsigned char cc10_addr_mode = 0;
  switch (addr_mode) {
  case 0x02:
    break;
  case 0x01:
    cc10_addr_mode = 0x1;
    break;
  case 0x08:
    cc10_addr_mode = 0x2;
    break;
  case 0x03:
    cc10_addr_mode = 0x3;
    break;
  case 0x05:
    cc10_addr_mode = 0x5;
    break;
  case 0x07:
    cc10_addr_mode = 0x7;
    break;
  case 0x00:
  case 0x04:
  case 0x06:
  default:
    break;
  }
  return opcode_bbb_set_addr_mode(base, cc10_addr_mode);
}


x86 assembly (clang, -O0):
<opcode_CC10_set_addr_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movb   $0x0,-0x3(%rbp)
movzbl -0x2(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x8,%rax
ja     1185 <opcode_CC10_set_addr_mode+0x75>
mov    -0x10(%rbp),%rax
lea    0xebb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
movb   $0x1,-0x3(%rbp)
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
movb   $0x2,-0x3(%rbp)
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
movb   $0x3,-0x3(%rbp)
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
movb   $0x5,-0x3(%rbp)
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
movb   $0x7,-0x3(%rbp)
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
jmp    1185 <opcode_CC10_set_addr_mode+0x75>
jmp    118a <opcode_CC10_set_addr_mode+0x7a>
mov    -0x1(%rbp),%al
movzbl %al,%edi
movzbl -0x3(%rbp),%esi
call   1030 <opcode_bbb_set_addr_mode@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_CC10_set_addr_mode>:
add    $0xff,%sil
movzbl %sil,%eax
lea    0x0(,%rax,8),%ecx
movabs $0x207000500030001,%rdx
shr    %cl,%rdx
xor    %ecx,%ecx
cmp    $0x8,%al
cmovae %ecx,%edx
movzbl %dl,%esi
jmp    1030 <opcode_bbb_set_addr_mode@plt>

LLVM IR (-O0):
define zeroext i8 @opcode_CC10_set_addr_mode(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
store i8 0, i8* %5
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
switch i32 %7, label %15 [
i32 2, label %8
i32 1, label %9
i32 8, label %10
i32 3, label %11
i32 5, label %12
i32 7, label %13
i32 0, label %14
i32 4, label %14
i32 6, label %14
]
8: ; preds = %2
br label %16
9: ; preds = %2
store i8 1, i8* %5
br label %16
10: ; preds = %2
store i8 2, i8* %5
br label %16
11: ; preds = %2
store i8 3, i8* %5
br label %16
12: ; preds = %2
store i8 5, i8* %5
br label %16
13: ; preds = %2
store i8 7, i8* %5
br label %16
14: ; preds = %2, %2, %2
br label %15
15: ; preds = %2, %14
br label %16
16: ; preds = %15, %13, %12, %11, %10, %9, %8
%17 = load i8, i8* %3
%18 = load i8, i8* %5
%19 = call zeroext i8 @opcode_bbb_set_addr_mode(i8 zeroext %17, i8 zeroext %18)
ret i8 %19
}

LLVM IR (-O2):
define zeroext i8 @opcode_CC10_set_addr_mode(i8 zeroext %0, i8 zeroext %1) {
%3 = add i8 %1, -1
%4 = icmp ult i8 %3, 8
%5 = zext i8 %3 to i64
%6 = shl nuw nsw i64 %5, 3
%7 = lshr i64 146085534387863553, %6
%8 = trunc i64 %7 to i8
%9 = select i1 %4, i8 %8, i8 0
%10 = tail call zeroext i8 @opcode_bbb_set_addr_mode(i8 zeroext %0, i8 zeroext %9)
ret i8 %10
}