xunge/DecIR huggingface dataset:
int direction_int(char ch) {
  switch (ch) {
  case 'e':
    return 0;
  case 'n':
    return 1;
  case 'w':
    return 2;
  case 's':
    return 3;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<direction_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffff9b,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x12,%eax
ja     1164 <direction_int+0x64>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    116b <direction_int+0x6b>
movl   $0x1,-0x4(%rbp)
jmp    116b <direction_int+0x6b>
movl   $0x2,-0x4(%rbp)
jmp    116b <direction_int+0x6b>
movl   $0x3,-0x4(%rbp)
jmp    116b <direction_int+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<direction_int>:
cmp    $0x77,%edi
je     1117 <direction_int+0x17>
cmp    $0x73,%edi
je     111d <direction_int+0x1d>
xor    %eax,%eax
cmp    $0x6e,%edi
jne    1122 <direction_int+0x22>
mov    $0x1,%eax
ret
mov    $0x2,%eax
ret
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @direction_int(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 101, label %6
i32 110, label %7
i32 119, label %8
i32 115, label %9
]
6: ; preds = %1
store i32 0, i32* %2
br label %11
7: ; preds = %1
store i32 1, i32* %2
br label %11
8: ; preds = %1
store i32 2, i32* %2
br label %11
9: ; preds = %1
store i32 3, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @direction_int(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %6 [
i32 115, label %5
i32 110, label %3
i32 119, label %4
]
3: ; preds = %1
br label %6
4: ; preds = %1
br label %6
5: ; preds = %1
br label %6
6: ; preds = %1, %5, %4, %3
%7 = phi i32 [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %1 ]
ret i32 %7
}
void omap_init_dmm_tiler(void) {}


x86 assembly (clang, -O0):
<omap_init_dmm_tiler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_init_dmm_tiler>:
ret

LLVM IR (-O0):
define void @omap_init_dmm_tiler() {
ret void
}

LLVM IR (-O2):
define void @omap_init_dmm_tiler() {
ret void
}
void ziperr(c, h) int c;
char *h;
{
  c = c;
  h = h;
}


x86 assembly (clang, -O0):
<ziperr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ziperr>:
ret

LLVM IR (-O0):
define void @ziperr(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
store i32 %5, i32* %3
%6 = load i8*, i8** %4
store i8* %6, i8** %4
ret void
}

LLVM IR (-O2):
define void @ziperr(i32 %0, i8* nocapture %1) {
ret void
}
void codegen_allocator_clean_blocks(struct mem_block_t *block) {}


x86 assembly (clang, -O0):
<codegen_allocator_clean_blocks>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<codegen_allocator_clean_blocks>:
ret

LLVM IR (-O0):
%struct.mem_block_t = type opaque
define void @codegen_allocator_clean_blocks(%struct.mem_block_t* %0) {
%2 = alloca %struct.mem_block_t*
store %struct.mem_block_t* %0, %struct.mem_block_t** %2
ret void
}

LLVM IR (-O2):
%struct.mem_block_t = type opaque
define void @codegen_allocator_clean_blocks(%struct.mem_block_t* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ schedule_insns();
int main(void) { schedule_insns(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <schedule_insns@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <schedule_insns@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @schedule_insns()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @schedule_insns()
ret i32 0
}
int grgmem(size, pointer)
int *size;
char **pointer;
{
  if (!(*pointer = malloc(*size)))
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<grgmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq (%rax),%rdi
call   1030 <malloc@plt>
mov    -0x18(%rbp),%rcx
mov    %rax,(%rcx)
cmp    $0x0,%rax
jne    1149 <grgmem+0x39>
movl   $0x0,-0x4(%rbp)
jmp    1150 <grgmem+0x40>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grgmem>:
push   %rbx
mov    %rsi,%rbx
movslq (%rdi),%rdi
call   1030 <malloc@plt>
mov    %rax,(%rbx)
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @grgmem(i32* %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8**
store i32* %0, i32** %4
store i8** %1, i8*** %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = sext i32 %7 to i64
%9 = call i8* @malloc(i64 %8)
%10 = load i8**, i8*** %5
store i8* %9, i8** %10
%11 = icmp ne i8* %9, null
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 0, i32* %3
br label %14
13: ; preds = %2
store i32 1, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @grgmem(i32* nocapture %0, i8** nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = sext i32 %3 to i64
%5 = tail call i8* @malloc(i64 %4)
store i8* %5, i8** %1
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XColormapEvent;

/* Variables and functions */
void set_XColormapEvent_serial(void *_p, unsigned long _v) {
  ((XColormapEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XColormapEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XColormapEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XColormapEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XColormapEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void die(long e) {
  abort();
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @die(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @die(i64 %0) {
%2 = tail call i32 (...) @abort()
unreachable
}
char char_toLower(char sv) {
  char sv_ret = 0;
  if (sv >= 'A' && sv <= 'Z') {
    int sv_int = (int)sv + 32;
    sv_ret = (char)sv_int;
  }
  return sv_ret;
}


x86 assembly (clang, -O0):
<char_toLower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movb   $0x0,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1138 <char_toLower+0x38>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jg     1138 <char_toLower+0x38>
movsbl -0x1(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_toLower>:
lea    -0x41(%rdi),%eax
add    $0x20,%dil
xor    %ecx,%ecx
cmp    $0x1a,%al
movzbl %dil,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @char_toLower(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %2
store i8 0, i8* %3
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = icmp sge i32 %6, 65
br i1 %7, label %8, label %18
8: ; preds = %1
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = icmp sle i32 %10, 90
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load i8, i8* %2
%14 = sext i8 %13 to i32
%15 = add nsw i32 %14, 32
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = trunc i32 %16 to i8
store i8 %17, i8* %3
br label %18
18: ; preds = %12, %8, %1
%19 = load i8, i8* %3
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @char_toLower(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 0
ret i8 %5
}
void mfence() {}


x86 assembly (clang, -O0):
<mfence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mfence>:
ret

LLVM IR (-O0):
define void @mfence() {
ret void
}

LLVM IR (-O2):
define void @mfence() {
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t av_clip_uint16_c(int a) {
  if (a & (~0xFFFF))
    return (-a) >> 31;
  else
    return a;
}


x86 assembly (clang, -O0):
<av_clip_uint16_c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffff0000,%eax
cmp    $0x0,%eax
je     1128 <av_clip_uint16_c+0x28>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0x4(%rbp)
jmp    112e <av_clip_uint16_c+0x2e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_clip_uint16_c>:
xor    %eax,%eax
test   %edi,%edi
setg   %al
neg    %eax
cmp    $0x10000,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @av_clip_uint16_c(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, -65536
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 0, %8
%10 = ashr i32 %9, 31
store i32 %10, i32* %2
br label %13
11: ; preds = %1
%12 = load i32, i32* %3
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @av_clip_uint16_c(i32 %0) {
%2 = icmp ult i32 %0, 65536
%3 = icmp sgt i32 %0, 0
%4 = sext i1 %3 to i32
%5 = select i1 %2, i32 %0, i32 %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
unsigned long long _mm_extract_epi16(int /*<<< orphan*/, int);
unsigned long long int foo16(__m128i x) { return _mm_extract_epi16(x, 3); }


x86 assembly (clang, -O0):
<foo16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x3,%esi
call   1030 <_mm_extract_epi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo16>:
mov    $0x3,%esi
jmp    1030 <_mm_extract_epi16@plt>

LLVM IR (-O0):
define i64 @foo16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @_mm_extract_epi16(i32 %3, i32 3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @foo16(i32 %0) {
%2 = tail call i64 @_mm_extract_epi16(i32 %0, i32 3)
ret i64 %2
}
void sd_zbc_remove_zones(struct scsi_disk *sdkp) {}


x86 assembly (clang, -O0):
<sd_zbc_remove_zones>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_zbc_remove_zones>:
ret

LLVM IR (-O0):
%struct.scsi_disk = type opaque
define void @sd_zbc_remove_zones(%struct.scsi_disk* %0) {
%2 = alloca %struct.scsi_disk*
store %struct.scsi_disk* %0, %struct.scsi_disk** %2
ret void
}

LLVM IR (-O2):
%struct.scsi_disk = type opaque
define void @sd_zbc_remove_zones(%struct.scsi_disk* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ console_init();
int /*<<< orphan*/ sys_build_gdt();
int /*<<< orphan*/ sys_build_idt();
int /*<<< orphan*/ sys_copy_multiboot();
void kernel_init(void) {
  sys_build_gdt();
  sys_build_idt();
  console_init();
  sys_copy_multiboot();
}


x86 assembly (clang, -O0):
<kernel_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <sys_build_gdt@plt>
mov    $0x0,%al
call   1050 <sys_build_idt@plt>
mov    $0x0,%al
call   1030 <console_init@plt>
mov    $0x0,%al
call   1040 <sys_copy_multiboot@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_init>:
push   %rax
xor    %eax,%eax
call   1060 <sys_build_gdt@plt>
xor    %eax,%eax
call   1050 <sys_build_idt@plt>
xor    %eax,%eax
call   1030 <console_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <sys_copy_multiboot@plt>

LLVM IR (-O0):
define void @kernel_init() {
%1 = call i32 (...) @sys_build_gdt()
%2 = call i32 (...) @sys_build_idt()
%3 = call i32 (...) @console_init()
%4 = call i32 (...) @sys_copy_multiboot()
ret void
}

LLVM IR (-O2):
define void @kernel_init() {
%1 = tail call i32 (...) @sys_build_gdt()
%2 = tail call i32 (...) @sys_build_idt()
%3 = tail call i32 (...) @console_init()
%4 = tail call i32 (...) @sys_copy_multiboot()
ret void
}
int islb(int p) { return p == '\n' || p == '\r'; }


x86 assembly (clang, -O0):
<islb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <islb+0x20>
cmpl   $0xd,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<islb>:
cmp    $0xa,%edi
sete   %al
cmp    $0xd,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @islb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 13
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @islb(i32 %0) {
%2 = icmp eq i32 %0, 10
%3 = icmp eq i32 %0, 13
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int atan(double);
double foo() {
  double ok2 = 4 * atan(1.0);
  return ok2;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  0xee0(%rip),%xmm0
call   1030 <atan@plt>
shl    $0x2,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
movsd  0xee7(%rip),%xmm0
call   1030 <atan@plt>
shl    $0x2,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @foo() {
%1 = alloca double
%2 = call i32 @atan(double 1.000000e+00)
%3 = mul nsw i32 4, %2
%4 = sitofp i32 %3 to double
store double %4, double* %1
%5 = load double, double* %1
ret double %5
}

LLVM IR (-O2):
define double @foo() {
%1 = tail call i32 @atan(double 1.000000e+00)
%2 = shl nsw i32 %1, 2
%3 = sitofp i32 %2 to double
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ Term_addstr(int, int, char *);
int /*<<< orphan*/ ascii_to_text(char *, char *);
int /*<<< orphan*/ flush();
char inkey();
void do_cmd_macro_aux_keymap(char *buf) {
  char tmp[1024];
  flush();
  buf[0] = inkey();
  buf[1] = '\0';
  ascii_to_text(tmp, buf);
  Term_addstr(-1, 1, tmp);
  flush();
}


x86 assembly (clang, -O0):
<do_cmd_macro_aux_keymap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <flush@plt>
mov    $0x0,%al
call   1060 <inkey@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movb   $0x0,0x1(%rax)
lea    -0x410(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <ascii_to_text@plt>
lea    -0x410(%rbp),%rdx
mov    $0xffffffff,%edi
mov    $0x1,%esi
call   1050 <Term_addstr@plt>
mov    $0x0,%al
call   1030 <flush@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_cmd_macro_aux_keymap>:
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <flush@plt>
xor    %eax,%eax
call   1060 <inkey@plt>
mov    %al,(%rbx)
movb   $0x0,0x1(%rbx)
mov    %rsp,%r14
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <ascii_to_text@plt>
mov    $0xffffffff,%edi
mov    $0x1,%esi
mov    %r14,%rdx
call   1050 <Term_addstr@plt>
xor    %eax,%eax
call   1030 <flush@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @do_cmd_macro_aux_keymap(i8* %0) {
%2 = alloca i8*
%3 = alloca [1024 x i8]
store i8* %0, i8** %2
%4 = call i32 (...) @flush()
%5 = call signext i8 (...) @inkey()
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 0
store i8 %5, i8* %7
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8 0, i8* %9
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%11 = load i8*, i8** %2
%12 = call i32 @ascii_to_text(i8* %10, i8* %11)
%13 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%14 = call i32 @Term_addstr(i32 -1, i32 1, i8* %13)
%15 = call i32 (...) @flush()
ret void
}

LLVM IR (-O2):
define void @do_cmd_macro_aux_keymap(i8* %0) {
%2 = alloca [1024 x i8]
%3 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%4 = tail call i32 (...) @flush()
%5 = tail call signext i8 (...) @inkey()
store i8 %5, i8* %0
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 0, i8* %6
%7 = call i32 @ascii_to_text(i8* %3, i8* %0)
%8 = call i32 @Term_addstr(i32 -1, i32 1, i8* %3)
%9 = call i32 (...) @flush()
ret void
}
unsigned int HSMMCSDIsCmdComplete(unsigned int baseAddr, unsigned int retry) {
  volatile unsigned int status = 0;
  do {
    status =
        ((*((volatile unsigned int *)(baseAddr + (0x230)))) & (0x00000001u)) >>
        (0x00000000u);
    if ((1 == status) || (0 == retry)) {
      break;
    }
  } while (retry--);
  return status;
}


x86 assembly (clang, -O0):
<HSMMCSDIsCmdComplete>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x230,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x1,%eax
shr    $0x0,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
cmp    %ecx,%eax
je     1141 <HSMMCSDIsCmdComplete+0x41>
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
jne    1146 <HSMMCSDIsCmdComplete+0x46>
jmp    115f <HSMMCSDIsCmdComplete+0x5f>
jmp    114b <HSMMCSDIsCmdComplete+0x4b>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
jne    1111 <HSMMCSDIsCmdComplete+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HSMMCSDIsCmdComplete>:
movl   $0x0,-0x4(%rsp)
add    $0x230,%edi
xchg   %ax,%ax
mov    (%rdi),%eax
and    $0x1,%eax
mov    %eax,-0x4(%rsp)
mov    -0x4(%rsp),%ecx
sub    $0x1,%esi
setb   %al
cmp    $0x1,%ecx
je     112c <HSMMCSDIsCmdComplete+0x2c>
test   %al,%al
je     1110 <HSMMCSDIsCmdComplete+0x10>
mov    -0x4(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @HSMMCSDIsCmdComplete(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store volatile i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i32, i32* %3
%8 = add i32 %7, 560
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, 1
%13 = lshr i32 %12, 0
store volatile i32 %13, i32* %5
%14 = load volatile i32, i32* %5
%15 = icmp eq i32 1, %14
br i1 %15, label %19, label %16
16: ; preds = %6
%17 = load i32, i32* %4
%18 = icmp eq i32 0, %17
br i1 %18, label %19, label %20
19: ; preds = %16, %6
br label %25
20: ; preds = %16
br label %21
21: ; preds = %20
%22 = load i32, i32* %4
%23 = add i32 %22, -1
store i32 %23, i32* %4
%24 = icmp ne i32 %22, 0
br i1 %24, label %6, label %25
25: ; preds = %21, %19
%26 = load volatile i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @HSMMCSDIsCmdComplete(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store volatile i32 0, i32* %3
%5 = add i32 %0, 560
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
br label %8
8: ; preds = %8, %2
%9 = phi i32 [ %1, %2 ], [ %16, %8 ]
%10 = load volatile i32, i32* %7
%11 = and i32 %10, 1
store volatile i32 %11, i32* %3
%12 = load volatile i32, i32* %3
%13 = icmp eq i32 %12, 1
%14 = icmp eq i32 %9, 0
%15 = select i1 %13, i1 true, i1 %14
%16 = add i32 %9, -1
br i1 %15, label %17, label %8
17: ; preds = %8
%18 = load volatile i32, i32* %3
ret i32 %18
}
char *qnextline(q, s)
struct queue *q;
char *s;
{
  char ch;
  for (;;) {
    ch = *s;
    s = qnext(q, s);
    if (ch == '\n')
      return s;
  }
}


x86 assembly (clang, -O0):
<qnextline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <qnext@plt>
cltq
mov    %rax,-0x10(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0xa,%eax
jne    1155 <qnextline+0x45>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret
jmp    1120 <qnextline+0x10>

x86 assembly (clang, -O2):
<qnextline>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
nopw   0x0(%rax,%rax,1)
movzbl (%rsi),%ebx
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <qnext@plt>
movslq %eax,%rsi
cmp    $0xa,%bl
jne    1120 <qnextline+0x10>
mov    %rsi,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.queue = type opaque
define i8* @qnextline(%struct.queue* %0, i8* %1) {
%3 = alloca %struct.queue*
%4 = alloca i8*
%5 = alloca i8
store %struct.queue* %0, %struct.queue** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
store i8 %8, i8* %5
%9 = load %struct.queue*, %struct.queue** %3
%10 = load i8*, i8** %4
%11 = call i32 (%struct.queue*, i8*, ...) bitcast (i32 (...)* @qnext to i32 (%struct.queue*, i8*, ...)*)(%struct.queue* %9, i8* %10)
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %4
%14 = load i8, i8* %5
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 10
br i1 %16, label %17, label %19
17: ; preds = %6
%18 = load i8*, i8** %4
ret i8* %18
19: ; preds = %6
br label %6
}

LLVM IR (-O2):
%struct.queue = type opaque
define i8* @qnextline(%struct.queue* %0, i8* %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %8, %3 ]
%5 = load i8, i8* %4
%6 = tail call i32 (%struct.queue*, i8*, ...) bitcast (i32 (...)* @qnext to i32 (%struct.queue*, i8*, ...)*)(%struct.queue* %0, i8* %4)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
%9 = icmp eq i8 %5, 10
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = inttoptr i64 %7 to i8*
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void show_help(void) {
  printf("Usage: %s [OPTION]...\n\nOptions:\n    -h, --help\t\tdisplay this "
         "help\n    -V, --version\tdisplay version information\n\nReport bugs "
         "to <bulliver@gmail.com>\n",
         "od");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf74(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
lea    0xee9(%rip),%rdi
lea    0xf78(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [150 x i8] c"Usage: %s [OPTION]...\0A\0AOptions:\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0AReport bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [3 x i8] c"od\00"
define void @show_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [150 x i8] c"Usage: %s [OPTION]...\0A\0AOptions:\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0AReport bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [3 x i8] c"od\00"
define void @show_help() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}
IR0I1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if ((*p0) <= 33)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<IR0I1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x28(%rbp),%rax
movsd  0xed8(%rip),%xmm0
ucomisd (%rax),%xmm0
jb     113e <IR0I1+0x3e>
movl   $0x1,-0x4(%rbp)
jmp    1145 <IR0I1+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IR0I1>:
movsd  0xef8(%rip),%xmm0
xor    %eax,%eax
ucomisd (%rdx),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @IR0I1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %12
%15 = load double, double* %14
%16 = fcmp ole double %15, 3.300000e+01
br i1 %16, label %17, label %18
17: ; preds = %6
store i32 1, i32* %7
br label %19
18: ; preds = %6
store i32 0, i32* %7
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @IR0I1(double %0, double %1, i32 %2, i32 %3, double* nocapture %4, double* nocapture readnone %5) {
%7 = load double, double* %4
%8 = fcmp ole double %7, 3.300000e+01
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int fibo(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int num;
  printf("Informe o número: ");
  scanf("%d", &num);
  printf("O resultado é %d\n", fibo(num));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec0(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1050 <fibo@plt>
mov    %eax,%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <fibo@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Informe o n\C3\BAmero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [19 x i8] c"O resultado \C3\A9 %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @fibo(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"Informe o n\C3\BAmero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [19 x i8] c"O resultado \C3\A9 %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @fibo(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ RunDemo();
int main(int argc, char **argv) {
  RunDemo();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <RunDemo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <RunDemo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @RunDemo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @RunDemo()
ret i32 0
}
int sqrCase(int a, int n) {
  if (n == 1) {
    return (a);
  } else {
    a = sqrCase(a, n / 2) * sqrCase(a, n / 2);
  }
}


x86 assembly (clang, -O0):
<sqrCase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1133 <sqrCase+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116b <sqrCase+0x5b>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
call   1030 <sqrCase@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
call   1030 <sqrCase@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrCase>:
mov    %edi,%eax
cmp    $0x1,%esi
je     1121 <sqrCase+0x21>
mov    %esi,%ecx
nopl   0x0(%rax)
shr    $0x1f,%ecx
add    %esi,%ecx
sar    %ecx
and    $0xfffffffe,%esi
cmp    $0x2,%esi
mov    %ecx,%esi
jne    1110 <sqrCase+0x10>
ret

LLVM IR (-O0):
define i32 @sqrCase(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %20
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = sdiv i32 %12, 2
%14 = call i32 @sqrCase(i32 %11, i32 %13)
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = sdiv i32 %16, 2
%18 = call i32 @sqrCase(i32 %15, i32 %17)
%19 = mul nsw i32 %14, %18
store i32 %19, i32* %4
br label %20
20: ; preds = %8, %10
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @sqrCase(i32 returned %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = sdiv i32 %5, 2
%7 = and i32 %5, -2
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret i32 %0
}
void SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond(void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond = [61 x i8] c"SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond\00"
define void @SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([61 x i8], [61 x i8]* @__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond = [61 x i8] c"SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond\00"
define void @SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([61 x i8], [61 x i8]* @__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesFailedToRespond, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int estabd(char *, char *);
int /*<<< orphan*/ path(char *, char *, char *);
int establishdir(char *fname) {
  char dpart[8192], fpart[8192];
  path(fname, dpart, fpart);
  return (estabd(fname, dpart));
}


x86 assembly (clang, -O0):
<establishdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x4010,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x2010(%rbp),%rsi
lea    -0x4010(%rbp),%rdx
call   1040 <path@plt>
mov    -0x8(%rbp),%rdi
lea    -0x2010(%rbp),%rsi
call   1030 <estabd@plt>
add    $0x4010,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<establishdir>:
push   %r14
push   %rbx
sub    $0x4008,%rsp
mov    %rdi,%rbx
lea    0x2000(%rsp),%r14
mov    %rsp,%rdx
mov    %r14,%rsi
call   1040 <path@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <estabd@plt>
add    $0x4008,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @establishdir(i8* %0) {
%2 = alloca i8*
%3 = alloca [8192 x i8]
%4 = alloca [8192 x i8]
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds [8192 x i8], [8192 x i8]* %3, i64 0, i64 0
%7 = getelementptr inbounds [8192 x i8], [8192 x i8]* %4, i64 0, i64 0
%8 = call i32 @path(i8* %5, i8* %6, i8* %7)
%9 = load i8*, i8** %2
%10 = getelementptr inbounds [8192 x i8], [8192 x i8]* %3, i64 0, i64 0
%11 = call i32 @estabd(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @establishdir(i8* %0) {
%2 = alloca [8192 x i8]
%3 = alloca [8192 x i8]
%4 = getelementptr inbounds [8192 x i8], [8192 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [8192 x i8], [8192 x i8]* %3, i64 0, i64 0
%6 = call i32 @path(i8* %0, i8* %4, i8* %5)
%7 = call i32 @estabd(i8* %0, i8* %4)
ret i32 %7
}
/* Variables and functions */
int rand();
int slach_rand_int_range_1(int min, int max) {
  return rand() % (max - min) + min;
}


x86 assembly (clang, -O0):
<slach_rand_int_range_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slach_rand_int_range_1>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @slach_rand_int_range_1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = srem i32 %5, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @slach_rand_int_range_1(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub nsw i32 %1, %0
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
void __attribute__((no, noclone)) test4(int x) {
  if ((3 << x) != 4 && (1 << x) != 12 && (40 << x) != 1024 && (2 << x) != 84 &&
      (3 << x) != 16384 && (10 << x) != 6144)
    ;
  else
    __builtin_abort();
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x3,%eax
shl    %cl,%eax
cmp    $0x4,%eax
je     1198 <test4+0x88>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    $0xc,%eax
je     1198 <test4+0x88>
mov    -0x4(%rbp),%ecx
mov    $0x28,%eax
shl    %cl,%eax
cmp    $0x400,%eax
je     1198 <test4+0x88>
mov    -0x4(%rbp),%ecx
mov    $0x2,%eax
shl    %cl,%eax
cmp    $0x54,%eax
je     1198 <test4+0x88>
mov    -0x4(%rbp),%ecx
mov    $0x3,%eax
shl    %cl,%eax
cmp    $0x4000,%eax
je     1198 <test4+0x88>
mov    -0x4(%rbp),%ecx
mov    $0xa,%eax
shl    %cl,%eax
cmp    $0x1800,%eax
je     1198 <test4+0x88>
jmp    119d <test4+0x8d>
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
ret

LLVM IR (-O0):
define void @test4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 3, %3
%5 = icmp ne i32 %4, 4
br i1 %5, label %6, label %27
6: ; preds = %1
%7 = load i32, i32* %2
%8 = shl i32 1, %7
%9 = icmp ne i32 %8, 12
br i1 %9, label %10, label %27
10: ; preds = %6
%11 = load i32, i32* %2
%12 = shl i32 40, %11
%13 = icmp ne i32 %12, 1024
br i1 %13, label %14, label %27
14: ; preds = %10
%15 = load i32, i32* %2
%16 = shl i32 2, %15
%17 = icmp ne i32 %16, 84
br i1 %17, label %18, label %27
18: ; preds = %14
%19 = load i32, i32* %2
%20 = shl i32 3, %19
%21 = icmp ne i32 %20, 16384
br i1 %21, label %22, label %27
22: ; preds = %18
%23 = load i32, i32* %2
%24 = shl i32 10, %23
%25 = icmp ne i32 %24, 6144
br i1 %25, label %26, label %27
26: ; preds = %22
br label %28
27: ; preds = %22, %18, %14, %10, %6, %1
unreachable
28: ; preds = %26
ret void
}

LLVM IR (-O2):
define void @test4(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ cpu_set_t;
typedef int /*<<< orphan*/ __pid_t;

/* Variables and functions */
int sched_setaffinity(__pid_t _a, size_t _b, __const cpu_set_t *_c) {
  return 0;
}


x86 assembly (clang, -O0):
<sched_setaffinity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_setaffinity>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sched_setaffinity(i32 %0, i64 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32*
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32* %2, i32** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @sched_setaffinity(i32 %0, i64 %1, i32* nocapture readnone %2) {
ret i32 0
}
int my_strlen_ptr(char *string) {
  int i;
  for (i = 0; *(string + i) != '\0'; ++i)
    ;
  return i;
}


x86 assembly (clang, -O0):
<my_strlen_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1137 <my_strlen_ptr+0x37>
jmp    1129 <my_strlen_ptr+0x29>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <my_strlen_ptr+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strlen_ptr>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <my_strlen_ptr+0x10>
ret

LLVM IR (-O0):
define i32 @my_strlen_ptr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %4
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @my_strlen_ptr(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
void moduleFreeContext(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               91, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<moduleFreeContext>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x5b,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<moduleFreeContext>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x5b,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.moduleFreeContext = [18 x i8] c"moduleFreeContext\00"
define void @moduleFreeContext() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 91, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.moduleFreeContext, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.moduleFreeContext = [18 x i8] c"moduleFreeContext\00"
define void @moduleFreeContext() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 91, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.moduleFreeContext, i64 0, i64 0))
ret void
}
long long foo2(long long x) { return x & 1; }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
mov    %rdi,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @foo2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1
ret i64 %4
}

LLVM IR (-O2):
define i64 @foo2(i64 %0) {
%2 = and i64 %0, 1
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M101_f(char *s) {
  debug("M101_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M101_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M101_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M101_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M101_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M101_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M101_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ test(int, int, int);
int main() {
  int64_t op1, op2, op3;
  test(op1, 0x1000000000000000ull, 0x1234567887654321ull);
  test(0x1000000000000000ull, op2, 0x1234567887654321ull);
  test(0x1000000000000000ull, 0x1000000000000000ull, op3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%edi
xor    %esi,%esi
mov    $0x87654321,%edx
call   1030 <test@plt>
mov    -0xc(%rbp),%esi
xor    %edi,%edi
mov    $0x87654321,%edx
call   1030 <test@plt>
mov    -0x10(%rbp),%edx
xor    %esi,%esi
mov    %esi,%edi
call   1030 <test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %esi,%esi
mov    $0x87654321,%edx
call   1030 <test@plt>
xor    %edi,%edi
mov    $0x87654321,%edx
call   1030 <test@plt>
xor    %edi,%edi
xor    %esi,%esi
call   1030 <test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @test(i32 %5, i32 0, i32 -2023406815)
%7 = load i32, i32* %3
%8 = call i32 @test(i32 0, i32 %7, i32 -2023406815)
%9 = load i32, i32* %4
%10 = call i32 @test(i32 0, i32 0, i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test(i32 undef, i32 0, i32 -2023406815)
%2 = tail call i32 @test(i32 0, i32 undef, i32 -2023406815)
%3 = tail call i32 @test(i32 0, i32 0, i32 undef)
ret i32 0
}
unsigned int twopower(int j) {
  unsigned int a = 1;
  int i = 4 * j;
  while (i) {
    a = 2 * a;
    i--;
  }
  return a;
}


x86 assembly (clang, -O0):
<twopower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1138 <twopower+0x38>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1117 <twopower+0x17>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<twopower>:
test   %edi,%edi
je     1121 <twopower+0x21>
mov    %edi,%eax
shl    $0x2,%edi
lea    -0x1(,%rax,4),%eax
mov    %edi,%ecx
and    $0x4,%ecx
cmp    $0x7,%eax
jae    1127 <twopower+0x27>
mov    $0x1,%eax
jmp    1138 <twopower+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
nop
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <twopower+0x30>
test   %ecx,%ecx
je     1147 <twopower+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <twopower+0x40>
ret

LLVM IR (-O0):
define i32 @twopower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%5 = load i32, i32* %2
%6 = mul nsw i32 4, %5
store i32 %6, i32* %4
br label %7
7: ; preds = %10, %1
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = load i32, i32* %3
%12 = mul i32 2, %11
store i32 %12, i32* %3
%13 = load i32, i32* %4
%14 = add nsw i32 %13, -1
store i32 %14, i32* %4
br label %7
15: ; preds = %7
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @twopower(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %26, label %3
3: ; preds = %1
%4 = shl i32 %0, 2
%5 = add i32 %4, -1
%6 = and i32 %4, 4
%7 = icmp ult i32 %5, 7
br i1 %7, label %16, label %8
8: ; preds = %3
%9 = and i32 %4, -8
br label %10
10: ; preds = %10, %8
%11 = phi i32 [ 1, %8 ], [ %13, %10 ]
%12 = phi i32 [ 0, %8 ], [ %14, %10 ]
%13 = shl i32 %11, 8
%14 = add i32 %12, 8
%15 = icmp eq i32 %14, %9
br i1 %15, label %16, label %10
16: ; preds = %10, %3
%17 = phi i32 [ undef, %3 ], [ %13, %10 ]
%18 = phi i32 [ 1, %3 ], [ %13, %10 ]
%19 = icmp eq i32 %6, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %20
%21 = phi i32 [ %23, %20 ], [ %18, %16 ]
%22 = phi i32 [ %24, %20 ], [ 0, %16 ]
%23 = shl i32 %21, 1
%24 = add i32 %22, 1
%25 = icmp eq i32 %24, %6
br i1 %25, label %26, label %20
26: ; preds = %16, %20, %1
%27 = phi i32 [ 1, %1 ], [ %17, %16 ], [ %23, %20 ]
ret i32 %27
}