void pll_setup_timers(void) {
  (*((volatile unsigned int *)(((0x44E00000) + 0x500) + (0x8)))) &=
      ~((0x00000003u));
  (*((volatile unsigned int *)(((0x44E00000) + 0x500) + (0x8)))) |= (0x1u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0x500) + (0x8)))) &
          (0x00000003u)) != (0x1u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0x80)))) |= (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x80)))) &
          (0x00000003u)) != (0x2u))
    ;
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x80)))) &
          (0x00030000u)) != (0x0u))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x4)))) &
           (0x00000008u)))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xc)))) &
           (0x00000010u)))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x12c)))) &
           ((0x00000010u) | (0x00000020u))))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x0)))) &
           ((0x00000100u) | (0x00004000u))))
    ;
}


x86 assembly (clang, -O0):
<pll_setup_timers>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44e00508,%eax
mov    (%rax),%ecx
and    $0xfffffffc,%ecx
mov    $0x44e00508,%eax
mov    %ecx,(%rax)
mov    $0x44e00508,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    $0x44e00508,%eax
mov    %ecx,(%rax)
mov    $0x44e00508,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x1,%eax
je     113e <pll_setup_timers+0x3e>
jmp    1126 <pll_setup_timers+0x26>
mov    $0x44e00080,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    $0x44e00080,%eax
mov    %ecx,(%rax)
mov    $0x44e00080,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     1167 <pll_setup_timers+0x67>
jmp    114f <pll_setup_timers+0x4f>
jmp    116c <pll_setup_timers+0x6c>
mov    $0x44e00080,%eax
mov    (%rax),%eax
and    $0x30000,%eax
cmp    $0x0,%eax
je     1186 <pll_setup_timers+0x86>
jmp    116c <pll_setup_timers+0x6c>
jmp    118b <pll_setup_timers+0x8b>
mov    $0x44e00004,%eax
mov    (%rax),%eax
and    $0x8,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    11aa <pll_setup_timers+0xaa>
jmp    11af <pll_setup_timers+0xaf>
jmp    118b <pll_setup_timers+0x8b>
jmp    11b4 <pll_setup_timers+0xb4>
mov    $0x44e0000c,%eax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    11d3 <pll_setup_timers+0xd3>
jmp    11d8 <pll_setup_timers+0xd8>
jmp    11b4 <pll_setup_timers+0xb4>
jmp    11dd <pll_setup_timers+0xdd>
mov    $0x44e0012c,%eax
mov    (%rax),%eax
and    $0x30,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    11fc <pll_setup_timers+0xfc>
jmp    1201 <pll_setup_timers+0x101>
jmp    11dd <pll_setup_timers+0xdd>
jmp    1206 <pll_setup_timers+0x106>
mov    $0x44e00000,%eax
mov    (%rax),%eax
and    $0x4100,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1227 <pll_setup_timers+0x127>
jmp    122c <pll_setup_timers+0x12c>
jmp    1206 <pll_setup_timers+0x106>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pll_setup_timers>:
andl   $0xfffffffc,0x44e00508
fc
orl    $0x1,0x44e00508
01
mov    0x44e00508,%eax
and    $0x3,%eax
cmp    $0x1,%eax
jne    1110 <pll_setup_timers+0x10>
orl    $0x2,0x44e00080
02
nopw   0x0(%rax,%rax,1)
mov    0x44e00080,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1130 <pll_setup_timers+0x30>
nop
testl  $0x30000,0x44e00080
jne    1140 <pll_setup_timers+0x40>
nopl   (%rax)
testl  $0x8,0x44e00004
je     1150 <pll_setup_timers+0x50>
nopl   (%rax)
testl  $0x10,0x44e0000c
je     1160 <pll_setup_timers+0x60>
nopl   (%rax)
testl  $0x30,0x44e0012c
je     1170 <pll_setup_timers+0x70>
nopl   (%rax)
testl  $0x4100,0x44e00000
je     1180 <pll_setup_timers+0x80>
ret

LLVM IR (-O0):
define void @pll_setup_timers() {
%1 = load volatile i32, i32* inttoptr (i64 1155532040 to i32*)
%2 = and i32 %1, -4
store volatile i32 %2, i32* inttoptr (i64 1155532040 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1155532040 to i32*)
%4 = or i32 %3, 1
store volatile i32 %4, i32* inttoptr (i64 1155532040 to i32*)
br label %5
5: ; preds = %9, %0
%6 = load volatile i32, i32* inttoptr (i64 1155532040 to i32*)
%7 = and i32 %6, 3
%8 = icmp ne i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
%11 = load volatile i32, i32* inttoptr (i64 1155530880 to i32*)
%12 = or i32 %11, 2
store volatile i32 %12, i32* inttoptr (i64 1155530880 to i32*)
br label %13
13: ; preds = %17, %10
%14 = load volatile i32, i32* inttoptr (i64 1155530880 to i32*)
%15 = and i32 %14, 3
%16 = icmp ne i32 %15, 2
br i1 %16, label %17, label %18
17: ; preds = %13
br label %13
18: ; preds = %13
br label %19
19: ; preds = %23, %18
%20 = load volatile i32, i32* inttoptr (i64 1155530880 to i32*)
%21 = and i32 %20, 196608
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %19
br label %19
24: ; preds = %19
br label %25
25: ; preds = %30, %24
%26 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%27 = and i32 %26, 8
%28 = icmp ne i32 %27, 0
%29 = xor i1 %28, true
br i1 %29, label %30, label %31
30: ; preds = %25
br label %25
31: ; preds = %25
br label %32
32: ; preds = %37, %31
%33 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%34 = and i32 %33, 16
%35 = icmp ne i32 %34, 0
%36 = xor i1 %35, true
br i1 %36, label %37, label %38
37: ; preds = %32
br label %32
38: ; preds = %32
br label %39
39: ; preds = %44, %38
%40 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%41 = and i32 %40, 48
%42 = icmp ne i32 %41, 0
%43 = xor i1 %42, true
br i1 %43, label %44, label %45
44: ; preds = %39
br label %39
45: ; preds = %39
br label %46
46: ; preds = %51, %45
%47 = load volatile i32, i32* inttoptr (i64 1155530752 to i32*)
%48 = and i32 %47, 16640
%49 = icmp ne i32 %48, 0
%50 = xor i1 %49, true
br i1 %50, label %51, label %52
51: ; preds = %46
br label %46
52: ; preds = %46
ret void
}

LLVM IR (-O2):
define void @pll_setup_timers() {
%1 = load volatile i32, i32* inttoptr (i64 1155532040 to i32*)
%2 = and i32 %1, -4
store volatile i32 %2, i32* inttoptr (i64 1155532040 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1155532040 to i32*)
%4 = or i32 %3, 1
store volatile i32 %4, i32* inttoptr (i64 1155532040 to i32*)
br label %5
5: ; preds = %5, %0
%6 = load volatile i32, i32* inttoptr (i64 1155532040 to i32*)
%7 = and i32 %6, 3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %5
9: ; preds = %5
%10 = load volatile i32, i32* inttoptr (i64 1155530880 to i32*)
%11 = or i32 %10, 2
store volatile i32 %11, i32* inttoptr (i64 1155530880 to i32*)
br label %12
12: ; preds = %12, %9
%13 = load volatile i32, i32* inttoptr (i64 1155530880 to i32*)
%14 = and i32 %13, 3
%15 = icmp eq i32 %14, 2
br i1 %15, label %16, label %12
16: ; preds = %12, %16
%17 = load volatile i32, i32* inttoptr (i64 1155530880 to i32*)
%18 = and i32 %17, 196608
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %16
20: ; preds = %16, %20
%21 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%22 = and i32 %21, 8
%23 = icmp eq i32 %22, 0
br i1 %23, label %20, label %24
24: ; preds = %20, %24
%25 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%26 = and i32 %25, 16
%27 = icmp eq i32 %26, 0
br i1 %27, label %24, label %28
28: ; preds = %24, %28
%29 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%30 = and i32 %29, 48
%31 = icmp eq i32 %30, 0
br i1 %31, label %28, label %32
32: ; preds = %28, %32
%33 = load volatile i32, i32* inttoptr (i64 1155530752 to i32*)
%34 = and i32 %33, 16640
%35 = icmp eq i32 %34, 0
br i1 %35, label %32, label %36
36: ; preds = %32
ret void
}