xunge/DecIR huggingface dataset:
unsigned int __isPATrange(void *addr) {
  if (addr > (void *)0x10000 && addr < (void *)0x800000)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<__isPATrange>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    $0x10000,%eax
cmp    %rax,-0x10(%rbp)
jbe    1132 <__isPATrange+0x32>
mov    $0x800000,%eax
cmp    %rax,-0x10(%rbp)
jae    1132 <__isPATrange+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1139 <__isPATrange+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__isPATrange>:
cmp    $0x10001,%rdi
setae  %al
cmp    $0x800000,%rdi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @__isPATrange(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ugt i8* %4, inttoptr (i64 65536 to i8*)
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = icmp ult i8* %7, inttoptr (i64 8388608 to i8*)
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @__isPATrange(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 65536 to i8*)
%3 = icmp ult i8* %0, inttoptr (i64 8388608 to i8*)
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
void PWMGenPeriodSet(unsigned long ulBase, unsigned long ulGen,
                     unsigned long ulPeriod) {
  ;
  ;
  ulGen = ((ulBase) + (ulGen));
  if ((*((volatile unsigned long *)(ulGen + 0x00000000))) & 0x00000002) {
    ;
    (*((volatile unsigned long *)(ulGen + 0x00000010))) = ulPeriod / 2;
  } else {
    ;
    (*((volatile unsigned long *)(ulGen + 0x00000010))) = ulPeriod - 1;
  }
}


x86 assembly (clang, -O0):
<PWMGenPeriodSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     1146 <PWMGenPeriodSet+0x46>
mov    -0x18(%rbp),%rcx
shr    $0x1,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x10(%rax)
jmp    1156 <PWMGenPeriodSet+0x56>
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenPeriodSet>:
lea    -0x1(%rdx),%rax
shr    %rdx
testq  $0x2,(%rsi,%rdi,1)
cmove  %rax,%rdx
mov    %rdx,0x10(%rsi,%rdi,1)
ret

LLVM IR (-O0):
define void @PWMGenPeriodSet(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = add i64 %7, %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = add i64 %10, 0
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, 2
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %3
%17 = load i64, i64* %6
%18 = udiv i64 %17, 2
%19 = load i64, i64* %5
%20 = add i64 %19, 16
%21 = inttoptr i64 %20 to i64*
store volatile i64 %18, i64* %21
br label %28
22: ; preds = %3
%23 = load i64, i64* %6
%24 = sub i64 %23, 1
%25 = load i64, i64* %5
%26 = add i64 %25, 16
%27 = inttoptr i64 %26 to i64*
store volatile i64 %24, i64* %27
br label %28
28: ; preds = %22, %16
ret void
}

LLVM IR (-O2):
define void @PWMGenPeriodSet(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %1, %0
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 2
%8 = icmp eq i64 %7, 0
%9 = add i64 %2, -1
%10 = lshr i64 %2, 1
%11 = select i1 %8, i64 %9, i64 %10
%12 = add i64 %4, 16
%13 = inttoptr i64 %12 to i64*
store volatile i64 %11, i64* %13
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mbstate_t;

/* Variables and functions */
size_t mbrlen(const char *s, size_t n, mbstate_t *ps) { return (n != 0); }


x86 assembly (clang, -O0):
<mbrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbrlen>:
xor    %eax,%eax
test   %rsi,%rsi
setne  %al
ret

LLVM IR (-O0):
define i64 @mbrlen(i8* %0, i64 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
%7 = load i64, i64* %5
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
define i64 @mbrlen(i8* nocapture readnone %0, i64 %1, i32* nocapture readnone %2) {
%4 = icmp ne i64 %1, 0
%5 = zext i1 %4 to i64
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, float const, float const,
                          float const);
void printDirection(const char *name, const float vec[4]) {
  printf("direction %s = [ %g %g %g ]\n", name, vec[0], vec[1], vec[2]);
}


x86 assembly (clang, -O0):
<printDirection>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm2
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printDirection>:
mov    %rdi,%rax
movss  (%rsi),%xmm0
movss  0x4(%rsi),%xmm1
movss  0x8(%rsi),%xmm2
lea    0xed8(%rip),%rdi
mov    %rax,%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"direction %s = [ %g %g %g ]\0A\00"
define void @printDirection(i8* %0, float* %1) {
%3 = alloca i8*
%4 = alloca float*
store i8* %0, i8** %3
store float* %1, float** %4
%5 = load i8*, i8** %3
%6 = load float*, float** %4
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = load float*, float** %4
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = load float*, float** %4
%13 = getelementptr inbounds float, float* %12, i64 2
%14 = load float, float* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %5, float %8, float %11, float %14)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"direction %s = [ %g %g %g ]\0A\00"
define void @printDirection(i8* %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = getelementptr inbounds float, float* %1, i64 1
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %1, i64 2
%7 = load float, float* %6
%8 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %0, float %3, float %5, float %7)
ret void
}
void __Default_Handler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<__Default_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__Default_Handler+0x9>
jmp    1109 <__Default_Handler+0x9>

x86 assembly (clang, -O2):
<__Default_Handler>:
jmp    1100 <__Default_Handler>

LLVM IR (-O0):
define void @__Default_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @__Default_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
unsigned int cvtBitsToUlong(unsigned int src, unsigned bitFieldOffset,
                            unsigned bitFieldLength) {
  unsigned int mask;
  src = src >> bitFieldOffset;
  mask = (1 << bitFieldLength) - 1;
  src = src & mask;
  return src;
}


x86 assembly (clang, -O0):
<cvtBitsToUlong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvtBitsToUlong>:
mov    %esi,%ecx
shr    %cl,%edi
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cvtBitsToUlong(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = lshr i32 %8, %9
store i32 %10, i32* %4
%11 = load i32, i32* %6
%12 = shl i32 1, %11
%13 = sub nsw i32 %12, 1
store i32 %13, i32* %7
%14 = load i32, i32* %4
%15 = load i32, i32* %7
%16 = and i32 %14, %15
store i32 %16, i32* %4
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @cvtBitsToUlong(i32 %0, i32 %1, i32 %2) {
%4 = lshr i32 %0, %1
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *getText(int);
int /*<<< orphan*/ send_http_header(int, int);
int /*<<< orphan*/ write_st(int, char *, int);
void write_detailpage(int fd, int id) {
  send_http_header(fd, 200);
  char *txt = getText(40);
  write_st(fd, txt, id);
  free(txt);
}


x86 assembly (clang, -O0):
<write_detailpage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xc8,%esi
call   1040 <send_http_header@plt>
mov    $0x28,%edi
call   1050 <getText@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edx
call   1060 <write_st@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_detailpage>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
mov    $0xc8,%esi
call   1040 <send_http_header@plt>
mov    $0x28,%edi
call   1050 <getText@plt>
mov    %rax,%rbx
mov    %ebp,%edi
mov    %rax,%rsi
mov    %r14d,%edx
call   1060 <write_st@plt>
mov    %rbx,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @write_detailpage(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @send_http_header(i32 %6, i32 200)
%8 = call i8* @getText(i32 40)
store i8* %8, i8** %5
%9 = load i32, i32* %3
%10 = load i8*, i8** %5
%11 = load i32, i32* %4
%12 = call i32 @write_st(i32 %9, i8* %10, i32 %11)
%13 = load i8*, i8** %5
%14 = call i32 @free(i8* %13)
ret void
}

LLVM IR (-O2):
define void @write_detailpage(i32 %0, i32 %1) {
%3 = tail call i32 @send_http_header(i32 %0, i32 200)
%4 = tail call i8* @getText(i32 40)
%5 = tail call i32 @write_st(i32 %0, i8* %4, i32 %1)
%6 = tail call i32 @free(i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("Usage: tcptest -s|-c host:port [size] [count] [interval]\n"
         "         size        Packet size to send or receive.\n"
         "         count       Total packet count to send or receive.\n"
         "                     0 for infinity.\n"
         "         interval    Send or receive interval, in milliseconds.\n"
         "\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [273 x i8] c"Usage: tcptest -s|-c host:port [size] [count] [interval]\0A size Packet size to send or receive.\0A count Total packet count to send or receive.\0A 0 for infinity.\0A interval Send or receive interval, in milliseconds.\0A\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([273 x i8], [273 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@str = [272 x i8] c"Usage: tcptest -s|-c host:port [size] [count] [interval]\0A size Packet size to send or receive.\0A count Total packet count to send or receive.\0A 0 for infinity.\0A interval Send or receive interval, in milliseconds.\0A\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([272 x i8], [272 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void panic(const char *serror) {
  printf("%s", serror);
  exit(1);
}


x86 assembly (clang, -O0):
<panic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<panic>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @panic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @panic(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct iso_primary_descriptor {
  int dummy;
};
typedef int /*<<< orphan*/ iso_header;

/* Variables and functions */
scalar_t__ memcmp(struct iso_primary_descriptor const *, unsigned char const *,
                  int);
int test_ISO(const struct iso_primary_descriptor *iso) {
  static const unsigned char iso_header[6] = {0x01, 'C', 'D', '0', '0', '1'};
  if (memcmp(iso, iso_header, sizeof(iso_header)) != 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<test_ISO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x6,%edx
call   1030 <memcmp@plt>
cmp    $0x0,%rax
je     1147 <test_ISO+0x37>
movl   $0x1,-0x4(%rbp)
jmp    114e <test_ISO+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ISO>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x6,%edx
call   1030 <memcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.iso_primary_descriptor = type { i32 }
@test_ISO.iso_header = internal constant [6 x i8] c"\01CD001"
define i32 @test_ISO(%struct.iso_primary_descriptor* %0) {
%2 = alloca i32
%3 = alloca %struct.iso_primary_descriptor*
store %struct.iso_primary_descriptor* %0, %struct.iso_primary_descriptor** %3
%4 = load %struct.iso_primary_descriptor*, %struct.iso_primary_descriptor** %3
%5 = call i64 @memcmp(%struct.iso_primary_descriptor* %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @test_ISO.iso_header, i64 0, i64 0), i32 6)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
%struct.iso_primary_descriptor = type { i32 }
@test_ISO.iso_header = internal constant [6 x i8] c"\01CD001"
define i32 @test_ISO(%struct.iso_primary_descriptor* %0) {
%2 = tail call i64 @memcmp(%struct.iso_primary_descriptor* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @test_ISO.iso_header, i64 0, i64 0), i32 6)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int cast_long_int_fast(long int x) { return (int)x; }


x86 assembly (clang, -O0):
<cast_long_int_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_long_int_fast>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @cast_long_int_fast(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @cast_long_int_fast(i64 %0) {
%2 = trunc i64 %0 to i32
ret i32 %2
}
int isnan(double x) {
  long hx, lx;
  lx = *(unsigned long long *)&x;
  hx = (*(unsigned long long *)&x) >> 32;
  hx &= 0x7fffffff;
  hx |= (unsigned long)(lx | (-lx)) >> 31;
  hx = 0x7ff00000 - hx;
  return (int)(((unsigned long)hx) >> 31);
}


x86 assembly (clang, -O0):
<isnan>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x20,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7fffffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x18(%rbp),%rcx
or     %rcx,%rax
shr    $0x1f,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x7ff00000,%eax
sub    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x1f,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnan>:
movq   %xmm0,%rax
mov    %rax,%rcx
neg    %rcx
or     %rax,%rcx
shr    $0x20,%rax
and    $0x7fffffff,%eax
shr    $0x1f,%rcx
or     %rax,%rcx
mov    $0x7ff00000,%eax
sub    %rcx,%rax
shr    $0x1f,%rax
ret

LLVM IR (-O0):
define i32 @isnan(double %0) {
%2 = alloca double
%3 = alloca i64
%4 = alloca i64
store double %0, double* %2
%5 = bitcast double* %2 to i64*
%6 = load i64, i64* %5
store i64 %6, i64* %4
%7 = bitcast double* %2 to i64*
%8 = load i64, i64* %7
%9 = lshr i64 %8, 32
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = and i64 %10, 2147483647
store i64 %11, i64* %3
%12 = load i64, i64* %4
%13 = load i64, i64* %4
%14 = sub nsw i64 0, %13
%15 = or i64 %12, %14
%16 = lshr i64 %15, 31
%17 = load i64, i64* %3
%18 = or i64 %17, %16
store i64 %18, i64* %3
%19 = load i64, i64* %3
%20 = sub nsw i64 2146435072, %19
store i64 %20, i64* %3
%21 = load i64, i64* %3
%22 = lshr i64 %21, 31
%23 = trunc i64 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @isnan(double %0) {
%2 = bitcast double %0 to i64
%3 = lshr i64 %2, 32
%4 = and i64 %3, 2147483647
%5 = sub nsw i64 0, %2
%6 = or i64 %2, %5
%7 = lshr i64 %6, 31
%8 = or i64 %4, %7
%9 = sub nsw i64 2146435072, %8
%10 = lshr i64 %9, 31
%11 = trunc i64 %10 to i32
ret i32 %11
}
int toto(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<toto>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toto>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @toto(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @toto(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
const int main() {}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SyncChr();
int /*<<< orphan*/ SyncMirr();
int /*<<< orphan*/ SyncPrg();
void StateRestore(int version) {
  SyncPrg();
  SyncChr();
  SyncMirr();
}


x86 assembly (clang, -O0):
<StateRestore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <SyncPrg@plt>
mov    $0x0,%al
call   1040 <SyncChr@plt>
mov    $0x0,%al
call   1030 <SyncMirr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StateRestore>:
push   %rax
xor    %eax,%eax
call   1050 <SyncPrg@plt>
xor    %eax,%eax
call   1040 <SyncChr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <SyncMirr@plt>

LLVM IR (-O0):
define void @StateRestore(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @SyncPrg()
%4 = call i32 (...) @SyncChr()
%5 = call i32 (...) @SyncMirr()
ret void
}

LLVM IR (-O2):
define void @StateRestore(i32 %0) {
%2 = tail call i32 (...) @SyncPrg()
%3 = tail call i32 (...) @SyncChr()
%4 = tail call i32 (...) @SyncMirr()
ret void
}
int is_eligible_distance(int point1x, int point1y, int point2x, int point2y,
                         int width, int height) {
  const int thresh = (width < height ? height : width) >> 4;
  return ((point1x - point2x) * (point1x - point2x) +
          (point1y - point2y) * (point1y - point2y)) <= thresh * thresh;
}


x86 assembly (clang, -O0):
<is_eligible_distance>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    112f <is_eligible_distance+0x2f>
mov    -0x18(%rbp),%eax
mov    %eax,-0x20(%rbp)
jmp    1135 <is_eligible_distance+0x35>
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
sar    $0x4,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    -0xc(%rbp),%ecx
imul   %ecx,%eax
mov    -0x8(%rbp),%ecx
sub    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%edx
sub    -0x10(%rbp),%edx
imul   %edx,%ecx
add    %ecx,%eax
mov    -0x1c(%rbp),%ecx
imul   -0x1c(%rbp),%ecx
cmp    %ecx,%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_eligible_distance>:
cmp    %r9d,%r8d
cmovl  %r9d,%r8d
sar    $0x4,%r8d
sub    %edx,%edi
imul   %edi,%edi
sub    %ecx,%esi
imul   %esi,%esi
add    %edi,%esi
imul   %r8d,%r8d
xor    %eax,%eax
cmp    %r8d,%esi
setbe  %al
ret

LLVM IR (-O0):
define i32 @is_eligible_distance(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%14 = load i32, i32* %11
%15 = load i32, i32* %12
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %6
%18 = load i32, i32* %12
br label %21
19: ; preds = %6
%20 = load i32, i32* %11
br label %21
21: ; preds = %19, %17
%22 = phi i32 [ %18, %17 ], [ %20, %19 ]
%23 = ashr i32 %22, 4
store i32 %23, i32* %13
%24 = load i32, i32* %7
%25 = load i32, i32* %9
%26 = sub nsw i32 %24, %25
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = sub nsw i32 %27, %28
%30 = mul nsw i32 %26, %29
%31 = load i32, i32* %8
%32 = load i32, i32* %10
%33 = sub nsw i32 %31, %32
%34 = load i32, i32* %8
%35 = load i32, i32* %10
%36 = sub nsw i32 %34, %35
%37 = mul nsw i32 %33, %36
%38 = add nsw i32 %30, %37
%39 = load i32, i32* %13
%40 = load i32, i32* %13
%41 = mul nsw i32 %39, %40
%42 = icmp sle i32 %38, %41
%43 = zext i1 %42 to i32
ret i32 %43
}

LLVM IR (-O2):
define i32 @is_eligible_distance(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = icmp slt i32 %4, %5
%8 = select i1 %7, i32 %5, i32 %4
%9 = ashr i32 %8, 4
%10 = sub nsw i32 %0, %2
%11 = mul nsw i32 %10, %10
%12 = sub nsw i32 %1, %3
%13 = mul nsw i32 %12, %12
%14 = add nuw nsw i32 %13, %11
%15 = mul nsw i32 %9, %9
%16 = icmp ule i32 %14, %15
%17 = zext i1 %16 to i32
ret i32 %17
}
unsigned xrop3_87_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T | S;
  stk1 = D & stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_87_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_87_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
or     %edi,%esi
or     %esi,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_87_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %6
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = and i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_87_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = or i8 %1, %0
%6 = zext i8 %5 to i32
%7 = or i32 %4, %6
%8 = xor i32 %7, -1
%9 = or i32 %8, %3
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void add_eax_imm32(unsigned int imm32) {
  put8(0x05);
  put32(imm32);
}


x86 assembly (clang, -O0):
<add_eax_imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_eax_imm32>:
push   %rbx
mov    %edi,%ebx
mov    $0x5,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @add_eax_imm32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @put8(i32 5)
%4 = load i32, i32* %2
%5 = call i32 @put32(i32 %4)
ret void
}

LLVM IR (-O2):
define void @add_eax_imm32(i32 %0) {
%2 = tail call i32 @put8(i32 5)
%3 = tail call i32 @put32(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct dhcpmsg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_u8_option(struct dhcpmsg *, int, int /*<<< orphan*/);
void add_option_msgtype(struct dhcpmsg *packet, uint8_t type) {
  add_u8_option(packet, 0x35, type);
}


x86 assembly (clang, -O0):
<add_option_msgtype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x35,%esi
call   1030 <add_u8_option@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_option_msgtype>:
mov    %esi,%edx
mov    $0x35,%esi
jmp    1030 <add_u8_option@plt>

LLVM IR (-O0):
%struct.dhcpmsg = type { i32 }
define void @add_option_msgtype(%struct.dhcpmsg* %0, i32 %1) {
%3 = alloca %struct.dhcpmsg*
%4 = alloca i32
store %struct.dhcpmsg* %0, %struct.dhcpmsg** %3
store i32 %1, i32* %4
%5 = load %struct.dhcpmsg*, %struct.dhcpmsg** %3
%6 = load i32, i32* %4
%7 = call i32 @add_u8_option(%struct.dhcpmsg* %5, i32 53, i32 %6)
ret void
}

LLVM IR (-O2):
%struct.dhcpmsg = type { i32 }
define void @add_option_msgtype(%struct.dhcpmsg* %0, i32 %1) {
%3 = tail call i32 @add_u8_option(%struct.dhcpmsg* %0, i32 53, i32 %1)
ret void
}
int fn1(int a, int b) {
  int tem1 = a & b;
  int tem2 = a ^ b;
  return tem1 + tem2;
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = and i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = xor i32 %10, %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = add nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @fn1(i32 %0, i32 %1) {
%3 = or i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ even(int *, int);
int main(void) {
  int len = 4;
  int list[] = {1, 2, 3, 4};
  even(list, len);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed0(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1030 <even@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1030 <even@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.list = [4 x i32] [i32 1, i32 2, i32 3, i32 4]
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [4 x i32]
store i32 0, i32* %1
store i32 4, i32* %2
%4 = bitcast [4 x i32]* %3 to i8*
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i32 @even(i32* %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.list = [4 x i32] [i32 1, i32 2, i32 3, i32 4]
define i32 @main() {
%1 = alloca [4 x i32]
%2 = bitcast [4 x i32]* %1 to i8*
%3 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%4 = call i32 @even(i32* %3, i32 4)
ret i32 0
}
int test_04(unsigned short *a) { return *a == 0; }


x86 assembly (clang, -O0):
<test_04>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_04>:
xor    %eax,%eax
cmpw   $0x0,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @test_04(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_04(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = icmp eq i16 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int int_abs(int a) { return a < 0 ? -a : a; }


x86 assembly (clang, -O0):
<int_abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <int_abs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <int_abs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @int_abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @int_abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int m_strlen(char const *);
char *xmemdup(char const *, int);
char *m_strdup(const char *s) {
  ssize_t len = m_strlen(s);
  return len ? xmemdup((s), (ssize_t)sizeof(*(s)) * (len + 1)) : NULL;
}


x86 assembly (clang, -O0):
<m_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <m_strlen@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115d <m_strdup+0x3d>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
add    $0x1,%esi
shl    $0x0,%esi
call   1040 <xmemdup@plt>
mov    %rax,-0x18(%rbp)
jmp    1168 <m_strdup+0x48>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    1168 <m_strdup+0x48>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_strdup>:
push   %rbx
mov    %rdi,%rbx
call   1030 <m_strlen@plt>
test   %eax,%eax
je     113b <m_strdup+0x1b>
add    $0x1,%eax
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <xmemdup@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @m_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @m_strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
%12 = mul nsw i32 1, %11
%13 = call i8* @xmemdup(i8* %9, i32 %12)
br label %15
14: ; preds = %1
br label %15
15: ; preds = %14, %8
%16 = phi i8* [ %13, %8 ], [ null, %14 ]
ret i8* %16
}

LLVM IR (-O2):
define i8* @m_strdup(i8* %0) {
%2 = tail call i32 @m_strlen(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = add nsw i32 %2, 1
%6 = tail call i8* @xmemdup(i8* %0, i32 %5)
br label %7
7: ; preds = %1, %4
%8 = phi i8* [ %6, %4 ], [ null, %1 ]
ret i8* %8
}
int test_imm_DFint64_midword_reg(long long val) {
  return ((val >> 16) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xdf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFint64_midword_reg>:
test   $0xdf0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 223
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DFint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14614528
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
bool ConditionTrue(void) { return true; }


x86 assembly (clang, -O0):
<ConditionTrue>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConditionTrue>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ConditionTrue() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ConditionTrue() {
ret i32 1
}
void outl_p(unsigned short port, unsigned long value) {
  asm volatile("outl %%eax,%%dx"
               ";outb %%al,$0x80" ::"d"(port),
               "a"(value));
}


x86 assembly (clang, -O0):
<outl_p>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rax
out    %eax,(%dx)
out    %al,$0x80
pop    %rbp
ret

x86 assembly (clang, -O2):
<outl_p>:
mov    %rsi,%rax
mov    %edi,%edx
out    %eax,(%dx)
out    %al,$0x80
ret

LLVM IR (-O0):
define void @outl_p(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = load i64, i64* %4
ret void
}

LLVM IR (-O2):
define void @outl_p(i16 zeroext %0, i64 %1) {
tail call void asm sideeffect "outl %eax,%dx;outb %al,$$0x80", "{dx},{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void alloc_report() { printf("Allocated chunks: 0\n"); }


x86 assembly (clang, -O0):
<alloc_report>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_report>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Allocated chunks: 0\0A\00"
define void @alloc_report() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"Allocated chunks: 0\00"
define void @alloc_report() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
int is_letter(char c) {
  if (c >= 'A' && c <= 'Z')
    return 1;
  if (c >= 'a' && c <= 'z')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1130 <is_letter+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1130 <is_letter+0x30>
movl   $0x1,-0x4(%rbp)
jmp    115d <is_letter+0x5d>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1156 <is_letter+0x56>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1156 <is_letter+0x56>
movl   $0x1,-0x4(%rbp)
jmp    115d <is_letter+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_letter>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_letter(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %22
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 97
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 122
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %2
br label %22
21: ; preds = %16, %12
store i32 0, i32* %2
br label %22
22: ; preds = %21, %20, %11
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @is_letter(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
main() {
  short td;
  td = 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movw   $0x5,-0x2(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i16
store i16 5, i16* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int a(sometype, y) { return 0; }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @a(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @a(i32 %0, i32 %1) {
ret i32 0
}
void GetModelMass(double *subjectMass) {}


x86 assembly (clang, -O0):
<GetModelMass>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetModelMass>:
ret

LLVM IR (-O0):
define void @GetModelMass(double* %0) {
%2 = alloca double*
store double* %0, double** %2
ret void
}

LLVM IR (-O2):
define void @GetModelMass(double* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ VDP_drawText(char *, int, int);
int /*<<< orphan*/ VDP_init();
int /*<<< orphan*/ showExceptionDump(int);
void _privilegeviolation_callback() {
  VDP_init();
  VDP_drawText("PRIVILEGE VIOLATION !", 5, 3);
  showExceptionDump(5);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<_privilegeviolation_callback>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <VDP_init@plt>
lea    0xebe(%rip),%rdi
mov    $0x5,%esi
mov    $0x3,%edx
call   1050 <VDP_drawText@plt>
mov    $0x5,%edi
call   1040 <showExceptionDump@plt>
jmp    115b <_privilegeviolation_callback+0x2b>

x86 assembly (clang, -O2):
<_privilegeviolation_callback>:
push   %rax
xor    %eax,%eax
call   1030 <VDP_init@plt>
lea    0xec1(%rip),%rdi
mov    $0x5,%esi
mov    $0x3,%edx
call   1050 <VDP_drawText@plt>
mov    $0x5,%edi
call   1040 <showExceptionDump@plt>
nopl   0x0(%rax,%rax,1)
jmp    1160 <_privilegeviolation_callback+0x30>

LLVM IR (-O0):
@.str = [22 x i8] c"PRIVILEGE VIOLATION !\00"
define void @_privilegeviolation_callback() {
%1 = call i32 (...) @VDP_init()
%2 = call i32 @VDP_drawText(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 5, i32 3)
%3 = call i32 @showExceptionDump(i32 5)
br label %4
4: ; preds = %0, %4
br label %4
}

LLVM IR (-O2):
@.str = [22 x i8] c"PRIVILEGE VIOLATION !\00"
define void @_privilegeviolation_callback() {
%1 = tail call i32 (...) @VDP_init()
%2 = tail call i32 @VDP_drawText(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 5, i32 3)
%3 = tail call i32 @showExceptionDump(i32 5)
br label %4
4: ; preds = %0, %4
br label %4
}
void X509_CINF_free(void) {}


x86 assembly (clang, -O0):
<X509_CINF_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_CINF_free>:
ret

LLVM IR (-O0):
define void @X509_CINF_free() {
ret void
}

LLVM IR (-O2):
define void @X509_CINF_free() {
ret void
}
/* Variables and functions */
int COLS;
int LINES;
int /*<<< orphan*/ addch(char);
int /*<<< orphan*/ move(int, int);
int /*<<< orphan*/ refresh();
void printChar(char character) {
  move(LINES / 2, COLS / 2);
  addch(character);
  refresh();
}


x86 assembly (clang, -O0):
<printChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    0x2ea3(%rip),%rax
mov    (%rax),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    0x2e88(%rip),%rax
mov    (%rax),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
call   1050 <move@plt>
movsbl -0x1(%rbp),%edi
call   1030 <addch@plt>
mov    $0x0,%al
call   1040 <refresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printChar>:
push   %rbx
mov    %edi,%ebx
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
mov    %eax,%edi
shr    $0x1f,%edi
add    %eax,%edi
sar    %edi
mov    0x2e94(%rip),%rax
mov    (%rax),%eax
mov    %eax,%esi
shr    $0x1f,%esi
add    %eax,%esi
sar    %esi
call   1050 <move@plt>
mov    %ebx,%edi
call   1030 <addch@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <refresh@plt>

LLVM IR (-O0):
@LINES = global i32 0
@COLS = global i32 0
define void @printChar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i32, i32* @LINES
%4 = sdiv i32 %3, 2
%5 = load i32, i32* @COLS
%6 = sdiv i32 %5, 2
%7 = call i32 @move(i32 %4, i32 %6)
%8 = load i8, i8* %2
%9 = call i32 @addch(i8 signext %8)
%10 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
@LINES = global i32 0
@COLS = global i32 0
define void @printChar(i8 signext %0) {
%2 = load i32, i32* @LINES
%3 = sdiv i32 %2, 2
%4 = load i32, i32* @COLS
%5 = sdiv i32 %4, 2
%6 = tail call i32 @move(i32 %3, i32 %5)
%7 = tail call i32 @addch(i8 signext %0)
%8 = tail call i32 (...) @refresh()
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
int RandomInteger(int low, int high) {
  int k;
  double d;
  d = (double)rand() / ((double)RAND_MAX + 1);
  k = (int)(d * (high - low + 1));
  return (low + k);
}


x86 assembly (clang, -O0):
<RandomInteger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eb7(%rip),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xec2(%rip),%xmm2
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomInteger>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ebe(%rip),%rax
cvtsi2sdq (%rax),%xmm1
addsd  0xec9(%rip),%xmm1
divsd  %xmm1,%xmm0
sub    %ebp,%ebx
add    $0x1,%ebx
xorps  %xmm1,%xmm1
cvtsi2sd %ebx,%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define i32 @RandomInteger(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = call i64 (...) @rand()
%8 = sitofp i64 %7 to double
%9 = load i64, i64* @RAND_MAX
%10 = sitofp i64 %9 to double
%11 = fadd double %10, 1.000000e+00
%12 = fdiv double %8, %11
store double %12, double* %6
%13 = load double, double* %6
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = sub nsw i32 %14, %15
%17 = add nsw i32 %16, 1
%18 = sitofp i32 %17 to double
%19 = fmul double %13, %18
%20 = fptosi double %19 to i32
store i32 %20, i32* %5
%21 = load i32, i32* %3
%22 = load i32, i32* %5
%23 = add nsw i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define i32 @RandomInteger(i32 %0, i32 %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to double
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fadd double %6, 1.000000e+00
%8 = fdiv double %4, %7
%9 = sub i32 1, %0
%10 = add i32 %9, %1
%11 = sitofp i32 %10 to double
%12 = fmul double %8, %11
%13 = fptosi double %12 to i32
%14 = add nsw i32 %13, %0
ret i32 %14
}
/* Variables and functions */
int g(int);
int /*<<< orphan*/ printf(char *, int);
int f(int param1) {
  int g1;
  printf("f(%d)\n", param1);
  g1 = param1;
  if (param1 > 1) {
    g1 = g(param1 - 1);
  }
  return g1;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    1158 <f+0x38>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1040 <g@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    $0x2,%ebx
jl     1141 <f+0x21>
add    $0xffffffff,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <g@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"f(%d)\0A\00"
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 1
%12 = call i32 @g(i32 %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [7 x i8] c"f(%d)\0A\00"
define i32 @f(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = add nsw i32 %0, -1
%6 = tail call i32 @g(i32 %5)
br label %7
7: ; preds = %4, %1
%8 = phi i32 [ %6, %4 ], [ %0, %1 ]
ret i32 %8
}
int yywrap(void) { return (1); }


x86 assembly (clang, -O0):
<yywrap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yywrap>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @yywrap() {
ret i32 1
}

LLVM IR (-O2):
define i32 @yywrap() {
ret i32 1
}