xunge/DecIR huggingface dataset:
/* Variables and functions */
int Cyc_Toc_is_boxed_tvar(void *);
int Cyc_Toc_is_void_star(void *);
int Cyc_Toc_is_void_star_or_boxed_tvar(void *t) {
  int _T0;
  int _T1;
  _T1 = Cyc_Toc_is_void_star(t);
  if (!_T1)
    goto _TL80;
  _T0 = 1;
  goto _TL81;
_TL80:
  _T0 = Cyc_Toc_is_boxed_tvar(t);
_TL81:
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_Toc_is_void_star_or_boxed_tvar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Cyc_Toc_is_void_star@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1147 <Cyc_Toc_is_void_star_or_boxed_tvar+0x27>
jmp    1153 <Cyc_Toc_is_void_star_or_boxed_tvar+0x33>
movl   $0x1,-0xc(%rbp)
jmp    115f <Cyc_Toc_is_void_star_or_boxed_tvar+0x3f>
mov    -0x8(%rbp),%rdi
call   1040 <Cyc_Toc_is_boxed_tvar@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Toc_is_void_star_or_boxed_tvar>:
push   %rbx
mov    %rdi,%rbx
call   1030 <Cyc_Toc_is_void_star@plt>
test   %eax,%eax
je     1134 <Cyc_Toc_is_void_star_or_boxed_tvar+0x14>
mov    $0x1,%eax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <Cyc_Toc_is_boxed_tvar@plt>

LLVM IR (-O0):
define i32 @Cyc_Toc_is_void_star_or_boxed_tvar(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @Cyc_Toc_is_void_star(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %1
br label %11
10: ; preds = %1
store i32 1, i32* %3
br label %14
11: ; preds = %9
%12 = load i8*, i8** %2
%13 = call i32 @Cyc_Toc_is_boxed_tvar(i8* %12)
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @Cyc_Toc_is_void_star_or_boxed_tvar(i8* %0) {
%2 = tail call i32 @Cyc_Toc_is_void_star(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @Cyc_Toc_is_boxed_tvar(i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 1, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ binarraytobinstring(char *, char *, int);
int hextobinarray(char *, char *);
int hextobinstring(char *target, char *source) {
  int length;
  if (!(length = hextobinarray(target, source)))
    return 0;
  binarraytobinstring(target, target, length);
  return length;
}


x86 assembly (clang, -O0):
<hextobinstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <hextobinarray@plt>
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
jne    1155 <hextobinstring+0x35>
movl   $0x0,-0x4(%rbp)
jmp    116b <hextobinstring+0x4b>
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <binarraytobinstring@plt>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hextobinstring>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <hextobinarray@plt>
mov    %eax,%ebp
test   %eax,%eax
je     113e <hextobinstring+0x1e>
mov    %rbx,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1030 <binarraytobinstring@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @hextobinstring(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @hextobinarray(i8* %7, i8* %8)
store i32 %9, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 0, i32* %3
br label %18
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = load i8*, i8** %4
%15 = load i32, i32* %6
%16 = call i32 @binarraytobinstring(i8* %13, i8* %14, i32 %15)
%17 = load i32, i32* %6
store i32 %17, i32* %3
br label %18
18: ; preds = %12, %11
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @hextobinstring(i8* %0, i8* %1) {
%3 = tail call i32 @hextobinarray(i8* %0, i8* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @binarraytobinstring(i8* %0, i8* %0, i32 %3)
br label %7
7: ; preds = %2, %5
ret i32 %3
}
/* Variables and functions */
int rand();
int rand_range(int _min, int _max) {
  return (rand() % (_max - _min + 1)) + _min;
}


x86 assembly (clang, -O0):
<rand_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_range>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rand_range(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rand_range(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
double rnd(next)
unsigned long *next;
{
  double r;
  *next = *next * 1103515245L + 12345;
  r = (*next / 65536L) % 32768L;
  return (r / 32767);
}


x86 assembly (clang, -O0):
<rnd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
imul   $0x41c64e6d,%rcx,%rcx
add    $0x3039,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%eax
and    $0x7fff,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xebe(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd>:
imul   $0x41c64e6d,(%rdi),%rax
add    $0x3039,%rax
mov    %rax,(%rdi)
shr    $0x10,%eax
and    $0x7fff,%eax
cvtsi2sd %eax,%xmm0
divsd  0xedc(%rip),%xmm0
ret

LLVM IR (-O0):
define double @rnd(i64* %0) {
%2 = alloca i64*
%3 = alloca double
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = load i64, i64* %4
%6 = mul i64 %5, 1103515245
%7 = add i64 %6, 12345
%8 = load i64*, i64** %2
store i64 %7, i64* %8
%9 = load i64*, i64** %2
%10 = load i64, i64* %9
%11 = udiv i64 %10, 65536
%12 = urem i64 %11, 32768
%13 = uitofp i64 %12 to double
store double %13, double* %3
%14 = load double, double* %3
%15 = fdiv double %14, 3.276700e+04
ret double %15
}

LLVM IR (-O2):
define double @rnd(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = mul i64 %2, 1103515245
%4 = add i64 %3, 12345
store i64 %4, i64* %0
%5 = lshr i64 %4, 16
%6 = and i64 %5, 32767
%7 = uitofp i64 %6 to double
%8 = fdiv double %7, 3.276700e+04
ret double %8
}
unsigned char *dhcp_skip_opts(unsigned char *start) {
  while (*start != 0)
    start += start[1] + 2;
  return start;
}


x86 assembly (clang, -O0):
<dhcp_skip_opts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
je     1136 <dhcp_skip_opts+0x36>
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%ecx
add    $0x2,%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <dhcp_skip_opts+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dhcp_skip_opts>:
cmpb   $0x0,(%rdi)
je     1127 <dhcp_skip_opts+0x27>
cs nopw 0x0(%rax,%rax,1)
nop
movzbl 0x1(%rdi),%ecx
lea    (%rcx,%rdi,1),%rax
add    $0x2,%rax
cmpb   $0x0,0x2(%rcx,%rdi,1)
mov    %rax,%rdi
jne    1110 <dhcp_skip_opts+0x10>
ret
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @dhcp_skip_opts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = add nsw i32 %12, 2
%14 = load i8*, i8** %2
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i8, i8* %14, i64 %15
store i8* %16, i8** %2
br label %3
17: ; preds = %3
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @dhcp_skip_opts(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %10, %4 ], [ %0, %1 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = zext i8 %7 to i64
%9 = add nuw nsw i64 %8, 2
%10 = getelementptr inbounds i8, i8* %5, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
%14 = phi i8* [ %0, %1 ], [ %10, %4 ]
ret i8* %14
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpnle_ss(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_cmpnle_ss(__m128 __a, __m128 __b) {
  return _mm_cmpnle_ss(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpnle_ss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpnle_ss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpnle_ss>:
jmp    1030 <_mm_cmpnle_ss@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpnle_ss(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpnle_ss(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpnle_ss(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpnle_ss(i32 %0, i32 %1)
ret i32 %3
}
int temple(element)
int element;
{
  switch (element) {
  case 21:
  case 70:
  case 71:
  case 75:
  case 76:
  case 91:
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<temple>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x15,%eax
je     1154 <temple+0x54>
jmp    111b <temple+0x1b>
mov    -0xc(%rbp),%eax
add    $0xffffffba,%eax
sub    $0x2,%eax
jb     1154 <temple+0x54>
jmp    112f <temple+0x2f>
mov    -0xc(%rbp),%eax
add    $0xffffffb5,%eax
sub    $0x2,%eax
jb     1154 <temple+0x54>
jmp    1143 <temple+0x43>
mov    -0xc(%rbp),%eax
sub    $0x5b,%eax
jne    1160 <temple+0x60>
jmp    1154 <temple+0x54>
movl   $0x1,-0x4(%rbp)
jmp    1167 <temple+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<temple>:
mov    $0x1,%eax
lea    -0x46(%rdi),%ecx
cmp    $0x15,%ecx
ja     1118 <temple+0x18>
mov    $0x200063,%edx
bt     %ecx,%edx
jae    1118 <temple+0x18>
ret
cmp    $0x15,%edi
je     1117 <temple+0x17>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @temple(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 21, label %5
i32 70, label %5
i32 71, label %5
i32 75, label %5
i32 76, label %5
i32 91, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @temple(i32 %0) {
switch i32 %0, label %2 [
i32 21, label %3
i32 70, label %3
i32 71, label %3
i32 75, label %3
i32 76, label %3
i32 91, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
int test_imm_46uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x46 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_46uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x46,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_46uint64_lowword_reg>:
test   $0x46,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_46uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 70
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_46uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 70
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void error_context_key_del(void *arg) { free(arg); }


x86 assembly (clang, -O0):
<error_context_key_del>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_context_key_del>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @error_context_key_del(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @error_context_key_del(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
void test_stdout_buf_size() {
  int i;
  for (i = 0; i < 4096; ++i)
    printf("a");
  sleep(3);
  printf("b");
  sleep(10);
}


x86 assembly (clang, -O0):
<test_stdout_buf_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x1000,-0x4(%rbp)
jge    1156 <test_stdout_buf_size+0x36>
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <test_stdout_buf_size+0xf>
mov    $0x3,%edi
call   1040 <sleep@plt>
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_stdout_buf_size>:
push   %rbx
mov    $0x1000,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    $0x61,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1130 <test_stdout_buf_size+0x10>
mov    $0x3,%edi
call   1040 <sleep@plt>
mov    $0x62,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"a\00"
@.str.1 = [2 x i8] c"b\00"
define void @test_stdout_buf_size() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 4096
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
%11 = call i32 @sleep(i32 3)
%12 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%13 = call i32 @sleep(i32 10)
ret void
}

LLVM IR (-O2):
define void @test_stdout_buf_size() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @putchar(i32 97)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 4096
br i1 %5, label %6, label %1
6: ; preds = %1
%7 = tail call i32 @sleep(i32 3)
%8 = tail call i32 @putchar(i32 98)
%9 = tail call i32 @sleep(i32 10)
ret void
}
/* Variables and functions */
int write(int, int *, int);
int __suselog_writer_putc(int c) { return write(2, &c, 1); }


x86 assembly (clang, -O0):
<__suselog_writer_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2,%edi
lea    -0x4(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__suselog_writer_putc>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x2,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__suselog_writer_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write(i32 2, i32* %2, i32 1)
ret i32 %3
}

LLVM IR (-O2):
define i32 @__suselog_writer_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write(i32 2, i32* %2, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ display_help();
int /*<<< orphan*/ sort_options(int, char **);
void cmd_line(int argc, char *argv[]) {
  if (argc == 1) {
  } else if (argc == 2) {
    display_help();
  } else if (argc > 6) {
    display_help();
  } else {
    sort_options(argc, argv);
  }
}


x86 assembly (clang, -O0):
<cmd_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    113e <cmd_line+0x1e>
jmp    1180 <cmd_line+0x60>
cmpl   $0x2,-0x4(%rbp)
jne    1154 <cmd_line+0x34>
mov    $0x0,%al
call   1040 <display_help@plt>
jmp    117b <cmd_line+0x5b>
cmpl   $0x6,-0x4(%rbp)
jle    116a <cmd_line+0x4a>
mov    $0x0,%al
call   1040 <display_help@plt>
jmp    1176 <cmd_line+0x56>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <sort_options@plt>
jmp    117b <cmd_line+0x5b>
jmp    1180 <cmd_line+0x60>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_line>:
cmp    $0x1,%edi
je     1136 <cmd_line+0x16>
cmp    $0x2,%edi
je     112f <cmd_line+0xf>
cmp    $0x7,%edi
jl     1137 <cmd_line+0x17>
xor    %eax,%eax
jmp    1040 <display_help@plt>
ret
jmp    1030 <sort_options@plt>

LLVM IR (-O0):
define void @cmd_line(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %2
br label %24
8: ; preds = %2
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 2
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = call i32 (...) @display_help()
br label %23
13: ; preds = %8
%14 = load i32, i32* %3
%15 = icmp sgt i32 %14, 6
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = call i32 (...) @display_help()
br label %22
18: ; preds = %13
%19 = load i32, i32* %3
%20 = load i8**, i8*** %4
%21 = call i32 @sort_options(i32 %19, i8** %20)
br label %22
22: ; preds = %18, %16
br label %23
23: ; preds = %22, %11
br label %24
24: ; preds = %23, %7
ret void
}

LLVM IR (-O2):
define void @cmd_line(i32 %0, i8** %1) {
switch i32 %0, label %5 [
i32 1, label %11
i32 2, label %3
]
3: ; preds = %2
%4 = tail call i32 (...) @display_help()
br label %11
5: ; preds = %2
%6 = icmp sgt i32 %0, 6
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = tail call i32 (...) @display_help()
br label %11
9: ; preds = %5
%10 = tail call i32 @sort_options(i32 %0, i8** %1)
br label %11
11: ; preds = %2, %3, %9, %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ compute_matrix_T(double *, double, double, double, double);
void compute_matrix_A(double *A, double c1, double c2) {
  double x;
  x = 1.0 / (1.0 + c2 - c1);
  compute_matrix_T(A, c2 * x, (1.0 - c1) * x, c2, c2 - 1.0);
}


x86 assembly (clang, -O0):
<compute_matrix_A>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  0xed2(%rip),%xmm1
addsd  -0x18(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xec0(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
movsd  -0x18(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
movsd  0xea1(%rip),%xmm1
subsd  -0x10(%rbp),%xmm1
mulsd  -0x20(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm3
movsd  0xe85(%rip),%xmm4
subsd  %xmm4,%xmm3
call   1030 <compute_matrix_T@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_matrix_A>:
movapd %xmm1,%xmm2
movsd  0xee4(%rip),%xmm1
movapd %xmm2,%xmm3
addsd  %xmm1,%xmm3
subsd  %xmm0,%xmm3
movapd %xmm1,%xmm4
divsd  %xmm3,%xmm4
subsd  %xmm0,%xmm1
mulsd  %xmm4,%xmm1
mulsd  %xmm2,%xmm4
movsd  0xec4(%rip),%xmm3
addsd  %xmm2,%xmm3
movapd %xmm4,%xmm0
jmp    1030 <compute_matrix_T@plt>

LLVM IR (-O0):
define void @compute_matrix_A(double* %0, double %1, double %2) {
%4 = alloca double*
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double* %0, double** %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %6
%9 = fadd double 1.000000e+00, %8
%10 = load double, double* %5
%11 = fsub double %9, %10
%12 = fdiv double 1.000000e+00, %11
store double %12, double* %7
%13 = load double*, double** %4
%14 = load double, double* %6
%15 = load double, double* %7
%16 = fmul double %14, %15
%17 = load double, double* %5
%18 = fsub double 1.000000e+00, %17
%19 = load double, double* %7
%20 = fmul double %18, %19
%21 = load double, double* %6
%22 = load double, double* %6
%23 = fsub double %22, 1.000000e+00
%24 = call i32 @compute_matrix_T(double* %13, double %16, double %20, double %21, double %23)
ret void
}

LLVM IR (-O2):
define void @compute_matrix_A(double* %0, double %1, double %2) {
%4 = fadd double %2, 1.000000e+00
%5 = fsub double %4, %1
%6 = fdiv double 1.000000e+00, %5
%7 = fmul double %6, %2
%8 = fsub double 1.000000e+00, %1
%9 = fmul double %8, %6
%10 = fadd double %2, -1.000000e+00
%11 = tail call i32 @compute_matrix_T(double* %0, double %7, double %9, double %2, double %10)
ret void
}
/* Variables and functions */
int mutual_s2(int);
int mutual_s1(int bla) { return mutual_s2(bla + 1); }


x86 assembly (clang, -O0):
<mutual_s1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <mutual_s2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutual_s1>:
add    $0x1,%edi
jmp    1030 <mutual_s2@plt>

LLVM IR (-O0):
define i32 @mutual_s1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = call i32 @mutual_s2(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @mutual_s1(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i32 @mutual_s2(i32 %2)
ret i32 %3
}
/* Variables and functions */
int __reboot(int, int /*<<< orphan*/ *);
int reboot(int howto) {
  int res = __reboot(howto, NULL);
  return res;
}


x86 assembly (clang, -O0):
<reboot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <__reboot@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reboot>:
xor    %esi,%esi
jmp    1030 <__reboot@plt>

LLVM IR (-O0):
define i32 @reboot(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @__reboot(i32 %4, i32* null)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @reboot(i32 %0) {
%2 = tail call i32 @__reboot(i32 %0, i32* null)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ cleanUpAndFail(int);
void badBlockHeader() { cleanUpAndFail(2); }


x86 assembly (clang, -O0):
<badBlockHeader>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <cleanUpAndFail@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<badBlockHeader>:
mov    $0x2,%edi
jmp    1030 <cleanUpAndFail@plt>

LLVM IR (-O0):
define void @badBlockHeader() {
%1 = call i32 @cleanUpAndFail(i32 2)
ret void
}

LLVM IR (-O2):
define void @badBlockHeader() {
%1 = tail call i32 @cleanUpAndFail(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char *argv[]) {
  int k = 1;
#pragma omp parallel private(k)
  {
    k = 2;
#pragma omp task firstprivate(k)
    {
      if (k != 2)
        abort();
      k = 3;
    }
#pragma omp taskwait
    if (k != 2)
      abort();
  }
  if (k != 1)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x2,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
je     1145 <main+0x35>
mov    $0x0,%al
call   1030 <abort@plt>
movl   $0x3,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
je     115d <main+0x4d>
mov    $0x0,%al
call   1030 <abort@plt>
cmpl   $0x1,-0x14(%rbp)
je     116e <main+0x5e>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
store i32 2, i32* %6
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 2
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %2
store i32 3, i32* %6
%12 = load i32, i32* %6
%13 = icmp ne i32 %12, 2
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %11
%17 = load i32, i32* %6
%18 = icmp ne i32 %17, 1
br i1 %18, label %19, label %21
19: ; preds = %16
%20 = call i32 (...) @abort()
unreachable
21: ; preds = %16
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, unsigned char);
void speaker_set(int hz) {
  int divisor = 1193180 / hz;
  outb(0x43, 0xB6);
  outb(0x42, (unsigned char)(divisor));
  outb(0x42, (unsigned char)(divisor >> 8));
}


x86 assembly (clang, -O0):
<speaker_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1234dc,%eax
cltd
idivl  -0x4(%rbp)
mov    %eax,-0x8(%rbp)
mov    $0x43,%edi
mov    $0xb6,%esi
call   1030 <outb@plt>
mov    -0x8(%rbp),%eax
mov    $0x42,%edi
movzbl %al,%esi
call   1030 <outb@plt>
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    $0x42,%edi
movzbl %al,%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<speaker_set>:
push   %rbx
mov    $0x1234dc,%eax
xor    %edx,%edx
idiv   %edi
mov    %eax,%ebx
mov    $0x43,%edi
mov    $0xb6,%esi
call   1030 <outb@plt>
movzbl %bl,%esi
mov    $0x42,%edi
call   1030 <outb@plt>
movzbl %bh,%esi
mov    $0x42,%edi
pop    %rbx
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @speaker_set(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 1193180, %4
store i32 %5, i32* %3
%6 = call i32 @outb(i32 67, i8 zeroext -74)
%7 = load i32, i32* %3
%8 = trunc i32 %7 to i8
%9 = call i32 @outb(i32 66, i8 zeroext %8)
%10 = load i32, i32* %3
%11 = ashr i32 %10, 8
%12 = trunc i32 %11 to i8
%13 = call i32 @outb(i32 66, i8 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @speaker_set(i32 %0) {
%2 = sdiv i32 1193180, %0
%3 = tail call i32 @outb(i32 67, i8 zeroext -74)
%4 = trunc i32 %2 to i8
%5 = tail call i32 @outb(i32 66, i8 zeroext %4)
%6 = lshr i32 %2, 8
%7 = trunc i32 %6 to i8
%8 = tail call i32 @outb(i32 66, i8 zeroext %7)
ret void
}
void gtk_menu_item_get_right_justified() {}


x86 assembly (clang, -O0):
<gtk_menu_item_get_right_justified>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_menu_item_get_right_justified>:
ret

LLVM IR (-O0):
define void @gtk_menu_item_get_right_justified() {
ret void
}

LLVM IR (-O2):
define void @gtk_menu_item_get_right_justified() {
ret void
}
int get_dologinterp_subtype(int whichtablesubtype, int coli) { return (0); }


x86 assembly (clang, -O0):
<get_dologinterp_subtype>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_dologinterp_subtype>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_dologinterp_subtype(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @get_dologinterp_subtype(i32 %0, i32 %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_NAME;

/* Variables and functions */
int /*<<< orphan*/ NID_pkcs9_emailAddress;
char const *req_GetNameNid(int /*<<< orphan*/ *, int /*<<< orphan*/);
const char *req_GetName_EMail(X509_NAME *name) {
  return req_GetNameNid(name, NID_pkcs9_emailAddress);
}


x86 assembly (clang, -O0):
<req_GetName_EMail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
call   1030 <req_GetNameNid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<req_GetName_EMail>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <req_GetNameNid@plt>

LLVM IR (-O0):
@NID_pkcs9_emailAddress = global i32 0
define i8* @req_GetName_EMail(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* @NID_pkcs9_emailAddress
%5 = call i8* @req_GetNameNid(i32* %3, i32 %4)
ret i8* %5
}

LLVM IR (-O2):
@NID_pkcs9_emailAddress = global i32 0
define i8* @req_GetName_EMail(i32* %0) {
%2 = load i32, i32* @NID_pkcs9_emailAddress
%3 = tail call i8* @req_GetNameNid(i32* %0, i32 %2)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int seven();
int main() { printf("%d\n", seven()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <seven@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <seven@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 (...) @seven()
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @seven()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ print_ch(int /*<<< orphan*/);
void print_str(char *c) {
  while (*c)
    print_ch((uint8_t)*c++);
}


x86 assembly (clang, -O0):
<print_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <print_str+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <print_ch@plt>
jmp    111c <print_str+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_str>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <print_str+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <print_ch@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <print_str+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @print_str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @print_ch(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @print_str(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @print_ch(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
void echo_on(void) {}


x86 assembly (clang, -O0):
<echo_on>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<echo_on>:
ret

LLVM IR (-O0):
define void @echo_on() {
ret void
}

LLVM IR (-O2):
define void @echo_on() {
ret void
}
/* Variables and functions */
char *libintl_dcigettext(char const *, char const *, char const *, int,
                         unsigned long, int);
char *libintl_dcngettext(const char *domainname, const char *msgid1,
                         const char *msgid2, unsigned long int n,
                         int category) {
  return libintl_dcigettext(domainname, msgid1, msgid2, 1, n, category);
}


x86 assembly (clang, -O0):
<libintl_dcngettext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
mov    $0x1,%ecx
call   1030 <libintl_dcigettext@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libintl_dcngettext>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    $0x1,%ecx
jmp    1030 <libintl_dcigettext@plt>

LLVM IR (-O0):
define i8* @libintl_dcngettext(i8* %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i64, i64* %9
%15 = load i32, i32* %10
%16 = call i8* @libintl_dcigettext(i8* %11, i8* %12, i8* %13, i32 1, i64 %14, i32 %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @libintl_dcngettext(i8* %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = tail call i8* @libintl_dcigettext(i8* %0, i8* %1, i8* %2, i32 1, i64 %3, i32 %4)
ret i8* %6
}
void PECIDomainConfigSet(unsigned long ulBase, unsigned long ulDomain,
                         unsigned long ulHigh, unsigned long ulLow) {
  ;
  ;
  ;
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000010 + (ulDomain * 4)))) =
      (((ulHigh << 16) & 0xFFFF0000) | ((ulLow << 0) & 0x0000FFFF));
}


x86 assembly (clang, -O0):
<PECIDomainConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
shl    $0x10,%rcx
movabs $0xffff0000,%rax
and    %rax,%rcx
mov    -0x20(%rbp),%rax
shl    $0x0,%rax
and    $0xffff,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
add    $0x10,%rax
mov    -0x10(%rbp),%rdx
shl    $0x2,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIDomainConfigSet>:
shl    $0x10,%edx
movzwl %cx,%eax
or     %rdx,%rax
mov    %rax,0x10(%rdi,%rsi,4)
ret

LLVM IR (-O0):
define void @PECIDomainConfigSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = shl i64 %9, 16
%11 = and i64 %10, 4294901760
%12 = load i64, i64* %8
%13 = shl i64 %12, 0
%14 = and i64 %13, 65535
%15 = or i64 %11, %14
%16 = load i64, i64* %5
%17 = add i64 %16, 16
%18 = load i64, i64* %6
%19 = mul i64 %18, 4
%20 = add i64 %17, %19
%21 = inttoptr i64 %20 to i64*
store volatile i64 %15, i64* %21
ret void
}

LLVM IR (-O2):
define void @PECIDomainConfigSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = shl i64 %2, 16
%6 = and i64 %5, 4294901760
%7 = and i64 %3, 65535
%8 = or i64 %6, %7
%9 = add i64 %0, 16
%10 = shl i64 %1, 2
%11 = add i64 %9, %10
%12 = inttoptr i64 %11 to i64*
store volatile i64 %8, i64* %12
ret void
}
short hershey_val(char c) { return (c - 'R'); }


x86 assembly (clang, -O0):
<hershey_val>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x52,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<hershey_val>:
lea    -0x52(%rdi),%eax
ret

LLVM IR (-O0):
define signext i16 @hershey_val(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 82
%6 = trunc i32 %5 to i16
ret i16 %6
}

LLVM IR (-O2):
define signext i16 @hershey_val(i8 signext %0) {
%2 = sext i8 %0 to i16
%3 = add nsw i16 %2, -82
ret i16 %3
}
/* Variables and functions */
int /*<<< orphan*/ update_head();
int /*<<< orphan*/ update_win_code();
int /*<<< orphan*/ update_win_sim();
void update_all() {
  update_win_sim();
  update_win_code();
  update_head();
}


x86 assembly (clang, -O0):
<update_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <update_win_sim@plt>
mov    $0x0,%al
call   1030 <update_win_code@plt>
mov    $0x0,%al
call   1050 <update_head@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_all>:
push   %rax
xor    %eax,%eax
call   1040 <update_win_sim@plt>
xor    %eax,%eax
call   1030 <update_win_code@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <update_head@plt>

LLVM IR (-O0):
define void @update_all() {
%1 = call i32 (...) @update_win_sim()
%2 = call i32 (...) @update_win_code()
%3 = call i32 (...) @update_head()
ret void
}

LLVM IR (-O2):
define void @update_all() {
%1 = tail call i32 (...) @update_win_sim()
%2 = tail call i32 (...) @update_win_code()
%3 = tail call i32 (...) @update_head()
ret void
}
void Error(msg, pos) char *msg;
long pos;
{
  printf("line %d, col %d: %s\n", yyLineAtPos(pos), yyColAtPos(pos), msg);
  exit(1);
}


x86 assembly (clang, -O0):
<Error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1050 <yyLineAtPos@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <yyColAtPos@plt>
mov    -0x14(%rbp),%esi
mov    %eax,%edx
mov    -0x8(%rbp),%rcx
lea    0xe87(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<Error>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
xor    %eax,%eax
call   1050 <yyLineAtPos@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <yyColAtPos@plt>
lea    0xe99(%rip),%rdi
mov    %ebp,%esi
mov    %eax,%edx
mov    %r14,%rcx
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"line %d, col %d: %s\0A\00"
define void @Error(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i32 (i64, ...) bitcast (i32 (...)* @yyLineAtPos to i32 (i64, ...)*)(i64 %5)
%7 = load i64, i64* %4
%8 = call i32 (i64, ...) bitcast (i32 (...)* @yyColAtPos to i32 (i64, ...)*)(i64 %7)
%9 = load i8*, i8** %3
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %8, i8* %9)
unreachable
}

LLVM IR (-O2):
@.str = [21 x i8] c"line %d, col %d: %s\0A\00"
define void @Error(i8* %0, i64 %1) {
%3 = tail call i32 (i64, ...) bitcast (i32 (...)* @yyLineAtPos to i32 (i64, ...)*)(i64 %1)
%4 = tail call i32 (i64, ...) bitcast (i32 (...)* @yyColAtPos to i32 (i64, ...)*)(i64 %1)
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4, i8* %0)
tail call void @exit(i32 1)
unreachable
}
/* Type definitions */
struct szl_obj {
  int dummy;
};
struct szl_interp {
  int dummy;
};

/* Variables and functions */
scalar_t__ szl_as_str(struct szl_interp *, struct szl_obj *, char **, size_t *);
__attribute__((nonnull(1, 2, 3))) int
szl_len(struct szl_interp *interp, struct szl_obj *obj, size_t *len) {
  char *buf;
  return szl_as_str(interp, obj, &buf, len) ? 1 : 0;
}


x86 assembly (clang, -O0):
<szl_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
lea    -0x20(%rbp),%rdx
call   1030 <szl_as_str@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<szl_len>:
push   %rax
mov    %rdx,%rcx
mov    %rsp,%rdx
call   1030 <szl_as_str@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.szl_interp = type { i32 }
%struct.szl_obj = type { i32 }
define i32 @szl_len(%struct.szl_interp* %0, %struct.szl_obj* %1, i64* %2) {
%4 = alloca %struct.szl_interp*
%5 = alloca %struct.szl_obj*
%6 = alloca i64*
%7 = alloca i8*
store %struct.szl_interp* %0, %struct.szl_interp** %4
store %struct.szl_obj* %1, %struct.szl_obj** %5
store i64* %2, i64** %6
%8 = load %struct.szl_interp*, %struct.szl_interp** %4
%9 = load %struct.szl_obj*, %struct.szl_obj** %5
%10 = load i64*, i64** %6
%11 = call i64 @szl_as_str(%struct.szl_interp* %8, %struct.szl_obj* %9, i8** %7, i64* %10)
%12 = icmp ne i64 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
ret i32 %14
}

LLVM IR (-O2):
%struct.szl_interp = type { i32 }
%struct.szl_obj = type { i32 }
define i32 @szl_len(%struct.szl_interp* %0, %struct.szl_obj* %1, i64* %2) {
%4 = alloca i8*
%5 = bitcast i8** %4 to i8*
%6 = call i64 @szl_as_str(%struct.szl_interp* %0, %struct.szl_obj* %1, i8** %4, i64* %2)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
int CPUSupportsSSE() { return 1; }


x86 assembly (clang, -O0):
<CPUSupportsSSE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CPUSupportsSSE>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @CPUSupportsSSE() {
ret i32 1
}

LLVM IR (-O2):
define i32 @CPUSupportsSSE() {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ENUMERATED;

/* Variables and functions */
int /*<<< orphan*/ ASN1_ENUMERATED_it;
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void ASN1_ENUMERATED_free(ASN1_ENUMERATED *a) {
  ASN1_item_free((ASN1_VALUE *)a, &ASN1_ENUMERATED_it);
}


x86 assembly (clang, -O0):
<ASN1_ENUMERATED_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_ENUMERATED_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@ASN1_ENUMERATED_it = global i32 0
define void @ASN1_ENUMERATED_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @ASN1_ENUMERATED_it)
ret void
}

LLVM IR (-O2):
@ASN1_ENUMERATED_it = global i32 0
define void @ASN1_ENUMERATED_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @ASN1_ENUMERATED_it)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
scalar_t__ nondet();
int main() {
  int *x;
  x = (int *)malloc(100);
  while (nondet()) {
    *x = 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x64,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <nondet@plt>
cmp    $0x0,%rax
je     115d <main+0x3d>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x64,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <nondet@plt>
test   %rax,%rax
je     1144 <main+0x24>
movl   $0x0,(%rbx)
jmp    1130 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i64 @malloc(i32 100)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
br label %5
5: ; preds = %8, %0
%6 = call i64 (...) @nondet()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = load i32*, i32** %2
store i32 0, i32* %9
br label %5
10: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @malloc(i32 100)
%2 = inttoptr i64 %1 to i32*
%3 = tail call i64 (...) @nondet()
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %0, %5
store i32 0, i32* %2
%6 = tail call i64 (...) @nondet()
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %5
8: ; preds = %5, %0
ret i32 0
}
void doNotOptimizeAway(void const volatile *datum) {}


x86 assembly (clang, -O0):
<doNotOptimizeAway>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<doNotOptimizeAway>:
ret

LLVM IR (-O0):
define void @doNotOptimizeAway(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @doNotOptimizeAway(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ silc_core_init();
void silc_init(void) { silc_core_init(); }


x86 assembly (clang, -O0):
<silc_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <silc_core_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<silc_init>:
xor    %eax,%eax
jmp    1030 <silc_core_init@plt>

LLVM IR (-O0):
define void @silc_init() {
%1 = call i32 (...) @silc_core_init()
ret void
}

LLVM IR (-O2):
define void @silc_init() {
%1 = tail call i32 (...) @silc_core_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void abort() { assert(0); }


x86 assembly (clang, -O0):
<abort>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <assert@plt>

x86 assembly (clang, -O2):
<abort>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>

LLVM IR (-O0):
define void @abort() {
%1 = call i32 @assert(i32 0)
unreachable
}

LLVM IR (-O2):
define void @abort() {
%1 = tail call i32 @assert(i32 0)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t maxu64(uint64_t a, uint64_t b) { return ((a) < (b) ? (a) : (b)); }


x86 assembly (clang, -O0):
<maxu64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <maxu64+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <maxu64+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxu64>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @maxu64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @maxu64(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ merge_sort_test();
int main() {
  merge_sort_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <merge_sort_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <merge_sort_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @merge_sort_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @merge_sort_test()
ret i32 0
}