xunge/DecIR huggingface dataset:
/* Variables and functions */
int epoll_create(int);
int ep_create() { return epoll_create(1024); }


x86 assembly (clang, -O0):
<ep_create>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400,%edi
call   1030 <epoll_create@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ep_create>:
mov    $0x400,%edi
jmp    1030 <epoll_create@plt>

LLVM IR (-O0):
define i32 @ep_create() {
%1 = call i32 @epoll_create(i32 1024)
ret i32 %1
}

LLVM IR (-O2):
define i32 @ep_create() {
%1 = tail call i32 @epoll_create(i32 1024)
ret i32 %1
}
/* Variables and functions */
int f0(int);
int f1(int);
int main(int argc, char **argv) { return f0(argc) * f1(argc); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <f0@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <f1@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
imul   %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <f0@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <f1@plt>
imul   %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = call i32 @f0(i32 %6)
%8 = load i32, i32* %4
%9 = call i32 @f1(i32 %8)
%10 = mul nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @f0(i32 %0)
%4 = tail call i32 @f1(i32 %0)
%5 = mul nsw i32 %4, %3
ret i32 %5
}
unsigned xrop3_134_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  unsigned stk4;
  stk4 = D | S;
  stk3 = T & stk4;
  stk2 = S ^ stk3;
  stk1 = D ^ stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_134_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
and    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_134_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
lea    (%rdi,%rax,1),%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
or     $0xff,%eax
and    %edx,%eax
xor    %ecx,%eax
xor    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_134_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = or i32 %14, %16
store i32 %17, i32* %6
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = or i32 %20, %22
store i32 %23, i32* %7
%24 = load i32, i32* %5
%25 = load i32, i32* %6
%26 = or i32 %24, %25
store i32 %26, i32* %11
%27 = load i32, i32* %7
%28 = load i32, i32* %11
%29 = and i32 %27, %28
store i32 %29, i32* %10
%30 = load i32, i32* %6
%31 = load i32, i32* %10
%32 = xor i32 %30, %31
store i32 %32, i32* %9
%33 = load i32, i32* %5
%34 = load i32, i32* %9
%35 = xor i32 %33, %34
store i32 %35, i32* %8
%36 = load i32, i32* %8
ret i32 %36
}

LLVM IR (-O2):
define i32 @xrop3_134_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = or i32 %4, 255
%9 = and i32 %7, %8
%10 = xor i32 %5, %9
%11 = xor i32 %10, 255
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ GLshort;

/* Variables and functions */
int /*<<< orphan*/ glIndexsv(int /*<<< orphan*/ *);
void Indexsv(GLshort c[1]) { glIndexsv(c); }


x86 assembly (clang, -O0):
<Indexsv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glIndexsv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Indexsv>:
jmp    1030 <glIndexsv@plt>

LLVM IR (-O0):
define void @Indexsv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glIndexsv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @Indexsv(i32* %0) {
%2 = tail call i32 @glIndexsv(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UpnpResponseGeneric(void const *, char *, char *, char *);
void UpnpResponse_MediaRenderer_AVTransport_Previous(const void *UPnPToken) {
  UpnpResponseGeneric(UPnPToken, "urn:schemas-upnp-org:service:AVTransport:1",
                      "Previous", "");
}


x86 assembly (clang, -O0):
<UpnpResponse_MediaRenderer_AVTransport_Previous>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    0xefd(%rip),%rdx
lea    0xef5(%rip),%rcx
call   1030 <UpnpResponseGeneric@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpnpResponse_MediaRenderer_AVTransport_Previous>:
lea    0xee9(%rip),%rsi
lea    0xf0d(%rip),%rdx
lea    0xf05(%rip),%rcx
jmp    1030 <UpnpResponseGeneric@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"urn:schemas-upnp-org:service:AVTransport:1\00"
@.str.1 = [9 x i8] c"Previous\00"
@.str.2 = [1 x i8] zeroinitializer
define void @UpnpResponse_MediaRenderer_AVTransport_Previous(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @UpnpResponseGeneric(i8* %3, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"urn:schemas-upnp-org:service:AVTransport:1\00"
@.str.1 = [9 x i8] c"Previous\00"
@.str.2 = [1 x i8] zeroinitializer
define void @UpnpResponse_MediaRenderer_AVTransport_Previous(i8* %0) {
%2 = tail call i32 @UpnpResponseGeneric(i8* %0, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
int CHAR_BIT;
int /*<<< orphan*/ assert(int);
void set_bit_zero(volatile uint32_t *current, uint8_t shift) {
  assert(shift <= (sizeof((*current)) * CHAR_BIT - 1));
  *current &= ~(1 << shift);
}


x86 assembly (clang, -O0):
<set_bit_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
mov    0x2eb6(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x2,%rcx
sub    $0x1,%rcx
cmp    %rcx,%rax
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit_zero>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
movslq %esi,%rbx
mov    0x2ebf(%rip),%rax
movslq (%rax),%rax
lea    -0x1(,%rax,4),%rax
ff
xor    %edi,%edi
cmp    %rbx,%rax
setae  %dil
call   1030 <assert@plt>
mov    $0xfffffffe,%eax
mov    %ebx,%ecx
rol    %cl,%eax
and    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define void @set_bit_zero(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = load i32, i32* @CHAR_BIT
%8 = sext i32 %7 to i64
%9 = mul i64 4, %8
%10 = sub i64 %9, 1
%11 = icmp ule i64 %6, %10
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = load i32, i32* %4
%15 = shl i32 1, %14
%16 = xor i32 %15, -1
%17 = load i32*, i32** %3
%18 = load volatile i32, i32* %17
%19 = and i32 %18, %16
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define void @set_bit_zero(i32* %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = load i32, i32* @CHAR_BIT
%5 = sext i32 %4 to i64
%6 = shl nsw i64 %5, 2
%7 = add nsw i64 %6, -1
%8 = icmp uge i64 %7, %3
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
%11 = shl nuw i32 1, %1
%12 = xor i32 %11, -1
%13 = load volatile i32, i32* %0
%14 = and i32 %13, %12
store volatile i32 %14, i32* %0
ret void
}
unsigned long long gg(unsigned long long a) {
  return a & 0xfffffefeffffffffull;
}


x86 assembly (clang, -O0):
<gg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xfffffefeffffffff,%rax
fe ff ff
and    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gg>:
movabs $0xfffffefeffffffff,%rax
fe ff ff
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @gg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, -1103806595073
ret i64 %4
}

LLVM IR (-O2):
define i64 @gg(i64 %0) {
%2 = and i64 %0, -1103806595073
ret i64 %2
}
unsigned long host_to_i86ul(unsigned long ul) {
  int i;
  union {
    unsigned char c[4];
    unsigned long ul;
  } u;
  for (i = 0; i < 4; i++) {
    u.c[i] = ul & 0xff;
    ul >>= 8;
  }
  return u.ul;
}


x86 assembly (clang, -O0):
<host_to_i86ul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
jge    1147 <host_to_i86ul+0x47>
mov    -0x8(%rbp),%rax
and    $0xff,%rax
mov    %al,%cl
movslq -0xc(%rbp),%rax
mov    %cl,-0x18(%rbp,%rax,1)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <host_to_i86ul+0xf>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<host_to_i86ul>:
mov    %edi,%eax
ret

LLVM IR (-O0):
%union.anon = type { i64 }
define i64 @host_to_i86ul(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca %union.anon
store i64 %0, i64* %2
store i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 4
br i1 %7, label %8, label %21
8: ; preds = %5
%9 = load i64, i64* %2
%10 = and i64 %9, 255
%11 = trunc i64 %10 to i8
%12 = bitcast %union.anon* %4 to [4 x i8]*
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [4 x i8], [4 x i8]* %12, i64 0, i64 %14
store i8 %11, i8* %15
%16 = load i64, i64* %2
%17 = lshr i64 %16, 8
store i64 %17, i64* %2
br label %18
18: ; preds = %8
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
%22 = bitcast %union.anon* %4 to i64*
%23 = load i64, i64* %22
ret i64 %23
}

LLVM IR (-O2):
define i64 @host_to_i86ul(i64 %0) {
%2 = and i64 %0, 4294967295
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ _dwt_enableclocks(int /*<<< orphan*/);
int /*<<< orphan*/ dwt_write16bitoffsetreg(int, int, int);
void _dwt_disablesequencing(void) {
  _dwt_enableclocks(0);
  dwt_write16bitoffsetreg(0x36, 0x04, 0x00);
}


x86 assembly (clang, -O0):
<_dwt_disablesequencing>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <_dwt_enableclocks@plt>
mov    $0x36,%edi
mov    $0x4,%esi
xor    %edx,%edx
call   1040 <dwt_write16bitoffsetreg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dwt_disablesequencing>:
push   %rax
xor    %edi,%edi
call   1030 <_dwt_enableclocks@plt>
mov    $0x36,%edi
mov    $0x4,%esi
xor    %edx,%edx
pop    %rax
jmp    1040 <dwt_write16bitoffsetreg@plt>

LLVM IR (-O0):
define void @_dwt_disablesequencing() {
%1 = call i32 @_dwt_enableclocks(i32 0)
%2 = call i32 @dwt_write16bitoffsetreg(i32 54, i32 4, i32 0)
ret void
}

LLVM IR (-O2):
define void @_dwt_disablesequencing() {
%1 = tail call i32 @_dwt_enableclocks(i32 0)
%2 = tail call i32 @dwt_write16bitoffsetreg(i32 54, i32 4, i32 0)
ret void
}
/* Variables and functions */
int isStringPallindrome(char *);
int /*<<< orphan*/ sprintf(char *, char *, int);
int isIntPallindrome(int x) {
  char s[24];
  sprintf(s, "%d", x);
  return isStringPallindrome(s);
}


x86 assembly (clang, -O0):
<isIntPallindrome>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xec7(%rip),%rsi
call   1030 <sprintf@plt>
lea    -0x20(%rbp),%rdi
call   1040 <isStringPallindrome@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isIntPallindrome>:
push   %rbx
sub    $0x20,%rsp
mov    %edi,%edx
lea    0xed2(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <isStringPallindrome@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @isIntPallindrome(i32 %0) {
%2 = alloca i32
%3 = alloca [24 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [24 x i8], [24 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* %2
%6 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = getelementptr inbounds [24 x i8], [24 x i8]* %3, i64 0, i64 0
%8 = call i32 @isStringPallindrome(i8* %7)
ret i32 %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @isIntPallindrome(i32 %0) {
%2 = alloca [24 x i8]
%3 = getelementptr inbounds [24 x i8], [24 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = call i32 @isStringPallindrome(i8* %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char const *);
int /*<<< orphan*/ free_all();
int /*<<< orphan*/ stderr;
void die(const char *msg) {
  fprintf(stderr, msg);
  free_all();
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <free_all@plt>
mov    0x2e7c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rsi
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <free_all@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
%6 = call i32 (...) @free_all()
%7 = load i32, i32* @EXIT_FAILURE
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
%4 = tail call i32 (...) @free_all()
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @exit(i32 %5)
unreachable
}
void swap(long int v[], long int i, long int j) {
  long int tmp;
  tmp = v[i];
  v[i] = v[j];
  v[j] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x20(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi,%rsi,8),%rax
mov    (%rdi,%rdx,8),%rcx
mov    %rcx,(%rdi,%rsi,8)
mov    %rax,(%rdi,%rdx,8)
ret

LLVM IR (-O0):
define void @swap(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64*, i64** %4
%9 = load i64, i64* %5
%10 = getelementptr inbounds i64, i64* %8, i64 %9
%11 = load i64, i64* %10
store i64 %11, i64* %7
%12 = load i64*, i64** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i64, i64* %12, i64 %13
%15 = load i64, i64* %14
%16 = load i64*, i64** %4
%17 = load i64, i64* %5
%18 = getelementptr inbounds i64, i64* %16, i64 %17
store i64 %15, i64* %18
%19 = load i64, i64* %7
%20 = load i64*, i64** %4
%21 = load i64, i64* %6
%22 = getelementptr inbounds i64, i64* %20, i64 %21
store i64 %19, i64* %22
ret void
}

LLVM IR (-O2):
define void @swap(i64* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i64, i64* %0, i64 %1
%5 = load i64, i64* %4
%6 = getelementptr inbounds i64, i64* %0, i64 %2
%7 = load i64, i64* %6
store i64 %7, i64* %4
store i64 %5, i64* %6
ret void
}
void foo(int a) {
  int i;
#pragma omp parallel for default(auto)
  for (i = 0; i < 1; ++i)
    a++;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jge    112f <foo+0x2f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <foo+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dpx_main();
int /*<<< orphan*/ dpx_panic(char *);
void dpx_start() {
  dpx_main();
  dpx_panic("dpx_main unexpectly returned");
}


x86 assembly (clang, -O0):
<dpx_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <dpx_main@plt>
lea    0xece(%rip),%rdi
call   1030 <dpx_panic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpx_start>:
push   %rax
xor    %eax,%eax
call   1040 <dpx_main@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1030 <dpx_panic@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"dpx_main unexpectly returned\00"
define void @dpx_start() {
%1 = call i32 (...) @dpx_main()
%2 = call i32 @dpx_panic(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"dpx_main unexpectly returned\00"
define void @dpx_start() {
%1 = tail call i32 (...) @dpx_main()
%2 = tail call i32 @dpx_panic(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ mf_sensors_shutdown();
int /*<<< orphan*/ puts(char *);
void my_exit_handler(int s) {
  mf_sensors_shutdown();
  puts("\nBye bye!");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<my_exit_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <mf_sensors_shutdown@plt>
lea    0xeb7(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<my_exit_handler>:
push   %rax
xor    %eax,%eax
call   1040 <mf_sensors_shutdown@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\0ABye bye!\00"
@EXIT_SUCCESS = global i32 0
define void @my_exit_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @mf_sensors_shutdown()
%4 = call i32 @puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @EXIT_SUCCESS
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [10 x i8] c"\0ABye bye!\00"
@EXIT_SUCCESS = global i32 0
define void @my_exit_handler(i32 %0) {
%2 = tail call i32 (...) @mf_sensors_shutdown()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
scalar_t__ strcmp(char const *, char *);
void print_path(const char *method, const char *path, int minor_ver,
                void *user) {
  assert(strcmp(path, "/test") == 0);
}


x86 assembly (clang, -O0):
<print_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xebe(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_path>:
push   %rax
mov    %rsi,%rdi
lea    0xed5(%rip),%rsi
call   1030 <strcmp@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"/test\00"
define void @print_path(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i8*, i8** %6
%10 = call i64 @strcmp(i8* %9, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"/test\00"
define void @print_path(i8* nocapture readnone %0, i8* %1, i32 %2, i8* nocapture readnone %3) {
%5 = tail call i64 @strcmp(i8* %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ stderr;
int _cksum_error(char *message, int ret) {
  fputs("cksum"
        ": ",
        stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_cksum_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cksum_error>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"cksum: \00"
@stderr = global i32 0
define i32 @_cksum_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [8 x i8] c"cksum: \00"
@stderr = global i32 0
define i32 @_cksum_error(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ spawn(char const *const *, int, int);
int /*<<< orphan*/ wait_or_die(int /*<<< orphan*/, char const *const,
                               int /*<<< orphan*/);
void run(const char *const cmd[]) {
  pid_t child = spawn(cmd, -1, -1);
  wait_or_die(child, cmd[0], 0);
}


x86 assembly (clang, -O0):
<run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%edx
mov    %edx,%esi
call   1030 <spawn@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
xor    %edx,%edx
call   1040 <wait_or_die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run>:
push   %rbx
mov    %rdi,%rbx
mov    $0xffffffff,%esi
mov    $0xffffffff,%edx
call   1030 <spawn@plt>
mov    (%rbx),%rsi
mov    %eax,%edi
xor    %edx,%edx
pop    %rbx
jmp    1040 <wait_or_die@plt>

LLVM IR (-O0):
define void @run(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = call i32 @spawn(i8** %4, i32 -1, i32 -1)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i8**, i8*** %2
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
%10 = call i32 @wait_or_die(i32 %6, i8* %9, i32 0)
ret void
}

LLVM IR (-O2):
define void @run(i8** %0) {
%2 = tail call i32 @spawn(i8** %0, i32 -1, i32 -1)
%3 = load i8*, i8** %0
%4 = tail call i32 @wait_or_die(i32 %2, i8* %3, i32 0)
ret void
}
int test_imm_3Cuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x3C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Cuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x3c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Cuint64_highword_reg>:
movabs $0x3c00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Cuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 60
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Cuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 257698037760
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned long beginchunk(int /*<<< orphan*/ *, unsigned long, char *,
                         int /*<<< orphan*/);
unsigned long endchunk(int /*<<< orphan*/ *, unsigned long);
unsigned long write_png_end(FILE *fp, unsigned long crc) {
  crc = beginchunk(fp, crc, "IEND", 0);
  crc = endchunk(fp, crc);
  return crc;
}


x86 assembly (clang, -O0):
<write_png_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xec1(%rip),%rdx
xor    %ecx,%ecx
call   1030 <beginchunk@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <endchunk@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_png_end>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdx
xor    %ecx,%ecx
call   1030 <beginchunk@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1040 <endchunk@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"IEND\00"
define i64 @write_png_end(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = call i64 @beginchunk(i32* %5, i64 %6, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 0)
store i64 %7, i64* %4
%8 = load i32*, i32** %3
%9 = load i64, i64* %4
%10 = call i64 @endchunk(i32* %8, i64 %9)
store i64 %10, i64* %4
%11 = load i64, i64* %4
ret i64 %11
}

LLVM IR (-O2):
@.str = [5 x i8] c"IEND\00"
define i64 @write_png_end(i32* %0, i64 %1) {
%3 = tail call i64 @beginchunk(i32* %0, i64 %1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 0)
%4 = tail call i64 @endchunk(i32* %0, i64 %3)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ Conquer(int *, int, int, int);
void Divide(int a[], int i, int j) {
  if (i < j) {
    int mid = (i + j) / 2;
    Divide(a, i, mid);
    Divide(a, mid + 1, j);
    Conquer(a, i, mid, j);
  }
}


x86 assembly (clang, -O0):
<Divide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <Divide+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <Divide@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <Divide@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <Conquer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Divide>:
cmp    %edx,%esi
jge    1172 <Divide+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1030 <Divide@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1030 <Divide@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <Conquer@plt>
ret

LLVM IR (-O0):
define void @Divide(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @Conquer(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @Divide(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @Divide(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @Divide(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @Conquer(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
void XtInsertEventHandler() {}


x86 assembly (clang, -O0):
<XtInsertEventHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtInsertEventHandler>:
ret

LLVM IR (-O0):
define void @XtInsertEventHandler() {
ret void
}

LLVM IR (-O2):
define void @XtInsertEventHandler() {
ret void
}
int glipGetDepth(int format) {
  int mult;
  switch (format) {
  case 6408:
  case 32993:
    mult = 4;
    break;
  case 6407:
  case 32992:
    mult = 3;
    break;
  case 6410:
    mult = 2;
    break;
  default:
    mult = 1;
    break;
  }
  return mult;
}


x86 assembly (clang, -O0):
<glipGetDepth>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1907,%eax
je     1175 <glipGetDepth+0x75>
jmp    111d <glipGetDepth+0x1d>
mov    -0xc(%rbp),%eax
sub    $0x1908,%eax
je     1169 <glipGetDepth+0x69>
jmp    1130 <glipGetDepth+0x30>
mov    -0xc(%rbp),%eax
sub    $0x190a,%eax
je     1181 <glipGetDepth+0x81>
jmp    1143 <glipGetDepth+0x43>
mov    -0xc(%rbp),%eax
sub    $0x80e0,%eax
je     1175 <glipGetDepth+0x75>
jmp    1156 <glipGetDepth+0x56>
mov    -0xc(%rbp),%eax
sub    $0x80e1,%eax
jne    118d <glipGetDepth+0x8d>
jmp    1169 <glipGetDepth+0x69>
movl   $0x4,-0x8(%rbp)
jmp    1194 <glipGetDepth+0x94>
movl   $0x3,-0x8(%rbp)
jmp    1194 <glipGetDepth+0x94>
movl   $0x2,-0x8(%rbp)
jmp    1194 <glipGetDepth+0x94>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glipGetDepth>:
mov    $0x4,%eax
cmp    $0x1909,%edi
jle    1127 <glipGetDepth+0x27>
cmp    $0x190a,%edi
je     113e <glipGetDepth+0x3e>
cmp    $0x80e1,%edi
je     1137 <glipGetDepth+0x37>
cmp    $0x80e0,%edi
je     1138 <glipGetDepth+0x38>
jmp    1144 <glipGetDepth+0x44>
cmp    $0x1907,%edi
je     1138 <glipGetDepth+0x38>
cmp    $0x1908,%edi
jne    1144 <glipGetDepth+0x44>
ret
mov    $0x3,%eax
ret
mov    $0x2,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @glipGetDepth(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %8 [
i32 6408, label %5
i32 32993, label %5
i32 6407, label %6
i32 32992, label %6
i32 6410, label %7
]
5: ; preds = %1, %1
store i32 4, i32* %3
br label %9
6: ; preds = %1, %1
store i32 3, i32* %3
br label %9
7: ; preds = %1
store i32 2, i32* %3
br label %9
8: ; preds = %1
store i32 1, i32* %3
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @glipGetDepth(i32 %0) {
switch i32 %0, label %4 [
i32 6408, label %5
i32 32993, label %5
i32 6407, label %2
i32 32992, label %2
i32 6410, label %3
]
2: ; preds = %1, %1
br label %5
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %1, %4, %3, %2
%6 = phi i32 [ 1, %4 ], [ 2, %3 ], [ 3, %2 ], [ 4, %1 ], [ 4, %1 ]
ret i32 %6
}
unsigned xrop3_217_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T & S;
  stk2 = D | stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_217_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_217_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
lea    (%rdi,%rax,1),%ecx
shl    $0x8,%esi
and    %esi,%eax
or     $0xff,%eax
xor    %ecx,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_217_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %6
%25 = and i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %5
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = xor i32 %32, -1
store i32 %33, i32* %8
%34 = load i32, i32* %8
ret i32 %34
}

LLVM IR (-O2):
define i32 @xrop3_217_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = and i32 %7, %4
%9 = or i32 %8, 255
%10 = xor i32 %5, %9
%11 = xor i32 %10, -1
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ bzero(unsigned char *, int);
int /*<<< orphan*/ sendcommand(int, int, unsigned char *, int);
void transfermode(int fd) {
  unsigned char frame[1];
  bzero(frame, 1);
  frame[0] = 0x01;
  sendcommand(fd, 0xCA, frame, 1);
}


x86 assembly (clang, -O0):
<transfermode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x5(%rbp),%rdi
mov    $0x1,%esi
call   1040 <bzero@plt>
movb   $0x1,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rdx
mov    $0xca,%esi
mov    $0x1,%ecx
call   1030 <sendcommand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<transfermode>:
push   %rax
movb   $0x1,0x7(%rsp)
lea    0x7(%rsp),%rdx
mov    $0xca,%esi
mov    $0x1,%ecx
call   1030 <sendcommand@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @transfermode(i32 %0) {
%2 = alloca i32
%3 = alloca [1 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%5 = call i32 @bzero(i8* %4, i32 1)
%6 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
store i8 1, i8* %6
%7 = load i32, i32* %2
%8 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%9 = call i32 @sendcommand(i32 %7, i32 202, i8* %8, i32 1)
ret void
}

LLVM IR (-O2):
define void @transfermode(i32 %0) {
%2 = alloca [1 x i8]
%3 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
store i8 1, i8* %3
%4 = call i32 @sendcommand(i32 %0, i32 202, i8* %3, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sgen(char *, char *, char *);
void cgdecgb(char *s) { sgen("%s\t%s", "decb", s); }


x86 assembly (clang, -O0):
<cgdecgb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xed8(%rip),%rsi
call   1030 <sgen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdecgb>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee5(%rip),%rsi
jmp    1030 <sgen@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s\09%s\00"
@.str.1 = [5 x i8] c"decb\00"
define void @cgdecgb(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sgen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s\09%s\00"
@.str.1 = [5 x i8] c"decb\00"
define void @cgdecgb(i8* %0) {
%2 = tail call i32 @sgen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void CursorXYVT100(int x, int y) { printf("\033[%d;%dH", y, x); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %edi,%edx
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"\1B[%d;%dH\00"
define void @CursorXYVT100(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"\1B[%d;%dH\00"
define void @CursorXYVT100(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
ret void
}
ctoi(s) char *s;
{ return (ctol(s)); }


x86 assembly (clang, -O0):
<ctoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <ctol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctoi>:
xor    %eax,%eax
jmp    1030 <ctol@plt>

LLVM IR (-O0):
define i32 @ctoi(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @ctol to i32 (i8*, ...)*)(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ctoi(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @ctol to i32 (i8*, ...)*)(i8* %0)
ret i32 %2
}
/* Variables and functions */
int __ocml_ilogb_f64(double);
int ilogb(double x) { return __ocml_ilogb_f64(x); }


x86 assembly (clang, -O0):
<ilogb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_ilogb_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilogb>:
jmp    1030 <__ocml_ilogb_f64@plt>

LLVM IR (-O0):
define i32 @ilogb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @__ocml_ilogb_f64(double %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ilogb(double %0) {
%2 = tail call i32 @__ocml_ilogb_f64(double %0)
ret i32 %2
}
void handle_kill_cmd(char *tag, char *extra) {}


x86 assembly (clang, -O0):
<handle_kill_cmd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_kill_cmd>:
ret

LLVM IR (-O0):
define void @handle_kill_cmd(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @handle_kill_cmd(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
scalar_t__ ntohl(int);
const char *unpack_u64(uint64_t *data, const char *buffer) {
  *data =
      (((uint64_t)(ntohl((int)((*((uint64_t *)buffer) << 32) >> 32))) << 32) |
       (unsigned int)ntohl(((int)(*((uint64_t *)buffer) >> 32))));
  return buffer + sizeof(*data);
}


x86 assembly (clang, -O0):
<unpack_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
mov    $0x20,%ecx
shl    %cl,%edi
mov    $0x20,%ecx
sar    %cl,%edi
call   1030 <ntohl@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
mov    $0x20,%ecx
sar    %cl,%edi
call   1030 <ntohl@plt>
mov    -0x14(%rbp),%ecx
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x4,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unpack_u64>:
push   %rbx
mov    %rsi,%rbx
call   1030 <ntohl@plt>
call   1030 <ntohl@plt>
add    $0x4,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @unpack_u64(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = shl i32 %7, 32
%9 = ashr i32 %8, 32
%10 = call i64 @ntohl(i32 %9)
%11 = trunc i64 %10 to i32
%12 = shl i32 %11, 32
%13 = load i8*, i8** %4
%14 = bitcast i8* %13 to i32*
%15 = load i32, i32* %14
%16 = ashr i32 %15, 32
%17 = call i64 @ntohl(i32 %16)
%18 = trunc i64 %17 to i32
%19 = or i32 %12, %18
%20 = load i32*, i32** %3
store i32 %19, i32* %20
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i64 4
ret i8* %22
}

LLVM IR (-O2):
define i8* @unpack_u64(i32* nocapture readnone %0, i8* readnone %1) {
%3 = tail call i64 @ntohl(i32 poison)
%4 = tail call i64 @ntohl(i32 poison)
%5 = getelementptr inbounds i8, i8* %1, i64 4
ret i8* %5
}
char *langRomTypeManbow2() { return "Manbbow 2"; }


x86 assembly (clang, -O0):
<langRomTypeManbow2>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeManbow2>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Manbbow 2\00"
define i8* @langRomTypeManbow2() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"Manbbow 2\00"
define i8* @langRomTypeManbow2() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int atoi(char const *);
scalar_t__ strlen(char const *);
int satoi(const char *nptr) {
  if (nptr != NULL && strlen(nptr))
    return (atoi(nptr));
  return (0);
}


x86 assembly (clang, -O0):
<satoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115b <satoi+0x3b>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x0,%rax
je     115b <satoi+0x3b>
mov    -0x10(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x4(%rbp)
jmp    1162 <satoi+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<satoi>:
test   %rdi,%rdi
je     111f <satoi+0xf>
cmpb   $0x0,(%rdi)
je     111f <satoi+0xf>
jmp    1030 <atoi@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @satoi(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = call i32 @atoi(i8* %11)
store i32 %12, i32* %2
br label %14
13: ; preds = %6, %1
store i32 0, i32* %2
br label %14
14: ; preds = %13, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @satoi(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @atoi(i8* %0)
br label %8
8: ; preds = %1, %3, %6
%9 = phi i32 [ %7, %6 ], [ 0, %3 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
char const *strong_l3();
const char *__attribute__((section(".test.c"))) call_strong_l3(void) {
  return strong_l3() + 1;
}


x86 assembly (clang, -O0):
<call_strong_l3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <strong_l3@plt>
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_strong_l3>:
push   %rax
xor    %eax,%eax
call   1030 <strong_l3@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @call_strong_l3() section ".test.c" {
%1 = call i8* (...) @strong_l3()
%2 = getelementptr inbounds i8, i8* %1, i64 1
ret i8* %2
}

LLVM IR (-O2):
define i8* @call_strong_l3() section ".test.c" {
%1 = tail call i8* (...) @strong_l3()
%2 = getelementptr inbounds i8, i8* %1, i64 1
ret i8* %2
}