int cp_clz_char_slow(unsigned char x) {
  int bit = 0x80;
  int lz = 0;
  for (lz = 0, bit = 0x80; bit > 0 && ((bit & x) == 0); lz++, bit >>= 1)
    ;
  return lz;
}


x86 assembly (clang, -O0):
<cp_clz_char_slow>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x80,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x80,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jle    1147 <cp_clz_char_slow+0x47>
mov    -0x8(%rbp),%eax
movzbl -0x1(%rbp),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1157 <cp_clz_char_slow+0x57>
jmp    1173 <cp_clz_char_slow+0x73>
jmp    115c <cp_clz_char_slow+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <cp_clz_char_slow+0x26>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cp_clz_char_slow>:
xor    %eax,%eax
test   $0x80,%dil
jne    1154 <cp_clz_char_slow+0x54>
mov    $0x1,%eax
test   $0x40,%dil
jne    1154 <cp_clz_char_slow+0x54>
mov    $0x2,%eax
test   $0x20,%dil
jne    1154 <cp_clz_char_slow+0x54>
mov    $0x3,%eax
test   $0x10,%dil
jne    1154 <cp_clz_char_slow+0x54>
mov    $0x4,%eax
test   $0x8,%dil
jne    1154 <cp_clz_char_slow+0x54>
mov    $0x5,%eax
test   $0x4,%dil
jne    1154 <cp_clz_char_slow+0x54>
mov    $0x6,%eax
test   $0x2,%dil
jne    1154 <cp_clz_char_slow+0x54>
and    $0x1,%edi
mov    $0x8,%eax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cp_clz_char_slow(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 128, i32* %3
store i32 0, i32* %4
store i32 0, i32* %4
store i32 128, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = and i32 %9, %11
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %8, %5
%15 = phi i1 [ false, %5 ], [ %13, %8 ]
br i1 %15, label %16, label %22
16: ; preds = %14
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
%20 = load i32, i32* %3
%21 = ashr i32 %20, 1
store i32 %21, i32* %3
br label %5
22: ; preds = %14
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @cp_clz_char_slow(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = and i32 %2, 128
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %27
5: ; preds = %1
%6 = and i32 %2, 64
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %27
8: ; preds = %5
%9 = and i32 %2, 32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %27
11: ; preds = %8
%12 = and i32 %2, 16
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %27
14: ; preds = %11
%15 = and i32 %2, 8
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %27
17: ; preds = %14
%18 = and i32 %2, 4
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %27
20: ; preds = %17
%21 = and i32 %2, 2
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %20
%24 = and i32 %2, 1
%25 = icmp eq i32 %24, 0
%26 = select i1 %25, i32 8, i32 7
br label %27
27: ; preds = %23, %5, %8, %11, %14, %17, %20, %1
%28 = phi i32 [ 0, %1 ], [ 1, %5 ], [ 2, %8 ], [ 3, %11 ], [ 4, %14 ], [ 5, %17 ], [ 6, %20 ], [ %26, %23 ]
ret i32 %28
}