xunge/DecIR huggingface dataset:
int iTestStrBit(unsigned char *psStr, int iPosition) {
  unsigned char ucByte;
  ucByte = psStr[iPosition / 8];
  iPosition %= 8;
  ucByte >>= (7 - iPosition);
  if (ucByte & 0x01)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<iTestStrBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x15(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
mov    $0x7,%ecx
sub    -0x14(%rbp),%ecx
movzbl -0x15(%rbp),%eax
sar    %cl,%eax
mov    %al,-0x15(%rbp)
movzbl -0x15(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1168 <iTestStrBit+0x68>
movl   $0x1,-0x4(%rbp)
jmp    116f <iTestStrBit+0x6f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iTestStrBit>:
lea    0x7(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
mov    %ecx,%eax
sar    $0x3,%eax
cltq
movzbl (%rdi,%rax,1),%eax
and    $0xfffffff8,%ecx
sub    %ecx,%esi
mov    $0x7,%cl
sub    %sil,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @iTestStrBit(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sdiv i32 %8, 8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = load i8, i8* %11
store i8 %12, i8* %6
%13 = load i32, i32* %5
%14 = srem i32 %13, 8
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = sub nsw i32 7, %15
%17 = load i8, i8* %6
%18 = zext i8 %17 to i32
%19 = ashr i32 %18, %16
%20 = trunc i32 %19 to i8
store i8 %20, i8* %6
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = and i32 %22, 1
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %2
store i32 1, i32* %3
br label %27
26: ; preds = %2
store i32 0, i32* %3
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @iTestStrBit(i8* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = srem i32 %1, 8
%8 = sub nsw i32 7, %7
%9 = zext i8 %6 to i32
%10 = lshr i32 %9, %8
%11 = and i32 %10, 1
ret i32 %11
}
int xmlUCSIsThaana(int code) {
  return (((code >= 0x0780) && (code <= 0x07BF)));
}


x86 assembly (clang, -O0):
<xmlUCSIsThaana>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x780,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsThaana+0x26>
cmpl   $0x7bf,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsThaana>:
and    $0xffffffc0,%edi
xor    %eax,%eax
cmp    $0x780,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsThaana(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 1920
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 1983
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsThaana(i32 %0) {
%2 = and i32 %0, -64
%3 = icmp eq i32 %2, 1920
%4 = zext i1 %3 to i32
ret i32 %4
}
char *(strcpy)(char *dest, const char *src) {
  char *ch1 = (char *)dest, *ch2 = (char *)src;
  while (*ch2 != '\0') {
    *ch1 = *ch2;
    ++ch1;
    ++ch2;
  }
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1155 <strcpy+0x55>
mov    -0x20(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111c <strcpy+0x1c>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1120 <strcpy+0x20>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    %cl,(%rax,%rdx,1)
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
br label %9
9: ; preds = %14, %2
%10 = load i8*, i8** %6
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %9
%15 = load i8*, i8** %6
%16 = load i8, i8* %15
%17 = load i8*, i8** %5
store i8 %16, i8* %17
%18 = load i8*, i8** %5
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %5
%20 = load i8*, i8** %6
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %6
br label %9
22: ; preds = %9
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
store i8 %6, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret i8* %0
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ printf(char *, int, int);
int main(int argc, char **argv) {
  int n = 27;
  printf("Fib(%d): %d\n", n, fib(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1b,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <fib@plt>
mov    -0x18(%rbp),%esi
mov    %eax,%edx
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1b,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    $0x1b,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Fib(%d): %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 27, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @fib(i32 %8)
%10 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Fib(%d): %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fib(i32 27)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 27, i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ iscntrl(int);
void t_iscntrl_0x0b() {
  Assert_real((iscntrl(11)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              60, ("iscntrl should be 1 for 0x0b"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x0b>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%edi
call   1030 <iscntrl@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x3c,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x0b>:
push   %rax
mov    $0xb,%edi
call   1030 <iscntrl@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x3c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x0b\00"
define void @t_iscntrl_0x0b() {
%1 = call i32 @iscntrl(i32 11)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 60, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x0b\00"
define void @t_iscntrl_0x0b() {
%1 = tail call i32 @iscntrl(i32 11)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 60, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void _M2_wrapc_init() {}


x86 assembly (clang, -O0):
<_M2_wrapc_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_wrapc_init>:
ret

LLVM IR (-O0):
define void @_M2_wrapc_init() {
ret void
}

LLVM IR (-O2):
define void @_M2_wrapc_init() {
ret void
}
void AKSC_TransByHbase(void) {}


x86 assembly (clang, -O0):
<AKSC_TransByHbase>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AKSC_TransByHbase>:
ret

LLVM IR (-O0):
define void @AKSC_TransByHbase() {
ret void
}

LLVM IR (-O2):
define void @AKSC_TransByHbase() {
ret void
}
__attribute__((weak)) void _cleanup() {}


x86 assembly (clang, -O0):
<_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cleanup>:
ret

LLVM IR (-O0):
define weak void @_cleanup() {
ret void
}

LLVM IR (-O2):
define weak void @_cleanup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_int_in_binary(int i) {
  for (int j = 0; j < 32; j++) {
    printf("%d", (i >> (31 - j)) & 0x1);
  }
}


x86 assembly (clang, -O0):
<print_int_in_binary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jge    1156 <print_int_in_binary+0x46>
mov    -0x4(%rbp),%esi
mov    $0x1f,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%esi
and    $0x1,%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <print_int_in_binary+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int_in_binary>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
mov    $0x1f,%ebp
lea    0xede(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ebx,%esi
mov    %ebp,%ecx
shr    %cl,%esi
and    $0x1,%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebp
jb     1130 <print_int_in_binary+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @print_int_in_binary(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 32
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = sub nsw i32 31, %9
%11 = ashr i32 %8, %10
%12 = and i32 %11, 1
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %7
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @print_int_in_binary(i32 %0) {
br label %3
2: ; preds = %3
ret void
3: ; preds = %1, %3
%4 = phi i32 [ 0, %1 ], [ %9, %3 ]
%5 = sub nuw nsw i32 31, %4
%6 = lshr i32 %0, %5
%7 = and i32 %6, 1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = add nuw nsw i32 %4, 1
%10 = icmp eq i32 %9, 32
br i1 %10, label %2, label %3
}
/* Type definitions */
typedef int /*<<< orphan*/ XwcTextItem;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XwcTextItem(void) {
  XwcTextItem *_p = (XwcTextItem *)malloc(sizeof(XwcTextItem));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XwcTextItem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XwcTextItem+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XwcTextItem>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XwcTextItem+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XwcTextItem() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XwcTextItem() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
void testDequeAddTailRange() {}


x86 assembly (clang, -O0):
<testDequeAddTailRange>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testDequeAddTailRange>:
ret

LLVM IR (-O0):
define void @testDequeAddTailRange() {
ret void
}

LLVM IR (-O2):
define void @testDequeAddTailRange() {
ret void
}
/* Variables and functions */
int rc_findvar(char *);
int rc_setvar_n(int, int, char **);
int rc_setvar(char *name, int c, char **v) {
  int i;
  i = rc_findvar(name);
  if (i < 0)
    return i;
  return rc_setvar_n(i, c, v);
}


x86 assembly (clang, -O0):
<rc_setvar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <rc_findvar@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    1154 <rc_setvar+0x34>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <rc_setvar+0x46>
mov    -0x24(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    -0x20(%rbp),%rdx
call   1030 <rc_setvar_n@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rc_setvar>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%ebp
call   1040 <rc_findvar@plt>
test   %eax,%eax
js     1143 <rc_setvar+0x23>
mov    %eax,%edi
mov    %ebp,%esi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <rc_setvar_n@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rc_setvar(i8* %0, i32 %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
%9 = load i8*, i8** %5
%10 = call i32 @rc_findvar(i8* %9)
store i32 %10, i32* %8
%11 = load i32, i32* %8
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i32, i32* %8
store i32 %14, i32* %4
br label %20
15: ; preds = %3
%16 = load i32, i32* %8
%17 = load i32, i32* %6
%18 = load i8**, i8*** %7
%19 = call i32 @rc_setvar_n(i32 %16, i32 %17, i8** %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %15, %13
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @rc_setvar(i8* %0, i32 %1, i8** %2) {
%4 = tail call i32 @rc_findvar(i8* %0)
%5 = icmp slt i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @rc_setvar_n(i32 %4, i32 %1, i8** %2)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ %4, %3 ]
ret i32 %9
}
__attribute__((__weak__, __always___)) void
__softboundcets_shrink_bounds(void *new_base, void *new_bound, void *old_base,
                              void *old_bound, void **base_alloca,
                              void **bound_alloca) {
  *(base_alloca) = new_base < old_base ? old_base : new_base;
  *(bound_alloca) = new_bound > old_bound ? old_bound : new_bound;
}


x86 assembly (clang, -O0):
<__softboundcets_shrink_bounds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1137 <__softboundcets_shrink_bounds+0x37>
mov    -0x18(%rbp),%rax
mov    %rax,-0x38(%rbp)
jmp    113f <__softboundcets_shrink_bounds+0x3f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jbe    1165 <__softboundcets_shrink_bounds+0x65>
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
jmp    116d <__softboundcets_shrink_bounds+0x6d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rcx
mov    -0x30(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__softboundcets_shrink_bounds>:
cmp    %rdx,%rdi
cmovb  %rdx,%rdi
mov    %rdi,(%r8)
cmp    %rcx,%rsi
cmova  %rcx,%rsi
mov    %rsi,(%r9)
ret

LLVM IR (-O0):
define weak void @__softboundcets_shrink_bounds(i8* %0, i8* %1, i8* %2, i8* %3, i8** %4, i8** %5) {
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8**
%12 = alloca i8**
store i8* %0, i8** %7
store i8* %1, i8** %8
store i8* %2, i8** %9
store i8* %3, i8** %10
store i8** %4, i8*** %11
store i8** %5, i8*** %12
%13 = load i8*, i8** %7
%14 = load i8*, i8** %9
%15 = icmp ult i8* %13, %14
br i1 %15, label %16, label %18
16: ; preds = %6
%17 = load i8*, i8** %9
br label %20
18: ; preds = %6
%19 = load i8*, i8** %7
br label %20
20: ; preds = %18, %16
%21 = phi i8* [ %17, %16 ], [ %19, %18 ]
%22 = load i8**, i8*** %11
store i8* %21, i8** %22
%23 = load i8*, i8** %8
%24 = load i8*, i8** %10
%25 = icmp ugt i8* %23, %24
br i1 %25, label %26, label %28
26: ; preds = %20
%27 = load i8*, i8** %10
br label %30
28: ; preds = %20
%29 = load i8*, i8** %8
br label %30
30: ; preds = %28, %26
%31 = phi i8* [ %27, %26 ], [ %29, %28 ]
%32 = load i8**, i8*** %12
store i8* %31, i8** %32
ret void
}

LLVM IR (-O2):
define weak void @__softboundcets_shrink_bounds(i8* %0, i8* %1, i8* %2, i8* %3, i8** %4, i8** %5) {
%7 = icmp ult i8* %0, %2
%8 = select i1 %7, i8* %2, i8* %0
store i8* %8, i8** %4
%9 = icmp ugt i8* %1, %3
%10 = select i1 %9, i8* %3, i8* %1
store i8* %10, i8** %5
ret void
}
int mangle_append(char arr[64], int arr_len, char c) {
  if ((arr_len + 1) >= 64)
    return (arr_len);
  arr[arr_len] = c;
  return (arr_len + 1);
}


x86 assembly (clang, -O0):
<mangle_append>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %al,-0x15(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
cmp    $0x40,%eax
jl     112a <mangle_append+0x2a>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <mangle_append+0x41>
mov    -0x15(%rbp),%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mangle_append>:
mov    %esi,%eax
cmp    $0x3e,%esi
jg     1110 <mangle_append+0x10>
movslq %eax,%rcx
add    $0x1,%eax
mov    %dl,(%rdi,%rcx,1)
ret

LLVM IR (-O0):
define i32 @mangle_append(i8* %0, i32 %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8 %2, i8* %7
%8 = load i32, i32* %6
%9 = add nsw i32 %8, 1
%10 = icmp sge i32 %9, 64
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %6
store i32 %12, i32* %4
br label %21
13: ; preds = %3
%14 = load i8, i8* %7
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 %14, i8* %18
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %21
21: ; preds = %13, %11
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @mangle_append(i8* nocapture writeonly %0, i32 %1, i8 signext %2) {
%4 = icmp sgt i32 %1, 62
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = add nsw i32 %1, 1
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 %2, i8* %8
br label %9
9: ; preds = %3, %5
%10 = phi i32 [ %6, %5 ], [ %1, %3 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
size_t coap_opt_put_uint(int /*<<< orphan*/ *, int /*<<< orphan*/, int,
                         unsigned int);
size_t coap_put_option_block1(uint8_t *buf, uint16_t lastonum, unsigned blknum,
                              unsigned szx, int more) {
  return coap_opt_put_uint(buf, lastonum, (27),
                           (blknum << 4) | szx | (more ? 0x8 : 0));
}


x86 assembly (clang, -O0):
<coap_put_option_block1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%ecx
shl    $0x4,%ecx
or     -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
xor    %eax,%eax
mov    $0x8,%edx
cmp    $0x0,%r8d
cmovne %edx,%eax
or     %eax,%ecx
mov    $0x1b,%edx
call   1030 <coap_opt_put_uint@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coap_put_option_block1>:
xor    %eax,%eax
test   %r8d,%r8d
setne  %al
shl    $0x4,%edx
or     %edx,%ecx
shl    $0x3,%eax
or     %eax,%ecx
mov    $0x1b,%edx
jmp    1030 <coap_opt_put_uint@plt>

LLVM IR (-O0):
define i64 @coap_put_option_block1(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = shl i32 %13, 4
%15 = load i32, i32* %9
%16 = or i32 %14, %15
%17 = load i32, i32* %10
%18 = icmp ne i32 %17, 0
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 8, i32 0
%21 = or i32 %16, %20
%22 = call i64 @coap_opt_put_uint(i32* %11, i32 %12, i32 27, i32 %21)
ret i64 %22
}

LLVM IR (-O2):
define i64 @coap_put_option_block1(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl i32 %2, 4
%7 = or i32 %6, %3
%8 = icmp eq i32 %4, 0
%9 = select i1 %8, i32 0, i32 8
%10 = or i32 %7, %9
%11 = tail call i64 @coap_opt_put_uint(i32* %0, i32 %1, i32 27, i32 %10)
ret i64 %11
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR8E_set(void) { return U_WMRCORENONE_set("U_WMR8E"); }


x86 assembly (clang, -O0):
<U_WMR8E_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR8E_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR8E\00"
define i8* @U_WMR8E_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR8E\00"
define i8* @U_WMR8E_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int px_date_month(char *cp) {
  int month, i;
  for (month = 0, i = 4; i < 6; i++)
    month = month * 10 + (cp[i] - '0');
  return month;
}


x86 assembly (clang, -O0):
<px_date_month>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x4,-0x10(%rbp)
cmpl   $0x6,-0x10(%rbp)
jge    1146 <px_date_month+0x46>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <px_date_month+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<px_date_month>:
movsbl 0x4(%rdi),%eax
lea    (%rax,%rax,4),%eax
movsbl 0x5(%rdi),%ecx
lea    (%rcx,%rax,2),%eax
add    $0xfffffdf0,%eax
ret

LLVM IR (-O0):
define i32 @px_date_month(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 4, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 6
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 10
%11 = load i8*, i8** %2
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = sub nsw i32 %16, 48
%18 = add nsw i32 %10, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %8
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @px_date_month(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 4
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = mul nsw i32 %4, 10
%6 = getelementptr inbounds i8, i8* %0, i64 5
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = add nsw i32 %5, -528
%10 = add nsw i32 %9, %8
ret i32 %10
}
void ar2315_prom_init(void) {}


x86 assembly (clang, -O0):
<ar2315_prom_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar2315_prom_init>:
ret

LLVM IR (-O0):
define void @ar2315_prom_init() {
ret void
}

LLVM IR (-O2):
define void @ar2315_prom_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/
UpnpResponse_MediaRenderer_RenderingControl_SetVolume(void *);
int /*<<< orphan*/ printf(char *, unsigned int, char *, unsigned short);
void UpnpMediaRenderer_RenderingControl_SetVolume(
    void *upnptoken, unsigned int InstanceID, char *Channel,
    unsigned short DesiredVolume) {
  printf("Invoke: UpnpMediaRenderer_RenderingControl_SetVolume(%u,%s,%u);\r\n",
         InstanceID, Channel, DesiredVolume);
  UpnpResponse_MediaRenderer_RenderingControl_SetVolume(upnptoken);
}


x86 assembly (clang, -O0):
<UpnpMediaRenderer_RenderingControl_SetVolume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cx,%ax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ax,-0x1a(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
lea    0xeb8(%rip),%rdi
movzwl -0x1a(%rbp),%ecx
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <UpnpResponse_MediaRenderer_RenderingControl_SetVolume@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpnpMediaRenderer_RenderingControl_SetVolume>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <UpnpResponse_MediaRenderer_RenderingControl_SetVolume@plt>

LLVM IR (-O0):
@.str = [66 x i8] c"Invoke: UpnpMediaRenderer_RenderingControl_SetVolume(%u,%s,%u);\0D\0A\00"
define void @UpnpMediaRenderer_RenderingControl_SetVolume(i8* %0, i32 %1, i8* %2, i16 zeroext %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i16
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i16 %3, i16* %8
%9 = load i32, i32* %6
%10 = load i8*, i8** %7
%11 = load i16, i16* %8
%12 = call i32 @printf(i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str, i64 0, i64 0), i32 %9, i8* %10, i16 zeroext %11)
%13 = load i8*, i8** %5
%14 = call i32 @UpnpResponse_MediaRenderer_RenderingControl_SetVolume(i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [66 x i8] c"Invoke: UpnpMediaRenderer_RenderingControl_SetVolume(%u,%s,%u);\0D\0A\00"
define void @UpnpMediaRenderer_RenderingControl_SetVolume(i8* %0, i32 %1, i8* %2, i16 zeroext %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %2, i16 zeroext %3)
%6 = tail call i32 @UpnpResponse_MediaRenderer_RenderingControl_SetVolume(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ADC_Init();
int /*<<< orphan*/ Interrupts_Init();
int /*<<< orphan*/ Oscillator_Init();
int /*<<< orphan*/ PCA_Init();
int /*<<< orphan*/ Port_IO_Init();
int /*<<< orphan*/ Timer_Init();
int /*<<< orphan*/ Voltage_Reference_Init();
void Init_Device(void) {
  PCA_Init();
  Timer_Init();
  ADC_Init();
  Voltage_Reference_Init();
  Port_IO_Init();
  Oscillator_Init();
  Interrupts_Init();
}


x86 assembly (clang, -O0):
<Init_Device>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <PCA_Init@plt>
mov    $0x0,%al
call   1040 <Timer_Init@plt>
mov    $0x0,%al
call   1080 <ADC_Init@plt>
mov    $0x0,%al
call   1060 <Voltage_Reference_Init@plt>
mov    $0x0,%al
call   1070 <Port_IO_Init@plt>
mov    $0x0,%al
call   1030 <Oscillator_Init@plt>
mov    $0x0,%al
call   1090 <Interrupts_Init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init_Device>:
push   %rax
xor    %eax,%eax
call   1050 <PCA_Init@plt>
xor    %eax,%eax
call   1040 <Timer_Init@plt>
xor    %eax,%eax
call   1080 <ADC_Init@plt>
xor    %eax,%eax
call   1060 <Voltage_Reference_Init@plt>
xor    %eax,%eax
call   1070 <Port_IO_Init@plt>
xor    %eax,%eax
call   1030 <Oscillator_Init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <Interrupts_Init@plt>

LLVM IR (-O0):
define void @Init_Device() {
%1 = call i32 (...) @PCA_Init()
%2 = call i32 (...) @Timer_Init()
%3 = call i32 (...) @ADC_Init()
%4 = call i32 (...) @Voltage_Reference_Init()
%5 = call i32 (...) @Port_IO_Init()
%6 = call i32 (...) @Oscillator_Init()
%7 = call i32 (...) @Interrupts_Init()
ret void
}

LLVM IR (-O2):
define void @Init_Device() {
%1 = tail call i32 (...) @PCA_Init()
%2 = tail call i32 (...) @Timer_Init()
%3 = tail call i32 (...) @ADC_Init()
%4 = tail call i32 (...) @Voltage_Reference_Init()
%5 = tail call i32 (...) @Port_IO_Init()
%6 = tail call i32 (...) @Oscillator_Init()
%7 = tail call i32 (...) @Interrupts_Init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void mailimf_domain_free(char *domain) { free(domain); }


x86 assembly (clang, -O0):
<mailimf_domain_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mailimf_domain_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mailimf_domain_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mailimf_domain_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ string;

/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *mallocAndCpy(char *string) {
  char *pointer;
  pointer = (char *)malloc(sizeof(string) + 1);
  if (strlen(string) > 0) {
    strcpy(pointer, string);
    return pointer;
  }
  return pointer;
}


x86 assembly (clang, -O0):
<mallocAndCpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x9,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
cmp    $0x0,%rax
jle    1177 <mallocAndCpy+0x47>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    117f <mallocAndCpy+0x4f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocAndCpy>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x9,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
test   %rax,%rax
jle    115c <mallocAndCpy+0x2c>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @mallocAndCpy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = call i64 @malloc(i32 9)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = load i8*, i8** %3
%13 = call i32 @strcpy(i8* %11, i8* %12)
%14 = load i8*, i8** %4
store i8* %14, i8** %2
br label %17
15: ; preds = %1
%16 = load i8*, i8** %4
store i8* %16, i8** %2
br label %17
17: ; preds = %15, %10
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @mallocAndCpy(i8* %0) {
%2 = tail call i64 @malloc(i32 9)
%3 = inttoptr i64 %2 to i8*
%4 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %3, i8* %0)
br label %8
8: ; preds = %1, %6
ret i8* %3
}
float findvifrom_a_vf_t(float a, float vf, float t) { return vf - (a * t); }


x86 assembly (clang, -O0):
<findvifrom_a_vf_t>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<findvifrom_a_vf_t>:
mulss  %xmm2,%xmm0
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @findvifrom_a_vf_t(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = load float, float* %4
%9 = load float, float* %6
%10 = fneg float %8
%11 = call float @llvm.fmuladd.f32(float %10, float %9, float %7)
ret float %11
}

LLVM IR (-O2):
define float @findvifrom_a_vf_t(float %0, float %1, float %2) {
%4 = fneg float %0
%5 = tail call float @llvm.fmuladd.f32(float %4, float %2, float %1)
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ checkNotNull(void *, char *);
void *realloc(void *, size_t);
void *realloc_s(void *ptr, size_t size) {
  void *r = realloc(ptr, size);
  checkNotNull(r, "realloc() failed");
  return r;
}


x86 assembly (clang, -O0):
<realloc_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xeb4(%rip),%rsi
call   1030 <checkNotNull@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realloc_s>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
lea    0xed0(%rip),%rsi
mov    %rax,%rdi
call   1030 <checkNotNull@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"realloc() failed\00"
define i8* @realloc_s(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i32 @checkNotNull(i8* %9, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%11 = load i8*, i8** %5
ret i8* %11
}

LLVM IR (-O2):
@.str = [17 x i8] c"realloc() failed\00"
define i8* @realloc_s(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = tail call i32 @checkNotNull(i8* %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
int __ocl_rotate_int(int src1, int src2) {
  int lshift = src2 & ((1 << 5) - 1);
  int overflow = (src1 >> (32 - lshift)) & ((((int)1) << lshift) - 1);
  return (src1 << lshift) | overflow;
}


x86 assembly (clang, -O0):
<__ocl_rotate_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
or     -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_rotate_int>:
and    $0x1f,%esi
mov    %esi,%ecx
neg    %cl
mov    %edi,%edx
sar    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %eax
and    %edx,%eax
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @__ocl_rotate_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, 31
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i32, i32* %5
%11 = sub nsw i32 32, %10
%12 = ashr i32 %9, %11
%13 = load i32, i32* %5
%14 = shl i32 1, %13
%15 = sub nsw i32 %14, 1
%16 = and i32 %12, %15
store i32 %16, i32* %6
%17 = load i32, i32* %3
%18 = load i32, i32* %5
%19 = shl i32 %17, %18
%20 = load i32, i32* %6
%21 = or i32 %19, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @__ocl_rotate_int(i32 %0, i32 %1) {
%3 = and i32 %1, 31
%4 = sub nuw nsw i32 32, %3
%5 = ashr i32 %0, %4
%6 = shl nsw i32 -1, %3
%7 = xor i32 %6, -1
%8 = and i32 %5, %7
%9 = shl i32 %0, %3
%10 = or i32 %8, %9
ret i32 %10
}
unsigned int bswap_32(unsigned int x) {
  return ((((x)&0xff000000) >> 24) | (((x)&0x00ff0000) >> 8) |
          (((x)&0x0000ff00) << 8) | (((x)&0x000000ff) << 24));
}


x86 assembly (clang, -O0):
<bswap_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff000000,%eax
shr    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @bswap_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -16777216
%5 = lshr i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 16711680
%8 = lshr i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 65280
%12 = shl i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 255
%16 = shl i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @bswap_32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
int test_imm_08int64_lowword_mem(long long *val) {
  return ((*val) & (0x08 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_08int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_08int64_lowword_mem>:
testb  $0x8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_08int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 8
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_08int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 8
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ xtoa(unsigned long, char *, int, int);
char *itoa(int val, char *buf, int radix) {
  if (radix == 10 && val < 0)
    xtoa((unsigned long)val, buf, radix, 1);
  else
    xtoa((unsigned long)(unsigned int)val, buf, radix, 0);
  return buf;
}


x86 assembly (clang, -O0):
<itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0xa,-0x14(%rbp)
jne    1150 <itoa+0x40>
cmpl   $0x0,-0x4(%rbp)
jge    1150 <itoa+0x40>
movslq -0x4(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x1,%ecx
call   1030 <xtoa@plt>
jmp    1163 <itoa+0x53>
mov    -0x4(%rbp),%eax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <xtoa@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa>:
push   %rbx
mov    %rsi,%rbx
test   %edi,%edi
jns    112f <itoa+0x1f>
cmp    $0xa,%edx
jne    112f <itoa+0x1f>
movslq %edi,%rdi
mov    %rbx,%rsi
mov    $0xa,%edx
mov    $0x1,%ecx
jmp    1136 <itoa+0x26>
mov    %edi,%edi
mov    %rbx,%rsi
xor    %ecx,%ecx
call   1030 <xtoa@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 10
br i1 %8, label %9, label %18
9: ; preds = %3
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = call i32 @xtoa(i64 %14, i8* %15, i32 %16, i32 1)
br label %24
18: ; preds = %9, %3
%19 = load i32, i32* %4
%20 = zext i32 %19 to i64
%21 = load i8*, i8** %5
%22 = load i32, i32* %6
%23 = call i32 @xtoa(i64 %20, i8* %21, i32 %22, i32 0)
br label %24
24: ; preds = %18, %12
%25 = load i8*, i8** %5
ret i8* %25
}

LLVM IR (-O2):
define i8* @itoa(i32 %0, i8* returned %1, i32 %2) {
%4 = icmp eq i32 %2, 10
%5 = icmp slt i32 %0, 0
%6 = and i1 %5, %4
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = sext i32 %0 to i64
%9 = tail call i32 @xtoa(i64 %8, i8* %1, i32 10, i32 1)
br label %13
10: ; preds = %3
%11 = zext i32 %0 to i64
%12 = tail call i32 @xtoa(i64 %11, i8* %1, i32 %2, i32 0)
br label %13
13: ; preds = %10, %7
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char, char *);
int /*<<< orphan*/ stdout;
void disp(char *s, char p) {
  printf("d%02d%s\n", p, s);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<disp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disp>:
push   %rax
mov    %rdi,%rdx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"d%02d%s\0A\00"
@stdout = global i32 0
define void @disp(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8*, i8** %3
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext %5, i8* %6)
%8 = load i32, i32* @stdout
%9 = call i32 @fflush(i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"d%02d%s\0A\00"
@stdout = global i32 0
define void @disp(i8* %0, i8 signext %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext %1, i8* %0)
%4 = load i32, i32* @stdout
%5 = tail call i32 @fflush(i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int symlinkat(char const *, int /*<<< orphan*/, char const *);
int symlink(const char *target, const char *linkpath) {
  return symlinkat(target, AT_FDCWD, linkpath);
}


x86 assembly (clang, -O0):
<symlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <symlinkat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<symlink>:
mov    %rsi,%rdx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
jmp    1030 <symlinkat@plt>

LLVM IR (-O0):
@AT_FDCWD = global i32 0
define i32 @symlink(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @AT_FDCWD
%7 = load i8*, i8** %4
%8 = call i32 @symlinkat(i8* %5, i32 %6, i8* %7)
ret i32 %8
}

LLVM IR (-O2):
@AT_FDCWD = global i32 0
define i32 @symlink(i8* %0, i8* %1) {
%3 = load i32, i32* @AT_FDCWD
%4 = tail call i32 @symlinkat(i8* %0, i32 %3, i8* %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ core7_swap(char *, int);
void U_EMRLINETO_swap(char *record, int torev) { core7_swap(record, torev); }


x86 assembly (clang, -O0):
<U_EMRLINETO_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core7_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRLINETO_swap>:
jmp    1030 <core7_swap@plt>

LLVM IR (-O0):
define void @U_EMRLINETO_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core7_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_EMRLINETO_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core7_swap(i8* %0, i32 %1)
ret void
}
double test_tgamma(double x) { return __builtin_tgamma(x); }


x86 assembly (clang, -O0):
<test_tgamma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tgamma@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_tgamma>:
jmp    1030 <tgamma@plt>

LLVM IR (-O0):
define double @test_tgamma(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @tgamma(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test_tgamma(double %0) {
%2 = tail call double @tgamma(double %0)
ret double %2
}
/* Variables and functions */
int strlen(char const *);
int strncmp(char const *, char const *, int);
int ccol_strstarts(const char *s, const char *token) {
  int len = strlen(token);
  return strncmp(s, token, len);
}


x86 assembly (clang, -O0):
<ccol_strstarts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccol_strstarts>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
define i32 @ccol_strstarts(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = call i32 @strncmp(i8* %8, i8* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @ccol_strstarts(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ insertfunctionhere(int, int);
int main() {
  insertfunctionhere(100, 1000);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x64,%edi
mov    $0x3e8,%esi
call   1030 <insertfunctionhere@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
mov    $0x3e8,%esi
call   1030 <insertfunctionhere@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @insertfunctionhere(i32 100, i32 1000)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @insertfunctionhere(i32 100, i32 1000)
ret i32 0
}