xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int increment(int);
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int b = 8675308;
  printf("libsotest says %d incremented is %d\n", b, increment(b));
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x845fec,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <increment@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x845fec,%edi
call   1030 <increment@plt>
lea    0xebe(%rip),%rdi
mov    $0x845fec,%esi
mov    %eax,%edx
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"libsotest says %d incremented is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 8675308, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @increment(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [37 x i8] c"libsotest says %d incremented is %d\0A\00"
define i32 @main() {
%1 = tail call i32 @increment(i32 8675308)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 8675308, i32 %1)
%3 = tail call i32 @exit(i32 0)
unreachable
}
__attribute__((no, noclone)) int f3(int k) {
  k &= 63;
  return 4 | ((k + 2) >> 5);
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3f,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
sar    $0x5,%eax
or     $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
and    $0x3f,%edi
lea    0x2(%rdi),%eax
shr    $0x5,%eax
or     $0x4,%eax
ret

LLVM IR (-O0):
define i32 @f3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 63
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 2
%7 = ashr i32 %6, 5
%8 = or i32 4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @f3(i32 %0) {
%2 = and i32 %0, 63
%3 = add nuw nsw i32 %2, 2
%4 = lshr i32 %3, 5
%5 = or i32 %4, 4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Rf_initialize_R(int, char **);
int /*<<< orphan*/ setup_Rmainloop();
int Rf_initEmbeddedR(int argc, char **argv) {
  Rf_initialize_R(argc, argv);
  setup_Rmainloop();
  return (1);
}


x86 assembly (clang, -O0):
<Rf_initEmbeddedR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <Rf_initialize_R@plt>
mov    $0x0,%al
call   1030 <setup_Rmainloop@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rf_initEmbeddedR>:
push   %rax
call   1040 <Rf_initialize_R@plt>
xor    %eax,%eax
call   1030 <setup_Rmainloop@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Rf_initEmbeddedR(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @Rf_initialize_R(i32 %5, i8** %6)
%8 = call i32 (...) @setup_Rmainloop()
ret i32 1
}

LLVM IR (-O2):
define i32 @Rf_initEmbeddedR(i32 %0, i8** %1) {
%3 = tail call i32 @Rf_initialize_R(i32 %0, i8** %1)
%4 = tail call i32 (...) @setup_Rmainloop()
ret i32 1
}
void ata_scsi_acpi_bind(struct ata_device *dev) {}


x86 assembly (clang, -O0):
<ata_scsi_acpi_bind>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ata_scsi_acpi_bind>:
ret

LLVM IR (-O0):
%struct.ata_device = type opaque
define void @ata_scsi_acpi_bind(%struct.ata_device* %0) {
%2 = alloca %struct.ata_device*
store %struct.ata_device* %0, %struct.ata_device** %2
ret void
}

LLVM IR (-O2):
%struct.ata_device = type opaque
define void @ata_scsi_acpi_bind(%struct.ata_device* nocapture %0) {
ret void
}
int func(int t) { return t; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @func(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ GL_MODELVIEW;
int /*<<< orphan*/ glMatrixMode(int /*<<< orphan*/);
int /*<<< orphan*/ glutPostRedisplay();
void reshape(int w, int h) {
  glMatrixMode(GL_MODELVIEW);
  glutPostRedisplay();
}


x86 assembly (clang, -O0):
<reshape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1040 <glutPostRedisplay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reshape>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <glutPostRedisplay@plt>

LLVM IR (-O0):
@GL_MODELVIEW = global i32 0
define void @reshape(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @GL_MODELVIEW
%6 = call i32 @glMatrixMode(i32 %5)
%7 = call i32 (...) @glutPostRedisplay()
ret void
}

LLVM IR (-O2):
@GL_MODELVIEW = global i32 0
define void @reshape(i32 %0, i32 %1) {
%3 = load i32, i32* @GL_MODELVIEW
%4 = tail call i32 @glMatrixMode(i32 %3)
%5 = tail call i32 (...) @glutPostRedisplay()
ret void
}
int main() {
  int X$1;
  (X$1++);
  (X$1 += 1);
  (X$1 -= 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void up_idle(void) {}


x86 assembly (clang, -O0):
<up_idle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<up_idle>:
ret

LLVM IR (-O0):
define void @up_idle() {
ret void
}

LLVM IR (-O2):
define void @up_idle() {
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
char *basic_malloc(unsigned int const);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strcpy(char *, char const *);
unsigned int strlen(char const *);
int main(void) {
  const char *title = "The Unix Programming Environment";
  const unsigned int size = strlen(title);
  char *ptr;
  ptr = basic_malloc(size);
  strcpy(ptr, title);
  printf("%s\n", ptr);
  ptr = NULL;
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <basic_malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x20(%rbp),%rsi
lea    0xe97(%rip),%rdi
call   1060 <printf@plt>
movq   $0x0,-0x20(%rbp)
mov    0x2e42(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xeb5(%rip),%r14
mov    %r14,%rdi
call   1050 <strlen@plt>
mov    %eax,%edi
call   1040 <basic_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
lea    0xeb2(%rip),%rdi
mov    %rbx,%rsi
call   1060 <printf@plt>
mov    0x2e62(%rip),%rax
mov    (%rax),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [33 x i8] c"The Unix Programming Environment\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i8* @basic_malloc(i32 %7)
store i8* %8, i8** %4
%9 = load i8*, i8** %4
%10 = load i8*, i8** %2
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %12)
store i8* null, i8** %4
%14 = load i32, i32* @EXIT_SUCCESS
ret i32 %14
}

LLVM IR (-O2):
@.str = [33 x i8] c"The Unix Programming Environment\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%2 = tail call i8* @basic_malloc(i32 %1)
%3 = tail call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
void countKeysInSlot(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               54, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<countKeysInSlot>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x36,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<countKeysInSlot>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x36,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.countKeysInSlot = [16 x i8] c"countKeysInSlot\00"
define void @countKeysInSlot() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 54, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.countKeysInSlot, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.countKeysInSlot = [16 x i8] c"countKeysInSlot\00"
define void @countKeysInSlot() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 54, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.countKeysInSlot, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bwt_bwtgen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int bwt_bwtgen_main(int argc, char *argv[]) {
  if (argc < 3) {
    fprintf(stderr, "Usage: bwtgen <in.pac> <out.bwt>\n");
    return 1;
  }
  bwt_bwtgen(argv[1], argv[2]);
  return 0;
}


x86 assembly (clang, -O0):
<bwt_bwtgen_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    115a <bwt_bwtgen_main+0x3a>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xeb7(%rip),%rsi
call   1040 <fprintf@plt>
movl   $0x1,-0x4(%rbp)
jmp    1176 <bwt_bwtgen_main+0x56>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1030 <bwt_bwtgen@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwt_bwtgen_main>:
push   %rax
cmp    $0x2,%edi
jg     1142 <bwt_bwtgen_main+0x22>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
call   1030 <bwt_bwtgen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"Usage: bwtgen <in.pac> <out.bwt>\0A\00"
define i32 @bwt_bwtgen_main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 3
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %3
br label %19
11: ; preds = %2
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = load i8**, i8*** %5
%16 = getelementptr inbounds i8*, i8** %15, i64 2
%17 = load i8*, i8** %16
%18 = call i32 @bwt_bwtgen(i8* %14, i8* %17)
store i32 0, i32* %3
br label %19
19: ; preds = %11, %8
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"Usage: bwtgen <in.pac> <out.bwt>\0A\00"
define i32 @bwt_bwtgen_main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 3
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
br label %13
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8*, i8** %1, i64 2
%11 = load i8*, i8** %10
%12 = tail call i32 @bwt_bwtgen(i8* %9, i8* %11)
br label %13
13: ; preds = %7, %4
%14 = phi i32 [ 1, %4 ], [ 0, %7 ]
ret i32 %14
}
void __cpuid(unsigned int where[4], unsigned int leaf) {
  asm volatile("cpuid"
               : "=a"(*where), "=b"(*(where + 1)), "=c"(*(where + 2)),
                 "=d"(*(where + 3))
               : "a"(leaf));
  return;
}


x86 assembly (clang, -O0):
<__cpuid>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%r8
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%eax
cpuid
mov    %eax,%r9d
mov    -0x28(%rbp),%rax
mov    %ecx,%esi
mov    -0x20(%rbp),%rcx
mov    %r9d,(%r8)
mov    %ebx,0x4(%rdi)
mov    %esi,0x8(%rcx)
mov    %edx,0xc(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cpuid>:
push   %rbx
mov    %esi,%eax
cpuid
mov    %eax,(%rdi)
mov    %ebx,0x4(%rdi)
mov    %ecx,0x8(%rdi)
mov    %edx,0xc(%rdi)
pop    %rbx
ret

LLVM IR (-O0):
define void @__cpuid(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 2
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 3
%12 = load i32, i32* %4
%13 = call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %12)
%14 = extractvalue { i32, i32, i32, i32 } %13, 0
%15 = extractvalue { i32, i32, i32, i32 } %13, 1
%16 = extractvalue { i32, i32, i32, i32 } %13, 2
%17 = extractvalue { i32, i32, i32, i32 } %13, 3
store i32 %14, i32* %5
store i32 %15, i32* %7
store i32 %16, i32* %9
store i32 %17, i32* %11
ret void
}

LLVM IR (-O2):
define void @__cpuid(i32* nocapture writeonly %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = getelementptr inbounds i32, i32* %0, i64 2
%5 = getelementptr inbounds i32, i32* %0, i64 3
%6 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %1)
%7 = extractvalue { i32, i32, i32, i32 } %6, 0
%8 = extractvalue { i32, i32, i32, i32 } %6, 1
%9 = extractvalue { i32, i32, i32, i32 } %6, 2
%10 = extractvalue { i32, i32, i32, i32 } %6, 3
store i32 %7, i32* %0
store i32 %8, i32* %3
store i32 %9, i32* %4
store i32 %10, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_calli(void *);
int /*<<< orphan*/ e_movrr(int /*<<< orphan*/, int);
int /*<<< orphan*/ e_pushr(int /*<<< orphan*/);
int /*<<< orphan*/ e_subri(int /*<<< orphan*/, int);
void e_calli_rtnp(void *i) {
  e_movrr(0, 4);
  e_subri(0, 8);
  e_pushr(0);
  e_calli(i);
}


x86 assembly (clang, -O0):
<e_calli_rtnp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
mov    $0x4,%esi
call   1040 <e_movrr@plt>
xor    %edi,%edi
mov    $0x8,%esi
call   1030 <e_subri@plt>
xor    %edi,%edi
call   1060 <e_pushr@plt>
mov    -0x8(%rbp),%rdi
call   1050 <e_calli@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_calli_rtnp>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
mov    $0x4,%esi
call   1040 <e_movrr@plt>
xor    %edi,%edi
mov    $0x8,%esi
call   1030 <e_subri@plt>
xor    %edi,%edi
call   1060 <e_pushr@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <e_calli@plt>

LLVM IR (-O0):
define void @e_calli_rtnp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @e_movrr(i32 0, i32 4)
%4 = call i32 @e_subri(i32 0, i32 8)
%5 = call i32 @e_pushr(i32 0)
%6 = load i8*, i8** %2
%7 = call i32 @e_calli(i8* %6)
ret void
}

LLVM IR (-O2):
define void @e_calli_rtnp(i8* %0) {
%2 = tail call i32 @e_movrr(i32 0, i32 4)
%3 = tail call i32 @e_subri(i32 0, i32 8)
%4 = tail call i32 @e_pushr(i32 0)
%5 = tail call i32 @e_calli(i8* %0)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *really_do_leak(size_t sz) { return malloc(sz); }


x86 assembly (clang, -O0):
<really_do_leak>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<really_do_leak>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @really_do_leak(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @really_do_leak(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
int main(argc, argv)
int argc;
char *argv[];
{ return yylex(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <yylex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <yylex@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @yylex()
ret i32 %6
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @yylex()
ret i32 %3
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ TIMER_ABSTIME;
int /*<<< orphan*/ assert(int);
scalar_t__ clock_nanosleep(int /*<<< orphan*/, int /*<<< orphan*/,
                           struct timespec const *, int /*<<< orphan*/ *);
void rtutils_wait(const struct timespec *delay) {
  assert(clock_nanosleep(CLOCK_MONOTONIC, TIMER_ABSTIME, delay, NULL) == 0);
}


x86 assembly (clang, -O0):
<rtutils_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
call   1040 <clock_nanosleep@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtutils_wait>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
xor    %ecx,%ecx
call   1040 <clock_nanosleep@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
@TIMER_ABSTIME = global i32 0
define void @rtutils_wait(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = load i32, i32* @TIMER_ABSTIME
%5 = load %struct.timespec*, %struct.timespec** %2
%6 = call i64 @clock_nanosleep(i32 %3, i32 %4, %struct.timespec* %5, i32* null)
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
@TIMER_ABSTIME = global i32 0
define void @rtutils_wait(%struct.timespec* %0) {
%2 = load i32, i32* @CLOCK_MONOTONIC
%3 = load i32, i32* @TIMER_ABSTIME
%4 = tail call i64 @clock_nanosleep(i32 %2, i32 %3, %struct.timespec* %0, i32* null)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret void
}
unsigned hexval(int c) {
  if ('0' <= c && c <= '9')
    return c - '0';
  else if ('a' <= c && c <= 'f')
    return c - 'a' + 10;
  else if ('A' <= c && c <= 'F')
    return c - 'A' + 10;
  else
    return 0;
}


x86 assembly (clang, -O0):
<hexval>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    $0x30,%eax
cmp    -0x8(%rbp),%eax
jg     112d <hexval+0x2d>
cmpl   $0x39,-0x8(%rbp)
jg     112d <hexval+0x2d>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1186 <hexval+0x86>
mov    $0x61,%eax
cmp    -0x8(%rbp),%eax
jg     1156 <hexval+0x56>
cmpl   $0x66,-0x8(%rbp)
jg     1156 <hexval+0x56>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1186 <hexval+0x86>
mov    $0x41,%eax
cmp    -0x8(%rbp),%eax
jg     117f <hexval+0x7f>
cmpl   $0x46,-0x8(%rbp)
jg     117f <hexval+0x7f>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1186 <hexval+0x86>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexval>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
jb     1124 <hexval+0x24>
lea    -0x61(%rdi),%eax
cmp    $0x5,%eax
ja     1116 <hexval+0x16>
add    $0xffffffa9,%edi
mov    %edi,%eax
ret
lea    -0x41(%rdi),%ecx
add    $0xffffffc9,%edi
xor    %eax,%eax
cmp    $0x6,%ecx
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @hexval(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 48, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 48
store i32 %11, i32* %2
br label %33
12: ; preds = %6, %1
%13 = load i32, i32* %3
%14 = icmp sle i32 97, %13
br i1 %14, label %15, label %22
15: ; preds = %12
%16 = load i32, i32* %3
%17 = icmp sle i32 %16, 102
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32, i32* %3
%20 = sub nsw i32 %19, 97
%21 = add nsw i32 %20, 10
store i32 %21, i32* %2
br label %33
22: ; preds = %15, %12
%23 = load i32, i32* %3
%24 = icmp sle i32 65, %23
br i1 %24, label %25, label %32
25: ; preds = %22
%26 = load i32, i32* %3
%27 = icmp sle i32 %26, 70
br i1 %27, label %28, label %32
28: ; preds = %25
%29 = load i32, i32* %3
%30 = sub nsw i32 %29, 65
%31 = add nsw i32 %30, 10
store i32 %31, i32* %2
br label %33
32: ; preds = %25, %22
store i32 0, i32* %2
br label %33
33: ; preds = %32, %28, %18, %9
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @hexval(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = add i32 %0, -97
%6 = icmp ult i32 %5, 6
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = add nsw i32 %0, -87
br label %14
9: ; preds = %4
%10 = add i32 %0, -65
%11 = icmp ult i32 %10, 6
%12 = add nsw i32 %0, -55
%13 = select i1 %11, i32 %12, i32 0
br label %14
14: ; preds = %1, %9, %7
%15 = phi i32 [ %8, %7 ], [ %13, %9 ], [ %2, %1 ]
ret i32 %15
}
/* Type definitions */
struct mat4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat4_perspective(float *, float, float, float, float);
__attribute__((always_)) struct mat4 *psmat4_perspective(struct mat4 *result,
                                                         float fov_y,
                                                         float aspect, float n,
                                                         float f) {
  mat4_perspective((float *)result, fov_y, aspect, n, f);
  return result;
}


x86 assembly (clang, -O0):
<psmat4_perspective>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  %xmm2,-0x14(%rbp)
movss  %xmm3,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
movss  -0x14(%rbp),%xmm2
movss  -0x18(%rbp),%xmm3
call   1030 <mat4_perspective@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat4_perspective>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat4_perspective@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_perspective(%struct.mat4* %0, float %1, float %2, float %3, float %4) {
%6 = alloca %struct.mat4*
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store %struct.mat4* %0, %struct.mat4** %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float %4, float* %10
%11 = load %struct.mat4*, %struct.mat4** %6
%12 = bitcast %struct.mat4* %11 to float*
%13 = load float, float* %7
%14 = load float, float* %8
%15 = load float, float* %9
%16 = load float, float* %10
%17 = call i32 @mat4_perspective(float* %12, float %13, float %14, float %15, float %16)
%18 = load %struct.mat4*, %struct.mat4** %6
ret %struct.mat4* %18
}

LLVM IR (-O2):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_perspective(%struct.mat4* returned %0, float %1, float %2, float %3, float %4) {
%6 = bitcast %struct.mat4* %0 to float*
%7 = tail call i32 @mat4_perspective(float* %6, float %1, float %2, float %3, float %4)
ret %struct.mat4* %0
}
/* Variables and functions */
double __nv_erfinv(double);
double erfinv(double __a) { return __nv_erfinv(__a); }


x86 assembly (clang, -O0):
<erfinv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__nv_erfinv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erfinv>:
jmp    1030 <__nv_erfinv@plt>

LLVM IR (-O0):
define double @erfinv(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__nv_erfinv(double %3)
ret double %4
}

LLVM IR (-O2):
define double @erfinv(double %0) {
%2 = tail call double @__nv_erfinv(double %0)
ret double %2
}
void gtk_tree_model_sort_clear_cache() {}


x86 assembly (clang, -O0):
<gtk_tree_model_sort_clear_cache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_sort_clear_cache>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_sort_clear_cache() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_sort_clear_cache() {
ret void
}
long get_svp_cma_count(void) { return 0; }


x86 assembly (clang, -O0):
<get_svp_cma_count>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_svp_cma_count>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @get_svp_cma_count() {
ret i64 0
}

LLVM IR (-O2):
define i64 @get_svp_cma_count() {
ret i64 0
}
void MHal_PNL_TCON_Init(void) {}


x86 assembly (clang, -O0):
<MHal_PNL_TCON_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MHal_PNL_TCON_Init>:
ret

LLVM IR (-O0):
define void @MHal_PNL_TCON_Init() {
ret void
}

LLVM IR (-O2):
define void @MHal_PNL_TCON_Init() {
ret void
}
/* Type definitions */
struct statvfs {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int fstatvfs(int fd, struct statvfs *buf) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<fstatvfs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebd(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstatvfs>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.statvfs = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @fstatvfs(i32 %0, %struct.statvfs* %1) {
%3 = alloca i32
%4 = alloca %struct.statvfs*
store i32 %0, i32* %3
store %struct.statvfs* %1, %struct.statvfs** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.statvfs = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @fstatvfs(i32 %0, %struct.statvfs* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
float clampFloat(float input, float minimum, float maximum) {
  if (input > maximum)
    return maximum;
  if (input < minimum)
    return minimum;
  return input;
}


x86 assembly (clang, -O0):
<clampFloat>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1131 <clampFloat+0x31>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <clampFloat+0x5d>
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1153 <clampFloat+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <clampFloat+0x5d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clampFloat>:
maxss  %xmm0,%xmm1
movaps %xmm2,%xmm3
cmpltss %xmm0,%xmm3
movaps %xmm3,%xmm0
andnps %xmm1,%xmm0
andps  %xmm2,%xmm3
orps   %xmm0,%xmm3
movaps %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @clampFloat(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = load float, float* %7
%10 = fcmp ogt float %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load float, float* %7
store float %12, float* %4
br label %21
13: ; preds = %3
%14 = load float, float* %5
%15 = load float, float* %6
%16 = fcmp olt float %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load float, float* %6
store float %18, float* %4
br label %21
19: ; preds = %13
%20 = load float, float* %5
store float %20, float* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load float, float* %4
ret float %22
}

LLVM IR (-O2):
define float @clampFloat(float %0, float %1, float %2) {
%4 = fcmp ogt float %0, %2
%5 = fcmp olt float %0, %1
%6 = select i1 %5, float %1, float %0
%7 = select i1 %4, float %2, float %6
ret float %7
}
__typeof__(vfscanf(1, 1)) test_vfscanf_229(void) { return vfscanf(1, 1); }


x86 assembly (clang, -O0):
<test_vfscanf_229>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%esi
mov    %esi,%edi
mov    $0x0,%al
call   1030 <vfscanf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_vfscanf_229>:
mov    $0x1,%edi
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <vfscanf@plt>

LLVM IR (-O0):
define i32 @test_vfscanf_229() {
%1 = call i32 (i32, i32, ...) bitcast (i32 (...)* @vfscanf to i32 (i32, i32, ...)*)(i32 1, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_vfscanf_229() {
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @vfscanf to i32 (i32, i32, ...)*)(i32 1, i32 1)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ FW_CDEV_SHORT_RESET;
int /*<<< orphan*/ do_bus_reset(int /*<<< orphan*/);
void do_reset(void) { do_bus_reset(FW_CDEV_SHORT_RESET); }


x86 assembly (clang, -O0):
<do_reset>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <do_bus_reset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_reset>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <do_bus_reset@plt>

LLVM IR (-O0):
@FW_CDEV_SHORT_RESET = global i32 0
define void @do_reset() {
%1 = load i32, i32* @FW_CDEV_SHORT_RESET
%2 = call i32 @do_bus_reset(i32 %1)
ret void
}

LLVM IR (-O2):
@FW_CDEV_SHORT_RESET = global i32 0
define void @do_reset() {
%1 = load i32, i32* @FW_CDEV_SHORT_RESET
%2 = tail call i32 @do_bus_reset(i32 %1)
ret void
}
float maxf(float a, float b) { return (a >= b) ? a : b; }


x86 assembly (clang, -O0):
<maxf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jb     112c <maxf+0x2c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <maxf+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxf>:
movaps %xmm1,%xmm2
cmpless %xmm0,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @maxf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp oge float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @maxf(float %0, float %1) {
%3 = fcmp oge float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
float fabsf(float const);
void glmAbs3f(float out[3], const float x[3]) {
  for (size_t i = 0; i < 3; ++i)
    out[i] = fabsf(x[i]);
}


x86 assembly (clang, -O0):
<glmAbs3f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x3,-0x18(%rbp)
jae    1155 <glmAbs3f+0x55>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
movaps 0xecd(%rip),%xmm1
pand   %xmm1,%xmm0
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <glmAbs3f+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmAbs3f>:
movss  (%rsi),%xmm0
movaps 0xef5(%rip),%xmm1
andps  %xmm1,%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
andps  %xmm1,%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
andps  %xmm1,%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @glmAbs3f(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca i64
store float* %0, float** %3
store float* %1, float** %4
store i64 0, i64* %5
br label %6
6: ; preds = %18, %2
%7 = load i64, i64* %5
%8 = icmp ult i64 %7, 3
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load float*, float** %4
%11 = load i64, i64* %5
%12 = getelementptr inbounds float, float* %10, i64 %11
%13 = load float, float* %12
%14 = call float @llvm.fabs.f32(float %13)
%15 = load float*, float** %3
%16 = load i64, i64* %5
%17 = getelementptr inbounds float, float* %15, i64 %16
store float %14, float* %17
br label %18
18: ; preds = %9
%19 = load i64, i64* %5
%20 = add i64 %19, 1
store i64 %20, i64* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @glmAbs3f(float* nocapture writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = tail call float @llvm.fabs.f32(float %3)
store float %4, float* %0
%5 = getelementptr inbounds float, float* %1, i64 1
%6 = load float, float* %5
%7 = tail call float @llvm.fabs.f32(float %6)
%8 = getelementptr inbounds float, float* %0, i64 1
store float %7, float* %8
%9 = getelementptr inbounds float, float* %1, i64 2
%10 = load float, float* %9
%11 = tail call float @llvm.fabs.f32(float %10)
%12 = getelementptr inbounds float, float* %0, i64 2
store float %11, float* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ absolutex();
int /*<<< orphan*/ ror8addr(int /*<<< orphan*/);
void rorAbsx8(void) { ror8addr(absolutex()); }


x86 assembly (clang, -O0):
<rorAbsx8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <absolutex@plt>
mov    %eax,%edi
call   1040 <ror8addr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rorAbsx8>:
push   %rax
xor    %eax,%eax
call   1030 <absolutex@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <ror8addr@plt>

LLVM IR (-O0):
define void @rorAbsx8() {
%1 = call i32 (...) @absolutex()
%2 = call i32 @ror8addr(i32 %1)
ret void
}

LLVM IR (-O2):
define void @rorAbsx8() {
%1 = tail call i32 (...) @absolutex()
%2 = tail call i32 @ror8addr(i32 %1)
ret void
}
int isatty(int file) { return 0; }


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @isatty(i32 %0) {
ret i32 0
}
int test_imm_A1int8_mem(signed char *val) {
  return ((*val) & (0xA1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A1int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xa1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A1int8_mem>:
testb  $0xa1,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A1int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 161
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A1int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -95
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
void *__attribute__((noreturn)) test_thread(void *v_param) {
  pthread_exit(NULL);
}


x86 assembly (clang, -O0):
<test_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <pthread_exit@plt>

x86 assembly (clang, -O2):
<test_thread>:
push   %rax
xor    %edi,%edi
call   1030 <pthread_exit@plt>

LLVM IR (-O0):
define i8* @test_thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @pthread_exit(i32* null)
unreachable
}

LLVM IR (-O2):
define noalias i8* @test_thread(i8* nocapture readnone %0) {
%2 = tail call i32 @pthread_exit(i32* null)
unreachable
}
int indices(int x, int y, int z, int i, int j, int k) {
  return k + (j * z) + (i * y * z);
}


x86 assembly (clang, -O0):
<indices>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
imul   -0xc(%rbp),%ecx
add    %ecx,%eax
mov    -0x10(%rbp),%ecx
imul   -0x8(%rbp),%ecx
imul   -0xc(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indices>:
imul   %ecx,%esi
lea    (%rsi,%r8,1),%eax
imul   %edx,%eax
add    %r9d,%eax
ret

LLVM IR (-O0):
define i32 @indices(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %12
%14 = load i32, i32* %11
%15 = load i32, i32* %9
%16 = mul nsw i32 %14, %15
%17 = add nsw i32 %13, %16
%18 = load i32, i32* %10
%19 = load i32, i32* %8
%20 = mul nsw i32 %18, %19
%21 = load i32, i32* %9
%22 = mul nsw i32 %20, %21
%23 = add nsw i32 %17, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @indices(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = mul i32 %3, %1
%8 = add i32 %7, %4
%9 = mul i32 %8, %2
%10 = add i32 %9, %5
ret i32 %10
}
void tdd_ifelsefixer(void) {
  int a0;
  int b0;
  if (0 == a0) {
  } else
    a0++;
  if (0 == a0) {
  } else
    a0++;
  if (0 == a0) {
  } else {
    a0++;
  }
  if (0 == a0) {
    if (0 == b0) {
    } else
      b0++;
  } else
    a0++;
}


x86 assembly (clang, -O0):
<tdd_ifelsefixer>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1114 <tdd_ifelsefixer+0x14>
jmp    111d <tdd_ifelsefixer+0x1d>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    112d <tdd_ifelsefixer+0x2d>
jmp    1136 <tdd_ifelsefixer+0x36>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1146 <tdd_ifelsefixer+0x46>
jmp    114f <tdd_ifelsefixer+0x4f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1178 <tdd_ifelsefixer+0x78>
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
jne    116a <tdd_ifelsefixer+0x6a>
jmp    1173 <tdd_ifelsefixer+0x73>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1181 <tdd_ifelsefixer+0x81>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdd_ifelsefixer>:
ret

LLVM IR (-O0):
define void @tdd_ifelsefixer() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %1
%4 = icmp eq i32 0, %3
br i1 %4, label %5, label %6
5: ; preds = %0
br label %9
6: ; preds = %0
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %9
9: ; preds = %6, %5
%10 = load i32, i32* %1
%11 = icmp eq i32 0, %10
br i1 %11, label %12, label %13
12: ; preds = %9
br label %16
13: ; preds = %9
%14 = load i32, i32* %1
%15 = add nsw i32 %14, 1
store i32 %15, i32* %1
br label %16
16: ; preds = %13, %12
%17 = load i32, i32* %1
%18 = icmp eq i32 0, %17
br i1 %18, label %19, label %20
19: ; preds = %16
br label %23
20: ; preds = %16
%21 = load i32, i32* %1
%22 = add nsw i32 %21, 1
store i32 %22, i32* %1
br label %23
23: ; preds = %20, %19
%24 = load i32, i32* %1
%25 = icmp eq i32 0, %24
br i1 %25, label %26, label %34
26: ; preds = %23
%27 = load i32, i32* %2
%28 = icmp eq i32 0, %27
br i1 %28, label %29, label %30
29: ; preds = %26
br label %33
30: ; preds = %26
%31 = load i32, i32* %2
%32 = add nsw i32 %31, 1
store i32 %32, i32* %2
br label %33
33: ; preds = %30, %29
br label %37
34: ; preds = %23
%35 = load i32, i32* %1
%36 = add nsw i32 %35, 1
store i32 %36, i32* %1
br label %37
37: ; preds = %34, %33
ret void
}

LLVM IR (-O2):
define void @tdd_ifelsefixer() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(char *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ fwrite(char *, int, int, int /*<<< orphan*/ *);
void copy_file(FILE *in, FILE *out) {
  char buf[4096];
  int r;
  while ((r = fread(buf, 1, sizeof(buf), in)) > 0)
    fwrite(buf, 1, r, out);
}


x86 assembly (clang, -O0):
<copy_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1020,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x1010(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
mov    $0x1000,%edx
call   1030 <fread@plt>
mov    %eax,-0x1014(%rbp)
cmp    $0x0,%eax
jle    117c <copy_file+0x5c>
lea    -0x1010(%rbp),%rdi
mov    -0x1014(%rbp),%edx
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
call   1040 <fwrite@plt>
jmp    1133 <copy_file+0x13>
add    $0x1020,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_file>:
push   %r15
push   %r14
push   %rbx
sub    $0x1000,%rsp
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rsp,%rdi
mov    $0x1,%esi
mov    $0x1000,%edx
mov    %r15,%rcx
call   1030 <fread@plt>
test   %eax,%eax
jle    117b <copy_file+0x5b>
mov    %rsp,%rbx
xchg   %ax,%ax
mov    %rbx,%rdi
mov    $0x1,%esi
mov    %eax,%edx
mov    %r14,%rcx
call   1040 <fwrite@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x1000,%edx
mov    %r15,%rcx
call   1030 <fread@plt>
test   %eax,%eax
jg     1150 <copy_file+0x30>
add    $0x1000,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @copy_file(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [4096 x i8]
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
br label %7
7: ; preds = %12, %2
%8 = getelementptr inbounds [4096 x i8], [4096 x i8]* %5, i64 0, i64 0
%9 = load i32*, i32** %3
%10 = call i32 @fread(i8* %8, i32 1, i32 4096, i32* %9)
store i32 %10, i32* %6
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %7
%13 = getelementptr inbounds [4096 x i8], [4096 x i8]* %5, i64 0, i64 0
%14 = load i32, i32* %6
%15 = load i32*, i32** %4
%16 = call i32 @fwrite(i8* %13, i32 1, i32 %14, i32* %15)
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @copy_file(i32* nocapture %0, i32* nocapture %1) {
%3 = alloca [4096 x i8]
%4 = getelementptr inbounds [4096 x i8], [4096 x i8]* %3, i64 0, i64 0
%5 = call i32 @fread(i8* %4, i32 1, i32 4096, i32* %0)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %5, %2 ]
%9 = call i32 @fwrite(i8* %4, i32 1, i32 %8, i32* %1)
%10 = call i32 @fread(i8* %4, i32 1, i32 4096, i32* %0)
%11 = icmp sgt i32 %10, 0
br i1 %11, label %7, label %12
12: ; preds = %7, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ concat(int, char *, char *, char *);
scalar_t__ system(int /*<<< orphan*/);
bool validateCommand(char *command) {
  return system(concat(3, "type ", command, " 1>/dev/null 2>&1")) == 0;
}


x86 assembly (clang, -O0):
<validateCommand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x3,%edi
lea    0xec4(%rip),%rsi
lea    0xec3(%rip),%rcx
call   1040 <concat@plt>
mov    %eax,%edi
call   1030 <system@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validateCommand>:
push   %rax
mov    %rdi,%rdx
lea    0xed5(%rip),%rsi
lea    0xed4(%rip),%rcx
mov    $0x3,%edi
call   1040 <concat@plt>
mov    %eax,%edi
call   1030 <system@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"type \00"
@.str.1 = [18 x i8] c" 1>/dev/null 2>&1\00"
define i32 @validateCommand(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @concat(i32 3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%5 = call i64 @system(i32 %4)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@.str = [6 x i8] c"type \00"
@.str.1 = [18 x i8] c" 1>/dev/null 2>&1\00"
define i32 @validateCommand(i8* %0) {
%2 = tail call i32 @concat(i32 3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i64 @system(i32 %2)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}