xunge/DecIR huggingface dataset:
/* Type definitions */
struct hostent {
  int dummy;
};
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int _nss_tld_mapper_gethostbyname2_r(char const *, int /*<<< orphan*/,
                                     struct hostent *, char *, size_t, int *,
                                     int *);
enum nss_status _nss_tld_mapper_gethostbyname_r(const char *name,
                                                struct hostent *result,
                                                char *buffer, size_t buflen,
                                                int *errnop, int *h_errnop) {
  return _nss_tld_mapper_gethostbyname2_r(name, AF_INET, result, buffer, buflen,
                                          errnop, h_errnop);
}


x86 assembly (clang, -O0):
<_nss_tld_mapper_gethostbyname_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    -0x30(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <_nss_tld_mapper_gethostbyname2_r@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_tld_mapper_gethostbyname_r>:
push   %rax
mov    %r8,%rax
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    0x2ec4(%rip),%rsi
mov    (%rsi),%esi
mov    %r9,(%rsp)
mov    %rax,%r9
call   1030 <_nss_tld_mapper_gethostbyname2_r@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.hostent = type { i32 }
@AF_INET = global i32 0
define i32 @_nss_tld_mapper_gethostbyname_r(i8* %0, %struct.hostent* %1, i8* %2, i64 %3, i32* %4, i32* %5) {
%7 = alloca i8*
%8 = alloca %struct.hostent*
%9 = alloca i8*
%10 = alloca i64
%11 = alloca i32*
%12 = alloca i32*
store i8* %0, i8** %7
store %struct.hostent* %1, %struct.hostent** %8
store i8* %2, i8** %9
store i64 %3, i64* %10
store i32* %4, i32** %11
store i32* %5, i32** %12
%13 = load i8*, i8** %7
%14 = load i32, i32* @AF_INET
%15 = load %struct.hostent*, %struct.hostent** %8
%16 = load i8*, i8** %9
%17 = load i64, i64* %10
%18 = load i32*, i32** %11
%19 = load i32*, i32** %12
%20 = call i32 @_nss_tld_mapper_gethostbyname2_r(i8* %13, i32 %14, %struct.hostent* %15, i8* %16, i64 %17, i32* %18, i32* %19)
ret i32 %20
}

LLVM IR (-O2):
%struct.hostent = type { i32 }
@AF_INET = global i32 0
define i32 @_nss_tld_mapper_gethostbyname_r(i8* %0, %struct.hostent* %1, i8* %2, i64 %3, i32* %4, i32* %5) {
%7 = load i32, i32* @AF_INET
%8 = tail call i32 @_nss_tld_mapper_gethostbyname2_r(i8* %0, i32 %7, %struct.hostent* %1, i8* %2, i64 %3, i32* %4, i32* %5)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Clear();
void TCP_Uninit() {
  Clear();
  ;
}


x86 assembly (clang, -O0):
<TCP_Uninit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TCP_Uninit>:
xor    %eax,%eax
jmp    1030 <Clear@plt>

LLVM IR (-O0):
define void @TCP_Uninit() {
%1 = call i32 (...) @Clear()
ret void
}

LLVM IR (-O2):
define void @TCP_Uninit() {
%1 = tail call i32 (...) @Clear()
ret void
}
int test_imm_81int16_reg(short val) {
  return ((val) & (0x81 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_81int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x81,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_81int16_reg>:
test   $0x81,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_81int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 129
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_81int16_reg(i16 signext %0) {
%2 = and i16 %0, 129
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ft_putendl(char *);
void interrupt_process(int s) {
  (void)s;
  ft_putendl("");
}


x86 assembly (clang, -O0):
<interrupt_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <ft_putendl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_process>:
lea    0xee9(%rip),%rdi
jmp    1030 <ft_putendl@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @interrupt_process(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ft_putendl(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @interrupt_process(i32 %0) {
%2 = tail call i32 @ft_putendl(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;
struct scsi_cmd {
  int dummy;
};

/* Variables and functions */
uint8_t spc_release(struct scsi_cmd *cmd) {
  ;
  return 0x00;
}


x86 assembly (clang, -O0):
<spc_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spc_release>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.scsi_cmd = type { i32 }
define i32 @spc_release(%struct.scsi_cmd* %0) {
%2 = alloca %struct.scsi_cmd*
store %struct.scsi_cmd* %0, %struct.scsi_cmd** %2
ret i32 0
}

LLVM IR (-O2):
%struct.scsi_cmd = type { i32 }
define i32 @spc_release(%struct.scsi_cmd* nocapture readnone %0) {
ret i32 0
}
int usb_port_suspend(struct usb_device *udev) { return 0; }


x86 assembly (clang, -O0):
<usb_port_suspend>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_port_suspend>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.usb_device = type opaque
define i32 @usb_port_suspend(%struct.usb_device* %0) {
%2 = alloca %struct.usb_device*
store %struct.usb_device* %0, %struct.usb_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.usb_device = type opaque
define i32 @usb_port_suspend(%struct.usb_device* nocapture readnone %0) {
ret i32 0
}
void outb(unsigned short _port, unsigned char _data) {
  __asm__ __volatile__("out %%al, %%dx" : : "d"(_port), "a"(_data));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x3(%rbp),%al
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i16, i16* %3
%6 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "out %al, %dx", "{dx},{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i8 %1)
ret void
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int sd_bus_open_user(void **ret) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_open_user>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_open_user>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_open_user(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_open_user(i8** nocapture readnone %0) {
%2 = load i32, i32* @EINVAL
%3 = sub nsw i32 0, %2
ret i32 %3
}
int toaster_run(int (*test)(void)) { return test(); }


x86 assembly (clang, -O0):
<toaster_run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toaster_run>:
jmp    *%rdi

LLVM IR (-O0):
define i32 @toaster_run(i32 ()* %0) {
%2 = alloca i32 ()*
store i32 ()* %0, i32 ()** %2
%3 = load i32 ()*, i32 ()** %2
%4 = call i32 %3()
ret i32 %4
}

LLVM IR (-O2):
define i32 @toaster_run(i32 ()* nocapture %0) {
%2 = tail call i32 %0()
ret i32 %2
}
/* Variables and functions */
unsigned char USBNRead(int);
void _USBNNackEvent(void) {
  unsigned char event;
  event = USBNRead(0x0E);
  if (event & 0x01) {
  }
  if (event & 0x02) {
  }
}


x86 assembly (clang, -O0):
<_USBNNackEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xe,%edi
call   1030 <USBNRead@plt>
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113a <_USBNNackEvent+0x2a>
jmp    113a <_USBNNackEvent+0x2a>
movzbl -0x1(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     114f <_USBNNackEvent+0x3f>
jmp    114f <_USBNNackEvent+0x3f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_USBNNackEvent>:
mov    $0xe,%edi
jmp    1030 <USBNRead@plt>

LLVM IR (-O0):
define void @_USBNNackEvent() {
%1 = alloca i8
%2 = call zeroext i8 @USBNRead(i32 14)
store i8 %2, i8* %1
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
br label %8
8: ; preds = %7, %0
%9 = load i8, i8* %1
%10 = zext i8 %9 to i32
%11 = and i32 %10, 2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
br label %14
14: ; preds = %13, %8
ret void
}

LLVM IR (-O2):
define void @_USBNNackEvent() {
%1 = tail call zeroext i8 @USBNRead(i32 14)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int libstreamripper_func(void) {
  printf("Hello world\n");
  return (0);
}


x86 assembly (clang, -O0):
<libstreamripper_func>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libstreamripper_func>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
define i32 @libstreamripper_func() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello world\00"
define i32 @libstreamripper_func() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double isnan(double);
double function_isnan(double x) { return isnan(x); }


x86 assembly (clang, -O0):
<function_isnan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <isnan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_isnan>:
jmp    1030 <isnan@plt>

LLVM IR (-O0):
define double @function_isnan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @isnan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @function_isnan(double %0) {
%2 = tail call double @isnan(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void errexit(const char *s) {
  fprintf(stderr, "%s\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<errexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<errexit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @errexit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @errexit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
signed short GetHpGainReg(signed short swVol) {
  signed short swDB = swVol / (256 / 4);
  signed short swRet;
  if (swDB < 3) {
    swRet = 0;
  } else if (swDB < 9) {
    swRet = 1;
  } else if (swDB < 18) {
    swRet = 2;
  } else {
    swRet = 3;
  }
  return swRet;
}


x86 assembly (clang, -O0):
<GetHpGainReg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%eax
cmp    $0x3,%eax
jge    1133 <GetHpGainReg+0x33>
movw   $0x0,-0x6(%rbp)
jmp    1173 <GetHpGainReg+0x73>
movswl -0x4(%rbp),%eax
cmp    $0x9,%eax
jge    114b <GetHpGainReg+0x4b>
movw   $0x1,-0x6(%rbp)
jmp    116e <GetHpGainReg+0x6e>
movswl -0x4(%rbp),%eax
cmp    $0x12,%eax
jge    1163 <GetHpGainReg+0x63>
movw   $0x2,-0x6(%rbp)
jmp    1169 <GetHpGainReg+0x69>
movw   $0x3,-0x6(%rbp)
jmp    116e <GetHpGainReg+0x6e>
jmp    1173 <GetHpGainReg+0x73>
movswl -0x6(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetHpGainReg>:
cmp    $0xc0,%edi
jge    110b <GetHpGainReg+0xb>
xor    %eax,%eax
ret
movzwl %di,%ecx
mov    $0x1,%ax
cmp    $0x240,%ecx
jb     1128 <GetHpGainReg+0x28>
cmp    $0x480,%ecx
mov    $0x3,%ax
sbb    $0x0,%ax
ret

LLVM IR (-O0):
define signext i16 @GetHpGainReg(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = sext i16 %5 to i32
%7 = sdiv i32 %6, 64
%8 = trunc i32 %7 to i16
store i16 %8, i16* %3
%9 = load i16, i16* %3
%10 = sext i16 %9 to i32
%11 = icmp slt i32 %10, 3
br i1 %11, label %12, label %13
12: ; preds = %1
store i16 0, i16* %4
br label %26
13: ; preds = %1
%14 = load i16, i16* %3
%15 = sext i16 %14 to i32
%16 = icmp slt i32 %15, 9
br i1 %16, label %17, label %18
17: ; preds = %13
store i16 1, i16* %4
br label %25
18: ; preds = %13
%19 = load i16, i16* %3
%20 = sext i16 %19 to i32
%21 = icmp slt i32 %20, 18
br i1 %21, label %22, label %23
22: ; preds = %18
store i16 2, i16* %4
br label %24
23: ; preds = %18
store i16 3, i16* %4
br label %24
24: ; preds = %23, %22
br label %25
25: ; preds = %24, %17
br label %26
26: ; preds = %25, %12
%27 = load i16, i16* %4
ret i16 %27
}

LLVM IR (-O2):
define signext i16 @GetHpGainReg(i16 signext %0) {
%2 = icmp slt i16 %0, 192
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i16 %0, 576
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i16 %0, 1152
%7 = select i1 %6, i16 2, i16 3
br label %8
8: ; preds = %5, %3, %1
%9 = phi i16 [ 0, %1 ], [ 1, %3 ], [ %7, %5 ]
ret i16 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void MPUDisable(void) { (*((volatile uint32_t *)(0xE000ED94))) &= ~0x00000001; }


x86 assembly (clang, -O0):
<MPUDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe000ed94,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    $0xe000ed94,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPUDisable>:
mov    $0xe000ed94,%eax
andl   $0xfffffffe,(%rax)
ret

LLVM IR (-O0):
define void @MPUDisable() {
%1 = load volatile i32, i32* inttoptr (i64 3758157204 to i32*)
%2 = and i32 %1, -2
store volatile i32 %2, i32* inttoptr (i64 3758157204 to i32*)
ret void
}

LLVM IR (-O2):
define void @MPUDisable() {
%1 = load volatile i32, i32* inttoptr (i64 3758157204 to i32*)
%2 = and i32 %1, -2
store volatile i32 %2, i32* inttoptr (i64 3758157204 to i32*)
ret void
}
void iface_panel_init(void) {}


x86 assembly (clang, -O0):
<iface_panel_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iface_panel_init>:
ret

LLVM IR (-O0):
define void @iface_panel_init() {
ret void
}

LLVM IR (-O2):
define void @iface_panel_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lookNarray(char *, unsigned int);
void lookbooleanarray(char *x, int n) {
  lookNarray((char *)x, (unsigned int)(n * 4));
}


x86 assembly (clang, -O0):
<lookbooleanarray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
shl    $0x2,%esi
call   1030 <lookNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookbooleanarray>:
shl    $0x2,%esi
jmp    1030 <lookNarray@plt>

LLVM IR (-O0):
define void @lookbooleanarray(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %6, 4
%8 = call i32 @lookNarray(i8* %5, i32 %7)
ret void
}

LLVM IR (-O2):
define void @lookbooleanarray(i8* %0, i32 %1) {
%3 = shl nsw i32 %1, 2
%4 = tail call i32 @lookNarray(i8* %0, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __console_tx_string(int, char const *);
void print_warning(const char *str) { __console_tx_string(4, str); }


x86 assembly (clang, -O0):
<print_warning>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x4,%edi
call   1030 <__console_tx_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_warning>:
mov    %rdi,%rsi
mov    $0x4,%edi
jmp    1030 <__console_tx_string@plt>

LLVM IR (-O0):
define void @print_warning(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__console_tx_string(i32 4, i8* %3)
ret void
}

LLVM IR (-O2):
define void @print_warning(i8* %0) {
%2 = tail call i32 @__console_tx_string(i32 4, i8* %0)
ret void
}
/* Variables and functions */
int foo();
int baz(void) { return foo(); }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
xor    %eax,%eax
jmp    1030 <foo@plt>

LLVM IR (-O0):
define i32 @baz() {
%1 = call i32 (...) @foo()
ret i32 %1
}

LLVM IR (-O2):
define i32 @baz() {
%1 = tail call i32 (...) @foo()
ret i32 %1
}
int c_islower(int c) {
  switch (c) {
  case 'a' + (0):
  case 'b' + (0):
  case 'c' + (0):
  case 'd' + (0):
  case 'e' + (0):
  case 'f' + (0):
  case 'g' + (0):
  case 'h' + (0):
  case 'i' + (0):
  case 'j' + (0):
  case 'k' + (0):
  case 'l' + (0):
  case 'm' + (0):
  case 'n' + (0):
  case 'o' + (0):
  case 'p' + (0):
  case 'q' + (0):
  case 'r' + (0):
  case 's' + (0):
  case 't' + (0):
  case 'u' + (0):
  case 'v' + (0):
  case 'w' + (0):
  case 'x' + (0):
  case 'y' + (0):
  case 'z' + (0):
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<c_islower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff9f,%eax
sub    $0x19,%eax
ja     1127 <c_islower+0x27>
jmp    111b <c_islower+0x1b>
movl   $0x1,-0x4(%rbp)
jmp    112e <c_islower+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_islower>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @c_islower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 97, label %5
i32 98, label %5
i32 99, label %5
i32 100, label %5
i32 101, label %5
i32 102, label %5
i32 103, label %5
i32 104, label %5
i32 105, label %5
i32 106, label %5
i32 107, label %5
i32 108, label %5
i32 109, label %5
i32 110, label %5
i32 111, label %5
i32 112, label %5
i32 113, label %5
i32 114, label %5
i32 115, label %5
i32 116, label %5
i32 117, label %5
i32 118, label %5
i32 119, label %5
i32 120, label %5
i32 121, label %5
i32 122, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @c_islower(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void to_sign_long_store_4(__float128 a, long *p) { p[4] = (long)a; }


x86 assembly (clang, -O0):
<to_sign_long_store_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movaps %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movaps -0x10(%rbp),%xmm0
call   1130 <__fixtfdi>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x20(%rax)
add    $0x20,%rsp
pop    %rbp
ret
nopw   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<to_sign_long_store_4>:
push   %rbx
mov    %rdi,%rbx
call   1110 <__fixtfdi>
mov    %rax,0x20(%rbx)
pop    %rbx
ret
nop

LLVM IR (-O0):
define void @to_sign_long_store_4(fp128 %0, i64* %1) {
%3 = alloca fp128
%4 = alloca i64*
store fp128 %0, fp128* %3
store i64* %1, i64** %4
%5 = load fp128, fp128* %3
%6 = fptosi fp128 %5 to i64
%7 = load i64*, i64** %4
%8 = getelementptr inbounds i64, i64* %7, i64 4
store i64 %6, i64* %8
ret void
}

LLVM IR (-O2):
define void @to_sign_long_store_4(fp128 %0, i64* nocapture writeonly %1) {
%3 = fptosi fp128 %0 to i64
%4 = getelementptr inbounds i64, i64* %1, i64 4
store i64 %3, i64* %4
ret void
}
int tcapInit(int f) { return -1; }


x86 assembly (clang, -O0):
<tcapInit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcapInit>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @tcapInit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @tcapInit(i32 %0) {
ret i32 -1
}
void mt_reg_sync_writew(v, a) {
  *(volatile unsigned short *)(a) = (v);
  dsb();
  reg_dummy_read();
}


x86 assembly (clang, -O0):
<mt_reg_sync_writew>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %ax,%cx
movslq -0x8(%rbp),%rax
mov    %cx,(%rax)
mov    $0x0,%al
call   1040 <dsb@plt>
mov    $0x0,%al
call   1030 <reg_dummy_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_reg_sync_writew>:
push   %rax
movslq %esi,%rax
mov    %di,(%rax)
xor    %eax,%eax
call   1040 <dsb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <reg_dummy_read@plt>

LLVM IR (-O0):
define void @mt_reg_sync_writew(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = trunc i32 %5 to i16
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i16*
store volatile i16 %6, i16* %9
%10 = call i32 (...) @dsb()
%11 = call i32 (...) @reg_dummy_read()
ret void
}

LLVM IR (-O2):
define void @mt_reg_sync_writew(i32 %0, i32 %1) {
%3 = trunc i32 %0 to i16
%4 = sext i32 %1 to i64
%5 = inttoptr i64 %4 to i16*
store volatile i16 %3, i16* %5
%6 = tail call i32 (...) @dsb()
%7 = tail call i32 (...) @reg_dummy_read()
ret void
}
char dj_set_stereo(char flag) { return 0; }


x86 assembly (clang, -O0):
<dj_set_stereo>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %eax,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dj_set_stereo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @dj_set_stereo(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret i8 0
}

LLVM IR (-O2):
define signext i8 @dj_set_stereo(i8 signext %0) {
ret i8 0
}
/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int /*<<< orphan*/ semctl(int, int, int /*<<< orphan*/);
int semget(int, int, int);
void semClear(int key) {
  int semId = semget(key, 1, 0666);
  int semnum = 0;
  semctl(semId, semnum, IPC_RMID);
}


x86 assembly (clang, -O0):
<semClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
mov    $0x1b6,%edx
call   1030 <semget@plt>
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    0x2e8c(%rip),%rax
mov    (%rax),%edx
call   1040 <semctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semClear>:
push   %rax
mov    $0x1,%esi
mov    $0x1b6,%edx
call   1030 <semget@plt>
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%edx
mov    %eax,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <semctl@plt>

LLVM IR (-O0):
@IPC_RMID = global i32 0
define void @semClear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @semget(i32 %5, i32 1, i32 438)
store i32 %6, i32* %3
store i32 0, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = load i32, i32* @IPC_RMID
%10 = call i32 @semctl(i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define void @semClear(i32 %0) {
%2 = tail call i32 @semget(i32 %0, i32 1, i32 438)
%3 = load i32, i32* @IPC_RMID
%4 = tail call i32 @semctl(i32 %2, i32 0, i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ labs(long);
int /*<<< orphan*/ link_failure_labs();
void test_labs(long x) {
  if (labs(x) != labs(x))
    link_failure_labs();
}


x86 assembly (clang, -O0):
<test_labs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <labs@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <labs@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     1159 <test_labs+0x39>
mov    $0x0,%al
call   1030 <link_failure_labs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_labs>:
ret

LLVM IR (-O0):
define void @test_labs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @labs(i64 %3)
%5 = load i64, i64* %2
%6 = call i64 @labs(i64 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_labs()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_labs(i64 %0) {
ret void
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ leftChild(struct node *);
int /*<<< orphan*/ rightChild(struct node *);
int isExternal(struct node *node) {
  if (!(leftChild(node)) && !(rightChild(node)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isExternal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <leftChild@plt>
cmp    $0x0,%eax
jne    115c <isExternal+0x3c>
mov    -0x10(%rbp),%rdi
call   1030 <rightChild@plt>
cmp    $0x0,%eax
jne    115c <isExternal+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <isExternal+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isExternal>:
push   %rbx
mov    %rdi,%rbx
call   1040 <leftChild@plt>
test   %eax,%eax
jne    1139 <isExternal+0x19>
mov    %rbx,%rdi
call   1030 <rightChild@plt>
test   %eax,%eax
je     113d <isExternal+0x1d>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define i32 @isExternal(%struct.node* %0) {
%2 = alloca i32
%3 = alloca %struct.node*
store %struct.node* %0, %struct.node** %3
%4 = load %struct.node*, %struct.node** %3
%5 = call i32 @leftChild(%struct.node* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = load %struct.node*, %struct.node** %3
%9 = call i32 @rightChild(%struct.node* %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.node = type { i32 }
define i32 @isExternal(%struct.node* %0) {
%2 = tail call i32 @leftChild(%struct.node* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @rightChild(%struct.node* %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %4, %1
br label %8
8: ; preds = %4, %7
%9 = phi i32 [ 0, %7 ], [ 1, %4 ]
ret i32 %9
}
int f(int x) { return (x >> 31) ? -1 : 1; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
sar    $0x1f,%edx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
sar    $0x1f,%eax
or     $0x1,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 31
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -1, i32 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i32 1, i32 -1
ret i32 %3
}
int foo() {
  short k = (0xDFB2L);
  long i = (((0x5405EA32 / (k))));
  return i;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movw   $0xdfb2,-0x2(%rbp)
movswl -0x2(%rbp),%ecx
mov    $0x5405ea32,%eax
cltd
idiv   %ecx
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0xfffd6628,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i16
%2 = alloca i64
store i16 -8270, i16* %1
%3 = load i16, i16* %1
%4 = sext i16 %3 to i32
%5 = sdiv i32 1409673778, %4
%6 = sext i32 %5 to i64
store i64 %6, i64* %2
%7 = load i64, i64* %2
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 -170456
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, long);
void read_block(void *file, long offset, void *dest, long length) {
  memcpy(dest, (void *)((unsigned long)file + offset), length);
}


x86 assembly (clang, -O0):
<read_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
add    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_block>:
add    %rdi,%rsi
mov    %rdx,%rdi
mov    %rcx,%rdx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @read_block(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %5
%11 = ptrtoint i8* %10 to i64
%12 = load i64, i64* %6
%13 = add i64 %11, %12
%14 = inttoptr i64 %13 to i8*
%15 = load i64, i64* %8
%16 = call i32 @memcpy(i8* %9, i8* %14, i64 %15)
ret void
}

LLVM IR (-O2):
define void @read_block(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = ptrtoint i8* %0 to i64
%6 = add i64 %5, %1
%7 = inttoptr i64 %6 to i8*
%8 = tail call i32 @memcpy(i8* %2, i8* %7, i64 %3)
ret void
}
/* Variables and functions */
size_t strlen(char const *);
size_t list_meter_string(const void *el) {
  return strlen((const char *)el) + 1;
}


x86 assembly (clang, -O0):
<list_meter_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_meter_string>:
push   %rax
call   1030 <strlen@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @list_meter_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strlen(i8* %3)
%5 = add i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @list_meter_string(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ foo(int, int /*<<< orphan*/);
int main() {
  if (foo(1, 0) != 0)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <foo@plt>
cmp    $0x0,%rax
je     114c <main+0x2c>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <foo@plt>
test   %rax,%rax
jne    1136 <main+0x16>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @foo(i32 1, i32 0)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @foo(i32 1, i32 0)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ puts(char *);
void ajuda(char *prog) {
  puts("Tente usar: ");
  printf("\t%s <inicioIntervalo> <fimIntervalo> <erro> <codFunc>\n\n", prog);
  puts("Para descobrir os codigos de funcao execute:");
  printf("\t%s [-l]\n", prog);
}


x86 assembly (clang, -O0):
<ajuda>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <puts@plt>
mov    -0x8(%rbp),%rsi
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
lea    0xef6(%rip),%rdi
call   1030 <puts@plt>
mov    -0x8(%rbp),%rsi
lea    0xf13(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ajuda>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
lea    0xed6(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
lea    0xeff(%rip),%rdi
call   1030 <puts@plt>
lea    0xf20(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Tente usar: \00"
@.str.1 = [56 x i8] c"\09%s <inicioIntervalo> <fimIntervalo> <erro> <codFunc>\0A\0A\00"
@.str.2 = [45 x i8] c"Para descobrir os codigos de funcao execute:\00"
@.str.3 = [10 x i8] c"\09%s [-l]\0A\00"
define void @ajuda(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = call i32 @puts(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.2, i64 0, i64 0))
%7 = load i8*, i8** %2
%8 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Tente usar: \00"
@.str.1 = [56 x i8] c"\09%s <inicioIntervalo> <fimIntervalo> <erro> <codFunc>\0A\0A\00"
@.str.2 = [45 x i8] c"Para descobrir os codigos de funcao execute:\00"
@.str.3 = [10 x i8] c"\09%s [-l]\0A\00"
define void @ajuda(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @.str.2, i64 0, i64 0))
%5 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i8* %0)
ret void
}
int is_vm_hugetlb_page(struct vm_area_struct *vma) { return 0; }


x86 assembly (clang, -O0):
<is_vm_hugetlb_page>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_vm_hugetlb_page>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define i32 @is_vm_hugetlb_page(%struct.vm_area_struct* %0) {
%2 = alloca %struct.vm_area_struct*
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define i32 @is_vm_hugetlb_page(%struct.vm_area_struct* nocapture readnone %0) {
ret i32 0
}
void sem_trywait() {}


x86 assembly (clang, -O0):
<sem_trywait>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_trywait>:
ret

LLVM IR (-O0):
define void @sem_trywait() {
ret void
}

LLVM IR (-O2):
define void @sem_trywait() {
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *m2(size_t n) { return malloc(n); }


x86 assembly (clang, -O0):
<m2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @m2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @m2(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_store1_ps(float *, int /*<<< orphan*/);
void test_mm_store1_ps(float *x, __m128 y) { _mm_store1_ps(x, y); }


x86 assembly (clang, -O0):
<test_mm_store1_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_mm_store1_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_store1_ps>:
jmp    1030 <_mm_store1_ps@plt>

LLVM IR (-O0):
define void @test_mm_store1_ps(float* %0, i32 %1) {
%3 = alloca float*
%4 = alloca i32
store float* %0, float** %3
store i32 %1, i32* %4
%5 = load float*, float** %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_store1_ps(float* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @test_mm_store1_ps(float* %0, i32 %1) {
%3 = tail call i32 @_mm_store1_ps(float* %0, i32 %1)
ret void
}
/* Variables and functions */
char *safealloc(int);
int /*<<< orphan*/ strncpy(char *, char *, int);
char *allocString(char *bp, int length) {
  char *name = safealloc(length + 1);
  strncpy(name, bp, length);
  name[length] = (char)0;
  return name;
}


x86 assembly (clang, -O0):
<allocString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1040 <safealloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocString>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1040 <safealloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1030 <strncpy@plt>
movslq %r15d,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @allocString(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i8* @safealloc(i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i8*, i8** %3
%11 = load i32, i32* %4
%12 = call i32 @strncpy(i8* %9, i8* %10, i32 %11)
%13 = load i8*, i8** %5
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @allocString(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i8* @safealloc(i32 %3)
%5 = tail call i32 @strncpy(i8* %4, i8* %0, i32 %1)
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %4, i64 %6
store i8 0, i8* %7
ret i8* %4
}
void _timer_stop_ISR(int timer) {}


x86 assembly (clang, -O0):
<_timer_stop_ISR>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_timer_stop_ISR>:
ret

LLVM IR (-O0):
define void @_timer_stop_ISR(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @_timer_stop_ISR(i32 %0) {
ret void
}
/* Variables and functions */
int genrand64_int64();
double genrand64_real3(void) {
  return ((genrand64_int64() >> 12) + 0.5) * (1.0 / 4503599627370496.0);
}


x86 assembly (clang, -O0):
<genrand64_real3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <genrand64_int64@plt>
sar    $0xc,%eax
cvtsi2sd %eax,%xmm0
movsd  0xede(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xeca(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand64_real3>:
push   %rax
xor    %eax,%eax
call   1030 <genrand64_int64@plt>
sar    $0xc,%eax
cvtsi2sd %eax,%xmm0
addsd  0xed9(%rip),%xmm0
mulsd  0xed9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @genrand64_real3() {
%1 = call i32 (...) @genrand64_int64()
%2 = ashr i32 %1, 12
%3 = sitofp i32 %2 to double
%4 = fadd double %3, 5.000000e-01
%5 = fmul double %4, 0x3CB0000000000000
ret double %5
}

LLVM IR (-O2):
define double @genrand64_real3() {
%1 = tail call i32 (...) @genrand64_int64()
%2 = ashr i32 %1, 12
%3 = sitofp i32 %2 to double
%4 = fadd double %3, 5.000000e-01
%5 = fmul double %4, 0x3CB0000000000000
ret double %5
}
double wf3(double D_AB, double D_AC, double D_kB, double D_kC) {
  return (D_AC + D_kB - D_AB - D_kC);
}


x86 assembly (clang, -O0):
<wf3>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<wf3>:
addsd  %xmm2,%xmm1
subsd  %xmm0,%xmm1
subsd  %xmm3,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @wf3(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %6
%10 = load double, double* %7
%11 = fadd double %9, %10
%12 = load double, double* %5
%13 = fsub double %11, %12
%14 = load double, double* %8
%15 = fsub double %13, %14
ret double %15
}

LLVM IR (-O2):
define double @wf3(double %0, double %1, double %2, double %3) {
%5 = fadd double %1, %2
%6 = fsub double %5, %0
%7 = fsub double %6, %3
ret double %7
}
unsigned long getesp() { __asm__("mov %esp,%eax"); }


x86 assembly (clang, -O0):
<getesp>:
push   %rbp
mov    %rsp,%rbp
mov    %esp,%eax
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getesp>:
mov    %esp,%eax
ret

LLVM IR (-O0):
define i64 @getesp() {
%1 = alloca i64
%2 = load i64, i64* %1
ret i64 %2
}

LLVM IR (-O2):
define i64 @getesp() {
tail call void asm sideeffect "mov %esp,%eax", "~{dirflag},~{fpsr},~{flags}"()
ret i64 undef
}
int skip_first_line(char *str) {
  int i;
  i = 0;
  while (str[i] != '\n')
    i++;
  i += 1;
  return (i);
}


x86 assembly (clang, -O0):
<skip_first_line>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
je     1132 <skip_first_line+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <skip_first_line+0xf>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_first_line>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpb   $0xa,(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <skip_first_line+0x10>
ret

LLVM IR (-O0):
define i32 @skip_first_line(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 10
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @skip_first_line(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 10
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
%10 = add nuw nsw i32 %9, 1
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ controlNew();
int /*<<< orphan*/ oosmos_DelayMS(int);
int /*<<< orphan*/ oosmos_RunStateMachines();
extern int main(void) {
  controlNew();
  while (1) {
    oosmos_RunStateMachines();
    oosmos_DelayMS(50);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <controlNew@plt>
mov    $0x0,%al
call   1050 <oosmos_RunStateMachines@plt>
mov    $0x32,%edi
call   1040 <oosmos_DelayMS@plt>
jmp    1146 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <controlNew@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <oosmos_RunStateMachines@plt>
mov    $0x32,%edi
call   1040 <oosmos_DelayMS@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @controlNew()
br label %3
3: ; preds = %0, %3
%4 = call i32 (...) @oosmos_RunStateMachines()
%5 = call i32 @oosmos_DelayMS(i32 50)
br label %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @controlNew()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 (...) @oosmos_RunStateMachines()
%4 = tail call i32 @oosmos_DelayMS(i32 50)
br label %2
}
void foo685(int p) {}


x86 assembly (clang, -O0):
<foo685>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo685>:
ret

LLVM IR (-O0):
define void @foo685(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo685(i32 %0) {
ret void
}
/* Variables and functions */
int anetUnixGenericConnect(char *, char *, int);
int catAnetUnixNonBlockConnect(char *err, char *path) {
  return anetUnixGenericConnect(err, path, 1);
}


x86 assembly (clang, -O0):
<catAnetUnixNonBlockConnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <anetUnixGenericConnect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catAnetUnixNonBlockConnect>:
mov    $0x1,%edx
jmp    1030 <anetUnixGenericConnect@plt>

LLVM IR (-O0):
define i32 @catAnetUnixNonBlockConnect(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @anetUnixGenericConnect(i8* %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @catAnetUnixNonBlockConnect(i8* %0, i8* %1) {
%3 = tail call i32 @anetUnixGenericConnect(i8* %0, i8* %1, i32 1)
ret i32 %3
}