xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fork();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\nBefore fork.\n");
  fork();
  printf("\nAfter 1st fork.\n");
  fork();
  printf("\nAfter 2nd fork.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <fork@plt>
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <fork@plt>
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <fork@plt>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <fork@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"\0ABefore fork.\0A\00"
@.str.1 = [18 x i8] c"\0AAfter 1st fork.\0A\00"
@.str.2 = [18 x i8] c"\0AAfter 2nd fork.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @fork()
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 (...) @fork()
%6 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"\0ABefore fork.\00"
@str.3 = [17 x i8] c"\0AAfter 1st fork.\00"
@str.4 = [17 x i8] c"\0AAfter 2nd fork.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @fork()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str.3, i64 0, i64 0))
%4 = tail call i32 (...) @fork()
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str.4, i64 0, i64 0))
ret i32 0
}
int test_imm_83uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x83 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_83uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x83,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_83uint64_midword_mem>:
testb  $0x83,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_83uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 131
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_83uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 8585216
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_0Fint64_highword_reg(long long val) {
  return ((val >> 32) & (0x0F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Fint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Fint64_highword_reg>:
movabs $0xf00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Fint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 15
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Fint64_highword_reg(i64 %0) {
%2 = and i64 %0, 64424509440
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char *memccpy(dst, src, c, n)
register char *dst, *src;
register int n;
{
  while (n-- > 0) {
    if ((*dst++ = *src++) == c)
      return (char *)dst;
  }
  return 0;
}


x86 assembly (clang, -O0):
<memccpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x20(%rbp)
cmp    $0x0,%eax
jle    1166 <memccpy+0x66>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%al
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    -0x1c(%rbp),%eax
jne    1161 <memccpy+0x61>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116e <memccpy+0x6e>
jmp    1112 <memccpy+0x12>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memccpy>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
test   %ecx,%ecx
jle    112a <memccpy+0x2a>
add    $0xffffffff,%ecx
movsbl (%rsi),%edi
add    $0x1,%rsi
mov    %dil,(%rax)
add    $0x1,%rax
cmp    %edx,%edi
jne    1110 <memccpy+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @memccpy(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
br label %10
10: ; preds = %25, %4
%11 = load i32, i32* %9
%12 = add nsw i32 %11, -1
store i32 %12, i32* %9
%13 = icmp sgt i32 %11, 0
br i1 %13, label %14, label %26
14: ; preds = %10
%15 = load i8*, i8** %7
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %7
%17 = load i8, i8* %15
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %6
store i8 %17, i8* %18
%20 = sext i8 %17 to i32
%21 = load i32, i32* %8
%22 = icmp eq i32 %20, %21
br i1 %22, label %23, label %25
23: ; preds = %14
%24 = load i8*, i8** %6
store i8* %24, i8** %5
br label %27
25: ; preds = %14
br label %10
26: ; preds = %10
store i8* null, i8** %5
br label %27
27: ; preds = %26, %23
%28 = load i8*, i8** %5
ret i8* %28
}

LLVM IR (-O2):
define i8* @memccpy(i8* writeonly %0, i8* nocapture %1, i32 %2, i32 %3) {
br label %5
5: ; preds = %10, %4
%6 = phi i8* [ %0, %4 ], [ %14, %10 ]
%7 = phi i8* [ %1, %4 ], [ %12, %10 ]
%8 = phi i32 [ %3, %4 ], [ %11, %10 ]
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %5
%11 = add nsw i32 %8, -1
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %7
%14 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %13, i8* %6
%15 = sext i8 %13 to i32
%16 = icmp eq i32 %15, %2
br i1 %16, label %17, label %5
17: ; preds = %5, %10
%18 = phi i8* [ %14, %10 ], [ null, %5 ]
ret i8* %18
}
int tolower(int letter) {
  if (letter >= 97 && letter <= 122)
    return letter;
  else if (letter >= 65 && letter <= 90)
    return letter + 32;
  else
    return letter;
}


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1126 <tolower+0x26>
cmpl   $0x7a,-0x8(%rbp)
jg     1126 <tolower+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114e <tolower+0x4e>
cmpl   $0x41,-0x8(%rbp)
jl     1148 <tolower+0x48>
cmpl   $0x5a,-0x8(%rbp)
jg     1148 <tolower+0x48>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    114e <tolower+0x4e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %22
11: ; preds = %6, %1
%12 = load i32, i32* %3
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i32, i32* %3
%16 = icmp sle i32 %15, 90
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 32
store i32 %19, i32* %2
br label %22
20: ; preds = %14, %11
%21 = load i32, i32* %3
store i32 %21, i32* %2
br label %22
22: ; preds = %20, %17, %9
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
void compat_dummy(void) {}


x86 assembly (clang, -O0):
<compat_dummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compat_dummy>:
ret

LLVM IR (-O0):
define void @compat_dummy() {
ret void
}

LLVM IR (-O2):
define void @compat_dummy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void log_callback(const char *msg) { fprintf(stderr, "Log: %s\n", msg); }


x86 assembly (clang, -O0):
<log_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_callback>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [9 x i8] c"Log: %s\0A\00"
define void @log_callback(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [9 x i8] c"Log: %s\0A\00"
define void @log_callback(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void NOR_RX_DMA_COMPLETE_Interrupt(void) {}


x86 assembly (clang, -O0):
<NOR_RX_DMA_COMPLETE_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOR_RX_DMA_COMPLETE_Interrupt>:
ret

LLVM IR (-O0):
define void @NOR_RX_DMA_COMPLETE_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @NOR_RX_DMA_COMPLETE_Interrupt() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite_int64;
typedef int /*<<< orphan*/ sqlite3_file;

/* Variables and functions */
int SQLITE_OK;
int /*<<< orphan*/ printfHelper(char *);
int scmTruncate(sqlite3_file *pFile, sqlite_int64 size) {
  printfHelper("scmTruncate\n");
  return SQLITE_OK;
}


x86 assembly (clang, -O0):
<scmTruncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printfHelper@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scmTruncate>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printfHelper@plt>
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"scmTruncate\0A\00"
@SQLITE_OK = global i32 0
define i32 @scmTruncate(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = call i32 @printfHelper(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @SQLITE_OK
ret i32 %6
}

LLVM IR (-O2):
@.str = [13 x i8] c"scmTruncate\0A\00"
@SQLITE_OK = global i32 0
define i32 @scmTruncate(i32* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @printfHelper(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @SQLITE_OK
ret i32 %4
}
void test_work(void *priv) {
  int *myintval = priv;
  printer(__func__, *myintval);
}


x86 assembly (clang, -O0):
<test_work>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
mov    $0x0,%al
call   1030 <printer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_work>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printer@plt>

LLVM IR (-O0):
@__func__.test_work = [10 x i8] c"test_work\00"
define void @test_work(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @printer to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.test_work, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@__func__.test_work = [10 x i8] c"test_work\00"
define void @test_work(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @printer to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.test_work, i64 0, i64 0), i32 %3)
ret void
}
/* Variables and functions */
double erf(double);
double derf_(double *x) { return (erf(*x)); }


x86 assembly (clang, -O0):
<derf_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <erf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<derf_>:
movsd  (%rdi),%xmm0
jmp    1030 <erf@plt>

LLVM IR (-O0):
define double @derf_(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = call double @erf(double %4)
ret double %5
}

LLVM IR (-O2):
define double @derf_(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @erf(double %2)
ret double %3
}
int _get_increased_bit(unsigned char bit, const int offset) {
  bit = bit + 1;
  return (bit >> offset) & 1;
}


x86 assembly (clang, -O0):
<_get_increased_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x1,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_increased_bit>:
mov    %esi,%ecx
add    $0x1,%dil
movzbl %dil,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_get_increased_bit(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = add nsw i32 %6, 1
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = load i32, i32* %4
%12 = ashr i32 %10, %11
%13 = and i32 %12, 1
ret i32 %13
}

LLVM IR (-O2):
define i32 @_get_increased_bit(i8 zeroext %0, i32 %1) {
%3 = add i8 %0, 1
%4 = zext i8 %3 to i32
%5 = lshr i32 %4, %1
%6 = and i32 %5, 1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void Free(void *mem) { free(mem); }


x86 assembly (clang, -O0):
<Free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @Free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @Free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void Expunge(void) {}


x86 assembly (clang, -O0):
<Expunge>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Expunge>:
ret

LLVM IR (-O0):
define void @Expunge() {
ret void
}

LLVM IR (-O2):
define void @Expunge() {
ret void
}
int wakeup_source_pmic_add_irq(unsigned int irq) { return 0; }


x86 assembly (clang, -O0):
<wakeup_source_pmic_add_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wakeup_source_pmic_add_irq>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @wakeup_source_pmic_add_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @wakeup_source_pmic_add_irq(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
void cookiecpy(void *cookie_a, const void *cookie_b) {
  memcpy(cookie_a, cookie_b, 8);
}


x86 assembly (clang, -O0):
<cookiecpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cookiecpy>:
mov    $0x8,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cookiecpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 8)
ret void
}

LLVM IR (-O2):
define void @cookiecpy(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int, int);
int main(void) {
  int size_char = sizeof(char *);
  int size_int = sizeof(int *);
  int size_float = sizeof(float *);
  int size_double = sizeof(double *);
  int size_unsigned_int = sizeof(unsigned int);
  printf("char*: %d\nint *: %d\nfloat *: %d\ndouble *: %d\nunsigned int: %d\n",
         size_char, size_int, size_float, size_double, size_unsigned_int);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x8,-0x8(%rbp)
movl   $0x8,-0xc(%rbp)
movl   $0x8,-0x10(%rbp)
movl   $0x8,-0x14(%rbp)
movl   $0x4,-0x18(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x8,%esi
mov    $0x8,%edx
mov    $0x8,%ecx
mov    $0x8,%r8d
mov    $0x4,%r9d
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [63 x i8] c"char*: %d\0Aint *: %d\0Afloat *: %d\0Adouble *: %d\0Aunsigned int: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
store i32 8, i32* %2
store i32 8, i32* %3
store i32 8, i32* %4
store i32 8, i32* %5
store i32 4, i32* %6
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9, i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [63 x i8] c"char*: %d\0Aint *: %d\0Afloat *: %d\0Adouble *: %d\0Aunsigned int: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0), i32 8, i32 8, i32 8, i32 8, i32 4)
ret i32 0
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t AESIntStatusRaw(void) {
  return ((*((volatile unsigned long *)(0x40024000 + 0x00000790))));
}


x86 assembly (clang, -O0):
<AESIntStatusRaw>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40024790,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AESIntStatusRaw>:
mov    0x40024790,%rax
40
ret

LLVM IR (-O0):
define i64 @AESIntStatusRaw() {
%1 = load volatile i64, i64* inttoptr (i64 1073891216 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @AESIntStatusRaw() {
%1 = load volatile i64, i64* inttoptr (i64 1073891216 to i64*)
ret i64 %1
}
char *toascbuf(char *s) { return s; }


x86 assembly (clang, -O0):
<toascbuf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toascbuf>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @toascbuf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @toascbuf(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
void *calloc(int, int);
void *HeapAllocMem(int Size) { return calloc(Size, 1); }


x86 assembly (clang, -O0):
<HeapAllocMem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HeapAllocMem>:
mov    $0x1,%esi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @HeapAllocMem(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @calloc(i32 %3, i32 1)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @HeapAllocMem(i32 %0) {
%2 = tail call i8* @calloc(i32 %0, i32 1)
ret i8* %2
}
/* Type definitions */
struct mxt_platform_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_irq(unsigned int, void *);
void board_free_irq(const struct mxt_platform_data *pdata, unsigned int irq,
                    void *dev_id) {
  free_irq(irq, dev_id);
}


x86 assembly (clang, -O0):
<board_free_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
call   1030 <free_irq@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_free_irq>:
mov    %esi,%edi
mov    %rdx,%rsi
jmp    1030 <free_irq@plt>

LLVM IR (-O0):
%struct.mxt_platform_data = type { i32 }
define void @board_free_irq(%struct.mxt_platform_data* %0, i32 %1, i8* %2) {
%4 = alloca %struct.mxt_platform_data*
%5 = alloca i32
%6 = alloca i8*
store %struct.mxt_platform_data* %0, %struct.mxt_platform_data** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = load i8*, i8** %6
%9 = call i32 @free_irq(i32 %7, i8* %8)
ret void
}

LLVM IR (-O2):
%struct.mxt_platform_data = type { i32 }
define void @board_free_irq(%struct.mxt_platform_data* nocapture readnone %0, i32 %1, i8* %2) {
%4 = tail call i32 @free_irq(i32 %1, i8* %2)
ret void
}
void gtk_calendar_display_options_get_type() {}


x86 assembly (clang, -O0):
<gtk_calendar_display_options_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_calendar_display_options_get_type>:
ret

LLVM IR (-O0):
define void @gtk_calendar_display_options_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_calendar_display_options_get_type() {
ret void
}
int json_isspace(int ch) {
  return ch == ' ' || ch == '\t' || ch == '\r' || ch == '\n';
}


x86 assembly (clang, -O0):
<json_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <json_isspace+0x3e>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <json_isspace+0x3e>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <json_isspace+0x3e>
cmpl   $0xa,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_isspace>:
cmp    $0x20,%edi
ja     111d <json_isspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002200,%rdx
bt     %rcx,%rdx
jae    111d <json_isspace+0x1d>
ret
xor    %eax,%eax
cmp    $0xa,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @json_isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 13
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 10
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @json_isspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 10
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
unsigned int d1_memsize(void *ptr) {
  ((void)(ptr));
  return 1;
}


x86 assembly (clang, -O0):
<d1_memsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d1_memsize>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @d1_memsize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @d1_memsize(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_version(void) {
  printf("spi-hdlc "
         "0.05"
         "("
         "15:54:12"
         " "
         "Mar 17 2022"
         ")\n");
  printf("Copyright (c) 2016 The OpenThread Authors, All Rights Reserved\n");
}


x86 assembly (clang, -O0):
<print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xefe(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_version>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf00(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"spi-hdlc 0.05(15:54:12 Mar 17 2022)\0A\00"
@.str.1 = [64 x i8] c"Copyright (c) 2016 The OpenThread Authors, All Rights Reserved\0A\00"
define void @print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [36 x i8] c"spi-hdlc 0.05(15:54:12 Mar 17 2022)\00"
@str.2 = [63 x i8] c"Copyright (c) 2016 The OpenThread Authors, All Rights Reserved\00"
define void @print_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([63 x i8], [63 x i8]* @str.2, i64 0, i64 0))
ret void
}
void debug_proc(unsigned int msg, unsigned long u_param, long l_param) {}


x86 assembly (clang, -O0):
<debug_proc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_proc>:
ret

LLVM IR (-O0):
define void @debug_proc(i32 %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
define void @debug_proc(i32 %0, i64 %1, i64 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_SIZE16_swap(char *, int);
void U_WMRREALIZEPALETTE_swap(char *record, int torev) {
  U_WMRCORE_SIZE16_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMRREALIZEPALETTE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRCORE_SIZE16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRREALIZEPALETTE_swap>:
jmp    1030 <U_WMRCORE_SIZE16_swap@plt>

LLVM IR (-O0):
define void @U_WMRREALIZEPALETTE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_SIZE16_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRREALIZEPALETTE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_SIZE16_swap(i8* %0, i32 %1)
ret void
}
/* Type definitions */
struct memorycontainer {
  int dummy;
};

/* Variables and functions */
struct memorycontainer *createExpression(int, struct memorycontainer *,
                                         struct memorycontainer *);
struct memorycontainer *
createGtExpression(struct memorycontainer *expression1,
                   struct memorycontainer *expression2) {
  return createExpression(0x07, expression1, expression2);
}


x86 assembly (clang, -O0):
<createGtExpression>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x7,%edi
call   1030 <createExpression@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createGtExpression>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x7,%edi
jmp    1030 <createExpression@plt>

LLVM IR (-O0):
%struct.memorycontainer = type { i32 }
define %struct.memorycontainer* @createGtExpression(%struct.memorycontainer* %0, %struct.memorycontainer* %1) {
%3 = alloca %struct.memorycontainer*
%4 = alloca %struct.memorycontainer*
store %struct.memorycontainer* %0, %struct.memorycontainer** %3
store %struct.memorycontainer* %1, %struct.memorycontainer** %4
%5 = load %struct.memorycontainer*, %struct.memorycontainer** %3
%6 = load %struct.memorycontainer*, %struct.memorycontainer** %4
%7 = call %struct.memorycontainer* @createExpression(i32 7, %struct.memorycontainer* %5, %struct.memorycontainer* %6)
ret %struct.memorycontainer* %7
}

LLVM IR (-O2):
%struct.memorycontainer = type { i32 }
define %struct.memorycontainer* @createGtExpression(%struct.memorycontainer* %0, %struct.memorycontainer* %1) {
%3 = tail call %struct.memorycontainer* @createExpression(i32 7, %struct.memorycontainer* %0, %struct.memorycontainer* %1)
ret %struct.memorycontainer* %3
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char const *);
int strlen(char const *);
int endswith(const char *haystack, const char *needle) {
  int lh = strlen(haystack);
  int ln = strlen(needle);
  int offset = lh - ln;
  return (offset >= 0) && (strcmp(&haystack[offset], needle) == 0);
}


x86 assembly (clang, -O0):
<endswith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
sub    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x1c(%rbp)
mov    %al,-0x1d(%rbp)
jl     117e <endswith+0x5e>
mov    -0x8(%rbp),%rdi
movslq -0x1c(%rbp),%rax
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endswith>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %r14,%rdi
call   1030 <strlen@plt>
sub    %eax,%ebp
js     115a <endswith+0x3a>
mov    %ebp,%eax
add    %rax,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
jmp    115c <endswith+0x3c>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @endswith(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = call i32 @strlen(i8* %10)
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = sub nsw i32 %12, %13
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = icmp sge i32 %15, 0
br i1 %16, label %17, label %25
17: ; preds = %2
%18 = load i8*, i8** %3
%19 = load i32, i32* %7
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8*, i8** %4
%23 = call i64 @strcmp(i8* %21, i8* %22)
%24 = icmp eq i64 %23, 0
br label %25
25: ; preds = %17, %2
%26 = phi i1 [ false, %2 ], [ %24, %17 ]
%27 = zext i1 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @endswith(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = sub nsw i32 %3, %4
%6 = icmp sgt i32 %5, -1
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = zext i32 %5 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = tail call i64 @strcmp(i8* %9, i8* %1)
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %7, %2
%14 = phi i32 [ 0, %2 ], [ %12, %7 ]
ret i32 %14
}
/* Variables and functions */
int read_c0_ebase();
unsigned int nlm_thread_id(void) { return read_c0_ebase() & 0x3; }


x86 assembly (clang, -O0):
<nlm_thread_id>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <read_c0_ebase@plt>
and    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nlm_thread_id>:
push   %rax
xor    %eax,%eax
call   1030 <read_c0_ebase@plt>
and    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @nlm_thread_id() {
%1 = call i32 (...) @read_c0_ebase()
%2 = and i32 %1, 3
ret i32 %2
}

LLVM IR (-O2):
define i32 @nlm_thread_id() {
%1 = tail call i32 (...) @read_c0_ebase()
%2 = and i32 %1, 3
ret i32 %2
}
int qux() { return 42; }


x86 assembly (clang, -O0):
<qux>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qux>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @qux() {
ret i32 42
}

LLVM IR (-O2):
define i32 @qux() {
ret i32 42
}
/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ __x;

/* Variables and functions */
uint32_t bswap_32(uint32_t x) {
  uint32_t __x = (x);
  return ((uint32_t)((((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) |
                     (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) |
                     (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) |
                     (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24)));
}


x86 assembly (clang, -O0):
<bswap_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0xff000000,%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_32>:
mov    %edi,%eax
and    $0xffffff,%eax
bswap  %eax
sar    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @bswap_32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = shl i32 %6, 24
%8 = load i32, i32* %3
%9 = and i32 %8, 65280
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = load i32, i32* %3
%13 = and i32 %12, 16711680
%14 = ashr i32 %13, 8
%15 = or i32 %11, %14
%16 = load i32, i32* %3
%17 = and i32 %16, -16777216
%18 = ashr i32 %17, 24
%19 = or i32 %15, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @bswap_32(i32 %0) {
%2 = and i32 %0, 16777215
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
%4 = ashr i32 %0, 24
%5 = or i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void error_message(char *message) {
  fprintf(stderr, "ERROR: %s\n", message);
  exit(1);
}


x86 assembly (clang, -O0):
<error_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error_message>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"ERROR: %s\0A\00"
define void @error_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"ERROR: %s\0A\00"
define void @error_message(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;

/* Variables and functions */
int /*<<< orphan*/ GEN_EMAIL;
int do_x509_check(int /*<<< orphan*/ *, unsigned char *, size_t, unsigned int,
                  int /*<<< orphan*/);
int X509_check_email(X509 *x, const char *chk, size_t chklen,
                     unsigned int flags) {
  return do_x509_check(x, (unsigned char *)chk, chklen, flags, GEN_EMAIL);
}


x86 assembly (clang, -O0):
<X509_check_email>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    0x2ea3(%rip),%rax
mov    (%rax),%r8d
call   1030 <do_x509_check@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_check_email>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%r8d
jmp    1030 <do_x509_check@plt>

LLVM IR (-O0):
@GEN_EMAIL = global i32 0
define i32 @X509_check_email(i32* %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32* %0, i32** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = load i32, i32* @GEN_EMAIL
%14 = call i32 @do_x509_check(i32* %9, i8* %10, i64 %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
@GEN_EMAIL = global i32 0
define i32 @X509_check_email(i32* %0, i8* %1, i64 %2, i32 %3) {
%5 = load i32, i32* @GEN_EMAIL
%6 = tail call i32 @do_x509_check(i32* %0, i8* %1, i64 %2, i32 %3, i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
int main(int argc, char *argv[]) {
  while (argc--) {
    printf("argv[%d] = %s\n", argc, argv[argc]);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     115a <main+0x4a>
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <main+0x16>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
je     1146 <main+0x36>
mov    %edi,%ebp
movslq %edi,%rax
lea    (%rsi,%rax,8),%rbx
add    $0xfffffffffffffff8,%rbx
add    $0xffffffff,%ebp
lea    0xed1(%rip),%r14
nop
mov    (%rbx),%rdx
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    $0xfffffffffffffff8,%rbx
add    $0xffffffff,%ebp
jb     1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [15 x i8] c"argv[%d] = %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %4
%8 = add nsw i32 %7, -1
store i32 %8, i32* %4
%9 = icmp ne i32 %7, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32, i32* %4
%12 = load i8**, i8*** %5
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %16)
br label %6
18: ; preds = %6
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [15 x i8] c"argv[%d] = %s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = sext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = trunc i64 %8 to i32
%12 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %10)
%13 = icmp eq i32 %11, 0
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int genrand_int32();
double genrand_res53() {
  unsigned long a = genrand_int32() >> 5, b = genrand_int32() >> 6;
  return ((a * 67108864.0 + b) * (1.0 / 9007199254740992.0));
}


x86 assembly (clang, -O0):
<genrand_res53>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %eax,%eax
mov    %al,-0x11(%rbp)
call   1030 <genrand_int32@plt>
mov    %eax,%ecx
mov    -0x11(%rbp),%al
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    %rcx,-0x8(%rbp)
call   1030 <genrand_int32@plt>
sar    $0x6,%eax
cltq
mov    %rax,-0x10(%rbp)
movaps 0xeca(%rip),%xmm3
movq   -0x8(%rbp),%xmm0
punpckldq %xmm3,%xmm0
movapd 0xec9(%rip),%xmm2
subpd  %xmm2,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movq   -0x10(%rbp),%xmm1
punpckldq %xmm3,%xmm1
subpd  %xmm2,%xmm1
movaps %xmm1,%xmm2
unpckhpd %xmm1,%xmm1
addsd  %xmm2,%xmm1
movsd  0xe82(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe6a(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_res53>:
push   %rbx
xor    %eax,%eax
call   1030 <genrand_int32@plt>
sar    $0x5,%eax
movslq %eax,%rbx
xor    %eax,%eax
call   1030 <genrand_int32@plt>
sar    $0x6,%eax
cltq
movq   %rbx,%xmm1
movdqa 0xec9(%rip),%xmm2
punpckldq %xmm2,%xmm1
movapd 0xecd(%rip),%xmm3
subpd  %xmm3,%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
movq   %rax,%xmm1
punpckldq %xmm2,%xmm1
subpd  %xmm3,%xmm1
movapd %xmm1,%xmm2
unpckhpd %xmm1,%xmm2
mulsd  0xeb0(%rip),%xmm0
addsd  %xmm1,%xmm2
addsd  %xmm2,%xmm0
mulsd  0xea8(%rip),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @genrand_res53() {
%1 = alloca i64
%2 = alloca i64
%3 = call i32 (...) @genrand_int32()
%4 = ashr i32 %3, 5
%5 = sext i32 %4 to i64
store i64 %5, i64* %1
%6 = call i32 (...) @genrand_int32()
%7 = ashr i32 %6, 6
%8 = sext i32 %7 to i64
store i64 %8, i64* %2
%9 = load i64, i64* %1
%10 = uitofp i64 %9 to double
%11 = load i64, i64* %2
%12 = uitofp i64 %11 to double
%13 = call double @llvm.fmuladd.f64(double %10, double 0x4190000000000000, double %12)
%14 = fmul double %13, 0x3CA0000000000000
ret double %14
}

LLVM IR (-O2):
define double @genrand_res53() {
%1 = tail call i32 (...) @genrand_int32()
%2 = ashr i32 %1, 5
%3 = sext i32 %2 to i64
%4 = tail call i32 (...) @genrand_int32()
%5 = ashr i32 %4, 6
%6 = sext i32 %5 to i64
%7 = uitofp i64 %3 to double
%8 = uitofp i64 %6 to double
%9 = tail call double @llvm.fmuladd.f64(double %7, double 0x4190000000000000, double %8)
%10 = fmul double %9, 0x3CA0000000000000
ret double %10
}
void EC_GROUP_precompute_mult(void) {}


x86 assembly (clang, -O0):
<EC_GROUP_precompute_mult>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_GROUP_precompute_mult>:
ret

LLVM IR (-O0):
define void @EC_GROUP_precompute_mult() {
ret void
}

LLVM IR (-O2):
define void @EC_GROUP_precompute_mult() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void print_start() { fprintf(stderr, "----- p begin -----\n"); }


x86 assembly (clang, -O0):
<print_start>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_start>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"----- p begin -----\0A\00"
define void @print_start() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"----- p begin -----\0A\00"
define void @print_start() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}
int letsgo_get_x(int p) { return p >> 5; }


x86 assembly (clang, -O0):
<letsgo_get_x>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<letsgo_get_x>:
mov    %edi,%eax
sar    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @letsgo_get_x(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 5
ret i32 %4
}

LLVM IR (-O2):
define i32 @letsgo_get_x(i32 %0) {
%2 = ashr i32 %0, 5
ret i32 %2
}
/* Type definitions */
struct modemchannel {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pktinit(struct modemchannel *, char const **);
void pktinitmkiss(struct modemchannel *chan, const char *params[]) {
  pktinit(chan, params);
}


x86 assembly (clang, -O0):
<pktinitmkiss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <pktinit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pktinitmkiss>:
jmp    1030 <pktinit@plt>

LLVM IR (-O0):
%struct.modemchannel = type { i32 }
define void @pktinitmkiss(%struct.modemchannel* %0, i8** %1) {
%3 = alloca %struct.modemchannel*
%4 = alloca i8**
store %struct.modemchannel* %0, %struct.modemchannel** %3
store i8** %1, i8*** %4
%5 = load %struct.modemchannel*, %struct.modemchannel** %3
%6 = load i8**, i8*** %4
%7 = call i32 @pktinit(%struct.modemchannel* %5, i8** %6)
ret void
}

LLVM IR (-O2):
%struct.modemchannel = type { i32 }
define void @pktinitmkiss(%struct.modemchannel* %0, i8** %1) {
%3 = tail call i32 @pktinit(%struct.modemchannel* %0, i8** %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
char *gai_strerror(int);
int /*<<< orphan*/ stderr;
void show_network_error(const char *s, int r) {
  fprintf(stderr, "%s: %s\n", s, gai_strerror(r));
}


x86 assembly (clang, -O0):
<show_network_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <gai_strerror@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rdx
mov    %rax,%rcx
lea    0xea4(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_network_error>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%ebp
mov    %esi,%edi
call   1030 <gai_strerror@plt>
lea    0xec3(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @show_network_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @gai_strerror(i32 %7)
%9 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @show_network_error(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i8* @gai_strerror(i32 %1)
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
ret void
}
int fun570() { return 570; }


x86 assembly (clang, -O0):
<fun570>:
push   %rbp
mov    %rsp,%rbp
mov    $0x23a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun570>:
mov    $0x23a,%eax
ret

LLVM IR (-O0):
define i32 @fun570() {
ret i32 570
}

LLVM IR (-O2):
define i32 @fun570() {
ret i32 570
}