xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ my_malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *util_str_dup(const char *str) {
  char *new_str;
  new_str = ((char *)my_malloc(sizeof(char) * strlen(str) + 1));
  strcpy(new_str, str);
  return new_str;
}


x86 assembly (clang, -O0):
<util_str_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
cltq
shl    $0x0,%rax
add    $0x1,%rax
mov    %eax,%edi
call   1030 <my_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_str_dup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <strlen@plt>
lea    0x1(%rax),%edi
call   1030 <my_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @util_str_dup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sext i32 %5 to i64
%7 = mul i64 1, %6
%8 = add i64 %7, 1
%9 = trunc i64 %8 to i32
%10 = call i64 @my_malloc(i32 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @util_str_dup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add i32 %2, 1
%4 = tail call i64 @my_malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
ret i8* %5
}
void ff_hevc_put_hevc_qpel_hv16_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_hv16_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_hv16_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_hv16_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_hv16_10_sse4() {
ret void
}
double epsilon(double d) {
  double t = d / 36525;
  return ((23.4392911111111 - (t * (46.8150 + 0.00059 * t) / 3600)) *
          0.0174532925199433);
}


x86 assembly (clang, -O0):
<epsilon>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xf12(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
movsd  0xee7(%rip),%xmm2
mulsd  %xmm2,%xmm0
movsd  0xee3(%rip),%xmm2
addsd  %xmm2,%xmm0
mulsd  %xmm0,%xmm1
movsd  0xec3(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xeaf(%rip),%xmm0
subsd  %xmm1,%xmm0
movsd  0xe9b(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<epsilon>:
divsd  0xef8(%rip),%xmm0
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef4(%rip),%xmm1
mulsd  %xmm1,%xmm0
divsd  0xef0(%rip),%xmm0
addsd  0xef0(%rip),%xmm0
mulsd  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define double @epsilon(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fdiv double %4, 3.652500e+04
store double %5, double* %3
%6 = load double, double* %3
%7 = load double, double* %3
%8 = call double @llvm.fmuladd.f64(double 5.900000e-04, double %7, double 4.681500e+01)
%9 = fmul double %6, %8
%10 = fdiv double %9, 3.600000e+03
%11 = fsub double 0x4037707561DBA54B, %10
%12 = fmul double %11, 0x3F91DF46A2529D3A
ret double %12
}

LLVM IR (-O2):
define double @epsilon(double %0) {
%2 = fdiv double %0, 3.652500e+04
%3 = tail call double @llvm.fmuladd.f64(double %2, double 5.900000e-04, double 4.681500e+01)
%4 = fmul double %2, %3
%5 = fdiv double %4, 3.600000e+03
%6 = fsub double 0x4037707561DBA54B, %5
%7 = fmul double %6, 0x3F91DF46A2529D3A
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ ANATOP_TEMP_PANIC_DriverIRQHandler();
__attribute__((weak)) void ANATOP_TEMP_PANIC_IRQHandler(void) {
  ANATOP_TEMP_PANIC_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<ANATOP_TEMP_PANIC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ANATOP_TEMP_PANIC_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANATOP_TEMP_PANIC_IRQHandler>:
xor    %eax,%eax
jmp    1030 <ANATOP_TEMP_PANIC_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @ANATOP_TEMP_PANIC_IRQHandler() {
%1 = call i32 (...) @ANATOP_TEMP_PANIC_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @ANATOP_TEMP_PANIC_IRQHandler() {
%1 = tail call i32 (...) @ANATOP_TEMP_PANIC_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void Athena_FreeContainer(void **that, unsigned size) {
  if (size) {
    free(that[0]);
    Athena_FreeContainer(that + 1, size - 1);
  }
}


x86 assembly (clang, -O0):
<Athena_FreeContainer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1158 <Athena_FreeContainer+0x38>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
add    $0x8,%rdi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1040 <Athena_FreeContainer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Athena_FreeContainer>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1142 <Athena_FreeContainer+0x32>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <Athena_FreeContainer+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @Athena_FreeContainer(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i8**, i8*** %3
%9 = getelementptr inbounds i8*, i8** %8, i64 0
%10 = load i8*, i8** %9
%11 = call i32 @free(i8* %10)
%12 = load i8**, i8*** %3
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i32, i32* %4
%15 = sub i32 %14, 1
br label %16
16: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @Athena_FreeContainer(i8** nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %10, %4 ], [ %1, %2 ]
%6 = phi i8** [ %9, %4 ], [ %0, %2 ]
%7 = load i8*, i8** %6
%8 = tail call i32 @free(i8* %7)
%9 = getelementptr inbounds i8*, i8** %6, i64 1
%10 = add i32 %5, -1
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %2
ret void
}
int eval_sub(int a1, int a2) { return a1 - a2; }


x86 assembly (clang, -O0):
<eval_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_sub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @eval_sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @eval_sub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
int getpid() {}


x86 assembly (clang, -O0):
<getpid>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpid>:
ret

LLVM IR (-O0):
define i32 @getpid() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @getpid() {
ret i32 undef
}
int bi_len(int len, unsigned long *data) {
  int i;
  for (i = len - 1; i >= 0; i--)
    if (data[i])
      break;
  return i + 1;
}


x86 assembly (clang, -O0):
<bi_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1149 <bi_len+0x49>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1136 <bi_len+0x36>
jmp    1149 <bi_len+0x49>
jmp    113b <bi_len+0x3b>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1114 <bi_len+0x14>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bi_len>:
mov    %edi,%ecx
xor    %eax,%eax
test   %edi,%edi
cmovs  %edi,%eax
nopl   0x0(%rax)
test   %ecx,%ecx
jle    1128 <bi_len+0x28>
lea    -0x1(%rcx),%rdx
cmpq   $0x0,-0x8(%rsi,%rcx,8)
mov    %rdx,%rcx
je     1110 <bi_len+0x10>
add    $0x1,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @bi_len(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
br label %8
8: ; preds = %20, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %23
11: ; preds = %8
%12 = load i64*, i64** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %12, i64 %14
%16 = load i64, i64* %15
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %11
br label %23
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %5
%22 = add nsw i32 %21, -1
store i32 %22, i32* %5
br label %8
23: ; preds = %18, %8
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
ret i32 %25
}

LLVM IR (-O2):
define i32 @bi_len(i32 %0, i64* nocapture %1) {
%3 = zext i32 %0 to i64
%4 = call i32 @llvm.smin.i32(i32 %0, i32 0)
br label %5
5: ; preds = %10, %2
%6 = phi i64 [ %7, %10 ], [ %3, %2 ]
%7 = add nsw i64 %6, -1
%8 = trunc i64 %6 to i32
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %5
%11 = getelementptr inbounds i64, i64* %1, i64 %7
%12 = load i64, i64* %11
%13 = icmp eq i64 %12, 0
br i1 %13, label %5, label %14
14: ; preds = %10
%15 = trunc i64 %6 to i32
br label %16
16: ; preds = %5, %14
%17 = phi i32 [ %15, %14 ], [ %4, %5 ]
ret i32 %17
}
int cfs_iswhite(char c) {
  switch (c) {
  case ' ':
  case '\t':
  case '\n':
  case '\r':
    return 1;
  default:
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<cfs_iswhite>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xfffffff7,%eax
sub    $0x2,%eax
jb     1144 <cfs_iswhite+0x44>
jmp    1122 <cfs_iswhite+0x22>
mov    -0xc(%rbp),%eax
sub    $0xd,%eax
je     1144 <cfs_iswhite+0x44>
jmp    1133 <cfs_iswhite+0x33>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
jne    1150 <cfs_iswhite+0x50>
jmp    1144 <cfs_iswhite+0x44>
movl   $0x1,-0x4(%rbp)
jmp    115c <cfs_iswhite+0x5c>
jmp    1155 <cfs_iswhite+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfs_iswhite>:
cmp    $0x20,%edi
ja     111d <cfs_iswhite+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002600,%rdx
bt     %rcx,%rdx
jae    111d <cfs_iswhite+0x1d>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cfs_iswhite(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 32, label %6
i32 9, label %6
i32 10, label %6
i32 13, label %6
]
6: ; preds = %1, %1, %1, %1
store i32 1, i32* %2
br label %9
7: ; preds = %1
br label %8
8: ; preds = %7
store i32 0, i32* %2
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @cfs_iswhite(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 32, label %4
i32 9, label %4
i32 10, label %4
i32 13, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int *malloc(int);
int main() {
  int *p;
  int havoc1, havoc2;
  int uninit_var;
  p = malloc(sizeof(int));
  if (havoc1) {
    *p = 0;
  } else {
    uninit_var = 0;
  }
  if (havoc2) {
    assert(*p == 0);
  } else {
    assert(uninit_var == 0);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1156 <main+0x36>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
jmp    115d <main+0x3d>
movl   $0x0,-0x1c(%rbp)
cmpl   $0x0,-0x18(%rbp)
je     1180 <main+0x60>
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
jmp    1191 <main+0x71>
cmpl   $0x0,-0x1c(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32* @malloc(i32 4)
store i32* %6, i32** %2
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = load i32*, i32** %2
store i32 0, i32* %10
br label %12
11: ; preds = %0
store i32 0, i32* %5
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %4
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %21
15: ; preds = %12
%16 = load i32*, i32** %2
%17 = load i32, i32* %16
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
%20 = call i32 @assert(i32 %19)
br label %26
21: ; preds = %12
%22 = load i32, i32* %5
%23 = icmp eq i32 %22, 0
%24 = zext i1 %23 to i32
%25 = call i32 @assert(i32 %24)
br label %26
26: ; preds = %21, %15
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 4)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
void ff_hevc_put_hevc_bi_w_epel_hv24_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_hv24_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_hv24_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_hv24_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_hv24_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, float, int);
int main(void) {
  char *s = "CS50";
  float n = 3.14;
  bool b = true;
  printf("s = \"%s\", n = %f, b = %d\n", s, n, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xede(%rip),%rax
mov    %rax,-0x10(%rbp)
movss  0xece(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
mov    -0x18(%rbp),%edx
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef1(%rip),%rdi
lea    0xee5(%rip),%rsi
movss  0xed9(%rip),%xmm0
mov    $0x1,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"CS50\00"
@.str.1 = [26 x i8] c"s = \22%s\22, n = %f, b = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca float
%4 = alloca i32
store i32 0, i32* %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
store float 0x40091EB860000000, float* %3
store i32 1, i32* %4
%5 = load i8*, i8** %2
%6 = load float, float* %3
%7 = load i32, i32* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %5, float %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"CS50\00"
@.str.1 = [26 x i8] c"s = \22%s\22, n = %f, b = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float 0x40091EB860000000, i32 1)
ret i32 0
}
double ls_costN_nm6_sign(double x) { return x < 0 ? -1 : x > 0 ? 1 : x; }


x86 assembly (clang, -O0):
<ls_costN_nm6_sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1129 <ls_costN_nm6_sign+0x29>
movsd  0xee9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1161 <ls_costN_nm6_sign+0x61>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <ls_costN_nm6_sign+0x4d>
movsd  0xebd(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1157 <ls_costN_nm6_sign+0x57>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm6_sign>:
xorpd  %xmm1,%xmm1
xorpd  %xmm2,%xmm2
cmpltsd %xmm0,%xmm2
movsd  0xeeb(%rip),%xmm3
andpd  %xmm2,%xmm3
andnpd %xmm0,%xmm2
orpd   %xmm3,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm1
andnpd %xmm2,%xmm1
movsd  0xed2(%rip),%xmm2
andpd  %xmm2,%xmm0
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @ls_costN_nm6_sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load double, double* %2
br label %12
12: ; preds = %10, %9
%13 = phi double [ 1.000000e+00, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi double [ -1.000000e+00, %5 ], [ %13, %12 ]
ret double %15
}

LLVM IR (-O2):
define double @ls_costN_nm6_sign(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = select i1 %3, double 1.000000e+00, double %0
%5 = select i1 %2, double -1.000000e+00, double %4
ret double %5
}
unsigned int hash_size(unsigned int s) {
  unsigned int i = 1;
  while (i < s)
    i <<= 1;
  return (i);
}


x86 assembly (clang, -O0):
<hash_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1128 <hash_size+0x28>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <hash_size+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_size>:
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ecx,%eax
lea    (%rax,%rax,1),%ecx
cmp    %edi,%eax
jb     1110 <hash_size+0x10>
ret

LLVM IR (-O0):
define i32 @hash_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = shl i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @hash_size(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 1, %1 ], [ %5, %2 ]
%4 = icmp ult i32 %3, %0
%5 = shl i32 %3, 1
br i1 %4, label %2, label %6
6: ; preds = %2
ret i32 %3
}
void fa97(void) {
P0A:
  goto P0A;
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
a:
  goto a;
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa97>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa97+0x4>

x86 assembly (clang, -O2):
<fa97>:
jmp    1100 <fa97>

LLVM IR (-O0):
define void @fa97() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; No predecessors!
br label %11
11: ; preds = %11, %10
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
br label %14
14: ; preds = %14, %13
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
br label %19
19: ; preds = %19, %18
br label %19
20: ; No predecessors!
br label %21
21: ; preds = %21, %20
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
br label %24
24: ; preds = %24, %23
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
27: ; preds = %27
br label %27
}

LLVM IR (-O2):
define void @fa97() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p521_carry_square(uintptr_t, uintptr_t);
void fiat_p521_carry_square(uint64_t out1[9], const uint64_t arg1[9]) {
  internal_fiat_p521_carry_square((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p521_carry_square>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_p521_carry_square@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p521_carry_square>:
jmp    1030 <internal_fiat_p521_carry_square@plt>

LLVM IR (-O0):
define void @fiat_p521_carry_square(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_p521_carry_square(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_p521_carry_square(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_p521_carry_square(i64 %3, i64 %4)
ret void
}
void BIO_set(void) {}


x86 assembly (clang, -O0):
<BIO_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_set>:
ret

LLVM IR (-O0):
define void @BIO_set() {
ret void
}

LLVM IR (-O2):
define void @BIO_set() {
ret void
}
int main(int argc, char const *argv[]) {
  int top;
  int pad = 0;
  int to_uppcase;
  int change_case = 0;
  while (change_case != 1 && to_uppcase != 0) {
    if (top == 1) {
      to_uppcase = 1;
      continue;
    }
    if (top == 2) {
      change_case = 1;
      continue;
    }
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x20(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x20(%rbp)
mov    %al,-0x21(%rbp)
je     1139 <main+0x39>
cmpl   $0x0,-0x1c(%rbp)
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1149 <main+0x49>
jmp    117a <main+0x7a>
cmpl   $0x1,-0x14(%rbp)
jne    115f <main+0x5f>
movl   $0x1,-0x1c(%rbp)
jmp    1120 <main+0x20>
cmpl   $0x2,-0x14(%rbp)
jne    1175 <main+0x75>
movl   $0x1,-0x20(%rbp)
jmp    1120 <main+0x20>
jmp    117a <main+0x7a>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %7
store i32 0, i32* %9
br label %10
10: ; preds = %25, %21, %2
%11 = load i32, i32* %9
%12 = icmp ne i32 %11, 1
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %8
%15 = icmp ne i32 %14, 0
br label %16
16: ; preds = %13, %10
%17 = phi i1 [ false, %10 ], [ %15, %13 ]
br i1 %17, label %18, label %27
18: ; preds = %16
%19 = load i32, i32* %6
%20 = icmp eq i32 %19, 1
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 1, i32* %8
br label %10
22: ; preds = %18
%23 = load i32, i32* %6
%24 = icmp eq i32 %23, 2
br i1 %24, label %25, label %26
25: ; preds = %22
store i32 1, i32* %9
br label %10
26: ; preds = %22
br label %27
27: ; preds = %26, %16
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ append(char *, char const *, int /*<<< orphan*/);
void on_int64(void *ctx, const char *code, const char *name, int64_t value) {
  append("%s: %lld", name, value);
}


x86 assembly (clang, -O0):
<on_int64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
lea    0xecb(%rip),%rdi
call   1030 <append@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_int64>:
lea    0xee9(%rip),%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1030 <append@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s: %lld\00"
define void @on_int64(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %7
%10 = load i32, i32* %8
%11 = call i32 @append(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s: %lld\00"
define void @on_int64(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* %2, i32 %3) {
%5 = tail call i32 @append(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test3_internal();
void test3() { test3_internal(); }


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test3_internal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
xor    %eax,%eax
jmp    1030 <test3_internal@plt>

LLVM IR (-O0):
define void @test3() {
%1 = call i32 (...) @test3_internal()
ret void
}

LLVM IR (-O2):
define void @test3() {
%1 = tail call i32 (...) @test3_internal()
ret void
}
/* Type definitions */
struct h2get_h2_header {
  int dummy;
};
struct h2get_ctx {
  int dummy;
};
struct h2get_buf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ h2get_buf_printf(struct h2get_buf *, char *, char *);
void h2get_frame_render_continuation(struct h2get_ctx *ctx,
                                     struct h2get_buf *out,
                                     struct h2get_h2_header *h, char *p,
                                     size_t plen) {
  h2get_buf_printf(out, "\n%s",
                   "h2get_frame_"
                   "continuation"
                   "_render");
}


x86 assembly (clang, -O0):
<h2get_frame_render_continuation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
lea    0xec6(%rip),%rdx
call   1030 <h2get_buf_printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2get_frame_render_continuation>:
mov    %rsi,%rdi
lea    0xee6(%rip),%rsi
lea    0xee3(%rip),%rdx
jmp    1030 <h2get_buf_printf@plt>

LLVM IR (-O0):
%struct.h2get_ctx = type { i32 }
%struct.h2get_buf = type { i32 }
%struct.h2get_h2_header = type { i32 }
@.str = [4 x i8] c"\0A%s\00"
@.str.1 = [32 x i8] c"h2get_frame_continuation_render\00"
define void @h2get_frame_render_continuation(%struct.h2get_ctx* %0, %struct.h2get_buf* %1, %struct.h2get_h2_header* %2, i8* %3, i64 %4) {
%6 = alloca %struct.h2get_ctx*
%7 = alloca %struct.h2get_buf*
%8 = alloca %struct.h2get_h2_header*
%9 = alloca i8*
%10 = alloca i64
store %struct.h2get_ctx* %0, %struct.h2get_ctx** %6
store %struct.h2get_buf* %1, %struct.h2get_buf** %7
store %struct.h2get_h2_header* %2, %struct.h2get_h2_header** %8
store i8* %3, i8** %9
store i64 %4, i64* %10
%11 = load %struct.h2get_buf*, %struct.h2get_buf** %7
%12 = call i32 @h2get_buf_printf(%struct.h2get_buf* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.h2get_ctx = type { i32 }
%struct.h2get_buf = type { i32 }
%struct.h2get_h2_header = type { i32 }
@.str = [4 x i8] c"\0A%s\00"
@.str.1 = [32 x i8] c"h2get_frame_continuation_render\00"
define void @h2get_frame_render_continuation(%struct.h2get_ctx* nocapture readnone %0, %struct.h2get_buf* %1, %struct.h2get_h2_header* nocapture readnone %2, i8* nocapture readnone %3, i64 %4) {
%6 = tail call i32 @h2get_buf_printf(%struct.h2get_buf* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void foo7a() {}


x86 assembly (clang, -O0):
<foo7a>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo7a>:
ret

LLVM IR (-O0):
define void @foo7a() {
ret void
}

LLVM IR (-O2):
define void @foo7a() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DoSQV(int);
void DoSQV2(void) { DoSQV(1); }


x86 assembly (clang, -O0):
<DoSQV2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <DoSQV@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoSQV2>:
mov    $0x1,%edi
jmp    1030 <DoSQV@plt>

LLVM IR (-O0):
define void @DoSQV2() {
%1 = call i32 @DoSQV(i32 1)
ret void
}

LLVM IR (-O2):
define void @DoSQV2() {
%1 = tail call i32 @DoSQV(i32 1)
ret void
}
int test_imm_A6int64_midword_reg(long long val) {
  return ((val >> 16) & (0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xa6,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6int64_midword_reg>:
test   $0xa60000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 166
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A6int64_midword_reg(i64 %0) {
%2 = and i64 %0, 10878976
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int memcmp(void const *, void const *, size_t);
int bcmp(const void *s1, const void *s2, size_t n) { return memcmp(s1, s2, n); }


x86 assembly (clang, -O0):
<bcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcmp>:
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define i32 @bcmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcmp(i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @bcmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @memcmp(i8* %0, i8* %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ sprintf(char *, char *, char *, int);
scalar_t__ strlen(char *);
char *fmt(char *text, int value) {
  char *buffer = malloc(strlen(text) + 16);
  sprintf(buffer, "%s %d", text, value);
  return buffer;
}


x86 assembly (clang, -O0):
<fmt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rdi
add    $0x10,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xe96(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
call   1030 <strlen@plt>
lea    0x10(%rax),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbp
lea    0xeae(%rip),%rsi
mov    %rax,%rdi
mov    %rbx,%rdx
mov    %r14d,%ecx
call   1050 <sprintf@plt>
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s %d\00"
define i8* @fmt(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = add nsw i64 %7, 16
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %11, i32 %12)
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s %d\00"
define noalias i8* @fmt(i8* %0, i32 %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = add nsw i64 %3, 16
%5 = tail call i8* @malloc(i64 %4)
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %5, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret i8* %5
}
/* Type definitions */
struct shmid_ds {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
scalar_t__ shmctl(int, int /*<<< orphan*/, struct shmid_ds *);
int shmget(char, int, int /*<<< orphan*/);
void mark_lldpad_shm_for_removal() {
  int shmid;
  struct shmid_ds shminfo;
  shmid =
      shmget(((('l' << 24) | ('l' << 16) | ('d' << 8) | ('p')) + 'a' + 'd' + 1),
             4096, 0);
  if (shmid < 0)
    return;
  if (shmctl(shmid, IPC_RMID, &shminfo) < 0)
    return;
}


x86 assembly (clang, -O0):
<mark_lldpad_shm_for_removal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x36,%edi
mov    $0x1000,%esi
xor    %edx,%edx
call   1040 <shmget@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    114b <mark_lldpad_shm_for_removal+0x2b>
jmp    116f <mark_lldpad_shm_for_removal+0x4f>
mov    -0x4(%rbp),%edi
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <shmctl@plt>
cmp    $0x0,%rax
jge    116f <mark_lldpad_shm_for_removal+0x4f>
jmp    116f <mark_lldpad_shm_for_removal+0x4f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mark_lldpad_shm_for_removal>:
push   %rax
mov    $0x36,%edi
mov    $0x1000,%esi
xor    %edx,%edx
call   1040 <shmget@plt>
test   %eax,%eax
js     1149 <mark_lldpad_shm_for_removal+0x29>
mov    0x2ea3(%rip),%rcx
mov    (%rcx),%esi
mov    %rsp,%rdx
mov    %eax,%edi
call   1030 <shmctl@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@IPC_RMID = global i32 0
define void @mark_lldpad_shm_for_removal() {
%1 = alloca i32
%2 = alloca %struct.shmid_ds
%3 = call i32 @shmget(i8 signext 54, i32 4096, i32 0)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
br label %13
7: ; preds = %0
%8 = load i32, i32* %1
%9 = load i32, i32* @IPC_RMID
%10 = call i64 @shmctl(i32 %8, i32 %9, %struct.shmid_ds* %2)
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %7
br label %13
13: ; preds = %6, %12, %7
ret void
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@IPC_RMID = global i32 0
define void @mark_lldpad_shm_for_removal() {
%1 = alloca %struct.shmid_ds
%2 = bitcast %struct.shmid_ds* %1 to i8*
%3 = tail call i32 @shmget(i8 signext 54, i32 4096, i32 0)
%4 = icmp slt i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = load i32, i32* @IPC_RMID
%7 = call i64 @shmctl(i32 %3, i32 %6, %struct.shmid_ds* %1)
br label %8
8: ; preds = %5, %0
ret void
}
/* Variables and functions */
int ls_cost_nm4_f0(double const **, double **, int *, double *, int);
int ls_cost_nm4(const double **arg, double **res, int *iw, double *w, int mem) {
  return ls_cost_nm4_f0(arg, res, iw, w, mem);
}


x86 assembly (clang, -O0):
<ls_cost_nm4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <ls_cost_nm4_f0@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm4>:
jmp    1030 <ls_cost_nm4_f0@plt>

LLVM IR (-O0):
define i32 @ls_cost_nm4(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
%11 = load double**, double*** %6
%12 = load double**, double*** %7
%13 = load i32*, i32** %8
%14 = load double*, double** %9
%15 = load i32, i32* %10
%16 = call i32 @ls_cost_nm4_f0(double** %11, double** %12, i32* %13, double* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @ls_cost_nm4(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = tail call i32 @ls_cost_nm4_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ system(char *);
void media_play_run(char *run) {
  strcat(run, ".sh &");
  system(run);
}


x86 assembly (clang, -O0):
<media_play_run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <strcat@plt>
mov    -0x8(%rbp),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<media_play_run>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
call   1040 <strcat@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [6 x i8] c".sh &\00"
define void @media_play_run(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcat(i8* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%5 = load i8*, i8** %2
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c".sh &\00"
define void @media_play_run(i8* %0) {
%2 = tail call i32 @strcat(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @system(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HTTP_GET_response(char *);
void main() { HTTP_GET_response("Hello!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <HTTP_GET_response@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <HTTP_GET_response@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Hello!\0A\00"
define void @main() {
%1 = call i32 @HTTP_GET_response(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"Hello!\0A\00"
define void @main() {
%1 = tail call i32 @HTTP_GET_response(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rdtsc_markerStopRegion(char *, int);
void cere_markerStopRegion(char *regName, bool vivo, int requested_invoc,
                           int curr_invoc) {
  if (requested_invoc == curr_invoc) {
    rdtsc_markerStopRegion(regName, vivo);
  }
}


x86 assembly (clang, -O0):
<cere_markerStopRegion>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
jne    113d <cere_markerStopRegion+0x2d>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <rdtsc_markerStopRegion@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cere_markerStopRegion>:
cmp    %ecx,%edx
jne    1119 <cere_markerStopRegion+0x9>
jmp    1030 <rdtsc_markerStopRegion@plt>
ret

LLVM IR (-O0):
define void @cere_markerStopRegion(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = load i32, i32* %8
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %4
%13 = load i8*, i8** %5
%14 = load i32, i32* %6
%15 = call i32 @rdtsc_markerStopRegion(i8* %13, i32 %14)
br label %16
16: ; preds = %12, %4
ret void
}

LLVM IR (-O2):
define void @cere_markerStopRegion(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %2, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @rdtsc_markerStopRegion(i8* %0, i32 %1)
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ logger(char *);
void menuGUI() {
  logger("\t\t----------------MENU------------------\n\n");
  logger("1-Mostrar la opcion uno\n");
  logger("2-Mostrar la opcion dos\n");
  logger("3-Mostrar la opcion tres\n");
  logger("4-Salir\n");
}


x86 assembly (clang, -O0):
<menuGUI>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <logger@plt>
lea    0xf04(%rip),%rdi
call   1030 <logger@plt>
lea    0xf11(%rip),%rdi
call   1030 <logger@plt>
lea    0xf1e(%rip),%rdi
call   1030 <logger@plt>
lea    0xf2c(%rip),%rdi
call   1030 <logger@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<menuGUI>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <logger@plt>
lea    0xf07(%rip),%rdi
call   1030 <logger@plt>
lea    0xf14(%rip),%rdi
call   1030 <logger@plt>
lea    0xf21(%rip),%rdi
call   1030 <logger@plt>
lea    0xf2f(%rip),%rdi
pop    %rax
jmp    1030 <logger@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"\09\09----------------MENU------------------\0A\0A\00"
@.str.1 = [25 x i8] c"1-Mostrar la opcion uno\0A\00"
@.str.2 = [25 x i8] c"2-Mostrar la opcion dos\0A\00"
@.str.3 = [26 x i8] c"3-Mostrar la opcion tres\0A\00"
@.str.4 = [9 x i8] c"4-Salir\0A\00"
define void @menuGUI() {
%1 = call i32 @logger(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @logger(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @logger(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @logger(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @logger(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"\09\09----------------MENU------------------\0A\0A\00"
@.str.1 = [25 x i8] c"1-Mostrar la opcion uno\0A\00"
@.str.2 = [25 x i8] c"2-Mostrar la opcion dos\0A\00"
@.str.3 = [26 x i8] c"3-Mostrar la opcion tres\0A\00"
@.str.4 = [9 x i8] c"4-Salir\0A\00"
define void @menuGUI() {
%1 = tail call i32 @logger(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @logger(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @logger(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @logger(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @logger(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0))
ret void
}
const char *octave_ctermid_wrapper(void) { return "/dev/tty"; }


x86 assembly (clang, -O0):
<octave_ctermid_wrapper>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_ctermid_wrapper>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"/dev/tty\00"
define i8* @octave_ctermid_wrapper() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"/dev/tty\00"
define i8* @octave_ctermid_wrapper() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
long long load2r(long long *array) {
  int a = 0;
  a += array[200];
  a += array[201];
  a += array[202];
  a += array[203];
  return a;
}


x86 assembly (clang, -O0):
<load2r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x640(%rax),%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x648(%rax),%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x650(%rax),%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x658(%rax),%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load2r>:
movdqu 0x640(%rdi),%xmm0
movdqu 0x650(%rdi),%xmm1
paddq  %xmm0,%xmm1
pshufd $0xee,%xmm1,%xmm0
paddq  %xmm1,%xmm0
movq   %xmm0,%rax
cltq
ret

LLVM IR (-O0):
define i64 @load2r(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
store i32 0, i32* %3
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 200
%6 = load i64, i64* %5
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = add nsw i64 %8, %6
%10 = trunc i64 %9 to i32
store i32 %10, i32* %3
%11 = load i64*, i64** %2
%12 = getelementptr inbounds i64, i64* %11, i64 201
%13 = load i64, i64* %12
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = add nsw i64 %15, %13
%17 = trunc i64 %16 to i32
store i32 %17, i32* %3
%18 = load i64*, i64** %2
%19 = getelementptr inbounds i64, i64* %18, i64 202
%20 = load i64, i64* %19
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = add nsw i64 %22, %20
%24 = trunc i64 %23 to i32
store i32 %24, i32* %3
%25 = load i64*, i64** %2
%26 = getelementptr inbounds i64, i64* %25, i64 203
%27 = load i64, i64* %26
%28 = load i32, i32* %3
%29 = sext i32 %28 to i64
%30 = add nsw i64 %29, %27
%31 = trunc i64 %30 to i32
store i32 %31, i32* %3
%32 = load i32, i32* %3
%33 = sext i32 %32 to i64
ret i64 %33
}

LLVM IR (-O2):
define i64 @load2r(i64* nocapture %0) {
%2 = getelementptr inbounds i64, i64* %0, i64 200
%3 = bitcast i64* %2 to <4 x i64>*
%4 = load <4 x i64>, <4 x i64>* %3
%5 = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> %4)
%6 = shl i64 %5, 32
%7 = ashr exact i64 %6, 32
ret i64 %7
}
/* Variables and functions */
void api01() {
  const size_t String_Size = 20;
  struct bad_node_s {
    char name[String_Size];
    struct bad_node_s *next;
  };
  struct good_node_s {
    struct good_node_s *next;
    char name[String_Size];
  };
  struct also_good_node_s {
    struct also_good_node_s *next;
    char *name;
  };
}


x86 assembly (clang, -O0):
<api01>:
push   %rbp
mov    %rsp,%rbp
movq   $0x14,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<api01>:
ret

LLVM IR (-O0):
define void @api01() {
%1 = alloca i64
store i64 20, i64* %1
ret void
}

LLVM IR (-O2):
define void @api01() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Intmm(int);
int main() {
  int i;
  for (i = 0; i < 10; i++)
    Intmm(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1146 <main+0x36>
mov    -0x8(%rbp),%edi
call   1030 <Intmm@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <Intmm@plt>
mov    $0x1,%edi
call   1030 <Intmm@plt>
mov    $0x2,%edi
call   1030 <Intmm@plt>
mov    $0x3,%edi
call   1030 <Intmm@plt>
mov    $0x4,%edi
call   1030 <Intmm@plt>
mov    $0x5,%edi
call   1030 <Intmm@plt>
mov    $0x6,%edi
call   1030 <Intmm@plt>
mov    $0x7,%edi
call   1030 <Intmm@plt>
mov    $0x8,%edi
call   1030 <Intmm@plt>
mov    $0x9,%edi
call   1030 <Intmm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @Intmm(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @Intmm(i32 0)
%2 = tail call i32 @Intmm(i32 1)
%3 = tail call i32 @Intmm(i32 2)
%4 = tail call i32 @Intmm(i32 3)
%5 = tail call i32 @Intmm(i32 4)
%6 = tail call i32 @Intmm(i32 5)
%7 = tail call i32 @Intmm(i32 6)
%8 = tail call i32 @Intmm(i32 7)
%9 = tail call i32 @Intmm(i32 8)
%10 = tail call i32 @Intmm(i32 9)
ret i32 0
}