xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  char terminate = 0;
  printf("MinWin16\n");
  while (!terminate) {
  }
  printf("System has shut down successfully.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x0,-0x5(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
cmpb   $0x0,-0x5(%rbp)
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1145 <main+0x35>
jmp    114a <main+0x3a>
jmp    112f <main+0x1f>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [10 x i8] c"MinWin16\0A\00"
@.str.1 = [36 x i8] c"System has shut down successfully.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 0, i8* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %4
4: ; preds = %8, %0
%5 = load i8, i8* %2
%6 = icmp ne i8 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
%10 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [9 x i8] c"MinWin16\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
br label %2
2: ; preds = %2, %0
br label %2
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/, char const *, char const *);
int shim_lremovexattr(const char *path, const char *name) {
  return shim_enosys(0, path, name);
}


x86 assembly (clang, -O0):
<shim_lremovexattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_lremovexattr>:
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_lremovexattr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @shim_enosys(i32 0, i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @shim_lremovexattr(i8* %0, i8* %1) {
%3 = tail call i32 @shim_enosys(i32 0, i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(long long *, double *, int);
long long __attribute__((no)) f1(void) {
  long long t;
  double d = 0x0.fffffffffffff000p-1022;
  memcpy(&t, &d, sizeof(long long));
  return t;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  0xee0(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
sub    $0x18,%rsp
movabs $0xfffffffffffff,%rax
mov    %rax,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i64 @f1() {
%1 = alloca i64
%2 = alloca double
store double 0xFFFFFFFFFFFFF, double* %2
%3 = call i32 @memcpy(i64* %1, double* %2, i32 8)
%4 = load i64, i64* %1
ret i64 %4
}

LLVM IR (-O2):
define i64 @f1() {
%1 = alloca i64
%2 = alloca double
%3 = bitcast i64* %1 to i8*
%4 = bitcast double* %2 to i8*
store double 0xFFFFFFFFFFFFF, double* %2
%5 = call i32 @memcpy(i64* %1, double* %2, i32 8)
%6 = load i64, i64* %1
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ reverse(char *, size_t, size_t);
size_t strlen(char *);
void left_rotate(char *str, size_t amt) {
  size_t str_sz = strlen(str);
  amt %= str_sz;
  reverse(str, 0, amt);
  reverse(str, amt, str_sz);
  reverse(str, 0, str_sz);
}


x86 assembly (clang, -O0):
<left_rotate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
xor    %edx,%edx
div    %rcx
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%esi
call   1030 <reverse@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <reverse@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%esi
call   1030 <reverse@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<left_rotate>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
call   1040 <strlen@plt>
mov    %rax,%rbx
or     %r15,%rax
shr    $0x20,%rax
je     1149 <left_rotate+0x29>
mov    %r15,%rax
xor    %edx,%edx
div    %rbx
mov    %rdx,%r15
jmp    1153 <left_rotate+0x33>
mov    %r15d,%eax
xor    %edx,%edx
div    %ebx
mov    %edx,%r15d
mov    %r14,%rdi
xor    %esi,%esi
mov    %r15,%rdx
call   1030 <reverse@plt>
mov    %r14,%rdi
mov    %r15,%rsi
mov    %rbx,%rdx
call   1030 <reverse@plt>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define void @left_rotate(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = urem i64 %9, %8
store i64 %10, i64* %4
%11 = load i8*, i8** %3
%12 = load i64, i64* %4
%13 = call i32 @reverse(i8* %11, i64 0, i64 %12)
%14 = load i8*, i8** %3
%15 = load i64, i64* %4
%16 = load i64, i64* %5
%17 = call i32 @reverse(i8* %14, i64 %15, i64 %16)
%18 = load i8*, i8** %3
%19 = load i64, i64* %5
%20 = call i32 @reverse(i8* %18, i64 0, i64 %19)
ret void
}

LLVM IR (-O2):
define void @left_rotate(i8* %0, i64 %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = urem i64 %1, %3
%5 = tail call i32 @reverse(i8* %0, i64 0, i64 %4)
%6 = tail call i32 @reverse(i8* %0, i64 %4, i64 %3)
%7 = tail call i32 @reverse(i8* %0, i64 0, i64 %3)
ret void
}
void main() {
  struct somestr {
    int a;
    int b;
  } * pointstr;
  struct somestr str = {2, 2};
  pointstr = &str;
  print("2 2");
  print(*pointstr);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <print@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    $0x0,%al
call   1030 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %eax,%eax
call   1030 <print@plt>
movabs $0x200000002,%rdi
xor    %eax,%eax
pop    %rcx
jmp    1030 <print@plt>

LLVM IR (-O0):
%struct.somestr = type { i32, i32 }
@__const.main.str = %struct.somestr { i32 2, i32 2 }
@.str = [4 x i8] c"2 2\00"
define void @main() {
%1 = alloca %struct.somestr*
%2 = alloca %struct.somestr
%3 = bitcast %struct.somestr* %2 to i8*
store %struct.somestr* %2, %struct.somestr** %1
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @print to i32 (i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = load %struct.somestr*, %struct.somestr** %1
%6 = bitcast %struct.somestr* %5 to i64*
%7 = load i64, i64* %6
%8 = call i32 (i64, ...) bitcast (i32 (...)* @print to i32 (i64, ...)*)(i64 %7)
ret void
}

LLVM IR (-O2):
%struct.somestr = type { i32, i32 }
@.str = [4 x i8] c"2 2\00"
define void @main() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @print to i32 (i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (i64, ...) bitcast (i32 (...)* @print to i32 (i64, ...)*)(i64 8589934594)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void xxx1(void) { printf("DSO1\n"); }


x86 assembly (clang, -O0):
<xxx1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"DSO1\0A\00"
define void @xxx1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"DSO1\00"
define void @xxx1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret void
}
void Timer2A_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<Timer2A_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Timer2A_Handler+0x9>
jmp    1109 <Timer2A_Handler+0x9>

x86 assembly (clang, -O2):
<Timer2A_Handler>:
jmp    1100 <Timer2A_Handler>

LLVM IR (-O0):
define void @Timer2A_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Timer2A_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
int turn_off_right_most(int reg) { return reg & (reg - 1); }


x86 assembly (clang, -O0):
<turn_off_right_most>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<turn_off_right_most>:
lea    -0x1(%rdi),%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @turn_off_right_most(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = and i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @turn_off_right_most(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = and i32 %2, %0
ret i32 %3
}
int h4(int a, int b) { return b - 8; }


x86 assembly (clang, -O0):
<h4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h4>:
lea    -0x8(%rsi),%eax
ret

LLVM IR (-O0):
define i32 @h4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sub nsw i32 %5, 8
ret i32 %6
}

LLVM IR (-O2):
define i32 @h4(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -8
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ os_close_file(void *);
void if_close_saved_game(void *opaque) { os_close_file(opaque); }


x86 assembly (clang, -O0):
<if_close_saved_game>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <os_close_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<if_close_saved_game>:
jmp    1030 <os_close_file@plt>

LLVM IR (-O0):
define void @if_close_saved_game(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @os_close_file(i8* %3)
ret void
}

LLVM IR (-O2):
define void @if_close_saved_game(i8* %0) {
%2 = tail call i32 @os_close_file(i8* %0)
ret void
}
WAVE_pwm() {}


x86 assembly (clang, -O0):
<WAVE_pwm>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WAVE_pwm>:
ret

LLVM IR (-O0):
define i32 @WAVE_pwm() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @WAVE_pwm() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ stdout;
int plan_tests(int count) {
  printf("1..%d\n", count);
  fflush(stdout);
  return count;
}


x86 assembly (clang, -O0):
<plan_tests>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plan_tests>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"1..%d\0A\00"
@stdout = global i32 0
define i32 @plan_tests(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @stdout
%6 = call i32 @fflush(i32 %5)
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
@.str = [7 x i8] c"1..%d\0A\00"
@stdout = global i32 0
define i32 @plan_tests(i32 returned %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
ret i32 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
void set_wifi_light(int on) {
  FILE *out = fopen("/sys/class/leds/asus::wlan/brightness", "w");
  if (!out)
    return;
  fprintf(out, "%d\n", on);
  fclose(out);
}


x86 assembly (clang, -O0):
<set_wifi_light>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xebe(%rip),%rdi
lea    0xedd(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1162 <set_wifi_light+0x32>
jmp    117e <set_wifi_light+0x4e>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb8(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_wifi_light>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
lea    0xec4(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     116f <set_wifi_light+0x3f>
mov    %rax,%rbx
lea    0xed1(%rip),%rsi
mov    %rax,%rdi
mov    %ebp,%edx
call   1040 <fprintf@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fclose@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [38 x i8] c"/sys/class/leds/asus::wlan/brightness\00"
@.str.1 = [2 x i8] c"w\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define void @set_wifi_light(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i32* @fopen(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %4, i32** %3
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
br label %14
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = load i32, i32* %2
%11 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %10)
%12 = load i32*, i32** %3
%13 = call i32 @fclose(i32* %12)
br label %14
14: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
@.str = [38 x i8] c"/sys/class/leds/asus::wlan/brightness\00"
@.str.1 = [2 x i8] c"w\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define void @set_wifi_light(i32 %0) {
%2 = tail call i32* @fopen(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @fprintf(i32* %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %0)
%6 = tail call i32 @fclose(i32* %2)
br label %7
7: ; preds = %1, %4
ret void
}
/* Type definitions */
typedef int *__m128;

/* Variables and functions */
__m128 __attribute__((__always___, __nodebug__))
_mm_cvtsi32_ss(__m128 a, int b) {
  a[0] = b;
  return a;
}


x86 assembly (clang, -O0):
<_mm_cvtsi32_ss>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cvtsi32_ss>:
mov    %rdi,%rax
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define i32* @_mm_cvtsi32_ss(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load i32*, i32** %3
ret i32* %8
}

LLVM IR (-O2):
define i32* @_mm_cvtsi32_ss(i32* returned writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret i32* %0
}
int test_imm_0Fuint8_reg(unsigned char val) {
  return ((val) & (0x0F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Fuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Fuint8_reg>:
test   $0xf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Fuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 15
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Fuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 15
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int mu_gsasl_enabled(void) { return 0; }


x86 assembly (clang, -O0):
<mu_gsasl_enabled>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mu_gsasl_enabled>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mu_gsasl_enabled() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mu_gsasl_enabled() {
ret i32 0
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/lineno.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/lineno.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/lineno.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ menuOpcoes();
int main() { menuOpcoes(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <menuOpcoes@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <menuOpcoes@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @menuOpcoes()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @menuOpcoes()
ret i32 0
}
void trace(const char *fmt, ...) {}


x86 assembly (clang, -O0):
<trace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace>:
ret

LLVM IR (-O0):
define void @trace(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @trace(i8* nocapture %0, ...) {
ret void
}
void gdk_rgb_get_colormap() {}


x86 assembly (clang, -O0):
<gdk_rgb_get_colormap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_rgb_get_colormap>:
ret

LLVM IR (-O0):
define void @gdk_rgb_get_colormap() {
ret void
}

LLVM IR (-O2):
define void @gdk_rgb_get_colormap() {
ret void
}
void EC_KEY_generate_key(void) {}


x86 assembly (clang, -O0):
<EC_KEY_generate_key>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_KEY_generate_key>:
ret

LLVM IR (-O0):
define void @EC_KEY_generate_key() {
ret void
}

LLVM IR (-O2):
define void @EC_KEY_generate_key() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ foo(char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(int argc, char *argv[]) {
  if (argc != 2) {
    fprintf(stderr, "target5: argc != 2\n");
    exit(EXIT_FAILURE);
  }
  foo(argv[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     1173 <main+0x43>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
lea    0xea0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1143 <main+0x13>
mov    0x8(%rsi),%rdi
call   1040 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
lea    0xead(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"target5: argc != 2\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %2
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 1
%16 = load i8*, i8** %15
%17 = call i32 @foo(i8* %16)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"target5: argc != 2\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %2
%10 = getelementptr inbounds i8*, i8** %1, i64 1
%11 = load i8*, i8** %10
%12 = tail call i32 @foo(i8* %11)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "usage: dumpit file1 file2 ...\n");
  fprintf(stderr, "\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xede(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"usage: dumpit file1 file2 ...\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"usage: dumpit file1 file2 ...\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
bool several(uint64_t bb) { return bb & (bb - 1); }


x86 assembly (clang, -O0):
<several>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<several>:
lea    -0x1(%rdi),%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @several(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = and i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @several(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = and i32 %2, %0
ret i32 %3
}
int config_WITH_CARDREADER(void) { return 1; }


x86 assembly (clang, -O0):
<config_WITH_CARDREADER>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_WITH_CARDREADER>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @config_WITH_CARDREADER() {
ret i32 1
}

LLVM IR (-O2):
define i32 @config_WITH_CARDREADER() {
ret i32 1
}
int tdefault_remove_hw_breakpoint(struct target_ops *self, struct gdbarch *arg1,
                                  struct bp_target_info *arg2) {
  return -1;
}


x86 assembly (clang, -O0):
<tdefault_remove_hw_breakpoint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_remove_hw_breakpoint>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
%struct.gdbarch = type opaque
%struct.bp_target_info = type opaque
define i32 @tdefault_remove_hw_breakpoint(%struct.target_ops* %0, %struct.gdbarch* %1, %struct.bp_target_info* %2) {
%4 = alloca %struct.target_ops*
%5 = alloca %struct.gdbarch*
%6 = alloca %struct.bp_target_info*
store %struct.target_ops* %0, %struct.target_ops** %4
store %struct.gdbarch* %1, %struct.gdbarch** %5
store %struct.bp_target_info* %2, %struct.bp_target_info** %6
ret i32 -1
}

LLVM IR (-O2):
%struct.target_ops = type opaque
%struct.gdbarch = type opaque
%struct.bp_target_info = type opaque
define i32 @tdefault_remove_hw_breakpoint(%struct.target_ops* nocapture readnone %0, %struct.gdbarch* nocapture readnone %1, %struct.bp_target_info* nocapture readnone %2) {
ret i32 -1
}
/* Variables and functions */
int f(int);
int main(void) {
  int *x, *y;
  int N;
  for (int j = 0; j < N; ++j) {
    x[j] = f(y[j]);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    115d <main+0x4d>
mov    -0x18(%rbp),%rax
movslq -0x20(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <f@plt>
mov    %eax,%edx
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1126 <main+0x16>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %5
br label %6
6: ; preds = %21, %0
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @f(i32 %15)
%17 = load i32*, i32** %2
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
br label %21
21: ; preds = %10
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
%25 = load i32, i32* %1
ret i32 %25
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int cwbit(const unsigned char *fullstream, const int i) {
  int resultant = 0;
  if (fullstream[(i / 8)] & (0x80 >> (i % 8))) {
    resultant = 1;
  }
  return resultant;
}


x86 assembly (clang, -O0):
<cwbit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x14(%rbp),%eax
mov    %edx,%ecx
mov    $0x80,%edx
sar    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1160 <cwbit+0x60>
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cwbit>:
mov    %esi,%ecx
lea    0x7(%rcx),%eax
test   %esi,%esi
cmovns %esi,%eax
sar    $0x3,%eax
cltq
movzbl (%rdi,%rax,1),%eax
and    $0x7,%cl
shl    %cl,%eax
movzbl %al,%eax
shr    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @cwbit(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sdiv i32 %7, 8
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i32, i32* %4
%14 = srem i32 %13, 8
%15 = ashr i32 128, %14
%16 = and i32 %12, %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %2
store i32 1, i32* %5
br label %19
19: ; preds = %18, %2
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @cwbit(i8* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %1, 7
%9 = lshr i32 128, %8
%10 = and i32 %9, %7
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int px4_arch_unconfiggpio(uint32_t pinset) { return -1; }


x86 assembly (clang, -O0):
<px4_arch_unconfiggpio>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<px4_arch_unconfiggpio>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @px4_arch_unconfiggpio(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @px4_arch_unconfiggpio(i32 %0) {
ret i32 -1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
scalar_t__ ERR;
scalar_t__ clrtoeol();
uint8_t ccbi_clrtoeol() { return ((clrtoeol()) == ERR ? 0 : 1); }


x86 assembly (clang, -O0):
<ccbi_clrtoeol>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clrtoeol@plt>
mov    %rax,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%rsi
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccbi_clrtoeol>:
push   %rax
xor    %eax,%eax
call   1030 <clrtoeol@plt>
mov    0x2ec9(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ERR = global i64 0
define i32 @ccbi_clrtoeol() {
%1 = call i64 (...) @clrtoeol()
%2 = load i64, i64* @ERR
%3 = icmp eq i64 %1, %2
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
@ERR = global i64 0
define i32 @ccbi_clrtoeol() {
%1 = tail call i64 (...) @clrtoeol()
%2 = load i64, i64* @ERR
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int CALL1(int);
int CALL2(int);
int FUNCTION(int a) { return CALL1(a) + CALL2(a) + 2; }


x86 assembly (clang, -O0):
<FUNCTION>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <CALL1@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <CALL2@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x2,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FUNCTION>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
call   1040 <CALL1@plt>
mov    %eax,%r14d
mov    %ebx,%edi
call   1030 <CALL2@plt>
add    %r14d,%eax
add    $0x2,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @FUNCTION(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @CALL1(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @CALL2(i32 %5)
%7 = add nsw i32 %4, %6
%8 = add nsw i32 %7, 2
ret i32 %8
}

LLVM IR (-O2):
define i32 @FUNCTION(i32 %0) {
%2 = tail call i32 @CALL1(i32 %0)
%3 = tail call i32 @CALL2(i32 %0)
%4 = add i32 %2, 2
%5 = add i32 %4, %3
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ next_c(int /*<<< orphan*/ *);
scalar_t__ next_c_matches(int /*<<< orphan*/ *, char);
void consume_next_c_on_match(FILE *scene_file, char c) {
  if (next_c_matches(scene_file, c))
    next_c(scene_file);
}


x86 assembly (clang, -O0):
<consume_next_c_on_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1040 <next_c_matches@plt>
cmp    $0x0,%rax
je     1152 <consume_next_c_on_match+0x32>
mov    -0x8(%rbp),%rdi
call   1030 <next_c@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<consume_next_c_on_match>:
push   %rbx
mov    %rdi,%rbx
call   1040 <next_c_matches@plt>
test   %rax,%rax
je     1137 <consume_next_c_on_match+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <next_c@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @consume_next_c_on_match(i32* %0, i8 signext %1) {
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
store i8 %1, i8* %4
%5 = load i32*, i32** %3
%6 = load i8, i8* %4
%7 = call i64 @next_c_matches(i32* %5, i8 signext %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32*, i32** %3
%11 = call i32 @next_c(i32* %10)
br label %12
12: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @consume_next_c_on_match(i32* %0, i8 signext %1) {
%3 = tail call i64 @next_c_matches(i32* %0, i8 signext %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @next_c(i32* %0)
br label %7
7: ; preds = %5, %2
ret void
}
void rop3_176_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~S;
  stk2 = *D | stk3;
  stk1 = T & stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_176_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_176_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_176_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_176_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void ip_set_srcaddr(uint8_t *p_ip, uint32_t addr) {
  p_ip[12] = (addr & 0xff000000) >> 24;
  p_ip[13] = (addr & 0x00ff0000) >> 16;
  p_ip[14] = (addr & 0x0000ff00) >> 8;
  p_ip[15] = (addr & 0x000000ff);
}


x86 assembly (clang, -O0):
<ip_set_srcaddr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x30(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x34(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x38(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x3c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_set_srcaddr>:
mov    %esi,%eax
mov    %esi,%ecx
movzbl %ah,%edx
movzbl %al,%esi
shr    $0x18,%eax
mov    %eax,0x30(%rdi)
shr    $0x10,%ecx
movzbl %cl,%eax
mov    %eax,0x34(%rdi)
mov    %edx,0x38(%rdi)
mov    %esi,0x3c(%rdi)
ret

LLVM IR (-O0):
define void @ip_set_srcaddr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, -16777216
%7 = lshr i32 %6, 24
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 12
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = and i32 %10, 16711680
%12 = ashr i32 %11, 16
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 13
store i32 %12, i32* %14
%15 = load i32, i32* %4
%16 = and i32 %15, 65280
%17 = ashr i32 %16, 8
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 14
store i32 %17, i32* %19
%20 = load i32, i32* %4
%21 = and i32 %20, 255
%22 = load i32*, i32** %3
%23 = getelementptr inbounds i32, i32* %22, i64 15
store i32 %21, i32* %23
ret void
}

LLVM IR (-O2):
define void @ip_set_srcaddr(i32* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = getelementptr inbounds i32, i32* %0, i64 12
store i32 %3, i32* %4
%5 = lshr i32 %1, 16
%6 = and i32 %5, 255
%7 = getelementptr inbounds i32, i32* %0, i64 13
store i32 %6, i32* %7
%8 = lshr i32 %1, 8
%9 = and i32 %8, 255
%10 = getelementptr inbounds i32, i32* %0, i64 14
store i32 %9, i32* %10
%11 = and i32 %1, 255
%12 = getelementptr inbounds i32, i32* %0, i64 15
store i32 %11, i32* %12
ret void
}
/* Variables and functions */
int serialWriteTry(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int serialWriteString(char *s) { return serialWriteTry(s, strlen(s)); }


x86 assembly (clang, -O0):
<serialWriteString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <serialWriteTry@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialWriteString>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <serialWriteTry@plt>

LLVM IR (-O0):
define i32 @serialWriteString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @serialWriteTry(i8* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @serialWriteString(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @serialWriteTry(i8* %0, i32 %2)
ret i32 %3
}
int g2(int x) { return x; }


x86 assembly (clang, -O0):
<g2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @g2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @g2(i32 returned %0) {
ret i32 %0
}
void g_list_alloc() {}


x86 assembly (clang, -O0):
<g_list_alloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_list_alloc>:
ret

LLVM IR (-O0):
define void @g_list_alloc() {
ret void
}

LLVM IR (-O2):
define void @g_list_alloc() {
ret void
}
int scan_fromhex(unsigned char c) {
  c = (unsigned char)(c - '0');
  if (c <= 9)
    return c;
  c = (unsigned char)(c & ~0x20);
  c = (unsigned char)(c - ('A' - '0'));
  if (c < 6)
    return c + 10;
  return -1;
}


x86 assembly (clang, -O0):
<scan_fromhex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x9,%eax
jg     112d <scan_fromhex+0x2d>
movzbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <scan_fromhex+0x64>
movzbl -0x5(%rbp),%eax
and    $0xffffffdf,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
sub    $0x11,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x6,%eax
jge    115d <scan_fromhex+0x5d>
movzbl -0x5(%rbp),%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <scan_fromhex+0x64>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_fromhex>:
add    $0xd0,%dil
cmp    $0x9,%dil
ja     110f <scan_fromhex+0xf>
movzbl %dil,%eax
ret
and    $0xdf,%dil
add    $0xef,%dil
mov    $0xffffffff,%eax
cmp    $0x5,%dil
ja     1129 <scan_fromhex+0x29>
movzbl %dil,%eax
add    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @scan_fromhex(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = sub nsw i32 %5, 48
%7 = trunc i32 %6 to i8
store i8 %7, i8* %3
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 9
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
store i32 %13, i32* %2
br label %31
14: ; preds = %1
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = and i32 %16, -33
%18 = trunc i32 %17 to i8
store i8 %18, i8* %3
%19 = load i8, i8* %3
%20 = zext i8 %19 to i32
%21 = sub nsw i32 %20, 17
%22 = trunc i32 %21 to i8
store i8 %22, i8* %3
%23 = load i8, i8* %3
%24 = zext i8 %23 to i32
%25 = icmp slt i32 %24, 6
br i1 %25, label %26, label %30
26: ; preds = %14
%27 = load i8, i8* %3
%28 = zext i8 %27 to i32
%29 = add nsw i32 %28, 10
store i32 %29, i32* %2
br label %31
30: ; preds = %14
store i32 -1, i32* %2
br label %31
31: ; preds = %30, %26, %11
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @scan_fromhex(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = zext i8 %2 to i32
br label %13
6: ; preds = %1
%7 = and i8 %2, -33
%8 = add i8 %7, -17
%9 = icmp ult i8 %8, 6
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = zext i8 %8 to i32
%12 = add nuw nsw i32 %11, 10
br label %13
13: ; preds = %6, %10, %4
%14 = phi i32 [ %5, %4 ], [ %12, %10 ], [ -1, %6 ]
ret i32 %14
}
int test_imm_B1int8_reg(signed char val) {
  return ((val) & (-0xB1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B1int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff4f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B1int8_reg>:
test   $0xffffff4f,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B1int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -177
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B1int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -177
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t print_hexbin(int /*<<< orphan*/ *, unsigned char *, int);
size_t print_hexbin_byte(FILE *fp, unsigned char value) {
  return print_hexbin(fp, &value, 1);
}


x86 assembly (clang, -O0):
<print_hexbin_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x9(%rbp),%rsi
mov    $0x1,%edx
call   1030 <print_hexbin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hexbin_byte>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <print_hexbin@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @print_hexbin_byte(i32* %0, i8 zeroext %1) {
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
store i8 %1, i8* %4
%5 = load i32*, i32** %3
%6 = call i64 @print_hexbin(i32* %5, i8* %4, i32 1)
ret i64 %6
}

LLVM IR (-O2):
define i64 @print_hexbin_byte(i32* %0, i8 zeroext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i64 @print_hexbin(i32* %0, i8* %3, i32 1)
ret i64 %4
}
/* Variables and functions */
void libretro_dummy_retro_reset(void) {}


x86 assembly (clang, -O0):
<libretro_dummy_retro_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libretro_dummy_retro_reset>:
ret

LLVM IR (-O0):
define void @libretro_dummy_retro_reset() {
ret void
}

LLVM IR (-O2):
define void @libretro_dummy_retro_reset() {
ret void
}