xunge/DecIR huggingface dataset:
int do_049() { return 49; }


x86 assembly (clang, -O0):
<do_049>:
push   %rbp
mov    %rsp,%rbp
mov    $0x31,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_049>:
mov    $0x31,%eax
ret

LLVM IR (-O0):
define i32 @do_049() {
ret i32 49
}

LLVM IR (-O2):
define i32 @do_049() {
ret i32 49
}
/* Type definitions */
struct string {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _prim_string_print(struct string *);
int /*<<< orphan*/ exit(int);
void _prim_error(struct string *p1) {
  _prim_string_print(p1);
  exit(-1);
}


x86 assembly (clang, -O0):
<_prim_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_prim_string_print@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<_prim_error>:
push   %rax
call   1030 <_prim_string_print@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
%struct.string = type { i32 }
define void @_prim_error(%struct.string* %0) {
%2 = alloca %struct.string*
store %struct.string* %0, %struct.string** %2
%3 = load %struct.string*, %struct.string** %2
%4 = call i32 @_prim_string_print(%struct.string* %3)
%5 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
%struct.string = type { i32 }
define void @_prim_error(%struct.string* %0) {
%2 = tail call i32 @_prim_string_print(%struct.string* %0)
%3 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ flon_schedule_msg(char const *, char const *, char const *,
                                     int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                     int /*<<< orphan*/ *);
void flon_unschedule_msg(const char *type, const char *ts, const char *nid) {
  flon_schedule_msg(type, ts, nid, NULL, NULL, NULL);
}


x86 assembly (clang, -O0):
<flon_unschedule_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%r9d
mov    %r9,%rcx
mov    %r9,%r8
call   1030 <flon_schedule_msg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flon_unschedule_msg>:
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <flon_schedule_msg@plt>

LLVM IR (-O0):
define void @flon_unschedule_msg(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @flon_schedule_msg(i8* %7, i8* %8, i8* %9, i32* null, i32* null, i32* null)
ret void
}

LLVM IR (-O2):
define void @flon_unschedule_msg(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @flon_schedule_msg(i8* %0, i8* %1, i8* %2, i32* null, i32* null, i32* null)
ret void
}
/* Variables and functions */
double cos(double);
double sin(double);
double getComp(double force, double angle, int dir) {
  double result;
  switch (dir) {
  case 0:
    result = force * cos(angle);
    break;
  case 1:
    result = force * sin(angle);
    break;
  }
  return result;
}


x86 assembly (clang, -O0):
<getComp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x24(%rbp)
test   %eax,%eax
je     1159 <getComp+0x39>
jmp    1148 <getComp+0x28>
mov    -0x24(%rbp),%eax
sub    $0x1,%eax
je     1183 <getComp+0x63>
jmp    11a8 <getComp+0x88>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <cos@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    11a8 <getComp+0x88>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x38(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getComp>:
push   %rax
movaps %xmm0,%xmm2
cmp    $0x1,%edi
je     113d <getComp+0x1d>
test   %edi,%edi
jne    1150 <getComp+0x30>
movapd %xmm1,%xmm0
movsd  %xmm2,(%rsp)
call   1040 <cos@plt>
jmp    114b <getComp+0x2b>
movapd %xmm1,%xmm0
movsd  %xmm2,(%rsp)
call   1030 <sin@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @getComp(double %0, double %1, i32 %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca i32
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
switch i32 %8, label %19 [
i32 0, label %9
i32 1, label %14
]
9: ; preds = %3
%10 = load double, double* %4
%11 = load double, double* %5
%12 = call double @cos(double %11)
%13 = fmul double %10, %12
store double %13, double* %7
br label %19
14: ; preds = %3
%15 = load double, double* %4
%16 = load double, double* %5
%17 = call double @sin(double %16)
%18 = fmul double %15, %17
store double %18, double* %7
br label %19
19: ; preds = %3, %14, %9
%20 = load double, double* %7
ret double %20
}

LLVM IR (-O2):
define double @getComp(double %0, double %1, i32 %2) {
switch i32 %2, label %10 [
i32 0, label %4
i32 1, label %7
]
4: ; preds = %3
%5 = tail call double @cos(double %1)
%6 = fmul double %5, %0
br label %10
7: ; preds = %3
%8 = tail call double @sin(double %1)
%9 = fmul double %8, %0
br label %10
10: ; preds = %3, %7, %4
%11 = phi double [ undef, %3 ], [ %9, %7 ], [ %6, %4 ]
ret double %11
}
void I210ToARGB() {}


x86 assembly (clang, -O0):
<I210ToARGB>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I210ToARGB>:
ret

LLVM IR (-O0):
define void @I210ToARGB() {
ret void
}

LLVM IR (-O2):
define void @I210ToARGB() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ ByteSwap(void *, int, int);
int fread(void *, int, int, int /*<<< orphan*/ *);
int xfread_LE(void *p, int size, int num, FILE *fp) {
  int block;
  block = fread(p, size, num, fp);
  ByteSwap(p, size, block);
  return block;
}


x86 assembly (clang, -O0):
<xfread_LE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <fread@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x1c(%rbp),%edx
call   1040 <ByteSwap@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfread_LE>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
call   1030 <fread@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %r14d,%esi
mov    %eax,%edx
call   1040 <ByteSwap@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @xfread_LE(i8* %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32*, i32** %8
%14 = call i32 @fread(i8* %10, i32 %11, i32 %12, i32* %13)
store i32 %14, i32* %9
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = load i32, i32* %9
%18 = call i32 @ByteSwap(i8* %15, i32 %16, i32 %17)
%19 = load i32, i32* %9
ret i32 %19
}

LLVM IR (-O2):
define i32 @xfread_LE(i8* %0, i32 %1, i32 %2, i32* nocapture %3) {
%5 = tail call i32 @fread(i8* %0, i32 %1, i32 %2, i32* %3)
%6 = tail call i32 @ByteSwap(i8* %0, i32 %1, i32 %5)
ret i32 %5
}
/* Variables and functions */
int ENODEV;
int sandbox_sdl_sync(void *lcd_base) { return -ENODEV; }


x86 assembly (clang, -O0):
<sandbox_sdl_sync>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sandbox_sdl_sync>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENODEV = global i32 0
define i32 @sandbox_sdl_sync(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @ENODEV
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@ENODEV = global i32 0
define i32 @sandbox_sdl_sync(i8* nocapture readnone %0) {
%2 = load i32, i32* @ENODEV
%3 = sub nsw i32 0, %2
ret i32 %3
}
int rcu_needs_cpu(int cpu) { return 0; }


x86 assembly (clang, -O0):
<rcu_needs_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_needs_cpu>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rcu_needs_cpu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @rcu_needs_cpu(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int const uint16_t;

/* Variables and functions */
uint16_t get_word(const uint8_t *base) { return (base[0] << 8) | base[1]; }


x86 assembly (clang, -O0):
<get_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_word>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_word(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_word(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = or i32 %3, %5
ret i32 %6
}
double mymul(double a, double b) { return a * b; }


x86 assembly (clang, -O0):
<mymul>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mymul>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @mymul(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @mymul(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_or_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_or_ps(__m128 A, __m128 B) { return _mm_or_ps(A, B); }


x86 assembly (clang, -O0):
<test_mm_or_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_or_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_or_ps>:
jmp    1030 <_mm_or_ps@plt>

LLVM IR (-O0):
define i32 @test_mm_or_ps(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_or_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_or_ps(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_or_ps(i32 %0, i32 %1)
ret i32 %3
}
int col_byte_uhc_2(int col) {
  return (col >= 0x34 ? 0x4d : col >= 0x1a ? 0x47 : 0x41) + col;
}


x86 assembly (clang, -O0):
<col_byte_uhc_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x34,-0x4(%rbp)
jl     111e <col_byte_uhc_2+0x1e>
mov    $0x4d,%eax
mov    %eax,-0x8(%rbp)
jmp    1134 <col_byte_uhc_2+0x34>
mov    -0x4(%rbp),%edx
mov    $0x41,%eax
mov    $0x47,%ecx
cmp    $0x1a,%edx
cmovge %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<col_byte_uhc_2>:
cmp    $0x1a,%edi
mov    $0x47,%eax
mov    $0x41,%ecx
cmovge %eax,%ecx
cmp    $0x34,%edi
mov    $0x4d,%eax
cmovl  %ecx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @col_byte_uhc_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 52
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 26
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 71, i32 65
br label %11
11: ; preds = %6, %5
%12 = phi i32 [ 77, %5 ], [ %10, %6 ]
%13 = load i32, i32* %2
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @col_byte_uhc_2(i32 %0) {
%2 = icmp sgt i32 %0, 51
%3 = icmp sgt i32 %0, 25
%4 = select i1 %3, i32 71, i32 65
%5 = select i1 %2, i32 77, i32 %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
void ls_costN_nm6_incref(void) {}


x86 assembly (clang, -O0):
<ls_costN_nm6_incref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm6_incref>:
ret

LLVM IR (-O0):
define void @ls_costN_nm6_incref() {
ret void
}

LLVM IR (-O2):
define void @ls_costN_nm6_incref() {
ret void
}
__attribute__((always_)) void __attribute__((format(printf, 1, 2)))
__trash__(const char *msg, ...) {
  (void)(msg);
}


x86 assembly (clang, -O0):
<__trash__>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__trash__>:
ret

LLVM IR (-O0):
define void @__trash__(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @__trash__(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
scalar_t__ pow(int, int);
int printf(char *, int);
int scanf(char *, int *);
int main(int n) { return scanf("%d", &n), 0 * printf("%d", (int)pow(2, n)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
lea    0xeb7(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
mov    $0x2,%edi
call   1050 <pow@plt>
mov    %eax,%esi
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
imul   $0x0,%eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,0xc(%rsp)
lea    0xec0(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
mov    $0x2,%edi
call   1050 <pow@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
store i32 %0, i32* %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%5 = load i32, i32* %3
%6 = call i64 @pow(i32 2, i32 %5)
%7 = trunc i64 %6 to i32
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = mul nsw i32 0, %8
ret i32 %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i64 @pow(i32 2, i32 %4)
%6 = trunc i64 %5 to i32
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(int argc, char const *argv[]) {
  int true_val, false_val;
  true_val = (10 > 2);
  false_val = (10 == 2);
  printf("true = %d; false = %d \n", true_val, false_val);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"true = %d; false = %d \0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [24 x i8] c"true = %d; false = %d \0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 1, i32 0)
ret i32 0
}
int eq(int x) { return x == 0; }


x86 assembly (clang, -O0):
<eq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eq>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @eq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @eq(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printSentence();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int main() {
  srand(time(NULL));
  printSentence();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <printSentence@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <printSentence@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @time(i32* null)
%3 = call i32 @srand(i32 %2)
%4 = call i32 (...) @printSentence()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @printSentence()
ret i32 0
}
unsigned kol_event_wait_time(unsigned time) {
  asm volatile("int $0x40" ::"a"(23), "b"(time));
}


x86 assembly (clang, -O0):
<kol_event_wait_time>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0x10(%rbp)
mov    -0x10(%rbp),%ebx
mov    $0x17,%eax
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_event_wait_time>:
push   %rbx
mov    %edi,%ebx
mov    $0x17,%eax
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_event_wait_time(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @kol_event_wait_time(i32 %0) {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 23, i32 %0)
ret i32 undef
}
/* Variables and functions */
size_t strnlen(const char *s, size_t mlen) {
  size_t i;
  for (i = 0; s[i] && (i < mlen); i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x19(%rbp)
je     113c <strnlen+0x3c>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
setb   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    114c <strnlen+0x4c>
jmp    1162 <strnlen+0x62>
jmp    1151 <strnlen+0x51>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strnlen+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    0x1(%rcx),%rax
cmpb   $0x0,(%rdi,%rcx,1)
je     1122 <strnlen+0x22>
cmp    %rsi,%rcx
mov    %rax,%rcx
jb     1110 <strnlen+0x10>
add    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @strnlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %3
%8 = load i64, i64* %5
%9 = getelementptr inbounds i8, i8* %7, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %6
%14 = load i64, i64* %5
%15 = load i64, i64* %4
%16 = icmp ult i64 %14, %15
br label %17
17: ; preds = %13, %6
%18 = phi i1 [ false, %6 ], [ %16, %13 ]
br i1 %18, label %19, label %23
19: ; preds = %17
br label %20
20: ; preds = %19
%21 = load i64, i64* %5
%22 = add i64 %21, 1
store i64 %22, i64* %5
br label %6
23: ; preds = %17
%24 = load i64, i64* %5
ret i64 %24
}

LLVM IR (-O2):
define i64 @strnlen(i8* nocapture %0, i64 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ 0, %2 ], [ %10, %3 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
%8 = icmp ult i64 %4, %1
%9 = select i1 %7, i1 %8, i1 false
%10 = add nuw i64 %4, 1
br i1 %9, label %3, label %11
11: ; preds = %3
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int x = 0;
  printf("Please enter an even number.\n");
  scanf("%d", &x);
  assert(x % 2 == 0 && "ERROR: Input number is NOT even. Program terminated.");
  printf("Okay\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
lea    0xec5(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x9(%rbp)
jne    1185 <main+0x55>
mov    $0x1,%al
mov    %al,-0x9(%rbp)
jmp    1185 <main+0x55>
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec3(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb4(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
not    %edi
and    $0x1,%edi
call   1040 <assert@plt>
lea    0xeb5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"Please enter an even number.\0A\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [53 x i8] c"ERROR: Input number is NOT even. Program terminated.\00"
@.str.3 = [6 x i8] c"Okay\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
br label %9
9: ; preds = %8, %0
%10 = phi i1 [ false, %0 ], [ true, %8 ]
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@str = [29 x i8] c"Please enter an even number.\00"
@str.4 = [5 x i8] c"Okay\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = and i32 %5, 1
%7 = xor i32 %6, 1
%8 = call i32 @assert(i32 %7)
%9 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str.4, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(float *, int, int, int /*<<< orphan*/ *);
void write_float(float *fl, FILE *f) { fwrite(fl, sizeof(float), 1, f); }


x86 assembly (clang, -O0):
<write_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_float>:
mov    %rsi,%rcx
mov    $0x4,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define void @write_float(float* %0, i32* %1) {
%3 = alloca float*
%4 = alloca i32*
store float* %0, float** %3
store i32* %1, i32** %4
%5 = load float*, float** %3
%6 = load i32*, i32** %4
%7 = call i32 @fwrite(float* %5, i32 4, i32 1, i32* %6)
ret void
}

LLVM IR (-O2):
define void @write_float(float* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fwrite(float* %0, i32 4, i32 1, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void move_cursor_to(int c, int r) { printf("\033[%d;%dH", r, c); }


x86 assembly (clang, -O0):
<move_cursor_to>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_cursor_to>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"\1B[%d;%dH\00"
define void @move_cursor_to(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"\1B[%d;%dH\00"
define void @move_cursor_to(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
ret void
}
void ScaleARGBRowDown2Box_Any_NEON() {}


x86 assembly (clang, -O0):
<ScaleARGBRowDown2Box_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleARGBRowDown2Box_Any_NEON>:
ret

LLVM IR (-O0):
define void @ScaleARGBRowDown2Box_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @ScaleARGBRowDown2Box_Any_NEON() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
void alloc(int *a) { a = (int *)malloc(sizeof(int) * 100); }


x86 assembly (clang, -O0):
<alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x190,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc>:
mov    $0x190,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @alloc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i64 @malloc(i32 400)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
ret void
}

LLVM IR (-O2):
define void @alloc(i32* nocapture readnone %0) {
%2 = tail call i64 @malloc(i32 400)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void main() {
  char string[] = "I love China!";
  printf("%s\n", string);
  printf("%c\n", *(string + 3));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0xe(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x6(%rbp)
mov    0xed9(%rip),%ax
mov    %ax,-0x2(%rbp)
lea    -0xe(%rbp),%rsi
lea    0xecc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movsbl -0xb(%rbp),%esi
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0x21616e69684320,%rax
mov    %rax,0xe(%rsp)
movabs $0x432065766f6c2049,%rax
65 20 43
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1030 <puts@plt>
lea    0xebb(%rip),%rdi
mov    $0x6f,%esi
xor    %eax,%eax
add    $0x18,%rsp
jmp    1040 <printf@plt>

LLVM IR (-O0):
@__const.main.string = [14 x i8] c"I love China!\00"
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [4 x i8] c"%c\0A\00"
define void @main() {
%1 = alloca [14 x i8]
%2 = bitcast [14 x i8]* %1 to i8*
%3 = getelementptr inbounds [14 x i8], [14 x i8]* %1, i64 0, i64 0
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [14 x i8], [14 x i8]* %1, i64 0, i64 0
%6 = getelementptr inbounds i8, i8* %5, i64 3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@__const.main.string = [14 x i8] c"I love China!\00"
@.str.1 = [4 x i8] c"%c\0A\00"
define void @main() {
%1 = alloca [14 x i8]
%2 = getelementptr inbounds [14 x i8], [14 x i8]* %1, i64 0, i64 0
%3 = call i32 @puts(i8* %2)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 111)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x42_setup() {
  char cmd[256];
  sprintf(cmd,
          "iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x42_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x42_setup>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x42_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x42_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_rdctl(int);
uint32_t _Nios2_Get_ctlreg_config(void) {
  return (uint32_t)__builtin_rdctl(13);
}


x86 assembly (clang, -O0):
<_Nios2_Get_ctlreg_config>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd,%edi
call   1030 <__builtin_rdctl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_Get_ctlreg_config>:
mov    $0xd,%edi
jmp    1030 <__builtin_rdctl@plt>

LLVM IR (-O0):
define i32 @_Nios2_Get_ctlreg_config() {
%1 = call i32 @__builtin_rdctl(i32 13)
ret i32 %1
}

LLVM IR (-O2):
define i32 @_Nios2_Get_ctlreg_config() {
%1 = tail call i32 @__builtin_rdctl(i32 13)
ret i32 %1
}
void call1a(unsigned char uc, unsigned short us, unsigned int ui,
            unsigned long ul) {
  uc = 5;
  us = 6;
  ui = 7;
  ul = 8;
}


x86 assembly (clang, -O0):
<call1a>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    %rcx,-0x10(%rbp)
movb   $0x5,-0x1(%rbp)
movw   $0x6,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
movq   $0x8,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<call1a>:
ret

LLVM IR (-O0):
define void @call1a(i8 zeroext %0, i16 zeroext %1, i32 %2, i64 %3) {
%5 = alloca i8
%6 = alloca i16
%7 = alloca i32
%8 = alloca i64
store i8 %0, i8* %5
store i16 %1, i16* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
store i8 5, i8* %5
store i16 6, i16* %6
store i32 7, i32* %7
store i64 8, i64* %8
ret void
}

LLVM IR (-O2):
define void @call1a(i8 zeroext %0, i16 zeroext %1, i32 %2, i64 %3) {
ret void
}
/* Variables and functions */
int test_or(int, int, int);
int main() { return test_or(9, -5, 3); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x9,%edi
mov    $0xfffffffb,%esi
mov    $0x3,%edx
call   1030 <test_or@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x9,%edi
mov    $0xfffffffb,%esi
mov    $0x3,%edx
jmp    1030 <test_or@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test_or(i32 9, i32 -5, i32 3)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test_or(i32 9, i32 -5, i32 3)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void test(void) { printf("I'm in test2.c\n"); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"I'm in test2.c\0A\00"
define void @test() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [15 x i8] c"I'm in test2.c\00"
define void @test() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret void
}
void fd152(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  a:
    goto a;
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd152>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd152+0x7>

x86 assembly (clang, -O2):
<fd152>:
jmp    1100 <fd152>

LLVM IR (-O0):
define void @fd152(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; preds = %27
br label %27
28: ; No predecessors!
%29 = load i32, i32* %2
%30 = zext i32 %29 to i64
br label %31
31: ; preds = %31, %28
br label %31
32: ; preds = %32
br label %32
33: ; No predecessors!
%34 = load i32, i32* %2
%35 = zext i32 %34 to i64
br label %36
36: ; preds = %36, %33
br label %36
37: ; preds = %37
br label %37
38: ; No predecessors!
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
br label %41
41: ; preds = %41, %38
br label %41
42: ; preds = %42
br label %42
43: ; No predecessors!
%44 = load i32, i32* %2
%45 = zext i32 %44 to i64
br label %46
46: ; preds = %46, %43
br label %46
47: ; preds = %47
br label %47
}

LLVM IR (-O2):
define void @fd152(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ parallel_clr_dav(int);
int /*<<< orphan*/ parallel_set_dav(int);
void parallel_drv0_set_dav(unsigned char val) {
  if (val) {
    parallel_set_dav(0x04);
  } else {
    parallel_clr_dav(~0x04);
  }
}


x86 assembly (clang, -O0):
<parallel_drv0_set_dav>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1147 <parallel_drv0_set_dav+0x27>
mov    $0x4,%edi
call   1040 <parallel_set_dav@plt>
jmp    1151 <parallel_drv0_set_dav+0x31>
mov    $0xfffffffb,%edi
call   1030 <parallel_clr_dav@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_drv0_set_dav>:
test   %edi,%edi
je     112e <parallel_drv0_set_dav+0xe>
mov    $0x4,%edi
jmp    1040 <parallel_set_dav@plt>
mov    $0xfffffffb,%edi
jmp    1030 <parallel_clr_dav@plt>

LLVM IR (-O0):
define void @parallel_drv0_set_dav(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @parallel_set_dav(i32 4)
br label %9
7: ; preds = %1
%8 = call i32 @parallel_clr_dav(i32 -5)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @parallel_drv0_set_dav(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @parallel_set_dav(i32 4)
br label %7
5: ; preds = %1
%6 = tail call i32 @parallel_clr_dav(i32 -5)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
char isdigit(char c) { return ((c >= '0') && (c <= '9')); }


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isdigit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define signext i8 @isdigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
%13 = trunc i32 %12 to i8
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @isdigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i8
ret i8 %4
}
int get_char_size() {
  unsigned char c = ~0;
  int i = 0;
  do {
    ++i;
    c ^= 1;
    c >>= 1;
  } while (c);
  return i;
}


x86 assembly (clang, -O0):
<get_char_size>:
push   %rbp
mov    %rsp,%rbp
movb   $0xff,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
xor    $0x1,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x1,%eax
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
jne    110f <get_char_size+0xf>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_char_size>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @get_char_size() {
%1 = alloca i8
%2 = alloca i32
store i8 -1, i8* %1
store i32 0, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = load i8, i8* %1
%7 = zext i8 %6 to i32
%8 = xor i32 %7, 1
%9 = trunc i32 %8 to i8
store i8 %9, i8* %1
%10 = load i8, i8* %1
%11 = zext i8 %10 to i32
%12 = ashr i32 %11, 1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %1
br label %14
14: ; preds = %3
%15 = load i8, i8* %1
%16 = icmp ne i8 %15, 0
br i1 %16, label %3, label %17
17: ; preds = %14
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @get_char_size() {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ block_signals();
void arch_local_irq_disable(void) { block_signals(); }


x86 assembly (clang, -O0):
<arch_local_irq_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <block_signals@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_local_irq_disable>:
xor    %eax,%eax
jmp    1030 <block_signals@plt>

LLVM IR (-O0):
define void @arch_local_irq_disable() {
%1 = call i32 (...) @block_signals()
ret void
}

LLVM IR (-O2):
define void @arch_local_irq_disable() {
%1 = tail call i32 (...) @block_signals()
ret void
}
/* Variables and functions */
scalar_t__ isprime(int);
int bigger_prime(int m) {
  int i;
  for (i = m;; i++) {
    if (isprime(i)) {
      return i;
    }
  }
}


x86 assembly (clang, -O0):
<bigger_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isprime@plt>
cmp    $0x0,%rax
je     113c <bigger_prime+0x2c>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret
jmp    1141 <bigger_prime+0x31>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1121 <bigger_prime+0x11>

x86 assembly (clang, -O2):
<bigger_prime>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <isprime@plt>
add    $0x1,%ebx
test   %rax,%rax
je     1120 <bigger_prime+0x10>
add    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bigger_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %3
%7 = call i64 @isprime(i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = load i32, i32* %3
ret i32 %10
11: ; preds = %5
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
}

LLVM IR (-O2):
define i32 @bigger_prime(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %6, %2 ]
%4 = tail call i64 @isprime(i32 %3)
%5 = icmp eq i64 %4, 0
%6 = add nsw i32 %3, 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ htole64(int /*<<< orphan*/);
int xdf_write_uint64(FILE *out, uint64_t val) {
  val = htole64(val);
  if (fwrite(&val, sizeof(val), 1, out) != 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<xdf_write_uint64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <htole64@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
cmp    $0x1,%eax
je     1166 <xdf_write_uint64+0x46>
movl   $0x1,-0x4(%rbp)
jmp    116d <xdf_write_uint64+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdf_write_uint64>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <htole64@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @xdf_write_uint64(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = call i32 @htole64(i32 %6)
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = call i32 @fwrite(i32* %5, i32 4, i32 1, i32* %8)
%10 = icmp ne i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %13
12: ; preds = %2
store i32 0, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @xdf_write_uint64(i32* nocapture %0, i32 %1) {
%3 = alloca i32
%4 = tail call i32 @htole64(i32 %1)
store i32 %4, i32* %3
%5 = call i32 @fwrite(i32* %3, i32 4, i32 1, i32* %0)
%6 = icmp ne i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}
int test_imm_11int16_reg(short val) {
  return ((val) & (0x11 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_11int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x11,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_11int16_reg>:
test   $0x11,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_11int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 17
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_11int16_reg(i16 signext %0) {
%2 = and i16 %0, 17
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
short FunFunc(long long x, char z) { return x + z; }


x86 assembly (clang, -O0):
<FunFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbq -0x9(%rbp),%rcx
add    %rcx,%rax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<FunFunc>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define signext i16 @FunFunc(i64 %0, i8 signext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = load i8, i8* %4
%7 = sext i8 %6 to i64
%8 = add nsw i64 %5, %7
%9 = trunc i64 %8 to i16
ret i16 %9
}

LLVM IR (-O2):
define signext i16 @FunFunc(i64 %0, i8 signext %1) {
%3 = sext i8 %1 to i64
%4 = add nsw i64 %3, %0
%5 = trunc i64 %4 to i16
ret i16 %5
}
/* Variables and functions */
int /*<<< orphan*/ test_daemon();
int /*<<< orphan*/ test_init(int, char **);
int /*<<< orphan*/ test_msg(char *);
int /*<<< orphan*/ test_waitsig();
int main(int argc, char **argv) {
  test_init(argc, argv);
  test_msg("Skipping test on incompatible kernel");
  test_daemon();
  test_waitsig();
  test_msg("PASS\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <test_init@plt>
lea    0xe97(%rip),%rdi
call   1050 <test_msg@plt>
mov    $0x0,%al
call   1040 <test_daemon@plt>
mov    $0x0,%al
call   1060 <test_waitsig@plt>
lea    0xea2(%rip),%rdi
call   1050 <test_msg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <test_init@plt>
lea    0xeb3(%rip),%rdi
call   1050 <test_msg@plt>
xor    %eax,%eax
call   1040 <test_daemon@plt>
xor    %eax,%eax
call   1060 <test_waitsig@plt>
lea    0xebe(%rip),%rdi
call   1050 <test_msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"Skipping test on incompatible kernel\00"
@.str.1 = [6 x i8] c"PASS\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @test_init(i32 %6, i8** %7)
%9 = call i32 @test_msg(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%10 = call i32 (...) @test_daemon()
%11 = call i32 (...) @test_waitsig()
%12 = call i32 @test_msg(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [37 x i8] c"Skipping test on incompatible kernel\00"
@.str.1 = [6 x i8] c"PASS\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @test_init(i32 %0, i8** %1)
%4 = tail call i32 @test_msg(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 (...) @test_daemon()
%6 = tail call i32 (...) @test_waitsig()
%7 = tail call i32 @test_msg(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}