xunge/DecIR huggingface dataset:
/* Variables and functions */
int input();
int /*<<< orphan*/ unput(int);
int peek(void) {
  int c = input();
  unput(c);
  return c;
}


x86 assembly (clang, -O0):
<peek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <input@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <unput@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<peek>:
push   %rbx
xor    %eax,%eax
call   1030 <input@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1040 <unput@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @peek() {
%1 = alloca i32
%2 = call i32 (...) @input()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @unput(i32 %3)
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @peek() {
%1 = tail call i32 (...) @input()
%2 = tail call i32 @unput(i32 %1)
ret i32 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void ComparatorIntRegister(uint32_t ui32Base, uint32_t ui32Comp,
                           void (*pfnHandler)(void)) {
  ;
  ;
  IntRegister(41 + ui32Comp, pfnHandler);
  IntEnable(41 + ui32Comp);
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) |= 1 << ui32Comp;
}


x86 assembly (clang, -O0):
<ComparatorIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%edi
add    $0x29,%edi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x8(%rbp),%edi
add    $0x29,%edi
call   1030 <IntEnable@plt>
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ComparatorIntRegister>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%r14d
lea    0x29(%rbx),%ebp
mov    %ebp,%edi
mov    %rdx,%rsi
call   1040 <IntRegister@plt>
mov    %ebp,%edi
call   1030 <IntEnable@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
movslq %r14d,%rcx
or     %eax,0x8(%rcx)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @ComparatorIntRegister(i32 %0, i32 %1, void ()* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca void ()*
store i32 %0, i32* %4
store i32 %1, i32* %5
store void ()* %2, void ()** %6
%7 = load i32, i32* %5
%8 = add nsw i32 41, %7
%9 = load void ()*, void ()** %6
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i32 %8, void (...)* %10)
%12 = load i32, i32* %5
%13 = add nsw i32 41, %12
%14 = call i32 @IntEnable(i32 %13)
%15 = load i32, i32* %5
%16 = shl i32 1, %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 8
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
%21 = load volatile i32, i32* %20
%22 = or i32 %21, %16
store volatile i32 %22, i32* %20
ret void
}

LLVM IR (-O2):
define void @ComparatorIntRegister(i32 %0, i32 %1, void ()* %2) {
%4 = add nsw i32 %1, 41
%5 = bitcast void ()* %2 to void (...)*
%6 = tail call i32 @IntRegister(i32 %4, void (...)* %5)
%7 = tail call i32 @IntEnable(i32 %4)
%8 = shl nuw i32 1, %1
%9 = add nsw i32 %0, 8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = or i32 %12, %8
store volatile i32 %13, i32* %11
ret void
}
/* Variables and functions */
char *strpbrk(char *, char *);
char *filespec_wild(char *filespec) { return strpbrk(filespec, "*?"); }


x86 assembly (clang, -O0):
<filespec_wild>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strpbrk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filespec_wild>:
lea    0xee9(%rip),%rsi
jmp    1030 <strpbrk@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"*?\00"
define i8* @filespec_wild(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strpbrk(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"*?\00"
define i8* @filespec_wild(i8* %0) {
%2 = tail call i8* @strpbrk(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
/* Type definitions */
struct apiState {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wfree(struct apiState *);
void eventDeinit(struct apiState *data) { wfree(data); }


x86 assembly (clang, -O0):
<eventDeinit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eventDeinit>:
jmp    1030 <wfree@plt>

LLVM IR (-O0):
%struct.apiState = type { i32 }
define void @eventDeinit(%struct.apiState* %0) {
%2 = alloca %struct.apiState*
store %struct.apiState* %0, %struct.apiState** %2
%3 = load %struct.apiState*, %struct.apiState** %2
%4 = call i32 @wfree(%struct.apiState* %3)
ret void
}

LLVM IR (-O2):
%struct.apiState = type { i32 }
define void @eventDeinit(%struct.apiState* %0) {
%2 = tail call i32 @wfree(%struct.apiState* %0)
ret void
}
__attribute__((noclone, no, noipa)) char *get_min_3(char *p, char *q) {
  return p < q ? p - 1 : q - 1;
}


x86 assembly (clang, -O0):
<get_min_3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    112b <get_min_3+0x2b>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    1137 <get_min_3+0x37>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_min_3>:
cmp    %rsi,%rdi
cmovb  %rdi,%rsi
lea    -0x1(%rsi),%rax
ret

LLVM IR (-O0):
define i8* @get_min_3(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ult i8* %5, %6
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 -1
br label %14
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 -1
br label %14
14: ; preds = %11, %8
%15 = phi i8* [ %10, %8 ], [ %13, %11 ]
ret i8* %15
}

LLVM IR (-O2):
define i8* @get_min_3(i8* readnone %0, i8* readnone %1) {
%3 = icmp ult i8* %0, %1
%4 = select i1 %3, i8* %0, i8* %1
%5 = getelementptr inbounds i8, i8* %4, i64 -1
ret i8* %5
}
const char *gt_(const char *str) {
  return str[0] == '\0' ? str : ((const char *)(str));
}


x86 assembly (clang, -O0):
<gt_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1125 <gt_+0x25>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112d <gt_+0x2d>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @gt_(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i8*, i8** %2
br label %12
10: ; preds = %1
%11 = load i8*, i8** %2
br label %12
12: ; preds = %10, %8
%13 = phi i8* [ %9, %8 ], [ %11, %10 ]
ret i8* %13
}

LLVM IR (-O2):
define i8* @gt_(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
int _poweroff_error(char const *message, int ret) {
  fputs("poweroff"
        ": ",
        stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_poweroff_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_poweroff_error>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [11 x i8] c"poweroff: \00"
@stderr = global i32 0
define i32 @_poweroff_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [11 x i8] c"poweroff: \00"
@stderr = global i32 0
define i32 @_poweroff_error(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
float LinMapping(int value_in, float min_out, float max_out) {
  if (value_in < 0) {
    value_in = 0;
  }
  if (value_in > 255) {
    value_in = 255;
  }
  return min_out + ((max_out - min_out) / 255.0f) * value_in;
}


x86 assembly (clang, -O0):
<LinMapping>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1122 <LinMapping+0x22>
movl   $0x0,-0x4(%rbp)
cmpl   $0xff,-0x4(%rbp)
jle    1136 <LinMapping+0x36>
movl   $0xff,-0x4(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  0xeb3(%rip),%xmm2
divss  %xmm2,%xmm0
cvtsi2ssl -0x4(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<LinMapping>:
xor    %eax,%eax
test   %edi,%edi
cmovns %edi,%eax
cmp    $0xff,%eax
mov    $0xff,%ecx
cmovb  %eax,%ecx
subss  %xmm0,%xmm1
cvtsi2ss %ecx,%xmm2
divss  0xedc(%rip),%xmm1
mulss  %xmm1,%xmm2
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @LinMapping(i32 %0, float %1, float %2) {
%4 = alloca i32
%5 = alloca float
%6 = alloca float
store i32 %0, i32* %4
store float %1, float* %5
store float %2, float* %6
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %3
store i32 0, i32* %4
br label %10
10: ; preds = %9, %3
%11 = load i32, i32* %4
%12 = icmp sgt i32 %11, 255
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 255, i32* %4
br label %14
14: ; preds = %13, %10
%15 = load float, float* %5
%16 = load float, float* %6
%17 = load float, float* %5
%18 = fsub float %16, %17
%19 = fdiv float %18, 2.550000e+02
%20 = load i32, i32* %4
%21 = sitofp i32 %20 to float
%22 = call float @llvm.fmuladd.f32(float %19, float %21, float %15)
ret float %22
}

LLVM IR (-O2):
define float @LinMapping(i32 %0, float %1, float %2) {
%4 = icmp sgt i32 %0, 0
%5 = select i1 %4, i32 %0, i32 0
%6 = icmp ult i32 %5, 255
%7 = select i1 %6, i32 %5, i32 255
%8 = fsub float %2, %1
%9 = fdiv float %8, 2.550000e+02
%10 = sitofp i32 %7 to float
%11 = tail call float @llvm.fmuladd.f32(float %9, float %10, float %1)
ret float %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_array(int *array, int array_size) {
  int i;
  for (i = 0; i < array_size; i++) {
    printf("%d ", array[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <print_array+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_array+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <print_array+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print_array+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_array(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print_array(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
void da_init(int *cur, int *max, void ***array) {
  *cur = 0;
  *max = 0;
  *array = NULL;
  return;
}


x86 assembly (clang, -O0):
<da_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<da_init>:
movl   $0x0,(%rdi)
movl   $0x0,(%rsi)
movq   $0x0,(%rdx)
ret

LLVM IR (-O0):
define void @da_init(i32* %0, i32* %1, i8*** %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8***
store i32* %0, i32** %4
store i32* %1, i32** %5
store i8*** %2, i8**** %6
%7 = load i32*, i32** %4
store i32 0, i32* %7
%8 = load i32*, i32** %5
store i32 0, i32* %8
%9 = load i8***, i8**** %6
store i8** null, i8*** %9
ret void
}

LLVM IR (-O2):
define void @da_init(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i8*** nocapture writeonly %2) {
store i32 0, i32* %0
store i32 0, i32* %1
store i8** null, i8*** %2
ret void
}
/* Type definitions */
struct jx {
  int dummy;
};

/* Variables and functions */
struct jx *jx_lookup_guard(struct jx *, char const *, int /*<<< orphan*/ *);
struct jx *jx_lookup(struct jx *j, const char *key) {
  return jx_lookup_guard(j, key, NULL);
}


x86 assembly (clang, -O0):
<jx_lookup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <jx_lookup_guard@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jx_lookup>:
xor    %edx,%edx
jmp    1030 <jx_lookup_guard@plt>

LLVM IR (-O0):
%struct.jx = type { i32 }
define %struct.jx* @jx_lookup(%struct.jx* %0, i8* %1) {
%3 = alloca %struct.jx*
%4 = alloca i8*
store %struct.jx* %0, %struct.jx** %3
store i8* %1, i8** %4
%5 = load %struct.jx*, %struct.jx** %3
%6 = load i8*, i8** %4
%7 = call %struct.jx* @jx_lookup_guard(%struct.jx* %5, i8* %6, i32* null)
ret %struct.jx* %7
}

LLVM IR (-O2):
%struct.jx = type { i32 }
define %struct.jx* @jx_lookup(%struct.jx* %0, i8* %1) {
%3 = tail call %struct.jx* @jx_lookup_guard(%struct.jx* %0, i8* %1, i32* null)
ret %struct.jx* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int cTools_mutexTrylock(uint32_t mutexId) {
  mutexId = mutexId;
  return 0;
}


x86 assembly (clang, -O0):
<cTools_mutexTrylock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cTools_mutexTrylock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cTools_mutexTrylock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @cTools_mutexTrylock(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int uint32cpy(void *o1, void *o2) {
  uint32_t *u1, *u2;
  u1 = (uint32_t *)o1;
  u2 = (uint32_t *)o2;
  *u1 = *u2;
  return 0;
}


x86 assembly (clang, -O0):
<uint32cpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint32cpy>:
mov    (%rsi),%eax
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @uint32cpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = load i32*, i32** %5
store i32 %12, i32* %13
ret i32 0
}

LLVM IR (-O2):
define i32 @uint32cpy(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %4
store i32 %5, i32* %3
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WsfCsEnter();
void WsfTaskLock(void) { WsfCsEnter(); }


x86 assembly (clang, -O0):
<WsfTaskLock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WsfCsEnter@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WsfTaskLock>:
xor    %eax,%eax
jmp    1030 <WsfCsEnter@plt>

LLVM IR (-O0):
define void @WsfTaskLock() {
%1 = call i32 (...) @WsfCsEnter()
ret void
}

LLVM IR (-O2):
define void @WsfTaskLock() {
%1 = tail call i32 (...) @WsfCsEnter()
ret void
}
void prepare_boundary_on_device_(long *Mesh_pointer) {}


x86 assembly (clang, -O0):
<prepare_boundary_on_device_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prepare_boundary_on_device_>:
ret

LLVM IR (-O0):
define void @prepare_boundary_on_device_(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
ret void
}

LLVM IR (-O2):
define void @prepare_boundary_on_device_(i64* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned char, int);
void sprint_mov_direct_to_Rn(char *str, unsigned char n, uint8_t direct) {
  sprintf(str,
          "MOV   R%X, "
          "0x%02X"
          "                  ",
          n, direct);
}


x86 assembly (clang, -O0):
<sprint_mov_direct_to_Rn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%al
mov    -0x10(%rbp),%ecx
lea    0xeca(%rip),%rsi
movzbl %al,%edx
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_mov_direct_to_Rn>:
mov    %edx,%ecx
mov    %esi,%edx
lea    0xee5(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"MOV R%X, 0x%02X \00"
define void @sprint_mov_direct_to_Rn(i8* %0, i8 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8, i8* %5
%9 = load i32, i32* %6
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8 zeroext %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"MOV R%X, 0x%02X \00"
define void @sprint_mov_direct_to_Rn(i8* nocapture writeonly %0, i8 zeroext %1, i32 %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8 zeroext %1, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t chip_gpio_get_value(uint8_t which) { return 0; }


x86 assembly (clang, -O0):
<chip_gpio_get_value>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chip_gpio_get_value>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @chip_gpio_get_value(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @chip_gpio_get_value(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SHAMD5IntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(0x44030000 + 0x00000810))) &=
      ~((ui32IntFlags & 0x00070000) >> 16);
  (*((volatile unsigned long *)(ui32Base + 0x0000011C))) |=
      ui32IntFlags & 0x0000ffff;
  (*((volatile unsigned long *)(ui32Base + 0x00000110))) |= 0x00000004;
}


x86 assembly (clang, -O0):
<SHAMD5IntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x70000,%eax
sar    $0x10,%eax
xor    $0xffffffff,%eax
cltq
mov    $0x44030810,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x44030810,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%eax
and    $0xffff,%eax
movslq %eax,%rdx
mov    -0x4(%rbp),%eax
add    $0x11c,%eax
cltq
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x110,%eax
cltq
mov    (%rax),%rcx
or     $0x4,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5IntEnable>:
movzwl %si,%eax
shr    $0x10,%esi
not    %esi
or     $0xfffffff8,%esi
movslq %esi,%rcx
and    %rcx,0x44030810
44
movslq %edi,%rcx
or     %rax,0x11c(%rcx)
orq    $0x4,0x110(%rcx)
04
ret

LLVM IR (-O0):
define void @SHAMD5IntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 458752
%7 = ashr i32 %6, 16
%8 = xor i32 %7, -1
%9 = sext i32 %8 to i64
%10 = load volatile i64, i64* inttoptr (i64 1141049360 to i64*)
%11 = and i64 %10, %9
store volatile i64 %11, i64* inttoptr (i64 1141049360 to i64*)
%12 = load i32, i32* %4
%13 = and i32 %12, 65535
%14 = sext i32 %13 to i64
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 284
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = or i64 %19, %14
store volatile i64 %20, i64* %18
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 272
%23 = sext i32 %22 to i64
%24 = inttoptr i64 %23 to i64*
%25 = load volatile i64, i64* %24
%26 = or i64 %25, 4
store volatile i64 %26, i64* %24
ret void
}

LLVM IR (-O2):
define void @SHAMD5IntEnable(i32 %0, i32 %1) {
%3 = lshr i32 %1, 16
%4 = and i32 %3, 7
%5 = xor i32 %4, -1
%6 = sext i32 %5 to i64
%7 = load volatile i64, i64* inttoptr (i64 1141049360 to i64*)
%8 = and i64 %7, %6
store volatile i64 %8, i64* inttoptr (i64 1141049360 to i64*)
%9 = and i32 %1, 65535
%10 = zext i32 %9 to i64
%11 = add nsw i32 %0, 284
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
%16 = add nsw i32 %0, 272
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = or i64 %19, 4
store volatile i64 %20, i64* %18
ret void
}
/* Variables and functions */
int /*<<< orphan*/ update(int);
upscreen(int f, int n) {
  update(1);
  return (1);
}


x86 assembly (clang, -O0):
<upscreen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <update@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<upscreen>:
push   %rax
mov    $0x1,%edi
call   1030 <update@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @upscreen(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @update(i32 1)
ret i32 1
}

LLVM IR (-O2):
define i32 @upscreen(i32 %0, i32 %1) {
%3 = tail call i32 @update(i32 1)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(void *, int, size_t, int /*<<< orphan*/ *);
size_t openmpt_stream_file_read_func(void *stream, void *dst, size_t bytes) {
  FILE *f = 0;
  size_t retval = 0;
  f = (FILE *)stream;
  if (!f) {
    return 0;
  }
  retval = fread(dst, 1, bytes, f);
  if (retval <= 0) {
    return 0;
  }
  return retval;
}


x86 assembly (clang, -O0):
<openmpt_stream_file_read_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
movq   $0x0,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    1154 <openmpt_stream_file_read_func+0x44>
movq   $0x0,-0x8(%rbp)
jmp    118e <openmpt_stream_file_read_func+0x7e>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fread@plt>
mov    %rax,-0x30(%rbp)
cmpq   $0x0,-0x30(%rbp)
ja     1186 <openmpt_stream_file_read_func+0x76>
movq   $0x0,-0x8(%rbp)
jmp    118e <openmpt_stream_file_read_func+0x7e>
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openmpt_stream_file_read_func>:
test   %rdi,%rdi
je     1125 <openmpt_stream_file_read_func+0x15>
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fread@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @openmpt_stream_file_read_func(i8* %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32* null, i32** %8
store i64 0, i64* %9
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %8
%12 = load i32*, i32** %8
%13 = icmp ne i32* %12, null
br i1 %13, label %15, label %14
14: ; preds = %3
store i64 0, i64* %4
br label %25
15: ; preds = %3
%16 = load i8*, i8** %6
%17 = load i64, i64* %7
%18 = load i32*, i32** %8
%19 = call i64 @fread(i8* %16, i32 1, i64 %17, i32* %18)
store i64 %19, i64* %9
%20 = load i64, i64* %9
%21 = icmp ule i64 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %15
store i64 0, i64* %4
br label %25
23: ; preds = %15
%24 = load i64, i64* %9
store i64 %24, i64* %4
br label %25
25: ; preds = %23, %22, %14
%26 = load i64, i64* %4
ret i64 %26
}

LLVM IR (-O2):
define i64 @openmpt_stream_file_read_func(i8* %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = bitcast i8* %0 to i32*
%7 = tail call i64 @fread(i8* %1, i32 1, i64 %2, i32* %6)
br label %8
8: ; preds = %5, %3
%9 = phi i64 [ 0, %3 ], [ %7, %5 ]
ret i64 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ cel_bobJenkins_hash32(char const *, int /*<<< orphan*/, int);
int /*<<< orphan*/ strlen(char const *);
extern uint32_t cel_bobJenkins32_hash(const char *str) {
  return cel_bobJenkins_hash32(str, strlen(str), 0x00);
}


x86 assembly (clang, -O0):
<cel_bobJenkins32_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
xor    %edx,%edx
call   1040 <cel_bobJenkins_hash32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cel_bobJenkins32_hash>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
xor    %edx,%edx
pop    %rbx
jmp    1040 <cel_bobJenkins_hash32@plt>

LLVM IR (-O0):
define i32 @cel_bobJenkins32_hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @cel_bobJenkins_hash32(i8* %3, i32 %5, i32 0)
ret i32 %6
}

LLVM IR (-O2):
define i32 @cel_bobJenkins32_hash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @cel_bobJenkins_hash32(i8* %0, i32 %2, i32 0)
ret i32 %3
}
int ft_n_count(long int n, int i) {
  while (n > 9 || n < 0) {
    i++;
    n /= 10;
  }
  return (i);
}


x86 assembly (clang, -O0):
<ft_n_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%al
cmpq   $0x9,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jg     1126 <ft_n_count+0x26>
cmpq   $0x0,-0x8(%rbp)
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1136 <ft_n_count+0x36>
jmp    1156 <ft_n_count+0x56>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
jmp    110b <ft_n_count+0xb>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_n_count>:
cmp    $0xa,%rdi
jb     113d <ft_n_count+0x3d>
mov    %rdi,%rdx
movabs $0x6666666666666667,%rcx
66 66 66
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0x1,%esi
mov    %rdx,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
cmp    $0x9,%rdx
ja     1120 <ft_n_count+0x20>
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @ft_n_count(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %13, %2
%6 = load i64, i64* %3
%7 = icmp sgt i64 %6, 9
br i1 %7, label %11, label %8
8: ; preds = %5
%9 = load i64, i64* %3
%10 = icmp slt i64 %9, 0
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ true, %5 ], [ %10, %8 ]
br i1 %12, label %13, label %18
13: ; preds = %11
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
%16 = load i64, i64* %3
%17 = sdiv i64 %16, 10
store i64 %17, i64* %3
br label %5
18: ; preds = %11
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @ft_n_count(i64 %0, i32 %1) {
%3 = icmp ugt i64 %0, 9
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i64 [ %8, %4 ], [ %0, %2 ]
%7 = add nsw i32 %5, 1
%8 = sdiv i64 %6, 10
%9 = icmp ugt i64 %8, 9
br i1 %9, label %4, label %10
10: ; preds = %4, %2
%11 = phi i32 [ %1, %2 ], [ %7, %4 ]
ret i32 %11
}
void comedi_proc_init(void) {}


x86 assembly (clang, -O0):
<comedi_proc_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comedi_proc_init>:
ret

LLVM IR (-O0):
define void @comedi_proc_init() {
ret void
}

LLVM IR (-O2):
define void @comedi_proc_init() {
ret void
}
void RTReqWait(void) {}


x86 assembly (clang, -O0):
<RTReqWait>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTReqWait>:
ret

LLVM IR (-O0):
define void @RTReqWait() {
ret void
}

LLVM IR (-O2):
define void @RTReqWait() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flockfile(int /*<<< orphan*/);
int /*<<< orphan*/ funlockfile(int /*<<< orphan*/);
int getc(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
getchar() {
  int ret;
  flockfile(stdin);
  ret = getc(stdin);
  funlockfile(stdin);
  return (ret);
}


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <flockfile@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1050 <getc@plt>
mov    %eax,-0x4(%rbp)
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
call   1030 <funlockfile@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
push   %r14
push   %rbx
push   %rax
mov    0x2ead(%rip),%r14
mov    (%r14),%edi
call   1040 <flockfile@plt>
mov    (%r14),%edi
call   1050 <getc@plt>
mov    %eax,%ebx
mov    (%r14),%edi
call   1030 <funlockfile@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @getchar() {
%1 = alloca i32
%2 = load i32, i32* @stdin
%3 = call i32 @flockfile(i32 %2)
%4 = load i32, i32* @stdin
%5 = call i32 @getc(i32 %4)
store i32 %5, i32* %1
%6 = load i32, i32* @stdin
%7 = call i32 @funlockfile(i32 %6)
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @getchar() {
%1 = load i32, i32* @stdin
%2 = tail call i32 @flockfile(i32 %1)
%3 = load i32, i32* @stdin
%4 = tail call i32 @getc(i32 %3)
%5 = load i32, i32* @stdin
%6 = tail call i32 @funlockfile(i32 %5)
ret i32 %4
}
int get_cycle_count_6800(unsigned short int opcode) { return -1; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @get_cycle_count_6800(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @get_cycle_count_6800(i16 zeroext %0) {
ret i32 -1
}
__attribute__((no)) void lib_crash(void) { *(volatile int *)1 = 1; }


x86 assembly (clang, -O0):
<lib_crash>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib_crash>:
movl   $0x1,0x1
ret

LLVM IR (-O0):
define void @lib_crash() {
store volatile i32 1, i32* inttoptr (i64 1 to i32*)
ret void
}

LLVM IR (-O2):
define void @lib_crash() {
store volatile i32 1, i32* inttoptr (i64 1 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ADC_DelSig_1_IRQ_Disable();
void ADC_DelSig_1_IRQ_Stop(void) { ADC_DelSig_1_IRQ_Disable(); }


x86 assembly (clang, -O0):
<ADC_DelSig_1_IRQ_Stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ADC_DelSig_1_IRQ_Disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_DelSig_1_IRQ_Stop>:
xor    %eax,%eax
jmp    1030 <ADC_DelSig_1_IRQ_Disable@plt>

LLVM IR (-O0):
define void @ADC_DelSig_1_IRQ_Stop() {
%1 = call i32 (...) @ADC_DelSig_1_IRQ_Disable()
ret void
}

LLVM IR (-O2):
define void @ADC_DelSig_1_IRQ_Stop() {
%1 = tail call i32 (...) @ADC_DelSig_1_IRQ_Disable()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ free(void *const);
void free_critbit_node(void *const ctx, void *const node) {
  assert(ctx == NULL);
  free(node);
}


x86 assembly (clang, -O0):
<free_critbit_node>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_critbit_node>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
mov    %eax,%edi
call   1040 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_critbit_node(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %4
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
define void @free_critbit_node(i8* readnone %0, i8* nocapture %1) {
%3 = icmp eq i8* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @free(i8* %1)
ret void
}
int evfilt_user_knote_delete(struct filter *filt, struct knote *kn) {
  return (0);
}


x86 assembly (clang, -O0):
<evfilt_user_knote_delete>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<evfilt_user_knote_delete>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.filter = type opaque
%struct.knote = type opaque
define i32 @evfilt_user_knote_delete(%struct.filter* %0, %struct.knote* %1) {
%3 = alloca %struct.filter*
%4 = alloca %struct.knote*
store %struct.filter* %0, %struct.filter** %3
store %struct.knote* %1, %struct.knote** %4
ret i32 0
}

LLVM IR (-O2):
%struct.filter = type opaque
%struct.knote = type opaque
define i32 @evfilt_user_knote_delete(%struct.filter* nocapture readnone %0, %struct.knote* nocapture readnone %1) {
ret i32 0
}
void Interp4(unsigned char *pc, int c1, int c2, int c3) {
  *((int *)pc) =
      ((((c1 & 0x00FF00) * 2 + ((c2 & 0x00FF00) + (c3 & 0x00FF00)) * 7) &
        0x000FF000) +
       (((c1 & 0xFF00FF) * 2 + ((c2 & 0xFF00FF) + (c3 & 0xFF00FF)) * 7) &
        0x0FF00FF0)) >>
      4;
}


x86 assembly (clang, -O0):
<Interp4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x1,%ecx
mov    -0x10(%rbp),%eax
and    $0xff00,%eax
mov    -0x14(%rbp),%edx
and    $0xff00,%edx
add    %edx,%eax
imul   $0x7,%eax,%eax
add    %eax,%ecx
and    $0xff000,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x1,%eax
mov    -0x10(%rbp),%edx
and    $0xff00ff,%edx
mov    -0x14(%rbp),%esi
and    $0xff00ff,%esi
add    %esi,%edx
imul   $0x7,%edx,%edx
add    %edx,%eax
and    $0xff00ff0,%eax
add    %eax,%ecx
sar    $0x4,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp4>:
add    %esi,%esi
mov    %esi,%r8d
and    $0x1fe00,%r8d
mov    %edx,%r9d
and    $0xff00,%r9d
mov    %ecx,%eax
and    $0xff00,%eax
add    %r9d,%eax
lea    0x0(,%rax,8),%r9d
sub    %eax,%r9d
add    %r8d,%r9d
and    $0xff000,%r9d
and    $0x1fe01fe,%esi
and    $0xff00ff,%edx
and    $0xff00ff,%ecx
add    %edx,%ecx
lea    0x0(,%rcx,8),%eax
sub    %ecx,%eax
add    %esi,%eax
and    $0xff00ff0,%eax
or     %r9d,%eax
shr    $0x4,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @Interp4(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = and i32 %9, 65280
%11 = mul nsw i32 %10, 2
%12 = load i32, i32* %7
%13 = and i32 %12, 65280
%14 = load i32, i32* %8
%15 = and i32 %14, 65280
%16 = add nsw i32 %13, %15
%17 = mul nsw i32 %16, 7
%18 = add nsw i32 %11, %17
%19 = and i32 %18, 1044480
%20 = load i32, i32* %6
%21 = and i32 %20, 16711935
%22 = mul nsw i32 %21, 2
%23 = load i32, i32* %7
%24 = and i32 %23, 16711935
%25 = load i32, i32* %8
%26 = and i32 %25, 16711935
%27 = add nsw i32 %24, %26
%28 = mul nsw i32 %27, 7
%29 = add nsw i32 %22, %28
%30 = and i32 %29, 267390960
%31 = add nsw i32 %19, %30
%32 = ashr i32 %31, 4
%33 = load i8*, i8** %5
%34 = bitcast i8* %33 to i32*
store i32 %32, i32* %34
ret void
}

LLVM IR (-O2):
define void @Interp4(i8* nocapture writeonly %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 1
%6 = and i32 %5, 130560
%7 = and i32 %2, 65280
%8 = and i32 %3, 65280
%9 = add nuw nsw i32 %8, %7
%10 = mul nuw nsw i32 %9, 7
%11 = add nuw nsw i32 %10, %6
%12 = and i32 %11, 1044480
%13 = and i32 %5, 33423870
%14 = and i32 %2, 16711935
%15 = and i32 %3, 16711935
%16 = add nuw nsw i32 %15, %14
%17 = mul nuw nsw i32 %16, 7
%18 = add nuw nsw i32 %17, %13
%19 = and i32 %18, 267390960
%20 = or i32 %12, %19
%21 = lshr exact i32 %20, 4
%22 = bitcast i8* %0 to i32*
store i32 %21, i32* %22
ret void
}
/* Type definitions */
struct task_set {
  int dummy;
};

/* Variables and functions */
void trace_read_reset(void) {
  static struct task_set *priv_ts;
  priv_ts == NULL;
}


x86 assembly (clang, -O0):
<trace_read_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_read_reset>:
ret

LLVM IR (-O0):
%struct.task_set = type { i32 }
@trace_read_reset.priv_ts = internal global %struct.task_set* null
define void @trace_read_reset() {
%1 = load %struct.task_set*, %struct.task_set** @trace_read_reset.priv_ts
%2 = icmp eq %struct.task_set* %1, null
%3 = zext i1 %2 to i32
ret void
}

LLVM IR (-O2):
define void @trace_read_reset() {
ret void
}
/* Variables and functions */
int int_add(int, int);
int int_div(int, int);
int int_mul(int, int);
int int_sub(int, int);
int main(int argc, char *argv[]) {
  int a, b, c, d;
  a = int_add(-1, 2);
  b = int_sub(1, 2);
  c = int_mul(3, 4);
  d = int_div(4, -2);
  return (a + b + c + d) ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%edi
mov    $0x2,%esi
call   1050 <int_add@plt>
mov    %eax,-0x14(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
call   1060 <int_sub@plt>
mov    %eax,-0x18(%rbp)
mov    $0x3,%edi
mov    $0x4,%esi
call   1040 <int_mul@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x4,%edi
mov    $0xfffffffe,%esi
call   1030 <int_div@plt>
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%edx
add    -0x18(%rbp),%edx
add    -0x1c(%rbp),%edx
add    -0x20(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    $0xffffffff,%edi
mov    $0x2,%esi
call   1050 <int_add@plt>
mov    %eax,%r14d
mov    $0x1,%edi
mov    $0x2,%esi
call   1060 <int_sub@plt>
mov    %eax,%ebp
mov    $0x3,%edi
mov    $0x4,%esi
call   1040 <int_mul@plt>
mov    %eax,%ebx
mov    $0x4,%edi
mov    $0xfffffffe,%esi
call   1030 <int_div@plt>
add    %r14d,%ebp
add    %ebx,%ebp
xor    %ecx,%ecx
add    %eax,%ebp
sete   %cl
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%10 = call i32 @int_add(i32 -1, i32 2)
store i32 %10, i32* %6
%11 = call i32 @int_sub(i32 1, i32 2)
store i32 %11, i32* %7
%12 = call i32 @int_mul(i32 3, i32 4)
store i32 %12, i32* %8
%13 = call i32 @int_div(i32 4, i32 -2)
store i32 %13, i32* %9
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = add nsw i32 %14, %15
%17 = load i32, i32* %8
%18 = add nsw i32 %16, %17
%19 = load i32, i32* %9
%20 = add nsw i32 %18, %19
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 0, i32 1
ret i32 %23
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @int_add(i32 -1, i32 2)
%4 = tail call i32 @int_sub(i32 1, i32 2)
%5 = tail call i32 @int_mul(i32 3, i32 4)
%6 = tail call i32 @int_div(i32 4, i32 -2)
%7 = add nsw i32 %4, %3
%8 = add nsw i32 %7, %5
%9 = sub i32 0, %6
%10 = icmp eq i32 %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char *argv[]) {
  int i = 0;
  int *p = &i;
#pragma omp parallel shared(i) firstprivate(p)
  {
    if (p != &i)
      abort();
    int j;
    for (j = 0; j < 100; j++) {
      int k;
      for (k = 0; k < 100; k++) {
        if (i != 0)
          abort();
      }
    }
#pragma omp barrier
    i = 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x14(%rbp),%rax
cmp    %rax,-0x20(%rbp)
je     114a <main+0x3a>
mov    $0x0,%al
call   1030 <abort@plt>
movl   $0x0,-0x24(%rbp)
cmpl   $0x64,-0x24(%rbp)
jge    11a3 <main+0x93>
movl   $0x0,-0x28(%rbp)
cmpl   $0x64,-0x28(%rbp)
jge    1190 <main+0x80>
cmpl   $0x0,-0x14(%rbp)
je     117d <main+0x6d>
mov    $0x0,%al
call   1030 <abort@plt>
jmp    1182 <main+0x72>
mov    -0x28(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x28(%rbp)
jmp    1162 <main+0x52>
jmp    1195 <main+0x85>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1151 <main+0x41>
movl   $0x1,-0x14(%rbp)
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32* %6, i32** %7
%10 = load i32*, i32** %7
%11 = icmp ne i32* %10, %6
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @abort()
unreachable
14: ; preds = %2
store i32 0, i32* %8
br label %15
15: ; preds = %32, %14
%16 = load i32, i32* %8
%17 = icmp slt i32 %16, 100
br i1 %17, label %18, label %35
18: ; preds = %15
store i32 0, i32* %9
br label %19
19: ; preds = %28, %18
%20 = load i32, i32* %9
%21 = icmp slt i32 %20, 100
br i1 %21, label %22, label %31
22: ; preds = %19
%23 = load i32, i32* %6
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %27
25: ; preds = %22
%26 = call i32 (...) @abort()
unreachable
27: ; preds = %22
br label %28
28: ; preds = %27
%29 = load i32, i32* %9
%30 = add nsw i32 %29, 1
store i32 %30, i32* %9
br label %19
31: ; preds = %19
br label %32
32: ; preds = %31
%33 = load i32, i32* %8
%34 = add nsw i32 %33, 1
store i32 %34, i32* %8
br label %15
35: ; preds = %15
store i32 1, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
int findlastu(unsigned int *a, int n, unsigned int val) {
  int i;
  for (i = n - 1; i >= 0; i--) {
    if (a[i] == val)
      return i;
  }
  return -1;
}


x86 assembly (clang, -O0):
<findlastu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jl     1153 <findlastu+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <findlastu+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <findlastu+0x5a>
jmp    1145 <findlastu+0x45>
mov    -0x1c(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <findlastu+0x17>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findlastu>:
mov    %esi,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
test   %eax,%eax
jle    1120 <findlastu+0x20>
add    $0xffffffffffffffff,%rax
mov    %eax,%ecx
cmp    %edx,(%rdi,%rcx,4)
jne    1110 <findlastu+0x10>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @findlastu(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
%10 = sub nsw i32 %9, 1
store i32 %10, i32* %8
br label %11
11: ; preds = %25, %3
%12 = load i32, i32* %8
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %28
14: ; preds = %11
%15 = load i32*, i32** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = load i32, i32* %7
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %14
%23 = load i32, i32* %8
store i32 %23, i32* %4
br label %29
24: ; preds = %14
br label %25
25: ; preds = %24
%26 = load i32, i32* %8
%27 = add nsw i32 %26, -1
store i32 %27, i32* %8
br label %11
28: ; preds = %11
store i32 -1, i32* %4
br label %29
29: ; preds = %28, %22
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @findlastu(i32* nocapture %0, i32 %1, i32 %2) {
%4 = zext i32 %1 to i64
br label %5
5: ; preds = %10, %3
%6 = phi i64 [ %7, %10 ], [ %4, %3 ]
%7 = add nsw i64 %6, -1
%8 = trunc i64 %6 to i32
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %5
%11 = and i64 %7, 4294967295
%12 = getelementptr inbounds i32, i32* %0, i64 %11
%13 = load i32, i32* %12
%14 = icmp eq i32 %13, %2
br i1 %14, label %15, label %5
15: ; preds = %10
%16 = trunc i64 %7 to i32
br label %17
17: ; preds = %5, %15
%18 = phi i32 [ %16, %15 ], [ -1, %5 ]
ret i32 %18
}