xunge/DecIR huggingface dataset:
int ps2_float_greater_equal(float a, float b, float tolerance) {
  return (a - b) > (-tolerance);
}


x86 assembly (clang, -O0):
<ps2_float_greater_equal>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps2_float_greater_equal>:
subss  %xmm1,%xmm0
xorps  0xef5(%rip),%xmm2
xor    %eax,%eax
ucomiss %xmm2,%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @ps2_float_greater_equal(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fsub float %7, %8
%10 = load float, float* %6
%11 = fneg float %10
%12 = fcmp ogt float %9, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @ps2_float_greater_equal(float %0, float %1, float %2) {
%4 = fsub float %0, %1
%5 = fneg float %2
%6 = fcmp ogt float %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int abs(int);
int /*<<< orphan*/ error_msg(char *);
int conv_divisions(int divraw) {
  if (divraw > 0) {
    return divraw;
  } else {
    error_msg("midi_load: time division is given in frames per second, expect "
              "breakage without further support\n");
    return abs(divraw >> 8);
  }
}


x86 assembly (clang, -O0):
<conv_divisions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1140 <conv_divisions+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <conv_divisions+0x3a>
lea    0xeb9(%rip),%rdi
call   1030 <error_msg@plt>
mov    -0x8(%rbp),%edi
sar    $0x8,%edi
call   1040 <abs@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv_divisions>:
push   %rbx
mov    %edi,%ebx
test   %edi,%edi
jg     1128 <conv_divisions+0x18>
lea    0xee2(%rip),%rdi
call   1030 <error_msg@plt>
sar    $0x8,%ebx
neg    %ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [97 x i8] c"midi_load: time division is given in frames per second, expect breakage without further support\0A\00"
define i32 @conv_divisions(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %13
8: ; preds = %1
%9 = call i32 @error_msg(i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* %3
%11 = ashr i32 %10, 8
%12 = call i32 @abs(i32 %11)
store i32 %12, i32* %2
br label %13
13: ; preds = %8, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [97 x i8] c"midi_load: time division is given in frames per second, expect breakage without further support\0A\00"
define i32 @conv_divisions(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @error_msg(i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str, i64 0, i64 0))
%5 = ashr i32 %0, 8
%6 = sub nsw i32 0, %5
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ %0, %1 ]
ret i32 %8
}
short test_short_6(short a, short b, short c, short d, short e, short f) {
  return -25344;
}


x86 assembly (clang, -O0):
<test_short_6>:
push   %rbp
mov    %rsp,%rbp
mov    %r8d,-0x1c(%rbp)
mov    %ecx,%eax
mov    -0x1c(%rbp),%ecx
mov    %eax,-0x18(%rbp)
mov    %edx,%eax
mov    -0x18(%rbp),%edx
mov    %eax,-0x14(%rbp)
mov    %esi,%eax
mov    -0x14(%rbp),%esi
mov    %eax,-0x10(%rbp)
mov    %edi,%r8d
mov    -0x10(%rbp),%edi
mov    %r9w,%ax
mov    %r8w,-0x2(%rbp)
mov    %di,-0x4(%rbp)
mov    %si,-0x6(%rbp)
mov    %dx,-0x8(%rbp)
mov    %cx,-0xa(%rbp)
mov    %ax,-0xc(%rbp)
mov    $0x9d00,%ax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_short_6>:
mov    $0x9d00,%ax
ret

LLVM IR (-O0):
define signext i16 @test_short_6(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3, i16 signext %4, i16 signext %5) {
%7 = alloca i16
%8 = alloca i16
%9 = alloca i16
%10 = alloca i16
%11 = alloca i16
%12 = alloca i16
store i16 %0, i16* %7
store i16 %1, i16* %8
store i16 %2, i16* %9
store i16 %3, i16* %10
store i16 %4, i16* %11
store i16 %5, i16* %12
ret i16 -25344
}

LLVM IR (-O2):
define signext i16 @test_short_6(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3, i16 signext %4, i16 signext %5) {
ret i16 -25344
}
float f3(__attribute__((vector_size(16))) float t) { return ((float *)&t)[3]; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
movaps %xmm0,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
shufps $0xff,%xmm0,%xmm0
ret

LLVM IR (-O0):
define float @f3(<4 x float> %0) {
%2 = alloca <4 x float>
store <4 x float> %0, <4 x float>* %2
%3 = bitcast <4 x float>* %2 to float*
%4 = getelementptr inbounds float, float* %3, i64 3
%5 = load float, float* %4
ret float %5
}

LLVM IR (-O2):
define float @f3(<4 x float> %0) {
%2 = extractelement <4 x float> %0, i64 3
ret float %2
}
/* Variables and functions */
int str_cmp(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strpar(char const *, int /*<<< orphan*/);
int cmd_cmp(const char *cmd, const char *input) {
  return str_cmp(cmd, strpar(input, 0));
}


x86 assembly (clang, -O0):
<cmd_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1040 <strpar@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1030 <str_cmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_cmp>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
xor    %esi,%esi
call   1040 <strpar@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <str_cmp@plt>

LLVM IR (-O0):
define i32 @cmd_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strpar(i8* %6, i32 0)
%8 = call i32 @str_cmp(i8* %5, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @cmd_cmp(i8* %0, i8* %1) {
%3 = tail call i32 @strpar(i8* %1, i32 0)
%4 = tail call i32 @str_cmp(i8* %0, i32 %3)
ret i32 %4
}
/* Variables and functions */
long strtol(char const *, char **, int);
long int strtol2(const char *str, char **tail) {
  long int i;
  return ((i = strtol(str, tail, 10))) ? i : strtol(str, tail, 16);
}


x86 assembly (clang, -O0):
<strtol2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     114d <strtol2+0x3d>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1163 <strtol2+0x53>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x10,%edx
call   1030 <strtol@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtol2>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0xa,%edx
call   1030 <strtol@plt>
test   %rax,%rax
je     1131 <strtol2+0x21>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x10,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i64 @strtol2(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i64
store i8* %0, i8** %3
store i8** %1, i8*** %4
%6 = load i8*, i8** %3
%7 = load i8**, i8*** %4
%8 = call i64 @strtol(i8* %6, i8** %7, i32 10)
store i64 %8, i64* %5
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i64, i64* %5
br label %16
12: ; preds = %2
%13 = load i8*, i8** %3
%14 = load i8**, i8*** %4
%15 = call i64 @strtol(i8* %13, i8** %14, i32 16)
br label %16
16: ; preds = %12, %10
%17 = phi i64 [ %11, %10 ], [ %15, %12 ]
ret i64 %17
}

LLVM IR (-O2):
define i64 @strtol2(i8* %0, i8** nocapture %1) {
%3 = tail call i64 @strtol(i8* %0, i8** %1, i32 10)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i64 @strtol(i8* %0, i8** %1, i32 16)
br label %7
7: ; preds = %2, %5
%8 = phi i64 [ %6, %5 ], [ %3, %2 ]
ret i64 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ BIO_set_data(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ BIO_set_init(int /*<<< orphan*/ *, int);
int /*<<< orphan*/ *EVP_MD_CTX_new();
int md_new(BIO *bi) {
  EVP_MD_CTX *ctx;
  ctx = EVP_MD_CTX_new();
  if (ctx == NULL)
    return (0);
  BIO_set_init(bi, 1);
  BIO_set_data(bi, ctx);
  return 1;
}


x86 assembly (clang, -O0):
<md_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <EVP_MD_CTX_new@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115e <md_new+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    1180 <md_new+0x50>
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1040 <BIO_set_init@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <BIO_set_data@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_new>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %ebp,%ebp
xor    %eax,%eax
call   1050 <EVP_MD_CTX_new@plt>
test   %rax,%rax
je     1165 <md_new+0x35>
mov    %rax,%rbx
mov    $0x1,%ebp
mov    %r14,%rdi
mov    $0x1,%esi
call   1040 <BIO_set_init@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <BIO_set_data@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @md_new(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
%5 = call i32* (...) @EVP_MD_CTX_new()
store i32* %5, i32** %4
%6 = load i32*, i32** %4
%7 = icmp eq i32* %6, null
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %15
9: ; preds = %1
%10 = load i32*, i32** %3
%11 = call i32 @BIO_set_init(i32* %10, i32 1)
%12 = load i32*, i32** %3
%13 = load i32*, i32** %4
%14 = call i32 @BIO_set_data(i32* %12, i32* %13)
store i32 1, i32* %2
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @md_new(i32* %0) {
%2 = tail call i32* (...) @EVP_MD_CTX_new()
%3 = icmp eq i32* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @BIO_set_init(i32* %0, i32 1)
%6 = tail call i32 @BIO_set_data(i32* %0, i32* %2)
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %8
}
/* Type definitions */
struct ber_element {
  int dummy;
};

/* Variables and functions */
struct ber_element *ber_get_element(int);
int /*<<< orphan*/ ber_link_elements(struct ber_element *,
                                     struct ber_element *);
struct ber_element *ber_add_null(struct ber_element *prev) {
  struct ber_element *elm;
  if ((elm = ber_get_element(5)) == NULL)
    return NULL;
  ber_link_elements(prev, elm);
  return elm;
}


x86 assembly (clang, -O0):
<ber_add_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x5,%edi
call   1030 <ber_get_element@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1151 <ber_add_null+0x31>
movq   $0x0,-0x8(%rbp)
jmp    1166 <ber_add_null+0x46>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <ber_link_elements@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ber_add_null>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x5,%edi
call   1030 <ber_get_element@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1144 <ber_add_null+0x24>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <ber_link_elements@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ber_element = type { i32 }
define %struct.ber_element* @ber_add_null(%struct.ber_element* %0) {
%2 = alloca %struct.ber_element*
%3 = alloca %struct.ber_element*
%4 = alloca %struct.ber_element*
store %struct.ber_element* %0, %struct.ber_element** %3
%5 = call %struct.ber_element* @ber_get_element(i32 5)
store %struct.ber_element* %5, %struct.ber_element** %4
%6 = icmp eq %struct.ber_element* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store %struct.ber_element* null, %struct.ber_element** %2
br label %13
8: ; preds = %1
%9 = load %struct.ber_element*, %struct.ber_element** %3
%10 = load %struct.ber_element*, %struct.ber_element** %4
%11 = call i32 @ber_link_elements(%struct.ber_element* %9, %struct.ber_element* %10)
%12 = load %struct.ber_element*, %struct.ber_element** %4
store %struct.ber_element* %12, %struct.ber_element** %2
br label %13
13: ; preds = %8, %7
%14 = load %struct.ber_element*, %struct.ber_element** %2
ret %struct.ber_element* %14
}

LLVM IR (-O2):
%struct.ber_element = type { i32 }
define %struct.ber_element* @ber_add_null(%struct.ber_element* %0) {
%2 = tail call %struct.ber_element* @ber_get_element(i32 5)
%3 = icmp eq %struct.ber_element* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @ber_link_elements(%struct.ber_element* %0, %struct.ber_element* %2)
br label %6
6: ; preds = %1, %4
ret %struct.ber_element* %2
}
void acpi_gpiochip_add(struct gpio_chip *chip) {}


x86 assembly (clang, -O0):
<acpi_gpiochip_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_gpiochip_add>:
ret

LLVM IR (-O0):
%struct.gpio_chip = type opaque
define void @acpi_gpiochip_add(%struct.gpio_chip* %0) {
%2 = alloca %struct.gpio_chip*
store %struct.gpio_chip* %0, %struct.gpio_chip** %2
ret void
}

LLVM IR (-O2):
%struct.gpio_chip = type opaque
define void @acpi_gpiochip_add(%struct.gpio_chip* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int isPowerOfFour(int);
int main(int argc, char **argv) {
  assert(!isPowerOfFour(0));
  assert(isPowerOfFour(1));
  assert(!isPowerOfFour(5));
  assert(isPowerOfFour(16));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1040 <isPowerOfFour@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1040 <isPowerOfFour@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    $0x5,%edi
call   1040 <isPowerOfFour@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x10,%edi
call   1040 <isPowerOfFour@plt>
mov    %eax,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <isPowerOfFour@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
mov    $0x1,%edi
call   1040 <isPowerOfFour@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    $0x5,%edi
call   1040 <isPowerOfFour@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
mov    $0x10,%edi
call   1040 <isPowerOfFour@plt>
mov    %eax,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @isPowerOfFour(i32 0)
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = call i32 @isPowerOfFour(i32 1)
%12 = call i32 @assert(i32 %11)
%13 = call i32 @isPowerOfFour(i32 5)
%14 = icmp ne i32 %13, 0
%15 = xor i1 %14, true
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = call i32 @isPowerOfFour(i32 16)
%19 = call i32 @assert(i32 %18)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @isPowerOfFour(i32 0)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i32 @isPowerOfFour(i32 1)
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @isPowerOfFour(i32 5)
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 %11)
%13 = tail call i32 @isPowerOfFour(i32 16)
%14 = tail call i32 @assert(i32 %13)
ret i32 0
}
/* Type definitions */
struct settings {
  int dummy;
};

/* Variables and functions */
struct settings *set_create(struct settings *, char *, char *);
int /*<<< orphan*/ set_find(struct settings *, char *);
struct settings *set_default(struct settings *set, char *name, char *value) {
  if (!set_find(set, name))
    return (set_create(set, name, value));
  return set;
}


x86 assembly (clang, -O0):
<set_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <set_find@plt>
cmp    $0x0,%eax
jne    1164 <set_default+0x44>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <set_create@plt>
mov    %rax,-0x8(%rbp)
jmp    116c <set_default+0x4c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_default>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1040 <set_find@plt>
test   %eax,%eax
je     1140 <set_default+0x20>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <set_create@plt>

LLVM IR (-O0):
%struct.settings = type { i32 }
define %struct.settings* @set_default(%struct.settings* %0, i8* %1, i8* %2) {
%4 = alloca %struct.settings*
%5 = alloca %struct.settings*
%6 = alloca i8*
%7 = alloca i8*
store %struct.settings* %0, %struct.settings** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load %struct.settings*, %struct.settings** %5
%9 = load i8*, i8** %6
%10 = call i32 @set_find(%struct.settings* %8, i8* %9)
%11 = icmp ne i32 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %3
%13 = load %struct.settings*, %struct.settings** %5
%14 = load i8*, i8** %6
%15 = load i8*, i8** %7
%16 = call %struct.settings* @set_create(%struct.settings* %13, i8* %14, i8* %15)
store %struct.settings* %16, %struct.settings** %4
br label %19
17: ; preds = %3
%18 = load %struct.settings*, %struct.settings** %5
store %struct.settings* %18, %struct.settings** %4
br label %19
19: ; preds = %17, %12
%20 = load %struct.settings*, %struct.settings** %4
ret %struct.settings* %20
}

LLVM IR (-O2):
%struct.settings = type { i32 }
define %struct.settings* @set_default(%struct.settings* %0, i8* %1, i8* %2) {
%4 = tail call i32 @set_find(%struct.settings* %0, i8* %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call %struct.settings* @set_create(%struct.settings* %0, i8* %1, i8* %2)
br label %8
8: ; preds = %3, %6
%9 = phi %struct.settings* [ %7, %6 ], [ %0, %3 ]
ret %struct.settings* %9
}
/* Variables and functions */
int /*<<< orphan*/ OS_TaskRegister();
void task_9(void) {
  OS_TaskRegister();
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<task_9>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OS_TaskRegister@plt>
jmp    111b <task_9+0xb>

x86 assembly (clang, -O2):
<task_9>:
push   %rax
xor    %eax,%eax
call   1030 <OS_TaskRegister@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <task_9+0x10>

LLVM IR (-O0):
define void @task_9() {
%1 = call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @task_9() {
%1 = tail call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ unionSample();
int main() {
  unionSample();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <unionSample@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <unionSample@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @unionSample()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @unionSample()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fail(char *, char *);
void undefined(char *name) { fail("Undefined identifier: %s", name); }


x86 assembly (clang, -O0):
<undefined>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <fail@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<undefined>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <fail@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Undefined identifier: %s\00"
define void @undefined(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fail(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Undefined identifier: %s\00"
define void @undefined(i8* %0) {
%2 = tail call i32 @fail(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int testf_dso_null(void) { return 0xcafe; }


x86 assembly (clang, -O0):
<testf_dso_null>:
push   %rbp
mov    %rsp,%rbp
mov    $0xcafe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testf_dso_null>:
mov    $0xcafe,%eax
ret

LLVM IR (-O0):
define i32 @testf_dso_null() {
ret i32 51966
}

LLVM IR (-O2):
define i32 @testf_dso_null() {
ret i32 51966
}
void chomp_string(char *string) {
  char *p;
  for (p = string; *p != '\0'; p++) {
    if (*p == '#' || *p == '\n')
      *p = '\0';
  }
}


x86 assembly (clang, -O0):
<chomp_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115d <chomp_string+0x5d>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x23,%eax
je     1140 <chomp_string+0x40>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    1147 <chomp_string+0x47>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
jmp    114c <chomp_string+0x4c>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <chomp_string+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chomp_string>:
jmp    1117 <chomp_string+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x0,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0xa,%al
je     1110 <chomp_string+0x10>
cmp    $0x23,%al
je     1110 <chomp_string+0x10>
test   %al,%al
jne    1113 <chomp_string+0x13>
ret

LLVM IR (-O0):
define void @chomp_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %23, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %26
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 35
br i1 %14, label %20, label %15
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 10
br i1 %19, label %20, label %22
20: ; preds = %15, %10
%21 = load i8*, i8** %3
store i8 0, i8* %21
br label %22
22: ; preds = %20, %15
br label %23
23: ; preds = %22
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %3
br label %5
26: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @chomp_string(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 35, label %5
i8 10, label %5
]
5: ; preds = %2, %2
store i8 0, i8* %3
br label %6
6: ; preds = %2, %5
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_autoalloc();
int /*<<< orphan*/ test_binary();
int /*<<< orphan*/ test_data_length();
int /*<<< orphan*/ test_preexisting();
int main(void) {
  test_autoalloc();
  test_preexisting();
  test_data_length();
  test_binary();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <test_autoalloc@plt>
mov    $0x0,%al
call   1040 <test_preexisting@plt>
mov    $0x0,%al
call   1030 <test_data_length@plt>
mov    $0x0,%al
call   1050 <test_binary@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <test_autoalloc@plt>
xor    %eax,%eax
call   1040 <test_preexisting@plt>
xor    %eax,%eax
call   1030 <test_data_length@plt>
xor    %eax,%eax
call   1050 <test_binary@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_autoalloc()
%3 = call i32 (...) @test_preexisting()
%4 = call i32 (...) @test_data_length()
%5 = call i32 (...) @test_binary()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_autoalloc()
%2 = tail call i32 (...) @test_preexisting()
%3 = tail call i32 (...) @test_data_length()
%4 = tail call i32 (...) @test_binary()
ret i32 0
}
void rpop() {
  asm volatile("popq %%rax\n\t"
               "popq %%rbx\n\t"
               "movq %%rbx, (%%rax)\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<rpop>:
push   %rbp
mov    %rsp,%rbp
pop    %rax
pop    %rbx
mov    %rbx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpop>:
pop    %rax
pop    %rbx
mov    %rbx,(%rax)
ret

LLVM IR (-O0):
define void @rpop() {
ret void
}

LLVM IR (-O2):
define void @rpop() {
tail call void asm sideeffect "popq %rax\0A\09popq %rbx\0A\09movq %rbx, (%rax)\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void aligned_free(void *ptr) {
  void *orig = ((void **)ptr)[-1];
  free(orig);
}


x86 assembly (clang, -O0):
<aligned_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_free>:
mov    -0x8(%rdi),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @aligned_free(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i8**
%6 = getelementptr inbounds i8*, i8** %5, i64 -1
%7 = load i8*, i8** %6
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = call i32 @free(i8* %8)
ret void
}

LLVM IR (-O2):
define void @aligned_free(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 -8
%3 = bitcast i8* %2 to i8**
%4 = load i8*, i8** %3
%5 = tail call i32 @free(i8* %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_SIGNED;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_SIGNED_it;
PKCS7_SIGNED *d2i_PKCS7_SIGNED(PKCS7_SIGNED **a, const unsigned char **in,
                               long len) {
  return (PKCS7_SIGNED *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                       &PKCS7_SIGNED_it);
}


x86 assembly (clang, -O0):
<d2i_PKCS7_SIGNED>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS7_SIGNED>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@PKCS7_SIGNED_it = global i32 0
define i32* @d2i_PKCS7_SIGNED(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @PKCS7_SIGNED_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@PKCS7_SIGNED_it = global i32 0
define i32* @d2i_PKCS7_SIGNED(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @PKCS7_SIGNED_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void tunio_close(int fd) { close(fd); }


x86 assembly (clang, -O0):
<tunio_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tunio_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @tunio_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @tunio_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
main() {
  struct A {
    int i, j, k;
  } a = {1, 2, 3}, b = a;
  return b.i + b.j + b.k;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0xeee(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xeec(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x20(%rbp),%eax
add    -0x1c(%rbp),%eax
add    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
%struct.A = type { i32, i32, i32 }
@__const.main.a = %struct.A { i32 1, i32 2, i32 3 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.A
%3 = alloca %struct.A
store i32 0, i32* %1
%4 = bitcast %struct.A* %2 to i8*
%5 = bitcast %struct.A* %3 to i8*
%6 = bitcast %struct.A* %2 to i8*
%7 = getelementptr inbounds %struct.A, %struct.A* %3, i32 0, i32 0
%8 = load i32, i32* %7
%9 = getelementptr inbounds %struct.A, %struct.A* %3, i32 0, i32 1
%10 = load i32, i32* %9
%11 = add nsw i32 %8, %10
%12 = getelementptr inbounds %struct.A, %struct.A* %3, i32 0, i32 2
%13 = load i32, i32* %12
%14 = add nsw i32 %11, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
ret i32 6
}
/* Variables and functions */
size_t strlen(char const *);
scalar_t__ strncmp(char const *, char const *, size_t);
int starts_with(const char *pre, const char *str) {
  size_t lenpre = strlen(pre);
  size_t lenstr = strlen(str);
  return lenstr < lenpre ? 0 : strncmp(pre, str, lenpre) == 0;
}


x86 assembly (clang, -O0):
<starts_with>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1162 <starts_with+0x42>
xor    %eax,%eax
mov    %eax,-0x24(%rbp)
jmp    1182 <starts_with+0x62>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<starts_with>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
jb     115e <starts_with+0x3e>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @starts_with(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %2
br label %22
15: ; preds = %2
%16 = load i8*, i8** %3
%17 = load i8*, i8** %4
%18 = load i64, i64* %5
%19 = call i64 @strncmp(i8* %16, i8* %17, i64 %18)
%20 = icmp eq i64 %19, 0
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %15, %14
%23 = phi i32 [ 0, %14 ], [ %21, %15 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @starts_with(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = icmp ult i64 %4, %3
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i64 @strncmp(i8* %0, i8* %1, i64 %3)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ %9, %6 ], [ 0, %2 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ EPERM;
int /*<<< orphan*/ errno;
int fchown(int fd, uid_t uid, gid_t gid) {
  errno = EPERM;
  return -1;
}


x86 assembly (clang, -O0):
<fchown>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    0x2ebc(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec3(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchown>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EPERM = global i32 0
@errno = global i32 0
define i32 @fchown(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @EPERM
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EPERM = global i32 0
@errno = global i32 0
define i32 @fchown(i32 %0, i32 %1, i32 %2) {
%4 = load i32, i32* @EPERM
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
#define SIGINT 129
int const SIGSTOP;
#define SIGTSTP 128
int /*<<< orphan*/ _handler_signal(int const);
void _sh_handler(int signum) {
  switch (signum) {
  case SIGINT:
    _handler_signal(SIGINT);
    break;
  case SIGTSTP:
    _handler_signal(SIGSTOP);
    break;
  }
}


x86 assembly (clang, -O0):
<_sh_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x80,%eax
je     1153 <_sh_handler+0x43>
jmp    1131 <_sh_handler+0x21>
mov    -0x8(%rbp),%eax
sub    $0x81,%eax
jne    1161 <_sh_handler+0x51>
jmp    1144 <_sh_handler+0x34>
mov    $0x81,%edi
call   1030 <_handler_signal@plt>
jmp    1161 <_sh_handler+0x51>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1030 <_handler_signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sh_handler>:
cmp    $0x81,%edi
je     1122 <_sh_handler+0x12>
cmp    $0x80,%edi
jne    1127 <_sh_handler+0x17>
xor    %edi,%edi
jmp    1030 <_handler_signal@plt>
ret

LLVM IR (-O0):
@SIGSTOP = constant i32 0
define void @_sh_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %9 [
i32 129, label %4
i32 128, label %6
]
4: ; preds = %1
%5 = call i32 @_handler_signal(i32 129)
br label %9
6: ; preds = %1
%7 = load i32, i32* @SIGSTOP
%8 = call i32 @_handler_signal(i32 %7)
br label %9
9: ; preds = %1, %6, %4
ret void
}

LLVM IR (-O2):
@SIGSTOP = constant i32 0
define void @_sh_handler(i32 %0) {
switch i32 %0, label %6 [
i32 129, label %3
i32 128, label %2
]
2: ; preds = %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ 0, %2 ], [ %0, %1 ]
%5 = tail call i32 @_handler_signal(i32 %4)
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ restore_key_rate();
void termination_handler() {
  restore_key_rate();
  endwin();
  exit(1);
}


x86 assembly (clang, -O0):
<termination_handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <restore_key_rate@plt>
mov    $0x0,%al
call   1030 <endwin@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<termination_handler>:
push   %rax
xor    %eax,%eax
call   1040 <restore_key_rate@plt>
xor    %eax,%eax
call   1030 <endwin@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @termination_handler() {
%1 = call i32 (...) @restore_key_rate()
%2 = call i32 (...) @endwin()
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @termination_handler() {
%1 = tail call i32 (...) @restore_key_rate()
%2 = tail call i32 (...) @endwin()
%3 = tail call i32 @exit(i32 1)
unreachable
}
void xxx(int argc) {
  int x;
#pragma omp taskloop simd
  for (int i = 0; i < 10; ++i)
    argc = x;
}


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    112c <xxx+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <xxx+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
ret

LLVM IR (-O0):
define void @xxx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %5
5: ; preds = %10, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i32, i32* %3
store i32 %9, i32* %2
br label %10
10: ; preds = %8
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @xxx(i32 %0) {
ret void
}
char count_colors(unsigned short *slot) {
  unsigned char color_index, used_colors = 0;
  for (color_index = 0; color_index < 4; color_index++) {
    if (slot[color_index] == 0xffff)
      break;
    used_colors++;
  }
  return used_colors;
}


x86 assembly (clang, -O0):
<count_colors>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0xa(%rbp)
movb   $0x0,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
cmp    $0x4,%eax
jge    114e <count_colors+0x4e>
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%ecx
movzwl (%rax,%rcx,2),%eax
cmp    $0xffff,%eax
jne    1139 <count_colors+0x39>
jmp    114e <count_colors+0x4e>
mov    -0xa(%rbp),%al
add    $0x1,%al
mov    %al,-0xa(%rbp)
mov    -0x9(%rbp),%al
add    $0x1,%al
mov    %al,-0x9(%rbp)
jmp    1110 <count_colors+0x10>
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_colors>:
cmpw   $0xffff,(%rdi)
je     1121 <count_colors+0x21>
cmpw   $0xffff,0x2(%rdi)
je     1124 <count_colors+0x24>
cmpw   $0xffff,0x4(%rdi)
je     1127 <count_colors+0x27>
cmpw   $0xffff,0x6(%rdi)
sete   %cl
mov    $0x4,%al
sub    %cl,%al
ret
xor    %eax,%eax
ret
mov    $0x1,%al
ret
mov    $0x2,%al
ret

LLVM IR (-O0):
define signext i8 @count_colors(i16* %0) {
%2 = alloca i16*
%3 = alloca i8
%4 = alloca i8
store i16* %0, i16** %2
store i8 0, i8* %4
store i8 0, i8* %3
br label %5
5: ; preds = %21, %1
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
%8 = icmp slt i32 %7, 4
br i1 %8, label %9, label %24
9: ; preds = %5
%10 = load i16*, i16** %2
%11 = load i8, i8* %3
%12 = zext i8 %11 to i64
%13 = getelementptr inbounds i16, i16* %10, i64 %12
%14 = load i16, i16* %13
%15 = zext i16 %14 to i32
%16 = icmp eq i32 %15, 65535
br i1 %16, label %17, label %18
17: ; preds = %9
br label %24
18: ; preds = %9
%19 = load i8, i8* %4
%20 = add i8 %19, 1
store i8 %20, i8* %4
br label %21
21: ; preds = %18
%22 = load i8, i8* %3
%23 = add i8 %22, 1
store i8 %23, i8* %3
br label %5
24: ; preds = %17, %5
%25 = load i8, i8* %4
ret i8 %25
}

LLVM IR (-O2):
define signext i8 @count_colors(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = icmp eq i16 %2, -1
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = getelementptr inbounds i16, i16* %0, i64 1
%6 = load i16, i16* %5
%7 = icmp eq i16 %6, -1
br i1 %7, label %17, label %8
8: ; preds = %4
%9 = getelementptr inbounds i16, i16* %0, i64 2
%10 = load i16, i16* %9
%11 = icmp eq i16 %10, -1
br i1 %11, label %17, label %12
12: ; preds = %8
%13 = getelementptr inbounds i16, i16* %0, i64 3
%14 = load i16, i16* %13
%15 = icmp eq i16 %14, -1
%16 = select i1 %15, i8 3, i8 4
br label %17
17: ; preds = %12, %8, %4, %1
%18 = phi i8 [ 0, %1 ], [ 1, %4 ], [ 2, %8 ], [ %16, %12 ]
ret i8 %18
}
int main(void) {
  int stdlib = 13;
  int foreign = 14;
  int heap = 15;
  return stdlib + foreign + heap;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xd,-0x8(%rbp)
movl   $0xe,-0xc(%rbp)
movl   $0xf,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 13, i32* %2
store i32 14, i32* %3
store i32 15, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %5, %6
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
/* Variables and functions */
int do_smbus_read_byte(int, unsigned int, unsigned int);
int smbus_read_byte(unsigned device, unsigned address) {
  return do_smbus_read_byte(0x8D0, device, address);
}


x86 assembly (clang, -O0):
<smbus_read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x8d0,%edi
call   1030 <do_smbus_read_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbus_read_byte>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x8d0,%edi
jmp    1030 <do_smbus_read_byte@plt>

LLVM IR (-O0):
define i32 @smbus_read_byte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @do_smbus_read_byte(i32 2256, i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @smbus_read_byte(i32 %0, i32 %1) {
%3 = tail call i32 @do_smbus_read_byte(i32 2256, i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void whilst(char *c) {
  char *tmp;
  tmp = c;
  while (*tmp != '\0') {
    printf("Wut?!\n");
  }
}


x86 assembly (clang, -O0):
<whilst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1145 <whilst+0x35>
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
jmp    1124 <whilst+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<whilst>:
push   %r14
push   %rbx
push   %rax
cmpb   $0x0,(%rdi)
je     113d <whilst+0x2d>
mov    %rdi,%rbx
lea    0xedd(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r14,%rdi
call   1030 <puts@plt>
cmpb   $0x0,(%rbx)
jne    1130 <whilst+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"Wut?!\0A\00"
define void @whilst(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %5
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"Wut?!\00"
define void @whilst(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%6 = load i8, i8* %0
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %4
8: ; preds = %4, %1
ret void
}
comp(s, t) char *s, *t;
{
  for (; *s++ == *t; t++)
    if (*t == 0)
      return (1);
  return (0);
}


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    115f <comp+0x5f>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1149 <comp+0x49>
movl   $0x1,-0x4(%rbp)
jmp    1166 <comp+0x66>
jmp    114e <comp+0x4e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    110c <comp+0xc>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%cl
xor    %eax,%eax
cmp    (%rsi),%cl
jne    1124 <comp+0x24>
mov    $0x1,%edx
nopl   (%rax)
test   %cl,%cl
je     1125 <comp+0x25>
movzbl (%rdi,%rdx,1),%ecx
lea    0x1(%rdx),%r8
cmp    (%rsi,%rdx,1),%cl
mov    %r8,%rdx
je     1110 <comp+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = load i8*, i8** %5
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %10, %13
br i1 %14, label %15, label %25
15: ; preds = %6
%16 = load i8*, i8** %5
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 1, i32* %3
br label %26
21: ; preds = %15
br label %22
22: ; preds = %21
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
br label %6
25: ; preds = %6
store i32 0, i32* %3
br label %26
26: ; preds = %25, %20
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
br i1 %5, label %10, label %17
6: ; preds = %10
%7 = load i8, i8* %14
%8 = load i8, i8* %16
%9 = icmp eq i8 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %2, %6
%11 = phi i8 [ %7, %6 ], [ %3, %2 ]
%12 = phi i8* [ %14, %6 ], [ %0, %2 ]
%13 = phi i8* [ %16, %6 ], [ %1, %2 ]
%14 = getelementptr inbounds i8, i8* %12, i64 1
%15 = icmp eq i8 %11, 0
%16 = getelementptr inbounds i8, i8* %13, i64 1
br i1 %15, label %17, label %6
17: ; preds = %10, %6, %2
%18 = phi i32 [ 0, %2 ], [ 0, %6 ], [ 1, %10 ]
ret i32 %18
}
/* Variables and functions */
scalar_t__ fstat(int, void *);
int /*<<< orphan*/ g_set_error(int, void *);
int learnFrom(int fd) {
  char buffer[100];
  void *p = buffer;
  if (fstat(fd, p) < 0) {
    g_set_error(fd, p);
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<learnFrom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %edi,-0x8(%rbp)
lea    -0x70(%rbp),%rax
mov    %rax,-0x78(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x78(%rbp),%rsi
call   1040 <fstat@plt>
cmp    $0x0,%rax
jge    1164 <learnFrom+0x44>
mov    -0x8(%rbp),%edi
mov    -0x78(%rbp),%rsi
call   1030 <g_set_error@plt>
movl   $0x0,-0x4(%rbp)
jmp    116b <learnFrom+0x4b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<learnFrom>:
push   %rbx
sub    $0x70,%rsp
mov    %edi,%ebx
mov    %rsp,%rsi
call   1040 <fstat@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
jns    1148 <learnFrom+0x28>
mov    %rsp,%rsi
mov    %ebx,%edi
call   1030 <g_set_error@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @learnFrom(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [100 x i8]
%5 = alloca i8*
store i32 %0, i32* %3
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %4, i64 0, i64 0
store i8* %6, i8** %5
%7 = load i32, i32* %3
%8 = load i8*, i8** %5
%9 = call i64 @fstat(i32 %7, i8* %8)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i32, i32* %3
%13 = load i8*, i8** %5
%14 = call i32 @g_set_error(i32 %12, i8* %13)
store i32 0, i32* %2
br label %16
15: ; preds = %1
store i32 1, i32* %2
br label %16
16: ; preds = %15, %11
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @learnFrom(i32 %0) {
%2 = alloca [100 x i8]
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%4 = call i64 @fstat(i32 %0, i8* %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @g_set_error(i32 %0, i8* %3)
br label %8
8: ; preds = %1, %6
%9 = phi i32 [ 0, %6 ], [ 1, %1 ]
ret i32 %9
}