xunge/DecIR huggingface dataset:
struct s35 {
  struct {
    int : 0;
  } a;
  char b;
  char c;
} f35(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<f35>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <f35+0x9>
jmp    1109 <f35+0x9>

x86 assembly (clang, -O2):
<f35>:
jmp    1100 <f35>

LLVM IR (-O0):
define i16 @f35() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define i16 @f35() {
br label %1
1: ; preds = %0, %1
br label %1
}
int LOC3(int it, int iy, int ix, int ny, int nx) {
  return ((it * ny + iy) * nx + ix);
}


x86 assembly (clang, -O0):
<LOC3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
imul   -0x14(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOC3>:
imul   %ecx,%edi
lea    (%rdi,%rsi,1),%eax
imul   %r8d,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @LOC3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %9
%13 = mul nsw i32 %11, %12
%14 = load i32, i32* %7
%15 = add nsw i32 %13, %14
%16 = load i32, i32* %10
%17 = mul nsw i32 %15, %16
%18 = load i32, i32* %8
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @LOC3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = mul nsw i32 %3, %0
%7 = add nsw i32 %6, %1
%8 = mul nsw i32 %7, %4
%9 = add nsw i32 %8, %2
ret i32 %9
}
unsigned int clut2mgr(register int v, register int bits) {
  register unsigned int i;
  i = (unsigned int)0xffffffff / ((1 << bits) - 1);
  return ((v * i) / 0x10000);
}


x86 assembly (clang, -O0):
<clut2mgr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
sub    $0x1,%ecx
mov    $0xffffffff,%eax
xor    %edx,%edx
div    %ecx
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0xc(%rbp),%eax
shr    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clut2mgr>:
mov    %esi,%ecx
mov    $0xffffffff,%esi
shl    %cl,%esi
not    %esi
mov    $0xffffffff,%eax
xor    %edx,%edx
div    %esi
imul   %edi,%eax
shr    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @clut2mgr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = sub nsw i32 %7, 1
%9 = udiv i32 -1, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %5
%12 = mul i32 %10, %11
%13 = udiv i32 %12, 65536
ret i32 %13
}

LLVM IR (-O2):
define i32 @clut2mgr(i32 %0, i32 %1) {
%3 = shl nsw i32 -1, %1
%4 = xor i32 %3, -1
%5 = udiv i32 -1, %4
%6 = mul i32 %5, %0
%7 = lshr i32 %6, 16
ret i32 %7
}
int has_stats(const unsigned int *info, int nr) {
  return (info[0] && info[nr - 1] > info[0]);
}


x86 assembly (clang, -O0):
<has_stats>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
cmpl   $0x0,(%rcx)
mov    %al,-0xd(%rbp)
je     1139 <has_stats+0x39>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x8(%rbp),%rcx
cmp    (%rcx),%eax
seta   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_stats>:
mov    (%rdi),%ecx
test   %ecx,%ecx
je     1113 <has_stats+0x13>
movslq %esi,%rdx
xor    %eax,%eax
cmp    %ecx,-0x4(%rdi,%rdx,4)
seta   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @has_stats(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %2
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = sub nsw i32 %11, 1
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %10, i64 %13
%15 = load i32, i32* %14
%16 = load i32*, i32** %3
%17 = getelementptr inbounds i32, i32* %16, i64 0
%18 = load i32, i32* %17
%19 = icmp ugt i32 %15, %18
br label %20
20: ; preds = %9, %2
%21 = phi i1 [ false, %2 ], [ %19, %9 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @has_stats(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = icmp eq i32 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2
%6 = add nsw i32 %1, -1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = icmp ugt i32 %9, %3
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %2
%13 = phi i32 [ 0, %2 ], [ %11, %5 ]
ret i32 %13
}
/* Variables and functions */
int intel_ich_gpio_set(int, int);
int pc8736x_gpio_set(int, int, int);
int board_hp_vl400(void) {
  int ret;
  ret = intel_ich_gpio_set(25, 1);
  if (!ret)
    ret = pc8736x_gpio_set(0xE1, 0x09, 1);
  if (!ret)
    ret = pc8736x_gpio_set(0xE1, 0x27, 1);
  return ret;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x19,%edi
mov    $0x1,%esi
call   1040 <intel_ich_gpio_set@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    115b <board_hp_vl400+0x3b>
mov    $0xe1,%edi
mov    $0x9,%esi
mov    $0x1,%edx
call   1030 <pc8736x_gpio_set@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    117c <board_hp_vl400+0x5c>
mov    $0xe1,%edi
mov    $0x27,%esi
mov    $0x1,%edx
call   1030 <pc8736x_gpio_set@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
mov    $0x19,%edi
mov    $0x1,%esi
call   1040 <intel_ich_gpio_set@plt>
test   %eax,%eax
jne    114c <board_hp_vl400+0x2c>
mov    $0xe1,%edi
mov    $0x9,%esi
mov    $0x1,%edx
call   1030 <pc8736x_gpio_set@plt>
test   %eax,%eax
je     114e <board_hp_vl400+0x2e>
pop    %rcx
ret
mov    $0xe1,%edi
mov    $0x27,%esi
mov    $0x1,%edx
pop    %rax
jmp    1030 <pc8736x_gpio_set@plt>

LLVM IR (-O0):
define i32 @board_hp_vl400() {
%1 = alloca i32
%2 = call i32 @intel_ich_gpio_set(i32 25, i32 1)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %0
%6 = call i32 @pc8736x_gpio_set(i32 225, i32 9, i32 1)
store i32 %6, i32* %1
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
%9 = icmp ne i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %7
%11 = call i32 @pc8736x_gpio_set(i32 225, i32 39, i32 1)
store i32 %11, i32* %1
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @board_hp_vl400() {
%1 = tail call i32 @intel_ich_gpio_set(i32 25, i32 1)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = tail call i32 @pc8736x_gpio_set(i32 225, i32 9, i32 1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @pc8736x_gpio_set(i32 225, i32 39, i32 1)
br label %8
8: ; preds = %0, %6, %3
%9 = phi i32 [ %4, %3 ], [ %7, %6 ], [ %1, %0 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR6B_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR6B_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR6B_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR6B_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR6B_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
void ff_hevc_put_hevc_bi_qpel_v48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v48_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ XOpenDisplay(int /*<<< orphan*/ *);
int main() {
  (void)XOpenDisplay(NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <XOpenDisplay@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <XOpenDisplay@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @XOpenDisplay(i32* null)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @XOpenDisplay(i32* null)
ret i32 0
}
/* Variables and functions */
scalar_t__ isalpha(int);
int isalpha_utf8(int _ch) {
  unsigned int ch = (unsigned int)_ch;
  return isalpha(_ch) || (ch > 0x7F);
}


x86 assembly (clang, -O0):
<isalpha_utf8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1145 <isalpha_utf8+0x35>
cmpl   $0x7f,-0x8(%rbp)
seta   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha_utf8>:
push   %rbx
mov    %edi,%ebx
call   1030 <isalpha@plt>
test   %rax,%rax
setne  %al
cmp    $0x7f,%ebx
seta   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalpha_utf8(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = call i64 @isalpha(i32 %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp ugt i32 %9, 127
br label %11
11: ; preds = %8, %1
%12 = phi i1 [ true, %1 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @isalpha_utf8(i32 %0) {
%2 = tail call i64 @isalpha(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = icmp ugt i32 %0, 127
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xa5() {
  Assert_real((isupper(165) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              830, ("isupper should be 0 for 0xa5"));
}


x86 assembly (clang, -O0):
<t_isupper_0xa5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa5,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x33e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xa5>:
push   %rax
mov    $0xa5,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x33e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xa5\00"
define void @t_isupper_0xa5() {
%1 = call i64 @isupper(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xa5\00"
define void @t_isupper_0xa5() {
%1 = tail call i64 @isupper(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int num, mult = 1;
  for (int num = 1; num <= 10; num = num + 1) {
    mult = mult * num;
  }
  printf("mult=%d\n", mult);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0xa,-0x10(%rbp)
jg     114f <main+0x3f>
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <main+0x1d>
mov    -0xc(%rbp),%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x375f00,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"mult=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %3
store i32 1, i32* %4
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %4
%7 = icmp sle i32 %6, 10
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
store i32 %11, i32* %3
br label %12
12: ; preds = %8
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %5
15: ; preds = %5
%16 = load i32, i32* %3
%17 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %16)
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
@.str = [9 x i8] c"mult=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 3628800)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ while_upto20_bad(int);
void call_while_upto20_10_good() { while_upto20_bad(10); }


x86 assembly (clang, -O0):
<call_while_upto20_10_good>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <while_upto20_bad@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_while_upto20_10_good>:
mov    $0xa,%edi
jmp    1030 <while_upto20_bad@plt>

LLVM IR (-O0):
define void @call_while_upto20_10_good() {
%1 = call i32 @while_upto20_bad(i32 10)
ret void
}

LLVM IR (-O2):
define void @call_while_upto20_10_good() {
%1 = tail call i32 @while_upto20_bad(i32 10)
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
int isSQR(const char *tok) { return strcmp(tok, "sqr") == 0; }


x86 assembly (clang, -O0):
<isSQR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSQR>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"sqr\00"
define i32 @isSQR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"sqr\00"
define i32 @isSQR(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait) {
  return 0;
}


x86 assembly (clang, -O0):
<drm_poll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_poll>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.file = type opaque
%struct.poll_table_struct = type opaque
define i32 @drm_poll(%struct.file* %0, %struct.poll_table_struct* %1) {
%3 = alloca %struct.file*
%4 = alloca %struct.poll_table_struct*
store %struct.file* %0, %struct.file** %3
store %struct.poll_table_struct* %1, %struct.poll_table_struct** %4
ret i32 0
}

LLVM IR (-O2):
%struct.file = type opaque
%struct.poll_table_struct = type opaque
define i32 @drm_poll(%struct.file* nocapture readnone %0, %struct.poll_table_struct* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int clear_dobldobl_witsols(void) {
  int *a, *b;
  double *c;
  int fail = _ada_use_c2phc4c(858, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<clear_dobldobl_witsols>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x35a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_dobldobl_witsols>:
mov    $0x35a,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @clear_dobldobl_witsols() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca double*
%4 = alloca i32
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %3
%8 = call i32 @_ada_use_c2phc4c(i32 858, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @clear_dobldobl_witsols() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 858, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int test_imm_C8uint16_mem(unsigned short *val) {
  return ((*val) & (0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xc8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8uint16_mem>:
testb  $0xc8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 200
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C8uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 200
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int foo_constant();
int cond_constant(int i) {
  int x;
  if (i < 0) {
    x = foo_constant();
  } else {
    x = 1;
  }
  return x;
}


x86 assembly (clang, -O0):
<cond_constant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1134 <cond_constant+0x24>
mov    $0x0,%al
call   1030 <foo_constant@plt>
mov    %eax,-0x8(%rbp)
jmp    113b <cond_constant+0x2b>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cond_constant>:
test   %edi,%edi
js     111a <cond_constant+0xa>
mov    $0x1,%eax
ret
xor    %eax,%eax
jmp    1030 <foo_constant@plt>

LLVM IR (-O0):
define i32 @cond_constant(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @foo_constant()
store i32 %7, i32* %3
br label %9
8: ; preds = %1
store i32 1, i32* %3
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @cond_constant(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @foo_constant()
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void lahf() { db(0x9F); }


x86 assembly (clang, -O0):
<lahf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9f,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lahf>:
mov    $0x9f,%edi
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @lahf() {
%1 = call i32 @db(i32 159)
ret void
}

LLVM IR (-O2):
define void @lahf() {
%1 = tail call i32 @db(i32 159)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
scalar_t__ memcmp(int /*<<< orphan*/ const *, char *, int);
int is_version_line(const uint8_t *line, size_t len) {
  if (len > 4 && memcmp(line, "SSH-", 4) == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_version_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x4,-0x18(%rbp)
jbe    1156 <is_version_line+0x46>
mov    -0x10(%rbp),%rdi
lea    0xeca(%rip),%rsi
mov    $0x4,%edx
call   1030 <memcmp@plt>
cmp    $0x0,%rax
jne    1156 <is_version_line+0x46>
movl   $0x1,-0x4(%rbp)
jmp    115d <is_version_line+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_version_line>:
cmp    $0x5,%rsi
jb     1132 <is_version_line+0x22>
push   %rax
lea    0xee2(%rip),%rsi
mov    $0x4,%edx
call   1030 <memcmp@plt>
test   %rax,%rax
lea    0x8(%rsp),%rsp
je     1135 <is_version_line+0x25>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"SSH-\00"
define i32 @is_version_line(i32* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ugt i64 %6, 4
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32*, i32** %4
%10 = call i64 @memcmp(i32* %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %3
br label %14
13: ; preds = %8, %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [5 x i8] c"SSH-\00"
define i32 @is_version_line(i32* %0, i64 %1) {
%3 = icmp ugt i64 %1, 4
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i64 @memcmp(i32* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %4, %2
br label %8
8: ; preds = %4, %7
%9 = phi i32 [ 0, %7 ], [ 1, %4 ]
ret i32 %9
}
int pth_pth_uctx_make(void *p1, void *p2, unsigned int p3, void *p4, void *p5,
                      void *p6, void *p7) {}


x86 assembly (clang, -O0):
<pth_pth_uctx_make>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%rax
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pth_pth_uctx_make>:
ret

LLVM IR (-O0):
define i32 @pth_pth_uctx_make(i8* %0, i8* %1, i32 %2, i8* %3, i8* %4, i8* %5, i8* %6) {
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = alloca i8*
%15 = alloca i8*
store i8* %0, i8** %9
store i8* %1, i8** %10
store i32 %2, i32* %11
store i8* %3, i8** %12
store i8* %4, i8** %13
store i8* %5, i8** %14
store i8* %6, i8** %15
%16 = load i32, i32* %8
ret i32 %16
}

LLVM IR (-O2):
define i32 @pth_pth_uctx_make(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8* nocapture readnone %3, i8* nocapture readnone %4, i8* nocapture readnone %5, i8* nocapture readnone %6) {
ret i32 undef
}
int test_imm_D1uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xD1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D1uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xd1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D1uint64_highword_reg>:
movabs $0xd100000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D1uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 209
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D1uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 897648164864
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ vga_tx2(int /*<<< orphan*/);
void vga_str2(char *str) {
  while (*str)
    vga_tx2(*str++);
}


x86 assembly (clang, -O0):
<vga_str2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <vga_str2+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <vga_tx2@plt>
jmp    111c <vga_str2+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_str2>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <vga_str2+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <vga_tx2@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <vga_str2+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @vga_str2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @vga_tx2(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @vga_str2(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @vga_tx2(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
int _buffer_chunksize(int);
int httpmessage_chunksize() { return _buffer_chunksize(-1); }


x86 assembly (clang, -O0):
<httpmessage_chunksize>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%edi
call   1030 <_buffer_chunksize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<httpmessage_chunksize>:
mov    $0xffffffff,%edi
jmp    1030 <_buffer_chunksize@plt>

LLVM IR (-O0):
define i32 @httpmessage_chunksize() {
%1 = call i32 @_buffer_chunksize(i32 -1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @httpmessage_chunksize() {
%1 = tail call i32 @_buffer_chunksize(i32 -1)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ convert_dec_to_x_bit_binary(char, int, char *);
void convert_ascii_value_to_10_bit_binary(char c, char *result) {
  convert_dec_to_x_bit_binary(c, 11, result);
}


x86 assembly (clang, -O0):
<convert_ascii_value_to_10_bit_binary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rdx
mov    $0xb,%esi
movsbl %al,%edi
call   1030 <convert_dec_to_x_bit_binary@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_ascii_value_to_10_bit_binary>:
mov    %rsi,%rdx
mov    $0xb,%esi
jmp    1030 <convert_dec_to_x_bit_binary@plt>

LLVM IR (-O0):
define void @convert_ascii_value_to_10_bit_binary(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8, i8* %3
%6 = load i8*, i8** %4
%7 = call i32 @convert_dec_to_x_bit_binary(i8 signext %5, i32 11, i8* %6)
ret void
}

LLVM IR (-O2):
define void @convert_ascii_value_to_10_bit_binary(i8 signext %0, i8* %1) {
%3 = tail call i32 @convert_dec_to_x_bit_binary(i8 signext %0, i32 11, i8* %1)
ret void
}
int test_imm_77int32_reg(int val) { return ((val) & (0x77 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_77int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x77,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_77int32_reg>:
test   $0x77,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_77int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 119
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_77int32_reg(i32 %0) {
%2 = and i32 %0, 119
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ w5100_writeSn_byte(unsigned int, int, unsigned int);
void w5100_writeSnRX_RSR(unsigned sock, unsigned data) {
  w5100_writeSn_byte(sock, 0x0026, data >> 8);
  w5100_writeSn_byte(sock, 0x0026 + 1, data & 0xFF);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
mov    $0x26,%esi
call   1030 <w5100_writeSn_byte@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
and    $0xff,%edx
mov    $0x27,%esi
call   1030 <w5100_writeSn_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%edx
shr    $0x8,%edx
mov    $0x26,%esi
call   1030 <w5100_writeSn_byte@plt>
movzbl %bl,%edx
mov    %ebp,%edi
mov    $0x27,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <w5100_writeSn_byte@plt>

LLVM IR (-O0):
define void @w5100_writeSnRX_RSR(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %6, 8
%8 = call i32 @w5100_writeSn_byte(i32 %5, i32 38, i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 255
%12 = call i32 @w5100_writeSn_byte(i32 %9, i32 39, i32 %11)
ret void
}

LLVM IR (-O2):
define void @w5100_writeSnRX_RSR(i32 %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = tail call i32 @w5100_writeSn_byte(i32 %0, i32 38, i32 %3)
%5 = and i32 %1, 255
%6 = tail call i32 @w5100_writeSn_byte(i32 %0, i32 39, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ReverseN(void *, int);
void Reverse16(void *ptr) { ReverseN(ptr, 2); }


x86 assembly (clang, -O0):
<Reverse16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <ReverseN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reverse16>:
mov    $0x2,%esi
jmp    1030 <ReverseN@plt>

LLVM IR (-O0):
define void @Reverse16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ReverseN(i8* %3, i32 2)
ret void
}

LLVM IR (-O2):
define void @Reverse16(i8* %0) {
%2 = tail call i32 @ReverseN(i8* %0, i32 2)
ret void
}
double pathcon_nm3_sign(double x) { return x < 0 ? -1 : x > 0 ? 1 : x; }


x86 assembly (clang, -O0):
<pathcon_nm3_sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1129 <pathcon_nm3_sign+0x29>
movsd  0xee9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1161 <pathcon_nm3_sign+0x61>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <pathcon_nm3_sign+0x4d>
movsd  0xebd(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1157 <pathcon_nm3_sign+0x57>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm3_sign>:
xorpd  %xmm1,%xmm1
xorpd  %xmm2,%xmm2
cmpltsd %xmm0,%xmm2
movsd  0xeeb(%rip),%xmm3
andpd  %xmm2,%xmm3
andnpd %xmm0,%xmm2
orpd   %xmm3,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm1
andnpd %xmm2,%xmm1
movsd  0xed2(%rip),%xmm2
andpd  %xmm2,%xmm0
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @pathcon_nm3_sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load double, double* %2
br label %12
12: ; preds = %10, %9
%13 = phi double [ 1.000000e+00, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi double [ -1.000000e+00, %5 ], [ %13, %12 ]
ret double %15
}

LLVM IR (-O2):
define double @pathcon_nm3_sign(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = select i1 %3, double 1.000000e+00, double %0
%5 = select i1 %2, double -1.000000e+00, double %4
ret double %5
}
int test_imm_64int32_mem(int *val) {
  return ((*val) & (0x64 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_64int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x64,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_64int32_mem>:
testb  $0x64,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_64int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 100
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_64int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 100
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
unsigned long calculate_num_lines(char const *, char);
unsigned long orig_num_lines(const char *atatline) {
  return calculate_num_lines(atatline, '-');
}


x86 assembly (clang, -O0):
<orig_num_lines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2d,%esi
call   1030 <calculate_num_lines@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<orig_num_lines>:
mov    $0x2d,%esi
jmp    1030 <calculate_num_lines@plt>

LLVM IR (-O0):
define i64 @orig_num_lines(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @calculate_num_lines(i8* %3, i8 signext 45)
ret i64 %4
}

LLVM IR (-O2):
define i64 @orig_num_lines(i8* %0) {
%2 = tail call i64 @calculate_num_lines(i8* %0, i8 signext 45)
ret i64 %2
}
int test_imm_76uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x76 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_76uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x76,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_76uint64_midword_reg>:
test   $0x760000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_76uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 118
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_76uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 7733248
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_total_degree(int *d) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc(28, d, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_total_degree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1c,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_total_degree>:
mov    %rdi,%rsi
mov    $0x1c,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @syscon_total_degree(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc(i32 28, i32* %6, i32* %7, double* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @syscon_total_degree(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc(i32 28, i32* %0, i32* undef, double* undef)
ret i32 %2
}
/* Variables and functions */
int d02(int);
int d03(int a) { return d02(d02(a)); }


x86 assembly (clang, -O0):
<d03>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <d02@plt>
mov    %eax,%edi
call   1030 <d02@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d03>:
push   %rax
call   1030 <d02@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <d02@plt>

LLVM IR (-O0):
define i32 @d03(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @d02(i32 %3)
%5 = call i32 @d02(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @d03(i32 %0) {
%2 = tail call i32 @d02(i32 %0)
%3 = tail call i32 @d02(i32 %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ readl(void *);
uint32_t read_pxint(unsigned port) {
  return readl((void *)0xb0010000 + (port * 0x100) + (0x10));
}


x86 assembly (clang, -O0):
<read_pxint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,%eax
mov    $0xb0010000,%edi
add    %rax,%rdi
add    $0x10,%rdi
call   1030 <readl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_pxint>:
shl    $0x8,%edi
mov    $0xb0010010,%eax
add    %rax,%rdi
jmp    1030 <readl@plt>

LLVM IR (-O0):
define i32 @read_pxint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 256
%5 = zext i32 %4 to i64
%6 = getelementptr i8, i8* inttoptr (i64 2952855552 to i8*), i64 %5
%7 = getelementptr i8, i8* %6, i64 16
%8 = call i32 @readl(i8* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @read_pxint(i32 %0) {
%2 = shl i32 %0, 8
%3 = zext i32 %2 to i64
%4 = getelementptr i8, i8* inttoptr (i64 2952855552 to i8*), i64 %3
%5 = getelementptr i8, i8* %4, i64 16
%6 = tail call i32 @readl(i8* %5)
ret i32 %6
}
int execute_mq_timedreceive() { return 0; }


x86 assembly (clang, -O0):
<execute_mq_timedreceive>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_mq_timedreceive>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_mq_timedreceive() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_mq_timedreceive() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_CUR;
int /*<<< orphan*/ feof(int /*<<< orphan*/ *);
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int, int /*<<< orphan*/);
void goback(FILE *__stream) {
  if (!feof(__stream)) {
    fseek(__stream, -1, SEEK_CUR);
  }
}


x86 assembly (clang, -O0):
<goback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <feof@plt>
cmp    $0x0,%eax
jne    1155 <goback+0x35>
mov    -0x8(%rbp),%rdi
mov    0x2e9f(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%esi
call   1040 <fseek@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goback>:
push   %rbx
mov    %rdi,%rbx
call   1030 <feof@plt>
test   %eax,%eax
je     112f <goback+0xf>
pop    %rbx
ret
mov    0x2eb2(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    $0xffffffff,%esi
pop    %rbx
jmp    1040 <fseek@plt>

LLVM IR (-O0):
@SEEK_CUR = global i32 0
define void @goback(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @feof(i32* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = load i32, i32* @SEEK_CUR
%9 = call i32 @fseek(i32* %7, i32 -1, i32 %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@SEEK_CUR = global i32 0
define void @goback(i32* nocapture %0) {
%2 = tail call i32 @feof(i32* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = load i32, i32* @SEEK_CUR
%6 = tail call i32 @fseek(i32* %0, i32 -1, i32 %5)
br label %7
7: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
double baz(char *);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  if (baz("") != 1.0)
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xec2(%rip),%rdi
call   1040 <baz@plt>
movsd  0xead(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1168 <main+0x38>
jp     1168 <main+0x38>
jmp    116f <main+0x3f>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed0(%rip),%rdi
call   1040 <baz@plt>
ucomisd 0xebb(%rip),%xmm0
jne    1149 <main+0x19>
jnp    1150 <main+0x20>
xor    %eax,%eax
call   1030 <abort@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call double @baz(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%3 = fcmp une double %2, 1.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @main() {
%1 = tail call double @baz(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%2 = fcmp une double %1, 1.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int rand();
uint32_t get_rand() { return rand() % ((1000000000) + 1); }


x86 assembly (clang, -O0):
<get_rand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x3b9aca01,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rand>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x225c17d,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x37,%rcx
add    %edx,%ecx
imul   $0x3b9aca01,%ecx,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_rand() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 1000000001
ret i32 %2
}

LLVM IR (-O2):
define i32 @get_rand() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 1000000001
ret i32 %2
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  long long tv_sec;
  long long tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
long long microseconds(void) {
  struct timeval t;
  gettimeofday(&t, (struct timezone *)0);
  return t.tv_sec * (long long)1000000 + t.tv_usec;
}


x86 assembly (clang, -O0):
<microseconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,-0x10(%rbp),%rax
add    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<microseconds>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x8(%rsp),%rax
add    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
%struct.timezone = type { i32 }
define i64 @microseconds() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i64, i64* %3
%5 = mul nsw i64 %4, 1000000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i64, i64* %6
%8 = add nsw i64 %5, %7
ret i64 %8
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
%struct.timezone = type { i32 }
define i64 @microseconds() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i64, i64* %7
%9 = add nsw i64 %6, %8
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void insane(char *string) {
  (void)fprintf(stderr, "%s\n", string);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<insane>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<insane>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@EXIT_FAILURE = global i32 0
define void @insane(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@EXIT_FAILURE = global i32 0
define void @insane(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
void mtarch_remove(void) {}


x86 assembly (clang, -O0):
<mtarch_remove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtarch_remove>:
ret

LLVM IR (-O0):
define void @mtarch_remove() {
ret void
}

LLVM IR (-O2):
define void @mtarch_remove() {
ret void
}
int allow_mac(const char *mac) { return 1; }


x86 assembly (clang, -O0):
<allow_mac>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<allow_mac>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @allow_mac(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @allow_mac(i8* nocapture readnone %0) {
ret i32 1
}
void tr_wrapper_dummy_func(void) {}


x86 assembly (clang, -O0):
<tr_wrapper_dummy_func>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tr_wrapper_dummy_func>:
ret

LLVM IR (-O0):
define void @tr_wrapper_dummy_func() {
ret void
}

LLVM IR (-O2):
define void @tr_wrapper_dummy_func() {
ret void
}