xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ rtv_crypt_test();
int ciCryptTest(int argc, char **argv) {
  argc = argc;
  argv = argv;
  rtv_crypt_test();
  return (0);
}


x86 assembly (clang, -O0):
<ciCryptTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rtv_crypt_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ciCryptTest>:
push   %rax
xor    %eax,%eax
call   1030 <rtv_crypt_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ciCryptTest(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
store i32 %5, i32* %3
%6 = load i8**, i8*** %4
store i8** %6, i8*** %4
%7 = call i32 (...) @rtv_crypt_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @ciCryptTest(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rtv_crypt_test()
ret i32 0
}
/* Variables and functions */
int strlen(char *);
void rmch(char *str) { str[strlen(str) - 1] = '\0'; }


x86 assembly (clang, -O0):
<rmch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rmch>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @rmch(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sub nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %3, i64 %7
store i8 0, i8* %8
ret void
}

LLVM IR (-O2):
define void @rmch(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 0, i8* %5
ret void
}
/* Variables and functions */
float ceilf(float);
float floorf(float);
double fmodf(float, int);
float truncf(float x) {
  return fmodf(x, 1) == 0.0 ? x : (x < 0.0 ? ceilf(x) : floorf(x));
}


x86 assembly (clang, -O0):
<truncf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x1,%edi
call   1030 <fmodf@plt>
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    116e <truncf+0x3e>
jp     116e <truncf+0x3e>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    11b1 <truncf+0x81>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    1198 <truncf+0x68>
movss  -0x4(%rbp),%xmm0
call   1050 <ceilf@plt>
movss  %xmm0,-0xc(%rbp)
jmp    11a7 <truncf+0x77>
movss  -0x4(%rbp),%xmm0
call   1040 <floorf@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncf>:
push   %rax
movss  %xmm0,0x4(%rsp)
mov    $0x1,%edi
call   1030 <fmodf@plt>
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1155 <truncf+0x25>
jp     1155 <truncf+0x25>
movss  0x4(%rsp),%xmm0
pop    %rax
ret
xorpd  %xmm0,%xmm0
movss  0x4(%rsp),%xmm1
ucomiss %xmm1,%xmm0
movaps %xmm1,%xmm0
jbe    116d <truncf+0x3d>
pop    %rax
jmp    1050 <ceilf@plt>
pop    %rax
jmp    1040 <floorf@plt>

LLVM IR (-O0):
define float @truncf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call double @fmodf(float %3, i32 1)
%5 = fcmp oeq double %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load float, float* %2
br label %20
8: ; preds = %1
%9 = load float, float* %2
%10 = fpext float %9 to double
%11 = fcmp olt double %10, 0.000000e+00
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load float, float* %2
%14 = call float @llvm.ceil.f32(float %13)
br label %18
15: ; preds = %8
%16 = load float, float* %2
%17 = call float @llvm.floor.f32(float %16)
br label %18
18: ; preds = %15, %12
%19 = phi float [ %14, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %6
%21 = phi float [ %7, %6 ], [ %19, %18 ]
ret float %21
}

LLVM IR (-O2):
define float @truncf(float %0) {
%2 = tail call double @fmodf(float %0, i32 1)
%3 = fcmp oeq double %2, 0.000000e+00
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = fcmp olt float %0, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call float @llvm.ceil.f32(float %0)
br label %10
8: ; preds = %4
%9 = tail call float @llvm.floor.f32(float %0)
br label %10
10: ; preds = %1, %6, %8
%11 = phi float [ %7, %6 ], [ %9, %8 ], [ %0, %1 ]
ret float %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void ext_dev_write_16(uint32_t addr, uint16_t val, void *ctxt) {}


x86 assembly (clang, -O0):
<ext_dev_write_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext_dev_write_16>:
ret

LLVM IR (-O0):
define void @ext_dev_write_16(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @ext_dev_write_16(i32 %0, i32 %1, i8* nocapture %2) {
ret void
}
unsigned char readbiosb(unsigned short addr) {
  unsigned char v;
  asm("movw %2,%%fs ; "
      "movb %%fs:%1,%0"
      : "=abcd"(v)
      : "m"(*(unsigned char *)(unsigned int)addr), "r"((unsigned short)0));
  return v;
}


x86 assembly (clang, -O0):
<readbiosb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
mov    %eax,%eax
xor    %ecx,%ecx
mov    %ecx,%fs
mov    %fs:(%rax),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readbiosb>:
mov    %edi,%eax
xor    %ecx,%ecx
mov    %ecx,%fs
mov    %fs:(%rax),%al
ret

LLVM IR (-O0):
define zeroext i8 @readbiosb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
%8 = call i8 asm "movw $2,%fs ; movb %fs:$1,$0", "={ax}{bx}{cx}{dx},*m,r,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %7, i16 0)
store i8 %8, i8* %3
%9 = load i8, i8* %3
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @readbiosb(i16 zeroext %0) {
%2 = zext i16 %0 to i64
%3 = inttoptr i64 %2 to i8*
%4 = tail call i8 asm "movw $2,%fs ; movb %fs:$1,$0", "={ax}{bx}{cx}{dx},*m,r,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3, i16 0)
ret i8 %4
}
void file2_func2(void) { return; }


x86 assembly (clang, -O0):
<file2_func2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file2_func2>:
ret

LLVM IR (-O0):
define void @file2_func2() {
ret void
}

LLVM IR (-O2):
define void @file2_func2() {
ret void
}
unsigned xrop3_5_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D | T;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_5_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_5_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
not    %eax
and    %esi,%eax
shl    $0x8,%esi
or     %esi,%eax
xor    $0xffffff00,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_5_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %7
%23 = or i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = xor i32 %24, -1
store i32 %25, i32* %8
%26 = load i32, i32* %8
%27 = load i32, i32* %6
%28 = and i32 %26, %27
%29 = load i32, i32* %8
%30 = load i32, i32* %7
%31 = xor i32 %30, -1
%32 = and i32 %29, %31
%33 = or i32 %28, %32
%34 = load i32, i32* %7
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = and i32 %37, %38
%40 = or i32 %33, %39
ret i32 %40
}

LLVM IR (-O2):
define i32 @xrop3_5_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = xor i32 %4, -1
%8 = and i32 %7, %5
%9 = or i32 %8, %6
%10 = xor i32 %9, -256
ret i32 %10
}
void gtk_accel_label_get_accel_width() {}


x86 assembly (clang, -O0):
<gtk_accel_label_get_accel_width>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accel_label_get_accel_width>:
ret

LLVM IR (-O0):
define void @gtk_accel_label_get_accel_width() {
ret void
}

LLVM IR (-O2):
define void @gtk_accel_label_get_accel_width() {
ret void
}
int test_imm_B3uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xB3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B3uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xb3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B3uint64_midword_mem>:
testb  $0xb3,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B3uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 179
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B3uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 11730944
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int mlock(void const *, size_t);
int syscall(int, void const *, size_t, unsigned int);
int mlock2(const void *addr, size_t len, unsigned flags) {
  if (flags == 0)
    return mlock(addr, len);
  return syscall(390, addr, len, flags);
}


x86 assembly (clang, -O0):
<mlock2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    1152 <mlock2+0x32>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <mlock@plt>
mov    %eax,-0x4(%rbp)
jmp    116a <mlock2+0x4a>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x186,%edi
call   1040 <syscall@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlock2>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
test   %ecx,%ecx
je     1136 <mlock2+0x16>
mov    $0x186,%edi
jmp    1040 <syscall@plt>
mov    %rsi,%rdi
mov    %rdx,%rsi
jmp    1030 <mlock@plt>

LLVM IR (-O0):
define i32 @mlock2(i8* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @mlock(i8* %11, i64 %12)
store i32 %13, i32* %4
br label %19
14: ; preds = %3
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = load i32, i32* %7
%18 = call i32 @syscall(i32 390, i8* %15, i64 %16, i32 %17)
store i32 %18, i32* %4
br label %19
19: ; preds = %14, %10
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @mlock2(i8* %0, i64 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @mlock(i8* %0, i64 %1)
br label %9
7: ; preds = %3
%8 = tail call i32 @syscall(i32 390, i8* %0, i64 %1, i32 %2)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
int lgff_init(struct hid_device *hdev) { return -1; }


x86 assembly (clang, -O0):
<lgff_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lgff_init>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.hid_device = type opaque
define i32 @lgff_init(%struct.hid_device* %0) {
%2 = alloca %struct.hid_device*
store %struct.hid_device* %0, %struct.hid_device** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.hid_device = type opaque
define i32 @lgff_init(%struct.hid_device* nocapture readnone %0) {
ret i32 -1
}
void outw(unsigned short _port, unsigned short _data) {
  __asm__ __volatile__("out %%ax, %%dx" : : "d"(_port), "a"(_data));
}


x86 assembly (clang, -O0):
<outw>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x4(%rbp),%ax
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw>:
mov    %esi,%eax
mov    %edi,%edx
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @outw(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @outw(i16 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "out %ax, %dx", "{dx},{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i16 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ queueFrameInvalidationTuple(int, int);
void connectionDetectedFrameLoss(int startFrame, int endFrame) {
  queueFrameInvalidationTuple(startFrame, endFrame);
}


x86 assembly (clang, -O0):
<connectionDetectedFrameLoss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <queueFrameInvalidationTuple@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<connectionDetectedFrameLoss>:
jmp    1030 <queueFrameInvalidationTuple@plt>

LLVM IR (-O0):
define void @connectionDetectedFrameLoss(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @queueFrameInvalidationTuple(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @connectionDetectedFrameLoss(i32 %0, i32 %1) {
%3 = tail call i32 @queueFrameInvalidationTuple(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
float tanf(float);
float HMM_TanF(float Radians) {
  ;
  float Result = tanf(Radians);
  return (Result);
}


x86 assembly (clang, -O0):
<HMM_TanF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <tanf@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMM_TanF>:
jmp    1030 <tanf@plt>

LLVM IR (-O0):
define float @HMM_TanF(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @tanf(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @HMM_TanF(float %0) {
%2 = tail call float @tanf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ lseek(int, unsigned long, int /*<<< orphan*/);
int open(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ write(int, int /*<<< orphan*/, int /*<<< orphan*/);
truncate(const char *fn, unsigned long where) {
  int fd = open(fn, O_WRONLY);
  if (fd < 0)
    return -1;
  lseek(fd, where, 0);
  write(fd, 0, 0);
  close(fd);
}


x86 assembly (clang, -O0):
<truncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2e7d(%rip),%rax
mov    (%rax),%esi
call   1060 <open@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    117b <truncate+0x3b>
movl   $0xffffffff,-0x4(%rbp)
jmp    119d <truncate+0x5d>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
xor    %edx,%edx
call   1040 <lseek@plt>
mov    -0x1c(%rbp),%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <write@plt>
mov    -0x1c(%rbp),%edi
call   1050 <close@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncate>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    0x2e8a(%rip),%rax
mov    (%rax),%esi
call   1060 <open@plt>
test   %eax,%eax
js     1179 <truncate+0x39>
mov    %eax,%ebx
mov    %eax,%edi
mov    %r14,%rsi
xor    %edx,%edx
call   1040 <lseek@plt>
mov    %ebx,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <write@plt>
mov    %ebx,%edi
call   1050 <close@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@O_WRONLY = global i32 0
define i32 @truncate(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* @O_WRONLY
%9 = call i32 @open(i8* %7, i32 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %3
br label %21
13: ; preds = %2
%14 = load i32, i32* %6
%15 = load i64, i64* %5
%16 = call i32 @lseek(i32 %14, i64 %15, i32 0)
%17 = load i32, i32* %6
%18 = call i32 @write(i32 %17, i32 0, i32 0)
%19 = load i32, i32* %6
%20 = call i32 @close(i32 %19)
br label %21
21: ; preds = %13, %12
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
define i32 @truncate(i8* nocapture %0, i64 %1) {
%3 = load i32, i32* @O_WRONLY
%4 = tail call i32 @open(i8* %0, i32 %3)
%5 = icmp slt i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @lseek(i32 %4, i64 %1, i32 0)
%8 = tail call i32 @write(i32 %4, i32 0, i32 0)
%9 = tail call i32 @close(i32 %4)
br label %10
10: ; preds = %2, %6
ret i32 -1
}
char dfn_rc(void) { return 1; }


x86 assembly (clang, -O0):
<dfn_rc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfn_rc>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @dfn_rc() {
ret i8 1
}

LLVM IR (-O2):
define signext i8 @dfn_rc() {
ret i8 1
}
void __attribute__((weak)) _init(void) { ; }


x86 assembly (clang, -O0):
<_init>:
endbr64
sub    $0x8,%rsp
mov    0x2fd9(%rip),%rax
test   %rax,%rax
je     1016 <_init+0x16>
call   *%rax
add    $0x8,%rsp
ret

x86 assembly (clang, -O2):
<_init>:
endbr64
sub    $0x8,%rsp
mov    0x2fd9(%rip),%rax
test   %rax,%rax
je     1016 <_init+0x16>
call   *%rax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define weak void @_init() {
ret void
}

LLVM IR (-O2):
define weak void @_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ temp_C2F(int);
int windchill_F(int /*<<< orphan*/, int);
int windchill_C(int temp_C, int windspeed) {
  if (temp_C == 999 || windspeed < 0)
    return 999;
  return windchill_F(temp_C2F(temp_C), windspeed);
}


x86 assembly (clang, -O0):
<windchill_C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x3e7,-0x8(%rbp)
je     1145 <windchill_C+0x25>
cmpl   $0x0,-0xc(%rbp)
jge    1151 <windchill_C+0x31>
movl   $0x3e7,-0x4(%rbp)
jmp    1166 <windchill_C+0x46>
mov    -0x8(%rbp),%edi
call   1040 <temp_C2F@plt>
mov    %eax,%edi
mov    -0xc(%rbp),%esi
call   1030 <windchill_F@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<windchill_C>:
push   %rbx
cmp    $0x3e7,%edi
je     113e <windchill_C+0x1e>
mov    %esi,%ebx
test   %esi,%esi
js     113e <windchill_C+0x1e>
call   1040 <temp_C2F@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <windchill_F@plt>
mov    $0x3e7,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @windchill_C(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 999
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 999, i32* %3
br label %17
12: ; preds = %8
%13 = load i32, i32* %4
%14 = call i32 @temp_C2F(i32 %13)
%15 = load i32, i32* %5
%16 = call i32 @windchill_F(i32 %14, i32 %15)
store i32 %16, i32* %3
br label %17
17: ; preds = %12, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @windchill_C(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 999
%4 = icmp slt i32 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = tail call i32 @temp_C2F(i32 %0)
%8 = tail call i32 @windchill_F(i32 %7, i32 %1)
br label %9
9: ; preds = %2, %6
%10 = phi i32 [ %8, %6 ], [ 999, %2 ]
ret i32 %10
}
void _on_stepped(struct mb_interpreter_t *s, int p, unsigned short row,
                 unsigned short col) {
  ((void)(s));
  ((void)(p));
  ((void)(row));
  ((void)(col));
}


x86 assembly (clang, -O0):
<_on_stepped>:
push   %rbp
mov    %rsp,%rbp
mov    %cx,%ax
mov    %dx,%cx
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %cx,-0xe(%rbp)
mov    %ax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_on_stepped>:
ret

LLVM IR (-O0):
%struct.mb_interpreter_t = type opaque
define void @_on_stepped(%struct.mb_interpreter_t* %0, i32 %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca %struct.mb_interpreter_t*
%6 = alloca i32
%7 = alloca i16
%8 = alloca i16
store %struct.mb_interpreter_t* %0, %struct.mb_interpreter_t** %5
store i32 %1, i32* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%9 = load %struct.mb_interpreter_t*, %struct.mb_interpreter_t** %5
%10 = load i32, i32* %6
%11 = load i16, i16* %7
%12 = load i16, i16* %8
ret void
}

LLVM IR (-O2):
%struct.mb_interpreter_t = type opaque
define void @_on_stepped(%struct.mb_interpreter_t* nocapture %0, i32 %1, i16 zeroext %2, i16 zeroext %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
void tcsetpgrp_error() { perror("tcsetpgrp error"); }


x86 assembly (clang, -O0):
<tcsetpgrp_error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <perror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcsetpgrp_error>:
lea    0xee9(%rip),%rdi
jmp    1030 <perror@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"tcsetpgrp error\00"
define void @tcsetpgrp_error() {
%1 = call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"tcsetpgrp error\00"
define void @tcsetpgrp_error() {
%1 = tail call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_68rs08(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_68rs08>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_68rs08>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_68rs08() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_68rs08() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
void pci_aer_exit(struct pci_dev *d) {}


x86 assembly (clang, -O0):
<pci_aer_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_aer_exit>:
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define void @pci_aer_exit(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define void @pci_aer_exit(%struct.pci_dev* nocapture %0) {
ret void
}
int max3(int a, int b, int c) {
  int temp;
  temp = a < b ? b : a;
  return temp < c ? c : temp;
}


x86 assembly (clang, -O0):
<max3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <max3+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    112a <max3+0x2a>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1147 <max3+0x47>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    114d <max3+0x4d>
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max3>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
cmp    %edx,%eax
cmovl  %edx,%eax
ret

LLVM IR (-O0):
define i32 @max3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %5
br label %15
13: ; preds = %3
%14 = load i32, i32* %4
br label %15
15: ; preds = %13, %11
%16 = phi i32 [ %12, %11 ], [ %14, %13 ]
store i32 %16, i32* %7
%17 = load i32, i32* %7
%18 = load i32, i32* %6
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load i32, i32* %6
br label %24
22: ; preds = %15
%23 = load i32, i32* %7
br label %24
24: ; preds = %22, %20
%25 = phi i32 [ %21, %20 ], [ %23, %22 ]
ret i32 %25
}

LLVM IR (-O2):
define i32 @max3(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = select i1 %4, i32 %1, i32 %0
%6 = icmp slt i32 %5, %2
%7 = select i1 %6, i32 %2, i32 %5
ret i32 %7
}
/* Variables and functions */
int CANBaseValid(unsigned long);
unsigned long CANRegRead(unsigned long);
int /*<<< orphan*/ CANRegWrite(unsigned long, unsigned long);
int /*<<< orphan*/ DEBUG_ASSERT(int);
void CANIntEnable(unsigned long ulBase, unsigned long ulIntFlags) {
  DEBUG_ASSERT(CANBaseValid(ulBase));
  DEBUG_ASSERT((ulIntFlags & ~(0x00000008 | 0x00000004 | 0x00000002)) == 0);
  CANRegWrite(ulBase + 0x00000000,
              CANRegRead(ulBase + 0x00000000) | ulIntFlags);
}


x86 assembly (clang, -O0):
<CANIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <CANBaseValid@plt>
mov    %eax,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
and    $0xfffffffffffffff1,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
add    $0x0,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x0,%rdi
call   1040 <CANRegRead@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rsi
or     -0x10(%rbp),%rsi
call   1030 <CANRegWrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANIntEnable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1060 <CANBaseValid@plt>
mov    %eax,%edi
call   1050 <DEBUG_ASSERT@plt>
xor    %edi,%edi
test   $0xfffffffffffffff1,%rbx
sete   %dil
call   1050 <DEBUG_ASSERT@plt>
mov    %r14,%rdi
call   1040 <CANRegRead@plt>
or     %rax,%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <CANRegWrite@plt>

LLVM IR (-O0):
define void @CANIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @CANBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %4
%9 = and i64 %8, -15
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @DEBUG_ASSERT(i32 %11)
%13 = load i64, i64* %3
%14 = add i64 %13, 0
%15 = load i64, i64* %3
%16 = add i64 %15, 0
%17 = call i64 @CANRegRead(i64 %16)
%18 = load i64, i64* %4
%19 = or i64 %17, %18
%20 = call i32 @CANRegWrite(i64 %14, i64 %19)
ret void
}

LLVM IR (-O2):
define void @CANIntEnable(i64 %0, i64 %1) {
%3 = tail call i32 @CANBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = and i64 %1, -15
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @DEBUG_ASSERT(i32 %7)
%9 = tail call i64 @CANRegRead(i64 %0)
%10 = or i64 %9, %1
%11 = tail call i32 @CANRegWrite(i64 %0, i64 %10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_SETFD;
int /*<<< orphan*/ O_CLOEXEC;
int /*<<< orphan*/ dief(char *, int);
int fcntl(int, int /*<<< orphan*/, int /*<<< orphan*/);
void set_cloexec(int fd) {
  if (fcntl(fd, F_SETFD, O_CLOEXEC) == -1)
    dief("failed to set O_CLOEXEC to fd %d", fd);
}


x86 assembly (clang, -O0):
<set_cloexec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
mov    0x2e92(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
cmp    $0xffffffff,%eax
jne    115d <set_cloexec+0x3d>
mov    -0x4(%rbp),%esi
lea    0xea8(%rip),%rdi
call   1040 <dief@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_cloexec>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
mov    0x2e9d(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
cmp    $0xffffffff,%eax
je     1141 <set_cloexec+0x21>
pop    %rbx
ret
lea    0xeb8(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <dief@plt>

LLVM IR (-O0):
@F_SETFD = global i32 0
@O_CLOEXEC = global i32 0
@.str = [33 x i8] c"failed to set O_CLOEXEC to fd %d\00"
define void @set_cloexec(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_SETFD
%5 = load i32, i32* @O_CLOEXEC
%6 = call i32 @fcntl(i32 %3, i32 %4, i32 %5)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @dief(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %11
11: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
@F_SETFD = global i32 0
@O_CLOEXEC = global i32 0
@.str = [33 x i8] c"failed to set O_CLOEXEC to fd %d\00"
define void @set_cloexec(i32 %0) {
%2 = load i32, i32* @F_SETFD
%3 = load i32, i32* @O_CLOEXEC
%4 = tail call i32 @fcntl(i32 %0, i32 %2, i32 %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @dief(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %8
8: ; preds = %6, %1
ret void
}
/* Variables and functions */
int fclose(void *);
int default_fclose(void *f) { return fclose(f); }


x86 assembly (clang, -O0):
<default_fclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_fclose>:
jmp    1030 <fclose@plt>

LLVM IR (-O0):
define i32 @default_fclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fclose(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @default_fclose(i8* nocapture %0) {
%2 = tail call i32 @fclose(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ safe_fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ safe_fputs(char *, int /*<<< orphan*/ *);
void version(FILE *out, char *cmd) {
  if (cmd == NULL)
    safe_fputs("``m'' Version 0.1\n", out);
  else
    safe_fprintf(out, "``m'' %s\n", cmd);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <version+0x30>
mov    -0x8(%rbp),%rsi
lea    0xeba(%rip),%rdi
call   1040 <safe_fputs@plt>
jmp    1164 <version+0x44>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xeb4(%rip),%rsi
call   1030 <safe_fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
mov    %rdi,%rax
test   %rsi,%rsi
je     113a <version+0x1a>
mov    %rsi,%rdx
lea    0xee1(%rip),%rsi
mov    %rax,%rdi
jmp    1030 <safe_fprintf@plt>
lea    0xebf(%rip),%rdi
mov    %rax,%rsi
jmp    1040 <safe_fputs@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"``m'' Version 0.1\0A\00"
@.str.1 = [10 x i8] c"``m'' %s\0A\00"
define void @version(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = call i32 @safe_fputs(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32* %8)
br label %14
10: ; preds = %2
%11 = load i32*, i32** %3
%12 = load i8*, i8** %4
%13 = call i32 @safe_fprintf(i32* %11, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %12)
br label %14
14: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"``m'' Version 0.1\0A\00"
@.str.1 = [10 x i8] c"``m'' %s\0A\00"
define void @version(i32* %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @safe_fputs(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32* %0)
br label %8
6: ; preds = %2
%7 = tail call i32 @safe_fprintf(i32* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %1)
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
char const *mu_bool_var_name(int);
const char *get_mu_bool_var_name(int bdd_idx) {
  return (mu_bool_var_name((((bdd_idx) >> 1) + 1)));
}


x86 assembly (clang, -O0):
<get_mu_bool_var_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x1,%edi
add    $0x1,%edi
call   1030 <mu_bool_var_name@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_mu_bool_var_name>:
sar    %edi
add    $0x1,%edi
jmp    1030 <mu_bool_var_name@plt>

LLVM IR (-O0):
define i8* @get_mu_bool_var_name(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 1
%5 = add nsw i32 %4, 1
%6 = call i8* @mu_bool_var_name(i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @get_mu_bool_var_name(i32 %0) {
%2 = ashr i32 %0, 1
%3 = add nsw i32 %2, 1
%4 = tail call i8* @mu_bool_var_name(i32 %3)
ret i8* %4
}
int fix_angle(int angle) {
  while (angle < -1800)
    angle += 3600;
  while (angle > 1800)
    angle -= 3600;
  return (angle);
}


x86 assembly (clang, -O0):
<fix_angle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xfffff8f8,-0x4(%rbp)
jge    1124 <fix_angle+0x24>
mov    -0x4(%rbp),%eax
add    $0xe10,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <fix_angle+0x7>
jmp    1129 <fix_angle+0x29>
cmpl   $0x708,-0x4(%rbp)
jle    1146 <fix_angle+0x46>
mov    -0x4(%rbp),%eax
sub    $0xe10,%eax
mov    %eax,-0x4(%rbp)
jmp    1129 <fix_angle+0x29>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fix_angle>:
cmp    $0xfffff8f9,%edi
mov    $0xfffff8f8,%eax
cmovge %edi,%eax
xor    %ecx,%ecx
sub    %edi,%eax
setne  %cl
sub    %ecx,%eax
mov    $0x91a2b3c5,%edx
imul   %rdx,%rax
shr    $0x2b,%rax
add    %ecx,%eax
imul   $0xe10,%eax,%ecx
add    %edi,%ecx
cmp    $0x708,%ecx
mov    $0x708,%eax
cmovl  %ecx,%eax
mov    %ecx,%esi
sub    %eax,%esi
add    $0xe0f,%esi
imul   %rsi,%rdx
shr    $0x2b,%rdx
imul   $0xe10,%edx,%edx
mov    %esi,%eax
sub    %edx,%eax
sub    %esi,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fix_angle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %6, %1
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, -1800
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 3600
store i32 %8, i32* %2
br label %3
9: ; preds = %3
br label %10
10: ; preds = %13, %9
%11 = load i32, i32* %2
%12 = icmp sgt i32 %11, 1800
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 3600
store i32 %15, i32* %2
br label %10
16: ; preds = %10
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fix_angle(i32 %0) {
%2 = call i32 @llvm.smax.i32(i32 %0, i32 -1800)
%3 = sub i32 %2, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
%6 = sub i32 %3, %5
%7 = udiv i32 %6, 3600
%8 = add nuw nsw i32 %7, %5
%9 = mul i32 %8, 3600
%10 = add i32 %9, %0
%11 = add i32 %10, 3599
%12 = call i32 @llvm.smin.i32(i32 %10, i32 1800)
%13 = sub i32 %11, %12
%14 = urem i32 %13, 3600
%15 = sub i32 %14, %13
%16 = add i32 %15, %10
ret i32 %16
}
/* Variables and functions */
scalar_t__ Xmalloc(unsigned long);
void *ag_Xmalloc(unsigned long bytes) { return (void *)Xmalloc(bytes); }


x86 assembly (clang, -O0):
<ag_Xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Xmalloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ag_Xmalloc>:
jmp    1030 <Xmalloc@plt>

LLVM IR (-O0):
define i8* @ag_Xmalloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @Xmalloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @ag_Xmalloc(i64 %0) {
%2 = tail call i64 @Xmalloc(i64 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
void wirksam(int *a, int b) { *a = *a + b; }


x86 assembly (clang, -O0):
<wirksam>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wirksam>:
add    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @wirksam(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
%9 = load i32*, i32** %3
store i32 %8, i32* %9
ret void
}

LLVM IR (-O2):
define void @wirksam(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = add nsw i32 %3, %1
store i32 %4, i32* %0
ret void
}
/* Type definitions */
struct gffGene {
  int dummy;
};
struct gff {
  int dummy;
};

/* Variables and functions */
struct gffGene *gffDupeGeneAndSurrounds(struct gff *, struct gffGene *,
                                        int /*<<< orphan*/, int /*<<< orphan*/);
struct gffGene *gffDupeGene(struct gff *gff, struct gffGene *oldGene) {
  return gffDupeGeneAndSurrounds(gff, oldGene, 0, 0);
}


x86 assembly (clang, -O0):
<gffDupeGene>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <gffDupeGeneAndSurrounds@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gffDupeGene>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <gffDupeGeneAndSurrounds@plt>

LLVM IR (-O0):
%struct.gff = type { i32 }
%struct.gffGene = type { i32 }
define %struct.gffGene* @gffDupeGene(%struct.gff* %0, %struct.gffGene* %1) {
%3 = alloca %struct.gff*
%4 = alloca %struct.gffGene*
store %struct.gff* %0, %struct.gff** %3
store %struct.gffGene* %1, %struct.gffGene** %4
%5 = load %struct.gff*, %struct.gff** %3
%6 = load %struct.gffGene*, %struct.gffGene** %4
%7 = call %struct.gffGene* @gffDupeGeneAndSurrounds(%struct.gff* %5, %struct.gffGene* %6, i32 0, i32 0)
ret %struct.gffGene* %7
}

LLVM IR (-O2):
%struct.gff = type { i32 }
%struct.gffGene = type { i32 }
define %struct.gffGene* @gffDupeGene(%struct.gff* %0, %struct.gffGene* %1) {
%3 = tail call %struct.gffGene* @gffDupeGeneAndSurrounds(%struct.gff* %0, %struct.gffGene* %1, i32 0, i32 0)
ret %struct.gffGene* %3
}
/* Type definitions */
struct bufferevent {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dump_task_list(void *, struct bufferevent *);
void get_client_status(struct bufferevent *bev, void *ctx) {
  dump_task_list(ctx, bev);
}


x86 assembly (clang, -O0):
<get_client_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <dump_task_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_client_status>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <dump_task_list@plt>

LLVM IR (-O0):
%struct.bufferevent = type { i32 }
define void @get_client_status(%struct.bufferevent* %0, i8* %1) {
%3 = alloca %struct.bufferevent*
%4 = alloca i8*
store %struct.bufferevent* %0, %struct.bufferevent** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load %struct.bufferevent*, %struct.bufferevent** %3
%7 = call i32 @dump_task_list(i8* %5, %struct.bufferevent* %6)
ret void
}

LLVM IR (-O2):
%struct.bufferevent = type { i32 }
define void @get_client_status(%struct.bufferevent* %0, i8* %1) {
%3 = tail call i32 @dump_task_list(i8* %1, %struct.bufferevent* %0)
ret void
}
int test_imm_7Cint32_reg(int val) { return ((val) & (0x7C << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_7Cint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x7c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Cint32_reg>:
test   $0x7c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Cint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 124
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_7Cint32_reg(i32 %0) {
%2 = and i32 %0, 124
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(char *, int, size_t, int /*<<< orphan*/ *);
int /*<<< orphan*/ stb_fput_varlenu(int /*<<< orphan*/ *, size_t);
size_t strlen(char *);
void stb_fput_string(FILE *f, char *s) {
  size_t len = strlen(s);
  stb_fput_varlenu(f, len);
  fwrite(s, 1, len, f);
}


x86 assembly (clang, -O0):
<stb_fput_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <stb_fput_varlenu@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1050 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb_fput_string>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <stb_fput_varlenu@plt>
mov    %r15,%rdi
mov    $0x1,%esi
mov    %rbx,%rdx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <fwrite@plt>

LLVM IR (-O0):
define void @stb_fput_string(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i64
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %5
%8 = load i32*, i32** %3
%9 = load i64, i64* %5
%10 = call i32 @stb_fput_varlenu(i32* %8, i64 %9)
%11 = load i8*, i8** %4
%12 = load i64, i64* %5
%13 = load i32*, i32** %3
%14 = call i32 @fwrite(i8* %11, i32 1, i64 %12, i32* %13)
ret void
}

LLVM IR (-O2):
define void @stb_fput_string(i32* %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 @stb_fput_varlenu(i32* %0, i64 %3)
%5 = tail call i32 @fwrite(i8* %1, i32 1, i64 %3, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MAP_HUGETLB;
int /*<<< orphan*/ mmap_chunks_lower(int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void alloc_16m_below_hint() {
  printf("Allocating 16M chunks < 128TB \n");
  mmap_chunks_lower(64, MAP_HUGETLB);
}


x86 assembly (clang, -O0):
<alloc_16m_below_hint>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    $0x40,%edi
call   1040 <mmap_chunks_lower@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_16m_below_hint>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
mov    $0x40,%edi
pop    %rax
jmp    1040 <mmap_chunks_lower@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Allocating 16M chunks < 128TB \0A\00"
@MAP_HUGETLB = global i32 0
define void @alloc_16m_below_hint() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @MAP_HUGETLB
%3 = call i32 @mmap_chunks_lower(i32 64, i32 %2)
ret void
}

LLVM IR (-O2):
@MAP_HUGETLB = global i32 0
@str = [31 x i8] c"Allocating 16M chunks < 128TB \00"
define void @alloc_16m_below_hint() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @MAP_HUGETLB
%3 = tail call i32 @mmap_chunks_lower(i32 64, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x70() {
  Assert_real((isxdigit(112) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              565, ("isxdigit should be 0 for p"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x70>:
push   %rbp
mov    %rsp,%rbp
mov    $0x70,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x235,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x70>:
push   %rax
mov    $0x70,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x235,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for p\00"
define void @t_isxdigit_0x70() {
%1 = call i64 @isxdigit(i32 112)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 565, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for p\00"
define void @t_isxdigit_0x70() {
%1 = tail call i64 @isxdigit(i32 112)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 565, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}