xunge/DecIR huggingface dataset:
int classify_char(char c) {
  switch (c) {
  case '0' ... '9':
  case '.':
    return 3;
  case '+':
  case '-':
  case '*':
  case '/':
    return 2;
  case '(':
    return 4;
  case ')':
    return 5;
  case ' ':
  case '\n':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<classify_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xfffffff6,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x2f,%eax
ja     1175 <classify_char+0x75>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    1139 <classify_char+0x39>
movl   $0x3,-0x4(%rbp)
jmp    117c <classify_char+0x7c>
movl   $0x2,-0x4(%rbp)
jmp    117c <classify_char+0x7c>
movl   $0x4,-0x4(%rbp)
jmp    117c <classify_char+0x7c>
movl   $0x5,-0x4(%rbp)
jmp    117c <classify_char+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    117c <classify_char+0x7c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<classify_char>:
add    $0xfffffff6,%edi
cmp    $0x2f,%edi
ja     112a <classify_char+0x2a>
mov    $0x3,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
mov    $0x2,%eax
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret
mov    $0x4,%eax
ret
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @classify_char(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %12 [
i32 46, label %7
i32 48, label %6
i32 49, label %6
i32 50, label %6
i32 51, label %6
i32 52, label %6
i32 53, label %6
i32 54, label %6
i32 55, label %6
i32 56, label %6
i32 57, label %6
i32 43, label %8
i32 45, label %8
i32 42, label %8
i32 47, label %8
i32 40, label %9
i32 41, label %10
i32 32, label %11
i32 10, label %11
]
6: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
br label %7
7: ; preds = %1, %6
store i32 3, i32* %2
br label %13
8: ; preds = %1, %1, %1, %1
store i32 2, i32* %2
br label %13
9: ; preds = %1
store i32 4, i32* %2
br label %13
10: ; preds = %1
store i32 5, i32* %2
br label %13
11: ; preds = %1, %1
store i32 1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11, %10, %9, %8, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @classify_char(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %7 [
i32 46, label %8
i32 48, label %8
i32 49, label %8
i32 50, label %8
i32 51, label %8
i32 52, label %8
i32 53, label %8
i32 54, label %8
i32 55, label %8
i32 56, label %8
i32 57, label %8
i32 43, label %3
i32 45, label %3
i32 42, label %3
i32 47, label %3
i32 40, label %4
i32 41, label %5
i32 32, label %6
i32 10, label %6
]
3: ; preds = %1, %1, %1, %1
br label %8
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1, %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %7, %6, %5, %4, %3
%9 = phi i32 [ 0, %7 ], [ 1, %6 ], [ 5, %5 ], [ 4, %4 ], [ 2, %3 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ], [ 3, %1 ]
ret i32 %9
}
/* Variables and functions */
int fcntl(int, int, int);
int ari_fcntlVi(int fildes, int cmd, int val) {
  return fcntl(fildes, cmd, val);
}


x86 assembly (clang, -O0):
<ari_fcntlVi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ari_fcntlVi>:
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
define i32 @ari_fcntlVi(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @fcntl(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @ari_fcntlVi(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @fcntl(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
void __attribute__((section(".after_vectors"))) SysTick_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<SysTick_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <SysTick_Handler+0x9>
jmp    1109 <SysTick_Handler+0x9>

x86 assembly (clang, -O2):
<SysTick_Handler>:
jmp    1100 <SysTick_Handler>

LLVM IR (-O0):
define void @SysTick_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @SysTick_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x7b() {
  Assert_real((isalnum(123) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              620, ("isalnum should be 0 for {"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x7b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7b,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x26c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x7b>:
push   %rax
mov    $0x7b,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x26c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for {\00"
define void @t_isalnum_0x7b() {
%1 = call i64 @isalnum(i32 123)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 620, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for {\00"
define void @t_isalnum_0x7b() {
%1 = tail call i64 @isalnum(i32 123)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 620, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int chdir(char *);
int cd(char **command) { return chdir(command[1]); }


x86 assembly (clang, -O0):
<cd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <chdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cd>:
mov    0x8(%rdi),%rdi
jmp    1030 <chdir@plt>

LLVM IR (-O0):
define i32 @cd(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 1
%5 = load i8*, i8** %4
%6 = call i32 @chdir(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @cd(i8** nocapture %0) {
%2 = getelementptr inbounds i8*, i8** %0, i64 1
%3 = load i8*, i8** %2
%4 = tail call i32 @chdir(i8* %3)
ret i32 %4
}
void delay(int sed) {
  int i, j;
  for (i = 0; i < sed; ++i) {
    for (j = 0; j < sed; ++j) {
      ;
    }
  }
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1153 <delay+0x53>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1140 <delay+0x40>
jmp    1132 <delay+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <delay+0x21>
jmp    1145 <delay+0x45>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <delay+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
ret

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %22
9: ; preds = %5
store i32 0, i32* %4
br label %10
10: ; preds = %15, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %2
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %18
14: ; preds = %10
br label %15
15: ; preds = %14
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %10
18: ; preds = %10
br label %19
19: ; preds = %18
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %5
22: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
ret void
}
int number_spaces(int spaces_result, int current_number_spaces) {
  if (spaces_result == 7) {
    current_number_spaces++;
  }
  return current_number_spaces;
}


x86 assembly (clang, -O0):
<number_spaces>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x7,-0x4(%rbp)
jne    111d <number_spaces+0x1d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<number_spaces>:
xor    %eax,%eax
cmp    $0x7,%edi
sete   %al
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @number_spaces(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 7
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 1
store i32 %9, i32* %4
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @number_spaces(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 7
%4 = zext i1 %3 to i32
%5 = add nsw i32 %4, %1
ret i32 %5
}
unsigned int __kfifo_uint_must_check_helper(unsigned int val) { return val; }


x86 assembly (clang, -O0):
<__kfifo_uint_must_check_helper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__kfifo_uint_must_check_helper>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @__kfifo_uint_must_check_helper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @__kfifo_uint_must_check_helper(i32 returned %0) {
ret i32 %0
}
void test_two(int x, int y) {
#pragma omp taskloop simd
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      ;
}


x86 assembly (clang, -O0):
<test_two>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1156 <test_two+0x56>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1143 <test_two+0x43>
jmp    1135 <test_two+0x35>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1124 <test_two+0x24>
jmp    1148 <test_two+0x48>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <test_two+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_two>:
ret

LLVM IR (-O0):
define void @test_two(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
store i32 0, i32* %6
br label %12
12: ; preds = %17, %11
%13 = load i32, i32* %6
%14 = load i32, i32* %4
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
br label %17
17: ; preds = %16
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
br label %12
20: ; preds = %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @test_two(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m256;

/* Variables and functions */
int /*<<< orphan*/ _mm256_frcz_ps(int /*<<< orphan*/);
__m256 __attribute__((__target__("xop"))) mm256_frcz_ps_wrap(__m256 a) {
  return _mm256_frcz_ps(a);
}


x86 assembly (clang, -O0):
<mm256_frcz_ps_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm256_frcz_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm256_frcz_ps_wrap>:
jmp    1030 <_mm256_frcz_ps@plt>

LLVM IR (-O0):
define i32 @mm256_frcz_ps_wrap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm256_frcz_ps(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mm256_frcz_ps_wrap(i32 %0) {
%2 = tail call i32 @_mm256_frcz_ps(i32 %0)
ret i32 %2
}
int raise(s)
int s;
{ return (kill(getpid(), s)); }


x86 assembly (clang, -O0):
<raise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
mov    $0x0,%al
call   1040 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raise>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%edi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1040 <kill@plt>

LLVM IR (-O0):
define i32 @raise(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @getpid()
%4 = load i32, i32* %2
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @kill to i32 (i32, i32, ...)*)(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @raise(i32 %0) {
%2 = tail call i32 (...) @getpid()
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @kill to i32 (i32, i32, ...)*)(i32 %2, i32 %0)
ret i32 %3
}
/* Type definitions */
typedef scalar_t__ ssize_t;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
scalar_t__ read(int, void *, size_t);
ssize_t read_nointr(int fd, void *buf, size_t count) {
  ssize_t ret;
again:
  ret = read(fd, buf, count);
  if (ret < 0 && errno == EINTR)
    goto again;
  return ret;
}


x86 assembly (clang, -O0):
<read_nointr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jge    1161 <read_nointr+0x51>
mov    0x2e97(%rip),%rax
mov    (%rax),%rax
mov    0x2e85(%rip),%rcx
cmp    (%rcx),%rax
jne    1161 <read_nointr+0x51>
jmp    1123 <read_nointr+0x13>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_nointr>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <read@plt>
test   %rax,%rax
jns    114b <read_nointr+0x3b>
mov    (%r15),%rcx
cmp    (%r12),%rcx
je     1130 <read_nointr+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i64 @read_nointr(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %4
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = call i64 @read(i32 %9, i8* %10, i64 %11)
store i64 %12, i64* %7
%13 = load i64, i64* %7
%14 = icmp slt i64 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %8
%16 = load i64, i64* @errno
%17 = load i64, i64* @EINTR
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %20
19: ; preds = %15
br label %8
20: ; preds = %15, %8
%21 = load i64, i64* %7
ret i64 %21
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i64 @read_nointr(i32 %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %7, %3
%5 = tail call i64 @read(i32 %0, i8* %1, i64 %2)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = load i64, i64* @errno
%9 = load i64, i64* @EINTR
%10 = icmp eq i64 %8, %9
br i1 %10, label %4, label %11
11: ; preds = %7, %4
ret i64 %5
}
double F_c_u_d(double alpha_c, double alpha_red_1, double f_t_d, double d_k_nom,
               double t, double gamma_M) {
  return ((2.5 * alpha_c * alpha_red_1 * f_t_d * d_k_nom * t) / gamma_M);
}


x86 assembly (clang, -O0):
<F_c_u_d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  %xmm5,-0x30(%rbp)
movsd  0xed6(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
mulsd  -0x28(%rbp),%xmm0
divsd  -0x30(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<F_c_u_d>:
mulsd  0xef8(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
mulsd  %xmm3,%xmm0
mulsd  %xmm4,%xmm0
divsd  %xmm5,%xmm0
ret

LLVM IR (-O0):
define double @F_c_u_d(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
%13 = load double, double* %7
%14 = fmul double 2.500000e+00, %13
%15 = load double, double* %8
%16 = fmul double %14, %15
%17 = load double, double* %9
%18 = fmul double %16, %17
%19 = load double, double* %10
%20 = fmul double %18, %19
%21 = load double, double* %11
%22 = fmul double %20, %21
%23 = load double, double* %12
%24 = fdiv double %22, %23
ret double %24
}

LLVM IR (-O2):
define double @F_c_u_d(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = fmul double %0, 2.500000e+00
%8 = fmul double %7, %1
%9 = fmul double %8, %2
%10 = fmul double %9, %3
%11 = fmul double %10, %4
%12 = fdiv double %11, %5
ret double %12
}
/* Variables and functions */
int inb(unsigned short);
int serial_is_transmit_fifo_empty(unsigned short com) {
  return inb((com + 5)) & 0x20;
}


x86 assembly (clang, -O0):
<serial_is_transmit_fifo_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x5,%eax
movzwl %ax,%edi
call   1030 <inb@plt>
and    $0x20,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_is_transmit_fifo_empty>:
push   %rax
add    $0x5,%edi
movzwl %di,%edi
call   1030 <inb@plt>
and    $0x20,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @serial_is_transmit_fifo_empty(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = add nsw i32 %4, 5
%6 = trunc i32 %5 to i16
%7 = call i32 @inb(i16 zeroext %6)
%8 = and i32 %7, 32
ret i32 %8
}

LLVM IR (-O2):
define i32 @serial_is_transmit_fifo_empty(i16 zeroext %0) {
%2 = add i16 %0, 5
%3 = tail call i32 @inb(i16 zeroext %2)
%4 = and i32 %3, 32
ret i32 %4
}
int variable_test_bit(int nr, volatile const unsigned long *addr) {
  int oldbit;
  __asm__ volatile("bt %2,%1\n\t"
                   "sbb %0,%0"
                   : "=r"(oldbit)
                   : "m"(*(unsigned long *)addr), "Ir"(nr));
  return (oldbit);
}


x86 assembly (clang, -O0):
<variable_test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
bt     %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<variable_test_bit>:
bt     %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @variable_test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "bt $2,$1\0A\09sbb $0,$0", "=r,*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @variable_test_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "bt $2,$1\0A\09sbb $0,$0", "=r,*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void a(void *x, int y) {
  if (y != 1234)
    abort();
}


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x4d2,-0xc(%rbp)
je     1133 <a+0x23>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
cmp    $0x4d2,%esi
jne    1119 <a+0x9>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @a(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 1234
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 (...) @abort()
unreachable
9: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @a(i8* nocapture readnone %0, i32 %1) {
%3 = icmp eq i32 %1, 1234
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
ret void
}
int flessThan(float x, float y) {
  int i;
  if (x < y) {
    i = 1;
  } else {
    i = 0;
  }
  return i;
}


x86 assembly (clang, -O0):
<flessThan>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    112d <flessThan+0x2d>
movl   $0x1,-0xc(%rbp)
jmp    1134 <flessThan+0x34>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flessThan>:
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define i32 @flessThan(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = fcmp olt float %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %5
br label %11
10: ; preds = %2
store i32 0, i32* %5
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @flessThan(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int my_str_isprintable(char *str) {
  int i;
  i = 0;
  while (str[i] != '\0') {
    if (str[i] >= 32 && str[i] <= 126)
      i++;
    else
      return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<my_str_isprintable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     116d <my_str_isprintable+0x6d>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
jl     115c <my_str_isprintable+0x5c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x7e,%eax
jg     115c <my_str_isprintable+0x5c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1168 <my_str_isprintable+0x68>
movl   $0x0,-0x4(%rbp)
jmp    1174 <my_str_isprintable+0x74>
jmp    110f <my_str_isprintable+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_str_isprintable>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1123 <my_str_isprintable+0x23>
add    $0x1,%rdi
nop
add    $0x81,%cl
cmp    $0xa0,%cl
jbe    1124 <my_str_isprintable+0x24>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <my_str_isprintable+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_str_isprintable(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %33, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %34
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp sge i32 %19, 32
br i1 %20, label %21, label %32
21: ; preds = %13
%22 = load i8*, i8** %3
%23 = load i32, i32* %4
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %22, i64 %24
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = icmp sle i32 %27, 126
br i1 %28, label %29, label %32
29: ; preds = %21
%30 = load i32, i32* %4
%31 = add nsw i32 %30, 1
store i32 %31, i32* %4
br label %33
32: ; preds = %21, %13
store i32 0, i32* %2
br label %35
33: ; preds = %29
br label %5
34: ; preds = %5
store i32 1, i32* %2
br label %35
35: ; preds = %34, %32
%36 = load i32, i32* %2
ret i32 %36
}

LLVM IR (-O2):
define i32 @my_str_isprintable(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %8
4: ; preds = %8
%5 = getelementptr inbounds i8, i8* %0, i64 %13
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %1, %4
%9 = phi i64 [ %13, %4 ], [ 0, %1 ]
%10 = phi i8 [ %6, %4 ], [ %2, %1 ]
%11 = add i8 %10, -127
%12 = icmp ult i8 %11, -95
%13 = add nuw i64 %9, 1
br i1 %12, label %14, label %4
14: ; preds = %8, %4, %1
%15 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %8 ]
ret i32 %15
}
/* Variables and functions */
int ackermann(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("ackermann(2, 2) = %d\n", ackermann(2, 2));
  printf("ackermann(3, 2) = %d\n", ackermann(3, 2));
  printf("ackermann(3, 3) = %d\n", ackermann(3, 3));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%esi
mov    %esi,%edi
call   1030 <ackermann@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
mov    $0x3,%edi
mov    $0x2,%esi
call   1030 <ackermann@plt>
mov    %eax,%esi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x3,%esi
mov    %esi,%edi
call   1030 <ackermann@plt>
mov    %eax,%esi
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x2,%esi
call   1030 <ackermann@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0x3,%edi
mov    $0x2,%esi
call   1030 <ackermann@plt>
lea    0xec2(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0x3,%edi
mov    $0x3,%esi
call   1030 <ackermann@plt>
lea    0xebb(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"ackermann(2, 2) = %d\0A\00"
@.str.1 = [22 x i8] c"ackermann(3, 2) = %d\0A\00"
@.str.2 = [22 x i8] c"ackermann(3, 3) = %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @ackermann(i32 2, i32 2)
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 @ackermann(i32 3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %4)
%6 = call i32 @ackermann(i32 3, i32 3)
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"ackermann(2, 2) = %d\0A\00"
@.str.1 = [22 x i8] c"ackermann(3, 2) = %d\0A\00"
@.str.2 = [22 x i8] c"ackermann(3, 3) = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @ackermann(i32 2, i32 2)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @ackermann(i32 3, i32 2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = tail call i32 @ackermann(i32 3, i32 3)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int y(int, int);
__attribute__((no)) int z(int fortytwo) {
  return y(fortytwo * 2, fortytwo) + 9;
}


x86 assembly (clang, -O0):
<z>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x1,%edi
mov    -0x4(%rbp),%esi
call   1030 <y@plt>
add    $0x9,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<z>:
push   %rax
mov    %edi,%esi
lea    (%rsi,%rsi,1),%edi
call   1030 <y@plt>
add    $0x9,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @z(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
%5 = load i32, i32* %2
%6 = call i32 @y(i32 %4, i32 %5)
%7 = add nsw i32 %6, 9
ret i32 %7
}

LLVM IR (-O2):
define i32 @z(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = tail call i32 @y(i32 %2, i32 %0)
%4 = add nsw i32 %3, 9
ret i32 %4
}
/* Type definitions */
struct tb_event {
  int dummy;
};

/* Variables and functions */
int wait_fill_event(struct tb_event *, int /*<<< orphan*/);
int tb_poll_event(struct tb_event *event) { return wait_fill_event(event, 0); }


x86 assembly (clang, -O0):
<tb_poll_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <wait_fill_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tb_poll_event>:
xor    %esi,%esi
jmp    1030 <wait_fill_event@plt>

LLVM IR (-O0):
%struct.tb_event = type { i32 }
define i32 @tb_poll_event(%struct.tb_event* %0) {
%2 = alloca %struct.tb_event*
store %struct.tb_event* %0, %struct.tb_event** %2
%3 = load %struct.tb_event*, %struct.tb_event** %2
%4 = call i32 @wait_fill_event(%struct.tb_event* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.tb_event = type { i32 }
define i32 @tb_poll_event(%struct.tb_event* %0) {
%2 = tail call i32 @wait_fill_event(%struct.tb_event* %0, i32 0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ bsd_syscall_recv(int, void *, size_t, int);
int host_thread_enter_tcpip_region(int);
int /*<<< orphan*/ host_thread_exit_tcpip_region(int);
ssize_t uptcp_recv(int s, void *buf, size_t len, int flags) {
  int thread_id = host_thread_enter_tcpip_region(1);
  ssize_t res = bsd_syscall_recv(s, buf, len, flags);
  host_thread_exit_tcpip_region(thread_id);
  return res;
}


x86 assembly (clang, -O0):
<uptcp_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    $0x1,%edi
call   1040 <host_thread_enter_tcpip_region@plt>
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <bsd_syscall_recv@plt>
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%edi
call   1050 <host_thread_exit_tcpip_region@plt>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uptcp_recv>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %ecx,%r14d
mov    %rdx,%r15
mov    %rsi,%rbp
mov    %edi,%ebx
mov    $0x1,%edi
call   1040 <host_thread_enter_tcpip_region@plt>
mov    %eax,%r12d
mov    %ebx,%edi
mov    %rbp,%rsi
mov    %r15,%rdx
mov    %r14d,%ecx
call   1030 <bsd_syscall_recv@plt>
mov    %eax,%ebx
mov    %r12d,%edi
call   1050 <host_thread_exit_tcpip_region@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @uptcp_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%11 = call i32 @host_thread_enter_tcpip_region(i32 1)
store i32 %11, i32* %9
%12 = load i32, i32* %5
%13 = load i8*, i8** %6
%14 = load i64, i64* %7
%15 = load i32, i32* %8
%16 = call i32 @bsd_syscall_recv(i32 %12, i8* %13, i64 %14, i32 %15)
store i32 %16, i32* %10
%17 = load i32, i32* %9
%18 = call i32 @host_thread_exit_tcpip_region(i32 %17)
%19 = load i32, i32* %10
ret i32 %19
}

LLVM IR (-O2):
define i32 @uptcp_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call i32 @host_thread_enter_tcpip_region(i32 1)
%6 = tail call i32 @bsd_syscall_recv(i32 %0, i8* %1, i64 %2, i32 %3)
%7 = tail call i32 @host_thread_exit_tcpip_region(i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void do_n_str_cmd(char *do_n_str) { printf("sorry, no gd support...\n"); }


x86 assembly (clang, -O0):
<do_n_str_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_n_str_cmd>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"sorry, no gd support...\0A\00"
define void @do_n_str_cmd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"sorry, no gd support...\00"
define void @do_n_str_cmd(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
short foo_short(void) {
  _Complex short a = 123 + 45I;
  return __real__ a;
}


x86 assembly (clang, -O0):
<foo_short>:
push   %rbp
mov    %rsp,%rbp
movw   $0x7b,-0x8(%rbp)
movw   $0x2d,-0x6(%rbp)
movswl -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_short>:
mov    $0x7b,%ax
ret

LLVM IR (-O0):
define signext i16 @foo_short() {
%1 = alloca { i16, i16 }
%2 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %1, i32 0, i32 0
%3 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %1, i32 0, i32 1
store i16 123, i16* %2
store i16 45, i16* %3
%4 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %1, i32 0, i32 0
%5 = load i16, i16* %4
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @foo_short() {
ret i16 123
}
/* Variables and functions */
void *malloc(size_t);
void *stbi__malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<stbi__malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi__malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @stbi__malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @stbi__malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int in_class(int, char *);
int in_sep_class(int c) { return in_class(c, "{}()<>[]!;\"'"); }


x86 assembly (clang, -O0):
<in_sep_class>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <in_class@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_sep_class>:
lea    0xee9(%rip),%rsi
jmp    1030 <in_class@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"{}()<>[]!;\22'\00"
define i32 @in_sep_class(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @in_class(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [13 x i8] c"{}()<>[]!;\22'\00"
define i32 @in_sep_class(i32 %0) {
%2 = tail call i32 @in_class(i32 %0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ z();
g(unsigned long long i) {
  if ((i & 0xfff0000000000ull) == 0x1200000000000ull)
    z();
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
movabs $0xfff0000000000,%rax
and    -0x10(%rbp),%rax
movabs $0x1200000000000,%rcx
cmp    %rcx,%rax
jne    1144 <g+0x34>
mov    $0x0,%al
call   1030 <z@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
movabs $0xfff0000000000,%rax
and    %rdi,%rax
movabs $0x1200000000000,%rcx
cmp    %rcx,%rax
jne    1138 <g+0x28>
push   %rax
xor    %eax,%eax
call   1030 <z@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @g(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 4502500115742720
%6 = icmp eq i64 %5, 316659348799488
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @z()
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @g(i64 %0) {
%2 = and i64 %0, 4502500115742720
%3 = icmp eq i64 %2, 316659348799488
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @z()
br label %6
6: ; preds = %4, %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ isdigit(char const);
bool all_digits(const char *str) {
  if (!*str)
    return false;
  while (*str) {
    if (!isdigit(*str))
      return false;
    ++str;
  }
  return true;
}


x86 assembly (clang, -O0):
<all_digits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1135 <all_digits+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1180 <all_digits+0x70>
jmp    113a <all_digits+0x2a>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1179 <all_digits+0x69>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    1168 <all_digits+0x58>
movl   $0x0,-0x4(%rbp)
jmp    1180 <all_digits+0x70>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    113a <all_digits+0x2a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_digits>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
xor    %ebp,%ebp
test   %al,%al
je     114c <all_digits+0x3c>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <isdigit@plt>
test   %eax,%eax
je     114c <all_digits+0x3c>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <all_digits+0x20>
mov    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @all_digits(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %23
8: ; preds = %1
br label %9
9: ; preds = %19, %8
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %22
13: ; preds = %9
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = call i32 @isdigit(i8 signext %15)
%17 = icmp ne i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %13
store i32 0, i32* %2
br label %23
19: ; preds = %13
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
br label %9
22: ; preds = %9
store i32 1, i32* %2
br label %23
23: ; preds = %22, %18, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @all_digits(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8* [ %10, %9 ], [ %0, %1 ]
%6 = phi i8 [ %11, %9 ], [ %2, %1 ]
%7 = tail call i32 @isdigit(i8 signext %6)
%8 = icmp eq i32 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i32 [ 0, %1 ], [ 0, %4 ], [ 1, %9 ]
ret i32 %14
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000044))) = ui32Mode;
}


x86 assembly (clang, -O0):
<SHAMD5ConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x44(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5ConfigSet>:
mov    %rsi,0x44(%rdi)
ret

LLVM IR (-O0):
define void @SHAMD5ConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 68
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @SHAMD5ConfigSet(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 68
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;
typedef int /*<<< orphan*/ ASN1_PCTX;
typedef int /*<<< orphan*/ ASN1_INTEGER;

/* Variables and functions */
scalar_t__ BIO_puts(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ free(char *);
char *i2s_ASN1_INTEGER(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int asn1_print_integer_ctx(BIO *out, ASN1_INTEGER *str, const ASN1_PCTX *pctx) {
  char *s;
  int ret = 1;
  s = i2s_ASN1_INTEGER(NULL, str);
  if (BIO_puts(out, s) <= 0)
    ret = 0;
  free(s);
  return ret;
}


x86 assembly (clang, -O0):
<asn1_print_integer_ctx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x1,-0x24(%rbp)
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edi
call   1040 <i2s_ASN1_INTEGER@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1050 <BIO_puts@plt>
cmp    $0x0,%rax
jg     117a <asn1_print_integer_ctx+0x4a>
movl   $0x0,-0x24(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asn1_print_integer_ctx>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %edi,%edi
call   1040 <i2s_ASN1_INTEGER@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1050 <BIO_puts@plt>
xor    %ebp,%ebp
test   %rax,%rax
setg   %bpl
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @asn1_print_integer_ctx(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i8*
%8 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
store i32 1, i32* %8
%9 = load i32*, i32** %5
%10 = call i8* @i2s_ASN1_INTEGER(i32* null, i32* %9)
store i8* %10, i8** %7
%11 = load i32*, i32** %4
%12 = load i8*, i8** %7
%13 = call i64 @BIO_puts(i32* %11, i8* %12)
%14 = icmp sle i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %3
store i32 0, i32* %8
br label %16
16: ; preds = %15, %3
%17 = load i8*, i8** %7
%18 = call i32 @free(i8* %17)
%19 = load i32, i32* %8
ret i32 %19
}

LLVM IR (-O2):
define i32 @asn1_print_integer_ctx(i32* %0, i32* %1, i32* nocapture readnone %2) {
%4 = tail call i8* @i2s_ASN1_INTEGER(i32* null, i32* %1)
%5 = tail call i64 @BIO_puts(i32* %0, i8* %4)
%6 = icmp sgt i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @free(i8* %4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ cli_warnmsg(char *);
int cli_pst(const char *dir, int desc) {
  cli_warnmsg("PST files not yet supported\n");
  return -124;
}


x86 assembly (clang, -O0):
<cli_pst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <cli_warnmsg@plt>
mov    $0xffffff84,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_pst>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <cli_warnmsg@plt>
mov    $0xffffff84,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"PST files not yet supported\0A\00"
define i32 @cli_pst(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 @cli_warnmsg(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 -124
}

LLVM IR (-O2):
@.str = [29 x i8] c"PST files not yet supported\0A\00"
define i32 @cli_pst(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @cli_warnmsg(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 -124
}
int priority(char op) {
  switch (op) {
  case '+':
  case '-':
    return 0;
  case '*':
  case '/':
  case '%':
    return 1;
  case '^':
    return 2;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<priority>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x25,%eax
je     1180 <priority+0x80>
jmp    111f <priority+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x2a,%eax
je     1180 <priority+0x80>
jmp    1130 <priority+0x30>
mov    -0xc(%rbp),%eax
sub    $0x2b,%eax
je     1174 <priority+0x74>
jmp    1141 <priority+0x41>
mov    -0xc(%rbp),%eax
sub    $0x2d,%eax
je     1174 <priority+0x74>
jmp    1152 <priority+0x52>
mov    -0xc(%rbp),%eax
sub    $0x2f,%eax
je     1180 <priority+0x80>
jmp    1163 <priority+0x63>
mov    -0xc(%rbp),%eax
sub    $0x5e,%eax
je     118c <priority+0x8c>
jmp    1198 <priority+0x98>
movl   $0x0,-0x4(%rbp)
jmp    119f <priority+0x9f>
movl   $0x1,-0x4(%rbp)
jmp    119f <priority+0x9f>
movl   $0x2,-0x4(%rbp)
jmp    119f <priority+0x9f>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<priority>:
add    $0xffffffdb,%edi
cmp    $0x39,%edi
ja     1133 <priority+0x33>
mov    $0x421,%eax
bt     %rdi,%rax
jb     1121 <priority+0x21>
xor    %eax,%eax
mov    $0x140,%ecx
bt     %rdi,%rcx
jae    1127 <priority+0x27>
ret
mov    $0x1,%eax
ret
cmp    $0x39,%rdi
jne    1133 <priority+0x33>
mov    $0x2,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @priority(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %9 [
i32 43, label %6
i32 45, label %6
i32 42, label %7
i32 47, label %7
i32 37, label %7
i32 94, label %8
]
6: ; preds = %1, %1
store i32 0, i32* %2
br label %10
7: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %10
8: ; preds = %1
store i32 2, i32* %2
br label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @priority(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %5 [
i32 43, label %6
i32 45, label %6
i32 42, label %3
i32 47, label %3
i32 37, label %3
i32 94, label %4
]
3: ; preds = %1, %1, %1
br label %6
4: ; preds = %1
br label %6
5: ; preds = %1
br label %6
6: ; preds = %1, %1, %5, %4, %3
%7 = phi i32 [ -1, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %7
}
int is_partial(int c) {
  if (c < 224 || c == 255)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<is_partial>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xe0,-0x8(%rbp)
jl     1121 <is_partial+0x21>
cmpl   $0xff,-0x8(%rbp)
jne    112d <is_partial+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1134 <is_partial+0x34>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_partial>:
cmp    $0xe0,%edi
setge  %al
cmp    $0xff,%edi
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_partial(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 224
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 255
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_partial(i32 %0) {
%2 = icmp sgt i32 %0, 223
%3 = icmp ne i32 %0, 255
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}