xunge/DecIR huggingface dataset:
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int clock_nanosleep(int /*<<< orphan*/, int /*<<< orphan*/,
                    struct timespec const *, struct timespec *);
int errno;
int nanosleep(const struct timespec *rqtp, struct timespec *rmtp) {
  int err;
  if ((err = clock_nanosleep(CLOCK_REALTIME, 0, rqtp, rmtp)) != 0) {
    errno = err;
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<nanosleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
xor    %esi,%esi
call   1030 <clock_nanosleep@plt>
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
je     115c <nanosleep+0x4c>
mov    -0x1c(%rbp),%ecx
mov    0x2e92(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <nanosleep+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanosleep>:
push   %rbx
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
xor    %ebx,%ebx
xor    %esi,%esi
call   1030 <clock_nanosleep@plt>
test   %eax,%eax
je     113b <nanosleep+0x2b>
mov    0x2eac(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
@errno = global i32 0
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
%5 = alloca %struct.timespec*
%6 = alloca i32
store %struct.timespec* %0, %struct.timespec** %4
store %struct.timespec* %1, %struct.timespec** %5
%7 = load i32, i32* @CLOCK_REALTIME
%8 = load %struct.timespec*, %struct.timespec** %4
%9 = load %struct.timespec*, %struct.timespec** %5
%10 = call i32 @clock_nanosleep(i32 %7, i32 0, %struct.timespec* %8, %struct.timespec* %9)
store i32 %10, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* %6
store i32 %13, i32* @errno
store i32 -1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
@errno = global i32 0
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = load i32, i32* @CLOCK_REALTIME
%4 = tail call i32 @clock_nanosleep(i32 %3, i32 0, %struct.timespec* %0, %struct.timespec* %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %2
store i32 %4, i32* @errno
br label %7
7: ; preds = %2, %6
%8 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ fsck(char *);
int main(int argc, char **argv) {
  fsck(argv[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <fsck@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <fsck@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @fsck(i8* %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @fsck(i8* %4)
ret i32 0
}
void l2x0_pmu_suspend(void) {}


x86 assembly (clang, -O0):
<l2x0_pmu_suspend>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2x0_pmu_suspend>:
ret

LLVM IR (-O0):
define void @l2x0_pmu_suspend() {
ret void
}

LLVM IR (-O2):
define void @l2x0_pmu_suspend() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SHA256_CTX;

/* Variables and functions */
int /*<<< orphan*/ SHA256_Final(unsigned char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ SHA256_Init(int /*<<< orphan*/ *);
int /*<<< orphan*/ SHA256_Update(int /*<<< orphan*/ *, unsigned char const *,
                                 size_t const);
void sha256(const unsigned char *data, const size_t data_len,
            unsigned char *digest) {
  SHA256_CTX ctx;
  SHA256_Init(&ctx);
  SHA256_Update(&ctx, data, data_len);
  SHA256_Final(digest, &ctx);
}


x86 assembly (clang, -O0):
<sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x1c(%rbp),%rdi
call   1030 <SHA256_Init@plt>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    -0x1c(%rbp),%rdi
call   1050 <SHA256_Update@plt>
mov    -0x18(%rbp),%rdi
lea    -0x1c(%rbp),%rsi
call   1040 <SHA256_Final@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha256>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0x4(%rsp),%r12
mov    %r12,%rdi
call   1030 <SHA256_Init@plt>
mov    %r12,%rdi
mov    %rbx,%rsi
mov    %r15,%rdx
call   1050 <SHA256_Update@plt>
mov    %r14,%rdi
mov    %r12,%rsi
call   1040 <SHA256_Final@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @sha256(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%8 = call i32 @SHA256_Init(i32* %7)
%9 = load i8*, i8** %4
%10 = load i64, i64* %5
%11 = call i32 @SHA256_Update(i32* %7, i8* %9, i64 %10)
%12 = load i8*, i8** %6
%13 = call i32 @SHA256_Final(i8* %12, i32* %7)
ret void
}

LLVM IR (-O2):
define void @sha256(i8* %0, i64 %1, i8* %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = call i32 @SHA256_Init(i32* %4)
%7 = call i32 @SHA256_Update(i32* %4, i8* %0, i64 %1)
%8 = call i32 @SHA256_Final(i8* %2, i32* %4)
ret void
}
void gtk_image_menu_item_new_from_stock() {}


x86 assembly (clang, -O0):
<gtk_image_menu_item_new_from_stock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_image_menu_item_new_from_stock>:
ret

LLVM IR (-O0):
define void @gtk_image_menu_item_new_from_stock() {
ret void
}

LLVM IR (-O2):
define void @gtk_image_menu_item_new_from_stock() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_SET_EXTRA_LED_PIN() { set_io_bit(0x37, 4); }


x86 assembly (clang, -O0):
<TOSH_SET_EXTRA_LED_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x37,%edi
mov    $0x4,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_EXTRA_LED_PIN>:
mov    $0x37,%edi
mov    $0x4,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_EXTRA_LED_PIN() {
%1 = call i32 @set_io_bit(i32 55, i32 4)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_EXTRA_LED_PIN() {
%1 = tail call i32 @set_io_bit(i32 55, i32 4)
ret void
}
int next_pow2(int x) {
  if (x < 0)
    return 0;
  --x;
  x |= x >> 1;
  x |= x >> 2;
  x |= x >> 4;
  x |= x >> 8;
  x |= x >> 16;
  return x + 1;
}


x86 assembly (clang, -O0):
<next_pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <next_pow2+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    116b <next_pow2+0x6b>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x2,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x4,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x10,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_pow2>:
test   %edi,%edi
js     112d <next_pow2+0x2d>
add    $0xffffffff,%edi
mov    %edi,%eax
sar    %eax
or     %edi,%eax
mov    %eax,%ecx
sar    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
or     %ecx,%eax
add    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @next_pow2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %32
7: ; preds = %1
%8 = load i32, i32* %3
%9 = add nsw i32 %8, -1
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = ashr i32 %10, 1
%12 = load i32, i32* %3
%13 = or i32 %12, %11
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = ashr i32 %14, 2
%16 = load i32, i32* %3
%17 = or i32 %16, %15
store i32 %17, i32* %3
%18 = load i32, i32* %3
%19 = ashr i32 %18, 4
%20 = load i32, i32* %3
%21 = or i32 %20, %19
store i32 %21, i32* %3
%22 = load i32, i32* %3
%23 = ashr i32 %22, 8
%24 = load i32, i32* %3
%25 = or i32 %24, %23
store i32 %25, i32* %3
%26 = load i32, i32* %3
%27 = ashr i32 %26, 16
%28 = load i32, i32* %3
%29 = or i32 %28, %27
store i32 %29, i32* %3
%30 = load i32, i32* %3
%31 = add nsw i32 %30, 1
store i32 %31, i32* %2
br label %32
32: ; preds = %7, %6
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @next_pow2(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = ashr i32 %4, 1
%6 = or i32 %5, %4
%7 = ashr i32 %6, 2
%8 = or i32 %7, %6
%9 = ashr i32 %8, 4
%10 = or i32 %9, %8
%11 = ashr i32 %10, 8
%12 = or i32 %11, %10
%13 = ashr i32 %12, 16
%14 = or i32 %13, %12
%15 = add nsw i32 %14, 1
br label %16
16: ; preds = %1, %3
%17 = phi i32 [ %15, %3 ], [ 0, %1 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ chdir(char *);
int /*<<< orphan*/ err_sys(char *);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main(void) {
  if (chdir("/tmp") < 0)
    err_sys("chdir failed");
  printf("chdir to /tmp succeeded\n");
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
call   1040 <chdir@plt>
cmp    $0x0,%rax
jge    1171 <main+0x31>
lea    0xe99(%rip),%rdi
call   1030 <err_sys@plt>
lea    0xe9a(%rip),%rdi
call   1050 <printf@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1050 <chdir@plt>
test   %rax,%rax
jns    115e <main+0x1e>
lea    0xeac(%rip),%rdi
call   1040 <err_sys@plt>
lea    0xead(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"/tmp\00"
@.str.1 = [13 x i8] c"chdir failed\00"
@.str.2 = [25 x i8] c"chdir to /tmp succeeded\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @chdir(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%8 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [5 x i8] c"/tmp\00"
@.str.1 = [13 x i8] c"chdir failed\00"
@str = [24 x i8] c"chdir to /tmp succeeded\00"
define i32 @main() {
%1 = tail call i64 @chdir(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = icmp slt i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 0)
unreachable
}
double fmul64(double x, double y) { return x * y; }


x86 assembly (clang, -O0):
<fmul64>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmul64>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @fmul64(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @fmul64(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
void ff_hevc_put_hevc_bi_qpel_hv48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_hv48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_hv48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_hv48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_hv48_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M229_f(char *s) {
  debug("M229_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M229_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M229_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M229_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M229_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M229_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M229_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
void *calloc(size_t, size_t);
void *ndb_calloc(size_t i_nr, size_t i_size, char *i_remark) {
  return calloc(i_nr, i_size);
}


x86 assembly (clang, -O0):
<ndb_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndb_calloc>:
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @ndb_calloc(i64 %0, i64 %1, i8* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = call i8* @calloc(i64 %7, i64 %8)
ret i8* %9
}

LLVM IR (-O2):
define noalias i8* @ndb_calloc(i64 %0, i64 %1, i8* nocapture readnone %2) {
%4 = tail call i8* @calloc(i64 %0, i64 %1)
ret i8* %4
}
/* Variables and functions */
void putchar(unsigned char c) { (*(unsigned char *)0x100002) = c; }


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%cl
mov    $0x100002,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
mov    %dil,0x100002
ret

LLVM IR (-O0):
define void @putchar(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
store i8 %3, i8* inttoptr (i64 1048578 to i8*)
ret void
}

LLVM IR (-O2):
define void @putchar(i8 zeroext %0) {
store i8 %0, i8* inttoptr (i64 1048578 to i8*)
ret void
}
void mus_ldouble_to_char(unsigned char *j, double x) {
  int i;
  unsigned char *ox;
  ox = (unsigned char *)&x;
  for (i = 0; i < 8; i++)
    j[i] = ox[i];
}


x86 assembly (clang, -O0):
<mus_ldouble_to_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x8,-0x14(%rbp)
jge    114a <mus_ldouble_to_char+0x4a>
mov    -0x20(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111c <mus_ldouble_to_char+0x1c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mus_ldouble_to_char>:
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @mus_ldouble_to_char(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store double %1, double* %4
%7 = bitcast double* %4 to i8*
store i8* %7, i8** %6
store i32 0, i32* %5
br label %8
8: ; preds = %21, %2
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 8
br i1 %10, label %11, label %24
11: ; preds = %8
%12 = load i8*, i8** %6
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = load i8*, i8** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
br label %21
21: ; preds = %11
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %8
24: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @mus_ldouble_to_char(i8* nocapture writeonly %0, double %1) {
%3 = bitcast i8* %0 to double*
store double %1, double* %3
ret void
}
void ff_hevc_put_hevc_bi_w_epel_hv12_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_hv12_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_hv12_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_hv12_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_hv12_8_sse4() {
ret void
}
/* Variables and functions */
char *ioc_conv(int, int /*<<< orphan*/, char *, unsigned int);
char *ioc_ito10(unsigned int n) { return (ioc_conv(10, 0, "0123456789", n)); }


x86 assembly (clang, -O0):
<ioc_ito10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0xa,%edi
xor    %esi,%esi
lea    0xed4(%rip),%rdx
call   1030 <ioc_conv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioc_ito10>:
mov    %edi,%ecx
lea    0xee7(%rip),%rdx
mov    $0xa,%edi
xor    %esi,%esi
jmp    1030 <ioc_conv@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"0123456789\00"
define i8* @ioc_ito10(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @ioc_conv(i32 10, i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [11 x i8] c"0123456789\00"
define i8* @ioc_ito10(i32 %0) {
%2 = tail call i8* @ioc_conv(i32 10, i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
int test_imm_8Cuint32_mem(unsigned int *val) {
  return ((*val) & (0x8C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Cuint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x8c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Cuint32_mem>:
testb  $0x8c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Cuint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 140
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Cuint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 140
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ pmu_adc_enable();
int /*<<< orphan*/ pmu_adc_reset_setting();
int /*<<< orphan*/ pmu_enable_4V_harvesting();
int /*<<< orphan*/ pmu_reg_write(int, int);
int /*<<< orphan*/ pmu_set_clk_init();
void pmu_init() {
  pmu_set_clk_init();
  pmu_enable_4V_harvesting();
  pmu_reg_write(0x45, ((0x00 << 9) | (0x00 << 8) | (0x48 << 0)));
  pmu_reg_write(0x3A,
                ((1 << 20) | (0 << 19) | (1 << 13) | (1 << 12) | (1 << 11)));
  pmu_adc_reset_setting();
  pmu_adc_enable();
}


x86 assembly (clang, -O0):
<pmu_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <pmu_set_clk_init@plt>
mov    $0x0,%al
call   1030 <pmu_enable_4V_harvesting@plt>
mov    $0x45,%edi
mov    $0x48,%esi
call   1040 <pmu_reg_write@plt>
mov    $0x3a,%edi
mov    $0x103800,%esi
call   1040 <pmu_reg_write@plt>
mov    $0x0,%al
call   1060 <pmu_adc_reset_setting@plt>
mov    $0x0,%al
call   1050 <pmu_adc_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_init>:
push   %rax
xor    %eax,%eax
call   1070 <pmu_set_clk_init@plt>
xor    %eax,%eax
call   1030 <pmu_enable_4V_harvesting@plt>
mov    $0x45,%edi
mov    $0x48,%esi
call   1040 <pmu_reg_write@plt>
mov    $0x3a,%edi
mov    $0x103800,%esi
call   1040 <pmu_reg_write@plt>
xor    %eax,%eax
call   1060 <pmu_adc_reset_setting@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <pmu_adc_enable@plt>

LLVM IR (-O0):
define void @pmu_init() {
%1 = call i32 (...) @pmu_set_clk_init()
%2 = call i32 (...) @pmu_enable_4V_harvesting()
%3 = call i32 @pmu_reg_write(i32 69, i32 72)
%4 = call i32 @pmu_reg_write(i32 58, i32 1062912)
%5 = call i32 (...) @pmu_adc_reset_setting()
%6 = call i32 (...) @pmu_adc_enable()
ret void
}

LLVM IR (-O2):
define void @pmu_init() {
%1 = tail call i32 (...) @pmu_set_clk_init()
%2 = tail call i32 (...) @pmu_enable_4V_harvesting()
%3 = tail call i32 @pmu_reg_write(i32 69, i32 72)
%4 = tail call i32 @pmu_reg_write(i32 58, i32 1062912)
%5 = tail call i32 (...) @pmu_adc_reset_setting()
%6 = tail call i32 (...) @pmu_adc_enable()
ret void
}
/* Variables and functions */
int strlen(char *str) {
  int len;
  len = 0;
  while (*str++ != '\0') {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1138 <strlen+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111c <strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int maxArea(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int x[] = {2, 4, 7, 3};
  printf("%d\n", maxArea(x, 4));
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
mov    $0x4,%esi
call   1040 <maxArea@plt>
mov    %eax,%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xed5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1040 <maxArea@plt>
lea    0xecd(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [4 x i32] [i32 2, i32 4, i32 7, i32 3]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i32]
store i32 0, i32* %1
%3 = bitcast [4 x i32]* %2 to i8*
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
%5 = call i32 @maxArea(i32* %4, i32 4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [4 x i32] [i32 2, i32 4, i32 7, i32 3]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [4 x i32]
%2 = bitcast [4 x i32]* %1 to i8*
%3 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%4 = call i32 @maxArea(i32* %3, i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(float *);
scalar_t__ malloc(int);
int /*<<< orphan*/ memset(float *, int /*<<< orphan*/, int);
float *vector(int n) {
  float *vec = (float *)malloc(sizeof(float) * n);
  assert(vec);
  memset(vec, 0, n * sizeof(float));
  return vec;
}


x86 assembly (clang, -O0):
<vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector>:
push   %rbp
push   %rbx
push   %rax
lea    0x0(,%rdi,4),%ebp
mov    %ebp,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <assert@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define float* @vector(i32 %0) {
%2 = alloca i32
%3 = alloca float*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 4, %5
%7 = trunc i64 %6 to i32
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to float*
store float* %9, float** %3
%10 = load float*, float** %3
%11 = call i32 @assert(float* %10)
%12 = load float*, float** %3
%13 = load i32, i32* %2
%14 = sext i32 %13 to i64
%15 = mul i64 %14, 4
%16 = trunc i64 %15 to i32
%17 = call i32 @memset(float* %12, i32 0, i32 %16)
%18 = load float*, float** %3
ret float* %18
}

LLVM IR (-O2):
define float* @vector(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to float*
%5 = tail call i32 @assert(float* %4)
%6 = tail call i32 @memset(float* %4, i32 0, i32 %2)
ret float* %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ XEvent;
struct TYPE_2__ {
  int /*<<< orphan*/ window;
  int /*<<< orphan*/ event;
};
typedef TYPE_1__ XDestroyWindowEvent;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/, int /*<<< orphan*/);
void do_DestroyNotify(XEvent *eventp) {
  XDestroyWindowEvent *e = (XDestroyWindowEvent *)eventp;
  printf("    event 0x%lx, window 0x%lx\n", e->event, e->window);
}


x86 assembly (clang, -O0):
<do_DestroyNotify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%esi
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_DestroyNotify>:
mov    (%rdi),%edx
mov    0x4(%rdi),%esi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32, i32 }
@.str = [31 x i8] c" event 0x%lx, window 0x%lx\0A\00"
define void @do_DestroyNotify(i32* %0) {
%2 = alloca i32*
%3 = alloca %struct.TYPE_2__*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = bitcast i32* %4 to %struct.TYPE_2__*
store %struct.TYPE_2__* %5, %struct.TYPE_2__** %3
%6 = load %struct.TYPE_2__*, %struct.TYPE_2__** %3
%7 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %6, i32 0, i32 1
%8 = load i32, i32* %7
%9 = load %struct.TYPE_2__*, %struct.TYPE_2__** %3
%10 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %9, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c" event 0x%lx, window 0x%lx\0A\00"
define void @do_DestroyNotify(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = load i32, i32* %0
%5 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
ret void
}
/* Variables and functions */
size_t range_size(void const *begin, void const *end) {
  return begin ? (char *)end - (char *)begin : 0;
}


x86 assembly (clang, -O0):
<range_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     112b <range_size+0x2b>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1136 <range_size+0x36>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    1136 <range_size+0x36>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_size>:
mov    %rsi,%rax
sub    %rdi,%rax
test   %rdi,%rdi
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @range_size(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = load i8*, i8** %3
%10 = ptrtoint i8* %8 to i64
%11 = ptrtoint i8* %9 to i64
%12 = sub i64 %10, %11
br label %14
13: ; preds = %2
br label %14
14: ; preds = %13, %7
%15 = phi i64 [ %12, %7 ], [ 0, %13 ]
ret i64 %15
}

LLVM IR (-O2):
define i64 @range_size(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
%4 = ptrtoint i8* %1 to i64
%5 = ptrtoint i8* %0 to i64
%6 = sub i64 %4, %5
%7 = select i1 %3, i64 0, i64 %6
ret i64 %7
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ test_intSearch();
int /*<<< orphan*/ test_strSearch();
int main(int argc, char *argv[]) {
  test_intSearch();
  test_strSearch();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <test_intSearch@plt>
mov    $0x0,%al
call   1030 <test_strSearch@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_intSearch@plt>
xor    %eax,%eax
call   1030 <test_strSearch@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_intSearch()
%7 = call i32 (...) @test_strSearch()
%8 = load i32, i32* @EXIT_SUCCESS
ret i32 %8
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_intSearch()
%4 = tail call i32 (...) @test_strSearch()
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TCGETS;
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, void *);
int tcgetattr(int fd, struct termios *termios_p) {
  ioctl(fd, TCGETS, (void *)termios_p);
  return 0;
}


x86 assembly (clang, -O0):
<tcgetattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcgetattr>:
push   %rax
mov    %rsi,%rdx
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
@TCGETS = global i32 0
define i32 @tcgetattr(i32 %0, %struct.termios* %1) {
%3 = alloca i32
%4 = alloca %struct.termios*
store i32 %0, i32* %3
store %struct.termios* %1, %struct.termios** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @TCGETS
%7 = load %struct.termios*, %struct.termios** %4
%8 = bitcast %struct.termios* %7 to i8*
%9 = call i32 @ioctl(i32 %5, i32 %6, i8* %8)
ret i32 0
}

LLVM IR (-O2):
%struct.termios = type { i32 }
@TCGETS = global i32 0
define i32 @tcgetattr(i32 %0, %struct.termios* %1) {
%3 = load i32, i32* @TCGETS
%4 = bitcast %struct.termios* %1 to i8*
%5 = tail call i32 @ioctl(i32 %0, i32 %3, i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ emit(char *);
void suffixes(void) { emit("end\n"); }


x86 assembly (clang, -O0):
<suffixes>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <emit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<suffixes>:
lea    0xee9(%rip),%rdi
jmp    1030 <emit@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"end\0A\00"
define void @suffixes() {
%1 = call i32 @emit(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"end\0A\00"
define void @suffixes() {
%1 = tail call i32 @emit(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(unsigned char);
void shr_reg32_imm8(unsigned int reg32, unsigned char imm8) {
  put8(0xC1);
  put8(0xE8 + reg32);
  put8(imm8);
}


x86 assembly (clang, -O0):
<shr_reg32_imm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    $0xc1,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%eax
add    $0xe8,%eax
movzbl %al,%edi
call   1030 <put8@plt>
movzbl -0x5(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shr_reg32_imm8>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0xc1,%edi
call   1030 <put8@plt>
add    $0xe8,%bpl
movzbl %bpl,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @shr_reg32_imm8(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = call i32 @put8(i8 zeroext -63)
%6 = load i32, i32* %3
%7 = add i32 232, %6
%8 = trunc i32 %7 to i8
%9 = call i32 @put8(i8 zeroext %8)
%10 = load i8, i8* %4
%11 = call i32 @put8(i8 zeroext %10)
ret void
}

LLVM IR (-O2):
define void @shr_reg32_imm8(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @put8(i8 zeroext -63)
%4 = trunc i32 %0 to i8
%5 = add i8 %4, -24
%6 = tail call i32 @put8(i8 zeroext %5)
%7 = tail call i32 @put8(i8 zeroext %1)
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
double fabs(double);
scalar_t__ rand();
bool percentage_chance(double rate) {
  double r;
  if (fabs(rate) < (0.00000001))
    return false;
  r = (double)rand() / (double)RAND_MAX;
  return r <= rate;
}


x86 assembly (clang, -O0):
<percentage_chance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
movaps 0xee7(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  0xecb(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    114b <percentage_chance+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1185 <percentage_chance+0x75>
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2e8a(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<percentage_chance>:
sub    $0x18,%rsp
movapd 0xee4(%rip),%xmm2
andpd  %xmm0,%xmm2
xor    %eax,%eax
movsd  0xee6(%rip),%xmm1
ucomisd %xmm2,%xmm1
ja     1165 <percentage_chance+0x55>
xor    %eax,%eax
movapd %xmm0,(%rsp)
call   1030 <rand@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
mov    0x2e9d(%rip),%rax
xorps  %xmm1,%xmm1
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
xor    %eax,%eax
movapd (%rsp),%xmm1
ucomisd %xmm0,%xmm1
setae  %al
add    $0x18,%rsp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define i32 @percentage_chance(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = call double @llvm.fabs.f64(double %5)
%7 = fcmp olt double %6, 1.000000e-08
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %19
9: ; preds = %1
%10 = call i64 (...) @rand()
%11 = sitofp i64 %10 to double
%12 = load i64, i64* @RAND_MAX
%13 = sitofp i64 %12 to double
%14 = fdiv double %11, %13
store double %14, double* %4
%15 = load double, double* %4
%16 = load double, double* %3
%17 = fcmp ole double %15, %16
%18 = zext i1 %17 to i32
store i32 %18, i32* %2
br label %19
19: ; preds = %9, %8
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define i32 @percentage_chance(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
%3 = fcmp olt double %2, 1.000000e-08
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = tail call i64 (...) @rand()
%6 = sitofp i64 %5 to double
%7 = load i64, i64* @RAND_MAX
%8 = sitofp i64 %7 to double
%9 = fdiv double %6, %8
%10 = fcmp ole double %9, %0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %1, %4
%13 = phi i32 [ %11, %4 ], [ 0, %1 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int b() { printf("b\n"); }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"b\0A\00"
define i32 @b() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [2 x i8] c"b\00"
define i32 @b() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Wc(char);
void Wl(void) { Wc('\n'); }


x86 assembly (clang, -O0):
<Wl>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <Wc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wl>:
mov    $0xa,%edi
jmp    1030 <Wc@plt>

LLVM IR (-O0):
define void @Wl() {
%1 = call i32 @Wc(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @Wl() {
%1 = tail call i32 @Wc(i8 signext 10)
ret void
}
/* Variables and functions */
float *reserva();
float *p_escalar(float a, float *x) {
  float *y = reserva();
  int i;
  for (i = 0; i < 3; i++)
    y[i] = a * x[i];
  return y;
}


x86 assembly (clang, -O0):
<p_escalar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <reserva@plt>
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x3,-0x1c(%rbp)
jge    116a <p_escalar+0x5a>
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1133 <p_escalar+0x23>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p_escalar>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movss  %xmm0,0xc(%rsp)
xor    %eax,%eax
call   1030 <reserva@plt>
movss  (%rbx),%xmm0
movss  0xc(%rsp),%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,(%rax)
movss  0x4(%rbx),%xmm0
mulss  %xmm1,%xmm0
movss  %xmm0,0x4(%rax)
mulss  0x8(%rbx),%xmm1
movss  %xmm1,0x8(%rax)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float* @p_escalar(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
store float %0, float* %3
store float* %1, float** %4
%7 = call float* (...) @reserva()
store float* %7, float** %5
store i32 0, i32* %6
br label %8
8: ; preds = %23, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %26
11: ; preds = %8
%12 = load float, float* %3
%13 = load float*, float** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds float, float* %13, i64 %15
%17 = load float, float* %16
%18 = fmul float %12, %17
%19 = load float*, float** %5
%20 = load i32, i32* %6
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds float, float* %19, i64 %21
store float %18, float* %22
br label %23
23: ; preds = %11
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %8
26: ; preds = %8
%27 = load float*, float** %5
ret float* %27
}

LLVM IR (-O2):
define float* @p_escalar(float %0, float* nocapture %1) {
%3 = tail call float* (...) @reserva()
%4 = load float, float* %1
%5 = fmul float %4, %0
store float %5, float* %3
%6 = getelementptr inbounds float, float* %1, i64 1
%7 = load float, float* %6
%8 = fmul float %7, %0
%9 = getelementptr inbounds float, float* %3, i64 1
store float %8, float* %9
%10 = getelementptr inbounds float, float* %1, i64 2
%11 = load float, float* %10
%12 = fmul float %11, %0
%13 = getelementptr inbounds float, float* %3, i64 2
store float %12, float* %13
ret float* %3
}
int GifBitSize(int n) {
  register int i;
  for (i = 1; i <= 8; i++)
    if ((1 << i) >= n)
      break;
  return (i);
}


x86 assembly (clang, -O0):
<GifBitSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x8,-0x8(%rbp)
jg     1143 <GifBitSize+0x43>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    -0x4(%rbp),%eax
jl     1130 <GifBitSize+0x30>
jmp    1143 <GifBitSize+0x43>
jmp    1135 <GifBitSize+0x35>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <GifBitSize+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GifBitSize>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    $0x8,%ecx
ja     1123 <GifBitSize+0x23>
cmp    %edi,%eax
jl     1110 <GifBitSize+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @GifBitSize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 8
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %3
%9 = shl i32 1, %8
%10 = load i32, i32* %2
%11 = icmp sge i32 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %7
br label %17
13: ; preds = %7
br label %14
14: ; preds = %13
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %12, %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @GifBitSize(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 1, %1 ], [ %8, %2 ]
%4 = icmp ult i32 %3, 9
%5 = shl nuw nsw i32 1, %3
%6 = icmp slt i32 %5, %0
%7 = select i1 %4, i1 %6, i1 false
%8 = add nuw nsw i32 %3, 1
br i1 %7, label %2, label %9
9: ; preds = %2
ret i32 %3
}
int bsp_uboot_environ_check_crc(void) { return 1; }


x86 assembly (clang, -O0):
<bsp_uboot_environ_check_crc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bsp_uboot_environ_check_crc>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bsp_uboot_environ_check_crc() {
ret i32 1
}

LLVM IR (-O2):
define i32 @bsp_uboot_environ_check_crc() {
ret i32 1
}
/* Type definitions */
struct input_event {
  int dummy;
};
typedef int ssize_t;

/* Variables and functions */
int read(int, struct input_event *, int);
int event_occurred(int f, struct input_event *event) {
  ssize_t n;
  n = read(f, event, sizeof *event);
  if (n == (ssize_t)-1)
    return 0;
  if (n != sizeof *event) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<event_occurred>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <read@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1149 <event_occurred+0x39>
movl   $0x0,-0x4(%rbp)
jmp    116a <event_occurred+0x5a>
movslq -0x14(%rbp),%rax
cmp    $0x4,%rax
je     1163 <event_occurred+0x53>
movl   $0x0,-0x4(%rbp)
jmp    116a <event_occurred+0x5a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_occurred>:
push   %rax
mov    $0x4,%edx
call   1030 <read@plt>
xor    %ecx,%ecx
cmp    $0x4,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.input_event = type { i32 }
define i32 @event_occurred(i32 %0, %struct.input_event* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.input_event*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.input_event* %1, %struct.input_event** %5
%7 = load i32, i32* %4
%8 = load %struct.input_event*, %struct.input_event** %5
%9 = call i32 @read(i32 %7, %struct.input_event* %8, i32 4)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 0, i32* %3
br label %19
13: ; preds = %2
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = icmp ne i64 %15, 4
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 0, i32* %3
br label %19
18: ; preds = %13
store i32 1, i32* %3
br label %19
19: ; preds = %18, %17, %12
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
%struct.input_event = type { i32 }
define i32 @event_occurred(i32 %0, %struct.input_event* nocapture %1) {
%3 = tail call i32 @read(i32 %0, %struct.input_event* %1, i32 4)
%4 = icmp eq i32 %3, 4
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned char Get1RCmb(unsigned int *iHSCMB, unsigned int iRow) {
  unsigned char nR1 = 0;
  unsigned char nBt = 0;
  nR1 = ((iRow >> 5) & 0xf);
  nBt = (iRow & 0x1f);
  return (iHSCMB[nR1] >> nBt) & 0x1;
}


x86 assembly (clang, -O0):
<Get1RCmb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movb   $0x0,-0xd(%rbp)
movb   $0x0,-0xe(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x5,%eax
and    $0xf,%eax
mov    %al,-0xd(%rbp)
mov    -0xc(%rbp),%eax
and    $0x1f,%eax
mov    %al,-0xe(%rbp)
mov    -0x8(%rbp),%rax
movzbl -0xd(%rbp),%ecx
mov    (%rax,%rcx,4),%eax
movzbl -0xe(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Get1RCmb>:
mov    %esi,%ecx
mov    %esi,%eax
shr    $0x5,%eax
and    $0xf,%eax
mov    (%rdi,%rax,4),%eax
shr    %cl,%eax
and    $0x1,%al
ret

LLVM IR (-O0):
define zeroext i8 @Get1RCmb(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i32* %0, i32** %3
store i32 %1, i32* %4
store i8 0, i8* %5
store i8 0, i8* %6
%7 = load i32, i32* %4
%8 = lshr i32 %7, 5
%9 = and i32 %8, 15
%10 = trunc i32 %9 to i8
store i8 %10, i8* %5
%11 = load i32, i32* %4
%12 = and i32 %11, 31
%13 = trunc i32 %12 to i8
store i8 %13, i8* %6
%14 = load i32*, i32** %3
%15 = load i8, i8* %5
%16 = zext i8 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i8, i8* %6
%20 = zext i8 %19 to i32
%21 = lshr i32 %18, %20
%22 = and i32 %21, 1
%23 = trunc i32 %22 to i8
ret i8 %23
}

LLVM IR (-O2):
define zeroext i8 @Get1RCmb(i32* nocapture %0, i32 %1) {
%3 = lshr i32 %1, 5
%4 = and i32 %3, 15
%5 = zext i32 %4 to i64
%6 = and i32 %1, 31
%7 = getelementptr inbounds i32, i32* %0, i64 %5
%8 = load i32, i32* %7
%9 = lshr i32 %8, %6
%10 = trunc i32 %9 to i8
%11 = and i8 %10, 1
ret i8 %11
}