xunge/DecIR huggingface dataset:
char *fd2mst(string)
char *string;
{
  double gsec, date, time, dj;
  dj = fd2jd(string);
  gsec = jd2mst(dj);
  ts2dt(gsec, &date, &time);
  date = 0.0;
  return (dt2fd(date, time));
}


x86 assembly (clang, -O0):
<fd2mst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <fd2jd@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
mov    $0x1,%al
call   1050 <jd2mst@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
lea    -0x18(%rbp),%rdi
lea    -0x20(%rbp),%rsi
mov    $0x1,%al
call   1030 <ts2dt@plt>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
mov    $0x2,%al
call   1060 <dt2fd@plt>
cltq
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd2mst>:
sub    $0x18,%rsp
xor    %eax,%eax
call   1040 <fd2jd@plt>
cvtsi2sd %eax,%xmm0
mov    $0x1,%al
call   1050 <jd2mst@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    $0x1,%al
call   1030 <ts2dt@plt>
movq   $0x0,0x10(%rsp)
movsd  0x8(%rsp),%xmm1
xorpd  %xmm0,%xmm0
mov    $0x2,%al
call   1060 <dt2fd@plt>
cltq
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i8* @fd2mst(i8* %0) {
%2 = alloca i8*
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store i8* %0, i8** %2
%7 = load i8*, i8** %2
%8 = call i32 (i8*, ...) bitcast (i32 (...)* @fd2jd to i32 (i8*, ...)*)(i8* %7)
%9 = sitofp i32 %8 to double
store double %9, double* %6
%10 = load double, double* %6
%11 = call i32 (double, ...) bitcast (i32 (...)* @jd2mst to i32 (double, ...)*)(double %10)
%12 = sitofp i32 %11 to double
store double %12, double* %3
%13 = load double, double* %3
%14 = call i32 (double, double*, double*, ...) bitcast (i32 (...)* @ts2dt to i32 (double, double*, double*, ...)*)(double %13, double* %4, double* %5)
store double 0.000000e+00, double* %4
%15 = load double, double* %4
%16 = load double, double* %5
%17 = call i32 (double, double, ...) bitcast (i32 (...)* @dt2fd to i32 (double, double, ...)*)(double %15, double %16)
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i8*
ret i8* %19
}

LLVM IR (-O2):
define i8* @fd2mst(i8* %0) {
%2 = alloca double
%3 = alloca double
%4 = bitcast double* %2 to i8*
%5 = bitcast double* %3 to i8*
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @fd2jd to i32 (i8*, ...)*)(i8* %0)
%7 = sitofp i32 %6 to double
%8 = tail call i32 (double, ...) bitcast (i32 (...)* @jd2mst to i32 (double, ...)*)(double %7)
%9 = sitofp i32 %8 to double
%10 = call i32 (double, double*, double*, ...) bitcast (i32 (...)* @ts2dt to i32 (double, double*, double*, ...)*)(double %9, double* %2, double* %3)
store double 0.000000e+00, double* %2
%11 = load double, double* %3
%12 = call i32 (double, double, ...) bitcast (i32 (...)* @dt2fd to i32 (double, double, ...)*)(double 0.000000e+00, double %11)
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i8*
ret i8* %14
}
/* Variables and functions */
unsigned int dectou(char *);
char *skipstring(char *);
int /*<<< orphan*/ write_reg(int, unsigned int);
void command_bandpass(char *params) {
  unsigned f = dectou(params);
  unsigned g = dectou(skipstring(params));
  f = f / 5 * 8 + f % 5;
  write_reg(4, f);
  write_reg(5, g | 0x80);
}


x86 assembly (clang, -O0):
<command_bandpass>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <dectou@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <skipstring@plt>
mov    %rax,%rdi
call   1050 <dectou@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x5,%ecx
xor    %edx,%edx
div    %ecx
shl    $0x3,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x5,%ecx
xor    %edx,%edx
div    %ecx
mov    -0x14(%rbp),%eax
add    %edx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x4,%edi
call   1040 <write_reg@plt>
mov    -0x10(%rbp),%esi
or     $0x80,%esi
mov    $0x5,%edi
call   1040 <write_reg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<command_bandpass>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1050 <dectou@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <skipstring@plt>
mov    %rax,%rdi
call   1050 <dectou@plt>
mov    %eax,%ebx
mov    %ebp,%eax
mov    $0xcccccccd,%ecx
imul   %rax,%rcx
shr    $0x22,%rcx
lea    (%rcx,%rcx,4),%eax
shl    $0x3,%ecx
sub    %eax,%ebp
or     %ecx,%ebp
mov    $0x4,%edi
mov    %ebp,%esi
call   1040 <write_reg@plt>
or     $0x80,%ebx
mov    $0x5,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <write_reg@plt>

LLVM IR (-O0):
define void @command_bandpass(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @dectou(i8* %5)
store i32 %6, i32* %3
%7 = load i8*, i8** %2
%8 = call i8* @skipstring(i8* %7)
%9 = call i32 @dectou(i8* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = udiv i32 %10, 5
%12 = mul i32 %11, 8
%13 = load i32, i32* %3
%14 = urem i32 %13, 5
%15 = add i32 %12, %14
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = call i32 @write_reg(i32 4, i32 %16)
%18 = load i32, i32* %4
%19 = or i32 %18, 128
%20 = call i32 @write_reg(i32 5, i32 %19)
ret void
}

LLVM IR (-O2):
define void @command_bandpass(i8* %0) {
%2 = tail call i32 @dectou(i8* %0)
%3 = tail call i8* @skipstring(i8* %0)
%4 = tail call i32 @dectou(i8* %3)
%5 = udiv i32 %2, 5
%6 = shl i32 %5, 3
%7 = urem i32 %2, 5
%8 = or i32 %6, %7
%9 = tail call i32 @write_reg(i32 4, i32 %8)
%10 = or i32 %4, 128
%11 = tail call i32 @write_reg(i32 5, i32 %10)
ret void
}
unsigned long ul_sublim(unsigned long minuend, unsigned long subtrahend,
                        unsigned long limit) {
  unsigned long x;
  if (minuend < limit)
    return limit;
  if (subtrahend > minuend)
    return limit;
  x = minuend - subtrahend;
  if (x > limit)
    return x;
  else
    return limit;
}


x86 assembly (clang, -O0):
<ul_sublim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    112b <ul_sublim+0x2b>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1175 <ul_sublim+0x75>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1146 <ul_sublim+0x46>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1175 <ul_sublim+0x75>
mov    -0x10(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jbe    116d <ul_sublim+0x6d>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1175 <ul_sublim+0x75>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ul_sublim>:
mov    %rdi,%rax
sub    %rsi,%rax
cmp    %rdx,%rax
cmovbe %rdx,%rax
cmp    %rdx,%rdi
cmovb  %rdx,%rax
cmp    %rsi,%rdi
cmovb  %rdx,%rax
ret

LLVM IR (-O0):
define i64 @ul_sublim(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i64, i64* %5
%10 = load i64, i64* %7
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load i64, i64* %7
store i64 %13, i64* %4
br label %31
14: ; preds = %3
%15 = load i64, i64* %6
%16 = load i64, i64* %5
%17 = icmp ugt i64 %15, %16
br i1 %17, label %18, label %20
18: ; preds = %14
%19 = load i64, i64* %7
store i64 %19, i64* %4
br label %31
20: ; preds = %14
%21 = load i64, i64* %5
%22 = load i64, i64* %6
%23 = sub i64 %21, %22
store i64 %23, i64* %8
%24 = load i64, i64* %8
%25 = load i64, i64* %7
%26 = icmp ugt i64 %24, %25
br i1 %26, label %27, label %29
27: ; preds = %20
%28 = load i64, i64* %8
store i64 %28, i64* %4
br label %31
29: ; preds = %20
%30 = load i64, i64* %7
store i64 %30, i64* %4
br label %31
31: ; preds = %29, %27, %18, %12
%32 = load i64, i64* %4
ret i64 %32
}

LLVM IR (-O2):
define i64 @ul_sublim(i64 %0, i64 %1, i64 %2) {
%4 = icmp ult i64 %0, %2
%5 = icmp ult i64 %0, %1
%6 = or i1 %5, %4
%7 = sub i64 %0, %1
%8 = icmp ugt i64 %7, %2
%9 = select i1 %8, i64 %7, i64 %2
%10 = select i1 %6, i64 %2, i64 %9
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ func1(int);
int main(void) {
  static int static_var = 85;
  static int static_var2;
  int a = 1;
  int b;
  int x = -2;
  func1(static_var + static_var2 + a + b);
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0xfffffffe,-0x10(%rbp)
mov    0x2ef5(%rip),%edi
add    0x2ef7(%rip),%edi
add    -0x8(%rbp),%edi
add    -0xc(%rbp),%edi
call   1030 <func1@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <func1@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@main.static_var = internal global i32 85
@main.static_var2 = internal global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 -2, i32* %4
%5 = load i32, i32* @main.static_var
%6 = load i32, i32* @main.static_var2
%7 = add nsw i32 %5, %6
%8 = load i32, i32* %2
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
%12 = call i32 @func1(i32 %11)
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @func1(i32 undef)
ret i32 1
}
/* Type definitions */
typedef int uint64_t;
typedef int int64_t;

/* Variables and functions */
uint64_t upb_zzencode_64(int64_t n) { return ((uint64_t)n << 1) ^ (n >> 63); }


x86 assembly (clang, -O0):
<upb_zzencode_64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%edx
mov    $0x3f,%ecx
sar    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<upb_zzencode_64>:
ret

LLVM IR (-O0):
define i32 @upb_zzencode_64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = load i32, i32* %2
%6 = ashr i32 %5, 63
%7 = xor i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @upb_zzencode_64(i32 %0) {
ret i32 poison
}
/* Variables and functions */
unsigned char *cbor_write_type_size_bytes(unsigned char *, unsigned int, int,
                                          unsigned int, unsigned char *);
unsigned char *cbor_write_string_with_len(unsigned char *data,
                                          unsigned int size, const char *str,
                                          unsigned int str_size) {
  return cbor_write_type_size_bytes(data, size, 3, str_size,
                                    (unsigned char *)str);
}


x86 assembly (clang, -O0):
<cbor_write_string_with_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%r8
mov    $0x3,%edx
call   1030 <cbor_write_type_size_bytes@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbor_write_string_with_len>:
mov    %rdx,%r8
mov    $0x3,%edx
jmp    1030 <cbor_write_type_size_bytes@plt>

LLVM IR (-O0):
define i8* @cbor_write_string_with_len(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %8
%12 = load i8*, i8** %7
%13 = call i8* @cbor_write_type_size_bytes(i8* %9, i32 %10, i32 3, i32 %11, i8* %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @cbor_write_string_with_len(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i8* @cbor_write_type_size_bytes(i8* %0, i32 %1, i32 3, i32 %3, i8* %2)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int salbase, salreceber, salgrat;
  printf("Digite o salario base!");
  scanf("%d", &salbase);
  salgrat = (0, 05 * salbase) + salbase;
  salreceber = (0, 07 * salgrat) - salgrat;
  printf("O novo salrio é %d", salreceber);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
imul   $0x5,-0x8(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
imul   $0x7,-0x10(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeac(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xef2(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
shl    $0x2,%eax
lea    (%rax,%rax,8),%esi
lea    0xec6(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Digite o salario base!\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [20 x i8] c"O novo salrio \C3\A9 %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%7 = load i32, i32* %2
%8 = mul nsw i32 5, %7
%9 = load i32, i32* %2
%10 = add nsw i32 %8, %9
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = mul nsw i32 7, %11
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"Digite o salario base!\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [20 x i8] c"O novo salrio \C3\A9 %d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = mul i32 %5, 36
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
void XtMoveWidget() {}


x86 assembly (clang, -O0):
<XtMoveWidget>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtMoveWidget>:
ret

LLVM IR (-O0):
define void @XtMoveWidget() {
ret void
}

LLVM IR (-O2):
define void @XtMoveWidget() {
ret void
}
/* Variables and functions */
scalar_t__ big(int);
int small(int n) { return big(n) ? n : 1; }


x86 assembly (clang, -O0):
<small>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <big@plt>
cmp    $0x0,%rax
je     1138 <small+0x28>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1145 <small+0x35>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1145 <small+0x35>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<small>:
push   %rbx
mov    %edi,%ebx
call   1030 <big@plt>
test   %rax,%rax
mov    $0x1,%eax
cmovne %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @small(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @big(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %2
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %6
%10 = phi i32 [ %7, %6 ], [ 1, %8 ]
ret i32 %10
}

LLVM IR (-O2):
define i32 @small(i32 %0) {
%2 = tail call i64 @big(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 1, i32 %0
ret i32 %4
}
/* Variables and functions */
unsigned char crc7_add_byte(unsigned char, unsigned char);
unsigned char crc7_generate_bytes(unsigned char *b, int count) {
  unsigned char crc = 0;
  int i;
  for (i = 0; i < count; i++)
    crc = crc7_add_byte(b[i], crc);
  return crc;
}


x86 assembly (clang, -O0):
<crc7_generate_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movb   $0x0,-0xd(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115e <crc7_generate_bytes+0x4e>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
movzbl %al,%edi
movzbl -0xd(%rbp),%esi
call   1030 <crc7_add_byte@plt>
mov    %al,-0xd(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112a <crc7_generate_bytes+0x1a>
movzbl -0xd(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc7_generate_bytes>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1148 <crc7_generate_bytes+0x38>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%r14,%rbx,1),%edi
movzbl %al,%esi
call   1030 <crc7_add_byte@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <crc7_generate_bytes+0x20>
jmp    114a <crc7_generate_bytes+0x3a>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define zeroext i8 @crc7_generate_bytes(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8 0, i8* %5
store i32 0, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = load i8, i8* %5
%18 = call zeroext i8 @crc7_add_byte(i8 zeroext %16, i8 zeroext %17)
store i8 %18, i8* %5
br label %19
19: ; preds = %11
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
%23 = load i8, i8* %5
ret i8 %23
}

LLVM IR (-O2):
define zeroext i8 @crc7_generate_bytes(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = phi i8 [ 0, %4 ], [ %11, %6 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %7
%10 = load i8, i8* %9
%11 = tail call zeroext i8 @crc7_add_byte(i8 zeroext %10, i8 zeroext %8)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
%15 = phi i8 [ 0, %2 ], [ %11, %6 ]
ret i8 %15
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int write_set_structure(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc(111, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<write_set_structure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x6f,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_set_structure>:
mov    $0x6f,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @write_set_structure() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 111, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @write_set_structure() {
%1 = tail call i32 @_ada_use_c2phc(i32 111, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ dissector_cleanup_ethernet();
void dissector_cleanup_all(void) { dissector_cleanup_ethernet(); }


x86 assembly (clang, -O0):
<dissector_cleanup_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dissector_cleanup_ethernet@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dissector_cleanup_all>:
xor    %eax,%eax
jmp    1030 <dissector_cleanup_ethernet@plt>

LLVM IR (-O0):
define void @dissector_cleanup_all() {
%1 = call i32 (...) @dissector_cleanup_ethernet()
ret void
}

LLVM IR (-O2):
define void @dissector_cleanup_all() {
%1 = tail call i32 (...) @dissector_cleanup_ethernet()
ret void
}
/* Variables and functions */
scalar_t__ realloc(char *, size_t);
char *strcat(char *, char const *);
int strlen(char const *);
char *xstrcat(char *psz_string, const char *psz_to_append) {
  size_t i_new_string_length = strlen(psz_string) + strlen(psz_to_append) + 1;
  psz_string = (char *)realloc(psz_string, i_new_string_length);
  return strcat(psz_string, psz_to_append);
}


x86 assembly (clang, -O0):
<xstrcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
add    %ecx,%eax
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrcat>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%r15d
mov    %r14,%rdi
call   1030 <strlen@plt>
add    %r15d,%eax
add    $0x1,%eax
movslq %eax,%rsi
mov    %rbx,%rdi
call   1040 <realloc@plt>
mov    %rax,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <strcat@plt>

LLVM IR (-O0):
define i8* @xstrcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = add nsw i32 %7, %9
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
store i64 %12, i64* %5
%13 = load i8*, i8** %3
%14 = load i64, i64* %5
%15 = call i64 @realloc(i8* %13, i64 %14)
%16 = inttoptr i64 %15 to i8*
store i8* %16, i8** %3
%17 = load i8*, i8** %3
%18 = load i8*, i8** %4
%19 = call i8* @strcat(i8* %17, i8* %18)
ret i8* %19
}

LLVM IR (-O2):
define i8* @xstrcat(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = add i32 %3, 1
%6 = add i32 %5, %4
%7 = sext i32 %6 to i64
%8 = tail call i64 @realloc(i8* %0, i64 %7)
%9 = inttoptr i64 %8 to i8*
%10 = tail call i8* @strcat(i8* dereferenceable(1) %9, i8* dereferenceable(1) %1)
ret i8* %9
}
/* Type definitions */
struct cli_def {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cli_error(struct cli_def *, char *);
int cli_int_buildmode_cancel_cback(struct cli_def *cli, const char *command,
                                   char *argv[], int argc) {
  int rc = -11;
  if (argc > 0) {
    cli_error(cli, "Extra arguments on command line, command ignored.");
    rc = -1;
  }
  return rc;
}


x86 assembly (clang, -O0):
<cli_int_buildmode_cancel_cback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movl   $0xfffffff5,-0x20(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    114f <cli_int_buildmode_cancel_cback+0x3f>
mov    -0x8(%rbp),%rdi
lea    0xebd(%rip),%rsi
call   1030 <cli_error@plt>
movl   $0xffffffff,-0x20(%rbp)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_int_buildmode_cancel_cback>:
test   %ecx,%ecx
jle    112b <cli_int_buildmode_cancel_cback+0x1b>
push   %rax
lea    0xee4(%rip),%rsi
call   1030 <cli_error@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
ret
mov    $0xfffffff5,%eax
ret

LLVM IR (-O0):
%struct.cli_def = type { i32 }
@.str = [50 x i8] c"Extra arguments on command line, command ignored.\00"
define i32 @cli_int_buildmode_cancel_cback(%struct.cli_def* %0, i8* %1, i8** %2, i32 %3) {
%5 = alloca %struct.cli_def*
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i32
store %struct.cli_def* %0, %struct.cli_def** %5
store i8* %1, i8** %6
store i8** %2, i8*** %7
store i32 %3, i32* %8
store i32 -11, i32* %9
%10 = load i32, i32* %8
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load %struct.cli_def*, %struct.cli_def** %5
%14 = call i32 @cli_error(%struct.cli_def* %13, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %9
br label %15
15: ; preds = %12, %4
%16 = load i32, i32* %9
ret i32 %16
}

LLVM IR (-O2):
%struct.cli_def = type { i32 }
@.str = [50 x i8] c"Extra arguments on command line, command ignored.\00"
define i32 @cli_int_buildmode_cancel_cback(%struct.cli_def* %0, i8* nocapture readnone %1, i8** nocapture readnone %2, i32 %3) {
%5 = icmp sgt i32 %3, 0
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @cli_error(%struct.cli_def* %0, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ -1, %6 ], [ -11, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help() {
  printf("  -v s  enter the date in format YYYY.MM.DD-HH:MM.(default: "
         "01.01.2010-01:01)\n");
  printf("  -d x  enter the delay x for clock test.(default: 60sec)\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf28(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf2a(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [79 x i8] c" -v s enter the date in format YYYY.MM.DD-HH:MM.(default: 01.01.2010-01:01)\0A\00"
@.str.1 = [59 x i8] c" -d x enter the delay x for clock test.(default: 60sec)\0A\00"
define void @help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [78 x i8] c" -v s enter the date in format YYYY.MM.DD-HH:MM.(default: 01.01.2010-01:01)\00"
@str.2 = [58 x i8] c" -d x enter the delay x for clock test.(default: 60sec)\00"
define void @help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([78 x i8], [78 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([58 x i8], [58 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WIZ_CS(int /*<<< orphan*/);
void IINCHIP_CSoff(void) { WIZ_CS(0); }


x86 assembly (clang, -O0):
<IINCHIP_CSoff>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <WIZ_CS@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IINCHIP_CSoff>:
xor    %edi,%edi
jmp    1030 <WIZ_CS@plt>

LLVM IR (-O0):
define void @IINCHIP_CSoff() {
%1 = call i32 @WIZ_CS(i32 0)
ret void
}

LLVM IR (-O2):
define void @IINCHIP_CSoff() {
%1 = tail call i32 @WIZ_CS(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SavePrefs();
void xShadow(void) { SavePrefs(); }


x86 assembly (clang, -O0):
<xShadow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SavePrefs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xShadow>:
xor    %eax,%eax
jmp    1030 <SavePrefs@plt>

LLVM IR (-O0):
define void @xShadow() {
%1 = call i32 (...) @SavePrefs()
ret void
}

LLVM IR (-O2):
define void @xShadow() {
%1 = tail call i32 (...) @SavePrefs()
ret void
}
int select() {}


x86 assembly (clang, -O0):
<select>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<select>:
ret

LLVM IR (-O0):
define i32 @select() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @select() {
ret i32 undef
}
void __malloc_lock(ptr) struct _reent *ptr;
{}


x86 assembly (clang, -O0):
<__malloc_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malloc_lock>:
ret

LLVM IR (-O0):
%struct._reent = type opaque
define void @__malloc_lock(%struct._reent* %0) {
%2 = alloca %struct._reent*
store %struct._reent* %0, %struct._reent** %2
ret void
}

LLVM IR (-O2):
%struct._reent = type opaque
define void @__malloc_lock(%struct._reent* nocapture %0) {
ret void
}
void mpc_oem_bus_info(struct mpc_config_bus *m, char *name,
                      struct mpc_config_translation *translation) {}


x86 assembly (clang, -O0):
<mpc_oem_bus_info>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpc_oem_bus_info>:
ret

LLVM IR (-O0):
%struct.mpc_config_bus = type opaque
%struct.mpc_config_translation = type opaque
define void @mpc_oem_bus_info(%struct.mpc_config_bus* %0, i8* %1, %struct.mpc_config_translation* %2) {
%4 = alloca %struct.mpc_config_bus*
%5 = alloca i8*
%6 = alloca %struct.mpc_config_translation*
store %struct.mpc_config_bus* %0, %struct.mpc_config_bus** %4
store i8* %1, i8** %5
store %struct.mpc_config_translation* %2, %struct.mpc_config_translation** %6
ret void
}

LLVM IR (-O2):
%struct.mpc_config_bus = type opaque
%struct.mpc_config_translation = type opaque
define void @mpc_oem_bus_info(%struct.mpc_config_bus* nocapture %0, i8* nocapture %1, %struct.mpc_config_translation* nocapture %2) {
ret void
}
int main(void) {
  int a;
  int b;
  int c;
  for (a = 100; a > 50; a--) {
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x64,-0x8(%rbp)
cmpl   $0x32,-0x8(%rbp)
jle    112f <main+0x2f>
jmp    1121 <main+0x21>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 100, i32* %2
br label %5
5: ; preds = %9, %0
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 50
br i1 %7, label %8, label %12
8: ; preds = %5
br label %9
9: ; preds = %8
%10 = load i32, i32* %2
%11 = add nsw i32 %10, -1
store i32 %11, i32* %2
br label %5
12: ; preds = %5
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
struct qcc_message_list {
  int dummy;
};
struct qcc_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ qcc_list_pop_front(struct qcc_list *);
void qcc_message_list_pop_front(struct qcc_message_list *list) {
  qcc_list_pop_front((struct qcc_list *)list);
}


x86 assembly (clang, -O0):
<qcc_message_list_pop_front>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <qcc_list_pop_front@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcc_message_list_pop_front>:
jmp    1030 <qcc_list_pop_front@plt>

LLVM IR (-O0):
%struct.qcc_message_list = type { i32 }
%struct.qcc_list = type { i32 }
define void @qcc_message_list_pop_front(%struct.qcc_message_list* %0) {
%2 = alloca %struct.qcc_message_list*
store %struct.qcc_message_list* %0, %struct.qcc_message_list** %2
%3 = load %struct.qcc_message_list*, %struct.qcc_message_list** %2
%4 = bitcast %struct.qcc_message_list* %3 to %struct.qcc_list*
%5 = call i32 @qcc_list_pop_front(%struct.qcc_list* %4)
ret void
}

LLVM IR (-O2):
%struct.qcc_message_list = type { i32 }
%struct.qcc_list = type { i32 }
define void @qcc_message_list_pop_front(%struct.qcc_message_list* %0) {
%2 = bitcast %struct.qcc_message_list* %0 to %struct.qcc_list*
%3 = tail call i32 @qcc_list_pop_front(%struct.qcc_list* %2)
ret void
}
void NV21ToYUV24Row_Any_NEON() {}


x86 assembly (clang, -O0):
<NV21ToYUV24Row_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV21ToYUV24Row_Any_NEON>:
ret

LLVM IR (-O0):
define void @NV21ToYUV24Row_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @NV21ToYUV24Row_Any_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x6d() {
  Assert_real((iscntrl(109) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              550, ("iscntrl should be 0 for m"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x6d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6d,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x226,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x6d>:
push   %rax
mov    $0x6d,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x226,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for m\00"
define void @t_iscntrl_0x6d() {
%1 = call i64 @iscntrl(i32 109)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for m\00"
define void @t_iscntrl_0x6d() {
%1 = tail call i64 @iscntrl(i32 109)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int ft_sous(int a, int b) { return (a - b); }


x86 assembly (clang, -O0):
<ft_sous>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_sous>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @ft_sous(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @ft_sous(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
void HAL_EEPROM_Perform_Pending_Erase() {}


x86 assembly (clang, -O0):
<HAL_EEPROM_Perform_Pending_Erase>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HAL_EEPROM_Perform_Pending_Erase>:
ret

LLVM IR (-O0):
define void @HAL_EEPROM_Perform_Pending_Erase() {
ret void
}

LLVM IR (-O2):
define void @HAL_EEPROM_Perform_Pending_Erase() {
ret void
}
int unaligned32_be(void *v) {
  return ((((unaligned32(v)) & 0xff000000) >> 24) |
          (((unaligned32(v)) & 0x00ff0000) >> 8) |
          (((unaligned32(v)) & 0x0000ff00) << 8) |
          (((unaligned32(v)) & 0x000000ff) << 24));
}


x86 assembly (clang, -O0):
<unaligned32_be>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <unaligned32@plt>
and    $0xff000000,%eax
shr    $0x18,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <unaligned32@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <unaligned32@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <unaligned32@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaligned32_be>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <unaligned32@plt>
mov    %eax,%ebp
shr    $0x18,%ebp
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <unaligned32@plt>
mov    %eax,%ebx
shr    $0x8,%ebx
and    $0xff00,%ebx
or     %ebp,%ebx
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <unaligned32@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
and    $0xff0000,%ebp
or     %ebx,%ebp
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <unaligned32@plt>
shl    $0x18,%eax
or     %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @unaligned32_be(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %3)
%5 = and i32 %4, -16777216
%6 = lshr i32 %5, 24
%7 = load i8*, i8** %2
%8 = call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %7)
%9 = and i32 %8, 16711680
%10 = ashr i32 %9, 8
%11 = or i32 %6, %10
%12 = load i8*, i8** %2
%13 = call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %12)
%14 = and i32 %13, 65280
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i8*, i8** %2
%18 = call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %17)
%19 = and i32 %18, 255
%20 = shl i32 %19, 24
%21 = or i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @unaligned32_be(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %0)
%3 = lshr i32 %2, 24
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %0)
%5 = lshr i32 %4, 8
%6 = and i32 %5, 65280
%7 = or i32 %6, %3
%8 = tail call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %0)
%9 = shl i32 %8, 8
%10 = and i32 %9, 16711680
%11 = or i32 %7, %10
%12 = tail call i32 (i8*, ...) bitcast (i32 (...)* @unaligned32 to i32 (i8*, ...)*)(i8* %0)
%13 = shl i32 %12, 24
%14 = or i32 %11, %13
ret i32 %14
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void USBDMAChannelIntDisable(uint32_t ui32Base, uint32_t ui32Channel) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000204 + (0x10 * ui32Channel)))) &=
      ~0x00000008;
}


x86 assembly (clang, -O0):
<USBDMAChannelIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x204,%eax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
add    %ecx,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffff7,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBDMAChannelIntDisable>:
movslq %edi,%rax
movslq %esi,%rcx
shl    $0x4,%rcx
andl   $0xfffffff7,0x204(%rax,%rcx,1)
f7
ret

LLVM IR (-O0):
define void @USBDMAChannelIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 516
%7 = load i32, i32* %4
%8 = mul nsw i32 16, %7
%9 = add nsw i32 %6, %8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, -9
store volatile i32 %13, i32* %11
ret void
}

LLVM IR (-O2):
define void @USBDMAChannelIntDisable(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 516
%4 = shl nsw i32 %1, 4
%5 = add nsw i32 %3, %4
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, -9
store volatile i32 %9, i32* %7
ret void
}
int foo(int a) {
  static const short ar[] = {&&l1 - &&l1, &&l2 - &&l1};
  void *p = &&l1 + ar[a];
  goto *p;
l1:
  return 1;
l2:
  return 2;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movslq -0x8(%rbp),%rcx
lea    0xeee(%rip),%rax
movswq (%rax,%rcx,2),%rcx
lea    0x14(%rip),%rax
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    114a <foo+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1145 <foo+0x45>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret
mov    -0x18(%rbp),%rax
jmp    *%rax

x86 assembly (clang, -O2):
<foo>:
movslq %edi,%rax
lea    0xef6(%rip),%rcx
movswq (%rcx,%rax,2),%rax
lea    0x5(%rip),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x1,%eax
ret
mov    $0x2,%eax
ret

LLVM IR (-O0):
@foo.ar = internal constant [2 x i16] [i16 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@foo, %13) to i64), i64 ptrtoint (i8* blockaddress(@foo, %13) to i64)) to i16), i16 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@foo, %14) to i64), i64 ptrtoint (i8* blockaddress(@foo, %13) to i64)) to i16)]
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [2 x i16], [2 x i16]* @foo.ar, i64 0, i64 %6
%8 = load i16, i16* %7
%9 = sext i16 %8 to i32
%10 = sext i32 %9 to i64
%11 = getelementptr i8, i8* blockaddress(@foo, %13), i64 %10
store i8* %11, i8** %4
%12 = load i8*, i8** %4
br label %17
13: ; preds = %17, %17, %17, %17
store i32 1, i32* %2
br label %15
14: ; preds = %17
store i32 2, i32* %2
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %2
ret i32 %16
17: ; preds = %1
%18 = phi i8* [ %12, %1 ]
indirectbr i8* %18, [label %13, label %13, label %14, label %13, label %13]
}

LLVM IR (-O2):
@foo.ar = internal unnamed_addr constant [2 x i16] [i16 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@foo, %8) to i64), i64 ptrtoint (i8* blockaddress(@foo, %8) to i64)) to i16), i16 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@foo, %7) to i64), i64 ptrtoint (i8* blockaddress(@foo, %8) to i64)) to i16)]
define i32 @foo(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds [2 x i16], [2 x i16]* @foo.ar, i64 0, i64 %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i64
%6 = getelementptr i8, i8* blockaddress(@foo, %8), i64 %5
indirectbr i8* %6, [label %8, label %7]
7: ; preds = %1
br label %8
8: ; preds = %1, %7
%9 = phi i32 [ 2, %7 ], [ 1, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, int, int /*<<< orphan*/);
extern const char *cJSON_Version(void) {
  static char version[15];
  sprintf(version, "%i.%i.%i", 1, 3, 0);
  return version;
}


x86 assembly (clang, -O0):
<cJSON_Version>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f0e(%rip),%rdi
lea    0xede(%rip),%rsi
mov    $0x1,%edx
mov    $0x3,%ecx
xor    %r8d,%r8d
call   1030 <sprintf@plt>
lea    0x2eee(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cJSON_Version>:
push   %rbx
lea    0x2f11(%rip),%rbx
lea    0xee1(%rip),%rsi
mov    %rbx,%rdi
mov    $0x1,%edx
mov    $0x3,%ecx
xor    %r8d,%r8d
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@cJSON_Version.version = internal global [15 x i8] zeroinitializer
@.str = [9 x i8] c"%i.%i.%i\00"
define i8* @cJSON_Version() {
%1 = call i32 @sprintf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i32 3, i32 0)
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0)
}

LLVM IR (-O2):
@cJSON_Version.version = internal global [15 x i8] zeroinitializer
@.str = [9 x i8] c"%i.%i.%i\00"
define i8* @cJSON_Version() {
%1 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i32 3, i32 0)
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void reset_sta() { system("cp /root/wireless.sta.origin /root/wireless.sta"); }


x86 assembly (clang, -O0):
<reset_sta>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_sta>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"cp /root/wireless.sta.origin /root/wireless.sta\00"
define void @reset_sta() {
%1 = call i32 @system(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [48 x i8] c"cp /root/wireless.sta.origin /root/wireless.sta\00"
define void @reset_sta() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_abs();
int /*<<< orphan*/ e_rol();
int /*<<< orphan*/ e_writeback();
void e_rol_abs() {
  e_abs();
  e_rol();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_rol_abs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <e_abs@plt>
mov    $0x0,%al
call   1040 <e_rol@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_rol_abs>:
push   %rax
xor    %eax,%eax
call   1050 <e_abs@plt>
xor    %eax,%eax
call   1040 <e_rol@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_rol_abs() {
%1 = call i32 (...) @e_abs()
%2 = call i32 (...) @e_rol()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_rol_abs() {
%1 = tail call i32 (...) @e_abs()
%2 = tail call i32 (...) @e_rol()
%3 = tail call i32 (...) @e_writeback()
ret void
}
void foo(void) {
  int s0, s1 = 5, s2 = 6;
  int p0, p1, p2;
  int f0 = 4, f1 = 5, f2 = 6;
#pragma omp parallel shared(s0, s1, s2) private(p0, p1, p2)                    \
    firstprivate(f0, f1, f2)
  {
    asm("" : "=m"(p0) : "m"(p1), "mr"(p2));
    if (omp_get_thread_num() == 0)
      asm("" : "=m"(s0) : "m"(s1), "mr"(s2));
    asm("" : "=m"(f0) : "m"(f1), "mr"(f2));
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x5,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
movl   $0x4,-0x1c(%rbp)
movl   $0x5,-0x20(%rbp)
movl   $0x6,-0x24(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
cmp    $0x0,%eax
jne    1157 <foo+0x47>
mov    -0xc(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x30(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
sub    $0x28,%rsp
movl   $0x5,0x14(%rsp)
movl   $0x4,0x10(%rsp)
movl   $0x5,0xc(%rsp)
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
test   %eax,%eax
jne    1137 <foo+0x27>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 5, i32* %2
store i32 6, i32* %3
store i32 4, i32* %7
store i32 5, i32* %8
store i32 6, i32* %9
%10 = load i32, i32* %6
%11 = call i32 (...) @omp_get_thread_num()
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %0
%14 = load i32, i32* %3
br label %15
15: ; preds = %13, %0
%16 = load i32, i32* %9
ret void
}

LLVM IR (-O2):
define void @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = bitcast i32* %1 to i8*
%8 = bitcast i32* %2 to i8*
store i32 5, i32* %2
%9 = bitcast i32* %3 to i8*
%10 = bitcast i32* %4 to i8*
%11 = bitcast i32* %5 to i8*
store i32 4, i32* %5
%12 = bitcast i32* %6 to i8*
store i32 5, i32* %6
%13 = call i32 (...) @omp_get_thread_num()
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %0
br label %16
16: ; preds = %15, %0
ret void
}