xunge/DecIR huggingface dataset:
void main(void) {
  puts0("\r\nprooltest\r\n");
  pause();
  __asm__ volatile("int $0x20");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1040 <puts0@plt>
mov    $0x0,%al
call   1030 <pause@plt>
int    $0x20
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1040 <puts0@plt>
xor    %eax,%eax
call   1030 <pause@plt>
int    $0x20
pop    %rax
ret

LLVM IR (-O0):
@.str = [14 x i8] c"\0D\0Aprooltest\0D\0A\00"
define void @main() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @puts0 to i32 (i8*, ...)*)(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @pause()
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"\0D\0Aprooltest\0D\0A\00"
define void @main() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts0 to i32 (i8*, ...)*)(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @pause()
tail call void asm sideeffect "int $$0x20", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
double const fabs(double const);
int almost_equal(const double x, const double y, const double error) {
  return ((fabs(x - y) < error));
}


x86 assembly (clang, -O0):
<almost_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<almost_equal>:
subsd  %xmm1,%xmm0
andpd  0xef4(%rip),%xmm0
xor    %eax,%eax
ucomisd %xmm0,%xmm2
seta   %al
ret

LLVM IR (-O0):
define i32 @almost_equal(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fsub double %7, %8
%10 = call double @fabs(double %9)
%11 = load double, double* %6
%12 = fcmp olt double %10, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @almost_equal(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = tail call double @llvm.fabs.f64(double %4)
%6 = fcmp olt double %5, %2
%7 = zext i1 %6 to i32
ret i32 %7
}
int test_imm_CFuint8_mem(unsigned char *val) {
  return ((*val) & (0xCF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CFuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xcf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CFuint8_mem>:
testb  $0xcf,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CFuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 207
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_CFuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -49
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
double findMedianSortedArrays(int *, int, int *, int);
int /*<<< orphan*/ printf(char *, double);
int main() {
  int A[] = {2, 3};
  int B[] = {1};
  printf("%f\n", findMedianSortedArrays(A, 2, B, 1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xec8(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0xc(%rbp),%rdi
lea    -0x10(%rbp),%rdx
mov    $0x2,%esi
mov    $0x1,%ecx
call   1040 <findMedianSortedArrays@plt>
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0x300000002,%rax
mov    %rax,0x10(%rsp)
movl   $0x1,0xc(%rsp)
lea    0x10(%rsp),%rdi
lea    0xc(%rsp),%rdx
mov    $0x2,%esi
mov    $0x1,%ecx
call   1040 <findMedianSortedArrays@plt>
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.A = [2 x i32] [i32 2, i32 3]
@__const.main.B = [1 x i32] [i32 1]
@.str = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i32]
%3 = alloca [1 x i32]
store i32 0, i32* %1
%4 = bitcast [2 x i32]* %2 to i8*
%5 = bitcast [1 x i32]* %3 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%7 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
%8 = call double @findMedianSortedArrays(i32* %6, i32 2, i32* %7, i32 1)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca i64
%2 = alloca [1 x i32]
%3 = bitcast i64* %1 to i8*
store i64 12884901890, i64* %1
%4 = bitcast [1 x i32]* %2 to i8*
%5 = getelementptr inbounds [1 x i32], [1 x i32]* %2, i64 0, i64 0
store i32 1, i32* %5
%6 = bitcast i64* %1 to i32*
%7 = call double @findMedianSortedArrays(i32* %6, i32 2, i32* %5, i32 1)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %7)
ret i32 0
}
/* Type definitions */
struct lang_type {
  int dummy;
};

/* Variables and functions */
scalar_t__ ggc_test_and_set_mark(struct lang_type *const);
void gt_ggc_mx_lang_type(void *x_p) {
  struct lang_type *const x = (struct lang_type *)x_p;
  if (ggc_test_and_set_mark(x)) {
  }
}


x86 assembly (clang, -O0):
<gt_ggc_mx_lang_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ggc_test_and_set_mark@plt>
cmp    $0x0,%rax
je     113c <gt_ggc_mx_lang_type+0x2c>
jmp    113c <gt_ggc_mx_lang_type+0x2c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_ggc_mx_lang_type>:
jmp    1030 <ggc_test_and_set_mark@plt>

LLVM IR (-O0):
%struct.lang_type = type { i32 }
define void @gt_ggc_mx_lang_type(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.lang_type*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.lang_type*
store %struct.lang_type* %5, %struct.lang_type** %3
%6 = load %struct.lang_type*, %struct.lang_type** %3
%7 = call i64 @ggc_test_and_set_mark(%struct.lang_type* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %1
ret void
}

LLVM IR (-O2):
%struct.lang_type = type { i32 }
define void @gt_ggc_mx_lang_type(i8* %0) {
%2 = bitcast i8* %0 to %struct.lang_type*
%3 = tail call i64 @ggc_test_and_set_mark(%struct.lang_type* %2)
ret void
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_dec_a(struct em8051 *aCPU, int aPosition, char *aBuffer) {
  sprintf(aBuffer, "DEC   A");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_dec_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_dec_a>:
movabs $0x41202020434544,%rax
mov    %rax,(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [8 x i8] c"DEC A\00"
define i32 @disasm_dec_a(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
define i32 @disasm_dec_a(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
%4 = bitcast i8* %2 to i64*
store i64 18331195838514500, i64* %4
ret i32 1
}
/* Variables and functions */
double log10(double);
int /*<<< orphan*/ printf(char *, double, double);
int main() {
  double param, result;
  param = 1000.0;
  result = log10(param);
  printf("log10(%f) = %f\n", param, result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xec9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <log10@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef8(%rip),%rdi
movsd  0xee0(%rip),%xmm0
movsd  0xee0(%rip),%xmm1
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"log10(%f) = %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
store double 1.000000e+03, double* %2
%4 = load double, double* %2
%5 = call double @log10(double %4)
store double %5, double* %3
%6 = load double, double* %2
%7 = load double, double* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), double %6, double %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"log10(%f) = %f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), double 1.000000e+03, double 3.000000e+00)
ret i32 0
}
int execute_fsync() { return 0; }


x86 assembly (clang, -O0):
<execute_fsync>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_fsync>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_fsync() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_fsync() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_disable() {
  mbus_remote_register_write(
      0x6, 0x3B,
      ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
       (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (0 << 11) |
       (0 << 12) | (1 << 13) | (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) |
       (1 << 18) | (0 << 19) | (1 << 20)));
  delay(100);
}


x86 assembly (clang, -O0):
<pmu_adc_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0x17e7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_disable>:
push   %rax
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0x17e7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_disable() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 59, i32 1566719)
%2 = call i32 @delay(i32 100)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_disable() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 59, i32 1566719)
%2 = tail call i32 @delay(i32 100)
ret void
}
float pesoIdeal(float h, char sexo) {
  float PI;
  if (sexo == 'M') {
    PI = (72.7 * h) - 58;
  }
  if (sexo == 'F') {
    PI = (62.1 * h) - 44.7;
  }
  return PI;
}


x86 assembly (clang, -O0):
<pesoIdeal>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
movss  %xmm0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x4d,%eax
jne    1146 <pesoIdeal+0x46>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed3(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xecf(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jne    117d <pesoIdeal+0x7d>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeac(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea8(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pesoIdeal>:
cvtss2sd %xmm0,%xmm0
cmp    $0x46,%dil
je     111f <pesoIdeal+0x1f>
mulsd  0xeee(%rip),%xmm0
addsd  0xeee(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret
mulsd  0xee9(%rip),%xmm0
addsd  0xee9(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @pesoIdeal(float %0, i8 signext %1) {
%3 = alloca float
%4 = alloca i8
%5 = alloca float
store float %0, float* %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 77
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load float, float* %3
%11 = fpext float %10 to double
%12 = call double @llvm.fmuladd.f64(double 7.270000e+01, double %11, double -5.800000e+01)
%13 = fptrunc double %12 to float
store float %13, float* %5
br label %14
14: ; preds = %9, %2
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 70
br i1 %17, label %18, label %23
18: ; preds = %14
%19 = load float, float* %3
%20 = fpext float %19 to double
%21 = call double @llvm.fmuladd.f64(double 6.210000e+01, double %20, double -4.470000e+01)
%22 = fptrunc double %21 to float
store float %22, float* %5
br label %23
23: ; preds = %18, %14
%24 = load float, float* %5
ret float %24
}

LLVM IR (-O2):
define float @pesoIdeal(float %0, i8 signext %1) {
%3 = icmp eq i8 %1, 77
%4 = fpext float %0 to double
%5 = tail call double @llvm.fmuladd.f64(double %4, double 7.270000e+01, double -5.800000e+01)
%6 = fptrunc double %5 to float
%7 = select i1 %3, float %6, float undef
%8 = icmp eq i8 %1, 70
%9 = tail call double @llvm.fmuladd.f64(double %4, double 6.210000e+01, double -4.470000e+01)
%10 = fptrunc double %9 to float
%11 = select i1 %8, float %10, float %7
ret float %11
}
/* Variables and functions */
void *linked_mem_pool_malloc(void *, size_t);
void *virtual_machine_resource_pool_linked_malloc(void *pool_ptr, size_t size) {
  return linked_mem_pool_malloc(pool_ptr, size);
}


x86 assembly (clang, -O0):
<virtual_machine_resource_pool_linked_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <linked_mem_pool_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<virtual_machine_resource_pool_linked_malloc>:
jmp    1030 <linked_mem_pool_malloc@plt>

LLVM IR (-O0):
define i8* @virtual_machine_resource_pool_linked_malloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @linked_mem_pool_malloc(i8* %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @virtual_machine_resource_pool_linked_malloc(i8* %0, i64 %1) {
%3 = tail call i8* @linked_mem_pool_malloc(i8* %0, i64 %1)
ret i8* %3
}
int getline() {}


x86 assembly (clang, -O0):
<getline>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getline>:
ret

LLVM IR (-O0):
define i32 @getline() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @getline() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ stbi__mad2sizes_valid(int, int, int);
void *stbi__malloc(int);
void *stbi__malloc_mad2(int a, int b, int add) {
  if (!stbi__mad2sizes_valid(a, b, add))
    return NULL;
  return stbi__malloc(a * b + add);
}


x86 assembly (clang, -O0):
<stbi__malloc_mad2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <stbi__mad2sizes_valid@plt>
cmp    $0x0,%eax
jne    1155 <stbi__malloc_mad2+0x35>
movq   $0x0,-0x8(%rbp)
jmp    1168 <stbi__malloc_mad2+0x48>
mov    -0xc(%rbp),%edi
imul   -0x10(%rbp),%edi
add    -0x14(%rbp),%edi
call   1030 <stbi__malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi__malloc_mad2>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
call   1040 <stbi__mad2sizes_valid@plt>
test   %eax,%eax
je     1145 <stbi__malloc_mad2+0x25>
imul   %ebx,%ebp
add    %r14d,%ebp
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <stbi__malloc@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @stbi__malloc_mad2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = call i32 @stbi__mad2sizes_valid(i32 %8, i32 %9, i32 %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %3
store i8* null, i8** %4
br label %21
14: ; preds = %3
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = mul nsw i32 %15, %16
%18 = load i32, i32* %7
%19 = add nsw i32 %17, %18
%20 = call i8* @stbi__malloc(i32 %19)
store i8* %20, i8** %4
br label %21
21: ; preds = %14, %13
%22 = load i8*, i8** %4
ret i8* %22
}

LLVM IR (-O2):
define i8* @stbi__malloc_mad2(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @stbi__mad2sizes_valid(i32 %0, i32 %1, i32 %2)
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = mul nsw i32 %1, %0
%8 = add nsw i32 %7, %2
%9 = tail call i8* @stbi__malloc(i32 %8)
br label %10
10: ; preds = %3, %6
%11 = phi i8* [ %9, %6 ], [ null, %3 ]
ret i8* %11
}
/* Variables and functions */
int parse_recv_data(int, char *);
int serial_read(char *, int);
int serial_read_data(char *data, int data_len) {
  int len = serial_read(data, data_len);
  return parse_recv_data(len, data);
}


x86 assembly (clang, -O0):
<serial_read_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <serial_read@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   1030 <parse_recv_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_read_data>:
push   %rbx
mov    %rdi,%rbx
call   1040 <serial_read@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <parse_recv_data@plt>

LLVM IR (-O0):
define i32 @serial_read_data(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @serial_read(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i8*, i8** %3
%11 = call i32 @parse_recv_data(i32 %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @serial_read_data(i8* %0, i32 %1) {
%3 = tail call i32 @serial_read(i8* %0, i32 %1)
%4 = tail call i32 @parse_recv_data(i32 %3, i8* %0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *);
char *strdup(char const *);
char *strdup2(const char *str) {
  char *r;
  r = strdup(str);
  if (r == NULL)
    err(1, "strdup");
  return r;
}


x86 assembly (clang, -O0):
<strdup2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1155 <strdup2+0x35>
mov    $0x1,%edi
lea    0xeb0(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup2>:
push   %rbx
call   1040 <strdup@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113f <strdup2+0x1f>
lea    0xecb(%rip),%rsi
mov    $0x1,%edi
call   1030 <err@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"strdup\00"
define i8* @strdup2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @err(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"strdup\00"
define noalias i8* @strdup2(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void ast_cli(int fd, const char *fmt, ...) {}


x86 assembly (clang, -O0):
<ast_cli>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ast_cli>:
ret

LLVM IR (-O0):
define void @ast_cli(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @ast_cli(i32 %0, i8* nocapture %1, ...) {
ret void
}
/* Variables and functions */
void *dlrealloc(void *, size_t);
int /*<<< orphan*/ mem_error();
void *mem_resize(void *x, size_t s) {
  void *y = dlrealloc(x, s);
  if (!y)
    mem_error();
  return y;
}


x86 assembly (clang, -O0):
<mem_resize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dlrealloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1153 <mem_resize+0x33>
mov    $0x0,%al
call   1040 <mem_error@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_resize>:
push   %rbx
call   1030 <dlrealloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <mem_resize+0x15>
xor    %eax,%eax
call   1040 <mem_error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @mem_resize(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @dlrealloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 (...) @mem_error()
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define i8* @mem_resize(i8* %0, i64 %1) {
%3 = tail call i8* @dlrealloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @mem_error()
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ MIPS_SET_BIT(int, int);
void xburst_cgm_gate_gpu() { MIPS_SET_BIT((0xB0000000 + 0x28), 4); }


x86 assembly (clang, -O0):
<xburst_cgm_gate_gpu>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0000028,%edi
mov    $0x4,%esi
call   1030 <MIPS_SET_BIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xburst_cgm_gate_gpu>:
mov    $0xb0000028,%edi
mov    $0x4,%esi
jmp    1030 <MIPS_SET_BIT@plt>

LLVM IR (-O0):
define void @xburst_cgm_gate_gpu() {
%1 = call i32 @MIPS_SET_BIT(i32 -1342177240, i32 4)
ret void
}

LLVM IR (-O2):
define void @xburst_cgm_gate_gpu() {
%1 = tail call i32 @MIPS_SET_BIT(i32 -1342177240, i32 4)
ret void
}
void pcp_write_data(struct record_header *record_hdr, unsigned int flags) {}


x86 assembly (clang, -O0):
<pcp_write_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_write_data>:
ret

LLVM IR (-O0):
%struct.record_header = type opaque
define void @pcp_write_data(%struct.record_header* %0, i32 %1) {
%3 = alloca %struct.record_header*
%4 = alloca i32
store %struct.record_header* %0, %struct.record_header** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.record_header = type opaque
define void @pcp_write_data(%struct.record_header* nocapture %0, i32 %1) {
ret void
}
void ECDSA_do_sign_ex(void) {}


x86 assembly (clang, -O0):
<ECDSA_do_sign_ex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECDSA_do_sign_ex>:
ret

LLVM IR (-O0):
define void @ECDSA_do_sign_ex() {
ret void
}

LLVM IR (-O2):
define void @ECDSA_do_sign_ex() {
ret void
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};

/* Variables and functions */
int resolve_event_extra(char const *, struct perf_event_attr *,
                        int /*<<< orphan*/ *);
int resolve_event(const char *name, struct perf_event_attr *attr) {
  return resolve_event_extra(name, attr, NULL);
}


x86 assembly (clang, -O0):
<resolve_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <resolve_event_extra@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resolve_event>:
xor    %edx,%edx
jmp    1030 <resolve_event_extra@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
define i32 @resolve_event(i8* %0, %struct.perf_event_attr* %1) {
%3 = alloca i8*
%4 = alloca %struct.perf_event_attr*
store i8* %0, i8** %3
store %struct.perf_event_attr* %1, %struct.perf_event_attr** %4
%5 = load i8*, i8** %3
%6 = load %struct.perf_event_attr*, %struct.perf_event_attr** %4
%7 = call i32 @resolve_event_extra(i8* %5, %struct.perf_event_attr* %6, i32* null)
ret i32 %7
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
define i32 @resolve_event(i8* %0, %struct.perf_event_attr* %1) {
%3 = tail call i32 @resolve_event_extra(i8* %0, %struct.perf_event_attr* %1, i32* null)
ret i32 %3
}
/* Variables and functions */
int fputc(int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int putchar(int ic) { return fputc(ic, stdout); }


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @stdout
%5 = call i32 @fputc(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @putchar(i32 %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fputc(i32 %0, i32 %2)
ret i32 %3
}
unsigned int convert_le_u32(const unsigned char *buf) {
  return buf[0] | (buf[1] << 8) | (buf[2] << 16) | ((unsigned int)buf[3] << 24);
}


x86 assembly (clang, -O0):
<convert_le_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_le_u32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @convert_le_u32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @convert_le_u32(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ getpid();
int main() {
  getpid();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getpid()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @getpid()
ret i32 0
}
int cpu_num_processors(void) { return 1; }


x86 assembly (clang, -O0):
<cpu_num_processors>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_num_processors>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cpu_num_processors() {
ret i32 1
}

LLVM IR (-O2):
define i32 @cpu_num_processors() {
ret i32 1
}
void gtk_text_iter_backward_visible_cursor_positions() {}


x86 assembly (clang, -O0):
<gtk_text_iter_backward_visible_cursor_positions>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_backward_visible_cursor_positions>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_backward_visible_cursor_positions() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_backward_visible_cursor_positions() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_rwlock_unlock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_rwlock_wrlock(int /*<<< orphan*/ *);
void sync_set(pthread_rwlock_t *lock, int *var, int val) {
  pthread_rwlock_wrlock(lock);
  { *var = val; }
  pthread_rwlock_unlock(lock);
}


x86 assembly (clang, -O0):
<sync_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_rwlock_wrlock@plt>
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
call   1040 <pthread_rwlock_unlock@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_set>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
call   1030 <pthread_rwlock_wrlock@plt>
mov    %r14d,(%rbx)
mov    %rbp,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <pthread_rwlock_unlock@plt>

LLVM IR (-O0):
define void @sync_set(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = call i32 @pthread_rwlock_wrlock(i32* %7)
%9 = load i32, i32* %6
%10 = load i32*, i32** %5
store i32 %9, i32* %10
%11 = load i32*, i32** %4
%12 = call i32 @pthread_rwlock_unlock(i32* %11)
ret void
}

LLVM IR (-O2):
define void @sync_set(i32* %0, i32* nocapture writeonly %1, i32 %2) {
%4 = tail call i32 @pthread_rwlock_wrlock(i32* %0)
store i32 %2, i32* %1
%5 = tail call i32 @pthread_rwlock_unlock(i32* %0)
ret void
}
int mlx5_sf_driver_register(void) { return 0; }


x86 assembly (clang, -O0):
<mlx5_sf_driver_register>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx5_sf_driver_register>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mlx5_sf_driver_register() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mlx5_sf_driver_register() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ fc_host_get_statistic(char *, char const *);
uint64_t fc_stat_loss_of_signal_count(const char *host) {
  return fc_host_get_statistic("loss_of_signal_count", host);
}


x86 assembly (clang, -O0):
<fc_stat_loss_of_signal_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <fc_host_get_statistic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_stat_loss_of_signal_count>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <fc_host_get_statistic@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"loss_of_signal_count\00"
define i32 @fc_stat_loss_of_signal_count(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fc_host_get_statistic(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [21 x i8] c"loss_of_signal_count\00"
define i32 @fc_stat_loss_of_signal_count(i8* %0) {
%2 = tail call i32 @fc_host_get_statistic(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
int test_imm_F5int64_lowword_mem(long long *val) {
  return ((*val) & (0xF5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F5int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xf5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F5int64_lowword_mem>:
testb  $0xf5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F5int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 245
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F5int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 245
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ft_arrayset2d(char **, int, int);
void ft_arrayset3d(char **array[], int x, int y, int z) {
  int i;
  i = -1;
  while (++i < z)
    ft_arrayset2d(array[i], x, y);
}


x86 assembly (clang, -O0):
<ft_arrayset3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
movl   $0xffffffff,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
cmp    -0x14(%rbp),%eax
jge    115a <ft_arrayset3d+0x4a>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <ft_arrayset2d@plt>
jmp    112c <ft_arrayset3d+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_arrayset3d>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
test   %ecx,%ecx
jle    1148 <ft_arrayset3d+0x38>
mov    %edx,%r14d
mov    %esi,%r15d
mov    %rdi,%r12
mov    %ecx,%ebp
xor    %ebx,%ebx
nopl   0x0(%rax)
mov    (%r12,%rbx,8),%rdi
mov    %r15d,%esi
mov    %r14d,%edx
call   1030 <ft_arrayset2d@plt>
add    $0x1,%rbx
cmp    %rbx,%rbp
jne    1130 <ft_arrayset3d+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @ft_arrayset3d(i8*** %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8***
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8*** %0, i8**** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 -1, i32* %9
br label %10
10: ; preds = %15, %4
%11 = load i32, i32* %9
%12 = add nsw i32 %11, 1
store i32 %12, i32* %9
%13 = load i32, i32* %8
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %24
15: ; preds = %10
%16 = load i8***, i8**** %5
%17 = load i32, i32* %9
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8**, i8*** %16, i64 %18
%20 = load i8**, i8*** %19
%21 = load i32, i32* %6
%22 = load i32, i32* %7
%23 = call i32 @ft_arrayset2d(i8** %20, i32 %21, i32 %22)
br label %10
24: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @ft_arrayset3d(i8*** nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp sgt i32 %3, 0
br i1 %5, label %6, label %15
6: ; preds = %4
%7 = zext i32 %3 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %13, %8 ]
%10 = getelementptr inbounds i8**, i8*** %0, i64 %9
%11 = load i8**, i8*** %10
%12 = tail call i32 @ft_arrayset2d(i8** %11, i32 %1, i32 %2)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %7
br i1 %14, label %15, label %8
15: ; preds = %8, %4
ret void
}
double cfracA(n, aborts)
double n;
unsigned aborts;
{ return 1.0 / sqrt(6.0 + 2.0 / ((double)aborts + 1.0)); }


x86 assembly (clang, -O0):
<cfracA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cvtsi2sd %rax,%xmm0
movsd  0xed0(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xed4(%rip),%xmm1
divsd  %xmm0,%xmm1
movsd  0xec0(%rip),%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  0xea4(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfracA>:
push   %rax
mov    %edi,%eax
cvtsi2sd %rax,%xmm1
addsd  0xee0(%rip),%xmm1
movsd  0xee0(%rip),%xmm0
divsd  %xmm1,%xmm0
addsd  0xedc(%rip),%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1144 <cfracA+0x34>
sqrtsd %xmm0,%xmm0
jmp    1149 <cfracA+0x39>
call   1030 <sqrt@plt>
movsd  0xeaf(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @cfracA(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = uitofp i32 %5 to double
%7 = fadd double %6, 1.000000e+00
%8 = fdiv double 2.000000e+00, %7
%9 = fadd double 6.000000e+00, %8
%10 = call double @sqrt(double %9)
%11 = fdiv double 1.000000e+00, %10
ret double %11
}

LLVM IR (-O2):
define double @cfracA(double %0, i32 %1) {
%3 = uitofp i32 %1 to double
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double 2.000000e+00, %4
%6 = fadd double %5, 6.000000e+00
%7 = tail call double @sqrt(double %6)
%8 = fdiv double 1.000000e+00, %7
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ check_timeout();
void signal_alarm(int unused __attribute__((unused))) { check_timeout(); }


x86 assembly (clang, -O0):
<signal_alarm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_timeout@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_alarm>:
xor    %eax,%eax
jmp    1030 <check_timeout@plt>

LLVM IR (-O0):
define void @signal_alarm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @check_timeout()
ret void
}

LLVM IR (-O2):
define void @signal_alarm(i32 %0) {
%2 = tail call i32 (...) @check_timeout()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ is_tsc_available();
int /*<<< orphan*/ prepare_system_for_benchmarking();
int /*<<< orphan*/ run_benchmark();
int /*<<< orphan*/ stderr;
int main() {
  if (!is_tsc_available()) {
    fprintf(stderr, "# Error: TSC is not supported by this processor\n");
    exit(1);
  }
  prepare_system_for_benchmarking();
  run_benchmark();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <is_tsc_available@plt>
cmp    $0x0,%eax
jne    118e <main+0x3e>
mov    0x2e6a(%rip),%rax
mov    (%rax),%edi
lea    0xe81(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1070 <exit@plt>
mov    $0x0,%al
call   1050 <prepare_system_for_benchmarking@plt>
mov    $0x0,%al
call   1040 <run_benchmark@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <is_tsc_available@plt>
test   %eax,%eax
je     116e <main+0x1e>
xor    %eax,%eax
call   1050 <prepare_system_for_benchmarking@plt>
xor    %eax,%eax
call   1040 <run_benchmark@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    0x2e6b(%rip),%rax
mov    (%rax),%edi
lea    0xe82(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [49 x i8] c"# Error: TSC is not supported by this processor\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @is_tsc_available()
%3 = icmp ne i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %0
%9 = call i32 (...) @prepare_system_for_benchmarking()
%10 = call i32 (...) @run_benchmark()
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [49 x i8] c"# Error: TSC is not supported by this processor\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @is_tsc_available()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %0
%8 = tail call i32 (...) @prepare_system_for_benchmarking()
%9 = tail call i32 (...) @run_benchmark()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ MCP_HAL_LOG_GetThreadId();
int /*<<< orphan*/ MCP_HAL_LOG_SetThreadIdName(int /*<<< orphan*/,
                                               char const *);
void MCP_HAL_LOG_SetThreadName(const char *name) {
  MCP_HAL_LOG_SetThreadIdName(MCP_HAL_LOG_GetThreadId(), name);
}


x86 assembly (clang, -O0):
<MCP_HAL_LOG_SetThreadName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <MCP_HAL_LOG_GetThreadId@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1040 <MCP_HAL_LOG_SetThreadIdName@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCP_HAL_LOG_SetThreadName>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <MCP_HAL_LOG_GetThreadId@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <MCP_HAL_LOG_SetThreadIdName@plt>

LLVM IR (-O0):
define void @MCP_HAL_LOG_SetThreadName(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @MCP_HAL_LOG_GetThreadId()
%4 = load i8*, i8** %2
%5 = call i32 @MCP_HAL_LOG_SetThreadIdName(i32 %3, i8* %4)
ret void
}

LLVM IR (-O2):
define void @MCP_HAL_LOG_SetThreadName(i8* %0) {
%2 = tail call i32 (...) @MCP_HAL_LOG_GetThreadId()
%3 = tail call i32 @MCP_HAL_LOG_SetThreadIdName(i32 %2, i8* %0)
ret void
}
void ad7887_ring_cleanup(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<ad7887_ring_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ad7887_ring_cleanup>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @ad7887_ring_cleanup(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @ad7887_ring_cleanup(%struct.iio_dev* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, unsigned int);
void f1() {
  int size = 10;
  char src[10];
  memset(src, 0, (unsigned)size);
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
lea    -0xe(%rbp),%rdi
mov    -0x4(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
sub    $0x18,%rsp
lea    0xe(%rsp),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <memset@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @f1() {
%1 = alloca i32
%2 = alloca [10 x i8]
store i32 10, i32* %1
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* %1
%5 = call i32 @memset(i8* %3, i32 0, i32 %4)
ret void
}

LLVM IR (-O2):
define void @f1() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = call i32 @memset(i8* %2, i32 0, i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ok();
int /*<<< orphan*/ printf(char *, int);
void msg_server_created() {
  ok();
  printf("Server created on port %d\n", 414);
}


x86 assembly (clang, -O0):
<msg_server_created>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ok@plt>
lea    0xece(%rip),%rdi
mov    $0x19e,%esi
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_server_created>:
push   %rax
xor    %eax,%eax
call   1030 <ok@plt>
lea    0xed1(%rip),%rdi
mov    $0x19e,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Server created on port %d\0A\00"
define void @msg_server_created() {
%1 = call i32 (...) @ok()
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 414)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"Server created on port %d\0A\00"
define void @msg_server_created() {
%1 = tail call i32 (...) @ok()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 414)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
int /*<<< orphan*/ _library_ident(char *);
int /*<<< orphan*/ _library_task(char *);
extern void _start(void) {
  _library_ident("MPT Core Library");
  _library_task("list/tree manipulation and processing");
  _library_task("generic type infrastructure");
  _library_task("simple text parser");
  _exit(0);
}


x86 assembly (clang, -O0):
<_start>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1050 <_library_ident@plt>
lea    0xeca(%rip),%rdi
call   1040 <_library_task@plt>
lea    0xee4(%rip),%rdi
call   1040 <_library_task@plt>
lea    0xef4(%rip),%rdi
call   1040 <_library_task@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<_start>:
push   %rax
lea    0xec8(%rip),%rdi
call   1050 <_library_ident@plt>
lea    0xecd(%rip),%rdi
call   1040 <_library_task@plt>
lea    0xee7(%rip),%rdi
call   1040 <_library_task@plt>
lea    0xef7(%rip),%rdi
call   1040 <_library_task@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"MPT Core Library\00"
@.str.1 = [38 x i8] c"list/tree manipulation and processing\00"
@.str.2 = [28 x i8] c"generic type infrastructure\00"
@.str.3 = [19 x i8] c"simple text parser\00"
define void @_start() {
%1 = call i32 @_library_ident(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @_library_task(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @_library_task(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @_library_task(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [17 x i8] c"MPT Core Library\00"
@.str.1 = [38 x i8] c"list/tree manipulation and processing\00"
@.str.2 = [28 x i8] c"generic type infrastructure\00"
@.str.3 = [19 x i8] c"simple text parser\00"
define void @_start() {
%1 = tail call i32 @_library_ident(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @_library_task(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @_library_task(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @_library_task(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @_exit(i32 0)
unreachable
}
void SSMR3PutGCPhys(void) {}


x86 assembly (clang, -O0):
<SSMR3PutGCPhys>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSMR3PutGCPhys>:
ret

LLVM IR (-O0):
define void @SSMR3PutGCPhys() {
ret void
}

LLVM IR (-O2):
define void @SSMR3PutGCPhys() {
ret void
}