xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ test(int **);
int main() {
  int arr[] = {30, 450, 14, 5};
  test(&arr);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
call   1030 <test@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <test@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [4 x i32] [i32 30, i32 450, i32 14, i32 5]
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i32]
store i32 0, i32* %1
%3 = bitcast [4 x i32]* %2 to i8*
%4 = bitcast [4 x i32]* %2 to i32**
%5 = call i32 @test(i32** %4)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [4 x i32] [i32 30, i32 450, i32 14, i32 5]
define i32 @main() {
%1 = alloca [4 x i32]
%2 = bitcast [4 x i32]* %1 to i8*
%3 = bitcast [4 x i32]* %1 to i32**
%4 = call i32 @test(i32** %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ foo_v();
int /*<<< orphan*/ foo_w();
int main(void) {
#pragma acc parallel
  foo_v();
#pragma acc parallel
  foo_w();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo_v@plt>
mov    $0x0,%al
call   1040 <foo_w@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo_v@plt>
xor    %eax,%eax
call   1040 <foo_w@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo_v()
%3 = call i32 (...) @foo_w()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo_v()
%2 = tail call i32 (...) @foo_w()
ret i32 0
}
/* Type definitions */
struct in_addr {
  int dummy;
};

/* Variables and functions */
scalar_t__ inet_aton(char *, struct in_addr *);
int check_inet_addr(char *str) {
  struct in_addr inp;
  if (inet_aton(str, &inp) == 0) {
    return -1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<check_inet_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <inet_aton@plt>
cmp    $0x0,%rax
jne    113f <check_inet_addr+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1146 <check_inet_addr+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_inet_addr>:
push   %rax
mov    %rsp,%rsi
call   1030 <inet_aton@plt>
cmp    $0x1,%rax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i32 @check_inet_addr(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.in_addr
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @inet_aton(i8* %5, %struct.in_addr* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
define i32 @check_inet_addr(i8* %0) {
%2 = alloca %struct.in_addr
%3 = bitcast %struct.in_addr* %2 to i8*
%4 = call i64 @inet_aton(i8* %0, %struct.in_addr* %2)
%5 = icmp eq i64 %4, 0
%6 = sext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
scalar_t__ rand();
unsigned int playlist_random(void) {
  unsigned int ret = 0;
  ret = (unsigned int)rand();
  return (ret);
}


x86 assembly (clang, -O0):
<playlist_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<playlist_random>:
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define i32 @playlist_random() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @rand()
%3 = trunc i64 %2 to i32
store i32 %3, i32* %1
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @playlist_random() {
%1 = tail call i64 (...) @rand()
%2 = trunc i64 %1 to i32
ret i32 %2
}
int format_dir_for_import(char *name_newdir) {
  char *ptr;
  for (ptr = name_newdir; *ptr != 0; ptr++)
    ;
  if (*(ptr - 1) != '/') {
    *ptr = '/';
    *(ptr + 1) = 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<format_dir_for_import>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1136 <format_dir_for_import+0x36>
jmp    1125 <format_dir_for_import+0x25>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <format_dir_for_import+0x10>
mov    -0x10(%rbp),%rax
movsbl -0x1(%rax),%eax
cmp    $0x2f,%eax
je     1156 <format_dir_for_import+0x56>
mov    -0x10(%rbp),%rax
movb   $0x2f,(%rax)
mov    -0x10(%rbp),%rax
movb   $0x0,0x1(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<format_dir_for_import>:
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1100 <format_dir_for_import>
cmpb   $0x2f,-0x2(%rdi)
je     1115 <format_dir_for_import+0x15>
movw   $0x2f,-0x1(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @format_dir_for_import(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %5
br label %11
11: ; preds = %10
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
br label %5
14: ; preds = %5
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 -1
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 47
br i1 %19, label %20, label %24
20: ; preds = %14
%21 = load i8*, i8** %3
store i8 47, i8* %21
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 1
store i8 0, i8* %23
br label %24
24: ; preds = %20, %14
ret i32 0
}

LLVM IR (-O2):
define i32 @format_dir_for_import(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = getelementptr inbounds i8, i8* %3, i64 -1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 47
br i1 %10, label %12, label %11
11: ; preds = %7
store i8 47, i8* %3
store i8 0, i8* %6
br label %12
12: ; preds = %11, %7
ret i32 0
}
char *return_null_charp() { return 0; }


x86 assembly (clang, -O0):
<return_null_charp>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_null_charp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @return_null_charp() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @return_null_charp() {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ minHeapify(int *, int, int);
void buildMinHeap(int A[], int maxIndex) {
  int index = maxIndex;
  while (index >= 0) {
    minHeapify(A, maxIndex, index);
    index--;
  }
}


x86 assembly (clang, -O0):
<buildMinHeap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     114c <buildMinHeap+0x3c>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <minHeapify@plt>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1125 <buildMinHeap+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buildMinHeap>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
js     1131 <buildMinHeap+0x21>
mov    %esi,%ebx
mov    %rdi,%r14
mov    %esi,%ebp
nop
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
call   1030 <minHeapify@plt>
add    $0xffffffff,%ebp
jb     1120 <buildMinHeap+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @buildMinHeap(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
store i32 %6, i32* %5
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %5
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = call i32 @minHeapify(i32* %11, i32 %12, i32 %13)
%15 = load i32, i32* %5
%16 = add nsw i32 %15, -1
store i32 %16, i32* %5
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @buildMinHeap(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = tail call i32 @minHeapify(i32* %0, i32 %1, i32 %5)
%7 = add nsw i32 %5, -1
%8 = icmp eq i32 %5, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UpnpResponseGeneric(void const *, char *, char *, char *);
void UpnpResponse_MediaRenderer_AVTransport_Next(const void *UPnPToken) {
  UpnpResponseGeneric(UPnPToken, "urn:schemas-upnp-org:service:AVTransport:1",
                      "Next", "");
}


x86 assembly (clang, -O0):
<UpnpResponse_MediaRenderer_AVTransport_Next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    0xefd(%rip),%rdx
lea    0xef5(%rip),%rcx
call   1030 <UpnpResponseGeneric@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpnpResponse_MediaRenderer_AVTransport_Next>:
lea    0xee9(%rip),%rsi
lea    0xf0d(%rip),%rdx
lea    0xf05(%rip),%rcx
jmp    1030 <UpnpResponseGeneric@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"urn:schemas-upnp-org:service:AVTransport:1\00"
@.str.1 = [5 x i8] c"Next\00"
@.str.2 = [1 x i8] zeroinitializer
define void @UpnpResponse_MediaRenderer_AVTransport_Next(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @UpnpResponseGeneric(i8* %3, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"urn:schemas-upnp-org:service:AVTransport:1\00"
@.str.1 = [5 x i8] c"Next\00"
@.str.2 = [1 x i8] zeroinitializer
define void @UpnpResponse_MediaRenderer_AVTransport_Next(i8* %0) {
%2 = tail call i32 @UpnpResponseGeneric(i8* %0, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool nrf52_errata_163(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_163>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_163>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_163() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_163() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
int /*<<< orphan*/ update(int, int *, int *);
void functions(void) {
  int n = 10, m = -3, p = 123;
  printf("n = %d, m = %d, p = %d.\n", n, m, p);
  update(n, &m, &p);
  printf("n = %d, m = %d, p = %d.\n", n, m, p);
}


x86 assembly (clang, -O0):
<functions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
movl   $0xfffffffd,-0x8(%rbp)
movl   $0x7b,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <update@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<functions>:
push   %rbx
sub    $0x10,%rsp
movl   $0xfffffffd,0xc(%rsp)
ff
movl   $0x7b,0x8(%rsp)
lea    0xec4(%rip),%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0xfffffffd,%edx
mov    $0x7b,%ecx
call   1040 <printf@plt>
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
mov    $0xa,%edi
call   1030 <update@plt>
mov    0xc(%rsp),%edx
mov    0x8(%rsp),%ecx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"n = %d, m = %d, p = %d.\0A\00"
define void @functions() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 10, i32* %1
store i32 -3, i32* %2
store i32 123, i32* %3
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5, i32 %6)
%8 = load i32, i32* %1
%9 = call i32 @update(i32 %8, i32* %2, i32* %3)
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"n = %d, m = %d, p = %d.\0A\00"
define void @functions() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 -3, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 123, i32* %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 10, i32 -3, i32 123)
%6 = call i32 @update(i32 10, i32* %1, i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 10, i32 %7, i32 %8)
ret void
}
char *v2_sfor2ptr(char *for_string) { return for_string; }


x86 assembly (clang, -O0):
<v2_sfor2ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<v2_sfor2ptr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @v2_sfor2ptr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @v2_sfor2ptr(i8* readnone returned %0) {
ret i8* %0
}
int ade7854_configure_ring(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<ade7854_configure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7854_configure_ring>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @ade7854_configure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @ade7854_configure_ring(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int pidexists(int);
int /*<<< orphan*/ printf(char *, int);
int main() { printf("pidexists(60000): %d\n", pidexists(60000)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xea60,%edi
call   1040 <pidexists@plt>
mov    %eax,%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xea60,%edi
call   1040 <pidexists@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"pidexists(60000): %d\0A\00"
define i32 @main() {
%1 = call i32 @pidexists(i32 60000)
%2 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"pidexists(60000): %d\0A\00"
define i32 @main() {
%1 = tail call i32 @pidexists(i32 60000)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ g(int *);
void f(int *ref) {
  g(ref);
  ref[1] = 2 * ref[1];
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <g@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
shl    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbx
mov    %rdi,%rbx
call   1030 <g@plt>
shll   0x4(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @f(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @g(i32* %3)
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %6
%8 = mul nsw i32 2, %7
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 1
store i32 %8, i32* %10
ret void
}

LLVM IR (-O2):
define void @f(i32* %0) {
%2 = tail call i32 @g(i32* %0)
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = shl nsw i32 %4, 1
store i32 %5, i32* %3
ret void
}
/* Type definitions */
typedef void *uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint8_t *quicly_encode16(uint8_t *p, uint16_t v) {
  *p++ = (uint8_t)(v >> 8);
  *p++ = (uint8_t)v;
  return p;
}


x86 assembly (clang, -O0):
<quicly_encode16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x8,%rdx
mov    %rdx,-0x8(%rbp)
mov    %rcx,(%rax)
movslq -0xc(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x8,%rdx
mov    %rdx,-0x8(%rbp)
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicly_encode16>:
movslq %esi,%rax
sar    $0x8,%esi
movslq %esi,%rcx
mov    %rcx,(%rdi)
mov    %rax,0x8(%rdi)
lea    0x10(%rdi),%rax
ret

LLVM IR (-O0):
define i8** @quicly_encode16(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
%9 = load i8**, i8*** %3
%10 = getelementptr inbounds i8*, i8** %9, i32 1
store i8** %10, i8*** %3
store i8* %8, i8** %9
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
%14 = load i8**, i8*** %3
%15 = getelementptr inbounds i8*, i8** %14, i32 1
store i8** %15, i8*** %3
store i8* %13, i8** %14
%16 = load i8**, i8*** %3
ret i8** %16
}

LLVM IR (-O2):
define i8** @quicly_encode16(i8** writeonly %0, i32 %1) {
%3 = ashr i32 %1, 8
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
%6 = getelementptr inbounds i8*, i8** %0, i64 1
store i8* %5, i8** %0
%7 = sext i32 %1 to i64
%8 = inttoptr i64 %7 to i8*
%9 = getelementptr inbounds i8*, i8** %0, i64 2
store i8* %8, i8** %6
ret i8** %9
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "please indicate what kind of mapping mapping table you want "
                  "to generate:\n");
  fprintf(stderr, "\t-uf : generate *.uf (from unicode) table, or\n");
  fprintf(stderr, "\t-ut : generate *.ut (to unicode) table\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xf11(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xf2b(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf1b(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf3c(%rip),%rsi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [74 x i8] c"please indicate what kind of mapping mapping table you want to generate:\0A\00"
@.str.1 = [47 x i8] c"\09-uf : generate *.uf (from unicode) table, or\0A\00"
@.str.2 = [41 x i8] c"\09-ut : generate *.ut (to unicode) table\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([74 x i8], [74 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [74 x i8] c"please indicate what kind of mapping mapping table you want to generate:\0A\00"
@.str.1 = [47 x i8] c"\09-uf : generate *.uf (from unicode) table, or\0A\00"
@.str.2 = [41 x i8] c"\09-ut : generate *.ut (to unicode) table\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([74 x i8], [74 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int aim_main(int argc, char *argv[]) {
  (void)argc;
  (void)argv;
  return 0;
}


x86 assembly (clang, -O0):
<aim_main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aim_main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @aim_main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @aim_main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
char *platform_id() { return "sparc"; }


x86 assembly (clang, -O0):
<platform_id>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_id>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"sparc\00"
define i8* @platform_id() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"sparc\00"
define i8* @platform_id() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct queue_base_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ init_base_queue(struct queue_base_struct *);
void init_ordered_queue(struct queue_base_struct *thequeue,
                        void (*putTheRoot)(struct queue_base_struct *)) {
  init_base_queue(thequeue);
  putTheRoot(thequeue);
}


x86 assembly (clang, -O0):
<init_ordered_queue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <init_base_queue@plt>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_ordered_queue>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <init_base_queue@plt>
mov    %rbx,%rdi
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    *%rax

LLVM IR (-O0):
%struct.queue_base_struct = type { i32 }
define void @init_ordered_queue(%struct.queue_base_struct* %0, void (%struct.queue_base_struct*)* %1) {
%3 = alloca %struct.queue_base_struct*
%4 = alloca void (%struct.queue_base_struct*)*
store %struct.queue_base_struct* %0, %struct.queue_base_struct** %3
store void (%struct.queue_base_struct*)* %1, void (%struct.queue_base_struct*)** %4
%5 = load %struct.queue_base_struct*, %struct.queue_base_struct** %3
%6 = call i32 @init_base_queue(%struct.queue_base_struct* %5)
%7 = load void (%struct.queue_base_struct*)*, void (%struct.queue_base_struct*)** %4
%8 = load %struct.queue_base_struct*, %struct.queue_base_struct** %3
ret void
}

LLVM IR (-O2):
%struct.queue_base_struct = type { i32 }
define void @init_ordered_queue(%struct.queue_base_struct* %0, void (%struct.queue_base_struct*)* nocapture %1) {
%3 = tail call i32 @init_base_queue(%struct.queue_base_struct* %0)
tail call void %1(%struct.queue_base_struct* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fb_hDateDecodeSerial(double, int /*<<< orphan*/, int *,
                                        int /*<<< orphan*/);
int fb_Month(double serial) {
  int month;
  fb_hDateDecodeSerial(serial, 0, &month, 0);
  return month;
}


x86 assembly (clang, -O0):
<fb_Month>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %edx,%edx
lea    -0xc(%rbp),%rsi
mov    %edx,%edi
call   1030 <fb_hDateDecodeSerial@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_Month>:
push   %rax
lea    0x4(%rsp),%rsi
xor    %edi,%edi
xor    %edx,%edx
call   1030 <fb_hDateDecodeSerial@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fb_Month(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = call i32 @fb_hDateDecodeSerial(double %4, i32 0, i32* %3, i32 0)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @fb_Month(double %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fb_hDateDecodeSerial(double %0, i32 0, i32* %2, i32 0)
%5 = load i32, i32* %2
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ posix_spawnattr_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int posix_spawnattr_setsigdefault(posix_spawnattr_t *attr,
                                  const sigset_t *sigdefault) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<posix_spawnattr_setsigdefault>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawnattr_setsigdefault>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_setsigdefault(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_setsigdefault(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
void SSMR3PutS32(void) {}


x86 assembly (clang, -O0):
<SSMR3PutS32>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSMR3PutS32>:
ret

LLVM IR (-O0):
define void @SSMR3PutS32() {
ret void
}

LLVM IR (-O2):
define void @SSMR3PutS32() {
ret void
}
/* Variables and functions */
float __ocml_expm1_f32(float);
float expm1f(float x) { return __ocml_expm1_f32(x); }


x86 assembly (clang, -O0):
<expm1f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__ocml_expm1_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expm1f>:
jmp    1030 <__ocml_expm1_f32@plt>

LLVM IR (-O0):
define float @expm1f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__ocml_expm1_f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @expm1f(float %0) {
%2 = tail call float @__ocml_expm1_f32(float %0)
ret float %2
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
void print_uint8(FILE *fp, uint8_t v) { fprintf(fp, "%c", v); }


x86 assembly (clang, -O0):
<print_uint8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_uint8>:
mov    %rdi,%rax
mov    %esi,%edi
mov    %rax,%rsi
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @print_uint8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
define void @print_uint8(i32* nocapture %0, i32 %1) {
%3 = tail call i32 @fputc(i32 %1, i32* %0)
ret void
}
int LED_device_init(void) { return 1; }


x86 assembly (clang, -O0):
<LED_device_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LED_device_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @LED_device_init() {
ret i32 1
}

LLVM IR (-O2):
define i32 @LED_device_init() {
ret i32 1
}
void CG_DrawSpectator(void) {}


x86 assembly (clang, -O0):
<CG_DrawSpectator>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_DrawSpectator>:
ret

LLVM IR (-O0):
define void @CG_DrawSpectator() {
ret void
}

LLVM IR (-O2):
define void @CG_DrawSpectator() {
ret void
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ compare(int /*<<< orphan*/, char *);
int /*<<< orphan*/ failure(char *, char *);
int /*<<< orphan*/ list_front(struct list *);
void test_head_data(struct list *list, char *data) {
  if (!compare(list_front(list), data))
    failure("head should have been '%s'", data);
}


x86 assembly (clang, -O0):
<test_head_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <list_front@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1050 <compare@plt>
cmp    $0x0,%eax
jne    116d <test_head_data+0x3d>
mov    -0x10(%rbp),%rsi
lea    0xe98(%rip),%rdi
call   1040 <failure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_head_data>:
push   %rbx
mov    %rsi,%rbx
call   1030 <list_front@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1050 <compare@plt>
test   %eax,%eax
je     1149 <test_head_data+0x19>
pop    %rbx
ret
lea    0xeb0(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <failure@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
@.str = [27 x i8] c"head should have been '%s'\00"
define void @test_head_data(%struct.list* %0, i8* %1) {
%3 = alloca %struct.list*
%4 = alloca i8*
store %struct.list* %0, %struct.list** %3
store i8* %1, i8** %4
%5 = load %struct.list*, %struct.list** %3
%6 = call i32 @list_front(%struct.list* %5)
%7 = load i8*, i8** %4
%8 = call i32 @compare(i32 %6, i8* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i32 @failure(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
@.str = [27 x i8] c"head should have been '%s'\00"
define void @test_head_data(%struct.list* %0, i8* %1) {
%3 = tail call i32 @list_front(%struct.list* %0)
%4 = tail call i32 @compare(i32 %3, i8* %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @failure(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %8
8: ; preds = %6, %2
ret void
}
void i2s_ASN1_OCTET_STRING(void) {}


x86 assembly (clang, -O0):
<i2s_ASN1_OCTET_STRING>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2s_ASN1_OCTET_STRING>:
ret

LLVM IR (-O0):
define void @i2s_ASN1_OCTET_STRING() {
ret void
}

LLVM IR (-O2):
define void @i2s_ASN1_OCTET_STRING() {
ret void
}
void cbcp_open(unit) int unit;
{ ; }


x86 assembly (clang, -O0):
<cbcp_open>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbcp_open>:
ret

LLVM IR (-O0):
define void @cbcp_open(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @cbcp_open(i32 %0) {
ret void
}
/* Type definitions */
struct RNApdist_args_info {
  int dummy;
};

/* Variables and functions */
int RNApdist_cmdline_parser2(int, char **, struct RNApdist_args_info *,
                             int /*<<< orphan*/, int, int);
int RNApdist_cmdline_parser(int argc, char **argv,
                            struct RNApdist_args_info *args_info) {
  return RNApdist_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<RNApdist_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <RNApdist_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNApdist_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <RNApdist_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.RNApdist_args_info = type { i32 }
define i32 @RNApdist_cmdline_parser(i32 %0, i8** %1, %struct.RNApdist_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.RNApdist_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.RNApdist_args_info* %2, %struct.RNApdist_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.RNApdist_args_info*, %struct.RNApdist_args_info** %6
%10 = call i32 @RNApdist_cmdline_parser2(i32 %7, i8** %8, %struct.RNApdist_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.RNApdist_args_info = type { i32 }
define i32 @RNApdist_cmdline_parser(i32 %0, i8** %1, %struct.RNApdist_args_info* %2) {
%4 = tail call i32 @RNApdist_cmdline_parser2(i32 %0, i8** %1, %struct.RNApdist_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ print_hex_array_sep(unsigned char const *, size_t,
                                       int /*<<< orphan*/ *);
void print_hex_array(const unsigned char *data, size_t nbytes) {
  print_hex_array_sep(data, nbytes, NULL);
}


x86 assembly (clang, -O0):
<print_hex_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <print_hex_array_sep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hex_array>:
xor    %edx,%edx
jmp    1030 <print_hex_array_sep@plt>

LLVM IR (-O0):
define void @print_hex_array(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @print_hex_array_sep(i8* %5, i64 %6, i32* null)
ret void
}

LLVM IR (-O2):
define void @print_hex_array(i8* %0, i64 %1) {
%3 = tail call i32 @print_hex_array_sep(i8* %0, i64 %1, i32* null)
ret void
}
/* Variables and functions */
int sprintf(char *, char *, int);
int ssds_class_name(int fd, int class_num, char *sp) {
  int ret;
  ret = sprintf(sp, "CNAM%d", class_num);
  return ret;
}


x86 assembly (clang, -O0):
<ssds_class_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%edx
lea    0xed0(%rip),%rsi
call   1030 <sprintf@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssds_class_name>:
mov    %rdx,%rdi
mov    %esi,%edx
lea    0xee4(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"CNAM%d\00"
define i32 @ssds_class_name(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = load i32, i32* %5
%10 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %7
ret i32 %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"CNAM%d\00"
define i32 @ssds_class_name(i32 %0, i32 %1, i8* nocapture writeonly %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %2, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ handle_TTIN(int /*<<< orphan*/);
int gen_TTIN(void) {
  handle_TTIN(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_TTIN>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_TTIN@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_TTIN>:
push   %rax
xor    %edi,%edi
call   1030 <handle_TTIN@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_TTIN() {
%1 = call i32 @handle_TTIN(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_TTIN() {
%1 = tail call i32 @handle_TTIN(i32 0)
ret i32 0
}
int main() {
  int i = 0;
  while (i < 5) {
    i++;
  }
  while (1) {
    if (i >= 5)
      break;
    i++;
  }
  while (1) {
    i++;
    if (i >= 5)
      break;
  }
  for (i = 0; i < 5; i++) {
  }
  while (1) {
    if (i >= 5)
      return 1;
    i++;
  }
  while (1) {
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
jmp    112f <main+0x2f>
cmpl   $0x5,-0x8(%rbp)
jl     113e <main+0x3e>
jmp    114c <main+0x4c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112f <main+0x2f>
jmp    1151 <main+0x51>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jl     1169 <main+0x69>
jmp    116e <main+0x6e>
jmp    1151 <main+0x51>
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1192 <main+0x92>
jmp    1184 <main+0x84>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1175 <main+0x75>
jmp    1197 <main+0x97>
cmpl   $0x5,-0x8(%rbp)
jl     11a8 <main+0xa8>
mov    $0x1,%eax
pop    %rbp
ret
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1197 <main+0x97>

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
br label %10
10: ; preds = %9, %14
%11 = load i32, i32* %2
%12 = icmp sge i32 %11, 5
br i1 %12, label %13, label %14
13: ; preds = %10
br label %17
14: ; preds = %10
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %10
17: ; preds = %13
br label %18
18: ; preds = %17, %24
%19 = load i32, i32* %2
%20 = add nsw i32 %19, 1
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = icmp sge i32 %21, 5
br i1 %22, label %23, label %24
23: ; preds = %18
br label %25
24: ; preds = %18
br label %18
25: ; preds = %23
store i32 0, i32* %2
br label %26
26: ; preds = %30, %25
%27 = load i32, i32* %2
%28 = icmp slt i32 %27, 5
br i1 %28, label %29, label %33
29: ; preds = %26
br label %30
30: ; preds = %29
%31 = load i32, i32* %2
%32 = add nsw i32 %31, 1
store i32 %32, i32* %2
br label %26
33: ; preds = %26
br label %34
34: ; preds = %33, %38
%35 = load i32, i32* %2
%36 = icmp sge i32 %35, 5
br i1 %36, label %37, label %38
37: ; preds = %34
ret i32 1
38: ; preds = %34
%39 = load i32, i32* %2
%40 = add nsw i32 %39, 1
store i32 %40, i32* %2
br label %34
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
int gcd(int a, int b) {
  int c;
  while (1) {
    c = a % b;
    if (c == 0)
      return b;
    a = b;
    b = c;
  }
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1123 <gcd+0x23>
mov    -0x8(%rbp),%eax
pop    %rbp
ret
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <gcd+0xa>

x86 assembly (clang, -O2):
<gcd>:
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %edi,%eax
mov    %edx,%edi
cltd
idiv   %edi
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %2, %14
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = srem i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %6
%13 = load i32, i32* %4
ret i32 %13
14: ; preds = %6
%15 = load i32, i32* %4
store i32 %15, i32* %3
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %6
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %1, %2 ], [ %6, %3 ]
%5 = phi i32 [ %0, %2 ], [ %4, %3 ]
%6 = srem i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 %4
}
void cw1200_debug_rxed(struct cw1200_common *priv) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.cw1200_common = type opaque
define void @cw1200_debug_rxed(%struct.cw1200_common* %0) {
%2 = alloca %struct.cw1200_common*
store %struct.cw1200_common* %0, %struct.cw1200_common** %2
ret void
}

LLVM IR (-O2):
%struct.cw1200_common = type opaque
define void @cw1200_debug_rxed(%struct.cw1200_common* nocapture %0) {
ret void
}
char *strlower(char *s) {
  char *sptr = s;
  for (; *sptr; sptr++)
    if (*sptr >= 'A' && *sptr <= 'Z')
      *sptr += 'a' - 'A';
  return s;
}


x86 assembly (clang, -O0):
<strlower>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115f <strlower+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     1149 <strlower+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     1149 <strlower+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
add    $0x20,%ecx
mov    %cl,(%rax)
jmp    114e <strlower+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlower+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlower>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     112c <strlower+0x2c>
lea    0x1(%rax),%rdx
jmp    111b <strlower+0x1b>
nop
movzbl (%rdx),%ecx
add    $0x1,%rdx
test   %cl,%cl
je     112c <strlower+0x2c>
lea    -0x41(%rcx),%esi
cmp    $0x19,%sil
ja     1110 <strlower+0x10>
add    $0x20,%cl
mov    %cl,-0x1(%rdx)
jmp    1110 <strlower+0x10>
ret

LLVM IR (-O0):
define i8* @strlower(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %26, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %25
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %19, label %25
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = add nsw i32 %22, 32
%24 = trunc i32 %23 to i8
store i8 %24, i8* %20
br label %25
25: ; preds = %19, %14, %9
br label %26
26: ; preds = %25
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %3
br label %5
29: ; preds = %5
%30 = load i8*, i8** %2
ret i8* %30
}

LLVM IR (-O2):
define i8* @strlower(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -65
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nuw nsw i8 %5, 32
store i8 %10, i8* %6
br label %11
11: ; preds = %4, %9
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ video_stream_source_t;

/* Variables and functions */
int /*<<< orphan*/ VIDEO_SELECT_SOURCE;
int ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int videoSelectSource(int fd, video_stream_source_t source) {
  int ans;
  if ((ans = ioctl(fd, VIDEO_SELECT_SOURCE, source)) < 0) {
    perror("VIDEO SELECT SOURCE: ");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<videoSelectSource>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
call   1030 <ioctl@plt>
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
jge    1166 <videoSelectSource+0x46>
lea    0xeab(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116d <videoSelectSource+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<videoSelectSource>:
push   %rax
mov    %esi,%edx
mov    0x2eae(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
js     113b <videoSelectSource+0x1b>
pop    %rcx
ret
lea    0xebe(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@VIDEO_SELECT_SOURCE = global i32 0
@.str = [22 x i8] c"VIDEO SELECT SOURCE: \00"
define i32 @videoSelectSource(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* @VIDEO_SELECT_SOURCE
%9 = load i32, i32* %5
%10 = call i32 @ioctl(i32 %7, i32 %8, i32 %9)
store i32 %10, i32* %6
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @perror(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@VIDEO_SELECT_SOURCE = global i32 0
@.str = [22 x i8] c"VIDEO SELECT SOURCE: \00"
define i32 @videoSelectSource(i32 %0, i32 %1) {
%3 = load i32, i32* @VIDEO_SELECT_SOURCE
%4 = tail call i32 @ioctl(i32 %0, i32 %3, i32 %1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Variables and functions */
int cuenta_palabras(char *, int);
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int re = 0;
  char frase[100];
  gets(frase);
  re = cuenta_palabras(frase, 100);
  printf("%d\n", re);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x70(%rbp),%rdi
call   1050 <gets@plt>
lea    -0x70(%rbp),%rdi
mov    $0x64,%esi
call   1030 <cuenta_palabras@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe96(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <gets@plt>
mov    %rbx,%rdi
mov    $0x64,%esi
call   1030 <cuenta_palabras@plt>
lea    0xeac(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [100 x i8]
store i32 0, i32* %1
store i32 0, i32* %2
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = call i32 @gets(i8* %4)
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%7 = call i32 @cuenta_palabras(i8* %6, i32 100)
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = call i32 @gets(i8* %2)
%4 = call i32 @cuenta_palabras(i8* %2, i32 100)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}