xunge/DecIR huggingface dataset:
long Long_mod(long x, long divider) { return x % divider; }


x86 assembly (clang, -O0):
<Long_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Long_mod>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1118 <Long_mod+0x18>
cqto
idiv   %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @Long_mod(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = srem i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @Long_mod(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
ret i64 %3
}
void __attribute__((dj)) bar() {}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
ret

LLVM IR (-O0):
define void @bar() {
ret void
}

LLVM IR (-O2):
define void @bar() {
ret void
}
int dec(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<dec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dec>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @dec(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @dec(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
void foo738() {}


x86 assembly (clang, -O0):
<foo738>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo738>:
ret

LLVM IR (-O0):
define void @foo738() {
ret void
}

LLVM IR (-O2):
define void @foo738() {
ret void
}
void d_putuw(register unsigned char *ptr, register unsigned short data) {
  *ptr++ = (data & 0xff00) >> 8;
  *ptr = (data & 0x00ff) >> 0;
}


x86 assembly (clang, -O0):
<d_putuw>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
and    $0xff,%eax
sar    $0x0,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_putuw>:
rol    $0x8,%si
mov    %si,(%rdi)
ret

LLVM IR (-O0):
define void @d_putuw(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
%7 = and i32 %6, 65280
%8 = ashr i32 %7, 8
%9 = trunc i32 %8 to i8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
store i8 %9, i8* %10
%12 = load i16, i16* %4
%13 = zext i16 %12 to i32
%14 = and i32 %13, 255
%15 = ashr i32 %14, 0
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %3
store i8 %16, i8* %17
ret void
}

LLVM IR (-O2):
define void @d_putuw(i8* nocapture writeonly %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = trunc i16 %3 to i8
%5 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %4, i8* %0
%6 = trunc i16 %1 to i8
store i8 %6, i8* %5
ret void
}
void RTUtf16PutCpInternal(void) {}


x86 assembly (clang, -O0):
<RTUtf16PutCpInternal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTUtf16PutCpInternal>:
ret

LLVM IR (-O0):
define void @RTUtf16PutCpInternal() {
ret void
}

LLVM IR (-O2):
define void @RTUtf16PutCpInternal() {
ret void
}
/* Variables and functions */
bool errno_is_valid(int n) { return n > 0 && n <= 4095; }


x86 assembly (clang, -O0):
<errno_is_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1123 <errno_is_valid+0x23>
cmpl   $0xfff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<errno_is_valid>:
add    $0xffffffff,%edi
xor    %eax,%eax
cmp    $0xfff,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @errno_is_valid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 4095
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @errno_is_valid(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4095
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ set_ram_command(int);
void sdram_set_command_noop(void) { set_ram_command(0x1); }


x86 assembly (clang, -O0):
<sdram_set_command_noop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <set_ram_command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdram_set_command_noop>:
mov    $0x1,%edi
jmp    1030 <set_ram_command@plt>

LLVM IR (-O0):
define void @sdram_set_command_noop() {
%1 = call i32 @set_ram_command(i32 1)
ret void
}

LLVM IR (-O2):
define void @sdram_set_command_noop() {
%1 = tail call i32 @set_ram_command(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ send_int_to_srv(int const);
void seek(const int sec) {
  send_int_to_srv(0x12);
  send_int_to_srv(sec);
}


x86 assembly (clang, -O0):
<seek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x12,%edi
call   1030 <send_int_to_srv@plt>
mov    -0x4(%rbp),%edi
call   1030 <send_int_to_srv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seek>:
push   %rbx
mov    %edi,%ebx
mov    $0x12,%edi
call   1030 <send_int_to_srv@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <send_int_to_srv@plt>

LLVM IR (-O0):
define void @seek(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @send_int_to_srv(i32 18)
%4 = load i32, i32* %2
%5 = call i32 @send_int_to_srv(i32 %4)
ret void
}

LLVM IR (-O2):
define void @seek(i32 %0) {
%2 = tail call i32 @send_int_to_srv(i32 18)
%3 = tail call i32 @send_int_to_srv(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tsm_func();
void tsm_funch() { tsm_func(); }


x86 assembly (clang, -O0):
<tsm_funch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tsm_func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tsm_funch>:
xor    %eax,%eax
jmp    1030 <tsm_func@plt>

LLVM IR (-O0):
define void @tsm_funch() {
%1 = call i32 (...) @tsm_func()
ret void
}

LLVM IR (-O2):
define void @tsm_funch() {
%1 = tail call i32 (...) @tsm_func()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/ *);
int fputs(char const *, int /*<<< orphan*/ *);
signed int puts(const char *pStr) {
  signed int i = fputs(pStr, NULL);
  fputc('\n', NULL);
  return i + 1;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <fputs@plt>
mov    %eax,-0xc(%rbp)
mov    $0xa,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <fputc@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
xor    %esi,%esi
call   1030 <fputs@plt>
mov    %eax,%ebx
mov    $0xa,%edi
xor    %esi,%esi
call   1040 <fputc@plt>
add    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @puts(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @fputs(i8* %4, i32* null)
store i32 %5, i32* %3
%6 = call i32 @fputc(i8 signext 10, i32* null)
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @puts(i8* nocapture %0) {
%2 = tail call i32 @fputs(i8* %0, i32* null)
%3 = tail call i32 @fputc(i8 signext 10, i32* null)
%4 = add nsw i32 %2, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_rttime_restart() {
  printf("NOT IMPLEMENTED:"
         "pa_context_rttime_restart"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_rttime_restart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_rttime_restart>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"NOT IMPLEMENTED:pa_context_rttime_restart\0A\00"
define i32 @pa_context_rttime_restart() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [42 x i8] c"NOT IMPLEMENTED:pa_context_rttime_restart\00"
define i32 @pa_context_rttime_restart() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void StoreU16(uint8_t *pDestination, uint16_t value) {
  pDestination[0] = (value >> 0) & 0xff;
  pDestination[2] = (value >> 8) & 0xff;
}


x86 assembly (clang, -O0):
<StoreU16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x0,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<StoreU16>:
mov    %esi,%eax
movzbl %al,%ecx
mov    %ecx,(%rdi)
movzbl %ah,%eax
mov    %eax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @StoreU16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 0
%7 = and i32 %6, 255
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = ashr i32 %10, 8
%12 = and i32 %11, 255
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 2
store i32 %12, i32* %14
ret void
}

LLVM IR (-O2):
define void @StoreU16(i32* nocapture writeonly %0, i32 %1) {
%3 = and i32 %1, 255
store i32 %3, i32* %0
%4 = lshr i32 %1, 8
%5 = and i32 %4, 255
%6 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %5, i32* %6
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t read_png_uint16(const uint8_t *buf) {
  uint16_t b0, b1;
  b0 = buf[0];
  b1 = buf[1];
  return b0 << 8 | b1;
}


x86 assembly (clang, -O0):
<read_png_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x8,%eax
or     -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_png_uint16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_png_uint16(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = shl i32 %11, 8
%13 = load i32, i32* %4
%14 = or i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @read_png_uint16(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = shl i32 %2, 8
%6 = or i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *, float);
main() {
  float radius;
  float pi;
  radius = 4.8;
  pi = 3.14;
  printf("The area of the circle is %f", pi * (radius * radius));
  getchar();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xed4(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xec3(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedc(%rip),%rdi
movss  0xed0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"The area of the circle is %f\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
store float 0x4013333340000000, float* %1
store float 0x40091EB860000000, float* %2
%3 = load float, float* %2
%4 = load float, float* %1
%5 = load float, float* %1
%6 = fmul float %4, %5
%7 = fmul float %3, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), float %7)
%9 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"The area of the circle is %f\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), float 0x4052161E60000000)
%2 = tail call i32 (...) @getchar()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("Dobrý");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"Dobr\C3\BD\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"Dobr\C3\BD\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int ss2qpt();
int ss2qpt_(void) { return ss2qpt(); }


x86 assembly (clang, -O0):
<ss2qpt_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ss2qpt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ss2qpt_>:
xor    %eax,%eax
jmp    1030 <ss2qpt@plt>

LLVM IR (-O0):
define i32 @ss2qpt_() {
%1 = call i32 (...) @ss2qpt()
ret i32 %1
}

LLVM IR (-O2):
define i32 @ss2qpt_() {
%1 = tail call i32 (...) @ss2qpt()
ret i32 %1
}
int foo(void) {
  int a, b, c;
  asm("# Magic instruction" : "=r"(a) : "r"(0) : "eax");
  asm("# Magic instruction" : "=r"(b) : "r"(0) : "edx");
  asm("# Magic instruction" : "=r"(c) : "r"(0) : "ecx");
  return a + b + c;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
xor    %ecx,%ecx
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %esi,%esi
add    %ecx,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 asm "# Magic instruction", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %4, i32* %1
%5 = call i32 asm "# Magic instruction", "=r,r,~{edx},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %5, i32* %2
%6 = call i32 asm "# Magic instruction", "=r,r,~{ecx},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %6, i32* %3
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @foo() {
%1 = tail call i32 asm "# Magic instruction", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
%2 = tail call i32 asm "# Magic instruction", "=r,r,~{edx},~{dirflag},~{fpsr},~{flags}"(i32 0)
%3 = tail call i32 asm "# Magic instruction", "=r,r,~{ecx},~{dirflag},~{fpsr},~{flags}"(i32 0)
%4 = add nsw i32 %2, %1
%5 = add nsw i32 %4, %3
ret i32 %5
}
int isdigits(str)
char *str;
{
  do {
    if (!isdigit(*str))
      return 0;
    str++;
  } while (*str);
  return 1;
}


x86 assembly (clang, -O0):
<isdigits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    113d <isdigits+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    115d <isdigits+0x4d>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    111c <isdigits+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigits>:
mov    (%rdi),%al
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
movsbl %al,%eax
add    $0xffffffd0,%eax
cmp    $0x9,%eax
ja     112c <isdigits+0x2c>
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <isdigits+0x10>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isdigits(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %14, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = call i32 @isdigit(i32 %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %4
store i32 0, i32* %2
br label %19
11: ; preds = %4
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
br label %14
14: ; preds = %11
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = icmp ne i8 %16, 0
br i1 %17, label %4, label %18
18: ; preds = %14
store i32 1, i32* %2
br label %19
19: ; preds = %18, %10
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @isdigits(i8* nocapture %0) {
%2 = load i8, i8* %0
br label %3
3: ; preds = %9, %1
%4 = phi i8 [ %2, %1 ], [ %11, %9 ]
%5 = phi i8* [ %0, %1 ], [ %10, %9 ]
%6 = sext i8 %4 to i32
%7 = add nsw i32 %6, -48
%8 = icmp ult i32 %7, 10
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %3
13: ; preds = %9, %3
%14 = phi i32 [ 0, %3 ], [ 1, %9 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
int /*<<< orphan*/ *sem_open(char const *, int);
extern sem_t *_swift_Glibc_sem_open2(const char *name, int oflag) {
  return sem_open(name, oflag);
}


x86 assembly (clang, -O0):
<_swift_Glibc_sem_open2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sem_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_swift_Glibc_sem_open2>:
jmp    1030 <sem_open@plt>

LLVM IR (-O0):
define i32* @_swift_Glibc_sem_open2(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32* @sem_open(i8* %5, i32 %6)
ret i32* %7
}

LLVM IR (-O2):
define i32* @_swift_Glibc_sem_open2(i8* %0, i32 %1) {
%3 = tail call i32* @sem_open(i8* %0, i32 %1)
ret i32* %3
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_21(uint64_t x) {
  __asm__("rolq $21, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_21>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x15,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_21>:
mov    %rdi,%rax
rol    $0x15,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_21(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$21, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_21(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$21, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
int fc8300_reset(void *, unsigned short);
int bbm_com_reset(void *handle, unsigned short devid) {
  int res;
  res = fc8300_reset(handle, devid);
  return res;
}


x86 assembly (clang, -O0):
<bbm_com_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
call   1030 <fc8300_reset@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbm_com_reset>:
jmp    1030 <fc8300_reset@plt>

LLVM IR (-O0):
define i32 @bbm_com_reset(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
%5 = alloca i32
store i8* %0, i8** %3
store i16 %1, i16* %4
%6 = load i8*, i8** %3
%7 = load i16, i16* %4
%8 = call i32 @fc8300_reset(i8* %6, i16 zeroext %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @bbm_com_reset(i8* %0, i16 zeroext %1) {
%3 = tail call i32 @fc8300_reset(i8* %0, i16 zeroext %1)
ret i32 %3
}
unsigned char *_ZnwmPv(unsigned long long llvm_cbe_tmp__59,
                       unsigned char *llvm_cbe___p) {
  unsigned char *llvm_cbe_retval;
  unsigned char *llvm_cbe__rethrow;
  unsigned long long llvm_cbe__2e_addr;
  unsigned char *llvm_cbe___p_2e_addr;
  unsigned char *llvm_cbe_tmp;
  unsigned char *llvm_cbe_tmp__60;
  *(&llvm_cbe__2e_addr) = llvm_cbe_tmp__59;
  *(&llvm_cbe___p_2e_addr) = llvm_cbe___p;
  llvm_cbe_tmp = *(&llvm_cbe___p_2e_addr);
  *(&llvm_cbe_retval) = llvm_cbe_tmp;
  llvm_cbe_tmp__60 = *(&llvm_cbe_retval);
  return llvm_cbe_tmp__60;
}


x86 assembly (clang, -O0):
<_ZnwmPv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZnwmPv>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @_ZnwmPv(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%11 = load i64, i64* %3
store i64 %11, i64* %7
%12 = load i8*, i8** %4
store i8* %12, i8** %8
%13 = load i8*, i8** %8
store i8* %13, i8** %9
%14 = load i8*, i8** %9
store i8* %14, i8** %5
%15 = load i8*, i8** %5
store i8* %15, i8** %10
%16 = load i8*, i8** %10
ret i8* %16
}

LLVM IR (-O2):
define i8* @_ZnwmPv(i64 %0, i8* readnone returned %1) {
ret i8* %1
}
unsigned int fib(int n) {
  if (n <= 1) {
    return n;
  }
  return (fib(n - 1) + fib(n - 2));
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1130 <fib+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @fib(i32 %10)
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fib(i32 %13)
%15 = add i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add i32 %13, %12
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vsnprintf(char *, int, char const *, int /*<<< orphan*/);
void dologA(int level, const char *fmt, va_list ap) {
  char buf[1024];
  buf[sizeof(buf) - 1] = '\0';
  vsnprintf(buf, sizeof(buf) - 1, fmt, ap);
  fprintf(stderr, "%s", buf);
}


x86 assembly (clang, -O0):
<dologA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movb   $0x0,-0x21(%rbp)
lea    -0x420(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x3ff,%esi
call   1030 <vsnprintf@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
lea    -0x420(%rbp),%rdx
lea    0xe98(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dologA>:
push   %rbx
sub    $0x400,%rsp
mov    %edx,%ecx
mov    %rsi,%rdx
movb   $0x0,0x3ff(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x3ff,%esi
call   1030 <vsnprintf@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
lea    0xeab(%rip),%rsi
mov    %rbx,%rdx
call   1040 <fprintf@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @dologA(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [1024 x i8]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 1023
store i8 0, i8* %8
%9 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @vsnprintf(i8* %9, i32 1023, i8* %10, i32 %11)
%13 = load i32, i32* @stderr
%14 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%15 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %14)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @dologA(i32 %0, i8* nocapture %1, i32 %2) {
%4 = alloca [1024 x i8]
%5 = getelementptr inbounds [1024 x i8], [1024 x i8]* %4, i64 0, i64 0
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %4, i64 0, i64 1023
store i8 0, i8* %6
%7 = call i32 @vsnprintf(i8* %5, i32 1023, i8* %1, i32 %2)
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xbe() {
  Assert_real((isprint(190) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              955, ("isprint should be 0 for 0xbe"));
}


x86 assembly (clang, -O0):
<t_isprint_0xbe>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbe,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3bb,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xbe>:
push   %rax
mov    $0xbe,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3bb,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xbe\00"
define void @t_isprint_0xbe() {
%1 = call i64 @isprint(i32 190)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 955, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xbe\00"
define void @t_isprint_0xbe() {
%1 = tail call i64 @isprint(i32 190)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 955, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void SPIM_1_DisableTxInt(void) {}


x86 assembly (clang, -O0):
<SPIM_1_DisableTxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIM_1_DisableTxInt>:
ret

LLVM IR (-O0):
define void @SPIM_1_DisableTxInt() {
ret void
}

LLVM IR (-O2):
define void @SPIM_1_DisableTxInt() {
ret void
}
long flt2lng(float f) {
  union {
    float f;
    long l;
    int i;
  } u;
  if (f > 0) {
    u.f = f;
    return sizeof(float) == sizeof(long) ? u.l : u.i;
  } else if (f < 0) {
    u.f = -f;
    return sizeof(float) == sizeof(long) ? -u.l : -u.i;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<flt2lng>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1131 <flt2lng+0x31>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movslq -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116d <flt2lng+0x6d>
xorps  %xmm0,%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1165 <flt2lng+0x65>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x18(%rbp)
xor    %eax,%eax
sub    -0x18(%rbp),%eax
cltq
mov    %rax,-0x8(%rbp)
jmp    116d <flt2lng+0x6d>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flt2lng>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    110f <flt2lng+0xf>
movd   %xmm0,%eax
cltq
ret
ucomiss %xmm0,%xmm1
jbe    1123 <flt2lng+0x23>
movd   %xmm0,%eax
xor    $0x7fffffff,%eax
add    $0x1,%eax
cltq
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
%union.anon = type { i64 }
define i64 @flt2lng(float %0) {
%2 = alloca i64
%3 = alloca float
%4 = alloca %union.anon
store float %0, float* %3
%5 = load float, float* %3
%6 = fcmp ogt float %5, 0.000000e+00
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load float, float* %3
%9 = bitcast %union.anon* %4 to float*
store float %8, float* %9
%10 = bitcast %union.anon* %4 to i32*
%11 = load i32, i32* %10
%12 = sext i32 %11 to i64
store i64 %12, i64* %2
br label %25
13: ; preds = %1
%14 = load float, float* %3
%15 = fcmp olt float %14, 0.000000e+00
br i1 %15, label %16, label %24
16: ; preds = %13
%17 = load float, float* %3
%18 = fneg float %17
%19 = bitcast %union.anon* %4 to float*
store float %18, float* %19
%20 = bitcast %union.anon* %4 to i32*
%21 = load i32, i32* %20
%22 = sub nsw i32 0, %21
%23 = sext i32 %22 to i64
store i64 %23, i64* %2
br label %25
24: ; preds = %13
store i64 0, i64* %2
br label %25
25: ; preds = %24, %16, %7
%26 = load i64, i64* %2
ret i64 %26
}

LLVM IR (-O2):
define i64 @flt2lng(float %0) {
%2 = fcmp ogt float %0, 0.000000e+00
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = bitcast float %0 to i32
%5 = sext i32 %4 to i64
br label %13
6: ; preds = %1
%7 = fcmp olt float %0, 0.000000e+00
br i1 %7, label %8, label %13
8: ; preds = %6
%9 = fneg float %0
%10 = bitcast float %9 to i32
%11 = sub nsw i32 0, %10
%12 = sext i32 %11 to i64
br label %13
13: ; preds = %6, %8, %3
%14 = phi i64 [ %5, %3 ], [ %12, %8 ], [ 0, %6 ]
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ sendChunk(int, char, char *);
int strlen(char *);
void sendText(char chunkType, char *text) {
  int len = text ? strlen(text) : 0;
  sendChunk(len, chunkType, text);
}


x86 assembly (clang, -O0):
<sendText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114e <sendText+0x2e>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
jmp    1158 <sendText+0x38>
xor    %eax,%eax
mov    %eax,-0x18(%rbp)
jmp    1158 <sendText+0x38>
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rdx
movsbl %al,%esi
call   1040 <sendChunk@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendText>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
test   %rsi,%rsi
je     1139 <sendText+0x19>
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %eax,%edi
jmp    113b <sendText+0x1b>
xor    %edi,%edi
movsbl %bpl,%esi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <sendChunk@plt>

LLVM IR (-O0):
define void @sendText(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i32
store i8 %0, i8* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = call i32 @strlen(i8* %9)
br label %12
11: ; preds = %2
br label %12
12: ; preds = %11, %8
%13 = phi i32 [ %10, %8 ], [ 0, %11 ]
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = load i8, i8* %3
%16 = load i8*, i8** %4
%17 = call i32 @sendChunk(i32 %14, i8 signext %15, i8* %16)
ret void
}

LLVM IR (-O2):
define void @sendText(i8 signext %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @strlen(i8* %1)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ 0, %2 ]
%8 = tail call i32 @sendChunk(i32 %7, i8 signext %0, i8* %1)
ret void
}
/* Variables and functions */
scalar_t__ quick_settings_view_init();
int /*<<< orphan*/ quick_settings_view_is_init();
int /*<<< orphan*/ quick_settings_view_show();
void phoneui_backend_quick_settings_show() {
  if (!quick_settings_view_is_init()) {
    if (quick_settings_view_init()) {
      return;
    }
  }
  quick_settings_view_show();
}


x86 assembly (clang, -O0):
<phoneui_backend_quick_settings_show>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <quick_settings_view_is_init@plt>
cmp    $0x0,%eax
jne    115f <phoneui_backend_quick_settings_show+0x2f>
mov    $0x0,%al
call   1050 <quick_settings_view_init@plt>
cmp    $0x0,%rax
je     115a <phoneui_backend_quick_settings_show+0x2a>
jmp    1166 <phoneui_backend_quick_settings_show+0x36>
jmp    115f <phoneui_backend_quick_settings_show+0x2f>
mov    $0x0,%al
call   1040 <quick_settings_view_show@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<phoneui_backend_quick_settings_show>:
push   %rax
xor    %eax,%eax
call   1030 <quick_settings_view_is_init@plt>
test   %eax,%eax
je     1144 <phoneui_backend_quick_settings_show+0x14>
xor    %eax,%eax
pop    %rcx
jmp    1040 <quick_settings_view_show@plt>
xor    %eax,%eax
call   1050 <quick_settings_view_init@plt>
test   %rax,%rax
je     113c <phoneui_backend_quick_settings_show+0xc>
pop    %rax
ret

LLVM IR (-O0):
define void @phoneui_backend_quick_settings_show() {
%1 = call i32 (...) @quick_settings_view_is_init()
%2 = icmp ne i32 %1, 0
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = call i64 (...) @quick_settings_view_init()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %3
br label %10
7: ; preds = %3
br label %8
8: ; preds = %7, %0
%9 = call i32 (...) @quick_settings_view_show()
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
define void @phoneui_backend_quick_settings_show() {
%1 = tail call i32 (...) @quick_settings_view_is_init()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i64 (...) @quick_settings_view_init()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3, %0
%7 = tail call i32 (...) @quick_settings_view_show()
br label %8
8: ; preds = %3, %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
char *asctime(struct tm *);
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
char *klog_gettime() {
  time_t rawtime;
  struct tm *timeinfo;
  time(&rawtime);
  timeinfo = localtime(&rawtime);
  return asctime(timeinfo);
}


x86 assembly (clang, -O0):
<klog_gettime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1050 <time@plt>
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <asctime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<klog_gettime>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1050 <time@plt>
mov    %rbx,%rdi
call   1030 <localtime@plt>
mov    %rax,%rdi
call   1040 <asctime@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i8* @klog_gettime() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i32* %1)
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = call i8* @asctime(%struct.tm* %5)
ret i8* %6
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i8* @klog_gettime() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @time(i32* %1)
%4 = call %struct.tm* @localtime(i32* %1)
%5 = call i8* @asctime(%struct.tm* %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ helper_double_20_recursive(double *, int);
void helper_double_20(double *buf) { helper_double_20_recursive(buf, 20); }


x86 assembly (clang, -O0):
<helper_double_20>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x14,%esi
call   1030 <helper_double_20_recursive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helper_double_20>:
mov    $0x14,%esi
jmp    1030 <helper_double_20_recursive@plt>

LLVM IR (-O0):
define void @helper_double_20(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @helper_double_20_recursive(double* %3, i32 20)
ret void
}

LLVM IR (-O2):
define void @helper_double_20(double* %0) {
%2 = tail call i32 @helper_double_20_recursive(double* %0, i32 20)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fseek(int /*<<< orphan*/ *, long, int);
int jt_Fseek(FILE *stream, long offset, int origin) {
  return fseek(stream, offset, origin);
}


x86 assembly (clang, -O0):
<jt_Fseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <fseek@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jt_Fseek>:
jmp    1030 <fseek@plt>

LLVM IR (-O0):
define i32 @jt_Fseek(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i32
store i32* %0, i32** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = call i32 @fseek(i32* %7, i64 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @jt_Fseek(i32* nocapture %0, i64 %1, i32 %2) {
%4 = tail call i32 @fseek(i32* %0, i64 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
char *nextStringBetween(char *, char *, char **);
char *stringBetween(char *start, char *end, char *haystack) {
  return nextStringBetween(start, end, &haystack);
}


x86 assembly (clang, -O0):
<stringBetween>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <nextStringBetween@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringBetween>:
push   %rax
mov    %rdx,(%rsp)
mov    %rsp,%rdx
call   1030 <nextStringBetween@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i8* @stringBetween(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i8* @nextStringBetween(i8* %7, i8* %8, i8** %6)
ret i8* %9
}

LLVM IR (-O2):
define i8* @stringBetween(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
store i8* %2, i8** %4
%5 = call i8* @nextStringBetween(i8* %0, i8* %1, i8** %4)
ret i8* %5
}
void user_partitionhm() {}


x86 assembly (clang, -O0):
<user_partitionhm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_partitionhm>:
ret

LLVM IR (-O0):
define void @user_partitionhm() {
ret void
}

LLVM IR (-O2):
define void @user_partitionhm() {
ret void
}
int max_of_four(int a, int b, int c, int d) {
  int max = a;
  if (b > max) {
    max = b;
  }
  if (c > max) {
    max = c;
  }
  if (d > max) {
    max = d;
  }
  return max;
}


x86 assembly (clang, -O0):
<max_of_four>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x14(%rbp),%eax
jle    1128 <max_of_four+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x14(%rbp),%eax
jle    113a <max_of_four+0x3a>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
jle    114c <max_of_four+0x4c>
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_of_four>:
mov    %edi,%eax
cmp    %edi,%esi
cmovg  %esi,%eax
cmp    %edx,%eax
cmovl  %edx,%eax
cmp    %ecx,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @max_of_four(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
store i32 %10, i32* %9
%11 = load i32, i32* %6
%12 = load i32, i32* %9
%13 = icmp sgt i32 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %4
%15 = load i32, i32* %6
store i32 %15, i32* %9
br label %16
16: ; preds = %14, %4
%17 = load i32, i32* %7
%18 = load i32, i32* %9
%19 = icmp sgt i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32, i32* %7
store i32 %21, i32* %9
br label %22
22: ; preds = %20, %16
%23 = load i32, i32* %8
%24 = load i32, i32* %9
%25 = icmp sgt i32 %23, %24
br i1 %25, label %26, label %28
26: ; preds = %22
%27 = load i32, i32* %8
store i32 %27, i32* %9
br label %28
28: ; preds = %26, %22
%29 = load i32, i32* %9
ret i32 %29
}

LLVM IR (-O2):
define i32 @max_of_four(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp sgt i32 %1, %0
%6 = select i1 %5, i32 %1, i32 %0
%7 = icmp slt i32 %6, %2
%8 = select i1 %7, i32 %2, i32 %6
%9 = icmp slt i32 %8, %3
%10 = select i1 %9, i32 %3, i32 %8
ret i32 %10
}
/* Variables and functions */
long grg_get_reciprocal_point_group(long ***, long ***, long const, long const);
long ksp_get_reciprocal_point_group(long rec_rotations[48][3][3],
                                    long (*rotations)[3][3], const long num_rot,
                                    const long is_time_reversal) {
  return grg_get_reciprocal_point_group(rec_rotations, rotations, num_rot,
                                        is_time_reversal);
}


x86 assembly (clang, -O0):
<ksp_get_reciprocal_point_group>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <grg_get_reciprocal_point_group@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ksp_get_reciprocal_point_group>:
jmp    1030 <grg_get_reciprocal_point_group@plt>

LLVM IR (-O0):
define i64 @ksp_get_reciprocal_point_group([3 x [3 x i64]]* %0, [3 x [3 x i64]]* %1, i64 %2, i64 %3) {
%5 = alloca [3 x [3 x i64]]*
%6 = alloca [3 x [3 x i64]]*
%7 = alloca i64
%8 = alloca i64
store [3 x [3 x i64]]* %0, [3 x [3 x i64]]** %5
store [3 x [3 x i64]]* %1, [3 x [3 x i64]]** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load [3 x [3 x i64]]*, [3 x [3 x i64]]** %5
%10 = bitcast [3 x [3 x i64]]* %9 to i64***
%11 = load [3 x [3 x i64]]*, [3 x [3 x i64]]** %6
%12 = bitcast [3 x [3 x i64]]* %11 to i64***
%13 = load i64, i64* %7
%14 = load i64, i64* %8
%15 = call i64 @grg_get_reciprocal_point_group(i64*** %10, i64*** %12, i64 %13, i64 %14)
ret i64 %15
}

LLVM IR (-O2):
define i64 @ksp_get_reciprocal_point_group([3 x [3 x i64]]* %0, [3 x [3 x i64]]* %1, i64 %2, i64 %3) {
%5 = bitcast [3 x [3 x i64]]* %0 to i64***
%6 = bitcast [3 x [3 x i64]]* %1 to i64***
%7 = tail call i64 @grg_get_reciprocal_point_group(i64*** %5, i64*** %6, i64 %2, i64 %3)
ret i64 %7
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
int log2f(float);
int powf(int, float const);
int sqrtf(int);
float filterGetNotchQ(uint16_t centerFreq, uint16_t cutoff) {
  const float octaves = log2f((float)centerFreq / (float)cutoff) * 2;
  return sqrtf(powf(2, octaves)) / (powf(2, octaves) - 1);
}


x86 assembly (clang, -O0):
<filterGetNotchQ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cvtsi2ssq -0x8(%rbp),%xmm0
cvtsi2ssq -0x10(%rbp),%xmm1
divss  %xmm1,%xmm0
call   1040 <log2f@plt>
shl    $0x1,%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <powf@plt>
mov    %eax,%edi
call   1050 <sqrtf@plt>
mov    %eax,-0x18(%rbp)
movss  -0x14(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <powf@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
sub    $0x1,%ecx
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filterGetNotchQ>:
push   %rbx
sub    $0x10,%rsp
cvtsi2ss %rdi,%xmm0
cvtsi2ss %rsi,%xmm1
divss  %xmm1,%xmm0
call   1040 <log2f@plt>
add    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
movss  %xmm0,0xc(%rsp)
mov    $0x2,%edi
call   1030 <powf@plt>
mov    %eax,%edi
call   1050 <sqrtf@plt>
mov    %eax,%ebx
mov    $0x2,%edi
movss  0xc(%rsp),%xmm0
call   1030 <powf@plt>
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @filterGetNotchQ(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca float
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = sitofp i64 %6 to float
%8 = load i64, i64* %4
%9 = sitofp i64 %8 to float
%10 = fdiv float %7, %9
%11 = call i32 @log2f(float %10)
%12 = mul nsw i32 %11, 2
%13 = sitofp i32 %12 to float
store float %13, float* %5
%14 = load float, float* %5
%15 = call i32 @powf(i32 2, float %14)
%16 = call i32 @sqrtf(i32 %15)
%17 = load float, float* %5
%18 = call i32 @powf(i32 2, float %17)
%19 = sub nsw i32 %18, 1
%20 = sdiv i32 %16, %19
%21 = sitofp i32 %20 to float
ret float %21
}

LLVM IR (-O2):
define float @filterGetNotchQ(i64 %0, i64 %1) {
%3 = sitofp i64 %0 to float
%4 = sitofp i64 %1 to float
%5 = fdiv float %3, %4
%6 = tail call i32 @log2f(float %5)
%7 = shl nsw i32 %6, 1
%8 = sitofp i32 %7 to float
%9 = tail call i32 @powf(i32 2, float %8)
%10 = tail call i32 @sqrtf(i32 %9)
%11 = tail call i32 @powf(i32 2, float %8)
%12 = add nsw i32 %11, -1
%13 = sdiv i32 %10, %12
%14 = sitofp i32 %13 to float
ret float %14
}