xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  char input;
  while (1) {
    input = (char)getchar();
    printf("%c", input);
    printf("%d", input);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
lea    0xec0(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
lea    0xeb3(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
jmp    112f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
lea    0xed5(%rip),%r14
lea    0xed1(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
movsbl %al,%ebp
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
jmp    1140 <main+0x20>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %0, %3
%4 = call i64 (...) @getchar()
%5 = trunc i64 %4 to i8
store i8 %5, i8* %2
%6 = load i8, i8* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %6)
%8 = load i8, i8* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8 signext %8)
br label %3
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i64 (...) @getchar()
%3 = trunc i64 %2 to i8
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8 signext %3)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long, unsigned long);
void main(void) {
  unsigned long hash = 8021;
  char *str = "27c732ea-56c9-4f66-8c28-328638ccebbe";
  int c = 0;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  printf("\n\n final result is %lu %lu\n\n", hash, (hash & 0xffff));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x1f55,-0x8(%rbp)
lea    0xed9(%rip),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     116c <main+0x5c>
mov    -0x8(%rbp),%rax
shl    $0x5,%rax
add    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1132 <main+0x22>
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rdx
and    $0xffff,%rdx
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
movabs $0x3bcccfae44776b3b,%rsi
cf cc 3b
mov    $0x6b3b,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"27c732ea-56c9-4f66-8c28-328638ccebbe\00"
@.str.1 = [29 x i8] c"\0A\0A final result is %lu %lu\0A\0A\00"
define void @main() {
%1 = alloca i64
%2 = alloca i8*
%3 = alloca i32
store i64 8021, i64* %1
store i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %0
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
store i32 %8, i32* %3
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %4
%11 = load i64, i64* %1
%12 = shl i64 %11, 5
%13 = load i64, i64* %1
%14 = add i64 %12, %13
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = add i64 %14, %16
store i64 %17, i64* %1
br label %4
18: ; preds = %4
%19 = load i64, i64* %1
%20 = load i64, i64* %1
%21 = and i64 %20, 65535
%22 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i64 %19, i64 %21)
ret void
}

LLVM IR (-O2):
@.str.1 = [29 x i8] c"\0A\0A final result is %lu %lu\0A\0A\00"
define void @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i64 4309047290866658107, i64 27451)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() { exit(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
float sub(float a, float b) { return (a - b); }


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
subss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @sub(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fsub float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @sub(float %0, float %1) {
%3 = fsub float %0, %1
ret float %3
}
void write_pmcntenclr(int pmcntenclr) {
  asm("MCR p15, 0, %[pmcntenclr], c9, c12, 2;"
      : [pmcntenclr] "=r"(pmcntenclr)
      :
      :);
}


x86 assembly (clang, -O0):
x86 assembly (clang, -O2):
<write_pmcntenclr>:
ret

LLVM IR (-O0):
LLVM IR (-O2):
define void @write_pmcntenclr(i32 %0) {
%2 = tail call i32 asm "MCR p15, 0, $0, c9, c12, 2;", "=r,~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main() {
  puts("Hello world.");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world.\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello world.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct kernel_param {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pr_debug(char *);
int set_id_polling_enabled(const char *val, const struct kernel_param *kp) {
  pr_debug("ignore writing to id_polling_enabled\n");
  return 0;
}


x86 assembly (clang, -O0):
<set_id_polling_enabled>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <pr_debug@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_id_polling_enabled>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <pr_debug@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.kernel_param = type { i32 }
@.str = [38 x i8] c"ignore writing to id_polling_enabled\0A\00"
define i32 @set_id_polling_enabled(i8* %0, %struct.kernel_param* %1) {
%3 = alloca i8*
%4 = alloca %struct.kernel_param*
store i8* %0, i8** %3
store %struct.kernel_param* %1, %struct.kernel_param** %4
%5 = call i32 @pr_debug(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.kernel_param = type { i32 }
@.str = [38 x i8] c"ignore writing to id_polling_enabled\0A\00"
define i32 @set_id_polling_enabled(i8* nocapture readnone %0, %struct.kernel_param* nocapture readnone %1) {
%3 = tail call i32 @pr_debug(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
char *m2mp_client_channels_get_name(char *channels[256],
                                    const unsigned char id) {
  assert(id >= 0 && id <= 255);
  assert(channels[id]);
  return channels[id];
}


x86 assembly (clang, -O0):
<m2mp_client_channels_get_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xa(%rbp)
jl     1143 <m2mp_client_channels_get_name+0x33>
movzbl -0x9(%rbp),%eax
cmp    $0xff,%eax
setle  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%ecx
mov    (%rax,%rcx,8),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%ecx
mov    (%rax,%rcx,8),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2mp_client_channels_get_name>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    %ebp,%ebp
mov    (%rbx,%rbp,8),%rdi
xor    %eax,%eax
call   1030 <assert@plt>
mov    (%rbx,%rbp,8),%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @m2mp_client_channels_get_name(i8** %0, i8 zeroext %1) {
%3 = alloca i8**
%4 = alloca i8
store i8** %0, i8*** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = icmp sle i32 %10, 255
br label %12
12: ; preds = %8, %2
%13 = phi i1 [ false, %2 ], [ %11, %8 ]
%14 = zext i1 %13 to i32
%15 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %14)
%16 = load i8**, i8*** %3
%17 = load i8, i8* %4
%18 = zext i8 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
%21 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %20)
%22 = load i8**, i8*** %3
%23 = load i8, i8* %4
%24 = zext i8 %23 to i64
%25 = getelementptr inbounds i8*, i8** %22, i64 %24
%26 = load i8*, i8** %25
ret i8* %26
}

LLVM IR (-O2):
define i8* @m2mp_client_channels_get_name(i8** nocapture %0, i8 zeroext %1) {
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
%4 = zext i8 %1 to i64
%5 = getelementptr inbounds i8*, i8** %0, i64 %4
%6 = load i8*, i8** %5
%7 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %6)
%8 = load i8*, i8** %5
ret i8* %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int __rat_ra_set_flag(int *flag, uint8_t *data, uint16_t len) {
  do {
  } while (0);
  if (len < sizeof(int))
    return -1;
  *flag = *((int *)data) ? 1 : 0;
  return 0;
}


x86 assembly (clang, -O0):
<__rat_ra_set_flag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
jmp    1114 <__rat_ra_set_flag+0x14>
movslq -0x1c(%rbp),%rax
cmp    $0x4,%rax
jae    112e <__rat_ra_set_flag+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    114e <__rat_ra_set_flag+0x4e>
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
xor    %ecx,%ecx
mov    $0x1,%eax
cmp    $0x0,%edx
cmovne %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__rat_ra_set_flag>:
mov    $0xffffffff,%eax
cmp    $0x4,%edx
jb     1116 <__rat_ra_set_flag+0x16>
xor    %eax,%eax
cmpl   $0x0,(%rsi)
setne  %al
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__rat_ra_set_flag(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
br label %8
8: ; preds = %3
br label %9
9: ; preds = %8
%10 = load i32, i32* %7
%11 = sext i32 %10 to i64
%12 = icmp ult i64 %11, 4
br i1 %12, label %13, label %14
13: ; preds = %9
store i32 -1, i32* %4
br label %21
14: ; preds = %9
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = icmp ne i32 %16, 0
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 1, i32 0
%20 = load i32*, i32** %5
store i32 %19, i32* %20
store i32 0, i32* %4
br label %21
21: ; preds = %14, %13
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @__rat_ra_set_flag(i32* nocapture writeonly %0, i32* nocapture %1, i32 %2) {
%4 = icmp ult i32 %2, 4
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = load i32, i32* %1
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %0
br label %9
9: ; preds = %3, %5
%10 = phi i32 [ 0, %5 ], [ -1, %3 ]
ret i32 %10
}
float toCelsius(float fahr) { return ((5.0 / 9.0) * (fahr - 32.0)); }


x86 assembly (clang, -O0):
<toCelsius>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeee(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xeda(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<toCelsius>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @toCelsius(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fsub double %4, 3.200000e+01
%6 = fmul double 0x3FE1C71C71C71C72, %5
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @toCelsius(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, -3.200000e+01
%4 = fmul double %3, 0x3FE1C71C71C71C72
%5 = fptrunc double %4 to float
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ conv3();
int /*<<< orphan*/ rtconv();
int /*<<< orphan*/ testperm();
int main(int argc, char **argv) {
  int i = 0;
  for (i = 0; i < 5; i++) {
    conv3();
    rtconv();
    testperm();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x5,-0x14(%rbp)
jge    1181 <main+0x51>
mov    $0x0,%al
call   1050 <conv3@plt>
mov    $0x0,%al
call   1030 <rtconv@plt>
mov    $0x0,%al
call   1040 <testperm@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1154 <main+0x24>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <conv3@plt>
xor    %eax,%eax
call   1030 <rtconv@plt>
xor    %eax,%eax
call   1040 <testperm@plt>
xor    %eax,%eax
call   1050 <conv3@plt>
xor    %eax,%eax
call   1030 <rtconv@plt>
xor    %eax,%eax
call   1040 <testperm@plt>
xor    %eax,%eax
call   1050 <conv3@plt>
xor    %eax,%eax
call   1030 <rtconv@plt>
xor    %eax,%eax
call   1040 <testperm@plt>
xor    %eax,%eax
call   1050 <conv3@plt>
xor    %eax,%eax
call   1030 <rtconv@plt>
xor    %eax,%eax
call   1040 <testperm@plt>
xor    %eax,%eax
call   1050 <conv3@plt>
xor    %eax,%eax
call   1030 <rtconv@plt>
xor    %eax,%eax
call   1040 <testperm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %6
br label %7
7: ; preds = %14, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 5
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = call i32 (...) @conv3()
%12 = call i32 (...) @rtconv()
%13 = call i32 (...) @testperm()
br label %14
14: ; preds = %10
%15 = load i32, i32* %6
%16 = add nsw i32 %15, 1
store i32 %16, i32* %6
br label %7
17: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @conv3()
%4 = tail call i32 (...) @rtconv()
%5 = tail call i32 (...) @testperm()
%6 = tail call i32 (...) @conv3()
%7 = tail call i32 (...) @rtconv()
%8 = tail call i32 (...) @testperm()
%9 = tail call i32 (...) @conv3()
%10 = tail call i32 (...) @rtconv()
%11 = tail call i32 (...) @testperm()
%12 = tail call i32 (...) @conv3()
%13 = tail call i32 (...) @rtconv()
%14 = tail call i32 (...) @testperm()
%15 = tail call i32 (...) @conv3()
%16 = tail call i32 (...) @rtconv()
%17 = tail call i32 (...) @testperm()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ internal_set_shadow_preset(int, int /*<<< orphan*/, int, int,
                                              int, int, int /*<<< orphan*/,
                                              int /*<<< orphan*/);
void palette_set_shadow_dRGB32(int mode, int dr, int dg, int db, int noclip) {
  internal_set_shadow_preset(mode, 0, dr, dg, db, noclip, 0, 0);
}


x86 assembly (clang, -O0):
<palette_set_shadow_dRGB32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    -0x14(%rbp),%r9d
xor    %esi,%esi
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
call   1030 <internal_set_shadow_preset@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<palette_set_shadow_dRGB32>:
push   %rax
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
xor    %esi,%esi
push   $0x0
push   $0x0
call   1030 <internal_set_shadow_preset@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @palette_set_shadow_dRGB32(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @internal_set_shadow_preset(i32 %11, i32 0, i32 %12, i32 %13, i32 %14, i32 %15, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @palette_set_shadow_dRGB32(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @internal_set_shadow_preset(i32 %0, i32 0, i32 %1, i32 %2, i32 %3, i32 %4, i32 0, i32 0)
ret void
}
int tegra_smmu_get_asid(struct device *dev) { return 0; }


x86 assembly (clang, -O0):
<tegra_smmu_get_asid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_smmu_get_asid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @tegra_smmu_get_asid(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @tegra_smmu_get_asid(%struct.device* nocapture readnone %0) {
ret i32 0
}
void swift_slowDealloc(void) {}


x86 assembly (clang, -O0):
<swift_slowDealloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swift_slowDealloc>:
ret

LLVM IR (-O0):
define void @swift_slowDealloc() {
ret void
}

LLVM IR (-O2):
define void @swift_slowDealloc() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ podpunkt_a(int *, int);
int /*<<< orphan*/ podpunkt_b(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ wypisz_tab(int *, int);
int main() {
  int tab[5] = {1, 2, 3, 4, 5, 6};
  printf("Tabela:\n");
  wypisz_tab(tab, 6);
  podpunkt_a(tab, 3);
  podpunkt_b(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeaa(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xea7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xea5(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    0xe9f(%rip),%rdi
call   1040 <printf@plt>
lea    -0x20(%rbp),%rdi
mov    $0x6,%esi
call   1050 <wypisz_tab@plt>
lea    -0x20(%rbp),%rdi
mov    $0x3,%esi
call   1060 <podpunkt_a@plt>
mov    $0x5,%edi
call   1030 <podpunkt_b@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xec5(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xeaa(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0xeb3(%rip),%rdi
call   1040 <puts@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x6,%esi
call   1050 <wypisz_tab@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1060 <podpunkt_a@plt>
mov    $0x5,%edi
call   1030 <podpunkt_b@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.tab = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
@.str = [9 x i8] c"Tabela:\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
store i32 0, i32* %1
%3 = bitcast [5 x i32]* %2 to i8*
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%6 = call i32 @wypisz_tab(i32* %5, i32 6)
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%8 = call i32 @podpunkt_a(i32* %7, i32 3)
%9 = call i32 @podpunkt_b(i32 5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.tab = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
@str = [8 x i8] c"Tabela:\00"
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%5 = call i32 @wypisz_tab(i32* %4, i32 6)
%6 = call i32 @podpunkt_a(i32* %4, i32 3)
%7 = call i32 @podpunkt_b(i32 5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ initialize(int, char **);
int main(int argc, char *argv[]) {
  initialize(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <initialize@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <initialize@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @initialize(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @initialize(i32 %0, i8** %1)
ret i32 0
}
int allaction2region(int completeaction) { return (completeaction >> 2) & 15; }


x86 assembly (clang, -O0):
<allaction2region>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<allaction2region>:
mov    %edi,%eax
shr    $0x2,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @allaction2region(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 2
%5 = and i32 %4, 15
ret i32 %5
}

LLVM IR (-O2):
define i32 @allaction2region(i32 %0) {
%2 = lshr i32 %0, 2
%3 = and i32 %2, 15
ret i32 %3
}
/* Variables and functions */
unsigned char *flag_table_3_4_location(unsigned char **);
int flag_table_3_4(unsigned char **sec) {
  unsigned char *p;
  p = flag_table_3_4_location(sec);
  if (p == NULL)
    return -1;
  return (int)*p;
}


x86 assembly (clang, -O0):
<flag_table_3_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <flag_table_3_4_location@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1140 <flag_table_3_4+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    114a <flag_table_3_4+0x3a>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flag_table_3_4>:
push   %rax
call   1030 <flag_table_3_4_location@plt>
test   %rax,%rax
je     1120 <flag_table_3_4+0x10>
movzbl (%rax),%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @flag_table_3_4(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
%5 = load i8**, i8*** %3
%6 = call i8* @flag_table_3_4_location(i8** %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %14
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @flag_table_3_4(i8** %0) {
%2 = tail call i8* @flag_table_3_4_location(i8** %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ %6, %4 ], [ -1, %1 ]
ret i32 %8
}
void free_beebs(void *ptr) {}


x86 assembly (clang, -O0):
<free_beebs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_beebs>:
ret

LLVM IR (-O0):
define void @free_beebs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @free_beebs(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("hello, World\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"hello, World\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"hello, World\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int test_imm_95uint16_reg(unsigned short val) {
  return ((val) & (-0x95 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_95uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff6b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_95uint16_reg>:
test   $0xff6b,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_95uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -149
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_95uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -149
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int index_from_keyword(char *);
int config_is_key(char *key) {
  if (index_from_keyword(key) != -1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<config_is_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <index_from_keyword@plt>
cmp    $0xffffffff,%eax
je     113a <config_is_key+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <config_is_key+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_is_key>:
push   %rax
call   1030 <index_from_keyword@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @config_is_key(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @index_from_keyword(i8* %4)
%6 = icmp ne i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @config_is_key(i8* %0) {
%2 = tail call i32 @index_from_keyword(i8* %0)
%3 = icmp ne i32 %2, -1
%4 = zext i1 %3 to i32
ret i32 %4
}
long long int presum(int a) {
  switch (a) {
  case 2:
    return 855;
  case 3:
    return 12600;
  case 4:
    return 166500;
  case 5:
    return 2070000;
  case 6:
    return 24750000;
  case 7:
    return 288000000;
  case 8:
    return 3285000000;
  }
}


x86 assembly (clang, -O0):
<presum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xfffffffe,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x6,%eax
ja     1187 <presum+0x87>
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movq   $0x357,-0x8(%rbp)
jmp    1187 <presum+0x87>
movq   $0x3138,-0x8(%rbp)
jmp    1187 <presum+0x87>
movq   $0x28a64,-0x8(%rbp)
jmp    1187 <presum+0x87>
movq   $0x1f95f0,-0x8(%rbp)
jmp    1187 <presum+0x87>
movq   $0x179a7b0,-0x8(%rbp)
01
jmp    1187 <presum+0x87>
movq   $0x112a8800,-0x8(%rbp)
11
jmp    1187 <presum+0x87>
mov    $0xc3cd1f40,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<presum>:
add    $0xfffffffd,%edi
mov    $0x357,%eax
cmp    $0x5,%edi
ja     111b <presum+0x1b>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,8),%rax
ret

LLVM IR (-O0):
define i64 @presum(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %12 [
i32 2, label %5
i32 3, label %6
i32 4, label %7
i32 5, label %8
i32 6, label %9
i32 7, label %10
i32 8, label %11
]
5: ; preds = %1
store i64 855, i64* %2
br label %12
6: ; preds = %1
store i64 12600, i64* %2
br label %12
7: ; preds = %1
store i64 166500, i64* %2
br label %12
8: ; preds = %1
store i64 2070000, i64* %2
br label %12
9: ; preds = %1
store i64 24750000, i64* %2
br label %12
10: ; preds = %1
store i64 288000000, i64* %2
br label %12
11: ; preds = %1
store i64 3285000000, i64* %2
br label %12
12: ; preds = %5, %6, %7, %8, %9, %10, %11, %1
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
@switch.table.presum = [6 x i64] [i64 12600, i64 166500, i64 2070000, i64 24750000, i64 288000000, i64 3285000000]
define i64 @presum(i32 %0) {
%2 = add i32 %0, -3
%3 = icmp ult i32 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [6 x i64], [6 x i64]* @switch.table.presum, i64 0, i64 %5
%7 = load i64, i64* %6
br label %8
8: ; preds = %4, %1
%9 = phi i64 [ 855, %1 ], [ %7, %4 ]
ret i64 %9
}
OP(ed, d7) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(int);
void mov_reg32_preg32pimm32(int reg1, int reg2, unsigned long imm32) {
  put8(0x8B);
  put8(0x80 | (reg1 << 3) | reg2);
  put32(imm32);
}


x86 assembly (clang, -O0):
<mov_reg32_preg32pimm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0x80,%edi
or     -0x8(%rbp),%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rdi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg32_preg32pimm32>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0x8b,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %ebp,%ebx
or     $0x80,%ebx
mov    %ebx,%edi
call   1030 <put8@plt>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @mov_reg32_preg32pimm32(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = call i32 @put8(i32 139)
%8 = load i32, i32* %4
%9 = shl i32 %8, 3
%10 = or i32 128, %9
%11 = load i32, i32* %5
%12 = or i32 %10, %11
%13 = call i32 @put8(i32 %12)
%14 = load i64, i64* %6
%15 = call i32 @put32(i64 %14)
ret void
}

LLVM IR (-O2):
define void @mov_reg32_preg32pimm32(i32 %0, i32 %1, i64 %2) {
%4 = tail call i32 @put8(i32 139)
%5 = shl i32 %0, 3
%6 = or i32 %5, %1
%7 = or i32 %6, 128
%8 = tail call i32 @put8(i32 %7)
%9 = tail call i32 @put32(i64 %2)
ret void
}
/* Variables and functions */
float sqrtf(float);
float a(float x) { return sqrtf(x); }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111d <a+0xd>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @a(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrtf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @a(float %0) {
%2 = tail call float @sqrtf(float %0)
ret float %2
}
int f(int i) { return i; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @f(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help06(void) {
  printf("  s                 single-step one instruction\n");
  printf("  s  <cnt>          single-step <cnt> instructions\n");
}


x86 assembly (clang, -O0):
<help06>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0a(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help06>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0c(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [49 x i8] c" s single-step one instruction\0A\00"
@.str.1 = [52 x i8] c" s <cnt> single-step <cnt> instructions\0A\00"
define void @help06() {
%1 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [48 x i8] c" s single-step one instruction\00"
@str.2 = [51 x i8] c" s <cnt> single-step <cnt> instructions\00"
define void @help06() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int __socketcall(int, unsigned long *);
int shutdown(int sockfd, int how) {
  unsigned long args[2];
  args[0] = sockfd;
  args[1] = how;
  return (__socketcall(13, args));
}


x86 assembly (clang, -O0):
<shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x20(%rbp)
movslq -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x20(%rbp),%rsi
mov    $0xd,%edi
call   1030 <__socketcall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdown>:
sub    $0x18,%rsp
movslq %edi,%rax
mov    %rax,(%rsp)
movslq %esi,%rax
mov    %rax,0x8(%rsp)
mov    %rsp,%rsi
mov    $0xd,%edi
call   1030 <__socketcall@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @shutdown(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [2 x i64]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [2 x i64], [2 x i64]* %5, i64 0, i64 0
store i64 %7, i64* %8
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [2 x i64], [2 x i64]* %5, i64 0, i64 1
store i64 %10, i64* %11
%12 = getelementptr inbounds [2 x i64], [2 x i64]* %5, i64 0, i64 0
%13 = call i32 @__socketcall(i32 13, i64* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @shutdown(i32 %0, i32 %1) {
%3 = alloca [2 x i64]
%4 = bitcast [2 x i64]* %3 to i8*
%5 = sext i32 %0 to i64
%6 = getelementptr inbounds [2 x i64], [2 x i64]* %3, i64 0, i64 0
store i64 %5, i64* %6
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds [2 x i64], [2 x i64]* %3, i64 0, i64 1
store i64 %7, i64* %8
%9 = call i32 @__socketcall(i32 13, i64* %6)
ret i32 %9
}
void read_id(struct nandsim_private *ns) {}


x86 assembly (clang, -O0):
<read_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_id>:
ret

LLVM IR (-O0):
%struct.nandsim_private = type opaque
define void @read_id(%struct.nandsim_private* %0) {
%2 = alloca %struct.nandsim_private*
store %struct.nandsim_private* %0, %struct.nandsim_private** %2
ret void
}

LLVM IR (-O2):
%struct.nandsim_private = type opaque
define void @read_id(%struct.nandsim_private* nocapture %0) {
ret void
}
float sumOfAverages(float average1, float average2, int count1, int count2) {
  if (count1 == 0)
    count1 = 1;
  if (count2 == 0)
    count2 = 1;
  return (average1 * count1 + average2 * count2) / (count1 + count2);
}


x86 assembly (clang, -O0):
<sumOfAverages>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1125 <sumOfAverages+0x25>
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1136 <sumOfAverages+0x36>
movl   $0x1,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
cvtsi2ssl -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
cvtsi2ssl -0x10(%rbp),%xmm3
mulss  %xmm3,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
cvtsi2ss %eax,%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumOfAverages>:
test   %edi,%edi
mov    $0x1,%eax
cmove  %eax,%edi
test   %esi,%esi
cmove  %eax,%esi
cvtsi2ss %edi,%xmm2
cvtsi2ss %esi,%xmm3
mulss  %xmm1,%xmm3
mulss  %xmm2,%xmm0
addss  %xmm3,%xmm0
add    %edi,%esi
xorps  %xmm1,%xmm1
cvtsi2ss %esi,%xmm1
divss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @sumOfAverages(float %0, float %1, i32 %2, i32 %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca i32
%8 = alloca i32
store float %0, float* %5
store float %1, float* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %4
store i32 1, i32* %7
br label %12
12: ; preds = %11, %4
%13 = load i32, i32* %8
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 1, i32* %8
br label %16
16: ; preds = %15, %12
%17 = load float, float* %5
%18 = load i32, i32* %7
%19 = sitofp i32 %18 to float
%20 = load float, float* %6
%21 = load i32, i32* %8
%22 = sitofp i32 %21 to float
%23 = fmul float %20, %22
%24 = call float @llvm.fmuladd.f32(float %17, float %19, float %23)
%25 = load i32, i32* %7
%26 = load i32, i32* %8
%27 = add nsw i32 %25, %26
%28 = sitofp i32 %27 to float
%29 = fdiv float %24, %28
ret float %29
}

LLVM IR (-O2):
define float @sumOfAverages(float %0, float %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %2, 0
%6 = select i1 %5, i32 1, i32 %2
%7 = icmp eq i32 %3, 0
%8 = select i1 %7, i32 1, i32 %3
%9 = sitofp i32 %6 to float
%10 = sitofp i32 %8 to float
%11 = fmul float %10, %1
%12 = tail call float @llvm.fmuladd.f32(float %0, float %9, float %11)
%13 = add nsw i32 %8, %6
%14 = sitofp i32 %13 to float
%15 = fdiv float %12, %14
ret float %15
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int read_byte(int);
int /*<<< orphan*/ write_byte(int, int);
void clear_bits(uint8_t addr, uint8_t mask) {
  write_byte(addr, read_byte(addr) & ~mask);
}


x86 assembly (clang, -O0):
<clear_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <read_byte@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
and    %eax,%esi
call   1040 <write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bits>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <read_byte@plt>
not    %ebx
and    %eax,%ebx
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <write_byte@plt>

LLVM IR (-O0):
define void @clear_bits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @read_byte(i32 %6)
%8 = load i32, i32* %4
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = call i32 @write_byte(i32 %5, i32 %10)
ret void
}

LLVM IR (-O2):
define void @clear_bits(i32 %0, i32 %1) {
%3 = tail call i32 @read_byte(i32 %0)
%4 = xor i32 %1, -1
%5 = and i32 %3, %4
%6 = tail call i32 @write_byte(i32 %0, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *bin) { fprintf(stderr, "Usage: %s [0|1|2]\n", bin); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"Usage: %s [0|1|2]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"Usage: %s [0|1|2]\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR64_set(void) { return U_WMRCORENONE_set("U_WMR64"); }


x86 assembly (clang, -O0):
<U_WMR64_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR64_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR64\00"
define i8* @U_WMR64_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR64\00"
define i8* @U_WMR64_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int main() { return sizeof(_Bool) == 4 ? 0 : 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
g() {
  int *p;
  *p = 5;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    -0x10(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @g() {
%1 = alloca i32
%2 = alloca i32*
%3 = load i32*, i32** %2
store i32 5, i32* %3
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
/* Type definitions */
struct wpa_ssid {
  int dummy;
};
struct parse_data {
  int dummy;
};

/* Variables and functions */
char *wpa_config_write_wep_key(struct wpa_ssid *, int /*<<< orphan*/);
char *wpa_config_write_wep_key0(const struct parse_data *data,
                                struct wpa_ssid *ssid) {
  return wpa_config_write_wep_key(ssid, 0);
}


x86 assembly (clang, -O0):
<wpa_config_write_wep_key0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <wpa_config_write_wep_key@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_config_write_wep_key0>:
mov    %rsi,%rdi
xor    %esi,%esi
jmp    1030 <wpa_config_write_wep_key@plt>

LLVM IR (-O0):
%struct.parse_data = type { i32 }
%struct.wpa_ssid = type { i32 }
define i8* @wpa_config_write_wep_key0(%struct.parse_data* %0, %struct.wpa_ssid* %1) {
%3 = alloca %struct.parse_data*
%4 = alloca %struct.wpa_ssid*
store %struct.parse_data* %0, %struct.parse_data** %3
store %struct.wpa_ssid* %1, %struct.wpa_ssid** %4
%5 = load %struct.wpa_ssid*, %struct.wpa_ssid** %4
%6 = call i8* @wpa_config_write_wep_key(%struct.wpa_ssid* %5, i32 0)
ret i8* %6
}

LLVM IR (-O2):
%struct.parse_data = type { i32 }
%struct.wpa_ssid = type { i32 }
define i8* @wpa_config_write_wep_key0(%struct.parse_data* nocapture readnone %0, %struct.wpa_ssid* %1) {
%3 = tail call i8* @wpa_config_write_wep_key(%struct.wpa_ssid* %1, i32 0)
ret i8* %3
}
/* Type definitions */
struct crk5_exl_cam {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct crk5_exl_cam *);
void crk5_exl_cam_delete(struct crk5_exl_cam *exl) {
  if (!exl)
    return;
  free(exl);
}


x86 assembly (clang, -O0):
<crk5_exl_cam_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <crk5_exl_cam_delete+0x1c>
jmp    1135 <crk5_exl_cam_delete+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crk5_exl_cam_delete>:
test   %rdi,%rdi
je     111a <crk5_exl_cam_delete+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.crk5_exl_cam = type { i32 }
define void @crk5_exl_cam_delete(%struct.crk5_exl_cam* %0) {
%2 = alloca %struct.crk5_exl_cam*
store %struct.crk5_exl_cam* %0, %struct.crk5_exl_cam** %2
%3 = load %struct.crk5_exl_cam*, %struct.crk5_exl_cam** %2
%4 = icmp ne %struct.crk5_exl_cam* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load %struct.crk5_exl_cam*, %struct.crk5_exl_cam** %2
%8 = call i32 @free(%struct.crk5_exl_cam* %7)
br label %9
9: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.crk5_exl_cam = type { i32 }
define void @crk5_exl_cam_delete(%struct.crk5_exl_cam* %0) {
%2 = icmp eq %struct.crk5_exl_cam* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.crk5_exl_cam* %0)
br label %5
5: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dsb();
int /*<<< orphan*/ reg_dummy_read();
void mt_reg_sync_writeb(unsigned char v, unsigned int a) {
  *(volatile unsigned char *)(a) = (v);
  dsb();
  reg_dummy_read();
}


x86 assembly (clang, -O0):
<mt_reg_sync_writeb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x8(%rbp),%eax
mov    %cl,(%rax)
mov    $0x0,%al
call   1040 <dsb@plt>
mov    $0x0,%al
call   1030 <reg_dummy_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_reg_sync_writeb>:
push   %rax
mov    %esi,%eax
mov    %dil,(%rax)
xor    %eax,%eax
call   1040 <dsb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <reg_dummy_read@plt>

LLVM IR (-O0):
define void @mt_reg_sync_writeb(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
store volatile i8 %5, i8* %8
%9 = call i32 (...) @dsb()
%10 = call i32 (...) @reg_dummy_read()
ret void
}

LLVM IR (-O2):
define void @mt_reg_sync_writeb(i8 zeroext %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = inttoptr i64 %3 to i8*
store volatile i8 %0, i8* %4
%5 = tail call i32 (...) @dsb()
%6 = tail call i32 (...) @reg_dummy_read()
ret void
}