xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int ck_n(int argc, int der) {
  if (argc != der) {
    printf("Number of parameters error! Expected %d !", der);
    return 0;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<ck_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     1145 <ck_n+0x35>
mov    -0xc(%rbp),%esi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
jmp    114c <ck_n+0x3c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ck_n>:
mov    $0x1,%eax
cmp    %esi,%edi
je     112c <ck_n+0x1c>
push   %rax
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [42 x i8] c"Number of parameters error! Expected %d !\00"
define i32 @ck_n(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp ne i32 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, i32* %5
%11 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %10)
store i32 0, i32* %3
br label %13
12: ; preds = %2
store i32 1, i32* %3
br label %13
13: ; preds = %12, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [42 x i8] c"Number of parameters error! Expected %d !\00"
define i32 @ck_n(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %1)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ 0, %4 ], [ 1, %2 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ AfVcmCod(short);
void AfVcmCodCnv(unsigned short UsVcmCod) {
  signed short SsCodCnv;
  if (UsVcmCod < 0)
    UsVcmCod = 0;
  else if (UsVcmCod > 1024)
    UsVcmCod = 1024;
  SsCodCnv = (UsVcmCod - 512) * (32767 / 512);
  AfVcmCod(SsCodCnv);
}


x86 assembly (clang, -O0):
<AfVcmCodCnv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
cmp    $0x0,%eax
jge    1137 <AfVcmCodCnv+0x27>
movw   $0x0,-0x2(%rbp)
jmp    1151 <AfVcmCodCnv+0x41>
movzwl -0x2(%rbp),%eax
cmp    $0x400,%eax
jle    114c <AfVcmCodCnv+0x3c>
movw   $0x400,-0x2(%rbp)
jmp    1151 <AfVcmCodCnv+0x41>
movzwl -0x2(%rbp),%eax
sub    $0x200,%eax
imul   $0x3f,%eax,%eax
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%edi
call   1030 <AfVcmCod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AfVcmCodCnv>:
cmp    $0x400,%edi
mov    $0x400,%eax
cmovb  %edi,%eax
mov    %eax,%ecx
shl    $0x6,%ecx
sub    %eax,%ecx
add    $0xffff8200,%ecx
movswl %cx,%edi
jmp    1030 <AfVcmCod@plt>

LLVM IR (-O0):
define void @AfVcmCodCnv(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i16 0, i16* %2
br label %14
8: ; preds = %1
%9 = load i16, i16* %2
%10 = zext i16 %9 to i32
%11 = icmp sgt i32 %10, 1024
br i1 %11, label %12, label %13
12: ; preds = %8
store i16 1024, i16* %2
br label %13
13: ; preds = %12, %8
br label %14
14: ; preds = %13, %7
%15 = load i16, i16* %2
%16 = zext i16 %15 to i32
%17 = sub nsw i32 %16, 512
%18 = mul nsw i32 %17, 63
%19 = trunc i32 %18 to i16
store i16 %19, i16* %3
%20 = load i16, i16* %3
%21 = call i32 @AfVcmCod(i16 signext %20)
ret void
}

LLVM IR (-O2):
define void @AfVcmCodCnv(i16 zeroext %0) {
%2 = icmp ult i16 %0, 1024
%3 = select i1 %2, i16 %0, i16 1024
%4 = mul nuw i16 %3, 63
%5 = add i16 %4, -32256
%6 = tail call i32 @AfVcmCod(i16 signext %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("test111");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"test111\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"test111\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
__attribute__((weak)) void weak_def_fn0(void) {}


x86 assembly (clang, -O0):
<weak_def_fn0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<weak_def_fn0>:
ret

LLVM IR (-O0):
define weak void @weak_def_fn0() {
ret void
}

LLVM IR (-O2):
define weak void @weak_def_fn0() {
ret void
}
unsigned hash(const char *name) {
  return (unsigned)(((unsigned long)(name) >> 2) & (16 - 1));
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
and    $0xf,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    %rdi,%rax
shr    $0x2,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = lshr i64 %4, 2
%6 = and i64 %5, 15
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @hash(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = lshr i32 %3, 2
%5 = and i32 %4, 15
ret i32 %5
}
int stap_start_task_finder(void) { return 0; }


x86 assembly (clang, -O0):
<stap_start_task_finder>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stap_start_task_finder>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stap_start_task_finder() {
ret i32 0
}

LLVM IR (-O2):
define i32 @stap_start_task_finder() {
ret i32 0
}
int xor (int b) {
  switch (b % 4) {
  case 0:
    return b;
  case 1:
    return 1;
  case 2:
    return b + 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<xor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%edx
add    $0x3,%edx
test   %eax,%eax
mov    %eax,%ecx
cmovs  %edx,%ecx
and    $0xfffffffc,%ecx
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
je     114b <xor+0x4b>
jmp    1129 <xor+0x29>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
je     1156 <xor+0x56>
jmp    113a <xor+0x3a>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1162 <xor+0x62>
jmp    1170 <xor+0x70>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1177 <xor+0x77>
movl   $0x1,-0x4(%rbp)
jmp    1177 <xor+0x77>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1177 <xor+0x77>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor>:
mov    %edi,%eax
lea    0x3(%rax),%edx
test   %edi,%edi
cmovns %edi,%edx
and    $0xfffffffc,%edx
mov    %edi,%ecx
sub    %edx,%ecx
je     1129 <xor+0x29>
cmp    $0x2,%ecx
je     1123 <xor+0x23>
cmp    $0x1,%ecx
jne    1127 <xor+0x27>
mov    $0x1,%eax
ret
add    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xor(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 4
switch i32 %5, label %12 [
i32 0, label %6
i32 1, label %8
i32 2, label %9
]
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %13
8: ; preds = %1
store i32 1, i32* %2
br label %13
9: ; preds = %1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %9, %8, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @xor(i32 %0) {
%2 = srem i32 %0, 4
switch i32 %2, label %6 [
i32 0, label %7
i32 1, label %3
i32 2, label %4
]
3: ; preds = %1
br label %7
4: ; preds = %1
%5 = add nsw i32 %0, 1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %4, %3
%8 = phi i32 [ 0, %6 ], [ %5, %4 ], [ 1, %3 ], [ %0, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ init_map_types_shared_sub(int, int, int);
void init_map_types4() { init_map_types_shared_sub(5, 3, 4); }


x86 assembly (clang, -O0):
<init_map_types4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x3,%esi
mov    $0x4,%edx
call   1030 <init_map_types_shared_sub@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_map_types4>:
mov    $0x5,%edi
mov    $0x3,%esi
mov    $0x4,%edx
jmp    1030 <init_map_types_shared_sub@plt>

LLVM IR (-O0):
define void @init_map_types4() {
%1 = call i32 @init_map_types_shared_sub(i32 5, i32 3, i32 4)
ret void
}

LLVM IR (-O2):
define void @init_map_types4() {
%1 = tail call i32 @init_map_types_shared_sub(i32 5, i32 3, i32 4)
ret void
}
/* Type definitions */
struct L {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ foo(double, struct L *);
void bar(double a, struct L *p) { foo(a, p); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <foo@plt>

LLVM IR (-O0):
%struct.L = type { i32 }
define void @bar(double %0, %struct.L* %1) {
%3 = alloca double
%4 = alloca %struct.L*
store double %0, double* %3
store %struct.L* %1, %struct.L** %4
%5 = load double, double* %3
%6 = load %struct.L*, %struct.L** %4
%7 = call i32 @foo(double %5, %struct.L* %6)
ret void
}

LLVM IR (-O2):
%struct.L = type { i32 }
define void @bar(double %0, %struct.L* %1) {
%3 = tail call i32 @foo(double %0, %struct.L* %1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t SetBit(uint8_t word, uint8_t mask) { return word | mask; }


x86 assembly (clang, -O0):
<SetBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetBit>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @SetBit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = or i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @SetBit(i32 %0, i32 %1) {
%3 = or i32 %1, %0
ret i32 %3
}
void ath9k_cmn_debug_base_eeprom(struct dentry *debugfs_phy,
                                 struct ath_hw *ah) {}


x86 assembly (clang, -O0):
<ath9k_cmn_debug_base_eeprom>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ath9k_cmn_debug_base_eeprom>:
ret

LLVM IR (-O0):
%struct.dentry = type opaque
%struct.ath_hw = type opaque
define void @ath9k_cmn_debug_base_eeprom(%struct.dentry* %0, %struct.ath_hw* %1) {
%3 = alloca %struct.dentry*
%4 = alloca %struct.ath_hw*
store %struct.dentry* %0, %struct.dentry** %3
store %struct.ath_hw* %1, %struct.ath_hw** %4
ret void
}

LLVM IR (-O2):
%struct.dentry = type opaque
%struct.ath_hw = type opaque
define void @ath9k_cmn_debug_base_eeprom(%struct.dentry* nocapture %0, %struct.ath_hw* nocapture %1) {
ret void
}
int round_int(double a) {
  int i;
  if (a < 0)
    a = a - 0.5;
  else
    a = a + 0.5;
  i = (int)a;
  return i;
}


x86 assembly (clang, -O0):
<round_int>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1132 <round_int+0x32>
movsd  -0x8(%rbp),%xmm0
movsd  0xedc(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1144 <round_int+0x44>
movsd  0xec6(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_int>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @round_int(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load double, double* %2
%8 = fsub double %7, 5.000000e-01
store double %8, double* %2
br label %12
9: ; preds = %1
%10 = load double, double* %2
%11 = fadd double %10, 5.000000e-01
store double %11, double* %2
br label %12
12: ; preds = %9, %6
%13 = load double, double* %2
%14 = fptosi double %13 to i32
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @round_int(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = select i1 %2, double -5.000000e-01, double 5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
ret i32 %5
}
void UI_method_get_reader(void) {}


x86 assembly (clang, -O0):
<UI_method_get_reader>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_method_get_reader>:
ret

LLVM IR (-O0):
define void @UI_method_get_reader() {
ret void
}

LLVM IR (-O2):
define void @UI_method_get_reader() {
ret void
}
int do_060() { return 60; }


x86 assembly (clang, -O0):
<do_060>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_060>:
mov    $0x3c,%eax
ret

LLVM IR (-O0):
define i32 @do_060() {
ret i32 60
}

LLVM IR (-O2):
define i32 @do_060() {
ret i32 60
}
int test_imm_42int16_reg(short val) {
  return ((val) & (-0x42 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_42int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffbe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_42int16_reg>:
test   $0xffbe,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_42int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -66
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_42int16_reg(i16 signext %0) {
%2 = and i16 %0, -66
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
newenv(var, value) char *var, *value;
{ printf("### newenv disabled; cannot set %s=%s\n", var, value); }


x86 assembly (clang, -O0):
<newenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newenv>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"### newenv disabled; cannot set %s=%s\0A\00"
define i32 @newenv(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@.str = [39 x i8] c"### newenv disabled; cannot set %s=%s\0A\00"
define i32 @newenv(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret i32 undef
}
double Add(double x, double y) { return x + y; }


x86 assembly (clang, -O0):
<Add>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Add>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @Add(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @Add(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
/* Variables and functions */
double __nv_j0(double);
double j0(double __a) { return __nv_j0(__a); }


x86 assembly (clang, -O0):
<j0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__nv_j0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j0>:
jmp    1030 <__nv_j0@plt>

LLVM IR (-O0):
define double @j0(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__nv_j0(double %3)
ret double %4
}

LLVM IR (-O2):
define double @j0(double %0) {
%2 = tail call double @__nv_j0(double %0)
ret double %2
}
/* Variables and functions */
int printf(char *, long double, long double, long double, long double);
int test_cast_signed(void) {
  char c1 = 'a';
  short c2 = 0x5768;
  int c3 = 0x76959876;
  long c4 = 0x0976589757652309;
  long double d1 = c1, d2 = c2, d3 = c3, d4 = c4;
  return printf("signed: %Lf, %Lf, %Lf, %Lf\n", d1, d2, d3, d4);
}


x86 assembly (clang, -O0):
<test_cast_signed>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
movb   $0x61,-0x1(%rbp)
movw   $0x5768,-0x4(%rbp)
movl   $0x76959876,-0x8(%rbp)
movabs $0x976589757652309,%rax
58 76 09
mov    %rax,-0x10(%rbp)
movsbl -0x1(%rbp),%eax
mov    %ax,-0x60(%rbp)
filds  -0x60(%rbp)
fstpt  -0x20(%rbp)
mov    -0x4(%rbp),%ax
mov    %ax,-0x5e(%rbp)
filds  -0x5e(%rbp)
fstpt  -0x30(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x5c(%rbp)
fildl  -0x5c(%rbp)
fstpt  -0x40(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x58(%rbp)
fildll -0x58(%rbp)
fstpt  -0x50(%rbp)
fldt   -0x20(%rbp)
fldt   -0x30(%rbp)
fldt   -0x40(%rbp)
fldt   -0x50(%rbp)
mov    %rsp,%rax
fstpt  0x30(%rax)
fstpt  0x20(%rax)
fstpt  0x10(%rax)
fstpt  (%rax)
lea    0xe6f(%rip),%rdi
call   1030 <printf@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_cast_signed>:
sub    $0x48,%rsp
fldt   0xee6(%rip)
fstpt  0x30(%rsp)
fldl   0xeec(%rip)
fstpt  0x20(%rsp)
flds   0xeea(%rip)
fstpt  0x10(%rsp)
flds   0xee4(%rip)
fstpt  (%rsp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
@.str = [28 x i8] c"signed: %Lf, %Lf, %Lf, %Lf\0A\00"
define i32 @test_cast_signed() {
%1 = alloca i8
%2 = alloca i16
%3 = alloca i32
%4 = alloca i64
%5 = alloca x86_fp80
%6 = alloca x86_fp80
%7 = alloca x86_fp80
%8 = alloca x86_fp80
store i8 97, i8* %1
store i16 22376, i16* %2
store i32 1989515382, i32* %3
store i64 681829800622760713, i64* %4
%9 = load i8, i8* %1
%10 = sitofp i8 %9 to x86_fp80
store x86_fp80 %10, x86_fp80* %5
%11 = load i16, i16* %2
%12 = sitofp i16 %11 to x86_fp80
store x86_fp80 %12, x86_fp80* %6
%13 = load i32, i32* %3
%14 = sitofp i32 %13 to x86_fp80
store x86_fp80 %14, x86_fp80* %7
%15 = load i64, i64* %4
%16 = sitofp i64 %15 to x86_fp80
store x86_fp80 %16, x86_fp80* %8
%17 = load x86_fp80, x86_fp80* %5
%18 = load x86_fp80, x86_fp80* %6
%19 = load x86_fp80, x86_fp80* %7
%20 = load x86_fp80, x86_fp80* %8
%21 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), x86_fp80 %17, x86_fp80 %18, x86_fp80 %19, x86_fp80 %20)
ret i32 %21
}

LLVM IR (-O2):
@.str = [28 x i8] c"signed: %Lf, %Lf, %Lf, %Lf\0A\00"
define i32 @test_cast_signed() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), x86_fp80 0xK4005C200000000000000, x86_fp80 0xK400DAED0000000000000, x86_fp80 0xK401DED2B30EC00000000, x86_fp80 0xK403A9765897576523090)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ PROXY_CERT_INFO_EXTENSION;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ PROXY_CERT_INFO_EXTENSION_it;
PROXY_CERT_INFO_EXTENSION *PROXY_CERT_INFO_EXTENSION_new(void) {
  return (PROXY_CERT_INFO_EXTENSION *)ASN1_item_new(
      &PROXY_CERT_INFO_EXTENSION_it);
}


x86 assembly (clang, -O0):
<PROXY_CERT_INFO_EXTENSION_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PROXY_CERT_INFO_EXTENSION_new>:
mov    0x2ed1(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@PROXY_CERT_INFO_EXTENSION_it = global i32 0
define i32* @PROXY_CERT_INFO_EXTENSION_new() {
%1 = call i64 @ASN1_item_new(i32* @PROXY_CERT_INFO_EXTENSION_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@PROXY_CERT_INFO_EXTENSION_it = global i32 0
define i32* @PROXY_CERT_INFO_EXTENSION_new() {
%1 = tail call i64 @ASN1_item_new(i32* @PROXY_CERT_INFO_EXTENSION_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Variables and functions */
int SIGINT;
int SIGQUIT;
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
void handler(int sig) {
  if (sig == SIGINT) {
    printf("recv a SIGINT signal\n");
    sleep(5);
  }
  if (sig == SIGQUIT) {
    printf("recv a SIGQUIT signal\n");
  }
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
jne    1153 <handler+0x33>
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
mov    -0x4(%rbp),%eax
mov    0x2e83(%rip),%rcx
cmp    (%rcx),%eax
jne    1171 <handler+0x51>
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
push   %rbx
mov    %edi,%ebx
mov    0x2ebe(%rip),%rax
cmp    %edi,(%rax)
jne    1144 <handler+0x24>
lea    0xee1(%rip),%rdi
call   1030 <puts@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
mov    0x2e95(%rip),%rax
cmp    %ebx,(%rax)
jne    115c <handler+0x3c>
lea    0xeaa(%rip),%rdi
pop    %rbx
jmp    1030 <puts@plt>
pop    %rbx
ret

LLVM IR (-O0):
@SIGINT = global i32 0
@.str = [22 x i8] c"recv a SIGINT signal\0A\00"
@SIGQUIT = global i32 0
@.str.1 = [23 x i8] c"recv a SIGQUIT signal\0A\00"
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @sleep(i32 5)
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %2
%11 = load i32, i32* @SIGQUIT
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIGQUIT = global i32 0
@str = [22 x i8] c"recv a SIGQUIT signal\00"
@str.2 = [21 x i8] c"recv a SIGINT signal\00"
define void @handler(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.2, i64 0, i64 0))
%6 = tail call i32 @sleep(i32 5)
br label %7
7: ; preds = %4, %1
%8 = load i32, i32* @SIGQUIT
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
br label %12
12: ; preds = %10, %7
ret void
}
/* Variables and functions */
bool istVokal(char c) {
  return c == 'a' || c == 'e' || c == 'i' || c == 'o' || c == 'u';
}


x86 assembly (clang, -O0):
<istVokal>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x61,%ecx
mov    %al,-0x2(%rbp)
je     115f <istVokal+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x65,%ecx
mov    %al,-0x2(%rbp)
je     115f <istVokal+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x69,%ecx
mov    %al,-0x2(%rbp)
je     115f <istVokal+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x6f,%ecx
mov    %al,-0x2(%rbp)
je     115f <istVokal+0x5f>
movsbl -0x1(%rbp),%eax
cmp    $0x75,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<istVokal>:
lea    -0x61(%rdi),%eax
ror    %al
cmp    $0x8,%al
jae    111b <istVokal+0x1b>
movzbl %al,%ecx
mov    $0x1,%eax
mov    $0x95,%edx
bt     %ecx,%edx
jb     1124 <istVokal+0x24>
xor    %eax,%eax
cmp    $0x75,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @istVokal(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 97
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 101
br i1 %9, label %22, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 105
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 111
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 117
br label %22
22: ; preds = %18, %14, %10, %6, %1
%23 = phi i1 [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %21, %18 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @istVokal(i8 signext %0) {
%2 = add i8 %0, -97
%3 = tail call i8 @llvm.fshl.i8(i8 %2, i8 %2, i8 7)
%4 = icmp ult i8 %3, 8
br i1 %4, label %8, label %5
5: ; preds = %8, %1
%6 = icmp eq i8 %0, 117
%7 = zext i1 %6 to i32
br label %12
8: ; preds = %1
%9 = lshr i8 -107, %3
%10 = and i8 %9, 1
%11 = icmp eq i8 %10, 0
br i1 %11, label %5, label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ 1, %8 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ frob();
void rhs_to_tree(int x, int z) {
  if (x >= 4)
    frob();
  if (x >= 3)
    frob();
}


x86 assembly (clang, -O0):
<rhs_to_tree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x4,-0x4(%rbp)
jl     112f <rhs_to_tree+0x1f>
mov    $0x0,%al
call   1030 <frob@plt>
cmpl   $0x3,-0x4(%rbp)
jl     1140 <rhs_to_tree+0x30>
mov    $0x0,%al
call   1030 <frob@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rhs_to_tree>:
cmp    $0x4,%edi
jl     1123 <rhs_to_tree+0x13>
push   %rax
xor    %eax,%eax
call   1030 <frob@plt>
add    $0x8,%rsp
jmp    1128 <rhs_to_tree+0x18>
cmp    $0x3,%edi
jne    112f <rhs_to_tree+0x1f>
xor    %eax,%eax
jmp    1030 <frob@plt>
ret

LLVM IR (-O0):
define void @rhs_to_tree(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 4
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 (...) @frob()
br label %9
9: ; preds = %7, %2
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 3
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = call i32 (...) @frob()
br label %14
14: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
define void @rhs_to_tree(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 3
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @frob()
br label %8
6: ; preds = %2
%7 = icmp eq i32 %0, 3
br i1 %7, label %8, label %10
8: ; preds = %4, %6
%9 = tail call i32 (...) @frob()
br label %10
10: ; preds = %8, %6
ret void
}
/* Type definitions */
struct MemoryArena {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ initHuffmanTree(struct MemoryArena *);
void InitHPACK(struct MemoryArena *arena) { initHuffmanTree(arena); }


x86 assembly (clang, -O0):
<InitHPACK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <initHuffmanTree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitHPACK>:
jmp    1030 <initHuffmanTree@plt>

LLVM IR (-O0):
%struct.MemoryArena = type { i32 }
define void @InitHPACK(%struct.MemoryArena* %0) {
%2 = alloca %struct.MemoryArena*
store %struct.MemoryArena* %0, %struct.MemoryArena** %2
%3 = load %struct.MemoryArena*, %struct.MemoryArena** %2
%4 = call i32 @initHuffmanTree(%struct.MemoryArena* %3)
ret void
}

LLVM IR (-O2):
%struct.MemoryArena = type { i32 }
define void @InitHPACK(%struct.MemoryArena* %0) {
%2 = tail call i32 @initHuffmanTree(%struct.MemoryArena* %0)
ret void
}
int main(void) {
  int a = 0;
  while (a < 10) {
    a = a + 1;
  }
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 10
}
unsigned char get_bit(unsigned char c, unsigned char b) { return c & (1 << b); }


x86 assembly (clang, -O0):
<get_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bit>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @get_bit(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = shl i32 1, %8
%10 = and i32 %6, %9
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @get_bit(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = shl nuw i32 1, %3
%5 = trunc i32 %4 to i8
%6 = and i8 %5, %0
ret i8 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i;
  for (i = 0; i < 256; i++) {
    printf("%d %c\n", i, i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x100,-0x8(%rbp)
jge    1153 <main+0x43>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %c\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ array;

/* Variables and functions */
int /*<<< orphan*/ pr_array(int *, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sort(int *, int);
main() {
  int array[] = {10, -2, 333, 2, 200, 55, 22, 1, 3};
  int size;
  size = sizeof(array) / sizeof(int);
  printf("size=%d\n", size);
  pr_array(array, size);
  sort(array, size);
  pr_array(array, size);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    -0x30(%rbp),%rdi
lea    0xead(%rip),%rsi
mov    $0x24,%edx
call   1060 <memcpy@plt>
movl   $0x9,-0x34(%rbp)
mov    -0x34(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1030 <pr_array@plt>
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1050 <sort@plt>
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1030 <pr_array@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    0xee5(%rip),%eax
mov    %eax,0x20(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeae(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0xec7(%rip),%rdi
mov    $0x9,%esi
call   1040 <printf@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x9,%esi
call   1030 <pr_array@plt>
mov    %rbx,%rdi
mov    $0x9,%esi
call   1050 <sort@plt>
mov    %rbx,%rdi
mov    $0x9,%esi
call   1030 <pr_array@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.array = [9 x i32] [i32 10, i32 -2, i32 333, i32 2, i32 200, i32 55, i32 22, i32 1, i32 3]
@.str = [9 x i8] c"size=%d\0A\00"
define i32 @main() {
%1 = alloca [9 x i32]
%2 = alloca i32
%3 = bitcast [9 x i32]* %1 to i8*
store i32 9, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 0
%7 = load i32, i32* %2
%8 = call i32 @pr_array(i32* %6, i32 %7)
%9 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 0
%10 = load i32, i32* %2
%11 = call i32 @sort(i32* %9, i32 %10)
%12 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 0
%13 = load i32, i32* %2
%14 = call i32 @pr_array(i32* %12, i32 %13)
ret i32 0
}

LLVM IR (-O2):
@__const.main.array = [9 x i32] [i32 10, i32 -2, i32 333, i32 2, i32 200, i32 55, i32 22, i32 1, i32 3]
@.str = [9 x i8] c"size=%d\0A\00"
define i32 @main() {
%1 = alloca [9 x i32]
%2 = bitcast [9 x i32]* %1 to i8*
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 9)
%4 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 0
%5 = call i32 @pr_array(i32* %4, i32 9)
%6 = call i32 @sort(i32* %4, i32 9)
%7 = call i32 @pr_array(i32* %4, i32 9)
ret i32 0
}
void doubles(double d1, double d2) {}


x86 assembly (clang, -O0):
<doubles>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubles>:
ret

LLVM IR (-O0):
define void @doubles(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
ret void
}

LLVM IR (-O2):
define void @doubles(double %0, double %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pwm_set(unsigned int);
void set_motor_voltage(unsigned int duty_cycle) {
  if (duty_cycle > 100)
    duty_cycle = 100;
  else if (duty_cycle < 0)
    duty_cycle = 0;
  pwm_set(duty_cycle);
}


x86 assembly (clang, -O0):
<set_motor_voltage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jbe    1131 <set_motor_voltage+0x21>
movl   $0x64,-0x4(%rbp)
jmp    1147 <set_motor_voltage+0x37>
cmpl   $0x0,-0x4(%rbp)
jae    1142 <set_motor_voltage+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1147 <set_motor_voltage+0x37>
mov    -0x4(%rbp),%edi
call   1030 <pwm_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_motor_voltage>:
cmp    $0x64,%edi
mov    $0x64,%eax
cmovae %eax,%edi
jmp    1030 <pwm_set@plt>

LLVM IR (-O0):
define void @set_motor_voltage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ugt i32 %3, 100
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 100, i32* %2
br label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp ult i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
br label %11
11: ; preds = %10, %5
%12 = load i32, i32* %2
%13 = call i32 @pwm_set(i32 %12)
ret void
}

LLVM IR (-O2):
define void @set_motor_voltage(i32 %0) {
%2 = icmp ult i32 %0, 100
%3 = select i1 %2, i32 %0, i32 100
%4 = tail call i32 @pwm_set(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xbc() {
  Assert_real((isbdigit(188) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              945, ("isbdigit should be 0 for 0xbc"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xbc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbc,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3b1,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xbc>:
push   %rax
mov    $0xbc,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x3b1,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xbc\00"
define void @t_isbdigit_0xbc() {
%1 = call i64 @isbdigit(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xbc\00"
define void @t_isbdigit_0xbc() {
%1 = tail call i64 @isbdigit(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
double logic_g(double a, double b) { return a > b; }


x86 assembly (clang, -O0):
<logic_g>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<logic_g>:
cmpltsd %xmm0,%xmm1
movsd  0xef3(%rip),%xmm0
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @logic_g(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
%8 = zext i1 %7 to i32
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
define double @logic_g(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = uitofp i1 %3 to double
ret double %4
}
int xtensa_soffsetx4(v)
int v;
{ return (v & 3) == 0 && (v >= -524288 && v <= 524284); }


x86 assembly (clang, -O0):
<xtensa_soffsetx4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jne    1140 <xtensa_soffsetx4+0x40>
xor    %eax,%eax
cmpl   $0xfff80000,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     113a <xtensa_soffsetx4+0x3a>
cmpl   $0x7fffc,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtensa_soffsetx4>:
test   $0x3,%dil
sete   %al
add    $0x80000,%edi
cmp    $0xffffd,%edi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @xtensa_soffsetx4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, -524288
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 524284
br label %12
12: ; preds = %9, %6
%13 = phi i1 [ false, %6 ], [ %11, %9 ]
br label %14
14: ; preds = %12, %1
%15 = phi i1 [ false, %1 ], [ %13, %12 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @xtensa_soffsetx4(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = add i32 %0, 524288
%5 = icmp ult i32 %4, 1048573
%6 = and i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
void ff_hevc_put_hevc_bi_qpel_v48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v48_10_sse4() {
ret void
}
unsigned int hash(char *inputStr) {
  unsigned int result = 0;
  char *s;
  for (s = inputStr; *s; s++) {
    result = result * 65599 + *s;
  }
  return result;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <hash+0x48>
imul   $0x1003f,-0xc(%rbp),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1117 <hash+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <hash+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x1003f,%eax,%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
br label %6
6: ; preds = %17, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32, i32* %3
%12 = mul i32 %11, 65599
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = add i32 %12, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %10
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %4
br label %6
20: ; preds = %6
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %11, %4 ], [ %0, %1 ]
%7 = phi i32 [ %10, %4 ], [ 0, %1 ]
%8 = mul i32 %7, 65599
%9 = sext i8 %5 to i32
%10 = add i32 %8, %9
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %15
}
void __sharc_thread_destroy(void) {}


x86 assembly (clang, -O0):
<__sharc_thread_destroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sharc_thread_destroy>:
ret

LLVM IR (-O0):
define void @__sharc_thread_destroy() {
ret void
}

LLVM IR (-O2):
define void @__sharc_thread_destroy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int read(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ write(int, char *, int);
main() {
  char buf[512];
  int n;
  while ((n = read(0, buf, sizeof buf)) > 0)
    write(1, buf, n);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x220,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x210(%rbp),%rsi
xor    %edi,%edi
mov    $0x200,%edx
call   1040 <read@plt>
mov    %eax,-0x214(%rbp)
cmp    $0x0,%eax
jle    1180 <main+0x50>
lea    -0x210(%rbp),%rsi
mov    -0x214(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
jmp    1142 <main+0x12>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x200,%rsp
mov    %rsp,%rsi
xor    %edi,%edi
mov    $0x200,%edx
call   1040 <read@plt>
test   %eax,%eax
jle    1172 <main+0x42>
mov    %rsp,%rbx
xchg   %ax,%ax
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x200,%edx
call   1040 <read@plt>
test   %eax,%eax
jg     1150 <main+0x20>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [512 x i8]
%3 = alloca i32
store i32 0, i32* %1
br label %4
4: ; preds = %8, %0
%5 = getelementptr inbounds [512 x i8], [512 x i8]* %2, i64 0, i64 0
%6 = call i32 @read(i32 0, i8* %5, i32 512)
store i32 %6, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = getelementptr inbounds [512 x i8], [512 x i8]* %2, i64 0, i64 0
%10 = load i32, i32* %3
%11 = call i32 @write(i32 1, i8* %9, i32 %10)
br label %4
12: ; preds = %4
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [512 x i8]
%2 = getelementptr inbounds [512 x i8], [512 x i8]* %1, i64 0, i64 0
%3 = call i32 @read(i32 0, i8* %2, i32 512)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0, %5
%6 = phi i32 [ %8, %5 ], [ %3, %0 ]
%7 = call i32 @write(i32 1, i8* %2, i32 %6)
%8 = call i32 @read(i32 0, i8* %2, i32 512)
%9 = icmp sgt i32 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %0
%11 = tail call i32 @exit(i32 0)
unreachable
}
int is_little_endian(void) {
  short magic, test;
  char *ptr;
  magic = 0xABCD;
  ptr = (char *)&magic;
  test = (ptr[1] << 8) + (ptr[0] & 0xFF);
  return (magic == test);
}


x86 assembly (clang, -O0):
<is_little_endian>:
push   %rbp
mov    %rsp,%rbp
movw   $0xabcd,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
and    $0xff,%ecx
add    %ecx,%eax
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x4(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_little_endian() {
%1 = alloca i16
%2 = alloca i16
%3 = alloca i8*
store i16 -21555, i16* %1
%4 = bitcast i16* %1 to i8*
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = shl i32 %8, 8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = and i32 %13, 255
%15 = add nsw i32 %9, %14
%16 = trunc i32 %15 to i16
store i16 %16, i16* %2
%17 = load i16, i16* %1
%18 = sext i16 %17 to i32
%19 = load i16, i16* %2
%20 = sext i16 %19 to i32
%21 = icmp eq i32 %18, %20
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_little_endian() {
ret i32 1
}
void nseel_asm_tan(void) {
  __asm__("fptan\n"
          "fstp %st(0)\n");
}


x86 assembly (clang, -O0):
<nseel_asm_tan>:
push   %rbp
mov    %rsp,%rbp
fptan
fstp   %st(0)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_tan>:
fptan
fstp   %st(0)
ret

LLVM IR (-O0):
define void @nseel_asm_tan() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_tan() {
tail call void asm sideeffect "fptan\0Afstp %st(0)\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}