xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handle_logout(void) {
  printf("Status: 303 See Other\r\n");
  printf("Location: ./\r\n");
  printf("Set-Cookie: AUTH=; HttpOnly; SameSite=Lax; Max-Age=1\r\n");
  printf("\r\n");
}


x86 assembly (clang, -O0):
<handle_logout>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef1(%rip),%rdi
call   1030 <printf@plt>
lea    0xef4(%rip),%rdi
call   1030 <printf@plt>
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_logout>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef3(%rip),%rdi
call   1030 <puts@plt>
lea    0xef5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee7(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Status: 303 See Other\0D\0A\00"
@.str.1 = [15 x i8] c"Location: ./\0D\0A\00"
@.str.2 = [55 x i8] c"Set-Cookie: AUTH=; HttpOnly; SameSite=Lax; Max-Age=1\0D\0A\00"
@.str.3 = [3 x i8] c"\0D\0A\00"
define void @handle_logout() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"Status: 303 See Other\0D\00"
@str.4 = [14 x i8] c"Location: ./\0D\00"
@str.5 = [54 x i8] c"Set-Cookie: AUTH=; HttpOnly; SameSite=Lax; Max-Age=1\0D\00"
@str.6 = [2 x i8] c"\0D\00"
define void @handle_logout() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.6, i64 0, i64 0))
ret void
}
__attribute__((always_)) void cl_read_dqa(void *p) {
  asm volatile("movdqa (%0), %%xmm1\n\t"
               "movdqa 16(%0), %%xmm1\n\t"
               "movdqa 32(%0), %%xmm1\n\t"
               "movdqa 48(%0), %%xmm1\n\t"
               :
               : "r"(p)
               : "%xmm1", "memory");
}


x86 assembly (clang, -O0):
<cl_read_dqa>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movdqa (%rax),%xmm1
movdqa 0x10(%rax),%xmm1
movdqa 0x20(%rax),%xmm1
movdqa 0x30(%rax),%xmm1
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_read_dqa>:
movdqa (%rdi),%xmm1
movdqa 0x10(%rdi),%xmm1
movdqa 0x20(%rdi),%xmm1
movdqa 0x30(%rdi),%xmm1
ret

LLVM IR (-O0):
define void @cl_read_dqa(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @cl_read_dqa(i8* %0) {
tail call void asm sideeffect "movdqa ($0), %xmm1\0A\09movdqa 16($0), %xmm1\0A\09movdqa 32($0), %xmm1\0A\09movdqa 48($0), %xmm1\0A\09", "r,~{xmm1},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ omp_set_num_threads(int);
int /*<<< orphan*/ printf(char *, int);
void loopParCollapse() {
  int i, j, count = 0;
  double start_time, end_time;
  omp_set_num_threads(4);
#pragma omp parallel for collapse(2)
  for (i = 1; i <= 100; i++) {
    for (j = 1; j <= 100; j++) {
#pragma omp atomic
      count++;
    }
  }
  printf(" Value of count( Collapse Clause)  : %d \n", count);
}


x86 assembly (clang, -O0):
<loopParCollapse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0xc(%rbp)
mov    $0x4,%edi
call   1040 <omp_set_num_threads@plt>
movl   $0x1,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jg     1185 <loopParCollapse+0x65>
movl   $0x1,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     1172 <loopParCollapse+0x52>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1151 <loopParCollapse+0x31>
jmp    1177 <loopParCollapse+0x57>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <loopParCollapse+0x20>
mov    -0xc(%rbp),%esi
lea    0xe71(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loopParCollapse>:
push   %rax
mov    $0x4,%edi
call   1040 <omp_set_num_threads@plt>
lea    0xece(%rip),%rdi
mov    $0x2710,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [42 x i8] c" Value of count( Collapse Clause) : %d \0A\00"
define void @loopParCollapse() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store i32 0, i32* %3
%6 = call i32 @omp_set_num_threads(i32 4)
store i32 1, i32* %1
br label %7
7: ; preds = %21, %0
%8 = load i32, i32* %1
%9 = icmp sle i32 %8, 100
br i1 %9, label %10, label %24
10: ; preds = %7
store i32 1, i32* %2
br label %11
11: ; preds = %17, %10
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 100
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
br label %11
20: ; preds = %11
br label %21
21: ; preds = %20
%22 = load i32, i32* %1
%23 = add nsw i32 %22, 1
store i32 %23, i32* %1
br label %7
24: ; preds = %7
%25 = load i32, i32* %3
%26 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %25)
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c" Value of count( Collapse Clause) : %d \0A\00"
define void @loopParCollapse() {
%1 = tail call i32 @omp_set_num_threads(i32 4)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 10000)
ret void
}
rot_(r, axis) float *r;
char *axis;
{ rot(*r, *axis); }


x86 assembly (clang, -O0):
<rot_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x18(%rbp),%rax
movsbl (%rax),%edi
mov    $0x1,%al
call   1030 <rot@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot_>:
movss  (%rdi),%xmm0
cvtss2sd %xmm0,%xmm0
movsbl (%rsi),%edi
mov    $0x1,%al
jmp    1030 <rot@plt>

LLVM IR (-O0):
define i32 @rot_(float* %0, i8* %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca i8*
store float* %0, float** %4
store i8* %1, i8** %5
%6 = load float*, float** %4
%7 = load float, float* %6
%8 = fpext float %7 to double
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = call i32 (double, i32, ...) bitcast (i32 (...)* @rot to i32 (double, i32, ...)*)(double %8, i32 %11)
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @rot_(float* nocapture %0, i8* nocapture %1) {
%3 = load float, float* %0
%4 = fpext float %3 to double
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
%7 = tail call i32 (double, i32, ...) bitcast (i32 (...)* @rot to i32 (double, i32, ...)*)(double %4, i32 %6)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ hmac_sha256_vector(int /*<<< orphan*/ *, size_t, int,
                                      int /*<<< orphan*/ **, size_t *,
                                      int /*<<< orphan*/ *);
void hmac_sha256(uint8_t *key, size_t key_len, uint8_t *data, size_t data_len,
                 uint8_t *mac) {
  hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac);
}


x86 assembly (clang, -O0):
<hmac_sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x28(%rbp),%r9
mov    $0x1,%edx
lea    -0x18(%rbp),%rcx
lea    -0x20(%rbp),%r8
call   1030 <hmac_sha256_vector@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hmac_sha256>:
sub    $0x18,%rsp
mov    %r8,%r9
mov    %rdx,0x10(%rsp)
mov    %rcx,0x8(%rsp)
lea    0x10(%rsp),%rcx
lea    0x8(%rsp),%r8
mov    $0x1,%edx
call   1030 <hmac_sha256_vector@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @hmac_sha256(i32* %0, i64 %1, i32* %2, i64 %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
%10 = alloca i32*
store i32* %0, i32** %6
store i64 %1, i64* %7
store i32* %2, i32** %8
store i64 %3, i64* %9
store i32* %4, i32** %10
%11 = load i32*, i32** %6
%12 = load i64, i64* %7
%13 = load i32*, i32** %10
%14 = call i32 @hmac_sha256_vector(i32* %11, i64 %12, i32 1, i32** %8, i64* %9, i32* %13)
ret void
}

LLVM IR (-O2):
define void @hmac_sha256(i32* %0, i64 %1, i32* %2, i64 %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i64
store i32* %2, i32** %6
store i64 %3, i64* %7
%8 = call i32 @hmac_sha256_vector(i32* %0, i64 %1, i32 1, i32** %6, i64* %7, i32* %4)
ret void
}
/* Type definitions */
struct RNAparconv_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
RNAparconv_cmdline_parser_release(struct RNAparconv_args_info *);
void RNAparconv_cmdline_parser_free(struct RNAparconv_args_info *args_info) {
  RNAparconv_cmdline_parser_release(args_info);
}


x86 assembly (clang, -O0):
<RNAparconv_cmdline_parser_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RNAparconv_cmdline_parser_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAparconv_cmdline_parser_free>:
jmp    1030 <RNAparconv_cmdline_parser_release@plt>

LLVM IR (-O0):
%struct.RNAparconv_args_info = type { i32 }
define void @RNAparconv_cmdline_parser_free(%struct.RNAparconv_args_info* %0) {
%2 = alloca %struct.RNAparconv_args_info*
store %struct.RNAparconv_args_info* %0, %struct.RNAparconv_args_info** %2
%3 = load %struct.RNAparconv_args_info*, %struct.RNAparconv_args_info** %2
%4 = call i32 @RNAparconv_cmdline_parser_release(%struct.RNAparconv_args_info* %3)
ret void
}

LLVM IR (-O2):
%struct.RNAparconv_args_info = type { i32 }
define void @RNAparconv_cmdline_parser_free(%struct.RNAparconv_args_info* %0) {
%2 = tail call i32 @RNAparconv_cmdline_parser_release(%struct.RNAparconv_args_info* %0)
ret void
}
double pair_tailcorr_cut_eidip(void *pair_data, long center_index,
                               long other_index, double rcut) {
  double t1 = 0.0;
  return t1;
}


x86 assembly (clang, -O0):
<pair_tailcorr_cut_eidip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pair_tailcorr_cut_eidip>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @pair_tailcorr_cut_eidip(i8* %0, i64 %1, i64 %2, double %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca double
%9 = alloca double
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store double %3, double* %8
store double 0.000000e+00, double* %9
%10 = load double, double* %9
ret double %10
}

LLVM IR (-O2):
define double @pair_tailcorr_cut_eidip(i8* nocapture readnone %0, i64 %1, i64 %2, double %3) {
ret double 0.000000e+00
}
int test_imm_9Euint32_mem(unsigned int *val) {
  return ((*val) & (0x9E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Euint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x9e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Euint32_mem>:
testb  $0x9e,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Euint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 158
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Euint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 158
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct Var {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pA(char *, char const *, char const *, char const *,
                      char const *);
void __func_ne_sint(struct Var *avar, const char *areg, const char *lreg,
                    const char *rreg) {
  pA("if (%s != %s) {%s = 1;} else {%s = 0;}", lreg, rreg, areg, areg);
}


x86 assembly (clang, -O0):
<__func_ne_sint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x10(%rbp),%r8
lea    0xec1(%rip),%rdi
call   1030 <pA@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__func_ne_sint>:
mov    %rsi,%r8
lea    0xee6(%rip),%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%rcx
jmp    1030 <pA@plt>

LLVM IR (-O0):
%struct.Var = type { i32 }
@.str = [39 x i8] c"if (%s != %s) {%s = 1;} else {%s = 0;}\00"
define void @__func_ne_sint(%struct.Var* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.Var*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.Var* %0, %struct.Var** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %8
%11 = load i8*, i8** %6
%12 = load i8*, i8** %6
%13 = call i32 @pA(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i8* %11, i8* %12)
ret void
}

LLVM IR (-O2):
%struct.Var = type { i32 }
@.str = [39 x i8] c"if (%s != %s) {%s = 1;} else {%s = 0;}\00"
define void @__func_ne_sint(%struct.Var* nocapture readnone %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @pA(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %3, i8* %1, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M42_f(char *s) {
  debug("M42_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M42_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xef9(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M42_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf05(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"M42_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M42_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [46 x i8] c"M42_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M42_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ simple_next(void *);
void simple_init(void *rng) { simple_next(rng); }


x86 assembly (clang, -O0):
<simple_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <simple_next@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_init>:
jmp    1030 <simple_next@plt>

LLVM IR (-O0):
define void @simple_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @simple_next(i8* %3)
ret void
}

LLVM IR (-O2):
define void @simple_init(i8* %0) {
%2 = tail call i32 @simple_next(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int write_i2c_reg(int, int, int /*<<< orphan*/);
int piups_set_vbattconv(int file_i2c, uint16_t vbattconv) {
  return write_i2c_reg(file_i2c, 0x50, vbattconv);
}


x86 assembly (clang, -O0):
<piups_set_vbattconv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x50,%esi
call   1030 <write_i2c_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piups_set_vbattconv>:
mov    %esi,%edx
mov    $0x50,%esi
jmp    1030 <write_i2c_reg@plt>

LLVM IR (-O0):
define i32 @piups_set_vbattconv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @write_i2c_reg(i32 %5, i32 80, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @piups_set_vbattconv(i32 %0, i32 %1) {
%3 = tail call i32 @write_i2c_reg(i32 %0, i32 80, i32 %1)
ret i32 %3
}
char *strchr(const char *s __attribute__((unused)),
             int c __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @strchr(i8* nocapture readnone %0, i32 %1) {
ret i8* null
}
int scan(line, offset, column)
char *line;
int offset;
int column;
{
  char *stemp;
  int i;
  int j;
  stemp = line;
  i = 0;
  j = column;
  while (i < offset) {
    i++;
    j += len_char(*stemp, j);
    stemp++;
  }
  return (j);
}


x86 assembly (clang, -O0):
<scan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1174 <scan+0x64>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%edi
mov    -0x20(%rbp),%esi
mov    $0x0,%al
call   1030 <len_char@plt>
add    -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1137 <scan+0x27>
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%ebp
test   %esi,%esi
jle    1149 <scan+0x39>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl (%r14,%rbx,1),%edi
mov    %ebp,%esi
xor    %eax,%eax
call   1030 <len_char@plt>
add    %eax,%ebp
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <scan+0x20>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @scan(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%10 = load i8*, i8** %4
store i8* %10, i8** %7
store i32 0, i32* %8
%11 = load i32, i32* %6
store i32 %11, i32* %9
br label %12
12: ; preds = %16, %3
%13 = load i32, i32* %8
%14 = load i32, i32* %5
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %28
16: ; preds = %12
%17 = load i32, i32* %8
%18 = add nsw i32 %17, 1
store i32 %18, i32* %8
%19 = load i8*, i8** %7
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i32, i32* %9
%23 = call i32 (i32, i32, ...) bitcast (i32 (...)* @len_char to i32 (i32, i32, ...)*)(i32 %21, i32 %22)
%24 = load i32, i32* %9
%25 = add nsw i32 %24, %23
store i32 %25, i32* %9
%26 = load i8*, i8** %7
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %7
br label %12
28: ; preds = %12
%29 = load i32, i32* %9
ret i32 %29
}

LLVM IR (-O2):
define i32 @scan(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %16
5: ; preds = %3, %5
%6 = phi i32 [ %13, %5 ], [ %2, %3 ]
%7 = phi i32 [ %9, %5 ], [ 0, %3 ]
%8 = phi i8* [ %14, %5 ], [ %0, %3 ]
%9 = add nuw nsw i32 %7, 1
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @len_char to i32 (i32, i32, ...)*)(i32 %11, i32 %6)
%13 = add nsw i32 %12, %6
%14 = getelementptr inbounds i8, i8* %8, i64 1
%15 = icmp eq i32 %9, %1
br i1 %15, label %16, label %5
16: ; preds = %5, %3
%17 = phi i32 [ %2, %3 ], [ %13, %5 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int compEQ(char *key1, char *key2) {
  int rc = 0;
  if (strcmp(key1, key2) == 0)
    rc = 1;
  return rc;
}


x86 assembly (clang, -O0):
<compEQ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1145 <compEQ+0x35>
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compEQ>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @compEQ(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i64 @strcmp(i8* %6, i8* %7)
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %5
br label %11
11: ; preds = %10, %2
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @compEQ(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ syscall(int, char *, unsigned int);
long long mysyscall(char *file_path, unsigned int len) {
  syscall(317, file_path, len);
}


x86 assembly (clang, -O0):
<mysyscall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x13d,%edi
call   1030 <syscall@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysyscall>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x13d,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i64 @mysyscall(i8* %0, i32 %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = load i32, i32* %5
%8 = call i32 @syscall(i32 317, i8* %6, i32 %7)
%9 = load i64, i64* %3
ret i64 %9
}

LLVM IR (-O2):
define i64 @mysyscall(i8* %0, i32 %1) {
%3 = tail call i32 @syscall(i32 317, i8* %0, i32 %1)
ret i64 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
usage(char *com) { printf("Usage: %s [-s] <infile>\n", com); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Usage: %s [-s] <infile>\0A\00"
define i32 @usage(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [25 x i8] c"Usage: %s [-s] <infile>\0A\00"
define i32 @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 undef
}
__attribute__((weak)) int isatty(int fd) {
  (void)fd;
  return (1);
}


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define weak i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 1
}

LLVM IR (-O2):
define weak i32 @isatty(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ _profiler(void *);
void mon_profiler(void *pdata) { _profiler(pdata); }


x86 assembly (clang, -O0):
<mon_profiler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_profiler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mon_profiler>:
jmp    1030 <_profiler@plt>

LLVM IR (-O0):
define void @mon_profiler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_profiler(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mon_profiler(i8* %0) {
%2 = tail call i32 @_profiler(i8* %0)
ret void
}
int SwapEndianness4(int val) {
  return ((val & 0xFF) << 24) | ((val & 0xFF00) << 8) |
         ((val & 0xFF0000) >> 8) | ((val & 0xFF000000) >> 24);
}


x86 assembly (clang, -O0):
<SwapEndianness4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwapEndianness4>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @SwapEndianness4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = ashr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = lshr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @SwapEndianness4(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
void kvmarm_fast_trap_bt(struct kvm_vcpu *vcpu, struct instruction *instr) {}


x86 assembly (clang, -O0):
<kvmarm_fast_trap_bt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvmarm_fast_trap_bt>:
ret

LLVM IR (-O0):
%struct.kvm_vcpu = type opaque
%struct.instruction = type opaque
define void @kvmarm_fast_trap_bt(%struct.kvm_vcpu* %0, %struct.instruction* %1) {
%3 = alloca %struct.kvm_vcpu*
%4 = alloca %struct.instruction*
store %struct.kvm_vcpu* %0, %struct.kvm_vcpu** %3
store %struct.instruction* %1, %struct.instruction** %4
ret void
}

LLVM IR (-O2):
%struct.kvm_vcpu = type opaque
%struct.instruction = type opaque
define void @kvmarm_fast_trap_bt(%struct.kvm_vcpu* nocapture %0, %struct.instruction* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void PrintNewline() { putchar('\n'); }


x86 assembly (clang, -O0):
<PrintNewline>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintNewline>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @PrintNewline() {
%1 = call i32 @putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @PrintNewline() {
%1 = tail call i32 @putchar(i8 signext 10)
ret void
}
void gator_event_sampling_online_dispatch(int cpu) {}


x86 assembly (clang, -O0):
<gator_event_sampling_online_dispatch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gator_event_sampling_online_dispatch>:
ret

LLVM IR (-O0):
define void @gator_event_sampling_online_dispatch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gator_event_sampling_online_dispatch(i32 %0) {
ret void
}
int tls_handshake(int fd) { return -1; }


x86 assembly (clang, -O0):
<tls_handshake>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tls_handshake>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @tls_handshake(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @tls_handshake(i32 %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ geno2lfmm(char *, char *, int *, int *);
int /*<<< orphan*/ print_convert(int, int);
void R_geno2lfmm(char **R_input_file, char **R_output_file, int *N, int *M) {
  geno2lfmm(*R_input_file, *R_output_file, N, M);
  print_convert(*N, *M);
}


x86 assembly (clang, -O0):
<R_geno2lfmm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <geno2lfmm@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
mov    -0x20(%rbp),%rax
mov    (%rax),%esi
call   1030 <print_convert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<R_geno2lfmm>:
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
mov    (%rdi),%rdi
mov    (%rsi),%rsi
call   1040 <geno2lfmm@plt>
mov    (%rbx),%edi
mov    (%r14),%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <print_convert@plt>

LLVM IR (-O0):
define void @R_geno2lfmm(i8** %0, i8** %1, i32* %2, i32* %3) {
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i32*
%8 = alloca i32*
store i8** %0, i8*** %5
store i8** %1, i8*** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
%11 = load i8**, i8*** %6
%12 = load i8*, i8** %11
%13 = load i32*, i32** %7
%14 = load i32*, i32** %8
%15 = call i32 @geno2lfmm(i8* %10, i8* %12, i32* %13, i32* %14)
%16 = load i32*, i32** %7
%17 = load i32, i32* %16
%18 = load i32*, i32** %8
%19 = load i32, i32* %18
%20 = call i32 @print_convert(i32 %17, i32 %19)
ret void
}

LLVM IR (-O2):
define void @R_geno2lfmm(i8** nocapture %0, i8** nocapture %1, i32* %2, i32* %3) {
%5 = load i8*, i8** %0
%6 = load i8*, i8** %1
%7 = tail call i32 @geno2lfmm(i8* %5, i8* %6, i32* %2, i32* %3)
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = tail call i32 @print_convert(i32 %8, i32 %9)
ret void
}
/* Type definitions */
typedef scalar_t__ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ strptime(char *, char *, struct tm *);
scalar_t__ timegm(struct tm *);
int scan_xml_datedecode(char *string) {
  struct tm date_time;
  time_t seconds;
  strptime(string, "%Y-%m-%dT%H:%M:%SZ", &date_time);
  seconds = timegm(&date_time);
  return (int)seconds;
}


x86 assembly (clang, -O0):
<scan_xml_datedecode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1040 <strptime@plt>
lea    -0x10(%rbp),%rdi
call   1030 <timegm@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_xml_datedecode>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rsi
lea    0x8(%rsp),%rbx
mov    %rbx,%rdx
call   1040 <strptime@plt>
mov    %rbx,%rdi
call   1030 <timegm@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [19 x i8] c"%Y-%m-%dT%H:%M:%SZ\00"
define i32 @scan_xml_datedecode(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.tm
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strptime(i8* %5, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), %struct.tm* %3)
%7 = call i64 @timegm(%struct.tm* %3)
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [19 x i8] c"%Y-%m-%dT%H:%M:%SZ\00"
define i32 @scan_xml_datedecode(i8* %0) {
%2 = alloca %struct.tm
%3 = bitcast %struct.tm* %2 to i8*
%4 = call i32 @strptime(i8* %0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), %struct.tm* %2)
%5 = call i64 @timegm(%struct.tm* %2)
%6 = trunc i64 %5 to i32
ret i32 %6
}
int constrain_ext(int n, int min, int max) {
  if (n < min)
    return min;
  if (n > max)
    return max;
  return n;
}


x86 assembly (clang, -O0):
<constrain_ext>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1124 <constrain_ext+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <constrain_ext+0x41>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    113b <constrain_ext+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <constrain_ext+0x41>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constrain_ext>:
mov    %edx,%eax
cmp    %edx,%edi
cmovle %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @constrain_ext(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %6
store i32 %12, i32* %4
br label %21
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* %7
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %7
store i32 %18, i32* %4
br label %21
19: ; preds = %13
%20 = load i32, i32* %5
store i32 %20, i32* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @constrain_ext(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
const char *key_flag2str(int f) {
  static const char *a[] = {"off", "on"};
  return a[!!f];
}


x86 assembly (clang, -O0):
<key_flag2str>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
movslq %eax,%rcx
lea    0x2f0f(%rip),%rax
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_flag2str>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
lea    0xef2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
@key_flag2str.a = internal global [2 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0)]
@.str = [4 x i8] c"off\00"
@.str.1 = [3 x i8] c"on\00"
define i8* @key_flag2str(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [2 x i8*], [2 x i8*]* @key_flag2str.a, i64 0, i64 %8
%10 = load i8*, i8** %9
ret i8* %10
}

LLVM IR (-O2):
@reltable.key_flag2str = internal unnamed_addr constant [2 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([4 x i8]* @.str to i64), i64 ptrtoint ([2 x i32]* @reltable.key_flag2str to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.1 to i64), i64 ptrtoint ([2 x i32]* @reltable.key_flag2str to i64)) to i32)]
@.str = [4 x i8] c"off\00"
@.str.1 = [3 x i8] c"on\00"
define i8* @key_flag2str(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i64
%4 = shl i64 %3, 2
%5 = call i8* @llvm.load.relative.i64(i8* bitcast ([2 x i32]* @reltable.key_flag2str to i8*), i64 %4)
ret i8* %5
}
/* Variables and functions */
int number_mm();
int number_door(void) {
  int door;
  while ((door = number_mm() & (8 - 1)) > 5)
    ;
  return door;
}


x86 assembly (clang, -O0):
<number_door>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <number_mm@plt>
and    $0x7,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x5,%eax
jle    1133 <number_door+0x23>
jmp    1118 <number_door+0x8>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<number_door>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <number_mm@plt>
and    $0x7,%eax
cmp    $0x5,%eax
ja     1120 <number_door+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @number_door() {
%1 = alloca i32
br label %2
2: ; preds = %6, %0
%3 = call i32 (...) @number_mm()
%4 = and i32 %3, 7
store i32 %4, i32* %1
%5 = icmp sgt i32 %4, 5
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @number_door() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @number_mm()
%3 = and i32 %2, 7
%4 = icmp ugt i32 %3, 5
br i1 %4, label %1, label %5
5: ; preds = %1
ret i32 %3
}
/* Variables and functions */
long __builtin_divde(long, long);
long div_de(long a, long b) { return __builtin_divde(a, b); }


x86 assembly (clang, -O0):
<div_de>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__builtin_divde@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_de>:
jmp    1030 <__builtin_divde@plt>

LLVM IR (-O0):
define i64 @div_de(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @__builtin_divde(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @div_de(i64 %0, i64 %1) {
%3 = tail call i64 @__builtin_divde(i64 %0, i64 %1)
ret i64 %3
}
void RasterLSBDataOrderSelect(unsigned int baseAddr) {
  (*((volatile unsigned int *)(baseAddr + (0x28)))) &= ~(0x00000100u);
}


x86 assembly (clang, -O0):
<RasterLSBDataOrderSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x28,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffeff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterLSBDataOrderSelect>:
add    $0x28,%edi
andl   $0xfffffeff,(%rdi)
ret

LLVM IR (-O0):
define void @RasterLSBDataOrderSelect(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 40
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -257
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @RasterLSBDataOrderSelect(i32 %0) {
%2 = add i32 %0, 40
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -257
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UART_Write(char);
void PrintHandler(char c) { UART_Write(c); }


x86 assembly (clang, -O0):
<PrintHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <UART_Write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintHandler>:
jmp    1030 <UART_Write@plt>

LLVM IR (-O0):
define void @PrintHandler(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @UART_Write(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @PrintHandler(i8 signext %0) {
%2 = tail call i32 @UART_Write(i8 signext %0)
ret void
}
int cmd_notfound(char *line) { return 0; }


x86 assembly (clang, -O0):
<cmd_notfound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_notfound>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cmd_notfound(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @cmd_notfound(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void signature() {
  printf("\n\tGabriel Kreiman\n");
  printf("\tgabriel@klab.caltech.edu\n");
  printf("\tcheers\n");
}


x86 assembly (clang, -O0):
<signature>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeec(%rip),%rdi
call   1030 <printf@plt>
lea    0xefb(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<signature>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeee(%rip),%rdi
call   1030 <puts@plt>
lea    0xefc(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"\0A\09Gabriel Kreiman\0A\00"
@.str.1 = [27 x i8] c"\09gabriel@klab.caltech.edu\0A\00"
@.str.2 = [9 x i8] c"\09cheers\0A\00"
define void @signature() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c"\0A\09Gabriel Kreiman\00"
@str.3 = [26 x i8] c"\09gabriel@klab.caltech.edu\00"
@str.4 = [8 x i8] c"\09cheers\00"
define void @signature() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *, int);
char *strdup(char *);
char *semaphore_operation_get_filename(char *application_name,
                                       char *appaserver_data_directory,
                                       int parent_process_id) {
  char semaphore_filename[256];
  sprintf(semaphore_filename, "%s/%s_semaphore_%d.dat",
          appaserver_data_directory, application_name, parent_process_id);
  return strdup(semaphore_filename);
}


x86 assembly (clang, -O0):
<semaphore_operation_get_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    -0x120(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    -0x14(%rbp),%r8d
lea    0xeb0(%rip),%rsi
call   1030 <sprintf@plt>
lea    -0x120(%rbp),%rdi
call   1040 <strdup@plt>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semaphore_operation_get_filename>:
push   %rbx
sub    $0x100,%rsp
mov    %edx,%r8d
mov    %rsi,%rdx
mov    %rdi,%rcx
lea    0xec8(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <strdup@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"%s/%s_semaphore_%d.dat\00"
define i8* @semaphore_operation_get_filename(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [256 x i8]
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [256 x i8], [256 x i8]* %7, i64 0, i64 0
%9 = load i8*, i8** %5
%10 = load i8*, i8** %4
%11 = load i32, i32* %6
%12 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i32 %11)
%13 = getelementptr inbounds [256 x i8], [256 x i8]* %7, i64 0, i64 0
%14 = call i8* @strdup(i8* %13)
ret i8* %14
}

LLVM IR (-O2):
@.str = [23 x i8] c"%s/%s_semaphore_%d.dat\00"
define noalias i8* @semaphore_operation_get_filename(i8* %0, i8* %1, i32 %2) {
%4 = alloca [256 x i8]
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%6 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %0, i32 %2)
%7 = call i8* @strdup(i8* %5)
ret i8* %7
}
primo_n(int n) {
  int i;
  int primo;
  i = n - 1;
  primo = 0;
  while ((i >= 2) && (primo == 0)) {
    if (n % i == 0) {
      primo = 1;
    }
    i--;
  }
  return primo;
}


x86 assembly (clang, -O0):
<primo_n>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x2,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jl     1130 <primo_n+0x30>
cmpl   $0x0,-0xc(%rbp)
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1140 <primo_n+0x40>
jmp    1165 <primo_n+0x65>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    1157 <primo_n+0x57>
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1117 <primo_n+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<primo_n>:
xor    %eax,%eax
cmp    $0x3,%edi
jl     112a <primo_n+0x2a>
mov    %edi,%ecx
nopl   0x0(%rax)
lea    -0x1(%rcx),%esi
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1123 <primo_n+0x23>
cmp    $0x3,%ecx
mov    %esi,%ecx
ja     1110 <primo_n+0x10>
xor    %eax,%eax
test   %edx,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @primo_n(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sub nsw i32 %5, 1
store i32 %6, i32* %3
store i32 0, i32* %4
br label %7
7: ; preds = %21, %1
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 2
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %4
%12 = icmp eq i32 %11, 0
br label %13
13: ; preds = %10, %7
%14 = phi i1 [ false, %7 ], [ %12, %10 ]
br i1 %14, label %15, label %24
15: ; preds = %13
%16 = load i32, i32* %2
%17 = load i32, i32* %3
%18 = srem i32 %16, %17
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 1, i32* %4
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %3
%23 = add nsw i32 %22, -1
store i32 %23, i32* %3
br label %7
24: ; preds = %13
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @primo_n(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %12
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = srem i32 %0, %5
%7 = icmp eq i32 %6, 0
%8 = icmp ult i32 %4, 4
%9 = or i1 %7, %8
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = zext i1 %7 to i32
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ 0, %1 ], [ %11, %10 ]
ret i32 %13
}
int x_fold_lower(c)
int c;
{ return x_fold_case('L'); }


x86 assembly (clang, -O0):
<x_fold_lower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4c,%edi
mov    $0x0,%al
call   1030 <x_fold_case@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_fold_lower>:
mov    $0x4c,%edi
xor    %eax,%eax
jmp    1030 <x_fold_case@plt>

LLVM IR (-O0):
define i32 @x_fold_lower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @x_fold_case to i32 (i32, ...)*)(i32 76)
ret i32 %3
}

LLVM IR (-O2):
define i32 @x_fold_lower(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @x_fold_case to i32 (i32, ...)*)(i32 76)
ret i32 %2
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
size_t aeron_int64_to_ptr_hash_map_hash_key(int64_t key, size_t mask) {
  return (key * 31) & mask;
}


x86 assembly (clang, -O0):
<aeron_int64_to_ptr_hash_map_hash_key>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
imul   $0x1f,-0x4(%rbp),%eax
cltq
and    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_int64_to_ptr_hash_map_hash_key>:
mov    %edi,%eax
shl    $0x5,%eax
sub    %edi,%eax
cltq
and    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @aeron_int64_to_ptr_hash_map_hash_key(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = mul nsw i32 %5, 31
%7 = sext i32 %6 to i64
%8 = load i64, i64* %4
%9 = and i64 %7, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @aeron_int64_to_ptr_hash_map_hash_key(i32 %0, i64 %1) {
%3 = mul nsw i32 %0, 31
%4 = sext i32 %3 to i64
%5 = and i64 %4, %1
ret i64 %5
}