xunge/DecIR huggingface dataset:
int lib$extv(int *position, char *size, int *base) {
  int retval;
  int s = *size;
  int pos = *position;
  int src_mask = (1 << s) - 1;
  retval = ((*base) >> pos) & src_mask;
  if (retval & (1 << (s - 1))) {
    int signs = 0xffffffff;
    signs &= ~src_mask;
    retval |= signs;
  }
  return retval;
}


x86 assembly (clang, -O0):
<lib$extv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    %eax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x24(%rbp),%ecx
sar    %cl,%eax
and    -0x28(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x20(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     117d <lib$extv+0x7d>
movl   $0xffffffff,-0x2c(%rbp)
mov    -0x28(%rbp),%eax
xor    $0xffffffff,%eax
and    -0x2c(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib$extv>:
mov    (%rsi),%r8b
mov    (%rdi),%r9b
mov    $0xffffffff,%esi
mov    %r8d,%ecx
shl    %cl,%esi
mov    %esi,%edi
mov    (%rdx),%eax
mov    %r9d,%ecx
sar    %cl,%eax
not    %edi
and    %eax,%edi
add    $0xff,%r8b
movzbl %r8b,%ecx
or     %esi,%eax
bt     %ecx,%edi
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @"lib$extv"(i32* %0, i8* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%12 = load i8*, i8** %5
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
store i32 %14, i32* %8
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
store i32 %16, i32* %9
%17 = load i32, i32* %8
%18 = shl i32 1, %17
%19 = sub nsw i32 %18, 1
store i32 %19, i32* %10
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = load i32, i32* %9
%23 = ashr i32 %21, %22
%24 = load i32, i32* %10
%25 = and i32 %23, %24
store i32 %25, i32* %7
%26 = load i32, i32* %7
%27 = load i32, i32* %8
%28 = sub nsw i32 %27, 1
%29 = shl i32 1, %28
%30 = and i32 %26, %29
%31 = icmp ne i32 %30, 0
br i1 %31, label %32, label %40
32: ; preds = %3
store i32 -1, i32* %11
%33 = load i32, i32* %10
%34 = xor i32 %33, -1
%35 = load i32, i32* %11
%36 = and i32 %35, %34
store i32 %36, i32* %11
%37 = load i32, i32* %11
%38 = load i32, i32* %7
%39 = or i32 %38, %37
store i32 %39, i32* %7
br label %40
40: ; preds = %32, %3
%41 = load i32, i32* %7
ret i32 %41
}

LLVM IR (-O2):
define i32 @"lib$extv"(i32* nocapture %0, i8* nocapture %1, i32* nocapture %2) {
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
%6 = load i32, i32* %0
%7 = shl nsw i32 -1, %5
%8 = xor i32 %7, -1
%9 = load i32, i32* %2
%10 = ashr i32 %9, %6
%11 = and i32 %10, %8
%12 = add nsw i32 %5, -1
%13 = shl nuw i32 1, %12
%14 = and i32 %11, %13
%15 = icmp eq i32 %14, 0
%16 = or i32 %10, %7
%17 = select i1 %15, i32 %11, i32 %16
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void compare(long long foo) {
  if (foo < 4294967297LL)
    abort();
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movabs $0x100000001,%rax
cmp    %rax,-0x8(%rbp)
jge    1137 <compare+0x27>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
movabs $0x100000000,%rax
cmp    %rax,%rdi
jle    1120 <compare+0x10>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @compare(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 4294967297
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @compare(i64 %0) {
%2 = icmp slt i64 %0, 4294967297
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GPIOPinWrite(int, int, int /*<<< orphan*/);
void LedSetOff() {
  GPIOPinWrite(0x40025000, 0x00000002 | 0x00000004 | 0x00000008, 0);
}


x86 assembly (clang, -O0):
<LedSetOff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40025000,%edi
mov    $0xe,%esi
xor    %edx,%edx
call   1030 <GPIOPinWrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedSetOff>:
mov    $0x40025000,%edi
mov    $0xe,%esi
xor    %edx,%edx
jmp    1030 <GPIOPinWrite@plt>

LLVM IR (-O0):
define void @LedSetOff() {
%1 = call i32 @GPIOPinWrite(i32 1073893376, i32 14, i32 0)
ret void
}

LLVM IR (-O2):
define void @LedSetOff() {
%1 = tail call i32 @GPIOPinWrite(i32 1073893376, i32 14, i32 0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
uint16_t bmin_uint16(uint16_t a, uint16_t b) { return (a < b ? a : b); }


x86 assembly (clang, -O0):
<bmin_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <bmin_uint16+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <bmin_uint16+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmin_uint16>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @bmin_uint16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @bmin_uint16(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Type definitions */
struct avl_tree {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ *store_exposed_node_avltree(struct avl_tree *, char *,
                                               void *);
int store_named_node_avltree(struct avl_tree *t, char *key, void *data) {
  if (store_exposed_node_avltree(t, key, data) == NULL) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<store_named_node_avltree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <store_exposed_node_avltree@plt>
cmp    $0x0,%rax
jne    114b <store_named_node_avltree+0x3b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1152 <store_named_node_avltree+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<store_named_node_avltree>:
push   %rax
call   1030 <store_exposed_node_avltree@plt>
cmp    $0x1,%rax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.avl_tree = type { i32 }
define i32 @store_named_node_avltree(%struct.avl_tree* %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.avl_tree*
%6 = alloca i8*
%7 = alloca i8*
store %struct.avl_tree* %0, %struct.avl_tree** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load %struct.avl_tree*, %struct.avl_tree** %5
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = call i32* @store_exposed_node_avltree(%struct.avl_tree* %8, i8* %9, i8* %10)
%12 = icmp eq i32* %11, null
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %15
14: ; preds = %3
store i32 0, i32* %4
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
%struct.avl_tree = type { i32 }
define i32 @store_named_node_avltree(%struct.avl_tree* %0, i8* %1, i8* %2) {
%4 = tail call i32* @store_exposed_node_avltree(%struct.avl_tree* %0, i8* %1, i8* %2)
%5 = icmp eq i32* %4, null
%6 = sext i1 %5 to i32
ret i32 %6
}
int main(void) {
  ("3.0" ? "a" : "b");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"3.0\00"
@.str.1 = [2 x i8] c"a\00"
@.str.2 = [2 x i8] c"b\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
unsigned int REG_SPI_BASE(unsigned int);
__attribute__((always_)) __attribute__((flatten)) unsigned int
SPI_USER1(unsigned int i) {
  return (REG_SPI_BASE(i) + 0x20);
}


x86 assembly (clang, -O0):
<SPI_USER1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <REG_SPI_BASE@plt>
add    $0x20,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_USER1>:
push   %rax
call   1030 <REG_SPI_BASE@plt>
add    $0x20,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SPI_USER1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @REG_SPI_BASE(i32 %3)
%5 = add i32 %4, 32
ret i32 %5
}

LLVM IR (-O2):
define i32 @SPI_USER1(i32 %0) {
%2 = tail call i32 @REG_SPI_BASE(i32 %0)
%3 = add i32 %2, 32
ret i32 %3
}
/* Variables and functions */
int sunxi_gpio_output(unsigned int, int);
int /*<<< orphan*/ sunxi_gpio_set_cfgpin(unsigned int, int);
int gpio_direction_output(unsigned gpio, int value) {
  sunxi_gpio_set_cfgpin(gpio, (1));
  return sunxi_gpio_output(gpio, value);
}


x86 assembly (clang, -O0):
<gpio_direction_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <sunxi_gpio_set_cfgpin@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <sunxi_gpio_output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_direction_output>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x1,%esi
call   1030 <sunxi_gpio_set_cfgpin@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <sunxi_gpio_output@plt>

LLVM IR (-O0):
define i32 @gpio_direction_output(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @sunxi_gpio_set_cfgpin(i32 %5, i32 1)
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @sunxi_gpio_output(i32 %7, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @gpio_direction_output(i32 %0, i32 %1) {
%3 = tail call i32 @sunxi_gpio_set_cfgpin(i32 %0, i32 1)
%4 = tail call i32 @sunxi_gpio_output(i32 %0, i32 %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ pmu_adc_enable();
int /*<<< orphan*/ pmu_adc_reset_setting();
int /*<<< orphan*/ pmu_prep_sar_ratio();
int /*<<< orphan*/ pmu_reg_write(int, int);
int /*<<< orphan*/ pmu_set_clk_init();
void pmu_init() {
  pmu_set_clk_init();
  pmu_reg_write(0x45, ((0x00 << 9) | (0x00 << 8) | (0x48 << 0)));
  pmu_reg_write(0x10, ((0x70A20 << 4) | (1 << 0)));
  pmu_adc_reset_setting();
  pmu_adc_enable();
  pmu_prep_sar_ratio();
  pmu_reg_write(0x47, ((1 << 19) | (0 << 18) | (0 << 17) | (0 << 16) |
                       (1 << 15) | (1 << 14) | (1 << 13) | (0 << 11) |
                       (2 << 8) | (4 << 5) | (2 << 2) | (3)));
}


x86 assembly (clang, -O0):
<pmu_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <pmu_set_clk_init@plt>
mov    $0x45,%edi
mov    $0x48,%esi
call   1040 <pmu_reg_write@plt>
mov    $0x10,%edi
mov    $0x70a201,%esi
call   1040 <pmu_reg_write@plt>
mov    $0x0,%al
call   1060 <pmu_adc_reset_setting@plt>
mov    $0x0,%al
call   1050 <pmu_adc_enable@plt>
mov    $0x0,%al
call   1030 <pmu_prep_sar_ratio@plt>
mov    $0x47,%edi
mov    $0x8e28b,%esi
call   1040 <pmu_reg_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_init>:
push   %rax
xor    %eax,%eax
call   1070 <pmu_set_clk_init@plt>
mov    $0x45,%edi
mov    $0x48,%esi
call   1040 <pmu_reg_write@plt>
mov    $0x10,%edi
mov    $0x70a201,%esi
call   1040 <pmu_reg_write@plt>
xor    %eax,%eax
call   1060 <pmu_adc_reset_setting@plt>
xor    %eax,%eax
call   1050 <pmu_adc_enable@plt>
xor    %eax,%eax
call   1030 <pmu_prep_sar_ratio@plt>
mov    $0x47,%edi
mov    $0x8e28b,%esi
pop    %rax
jmp    1040 <pmu_reg_write@plt>

LLVM IR (-O0):
define void @pmu_init() {
%1 = call i32 (...) @pmu_set_clk_init()
%2 = call i32 @pmu_reg_write(i32 69, i32 72)
%3 = call i32 @pmu_reg_write(i32 16, i32 7381505)
%4 = call i32 (...) @pmu_adc_reset_setting()
%5 = call i32 (...) @pmu_adc_enable()
%6 = call i32 (...) @pmu_prep_sar_ratio()
%7 = call i32 @pmu_reg_write(i32 71, i32 582283)
ret void
}

LLVM IR (-O2):
define void @pmu_init() {
%1 = tail call i32 (...) @pmu_set_clk_init()
%2 = tail call i32 @pmu_reg_write(i32 69, i32 72)
%3 = tail call i32 @pmu_reg_write(i32 16, i32 7381505)
%4 = tail call i32 (...) @pmu_adc_reset_setting()
%5 = tail call i32 (...) @pmu_adc_enable()
%6 = tail call i32 (...) @pmu_prep_sar_ratio()
%7 = tail call i32 @pmu_reg_write(i32 71, i32 582283)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, ("Usage: %s [-v specification] variable_name [pathname]\n"),
          "foo");
  fprintf(stderr, ("       %s -a [pathname]\n"), "foo");
  exit(2);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
lea    0xefc(%rip),%rdx
call   1030 <fprintf@plt>
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeeb(%rip),%rsi
lea    0xee0(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %r14
push   %rbx
push   %rax
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
lea    0xecc(%rip),%rsi
lea    0xefc(%rip),%r14
mov    %r14,%rdx
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xeef(%rip),%rsi
mov    %r14,%rdx
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [55 x i8] c"Usage: %s [-v specification] variable_name [pathname]\0A\00"
@.str.1 = [4 x i8] c"foo\00"
@.str.2 = [25 x i8] c" %s -a [pathname]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [55 x i8] c"Usage: %s [-v specification] variable_name [pathname]\0A\00"
@.str.1 = [4 x i8] c"foo\00"
@.str.2 = [25 x i8] c" %s -a [pathname]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 2)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ reqbuf;

/* Variables and functions */
int ph_rpc(char *);
int /*<<< orphan*/ snprintf(char *, int, char *, int);
int phHoldCall(int cid) {
  char reqbuf[64];
  snprintf(reqbuf, sizeof(reqbuf), "HOLD CID=%d", cid);
  return ph_rpc(reqbuf);
}


x86 assembly (clang, -O0):
<phHoldCall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0x40,%esi
lea    0xec2(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x50(%rbp),%rdi
call   1040 <ph_rpc@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phHoldCall>:
push   %rbx
sub    $0x40,%rsp
mov    %edi,%ecx
lea    0xed2(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x40,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <ph_rpc@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"HOLD CID=%d\00"
define i32 @phHoldCall(i32 %0) {
%2 = alloca i32
%3 = alloca [64 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* %2
%6 = call i32 @snprintf(i8* %4, i32 64, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%8 = call i32 @ph_rpc(i8* %7)
ret i32 %8
}

LLVM IR (-O2):
@.str = [12 x i8] c"HOLD CID=%d\00"
define i32 @phHoldCall(i32 %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 64, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = call i32 @ph_rpc(i8* %3)
ret i32 %5
}
/* Variables and functions */
int LOG_DEBUG;
int LOG_EMERG;
int /*<<< orphan*/ printf(char *, int, int);
int main(int argc, char *argv[]) { printf("%d %d\n", LOG_DEBUG, LOG_EMERG); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
mov    0x2eb9(%rip),%rax
mov    (%rax),%edx
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    0x2ec7(%rip),%rax
mov    (%rax),%edx
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
@LOG_DEBUG = global i32 0
@LOG_EMERG = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* @LOG_DEBUG
%6 = load i32, i32* @LOG_EMERG
%7 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
@LOG_DEBUG = global i32 0
@LOG_EMERG = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @LOG_DEBUG
%4 = load i32, i32* @LOG_EMERG
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ cbreak();
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ keypad(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ noecho();
int /*<<< orphan*/ stdscr;
void ncurs_init() {
  initscr();
  cbreak();
  noecho();
  keypad(stdscr, TRUE);
}


x86 assembly (clang, -O0):
<ncurs_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initscr@plt>
mov    $0x0,%al
call   1030 <cbreak@plt>
mov    $0x0,%al
call   1060 <noecho@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
mov    0x2e77(%rip),%rax
mov    (%rax),%esi
call   1040 <keypad@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ncurs_init>:
push   %rax
xor    %eax,%eax
call   1050 <initscr@plt>
xor    %eax,%eax
call   1030 <cbreak@plt>
xor    %eax,%eax
call   1060 <noecho@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
mov    0x2e7a(%rip),%rax
mov    (%rax),%esi
pop    %rax
jmp    1040 <keypad@plt>

LLVM IR (-O0):
@stdscr = global i32 0
@TRUE = global i32 0
define void @ncurs_init() {
%1 = call i32 (...) @initscr()
%2 = call i32 (...) @cbreak()
%3 = call i32 (...) @noecho()
%4 = load i32, i32* @stdscr
%5 = load i32, i32* @TRUE
%6 = call i32 @keypad(i32 %4, i32 %5)
ret void
}

LLVM IR (-O2):
@stdscr = global i32 0
@TRUE = global i32 0
define void @ncurs_init() {
%1 = tail call i32 (...) @initscr()
%2 = tail call i32 (...) @cbreak()
%3 = tail call i32 (...) @noecho()
%4 = load i32, i32* @stdscr
%5 = load i32, i32* @TRUE
%6 = tail call i32 @keypad(i32 %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr,
          "handle_core: userspace core-file handler for Linux\n-d "
          "<core_dir>			Directory to write core files into\n-e "
          "<executable-name>		Name of the executable that is core "
          "dumping\n-h				This help message\n-m "
          "<max_cores>			This maximum number of core files to "
          "allow\n				before deleting older core "
          "files.\n-s <email_command>		Send email using "
          "email_command.\n				Example: -s "
          "'/usr/sbin/sendmail -t sysadmin@example.com'\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [404 x i8] c"handle_core: userspace core-file handler for Linux\0A-d <core_dir>\09\09\09Directory to write core files into\0A-e <executable-name>\09\09Name of the executable that is core dumping\0A-h\09\09\09\09This help message\0A-m <max_cores>\09\09\09This maximum number of core files to allow\0A\09\09\09\09before deleting older core files.\0A-s <email_command>\09\09Send email using email_command.\0A\09\09\09\09Example: -s '/usr/sbin/sendmail -t sysadmin@example.com'\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([404 x i8], [404 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [404 x i8] c"handle_core: userspace core-file handler for Linux\0A-d <core_dir>\09\09\09Directory to write core files into\0A-e <executable-name>\09\09Name of the executable that is core dumping\0A-h\09\09\09\09This help message\0A-m <max_cores>\09\09\09This maximum number of core files to allow\0A\09\09\09\09before deleting older core files.\0A-s <email_command>\09\09Send email using email_command.\0A\09\09\09\09Example: -s '/usr/sbin/sendmail -t sysadmin@example.com'\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([404 x i8], [404 x i8]* @.str, i64 0, i64 0))
ret void
}
puttrm(c) char c;
{
  conoc(c);
  return (0);
}


x86 assembly (clang, -O0):
<puttrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
mov    $0x0,%al
call   1030 <conoc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puttrm>:
push   %rax
movsbl %dil,%edi
xor    %eax,%eax
call   1030 <conoc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @puttrm(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = call i32 (i32, ...) bitcast (i32 (...)* @conoc to i32 (i32, ...)*)(i32 %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @puttrm(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @conoc to i32 (i32, ...)*)(i32 %3)
ret i32 0
}
int increment_counter_2() {
  static int counter = 0;
#pragma omp threadprivate(counter)
  counter++;
  return (counter);
}


x86 assembly (clang, -O0):
<increment_counter_2>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f11(%rip)
mov    0x2f0b(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<increment_counter_2>:
mov    0x2f1e(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f15(%rip)
ret

LLVM IR (-O0):
@increment_counter_2.counter = internal global i32 0
define i32 @increment_counter_2() {
%1 = load i32, i32* @increment_counter_2.counter
%2 = add nsw i32 %1, 1
store i32 %2, i32* @increment_counter_2.counter
%3 = load i32, i32* @increment_counter_2.counter
ret i32 %3
}

LLVM IR (-O2):
@increment_counter_2.counter = internal unnamed_addr global i32 0
define i32 @increment_counter_2() {
%1 = load i32, i32* @increment_counter_2.counter
%2 = add nsw i32 %1, 1
store i32 %2, i32* @increment_counter_2.counter
ret i32 %2
}
int comp_int(int *i, int *j) { return *i - *j; }


x86 assembly (clang, -O0):
<comp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp_int>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @comp_int(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @comp_int(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = sub nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
__attribute__((noreturn)) void die(const char *msg) {
  fputs(msg, stderr);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ uart_tx_one_char(char);
void stub_tx_one_char(char c) { uart_tx_one_char(c); }


x86 assembly (clang, -O0):
<stub_tx_one_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <uart_tx_one_char@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stub_tx_one_char>:
jmp    1030 <uart_tx_one_char@plt>

LLVM IR (-O0):
define void @stub_tx_one_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @uart_tx_one_char(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @stub_tx_one_char(i8 signext %0) {
%2 = tail call i32 @uart_tx_one_char(i8 signext %0)
ret void
}
int hasarg(const char *buf) { return buf[1] == ' ' && buf[1] != '\0'; }


x86 assembly (clang, -O0):
<hasarg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%ecx
xor    %eax,%eax
cmp    $0x20,%ecx
mov    %al,-0x9(%rbp)
jne    112f <hasarg+0x2f>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hasarg>:
xor    %eax,%eax
cmpb   $0x20,0x1(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @hasarg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 32
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br label %14
14: ; preds = %8, %1
%15 = phi i1 [ false, %1 ], [ %13, %8 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @hasarg(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 32
%5 = zext i1 %4 to i32
ret i32 %5
}
void _XtCopyFromArg() {}


x86 assembly (clang, -O0):
<_XtCopyFromArg>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_XtCopyFromArg>:
ret

LLVM IR (-O0):
define void @_XtCopyFromArg() {
ret void
}

LLVM IR (-O2):
define void @_XtCopyFromArg() {
ret void
}
/* Variables and functions */
scalar_t__ starts_withn(char const *, char const *, size_t const);
size_t strlen(char const *);
int skip_prefix(const char **str, const char prefix[]) {
  const size_t prefix_len = strlen(prefix);
  if (starts_withn(*str, prefix, prefix_len)) {
    *str += prefix_len;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<skip_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <starts_withn@plt>
cmp    $0x0,%rax
je     1175 <skip_prefix+0x55>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    117c <skip_prefix+0x5c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_prefix>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %rax,%r15
mov    (%r14),%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1040 <starts_withn@plt>
test   %rax,%rax
je     1153 <skip_prefix+0x33>
add    %r15,(%r14)
mov    $0x1,%eax
jmp    1155 <skip_prefix+0x35>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @skip_prefix(i8** %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i64
store i8** %0, i8*** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %6
%9 = load i8**, i8*** %4
%10 = load i8*, i8** %9
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i64 @starts_withn(i8* %10, i8* %11, i64 %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %2
%16 = load i64, i64* %6
%17 = load i8**, i8*** %4
%18 = load i8*, i8** %17
%19 = getelementptr inbounds i8, i8* %18, i64 %16
store i8* %19, i8** %17
store i32 1, i32* %3
br label %21
20: ; preds = %2
store i32 0, i32* %3
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @skip_prefix(i8** nocapture %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = load i8*, i8** %0
%5 = tail call i64 @starts_withn(i8* %4, i8* %1, i64 %3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i8*, i8** %0
%9 = getelementptr inbounds i8, i8* %8, i64 %3
store i8* %9, i8** %0
br label %10
10: ; preds = %2, %7
%11 = phi i32 [ 1, %7 ], [ 0, %2 ]
ret i32 %11
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
char int_to_hex_digit(uint8_t x) { return "0123456789ABCDEF"[x & 0xF]; }


x86 assembly (clang, -O0):
<int_to_hex_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
movslq %eax,%rcx
lea    0xee9(%rip),%rax
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_hex_digit>:
and    $0xf,%edi
lea    0xef6(%rip),%rax
mov    (%rdi,%rax,1),%al
ret

LLVM IR (-O0):
@.str = [17 x i8] c"0123456789ABCDEF\00"
define signext i8 @int_to_hex_digit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds [17 x i8], [17 x i8]* @.str, i64 0, i64 %5
%7 = load i8, i8* %6
ret i8 %7
}

LLVM IR (-O2):
@.str = [17 x i8] c"0123456789ABCDEF\00"
define signext i8 @int_to_hex_digit(i32 %0) {
%2 = and i32 %0, 15
%3 = zext i32 %2 to i64
%4 = getelementptr inbounds [17 x i8], [17 x i8]* @.str, i64 0, i64 %3
%5 = load i8, i8* %4
ret i8 %5
}
void initialize_info_signal_handler(void) {}


x86 assembly (clang, -O0):
<initialize_info_signal_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_info_signal_handler>:
ret

LLVM IR (-O0):
define void @initialize_info_signal_handler() {
ret void
}

LLVM IR (-O2):
define void @initialize_info_signal_handler() {
ret void
}
float Quint__easeIn(float t, float b, float c, float d, float p0, float p1) {
  return c * (t /= d) * t * t * t * t + b;
}


x86 assembly (clang, -O0):
<Quint__easeIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
divss  %xmm2,%xmm1
movss  %xmm1,-0x4(%rbp)
mulss  %xmm1,%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Quint__easeIn>:
divss  %xmm3,%xmm0
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Quint__easeIn(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %9
%14 = load float, float* %10
%15 = load float, float* %7
%16 = fdiv float %15, %14
store float %16, float* %7
%17 = fmul float %13, %16
%18 = load float, float* %7
%19 = fmul float %17, %18
%20 = load float, float* %7
%21 = fmul float %19, %20
%22 = load float, float* %7
%23 = fmul float %21, %22
%24 = load float, float* %7
%25 = load float, float* %8
%26 = call float @llvm.fmuladd.f32(float %23, float %24, float %25)
ret float %26
}

LLVM IR (-O2):
define float @Quint__easeIn(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fdiv float %0, %3
%8 = fmul float %7, %2
%9 = fmul float %7, %8
%10 = fmul float %7, %9
%11 = fmul float %7, %10
%12 = tail call float @llvm.fmuladd.f32(float %11, float %7, float %1)
ret float %12
}
void foo2f() {}


x86 assembly (clang, -O0):
<foo2f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2f>:
ret

LLVM IR (-O0):
define void @foo2f() {
ret void
}

LLVM IR (-O2):
define void @foo2f() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Finalize();
int /*<<< orphan*/ Initialize();
int /*<<< orphan*/ RunApplicationEventLoop();
void main(void) {
  Initialize();
  RunApplicationEventLoop();
  Finalize();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <Initialize@plt>
mov    $0x0,%al
call   1040 <RunApplicationEventLoop@plt>
mov    $0x0,%al
call   1030 <Finalize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <Initialize@plt>
xor    %eax,%eax
call   1040 <RunApplicationEventLoop@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <Finalize@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @Initialize()
%2 = call i32 (...) @RunApplicationEventLoop()
%3 = call i32 (...) @Finalize()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @Initialize()
%2 = tail call i32 (...) @RunApplicationEventLoop()
%3 = tail call i32 (...) @Finalize()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ is_prime(unsigned long);
unsigned long next_prime(unsigned long candidate) {
  if (candidate < 10)
    candidate = 10;
  candidate |= 1;
  while (!is_prime(candidate))
    candidate += 2;
  return candidate;
}


x86 assembly (clang, -O0):
<next_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0xa,-0x8(%rbp)
jae    112f <next_prime+0x1f>
movq   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%rax
or     $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <is_prime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1159 <next_prime+0x49>
jmp    116a <next_prime+0x5a>
mov    -0x8(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x8(%rbp)
jmp    113b <next_prime+0x2b>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_prime>:
push   %rbx
cmp    $0xb,%rdi
mov    $0xa,%ebx
cmovae %rdi,%rbx
or     $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %rbx,%rdi
call   1030 <is_prime@plt>
add    $0x2,%rbx
test   %eax,%eax
je     1130 <next_prime+0x20>
add    $0xfffffffffffffffe,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @next_prime(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ult i64 %3, 10
br i1 %4, label %5, label %6
5: ; preds = %1
store i64 10, i64* %2
br label %6
6: ; preds = %5, %1
%7 = load i64, i64* %2
%8 = or i64 %7, 1
store i64 %8, i64* %2
br label %9
9: ; preds = %14, %6
%10 = load i64, i64* %2
%11 = call i32 @is_prime(i64 %10)
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %17
14: ; preds = %9
%15 = load i64, i64* %2
%16 = add i64 %15, 2
store i64 %16, i64* %2
br label %9
17: ; preds = %9
%18 = load i64, i64* %2
ret i64 %18
}

LLVM IR (-O2):
define i64 @next_prime(i64 %0) {
%2 = icmp ugt i64 %0, 10
%3 = select i1 %2, i64 %0, i64 10
%4 = or i64 %3, 1
br label %5
5: ; preds = %5, %1
%6 = phi i64 [ %4, %1 ], [ %9, %5 ]
%7 = tail call i32 @is_prime(i64 %6)
%8 = icmp eq i32 %7, 0
%9 = add i64 %6, 2
br i1 %8, label %5, label %10
10: ; preds = %5
ret i64 %6
}
int hiddenFunction(void) { return 42; }


x86 assembly (clang, -O0):
<hiddenFunction>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hiddenFunction>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @hiddenFunction() {
ret i32 42
}

LLVM IR (-O2):
define i32 @hiddenFunction() {
ret i32 42
}
void epb2dt(epoch, date, time) double epoch;
double *date;
double *time;
{
  double dj;
  dj = epb2jd(epoch);
  jd2dt(dj, date, time);
}


x86 assembly (clang, -O0):
<epb2dt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%al
call   1030 <epb2jd@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x1,%al
call   1040 <jd2dt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epb2dt>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x1,%al
call   1030 <epb2jd@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x1,%al
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <jd2dt@plt>

LLVM IR (-O0):
define void @epb2dt(double %0, double* %1, double* %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca double*
%7 = alloca double
store double %0, double* %4
store double* %1, double** %5
store double* %2, double** %6
%8 = load double, double* %4
%9 = call i32 (double, ...) bitcast (i32 (...)* @epb2jd to i32 (double, ...)*)(double %8)
%10 = sitofp i32 %9 to double
store double %10, double* %7
%11 = load double, double* %7
%12 = load double*, double** %5
%13 = load double*, double** %6
%14 = call i32 (double, double*, double*, ...) bitcast (i32 (...)* @jd2dt to i32 (double, double*, double*, ...)*)(double %11, double* %12, double* %13)
ret void
}

LLVM IR (-O2):
define void @epb2dt(double %0, double* %1, double* %2) {
%4 = tail call i32 (double, ...) bitcast (i32 (...)* @epb2jd to i32 (double, ...)*)(double %0)
%5 = sitofp i32 %4 to double
%6 = tail call i32 (double, double*, double*, ...) bitcast (i32 (...)* @jd2dt to i32 (double, double*, double*, ...)*)(double %5, double* %1, double* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__20__IO__toggle();
void LedsP__Led2__toggle(void) { HplAtm128GeneralIOPinP__20__IO__toggle(); }


x86 assembly (clang, -O0):
<LedsP__Led2__toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__20__IO__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Led2__toggle>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__20__IO__toggle@plt>

LLVM IR (-O0):
define void @LedsP__Led2__toggle() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__20__IO__toggle()
ret void
}

LLVM IR (-O2):
define void @LedsP__Led2__toggle() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__20__IO__toggle()
ret void
}
int test_imm_F9int64_highword_reg(long long val) {
  return ((val >> 32) & (0xF9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F9int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xf9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F9int64_highword_reg>:
movabs $0xf900000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F9int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 249
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F9int64_highword_reg(i64 %0) {
%2 = and i64 %0, 1069446856704
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
void YabThreadSleep(void) {}


x86 assembly (clang, -O0):
<YabThreadSleep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<YabThreadSleep>:
ret

LLVM IR (-O0):
define void @YabThreadSleep() {
ret void
}

LLVM IR (-O2):
define void @YabThreadSleep() {
ret void
}
int f(int y, int x) {
  int a = x | y;
  return a & x;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
or     -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = or i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = and i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 returned %1) {
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ standard_command(int, int, int, char **);
void two_variables_two_arguments_command(int opcode_byte, char **arguments) {
  standard_command(opcode_byte, 2, 2, arguments);
}


x86 assembly (clang, -O0):
<two_variables_two_arguments_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rcx
mov    $0x2,%edx
mov    %edx,%esi
call   1030 <standard_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<two_variables_two_arguments_command>:
mov    %rsi,%rcx
mov    $0x2,%esi
mov    $0x2,%edx
jmp    1030 <standard_command@plt>

LLVM IR (-O0):
define void @two_variables_two_arguments_command(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @standard_command(i32 %5, i32 2, i32 2, i8** %6)
ret void
}

LLVM IR (-O2):
define void @two_variables_two_arguments_command(i32 %0, i8** %1) {
%3 = tail call i32 @standard_command(i32 %0, i32 2, i32 2, i8** %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_after_init();
int /*<<< orphan*/ test_after_skipping_everything();
int main(void) {
  test_after_init();
  test_after_skipping_everything();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_after_init@plt>
mov    $0x0,%al
call   1040 <test_after_skipping_everything@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_after_init@plt>
xor    %eax,%eax
call   1040 <test_after_skipping_everything@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_after_init()
%3 = call i32 (...) @test_after_skipping_everything()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_after_init()
%2 = tail call i32 (...) @test_after_skipping_everything()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ParamWrite(int, int);
void init_app_max6682() {
  ParamWrite(0x0000, 0x0000);
  ParamWrite(0x0001, 0x0000);
  ParamWrite(0x0002, 0x0000);
  ParamWrite(0x0003, 0x000A);
  ParamWrite(0x0004, 0x000A);
}


x86 assembly (clang, -O0):
<init_app_max6682>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <ParamWrite@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <ParamWrite@plt>
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <ParamWrite@plt>
mov    $0x3,%edi
mov    $0xa,%esi
call   1030 <ParamWrite@plt>
mov    $0x4,%edi
mov    $0xa,%esi
call   1030 <ParamWrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_app_max6682>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <ParamWrite@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <ParamWrite@plt>
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <ParamWrite@plt>
mov    $0x3,%edi
mov    $0xa,%esi
call   1030 <ParamWrite@plt>
mov    $0x4,%edi
mov    $0xa,%esi
pop    %rax
jmp    1030 <ParamWrite@plt>

LLVM IR (-O0):
define void @init_app_max6682() {
%1 = call i32 @ParamWrite(i32 0, i32 0)
%2 = call i32 @ParamWrite(i32 1, i32 0)
%3 = call i32 @ParamWrite(i32 2, i32 0)
%4 = call i32 @ParamWrite(i32 3, i32 10)
%5 = call i32 @ParamWrite(i32 4, i32 10)
ret void
}

LLVM IR (-O2):
define void @init_app_max6682() {
%1 = tail call i32 @ParamWrite(i32 0, i32 0)
%2 = tail call i32 @ParamWrite(i32 1, i32 0)
%3 = tail call i32 @ParamWrite(i32 2, i32 0)
%4 = tail call i32 @ParamWrite(i32 3, i32 10)
%5 = tail call i32 @ParamWrite(i32 4, i32 10)
ret void
}
void Cassette_Write(unsigned long NopsPassed, unsigned long State) {}


x86 assembly (clang, -O0):
<Cassette_Write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cassette_Write>:
ret

LLVM IR (-O0):
define void @Cassette_Write(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @Cassette_Write(i64 %0, i64 %1) {
ret void
}