xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ SYS_getrandom;
int syscall(int /*<<< orphan*/, void *, size_t, int /*<<< orphan*/);
bool random_bytes(void *buf, size_t len) {
  int n;
  n = syscall(SYS_getrandom, buf, len, 0);
  if (n == -1) {
    return false;
  } else if (n < len) {
    return false;
  }
  return true;
}


x86 assembly (clang, -O0):
<random_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <syscall@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xffffffff,-0x1c(%rbp)
jne    1151 <random_bytes+0x41>
movl   $0x0,-0x4(%rbp)
jmp    1177 <random_bytes+0x67>
movslq -0x1c(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    116b <random_bytes+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    1177 <random_bytes+0x67>
jmp    1170 <random_bytes+0x60>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_bytes>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rdx
xor    %ecx,%ecx
call   1030 <syscall@plt>
cmp    $0xffffffff,%eax
setne  %cl
cltq
cmp    %rbx,%rax
setae  %al
and    %cl,%al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
@SYS_getrandom = global i32 0
define i32 @random_bytes(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i32, i32* @SYS_getrandom
%8 = load i8*, i8** %4
%9 = load i64, i64* %5
%10 = call i32 @syscall(i32 %7, i8* %8, i64 %9, i32 0)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %22
14: ; preds = %2
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = load i64, i64* %5
%18 = icmp ult i64 %16, %17
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %3
br label %22
20: ; preds = %14
br label %21
21: ; preds = %20
store i32 1, i32* %3
br label %22
22: ; preds = %21, %19, %13
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
@SYS_getrandom = global i32 0
define i32 @random_bytes(i8* %0, i64 %1) {
%3 = load i32, i32* @SYS_getrandom
%4 = tail call i32 @syscall(i32 %3, i8* %0, i64 %1, i32 0)
%5 = icmp ne i32 %4, -1
%6 = sext i32 %4 to i64
%7 = icmp uge i64 %6, %1
%8 = and i1 %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
struct nb_histogram {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct nb_histogram *);
void nb_histogram_delete(struct nb_histogram *hist) { free(hist); }


x86 assembly (clang, -O0):
<nb_histogram_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nb_histogram_delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.nb_histogram = type { i32 }
define void @nb_histogram_delete(%struct.nb_histogram* %0) {
%2 = alloca %struct.nb_histogram*
store %struct.nb_histogram* %0, %struct.nb_histogram** %2
%3 = load %struct.nb_histogram*, %struct.nb_histogram** %2
%4 = call i32 @free(%struct.nb_histogram* %3)
ret void
}

LLVM IR (-O2):
%struct.nb_histogram = type { i32 }
define void @nb_histogram_delete(%struct.nb_histogram* nocapture %0) {
%2 = tail call i32 @free(%struct.nb_histogram* %0)
ret void
}
/* Type definitions */
struct event_loop {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void beat1000(struct event_loop *loop, int id, void *data) {
  printf("heartbeat every 1s\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
%struct.event_loop = type { i32 }
@.str = [20 x i8] c"heartbeat every 1s\0A\00"
define void @beat1000(%struct.event_loop* %0, i32 %1, i8* %2) {
%4 = alloca %struct.event_loop*
%5 = alloca i32
%6 = alloca i8*
store %struct.event_loop* %0, %struct.event_loop** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.event_loop = type { i32 }
@str = [19 x i8] c"heartbeat every 1s\00"
define void @beat1000(%struct.event_loop* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int rtl_vasnprintf(char **, int /*<<< orphan*/, char const *,
                   int /*<<< orphan*/);
int rtl_vasprintf(char **buf, const char *format, va_list arg) {
  return rtl_vasnprintf(buf, 0, format, arg);
}


x86 assembly (clang, -O0):
<rtl_vasprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %esi,%esi
call   1030 <rtl_vasnprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtl_vasprintf>:
mov    %edx,%ecx
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <rtl_vasnprintf@plt>

LLVM IR (-O0):
define i32 @rtl_vasprintf(i8** %0, i8* %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @rtl_vasnprintf(i8** %7, i32 0, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @rtl_vasprintf(i8** %0, i8* %1, i32 %2) {
%4 = tail call i32 @rtl_vasnprintf(i8** %0, i32 0, i8* %1, i32 %2)
ret i32 %4
}
void __DSVERIFIER_assume(_Bool expression) {}


x86 assembly (clang, -O0):
<__DSVERIFIER_assume>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
and    $0x1,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DSVERIFIER_assume>:
ret

LLVM IR (-O0):
define void @__DSVERIFIER_assume(i1 zeroext %0) {
%2 = alloca i8
%3 = zext i1 %0 to i8
store i8 %3, i8* %2
ret void
}

LLVM IR (-O2):
define void @__DSVERIFIER_assume(i1 zeroext %0) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _SSIBaseValid(int);
void SSIDisable(uint32_t ui32Base) {
  ASSERT(_SSIBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x00000004))) &= ~(0x00000002);
}


x86 assembly (clang, -O0):
<SSIDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_SSIBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffd,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDisable>:
push   %rbx
mov    %edi,%ebx
call   1030 <_SSIBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rax
andl   $0xfffffffd,0x4(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @SSIDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_SSIBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 4
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, -3
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @SSIDisable(i32 %0) {
%2 = tail call i32 @_SSIBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 4
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -3
store volatile i32 %8, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ revbin64_test();
int /*<<< orphan*/ revbin_test();
int main(int argc, char *argv[]) {
  revbin_test();
  revbin64_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <revbin_test@plt>
mov    $0x0,%al
call   1030 <revbin64_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <revbin_test@plt>
xor    %eax,%eax
call   1030 <revbin64_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @revbin_test()
%7 = call i32 (...) @revbin64_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @revbin_test()
%4 = tail call i32 (...) @revbin64_test()
ret i32 0
}
int greater_than4(void *i) {
  if (*(int *)i > 4) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<greater_than4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x4,(%rax)
jle    1121 <greater_than4+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1128 <greater_than4+0x28>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<greater_than4>:
xor    %eax,%eax
cmpl   $0x5,(%rdi)
setge  %al
ret

LLVM IR (-O0):
define i32 @greater_than4(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %6, 4
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @greater_than4(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 4
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
float __ieee754_logf(int);
void benchmark(void) {
  volatile float result = 0;
  result = __ieee754_logf(2);
  result = __ieee754_logf(3);
  result = __ieee754_logf(4);
  result = __ieee754_logf(5);
  result = __ieee754_logf(6);
}


x86 assembly (clang, -O0):
<benchmark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,-0x4(%rbp)
mov    $0x3,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,-0x4(%rbp)
mov    $0x6,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<benchmark>:
push   %rax
movl   $0x0,0x4(%rsp)
mov    $0x2,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,0x4(%rsp)
mov    $0x3,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,0x4(%rsp)
mov    $0x4,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,0x4(%rsp)
mov    $0x5,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,0x4(%rsp)
mov    $0x6,%edi
call   1030 <__ieee754_logf@plt>
movss  %xmm0,0x4(%rsp)
pop    %rax
ret

LLVM IR (-O0):
define void @benchmark() {
%1 = alloca float
store volatile float 0.000000e+00, float* %1
%2 = call float @__ieee754_logf(i32 2)
store volatile float %2, float* %1
%3 = call float @__ieee754_logf(i32 3)
store volatile float %3, float* %1
%4 = call float @__ieee754_logf(i32 4)
store volatile float %4, float* %1
%5 = call float @__ieee754_logf(i32 5)
store volatile float %5, float* %1
%6 = call float @__ieee754_logf(i32 6)
store volatile float %6, float* %1
ret void
}

LLVM IR (-O2):
define void @benchmark() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
store volatile float 0.000000e+00, float* %1
%3 = tail call float @__ieee754_logf(i32 2)
store volatile float %3, float* %1
%4 = tail call float @__ieee754_logf(i32 3)
store volatile float %4, float* %1
%5 = tail call float @__ieee754_logf(i32 4)
store volatile float %5, float* %1
%6 = tail call float @__ieee754_logf(i32 5)
store volatile float %6, float* %1
%7 = tail call float @__ieee754_logf(i32 6)
store volatile float %7, float* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_node_data(char *, char *, char *, char *);
void fgmvwrite_node_data_(char *nndes, char *x, char *y, char *z) {
  gmvwrite_node_data(nndes, x, y, z);
}


x86 assembly (clang, -O0):
<fgmvwrite_node_data_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <gmvwrite_node_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_node_data_>:
jmp    1030 <gmvwrite_node_data@plt>

LLVM IR (-O0):
define void @fgmvwrite_node_data_(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @gmvwrite_node_data(i8* %9, i8* %10, i8* %11, i8* %12)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_node_data_(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @gmvwrite_node_data(i8* %0, i8* %1, i8* %2, i8* %3)
ret void
}
/* Variables and functions */
double sin(int);
int sqrt(double);
double f(double x) { return (2 + sin(2 * sqrt(x))); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <sqrt@plt>
mov    %eax,%edi
shl    $0x1,%edi
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  0xeb4(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
call   1040 <sqrt@plt>
lea    (%rax,%rax,1),%edi
call   1030 <sin@plt>
addsd  0xeca(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @sqrt(double %3)
%5 = mul nsw i32 2, %4
%6 = call double @sin(i32 %5)
%7 = fadd double 2.000000e+00, %6
ret double %7
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = tail call i32 @sqrt(double %0)
%3 = shl nsw i32 %2, 1
%4 = tail call double @sin(i32 %3)
%5 = fadd double %4, 2.000000e+00
ret double %5
}
/* Variables and functions */
int doubleToRawLongBits(double);
double const longBitsToDouble(int);
__attribute__((always_)) const double removelsb(double d) {
  return longBitsToDouble(doubleToRawLongBits(d) & 0xfffffffffffffffeLL);
}


x86 assembly (clang, -O0):
<removelsb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <doubleToRawLongBits@plt>
cltq
and    $0xfffffffffffffffe,%rax
mov    %eax,%edi
call   1030 <longBitsToDouble@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<removelsb>:
push   %rax
call   1040 <doubleToRawLongBits@plt>
and    $0xfffffffe,%eax
mov    %eax,%edi
pop    %rax
jmp    1030 <longBitsToDouble@plt>

LLVM IR (-O0):
define double @removelsb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @doubleToRawLongBits(double %3)
%5 = sext i32 %4 to i64
%6 = and i64 %5, -2
%7 = trunc i64 %6 to i32
%8 = call double @longBitsToDouble(i32 %7)
ret double %8
}

LLVM IR (-O2):
define double @removelsb(double %0) {
%2 = tail call i32 @doubleToRawLongBits(double %0)
%3 = and i32 %2, -2
%4 = tail call double @longBitsToDouble(i32 %3)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ odroid_xu_gpio_setup_all_output();
int /*<<< orphan*/ odroid_xu_gpio_toggle(int);
int /*<<< orphan*/ print_all_gpio_info();
int main(int argc, char *argv[]) {
  odroid_xu_gpio_setup_all_output();
  print_all_gpio_info();
  odroid_xu_gpio_toggle(27);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <odroid_xu_gpio_setup_all_output@plt>
mov    $0x0,%al
call   1050 <print_all_gpio_info@plt>
mov    $0x1b,%edi
call   1040 <odroid_xu_gpio_toggle@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <odroid_xu_gpio_setup_all_output@plt>
xor    %eax,%eax
call   1050 <print_all_gpio_info@plt>
mov    $0x1b,%edi
call   1040 <odroid_xu_gpio_toggle@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @odroid_xu_gpio_setup_all_output()
%7 = call i32 (...) @print_all_gpio_info()
%8 = call i32 @odroid_xu_gpio_toggle(i32 27)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @odroid_xu_gpio_setup_all_output()
%4 = tail call i32 (...) @print_all_gpio_info()
%5 = tail call i32 @odroid_xu_gpio_toggle(i32 27)
ret i32 0
}
void g_relation_print() {}


x86 assembly (clang, -O0):
<g_relation_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_relation_print>:
ret

LLVM IR (-O0):
define void @g_relation_print() {
ret void
}

LLVM IR (-O2):
define void @g_relation_print() {
ret void
}
/* Variables and functions */
double BLAS_dnormi(int *, double *);
double dnormi(int n, double *x) {
  x++;
  return (BLAS_dnormi(&n, x));
}


x86 assembly (clang, -O0):
<dnormi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x4(%rbp),%rdi
call   1030 <BLAS_dnormi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dnormi>:
push   %rax
mov    %edi,0x4(%rsp)
add    $0x8,%rsi
lea    0x4(%rsp),%rdi
call   1030 <BLAS_dnormi@plt>
pop    %rax
ret

LLVM IR (-O0):
define double @dnormi(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
store i32 %0, i32* %3
store double* %1, double** %4
%5 = load double*, double** %4
%6 = getelementptr inbounds double, double* %5, i32 1
store double* %6, double** %4
%7 = load double*, double** %4
%8 = call double @BLAS_dnormi(i32* %3, double* %7)
ret double %8
}

LLVM IR (-O2):
define double @dnormi(i32 %0, double* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = getelementptr inbounds double, double* %1, i64 1
%5 = call double @BLAS_dnormi(i32* %3, double* %4)
ret double %5
}
/* Variables and functions */
char *realloc(char *, unsigned int);
char *memresize(char *ptr, unsigned int nbytes) {
  return (realloc(ptr, nbytes));
}


x86 assembly (clang, -O0):
<memresize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memresize>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @memresize(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @realloc(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @memresize(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
scalar_t__ test();
int test_file(char *);
int main(int argc, char **argv) {
  if (test())
    return 1;
  if (argc == 1)
    return 0;
  return test_file(argv[1]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <test@plt>
cmp    $0x0,%rax
je     1153 <main+0x33>
movl   $0x1,-0x4(%rbp)
jmp    1179 <main+0x59>
cmpl   $0x1,-0x8(%rbp)
jne    1169 <main+0x49>
movl   $0x0,-0x4(%rbp)
jmp    1179 <main+0x59>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <test_file@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <test@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
jne    1146 <main+0x26>
mov    $0x0,%eax
cmp    $0x1,%ebp
jne    114d <main+0x2d>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    0x8(%rbx),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <test_file@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @test()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %18
9: ; preds = %2
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %3
br label %18
13: ; preds = %9
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 1
%16 = load i8*, i8** %15
%17 = call i32 @test_file(i8* %16)
store i32 %17, i32* %3
br label %18
18: ; preds = %13, %12, %8
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = tail call i64 (...) @test()
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = icmp eq i32 %0, 1
br i1 %6, label %11, label %7
7: ; preds = %5
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i32 @test_file(i8* %9)
br label %11
11: ; preds = %5, %2, %7
%12 = phi i32 [ %10, %7 ], [ 1, %2 ], [ 0, %5 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ preempt_disable();
void preempt_disable_notrace(void) { preempt_disable(); }


x86 assembly (clang, -O0):
<preempt_disable_notrace>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <preempt_disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<preempt_disable_notrace>:
xor    %eax,%eax
jmp    1030 <preempt_disable@plt>

LLVM IR (-O0):
define void @preempt_disable_notrace() {
%1 = call i32 (...) @preempt_disable()
ret void
}

LLVM IR (-O2):
define void @preempt_disable_notrace() {
%1 = tail call i32 (...) @preempt_disable()
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t smpte_hbrmt_get_sample(const uint8_t *p_hbrmt) {
  return p_hbrmt[6] & 0xf;
}


x86 assembly (clang, -O0):
<smpte_hbrmt_get_sample>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpte_hbrmt_get_sample>:
mov    0x18(%rdi),%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @smpte_hbrmt_get_sample(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 6
%5 = load i32, i32* %4
%6 = and i32 %5, 15
ret i32 %6
}

LLVM IR (-O2):
define i32 @smpte_hbrmt_get_sample(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 6
%3 = load i32, i32* %2
%4 = and i32 %3, 15
ret i32 %4
}
void dj_stop_mod(void) {}


x86 assembly (clang, -O0):
<dj_stop_mod>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dj_stop_mod>:
ret

LLVM IR (-O0):
define void @dj_stop_mod() {
ret void
}

LLVM IR (-O2):
define void @dj_stop_mod() {
ret void
}
void nbr_power(char *str, int *power) {
  while (str[*power] != '\0')
    *power = *power + 1;
}


x86 assembly (clang, -O0):
<nbr_power>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq (%rcx),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1138 <nbr_power+0x38>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    110c <nbr_power+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nbr_power>:
movslq (%rsi),%rcx
cmpb   $0x0,(%rdi,%rcx,1)
je     112e <nbr_power+0x2e>
lea    (%rcx,%rdi,1),%rax
add    $0x1,%rax
add    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ecx,(%rsi)
add    $0x1,%ecx
cmpb   $0x0,(%rax)
lea    0x1(%rax),%rax
jne    1120 <nbr_power+0x20>
ret

LLVM IR (-O0):
define void @nbr_power(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
br label %5
5: ; preds = %14, %2
%6 = load i8*, i8** %3
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %5
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = add nsw i32 %16, 1
%18 = load i32*, i32** %4
store i32 %17, i32* %18
br label %5
19: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @nbr_power(i8* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %15, label %8
8: ; preds = %2, %8
%9 = phi i64 [ %10, %8 ], [ %4, %2 ]
%10 = add i64 %9, 1
%11 = trunc i64 %10 to i32
store i32 %11, i32* %1
%12 = getelementptr inbounds i8, i8* %0, i64 %10
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %8
15: ; preds = %8, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sscanf_t01();
int /*<<< orphan*/ sscanf_t02();
int sscanf_main() {
  sscanf_t01();
  sscanf_t02();
  printf("sscanf ok\n");
  return 0;
}


x86 assembly (clang, -O0):
<sscanf_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <sscanf_t01@plt>
mov    $0x0,%al
call   1030 <sscanf_t02@plt>
lea    0xeb7(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sscanf_main>:
push   %rax
xor    %eax,%eax
call   1050 <sscanf_t01@plt>
xor    %eax,%eax
call   1030 <sscanf_t02@plt>
lea    0xeba(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"sscanf ok\0A\00"
define i32 @sscanf_main() {
%1 = call i32 (...) @sscanf_t01()
%2 = call i32 (...) @sscanf_t02()
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [10 x i8] c"sscanf ok\00"
define i32 @sscanf_main() {
%1 = tail call i32 (...) @sscanf_t01()
%2 = tail call i32 (...) @sscanf_t02()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void signed_char_mul_signed_char_unsigned_int(signed char *LHS,
                                              unsigned int RHS) {
  (*LHS) *= RHS;
}


x86 assembly (clang, -O0):
<signed_char_mul_signed_char_unsigned_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
imul   %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_char_mul_signed_char_unsigned_int>:
mov    (%rdi),%al
mul    %sil
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @signed_char_mul_signed_char_unsigned_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = mul i32 %8, %5
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
ret void
}

LLVM IR (-O2):
define void @signed_char_mul_signed_char_unsigned_int(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = trunc i32 %1 to i8
%5 = mul i8 %3, %4
store i8 %5, i8* %0
ret void
}
void INT_Excep_PERIB_INTB204(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB204>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB204>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB204() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB204() {
ret void
}
int main(void) {
  asm("nop\n nop\n call "
      "foo");
  asm("nop\n nop\n call "
      "bar");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
nop
nop
call   1040 <foo@plt>
nop
nop
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
nop
nop
call   1040 <foo@plt>
nop
nop
call   1030 <bar@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "nop\0A nop\0A call foo", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "nop\0A nop\0A call bar", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ GlobalMiniProjZW();
float NDCDepthToWorldSpace_Perspective(float, int /*<<< orphan*/);
float NDCDepthToWorldSpace(float NDCz) {
  return NDCDepthToWorldSpace_Perspective(NDCz, GlobalMiniProjZW());
}


x86 assembly (clang, -O0):
<NDCDepthToWorldSpace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1040 <GlobalMiniProjZW@plt>
movss  -0x8(%rbp),%xmm0
mov    %eax,%edi
call   1030 <NDCDepthToWorldSpace_Perspective@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NDCDepthToWorldSpace>:
push   %rax
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1040 <GlobalMiniProjZW@plt>
movss  0x4(%rsp),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1030 <NDCDepthToWorldSpace_Perspective@plt>

LLVM IR (-O0):
define float @NDCDepthToWorldSpace(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 (...) @GlobalMiniProjZW()
%5 = call float @NDCDepthToWorldSpace_Perspective(float %3, i32 %4)
ret float %5
}

LLVM IR (-O2):
define float @NDCDepthToWorldSpace(float %0) {
%2 = tail call i32 (...) @GlobalMiniProjZW()
%3 = tail call float @NDCDepthToWorldSpace_Perspective(float %0, i32 %2)
ret float %3
}
int init_curPos() { return 0; }


x86 assembly (clang, -O0):
<init_curPos>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_curPos>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @init_curPos() {
ret i32 0
}

LLVM IR (-O2):
define i32 @init_curPos() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ inefficient_factorial(int const, double **, int);
double *double_factorials(const int n) {
  double *f = NULL;
  inefficient_factorial(n, &f, 2);
  return f;
}


x86 assembly (clang, -O0):
<double_factorials>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
mov    $0x2,%edx
call   1030 <inefficient_factorial@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_factorials>:
push   %rax
movq   $0x0,(%rsp)
mov    %rsp,%rsi
mov    $0x2,%edx
call   1030 <inefficient_factorial@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define double* @double_factorials(i32 %0) {
%2 = alloca i32
%3 = alloca double*
store i32 %0, i32* %2
store double* null, double** %3
%4 = load i32, i32* %2
%5 = call i32 @inefficient_factorial(i32 %4, double** %3, i32 2)
%6 = load double*, double** %3
ret double* %6
}

LLVM IR (-O2):
define double* @double_factorials(i32 %0) {
%2 = alloca double*
%3 = bitcast double** %2 to i8*
store double* null, double** %2
%4 = call i32 @inefficient_factorial(i32 %0, double** %2, i32 2)
%5 = load double*, double** %2
ret double* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int __infer_nondet_int();
int fseek(FILE *stream, long int offset, int whence) {
  int n;
  FILE tmp;
  tmp = *stream;
  n = __infer_nondet_int();
  if (n)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<fseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
je     114c <fseek+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1153 <fseek+0x43>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fseek>:
push   %rax
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
cmp    $0x1,%eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fseek(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
store i32 %11, i32* %9
%12 = call i32 (...) @__infer_nondet_int()
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %3
store i32 0, i32* %4
br label %17
16: ; preds = %3
store i32 -1, i32* %4
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @fseek(i32* nocapture readnone %0, i64 %1, i32 %2) {
%4 = tail call i32 (...) @__infer_nondet_int()
%5 = icmp eq i32 %4, 0
%6 = sext i1 %5 to i32
ret i32 %6
}
int ffi_test_9(int a, int b, int c, int d, int e, int f, int g) {
  return a + b + c + d + e + f + g;
}


x86 assembly (clang, -O0):
<ffi_test_9>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
add    0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_test_9>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
add    %ecx,%eax
add    %r8d,%eax
add    %r9d,%eax
add    0x8(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @ffi_test_9(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = add nsw i32 %15, %16
%18 = load i32, i32* %10
%19 = add nsw i32 %17, %18
%20 = load i32, i32* %11
%21 = add nsw i32 %19, %20
%22 = load i32, i32* %12
%23 = add nsw i32 %21, %22
%24 = load i32, i32* %13
%25 = add nsw i32 %23, %24
%26 = load i32, i32* %14
%27 = add nsw i32 %25, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @ffi_test_9(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = add nsw i32 %1, %0
%9 = add nsw i32 %8, %2
%10 = add nsw i32 %9, %3
%11 = add nsw i32 %10, %4
%12 = add nsw i32 %11, %5
%13 = add nsw i32 %12, %6
ret i32 %13
}
void ares_local_process_requests() { return; }


x86 assembly (clang, -O0):
<ares_local_process_requests>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ares_local_process_requests>:
ret

LLVM IR (-O0):
define void @ares_local_process_requests() {
ret void
}

LLVM IR (-O2):
define void @ares_local_process_requests() {
ret void
}
/* Variables and functions */
size_t base64_decoded_size(size_t len) { return ((len / 4) * 3); }


x86 assembly (clang, -O0):
<base64_decoded_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
imul   $0x3,%rax,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_decoded_size>:
shr    $0x2,%rdi
lea    (%rdi,%rdi,2),%rax
ret

LLVM IR (-O0):
define i64 @base64_decoded_size(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = udiv i64 %3, 4
%5 = mul i64 %4, 3
ret i64 %5
}

LLVM IR (-O2):
define i64 @base64_decoded_size(i64 %0) {
%2 = lshr i64 %0, 2
%3 = mul nuw i64 %2, 3
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
void cprintf(char *str, int color) { printf("\e[%dm%s\e[39m", color, str); }


x86 assembly (clang, -O0):
<cprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%rdx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cprintf>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"\1B[%dm%s\1B[39m\00"
define void @cprintf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"\1B[%dm%s\1B[39m\00"
define void @cprintf(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %0)
ret void
}
void aebl_emc_init(void) { return; }


x86 assembly (clang, -O0):
<aebl_emc_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aebl_emc_init>:
ret

LLVM IR (-O0):
define void @aebl_emc_init() {
ret void
}

LLVM IR (-O2):
define void @aebl_emc_init() {
ret void
}
/* Variables and functions */
char *mem_get(unsigned int);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *mem_str(char *str) {
  char *mem;
  if (mem = mem_get((unsigned int)strlen(str) + 1)) {
    strcpy(mem, str);
  }
  return (mem);
}


x86 assembly (clang, -O0):
<mem_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%edi
add    $0x1,%edi
call   1050 <mem_get@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     116a <mem_str+0x3a>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_str>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <mem_get@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1157 <mem_str+0x27>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @mem_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = trunc i64 %5 to i32
%7 = add i32 %6, 1
%8 = call i8* @mem_get(i32 %7)
store i8* %8, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
br label %14
14: ; preds = %10, %1
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @mem_str(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = trunc i64 %2 to i32
%4 = add i32 %3, 1
%5 = tail call i8* @mem_get(i32 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
int ceph_osd_op_mode_modify(int op) { return (op & 0xf000) == 0x2000; }


x86 assembly (clang, -O0):
<ceph_osd_op_mode_modify>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf000,%eax
cmp    $0x2000,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_osd_op_mode_modify>:
and    $0xf000,%edi
xor    %eax,%eax
cmp    $0x2000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @ceph_osd_op_mode_modify(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 61440
%5 = icmp eq i32 %4, 8192
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ceph_osd_op_mode_modify(i32 %0) {
%2 = and i32 %0, 61440
%3 = icmp eq i32 %2, 8192
%4 = zext i1 %3 to i32
ret i32 %4
}
void _backlight_set_brightness(int brightness) { (void)brightness; }


x86 assembly (clang, -O0):
<_backlight_set_brightness>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_backlight_set_brightness>:
ret

LLVM IR (-O0):
define void @_backlight_set_brightness(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @_backlight_set_brightness(i32 %0) {
ret void
}
/* Variables and functions */
int strnunvisx(char *, size_t, char const *, int /*<<< orphan*/);
int strunvis(char *dst, const char *src) {
  return strnunvisx(dst, (size_t)~0, src, 0);
}


x86 assembly (clang, -O0):
<strunvis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0xffffffffffffffff,%rsi
xor    %ecx,%ecx
call   1030 <strnunvisx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strunvis>:
mov    %rsi,%rdx
mov    $0xffffffffffffffff,%rsi
xor    %ecx,%ecx
jmp    1030 <strnunvisx@plt>

LLVM IR (-O0):
define i32 @strunvis(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strnunvisx(i8* %5, i64 -1, i8* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strunvis(i8* %0, i8* %1) {
%3 = tail call i32 @strnunvisx(i8* %0, i64 -1, i8* %1, i32 0)
ret i32 %3
}
void br_multicast_stop(struct net_bridge *br) {}


x86 assembly (clang, -O0):
<br_multicast_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<br_multicast_stop>:
ret

LLVM IR (-O0):
%struct.net_bridge = type opaque
define void @br_multicast_stop(%struct.net_bridge* %0) {
%2 = alloca %struct.net_bridge*
store %struct.net_bridge* %0, %struct.net_bridge** %2
ret void
}

LLVM IR (-O2):
%struct.net_bridge = type opaque
define void @br_multicast_stop(%struct.net_bridge* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void h265hvcc_set_profile_compatibility(uint8_t *p, uint32_t val) {
  p[2] = val >> 24;
  p[3] = (val >> 16) & 0xff;
  p[4] = (val >> 8) & 0xff;
  p[5] = val & 0xff;
}


x86 assembly (clang, -O0):
<h265hvcc_set_profile_compatibility>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x10(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265hvcc_set_profile_compatibility>:
mov    %esi,%eax
mov    %esi,%ecx
movzbl %ah,%edx
movzbl %al,%esi
sar    $0x18,%eax
mov    %eax,0x8(%rdi)
shr    $0x10,%ecx
movzbl %cl,%eax
mov    %eax,0xc(%rdi)
mov    %edx,0x10(%rdi)
mov    %esi,0x14(%rdi)
ret

LLVM IR (-O0):
define void @h265hvcc_set_profile_compatibility(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 16
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 3
store i32 %11, i32* %13
%14 = load i32, i32* %4
%15 = ashr i32 %14, 8
%16 = and i32 %15, 255
%17 = load i32*, i32** %3
%18 = getelementptr inbounds i32, i32* %17, i64 4
store i32 %16, i32* %18
%19 = load i32, i32* %4
%20 = and i32 %19, 255
%21 = load i32*, i32** %3
%22 = getelementptr inbounds i32, i32* %21, i64 5
store i32 %20, i32* %22
ret void
}

LLVM IR (-O2):
define void @h265hvcc_set_profile_compatibility(i32* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 24
%4 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %3, i32* %4
%5 = lshr i32 %1, 16
%6 = and i32 %5, 255
%7 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %6, i32* %7
%8 = lshr i32 %1, 8
%9 = and i32 %8, 255
%10 = getelementptr inbounds i32, i32* %0, i64 4
store i32 %9, i32* %10
%11 = and i32 %1, 255
%12 = getelementptr inbounds i32, i32* %0, i64 5
store i32 %11, i32* %12
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRB5_get(void) { return U_WMRCORENONE_get("U_WMRB5"); }


x86 assembly (clang, -O0):
<U_WMRB5_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRB5_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRB5\00"
define i32 @U_WMRB5_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRB5\00"
define i32 @U_WMRB5_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ Proc0();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  Proc0();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Proc0@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <Proc0@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @Proc0()
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @Proc0()
%2 = tail call i32 @exit(i32 0)
unreachable
}
void foo417(int p) {}


x86 assembly (clang, -O0):
<foo417>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo417>:
ret

LLVM IR (-O0):
define void @foo417(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo417(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ isalpha(unsigned char);
scalar_t__ isdigit(unsigned char);
int is_whitespace(char c) {
  int decent_character;
  decent_character = (isalpha(((unsigned char)(c)))) ||
                     (isdigit(((unsigned char)(c)))) || c == '_';
  return !decent_character;
}


x86 assembly (clang, -O0):
<is_whitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1171 <is_whitespace+0x51>
movzbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1171 <is_whitespace+0x51>
movsbl -0x1(%rbp),%eax
cmp    $0x5f,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_whitespace>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
movzbl %r14b,%ebp
mov    %ebp,%edi
call   1040 <isalpha@plt>
xor    %ebx,%ebx
test   %rax,%rax
jne    114e <is_whitespace+0x2e>
mov    %ebp,%edi
call   1030 <isdigit@plt>
test   %rax,%rax
jne    114e <is_whitespace+0x2e>
xor    %ebx,%ebx
cmp    $0x5f,%r14b
setne  %bl
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_whitespace(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = call i64 @isalpha(i8 zeroext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %1
%8 = load i8, i8* %2
%9 = call i64 @isdigit(i8 zeroext %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %7
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 95
br label %15
15: ; preds = %11, %7, %1
%16 = phi i1 [ true, %7 ], [ true, %1 ], [ %14, %11 ]
%17 = zext i1 %16 to i32
store i32 %17, i32* %3
%18 = load i32, i32* %3
%19 = icmp ne i32 %18, 0
%20 = xor i1 %19, true
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_whitespace(i8 signext %0) {
%2 = tail call i64 @isalpha(i8 zeroext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = tail call i64 @isdigit(i8 zeroext %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = icmp ne i8 %0, 95
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %7, %4, %1
%11 = phi i32 [ 0, %4 ], [ 0, %1 ], [ %9, %7 ]
ret i32 %11
}