xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ WriteReg(int, int);
void BitIssueCommand(int instIdx, int cdcMode, int cmd) {
  WriteReg((0xC0700000 + 0x160), 1);
  WriteReg((0xC0700000 + 0x168), instIdx);
  WriteReg((0xC0700000 + 0x16C), cdcMode);
  WriteReg((0xC0700000 + 0x164), cmd);
}


x86 assembly (clang, -O0):
<BitIssueCommand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0xc0700160,%edi
mov    $0x1,%esi
call   1030 <WriteReg@plt>
mov    -0x4(%rbp),%esi
mov    $0xc0700168,%edi
call   1030 <WriteReg@plt>
mov    -0x8(%rbp),%esi
mov    $0xc070016c,%edi
call   1030 <WriteReg@plt>
mov    -0xc(%rbp),%esi
mov    $0xc0700164,%edi
call   1030 <WriteReg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BitIssueCommand>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0xc0700160,%edi
mov    $0x1,%esi
call   1030 <WriteReg@plt>
mov    $0xc0700168,%edi
mov    %ebx,%esi
call   1030 <WriteReg@plt>
mov    $0xc070016c,%edi
mov    %ebp,%esi
call   1030 <WriteReg@plt>
mov    $0xc0700164,%edi
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <WriteReg@plt>

LLVM IR (-O0):
define void @BitIssueCommand(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @WriteReg(i32 -1066401440, i32 1)
%8 = load i32, i32* %4
%9 = call i32 @WriteReg(i32 -1066401432, i32 %8)
%10 = load i32, i32* %5
%11 = call i32 @WriteReg(i32 -1066401428, i32 %10)
%12 = load i32, i32* %6
%13 = call i32 @WriteReg(i32 -1066401436, i32 %12)
ret void
}

LLVM IR (-O2):
define void @BitIssueCommand(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @WriteReg(i32 -1066401440, i32 1)
%5 = tail call i32 @WriteReg(i32 -1066401432, i32 %0)
%6 = tail call i32 @WriteReg(i32 -1066401428, i32 %1)
%7 = tail call i32 @WriteReg(i32 -1066401436, i32 %2)
ret void
}
/* Variables and functions */
char *strpbrk(char *, char *);
char *clean4c(char *fname) {
  char *p;
  while ((p = strpbrk(fname, "-+ `~!@#$%^&*(){}[]|:;'\",<>?/|=.\\")))
    *p = '_';
  return fname;
}


x86 assembly (clang, -O0):
<clean4c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strpbrk@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1146 <clean4c+0x36>
mov    -0x10(%rbp),%rax
movb   $0x5f,(%rax)
jmp    111c <clean4c+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clean4c>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xee2(%rip),%rsi
call   1030 <strpbrk@plt>
test   %rax,%rax
je     1143 <clean4c+0x33>
lea    0xed1(%rip),%r14
nop
movb   $0x5f,(%rax)
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strpbrk@plt>
test   %rax,%rax
jne    1130 <clean4c+0x20>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [34 x i8] c"-+ `~!@#$%^&*(){}[]|:;'\22,<>?/|=.\\\00"
define i8* @clean4c(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = call i8* @strpbrk(i8* %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = load i8*, i8** %3
store i8 95, i8* %9
br label %4
10: ; preds = %4
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
@.str = [34 x i8] c"-+ `~!@#$%^&*(){}[]|:;'\22,<>?/|=.\\\00"
define i8* @clean4c(i8* returned %0) {
%2 = tail call i8* @strpbrk(i8* %0, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i8* %2, null
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %6, %4 ], [ %2, %1 ]
store i8 95, i8* %5
%6 = tail call i8* @strpbrk(i8* %0, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %4
8: ; preds = %4, %1
ret i8* %0
}
void taa_h264_set_framesize(int *width, int *height) {
  *width = ((*width + 15) / 16) * 16;
  *height = ((*height + 15) / 16) * 16;
}


x86 assembly (clang, -O0):
<taa_h264_set_framesize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0xf,%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
shl    $0x4,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0xf,%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
shl    $0x4,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<taa_h264_set_framesize>:
mov    (%rdi),%eax
lea    0xf(%rax),%ecx
add    $0x1e,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
and    $0xfffffff0,%eax
mov    %eax,(%rdi)
mov    (%rsi),%eax
lea    0xf(%rax),%ecx
add    $0x1e,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
and    $0xfffffff0,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @taa_h264_set_framesize(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 15
%8 = sdiv i32 %7, 16
%9 = mul nsw i32 %8, 16
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 15
%14 = sdiv i32 %13, 16
%15 = mul nsw i32 %14, 16
%16 = load i32*, i32** %4
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @taa_h264_set_framesize(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = add nsw i32 %3, 15
%5 = sdiv i32 %4, 16
%6 = shl nsw i32 %5, 4
store i32 %6, i32* %0
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 15
%9 = sdiv i32 %8, 16
%10 = shl nsw i32 %9, 4
store i32 %10, i32* %1
ret void
}
__attribute__((section("tracepoint/sched/sched_switch"), used)) int
oncpu(struct sched_switch_args *ctx) {
  return 0;
}


x86 assembly (clang, -O0):
<oncpu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oncpu>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sched_switch_args = type opaque
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.sched_switch_args*)* @oncpu to i8*)], section "llvm.metadata"
define i32 @oncpu(%struct.sched_switch_args* %0) section "tracepoint/sched/sched_switch" {
%2 = alloca %struct.sched_switch_args*
store %struct.sched_switch_args* %0, %struct.sched_switch_args** %2
ret i32 0
}

LLVM IR (-O2):
%struct.sched_switch_args = type opaque
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.sched_switch_args*)* @oncpu to i8*)], section "llvm.metadata"
define i32 @oncpu(%struct.sched_switch_args* nocapture readnone %0) section "tracepoint/sched/sched_switch" {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assignExpr();
void initializer() { assignExpr(); }


x86 assembly (clang, -O0):
<initializer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <assignExpr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializer>:
xor    %eax,%eax
jmp    1030 <assignExpr@plt>

LLVM IR (-O0):
define void @initializer() {
%1 = call i32 (...) @assignExpr()
ret void
}

LLVM IR (-O2):
define void @initializer() {
%1 = tail call i32 (...) @assignExpr()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ grava_li(int, char *);
void rot12_sem() { grava_li(1, "$CASE"); }


x86 assembly (clang, -O0):
<rot12_sem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <grava_li@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot12_sem>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <grava_li@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"$CASE\00"
define void @rot12_sem() {
%1 = call i32 @grava_li(i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"$CASE\00"
define void @rot12_sem() {
%1 = tail call i32 @grava_li(i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
int pthread_attr_destroy(int /*<<< orphan*/ *);
int my_pthread_attr_destroy(pthread_attr_t *__attr) {
  int ret;
  pthread_attr_t *realattr = (pthread_attr_t *)*(int *)__attr;
  ret = pthread_attr_destroy(realattr);
  free(realattr);
  return ret;
}


x86 assembly (clang, -O0):
<my_pthread_attr_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movslq (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <pthread_attr_destroy@plt>
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_attr_destroy>:
push   %rbp
push   %rbx
push   %rax
movslq (%rdi),%rbx
mov    %rbx,%rdi
call   1040 <pthread_attr_destroy@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @my_pthread_attr_destroy(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32*
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store i32* %8, i32** %4
%9 = load i32*, i32** %4
%10 = call i32 @pthread_attr_destroy(i32* %9)
store i32 %10, i32* %3
%11 = load i32*, i32** %4
%12 = call i32 @free(i32* %11)
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @my_pthread_attr_destroy(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = tail call i32 @pthread_attr_destroy(i32* %4)
%6 = tail call i32 @free(i32* %4)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ addch(int /*<<< orphan*/);
int /*<<< orphan*/ ncurses_display_refresh();
void ncurses_display_hal_write_char(uint8_t chr) {
  addch(chr);
  ncurses_display_refresh();
}


x86 assembly (clang, -O0):
<ncurses_display_hal_write_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <addch@plt>
mov    $0x0,%al
call   1030 <ncurses_display_refresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ncurses_display_hal_write_char>:
push   %rax
call   1040 <addch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <ncurses_display_refresh@plt>

LLVM IR (-O0):
define void @ncurses_display_hal_write_char(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @addch(i32 %3)
%5 = call i32 (...) @ncurses_display_refresh()
ret void
}

LLVM IR (-O2):
define void @ncurses_display_hal_write_char(i32 %0) {
%2 = tail call i32 @addch(i32 %0)
%3 = tail call i32 (...) @ncurses_display_refresh()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int /*<<< orphan*/ Sys_failure(char *);
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int pthread_attr_init(int /*<<< orphan*/ *);
void Pthread_attr_init(pthread_attr_t *attr) {
  int retval;
  assert(attr != NULL);
  retval = pthread_attr_init(attr);
  if (retval != 0)
    Sys_failure("pthread_attr_init");
}


x86 assembly (clang, -O0):
<Pthread_attr_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <pthread_attr_init@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1170 <Pthread_attr_init+0x40>
lea    0xe95(%rip),%rdi
call   1050 <Sys_failure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Pthread_attr_init>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1030 <pthread_attr_init@plt>
test   %eax,%eax
je     115b <Pthread_attr_init+0x2b>
lea    0xeab(%rip),%rdi
pop    %rbx
jmp    1050 <Sys_failure@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"pthread_attr_init\00"
define void @Pthread_attr_init(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i32*, i32** %2
%9 = call i32 @pthread_attr_init(i32* %8)
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = call i32 @Sys_failure(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"pthread_attr_init\00"
define void @Pthread_attr_init(i32* %0) {
%2 = icmp ne i32* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @pthread_attr_init(i32* %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @Sys_failure(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
ret void
}
__complex__ double ctest_double(__complex__ double x) {
  __complex__ double res;
  res = ~x;
  return res;
}


x86 assembly (clang, -O0):
<ctest_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x20(%rbp),%xmm1
movaps 0xee6(%rip),%xmm2
movsd  -0x18(%rbp),%xmm0
pxor   %xmm2,%xmm0
movsd  %xmm1,-0x30(%rbp)
movlpd %xmm0,-0x28(%rbp)
movsd  -0x30(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm0,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctest_double>:
xorps  0xef9(%rip),%xmm1
ret

LLVM IR (-O0):
define { double, double } @ctest_double(double %0, double %1) {
%3 = alloca { double, double }
%4 = alloca { double, double }
%5 = alloca { double, double }
%6 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 0
store double %0, double* %6
%7 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 1
store double %1, double* %7
%8 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 0
%9 = load double, double* %8
%10 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 1
%11 = load double, double* %10
%12 = fneg double %11
%13 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 0
%14 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 1
store double %9, double* %13
store double %12, double* %14
%15 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 0
%16 = load double, double* %15
%17 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 1
%18 = load double, double* %17
%19 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%20 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
store double %16, double* %19
store double %18, double* %20
%21 = load { double, double }, { double, double }* %3
ret { double, double } %21
}

LLVM IR (-O2):
define { double, double } @ctest_double(double %0, double %1) {
%3 = fneg double %1
%4 = insertvalue { double, double } poison, double %0, 0
%5 = insertvalue { double, double } %4, double %3, 1
ret { double, double } %5
}
/* Type definitions */
typedef int ulong;
typedef int u_int16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void buf_int16(char *buf, u_int16_t n, ulong offset) {
  int i;
  if (0 && 0)
    printf("%d -> ", n);
  for (i = 0; i < 2; i++) {
    char b = (n & 0xff);
    if (buf)
      buf[offset + i] = b;
    n >>= 8;
    if (0 && 0)
      printf("%u ", b & 0xff);
  }
  if (0 && 0)
    printf("\n");
}


x86 assembly (clang, -O0):
<buf_int16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
jge    115f <buf_int16+0x5f>
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,-0x15(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1148 <buf_int16+0x48>
mov    -0x15(%rbp),%dl
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
add    -0x14(%rbp),%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <buf_int16+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_int16>:
test   %rdi,%rdi
je     110c <buf_int16+0xc>
movslq %edx,%rax
mov    %si,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @buf_int16(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %9
9: ; preds = %29, %3
%10 = load i32, i32* %7
%11 = icmp slt i32 %10, 2
br i1 %11, label %12, label %32
12: ; preds = %9
%13 = load i32, i32* %5
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8*, i8** %4
%17 = icmp ne i8* %16, null
br i1 %17, label %18, label %26
18: ; preds = %12
%19 = load i8, i8* %8
%20 = load i8*, i8** %4
%21 = load i32, i32* %6
%22 = load i32, i32* %7
%23 = add nsw i32 %21, %22
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %20, i64 %24
store i8 %19, i8* %25
br label %26
26: ; preds = %18, %12
%27 = load i32, i32* %5
%28 = ashr i32 %27, 8
store i32 %28, i32* %5
br label %29
29: ; preds = %26
%30 = load i32, i32* %7
%31 = add nsw i32 %30, 1
store i32 %31, i32* %7
br label %9
32: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @buf_int16(i8* writeonly %0, i32 %1, i32 %2) {
%4 = icmp eq i8* %0, null
%5 = sext i32 %2 to i64
br i1 %4, label %13, label %6
6: ; preds = %3
%7 = trunc i32 %1 to i8
%8 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 %7, i8* %8
%9 = lshr i32 %1, 8
%10 = trunc i32 %9 to i8
%11 = add nsw i64 %5, 1
%12 = getelementptr inbounds i8, i8* %0, i64 %11
store i8 %10, i8* %12
br label %13
13: ; preds = %3, %6
ret void
}
int strcmp(const char *s1, const char *s2) {
  while (*s1 && (*s1 == *s2)) {
    s1++;
    s2++;
  }
  return (*(const unsigned char *)s1 - *(const unsigned char *)s2);
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     1137 <strcmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <strcmp+0x47>
jmp    1164 <strcmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <strcmp+0xc>
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    (%rdi),%al
test   %al,%al
je     1123 <strcmp+0x23>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
cmp    (%rsi),%al
jne    1125 <strcmp+0x25>
add    $0x1,%rsi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <strcmp+0x10>
xor    %eax,%eax
movzbl %al,%eax
movzbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br label %18
18: ; preds = %10, %5
%19 = phi i1 [ false, %5 ], [ %17, %10 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = sub nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %14, %11 ], [ %3, %2 ]
%7 = phi i8* [ %13, %11 ], [ %1, %2 ]
%8 = phi i8* [ %12, %11 ], [ %0, %2 ]
%9 = load i8, i8* %7
%10 = icmp eq i8 %6, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %11, %2
%17 = phi i8* [ %1, %2 ], [ %13, %11 ], [ %7, %5 ]
%18 = phi i8 [ 0, %2 ], [ 0, %11 ], [ %6, %5 ]
%19 = zext i8 %18 to i32
%20 = load i8, i8* %17
%21 = zext i8 %20 to i32
%22 = sub nsw i32 %19, %21
ret i32 %22
}
/* Variables and functions */
char asm_getdisppage();
char getdisppage() { return asm_getdisppage(); }


x86 assembly (clang, -O0):
<getdisppage>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <asm_getdisppage@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getdisppage>:
xor    %eax,%eax
jmp    1030 <asm_getdisppage@plt>

LLVM IR (-O0):
define signext i8 @getdisppage() {
%1 = call signext i8 (...) @asm_getdisppage()
ret i8 %1
}

LLVM IR (-O2):
define signext i8 @getdisppage() {
%1 = tail call signext i8 (...) @asm_getdisppage()
ret i8 %1
}
float Reals_Ten(int e) {
  float _o_result;
  double r, power;
  r = (double)1;
  power = (double)10;
  while (e > 0) {
    if (((e)&1)) {
      r = r * power;
    }
    power = power * power;
    e = ((long long)(e) >> (1));
  }
  _o_result = r;
  return _o_result;
}


x86 assembly (clang, -O0):
<Reals_Ten>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  0xef9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xee4(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1168 <Reals_Ten+0x68>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1149 <Reals_Ten+0x49>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movslq -0x4(%rbp),%rax
sar    $0x1,%rax
mov    %eax,-0x4(%rbp)
jmp    1121 <Reals_Ten+0x21>
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reals_Ten>:
test   %edi,%edi
jle    114b <Reals_Ten+0x4b>
movsd  0xefc(%rip),%xmm0
movsd  0xefc(%rip),%xmm1
movapd %xmm0,%xmm2
jmp    1133 <Reals_Ten+0x33>
nopw   0x0(%rax,%rax,1)
mulsd  %xmm3,%xmm2
mulsd  %xmm1,%xmm1
mov    %edi,%eax
shr    %eax
cmp    $0x1,%edi
mov    %eax,%edi
jbe    1143 <Reals_Ten+0x43>
movapd %xmm0,%xmm3
test   $0x1,%dil
je     1120 <Reals_Ten+0x20>
movapd %xmm1,%xmm3
jmp    1120 <Reals_Ten+0x20>
xorps  %xmm0,%xmm0
cvtsd2ss %xmm2,%xmm0
ret
movss  0xead(%rip),%xmm0
ret

LLVM IR (-O0):
define float @Reals_Ten(i32 %0) {
%2 = alloca i32
%3 = alloca float
%4 = alloca double
%5 = alloca double
store i32 %0, i32* %2
store double 1.000000e+00, double* %4
store double 1.000000e+01, double* %5
br label %6
6: ; preds = %17, %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %25
9: ; preds = %6
%10 = load i32, i32* %2
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load double, double* %4
%15 = load double, double* %5
%16 = fmul double %14, %15
store double %16, double* %4
br label %17
17: ; preds = %13, %9
%18 = load double, double* %5
%19 = load double, double* %5
%20 = fmul double %18, %19
store double %20, double* %5
%21 = load i32, i32* %2
%22 = sext i32 %21 to i64
%23 = ashr i64 %22, 1
%24 = trunc i64 %23 to i32
store i32 %24, i32* %2
br label %6
25: ; preds = %6
%26 = load double, double* %4
%27 = fptrunc double %26 to float
store float %27, float* %3
%28 = load float, float* %3
ret float %28
}

LLVM IR (-O2):
define float @Reals_Ten(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %16
3: ; preds = %1, %3
%4 = phi double [ %11, %3 ], [ 1.000000e+01, %1 ]
%5 = phi double [ %10, %3 ], [ 1.000000e+00, %1 ]
%6 = phi i32 [ %12, %3 ], [ %0, %1 ]
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, double 1.000000e+00, double %4
%10 = fmul double %5, %9
%11 = fmul double %4, %4
%12 = lshr i32 %6, 1
%13 = icmp ult i32 %6, 2
br i1 %13, label %14, label %3
14: ; preds = %3
%15 = fptrunc double %10 to float
br label %16
16: ; preds = %14, %1
%17 = phi float [ 1.000000e+00, %1 ], [ %15, %14 ]
ret float %17
}
void midi_stop() {}


x86 assembly (clang, -O0):
<midi_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<midi_stop>:
ret

LLVM IR (-O0):
define void @midi_stop() {
ret void
}

LLVM IR (-O2):
define void @midi_stop() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ djb2(void const *);
int random_comparator_cb(const void *o1, const void *o2) {
  uint32_t h1 = djb2(o1);
  uint32_t h2 = djb2(o2);
  if (h1 < h2)
    return -1;
  else if (h1 > h2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<random_comparator_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <djb2@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <djb2@plt>
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jge    1154 <random_comparator_cb+0x44>
movl   $0xffffffff,-0x4(%rbp)
jmp    117a <random_comparator_cb+0x6a>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jle    116e <random_comparator_cb+0x5e>
movl   $0x1,-0x4(%rbp)
jmp    117a <random_comparator_cb+0x6a>
jmp    1173 <random_comparator_cb+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_comparator_cb>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1030 <djb2@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <djb2@plt>
xor    %ecx,%ecx
cmp    %rax,%rbx
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @random_comparator_cb(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = call i64 @djb2(i8* %8)
store i64 %9, i64* %6
%10 = load i8*, i8** %5
%11 = call i64 @djb2(i8* %10)
store i64 %11, i64* %7
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = icmp slt i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 -1, i32* %3
br label %23
16: ; preds = %2
%17 = load i64, i64* %6
%18 = load i64, i64* %7
%19 = icmp sgt i64 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %3
br label %23
21: ; preds = %16
br label %22
22: ; preds = %21
store i32 0, i32* %3
br label %23
23: ; preds = %22, %20, %15
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @random_comparator_cb(i8* %0, i8* %1) {
%3 = tail call i64 @djb2(i8* %0)
%4 = tail call i64 @djb2(i8* %1)
%5 = icmp slt i64 %3, %4
%6 = icmp sgt i64 %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ cmd_prints(char *);
void consVer(void) {
  cmd_prints("P5 usermode console build 1\n");
  cmd_prints("P5 build [need fmt print and P5 build number hook]\n");
}


x86 assembly (clang, -O0):
<consVer>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <cmd_prints@plt>
lea    0xef6(%rip),%rdi
call   1030 <cmd_prints@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<consVer>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <cmd_prints@plt>
lea    0xef9(%rip),%rdi
pop    %rax
jmp    1030 <cmd_prints@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"P5 usermode console build 1\0A\00"
@.str.1 = [52 x i8] c"P5 build [need fmt print and P5 build number hook]\0A\00"
define void @consVer() {
%1 = call i32 @cmd_prints(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @cmd_prints(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"P5 usermode console build 1\0A\00"
@.str.1 = [52 x i8] c"P5 build [need fmt print and P5 build number hook]\0A\00"
define void @consVer() {
%1 = tail call i32 @cmd_prints(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @cmd_prints(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ printf(char *, int, char *);
int /*<<< orphan*/ read(int, char *, int);
int ProcessRequest(int slave_sock) {
  char sock_buf[1000];
  read(slave_sock, sock_buf, 1000);
  printf("%7d `%s'\n", getpid(), sock_buf);
  return 0;
}


x86 assembly (clang, -O0):
<ProcessRequest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x3f0,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x3f0(%rbp),%rsi
mov    $0x3e8,%edx
call   1050 <read@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    -0x3f0(%rbp),%rdx
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x3f0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ProcessRequest>:
push   %rbx
sub    $0x3f0,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
mov    $0x3e8,%edx
call   1050 <read@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeaa(%rip),%rdi
mov    %eax,%esi
mov    %rbx,%rdx
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x3f0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%7d `%s'\0A\00"
define i32 @ProcessRequest(i32 %0) {
%2 = alloca i32
%3 = alloca [1000 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [1000 x i8], [1000 x i8]* %3, i64 0, i64 0
%6 = call i32 @read(i32 %4, i8* %5, i32 1000)
%7 = call i32 (...) @getpid()
%8 = getelementptr inbounds [1000 x i8], [1000 x i8]* %3, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %7, i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"%7d `%s'\0A\00"
define i32 @ProcessRequest(i32 %0) {
%2 = alloca [1000 x i8]
%3 = getelementptr inbounds [1000 x i8], [1000 x i8]* %2, i64 0, i64 0
%4 = call i32 @read(i32 %0, i8* %3, i32 1000)
%5 = tail call i32 (...) @getpid()
%6 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %3)
ret i32 0
}
void gf8mul_10110100(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm7, %xmm4\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm6, %xmm3\n"
                       "\tpxor    %xmm5, %xmm3\n"
                       "\tpxor    %xmm5, %xmm2\n"
                       "\tpxor    %xmm4, %xmm2\n"
                       "\tpxor    %xmm4, %xmm1\n"
                       "\tpxor    %xmm3, %xmm1\n"
                       "\tpxor    %xmm3, %xmm0\n"
                       "\tpxor    %xmm2, %xmm7\n"
                       "\tpxor    %xmm2, %xmm4\n"
                       "\tpxor    %xmm2, %xmm3\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm1, %xmm6\n"
                       "\tpxor    %xmm1, %xmm5\n"
                       "\tpxor    %xmm1, %xmm4\n"
                       "\tpxor    %xmm1, %xmm2\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm0, %xmm7\n"
                       "\tpxor    %xmm0, %xmm5\n"
                       "\tpxor    %xmm0, %xmm4\n"
                       "\tpxor    %xmm0, %xmm2\n"
                       "\tpxor    %xmm2, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm4
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm3
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm2
pxor   %xmm4,%xmm2
pxor   %xmm4,%xmm1
pxor   %xmm3,%xmm1
pxor   %xmm3,%xmm0
pxor   %xmm2,%xmm7
pxor   %xmm2,%xmm4
pxor   %xmm2,%xmm3
pxor   %xmm2,%xmm1
pxor   %xmm1,%xmm6
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm4
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm7
pxor   %xmm0,%xmm5
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm2
pxor   %xmm2,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm4
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm3
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm2
pxor   %xmm4,%xmm2
pxor   %xmm4,%xmm1
pxor   %xmm3,%xmm1
pxor   %xmm3,%xmm0
pxor   %xmm2,%xmm7
pxor   %xmm2,%xmm4
pxor   %xmm2,%xmm3
pxor   %xmm2,%xmm1
pxor   %xmm1,%xmm6
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm4
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm7
pxor   %xmm0,%xmm5
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm2
pxor   %xmm2,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_10110100() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_10110100() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm5\0A\09pxor %xmm7, %xmm4\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm6, %xmm3\0A\09pxor %xmm5, %xmm3\0A\09pxor %xmm5, %xmm2\0A\09pxor %xmm4, %xmm2\0A\09pxor %xmm4, %xmm1\0A\09pxor %xmm3, %xmm1\0A\09pxor %xmm3, %xmm0\0A\09pxor %xmm2, %xmm7\0A\09pxor %xmm2, %xmm4\0A\09pxor %xmm2, %xmm3\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm1, %xmm6\0A\09pxor %xmm1, %xmm5\0A\09pxor %xmm1, %xmm4\0A\09pxor %xmm1, %xmm2\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm0, %xmm7\0A\09pxor %xmm0, %xmm5\0A\09pxor %xmm0, %xmm4\0A\09pxor %xmm0, %xmm2\0A\09pxor %xmm2, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int menorQuem(float peso1, float peso2) {
  if (peso1 < peso2) {
    return 1;
  } else {
    return 2;
  }
}


x86 assembly (clang, -O0):
<menorQuem>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    112d <menorQuem+0x2d>
movl   $0x1,-0x4(%rbp)
jmp    1134 <menorQuem+0x34>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<menorQuem>:
xor    %ecx,%ecx
ucomiss %xmm0,%xmm1
seta   %cl
mov    $0x2,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @menorQuem(float %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp olt float %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 2, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @menorQuem(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, i32 1, i32 2
ret i32 %4
}
int re_search(pbufp, string, size, startpos, range, regs)
struct re_pattern_buffer *pbufp;
char *string;
int size, startpos, range;
struct re_registers *regs;
{
  return re_search_2(pbufp, 0, 0, string, size, startpos, range, regs, size);
}


x86 assembly (clang, -O0):
<re_search>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    -0x1c(%rbp),%r11d
mov    -0x28(%rbp),%r10
mov    -0x14(%rbp),%eax
xor    %edx,%edx
mov    %edx,%esi
mov    %r11d,(%rsp)
mov    %r10,0x8(%rsp)
mov    %eax,0x10(%rsp)
mov    $0x0,%al
call   1030 <re_search_2@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<re_search>:
push   %rax
mov    %r9,%r10
mov    %r8d,%r11d
mov    %ecx,%r9d
mov    %edx,%r8d
mov    %rsi,%rcx
sub    $0x8,%rsp
xor    %esi,%esi
xor    %edx,%edx
xor    %eax,%eax
push   %r8
push   %r10
push   %r11
call   1030 <re_search_2@plt>
add    $0x20,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_search(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, i32 %4, %struct.re_registers* %5) {
%7 = alloca %struct.re_pattern_buffer*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca %struct.re_registers*
store %struct.re_pattern_buffer* %0, %struct.re_pattern_buffer** %7
store i8* %1, i8** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store %struct.re_registers* %5, %struct.re_registers** %12
%13 = load %struct.re_pattern_buffer*, %struct.re_pattern_buffer** %7
%14 = load i8*, i8** %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = load i32, i32* %11
%18 = load %struct.re_registers*, %struct.re_registers** %12
%19 = load i32, i32* %9
%20 = call i32 (%struct.re_pattern_buffer*, i32, i32, i8*, i32, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_search_2 to i32 (%struct.re_pattern_buffer*, i32, i32, i8*, i32, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %13, i32 0, i32 0, i8* %14, i32 %15, i32 %16, i32 %17, %struct.re_registers* %18, i32 %19)
ret i32 %20
}

LLVM IR (-O2):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_search(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, i32 %4, %struct.re_registers* %5) {
%7 = tail call i32 (%struct.re_pattern_buffer*, i32, i32, i8*, i32, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_search_2 to i32 (%struct.re_pattern_buffer*, i32, i32, i8*, i32, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %0, i32 0, i32 0, i8* %1, i32 %2, i32 %3, i32 %4, %struct.re_registers* %5, i32 %2)
ret i32 %7
}
/* Variables and functions */
int f(int, int);
int g(int a, int b, int c) { return f(a, b + c); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
add    %edx,%esi
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = add nsw i32 %8, %9
%11 = call i32 @f(i32 %7, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, %1
%5 = tail call i32 @f(i32 %0, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int mkbootimg_mt65xx_usage(void) {
  fprintf(stderr, "usage: mkbootimg_mt65xx\n"
                  "       --kernel <filename>\n"
                  "       --ramdisk <filename>\n"
                  "       [ --second <2ndbootloader-filename> ]\n"
                  "       [ --cmdline <kernel-commandline> ]\n"
                  "       [ --board <boardname> ]\n"
                  "       [ --base <address> ]\n"
                  "       [ --pagesize <pagesize> ]\n"
                  "       [ --ramdiskaddr <address> ]\n"
                  "       -o|--output <filename>\n");
  return 1;
}


x86 assembly (clang, -O0):
<mkbootimg_mt65xx_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkbootimg_mt65xx_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [324 x i8] c"usage: mkbootimg_mt65xx\0A --kernel <filename>\0A --ramdisk <filename>\0A [ --second <2ndbootloader-filename> ]\0A [ --cmdline <kernel-commandline> ]\0A [ --board <boardname> ]\0A [ --base <address> ]\0A [ --pagesize <pagesize> ]\0A [ --ramdiskaddr <address> ]\0A -o|--output <filename>\0A\00"
define i32 @mkbootimg_mt65xx_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([324 x i8], [324 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [324 x i8] c"usage: mkbootimg_mt65xx\0A --kernel <filename>\0A --ramdisk <filename>\0A [ --second <2ndbootloader-filename> ]\0A [ --cmdline <kernel-commandline> ]\0A [ --board <boardname> ]\0A [ --base <address> ]\0A [ --pagesize <pagesize> ]\0A [ --ramdiskaddr <address> ]\0A -o|--output <filename>\0A\00"
define i32 @mkbootimg_mt65xx_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([324 x i8], [324 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
int test_imm_87int8_reg(signed char val) {
  return ((val) & (0x87 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_87int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x87,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_87int8_reg>:
test   $0x87,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_87int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 135
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_87int8_reg(i8 signext %0) {
%2 = and i8 %0, -121
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ use_stuff(int);
int g2(int a, int b) {
  int i;
  for (i = 4; i <= b; i += 2)
    use_stuff(a);
}


x86 assembly (clang, -O0):
<g2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x4,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1147 <g2+0x37>
mov    -0x8(%rbp),%edi
call   1030 <use_stuff@plt>
mov    -0x10(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x10(%rbp)
jmp    1125 <g2+0x15>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2>:
push   %rbp
push   %r14
push   %rbx
cmp    $0x4,%esi
jl     113f <g2+0x2f>
mov    %esi,%ebx
mov    %edi,%r14d
mov    $0x4,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r14d,%edi
call   1030 <use_stuff@plt>
add    $0x2,%ebp
cmp    %ebx,%ebp
jle    1130 <g2+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @g2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 4, i32* %6
br label %7
7: ; preds = %14, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i32, i32* %4
%13 = call i32 @use_stuff(i32 %12)
br label %14
14: ; preds = %11
%15 = load i32, i32* %6
%16 = add nsw i32 %15, 2
store i32 %16, i32* %6
br label %7
17: ; preds = %7
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @g2(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 4
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 4, %2 ]
%6 = tail call i32 @use_stuff(i32 %0)
%7 = add nuw nsw i32 %5, 2
%8 = icmp sgt i32 %7, %1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret i32 undef
}
/* Variables and functions */
int query_add_remove(int);
int query_remove_device(char **args, int num_args) {
  return query_add_remove(1);
}


x86 assembly (clang, -O0):
<query_remove_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%edi
call   1030 <query_add_remove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<query_remove_device>:
mov    $0x1,%edi
jmp    1030 <query_add_remove@plt>

LLVM IR (-O0):
define i32 @query_remove_device(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = call i32 @query_add_remove(i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @query_remove_device(i8** nocapture readnone %0, i32 %1) {
%3 = tail call i32 @query_add_remove(i32 1)
ret i32 %3
}
/* Variables and functions */
int close(int);
int sys_close(int fd) { return close(fd); }


x86 assembly (clang, -O0):
<sys_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @sys_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sys_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printd() { printf("Load/store Instruction \n"); }


x86 assembly (clang, -O0):
<printd>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printd>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Load/store Instruction \0A\00"
define void @printd() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"Load/store Instruction \00"
define void @printd() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int);
int passw() {
  int d;
  printf("input pas:");
  scanf("%d", d);
  return d == 123;
}


x86 assembly (clang, -O0):
<passw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%esi
lea    0xecd(%rip),%rdi
call   1040 <scanf@plt>
cmpl   $0x7b,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<passw>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xed7(%rip),%rdi
call   1040 <scanf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"input pas:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @passw() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %1
%6 = icmp eq i32 %5, 123
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@.str = [11 x i8] c"input pas:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @passw() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 undef)
ret i32 0
}
extern int min(int n1, int n2) {
  if (n1 < n2) {
    return n1;
  } else {
    return n2;
  }
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void multidir_post_slope_lim_linetype_weno(void) {}


x86 assembly (clang, -O0):
<multidir_post_slope_lim_linetype_weno>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multidir_post_slope_lim_linetype_weno>:
ret

LLVM IR (-O0):
define void @multidir_post_slope_lim_linetype_weno() {
ret void
}

LLVM IR (-O2):
define void @multidir_post_slope_lim_linetype_weno() {
ret void
}