xunge/DecIR huggingface dataset:
/* Variables and functions */
int getch();
int main() {
  int c = getch();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getch@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getch@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @getch()
store i32 %3, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @getch()
ret i32 0
}
void flush_spe_to_thread(struct task_struct *t) {}


x86 assembly (clang, -O0):
<flush_spe_to_thread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_spe_to_thread>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @flush_spe_to_thread(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @flush_spe_to_thread(%struct.task_struct* nocapture %0) {
ret void
}
void FanChannelDisable(unsigned long ulBase, unsigned long ulChannel) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) &= ~(1 << ulChannel);
}


x86 assembly (clang, -O0):
<FanChannelDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FanChannelDisable>:
mov    %rsi,%rcx
mov    $0xfffffffe,%eax
rol    %cl,%eax
cltq
and    %rax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @FanChannelDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = sext i32 %8 to i64
%10 = load i64, i64* %3
%11 = add i64 %10, 4
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, %9
store volatile i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @FanChannelDisable(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl nuw i32 1, %3
%5 = xor i32 %4, -1
%6 = sext i32 %5 to i64
%7 = add i64 %0, 4
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, %6
store volatile i64 %10, i64* %8
ret void
}
int WpeNumberOfPlaces(int n) {
  int i;
  if (n == 0) {
    return (1);
  } else if (n < 0) {
    n = -n;
  }
  for (i = 0; n > 0; n /= 10, i++)
    ;
  return (i);
}


x86 assembly (clang, -O0):
<WpeNumberOfPlaces>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <WpeNumberOfPlaces+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    116c <WpeNumberOfPlaces+0x6c>
cmpl   $0x0,-0x8(%rbp)
jge    112f <WpeNumberOfPlaces+0x2f>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1134 <WpeNumberOfPlaces+0x34>
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1166 <WpeNumberOfPlaces+0x66>
jmp    114a <WpeNumberOfPlaces+0x4a>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <WpeNumberOfPlaces+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WpeNumberOfPlaces>:
test   %edi,%edi
je     1135 <WpeNumberOfPlaces+0x35>
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
xor    %eax,%eax
mov    $0xcccccccd,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ecx,%esi
imul   %rdx,%rsi
shr    $0x23,%rsi
add    $0x1,%eax
cmp    $0x9,%ecx
mov    %esi,%ecx
ja     1120 <WpeNumberOfPlaces+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @WpeNumberOfPlaces(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %27
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %3
%13 = sub nsw i32 0, %12
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %8
br label %15
15: ; preds = %14
store i32 0, i32* %4
br label %16
16: ; preds = %20, %15
%17 = load i32, i32* %3
%18 = icmp sgt i32 %17, 0
br i1 %18, label %19, label %25
19: ; preds = %16
br label %20
20: ; preds = %19
%21 = load i32, i32* %3
%22 = sdiv i32 %21, 10
store i32 %22, i32* %3
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %16
25: ; preds = %16
%26 = load i32, i32* %4
store i32 %26, i32* %2
br label %27
27: ; preds = %25, %7
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @WpeNumberOfPlaces(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ 0, %3 ]
%7 = phi i32 [ %8, %5 ], [ %4, %3 ]
%8 = udiv i32 %7, 10
%9 = add nuw nsw i32 %6, 1
%10 = icmp ult i32 %7, 10
br i1 %10, label %11, label %5
11: ; preds = %5, %1
%12 = phi i32 [ 1, %1 ], [ %9, %5 ]
ret i32 %12
}
/* Type definitions */
typedef scalar_t__ const uint8_t;

/* Variables and functions */
void *memrchr8(const void *s, uint8_t c, size_t n) {
  register const uint8_t *p = (const uint8_t *)s;
  while (n--) {
    if (p[n] == c)
      return ((void *)(p + n));
  }
  return (NULL);
}


x86 assembly (clang, -O0):
<memrchr8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x20(%rbp)
cmp    $0x0,%rax
je     1164 <memrchr8+0x64>
mov    -0x28(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
cmp    -0x18(%rbp),%rax
jne    115f <memrchr8+0x5f>
mov    -0x28(%rbp),%rax
mov    -0x20(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    116c <memrchr8+0x6c>
jmp    1118 <memrchr8+0x18>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memrchr8>:
lea    (%rdi,%rdx,8),%rcx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
sub    $0x1,%rdx
jb     1124 <memrchr8+0x24>
lea    -0x8(%rcx),%rax
cmp    %rsi,-0x8(%rcx)
mov    %rax,%rcx
jne    1110 <memrchr8+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @memrchr8(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i64*
store i64* %10, i64** %8
br label %11
11: ; preds = %27, %3
%12 = load i64, i64* %7
%13 = add i64 %12, -1
store i64 %13, i64* %7
%14 = icmp ne i64 %12, 0
br i1 %14, label %15, label %28
15: ; preds = %11
%16 = load i64*, i64** %8
%17 = load i64, i64* %7
%18 = getelementptr inbounds i64, i64* %16, i64 %17
%19 = load i64, i64* %18
%20 = load i64, i64* %6
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %27
22: ; preds = %15
%23 = load i64*, i64** %8
%24 = load i64, i64* %7
%25 = getelementptr inbounds i64, i64* %23, i64 %24
%26 = bitcast i64* %25 to i8*
store i8* %26, i8** %4
br label %29
27: ; preds = %15
br label %11
28: ; preds = %11
store i8* null, i8** %4
br label %29
29: ; preds = %28, %22
%30 = load i8*, i8** %4
ret i8* %30
}

LLVM IR (-O2):
define i8* @memrchr8(i8* %0, i64 %1, i64 %2) {
%4 = bitcast i8* %0 to i64*
br label %5
5: ; preds = %9, %3
%6 = phi i64 [ %2, %3 ], [ %7, %9 ]
%7 = add i64 %6, -1
%8 = icmp eq i64 %6, 0
br i1 %8, label %16, label %9
9: ; preds = %5
%10 = getelementptr inbounds i64, i64* %4, i64 %7
%11 = load i64, i64* %10
%12 = icmp eq i64 %11, %1
br i1 %12, label %13, label %5
13: ; preds = %9
%14 = getelementptr inbounds i64, i64* %4, i64 %7
%15 = bitcast i64* %14 to i8*
br label %16
16: ; preds = %5, %13
%17 = phi i8* [ %15, %13 ], [ null, %5 ]
ret i8* %17
}
int exynos5_mif_thermal_add_notifier(struct notifier_block *n) { return 0; }


x86 assembly (clang, -O0):
<exynos5_mif_thermal_add_notifier>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exynos5_mif_thermal_add_notifier>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.notifier_block = type opaque
define i32 @exynos5_mif_thermal_add_notifier(%struct.notifier_block* %0) {
%2 = alloca %struct.notifier_block*
store %struct.notifier_block* %0, %struct.notifier_block** %2
ret i32 0
}

LLVM IR (-O2):
%struct.notifier_block = type opaque
define i32 @exynos5_mif_thermal_add_notifier(%struct.notifier_block* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
scalar_t__ SD_SoundPlaying();
void SD_WaitSoundDone(void) {
  while (SD_SoundPlaying())
    ;
}


x86 assembly (clang, -O0):
<SD_WaitSoundDone>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <SD_WaitSoundDone+0x9>
mov    $0x0,%al
call   1030 <SD_SoundPlaying@plt>
cmp    $0x0,%rax
je     112f <SD_WaitSoundDone+0x1f>
jmp    1119 <SD_WaitSoundDone+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SD_WaitSoundDone>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <SD_SoundPlaying@plt>
test   %rax,%rax
jne    1120 <SD_WaitSoundDone+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @SD_WaitSoundDone() {
br label %1
1: ; preds = %4, %0
%2 = call i64 (...) @SD_SoundPlaying()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %1
br label %1
5: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @SD_WaitSoundDone() {
br label %1
1: ; preds = %1, %0
%2 = tail call i64 (...) @SD_SoundPlaying()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %1
4: ; preds = %1
ret void
}
/* Variables and functions */
scalar_t__ isupper(int);
int tolower(int c) {
  if (isupper(c)) {
    return c + 0x20;
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     113b <tolower+0x2b>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <tolower+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
lea    0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @isupper(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 32
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ keyMetric(unsigned char, int /*<<< orphan*/,
                             int /*<<< orphan*/);
void menuMetric(int item) { keyMetric((unsigned char)item, 0, 0); }


x86 assembly (clang, -O0):
<menuMetric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
movzbl %al,%edi
mov    %edx,%esi
call   1030 <keyMetric@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<menuMetric>:
movzbl %dil,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <keyMetric@plt>

LLVM IR (-O0):
define void @menuMetric(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = call i32 @keyMetric(i8 zeroext %4, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @menuMetric(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = tail call i32 @keyMetric(i8 zeroext %2, i32 0, i32 0)
ret void
}
void Main_destruct(struct Main *self) {}


x86 assembly (clang, -O0):
<Main_destruct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Main_destruct>:
ret

LLVM IR (-O0):
%struct.Main = type opaque
define void @Main_destruct(%struct.Main* %0) {
%2 = alloca %struct.Main*
store %struct.Main* %0, %struct.Main** %2
ret void
}

LLVM IR (-O2):
%struct.Main = type opaque
define void @Main_destruct(%struct.Main* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ islower(int);
int toupper(int c) { return islower(c) ? c - ('a' - 'A') : c; }


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     113b <toupper+0x2b>
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <toupper+0x31>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 32
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ all_off();
int /*<<< orphan*/ write_data(int, int, int);
void mcp_init(void) {
  write_data(0x20, 0x00, 0x00);
  write_data(0x20, 0x01, 0x00);
  write_data(0x21, 0x00, 0x00);
  write_data(0x21, 0x01, 0x00);
  all_off();
}


x86 assembly (clang, -O0):
<mcp_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <write_data@plt>
mov    $0x20,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <write_data@plt>
mov    $0x21,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <write_data@plt>
mov    $0x21,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <write_data@plt>
mov    $0x0,%al
call   1040 <all_off@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcp_init>:
push   %rax
mov    $0x20,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <write_data@plt>
mov    $0x20,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <write_data@plt>
mov    $0x21,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <write_data@plt>
mov    $0x21,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <write_data@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <all_off@plt>

LLVM IR (-O0):
define void @mcp_init() {
%1 = call i32 @write_data(i32 32, i32 0, i32 0)
%2 = call i32 @write_data(i32 32, i32 1, i32 0)
%3 = call i32 @write_data(i32 33, i32 0, i32 0)
%4 = call i32 @write_data(i32 33, i32 1, i32 0)
%5 = call i32 (...) @all_off()
ret void
}

LLVM IR (-O2):
define void @mcp_init() {
%1 = tail call i32 @write_data(i32 32, i32 0, i32 0)
%2 = tail call i32 @write_data(i32 32, i32 1, i32 0)
%3 = tail call i32 @write_data(i32 33, i32 0, i32 0)
%4 = tail call i32 @write_data(i32 33, i32 1, i32 0)
%5 = tail call i32 (...) @all_off()
ret void
}
/* Variables and functions */
int abs(int /*<<< orphan*/);
int /*<<< orphan*/ atoi(char *);
char *getenv(char *);
int /*<<< orphan*/ s_set_max_slots(int);
void set_default_maxslots() {
  char *str;
  str = getenv("TS_SLOTS");
  if (str != NULL) {
    int slots;
    slots = abs(atoi(str));
    s_set_max_slots(slots);
  }
}


x86 assembly (clang, -O0):
<set_default_maxslots>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     117e <set_default_maxslots+0x3e>
mov    -0x8(%rbp),%rdi
call   1060 <atoi@plt>
mov    %eax,%edi
call   1040 <abs@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <s_set_max_slots@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_default_maxslots>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     1157 <set_default_maxslots+0x27>
mov    %rax,%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
neg    %edi
cmovs  %eax,%edi
pop    %rax
jmp    1040 <s_set_max_slots@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"TS_SLOTS\00"
define void @set_default_maxslots() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i8* @getenv(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %12
6: ; preds = %0
%7 = load i8*, i8** %1
%8 = call i32 @atoi(i8* %7)
%9 = call i32 @abs(i32 %8)
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @s_set_max_slots(i32 %10)
br label %12
12: ; preds = %6, %0
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"TS_SLOTS\00"
define void @set_default_maxslots() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i8* %1, null
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i32 @atoi(i8* %1)
%5 = tail call i32 @llvm.abs.i32(i32 %4, i1 true)
%6 = tail call i32 @s_set_max_slots(i32 %5)
br label %7
7: ; preds = %3, %0
ret void
}
void srvOPCUA_Init(void) {}


x86 assembly (clang, -O0):
<srvOPCUA_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srvOPCUA_Init>:
ret

LLVM IR (-O0):
define void @srvOPCUA_Init() {
ret void
}

LLVM IR (-O2):
define void @srvOPCUA_Init() {
ret void
}
void AO_malloc_enable_mmap(void) {}


x86 assembly (clang, -O0):
<AO_malloc_enable_mmap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AO_malloc_enable_mmap>:
ret

LLVM IR (-O0):
define void @AO_malloc_enable_mmap() {
ret void
}

LLVM IR (-O2):
define void @AO_malloc_enable_mmap() {
ret void
}
void restore_audio_state(void) {}


x86 assembly (clang, -O0):
<restore_audio_state>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<restore_audio_state>:
ret

LLVM IR (-O0):
define void @restore_audio_state() {
ret void
}

LLVM IR (-O2):
define void @restore_audio_state() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void free_int_array(int **anArray, int nbRows) {
  int i;
  for (i = 0; i < nbRows; i++) {
    free(anArray[i]);
  }
}


x86 assembly (clang, -O0):
<free_int_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_int_array+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_int_array+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_int_array>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1142 <free_int_array+0x32>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_int_array+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @free_int_array(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = call i32 @free(i32* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @free_int_array(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = load i32*, i32** %8
%10 = tail call i32 @free(i32* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
void usage(pname) { printf("Usage: %s [nx] [ny]", pname); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"Usage: %s [nx] [ny]\00"
define void @usage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"Usage: %s [nx] [ny]\00"
define void @usage(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
float etr_side_perimeter(float perimeter) {
  float side = perimeter / 3;
  return side;
}


x86 assembly (clang, -O0):
<etr_side_perimeter>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<etr_side_perimeter>:
divss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @etr_side_perimeter(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fdiv float %4, 3.000000e+00
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @etr_side_perimeter(float %0) {
%2 = fdiv float %0, 3.000000e+00
ret float %2
}
/* Type definitions */
struct stat {
  int st_mode;
};

/* Variables and functions */
int S_IRUSR;
int /*<<< orphan*/ stat(char *, struct stat *);
int verifPerm(char *rep) {
  struct stat repStat;
  stat(rep, &repStat);
  if (repStat.st_mode & S_IRUSR)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<verifPerm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
mov    -0x18(%rbp),%eax
mov    0x2ead(%rip),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
je     114a <verifPerm+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <verifPerm+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verifPerm>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    0x2ec0(%rip),%rax
mov    (%rax),%ecx
xor    %eax,%eax
and    (%rsp),%ecx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@S_IRUSR = global i32 0
define i32 @verifPerm(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @stat(i8* %5, %struct.stat* %4)
%7 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%8 = load i32, i32* %7
%9 = load i32, i32* @S_IRUSR
%10 = and i32 %8, %9
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %1
store i32 1, i32* %2
br label %14
13: ; preds = %1
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@S_IRUSR = global i32 0
define i32 @verifPerm(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%6 = load i32, i32* %5
%7 = load i32, i32* @S_IRUSR
%8 = and i32 %7, %6
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}
void *test_anti_range_91(unsigned n) {
  extern void *alloc_anti_range_91(unsigned) __attribute__((alloc_size(1)));
  if ((0x7fffffff * 2U + 1) - 2 <= n && n <= (0x7fffffff * 2U + 1) - 1)
    n = (0x7fffffff * 2U + 1) - 2 - 1;
  return alloc_anti_range_91(n);
}


x86 assembly (clang, -O0):
<test_anti_range_91>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xfffffffd,%eax
cmp    -0x4(%rbp),%eax
ja     113a <test_anti_range_91+0x2a>
cmpl   $0xfffffffe,-0x4(%rbp)
ja     113a <test_anti_range_91+0x2a>
movl   $0xfffffffc,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloc_anti_range_91@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_91>:
lea    0x3(%rdi),%eax
cmp    $0x2,%eax
mov    $0xfffffffc,%eax
cmovb  %eax,%edi
jmp    1030 <alloc_anti_range_91@plt>

LLVM IR (-O0):
define i8* @test_anti_range_91(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ule i32 -3, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, -2
br i1 %7, label %8, label %9
8: ; preds = %5
store i32 -4, i32* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i32, i32* %2
%11 = call i8* @alloc_anti_range_91(i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_91(i32 %0) {
%2 = add i32 %0, 3
%3 = icmp ult i32 %2, 2
%4 = select i1 %3, i32 -4, i32 %0
%5 = tail call i8* @alloc_anti_range_91(i32 %4)
ret i8* %5
}
int vbtree_node_level(int n) {
  int level = 0;
  while (n % 2 == 0) {
    level++;
    n /= 2;
  }
  return level;
}


x86 assembly (clang, -O0):
<vbtree_node_level>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113e <vbtree_node_level+0x3e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <vbtree_node_level+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbtree_node_level>:
xor    %eax,%eax
test   $0x1,%dil
jne    1121 <vbtree_node_level+0x21>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax)
add    $0x1,%eax
shr    $0x1f,%ecx
add    %edi,%ecx
sar    %ecx
mov    %ecx,%edi
test   $0x1,%cl
je     1110 <vbtree_node_level+0x10>
ret

LLVM IR (-O0):
define i32 @vbtree_node_level(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = sdiv i32 %11, 2
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @vbtree_node_level(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i32 [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = sdiv i32 %6, 2
%9 = and i32 %8, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %4, label %11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Variables and functions */
scalar_t__ ends_with(char *, char const *);
size_t strlen(char const *);
int cut_suffix(char str[], const char suffix[]) {
  if (ends_with(str, suffix)) {
    str[strlen(str) - strlen(suffix)] = '\0';
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<cut_suffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <ends_with@plt>
cmp    $0x0,%rax
je     1183 <cut_suffix+0x63>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rcx
mov    %rax,%rdx
mov    -0x20(%rbp),%rax
sub    %rdx,%rcx
movb   $0x0,(%rax,%rcx,1)
movl   $0x1,-0x4(%rbp)
jmp    118a <cut_suffix+0x6a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cut_suffix>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <ends_with@plt>
test   %rax,%rax
je     1157 <cut_suffix+0x37>
mov    %r15,%rdi
call   1030 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
sub    %rax,%rbx
movb   $0x0,(%r15,%rbx,1)
mov    $0x1,%eax
jmp    1159 <cut_suffix+0x39>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @cut_suffix(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i64 @ends_with(i8* %6, i8* %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i8*, i8** %4
%13 = call i64 @strlen(i8* %12)
%14 = load i8*, i8** %5
%15 = call i64 @strlen(i8* %14)
%16 = sub i64 %13, %15
%17 = getelementptr inbounds i8, i8* %11, i64 %16
store i8 0, i8* %17
store i32 1, i32* %3
br label %19
18: ; preds = %2
store i32 0, i32* %3
br label %19
19: ; preds = %18, %10
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @cut_suffix(i8* %0, i8* %1) {
%3 = tail call i64 @ends_with(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%7 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%8 = sub i64 %6, %7
%9 = getelementptr inbounds i8, i8* %0, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %2, %5
%11 = phi i32 [ 1, %5 ], [ 0, %2 ]
ret i32 %11
}
int test_imm_2Fint16_mem(short *val) {
  return ((*val) & (-0x2F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Fint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffffd1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Fint16_mem>:
movzwl (%rdi),%eax
test   $0xffd1,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Fint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -47
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Fint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -47
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
char *picmg_if_type(unsigned char b) {
  char *s;
  switch (b) {
  case 0x00:
    s = "Base Interface";
    break;
  case 0x01:
    s = "Fabric Interface";
    break;
  case 0x02:
    s = "Update Channel";
    break;
  case 0x03:
  default:
    s = "Reserved";
    break;
  }
  return (s);
}


x86 assembly (clang, -O0):
<picmg_if_type>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     1165 <picmg_if_type+0x65>
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xed9(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1170 <picmg_if_type+0x70>
lea    0xed8(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1170 <picmg_if_type+0x70>
lea    0xed9(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1170 <picmg_if_type+0x70>
jmp    1165 <picmg_if_type+0x65>
lea    0xed3(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<picmg_if_type>:
cmp    $0x2,%dil
ja     1119 <picmg_if_type+0x19>
movsbq %dil,%rax
lea    0xf27(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
lea    0xf0f(%rip),%rax
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Base Interface\00"
@.str.1 = [17 x i8] c"Fabric Interface\00"
@.str.2 = [15 x i8] c"Update Channel\00"
@.str.3 = [9 x i8] c"Reserved\00"
define i8* @picmg_if_type(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8*
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
switch i32 %5, label %10 [
i32 0, label %6
i32 1, label %7
i32 2, label %8
i32 3, label %9
]
6: ; preds = %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8** %3
br label %11
7: ; preds = %1
store i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8** %3
br label %11
8: ; preds = %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i8** %3
br label %11
9: ; preds = %1
br label %10
10: ; preds = %1, %9
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i8** %3
br label %11
11: ; preds = %10, %8, %7, %6
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [15 x i8] c"Base Interface\00"
@.str.1 = [17 x i8] c"Fabric Interface\00"
@.str.2 = [15 x i8] c"Update Channel\00"
@.str.3 = [9 x i8] c"Reserved\00"
@reltable.picmg_if_type = [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([15 x i8]* @.str to i64), i64 ptrtoint ([3 x i32]* @reltable.picmg_if_type to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.1 to i64), i64 ptrtoint ([3 x i32]* @reltable.picmg_if_type to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([15 x i8]* @.str.2 to i64), i64 ptrtoint ([3 x i32]* @reltable.picmg_if_type to i64)) to i32)]
define i8* @picmg_if_type(i8 zeroext %0) {
%2 = icmp ult i8 %0, 3
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i8 %0 to i64
%5 = shl i64 %4, 2
%6 = call i8* @llvm.load.relative.i64(i8* bitcast ([3 x i32]* @reltable.picmg_if_type to i8*), i64 %5)
br label %7
7: ; preds = %1, %3
%8 = phi i8* [ %6, %3 ], [ getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), %1 ]
ret i8* %8
}
float f(float x) { return x * 2; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
addss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 2.000000e+00
ret float %4
}

LLVM IR (-O2):
define float @f(float %0) {
%2 = fmul float %0, 2.000000e+00
ret float %2
}
void cleanup_routine(void *arg) {}


x86 assembly (clang, -O0):
<cleanup_routine>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup_routine>:
ret

LLVM IR (-O0):
define void @cleanup_routine(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @cleanup_routine(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr1setBank7(int);
void m80setParams7EF5(uint16_t addr, uint8_t val) {
  (void)addr;
  chr1setBank7(val << 10);
}


x86 assembly (clang, -O0):
<m80setParams7EF5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xa,%edi
call   1030 <chr1setBank7@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m80setParams7EF5>:
mov    %esi,%edi
shl    $0xa,%edi
jmp    1030 <chr1setBank7@plt>

LLVM IR (-O0):
define void @m80setParams7EF5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 10
%8 = call i32 @chr1setBank7(i32 %7)
ret void
}

LLVM IR (-O2):
define void @m80setParams7EF5(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = tail call i32 @chr1setBank7(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(int);
int /*<<< orphan*/ printf(char *);
int main() {
  int err = 0, err2 = 0;
  printf("This is"
         "ver 0");
  error(err);
  error(err2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <error@plt>
mov    -0xc(%rbp),%edi
call   1040 <error@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <error@plt>
xor    %edi,%edi
call   1040 <error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"This isver 0\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
%6 = call i32 @error(i32 %5)
%7 = load i32, i32* %3
%8 = call i32 @error(i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"This isver 0\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @error(i32 0)
%3 = tail call i32 @error(i32 0)
ret i32 0
}
/* Variables and functions */
size_t dict_hash_string(const char **key) {
  size_t h = 5381;
  const char *str = *key;
  while (*str != 0)
    h = h * 33 ^ *str++;
  return h;
}


x86 assembly (clang, -O0):
<dict_hash_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     114f <dict_hash_string+0x4f>
imul   $0x21,-0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbq (%rcx),%rcx
xor    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    111b <dict_hash_string+0x1b>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dict_hash_string>:
mov    (%rdi),%rcx
mov    (%rcx),%dl
test   %dl,%dl
je     113d <dict_hash_string+0x3d>
add    $0x1,%rcx
mov    $0x1505,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %rax,%rsi
shl    $0x5,%rsi
add    %rax,%rsi
movsbq %dl,%rax
xor    %rsi,%rax
movzbl (%rcx),%edx
add    $0x1,%rcx
test   %dl,%dl
jne    1120 <dict_hash_string+0x20>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @dict_hash_string(i8** %0) {
%2 = alloca i8**
%3 = alloca i64
%4 = alloca i8*
store i8** %0, i8*** %2
store i64 5381, i64* %3
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
store i8* %6, i8** %4
br label %7
7: ; preds = %12, %1
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %7
%13 = load i64, i64* %3
%14 = mul i64 %13, 33
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = sext i8 %17 to i64
%19 = xor i64 %14, %18
store i64 %19, i64* %3
br label %7
20: ; preds = %7
%21 = load i64, i64* %3
ret i64 %21
}

LLVM IR (-O2):
define i64 @dict_hash_string(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %1, %5
%6 = phi i8 [ %13, %5 ], [ %3, %1 ]
%7 = phi i8* [ %10, %5 ], [ %2, %1 ]
%8 = phi i64 [ %12, %5 ], [ 5381, %1 ]
%9 = mul i64 %8, 33
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = sext i8 %6 to i64
%12 = xor i64 %9, %11
%13 = load i8, i8* %10
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %1
%16 = phi i64 [ 5381, %1 ], [ %12, %5 ]
ret i64 %16
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int, int);
void hashsg_clear(char *buffer, int v) { memset(buffer, v, 20); }


x86 assembly (clang, -O0):
<hashsg_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x14,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashsg_clear>:
mov    $0x14,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @hashsg_clear(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @memset(i8* %5, i32 %6, i32 20)
ret void
}

LLVM IR (-O2):
define void @hashsg_clear(i8* %0, i32 %1) {
%3 = tail call i32 @memset(i8* %0, i32 %1, i32 20)
ret void
}
/* Variables and functions */
double const fabsk(double);
__attribute__((visibility("default"))) const double xfabs(double x) {
  return fabsk(x);
}


x86 assembly (clang, -O0):
<xfabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fabsk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfabs>:
jmp    1030 <fabsk@plt>

LLVM IR (-O0):
define double @xfabs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @fabsk(double %3)
ret double %4
}

LLVM IR (-O2):
define double @xfabs(double %0) {
%2 = tail call double @fabsk(double %0)
ret double %2
}
char *
vertical_new_button_many_element_name(char *vertical_new_button_many_label) {
  return vertical_new_button_many_label;
}


x86 assembly (clang, -O0):
<vertical_new_button_many_element_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vertical_new_button_many_element_name>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @vertical_new_button_many_element_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @vertical_new_button_many_element_name(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint8_t AES_xtime(uint32_t x) { return (x & 0x80) ? (x << 1) ^ 0x1b : x << 1; }


x86 assembly (clang, -O0):
<AES_xtime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1129 <AES_xtime+0x29>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
xor    $0x1b,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <AES_xtime+0x32>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AES_xtime>:
lea    (%rdi,%rdi,1),%ecx
mov    %ecx,%eax
xor    $0x1b,%eax
test   $0x80,%dil
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @AES_xtime(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 128
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = shl i32 %7, 1
%9 = xor i32 %8, 27
br label %13
10: ; preds = %1
%11 = load i32, i32* %2
%12 = shl i32 %11, 1
br label %13
13: ; preds = %10, %6
%14 = phi i32 [ %9, %6 ], [ %12, %10 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @AES_xtime(i32 %0) {
%2 = and i32 %0, 128
%3 = icmp eq i32 %2, 0
%4 = shl i32 %0, 1
%5 = xor i32 %4, 27
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ log_message(char *);
int just_check_status(unsigned char *packet) {
  if (packet[1] == 0x00) {
    return 0;
  }
  log_message(
      "operations: just_check_status: status is not ATSHA204_STATUS_SUCCES");
  return 4;
}


x86 assembly (clang, -O0):
<just_check_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
cmp    $0x0,%eax
jne    1139 <just_check_status+0x29>
movl   $0x0,-0x4(%rbp)
jmp    114c <just_check_status+0x3c>
lea    0xec0(%rip),%rdi
call   1030 <log_message@plt>
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<just_check_status>:
push   %rax
cmpb   $0x0,0x1(%rdi)
je     112a <just_check_status+0x1a>
lea    0xee2(%rip),%rdi
call   1030 <log_message@plt>
mov    $0x4,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [68 x i8] c"operations: just_check_status: status is not ATSHA204_STATUS_SUCCES\00"
define i32 @just_check_status(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %12
10: ; preds = %1
%11 = call i32 @log_message(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0))
store i32 4, i32* %2
br label %12
12: ; preds = %10, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [68 x i8] c"operations: just_check_status: status is not ATSHA204_STATUS_SUCCES\00"
define i32 @just_check_status(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @log_message(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ 4, %5 ], [ 0, %1 ]
ret i32 %8
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
size_t bootpart_size(const char *part_type) {
  if (strcmp(part_type, "APM") == 0 || strcmp(part_type, "MBR") == 0)
    return (800 * 1024);
  return (0);
}


x86 assembly (clang, -O0):
<bootpart_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1150 <bootpart_size+0x40>
mov    -0x10(%rbp),%rdi
lea    0xec3(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    115d <bootpart_size+0x4d>
movq   $0xc8000,-0x8(%rbp)
jmp    1165 <bootpart_size+0x55>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bootpart_size>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     1144 <bootpart_size+0x34>
lea    0xed8(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
mov    $0xc8000,%eax
cmovne %rcx,%rax
pop    %rbx
ret
mov    $0xc8000,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"APM\00"
@.str.1 = [4 x i8] c"MBR\00"
define i64 @bootpart_size(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i64 @strcmp(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i64 819200, i64* %2
br label %13
12: ; preds = %7
store i64 0, i64* %2
br label %13
13: ; preds = %12, %11
%14 = load i64, i64* %2
ret i64 %14
}

LLVM IR (-O2):
@.str = [4 x i8] c"APM\00"
@.str.1 = [4 x i8] c"MBR\00"
define i64 @bootpart_size(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i64 819200, i64 0
br label %8
8: ; preds = %4, %1
%9 = phi i64 [ 819200, %1 ], [ %7, %4 ]
ret i64 %9
}
int even(const int a) { return a % 2 == 0; }


x86 assembly (clang, -O0):
<even>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<even>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @even(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @even(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
void foo410() {}


x86 assembly (clang, -O0):
<foo410>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo410>:
ret

LLVM IR (-O0):
define void @foo410() {
ret void
}

LLVM IR (-O2):
define void @foo410() {
ret void
}