xunge/DecIR huggingface dataset:
int test_imm_BDuint16_reg(unsigned short val) {
  return ((val) & (0xBD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BDuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xbd,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BDuint16_reg>:
test   $0xbd,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BDuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 189
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BDuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 189
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ read_config();
int /*<<< orphan*/ sleep(int);
int main() {
  printf("[*] Server starting...\n");
  read_config();
  printf("[*] Server started successfully.\n");
  while (1) {
    printf("[*] Processing request... ");
    sleep(1);
    printf("DONE.\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <read_config@plt>
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
jmp    115e <main+0x2e>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed0(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1050 <read_config@plt>
lea    0xed4(%rip),%rdi
call   1030 <puts@plt>
lea    0xe96(%rip),%r14
lea    0xee2(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1060 <sleep@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
jmp    1180 <main+0x40>

LLVM IR (-O0):
@.str = [24 x i8] c"[*] Server starting...\0A\00"
@.str.1 = [34 x i8] c"[*] Server started successfully.\0A\00"
@.str.2 = [27 x i8] c"[*] Processing request... \00"
@.str.3 = [7 x i8] c"DONE.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @read_config()
%4 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0))
br label %5
5: ; preds = %0, %5
%6 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
%7 = call i32 @sleep(i32 1)
%8 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.3, i64 0, i64 0))
br label %5
}

LLVM IR (-O2):
@.str.2 = [27 x i8] c"[*] Processing request... \00"
@str = [23 x i8] c"[*] Server starting...\00"
@str.4 = [33 x i8] c"[*] Server started successfully.\00"
@str.5 = [6 x i8] c"DONE.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @read_config()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str.4, i64 0, i64 0))
br label %4
4: ; preds = %0, %4
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
%6 = tail call i32 @sleep(i32 1)
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.5, i64 0, i64 0))
br label %4
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
scalar_t__ sysconf(int /*<<< orphan*/);
int32_t num_cpus() {
  int32_t cpus;
  cpus = (int32_t)sysconf(_SC_NPROCESSORS_ONLN);
  if (cpus <= 0)
    cpus = 1;
  return cpus;
}


x86 assembly (clang, -O0):
<num_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jg     113a <num_cpus+0x2a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_cpus>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
test   %eax,%eax
mov    $0x1,%ecx
cmovle %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @num_cpus() {
%1 = alloca i32
%2 = load i32, i32* @_SC_NPROCESSORS_ONLN
%3 = call i64 @sysconf(i32 %2)
%4 = trunc i64 %3 to i32
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = icmp sle i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %1
br label %8
8: ; preds = %7, %0
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @num_cpus() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i64 @sysconf(i32 %1)
%3 = trunc i64 %2 to i32
%4 = icmp sgt i32 %3, 1
%5 = select i1 %4, i32 %3, i32 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main_preinit2(void) {
  printf("main_preinit2"
         "\n");
}


x86 assembly (clang, -O0):
<main_preinit2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_preinit2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"main_preinit2\0A\00"
define void @main_preinit2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"main_preinit2\00"
define void @main_preinit2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  char **gl_pathv;
};
typedef TYPE_1__ glob_t;

/* Variables and functions */
char **octave_glob_match_list(void *glob_info) {
  return glob_info ? ((glob_t *)glob_info)->gl_pathv : 0;
}


x86 assembly (clang, -O0):
<octave_glob_match_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1123 <octave_glob_match_list+0x23>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
jmp    112e <octave_glob_match_list+0x2e>
xor    %eax,%eax
mov    %rax,-0x10(%rbp)
jmp    112e <octave_glob_match_list+0x2e>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_glob_match_list>:
test   %rdi,%rdi
je     1109 <octave_glob_match_list+0x9>
mov    (%rdi),%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i8** }
define i8** @octave_glob_match_list(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
%9 = load i8**, i8*** %8
br label %11
10: ; preds = %1
br label %11
11: ; preds = %10, %5
%12 = phi i8** [ %9, %5 ], [ null, %10 ]
ret i8** %12
}

LLVM IR (-O2):
define i8** @octave_glob_match_list(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i8***
%5 = load i8**, i8*** %4
br label %6
6: ; preds = %1, %3
%7 = phi i8** [ %5, %3 ], [ null, %1 ]
ret i8** %7
}
/* Type definitions */
struct Edge {
  int dummy;
};

/* Variables and functions */
struct Edge *edge_rot(struct Edge *);
struct Edge *edge_sym(struct Edge *edge) {
  return edge_rot(edge_rot(edge));
}


x86 assembly (clang, -O0):
<edge_sym>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <edge_rot@plt>
mov    %rax,%rdi
call   1030 <edge_rot@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<edge_sym>:
push   %rax
call   1030 <edge_rot@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <edge_rot@plt>

LLVM IR (-O0):
%struct.Edge = type { i32 }
define %struct.Edge* @edge_sym(%struct.Edge* %0) {
%2 = alloca %struct.Edge*
store %struct.Edge* %0, %struct.Edge** %2
%3 = load %struct.Edge*, %struct.Edge** %2
%4 = call %struct.Edge* @edge_rot(%struct.Edge* %3)
%5 = call %struct.Edge* @edge_rot(%struct.Edge* %4)
ret %struct.Edge* %5
}

LLVM IR (-O2):
%struct.Edge = type { i32 }
define %struct.Edge* @edge_sym(%struct.Edge* %0) {
%2 = tail call %struct.Edge* @edge_rot(%struct.Edge* %0)
%3 = tail call %struct.Edge* @edge_rot(%struct.Edge* %2)
ret %struct.Edge* %3
}
/* Type definitions */
struct nl_sock {
  int dummy;
};

/* Variables and functions */
struct nl_sock *nl_socket_alloc();
int /*<<< orphan*/ panic(char *);
struct nl_sock *nl80211_nl_socket_xalloc(void) {
  struct nl_sock *ret = nl_socket_alloc();
  if (!ret)
    panic("Cannot allocate nl socket memory!\n");
  return ret;
}


x86 assembly (clang, -O0):
<nl80211_nl_socket_xalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <nl_socket_alloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114a <nl80211_nl_socket_xalloc+0x2a>
lea    0xebb(%rip),%rdi
call   1030 <panic@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nl80211_nl_socket_xalloc>:
push   %rbx
xor    %eax,%eax
call   1040 <nl_socket_alloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113c <nl80211_nl_socket_xalloc+0x1c>
lea    0xec9(%rip),%rdi
call   1030 <panic@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.nl_sock = type { i32 }
@.str = [35 x i8] c"Cannot allocate nl socket memory!\0A\00"
define %struct.nl_sock* @nl80211_nl_socket_xalloc() {
%1 = alloca %struct.nl_sock*
%2 = call %struct.nl_sock* (...) @nl_socket_alloc()
store %struct.nl_sock* %2, %struct.nl_sock** %1
%3 = load %struct.nl_sock*, %struct.nl_sock** %1
%4 = icmp ne %struct.nl_sock* %3, null
br i1 %4, label %7, label %5
5: ; preds = %0
%6 = call i32 @panic(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = load %struct.nl_sock*, %struct.nl_sock** %1
ret %struct.nl_sock* %8
}

LLVM IR (-O2):
%struct.nl_sock = type { i32 }
@.str = [35 x i8] c"Cannot allocate nl socket memory!\0A\00"
define %struct.nl_sock* @nl80211_nl_socket_xalloc() {
%1 = tail call %struct.nl_sock* (...) @nl_socket_alloc()
%2 = icmp eq %struct.nl_sock* %1, null
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @panic(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret %struct.nl_sock* %1
}
unsigned int GPMCPrefetchFifoThrldStatusGet(unsigned int baseAddr) {
  unsigned int status;
  status =
      (((*((volatile unsigned int *)(baseAddr + (0x1F0)))) & (0x00010000u)) >>
       (0x00000010u));
  return (status);
}


x86 assembly (clang, -O0):
<GPMCPrefetchFifoThrldStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1f0,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x10000,%eax
shr    $0x10,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCPrefetchFifoThrldStatusGet>:
add    $0x1f0,%edi
mov    (%rdi),%eax
shr    $0x10,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @GPMCPrefetchFifoThrldStatusGet(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add i32 %4, 496
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, 65536
%10 = lshr i32 %9, 16
store i32 %10, i32* %3
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @GPMCPrefetchFifoThrldStatusGet(i32 %0) {
%2 = add i32 %0, 496
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = lshr i32 %5, 16
%7 = and i32 %6, 1
ret i32 %7
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("!!!Hello World!!!");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"!!!Hello World!!!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str = [18 x i8] c"!!!Hello World!!!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int atoi(char const *);
int /*<<< orphan*/ printf(char *, int);
void two(const char *grade) {
  int tmp = atoi(grade);
  if (tmp > 70)
    printf("%d passed!\n", tmp);
  else
    printf("%d not passed!\n", tmp);
}


x86 assembly (clang, -O0):
<two>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x46,-0xc(%rbp)
jle    1156 <two+0x36>
mov    -0xc(%rbp),%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
jmp    1165 <two+0x45>
mov    -0xc(%rbp),%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<two>:
push   %rax
call   1040 <atoi@plt>
cmp    $0x47,%eax
lea    0xed0(%rip),%rcx
lea    0xed5(%rip),%rdi
cmovge %rcx,%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%d passed!\0A\00"
@.str.1 = [16 x i8] c"%d not passed!\0A\00"
define void @two(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @atoi(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 70
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d passed!\0A\00"
@.str.1 = [16 x i8] c"%d not passed!\0A\00"
define void @two(i8* nocapture %0) {
%2 = tail call i32 @atoi(i8* %0)
%3 = icmp sgt i32 %2, 70
%4 = select i1 %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i32 @printf(i8* %4, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ accelerate(int);
void move_subir() {
  accelerate(0);
  accelerate(1);
  accelerate(2);
  accelerate(3);
}


x86 assembly (clang, -O0):
<move_subir>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <accelerate@plt>
mov    $0x1,%edi
call   1030 <accelerate@plt>
mov    $0x2,%edi
call   1030 <accelerate@plt>
mov    $0x3,%edi
call   1030 <accelerate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_subir>:
push   %rax
xor    %edi,%edi
call   1030 <accelerate@plt>
mov    $0x1,%edi
call   1030 <accelerate@plt>
mov    $0x2,%edi
call   1030 <accelerate@plt>
mov    $0x3,%edi
pop    %rax
jmp    1030 <accelerate@plt>

LLVM IR (-O0):
define void @move_subir() {
%1 = call i32 @accelerate(i32 0)
%2 = call i32 @accelerate(i32 1)
%3 = call i32 @accelerate(i32 2)
%4 = call i32 @accelerate(i32 3)
ret void
}

LLVM IR (-O2):
define void @move_subir() {
%1 = tail call i32 @accelerate(i32 0)
%2 = tail call i32 @accelerate(i32 1)
%3 = tail call i32 @accelerate(i32 2)
%4 = tail call i32 @accelerate(i32 3)
ret void
}
int of_regulator_match(struct device_d *dev, struct device_node *node,
                       struct of_regulator_match *matches,
                       unsigned int num_matches) {
  return 0;
}


x86 assembly (clang, -O0):
<of_regulator_match>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_regulator_match>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device_d = type opaque
%struct.device_node = type opaque
%struct.of_regulator_match = type opaque
define i32 @of_regulator_match(%struct.device_d* %0, %struct.device_node* %1, %struct.of_regulator_match* %2, i32 %3) {
%5 = alloca %struct.device_d*
%6 = alloca %struct.device_node*
%7 = alloca %struct.of_regulator_match*
%8 = alloca i32
store %struct.device_d* %0, %struct.device_d** %5
store %struct.device_node* %1, %struct.device_node** %6
store %struct.of_regulator_match* %2, %struct.of_regulator_match** %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
%struct.device_d = type opaque
%struct.device_node = type opaque
%struct.of_regulator_match = type opaque
define i32 @of_regulator_match(%struct.device_d* nocapture readnone %0, %struct.device_node* nocapture readnone %1, %struct.of_regulator_match* nocapture readnone %2, i32 %3) {
ret i32 0
}
/* Type definitions */
typedef int int8_t;
typedef int /*<<< orphan*/ input;
typedef int /*<<< orphan*/ expected;

/* Variables and functions */
int /*<<< orphan*/ test_rebase(int, int *, int, int, int *, int);
void test_binary_to_single_decimal(void) {
  int8_t input[] = {1, 0, 1};
  int8_t expected[] = {5};
  test_rebase(2, input, (sizeof(input) / sizeof(input[0])), 10, expected,
              (sizeof(expected) / sizeof(expected[0])));
}


x86 assembly (clang, -O0):
<test_binary_to_single_decimal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x4(%rbp)
mov    0xeda(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%r8
mov    $0x2,%edi
mov    $0x3,%edx
mov    $0xa,%ecx
mov    $0x1,%r9d
call   1030 <test_rebase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_binary_to_single_decimal>:
sub    $0x18,%rsp
mov    0xeee(%rip),%eax
mov    %eax,0x10(%rsp)
mov    0xedb(%rip),%rax
mov    %rax,0x8(%rsp)
movl   $0x5,0x4(%rsp)
lea    0x8(%rsp),%rsi
lea    0x4(%rsp),%r8
mov    $0x2,%edi
mov    $0x3,%edx
mov    $0xa,%ecx
mov    $0x1,%r9d
call   1030 <test_rebase@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.test_binary_to_single_decimal.input = [3 x i32] [i32 1, i32 0, i32 1]
@__const.test_binary_to_single_decimal.expected = [1 x i32] [i32 5]
define void @test_binary_to_single_decimal() {
%1 = alloca [3 x i32]
%2 = alloca [1 x i32]
%3 = bitcast [3 x i32]* %1 to i8*
%4 = bitcast [1 x i32]* %2 to i8*
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
%6 = getelementptr inbounds [1 x i32], [1 x i32]* %2, i64 0, i64 0
%7 = call i32 @test_rebase(i32 2, i32* %5, i32 3, i32 10, i32* %6, i32 1)
ret void
}

LLVM IR (-O2):
@__const.test_binary_to_single_decimal.input = [3 x i32] [i32 1, i32 0, i32 1]
define void @test_binary_to_single_decimal() {
%1 = alloca [3 x i32]
%2 = alloca [1 x i32]
%3 = bitcast [3 x i32]* %1 to i8*
%4 = bitcast [1 x i32]* %2 to i8*
%5 = getelementptr inbounds [1 x i32], [1 x i32]* %2, i64 0, i64 0
store i32 5, i32* %5
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
%7 = call i32 @test_rebase(i32 2, i32* %6, i32 3, i32 10, i32* %5, i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ write_at_ble8(void *, int /*<<< orphan*/, size_t);
void write_at_le8(void *dest, uint8_t val, size_t offset) {
  write_at_ble8(dest, val, offset);
}


x86 assembly (clang, -O0):
<write_at_le8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <write_at_ble8@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_at_le8>:
jmp    1030 <write_at_ble8@plt>

LLVM IR (-O0):
define void @write_at_le8(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i64, i64* %6
%10 = call i32 @write_at_ble8(i8* %7, i32 %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @write_at_le8(i8* %0, i32 %1, i64 %2) {
%4 = tail call i32 @write_at_ble8(i8* %0, i32 %1, i64 %2)
ret void
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ printf(char *, char);
scalar_t__ rand();
int /*<<< orphan*/ srand(int);
int time(int /*<<< orphan*/ *);
int main() {
  char c;
  srand(time(NULL) * getpid());
  while (1)
    printf("%c", (char)rand() % 256);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1060 <time@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0xc(%rbp),%edi
imul   %eax,%edi
call   1050 <srand@plt>
mov    $0x0,%al
call   1070 <rand@plt>
movsbl %al,%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    %dl,%al
lea    0xe68(%rip),%rdi
movsbl %al,%esi
call   1040 <printf@plt>
jmp    117d <main+0x2d>

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %edi,%edi
call   1060 <time@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <getpid@plt>
imul   %eax,%ebx
mov    %ebx,%edi
call   1050 <srand@plt>
lea    0xe8e(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1070 <rand@plt>
movsbl %al,%esi
mov    %rbx,%rdi
call   1040 <printf@plt>
jmp    1180 <main+0x30>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call i32 @time(i32* null)
%4 = call i32 (...) @getpid()
%5 = mul nsw i32 %3, %4
%6 = call i32 @srand(i32 %5)
br label %7
7: ; preds = %0, %7
%8 = call i64 (...) @rand()
%9 = trunc i64 %8 to i8
%10 = sext i8 %9 to i32
%11 = srem i32 %10, 256
%12 = trunc i32 %11 to i8
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %12)
br label %7
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 (...) @getpid()
%3 = mul nsw i32 %2, %1
%4 = tail call i32 @srand(i32 %3)
br label %5
5: ; preds = %5, %0
%6 = tail call i64 (...) @rand()
%7 = trunc i64 %6 to i8
%8 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %7)
br label %5
}
/* Variables and functions */
int pop();
int /*<<< orphan*/ push(int);
void apply_mul(void) {
  int arg2 = pop();
  int arg1 = pop();
  push(arg1 * arg2);
}


x86 assembly (clang, -O0):
<apply_mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <pop@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <pop@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
imul   -0x4(%rbp),%edi
call   1040 <push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<apply_mul>:
push   %rbx
xor    %eax,%eax
call   1030 <pop@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <pop@plt>
imul   %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <push@plt>

LLVM IR (-O0):
define void @apply_mul() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @pop()
store i32 %3, i32* %1
%4 = call i32 (...) @pop()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* %1
%7 = mul nsw i32 %5, %6
%8 = call i32 @push(i32 %7)
ret void
}

LLVM IR (-O2):
define void @apply_mul() {
%1 = tail call i32 (...) @pop()
%2 = tail call i32 (...) @pop()
%3 = mul nsw i32 %2, %1
%4 = tail call i32 @push(i32 %3)
ret void
}
unsigned long long zigzagenc63(long long x) {
  x = (x << 2 | ((x >> 62) & 2)) ^ x >> 63;
  return x;
}


x86 assembly (clang, -O0):
<zigzagenc63>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x2,%rax
mov    -0x8(%rbp),%rcx
sar    $0x3e,%rcx
and    $0x2,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
sar    $0x3f,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zigzagenc63>:
mov    %rdi,%rax
rol    $0x2,%rax
and    $0xfffffffffffffffe,%rax
sar    $0x3f,%rdi
xor    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @zigzagenc63(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 2
%5 = load i64, i64* %2
%6 = ashr i64 %5, 62
%7 = and i64 %6, 2
%8 = or i64 %4, %7
%9 = load i64, i64* %2
%10 = ashr i64 %9, 63
%11 = xor i64 %8, %10
store i64 %11, i64* %2
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
define i64 @zigzagenc63(i64 %0) {
%2 = shl i64 %0, 2
%3 = lshr i64 %0, 62
%4 = and i64 %3, 2
%5 = or i64 %4, %2
%6 = ashr i64 %0, 63
%7 = xor i64 %5, %6
ret i64 %7
}
int get_rounding_mode(void) {
  return ((((((((0) & 1) | ((0) & 2) | ((0) & 4)) ^ 7)) & 1) | ((0) & 2) |
           ((0) & 4)) ^
          7);
}


x86 assembly (clang, -O0):
<get_rounding_mode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rounding_mode>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @get_rounding_mode() {
ret i32 6
}

LLVM IR (-O2):
define i32 @get_rounding_mode() {
ret i32 6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntEnable(int /*<<< orphan*/);
int /*<<< orphan*/ IntRegister(int /*<<< orphan*/, void (*)());
int /*<<< orphan*/ _OneWireIntNumberGet(int /*<<< orphan*/);
void OneWireIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  uint32_t ui32Int;
  ;
  ;
  ui32Int = _OneWireIntNumberGet(ui32Base);
  ;
  IntRegister(ui32Int, pfnHandler);
  IntEnable(ui32Int);
}


x86 assembly (clang, -O0):
<OneWireIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <_OneWireIntNumberGet@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x14(%rbp),%edi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OneWireIntRegister>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1050 <_OneWireIntNumberGet@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
call   1040 <IntRegister@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @OneWireIntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
%5 = alloca i32
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%6 = load i32, i32* %3
%7 = call i32 @_OneWireIntNumberGet(i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load void ()*, void ()** %4
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i32 %8, void (...)* %10)
%12 = load i32, i32* %5
%13 = call i32 @IntEnable(i32 %12)
ret void
}

LLVM IR (-O2):
define void @OneWireIntRegister(i32 %0, void ()* %1) {
%3 = tail call i32 @_OneWireIntNumberGet(i32 %0)
%4 = bitcast void ()* %1 to void (...)*
%5 = tail call i32 @IntRegister(i32 %3, void (...)* %4)
%6 = tail call i32 @IntEnable(i32 %3)
ret void
}
int pm8058_mpp_config(unsigned mpp, unsigned type, unsigned level,
                      unsigned control) {
  return -22;
}


x86 assembly (clang, -O0):
<pm8058_mpp_config>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    $0xffffffea,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm8058_mpp_config>:
mov    $0xffffffea,%eax
ret

LLVM IR (-O0):
define i32 @pm8058_mpp_config(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret i32 -22
}

LLVM IR (-O2):
define i32 @pm8058_mpp_config(i32 %0, i32 %1, i32 %2, i32 %3) {
ret i32 -22
}
void plt_3d_line_free_aux(void *ptr) {}


x86 assembly (clang, -O0):
<plt_3d_line_free_aux>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<plt_3d_line_free_aux>:
ret

LLVM IR (-O0):
define void @plt_3d_line_free_aux(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @plt_3d_line_free_aux(i8* nocapture %0) {
ret void
}
void set_722(void *pnt, unsigned int i) {
  unsigned char *p = (unsigned char *)pnt;
  p[0] = (i >> 8) & 0xff;
  p[1] = i & 0xff;
}


x86 assembly (clang, -O0):
<set_722>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_722>:
rol    $0x8,%si
mov    %si,(%rdi)
ret

LLVM IR (-O0):
define void @set_722(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = lshr i32 %7, 8
%9 = and i32 %8, 255
%10 = trunc i32 %9 to i8
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i64 0
store i8 %10, i8* %12
%13 = load i32, i32* %4
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i64 1
store i8 %15, i8* %17
ret void
}

LLVM IR (-O2):
define void @set_722(i8* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = trunc i32 %3 to i8
store i8 %4, i8* %0
%5 = trunc i32 %1 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
ret void
}
void rop3_171_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T | S;
  stk2 = ~stk2;
  stk1 = *D | stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_171_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_171_0_0>:
or     %edx,%esi
not    %sil
or     %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_171_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8, i8* %8
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %8
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = load i8*, i8** %4
store i8 %26, i8* %27
ret void
}

LLVM IR (-O2):
define void @rop3_171_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = or i8 %2, %1
%5 = xor i8 %4, -1
%6 = load i8, i8* %0
%7 = or i8 %6, %5
store i8 %7, i8* %0
ret void
}
int is_in_bound(int *arr, int size, int *ptr) {
  if ((arr + size) > ptr && ptr >= arr)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
cmp    -0x20(%rbp),%rax
jbe    1142 <is_in_bound+0x42>
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jb     1142 <is_in_bound+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1149 <is_in_bound+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
movslq %esi,%rax
lea    (%rdi,%rax,4),%rax
cmp    %rdx,%rax
seta   %al
cmp    %rdi,%rdx
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32*, i32** %7
%13 = icmp ugt i32* %11, %12
br i1 %13, label %14, label %19
14: ; preds = %3
%15 = load i32*, i32** %7
%16 = load i32*, i32** %5
%17 = icmp uge i32* %15, %16
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 1, i32* %4
br label %20
19: ; preds = %14, %3
store i32 0, i32* %4
br label %20
20: ; preds = %19, %18
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* readnone %0, i32 %1, i32* readnone %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = icmp ugt i32* %5, %2
%7 = icmp uge i32* %2, %0
%8 = and i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
void _mesa_svga32_dummy_function(void) {}


x86 assembly (clang, -O0):
<_mesa_svga32_dummy_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mesa_svga32_dummy_function>:
ret

LLVM IR (-O0):
define void @_mesa_svga32_dummy_function() {
ret void
}

LLVM IR (-O2):
define void @_mesa_svga32_dummy_function() {
ret void
}
unsigned int shift(unsigned int value, int n) {
  if (n > 0) {
    value <<= n;
  } else {
    value >>= -n;
  }
  return value;
}


x86 assembly (clang, -O0):
<shift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1124 <shift+0x24>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x4(%rbp)
jmp    1131 <shift+0x31>
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
shr    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift>:
mov    %edi,%eax
mov    %esi,%ecx
shl    %cl,%eax
neg    %cl
shr    %cl,%edi
test   %esi,%esi
cmovle %edi,%eax
ret

LLVM IR (-O0):
define i32 @shift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = shl i32 %9, %8
store i32 %10, i32* %3
br label %16
11: ; preds = %2
%12 = load i32, i32* %4
%13 = sub nsw i32 0, %12
%14 = load i32, i32* %3
%15 = lshr i32 %14, %13
store i32 %15, i32* %3
br label %16
16: ; preds = %11, %7
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @shift(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = shl i32 %0, %1
%5 = sub nsw i32 0, %1
%6 = lshr i32 %0, %5
%7 = select i1 %3, i32 %4, i32 %6
ret i32 %7
}
/* Variables and functions */
int strlen(char *);
int __test() { return strlen("FOO"); }


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <strlen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
lea    0xee9(%rip),%rdi
jmp    1030 <strlen@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"FOO\00"
define i32 @__test() {
%1 = call i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [4 x i8] c"FOO\00"
define i32 @__test() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void genmul_s() {}


x86 assembly (clang, -O0):
<genmul_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genmul_s>:
ret

LLVM IR (-O0):
define void @genmul_s() {
ret void
}

LLVM IR (-O2):
define void @genmul_s() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ compose_ptr;
};
typedef TYPE_1__ XComposeStatus;

/* Variables and functions */
void *get_XComposeStatus_compose_ptr(void *_p) {
  return (void *)((XComposeStatus *)_p)->compose_ptr;
}


x86 assembly (clang, -O0):
<get_XComposeStatus_compose_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XComposeStatus_compose_ptr>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i8* @get_XComposeStatus_compose_ptr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
define i8* @get_XComposeStatus_compose_ptr(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
int bla_init(struct bat_priv *bat_priv) { return 1; }


x86 assembly (clang, -O0):
<bla_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bla_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.bat_priv = type opaque
define i32 @bla_init(%struct.bat_priv* %0) {
%2 = alloca %struct.bat_priv*
store %struct.bat_priv* %0, %struct.bat_priv** %2
ret i32 1
}

LLVM IR (-O2):
%struct.bat_priv = type opaque
define i32 @bla_init(%struct.bat_priv* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
scalar_t__ stderr;
void *c_stderr(void) { return (void *)stderr; }


x86 assembly (clang, -O0):
<c_stderr>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_stderr>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@stderr = global i64 0
define i8* @c_stderr() {
%1 = load i64, i64* @stderr
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}

LLVM IR (-O2):
@stderr = global i64 0
define i8* @c_stderr() {
%1 = load i64, i64* @stderr
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ mp_msg(int, int /*<<< orphan*/, char *);
int draw_frame(unsigned char *src[]) {
  ((void)(src));
  mp_msg(3, 0, "xover error: didn't used sub vo draw_frame!\n");
  return 1;
}


x86 assembly (clang, -O0):
<draw_frame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3,%edi
xor    %esi,%esi
lea    0xed6(%rip),%rdx
call   1030 <mp_msg@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_frame>:
push   %rax
lea    0xee8(%rip),%rdx
mov    $0x3,%edi
xor    %esi,%esi
call   1030 <mp_msg@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"xover error: didn't used sub vo draw_frame!\0A\00"
define i32 @draw_frame(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @mp_msg(i32 3, i32 0, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [45 x i8] c"xover error: didn't used sub vo draw_frame!\0A\00"
define i32 @draw_frame(i8** nocapture readnone %0) {
%2 = tail call i32 @mp_msg(i32 3, i32 0, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ memset(int *, int /*<<< orphan*/, int);
void clearBoard(int width, int height, int **game) {
  for (int y = 0; y < height; y++)
    memset(game[y], 0, sizeof(int) * width);
}


x86 assembly (clang, -O0):
<clearBoard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1160 <clearBoard+0x50>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1129 <clearBoard+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearBoard>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <clearBoard+0x37>
mov    %rdx,%r14
mov    %edi,%r15d
shl    $0x2,%r15d
mov    %esi,%ebx
xor    %ebp,%ebp
nopl   0x0(%rax)
mov    (%r14,%rbp,8),%rdi
xor    %esi,%esi
mov    %r15d,%edx
call   1030 <memset@plt>
add    $0x1,%rbp
cmp    %rbp,%rbx
jne    1130 <clearBoard+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @clearBoard(i32 %0, i32 %1, i32** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32**
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32** %2, i32*** %6
store i32 0, i32* %7
br label %8
8: ; preds = %23, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %5
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i32**, i32*** %6
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32*, i32** %13, i64 %15
%17 = load i32*, i32** %16
%18 = load i32, i32* %4
%19 = sext i32 %18 to i64
%20 = mul i64 4, %19
%21 = trunc i64 %20 to i32
%22 = call i32 @memset(i32* %17, i32 0, i32 %21)
br label %23
23: ; preds = %12
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 1
store i32 %25, i32* %7
br label %8
26: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @clearBoard(i32 %0, i32 %1, i32** nocapture %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = shl i32 %0, 2
%7 = zext i32 %1 to i64
br label %9
8: ; preds = %9, %3
ret void
9: ; preds = %5, %9
%10 = phi i64 [ 0, %5 ], [ %14, %9 ]
%11 = getelementptr inbounds i32*, i32** %2, i64 %10
%12 = load i32*, i32** %11
%13 = tail call i32 @memset(i32* %12, i32 0, i32 %6)
%14 = add nuw nsw i64 %10, 1
%15 = icmp eq i64 %14, %7
br i1 %15, label %8, label %9
}
/* Variables and functions */
double log(double);
double sin(double);
double f2(double x) { return log(x) * sin(10.0 * x); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xebc(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <log@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
mulsd  0xebd(%rip),%xmm0
call   1030 <sin@plt>
mulsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @f2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log(double %3)
%5 = load double, double* %2
%6 = fmul double 1.000000e+01, %5
%7 = call double @sin(double %6)
%8 = fmul double %4, %7
ret double %8
}

LLVM IR (-O2):
define double @f2(double %0) {
%2 = tail call double @log(double %0)
%3 = fmul double %0, 1.000000e+01
%4 = tail call double @sin(double %3)
%5 = fmul double %2, %4
ret double %5
}
/* Variables and functions */
scalar_t__ isConsonant(char const *);
int doubleConsonant(const char *z) {
  return isConsonant(z) && z[0] == z[1] && isConsonant(z + 1);
}


x86 assembly (clang, -O0):
<doubleConsonant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <isConsonant@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
je     116a <doubleConsonant+0x5a>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jne    116a <doubleConsonant+0x5a>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
call   1030 <isConsonant@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubleConsonant>:
push   %rbx
mov    %rdi,%rbx
call   1030 <isConsonant@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1141 <doubleConsonant+0x31>
mov    (%rbx),%cl
cmp    0x1(%rbx),%cl
jne    1141 <doubleConsonant+0x31>
add    $0x1,%rbx
mov    %rbx,%rdi
call   1030 <isConsonant@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @doubleConsonant(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @isConsonant(i8* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %21
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %10, %14
br i1 %15, label %16, label %21
16: ; preds = %6
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i64 1
%19 = call i64 @isConsonant(i8* %18)
%20 = icmp ne i64 %19, 0
br label %21
21: ; preds = %16, %6, %1
%22 = phi i1 [ false, %6 ], [ false, %1 ], [ %20, %16 ]
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @doubleConsonant(i8* %0) {
%2 = tail call i64 @isConsonant(i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = load i8, i8* %0
%6 = getelementptr inbounds i8, i8* %0, i64 1
%7 = load i8, i8* %6
%8 = icmp eq i8 %5, %7
br i1 %8, label %9, label %13
9: ; preds = %4
%10 = tail call i64 @isConsonant(i8* %6)
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %9, %4, %1
%14 = phi i32 [ 0, %4 ], [ 0, %1 ], [ %12, %9 ]
ret i32 %14
}
struct node *reverse(struct node *head) {
  return head;
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.node = type opaque
define %struct.node* @reverse(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
%3 = load %struct.node*, %struct.node** %2
ret %struct.node* %3
}

LLVM IR (-O2):
%struct.node = type opaque
define %struct.node* @reverse(%struct.node* readnone returned %0) {
ret %struct.node* %0
}
int test_imm_BBuint8_reg(unsigned char val) {
  return ((val) & (-0xBB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BBuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff45,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BBuint8_reg>:
test   $0x45,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BBuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -187
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BBuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 69
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int main(int argc, char **argv) {
  int __attribute__((unit(m))) x;
  double y = argc == 2 ? x : 0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    1127 <main+0x27>
mov    -0x14(%rbp),%eax
mov    %eax,-0x24(%rbp)
jmp    1131 <main+0x31>
xor    %eax,%eax
mov    %eax,-0x24(%rbp)
jmp    1131 <main+0x31>
mov    -0x24(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca double
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %6
br label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %10
%14 = phi i32 [ %11, %10 ], [ 0, %12 ]
%15 = sitofp i32 %14 to double
store double %15, double* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}