#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned int CheckIRQ();
int /*<<< orphan*/ DisableInterrupts();
int /*<<< orphan*/ EnableInterrupts();
int TriggerInterrupt(const unsigned int nIRQ) {
  if (nIRQ > 127) {
    return -1;
  }
  const unsigned int enabled = CheckIRQ();
  if (enabled == 1) {
    DisableInterrupts();
  }
  {
    const unsigned int mod = nIRQ % 32;
    const unsigned int div = nIRQ / 32;
    switch (div) {
    case 0:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x200)))) = (0x1 << mod);
      break;
    case 1:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x204)))) = (0x1 << mod);
      break;
    case 2:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x208)))) = (0x1 << mod);
      break;
    case 3:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x20C)))) = (0x1 << mod);
      break;
    default:
      return -1;
    }
    (*((volatile unsigned int *)(((0x0FFFC000) + 0xF00)))) =
        (0x000001FF & nIRQ);
  }
  if (enabled == 1) {
    EnableInterrupts();
  }
  return 0;
}


x86 assembly (clang, -O0):
<TriggerInterrupt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x7f,-0x8(%rbp)
jbe    1151 <TriggerInterrupt+0x21>
movl   $0xffffffff,-0x4(%rbp)
jmp    1237 <TriggerInterrupt+0x107>
mov    $0x0,%al
call   1030 <CheckIRQ@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    116c <TriggerInterrupt+0x3c>
mov    $0x0,%al
call   1040 <DisableInterrupts@plt>
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x5,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %rax,-0x20(%rbp)
sub    $0x3,%rax
ja     1203 <TriggerInterrupt+0xd3>
mov    -0x20(%rbp),%rax
lea    0xe66(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0xfffc200,%eax
mov    %ecx,(%rax)
jmp    120f <TriggerInterrupt+0xdf>
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0xfffc204,%eax
mov    %ecx,(%rax)
jmp    120f <TriggerInterrupt+0xdf>
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0xfffc208,%eax
mov    %ecx,(%rax)
jmp    120f <TriggerInterrupt+0xdf>
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0xfffc20c,%eax
mov    %ecx,(%rax)
jmp    120f <TriggerInterrupt+0xdf>
movl   $0xffffffff,-0x4(%rbp)
jmp    1237 <TriggerInterrupt+0x107>
mov    -0x8(%rbp),%ecx
and    $0x1ff,%ecx
mov    $0xfffcf00,%eax
mov    %ecx,(%rax)
cmpl   $0x1,-0xc(%rbp)
jne    1230 <TriggerInterrupt+0x100>
mov    $0x0,%al
call   1050 <EnableInterrupts@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TriggerInterrupt>:
push   %rbp
push   %r14
push   %rbx
mov    $0xffffffff,%ebp
cmp    $0x7f,%edi
ja     11cf <TriggerInterrupt+0x9f>
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <CheckIRQ@plt>
mov    %eax,%r14d
cmp    $0x1,%eax
jne    115a <TriggerInterrupt+0x2a>
xor    %eax,%eax
call   1040 <DisableInterrupts@plt>
mov    %ebx,%eax
shr    $0x5,%eax
cmp    $0x3,%eax
ja     11cf <TriggerInterrupt+0x9f>
mov    %ebx,%ecx
and    $0x1f,%ecx
lea    0xe90(%rip),%rdx
movslq (%rdx,%rax,4),%rax
add    %rdx,%rax
jmp    *%rax
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,0xfffc200
jmp    11b7 <TriggerInterrupt+0x87>
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,0xfffc204
jmp    11b7 <TriggerInterrupt+0x87>
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,0xfffc208
jmp    11b7 <TriggerInterrupt+0x87>
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,0xfffc20c
xor    %ebp,%ebp
mov    %ebx,0xfffcf00
cmp    $0x1,%r14d
jne    11cf <TriggerInterrupt+0x9f>
xor    %ebp,%ebp
xor    %eax,%eax
call   1050 <EnableInterrupts@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @TriggerInterrupt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
%7 = load i32, i32* %3
%8 = icmp ugt i32 %7, 127
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %43
10: ; preds = %1
%11 = call i32 (...) @CheckIRQ()
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = call i32 (...) @DisableInterrupts()
br label %16
16: ; preds = %14, %10
%17 = load i32, i32* %3
%18 = urem i32 %17, 32
store i32 %18, i32* %5
%19 = load i32, i32* %3
%20 = udiv i32 %19, 32
store i32 %20, i32* %6
%21 = load i32, i32* %6
switch i32 %21, label %34 [
i32 0, label %22
i32 1, label %25
i32 2, label %28
i32 3, label %31
]
22: ; preds = %16
%23 = load i32, i32* %5
%24 = shl i32 1, %23
store volatile i32 %24, i32* inttoptr (i64 268419584 to i32*)
br label %35
25: ; preds = %16
%26 = load i32, i32* %5
%27 = shl i32 1, %26
store volatile i32 %27, i32* inttoptr (i64 268419588 to i32*)
br label %35
28: ; preds = %16
%29 = load i32, i32* %5
%30 = shl i32 1, %29
store volatile i32 %30, i32* inttoptr (i64 268419592 to i32*)
br label %35
31: ; preds = %16
%32 = load i32, i32* %5
%33 = shl i32 1, %32
store volatile i32 %33, i32* inttoptr (i64 268419596 to i32*)
br label %35
34: ; preds = %16
store i32 -1, i32* %2
br label %43
35: ; preds = %31, %28, %25, %22
%36 = load i32, i32* %3
%37 = and i32 511, %36
store volatile i32 %37, i32* inttoptr (i64 268422912 to i32*)
%38 = load i32, i32* %4
%39 = icmp eq i32 %38, 1
br i1 %39, label %40, label %42
40: ; preds = %35
%41 = call i32 (...) @EnableInterrupts()
br label %42
42: ; preds = %40, %35
store i32 0, i32* %2
br label %43
43: ; preds = %42, %34, %9
%44 = load i32, i32* %2
ret i32 %44
}

LLVM IR (-O2):
define i32 @TriggerInterrupt(i32 %0) {
%2 = icmp ugt i32 %0, 127
br i1 %2, label %22, label %3
3: ; preds = %1
%4 = tail call i32 (...) @CheckIRQ()
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @DisableInterrupts()
br label %8
8: ; preds = %6, %3
%9 = and i32 %0, 31
%10 = lshr i32 %0, 5
switch i32 %10, label %22 [
i32 0, label %11
i32 1, label %13
i32 2, label %15
i32 3, label %17
]
11: ; preds = %8
%12 = shl nuw i32 1, %9
store volatile i32 %12, i32* inttoptr (i64 268419584 to i32*)
br label %19
13: ; preds = %8
%14 = shl nuw i32 1, %9
store volatile i32 %14, i32* inttoptr (i64 268419588 to i32*)
br label %19
15: ; preds = %8
%16 = shl nuw i32 1, %9
store volatile i32 %16, i32* inttoptr (i64 268419592 to i32*)
br label %19
17: ; preds = %8
%18 = shl nuw i32 1, %9
store volatile i32 %18, i32* inttoptr (i64 268419596 to i32*)
br label %19
19: ; preds = %17, %15, %13, %11
store volatile i32 %0, i32* inttoptr (i64 268422912 to i32*)
br i1 %5, label %20, label %22
20: ; preds = %19
%21 = tail call i32 (...) @EnableInterrupts()
br label %22
22: ; preds = %8, %20, %19, %1
%23 = phi i32 [ -1, %1 ], [ -1, %8 ], [ 0, %20 ], [ 0, %19 ]
ret i32 %23
}