xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ check_report(int /*<<< orphan*/, char const *, int);
int /*<<< orphan*/ printf(char *, char const *, char const *, int);
__attribute__((hcos_noinstrument)) void
__exit_hook(const char *func, const char *filename, int lineno) {
  printf("Exit hook: %s at %s:%d\n", func, filename, lineno);
  check_report(0, func, lineno);
}


x86 assembly (clang, -O0):
<__exit_hook>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %edi,%edi
call   1040 <check_report@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__exit_hook>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rsi,%rdx
mov    %rdi,%rbx
lea    0xece(%rip),%rdi
mov    %rbx,%rsi
mov    %ebp,%ecx
call   1030 <printf@plt>
xor    %edi,%edi
mov    %rbx,%rsi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <check_report@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Exit hook: %s at %s:%d\0A\00"
define void @__exit_hook(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8, i32 %9)
%11 = load i8*, i8** %4
%12 = load i32, i32* %6
%13 = call i32 @check_report(i32 0, i8* %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Exit hook: %s at %s:%d\0A\00"
define void @__exit_hook(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i32 %2)
%5 = tail call i32 @check_report(i32 0, i8* %0, i32 %2)
ret void
}
/* Variables and functions */
char *netGetLongString(int);
int /*<<< orphan*/ noWarnAbort();
char *netRecieveLongString(int sd) {
  char *s = netGetLongString(sd);
  if (s == NULL)
    noWarnAbort();
  return s;
}


x86 assembly (clang, -O0):
<netRecieveLongString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <netGetLongString@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1149 <netRecieveLongString+0x29>
mov    $0x0,%al
call   1040 <noWarnAbort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<netRecieveLongString>:
push   %rbx
call   1030 <netGetLongString@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <netRecieveLongString+0x15>
xor    %eax,%eax
call   1040 <noWarnAbort@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @netRecieveLongString(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @netGetLongString(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @noWarnAbort()
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @netRecieveLongString(i32 %0) {
%2 = tail call i8* @netGetLongString(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @noWarnAbort()
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void error_msg(char *msg) {
  fprintf(stderr, "%s: %s\n", msg, strerror(errno));
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<error_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    %rax,%rcx
lea    0xe91(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e55(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error_msg>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea3(%rip),%rax
mov    (%rax),%ebp
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeac(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
call   1030 <fprintf@plt>
mov    0x2e68(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define void @error_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = load i32, i32* @errno
%6 = call i8* @strerror(i32 %5)
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define void @error_msg(i8* %0) {
%2 = load i32, i32* @stderr
%3 = load i32, i32* @errno
%4 = tail call i8* @strerror(i32 %3)
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
}
int do_608() { return 608; }


x86 assembly (clang, -O0):
<do_608>:
push   %rbp
mov    %rsp,%rbp
mov    $0x260,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_608>:
mov    $0x260,%eax
ret

LLVM IR (-O0):
define i32 @do_608() {
ret i32 608
}

LLVM IR (-O2):
define i32 @do_608() {
ret i32 608
}
void d2i_X509_CERT_PAIR(void) {}


x86 assembly (clang, -O0):
<d2i_X509_CERT_PAIR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_X509_CERT_PAIR>:
ret

LLVM IR (-O0):
define void @d2i_X509_CERT_PAIR() {
ret void
}

LLVM IR (-O2):
define void @d2i_X509_CERT_PAIR() {
ret void
}
/* Variables and functions */
int EOPNOTSUPP;
int so_nopush(int fd, _Bool nopush) { return EOPNOTSUPP; }


x86 assembly (clang, -O0):
<so_nopush>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
and    $0x1,%al
mov    %al,-0x5(%rbp)
mov    0x2eca(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<so_nopush>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EOPNOTSUPP = global i32 0
define i32 @so_nopush(i32 %0, i1 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
%5 = zext i1 %1 to i8
store i8 %5, i8* %4
%6 = load i32, i32* @EOPNOTSUPP
ret i32 %6
}

LLVM IR (-O2):
@EOPNOTSUPP = global i32 0
define i32 @so_nopush(i32 %0, i1 zeroext %1) {
%3 = load i32, i32* @EOPNOTSUPP
ret i32 %3
}
int is_palindromic(int n) {
  int reversed = 0, t = n;
  while (t) {
    reversed = 10 * reversed + (t % 10);
    t /= 10;
  }
  return reversed == n;
}


x86 assembly (clang, -O0):
<is_palindromic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114b <is_palindromic+0x4b>
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
jmp    1114 <is_palindromic+0x14>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_palindromic>:
xor    %edx,%edx
test   %edi,%edi
je     1141 <is_palindromic+0x41>
mov    %edi,%eax
nopl   0x0(%rax,%rax,1)
lea    (%rdx,%rdx,4),%r8d
movslq %eax,%rcx
imul   $0x66666667,%rcx,%rax
mov    %rax,%rsi
shr    $0x3f,%rsi
sar    $0x22,%rax
add    %esi,%eax
lea    (%rax,%rax,1),%esi
lea    (%rsi,%rsi,4),%esi
mov    %ecx,%edx
sub    %esi,%edx
lea    (%rdx,%r8,2),%edx
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <is_palindromic+0x10>
xor    %eax,%eax
cmp    %edi,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @is_palindromic(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %2
store i32 %5, i32* %4
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = load i32, i32* %3
%11 = mul nsw i32 10, %10
%12 = load i32, i32* %4
%13 = srem i32 %12, 10
%14 = add nsw i32 %11, %13
store i32 %14, i32* %3
%15 = load i32, i32* %4
%16 = sdiv i32 %15, 10
store i32 %16, i32* %4
br label %6
17: ; preds = %6
%18 = load i32, i32* %3
%19 = load i32, i32* %2
%20 = icmp eq i32 %18, %19
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_palindromic(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ %0, %1 ]
%5 = phi i32 [ %8, %3 ], [ 0, %1 ]
%6 = mul nsw i32 %5, 10
%7 = srem i32 %4, 10
%8 = add nsw i32 %7, %6
%9 = sdiv i32 %4, 10
%10 = add i32 %4, 9
%11 = icmp ult i32 %10, 19
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %8, %3 ]
%14 = icmp eq i32 %13, %0
%15 = zext i1 %14 to i32
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ PrintChar(int);
signed int fputc(signed int c, FILE *pStream) {
  PrintChar(c);
  return c;
}


x86 assembly (clang, -O0):
<fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <PrintChar@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputc>:
push   %rbx
mov    %edi,%ebx
call   1030 <PrintChar@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fputc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = call i32 @PrintChar(i32 %5)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @fputc(i32 returned %0, i32* nocapture readnone %1) {
%3 = tail call i32 @PrintChar(i32 %0)
ret i32 %0
}
void swap(int *a, int *b) {
  int tmp = *a;
  *a = *b;
  *b = tmp;
  return;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
void taktik4(int sagSensorDeger, int solSensorDeger, int ortaSensorDeger,
             int sagKenarDeger, int solKenarDeger, int motorHizi) {}


x86 assembly (clang, -O0):
<taktik4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<taktik4>:
ret

LLVM IR (-O0):
define void @taktik4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
ret void
}

LLVM IR (-O2):
define void @taktik4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0x98() {
  Assert_real((isprint(152) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              765, ("isprint should be 0 for 0x98"));
}


x86 assembly (clang, -O0):
<t_isprint_0x98>:
push   %rbp
mov    %rsp,%rbp
mov    $0x98,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2fd,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x98>:
push   %rax
mov    $0x98,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2fd,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x98\00"
define void @t_isprint_0x98() {
%1 = call i64 @isprint(i32 152)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 765, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x98\00"
define void @t_isprint_0x98() {
%1 = tail call i64 @isprint(i32 152)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 765, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void I2CMasterIntDisableEx(unsigned int baseAdd, unsigned int intFlag) {
  (*((volatile unsigned int *)(baseAdd + (0x30)))) = intFlag;
}


x86 assembly (clang, -O0):
<I2CMasterIntDisableEx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x30,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterIntDisableEx>:
add    $0x30,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @I2CMasterIntDisableEx(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %6, 48
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @I2CMasterIntDisableEx(i32 %0, i32 %1) {
%3 = add i32 %0, 48
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430CounterC__1__Counter__overflow();
void Msp430CounterC__1__Msp430Timer__overflow(void) {
  Msp430CounterC__1__Counter__overflow();
}


x86 assembly (clang, -O0):
<Msp430CounterC__1__Msp430Timer__overflow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430CounterC__1__Counter__overflow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430CounterC__1__Msp430Timer__overflow>:
xor    %eax,%eax
jmp    1030 <Msp430CounterC__1__Counter__overflow@plt>

LLVM IR (-O0):
define void @Msp430CounterC__1__Msp430Timer__overflow() {
%1 = call i32 (...) @Msp430CounterC__1__Counter__overflow()
ret void
}

LLVM IR (-O2):
define void @Msp430CounterC__1__Msp430Timer__overflow() {
%1 = tail call i32 (...) @Msp430CounterC__1__Counter__overflow()
ret void
}
void get_coords_from_rpz(const double *rpz, double *x) {
  x[0] = rpz[0];
  x[1] = rpz[1];
  x[2] = rpz[2];
}


x86 assembly (clang, -O0):
<get_coords_from_rpz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coords_from_rpz>:
movsd  (%rdi),%xmm0
movsd  %xmm0,(%rsi)
movsd  0x8(%rdi),%xmm0
movsd  %xmm0,0x8(%rsi)
movsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rsi)
ret

LLVM IR (-O0):
define void @get_coords_from_rpz(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
store double %7, double* %9
%10 = load double*, double** %3
%11 = getelementptr inbounds double, double* %10, i64 1
%12 = load double, double* %11
%13 = load double*, double** %4
%14 = getelementptr inbounds double, double* %13, i64 1
store double %12, double* %14
%15 = load double*, double** %3
%16 = getelementptr inbounds double, double* %15, i64 2
%17 = load double, double* %16
%18 = load double*, double** %4
%19 = getelementptr inbounds double, double* %18, i64 2
store double %17, double* %19
ret void
}

LLVM IR (-O2):
define void @get_coords_from_rpz(double* nocapture %0, double* nocapture writeonly %1) {
%3 = load double, double* %0
store double %3, double* %1
%4 = getelementptr inbounds double, double* %0, i64 1
%5 = load double, double* %4
%6 = getelementptr inbounds double, double* %1, i64 1
store double %5, double* %6
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 2
store double %8, double* %9
ret void
}
/* Variables and functions */
scalar_t__ tkinter2Present();
int preferPython() {
  static int lsPreferPython = -1;
  int lpreferPython = 0;
  if (lsPreferPython < 0) {
    lsPreferPython = lpreferPython && tkinter2Present();
  }
  return lsPreferPython;
}


x86 assembly (clang, -O0):
<preferPython>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,0x2f02(%rip)
jge    115a <preferPython+0x4a>
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114c <preferPython+0x3c>
mov    $0x0,%al
call   1030 <tkinter2Present@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,0x2ece(%rip)
mov    0x2ec8(%rip),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<preferPython>:
cmpb   $0x0,0x2f1d(%rip)
jne    1110 <preferPython+0x10>
movb   $0x1,0x2f14(%rip)
xor    %eax,%eax
ret

LLVM IR (-O0):
@preferPython.lsPreferPython = internal global i32 -1
define i32 @preferPython() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @preferPython.lsPreferPython
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %0
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = call i64 (...) @tkinter2Present()
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %7, %4
%11 = phi i1 [ false, %4 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
store i32 %12, i32* @preferPython.lsPreferPython
br label %13
13: ; preds = %10, %0
%14 = load i32, i32* @preferPython.lsPreferPython
ret i32 %14
}

LLVM IR (-O2):
@preferPython.lsPreferPython = internal unnamed_addr global i1 false
define i32 @preferPython() {
%1 = load i1, i1* @preferPython.lsPreferPython
br i1 %1, label %3, label %2
2: ; preds = %0
store i1 true, i1* @preferPython.lsPreferPython
br label %3
3: ; preds = %2, %0
ret i32 0
}
char *fix_backslashes(char *buffer) { return buffer; }


x86 assembly (clang, -O0):
<fix_backslashes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fix_backslashes>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @fix_backslashes(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @fix_backslashes(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIGCHLD;
int /*<<< orphan*/ SIG_BLOCK;
int /*<<< orphan*/ sigaddset(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int waitpidTimeoutInit() {
  sigset_t mask;
  sigemptyset(&mask);
  sigaddset(&mask, SIGCHLD);
  return sigprocmask(SIG_BLOCK, &mask, NULL);
}


x86 assembly (clang, -O0):
<waitpidTimeoutInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <sigemptyset@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
lea    -0x4(%rbp),%rdi
call   1050 <sigaddset@plt>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
lea    -0x4(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitpidTimeoutInit>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigemptyset@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1050 <sigaddset@plt>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SIGCHLD = global i32 0
@SIG_BLOCK = global i32 0
define i32 @waitpidTimeoutInit() {
%1 = alloca i32
%2 = call i32 @sigemptyset(i32* %1)
%3 = load i32, i32* @SIGCHLD
%4 = call i32 @sigaddset(i32* %1, i32 %3)
%5 = load i32, i32* @SIG_BLOCK
%6 = call i32 @sigprocmask(i32 %5, i32* %1, i32* null)
ret i32 %6
}

LLVM IR (-O2):
@SIGCHLD = global i32 0
@SIG_BLOCK = global i32 0
define i32 @waitpidTimeoutInit() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigemptyset(i32* %1)
%4 = load i32, i32* @SIGCHLD
%5 = call i32 @sigaddset(i32* %1, i32 %4)
%6 = load i32, i32* @SIG_BLOCK
%7 = call i32 @sigprocmask(i32 %6, i32* %1, i32* null)
ret i32 %7
}
/* Variables and functions */
int foo(int, char);
int /*<<< orphan*/ print_int(int);
int main() {
  int i = foo(1, 'a');
  print_int(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x61,%esi
call   1040 <foo@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <print_int@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x61,%esi
call   1040 <foo@plt>
mov    %eax,%edi
call   1030 <print_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @foo(i32 1, i8 signext 97)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @print_int(i32 %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 1, i8 signext 97)
%2 = tail call i32 @print_int(i32 %1)
ret i32 0
}
void delete (char *x, char *y) {
  *y = 0;
  if (0 < x && x < y) {
    while (*x != 0) {
      *x = 0;
      x++;
    }
  }
}


x86 assembly (clang, -O0):
<delete>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
jae    115f <delete+0x5f>
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    115f <delete+0x5f>
jmp    1132 <delete+0x32>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115a <delete+0x5a>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1132 <delete+0x32>
jmp    115f <delete+0x5f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete>:
movb   $0x0,(%rsi)
test   %rdi,%rdi
je     112d <delete+0x2d>
cmp    %rsi,%rdi
jae    112d <delete+0x2d>
cmpb   $0x0,(%rdi)
je     112d <delete+0x2d>
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
movb   $0x0,-0x1(%rdi)
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1120 <delete+0x20>
ret

LLVM IR (-O0):
define void @delete(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
store i8 0, i8* %5
%6 = load i8*, i8** %3
%7 = icmp ult i8* null, %6
br i1 %7, label %8, label %23
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = icmp ult i8* %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
br label %13
13: ; preds = %18, %12
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %13
%19 = load i8*, i8** %3
store i8 0, i8* %19
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
br label %13
22: ; preds = %13
br label %23
23: ; preds = %22, %8, %2
ret void
}

LLVM IR (-O2):
define void @delete(i8* %0, i8* writeonly %1) {
store i8 0, i8* %1
%3 = icmp ne i8* %0, null
%4 = icmp ult i8* %0, %1
%5 = and i1 %3, %4
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = load i8, i8* %0
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %6, %9
%10 = phi i8* [ %11, %9 ], [ %0, %6 ]
store i8 0, i8* %10
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %9
14: ; preds = %9, %6, %2
ret void
}
/* Type definitions */
struct timespec {
  long long tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void msleep(long long m) {
  struct timespec req = {.tv_sec = m / 1000, .tv_nsec = 1000000 * (m % 1000)};
  nanosleep(&req, NULL);
}


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
imul   $0xf4240,%rdx,%rax
mov    %eax,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
sub    $0x18,%rsp
movabs $0x20c49ba5e353f7cf,%rcx
9b c4 20
mov    %rdi,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x7,%rdx
add    %rax,%rdx
mov    %rdx,0x8(%rsp)
imul   $0x3e8,%edx,%eax
sub    %eax,%edi
imul   $0xf4240,%edi,%eax
mov    %eax,0x10(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i32 }
define void @msleep(i64 %0) {
%2 = alloca i64
%3 = alloca %struct.timespec
store i64 %0, i64* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%5 = load i64, i64* %2
%6 = sdiv i64 %5, 1000
store i64 %6, i64* %4
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%8 = load i64, i64* %2
%9 = srem i64 %8, 1000
%10 = mul nsw i64 1000000, %9
%11 = trunc i64 %10 to i32
store i32 %11, i32* %7
%12 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i32 }
define void @msleep(i64 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
%5 = sdiv i64 %0, 1000
store i64 %5, i64* %4
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
%7 = srem i64 %0, 1000
%8 = trunc i64 %7 to i32
%9 = mul nsw i32 %8, 1000000
store i32 %9, i32* %6
%10 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
int __clzsi2(unsigned long i) {
  int b;
  if (i == 0)
    return 0;
  for (b = 0; !(i & (1UL << (sizeof(i) * 8 - 1))); ++b)
    i = (unsigned long)i << 1;
  return b;
}


x86 assembly (clang, -O0):
<__clzsi2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <__clzsi2+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    116a <__clzsi2+0x6a>
movl   $0x0,-0x14(%rbp)
movabs $0x8000000000000000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    114a <__clzsi2+0x4a>
jmp    1164 <__clzsi2+0x64>
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <__clzsi2+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__clzsi2>:
xor    %eax,%eax
test   %rdi,%rdi
jle    111b <__clzsi2+0x1b>
nopw   0x0(%rax,%rax,1)
add    %rdi,%rdi
add    $0x1,%eax
test   %rdi,%rdi
jns    1110 <__clzsi2+0x10>
ret

LLVM IR (-O0):
define i32 @__clzsi2(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %22
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i64, i64* %3
%11 = and i64 %10, -9223372036854775808
%12 = icmp ne i64 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i64, i64* %3
%16 = shl i64 %15, 1
store i64 %16, i64* %3
br label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %9
20: ; preds = %9
%21 = load i32, i32* %4
store i32 %21, i32* %2
br label %22
22: ; preds = %20, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @__clzsi2(i64 %0) {
%2 = icmp sgt i64 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = shl nuw i64 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp sgt i64 %6, -1
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
int *malloc(int);
int *getIntPtr(int num) {
  int *ret = malloc(sizeof(int));
  *ret = num;
  return ret;
}


x86 assembly (clang, -O0):
<getIntPtr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getIntPtr>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @getIntPtr(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i32* @malloc(i32 4)
store i32* %4, i32** %3
%5 = load i32, i32* %2
%6 = load i32*, i32** %3
store i32 %5, i32* %6
%7 = load i32*, i32** %3
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @getIntPtr(i32 %0) {
%2 = tail call i32* @malloc(i32 4)
store i32 %0, i32* %2
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ FixedWingPathFollowerSettingsHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void FixedWingPathFollowerSettingsRequestUpdate() {
  UAVObjRequestUpdate(FixedWingPathFollowerSettingsHandle());
}


x86 assembly (clang, -O0):
<FixedWingPathFollowerSettingsRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FixedWingPathFollowerSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FixedWingPathFollowerSettingsRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <FixedWingPathFollowerSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @FixedWingPathFollowerSettingsRequestUpdate() {
%1 = call i32 (...) @FixedWingPathFollowerSettingsHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @FixedWingPathFollowerSettingsRequestUpdate() {
%1 = tail call i32 (...) @FixedWingPathFollowerSettingsHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
void i2c_init(void) {
  (*(volatile unsigned long *)0x56000048) |= 0xc000;
  (*(volatile unsigned long *)0x56000040) |= 0xa0000000;
  (*(volatile unsigned long *)0x4A000008) &= ~((0x1 << 27));
  (*(volatile unsigned *)0x54000000) = (1 << 7) | (0 << 6) | (1 << 5) | (0xf);
  (*(volatile unsigned *)0x54000008) = 0x10;
  (*(volatile unsigned *)0x54000004) = 0x10;
}


x86 assembly (clang, -O0):
<i2c_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x56000048,%eax
mov    (%rax),%rcx
or     $0xc000,%rcx
mov    $0x56000048,%eax
mov    %rcx,(%rax)
mov    $0x56000040,%eax
mov    (%rax),%rcx
movabs $0xa0000000,%rax
or     %rax,%rcx
mov    $0x56000040,%eax
mov    %rcx,(%rax)
mov    $0x4a000008,%eax
mov    (%rax),%rcx
and    $0xfffffffff7ffffff,%rcx
mov    $0x4a000008,%eax
mov    %rcx,(%rax)
mov    $0x54000000,%eax
movl   $0xaf,(%rax)
mov    $0x54000008,%eax
movl   $0x10,(%rax)
mov    $0x54000004,%eax
movl   $0x10,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_init>:
orq    $0xc000,0x56000048
mov    $0xa0000000,%eax
or     %rax,0x56000040
56
andq   $0xfffffffff7ffffff,0x4a000008
4a ff ff ff f7
movl   $0xaf,0x54000000
movl   $0x10,0x54000008
movl   $0x10,0x54000004
ret

LLVM IR (-O0):
define void @i2c_init() {
%1 = load volatile i64, i64* inttoptr (i64 1442840648 to i64*)
%2 = or i64 %1, 49152
store volatile i64 %2, i64* inttoptr (i64 1442840648 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 1442840640 to i64*)
%4 = or i64 %3, 2684354560
store volatile i64 %4, i64* inttoptr (i64 1442840640 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 1241513992 to i64*)
%6 = and i64 %5, -134217729
store volatile i64 %6, i64* inttoptr (i64 1241513992 to i64*)
store volatile i32 175, i32* inttoptr (i64 1409286144 to i32*)
store volatile i32 16, i32* inttoptr (i64 1409286152 to i32*)
store volatile i32 16, i32* inttoptr (i64 1409286148 to i32*)
ret void
}

LLVM IR (-O2):
define void @i2c_init() {
%1 = load volatile i64, i64* inttoptr (i64 1442840648 to i64*)
%2 = or i64 %1, 49152
store volatile i64 %2, i64* inttoptr (i64 1442840648 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 1442840640 to i64*)
%4 = or i64 %3, 2684354560
store volatile i64 %4, i64* inttoptr (i64 1442840640 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 1241513992 to i64*)
%6 = and i64 %5, -134217729
store volatile i64 %6, i64* inttoptr (i64 1241513992 to i64*)
store volatile i32 175, i32* inttoptr (i64 1409286144 to i32*)
store volatile i32 16, i32* inttoptr (i64 1409286152 to i32*)
store volatile i32 16, i32* inttoptr (i64 1409286148 to i32*)
ret void
}
void ctest2() {}


x86 assembly (clang, -O0):
<ctest2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctest2>:
ret

LLVM IR (-O0):
define void @ctest2() {
ret void
}

LLVM IR (-O2):
define void @ctest2() {
ret void
}
void GET_PROMPT_BOOL(r, s) int *r;
char *s;
{
  puts((char *)s);
  GET_BOOL(r);
}


x86 assembly (clang, -O0):
<GET_PROMPT_BOOL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1040 <puts@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <GET_BOOL@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GET_PROMPT_BOOL>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
xor    %eax,%eax
call   1040 <puts@plt>
mov    %rbx,%rdi
xor    %eax,%eax
pop    %rbx
jmp    1030 <GET_BOOL@plt>

LLVM IR (-O0):
define void @GET_PROMPT_BOOL(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* %5)
%7 = load i32*, i32** %3
%8 = call i32 (i32*, ...) bitcast (i32 (...)* @GET_BOOL to i32 (i32*, ...)*)(i32* %7)
ret void
}

LLVM IR (-O2):
define void @GET_PROMPT_BOOL(i32* %0, i8* %1) {
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* %1)
%4 = tail call i32 (i32*, ...) bitcast (i32 (...)* @GET_BOOL to i32 (i32*, ...)*)(i32* %0)
ret void
}
void quit(int *loop) { (*loop) = 0; }


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quit>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @quit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 0, i32* %3
ret void
}

LLVM IR (-O2):
define void @quit(i32* nocapture writeonly %0) {
store i32 0, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *argv0) {
  fprintf(stderr,
          "Usage: \n"
          "        %s chartable [hashsize] [hashstep] [maxhashlevel]\n",
          argv0);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [67 x i8] c"Usage: \0A %s chartable [hashsize] [hashstep] [maxhashlevel]\0A\00"
@EX_USAGE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EX_USAGE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [67 x i8] c"Usage: \0A %s chartable [hashsize] [hashstep] [maxhashlevel]\0A\00"
@EX_USAGE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EX_USAGE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int i;
  i = __VERIFIER_nondet_int();
  while (i > 0) {
    if (i > 3) {
      i = i + 1;
    } else {
      i = i - 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1159 <main+0x49>
cmpl   $0x3,-0x8(%rbp)
jle    114b <main+0x3b>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1154 <main+0x44>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <main+0x19>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
test   %eax,%eax
jle    1130 <main+0x20>
nopl   0x0(%rax)
xor    %ecx,%ecx
cmp    $0x4,%eax
setae  %cl
lea    (%rax,%rcx,2),%eax
add    $0xffffffff,%eax
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %3, i32* %2
br label %4
4: ; preds = %16, %0
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = icmp sgt i32 %8, 3
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %16
13: ; preds = %7
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 1
store i32 %15, i32* %2
br label %16
16: ; preds = %13, %10
br label %4
17: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = icmp sgt i32 %1, 0
br i1 %2, label %3, label %9
3: ; preds = %0, %3
%4 = phi i32 [ %7, %3 ], [ %1, %0 ]
%5 = icmp ugt i32 %4, 3
%6 = select i1 %5, i32 1, i32 -1
%7 = add nsw i32 %6, %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %3
9: ; preds = %3, %0
ret i32 0
}
void screen_clear() {
  __asm__("mov $0x03, %eax");
  __asm__("int $0x83");
}


x86 assembly (clang, -O0):
<screen_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
int    $0x83
pop    %rbp
ret

x86 assembly (clang, -O2):
<screen_clear>:
mov    $0x3,%eax
int    $0x83
ret

LLVM IR (-O0):
define void @screen_clear() {
ret void
}

LLVM IR (-O2):
define void @screen_clear() {
tail call void asm sideeffect "mov $$0x03, %eax", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "int $$0x83", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
extern unsigned unsigned_divide(unsigned a, unsigned b) {
  if (!b)
    return a;
  return a / b;
}


x86 assembly (clang, -O0):
<unsigned_divide>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    111f <unsigned_divide+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112a <unsigned_divide+0x2a>
mov    -0x8(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_divide>:
mov    %edi,%eax
test   %esi,%esi
je     110a <unsigned_divide+0xa>
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i32 @unsigned_divide(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = udiv i32 %11, %12
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @unsigned_divide(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = udiv i32 %0, %1
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ %0, %2 ]
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ int_fast32_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
scalar_t__ INT16_MAX;
scalar_t__ INT16_MIN;
int16_t clamp_s16(int_fast32_t x) {
  x = (x < INT16_MIN) ? INT16_MIN : x;
  x = (x > INT16_MAX) ? INT16_MAX : x;
  return x;
}


x86 assembly (clang, -O0):
<clamp_s16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ec5(%rip),%rcx
cmp    (%rcx),%rax
jge    112f <clamp_s16+0x2f>
mov    0x2eb5(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <clamp_s16+0x37>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2e96(%rip),%rcx
cmp    (%rcx),%rax
jle    1166 <clamp_s16+0x66>
mov    0x2e86(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
jmp    116e <clamp_s16+0x6e>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp_s16>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%rax
cmp    %rdi,%rax
cmovle %rdi,%rax
mov    0x2ec8(%rip),%rcx
mov    (%rcx),%rcx
cmp    %rcx,%rax
cmovg  %rcx,%rax
ret

LLVM IR (-O0):
@INT16_MIN = global i64 0
@INT16_MAX = global i64 0
define i64 @clamp_s16(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* @INT16_MIN
%5 = icmp slt i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i64, i64* @INT16_MIN
br label %10
8: ; preds = %1
%9 = load i64, i64* %2
br label %10
10: ; preds = %8, %6
%11 = phi i64 [ %7, %6 ], [ %9, %8 ]
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = load i64, i64* @INT16_MAX
%14 = icmp sgt i64 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i64, i64* @INT16_MAX
br label %19
17: ; preds = %10
%18 = load i64, i64* %2
br label %19
19: ; preds = %17, %15
%20 = phi i64 [ %16, %15 ], [ %18, %17 ]
store i64 %20, i64* %2
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
@INT16_MIN = global i64 0
@INT16_MAX = global i64 0
define i64 @clamp_s16(i64 %0) {
%2 = load i64, i64* @INT16_MIN
%3 = icmp sgt i64 %2, %0
%4 = select i1 %3, i64 %2, i64 %0
%5 = load i64, i64* @INT16_MAX
%6 = icmp sgt i64 %4, %5
%7 = select i1 %6, i64 %5, i64 %4
ret i64 %7
}
int test_imm_E7int64_midword_reg(long long val) {
  return ((val >> 16) & (0xE7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E7int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xe7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E7int64_midword_reg>:
test   $0xe70000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E7int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 231
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E7int64_midword_reg(i64 %0) {
%2 = and i64 %0, 15138816
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int sillyfunction1() { return 42; }


x86 assembly (clang, -O0):
<sillyfunction1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sillyfunction1>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @sillyfunction1() {
ret i32 42
}

LLVM IR (-O2):
define i32 @sillyfunction1() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void direct_close(void *arg) {
  int sock = (long)arg;
  close(sock);
}


x86 assembly (clang, -O0):
<direct_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<direct_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @direct_close(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
%6 = trunc i64 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @close(i32 %7)
ret void
}

LLVM IR (-O2):
define void @direct_close(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @close(i32 %3)
ret void
}
void *occampi_guardexphook_copy(void *chook) { return chook; }


x86 assembly (clang, -O0):
<occampi_guardexphook_copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<occampi_guardexphook_copy>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @occampi_guardexphook_copy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @occampi_guardexphook_copy(i8* readnone returned %0) {
ret i8* %0
}
int test_imm_61uint8_reg(unsigned char val) {
  return ((val) & (-0x61 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_61uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff9f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_61uint8_reg>:
test   $0x9f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_61uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -97
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_61uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -97
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}