xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ UPnPResponse_RenderingControl_SetHorizontalKeystone(void *);
int /*<<< orphan*/ printf(char *, unsigned int, short);
void UPnPRenderingControl_SetHorizontalKeystone(
    void *upnptoken, unsigned int InstanceID, short DesiredHorizontalKeystone) {
  printf("Invoke: UPnPRenderingControl_SetHorizontalKeystone(%u,%d);\r\n",
         InstanceID, DesiredHorizontalKeystone);
  UPnPResponse_RenderingControl_SetHorizontalKeystone(upnptoken);
}


x86 assembly (clang, -O0):
<UPnPRenderingControl_SetHorizontalKeystone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %ax,-0xe(%rbp)
mov    -0xc(%rbp),%esi
lea    0xec0(%rip),%rdi
movswl -0xe(%rbp),%edx
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <UPnPResponse_RenderingControl_SetHorizontalKeystone@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UPnPRenderingControl_SetHorizontalKeystone>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <UPnPResponse_RenderingControl_SetHorizontalKeystone@plt>

LLVM IR (-O0):
@.str = [61 x i8] c"Invoke: UPnPRenderingControl_SetHorizontalKeystone(%u,%d);\0D\0A\00"
define void @UPnPRenderingControl_SetHorizontalKeystone(i8* %0, i32 %1, i16 signext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i16
store i8* %0, i8** %4
store i32 %1, i32* %5
store i16 %2, i16* %6
%7 = load i32, i32* %5
%8 = load i16, i16* %6
%9 = call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i32 %7, i16 signext %8)
%10 = load i8*, i8** %4
%11 = call i32 @UPnPResponse_RenderingControl_SetHorizontalKeystone(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [61 x i8] c"Invoke: UPnPRenderingControl_SetHorizontalKeystone(%u,%d);\0D\0A\00"
define void @UPnPRenderingControl_SetHorizontalKeystone(i8* %0, i32 %1, i16 signext %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i32 %1, i16 signext %2)
%5 = tail call i32 @UPnPResponse_RenderingControl_SetHorizontalKeystone(i8* %0)
ret void
}
__attribute__((no)) long trampoline_brk(unsigned long n1) {
  long ret;
  __asm__ __volatile__("leaq 1f(%%rip), %%r11\n\t"
                       "movq %%r11, %%fs:0x20\n\t"
                       "jmpq *%%gs:0x10000+"
                       "0x18"
                       "\n\t"
                       "1:\n\t"
                       : "=a"(ret)
                       : "D"(n1)
                       : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<trampoline_brk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0x11(%rip),%r11
mov    %r11,%fs:0x20
jmp    *%gs:0x10018
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trampoline_brk>:
lea    0x11(%rip),%r11
mov    %r11,%fs:0x20
jmp    *%gs:0x10018
ret

LLVM IR (-O0):
define i64 @trampoline_brk(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 asm sideeffect "leaq 1f(%rip), %r11\0A\09movq %r11, %fs:0x20\0A\09jmpq *%gs:0x10000+0x18\0A\091:\0A\09", "={ax},{di},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @trampoline_brk(i64 %0) {
%2 = tail call i64 asm sideeffect "leaq 1f(%rip), %r11\0A\09movq %r11, %fs:0x20\0A\09jmpq *%gs:0x10000+0x18\0A\091:\0A\09", "={ax},{di},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret i64 %2
}
void test_bst2(void) {}


x86 assembly (clang, -O0):
<test_bst2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bst2>:
ret

LLVM IR (-O0):
define void @test_bst2() {
ret void
}

LLVM IR (-O2):
define void @test_bst2() {
ret void
}
char abs_char(char i) { return i; }


x86 assembly (clang, -O0):
<abs_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_char>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @abs_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @abs_char(i8 returned signext %0) {
ret i8 %0
}
int suma(int a, int b) { return (a + b); }


x86 assembly (clang, -O0):
<suma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<suma>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @suma(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @suma(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
long long sub(long long a, long long b) {
  long long c = a - b;
  return c;
}


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @sub(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = sub nsw i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
ret i64 %9
}

LLVM IR (-O2):
define i64 @sub(i64 %0, i64 %1) {
%3 = sub nsw i64 %0, %1
ret i64 %3
}
void VP8DspInitMIPS32(void) {}


x86 assembly (clang, -O0):
<VP8DspInitMIPS32>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VP8DspInitMIPS32>:
ret

LLVM IR (-O0):
define void @VP8DspInitMIPS32() {
ret void
}

LLVM IR (-O2):
define void @VP8DspInitMIPS32() {
ret void
}
long core___core__Byte___Object__hash(unsigned char self) {
  long var;
  long var1;
  long var3;
  {
    {
      var3 = (long)self;
      var1 = var3;
      goto RET_LABEL2;
    RET_LABEL2:
      (void)0;
    }
  }
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Byte___Object__hash>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Byte___Object__hash>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i64 @core___core__Byte___Object__hash(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i8 %0, i8* %2
%6 = load i8, i8* %2
%7 = zext i8 %6 to i64
store i64 %7, i64* %5
%8 = load i64, i64* %5
store i64 %8, i64* %4
br label %9
9: ; preds = %1
%10 = load i64, i64* %4
store i64 %10, i64* %3
br label %11
11: ; preds = %9
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @core___core__Byte___Object__hash(i8 zeroext %0) {
%2 = zext i8 %0 to i64
ret i64 %2
}
int test_mul5div8(int x) { return 5 * x / 8; }


x86 assembly (clang, -O0):
<test_mul5div8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x5,-0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mul5div8>:
lea    (%rdi,%rdi,4),%ecx
lea    (%rdi,%rdi,4),%eax
add    $0x7,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @test_mul5div8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 5, %3
%5 = sdiv i32 %4, 8
ret i32 %5
}

LLVM IR (-O2):
define i32 @test_mul5div8(i32 %0) {
%2 = mul nsw i32 %0, 5
%3 = sdiv i32 %2, 8
ret i32 %3
}
/* Type definitions */
struct RNAplfold_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_args(struct RNAplfold_args_info *);
int /*<<< orphan*/ clear_given(struct RNAplfold_args_info *);
int /*<<< orphan*/ init_args_info(struct RNAplfold_args_info *);
void RNAplfold_cmdline_parser_init(struct RNAplfold_args_info *args_info) {
  clear_given(args_info);
  clear_args(args_info);
  init_args_info(args_info);
}


x86 assembly (clang, -O0):
<RNAplfold_cmdline_parser_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <clear_given@plt>
mov    -0x8(%rbp),%rdi
call   1030 <clear_args@plt>
mov    -0x8(%rbp),%rdi
call   1050 <init_args_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAplfold_cmdline_parser_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <clear_given@plt>
mov    %rbx,%rdi
call   1030 <clear_args@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <init_args_info@plt>

LLVM IR (-O0):
%struct.RNAplfold_args_info = type { i32 }
define void @RNAplfold_cmdline_parser_init(%struct.RNAplfold_args_info* %0) {
%2 = alloca %struct.RNAplfold_args_info*
store %struct.RNAplfold_args_info* %0, %struct.RNAplfold_args_info** %2
%3 = load %struct.RNAplfold_args_info*, %struct.RNAplfold_args_info** %2
%4 = call i32 @clear_given(%struct.RNAplfold_args_info* %3)
%5 = load %struct.RNAplfold_args_info*, %struct.RNAplfold_args_info** %2
%6 = call i32 @clear_args(%struct.RNAplfold_args_info* %5)
%7 = load %struct.RNAplfold_args_info*, %struct.RNAplfold_args_info** %2
%8 = call i32 @init_args_info(%struct.RNAplfold_args_info* %7)
ret void
}

LLVM IR (-O2):
%struct.RNAplfold_args_info = type { i32 }
define void @RNAplfold_cmdline_parser_init(%struct.RNAplfold_args_info* %0) {
%2 = tail call i32 @clear_given(%struct.RNAplfold_args_info* %0)
%3 = tail call i32 @clear_args(%struct.RNAplfold_args_info* %0)
%4 = tail call i32 @init_args_info(%struct.RNAplfold_args_info* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
unsigned long EPINonBlockingReadCount(unsigned long ulBase,
                                      unsigned long ulChannel) {
  unsigned long ulOffset;
  DEBUG_ASSERT(ulBase == 0x400D0000);
  DEBUG_ASSERT(ulChannel < 2);
  ulOffset = ulChannel * (0x00000038 - 0x00000028);
  return ((*((volatile unsigned long *)(ulBase + 0x00000028 + ulOffset))));
}


x86 assembly (clang, -O0):
<EPINonBlockingReadCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x400d0000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x2,-0x10(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
shl    $0x4,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x28,%rax
add    -0x18(%rbp),%rax
mov    (%rax),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPINonBlockingReadCount>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x400d0000,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x2,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
shl    $0x4,%rbx
mov    0x28(%r14,%rbx,1),%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @EPINonBlockingReadCount(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = icmp eq i64 %6, 1074593792
%8 = zext i1 %7 to i32
%9 = call i32 @DEBUG_ASSERT(i32 %8)
%10 = load i64, i64* %4
%11 = icmp ult i64 %10, 2
%12 = zext i1 %11 to i32
%13 = call i32 @DEBUG_ASSERT(i32 %12)
%14 = load i64, i64* %4
%15 = mul i64 %14, 16
store i64 %15, i64* %5
%16 = load i64, i64* %3
%17 = add i64 %16, 40
%18 = load i64, i64* %5
%19 = add i64 %17, %18
%20 = inttoptr i64 %19 to i64*
%21 = load volatile i64, i64* %20
ret i64 %21
}

LLVM IR (-O2):
define i64 @EPINonBlockingReadCount(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074593792
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = icmp ult i64 %1, 2
%7 = zext i1 %6 to i32
%8 = tail call i32 @DEBUG_ASSERT(i32 %7)
%9 = shl i64 %1, 4
%10 = add i64 %0, 40
%11 = add i64 %10, %9
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
ret i64 %13
}
void vec3_sub(double o[3], const double u[3], const double v[3]) {
  int i;
  for (i = 0; i < 3; i++)
    o[i] = u[i] - v[i];
}


x86 assembly (clang, -O0):
<vec3_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x3,-0x1c(%rbp)
jge    1156 <vec3_sub+0x56>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
subsd  (%rax,%rcx,8),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <vec3_sub+0x17>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_sub>:
movsd  (%rsi),%xmm0
subsd  (%rdx),%xmm0
movsd  %xmm0,(%rdi)
movsd  0x8(%rsi),%xmm0
subsd  0x8(%rdx),%xmm0
movsd  %xmm0,0x8(%rdi)
movsd  0x10(%rsi),%xmm0
subsd  0x10(%rdx),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @vec3_sub(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
%7 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
store i32 0, i32* %7
br label %8
8: ; preds = %27, %3
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %30
11: ; preds = %8
%12 = load double*, double** %5
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double, double* %12, i64 %14
%16 = load double, double* %15
%17 = load double*, double** %6
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds double, double* %17, i64 %19
%21 = load double, double* %20
%22 = fsub double %16, %21
%23 = load double*, double** %4
%24 = load i32, i32* %7
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds double, double* %23, i64 %25
store double %22, double* %26
br label %27
27: ; preds = %11
%28 = load i32, i32* %7
%29 = add nsw i32 %28, 1
store i32 %29, i32* %7
br label %8
30: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @vec3_sub(double* nocapture writeonly %0, double* nocapture %1, double* nocapture %2) {
%4 = load double, double* %1
%5 = load double, double* %2
%6 = fsub double %4, %5
store double %6, double* %0
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %2, i64 1
%10 = load double, double* %9
%11 = fsub double %8, %10
%12 = getelementptr inbounds double, double* %0, i64 1
store double %11, double* %12
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = getelementptr inbounds double, double* %2, i64 2
%16 = load double, double* %15
%17 = fsub double %14, %16
%18 = getelementptr inbounds double, double* %0, i64 2
store double %17, double* %18
ret void
}
/* Variables and functions */
scalar_t__ access_cache(int);
int /*<<< orphan*/ flush_cache();
int get_block_size(void) {
  int i = 0;
  flush_cache();
  access_cache(i);
  while (access_cache(++i))
    ;
  return i;
}


x86 assembly (clang, -O0):
<get_block_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <flush_cache@plt>
mov    -0x4(%rbp),%edi
call   1030 <access_cache@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    %edi,-0x4(%rbp)
call   1030 <access_cache@plt>
cmp    $0x0,%rax
je     115b <get_block_size+0x3b>
jmp    113e <get_block_size+0x1e>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_block_size>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <flush_cache@plt>
xor    %edi,%edi
call   1030 <access_cache@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <access_cache@plt>
test   %rax,%rax
jne    1140 <get_block_size+0x20>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_block_size() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @flush_cache()
%3 = load i32, i32* %1
%4 = call i64 @access_cache(i32 %3)
br label %5
5: ; preds = %10, %0
%6 = load i32, i32* %1
%7 = add nsw i32 %6, 1
store i32 %7, i32* %1
%8 = call i64 @access_cache(i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5
br label %5
11: ; preds = %5
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @get_block_size() {
%1 = tail call i32 (...) @flush_cache()
%2 = tail call i64 @access_cache(i32 0)
br label %3
3: ; preds = %3, %0
%4 = phi i32 [ 0, %0 ], [ %5, %3 ]
%5 = add nuw nsw i32 %4, 1
%6 = tail call i64 @access_cache(i32 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 %5
}
int numlength(int nbr) {
  int i;
  long long tmp;
  i = 0;
  tmp = nbr;
  if (tmp == 0)
    i++;
  if (tmp < 0)
    tmp *= -1;
  while (tmp > 0) {
    i++;
    tmp /= 10;
  }
  return (i);
}


x86 assembly (clang, -O0):
<numlength>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    112a <numlength+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    113e <numlength+0x3e>
imul   $0xffffffffffffffff,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1143 <numlength+0x43>
cmpq   $0x0,-0x10(%rbp)
jle    116e <numlength+0x6e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x10(%rbp)
jmp    1143 <numlength+0x43>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numlength>:
test   %edi,%edi
je     1139 <numlength+0x39>
mov    %edi,%esi
neg    %esi
cmovs  %edi,%esi
xor    %ecx,%ecx
movabs $0xcccccccccccccccd,%rdi
cc cc cc
nopw   0x0(%rax,%rax,1)
add    $0x1,%ecx
mov    %rsi,%rax
mul    %rdi
shr    $0x3,%rdx
cmp    $0x9,%rsi
mov    %rdx,%rsi
ja     1120 <numlength+0x20>
mov    %ecx,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @numlength(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
store i64 %6, i64* %4
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %12
12: ; preds = %9, %1
%13 = load i64, i64* %4
%14 = icmp slt i64 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i64, i64* %4
%17 = mul nsw i64 %16, -1
store i64 %17, i64* %4
br label %18
18: ; preds = %15, %12
br label %19
19: ; preds = %22, %18
%20 = load i64, i64* %4
%21 = icmp sgt i64 %20, 0
br i1 %21, label %22, label %27
22: ; preds = %19
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
%25 = load i64, i64* %4
%26 = sdiv i64 %25, 10
store i64 %26, i64* %4
br label %19
27: ; preds = %19
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @numlength(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.abs.i32(i32 %0, i1 false)
%5 = zext i32 %4 to i64
br label %6
6: ; preds = %3, %6
%7 = phi i64 [ %10, %6 ], [ %5, %3 ]
%8 = phi i32 [ %9, %6 ], [ 0, %3 ]
%9 = add nuw nsw i32 %8, 1
%10 = udiv i64 %7, 10
%11 = icmp ult i64 %7, 10
br i1 %11, label %12, label %6
12: ; preds = %6, %1
%13 = phi i32 [ 1, %1 ], [ %9, %6 ]
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ encode_P(int /*<<< orphan*/ *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ encode_Q(int /*<<< orphan*/ *, int, int /*<<< orphan*/ *);
void add_ecc(uint8_t *sector) {
  encode_P(sector + 12, 2064, sector + 2076);
  encode_Q(sector + 12, 2236, sector + 2248);
}


x86 assembly (clang, -O0):
<add_ecc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x30,%rdi
mov    -0x8(%rbp),%rdx
add    $0x2070,%rdx
mov    $0x810,%esi
call   1040 <encode_P@plt>
mov    -0x8(%rbp),%rdi
add    $0x30,%rdi
mov    -0x8(%rbp),%rdx
add    $0x2320,%rdx
mov    $0x8bc,%esi
call   1030 <encode_Q@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_ecc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x30(%rdi),%r14
lea    0x2070(%rdi),%rdx
mov    %r14,%rdi
mov    $0x810,%esi
call   1040 <encode_P@plt>
add    $0x2320,%rbx
mov    %r14,%rdi
mov    $0x8bc,%esi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <encode_Q@plt>

LLVM IR (-O0):
define void @add_ecc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 12
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 2076
%7 = call i32 @encode_P(i32* %4, i32 2064, i32* %6)
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 12
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 2248
%12 = call i32 @encode_Q(i32* %9, i32 2236, i32* %11)
ret void
}

LLVM IR (-O2):
define void @add_ecc(i32* %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 12
%3 = getelementptr inbounds i32, i32* %0, i64 2076
%4 = tail call i32 @encode_P(i32* %2, i32 2064, i32* %3)
%5 = getelementptr inbounds i32, i32* %0, i64 2248
%6 = tail call i32 @encode_Q(i32* %2, i32 2236, i32* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ClearSaveSlot(int);
void SV_InitBaseSlot(void) { ClearSaveSlot(6); }


x86 assembly (clang, -O0):
<SV_InitBaseSlot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <ClearSaveSlot@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SV_InitBaseSlot>:
mov    $0x6,%edi
jmp    1030 <ClearSaveSlot@plt>

LLVM IR (-O0):
define void @SV_InitBaseSlot() {
%1 = call i32 @ClearSaveSlot(i32 6)
ret void
}

LLVM IR (-O2):
define void @SV_InitBaseSlot() {
%1 = tail call i32 @ClearSaveSlot(i32 6)
ret void
}
int min(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *, int, long, long);
int /*<<< orphan*/ printfail();
void fexpectl(char *file, int line, long a, long b) {
  if (a == b)
    return;
  printfail();
  printf("%s:%d: %ld expected, but got %ld\n", file, line, a, b);
  exit(1);
}


x86 assembly (clang, -O0):
<fexpectl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jne    115b <fexpectl+0x2b>
add    $0x20,%rsp
pop    %rbp
ret
mov    $0x0,%al
call   1040 <printfail@plt>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
lea    0xe88(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<fexpectl>:
cmp    %rcx,%rdx
jne    1136 <fexpectl+0x6>
ret
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %esi,%r15d
mov    %rdi,%rbp
xor    %eax,%eax
call   1040 <printfail@plt>
lea    0xea9(%rip),%rdi
mov    %rbp,%rsi
mov    %r15d,%edx
mov    %rbx,%rcx
mov    %r14,%r8
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"%s:%d: %ld expected, but got %ld\0A\00"
define void @fexpectl(i8* %0, i32 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = load i64, i64* %8
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %4
ret void
13: ; preds = %4
%14 = call i32 (...) @printfail()
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = load i64, i64* %7
%18 = load i64, i64* %8
%19 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %15, i32 %16, i64 %17, i64 %18)
%20 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [34 x i8] c"%s:%d: %ld expected, but got %ld\0A\00"
define void @fexpectl(i8* %0, i32 %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %2, %3
br i1 %5, label %6, label %7
6: ; preds = %4
ret void
7: ; preds = %4
%8 = tail call i32 (...) @printfail()
%9 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i64 %2, i64 %3)
%10 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int epoll_create(int);
int sp_create(int nr) { return epoll_create(nr); }


x86 assembly (clang, -O0):
<sp_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <epoll_create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_create>:
jmp    1030 <epoll_create@plt>

LLVM IR (-O0):
define i32 @sp_create(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @epoll_create(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sp_create(i32 %0) {
%2 = tail call i32 @epoll_create(i32 %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ log10(double);
float log10f(float s) { return (float)log10((double)s); }


x86 assembly (clang, -O0):
<log10f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <log10@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log10f>:
push   %rax
cvtss2sd %xmm0,%xmm0
call   1030 <log10@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @log10f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i64 @log10(double %4)
%6 = sitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @log10f(float %0) {
%2 = fpext float %0 to double
%3 = tail call i64 @log10(double %2)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ FindPrimerNumber();
int main() {
  FindPrimerNumber();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <FindPrimerNumber@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <FindPrimerNumber@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @FindPrimerNumber()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @FindPrimerNumber()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ruby_Init_Fiber_as_Coroutine();
void Init_fiber(void) { ruby_Init_Fiber_as_Coroutine(); }


x86 assembly (clang, -O0):
<Init_fiber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ruby_Init_Fiber_as_Coroutine@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init_fiber>:
xor    %eax,%eax
jmp    1030 <ruby_Init_Fiber_as_Coroutine@plt>

LLVM IR (-O0):
define void @Init_fiber() {
%1 = call i32 (...) @ruby_Init_Fiber_as_Coroutine()
ret void
}

LLVM IR (-O2):
define void @Init_fiber() {
%1 = tail call i32 (...) @ruby_Init_Fiber_as_Coroutine()
ret void
}
int ishigh(char c) {
  if (c > 'q')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<ishigh>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x71,%eax
jle    1123 <ishigh+0x23>
movl   $0x1,-0x4(%rbp)
jmp    112a <ishigh+0x2a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishigh>:
xor    %eax,%eax
cmp    $0x72,%dil
setge  %al
ret

LLVM IR (-O0):
define i32 @ishigh(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sgt i32 %5, 113
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @ishigh(i8 signext %0) {
%2 = icmp sgt i8 %0, 113
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
int /*<<< orphan*/ waitpid(int, int *, int /*<<< orphan*/);
void sig_chld(int signo) {
  pid_t pid;
  int stat;
  while ((pid = waitpid(-1, &stat, WNOHANG)) > 0)
    ;
  return;
}


x86 assembly (clang, -O0):
<sig_chld>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
lea    -0xc(%rbp),%rsi
call   1030 <waitpid@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    1143 <sig_chld+0x33>
jmp    111b <sig_chld+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_chld>:
push   %r14
push   %rbx
push   %rax
mov    0x2ecd(%rip),%r14
lea    0x4(%rsp),%rbx
mov    (%r14),%edx
mov    $0xffffffff,%edi
mov    %rbx,%rsi
call   1030 <waitpid@plt>
test   %eax,%eax
jg     1120 <sig_chld+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define void @sig_chld(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* @WNOHANG
%7 = call i32 @waitpid(i32 -1, i32* %4, i32 %6)
store i32 %7, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define void @sig_chld(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
br label %4
4: ; preds = %4, %1
%5 = load i32, i32* @WNOHANG
%6 = call i32 @waitpid(i32 -1, i32* %2, i32 %5)
%7 = icmp sgt i32 %6, 0
br i1 %7, label %4, label %8
8: ; preds = %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ factor(int);
int main(void) {
  factor(2036446129);
  factor(100);
  factor(21);
  factor(123392);
  factor(2769);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x7961b3b1,%edi
call   1030 <factor@plt>
mov    $0x64,%edi
call   1030 <factor@plt>
mov    $0x15,%edi
call   1030 <factor@plt>
mov    $0x1e200,%edi
call   1030 <factor@plt>
mov    $0xad1,%edi
call   1030 <factor@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7961b3b1,%edi
call   1030 <factor@plt>
mov    $0x64,%edi
call   1030 <factor@plt>
mov    $0x15,%edi
call   1030 <factor@plt>
mov    $0x1e200,%edi
call   1030 <factor@plt>
mov    $0xad1,%edi
call   1030 <factor@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @factor(i32 2036446129)
%3 = call i32 @factor(i32 100)
%4 = call i32 @factor(i32 21)
%5 = call i32 @factor(i32 123392)
%6 = call i32 @factor(i32 2769)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @factor(i32 2036446129)
%2 = tail call i32 @factor(i32 100)
%3 = tail call i32 @factor(i32 21)
%4 = tail call i32 @factor(i32 123392)
%5 = tail call i32 @factor(i32 2769)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ pp1_node_to_cpu(int /*<<< orphan*/);
int set_balance_policy(int /*<<< orphan*/, int, int /*<<< orphan*/);
int set_pp1_balance_policy(uint64_t node, uint64_t priority_level) {
  uint64_t cpu = pp1_node_to_cpu(node);
  return set_balance_policy(cpu, 0x642, priority_level);
}


x86 assembly (clang, -O0):
<set_pp1_balance_policy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <pp1_node_to_cpu@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x642,%esi
call   1040 <set_balance_policy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pp1_balance_policy>:
push   %rbx
mov    %esi,%ebx
call   1030 <pp1_node_to_cpu@plt>
mov    %eax,%edi
mov    $0x642,%esi
mov    %ebx,%edx
pop    %rbx
jmp    1040 <set_balance_policy@plt>

LLVM IR (-O0):
define i32 @set_pp1_balance_policy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @pp1_node_to_cpu(i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = call i32 @set_balance_policy(i32 %8, i32 1602, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @set_pp1_balance_policy(i32 %0, i32 %1) {
%3 = tail call i32 @pp1_node_to_cpu(i32 %0)
%4 = tail call i32 @set_balance_policy(i32 %3, i32 1602, i32 %1)
ret i32 %4
}
int test_imm_9Cuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x9C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Cuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x9c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Cuint64_midword_reg>:
test   $0x9c0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Cuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 156
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Cuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 10223616
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
void *memset(void *, int, size_t);
void *memzero(void *dst, size_t count) { return memset(dst, 0x00, count); }


x86 assembly (clang, -O0):
<memzero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memzero>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i8* @memzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
ret i8* %5
}

LLVM IR (-O2):
define i8* @memzero(i8* returned writeonly %0, i64 %1) {
tail call void @llvm.memset.p0i8.i64(i8* align 1 %0, i8 0, i64 %1, i1 false)
ret i8* %0
}
f(int *p) { return p == 0; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp eq i32* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @f(i32* readnone %0) {
%2 = icmp eq i32* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
void sig_first_stop_handle(int signal) {
  sleep(15);
  printf("%s\n", __func__);
}


x86 assembly (clang, -O0):
<sig_first_stop_handle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xf,%edi
mov    $0x0,%al
call   1040 <sleep@plt>
lea    0xec2(%rip),%rdi
lea    0xebf(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_first_stop_handle>:
push   %rax
mov    $0xf,%edi
xor    %eax,%eax
call   1040 <sleep@plt>
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@__func__.sig_first_stop_handle = [22 x i8] c"sig_first_stop_handle\00"
define void @sig_first_stop_handle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @sleep to i32 (i32, ...)*)(i32 15)
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.sig_first_stop_handle, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.sig_first_stop_handle = [22 x i8] c"sig_first_stop_handle\00"
define void @sig_first_stop_handle(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @sleep to i32 (i32, ...)*)(i32 15)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.sig_first_stop_handle, i64 0, i64 0))
ret void
}
int vm_var_wrap() { return 1; }


x86 assembly (clang, -O0):
<vm_var_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vm_var_wrap>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @vm_var_wrap() {
ret i32 1
}

LLVM IR (-O2):
define i32 @vm_var_wrap() {
ret i32 1
}
/* Variables and functions */
short _pic_read_reg(int);
short pic_read_irr() { return _pic_read_reg(0x0A); }


x86 assembly (clang, -O0):
<pic_read_irr>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <_pic_read_reg@plt>
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_read_irr>:
mov    $0xa,%edi
jmp    1030 <_pic_read_reg@plt>

LLVM IR (-O0):
define signext i16 @pic_read_irr() {
%1 = call signext i16 @_pic_read_reg(i32 10)
ret i16 %1
}

LLVM IR (-O2):
define signext i16 @pic_read_irr() {
%1 = tail call signext i16 @_pic_read_reg(i32 10)
ret i16 %1
}
void plat_cleanInvalidateCache(void) {}


x86 assembly (clang, -O0):
<plat_cleanInvalidateCache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plat_cleanInvalidateCache>:
ret

LLVM IR (-O0):
define void @plat_cleanInvalidateCache() {
ret void
}

LLVM IR (-O2):
define void @plat_cleanInvalidateCache() {
ret void
}
void ff_hevc_put_hevc_uni_w_epel_h16_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h16_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h16_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h16_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h16_10_sse4() {
ret void
}
void gdk_x11_drawable_get_xid() {}


x86 assembly (clang, -O0):
<gdk_x11_drawable_get_xid>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_x11_drawable_get_xid>:
ret

LLVM IR (-O0):
define void @gdk_x11_drawable_get_xid() {
ret void
}

LLVM IR (-O2):
define void @gdk_x11_drawable_get_xid() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_config_bits_PIC24(unsigned long, unsigned char *, char,
                                           int);
void write_config_bits_P24KA(unsigned long address, unsigned char *data,
                             char blocksize, char lastblock) {
  write_config_bits_PIC24(address, data, blocksize, 0x4004);
}


x86 assembly (clang, -O0):
<write_config_bits_P24KA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %cl,-0x11(%rbp)
mov    %al,-0x12(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4004,%ecx
movsbl -0x11(%rbp),%edx
call   1030 <write_config_bits_PIC24@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_config_bits_P24KA>:
mov    $0x4004,%ecx
jmp    1030 <write_config_bits_PIC24@plt>

LLVM IR (-O0):
define void @write_config_bits_P24KA(i64 %0, i8* %1, i8 signext %2, i8 signext %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i8
store i64 %0, i64* %5
store i8* %1, i8** %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i64, i64* %5
%10 = load i8*, i8** %6
%11 = load i8, i8* %7
%12 = call i32 @write_config_bits_PIC24(i64 %9, i8* %10, i8 signext %11, i32 16388)
ret void
}

LLVM IR (-O2):
define void @write_config_bits_P24KA(i64 %0, i8* %1, i8 signext %2, i8 signext %3) {
%5 = tail call i32 @write_config_bits_PIC24(i64 %0, i8* %1, i8 signext %2, i32 16388)
ret void
}
/* Type definitions */
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ drawStr(char *, int, int, int);
int /*<<< orphan*/ gotoxy(int, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
void drawTime(struct tm *timeinfo) {
  char buf[9];
  gotoxy(2, 15);
  printf("Local Time");
  strftime(buf, 9, "%H:%M:%S", timeinfo);
  drawStr(buf, 9, 9, 18);
}


x86 assembly (clang, -O0):
<drawTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
mov    $0xf,%esi
call   1060 <gotoxy@plt>
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
lea    -0x11(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x9,%esi
lea    0xe90(%rip),%rdx
call   1050 <strftime@plt>
lea    -0x11(%rbp),%rdi
mov    $0x9,%edx
mov    $0x12,%ecx
mov    %edx,%esi
call   1040 <drawStr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawTime>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rdi,%rbx
mov    $0x2,%edi
mov    $0xf,%esi
call   1060 <gotoxy@plt>
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
lea    0xe9f(%rip),%rdx
lea    0xf(%rsp),%r14
mov    %r14,%rdi
mov    $0x9,%esi
mov    %rbx,%rcx
call   1050 <strftime@plt>
mov    %r14,%rdi
mov    $0x9,%esi
mov    $0x9,%edx
mov    $0x12,%ecx
call   1040 <drawStr@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [11 x i8] c"Local Time\00"
@.str.1 = [9 x i8] c"%H:%M:%S\00"
define void @drawTime(%struct.tm* %0) {
%2 = alloca %struct.tm*
%3 = alloca [9 x i8]
store %struct.tm* %0, %struct.tm** %2
%4 = call i32 @gotoxy(i32 2, i32 15)
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%6 = getelementptr inbounds [9 x i8], [9 x i8]* %3, i64 0, i64 0
%7 = load %struct.tm*, %struct.tm** %2
%8 = call i32 @strftime(i8* %6, i32 9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), %struct.tm* %7)
%9 = getelementptr inbounds [9 x i8], [9 x i8]* %3, i64 0, i64 0
%10 = call i32 @drawStr(i8* %9, i32 9, i32 9, i32 18)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [11 x i8] c"Local Time\00"
@.str.1 = [9 x i8] c"%H:%M:%S\00"
define void @drawTime(%struct.tm* %0) {
%2 = alloca [9 x i8]
%3 = getelementptr inbounds [9 x i8], [9 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @gotoxy(i32 2, i32 15)
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @strftime(i8* %3, i32 9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), %struct.tm* %0)
%7 = call i32 @drawStr(i8* %3, i32 9, i32 9, i32 18)
ret void
}
int compar(const void *a, const void *b) { return *((int *)a) - *((int *)b); }


x86 assembly (clang, -O0):
<compar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compar>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compar(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int O_APPEND;
int O_CREAT;
int O_SYNC;
int O_WRONLY;
int S_IRUSR;
int S_IWUSR;
int open(char const *, int, int);
int journal_open_write(const char *filepath) {
  return open(filepath, O_WRONLY | O_CREAT | O_APPEND | O_SYNC,
              S_IRUSR | S_IWUSR);
}


x86 assembly (clang, -O0):
<journal_open_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e91(%rip),%rax
mov    (%rax),%esi
mov    0x2ec8(%rip),%rax
or     (%rax),%esi
mov    0x2e77(%rip),%rax
or     (%rax),%esi
mov    0x2e9e(%rip),%rax
or     (%rax),%esi
mov    0x2e7d(%rip),%rax
mov    (%rax),%edx
mov    0x2e84(%rip),%rax
or     (%rax),%edx
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<journal_open_write>:
mov    0x2ea1(%rip),%rax
mov    0x2eda(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    0x2e87(%rip),%rax
or     (%rax),%esi
mov    0x2eae(%rip),%rax
or     (%rax),%esi
mov    0x2e8d(%rip),%rax
mov    0x2e96(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
jmp    1030 <open@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_APPEND = global i32 0
@O_SYNC = global i32 0
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
define i32 @journal_open_write(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_WRONLY
%5 = load i32, i32* @O_CREAT
%6 = or i32 %4, %5
%7 = load i32, i32* @O_APPEND
%8 = or i32 %6, %7
%9 = load i32, i32* @O_SYNC
%10 = or i32 %8, %9
%11 = load i32, i32* @S_IRUSR
%12 = load i32, i32* @S_IWUSR
%13 = or i32 %11, %12
%14 = call i32 @open(i8* %3, i32 %10, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_APPEND = global i32 0
@O_SYNC = global i32 0
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
define i32 @journal_open_write(i8* nocapture %0) {
%2 = load i32, i32* @O_WRONLY
%3 = load i32, i32* @O_CREAT
%4 = or i32 %3, %2
%5 = load i32, i32* @O_APPEND
%6 = or i32 %4, %5
%7 = load i32, i32* @O_SYNC
%8 = or i32 %6, %7
%9 = load i32, i32* @S_IRUSR
%10 = load i32, i32* @S_IWUSR
%11 = or i32 %10, %9
%12 = tail call i32 @open(i8* %0, i32 %8, i32 %11)
ret i32 %12
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int intcelcon_write_mixed_cell_configuration(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(742, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<intcelcon_write_mixed_cell_configuration>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x2e6,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcelcon_write_mixed_cell_configuration>:
mov    $0x2e6,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @intcelcon_write_mixed_cell_configuration() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 742, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @intcelcon_write_mixed_cell_configuration() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 742, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void mbed_trace_cmdprint_function_set(void (*printf)(const char *)) {}


x86 assembly (clang, -O0):
<mbed_trace_cmdprint_function_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbed_trace_cmdprint_function_set>:
ret

LLVM IR (-O0):
define void @mbed_trace_cmdprint_function_set(void (i8*)* %0) {
%2 = alloca void (i8*)*
store void (i8*)* %0, void (i8*)** %2
ret void
}

LLVM IR (-O2):
define void @mbed_trace_cmdprint_function_set(void (i8*)* nocapture %0) {
ret void
}