xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ io_set_pgc(int);
int /*<<< orphan*/ io_set_pgd(int);
int /*<<< orphan*/ io_set_pgm(int);
int /*<<< orphan*/ io_set_vpp(int);
void pic12_standby(void) {
  io_set_pgd((0x00));
  io_set_pgc((0x00));
  io_set_vpp((0x00));
  io_set_pgm((0x00));
}


x86 assembly (clang, -O0):
<pic12_standby>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1050 <io_set_pgd@plt>
xor    %edi,%edi
call   1060 <io_set_pgc@plt>
xor    %edi,%edi
call   1040 <io_set_vpp@plt>
xor    %edi,%edi
call   1030 <io_set_pgm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic12_standby>:
push   %rax
xor    %edi,%edi
call   1050 <io_set_pgd@plt>
xor    %edi,%edi
call   1060 <io_set_pgc@plt>
xor    %edi,%edi
call   1040 <io_set_vpp@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <io_set_pgm@plt>

LLVM IR (-O0):
define void @pic12_standby() {
%1 = call i32 @io_set_pgd(i32 0)
%2 = call i32 @io_set_pgc(i32 0)
%3 = call i32 @io_set_vpp(i32 0)
%4 = call i32 @io_set_pgm(i32 0)
ret void
}

LLVM IR (-O2):
define void @pic12_standby() {
%1 = tail call i32 @io_set_pgd(i32 0)
%2 = tail call i32 @io_set_pgc(i32 0)
%3 = tail call i32 @io_set_vpp(i32 0)
%4 = tail call i32 @io_set_pgm(i32 0)
ret void
}
/* Type definitions */
typedef enum bpf_map_type { ____Placeholder_bpf_map_type } bpf_map_type;
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int bpf_create_map_node(int, int /*<<< orphan*/ *, int, int, int,
                        int /*<<< orphan*/, int);
int bpf_create_map(enum bpf_map_type map_type, int key_size, int value_size,
                   int max_entries, __u32 map_flags) {
  return bpf_create_map_node(map_type, NULL, key_size, value_size, max_entries,
                             map_flags, -1);
}


x86 assembly (clang, -O0):
<bpf_create_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    -0x14(%rbp),%r9d
xor    %eax,%eax
mov    %eax,%esi
movl   $0xffffffff,(%rsp)
call   1030 <bpf_create_map_node@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_create_map>:
push   %rax
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
movl   $0xffffffff,(%rsp)
xor    %esi,%esi
call   1030 <bpf_create_map_node@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bpf_create_map(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @bpf_create_map_node(i32 %11, i32* null, i32 %12, i32 %13, i32 %14, i32 %15, i32 -1)
ret i32 %16
}

LLVM IR (-O2):
define i32 @bpf_create_map(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @bpf_create_map_node(i32 %0, i32* null, i32 %1, i32 %2, i32 %3, i32 %4, i32 -1)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
int /*<<< orphan*/ scanf(char *, char *, char *);
int main(void) {
  char girl[30], boy[30];
  scanf("%s %s", girl, boy);
  printf("%s and %s sitting in the tree", girl, boy);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rsi
lea    -0x50(%rbp),%rdx
lea    0xec2(%rip),%rdi
call   1040 <scanf@plt>
lea    -0x30(%rbp),%rsi
lea    -0x50(%rbp),%rdx
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x48,%rsp
lea    0xed2(%rip),%rdi
lea    0x20(%rsp),%rbx
mov    %rsp,%r14
mov    %rbx,%rsi
mov    %r14,%rdx
call   1040 <scanf@plt>
lea    0xebe(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x48,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s %s\00"
@.str.1 = [30 x i8] c"%s and %s sitting in the tree\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [30 x i8]
%3 = alloca [30 x i8]
store i32 0, i32* %1
%4 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%6 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %5)
%7 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%8 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0), i8* %7, i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s %s\00"
@.str.1 = [30 x i8] c"%s and %s sitting in the tree\00"
define i32 @main() {
%1 = alloca [30 x i8]
%2 = alloca [30 x i8]
%3 = getelementptr inbounds [30 x i8], [30 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0), i8* %3, i8* %4)
ret i32 0
}
void foo_1_2_1_1_2_1_1_2_2() {}


x86 assembly (clang, -O0):
<foo_1_2_1_1_2_1_1_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_2_1_1_2_1_1_2_2>:
ret

LLVM IR (-O0):
define void @foo_1_2_1_1_2_1_1_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_2_1_1_2_1_1_2_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fftss_init_threads();
void DFFTSS_INIT_THREADS_(void) { fftss_init_threads(); }


x86 assembly (clang, -O0):
<DFFTSS_INIT_THREADS_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fftss_init_threads@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DFFTSS_INIT_THREADS_>:
xor    %eax,%eax
jmp    1030 <fftss_init_threads@plt>

LLVM IR (-O0):
define void @DFFTSS_INIT_THREADS_() {
%1 = call i32 (...) @fftss_init_threads()
ret void
}

LLVM IR (-O2):
define void @DFFTSS_INIT_THREADS_() {
%1 = tail call i32 (...) @fftss_init_threads()
ret void
}
void rcu_read_unlock_qsbr(void) {}


x86 assembly (clang, -O0):
<rcu_read_unlock_qsbr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_read_unlock_qsbr>:
ret

LLVM IR (-O0):
define void @rcu_read_unlock_qsbr() {
ret void
}

LLVM IR (-O2):
define void @rcu_read_unlock_qsbr() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config) {
  ;

  ;

  ;

  ;

  ;

  ;
  if ((*((volatile uint32_t *)(ui32Base + 0x00000050))) & 0x20000000) {
    ui32Config |= 0x20000000;
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000050))) = ui32Config;
}


x86 assembly (clang, -O0):
<AESConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%eax
cltq
mov    (%rax),%eax
and    $0x20000000,%eax
cmp    $0x0,%eax
je     112d <AESConfigSet+0x2d>
mov    -0x8(%rbp),%eax
or     $0x20000000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x50,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AESConfigSet>:
movslq %edi,%rax
mov    $0x20000000,%ecx
and    0x50(%rax),%ecx
or     %esi,%ecx
mov    %ecx,0x50(%rax)
ret

LLVM IR (-O0):
define void @AESConfigSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 80
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, 536870912
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %4
%14 = or i32 %13, 536870912
store i32 %14, i32* %4
br label %15
15: ; preds = %12, %2
%16 = load i32, i32* %4
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 80
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
store volatile i32 %16, i32* %20
ret void
}

LLVM IR (-O2):
define void @AESConfigSet(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 80
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, 536870912
%8 = or i32 %7, %1
store volatile i32 %8, i32* %5
ret void
}
int test_imm_10uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x10 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_10uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x10,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_10uint64_midword_reg>:
test   $0x100000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_10uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 16
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_10uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 1048576
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int get_freq(peak1, peak2) {
  int gap = peak2 - peak1;
  return 44100 / gap;
}


x86 assembly (clang, -O0):
<get_freq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xac44,%eax
cltd
idivl  -0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_freq>:
sub    %edi,%esi
mov    $0xac44,%eax
xor    %edx,%edx
idiv   %esi
ret

LLVM IR (-O0):
define i32 @get_freq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = sdiv i32 44100, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_freq(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = sdiv i32 44100, %3
ret i32 %4
}
int isValidMove(int grid[6][7], int column) {
  if (column < 0 || column >= 7 || grid[0][column] != '\0')
    return -1;
  return 1;
}


x86 assembly (clang, -O0):
<isValidMove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1131 <isValidMove+0x31>
cmpl   $0x7,-0x14(%rbp)
jge    1131 <isValidMove+0x31>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
je     113d <isValidMove+0x3d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1144 <isValidMove+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isValidMove>:
mov    $0xffffffff,%eax
cmp    $0x6,%esi
ja     1116 <isValidMove+0x16>
mov    %esi,%eax
xor    %ecx,%ecx
cmp    (%rdi,%rax,4),%ecx
sbb    %eax,%eax
or     $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isValidMove([7 x i32]* %0, i32 %1) {
%3 = alloca i32
%4 = alloca [7 x i32]*
%5 = alloca i32
store [7 x i32]* %0, [7 x i32]** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp slt i32 %6, 0
br i1 %7, label %19, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 7
br i1 %10, label %19, label %11
11: ; preds = %8
%12 = load [7 x i32]*, [7 x i32]** %4
%13 = getelementptr inbounds [7 x i32], [7 x i32]* %12, i64 0
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [7 x i32], [7 x i32]* %13, i64 0, i64 %15
%17 = load i32, i32* %16
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %11, %8, %2
store i32 -1, i32* %3
br label %21
20: ; preds = %11
store i32 1, i32* %3
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @isValidMove([7 x i32]* nocapture %0, i32 %1) {
%3 = icmp ugt i32 %1, 6
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = getelementptr inbounds [7 x i32], [7 x i32]* %0, i64 0, i64 %5
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i32 1, i32 -1
br label %10
10: ; preds = %4, %2
%11 = phi i32 [ -1, %2 ], [ %9, %4 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ x;
typedef int /*<<< orphan*/ uint64_t;
struct jit_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ emit_bytes(struct jit_state *, int /*<<< orphan*/ *, int);
void emit8(struct jit_state *state, uint64_t x) {
  emit_bytes(state, &x, sizeof(x));
}


x86 assembly (clang, -O0):
<emit8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <emit_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit8>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <emit_bytes@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.jit_state = type { i32 }
define void @emit8(%struct.jit_state* %0, i32 %1) {
%3 = alloca %struct.jit_state*
%4 = alloca i32
store %struct.jit_state* %0, %struct.jit_state** %3
store i32 %1, i32* %4
%5 = load %struct.jit_state*, %struct.jit_state** %3
%6 = call i32 @emit_bytes(%struct.jit_state* %5, i32* %4, i32 4)
ret void
}

LLVM IR (-O2):
%struct.jit_state = type { i32 }
define void @emit8(%struct.jit_state* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @emit_bytes(%struct.jit_state* %0, i32* %3, i32 4)
ret void
}
/* Variables and functions */
int u(unsigned char const *, int, int, int *);
int read_u(const unsigned char *buffer, int *bits_offset, int *total_bits,
           int bits) {
  int val;
  val = u(buffer, *bits_offset, *total_bits, &bits);
  *bits_offset += bits;
  *total_bits -= bits;
  return val;
}


x86 assembly (clang, -O0):
<read_u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
lea    -0x1c(%rbp),%rcx
call   1030 <u@plt>
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%edx
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
sub    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_u>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %ecx,0x4(%rsp)
mov    (%rsi),%esi
mov    (%rdx),%edx
lea    0x4(%rsp),%rcx
call   1030 <u@plt>
mov    0x4(%rsp),%ecx
add    %ecx,(%rbx)
sub    %ecx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @read_u(i8* %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = load i32*, i32** %7
%14 = load i32, i32* %13
%15 = call i32 @u(i8* %10, i32 %12, i32 %14, i32* %8)
store i32 %15, i32* %9
%16 = load i32, i32* %8
%17 = load i32*, i32** %6
%18 = load i32, i32* %17
%19 = add nsw i32 %18, %16
store i32 %19, i32* %17
%20 = load i32, i32* %8
%21 = load i32*, i32** %7
%22 = load i32, i32* %21
%23 = sub nsw i32 %22, %20
store i32 %23, i32* %21
%24 = load i32, i32* %9
ret i32 %24
}

LLVM IR (-O2):
define i32 @read_u(i8* %0, i32* nocapture %1, i32* nocapture %2, i32 %3) {
%5 = alloca i32
store i32 %3, i32* %5
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @u(i8* %0, i32 %6, i32 %7, i32* %5)
%9 = load i32, i32* %5
%10 = load i32, i32* %1
%11 = add nsw i32 %10, %9
store i32 %11, i32* %1
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, %9
store i32 %13, i32* %2
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("You are my monkey mom, boy.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"You are my monkey mom, boy.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [28 x i8] c"You are my monkey mom, boy.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
scalar_t__ compare(char *, char *);
char *compare_equal() {
  do {
    if (!(compare("Hello", "Hello") == 0))
      return "Compare equal strings";
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<compare_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rsi
mov    %rsi,%rdi
call   1030 <compare@plt>
cmp    $0x0,%rax
je     1141 <compare_equal+0x31>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <compare_equal+0x3e>
jmp    1146 <compare_equal+0x36>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_equal>:
push   %rax
lea    0xee8(%rip),%rdi
mov    %rdi,%rsi
call   1030 <compare@plt>
test   %rax,%rax
lea    0xedc(%rip),%rcx
cmovne %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"Hello\00"
@.str.1 = [22 x i8] c"Compare equal strings\00"
define i8* @compare_equal() {
%1 = alloca i8*
br label %2
2: ; preds = %0
%3 = call i64 @compare(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %2
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i8** %1
br label %8
6: ; preds = %2
br label %7
7: ; preds = %6
store i8* null, i8** %1
br label %8
8: ; preds = %7, %5
%9 = load i8*, i8** %1
ret i8* %9
}

LLVM IR (-O2):
@.str = [6 x i8] c"Hello\00"
@.str.1 = [22 x i8] c"Compare equal strings\00"
define i8* @compare_equal() {
%1 = tail call i64 @compare(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* null, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void pq_display_version() { fprintf(stderr, "pqgen version %s\n", "0.3.4"); }


x86 assembly (clang, -O0):
<pq_display_version>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
lea    0xee7(%rip),%rdx
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pq_display_version>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
lea    0xeeb(%rip),%rdx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"pqgen version %s\0A\00"
@.str.1 = [6 x i8] c"0.3.4\00"
define void @pq_display_version() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"pqgen version %s\0A\00"
@.str.1 = [6 x i8] c"0.3.4\00"
define void @pq_display_version() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void pic_start_interrupts() { asm volatile("sti" ::); }


x86 assembly (clang, -O0):
<pic_start_interrupts>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_start_interrupts>:
sti
ret

LLVM IR (-O0):
define void @pic_start_interrupts() {
ret void
}

LLVM IR (-O2):
define void @pic_start_interrupts() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void setDR(char *x, int n, int val) {
  if (n < 0 || n > 8)
    return;
  x[0] = (x[0] & ~(1 << n)) | (val ? (1 << n) : 0);
}


x86 assembly (clang, -O0):
<setDR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1122 <setDR+0x22>
cmpl   $0x8,-0xc(%rbp)
jle    1127 <setDR+0x27>
jmp    1178 <setDR+0x78>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     115e <setDR+0x5e>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x18(%rbp)
jmp    1168 <setDR+0x68>
xor    %eax,%eax
mov    %eax,-0x18(%rbp)
jmp    1168 <setDR+0x68>
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDR>:
cmp    $0x8,%esi
ja     111d <setDR+0x1d>
mov    $0x1,%eax
mov    %esi,%ecx
shl    %cl,%eax
movzbl (%rdi),%ecx
btr    %esi,%ecx
test   %edx,%edx
cmove  %edx,%eax
or     %ecx,%eax
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @setDR(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 8
br i1 %11, label %12, label %13
12: ; preds = %9, %3
br label %34
13: ; preds = %9
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i64 0
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i32, i32* %5
%19 = shl i32 1, %18
%20 = xor i32 %19, -1
%21 = and i32 %17, %20
%22 = load i32, i32* %6
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %13
%25 = load i32, i32* %5
%26 = shl i32 1, %25
br label %28
27: ; preds = %13
br label %28
28: ; preds = %27, %24
%29 = phi i32 [ %26, %24 ], [ 0, %27 ]
%30 = or i32 %21, %29
%31 = trunc i32 %30 to i8
%32 = load i8*, i8** %4
%33 = getelementptr inbounds i8, i8* %32, i64 0
store i8 %31, i8* %33
br label %34
34: ; preds = %28, %12
ret void
}

LLVM IR (-O2):
define void @setDR(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp ugt i32 %1, 8
br i1 %4, label %15, label %5
5: ; preds = %3
%6 = load i8, i8* %0
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 1, %1
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = icmp eq i32 %2, 0
%12 = select i1 %11, i32 0, i32 %8
%13 = or i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %0
br label %15
15: ; preds = %3, %5
ret void
}
void putestInitWithFuncs(void (**_fun)(void), int index) {
  _fun[index - 48]();
  return;
}


x86 assembly (clang, -O0):
<putestInitWithFuncs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x30,%ecx
movslq %ecx,%rcx
call   *(%rax,%rcx,8)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putestInitWithFuncs>:
movslq %esi,%rax
jmp    *-0x180(%rdi,%rax,8)

LLVM IR (-O0):
define void @putestInitWithFuncs(void ()** %0, i32 %1) {
%3 = alloca void ()**
%4 = alloca i32
store void ()** %0, void ()*** %3
store i32 %1, i32* %4
%5 = load void ()**, void ()*** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 48
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds void ()*, void ()** %5, i64 %8
%10 = load void ()*, void ()** %9
ret void
}

LLVM IR (-O2):
define void @putestInitWithFuncs(void ()** nocapture %0, i32 %1) {
%3 = add nsw i32 %1, -48
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds void ()*, void ()** %0, i64 %4
%6 = load void ()*, void ()** %5
tail call void %6()
ret void
}
unsigned xrop3_220_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~D;
  stk2 = T & stk3;
  stk1 = S | stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_220_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_220_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_220_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = and i32 %31, %32
%34 = load i32, i32* %8
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = or i32 %33, %37
%39 = load i32, i32* %7
%40 = load i32, i32* %6
%41 = xor i32 %40, -1
%42 = and i32 %39, %41
%43 = load i32, i32* %5
%44 = and i32 %42, %43
%45 = or i32 %38, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_220_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = or i32 %4, %5
ret i32 %6
}
/* Variables and functions */
char *safe_raw_allocate(size_t, int);
char *safe_char_allocate(size_t number) {
  return safe_raw_allocate(number, sizeof(char));
}


x86 assembly (clang, -O0):
<safe_char_allocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <safe_raw_allocate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_char_allocate>:
mov    $0x1,%esi
jmp    1030 <safe_raw_allocate@plt>

LLVM IR (-O0):
define i8* @safe_char_allocate(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @safe_raw_allocate(i64 %3, i32 1)
ret i8* %4
}

LLVM IR (-O2):
define i8* @safe_char_allocate(i64 %0) {
%2 = tail call i8* @safe_raw_allocate(i64 %0, i32 1)
ret i8* %2
}
void acx_debugfs_remove_adev(struct acx_device *adev) {}


x86 assembly (clang, -O0):
<acx_debugfs_remove_adev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<acx_debugfs_remove_adev>:
ret

LLVM IR (-O0):
%struct.acx_device = type opaque
define void @acx_debugfs_remove_adev(%struct.acx_device* %0) {
%2 = alloca %struct.acx_device*
store %struct.acx_device* %0, %struct.acx_device** %2
ret void
}

LLVM IR (-O2):
%struct.acx_device = type opaque
define void @acx_debugfs_remove_adev(%struct.acx_device* nocapture %0) {
ret void
}
/* Variables and functions */
double exp(int);
double alpha_h(const double V) { return 0.07 * exp((25. - V) / 20.); }


x86 assembly (clang, -O0):
<alpha_h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeeb(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  0xeb6(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alpha_h>:
push   %rax
movsd  0xee7(%rip),%xmm1
subsd  %xmm0,%xmm1
divsd  0xee3(%rip),%xmm1
cvttsd2si %xmm1,%edi
call   1030 <exp@plt>
mulsd  0xeda(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @alpha_h(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double 2.500000e+01, %3
%5 = fdiv double %4, 2.000000e+01
%6 = fptosi double %5 to i32
%7 = call double @exp(i32 %6)
%8 = fmul double 7.000000e-02, %7
ret double %8
}

LLVM IR (-O2):
define double @alpha_h(double %0) {
%2 = fsub double 2.500000e+01, %0
%3 = fdiv double %2, 2.000000e+01
%4 = fptosi double %3 to i32
%5 = tail call double @exp(i32 %4)
%6 = fmul double %5, 7.000000e-02
ret double %6
}
/* Variables and functions */
size_t strlen(const char *str) {
  size_t len = 0;
  while (str[len++] != '\0')
    ;
  return len - 1;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1135 <strlen+0x35>
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = add i64 %6, 1
store i64 %7, i64* %3
%8 = getelementptr inbounds i8, i8* %5, i64 %6
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %4
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
%15 = sub i64 %14, 1
ret i64 %15
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %4, %2 ]
%4 = add i64 %3, 1
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %2
8: ; preds = %2
ret i64 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
unsigned int hweight32(uint32_t w) {
  uint32_t res = w - ((w >> 1) & 0x55555555);
  res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
  res = (res + (res >> 4)) & 0x0F0F0F0F;
  res = res + (res >> 8);
  return (res + (res >> 16)) & 0x000000FF;
}


x86 assembly (clang, -O0):
<hweight32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x55555555,%ecx
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x33333333,%eax
mov    -0x8(%rbp),%ecx
sar    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x8,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hweight32>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
add    %eax,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
add    %ecx,%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @hweight32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = and i32 %6, 1431655765
%8 = sub nsw i32 %4, %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = and i32 %9, 858993459
%11 = load i32, i32* %3
%12 = ashr i32 %11, 2
%13 = and i32 %12, 858993459
%14 = add nsw i32 %10, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = load i32, i32* %3
%17 = ashr i32 %16, 4
%18 = add nsw i32 %15, %17
%19 = and i32 %18, 252645135
store i32 %19, i32* %3
%20 = load i32, i32* %3
%21 = load i32, i32* %3
%22 = ashr i32 %21, 8
%23 = add nsw i32 %20, %22
store i32 %23, i32* %3
%24 = load i32, i32* %3
%25 = load i32, i32* %3
%26 = ashr i32 %25, 16
%27 = add nsw i32 %24, %26
%28 = and i32 %27, 255
ret i32 %28
}

LLVM IR (-O2):
define i32 @hweight32(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = sub nsw i32 %0, %3
%5 = and i32 %4, 858993459
%6 = lshr i32 %4, 2
%7 = and i32 %6, 858993459
%8 = add nuw nsw i32 %7, %5
%9 = lshr i32 %8, 4
%10 = add nuw nsw i32 %9, %8
%11 = and i32 %10, 252645135
%12 = lshr i32 %11, 8
%13 = add nuw nsw i32 %12, %11
%14 = lshr i32 %13, 16
%15 = add nuw nsw i32 %14, %13
%16 = and i32 %15, 63
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xfc() {
  Assert_real((isgraph(252) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              1265, ("isgraph should be 0 for 0xfc"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xfc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfc,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4f1,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xfc>:
push   %rax
mov    $0xfc,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4f1,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xfc\00"
define void @t_isgraph_0xfc() {
%1 = call i64 @isgraph(i32 252)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1265, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xfc\00"
define void @t_isgraph_0xfc() {
%1 = tail call i64 @isgraph(i32 252)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1265, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void SPI_SD_EnableTxInt(void) {}


x86 assembly (clang, -O0):
<SPI_SD_EnableTxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_SD_EnableTxInt>:
ret

LLVM IR (-O0):
define void @SPI_SD_EnableTxInt() {
ret void
}

LLVM IR (-O2):
define void @SPI_SD_EnableTxInt() {
ret void
}
/* Variables and functions */
void *getBAt(void *, int, void *);
void *getBB(void *obj, void *node) { return getBAt(obj, 1, node); }


x86 assembly (clang, -O0):
<getBB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x1,%esi
call   1030 <getBAt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBB>:
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <getBAt@plt>

LLVM IR (-O0):
define i8* @getBB(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @getBAt(i8* %5, i32 1, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @getBB(i8* %0, i8* %1) {
%3 = tail call i8* @getBAt(i8* %0, i32 1, i8* %1)
ret i8* %3
}
/* Variables and functions */
long long atoll(char *);
char *get_next_argp(char ***, char *);
long long get_next_argpll(char ***argv, char *arg) {
  char *tmp = get_next_argp(argv, arg);
  return atoll(tmp);
}


x86 assembly (clang, -O0):
<get_next_argpll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <get_next_argp@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <atoll@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_next_argpll>:
push   %rax
call   1030 <get_next_argp@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <atoll@plt>

LLVM IR (-O0):
define i64 @get_next_argpll(i8*** %0, i8* %1) {
%3 = alloca i8***
%4 = alloca i8*
%5 = alloca i8*
store i8*** %0, i8**** %3
store i8* %1, i8** %4
%6 = load i8***, i8**** %3
%7 = load i8*, i8** %4
%8 = call i8* @get_next_argp(i8*** %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i64 @atoll(i8* %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @get_next_argpll(i8*** %0, i8* %1) {
%3 = tail call i8* @get_next_argp(i8*** %0, i8* %1)
%4 = tail call i64 @atoll(i8* %3)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strlen(char *);
void todec(char ch[]) {
  int l;
  l = strlen(ch);
  printf("%d", l);
}


x86 assembly (clang, -O0):
<todec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<todec>:
push   %rax
call   1030 <strlen@plt>
lea    0xed3(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @todec(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @todec(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
const void *vect_each_cst(const struct vect *vec, const void *start_after,
                          enum callback_status (*cb)(const void *, void *),
                          void *data) {
  return vect_each((struct vect *)vec, (void *)start_after, (void *)cb, data);
}


x86 assembly (clang, -O0):
<vect_each_cst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x0,%al
call   1030 <vect_each@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vect_each_cst>:
push   %rax
xor    %eax,%eax
call   1030 <vect_each@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
%struct.vect = type opaque
define i8* @vect_each_cst(%struct.vect* %0, i8* %1, {}* %2, i8* %3) {
%5 = alloca %struct.vect*
%6 = alloca i8*
%7 = alloca {}*
%8 = alloca i8*
store %struct.vect* %0, %struct.vect** %5
store i8* %1, i8** %6
store {}* %2, {}** %7
store i8* %3, i8** %8
%9 = load %struct.vect*, %struct.vect** %5
%10 = load i8*, i8** %6
%11 = load {}*, {}** %7
%12 = bitcast {}* %11 to i8*
%13 = load i8*, i8** %8
%14 = call i32 (%struct.vect*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @vect_each to i32 (%struct.vect*, i8*, i8*, i8*, ...)*)(%struct.vect* %9, i8* %10, i8* %12, i8* %13)
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i8*
ret i8* %16
}

LLVM IR (-O2):
%struct.vect = type opaque
define i8* @vect_each_cst(%struct.vect* %0, i8* %1, {}* %2, i8* %3) {
%5 = bitcast {}* %2 to i8*
%6 = tail call i32 (%struct.vect*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @vect_each to i32 (%struct.vect*, i8*, i8*, i8*, ...)*)(%struct.vect* %0, i8* %1, i8* %5, i8* %3)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}
int main(int argc, char **argv) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
jmp    1112 <main+0x12>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %2, %6
br label %6
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int romanToInt(char *);
int main() {
  char *input = "DCXXI";
  printf("%d", romanToInt(input));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <romanToInt@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <romanToInt@plt>
lea    0xed2(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"DCXXI\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @romanToInt(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"DCXXI\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @romanToInt(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void write_triad(uint8_t *ptr, uint32_t value) {
  ptr[0] = value;
  ptr[1] = value >> 8;
  ptr[2] = value >> 16;
}


x86 assembly (clang, -O0):
<write_triad>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_triad>:
mov    %esi,(%rdi)
mov    %esi,%eax
sar    $0x8,%eax
mov    %eax,0x4(%rdi)
sar    $0x10,%esi
mov    %esi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @write_triad(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load i32, i32* %4
%9 = ashr i32 %8, 8
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 1
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = ashr i32 %12, 16
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 2
store i32 %13, i32* %15
ret void
}

LLVM IR (-O2):
define void @write_triad(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
%3 = ashr i32 %1, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %3, i32* %4
%5 = ashr i32 %1, 16
%6 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %5, i32* %6
ret void
}
void btp_location_eat_char_ext(int *line, int *column, char c) {
  if (c == '\n') {
    *line += 1;
    *column = 0;
  } else
    *column += 1;
}


x86 assembly (clang, -O0):
<btp_location_eat_char_ext>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0xa,%eax
jne    1138 <btp_location_eat_char_ext+0x38>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
jmp    1143 <btp_location_eat_char_ext+0x43>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<btp_location_eat_char_ext>:
cmp    $0xa,%dl
jne    110d <btp_location_eat_char_ext+0xd>
addl   $0x1,(%rdi)
xor    %eax,%eax
mov    %eax,(%rsi)
ret
mov    (%rsi),%eax
add    $0x1,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @btp_location_eat_char_ext(i32* %0, i32* %1, i8 signext %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8
store i32* %0, i32** %4
store i32* %1, i32** %5
store i8 %2, i8* %6
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 10
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %11
%14 = load i32*, i32** %5
store i32 0, i32* %14
br label %19
15: ; preds = %3
%16 = load i32*, i32** %5
%17 = load i32, i32* %16
%18 = add nsw i32 %17, 1
store i32 %18, i32* %16
br label %19
19: ; preds = %15, %10
ret void
}

LLVM IR (-O2):
define void @btp_location_eat_char_ext(i32* nocapture %0, i32* nocapture %1, i8 signext %2) {
%4 = icmp eq i8 %2, 10
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = load i32, i32* %0
%7 = add nsw i32 %6, 1
store i32 %7, i32* %0
br label %11
8: ; preds = %3
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
br label %11
11: ; preds = %8, %5
%12 = phi i32 [ %10, %8 ], [ 0, %5 ]
store i32 %12, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, double *);
void readArray(double arr[], int size) {
  int i;
  for (i = 0; i < size; i++)
    scanf("%lf", &arr[i]);
}


x86 assembly (clang, -O0):
<readArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115b <readArray+0x4b>
mov    -0x8(%rbp),%rsi
movslq -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rsi
lea    0xeb8(%rip),%rdi
call   1030 <scanf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <readArray+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readArray>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1145 <readArray+0x35>
mov    %rdi,%rbx
mov    %esi,%r15d
lea    0xeda(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <scanf@plt>
add    $0x8,%rbx
add    $0xffffffffffffffff,%r15
jne    1130 <readArray+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
define void @readArray(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load double*, double** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double, double* %11, i64 %13
%15 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %14)
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
define void @readArray(double* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds double, double* %0, i64 %7
%9 = tail call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %8)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}