xunge/DecIR huggingface dataset:
/* Variables and functions */
int Kit_CubeSetLit(unsigned int, int);
unsigned Kit_CubeMark(unsigned uCube) { return Kit_CubeSetLit(uCube, 31); }


x86 assembly (clang, -O0):
<Kit_CubeMark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1f,%esi
call   1030 <Kit_CubeSetLit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kit_CubeMark>:
mov    $0x1f,%esi
jmp    1030 <Kit_CubeSetLit@plt>

LLVM IR (-O0):
define i32 @Kit_CubeMark(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @Kit_CubeSetLit(i32 %3, i32 31)
ret i32 %4
}

LLVM IR (-O2):
define i32 @Kit_CubeMark(i32 %0) {
%2 = tail call i32 @Kit_CubeSetLit(i32 %0, i32 31)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int testanymethod();
int main() { printf("%d", testanymethod()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <testanymethod@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <testanymethod@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = call i32 (...) @testanymethod()
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 (...) @testanymethod()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 3, b = 4, c = 5;
  int max;
  max = a > b ? a : b;
  max = max > c ? max : c;
  printf("max is %d\n", max);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
movl   $0x5,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    114b <main+0x3b>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    1151 <main+0x41>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    116e <main+0x5e>
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    1174 <main+0x64>
mov    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xe7c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"max is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
store i32 4, i32* %3
store i32 5, i32* %4
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = load i32, i32* %2
br label %13
11: ; preds = %0
%12 = load i32, i32* %3
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = icmp sgt i32 %15, %16
br i1 %17, label %18, label %20
18: ; preds = %13
%19 = load i32, i32* %5
br label %22
20: ; preds = %13
%21 = load i32, i32* %4
br label %22
22: ; preds = %20, %18
%23 = phi i32 [ %19, %18 ], [ %21, %20 ]
store i32 %23, i32* %5
%24 = load i32, i32* %5
%25 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %24)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"max is %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 5)
ret i32 0
}
int colour_to_red(int colour) {
  int return_val = 0;
  switch (colour) {
  case 0:
  case 3:
  case 4:
  case 5:
    return_val = 255;
    break;
  }
  return return_val;
}


x86 assembly (clang, -O0):
<colour_to_red>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     1135 <colour_to_red+0x35>
jmp    1121 <colour_to_red+0x21>
mov    -0xc(%rbp),%eax
add    $0xfffffffd,%eax
sub    $0x2,%eax
ja     113c <colour_to_red+0x3c>
jmp    1135 <colour_to_red+0x35>
movl   $0xff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<colour_to_red>:
xor    %eax,%eax
cmp    $0x5,%edi
ja     1114 <colour_to_red+0x14>
movslq %edi,%rax
lea    0xeef(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @colour_to_red(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 0, label %5
i32 3, label %5
i32 4, label %5
i32 5, label %5
]
5: ; preds = %1, %1, %1, %1
store i32 255, i32* %3
br label %6
6: ; preds = %1, %5
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@switch.table.colour_to_red = [6 x i32] [i32 255, i32 0, i32 0, i32 255, i32 255, i32 255]
define i32 @colour_to_red(i32 %0) {
%2 = icmp ult i32 %0, 6
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.colour_to_red, i64 0, i64 %4
%6 = load i32, i32* %5
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
scalar_t__ mu_badv_if_available(char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int main(void) {
  if (mu_badv_if_available("not_default", NULL)) {
    printf("TRUE");
  } else {
    printf("FALSE");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <mu_badv_if_available@plt>
cmp    $0x0,%rax
je     115a <main+0x3a>
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
jmp    1166 <main+0x46>
lea    0xeb0(%rip),%rdi
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %esi,%esi
call   1030 <mu_badv_if_available@plt>
test   %rax,%rax
lea    0xed8(%rip),%rax
lea    0xecc(%rip),%rdi
cmove  %rax,%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"not_default\00"
@.str.1 = [5 x i8] c"TRUE\00"
@.str.2 = [6 x i8] c"FALSE\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @mu_badv_if_available(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* null)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [12 x i8] c"not_default\00"
@.str.1 = [5 x i8] c"TRUE\00"
@.str.2 = [6 x i8] c"FALSE\00"
define i32 @main() {
%1 = tail call i64 @mu_badv_if_available(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* null)
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ volatile *mem_get_reg32(int);
volatile uint32_t *afio_get_EXTICR4() {
  return mem_get_reg32(0x40010000 + 0x14);
}


x86 assembly (clang, -O0):
<afio_get_EXTICR4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40010014,%edi
call   1030 <mem_get_reg32@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<afio_get_EXTICR4>:
mov    $0x40010014,%edi
jmp    1030 <mem_get_reg32@plt>

LLVM IR (-O0):
define i32* @afio_get_EXTICR4() {
%1 = call i32* @mem_get_reg32(i32 1073807380)
ret i32* %1
}

LLVM IR (-O2):
define i32* @afio_get_EXTICR4() {
%1 = tail call i32* @mem_get_reg32(i32 1073807380)
ret i32* %1
}
int SignOfDouble(double value) {
  int result;
  if (value == 0.0)
    result = 0;
  else if (value < 0.0)
    result = -1;
  else if (value > 0.0)
    result = 1;
  return result;
}


x86 assembly (clang, -O0):
<SignOfDouble>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    112d <SignOfDouble+0x2d>
jp     112d <SignOfDouble+0x2d>
movl   $0x0,-0xc(%rbp)
jmp    116a <SignOfDouble+0x6a>
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1147 <SignOfDouble+0x47>
movl   $0xffffffff,-0xc(%rbp)
jmp    1165 <SignOfDouble+0x65>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1160 <SignOfDouble+0x60>
movl   $0x1,-0xc(%rbp)
jmp    1165 <SignOfDouble+0x65>
jmp    116a <SignOfDouble+0x6a>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SignOfDouble>:
xor    %eax,%eax
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    110f <SignOfDouble+0xf>
jp     110f <SignOfDouble+0xf>
ret
mov    $0xffffffff,%eax
ucomisd %xmm0,%xmm1
ja     110e <SignOfDouble+0xe>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SignOfDouble(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = fcmp oeq double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %3
br label %17
7: ; preds = %1
%8 = load double, double* %2
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %3
br label %16
11: ; preds = %7
%12 = load double, double* %2
%13 = fcmp ogt double %12, 0.000000e+00
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %3
br label %15
15: ; preds = %14, %11
br label %16
16: ; preds = %15, %10
br label %17
17: ; preds = %16, %6
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @SignOfDouble(double %0) {
%2 = fcmp oeq double %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = fcmp olt double %0, 0.000000e+00
br i1 %4, label %6, label %5
5: ; preds = %3
br label %6
6: ; preds = %5, %3, %1
%7 = phi i32 [ 0, %1 ], [ -1, %3 ], [ 1, %5 ]
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void fileWrite16(int val, FILE *fp) {
  fputc((val >> 0) & 0xFF, fp);
  fputc((val >> 8) & 0xFF, fp);
}


x86 assembly (clang, -O0):
<fileWrite16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x0,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileWrite16>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
movzbl %bl,%edi
call   1030 <fputc@plt>
movzbl %bh,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @fileWrite16(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 0
%7 = and i32 %6, 255
%8 = load i32*, i32** %4
%9 = call i32 @fputc(i32 %7, i32* %8)
%10 = load i32, i32* %3
%11 = ashr i32 %10, 8
%12 = and i32 %11, 255
%13 = load i32*, i32** %4
%14 = call i32 @fputc(i32 %12, i32* %13)
ret void
}

LLVM IR (-O2):
define void @fileWrite16(i32 %0, i32* nocapture %1) {
%3 = and i32 %0, 255
%4 = tail call i32 @fputc(i32 %3, i32* %1)
%5 = lshr i32 %0, 8
%6 = and i32 %5, 255
%7 = tail call i32 @fputc(i32 %6, i32* %1)
ret void
}
int f2(int x) {
  int y;
  int z = x + y;
  return z;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %5, %6
store i32 %7, i32* %4
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
ret i32 undef
}
unsigned int _uiMagReset(void) { return (1); }


x86 assembly (clang, -O0):
<_uiMagReset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uiMagReset>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_uiMagReset() {
ret i32 1
}

LLVM IR (-O2):
define i32 @_uiMagReset() {
ret i32 1
}
int test_imm_3Auint16_mem(unsigned short *val) {
  return ((*val) & (-0x3A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Auint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffffc6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Auint16_mem>:
movzwl (%rdi),%eax
test   $0xffc6,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Auint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -58
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Auint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -58
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int uninitialize_common() { return 0; }


x86 assembly (clang, -O0):
<uninitialize_common>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitialize_common>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @uninitialize_common() {
ret i32 0
}

LLVM IR (-O2):
define i32 @uninitialize_common() {
ret i32 0
}
int test_imm_5Cint16_mem(short *val) {
  return ((*val) & (-0x5C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Cint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffffa4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Cint16_mem>:
movzwl (%rdi),%eax
test   $0xffa4,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Cint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -92
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Cint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -92
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int is_same_clock(struct clk *a, struct clk *b) { return (a == b); }


x86 assembly (clang, -O0):
<is_same_clock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_same_clock>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.clk = type opaque
define i32 @is_same_clock(%struct.clk* %0, %struct.clk* %1) {
%3 = alloca %struct.clk*
%4 = alloca %struct.clk*
store %struct.clk* %0, %struct.clk** %3
store %struct.clk* %1, %struct.clk** %4
%5 = load %struct.clk*, %struct.clk** %3
%6 = load %struct.clk*, %struct.clk** %4
%7 = icmp eq %struct.clk* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.clk = type opaque
define i32 @is_same_clock(%struct.clk* readnone %0, %struct.clk* readnone %1) {
%3 = icmp eq %struct.clk* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void screen_load_driver(void) {}


x86 assembly (clang, -O0):
<screen_load_driver>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<screen_load_driver>:
ret

LLVM IR (-O0):
define void @screen_load_driver() {
ret void
}

LLVM IR (-O2):
define void @screen_load_driver() {
ret void
}
/* Variables and functions */
scalar_t__ isupper(int);
int tolower(int c) {
  if (isupper(c))
    return c | 32;
  return c;
}


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     113b <tolower+0x2b>
mov    -0x8(%rbp),%eax
or     $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <tolower+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
mov    %ebx,%ecx
or     $0x20,%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @isupper(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = or i32 %8, 32
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = or i32 %0, 32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
int test_imm_A6uint8_reg(unsigned char val) {
  return ((val) & (0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xa6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6uint8_reg>:
test   $0xa6,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 166
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A6uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -90
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ fork();
int /*<<< orphan*/ unix_error(char *);
pid_t Fork(void) {
  pid_t pid;
  if ((pid = fork()) < 0)
    unix_error("Fork error");
  return pid;
}


x86 assembly (clang, -O0):
<Fork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <fork@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    1147 <Fork+0x27>
lea    0xebe(%rip),%rdi
call   1030 <unix_error@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fork>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    113a <Fork+0x1a>
lea    0xecb(%rip),%rdi
call   1030 <unix_error@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Fork error\00"
define i32 @Fork() {
%1 = alloca i32
%2 = call i32 (...) @fork()
store i32 %2, i32* %1
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @unix_error(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
@.str = [11 x i8] c"Fork error\00"
define i32 @Fork() {
%1 = tail call i32 (...) @fork()
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @unix_error(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 %1
}
void test_one(int x) {
#pragma omp target
#pragma omp teams distribute simd
  for (int i = 0; i < x; i++)
    ;
}


x86 assembly (clang, -O0):
<test_one>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    112d <test_one+0x2d>
jmp    111f <test_one+0x1f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <test_one+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_one>:
ret

LLVM IR (-O0):
define void @test_one(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @test_one(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pic_send_eoi(int);
unsigned char port_byte_in(int);
int /*<<< orphan*/ port_byte_out(int, int);
void handle_irq7(void) {
  port_byte_out(0x20, 0x0B);
  unsigned char irr = port_byte_in(0x20);
  if (irr & 0x80) {
    pic_send_eoi(0x07);
  }
}


x86 assembly (clang, -O0):
<handle_irq7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x20,%edi
mov    $0xb,%esi
call   1030 <port_byte_out@plt>
mov    $0x20,%edi
call   1040 <port_byte_in@plt>
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1170 <handle_irq7+0x40>
mov    $0x7,%edi
call   1050 <pic_send_eoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_irq7>:
push   %rax
mov    $0x20,%edi
mov    $0xb,%esi
call   1030 <port_byte_out@plt>
mov    $0x20,%edi
call   1040 <port_byte_in@plt>
test   %al,%al
js     1150 <handle_irq7+0x20>
pop    %rax
ret
mov    $0x7,%edi
pop    %rax
jmp    1050 <pic_send_eoi@plt>

LLVM IR (-O0):
define void @handle_irq7() {
%1 = alloca i8
%2 = call i32 @port_byte_out(i32 32, i32 11)
%3 = call zeroext i8 @port_byte_in(i32 32)
store i8 %3, i8* %1
%4 = load i8, i8* %1
%5 = zext i8 %4 to i32
%6 = and i32 %5, 128
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @pic_send_eoi(i32 7)
br label %10
10: ; preds = %8, %0
ret void
}

LLVM IR (-O2):
define void @handle_irq7() {
%1 = tail call i32 @port_byte_out(i32 32, i32 11)
%2 = tail call zeroext i8 @port_byte_in(i32 32)
%3 = icmp sgt i8 %2, -1
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @pic_send_eoi(i32 7)
br label %6
6: ; preds = %4, %0
ret void
}
void reverseBits(unsigned value) {}


x86 assembly (clang, -O0):
<reverseBits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverseBits>:
ret

LLVM IR (-O0):
define void @reverseBits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @reverseBits(i32 %0) {
ret void
}
const char *LZ4_versionString(void) { return "1.9.3"; }


x86 assembly (clang, -O0):
<LZ4_versionString>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_versionString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1.9.3\00"
define i8* @LZ4_versionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.9.3\00"
define i8* @LZ4_versionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t si470x_tunedown() {}


x86 assembly (clang, -O0):
<si470x_tunedown>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<si470x_tunedown>:
ret

LLVM IR (-O0):
define i32 @si470x_tunedown() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @si470x_tunedown() {
ret i32 undef
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t safe_div_func_uint64_t_u_u(uint64_t _ui1, uint64_t _ui2) {
  if (_ui2 == 0)
    return _ui1;
  return _ui1 / _ui2;
}


x86 assembly (clang, -O0):
<safe_div_func_uint64_t_u_u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    111f <safe_div_func_uint64_t_u_u+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1129 <safe_div_func_uint64_t_u_u+0x29>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_div_func_uint64_t_u_u>:
mov    %edi,%eax
test   %esi,%esi
je     1109 <safe_div_func_uint64_t_u_u+0x9>
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @safe_div_func_uint64_t_u_u(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = sdiv i32 %11, %12
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @safe_div_func_uint64_t_u_u(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = sdiv i32 %0, %1
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ %0, %2 ]
ret i32 %7
}
/* Variables and functions */
int hamdist_str(char *, char *, int);
unsigned int hamming_distance_test() {
  return 37 == hamdist_str("this is a test\0", "wokka wokka!!!\0", 16);
}


x86 assembly (clang, -O0):
<hamming_distance_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeee(%rip),%rsi
mov    $0x10,%edx
call   1030 <hamdist_str@plt>
mov    %eax,%ecx
mov    $0x25,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hamming_distance_test>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef1(%rip),%rsi
mov    $0x10,%edx
call   1030 <hamdist_str@plt>
xor    %ecx,%ecx
cmp    $0x25,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"this is a test\00\00"
@.str.1 = [16 x i8] c"wokka wokka!!!\00\00"
define i32 @hamming_distance_test() {
%1 = call i32 @hamdist_str(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 16)
%2 = icmp eq i32 37, %1
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
@.str = [16 x i8] c"this is a test\00\00"
@.str.1 = [16 x i8] c"wokka wokka!!!\00\00"
define i32 @hamming_distance_test() {
%1 = tail call i32 @hamdist_str(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 16)
%2 = icmp eq i32 %1, 37
%3 = zext i1 %2 to i32
ret i32 %3
}
const char *skin_keyset_get_default_text(void) {
  return "BUTTON_CALL         F3\n"
         "BUTTON_HANGUP       F4\n"
         "BUTTON_HOME         Home\n"
         "BUTTON_HOMEPAGE     HomePage\n"
         "BUTTON_BACK         Escape\n"
         "BUTTON_MENU         F2, PageUp\n"
         "BUTTON_STAR         Shift-F2, PageDown\n"
         "BUTTON_POWER        F7\n"
         "BUTTON_SEARCH       F5\n"
         "BUTTON_CAMERA       Ctrl-Keypad_5, Ctrl-F3\n"
         "BUTTON_VOLUME_UP    Keypad_Plus, Ctrl-F5\n"
         "BUTTON_VOLUME_DOWN  Keypad_Minus, Ctrl-F6\n"
         "TOGGLE_NETWORK      F8\n"
         "TOGGLE_TRACING      F9\n"
         "TOGGLE_FULLSCREEN   Alt-Enter\n"
         "BUTTON_DPAD_CENTER  Keypad_5\n"
         "BUTTON_DPAD_UP      Keypad_8\n"
         "BUTTON_DPAD_LEFT    Keypad_4\n"
         "BUTTON_DPAD_RIGHT   Keypad_6\n"
         "BUTTON_DPAD_DOWN    Keypad_2\n"
         "TOGGLE_TRACKBALL    F6\n"
         "SHOW_TRACKBALL      Delete\n"
         "CHANGE_LAYOUT_PREV  Keypad_7, Ctrl-F11\n"
         "CHANGE_LAYOUT_NEXT  Keypad_9, Ctrl-F12\n"
         "ONION_ALPHA_UP      Keypad_Multiply\n"
         "ONION_ALPHA_DOWN    Keypad_Divide\n";
}


x86 assembly (clang, -O0):
<skin_keyset_get_default_text>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skin_keyset_get_default_text>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [789 x i8] c"BUTTON_CALL F3\0ABUTTON_HANGUP F4\0ABUTTON_HOME Home\0ABUTTON_HOMEPAGE HomePage\0ABUTTON_BACK Escape\0ABUTTON_MENU F2, PageUp\0ABUTTON_STAR Shift-F2, PageDown\0ABUTTON_POWER F7\0ABUTTON_SEARCH F5\0ABUTTON_CAMERA Ctrl-Keypad_5, Ctrl-F3\0ABUTTON_VOLUME_UP Keypad_Plus, Ctrl-F5\0ABUTTON_VOLUME_DOWN Keypad_Minus, Ctrl-F6\0ATOGGLE_NETWORK F8\0ATOGGLE_TRACING F9\0ATOGGLE_FULLSCREEN Alt-Enter\0ABUTTON_DPAD_CENTER Keypad_5\0ABUTTON_DPAD_UP Keypad_8\0ABUTTON_DPAD_LEFT Keypad_4\0ABUTTON_DPAD_RIGHT Keypad_6\0ABUTTON_DPAD_DOWN Keypad_2\0ATOGGLE_TRACKBALL F6\0ASHOW_TRACKBALL Delete\0ACHANGE_LAYOUT_PREV Keypad_7, Ctrl-F11\0ACHANGE_LAYOUT_NEXT Keypad_9, Ctrl-F12\0AONION_ALPHA_UP Keypad_Multiply\0AONION_ALPHA_DOWN Keypad_Divide\0A\00"
define i8* @skin_keyset_get_default_text() {
ret i8* getelementptr inbounds ([789 x i8], [789 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [789 x i8] c"BUTTON_CALL F3\0ABUTTON_HANGUP F4\0ABUTTON_HOME Home\0ABUTTON_HOMEPAGE HomePage\0ABUTTON_BACK Escape\0ABUTTON_MENU F2, PageUp\0ABUTTON_STAR Shift-F2, PageDown\0ABUTTON_POWER F7\0ABUTTON_SEARCH F5\0ABUTTON_CAMERA Ctrl-Keypad_5, Ctrl-F3\0ABUTTON_VOLUME_UP Keypad_Plus, Ctrl-F5\0ABUTTON_VOLUME_DOWN Keypad_Minus, Ctrl-F6\0ATOGGLE_NETWORK F8\0ATOGGLE_TRACING F9\0ATOGGLE_FULLSCREEN Alt-Enter\0ABUTTON_DPAD_CENTER Keypad_5\0ABUTTON_DPAD_UP Keypad_8\0ABUTTON_DPAD_LEFT Keypad_4\0ABUTTON_DPAD_RIGHT Keypad_6\0ABUTTON_DPAD_DOWN Keypad_2\0ATOGGLE_TRACKBALL F6\0ASHOW_TRACKBALL Delete\0ACHANGE_LAYOUT_PREV Keypad_7, Ctrl-F11\0ACHANGE_LAYOUT_NEXT Keypad_9, Ctrl-F12\0AONION_ALPHA_UP Keypad_Multiply\0AONION_ALPHA_DOWN Keypad_Divide\0A\00"
define i8* @skin_keyset_get_default_text() {
ret i8* getelementptr inbounds ([789 x i8], [789 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ assert(double *);
scalar_t__ malloc(int);
double *new_Double(const double value) {
  double *p = (double *)malloc(sizeof(double));
  assert(p);
  *p = value;
  return p;
}


x86 assembly (clang, -O0):
<new_Double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <assert@plt>
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_Double>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <assert@plt>
movsd  0x8(%rsp),%xmm0
movsd  %xmm0,(%rbx)
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double* @new_Double(double %0) {
%2 = alloca double
%3 = alloca double*
store double %0, double* %2
%4 = call i64 @malloc(i32 8)
%5 = inttoptr i64 %4 to double*
store double* %5, double** %3
%6 = load double*, double** %3
%7 = call i32 @assert(double* %6)
%8 = load double, double* %2
%9 = load double*, double** %3
store double %8, double* %9
%10 = load double*, double** %3
ret double* %10
}

LLVM IR (-O2):
define double* @new_Double(double %0) {
%2 = tail call i64 @malloc(i32 8)
%3 = inttoptr i64 %2 to double*
%4 = tail call i32 @assert(double* %3)
store double %0, double* %3
ret double* %3
}
float sqrt_f(float x) {
  unsigned int i = *(unsigned int *)&x;
  i += 127 << 23;
  i >>= 1;
  return (*(float *)&i);
}


x86 assembly (clang, -O0):
<sqrt_f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x3f800000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrt_f>:
movd   %xmm0,%eax
add    $0x3f800000,%eax
shr    %eax
movd   %eax,%xmm0
ret

LLVM IR (-O0):
define float @sqrt_f(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = bitcast float* %2 to i32*
%5 = load i32, i32* %4
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = add i32 %6, 1065353216
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = lshr i32 %8, 1
store i32 %9, i32* %3
%10 = bitcast i32* %3 to float*
%11 = load float, float* %10
ret float %11
}

LLVM IR (-O2):
define float @sqrt_f(float %0) {
%2 = bitcast float %0 to i32
%3 = add i32 %2, 1065353216
%4 = lshr i32 %3, 1
%5 = bitcast i32 %4 to float
ret float %5
}
/* Variables and functions */
int daemon(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ pause();
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("\n before foo gets demonized \n");
  if (daemon(0, 0) != -1)
    perror("\n daemon failed");
  pause();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %esi,%esi
mov    %esi,%edi
call   1050 <daemon@plt>
cmp    $0xffffffff,%eax
je     1190 <main+0x40>
lea    0xe93(%rip),%rdi
call   1060 <perror@plt>
mov    $0x0,%al
call   1040 <pause@plt>
xor    %edi,%edi
call   1070 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
xor    %esi,%esi
call   1050 <daemon@plt>
cmp    $0xffffffff,%eax
je     1177 <main+0x27>
lea    0xe8e(%rip),%rdi
call   1060 <perror@plt>
xor    %eax,%eax
call   1040 <pause@plt>
xor    %edi,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"\0A before foo gets demonized \0A\00"
@.str.1 = [16 x i8] c"\0A daemon failed\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @daemon(i32 0, i32 0)
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = call i32 (...) @pause()
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str.1 = [16 x i8] c"\0A daemon failed\00"
@str = [29 x i8] c"\0A before foo gets demonized \00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @daemon(i32 0, i32 0)
%5 = icmp eq i32 %4, -1
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
%9 = tail call i32 (...) @pause()
%10 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
unsigned long long paths_aux(int /*<<< orphan*/, int /*<<< orphan*/, size_t,
                             size_t);
unsigned long long paths_rec(size_t x, size_t y) {
  return paths_aux(0, 0, x, y);
}


x86 assembly (clang, -O0):
<paths_rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
xor    %esi,%esi
mov    %esi,%edi
call   1030 <paths_aux@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<paths_rec>:
mov    %rsi,%rcx
mov    %rdi,%rdx
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <paths_aux@plt>

LLVM IR (-O0):
define i64 @paths_rec(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @paths_aux(i32 0, i32 0, i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @paths_rec(i64 %0, i64 %1) {
%3 = tail call i64 @paths_aux(i32 0, i32 0, i64 %0, i64 %1)
ret i64 %3
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t lookback_index(uint64_t val, uint32_t j) {
  if (j < 5)
    return 0;
  return (val >> 32) % ((j - 1) / 4) + (j - 1) * 3 / 4;
}


x86 assembly (clang, -O0):
<lookback_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    1120 <lookback_index+0x20>
movl   $0x0,-0x4(%rbp)
jmp    115f <lookback_index+0x5f>
mov    -0x8(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
imul   $0x3,%eax,%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%edx
add    %eax,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookback_index>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lookback_index(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %21
9: ; preds = %2
%10 = load i32, i32* %4
%11 = ashr i32 %10, 32
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = sdiv i32 %13, 4
%15 = srem i32 %11, %14
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 1
%18 = mul nsw i32 %17, 3
%19 = sdiv i32 %18, 4
%20 = add nsw i32 %15, %19
store i32 %20, i32* %3
br label %21
21: ; preds = %9, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @lookback_index(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sio_read_reg(int, unsigned long *);
int /*<<< orphan*/ sio_write_reg(int, unsigned long);
void vgatv_tvout_mode(unsigned long tvout_mode) {
  unsigned long cr;
  sio_read_reg(0x0C, &cr);
  switch (tvout_mode) {
  case 1:
    cr &= ~0x0400;
    break;
  case 2:
    cr |= 0x0400;
    break;
  }
  sio_write_reg(0x0C, cr);
}


x86 assembly (clang, -O0):
<vgatv_tvout_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xc,%edi
lea    -0x10(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
sub    $0x1,%rax
je     1164 <vgatv_tvout_mode+0x44>
jmp    1151 <vgatv_tvout_mode+0x31>
mov    -0x18(%rbp),%rax
sub    $0x2,%rax
je     1177 <vgatv_tvout_mode+0x57>
jmp    1185 <vgatv_tvout_mode+0x65>
mov    -0x10(%rbp),%rax
and    $0xfffffffffffffbff,%rax
mov    %rax,-0x10(%rbp)
jmp    1185 <vgatv_tvout_mode+0x65>
mov    -0x10(%rbp),%rax
or     $0x400,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vgatv_tvout_mode>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rsi
mov    $0xc,%edi
call   1040 <sio_read_reg@plt>
cmp    $0x1,%rbx
je     114f <vgatv_tvout_mode+0x2f>
cmp    $0x2,%rbx
jne    1162 <vgatv_tvout_mode+0x42>
mov    $0x400,%esi
or     0x8(%rsp),%rsi
jmp    115b <vgatv_tvout_mode+0x3b>
mov    $0xfffffffffffffbff,%rsi
and    0x8(%rsp),%rsi
mov    %rsi,0x8(%rsp)
jmp    1167 <vgatv_tvout_mode+0x47>
mov    0x8(%rsp),%rsi
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @vgatv_tvout_mode(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = call i32 @sio_read_reg(i32 12, i64* %3)
%5 = load i64, i64* %2
switch i64 %5, label %12 [
i64 1, label %6
i64 2, label %9
]
6: ; preds = %1
%7 = load i64, i64* %3
%8 = and i64 %7, -1025
store i64 %8, i64* %3
br label %12
9: ; preds = %1
%10 = load i64, i64* %3
%11 = or i64 %10, 1024
store i64 %11, i64* %3
br label %12
12: ; preds = %1, %9, %6
%13 = load i64, i64* %3
%14 = call i32 @sio_write_reg(i32 12, i64 %13)
ret void
}

LLVM IR (-O2):
define void @vgatv_tvout_mode(i64 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @sio_read_reg(i32 12, i64* %2)
switch i64 %0, label %5 [
i64 1, label %7
i64 2, label %10
]
5: ; preds = %1
%6 = load i64, i64* %2
br label %13
7: ; preds = %1
%8 = load i64, i64* %2
%9 = and i64 %8, -1025
store i64 %9, i64* %2
br label %13
10: ; preds = %1
%11 = load i64, i64* %2
%12 = or i64 %11, 1024
store i64 %12, i64* %2
br label %13
13: ; preds = %5, %10, %7
%14 = phi i64 [ %6, %5 ], [ %12, %10 ], [ %9, %7 ]
%15 = call i32 @sio_write_reg(i32 12, i64 %14)
ret void
}
void INT_Excep_SCI4_RXI4(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SCI4_RXI4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SCI4_RXI4>:
ret

LLVM IR (-O0):
define void @INT_Excep_SCI4_RXI4() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SCI4_RXI4() {
ret void
}
long __ccaprice_syscall_args_4(long A0, long A1, long A2, long A3, long A4) {
  unsigned long R;
  register long R10 __asm__("r10") = A4;
  __asm__ __volatile__("syscall"
                       : "=a"(R)
                       : "a"(A0), "D"(A1), "S"(A2), "d"(A3), "r"(R10)
                       : "rcx", "r11", "memory");
  return R;
}


x86 assembly (clang, -O0):
<__ccaprice_syscall_args_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x38(%rbp),%r10
syscall
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ccaprice_syscall_args_4>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%r10
syscall
ret

LLVM IR (-O0):
define i64 @__ccaprice_syscall_args_4(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%13 = load i64, i64* %10
store i64 %13, i64* %12
%14 = load i64, i64* %6
%15 = load i64, i64* %7
%16 = load i64, i64* %8
%17 = load i64, i64* %9
%18 = load i64, i64* %12
%19 = call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},{r10},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %14, i64 %15, i64 %16, i64 %17, i64 %18)
store i64 %19, i64* %11
%20 = load i64, i64* %11
ret i64 %20
}

LLVM IR (-O2):
define i64 @__ccaprice_syscall_args_4(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = tail call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},{r10},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4)
ret i64 %6
}
void frame_init(unsigned char *f) { f[0] = '\0'; }


x86 assembly (clang, -O0):
<frame_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<frame_init>:
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @frame_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
store i8 0, i8* %4
ret void
}

LLVM IR (-O2):
define void @frame_init(i8* nocapture writeonly %0) {
store i8 0, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bif_register_arity3(char const *,
                                       float (*)(float, float, float));
void nanocalc_register_bif_arity3(const char *name,
                                  float (*fun)(float, float, float)) {
  bif_register_arity3(name, fun);
}


x86 assembly (clang, -O0):
<nanocalc_register_bif_arity3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <bif_register_arity3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanocalc_register_bif_arity3>:
jmp    1030 <bif_register_arity3@plt>

LLVM IR (-O0):
define void @nanocalc_register_bif_arity3(i8* %0, float (float, float, float)* %1) {
%3 = alloca i8*
%4 = alloca float (float, float, float)*
store i8* %0, i8** %3
store float (float, float, float)* %1, float (float, float, float)** %4
%5 = load i8*, i8** %3
%6 = load float (float, float, float)*, float (float, float, float)** %4
%7 = call i32 @bif_register_arity3(i8* %5, float (float, float, float)* %6)
ret void
}

LLVM IR (-O2):
define void @nanocalc_register_bif_arity3(i8* %0, float (float, float, float)* %1) {
%3 = tail call i32 @bif_register_arity3(i8* %0, float (float, float, float)* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
void read_int(int *i) { scanf("%d", i); }


x86 assembly (clang, -O0):
<read_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <scanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_int>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <scanf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @read_int(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @read_int(i32* %0) {
%2 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %0)
ret void
}
/* Variables and functions */
scalar_t__ eat(unsigned char *, unsigned char, unsigned char);
int /*<<< orphan*/ fail();
void add(unsigned char snake[8], unsigned char x, unsigned char y) {
  if (eat(snake, x, y))
    fail();
  else
    snake[y] |= 1 << x;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%al
movzbl %al,%esi
movzbl -0xa(%rbp),%edx
call   1030 <eat@plt>
cmp    $0x0,%rax
je     1160 <add+0x40>
mov    $0x0,%al
call   1040 <fail@plt>
jmp    117c <add+0x5c>
movzbl -0x9(%rbp),%ecx
mov    $0x1,%esi
shl    %cl,%esi
mov    -0x8(%rbp),%rax
movzbl -0xa(%rbp),%ecx
movzbl (%rax,%rcx,1),%edx
or     %esi,%edx
mov    %dl,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebp
mov    %esi,%ebx
mov    %rdi,%r14
call   1030 <eat@plt>
test   %rax,%rax
je     1140 <add+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <fail@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
movzbl %bpl,%ecx
or     %al,(%r14,%rcx,1)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @add(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8*, i8** %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
%10 = call i64 @eat(i8* %7, i8 zeroext %8, i8 zeroext %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = call i32 (...) @fail()
br label %26
14: ; preds = %3
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = shl i32 1, %16
%18 = load i8*, i8** %4
%19 = load i8, i8* %6
%20 = zext i8 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = or i32 %23, %17
%25 = trunc i32 %24 to i8
store i8 %25, i8* %21
br label %26
26: ; preds = %14, %12
ret void
}

LLVM IR (-O2):
define void @add(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = tail call i64 @eat(i8* %0, i8 zeroext %1, i8 zeroext %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 (...) @fail()
br label %16
8: ; preds = %3
%9 = zext i8 %1 to i32
%10 = shl nuw i32 1, %9
%11 = zext i8 %2 to i64
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = trunc i32 %10 to i8
%15 = or i8 %13, %14
store i8 %15, i8* %12
br label %16
16: ; preds = %8, %6
ret void
}