#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned long CANIntNumberGet(unsigned long);
int /*<<< orphan*/ DEBUG_ASSERT(int);
int /*<<< orphan*/ IntDisable(unsigned long);
int /*<<< orphan*/ IntEnable(unsigned long);
unsigned long CANRegRead(unsigned long ulRegAddress) {
  volatile unsigned long ulDelay;
  unsigned long ulRetVal;
  unsigned long ulIntNumber;
  unsigned long ulReenableInts;
  ulIntNumber = CANIntNumberGet(ulRegAddress & 0xfffff000);
  DEBUG_ASSERT(ulIntNumber != (unsigned long)-1);
  ulReenableInts =
      (*((volatile unsigned long *)(0xE000E104))) & (1 << (ulIntNumber - 48));
  if (ulReenableInts) {
    IntDisable(ulIntNumber);
  }
  (*((volatile unsigned long *)(ulRegAddress)));
  for (ulDelay = 0; ulDelay < 5; ulDelay++) {
  }
  ulRetVal = (*((volatile unsigned long *)(ulRegAddress)));
  if (ulReenableInts) {
    IntEnable(ulIntNumber);
  }
  return (ulRetVal);
}


x86 assembly (clang, -O0):
<CANRegRead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movabs $0xfffff000,%rdi
and    -0x8(%rbp),%rdi
call   1060 <CANIntNumberGet@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    $0xe000e104,%eax
mov    (%rax),%rax
mov    -0x20(%rbp),%rcx
sub    $0x30,%rcx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     11ac <CANRegRead+0x6c>
mov    -0x20(%rbp),%rdi
call   1040 <IntDisable@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    $0x5,%rax
jae    11df <CANRegRead+0x9f>
jmp    11ce <CANRegRead+0x8e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    11bb <CANRegRead+0x7b>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     11fe <CANRegRead+0xbe>
mov    -0x20(%rbp),%rdi
call   1030 <IntEnable@plt>
mov    -0x18(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANRegRead>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%r14
and    $0xfffff000,%edi
call   1060 <CANIntNumberGet@plt>
mov    %rax,%r15
xor    %edi,%edi
cmp    $0xffffffffffffffff,%rax
setne  %dil
call   1050 <DEBUG_ASSERT@plt>
mov    %r15d,%ecx
add    $0xd0,%cl
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rbx
mov    $0xe000e104,%eax
and    (%rax),%rbx
je     118b <CANRegRead+0x4b>
mov    %r15,%rdi
call   1040 <IntDisable@plt>
mov    (%r14),%rax
movq   $0x0,0x8(%rsp)
mov    0x8(%rsp),%rax
cmp    $0x4,%rax
ja     11c1 <CANRegRead+0x81>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
addq   $0x1,0x8(%rsp)
mov    0x8(%rsp),%rax
cmp    $0x5,%rax
jb     11b0 <CANRegRead+0x70>
mov    (%r14),%r14
test   %rbx,%rbx
je     11d1 <CANRegRead+0x91>
mov    %r15,%rdi
call   1030 <IntEnable@plt>
mov    %r14,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @CANRegRead(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %2
%7 = load i64, i64* %2
%8 = and i64 %7, 4294963200
%9 = call i64 @CANIntNumberGet(i64 %8)
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = icmp ne i64 %10, -1
%12 = zext i1 %11 to i32
%13 = call i32 @DEBUG_ASSERT(i32 %12)
%14 = load volatile i64, i64* inttoptr (i64 3758153988 to i64*)
%15 = load i64, i64* %5
%16 = sub i64 %15, 48
%17 = trunc i64 %16 to i32
%18 = shl i32 1, %17
%19 = sext i32 %18 to i64
%20 = and i64 %14, %19
store i64 %20, i64* %6
%21 = load i64, i64* %6
%22 = icmp ne i64 %21, 0
br i1 %22, label %23, label %26
23: ; preds = %1
%24 = load i64, i64* %5
%25 = call i32 @IntDisable(i64 %24)
br label %26
26: ; preds = %23, %1
%27 = load i64, i64* %2
%28 = inttoptr i64 %27 to i64*
%29 = load volatile i64, i64* %28
store volatile i64 0, i64* %3
br label %30
30: ; preds = %34, %26
%31 = load volatile i64, i64* %3
%32 = icmp ult i64 %31, 5
br i1 %32, label %33, label %37
33: ; preds = %30
br label %34
34: ; preds = %33
%35 = load volatile i64, i64* %3
%36 = add i64 %35, 1
store volatile i64 %36, i64* %3
br label %30
37: ; preds = %30
%38 = load i64, i64* %2
%39 = inttoptr i64 %38 to i64*
%40 = load volatile i64, i64* %39
store i64 %40, i64* %4
%41 = load i64, i64* %6
%42 = icmp ne i64 %41, 0
br i1 %42, label %43, label %46
43: ; preds = %37
%44 = load i64, i64* %5
%45 = call i32 @IntEnable(i64 %44)
br label %46
46: ; preds = %43, %37
%47 = load i64, i64* %4
ret i64 %47
}

LLVM IR (-O2):
define i64 @CANRegRead(i64 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = and i64 %0, 4294963200
%5 = tail call i64 @CANIntNumberGet(i64 %4)
%6 = icmp ne i64 %5, -1
%7 = zext i1 %6 to i32
%8 = tail call i32 @DEBUG_ASSERT(i32 %7)
%9 = load volatile i64, i64* inttoptr (i64 3758153988 to i64*)
%10 = trunc i64 %5 to i32
%11 = add i32 %10, -48
%12 = shl nuw i32 1, %11
%13 = sext i32 %12 to i64
%14 = and i64 %9, %13
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %1
%17 = tail call i32 @IntDisable(i64 %5)
br label %18
18: ; preds = %16, %1
%19 = inttoptr i64 %0 to i64*
%20 = load volatile i64, i64* %19
store volatile i64 0, i64* %2
%21 = load volatile i64, i64* %2
%22 = icmp ult i64 %21, 5
br i1 %22, label %23, label %28
23: ; preds = %18, %23
%24 = load volatile i64, i64* %2
%25 = add i64 %24, 1
store volatile i64 %25, i64* %2
%26 = load volatile i64, i64* %2
%27 = icmp ult i64 %26, 5
br i1 %27, label %23, label %28
28: ; preds = %23, %18
%29 = load volatile i64, i64* %19
br i1 %15, label %32, label %30
30: ; preds = %28
%31 = tail call i32 @IntEnable(i64 %5)
br label %32
32: ; preds = %30, %28
ret i64 %29
}