xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main() {
  puts("hello");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xc3() {
  Assert_real((isspace(195) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              980, ("isspace should be 0 for 0xc3"));
}


x86 assembly (clang, -O0):
<t_isspace_0xc3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc3,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3d4,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xc3>:
push   %rax
mov    $0xc3,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3d4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xc3\00"
define void @t_isspace_0xc3() {
%1 = call i64 @isspace(i32 195)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 980, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xc3\00"
define void @t_isspace_0xc3() {
%1 = tail call i64 @isspace(i32 195)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 980, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int16_t _usage(char **argv, int16_t err) {
  printf("\nUsage:\n\t%s [# of pairs] [length of A] [length of B]\n\n"
         "Defaults:\n"
         "\t# of Pairs:\t10\n"
         "\tlength of A:\t10\n"
         "\tlength of B:\t10 (same as A if it is provided)\n\n",
         *argv);
}


x86 assembly (clang, -O0):
<_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_usage>:
mov    (%rdi),%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [146 x i8] c"\0AUsage:\0A\09%s [# of pairs] [length of A] [length of B]\0A\0ADefaults:\0A\09# of Pairs:\0910\0A\09length of A:\0910\0A\09length of B:\0910 (same as A if it is provided)\0A\0A\00"
define i32 @_usage(i8** %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i8** %0, i8*** %4
store i32 %1, i32* %5
%6 = load i8**, i8*** %4
%7 = load i8*, i8** %6
%8 = call i32 @printf(i8* getelementptr inbounds ([146 x i8], [146 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@.str = [146 x i8] c"\0AUsage:\0A\09%s [# of pairs] [length of A] [length of B]\0A\0ADefaults:\0A\09# of Pairs:\0910\0A\09length of A:\0910\0A\09length of B:\0910 (same as A if it is provided)\0A\0A\00"
define i32 @_usage(i8** nocapture %0, i32 %1) {
%3 = load i8*, i8** %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([146 x i8], [146 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 undef
}
/* Variables and functions */
scalar_t__ ceil(int);
int log(int);
int compute_field_width(long nr_sinks) {
  return (int)ceil(log(nr_sinks) / log(10));
}


x86 assembly (clang, -O0):
<compute_field_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1040 <log@plt>
mov    %eax,-0xc(%rbp)
mov    $0xa,%edi
call   1040 <log@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_field_width>:
push   %rbx
call   1040 <log@plt>
mov    %eax,%ebx
mov    $0xa,%edi
call   1040 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    %eax,%edi
pop    %rbx
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define i32 @compute_field_width(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @log(i32 %4)
%6 = call i32 @log(i32 10)
%7 = sdiv i32 %5, %6
%8 = call i64 @ceil(i32 %7)
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @compute_field_width(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @log(i32 %2)
%4 = tail call i32 @log(i32 10)
%5 = sdiv i32 %3, %4
%6 = tail call i64 @ceil(i32 %5)
%7 = trunc i64 %6 to i32
ret i32 %7
}
void native_io_delay() { asm volatile("outb %al, $0x80"); }


x86 assembly (clang, -O0):
<native_io_delay>:
push   %rbp
mov    %rsp,%rbp
out    %al,$0x80
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_io_delay>:
out    %al,$0x80
ret

LLVM IR (-O0):
define void @native_io_delay() {
ret void
}

LLVM IR (-O2):
define void @native_io_delay() {
tail call void asm sideeffect "outb %al, $$0x80", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
void *malloc(int);
__attribute__((no)) void *allocate_mem() { return malloc(1); }


x86 assembly (clang, -O0):
<allocate_mem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <malloc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocate_mem>:
mov    $0x1,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @allocate_mem() {
%1 = call i8* @malloc(i32 1)
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @allocate_mem() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
ret i8* %1
}
int main(void) { return 77; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x4d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x4d,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 77
}

LLVM IR (-O2):
define i32 @main() {
ret i32 77
}
int test3(int b) {
  int x = b ?: 1;
  return x;
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
je     1121 <test3+0x21>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    112e <test3+0x2e>
mov    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112e <test3+0x2e>
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
test   %edi,%edi
mov    $0x1,%eax
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @test3(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %6
%9 = phi i32 [ %4, %6 ], [ 1, %7 ]
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @test3(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 1, i32 %0
ret i32 %3
}
void ff_hevc_put_hevc_epel_v6_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_v6_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_v6_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_v6_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_v6_8_sse4() {
ret void
}
void carmen_base_direct_arm_get(double servos[] __attribute__((unused)),
                                int num_servos __attribute__((unused)),
                                double *currents __attribute__((unused)),
                                int *gripper __attribute__((unused))) {
  printf("%s not supported by pioneer.\n", __FUNCTION__);
}


x86 assembly (clang, -O0):
<carmen_base_direct_arm_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xed2(%rip),%rdi
lea    0xee9(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<carmen_base_direct_arm_get>:
lea    0xee9(%rip),%rdi
lea    0xf00(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"%s not supported by pioneer.\0A\00"
@__FUNCTION__.carmen_base_direct_arm_get = [27 x i8] c"carmen_base_direct_arm_get\00"
define void @carmen_base_direct_arm_get(double* %0, i32 %1, double* %2, i32* %3) {
%5 = alloca double*
%6 = alloca i32
%7 = alloca double*
%8 = alloca i32*
store double* %0, double** %5
store i32 %1, i32* %6
store double* %2, double** %7
store i32* %3, i32** %8
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @__FUNCTION__.carmen_base_direct_arm_get, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"%s not supported by pioneer.\0A\00"
@__FUNCTION__.carmen_base_direct_arm_get = [27 x i8] c"carmen_base_direct_arm_get\00"
define void @carmen_base_direct_arm_get(double* nocapture readnone %0, i32 %1, double* nocapture readnone %2, i32* nocapture readnone %3) {
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @__FUNCTION__.carmen_base_direct_arm_get, i64 0, i64 0))
ret void
}
int get_num_characters(char *line) {
  int i;
  for (i = 0; *(line + i) != '\0'; i++) {
  }
  return i;
}


x86 assembly (clang, -O0):
<get_num_characters>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1137 <get_num_characters+0x37>
jmp    1129 <get_num_characters+0x29>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <get_num_characters+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_num_characters>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <get_num_characters+0x10>
ret

LLVM IR (-O0):
define i32 @get_num_characters(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %4
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @get_num_characters(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
unsigned long int timeNowMSec() {
  struct timespec timeNow;
  clock_gettime(CLOCK_REALTIME, &timeNow);
  return (timeNow.tv_sec * 1000 + timeNow.tv_nsec / (1000000));
}


x86 assembly (clang, -O0):
<timeNowMSec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeNowMSec>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
movslq (%rsp),%rax
imul   $0x3e8,%rax,%rcx
movslq 0x4(%rsp),%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@CLOCK_REALTIME = global i32 0
define i64 @timeNowMSec() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_REALTIME
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000000
%10 = add nsw i32 %6, %9
%11 = sext i32 %10 to i64
ret i64 %11
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
@CLOCK_REALTIME = global i32 0
define i64 @timeNowMSec() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_REALTIME
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = mul nsw i32 %6, 1000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000000
%11 = add nsw i32 %10, %7
%12 = sext i32 %11 to i64
ret i64 %12
}
int f_blg_mm1(float *a1, float *a2) {
  return (__builtin_islessgreater(*a1, *a2));
}


x86 assembly (clang, -O0):
<f_blg_mm1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
ucomiss (%rax),%xmm0
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_blg_mm1>:
movss  (%rdi),%xmm0
xor    %eax,%eax
ucomiss (%rsi),%xmm0
setne  %al
ret

LLVM IR (-O0):
define i32 @f_blg_mm1(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = fcmp one float %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f_blg_mm1(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = fcmp one float %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_U16_CR_2U16_swap(char *, int);
void U_WMREXTFLOODFILL_swap(char *record, int torev) {
  U_WMRCORE_U16_CR_2U16_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMREXTFLOODFILL_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRCORE_U16_CR_2U16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMREXTFLOODFILL_swap>:
jmp    1030 <U_WMRCORE_U16_CR_2U16_swap@plt>

LLVM IR (-O0):
define void @U_WMREXTFLOODFILL_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_U16_CR_2U16_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMREXTFLOODFILL_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_U16_CR_2U16_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
void *gfx_imagecreate(int, int, unsigned int, int, int, int);
void *fb_GfxImageCreate(int width, int height, unsigned int color, int depth,
                        int flags) {
  return gfx_imagecreate(width, height, color, depth, flags, 1);
}


x86 assembly (clang, -O0):
<fb_GfxImageCreate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    $0x1,%r9d
call   1030 <gfx_imagecreate@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_GfxImageCreate>:
mov    $0x1,%r9d
jmp    1030 <gfx_imagecreate@plt>

LLVM IR (-O0):
define i8* @fb_GfxImageCreate(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i8* @gfx_imagecreate(i32 %11, i32 %12, i32 %13, i32 %14, i32 %15, i32 1)
ret i8* %16
}

LLVM IR (-O2):
define i8* @fb_GfxImageCreate(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i8* @gfx_imagecreate(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 1)
ret i8* %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void eeprom_update_byte(uint8_t *__p, uint8_t __value) {}


x86 assembly (clang, -O0):
<eeprom_update_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_update_byte>:
ret

LLVM IR (-O0):
define void @eeprom_update_byte(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @eeprom_update_byte(i32* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "Usage:\n"
                  "jcgimage -o outfile -u uImage [-v version]\n"
                  "jcgimage -o outfile -k kernel -f rootfs [-v version]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [104 x i8] c"Usage:\0Ajcgimage -o outfile -u uImage [-v version]\0Ajcgimage -o outfile -k kernel -f rootfs [-v version]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([104 x i8], [104 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [104 x i8] c"Usage:\0Ajcgimage -o outfile -u uImage [-v version]\0Ajcgimage -o outfile -k kernel -f rootfs [-v version]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([104 x i8], [104 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Sample_Close();
int /*<<< orphan*/ TapeImage_Remove();
void Tape_Remove() {
  TapeImage_Remove();
  Sample_Close();
}


x86 assembly (clang, -O0):
<Tape_Remove>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TapeImage_Remove@plt>
mov    $0x0,%al
call   1040 <Sample_Close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tape_Remove>:
push   %rax
xor    %eax,%eax
call   1030 <TapeImage_Remove@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <Sample_Close@plt>

LLVM IR (-O0):
define void @Tape_Remove() {
%1 = call i32 (...) @TapeImage_Remove()
%2 = call i32 (...) @Sample_Close()
ret void
}

LLVM IR (-O2):
define void @Tape_Remove() {
%1 = tail call i32 (...) @TapeImage_Remove()
%2 = tail call i32 (...) @Sample_Close()
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
bool timeout(uint16_t *value) {
  if (*value) {
    *value = *value - 1;
    if (!*value) {
      return true;
    }
  }
  return false;
}


x86 assembly (clang, -O0):
<timeout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     1147 <timeout+0x47>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
sub    $0x1,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1142 <timeout+0x42>
movl   $0x1,-0x4(%rbp)
jmp    114e <timeout+0x4e>
jmp    1147 <timeout+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeout>:
mov    (%rdi),%rax
test   %rax,%rax
je     1111 <timeout+0x11>
add    $0xffffffffffffffff,%rax
mov    %rax,(%rdi)
je     1114 <timeout+0x14>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @timeout(i64* %0) {
%2 = alloca i32
%3 = alloca i64*
store i64* %0, i64** %3
%4 = load i64*, i64** %3
%5 = load i64, i64* %4
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i64*, i64** %3
%9 = load i64, i64* %8
%10 = sub nsw i64 %9, 1
%11 = load i64*, i64** %3
store i64 %10, i64* %11
%12 = load i64*, i64** %3
%13 = load i64, i64* %12
%14 = icmp ne i64 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %7
store i32 1, i32* %2
br label %18
16: ; preds = %7
br label %17
17: ; preds = %16, %1
store i32 0, i32* %2
br label %18
18: ; preds = %17, %15
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @timeout(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = add nsw i64 %2, -1
store i64 %5, i64* %0
%6 = icmp eq i64 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %4, %1
br label %8
8: ; preds = %4, %7
%9 = phi i32 [ 0, %7 ], [ 1, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void zraise(char *msg) { printf("Error: %s\n", msg); }


x86 assembly (clang, -O0):
<zraise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zraise>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Error: %s\0A\00"
define void @zraise(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Error: %s\0A\00"
define void @zraise(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int exp(double);
double doubleExp(double a) { return exp(a) * 2; }


x86 assembly (clang, -O0):
<doubleExp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubleExp>:
push   %rax
call   1030 <exp@plt>
add    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @doubleExp(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @exp(double %3)
%5 = mul nsw i32 %4, 2
%6 = sitofp i32 %5 to double
ret double %6
}

LLVM IR (-O2):
define double @doubleExp(double %0) {
%2 = tail call i32 @exp(double %0)
%3 = shl nsw i32 %2, 1
%4 = sitofp i32 %3 to double
ret double %4
}
char *miniggsn_rcv_npdu(struct osmo_fd *bfd, int *error, int *plen) {
  return 0;
}


x86 assembly (clang, -O0):
<miniggsn_rcv_npdu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<miniggsn_rcv_npdu>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.osmo_fd = type opaque
define i8* @miniggsn_rcv_npdu(%struct.osmo_fd* %0, i32* %1, i32* %2) {
%4 = alloca %struct.osmo_fd*
%5 = alloca i32*
%6 = alloca i32*
store %struct.osmo_fd* %0, %struct.osmo_fd** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
ret i8* null
}

LLVM IR (-O2):
%struct.osmo_fd = type opaque
define noalias i8* @miniggsn_rcv_npdu(%struct.osmo_fd* nocapture readnone %0, i32* nocapture readnone %1, i32* nocapture readnone %2) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ stub_tx_one_char(char);
void SLIP_send_frame_delimiter(void) { stub_tx_one_char('\xc0'); }


x86 assembly (clang, -O0):
<SLIP_send_frame_delimiter>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffc0,%edi
call   1030 <stub_tx_one_char@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SLIP_send_frame_delimiter>:
mov    $0xffffffc0,%edi
jmp    1030 <stub_tx_one_char@plt>

LLVM IR (-O0):
define void @SLIP_send_frame_delimiter() {
%1 = call i32 @stub_tx_one_char(i8 signext -64)
ret void
}

LLVM IR (-O2):
define void @SLIP_send_frame_delimiter() {
%1 = tail call i32 @stub_tx_one_char(i8 signext -64)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int /*<<< orphan*/, int /*<<< orphan*/ *);
unsigned long push_pad(unsigned long offset, FILE *output) {
  while (offset & 3) {
    fputc(0, output);
    offset++;
  }
  return offset;
}


x86 assembly (clang, -O0):
<push_pad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0x3,%rax
cmp    $0x0,%rax
je     114e <push_pad+0x3e>
mov    -0x10(%rbp),%rsi
xor    %edi,%edi
call   1030 <fputc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1120 <push_pad+0x10>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<push_pad>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
test   $0x3,%bl
je     1133 <push_pad+0x23>
mov    %rsi,%r14
nop
xor    %edi,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
add    $0x1,%rbx
test   $0x3,%bl
jne    1120 <push_pad+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @push_pad(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
br label %5
5: ; preds = %9, %2
%6 = load i64, i64* %3
%7 = and i64 %6, 3
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32*, i32** %4
%11 = call i32 @fputc(i32 0, i32* %10)
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %5
14: ; preds = %5
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @push_pad(i64 %0, i32* nocapture %1) {
%3 = and i64 %0, 3
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %8, %5 ], [ %0, %2 ]
%7 = tail call i32 @fputc(i32 0, i32* %1)
%8 = add i64 %6, 1
%9 = and i64 %8, 3
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %5
11: ; preds = %5, %2
%12 = phi i64 [ %0, %2 ], [ %8, %5 ]
ret i64 %12
}
/* Variables and functions */
scalar_t__ fac(int);
int main(void) {
  int i;
  int s = 0;
  volatile int n;
  n = 5;
  for (i = 0; i <= n; i++)
    s += fac(i);
  return (s);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x5,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%ecx
cmp    %ecx,%eax
jg     1165 <main+0x55>
mov    -0x8(%rbp),%edi
call   1030 <fac@plt>
mov    %rax,%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1134 <main+0x24>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
movl   $0x5,0x4(%rsp)
cmpl   $0x0,0x4(%rsp)
js     1144 <main+0x34>
xor    %ebx,%ebx
mov    $0xffffffff,%ebp
nopl   0x0(%rax)
add    $0x1,%ebp
mov    %ebp,%edi
call   1030 <fac@plt>
add    %eax,%ebx
cmp    0x4(%rsp),%ebp
jl     1130 <main+0x20>
jmp    1146 <main+0x36>
xor    %ebx,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store volatile i32 5, i32* %4
store i32 0, i32* %2
br label %5
5: ; preds = %16, %0
%6 = load i32, i32* %2
%7 = load volatile i32, i32* %4
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %2
%11 = call i64 @fac(i32 %10)
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = add nsw i64 %13, %11
%15 = trunc i64 %14 to i32
store i32 %15, i32* %3
br label %16
16: ; preds = %9
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 5, i32* %1
%3 = load volatile i32, i32* %1
%4 = icmp slt i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %0, %5
%6 = phi i32 [ %10, %5 ], [ 0, %0 ]
%7 = phi i32 [ %11, %5 ], [ 0, %0 ]
%8 = tail call i64 @fac(i32 %7)
%9 = trunc i64 %8 to i32
%10 = add i32 %6, %9
%11 = add nuw nsw i32 %7, 1
%12 = load volatile i32, i32* %1
%13 = icmp slt i32 %7, %12
br i1 %13, label %5, label %14
14: ; preds = %5, %0
%15 = phi i32 [ 0, %0 ], [ %10, %5 ]
ret i32 %15
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t max32(int32_t x, int32_t y) { return (x >= y) ? x : y; }


x86 assembly (clang, -O0):
<max32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jl     1127 <max32+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <max32+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max32>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovl  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @max32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sge i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @max32(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
void XBlackPixelOfScreen() {}


x86 assembly (clang, -O0):
<XBlackPixelOfScreen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XBlackPixelOfScreen>:
ret

LLVM IR (-O0):
define void @XBlackPixelOfScreen() {
ret void
}

LLVM IR (-O2):
define void @XBlackPixelOfScreen() {
ret void
}
void spi_write_reg(unsigned int regnum, unsigned long val) {
  volatile unsigned long *base = (volatile unsigned long *)0x80004000;
  base[regnum] = val;
}


x86 assembly (clang, -O0):
<spi_write_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x80004000,%eax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
mov    -0x4(%rbp),%ecx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_write_reg>:
mov    %edi,%eax
mov    $0x80004000,%ecx
mov    %rsi,(%rcx,%rax,8)
ret

LLVM IR (-O0):
define void @spi_write_reg(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64*
store i32 %0, i32* %3
store i64 %1, i64* %4
store i64* inttoptr (i64 2147500032 to i64*), i64** %5
%6 = load i64, i64* %4
%7 = load i64*, i64** %5
%8 = load i32, i32* %3
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i64, i64* %7, i64 %9
store volatile i64 %6, i64* %10
ret void
}

LLVM IR (-O2):
define void @spi_write_reg(i32 %0, i64 %1) {
%3 = zext i32 %0 to i64
%4 = getelementptr inbounds i64, i64* inttoptr (i64 2147500032 to i64*), i64 %3
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
int _utf8_shiftpos(unsigned int, unsigned int);
char _utf8_continuation_byte(unsigned long codepoint, unsigned w, unsigned n) {
  return 0x80 | (char)(codepoint >> _utf8_shiftpos(w, n) & 0x3f);
}


x86 assembly (clang, -O0):
<_utf8_continuation_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <_utf8_shiftpos@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,%ecx
shr    %cl,%rax
and    $0x3f,%rax
movsbl %al,%eax
or     $0x80,%eax
movsbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_utf8_continuation_byte>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
mov    %edx,%esi
call   1030 <_utf8_shiftpos@plt>
mov    %eax,%ecx
shr    %cl,%rbx
and    $0x3f,%bl
or     $0x80,%bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @_utf8_continuation_byte(i64 %0, i32 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i64, i64* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @_utf8_shiftpos(i32 %8, i32 %9)
%11 = zext i32 %10 to i64
%12 = lshr i64 %7, %11
%13 = and i64 %12, 63
%14 = trunc i64 %13 to i8
%15 = sext i8 %14 to i32
%16 = or i32 128, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @_utf8_continuation_byte(i64 %0, i32 %1, i32 %2) {
%4 = tail call i32 @_utf8_shiftpos(i32 %1, i32 %2)
%5 = zext i32 %4 to i64
%6 = lshr i64 %0, %5
%7 = trunc i64 %6 to i8
%8 = and i8 %7, 63
%9 = or i8 %8, -128
ret i8 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int gettag();
int /*<<< orphan*/ lua_pushusertag(int /*<<< orphan*/ *, int);
int /*<<< orphan*/ pushresult(int /*<<< orphan*/);
int /*<<< orphan*/ setfile(int /*<<< orphan*/ *, char *, int);
void setreturn(FILE *f, char *name) {
  if (f == NULL)
    pushresult(0);
  else {
    int tag = gettag();
    setfile(f, name, tag);
    lua_pushusertag(f, tag);
  }
}


x86 assembly (clang, -O0):
<setreturn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1167 <setreturn+0x27>
xor    %edi,%edi
call   1030 <pushresult@plt>
jmp    118d <setreturn+0x4d>
mov    $0x0,%al
call   1060 <gettag@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <setfile@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <lua_pushusertag@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setreturn>:
test   %rdi,%rdi
je     1173 <setreturn+0x33>
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1060 <gettag@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1050 <setfile@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <lua_pushusertag@plt>
xor    %edi,%edi
jmp    1030 <pushresult@plt>

LLVM IR (-O0):
define void @setreturn(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i32*, i32** %3
%7 = icmp eq i32* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @pushresult(i32 0)
br label %19
10: ; preds = %2
%11 = call i32 (...) @gettag()
store i32 %11, i32* %5
%12 = load i32*, i32** %3
%13 = load i8*, i8** %4
%14 = load i32, i32* %5
%15 = call i32 @setfile(i32* %12, i8* %13, i32 %14)
%16 = load i32*, i32** %3
%17 = load i32, i32* %5
%18 = call i32 @lua_pushusertag(i32* %16, i32 %17)
br label %19
19: ; preds = %10, %8
ret void
}

LLVM IR (-O2):
define void @setreturn(i32* %0, i8* %1) {
%3 = icmp eq i32* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @pushresult(i32 0)
br label %10
6: ; preds = %2
%7 = tail call i32 (...) @gettag()
%8 = tail call i32 @setfile(i32* %0, i8* %1, i32 %7)
%9 = tail call i32 @lua_pushusertag(i32* %0, i32 %7)
br label %10
10: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ acosf(float);
long double cosl(int /*<<< orphan*/);
long double cosacosf(float x) { return (cosl(acosf(x))); }


x86 assembly (clang, -O0):
<cosacosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <acosf@plt>
mov    %eax,%edi
call   1030 <cosl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cosacosf>:
push   %rax
call   1040 <acosf@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <cosl@plt>

LLVM IR (-O0):
define x86_fp80 @cosacosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @acosf(float %3)
%5 = call x86_fp80 @cosl(i32 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @cosacosf(float %0) {
%2 = tail call i32 @acosf(float %0)
%3 = tail call x86_fp80 @cosl(i32 %2)
ret x86_fp80 %3
}
/* Variables and functions */
int are_equal(int *, int *, int);
int /*<<< orphan*/ calculate(int *, int *, int);
int test_positive() {
  int input[] = {4, 7, 3, 1, 5};
  int expected[] = {105, 60, 140, 420, 84};
  int output[5];
  calculate(input, output, 5);
  return are_equal(output, expected, 5);
}


x86 assembly (clang, -O0):
<test_positive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecc(%rip),%eax
mov    %eax,-0x10(%rbp)
mov    0xed2(%rip),%rax
mov    %rax,-0x40(%rbp)
mov    0xecf(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    0xecd(%rip),%eax
mov    %eax,-0x30(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x60(%rbp),%rsi
mov    $0x5,%edx
call   1030 <calculate@plt>
lea    -0x60(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    $0x5,%edx
call   1040 <are_equal@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_positive>:
push   %rbx
sub    $0x60,%rsp
mov    0xee5(%rip),%eax
mov    %eax,0x30(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
mov    0xeef(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xed4(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rdi
lea    0x40(%rsp),%rbx
mov    %rbx,%rsi
mov    $0x5,%edx
call   1030 <calculate@plt>
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0x5,%edx
call   1040 <are_equal@plt>
add    $0x60,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.test_positive.input = [5 x i32] [i32 4, i32 7, i32 3, i32 1, i32 5]
@__const.test_positive.expected = [5 x i32] [i32 105, i32 60, i32 140, i32 420, i32 84]
define i32 @test_positive() {
%1 = alloca [5 x i32]
%2 = alloca [5 x i32]
%3 = alloca [5 x i32]
%4 = bitcast [5 x i32]* %1 to i8*
%5 = bitcast [5 x i32]* %2 to i8*
%6 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%8 = call i32 @calculate(i32* %6, i32* %7, i32 5)
%9 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%11 = call i32 @are_equal(i32* %9, i32* %10, i32 5)
ret i32 %11
}

LLVM IR (-O2):
@__const.test_positive.input = [5 x i32] [i32 4, i32 7, i32 3, i32 1, i32 5]
@__const.test_positive.expected = [5 x i32] [i32 105, i32 60, i32 140, i32 420, i32 84]
define i32 @test_positive() {
%1 = alloca [5 x i32]
%2 = alloca [5 x i32]
%3 = alloca [5 x i32]
%4 = bitcast [5 x i32]* %1 to i8*
%5 = bitcast [5 x i32]* %2 to i8*
%6 = bitcast [5 x i32]* %3 to i8*
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%9 = call i32 @calculate(i32* %7, i32* %8, i32 5)
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%11 = call i32 @are_equal(i32* %8, i32* %10, i32 5)
ret i32 %11
}
void INT_Excep_ICU_GROUP1(void) {}


x86 assembly (clang, -O0):
<INT_Excep_ICU_GROUP1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_ICU_GROUP1>:
ret

LLVM IR (-O0):
define void @INT_Excep_ICU_GROUP1() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_ICU_GROUP1() {
ret void
}
__attribute__((no)) unsigned int si_srl(unsigned int x) { return (x >> 2); }


x86 assembly (clang, -O0):
<si_srl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<si_srl>:
mov    %edi,%eax
shr    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @si_srl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @si_srl(i32 %0) {
%2 = lshr i32 %0, 2
ret i32 %2
}
/* Variables and functions */
void *calloc(int, size_t);
int /*<<< orphan*/ outofmemory();
extern void *MyMalloc(size_t size) {
  void *ret = calloc(1, size);
  if (ret == NULL)
    outofmemory();
  return (ret);
}


x86 assembly (clang, -O0):
<MyMalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <MyMalloc+0x30>
mov    $0x0,%al
call   1030 <outofmemory@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MyMalloc>:
push   %rbx
mov    %rdi,%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113d <MyMalloc+0x1d>
xor    %eax,%eax
call   1030 <outofmemory@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @MyMalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @calloc(i32 1, i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @outofmemory()
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @MyMalloc(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @outofmemory()
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Type definitions */
struct wav_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ generate_sine(int, int, int, struct wav_data *);
void generate_0(struct wav_data *wave_data) {
  generate_sine(1200, 4, 44100, wave_data);
}


x86 assembly (clang, -O0):
<generate_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x4b0,%edi
mov    $0x4,%esi
mov    $0xac44,%edx
call   1030 <generate_sine@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_0>:
mov    %rdi,%rcx
mov    $0x4b0,%edi
mov    $0x4,%esi
mov    $0xac44,%edx
jmp    1030 <generate_sine@plt>

LLVM IR (-O0):
%struct.wav_data = type { i32 }
define void @generate_0(%struct.wav_data* %0) {
%2 = alloca %struct.wav_data*
store %struct.wav_data* %0, %struct.wav_data** %2
%3 = load %struct.wav_data*, %struct.wav_data** %2
%4 = call i32 @generate_sine(i32 1200, i32 4, i32 44100, %struct.wav_data* %3)
ret void
}

LLVM IR (-O2):
%struct.wav_data = type { i32 }
define void @generate_0(%struct.wav_data* %0) {
%2 = tail call i32 @generate_sine(i32 1200, i32 4, i32 44100, %struct.wav_data* %0)
ret void
}
int test_imm_12uint16_mem(unsigned short *val) {
  return ((*val) & (0x12 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_12uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x12,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_12uint16_mem>:
testb  $0x12,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_12uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 18
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_12uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 18
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void ldt_seg_write(int ldt_entno, unsigned offset, unsigned val) {
  asm volatile("movl %2, %%eax\n\t"
               "movl %1, %%edx\n\t"
               "movl %0, %%fs\n\t"
               "movl %%eax, %%fs:(%%edx)\t"
               :
               : "r"(7 + (ldt_entno << 3)), "r"(offset), "r"(val)
               : "eax", "edx", "cc");
}


x86 assembly (clang, -O0):
<ldt_seg_write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
shl    $0x3,%ecx
add    $0x7,%ecx
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edi
mov    %edi,%eax
mov    %esi,%edx
mov    %ecx,%fs
mov    %eax,%fs:(%edx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldt_seg_write>:
mov    %edx,%ecx
lea    0x7(,%rdi,8),%edi
mov    %ecx,%eax
mov    %esi,%edx
mov    %edi,%fs
mov    %eax,%fs:(%edx)
ret

LLVM IR (-O0):
define void @ldt_seg_write(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = shl i32 %7, 3
%9 = add nsw i32 7, %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @ldt_seg_write(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %0, 3
%5 = or i32 %4, 7
tail call void asm sideeffect "movl $2, %eax\0A\09movl $1, %edx\0A\09movl $0, %fs\0A\09movl %eax, %fs:(%edx)\09", "r,r,r,~{eax},~{edx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 %1, i32 %2)
ret void
}
int test_imm_3Duint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x3D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Duint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x3d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Duint64_lowword_mem>:
testb  $0x3d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Duint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 61
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Duint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 61
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void f(int a) {
  a++;
  ++a;
  a--;
  --a;
  +a;
  -a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = add nsw i32 %7, -1
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = load i32, i32* %2
%13 = sub nsw i32 0, %12
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
ret void
}