xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADCHardwareOversampleConfigure(uint32_t ui32Base, uint32_t ui32Factor) {
  uint32_t ui32Value;
  ;

  ;
  for (ui32Value = 0, ui32Factor >>= 1; ui32Factor;
       ui32Value++, ui32Factor >>= 1) {
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000030))) = ui32Value;
}


x86 assembly (clang, -O0):
<ADCHardwareOversampleConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1140 <ADCHardwareOversampleConfigure+0x40>
jmp    1129 <ADCHardwareOversampleConfigure+0x29>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111a <ADCHardwareOversampleConfigure+0x1a>
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCHardwareOversampleConfigure>:
xor    %eax,%eax
cmp    $0x2,%esi
jb     111c <ADCHardwareOversampleConfigure+0x1c>
xor    %eax,%eax
mov    %esi,%ecx
nopl   0x0(%rax,%rax,1)
sar    %ecx
add    $0x1,%eax
cmp    $0x3,%esi
mov    %ecx,%esi
ja     1110 <ADCHardwareOversampleConfigure+0x10>
movslq %edi,%rcx
mov    %eax,0x30(%rcx)
ret

LLVM IR (-O0):
define void @ADCHardwareOversampleConfigure(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %4
%7 = ashr i32 %6, 1
store i32 %7, i32* %4
br label %8
8: ; preds = %12, %2
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %8
br label %12
12: ; preds = %11
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
%15 = load i32, i32* %4
%16 = ashr i32 %15, 1
store i32 %16, i32* %4
br label %8
17: ; preds = %8
%18 = load i32, i32* %5
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 48
%21 = sext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 %18, i32* %22
ret void
}

LLVM IR (-O2):
define void @ADCHardwareOversampleConfigure(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, 2
br i1 %3, label %10, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %8, %4 ], [ 0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = ashr i32 %6, 1
%8 = add nuw nsw i32 %5, 1
%9 = icmp ult i32 %6, 4
br i1 %9, label %10, label %4
10: ; preds = %4, %2
%11 = phi i32 [ 0, %2 ], [ %8, %4 ]
%12 = add nsw i32 %0, 48
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 %11, i32* %14
ret void
}
void BN_MONT_CTX_init(void) {}


x86 assembly (clang, -O0):
<BN_MONT_CTX_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_MONT_CTX_init>:
ret

LLVM IR (-O0):
define void @BN_MONT_CTX_init() {
ret void
}

LLVM IR (-O2):
define void @BN_MONT_CTX_init() {
ret void
}
/* Variables and functions */
int FS460_image_request_freeze(int /*<<< orphan*/, int, int /*<<< orphan*/);
int unfreeze(int freeze_mode) {
  return FS460_image_request_freeze(0, freeze_mode, 0);
}


x86 assembly (clang, -O0):
<unfreeze>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edx,%edx
mov    %edx,%edi
call   1030 <FS460_image_request_freeze@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unfreeze>:
mov    %edi,%esi
xor    %edi,%edi
xor    %edx,%edx
jmp    1030 <FS460_image_request_freeze@plt>

LLVM IR (-O0):
define i32 @unfreeze(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @FS460_image_request_freeze(i32 0, i32 %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @unfreeze(i32 %0) {
%2 = tail call i32 @FS460_image_request_freeze(i32 0, i32 %0, i32 0)
ret i32 %2
}
/* Variables and functions */
char EOF;
char getchar();
int /*<<< orphan*/ putchar(char);
int main(void) {
  char c;
  while ((c = getchar()) != EOF) {
    putchar(c);
    putchar('\n');
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%eax
mov    0x2ea5(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1166 <main+0x46>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rbx
cmp    (%rbx),%al
je     115d <main+0x3d>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%al
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i8 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %9, %0
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = sext i8 %4 to i32
%6 = load i8, i8* @EOF
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %5, %7
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i8, i8* %2
%11 = call i32 @putchar(i8 signext %10)
%12 = call i32 @putchar(i8 signext 10)
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@EOF = global i8 0
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = load i8, i8* @EOF
%3 = icmp eq i8 %1, %2
br i1 %3, label %11, label %4
4: ; preds = %0, %4
%5 = phi i8 [ %8, %4 ], [ %1, %0 ]
%6 = tail call i32 @putchar(i8 signext %5)
%7 = tail call i32 @putchar(i8 signext 10)
%8 = tail call signext i8 (...) @getchar()
%9 = load i8, i8* @EOF
%10 = icmp eq i8 %8, %9
br i1 %10, label %11, label %4
11: ; preds = %4, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main(int argc, char *argv[]) { exit(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("??(");
  printf("??)");
  printf("\\");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed0(%rip),%rdi
call   1040 <printf@plt>
mov    $0x5c,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"??(\00"
@.str.1 = [4 x i8] c"??)\00"
@.str.2 = [2 x i8] c"\\\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"??(\00"
@.str.1 = [4 x i8] c"??)\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @putchar(i32 92)
ret i32 0
}
void sv_frameStep() {}


x86 assembly (clang, -O0):
<sv_frameStep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sv_frameStep>:
ret

LLVM IR (-O0):
define void @sv_frameStep() {
ret void
}

LLVM IR (-O2):
define void @sv_frameStep() {
ret void
}
int f(int x) {
  int y = 1;
  return x + y;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
void outw_local(unsigned long port, unsigned short value) {
  __asm__ __volatile__("out"
                       "w"
                       " %"
                       "w"
                       "0, %w1"
                       :
                       : "a"(value), "Nd"(port));
}


x86 assembly (clang, -O0):
<outw_local>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%ax
mov    -0x8(%rbp),%rdx
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw_local>:
mov    %esi,%eax
mov    %rdi,%rdx
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @outw_local(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i64, i64* %3
ret void
}

LLVM IR (-O2):
define void @outw_local(i64 %0, i16 zeroext %1) {
tail call void asm sideeffect "outw ${0:w}, ${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %1, i64 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SoundDriver_CD_Shutdown();
void CD_Shutdown(void) { SoundDriver_CD_Shutdown(); }


x86 assembly (clang, -O0):
<CD_Shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SoundDriver_CD_Shutdown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CD_Shutdown>:
xor    %eax,%eax
jmp    1030 <SoundDriver_CD_Shutdown@plt>

LLVM IR (-O0):
define void @CD_Shutdown() {
%1 = call i32 (...) @SoundDriver_CD_Shutdown()
ret void
}

LLVM IR (-O2):
define void @CD_Shutdown() {
%1 = tail call i32 (...) @SoundDriver_CD_Shutdown()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int usage() {
  fprintf(stderr, "rmdir <directory>\n");
  return -1;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"rmdir <directory>\0A\00"
define i32 @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"rmdir <directory>\0A\00"
define i32 @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void a() { printf("a() called\n"); }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"a() called\0A\00"
define void @a() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"a() called\00"
define void @a() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ keyin(int /*<<< orphan*/);
scalar_t__ keyready();
void op_clrinput() {
  while (keyready())
    keyin(0);
}


x86 assembly (clang, -O0):
<op_clrinput>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <op_clrinput+0x9>
mov    $0x0,%al
call   1030 <keyready@plt>
cmp    $0x0,%rax
je     1146 <op_clrinput+0x26>
xor    %edi,%edi
call   1040 <keyin@plt>
jmp    1129 <op_clrinput+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_clrinput>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <keyready@plt>
test   %rax,%rax
je     1145 <op_clrinput+0x25>
xor    %edi,%edi
call   1040 <keyin@plt>
jmp    1130 <op_clrinput+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @op_clrinput() {
br label %1
1: ; preds = %4, %0
%2 = call i64 (...) @keyready()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = call i32 @keyin(i32 0)
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @op_clrinput() {
%1 = tail call i64 (...) @keyready()
%2 = icmp eq i64 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0, %3
%4 = tail call i32 @keyin(i32 0)
%5 = tail call i64 (...) @keyready()
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %3
7: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void obd_serial_close(int fd) {
  close(fd);
  return;
}


x86 assembly (clang, -O0):
<obd_serial_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<obd_serial_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @obd_serial_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @obd_serial_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
/* Variables and functions */
double rand_double();
double rand_range_double(double min, double max) {
  return rand_double() * (max - min) + min;
}


x86 assembly (clang, -O0):
<rand_range_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand_double@plt>
movsd  -0x10(%rbp),%xmm2
subsd  -0x8(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_range_double>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand_double@plt>
movsd  0x8(%rsp),%xmm1
movsd  0x10(%rsp),%xmm2
subsd  %xmm1,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @rand_range_double(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = call double (...) @rand_double()
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fsub double %6, %7
%9 = load double, double* %3
%10 = call double @llvm.fmuladd.f64(double %5, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @rand_range_double(double %0, double %1) {
%3 = tail call double (...) @rand_double()
%4 = fsub double %1, %0
%5 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %0)
ret double %5
}
/* Variables and functions */
double *getVector(double, double, double);
double *scaleVector(double *a, double b) {
  return getVector(a[0] * b, a[1] * b, a[2] * b);
}


x86 assembly (clang, -O0):
<scaleVector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm1
mulsd  -0x10(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  -0x10(%rbp),%xmm2
call   1030 <getVector@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scaleVector>:
movapd %xmm0,%xmm2
movsd  (%rdi),%xmm0
mulsd  %xmm2,%xmm0
movsd  0x8(%rdi),%xmm1
mulsd  %xmm2,%xmm1
mulsd  0x10(%rdi),%xmm2
jmp    1030 <getVector@plt>

LLVM IR (-O0):
define double* @scaleVector(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double, double* %4
%9 = fmul double %7, %8
%10 = load double*, double** %3
%11 = getelementptr inbounds double, double* %10, i64 1
%12 = load double, double* %11
%13 = load double, double* %4
%14 = fmul double %12, %13
%15 = load double*, double** %3
%16 = getelementptr inbounds double, double* %15, i64 2
%17 = load double, double* %16
%18 = load double, double* %4
%19 = fmul double %17, %18
%20 = call double* @getVector(double %9, double %14, double %19)
ret double* %20
}

LLVM IR (-O2):
define double* @scaleVector(double* nocapture %0, double %1) {
%3 = load double, double* %0
%4 = fmul double %3, %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = fmul double %6, %1
%8 = getelementptr inbounds double, double* %0, i64 2
%9 = load double, double* %8
%10 = fmul double %9, %1
%11 = tail call double* @getVector(double %4, double %7, double %10)
ret double* %11
}
void LMotorPwm_SaveConfig(void) {}


x86 assembly (clang, -O0):
<LMotorPwm_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LMotorPwm_SaveConfig>:
ret

LLVM IR (-O0):
define void @LMotorPwm_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @LMotorPwm_SaveConfig() {
ret void
}
void Swap(int *x_p, int *y_p) {
  int tmp;
  tmp = *x_p;
  *x_p = *y_p;
  *y_p = tmp;
}


x86 assembly (clang, -O0):
<Swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @Swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @Swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
int rand();
int _xte_random(int in_upper_limit) {
  int const MAX_RANDOM_LIMIT = 2147483648;
  if (in_upper_limit == 0)
    in_upper_limit = MAX_RANDOM_LIMIT;
  return rand() % in_upper_limit + 1;
}


x86 assembly (clang, -O0):
<_xte_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x80000000,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1133 <_xte_random+0x23>
movl   $0x80000000,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_xte_random>:
push   %rbx
test   %edi,%edi
mov    $0x80000000,%ebx
cmovne %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
lea    0x1(%rdx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_xte_random(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -2147483648, i32* %3
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -2147483648, i32* %2
br label %7
7: ; preds = %6, %1
%8 = call i32 (...) @rand()
%9 = load i32, i32* %2
%10 = srem i32 %8, %9
%11 = add nsw i32 %10, 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @_xte_random(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 -2147483648, i32 %0
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, %3
%6 = add nsw i32 %5, 1
ret i32 %6
}
/* Variables and functions */
const void *const_array_elem(const void *elems, size_t i, size_t elem_size) {
  return (const void *)(((const char *)elems) + (i * elem_size));
}


x86 assembly (clang, -O0):
<const_array_elem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
imul   -0x18(%rbp),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<const_array_elem>:
imul   %rdx,%rsi
lea    (%rsi,%rdi,1),%rax
ret

LLVM IR (-O0):
define i8* @const_array_elem(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = mul i64 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 %10
ret i8* %11
}

LLVM IR (-O2):
define i8* @const_array_elem(i8* readnone %0, i64 %1, i64 %2) {
%4 = mul i64 %2, %1
%5 = getelementptr inbounds i8, i8* %0, i64 %4
ret i8* %5
}
/* Variables and functions */
int item();
int location();
int organism();
int examine_target(void) {
  int state;
  do {
    state = location();
    if (!state)
      break;
    state = item();
    if (!state)
      break;
    state = organism();
  } while (0);
  return state;
}


x86 assembly (clang, -O0):
<examine_target>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <location@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1151 <examine_target+0x21>
jmp    1174 <examine_target+0x44>
mov    $0x0,%al
call   1030 <item@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    116a <examine_target+0x3a>
jmp    1174 <examine_target+0x44>
mov    $0x0,%al
call   1040 <organism@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<examine_target>:
push   %rax
xor    %eax,%eax
call   1050 <location@plt>
test   %eax,%eax
je     114f <examine_target+0x1f>
xor    %eax,%eax
call   1030 <item@plt>
test   %eax,%eax
je     114f <examine_target+0x1f>
xor    %eax,%eax
pop    %rcx
jmp    1040 <organism@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @examine_target() {
%1 = alloca i32
br label %2
2: ; preds = %0
%3 = call i32 (...) @location()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %2
br label %14
7: ; preds = %2
%8 = call i32 (...) @item()
store i32 %8, i32* %1
%9 = load i32, i32* %1
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %7
br label %14
12: ; preds = %7
%13 = call i32 (...) @organism()
store i32 %13, i32* %1
br label %14
14: ; preds = %12, %11, %6
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @examine_target() {
%1 = tail call i32 (...) @location()
%2 = icmp eq i32 %1, 0
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = tail call i32 (...) @item()
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 (...) @organism()
br label %8
8: ; preds = %3, %0, %6
%9 = phi i32 [ %7, %6 ], [ 0, %3 ], [ 0, %0 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stdout;
void out_plain(char *buf) {
  fprintf(stdout, "%s", buf);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<out_plain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_plain>:
push   %rbx
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [3 x i8] c"%s\00"
define void @out_plain(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stdout
%7 = call i32 @fflush(i32 %6)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [3 x i8] c"%s\00"
define void @out_plain(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @stdout
%5 = tail call i32 @fflush(i32 %4)
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ PASS(char *);
int /*<<< orphan*/ foo();
int main() {
  foo();
  PASS("rpath-indirect-setuid");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
lea    0xec3(%rip),%rdi
call   1040 <PASS@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
lea    0xed1(%rip),%rdi
call   1040 <PASS@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"rpath-indirect-setuid\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = call i32 @PASS(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}

LLVM IR (-O2):
@.str = [22 x i8] c"rpath-indirect-setuid\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 @PASS(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Variables and functions */
scalar_t__ __VERIFIER_nondet_int();
int select_one() {
  if (__VERIFIER_nondet_int())
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<select_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
cmp    $0x0,%rax
je     1135 <select_one+0x25>
movl   $0x1,-0x4(%rbp)
jmp    113c <select_one+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<select_one>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @select_one() {
%1 = alloca i32
%2 = call i64 (...) @__VERIFIER_nondet_int()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @select_one() {
%1 = tail call i64 (...) @__VERIFIER_nondet_int()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ describe(int);
int /*<<< orphan*/ monsters();
int /*<<< orphan*/ showthings();
void look(void) {
  describe(1);
  showthings();
  monsters();
}


x86 assembly (clang, -O0):
<look>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <describe@plt>
mov    $0x0,%al
call   1030 <showthings@plt>
mov    $0x0,%al
call   1050 <monsters@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<look>:
push   %rax
mov    $0x1,%edi
call   1040 <describe@plt>
xor    %eax,%eax
call   1030 <showthings@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <monsters@plt>

LLVM IR (-O0):
define void @look() {
%1 = call i32 @describe(i32 1)
%2 = call i32 (...) @showthings()
%3 = call i32 (...) @monsters()
ret void
}

LLVM IR (-O2):
define void @look() {
%1 = tail call i32 @describe(i32 1)
%2 = tail call i32 (...) @showthings()
%3 = tail call i32 (...) @monsters()
ret void
}
/* Type definitions */
typedef int __u64;

/* Variables and functions */
__u64 ethtool_get_flow_spec_ring(__u64 ring_cookie) {
  return 0x00000000FFFFFFFFLL & ring_cookie;
}


x86 assembly (clang, -O0):
<ethtool_get_flow_spec_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0xffffffff,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ethtool_get_flow_spec_ring>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ethtool_get_flow_spec_ring(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = and i64 4294967295, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ethtool_get_flow_spec_ring(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;
typedef int /*<<< orphan*/ tmp;
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ ivory_serialize_pack_prim_8_be(int /*<<< orphan*/ *,
                                                  int /*<<< orphan*/ *);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ **, int /*<<< orphan*/ const *,
                          int);
void ivory_serialize_pack_int64_be(uint8_t *dst, uint32_t offs,
                                   const int64_t *src) {
  uint8_t tmp[8] = {0};
  memcpy(&tmp, src, sizeof(tmp));
  ivory_serialize_pack_prim_8_be(dst + offs, tmp);
}


x86 assembly (clang, -O0):
<ivory_serialize_pack_int64_be>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x40(%rbp),%rdi
xor    %esi,%esi
mov    $0x20,%edx
call   1030 <memset@plt>
lea    -0x40(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x20,%edx
call   1050 <memcpy@plt>
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
lea    -0x40(%rbp),%rsi
call   1040 <ivory_serialize_pack_prim_8_be@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivory_serialize_pack_int64_be>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %esi,%ebx
mov    %rdi,%r14
xorps  %xmm0,%xmm0
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
mov    %rsp,%r15
mov    %r15,%rdi
mov    %rdx,%rsi
mov    $0x20,%edx
call   1040 <memcpy@plt>
movslq %ebx,%rax
lea    (%r14,%rax,4),%rdi
mov    %r15,%rsi
call   1030 <ivory_serialize_pack_prim_8_be@plt>
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @ivory_serialize_pack_int64_be(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
%7 = alloca [8 x i32]
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%8 = bitcast [8 x i32]* %7 to i8*
%9 = bitcast [8 x i32]* %7 to i32**
%10 = load i32*, i32** %6
%11 = call i32 @memcpy(i32** %9, i32* %10, i32 32)
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = getelementptr inbounds [8 x i32], [8 x i32]* %7, i64 0, i64 0
%17 = call i32 @ivory_serialize_pack_prim_8_be(i32* %15, i32* %16)
ret void
}

LLVM IR (-O2):
define void @ivory_serialize_pack_int64_be(i32* %0, i32 %1, i32* %2) {
%4 = alloca [8 x i32]
%5 = bitcast [8 x i32]* %4 to i8*
%6 = bitcast [8 x i32]* %4 to i32**
%7 = call i32 @memcpy(i32** %6, i32* %2, i32 32)
%8 = sext i32 %1 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = getelementptr inbounds [8 x i32], [8 x i32]* %4, i64 0, i64 0
%11 = call i32 @ivory_serialize_pack_prim_8_be(i32* %9, i32* %10)
ret void
}
/* Type definitions */
typedef size_t off_t;

/* Variables and functions */
int /*<<< orphan*/ die(char *);
size_t xsize_t(off_t len) {
  if (len > (size_t)len)
    die("Cannot handle files this big");
  return (size_t)len;
}


x86 assembly (clang, -O0):
<xsize_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x8(%rbp),%rax
jbe    1136 <xsize_t+0x26>
lea    0xecf(%rip),%rdi
call   1030 <die@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xsize_t>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Cannot handle files this big\00"
define i64 @xsize_t(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = icmp ugt i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @die(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
ret i64 %9
}

LLVM IR (-O2):
define i64 @xsize_t(i64 returned %0) {
ret i64 %0
}
void capturingAtomic2CAPTURING_ATOMIC() {}


x86 assembly (clang, -O0):
<capturingAtomic2CAPTURING_ATOMIC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capturingAtomic2CAPTURING_ATOMIC>:
ret

LLVM IR (-O0):
define void @capturingAtomic2CAPTURING_ATOMIC() {
ret void
}

LLVM IR (-O2):
define void @capturingAtomic2CAPTURING_ATOMIC() {
ret void
}
/* Variables and functions */
unsigned int pd_random_29bit();
unsigned int pd_random_32bit(void) {
  unsigned int x = pd_random_29bit(), y = pd_random_29bit();
  return x ^ (y << 3);
}


x86 assembly (clang, -O0):
<pd_random_32bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <pd_random_29bit@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <pd_random_29bit@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x3,%ecx
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pd_random_32bit>:
push   %rbx
xor    %eax,%eax
call   1030 <pd_random_29bit@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <pd_random_29bit@plt>
shl    $0x3,%eax
xor    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @pd_random_32bit() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @pd_random_29bit()
store i32 %3, i32* %1
%4 = call i32 (...) @pd_random_29bit()
store i32 %4, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = shl i32 %6, 3
%8 = xor i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @pd_random_32bit() {
%1 = tail call i32 (...) @pd_random_29bit()
%2 = tail call i32 (...) @pd_random_29bit()
%3 = shl i32 %2, 3
%4 = xor i32 %3, %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __bitmap_xor(unsigned long *, unsigned long const *,
                                unsigned long const *, int);
__attribute__((always_)) void bitmap_xor(unsigned long *dst,
                                         const unsigned long *src1,
                                         const unsigned long *src2, int nbits) {
  if (nbits <= 32)
    *dst = *src1 ^ *src2;
  else
    __bitmap_xor(dst, src1, src2, nbits);
}


x86 assembly (clang, -O0):
<bitmap_xor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpl   $0x20,-0x1c(%rbp)
jg     114b <bitmap_xor+0x3b>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
xor    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    115f <bitmap_xor+0x4f>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <__bitmap_xor@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_xor>:
cmp    $0x20,%ecx
jg     111f <bitmap_xor+0xf>
mov    (%rdx),%rax
xor    (%rsi),%rax
mov    %rax,(%rdi)
ret
jmp    1030 <__bitmap_xor@plt>

LLVM IR (-O0):
define void @bitmap_xor(i64* %0, i64* %1, i64* %2, i32 %3) {
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i64*
%8 = alloca i32
store i64* %0, i64** %5
store i64* %1, i64** %6
store i64* %2, i64** %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp sle i32 %9, 32
br i1 %10, label %11, label %18
11: ; preds = %4
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i64*, i64** %7
%15 = load i64, i64* %14
%16 = xor i64 %13, %15
%17 = load i64*, i64** %5
store i64 %16, i64* %17
br label %24
18: ; preds = %4
%19 = load i64*, i64** %5
%20 = load i64*, i64** %6
%21 = load i64*, i64** %7
%22 = load i32, i32* %8
%23 = call i32 @__bitmap_xor(i64* %19, i64* %20, i64* %21, i32 %22)
br label %24
24: ; preds = %18, %11
ret void
}

LLVM IR (-O2):
define void @bitmap_xor(i64* %0, i64* %1, i64* %2, i32 %3) {
%5 = icmp slt i32 %3, 33
br i1 %5, label %6, label %10
6: ; preds = %4
%7 = load i64, i64* %1
%8 = load i64, i64* %2
%9 = xor i64 %8, %7
store i64 %9, i64* %0
br label %12
10: ; preds = %4
%11 = tail call i32 @__bitmap_xor(i64* %0, i64* %1, i64* %2, i32 %3)
br label %12
12: ; preds = %10, %6
ret void
}
int invert(int x, int p, int n) { return x ^ (~(~0 << n) << (p - n + 1)); }


x86 assembly (clang, -O0):
<invert>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<invert>:
mov    %edx,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
sub    %edx,%esi
lea    0x1(%rsi),%ecx
shl    %cl,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @invert(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = shl i32 -1, %8
%10 = xor i32 %9, -1
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sub nsw i32 %11, %12
%14 = add nsw i32 %13, 1
%15 = shl i32 %10, %14
%16 = xor i32 %7, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @invert(i32 %0, i32 %1, i32 %2) {
%4 = shl nsw i32 -1, %2
%5 = xor i32 %4, -1
%6 = add i32 %1, 1
%7 = sub i32 %6, %2
%8 = shl i32 %5, %7
%9 = xor i32 %8, %0
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ UP3D_GetParameter(int);
int32_t UP3D_GetPrintState() { return UP3D_GetParameter(0x1C); }


x86 assembly (clang, -O0):
<UP3D_GetPrintState>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c,%edi
call   1030 <UP3D_GetParameter@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UP3D_GetPrintState>:
mov    $0x1c,%edi
jmp    1030 <UP3D_GetParameter@plt>

LLVM IR (-O0):
define i32 @UP3D_GetPrintState() {
%1 = call i32 @UP3D_GetParameter(i32 28)
ret i32 %1
}

LLVM IR (-O2):
define i32 @UP3D_GetPrintState() {
%1 = tail call i32 @UP3D_GetParameter(i32 28)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ bswap32(int /*<<< orphan*/);
void bswap32s(uint32_t *s) { *s = bswap32(*s); }


x86 assembly (clang, -O0):
<bswap32s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <bswap32@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap32s>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <bswap32@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @bswap32s(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @bswap32(i32 %4)
%6 = load i32*, i32** %2
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @bswap32s(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @bswap32(i32 %2)
store i32 %3, i32* %0
ret void
}
/* Variables and functions */
char *valloc(int /*<<< orphan*/);
void test_valloc() {
  char *foo = valloc(0);
  for (unsigned i = 0; i < 100; i++) {
    foo[i] = 0;
  }
}


x86 assembly (clang, -O0):
<test_valloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <valloc@plt>
mov    %rax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
jae    114d <test_valloc+0x3d>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112a <test_valloc+0x1a>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_valloc>:
ret

LLVM IR (-O0):
define void @test_valloc() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i8* @valloc(i32 0)
store i8* %3, i8** %1
store i32 0, i32* %2
br label %4
4: ; preds = %12, %0
%5 = load i32, i32* %2
%6 = icmp ult i32 %5, 100
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i8*, i8** %1
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8 0, i8* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = add i32 %13, 1
store i32 %14, i32* %2
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @test_valloc() {
ret void
}
void TM06_intr(void) {}


x86 assembly (clang, -O0):
<TM06_intr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TM06_intr>:
ret

LLVM IR (-O0):
define void @TM06_intr() {
ret void
}

LLVM IR (-O2):
define void @TM06_intr() {
ret void
}
int ti_cmo_start(double const *options) { return (int)options[0]; }


x86 assembly (clang, -O0):
<ti_cmo_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttsd2si (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_cmo_start>:
cvttsd2si (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ti_cmo_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ti_cmo_start(double* nocapture %0) {
%2 = load double, double* %0
%3 = fptosi double %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ evaluate_external_forces();
int /*<<< orphan*/ evaluate_internal_forces();
void evaluate_forces(void) {
  evaluate_internal_forces();
  evaluate_external_forces();
}


x86 assembly (clang, -O0):
<evaluate_forces>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <evaluate_internal_forces@plt>
mov    $0x0,%al
call   1030 <evaluate_external_forces@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<evaluate_forces>:
push   %rax
xor    %eax,%eax
call   1040 <evaluate_internal_forces@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <evaluate_external_forces@plt>

LLVM IR (-O0):
define void @evaluate_forces() {
%1 = call i32 (...) @evaluate_internal_forces()
%2 = call i32 (...) @evaluate_external_forces()
ret void
}

LLVM IR (-O2):
define void @evaluate_forces() {
%1 = tail call i32 (...) @evaluate_internal_forces()
%2 = tail call i32 (...) @evaluate_external_forces()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atanf(float);
float cosf(int /*<<< orphan*/);
float __attribute__((no)) cosatanf_(float x) { return cosf(atanf(x)); }


x86 assembly (clang, -O0):
<cosatanf_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanf@plt>
mov    %eax,%edi
call   1040 <cosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cosatanf_>:
push   %rax
call   1030 <atanf@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <cosf@plt>

LLVM IR (-O0):
define float @cosatanf_(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @atanf(float %3)
%5 = call float @cosf(i32 %4)
ret float %5
}

LLVM IR (-O2):
define float @cosatanf_(float %0) {
%2 = tail call i32 @atanf(float %0)
%3 = tail call float @cosf(i32 %2)
ret float %3
}
/* Variables and functions */
int zero_or_ten(int /*<<< orphan*/);
void l2_concrete_underrun_Bad() {
  int a[9];
  a[zero_or_ten(0) - 1] = 0;
}


x86 assembly (clang, -O0):
<l2_concrete_underrun_Bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
xor    %edi,%edi
call   1030 <zero_or_ten@plt>
sub    $0x1,%eax
cltq
movl   $0x0,-0x30(%rbp,%rax,4)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2_concrete_underrun_Bad>:
xor    %edi,%edi
jmp    1030 <zero_or_ten@plt>

LLVM IR (-O0):
define void @l2_concrete_underrun_Bad() {
%1 = alloca [9 x i32]
%2 = call i32 @zero_or_ten(i32 0)
%3 = sub nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 %4
store i32 0, i32* %5
ret void
}

LLVM IR (-O2):
define void @l2_concrete_underrun_Bad() {
%1 = tail call i32 @zero_or_ten(i32 0)
ret void
}
void pci_ioapic_remove(struct acpi_pci_root *root) { return; }


x86 assembly (clang, -O0):
<pci_ioapic_remove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_ioapic_remove>:
ret

LLVM IR (-O0):
%struct.acpi_pci_root = type opaque
define void @pci_ioapic_remove(%struct.acpi_pci_root* %0) {
%2 = alloca %struct.acpi_pci_root*
store %struct.acpi_pci_root* %0, %struct.acpi_pci_root** %2
ret void
}

LLVM IR (-O2):
%struct.acpi_pci_root = type opaque
define void @pci_ioapic_remove(%struct.acpi_pci_root* nocapture %0) {
ret void
}
unsigned char f15(unsigned char x, int y) {
  return (x << y) | (x >> ((-y) & (8 * sizeof(unsigned char) - 1)));
}


x86 assembly (clang, -O0):
<f15>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
movslq %ecx,%rcx
and    $0x7,%rcx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f15>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
and    $0x7,%cl
shr    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f15(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 %6, %7
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = load i32, i32* %4
%12 = sub nsw i32 0, %11
%13 = sext i32 %12 to i64
%14 = and i64 %13, 7
%15 = trunc i64 %14 to i32
%16 = ashr i32 %10, %15
%17 = or i32 %8, %16
%18 = trunc i32 %17 to i8
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @f15(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = shl i32 %3, %1
%5 = sub nsw i32 0, %1
%6 = and i32 %5, 7
%7 = lshr i32 %3, %6
%8 = or i32 %7, %4
%9 = trunc i32 %8 to i8
ret i8 %9
}
void ExttHitAuxTable(void) {}


x86 assembly (clang, -O0):
<ExttHitAuxTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttHitAuxTable>:
ret

LLVM IR (-O0):
define void @ExttHitAuxTable() {
ret void
}

LLVM IR (-O2):
define void @ExttHitAuxTable() {
ret void
}
void BGRAToYRow_Any_SSSE3() {}


x86 assembly (clang, -O0):
<BGRAToYRow_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGRAToYRow_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @BGRAToYRow_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @BGRAToYRow_Any_SSSE3() {
ret void
}