xunge/DecIR huggingface dataset:
void HwMdSetOffset(unsigned short offset) {
  while ((*(volatile unsigned short *)0x20004020))
    ;
  (*(volatile unsigned short *)0x20004022) = offset;
  (*(volatile unsigned short *)0x20004020) = 0x0500;
  while ((*(volatile unsigned short *)0x20004020))
    ;
}


x86 assembly (clang, -O0):
<HwMdSetOffset>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x20004020,%eax
mov    (%rax),%ax
cmp    $0x0,%ax
je     1122 <HwMdSetOffset+0x22>
jmp    110b <HwMdSetOffset+0xb>
mov    -0x2(%rbp),%cx
mov    $0x20004022,%eax
mov    %cx,(%rax)
mov    $0x20004020,%eax
movw   $0x500,(%rax)
mov    $0x20004020,%eax
mov    (%rax),%ax
cmp    $0x0,%ax
je     114f <HwMdSetOffset+0x4f>
jmp    1138 <HwMdSetOffset+0x38>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HwMdSetOffset>:
cmpw   $0x0,0x20004020
jne    1100 <HwMdSetOffset>
mov    %di,0x20004022
20
movw   $0x500,0x20004020
nopl   (%rax)
cmpw   $0x0,0x20004020
jne    1120 <HwMdSetOffset+0x20>
ret

LLVM IR (-O0):
define void @HwMdSetOffset(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
br label %3
3: ; preds = %6, %1
%4 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%5 = icmp ne i16 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %3
br label %3
7: ; preds = %3
%8 = load i16, i16* %2
store volatile i16 %8, i16* inttoptr (i64 536887330 to i16*)
store volatile i16 1280, i16* inttoptr (i64 536887328 to i16*)
br label %9
9: ; preds = %12, %7
%10 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%11 = icmp ne i16 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
br label %9
13: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @HwMdSetOffset(i16 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%4 = icmp eq i16 %3, 0
br i1 %4, label %5, label %2
5: ; preds = %2
store volatile i16 %0, i16* inttoptr (i64 536887330 to i16*)
store volatile i16 1280, i16* inttoptr (i64 536887328 to i16*)
br label %6
6: ; preds = %6, %5
%7 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%8 = icmp eq i16 %7, 0
br i1 %8, label %9, label %6
9: ; preds = %6
ret void
}
void clonefd_cleanup_failed_clone(struct clonefd_setup *setup) {}


x86 assembly (clang, -O0):
<clonefd_cleanup_failed_clone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clonefd_cleanup_failed_clone>:
ret

LLVM IR (-O0):
%struct.clonefd_setup = type opaque
define void @clonefd_cleanup_failed_clone(%struct.clonefd_setup* %0) {
%2 = alloca %struct.clonefd_setup*
store %struct.clonefd_setup* %0, %struct.clonefd_setup** %2
ret void
}

LLVM IR (-O2):
%struct.clonefd_setup = type opaque
define void @clonefd_cleanup_failed_clone(%struct.clonefd_setup* nocapture %0) {
ret void
}
/* Variables and functions */
int fn_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(char const *);
int fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(const char *text) {
  int pos = 0;
  pos = fn_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(text);
  if (pos != -1)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fn_sq_qtg_1_4294967295_cl_9_10_13_13_32_32@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1144 <fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32>:
jmp    1030 <fn_sq_qtg_1_4294967295_cl_9_10_13_13_32_32@plt>

LLVM IR (-O0):
define i32 @fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @fn_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @fn_al_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(i8* %0) {
%2 = tail call i32 @fn_sq_qtg_1_4294967295_cl_9_10_13_13_32_32(i8* %0)
ret i32 %2
}
int movzwl_2(void) {
  int res;
  __asm__ __volatile__("movl $0x12345678, %%eax\n\t"
                       "movw $0x9999, %%ax\n\t"
                       "movzwl %%ax,%%eax\n\t"
                       "mov %%eax, %0"
                       : "=r"(res)
                       :
                       : "eax");
  return res;
}


x86 assembly (clang, -O0):
<movzwl_2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12345678,%eax
mov    $0x9999,%ax
movzwl %ax,%eax
mov    %eax,%ecx
mov    %ecx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<movzwl_2>:
mov    $0x12345678,%eax
mov    $0x9999,%ax
movzwl %ax,%eax
mov    %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @movzwl_2() {
%1 = alloca i32
%2 = call i32 asm sideeffect "movl $$0x12345678, %eax\0A\09movw $$0x9999, %ax\0A\09movzwl %ax,%eax\0A\09mov %eax, $0", "=r,~{eax},~{dirflag},~{fpsr},~{flags}"()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @movzwl_2() {
%1 = tail call i32 asm sideeffect "movl $$0x12345678, %eax\0A\09movw $$0x9999, %ax\0A\09movzwl %ax,%eax\0A\09mov %eax, $0", "=r,~{eax},~{dirflag},~{fpsr},~{flags}"()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ errMsg(char *);
int write(int, char *, int);
int writeGPS(int ubxfd, char *buf, int buflen) {
  int nwrt = -1;
  if ((nwrt = write(ubxfd, buf, buflen)) != buflen)
    errMsg("gps: writeGPS");
  return (nwrt);
}


x86 assembly (clang, -O0):
<writeGPS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0xffffffff,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
mov    %eax,-0x18(%rbp)
cmp    -0x14(%rbp),%eax
je     1160 <writeGPS+0x40>
lea    0xea5(%rip),%rdi
call   1040 <errMsg@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeGPS>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
call   1030 <write@plt>
mov    %eax,%ebx
cmp    %ebp,%eax
je     113c <writeGPS+0x1c>
lea    0xec9(%rip),%rdi
call   1040 <errMsg@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [14 x i8] c"gps: writeGPS\00"
define i32 @writeGPS(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 -1, i32* %7
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @write(i32 %8, i8* %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = icmp ne i32 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @errMsg(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
@.str = [14 x i8] c"gps: writeGPS\00"
define i32 @writeGPS(i32 %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %2)
%5 = icmp eq i32 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @errMsg(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i32 %4
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *fgfdm_zalloc(size_t size) {
  void *p = malloc(size);
  if (p)
    memset(p, 0, size);
  return p;
}


x86 assembly (clang, -O0):
<fgfdm_zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1153 <fgfdm_zalloc+0x33>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgfdm_zalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1141 <fgfdm_zalloc+0x21>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @fgfdm_zalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i64, i64* %2
%11 = call i32 @memset(i8* %9, i32 0, i64 %10)
br label %12
12: ; preds = %8, %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
define i8* @fgfdm_zalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ F_RDLCK;
int /*<<< orphan*/ F_SETLK;
int get_file_lock(int, int /*<<< orphan*/, int /*<<< orphan*/);
int get_read_lock(int fd) { return (get_file_lock(fd, F_SETLK, F_RDLCK)); }


x86 assembly (clang, -O0):
<get_read_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
mov    0x2ea2(%rip),%rax
mov    (%rax),%edx
call   1030 <get_file_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_read_lock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
jmp    1030 <get_file_lock@plt>

LLVM IR (-O0):
@F_SETLK = global i32 0
@F_RDLCK = global i32 0
define i32 @get_read_lock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_SETLK
%5 = load i32, i32* @F_RDLCK
%6 = call i32 @get_file_lock(i32 %3, i32 %4, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
@F_SETLK = global i32 0
@F_RDLCK = global i32 0
define i32 @get_read_lock(i32 %0) {
%2 = load i32, i32* @F_SETLK
%3 = load i32, i32* @F_RDLCK
%4 = tail call i32 @get_file_lock(i32 %0, i32 %2, i32 %3)
ret i32 %4
}
void ADCSequenceOverflowClear(unsigned long ulBase,
                              unsigned long ulSequenceNum) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = 1 << ulSequenceNum;
}


x86 assembly (clang, -O0):
<ADCSequenceOverflowClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceOverflowClear>:
mov    %rsi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x10(%rdi)
ret

LLVM IR (-O0):
define void @ADCSequenceOverflowClear(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 1, %6
%8 = sext i32 %7 to i64
%9 = load i64, i64* %3
%10 = add i64 %9, 16
%11 = inttoptr i64 %10 to i64*
store volatile i64 %8, i64* %11
ret void
}

LLVM IR (-O2):
define void @ADCSequenceOverflowClear(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl nuw i32 1, %3
%5 = sext i32 %4 to i64
%6 = add i64 %0, 16
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("hello world");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int foo(int x) {
  if ((int)(x & 0x80ffffff) != (int)(0x8000fffe))
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80ffffff,%eax
cmp    $0x8000fffe,%eax
je     1135 <foo+0x25>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
and    $0x80ffffff,%edi
cmp    $0x8000fffe,%edi
jne    1121 <foo+0x11>
xor    %eax,%eax
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -2130706433
%5 = icmp ne i32 %4, -2147418114
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i32 0
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = and i32 %0, -2130706433
%3 = icmp eq i32 %2, -2147418114
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %1
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void freeTLSOutData(SSL *ssl, unsigned extension_value, const uint8_t *out,
                    void *add_arg) {
  (void)ssl;
  (void)extension_value;
  (void)add_arg;
  free((uint8_t *)out);
}


x86 assembly (clang, -O0):
<freeTLSOutData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeTLSOutData>:
mov    %rdx,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeTLSOutData(i32* %0, i32 %1, i32* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i8*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i8* %3, i8** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %8
%12 = load i32*, i32** %7
%13 = call i32 @free(i32* %12)
ret void
}

LLVM IR (-O2):
define void @freeTLSOutData(i32* nocapture readnone %0, i32 %1, i32* nocapture %2, i8* nocapture readnone %3) {
%5 = tail call i32 @free(i32* %2)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ XExtData;
struct TYPE_2__ {
  int /*<<< orphan*/ *ext_data;
};
typedef TYPE_1__ Visual;

/* Variables and functions */
void set_Visual_ext_data(void *_p, void *_v) {
  ((Visual *)_p)->ext_data = (XExtData *)_v;
}


x86 assembly (clang, -O0):
<set_Visual_ext_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_Visual_ext_data>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32* }
define void @set_Visual_ext_data(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i32* %6, i32** %9
ret void
}

LLVM IR (-O2):
define void @set_Visual_ext_data(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Type definitions */
struct Node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ create_child(struct Node *, int const);
struct Node *node_new(int);
struct Node *f(const int len) {
  struct Node *s = node_new(12345);
  create_child(s, len);
  return s;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x3039,%edi
call   1030 <node_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1040 <create_child@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x3039,%edi
call   1030 <node_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %ebp,%esi
call   1040 <create_child@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.Node = type { i32 }
define %struct.Node* @f(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.Node*
store i32 %0, i32* %2
%4 = call %struct.Node* @node_new(i32 12345)
store %struct.Node* %4, %struct.Node** %3
%5 = load %struct.Node*, %struct.Node** %3
%6 = load i32, i32* %2
%7 = call i32 @create_child(%struct.Node* %5, i32 %6)
%8 = load %struct.Node*, %struct.Node** %3
ret %struct.Node* %8
}

LLVM IR (-O2):
%struct.Node = type { i32 }
define %struct.Node* @f(i32 %0) {
%2 = tail call %struct.Node* @node_new(i32 12345)
%3 = tail call i32 @create_child(%struct.Node* %2, i32 %0)
ret %struct.Node* %2
}
int leapyear(int year) {
  int tmp = 17 / 0;
  if (year % 4 == 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<leapyear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    112a <leapyear+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <leapyear+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leapyear>:
xor    %eax,%eax
test   $0x3,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @leapyear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 poison, i32* %4
%5 = load i32, i32* %3
%6 = srem i32 %5, 4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @leapyear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int isNumChecker(char c) {
  if ((c >= '0') && (c <= '9'))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isNumChecker>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <isNumChecker+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1130 <isNumChecker+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <isNumChecker+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNumChecker>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isNumChecker(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @isNumChecker(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ rb_error_arity(int, int, int);
int rb_check_arity(int argc, int min, int max) {
  if ((argc < min) || (max != (-1) && argc > max))
    rb_error_arity(argc, min, max);
  return argc;
}


x86 assembly (clang, -O0):
<rb_check_arity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1143 <rb_check_arity+0x33>
cmpl   $0xffffffff,-0xc(%rbp)
je     1151 <rb_check_arity+0x41>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1151 <rb_check_arity+0x41>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <rb_error_arity@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_check_arity>:
push   %rbx
mov    %edi,%ebx
cmp    %esi,%edi
jl     1120 <rb_check_arity+0x10>
cmp    $0xffffffff,%edx
je     1127 <rb_check_arity+0x17>
cmp    %edx,%ebx
jle    1127 <rb_check_arity+0x17>
mov    %ebx,%edi
call   1030 <rb_error_arity@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rb_check_arity(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %17, label %10
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, -1
br i1 %12, label %13, label %22
13: ; preds = %10
%14 = load i32, i32* %4
%15 = load i32, i32* %6
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %22
17: ; preds = %13, %3
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = load i32, i32* %6
%21 = call i32 @rb_error_arity(i32 %18, i32 %19, i32 %20)
br label %22
22: ; preds = %17, %13, %10
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @rb_check_arity(i32 returned %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = icmp ne i32 %2, -1
%7 = icmp sgt i32 %0, %2
%8 = and i1 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %5, %3
%10 = tail call i32 @rb_error_arity(i32 %0, i32 %1, i32 %2)
br label %11
11: ; preds = %9, %5
ret i32 %0
}
int main(int argc, char **argv) { return __builtin_parity(argc); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    %ecx,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%ecx
mov    %ecx,%eax
and    $0x33333333,%eax
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    %edi,%ecx
shr    $0x10,%ecx
xor    %edi,%ecx
xor    %eax,%eax
xor    %ch,%cl
setnp  %al
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @llvm.ctpop.i32(i32 %0)
%4 = and i32 %3, 1
ret i32 %4
}
int main(int argc, char **argv) { return argc + argc; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = shl nsw i32 %0, 1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int /*<<< orphan*/ feholdexcept(int /*<<< orphan*/ *);
int /*<<< orphan*/ fesetenv(int /*<<< orphan*/ *);
float rintf(float);
float nearbyintf(float x) {
  fenv_t fenv;
  float res;
  feholdexcept(&fenv);
  res = rintf(x);
  fesetenv(&fenv);
  return (res);
}


x86 assembly (clang, -O0):
<nearbyintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <feholdexcept@plt>
movss  -0x4(%rbp),%xmm0
call   1030 <rintf@plt>
movss  %xmm0,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
call   1050 <fesetenv@plt>
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nearbyintf>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0x8(%rsp)
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <feholdexcept@plt>
mov    %rbx,%rdi
call   1050 <fesetenv@plt>
movss  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
jmp    1030 <rintf@plt>

LLVM IR (-O0):
define float @nearbyintf(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca float
store float %0, float* %2
%5 = call i32 @feholdexcept(i32* %3)
%6 = load float, float* %2
%7 = call float @llvm.rint.f32(float %6)
store float %7, float* %4
%8 = call i32 @fesetenv(i32* %3)
%9 = load float, float* %4
ret float %9
}

LLVM IR (-O2):
define float @nearbyintf(float %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @feholdexcept(i32* %2)
%5 = call float @llvm.rint.f32(float %0)
%6 = call i32 @fesetenv(i32* %2)
ret float %5
}
void eap_peer_unregister_methods(void) {}


x86 assembly (clang, -O0):
<eap_peer_unregister_methods>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eap_peer_unregister_methods>:
ret

LLVM IR (-O0):
define void @eap_peer_unregister_methods() {
ret void
}

LLVM IR (-O2):
define void @eap_peer_unregister_methods() {
ret void
}
int rdiv(int n, int d) {
  if (d)
    return (n + (d / 2)) / d;
  else
    return n;
}


x86 assembly (clang, -O0):
<rdiv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1138 <rdiv+0x38>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x4(%rbp)
jmp    113e <rdiv+0x3e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdiv>:
mov    %edi,%eax
test   %esi,%esi
je     1116 <rdiv+0x16>
mov    %esi,%ecx
shr    $0x1f,%ecx
add    %esi,%ecx
sar    %ecx
add    %eax,%ecx
mov    %ecx,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @rdiv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = sdiv i32 %10, 2
%12 = add nsw i32 %9, %11
%13 = load i32, i32* %5
%14 = sdiv i32 %12, %13
store i32 %14, i32* %3
br label %17
15: ; preds = %2
%16 = load i32, i32* %4
store i32 %16, i32* %3
br label %17
17: ; preds = %15, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @rdiv(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = sdiv i32 %1, 2
%6 = add nsw i32 %5, %0
%7 = sdiv i32 %6, %1
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ %0, %2 ]
ret i32 %9
}
void free_distances(double **array, int num) {
  int i;
  for (i = 0; i < num; i++) {
    shFree(array[i]);
  }
  shFree(array);
}


x86 assembly (clang, -O0):
<free_distances>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1153 <free_distances+0x43>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    $0x0,%al
call   1030 <shFree@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_distances+0x16>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <shFree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_distances>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1144 <free_distances+0x34>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
xor    %eax,%eax
call   1030 <shFree@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_distances+0x20>
mov    %r14,%rdi
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <shFree@plt>

LLVM IR (-O0):
define void @free_distances(double** %0, i32 %1) {
%3 = alloca double**
%4 = alloca i32
%5 = alloca i32
store double** %0, double*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double**, double*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double*, double** %11, i64 %13
%15 = load double*, double** %14
%16 = call i32 (double*, ...) bitcast (i32 (...)* @shFree to i32 (double*, ...)*)(double* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load double**, double*** %3
%22 = call i32 (double**, ...) bitcast (i32 (...)* @shFree to i32 (double**, ...)*)(double** %21)
ret void
}

LLVM IR (-O2):
define void @free_distances(double** %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double*, double** %0, i64 %7
%9 = load double*, double** %8
%10 = tail call i32 (double*, ...) bitcast (i32 (...)* @shFree to i32 (double*, ...)*)(double* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 (double**, ...) bitcast (i32 (...)* @shFree to i32 (double**, ...)*)(double** %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ init_args(int, char **);
int /*<<< orphan*/ mind();
int main(int argc, char *argv[]) {
  init_args(argc, argv);
  mind();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <init_args@plt>
mov    $0x0,%al
call   1030 <mind@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <init_args@plt>
xor    %eax,%eax
call   1030 <mind@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @init_args(i32 %5, i8** %6)
%8 = call i32 (...) @mind()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @init_args(i32 %0, i8** %1)
%4 = tail call i32 (...) @mind()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Dynamic_Resolution_GetEnabled();
int /*<<< orphan*/ Dynamic_Resolution_SetEnabled(int);
void Dynamic_Resolution_ToggleEnabled(void) {
  Dynamic_Resolution_SetEnabled(!Dynamic_Resolution_GetEnabled());
}


x86 assembly (clang, -O0):
<Dynamic_Resolution_ToggleEnabled>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Dynamic_Resolution_GetEnabled@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <Dynamic_Resolution_SetEnabled@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dynamic_Resolution_ToggleEnabled>:
push   %rax
xor    %eax,%eax
call   1030 <Dynamic_Resolution_GetEnabled@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
pop    %rax
jmp    1040 <Dynamic_Resolution_SetEnabled@plt>

LLVM IR (-O0):
define void @Dynamic_Resolution_ToggleEnabled() {
%1 = call i32 (...) @Dynamic_Resolution_GetEnabled()
%2 = icmp ne i32 %1, 0
%3 = xor i1 %2, true
%4 = zext i1 %3 to i32
%5 = call i32 @Dynamic_Resolution_SetEnabled(i32 %4)
ret void
}

LLVM IR (-O2):
define void @Dynamic_Resolution_ToggleEnabled() {
%1 = tail call i32 (...) @Dynamic_Resolution_GetEnabled()
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Dynamic_Resolution_SetEnabled(i32 %3)
ret void
}
int is_set(int x, int b) { return x & (1 << b); }


x86 assembly (clang, -O0):
<is_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_set>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @is_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_set(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = and i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int rand();
unsigned short mk_rnd_u16(void) { return (rand() & 0xffff); }


x86 assembly (clang, -O0):
<mk_rnd_u16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
and    $0xffff,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mk_rnd_u16>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i16 @mk_rnd_u16() {
%1 = call i32 (...) @rand()
%2 = and i32 %1, 65535
%3 = trunc i32 %2 to i16
ret i16 %3
}

LLVM IR (-O2):
define zeroext i16 @mk_rnd_u16() {
%1 = tail call i32 (...) @rand()
%2 = trunc i32 %1 to i16
ret i16 %2
}
void EUSCIB3_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<EUSCIB3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <EUSCIB3_IRQHandler+0x9>
jmp    1109 <EUSCIB3_IRQHandler+0x9>

x86 assembly (clang, -O2):
<EUSCIB3_IRQHandler>:
jmp    1100 <EUSCIB3_IRQHandler>

LLVM IR (-O0):
define void @EUSCIB3_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @EUSCIB3_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void g_DUMMY_menu_destroy_floating_children(int win_id) { win_id = win_id; }


x86 assembly (clang, -O0):
<g_DUMMY_menu_destroy_floating_children>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_menu_destroy_floating_children>:
ret

LLVM IR (-O0):
define void @g_DUMMY_menu_destroy_floating_children(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @g_DUMMY_menu_destroy_floating_children(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  int i = 0;
  printf("i	%p\n", i);
  printf("&i	%p\n", &i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec2(%rip),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xee1(%rip),%rdi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed0(%rip),%rdi
lea    0x4(%rsp),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"i\09%p\0A\00"
@.str.1 = [7 x i8] c"&i\09%p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32* %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"i\09%p\0A\00"
@.str.1 = [7 x i8] c"&i\09%p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 0)
%4 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32* %1)
ret i32 0
}
/* Variables and functions */
double luaL_check_number(int);
int /*<<< orphan*/ lua_pushnumber(double);
void math_deg(void) {
  lua_pushnumber(luaL_check_number(1) *
                 (180.0 / ((double)3.14159265358979323846)));
}


x86 assembly (clang, -O0):
<math_deg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <luaL_check_number@plt>
movsd  0xeca(%rip),%xmm1
mulsd  %xmm1,%xmm0
call   1040 <lua_pushnumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_deg>:
push   %rax
mov    $0x1,%edi
call   1030 <luaL_check_number@plt>
mulsd  0xecd(%rip),%xmm0
pop    %rax
jmp    1040 <lua_pushnumber@plt>

LLVM IR (-O0):
define void @math_deg() {
%1 = call double @luaL_check_number(i32 1)
%2 = fmul double %1, 0x404CA5DC1A63C1F8
%3 = call i32 @lua_pushnumber(double %2)
ret void
}

LLVM IR (-O2):
define void @math_deg() {
%1 = tail call double @luaL_check_number(i32 1)
%2 = fmul double %1, 0x404CA5DC1A63C1F8
%3 = tail call i32 @lua_pushnumber(double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
int /*<<< orphan*/ sleep(int);
void childprocess(char *buf) {
  int counter = 0;
  while (1) {
    printf("Message %d: %s\n", counter, buf);
    counter++;
    sleep(2);
  }
}


x86 assembly (clang, -O0):
<childprocess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%rdx
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    %eax,-0xc(%rbp)
mov    $0x2,%edi
call   1040 <sleep@plt>
jmp    1133 <childprocess+0x13>

x86 assembly (clang, -O2):
<childprocess>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
xor    %ebp,%ebp
lea    0xed0(%rip),%r14
mov    %r14,%rdi
mov    %ebp,%esi
mov    %rbx,%rdx
call   1030 <printf@plt>
add    $0x1,%ebp
mov    $0x2,%edi
call   1040 <sleep@plt>
jmp    1130 <childprocess+0x10>

LLVM IR (-O0):
@.str = [16 x i8] c"Message %d: %s\0A\00"
define void @childprocess(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %1, %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %2
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %6)
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = call i32 @sleep(i32 2)
br label %4
}

LLVM IR (-O2):
@.str = [16 x i8] c"Message %d: %s\0A\00"
define void @childprocess(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %5, %2 ]
%4 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %3, i8* %0)
%5 = add nuw nsw i32 %3, 1
%6 = tail call i32 @sleep(i32 2)
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ read1();
int /*<<< orphan*/ read2();
int /*<<< orphan*/ read3();
int /*<<< orphan*/ read4();
int main() {
  read1();
  read2();
  read3();
  read4();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <read1@plt>
mov    $0x0,%al
call   1040 <read2@plt>
mov    $0x0,%al
call   1050 <read3@plt>
mov    $0x0,%al
call   1030 <read4@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <read1@plt>
xor    %eax,%eax
call   1040 <read2@plt>
xor    %eax,%eax
call   1050 <read3@plt>
xor    %eax,%eax
call   1030 <read4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @read1()
%3 = call i32 (...) @read2()
%4 = call i32 (...) @read3()
%5 = call i32 (...) @read4()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @read1()
%2 = tail call i32 (...) @read2()
%3 = tail call i32 (...) @read3()
%4 = tail call i32 (...) @read4()
ret i32 0
}
int main(int argc, char **argv) { return 42; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 42
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 42
}
int main(int argc, char *argv[]) {
  asm("call *0x00");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
call   *0x0
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
call   *0x0
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
tail call void asm sideeffect "call *0x00", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
void ble_rsp_system_get_counters(
    const struct ble_msg_system_get_counters_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_system_get_counters>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_system_get_counters>:
ret

LLVM IR (-O0):
%struct.ble_msg_system_get_counters_rsp_t = type opaque
define void @ble_rsp_system_get_counters(%struct.ble_msg_system_get_counters_rsp_t* %0) {
%2 = alloca %struct.ble_msg_system_get_counters_rsp_t*
store %struct.ble_msg_system_get_counters_rsp_t* %0, %struct.ble_msg_system_get_counters_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_system_get_counters_rsp_t = type opaque
define void @ble_rsp_system_get_counters(%struct.ble_msg_system_get_counters_rsp_t* nocapture %0) {
ret void
}
/* Variables and functions */
double cosh(double);
char *gettext(char *);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, double *);
double CosenoHiperbolico(double x) {
  printf(gettext("Enter a number: "));
  scanf("%lf", &x);
  return (cosh(x));
}


x86 assembly (clang, -O0):
<CosenoHiperbolico>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    0xeac(%rip),%rdi
call   1040 <gettext@plt>
mov    %rax,%rdi
call   1050 <printf@plt>
lea    0xea9(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1060 <scanf@plt>
movsd  -0x8(%rbp),%xmm0
call   1030 <cosh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CosenoHiperbolico>:
push   %rax
movsd  %xmm0,(%rsp)
lea    0xeb3(%rip),%rdi
call   1040 <gettext@plt>
mov    %rax,%rdi
call   1050 <printf@plt>
lea    0xeb0(%rip),%rdi
mov    %rsp,%rsi
call   1060 <scanf@plt>
movsd  (%rsp),%xmm0
call   1030 <cosh@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Enter a number: \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @CosenoHiperbolico(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i8* @gettext(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* %3)
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%6 = load double, double* %2
%7 = call double @cosh(double %6)
ret double %7
}

LLVM IR (-O2):
@.str = [17 x i8] c"Enter a number: \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @CosenoHiperbolico(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = tail call i8* @gettext(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%6 = load double, double* %2
%7 = call double @cosh(double %6)
ret double %7
}
void foo_2_1_2_2_1_1_2_2_1() {}


x86 assembly (clang, -O0):
<foo_2_1_2_2_1_1_2_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_2_2_1_1_2_2_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_2_2_1_1_2_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_2_2_1_1_2_2_1() {
ret void
}
int ilog10(int n) {
  const int pow10[] = {
      0, 10, 100, 1000, 10000, 100000, 1000000, 10000000, 100000000, 1000000000,
  };
  int temp = (32 - __builtin_clz(n | 1)) * 1233 >> 12;
  return temp - (n < pow10[temp]) + 1;
}


x86 assembly (clang, -O0):
<ilog10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xeda(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
mov    -0x4(%rbp),%eax
or     $0x1,%eax
bsr    %eax,%ecx
xor    $0x1f,%ecx
mov    $0x20,%eax
sub    %ecx,%eax
imul   $0x4d1,%eax,%eax
sar    $0xc,%eax
mov    %eax,-0x34(%rbp)
mov    -0x34(%rbp),%eax
mov    -0x4(%rbp),%ecx
movslq -0x34(%rbp),%rdx
cmp    -0x30(%rbp,%rdx,4),%ecx
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
add    $0x1,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilog10>:
mov    %edi,%eax
or     $0x1,%eax
bsr    %eax,%eax
xor    $0xffffffe0,%eax
imul   $0x4d1,%eax,%eax
add    $0x9ef1,%eax
shr    $0xc,%eax
lea    0xee0(%rip),%rcx
xor    %edx,%edx
cmp    %edi,(%rcx,%rax,4)
setg   %dl
neg    %edx
add    %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
@__const.ilog10.pow10 = [10 x i32] [i32 0, i32 10, i32 100, i32 1000, i32 10000, i32 100000, i32 1000000, i32 10000000, i32 100000000, i32 1000000000]
define i32 @ilog10(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i32]
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast [10 x i32]* %3 to i8*
%6 = load i32, i32* %2
%7 = or i32 %6, 1
%8 = call i32 @llvm.ctlz.i32(i32 %7, i1 true)
%9 = sub nsw i32 32, %8
%10 = mul nsw i32 %9, 1233
%11 = ashr i32 %10, 12
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %2
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %15
%17 = load i32, i32* %16
%18 = icmp slt i32 %13, %17
%19 = zext i1 %18 to i32
%20 = sub nsw i32 %12, %19
%21 = add nsw i32 %20, 1
ret i32 %21
}

LLVM IR (-O2):
@__const.ilog10.pow10 = [10 x i32] [i32 0, i32 10, i32 100, i32 1000, i32 10000, i32 100000, i32 1000000, i32 10000000, i32 100000000, i32 1000000000]
define i32 @ilog10(i32 %0) {
%2 = or i32 %0, 1
%3 = tail call i32 @llvm.ctlz.i32(i32 %2, i1 true)
%4 = sub nuw nsw i32 32, %3
%5 = mul nuw nsw i32 %4, 1233
%6 = lshr i32 %5, 12
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds [10 x i32], [10 x i32]* @__const.ilog10.pow10, i64 0, i64 %7
%9 = load i32, i32* %8
%10 = icmp sgt i32 %9, %0
%11 = sext i1 %10 to i32
%12 = add nuw nsw i32 %6, 1
%13 = add nsw i32 %12, %11
ret i32 %13
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
scalar_t__ unknown_uint();
void minus_one_Good() {
  uint64_t x = unknown_uint();
  if (x > 0) {
    uint64_t y = x - 1;
  }
}


x86 assembly (clang, -O0):
<minus_one_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <unknown_uint@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jle    113a <minus_one_Good+0x2a>
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minus_one_Good>:
xor    %eax,%eax
jmp    1030 <unknown_uint@plt>

LLVM IR (-O0):
define void @minus_one_Good() {
%1 = alloca i64
%2 = alloca i64
%3 = call i64 (...) @unknown_uint()
store i64 %3, i64* %1
%4 = load i64, i64* %1
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = load i64, i64* %1
%8 = sub nsw i64 %7, 1
store i64 %8, i64* %2
br label %9
9: ; preds = %6, %0
ret void
}

LLVM IR (-O2):
define void @minus_one_Good() {
%1 = tail call i64 (...) @unknown_uint()
ret void
}