xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ assert(int);
float fClamp(const float value, const float min, const float max) {
  assert(min <= max);
  if (value < min) {
    return min;
  }
  if (value > max) {
    return max;
  }
  return value;
}


x86 assembly (clang, -O0):
<fClamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0xc(%rbp),%xmm1
movss  -0x10(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1163 <fClamp+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    118b <fClamp+0x7b>
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1181 <fClamp+0x71>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    118b <fClamp+0x7b>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fClamp>:
sub    $0x38,%rsp
movaps %xmm2,(%rsp)
movaps %xmm1,0x10(%rsp)
movaps %xmm0,0x20(%rsp)
xor    %edi,%edi
ucomiss %xmm1,%xmm2
setae  %dil
call   1030 <assert@plt>
movaps 0x20(%rsp),%xmm1
movaps (%rsp),%xmm2
minss  %xmm1,%xmm2
movaps 0x10(%rsp),%xmm3
cmpltss %xmm3,%xmm1
movaps %xmm1,%xmm0
andnps %xmm2,%xmm0
andps  %xmm3,%xmm1
orps   %xmm0,%xmm1
movaps %xmm1,%xmm0
add    $0x38,%rsp
ret

LLVM IR (-O0):
define float @fClamp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %6
%9 = load float, float* %7
%10 = fcmp ole float %8, %9
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load float, float* %5
%14 = load float, float* %6
%15 = fcmp olt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %3
%17 = load float, float* %6
store float %17, float* %4
br label %26
18: ; preds = %3
%19 = load float, float* %5
%20 = load float, float* %7
%21 = fcmp ogt float %19, %20
br i1 %21, label %22, label %24
22: ; preds = %18
%23 = load float, float* %7
store float %23, float* %4
br label %26
24: ; preds = %18
%25 = load float, float* %5
store float %25, float* %4
br label %26
26: ; preds = %24, %22, %16
%27 = load float, float* %4
ret float %27
}

LLVM IR (-O2):
define float @fClamp(float %0, float %1, float %2) {
%4 = fcmp ole float %1, %2
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = fcmp olt float %0, %1
%8 = fcmp ogt float %0, %2
%9 = select i1 %8, float %2, float %0
%10 = select i1 %7, float %1, float %9
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ echo(char *);
int /*<<< orphan*/ fuu();
int /*<<< orphan*/ fuu2();
main() {
  fuu2();
  fuu();
  echo("Hello!!!!!! what");
omg:
  echo("yo");
  if (1)
    goto omg;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <fuu2@plt>
mov    $0x0,%al
call   1050 <fuu@plt>
lea    0xeac(%rip),%rdi
call   1030 <echo@plt>
lea    0xeb1(%rip),%rdi
call   1030 <echo@plt>
jmp    1159 <main+0x29>

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <fuu2@plt>
xor    %eax,%eax
call   1050 <fuu@plt>
lea    0xeba(%rip),%rdi
call   1030 <echo@plt>
lea    0xebf(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %rbx,%rdi
call   1030 <echo@plt>
jmp    1160 <main+0x30>

LLVM IR (-O0):
@.str = [17 x i8] c"Hello!!!!!! what\00"
@.str.1 = [3 x i8] c"yo\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fuu2()
%3 = call i32 (...) @fuu()
%4 = call i32 @echo(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %5, %0
%6 = call i32 @echo(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %5
}

LLVM IR (-O2):
@.str = [17 x i8] c"Hello!!!!!! what\00"
@.str.1 = [3 x i8] c"yo\00"
define i32 @main() {
%1 = tail call i32 (...) @fuu2()
%2 = tail call i32 (...) @fuu()
%3 = tail call i32 @echo(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %4
4: ; preds = %4, %0
%5 = tail call i32 @echo(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ force_newline();
int /*<<< orphan*/ newline();
void paragraph(void) {
  newline();
  force_newline();
}


x86 assembly (clang, -O0):
<paragraph>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <newline@plt>
mov    $0x0,%al
call   1040 <force_newline@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<paragraph>:
push   %rax
xor    %eax,%eax
call   1030 <newline@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <force_newline@plt>

LLVM IR (-O0):
define void @paragraph() {
%1 = call i32 (...) @newline()
%2 = call i32 (...) @force_newline()
ret void
}

LLVM IR (-O2):
define void @paragraph() {
%1 = tail call i32 (...) @newline()
%2 = tail call i32 (...) @force_newline()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ acosh(double);
int /*<<< orphan*/ acoshf(float);
int /*<<< orphan*/ acoshl(long double);
void uninitvar_acosh(void) {
  float f;
  (void)acoshf(f);
  double d;
  (void)acosh(d);
  long double ld;
  (void)acoshl(ld);
}


x86 assembly (clang, -O0):
<uninitvar_acosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movss  -0x4(%rbp),%xmm0
call   1040 <acoshf@plt>
movsd  -0x10(%rbp),%xmm0
call   1030 <acosh@plt>
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1050 <acoshl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_acosh>:
sub    $0x18,%rsp
call   1040 <acoshf@plt>
call   1030 <acosh@plt>
call   1050 <acoshl@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @uninitvar_acosh() {
%1 = alloca float
%2 = alloca double
%3 = alloca x86_fp80
%4 = load float, float* %1
%5 = call i32 @acoshf(float %4)
%6 = load double, double* %2
%7 = call i32 @acosh(double %6)
%8 = load x86_fp80, x86_fp80* %3
%9 = call i32 @acoshl(x86_fp80 %8)
ret void
}

LLVM IR (-O2):
define void @uninitvar_acosh() {
%1 = tail call i32 @acoshf(float undef)
%2 = tail call i32 @acosh(double undef)
%3 = tail call i32 @acoshl(x86_fp80 undef)
ret void
}
/* Variables and functions */
void null_array(char *array[], int len) {
  for (int i = 0; i < len; ++i) {
    array[i] = NULL;
  }
}


x86 assembly (clang, -O0):
<null_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <null_array+0x3c>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <null_array+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_array>:
test   %esi,%esi
jle    1126 <null_array+0x16>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @null_array(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
store i8* null, i8** %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @null_array(i8** nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast i8** %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 3
br label %8
8: ; preds = %4, %2
ret void
}
void ff_hevc_put_hevc_bi_pel_pixels24_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_pel_pixels24_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_pel_pixels24_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_pel_pixels24_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_pel_pixels24_8_sse4() {
ret void
}
void gpio_i2c_inactive(int i2c_num) {}


x86 assembly (clang, -O0):
<gpio_i2c_inactive>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_i2c_inactive>:
ret

LLVM IR (-O0):
define void @gpio_i2c_inactive(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gpio_i2c_inactive(i32 %0) {
ret void
}
void mdp4_dsi_video_splash_done(void) {}


x86 assembly (clang, -O0):
<mdp4_dsi_video_splash_done>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_dsi_video_splash_done>:
ret

LLVM IR (-O0):
define void @mdp4_dsi_video_splash_done() {
ret void
}

LLVM IR (-O2):
define void @mdp4_dsi_video_splash_done() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i test_mm_add_epi32(__m128i A, __m128i B) { return _mm_add_epi32(A, B); }


x86 assembly (clang, -O0):
<test_mm_add_epi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_add_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_add_epi32>:
jmp    1030 <_mm_add_epi32@plt>

LLVM IR (-O0):
define i32 @test_mm_add_epi32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_add_epi32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_add_epi32(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_add_epi32(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
int /*<<< orphan*/ towlower(int /*<<< orphan*/);
wint_t __towlower_l(wint_t c, locale_t l) { return towlower(c); }


x86 assembly (clang, -O0):
<__towlower_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <towlower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__towlower_l>:
jmp    1030 <towlower@plt>

LLVM IR (-O0):
define i32 @__towlower_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @towlower(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @__towlower_l(i32 %0, i32 %1) {
%3 = tail call i32 @towlower(i32 %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ rep_nop();
void cpu_relax(void) { rep_nop(); }


x86 assembly (clang, -O0):
<cpu_relax>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rep_nop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_relax>:
xor    %eax,%eax
jmp    1030 <rep_nop@plt>

LLVM IR (-O0):
define void @cpu_relax() {
%1 = call i32 (...) @rep_nop()
ret void
}

LLVM IR (-O2):
define void @cpu_relax() {
%1 = tail call i32 (...) @rep_nop()
ret void
}
void led_on(int led) {
  int current_value;
  current_value = *(unsigned int *)0xf0000028;
  *(unsigned int *)0xf0000028 = current_value | (1 << led);
}


x86 assembly (clang, -O0):
<led_on>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xf0000028,%eax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0xc(%rbp),%ecx
or     %eax,%ecx
mov    $0xf0000028,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_on>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    $0xf0000028,%ecx
or     %eax,(%rcx)
ret

LLVM IR (-O0):
define void @led_on(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* inttoptr (i64 4026531880 to i32*)
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = shl i32 1, %6
%8 = or i32 %5, %7
store i32 %8, i32* inttoptr (i64 4026531880 to i32*)
ret void
}

LLVM IR (-O2):
define void @led_on(i32 %0) {
%2 = load i32, i32* inttoptr (i64 4026531880 to i32*)
%3 = shl nuw i32 1, %0
%4 = or i32 %2, %3
store i32 %4, i32* inttoptr (i64 4026531880 to i32*)
ret void
}
int isdigit(int c) { return c >= '0' && c <= '9'; }


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isdigit+0x20>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int get_exp(float);
int is_special(float f) {
  if (get_exp(f) == 0x7F800000) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_special>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <get_exp@plt>
cmp    $0x7f800000,%eax
jne    113e <is_special+0x2e>
movl   $0x1,-0x4(%rbp)
jmp    1145 <is_special+0x35>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_special>:
push   %rax
call   1030 <get_exp@plt>
xor    %ecx,%ecx
cmp    $0x7f800000,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_special(float %0) {
%2 = alloca i32
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = call i32 @get_exp(float %4)
%6 = icmp eq i32 %5, 2139095040
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_special(float %0) {
%2 = tail call i32 @get_exp(float %0)
%3 = icmp eq i32 %2, 2139095040
%4 = zext i1 %3 to i32
ret i32 %4
}
struct param_d *get_param_by_name(struct device_d *dev, const char *name) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<get_param_by_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_param_by_name>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.param_d = type opaque
%struct.device_d = type opaque
define %struct.param_d* @get_param_by_name(%struct.device_d* %0, i8* %1) {
%3 = alloca %struct.device_d*
%4 = alloca i8*
store %struct.device_d* %0, %struct.device_d** %3
store i8* %1, i8** %4
ret %struct.param_d* null
}

LLVM IR (-O2):
%struct.param_d = type opaque
%struct.device_d = type opaque
define noalias %struct.param_d* @get_param_by_name(%struct.device_d* nocapture readnone %0, i8* nocapture readnone %1) {
ret %struct.param_d* null
}
/* Variables and functions */
int O_CREAT;
int O_RDWR;
int /*<<< orphan*/ abort();
int /*<<< orphan*/ perror(char *);
int shm_open(char *, int, int);
int fd_nofile(void) {
  int shmid;
  if ((shmid = shm_open("myallocator", O_RDWR | O_CREAT, 0666)) < 0) {
    perror("shm_open");
    abort();
  }
  return shmid;
}


x86 assembly (clang, -O0):
<fd_nofile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
mov    0x2eb0(%rip),%rax
or     (%rax),%esi
lea    0xeaf(%rip),%rdi
mov    $0x1b6,%edx
call   1050 <shm_open@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    117a <fd_nofile+0x4a>
lea    0xe9e(%rip),%rdi
call   1040 <perror@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_nofile>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    0x2eb9(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xeb6(%rip),%rdi
mov    $0x1b6,%edx
call   1050 <shm_open@plt>
test   %eax,%eax
js     115a <fd_nofile+0x2a>
pop    %rcx
ret
lea    0xeab(%rip),%rdi
call   1040 <perror@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"myallocator\00"
@O_RDWR = global i32 0
@O_CREAT = global i32 0
@.str.1 = [9 x i8] c"shm_open\00"
define i32 @fd_nofile() {
%1 = alloca i32
%2 = load i32, i32* @O_RDWR
%3 = load i32, i32* @O_CREAT
%4 = or i32 %2, %3
%5 = call i32 @shm_open(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4, i32 438)
store i32 %5, i32* %1
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [12 x i8] c"myallocator\00"
@O_RDWR = global i32 0
@O_CREAT = global i32 0
@.str.1 = [9 x i8] c"shm_open\00"
define i32 @fd_nofile() {
%1 = load i32, i32* @O_RDWR
%2 = load i32, i32* @O_CREAT
%3 = or i32 %2, %1
%4 = tail call i32 @shm_open(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3, i32 438)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = tail call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%8 = tail call i32 (...) @abort()
unreachable
9: ; preds = %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void time_cb(int fd, short event, void *argc) { printf("timer wakeup \n"); }


x86 assembly (clang, -O0):
<time_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    %rdx,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_cb>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"timer wakeup \0A\00"
define void @time_cb(i32 %0, i16 signext %1, i8* %2) {
%4 = alloca i32
%5 = alloca i16
%6 = alloca i8*
store i32 %0, i32* %4
store i16 %1, i16* %5
store i8* %2, i8** %6
%7 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"timer wakeup \00"
define void @time_cb(i32 %0, i16 signext %1, i8* nocapture readnone %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
void ar_mslot_send(int my_cid, int dst_bid, int dst_cid, unsigned int msg) {}


x86 assembly (clang, -O0):
<ar_mslot_send>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar_mslot_send>:
ret

LLVM IR (-O0):
define void @ar_mslot_send(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @ar_mslot_send(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
void scaleVector(double *v, double s) {
  v[0] *= s;
  v[1] *= s;
  v[2] *= s;
}


x86 assembly (clang, -O0):
<scaleVector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulsd  (%rax),%xmm0
movsd  %xmm0,(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
movsd  %xmm0,0x8(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x10(%rax),%xmm0
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scaleVector>:
movupd (%rdi),%xmm1
movapd %xmm0,%xmm2
unpcklpd %xmm0,%xmm2
mulpd  %xmm1,%xmm2
movupd %xmm2,(%rdi)
mulsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @scaleVector(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double*, double** %3
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = fmul double %8, %5
store double %9, double* %7
%10 = load double, double* %4
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = fmul double %13, %10
store double %14, double* %12
%15 = load double, double* %4
%16 = load double*, double** %3
%17 = getelementptr inbounds double, double* %16, i64 2
%18 = load double, double* %17
%19 = fmul double %18, %15
store double %19, double* %17
ret void
}

LLVM IR (-O2):
define void @scaleVector(double* nocapture %0, double %1) {
%3 = bitcast double* %0 to <2 x double>*
%4 = load <2 x double>, <2 x double>* %3
%5 = insertelement <2 x double> poison, double %1, i64 0
%6 = shufflevector <2 x double> %5, <2 x double> poison, <2 x i32> zeroinitializer
%7 = fmul <2 x double> %4, %6
%8 = bitcast double* %0 to <2 x double>*
store <2 x double> %7, <2 x double>* %8
%9 = getelementptr inbounds double, double* %0, i64 2
%10 = load double, double* %9
%11 = fmul double %10, %1
store double %11, double* %9
ret void
}
/* Variables and functions */
int omp_get_num_threads();
int omp_get_thread_num();
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int th_id, nthreads;
#pragma omp parallel private(th_id)
  {
    th_id = omp_get_thread_num();
    printf("Hello World from thread %d\n", th_id);
#pragma omp barrier
    if (th_id == 0) {
      nthreads = omp_get_num_threads();
      printf("There are %d threads\n", nthreads);
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xea6(%rip),%rdi
call   1040 <printf@plt>
cmpl   $0x0,-0x14(%rbp)
jne    1182 <main+0x52>
mov    $0x0,%al
call   1050 <omp_get_num_threads@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
mov    %eax,%ebx
lea    0xebf(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
test   %ebx,%ebx
jne    1161 <main+0x31>
xor    %eax,%eax
call   1050 <omp_get_num_threads@plt>
lea    0xec2(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Hello World from thread %d\0A\00"
@.str.1 = [22 x i8] c"There are %d threads\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 (...) @omp_get_thread_num()
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = call i32 (...) @omp_get_num_threads()
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %13, %2
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"Hello World from thread %d\0A\00"
@.str.1 = [22 x i8] c"There are %d threads\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @omp_get_thread_num()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = icmp eq i32 %3, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 (...) @omp_get_num_threads()
%8 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ con_printf(char *);
void internal_print_hline(int size) {
  int i;
  con_printf("  +");
  for (i = 0; i < size; i++) {
    con_printf("----");
  }
  con_printf("+\n");
}


x86 assembly (clang, -O0):
<internal_print_hline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <con_printf@plt>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1154 <internal_print_hline+0x44>
lea    0xec3(%rip),%rdi
call   1030 <con_printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <internal_print_hline+0x1e>
lea    0xeae(%rip),%rdi
call   1030 <con_printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_print_hline>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0xee3(%rip),%rdi
call   1030 <con_printf@plt>
test   %ebx,%ebx
jle    113d <internal_print_hline+0x2d>
lea    0xed7(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
call   1030 <con_printf@plt>
add    $0xffffffff,%ebx
jne    1130 <internal_print_hline+0x20>
lea    0xec5(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <con_printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" +\00"
@.str.1 = [5 x i8] c"----\00"
@.str.2 = [3 x i8] c"+\0A\00"
define void @internal_print_hline(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @con_printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = call i32 @con_printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %5
14: ; preds = %5
%15 = call i32 @con_printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" +\00"
@.str.1 = [5 x i8] c"----\00"
@.str.2 = [3 x i8] c"+\0A\00"
define void @internal_print_hline(i32 %0) {
%2 = tail call i32 @con_printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %9
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 @con_printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %4
9: ; preds = %4, %1
%10 = tail call i32 @con_printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int spider_net_get_stats_count(struct net_device *netdev) { return 13; }


x86 assembly (clang, -O0):
<spider_net_get_stats_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xd,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spider_net_get_stats_count>:
mov    $0xd,%eax
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define i32 @spider_net_get_stats_count(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret i32 13
}

LLVM IR (-O2):
%struct.net_device = type opaque
define i32 @spider_net_get_stats_count(%struct.net_device* nocapture readnone %0) {
ret i32 13
}
/* Variables and functions */
int /*<<< orphan*/ RAM_ROM_Finish();
void RAM_ROM_DeInstall(void) { RAM_ROM_Finish(); }


x86 assembly (clang, -O0):
<RAM_ROM_DeInstall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <RAM_ROM_Finish@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAM_ROM_DeInstall>:
xor    %eax,%eax
jmp    1030 <RAM_ROM_Finish@plt>

LLVM IR (-O0):
define void @RAM_ROM_DeInstall() {
%1 = call i32 (...) @RAM_ROM_Finish()
ret void
}

LLVM IR (-O2):
define void @RAM_ROM_DeInstall() {
%1 = tail call i32 (...) @RAM_ROM_Finish()
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int modified;
  scalar_t__ len;
  int /*<<< orphan*/ *enc;
};
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ITEM;
typedef TYPE_1__ ASN1_ENCODING;

/* Variables and functions */
TYPE_1__ *asn1_get_enc_ptr(int /*<<< orphan*/ **, int /*<<< orphan*/ const *);
void asn1_enc_init(ASN1_VALUE **pval, const ASN1_ITEM *it) {
  ASN1_ENCODING *enc;
  enc = asn1_get_enc_ptr(pval, it);
  if (enc) {
    enc->enc = NULL;
    enc->len = 0;
    enc->modified = 1;
  }
}


x86 assembly (clang, -O0):
<asn1_enc_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <asn1_get_enc_ptr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115e <asn1_enc_init+0x4e>
mov    -0x18(%rbp),%rax
movq   $0x0,0x10(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x8(%rax)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asn1_enc_init>:
push   %rax
call   1030 <asn1_get_enc_ptr@plt>
test   %rax,%rax
je     1128 <asn1_enc_init+0x18>
xorps  %xmm0,%xmm0
movups %xmm0,0x8(%rax)
movl   $0x1,(%rax)
pop    %rax
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i64, i32* }
define void @asn1_enc_init(i32** %0, i32* %1) {
%3 = alloca i32**
%4 = alloca i32*
%5 = alloca %struct.TYPE_3__*
store i32** %0, i32*** %3
store i32* %1, i32** %4
%6 = load i32**, i32*** %3
%7 = load i32*, i32** %4
%8 = call %struct.TYPE_3__* @asn1_get_enc_ptr(i32** %6, i32* %7)
store %struct.TYPE_3__* %8, %struct.TYPE_3__** %5
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%10 = icmp ne %struct.TYPE_3__* %9, null
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%13 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %12, i32 0, i32 2
store i32* null, i32** %13
%14 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%15 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %14, i32 0, i32 1
store i64 0, i64* %15
%16 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%17 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %16, i32 0, i32 0
store i32 1, i32* %17
br label %18
18: ; preds = %11, %2
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32, i64, i32* }
define void @asn1_enc_init(i32** %0, i32* %1) {
%3 = tail call %struct.TYPE_3__* @asn1_get_enc_ptr(i32** %0, i32* %1)
%4 = icmp eq %struct.TYPE_3__* %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i64 0, i32 1
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i64 0, i32 0
%8 = bitcast i64* %6 to i8*
store i32 1, i32* %7
br label %9
9: ; preds = %5, %2
ret void
}
int test_imm_B1int8_mem(signed char *val) {
  return ((*val) & (-0xB1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B1int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff4f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B1int8_mem>:
movsbl (%rdi),%eax
test   $0xffffff4f,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B1int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -177
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B1int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -177
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
/* Variables and functions */
int main(void) { return 0; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void testfunc2() {
  long long i;
  i = 0x80000000;
  i = 0xFFFFFFFF;
  i = 037777777777;
  i = 0x8000000000000000;
  i = 0xFFFFFFFFFFFFFFFF;
  i = 01777777777777777777777;
  i = 9223372036854775807;
  i = 18446744073709551615;
}


x86 assembly (clang, -O0):
<testfunc2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000000,%eax
mov    %rax,-0x8(%rbp)
mov    $0xffffffff,%eax
mov    %rax,-0x8(%rbp)
mov    $0xffffffff,%eax
mov    %rax,-0x8(%rbp)
movabs $0x8000000000000000,%rax
mov    %rax,-0x8(%rbp)
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
movabs $0x7fffffffffffffff,%rax
ff ff 7f
mov    %rax,-0x8(%rbp)
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
pop    %rbp
ret

x86 assembly (clang, -O2):
<testfunc2>:
ret

LLVM IR (-O0):
define void @testfunc2() {
%1 = alloca i64
store i64 2147483648, i64* %1
store i64 4294967295, i64* %1
store i64 4294967295, i64* %1
store i64 -9223372036854775808, i64* %1
store i64 -1, i64* %1
store i64 -1, i64* %1
store i64 9223372036854775807, i64* %1
store i64 -1, i64* %1
ret void
}

LLVM IR (-O2):
define void @testfunc2() {
ret void
}
unsigned int next_pow_2(unsigned int x) {
  if (x <= 1)
    return 1;
  int power = 2;
  x--;
  while (x >>= 1)
    power <<= 1;
  return power;
}


x86 assembly (clang, -O0):
<next_pow_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
ja     111d <next_pow_2+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1153 <next_pow_2+0x53>
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     114d <next_pow_2+0x4d>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <next_pow_2+0x2d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_pow_2>:
mov    $0x1,%eax
cmp    $0x2,%edi
jb     112b <next_pow_2+0x2b>
add    $0xffffffff,%edi
mov    $0x2,%eax
cmp    $0x2,%edi
jb     112b <next_pow_2+0x2b>
mov    $0x2,%eax
mov    %edi,%ecx
xchg   %ax,%ax
shr    %ecx
add    %eax,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1120 <next_pow_2+0x20>
ret

LLVM IR (-O0):
define i32 @next_pow_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp ule i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %20
8: ; preds = %1
store i32 2, i32* %4
%9 = load i32, i32* %3
%10 = add i32 %9, -1
store i32 %10, i32* %3
br label %11
11: ; preds = %15, %8
%12 = load i32, i32* %3
%13 = lshr i32 %12, 1
store i32 %13, i32* %3
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %4
%17 = shl i32 %16, 1
store i32 %17, i32* %4
br label %11
18: ; preds = %11
%19 = load i32, i32* %4
store i32 %19, i32* %2
br label %20
20: ; preds = %18, %7
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @next_pow_2(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = icmp ult i32 %4, 2
br i1 %5, label %12, label %6
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ 2, %3 ]
%8 = phi i32 [ %9, %6 ], [ %4, %3 ]
%9 = lshr i32 %8, 1
%10 = shl i32 %7, 1
%11 = icmp ult i32 %8, 4
br i1 %11, label %12, label %6
12: ; preds = %6, %3, %1
%13 = phi i32 [ 1, %1 ], [ 2, %3 ], [ %10, %6 ]
ret i32 %13
}
double asinh(double x) { return 4; }


x86 assembly (clang, -O0):
<asinh>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<asinh>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @asinh(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 4.000000e+00
}

LLVM IR (-O2):
define double @asinh(double %0) {
ret double 4.000000e+00
}
/* Variables and functions */
scalar_t__ KIONIX_ACCEL_read_bytes(int, char *, int);
int /*<<< orphan*/ KIONIX_ACCEL_write_byte(int, char);
int KIONIX_ACCEL_position_mask_fd(void) {
  char ctrl_reg2 = 0;
  int status = 0;
  if (KIONIX_ACCEL_read_bytes(0x1C, &ctrl_reg2, 1) == 0) {
    ctrl_reg2 |= 0x02;
    KIONIX_ACCEL_write_byte(0x1C, ctrl_reg2);
  } else
    status = 1;
  return status;
}


x86 assembly (clang, -O0):
<KIONIX_ACCEL_position_mask_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x1c,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <KIONIX_ACCEL_read_bytes@plt>
cmp    $0x0,%rax
jne    116d <KIONIX_ACCEL_position_mask_fd+0x4d>
movsbl -0x1(%rbp),%eax
or     $0x2,%eax
mov    %al,-0x1(%rbp)
mov    $0x1c,%edi
movsbl -0x1(%rbp),%esi
call   1040 <KIONIX_ACCEL_write_byte@plt>
jmp    1174 <KIONIX_ACCEL_position_mask_fd+0x54>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KIONIX_ACCEL_position_mask_fd>:
push   %rbx
sub    $0x10,%rsp
movb   $0x0,0xf(%rsp)
lea    0xf(%rsp),%rsi
mov    $0x1,%ebx
mov    $0x1c,%edi
mov    $0x1,%edx
call   1030 <KIONIX_ACCEL_read_bytes@plt>
test   %rax,%rax
jne    1161 <KIONIX_ACCEL_position_mask_fd+0x41>
movsbl 0xf(%rsp),%esi
or     $0x2,%esi
mov    %sil,0xf(%rsp)
mov    $0x1c,%edi
call   1040 <KIONIX_ACCEL_write_byte@plt>
xor    %ebx,%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @KIONIX_ACCEL_position_mask_fd() {
%1 = alloca i8
%2 = alloca i32
store i8 0, i8* %1
store i32 0, i32* %2
%3 = call i64 @KIONIX_ACCEL_read_bytes(i32 28, i8* %1, i32 1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %0
%6 = load i8, i8* %1
%7 = sext i8 %6 to i32
%8 = or i32 %7, 2
%9 = trunc i32 %8 to i8
store i8 %9, i8* %1
%10 = load i8, i8* %1
%11 = call i32 @KIONIX_ACCEL_write_byte(i32 28, i8 signext %10)
br label %13
12: ; preds = %0
store i32 1, i32* %2
br label %13
13: ; preds = %12, %5
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @KIONIX_ACCEL_position_mask_fd() {
%1 = alloca i8
store i8 0, i8* %1
%2 = call i64 @KIONIX_ACCEL_read_bytes(i32 28, i8* %1, i32 1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = load i8, i8* %1
%6 = or i8 %5, 2
store i8 %6, i8* %1
%7 = call i32 @KIONIX_ACCEL_write_byte(i32 28, i8 signext %6)
br label %8
8: ; preds = %0, %4
%9 = phi i32 [ 0, %4 ], [ 1, %0 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void fftw_ifree(void *p) { free(p); }


x86 assembly (clang, -O0):
<fftw_ifree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fftw_ifree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @fftw_ifree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @fftw_ifree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void quark_topology_finalize() {}


x86 assembly (clang, -O0):
<quark_topology_finalize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quark_topology_finalize>:
ret

LLVM IR (-O0):
define void @quark_topology_finalize() {
ret void
}

LLVM IR (-O2):
define void @quark_topology_finalize() {
ret void
}
__attribute__((always_)) void disable_acpi(void) {}


x86 assembly (clang, -O0):
<disable_acpi>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_acpi>:
ret

LLVM IR (-O0):
define void @disable_acpi() {
ret void
}

LLVM IR (-O2):
define void @disable_acpi() {
ret void
}
void MixedCaseFunc(void) {}


x86 assembly (clang, -O0):
<MixedCaseFunc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MixedCaseFunc>:
ret

LLVM IR (-O0):
define void @MixedCaseFunc() {
ret void
}

LLVM IR (-O2):
define void @MixedCaseFunc() {
ret void
}
void printMonster(char *name) {
  if (!name) {
    logError("Name expected in call; received NULL", __func__);
  } else {
    printf("There is a %s here. ", name);
  }
}


x86 assembly (clang, -O0):
<printMonster>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1151 <printMonster+0x31>
lea    0xec2(%rip),%rdi
lea    0xee0(%rip),%rsi
mov    $0x0,%al
call   1040 <logError@plt>
jmp    1163 <printMonster+0x43>
mov    -0x8(%rbp),%rsi
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printMonster>:
test   %rdi,%rdi
je     1136 <printMonster+0x16>
mov    %rdi,%rsi
lea    0xf03(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>
lea    0xec3(%rip),%rdi
lea    0xee1(%rip),%rsi
xor    %eax,%eax
jmp    1040 <logError@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Name expected in call; received NULL\00"
@__func__.printMonster = [13 x i8] c"printMonster\00"
@.str.1 = [21 x i8] c"There is a %s here. \00"
define void @printMonster(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @logError to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__func__.printMonster, i64 0, i64 0))
br label %10
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* %8)
br label %10
10: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"Name expected in call; received NULL\00"
@__func__.printMonster = [13 x i8] c"printMonster\00"
@.str.1 = [21 x i8] c"There is a %s here. \00"
define void @printMonster(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @logError to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__func__.printMonster, i64 0, i64 0))
br label %7
5: ; preds = %1
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* %0)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
scalar_t__ isnan(double);
__attribute__((__visibility__("hidden"))) double __math_invalid(double x) {
  double y = (x - x) / (x - x);
  return isnan(x) ? y : (y);
}


x86 assembly (clang, -O0):
<__math_invalid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
subsd  -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
je     115d <__math_invalid+0x4d>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1167 <__math_invalid+0x57>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__math_invalid>:
push   %rax
movapd %xmm0,%xmm1
subsd  %xmm0,%xmm1
divsd  %xmm1,%xmm1
movsd  %xmm1,(%rsp)
call   1030 <isnan@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define hidden double @__math_invalid(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fsub double %4, %5
%7 = load double, double* %2
%8 = load double, double* %2
%9 = fsub double %7, %8
%10 = fdiv double %6, %9
store double %10, double* %3
%11 = load double, double* %2
%12 = call i64 @isnan(double %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = load double, double* %3
br label %18
16: ; preds = %1
%17 = load double, double* %3
br label %18
18: ; preds = %16, %14
%19 = phi double [ %15, %14 ], [ %17, %16 ]
ret double %19
}

LLVM IR (-O2):
define hidden double @__math_invalid(double %0) {
%2 = fsub double %0, %0
%3 = fdiv double %2, %2
%4 = tail call i64 @isnan(double %0)
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p521_opp(uintptr_t, uintptr_t);
void fiat_p521_opp(uint64_t out1[9], const uint64_t arg1[9]) {
  internal_fiat_p521_opp((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p521_opp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_p521_opp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p521_opp>:
jmp    1030 <internal_fiat_p521_opp@plt>

LLVM IR (-O0):
define void @fiat_p521_opp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_p521_opp(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_p521_opp(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_p521_opp(i64 %3, i64 %4)
ret void
}
double dphiarea(const double x) { return (x - 1.0); }


x86 assembly (clang, -O0):
<dphiarea>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dphiarea>:
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @dphiarea(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 1.000000e+00
ret double %4
}

LLVM IR (-O2):
define double @dphiarea(double %0) {
%2 = fadd double %0, -1.000000e+00
ret double %2
}
int has_feat_arch_restart(void) { return 0; }


x86 assembly (clang, -O0):
<has_feat_arch_restart>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_feat_arch_restart>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @has_feat_arch_restart() {
ret i32 0
}

LLVM IR (-O2):
define i32 @has_feat_arch_restart() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
void swap_int8(void *a, void *b) {
  do {
    int8_t temp = *(int8_t *)a;
    *(int8_t *)a = *(int8_t *)b;
    *(int8_t *)b = temp;
  } while (0);
}


x86 assembly (clang, -O0):
<swap_int8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_int8>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap_int8(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %2
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
%13 = load i8*, i8** %3
%14 = bitcast i8* %13 to i32*
store i32 %12, i32* %14
%15 = load i32, i32* %5
%16 = load i8*, i8** %4
%17 = bitcast i8* %16 to i32*
store i32 %15, i32* %17
br label %18
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @swap_int8(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
store i32 %4, i32* %5
ret void
}