#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ SysCtlDelay(int);
void SysCtlXPllClockDividerSet(unsigned long XPllClkDivReq) {
  unsigned long ulMWRAllow;
  unsigned long cur_xpll_val = 0x0;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  cur_xpll_val =
      (((*((volatile unsigned long *)(0x400FB850))) & (0x00030000 >> 16))
       << 16);
  while ((XPllClkDivReq & 0x00030000) != cur_xpll_val) {
    if (cur_xpll_val == 0x00030000) {
      (*((volatile unsigned long *)(0x400FB850))) =
          ((0x00020000) >> 16) |
          ((*((volatile unsigned long *)(0x400FB850))) & ~(0x00030000 >> 16));
      cur_xpll_val = 0x00020000;
      if ((XPllClkDivReq & 0x00030000) != cur_xpll_val)
        SysCtlDelay(15);
    } else {
      (*((volatile unsigned long *)(0x400FB850))) =
          ((XPllClkDivReq & 0x00030000) >> 16) |
          ((*((volatile unsigned long *)(0x400FB850))) & ~(0x00030000 >> 16));
      cur_xpll_val =
          (((*((volatile unsigned long *)(0x400FB850))) & (0x00030000 >> 16))
           << 16);
    }
  }
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
}


x86 assembly (clang, -O0):
<SysCtlXPllClockDividerSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x18(%rbp)
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    $0x400fb850,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x10,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
and    $0x30000,%rax
cmp    -0x18(%rbp),%rax
je     11f5 <SysCtlXPllClockDividerSet+0xe5>
cmpq   $0x30000,-0x18(%rbp)
jne    11b6 <SysCtlXPllClockDividerSet+0xa6>
mov    $0x400fb850,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffc,%rcx
or     $0x2,%rcx
mov    $0x400fb850,%eax
mov    %rcx,(%rax)
movq   $0x20000,-0x18(%rbp)
mov    -0x8(%rbp),%rax
and    $0x30000,%rax
cmp    -0x18(%rbp),%rax
je     11b1 <SysCtlXPllClockDividerSet+0xa1>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
jmp    11f0 <SysCtlXPllClockDividerSet+0xe0>
mov    -0x8(%rbp),%rcx
and    $0x30000,%rcx
shr    $0x10,%rcx
mov    $0x400fb850,%eax
mov    (%rax),%rax
and    $0xfffffffffffffffc,%rax
or     %rax,%rcx
mov    $0x400fb850,%eax
mov    %rcx,(%rax)
mov    $0x400fb850,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x10,%rax
mov    %rax,-0x18(%rbp)
jmp    1151 <SysCtlXPllClockDividerSet+0x41>
mov    -0x10(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlXPllClockDividerSet>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    0x400fb980,%r14
40
mov    $0xa5a5a5a5,%eax
mov    %rax,0x400fb980
40
mov    0x400fb850,%rax
40
and    $0x3,%eax
shl    $0x10,%rax
and    $0x30000,%ebx
cmp    %rax,%rbx
je     11ab <SysCtlXPllClockDividerSet+0x9b>
mov    %rbx,%r15
shr    $0x10,%r15
jmp    116f <SysCtlXPllClockDividerSet+0x5f>
or     %r15,%rcx
mov    %rcx,0x400fb850
40
mov    0x400fb850,%rax
40
and    $0x3,%eax
shl    $0x10,%rax
cmp    %rax,%rbx
je     11ab <SysCtlXPllClockDividerSet+0x9b>
mov    0x400fb850,%rcx
40
and    $0xfffffffffffffffc,%rcx
cmp    $0x30000,%rax
jne    1150 <SysCtlXPllClockDividerSet+0x40>
or     $0x2,%rcx
mov    %rcx,0x400fb850
40
cmp    $0x20000,%ebx
je     11ab <SysCtlXPllClockDividerSet+0x9b>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
mov    $0x20000,%eax
cmp    %rax,%rbx
jne    116f <SysCtlXPllClockDividerSet+0x5f>
mov    %r14,0x400fb980
40
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @SysCtlXPllClockDividerSet(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %4
%5 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %5, i64* %3
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%6 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%7 = and i64 %6, 3
%8 = shl i64 %7, 16
store i64 %8, i64* %4
br label %9
9: ; preds = %38, %1
%10 = load i64, i64* %2
%11 = and i64 %10, 196608
%12 = load i64, i64* %4
%13 = icmp ne i64 %11, %12
br i1 %13, label %14, label %39
14: ; preds = %9
%15 = load i64, i64* %4
%16 = icmp eq i64 %15, 196608
br i1 %16, label %17, label %28
17: ; preds = %14
%18 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%19 = and i64 %18, -4
%20 = or i64 2, %19
store volatile i64 %20, i64* inttoptr (i64 1074772048 to i64*)
store i64 131072, i64* %4
%21 = load i64, i64* %2
%22 = and i64 %21, 196608
%23 = load i64, i64* %4
%24 = icmp ne i64 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %17
%26 = call i32 @SysCtlDelay(i32 15)
br label %27
27: ; preds = %25, %17
br label %38
28: ; preds = %14
%29 = load i64, i64* %2
%30 = and i64 %29, 196608
%31 = lshr i64 %30, 16
%32 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%33 = and i64 %32, -4
%34 = or i64 %31, %33
store volatile i64 %34, i64* inttoptr (i64 1074772048 to i64*)
%35 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%36 = and i64 %35, 3
%37 = shl i64 %36, 16
store i64 %37, i64* %4
br label %38
38: ; preds = %28, %27
br label %9
39: ; preds = %9
%40 = load i64, i64* %3
store volatile i64 %40, i64* inttoptr (i64 1074772352 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlXPllClockDividerSet(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%4 = shl i64 %3, 16
%5 = and i64 %4, 196608
%6 = and i64 %0, 196608
%7 = icmp eq i64 %6, %5
br i1 %7, label %28, label %8
8: ; preds = %1
%9 = lshr exact i64 %6, 16
%10 = icmp eq i64 %6, 131072
br label %11
11: ; preds = %8, %25
%12 = phi i64 [ %5, %8 ], [ %26, %25 ]
%13 = icmp eq i64 %12, 196608
%14 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%15 = and i64 %14, -4
br i1 %13, label %16, label %20
16: ; preds = %11
%17 = or i64 %15, 2
store volatile i64 %17, i64* inttoptr (i64 1074772048 to i64*)
br i1 %10, label %28, label %18
18: ; preds = %16
%19 = tail call i32 @SysCtlDelay(i32 15)
br label %25
20: ; preds = %11
%21 = or i64 %15, %9
store volatile i64 %21, i64* inttoptr (i64 1074772048 to i64*)
%22 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%23 = shl i64 %22, 16
%24 = and i64 %23, 196608
br label %25
25: ; preds = %18, %20
%26 = phi i64 [ 131072, %18 ], [ %24, %20 ]
%27 = icmp eq i64 %6, %26
br i1 %27, label %28, label %11
28: ; preds = %16, %25, %1
store volatile i64 %2, i64* inttoptr (i64 1074772352 to i64*)
ret void
}