xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ memcmp(int *, int *, size_t);
bool is_equal(int *list_to_compare, int *base_list,
              size_t list_to_compare_element_count,
              size_t base_list_element_count) {
  return (list_to_compare_element_count == base_list_element_count &&
          !memcmp(list_to_compare, base_list,
                  list_to_compare_element_count * sizeof(int)));
}


x86 assembly (clang, -O0):
<is_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
cmp    -0x20(%rbp),%rcx
mov    %al,-0x21(%rbp)
jne    115b <is_equal+0x4b>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
shl    $0x2,%rdx
call   1030 <memcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_equal>:
xor    %eax,%eax
cmp    %rcx,%rdx
jne    112e <is_equal+0x1e>
push   %rax
shl    $0x2,%rdx
call   1030 <bcmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @is_equal(i32* %0, i32* %1, i64 %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i64
store i32* %0, i32** %5
store i32* %1, i32** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = load i64, i64* %8
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %20
12: ; preds = %4
%13 = load i32*, i32** %5
%14 = load i32*, i32** %6
%15 = load i64, i64* %7
%16 = mul i64 %15, 4
%17 = call i32 @memcmp(i32* %13, i32* %14, i64 %16)
%18 = icmp ne i32 %17, 0
%19 = xor i1 %18, true
br label %20
20: ; preds = %12, %4
%21 = phi i1 [ false, %4 ], [ %19, %12 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_equal(i32* nocapture %0, i32* nocapture %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %2, %3
br i1 %5, label %6, label %13
6: ; preds = %4
%7 = shl i64 %2, 2
%8 = bitcast i32* %0 to i8*
%9 = bitcast i32* %1 to i8*
%10 = tail call i32 @bcmp(i8* %8, i8* %9, i64 %7)
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %6, %4
%14 = phi i32 [ 0, %4 ], [ %12, %6 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ itoa(int, char *, size_t);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  char str[64];
  signed i = ((unsigned)(~0) ^ ((unsigned)(~0) >> 1));
  size_t j;
  for (j = 0; j < 30; ++j) {
    itoa(i, str, j);
    printf("%s\n", str);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x80000000,-0x54(%rbp)
movq   $0x0,-0x60(%rbp)
cmpq   $0x1e,-0x60(%rbp)
jae    1181 <main+0x61>
mov    -0x54(%rbp),%edi
lea    -0x50(%rbp),%rsi
mov    -0x60(%rbp),%rdx
call   1040 <itoa@plt>
lea    -0x50(%rbp),%rsi
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
mov    -0x60(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x60(%rbp)
jmp    1145 <main+0x25>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x40,%rsp
xor    %ebx,%ebx
mov    %rsp,%r14
lea    0xecb(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
nop
mov    $0x80000000,%edi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1040 <itoa@plt>
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    $0x1e,%rbx
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [64 x i8]
%7 = alloca i32
%8 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 -2147483648, i32* %7
store i64 0, i64* %8
br label %9
9: ; preds = %19, %2
%10 = load i64, i64* %8
%11 = icmp ult i64 %10, 30
br i1 %11, label %12, label %22
12: ; preds = %9
%13 = load i32, i32* %7
%14 = getelementptr inbounds [64 x i8], [64 x i8]* %6, i64 0, i64 0
%15 = load i64, i64* %8
%16 = call i32 @itoa(i32 %13, i8* %14, i64 %15)
%17 = getelementptr inbounds [64 x i8], [64 x i8]* %6, i64 0, i64 0
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %17)
br label %19
19: ; preds = %12
%20 = load i64, i64* %8
%21 = add i64 %20, 1
store i64 %21, i64* %8
br label %9
22: ; preds = %9
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [64 x i8]
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
br label %5
5: ; preds = %2, %5
%6 = phi i64 [ 0, %2 ], [ %9, %5 ]
%7 = call i32 @itoa(i32 -2147483648, i8* %4, i64 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%9 = add nuw nsw i64 %6, 1
%10 = icmp eq i64 %9, 30
br i1 %10, label %11, label %5
11: ; preds = %5
ret i32 0
}
double r_net_day(double bbalb, double solar, double tsw) {
  return (((1.0 - bbalb) * solar) - (110.0 * tsw));
}


x86 assembly (clang, -O0):
<r_net_day>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xeed(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xed3(%rip),%xmm1
mulsd  -0x18(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<r_net_day>:
movsd  0xef8(%rip),%xmm3
subsd  %xmm0,%xmm3
mulsd  0xef4(%rip),%xmm2
mulsd  %xmm1,%xmm3
addsd  %xmm2,%xmm3
movapd %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @r_net_day(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fsub double 1.000000e+00, %7
%9 = load double, double* %5
%10 = load double, double* %6
%11 = fmul double 1.100000e+02, %10
%12 = fneg double %11
%13 = call double @llvm.fmuladd.f64(double %8, double %9, double %12)
ret double %13
}

LLVM IR (-O2):
define double @r_net_day(double %0, double %1, double %2) {
%4 = fsub double 1.000000e+00, %0
%5 = fmul double %2, -1.100000e+02
%6 = tail call double @llvm.fmuladd.f64(double %4, double %1, double %5)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void handler(int s) { printf("recv sig %d\n", s); }


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"recv sig %d\0A\00"
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"recv sig %d\0A\00"
define void @handler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ fork();
int64_t standard_forker(void *ignored) { return (int64_t)fork(); }


x86 assembly (clang, -O0):
<standard_forker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <fork@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<standard_forker>:
xor    %eax,%eax
jmp    1030 <fork@plt>

LLVM IR (-O0):
define i32 @standard_forker(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @fork()
ret i32 %3
}

LLVM IR (-O2):
define i32 @standard_forker(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @fork()
ret i32 %2
}
int is_le(void) {
  unsigned int x;
  x = 1;
  return ((int)(((char *)&x)[0]));
}


x86 assembly (clang, -O0):
<is_le>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
movsbl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_le>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_le() {
%1 = alloca i32
store i32 1, i32* %1
%2 = bitcast i32* %1 to i8*
%3 = getelementptr inbounds i8, i8* %2, i64 0
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_le() {
ret i32 1
}
unsigned char f80(unsigned char x, unsigned long int y) {
  return (x << y) + (x >> (8 * sizeof(unsigned char) - y));
}


x86 assembly (clang, -O0):
<f80>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f80>:
mov    %rsi,%rcx
mov    %edi,%eax
shl    %cl,%eax
mov    $0x8,%dl
sub    %cl,%dl
mov    %edx,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f80(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %6, %8
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = load i64, i64* %4
%13 = sub i64 8, %12
%14 = trunc i64 %13 to i32
%15 = ashr i32 %11, %14
%16 = add nsw i32 %9, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f80(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = shl i32 %3, %4
%6 = sub i32 8, %4
%7 = lshr i32 %3, %6
%8 = add nsw i32 %7, %5
%9 = trunc i32 %8 to i8
ret i8 %9
}
/* Variables and functions */
int /*<<< orphan*/ ChristmasTree(int);
int /*<<< orphan*/ printf(char *);
int main() {
  ChristmasTree(4);
  printf("\n");
  ChristmasTree(7);
  printf("\n");
  ChristmasTree(11);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <ChristmasTree@plt>
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x7,%edi
call   1040 <ChristmasTree@plt>
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
mov    $0xb,%edi
call   1040 <ChristmasTree@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <ChristmasTree@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x7,%edi
call   1040 <ChristmasTree@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xb,%edi
call   1040 <ChristmasTree@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @ChristmasTree(i32 4)
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @ChristmasTree(i32 7)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @ChristmasTree(i32 11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @ChristmasTree(i32 4)
%2 = tail call i32 @putchar(i32 10)
%3 = tail call i32 @ChristmasTree(i32 7)
%4 = tail call i32 @putchar(i32 10)
%5 = tail call i32 @ChristmasTree(i32 11)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
char *unicode_write_string_utf32be(int /*<<< orphan*/ *, size_t, size_t *);
char *unicode_write_string_utf32(uint32_t *code_points,
                                 size_t code_points_length,
                                 size_t *string_length_ptr) {
  return unicode_write_string_utf32be(code_points, code_points_length,
                                      string_length_ptr);
}


x86 assembly (clang, -O0):
<unicode_write_string_utf32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <unicode_write_string_utf32be@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unicode_write_string_utf32>:
jmp    1030 <unicode_write_string_utf32be@plt>

LLVM IR (-O0):
define i8* @unicode_write_string_utf32(i32* %0, i64 %1, i64* %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64*
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = load i64*, i64** %6
%10 = call i8* @unicode_write_string_utf32be(i32* %7, i64 %8, i64* %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @unicode_write_string_utf32(i32* %0, i64 %1, i64* %2) {
%4 = tail call i8* @unicode_write_string_utf32be(i32* %0, i64 %1, i64* %2)
ret i8* %4
}
void window_about_emptysub() {}


x86 assembly (clang, -O0):
<window_about_emptysub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<window_about_emptysub>:
ret

LLVM IR (-O0):
define void @window_about_emptysub() {
ret void
}

LLVM IR (-O2):
define void @window_about_emptysub() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ memset(char *, char, int);
int /*<<< orphan*/ munlock(char *, int);
void putpwd(char *p) {
  if (p) {
    memset(p, 'A', 512);
    munlock(p, 512);
    free(p);
  }
}


x86 assembly (clang, -O0):
<putpwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1171 <putpwd+0x41>
mov    -0x8(%rbp),%rdi
mov    $0x41,%esi
mov    $0x200,%edx
call   1050 <memset@plt>
mov    -0x8(%rbp),%rdi
mov    $0x200,%esi
call   1030 <munlock@plt>
mov    -0x8(%rbp),%rdi
call   1040 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putpwd>:
test   %rdi,%rdi
je     115e <putpwd+0x2e>
push   %rbx
mov    %rdi,%rbx
mov    $0x41,%esi
mov    $0x200,%edx
call   1050 <memset@plt>
mov    %rbx,%rdi
mov    $0x200,%esi
call   1030 <munlock@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <free@plt>
ret

LLVM IR (-O0):
define void @putpwd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @memset(i8* %6, i8 signext 65, i32 512)
%8 = load i8*, i8** %2
%9 = call i32 @munlock(i8* %8, i32 512)
%10 = load i8*, i8** %2
%11 = call i32 @free(i8* %10)
br label %12
12: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @putpwd(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @memset(i8* %0, i8 signext 65, i32 512)
%5 = tail call i32 @munlock(i8* %0, i32 512)
%6 = tail call i32 @free(i8* %0)
br label %7
7: ; preds = %3, %1
ret void
}
int is_leap_year(int year) {
  return (year % 4 == 0) && (year % 100 != 0) || (year % 400 == 0);
}


x86 assembly (clang, -O0):
<is_leap_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1134 <is_leap_year+0x34>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1148 <is_leap_year+0x48>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_leap_year>:
test   $0x3,%dil
jne    112c <is_leap_year+0x2c>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%ecx
mov    %edi,%edx
mov    $0x1,%eax
sub    %ecx,%edx
je     112c <is_leap_year+0x2c>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @is_leap_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 400
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_leap_year(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = srem i32 %0, 100
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %7
%12 = phi i32 [ %10, %7 ], [ 1, %1 ]
ret i32 %12
}
void lib2_function(void) {}


x86 assembly (clang, -O0):
<lib2_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib2_function>:
ret

LLVM IR (-O0):
define void @lib2_function() {
ret void
}

LLVM IR (-O2):
define void @lib2_function() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOCK_UN;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ flock(int, int /*<<< orphan*/);
void release_lock(int lock_fd) {
  flock(lock_fd, LOCK_UN);
  close(lock_fd);
}


x86 assembly (clang, -O0):
<release_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
call   1040 <flock@plt>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<release_lock>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
call   1040 <flock@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
@LOCK_UN = global i32 0
define void @release_lock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @LOCK_UN
%5 = call i32 @flock(i32 %3, i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
ret void
}

LLVM IR (-O2):
@LOCK_UN = global i32 0
define void @release_lock(i32 %0) {
%2 = load i32, i32* @LOCK_UN
%3 = tail call i32 @flock(i32 %0, i32 %2)
%4 = tail call i32 @close(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_char;
typedef int /*<<< orphan*/ RSA;

/* Variables and functions */
int /*<<< orphan*/ *d2i_RSAPublicKey(int /*<<< orphan*/ *,
                                     int /*<<< orphan*/ const **, long);
RSA *get_rsa_pub(const u_char **pub_key, long length) {
  return d2i_RSAPublicKey(NULL, pub_key, length);
}


x86 assembly (clang, -O0):
<get_rsa_pub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%edi
call   1030 <d2i_RSAPublicKey@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rsa_pub>:
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <d2i_RSAPublicKey@plt>

LLVM IR (-O0):
define i32* @get_rsa_pub(i32** %0, i64 %1) {
%3 = alloca i32**
%4 = alloca i64
store i32** %0, i32*** %3
store i64 %1, i64* %4
%5 = load i32**, i32*** %3
%6 = load i64, i64* %4
%7 = call i32* @d2i_RSAPublicKey(i32* null, i32** %5, i64 %6)
ret i32* %7
}

LLVM IR (-O2):
define i32* @get_rsa_pub(i32** %0, i64 %1) {
%3 = tail call i32* @d2i_RSAPublicKey(i32* null, i32** %0, i64 %1)
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ init();
int /*<<< orphan*/ kill();
int /*<<< orphan*/ run();
int main() {
  init();
  run();
  kill();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <init@plt>
mov    $0x0,%al
call   1030 <run@plt>
mov    $0x0,%al
call   1050 <kill@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <init@plt>
xor    %eax,%eax
call   1030 <run@plt>
xor    %eax,%eax
call   1050 <kill@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init()
%3 = call i32 (...) @run()
%4 = call i32 (...) @kill()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init()
%2 = tail call i32 (...) @run()
%3 = tail call i32 (...) @kill()
ret i32 0
}
/* Variables and functions */
scalar_t__ acosf(float);
int /*<<< orphan*/ link_failure_acosf();
void test_acosf(float f) {
  if (acosf(f) != acosf(f))
    link_failure_acosf();
}


x86 assembly (clang, -O0):
<test_acosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <acosf@plt>
mov    %rax,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <acosf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_acosf+0x3c>
mov    $0x0,%al
call   1030 <link_failure_acosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_acosf>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1040 <acosf@plt>
mov    %rax,%rbx
movss  0xc(%rsp),%xmm0
call   1040 <acosf@plt>
cmp    %rax,%rbx
jne    1149 <test_acosf+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <link_failure_acosf@plt>

LLVM IR (-O0):
define void @test_acosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @acosf(float %3)
%5 = load float, float* %2
%6 = call i64 @acosf(float %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_acosf()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_acosf(float %0) {
%2 = tail call i64 @acosf(float %0)
%3 = tail call i64 @acosf(float %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_acosf()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BGBBTJ_CodecCRAM_Init();
int BGBBTJ_Codec_Init() {
  static int init;
  if (init)
    return (0);
  init = 1;
  BGBBTJ_CodecCRAM_Init();
  return (1);
}


x86 assembly (clang, -O0):
<BGBBTJ_Codec_Init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,0x2f0d(%rip)
je     1131 <BGBBTJ_Codec_Init+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1149 <BGBBTJ_Codec_Init+0x39>
movl   $0x1,0x2ef1(%rip)
mov    $0x0,%al
call   1030 <BGBBTJ_CodecCRAM_Init@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGBBTJ_Codec_Init>:
push   %rax
xor    %eax,%eax
cmpb   $0x0,0x2f12(%rip)
jne    112f <BGBBTJ_Codec_Init+0x1f>
movb   $0x1,0x2f09(%rip)
xor    %eax,%eax
call   1030 <BGBBTJ_CodecCRAM_Init@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@BGBBTJ_Codec_Init.init = internal global i32 0
define i32 @BGBBTJ_Codec_Init() {
%1 = alloca i32
%2 = load i32, i32* @BGBBTJ_Codec_Init.init
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 0, i32* %1
br label %7
5: ; preds = %0
store i32 1, i32* @BGBBTJ_Codec_Init.init
%6 = call i32 (...) @BGBBTJ_CodecCRAM_Init()
store i32 1, i32* %1
br label %7
7: ; preds = %5, %4
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@BGBBTJ_Codec_Init.init = internal unnamed_addr global i1 false
define i32 @BGBBTJ_Codec_Init() {
%1 = load i1, i1* @BGBBTJ_Codec_Init.init
br i1 %1, label %4, label %2
2: ; preds = %0
store i1 true, i1* @BGBBTJ_Codec_Init.init
%3 = tail call i32 (...) @BGBBTJ_CodecCRAM_Init()
br label %4
4: ; preds = %0, %2
%5 = phi i32 [ 1, %2 ], [ 0, %0 ]
ret i32 %5
}
IR0AR1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (*p0) = (p1[1111111 / 4]); }


x86 assembly (clang, -O0):
<IR0AR1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    0x87a22(%rax),%cx
mov    -0x18(%rbp),%rax
mov    %cx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IR0AR1>:
movzwl 0x87a22(%r9),%eax
mov    %ax,(%r8)
ret

LLVM IR (-O0):
define i32 @IR0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = getelementptr inbounds i16, i16* %16, i64 277777
%18 = load i16, i16* %17
%19 = load i16*, i16** %12
store i16 %18, i16* %19
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @IR0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture writeonly %4, i16* nocapture %5) {
%7 = getelementptr inbounds i16, i16* %5, i64 277777
%8 = load i16, i16* %7
store i16 %8, i16* %4
ret i32 undef
}
/* Variables and functions */
int random_between(int /*<<< orphan*/, int);
int poison_random_type() { return random_between(0, 2); }


x86 assembly (clang, -O0):
<poison_random_type>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x2,%esi
call   1030 <random_between@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<poison_random_type>:
xor    %edi,%edi
mov    $0x2,%esi
jmp    1030 <random_between@plt>

LLVM IR (-O0):
define i32 @poison_random_type() {
%1 = call i32 @random_between(i32 0, i32 2)
ret i32 %1
}

LLVM IR (-O2):
define i32 @poison_random_type() {
%1 = tail call i32 @random_between(i32 0, i32 2)
ret i32 %1
}
int test_imm_F7uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xF7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F7uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xf7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F7uint64_lowword_mem>:
testb  $0xf7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F7uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 247
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F7uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 247
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint16_t;
struct pcg_state_setseq_32 {
  int dummy;
};

/* Variables and functions */
int pcg_setseq_32_xsh_rs_16_random_r(struct pcg_state_setseq_32 *);
uint16_t pcg_setseq_32_xsh_rs_16_boundedrand_r(struct pcg_state_setseq_32 *rng,
                                               uint16_t bound) {
  uint16_t threshold = ((uint16_t)(-bound)) % bound;
  for (;;) {
    uint16_t r = pcg_setseq_32_xsh_rs_16_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_setseq_32_xsh_rs_16_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_setseq_32_xsh_rs_16_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_setseq_32_xsh_rs_16_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_setseq_32_xsh_rs_16_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_setseq_32_xsh_rs_16_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_setseq_32_xsh_rs_16_random_r@plt>
test   %eax,%eax
js     1120 <pcg_setseq_32_xsh_rs_16_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_setseq_32 = type { i32 }
define i32 @pcg_setseq_32_xsh_rs_16_boundedrand_r(%struct.pcg_state_setseq_32* %0, i32 %1) {
%3 = alloca %struct.pcg_state_setseq_32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_setseq_32* %0, %struct.pcg_state_setseq_32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_setseq_32*, %struct.pcg_state_setseq_32** %3
%13 = call i32 @pcg_setseq_32_xsh_rs_16_random_r(%struct.pcg_state_setseq_32* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_setseq_32 = type { i32 }
define i32 @pcg_setseq_32_xsh_rs_16_boundedrand_r(%struct.pcg_state_setseq_32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_setseq_32_xsh_rs_16_random_r(%struct.pcg_state_setseq_32* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
/* Type definitions */
struct ctrl_iface_priv {
  int dummy;
};

/* Variables and functions */
void wpa_supplicant_ctrl_iface_send(struct ctrl_iface_priv *priv, int level,
                                    char *buf, size_t len) {}


x86 assembly (clang, -O0):
<wpa_supplicant_ctrl_iface_send>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_supplicant_ctrl_iface_send>:
ret

LLVM IR (-O0):
%struct.ctrl_iface_priv = type { i32 }
define void @wpa_supplicant_ctrl_iface_send(%struct.ctrl_iface_priv* %0, i32 %1, i8* %2, i64 %3) {
%5 = alloca %struct.ctrl_iface_priv*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
store %struct.ctrl_iface_priv* %0, %struct.ctrl_iface_priv** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
ret void
}

LLVM IR (-O2):
%struct.ctrl_iface_priv = type { i32 }
define void @wpa_supplicant_ctrl_iface_send(%struct.ctrl_iface_priv* nocapture %0, i32 %1, i8* nocapture %2, i64 %3) {
ret void
}
/* Variables and functions */
void const *GppcFinfoV1();
const void *pg_finfo_mytransform(void) { return GppcFinfoV1(); }


x86 assembly (clang, -O0):
<pg_finfo_mytransform>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GppcFinfoV1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pg_finfo_mytransform>:
xor    %eax,%eax
jmp    1030 <GppcFinfoV1@plt>

LLVM IR (-O0):
define i8* @pg_finfo_mytransform() {
%1 = call i8* (...) @GppcFinfoV1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @pg_finfo_mytransform() {
%1 = tail call i8* (...) @GppcFinfoV1()
ret i8* %1
}
/* Type definitions */
struct RNALalifold_args_info {
  int dummy;
};

/* Variables and functions */
int RNALalifold_cmdline_parser2(int, char **, struct RNALalifold_args_info *,
                                int /*<<< orphan*/, int, int);
int RNALalifold_cmdline_parser(int argc, char **argv,
                               struct RNALalifold_args_info *args_info) {
  return RNALalifold_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<RNALalifold_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <RNALalifold_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNALalifold_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <RNALalifold_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.RNALalifold_args_info = type { i32 }
define i32 @RNALalifold_cmdline_parser(i32 %0, i8** %1, %struct.RNALalifold_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.RNALalifold_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.RNALalifold_args_info* %2, %struct.RNALalifold_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.RNALalifold_args_info*, %struct.RNALalifold_args_info** %6
%10 = call i32 @RNALalifold_cmdline_parser2(i32 %7, i8** %8, %struct.RNALalifold_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.RNALalifold_args_info = type { i32 }
define i32 @RNALalifold_cmdline_parser(i32 %0, i8** %1, %struct.RNALalifold_args_info* %2) {
%4 = tail call i32 @RNALalifold_cmdline_parser2(i32 %0, i8** %1, %struct.RNALalifold_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char const *, size_t);
void ft_putnstr_fd(char const *str, size_t str_len, int fd) {
  write(fd, str, str_len);
}


x86 assembly (clang, -O0):
<ft_putnstr_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnstr_fd>:
mov    %edx,%eax
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %eax,%edi
jmp    1030 <write@plt>

LLVM IR (-O0):
define void @ft_putnstr_fd(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = load i64, i64* %5
%10 = call i32 @write(i32 %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @ft_putnstr_fd(i8* nocapture %0, i64 %1, i32 %2) {
%4 = tail call i32 @write(i32 %2, i8* %0, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sulong_qsort(void *, int /*<<< orphan*/, size_t,
                                int (*)(void const *, void const *), size_t);
void qsort(void *v, size_t number, size_t size,
           int (*comp)(const void *, const void *)) {
  sulong_qsort(v, 0, number - 1, comp, size);
}


x86 assembly (clang, -O0):
<qsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%r8
xor    %esi,%esi
call   1030 <sulong_qsort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort>:
mov    %rdx,%r8
lea    -0x1(%rsi),%rdx
xor    %esi,%esi
jmp    1030 <sulong_qsort@plt>

LLVM IR (-O0):
define void @qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = sub i64 %10, 1
%12 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%13 = load i64, i64* %7
%14 = call i32 @sulong_qsort(i8* %9, i32 0, i64 %11, i32 (i8*, i8*)* %12, i64 %13)
ret void
}

LLVM IR (-O2):
define void @qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = add i64 %1, -1
%6 = tail call i32 @sulong_qsort(i8* %0, i32 0, i64 %5, i32 (i8*, i8*)* %3, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __analyzer_eval(int);
void test_float_selfcmp(float f) {
  __analyzer_eval(f == f);
  __analyzer_eval(f != f);
}


x86 assembly (clang, -O0):
<test_float_selfcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
movss  -0x4(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
setne  %al
setp   %cl
or     %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_float_selfcmp>:
push   %rbx
xor    %edi,%edi
xor    %ebx,%ebx
ucomiss %xmm0,%xmm0
setnp  %dil
setp   %bl
call   1030 <__analyzer_eval@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <__analyzer_eval@plt>

LLVM IR (-O0):
define void @test_float_selfcmp(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fcmp oeq float %3, %4
%6 = zext i1 %5 to i32
%7 = call i32 @__analyzer_eval(i32 %6)
%8 = load float, float* %2
%9 = load float, float* %2
%10 = fcmp une float %8, %9
%11 = zext i1 %10 to i32
%12 = call i32 @__analyzer_eval(i32 %11)
ret void
}

LLVM IR (-O2):
define void @test_float_selfcmp(float %0) {
%2 = fcmp ord float %0, 0.000000e+00
%3 = zext i1 %2 to i32
%4 = tail call i32 @__analyzer_eval(i32 %3)
%5 = fcmp uno float %0, 0.000000e+00
%6 = zext i1 %5 to i32
%7 = tail call i32 @__analyzer_eval(i32 %6)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t hash_str(const char *s) {
  const unsigned char *p = (const unsigned char *)s;
  uint32_t h = 5381;
  while (*p) {
    h *= 33;
    h ^= *p++;
  }
  return h ^ (h >> 16);
}


x86 assembly (clang, -O0):
<hash_str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x1505,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <hash_str+0x48>
imul   $0x21,-0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <hash_str+0x17>
mov    -0x14(%rbp),%eax
mov    -0x14(%rbp),%ecx
sar    $0x10,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_str>:
mov    (%rdi),%al
test   %al,%al
je     1129 <hash_str+0x29>
add    $0x1,%rdi
mov    $0x1505,%ecx
nop
mov    %ecx,%edx
shl    $0x5,%edx
add    %ecx,%edx
movzbl %al,%ecx
xor    %edx,%ecx
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <hash_str+0x10>
jmp    112e <hash_str+0x2e>
mov    $0x1505,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i32 5381, i32* %4
br label %6
6: ; preds = %10, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32, i32* %4
%12 = mul nsw i32 %11, 33
store i32 %12, i32* %4
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
%15 = load i8, i8* %13
%16 = zext i8 %15 to i32
%17 = load i32, i32* %4
%18 = xor i32 %17, %16
store i32 %18, i32* %4
br label %6
19: ; preds = %6
%20 = load i32, i32* %4
%21 = load i32, i32* %4
%22 = ashr i32 %21, 16
%23 = xor i32 %20, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @hash_str(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 5381, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 33
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = zext i8 %5 to i32
%11 = xor i32 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 5381, %1 ], [ %11, %4 ]
%16 = ashr i32 %15, 16
%17 = xor i32 %16, %15
ret i32 %17
}
/* Variables and functions */
scalar_t__ ceil(double);
int /*<<< orphan*/ link_failure_ceil();
void test_ceil(double d) {
  if (ceil(d) != ceil(d))
    link_failure_ceil();
}


x86 assembly (clang, -O0):
<test_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_ceil+0x3c>
mov    $0x0,%al
call   1040 <link_failure_ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ceil>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <ceil@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1030 <ceil@plt>
cmp    %rax,%rbx
jne    1149 <test_ceil+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_ceil@plt>

LLVM IR (-O0):
define void @test_ceil(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @ceil(double %3)
%5 = load double, double* %2
%6 = call i64 @ceil(double %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_ceil()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_ceil(double %0) {
%2 = tail call i64 @ceil(double %0)
%3 = tail call i64 @ceil(double %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_ceil()
br label %7
7: ; preds = %5, %1
ret void
}
int sfsnode_order(int *desc1, int *desc2, int desc_n) {
  int i, o = 0;
  for (i = 0; i < desc_n; i++) {
    o = desc1[i] - desc2[i];
    if (o != 0)
      break;
  }
  return o;
}


x86 assembly (clang, -O0):
<sfsnode_order>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1164 <sfsnode_order+0x64>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
sub    (%rcx,%rdx,4),%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1151 <sfsnode_order+0x51>
jmp    1164 <sfsnode_order+0x64>
jmp    1156 <sfsnode_order+0x56>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111d <sfsnode_order+0x1d>
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfsnode_order>:
test   %edx,%edx
jle    1121 <sfsnode_order+0x21>
mov    %edx,%ecx
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    (%rdi,%rdx,4),%eax
sub    (%rsi,%rdx,4),%eax
jne    1123 <sfsnode_order+0x23>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <sfsnode_order+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sfsnode_order(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 0, i32* %8
store i32 0, i32* %7
br label %9
9: ; preds = %29, %3
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %32
13: ; preds = %9
%14 = load i32*, i32** %4
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %5
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = load i32, i32* %22
%24 = sub nsw i32 %18, %23
store i32 %24, i32* %8
%25 = load i32, i32* %8
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %13
br label %32
28: ; preds = %13
br label %29
29: ; preds = %28
%30 = load i32, i32* %7
%31 = add nsw i32 %30, 1
store i32 %31, i32* %7
br label %9
32: ; preds = %27, %9
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @sfsnode_order(i32* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %18
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %17, %6
br i1 %8, label %18, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %17, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = getelementptr inbounds i32, i32* %1, i64 %10
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
%16 = icmp eq i32 %15, 0
%17 = add nuw nsw i64 %10, 1
br i1 %16, label %7, label %18
18: ; preds = %7, %9, %3
%19 = phi i32 [ 0, %3 ], [ %15, %9 ], [ 0, %7 ]
ret i32 %19
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t dmc_unrar_get_uint32le(const uint8_t *data) {
  return (((uint32_t)data[3]) << 24) | (((uint32_t)data[2]) << 16) |
         (((uint32_t)data[1]) << 8) | data[0];
}


x86 assembly (clang, -O0):
<dmc_unrar_get_uint32le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmc_unrar_get_uint32le>:
mov    0xc(%rdi),%ecx
shl    $0x18,%ecx
mov    0x4(%rdi),%eax
mov    0x8(%rdi),%edx
shl    $0x10,%edx
or     %ecx,%edx
shl    $0x8,%eax
or     %edx,%eax
or     (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @dmc_unrar_get_uint32le(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 0
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @dmc_unrar_get_uint32le(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
%4 = shl i32 %3, 24
%5 = getelementptr inbounds i32, i32* %0, i64 2
%6 = load i32, i32* %5
%7 = shl i32 %6, 16
%8 = or i32 %7, %4
%9 = getelementptr inbounds i32, i32* %0, i64 1
%10 = load i32, i32* %9
%11 = shl i32 %10, 8
%12 = or i32 %8, %11
%13 = load i32, i32* %0
%14 = or i32 %12, %13
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ XButtonPressedEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XButtonPressedEvent(void *_p) {
  if (_p == NULL)
    abort();
  free((XButtonPressedEvent *)_p);
}


x86 assembly (clang, -O0):
<free_XButtonPressedEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XButtonPressedEvent+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XButtonPressedEvent>:
test   %rdi,%rdi
je     112a <free_XButtonPressedEvent+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XButtonPressedEvent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XButtonPressedEvent(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}