xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ abort();
void test3(void) {
  int x = 3, y = 2;
  int xx = 3, yy = 2;
  if ((xx < yy ? x++ : y++) != 2)
    abort();
  if (x != 3)
    abort();
  if (y != 3)
    abort();
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x3,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1153 <test3+0x43>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
mov    %eax,-0x14(%rbp)
jmp    1161 <test3+0x51>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x8(%rbp)
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    $0x2,%eax
je     1174 <test3+0x64>
mov    $0x0,%al
call   1030 <abort@plt>
cmpl   $0x3,-0x4(%rbp)
je     1185 <test3+0x75>
mov    $0x0,%al
call   1030 <abort@plt>
cmpl   $0x3,-0x8(%rbp)
je     1196 <test3+0x86>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
ret

LLVM IR (-O0):
define void @test3() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 3, i32* %1
store i32 2, i32* %2
store i32 3, i32* %3
store i32 2, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %14
11: ; preds = %0
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %8
%15 = phi i32 [ %9, %8 ], [ %12, %11 ]
%16 = icmp ne i32 %15, 2
br i1 %16, label %17, label %19
17: ; preds = %14
%18 = call i32 (...) @abort()
unreachable
19: ; preds = %14
%20 = load i32, i32* %1
%21 = icmp ne i32 %20, 3
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = call i32 (...) @abort()
unreachable
24: ; preds = %19
%25 = load i32, i32* %2
%26 = icmp ne i32 %25, 3
br i1 %26, label %27, label %29
27: ; preds = %24
%28 = call i32 (...) @abort()
unreachable
29: ; preds = %24
ret void
}

LLVM IR (-O2):
define void @test3() {
ret void
}
int fmt_is_digit(char c) { return (c >= '0' && c <= '9'); }


x86 assembly (clang, -O0):
<fmt_is_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <fmt_is_digit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_is_digit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @fmt_is_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @fmt_is_digit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int strlen(char const *);
char *determine_ext(const char *path) {
  const int len = strlen(path);
  path += len - 1;
  while (*path != '.')
    --path;
  return (char *)(path + 1);
}


x86 assembly (clang, -O0):
<determine_ext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
je     115d <determine_ext+0x4d>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
jmp    113c <determine_ext+0x2c>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<determine_ext>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
add    %rbx,%rax
add    $0x1,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpb   $0x2e,-0x2(%rax)
lea    -0x1(%rax),%rax
jne    1130 <determine_ext+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define i8* @determine_ext(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = sub nsw i32 %6, 1
%8 = load i8*, i8** %2
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds i8, i8* %8, i64 %9
store i8* %10, i8** %2
br label %11
11: ; preds = %16, %1
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 46
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 -1
store i8* %18, i8** %2
br label %11
19: ; preds = %11
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 1
ret i8* %21
}

LLVM IR (-O2):
define i8* @determine_ext(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
br label %6
6: ; preds = %6, %1
%7 = phi i8* [ %5, %1 ], [ %10, %6 ]
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 46
%10 = getelementptr inbounds i8, i8* %7, i64 -1
br i1 %9, label %11, label %6
11: ; preds = %6
%12 = getelementptr inbounds i8, i8* %7, i64 1
ret i8* %12
}
/* Variables and functions */
double ath_db(double, int /*<<< orphan*/);
double pow(double, double);
double ath_energy(double freq, double value) {
  double db;
  db = ath_db(freq, 0) + value;
  return (pow(10.0, (db + 41.837375) * 0.1));
}


x86 assembly (clang, -O0):
<ath_energy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %edi,%edi
call   1030 <ath_db@plt>
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xec0(%rip),%xmm1
addsd  -0x18(%rbp),%xmm1
movsd  0xeab(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xe97(%rip),%xmm0
call   1040 <pow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ath_energy>:
push   %rax
movsd  %xmm1,(%rsp)
xor    %edi,%edi
call   1030 <ath_db@plt>
movsd  (%rsp),%xmm1
addsd  %xmm0,%xmm1
addsd  0xec2(%rip),%xmm1
mulsd  0xec2(%rip),%xmm1
movsd  0xec2(%rip),%xmm0
pop    %rax
jmp    1040 <pow@plt>

LLVM IR (-O0):
define double @ath_energy(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = call double @ath_db(double %6, i32 0)
%8 = load double, double* %4
%9 = fadd double %7, %8
store double %9, double* %5
%10 = load double, double* %5
%11 = fadd double %10, 0x4044EB2F1A9FBE77
%12 = fmul double %11, 1.000000e-01
%13 = call double @pow(double 1.000000e+01, double %12)
ret double %13
}

LLVM IR (-O2):
define double @ath_energy(double %0, double %1) {
%3 = tail call double @ath_db(double %0, i32 0)
%4 = fadd double %3, %1
%5 = fadd double %4, 0x4044EB2F1A9FBE77
%6 = fmul double %5, 1.000000e-01
%7 = tail call double @pow(double 1.000000e+01, double %6)
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void usage(char *myName) {
  fprintf(stderr, "usage:\n");
  fprintf(stderr, "  %s read\n", myName);
  fprintf(stderr, "  %s write <listofbytes>\n", myName);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec1(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xeb1(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ec2(%rip),%r14
mov    (%r14),%edi
lea    0xed8(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xecf(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xec6(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"usage:\0A\00"
@.str.1 = [11 x i8] c" %s read\0A\00"
@.str.2 = [26 x i8] c" %s write <listofbytes>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %2
%10 = call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"usage:\0A\00"
@.str.1 = [11 x i8] c" %s read\0A\00"
@.str.2 = [26 x i8] c" %s write <listofbytes>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 (i32, i8*, ...) @fprintf(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stderr
%5 = tail call i32 (i32, i8*, ...) @fprintf(i32 %4, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%6 = load i32, i32* @stderr
%7 = tail call i32 (i32, i8*, ...) @fprintf(i32 %6, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int __attribute__((unused)) exchange_and_add(volatile uint32_t *mem, int val) {
  int result = *mem;
  *mem += val;
  return result;
}


x86 assembly (clang, -O0):
<exchange_and_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exchange_and_add>:
mov    (%rdi),%eax
add    %esi,(%rdi)
ret

LLVM IR (-O0):
define i32 @exchange_and_add(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
store i32 %7, i32* %5
%8 = load i32, i32* %4
%9 = load i32*, i32** %3
%10 = load volatile i32, i32* %9
%11 = add nsw i32 %10, %8
store volatile i32 %11, i32* %9
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @exchange_and_add(i32* %0, i32 %1) {
%3 = load volatile i32, i32* %0
%4 = load volatile i32, i32* %0
%5 = add nsw i32 %4, %1
store volatile i32 %5, i32* %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ mib_get(int, void *);
int wlan_is_up(void) {
  unsigned char vChar;
  int value = 0;
  mib_get(0 + 300 + 43, (void *)&vChar);
  if (vChar == 0) {
    value = 1;
  }
  return value;
}


x86 assembly (clang, -O0):
<wlan_is_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
mov    $0x157,%edi
lea    -0x1(%rbp),%rsi
call   1030 <mib_get@plt>
movzbl -0x1(%rbp),%eax
cmp    $0x0,%eax
jne    1141 <wlan_is_up+0x31>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wlan_is_up>:
push   %rax
lea    0x7(%rsp),%rsi
mov    $0x157,%edi
call   1030 <mib_get@plt>
xor    %eax,%eax
cmpb   $0x0,0x7(%rsp)
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wlan_is_up() {
%1 = alloca i8
%2 = alloca i32
store i32 0, i32* %2
%3 = call i32 @mib_get(i32 343, i8* %1)
%4 = load i8, i8* %1
%5 = zext i8 %4 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %2
br label %8
8: ; preds = %7, %0
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @wlan_is_up() {
%1 = alloca i8
%2 = call i32 @mib_get(i32 343, i8* %1)
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int pthread_cond_destroy(pthread_cond_t *cond) { return 0; }


x86 assembly (clang, -O0):
<pthread_cond_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_cond_destroy(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_cond_destroy(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
size_t strlen(char *);
int /*<<< orphan*/ ungetch(char);
void ungets(char *s) {
  size_t i = strlen(s);
  while (i > 0)
    ungetch(s[--i]);
}


x86 assembly (clang, -O0):
<ungets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jbe    1166 <ungets+0x46>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x10(%rbp)
movsbl -0x1(%rax,%rcx,1),%edi
call   1040 <ungetch@plt>
jmp    1139 <ungets+0x19>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ungets>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %rax,%rax
je     1151 <ungets+0x31>
mov    %rax,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl -0x1(%r14,%rbx,1),%edi
call   1040 <ungetch@plt>
add    $0xffffffffffffffff,%rbx
jne    1140 <ungets+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @ungets(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
store i64 %5, i64* %3
br label %6
6: ; preds = %9, %1
%7 = load i64, i64* %3
%8 = icmp ugt i64 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i8*, i8** %2
%11 = load i64, i64* %3
%12 = add i64 %11, -1
store i64 %12, i64* %3
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = call i32 @ungetch(i8 signext %14)
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ungets(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %6, %4 ], [ %2, %1 ]
%6 = add i64 %5, -1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = tail call i32 @ungetch(i8 signext %8)
%10 = icmp eq i64 %6, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_uid_in_group() {
  printf("NOT IMPLEMENTED:"
         "pa_uid_in_group"
         "\n");
}


x86 assembly (clang, -O0):
<pa_uid_in_group>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_uid_in_group>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"NOT IMPLEMENTED:pa_uid_in_group\0A\00"
define i32 @pa_uid_in_group() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [32 x i8] c"NOT IMPLEMENTED:pa_uid_in_group\00"
define i32 @pa_uid_in_group() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int set_mce_nospec(unsigned long pfn) { return 0; }


x86 assembly (clang, -O0):
<set_mce_nospec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_mce_nospec>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @set_mce_nospec(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @set_mce_nospec(i64 %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ dumpdata(void *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ dumpzero(int, int /*<<< orphan*/ *);
void dumpdataa(void *addr, int len, FILE *f) {
  dumpdata(addr, len, f);
  if ((len & 15) != 0)
    dumpzero(16 - (len & 15), f);
}


x86 assembly (clang, -O0):
<dumpdataa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1040 <dumpdata@plt>
mov    -0xc(%rbp),%eax
and    $0xf,%eax
cmp    $0x0,%eax
je     1168 <dumpdataa+0x48>
mov    -0xc(%rbp),%eax
and    $0xf,%eax
mov    $0x10,%edi
sub    %eax,%edi
mov    -0x18(%rbp),%rsi
call   1030 <dumpzero@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpdataa>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%ebp
call   1040 <dumpdata@plt>
and    $0xf,%ebp
je     1147 <dumpdataa+0x27>
mov    $0x10,%edi
sub    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <dumpzero@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @dumpdataa(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i32 @dumpdata(i8* %7, i32 %8, i32* %9)
%11 = load i32, i32* %5
%12 = and i32 %11, 15
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %3
%15 = load i32, i32* %5
%16 = and i32 %15, 15
%17 = sub nsw i32 16, %16
%18 = load i32*, i32** %6
%19 = call i32 @dumpzero(i32 %17, i32* %18)
br label %20
20: ; preds = %14, %3
ret void
}

LLVM IR (-O2):
define void @dumpdataa(i8* %0, i32 %1, i32* %2) {
%4 = tail call i32 @dumpdata(i8* %0, i32 %1, i32* %2)
%5 = and i32 %1, 15
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = sub nuw nsw i32 16, %5
%9 = tail call i32 @dumpzero(i32 %8, i32* %2)
br label %10
10: ; preds = %7, %3
ret void
}
int free_image_array(the_array, length)
short **the_array;
long length;
{}


x86 assembly (clang, -O0):
<free_image_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_image_array>:
ret

LLVM IR (-O0):
define i32 @free_image_array(i16** %0, i64 %1) {
%3 = alloca i32
%4 = alloca i16**
%5 = alloca i64
store i16** %0, i16*** %4
store i64 %1, i64* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @free_image_array(i16** nocapture readnone %0, i64 %1) {
ret i32 undef
}
/* Variables and functions */
int syscall1(int, int);
int close(int fd) { return syscall1(0x06, fd); }


x86 assembly (clang, -O0):
<close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x6,%edi
call   1030 <syscall1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close>:
mov    %edi,%esi
mov    $0x6,%edi
jmp    1030 <syscall1@plt>

LLVM IR (-O0):
define i32 @close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @syscall1(i32 6, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @close(i32 %0) {
%2 = tail call i32 @syscall1(i32 6, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ PSMyArc(float, float, float, float, int /*<<< orphan*/, int);
void PSDrawElipse() {
  float cx;
  float cy;
  float radx;
  float rady;
  if (radx != rady)
    PSMyArc(cx, cy, radx, rady, 0, 360);
}


x86 assembly (clang, -O0):
<PSDrawElipse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  -0xc(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jne    1132 <PSDrawElipse+0x22>
jp     1132 <PSDrawElipse+0x22>
jmp    1152 <PSDrawElipse+0x42>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movss  -0x10(%rbp),%xmm3
xor    %edi,%edi
mov    $0x168,%esi
call   1030 <PSMyArc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PSDrawElipse>:
xor    %edi,%edi
mov    $0x168,%esi
jmp    1030 <PSMyArc@plt>

LLVM IR (-O0):
define void @PSDrawElipse() {
%1 = alloca float
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp une float %5, %6
br i1 %7, label %8, label %14
8: ; preds = %0
%9 = load float, float* %1
%10 = load float, float* %2
%11 = load float, float* %3
%12 = load float, float* %4
%13 = call i32 @PSMyArc(float %9, float %10, float %11, float %12, i32 0, i32 360)
br label %14
14: ; preds = %8, %0
ret void
}

LLVM IR (-O2):
define void @PSDrawElipse() {
%1 = tail call i32 @PSMyArc(float undef, float undef, float undef, float undef, i32 0, i32 360)
ret void
}
void gtk_dialog_flags_get_type() {}


x86 assembly (clang, -O0):
<gtk_dialog_flags_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_dialog_flags_get_type>:
ret

LLVM IR (-O0):
define void @gtk_dialog_flags_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_dialog_flags_get_type() {
ret void
}
int local_function(int a1, int a2) { return (a1 * a2); }


x86 assembly (clang, -O0):
<local_function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_function>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @local_function(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @local_function(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
int asn1_check_eoc(const unsigned char **in, long len) {
  const unsigned char *p;
  if (len < 2)
    return 0;
  p = *in;
  if (p[0] == '\0' && p[1] == '\0') {
    *in += 2;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<asn1_check_eoc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x2,-0x18(%rbp)
jge    1123 <asn1_check_eoc+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1170 <asn1_check_eoc+0x70>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
jne    1169 <asn1_check_eoc+0x69>
mov    -0x20(%rbp),%rax
movzbl 0x1(%rax),%eax
cmp    $0x0,%eax
jne    1169 <asn1_check_eoc+0x69>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x2,%rcx
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1170 <asn1_check_eoc+0x70>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asn1_check_eoc>:
xor    %eax,%eax
cmp    $0x2,%rsi
jl     1110 <asn1_check_eoc+0x10>
mov    (%rdi),%rcx
cmpb   $0x0,(%rcx)
je     1111 <asn1_check_eoc+0x11>
ret
cmpb   $0x0,0x1(%rcx)
jne    1110 <asn1_check_eoc+0x10>
add    $0x2,%rcx
mov    %rcx,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @asn1_check_eoc(i8** %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i8*
store i8** %0, i8*** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = icmp slt i64 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %29
10: ; preds = %2
%11 = load i8**, i8*** %4
%12 = load i8*, i8** %11
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = getelementptr inbounds i8, i8* %13, i64 0
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %28
18: ; preds = %10
%19 = load i8*, i8** %6
%20 = getelementptr inbounds i8, i8* %19, i64 1
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %28
24: ; preds = %18
%25 = load i8**, i8*** %4
%26 = load i8*, i8** %25
%27 = getelementptr inbounds i8, i8* %26, i64 2
store i8* %27, i8** %25
store i32 1, i32* %3
br label %29
28: ; preds = %18, %10
store i32 0, i32* %3
br label %29
29: ; preds = %28, %24, %9
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @asn1_check_eoc(i8** nocapture %0, i64 %1) {
%3 = icmp slt i64 %1, 2
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = load i8*, i8** %0
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %5, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = getelementptr inbounds i8, i8* %5, i64 2
store i8* %13, i8** %0
br label %14
14: ; preds = %4, %8, %2, %12
%15 = phi i32 [ 1, %12 ], [ 0, %2 ], [ 0, %8 ], [ 0, %4 ]
ret i32 %15
}
void fc220(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
  a:
    goto a;
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc220>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fc220+0x7>

x86 assembly (clang, -O2):
<fc220>:
jmp    1100 <fc220>

LLVM IR (-O0):
define void @fc220(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = load i32, i32* %2
%12 = zext i32 %11 to i64
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
br label %17
17: ; preds = %17, %1
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc220(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ *display;
};
struct TYPE_4__ {
  TYPE_1__ xcrossing;
};
typedef TYPE_2__ XEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XEvent_xcrossing_display(void *_p, void *_v) {
  ((XEvent *)_p)->xcrossing.display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcrossing_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcrossing_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32* }
define void @set_XEvent_xcrossing_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_4__*
%9 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %8, i32 0, i32 0
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 0
store i32* %6, i32** %10
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcrossing_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
unsigned long str$recip_not(const unsigned long *asign, const long *aexp,
                            const struct dsc$descriptor_s *adigits,
                            const unsigned long *bsign, const long *bexp,
                            const struct dsc$descriptor_s *bdigits,
                            unsigned long *csign, long *cexp,
                            struct dsc$descriptor_s *cdigits) {
  assert(0);
  return 2392148;
}


x86 assembly (clang, -O0):
<str$recip_not>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %edi,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    $0x248054,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str$recip_not>:
push   %rax
xor    %edi,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    $0x248054,%eax
pop    %rcx
ret

LLVM IR (-O0):
%"struct.dsc$descriptor_s" = type opaque
define i64 @"str$recip_not"(i64* %0, i64* %1, %"struct.dsc$descriptor_s"* %2, i64* %3, i64* %4, %"struct.dsc$descriptor_s"* %5, i64* %6, i64* %7, %"struct.dsc$descriptor_s"* %8) {
%10 = alloca i64*
%11 = alloca i64*
%12 = alloca %"struct.dsc$descriptor_s"*
%13 = alloca i64*
%14 = alloca i64*
%15 = alloca %"struct.dsc$descriptor_s"*
%16 = alloca i64*
%17 = alloca i64*
%18 = alloca %"struct.dsc$descriptor_s"*
store i64* %0, i64** %10
store i64* %1, i64** %11
store %"struct.dsc$descriptor_s"* %2, %"struct.dsc$descriptor_s"** %12
store i64* %3, i64** %13
store i64* %4, i64** %14
store %"struct.dsc$descriptor_s"* %5, %"struct.dsc$descriptor_s"** %15
store i64* %6, i64** %16
store i64* %7, i64** %17
store %"struct.dsc$descriptor_s"* %8, %"struct.dsc$descriptor_s"** %18
%19 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
ret i64 2392148
}

LLVM IR (-O2):
%"struct.dsc$descriptor_s" = type opaque
define i64 @"str$recip_not"(i64* nocapture readnone %0, i64* nocapture readnone %1, %"struct.dsc$descriptor_s"* nocapture readnone %2, i64* nocapture readnone %3, i64* nocapture readnone %4, %"struct.dsc$descriptor_s"* nocapture readnone %5, i64* nocapture readnone %6, i64* nocapture readnone %7, %"struct.dsc$descriptor_s"* nocapture readnone %8) {
%10 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
ret i64 2392148
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ wctype_t;

/* Variables and functions */
int /*<<< orphan*/ iswctype(int /*<<< orphan*/, int /*<<< orphan*/);
void uninitvar_iswctype(void) {
  wint_t c;
  wctype_t desc;
  (void)iswctype(c, desc);
}


x86 assembly (clang, -O0):
<uninitvar_iswctype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <iswctype@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_iswctype>:
jmp    1030 <iswctype@plt>

LLVM IR (-O0):
define void @uninitvar_iswctype() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = call i32 @iswctype(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_iswctype() {
%1 = tail call i32 @iswctype(i32 undef, i32 undef)
ret void
}
__attribute__((no, noclone)) signed __int128 t100_5add(signed __int128 x) {
  signed __int128 r;
  if (__builtin_add_overflow(x, (signed __int128)(3), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
add    $0x3,%rdx
adc    $0x0,%rcx
seto   %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1158 <t100_5add+0x48>
jmp    115f <t100_5add+0x4f>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
add    $0x3,%rbx
adc    $0x0,%r14
jno    112b <t100_5add+0x1b>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rbx,%rax
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t100_5add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = call { i128, i1 } @llvm.sadd.with.overflow.i128(i128 %11, i128 3)
%13 = extractvalue { i128, i1 } %12, 1
%14 = extractvalue { i128, i1 } %12, 0
store i128 %14, i128* %6
br i1 %13, label %15, label %17
15: ; preds = %2
%16 = call i32 (...) @bar()
br label %17
17: ; preds = %15, %2
%18 = load i128, i128* %6
store i128 %18, i128* %3
%19 = bitcast i128* %3 to { i64, i64 }*
%20 = load { i64, i64 }, { i64, i64 }* %19
ret { i64, i64 } %20
}

LLVM IR (-O2):
define { i64, i64 } @t100_5add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = tail call { i128, i1 } @llvm.sadd.with.overflow.i128(i128 %6, i128 3)
%8 = extractvalue { i128, i1 } %7, 1
%9 = extractvalue { i128, i1 } %7, 0
br i1 %8, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i128 %9 to i64
%14 = lshr i128 %9, 64
%15 = trunc i128 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
void RasterClocksEnable(unsigned int baseAddr) {
  (*((volatile unsigned int *)(baseAddr + (0x6C)))) =
      ((0x00000001u) | (0x00000004u) | (0x00000002u));
}


x86 assembly (clang, -O0):
<RasterClocksEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x6c,%eax
mov    %eax,%eax
movl   $0x7,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterClocksEnable>:
add    $0x6c,%edi
movl   $0x7,(%rdi)
ret

LLVM IR (-O0):
define void @RasterClocksEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 108
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 7, i32* %6
ret void
}

LLVM IR (-O2):
define void @RasterClocksEnable(i32 %0) {
%2 = add i32 %0, 108
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
store volatile i32 7, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void alt_a(void) { printf("Hey, you pressed ALT a! \n"); }


x86 assembly (clang, -O0):
<alt_a>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alt_a>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Hey, you pressed ALT a! \0A\00"
define void @alt_a() {
%1 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [25 x i8] c"Hey, you pressed ALT a! \00"
define void @alt_a() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double length(float *);
void normalise(float *v) {
  float scale = 1.0 / length(v);
  v[0] *= scale;
  v[1] *= scale;
  v[2] *= scale;
}


x86 assembly (clang, -O0):
<normalise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <length@plt>
movaps %xmm0,%xmm1
movsd  0xed0(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  (%rax),%xmm0
movss  %xmm0,(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
movss  %xmm0,0x4(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x8(%rax),%xmm0
movss  %xmm0,0x8(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalise>:
push   %rbx
mov    %rdi,%rbx
call   1030 <length@plt>
movsd  0xedf(%rip),%xmm1
divsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
movss  (%rbx),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,(%rbx)
movss  0x4(%rbx),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,0x4(%rbx)
mulss  0x8(%rbx),%xmm0
movss  %xmm0,0x8(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @normalise(float* %0) {
%2 = alloca float*
%3 = alloca float
store float* %0, float** %2
%4 = load float*, float** %2
%5 = call double @length(float* %4)
%6 = fdiv double 1.000000e+00, %5
%7 = fptrunc double %6 to float
store float %7, float* %3
%8 = load float, float* %3
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 0
%11 = load float, float* %10
%12 = fmul float %11, %8
store float %12, float* %10
%13 = load float, float* %3
%14 = load float*, float** %2
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = fmul float %16, %13
store float %17, float* %15
%18 = load float, float* %3
%19 = load float*, float** %2
%20 = getelementptr inbounds float, float* %19, i64 2
%21 = load float, float* %20
%22 = fmul float %21, %18
store float %22, float* %20
ret void
}

LLVM IR (-O2):
define void @normalise(float* %0) {
%2 = tail call double @length(float* %0)
%3 = fdiv double 1.000000e+00, %2
%4 = fptrunc double %3 to float
%5 = load float, float* %0
%6 = fmul float %5, %4
store float %6, float* %0
%7 = getelementptr inbounds float, float* %0, i64 1
%8 = load float, float* %7
%9 = fmul float %8, %4
store float %9, float* %7
%10 = getelementptr inbounds float, float* %0, i64 2
%11 = load float, float* %10
%12 = fmul float %11, %4
store float %12, float* %10
ret void
}
/* Variables and functions */
bool _ARMV7M_Is_vector_an_irq(int vector) { return vector >= 16; }


x86 assembly (clang, -O0):
<_ARMV7M_Is_vector_an_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ARMV7M_Is_vector_an_irq>:
xor    %eax,%eax
cmp    $0x10,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @_ARMV7M_Is_vector_an_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 16
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @_ARMV7M_Is_vector_an_irq(i32 %0) {
%2 = icmp sgt i32 %0, 15
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void get_log_fname(char *fname, int rank) { sprintf(fname, "log/%d", rank); }


x86 assembly (clang, -O0):
<get_log_fname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_log_fname>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"log/%d\00"
define void @get_log_fname(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"log/%d\00"
define void @get_log_fname(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void yyerror(const char *msg) {}


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyerror>:
ret

LLVM IR (-O0):
define void @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @yyerror(i8* nocapture %0) {
ret void
}
/* Type definitions */
struct regcache {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ alpha_fill_fp_regs(struct regcache const *, int, char *,
                                      char *);
void alphabsd_fill_fpreg(const struct regcache *regcache, char *fpregs,
                         int regno) {
  alpha_fill_fp_regs(regcache, regno, fpregs, fpregs + 32 * 8);
}


x86 assembly (clang, -O0):
<alphabsd_fill_fpreg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x10(%rbp),%rcx
add    $0x100,%rcx
call   1030 <alpha_fill_fp_regs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alphabsd_fill_fpreg>:
mov    %rsi,%rax
lea    0x100(%rsi),%rcx
mov    %edx,%esi
mov    %rax,%rdx
jmp    1030 <alpha_fill_fp_regs@plt>

LLVM IR (-O0):
%struct.regcache = type { i32 }
define void @alphabsd_fill_fpreg(%struct.regcache* %0, i8* %1, i32 %2) {
%4 = alloca %struct.regcache*
%5 = alloca i8*
%6 = alloca i32
store %struct.regcache* %0, %struct.regcache** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.regcache*, %struct.regcache** %4
%8 = load i32, i32* %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i64 256
%12 = call i32 @alpha_fill_fp_regs(%struct.regcache* %7, i32 %8, i8* %9, i8* %11)
ret void
}

LLVM IR (-O2):
%struct.regcache = type { i32 }
define void @alphabsd_fill_fpreg(%struct.regcache* %0, i8* %1, i32 %2) {
%4 = getelementptr inbounds i8, i8* %1, i64 256
%5 = tail call i32 @alpha_fill_fp_regs(%struct.regcache* %0, i32 %2, i8* %1, i8* %4)
ret void
}
void strength_test5(int *data) {
  int i = 0;
  while (1) {
    i = i + 1;
    if (data[1] && i * 21 > data[3])
      break;
    data[data[2]] = 2;
  }
}


x86 assembly (clang, -O0):
<strength_test5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,0x4(%rax)
je     113c <strength_test5+0x3c>
imul   $0x15,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
cmp    0xc(%rcx),%eax
jle    113c <strength_test5+0x3c>
jmp    1154 <strength_test5+0x54>
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq 0x8(%rcx),%rcx
movl   $0x2,(%rax,%rcx,4)
jmp    110f <strength_test5+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strength_test5>:
mov    $0x15,%eax
jmp    111e <strength_test5+0x1e>
nopw   0x0(%rax,%rax,1)
movslq 0x8(%rdi),%rcx
movl   $0x2,(%rdi,%rcx,4)
add    $0x15,%eax
cmpl   $0x0,0x4(%rdi)
je     1110 <strength_test5+0x10>
cmp    0xc(%rdi),%eax
jle    1110 <strength_test5+0x10>
ret

LLVM IR (-O0):
define void @strength_test5(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %1, %19
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i32, i32* %3
%13 = mul nsw i32 %12, 21
%14 = load i32*, i32** %2
%15 = getelementptr inbounds i32, i32* %14, i64 3
%16 = load i32, i32* %15
%17 = icmp sgt i32 %13, %16
br i1 %17, label %18, label %19
18: ; preds = %11
br label %26
19: ; preds = %11, %4
%20 = load i32*, i32** %2
%21 = load i32*, i32** %2
%22 = getelementptr inbounds i32, i32* %21, i64 2
%23 = load i32, i32* %22
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i32, i32* %20, i64 %24
store i32 2, i32* %25
br label %4
26: ; preds = %18
ret void
}

LLVM IR (-O2):
define void @strength_test5(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = getelementptr inbounds i32, i32* %0, i64 3
%4 = getelementptr inbounds i32, i32* %0, i64 2
br label %5
5: ; preds = %14, %1
%6 = phi i32 [ 0, %1 ], [ %7, %14 ]
%7 = add nuw nsw i32 %6, 1
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = mul nsw i32 %7, 21
%12 = load i32, i32* %3
%13 = icmp sgt i32 %11, %12
br i1 %13, label %18, label %14
14: ; preds = %10, %5
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %0, i64 %16
store i32 2, i32* %17
br label %5
18: ; preds = %10
ret void
}
void foo668() {}


x86 assembly (clang, -O0):
<foo668>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo668>:
ret

LLVM IR (-O0):
define void @foo668() {
ret void
}

LLVM IR (-O2):
define void @foo668() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void zio_close(int dev) { close(dev); }


x86 assembly (clang, -O0):
<zio_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zio_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @zio_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @zio_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
int path_is_relative(const char *filename) {
  if (filename && filename[0] == '/')
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<path_is_relative>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     112f <path_is_relative+0x2f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
jne    112f <path_is_relative+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1136 <path_is_relative+0x36>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_is_relative>:
test   %rdi,%rdi
je     110c <path_is_relative+0xc>
xor    %eax,%eax
cmpb   $0x2f,(%rdi)
je     1111 <path_is_relative+0x11>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @path_is_relative(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 47
br i1 %11, label %12, label %13
12: ; preds = %6
store i32 0, i32* %2
br label %14
13: ; preds = %6, %1
store i32 1, i32* %2
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @path_is_relative(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 47
br i1 %5, label %7, label %6
6: ; preds = %3, %1
br label %7
7: ; preds = %3, %6
%8 = phi i32 [ 1, %6 ], [ 0, %3 ]
ret i32 %8
}
void initProfiling() {}


x86 assembly (clang, -O0):
<initProfiling>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initProfiling>:
ret

LLVM IR (-O0):
define void @initProfiling() {
ret void
}

LLVM IR (-O2):
define void @initProfiling() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int /*<<< orphan*/);
void t_isprint_0x00() {
  Assert_real((isprint(0) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              5, ("isprint should be 0 for 0x00"));
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec2(%rip),%rsi
mov    $0x5,%edx
lea    0xf5e(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %edi,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec8(%rip),%rsi
lea    0xf69(%rip),%rcx
mov    $0x5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x00\00"
define void @t_isprint_0x00() {
%1 = call i64 @isprint(i32 0)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 5, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x00\00"
define void @t_isprint_0x00() {
%1 = tail call i64 @isprint(i32 0)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 5, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}