xunge/DecIR huggingface dataset:
/* Variables and functions */
char *basename(char *);
int /*<<< orphan*/ printf(char *, char *);
void print_usage(char *argv0) {
  printf("\n"
         "   Usage: %s <filename>\n"
         "\n"
         "      Reads from file <filename>, or stdin if none given.\n"
         "      The file is read line-by-line, sorted line-by-line, and\n"
         "      then printed to stdout.\n"
         "\n",
         basename(argv0));
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <basename@plt>
mov    %rax,%rsi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
push   %rax
call   1040 <basename@plt>
lea    0xed3(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [178 x i8] c"\0A Usage: %s <filename>\0A\0A Reads from file <filename>, or stdin if none given.\0A The file is read line-by-line, sorted line-by-line, and\0A then printed to stdout.\0A\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @basename(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([178 x i8], [178 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [178 x i8] c"\0A Usage: %s <filename>\0A\0A Reads from file <filename>, or stdin if none given.\0A The file is read line-by-line, sorted line-by-line, and\0A then printed to stdout.\0A\0A\00"
define void @print_usage(i8* %0) {
%2 = tail call i8* @basename(i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([178 x i8], [178 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
/* Variables and functions */
int f354(int *);
int f355(int *p) { return f354(p); }


x86 assembly (clang, -O0):
<f355>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f354@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f355>:
jmp    1030 <f354@plt>

LLVM IR (-O0):
define i32 @f355(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f354(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f355(i32* %0) {
%2 = tail call i32 @f354(i32* %0)
ret i32 %2
}
void start(float a, float b, float c, float d) {
  __asm__ volatile("flds  %0\n"
                   "fadds %1\n"
                   "flds  %2\n"
                   "fadds %3\n"
                   "fmulp %%st(1)\n"
                   :
                   : "m"(a), "m"(b), "m"(c), "m"(d));
}


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
flds   -0x4(%rbp)
fadds  -0x8(%rbp)
flds   -0xc(%rbp)
fadds  -0x10(%rbp)
fmulp  %st,%st(1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
movss  %xmm0,-0x4(%rsp)
movss  %xmm1,-0x8(%rsp)
movss  %xmm2,-0xc(%rsp)
movss  %xmm3,-0x10(%rsp)
flds   -0x4(%rsp)
fadds  -0x8(%rsp)
flds   -0xc(%rsp)
fadds  -0x10(%rsp)
fmulp  %st,%st(1)
ret

LLVM IR (-O0):
define void @start(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
ret void
}

LLVM IR (-O2):
define void @start(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bwputstr(char *);
void FIQ_handler(void) {
  bwputstr("FIQ's are not supported on this system!\n\r");
  while (1)
    ;
}


x86 assembly (clang, -O0):
<FIQ_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <bwputstr@plt>
jmp    1120 <FIQ_handler+0x10>

x86 assembly (clang, -O2):
<FIQ_handler>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <bwputstr@plt>
nopl   (%rax)
jmp    1120 <FIQ_handler+0x10>

LLVM IR (-O0):
@.str = [42 x i8] c"FIQ's are not supported on this system!\0A\0D\00"
define void @FIQ_handler() {
%1 = call i32 @bwputstr(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [42 x i8] c"FIQ's are not supported on this system!\0A\0D\00"
define void @FIQ_handler() {
%1 = tail call i32 @bwputstr(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}
int do_088() { return 88; }


x86 assembly (clang, -O0):
<do_088>:
push   %rbp
mov    %rsp,%rbp
mov    $0x58,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_088>:
mov    $0x58,%eax
ret

LLVM IR (-O0):
define i32 @do_088() {
ret i32 88
}

LLVM IR (-O2):
define i32 @do_088() {
ret i32 88
}
void GPMCECCBCHErrCorrectionCapSelect(unsigned int baseAddr,
                                      unsigned int errCorrCapVal) {
  (*((volatile unsigned int *)(baseAddr + (0x1F4)))) &= ~(0x00003000u);
  (*((volatile unsigned int *)(baseAddr + (0x1F4)))) |=
      ((errCorrCapVal << (0x0000000Cu)) & (0x00003000u));
}


x86 assembly (clang, -O0):
<GPMCECCBCHErrCorrectionCapSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1f4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffcfff,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
shl    $0xc,%edx
and    $0x3000,%edx
mov    -0x4(%rbp),%eax
add    $0x1f4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCECCBCHErrCorrectionCapSelect>:
add    $0x1f4,%edi
andl   $0xffffcfff,(%rdi)
and    $0x3,%esi
shl    $0xc,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPMCECCBCHErrCorrectionCapSelect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 500
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -12289
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = shl i32 %11, 12
%13 = and i32 %12, 12288
%14 = load i32, i32* %3
%15 = add i32 %14, 500
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @GPMCECCBCHErrCorrectionCapSelect(i32 %0, i32 %1) {
%3 = add i32 %0, 500
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -12289
store volatile i32 %7, i32* %5
%8 = shl i32 %1, 12
%9 = and i32 %8, 12288
%10 = load volatile i32, i32* %5
%11 = or i32 %10, %9
store volatile i32 %11, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ assert(int);
void *calloc(size_t, size_t);
int /*<<< orphan*/ perror(char *);
void *qd_calloc(size_t nmemb, size_t size) {
  assert(nmemb && size);
  void *ptr = calloc(nmemb, size);
  if (!ptr) {
    perror("qd_calloc");
    abort();
  }
  return ptr;
}


x86 assembly (clang, -O0):
<qd_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x19(%rbp)
je     116b <qd_calloc+0x2b>
cmpq   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    11a7 <qd_calloc+0x67>
lea    0xe65(%rip),%rdi
call   1060 <perror@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qd_calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
test   %rdi,%rdi
setne  %al
test   %rsi,%rsi
setne  %cl
and    %al,%cl
movzbl %cl,%edi
call   1050 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <calloc@plt>
test   %rax,%rax
je     1178 <qd_calloc+0x38>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe81(%rip),%rdi
call   1060 <perror@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"qd_calloc\00"
define i8* @qd_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i64, i64* %4
%10 = icmp ne i64 %9, 0
br label %11
11: ; preds = %8, %2
%12 = phi i1 [ false, %2 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i64, i64* %3
%16 = load i64, i64* %4
%17 = call i8* @calloc(i64 %15, i64 %16)
store i8* %17, i8** %5
%18 = load i8*, i8** %5
%19 = icmp ne i8* %18, null
br i1 %19, label %23, label %20
20: ; preds = %11
%21 = call i32 @perror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%22 = call i32 (...) @abort()
unreachable
23: ; preds = %11
%24 = load i8*, i8** %5
ret i8* %24
}

LLVM IR (-O2):
@.str = [10 x i8] c"qd_calloc\00"
define noalias i8* @qd_calloc(i64 %0, i64 %1) {
%3 = icmp ne i64 %0, 0
%4 = icmp ne i64 %1, 0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i8* @calloc(i64 %0, i64 %1)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = tail call i32 @perror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%12 = tail call i32 (...) @abort()
unreachable
13: ; preds = %2
ret i8* %8
}
/* Variables and functions */
int strcmp(char *, char *);
int strcmp_wrapper(char *v1, char *v2, ...) { return strcmp(v1, v2); }


x86 assembly (clang, -O0):
<strcmp_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_wrapper>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @strcmp_wrapper(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcmp_wrapper(i8* nocapture %0, i8* nocapture %1, ...) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ boxfill8(char *, int, int, int, int, int, int);
int /*<<< orphan*/ init_palette();
int /*<<< orphan*/ io_hlt();
void HariMain(void) {
  char *p;
  init_palette();
  p = (char *)0xa0000;
  boxfill8(p, 320, 1, 20, 20, 120, 120);
  boxfill8(p, 320, 2, 70, 50, 170, 150);
  boxfill8(p, 320, 4, 120, 80, 220, 180);
  for (;;) {
    io_hlt();
  }
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <init_palette@plt>
mov    $0xa0000,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x140,%esi
mov    $0x1,%edx
mov    $0x14,%r8d
mov    $0x78,%r9d
mov    %r8d,%ecx
movl   $0x78,(%rsp)
call   1030 <boxfill8@plt>
mov    -0x8(%rbp),%rdi
mov    $0x140,%esi
mov    $0x2,%edx
mov    $0x46,%ecx
mov    $0x32,%r8d
mov    $0xaa,%r9d
movl   $0x96,(%rsp)
call   1030 <boxfill8@plt>
mov    -0x8(%rbp),%rdi
mov    $0x140,%esi
mov    $0x4,%edx
mov    $0x78,%ecx
mov    $0x50,%r8d
mov    $0xdc,%r9d
movl   $0xb4,(%rsp)
call   1030 <boxfill8@plt>
mov    $0x0,%al
call   1040 <io_hlt@plt>
jmp    11c7 <HariMain+0x97>

x86 assembly (clang, -O2):
<HariMain>:
push   %rax
xor    %eax,%eax
call   1050 <init_palette@plt>
movl   $0x78,(%rsp)
mov    $0xa0000,%edi
mov    $0x140,%esi
mov    $0x1,%edx
mov    $0x14,%ecx
mov    $0x14,%r8d
mov    $0x78,%r9d
call   1030 <boxfill8@plt>
movl   $0x96,(%rsp)
mov    $0xa0000,%edi
mov    $0x140,%esi
mov    $0x2,%edx
mov    $0x46,%ecx
mov    $0x32,%r8d
mov    $0xaa,%r9d
call   1030 <boxfill8@plt>
movl   $0xb4,(%rsp)
mov    $0xa0000,%edi
mov    $0x140,%esi
mov    $0x4,%edx
mov    $0x78,%ecx
mov    $0x50,%r8d
mov    $0xdc,%r9d
call   1030 <boxfill8@plt>
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <io_hlt@plt>
jmp    11c0 <HariMain+0x90>

LLVM IR (-O0):
define void @HariMain() {
%1 = alloca i8*
%2 = call i32 (...) @init_palette()
store i8* inttoptr (i64 655360 to i8*), i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @boxfill8(i8* %3, i32 320, i32 1, i32 20, i32 20, i32 120, i32 120)
%5 = load i8*, i8** %1
%6 = call i32 @boxfill8(i8* %5, i32 320, i32 2, i32 70, i32 50, i32 170, i32 150)
%7 = load i8*, i8** %1
%8 = call i32 @boxfill8(i8* %7, i32 320, i32 4, i32 120, i32 80, i32 220, i32 180)
br label %9
9: ; preds = %9, %0
%10 = call i32 (...) @io_hlt()
br label %9
}

LLVM IR (-O2):
define void @HariMain() {
%1 = tail call i32 (...) @init_palette()
%2 = tail call i32 @boxfill8(i8* inttoptr (i64 655360 to i8*), i32 320, i32 1, i32 20, i32 20, i32 120, i32 120)
%3 = tail call i32 @boxfill8(i8* inttoptr (i64 655360 to i8*), i32 320, i32 2, i32 70, i32 50, i32 170, i32 150)
%4 = tail call i32 @boxfill8(i8* inttoptr (i64 655360 to i8*), i32 320, i32 4, i32 120, i32 80, i32 220, i32 180)
br label %5
5: ; preds = %5, %0
%6 = tail call i32 (...) @io_hlt()
br label %5
}
signed long long ffi_test_59(signed long long x) { return x; }


x86 assembly (clang, -O0):
<ffi_test_59>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_test_59>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ffi_test_59(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @ffi_test_59(i64 returned %0) {
ret i64 %0
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void RFCCpe1IntSelect(uint32_t ui32Mask) {
  (*((volatile unsigned long *)(0x40041000 + 0x00000018))) |= ui32Mask;
}


x86 assembly (clang, -O0):
<RFCCpe1IntSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x40041018,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x40041018,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RFCCpe1IntSelect>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
or     %rax,0x40041018
40
ret

LLVM IR (-O0):
define void @RFCCpe1IntSelect(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074008088 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074008088 to i64*)
ret void
}

LLVM IR (-O2):
define void @RFCCpe1IntSelect(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074008088 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074008088 to i64*)
ret void
}
void define_kernel_adios_variables_(void) {}


x86 assembly (clang, -O0):
<define_kernel_adios_variables_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<define_kernel_adios_variables_>:
ret

LLVM IR (-O0):
define void @define_kernel_adios_variables_() {
ret void
}

LLVM IR (-O2):
define void @define_kernel_adios_variables_() {
ret void
}
int config_TOUCH(void) { return 1; }


x86 assembly (clang, -O0):
<config_TOUCH>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_TOUCH>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @config_TOUCH() {
ret i32 1
}

LLVM IR (-O2):
define i32 @config_TOUCH() {
ret i32 1
}
/* Variables and functions */
double genrand_int32();
double random_double4(double l, double u) {
  return l + (u - l) * (genrand_int32() / ((double)4294967295.0));
}


x86 assembly (clang, -O0):
<random_double4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1030 <genrand_int32@plt>
movsd  -0x20(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x18(%rbp),%xmm0
movsd  0xea9(%rip),%xmm3
divsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_double4>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
subsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
xor    %eax,%eax
call   1030 <genrand_int32@plt>
divsd  0xecd(%rip),%xmm0
mulsd  0x8(%rsp),%xmm0
addsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @random_double4(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fsub double %6, %7
%9 = call double (...) @genrand_int32()
%10 = fdiv double %9, 0x41EFFFFFFFE00000
%11 = call double @llvm.fmuladd.f64(double %8, double %10, double %5)
ret double %11
}

LLVM IR (-O2):
define double @random_double4(double %0, double %1) {
%3 = fsub double %1, %0
%4 = tail call double (...) @genrand_int32()
%5 = fdiv double %4, 0x41EFFFFFFFE00000
%6 = tail call double @llvm.fmuladd.f64(double %3, double %5, double %0)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ arm_strcpy(char *, char const *);
size_t arm_strlen(char *);
char *arm_strcat(char *dest, const char *src) {
  arm_strcpy(&dest[arm_strlen(dest)], src);
  return dest;
}


x86 assembly (clang, -O0):
<arm_strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <arm_strlen@plt>
mov    -0x18(%rbp),%rdi
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <arm_strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_strcat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <arm_strlen@plt>
lea    (%rax,%rbx,1),%rdi
mov    %r14,%rsi
call   1030 <arm_strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @arm_strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i64 @arm_strlen(i8* %6)
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8*, i8** %4
%10 = call i32 @arm_strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @arm_strcat(i8* returned %0, i8* %1) {
%3 = tail call i64 @arm_strlen(i8* %0)
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = tail call i32 @arm_strcpy(i8* %4, i8* %1)
ret i8* %0
}
__attribute__((always_)) void bss_init(unsigned int start, unsigned int len) {
  unsigned int *pulDest = (unsigned int *)start;
  unsigned int loop;
  for (loop = 0; loop < len; loop = loop + 4)
    *pulDest++ = 0;
}


x86 assembly (clang, -O0):
<bss_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1147 <bss_init+0x47>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
movl   $0x0,(%rax)
mov    -0x14(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x14(%rbp)
jmp    1118 <bss_init+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bss_init>:
test   %esi,%esi
je     112e <bss_init+0x1e>
push   %rax
mov    %esi,%edx
mov    %edi,%edi
add    $0xffffffff,%edx
and    $0xfffffffc,%edx
add    $0x4,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @bss_init(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %5
store i32 0, i32* %6
br label %10
10: ; preds = %17, %2
%11 = load i32, i32* %6
%12 = load i32, i32* %4
%13 = icmp ult i32 %11, %12
br i1 %13, label %14, label %20
14: ; preds = %10
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i32 1
store i32* %16, i32** %5
store i32 0, i32* %15
br label %17
17: ; preds = %14
%18 = load i32, i32* %6
%19 = add i32 %18, 4
store i32 %19, i32* %6
br label %10
20: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @bss_init(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = zext i32 %0 to i64
%6 = inttoptr i64 %5 to i8*
%7 = add i32 %1, -1
%8 = and i32 %7, -4
%9 = zext i32 %8 to i64
%10 = add nuw nsw i64 %9, 4
br label %11
11: ; preds = %4, %2
ret void
}
/* Variables and functions */
int StdHepXdrReadOpen(char *, int, int);
int /*<<< orphan*/ mcfioC_Init();
int StdHepXdrReadInit(char *filename, int ntries, int ist) {
  int ierr;
  mcfioC_Init();
  ierr = StdHepXdrReadOpen(filename, ntries, ist);
  return ierr;
}


x86 assembly (clang, -O0):
<StdHepXdrReadInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x0,%al
call   1040 <mcfioC_Init@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <StdHepXdrReadOpen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StdHepXdrReadInit>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <mcfioC_Init@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <StdHepXdrReadOpen@plt>

LLVM IR (-O0):
define i32 @StdHepXdrReadInit(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = call i32 (...) @mcfioC_Init()
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @StdHepXdrReadOpen(i8* %9, i32 %10, i32 %11)
store i32 %12, i32* %7
%13 = load i32, i32* %7
ret i32 %13
}

LLVM IR (-O2):
define i32 @StdHepXdrReadInit(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @mcfioC_Init()
%5 = tail call i32 @StdHepXdrReadOpen(i8* %0, i32 %1, i32 %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_2d_array(void *m) { free(m); }


x86 assembly (clang, -O0):
<free_2d_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_2d_array>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_2d_array(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @free_2d_array(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool adts_get_protection_absent(const uint8_t *p_adts) {
  return !!(p_adts[1] & 0x01);
}


x86 assembly (clang, -O0):
<adts_get_protection_absent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adts_get_protection_absent>:
mov    0x4(%rdi),%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @adts_get_protection_absent(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @adts_get_protection_absent(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int PAPI_library_init(int);
void papif_library_init__(int *check) { *check = PAPI_library_init(*check); }


x86 assembly (clang, -O0):
<papif_library_init__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <PAPI_library_init@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_library_init__>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <PAPI_library_init@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_library_init__(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @PAPI_library_init(i32 %4)
%6 = load i32*, i32** %2
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @papif_library_init__(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @PAPI_library_init(i32 %2)
store i32 %3, i32* %0
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long stipple;
};
typedef TYPE_1__ XGCValues;

/* Variables and functions */
void set_XGCValues_stipple(void *_p, unsigned long _v) {
  ((XGCValues *)_p)->stipple = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XGCValues_stipple>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XGCValues_stipple>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XGCValues_stipple(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XGCValues_stipple(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
void CFGMR3GetChild(void) {}


x86 assembly (clang, -O0):
<CFGMR3GetChild>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3GetChild>:
ret

LLVM IR (-O0):
define void @CFGMR3GetChild() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3GetChild() {
ret void
}
/* Variables and functions */
int strtol(char *, int /*<<< orphan*/, int /*<<< orphan*/);
int cfg_number(char *s) { return strtol(s, 0, 0); }


x86 assembly (clang, -O0):
<cfg_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <strtol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_number>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i32 @cfg_number(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strtol(i8* %3, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cfg_number(i8* %0) {
%2 = tail call i32 @strtol(i8* %0, i32 0, i32 0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t implicitSignChange(uint32_t argc) { return argc; }


x86 assembly (clang, -O0):
<implicitSignChange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<implicitSignChange>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @implicitSignChange(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @implicitSignChange(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int unknown1();
void main() {
  int n = unknown1();
  int i = 0, j = 0;
  if (!(n >= 0))
    return;
  while (i < n) {
    i++;
    j++;
  }
  if (j >= n + 1) {
    goto ERROR;
  ERROR:;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <unknown1@plt>
mov    %eax,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    113f <main+0x2f>
jmp    1182 <main+0x72>
jmp    1144 <main+0x34>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1167 <main+0x57>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1144 <main+0x34>
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
cmp    %ecx,%eax
jl     1182 <main+0x72>
jmp    117d <main+0x6d>
jmp    1182 <main+0x72>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <unknown1@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 (...) @unknown1()
store i32 %4, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %1
%6 = icmp sge i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %0
br label %25
8: ; preds = %0
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %2
%11 = load i32, i32* %1
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %9
18: ; preds = %9
%19 = load i32, i32* %3
%20 = load i32, i32* %1
%21 = add nsw i32 %20, 1
%22 = icmp sge i32 %19, %21
br i1 %22, label %23, label %25
23: ; preds = %18
br label %24
24: ; preds = %23
br label %25
25: ; preds = %7, %24, %18
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @unknown1()
ret void
}
void CameraReset(unsigned long ulBase) {
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = 0x00000002;
  while (!((*((volatile unsigned long *)(ulBase + 0x00000014))) & 0x00000001)) {
  }
}


x86 assembly (clang, -O0):
<CameraReset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x2,0x10(%rax)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1136 <CameraReset+0x36>
jmp    113b <CameraReset+0x3b>
jmp    1114 <CameraReset+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CameraReset>:
movq   $0x2,0x10(%rdi)
nopl   0x0(%rax,%rax,1)
testq  $0x1,0x14(%rdi)
je     1110 <CameraReset+0x10>
ret

LLVM IR (-O0):
define void @CameraReset(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 16
%5 = inttoptr i64 %4 to i64*
store volatile i64 2, i64* %5
br label %6
6: ; preds = %14, %1
%7 = load i64, i64* %2
%8 = add i64 %7, 20
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, 1
%12 = icmp ne i64 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %15
14: ; preds = %6
br label %6
15: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @CameraReset(i64 %0) {
%2 = add i64 %0, 16
%3 = inttoptr i64 %2 to i64*
store volatile i64 2, i64* %3
%4 = add i64 %0, 20
%5 = inttoptr i64 %4 to i64*
br label %6
6: ; preds = %6, %1
%7 = load volatile i64, i64* %5
%8 = and i64 %7, 1
%9 = icmp eq i64 %8, 0
br i1 %9, label %6, label %10
10: ; preds = %6
ret void
}
char add(char c) {
  c += 1;
  return c;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x1,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @add(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = add nsw i32 %4, 1
%6 = trunc i32 %5 to i8
store i8 %6, i8* %2
%7 = load i8, i8* %2
ret i8 %7
}

LLVM IR (-O2):
define signext i8 @add(i8 signext %0) {
%2 = add i8 %0, 1
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ check_read(unsigned short, char *);
void insw(unsigned short int port, void *addr, unsigned long int count) {
  for (unsigned long int i = 0; i < count; i++) {
    check_read(port + i, "insb");
  }
}


x86 assembly (clang, -O0):
<insw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1165 <insw+0x55>
movzwl -0x2(%rbp),%eax
add    -0x20(%rbp),%rax
lea    0xeb4(%rip),%rsi
movzwl %ax,%edi
call   1030 <check_read@plt>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112f <insw+0x1f>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insw>:
push   %rbp
push   %r14
push   %rbx
test   %rdx,%rdx
je     1146 <insw+0x36>
mov    %rdx,%rbx
mov    %edi,%ebp
lea    0xedb(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
movzwl %bp,%ebp
mov    %ebp,%edi
mov    %r14,%rsi
call   1030 <check_read@plt>
add    $0x1,%ebp
add    $0xffffffffffffffff,%rbx
jne    1130 <insw+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"insb\00"
define void @insw(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i64 0, i64* %7
br label %8
8: ; preds = %19, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i16, i16* %4
%14 = zext i16 %13 to i64
%15 = load i64, i64* %7
%16 = add i64 %14, %15
%17 = trunc i64 %16 to i16
%18 = call i32 @check_read(i16 zeroext %17, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %12
%20 = load i64, i64* %7
%21 = add i64 %20, 1
store i64 %21, i64* %7
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"insb\00"
define void @insw(i16 zeroext %0, i8* nocapture readnone %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %5, label %6
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i64 [ %11, %6 ], [ 0, %3 ]
%8 = trunc i64 %7 to i16
%9 = add i16 %8, %0
%10 = tail call i32 @check_read(i16 zeroext %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%11 = add nuw i64 %7, 1
%12 = icmp eq i64 %11, %2
br i1 %12, label %5, label %6
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_gettid;
int /*<<< orphan*/ syscall(int /*<<< orphan*/);
pid_t my_gettid(void) { return syscall(__NR_gettid); }


x86 assembly (clang, -O0):
<my_gettid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_gettid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_gettid = global i32 0
define i32 @my_gettid() {
%1 = load i32, i32* @__NR_gettid
%2 = call i32 @syscall(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@__NR_gettid = global i32 0
define i32 @my_gettid() {
%1 = load i32, i32* @__NR_gettid
%2 = tail call i32 @syscall(i32 %1)
ret i32 %2
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int sd_event_source_set_io_fd(void *s,
                                                                     int fd) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_source_set_io_fd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    0x2ecc(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_source_set_io_fd>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_source_set_io_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_source_set_io_fd(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
int test_imm_AEint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0xAE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AEint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0xae,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AEint64_highword_mem>:
testb  $0xae,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AEint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 174
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_AEint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 747324309504
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned int null_read(struct fs_node *node, unsigned int offset,
                       unsigned int size, char *buffer) {
  (void)node;
  (void)offset;
  (void)size;
  (void)buffer;
  return 0;
}


x86 assembly (clang, -O0):
<null_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_read>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fs_node = type opaque
define i32 @null_read(%struct.fs_node* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.fs_node*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store %struct.fs_node* %0, %struct.fs_node** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load %struct.fs_node*, %struct.fs_node** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %8
ret i32 0
}

LLVM IR (-O2):
%struct.fs_node = type opaque
define i32 @null_read(%struct.fs_node* nocapture readnone %0, i32 %1, i32 %2, i8* nocapture readnone %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ swap(int *, int *);
int main() {
  int a = 4;
  int b = 8;
  printf("Antes de swap(): a=%d y b=%d\n", a, b);
  swap(&a, &b);
  printf("Después de swap(): a=%d y b=%d\n", a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
movl   $0x8,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <swap@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x4,0x4(%rsp)
movl   $0x8,(%rsp)
lea    0xec9(%rip),%rdi
mov    $0x4,%esi
mov    $0x8,%edx
call   1030 <printf@plt>
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <swap@plt>
mov    0x4(%rsp),%esi
mov    (%rsp),%edx
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"Antes de swap(): a=%d y b=%d\0A\00"
@.str.1 = [33 x i8] c"Despu\C3\A9s de swap(): a=%d y b=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 4, i32* %2
store i32 8, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = call i32 @swap(i32* %2, i32* %3)
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"Antes de swap(): a=%d y b=%d\0A\00"
@.str.1 = [33 x i8] c"Despu\C3\A9s de swap(): a=%d y b=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 4, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 8, i32* %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 4, i32 8)
%6 = call i32 @swap(i32* %1, i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32 %8)
ret i32 0
}
void XSetInputFocus() {}


x86 assembly (clang, -O0):
<XSetInputFocus>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetInputFocus>:
ret

LLVM IR (-O0):
define void @XSetInputFocus() {
ret void
}

LLVM IR (-O2):
define void @XSetInputFocus() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t ieee802154_get_seq(const uint8_t *mhr) { return mhr[2]; }


x86 assembly (clang, -O0):
<ieee802154_get_seq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee802154_get_seq>:
mov    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ieee802154_get_seq(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @ieee802154_get_seq(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
ret i32 %3
}
double foo(double x) { return (x + 0.5 - x - 0.5); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  0xedd(%rip),%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movsd  0xef8(%rip),%xmm1
addsd  %xmm0,%xmm1
subsd  %xmm0,%xmm1
addsd  0xef0(%rip),%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @foo(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = load double, double* %2
%6 = fsub double %4, %5
%7 = fsub double %6, 5.000000e-01
ret double %7
}

LLVM IR (-O2):
define double @foo(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = fsub double %2, %0
%4 = fadd double %3, -5.000000e-01
ret double %4
}
/* Type definitions */
struct music_pipe {
  int dummy;
};

/* Variables and functions */
scalar_t__ music_pipe_size(struct music_pipe const *);
__attribute__((pure)) bool music_pipe_empty(const struct music_pipe *mp) {
  return music_pipe_size(mp) == 0;
}


x86 assembly (clang, -O0):
<music_pipe_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <music_pipe_size@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<music_pipe_empty>:
push   %rax
call   1030 <music_pipe_size@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.music_pipe = type { i32 }
define i32 @music_pipe_empty(%struct.music_pipe* %0) {
%2 = alloca %struct.music_pipe*
store %struct.music_pipe* %0, %struct.music_pipe** %2
%3 = load %struct.music_pipe*, %struct.music_pipe** %2
%4 = call i64 @music_pipe_size(%struct.music_pipe* %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.music_pipe = type { i32 }
define i32 @music_pipe_empty(%struct.music_pipe* %0) {
%2 = tail call i64 @music_pipe_size(%struct.music_pipe* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *Malloc(size_t size) {
  void *ptr = malloc(size);
  if (ptr == NULL && size > 0) {
    do {
      fprintf(stderr, "csv"
                      ": "
                      "out of memory\n");
      exit(10);
    } while (0);
  }
  return ptr;
}


x86 assembly (clang, -O0):
<Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1183 <Malloc+0x53>
cmpq   $0x0,-0x8(%rbp)
jbe    1183 <Malloc+0x53>
jmp    1164 <Malloc+0x34>
mov    0x2e75(%rip),%rax
mov    (%rax),%edi
lea    0xe8c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xa,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Malloc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <malloc@plt>
test   %rbx,%rbx
je     1143 <Malloc+0x13>
test   %rax,%rax
je     1145 <Malloc+0x15>
pop    %rbx
ret
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
lea    0xeab(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xa,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"csv: out of memory\0A\00"
define i8* @Malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %17
8: ; preds = %1
%9 = load i64, i64* %2
%10 = icmp ugt i64 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %8
br label %12
12: ; preds = %11
%13 = load i32, i32* @stderr
%14 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 10)
unreachable
16: ; No predecessors!
br label %17
17: ; preds = %16, %8, %1
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"csv: out of memory\0A\00"
define noalias i8* @Malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
%4 = icmp ne i64 %0, 0
%5 = and i1 %4, %3
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @exit(i32 10)
unreachable
10: ; preds = %1
ret i8* %2
}
void fill_one_span_write(unsigned char *start_ptr, unsigned char *end_ptr) {
  unsigned char *p;
  p = start_ptr;
  while (p < end_ptr) {
    *p = '1';
    p += ((64) / 2);
  }
}


x86 assembly (clang, -O0):
<fill_one_span_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    113a <fill_one_span_write+0x3a>
mov    -0x18(%rbp),%rax
movb   $0x31,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <fill_one_span_write+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_one_span_write>:
cmp    %rsi,%rdi
jae    111c <fill_one_span_write+0x1c>
cs nopw 0x0(%rax,%rax,1)
nop
movb   $0x31,(%rdi)
add    $0x20,%rdi
cmp    %rsi,%rdi
jb     1110 <fill_one_span_write+0x10>
ret

LLVM IR (-O0):
define void @fill_one_span_write(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %5
%9 = load i8*, i8** %4
%10 = icmp ult i8* %8, %9
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8*, i8** %5
store i8 49, i8* %12
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i64 32
store i8* %14, i8** %5
br label %7
15: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @fill_one_span_write(i8* writeonly %0, i8* readnone %1) {
%3 = icmp ult i8* %0, %1
br i1 %3, label %4, label %8
4: ; preds = %2, %4
%5 = phi i8* [ %6, %4 ], [ %0, %2 ]
store i8 49, i8* %5
%6 = getelementptr inbounds i8, i8* %5, i64 32
%7 = icmp ult i8* %6, %1
br i1 %7, label %4, label %8
8: ; preds = %4, %2
ret void
}