xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
int _err_default_hook(const char *s) {
  fprintf(stderr, "ERROR %s", s);
  fflush(stderr);
  return 0;
}


x86 assembly (clang, -O0):
<_err_default_hook>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_err_default_hook>:
push   %rbx
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
call   1040 <fflush@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [9 x i8] c"ERROR %s\00"
define i32 @_err_default_hook(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fflush(i32 %6)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [9 x i8] c"ERROR %s\00"
define i32 @_err_default_hook(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fflush(i32 %4)
ret i32 0
}
/* Type definitions */
struct tree_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ serialize_inorder(struct tree_node *);
int /*<<< orphan*/ serialize_preorder(struct tree_node *);
void serialize(struct tree_node *root) {
  if (root == NULL) {
    return;
  }
  serialize_preorder(root);
  printf("\n");
  serialize_inorder(root);
  printf("\n");
}


x86 assembly (clang, -O0):
<serialize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114c <serialize+0x1c>
jmp    1176 <serialize+0x46>
mov    -0x8(%rbp),%rdi
call   1040 <serialize_preorder@plt>
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1050 <serialize_inorder@plt>
lea    0xe8f(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize>:
test   %rdi,%rdi
je     115b <serialize+0x2b>
push   %rbx
mov    %rdi,%rbx
call   1040 <serialize_preorder@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    %rbx,%rdi
call   1050 <serialize_inorder@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>
ret

LLVM IR (-O0):
%struct.tree_node = type { i32 }
@.str = [2 x i8] c"\0A\00"
define void @serialize(%struct.tree_node* %0) {
%2 = alloca %struct.tree_node*
store %struct.tree_node* %0, %struct.tree_node** %2
%3 = load %struct.tree_node*, %struct.tree_node** %2
%4 = icmp eq %struct.tree_node* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %13
6: ; preds = %1
%7 = load %struct.tree_node*, %struct.tree_node** %2
%8 = call i32 @serialize_preorder(%struct.tree_node* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%10 = load %struct.tree_node*, %struct.tree_node** %2
%11 = call i32 @serialize_inorder(%struct.tree_node* %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.tree_node = type { i32 }
define void @serialize(%struct.tree_node* %0) {
%2 = icmp eq %struct.tree_node* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 @serialize_preorder(%struct.tree_node* %0)
%5 = tail call i32 @putchar(i32 10)
%6 = tail call i32 @serialize_inorder(%struct.tree_node* %0)
%7 = tail call i32 @putchar(i32 10)
br label %8
8: ; preds = %1, %3
ret void
}
signed char ClampCharMove(int i) {
  if (i < -127) {
    return -127;
  }
  if (i > 127) {
    return 127;
  }
  return i;
}


x86 assembly (clang, -O0):
<ClampCharMove>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffff81,-0x8(%rbp)
jge    111a <ClampCharMove+0x1a>
movb   $0x81,-0x1(%rbp)
jmp    1133 <ClampCharMove+0x33>
cmpl   $0x7f,-0x8(%rbp)
jle    112d <ClampCharMove+0x2d>
movb   $0x7f,-0x1(%rbp)
jmp    1133 <ClampCharMove+0x33>
mov    -0x8(%rbp),%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClampCharMove>:
cmp    $0x7f,%edi
mov    $0x7f,%ecx
cmovl  %edi,%ecx
cmp    $0xffffff82,%ecx
mov    $0x81,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @ClampCharMove(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, -127
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 -127, i8* %2
br label %14
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 127
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 127, i8* %2
br label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = trunc i32 %12 to i8
store i8 %13, i8* %2
br label %14
14: ; preds = %11, %10, %6
%15 = load i8, i8* %2
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @ClampCharMove(i32 %0) {
%2 = icmp slt i32 %0, 127
%3 = select i1 %2, i32 %0, i32 127
%4 = icmp sgt i32 %3, -127
%5 = select i1 %4, i32 %3, i32 -127
%6 = trunc i32 %5 to i8
ret i8 %6
}
char *langDbgDevMoonsound() { return "Moonsound"; }


x86 assembly (clang, -O0):
<langDbgDevMoonsound>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langDbgDevMoonsound>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Moonsound\00"
define i8* @langDbgDevMoonsound() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"Moonsound\00"
define i8* @langDbgDevMoonsound() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int rand();
int throw_dice() {
  int dice1 = rand() % 6 + 1;
  int dice2 = rand() % 6 + 1;
  return dice1 + dice2;
}


x86 assembly (clang, -O0):
<throw_dice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x6,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x6,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<throw_dice>:
push   %rbx
xor    %eax,%eax
call   1030 <rand@plt>
movslq %eax,%rbx
imul   $0x2aaaaaab,%rbx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,2),%eax
sub    %eax,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x2aaaaaab,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
add    %ebx,%eax
add    $0x2,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @throw_dice() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @rand()
%4 = srem i32 %3, 6
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
%6 = call i32 (...) @rand()
%7 = srem i32 %6, 6
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
%9 = load i32, i32* %1
%10 = load i32, i32* %2
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @throw_dice() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 6
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, 6
%5 = add nsw i32 %2, 2
%6 = add nsw i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ disconnectedListen();
int main(void) {
  disconnectedListen();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <disconnectedListen@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <disconnectedListen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @disconnectedListen()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @disconnectedListen()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_rtclock_hrtimer_enable() {
  printf("NOT IMPLEMENTED:"
         "pa_rtclock_hrtimer_enable"
         "\n");
}


x86 assembly (clang, -O0):
<pa_rtclock_hrtimer_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_rtclock_hrtimer_enable>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"NOT IMPLEMENTED:pa_rtclock_hrtimer_enable\0A\00"
define i32 @pa_rtclock_hrtimer_enable() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [42 x i8] c"NOT IMPLEMENTED:pa_rtclock_hrtimer_enable\00"
define i32 @pa_rtclock_hrtimer_enable() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x8f() {
  Assert_real((isxdigit(143) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              720, ("isxdigit should be 0 for 0x8f"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x8f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8f,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2d0,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x8f>:
push   %rax
mov    $0x8f,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x2d0,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0x8f\00"
define void @t_isxdigit_0x8f() {
%1 = call i64 @isxdigit(i32 143)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 720, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0x8f\00"
define void @t_isxdigit_0x8f() {
%1 = tail call i64 @isxdigit(i32 143)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 720, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p224_divstep_precomp(uintptr_t);
void fiat_p224_divstep_precomp(uint64_t out1[4]) {
  internal_fiat_p224_divstep_precomp((uintptr_t)out1);
}


x86 assembly (clang, -O0):
<fiat_p224_divstep_precomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <internal_fiat_p224_divstep_precomp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p224_divstep_precomp>:
jmp    1030 <internal_fiat_p224_divstep_precomp@plt>

LLVM IR (-O0):
define void @fiat_p224_divstep_precomp(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = ptrtoint i32* %3 to i64
%5 = call i32 @internal_fiat_p224_divstep_precomp(i64 %4)
ret void
}

LLVM IR (-O2):
define void @fiat_p224_divstep_precomp(i32* %0) {
%2 = ptrtoint i32* %0 to i64
%3 = tail call i32 @internal_fiat_p224_divstep_precomp(i64 %2)
ret void
}
/* Variables and functions */
float mysqrt(float);
__attribute__((always_)) float distance(float cx, float cy, float x, float y) {
  float X = x - cx;
  float Y = y - cy;
  return mysqrt(X * X + Y * Y);
}


x86 assembly (clang, -O0):
<distance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x10(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x14(%rbp),%xmm0
movss  -0x14(%rbp),%xmm2
movss  -0x18(%rbp),%xmm1
mulss  -0x18(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1030 <mysqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<distance>:
subss  %xmm0,%xmm2
subss  %xmm1,%xmm3
mulss  %xmm3,%xmm3
mulss  %xmm2,%xmm2
addss  %xmm3,%xmm2
movaps %xmm2,%xmm0
jmp    1030 <mysqrt@plt>

LLVM IR (-O0):
define float @distance(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%11 = load float, float* %7
%12 = load float, float* %5
%13 = fsub float %11, %12
store float %13, float* %9
%14 = load float, float* %8
%15 = load float, float* %6
%16 = fsub float %14, %15
store float %16, float* %10
%17 = load float, float* %9
%18 = load float, float* %9
%19 = load float, float* %10
%20 = load float, float* %10
%21 = fmul float %19, %20
%22 = call float @llvm.fmuladd.f32(float %17, float %18, float %21)
%23 = call float @mysqrt(float %22)
ret float %23
}

LLVM IR (-O2):
define float @distance(float %0, float %1, float %2, float %3) {
%5 = fsub float %2, %0
%6 = fsub float %3, %1
%7 = fmul float %6, %6
%8 = tail call float @llvm.fmuladd.f32(float %5, float %5, float %7)
%9 = tail call float @mysqrt(float %8)
ret float %9
}
int q_sortByB(const void *pp, const void *qp) {
  return (*(unsigned int *)pp & 0x000000FF) -
         (*(unsigned int *)qp & 0x000000FF);
}


x86 assembly (clang, -O0):
<q_sortByB>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xff,%eax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
and    $0xff,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<q_sortByB>:
movzbl (%rdi),%eax
movzbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @q_sortByB(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = and i32 %7, 255
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = and i32 %11, 255
%13 = sub i32 %8, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @q_sortByB(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = and i32 %4, 255
%6 = bitcast i8* %1 to i32*
%7 = load i32, i32* %6
%8 = and i32 %7, 255
%9 = sub nsw i32 %5, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ memcpy_len_Good(size_t);
size_t unknown();
void call_memcpy_len2_Good() {
  size_t x = unknown();
  memcpy_len_Good(x);
}


x86 assembly (clang, -O0):
<call_memcpy_len2_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <unknown@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <memcpy_len_Good@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_memcpy_len2_Good>:
push   %rax
xor    %eax,%eax
call   1030 <unknown@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <memcpy_len_Good@plt>

LLVM IR (-O0):
define void @call_memcpy_len2_Good() {
%1 = alloca i64
%2 = call i64 (...) @unknown()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = call i32 @memcpy_len_Good(i64 %3)
ret void
}

LLVM IR (-O2):
define void @call_memcpy_len2_Good() {
%1 = tail call i64 (...) @unknown()
%2 = tail call i32 @memcpy_len_Good(i64 %1)
ret void
}
void mi1040_stop_stream(struct msm_sensor_ctrl_t *s_ctrl) {}


x86 assembly (clang, -O0):
<mi1040_stop_stream>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mi1040_stop_stream>:
ret

LLVM IR (-O0):
%struct.msm_sensor_ctrl_t = type opaque
define void @mi1040_stop_stream(%struct.msm_sensor_ctrl_t* %0) {
%2 = alloca %struct.msm_sensor_ctrl_t*
store %struct.msm_sensor_ctrl_t* %0, %struct.msm_sensor_ctrl_t** %2
ret void
}

LLVM IR (-O2):
%struct.msm_sensor_ctrl_t = type opaque
define void @mi1040_stop_stream(%struct.msm_sensor_ctrl_t* nocapture %0) {
ret void
}
int d1(int x, int y) {
  int t = x & y;
  int tt = x | y;
  unsigned tt1 = tt + 1;
  return t - tt1;
}


x86 assembly (clang, -O0):
<d1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d1>:
mov    %esi,%eax
and    %edi,%eax
or     %edi,%esi
not    %esi
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @d1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = and i32 %8, %9
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = or i32 %11, %12
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 1
store i32 %15, i32* %7
%16 = load i32, i32* %5
%17 = load i32, i32* %7
%18 = sub i32 %16, %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @d1(i32 %0, i32 %1) {
%3 = and i32 %1, %0
%4 = or i32 %1, %0
%5 = xor i32 %4, -1
%6 = add i32 %3, %5
ret i32 %6
}
void RTVfsNewIoStream(void) {}


x86 assembly (clang, -O0):
<RTVfsNewIoStream>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsNewIoStream>:
ret

LLVM IR (-O0):
define void @RTVfsNewIoStream() {
ret void
}

LLVM IR (-O2):
define void @RTVfsNewIoStream() {
ret void
}
void *XSharpPCFCreate(void *dpy, void *image) {}


x86 assembly (clang, -O0):
<XSharpPCFCreate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSharpPCFCreate>:
ret

LLVM IR (-O0):
define i8* @XSharpPCFCreate(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @XSharpPCFCreate(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, void *, void *);
int expect_vap(void *expected, void *ret) {
  printf("\tVAP Expected 0x%p, Got 0x%p\n", expected, ret);
  fflush(NULL);
  if (ret == expected) {
    return 0;
  }
  return -1;
}


x86 assembly (clang, -O0):
<expect_vap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    1167 <expect_vap+0x47>
movl   $0x0,-0x4(%rbp)
jmp    116e <expect_vap+0x4e>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect_vap>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <fflush@plt>
xor    %eax,%eax
cmp    %rbx,%r14
setne  %al
neg    %eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [30 x i8] c"\09VAP Expected 0x%p, Got 0x%p\0A\00"
define i32 @expect_vap(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
%9 = call i32 @fflush(i32* null)
%10 = load i8*, i8** %5
%11 = load i8*, i8** %4
%12 = icmp eq i8* %10, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %15
14: ; preds = %2
store i32 -1, i32* %3
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [30 x i8] c"\09VAP Expected 0x%p, Got 0x%p\0A\00"
define i32 @expect_vap(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = tail call i32 @fflush(i32* null)
%5 = icmp ne i8* %1, %0
%6 = sext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
void *GO_memset(void *d, int c, size_t sz) {
  void *tmp = d;
  char *dp = (char *)d;
  while (sz--)
    *dp++ = c;
  return tmp;
}


x86 assembly (clang, -O0):
<GO_memset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     1153 <GO_memset+0x53>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x28(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x28(%rbp)
mov    %cl,(%rax)
jmp    111f <GO_memset+0x1f>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GO_memset>:
push   %rbx
mov    %rdi,%rbx
test   %rdx,%rdx
je     1121 <GO_memset+0x11>
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @GO_memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%9 = load i8*, i8** %4
store i8* %9, i8** %7
%10 = load i8*, i8** %4
store i8* %10, i8** %8
br label %11
11: ; preds = %15, %3
%12 = load i64, i64* %6
%13 = add i64 %12, -1
store i64 %13, i64* %6
%14 = icmp ne i64 %12, 0
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i32, i32* %5
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %8
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %8
store i8 %17, i8* %18
br label %11
20: ; preds = %11
%21 = load i8*, i8** %7
ret i8* %21
}

LLVM IR (-O2):
define i8* @GO_memset(i8* returned writeonly %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
br label %7
7: ; preds = %5, %3
ret i8* %0
}
int irbit2(unsigned long *iseed) {
  if (*iseed & 131072) {
    *iseed = ((*iseed ^ (1 + 2 + 16)) << 1) | 1;
    return 1;
  } else {
    *iseed <<= 1;
    return 0;
  }
}


x86 assembly (clang, -O0):
<irbit2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
and    $0x20000,%rax
cmp    $0x0,%rax
je     1145 <irbit2+0x45>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
xor    $0x13,%rcx
shl    $0x1,%rcx
or     $0x1,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    115a <irbit2+0x5a>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
shl    $0x1,%rcx
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irbit2>:
mov    (%rdi),%rcx
mov    %ecx,%edx
and    $0x20000,%edx
mov    %rdx,%rax
shr    $0x11,%rax
add    %rcx,%rcx
mov    %rcx,%rsi
xor    $0x27,%rsi
test   %rdx,%rdx
cmove  %rcx,%rsi
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define i32 @irbit2(i64* %0) {
%2 = alloca i32
%3 = alloca i64*
store i64* %0, i64** %3
%4 = load i64*, i64** %3
%5 = load i64, i64* %4
%6 = and i64 %5, 131072
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i64*, i64** %3
%10 = load i64, i64* %9
%11 = xor i64 %10, 19
%12 = shl i64 %11, 1
%13 = or i64 %12, 1
%14 = load i64*, i64** %3
store i64 %13, i64* %14
store i32 1, i32* %2
br label %19
15: ; preds = %1
%16 = load i64*, i64** %3
%17 = load i64, i64* %16
%18 = shl i64 %17, 1
store i64 %18, i64* %16
store i32 0, i32* %2
br label %19
19: ; preds = %15, %8
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @irbit2(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 131072
%4 = icmp eq i64 %3, 0
%5 = shl i64 %2, 1
%6 = xor i64 %5, 39
%7 = select i1 %4, i64 %5, i64 %6
%8 = xor i1 %4, true
%9 = zext i1 %8 to i32
store i64 %7, i64* %0
ret i32 %9
}
int fdatasync(int fd) {
  ;
  return 0;
}


x86 assembly (clang, -O0):
<fdatasync>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdatasync>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fdatasync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fdatasync(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_cell_add_neighbour();
int /*<<< orphan*/ test_cell_are_neighbours();
int /*<<< orphan*/ test_cell_set_nb_pawns();
int /*<<< orphan*/ test_cell_set_owner();
int /*<<< orphan*/ test_free_cell();
int /*<<< orphan*/ test_init_cell();
void testcell(void) {
  test_init_cell();
  test_free_cell();
  test_cell_set_owner();
  test_cell_set_nb_pawns();
  test_cell_add_neighbour();
  test_cell_are_neighbours();
}


x86 assembly (clang, -O0):
<testcell>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1080 <test_init_cell@plt>
mov    $0x0,%al
call   1040 <test_free_cell@plt>
mov    $0x0,%al
call   1030 <test_cell_set_owner@plt>
mov    $0x0,%al
call   1070 <test_cell_set_nb_pawns@plt>
mov    $0x0,%al
call   1060 <test_cell_add_neighbour@plt>
mov    $0x0,%al
call   1050 <test_cell_are_neighbours@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testcell>:
push   %rax
xor    %eax,%eax
call   1080 <test_init_cell@plt>
xor    %eax,%eax
call   1040 <test_free_cell@plt>
xor    %eax,%eax
call   1030 <test_cell_set_owner@plt>
xor    %eax,%eax
call   1070 <test_cell_set_nb_pawns@plt>
xor    %eax,%eax
call   1060 <test_cell_add_neighbour@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <test_cell_are_neighbours@plt>

LLVM IR (-O0):
define void @testcell() {
%1 = call i32 (...) @test_init_cell()
%2 = call i32 (...) @test_free_cell()
%3 = call i32 (...) @test_cell_set_owner()
%4 = call i32 (...) @test_cell_set_nb_pawns()
%5 = call i32 (...) @test_cell_add_neighbour()
%6 = call i32 (...) @test_cell_are_neighbours()
ret void
}

LLVM IR (-O2):
define void @testcell() {
%1 = tail call i32 (...) @test_init_cell()
%2 = tail call i32 (...) @test_free_cell()
%3 = tail call i32 (...) @test_cell_set_owner()
%4 = tail call i32 (...) @test_cell_set_nb_pawns()
%5 = tail call i32 (...) @test_cell_add_neighbour()
%6 = tail call i32 (...) @test_cell_are_neighbours()
ret void
}
void update_count(int val, int *ct) {
  if ((val > 2) && (val < 7)) {
    (*ct)++;
  } else if (val == 10) {
    (*ct)--;
  }
}


x86 assembly (clang, -O0):
<update_count>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    112f <update_count+0x2f>
cmpl   $0x7,-0x4(%rbp)
jge    112f <update_count+0x2f>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
jmp    1149 <update_count+0x49>
cmpl   $0xa,-0x4(%rbp)
jne    1144 <update_count+0x44>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
jmp    1149 <update_count+0x49>
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_count>:
lea    -0x3(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x4,%ecx
jb     1117 <update_count+0x17>
mov    $0xffffffff,%eax
cmp    $0xa,%edi
jne    1119 <update_count+0x19>
add    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @update_count(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 7
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %11
br label %22
14: ; preds = %7, %2
%15 = load i32, i32* %3
%16 = icmp eq i32 %15, 10
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32*, i32** %4
%19 = load i32, i32* %18
%20 = add nsw i32 %19, -1
store i32 %20, i32* %18
br label %21
21: ; preds = %17, %14
br label %22
22: ; preds = %21, %10
ret void
}

LLVM IR (-O2):
define void @update_count(i32 %0, i32* nocapture %1) {
%3 = add i32 %0, -3
%4 = icmp ult i32 %3, 4
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = icmp eq i32 %0, 10
br i1 %6, label %7, label %11
7: ; preds = %5, %2
%8 = phi i32 [ 1, %2 ], [ -1, %5 ]
%9 = load i32, i32* %1
%10 = add nsw i32 %9, %8
store i32 %10, i32* %1
br label %11
11: ; preds = %7, %5
ret void
}
void TILT_RestoreConfig(void) {}


x86 assembly (clang, -O0):
<TILT_RestoreConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TILT_RestoreConfig>:
ret

LLVM IR (-O0):
define void @TILT_RestoreConfig() {
ret void
}

LLVM IR (-O2):
define void @TILT_RestoreConfig() {
ret void
}
void rodata_test(void) {}


x86 assembly (clang, -O0):
<rodata_test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rodata_test>:
ret

LLVM IR (-O0):
define void @rodata_test() {
ret void
}

LLVM IR (-O2):
define void @rodata_test() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ parse_body_version(unsigned char const *);
__attribute__((visibility("hidden"))) void
tux_hw_parse_body_version(const unsigned char *frame) {
  parse_body_version(frame);
}


x86 assembly (clang, -O0):
<tux_hw_parse_body_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <parse_body_version@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tux_hw_parse_body_version>:
jmp    1030 <parse_body_version@plt>

LLVM IR (-O0):
define hidden void @tux_hw_parse_body_version(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @parse_body_version(i8* %3)
ret void
}

LLVM IR (-O2):
define hidden void @tux_hw_parse_body_version(i8* %0) {
%2 = tail call i32 @parse_body_version(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int x = 1;
  int y = 1;
  int n = x < y ? -1 : x == y ? 0 : 1;
  printf("%d\n", n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    114d <main+0x3d>
mov    $0xffffffff,%eax
mov    %eax,-0x20(%rbp)
jmp    1162 <main+0x52>
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xe8e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
store i32 1, i32* %7
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %2
br label %19
13: ; preds = %2
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp eq i32 %14, %15
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 0, i32 1
br label %19
19: ; preds = %13, %12
%20 = phi i32 [ -1, %12 ], [ %18, %13 ]
store i32 %20, i32* %8
%21 = load i32, i32* %8
%22 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %21)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
/* Variables and functions */
double fac(double);
double ncr(double, double);
double npr(double n, double r) { return ncr(n, r) * fac(r); }


x86 assembly (clang, -O0):
<npr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <ncr@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <fac@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<npr>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
call   1040 <ncr@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <fac@plt>
mulsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @npr(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @ncr(double %5, double %6)
%8 = load double, double* %4
%9 = call double @fac(double %8)
%10 = fmul double %7, %9
ret double %10
}

LLVM IR (-O2):
define double @npr(double %0, double %1) {
%3 = tail call double @ncr(double %0, double %1)
%4 = tail call double @fac(double %1)
%5 = fmul double %3, %4
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ draw_rectangle(int, int, int, int, int /*<<< orphan*/, int,
                                  int);
int /*<<< orphan*/ osuBeginGraphics(int, int);
int /*<<< orphan*/ osuEndGraphics();
int /*<<< orphan*/ osuFlush();
int /*<<< orphan*/ osuWaitOnEscape();
void mainR() {
  osuBeginGraphics(200, 200);
  draw_rectangle(150, 20, 180, 150, 0, 255, 0);
  draw_rectangle(35, 150, 180, 190, 0, 0, 255);
  osuFlush();
  osuWaitOnEscape();
  osuEndGraphics();
}


x86 assembly (clang, -O0):
<mainR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xc8,%esi
mov    %esi,%edi
call   1060 <osuBeginGraphics@plt>
mov    $0x96,%ecx
mov    $0x14,%esi
mov    $0xb4,%edx
xor    %r8d,%r8d
mov    $0xff,%r9d
mov    %ecx,%edi
movl   $0x0,(%rsp)
call   1030 <draw_rectangle@plt>
mov    $0x23,%edi
mov    $0x96,%esi
mov    $0xb4,%edx
mov    $0xbe,%ecx
xor    %r9d,%r9d
mov    %r9d,%r8d
movl   $0xff,(%rsp)
call   1030 <draw_rectangle@plt>
mov    $0x0,%al
call   1050 <osuFlush@plt>
mov    $0x0,%al
call   1040 <osuWaitOnEscape@plt>
mov    $0x0,%al
call   1070 <osuEndGraphics@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mainR>:
push   %rax
mov    $0xc8,%edi
mov    $0xc8,%esi
call   1060 <osuBeginGraphics@plt>
movl   $0x0,(%rsp)
mov    $0x96,%edi
mov    $0x14,%esi
mov    $0xb4,%edx
mov    $0x96,%ecx
xor    %r8d,%r8d
mov    $0xff,%r9d
call   1030 <draw_rectangle@plt>
movl   $0xff,(%rsp)
mov    $0x23,%edi
mov    $0x96,%esi
mov    $0xb4,%edx
mov    $0xbe,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <draw_rectangle@plt>
xor    %eax,%eax
call   1050 <osuFlush@plt>
xor    %eax,%eax
call   1040 <osuWaitOnEscape@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <osuEndGraphics@plt>

LLVM IR (-O0):
define void @mainR() {
%1 = call i32 @osuBeginGraphics(i32 200, i32 200)
%2 = call i32 @draw_rectangle(i32 150, i32 20, i32 180, i32 150, i32 0, i32 255, i32 0)
%3 = call i32 @draw_rectangle(i32 35, i32 150, i32 180, i32 190, i32 0, i32 0, i32 255)
%4 = call i32 (...) @osuFlush()
%5 = call i32 (...) @osuWaitOnEscape()
%6 = call i32 (...) @osuEndGraphics()
ret void
}

LLVM IR (-O2):
define void @mainR() {
%1 = tail call i32 @osuBeginGraphics(i32 200, i32 200)
%2 = tail call i32 @draw_rectangle(i32 150, i32 20, i32 180, i32 150, i32 0, i32 255, i32 0)
%3 = tail call i32 @draw_rectangle(i32 35, i32 150, i32 180, i32 190, i32 0, i32 0, i32 255)
%4 = tail call i32 (...) @osuFlush()
%5 = tail call i32 (...) @osuWaitOnEscape()
%6 = tail call i32 (...) @osuEndGraphics()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Memset(void *, int /*<<< orphan*/, size_t);
int /*<<< orphan*/ assert(int);
void Mzero(void *s, size_t n) {
  assert(s != NULL);
  assert(n > 0);
  Memset(s, 0, n);
}


x86 assembly (clang, -O0):
<Mzero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1040 <Memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mzero>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <Memset@plt>

LLVM IR (-O0):
define void @Mzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i64, i64* %4
%10 = icmp ugt i64 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %3
%14 = load i64, i64* %4
%15 = call i32 @Memset(i8* %13, i32 0, i64 %14)
ret void
}

LLVM IR (-O2):
define void @Mzero(i8* %0, i64 %1) {
%3 = icmp ne i8* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp ne i64 %1, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @Memset(i8* %0, i32 0, i64 %1)
ret void
}
/* Variables and functions */
int byteswap(int);
int readdata(int, int *, int);
int readcount(int *count) {
  int x;
  int y;
  x = readdata(sizeof(int), &y, false);
  if (x != (1))
    return (x);
  *count = byteswap(y);
  return ((1));
}


x86 assembly (clang, -O0):
<readcount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x4,%edi
lea    -0x18(%rbp),%rsi
xor    %edx,%edx
call   1030 <readdata@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
je     1154 <readcount+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116b <readcount+0x4b>
mov    -0x18(%rbp),%edi
call   1040 <byteswap@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readcount>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x4(%rsp),%rsi
mov    $0x4,%edi
xor    %edx,%edx
call   1030 <readdata@plt>
mov    %eax,%ebp
cmp    $0x1,%eax
jne    1149 <readcount+0x29>
mov    0x4(%rsp),%edi
call   1040 <byteswap@plt>
mov    %eax,(%rbx)
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @readcount(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
%6 = call i32 @readdata(i32 4, i32* %5, i32 0)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = load i32, i32* %5
%13 = call i32 @byteswap(i32 %12)
%14 = load i32*, i32** %3
store i32 %13, i32* %14
store i32 1, i32* %2
br label %15
15: ; preds = %11, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @readcount(i32* nocapture writeonly %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @readdata(i32 4, i32* %2, i32 0)
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @byteswap(i32 %7)
store i32 %8, i32* %0
br label %9
9: ; preds = %1, %6
ret i32 %4
}
/* Type definitions */
struct triple {
  int dummy;
};
struct compile_state {
  int dummy;
};

/* Variables and functions */
int triple_is_branch_type(struct compile_state *, struct triple *, int);
int triple_is_cbranch(struct compile_state *state, struct triple *ins) {
  return triple_is_branch_type(state, ins, 0x040);
}


x86 assembly (clang, -O0):
<triple_is_cbranch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x40,%edx
call   1030 <triple_is_branch_type@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<triple_is_cbranch>:
mov    $0x40,%edx
jmp    1030 <triple_is_branch_type@plt>

LLVM IR (-O0):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define i32 @triple_is_cbranch(%struct.compile_state* %0, %struct.triple* %1) {
%3 = alloca %struct.compile_state*
%4 = alloca %struct.triple*
store %struct.compile_state* %0, %struct.compile_state** %3
store %struct.triple* %1, %struct.triple** %4
%5 = load %struct.compile_state*, %struct.compile_state** %3
%6 = load %struct.triple*, %struct.triple** %4
%7 = call i32 @triple_is_branch_type(%struct.compile_state* %5, %struct.triple* %6, i32 64)
ret i32 %7
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define i32 @triple_is_cbranch(%struct.compile_state* %0, %struct.triple* %1) {
%3 = tail call i32 @triple_is_branch_type(%struct.compile_state* %0, %struct.triple* %1, i32 64)
ret i32 %3
}
/* Variables and functions */
float mp_bswap_float(float);
float mp_load_float(const char **data) {
  float val = mp_bswap_float(*(float *)*data);
  *data += sizeof(float);
  return val;
}


x86 assembly (clang, -O0):
<mp_load_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movss  (%rax),%xmm0
call   1030 <mp_bswap_float@plt>
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_load_float>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rax
movss  (%rax),%xmm0
call   1030 <mp_bswap_float@plt>
addq   $0x4,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define float @mp_load_float(i8** %0) {
%2 = alloca i8**
%3 = alloca float
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to float*
%7 = load float, float* %6
%8 = call float @mp_bswap_float(float %7)
store float %8, float* %3
%9 = load i8**, i8*** %2
%10 = load i8*, i8** %9
%11 = getelementptr inbounds i8, i8* %10, i64 4
store i8* %11, i8** %9
%12 = load float, float* %3
ret float %12
}

LLVM IR (-O2):
define float @mp_load_float(i8** nocapture %0) {
%2 = bitcast i8** %0 to float**
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = tail call float @mp_bswap_float(float %4)
%6 = load i8*, i8** %0
%7 = getelementptr inbounds i8, i8* %6, i64 4
store i8* %7, i8** %0
ret float %5
}
/* Type definitions */
union i2c_smbus_data {
  int /*<<< orphan*/ word;
};
typedef int /*<<< orphan*/ __u16;
typedef int /*<<< orphan*/ __s32;

/* Variables and functions */
int /*<<< orphan*/ I2C_SMBUS_WORD_DATA;
int /*<<< orphan*/ I2C_SMBUS_WRITE;
int /*<<< orphan*/ i2c_smbus_access(int, int /*<<< orphan*/, int,
                                    int /*<<< orphan*/, union i2c_smbus_data *);
__s32 i2c_smbus_write_word_data(int fd, int cmd, __u16 value) {
  union i2c_smbus_data data;
  data.word = value;
  return i2c_smbus_access(fd, I2C_SMBUS_WRITE, cmd, I2C_SMBUS_WORD_DATA, &data);
}


x86 assembly (clang, -O0):
<i2c_smbus_write_word_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ea7(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    0x2eab(%rip),%rax
mov    (%rax),%ecx
lea    -0x10(%rbp),%r8
call   1030 <i2c_smbus_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_write_word_data>:
push   %rax
mov    %esi,%eax
mov    %edx,(%rsp)
mov    0x2ebb(%rip),%rcx
mov    (%rcx),%esi
mov    0x2ec2(%rip),%rcx
mov    (%rcx),%ecx
mov    %rsp,%r8
mov    %eax,%edx
call   1030 <i2c_smbus_access@plt>
pop    %rcx
ret

LLVM IR (-O0):
%union.i2c_smbus_data = type { i32 }
@I2C_SMBUS_WRITE = global i32 0
@I2C_SMBUS_WORD_DATA = global i32 0
define i32 @i2c_smbus_write_word_data(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca %union.i2c_smbus_data
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = bitcast %union.i2c_smbus_data* %7 to i32*
store i32 %8, i32* %9
%10 = load i32, i32* %4
%11 = load i32, i32* @I2C_SMBUS_WRITE
%12 = load i32, i32* %5
%13 = load i32, i32* @I2C_SMBUS_WORD_DATA
%14 = call i32 @i2c_smbus_access(i32 %10, i32 %11, i32 %12, i32 %13, %union.i2c_smbus_data* %7)
ret i32 %14
}

LLVM IR (-O2):
%union.i2c_smbus_data = type { i32 }
@I2C_SMBUS_WRITE = global i32 0
@I2C_SMBUS_WORD_DATA = global i32 0
define i32 @i2c_smbus_write_word_data(i32 %0, i32 %1, i32 %2) {
%4 = alloca %union.i2c_smbus_data
%5 = bitcast %union.i2c_smbus_data* %4 to i8*
%6 = getelementptr inbounds %union.i2c_smbus_data, %union.i2c_smbus_data* %4, i64 0, i32 0
store i32 %2, i32* %6
%7 = load i32, i32* @I2C_SMBUS_WRITE
%8 = load i32, i32* @I2C_SMBUS_WORD_DATA
%9 = call i32 @i2c_smbus_access(i32 %0, i32 %7, i32 %1, i32 %8, %union.i2c_smbus_data* %4)
ret i32 %9
}
int cairo_code_draw_infamousLogo_get_width() { return 67; }


x86 assembly (clang, -O0):
<cairo_code_draw_infamousLogo_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_infamousLogo_get_width>:
mov    $0x43,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_infamousLogo_get_width() {
ret i32 67
}

LLVM IR (-O2):
define i32 @cairo_code_draw_infamousLogo_get_width() {
ret i32 67
}
int rand_hop_0() { return 0; }


x86 assembly (clang, -O0):
<rand_hop_0>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_hop_0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rand_hop_0() {
ret i32 0
}

LLVM IR (-O2):
define i32 @rand_hop_0() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_perf();
int main(void) {
  test_perf();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_perf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_perf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_perf()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_perf()
ret i32 0
}