xunge/DecIR huggingface dataset:
int p_in_n_factorial(int p, int n) {
  int times = 0;
  int p_pow_k = p;
  while (p_pow_k <= n) {
    times += n / p_pow_k;
    p_pow_k *= p;
  }
  return times;
}


x86 assembly (clang, -O0):
<p_in_n_factorial>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     113f <p_in_n_factorial+0x3f>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1117 <p_in_n_factorial+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<p_in_n_factorial>:
xor    %ecx,%ecx
cmp    %esi,%edi
jg     1120 <p_in_n_factorial+0x20>
mov    %esi,%r8d
xor    %ecx,%ecx
mov    %edi,%esi
nopl   (%rax)
mov    %r8d,%eax
cltd
idiv   %esi
add    %eax,%ecx
imul   %edi,%esi
cmp    %r8d,%esi
jle    1110 <p_in_n_factorial+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @p_in_n_factorial(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %3
store i32 %7, i32* %6
br label %8
8: ; preds = %12, %2
%9 = load i32, i32* %6
%10 = load i32, i32* %4
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = sdiv i32 %13, %14
%16 = load i32, i32* %5
%17 = add nsw i32 %16, %15
store i32 %17, i32* %5
%18 = load i32, i32* %3
%19 = load i32, i32* %6
%20 = mul nsw i32 %19, %18
store i32 %20, i32* %6
br label %8
21: ; preds = %8
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
define i32 @p_in_n_factorial(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %9, %4 ], [ %0, %2 ]
%6 = phi i32 [ %8, %4 ], [ 0, %2 ]
%7 = sdiv i32 %1, %5
%8 = add nsw i32 %7, %6
%9 = mul nsw i32 %5, %0
%10 = icmp sgt i32 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = phi i32 [ 0, %2 ], [ %8, %4 ]
ret i32 %12
}
f() {
  int i;
  return 11;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0xb,%eax
ret

LLVM IR (-O0):
define i32 @f() {
%1 = alloca i32
ret i32 11
}

LLVM IR (-O2):
define i32 @f() {
ret i32 11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void target(void) { printf("in target function\n"); }


x86 assembly (clang, -O0):
<target>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<target>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"in target function\0A\00"
define void @target() {
%1 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [19 x i8] c"in target function\00"
define void @target() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret void
}
int mycompar(const void *xp, const void *yp) {
  const int *x = (const int *)xp;
  const int *y = (const int *)yp;
  return *y - *x;
}


x86 assembly (clang, -O0):
<mycompar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mycompar>:
mov    (%rsi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @mycompar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @mycompar(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ read(int, void *, size_t);
ssize_t ReadFromDev(int port, void *buf, size_t count) {
  return read(port, buf, count);
}


x86 assembly (clang, -O0):
<ReadFromDev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadFromDev>:
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @ReadFromDev(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @read(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @ReadFromDev(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
int gpio_test_irq_mask(int, int, int, int, int);
int gpio_test_irq(int addr, int imask, int pirq, int irqgen) {
  return gpio_test_irq_mask(addr, imask, pirq, irqgen, -1);
}


x86 assembly (clang, -O0):
<gpio_test_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    $0xffffffff,%r8d
call   1030 <gpio_test_irq_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_test_irq>:
mov    $0xffffffff,%r8d
jmp    1030 <gpio_test_irq_mask@plt>

LLVM IR (-O0):
define i32 @gpio_test_irq(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @gpio_test_irq_mask(i32 %9, i32 %10, i32 %11, i32 %12, i32 -1)
ret i32 %13
}

LLVM IR (-O2):
define i32 @gpio_test_irq(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @gpio_test_irq_mask(i32 %0, i32 %1, i32 %2, i32 %3, i32 -1)
ret i32 %5
}
double fabs(double x) { return ((x < 0) ? -x : x); }


x86 assembly (clang, -O0):
<fabs>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    113d <fabs+0x3d>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1147 <fabs+0x47>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabs>:
movapd 0xef8(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm3,%xmm3
movapd %xmm0,%xmm1
cmpltsd %xmm3,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @fabs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fneg double %6
br label %10
8: ; preds = %1
%9 = load double, double* %2
br label %10
10: ; preds = %8, %5
%11 = phi double [ %7, %5 ], [ %9, %8 ]
ret double %11
}

LLVM IR (-O2):
define double @fabs(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %3, double %0
ret double %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XConfigureEvent;

/* Variables and functions */
void set_XConfigureEvent_serial(void *_p, unsigned long _v) {
  ((XConfigureEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XConfigureEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XConfigureEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XConfigureEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XConfigureEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ pthread_mutex_t;
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int pthread_cond_timedwait(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                           struct timespec *);
int /*<<< orphan*/ timeout_to_timespec(int, struct timespec *);
int pthread_cond_timedwait_timeout(pthread_cond_t *cond, pthread_mutex_t *mutex,
                                   int timeout) {
  struct timespec ts;
  timeout_to_timespec(timeout, &ts);
  return pthread_cond_timedwait(cond, mutex, &ts);
}


x86 assembly (clang, -O0):
<pthread_cond_timedwait_timeout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1030 <timeout_to_timespec@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <pthread_cond_timedwait@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_timedwait_timeout>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0x8(%rsp),%r15
mov    %edx,%edi
mov    %r15,%rsi
call   1030 <timeout_to_timespec@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <pthread_cond_timedwait@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @pthread_cond_timedwait_timeout(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca %struct.timespec
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @timeout_to_timespec(i32 %8, %struct.timespec* %7)
%10 = load i32*, i32** %4
%11 = load i32*, i32** %5
%12 = call i32 @pthread_cond_timedwait(i32* %10, i32* %11, %struct.timespec* %7)
ret i32 %12
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @pthread_cond_timedwait_timeout(i32* %0, i32* %1, i32 %2) {
%4 = alloca %struct.timespec
%5 = bitcast %struct.timespec* %4 to i8*
%6 = call i32 @timeout_to_timespec(i32 %2, %struct.timespec* %4)
%7 = call i32 @pthread_cond_timedwait(i32* %0, i32* %1, %struct.timespec* %4)
ret i32 %7
}
/* Variables and functions */
int is_odd(int);
int foo(int a) {
  static int i = 0;
  i++;
  return is_odd(a) + i;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2f0b(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f02(%rip)
mov    -0x4(%rbp),%edi
call   1030 <is_odd@plt>
add    0x2ef4(%rip),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
addl   $0x1,0x2f14(%rip)
call   1030 <is_odd@plt>
add    0x2f09(%rip),%eax
pop    %rcx
ret

LLVM IR (-O0):
@foo.i = internal global i32 0
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @foo.i
%4 = add nsw i32 %3, 1
store i32 %4, i32* @foo.i
%5 = load i32, i32* %2
%6 = call i32 @is_odd(i32 %5)
%7 = load i32, i32* @foo.i
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
@foo.i = internal unnamed_addr global i32 0
define i32 @foo(i32 %0) {
%2 = load i32, i32* @foo.i
%3 = add nsw i32 %2, 1
store i32 %3, i32* @foo.i
%4 = tail call i32 @is_odd(i32 %0)
%5 = load i32, i32* @foo.i
%6 = add nsw i32 %5, %4
ret i32 %6
}
int ptrcmp(const void *a, const void *b) { return (a > b) - (a < b); }


x86 assembly (clang, -O0):
<ptrcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x8(%rbp),%rcx
cmp    -0x10(%rbp),%rcx
setb   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrcmp>:
xor    %eax,%eax
cmp    %rsi,%rdi
seta   %al
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @ptrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ugt i8* %5, %6
%8 = zext i1 %7 to i32
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = icmp ult i8* %9, %10
%12 = zext i1 %11 to i32
%13 = sub nsw i32 %8, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @ptrcmp(i8* readnone %0, i8* readnone %1) {
%3 = icmp ugt i8* %0, %1
%4 = zext i1 %3 to i32
%5 = icmp ult i8* %0, %1
%6 = sext i1 %5 to i32
%7 = add nsw i32 %6, %4
ret i32 %7
}
/* Variables and functions */
int socket(int, int, int);
int s_socket_bsd_socket(int domain, int type, int protocol) {
  return socket(domain, type, protocol);
}


x86 assembly (clang, -O0):
<s_socket_bsd_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <socket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_socket_bsd_socket>:
jmp    1030 <socket@plt>

LLVM IR (-O0):
define i32 @s_socket_bsd_socket(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @socket(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @s_socket_bsd_socket(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @socket(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
unsigned add(unsigned a, unsigned b) { return a + b; }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1) {
%3 = add i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void init_rand() { srand(time(NULL)); }


x86 assembly (clang, -O0):
<init_rand>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_rand>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @init_rand() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
ret void
}

LLVM IR (-O2):
define void @init_rand() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}
void gdk_colormap_get_visual() {}


x86 assembly (clang, -O0):
<gdk_colormap_get_visual>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_colormap_get_visual>:
ret

LLVM IR (-O0):
define void @gdk_colormap_get_visual() {
ret void
}

LLVM IR (-O2):
define void @gdk_colormap_get_visual() {
ret void
}
/* Variables and functions */
void const *GppcFinfoV1();
const void *pg_finfo_errfunc_bpchar(void) { return GppcFinfoV1(); }


x86 assembly (clang, -O0):
<pg_finfo_errfunc_bpchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GppcFinfoV1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pg_finfo_errfunc_bpchar>:
xor    %eax,%eax
jmp    1030 <GppcFinfoV1@plt>

LLVM IR (-O0):
define i8* @pg_finfo_errfunc_bpchar() {
%1 = call i8* (...) @GppcFinfoV1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @pg_finfo_errfunc_bpchar() {
%1 = tail call i8* (...) @GppcFinfoV1()
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ outb(unsigned short, int);
void serial_configure_buffer(unsigned short com) { outb((com + 2), 0xC7); }


x86 assembly (clang, -O0):
<serial_configure_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x2,%eax
mov    $0xc7,%esi
movzwl %ax,%edi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_configure_buffer>:
add    $0x2,%edi
movzwl %di,%edi
mov    $0xc7,%esi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @serial_configure_buffer(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = add nsw i32 %4, 2
%6 = trunc i32 %5 to i16
%7 = call i32 @outb(i16 zeroext %6, i32 199)
ret void
}

LLVM IR (-O2):
define void @serial_configure_buffer(i16 zeroext %0) {
%2 = add i16 %0, 2
%3 = tail call i32 @outb(i16 zeroext %2, i32 199)
ret void
}
void gdk_event_get_type() {}


x86 assembly (clang, -O0):
<gdk_event_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_event_get_type>:
ret

LLVM IR (-O0):
define void @gdk_event_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_event_get_type() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_raw(int *, int *, int /*<<< orphan*/);
void F(int *a, int *b) { F_raw(a, b, 0); }


x86 assembly (clang, -O0):
<F>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <F_raw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F>:
xor    %edx,%edx
jmp    1030 <F_raw@plt>

LLVM IR (-O0):
define void @F(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @F_raw(i32* %5, i32* %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @F(i32* %0, i32* %1) {
%3 = tail call i32 @F_raw(i32* %0, i32* %1, i32 0)
ret void
}
/* Type definitions */
struct radix_tree {
  int dummy;
};

/* Variables and functions */
void *__radix_tree_lookup(struct radix_tree *, unsigned long, int);
void *radix_tree_lookup(struct radix_tree *tree, unsigned long key) {
  return __radix_tree_lookup(tree, key, false);
}


x86 assembly (clang, -O0):
<radix_tree_lookup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <__radix_tree_lookup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radix_tree_lookup>:
xor    %edx,%edx
jmp    1030 <__radix_tree_lookup@plt>

LLVM IR (-O0):
%struct.radix_tree = type { i32 }
define i8* @radix_tree_lookup(%struct.radix_tree* %0, i64 %1) {
%3 = alloca %struct.radix_tree*
%4 = alloca i64
store %struct.radix_tree* %0, %struct.radix_tree** %3
store i64 %1, i64* %4
%5 = load %struct.radix_tree*, %struct.radix_tree** %3
%6 = load i64, i64* %4
%7 = call i8* @__radix_tree_lookup(%struct.radix_tree* %5, i64 %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
%struct.radix_tree = type { i32 }
define i8* @radix_tree_lookup(%struct.radix_tree* %0, i64 %1) {
%3 = tail call i8* @__radix_tree_lookup(%struct.radix_tree* %0, i64 %1, i32 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printTabuleiro();
int /*<<< orphan*/ walk(int, int);
int main(int argc, char *argv[]) {
  int posx = 0;
  int posy = 1;
  walk(posx, posy);
  printTabuleiro();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1040 <walk@plt>
mov    $0x0,%al
call   1030 <printTabuleiro@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1040 <walk@plt>
xor    %eax,%eax
call   1030 <printTabuleiro@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 1, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = call i32 @walk(i32 %8, i32 %9)
%11 = call i32 (...) @printTabuleiro()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @walk(i32 0, i32 1)
%4 = tail call i32 (...) @printTabuleiro()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
void gotoxy(int x, int y) { printf("%c[%d;%df", 0x1B, y, x); }


x86 assembly (clang, -O0):
<gotoxy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
lea    0xed5(%rip),%rdi
mov    $0x1b,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gotoxy>:
mov    %esi,%edx
mov    %edi,%ecx
lea    0xee5(%rip),%rdi
mov    $0x1b,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"%c[%d;%df\00"
define void @gotoxy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 27, i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%c[%d;%df\00"
define void @gotoxy(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 27, i32 %1, i32 %0)
ret void
}
/* Type definitions */
typedef int __uint64_t;

/* Variables and functions */
__uint64_t getfield64(__uint64_t s, int p, int n) {
  __uint64_t d = s;
  d = s << (64 - (p + n));
  d = d >> (64 - n);
  return d;
}


x86 assembly (clang, -O0):
<getfield64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
add    -0xc(%rbp),%edx
mov    $0x40,%ecx
sub    %edx,%ecx
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0x40,%ecx
sub    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getfield64>:
mov    %edi,%eax
lea    (%rsi,%rdx,1),%ecx
neg    %cl
shl    %cl,%eax
neg    %dl
mov    %edx,%ecx
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @getfield64(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
store i32 %8, i32* %7
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = add nsw i32 %10, %11
%13 = sub nsw i32 64, %12
%14 = shl i32 %9, %13
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = load i32, i32* %6
%17 = sub nsw i32 64, %16
%18 = ashr i32 %15, %17
store i32 %18, i32* %7
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @getfield64(i32 %0, i32 %1, i32 %2) {
%4 = add i32 %1, %2
%5 = sub i32 64, %4
%6 = shl i32 %0, %5
%7 = sub nsw i32 64, %2
%8 = ashr i32 %6, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ mq_unlink(char *);
void main(void) {
  mq_unlink("/control-queue");
  mq_unlink("/gpsins-queue");
  mq_unlink("/ins-queue");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <mq_unlink@plt>
lea    0xee8(%rip),%rdi
call   1030 <mq_unlink@plt>
lea    0xeea(%rip),%rdi
call   1030 <mq_unlink@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <mq_unlink@plt>
lea    0xeeb(%rip),%rdi
call   1030 <mq_unlink@plt>
lea    0xeed(%rip),%rdi
pop    %rax
jmp    1030 <mq_unlink@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"/control-queue\00"
@.str.1 = [14 x i8] c"/gpsins-queue\00"
@.str.2 = [11 x i8] c"/ins-queue\00"
define void @main() {
%1 = call i32 @mq_unlink(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @mq_unlink(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @mq_unlink(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"/control-queue\00"
@.str.1 = [14 x i8] c"/gpsins-queue\00"
@.str.2 = [11 x i8] c"/ins-queue\00"
define void @main() {
%1 = tail call i32 @mq_unlink(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @mq_unlink(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @mq_unlink(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sdio_write_byte(int, int);
void adns2080_reset(void) { sdio_write_byte((0x3aU), (0x5AU)); }


x86 assembly (clang, -O0):
<adns2080_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a,%edi
mov    $0x5a,%esi
call   1030 <sdio_write_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adns2080_reset>:
mov    $0x3a,%edi
mov    $0x5a,%esi
jmp    1030 <sdio_write_byte@plt>

LLVM IR (-O0):
define void @adns2080_reset() {
%1 = call i32 @sdio_write_byte(i32 58, i32 90)
ret void
}

LLVM IR (-O2):
define void @adns2080_reset() {
%1 = tail call i32 @sdio_write_byte(i32 58, i32 90)
ret void
}
/* Variables and functions */
bool nrf52_errata_208(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_208>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_208>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_208() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_208() {
ret i32 0
}
/* Type definitions */
struct slab {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ slab_lruq_remove(struct slab *);
void _slab_unlink_lruq(struct slab *slab) { slab_lruq_remove(slab); }


x86 assembly (clang, -O0):
<_slab_unlink_lruq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <slab_lruq_remove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_slab_unlink_lruq>:
jmp    1030 <slab_lruq_remove@plt>

LLVM IR (-O0):
%struct.slab = type { i32 }
define void @_slab_unlink_lruq(%struct.slab* %0) {
%2 = alloca %struct.slab*
store %struct.slab* %0, %struct.slab** %2
%3 = load %struct.slab*, %struct.slab** %2
%4 = call i32 @slab_lruq_remove(%struct.slab* %3)
ret void
}

LLVM IR (-O2):
%struct.slab = type { i32 }
define void @_slab_unlink_lruq(%struct.slab* %0) {
%2 = tail call i32 @slab_lruq_remove(%struct.slab* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;
struct scsi_cmd {
  int dummy;
};

/* Variables and functions */
uint8_t spc_reserve(struct scsi_cmd *cmd) {
  ;
  return 0x00;
}


x86 assembly (clang, -O0):
<spc_reserve>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spc_reserve>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.scsi_cmd = type { i32 }
define i32 @spc_reserve(%struct.scsi_cmd* %0) {
%2 = alloca %struct.scsi_cmd*
store %struct.scsi_cmd* %0, %struct.scsi_cmd** %2
ret i32 0
}

LLVM IR (-O2):
%struct.scsi_cmd = type { i32 }
define i32 @spc_reserve(%struct.scsi_cmd* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISBLK(int /*<<< orphan*/);
scalar_t__ stat(char *, struct stat *);
int unary_b(char *s) {
  struct stat buf;
  if (stat(s, &buf))
    return 0;
  return S_ISBLK(buf.st_mode);
}


x86 assembly (clang, -O0):
<unary_b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
je     114f <unary_b+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    115a <unary_b+0x3a>
mov    -0x18(%rbp),%edi
call   1040 <S_ISBLK@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unary_b>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1135 <unary_b+0x15>
pop    %rcx
ret
mov    (%rsp),%edi
call   1040 <S_ISBLK@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @unary_b(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %13
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @S_ISBLK(i32 %11)
store i32 %12, i32* %2
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @unary_b(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @S_ISBLK(i32 %8)
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %9, %6 ], [ 0, %1 ]
ret i32 %11
}
unsigned int get_Elf32_Half(unsigned char *p) { return p[0] | (p[1] << 8); }


x86 assembly (clang, -O0):
<get_Elf32_Half>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_Elf32_Half>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_Elf32_Half(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @get_Elf32_Half(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
ret i32 %8
}
int first_digit(int n) {
  long int n2;
  n2 = n;
  if (n2 < 0) {
    n2 = (n2 * -1);
  }
  while (n2 > 9) {
    n2 = (n2 / 10);
  }
  return (n2);
}


x86 assembly (clang, -O0):
<first_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1123 <first_digit+0x23>
imul   $0xffffffffffffffff,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1128 <first_digit+0x28>
cmpq   $0x9,-0x10(%rbp)
jle    114a <first_digit+0x4a>
mov    -0x10(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x10(%rbp)
jmp    1128 <first_digit+0x28>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<first_digit>:
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
cmp    $0xa,%ecx
jb     1136 <first_digit+0x36>
movabs $0xcccccccccccccccd,%rsi
cc cc cc
cs nopw 0x0(%rax,%rax,1)
mov    %rcx,%rax
mul    %rsi
shr    $0x3,%rdx
cmp    $0x63,%rcx
mov    %rdx,%rcx
ja     1120 <first_digit+0x20>
mov    %edx,%eax
ret
mov    %rcx,%rdx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @first_digit(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %3
%10 = mul nsw i64 %9, -1
store i64 %10, i64* %3
br label %11
11: ; preds = %8, %1
br label %12
12: ; preds = %15, %11
%13 = load i64, i64* %3
%14 = icmp sgt i64 %13, 9
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i64, i64* %3
%17 = sdiv i64 %16, 10
store i64 %17, i64* %3
br label %12
18: ; preds = %12
%19 = load i64, i64* %3
%20 = trunc i64 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @first_digit(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 false)
%3 = zext i32 %2 to i64
%4 = icmp ugt i32 %2, 9
br i1 %4, label %5, label %9
5: ; preds = %1, %5
%6 = phi i64 [ %7, %5 ], [ %3, %1 ]
%7 = udiv i64 %6, 10
%8 = icmp ugt i64 %6, 99
br i1 %8, label %5, label %9
9: ; preds = %5, %1
%10 = phi i64 [ %3, %1 ], [ %7, %5 ]
%11 = trunc i64 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ functionToCall(int, int *, int **);
int /*<<< orphan*/ printf(char *, int);
void pointer(int argc, char **argv) {
  int foo = 3;
  int *fp = &foo;
  int **fpp = &fp;
  functionToCall(foo, &foo, &fp);
  printf("foo = %d", foo);
}


x86 assembly (clang, -O0):
<pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%edi
lea    -0x14(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1040 <functionToCall@plt>
mov    -0x14(%rbp),%esi
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer>:
sub    $0x18,%rsp
movl   $0x3,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rsi,0x10(%rsp)
lea    0x10(%rsp),%rdx
mov    $0x3,%edi
call   1040 <functionToCall@plt>
mov    0xc(%rsp),%esi
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"foo = %d\00"
define void @pointer(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32**
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 3, i32* %5
store i32* %5, i32** %6
store i32** %6, i32*** %7
%8 = load i32, i32* %5
%9 = call i32 @functionToCall(i32 %8, i32* %5, i32** %6)
%10 = load i32, i32* %5
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"foo = %d\00"
define void @pointer(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = bitcast i32* %3 to i8*
store i32 3, i32* %3
%6 = bitcast i32** %4 to i8*
store i32* %3, i32** %4
%7 = call i32 @functionToCall(i32 3, i32* %3, i32** %4)
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}
int iHxFaceBlackCardCheck(unsigned char *psRid, unsigned char *pszPan,
                          int iPanSeqNo) {
  return (99);
}


x86 assembly (clang, -O0):
<iHxFaceBlackCardCheck>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iHxFaceBlackCardCheck>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @iHxFaceBlackCardCheck(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 99
}

LLVM IR (-O2):
define i32 @iHxFaceBlackCardCheck(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 99
}
void vpicFinal() {}


x86 assembly (clang, -O0):
<vpicFinal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpicFinal>:
ret

LLVM IR (-O0):
define void @vpicFinal() {
ret void
}

LLVM IR (-O2):
define void @vpicFinal() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_set_source_port_by_index() {
  printf("NOT IMPLEMENTED:"
         "pa_context_set_source_port_by_index"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_set_source_port_by_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_set_source_port_by_index>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [53 x i8] c"NOT IMPLEMENTED:pa_context_set_source_port_by_index\0A\00"
define i32 @pa_context_set_source_port_by_index() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [52 x i8] c"NOT IMPLEMENTED:pa_context_set_source_port_by_index\00"
define i32 @pa_context_set_source_port_by_index() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([52 x i8], [52 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int __test() {
  int x = 3;
  return ~x;
}


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
mov    $0xfffffffc,%eax
ret

LLVM IR (-O0):
define i32 @__test() {
%1 = alloca i32
store i32 3, i32* %1
%2 = load i32, i32* %1
%3 = xor i32 %2, -1
ret i32 %3
}

LLVM IR (-O2):
define i32 @__test() {
ret i32 -4
}
/* Variables and functions */
double exp(double);
double f(double x) { return exp(-(x * x)); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movapd 0xee8(%rip),%xmm1
xorpd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = fneg double %5
%7 = call double @exp(double %6)
ret double %7
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = fneg double %0
%3 = fmul double %2, %0
%4 = tail call double @exp(double %3)
ret double %4
}
int parse_hexdigit(int hex) {
  if (hex >= '0' && hex <= '9')
    return hex - '0';
  if (hex >= 'a' && hex <= 'f')
    return hex - 'a' + 10;
  if (hex >= 'A' && hex <= 'F')
    return hex - 'A' + 10;
  return -1;
}


x86 assembly (clang, -O0):
<parse_hexdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     1129 <parse_hexdigit+0x29>
cmpl   $0x39,-0x8(%rbp)
jg     1129 <parse_hexdigit+0x29>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <parse_hexdigit+0x7a>
cmpl   $0x61,-0x8(%rbp)
jl     114e <parse_hexdigit+0x4e>
cmpl   $0x66,-0x8(%rbp)
jg     114e <parse_hexdigit+0x4e>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <parse_hexdigit+0x7a>
cmpl   $0x41,-0x8(%rbp)
jl     1173 <parse_hexdigit+0x73>
cmpl   $0x46,-0x8(%rbp)
jg     1173 <parse_hexdigit+0x73>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <parse_hexdigit+0x7a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_hexdigit>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
jb     1127 <parse_hexdigit+0x27>
lea    -0x61(%rdi),%eax
cmp    $0x5,%eax
ja     1116 <parse_hexdigit+0x16>
add    $0xffffffa9,%edi
mov    %edi,%eax
ret
lea    -0x41(%rdi),%eax
add    $0xffffffc9,%edi
cmp    $0x6,%eax
mov    $0xffffffff,%eax
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @parse_hexdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 48
store i32 %11, i32* %2
br label %33
12: ; preds = %6, %1
%13 = load i32, i32* %3
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %22
15: ; preds = %12
%16 = load i32, i32* %3
%17 = icmp sle i32 %16, 102
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32, i32* %3
%20 = sub nsw i32 %19, 97
%21 = add nsw i32 %20, 10
store i32 %21, i32* %2
br label %33
22: ; preds = %15, %12
%23 = load i32, i32* %3
%24 = icmp sge i32 %23, 65
br i1 %24, label %25, label %32
25: ; preds = %22
%26 = load i32, i32* %3
%27 = icmp sle i32 %26, 70
br i1 %27, label %28, label %32
28: ; preds = %25
%29 = load i32, i32* %3
%30 = sub nsw i32 %29, 65
%31 = add nsw i32 %30, 10
store i32 %31, i32* %2
br label %33
32: ; preds = %25, %22
store i32 -1, i32* %2
br label %33
33: ; preds = %32, %28, %18, %9
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @parse_hexdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = add i32 %0, -97
%6 = icmp ult i32 %5, 6
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = add nsw i32 %0, -87
br label %14
9: ; preds = %4
%10 = add i32 %0, -65
%11 = icmp ult i32 %10, 6
%12 = add nsw i32 %0, -55
%13 = select i1 %11, i32 %12, i32 -1
br label %14
14: ; preds = %1, %9, %7
%15 = phi i32 [ %8, %7 ], [ %13, %9 ], [ %2, %1 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help() {
  printf("make a new direcctory\n"
         "-h|--help for help\n"
         "=v|--version for version infor\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [73 x i8] c"make a new direcctory\0A-h|--help for help\0A=v|--version for version infor\0A\00"
define void @help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [72 x i8] c"make a new direcctory\0A-h|--help for help\0A=v|--version for version infor\00"
define void @help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([72 x i8], [72 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
void big_num(unsigned int a_num) { printf("tite number dawg: %u\n", a_num); }


x86 assembly (clang, -O0):
<big_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<big_num>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"tite number dawg: %u\0A\00"
define void @big_num(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"tite number dawg: %u\0A\00"
define void @big_num(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ be32enc(unsigned char *, int /*<<< orphan*/ const);
void be32enc_vect(unsigned char *dst, const uint32_t *src, size_t len) {
  size_t i;
  for (i = 0; i < len / 4; i++)
    be32enc(dst + i * 4, src[i]);
}


x86 assembly (clang, -O0):
<be32enc_vect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
shr    $0x2,%rcx
cmp    %rcx,%rax
jae    1171 <be32enc_vect+0x61>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
call   1030 <be32enc@plt>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112c <be32enc_vect+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<be32enc_vect>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
cmp    $0x4,%rdx
jb     1149 <be32enc_vect+0x39>
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%r12
shr    $0x2,%r15
xor    %ebx,%ebx
nopl   (%rax)
mov    (%r14,%rbx,4),%esi
mov    %r12,%rdi
call   1030 <be32enc@plt>
add    $0x1,%rbx
add    $0x4,%r12
cmp    %rbx,%r15
jne    1130 <be32enc_vect+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @be32enc_vect(i8* %0, i32* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
store i64 0, i64* %7
br label %8
8: ; preds = %23, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = udiv i64 %10, 4
%12 = icmp ult i64 %9, %11
br i1 %12, label %13, label %26
13: ; preds = %8
%14 = load i8*, i8** %4
%15 = load i64, i64* %7
%16 = mul i64 %15, 4
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i32*, i32** %5
%19 = load i64, i64* %7
%20 = getelementptr inbounds i32, i32* %18, i64 %19
%21 = load i32, i32* %20
%22 = call i32 @be32enc(i8* %17, i32 %21)
br label %23
23: ; preds = %13
%24 = load i64, i64* %7
%25 = add i64 %24, 1
store i64 %25, i64* %7
br label %8
26: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @be32enc_vect(i8* %0, i32* nocapture %1, i64 %2) {
%4 = icmp ult i64 %2, 4
br i1 %4, label %16, label %5
5: ; preds = %3
%6 = lshr i64 %2, 2
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ %14, %7 ], [ 0, %5 ]
%9 = shl i64 %8, 2
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = getelementptr inbounds i32, i32* %1, i64 %8
%12 = load i32, i32* %11
%13 = tail call i32 @be32enc(i8* %10, i32 %12)
%14 = add nuw nsw i64 %8, 1
%15 = icmp eq i64 %14, %6
br i1 %15, label %16, label %7
16: ; preds = %7, %3
ret void
}
void kegi_init(flags) int flags;
{}


x86 assembly (clang, -O0):
<kegi_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kegi_init>:
ret

LLVM IR (-O0):
define void @kegi_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @kegi_init(i32 %0) {
ret void
}
/* Variables and functions */
int __builtin_vsx_xstsqrtdp_fe(double);
int __builtin_vsx_xstsqrtdp_fg(double);
void test_sqrt_df_1(double a, int *p) {
  p[0] = __builtin_vsx_xstsqrtdp_fe(a);
  p[1] = __builtin_vsx_xstsqrtdp_fg(a);
}


x86 assembly (clang, -O0):
<test_sqrt_df_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__builtin_vsx_xstsqrtdp_fe@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movsd  -0x8(%rbp),%xmm0
call   1040 <__builtin_vsx_xstsqrtdp_fg@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sqrt_df_1>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movsd  %xmm0,0x8(%rsp)
call   1030 <__builtin_vsx_xstsqrtdp_fe@plt>
mov    %eax,(%rbx)
movsd  0x8(%rsp),%xmm0
call   1040 <__builtin_vsx_xstsqrtdp_fg@plt>
mov    %eax,0x4(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @test_sqrt_df_1(double %0, i32* %1) {
%3 = alloca double
%4 = alloca i32*
store double %0, double* %3
store i32* %1, i32** %4
%5 = load double, double* %3
%6 = call i32 @__builtin_vsx_xstsqrtdp_fe(double %5)
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
%9 = load double, double* %3
%10 = call i32 @__builtin_vsx_xstsqrtdp_fg(double %9)
%11 = load i32*, i32** %4
%12 = getelementptr inbounds i32, i32* %11, i64 1
store i32 %10, i32* %12
ret void
}

LLVM IR (-O2):
define void @test_sqrt_df_1(double %0, i32* nocapture writeonly %1) {
%3 = tail call i32 @__builtin_vsx_xstsqrtdp_fe(double %0)
store i32 %3, i32* %1
%4 = tail call i32 @__builtin_vsx_xstsqrtdp_fg(double %0)
%5 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %4, i32* %5
ret void
}