xunge/DecIR huggingface dataset:
int fib(int n) {
#pragma analysis_check assert upper_exposed(n)
  if (n == 1 || n == 2)
    return 1;
#pragma analysis_check assert defined(x) upper_exposed(n)
  int x = fib(n);
#pragma analysis_check assert defined(y) upper_exposed(n)
  int y = fib(n - 1);
  return x + y;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     112f <fib+0x1f>
cmpl   $0x2,-0x8(%rbp)
jne    113b <fib+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115d <fib+0x4d>
mov    -0x8(%rbp),%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
lea    -0x1(%rbx),%eax
mov    $0x1,%ebp
cmp    $0x2,%eax
jb     1149 <fib+0x39>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebx,%edi
call   1030 <fib@plt>
add    %eax,%ebp
lea    -0x1(%rbx),%eax
add    $0xfffffffe,%ebx
cmp    $0x1,%ebx
mov    %eax,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 1
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 2
br i1 %10, label %11, label %12
11: ; preds = %8, %1
store i32 1, i32* %2
br label %21
12: ; preds = %8
%13 = load i32, i32* %3
%14 = call i32 @fib(i32 %13)
store i32 %14, i32* %4
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 1
%17 = call i32 @fib(i32 %16)
store i32 %17, i32* %5
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = add nsw i32 %18, %19
store i32 %20, i32* %2
br label %21
21: ; preds = %12, %11
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 2
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %10, %4 ], [ %2, %1 ]
%6 = phi i32 [ %5, %4 ], [ %0, %1 ]
%7 = phi i32 [ %9, %4 ], [ 0, %1 ]
%8 = tail call i32 @fib(i32 %6)
%9 = add nsw i32 %8, %7
%10 = add i32 %5, -1
%11 = icmp ult i32 %10, 2
br i1 %11, label %12, label %4
12: ; preds = %4
%13 = add i32 %9, 1
br label %14
14: ; preds = %12, %1
%15 = phi i32 [ 1, %1 ], [ %13, %12 ]
ret i32 %15
}
int foo(int x, int y) {
  if (x == 0) {
    return -1;
  } else {
    return x + y;
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1120 <foo+0x20>
movl   $0xffffffff,-0x4(%rbp)
jmp    1129 <foo+0x29>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    (%rsi,%rdi,1),%ecx
cmp    $0x1,%edi
sbb    %eax,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 -1, i32* %3
br label %13
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = add nsw i32 %10, %11
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = add nsw i32 %1, %0
%5 = select i1 %3, i32 -1, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ s_test();
int /*<<< orphan*/ xsd_test();
int main() {
  s_test();
  xsd_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <s_test@plt>
mov    $0x0,%al
call   1040 <xsd_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <s_test@plt>
xor    %eax,%eax
call   1040 <xsd_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @s_test()
%3 = call i32 (...) @xsd_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @s_test()
%2 = tail call i32 (...) @xsd_test()
ret i32 0
}
int foo(int i) {
  int a, b;
  if (i)
    a = 3, b = 2;
  else
    a = 2, b = 3;
  return a + b;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1124 <foo+0x24>
movl   $0x3,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
jmp    1132 <foo+0x32>
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 3, i32* %3
store i32 2, i32* %4
br label %9
8: ; preds = %1
store i32 2, i32* %3
store i32 3, i32* %4
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
ret i32 5
}
double frac(double u, double v) {
  if (0. == v) {
    return 0.;
  }
  return u / v;
}


x86 assembly (clang, -O0):
<frac>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x18(%rbp),%xmm0
jne    112f <frac+0x2f>
jp     112f <frac+0x2f>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113e <frac+0x3e>
movsd  -0x10(%rbp),%xmm0
divsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<frac>:
xorpd  %xmm2,%xmm2
ucomisd %xmm2,%xmm1
jne    1111 <frac+0x11>
jp     1111 <frac+0x11>
movapd %xmm2,%xmm0
ret
divsd  %xmm1,%xmm0
movapd %xmm0,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @frac(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %5
%7 = fcmp oeq double 0.000000e+00, %6
br i1 %7, label %8, label %9
8: ; preds = %2
store double 0.000000e+00, double* %3
br label %13
9: ; preds = %2
%10 = load double, double* %4
%11 = load double, double* %5
%12 = fdiv double %10, %11
store double %12, double* %3
br label %13
13: ; preds = %9, %8
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @frac(double %0, double %1) {
%3 = fcmp oeq double %1, 0.000000e+00
%4 = fdiv double %0, %1
%5 = select i1 %3, double 0.000000e+00, double %4
ret double %5
}
int ft_fibonacci(int index) {
  if (index < 0) {
    return (-1);
  } else if (index <= 1) {
    return (index);
  } else {
    return (ft_fibonacci(index - 1) + ft_fibonacci(index - 2));
  }
}


x86 assembly (clang, -O0):
<ft_fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1131 <ft_fibonacci+0x21>
movl   $0xffffffff,-0x4(%rbp)
jmp    1169 <ft_fibonacci+0x59>
cmpl   $0x1,-0x8(%rbp)
jg     1146 <ft_fibonacci+0x36>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1169 <ft_fibonacci+0x59>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <ft_fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <ft_fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_fibonacci>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
js     1146 <ft_fibonacci+0x36>
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jb     1142 <ft_fibonacci+0x32>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <ft_fibonacci@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1130 <ft_fibonacci+0x20>
add    %ebp,%ebx
jmp    114b <ft_fibonacci+0x3b>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ft_fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 1
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %20
12: ; preds = %7
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 1
%15 = call i32 @ft_fibonacci(i32 %14)
%16 = load i32, i32* %3
%17 = sub nsw i32 %16, 2
%18 = call i32 @ft_fibonacci(i32 %17)
%19 = add nsw i32 %15, %18
store i32 %19, i32* %2
br label %20
20: ; preds = %12, %10, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @ft_fibonacci(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %17, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 2
br i1 %4, label %13, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %11, %5 ], [ 0, %3 ]
%7 = phi i32 [ %10, %5 ], [ %0, %3 ]
%8 = add nsw i32 %7, -1
%9 = tail call i32 @ft_fibonacci(i32 %8)
%10 = add nsw i32 %7, -2
%11 = add nsw i32 %9, %6
%12 = icmp ult i32 %10, 2
br i1 %12, label %13, label %5
13: ; preds = %5, %3
%14 = phi i32 [ %0, %3 ], [ %10, %5 ]
%15 = phi i32 [ 0, %3 ], [ %11, %5 ]
%16 = add nsw i32 %14, %15
br label %17
17: ; preds = %13, %1
%18 = phi i32 [ %16, %13 ], [ -1, %1 ]
ret i32 %18
}
/* Variables and functions */
int pigpio_command(int, int, int, int /*<<< orphan*/, int);
int wave_get_max_cbs(int pi) { return pigpio_command(pi, 36, 2, 0, 1); }


x86 assembly (clang, -O0):
<wave_get_max_cbs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x24,%esi
mov    $0x2,%edx
xor    %ecx,%ecx
mov    $0x1,%r8d
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wave_get_max_cbs>:
mov    $0x24,%esi
mov    $0x2,%edx
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @wave_get_max_cbs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pigpio_command(i32 %3, i32 36, i32 2, i32 0, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @wave_get_max_cbs(i32 %0) {
%2 = tail call i32 @pigpio_command(i32 %0, i32 36, i32 2, i32 0, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x59() {
  Assert_real((isascii(89)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              450, ("isascii should be 1 for Y"));
}


x86 assembly (clang, -O0):
<t_isascii_0x59>:
push   %rbp
mov    %rsp,%rbp
mov    $0x59,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1c2,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x59>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x1c2,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for Y\00"
define void @t_isascii_0x59() {
%1 = call i32 @isascii(i32 89)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 450, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for Y\00"
define void @t_isascii_0x59() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 450, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int inb(int);
uint8_t ps2in() {
  uint8_t resp = inb(0x60);
  uint8_t status = inb(0x64);
  if (status & 0x20)
    return 0x00;
  return resp;
}


x86 assembly (clang, -O0):
<ps2in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x60,%edi
call   1030 <inb@plt>
mov    %eax,-0x8(%rbp)
mov    $0x64,%edi
call   1030 <inb@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     114d <ps2in+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    1153 <ps2in+0x43>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps2in>:
push   %rbx
mov    $0x60,%edi
call   1030 <inb@plt>
mov    %eax,%ebx
mov    $0x64,%edi
call   1030 <inb@plt>
xor    %ecx,%ecx
test   $0x20,%al
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ps2in() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @inb(i32 96)
store i32 %4, i32* %2
%5 = call i32 @inb(i32 100)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 0, i32* %1
br label %12
10: ; preds = %0
%11 = load i32, i32* %2
store i32 %11, i32* %1
br label %12
12: ; preds = %10, %9
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @ps2in() {
%1 = tail call i32 @inb(i32 96)
%2 = tail call i32 @inb(i32 100)
%3 = and i32 %2, 32
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 %1, i32 0
ret i32 %5
}
unsigned symbolHash(char *symbol) {
  unsigned c, hash = 0;
  while (c = *symbol++) {
    hash = hash * 9 ^ c;
  }
  return hash;
}


x86 assembly (clang, -O0):
<symbolHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
je     113c <symbolHash+0x3c>
imul   $0x9,-0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    110f <symbolHash+0xf>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<symbolHash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1124 <symbolHash+0x24>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
lea    (%rax,%rax,8),%eax
xor    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <symbolHash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @symbolHash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %3
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = load i32, i32* %4
%13 = mul i32 %12, 9
%14 = load i32, i32* %3
%15 = xor i32 %13, %14
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @symbolHash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = mul i32 %6, 9
%11 = xor i32 %10, %8
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Variables and functions */
int __builtin_mips_cabs_ngt_s(float, float);
int test15(float a, float b) { return __builtin_mips_cabs_ngt_s(a, b); }


x86 assembly (clang, -O0):
<test15>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__builtin_mips_cabs_ngt_s@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test15>:
jmp    1030 <__builtin_mips_cabs_ngt_s@plt>

LLVM IR (-O0):
define i32 @test15(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @__builtin_mips_cabs_ngt_s(float %5, float %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test15(float %0, float %1) {
%3 = tail call i32 @__builtin_mips_cabs_ngt_s(float %0, float %1)
ret i32 %3
}
int fib(int x) {
  if (x > 2)
    return (fib(x - 1) + fib(x - 2));
  return (1);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jle    114d <fib+0x3d>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <fib+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x4,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 2
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = call i32 @fib(i32 %8)
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 2
%12 = call i32 @fib(i32 %11)
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
br label %15
14: ; preds = %1
store i32 1, i32* %2
br label %15
15: ; preds = %14, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %13
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ugt i32 %4, 4
br i1 %10, label %3, label %11
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int rng(int, int);
int calcDamage(int strength) {
  int damageTotal = 0;
  damageTotal = rng(strength - (strength / 4), strength + (strength / 5));
  return damageTotal;
}


x86 assembly (clang, -O0):
<calcDamage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
sub    %eax,%edi
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
add    %eax,%esi
call   1030 <rng@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcDamage>:
lea    0x3(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x2,%eax
movslq %edi,%rsi
sub    %eax,%edi
imul   $0x66666667,%rsi,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x21,%rax
add    %ecx,%eax
add    %eax,%esi
jmp    1030 <rng@plt>

LLVM IR (-O0):
define i32 @calcDamage(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 4
%7 = sub nsw i32 %4, %6
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = sdiv i32 %9, 5
%11 = add nsw i32 %8, %10
%12 = call i32 @rng(i32 %7, i32 %11)
store i32 %12, i32* %3
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @calcDamage(i32 %0) {
%2 = sdiv i32 %0, -4
%3 = add i32 %2, %0
%4 = sdiv i32 %0, 5
%5 = add nsw i32 %4, %0
%6 = tail call i32 @rng(i32 %3, i32 %5)
ret i32 %6
}
void foo227() {}


x86 assembly (clang, -O0):
<foo227>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo227>:
ret

LLVM IR (-O0):
define void @foo227() {
ret void
}

LLVM IR (-O2):
define void @foo227() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ DTV_ENUM_DELSYS;
int get_property(int, int /*<<< orphan*/, int /*<<< orphan*/ *,
                 int /*<<< orphan*/ *);
int dvbfe_enum_delsys(int fd, uint32_t *len, uint8_t *data) {
  return get_property(fd, DTV_ENUM_DELSYS, len, data);
}


x86 assembly (clang, -O0):
<dvbfe_enum_delsys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <get_property@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dvbfe_enum_delsys>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
jmp    1030 <get_property@plt>

LLVM IR (-O0):
@DTV_ENUM_DELSYS = global i32 0
define i32 @dvbfe_enum_delsys(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* @DTV_ENUM_DELSYS
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = call i32 @get_property(i32 %7, i32 %8, i32* %9, i32* %10)
ret i32 %11
}

LLVM IR (-O2):
@DTV_ENUM_DELSYS = global i32 0
define i32 @dvbfe_enum_delsys(i32 %0, i32* %1, i32* %2) {
%4 = load i32, i32* @DTV_ENUM_DELSYS
%5 = tail call i32 @get_property(i32 %0, i32 %4, i32* %1, i32* %2)
ret i32 %5
}
/* Variables and functions */
char *strcat(char *, char const *);
char *test10(char *a1, const char *a2) { return strcat(a1, a2); }


x86 assembly (clang, -O0):
<test10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test10>:
jmp    1030 <strcat@plt>

LLVM IR (-O0):
define i8* @test10(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strcat(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @test10(i8* returned %0, i8* nocapture %1) {
%3 = tail call i8* @strcat(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_self();
pthread_t Thread_getid() { return pthread_self(); }


x86 assembly (clang, -O0):
<Thread_getid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pthread_self@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Thread_getid>:
xor    %eax,%eax
jmp    1030 <pthread_self@plt>

LLVM IR (-O0):
define i32 @Thread_getid() {
%1 = call i32 (...) @pthread_self()
ret i32 %1
}

LLVM IR (-O2):
define i32 @Thread_getid() {
%1 = tail call i32 (...) @pthread_self()
ret i32 %1
}
void overflow() {
  static int i = 0;
  char foo[30];
  for (i = 0; i < 50; i++)
    foo[i] = 42;
}


x86 assembly (clang, -O0):
<overflow>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,0x2f16(%rip)
cmpl   $0x32,0x2f0f(%rip)
jge    113b <overflow+0x3b>
movslq 0x2f02(%rip),%rax
movb   $0x2a,-0x20(%rbp,%rax,1)
mov    0x2ef7(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2eee(%rip)
jmp    110e <overflow+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<overflow>:
ret

LLVM IR (-O0):
@overflow.i = internal global i32 0
define void @overflow() {
%1 = alloca [30 x i8]
store i32 0, i32* @overflow.i
br label %2
2: ; preds = %9, %0
%3 = load i32, i32* @overflow.i
%4 = icmp slt i32 %3, 50
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = load i32, i32* @overflow.i
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [30 x i8], [30 x i8]* %1, i64 0, i64 %7
store i8 42, i8* %8
br label %9
9: ; preds = %5
%10 = load i32, i32* @overflow.i
%11 = add nsw i32 %10, 1
store i32 %11, i32* @overflow.i
br label %2
12: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @overflow() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __predictor_printBasicStatistics(int /*<<< orphan*/, int);
void predictor_printBasicStatistics(int csv) {
  __predictor_printBasicStatistics(0, csv);
}


x86 assembly (clang, -O0):
<predictor_printBasicStatistics>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1030 <__predictor_printBasicStatistics@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<predictor_printBasicStatistics>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <__predictor_printBasicStatistics@plt>

LLVM IR (-O0):
define void @predictor_printBasicStatistics(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__predictor_printBasicStatistics(i32 0, i32 %3)
ret void
}

LLVM IR (-O2):
define void @predictor_printBasicStatistics(i32 %0) {
%2 = tail call i32 @__predictor_printBasicStatistics(i32 0, i32 %0)
ret void
}
/* Variables and functions */
double frexp10(double, int *);
int /*<<< orphan*/ printf(char *, double, ...);
void printdouble(double num) {
  if (0) {
    double fraction;
    int exponent;
    fraction = frexp10(num, &exponent);
    printf("%.2lfe%d", fraction, exponent);
  } else {
    printf("%.4f", num);
  }
}


x86 assembly (clang, -O0):
<printdouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xed7(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printdouble>:
lea    0xee9(%rip),%rdi
mov    $0x1,%al
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%.4f\00"
define void @printdouble(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 (i8*, double, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), double %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%.4f\00"
define void @printdouble(double %0) {
%2 = tail call i32 (i8*, double, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), double %0)
ret void
}
int up_checkabort(void) { return 0; }


x86 assembly (clang, -O0):
<up_checkabort>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<up_checkabort>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @up_checkabort() {
ret i32 0
}

LLVM IR (-O2):
define i32 @up_checkabort() {
ret i32 0
}
/* Variables and functions */
size_t darray_next_alloc(size_t alloc, size_t need) {
  if (alloc == 0)
    alloc = 1;
  while (alloc < need)
    alloc *= 2;
  return alloc;
}


x86 assembly (clang, -O0):
<darray_next_alloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    111f <darray_next_alloc+0x1f>
movq   $0x1,-0x8(%rbp)
jmp    1124 <darray_next_alloc+0x24>
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1143 <darray_next_alloc+0x43>
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1124 <darray_next_alloc+0x24>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<darray_next_alloc>:
test   %rdi,%rdi
mov    $0x1,%ecx
cmovne %rdi,%rcx
nopl   0x0(%rax)
mov    %rcx,%rax
add    %rcx,%rcx
cmp    %rsi,%rax
jb     1110 <darray_next_alloc+0x10>
ret

LLVM IR (-O0):
define i64 @darray_next_alloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
store i64 1, i64* %3
br label %8
8: ; preds = %7, %2
br label %9
9: ; preds = %13, %8
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i64, i64* %3
%15 = mul i64 %14, 2
store i64 %15, i64* %3
br label %9
16: ; preds = %9
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @darray_next_alloc(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
%4 = select i1 %3, i64 1, i64 %0
br label %5
5: ; preds = %5, %2
%6 = phi i64 [ %4, %2 ], [ %8, %5 ]
%7 = icmp ult i64 %6, %1
%8 = shl i64 %6, 1
br i1 %7, label %5, label %9
9: ; preds = %5
ret i64 %6
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
const char *partcode_path(const char *part_type) {
  if (strcmp(part_type, "GPT") == 0)
    return ("/boot/gptboot");
  return (NULL);
}


x86 assembly (clang, -O0):
<partcode_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1146 <partcode_path+0x36>
lea    0xec7(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <partcode_path+0x3e>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<partcode_path>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
lea    0xedb(%rip),%rax
cmove  %rax,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"GPT\00"
@.str.1 = [14 x i8] c"/boot/gptboot\00"
define i8* @partcode_path(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %9
8: ; preds = %1
store i8* null, i8** %2
br label %9
9: ; preds = %8, %7
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@.str = [4 x i8] c"GPT\00"
@.str.1 = [14 x i8] c"/boot/gptboot\00"
define i8* @partcode_path(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* null
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ append_setup();
int /*<<< orphan*/ elem_setup();
int /*<<< orphan*/ get_setup();
int /*<<< orphan*/ getsize_setup();
int /*<<< orphan*/ ptrobj_setup();
int /*<<< orphan*/ set_setup();
int /*<<< orphan*/ setsize_setup();
void g_traversal_setup(void) {
  ptrobj_setup();
  get_setup();
  set_setup();
  elem_setup();
  getsize_setup();
  setsize_setup();
  append_setup();
}


x86 assembly (clang, -O0):
<g_traversal_setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <ptrobj_setup@plt>
mov    $0x0,%al
call   1080 <get_setup@plt>
mov    $0x0,%al
call   1050 <set_setup@plt>
mov    $0x0,%al
call   1040 <elem_setup@plt>
mov    $0x0,%al
call   1030 <getsize_setup@plt>
mov    $0x0,%al
call   1060 <setsize_setup@plt>
mov    $0x0,%al
call   1090 <append_setup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_traversal_setup>:
push   %rax
xor    %eax,%eax
call   1070 <ptrobj_setup@plt>
xor    %eax,%eax
call   1080 <get_setup@plt>
xor    %eax,%eax
call   1050 <set_setup@plt>
xor    %eax,%eax
call   1040 <elem_setup@plt>
xor    %eax,%eax
call   1030 <getsize_setup@plt>
xor    %eax,%eax
call   1060 <setsize_setup@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <append_setup@plt>

LLVM IR (-O0):
define void @g_traversal_setup() {
%1 = call i32 (...) @ptrobj_setup()
%2 = call i32 (...) @get_setup()
%3 = call i32 (...) @set_setup()
%4 = call i32 (...) @elem_setup()
%5 = call i32 (...) @getsize_setup()
%6 = call i32 (...) @setsize_setup()
%7 = call i32 (...) @append_setup()
ret void
}

LLVM IR (-O2):
define void @g_traversal_setup() {
%1 = tail call i32 (...) @ptrobj_setup()
%2 = tail call i32 (...) @get_setup()
%3 = tail call i32 (...) @set_setup()
%4 = tail call i32 (...) @elem_setup()
%5 = tail call i32 (...) @getsize_setup()
%6 = tail call i32 (...) @setsize_setup()
%7 = tail call i32 (...) @append_setup()
ret void
}
void decode_float(unsigned char *buffer, float *f) {
  unsigned int uf = 0;
  uf = buffer[3];
  uf <<= 8;
  uf += (buffer[2] & 0xFF);
  uf <<= 8;
  uf += (buffer[1] & 0xFF);
  uf <<= 8;
  uf += (buffer[0] & 0xFF);
  *f = *(float *)(&uf);
}


x86 assembly (clang, -O0):
<decode_float>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x2(%rax),%eax
and    $0xff,%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
and    $0xff,%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0xff,%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_float>:
mov    (%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @decode_float(i8* %0, float* %1) {
%3 = alloca i8*
%4 = alloca float*
%5 = alloca i32
store i8* %0, i8** %3
store float* %1, float** %4
store i32 0, i32* %5
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = shl i32 %10, 8
store i32 %11, i32* %5
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 2
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = and i32 %15, 255
%17 = load i32, i32* %5
%18 = add i32 %17, %16
store i32 %18, i32* %5
%19 = load i32, i32* %5
%20 = shl i32 %19, 8
store i32 %20, i32* %5
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i64 1
%23 = load i8, i8* %22
%24 = zext i8 %23 to i32
%25 = and i32 %24, 255
%26 = load i32, i32* %5
%27 = add i32 %26, %25
store i32 %27, i32* %5
%28 = load i32, i32* %5
%29 = shl i32 %28, 8
store i32 %29, i32* %5
%30 = load i8*, i8** %3
%31 = getelementptr inbounds i8, i8* %30, i64 0
%32 = load i8, i8* %31
%33 = zext i8 %32 to i32
%34 = and i32 %33, 255
%35 = load i32, i32* %5
%36 = add i32 %35, %34
store i32 %36, i32* %5
%37 = bitcast i32* %5 to float*
%38 = load float, float* %37
%39 = load float*, float** %4
store float %38, float* %39
ret void
}

LLVM IR (-O2):
define void @decode_float(i8* nocapture %0, float* nocapture writeonly %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %5, 16
%10 = shl nuw nsw i32 %8, 8
%11 = or i32 %10, %9
%12 = getelementptr inbounds i8, i8* %0, i64 1
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = or i32 %11, %14
%16 = shl nuw i32 %15, 8
%17 = load i8, i8* %0
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = bitcast float* %1 to i32*
store i32 %19, i32* %20
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void *, char const *);
void *dlsym(void *handle, const char *symbol) {
  printf(">>> dlsym(%p,%s)\n", handle, symbol);
  return NULL;
}


x86 assembly (clang, -O0):
<dlsym>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlsym>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c">>> dlsym(%p,%s)\0A\00"
define i8* @dlsym(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret i8* null
}

LLVM IR (-O2):
@.str = [18 x i8] c">>> dlsym(%p,%s)\0A\00"
define noalias i8* @dlsym(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ roadmap_screen_rotate(int);
void roadmap_start_counter_rotate(void) { roadmap_screen_rotate(-10); }


x86 assembly (clang, -O0):
<roadmap_start_counter_rotate>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffff6,%edi
call   1030 <roadmap_screen_rotate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_start_counter_rotate>:
mov    $0xfffffff6,%edi
jmp    1030 <roadmap_screen_rotate@plt>

LLVM IR (-O0):
define void @roadmap_start_counter_rotate() {
%1 = call i32 @roadmap_screen_rotate(i32 -10)
ret void
}

LLVM IR (-O2):
define void @roadmap_start_counter_rotate() {
%1 = tail call i32 @roadmap_screen_rotate(i32 -10)
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int imul_hi_op_08(char a, char b) {
  int64_t res = 0;
  res = a * b;
  return (int)(res >> 8);
}


x86 assembly (clang, -O0):
<imul_hi_op_08>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0x0,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
imul   %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imul_hi_op_08>:
mov    %edi,%eax
imul   %esi,%eax
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @imul_hi_op_08(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 0, i32* %5
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = mul nsw i32 %7, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = ashr i32 %11, 8
ret i32 %12
}

LLVM IR (-O2):
define i32 @imul_hi_op_08(i8 signext %0, i8 signext %1) {
%3 = sext i8 %0 to i32
%4 = sext i8 %1 to i32
%5 = mul nsw i32 %4, %3
%6 = ashr i32 %5, 8
ret i32 %6
}
int between(double min, double max, double n) { return n >= min && n <= max; }


x86 assembly (clang, -O0):
<between>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
xor    %eax,%eax
ucomisd -0x8(%rbp),%xmm0
mov    %al,-0x19(%rbp)
jb     113c <between+0x3c>
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<between>:
ucomisd %xmm0,%xmm2
setae  %al
ucomisd %xmm2,%xmm1
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @between(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %6
%8 = load double, double* %4
%9 = fcmp oge double %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load double, double* %6
%12 = load double, double* %5
%13 = fcmp ole double %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @between(double %0, double %1, double %2) {
%4 = fcmp oge double %2, %0
%5 = fcmp ole double %2, %1
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
unsigned char *hmac_md2(unsigned char *, unsigned char const *, size_t,
                        unsigned char const *, size_t);
unsigned char *mac_hmac_md2(unsigned char *out, const unsigned char *key,
                            size_t key_len, const unsigned char *msg,
                            size_t msg_len) {
  return hmac_md2(out, key, key_len, msg, msg_len);
}


x86 assembly (clang, -O0):
<mac_hmac_md2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <hmac_md2@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mac_hmac_md2>:
jmp    1030 <hmac_md2@plt>

LLVM IR (-O0):
define i8* @mac_hmac_md2(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i64 %4, i64* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = load i8*, i8** %9
%15 = load i64, i64* %10
%16 = call i8* @hmac_md2(i8* %11, i8* %12, i64 %13, i8* %14, i64 %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @mac_hmac_md2(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = tail call i8* @hmac_md2(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4)
ret i8* %6
}
float scale_midi_to_f(unsigned char data) { return 0.0078f * (float)(data); }


x86 assembly (clang, -O0):
<scale_midi_to_f>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cvtsi2ss %eax,%xmm1
movss  0xee6(%rip),%xmm0
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_midi_to_f>:
cvtsi2ss %edi,%xmm0
mulss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @scale_midi_to_f(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = uitofp i8 %3 to float
%5 = fmul float 0x3F7FF2E480000000, %4
ret float %5
}

LLVM IR (-O2):
define float @scale_midi_to_f(i8 zeroext %0) {
%2 = uitofp i8 %0 to float
%3 = fmul float %2, 0x3F7FF2E480000000
ret float %3
}
/* Type definitions */
struct vioDevice {
  int dummy;
};
struct device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ freeDevice(struct device *);
void vioFreeDevice(struct vioDevice *dev) { freeDevice((struct device *)dev); }


x86 assembly (clang, -O0):
<vioFreeDevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <freeDevice@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vioFreeDevice>:
jmp    1030 <freeDevice@plt>

LLVM IR (-O0):
%struct.vioDevice = type { i32 }
%struct.device = type { i32 }
define void @vioFreeDevice(%struct.vioDevice* %0) {
%2 = alloca %struct.vioDevice*
store %struct.vioDevice* %0, %struct.vioDevice** %2
%3 = load %struct.vioDevice*, %struct.vioDevice** %2
%4 = bitcast %struct.vioDevice* %3 to %struct.device*
%5 = call i32 @freeDevice(%struct.device* %4)
ret void
}

LLVM IR (-O2):
%struct.vioDevice = type { i32 }
%struct.device = type { i32 }
define void @vioFreeDevice(%struct.vioDevice* %0) {
%2 = bitcast %struct.vioDevice* %0 to %struct.device*
%3 = tail call i32 @freeDevice(%struct.device* %2)
ret void
}
float convert_decdeg_to_rad(float th_decdeg) {
  float decdeg_to_rad = (0.1 * 3.141592653 / 180.0);
  return th_decdeg * decdeg_to_rad;
}


x86 assembly (clang, -O0):
<convert_decdeg_to_rad>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_decdeg_to_rad>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @convert_decdeg_to_rad(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
store float 0x3F5C987100000000, float* %3
%4 = load float, float* %2
%5 = load float, float* %3
%6 = fmul float %4, %5
ret float %6
}

LLVM IR (-O2):
define float @convert_decdeg_to_rad(float %0) {
%2 = fmul float %0, 0x3F5C987100000000
ret float %2
}
int CheckReadBase(char base) {
  switch (base) {
  case 'a':
  case 'c':
  case 'g':
  case 't':
    return 1;
    break;
  default:
    return 0;
    break;
  }
}


x86 assembly (clang, -O0):
<CheckReadBase>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x61,%eax
je     1152 <CheckReadBase+0x52>
jmp    111f <CheckReadBase+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x63,%eax
je     1152 <CheckReadBase+0x52>
jmp    1130 <CheckReadBase+0x30>
mov    -0xc(%rbp),%eax
sub    $0x67,%eax
je     1152 <CheckReadBase+0x52>
jmp    1141 <CheckReadBase+0x41>
mov    -0xc(%rbp),%eax
sub    $0x74,%eax
jne    115e <CheckReadBase+0x5e>
jmp    1152 <CheckReadBase+0x52>
movl   $0x1,-0x4(%rbp)
jmp    1165 <CheckReadBase+0x65>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckReadBase>:
add    $0xffffff9f,%edi
cmp    $0x13,%edi
ja     1118 <CheckReadBase+0x18>
mov    $0x1,%eax
mov    $0x80045,%ecx
bt     %edi,%ecx
jae    1118 <CheckReadBase+0x18>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @CheckReadBase(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 97, label %6
i32 99, label %6
i32 103, label %6
i32 116, label %6
]
6: ; preds = %1, %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @CheckReadBase(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 97, label %4
i32 99, label %4
i32 103, label %4
i32 116, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}