xunge/DecIR huggingface dataset:
/* Variables and functions */
float gammp(double, float);
float gammq(double, float);
float erffc(float x) {
  return x < 0.0 ? 1.0 + gammp(0.5, x * x) : gammq(0.5, x * x);
}


x86 assembly (clang, -O0):
<erffc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    1174 <erffc+0x54>
movss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movsd  0xeab(%rip),%xmm0
call   1040 <gammp@plt>
cvtss2sd %xmm0,%xmm1
movsd  0xea2(%rip),%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1194 <erffc+0x74>
movss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movsd  0xe7a(%rip),%xmm0
call   1030 <gammq@plt>
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erffc>:
push   %rax
movaps %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomiss %xmm1,%xmm0
mulss  %xmm1,%xmm1
movsd  0xeca(%rip),%xmm0
jbe    114b <erffc+0x2b>
call   1040 <gammp@plt>
cvtss2sd %xmm0,%xmm0
addsd  0xebf(%rip),%xmm0
jmp    1154 <erffc+0x34>
call   1030 <gammq@plt>
cvtss2sd %xmm0,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @erffc(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load float, float* %2
%8 = load float, float* %2
%9 = fmul float %7, %8
%10 = call float @gammp(double 5.000000e-01, float %9)
%11 = fpext float %10 to double
%12 = fadd double 1.000000e+00, %11
br label %19
13: ; preds = %1
%14 = load float, float* %2
%15 = load float, float* %2
%16 = fmul float %14, %15
%17 = call float @gammq(double 5.000000e-01, float %16)
%18 = fpext float %17 to double
br label %19
19: ; preds = %13, %6
%20 = phi double [ %12, %6 ], [ %18, %13 ]
%21 = fptrunc double %20 to float
ret float %21
}

LLVM IR (-O2):
define float @erffc(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = fmul float %0, %0
br i1 %2, label %4, label %8
4: ; preds = %1
%5 = tail call float @gammp(double 5.000000e-01, float %3)
%6 = fpext float %5 to double
%7 = fadd double %6, 1.000000e+00
br label %11
8: ; preds = %1
%9 = tail call float @gammq(double 5.000000e-01, float %3)
%10 = fpext float %9 to double
br label %11
11: ; preds = %8, %4
%12 = phi double [ %7, %4 ], [ %10, %8 ]
%13 = fptrunc double %12 to float
ret float %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long);
int /*<<< orphan*/ putchar(char);
int main() {
  long int humongous;
  char chuck;
  for (humongous = 65; humongous <= 90; humongous++) {
    printf("\t%d", humongous);
    chuck = (char)humongous;
    putchar(chuck);
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x41,-0x10(%rbp)
cmpq   $0x5a,-0x10(%rbp)
jg     1173 <main+0x53>
mov    -0x10(%rbp),%rsi
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rax
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <main+0x17>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x41,%ebx
lea    0xed0(%rip),%r14
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
movsbl %bl,%edi
call   1030 <putchar@plt>
add    $0x1,%rbx
cmp    $0x5b,%rbx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\09%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i8
store i32 0, i32* %1
store i64 65, i64* %2
br label %4
4: ; preds = %14, %0
%5 = load i64, i64* %2
%6 = icmp sle i64 %5, 90
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i64, i64* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %8)
%10 = load i64, i64* %2
%11 = trunc i64 %10 to i8
store i8 %11, i8* %3
%12 = load i8, i8* %3
%13 = call i32 @putchar(i8 signext %12)
br label %14
14: ; preds = %7
%15 = load i64, i64* %2
%16 = add nsw i64 %15, 1
store i64 %16, i64* %2
br label %4
17: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"\09%d\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i64 [ 65, %0 ], [ %6, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %2)
%4 = trunc i64 %2 to i8
%5 = tail call i32 @putchar(i8 signext %4)
%6 = add nuw nsw i64 %2, 1
%7 = icmp eq i64 %6, 91
br i1 %7, label %8, label %1
8: ; preds = %1
ret i32 0
}
void test_cimagf(_Complex float f) {
  if (cimagf(f) != cimagf(f))
    link_failure_cimagf();
}


x86 assembly (clang, -O0):
<test_cimagf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movlpd %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
jne    1137 <test_cimagf+0x27>
jp     1137 <test_cimagf+0x27>
jmp    113e <test_cimagf+0x2e>
mov    $0x0,%al
call   1030 <link_failure_cimagf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_cimagf>:
shufps $0x55,%xmm0,%xmm0
ucomiss %xmm0,%xmm0
jp     111a <test_cimagf+0xa>
ret
xor    %eax,%eax
jmp    1030 <link_failure_cimagf@plt>

LLVM IR (-O0):
define void @test_cimagf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = bitcast { float, float }* %2 to <2 x float>*
store <2 x float> %0, <2 x float>* %3
%4 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%5 = load float, float* %4
%6 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
%7 = load float, float* %6
%8 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%9 = load float, float* %8
%10 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
%11 = load float, float* %10
%12 = fcmp une float %7, %11
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = call i32 (...) @link_failure_cimagf()
br label %15
15: ; preds = %13, %1
ret void
}

LLVM IR (-O2):
define void @test_cimagf(<2 x float> %0) {
%2 = extractelement <2 x float> %0, i64 1
%3 = fcmp uno float %2, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @link_failure_cimagf()
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sayhello(char *);
int main(int argc, char **argv) {
  if (argc > 1)
    sayhello(argv[1]);
  else
    sayhello(NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1142 <main+0x32>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <sayhello@plt>
jmp    114b <main+0x3b>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <sayhello@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     111c <main+0xc>
mov    0x8(%rsi),%rdi
jmp    111e <main+0xe>
xor    %edi,%edi
call   1030 <sayhello@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @sayhello(i8* %11)
br label %15
13: ; preds = %2
%14 = call i32 @sayhello(i8* null)
br label %15
15: ; preds = %13, %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
br label %7
7: ; preds = %2, %4
%8 = phi i8* [ %6, %4 ], [ null, %2 ]
%9 = tail call i32 @sayhello(i8* %8)
ret i32 0
}
/* Type definitions */
struct large {
  int dummy;
};

/* Variables and functions */
struct large *large_new(int);
int /*<<< orphan*/ large_set(struct large *, int);
struct large *large_from_int(int capacity, int val) {
  struct large *ret = large_new(capacity);
  large_set(ret, val);
  return ret;
}


x86 assembly (clang, -O0):
<large_from_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <large_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1040 <large_set@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<large_from_int>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
call   1030 <large_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %ebp,%esi
call   1040 <large_set@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.large = type { i32 }
define %struct.large* @large_from_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.large*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call %struct.large* @large_new(i32 %6)
store %struct.large* %7, %struct.large** %5
%8 = load %struct.large*, %struct.large** %5
%9 = load i32, i32* %4
%10 = call i32 @large_set(%struct.large* %8, i32 %9)
%11 = load %struct.large*, %struct.large** %5
ret %struct.large* %11
}

LLVM IR (-O2):
%struct.large = type { i32 }
define %struct.large* @large_from_int(i32 %0, i32 %1) {
%3 = tail call %struct.large* @large_new(i32 %0)
%4 = tail call i32 @large_set(%struct.large* %3, i32 %1)
ret %struct.large* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint16_t;

/* Variables and functions */
__attribute__((always_)) uint16_t B_PASS16(uint16_t const x) { return x; }


x86 assembly (clang, -O0):
<B_PASS16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<B_PASS16>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @B_PASS16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @B_PASS16(i32 returned %0) {
ret i32 %0
}
int test_imm_72uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x72 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_72uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x72,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_72uint64_midword_mem>:
testb  $0x72,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_72uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 114
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_72uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7471104
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
double sample_Gam(double, double);
double initialize_eta() {
  double eta;
  eta = sample_Gam(1.0, 1.0);
  return (eta);
}


x86 assembly (clang, -O0):
<initialize_eta>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  0xee0(%rip),%xmm1
movaps %xmm1,%xmm0
call   1030 <sample_Gam@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_eta>:
movsd  0xee8(%rip),%xmm0
movaps %xmm0,%xmm1
jmp    1030 <sample_Gam@plt>

LLVM IR (-O0):
define double @initialize_eta() {
%1 = alloca double
%2 = call double @sample_Gam(double 1.000000e+00, double 1.000000e+00)
store double %2, double* %1
%3 = load double, double* %1
ret double %3
}

LLVM IR (-O2):
define double @initialize_eta() {
%1 = tail call double @sample_Gam(double 1.000000e+00, double 1.000000e+00)
ret double %1
}
/* Variables and functions */
char *hora();
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("Teste da lib compartilhada:");
  puts(hora());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1040 <hora@plt>
mov    %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <hora@plt>
mov    %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Teste da lib compartilhada:\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%3 = call i8* (...) @hora()
%4 = call i32 @puts(i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"Teste da lib compartilhada:\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%2 = tail call i8* (...) @hora()
%3 = tail call i32 @puts(i8* dereferenceable(1) %2)
ret i32 0
}
/* Type definitions */
struct config {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Warning(char *, char *);
char *blockstore_get_filename(struct config *);
int /*<<< orphan*/ file_unlink(char *);
int /*<<< orphan*/ free(char *);
void blockstore_zap(struct config *config) {
  char *file;
  file = blockstore_get_filename(config);
  Warning("BLCK:"
          " removing blockset '%s'.\n",
          file);
  file_unlink(file);
  free(file);
}


x86 assembly (clang, -O0):
<blockstore_zap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <blockstore_get_filename@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xe9c(%rip),%rdi
call   1040 <Warning@plt>
mov    -0x10(%rbp),%rdi
call   1050 <file_unlink@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blockstore_zap>:
push   %rbx
call   1060 <blockstore_get_filename@plt>
mov    %rax,%rbx
lea    0xeb0(%rip),%rdi
mov    %rax,%rsi
call   1040 <Warning@plt>
mov    %rbx,%rdi
call   1050 <file_unlink@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.config = type { i32 }
@.str = [31 x i8] c"BLCK: removing blockset '%s'.\0A\00"
define void @blockstore_zap(%struct.config* %0) {
%2 = alloca %struct.config*
%3 = alloca i8*
store %struct.config* %0, %struct.config** %2
%4 = load %struct.config*, %struct.config** %2
%5 = call i8* @blockstore_get_filename(%struct.config* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @Warning(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i8*, i8** %3
%9 = call i32 @file_unlink(i8* %8)
%10 = load i8*, i8** %3
%11 = call i32 @free(i8* %10)
ret void
}

LLVM IR (-O2):
%struct.config = type { i32 }
@.str = [31 x i8] c"BLCK: removing blockset '%s'.\0A\00"
define void @blockstore_zap(%struct.config* %0) {
%2 = tail call i8* @blockstore_get_filename(%struct.config* %0)
%3 = tail call i32 @Warning(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @file_unlink(i8* %2)
%5 = tail call i32 @free(i8* %2)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void sg_nz_put_unaligned_le24(uint32_t val, void *p) {
  if (val) {
    ((uint8_t *)p)[2] = (val >> 16) & 0xff;
    ((uint8_t *)p)[1] = (val >> 8) & 0xff;
    ((uint8_t *)p)[0] = val & 0xff;
  }
}


x86 assembly (clang, -O0):
<sg_nz_put_unaligned_le24>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114a <sg_nz_put_unaligned_le24+0x4a>
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_nz_put_unaligned_le24>:
test   %edi,%edi
je     111c <sg_nz_put_unaligned_le24+0x1c>
mov    %edi,%eax
mov    %edi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x8(%rsi)
movzbl %ah,%ecx
mov    %ecx,0x4(%rsi)
movzbl %al,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @sg_nz_put_unaligned_le24(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %25
7: ; preds = %2
%8 = load i32, i32* %3
%9 = ashr i32 %8, 16
%10 = and i32 %9, 255
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i32*
%13 = getelementptr inbounds i32, i32* %12, i64 2
store i32 %10, i32* %13
%14 = load i32, i32* %3
%15 = ashr i32 %14, 8
%16 = and i32 %15, 255
%17 = load i8*, i8** %4
%18 = bitcast i8* %17 to i32*
%19 = getelementptr inbounds i32, i32* %18, i64 1
store i32 %16, i32* %19
%20 = load i32, i32* %3
%21 = and i32 %20, 255
%22 = load i8*, i8** %4
%23 = bitcast i8* %22 to i32*
%24 = getelementptr inbounds i32, i32* %23, i64 0
store i32 %21, i32* %24
br label %25
25: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @sg_nz_put_unaligned_le24(i32 %0, i8* nocapture writeonly %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = lshr i32 %0, 16
%6 = and i32 %5, 255
%7 = bitcast i8* %1 to i32*
%8 = getelementptr inbounds i8, i8* %1, i64 8
%9 = bitcast i8* %8 to i32*
store i32 %6, i32* %9
%10 = lshr i32 %0, 8
%11 = and i32 %10, 255
%12 = getelementptr inbounds i8, i8* %1, i64 4
%13 = bitcast i8* %12 to i32*
store i32 %11, i32* %13
%14 = and i32 %0, 255
store i32 %14, i32* %7
br label %15
15: ; preds = %4, %2
ret void
}
/* Variables and functions */
int serial_iec_lib_read_sector(unsigned int, unsigned int, unsigned int,
                               unsigned char *);
int machine_bus_lib_read_sector(unsigned int unit, unsigned int track,
                                unsigned int sector, unsigned char *buf) {
  return serial_iec_lib_read_sector(unit, track, sector, buf);
}


x86 assembly (clang, -O0):
<machine_bus_lib_read_sector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <serial_iec_lib_read_sector@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<machine_bus_lib_read_sector>:
jmp    1030 <serial_iec_lib_read_sector@plt>

LLVM IR (-O0):
define i32 @machine_bus_lib_read_sector(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %8
%13 = call i32 @serial_iec_lib_read_sector(i32 %9, i32 %10, i32 %11, i8* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @machine_bus_lib_read_sector(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = tail call i32 @serial_iec_lib_read_sector(i32 %0, i32 %1, i32 %2, i8* %3)
ret i32 %5
}
int _falwcGenericTextEscapement() { return 0; }


x86 assembly (clang, -O0):
<_falwcGenericTextEscapement>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_falwcGenericTextEscapement>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_falwcGenericTextEscapement() {
ret i32 0
}

LLVM IR (-O2):
define i32 @_falwcGenericTextEscapement() {
ret i32 0
}
/* Type definitions */
struct vector {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec_neg_copy(struct vector *, struct vector *);
void vec_neg(struct vector *r) { vec_neg_copy(r, r); }


x86 assembly (clang, -O0):
<vec_neg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <vec_neg_copy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec_neg>:
mov    %rdi,%rsi
jmp    1030 <vec_neg_copy@plt>

LLVM IR (-O0):
%struct.vector = type { i32 }
define void @vec_neg(%struct.vector* %0) {
%2 = alloca %struct.vector*
store %struct.vector* %0, %struct.vector** %2
%3 = load %struct.vector*, %struct.vector** %2
%4 = load %struct.vector*, %struct.vector** %2
%5 = call i32 @vec_neg_copy(%struct.vector* %3, %struct.vector* %4)
ret void
}

LLVM IR (-O2):
%struct.vector = type { i32 }
define void @vec_neg(%struct.vector* %0) {
%2 = tail call i32 @vec_neg_copy(%struct.vector* %0, %struct.vector* %0)
ret void
}
void getX86CpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
                        unsigned *rECX, unsigned *rEDX) {
  asm("movq\t%%rbx, %%rsi\n\t"
      "cpuid\n\t"
      "xchgq\t%%rbx, %%rsi\n\t"
      : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX)
      : "a"(value));
}


x86 assembly (clang, -O0):
<getX86CpuIDAndInfo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x10(%rbp),%r9
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x4(%rbp),%eax
mov    %rbx,%rsi
cpuid
xchg   %rsi,%rbx
mov    %eax,%r10d
mov    -0x38(%rbp),%rax
mov    %esi,%r8d
mov    %ecx,%esi
mov    -0x30(%rbp),%rcx
mov    %r10d,(%r9)
mov    %r8d,(%rdi)
mov    %esi,(%rcx)
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<getX86CpuIDAndInfo>:
mov    %rcx,%r9
mov    %rdx,%r10
mov    %rsi,%r11
mov    %edi,%eax
mov    %rbx,%rsi
cpuid
xchg   %rsi,%rbx
mov    %eax,(%r11)
mov    %esi,(%r10)
mov    %ecx,(%r9)
mov    %edx,(%r8)
ret

LLVM IR (-O0):
define void @getX86CpuIDAndInfo(i32 %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
store i32 %0, i32* %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = load i32*, i32** %9
%14 = load i32*, i32** %10
%15 = load i32, i32* %6
%16 = call { i32, i32, i32, i32 } asm "movq\09%rbx, %rsi\0A\09cpuid\0A\09xchgq\09%rbx, %rsi\0A\09", "={ax},={si},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %15)
%17 = extractvalue { i32, i32, i32, i32 } %16, 0
%18 = extractvalue { i32, i32, i32, i32 } %16, 1
%19 = extractvalue { i32, i32, i32, i32 } %16, 2
%20 = extractvalue { i32, i32, i32, i32 } %16, 3
store i32 %17, i32* %11
store i32 %18, i32* %12
store i32 %19, i32* %13
store i32 %20, i32* %14
ret void
}

LLVM IR (-O2):
define void @getX86CpuIDAndInfo(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4) {
%6 = tail call { i32, i32, i32, i32 } asm "movq\09%rbx, %rsi\0A\09cpuid\0A\09xchgq\09%rbx, %rsi\0A\09", "={ax},={si},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %0)
%7 = extractvalue { i32, i32, i32, i32 } %6, 0
%8 = extractvalue { i32, i32, i32, i32 } %6, 1
%9 = extractvalue { i32, i32, i32, i32 } %6, 2
%10 = extractvalue { i32, i32, i32, i32 } %6, 3
store i32 %7, i32* %1
store i32 %8, i32* %2
store i32 %9, i32* %3
store i32 %10, i32* %4
ret void
}
/* Variables and functions */
void swap(char *str, size_t i, size_t j) {
  char tmp = str[i];
  str[i] = str[j];
  str[j] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x19(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x19(%rbp),%dl
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi,%rsi,1),%al
mov    (%rdi,%rdx,1),%cl
mov    %cl,(%rdi,%rsi,1)
mov    %al,(%rdi,%rdx,1)
ret

LLVM IR (-O0):
define void @swap(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i64, i64* %5
%10 = getelementptr inbounds i8, i8* %8, i64 %9
%11 = load i8, i8* %10
store i8 %11, i8* %7
%12 = load i8*, i8** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i8, i8* %12, i64 %13
%15 = load i8, i8* %14
%16 = load i8*, i8** %4
%17 = load i64, i64* %5
%18 = getelementptr inbounds i8, i8* %16, i64 %17
store i8 %15, i8* %18
%19 = load i8, i8* %7
%20 = load i8*, i8** %4
%21 = load i64, i64* %6
%22 = getelementptr inbounds i8, i8* %20, i64 %21
store i8 %19, i8* %22
ret void
}

LLVM IR (-O2):
define void @swap(i8* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i8, i8* %0, i64 %1
%5 = load i8, i8* %4
%6 = getelementptr inbounds i8, i8* %0, i64 %2
%7 = load i8, i8* %6
store i8 %7, i8* %4
store i8 %5, i8* %6
ret void
}
char aaa(char a) { return a + a * 2; }


x86 assembly (clang, -O0):
<aaa>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x1(%rbp),%ecx
shl    $0x1,%ecx
add    %ecx,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aaa>:
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define signext i8 @aaa(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = mul nsw i32 %6, 2
%8 = add nsw i32 %4, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @aaa(i8 signext %0) {
%2 = mul i8 %0, 3
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ prstatus_t;

/* Variables and functions */
size_t hvt_dumpcore_prstatus_size(void) { return sizeof(prstatus_t); }


x86 assembly (clang, -O0):
<hvt_dumpcore_prstatus_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hvt_dumpcore_prstatus_size>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @hvt_dumpcore_prstatus_size() {
ret i64 4
}

LLVM IR (-O2):
define i64 @hvt_dumpcore_prstatus_size() {
ret i64 4
}
float __VERIFIER_nondet_float() {
  float val;
  return val;
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_float>:
push   %rbp
mov    %rsp,%rbp
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_float>:
ret

LLVM IR (-O0):
define float @__VERIFIER_nondet_float() {
%1 = alloca float
%2 = load float, float* %1
ret float %2
}

LLVM IR (-O2):
define float @__VERIFIER_nondet_float() {
ret float undef
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmplt_ss(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_cmplt_ss(__m128 __a, __m128 __b) {
  return _mm_cmplt_ss(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmplt_ss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmplt_ss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmplt_ss>:
jmp    1030 <_mm_cmplt_ss@plt>

LLVM IR (-O0):
define i32 @test_mm_cmplt_ss(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmplt_ss(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmplt_ss(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmplt_ss(i32 %0, i32 %1)
ret i32 %3
}
int test_imm_D2uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xD2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D2uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xd2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D2uint64_highword_mem>:
testb  $0xd2,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D2uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 210
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D2uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 901943132160
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void QF_init(void) {}


x86 assembly (clang, -O0):
<QF_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QF_init>:
ret

LLVM IR (-O0):
define void @QF_init() {
ret void
}

LLVM IR (-O2):
define void @QF_init() {
ret void
}
int is_right(int key) { return key == 0x435b1b; }


x86 assembly (clang, -O0):
<is_right>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x435b1b,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_right>:
xor    %eax,%eax
cmp    $0x435b1b,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_right(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 4414235
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_right(i32 %0) {
%2 = icmp eq i32 %0, 4414235
%3 = zext i1 %2 to i32
ret i32 %3
}
unsigned short inw(unsigned short port) {
  unsigned short val;
  asm volatile("inw %1, %0" : "=a"(val) : "Nd"(port));
  return val;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
int execute_times() { return 0; }


x86 assembly (clang, -O0):
<execute_times>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_times>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_times() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_times() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __CrestInit();
void __globinit_tcas(void) {
  { __CrestInit(); }
}


x86 assembly (clang, -O0):
<__globinit_tcas>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__CrestInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__globinit_tcas>:
xor    %eax,%eax
jmp    1030 <__CrestInit@plt>

LLVM IR (-O0):
define void @__globinit_tcas() {
%1 = call i32 (...) @__CrestInit()
ret void
}

LLVM IR (-O2):
define void @__globinit_tcas() {
%1 = tail call i32 (...) @__CrestInit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, ...);
int set_nonblock(int iInput) {
  int current_state = fcntl(iInput, F_GETFL);
  return (fcntl(iInput, F_SETFL, current_state | O_NONBLOCK) >= 0) ? 0 : -1;
}


x86 assembly (clang, -O0):
<set_nonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    0x2ea1(%rip),%rax
or     (%rax),%edx
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    %eax,%edx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovge %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_nonblock>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
call   1030 <fcntl@plt>
mov    0x2eae(%rip),%rcx
mov    (%rcx),%esi
mov    0x2eb5(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%edx
xor    %eax,%eax
call   1030 <fcntl@plt>
sar    $0x1f,%eax
pop    %rbx
ret

LLVM IR (-O0):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @set_nonblock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_GETFL
%6 = call i32 (i32, i32, ...) @fcntl(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* @F_SETFL
%9 = load i32, i32* %3
%10 = load i32, i32* @O_NONBLOCK
%11 = or i32 %9, %10
%12 = call i32 (i32, i32, ...) @fcntl(i32 %7, i32 %8, i32 %11)
%13 = icmp sge i32 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 0, i32 -1
ret i32 %15
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @set_nonblock(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %2)
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %3
%7 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %4, i32 %6)
%8 = ashr i32 %7, 31
ret i32 %8
}
void INT_Excep_PERIA_INTA241(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIA_INTA241>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIA_INTA241>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIA_INTA241() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIA_INTA241() {
ret void
}
void USE(void *x) { __asm__ __volatile__("" : : "r"(x) : "memory"); }


x86 assembly (clang, -O0):
<USE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<USE>:
ret

LLVM IR (-O0):
define void @USE(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @USE(i8* %0) {
tail call void asm sideeffect "", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int lstat(char *, struct stat *);
int /*<<< orphan*/ print_envs();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ stat(char *, struct stat *);
int main() {
  print_envs();
  struct stat buf;
  stat("foo", &buf);
  int rc = lstat("foo", &buf);
  printf("stat \"foo\" = %d\n", rc);
  return rc;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <print_envs@plt>
lea    0xea3(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1060 <stat@plt>
lea    0xe93(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <lstat@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe81(%rip),%rdi
call   1040 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <print_envs@plt>
lea    0xeae(%rip),%rbx
mov    %rsp,%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1060 <stat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1050 <lstat@plt>
mov    %eax,%ebx
lea    0xe90(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@.str = [4 x i8] c"foo\00"
@.str.1 = [17 x i8] c"stat \22foo\22 = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.stat
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @print_envs()
%5 = call i32 @stat(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %struct.stat* %2)
%6 = call i32 @lstat(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %struct.stat* %2)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@.str = [4 x i8] c"foo\00"
@.str.1 = [17 x i8] c"stat \22foo\22 = %d\0A\00"
define i32 @main() {
%1 = alloca %struct.stat
%2 = tail call i32 (...) @print_envs()
%3 = bitcast %struct.stat* %1 to i8*
%4 = call i32 @stat(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %struct.stat* %1)
%5 = call i32 @lstat(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %struct.stat* %1)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 %5
}
__attribute__((no)) int order(int x, int y) { return x < y ? 2 : 4; }


x86 assembly (clang, -O0):
<order>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
mov    $0x4,%eax
mov    $0x2,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<order>:
xor    %eax,%eax
cmp    %esi,%edi
setge  %al
add    %eax,%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @order(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 2, i32 4
ret i32 %9
}

LLVM IR (-O2):
define i32 @order(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 2, i32 4
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(void *, char const *);
void set_string(void *base, int offset, const char *value) {
  strcpy(base + offset, value);
}


x86 assembly (clang, -O0):
<set_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_string>:
movslq %esi,%rax
add    %rax,%rdi
mov    %rdx,%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
define void @set_string(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr i8, i8* %7, i64 %9
%11 = load i8*, i8** %6
%12 = call i32 @strcpy(i8* %10, i8* %11)
ret void
}

LLVM IR (-O2):
define void @set_string(i8* %0, i32 %1, i8* %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr i8, i8* %0, i64 %4
%6 = tail call i32 @strcpy(i8* %5, i8* %2)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
char nibble_to_hexchar(uint8_t nibble) {
  if (nibble > 9) {
    return (char)('A' + (nibble - 10));
  } else {
    return (char)('0' + nibble);
  }
}


x86 assembly (clang, -O0):
<nibble_to_hexchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
jle    1122 <nibble_to_hexchar+0x22>
mov    -0x8(%rbp),%eax
sub    $0xa,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
jmp    112b <nibble_to_hexchar+0x2b>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nibble_to_hexchar>:
cmp    $0xa,%edi
mov    $0x37,%ecx
mov    $0x30,%eax
cmovge %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @nibble_to_hexchar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 9
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 10
%9 = add nsw i32 65, %8
%10 = trunc i32 %9 to i8
store i8 %10, i8* %2
br label %15
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add nsw i32 48, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %15
15: ; preds = %11, %6
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @nibble_to_hexchar(i32 %0) {
%2 = icmp sgt i32 %0, 9
%3 = trunc i32 %0 to i8
%4 = select i1 %2, i8 55, i8 48
%5 = add i8 %4, %3
ret i8 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_avg2_16(int, int /*<<< orphan*/ *,
                              int /*<<< orphan*/ const *, int, int, int);
void MC_avg_y_16_3dnow(uint8_t *dest, const uint8_t *ref, int stride,
                       int height) {
  MC_avg2_16(height, dest, ref, stride, stride, 1);
}


x86 assembly (clang, -O0):
<MC_avg_y_16_3dnow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    $0x1,%r9d
call   1030 <MC_avg2_16@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_avg_y_16_3dnow>:
mov    %edx,%r8d
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %ecx,%edi
mov    %r8d,%ecx
mov    $0x1,%r9d
jmp    1030 <MC_avg2_16@plt>

LLVM IR (-O0):
define void @MC_avg_y_16_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %7
%14 = call i32 @MC_avg2_16(i32 %9, i32* %10, i32* %11, i32 %12, i32 %13, i32 1)
ret void
}

LLVM IR (-O2):
define void @MC_avg_y_16_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_avg2_16(i32 %3, i32* %0, i32* %1, i32 %2, i32 %2, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int printfContext(int);
int printfContextS(int offset, const char *str) {
  if (1)
    return 1;
  int status;
  printf("\n$TITIL(%s)@[%d]{\n", str, offset);
  status = printfContext(offset);
  printf("}\n");
  return status;
}


x86 assembly (clang, -O0):
<printfContextS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<printfContextS>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @printfContextS(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @printfContextS(i32 %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
char *corta_string(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  char *s = "Campos verdes";
  do {
    s = corta_string(s);
  } while (*s != ' ');
  printf("%s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <corta_string@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    113a <main+0x1a>
mov    -0x10(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rax
nopl   0x0(%rax,%rax,1)
mov    %rax,%rdi
call   1040 <corta_string@plt>
cmpb   $0x20,(%rax)
jne    1130 <main+0x10>
lea    0xeca(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Campos verdes\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8** %2
br label %3
3: ; preds = %6, %0
%4 = load i8*, i8** %2
%5 = call i8* @corta_string(i8* %4)
store i8* %5, i8** %2
br label %6
6: ; preds = %3
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 32
br i1 %10, label %3, label %11
11: ; preds = %6
%12 = load i8*, i8** %2
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Campos verdes\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = phi i8* [ getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), %0 ], [ %3, %1 ]
%3 = tail call i8* @corta_string(i8* %2)
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
br i1 %5, label %6, label %1
6: ; preds = %1
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret i32 0
}
int set_anon_super(void) { return 42; }


x86 assembly (clang, -O0):
<set_anon_super>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_anon_super>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @set_anon_super() {
ret i32 42
}

LLVM IR (-O2):
define i32 @set_anon_super() {
ret i32 42
}
void psci_ddr_bandwidth_get(void *ddr_bw_ch0, void *ddr_bw_ch1) {}


x86 assembly (clang, -O0):
<psci_ddr_bandwidth_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<psci_ddr_bandwidth_get>:
ret

LLVM IR (-O0):
define void @psci_ddr_bandwidth_get(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @psci_ddr_bandwidth_get(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void f(void *p, ...) {}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @f(i8* nocapture %0, ...) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef int uint16_t;

/* Variables and functions */
int readmemb_common(scalar_t__);
uint16_t readmemw_common(uint32_t s, uint16_t a) {
  uint16_t ret;
  ret = readmemb_common(s + a);
  ret |= readmemb_common(s + ((a + 1) & 0xffff)) << 8;
  return ret;
}


x86 assembly (clang, -O0):
<readmemw_common>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
call   1030 <readmemb_common@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%eax
add    $0x1,%eax
and    $0xffff,%eax
cltq
add    %rax,%rdi
call   1030 <readmemb_common@plt>
shl    $0x8,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readmemw_common>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
movslq %esi,%rbp
add    %rbp,%rdi
call   1030 <readmemb_common@plt>
mov    %eax,%r14d
add    $0x1,%ebp
movzwl %bp,%edi
add    %rbx,%rdi
call   1030 <readmemb_common@plt>
shl    $0x8,%eax
or     %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @readmemw_common(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%6 = load i64, i64* %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = add nsw i64 %6, %8
%10 = call i32 @readmemb_common(i64 %9)
store i32 %10, i32* %5
%11 = load i64, i64* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
%14 = and i32 %13, 65535
%15 = sext i32 %14 to i64
%16 = add nsw i64 %11, %15
%17 = call i32 @readmemb_common(i64 %16)
%18 = shl i32 %17, 8
%19 = load i32, i32* %5
%20 = or i32 %19, %18
store i32 %20, i32* %5
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @readmemw_common(i64 %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = add nsw i64 %3, %0
%5 = tail call i32 @readmemb_common(i64 %4)
%6 = add nsw i32 %1, 1
%7 = and i32 %6, 65535
%8 = zext i32 %7 to i64
%9 = add nsw i64 %8, %0
%10 = tail call i32 @readmemb_common(i64 %9)
%11 = shl i32 %10, 8
%12 = or i32 %11, %5
ret i32 %12
}