xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
int /*<<< orphan*/ odroid_xu_pin_lookup(unsigned int, unsigned int *,
                                        unsigned int *);
unsigned int odroid_xu_gpio_read(unsigned int pin_index) {
  unsigned int bank_offset, bit_index;
  odroid_xu_pin_lookup(pin_index, &bank_offset, &bit_index);
  return (exynos_5410_gpio_read(bank_offset) >> bit_index) & 0x1;
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <odroid_xu_pin_lookup@plt>
mov    -0x8(%rbp),%edi
call   1040 <exynos_5410_gpio_read@plt>
mov    -0xc(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_read>:
push   %rax
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1030 <odroid_xu_pin_lookup@plt>
mov    0x4(%rsp),%edi
call   1040 <exynos_5410_gpio_read@plt>
mov    (%rsp),%cl
shr    %cl,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @odroid_xu_gpio_read(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @odroid_xu_pin_lookup(i32 %5, i32* %3, i32* %4)
%7 = load i32, i32* %3
%8 = call i32 @exynos_5410_gpio_read(i32 %7)
%9 = load i32, i32* %4
%10 = lshr i32 %8, %9
%11 = and i32 %10, 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @odroid_xu_gpio_read(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = call i32 @odroid_xu_pin_lookup(i32 %0, i32* %2, i32* %3)
%7 = load i32, i32* %2
%8 = call i32 @exynos_5410_gpio_read(i32 %7)
%9 = load i32, i32* %3
%10 = lshr i32 %8, %9
%11 = and i32 %10, 1
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void merge_sort(int a[], int p, int r) {
  int q;
  if (p < r) {
    q = (p + r) / 2;
    merge_sort(a, p, q);
    merge_sort(a, q + 1, r);
    merge(a, p, q, r);
  }
}


x86 assembly (clang, -O0):
<merge_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <merge_sort+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <merge_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <merge_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_sort>:
cmp    %edx,%esi
jge    1172 <merge_sort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1040 <merge_sort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1040 <merge_sort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <merge@plt>
ret

LLVM IR (-O0):
define void @merge_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @merge_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @merge_sort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @merge_sort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmple_pd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmple_pd(__m128d A, __m128d B) { return _mm_cmple_pd(A, B); }


x86 assembly (clang, -O0):
<test_mm_cmple_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmple_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmple_pd>:
jmp    1030 <_mm_cmple_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmple_pd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmple_pd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmple_pd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmple_pd(i32 %0, i32 %1)
ret i32 %3
}
const char *helloString() { return "Hello from Buck!"; }


x86 assembly (clang, -O0):
<helloString>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<helloString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Hello from Buck!\00"
define i8* @helloString() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [17 x i8] c"Hello from Buck!\00"
define i8* @helloString() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}
int test_imm_6Eint16_mem(short *val) {
  return ((*val) & (-0x6E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Eint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff92,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Eint16_mem>:
movzwl (%rdi),%eax
test   $0xff92,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Eint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -110
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Eint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -110
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
char *getPath2(int /*<<< orphan*/, char *);
int /*<<< orphan*/ getUserGameDataDir();
char *getUserMusicDir() {
  static char *usermusic_dir = NULL;
  if (usermusic_dir == NULL)
    usermusic_dir = getPath2(getUserGameDataDir(), "music");
  return usermusic_dir;
}


x86 assembly (clang, -O0):
<getUserMusicDir>:
push   %rbp
mov    %rsp,%rbp
cmpq   $0x0,0x2f0c(%rip)
jne    114e <getUserMusicDir+0x2e>
mov    $0x0,%al
call   1030 <getUserGameDataDir@plt>
mov    %eax,%edi
lea    0xebe(%rip),%rsi
call   1040 <getPath2@plt>
mov    %rax,0x2eea(%rip)
mov    0x2ee3(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getUserMusicDir>:
push   %rax
mov    0x2f10(%rip),%rax
test   %rax,%rax
je     112f <getUserMusicDir+0xf>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <getUserGameDataDir@plt>
lea    0xec3(%rip),%rsi
mov    %eax,%edi
call   1040 <getPath2@plt>
mov    %rax,0x2eed(%rip)
pop    %rcx
ret

LLVM IR (-O0):
@getUserMusicDir.usermusic_dir = internal global i8* null
@.str = [6 x i8] c"music\00"
define i8* @getUserMusicDir() {
%1 = load i8*, i8** @getUserMusicDir.usermusic_dir
%2 = icmp eq i8* %1, null
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i32 (...) @getUserGameDataDir()
%5 = call i8* @getPath2(i32 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i8* %5, i8** @getUserMusicDir.usermusic_dir
br label %6
6: ; preds = %3, %0
%7 = load i8*, i8** @getUserMusicDir.usermusic_dir
ret i8* %7
}

LLVM IR (-O2):
@getUserMusicDir.usermusic_dir = internal unnamed_addr global i8* null
@.str = [6 x i8] c"music\00"
define i8* @getUserMusicDir() {
%1 = load i8*, i8** @getUserMusicDir.usermusic_dir
%2 = icmp eq i8* %1, null
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 (...) @getUserGameDataDir()
%5 = tail call i8* @getPath2(i32 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i8* %5, i8** @getUserMusicDir.usermusic_dir
br label %6
6: ; preds = %3, %0
%7 = phi i8* [ %5, %3 ], [ %1, %0 ]
ret i8* %7
}
void J400ToARGBRow_Any_SSE2() {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @J400ToARGBRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @J400ToARGBRow_Any_SSE2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ alloc_failed(char const *, int);
int /*<<< orphan*/ assert(int);
void *malloc(long);
void *mem_alloc(long nbytes, const char *file, int line) {
  assert(nbytes > 0);
  void *ptr = malloc(nbytes);
  if (ptr == NULL) {
    alloc_failed(file, line);
  }
  return ptr;
}


x86 assembly (clang, -O0):
<mem_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x8(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1179 <mem_alloc+0x49>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1050 <alloc_failed@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_alloc>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
xor    %edi,%edi
test   %rbp,%rbp
setg   %dil
call   1030 <assert@plt>
mov    %rbp,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbp
test   %rax,%rax
jne    1166 <mem_alloc+0x36>
mov    %rbx,%rdi
mov    %r14d,%esi
call   1050 <alloc_failed@plt>
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @mem_alloc(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i64, i64* %4
%9 = icmp sgt i64 %8, 0
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i64, i64* %4
%13 = call i8* @malloc(i64 %12)
store i8* %13, i8** %7
%14 = load i8*, i8** %7
%15 = icmp eq i8* %14, null
br i1 %15, label %16, label %20
16: ; preds = %3
%17 = load i8*, i8** %5
%18 = load i32, i32* %6
%19 = call i32 @alloc_failed(i8* %17, i32 %18)
br label %20
20: ; preds = %16, %3
%21 = load i8*, i8** %7
ret i8* %21
}

LLVM IR (-O2):
define noalias i8* @mem_alloc(i64 %0, i8* %1, i32 %2) {
%4 = icmp sgt i64 %0, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i8* @malloc(i64 %0)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = tail call i32 @alloc_failed(i8* %1, i32 %2)
br label %11
11: ; preds = %9, %3
ret i8* %7
}
/* Variables and functions */
int count(int);
int test_multi_digit() {
  return 101 == count(123) && 284 == count(456) && 385 == count(578);
}


x86 assembly (clang, -O0):
<test_multi_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x7b,%edi
call   1030 <count@plt>
mov    %eax,%edx
xor    %eax,%eax
mov    $0x65,%ecx
cmp    %edx,%ecx
mov    %al,-0x1(%rbp)
jne    116d <test_multi_digit+0x5d>
mov    $0x1c8,%edi
call   1030 <count@plt>
mov    %eax,%edx
xor    %eax,%eax
mov    $0x11c,%ecx
cmp    %edx,%ecx
mov    %al,-0x1(%rbp)
jne    116d <test_multi_digit+0x5d>
mov    $0x242,%edi
call   1030 <count@plt>
mov    %eax,%ecx
mov    $0x181,%eax
cmp    %ecx,%eax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_multi_digit>:
push   %rbx
mov    $0x7b,%edi
call   1030 <count@plt>
xor    %ebx,%ebx
cmp    $0x65,%eax
jne    1147 <test_multi_digit+0x37>
mov    $0x1c8,%edi
call   1030 <count@plt>
cmp    $0x11c,%eax
jne    1147 <test_multi_digit+0x37>
mov    $0x242,%edi
call   1030 <count@plt>
xor    %ebx,%ebx
cmp    $0x181,%eax
sete   %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test_multi_digit() {
%1 = call i32 @count(i32 123)
%2 = icmp eq i32 101, %1
br i1 %2, label %3, label %9
3: ; preds = %0
%4 = call i32 @count(i32 456)
%5 = icmp eq i32 284, %4
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = call i32 @count(i32 578)
%8 = icmp eq i32 385, %7
br label %9
9: ; preds = %6, %3, %0
%10 = phi i1 [ false, %3 ], [ false, %0 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_multi_digit() {
%1 = tail call i32 @count(i32 123)
%2 = icmp eq i32 %1, 101
br i1 %2, label %3, label %10
3: ; preds = %0
%4 = tail call i32 @count(i32 456)
%5 = icmp eq i32 %4, 284
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = tail call i32 @count(i32 578)
%8 = icmp eq i32 %7, 385
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %3, %0
%11 = phi i32 [ 0, %3 ], [ 0, %0 ], [ %9, %6 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *);
int main(void) {
  double r;
  double pi = 3.14159;
  scanf("%lf", &r);
  printf("A=%.4lf\n", r * r * pi);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xec9(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
lea    0xec5(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee0(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm0
mulsd  %xmm0,%xmm0
mulsd  0xebf(%rip),%xmm0
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
store double 3.141590e+00, double* %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%5 = load double, double* %2
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = load double, double* %3
%9 = fmul double %7, %8
%10 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%4 = load double, double* %1
%5 = fmul double %4, %4
%6 = fmul double %5, 3.141590e+00
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %6)
ret i32 0
}
void drm_pci_free(struct drm_device *dev, struct drm_dma_handle *dmah) {}


x86 assembly (clang, -O0):
<drm_pci_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_pci_free>:
ret

LLVM IR (-O0):
%struct.drm_device = type opaque
%struct.drm_dma_handle = type opaque
define void @drm_pci_free(%struct.drm_device* %0, %struct.drm_dma_handle* %1) {
%3 = alloca %struct.drm_device*
%4 = alloca %struct.drm_dma_handle*
store %struct.drm_device* %0, %struct.drm_device** %3
store %struct.drm_dma_handle* %1, %struct.drm_dma_handle** %4
ret void
}

LLVM IR (-O2):
%struct.drm_device = type opaque
%struct.drm_dma_handle = type opaque
define void @drm_pci_free(%struct.drm_device* nocapture %0, %struct.drm_dma_handle* nocapture %1) {
ret void
}
int I_NoAppServicesInit(void) { return 1; }


x86 assembly (clang, -O0):
<I_NoAppServicesInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_NoAppServicesInit>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @I_NoAppServicesInit() {
ret i32 1
}

LLVM IR (-O2):
define i32 @I_NoAppServicesInit() {
ret i32 1
}
signed int signedint_ignoring_unsignedlong(signed int x, unsigned long y) {
  return x;
}


x86 assembly (clang, -O0):
<signedint_ignoring_unsignedlong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedint_ignoring_unsignedlong>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @signedint_ignoring_unsignedlong(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @signedint_ignoring_unsignedlong(i32 returned %0, i64 %1) {
ret i32 %0
}
/* Variables and functions */
scalar_t__ getuid();
int check_root() { return getuid() == 0; }


x86 assembly (clang, -O0):
<check_root>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getuid@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_root>:
push   %rax
xor    %eax,%eax
call   1030 <getuid@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @check_root() {
%1 = call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @check_root() {
%1 = tail call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
double M1_z(double, double, double, double);
double M3_x(double sign, double xi, double et, double qq) {
  return M1_z(sign, xi, et, qq);
}


x86 assembly (clang, -O0):
<M3_x>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
movsd  -0x20(%rbp),%xmm3
call   1030 <M1_z@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M3_x>:
jmp    1030 <M1_z@plt>

LLVM IR (-O0):
define double @M3_x(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = load double, double* %7
%12 = load double, double* %8
%13 = call double @M1_z(double %9, double %10, double %11, double %12)
ret double %13
}

LLVM IR (-O2):
define double @M3_x(double %0, double %1, double %2, double %3) {
%5 = tail call double @M1_z(double %0, double %1, double %2, double %3)
ret double %5
}
/* Variables and functions */
scalar_t__ ea_alterable(int);
int ea_mode(int);
int ea_alterable_na(int opcode) {
  return (ea_mode(opcode) != 1 && ea_alterable(opcode));
}


x86 assembly (clang, -O0):
<ea_alterable_na>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <ea_mode@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
mov    %al,-0x5(%rbp)
je     1155 <ea_alterable_na+0x35>
mov    -0x4(%rbp),%edi
call   1030 <ea_alterable@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ea_alterable_na>:
push   %rbx
mov    %edi,%ebx
call   1040 <ea_mode@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
je     1143 <ea_alterable_na+0x23>
mov    %ebx,%edi
call   1030 <ea_alterable@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ea_alterable_na(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ea_mode(i32 %3)
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @ea_alterable(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @ea_alterable_na(i32 %0) {
%2 = tail call i32 @ea_mode(i32 %0)
%3 = icmp eq i32 %2, 1
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @ea_alterable(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ zmem(int /*<<< orphan*/);
uint8_t read8low(uint16_t address) { return zmem(address); }


x86 assembly (clang, -O0):
<read8low>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <zmem@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read8low>:
jmp    1030 <zmem@plt>

LLVM IR (-O0):
define i32 @read8low(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @zmem(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @read8low(i32 %0) {
%2 = tail call i32 @zmem(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *malloc(size_t);
void *alloc_(size_t sz) {
  void *allocated_memory = malloc(sz);
  assert(allocated_memory != NULL);
  return allocated_memory;
}


x86 assembly (clang, -O0):
<alloc_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @alloc_(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @alloc_(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp ne i8* %2, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ s_vAppendByte(int /*<<< orphan*/);
void MIC_vAppend(unsigned char *src, unsigned int nBytes) {
  while (nBytes > 0) {
    s_vAppendByte(*src++);
    nBytes--;
  }
}


x86 assembly (clang, -O0):
<MIC_vAppend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jbe    114e <MIC_vAppend+0x3e>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%edi
call   1030 <s_vAppendByte@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <MIC_vAppend+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MIC_vAppend>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1143 <MIC_vAppend+0x33>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%r14,%rbx,1),%edi
call   1030 <s_vAppendByte@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <MIC_vAppend+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @MIC_vAppend(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %8, %2
%6 = load i32, i32* %4
%7 = icmp ugt i32 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
%11 = load i8, i8* %9
%12 = zext i8 %11 to i32
%13 = call i32 @s_vAppendByte(i32 %12)
%14 = load i32, i32* %4
%15 = add i32 %14, -1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @MIC_vAppend(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ %1, %2 ]
%6 = phi i8* [ %7, %4 ], [ %0, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = tail call i32 @s_vAppendByte(i32 %9)
%11 = add i32 %5, -1
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
int main() {
  int a, b, c;
  if (a = b) {
    b = 0;
    c = 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1128 <main+0x28>
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = load i32, i32* %3
store i32 %5, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 0, i32* %3
store i32 0, i32* %4
br label %8
8: ; preds = %7, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
struct CWX_PG_WRITER {
  int dummy;
};

/* Variables and functions */
int cwx_pg_writer_add_key(struct CWX_PG_WRITER *, char const *, char const *,
                          int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
int cwx_pg_writer_add_key_str(struct CWX_PG_WRITER *writer, char const *szKey,
                              char const *szData) {
  return cwx_pg_writer_add_key(writer, szKey, szData, strlen(szData), 0);
}


x86 assembly (clang, -O0):
<cwx_pg_writer_add_key_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    %eax,%ecx
xor    %r8d,%r8d
call   1040 <cwx_pg_writer_add_key@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cwx_pg_writer_add_key_str>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rdx,%rdi
call   1030 <strlen@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
mov    %eax,%ecx
xor    %r8d,%r8d
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <cwx_pg_writer_add_key@plt>

LLVM IR (-O0):
%struct.CWX_PG_WRITER = type { i32 }
define i32 @cwx_pg_writer_add_key_str(%struct.CWX_PG_WRITER* %0, i8* %1, i8* %2) {
%4 = alloca %struct.CWX_PG_WRITER*
%5 = alloca i8*
%6 = alloca i8*
store %struct.CWX_PG_WRITER* %0, %struct.CWX_PG_WRITER** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.CWX_PG_WRITER*, %struct.CWX_PG_WRITER** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = load i8*, i8** %6
%11 = call i32 @strlen(i8* %10)
%12 = call i32 @cwx_pg_writer_add_key(%struct.CWX_PG_WRITER* %7, i8* %8, i8* %9, i32 %11, i32 0)
ret i32 %12
}

LLVM IR (-O2):
%struct.CWX_PG_WRITER = type { i32 }
define i32 @cwx_pg_writer_add_key_str(%struct.CWX_PG_WRITER* %0, i8* %1, i8* %2) {
%4 = tail call i32 @strlen(i8* %2)
%5 = tail call i32 @cwx_pg_writer_add_key(%struct.CWX_PG_WRITER* %0, i8* %1, i8* %2, i32 %4, i32 0)
ret i32 %5
}
int t(int a, int b) {
  if (a > 0)
    goto L1;
  if (b > 0)
    goto L1;
  return 0;
L1:
  return 1;
}


x86 assembly (clang, -O0):
<t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1119 <t+0x19>
jmp    1134 <t+0x34>
cmpl   $0x0,-0xc(%rbp)
jle    1128 <t+0x28>
jmp    1134 <t+0x34>
movl   $0x0,-0x4(%rbp)
jmp    113b <t+0x3b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t>:
test   %edi,%edi
setg   %al
test   %esi,%esi
setg   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @t(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
br label %14
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
br label %14
13: ; preds = %9
store i32 0, i32* %3
br label %15
14: ; preds = %12, %8
store i32 1, i32* %3
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @t(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
%4 = icmp sgt i32 %1, 0
%5 = or i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int linear_search_iter(int *arr, int n, int value) {
  for (int i = 0; i < n; i++) {
    if (arr[i] == value) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<linear_search_iter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <linear_search_iter+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <linear_search_iter+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <linear_search_iter+0x5a>
jmp    1145 <linear_search_iter+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <linear_search_iter+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linear_search_iter>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <linear_search_iter+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edx,(%rdi,%rcx,4)
je     111f <linear_search_iter+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <linear_search_iter+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @linear_search_iter(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @linear_search_iter(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ Show_library(int /*<<< orphan*/);
int /*<<< orphan*/ triList(int);
void IF_show_liball(void) { Show_library(triList(0xFF)); }


x86 assembly (clang, -O0):
<IF_show_liball>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%edi
call   1040 <triList@plt>
mov    %eax,%edi
call   1030 <Show_library@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_show_liball>:
push   %rax
mov    $0xff,%edi
call   1040 <triList@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <Show_library@plt>

LLVM IR (-O0):
define void @IF_show_liball() {
%1 = call i32 @triList(i32 255)
%2 = call i32 @Show_library(i32 %1)
ret void
}

LLVM IR (-O2):
define void @IF_show_liball() {
%1 = tail call i32 @triList(i32 255)
%2 = tail call i32 @Show_library(i32 %1)
ret void
}
void i2d_X509_REVOKED(void) {}


x86 assembly (clang, -O0):
<i2d_X509_REVOKED>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_X509_REVOKED>:
ret

LLVM IR (-O0):
define void @i2d_X509_REVOKED() {
ret void
}

LLVM IR (-O2):
define void @i2d_X509_REVOKED() {
ret void
}
void av_bprint_strftime() {}


x86 assembly (clang, -O0):
<av_bprint_strftime>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_bprint_strftime>:
ret

LLVM IR (-O0):
define void @av_bprint_strftime() {
ret void
}

LLVM IR (-O2):
define void @av_bprint_strftime() {
ret void
}
/* Type definitions */
struct block_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bdev_get_queue(struct block_device *);
int queue_physical_block_size(int /*<<< orphan*/);
__attribute__((always_)) int
bdev_physical_block_size(struct block_device *bdev) {
  return queue_physical_block_size(bdev_get_queue(bdev));
}


x86 assembly (clang, -O0):
<bdev_physical_block_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <bdev_get_queue@plt>
mov    %eax,%edi
call   1030 <queue_physical_block_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bdev_physical_block_size>:
push   %rax
call   1040 <bdev_get_queue@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <queue_physical_block_size@plt>

LLVM IR (-O0):
%struct.block_device = type { i32 }
define i32 @bdev_physical_block_size(%struct.block_device* %0) {
%2 = alloca %struct.block_device*
store %struct.block_device* %0, %struct.block_device** %2
%3 = load %struct.block_device*, %struct.block_device** %2
%4 = call i32 @bdev_get_queue(%struct.block_device* %3)
%5 = call i32 @queue_physical_block_size(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.block_device = type { i32 }
define i32 @bdev_physical_block_size(%struct.block_device* %0) {
%2 = tail call i32 @bdev_get_queue(%struct.block_device* %0)
%3 = tail call i32 @queue_physical_block_size(i32 %2)
ret i32 %3
}
/* Variables and functions */
int read_t(char *, int /*<<< orphan*/);
int check_ack(void) {
  char ack;
  int n;
  n = read_t(&ack, 0);
  if (n == 1 && ack == 0x79)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<check_ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x5(%rbp),%rdi
xor    %esi,%esi
call   1030 <read_t@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1149 <check_ack+0x39>
movsbl -0x5(%rbp),%eax
cmp    $0x79,%eax
jne    1149 <check_ack+0x39>
movl   $0x1,-0x4(%rbp)
jmp    1150 <check_ack+0x40>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_ack>:
push   %rax
lea    0x7(%rsp),%rdi
xor    %esi,%esi
call   1030 <read_t@plt>
cmp    $0x1,%eax
sete   %al
cmpb   $0x79,0x7(%rsp)
sete   %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @check_ack() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i32
%4 = call i32 @read_t(i8* %2, i32 0)
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %0
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 121
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %1
br label %13
12: ; preds = %7, %0
store i32 0, i32* %1
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @check_ack() {
%1 = alloca i8
%2 = call i32 @read_t(i8* %1, i32 0)
%3 = icmp eq i32 %2, 1
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 121
%6 = select i1 %3, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
int annee_est_bissextile(int annee) {
  return ((annee % 400) == 0 ? 1 : ((annee % 100) == 0 ? 0 : (annee % 4) == 0));
}


x86 assembly (clang, -O0):
<annee_est_bissextile>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1128 <annee_est_bissextile+0x28>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1165 <annee_est_bissextile+0x65>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1146 <annee_est_bissextile+0x46>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    115f <annee_est_bissextile+0x5f>
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<annee_est_bissextile>:
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
mov    %eax,%ecx
ror    $0x4,%ecx
cmp    $0xa3d70b,%ecx
jb     112c <annee_est_bissextile+0x2c>
ror    $0x2,%eax
cmp    $0x28f5c29,%eax
jb     1132 <annee_est_bissextile+0x32>
xor    %eax,%eax
test   $0x3,%dil
sete   %al
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @annee_est_bissextile(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 400
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %19
7: ; preds = %1
%8 = load i32, i32* %2
%9 = srem i32 %8, 100
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
br label %17
12: ; preds = %7
%13 = load i32, i32* %2
%14 = srem i32 %13, 4
%15 = icmp eq i32 %14, 0
%16 = zext i1 %15 to i32
br label %17
17: ; preds = %12, %11
%18 = phi i32 [ 0, %11 ], [ %16, %12 ]
br label %19
19: ; preds = %17, %6
%20 = phi i32 [ 1, %6 ], [ %18, %17 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @annee_est_bissextile(i32 %0) {
%2 = srem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = and i32 %0, 3
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %1 ], [ %10, %7 ], [ 0, %4 ]
ret i32 %12
}
long double longdouble_ignoring_unsignedint(long double x, unsigned int y) {
  return x;
}


x86 assembly (clang, -O0):
<longdouble_ignoring_unsignedint>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %edi,-0x14(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<longdouble_ignoring_unsignedint>:
fldt   0x8(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @longdouble_ignoring_unsignedint(x86_fp80 %0, i32 %1) {
%3 = alloca x86_fp80
%4 = alloca i32
store x86_fp80 %0, x86_fp80* %3
store i32 %1, i32* %4
%5 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @longdouble_ignoring_unsignedint(x86_fp80 returned %0, i32 %1) {
ret x86_fp80 %0
}
void dbg_msg_l(unsigned int level, const char *fmt, ...) {}


x86 assembly (clang, -O0):
<dbg_msg_l>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_msg_l>:
ret

LLVM IR (-O0):
define void @dbg_msg_l(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @dbg_msg_l(i32 %0, i8* nocapture %1, ...) {
ret void
}
int test_imm_EEuint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xEE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EEuint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xee,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EEuint64_midword_mem>:
testb  $0xee,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EEuint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 238
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_EEuint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 15597568
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void glutShowOverlay(void) {}


x86 assembly (clang, -O0):
<glutShowOverlay>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutShowOverlay>:
ret

LLVM IR (-O0):
define void @glutShowOverlay() {
ret void
}

LLVM IR (-O2):
define void @glutShowOverlay() {
ret void
}
/* Variables and functions */
scalar_t__ _U_Qfcmp(long double, long double, int);
int _U_Qfcomp(long double a, long double b) {
  if (_U_Qfcmp(a, b, 4) == 0)
    return 0;
  return (_U_Qfcmp(a, b, 2 | 4 | 16) != 0 ? 1 : -1);
}


x86 assembly (clang, -O0):
<_U_Qfcomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fstpt  -0x30(%rbp)
fldt   -0x20(%rbp)
fldt   -0x30(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
mov    $0x4,%edi
call   1030 <_U_Qfcmp@plt>
cmp    $0x0,%rax
jne    1152 <_U_Qfcomp+0x42>
movl   $0x0,-0x4(%rbp)
jmp    1181 <_U_Qfcomp+0x71>
fldt   -0x20(%rbp)
fldt   -0x30(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
mov    $0x16,%edi
call   1030 <_U_Qfcmp@plt>
mov    %rax,%rdx
mov    $0xffffffff,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_U_Qfcomp>:
sub    $0x38,%rsp
fldt   0x50(%rsp)
fldt   0x40(%rsp)
fld    %st(1)
fstpt  0x20(%rsp)
fxch   %st(1)
fstpt  0x10(%rsp)
fld    %st(0)
fstpt  0x2c(%rsp)
fstpt  (%rsp)
mov    $0x4,%edi
call   1030 <_U_Qfcmp@plt>
test   %rax,%rax
je     1167 <_U_Qfcomp+0x57>
fldt   0x20(%rsp)
fstpt  0x10(%rsp)
fldt   0x2c(%rsp)
fstpt  (%rsp)
mov    $0x16,%edi
call   1030 <_U_Qfcmp@plt>
cmp    $0x1,%rax
sbb    %eax,%eax
or     $0x1,%eax
add    $0x38,%rsp
ret
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
define i32 @_U_Qfcomp(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca i32
%4 = alloca x86_fp80
%5 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %4
store x86_fp80 %1, x86_fp80* %5
%6 = load x86_fp80, x86_fp80* %4
%7 = load x86_fp80, x86_fp80* %5
%8 = call i64 @_U_Qfcmp(x86_fp80 %6, x86_fp80 %7, i32 4)
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %18
11: ; preds = %2
%12 = load x86_fp80, x86_fp80* %4
%13 = load x86_fp80, x86_fp80* %5
%14 = call i64 @_U_Qfcmp(x86_fp80 %12, x86_fp80 %13, i32 22)
%15 = icmp ne i64 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 1, i32 -1
store i32 %17, i32* %3
br label %18
18: ; preds = %11, %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @_U_Qfcomp(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @_U_Qfcmp(x86_fp80 %0, x86_fp80 %1, i32 4)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i64 @_U_Qfcmp(x86_fp80 %0, x86_fp80 %1, i32 22)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, i32 -1, i32 1
br label %9
9: ; preds = %2, %5
%10 = phi i32 [ %8, %5 ], [ 0, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ outer(int);
int main() {
  outer(4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <outer@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <outer@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @outer(i32 4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @outer(i32 4)
ret i32 0
}
void foo693(int p) {}


x86 assembly (clang, -O0):
<foo693>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo693>:
ret

LLVM IR (-O0):
define void @foo693(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo693(i32 %0) {
ret void
}
/* Variables and functions */
int *do_an_allocation();
int /*<<< orphan*/ free(int *);
int main(int argc, char *argv[]) {
  int *ptr = do_an_allocation();
  free(ptr);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <do_an_allocation@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <do_an_allocation@plt>
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32* (...) @do_an_allocation()
store i32* %7, i32** %6
%8 = load i32*, i32** %6
%9 = call i32 @free(i32* %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* (...) @do_an_allocation()
%4 = tail call i32 @free(i32* %3)
ret i32 0
}
/* Variables and functions */
int __isinf(double);
int(isinf)(double a1) { return __isinf(a1); }


x86 assembly (clang, -O0):
<isinf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__isinf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isinf>:
jmp    1030 <__isinf@plt>

LLVM IR (-O0):
define i32 @isinf(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @__isinf(double %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isinf(double %0) {
%2 = tail call i32 @__isinf(double %0)
ret i32 %2
}
int a_ctz_l(unsigned long x) {
  if (x == 0)
    return 32;
  int nTrailingZeros = 0;
  while (!(x & 1)) {
    ++nTrailingZeros;
    x >>= 1;
  }
  return nTrailingZeros;
}


x86 assembly (clang, -O0):
<a_ctz_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <a_ctz_l+0x1f>
movl   $0x20,-0x4(%rbp)
jmp    1164 <a_ctz_l+0x64>
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1144 <a_ctz_l+0x44>
jmp    115e <a_ctz_l+0x5e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1126 <a_ctz_l+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_ctz_l>:
test   %rdi,%rdi
je     1130 <a_ctz_l+0x30>
xor    %eax,%eax
test   $0x1,%dil
jne    112f <a_ctz_l+0x2f>
xor    %eax,%eax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    $0x1,%eax
shr    %rcx
test   $0x2,%dil
mov    %rcx,%rdi
je     1120 <a_ctz_l+0x20>
ret
mov    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @a_ctz_l(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 32, i32* %2
br label %21
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %14, %8
%10 = load i64, i64* %3
%11 = and i64 %10, 1
%12 = icmp ne i64 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %19
14: ; preds = %9
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
%17 = load i64, i64* %3
%18 = lshr i64 %17, 1
store i64 %18, i64* %3
br label %9
19: ; preds = %9
%20 = load i32, i32* %4
store i32 %20, i32* %2
br label %21
21: ; preds = %19, %7
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @a_ctz_l(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = and i64 %0, 1
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %3, %6
%7 = phi i32 [ %9, %6 ], [ 0, %3 ]
%8 = phi i64 [ %10, %6 ], [ %0, %3 ]
%9 = add nuw nsw i32 %7, 1
%10 = lshr i64 %8, 1
%11 = and i64 %8, 2
%12 = icmp eq i64 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %6, %3, %1
%14 = phi i32 [ 32, %1 ], [ 0, %3 ], [ %9, %6 ]
ret i32 %14
}