xunge/DecIR huggingface dataset:
int is_rawdelimiter(char blah) {
  return (blah == ':' || blah == ',' || blah == '(' || blah == ')');
}


x86 assembly (clang, -O0):
<is_rawdelimiter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x3a,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_rawdelimiter+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2c,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_rawdelimiter+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x28,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_rawdelimiter+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x29,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_rawdelimiter>:
cmp    $0x3a,%dil
ja     1120 <is_rawdelimiter+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x400110000000000,%rdx
bt     %rcx,%rdx
jae    1120 <is_rawdelimiter+0x20>
ret
xor    %eax,%eax
cmp    $0x29,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_rawdelimiter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 58
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 44
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 40
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 41
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_rawdelimiter(i8 signext %0) {
switch i8 %0, label %2 [
i8 58, label %5
i8 44, label %5
i8 40, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 41
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void exit_error(void) { exit(EXIT_FAILURE); }


x86 assembly (clang, -O0):
<exit_error>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<exit_error>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @exit_error() {
%1 = load i32, i32* @EXIT_FAILURE
%2 = call i32 @exit(i32 %1)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @exit_error() {
%1 = load i32, i32* @EXIT_FAILURE
%2 = tail call i32 @exit(i32 %1)
unreachable
}
void msg_setseq(char *msg, int n) { msg[5] = n + '0'; }


x86 assembly (clang, -O0):
<msg_setseq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x30,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x5(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_setseq>:
add    $0x30,%sil
mov    %sil,0x5(%rdi)
ret

LLVM IR (-O0):
define void @msg_setseq(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add nsw i32 %5, 48
%7 = trunc i32 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 5
store i8 %7, i8* %9
ret void
}

LLVM IR (-O2):
define void @msg_setseq(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
%4 = add i8 %3, 48
%5 = getelementptr inbounds i8, i8* %0, i64 5
store i8 %4, i8* %5
ret void
}
int fun827() { return 827; }


x86 assembly (clang, -O0):
<fun827>:
push   %rbp
mov    %rsp,%rbp
mov    $0x33b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun827>:
mov    $0x33b,%eax
ret

LLVM IR (-O0):
define i32 @fun827() {
ret i32 827
}

LLVM IR (-O2):
define i32 @fun827() {
ret i32 827
}
/* Variables and functions */
int /*<<< orphan*/ p(int *);
main() {
  int z;
  p(&z);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <p@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <p@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = call i32 @p(i32* %1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @p(i32* %1)
ret i32 0
}
int test_imm_3Bint16_reg(short val) {
  return ((val) & (0x3B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Bint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x3b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Bint16_reg>:
test   $0x3b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Bint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 59
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Bint16_reg(i16 signext %0) {
%2 = and i16 %0, 59
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long);
int /*<<< orphan*/ pthread_exit(void *);
scalar_t__ pthread_self();
void *thr_fn2(void *arg) {
  printf("thread 2: ID is %lu\n", (unsigned long)pthread_self());
  pthread_exit((void *)0);
}


x86 assembly (clang, -O0):
<thr_fn2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <pthread_self@plt>
mov    %rax,%rsi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_fn2>:
push   %rax
xor    %eax,%eax
call   1050 <pthread_self@plt>
lea    0xec1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"thread 2: ID is %lu\0A\00"
define i8* @thr_fn2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i64 (...) @pthread_self()
%5 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i64 %4)
%6 = call i32 @pthread_exit(i8* null)
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
@.str = [21 x i8] c"thread 2: ID is %lu\0A\00"
define noalias i8* @thr_fn2(i8* nocapture readnone %0) {
%2 = tail call i64 (...) @pthread_self()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i64 %2)
%4 = tail call i32 @pthread_exit(i8* null)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ cpuid(int *, int);
int has_sse41(void) {
  int info[4];
  cpuid(info, 0x00000001);
  return ((info[2] & ((int)1 << 19)) != 0);
}


x86 assembly (clang, -O0):
<has_sse41>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1030 <cpuid@plt>
mov    -0x8(%rbp),%eax
and    $0x80000,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_sse41>:
sub    $0x18,%rsp
mov    %rsp,%rdi
mov    $0x1,%esi
call   1030 <cpuid@plt>
mov    0x8(%rsp),%eax
shr    $0x13,%eax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @has_sse41() {
%1 = alloca [4 x i32]
%2 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%3 = call i32 @cpuid(i32* %2, i32 1)
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 2
%5 = load i32, i32* %4
%6 = and i32 %5, 524288
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @has_sse41() {
%1 = alloca [4 x i32]
%2 = bitcast [4 x i32]* %1 to i8*
%3 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%4 = call i32 @cpuid(i32* %3, i32 1)
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 2
%6 = load i32, i32* %5
%7 = lshr i32 %6, 19
%8 = and i32 %7, 1
ret i32 %8
}
int test_imm_A7int64_lowword_reg(long long val) {
  return ((val) & (0xA7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A7int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xa7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A7int64_lowword_reg>:
test   $0xa7,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A7int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 167
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_A7int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 167
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_B7uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xB7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B7uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xb7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B7uint64_highword_reg>:
movabs $0xb700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B7uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 183
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B7uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 785979015168
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int start_process() {
  int flag = 1;
  while (flag) {
    printf("1. Display\n2. Insert new");
  }
}


x86 assembly (clang, -O0):
<start_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     113a <start_process+0x2a>
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
jmp    111f <start_process+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_process>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <printf@plt>
jmp    1120 <start_process+0x10>

LLVM IR (-O0):
@.str = [25 x i8] c"1. Display\0A2. Insert new\00"
define i32 @start_process() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %3
8: ; preds = %3
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [25 x i8] c"1. Display\0A2. Insert new\00"
define i32 @start_process() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %1
}
int nvSign(int n) {
  if (n > 0)
    return 1;
  if (n < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<nvSign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    111d <nvSign+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    113a <nvSign+0x3a>
cmpl   $0x0,-0x8(%rbp)
jge    1133 <nvSign+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    113a <nvSign+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvSign>:
mov    %edi,%ecx
sar    $0x1f,%ecx
test   %edi,%edi
mov    $0x1,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @nvSign(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @nvSign(i32 %0) {
%2 = ashr i32 %0, 31
%3 = icmp slt i32 %0, 1
%4 = select i1 %3, i32 %2, i32 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void PendSV_Handler() { default_handler(); }


x86 assembly (clang, -O0):
<PendSV_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PendSV_Handler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @PendSV_Handler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @PendSV_Handler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
void DoWriteEnd(void) {}


x86 assembly (clang, -O0):
<DoWriteEnd>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoWriteEnd>:
ret

LLVM IR (-O0):
define void @DoWriteEnd() {
ret void
}

LLVM IR (-O2):
define void @DoWriteEnd() {
ret void
}
unsigned int minor_n(const unsigned long major, const unsigned long start,
                     const unsigned long incr, const unsigned long n) {
  return major + (n * incr - start);
}


x86 assembly (clang, -O0):
<minor_n>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
imul   -0x18(%rbp),%rcx
sub    -0x10(%rbp),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minor_n>:
imul   %edx,%ecx
sub    %esi,%edi
lea    (%rdi,%rcx,1),%eax
ret

LLVM IR (-O0):
define i32 @minor_n(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %8
%11 = load i64, i64* %7
%12 = mul i64 %10, %11
%13 = load i64, i64* %6
%14 = sub i64 %12, %13
%15 = add i64 %9, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @minor_n(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = mul i64 %3, %2
%6 = sub i64 %0, %1
%7 = add i64 %6, %5
%8 = trunc i64 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void StringFree(char *addr) { free(*(char **)addr); }


x86 assembly (clang, -O0):
<StringFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StringFree>:
mov    (%rdi),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @StringFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i8**
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @StringFree(i8* nocapture %0) {
%2 = bitcast i8* %0 to i8**
%3 = load i8*, i8** %2
%4 = tail call i32 @free(i8* %3)
ret void
}
/* Variables and functions */
int get_line(char *, int);
int /*<<< orphan*/ printf(char *, char *);
int main() {
  int len;
  int max;
  char line[1000];
  max = 0;
  while ((len = get_line(line, 1000)) > 0)
    if (len > 80)
      printf("%s", line);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x400,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
lea    -0x400(%rbp),%rdi
mov    $0x3e8,%esi
call   1030 <get_line@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    1178 <main+0x58>
cmpl   $0x50,-0x8(%rbp)
jle    1173 <main+0x53>
lea    -0x400(%rbp),%rsi
lea    0xe92(%rip),%rdi
call   1040 <printf@plt>
jmp    1139 <main+0x19>
xor    %eax,%eax
add    $0x400,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x3e8,%rsp
mov    %rsp,%rdi
mov    $0x3e8,%esi
call   1030 <get_line@plt>
test   %eax,%eax
jle    1173 <main+0x53>
lea    0xebe(%rip),%r14
mov    %rsp,%rbx
jmp    1161 <main+0x41>
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    $0x3e8,%esi
call   1030 <get_line@plt>
test   %eax,%eax
jle    1173 <main+0x53>
cmp    $0x51,%eax
jb     1150 <main+0x30>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
jmp    1150 <main+0x30>
xor    %eax,%eax
add    $0x3e8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [1000 x i8]
store i32 0, i32* %1
store i32 0, i32* %3
br label %5
5: ; preds = %15, %0
%6 = getelementptr inbounds [1000 x i8], [1000 x i8]* %4, i64 0, i64 0
%7 = call i32 @get_line(i8* %6, i32 1000)
store i32 %7, i32* %2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32, i32* %2
%11 = icmp sgt i32 %10, 80
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = getelementptr inbounds [1000 x i8], [1000 x i8]* %4, i64 0, i64 0
%14 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %13)
br label %15
15: ; preds = %12, %9
br label %5
16: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [1000 x i8]
%2 = getelementptr inbounds [1000 x i8], [1000 x i8]* %1, i64 0, i64 0
%3 = call i32 @get_line(i8* %2, i32 1000)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %13
5: ; preds = %0, %10
%6 = phi i32 [ %11, %10 ], [ %3, %0 ]
%7 = icmp ugt i32 %6, 80
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
br label %10
10: ; preds = %8, %5
%11 = call i32 @get_line(i8* %2, i32 1000)
%12 = icmp sgt i32 %11, 0
br i1 %12, label %5, label %13
13: ; preds = %10, %0
ret i32 0
}
int led_gpio_bicolor_register(struct gpio_bicolor_led *led) { return -38; }


x86 assembly (clang, -O0):
<led_gpio_bicolor_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_gpio_bicolor_register>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.gpio_bicolor_led = type opaque
define i32 @led_gpio_bicolor_register(%struct.gpio_bicolor_led* %0) {
%2 = alloca %struct.gpio_bicolor_led*
store %struct.gpio_bicolor_led* %0, %struct.gpio_bicolor_led** %2
ret i32 -38
}

LLVM IR (-O2):
%struct.gpio_bicolor_led = type opaque
define i32 @led_gpio_bicolor_register(%struct.gpio_bicolor_led* nocapture readnone %0) {
ret i32 -38
}
int find_subsys(const char *pd_path, const char *subsys) { return 0; }


x86 assembly (clang, -O0):
<find_subsys>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_subsys>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @find_subsys(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @find_subsys(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LDY_();
int /*<<< orphan*/ c64_memZeroX();
void LDY_zpx(void) {
  c64_memZeroX();
  LDY_();
}


x86 assembly (clang, -O0):
<LDY_zpx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <c64_memZeroX@plt>
mov    $0x0,%al
call   1030 <LDY_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LDY_zpx>:
push   %rax
xor    %eax,%eax
call   1040 <c64_memZeroX@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <LDY_@plt>

LLVM IR (-O0):
define void @LDY_zpx() {
%1 = call i32 (...) @c64_memZeroX()
%2 = call i32 (...) @LDY_()
ret void
}

LLVM IR (-O2):
define void @LDY_zpx() {
%1 = tail call i32 (...) @c64_memZeroX()
%2 = tail call i32 (...) @LDY_()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
scalar_t__ write(int /*<<< orphan*/, char *, int);
void term_state_restore() {
  (void)(write(STDOUT_FILENO, "\x1b[?1049l", 8) + 1);
}


x86 assembly (clang, -O0):
<term_state_restore>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
mov    $0x8,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_state_restore>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
mov    $0x8,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [9 x i8] c"\1B[?1049l\00"
define void @term_state_restore() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = call i64 @write(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 8)
%3 = add nsw i64 %2, 1
ret void
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@.str = [9 x i8] c"\1B[?1049l\00"
define void @term_state_restore() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = tail call i64 @write(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 8)
ret void
}
/* Variables and functions */
int isspace(char);
bool isNotWhiteSpace(char ch) {
  bool value = isspace(ch);
  return !value;
}


x86 assembly (clang, -O0):
<isNotWhiteSpace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isspace@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNotWhiteSpace>:
push   %rax
call   1030 <isspace@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isNotWhiteSpace(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = call i32 @isspace(i8 signext %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @isNotWhiteSpace(i8 signext %0) {
%2 = tail call i32 @isspace(i8 signext %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ PWM2_1_DriverIRQHandler();
__attribute__((weak)) void PWM2_1_IRQHandler(void) {
  PWM2_1_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PWM2_1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PWM2_1_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM2_1_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PWM2_1_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PWM2_1_IRQHandler() {
%1 = call i32 (...) @PWM2_1_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PWM2_1_IRQHandler() {
%1 = tail call i32 (...) @PWM2_1_DriverIRQHandler()
ret void
}
/* Type definitions */
struct rtnl_nexthop {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rtnl_route_nh_free(struct rtnl_nexthop *);
void _nl_auto_rtnl_nexthop_fcn(struct rtnl_nexthop **v) {
  if (*v)
    rtnl_route_nh_free(*v);
}


x86 assembly (clang, -O0):
<_nl_auto_rtnl_nexthop_fcn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1136 <_nl_auto_rtnl_nexthop_fcn+0x26>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <rtnl_route_nh_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nl_auto_rtnl_nexthop_fcn>:
mov    (%rdi),%rdi
test   %rdi,%rdi
je     111d <_nl_auto_rtnl_nexthop_fcn+0xd>
jmp    1030 <rtnl_route_nh_free@plt>
ret

LLVM IR (-O0):
%struct.rtnl_nexthop = type { i32 }
define void @_nl_auto_rtnl_nexthop_fcn(%struct.rtnl_nexthop** %0) {
%2 = alloca %struct.rtnl_nexthop**
store %struct.rtnl_nexthop** %0, %struct.rtnl_nexthop*** %2
%3 = load %struct.rtnl_nexthop**, %struct.rtnl_nexthop*** %2
%4 = load %struct.rtnl_nexthop*, %struct.rtnl_nexthop** %3
%5 = icmp ne %struct.rtnl_nexthop* %4, null
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load %struct.rtnl_nexthop**, %struct.rtnl_nexthop*** %2
%8 = load %struct.rtnl_nexthop*, %struct.rtnl_nexthop** %7
%9 = call i32 @rtnl_route_nh_free(%struct.rtnl_nexthop* %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.rtnl_nexthop = type { i32 }
define void @_nl_auto_rtnl_nexthop_fcn(%struct.rtnl_nexthop** nocapture %0) {
%2 = load %struct.rtnl_nexthop*, %struct.rtnl_nexthop** %0
%3 = icmp eq %struct.rtnl_nexthop* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @rtnl_route_nh_free(%struct.rtnl_nexthop* %2)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int perBaseWigFree();
int main() { return perBaseWigFree(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <perBaseWigFree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <perBaseWigFree@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @perBaseWigFree()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @perBaseWigFree()
ret i32 %1
}
/* Variables and functions */
int omp_get_thread_num();
int /*<<< orphan*/ omp_set_num_threads(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  omp_set_num_threads(4);
#pragma omp parallel
  {
    int ID = omp_get_thread_num();
    printf("hello(%d)", ID);
    printf("world(%d)\n", ID);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1050 <omp_set_num_threads@plt>
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
mov    -0x4(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1050 <omp_set_num_threads@plt>
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
mov    %eax,%ebx
lea    0xeb5(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
lea    0xeb1(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"hello(%d)\00"
@.str.1 = [11 x i8] c"world(%d)\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 @omp_set_num_threads(i32 4)
%3 = call i32 (...) @omp_get_thread_num()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"hello(%d)\00"
@.str.1 = [11 x i8] c"world(%d)\0A\00"
define i32 @main() {
%1 = tail call i32 @omp_set_num_threads(i32 4)
%2 = tail call i32 (...) @omp_get_thread_num()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ stderr;
void error(const char *msg) {
  fprintf(stderr, "ERROR, %s\n", msg);
  perror("");
  exit(-1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xeb0(%rip),%rsi
call   1030 <fprintf@plt>
lea    0xeae(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
mov    %rdi,%rdx
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
lea    0xebc(%rip),%rsi
call   1030 <fprintf@plt>
lea    0xeba(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"ERROR, %s\0A\00"
@.str.1 = [1 x i8] zeroinitializer
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @perror(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"ERROR, %s\0A\00"
@.str.1 = [1 x i8] zeroinitializer
define void @error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @perror(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int stress_cache_set_flag(int);
int stress_cache_set_prefetch(const char *opt) {
  (void)opt;
  return stress_cache_set_flag((0x01));
}


x86 assembly (clang, -O0):
<stress_cache_set_prefetch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <stress_cache_set_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_cache_set_prefetch>:
mov    $0x1,%edi
jmp    1030 <stress_cache_set_flag@plt>

LLVM IR (-O0):
define i32 @stress_cache_set_prefetch(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @stress_cache_set_flag(i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @stress_cache_set_prefetch(i8* nocapture readnone %0) {
%2 = tail call i32 @stress_cache_set_flag(i32 1)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct ts_sdt {
  int dummy;
};

/* Variables and functions */
struct ts_sdt *ts_sdt_alloc();
struct ts_sdt *ts_sdt_init(struct ts_sdt *, int /*<<< orphan*/,
                           int /*<<< orphan*/);
struct ts_sdt *ts_sdt_alloc_init(uint16_t org_network_id,
                                 uint16_t transport_stream_id) {
  struct ts_sdt *sdt = ts_sdt_alloc();
  if (!sdt)
    return NULL;
  return ts_sdt_init(sdt, org_network_id, transport_stream_id);
}


x86 assembly (clang, -O0):
<ts_sdt_alloc_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <ts_sdt_alloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1151 <ts_sdt_alloc_init+0x31>
movq   $0x0,-0x8(%rbp)
jmp    1164 <ts_sdt_alloc_init+0x44>
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <ts_sdt_init@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_sdt_alloc_init>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <ts_sdt_alloc@plt>
test   %rax,%rax
je     1145 <ts_sdt_alloc_init+0x25>
mov    %rax,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ts_sdt_init@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.ts_sdt = type { i32 }
define %struct.ts_sdt* @ts_sdt_alloc_init(i32 %0, i32 %1) {
%3 = alloca %struct.ts_sdt*
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.ts_sdt*
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = call %struct.ts_sdt* (...) @ts_sdt_alloc()
store %struct.ts_sdt* %7, %struct.ts_sdt** %6
%8 = load %struct.ts_sdt*, %struct.ts_sdt** %6
%9 = icmp ne %struct.ts_sdt* %8, null
br i1 %9, label %11, label %10
10: ; preds = %2
store %struct.ts_sdt* null, %struct.ts_sdt** %3
br label %16
11: ; preds = %2
%12 = load %struct.ts_sdt*, %struct.ts_sdt** %6
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call %struct.ts_sdt* @ts_sdt_init(%struct.ts_sdt* %12, i32 %13, i32 %14)
store %struct.ts_sdt* %15, %struct.ts_sdt** %3
br label %16
16: ; preds = %11, %10
%17 = load %struct.ts_sdt*, %struct.ts_sdt** %3
ret %struct.ts_sdt* %17
}

LLVM IR (-O2):
%struct.ts_sdt = type { i32 }
define %struct.ts_sdt* @ts_sdt_alloc_init(i32 %0, i32 %1) {
%3 = tail call %struct.ts_sdt* (...) @ts_sdt_alloc()
%4 = icmp eq %struct.ts_sdt* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call %struct.ts_sdt* @ts_sdt_init(%struct.ts_sdt* %3, i32 %0, i32 %1)
br label %7
7: ; preds = %2, %5
%8 = phi %struct.ts_sdt* [ %6, %5 ], [ null, %2 ]
ret %struct.ts_sdt* %8
}
/* Variables and functions */
double errcheck(int /*<<< orphan*/, char *);
int /*<<< orphan*/ log(double);
double Log(double x) { return errcheck(log(x), "log"); }


x86 assembly (clang, -O0):
<Log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
call   1030 <errcheck@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Log>:
push   %rax
call   1040 <log@plt>
lea    0xed3(%rip),%rsi
mov    %eax,%edi
pop    %rax
jmp    1030 <errcheck@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"log\00"
define double @Log(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @log(double %3)
%5 = call double @errcheck(i32 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret double %5
}

LLVM IR (-O2):
@.str = [4 x i8] c"log\00"
define double @Log(double %0) {
%2 = tail call i32 @log(double %0)
%3 = tail call double @errcheck(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ b;

/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ stdin;
void waitForReturn() {
  char b[2];
  fprintf(stderr, "...Please press <Enter> to read on...");
  fgets(b, sizeof(b), stdin);
}


x86 assembly (clang, -O0):
<waitForReturn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    0xec8(%rip),%rsi
call   1040 <fprintf@plt>
lea    -0x2(%rbp),%rdi
mov    0x2ea0(%rip),%rax
mov    (%rax),%edx
mov    $0x2,%esi
call   1030 <fgets@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitForReturn>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
lea    0x6(%rsp),%rdi
mov    $0x2,%esi
call   1030 <fgets@plt>
pop    %rax
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [38 x i8] c"...Please press <Enter> to read on...\00"
@stdin = global i32 0
define void @waitForReturn() {
%1 = alloca [2 x i8]
%2 = load i32, i32* @stderr
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 2, i32 %5)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [38 x i8] c"...Please press <Enter> to read on...\00"
@stdin = global i32 0
define void @waitForReturn() {
%1 = alloca [2 x i8]
%2 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %2, i32 2, i32 %5)
ret void
}
/* Variables and functions */
scalar_t__ strtol(char const *, int /*<<< orphan*/ *, int);
int atoi(const char *s) { return (int)strtol(s, NULL, 10); }


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1030 <strtol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
xor    %esi,%esi
mov    $0xa,%edx
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strtol(i8* %3, i32* null, i32 10)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @atoi(i8* nocapture %0) {
%2 = tail call i64 @strtol(i8* nocapture %0, i32* null, i32 10)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ fsh_loop();
int main(int argc, char **argv) {
  fsh_loop();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <fsh_loop@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <fsh_loop@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @fsh_loop()
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @fsh_loop()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
int proc_comm_batt_get_voltage(void) { return 0; }


x86 assembly (clang, -O0):
<proc_comm_batt_get_voltage>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_comm_batt_get_voltage>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @proc_comm_batt_get_voltage() {
ret i32 0
}

LLVM IR (-O2):
define i32 @proc_comm_batt_get_voltage() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ roadmap_help_show(char *);
void roadmap_help_install(void) { roadmap_help_show("directories"); }


x86 assembly (clang, -O0):
<roadmap_help_install>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <roadmap_help_show@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_help_install>:
lea    0xee9(%rip),%rdi
jmp    1030 <roadmap_help_show@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"directories\00"
define void @roadmap_help_install() {
%1 = call i32 @roadmap_help_show(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"directories\00"
define void @roadmap_help_install() {
%1 = tail call i32 @roadmap_help_show(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}
void g_async_queue_ref() {}


x86 assembly (clang, -O0):
<g_async_queue_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_async_queue_ref>:
ret

LLVM IR (-O0):
define void @g_async_queue_ref() {
ret void
}

LLVM IR (-O2):
define void @g_async_queue_ref() {
ret void
}
/* Variables and functions */
char isspace(unsigned char c) {
  if (c == ((unsigned char)' ') || c == ((unsigned char)'\f') ||
      c == ((unsigned char)'\n') || c == ((unsigned char)'\r') ||
      c == ((unsigned char)'\t') || c == ((unsigned char)'\v'))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x20,%eax
je     1158 <isspace+0x58>
movzbl -0x2(%rbp),%eax
cmp    $0xc,%eax
je     1158 <isspace+0x58>
movzbl -0x2(%rbp),%eax
cmp    $0xa,%eax
je     1158 <isspace+0x58>
movzbl -0x2(%rbp),%eax
cmp    $0xd,%eax
je     1158 <isspace+0x58>
movzbl -0x2(%rbp),%eax
cmp    $0x9,%eax
je     1158 <isspace+0x58>
movzbl -0x2(%rbp),%eax
cmp    $0xb,%eax
jne    1161 <isspace+0x61>
movb   $0x1,-0x1(%rbp)
jmp    1165 <isspace+0x65>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
mov    $0x1,%al
lea    -0x9(%rdi),%ecx
cmp    $0x5,%cl
jae    110b <isspace+0xb>
ret
cmp    $0x20,%dil
je     110a <isspace+0xa>
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @isspace(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp eq i32 %5, 32
br i1 %6, label %27, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %9, 12
br i1 %10, label %27, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = icmp eq i32 %13, 10
br i1 %14, label %27, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp eq i32 %17, 13
br i1 %18, label %27, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = zext i8 %20 to i32
%22 = icmp eq i32 %21, 9
br i1 %22, label %27, label %23
23: ; preds = %19
%24 = load i8, i8* %3
%25 = zext i8 %24 to i32
%26 = icmp eq i32 %25, 11
br i1 %26, label %27, label %28
27: ; preds = %23, %19, %15, %11, %7, %1
store i8 1, i8* %2
br label %29
28: ; preds = %23
store i8 0, i8* %2
br label %29
29: ; preds = %28, %27
%30 = load i8, i8* %2
ret i8 %30
}

LLVM IR (-O2):
define signext i8 @isspace(i8 zeroext %0) {
switch i8 %0, label %2 [
i8 32, label %3
i8 13, label %3
i8 12, label %3
i8 11, label %3
i8 10, label %3
i8 9, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %2
%4 = phi i8 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int);
void msgdma_usleep(unsigned int useconds) { usleep(useconds); }


x86 assembly (clang, -O0):
<msgdma_usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgdma_usleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @msgdma_usleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @msgdma_usleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret void
}
/* Variables and functions */
int check_translation(char *, char const *, int /*<<< orphan*/ *, char const *);
int /*<<< orphan*/ lou_free();
int main(int argc, char **argv) {
  int result = 0;
  const char *text = "---.com";
  const char *expected = "";
  result |= check_translation("UEBC-g2.ctb", text, NULL, expected);
  lou_free();
  return result;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
lea    0xebc(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    0xec4(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rcx
lea    0xea6(%rip),%rdi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <check_translation@plt>
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <lou_free@plt>
mov    -0x14(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee0(%rip),%rdi
lea    0xed1(%rip),%rsi
lea    0xedd(%rip),%rcx
xor    %edx,%edx
call   1030 <check_translation@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <lou_free@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"---.com\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [12 x i8] c"UEBC-g2.ctb\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %7
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8** %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %8
%11 = call i32 @check_translation(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i8* %9, i32* null, i8* %10)
%12 = load i32, i32* %6
%13 = or i32 %12, %11
store i32 %13, i32* %6
%14 = call i32 (...) @lou_free()
%15 = load i32, i32* %6
ret i32 %15
}

LLVM IR (-O2):
@.str = [8 x i8] c"---.com\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [12 x i8] c"UEBC-g2.ctb\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @check_translation(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32* null, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 (...) @lou_free()
ret i32 %3
}
char low_char(char c) {
  if (c >= 'A' && c <= 'Z') {
    return c - 'A' + 'a';
  }
  return c;
}


x86 assembly (clang, -O0):
<low_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     1136 <low_char+0x36>
movsbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     1136 <low_char+0x36>
movsbl -0x2(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %al,-0x1(%rbp)
jmp    113c <low_char+0x3c>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<low_char>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @low_char(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 65
%15 = add nsw i32 %14, 97
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %19
17: ; preds = %7, %1
%18 = load i8, i8* %3
store i8 %18, i8* %2
br label %19
19: ; preds = %17, %11
%20 = load i8, i8* %2
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @low_char(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
unsigned kol_key_get() { asm volatile("int $0x40" ::"a"(2)); }


x86 assembly (clang, -O0):
<kol_key_get>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
int    $0x40
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_key_get>:
mov    $0x2,%eax
int    $0x40
ret

LLVM IR (-O0):
define i32 @kol_key_get() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @kol_key_get() {
tail call void asm sideeffect "int $$0x40", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 2)
ret i32 undef
}