xunge/DecIR huggingface dataset:
__attribute((weak)) void g() {}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define weak void @g() {
ret void
}

LLVM IR (-O2):
define weak void @g() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x55() {
  Assert_real((isdigit(85) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              430, ("isdigit should be 0 for U"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x55>:
push   %rbp
mov    %rsp,%rbp
mov    $0x55,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1ae,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x55>:
push   %rax
mov    $0x55,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1ae,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for U\00"
define void @t_isdigit_0x55() {
%1 = call i64 @isdigit(i32 85)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 430, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for U\00"
define void @t_isdigit_0x55() {
%1 = tail call i64 @isdigit(i32 85)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 430, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void foo(void) { asm("foo_label: .globl foo_label"); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
ret void
}

LLVM IR (-O2):
define void @foo() {
tail call void asm sideeffect "foo_label: .globl foo_label", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int mul2(int);
uint8_t mul(uint8_t x, uint8_t y) {
  uint8_t z;
  z = 0;
  while (x != 0) {
    if (x & 1)
      z ^= y;
    x >>= 1;
    y = mul2(y);
  }
  return z;
}


x86 assembly (clang, -O0):
<mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1160 <mul+0x50>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1147 <mul+0x37>
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <mul2@plt>
mov    %eax,-0x8(%rbp)
jmp    1125 <mul+0x15>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
je     1150 <mul+0x40>
mov    %esi,%eax
mov    %edi,%r14d
xor    %ebx,%ebx
mov    %edi,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r14d,%ecx
and    $0x1,%ecx
neg    %ecx
and    %eax,%ecx
xor    %ecx,%ebx
sar    %ebp
mov    %eax,%edi
call   1030 <mul2@plt>
cmp    $0x1,%r14d
mov    %ebp,%r14d
ja     1130 <mul+0x20>
jmp    1152 <mul+0x42>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i32, i32* %3
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = xor i32 %15, %14
store i32 %16, i32* %5
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %3
%19 = ashr i32 %18, 1
store i32 %19, i32* %3
%20 = load i32, i32* %4
%21 = call i32 @mul2(i32 %20)
store i32 %21, i32* %4
br label %6
22: ; preds = %6
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @mul(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 0, %2 ]
%6 = phi i32 [ %13, %4 ], [ %1, %2 ]
%7 = phi i32 [ %12, %4 ], [ %0, %2 ]
%8 = and i32 %7, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 0, i32 %6
%11 = xor i32 %10, %5
%12 = ashr i32 %7, 1
%13 = tail call i32 @mul2(i32 %6)
%14 = icmp ult i32 %7, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi i32 [ 0, %2 ], [ %11, %4 ]
ret i32 %16
}
/* Variables and functions */
float expf(int);
int logf(float);
float cbrtf(float num) { return expf(logf(num) / 3); }


x86 assembly (clang, -O0):
<cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <logf@plt>
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <expf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrtf>:
push   %rax
call   1030 <logf@plt>
cltq
imul   $0x55555556,%rax,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
shr    $0x20,%rdi
add    %eax,%edi
pop    %rax
jmp    1040 <expf@plt>

LLVM IR (-O0):
define float @cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @logf(float %3)
%5 = sdiv i32 %4, 3
%6 = call float @expf(i32 %5)
ret float %6
}

LLVM IR (-O2):
define float @cbrtf(float %0) {
%2 = tail call i32 @logf(float %0)
%3 = sdiv i32 %2, 3
%4 = tail call float @expf(i32 %3)
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
int assert_true(int given, char *msg) {
  if (!given) {
    printf("%s\n", msg);
    exit(1);
  }
  return 1;
}


x86 assembly (clang, -O0):
<assert_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1153 <assert_true+0x33>
mov    -0x10(%rbp),%rsi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_true>:
test   %edi,%edi
je     112a <assert_true+0xa>
mov    $0x1,%eax
ret
push   %rax
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @assert_true(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %2
ret i32 1
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @assert_true(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %2
ret i32 1
}
int isBinary(char **tokens, int len) { return 1; }


x86 assembly (clang, -O0):
<isBinary>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBinary>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isBinary(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @isBinary(i8** nocapture readnone %0, i32 %1) {
ret i32 1
}
int config_READER_VIACCESS(void) { return 0; }


x86 assembly (clang, -O0):
<config_READER_VIACCESS>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_READER_VIACCESS>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_READER_VIACCESS() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_READER_VIACCESS() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void write_gpio(int value, int phy_address, void *virtual_address,
                int page_offset) {
  printf("Going to write onto %08x the value %08x\n", phy_address, value);
  *((unsigned *)(virtual_address + page_offset)) = value;
}


x86 assembly (clang, -O0):
<write_gpio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_gpio>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%ebx
mov    %rdx,%r14
mov    %edi,%ebp
lea    0xede(%rip),%rdi
mov    %ebp,%edx
call   1030 <printf@plt>
movslq %ebx,%rax
mov    %ebp,(%r14,%rax,1)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [41 x i8] c"Going to write onto %08x the value %08x\0A\00"
define void @write_gpio(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
%12 = load i32, i32* %5
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = sext i32 %14 to i64
%16 = getelementptr i8, i8* %13, i64 %15
%17 = bitcast i8* %16 to i32*
store i32 %12, i32* %17
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"Going to write onto %08x the value %08x\0A\00"
define void @write_gpio(i32 %0, i32 %1, i8* nocapture writeonly %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%6 = sext i32 %3 to i64
%7 = getelementptr i8, i8* %2, i64 %6
%8 = bitcast i8* %7 to i32*
store i32 %0, i32* %8
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int is_power_of_2(uint64_t val) {
  return (val != 0 && ((val & (val - 1)) == 0));
}


x86 assembly (clang, -O0):
<is_power_of_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112a <is_power_of_2+0x2a>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_power_of_2>:
test   %edi,%edi
je     110f <is_power_of_2+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_power_of_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = and i32 %6, %8
%10 = icmp eq i32 %9, 0
br label %11
11: ; preds = %5, %1
%12 = phi i1 [ false, %1 ], [ %10, %5 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_power_of_2(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ strstr(char *, char *);
int check_extension(char *file) {
  if (!strstr(file, ".m++")) {
    printf("[Error] : fichier .m++ machi valid \n");
    return -1;
  }
}


x86 assembly (clang, -O0):
<check_extension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <strstr@plt>
cmp    $0x0,%eax
jne    1158 <check_extension+0x38>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_extension>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <strstr@plt>
test   %eax,%eax
jne    113d <check_extension+0x1d>
lea    0xecd(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c".m++\00"
@.str.1 = [37 x i8] c"[Error] : fichier .m++ machi valid \0A\00"
define i32 @check_extension(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @strstr(i8* %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
store i32 -1, i32* %2
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [5 x i8] c".m++\00"
@str = [36 x i8] c"[Error] : fichier .m++ machi valid \00"
define i32 @check_extension(i8* %0) {
%2 = tail call i32 @strstr(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 -1
}
int hash3(const char *w) {
  int n;
  for (n = 1; *w; n *= (*w++ - 64))
    ;
  return n % 47;
}


x86 assembly (clang, -O0):
<hash3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1142 <hash3+0x42>
jmp    1121 <hash3+0x21>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
sub    $0x40,%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <hash3+0xf>
mov    -0xc(%rbp),%eax
mov    $0x2f,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash3>:
mov    (%rdi),%cl
test   %cl,%cl
je     1143 <hash3+0x43>
add    $0x1,%rdi
mov    $0x1,%eax
nop
movsbl %cl,%ecx
add    $0xffffffc0,%ecx
imul   %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash3+0x10>
cltq
imul   $0xffffffffae4c415d,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x5,%ecx
add    %edx,%ecx
imul   $0x2f,%ecx,%ecx
sub    %ecx,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @hash3(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 1, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 64
%15 = load i32, i32* %3
%16 = mul nsw i32 %15, %14
store i32 %16, i32* %3
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
%19 = srem i32 %18, 47
ret i32 %19
}

LLVM IR (-O2):
define i32 @hash3(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 1, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = sext i8 %5 to i32
%10 = add nsw i32 %9, -64
%11 = mul nsw i32 %10, %6
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = srem i32 %11, 47
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 1, %1 ], [ %15, %14 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ CallBack3(int, void *, double *, double *);
int FetchNumVar(const char *varName, double *doublePtr1, double *doublePtr2) {
  return (int)CallBack3(3, (void *)varName, doublePtr1, doublePtr2);
}


x86 assembly (clang, -O0):
<FetchNumVar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x3,%edi
call   1030 <CallBack3@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FetchNumVar>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x3,%edi
jmp    1030 <CallBack3@plt>

LLVM IR (-O0):
define i32 @FetchNumVar(i8* %0, double* %1, double* %2) {
%4 = alloca i8*
%5 = alloca double*
%6 = alloca double*
store i8* %0, i8** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load i8*, i8** %4
%8 = load double*, double** %5
%9 = load double*, double** %6
%10 = call i64 @CallBack3(i32 3, i8* %7, double* %8, double* %9)
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @FetchNumVar(i8* %0, double* %1, double* %2) {
%4 = tail call i64 @CallBack3(i32 3, i8* %0, double* %1, double* %2)
%5 = trunc i64 %4 to i32
ret i32 %5
}
void swap(int *arr, int i, int j) {
  if (i == j)
    return;
  int temp = arr[i];
  arr[i] = arr[j];
  arr[j] = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jne    111f <swap+0x1f>
jmp    1151 <swap+0x51>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
cmp    %edx,%esi
je     1116 <swap+0x16>
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
br label %32
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
store i32 %17, i32* %7
%18 = load i32*, i32** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
%27 = load i32, i32* %7
%28 = load i32*, i32** %4
%29 = load i32, i32* %6
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i32, i32* %28, i64 %30
store i32 %27, i32* %31
br label %32
32: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, %2
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = sext i32 %2 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
store i32 %11, i32* %7
store i32 %8, i32* %10
br label %12
12: ; preds = %3, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ check_byte_array(unsigned char *, unsigned int,
                                    int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ get_imull_ops();
int /*<<< orphan*/ get_imull_ops_len();
int /*<<< orphan*/ output_multiply(unsigned char *, int, unsigned int *);
void test_output_multiply() {
  unsigned char buffer[128];
  unsigned int bytes_written = 0;
  output_multiply(buffer, 128, &bytes_written);
  check_byte_array(buffer, bytes_written, get_imull_ops(), get_imull_ops_len());
}


x86 assembly (clang, -O0):
<test_output_multiply>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
movl   $0x0,-0x84(%rbp)
lea    -0x80(%rbp),%rdi
mov    $0x80,%esi
lea    -0x84(%rbp),%rdx
call   1030 <output_multiply@plt>
lea    -0x80(%rbp),%rax
mov    %rax,-0x98(%rbp)
mov    -0x84(%rbp),%eax
mov    %eax,-0x8c(%rbp)
mov    $0x0,%al
call   1060 <get_imull_ops@plt>
mov    %eax,-0x88(%rbp)
mov    $0x0,%al
call   1050 <get_imull_ops_len@plt>
mov    -0x98(%rbp),%rdi
mov    -0x8c(%rbp),%esi
mov    -0x88(%rbp),%edx
mov    %eax,%ecx
call   1040 <check_byte_array@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_output_multiply>:
push   %rbp
push   %r14
push   %rbx
sub    $0x90,%rsp
movl   $0x0,0xc(%rsp)
lea    0x10(%rsp),%r14
lea    0xc(%rsp),%rdx
mov    %r14,%rdi
mov    $0x80,%esi
call   1030 <output_multiply@plt>
mov    0xc(%rsp),%ebp
xor    %eax,%eax
call   1060 <get_imull_ops@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <get_imull_ops_len@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
mov    %eax,%ecx
call   1040 <check_byte_array@plt>
add    $0x90,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @test_output_multiply() {
%1 = alloca [128 x i8]
%2 = alloca i32
store i32 0, i32* %2
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = call i32 @output_multiply(i8* %3, i32 128, i32* %2)
%5 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i32 (...) @get_imull_ops()
%8 = call i32 (...) @get_imull_ops_len()
%9 = call i32 @check_byte_array(i8* %5, i32 %6, i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @test_output_multiply() {
%1 = alloca [128 x i8]
%2 = alloca i32
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = call i32 @output_multiply(i8* %3, i32 128, i32* %2)
%6 = load i32, i32* %2
%7 = call i32 (...) @get_imull_ops()
%8 = call i32 (...) @get_imull_ops_len()
%9 = call i32 @check_byte_array(i8* %3, i32 %6, i32 %7, i32 %8)
ret void
}
double QuarticEaseOut(double p) {
  double f = (p - 1);
  return f * f * f * (1 - p) + 1;
}


x86 assembly (clang, -O0):
<QuarticEaseOut>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  0xeca(%rip),%xmm1
subsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb9(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<QuarticEaseOut>:
movsd  0xef8(%rip),%xmm1
addsd  %xmm0,%xmm1
movapd %xmm1,%xmm2
mulsd  %xmm1,%xmm2
mulsd  %xmm1,%xmm2
movsd  0xee8(%rip),%xmm3
movapd %xmm3,%xmm1
subsd  %xmm0,%xmm1
mulsd  %xmm2,%xmm1
addsd  %xmm3,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @QuarticEaseOut(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fsub double %4, 1.000000e+00
store double %5, double* %3
%6 = load double, double* %3
%7 = load double, double* %3
%8 = fmul double %6, %7
%9 = load double, double* %3
%10 = fmul double %8, %9
%11 = load double, double* %2
%12 = fsub double 1.000000e+00, %11
%13 = call double @llvm.fmuladd.f64(double %10, double %12, double 1.000000e+00)
ret double %13
}

LLVM IR (-O2):
define double @QuarticEaseOut(double %0) {
%2 = fadd double %0, -1.000000e+00
%3 = fmul double %2, %2
%4 = fmul double %2, %3
%5 = fsub double 1.000000e+00, %0
%6 = tail call double @llvm.fmuladd.f64(double %4, double %5, double 1.000000e+00)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ brc(int, char);
void hpa(int pn) { brc(pn, '`'); }


x86 assembly (clang, -O0):
<hpa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x60,%esi
call   1030 <brc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hpa>:
mov    $0x60,%esi
jmp    1030 <brc@plt>

LLVM IR (-O0):
define void @hpa(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @brc(i32 %3, i8 signext 96)
ret void
}

LLVM IR (-O2):
define void @hpa(i32 %0) {
%2 = tail call i32 @brc(i32 %0, i8 signext 96)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void btree_memcpy(void *dst, const void *src, size_t length, bool dry_run) {
  void *p = NULL;
  if (!dry_run) {
    memcpy(dst, src, length);
  }
}


x86 assembly (clang, -O0):
<btree_memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movq   $0x0,-0x28(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    114a <btree_memcpy+0x3a>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btree_memcpy>:
test   %ecx,%ecx
je     1115 <btree_memcpy+0x5>
ret
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @btree_memcpy(i8* %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
%9 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
store i8* null, i8** %9
%10 = load i32, i32* %8
%11 = icmp ne i32 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %4
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = load i64, i64* %7
%16 = call i32 @memcpy(i8* %13, i8* %14, i64 %15)
br label %17
17: ; preds = %12, %4
ret void
}

LLVM IR (-O2):
define void @btree_memcpy(i8* %0, i8* %1, i64 %2, i32 %3) {
%5 = icmp eq i32 %3, 0
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
br label %8
8: ; preds = %6, %4
ret void
}
void dump_scan(struct pci_access *a __attribute__((unused))) {}


x86 assembly (clang, -O0):
<dump_scan>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_scan>:
ret

LLVM IR (-O0):
%struct.pci_access = type opaque
define void @dump_scan(%struct.pci_access* %0) {
%2 = alloca %struct.pci_access*
store %struct.pci_access* %0, %struct.pci_access** %2
ret void
}

LLVM IR (-O2):
%struct.pci_access = type opaque
define void @dump_scan(%struct.pci_access* nocapture %0) {
ret void
}
int fun293() { return 293; }


x86 assembly (clang, -O0):
<fun293>:
push   %rbp
mov    %rsp,%rbp
mov    $0x125,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun293>:
mov    $0x125,%eax
ret

LLVM IR (-O0):
define i32 @fun293() {
ret i32 293
}

LLVM IR (-O2):
define i32 @fun293() {
ret i32 293
}
/* Variables and functions */
scalar_t__ strsrc(char *, char *);
int is_connected(char *buf) {
  if (strsrc(buf, "/MOTD") > 0)
    return 1;
  else if (strsrc(buf, "MOTD") > 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_connected>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strsrc@plt>
cmp    $0x0,%rax
jle    1142 <is_connected+0x32>
movl   $0x1,-0x4(%rbp)
jmp    116f <is_connected+0x5f>
mov    -0x10(%rbp),%rdi
lea    0xeb4(%rip),%rsi
call   1030 <strsrc@plt>
cmp    $0x0,%rax
jle    1168 <is_connected+0x58>
movl   $0x1,-0x4(%rbp)
jmp    116f <is_connected+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_connected>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strsrc@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
jle    112f <is_connected+0x1f>
pop    %rbx
ret
lea    0xecb(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strsrc@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setg   %al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"/MOTD\00"
@.str.1 = [5 x i8] c"MOTD\00"
define i32 @is_connected(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strsrc(i8* %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strsrc(i8* %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%11 = icmp sgt i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %14
13: ; preds = %8
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [6 x i8] c"/MOTD\00"
@.str.1 = [5 x i8] c"MOTD\00"
define i32 @is_connected(i8* %0) {
%2 = tail call i64 @strsrc(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = icmp sgt i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strsrc(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp sgt i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int st_ptrcmp(const char *x, const char *y) { return ((x) != (y)); }


x86 assembly (clang, -O0):
<st_ptrcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_ptrcmp>:
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i32 @st_ptrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ne i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @st_ptrcmp(i8* readnone %0, i8* readnone %1) {
%3 = icmp ne i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
char *langDbgDevSviFdc() { return "SVI FDC"; }


x86 assembly (clang, -O0):
<langDbgDevSviFdc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langDbgDevSviFdc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"SVI FDC\00"
define i8* @langDbgDevSviFdc() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"SVI FDC\00"
define i8* @langDbgDevSviFdc() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *, int, int, int, int);
int print_time(FILE *f, struct timeval tv) {
  return fprintf(f, "%02ldm %02lds %03dms %03dus\n", tv.tv_sec / 60,
                 tv.tv_sec % 60, tv.tv_usec / 1000, tv.tv_usec % 1000);
}


x86 assembly (clang, -O0):
<print_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rsi,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %edx,%ecx
mov    -0x4(%rbp),%eax
mov    $0x3e8,%esi
cltd
idiv   %esi
mov    %eax,%r8d
mov    -0x4(%rbp),%eax
mov    $0x3e8,%esi
cltd
idiv   %esi
mov    %edx,%r9d
mov    -0x14(%rbp),%edx
lea    0xe9b(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_time>:
mov    %rsi,%r9
shr    $0x20,%r9
movslq %esi,%rcx
imul   $0xffffffff88888889,%rcx,%rdx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%eax
shr    $0x1f,%eax
sar    $0x5,%edx
add    %eax,%edx
imul   $0x3c,%edx,%eax
sub    %eax,%ecx
sar    $0x20,%rsi
imul   $0x10624dd3,%rsi,%r8
mov    %r8,%rax
shr    $0x3f,%rax
sar    $0x26,%r8
add    %eax,%r8d
imul   $0x3e8,%r8d,%eax
sub    %eax,%r9d
lea    0xea0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
@.str = [29 x i8] c"%02ldm %02lds %03dms %03dus\0A\00"
define i32 @print_time(i32* %0, i64 %1) {
%3 = alloca %struct.timeval
%4 = alloca i32*
%5 = bitcast %struct.timeval* %3 to i64*
store i64 %1, i64* %5
store i32* %0, i32** %4
%6 = load i32*, i32** %4
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 60
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%11 = load i32, i32* %10
%12 = srem i32 %11, 60
%13 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
%14 = load i32, i32* %13
%15 = sdiv i32 %14, 1000
%16 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
%17 = load i32, i32* %16
%18 = srem i32 %17, 1000
%19 = call i32 @fprintf(i32* %6, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %12, i32 %15, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
@.str = [29 x i8] c"%02ldm %02lds %03dms %03dus\0A\00"
define i32 @print_time(i32* nocapture %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = lshr i64 %1, 32
%5 = trunc i64 %4 to i32
%6 = sdiv i32 %3, 60
%7 = srem i32 %3, 60
%8 = sdiv i32 %5, 1000
%9 = srem i32 %5, 1000
%10 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7, i32 %8, i32 %9)
ret i32 %10
}
int numberOf1InBinary(int number) {
  unsigned int flag = 1;
  int counter = 0;
  while (flag) {
    if (flag & number)
      ++counter;
    flag = flag << 1;
  }
  return counter;
}


x86 assembly (clang, -O0):
<numberOf1InBinary>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1145 <numberOf1InBinary+0x45>
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
cmp    $0x0,%eax
je     1137 <numberOf1InBinary+0x37>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <numberOf1InBinary+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numberOf1InBinary>:
mov    $0x1,%ecx
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
mov    %ecx,%edx
and    %edi,%edx
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
lea    (%rcx,%rcx,1),%edx
and    %edi,%edx
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
lea    0x0(,%rcx,4),%edx
and    %edi,%edx
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
lea    0x0(,%rcx,8),%edx
and    %edi,%edx
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
shl    $0x4,%ecx
jne    1110 <numberOf1InBinary+0x10>
ret

LLVM IR (-O0):
define i32 @numberOf1InBinary(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %2
%11 = and i32 %9, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %16
16: ; preds = %13, %8
%17 = load i32, i32* %3
%18 = shl i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @numberOf1InBinary(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %23, %2 ]
%4 = phi i32 [ 1, %1 ], [ %24, %2 ]
%5 = and i32 %4, %0
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
%8 = add nuw nsw i32 %3, %7
%9 = shl i32 %4, 1
%10 = and i32 %9, %0
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i32
%13 = add nuw nsw i32 %8, %12
%14 = shl i32 %4, 2
%15 = and i32 %14, %0
%16 = icmp ne i32 %15, 0
%17 = zext i1 %16 to i32
%18 = add nuw nsw i32 %13, %17
%19 = shl i32 %4, 3
%20 = and i32 %19, %0
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i32
%23 = add nuw nsw i32 %18, %22
%24 = shl i32 %4, 4
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %2
26: ; preds = %2
ret i32 %23
}
short swap_short(short lt) { return ((lt << 8) | ((lt >> 8) & 0xFF)); }


x86 assembly (clang, -O0):
<swap_short>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
shl    $0x8,%eax
movswl -0x2(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
or     %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_short>:
mov    %edi,%ecx
movzbl %ch,%eax
shl    $0x8,%ecx
or     %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @swap_short(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = shl i32 %4, 8
%6 = load i16, i16* %2
%7 = sext i16 %6 to i32
%8 = ashr i32 %7, 8
%9 = and i32 %8, 255
%10 = or i32 %5, %9
%11 = trunc i32 %10 to i16
ret i16 %11
}

LLVM IR (-O2):
define signext i16 @swap_short(i16 signext %0) {
%2 = sext i16 %0 to i32
%3 = shl nsw i32 %2, 8
%4 = lshr i32 %2, 8
%5 = and i32 %4, 255
%6 = or i32 %5, %3
%7 = trunc i32 %6 to i16
ret i16 %7
}
int division(int x, int y) {
  int q, r;
  q = 0;
  r = x;
  while (r >= y) {
    int d, dd;
    d = 1;
    dd = y;
    while (r >= 2 * dd) {
      d = 2 * d;
      dd = 2 * dd;
    }
    r = r - dd;
    q = q + d;
  }
  return r;
}


x86 assembly (clang, -O0):
<division>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     116f <division+0x6f>
movl   $0x1,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x18(%rbp),%ecx
shl    $0x1,%ecx
cmp    %ecx,%eax
jl     1158 <division+0x58>
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1130 <division+0x30>
mov    -0x10(%rbp),%eax
sub    -0x18(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1117 <division+0x17>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<division>:
mov    %edi,%eax
cmp    %esi,%edi
jl     112f <division+0x2f>
cs nopw 0x0(%rax,%rax,1)
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %edx,%ecx
lea    (%rcx,%rcx,1),%edx
cmp    %edx,%eax
jge    1120 <division+0x20>
sub    %ecx,%eax
cmp    %esi,%eax
jge    1110 <division+0x10>
ret

LLVM IR (-O0):
define i32 @division(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%9 = load i32, i32* %3
store i32 %9, i32* %6
br label %10
10: ; preds = %26, %2
%11 = load i32, i32* %6
%12 = load i32, i32* %4
%13 = icmp sge i32 %11, %12
br i1 %13, label %14, label %33
14: ; preds = %10
store i32 1, i32* %7
%15 = load i32, i32* %4
store i32 %15, i32* %8
br label %16
16: ; preds = %21, %14
%17 = load i32, i32* %6
%18 = load i32, i32* %8
%19 = mul nsw i32 2, %18
%20 = icmp sge i32 %17, %19
br i1 %20, label %21, label %26
21: ; preds = %16
%22 = load i32, i32* %7
%23 = mul nsw i32 2, %22
store i32 %23, i32* %7
%24 = load i32, i32* %8
%25 = mul nsw i32 2, %24
store i32 %25, i32* %8
br label %16
26: ; preds = %16
%27 = load i32, i32* %6
%28 = load i32, i32* %8
%29 = sub nsw i32 %27, %28
store i32 %29, i32* %6
%30 = load i32, i32* %5
%31 = load i32, i32* %7
%32 = add nsw i32 %30, %31
store i32 %32, i32* %5
br label %10
33: ; preds = %10
%34 = load i32, i32* %6
ret i32 %34
}

LLVM IR (-O2):
define i32 @division(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %13, label %4
4: ; preds = %2, %10
%5 = phi i32 [ %11, %10 ], [ %0, %2 ]
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %8, %6 ], [ %1, %4 ]
%8 = shl nsw i32 %7, 1
%9 = icmp slt i32 %5, %8
br i1 %9, label %10, label %6
10: ; preds = %6
%11 = sub nsw i32 %5, %7
%12 = icmp slt i32 %11, %1
br i1 %12, label %13, label %4
13: ; preds = %10, %2
%14 = phi i32 [ %0, %2 ], [ %11, %10 ]
ret i32 %14
}
void args_stash_free(void) {}


x86 assembly (clang, -O0):
<args_stash_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<args_stash_free>:
ret

LLVM IR (-O0):
define void @args_stash_free() {
ret void
}

LLVM IR (-O2):
define void @args_stash_free() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void flash_uc(uint8_t *data, int32_t nb_byte, uint8_t *temp) {}


x86 assembly (clang, -O0):
<flash_uc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_uc>:
ret

LLVM IR (-O0):
define void @flash_uc(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
ret void
}

LLVM IR (-O2):
define void @flash_uc(i32* nocapture %0, i32 %1, i32* nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f();
int op_if(int, int, int /*<<< orphan*/);
int op_and(int a, int b) { return op_if(a, b, f()); }


x86 assembly (clang, -O0):
<op_and>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    %eax,%edx
call   1040 <op_if@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_and>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <f@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <op_if@plt>

LLVM IR (-O0):
define i32 @op_and(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (...) @f()
%8 = call i32 @op_if(i32 %5, i32 %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @op_and(i32 %0, i32 %1) {
%3 = tail call i32 (...) @f()
%4 = tail call i32 @op_if(i32 %0, i32 %1, i32 %3)
ret i32 %4
}
f(int a) {
  if (a != 1)
    _Exit(1);
  return 3;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     112f <f+0x1f>
mov    $0x1,%edi
call   1030 <_Exit@plt>
mov    $0x3,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    $0x1,%edi
jne    111b <f+0xb>
mov    $0x3,%eax
ret
push   %rax
mov    $0x1,%edi
call   1030 <_Exit@plt>

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
unreachable
6: ; preds = %1
ret i32 3
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %4, label %3
3: ; preds = %1
tail call void @_Exit(i32 1)
unreachable
4: ; preds = %1
ret i32 3
}
int foo6() { return 1; }


x86 assembly (clang, -O0):
<foo6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo6>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @foo6() {
ret i32 1
}

LLVM IR (-O2):
define i32 @foo6() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Lmain(int /*<<< orphan*/);
int main() {
  Lmain(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <Lmain@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <Lmain@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @Lmain(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @Lmain(i32 0)
ret i32 0
}
int equal_int(void *ip, void *jp) {
  int i = *(int *)ip;
  int j = *(int *)jp;
  return (j == i);
}


x86 assembly (clang, -O0):
<equal_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<equal_int>:
mov    (%rsi),%ecx
xor    %eax,%eax
cmp    (%rdi),%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @equal_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = load i32, i32* %5
%15 = icmp eq i32 %13, %14
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @equal_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
struct ibv_device {
  int dummy;
};

/* Variables and functions */
struct ibv_device **ibv_get_device_list(int *);
struct ibv_device **mlx4_glue_get_device_list(int *num_devices) {
  return ibv_get_device_list(num_devices);
}


x86 assembly (clang, -O0):
<mlx4_glue_get_device_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ibv_get_device_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx4_glue_get_device_list>:
jmp    1030 <ibv_get_device_list@plt>

LLVM IR (-O0):
%struct.ibv_device = type { i32 }
define %struct.ibv_device** @mlx4_glue_get_device_list(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call %struct.ibv_device** @ibv_get_device_list(i32* %3)
ret %struct.ibv_device** %4
}

LLVM IR (-O2):
%struct.ibv_device = type { i32 }
define %struct.ibv_device** @mlx4_glue_get_device_list(i32* %0) {
%2 = tail call %struct.ibv_device** @ibv_get_device_list(i32* %0)
ret %struct.ibv_device** %2
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ same_screen;
};
struct TYPE_4__ {
  TYPE_1__ xkey;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xkey_same_screen(void *_p) {
  return (int)((XEvent *)_p)->xkey.same_screen;
}


x86 assembly (clang, -O0):
<get_XEvent_xkey_same_screen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xkey_same_screen>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xkey_same_screen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xkey_same_screen(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}