#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct arm_instruction {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
int t2ev_misc(unsigned opcode, unsigned address,
              struct arm_instruction *instruction, char *cp) {
  const char *mnemonic;
  switch ((opcode >> 4) & 0x0f) {
  case 0:
    mnemonic = "LEAVEX";
    break;
  case 1:
    mnemonic = "ENTERX";
    break;
  case 2:
    mnemonic = "CLREX";
    break;
  case 4:
    mnemonic = "DSB";
    break;
  case 5:
    mnemonic = "DMB";
    break;
  case 6:
    mnemonic = "ISB";
    break;
  default:
    return -1;
  }
  strcpy(cp, mnemonic);
  return 0;
}


x86 assembly (clang, -O0):
<t2ev_misc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
and    $0xf,%eax
mov    %eax,%ecx
mov    %rcx,-0x30(%rbp)
sub    $0x6,%eax
ja     11b2 <t2ev_misc+0xa2>
mov    -0x30(%rbp),%rax
lea    0xeb7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xec3(%rip),%rax
mov    %rax,-0x28(%rbp)
jmp    11be <t2ev_misc+0xae>
lea    0xeba(%rip),%rax
mov    %rax,-0x28(%rbp)
jmp    11be <t2ev_misc+0xae>
lea    0xeb1(%rip),%rax
mov    %rax,-0x28(%rbp)
jmp    11be <t2ev_misc+0xae>
lea    0xea7(%rip),%rax
mov    %rax,-0x28(%rbp)
jmp    11be <t2ev_misc+0xae>
lea    0xe9b(%rip),%rax
mov    %rax,-0x28(%rbp)
jmp    11be <t2ev_misc+0xae>
lea    0xe8f(%rip),%rax
mov    %rax,-0x28(%rbp)
jmp    11be <t2ev_misc+0xae>
movl   $0xffffffff,-0x4(%rbp)
jmp    11d2 <t2ev_misc+0xc2>
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <strcpy@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t2ev_misc>:
shr    $0x4,%edi
and    $0xf,%edi
mov    $0xffffffff,%eax
cmp    $0x6,%edi
ja     1149 <t2ev_misc+0x39>
mov    $0x77,%edx
bt     %edi,%edx
jae    1149 <t2ev_misc+0x39>
push   %rax
mov    %edi,%eax
lea    0xeec(%rip),%rdx
movslq (%rdx,%rax,4),%rsi
add    %rdx,%rsi
mov    %rcx,%rdi
call   1030 <strcpy@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
%struct.arm_instruction = type { i32 }
@.str = [7 x i8] c"LEAVEX\00"
@.str.1 = [7 x i8] c"ENTERX\00"
@.str.2 = [6 x i8] c"CLREX\00"
@.str.3 = [4 x i8] c"DSB\00"
@.str.4 = [4 x i8] c"DMB\00"
@.str.5 = [4 x i8] c"ISB\00"
define i32 @t2ev_misc(i32 %0, i32 %1, %struct.arm_instruction* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca %struct.arm_instruction*
%9 = alloca i8*
%10 = alloca i8*
store i32 %0, i32* %6
store i32 %1, i32* %7
store %struct.arm_instruction* %2, %struct.arm_instruction** %8
store i8* %3, i8** %9
%11 = load i32, i32* %6
%12 = lshr i32 %11, 4
%13 = and i32 %12, 15
switch i32 %13, label %20 [
i32 0, label %14
i32 1, label %15
i32 2, label %16
i32 4, label %17
i32 5, label %18
i32 6, label %19
]
14: ; preds = %4
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %10
br label %21
15: ; preds = %4
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8** %10
br label %21
16: ; preds = %4
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8** %10
br label %21
17: ; preds = %4
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8** %10
br label %21
18: ; preds = %4
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.4, i64 0, i64 0), i8** %10
br label %21
19: ; preds = %4
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.5, i64 0, i64 0), i8** %10
br label %21
20: ; preds = %4
store i32 -1, i32* %5
br label %25
21: ; preds = %19, %18, %17, %16, %15, %14
%22 = load i8*, i8** %9
%23 = load i8*, i8** %10
%24 = call i32 @strcpy(i8* %22, i8* %23)
store i32 0, i32* %5
br label %25
25: ; preds = %21, %20
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
%struct.arm_instruction = type { i32 }
@.str = [7 x i8] c"LEAVEX\00"
@.str.1 = [7 x i8] c"ENTERX\00"
@.str.2 = [6 x i8] c"CLREX\00"
@.str.3 = [4 x i8] c"DSB\00"
@.str.4 = [4 x i8] c"DMB\00"
@.str.5 = [4 x i8] c"ISB\00"
@reltable.t2ev_misc = [7 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([7 x i8]* @.str to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([7 x i8]* @.str.1 to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([6 x i8]* @.str.2 to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([7 x i8]* @.str to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([4 x i8]* @.str.3 to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([4 x i8]* @.str.4 to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([4 x i8]* @.str.5 to i64), i64 ptrtoint ([7 x i32]* @reltable.t2ev_misc to i64)) to i32)]
define i32 @t2ev_misc(i32 %0, i32 %1, %struct.arm_instruction* nocapture readnone %2, i8* %3) {
%5 = lshr i32 %0, 4
%6 = and i32 %5, 15
%7 = icmp ult i32 %6, 7
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = trunc i32 %6 to i8
%10 = lshr i8 119, %9
%11 = and i8 %10, 1
%12 = icmp eq i8 %11, 0
br i1 %12, label %18, label %13
13: ; preds = %8
%14 = zext i32 %6 to i64
%15 = shl i64 %14, 2
%16 = call i8* @llvm.load.relative.i64(i8* bitcast ([7 x i32]* @reltable.t2ev_misc to i8*), i64 %15)
%17 = tail call i32 @strcpy(i8* %3, i8* %16)
br label %18
18: ; preds = %8, %4, %13
%19 = phi i32 [ 0, %13 ], [ -1, %4 ], [ -1, %8 ]
ret i32 %19
}