xunge/DecIR huggingface dataset:
int leap_check(int year) {
  int leap = 0;
  if (!(year % 4)) {
    if (!(year % 100)) {
      if (!(year % 400))
        leap = 1;
      else
        leap = 0;
    } else
      leap = 1;
  } else
    leap = 0;
  return leap;
}


x86 assembly (clang, -O0):
<leap_check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    116e <leap_check+0x6e>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1162 <leap_check+0x62>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1156 <leap_check+0x56>
movl   $0x1,-0x8(%rbp)
jmp    115d <leap_check+0x5d>
movl   $0x0,-0x8(%rbp)
jmp    1169 <leap_check+0x69>
movl   $0x1,-0x8(%rbp)
jmp    1175 <leap_check+0x75>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leap_check>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <leap_check+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%edx
ror    $0x2,%edx
mov    $0x1,%eax
cmp    $0x28f5c28,%edx
ja     1108 <leap_check+0x8>
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @leap_check(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = srem i32 %4, 4
%6 = icmp ne i32 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %1
%8 = load i32, i32* %2
%9 = srem i32 %8, 100
%10 = icmp ne i32 %9, 0
br i1 %10, label %18, label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = srem i32 %12, 400
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %11
store i32 1, i32* %3
br label %17
16: ; preds = %11
store i32 0, i32* %3
br label %17
17: ; preds = %16, %15
br label %19
18: ; preds = %7
store i32 1, i32* %3
br label %19
19: ; preds = %18, %17
br label %21
20: ; preds = %1
store i32 0, i32* %3
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @leap_check(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %4, %7
%12 = phi i32 [ %10, %7 ], [ 1, %4 ], [ 0, %1 ]
ret i32 %12
}
/* Variables and functions */
long __builtin_divdeo(long, long);
long div_deo(long a, long b) { return __builtin_divdeo(a, b); }


x86 assembly (clang, -O0):
<div_deo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__builtin_divdeo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_deo>:
jmp    1030 <__builtin_divdeo@plt>

LLVM IR (-O0):
define i64 @div_deo(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @__builtin_divdeo(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @div_deo(i64 %0, i64 %1) {
%3 = tail call i64 @__builtin_divdeo(i64 %0, i64 %1)
ret i64 %3
}
void RTPipeCreate(void) {}


x86 assembly (clang, -O0):
<RTPipeCreate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPipeCreate>:
ret

LLVM IR (-O0):
define void @RTPipeCreate() {
ret void
}

LLVM IR (-O2):
define void @RTPipeCreate() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void *tf2(void *arg) {
  while (1)
    sleep(100);
  return NULL;
}


x86 assembly (clang, -O0):
<tf2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x64,%edi
call   1030 <sleep@plt>
jmp    111c <tf2+0xc>

x86 assembly (clang, -O2):
<tf2>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x64,%edi
call   1030 <sleep@plt>
jmp    1120 <tf2+0x10>

LLVM IR (-O0):
define i8* @tf2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %3
%4 = call i32 @sleep(i32 100)
br label %3
}

LLVM IR (-O2):
define noalias i8* @tf2(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
%3 = tail call i32 @sleep(i32 100)
br label %2
}
/* Variables and functions */
scalar_t__ malloc(unsigned int);
void **mallocZeroedPointerArray(unsigned i) {
  unsigned j;
  void **p = (void **)malloc(i * sizeof(void *));
  if (p) {
    for (j = 0; j < i; ++j)
      p[j] = 0L;
  }
  return p;
}


x86 assembly (clang, -O0):
<mallocZeroedPointerArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <mallocZeroedPointerArray+0x5d>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1168 <mallocZeroedPointerArray+0x58>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%ecx
movq   $0x0,(%rax,%rcx,8)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113f <mallocZeroedPointerArray+0x2f>
jmp    116d <mallocZeroedPointerArray+0x5d>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocZeroedPointerArray>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x0(,%rbx,8),%edi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %rax,%rax
je     114e <mallocZeroedPointerArray+0x2e>
test   %ebx,%ebx
je     114e <mallocZeroedPointerArray+0x2e>
mov    %ebx,%edx
shl    $0x3,%rdx
mov    %r14,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8** @mallocZeroedPointerArray(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = mul i64 %6, 8
%8 = trunc i64 %7 to i32
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i8**
store i8** %10, i8*** %4
%11 = load i8**, i8*** %4
%12 = icmp ne i8** %11, null
br i1 %12, label %13, label %27
13: ; preds = %1
store i32 0, i32* %3
br label %14
14: ; preds = %23, %13
%15 = load i32, i32* %3
%16 = load i32, i32* %2
%17 = icmp ult i32 %15, %16
br i1 %17, label %18, label %26
18: ; preds = %14
%19 = load i8**, i8*** %4
%20 = load i32, i32* %3
%21 = zext i32 %20 to i64
%22 = getelementptr inbounds i8*, i8** %19, i64 %21
store i8* null, i8** %22
br label %23
23: ; preds = %18
%24 = load i32, i32* %3
%25 = add i32 %24, 1
store i32 %25, i32* %3
br label %14
26: ; preds = %14
br label %27
27: ; preds = %26, %1
%28 = load i8**, i8*** %4
ret i8** %28
}

LLVM IR (-O2):
define i8** @mallocZeroedPointerArray(i32 %0) {
%2 = shl i32 %0, 3
%3 = tail call i64 @malloc(i32 %2)
%4 = icmp ne i64 %3, 0
%5 = icmp ne i32 %0, 0
%6 = and i1 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = inttoptr i64 %3 to i8*
%9 = zext i32 %0 to i64
%10 = shl nuw nsw i64 %9, 3
br label %11
11: ; preds = %7, %1
%12 = inttoptr i64 %3 to i8**
ret i8** %12
}
void computeVariables(double voi, double *states, double *rates,
                      double *variables) {}


x86 assembly (clang, -O0):
<computeVariables>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<computeVariables>:
ret

LLVM IR (-O0):
define void @computeVariables(double %0, double* %1, double* %2, double* %3) {
%5 = alloca double
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store double %0, double* %5
store double* %1, double** %6
store double* %2, double** %7
store double* %3, double** %8
ret void
}

LLVM IR (-O2):
define void @computeVariables(double %0, double* nocapture %1, double* nocapture %2, double* nocapture %3) {
ret void
}
void load_player(char *name) {}


x86 assembly (clang, -O0):
<load_player>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_player>:
ret

LLVM IR (-O0):
define void @load_player(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @load_player(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
void pivot() {
  char reroute[10];
  gets(reroute);
}


x86 assembly (clang, -O0):
<pivot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0xa(%rbp),%rdi
call   1030 <gets@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pivot>:
sub    $0x18,%rsp
lea    0xe(%rsp),%rdi
call   1030 <gets@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @pivot() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = call i32 @gets(i8* %2)
ret void
}

LLVM IR (-O2):
define void @pivot() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = call i32 @gets(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rank2(int *, int *);
void rank3(int *x, int *y, int *z) {
  rank2(x, y);
  rank2(y, z);
  rank2(x, z);
}


x86 assembly (clang, -O0):
<rank3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rank2@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <rank2@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <rank2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rank3>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
call   1030 <rank2@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <rank2@plt>
mov    %r15,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <rank2@plt>

LLVM IR (-O0):
define void @rank3(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = call i32 @rank2(i32* %7, i32* %8)
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = call i32 @rank2(i32* %10, i32* %11)
%13 = load i32*, i32** %4
%14 = load i32*, i32** %6
%15 = call i32 @rank2(i32* %13, i32* %14)
ret void
}

LLVM IR (-O2):
define void @rank3(i32* %0, i32* %1, i32* %2) {
%4 = tail call i32 @rank2(i32* %0, i32* %1)
%5 = tail call i32 @rank2(i32* %1, i32* %2)
%6 = tail call i32 @rank2(i32* %0, i32* %2)
ret void
}
char c_unescape_char(char ch) {
  switch (ch) {
  case 'e':
    return (0x1b);
  case 'a':
    return ('\a');
  case 'b':
    return ('\b');
  case 'f':
    return ('\f');
  case 'n':
    return ('\n');
  case 'r':
    return ('\r');
  case 't':
    return ('\t');
  case 'v':
    return ('\v');
  }
  return (ch);
}


x86 assembly (clang, -O0):
<c_unescape_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
add    $0xffffff9f,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x15,%eax
ja     117c <c_unescape_char+0x7c>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x1b,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0x7,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0x8,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0xc,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0xa,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0xd,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0x9,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
movb   $0xb,-0x1(%rbp)
jmp    1182 <c_unescape_char+0x82>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_unescape_char>:
lea    -0x61(%rdi),%ecx
cmp    $0x15,%ecx
ja     1120 <c_unescape_char+0x20>
mov    $0x1b,%al
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x7,%al
ret
mov    $0x8,%al
ret
mov    %edi,%eax
ret
mov    $0xc,%al
ret
mov    $0xa,%al
ret
mov    $0xd,%al
ret
mov    $0x9,%al
ret
mov    $0xb,%al
ret

LLVM IR (-O0):
define signext i8 @c_unescape_char(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %14 [
i32 101, label %6
i32 97, label %7
i32 98, label %8
i32 102, label %9
i32 110, label %10
i32 114, label %11
i32 116, label %12
i32 118, label %13
]
6: ; preds = %1
store i8 27, i8* %2
br label %16
7: ; preds = %1
store i8 7, i8* %2
br label %16
8: ; preds = %1
store i8 8, i8* %2
br label %16
9: ; preds = %1
store i8 12, i8* %2
br label %16
10: ; preds = %1
store i8 10, i8* %2
br label %16
11: ; preds = %1
store i8 13, i8* %2
br label %16
12: ; preds = %1
store i8 9, i8* %2
br label %16
13: ; preds = %1
store i8 11, i8* %2
br label %16
14: ; preds = %1
%15 = load i8, i8* %3
store i8 %15, i8* %2
br label %16
16: ; preds = %14, %13, %12, %11, %10, %9, %8, %7, %6
%17 = load i8, i8* %2
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @c_unescape_char(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %10 [
i32 101, label %11
i32 97, label %3
i32 98, label %4
i32 102, label %5
i32 110, label %6
i32 114, label %7
i32 116, label %8
i32 118, label %9
]
3: ; preds = %1
br label %11
4: ; preds = %1
br label %11
5: ; preds = %1
br label %11
6: ; preds = %1
br label %11
7: ; preds = %1
br label %11
8: ; preds = %1
br label %11
9: ; preds = %1
br label %11
10: ; preds = %1
br label %11
11: ; preds = %1, %10, %9, %8, %7, %6, %5, %4, %3
%12 = phi i8 [ %0, %10 ], [ 11, %9 ], [ 9, %8 ], [ 13, %7 ], [ 10, %6 ], [ 12, %5 ], [ 8, %4 ], [ 7, %3 ], [ 27, %1 ]
ret i8 %12
}
int isNeg(char *input, int len) {
  if (len >= 2 && input[len - 1] == '5' && input[len - 2] == '3')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isNeg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
jl     1155 <isNeg+0x55>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x35,%eax
jne    1155 <isNeg+0x55>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x2,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x33,%eax
jne    1155 <isNeg+0x55>
movl   $0x1,-0x4(%rbp)
jmp    115c <isNeg+0x5c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNeg>:
cmp    $0x2,%esi
jl     111c <isNeg+0x1c>
lea    -0x1(%rsi),%eax
cmpb   $0x35,(%rdi,%rax,1)
jne    111c <isNeg+0x1c>
add    $0xfffffffe,%esi
mov    $0x1,%eax
cmpb   $0x33,(%rdi,%rsi,1)
je     111e <isNeg+0x1e>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isNeg(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sge i32 %6, 2
br i1 %7, label %8, label %27
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 53
br i1 %16, label %17, label %27
17: ; preds = %8
%18 = load i8*, i8** %4
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 2
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %18, i64 %21
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 51
br i1 %25, label %26, label %27
26: ; preds = %17
store i32 1, i32* %3
br label %28
27: ; preds = %17, %8, %2
store i32 0, i32* %3
br label %28
28: ; preds = %27, %26
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @isNeg(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = add nsw i32 %1, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 53
br i1 %9, label %10, label %16
10: ; preds = %4
%11 = add nsw i32 %1, -2
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 51
br i1 %15, label %17, label %16
16: ; preds = %10, %4, %2
br label %17
17: ; preds = %10, %16
%18 = phi i32 [ 0, %16 ], [ 1, %10 ]
ret i32 %18
}
/* Variables and functions */
void *rcu_dereference(void *);
void *radix_tree_deref_slot(void **pslot) { return rcu_dereference(*pslot); }


x86 assembly (clang, -O0):
<radix_tree_deref_slot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <rcu_dereference@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radix_tree_deref_slot>:
mov    (%rdi),%rdi
jmp    1030 <rcu_dereference@plt>

LLVM IR (-O0):
define i8* @radix_tree_deref_slot(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i8* @rcu_dereference(i8* %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @radix_tree_deref_slot(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i8* @rcu_dereference(i8* %2)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ ClearTile(int);
void ClearTileRow(int ref, int length) {
  for (int i = 0; i < length; i++)
    ClearTile(ref + i);
}


x86 assembly (clang, -O0):
<ClearTileRow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114a <ClearTileRow+0x3a>
mov    -0x4(%rbp),%edi
add    -0xc(%rbp),%edi
call   1030 <ClearTile@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1125 <ClearTileRow+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearTileRow>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    112f <ClearTileRow+0x1f>
mov    %esi,%ebx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
call   1030 <ClearTile@plt>
add    $0x1,%ebp
add    $0xffffffff,%ebx
jne    1120 <ClearTileRow+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ClearTileRow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = load i32, i32* %5
%13 = add nsw i32 %11, %12
%14 = call i32 @ClearTile(i32 %13)
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ClearTileRow(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i32 [ %9, %5 ], [ 0, %2 ]
%7 = add nsw i32 %6, %0
%8 = tail call i32 @ClearTile(i32 %7)
%9 = add nuw nsw i32 %6, 1
%10 = icmp eq i32 %9, %1
br i1 %10, label %4, label %5
}
void test61_AvrPin_targetInit__I() {}


x86 assembly (clang, -O0):
<test61_AvrPin_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test61_AvrPin_targetInit__I>:
ret

LLVM IR (-O0):
define void @test61_AvrPin_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test61_AvrPin_targetInit__I() {
ret void
}
int YInt(float f) {
  int i;
  float o;
  i = (int)f;
  o = f - i;
  if (o > 0.5)
    i++;
  else if (o < -0.5)
    i--;
  return (i);
}


x86 assembly (clang, -O0):
<YInt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
cvtsi2ssl -0x8(%rbp),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xecb(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <YInt+0x4d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1176 <YInt+0x76>
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeaa(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1171 <YInt+0x71>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1176 <YInt+0x76>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<YInt>:
cvttss2si %xmm0,%eax
cvttps2dq %xmm0,%xmm1
cvtdq2ps %xmm1,%xmm1
subss  %xmm1,%xmm0
ucomiss 0xeea(%rip),%xmm0
jbe    111c <YInt+0x1c>
add    $0x1,%eax
ret
movss  0xee0(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    112c <YInt+0x2c>
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @YInt(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca float
store float %0, float* %2
%5 = load float, float* %2
%6 = fptosi float %5 to i32
store i32 %6, i32* %3
%7 = load float, float* %2
%8 = load i32, i32* %3
%9 = sitofp i32 %8 to float
%10 = fsub float %7, %9
store float %10, float* %4
%11 = load float, float* %4
%12 = fpext float %11 to double
%13 = fcmp ogt double %12, 5.000000e-01
br i1 %13, label %14, label %17
14: ; preds = %1
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %25
17: ; preds = %1
%18 = load float, float* %4
%19 = fpext float %18 to double
%20 = fcmp olt double %19, -5.000000e-01
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load i32, i32* %3
%23 = add nsw i32 %22, -1
store i32 %23, i32* %3
br label %24
24: ; preds = %21, %17
br label %25
25: ; preds = %24, %14
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @YInt(float %0) {
%2 = fptosi float %0 to i32
%3 = sitofp i32 %2 to float
%4 = fsub float %0, %3
%5 = fcmp ogt float %4, 5.000000e-01
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = add nsw i32 %2, 1
br label %12
8: ; preds = %1
%9 = fcmp olt float %4, -5.000000e-01
br i1 %9, label %10, label %12
10: ; preds = %8
%11 = add nsw i32 %2, -1
br label %12
12: ; preds = %8, %10, %6
%13 = phi i32 [ %7, %6 ], [ %11, %10 ], [ %2, %8 ]
ret i32 %13
}
void xADCIntDisable(unsigned long ulBase, unsigned long ulIntFlags) {
  ;
  ;
  if (ulIntFlags & 0x000000A0) {
    (*((volatile unsigned long *)(ulBase + 0x00000004))) &= ~0x000000A0;
  }
}


x86 assembly (clang, -O0):
<xADCIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xa0,%rax
cmp    $0x0,%rax
je     1133 <xADCIntDisable+0x33>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
and    $0xffffffffffffff5f,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xADCIntDisable>:
test   $0xa0,%sil
je     110e <xADCIntDisable+0xe>
andq   $0xffffffffffffff5f,0x4(%rdi)
ff
ret

LLVM IR (-O0):
define void @xADCIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 160
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i64, i64* %3
%10 = add i64 %9, 4
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, -161
store volatile i64 %13, i64* %11
br label %14
14: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
define void @xADCIntDisable(i64 %0, i64 %1) {
%3 = and i64 %1, 160
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = add i64 %0, 4
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -161
store volatile i64 %9, i64* %7
br label %10
10: ; preds = %5, %2
ret void
}
/* Type definitions */
struct coder {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Ptngc_writemanybits(struct coder *, unsigned char *,
                                       int const, unsigned char **);
int /*<<< orphan*/ trajcoder_base_compress(int *, int, int *, unsigned char *);
void write_three_large(struct coder *coder, int *encode_ints, int *large_index,
                       const int nbits, unsigned char *compress_buffer,
                       unsigned char **output_ptr) {
  trajcoder_base_compress(encode_ints, 3, large_index, compress_buffer);
  Ptngc_writemanybits(coder, compress_buffer, nbits, output_ptr);
}


x86 assembly (clang, -O0):
<write_three_large>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x3,%esi
call   1030 <trajcoder_base_compress@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    -0x30(%rbp),%rcx
call   1040 <Ptngc_writemanybits@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_three_large>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %r9,%r14
mov    %r8,%rbx
mov    %ecx,%r15d
mov    %rdi,%rbp
mov    %rsi,%rdi
mov    $0x3,%esi
mov    %r8,%rcx
call   1030 <trajcoder_base_compress@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r15d,%edx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <Ptngc_writemanybits@plt>

LLVM IR (-O0):
%struct.coder = type { i32 }
define void @write_three_large(%struct.coder* %0, i32* %1, i32* %2, i32 %3, i8* %4, i8** %5) {
%7 = alloca %struct.coder*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i8**
store %struct.coder* %0, %struct.coder** %7
store i32* %1, i32** %8
store i32* %2, i32** %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i8** %5, i8*** %12
%13 = load i32*, i32** %8
%14 = load i32*, i32** %9
%15 = load i8*, i8** %11
%16 = call i32 @trajcoder_base_compress(i32* %13, i32 3, i32* %14, i8* %15)
%17 = load %struct.coder*, %struct.coder** %7
%18 = load i8*, i8** %11
%19 = load i32, i32* %10
%20 = load i8**, i8*** %12
%21 = call i32 @Ptngc_writemanybits(%struct.coder* %17, i8* %18, i32 %19, i8** %20)
ret void
}

LLVM IR (-O2):
%struct.coder = type { i32 }
define void @write_three_large(%struct.coder* %0, i32* %1, i32* %2, i32 %3, i8* %4, i8** %5) {
%7 = tail call i32 @trajcoder_base_compress(i32* %1, i32 3, i32* %2, i8* %4)
%8 = tail call i32 @Ptngc_writemanybits(%struct.coder* %0, i8* %4, i32 %3, i8** %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_castps_si128(int /*<<< orphan*/);
__m128i test_mm_castps_si128(__m128 A) { return _mm_castps_si128(A); }


x86 assembly (clang, -O0):
<test_mm_castps_si128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_castps_si128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_castps_si128>:
jmp    1030 <_mm_castps_si128@plt>

LLVM IR (-O0):
define i32 @test_mm_castps_si128(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_castps_si128(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_castps_si128(i32 %0) {
%2 = tail call i32 @_mm_castps_si128(i32 %0)
ret i32 %2
}
void reverse_range(char *start, char *end) {
  while (start < end) {
    char c = *start;
    *start++ = *end;
    *end-- = c;
  }
}


x86 assembly (clang, -O0):
<reverse_range>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1153 <reverse_range+0x53>
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
jmp    110c <reverse_range+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_range>:
cmp    %rsi,%rdi
jae    112c <reverse_range+0x2c>
add    $0xffffffffffffffff,%rsi
nopl   0x0(%rax)
movzbl (%rdi),%eax
movzbl 0x1(%rsi),%ecx
mov    %cl,(%rdi)
add    $0x1,%rdi
mov    %al,0x1(%rsi)
lea    -0x1(%rsi),%rax
cmp    %rsi,%rdi
mov    %rax,%rsi
jb     1110 <reverse_range+0x10>
ret

LLVM IR (-O0):
define void @reverse_range(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = icmp ult i8* %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
store i8 %12, i8* %5
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
%17 = load i8, i8* %5
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 -1
store i8* %19, i8** %4
store i8 %17, i8* %18
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @reverse_range(i8* %0, i8* %1) {
%3 = icmp ult i8* %0, %1
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i8* [ %9, %4 ], [ %0, %2 ]
%6 = phi i8* [ %10, %4 ], [ %1, %2 ]
%7 = load i8, i8* %5
%8 = load i8, i8* %6
%9 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %8, i8* %5
%10 = getelementptr inbounds i8, i8* %6, i64 -1
store i8 %7, i8* %6
%11 = icmp ult i8* %9, %10
br i1 %11, label %4, label %12
12: ; preds = %4, %2
ret void
}
void scopyn(const char *from, char *to, int size) {
  while (--size > 0) {
    if ((*to++ = *from++) == '\0')
      return;
  }
  *to = '\0';
}


x86 assembly (clang, -O0):
<scopyn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
jle    1159 <scopyn+0x59>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
jne    1154 <scopyn+0x54>
jmp    1160 <scopyn+0x60>
jmp    110f <scopyn+0xf>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scopyn>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    $0x2,%edx
jl     1128 <scopyn+0x28>
add    $0xffffffff,%edx
movzbl (%rdi,%rax,1),%ecx
mov    %cl,(%rsi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <scopyn+0x10>
ret
movb   $0x0,(%rsi,%rax,1)
ret

LLVM IR (-O0):
define void @scopyn(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
br label %7
7: ; preds = %20, %3
%8 = load i32, i32* %6
%9 = add nsw i32 %8, -1
store i32 %9, i32* %6
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
store i8 %14, i8* %15
%17 = sext i8 %14 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %11
br label %23
20: ; preds = %11
br label %7
21: ; preds = %7
%22 = load i8*, i8** %5
store i8 0, i8* %22
br label %23
23: ; preds = %21, %19
ret void
}

LLVM IR (-O2):
define void @scopyn(i8* nocapture %0, i8* nocapture writeonly %1, i32 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i8* [ %0, %3 ], [ %11, %9 ]
%6 = phi i8* [ %1, %3 ], [ %13, %9 ]
%7 = phi i32 [ %2, %3 ], [ %10, %9 ]
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = add nsw i32 %7, -1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = load i8, i8* %5
%13 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %12, i8* %6
%14 = icmp eq i8 %12, 0
br i1 %14, label %16, label %4
15: ; preds = %4
store i8 0, i8* %6
br label %16
16: ; preds = %9, %15
ret void
}
int os_puts(const char *str) { return -1; }


x86 assembly (clang, -O0):
<os_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_puts>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @os_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @os_puts(i8* nocapture readnone %0) {
ret i32 -1
}
float cubicEaseInOutf(float p) {
  if (p < 0.5) {
    return 4 * p * p * p;
  } else {
    float f = ((2 * p) - 2);
    return 0.5 * f * f * f + 1;
  }
}


x86 assembly (clang, -O0):
<cubicEaseInOutf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1145 <cubicEaseInOutf+0x45>
movss  0xee8(%rip),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11a3 <cubicEaseInOutf+0xa3>
movss  -0x8(%rbp),%xmm0
addss  %xmm0,%xmm0
movss  0xeba(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xe90(%rip),%xmm0
mulsd  %xmm1,%xmm0
movss  -0xc(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  %xmm1,%xmm0
movss  -0xc(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe72(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cubicEaseInOutf>:
movss  0xef8(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    1125 <cubicEaseInOutf+0x25>
movss  0xef3(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret
addss  %xmm0,%xmm0
addss  0xed3(%rip),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed3(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
addsd  0xec7(%rip),%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @cubicEaseInOutf(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
store float %0, float* %3
%5 = load float, float* %3
%6 = fpext float %5 to double
%7 = fcmp olt double %6, 5.000000e-01
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load float, float* %3
%10 = fmul float 4.000000e+00, %9
%11 = load float, float* %3
%12 = fmul float %10, %11
%13 = load float, float* %3
%14 = fmul float %12, %13
store float %14, float* %2
br label %28
15: ; preds = %1
%16 = load float, float* %3
%17 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %16, float -2.000000e+00)
store float %17, float* %4
%18 = load float, float* %4
%19 = fpext float %18 to double
%20 = fmul double 5.000000e-01, %19
%21 = load float, float* %4
%22 = fpext float %21 to double
%23 = fmul double %20, %22
%24 = load float, float* %4
%25 = fpext float %24 to double
%26 = call double @llvm.fmuladd.f64(double %23, double %25, double 1.000000e+00)
%27 = fptrunc double %26 to float
store float %27, float* %2
br label %28
28: ; preds = %15, %8
%29 = load float, float* %2
ret float %29
}

LLVM IR (-O2):
define float @cubicEaseInOutf(float %0) {
%2 = fcmp olt float %0, 5.000000e-01
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = fmul float %0, 4.000000e+00
%5 = fmul float %4, %0
%6 = fmul float %5, %0
br label %14
7: ; preds = %1
%8 = tail call float @llvm.fmuladd.f32(float %0, float 2.000000e+00, float -2.000000e+00)
%9 = fpext float %8 to double
%10 = fmul double %9, 5.000000e-01
%11 = fmul double %10, %9
%12 = tail call double @llvm.fmuladd.f64(double %11, double %9, double 1.000000e+00)
%13 = fptrunc double %12 to float
br label %14
14: ; preds = %7, %3
%15 = phi float [ %6, %3 ], [ %13, %7 ]
ret float %15
}
/* Variables and functions */
bool isEmpty(char *str) { return *str == '\0'; }


x86 assembly (clang, -O0):
<isEmpty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEmpty>:
xor    %eax,%eax
cmpb   $0x0,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @isEmpty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @isEmpty(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void Rename_CheckIntegrity(int *_rep, int _print_flag) { *_rep = 0; }


x86 assembly (clang, -O0):
<Rename_CheckIntegrity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rename_CheckIntegrity>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @Rename_CheckIntegrity(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
store i32 0, i32* %5
ret void
}

LLVM IR (-O2):
define void @Rename_CheckIntegrity(i32* nocapture writeonly %0, i32 %1) {
store i32 0, i32* %0
ret void
}
int foo(short x) {
  short i, y;
  int sum;
  for (i = 0; i < x; i++)
    y = x * i;
  for (i = x; i > 0; i--)
    sum += y;
  return sum;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movw   $0x0,-0x4(%rbp)
movswl -0x4(%rbp),%eax
movswl -0x2(%rbp),%ecx
cmp    %ecx,%eax
jge    1141 <foo+0x41>
movswl -0x2(%rbp),%eax
movswl -0x4(%rbp),%ecx
imul   %ecx,%eax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x4(%rbp)
jmp    1111 <foo+0x11>
mov    -0x2(%rbp),%ax
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%eax
cmp    $0x0,%eax
jle    1171 <foo+0x71>
movswl -0x6(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%ax
add    $0xffff,%ax
mov    %ax,-0x4(%rbp)
jmp    1149 <foo+0x49>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define i32 @foo(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
%4 = alloca i16
%5 = alloca i32
store i16 %0, i16* %2
store i16 0, i16* %3
br label %6
6: ; preds = %19, %1
%7 = load i16, i16* %3
%8 = sext i16 %7 to i32
%9 = load i16, i16* %2
%10 = sext i16 %9 to i32
%11 = icmp slt i32 %8, %10
br i1 %11, label %12, label %22
12: ; preds = %6
%13 = load i16, i16* %2
%14 = sext i16 %13 to i32
%15 = load i16, i16* %3
%16 = sext i16 %15 to i32
%17 = mul nsw i32 %14, %16
%18 = trunc i32 %17 to i16
store i16 %18, i16* %4
br label %19
19: ; preds = %12
%20 = load i16, i16* %3
%21 = add i16 %20, 1
store i16 %21, i16* %3
br label %6
22: ; preds = %6
%23 = load i16, i16* %2
store i16 %23, i16* %3
br label %24
24: ; preds = %33, %22
%25 = load i16, i16* %3
%26 = sext i16 %25 to i32
%27 = icmp sgt i32 %26, 0
br i1 %27, label %28, label %36
28: ; preds = %24
%29 = load i16, i16* %4
%30 = sext i16 %29 to i32
%31 = load i32, i32* %5
%32 = add nsw i32 %31, %30
store i32 %32, i32* %5
br label %33
33: ; preds = %28
%34 = load i16, i16* %3
%35 = add i16 %34, -1
store i16 %35, i16* %3
br label %24
36: ; preds = %24
%37 = load i32, i32* %5
ret i32 %37
}

LLVM IR (-O2):
define i32 @foo(i16 signext %0) {
ret i32 undef
}
/* Variables and functions */
int f270(int *);
int f271(int *p) { return f270(p); }


x86 assembly (clang, -O0):
<f271>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f270@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f271>:
jmp    1030 <f270@plt>

LLVM IR (-O0):
define i32 @f271(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f270(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f271(i32* %0) {
%2 = tail call i32 @f270(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void gestionnaire(int numero) { exit(0); }


x86 assembly (clang, -O0):
<gestionnaire>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<gestionnaire>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @gestionnaire(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @gestionnaire(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fork();
int /*<<< orphan*/ printf(char *);
int main() {
  int i;
  for (i = 0; i < 2; i++) {
    fork();
    printf("-");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1161 <main+0x41>
mov    $0x0,%al
call   1040 <fork@plt>
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <fork@plt>
mov    $0x2d,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <fork@plt>
mov    $0x2d,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"-\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 2
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = call i32 (...) @fork()
%8 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fork()
%2 = tail call i32 @putchar(i32 45)
%3 = tail call i32 (...) @fork()
%4 = tail call i32 @putchar(i32 45)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int /*<<< orphan*/);
void my_yield() { usleep(0); }


x86 assembly (clang, -O0):
<my_yield>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <usleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_yield>:
xor    %edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @my_yield() {
%1 = call i32 @usleep(i32 0)
ret void
}

LLVM IR (-O2):
define void @my_yield() {
%1 = tail call i32 @usleep(i32 0)
ret void
}
int hcf(int a, int b) {
  if (b != 0)
    return hcf(b, a % b);
  else
    return a;
}


x86 assembly (clang, -O0):
<hcf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1141 <hcf+0x31>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <hcf@plt>
mov    %eax,-0x4(%rbp)
jmp    1147 <hcf+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hcf>:
mov    %edi,%eax
test   %esi,%esi
je     111d <hcf+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <hcf+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hcf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = srem i32 %10, %11
%13 = call i32 @hcf(i32 %9, i32 %12)
store i32 %13, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %4
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @hcf(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
size_t MB_CUR_MAX;
size_t _mb_cur_max_l(locale_t loc) { return MB_CUR_MAX; }


x86 assembly (clang, -O0):
<_mb_cur_max_l>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2eea(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mb_cur_max_l>:
mov    0x2ef1(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@MB_CUR_MAX = global i64 0
define i64 @_mb_cur_max_l(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i64, i64* @MB_CUR_MAX
ret i64 %3
}

LLVM IR (-O2):
@MB_CUR_MAX = global i64 0
define i64 @_mb_cur_max_l(i32 %0) {
%2 = load i64, i64* @MB_CUR_MAX
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ alarm(int);
int /*<<< orphan*/ write(int, char *, int);
void alrm_handler(int s) {
  alarm(1);
  write(1, "0", 1);
}


x86 assembly (clang, -O0):
<alrm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <alarm@plt>
mov    $0x1,%edx
lea    0xebf(%rip),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alrm_handler>:
push   %rax
mov    $0x1,%edi
call   1040 <alarm@plt>
lea    0xece(%rip),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
pop    %rax
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"0\00"
define void @alrm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @alarm(i32 1)
%4 = call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"0\00"
define void @alrm_handler(i32 %0) {
%2 = tail call i32 @alarm(i32 1)
%3 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
void DMTimerDisable(unsigned int baseAdd) {
  (*((volatile unsigned int *)(baseAdd + (0x38)))) &= ~(0x00000001u);
}


x86 assembly (clang, -O0):
<DMTimerDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x38,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerDisable>:
add    $0x38,%edi
andl   $0xfffffffe,(%rdi)
ret

LLVM IR (-O0):
define void @DMTimerDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 56
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -2
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @DMTimerDisable(i32 %0) {
%2 = add i32 %0, 56
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -2
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("All OK\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"All OK\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [7 x i8] c"All OK\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cblas_daxpy(int const, double const, double const *,
                               int const, double *, int const);
void c_daxpy(const int N, const double alpha, const double *X,
             const int strideX, double *Y, const int strideY) {
  cblas_daxpy(N, alpha, X, strideX, Y, strideY);
}


x86 assembly (clang, -O0):
<c_daxpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8d,-0x2c(%rbp)
mov    -0x4(%rbp),%edi
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    -0x28(%rbp),%rcx
mov    -0x2c(%rbp),%r8d
call   1030 <cblas_daxpy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_daxpy>:
jmp    1030 <cblas_daxpy@plt>

LLVM IR (-O0):
define void @c_daxpy(i32 %0, double %1, double* %2, i32 %3, double* %4, i32 %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double*
%10 = alloca i32
%11 = alloca double*
%12 = alloca i32
store i32 %0, i32* %7
store double %1, double* %8
store double* %2, double** %9
store i32 %3, i32* %10
store double* %4, double** %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load double, double* %8
%15 = load double*, double** %9
%16 = load i32, i32* %10
%17 = load double*, double** %11
%18 = load i32, i32* %12
%19 = call i32 @cblas_daxpy(i32 %13, double %14, double* %15, i32 %16, double* %17, i32 %18)
ret void
}

LLVM IR (-O2):
define void @c_daxpy(i32 %0, double %1, double* %2, i32 %3, double* %4, i32 %5) {
%7 = tail call i32 @cblas_daxpy(i32 %0, double %1, double* %2, i32 %3, double* %4, i32 %5)
ret void
}