xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ AboutDlgProc();
void GPUabout(void) {
  AboutDlgProc();
  return;
}


x86 assembly (clang, -O0):
<GPUabout>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AboutDlgProc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPUabout>:
xor    %eax,%eax
jmp    1030 <AboutDlgProc@plt>

LLVM IR (-O0):
define void @GPUabout() {
%1 = call i32 (...) @AboutDlgProc()
ret void
}

LLVM IR (-O2):
define void @GPUabout() {
%1 = tail call i32 (...) @AboutDlgProc()
ret void
}
long long zzzu() { return 0x0000000000007fffLL; }


x86 assembly (clang, -O0):
<zzzu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7fff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zzzu>:
mov    $0x7fff,%eax
ret

LLVM IR (-O0):
define i64 @zzzu() {
ret i64 32767
}

LLVM IR (-O2):
define i64 @zzzu() {
ret i64 32767
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_short_xor_to_all(short *target, short *source, int nreduce,
                                   int PE_start, int logPE_stride, int PE_size,
                                   short *pWrk, long *pSync) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_short_xor_to_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_short_xor_to_all>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_short_xor_to_all(i16* %0, i16* %1, i32 %2, i32 %3, i32 %4, i32 %5, i16* %6, i64* %7) {
%9 = alloca i16*
%10 = alloca i16*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i16*
%16 = alloca i64*
store i16* %0, i16** %9
store i16* %1, i16** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i16* %6, i16** %15
store i64* %7, i64** %16
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_short_xor_to_all(i16* nocapture readnone %0, i16* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i32 %5, i16* nocapture readnone %6, i64* nocapture readnone %7) {
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
void malloc_init() {
  int i = 0;
  int startmem = 0xC0000000;
  while (startmem < 0xFFFFFFFF) {
    if (startmem) {
      i++;
    }
    startmem++;
  }
}


x86 assembly (clang, -O0):
<malloc_init>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xc0000000,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jae    113d <malloc_init+0x3d>
cmpl   $0x0,-0x8(%rbp)
je     112f <malloc_init+0x2f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <malloc_init+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_init>:
ret

LLVM IR (-O0):
define void @malloc_init() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -1073741824, i32* %2
br label %3
3: ; preds = %12, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, -1
br i1 %5, label %6, label %15
6: ; preds = %3
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
br label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %3
15: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @malloc_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
float fmodf(float, float);
float _canonicalise_longitude(float lon) {
  lon = fmodf(lon, 360.f);
  if (lon < 0.f)
    lon += 360.f;
  assert((lon >= 0.f) && (lon < 360.f));
  return lon;
}


x86 assembly (clang, -O0):
<_canonicalise_longitude>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xec6(%rip),%xmm1
call   1030 <fmodf@plt>
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1163 <_canonicalise_longitude+0x43>
movss  0xea7(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xor    %eax,%eax
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
mov    %al,-0x5(%rbp)
jb     118b <_canonicalise_longitude+0x6b>
movss  0xe7f(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
seta   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_canonicalise_longitude>:
sub    $0x18,%rsp
movss  0xed4(%rip),%xmm1
call   1030 <fmodf@plt>
movaps %xmm0,%xmm1
movss  0xec4(%rip),%xmm4
addss  %xmm4,%xmm1
xorps  %xmm2,%xmm2
movaps %xmm0,%xmm3
cmpltss %xmm2,%xmm3
andps  %xmm3,%xmm1
andnps %xmm0,%xmm3
orps   %xmm1,%xmm3
movaps %xmm3,(%rsp)
ucomiss %xmm2,%xmm3
setae  %al
ucomiss %xmm3,%xmm4
seta   %cl
and    %al,%cl
movzbl %cl,%edi
call   1040 <assert@plt>
movaps (%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define float @_canonicalise_longitude(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @fmodf(float %3, float 3.600000e+02)
store float %4, float* %2
%5 = load float, float* %2
%6 = fcmp olt float %5, 0.000000e+00
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load float, float* %2
%9 = fadd float %8, 3.600000e+02
store float %9, float* %2
br label %10
10: ; preds = %7, %1
%11 = load float, float* %2
%12 = fcmp oge float %11, 0.000000e+00
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load float, float* %2
%15 = fcmp olt float %14, 3.600000e+02
br label %16
16: ; preds = %13, %10
%17 = phi i1 [ false, %10 ], [ %15, %13 ]
%18 = zext i1 %17 to i32
%19 = call i32 @assert(i32 %18)
%20 = load float, float* %2
ret float %20
}

LLVM IR (-O2):
define float @_canonicalise_longitude(float %0) {
%2 = tail call float @fmodf(float %0, float 3.600000e+02)
%3 = fcmp olt float %2, 0.000000e+00
%4 = fadd float %2, 3.600000e+02
%5 = select i1 %3, float %4, float %2
%6 = fcmp oge float %5, 0.000000e+00
%7 = fcmp olt float %5, 3.600000e+02
%8 = and i1 %6, %7
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void subtractAndPrint(int x, int y) {
  int z = x - y;
  printf("Simon says, the answer is: %d\n", z);
}


x86 assembly (clang, -O0):
<subtractAndPrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtractAndPrint>:
mov    %edi,%eax
sub    %esi,%eax
lea    0xee5(%rip),%rdi
mov    %eax,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Simon says, the answer is: %d\0A\00"
define void @subtractAndPrint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"Simon says, the answer is: %d\0A\00"
define void @subtractAndPrint(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
void outw(unsigned short a, unsigned short *b) {
  *(volatile unsigned short *const)b = a;
}


x86 assembly (clang, -O0):
<outw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x2(%rbp),%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw>:
mov    %di,(%rsi)
ret

LLVM IR (-O0):
define void @outw(i16 zeroext %0, i16* %1) {
%3 = alloca i16
%4 = alloca i16*
store i16 %0, i16* %3
store i16* %1, i16** %4
%5 = load i16, i16* %3
%6 = load i16*, i16** %4
store volatile i16 %5, i16* %6
ret void
}

LLVM IR (-O2):
define void @outw(i16 zeroext %0, i16* %1) {
store volatile i16 %0, i16* %1
ret void
}
int fz_idiv(int a, int b) { return a < 0 ? (a - b + 1) / b : a / b; }


x86 assembly (clang, -O0):
<fz_idiv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1129 <fz_idiv+0x29>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
add    $0x1,%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
jmp    1133 <fz_idiv+0x33>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fz_idiv>:
mov    %edi,%eax
sub    %esi,%eax
add    $0x1,%eax
test   %edi,%edi
cmovns %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @fz_idiv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 %8, %9
%11 = add nsw i32 %10, 1
%12 = load i32, i32* %4
%13 = sdiv i32 %11, %12
br label %18
14: ; preds = %2
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = sdiv i32 %15, %16
br label %18
18: ; preds = %14, %7
%19 = phi i32 [ %13, %7 ], [ %17, %14 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @fz_idiv(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = add i32 %0, 1
%5 = sub i32 %4, %1
%6 = select i1 %3, i32 %5, i32 %0
%7 = sdiv i32 %6, %1
ret i32 %7
}
void ClearBit(int A[], int k) { A[k / 32] &= ~(1 << (k % 32)); }


x86 assembly (clang, -O0):
<ClearBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearBit>:
mov    %esi,%ecx
mov    $0xfffffffe,%eax
rol    %cl,%eax
lea    0x1f(%rcx),%edx
test   %esi,%esi
cmovns %ecx,%edx
sar    $0x5,%edx
movslq %edx,%rcx
and    %eax,(%rdi,%rcx,4)
ret

LLVM IR (-O0):
define void @ClearBit(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = srem i32 %5, 32
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 32
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %9, i64 %12
%14 = load i32, i32* %13
%15 = and i32 %14, %8
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @ClearBit(i32* nocapture %0, i32 %1) {
%3 = and i32 %1, 31
%4 = shl nuw i32 1, %3
%5 = xor i32 %4, -1
%6 = sdiv i32 %1, 32
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = and i32 %9, %5
store i32 %10, i32* %8
ret void
}
void d2i_CRL_DIST_POINTS(void) {}


x86 assembly (clang, -O0):
<d2i_CRL_DIST_POINTS>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_CRL_DIST_POINTS>:
ret

LLVM IR (-O0):
define void @d2i_CRL_DIST_POINTS() {
ret void
}

LLVM IR (-O2):
define void @d2i_CRL_DIST_POINTS() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CallbackInfoHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void CallbackInfoRequestUpdate() { UAVObjRequestUpdate(CallbackInfoHandle()); }


x86 assembly (clang, -O0):
<CallbackInfoRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CallbackInfoHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CallbackInfoRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <CallbackInfoHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @CallbackInfoRequestUpdate() {
%1 = call i32 (...) @CallbackInfoHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @CallbackInfoRequestUpdate() {
%1 = tail call i32 (...) @CallbackInfoHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
void *t_fun(void *arg) { return NULL; }


x86 assembly (clang, -O0):
<t_fun>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_fun>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @t_fun(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @t_fun(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ vec3f_scalarMult_new(float *, float *, float const);
void vec3f_scalarMult(float v[3], const float scalar) {
  vec3f_scalarMult_new(v, v, scalar);
}


x86 assembly (clang, -O0):
<vec3f_scalarMult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movss  -0xc(%rbp),%xmm0
call   1030 <vec3f_scalarMult_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3f_scalarMult>:
mov    %rdi,%rsi
jmp    1030 <vec3f_scalarMult_new@plt>

LLVM IR (-O0):
define void @vec3f_scalarMult(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
store float* %0, float** %3
store float %1, float* %4
%5 = load float*, float** %3
%6 = load float*, float** %3
%7 = load float, float* %4
%8 = call i32 @vec3f_scalarMult_new(float* %5, float* %6, float %7)
ret void
}

LLVM IR (-O2):
define void @vec3f_scalarMult(float* %0, float %1) {
%3 = tail call i32 @vec3f_scalarMult_new(float* %0, float* %0, float %1)
ret void
}
int GCD(int a, int b) { return b == 0 ? a : GCD(b, a % b); }


x86 assembly (clang, -O0):
<GCD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1133 <GCD+0x23>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1147 <GCD+0x37>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%esi
call   1030 <GCD@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GCD>:
mov    %edi,%eax
test   %esi,%esi
je     111d <GCD+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <GCD+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @GCD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %3
br label %15
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = call i32 @GCD(i32 %10, i32 %13)
br label %15
15: ; preds = %9, %7
%16 = phi i32 [ %8, %7 ], [ %14, %9 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @GCD(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
void f194(void) {
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
a:
  0;
  goto a;
}


x86 assembly (clang, -O0):
<f194>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
jmp    112e <f194+0x2e>

x86 assembly (clang, -O2):
<f194>:
jmp    1100 <f194>

LLVM IR (-O0):
define void @f194() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
%7 = load i32, i32* %1
store i32 0, i32* %2
%8 = load i32, i32* %2
store i32 0, i32* %3
%9 = load i32, i32* %3
store i32 0, i32* %4
%10 = load i32, i32* %4
store i32 0, i32* %5
%11 = load i32, i32* %5
store i32 0, i32* %6
%12 = load i32, i32* %6
br label %13
13: ; preds = %13, %0
br label %13
}

LLVM IR (-O2):
define void @f194() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
size_t div_clock(size_t base_freq_hz, uint32_t M, uint32_t D) {
  if (M >= D)
    return base_freq_hz;
  else
    return (M * base_freq_hz) / D;
}


x86 assembly (clang, -O0):
<div_clock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jb     112b <div_clock+0x2b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1140 <div_clock+0x40>
mov    -0x18(%rbp),%rax
imul   -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x20(%rbp)
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_clock>:
mov    %rdi,%rax
cmp    %rdx,%rsi
jae    1123 <div_clock+0x23>
mov    %rdx,%rcx
imul   %rax,%rsi
mov    %rsi,%rax
or     %rdx,%rax
shr    $0x20,%rax
je     1124 <div_clock+0x24>
mov    %rsi,%rax
xor    %edx,%edx
div    %rcx
ret
mov    %esi,%eax
xor    %edx,%edx
div    %ecx
ret

LLVM IR (-O0):
define i64 @div_clock(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %6
%9 = load i64, i64* %7
%10 = icmp uge i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i64, i64* %5
store i64 %12, i64* %4
br label %19
13: ; preds = %3
%14 = load i64, i64* %6
%15 = load i64, i64* %5
%16 = mul i64 %14, %15
%17 = load i64, i64* %7
%18 = udiv i64 %16, %17
store i64 %18, i64* %4
br label %19
19: ; preds = %13, %11
%20 = load i64, i64* %4
ret i64 %20
}

LLVM IR (-O2):
define i64 @div_clock(i64 %0, i64 %1, i64 %2) {
%4 = icmp ult i64 %1, %2
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = mul i64 %1, %0
%7 = udiv i64 %6, %2
br label %8
8: ; preds = %3, %5
%9 = phi i64 [ %7, %5 ], [ %0, %3 ]
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_56K(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_56K>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_56K>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_56K() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_56K() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
/* Variables and functions */
scalar_t__ numeric(unsigned char const *, int const, int /*<<< orphan*/, int,
                   int, int *, int *, char *);
int n1__6(const unsigned char *data, const int data_len, int *p_err_no,
          int *p_err_posn, char err_msg[50]) {
  return data_len >= 1 && data_len <= 6 &&
         numeric(data, data_len, 0, 1, 6, p_err_no, p_err_posn, err_msg);
}


x86 assembly (clang, -O0):
<n1__6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0xc(%rbp)
mov    %al,-0x29(%rbp)
jl     1181 <n1__6+0x71>
xor    %eax,%eax
cmpl   $0x6,-0xc(%rbp)
mov    %al,-0x29(%rbp)
jg     1181 <n1__6+0x71>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%r9
mov    -0x20(%rbp),%r10
mov    -0x28(%rbp),%rax
xor    %edx,%edx
mov    $0x1,%ecx
mov    $0x6,%r8d
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <numeric@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x29(%rbp)
mov    -0x29(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<n1__6>:
mov    %rcx,%r10
lea    -0x1(%rsi),%ecx
xor    %eax,%eax
cmp    $0x5,%ecx
ja     114d <n1__6+0x3d>
push   %rax
mov    %r8,%r11
mov    %rdx,%r9
xor    %edx,%edx
mov    $0x1,%ecx
mov    $0x6,%r8d
push   %r11
push   %r10
call   1030 <numeric@plt>
add    $0x10,%rsp
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @n1__6(i8* %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i8*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i8* %4, i8** %10
%11 = load i32, i32* %7
%12 = icmp sge i32 %11, 1
br i1 %12, label %13, label %24
13: ; preds = %5
%14 = load i32, i32* %7
%15 = icmp sle i32 %14, 6
br i1 %15, label %16, label %24
16: ; preds = %13
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = load i32*, i32** %8
%20 = load i32*, i32** %9
%21 = load i8*, i8** %10
%22 = call i64 @numeric(i8* %17, i32 %18, i32 0, i32 1, i32 6, i32* %19, i32* %20, i8* %21)
%23 = icmp ne i64 %22, 0
br label %24
24: ; preds = %16, %13, %5
%25 = phi i1 [ false, %13 ], [ false, %5 ], [ %23, %16 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @n1__6(i8* %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = add i32 %1, -1
%7 = icmp ult i32 %6, 6
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @numeric(i8* %0, i32 %1, i32 0, i32 1, i32 6, i32* %2, i32* %3, i8* %4)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ 0, %5 ], [ %11, %8 ]
ret i32 %13
}
void genc_olt_s() {}


x86 assembly (clang, -O0):
<genc_olt_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genc_olt_s>:
ret

LLVM IR (-O0):
define void @genc_olt_s() {
ret void
}

LLVM IR (-O2):
define void @genc_olt_s() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("1\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"1\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [2 x i8] c"1\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ logger(int /*<<< orphan*/, char *, double);
double read_double(char const *);
double read_mysql_double(const char *buf) {
  double d;
  d = read_double(buf);
  logger(0, "DOUBLE %lf\n", d);
  return d;
}


x86 assembly (clang, -O0):
<read_mysql_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <read_double@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xor    %edi,%edi
lea    0xeb8(%rip),%rsi
call   1030 <logger@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_mysql_double>:
push   %rax
call   1040 <read_double@plt>
movsd  %xmm0,(%rsp)
lea    0xece(%rip),%rsi
xor    %edi,%edi
call   1030 <logger@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"DOUBLE %lf\0A\00"
define double @read_mysql_double(i8* %0) {
%2 = alloca i8*
%3 = alloca double
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call double @read_double(i8* %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = call i32 @logger(i32 0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), double %6)
%8 = load double, double* %3
ret double %8
}

LLVM IR (-O2):
@.str = [12 x i8] c"DOUBLE %lf\0A\00"
define double @read_mysql_double(i8* %0) {
%2 = tail call double @read_double(i8* %0)
%3 = tail call i32 @logger(i32 0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), double %2)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ cgclear();
int /*<<< orphan*/ gen(char *);
void cgindb(void) {
  gen("movl\t%eax,%edx");
  cgclear();
  gen("movb\t(%edx),%al");
}


x86 assembly (clang, -O0):
<cgindb>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <gen@plt>
mov    $0x0,%al
call   1040 <cgclear@plt>
lea    0xed1(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgindb>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <gen@plt>
xor    %eax,%eax
call   1040 <cgclear@plt>
lea    0xed4(%rip),%rdi
pop    %rax
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"movl\09%eax,%edx\00"
@.str.1 = [16 x i8] c"movb\09(%edx),%al\00"
define void @cgindb() {
%1 = call i32 @gen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @cgclear()
%3 = call i32 @gen(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"movl\09%eax,%edx\00"
@.str.1 = [16 x i8] c"movb\09(%edx),%al\00"
define void @cgindb() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @cgclear()
%3 = tail call i32 @gen(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void g_cache_insert() {}


x86 assembly (clang, -O0):
<g_cache_insert>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_cache_insert>:
ret

LLVM IR (-O0):
define void @g_cache_insert() {
ret void
}

LLVM IR (-O2):
define void @g_cache_insert() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
scalar_t__ EOF;
int /*<<< orphan*/ or_die(int);
scalar_t__ putc(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void etx_or_die(uint8_t c) { or_die(putc(c, stderr) != EOF); }


x86 assembly (clang, -O0):
<etx_or_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
call   1030 <putc@plt>
mov    0x2ea5(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <or_die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<etx_or_die>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
call   1030 <putc@plt>
mov    0x2eb2(%rip),%rcx
xor    %edi,%edi
cmp    (%rcx),%rax
setne  %dil
pop    %rax
jmp    1040 <or_die@plt>

LLVM IR (-O0):
@stderr = global i32 0
@EOF = global i64 0
define void @etx_or_die(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @stderr
%5 = call i64 @putc(i32 %3, i32 %4)
%6 = load i64, i64* @EOF
%7 = icmp ne i64 %5, %6
%8 = zext i1 %7 to i32
%9 = call i32 @or_die(i32 %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@EOF = global i64 0
define void @etx_or_die(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i64 @putc(i32 %0, i32 %2)
%4 = load i64, i64* @EOF
%5 = icmp ne i64 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @or_die(i32 %6)
ret void
}
/* Variables and functions */
void *common();
void *foo() { return common(); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <common@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
jmp    1030 <common@plt>

LLVM IR (-O0):
define i8* @foo() {
%1 = call i8* (...) @common()
ret i8* %1
}

LLVM IR (-O2):
define i8* @foo() {
%1 = tail call i8* (...) @common()
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_shlex_argv(char *argv[], int argv_len) {
  int i = 0;
  for (; i < argv_len; ++i) {
    free(argv[i]);
    argv[i] = NULL;
  }
}


x86 assembly (clang, -O0):
<free_shlex_argv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1161 <free_shlex_argv+0x51>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_shlex_argv+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_shlex_argv>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    114a <free_shlex_argv+0x3a>
mov    %rdi,%r15
mov    %esi,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,8),%rdi
call   1030 <free@plt>
movq   $0x0,(%r15,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <free_shlex_argv+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @free_shlex_argv(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @free(i8* %15)
%17 = load i8**, i8*** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8*, i8** %17, i64 %19
store i8* null, i8** %20
br label %21
21: ; preds = %10
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @free_shlex_argv(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @free(i8* %9)
store i8* null, i8** %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int strlen(char *);
int length_check(char *input) {
  if (strlen(input) > 17) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<length_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x11,%eax
jle    113a <length_check+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1141 <length_check+0x31>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<length_check>:
push   %rax
call   1030 <strlen@plt>
xor    %ecx,%ecx
cmp    $0x12,%eax
setl   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @length_check(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @strlen(i8* %4)
%6 = icmp sgt i32 %5, 17
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @length_check(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp slt i32 %2, 18
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
scalar_t__ internal_fiat_p224_nonzero(uintptr_t);
void fiat_p224_nonzero(uint64_t *out1, const uint64_t arg1[4]) {
  *out1 = (uint64_t)internal_fiat_p224_nonzero((uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p224_nonzero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <internal_fiat_p224_nonzero@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p224_nonzero>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <internal_fiat_p224_nonzero@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @fiat_p224_nonzero(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = ptrtoint i64* %5 to i64
%7 = call i64 @internal_fiat_p224_nonzero(i64 %6)
%8 = load i64*, i64** %3
store i64 %7, i64* %8
ret void
}

LLVM IR (-O2):
define void @fiat_p224_nonzero(i64* nocapture writeonly %0, i64* %1) {
%3 = ptrtoint i64* %1 to i64
%4 = tail call i64 @internal_fiat_p224_nonzero(i64 %3)
store i64 %4, i64* %0
ret void
}
other_func() {}


x86 assembly (clang, -O0):
<other_func>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<other_func>:
ret

LLVM IR (-O0):
define i32 @other_func() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @other_func() {
ret i32 undef
}
/* Variables and functions */
scalar_t__ strcasecmp(char *, char *);
char *strrchr(char *, char);
int file_is_extension(char *filename, char *extension) {
  char *dot = strrchr(filename, '.');
  if (!dot || dot == filename) {
    return 0;
  }
  return strcasecmp(dot + 1, extension) == 0;
}


x86 assembly (clang, -O0):
<file_is_extension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     115b <file_is_extension+0x3b>
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    1167 <file_is_extension+0x47>
movl   $0x0,-0x4(%rbp)
jmp    1187 <file_is_extension+0x67>
mov    -0x20(%rbp),%rdi
add    $0x1,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcasecmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_is_extension>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x2e,%esi
call   1040 <strrchr@plt>
mov    %rax,%rdi
xor    %eax,%eax
test   %rdi,%rdi
je     115a <file_is_extension+0x3a>
cmp    %rbx,%rdi
je     115a <file_is_extension+0x3a>
add    $0x1,%rdi
mov    %r14,%rsi
call   1030 <strcasecmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @file_is_extension(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = call i8* @strrchr(i8* %7, i8 signext 46)
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %6
%13 = load i8*, i8** %4
%14 = icmp eq i8* %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11, %2
store i32 0, i32* %3
br label %23
16: ; preds = %11
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i64 1
%19 = load i8*, i8** %5
%20 = call i64 @strcasecmp(i8* %18, i8* %19)
%21 = icmp eq i64 %20, 0
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %16, %15
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @file_is_extension(i8* %0, i8* nocapture %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
%4 = icmp eq i8* %3, null
%5 = icmp eq i8* %3, %0
%6 = or i1 %4, %5
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, i8* %3, i64 1
%9 = tail call i64 @strcasecmp(i8* %8, i8* %1)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %2, %7
%13 = phi i32 [ %11, %7 ], [ 0, %2 ]
ret i32 %13
}
unsigned long prep_zero_mask(unsigned long val, unsigned long bits,
                             const struct word_at_a_time *c) {
  return bits;
}


x86 assembly (clang, -O0):
<prep_zero_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prep_zero_mask>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
%struct.word_at_a_time = type opaque
define i64 @prep_zero_mask(i64 %0, i64 %1, %struct.word_at_a_time* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca %struct.word_at_a_time*
store i64 %0, i64* %4
store i64 %1, i64* %5
store %struct.word_at_a_time* %2, %struct.word_at_a_time** %6
%7 = load i64, i64* %5
ret i64 %7
}

LLVM IR (-O2):
%struct.word_at_a_time = type opaque
define i64 @prep_zero_mask(i64 %0, i64 returned %1, %struct.word_at_a_time* nocapture readnone %2) {
ret i64 %1
}
/* Variables and functions */
char *realpath(char *, int /*<<< orphan*/ *);
char *file___NativeString_file_realpath___impl(char *self) {
  return realpath(self, NULL);
}


x86 assembly (clang, -O0):
<file___NativeString_file_realpath___impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <realpath@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file___NativeString_file_realpath___impl>:
xor    %esi,%esi
jmp    1030 <realpath@plt>

LLVM IR (-O0):
define i8* @file___NativeString_file_realpath___impl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @realpath(i8* %3, i32* null)
ret i8* %4
}

LLVM IR (-O2):
define i8* @file___NativeString_file_realpath___impl(i8* nocapture %0) {
%2 = tail call i8* @realpath(i8* %0, i32* null)
ret i8* %2
}
/* Variables and functions */
int fib(int);
int main(void) {
  int a = 10;
  return fib(a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <fib@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%edi
jmp    1030 <fib@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fib(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fib(i32 10)
ret i32 %1
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_number_of_quaddobl_polynomials(int *length) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(382, length, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_number_of_quaddobl_polynomials>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x17e,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_number_of_quaddobl_polynomials>:
mov    %rdi,%rsi
mov    $0x17e,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @syscon_number_of_quaddobl_polynomials(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc4c(i32 382, i32* %6, i32* %7, double* %8, i32 0)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @syscon_number_of_quaddobl_polynomials(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc4c(i32 382, i32* %0, i32* undef, double* undef, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ f(int, int, int);
int /*<<< orphan*/ g(int);
int /*<<< orphan*/ h(int);
void main() {
  f(1, 2, 3);
  h(1);
  if (1)
    g(1);
  else
    g(1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1040 <f@plt>
mov    $0x1,%edi
call   1030 <h@plt>
mov    $0x1,%edi
call   1050 <g@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1040 <f@plt>
mov    $0x1,%edi
call   1030 <h@plt>
mov    $0x1,%edi
pop    %rax
jmp    1050 <g@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @f(i32 1, i32 2, i32 3)
%2 = call i32 @h(i32 1)
%3 = call i32 @g(i32 1)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @f(i32 1, i32 2, i32 3)
%2 = tail call i32 @h(i32 1)
%3 = tail call i32 @g(i32 1)
ret void
}
/* Type definitions */
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int NSS_STATUS_SUCCESS;
enum nss_status _nss_exfiles_endpwent(void) { return NSS_STATUS_SUCCESS; }


x86 assembly (clang, -O0):
<_nss_exfiles_endpwent>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_exfiles_endpwent>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@NSS_STATUS_SUCCESS = global i32 0
define i32 @_nss_exfiles_endpwent() {
%1 = load i32, i32* @NSS_STATUS_SUCCESS
ret i32 %1
}

LLVM IR (-O2):
@NSS_STATUS_SUCCESS = global i32 0
define i32 @_nss_exfiles_endpwent() {
%1 = load i32, i32* @NSS_STATUS_SUCCESS
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void sagetv_free2(void *p) { free(p); }


x86 assembly (clang, -O0):
<sagetv_free2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sagetv_free2>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @sagetv_free2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @sagetv_free2(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
char const *ERR_getErrorName(size_t);
const char *HUFv05_getErrorName(size_t code) { return ERR_getErrorName(code); }


x86 assembly (clang, -O0):
<HUFv05_getErrorName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ERR_getErrorName@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HUFv05_getErrorName>:
jmp    1030 <ERR_getErrorName@plt>

LLVM IR (-O0):
define i8* @HUFv05_getErrorName(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @ERR_getErrorName(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @HUFv05_getErrorName(i64 %0) {
%2 = tail call i8* @ERR_getErrorName(i64 %0)
ret i8* %2
}
/* Variables and functions */
int rand();
int getNexRandomValue(void) { return rand(); }


x86 assembly (clang, -O0):
<getNexRandomValue>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNexRandomValue>:
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define i32 @getNexRandomValue() {
%1 = call i32 (...) @rand()
ret i32 %1
}

LLVM IR (-O2):
define i32 @getNexRandomValue() {
%1 = tail call i32 (...) @rand()
ret i32 %1
}
/* Variables and functions */
char abs(char);
char internal_abs_b(char value) { return abs(value); }


x86 assembly (clang, -O0):
<internal_abs_b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <abs@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_abs_b>:
mov    %edi,%ecx
sar    $0x7,%cl
lea    (%rdi,%rcx,1),%eax
xor    %cl,%al
ret

LLVM IR (-O0):
define signext i8 @internal_abs_b(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call signext i8 @abs(i8 signext %3)
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @internal_abs_b(i8 signext %0) {
%2 = tail call i8 @llvm.abs.i8(i8 %0, i1 true)
ret i8 %2
}
/* Variables and functions */
double Cp(double);
double k(double);
double rho(double);
double alpha(double T) { return k(T) / (rho(T) * Cp(T)); }


x86 assembly (clang, -O0):
<alpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1050 <k@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <rho@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <Cp@plt>
movsd  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alpha>:
sub    $0x18,%rsp
movsd  %xmm0,(%rsp)
call   1050 <k@plt>
movsd  %xmm0,0x10(%rsp)
movsd  (%rsp),%xmm0
call   1040 <rho@plt>
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
call   1030 <Cp@plt>
mulsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @alpha(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @k(double %3)
%5 = load double, double* %2
%6 = call double @rho(double %5)
%7 = load double, double* %2
%8 = call double @Cp(double %7)
%9 = fmul double %6, %8
%10 = fdiv double %4, %9
ret double %10
}

LLVM IR (-O2):
define double @alpha(double %0) {
%2 = tail call double @k(double %0)
%3 = tail call double @rho(double %0)
%4 = tail call double @Cp(double %0)
%5 = fmul double %3, %4
%6 = fdiv double %2, %5
ret double %6
}
int left_barce(char c) { return '[' == c ? 1 : 0; }


x86 assembly (clang, -O0):
<left_barce>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%esi
mov    $0x5b,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<left_barce>:
xor    %eax,%eax
cmp    $0x5b,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @left_barce(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 91, %4
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
ret i32 %7
}

LLVM IR (-O2):
define i32 @left_barce(i8 signext %0) {
%2 = icmp eq i8 %0, 91
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
float __nv_expf(float);
float expf(float __a) { return __nv_expf(__a); }


x86 assembly (clang, -O0):
<expf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__nv_expf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expf>:
jmp    1030 <__nv_expf@plt>

LLVM IR (-O0):
define float @expf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__nv_expf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @expf(float %0) {
%2 = tail call float @__nv_expf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ FUTEX_WAKE;
int __futex(void volatile *, int /*<<< orphan*/, int, int /*<<< orphan*/ *);
int __futex_wake(volatile void *ftx, int count) {
  return __futex(ftx, FUTEX_WAKE, count, NULL);
}


x86 assembly (clang, -O0):
<__futex_wake>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eae(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <__futex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__futex_wake>:
mov    %esi,%edx
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
xor    %ecx,%ecx
jmp    1030 <__futex@plt>

LLVM IR (-O0):
@FUTEX_WAKE = global i32 0
define i32 @__futex_wake(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @FUTEX_WAKE
%7 = load i32, i32* %4
%8 = call i32 @__futex(i8* %5, i32 %6, i32 %7, i32* null)
ret i32 %8
}

LLVM IR (-O2):
@FUTEX_WAKE = global i32 0
define i32 @__futex_wake(i8* %0, i32 %1) {
%3 = load i32, i32* @FUTEX_WAKE
%4 = tail call i32 @__futex(i8* %0, i32 %3, i32 %1, i32* null)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void disconnect_from_server(int sockfd) { close(sockfd); }


x86 assembly (clang, -O0):
<disconnect_from_server>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disconnect_from_server>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @disconnect_from_server(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @disconnect_from_server(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}