xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ gui_color_init_dogechat();
int /*<<< orphan*/ gui_color_init_pairs_terminal();
int /*<<< orphan*/ gui_color_init_vars();
int /*<<< orphan*/ gui_color_palette_build_aliases();
scalar_t__ has_colors();
int /*<<< orphan*/ start_color();
int /*<<< orphan*/ use_default_colors();
void gui_color_alloc() {
  if (has_colors()) {
    start_color();
    use_default_colors();
  }
  gui_color_init_vars();
  gui_color_init_pairs_terminal();
  gui_color_init_dogechat();
  gui_color_palette_build_aliases();
}


x86 assembly (clang, -O0):
<gui_color_alloc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <has_colors@plt>
cmp    $0x0,%rax
je     1193 <gui_color_alloc+0x23>
mov    $0x0,%al
call   1080 <start_color@plt>
mov    $0x0,%al
call   1040 <use_default_colors@plt>
mov    $0x0,%al
call   1090 <gui_color_init_vars@plt>
mov    $0x0,%al
call   1070 <gui_color_init_pairs_terminal@plt>
mov    $0x0,%al
call   1060 <gui_color_init_dogechat@plt>
mov    $0x0,%al
call   1030 <gui_color_palette_build_aliases@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_color_alloc>:
push   %rax
xor    %eax,%eax
call   1050 <has_colors@plt>
test   %rax,%rax
je     118b <gui_color_alloc+0x1b>
xor    %eax,%eax
call   1080 <start_color@plt>
xor    %eax,%eax
call   1040 <use_default_colors@plt>
xor    %eax,%eax
call   1090 <gui_color_init_vars@plt>
xor    %eax,%eax
call   1070 <gui_color_init_pairs_terminal@plt>
xor    %eax,%eax
call   1060 <gui_color_init_dogechat@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <gui_color_palette_build_aliases@plt>

LLVM IR (-O0):
define void @gui_color_alloc() {
%1 = call i64 (...) @has_colors()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i32 (...) @start_color()
%5 = call i32 (...) @use_default_colors()
br label %6
6: ; preds = %3, %0
%7 = call i32 (...) @gui_color_init_vars()
%8 = call i32 (...) @gui_color_init_pairs_terminal()
%9 = call i32 (...) @gui_color_init_dogechat()
%10 = call i32 (...) @gui_color_palette_build_aliases()
ret void
}

LLVM IR (-O2):
define void @gui_color_alloc() {
%1 = tail call i64 (...) @has_colors()
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32 (...) @start_color()
%5 = tail call i32 (...) @use_default_colors()
br label %6
6: ; preds = %3, %0
%7 = tail call i32 (...) @gui_color_init_vars()
%8 = tail call i32 (...) @gui_color_init_pairs_terminal()
%9 = tail call i32 (...) @gui_color_init_dogechat()
%10 = tail call i32 (...) @gui_color_palette_build_aliases()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ function2(size_t);
__attribute__((no)) void function(size_t size) { function2(size); }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <function2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
jmp    1030 <function2@plt>

LLVM IR (-O0):
define void @function(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @function2(i64 %3)
ret void
}

LLVM IR (-O2):
define void @function(i64 %0) {
%2 = tail call i32 @function2(i64 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ car();
int /*<<< orphan*/ dar();
int /*<<< orphan*/ ear();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("{\n");
  bar();
  car();
  dar();
  ear();
  printf("}\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xe9a(%rip),%rdi
call   1050 <printf@plt>
mov    $0x0,%al
call   1040 <bar@plt>
mov    $0x0,%al
call   1070 <car@plt>
mov    $0x0,%al
call   1060 <dar@plt>
mov    $0x0,%al
call   1030 <ear@plt>
lea    0xe75(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xea8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1050 <bar@plt>
xor    %eax,%eax
call   1070 <car@plt>
xor    %eax,%eax
call   1060 <dar@plt>
xor    %eax,%eax
call   1030 <ear@plt>
lea    0xe82(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"{\0A\00"
@.str.1 = [3 x i8] c"}\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @bar()
%4 = call i32 (...) @car()
%5 = call i32 (...) @dar()
%6 = call i32 (...) @ear()
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [2 x i8] c"{\00"
@str.2 = [2 x i8] c"}\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @bar()
%3 = tail call i32 (...) @car()
%4 = tail call i32 (...) @dar()
%5 = tail call i32 (...) @ear()
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ to_gps(int, int);
void ch_code_slew(int ch, int data) { to_gps((ch << 2) + 0x84, data); }


x86 assembly (clang, -O0):
<ch_code_slew>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x2,%edi
add    $0x84,%edi
mov    -0x8(%rbp),%esi
call   1030 <to_gps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch_code_slew>:
lea    0x84(,%rdi,4),%edi
jmp    1030 <to_gps@plt>

LLVM IR (-O0):
define void @ch_code_slew(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 2
%7 = add nsw i32 %6, 132
%8 = load i32, i32* %4
%9 = call i32 @to_gps(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @ch_code_slew(i32 %0, i32 %1) {
%3 = shl i32 %0, 2
%4 = add nsw i32 %3, 132
%5 = tail call i32 @to_gps(i32 %4, i32 %1)
ret void
}
const char *Stream_Description(void) {
  return "The `Stream` class represents an abstract set of operations that can "
         "be "
         "performed on File-like objects.";
}


x86 assembly (clang, -O0):
<Stream_Description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Stream_Description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [104 x i8] c"The `Stream` class represents an abstract set of operations that can be performed on File-like objects.\00"
define i8* @Stream_Description() {
ret i8* getelementptr inbounds ([104 x i8], [104 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [104 x i8] c"The `Stream` class represents an abstract set of operations that can be performed on File-like objects.\00"
define i8* @Stream_Description() {
ret i8* getelementptr inbounds ([104 x i8], [104 x i8]* @.str, i64 0, i64 0)
}
int c051(void) { return 0; }


x86 assembly (clang, -O0):
<c051>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c051>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c051() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c051() {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t generate_upc_channel_twg870(uint32_t *sn) {
  switch (sn[4] % 3) {
  case 0:
    return 1;
  case 1:
    return 6;
  case 2:
    return 11;
  }
}


x86 assembly (clang, -O0):
<generate_upc_channel_twg870>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq 0x10(%rax),%rcx
mov    %ecx,%eax
imul   $0x55555556,%rcx,%rdx
mov    %rdx,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
je     115d <generate_upc_channel_twg870+0x5d>
jmp    113b <generate_upc_channel_twg870+0x3b>
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
je     1169 <generate_upc_channel_twg870+0x69>
jmp    114c <generate_upc_channel_twg870+0x4c>
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
je     1175 <generate_upc_channel_twg870+0x75>
jmp    117c <generate_upc_channel_twg870+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    117c <generate_upc_channel_twg870+0x7c>
movl   $0x6,-0x4(%rbp)
jmp    117c <generate_upc_channel_twg870+0x7c>
movl   $0xb,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_upc_channel_twg870>:
movslq 0x10(%rdi),%rax
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
lea    (%rcx,%rcx,4),%ecx
add    $0x1,%ecx
cmp    $0x2,%eax
mov    $0xb,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @generate_upc_channel_twg870(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 4
%6 = load i32, i32* %5
%7 = srem i32 %6, 3
switch i32 %7, label %11 [
i32 0, label %8
i32 1, label %9
i32 2, label %10
]
8: ; preds = %1
store i32 1, i32* %2
br label %11
9: ; preds = %1
store i32 6, i32* %2
br label %11
10: ; preds = %1
store i32 11, i32* %2
br label %11
11: ; preds = %8, %9, %10, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @generate_upc_channel_twg870(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = srem i32 %3, 3
%5 = icmp eq i32 %4, 1
%6 = select i1 %5, i32 6, i32 1
%7 = icmp eq i32 %4, 2
%8 = select i1 %7, i32 11, i32 %6
ret i32 %8
}
void test_wreaddir(void) {}


x86 assembly (clang, -O0):
<test_wreaddir>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_wreaddir>:
ret

LLVM IR (-O0):
define void @test_wreaddir() {
ret void
}

LLVM IR (-O2):
define void @test_wreaddir() {
ret void
}
char *StringSkipspace(char *in) {
  while (*in && (*in == ' '))
    in++;
  return (in);
}


x86 assembly (clang, -O0):
<StringSkipspace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     112d <StringSkipspace+0x2d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    113d <StringSkipspace+0x3d>
jmp    114e <StringSkipspace+0x4e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <StringSkipspace+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<StringSkipspace>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x20,0x1(%rax)
lea    0x1(%rax),%rax
je     1110 <StringSkipspace+0x10>
ret

LLVM IR (-O0):
define i8* @StringSkipspace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %15, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 32
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %3
18: ; preds = %13
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @StringSkipspace(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i8* %3
}
void bot_vector_add_2d(const double v1[2], const double v2[2],
                       double result[2]) {
  result[0] = v1[0] + v2[0];
  result[1] = v1[1] + v2[1];
}


x86 assembly (clang, -O0):
<bot_vector_add_2d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bot_vector_add_2d>:
movsd  (%rdi),%xmm0
addsd  (%rsi),%xmm0
movsd  %xmm0,(%rdx)
movsd  0x8(%rdi),%xmm0
addsd  0x8(%rsi),%xmm0
movsd  %xmm0,0x8(%rdx)
ret

LLVM IR (-O0):
define void @bot_vector_add_2d(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double*, double** %5
%11 = getelementptr inbounds double, double* %10, i64 0
%12 = load double, double* %11
%13 = fadd double %9, %12
%14 = load double*, double** %6
%15 = getelementptr inbounds double, double* %14, i64 0
store double %13, double* %15
%16 = load double*, double** %4
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = load double*, double** %5
%20 = getelementptr inbounds double, double* %19, i64 1
%21 = load double, double* %20
%22 = fadd double %18, %21
%23 = load double*, double** %6
%24 = getelementptr inbounds double, double* %23, i64 1
store double %22, double* %24
ret void
}

LLVM IR (-O2):
define void @bot_vector_add_2d(double* nocapture %0, double* nocapture %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
%5 = load double, double* %1
%6 = fadd double %4, %5
store double %6, double* %2
%7 = getelementptr inbounds double, double* %0, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 1
%10 = load double, double* %9
%11 = fadd double %8, %10
%12 = getelementptr inbounds double, double* %2, i64 1
store double %11, double* %12
ret void
}
int __euidaccess(file, type) const char *file;
int type;
{ return __access(file, type | 010); }


x86 assembly (clang, -O0):
<__euidaccess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
or     $0x8,%esi
mov    $0x0,%al
call   1030 <__access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__euidaccess>:
or     $0x8,%esi
xor    %eax,%eax
jmp    1030 <__access@plt>

LLVM IR (-O0):
define i32 @__euidaccess(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = or i32 %6, 8
%8 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @__access to i32 (i8*, i32, ...)*)(i8* %5, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @__euidaccess(i8* %0, i32 %1) {
%3 = or i32 %1, 8
%4 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @__access to i32 (i8*, i32, ...)*)(i8* %0, i32 %3)
ret i32 %4
}
/* Variables and functions */
float quintic_out(float, float, float);
float quintic_f_out(float step, float max_steps, float max_val) {
  return quintic_out(step, max_steps, max_val);
}


x86 assembly (clang, -O0):
<quintic_f_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <quintic_out@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quintic_f_out>:
jmp    1030 <quintic_out@plt>

LLVM IR (-O0):
define float @quintic_f_out(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @quintic_out(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @quintic_f_out(float %0, float %1, float %2) {
%4 = tail call float @quintic_out(float %0, float %1, float %2)
ret float %4
}
int test_case() {
  int a = 3;
  switch (a) {
  case 1:
  case 2:
    return -1;
  case 3:
    return 0;
  default:
    return 1;
  }
}


x86 assembly (clang, -O0):
<test_case>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffff,%eax
sub    $0x2,%eax
jb     1133 <test_case+0x33>
jmp    1122 <test_case+0x22>
mov    -0xc(%rbp),%eax
sub    $0x3,%eax
je     113f <test_case+0x3f>
jmp    114b <test_case+0x4b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1152 <test_case+0x52>
movl   $0x0,-0x4(%rbp)
jmp    1152 <test_case+0x52>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_case>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_case() {
%1 = alloca i32
%2 = alloca i32
store i32 3, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %6 [
i32 1, label %4
i32 2, label %4
i32 3, label %5
]
4: ; preds = %0, %0
store i32 -1, i32* %1
br label %7
5: ; preds = %0
store i32 0, i32* %1
br label %7
6: ; preds = %0
store i32 1, i32* %1
br label %7
7: ; preds = %6, %5, %4
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_case() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void fputc(int fd, char c) { write(fd, &c, 1); }


x86 assembly (clang, -O0):
<fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputc>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @fputc(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = call i32 @write(i32 %5, i8* %4, i32 1)
ret void
}

LLVM IR (-O2):
define void @fputc(i32 %0, i8 signext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i32 @write(i32 %0, i8* %3, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void xxx(void) { printf("DSO\n"); }


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"DSO\0A\00"
define void @xxx() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"DSO\00"
define void @xxx() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct dbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(struct dbuf *);
int /*<<< orphan*/ bresize(struct dbuf *, int /*<<< orphan*/);
void dbuf_clear(struct dbuf *b) {
  assert(b);
  bresize(b, 0);
}


x86 assembly (clang, -O0):
<dbuf_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1040 <bresize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbuf_clear>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %rbx,%rdi
xor    %esi,%esi
pop    %rbx
jmp    1040 <bresize@plt>

LLVM IR (-O0):
%struct.dbuf = type { i32 }
define void @dbuf_clear(%struct.dbuf* %0) {
%2 = alloca %struct.dbuf*
store %struct.dbuf* %0, %struct.dbuf** %2
%3 = load %struct.dbuf*, %struct.dbuf** %2
%4 = call i32 @assert(%struct.dbuf* %3)
%5 = load %struct.dbuf*, %struct.dbuf** %2
%6 = call i32 @bresize(%struct.dbuf* %5, i32 0)
ret void
}

LLVM IR (-O2):
%struct.dbuf = type { i32 }
define void @dbuf_clear(%struct.dbuf* %0) {
%2 = tail call i32 @assert(%struct.dbuf* %0)
%3 = tail call i32 @bresize(%struct.dbuf* %0, i32 0)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t __UASX(uint32_t x, uint32_t y) {
  int32_t r, s;
  r = (((x << 16) >> 16) - ((y) >> 16)) & 0x0000FFFF;
  s = (((x) >> 16) + ((y << 16) >> 16)) & 0x0000FFFF;
  return ((s << 16) | (r));
}


x86 assembly (clang, -O0):
<__UASX>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
sar    $0x10,%eax
mov    -0x8(%rbp),%ecx
sar    $0x10,%ecx
sub    %ecx,%eax
and    $0xffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
mov    -0x8(%rbp),%ecx
shl    $0x10,%ecx
sar    $0x10,%ecx
add    %ecx,%eax
and    $0xffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__UASX>:
mov    %esi,%ecx
shr    $0x10,%ecx
shl    $0x10,%esi
lea    (%rsi,%rdi,1),%eax
mov    %edi,%edx
sub    %ecx,%edx
movzwl %dx,%ecx
and    $0xffff0000,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__UASX(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = shl i32 %7, 16
%9 = ashr i32 %8, 16
%10 = load i32, i32* %4
%11 = ashr i32 %10, 16
%12 = sub nsw i32 %9, %11
%13 = and i32 %12, 65535
store i32 %13, i32* %5
%14 = load i32, i32* %3
%15 = ashr i32 %14, 16
%16 = load i32, i32* %4
%17 = shl i32 %16, 16
%18 = ashr i32 %17, 16
%19 = add nsw i32 %15, %18
%20 = and i32 %19, 65535
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = shl i32 %21, 16
%23 = load i32, i32* %5
%24 = or i32 %22, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @__UASX(i32 %0, i32 %1) {
%3 = lshr i32 %1, 16
%4 = sub i32 %0, %3
%5 = and i32 %4, 65535
%6 = shl i32 %1, 16
%7 = add i32 %6, %0
%8 = and i32 %7, -65536
%9 = or i32 %8, %5
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ triangulo(int);
int main() {
  int fim;
  printf("\nEntre com numero impar:");
  scanf("%d", &fim);
  triangulo(fim);
  triangulo(fim / 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <triangulo@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <triangulo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <triangulo@plt>
mov    0x4(%rsp),%eax
mov    %eax,%edi
shr    $0x1f,%edi
add    %eax,%edi
sar    %edi
call   1040 <triangulo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"\0AEntre com numero impar:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @triangulo(i32 %5)
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 2
%9 = call i32 @triangulo(i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [25 x i8] c"\0AEntre com numero impar:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @triangulo(i32 %5)
%7 = load i32, i32* %1
%8 = sdiv i32 %7, 2
%9 = call i32 @triangulo(i32 %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void main() {
  int i;
  char *new (int);
  char *p, *p1 = p;
  for (i = 0; i <= 5; i++) {
    *p++ = 'c';
  }
  *p = '\0';
  printf("%s", p1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jg     1151 <main+0x41>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x63,(%rax)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <main+0x17>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rsi
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = load i8*, i8** %2
store i8* %4, i8** %3
store i32 0, i32* %1
br label %5
5: ; preds = %11, %0
%6 = load i32, i32* %1
%7 = icmp sle i32 %6, 5
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
store i8 99, i8* %9
br label %11
11: ; preds = %8
%12 = load i32, i32* %1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %1
br label %5
14: ; preds = %5
%15 = load i8*, i8** %2
store i8 0, i8* %15
%16 = load i8*, i8** %3
%17 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %16)
ret void
}

LLVM IR (-O2):
int QRinput_checkModeFNC1Second(int size) {
  if (size != 1)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<QRinput_checkModeFNC1Second>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     111d <QRinput_checkModeFNC1Second+0x1d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1124 <QRinput_checkModeFNC1Second+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QRinput_checkModeFNC1Second>:
xor    %eax,%eax
cmp    $0x1,%edi
setne  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @QRinput_checkModeFNC1Second(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @QRinput_checkModeFNC1Second(i32 %0) {
%2 = icmp ne i32 %0, 1
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void hello_func(char *name) { printf("Hello, %s!", name); }


x86 assembly (clang, -O0):
<hello_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello_func>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Hello, %s!\00"
define void @hello_func(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Hello, %s!\00"
define void @hello_func(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void memcg_free_cache_params(struct kmem_cache *s) {}


x86 assembly (clang, -O0):
<memcg_free_cache_params>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcg_free_cache_params>:
ret

LLVM IR (-O0):
%struct.kmem_cache = type opaque
define void @memcg_free_cache_params(%struct.kmem_cache* %0) {
%2 = alloca %struct.kmem_cache*
store %struct.kmem_cache* %0, %struct.kmem_cache** %2
ret void
}

LLVM IR (-O2):
%struct.kmem_cache = type opaque
define void @memcg_free_cache_params(%struct.kmem_cache* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ f(int, int);
int main() {
  if (f(-1, 1) != 0)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xffffffff,%edi
mov    $0x1,%esi
call   1040 <f@plt>
cmp    $0x0,%rax
je     114f <main+0x2f>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%edi
mov    $0x1,%esi
call   1040 <f@plt>
test   %rax,%rax
jne    1139 <main+0x19>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @f(i32 -1, i32 1)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @f(i32 -1, i32 1)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ pciconfig_read(unsigned char, unsigned char, unsigned int,
                                  int, unsigned long *);
long pci_config_read_byte(unsigned char bus, unsigned char dev, int func,
                          unsigned cmd) {
  unsigned long retval;
  pciconfig_read(bus, dev << 3, cmd, 1, &retval);
  return retval;
}


x86 assembly (clang, -O0):
<pci_config_read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
mov    %ecx,-0xc(%rbp)
mov    -0x1(%rbp),%sil
movzbl -0x2(%rbp),%eax
shl    $0x3,%eax
mov    -0xc(%rbp),%edx
mov    $0x1,%ecx
lea    -0x18(%rbp),%r8
movzbl %sil,%edi
movzbl %al,%esi
call   1030 <pciconfig_read@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_config_read_byte>:
push   %rax
shl    $0x3,%sil
movzbl %sil,%esi
mov    %rsp,%r8
mov    %ecx,%edx
mov    $0x1,%ecx
call   1030 <pciconfig_read@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @pci_config_read_byte(i8 zeroext %0, i8 zeroext %1, i32 %2, i32 %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
store i8 %0, i8* %5
store i8 %1, i8* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i8, i8* %5
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 3
%14 = trunc i32 %13 to i8
%15 = load i32, i32* %8
%16 = call i32 @pciconfig_read(i8 zeroext %10, i8 zeroext %14, i32 %15, i32 1, i64* %9)
%17 = load i64, i64* %9
ret i64 %17
}

LLVM IR (-O2):
define i64 @pci_config_read_byte(i8 zeroext %0, i8 zeroext %1, i32 %2, i32 %3) {
%5 = alloca i64
%6 = bitcast i64* %5 to i8*
%7 = shl i8 %1, 3
%8 = call i32 @pciconfig_read(i8 zeroext %0, i8 zeroext %7, i32 %3, i32 1, i64* %5)
%9 = load i64, i64* %5
ret i64 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
struct cw_LogWriter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vsyslog(int, char const *, int /*<<< orphan*/);
void write(int level, const char *format, va_list args,
           struct cw_LogWriter *w) {
  vsyslog(level, format, args);
}


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <vsyslog@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
jmp    1030 <vsyslog@plt>

LLVM IR (-O0):
%struct.cw_LogWriter = type { i32 }
define void @write(i32 %0, i8* %1, i32 %2, %struct.cw_LogWriter* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca %struct.cw_LogWriter*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store %struct.cw_LogWriter* %3, %struct.cw_LogWriter** %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @vsyslog(i32 %9, i8* %10, i32 %11)
ret void
}

LLVM IR (-O2):
%struct.cw_LogWriter = type { i32 }
define void @write(i32 %0, i8* %1, i32 %2, %struct.cw_LogWriter* nocapture readnone %3) {
%5 = tail call i32 @vsyslog(i32 %0, i8* %1, i32 %2)
ret void
}
void Userdef_OSTM0_Int(void) {}


x86 assembly (clang, -O0):
<Userdef_OSTM0_Int>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Userdef_OSTM0_Int>:
ret

LLVM IR (-O0):
define void @Userdef_OSTM0_Int() {
ret void
}

LLVM IR (-O2):
define void @Userdef_OSTM0_Int() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int fdatasync(int);
int eio__sync_file_range(int fd, off_t offset, size_t nbytes,
                         unsigned int flags) {
  return fdatasync(fd);
}


x86 assembly (clang, -O0):
<eio__sync_file_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fdatasync@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eio__sync_file_range>:
jmp    1030 <fdatasync@plt>

LLVM IR (-O0):
define i32 @eio__sync_file_range(i32 %0, i32 %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @fdatasync(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @eio__sync_file_range(i32 %0, i32 %1, i64 %2, i32 %3) {
%5 = tail call i32 @fdatasync(i32 %0)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_PUBKEY;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_PUBKEY_it;
void X509_PUBKEY_free(X509_PUBKEY *a) {
  ASN1_item_free((ASN1_VALUE *)a, &X509_PUBKEY_it);
}


x86 assembly (clang, -O0):
<X509_PUBKEY_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_PUBKEY_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@X509_PUBKEY_it = global i32 0
define void @X509_PUBKEY_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @X509_PUBKEY_it)
ret void
}

LLVM IR (-O2):
@X509_PUBKEY_it = global i32 0
define void @X509_PUBKEY_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @X509_PUBKEY_it)
ret void
}
unsigned int platform_guess_bitness(void) { return 32; }


x86 assembly (clang, -O0):
<platform_guess_bitness>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_guess_bitness>:
mov    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @platform_guess_bitness() {
ret i32 32
}

LLVM IR (-O2):
define i32 @platform_guess_bitness() {
ret i32 32
}
void unhandledException(void *e) {}


x86 assembly (clang, -O0):
<unhandledException>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unhandledException>:
ret

LLVM IR (-O0):
define void @unhandledException(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @unhandledException(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i;
  for (i = 10; i > (-20); i--)
    printf("i=%i : mod=%i\n", i, i % 5);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
cmpl   $0xffffffec,-0x8(%rbp)
jle    1158 <main+0x48>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    $0xb,%ebp
lea    0xee0(%rip),%r14
add    $0xffffffff,%ebp
movslq %ebp,%rbx
imul   $0x66666667,%rbx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x21,%rax
add    %ecx,%eax
lea    (%rax,%rax,4),%eax
mov    %ebx,%edx
sub    %eax,%edx
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    $0xffffffed,%ebx
jg     1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [15 x i8] c"i=%i : mod=%i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, -20
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = srem i32 %8, 5
%10 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %9)
br label %11
11: ; preds = %6
%12 = load i32, i32* %2
%13 = add nsw i32 %12, -1
store i32 %13, i32* %2
br label %3
14: ; preds = %3
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
@.str = [15 x i8] c"i=%i : mod=%i\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 10, %0 ], [ %5, %1 ]
%3 = srem i32 %2, 5
%4 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %3)
%5 = add nsw i32 %2, -1
%6 = icmp sgt i32 %2, -19
br i1 %6, label %1, label %7
7: ; preds = %1
ret i32 0
}
unsigned g(unsigned **ptr) { return **ptr; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    (%rdi),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @g(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @g(i32** nocapture %0) {
%2 = load i32*, i32** %0
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void default_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<default_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @default_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @default_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int max_test(long a, long b, long c) {
  int cmp1 = a > b;
  int cmp2 = a > c;
  return cmp1 & cmp2;
}


x86 assembly (clang, -O0):
<max_test>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
and    -0x20(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_test>:
cmp    %rsi,%rdi
setg   %al
cmp    %rdx,%rdi
setg   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @max_test(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = load i64, i64* %4
%10 = load i64, i64* %5
%11 = icmp sgt i64 %9, %10
%12 = zext i1 %11 to i32
store i32 %12, i32* %7
%13 = load i64, i64* %4
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
%16 = zext i1 %15 to i32
store i32 %16, i32* %8
%17 = load i32, i32* %7
%18 = load i32, i32* %8
%19 = and i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @max_test(i64 %0, i64 %1, i64 %2) {
%4 = icmp sgt i64 %0, %1
%5 = icmp sgt i64 %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
unsigned long strhash(const char *x, unsigned char pow) {
  unsigned long i = 0;
  while (*x) {
    i = (i * 39 + *x) % (1UL << pow);
    x++;
  }
  return i;
}


x86 assembly (clang, -O0):
<strhash>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115e <strhash+0x5e>
imul   $0x27,-0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
movsbq (%rcx),%rcx
add    %rcx,%rax
movzbl -0x9(%rbp),%ecx
mov    %ecx,%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
xor    %edx,%edx
div    %rcx
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1116 <strhash+0x16>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strhash>:
mov    (%rdi),%dl
test   %dl,%dl
je     113a <strhash+0x3a>
mov    $0xffffffffffffffff,%r8
mov    %esi,%ecx
shl    %cl,%r8
not    %r8
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
imul   $0x27,%rax,%rcx
movsbq %dl,%rax
add    %rcx,%rax
and    %r8,%rax
movzbl (%rdi),%edx
add    $0x1,%rdi
test   %dl,%dl
jne    1120 <strhash+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strhash(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i64
store i8* %0, i8** %3
store i8 %1, i8* %4
store i64 0, i64* %5
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i64, i64* %5
%12 = mul i64 %11, 39
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i64
%16 = add i64 %12, %15
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = zext i32 %18 to i64
%20 = shl i64 1, %19
%21 = urem i64 %16, %20
store i64 %21, i64* %5
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
br label %6
24: ; preds = %6
%25 = load i64, i64* %5
ret i64 %25
}

LLVM IR (-O2):
define i64 @strhash(i8* nocapture %0, i8 zeroext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %20, label %5
5: ; preds = %2
%6 = zext i8 %1 to i64
%7 = shl nsw i64 -1, %6
%8 = xor i64 %7, -1
br label %9
9: ; preds = %5, %9
%10 = phi i8 [ %3, %5 ], [ %18, %9 ]
%11 = phi i64 [ 0, %5 ], [ %16, %9 ]
%12 = phi i8* [ %0, %5 ], [ %17, %9 ]
%13 = mul i64 %11, 39
%14 = sext i8 %10 to i64
%15 = add i64 %13, %14
%16 = and i64 %15, %8
%17 = getelementptr inbounds i8, i8* %12, i64 1
%18 = load i8, i8* %17
%19 = icmp eq i8 %18, 0
br i1 %19, label %20, label %9
20: ; preds = %9, %2
%21 = phi i64 [ 0, %2 ], [ %16, %9 ]
ret i64 %21
}
/* Variables and functions */
scalar_t__ strlen(char const *);
const char *find_snap_name(const char *buf) {
  do {
    size_t arg_len = strlen(buf);
    buf += arg_len + 1;
  } while (buf[0] == '-');
  const char *snap_name = buf;
  if (strlen(snap_name) == 0) {
    return NULL;
  }
  return snap_name;
}


x86 assembly (clang, -O0):
<find_snap_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
je     111c <find_snap_name+0xc>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x0,%rax
jne    1171 <find_snap_name+0x61>
movq   $0x0,-0x8(%rbp)
jmp    1179 <find_snap_name+0x69>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_snap_name>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
nopw   0x0(%rax,%rax,1)
mov    %r14,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
add    %rax,%r14
add    $0x1,%r14
cmpb   $0x2d,0x1(%rax,%rbx,1)
je     1120 <find_snap_name+0x10>
mov    %r14,%rdi
call   1030 <strlen@plt>
test   %rax,%rax
cmovne %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @find_snap_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
br label %6
6: ; preds = %13, %1
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %4
%9 = load i64, i64* %4
%10 = add i64 %9, 1
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 %10
store i8* %12, i8** %3
br label %13
13: ; preds = %6
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 0
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 45
br i1 %18, label %6, label %19
19: ; preds = %13
%20 = load i8*, i8** %3
store i8* %20, i8** %5
%21 = load i8*, i8** %5
%22 = call i64 @strlen(i8* %21)
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %25
24: ; preds = %19
store i8* null, i8** %2
br label %27
25: ; preds = %19
%26 = load i8*, i8** %5
store i8* %26, i8** %2
br label %27
27: ; preds = %25, %24
%28 = load i8*, i8** %2
ret i8* %28
}

LLVM IR (-O2):
define i8* @find_snap_name(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = tail call i64 @strlen(i8* dereferenceable(1) %3)
%5 = add i64 %4, 1
%6 = getelementptr inbounds i8, i8* %3, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 45
br i1 %8, label %2, label %9
9: ; preds = %2
%10 = tail call i64 @strlen(i8* %6)
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, i8* null, i8* %6
ret i8* %12
}
unsigned short d_getuw(register const unsigned char *ptr) {
  return (((unsigned short)ptr[0] << 8) | ((unsigned short)ptr[1] << 0));
}


x86 assembly (clang, -O0):
<d_getuw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzwl %ax,%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
movzwl %cx,%ecx
shl    $0x0,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_getuw>:
movzwl (%rdi),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @d_getuw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i16
%7 = zext i16 %6 to i32
%8 = shl i32 %7, 8
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i16
%13 = zext i16 %12 to i32
%14 = shl i32 %13, 0
%15 = or i32 %8, %14
%16 = trunc i32 %15 to i16
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @d_getuw(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i16
%4 = shl nuw i16 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i16
%8 = or i16 %4, %7
ret i16 %8
}