int gtwvec(file, dir, wkpre, wrkvec)
char *dir, *wkpre, **wrkvec;
register char *file;
{
  register int nargs, n;
  n = 0;
  while ((nargs = anlwrk(file, wrkvec)) == 0) {
    if (++n > 3 || !iswrk(file, "get", dir, wkpre))
      return 0;
  }
  return nargs;
}


x86 assembly (clang, -O0):
<gtwvec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
movl   $0x0,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    $0x0,%al
call   1040 <anlwrk@plt>
mov    %eax,-0x2c(%rbp)
cmp    $0x0,%eax
jne    11a0 <gtwvec+0x80>
mov    -0x30(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x30(%rbp)
cmp    $0x3,%eax
jg     118f <gtwvec+0x6f>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    0xe81(%rip),%rsi
mov    $0x0,%al
call   1030 <iswrk@plt>
cmp    $0x0,%eax
jne    119b <gtwvec+0x7b>
movl   $0x0,-0x4(%rbp)
jmp    11a6 <gtwvec+0x86>
jmp    113f <gtwvec+0x1f>
mov    -0x2c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtwvec>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r12
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
xor    %r13d,%r13d
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %r12,%rsi
xor    %eax,%eax
call   1040 <anlwrk@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    117a <gtwvec+0x5a>
cmp    $0x2,%r13d
ja     117a <gtwvec+0x5a>
add    $0x1,%r13d
xor    %ebp,%ebp
mov    %rbx,%rdi
lea    0xe97(%rip),%rsi
mov    %r15,%rdx
mov    %r14,%rcx
xor    %eax,%eax
call   1030 <iswrk@plt>
test   %eax,%eax
jne    1140 <gtwvec+0x20>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"get\00"
define i32 @gtwvec(i8* %0, i8* %1, i8* %2, i8** %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8**
%10 = alloca i32
%11 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8** %3, i8*** %9
store i32 0, i32* %11
br label %12
12: ; preds = %28, %4
%13 = load i8*, i8** %6
%14 = load i8**, i8*** %9
%15 = call i32 (i8*, i8**, ...) bitcast (i32 (...)* @anlwrk to i32 (i8*, i8**, ...)*)(i8* %13, i8** %14)
store i32 %15, i32* %10
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %29
17: ; preds = %12
%18 = load i32, i32* %11
%19 = add nsw i32 %18, 1
store i32 %19, i32* %11
%20 = icmp sgt i32 %19, 3
br i1 %20, label %27, label %21
21: ; preds = %17
%22 = load i8*, i8** %6
%23 = load i8*, i8** %7
%24 = load i8*, i8** %8
%25 = call i32 (i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @iswrk to i32 (i8*, i8*, i8*, i8*, ...)*)(i8* %22, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %23, i8* %24)
%26 = icmp ne i32 %25, 0
br i1 %26, label %28, label %27
27: ; preds = %21, %17
store i32 0, i32* %5
br label %31
28: ; preds = %21
br label %12
29: ; preds = %12
%30 = load i32, i32* %10
store i32 %30, i32* %5
br label %31
31: ; preds = %29, %27
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
@.str = [4 x i8] c"get\00"
define i32 @gtwvec(i8* %0, i8* %1, i8* %2, i8** %3) {
br label %5
5: ; preds = %11, %4
%6 = phi i32 [ 0, %4 ], [ %12, %11 ]
%7 = tail call i32 (i8*, i8**, ...) bitcast (i32 (...)* @anlwrk to i32 (i8*, i8**, ...)*)(i8* %0, i8** %3)
%8 = icmp ne i32 %7, 0
%9 = icmp ugt i32 %6, 2
%10 = select i1 %8, i1 true, i1 %9
br i1 %10, label %15, label %11
11: ; preds = %5
%12 = add nuw nsw i32 %6, 1
%13 = tail call i32 (i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @iswrk to i32 (i8*, i8*, i8*, i8*, ...)*)(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2)
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %11
%16 = phi i32 [ %7, %5 ], [ 0, %11 ]
ret i32 %16
}