xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *malloc(size_t const);
int /*<<< orphan*/ printf(char *);
void *hefesto_mloc(const size_t ssize) {
  void *p = malloc(ssize);
  if (p == NULL) {
    printf("hefesto panic: no memory!\n");
    exit(1);
  }
  return p;
}


x86 assembly (clang, -O0):
<hefesto_mloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116a <hefesto_mloc+0x3a>
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hefesto_mloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <hefesto_mloc+0xd>
pop    %rcx
ret
lea    0xebc(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"hefesto panic: no memory!\0A\00"
define i8* @hefesto_mloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@str = [26 x i8] c"hefesto panic: no memory!\00"
define noalias i8* @hefesto_mloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret i8* %2
}
/* Variables and functions */
scalar_t__ fs_loadall(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  if (argc != 2) {
    printf("usage: %s metadata_file\n", argv[0]);
    return 1;
  }
  return (fs_loadall(argv[1]) < 0) ? 1 : 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     115f <main+0x3f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    1180 <main+0x60>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <fs_loadall@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovl  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1135 <main+0x15>
mov    0x8(%rsi),%rdi
call   1040 <fs_loadall@plt>
shr    $0x3f,%rax
pop    %rcx
ret
mov    (%rsi),%rsi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"usage: %s metadata_file\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %11)
store i32 1, i32* %3
br label %21
13: ; preds = %2
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 1
%16 = load i8*, i8** %15
%17 = call i64 @fs_loadall(i8* %16)
%18 = icmp slt i64 %17, 0
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 1, i32 0
store i32 %20, i32* %3
br label %21
21: ; preds = %13, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@.str = [25 x i8] c"usage: %s metadata_file\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %5)
br label %13
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i64 @fs_loadall(i8* %9)
%11 = lshr i64 %10, 63
%12 = trunc i64 %11 to i32
br label %13
13: ; preds = %7, %4
%14 = phi i32 [ 1, %4 ], [ %12, %7 ]
ret i32 %14
}
/* Variables and functions */
double exp(double);
double log(double);
double pow(double x, double y) {
  double p = 0;
  p = y * log(x);
  return exp(p);
}


x86 assembly (clang, -O0):
<pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow>:
push   %rax
movsd  %xmm1,(%rsp)
call   1040 <log@plt>
mulsd  (%rsp),%xmm0
pop    %rax
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
store double 0.000000e+00, double* %5
%6 = load double, double* %4
%7 = load double, double* %3
%8 = call double @log(double %7)
%9 = fmul double %6, %8
store double %9, double* %5
%10 = load double, double* %5
%11 = call double @exp(double %10)
ret double %11
}

LLVM IR (-O2):
define double @pow(double %0, double %1) {
%3 = tail call double @log(double %0)
%4 = fmul double %3, %1
%5 = tail call double @exp(double %4)
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
scalar_t__ isspace(int);
int discard_whitespace_in_stream(FILE *s) {
  int c = (int)' ';
  while (isspace(c)) {
    c = fgetc(s);
  }
  return c;
}


x86 assembly (clang, -O0):
<discard_whitespace_in_stream>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x20,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <isspace@plt>
cmp    $0x0,%rax
je     1156 <discard_whitespace_in_stream+0x36>
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0xc(%rbp)
jmp    1133 <discard_whitespace_in_stream+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<discard_whitespace_in_stream>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x20,%ebp
mov    $0x20,%edi
call   1040 <isspace@plt>
test   %rax,%rax
je     1148 <discard_whitespace_in_stream+0x28>
mov    %rbx,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebp
mov    %eax,%edi
jmp    1130 <discard_whitespace_in_stream+0x10>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @discard_whitespace_in_stream(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 32, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = call i64 @isspace(i32 %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32*, i32** %2
%10 = call i32 @fgetc(i32* %9)
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @discard_whitespace_in_stream(i32* nocapture %0) {
%2 = tail call i64 @isspace(i32 32)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 @fgetc(i32* %0)
%6 = tail call i64 @isspace(i32 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %4
8: ; preds = %4, %1
%9 = phi i32 [ 32, %1 ], [ %5, %4 ]
ret i32 %9
}
long increase_sleep_time(long wait) {
  wait += 10000;
  if (wait > 30000)
    wait = 30000;
  return wait;
}


x86 assembly (clang, -O0):
<increase_sleep_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x2710,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x7530,-0x8(%rbp)
jle    112c <increase_sleep_time+0x2c>
movq   $0x7530,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<increase_sleep_time>:
cmp    $0x4e20,%rdi
mov    $0x4e20,%eax
cmovl  %rdi,%rax
add    $0x2710,%rax
ret

LLVM IR (-O0):
define i64 @increase_sleep_time(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 10000
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = icmp sgt i64 %5, 30000
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 30000, i64* %2
br label %8
8: ; preds = %7, %1
%9 = load i64, i64* %2
ret i64 %9
}

LLVM IR (-O2):
define i64 @increase_sleep_time(i64 %0) {
%2 = icmp slt i64 %0, 20000
%3 = select i1 %2, i64 %0, i64 20000
%4 = add nsw i64 %3, 10000
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void a_fun(void) { printf("it is a\n\r"); }


x86 assembly (clang, -O0):
<a_fun>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_fun>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"it is a\0A\0D\00"
define void @a_fun() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"it is a\0A\0D\00"
define void @a_fun() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g(int, int, int, int);
void f2() { g(3, 4, 5, 6); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
mov    $0x4,%esi
mov    $0x5,%edx
mov    $0x6,%ecx
call   1030 <g@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    $0x3,%edi
mov    $0x4,%esi
mov    $0x5,%edx
mov    $0x6,%ecx
jmp    1030 <g@plt>

LLVM IR (-O0):
define void @f2() {
%1 = call i32 @g(i32 3, i32 4, i32 5, i32 6)
ret void
}

LLVM IR (-O2):
define void @f2() {
%1 = tail call i32 @g(i32 3, i32 4, i32 5, i32 6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ inputVet(int *, int *);
int /*<<< orphan*/ outputVet(int *, int);
int main(void) {
  int dim;
  int vet[100];
  inputVet(vet, &dim);
  outputVet(vet, dim);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1a0,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x1a0(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <inputVet@plt>
lea    -0x1a0(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1040 <outputVet@plt>
xor    %eax,%eax
add    $0x1a0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x1a0,%rsp
lea    0x10(%rsp),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1030 <inputVet@plt>
mov    0xc(%rsp),%esi
mov    %rbx,%rdi
call   1040 <outputVet@plt>
xor    %eax,%eax
add    $0x1a0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [100 x i32]
store i32 0, i32* %1
%4 = getelementptr inbounds [100 x i32], [100 x i32]* %3, i64 0, i64 0
%5 = call i32 @inputVet(i32* %4, i32* %2)
%6 = getelementptr inbounds [100 x i32], [100 x i32]* %3, i64 0, i64 0
%7 = load i32, i32* %2
%8 = call i32 @outputVet(i32* %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i32]
%3 = bitcast i32* %1 to i8*
%4 = bitcast [100 x i32]* %2 to i8*
%5 = getelementptr inbounds [100 x i32], [100 x i32]* %2, i64 0, i64 0
%6 = call i32 @inputVet(i32* %5, i32* %1)
%7 = load i32, i32* %1
%8 = call i32 @outputVet(i32* %5, i32 %7)
ret i32 0
}
/* Variables and functions */
scalar_t__ is_ctl(char const);
char *skip_ctl(const char *s, int sz) {
  while (sz > 0 && is_ctl(*s)) {
    s++;
    sz--;
  }
  return (char *)s;
}


x86 assembly (clang, -O0):
<skip_ctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    1144 <skip_ctl+0x34>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_ctl@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1154 <skip_ctl+0x44>
jmp    116e <skip_ctl+0x5e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <skip_ctl+0xf>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_ctl>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
test   %esi,%esi
jle    1139 <skip_ctl+0x29>
mov    %esi,%ebp
add    $0x1,%ebp
nop
movsbl (%rbx),%edi
call   1030 <is_ctl@plt>
test   %rax,%rax
je     1139 <skip_ctl+0x29>
add    $0x1,%rbx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
jg     1120 <skip_ctl+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @skip_ctl(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %15, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i64 @is_ctl(i8 signext %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %5
%14 = phi i1 [ false, %5 ], [ %12, %8 ]
br i1 %14, label %15, label %20
15: ; preds = %13
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
%18 = load i32, i32* %4
%19 = add nsw i32 %18, -1
store i32 %19, i32* %4
br label %5
20: ; preds = %13
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @skip_ctl(i8* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2, %10
%5 = phi i32 [ %12, %10 ], [ %1, %2 ]
%6 = phi i8* [ %11, %10 ], [ %0, %2 ]
%7 = load i8, i8* %6
%8 = tail call i64 @is_ctl(i8 signext %7)
%9 = icmp eq i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = add nsw i32 %5, -1
%13 = icmp sgt i32 %5, 1
br i1 %13, label %4, label %14
14: ; preds = %4, %10, %2
%15 = phi i8* [ %0, %2 ], [ %11, %10 ], [ %6, %4 ]
ret i8* %15
}
/* Variables and functions */
int getBps(int, int, int);
int stepSizetoSec(int);
int getStepLength(int SR, int stepSize, int bitLength, int numberOfChannels) {
  int kbps = getBps(SR, bitLength, numberOfChannels);
  int stepSizeinS = stepSizetoSec(stepSize);
  return kbps / stepSizeinS;
}


x86 assembly (clang, -O0):
<getStepLength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <getBps@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <stepSizetoSec@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cltd
idivl  -0x18(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getStepLength>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edx,%esi
mov    %ecx,%edx
call   1040 <getBps@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <stepSizetoSec@plt>
mov    %eax,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getStepLength(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* %5
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @getBps(i32 %11, i32 %12, i32 %13)
store i32 %14, i32* %9
%15 = load i32, i32* %6
%16 = call i32 @stepSizetoSec(i32 %15)
store i32 %16, i32* %10
%17 = load i32, i32* %9
%18 = load i32, i32* %10
%19 = sdiv i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @getStepLength(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @getBps(i32 %0, i32 %2, i32 %3)
%6 = tail call i32 @stepSizetoSec(i32 %1)
%7 = sdiv i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Inst_Printf(char *, char *, char *);
void Call_C_Invoke(char *fct_name, int fc, int nb_args, int nb_args_in_words) {
  Inst_Printf("bl",
              "_"
              "%s",
              fct_name);
}


x86 assembly (clang, -O0):
<Call_C_Invoke>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rdi
lea    0xecc(%rip),%rsi
call   1030 <Inst_Printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Call_C_Invoke>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee2(%rip),%rsi
jmp    1030 <Inst_Printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"bl\00"
@.str.1 = [4 x i8] c"_%s\00"
define void @Call_C_Invoke(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = call i32 @Inst_Printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"bl\00"
@.str.1 = [4 x i8] c"_%s\00"
define void @Call_C_Invoke(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @Inst_Printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
void stopsleep_handler(int signo __attribute__((unused))) { return; }


x86 assembly (clang, -O0):
<stopsleep_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stopsleep_handler>:
ret

LLVM IR (-O0):
define void @stopsleep_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @stopsleep_handler(i32 %0) {
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mkdir(char *, int);
int stat(char *, struct stat *);
void init_generator(char *path) {
  struct stat st;
  if (stat(path, &st) == -1) {
    mkdir(path, 0755);
  }
}


x86 assembly (clang, -O0):
<init_generator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <stat@plt>
cmp    $0xffffffff,%eax
jne    1150 <init_generator+0x30>
mov    -0x8(%rbp),%rdi
mov    $0x1ed,%esi
call   1030 <mkdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_generator>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rsi
call   1040 <stat@plt>
cmp    $0xffffffff,%eax
je     113d <init_generator+0x1d>
add    $0x10,%rsp
pop    %rbx
ret
mov    %rbx,%rdi
mov    $0x1ed,%esi
add    $0x10,%rsp
pop    %rbx
jmp    1030 <mkdir@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define void @init_generator(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @stat(i8* %4, %struct.stat* %3)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @mkdir(i8* %8, i32 493)
br label %10
10: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define void @init_generator(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @mkdir(i8* %0, i32 493)
br label %8
8: ; preds = %6, %1
ret void
}
int test_imm_1Cint64_lowword_mem(long long *val) {
  return ((*val) & (0x1C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Cint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x1c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Cint64_lowword_mem>:
testb  $0x1c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Cint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 28
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Cint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 28
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
unsigned long __copy_from_user_inatomic(void *, void const *, unsigned long);
__attribute__((always_)) unsigned long
__copy_from_user(void *to, const void *from, unsigned long n) {
  do {
    do {
    } while (0);
  } while (0);
  return __copy_from_user_inatomic(to, from, n);
}


x86 assembly (clang, -O0):
<__copy_from_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
jmp    1129 <__copy_from_user+0x19>
jmp    112e <__copy_from_user+0x1e>
jmp    1133 <__copy_from_user+0x23>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__copy_from_user_inatomic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__copy_from_user>:
jmp    1030 <__copy_from_user_inatomic@plt>

LLVM IR (-O0):
define i64 @__copy_from_user(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %7
7: ; preds = %3
br label %8
8: ; preds = %7
br label %9
9: ; preds = %8
br label %10
10: ; preds = %9
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = load i64, i64* %6
%14 = call i64 @__copy_from_user_inatomic(i8* %11, i8* %12, i64 %13)
ret i64 %14
}

LLVM IR (-O2):
define i64 @__copy_from_user(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @__copy_from_user_inatomic(i8* %0, i8* %1, i64 %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0x85() {
  Assert_real((isascii(133) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              670, ("isascii should be 0 for 0x85"));
}


x86 assembly (clang, -O0):
<t_isascii_0x85>:
push   %rbp
mov    %rsp,%rbp
mov    $0x85,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x29e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x85>:
push   %rax
mov    $0x85,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x29e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x85\00"
define void @t_isascii_0x85() {
%1 = call i64 @isascii(i32 133)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 670, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x85\00"
define void @t_isascii_0x85() {
%1 = tail call i64 @isascii(i32 133)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 670, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ writeToFile(char *, char *);
void showRight() {
  writeToFile("/sys/class/gpio/gpio44/value", "1");
  writeToFile("/sys/class/gpio/gpio61/value", "0");
}


x86 assembly (clang, -O0):
<showRight>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xefb(%rip),%rsi
call   1030 <writeToFile@plt>
lea    0xef1(%rip),%rdi
lea    0xf07(%rip),%rsi
call   1030 <writeToFile@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<showRight>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xefe(%rip),%rsi
call   1030 <writeToFile@plt>
lea    0xef4(%rip),%rdi
lea    0xf0a(%rip),%rsi
pop    %rax
jmp    1030 <writeToFile@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"/sys/class/gpio/gpio44/value\00"
@.str.1 = [2 x i8] c"1\00"
@.str.2 = [29 x i8] c"/sys/class/gpio/gpio61/value\00"
@.str.3 = [2 x i8] c"0\00"
define void @showRight() {
%1 = call i32 @writeToFile(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @writeToFile(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"/sys/class/gpio/gpio44/value\00"
@.str.1 = [2 x i8] c"1\00"
@.str.2 = [29 x i8] c"/sys/class/gpio/gpio61/value\00"
@.str.3 = [2 x i8] c"0\00"
define void @showRight() {
%1 = tail call i32 @writeToFile(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @writeToFile(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0))
ret void
}
void pop_stack_to_mainstack() {}


x86 assembly (clang, -O0):
<pop_stack_to_mainstack>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pop_stack_to_mainstack>:
ret

LLVM IR (-O0):
define void @pop_stack_to_mainstack() {
ret void
}

LLVM IR (-O2):
define void @pop_stack_to_mainstack() {
ret void
}
int add_2_numbers(int x, int y) { return x + y; }


x86 assembly (clang, -O0):
<add_2_numbers>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_2_numbers>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @add_2_numbers(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @add_2_numbers(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRRESIZEPALETTE_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 1, torev);
}


x86 assembly (clang, -O0):
<U_WMRRESIZEPALETTE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRRESIZEPALETTE_swap>:
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRRESIZEPALETTE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 1, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRRESIZEPALETTE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 1, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_epi8(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i test_mm_add_epi8(__m128i A, __m128i B) { return _mm_add_epi8(A, B); }


x86 assembly (clang, -O0):
<test_mm_add_epi8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_add_epi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_add_epi8>:
jmp    1030 <_mm_add_epi8@plt>

LLVM IR (-O0):
define i32 @test_mm_add_epi8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_add_epi8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_add_epi8(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_add_epi8(i32 %0, i32 %1)
ret i32 %3
}
void main() {
  while (1)
    *(char *)0x0002000 = *(volatile char *)0x0002010;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <main+0x9>
mov    $0x2010,%eax
mov    (%rax),%cl
mov    $0x2000,%eax
mov    %cl,(%rax)
jmp    1109 <main+0x9>

x86 assembly (clang, -O2):
<main>:
movzbl 0x2010,%eax
mov    %al,0x2000
jmp    1100 <main>

LLVM IR (-O0):
define void @main() {
br label %1
1: ; preds = %0, %1
%2 = load volatile i8, i8* inttoptr (i64 8208 to i8*)
store i8 %2, i8* inttoptr (i64 8192 to i8*)
br label %1
}

LLVM IR (-O2):
define void @main() {
br label %1
1: ; preds = %0, %1
%2 = load volatile i8, i8* inttoptr (i64 8208 to i8*)
store i8 %2, i8* inttoptr (i64 8192 to i8*)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x78() {
  Assert_real((isupper(120) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              605, ("isupper should be 0 for x"));
}


x86 assembly (clang, -O0):
<t_isupper_0x78>:
push   %rbp
mov    %rsp,%rbp
mov    $0x78,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x25d,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x78>:
push   %rax
mov    $0x78,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x25d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for x\00"
define void @t_isupper_0x78() {
%1 = call i64 @isupper(i32 120)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 605, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for x\00"
define void @t_isupper_0x78() {
%1 = tail call i64 @isupper(i32 120)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 605, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ player_get_rings();
float f_collectibles() { return (float)player_get_rings(); }


x86 assembly (clang, -O0):
<f_collectibles>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <player_get_rings@plt>
cvtsi2ss %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_collectibles>:
push   %rax
xor    %eax,%eax
call   1030 <player_get_rings@plt>
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @f_collectibles() {
%1 = call i64 (...) @player_get_rings()
%2 = sitofp i64 %1 to float
ret float %2
}

LLVM IR (-O2):
define float @f_collectibles() {
%1 = tail call i64 (...) @player_get_rings()
%2 = sitofp i64 %1 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
void add_length_indicator(unsigned short li) {
  printf("%c", (unsigned char)((li >> 8) & 0xFF));
  printf("%c", (unsigned char)(li & 0xFF));
}


x86 assembly (clang, -O0):
<add_length_indicator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
lea    0xece(%rip),%rdi
movzbl %al,%esi
call   1030 <printf@plt>
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
lea    0xeb6(%rip),%rdi
movzbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_length_indicator>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
mov    %edi,%esi
shr    $0x8,%esi
lea    0xede(%rip),%r14
mov    %r14,%rdi
call   1030 <printf@plt>
movzbl %bl,%esi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @add_length_indicator(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 8
%6 = and i32 %5, 255
%7 = trunc i32 %6 to i8
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %7)
%9 = load i16, i16* %2
%10 = zext i16 %9 to i32
%11 = and i32 %10, 255
%12 = trunc i32 %11 to i8
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %12)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @add_length_indicator(i16 zeroext %0) {
%2 = lshr i16 %0, 8
%3 = trunc i16 %2 to i8
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
%5 = trunc i16 %0 to i8
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %5)
ret void
}
void isr_debug_mon(void) {
  while (1) {
    asm("nop");
  }
}


x86 assembly (clang, -O0):
<isr_debug_mon>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <isr_debug_mon+0x9>
nop
jmp    1109 <isr_debug_mon+0x9>

x86 assembly (clang, -O2):
<isr_debug_mon>:
nop
jmp    1100 <isr_debug_mon>

LLVM IR (-O0):
define void @isr_debug_mon() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @isr_debug_mon() {
br label %1
1: ; preds = %0, %1
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
int test_long() {
  int i;
  long reds[2] = {0};
#pragma acc parallel loop
  for (i = 0; i < 4096; i++) {
#pragma acc atomic
    reds[0]--;
#pragma acc atomic
    --reds[1];
  }
  for (i = 0; i < 2; i++) {
    if (reds[i] != -(4096)) {
      return i + 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<test_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1030 <memset@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x1000,-0x8(%rbp)
jge    1162 <test_long+0x52>
mov    -0x20(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112f <test_long+0x1f>
movl   $0x0,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    11a7 <test_long+0x97>
movslq -0x8(%rbp),%rax
cmpq   $0xfffffffffffff000,-0x20(%rbp,%rax,8)
ff ff
je     1194 <test_long+0x84>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    11ae <test_long+0x9e>
jmp    1199 <test_long+0x89>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1169 <test_long+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_long>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_long() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [2 x i64]
%4 = bitcast [2 x i64]* %3 to i8*
store i32 0, i32* %2
br label %5
5: ; preds = %15, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 4096
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = getelementptr inbounds [2 x i64], [2 x i64]* %3, i64 0, i64 0
%10 = load i64, i64* %9
%11 = add nsw i64 %10, -1
store i64 %11, i64* %9
%12 = getelementptr inbounds [2 x i64], [2 x i64]* %3, i64 0, i64 1
%13 = load i64, i64* %12
%14 = add nsw i64 %13, -1
store i64 %14, i64* %12
br label %15
15: ; preds = %8
%16 = load i32, i32* %2
%17 = add nsw i32 %16, 1
store i32 %17, i32* %2
br label %5
18: ; preds = %5
store i32 0, i32* %2
br label %19
19: ; preds = %32, %18
%20 = load i32, i32* %2
%21 = icmp slt i32 %20, 2
br i1 %21, label %22, label %35
22: ; preds = %19
%23 = load i32, i32* %2
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds [2 x i64], [2 x i64]* %3, i64 0, i64 %24
%26 = load i64, i64* %25
%27 = icmp ne i64 %26, -4096
br i1 %27, label %28, label %31
28: ; preds = %22
%29 = load i32, i32* %2
%30 = add nsw i32 %29, 1
store i32 %30, i32* %1
br label %36
31: ; preds = %22
br label %32
32: ; preds = %31
%33 = load i32, i32* %2
%34 = add nsw i32 %33, 1
store i32 %34, i32* %2
br label %19
35: ; preds = %19
store i32 0, i32* %1
br label %36
36: ; preds = %35, %28
%37 = load i32, i32* %1
ret i32 %37
}

LLVM IR (-O2):
define i32 @test_long() {
ret i32 0
}
int add(int a, int b) { return a + b + 2; }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    (%rdi,%rsi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = add nsw i32 %7, 2
ret i32 %8
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1) {
%3 = add i32 %0, 2
%4 = add i32 %3, %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ActivateLCDClock();
int main() { ActivateLCDClock(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ActivateLCDClock@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <ActivateLCDClock@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @ActivateLCDClock()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @ActivateLCDClock()
ret i32 0
}
unsigned xrop3_55_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D | T;
  stk1 = S & stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_55_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_55_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_55_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %6
%26 = load i32, i32* %9
%27 = and i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_55_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = xor i32 %4, -1
ret i32 %5
}
char b_ascii_tolower(char c) { return (c >= 'A' && c <= 'Z') ? (c + 32) : c; }


x86 assembly (clang, -O0):
<b_ascii_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1133 <b_ascii_tolower+0x33>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jg     1133 <b_ascii_tolower+0x33>
movsbl -0x1(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    113a <b_ascii_tolower+0x3a>
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_ascii_tolower>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @b_ascii_tolower(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = add nsw i32 %12, 32
br label %17
14: ; preds = %6, %1
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
br label %17
17: ; preds = %14, %10
%18 = phi i32 [ %13, %10 ], [ %16, %14 ]
%19 = trunc i32 %18 to i8
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @b_ascii_tolower(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
int test_imm_2Fint8_mem(signed char *val) {
  return ((*val) & (0x2F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Fint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x2f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Fint8_mem>:
testb  $0x2f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Fint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 47
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Fint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 47
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
scalar_t__ success(int /*<<< orphan*/);
char *ioGetSecureUserDirectory(void) { return (char *)success(0); }


x86 assembly (clang, -O0):
<ioGetSecureUserDirectory>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <success@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioGetSecureUserDirectory>:
xor    %edi,%edi
jmp    1030 <success@plt>

LLVM IR (-O0):
define i8* @ioGetSecureUserDirectory() {
%1 = call i64 @success(i32 0)
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}

LLVM IR (-O2):
define i8* @ioGetSecureUserDirectory() {
%1 = tail call i64 @success(i32 0)
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}
void GPIOPinIntClear(unsigned long ulPort, unsigned char ucPins) {
  ;
  (*((volatile unsigned long *)(ulPort + 0x0000041C))) = ucPins;
}


x86 assembly (clang, -O0):
<GPIOPinIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x41c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinIntClear>:
mov    %esi,%eax
mov    %rax,0x41c(%rdi)
ret

LLVM IR (-O0):
define void @GPIOPinIntClear(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = load i64, i64* %3
%8 = add i64 %7, 1052
%9 = inttoptr i64 %8 to i64*
store volatile i64 %6, i64* %9
ret void
}

LLVM IR (-O2):
define void @GPIOPinIntClear(i64 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i64
%4 = add i64 %0, 1052
%5 = inttoptr i64 %4 to i64*
store volatile i64 %3, i64* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FTM0_DriverIRQHandler();
__attribute__((weak)) void FTM0_IRQHandler(void) { FTM0_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<FTM0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FTM0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FTM0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <FTM0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @FTM0_IRQHandler() {
%1 = call i32 (...) @FTM0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @FTM0_IRQHandler() {
%1 = tail call i32 (...) @FTM0_DriverIRQHandler()
ret void
}
int blk_oversized_queue_5(int *q) {
  if (q[2])
    return q[1] != 0;
  return q[0] == 0;
}


x86 assembly (clang, -O0):
<blk_oversized_queue_5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,0x8(%rax)
je     112e <blk_oversized_queue_5+0x2e>
mov    -0x10(%rbp),%rax
cmpl   $0x0,0x4(%rax)
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <blk_oversized_queue_5+0x40>
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_oversized_queue_5>:
cmpl   $0x0,0x8(%rdi)
je     1111 <blk_oversized_queue_5+0x11>
cmpl   $0x0,0x4(%rdi)
setne  %al
movzbl %al,%eax
ret
cmpl   $0x0,(%rdi)
sete   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @blk_oversized_queue_5(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 2
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i32
store i32 %13, i32* %2
br label %20
14: ; preds = %1
%15 = load i32*, i32** %3
%16 = getelementptr inbounds i32, i32* %15, i64 0
%17 = load i32, i32* %16
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
store i32 %19, i32* %2
br label %20
20: ; preds = %14, %8
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @blk_oversized_queue_5(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = getelementptr inbounds i32, i32* %0, i64 1
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 0
br label %12
9: ; preds = %1
%10 = load i32, i32* %0
%11 = icmp eq i32 %10, 0
br label %12
12: ; preds = %9, %5
%13 = phi i1 [ %8, %5 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
ret i32 %14
}