xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int slow_client(int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  if (argc != 1 + 1)
    return 7;
  return -slow_client(atoi(argv[1]));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     114c <main+0x2c>
movl   $0x7,-0x4(%rbp)
jmp    1169 <main+0x49>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1030 <slow_client@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x7,%eax
cmp    $0x2,%edi
jne    1141 <main+0x21>
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1030 <slow_client@plt>
neg    %eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 7, i32* %3
br label %16
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
%14 = call i32 @slow_client(i32 %13)
%15 = sub nsw i32 0, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %9, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
%8 = tail call i32 @slow_client(i32 %7)
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %2, %4
%11 = phi i32 [ %9, %4 ], [ 7, %2 ]
ret i32 %11
}
void chaz_ConfWriterRuby_add_typedef(const char *type, const char *alias) {
  (void)type;
  (void)alias;
}


x86 assembly (clang, -O0):
<chaz_ConfWriterRuby_add_typedef>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_ConfWriterRuby_add_typedef>:
ret

LLVM IR (-O0):
define void @chaz_ConfWriterRuby_add_typedef(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @chaz_ConfWriterRuby_add_typedef(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char const *, double);
int /*<<< orphan*/ wcsutil_locale_to_dot(char *);
void wcsutil_double2str(char *buf, const char *format, double value) {
  sprintf(buf, format, value);
  wcsutil_locale_to_dot(buf);
}


x86 assembly (clang, -O0):
<wcsutil_double2str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsd  -0x18(%rbp),%xmm0
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
call   1030 <wcsutil_locale_to_dot@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcsutil_double2str>:
push   %rbx
mov    %rdi,%rbx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <wcsutil_locale_to_dot@plt>

LLVM IR (-O0):
define void @wcsutil_double2str(i8* %0, i8* %1, double %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
store double %2, double* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load double, double* %6
%10 = call i32 @sprintf(i8* %7, i8* %8, double %9)
%11 = load i8*, i8** %4
%12 = call i32 @wcsutil_locale_to_dot(i8* %11)
ret void
}

LLVM IR (-O2):
define void @wcsutil_double2str(i8* %0, i8* nocapture %1, double %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1, double %2)
%5 = tail call i32 @wcsutil_locale_to_dot(i8* %0)
ret void
}
int mystery(unsigned int a, unsigned int b) {
  if (1 == b) {
    return a;
  } else {
    return a + mystery(a, b - 1);
  }
}


x86 assembly (clang, -O0):
<mystery>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
cmp    -0xc(%rbp),%eax
jne    1137 <mystery+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1155 <mystery+0x45>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <mystery@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystery>:
lea    -0x1(%rsi),%ecx
imul   %edi,%ecx
xor    %eax,%eax
cmp    $0x1,%esi
cmovne %ecx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mystery(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 1, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %17
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sub i32 %13, 1
%15 = call i32 @mystery(i32 %12, i32 %14)
%16 = add i32 %11, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %10, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @mystery(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 1
%4 = add i32 %1, -1
%5 = mul i32 %4, %0
%6 = select i1 %3, i32 0, i32 %5
%7 = add i32 %6, %0
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ show_floating_point_type_limits();
int /*<<< orphan*/ show_integer_type_limits();
int /*<<< orphan*/ show_library_type_limits();
int main(void) {
  show_library_type_limits();
  show_integer_type_limits();
  show_floating_point_type_limits();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <show_library_type_limits@plt>
mov    $0x0,%al
call   1030 <show_integer_type_limits@plt>
mov    $0x0,%al
call   1040 <show_floating_point_type_limits@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <show_library_type_limits@plt>
xor    %eax,%eax
call   1030 <show_integer_type_limits@plt>
xor    %eax,%eax
call   1040 <show_floating_point_type_limits@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @show_library_type_limits()
%2 = call i32 (...) @show_integer_type_limits()
%3 = call i32 (...) @show_floating_point_type_limits()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @show_library_type_limits()
%2 = tail call i32 (...) @show_integer_type_limits()
%3 = tail call i32 (...) @show_floating_point_type_limits()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ set_pin(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
void io_set_pin_direction(uint8_t pin, uint8_t direction) {
  set_pin(pin, direction, 0x00, 0x01);
}


x86 assembly (clang, -O0):
<io_set_pin_direction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <set_pin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_set_pin_direction>:
xor    %edx,%edx
mov    $0x1,%ecx
jmp    1030 <set_pin@plt>

LLVM IR (-O0):
define void @io_set_pin_direction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @set_pin(i32 %5, i32 %6, i32 0, i32 1)
ret void
}

LLVM IR (-O2):
define void @io_set_pin_direction(i32 %0, i32 %1) {
%3 = tail call i32 @set_pin(i32 %0, i32 %1, i32 0, i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int _wmo_read_any_from_file(int /*<<< orphan*/ *, void *, size_t *,
                            int /*<<< orphan*/, int);
int wmo_read_bufr_from_file(FILE *f, void *buffer, size_t *len) {
  return _wmo_read_any_from_file(f, buffer, len, 0, 1);
}


x86 assembly (clang, -O0):
<wmo_read_bufr_from_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r8d
call   1030 <_wmo_read_any_from_file@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wmo_read_bufr_from_file>:
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <_wmo_read_any_from_file@plt>

LLVM IR (-O0):
define i32 @wmo_read_bufr_from_file(i32* %0, i8* %1, i64* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64*
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64* %2, i64** %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i64*, i64** %6
%10 = call i32 @_wmo_read_any_from_file(i32* %7, i8* %8, i64* %9, i32 0, i32 1)
ret i32 %10
}

LLVM IR (-O2):
define i32 @wmo_read_bufr_from_file(i32* %0, i8* %1, i64* %2) {
%4 = tail call i32 @_wmo_read_any_from_file(i32* %0, i8* %1, i64* %2, i32 0, i32 1)
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int save_under;
};
typedef TYPE_1__ XSetWindowAttributes;

/* Variables and functions */
void set_XSetWindowAttributes_save_under(void *_p, int _v) {
  ((XSetWindowAttributes *)_p)->save_under = (int)_v;
}


x86 assembly (clang, -O0):
<set_XSetWindowAttributes_save_under>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XSetWindowAttributes_save_under>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XSetWindowAttributes_save_under(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XSetWindowAttributes_save_under(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xfa() {
  Assert_real((isxdigit(250) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              1255, ("isxdigit should be 0 for 0xfa"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xfa>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfa,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4e7,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xfa>:
push   %rax
mov    $0xfa,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4e7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xfa\00"
define void @t_isxdigit_0xfa() {
%1 = call i64 @isxdigit(i32 250)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1255, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xfa\00"
define void @t_isxdigit_0xfa() {
%1 = tail call i64 @isxdigit(i32 250)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1255, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int fill_register(int);
int MUX2way(int A, int B, int bit_select) {
  int output;
  bit_select = fill_register(bit_select);
  output = (A & ~bit_select) | (B & bit_select);
  return output;
}


x86 assembly (clang, -O0):
<MUX2way>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <fill_register@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MUX2way>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edx,%edi
call   1030 <fill_register@plt>
xor    %ebp,%ebx
and    %ebx,%eax
xor    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @MUX2way(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @fill_register(i32 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %4
%11 = load i32, i32* %6
%12 = xor i32 %11, -1
%13 = and i32 %10, %12
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
%17 = or i32 %13, %16
store i32 %17, i32* %7
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @MUX2way(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @fill_register(i32 %2)
%5 = xor i32 %4, -1
%6 = and i32 %5, %0
%7 = and i32 %4, %1
%8 = or i32 %6, %7
ret i32 %8
}
int lge_input_set(void *dev) { return 0; }


x86 assembly (clang, -O0):
<lge_input_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lge_input_set>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lge_input_set(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @lge_input_set(i8* nocapture readnone %0) {
ret i32 0
}
int test_imm_2Duint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x2D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Duint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x2d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Duint64_lowword_mem>:
testb  $0x2d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Duint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 45
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Duint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 45
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
long long __kiqnnt(long double);
long long intr_wrap_402(long double p1) { return __kiqnnt(p1); }


x86 assembly (clang, -O0):
<intr_wrap_402>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__kiqnnt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_402>:
jmp    1030 <__kiqnnt@plt>

LLVM IR (-O0):
define i64 @intr_wrap_402(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @__kiqnnt(x86_fp80 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @intr_wrap_402(x86_fp80 %0) {
%2 = tail call i64 @__kiqnnt(x86_fp80 %0)
ret i64 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int _Nios2_Get_ctlreg_config();
int /*<<< orphan*/ _Nios2_Set_ctlreg_config(int);
void _Nios2_MPU_Enable(void) {
  uint32_t config = _Nios2_Get_ctlreg_config();
  _Nios2_Set_ctlreg_config(config | (1 << 0));
}


x86 assembly (clang, -O0):
<_Nios2_MPU_Enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <_Nios2_Get_ctlreg_config@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
or     $0x1,%edi
call   1040 <_Nios2_Set_ctlreg_config@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_MPU_Enable>:
push   %rax
xor    %eax,%eax
call   1030 <_Nios2_Get_ctlreg_config@plt>
or     $0x1,%eax
mov    %eax,%edi
pop    %rax
jmp    1040 <_Nios2_Set_ctlreg_config@plt>

LLVM IR (-O0):
define void @_Nios2_MPU_Enable() {
%1 = alloca i32
%2 = call i32 (...) @_Nios2_Get_ctlreg_config()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = or i32 %3, 1
%5 = call i32 @_Nios2_Set_ctlreg_config(i32 %4)
ret void
}

LLVM IR (-O2):
define void @_Nios2_MPU_Enable() {
%1 = tail call i32 (...) @_Nios2_Get_ctlreg_config()
%2 = or i32 %1, 1
%3 = tail call i32 @_Nios2_Set_ctlreg_config(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __console_tx_string(char *);
void print_notice(char *str) { __console_tx_string(str); }


x86 assembly (clang, -O0):
<print_notice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__console_tx_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_notice>:
jmp    1030 <__console_tx_string@plt>

LLVM IR (-O0):
define void @print_notice(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__console_tx_string(i8* %3)
ret void
}

LLVM IR (-O2):
define void @print_notice(i8* %0) {
%2 = tail call i32 @__console_tx_string(i8* %0)
ret void
}
/* Variables and functions */
int BIT(int);
int wpa_key_mgmt_wpa_ieee8021x(int akm) {
  return !!(akm & (BIT(0) | BIT(5) | BIT(14) | BIT(15) | BIT(7) | BIT(16)));
}


x86 assembly (clang, -O0):
<wpa_key_mgmt_wpa_ieee8021x>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
xor    %edi,%edi
call   1030 <BIT@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x5,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    $0xe,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    $0xf,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    $0x10,%edi
call   1030 <BIT@plt>
mov    -0xc(%rbp),%ecx
mov    %eax,%edx
mov    -0x8(%rbp),%eax
or     %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_key_mgmt_wpa_ieee8021x>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
xor    %edi,%edi
call   1030 <BIT@plt>
mov    %eax,%ebp
mov    $0x5,%edi
call   1030 <BIT@plt>
mov    %eax,%ebx
or     %ebp,%ebx
mov    $0xe,%edi
call   1030 <BIT@plt>
mov    %eax,%r15d
mov    $0xf,%edi
call   1030 <BIT@plt>
mov    %eax,%ebp
or     %r15d,%ebp
or     %ebx,%ebp
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    %eax,%ebx
mov    $0x10,%edi
call   1030 <BIT@plt>
or     %ebx,%eax
or     %ebp,%eax
xor    %ecx,%ecx
test   %r14d,%eax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @wpa_key_mgmt_wpa_ieee8021x(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @BIT(i32 0)
%5 = call i32 @BIT(i32 5)
%6 = or i32 %4, %5
%7 = call i32 @BIT(i32 14)
%8 = or i32 %6, %7
%9 = call i32 @BIT(i32 15)
%10 = or i32 %8, %9
%11 = call i32 @BIT(i32 7)
%12 = or i32 %10, %11
%13 = call i32 @BIT(i32 16)
%14 = or i32 %12, %13
%15 = and i32 %3, %14
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = xor i1 %17, true
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @wpa_key_mgmt_wpa_ieee8021x(i32 %0) {
%2 = tail call i32 @BIT(i32 0)
%3 = tail call i32 @BIT(i32 5)
%4 = or i32 %3, %2
%5 = tail call i32 @BIT(i32 14)
%6 = or i32 %4, %5
%7 = tail call i32 @BIT(i32 15)
%8 = or i32 %6, %7
%9 = tail call i32 @BIT(i32 7)
%10 = or i32 %8, %9
%11 = tail call i32 @BIT(i32 16)
%12 = or i32 %10, %11
%13 = and i32 %12, %0
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
ret i32 %15
}
int main() {
  int i;
  for (i = 0; i < 3; i++)
    continue;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    112f <main+0x2f>
jmp    1121 <main+0x21>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fib(int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int scanf(char *, int *);
int main() {
  int n = 0, res = 0;
  res = scanf("%d", &n);
  printf("%lu", fib(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    0xeac(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <fib@plt>
mov    %eax,%esi
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <fib@plt>
lea    0xea9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%lu\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = call i32 @fib(i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%lu\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @fib(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
char *strrchr(char *, char);
char *get_extension(char *fname) { return strrchr(fname, '.'); }


x86 assembly (clang, -O0):
<get_extension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1030 <strrchr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_extension>:
mov    $0x2e,%esi
jmp    1030 <strrchr@plt>

LLVM IR (-O0):
define i8* @get_extension(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strrchr(i8* %3, i8 signext 46)
ret i8* %4
}

LLVM IR (-O2):
define i8* @get_extension(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
ret i8* %2
}
void SPISSModeConfig(unsigned long ulBase, unsigned long ulSSMode) {

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) &= ~0x00000200;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) |= ulSSMode;
}


x86 assembly (clang, -O0):
<SPISSModeConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffffffdff,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPISSModeConfig>:
andq   $0xfffffffffffffdff,(%rdi)
or     %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @SPISSModeConfig(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 0
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -513
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 0
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @SPISSModeConfig(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, -513
store volatile i64 %5, i64* %3
%6 = load volatile i64, i64* %3
%7 = or i64 %6, %1
store volatile i64 %7, i64* %3
ret void
}
const char *get_pal_version(void) {
  return "gogoCLIENT PAL for "
         "Unknown platform"
         " built on "
         "Mar 15 2022";
}


x86 assembly (clang, -O0):
<get_pal_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pal_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [57 x i8] c"gogoCLIENT PAL for Unknown platform built on Mar 15 2022\00"
define i8* @get_pal_version() {
ret i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [57 x i8] c"gogoCLIENT PAL for Unknown platform built on Mar 15 2022\00"
define i8* @get_pal_version() {
ret i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0)
}
int stringtoint(char *s) {
  int temp;
  temp = (s[2] - '0') + ((s[1] - '0') * 10) + ((s[0] - '0') * 100);
  return temp;
}


x86 assembly (clang, -O0):
<stringtoint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x2(%rax),%eax
sub    $0x30,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x1(%rcx),%ecx
sub    $0x30,%ecx
imul   $0xa,%ecx,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
sub    $0x30,%ecx
imul   $0x64,%ecx,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringtoint>:
movsbl 0x2(%rdi),%eax
movsbl 0x1(%rdi),%ecx
lea    (%rcx,%rcx,4),%ecx
movsbl (%rdi),%edx
imul   $0x64,%edx,%edx
lea    (%rax,%rcx,2),%eax
add    %edx,%eax
add    $0xffffeb30,%eax
ret

LLVM IR (-O0):
define i32 @stringtoint(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = sub nsw i32 %7, 48
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 48
%14 = mul nsw i32 %13, 10
%15 = add nsw i32 %8, %14
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i64 0
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = sub nsw i32 %19, 48
%21 = mul nsw i32 %20, 100
%22 = add nsw i32 %15, %21
store i32 %22, i32* %3
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @stringtoint(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = mul nsw i32 %7, 10
%9 = load i8, i8* %0
%10 = sext i8 %9 to i32
%11 = mul nsw i32 %10, 100
%12 = add nsw i32 %4, -5328
%13 = add nsw i32 %12, %8
%14 = add nsw i32 %13, %11
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ TimerTIxExternalClockConfigure(unsigned long, int, int,
                                                  int /*<<< orphan*/);
void xTimerCounterEnable(unsigned long ulBase, unsigned long ulChannel) {
  ;
  if (ulChannel == 1) {
    TimerTIxExternalClockConfigure(ulBase, 0x00000050, 0x00000000, 0);
  } else {
    TimerTIxExternalClockConfigure(ulBase, 0x00000060, 0x00000000, 0);
  }
}


x86 assembly (clang, -O0):
<xTimerCounterEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jne    1142 <xTimerCounterEnable+0x32>
mov    -0x8(%rbp),%rdi
mov    $0x50,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <TimerTIxExternalClockConfigure@plt>
jmp    1154 <xTimerCounterEnable+0x44>
mov    -0x8(%rbp),%rdi
mov    $0x60,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <TimerTIxExternalClockConfigure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xTimerCounterEnable>:
xor    %eax,%eax
cmp    $0x1,%rsi
setne  %al
shl    $0x4,%eax
add    $0x50,%eax
mov    %eax,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <TimerTIxExternalClockConfigure@plt>

LLVM IR (-O0):
define void @xTimerCounterEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i64, i64* %3
%9 = call i32 @TimerTIxExternalClockConfigure(i64 %8, i32 80, i32 0, i32 0)
br label %13
10: ; preds = %2
%11 = load i64, i64* %3
%12 = call i32 @TimerTIxExternalClockConfigure(i64 %11, i32 96, i32 0, i32 0)
br label %13
13: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
define void @xTimerCounterEnable(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 1
%4 = select i1 %3, i32 80, i32 96
%5 = tail call i32 @TimerTIxExternalClockConfigure(i64 %0, i32 %4, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ computed_jump(int /*<<< orphan*/, int /*<<< orphan*/);
void op_ongoto() { computed_jump(0, 0); }


x86 assembly (clang, -O0):
<op_ongoto>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <computed_jump@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ongoto>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <computed_jump@plt>

LLVM IR (-O0):
define void @op_ongoto() {
%1 = call i32 @computed_jump(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @op_ongoto() {
%1 = tail call i32 @computed_jump(i32 0, i32 0)
ret void
}
unsigned extract_bitfield(unsigned data, unsigned offset, unsigned bitsize) {
  return (data >> offset) & ((1 << bitsize) - 1);
}


x86 assembly (clang, -O0):
<extract_bitfield>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_bitfield>:
mov    %esi,%ecx
shr    %cl,%edi
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @extract_bitfield(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = lshr i32 %7, %8
%10 = load i32, i32* %6
%11 = shl i32 1, %10
%12 = sub nsw i32 %11, 1
%13 = and i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @extract_bitfield(i32 %0, i32 %1, i32 %2) {
%4 = lshr i32 %0, %1
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
ret i32 %7
}
/* Variables and functions */
scalar_t__ floor(double);
double pow(double, int);
int long2tilex(double lon, int z) {
  return (int)(floor((lon + 180.0) / 360.0 * pow(2.0, z)));
}


x86 assembly (clang, -O0):
<long2tilex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  0xed8(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  0xec3(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%edi
movsd  0xea7(%rip),%xmm0
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
call   1040 <floor@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<long2tilex>:
push   %rax
addsd  0xed7(%rip),%xmm0
divsd  0xed7(%rip),%xmm0
movsd  %xmm0,(%rsp)
movsd  0xed2(%rip),%xmm0
call   1030 <pow@plt>
mulsd  (%rsp),%xmm0
pop    %rax
jmp    1040 <floor@plt>

LLVM IR (-O0):
define i32 @long2tilex(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = fadd double %5, 1.800000e+02
%7 = fdiv double %6, 3.600000e+02
%8 = load i32, i32* %4
%9 = call double @pow(double 2.000000e+00, i32 %8)
%10 = fmul double %7, %9
%11 = call i64 @floor(double %10)
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @long2tilex(double %0, i32 %1) {
%3 = fadd double %0, 1.800000e+02
%4 = fdiv double %3, 3.600000e+02
%5 = tail call double @pow(double 2.000000e+00, i32 %1)
%6 = fmul double %4, %5
%7 = tail call i64 @floor(double %6)
%8 = trunc i64 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t si5338_gcd(uint64_t a, uint64_t b) {
  uint64_t t;
  while (b != 0) {
    t = b;
    b = a % t;
    a = t;
  }
  return a;
}


x86 assembly (clang, -O0):
<si5338_gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <si5338_gcd+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110a <si5338_gcd+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<si5338_gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <si5338_gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <si5338_gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @si5338_gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %4
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %5
%13 = srem i32 %11, %12
store i32 %13, i32* %4
%14 = load i32, i32* %5
store i32 %14, i32* %3
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @si5338_gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
int f_blt_rm2(float a1, float *a2) { return !(__builtin_isless(a1, *a2)); }


x86 assembly (clang, -O0):
<f_blt_rm2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm1
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_blt_rm2>:
movss  (%rdi),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setbe  %al
ret

LLVM IR (-O0):
define i32 @f_blt_rm2(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = load float*, float** %4
%7 = load float, float* %6
%8 = fcmp olt float %5, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f_blt_rm2(float %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fcmp ule float %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
void tegra_serial_handle_break(struct uart_port *port) {}


x86 assembly (clang, -O0):
<tegra_serial_handle_break>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_serial_handle_break>:
ret

LLVM IR (-O0):
%struct.uart_port = type opaque
define void @tegra_serial_handle_break(%struct.uart_port* %0) {
%2 = alloca %struct.uart_port*
store %struct.uart_port* %0, %struct.uart_port** %2
ret void
}

LLVM IR (-O2):
%struct.uart_port = type opaque
define void @tegra_serial_handle_break(%struct.uart_port* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ fgets(char *, int, int /*<<< orphan*/ *);
wchar_t *fgetws(wchar_t *s, int n, FILE *stream) {
  return (wchar_t *)fgets((char *)s, n, stream);
}


x86 assembly (clang, -O0):
<fgetws>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <fgets@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetws>:
jmp    1030 <fgets@plt>

LLVM IR (-O0):
define i32* @fgetws(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = bitcast i32* %7 to i8*
%9 = load i32, i32* %5
%10 = load i32*, i32** %6
%11 = call i64 @fgets(i8* %8, i32 %9, i32* %10)
%12 = inttoptr i64 %11 to i32*
ret i32* %12
}

LLVM IR (-O2):
define i32* @fgetws(i32* %0, i32 %1, i32* nocapture %2) {
%4 = bitcast i32* %0 to i8*
%5 = tail call i64 @fgets(i8* %4, i32 %1, i32* %2)
%6 = inttoptr i64 %5 to i32*
ret i32* %6
}
/* Variables and functions */
int /*<<< orphan*/ FlightModeSettingsHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void FlightModeSettingsUpdated() { UAVObjUpdated(FlightModeSettingsHandle()); }


x86 assembly (clang, -O0):
<FlightModeSettingsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FlightModeSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlightModeSettingsUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <FlightModeSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @FlightModeSettingsUpdated() {
%1 = call i32 (...) @FlightModeSettingsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @FlightModeSettingsUpdated() {
%1 = tail call i32 (...) @FlightModeSettingsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ta_set_parent(void *, void *);
void *ta_steal_(void *ta_parent, void *ptr) {
  if (!ta_set_parent(ptr, ta_parent))
    return NULL;
  return ptr;
}


x86 assembly (clang, -O0):
<ta_steal_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ta_set_parent@plt>
cmp    $0x0,%eax
jne    1143 <ta_steal_+0x33>
movq   $0x0,-0x8(%rbp)
jmp    114b <ta_steal_+0x3b>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ta_steal_>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
mov    %rbx,%rdi
call   1030 <ta_set_parent@plt>
xor    %ecx,%ecx
test   %eax,%eax
cmovne %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ta_steal_(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = load i8*, i8** %4
%8 = call i32 @ta_set_parent(i8* %6, i8* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i8* null, i8** %3
br label %13
11: ; preds = %2
%12 = load i8*, i8** %5
store i8* %12, i8** %3
br label %13
13: ; preds = %11, %10
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define i8* @ta_steal_(i8* %0, i8* %1) {
%3 = tail call i32 @ta_set_parent(i8* %1, i8* %0)
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i8* null, i8* %1
ret i8* %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t hweight_next32(uint32_t a) {
  uint32_t c = a & -a;
  uint32_t r = a + c;
  return (((r ^ a) >> 2) / c) | r;
}


x86 assembly (clang, -O0):
<hweight_next32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x4(%rbp),%eax
sar    $0x2,%eax
cltd
idivl  -0x8(%rbp)
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hweight_next32>:
mov    %edi,%eax
mov    %edi,%ecx
neg    %ecx
and    %edi,%ecx
lea    (%rcx,%rax,1),%esi
xor    %esi,%eax
sar    $0x2,%eax
cltd
idiv   %ecx
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @hweight_next32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
%8 = and i32 %5, %7
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %2
%14 = xor i32 %12, %13
%15 = ashr i32 %14, 2
%16 = load i32, i32* %3
%17 = sdiv i32 %15, %16
%18 = load i32, i32* %4
%19 = or i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @hweight_next32(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = and i32 %2, %0
%4 = add nsw i32 %3, %0
%5 = xor i32 %4, %0
%6 = ashr i32 %5, 2
%7 = sdiv i32 %6, %3
%8 = or i32 %7, %4
ret i32 %8
}
int foo1(int n) { return n * 2; }


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @foo1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo1(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
void RTCritSectEnterMultipleDebug(void) {}


x86 assembly (clang, -O0):
<RTCritSectEnterMultipleDebug>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTCritSectEnterMultipleDebug>:
ret

LLVM IR (-O0):
define void @RTCritSectEnterMultipleDebug() {
ret void
}

LLVM IR (-O2):
define void @RTCritSectEnterMultipleDebug() {
ret void
}
int main(void) {
  int var1 = -3;
  int *var2 = &var1;
  var1 += +3;
  --var1;
  ++var1;
  var1 = *var2;
  var1 = ~var1;
  var1 = !var1;
  var1++;
  var1--;
  return var1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xfffffffd,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 -3, i32* %2
store i32* %2, i32** %3
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 3
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = add nsw i32 %6, -1
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = xor i32 %12, -1
store i32 %13, i32* %2
%14 = load i32, i32* %2
%15 = icmp ne i32 %14, 0
%16 = xor i1 %15, true
%17 = zext i1 %16 to i32
store i32 %17, i32* %2
%18 = load i32, i32* %2
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
%20 = load i32, i32* %2
%21 = add nsw i32 %20, -1
store i32 %21, i32* %2
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ quadrado(int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int N = 0;
  while (N < 2) {
    printf("Número maior do que 2: ");
    scanf("%d", &N);
  }
  quadrado(N);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1171 <main+0x41>
lea    0xea9(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb6(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
jmp    1146 <main+0x16>
mov    -0x8(%rbp),%edi
call   1030 <quadrado@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
movl   $0x0,0xc(%rsp)
lea    0xeb8(%rip),%r14
lea    0xeca(%rip),%r15
lea    0xc(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
call   1040 <printf@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
cmp    $0x2,%edi
jl     1160 <main+0x30>
call   1030 <quadrado@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [25 x i8] c"N\C3\BAmero maior do que 2: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 2
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
%11 = call i32 @quadrado(i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [25 x i8] c"N\C3\BAmero maior do que 2: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
br label %3
3: ; preds = %0, %3
%4 = call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 2
br i1 %7, label %3, label %8
8: ; preds = %3
%9 = call i32 @quadrado(i32 %6)
ret i32 0
}
int hcf(int a, int h) {
  int temp;
  while (1) {
    temp = a % h;
    if (temp == 0)
      return h;
    a = h;
    h = temp;
  }
}


x86 assembly (clang, -O0):
<hcf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1123 <hcf+0x23>
mov    -0x8(%rbp),%eax
pop    %rbp
ret
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <hcf+0xa>

x86 assembly (clang, -O2):
<hcf>:
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %edi,%eax
mov    %edx,%edi
cltd
idiv   %edi
test   %edx,%edx
jne    1110 <hcf+0x10>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @hcf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %2, %14
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = srem i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %6
%13 = load i32, i32* %4
ret i32 %13
14: ; preds = %6
%15 = load i32, i32* %4
store i32 %15, i32* %3
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %6
}

LLVM IR (-O2):
define i32 @hcf(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %1, %2 ], [ %6, %3 ]
%5 = phi i32 [ %0, %2 ], [ %4, %3 ]
%6 = srem i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 %4
}