xunge/DecIR huggingface dataset:
int myisalnum(int chr) {
  if ((chr >= '0') && (chr <= '9'))
    return (1);
  if ((chr >= 'a') && (chr <= 'z'))
    return (1);
  if ((chr >= 'A') && (chr <= 'Z'))
    return (1);
  if (chr == '-')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<myisalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     1127 <myisalnum+0x27>
cmpl   $0x39,-0x8(%rbp)
jg     1127 <myisalnum+0x27>
movl   $0x1,-0x4(%rbp)
jmp    1184 <myisalnum+0x84>
cmpl   $0x61,-0x8(%rbp)
jl     1147 <myisalnum+0x47>
cmpl   $0x7a,-0x8(%rbp)
jg     1147 <myisalnum+0x47>
movl   $0x1,-0x4(%rbp)
jmp    1184 <myisalnum+0x84>
cmpl   $0x41,-0x8(%rbp)
jl     1167 <myisalnum+0x67>
cmpl   $0x5a,-0x8(%rbp)
jg     1167 <myisalnum+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1184 <myisalnum+0x84>
cmpl   $0x2d,-0x8(%rbp)
jne    117d <myisalnum+0x7d>
movl   $0x1,-0x4(%rbp)
jmp    1184 <myisalnum+0x84>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myisalnum>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
mov    %edi,%ecx
and    $0xffffffdf,%ecx
add    $0xffffffbf,%ecx
cmp    $0x1a,%ecx
setb   %cl
cmp    $0x2d,%edi
sete   %dl
or     %al,%dl
or     %cl,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @myisalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %29
10: ; preds = %6, %1
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 97
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, i32* %3
%15 = icmp sle i32 %14, 122
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 1, i32* %2
br label %29
17: ; preds = %13, %10
%18 = load i32, i32* %3
%19 = icmp sge i32 %18, 65
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, i32* %3
%22 = icmp sle i32 %21, 90
br i1 %22, label %23, label %24
23: ; preds = %20
store i32 1, i32* %2
br label %29
24: ; preds = %20, %17
%25 = load i32, i32* %3
%26 = icmp eq i32 %25, 45
br i1 %26, label %27, label %28
27: ; preds = %24
store i32 1, i32* %2
br label %29
28: ; preds = %24
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27, %23, %16, %9
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @myisalnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 26
%7 = or i1 %3, %6
%8 = icmp eq i32 %0, 45
%9 = or i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
int test_imm_89int32_mem(int *val) {
  return ((*val) & (0x89 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_89int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x89,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_89int32_mem>:
testb  $0x89,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_89int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 137
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_89int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 137
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ stream_write_record(int, int, void const *, int);
void streamWriteRecord(int streamID, const double *data, int nmiss) {
  stream_write_record(streamID, 1, (const void *)data, nmiss);
}


x86 assembly (clang, -O0):
<streamWriteRecord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1,%esi
call   1030 <stream_write_record@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<streamWriteRecord>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <stream_write_record@plt>

LLVM IR (-O0):
define void @streamWriteRecord(i32 %0, double* %1, i32 %2) {
%4 = alloca i32
%5 = alloca double*
%6 = alloca i32
store i32 %0, i32* %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load double*, double** %5
%9 = bitcast double* %8 to i8*
%10 = load i32, i32* %6
%11 = call i32 @stream_write_record(i32 %7, i32 1, i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @streamWriteRecord(i32 %0, double* %1, i32 %2) {
%4 = bitcast double* %1 to i8*
%5 = tail call i32 @stream_write_record(i32 %0, i32 1, i8* %4, i32 %2)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void __wbeu08(uint8_t *buffer, uint8_t value) {
  buffer[0] = (uint8_t)(value >> 0) & 0xFF;
}


x86 assembly (clang, -O0):
<__wbeu08>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x0,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wbeu08>:
movzbl %sil,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @__wbeu08(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 0
%7 = and i32 %6, 255
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
ret void
}

LLVM IR (-O2):
define void @__wbeu08(i32* nocapture writeonly %0, i32 %1) {
%3 = and i32 %1, 255
store i32 %3, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_secp256k1_from_bytes(uintptr_t, uintptr_t);
void fiat_secp256k1_from_bytes(uint32_t out1[8], const uint8_t arg1[32]) {
  internal_fiat_secp256k1_from_bytes((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_secp256k1_from_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_secp256k1_from_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_secp256k1_from_bytes>:
jmp    1030 <internal_fiat_secp256k1_from_bytes@plt>

LLVM IR (-O0):
define void @fiat_secp256k1_from_bytes(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_secp256k1_from_bytes(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_secp256k1_from_bytes(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_secp256k1_from_bytes(i64 %3, i64 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ puts(char *);
syntax() {
  puts("Syntax: mdbfilter [-f] <fields>");
  puts("  Options  : -f  output fieldnames");
  puts("  Parameter:  select only the fields needed");
  puts("              ex. \"recno|cust_id|name_id|\" ");
  puts("");
  exit(1);
}


x86 assembly (clang, -O0):
<syntax>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee9(%rip),%rdi
call   1030 <puts@plt>
lea    0xf00(%rip),%rdi
call   1030 <puts@plt>
lea    0xf20(%rip),%rdi
call   1030 <puts@plt>
lea    0xf3f(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<syntax>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <puts@plt>
lea    0xedc(%rip),%rdi
call   1040 <puts@plt>
lea    0xef3(%rip),%rdi
call   1040 <puts@plt>
lea    0xf13(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Syntax: mdbfilter [-f] <fields>\00"
@.str.1 = [35 x i8] c" Options : -f output fieldnames\00"
@.str.2 = [44 x i8] c" Parameter: select only the fields needed\00"
@.str.3 = [44 x i8] c" ex. \22recno|cust_id|name_id|\22 \00"
@.str.4 = [1 x i8] zeroinitializer
define i32 @syntax() {
%1 = call i32 @puts(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @puts(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.4, i64 0, i64 0))
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [32 x i8] c"Syntax: mdbfilter [-f] <fields>\00"
@.str.1 = [35 x i8] c" Options : -f output fieldnames\00"
@.str.2 = [44 x i8] c" Parameter: select only the fields needed\00"
@.str.3 = [44 x i8] c" ex. \22recno|cust_id|name_id|\22 \00"
define i32 @syntax() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @putchar(i32 10)
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ add_command(unsigned int *, int, int);
int /*<<< orphan*/ ipfw_init(int, char **, unsigned int, int /*<<< orphan*/ *,
                             int /*<<< orphan*/);
scalar_t__ optind;
int ipfw_masq(int args, char **arglist) {
  unsigned int command = 0;
  add_command(&command, 0x0800U, 0x0020U | 0x1000U);
  add_command(&command, 0x0020U, 0x0080U | 0x0800U);
  ipfw_init(args, arglist, command, NULL, 0);
  optind = 0;
  return (0);
}


x86 assembly (clang, -O0):
<ipfw_masq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
mov    $0x800,%esi
mov    $0x1020,%edx
call   1040 <add_command@plt>
lea    -0x14(%rbp),%rdi
mov    $0x20,%esi
mov    $0x880,%edx
call   1040 <add_command@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
call   1030 <ipfw_init@plt>
mov    0x2e6f(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipfw_masq>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %edi,%ebp
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x800,%esi
mov    $0x1020,%edx
call   1040 <add_command@plt>
mov    %rbx,%rdi
mov    $0x20,%esi
mov    $0x880,%edx
call   1040 <add_command@plt>
mov    0xc(%rsp),%edx
mov    %ebp,%edi
mov    %r14,%rsi
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1030 <ipfw_init@plt>
mov    0x2e70(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@optind = global i64 0
define i32 @ipfw_masq(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 0, i32* %5
%6 = call i32 @add_command(i32* %5, i32 2048, i32 4128)
%7 = call i32 @add_command(i32* %5, i32 32, i32 2176)
%8 = load i32, i32* %3
%9 = load i8**, i8*** %4
%10 = load i32, i32* %5
%11 = call i32 @ipfw_init(i32 %8, i8** %9, i32 %10, i32* null, i32 0)
store i64 0, i64* @optind
ret i32 0
}

LLVM IR (-O2):
@optind = global i64 0
define i32 @ipfw_masq(i32 %0, i8** %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%5 = call i32 @add_command(i32* %3, i32 2048, i32 4128)
%6 = call i32 @add_command(i32* %3, i32 32, i32 2176)
%7 = load i32, i32* %3
%8 = call i32 @ipfw_init(i32 %0, i8** %1, i32 %7, i32* null, i32 0)
store i64 0, i64* @optind
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ UpnpResponse_ContentDirectory_GetSortCapabilities(void *,
                                                                     char *);
int /*<<< orphan*/ printf(char *);
void UpnpContentDirectory_GetSortCapabilities(void *upnptoken) {
  printf("Invoke: UpnpContentDirectory_GetSortCapabilities();\r\n");
  UpnpResponse_ContentDirectory_GetSortCapabilities(upnptoken, "Sample String");
}


x86 assembly (clang, -O0):
<UpnpContentDirectory_GetSortCapabilities>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rdi
lea    0xef3(%rip),%rsi
call   1030 <UpnpResponse_ContentDirectory_GetSortCapabilities@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpnpContentDirectory_GetSortCapabilities>:
push   %rbx
mov    %rdi,%rbx
lea    0xee3(%rip),%rdi
call   1040 <puts@plt>
lea    0xec9(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <UpnpResponse_ContentDirectory_GetSortCapabilities@plt>

LLVM IR (-O0):
@.str = [54 x i8] c"Invoke: UpnpContentDirectory_GetSortCapabilities();\0D\0A\00"
@.str.1 = [14 x i8] c"Sample String\00"
define void @UpnpContentDirectory_GetSortCapabilities(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @UpnpResponse_ContentDirectory_GetSortCapabilities(i8* %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [14 x i8] c"Sample String\00"
@str = [53 x i8] c"Invoke: UpnpContentDirectory_GetSortCapabilities();\0D\00"
define void @UpnpContentDirectory_GetSortCapabilities(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @UpnpResponse_ContentDirectory_GetSortCapabilities(i8* %0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char **dbow_fetch_row(void *vp) { return (NULL); }


x86 assembly (clang, -O0):
<dbow_fetch_row>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbow_fetch_row>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8** @dbow_fetch_row(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8** null
}

LLVM IR (-O2):
define noalias i8** @dbow_fetch_row(i8* nocapture readnone %0) {
ret i8** null
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ eeprom_write_dword(int /*<<< orphan*/ *, int /*<<< orphan*/);
void eeprom_write_float(float *addr, float value) {
  union {
    float f;
    uint32_t u32;
  } u;
  u.f = value;
  eeprom_write_dword((uint32_t *)addr, u.u32);
}


x86 assembly (clang, -O0):
<eeprom_write_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <eeprom_write_dword@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_write_float>:
movd   %xmm0,%esi
jmp    1030 <eeprom_write_dword@plt>

LLVM IR (-O0):
%union.anon = type { float }
define void @eeprom_write_float(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
%5 = alloca %union.anon
store float* %0, float** %3
store float %1, float* %4
%6 = load float, float* %4
%7 = bitcast %union.anon* %5 to float*
store float %6, float* %7
%8 = load float*, float** %3
%9 = bitcast float* %8 to i32*
%10 = bitcast %union.anon* %5 to i32*
%11 = load i32, i32* %10
%12 = call i32 @eeprom_write_dword(i32* %9, i32 %11)
ret void
}

LLVM IR (-O2):
define void @eeprom_write_float(float* %0, float %1) {
%3 = bitcast float* %0 to i32*
%4 = bitcast float %1 to i32
%5 = tail call i32 @eeprom_write_dword(i32* %3, i32 %4)
ret void
}
/* Variables and functions */
int crlf2nl(char *, unsigned int);
unsigned int read(int, char *, unsigned int);
unsigned readcr(int fd, char *buf, unsigned len) {
  unsigned i;
  i = read(fd, buf, len);
  if (i <= 0)
    return i;
  return crlf2nl(buf, i);
}


x86 assembly (clang, -O0):
<readcr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <read@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
ja     1159 <readcr+0x39>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1168 <readcr+0x48>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%esi
call   1040 <crlf2nl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readcr>:
push   %rbx
mov    %rsi,%rbx
call   1030 <read@plt>
test   %eax,%eax
je     1138 <readcr+0x18>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <crlf2nl@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @readcr(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @read(i32 %9, i8* %10, i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp ule i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %21
17: ; preds = %3
%18 = load i8*, i8** %6
%19 = load i32, i32* %8
%20 = call i32 @crlf2nl(i8* %18, i32 %19)
store i32 %20, i32* %4
br label %21
21: ; preds = %17, %15
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @readcr(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i32 %2)
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @crlf2nl(i8* %1, i32 %4)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ 0, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
void memalloc_init(void) {
  char *p = malloc(8);
  free(p);
}


x86 assembly (clang, -O0):
<memalloc_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memalloc_init>:
push   %rax
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @memalloc_init() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 8)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @memalloc_init() {
%1 = tail call dereferenceable_or_null(8) i8* @malloc(i32 8)
%2 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
double pow(double, int);
double qDT(double DT) {
  if (DT > 15)
    return 9;
  return 1 / (0.0003869 * pow(DT + 0.1815, 2) + 0.01081);
}


x86 assembly (clang, -O0):
<qDT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1146 <qDT+0x36>
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1189 <qDT+0x79>
movsd  0xed2(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  0xea8(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xea4(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  0xe88(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qDT>:
push   %rax
ucomisd 0xeef(%rip),%xmm0
jbe    1125 <qDT+0x15>
movsd  0xedd(%rip),%xmm0
pop    %rax
ret
addsd  0xee3(%rip),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movapd %xmm0,%xmm1
mulsd  0xed5(%rip),%xmm1
addsd  0xed5(%rip),%xmm1
movsd  0xed5(%rip),%xmm0
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @qDT(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 1.500000e+01
br i1 %5, label %6, label %7
6: ; preds = %1
store double 9.000000e+00, double* %2
br label %13
7: ; preds = %1
%8 = load double, double* %3
%9 = fadd double %8, 1.815000e-01
%10 = call double @pow(double %9, i32 2)
%11 = call double @llvm.fmuladd.f64(double 3.869000e-04, double %10, double 1.081000e-02)
%12 = fdiv double 1.000000e+00, %11
store double %12, double* %2
br label %13
13: ; preds = %7, %6
%14 = load double, double* %2
ret double %14
}

LLVM IR (-O2):
define double @qDT(double %0) {
%2 = fcmp ogt double %0, 1.500000e+01
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = fadd double %0, 1.815000e-01
%5 = tail call double @pow(double %4, i32 2)
%6 = tail call double @llvm.fmuladd.f64(double %5, double 3.869000e-04, double 1.081000e-02)
%7 = fdiv double 1.000000e+00, %6
br label %8
8: ; preds = %1, %3
%9 = phi double [ %7, %3 ], [ 9.000000e+00, %1 ]
ret double %9
}
int a_ctz_l(unsigned long x) {
  __asm__("bsf %1,%0" : "=r"(x) : "r"(x));
  return x;
}


x86 assembly (clang, -O0):
<a_ctz_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bsf    %rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_ctz_l>:
bsf    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @a_ctz_l(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 asm "bsf $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %3)
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @a_ctz_l(i64 %0) {
%2 = tail call i64 asm "bsf $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
int XPending() {}


x86 assembly (clang, -O0):
<XPending>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XPending>:
ret

LLVM IR (-O0):
define i32 @XPending() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XPending() {
ret i32 undef
}
int main(int argc, char **argv) {
  short int code = 0;
  const salesTax = .0825;
  double size = 0.0f;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movw   $0x0,-0x12(%rbp)
movl   $0x0,-0x18(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i16
%7 = alloca i32
%8 = alloca double
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i16 0, i16* %6
store i32 0, i32* %7
store double 0.000000e+00, double* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_write_standard_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(31, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_write_standard_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1f,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_write_standard_solutions>:
mov    $0x1f,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @solcon_write_standard_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 31, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_write_standard_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 31, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
scalar_t__ S_ISDIR(int /*<<< orphan*/);
scalar_t__ stat(char const *, struct stat *);
int is_dir(const char *path) {
  struct stat bf;
  if (stat(path, &bf) != 0)
    return 0;
  if (S_ISDIR(bf.st_mode))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <stat@plt>
cmp    $0x0,%rax
je     114f <is_dir+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1174 <is_dir+0x54>
mov    -0x18(%rbp),%edi
call   1030 <S_ISDIR@plt>
cmp    $0x0,%rax
je     116d <is_dir+0x4d>
movl   $0x1,-0x4(%rbp)
jmp    1174 <is_dir+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dir>:
push   %rax
mov    %rsp,%rsi
call   1040 <stat@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1135 <is_dir+0x15>
pop    %rcx
ret
mov    (%rsp),%edi
call   1030 <S_ISDIR@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @is_dir(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %16
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i64 @S_ISDIR(i32 %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 1, i32* %2
br label %16
15: ; preds = %9
store i32 0, i32* %2
br label %16
16: ; preds = %15, %14, %8
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @is_dir(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = call i64 @S_ISDIR(i32 %8)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %6, %1
%13 = phi i32 [ 0, %1 ], [ %11, %6 ]
ret i32 %13
}
unsigned xrop3_123_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D ^ T;
  stk2 = ~stk2;
  stk1 = S & stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_123_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_123_0_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
xor    $0xff00,%eax
and    %ecx,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_123_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %6
%28 = load i32, i32* %9
%29 = and i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = xor i32 %30, -1
store i32 %31, i32* %8
%32 = load i32, i32* %8
ret i32 %32
}

LLVM IR (-O2):
define i32 @xrop3_123_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 65280
%8 = and i32 %7, %4
%9 = xor i32 %8, -1
ret i32 %9
}
main() {
  typedef long unsigned size_t;
  __typeof(__typeof(size_t)) a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i64
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
ssize_t modbit(ssize_t i) { return 1 << (i & 7); }


x86 assembly (clang, -O0):
<modbit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modbit>:
mov    %edi,%ecx
and    $0x7,%cl
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @modbit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 7
%5 = shl i32 1, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @modbit(i32 %0) {
%2 = and i32 %0, 7
%3 = shl nuw nsw i32 1, %2
ret i32 %3
}
/* Variables and functions */
unsigned long get_error_values(int /*<<< orphan*/, int, char const **, int *,
                               char const **, int *);
unsigned long ERR_peek_last_error_line_data(const char **file, int *line,
                                            const char **data, int *flags) {
  return (get_error_values(0, 1, file, line, data, flags));
}


x86 assembly (clang, -O0):
<ERR_peek_last_error_line_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <get_error_values@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ERR_peek_last_error_line_data>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <get_error_values@plt>

LLVM IR (-O0):
define i64 @ERR_peek_last_error_line_data(i8** %0, i32* %1, i8** %2, i32* %3) {
%5 = alloca i8**
%6 = alloca i32*
%7 = alloca i8**
%8 = alloca i32*
store i8** %0, i8*** %5
store i32* %1, i32** %6
store i8** %2, i8*** %7
store i32* %3, i32** %8
%9 = load i8**, i8*** %5
%10 = load i32*, i32** %6
%11 = load i8**, i8*** %7
%12 = load i32*, i32** %8
%13 = call i64 @get_error_values(i32 0, i32 1, i8** %9, i32* %10, i8** %11, i32* %12)
ret i64 %13
}

LLVM IR (-O2):
define i64 @ERR_peek_last_error_line_data(i8** %0, i32* %1, i8** %2, i32* %3) {
%5 = tail call i64 @get_error_values(i32 0, i32 1, i8** %0, i32* %1, i8** %2, i32* %3)
ret i64 %5
}
/* Variables and functions */
char *f2c_string(char *, int);
int /*<<< orphan*/ inipotential(int *, double *, char *);
void inipotential_(int *npar, double *par, char *name, int namelen) {
  char *local_name = f2c_string(name, namelen);
  inipotential(npar, par, local_name);
}


x86 assembly (clang, -O0):
<inipotential_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
call   1040 <f2c_string@plt>
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1030 <inipotential@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inipotential_>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rdx,%rdi
mov    %ecx,%esi
call   1040 <f2c_string@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <inipotential@plt>

LLVM IR (-O0):
define void @inipotential_(i32* %0, double* %1, i8* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca double*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
store i32* %0, i32** %5
store double* %1, double** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %7
%11 = load i32, i32* %8
%12 = call i8* @f2c_string(i8* %10, i32 %11)
store i8* %12, i8** %9
%13 = load i32*, i32** %5
%14 = load double*, double** %6
%15 = load i8*, i8** %9
%16 = call i32 @inipotential(i32* %13, double* %14, i8* %15)
ret void
}

LLVM IR (-O2):
define void @inipotential_(i32* %0, double* %1, i8* %2, i32 %3) {
%5 = tail call i8* @f2c_string(i8* %2, i32 %3)
%6 = tail call i32 @inipotential(i32* %0, double* %1, i8* %5)
ret void
}
int null_ready(void) { return 0; }


x86 assembly (clang, -O0):
<null_ready>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_ready>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @null_ready() {
ret i32 0
}

LLVM IR (-O2):
define i32 @null_ready() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ codec_q(int, int /*<<< orphan*/, int /*<<< orphan*/);
__attribute__((__always___)) void codec_reset() { codec_q(0x0F, 0, ~0); }


x86 assembly (clang, -O0):
<codec_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1030 <codec_q@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<codec_reset>:
mov    $0xf,%edi
xor    %esi,%esi
mov    $0xffffffff,%edx
jmp    1030 <codec_q@plt>

LLVM IR (-O0):
define void @codec_reset() {
%1 = call i32 @codec_q(i32 15, i32 0, i32 -1)
ret void
}

LLVM IR (-O2):
define void @codec_reset() {
%1 = tail call i32 @codec_q(i32 15, i32 0, i32 -1)
ret void
}
int builtin_fg(int argc, char *argv[]) { return 0; }


x86 assembly (clang, -O0):
<builtin_fg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<builtin_fg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @builtin_fg(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @builtin_fg(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ dump_error(char *);
scalar_t__ malloc(unsigned int);
unsigned int *uvector(int nl, int nh) {
  unsigned int *v;
  v = (unsigned int *)malloc((unsigned)(nh - nl + 1) * sizeof(int));
  if (!v)
    dump_error("allocation failure in uvector()");
  return v - nl;
}


x86 assembly (clang, -O0):
<uvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115f <uvector+0x3f>
lea    0xea6(%rip),%rdi
call   1030 <dump_error@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uvector>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
sub    %edi,%esi
lea    0x4(,%rsi,4),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1147 <uvector+0x27>
lea    0xebe(%rip),%rdi
call   1030 <dump_error@plt>
movslq %ebp,%rax
shl    $0x2,%rax
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [32 x i8] c"allocation failure in uvector()\00"
define i32* @uvector(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = zext i32 %9 to i64
%11 = mul i64 %10, 4
%12 = trunc i64 %11 to i32
%13 = call i64 @malloc(i32 %12)
%14 = inttoptr i64 %13 to i32*
store i32* %14, i32** %5
%15 = load i32*, i32** %5
%16 = icmp ne i32* %15, null
br i1 %16, label %19, label %17
17: ; preds = %2
%18 = call i32 @dump_error(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %17, %2
%20 = load i32*, i32** %5
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = sub i64 0, %22
%24 = getelementptr inbounds i32, i32* %20, i64 %23
ret i32* %24
}

LLVM IR (-O2):
@.str = [32 x i8] c"allocation failure in uvector()\00"
define i32* @uvector(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = shl i32 %3, 2
%5 = add i32 %4, 4
%6 = tail call i64 @malloc(i32 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @dump_error(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
%11 = inttoptr i64 %6 to i32*
%12 = sext i32 %0 to i64
%13 = sub nsw i64 0, %12
%14 = getelementptr inbounds i32, i32* %11, i64 %13
ret i32* %14
}
/* Variables and functions */
int /*<<< orphan*/ makePinv();
int /*<<< orphan*/ makeSP();
int main() {
  makePinv();
  makeSP();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <makePinv@plt>
mov    $0x0,%al
call   1040 <makeSP@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <makePinv@plt>
xor    %eax,%eax
call   1040 <makeSP@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @makePinv()
%3 = call i32 (...) @makeSP()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @makePinv()
%2 = tail call i32 (...) @makeSP()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ inputerror(char *);
void prematureeof() { inputerror("premature end of"); }


x86 assembly (clang, -O0):
<prematureeof>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <inputerror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<prematureeof>:
lea    0xee9(%rip),%rdi
jmp    1030 <inputerror@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"premature end of\00"
define void @prematureeof() {
%1 = call i32 @inputerror(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"premature end of\00"
define void @prematureeof() {
%1 = tail call i32 @inputerror(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
int abs(int v) { return v >= 0 ? v : -v; }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     111c <abs+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x7c() {
  Assert_real((isalpha(124) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              625, ("isalpha should be 0 for |"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x7c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7c,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x271,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x7c>:
push   %rax
mov    $0x7c,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x271,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for |\00"
define void @t_isalpha_0x7c() {
%1 = call i64 @isalpha(i32 124)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 625, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for |\00"
define void @t_isalpha_0x7c() {
%1 = tail call i64 @isalpha(i32 124)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 625, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void my_isr(int n) { printf("in my isr signal caught is =%d\n", n); }


x86 assembly (clang, -O0):
<my_isr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_isr>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"in my isr signal caught is =%d\0A\00"
define void @my_isr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"in my isr signal caught is =%d\0A\00"
define void @my_isr(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int ipc_disconnect(void) { return 0; }


x86 assembly (clang, -O0):
<ipc_disconnect>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipc_disconnect>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ipc_disconnect() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ipc_disconnect() {
ret i32 0
}
int do_579() { return 579; }


x86 assembly (clang, -O0):
<do_579>:
push   %rbp
mov    %rsp,%rbp
mov    $0x243,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_579>:
mov    $0x243,%eax
ret

LLVM IR (-O0):
define i32 @do_579() {
ret i32 579
}

LLVM IR (-O2):
define i32 @do_579() {
ret i32 579
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRA5_set(void) { return U_WMRCORENONE_set("U_WMRA5"); }


x86 assembly (clang, -O0):
<U_WMRA5_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRA5_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRA5\00"
define i8* @U_WMRA5_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRA5\00"
define i8* @U_WMRA5_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
void X509_PURPOSE_cleanup(void) {}


x86 assembly (clang, -O0):
<X509_PURPOSE_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_PURPOSE_cleanup>:
ret

LLVM IR (-O0):
define void @X509_PURPOSE_cleanup() {
ret void
}

LLVM IR (-O2):
define void @X509_PURPOSE_cleanup() {
ret void
}
char *netMac() {}


x86 assembly (clang, -O0):
<netMac>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<netMac>:
ret

LLVM IR (-O0):
define i8* @netMac() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define noalias i8* @netMac() {
ret i8* undef
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rte_constant_bswap64(uint64_t x) {
  return ((x & 0x00000000000000ffULL) << 56) |
         ((x & 0x000000000000ff00ULL) << 40) |
         ((x & 0x0000000000ff0000ULL) << 24) |
         ((x & 0x00000000ff000000ULL) << 8) |
         ((x & 0x000000ff00000000ULL) >> 8) |
         ((x & 0x0000ff0000000000ULL) >> 24) |
         ((x & 0x00ff000000000000ULL) >> 40) |
         ((x & 0xff00000000000000ULL) >> 56);
}


x86 assembly (clang, -O0):
<rte_constant_bswap64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
and    $0xff,%rax
shl    $0x38,%rax
movslq -0x4(%rbp),%rcx
and    $0xff00,%rcx
shl    $0x28,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
and    $0xff0000,%rcx
shl    $0x18,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff000000,%rdx
and    %rdx,%rcx
shl    $0x8,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff00000000,%rdx
and    %rdx,%rcx
shr    $0x8,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff0000000000,%rdx
and    %rdx,%rcx
shr    $0x18,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff000000000000,%rdx
and    %rdx,%rcx
shr    $0x28,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff00000000000000,%rdx
and    %rdx,%rcx
shr    $0x38,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_constant_bswap64>:
movslq %edi,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i32 @rte_constant_bswap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = and i64 %4, 255
%6 = shl i64 %5, 56
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = and i64 %8, 65280
%10 = shl i64 %9, 40
%11 = or i64 %6, %10
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = and i64 %13, 16711680
%15 = shl i64 %14, 24
%16 = or i64 %11, %15
%17 = load i32, i32* %2
%18 = sext i32 %17 to i64
%19 = and i64 %18, 4278190080
%20 = shl i64 %19, 8
%21 = or i64 %16, %20
%22 = load i32, i32* %2
%23 = sext i32 %22 to i64
%24 = and i64 %23, 1095216660480
%25 = lshr i64 %24, 8
%26 = or i64 %21, %25
%27 = load i32, i32* %2
%28 = sext i32 %27 to i64
%29 = and i64 %28, 280375465082880
%30 = lshr i64 %29, 24
%31 = or i64 %26, %30
%32 = load i32, i32* %2
%33 = sext i32 %32 to i64
%34 = and i64 %33, 71776119061217280
%35 = lshr i64 %34, 40
%36 = or i64 %31, %35
%37 = load i32, i32* %2
%38 = sext i32 %37 to i64
%39 = and i64 %38, -72057594037927936
%40 = lshr i64 %39, 56
%41 = or i64 %36, %40
%42 = trunc i64 %41 to i32
ret i32 %42
}

LLVM IR (-O2):
define i32 @rte_constant_bswap64(i32 %0) {
%2 = sext i32 %0 to i64
%3 = tail call i64 @llvm.bswap.i64(i64 %2)
%4 = trunc i64 %3 to i32
ret i32 %4
}