xunge/DecIR huggingface dataset:
int GUI_Strlen(const char *Str) {
  int i = 0;
  while (*Str++) {
    ++i;
  }
  return i;
}


x86 assembly (clang, -O0):
<GUI_Strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1135 <GUI_Strlen+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <GUI_Strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GUI_Strlen>:
cmpb   $0x0,(%rdi)
je     111c <GUI_Strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <GUI_Strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @GUI_Strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @GUI_Strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
int test_imm_31int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x31 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_31int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x31,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_31int64_highword_mem>:
testb  $0x31,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_31int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 49
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_31int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 210453397504
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(float *, float const *, int);
uint32_t __float_clone_array(const float *p, float *q, uint32_t elements) {
  uint32_t n = elements * sizeof(float);
  memcpy(q, p, n);
  return n;
}


x86 assembly (clang, -O0):
<__float_clone_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movslq -0x14(%rbp),%rax
shl    $0x2,%rax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__float_clone_array>:
push   %rbx
mov    %rdi,%rax
lea    0x0(,%rdx,4),%ebx
mov    %rsi,%rdi
mov    %rax,%rsi
mov    %ebx,%edx
call   1030 <memcpy@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__float_clone_array(float* %0, float* %1, i32 %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
%7 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = mul i64 %9, 4
%11 = trunc i64 %10 to i32
store i32 %11, i32* %7
%12 = load float*, float** %5
%13 = load float*, float** %4
%14 = load i32, i32* %7
%15 = call i32 @memcpy(float* %12, float* %13, i32 %14)
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @__float_clone_array(float* %0, float* %1, i32 %2) {
%4 = shl i32 %2, 2
%5 = tail call i32 @memcpy(float* %1, float* %0, i32 %4)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ a1(int);
int /*<<< orphan*/ b1(int);
int /*<<< orphan*/ c1(int);
int /*<<< orphan*/ d1(int);
int /*<<< orphan*/ d2(int);
int /*<<< orphan*/ d3(int);
int /*<<< orphan*/ d4(int);
int main(void) {
  a1(200);
  a1(200);
  a1(200);
  b1(200);
  c1(200);
  d1(200);
  d2(200);
  d3(200);
  d4(200);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xc8,%edi
call   1050 <a1@plt>
mov    $0xc8,%edi
call   1050 <a1@plt>
mov    $0xc8,%edi
call   1050 <a1@plt>
mov    $0xc8,%edi
call   1090 <b1@plt>
mov    $0xc8,%edi
call   1060 <c1@plt>
mov    $0xc8,%edi
call   1030 <d1@plt>
mov    $0xc8,%edi
call   1070 <d2@plt>
mov    $0xc8,%edi
call   1040 <d3@plt>
mov    $0xc8,%edi
call   1080 <d4@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc8,%edi
call   1050 <a1@plt>
mov    $0xc8,%edi
call   1050 <a1@plt>
mov    $0xc8,%edi
call   1050 <a1@plt>
mov    $0xc8,%edi
call   1090 <b1@plt>
mov    $0xc8,%edi
call   1060 <c1@plt>
mov    $0xc8,%edi
call   1030 <d1@plt>
mov    $0xc8,%edi
call   1070 <d2@plt>
mov    $0xc8,%edi
call   1040 <d3@plt>
mov    $0xc8,%edi
call   1080 <d4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @a1(i32 200)
%3 = call i32 @a1(i32 200)
%4 = call i32 @a1(i32 200)
%5 = call i32 @b1(i32 200)
%6 = call i32 @c1(i32 200)
%7 = call i32 @d1(i32 200)
%8 = call i32 @d2(i32 200)
%9 = call i32 @d3(i32 200)
%10 = call i32 @d4(i32 200)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @a1(i32 200)
%2 = tail call i32 @a1(i32 200)
%3 = tail call i32 @a1(i32 200)
%4 = tail call i32 @b1(i32 200)
%5 = tail call i32 @c1(i32 200)
%6 = tail call i32 @d1(i32 200)
%7 = tail call i32 @d2(i32 200)
%8 = tail call i32 @d3(i32 200)
%9 = tail call i32 @d4(i32 200)
ret i32 0
}
/* Variables and functions */
float s_brrand();
float linhi() {
  float randnum, randnum2;
  randnum = s_brrand();
  randnum2 = s_brrand();
  if (randnum2 > randnum)
    randnum = randnum2;
  return (randnum);
}


x86 assembly (clang, -O0):
<linhi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <s_brrand@plt>
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <s_brrand@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1149 <linhi+0x39>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<linhi>:
push   %rax
xor    %eax,%eax
call   1030 <s_brrand@plt>
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <s_brrand@plt>
maxss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @linhi() {
%1 = alloca float
%2 = alloca float
%3 = call float (...) @s_brrand()
store float %3, float* %1
%4 = call float (...) @s_brrand()
store float %4, float* %2
%5 = load float, float* %2
%6 = load float, float* %1
%7 = fcmp ogt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = load float, float* %2
store float %9, float* %1
br label %10
10: ; preds = %8, %0
%11 = load float, float* %1
ret float %11
}

LLVM IR (-O2):
define float @linhi() {
%1 = tail call float (...) @s_brrand()
%2 = tail call float (...) @s_brrand()
%3 = fcmp ogt float %2, %1
%4 = select i1 %3, float %2, float %1
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf_skip(char *, char const *);
int /*<<< orphan*/ stress_check_capability(int);
int stress_ramfs_supported(const char *name) {
  if (!stress_check_capability((-1))) {
    pr_inf_skip("%s stressor will be skipped, "
                "need to be running with CAP_SYS_ADMIN "
                "rights for this stressor\n",
                name);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<stress_ramfs_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0xffffffff,%edi
call   1030 <stress_check_capability@plt>
cmp    $0x0,%eax
jne    115b <stress_ramfs_supported+0x3b>
mov    -0x10(%rbp),%rsi
lea    0xeb6(%rip),%rdi
call   1040 <pr_inf_skip@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1162 <stress_ramfs_supported+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_ramfs_supported>:
push   %rbx
mov    %rdi,%rbx
mov    $0xffffffff,%edi
call   1030 <stress_check_capability@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1138 <stress_ramfs_supported+0x18>
pop    %rbx
ret
lea    0xec1(%rip),%rdi
mov    %rbx,%rsi
call   1040 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_ramfs_supported(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @stress_check_capability(i32 -1)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i32 @pr_inf_skip(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %7)
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_ramfs_supported(i8* %0) {
%2 = tail call i32 @stress_check_capability(i32 -1)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_inf_skip(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ INIT_LIST_HEAD(struct list_head *);
int /*<<< orphan*/ list_replace(struct list_head *, struct list_head *);
void list_replace_init(struct list_head *oldentry, struct list_head *newentry) {
  list_replace(oldentry, newentry);
  INIT_LIST_HEAD(oldentry);
}


x86 assembly (clang, -O0):
<list_replace_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <list_replace@plt>
mov    -0x8(%rbp),%rdi
call   1030 <INIT_LIST_HEAD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_replace_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <list_replace@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <INIT_LIST_HEAD@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_replace_init(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %3
%6 = load %struct.list_head*, %struct.list_head** %4
%7 = call i32 @list_replace(%struct.list_head* %5, %struct.list_head* %6)
%8 = load %struct.list_head*, %struct.list_head** %3
%9 = call i32 @INIT_LIST_HEAD(%struct.list_head* %8)
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_replace_init(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i32 @list_replace(%struct.list_head* %0, %struct.list_head* %1)
%4 = tail call i32 @INIT_LIST_HEAD(%struct.list_head* %0)
ret void
}
int __sys_close(const int fd) {
  (void)fd;
  return -1;
}


x86 assembly (clang, -O0):
<__sys_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sys_close>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @__sys_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @__sys_close(i32 %0) {
ret i32 -1
}
void foo763(int p) {}


x86 assembly (clang, -O0):
<foo763>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo763>:
ret

LLVM IR (-O0):
define void @foo763(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo763(i32 %0) {
ret void
}
/* Variables and functions */
void *ft_memalloc(int);
void *ft_memcpy(void *, void const *, size_t);
void *ft_memdup(const void *content, size_t content_size) {
  void *result;
  if (!(result = ft_memalloc(sizeof(*result) * content_size)))
    return (NULL);
  return (ft_memcpy(result, content, content_size));
}


x86 assembly (clang, -O0):
<ft_memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <ft_memalloc@plt>
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
jne    115a <ft_memdup+0x3a>
movq   $0x0,-0x8(%rbp)
jmp    116f <ft_memdup+0x4f>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <ft_memcpy@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_memdup>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %ebx,%edi
call   1040 <ft_memalloc@plt>
test   %rax,%rax
je     114b <ft_memdup+0x2b>
mov    %rax,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <ft_memcpy@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @ft_memdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = mul i64 1, %7
%9 = trunc i64 %8 to i32
%10 = call i8* @ft_memalloc(i32 %9)
store i8* %10, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %2
store i8* null, i8** %3
br label %18
13: ; preds = %2
%14 = load i8*, i8** %6
%15 = load i8*, i8** %4
%16 = load i64, i64* %5
%17 = call i8* @ft_memcpy(i8* %14, i8* %15, i64 %16)
store i8* %17, i8** %3
br label %18
18: ; preds = %13, %12
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @ft_memdup(i8* %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = tail call i8* @ft_memalloc(i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i8* @ft_memcpy(i8* %4, i8* %0, i64 %1)
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ %7, %6 ], [ null, %2 ]
ret i8* %9
}
outcont(n) int n;
{
  if (n > 0)
    outnum(n);
  outcode("\tcontinue");
  outcode(0);
}


x86 assembly (clang, -O0):
<outcont>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    113f <outcont+0x1f>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1040 <outnum@plt>
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <outcode@plt>
xor    %edi,%edi
mov    $0x0,%al
call   1030 <outcode@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outcont>:
push   %rax
test   %edi,%edi
jle    112c <outcont+0xc>
xor    %eax,%eax
call   1040 <outnum@plt>
lea    0xecd(%rip),%rdi
xor    %eax,%eax
call   1030 <outcode@plt>
xor    %edi,%edi
xor    %eax,%eax
pop    %rcx
jmp    1030 <outcode@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\09continue\00"
define i32 @outcont(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = call i32 (i32, ...) bitcast (i32 (...)* @outnum to i32 (i32, ...)*)(i32 %7)
br label %9
9: ; preds = %6, %1
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @outcode to i32 (i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (i32, ...) bitcast (i32 (...)* @outcode to i32 (i32, ...)*)(i32 0)
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [10 x i8] c"\09continue\00"
define i32 @outcont(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @outnum to i32 (i32, ...)*)(i32 %0)
br label %5
5: ; preds = %3, %1
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @outcode to i32 (i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @outcode to i32 (i32, ...)*)(i32 0)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int sDumpLine(FILE *fp) {
  register int c;
  while ((c = fgetc(fp)) != '\n')
    ;
  return 0;
}


x86 assembly (clang, -O0):
<sDumpLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0xc(%rbp)
cmp    $0xa,%eax
je     1136 <sDumpLine+0x26>
jmp    111c <sDumpLine+0xc>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sDumpLine>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <fgetc@plt>
cmp    $0xa,%eax
jne    1120 <sDumpLine+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sDumpLine(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
br label %4
4: ; preds = %8, %1
%5 = load i32*, i32** %2
%6 = call i32 @fgetc(i32* %5)
store i32 %6, i32* %3
%7 = icmp ne i32 %6, 10
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @sDumpLine(i32* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @fgetc(i32* %0)
%4 = icmp eq i32 %3, 10
br i1 %4, label %5, label %2
5: ; preds = %2
ret i32 0
}
char table_lookup(char lookup, int no) {
  static char lookup_table[10][4] = {
      {'0', '\0', '\0', '\0'}, {'1', '\0', '\0', '\0'}, {'a', 'b', 'c', '\0'},
      {'d', 'e', 'f', '\0'},   {'g', 'h', 'i', '\0'},   {'j', 'k', 'l', '\0'},
      {'m', 'n', 'o', '\0'},   {'p', 'r', 's', '\0'},   {'t', 'u', 'v', '\0'},
      {'w', 'x', 'y', 'z'}};
  if (lookup == '\0')
    return '\0';
  return lookup_table[lookup - '0'][no - 1];
}


x86 assembly (clang, -O0):
<table_lookup>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x0,%eax
jne    1123 <table_lookup+0x23>
movb   $0x0,-0x1(%rbp)
jmp    114a <table_lookup+0x4a>
movsbl -0x2(%rbp),%eax
sub    $0x30,%eax
movslq %eax,%rcx
lea    0x2efc(%rip),%rax
shl    $0x2,%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<table_lookup>:
test   %dil,%dil
je     111f <table_lookup+0x1f>
movsbq %dil,%rax
movslq %esi,%rcx
lea    0xeed(%rip),%rdx
lea    (%rdx,%rax,4),%rax
mov    -0xc1(%rcx,%rax,1),%al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@table_lookup.lookup_table = internal global [10 x [4 x i8]] [[4 x i8] c"0\00\00\00", [4 x i8] c"1\00\00\00", [4 x i8] c"abc\00", [4 x i8] c"def\00", [4 x i8] c"ghi\00", [4 x i8] c"jkl\00", [4 x i8] c"mno\00", [4 x i8] c"prs\00", [4 x i8] c"tuv\00", [4 x i8] c"wxyz"]
define signext i8 @table_lookup(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i8 0, i8* %3
br label %21
10: ; preds = %2
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 48
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [10 x [4 x i8]], [10 x [4 x i8]]* @table_lookup.lookup_table, i64 0, i64 %14
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds [4 x i8], [4 x i8]* %15, i64 0, i64 %18
%20 = load i8, i8* %19
store i8 %20, i8* %3
br label %21
21: ; preds = %10, %9
%22 = load i8, i8* %3
ret i8 %22
}

LLVM IR (-O2):
@table_lookup.lookup_table = internal unnamed_addr constant [10 x [4 x i8]] [[4 x i8] c"0\00\00\00", [4 x i8] c"1\00\00\00", [4 x i8] c"abc\00", [4 x i8] c"def\00", [4 x i8] c"ghi\00", [4 x i8] c"jkl\00", [4 x i8] c"mno\00", [4 x i8] c"prs\00", [4 x i8] c"tuv\00", [4 x i8] c"wxyz"]
define signext i8 @table_lookup(i8 signext %0, i32 %1) {
%3 = icmp eq i8 %0, 0
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = sext i8 %0 to i64
%6 = add nsw i64 %5, -48
%7 = add nsw i32 %1, -1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [10 x [4 x i8]], [10 x [4 x i8]]* @table_lookup.lookup_table, i64 0, i64 %6, i64 %8
%10 = load i8, i8* %9
br label %11
11: ; preds = %2, %4
%12 = phi i8 [ %10, %4 ], [ 0, %2 ]
ret i8 %12
}
double computeSquare(double x) { return x * x; }


x86 assembly (clang, -O0):
<computeSquare>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<computeSquare>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @computeSquare(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @computeSquare(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int mkstemp(char *);
void no_resourceLeak_mkstemp_01(char *template) {
  int fp = mkstemp(template);
  close(fp);
}


x86 assembly (clang, -O0):
<no_resourceLeak_mkstemp_01>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mkstemp@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_resourceLeak_mkstemp_01>:
push   %rax
call   1040 <mkstemp@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @no_resourceLeak_mkstemp_01(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @mkstemp(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @close(i32 %6)
ret void
}

LLVM IR (-O2):
define void @no_resourceLeak_mkstemp_01(i8* %0) {
%2 = tail call i32 @mkstemp(i8* %0)
%3 = tail call i32 @close(i32 %2)
ret void
}
int main() { return 6 / 2 - 3; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
XChangeSaveSet() {}


x86 assembly (clang, -O0):
<XChangeSaveSet>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XChangeSaveSet>:
ret

LLVM IR (-O0):
define i32 @XChangeSaveSet() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XChangeSaveSet() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void escape(char *cmd) { system(cmd); }


x86 assembly (clang, -O0):
<escape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<escape>:
jmp    1030 <system@plt>

LLVM IR (-O0):
define void @escape(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @system(i8* %3)
ret void
}

LLVM IR (-O2):
define void @escape(i8* nocapture %0) {
%2 = tail call i32 @system(i8* %0)
ret void
}
void rcu_init(void) {}


x86 assembly (clang, -O0):
<rcu_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_init>:
ret

LLVM IR (-O0):
define void @rcu_init() {
ret void
}

LLVM IR (-O2):
define void @rcu_init() {
ret void
}
void delay_ms(unsigned int ms) {
  unsigned int i;
  while (ms) {
    for (i = 0x37e; i; i--) {
    }
    ms--;
  }
}


x86 assembly (clang, -O0):
<delay_ms>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1143 <delay_ms+0x43>
movl   $0x37e,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1135 <delay_ms+0x35>
jmp    1127 <delay_ms+0x27>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1118 <delay_ms+0x18>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <delay_ms+0x7>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_ms>:
ret

LLVM IR (-O0):
define void @delay_ms(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %15, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %4
store i32 894, i32* %3
br label %8
8: ; preds = %12, %7
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %8
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add i32 %13, -1
store i32 %14, i32* %3
br label %8
15: ; preds = %8
%16 = load i32, i32* %2
%17 = add i32 %16, -1
store i32 %17, i32* %2
br label %4
18: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay_ms(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void libcperciva_be16enc(void *pp, uint16_t x) {
  uint8_t *p = (uint8_t *)pp;
  p[1] = x & 0xff;
  p[0] = (x >> 8) & 0xff;
}


x86 assembly (clang, -O0):
<libcperciva_be16enc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<libcperciva_be16enc>:
mov    %esi,%eax
movzbl %al,%ecx
mov    %ecx,0x4(%rdi)
movzbl %ah,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @libcperciva_be16enc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = and i32 %8, 255
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 1
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 0
store i32 %14, i32* %16
ret void
}

LLVM IR (-O2):
define void @libcperciva_be16enc(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = and i32 %1, 255
%5 = getelementptr inbounds i8, i8* %0, i64 4
%6 = bitcast i8* %5 to i32*
store i32 %4, i32* %6
%7 = lshr i32 %1, 8
%8 = and i32 %7, 255
store i32 %8, i32* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLdouble;

/* Variables and functions */
int /*<<< orphan*/ glRasterPos4d(int /*<<< orphan*/, int /*<<< orphan*/,
                                 int /*<<< orphan*/, int /*<<< orphan*/);
void RasterPos4d(GLdouble x, GLdouble y, GLdouble z, GLdouble w) {
  glRasterPos4d(x, y, z, w);
}


x86 assembly (clang, -O0):
<RasterPos4d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <glRasterPos4d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterPos4d>:
jmp    1030 <glRasterPos4d@plt>

LLVM IR (-O0):
define void @RasterPos4d(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @glRasterPos4d(i32 %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @RasterPos4d(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @glRasterPos4d(i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ command(char *);
void syst(void) { command("SYST"); }


x86 assembly (clang, -O0):
<syst>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<syst>:
lea    0xee9(%rip),%rdi
jmp    1030 <command@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"SYST\00"
define void @syst() {
%1 = call i32 @command(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"SYST\00"
define void @syst() {
%1 = tail call i32 @command(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int interpret(char **tokens) { printf("Got tokens!"); }


x86 assembly (clang, -O0):
<interpret>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpret>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Got tokens!\00"
define i32 @interpret(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
store i8** %0, i8*** %3
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
@.str = [12 x i8] c"Got tokens!\00"
define i32 @interpret(i8** nocapture readnone %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Mali_SetBase(int *);
int /*<<< orphan*/ RunMaliTest_sim3_t760_part0();
int /*<<< orphan*/ RunMaliTest_sim3_t760_part1();
int RunMaliTest_sim3_t760(int *base) {
  Mali_SetBase(base);
  RunMaliTest_sim3_t760_part0();
  RunMaliTest_sim3_t760_part1();
}


x86 assembly (clang, -O0):
<RunMaliTest_sim3_t760>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <Mali_SetBase@plt>
mov    $0x0,%al
call   1030 <RunMaliTest_sim3_t760_part0@plt>
mov    $0x0,%al
call   1040 <RunMaliTest_sim3_t760_part1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RunMaliTest_sim3_t760>:
push   %rax
call   1050 <Mali_SetBase@plt>
xor    %eax,%eax
call   1030 <RunMaliTest_sim3_t760_part0@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <RunMaliTest_sim3_t760_part1@plt>

LLVM IR (-O0):
define i32 @RunMaliTest_sim3_t760(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @Mali_SetBase(i32* %4)
%6 = call i32 (...) @RunMaliTest_sim3_t760_part0()
%7 = call i32 (...) @RunMaliTest_sim3_t760_part1()
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @RunMaliTest_sim3_t760(i32* %0) {
%2 = tail call i32 @Mali_SetBase(i32* %0)
%3 = tail call i32 (...) @RunMaliTest_sim3_t760_part0()
%4 = tail call i32 (...) @RunMaliTest_sim3_t760_part1()
ret i32 undef
}
int test_imm_EEuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xEE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EEuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xee,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EEuint64_midword_reg>:
test   $0xee0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EEuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 238
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EEuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 15597568
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int child_fn(void *arg) { exit(0); }


x86 assembly (clang, -O0):
<child_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<child_fn>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @child_fn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @child_fn(i8* nocapture readnone %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
int ASNDerCalcNumLengthBytes(long nLength) {
  if (nLength <= 0x7F) {
    return 1;
  } else if (nLength <= 0xFF) {
    return 2;
  } else if (nLength <= 0xFFFF) {
    return 3;
  } else if (nLength <= 0xFFFFFF) {
    return 4;
  } else {
    return 5;
  }
}


x86 assembly (clang, -O0):
<ASNDerCalcNumLengthBytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x7f,-0x10(%rbp)
jg     111f <ASNDerCalcNumLengthBytes+0x1f>
movl   $0x1,-0x4(%rbp)
jmp    1174 <ASNDerCalcNumLengthBytes+0x74>
cmpq   $0xff,-0x10(%rbp)
jg     1139 <ASNDerCalcNumLengthBytes+0x39>
movl   $0x2,-0x4(%rbp)
jmp    1174 <ASNDerCalcNumLengthBytes+0x74>
cmpq   $0xffff,-0x10(%rbp)
jg     1153 <ASNDerCalcNumLengthBytes+0x53>
movl   $0x3,-0x4(%rbp)
jmp    1174 <ASNDerCalcNumLengthBytes+0x74>
cmpq   $0xffffff,-0x10(%rbp)
jg     116d <ASNDerCalcNumLengthBytes+0x6d>
movl   $0x4,-0x4(%rbp)
jmp    1174 <ASNDerCalcNumLengthBytes+0x74>
movl   $0x5,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASNDerCalcNumLengthBytes>:
mov    $0x1,%eax
cmp    $0x80,%rdi
jl     1139 <ASNDerCalcNumLengthBytes+0x39>
mov    $0x2,%eax
cmp    $0x100,%rdi
jb     1139 <ASNDerCalcNumLengthBytes+0x39>
mov    $0x3,%eax
cmp    $0x10000,%rdi
jb     1139 <ASNDerCalcNumLengthBytes+0x39>
cmp    $0x1000000,%rdi
mov    $0x5,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @ASNDerCalcNumLengthBytes(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp sle i64 %4, 127
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %20
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp sle i64 %8, 255
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 2, i32* %2
br label %20
11: ; preds = %7
%12 = load i64, i64* %3
%13 = icmp sle i64 %12, 65535
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 3, i32* %2
br label %20
15: ; preds = %11
%16 = load i64, i64* %3
%17 = icmp sle i64 %16, 16777215
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 4, i32* %2
br label %20
19: ; preds = %15
store i32 5, i32* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @ASNDerCalcNumLengthBytes(i64 %0) {
%2 = icmp slt i64 %0, 128
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 256
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ult i64 %0, 65536
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ult i64 %0, 16777216
%9 = select i1 %8, i32 4, i32 5
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 2, %3 ], [ 3, %5 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_standard_multi_homogenization(int m) {
  int fail;
  int b;
  double c;
  fail = _ada_use_c2phc4c(910, &m, &b, &c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_standard_multi_homogenization>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x38e,%edi
lea    -0x4(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x18(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_standard_multi_homogenization>:
sub    $0x18,%rsp
mov    %edi,0x8(%rsp)
lea    0x8(%rsp),%rsi
lea    0xc(%rsp),%rdx
lea    0x10(%rsp),%rcx
mov    $0x38e,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @solcon_standard_multi_homogenization(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %2
%6 = call i32 @_ada_use_c2phc4c(i32 910, i32* %2, i32* %4, double* %5, i32 0)
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @solcon_standard_multi_homogenization(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %2
%5 = bitcast i32* %3 to i8*
%6 = bitcast double* %4 to i8*
%7 = call i32 @_ada_use_c2phc4c(i32 910, i32* %2, i32* %3, double* %4, i32 0)
ret i32 %7
}
/* Variables and functions */
unsigned int i2i(unsigned int);
__attribute__((__visibility__("default"))) __attribute__((used)) unsigned int
ri2i(unsigned int *x) {
  return i2i(*x);
}


x86 assembly (clang, -O0):
<ri2i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <i2i@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ri2i>:
mov    (%rdi),%edi
jmp    1030 <i2i@plt>

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (i32*)* @ri2i to i8*)], section "llvm.metadata"
define i32 @ri2i(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @i2i(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (i32*)* @ri2i to i8*)], section "llvm.metadata"
define i32 @ri2i(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @i2i(i32 %2)
ret i32 %3
}
/* Type definitions */
struct eventrec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mpool_eventrec_free(struct eventrec *);
void events_freerec(struct eventrec *r) { mpool_eventrec_free(r); }


x86 assembly (clang, -O0):
<events_freerec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mpool_eventrec_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<events_freerec>:
jmp    1030 <mpool_eventrec_free@plt>

LLVM IR (-O0):
%struct.eventrec = type { i32 }
define void @events_freerec(%struct.eventrec* %0) {
%2 = alloca %struct.eventrec*
store %struct.eventrec* %0, %struct.eventrec** %2
%3 = load %struct.eventrec*, %struct.eventrec** %2
%4 = call i32 @mpool_eventrec_free(%struct.eventrec* %3)
ret void
}

LLVM IR (-O2):
%struct.eventrec = type { i32 }
define void @events_freerec(%struct.eventrec* %0) {
%2 = tail call i32 @mpool_eventrec_free(%struct.eventrec* %0)
ret void
}
/* Variables and functions */
int MATH_ERRNO;
int scalanative_math_errno() { return MATH_ERRNO; }


x86 assembly (clang, -O0):
<scalanative_math_errno>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalanative_math_errno>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@MATH_ERRNO = global i32 0
define i32 @scalanative_math_errno() {
%1 = load i32, i32* @MATH_ERRNO
ret i32 %1
}

LLVM IR (-O2):
@MATH_ERRNO = global i32 0
define i32 @scalanative_math_errno() {
%1 = load i32, i32* @MATH_ERRNO
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void switch_status(int machine_status, int switch_status) {
  if ((switch_status & machine_status) != 0) {
    printf("switch is ON!\n");
  } else {
    printf("switch is OFF!\n");
  }
}


x86 assembly (clang, -O0):
<switch_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
cmp    $0x0,%eax
je     113e <switch_status+0x2e>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
jmp    114a <switch_status+0x3a>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_status>:
test   %edi,%esi
lea    0xee7(%rip),%rax
lea    0xeef(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"switch is ON!\0A\00"
@.str.1 = [16 x i8] c"switch is OFF!\0A\00"
define void @switch_status(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = and i32 %5, %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %13
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %9
ret void
}

LLVM IR (-O2):
@str = [15 x i8] c"switch is OFF!\00"
@str.2 = [14 x i8] c"switch is ON!\00"
define void @switch_status(i32 %0, i32 %1) {
%3 = and i32 %1, %0
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @str.2, i64 0, i64 0)
%6 = tail call i32 @puts(i8* dereferenceable(1) %5)
ret void
}
unsigned xrop3_8_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = D & stk3;
  stk1 = S & stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_8_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_8_0_0>:
not    %sil
and    %dil,%sil
movzbl %sil,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_8_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
ret i32 %31
}

LLVM IR (-O2):
define i32 @xrop3_8_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = xor i8 %1, -1
%4 = and i8 %3, %0
%5 = zext i8 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *t;
  t = malloc(size);
  if (!t)
    fatal("Unable to allocate enough memory.");
  return t;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <xmalloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <xmalloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"Unable to allocate enough memory.\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @fatal(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [34 x i8] c"Unable to allocate enough memory.\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fatal(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int main() {
  char string[] = "Hello, there!\n";
  char *s;
  s = string;
  while (1) {
    if (*s == '\0')
      break;
    putchar(*s);
    s++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x13(%rbp)
mov    0xed8(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xed2(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xeca(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0x13(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1164 <main+0x54>
jmp    1181 <main+0x71>
mov    -0x20(%rbp),%rax
movsbl (%rax),%edi
call   1030 <putchar@plt>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    114f <main+0x3f>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movabs $0xa216572656874,%rax
mov    %rax,0x7(%rsp)
movabs $0x74202c6f6c6c6548,%rax
2c 20 74
mov    %rax,(%rsp)
lea    0x1(%rsp),%rbx
mov    $0x48,%al
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1140 <main+0x30>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.string = [15 x i8] c"Hello, there!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [15 x i8]
%3 = alloca i8*
store i32 0, i32* %1
%4 = bitcast [15 x i8]* %2 to i8*
%5 = getelementptr inbounds [15 x i8], [15 x i8]* %2, i64 0, i64 0
store i8* %5, i8** %3
br label %6
6: ; preds = %0, %12
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %6
br label %18
12: ; preds = %6
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = call i32 @putchar(i8 signext %14)
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %6
18: ; preds = %11
ret i32 0
}

LLVM IR (-O2):
@__const.main.string = [15 x i8] c"Hello, there!\0A\00"
define i32 @main() {
%1 = alloca [15 x i8]
%2 = getelementptr inbounds [15 x i8], [15 x i8]* %1, i64 0, i64 0
br label %3
3: ; preds = %0, %3
%4 = phi i8 [ %8, %3 ], [ 72, %0 ]
%5 = phi i8* [ %7, %3 ], [ %2, %0 ]
%6 = tail call i32 @putchar(i8 signext %4)
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i32 0
}
void BIO_test_flags(void) {}


x86 assembly (clang, -O0):
<BIO_test_flags>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_test_flags>:
ret

LLVM IR (-O0):
define void @BIO_test_flags() {
ret void
}

LLVM IR (-O2):
define void @BIO_test_flags() {
ret void
}
int f(int *a) {
  int b;
  return (&b > a) ? 1 : 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %rsi,%rdx
cmova  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x4(%rsp),%rcx
xor    %eax,%eax
cmp    %rdi,%rcx
seta   %al
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ugt i32* %3, %4
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32* readnone %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = icmp ugt i32* %2, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
int init_timer(void) { return 0; }


x86 assembly (clang, -O0):
<init_timer>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_timer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @init_timer() {
ret i32 0
}

LLVM IR (-O2):
define i32 @init_timer() {
ret i32 0
}