#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void PECIAdvCmdSend(unsigned long ulBase, unsigned char ucCmd,
                    unsigned char ucHidRe, unsigned char ucDomain,
                    unsigned char ucProcAdd, unsigned long ulArg,
                    unsigned char ucSize, unsigned long ulData0,
                    unsigned long ulData1) {
  DEBUG_ASSERT(ulBase == 0x400B0000);
  while ((*((volatile unsigned long *)(ulBase + 0x00000114))) == 0xFFFFFFFF) {
  }
  (*((volatile unsigned long *)(ulBase + 0x00000104))) = ulArg;
  (*((volatile unsigned long *)(ulBase + 0x00000108))) = ulData0;
  (*((volatile unsigned long *)(ulBase + 0x0000010C))) = ulData1;
  (*((volatile unsigned long *)(ulBase + 0x00000100))) =
      (ucHidRe << 24) | (ucSize << 16) | (ucDomain << 8) | (ucProcAdd << 0);
  (*((volatile unsigned long *)(ulBase + 0x00000110))) = ucCmd;
}


x86 assembly (clang, -O0):
<PECIAdvCmdSend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %r8b,%al
mov    0x20(%rbp),%r8
mov    0x18(%rbp),%r8
mov    0x10(%rbp),%r8b
mov    %rdi,-0x8(%rbp)
mov    %sil,-0x9(%rbp)
mov    %dl,-0xa(%rbp)
mov    %cl,-0xb(%rbp)
mov    %al,-0xc(%rbp)
mov    %r9,-0x18(%rbp)
cmpq   $0x400b0000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x114(%rax),%rax
mov    $0xffffffff,%ecx
cmp    %rcx,%rax
jne    116f <PECIAdvCmdSend+0x5f>
jmp    1151 <PECIAdvCmdSend+0x41>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x104(%rax)
mov    0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x108(%rax)
mov    0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10c(%rax)
movzbl -0xa(%rbp),%eax
shl    $0x18,%eax
movzbl 0x10(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
movzbl -0xb(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzbl -0xc(%rbp),%ecx
shl    $0x0,%ecx
or     %ecx,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x100(%rax)
movzbl -0x9(%rbp),%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x110(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIAdvCmdSend>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %r9,%r13
mov    %r8d,%r15d
mov    %ecx,%r12d
mov    %edx,%ebp
mov    %esi,%r14d
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x400b0000,%rbx
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    0x114(%rbx),%rcx
cmp    %rax,%rcx
je     1150 <PECIAdvCmdSend+0x40>
mov    %r13,0x104(%rbx)
mov    0x48(%rsp),%rax
mov    %rax,0x108(%rbx)
mov    0x50(%rsp),%rax
mov    %rax,0x10c(%rbx)
movzbl %bpl,%eax
shl    $0x18,%eax
movzbl 0x40(%rsp),%ecx
shl    $0x10,%ecx
or     %eax,%ecx
movzbl %r12b,%eax
shl    $0x8,%eax
or     %ecx,%eax
movzbl %r15b,%ecx
or     %eax,%ecx
movslq %ecx,%rax
mov    %rax,0x100(%rbx)
movzbl %r14b,%eax
mov    %rax,0x110(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @PECIAdvCmdSend(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i64 %5, i8 zeroext %6, i64 %7, i64 %8) {
%10 = alloca i64
%11 = alloca i8
%12 = alloca i8
%13 = alloca i8
%14 = alloca i8
%15 = alloca i64
%16 = alloca i8
%17 = alloca i64
%18 = alloca i64
store i64 %0, i64* %10
store i8 %1, i8* %11
store i8 %2, i8* %12
store i8 %3, i8* %13
store i8 %4, i8* %14
store i64 %5, i64* %15
store i8 %6, i8* %16
store i64 %7, i64* %17
store i64 %8, i64* %18
%19 = load i64, i64* %10
%20 = icmp eq i64 %19, 1074462720
%21 = zext i1 %20 to i32
%22 = call i32 @DEBUG_ASSERT(i32 %21)
br label %23
23: ; preds = %29, %9
%24 = load i64, i64* %10
%25 = add i64 %24, 276
%26 = inttoptr i64 %25 to i64*
%27 = load volatile i64, i64* %26
%28 = icmp eq i64 %27, 4294967295
br i1 %28, label %29, label %30
29: ; preds = %23
br label %23
30: ; preds = %23
%31 = load i64, i64* %15
%32 = load i64, i64* %10
%33 = add i64 %32, 260
%34 = inttoptr i64 %33 to i64*
store volatile i64 %31, i64* %34
%35 = load i64, i64* %17
%36 = load i64, i64* %10
%37 = add i64 %36, 264
%38 = inttoptr i64 %37 to i64*
store volatile i64 %35, i64* %38
%39 = load i64, i64* %18
%40 = load i64, i64* %10
%41 = add i64 %40, 268
%42 = inttoptr i64 %41 to i64*
store volatile i64 %39, i64* %42
%43 = load i8, i8* %12
%44 = zext i8 %43 to i32
%45 = shl i32 %44, 24
%46 = load i8, i8* %16
%47 = zext i8 %46 to i32
%48 = shl i32 %47, 16
%49 = or i32 %45, %48
%50 = load i8, i8* %13
%51 = zext i8 %50 to i32
%52 = shl i32 %51, 8
%53 = or i32 %49, %52
%54 = load i8, i8* %14
%55 = zext i8 %54 to i32
%56 = shl i32 %55, 0
%57 = or i32 %53, %56
%58 = sext i32 %57 to i64
%59 = load i64, i64* %10
%60 = add i64 %59, 256
%61 = inttoptr i64 %60 to i64*
store volatile i64 %58, i64* %61
%62 = load i8, i8* %11
%63 = zext i8 %62 to i64
%64 = load i64, i64* %10
%65 = add i64 %64, 272
%66 = inttoptr i64 %65 to i64*
store volatile i64 %63, i64* %66
ret void
}

LLVM IR (-O2):
define void @PECIAdvCmdSend(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i64 %5, i8 zeroext %6, i64 %7, i64 %8) {
%10 = icmp eq i64 %0, 1074462720
%11 = zext i1 %10 to i32
%12 = tail call i32 @DEBUG_ASSERT(i32 %11)
%13 = add i64 %0, 276
%14 = inttoptr i64 %13 to i64*
br label %15
15: ; preds = %15, %9
%16 = load volatile i64, i64* %14
%17 = icmp eq i64 %16, 4294967295
br i1 %17, label %15, label %18
18: ; preds = %15
%19 = add i64 %0, 260
%20 = inttoptr i64 %19 to i64*
store volatile i64 %5, i64* %20
%21 = add i64 %0, 264
%22 = inttoptr i64 %21 to i64*
store volatile i64 %7, i64* %22
%23 = add i64 %0, 268
%24 = inttoptr i64 %23 to i64*
store volatile i64 %8, i64* %24
%25 = zext i8 %2 to i32
%26 = shl nuw i32 %25, 24
%27 = zext i8 %6 to i32
%28 = shl nuw nsw i32 %27, 16
%29 = or i32 %28, %26
%30 = zext i8 %3 to i32
%31 = shl nuw nsw i32 %30, 8
%32 = or i32 %29, %31
%33 = zext i8 %4 to i32
%34 = or i32 %32, %33
%35 = sext i32 %34 to i64
%36 = add i64 %0, 256
%37 = inttoptr i64 %36 to i64*
store volatile i64 %35, i64* %37
%38 = zext i8 %1 to i64
%39 = add i64 %0, 272
%40 = inttoptr i64 %39 to i64*
store volatile i64 %38, i64* %40
ret void
}