xunge/DecIR huggingface dataset:
/* Type definitions */
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int NSS_STATUS_SUCCESS;
enum nss_status _nss_noenum_endpwent(void) { return NSS_STATUS_SUCCESS; }


x86 assembly (clang, -O0):
<_nss_noenum_endpwent>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_noenum_endpwent>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@NSS_STATUS_SUCCESS = global i32 0
define i32 @_nss_noenum_endpwent() {
%1 = load i32, i32* @NSS_STATUS_SUCCESS
ret i32 %1
}

LLVM IR (-O2):
@NSS_STATUS_SUCCESS = global i32 0
define i32 @_nss_noenum_endpwent() {
%1 = load i32, i32* @NSS_STATUS_SUCCESS
ret i32 %1
}
/* Type definitions */
struct lrt_trans {
  int dummy;
};

/* Variables and functions */
scalar_t__ lrt_trans_gmem();
scalar_t__ lrt_trans_idbase();
scalar_t__ lrt_trans_offset(uintptr_t, uintptr_t);
uintptr_t lrt_trans_gt2id(struct lrt_trans *t) {
  return (
      uintptr_t)(lrt_trans_idbase() +
                 lrt_trans_offset((uintptr_t)lrt_trans_gmem(), (uintptr_t)t));
}


x86 assembly (clang, -O0):
<lrt_trans_gt2id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <lrt_trans_idbase@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1050 <lrt_trans_gmem@plt>
mov    %rax,%rdi
mov    -0x8(%rbp),%rsi
call   1040 <lrt_trans_offset@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lrt_trans_gt2id>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <lrt_trans_idbase@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1050 <lrt_trans_gmem@plt>
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <lrt_trans_offset@plt>
add    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.lrt_trans = type { i32 }
define i64 @lrt_trans_gt2id(%struct.lrt_trans* %0) {
%2 = alloca %struct.lrt_trans*
store %struct.lrt_trans* %0, %struct.lrt_trans** %2
%3 = call i64 (...) @lrt_trans_idbase()
%4 = call i64 (...) @lrt_trans_gmem()
%5 = load %struct.lrt_trans*, %struct.lrt_trans** %2
%6 = ptrtoint %struct.lrt_trans* %5 to i64
%7 = call i64 @lrt_trans_offset(i64 %4, i64 %6)
%8 = add nsw i64 %3, %7
ret i64 %8
}

LLVM IR (-O2):
%struct.lrt_trans = type { i32 }
define i64 @lrt_trans_gt2id(%struct.lrt_trans* %0) {
%2 = tail call i64 (...) @lrt_trans_idbase()
%3 = tail call i64 (...) @lrt_trans_gmem()
%4 = ptrtoint %struct.lrt_trans* %0 to i64
%5 = tail call i64 @lrt_trans_offset(i64 %3, i64 %4)
%6 = add nsw i64 %5, %2
ret i64 %6
}
/* Variables and functions */
scalar_t__ check_command(char **, char *, int);
int /*<<< orphan*/ skip_comma_in_command(char **);
int is_no_confirm_command(char **current_cmd) {
  skip_comma_in_command(current_cmd);
  if (check_command(current_cmd, "noconfirm", 9) == 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_no_confirm_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <skip_comma_in_command@plt>
mov    -0x10(%rbp),%rdi
lea    0xec0(%rip),%rsi
mov    $0x9,%edx
call   1040 <check_command@plt>
cmp    $0x0,%rax
jne    1160 <is_no_confirm_command+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1167 <is_no_confirm_command+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_no_confirm_command>:
push   %rbx
mov    %rdi,%rbx
call   1030 <skip_comma_in_command@plt>
lea    0xed0(%rip),%rsi
mov    %rbx,%rdi
mov    $0x9,%edx
call   1040 <check_command@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"noconfirm\00"
define i32 @is_no_confirm_command(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
store i8** %0, i8*** %3
%4 = load i8**, i8*** %3
%5 = call i32 @skip_comma_in_command(i8** %4)
%6 = load i8**, i8*** %3
%7 = call i64 @check_command(i8** %6, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 9)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [10 x i8] c"noconfirm\00"
define i32 @is_no_confirm_command(i8** %0) {
%2 = tail call i32 @skip_comma_in_command(i8** %0)
%3 = tail call i64 @check_command(i8** %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 9)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
float _add(float operando1, float operando2) { return operando1 + operando2; }


x86 assembly (clang, -O0):
<_add>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_add>:
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @_add(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fadd float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @_add(float %0, float %1) {
%3 = fadd float %0, %1
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ AdcConductor_Init();
int /*<<< orphan*/ Interrupt_Enable();
int /*<<< orphan*/ Model_Init();
int /*<<< orphan*/ TimerConductor_Init();
int /*<<< orphan*/ UsartConductor_Init();
void Executor_Init(void) {
  Model_Init();
  UsartConductor_Init();
  AdcConductor_Init();
  TimerConductor_Init();
  Interrupt_Enable();
}


x86 assembly (clang, -O0):
<Executor_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <Model_Init@plt>
mov    $0x0,%al
call   1050 <UsartConductor_Init@plt>
mov    $0x0,%al
call   1030 <AdcConductor_Init@plt>
mov    $0x0,%al
call   1040 <TimerConductor_Init@plt>
mov    $0x0,%al
call   1060 <Interrupt_Enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Executor_Init>:
push   %rax
xor    %eax,%eax
call   1070 <Model_Init@plt>
xor    %eax,%eax
call   1050 <UsartConductor_Init@plt>
xor    %eax,%eax
call   1030 <AdcConductor_Init@plt>
xor    %eax,%eax
call   1040 <TimerConductor_Init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <Interrupt_Enable@plt>

LLVM IR (-O0):
define void @Executor_Init() {
%1 = call i32 (...) @Model_Init()
%2 = call i32 (...) @UsartConductor_Init()
%3 = call i32 (...) @AdcConductor_Init()
%4 = call i32 (...) @TimerConductor_Init()
%5 = call i32 (...) @Interrupt_Enable()
ret void
}

LLVM IR (-O2):
define void @Executor_Init() {
%1 = tail call i32 (...) @Model_Init()
%2 = tail call i32 (...) @UsartConductor_Init()
%3 = tail call i32 (...) @AdcConductor_Init()
%4 = tail call i32 (...) @TimerConductor_Init()
%5 = tail call i32 (...) @Interrupt_Enable()
ret void
}
void __attribute__((weak)) weakBrace1(void) {}


x86 assembly (clang, -O0):
<weakBrace1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<weakBrace1>:
ret

LLVM IR (-O0):
define weak void @weakBrace1() {
ret void
}

LLVM IR (-O2):
define weak void @weakBrace1() {
ret void
}
/* Variables and functions */
int domain_to_first_cpu(int);
int partition_to_cpu(int partition) { return domain_to_first_cpu(partition); }


x86 assembly (clang, -O0):
<partition_to_cpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <domain_to_first_cpu@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<partition_to_cpu>:
jmp    1030 <domain_to_first_cpu@plt>

LLVM IR (-O0):
define i32 @partition_to_cpu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @domain_to_first_cpu(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @partition_to_cpu(i32 %0) {
%2 = tail call i32 @domain_to_first_cpu(i32 %0)
ret i32 %2
}
/* Variables and functions */
double rtlg2(double, double);
double ltlg2(double a, double x) { return 1.0 - rtlg2(a, x); }


x86 assembly (clang, -O0):
<ltlg2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <rtlg2@plt>
movaps %xmm0,%xmm1
movsd  0xec4(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltlg2>:
push   %rax
call   1030 <rtlg2@plt>
movsd  0xee2(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @ltlg2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @rtlg2(double %5, double %6)
%8 = fsub double 1.000000e+00, %7
ret double %8
}

LLVM IR (-O2):
define double @ltlg2(double %0, double %1) {
%3 = tail call double @rtlg2(double %0, double %1)
%4 = fsub double 1.000000e+00, %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ pause();
int /*<<< orphan*/ printf(char *);
void *thr_fn(void *arg) {
  printf("thread started...\n");
  pause();
  printf("after pause...\n");
  return 0;
}


x86 assembly (clang, -O0):
<thr_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <pause@plt>
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_fn>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <pause@plt>
lea    0xed7(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"thread started...\0A\00"
@.str.1 = [16 x i8] c"after pause...\0A\00"
define i8* @thr_fn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @pause()
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@str = [18 x i8] c"thread started...\00"
@str.2 = [15 x i8] c"after pause...\00"
define noalias i8* @thr_fn(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @pause()
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.2, i64 0, i64 0))
ret i8* null
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
extern int TakeAString(char *pass_msg) {
  if (0 == strcmp(pass_msg, "ok 6 - passed a string"))
    return 6;
  return 0;
}


x86 assembly (clang, -O0):
<TakeAString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jne    1146 <TakeAString+0x36>
movl   $0x6,-0x4(%rbp)
jmp    114d <TakeAString+0x3d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TakeAString>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
mov    $0x6,%eax
cmovne %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"ok 6 - passed a string\00"
define i32 @TakeAString(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 0, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 6, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [23 x i8] c"ok 6 - passed a string\00"
define i32 @TakeAString(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 6, i32 0
ret i32 %4
}
SIGNR(statlink, n) int *statlink;
register double n;
{ return (n < 0.0 ? -1 : n == 0.0 ? 0 : 1); }


x86 assembly (clang, -O0):
<SIGNR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1128 <SIGNR+0x28>
mov    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    114b <SIGNR+0x4b>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
mov    $0x1,%eax
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
setnp  %sil
sete   %dl
test   %sil,%dl
cmovne %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIGNR>:
xorpd  %xmm1,%xmm1
movapd %xmm0,%xmm2
cmpneqsd %xmm1,%xmm2
movq   %xmm2,%rcx
and    $0x1,%ecx
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @SIGNR(i32* %0, double %1) {
%3 = alloca i32*
%4 = alloca double
store i32* %0, i32** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %8
7: ; preds = %2
br label %13
8: ; preds = %2
%9 = load double, double* %4
%10 = fcmp oeq double %9, 0.000000e+00
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 0, i32 1
br label %13
13: ; preds = %8, %7
%14 = phi i32 [ -1, %7 ], [ %12, %8 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @SIGNR(i32* nocapture readnone %0, double %1) {
%3 = fcmp olt double %1, 0.000000e+00
%4 = fcmp une double %1, 0.000000e+00
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 -1, i32 %5
ret i32 %6
}
_Complex double test_cacos(_Complex double x) { return __builtin_cacos(x); }


x86 assembly (clang, -O0):
<test_cacos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x20(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  %xmm1,-0x30(%rbp)
movsd  %xmm0,-0x28(%rbp)
movsd  -0x30(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm1
call   1030 <cacos@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_cacos>:
jmp    1030 <cacos@plt>

LLVM IR (-O0):
define { double, double } @test_cacos(double %0, double %1) {
%3 = alloca { double, double }
%4 = alloca { double, double }
%5 = alloca { double, double }
%6 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 0
store double %0, double* %6
%7 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 1
store double %1, double* %7
%8 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 0
%9 = load double, double* %8
%10 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 1
%11 = load double, double* %10
%12 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 0
%13 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 1
store double %9, double* %12
store double %11, double* %13
%14 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 0
%15 = load double, double* %14
%16 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 1
%17 = load double, double* %16
%18 = call { double, double } @cacos(double %15, double %17)
%19 = extractvalue { double, double } %18, 0
%20 = extractvalue { double, double } %18, 1
%21 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%22 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
store double %19, double* %21
store double %20, double* %22
%23 = load { double, double }, { double, double }* %3
ret { double, double } %23
}

LLVM IR (-O2):
define { double, double } @test_cacos(double %0, double %1) {
%3 = tail call { double, double } @cacos(double %0, double %1)
ret { double, double } %3
}
void rop3_251_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~S;
  stk2 = T | stk3;
  stk1 = *D | stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_251_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_251_1_0>:
not    %sil
or     %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_251_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8, i8* %6
%15 = zext i8 %14 to i32
%16 = load i8, i8* %9
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8*, i8** %4
%34 = load i8, i8* %33
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = and i32 %35, %37
%39 = or i32 %32, %38
%40 = trunc i32 %39 to i8
%41 = load i8*, i8** %4
store i8 %40, i8* %41
ret void
}

LLVM IR (-O2):
define void @rop3_251_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %1, -1
%5 = load i8, i8* %0
%6 = or i8 %5, %4
store i8 %6, i8* %0
ret void
}
void SetModelSize(double *subjectSize) {}


x86 assembly (clang, -O0):
<SetModelSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetModelSize>:
ret

LLVM IR (-O0):
define void @SetModelSize(double* %0) {
%2 = alloca double*
store double* %0, double** %2
ret void
}

LLVM IR (-O2):
define void @SetModelSize(double* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void free_uvector(unsigned int *v, int nl, int nh) { free((int *)(v + nl)); }


x86 assembly (clang, -O0):
<free_uvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_uvector>:
movslq %esi,%rax
lea    (%rdi,%rax,4),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_uvector(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
%11 = call i32 @free(i32* %10)
ret void
}

LLVM IR (-O2):
define void @free_uvector(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = tail call i32 @free(i32* %5)
ret void
}
int GLUE_RESET_ESI(unsigned char *out, void *ptr) {
  if (out) {
    *out++ = 0x48;
    *out++ = 0xBE;
    *(void **)out = ptr;
    out += sizeof(void *);
  }
  return 2 + sizeof(void *);
}


x86 assembly (clang, -O0):
<GLUE_RESET_ESI>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1152 <GLUE_RESET_ESI+0x52>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x48,(%rax)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0xbe,(%rax)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLUE_RESET_ESI>:
test   %rdi,%rdi
je     110e <GLUE_RESET_ESI+0xe>
movw   $0xbe48,(%rdi)
mov    %rsi,0x2(%rdi)
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @GLUE_RESET_ESI(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %17
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %3
store i8 72, i8* %8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
store i8 -66, i8* %10
%12 = load i8*, i8** %4
%13 = load i8*, i8** %3
%14 = bitcast i8* %13 to i8**
store i8* %12, i8** %14
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 8
store i8* %16, i8** %3
br label %17
17: ; preds = %7, %2
ret i32 10
}

LLVM IR (-O2):
define i32 @GLUE_RESET_ESI(i8* writeonly %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, i8* %0, i64 1
store i8 72, i8* %0
%6 = getelementptr inbounds i8, i8* %0, i64 2
store i8 -66, i8* %5
%7 = bitcast i8* %6 to i8**
store i8* %1, i8** %7
br label %8
8: ; preds = %4, %2
ret i32 10
}
void pthread_cond_signal() {}


x86 assembly (clang, -O0):
<pthread_cond_signal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_signal>:
ret

LLVM IR (-O0):
define void @pthread_cond_signal() {
ret void
}

LLVM IR (-O2):
define void @pthread_cond_signal() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void FanIntDisable(unsigned long ulBase, unsigned long ulFlags) {
  DEBUG_ASSERT(ulBase == 0x40084000);
  (*((volatile unsigned long *)(ulBase + 0x00000090))) &= ~ulFlags;
}


x86 assembly (clang, -O0):
<FanIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x40084000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x90(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x90(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FanIntDisable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x40084000,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
not    %rbx
and    %rbx,0x90(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @FanIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074282496
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %4
%10 = xor i64 %9, -1
%11 = load i64, i64* %3
%12 = add i64 %11, 144
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = and i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @FanIntDisable(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074282496
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = xor i64 %1, -1
%7 = add i64 %0, 144
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, %6
store volatile i64 %10, i64* %8
ret void
}
void myth_log_init(void) {}


x86 assembly (clang, -O0):
<myth_log_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myth_log_init>:
ret

LLVM IR (-O0):
define void @myth_log_init() {
ret void
}

LLVM IR (-O2):
define void @myth_log_init() {
ret void
}
void ff_hevc_put_hevc_uni_w_qpel_v24_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v24_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v24_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v24_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v24_8_sse4() {
ret void
}
int *fx(int *b, int *e) {
  long unsigned int p = e - b;
  return b + p;
}


x86 assembly (clang, -O0):
<fx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fx>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i32* @fx(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i64
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = load i32*, i32** %3
%8 = ptrtoint i32* %6 to i64
%9 = ptrtoint i32* %7 to i64
%10 = sub i64 %8, %9
%11 = sdiv exact i64 %10, 4
store i64 %11, i64* %5
%12 = load i32*, i32** %3
%13 = load i64, i64* %5
%14 = getelementptr inbounds i32, i32* %12, i64 %13
ret i32* %14
}

LLVM IR (-O2):
define i32* @fx(i32* %0, i32* %1) {
%3 = ptrtoint i32* %1 to i64
%4 = ptrtoint i32* %0 to i64
%5 = sub i64 %3, %4
%6 = ashr exact i64 %5, 2
%7 = getelementptr inbounds i32, i32* %0, i64 %6
ret i32* %7
}
int isincr(int num) {
  int prev;
  prev = 11;
  while (num) {
    if (prev < (num % 10))
      return 0;
    prev = num % 10;
    num /= 10;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isincr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0xb,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1161 <isincr+0x61>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
cmp    %edx,%eax
jge    1140 <isincr+0x40>
movl   $0x0,-0x4(%rbp)
jmp    1168 <isincr+0x68>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    110e <isincr+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isincr>:
mov    $0x1,%eax
test   %edi,%edi
je     1141 <isincr+0x41>
mov    $0xb,%ecx
xchg   %ax,%ax
mov    %ecx,%r8d
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdx
mov    %rdx,%rsi
shr    $0x3f,%rsi
sar    $0x22,%rdx
add    %esi,%edx
lea    (%rdx,%rdx,1),%esi
lea    (%rsi,%rsi,4),%esi
sub    %esi,%ecx
cmp    %ecx,%r8d
jl     1142 <isincr+0x42>
add    $0x9,%edi
cmp    $0x12,%edi
mov    %edx,%edi
ja     1110 <isincr+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isincr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 11, i32* %4
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = srem i32 %10, 10
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 0, i32* %2
br label %20
14: ; preds = %8
%15 = load i32, i32* %3
%16 = srem i32 %15, 10
store i32 %16, i32* %4
%17 = load i32, i32* %3
%18 = sdiv i32 %17, 10
store i32 %18, i32* %3
br label %5
19: ; preds = %5
store i32 1, i32* %2
br label %20
20: ; preds = %19, %13
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @isincr(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %9
%4 = phi i32 [ %6, %9 ], [ 11, %1 ]
%5 = phi i32 [ %7, %9 ], [ %0, %1 ]
%6 = srem i32 %5, 10
%7 = sdiv i32 %5, 10
%8 = icmp slt i32 %4, %6
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = add i32 %5, 9
%11 = icmp ult i32 %10, 19
br i1 %11, label %12, label %3
12: ; preds = %3, %9, %1
%13 = phi i32 [ 1, %1 ], [ 1, %9 ], [ 0, %3 ]
ret i32 %13
}
int f3(int a, int b) { return a == 19 && b == 34; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x13,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jne    1123 <f3+0x23>
cmpl   $0x22,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
xor    $0x13,%edi
xor    $0x22,%esi
xor    %eax,%eax
or     %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @f3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 19
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 34
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @f3(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 19
%4 = icmp eq i32 %1, 34
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int /*<<< orphan*/ debugf(char *, int);
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ kill(int /*<<< orphan*/, int);
int /*<<< orphan*/ kill_all();
void signal_handler(int signum) {
  debugf("reaper: signal %d", signum);
  kill_all();
  kill(getpid(), signum);
  _exit(64);
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xe9b(%rip),%rdi
call   1050 <debugf@plt>
mov    $0x0,%al
call   1060 <kill_all@plt>
mov    $0x0,%al
call   1040 <getpid@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
call   1070 <kill@plt>
mov    $0x40,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<signal_handler>:
push   %rbx
mov    %edi,%ebx
lea    0xea6(%rip),%rdi
mov    %ebx,%esi
call   1050 <debugf@plt>
xor    %eax,%eax
call   1060 <kill_all@plt>
xor    %eax,%eax
call   1040 <getpid@plt>
mov    %eax,%edi
mov    %ebx,%esi
call   1070 <kill@plt>
mov    $0x40,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"reaper: signal %d\00"
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @debugf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 (...) @kill_all()
%6 = call i32 (...) @getpid()
%7 = load i32, i32* %2
%8 = call i32 @kill(i32 %6, i32 %7)
%9 = call i32 @_exit(i32 64)
unreachable
}

LLVM IR (-O2):
@.str = [18 x i8] c"reaper: signal %d\00"
define void @signal_handler(i32 %0) {
%2 = tail call i32 @debugf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 (...) @kill_all()
%4 = tail call i32 (...) @getpid()
%5 = tail call i32 @kill(i32 %4, i32 %0)
%6 = tail call i32 @_exit(i32 64)
unreachable
}
void f(int *a) {
  int i;
  for (i = 3; --i;)
    a[i] = 42 / i;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
je     113c <f+0x3c>
mov    $0x2a,%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
jmp    110f <f+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movabs $0x150000002a,%rax
mov    %rax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @f(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 3, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = add nsw i32 %5, -1
store i32 %6, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = load i32, i32* %3
%10 = sdiv i32 42, %9
%11 = load i32*, i32** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 %10, i32* %14
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @f(i32* nocapture writeonly %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
store i32 21, i32* %2
%3 = getelementptr inbounds i32, i32* %0, i64 1
store i32 42, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DaoGC_Init();
void DaoGC_Start() { DaoGC_Init(); }


x86 assembly (clang, -O0):
<DaoGC_Start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DaoGC_Init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DaoGC_Start>:
xor    %eax,%eax
jmp    1030 <DaoGC_Init@plt>

LLVM IR (-O0):
define void @DaoGC_Start() {
%1 = call i32 (...) @DaoGC_Init()
ret void
}

LLVM IR (-O2):
define void @DaoGC_Start() {
%1 = tail call i32 (...) @DaoGC_Init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ left_motor(int);
int /*<<< orphan*/ right_motor(int);
void turn_backward(int speed) {
  left_motor(speed);
  right_motor(-speed);
}


x86 assembly (clang, -O0):
<turn_backward>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <left_motor@plt>
xor    %edi,%edi
sub    -0x4(%rbp),%edi
call   1040 <right_motor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<turn_backward>:
push   %rbx
mov    %edi,%ebx
call   1030 <left_motor@plt>
neg    %ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <right_motor@plt>

LLVM IR (-O0):
define void @turn_backward(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @left_motor(i32 %3)
%5 = load i32, i32* %2
%6 = sub nsw i32 0, %5
%7 = call i32 @right_motor(i32 %6)
ret void
}

LLVM IR (-O2):
define void @turn_backward(i32 %0) {
%2 = tail call i32 @left_motor(i32 %0)
%3 = sub nsw i32 0, %0
%4 = tail call i32 @right_motor(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ USART1_Configuration(int);
int dxl_hal_open(int devIndex, int baudrate) {
  USART1_Configuration(baudrate);
  return 1;
}


x86 assembly (clang, -O0):
<dxl_hal_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <USART1_Configuration@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dxl_hal_open>:
push   %rax
mov    %esi,%edi
call   1030 <USART1_Configuration@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dxl_hal_open(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @USART1_Configuration(i32 %5)
ret i32 1
}

LLVM IR (-O2):
define i32 @dxl_hal_open(i32 %0, i32 %1) {
%3 = tail call i32 @USART1_Configuration(i32 %1)
ret i32 1
}
int gcd(int a, int b) {
  int min = (a > b) ? b : a, max = (a > b) ? a : b;
  if (max % min == 0) {
    return min;
  }
  return gcd(min, max % min);
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1135 <gcd+0x25>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    113b <gcd+0x2b>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1158 <gcd+0x48>
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    115e <gcd+0x4e>
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cltd
idivl  -0x10(%rbp)
cmp    $0x0,%edx
jne    117f <gcd+0x6f>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1193 <gcd+0x83>
mov    -0x10(%rbp),%edi
mov    -0x14(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %edi,%eax
cmp    %edx,%edi
cmovg  %edx,%edi
cmovg  %eax,%edx
mov    %edx,%eax
cltd
idiv   %edi
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* %5
br label %15
13: ; preds = %2
%14 = load i32, i32* %4
br label %15
15: ; preds = %13, %11
%16 = phi i32 [ %12, %11 ], [ %14, %13 ]
store i32 %16, i32* %6
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = icmp sgt i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load i32, i32* %4
br label %24
22: ; preds = %15
%23 = load i32, i32* %5
br label %24
24: ; preds = %22, %20
%25 = phi i32 [ %21, %20 ], [ %23, %22 ]
store i32 %25, i32* %7
%26 = load i32, i32* %7
%27 = load i32, i32* %6
%28 = srem i32 %26, %27
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %32
30: ; preds = %24
%31 = load i32, i32* %6
store i32 %31, i32* %3
br label %38
32: ; preds = %24
%33 = load i32, i32* %6
%34 = load i32, i32* %7
%35 = load i32, i32* %6
%36 = srem i32 %34, %35
%37 = call i32 @gcd(i32 %33, i32 %36)
store i32 %37, i32* %3
br label %38
38: ; preds = %32, %30
%39 = load i32, i32* %3
ret i32 %39
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %7, %3 ]
%5 = phi i32 [ %1, %2 ], [ %9, %3 ]
%6 = icmp sgt i32 %4, %5
%7 = select i1 %6, i32 %5, i32 %4
%8 = select i1 %6, i32 %4, i32 %5
%9 = srem i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %3
11: ; preds = %3
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ dcpu_msg(char *);
void dumpheader(void) {
  dcpu_msg("pc   sp   ex   ia   a    b    c    x    y    z    i    j    iaq "
           "instruction\n"
           "---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- --- "
           "-----------\n");
}


x86 assembly (clang, -O0):
<dumpheader>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <dcpu_msg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpheader>:
lea    0xee9(%rip),%rdi
jmp    1030 <dcpu_msg@plt>

LLVM IR (-O0):
@.str = [153 x i8] c"pc sp ex ia a b c x y z i j iaq instruction\0A---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- --- -----------\0A\00"
define void @dumpheader() {
%1 = call i32 @dcpu_msg(i8* getelementptr inbounds ([153 x i8], [153 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [153 x i8] c"pc sp ex ia a b c x y z i j iaq instruction\0A---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- --- -----------\0A\00"
define void @dumpheader() {
%1 = tail call i32 @dcpu_msg(i8* getelementptr inbounds ([153 x i8], [153 x i8]* @.str, i64 0, i64 0))
ret void
}
int GetDigitLength(char *p) {
  int i;
  if (p == 0)
    return (0);
  for (i = 0; (*p != 0) && (*p >= '0') && (*p <= '9'); i++)
    ;
  return (i);
}


x86 assembly (clang, -O0):
<GetDigitLength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <GetDigitLength+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1189 <GetDigitLength+0x89>
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
je     1160 <GetDigitLength+0x60>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x15(%rbp)
jl     1160 <GetDigitLength+0x60>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1170 <GetDigitLength+0x70>
jmp    1183 <GetDigitLength+0x83>
jmp    1175 <GetDigitLength+0x75>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <GetDigitLength+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetDigitLength>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @GetDigitLength(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %32
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %27, %8
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %24
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp sge i32 %17, 48
br i1 %18, label %19, label %24
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %22, 57
br label %24
24: ; preds = %19, %14, %9
%25 = phi i1 [ false, %14 ], [ false, %9 ], [ %23, %19 ]
br i1 %25, label %26, label %30
26: ; preds = %24
br label %27
27: ; preds = %26
%28 = load i32, i32* %4
%29 = add nsw i32 %28, 1
store i32 %29, i32* %4
br label %9
30: ; preds = %24
%31 = load i32, i32* %4
store i32 %31, i32* %2
br label %32
32: ; preds = %30, %7
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @GetDigitLength(i8* %0) {
ret i32 0
}
/* Type definitions */
struct item {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ abort_crypto_lib(char *);
int /*<<< orphan*/ is_symmetric_encrypted(struct item *);
void check_is_symmetric_encrypted(struct item *item) {
  if (!is_symmetric_encrypted(item))
    abort_crypto_lib("Presented item is not an encrypted item");
}


x86 assembly (clang, -O0):
<check_is_symmetric_encrypted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <is_symmetric_encrypted@plt>
cmp    $0x0,%eax
jne    114a <check_is_symmetric_encrypted+0x2a>
lea    0xebb(%rip),%rdi
call   1040 <abort_crypto_lib@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_is_symmetric_encrypted>:
push   %rax
call   1030 <is_symmetric_encrypted@plt>
test   %eax,%eax
je     112c <check_is_symmetric_encrypted+0xc>
pop    %rax
ret
lea    0xecd(%rip),%rdi
pop    %rax
jmp    1040 <abort_crypto_lib@plt>

LLVM IR (-O0):
%struct.item = type { i32 }
@.str = [40 x i8] c"Presented item is not an encrypted item\00"
define void @check_is_symmetric_encrypted(%struct.item* %0) {
%2 = alloca %struct.item*
store %struct.item* %0, %struct.item** %2
%3 = load %struct.item*, %struct.item** %2
%4 = call i32 @is_symmetric_encrypted(%struct.item* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @abort_crypto_lib(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.item = type { i32 }
@.str = [40 x i8] c"Presented item is not an encrypted item\00"
define void @check_is_symmetric_encrypted(%struct.item* %0) {
%2 = tail call i32 @is_symmetric_encrypted(%struct.item* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @abort_crypto_lib(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
double f4_cb_send_pre_double_long(double (*cb)(double, long)) {
  long r = 33;
  return cb(8.25, r) + 1.0;
}


x86 assembly (clang, -O0):
<f4_cb_send_pre_double_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x21,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
movsd  0xee4(%rip),%xmm0
call   *%rax
movsd  0xed2(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_cb_send_pre_double_long>:
push   %rax
mov    %rdi,%rax
movsd  0xef4(%rip),%xmm0
mov    $0x21,%edi
call   *%rax
addsd  0xeed(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f4_cb_send_pre_double_long(double (double, i64)* %0) {
%2 = alloca double (double, i64)*
%3 = alloca i64
store double (double, i64)* %0, double (double, i64)** %2
store i64 33, i64* %3
%4 = load double (double, i64)*, double (double, i64)** %2
%5 = load i64, i64* %3
%6 = call double %4(double 8.250000e+00, i64 %5)
%7 = fadd double %6, 1.000000e+00
ret double %7
}

LLVM IR (-O2):
define double @f4_cb_send_pre_double_long(double (double, i64)* nocapture %0) {
%2 = tail call double %0(double 8.250000e+00, i64 33)
%3 = fadd double %2, 1.000000e+00
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ dt_destroy();
int /*<<< orphan*/ dt_init();
int /*<<< orphan*/ input_handle();
int main(int argc, char *argv[]) {
  dt_init();
  input_handle();
  dt_destroy();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <dt_init@plt>
mov    $0x0,%al
call   1040 <input_handle@plt>
mov    $0x0,%al
call   1050 <dt_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <dt_init@plt>
xor    %eax,%eax
call   1040 <input_handle@plt>
xor    %eax,%eax
call   1050 <dt_destroy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @dt_init()
%6 = call i32 (...) @input_handle()
%7 = call i32 (...) @dt_destroy()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @dt_init()
%4 = tail call i32 (...) @input_handle()
%5 = tail call i32 (...) @dt_destroy()
ret i32 0
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
int very_complex_function(char *password) {
  int result;
  char buffer[16];
  result = 0;
  strcpy(buffer, password);
  if (strcmp(buffer, "V3RY53cr37") == 0)
    result = 1;
  return result;
}


x86 assembly (clang, -O0):
<very_complex_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0x20(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
jne    1161 <very_complex_function+0x41>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<very_complex_function>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <strcpy@plt>
lea    0xec6(%rip),%rsi
mov    %rbx,%rdi
call   1040 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"V3RY53cr37\00"
define i32 @very_complex_function(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca [16 x i8]
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %4, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %4, i64 0, i64 0
%9 = call i64 @strcmp(i8* %8, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 1, i32* %3
br label %12
12: ; preds = %11, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@.str = [11 x i8] c"V3RY53cr37\00"
define i32 @very_complex_function(i8* %0) {
%2 = alloca [16 x i8]
%3 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* %0)
%5 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
void gtk_file_chooser_get_extra_widget() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_get_extra_widget>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_get_extra_widget>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_get_extra_widget() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_get_extra_widget() {
ret void
}