#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */
typedef struct TYPE_50__ TYPE_9__;
typedef struct TYPE_49__ TYPE_8__;
typedef struct TYPE_48__ TYPE_7__;
typedef struct TYPE_47__ TYPE_6__;
typedef struct TYPE_46__ TYPE_5__;
typedef struct TYPE_45__ TYPE_4__;
typedef struct TYPE_44__ TYPE_3__;
typedef struct TYPE_43__ TYPE_2__;
typedef struct TYPE_42__ TYPE_25__;
typedef struct TYPE_41__ TYPE_24__;
typedef struct TYPE_40__ TYPE_23__;
typedef struct TYPE_39__ TYPE_22__;
typedef struct TYPE_38__ TYPE_21__;
typedef struct TYPE_37__ TYPE_20__;
typedef struct TYPE_36__ TYPE_1__;
typedef struct TYPE_35__ TYPE_19__;
typedef struct TYPE_34__ TYPE_18__;
typedef struct TYPE_33__ TYPE_17__;
typedef struct TYPE_32__ TYPE_16__;
typedef struct TYPE_31__ TYPE_15__;
typedef struct TYPE_30__ TYPE_14__;
typedef struct TYPE_29__ TYPE_13__;
typedef struct TYPE_28__ TYPE_12__;
typedef struct TYPE_27__ TYPE_11__;
typedef struct TYPE_26__ TYPE_10__;

/* Type definitions */
struct TYPE_50__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_49__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_48__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_47__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_46__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_45__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_44__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_43__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_42__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_41__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_40__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_39__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_38__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_37__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_36__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_35__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_34__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_33__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_32__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_31__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_30__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_29__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_28__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_27__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};
struct TYPE_26__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
};

/* Variables and functions */
int /*<<< orphan*/ houston_ReadReg(int, unsigned long *, int);
int /*<<< orphan*/ houston_WriteReg(int, unsigned long, int);
void config_macrovision(unsigned long tv_std, unsigned int trigger_bits) {
  static const struct mvparms {
    unsigned short n0[6];
    unsigned short n1[6];
    unsigned short n2[6];
    unsigned short n3[6];
    unsigned short n4[6];
    unsigned short n5[6];
    unsigned short n6[6];
    unsigned short n7[6];
    unsigned short n8[6];
    unsigned short n9[6];
    unsigned short n10[6];
    unsigned short n11[6];
    unsigned short n12[6];
    unsigned short n13[6];
    unsigned short n14[6];
    unsigned short n15[6];
    unsigned short n16[6];
    unsigned short n17[6];
    unsigned short n18[6];
    unsigned short n19[6];
    unsigned short n20[6];
    unsigned short n21[6];
    unsigned short n22[6];
    unsigned short agc_pulse_level[6];
    unsigned short bp_pulse_level[6];
  } mvsetup = {
      {0x00, 0x36, 0x3e, 0x3e, 0x00, 0x3e},
      {0x1d, 0x1d, 0x1d, 0x17, 0x1a, 0x1a},
      {0x11, 0x11, 0x11, 0x15, 0x22, 0x22},
      {0x25, 0x25, 0x25, 0x21, 0x2a, 0x2a},
      {0x11, 0x11, 0x11, 0x15, 0x22, 0x22},
      {0x01, 0x01, 0x01, 0x05, 0x05, 0x05},
      {0x07, 0x07, 0x07, 0x05, 0x02, 0x02},
      {0x00, 0x00, 0x00, 0x02, 0x00, 0x00},
      {0x1b, 0x1b, 0x1b, 0x1b, 0x1c, 0x1c},
      {0x1b, 0x1b, 0x1b, 0x1b, 0x3d, 0x3d},
      {0x24, 0x24, 0x24, 0x24, 0x14, 0x14},
      {0x780f, 0x780f, 0x780f, 0x780f, 0x7e07, 0x7e07},
      {0x0000, 0x0000, 0x0000, 0x0000, 0x5402, 0x5402},
      {0x0f, 0x0f, 0x0f, 0x0f, 0xfe, 0xfe},
      {0x0f, 0x0f, 0x0f, 0x0f, 0x7e, 0x7e},
      {0x60, 0x60, 0x60, 0x60, 0x60, 0x60},
      {0x01, 0x01, 0x01, 0x01, 0x00, 0x00},
      {0x0a, 0x0a, 0x0a, 0x0a, 0x08, 0x08},
      {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
      {0x05, 0x05, 0x05, 0x05, 0x04, 0x04},
      {0x04, 0x04, 0x04, 0x04, 0x07, 0x07},
      {0x03ff, 0x03ff, 0x03ff, 0x03ff, 0x0155, 0x0155},
      {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
      {0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3},
      {0xc8, 0xc8, 0xc8, 0xc8, 0xc8, 0xc8},
  };
  int nMode;
  unsigned long misc;
  unsigned short n0;
  trigger_bits &= 0x3;
  if ((tv_std & (0x0001 | 0x0002 | 0x0040))) {
    if (trigger_bits == 0) {
      nMode = 0;
    } else if (trigger_bits == 1) {
      nMode = 1;
    } else if (trigger_bits == 2) {
      nMode = 2;
    } else {
      nMode = 3;
    }
  } else {
    if (trigger_bits == 0) {
      nMode = 4;
    } else {
      nMode = 5;
    }
  }
  if (tv_std != 0x0040)
    n0 = mvsetup.n0[nMode];
  else {
    if ((trigger_bits & 0x03) == 0)
      n0 = mvsetup.n0[4];
    else
      n0 = mvsetup.n0[5];
  }
  houston_WriteReg(0x59, n0, 1);
  houston_WriteReg(0x52, mvsetup.n1[nMode], 1);
  houston_WriteReg(0x7b, mvsetup.n2[nMode], 1);
  houston_WriteReg(0x53, mvsetup.n3[nMode], 1);
  houston_WriteReg(0x79, mvsetup.n4[nMode], 1);
  houston_WriteReg(0x5d, mvsetup.n5[nMode], 1);
  houston_WriteReg(0x7a, mvsetup.n6[nMode], 1);
  houston_WriteReg(0x64, mvsetup.n7[nMode], 1);
  houston_WriteReg(0x54, mvsetup.n8[nMode], 1);
  houston_WriteReg(0x55, mvsetup.n9[nMode], 1);
  houston_WriteReg(0x56, mvsetup.n10[nMode], 1);
  houston_WriteReg(0x6d, mvsetup.n11[nMode] & 0xff, 1);
  houston_WriteReg(0x6d + 1, mvsetup.n11[nMode] >> 8, 1);
  houston_WriteReg(0x6f, mvsetup.n12[nMode] & 0xff, 1);
  houston_WriteReg(0x6f + 1, mvsetup.n12[nMode] >> 8, 1);
  houston_WriteReg(0x5a, mvsetup.n13[nMode], 1);
  houston_WriteReg(0x5b, mvsetup.n14[nMode], 1);
  houston_WriteReg(0x5c, mvsetup.n15[nMode], 1);
  houston_WriteReg(0x63, mvsetup.n16[nMode], 1);
  houston_WriteReg(0x66, mvsetup.n17[nMode], 1);
  houston_WriteReg(0x68, mvsetup.n18[nMode], 1);
  houston_WriteReg(0x67, mvsetup.n19[nMode], 1);
  houston_WriteReg(0x61, mvsetup.n20[nMode], 1);
  houston_WriteReg(0x6a, mvsetup.n21[nMode] & 0xff, 1);
  houston_WriteReg(0x6a + 1, mvsetup.n21[nMode] >> 8, 1);
  houston_WriteReg(0x76, mvsetup.n22[nMode], 1);
  houston_WriteReg(0x77, mvsetup.agc_pulse_level[nMode], 1);
  houston_WriteReg(0x78, mvsetup.bp_pulse_level[nMode], 1);
  houston_ReadReg(0x34, &misc, 2);
  if (trigger_bits == 0)
    misc &= ~0x0008;
  else
    misc |= 0x0008;
  houston_WriteReg(0x34, misc, 2);
}


x86 assembly (clang, -O0):
<config_macrovision>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
and    $0x43,%rax
cmp    $0x0,%rax
je     11a2 <config_macrovision+0x82>
cmpl   $0x0,-0xc(%rbp)
jne    1160 <config_macrovision+0x40>
movl   $0x0,-0x10(%rbp)
jmp    119d <config_macrovision+0x7d>
cmpl   $0x1,-0xc(%rbp)
jne    1176 <config_macrovision+0x56>
movl   $0x1,-0x10(%rbp)
jmp    1198 <config_macrovision+0x78>
cmpl   $0x2,-0xc(%rbp)
jne    118c <config_macrovision+0x6c>
movl   $0x2,-0x10(%rbp)
jmp    1193 <config_macrovision+0x73>
movl   $0x3,-0x10(%rbp)
jmp    1198 <config_macrovision+0x78>
jmp    119d <config_macrovision+0x7d>
jmp    11c4 <config_macrovision+0xa4>
cmpl   $0x0,-0xc(%rbp)
jne    11b8 <config_macrovision+0x98>
movl   $0x4,-0x10(%rbp)
jmp    11bf <config_macrovision+0x9f>
movl   $0x5,-0x10(%rbp)
jmp    11c4 <config_macrovision+0xa4>
cmpq   $0x40,-0x8(%rbp)
je     11e7 <config_macrovision+0xc7>
movslq -0x10(%rbp),%rcx
lea    0xe26(%rip),%rax
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x1a(%rbp)
jmp    1216 <config_macrovision+0xf6>
mov    -0xc(%rbp),%eax
and    $0x3,%eax
cmp    $0x0,%eax
jne    1206 <config_macrovision+0xe6>
mov    0xe0b(%rip),%ax
mov    %ax,-0x1a(%rbp)
jmp    1211 <config_macrovision+0xf1>
mov    0xdfd(%rip),%ax
mov    %ax,-0x1a(%rbp)
jmp    1216 <config_macrovision+0xf6>
movzwl -0x1a(%rbp),%eax
mov    %eax,%esi
mov    $0x59,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xdca(%rip),%rax
movzwl 0xc(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x52,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xda9(%rip),%rax
movzwl 0x18(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x7b,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xd88(%rip),%rax
movzwl 0x24(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x53,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xd67(%rip),%rax
movzwl 0x30(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x79,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xd46(%rip),%rax
movzwl 0x3c(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x5d,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xd25(%rip),%rax
movzwl 0x48(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x7a,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xd04(%rip),%rax
movzwl 0x54(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x64,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xce3(%rip),%rax
movzwl 0x60(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x54,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xcc2(%rip),%rax
movzwl 0x6c(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x55,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xca1(%rip),%rax
movzwl 0x78(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x56,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xc80(%rip),%rax
movzwl 0x84(%rax,%rcx,2),%eax
and    $0xff,%eax
movslq %eax,%rsi
mov    $0x6d,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xc56(%rip),%rax
movzwl 0x84(%rax,%rcx,2),%eax
sar    $0x8,%eax
movslq %eax,%rsi
mov    $0x6e,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xc2e(%rip),%rax
movzwl 0x90(%rax,%rcx,2),%eax
and    $0xff,%eax
movslq %eax,%rsi
mov    $0x6f,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xc04(%rip),%rax
movzwl 0x90(%rax,%rcx,2),%eax
sar    $0x8,%eax
movslq %eax,%rsi
mov    $0x70,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xbdc(%rip),%rax
movzwl 0x9c(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x5a,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xbb8(%rip),%rax
movzwl 0xa8(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x5b,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xb94(%rip),%rax
movzwl 0xb4(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x5c,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xb70(%rip),%rax
movzwl 0xc0(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x63,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xb4c(%rip),%rax
movzwl 0xcc(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x66,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xb28(%rip),%rax
movzwl 0xd8(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x68,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xb04(%rip),%rax
movzwl 0xe4(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x67,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xae0(%rip),%rax
movzwl 0xf0(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x61,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xabc(%rip),%rax
movzwl 0xfc(%rax,%rcx,2),%eax
and    $0xff,%eax
movslq %eax,%rsi
mov    $0x6a,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xa92(%rip),%rax
movzwl 0xfc(%rax,%rcx,2),%eax
sar    $0x8,%eax
movslq %eax,%rsi
mov    $0x6b,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xa6a(%rip),%rax
movzwl 0x108(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x76,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xa46(%rip),%rax
movzwl 0x114(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x77,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movslq -0x10(%rbp),%rcx
lea    0xa22(%rip),%rax
movzwl 0x120(%rax,%rcx,2),%eax
mov    %eax,%esi
mov    $0x78,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
mov    $0x34,%edi
lea    -0x18(%rbp),%rsi
mov    $0x2,%edx
call   1030 <houston_ReadReg@plt>
cmpl   $0x0,-0xc(%rbp)
jne    1625 <config_macrovision+0x505>
mov    -0x18(%rbp),%rax
and    $0xfffffffffffffff7,%rax
mov    %rax,-0x18(%rbp)
jmp    1631 <config_macrovision+0x511>
mov    -0x18(%rbp),%rax
or     $0x8,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    $0x34,%edi
mov    $0x2,%edx
call   1040 <houston_WriteReg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_macrovision>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %esi,%r14d
and    $0x3,%r14d
cmp    $0x1,%r14d
mov    $0x5,%r15d
sbb    $0x0,%r15
test   $0x43,%dil
cmovne %r14,%r15
cmp    $0x40,%rdi
jne    115b <config_macrovision+0x3b>
xor    %eax,%eax
test   %r14d,%r14d
mov    $0x3e,%esi
cmove  %rax,%rsi
jmp    1167 <config_macrovision+0x47>
lea    0xe9e(%rip),%rax
movzwl (%rax,%r15,2),%esi
mov    $0x59,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
lea    0xe83(%rip),%r12
movzwl 0xc(%r12,%r15,2),%esi
mov    $0x52,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x18(%r12,%r15,2),%esi
mov    $0x7b,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x24(%r12,%r15,2),%esi
mov    $0x53,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x30(%r12,%r15,2),%esi
mov    $0x79,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x3c(%r12,%r15,2),%esi
mov    $0x5d,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x48(%r12,%r15,2),%esi
mov    $0x7a,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x54(%r12,%r15,2),%esi
mov    $0x64,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x60(%r12,%r15,2),%esi
mov    $0x54,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x6c(%r12,%r15,2),%esi
mov    $0x55,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x78(%r12,%r15,2),%esi
mov    $0x56,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x84(%r12,%r15,2),%ebx
movzbl %bl,%esi
mov    $0x6d,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
shr    $0x8,%rbx
mov    $0x6e,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x90(%r12,%r15,2),%ebx
movzbl %bl,%esi
mov    $0x6f,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
shr    $0x8,%rbx
mov    $0x70,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x9c(%r12,%r15,2),%esi
mov    $0x5a,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xa8(%r12,%r15,2),%esi
mov    $0x5b,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xb4(%r12,%r15,2),%esi
mov    $0x5c,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xc0(%r12,%r15,2),%esi
mov    $0x63,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xcc(%r12,%r15,2),%esi
mov    $0x66,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xd8(%r12,%r15,2),%esi
mov    $0x68,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xe4(%r12,%r15,2),%esi
mov    $0x67,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xf0(%r12,%r15,2),%esi
mov    $0x61,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0xfc(%r12,%r15,2),%ebx
movzbl %bl,%esi
mov    $0x6a,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
shr    $0x8,%rbx
mov    $0x6b,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x108(%r12,%r15,2),%esi
mov    $0x76,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x114(%r12,%r15,2),%esi
mov    $0x77,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
movzwl 0x120(%r12,%r15,2),%esi
mov    $0x78,%edi
mov    $0x1,%edx
call   1040 <houston_WriteReg@plt>
mov    %rsp,%rsi
mov    $0x34,%edi
mov    $0x2,%edx
call   1030 <houston_ReadReg@plt>
xor    %eax,%eax
test   %r14d,%r14d
setne  %al
mov    (%rsp),%rcx
and    $0xfffffffffffffff7,%rcx
lea    (%rcx,%rax,8),%rsi
mov    %rsi,(%rsp)
mov    $0x34,%edi
mov    $0x2,%edx
call   1040 <houston_WriteReg@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.mvparms = type { [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16] }
@config_macrovision.mvsetup = internal constant %struct.mvparms { [6 x i16] [i16 0, i16 54, i16 62, i16 62, i16 0, i16 62], [6 x i16] [i16 29, i16 29, i16 29, i16 23, i16 26, i16 26], [6 x i16] [i16 17, i16 17, i16 17, i16 21, i16 34, i16 34], [6 x i16] [i16 37, i16 37, i16 37, i16 33, i16 42, i16 42], [6 x i16] [i16 17, i16 17, i16 17, i16 21, i16 34, i16 34], [6 x i16] [i16 1, i16 1, i16 1, i16 5, i16 5, i16 5], [6 x i16] [i16 7, i16 7, i16 7, i16 5, i16 2, i16 2], [6 x i16] [i16 0, i16 0, i16 0, i16 2, i16 0, i16 0], [6 x i16] [i16 27, i16 27, i16 27, i16 27, i16 28, i16 28], [6 x i16] [i16 27, i16 27, i16 27, i16 27, i16 61, i16 61], [6 x i16] [i16 36, i16 36, i16 36, i16 36, i16 20, i16 20], [6 x i16] [i16 30735, i16 30735, i16 30735, i16 30735, i16 32263, i16 32263], [6 x i16] [i16 0, i16 0, i16 0, i16 0, i16 21506, i16 21506], [6 x i16] [i16 15, i16 15, i16 15, i16 15, i16 254, i16 254], [6 x i16] [i16 15, i16 15, i16 15, i16 15, i16 126, i16 126], [6 x i16] [i16 96, i16 96, i16 96, i16 96, i16 96, i16 96], [6 x i16] [i16 1, i16 1, i16 1, i16 1, i16 0, i16 0], [6 x i16] [i16 10, i16 10, i16 10, i16 10, i16 8, i16 8], [6 x i16] zeroinitializer, [6 x i16] [i16 5, i16 5, i16 5, i16 5, i16 4, i16 4], [6 x i16] [i16 4, i16 4, i16 4, i16 4, i16 7, i16 7], [6 x i16] [i16 1023, i16 1023, i16 1023, i16 1023, i16 341, i16 341], [6 x i16] zeroinitializer, [6 x i16] [i16 163, i16 163, i16 163, i16 163, i16 163, i16 163], [6 x i16] [i16 200, i16 200, i16 200, i16 200, i16 200, i16 200] }
define void @config_macrovision(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
%7 = alloca i16
store i64 %0, i64* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = and i32 %8, 3
store i32 %9, i32* %4
%10 = load i64, i64* %3
%11 = and i64 %10, 67
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %29
13: ; preds = %2
%14 = load i32, i32* %4
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 0, i32* %5
br label %28
17: ; preds = %13
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 1
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 1, i32* %5
br label %27
21: ; preds = %17
%22 = load i32, i32* %4
%23 = icmp eq i32 %22, 2
br i1 %23, label %24, label %25
24: ; preds = %21
store i32 2, i32* %5
br label %26
25: ; preds = %21
store i32 3, i32* %5
br label %26
26: ; preds = %25, %24
br label %27
27: ; preds = %26, %20
br label %28
28: ; preds = %27, %16
br label %35
29: ; preds = %2
%30 = load i32, i32* %4
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %33
32: ; preds = %29
store i32 4, i32* %5
br label %34
33: ; preds = %29
store i32 5, i32* %5
br label %34
34: ; preds = %33, %32
br label %35
35: ; preds = %34, %28
%36 = load i64, i64* %3
%37 = icmp ne i64 %36, 64
br i1 %37, label %38, label %43
38: ; preds = %35
%39 = load i32, i32* %5
%40 = sext i32 %39 to i64
%41 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 0), i64 0, i64 %40
%42 = load i16, i16* %41
store i16 %42, i16* %7
br label %52
43: ; preds = %35
%44 = load i32, i32* %4
%45 = and i32 %44, 3
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %49
47: ; preds = %43
%48 = load i16, i16* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 0, i64 4)
store i16 %48, i16* %7
br label %51
49: ; preds = %43
%50 = load i16, i16* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 0, i64 5)
store i16 %50, i16* %7
br label %51
51: ; preds = %49, %47
br label %52
52: ; preds = %51, %38
%53 = load i16, i16* %7
%54 = zext i16 %53 to i64
%55 = call i32 @houston_WriteReg(i32 89, i64 %54, i32 1)
%56 = load i32, i32* %5
%57 = sext i32 %56 to i64
%58 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 1), i64 0, i64 %57
%59 = load i16, i16* %58
%60 = zext i16 %59 to i64
%61 = call i32 @houston_WriteReg(i32 82, i64 %60, i32 1)
%62 = load i32, i32* %5
%63 = sext i32 %62 to i64
%64 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 2), i64 0, i64 %63
%65 = load i16, i16* %64
%66 = zext i16 %65 to i64
%67 = call i32 @houston_WriteReg(i32 123, i64 %66, i32 1)
%68 = load i32, i32* %5
%69 = sext i32 %68 to i64
%70 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 3), i64 0, i64 %69
%71 = load i16, i16* %70
%72 = zext i16 %71 to i64
%73 = call i32 @houston_WriteReg(i32 83, i64 %72, i32 1)
%74 = load i32, i32* %5
%75 = sext i32 %74 to i64
%76 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 4), i64 0, i64 %75
%77 = load i16, i16* %76
%78 = zext i16 %77 to i64
%79 = call i32 @houston_WriteReg(i32 121, i64 %78, i32 1)
%80 = load i32, i32* %5
%81 = sext i32 %80 to i64
%82 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 5), i64 0, i64 %81
%83 = load i16, i16* %82
%84 = zext i16 %83 to i64
%85 = call i32 @houston_WriteReg(i32 93, i64 %84, i32 1)
%86 = load i32, i32* %5
%87 = sext i32 %86 to i64
%88 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 6), i64 0, i64 %87
%89 = load i16, i16* %88
%90 = zext i16 %89 to i64
%91 = call i32 @houston_WriteReg(i32 122, i64 %90, i32 1)
%92 = load i32, i32* %5
%93 = sext i32 %92 to i64
%94 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 7), i64 0, i64 %93
%95 = load i16, i16* %94
%96 = zext i16 %95 to i64
%97 = call i32 @houston_WriteReg(i32 100, i64 %96, i32 1)
%98 = load i32, i32* %5
%99 = sext i32 %98 to i64
%100 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 8), i64 0, i64 %99
%101 = load i16, i16* %100
%102 = zext i16 %101 to i64
%103 = call i32 @houston_WriteReg(i32 84, i64 %102, i32 1)
%104 = load i32, i32* %5
%105 = sext i32 %104 to i64
%106 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 9), i64 0, i64 %105
%107 = load i16, i16* %106
%108 = zext i16 %107 to i64
%109 = call i32 @houston_WriteReg(i32 85, i64 %108, i32 1)
%110 = load i32, i32* %5
%111 = sext i32 %110 to i64
%112 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 10), i64 0, i64 %111
%113 = load i16, i16* %112
%114 = zext i16 %113 to i64
%115 = call i32 @houston_WriteReg(i32 86, i64 %114, i32 1)
%116 = load i32, i32* %5
%117 = sext i32 %116 to i64
%118 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 11), i64 0, i64 %117
%119 = load i16, i16* %118
%120 = zext i16 %119 to i32
%121 = and i32 %120, 255
%122 = sext i32 %121 to i64
%123 = call i32 @houston_WriteReg(i32 109, i64 %122, i32 1)
%124 = load i32, i32* %5
%125 = sext i32 %124 to i64
%126 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 11), i64 0, i64 %125
%127 = load i16, i16* %126
%128 = zext i16 %127 to i32
%129 = ashr i32 %128, 8
%130 = sext i32 %129 to i64
%131 = call i32 @houston_WriteReg(i32 110, i64 %130, i32 1)
%132 = load i32, i32* %5
%133 = sext i32 %132 to i64
%134 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 12), i64 0, i64 %133
%135 = load i16, i16* %134
%136 = zext i16 %135 to i32
%137 = and i32 %136, 255
%138 = sext i32 %137 to i64
%139 = call i32 @houston_WriteReg(i32 111, i64 %138, i32 1)
%140 = load i32, i32* %5
%141 = sext i32 %140 to i64
%142 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 12), i64 0, i64 %141
%143 = load i16, i16* %142
%144 = zext i16 %143 to i32
%145 = ashr i32 %144, 8
%146 = sext i32 %145 to i64
%147 = call i32 @houston_WriteReg(i32 112, i64 %146, i32 1)
%148 = load i32, i32* %5
%149 = sext i32 %148 to i64
%150 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 13), i64 0, i64 %149
%151 = load i16, i16* %150
%152 = zext i16 %151 to i64
%153 = call i32 @houston_WriteReg(i32 90, i64 %152, i32 1)
%154 = load i32, i32* %5
%155 = sext i32 %154 to i64
%156 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 14), i64 0, i64 %155
%157 = load i16, i16* %156
%158 = zext i16 %157 to i64
%159 = call i32 @houston_WriteReg(i32 91, i64 %158, i32 1)
%160 = load i32, i32* %5
%161 = sext i32 %160 to i64
%162 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 15), i64 0, i64 %161
%163 = load i16, i16* %162
%164 = zext i16 %163 to i64
%165 = call i32 @houston_WriteReg(i32 92, i64 %164, i32 1)
%166 = load i32, i32* %5
%167 = sext i32 %166 to i64
%168 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 16), i64 0, i64 %167
%169 = load i16, i16* %168
%170 = zext i16 %169 to i64
%171 = call i32 @houston_WriteReg(i32 99, i64 %170, i32 1)
%172 = load i32, i32* %5
%173 = sext i32 %172 to i64
%174 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 17), i64 0, i64 %173
%175 = load i16, i16* %174
%176 = zext i16 %175 to i64
%177 = call i32 @houston_WriteReg(i32 102, i64 %176, i32 1)
%178 = load i32, i32* %5
%179 = sext i32 %178 to i64
%180 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 18), i64 0, i64 %179
%181 = load i16, i16* %180
%182 = zext i16 %181 to i64
%183 = call i32 @houston_WriteReg(i32 104, i64 %182, i32 1)
%184 = load i32, i32* %5
%185 = sext i32 %184 to i64
%186 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 19), i64 0, i64 %185
%187 = load i16, i16* %186
%188 = zext i16 %187 to i64
%189 = call i32 @houston_WriteReg(i32 103, i64 %188, i32 1)
%190 = load i32, i32* %5
%191 = sext i32 %190 to i64
%192 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 20), i64 0, i64 %191
%193 = load i16, i16* %192
%194 = zext i16 %193 to i64
%195 = call i32 @houston_WriteReg(i32 97, i64 %194, i32 1)
%196 = load i32, i32* %5
%197 = sext i32 %196 to i64
%198 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 21), i64 0, i64 %197
%199 = load i16, i16* %198
%200 = zext i16 %199 to i32
%201 = and i32 %200, 255
%202 = sext i32 %201 to i64
%203 = call i32 @houston_WriteReg(i32 106, i64 %202, i32 1)
%204 = load i32, i32* %5
%205 = sext i32 %204 to i64
%206 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 21), i64 0, i64 %205
%207 = load i16, i16* %206
%208 = zext i16 %207 to i32
%209 = ashr i32 %208, 8
%210 = sext i32 %209 to i64
%211 = call i32 @houston_WriteReg(i32 107, i64 %210, i32 1)
%212 = load i32, i32* %5
%213 = sext i32 %212 to i64
%214 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 22), i64 0, i64 %213
%215 = load i16, i16* %214
%216 = zext i16 %215 to i64
%217 = call i32 @houston_WriteReg(i32 118, i64 %216, i32 1)
%218 = load i32, i32* %5
%219 = sext i32 %218 to i64
%220 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 23), i64 0, i64 %219
%221 = load i16, i16* %220
%222 = zext i16 %221 to i64
%223 = call i32 @houston_WriteReg(i32 119, i64 %222, i32 1)
%224 = load i32, i32* %5
%225 = sext i32 %224 to i64
%226 = getelementptr inbounds [6 x i16], [6 x i16]* getelementptr inbounds (%struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i32 0, i32 24), i64 0, i64 %225
%227 = load i16, i16* %226
%228 = zext i16 %227 to i64
%229 = call i32 @houston_WriteReg(i32 120, i64 %228, i32 1)
%230 = call i32 @houston_ReadReg(i32 52, i64* %6, i32 2)
%231 = load i32, i32* %4
%232 = icmp eq i32 %231, 0
br i1 %232, label %233, label %236
233: ; preds = %52
%234 = load i64, i64* %6
%235 = and i64 %234, -9
store i64 %235, i64* %6
br label %239
236: ; preds = %52
%237 = load i64, i64* %6
%238 = or i64 %237, 8
store i64 %238, i64* %6
br label %239
239: ; preds = %236, %233
%240 = load i64, i64* %6
%241 = call i32 @houston_WriteReg(i32 52, i64 %240, i32 2)
ret void
}

LLVM IR (-O2):
%struct.mvparms = type { [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16], [6 x i16] }
@config_macrovision.mvsetup = internal unnamed_addr constant %struct.mvparms { [6 x i16] [i16 0, i16 54, i16 62, i16 62, i16 0, i16 62], [6 x i16] [i16 29, i16 29, i16 29, i16 23, i16 26, i16 26], [6 x i16] [i16 17, i16 17, i16 17, i16 21, i16 34, i16 34], [6 x i16] [i16 37, i16 37, i16 37, i16 33, i16 42, i16 42], [6 x i16] [i16 17, i16 17, i16 17, i16 21, i16 34, i16 34], [6 x i16] [i16 1, i16 1, i16 1, i16 5, i16 5, i16 5], [6 x i16] [i16 7, i16 7, i16 7, i16 5, i16 2, i16 2], [6 x i16] [i16 0, i16 0, i16 0, i16 2, i16 0, i16 0], [6 x i16] [i16 27, i16 27, i16 27, i16 27, i16 28, i16 28], [6 x i16] [i16 27, i16 27, i16 27, i16 27, i16 61, i16 61], [6 x i16] [i16 36, i16 36, i16 36, i16 36, i16 20, i16 20], [6 x i16] [i16 30735, i16 30735, i16 30735, i16 30735, i16 32263, i16 32263], [6 x i16] [i16 0, i16 0, i16 0, i16 0, i16 21506, i16 21506], [6 x i16] [i16 15, i16 15, i16 15, i16 15, i16 254, i16 254], [6 x i16] [i16 15, i16 15, i16 15, i16 15, i16 126, i16 126], [6 x i16] [i16 96, i16 96, i16 96, i16 96, i16 96, i16 96], [6 x i16] [i16 1, i16 1, i16 1, i16 1, i16 0, i16 0], [6 x i16] [i16 10, i16 10, i16 10, i16 10, i16 8, i16 8], [6 x i16] zeroinitializer, [6 x i16] [i16 5, i16 5, i16 5, i16 5, i16 4, i16 4], [6 x i16] [i16 4, i16 4, i16 4, i16 4, i16 7, i16 7], [6 x i16] [i16 1023, i16 1023, i16 1023, i16 1023, i16 341, i16 341], [6 x i16] zeroinitializer, [6 x i16] [i16 163, i16 163, i16 163, i16 163, i16 163, i16 163], [6 x i16] [i16 200, i16 200, i16 200, i16 200, i16 200, i16 200] }
define void @config_macrovision(i64 %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = and i32 %1, 3
%6 = and i64 %0, 67
%7 = icmp eq i64 %6, 0
%8 = icmp eq i32 %5, 0
%9 = select i1 %8, i64 4, i64 5
%10 = zext i32 %5 to i64
%11 = select i1 %7, i64 %9, i64 %10
%12 = icmp eq i64 %0, 64
br i1 %12, label %17, label %13
13: ; preds = %2
%14 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 0, i64 %11
%15 = load i16, i16* %14
%16 = zext i16 %15 to i64
br label %20
17: ; preds = %2
%18 = icmp eq i32 %5, 0
%19 = select i1 %18, i64 0, i64 62
br label %20
20: ; preds = %17, %13
%21 = phi i64 [ %16, %13 ], [ %19, %17 ]
%22 = tail call i32 @houston_WriteReg(i32 89, i64 %21, i32 1)
%23 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 1, i64 %11
%24 = load i16, i16* %23
%25 = zext i16 %24 to i64
%26 = tail call i32 @houston_WriteReg(i32 82, i64 %25, i32 1)
%27 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 2, i64 %11
%28 = load i16, i16* %27
%29 = zext i16 %28 to i64
%30 = tail call i32 @houston_WriteReg(i32 123, i64 %29, i32 1)
%31 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 3, i64 %11
%32 = load i16, i16* %31
%33 = zext i16 %32 to i64
%34 = tail call i32 @houston_WriteReg(i32 83, i64 %33, i32 1)
%35 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 4, i64 %11
%36 = load i16, i16* %35
%37 = zext i16 %36 to i64
%38 = tail call i32 @houston_WriteReg(i32 121, i64 %37, i32 1)
%39 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 5, i64 %11
%40 = load i16, i16* %39
%41 = zext i16 %40 to i64
%42 = tail call i32 @houston_WriteReg(i32 93, i64 %41, i32 1)
%43 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 6, i64 %11
%44 = load i16, i16* %43
%45 = zext i16 %44 to i64
%46 = tail call i32 @houston_WriteReg(i32 122, i64 %45, i32 1)
%47 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 7, i64 %11
%48 = load i16, i16* %47
%49 = zext i16 %48 to i64
%50 = tail call i32 @houston_WriteReg(i32 100, i64 %49, i32 1)
%51 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 8, i64 %11
%52 = load i16, i16* %51
%53 = zext i16 %52 to i64
%54 = tail call i32 @houston_WriteReg(i32 84, i64 %53, i32 1)
%55 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 9, i64 %11
%56 = load i16, i16* %55
%57 = zext i16 %56 to i64
%58 = tail call i32 @houston_WriteReg(i32 85, i64 %57, i32 1)
%59 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 10, i64 %11
%60 = load i16, i16* %59
%61 = zext i16 %60 to i64
%62 = tail call i32 @houston_WriteReg(i32 86, i64 %61, i32 1)
%63 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 11, i64 %11
%64 = load i16, i16* %63
%65 = and i16 %64, 255
%66 = zext i16 %65 to i64
%67 = tail call i32 @houston_WriteReg(i32 109, i64 %66, i32 1)
%68 = lshr i16 %64, 8
%69 = zext i16 %68 to i64
%70 = tail call i32 @houston_WriteReg(i32 110, i64 %69, i32 1)
%71 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 12, i64 %11
%72 = load i16, i16* %71
%73 = and i16 %72, 255
%74 = zext i16 %73 to i64
%75 = tail call i32 @houston_WriteReg(i32 111, i64 %74, i32 1)
%76 = lshr i16 %72, 8
%77 = zext i16 %76 to i64
%78 = tail call i32 @houston_WriteReg(i32 112, i64 %77, i32 1)
%79 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 13, i64 %11
%80 = load i16, i16* %79
%81 = zext i16 %80 to i64
%82 = tail call i32 @houston_WriteReg(i32 90, i64 %81, i32 1)
%83 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 14, i64 %11
%84 = load i16, i16* %83
%85 = zext i16 %84 to i64
%86 = tail call i32 @houston_WriteReg(i32 91, i64 %85, i32 1)
%87 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 15, i64 %11
%88 = load i16, i16* %87
%89 = zext i16 %88 to i64
%90 = tail call i32 @houston_WriteReg(i32 92, i64 %89, i32 1)
%91 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 16, i64 %11
%92 = load i16, i16* %91
%93 = zext i16 %92 to i64
%94 = tail call i32 @houston_WriteReg(i32 99, i64 %93, i32 1)
%95 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 17, i64 %11
%96 = load i16, i16* %95
%97 = zext i16 %96 to i64
%98 = tail call i32 @houston_WriteReg(i32 102, i64 %97, i32 1)
%99 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 18, i64 %11
%100 = load i16, i16* %99
%101 = zext i16 %100 to i64
%102 = tail call i32 @houston_WriteReg(i32 104, i64 %101, i32 1)
%103 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 19, i64 %11
%104 = load i16, i16* %103
%105 = zext i16 %104 to i64
%106 = tail call i32 @houston_WriteReg(i32 103, i64 %105, i32 1)
%107 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 20, i64 %11
%108 = load i16, i16* %107
%109 = zext i16 %108 to i64
%110 = tail call i32 @houston_WriteReg(i32 97, i64 %109, i32 1)
%111 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 21, i64 %11
%112 = load i16, i16* %111
%113 = and i16 %112, 255
%114 = zext i16 %113 to i64
%115 = tail call i32 @houston_WriteReg(i32 106, i64 %114, i32 1)
%116 = lshr i16 %112, 8
%117 = zext i16 %116 to i64
%118 = tail call i32 @houston_WriteReg(i32 107, i64 %117, i32 1)
%119 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 22, i64 %11
%120 = load i16, i16* %119
%121 = zext i16 %120 to i64
%122 = tail call i32 @houston_WriteReg(i32 118, i64 %121, i32 1)
%123 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 23, i64 %11
%124 = load i16, i16* %123
%125 = zext i16 %124 to i64
%126 = tail call i32 @houston_WriteReg(i32 119, i64 %125, i32 1)
%127 = getelementptr inbounds %struct.mvparms, %struct.mvparms* @config_macrovision.mvsetup, i64 0, i32 24, i64 %11
%128 = load i16, i16* %127
%129 = zext i16 %128 to i64
%130 = tail call i32 @houston_WriteReg(i32 120, i64 %129, i32 1)
%131 = call i32 @houston_ReadReg(i32 52, i64* %3, i32 2)
%132 = icmp eq i32 %5, 0
%133 = load i64, i64* %3
%134 = and i64 %133, -9
%135 = select i1 %132, i64 0, i64 8
%136 = or i64 %134, %135
store i64 %136, i64* %3
%137 = call i32 @houston_WriteReg(i32 52, i64 %136, i32 2)
ret void
}