xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ SYS_close;
int syscall(int /*<<< orphan*/, int);
int gotcha_close(int fd) { return syscall(SYS_close, fd); }


x86 assembly (clang, -O0):
<gotcha_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gotcha_close>:
mov    %edi,%esi
mov    0x2ecf(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_close = global i32 0
define i32 @gotcha_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SYS_close
%4 = load i32, i32* %2
%5 = call i32 @syscall(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@SYS_close = global i32 0
define i32 @gotcha_close(i32 %0) {
%2 = load i32, i32* @SYS_close
%3 = tail call i32 @syscall(i32 %2, i32 %0)
ret i32 %3
}
void sucre() {}


x86 assembly (clang, -O0):
<sucre>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sucre>:
ret

LLVM IR (-O0):
define void @sucre() {
ret void
}

LLVM IR (-O2):
define void @sucre() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int do_run_mode(char *run_mode) {
  printf("Run mode determination is not supported on this platfom.\n");
  return -1;
}


x86 assembly (clang, -O0):
<do_run_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_run_mode>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [58 x i8] c"Run mode determination is not supported on this platfom.\0A\00"
define i32 @do_run_mode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@str = [57 x i8] c"Run mode determination is not supported on this platfom.\00"
define i32 @do_run_mode(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([57 x i8], [57 x i8]* @str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           unsigned int);
int /*<<< orphan*/ stderr;
void ReturnException(const char *s, unsigned int high, unsigned int lineno) {
  fprintf(stderr,
          "%s:%d:procedure function is about to finish and no return statement "
          "has been executed\n",
          s, lineno);
  _exit(1);
}


x86 assembly (clang, -O0):
<ReturnException>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%ecx
lea    0xeb7(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<ReturnException>:
push   %rax
mov    %edx,%ecx
mov    %rdi,%rdx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [87 x i8] c"%s:%d:procedure function is about to finish and no return statement has been executed\0A\00"
define void @ReturnException(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([87 x i8], [87 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
%11 = call i32 @_exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [87 x i8] c"%s:%d:procedure function is about to finish and no return statement has been executed\0A\00"
define void @ReturnException(i8* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([87 x i8], [87 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %2)
%6 = tail call i32 @_exit(i32 1)
unreachable
}
void RTVfsFileSeek(void) {}


x86 assembly (clang, -O0):
<RTVfsFileSeek>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsFileSeek>:
ret

LLVM IR (-O0):
define void @RTVfsFileSeek() {
ret void
}

LLVM IR (-O2):
define void @RTVfsFileSeek() {
ret void
}
/* Variables and functions */
scalar_t__ m();
int /*<<< orphan*/ setto(char *);
void r(char *s) {
  if (m() > 0)
    setto(s);
}


x86 assembly (clang, -O0):
<r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <m@plt>
cmp    $0x0,%rax
jle    1146 <r+0x26>
mov    -0x8(%rbp),%rdi
call   1030 <setto@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <m@plt>
test   %rax,%rax
jle    1139 <r+0x19>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <setto@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @r(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i64 (...) @m()
%4 = icmp sgt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @setto(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @r(i8* %0) {
%2 = tail call i64 (...) @m()
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @setto(i8* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ command(char *);
void say_no() { command("N\n"); }


x86 assembly (clang, -O0):
<say_no>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<say_no>:
lea    0xee9(%rip),%rdi
jmp    1030 <command@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"N\0A\00"
define void @say_no() {
%1 = call i32 @command(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"N\0A\00"
define void @say_no() {
%1 = tail call i32 @command(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
void HandleUsbReset(unsigned char bDevStatus) {
  if (bDevStatus & (1 << 4)) {
    ;
  }
}


x86 assembly (clang, -O0):
<HandleUsbReset>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     111f <HandleUsbReset+0x1f>
jmp    111f <HandleUsbReset+0x1f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HandleUsbReset>:
ret

LLVM IR (-O0):
define void @HandleUsbReset(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 16
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @HandleUsbReset(i8 zeroext %0) {
ret void
}
/* Variables and functions */
int add(int, int);
int main() { return add(3, 5); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
mov    $0x5,%esi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%edi
mov    $0x5,%esi
jmp    1030 <add@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @add(i32 3, i32 5)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @add(i32 3, i32 5)
ret i32 %1
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int a = __VERIFIER_nondet_int();
  int b = a;
  if (a != b) {
  ERROR:
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     114c <main+0x3c>
jmp    1140 <main+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1153 <main+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = icmp ne i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %0
br label %10
10: ; preds = %9
store i32 -1, i32* %1
br label %12
11: ; preds = %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_ENCRYPT;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_ENCRYPT_it;
void PKCS7_ENCRYPT_free(PKCS7_ENCRYPT *a) {
  ASN1_item_free((ASN1_VALUE *)a, &PKCS7_ENCRYPT_it);
}


x86 assembly (clang, -O0):
<PKCS7_ENCRYPT_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_ENCRYPT_free>:
mov    0x2ed1(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@PKCS7_ENCRYPT_it = global i32 0
define void @PKCS7_ENCRYPT_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @PKCS7_ENCRYPT_it)
ret void
}

LLVM IR (-O2):
@PKCS7_ENCRYPT_it = global i32 0
define void @PKCS7_ENCRYPT_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @PKCS7_ENCRYPT_it)
ret void
}
/* Variables and functions */
int grub_isspace(int c) {
  return (c == '\n' || c == '\r' || c == ' ' || c == '\t');
}


x86 assembly (clang, -O0):
<grub_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <grub_isspace+0x3e>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <grub_isspace+0x3e>
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <grub_isspace+0x3e>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grub_isspace>:
cmp    $0x20,%edi
ja     111d <grub_isspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002400,%rdx
bt     %rcx,%rdx
jae    111d <grub_isspace+0x1d>
ret
xor    %eax,%eax
cmp    $0x9,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @grub_isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 13
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 32
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 9
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @grub_isspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 10, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 9
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
double cos(double);
double math__Float__cos(double self) {
  double var;
  double var1;
  var1 = cos(self);
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<math__Float__cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cos@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math__Float__cos>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define double @math__Float__cos(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = call double @cos(double %5)
store double %6, double* %4
%7 = load double, double* %4
store double %7, double* %3
br label %8
8: ; preds = %1
%9 = load double, double* %3
ret double %9
}

LLVM IR (-O2):
define double @math__Float__cos(double %0) {
%2 = tail call double @cos(double %0)
ret double %2
}
/* Variables and functions */
unsigned int ATM_CELL_PAYLOAD;
int ATM_CELL_SIZE;
unsigned int tc_align_to_atm(unsigned int size) {
  int linksize, cells;
  cells = size / ATM_CELL_PAYLOAD;
  if ((size % ATM_CELL_PAYLOAD) > 0)
    cells++;
  linksize = cells * ATM_CELL_SIZE;
  return linksize;
}


x86 assembly (clang, -O0):
<tc_align_to_atm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec7(%rip),%rcx
xor    %edx,%edx
divl   (%rcx)
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb6(%rip),%rcx
xor    %edx,%edx
divl   (%rcx)
cmp    $0x0,%edx
jbe    1138 <tc_align_to_atm+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2ea6(%rip),%rcx
imul   (%rcx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tc_align_to_atm>:
mov    %edi,%eax
mov    0x2ecf(%rip),%rcx
xor    %edx,%edx
divl   (%rcx)
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
mov    0x2ece(%rip),%rcx
imul   (%rcx),%eax
ret

LLVM IR (-O0):
@ATM_CELL_PAYLOAD = global i32 0
@ATM_CELL_SIZE = global i32 0
define i32 @tc_align_to_atm(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* @ATM_CELL_PAYLOAD
%7 = udiv i32 %5, %6
store i32 %7, i32* %4
%8 = load i32, i32* %2
%9 = load i32, i32* @ATM_CELL_PAYLOAD
%10 = urem i32 %8, %9
%11 = icmp ugt i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %15
15: ; preds = %12, %1
%16 = load i32, i32* %4
%17 = load i32, i32* @ATM_CELL_SIZE
%18 = mul nsw i32 %16, %17
store i32 %18, i32* %3
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@ATM_CELL_PAYLOAD = global i32 0
@ATM_CELL_SIZE = global i32 0
define i32 @tc_align_to_atm(i32 %0) {
%2 = load i32, i32* @ATM_CELL_PAYLOAD
%3 = udiv i32 %0, %2
%4 = urem i32 %0, %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
%7 = add nsw i32 %3, %6
%8 = load i32, i32* @ATM_CELL_SIZE
%9 = mul nsw i32 %7, %8
ret i32 %9
}
double snp_density(int length_of_sequence, int number_of_snps) {
  return number_of_snps * 1.0 / length_of_sequence;
}


x86 assembly (clang, -O0):
<snp_density>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  0xee9(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsi2sdl -0x4(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<snp_density>:
cvtsi2sd %esi,%xmm0
cvtsi2sd %edi,%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @snp_density(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sitofp i32 %5 to double
%7 = fmul double %6, 1.000000e+00
%8 = load i32, i32* %3
%9 = sitofp i32 %8 to double
%10 = fdiv double %7, %9
ret double %10
}

LLVM IR (-O2):
define double @snp_density(i32 %0, i32 %1) {
%3 = sitofp i32 %1 to double
%4 = sitofp i32 %0 to double
%5 = fdiv double %3, %4
ret double %5
}
/* Variables and functions */
int BUFSIZ;
int /*<<< orphan*/ sprintf(char *, char *, int, char const *);
int /*<<< orphan*/ yyerror(char const *);
void mybcerror(const char *msg, int lnno) {
  char buf[BUFSIZ];
  sprintf(buf, "%d: %s", lnno, msg);
  yyerror((const char *)buf);
  return;
}


x86 assembly (clang, -O0):
<mybcerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rcx
lea    0xe97(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x28(%rbp),%rdi
call   1030 <yyerror@plt>
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mybcerror>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
push   %rax
mov    %esi,%edx
mov    %rdi,%rcx
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
lea    0xeb4(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <yyerror@plt>
lea    -0x8(%rbp),%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@BUFSIZ = global i32 0
@.str = [7 x i8] c"%d: %s\00"
define void @mybcerror(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* @BUFSIZ
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i8, i64 %8
store i64 %8, i64* %6
%11 = load i32, i32* %4
%12 = load i8*, i8** %3
%13 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %12)
%14 = call i32 @yyerror(i8* %10)
%15 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
@BUFSIZ = global i32 0
@.str = [7 x i8] c"%d: %s\00"
define void @mybcerror(i8* %0, i32 %1) {
%3 = load i32, i32* @BUFSIZ
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4
%6 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %0)
%7 = call i32 @yyerror(i8* %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_SEIZE;
int /*<<< orphan*/ pause_pid(int /*<<< orphan*/);
int ptrace(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/ *,
           int /*<<< orphan*/ *);
int /*<<< orphan*/ wait(int /*<<< orphan*/ *);
int attach_n_stop(pid_t pid) {
  int ret;
  ret = ptrace(PTRACE_SEIZE, pid, NULL, NULL);
  if (ret != -1) {
    pause_pid(pid);
    wait(NULL);
  }
  return ret;
}


x86 assembly (clang, -O0):
<attach_n_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rdx
call   1030 <ptrace@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
je     1171 <attach_n_stop+0x41>
mov    -0x4(%rbp),%edi
call   1040 <pause_pid@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1050 <wait@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<attach_n_stop>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
mov    %ebx,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <ptrace@plt>
mov    %eax,%ebp
cmp    $0xffffffff,%eax
je     115e <attach_n_stop+0x2e>
mov    %ebx,%edi
call   1040 <pause_pid@plt>
xor    %edi,%edi
call   1050 <wait@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@PTRACE_SEIZE = global i32 0
define i32 @attach_n_stop(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @PTRACE_SEIZE
%5 = load i32, i32* %2
%6 = call i32 @ptrace(i32 %4, i32 %5, i32* null, i32* null)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i32, i32* %2
%11 = call i32 @pause_pid(i32 %10)
%12 = call i32 @wait(i32* null)
br label %13
13: ; preds = %9, %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@PTRACE_SEIZE = global i32 0
define i32 @attach_n_stop(i32 %0) {
%2 = load i32, i32* @PTRACE_SEIZE
%3 = tail call i32 @ptrace(i32 %2, i32 %0, i32* null, i32* null)
%4 = icmp eq i32 %3, -1
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i32 @pause_pid(i32 %0)
%7 = tail call i32 @wait(i32* null)
br label %8
8: ; preds = %5, %1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t ltoh_32(int32_t littleval) { return littleval; }


x86 assembly (clang, -O0):
<ltoh_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltoh_32>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ltoh_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @ltoh_32(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  assert(1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @assert(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memset(double *, int /*<<< orphan*/, int);
void glmGenerateZeroMatrix3d(double m[9]) { memset(m, 0, 9 * sizeof(double)); }


x86 assembly (clang, -O0):
<glmGenerateZeroMatrix3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x48,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmGenerateZeroMatrix3d>:
xor    %esi,%esi
mov    $0x48,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @glmGenerateZeroMatrix3d(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @memset(double* %3, i32 0, i32 72)
ret void
}

LLVM IR (-O2):
define void @glmGenerateZeroMatrix3d(double* %0) {
%2 = tail call i32 @memset(double* %0, i32 0, i32 72)
ret void
}
/* Type definitions */
struct ptree_node {
  int dummy;
};

/* Variables and functions */
int key_common_len(char *, int, char *, int);
struct ptree_node *ptree_node_create(char *, int);
struct ptree_node *ptree_common(char *keyi, int keyilen, char *keyj,
                                int keyjlen) {
  int keylen;
  struct ptree_node *x;
  keylen = key_common_len(keyi, keyilen, keyj, keyjlen);
  x = ptree_node_create(keyi, keylen);
  return x;
}


x86 assembly (clang, -O0):
<ptree_common>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <key_common_len@plt>
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%esi
call   1040 <ptree_node_create@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptree_common>:
push   %rbx
mov    %rdi,%rbx
call   1030 <key_common_len@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <ptree_node_create@plt>

LLVM IR (-O0):
%struct.ptree_node = type { i32 }
define %struct.ptree_node* @ptree_common(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.ptree_node*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = call i32 @key_common_len(i8* %11, i32 %12, i8* %13, i32 %14)
store i32 %15, i32* %9
%16 = load i8*, i8** %5
%17 = load i32, i32* %9
%18 = call %struct.ptree_node* @ptree_node_create(i8* %16, i32 %17)
store %struct.ptree_node* %18, %struct.ptree_node** %10
%19 = load %struct.ptree_node*, %struct.ptree_node** %10
ret %struct.ptree_node* %19
}

LLVM IR (-O2):
%struct.ptree_node = type { i32 }
define %struct.ptree_node* @ptree_common(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @key_common_len(i8* %0, i32 %1, i8* %2, i32 %3)
%6 = tail call %struct.ptree_node* @ptree_node_create(i8* %0, i32 %5)
ret %struct.ptree_node* %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int x, y;
  scanf("%d", &x);
  y = x * 2;
  printf("%d minutos\n", y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
add    %esi,%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [12 x i8] c"%d minutos\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = mul nsw i32 %5, 2
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [12 x i8] c"%d minutos\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = shl nsw i32 %4, 1
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LedsP__Led0__toggle();
void LedsP__Leds__led0Toggle(void) {
  LedsP__Led0__toggle();
  ;
  ;
}


x86 assembly (clang, -O0):
<LedsP__Leds__led0Toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LedsP__Led0__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Leds__led0Toggle>:
xor    %eax,%eax
jmp    1030 <LedsP__Led0__toggle@plt>

LLVM IR (-O0):
define void @LedsP__Leds__led0Toggle() {
%1 = call i32 (...) @LedsP__Led0__toggle()
ret void
}

LLVM IR (-O2):
define void @LedsP__Leds__led0Toggle() {
%1 = tail call i32 (...) @LedsP__Led0__toggle()
ret void
}
/* Type definitions */
typedef int __feh;

/* Variables and functions */
int read(int, short *, int);
int leread16(int fd, short *c) {
  int r;
  r = read(fd, c, 2);
  do {
    short __feh = *c;
    if (1)
      *c = *c;
    else
      *c = ((((__feh) >> 8) & 0xff) | (((__feh)&0xff) << 8));
  } while (0);
  return r;
}


x86 assembly (clang, -O0):
<leread16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x2,%edx
call   1030 <read@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x16(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<leread16>:
mov    $0x2,%edx
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @leread16(i32 %0, i16* %1) {
%3 = alloca i32
%4 = alloca i16*
%5 = alloca i32
%6 = alloca i16
store i32 %0, i32* %3
store i16* %1, i16** %4
%7 = load i32, i32* %3
%8 = load i16*, i16** %4
%9 = call i32 @read(i32 %7, i16* %8, i32 2)
store i32 %9, i32* %5
br label %10
10: ; preds = %2
%11 = load i16*, i16** %4
%12 = load i16, i16* %11
store i16 %12, i16* %6
%13 = load i16*, i16** %4
%14 = load i16, i16* %13
%15 = load i16*, i16** %4
store i16 %14, i16* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
define i32 @leread16(i32 %0, i16* nocapture %1) {
%3 = tail call i32 @read(i32 %0, i16* %1, i32 2)
ret i32 %3
}
void store_bswap32(unsigned int *p, unsigned int a) {
  *p = __builtin_bswap32(a);
}


x86 assembly (clang, -O0):
<store_bswap32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
bswap  %ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<store_bswap32>:
bswap  %esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @store_bswap32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @llvm.bswap.i32(i32 %5)
%7 = load i32*, i32** %3
store i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @store_bswap32(i32* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @llvm.bswap.i32(i32 %1)
store i32 %3, i32* %0
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ *display;
};
typedef TYPE_1__ XConfigureEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XConfigureEvent_display(void *_p, void *_v) {
  ((XConfigureEvent *)_p)->display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XConfigureEvent_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XConfigureEvent_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32* }
define void @set_XConfigureEvent_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i32* %6, i32** %9
ret void
}

LLVM IR (-O2):
define void @set_XConfigureEvent_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
void calculator() {}


x86 assembly (clang, -O0):
<calculator>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculator>:
ret

LLVM IR (-O0):
define void @calculator() {
ret void
}

LLVM IR (-O2):
define void @calculator() {
ret void
}
/* Type definitions */
struct ship {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Write(int, struct ship *, long, int /*<<< orphan*/,
                         int /*<<< orphan*/, int /*<<< orphan*/);
void send_rig2(struct ship *ship, long a) { Write(34, ship, a, 0, 0, 0); }


x86 assembly (clang, -O0):
<send_rig2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x22,%edi
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <Write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_rig2>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x22,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <Write@plt>

LLVM IR (-O0):
%struct.ship = type { i32 }
define void @send_rig2(%struct.ship* %0, i64 %1) {
%3 = alloca %struct.ship*
%4 = alloca i64
store %struct.ship* %0, %struct.ship** %3
store i64 %1, i64* %4
%5 = load %struct.ship*, %struct.ship** %3
%6 = load i64, i64* %4
%7 = call i32 @Write(i32 34, %struct.ship* %5, i64 %6, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
%struct.ship = type { i32 }
define void @send_rig2(%struct.ship* %0, i64 %1) {
%3 = tail call i32 @Write(i32 34, %struct.ship* %0, i64 %1, i32 0, i32 0, i32 0)
ret void
}
void PANIC() { __asm__("int $3\n"); }


x86 assembly (clang, -O0):
<PANIC>:
push   %rbp
mov    %rsp,%rbp
int3
pop    %rbp
ret

x86 assembly (clang, -O2):
<PANIC>:
int3
ret

LLVM IR (-O0):
define void @PANIC() {
ret void
}

LLVM IR (-O2):
define void @PANIC() {
tail call void asm sideeffect "int $$3\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
unsigned int read_uart();
int /*<<< orphan*/ write_uart(unsigned int);
int main() {
  while (1) {
    unsigned ch = read_uart();
    if (ch >= 'A' && ch <= 'Z')
      write_uart(ch + ('a' - 'A'));
    else
      write_uart(ch);
    if (ch == '\n')
      break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <read_uart@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jb     115d <main+0x3d>
cmpl   $0x5a,-0x8(%rbp)
ja     115d <main+0x3d>
mov    -0x8(%rbp),%edi
add    $0x20,%edi
call   1040 <write_uart@plt>
jmp    1165 <main+0x45>
mov    -0x8(%rbp),%edi
call   1040 <write_uart@plt>
cmpl   $0xa,-0x8(%rbp)
jne    1174 <main+0x54>
jmp    1179 <main+0x59>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <read_uart@plt>
mov    %eax,%ebx
lea    -0x41(%rbx),%eax
lea    0x20(%rbx),%edi
cmp    $0x1a,%eax
cmovae %ebx,%edi
call   1040 <write_uart@plt>
cmp    $0xa,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %0, %21
%4 = call i32 (...) @read_uart()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp uge i32 %5, 65
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i32, i32* %2
%9 = icmp ule i32 %8, 90
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32, i32* %2
%12 = add i32 %11, 32
%13 = call i32 @write_uart(i32 %12)
br label %17
14: ; preds = %7, %3
%15 = load i32, i32* %2
%16 = call i32 @write_uart(i32 %15)
br label %17
17: ; preds = %14, %10
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 10
br i1 %19, label %20, label %21
20: ; preds = %17
br label %22
21: ; preds = %17
br label %3
22: ; preds = %20
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @read_uart()
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = add nuw nsw i32 %2, 32
%6 = select i1 %4, i32 %5, i32 %2
%7 = tail call i32 @write_uart(i32 %6)
%8 = icmp eq i32 %2, 10
br i1 %8, label %9, label %1
9: ; preds = %1
ret i32 0
}
/* Variables and functions */
int FALSE;
int TRUE;
int randomFreeSpace();
int /*<<< orphan*/ tilePairsExist();
int gameOver() {
  if (randomFreeSpace() == -1) {
    if (!tilePairsExist()) {
      return TRUE;
    }
  }
  return FALSE;
}


x86 assembly (clang, -O0):
<gameOver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <randomFreeSpace@plt>
cmp    $0xffffffff,%eax
jne    115e <gameOver+0x3e>
mov    $0x0,%al
call   1040 <tilePairsExist@plt>
cmp    $0x0,%eax
jne    1159 <gameOver+0x39>
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <gameOver+0x4a>
jmp    115e <gameOver+0x3e>
mov    0x2e73(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gameOver>:
push   %rax
xor    %eax,%eax
call   1030 <randomFreeSpace@plt>
cmp    $0xffffffff,%eax
jne    1138 <gameOver+0x18>
xor    %eax,%eax
call   1040 <tilePairsExist@plt>
test   %eax,%eax
je     1143 <gameOver+0x23>
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret
mov    0x2e9e(%rip),%rax
jmp    113f <gameOver+0x1f>

LLVM IR (-O0):
@TRUE = global i32 0
@FALSE = global i32 0
define i32 @gameOver() {
%1 = alloca i32
%2 = call i32 (...) @randomFreeSpace()
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %10
4: ; preds = %0
%5 = call i32 (...) @tilePairsExist()
%6 = icmp ne i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = load i32, i32* @TRUE
store i32 %8, i32* %1
br label %12
9: ; preds = %4
br label %10
10: ; preds = %9, %0
%11 = load i32, i32* @FALSE
store i32 %11, i32* %1
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@TRUE = global i32 0
@FALSE = global i32 0
define i32 @gameOver() {
%1 = tail call i32 (...) @randomFreeSpace()
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 (...) @tilePairsExist()
%5 = icmp eq i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %3, %0
br label %7
7: ; preds = %3, %6
%8 = phi i32* [ @FALSE, %6 ], [ @TRUE, %3 ]
%9 = load i32, i32* %8
ret i32 %9
}
/* Variables and functions */
scalar_t__ isLittleEndian();
int /*<<< orphan*/ printf(char *);
main() {
  if (isLittleEndian()) {
    printf("Machine is Little Endian\n");
  } else {
    printf("Machine is Big Endian\n");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <isLittleEndian@plt>
cmp    $0x0,%rax
je     1151 <main+0x31>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
jmp    115d <main+0x3d>
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <isLittleEndian@plt>
test   %rax,%rax
lea    0xece(%rip),%rax
lea    0xedd(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Machine is Little Endian\0A\00"
@.str.1 = [23 x i8] c"Machine is Big Endian\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @isLittleEndian()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@str = [22 x i8] c"Machine is Big Endian\00"
@str.2 = [25 x i8] c"Machine is Little Endian\00"
define i32 @main() {
%1 = tail call i64 (...) @isLittleEndian()
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @str.2, i64 0, i64 0)
%4 = tail call i32 @puts(i8* dereferenceable(1) %3)
ret i32 0
}
/* Type definitions */
struct timespec {
  double tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
double criterion_gettime(void) {
  struct timespec ts;
  clock_gettime(CLOCK_MONOTONIC, &ts);
  return ts.tv_sec + ts.tv_nsec * 1e-9;
}


x86 assembly (clang, -O0):
<criterion_gettime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
movsd  -0x10(%rbp),%xmm1
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  0xec4(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<criterion_gettime>:
sub    $0x18,%rsp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
cvtsi2sdl 0x10(%rsp),%xmm0
mulsd  0xecb(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { double, i32 }
@CLOCK_MONOTONIC = global i32 0
define double @criterion_gettime() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_MONOTONIC
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sitofp i32 %7 to double
%9 = call double @llvm.fmuladd.f64(double %8, double 1.000000e-09, double %5)
ret double %9
}

LLVM IR (-O2):
%struct.timespec = type { double, i32 }
@CLOCK_MONOTONIC = global i32 0
define double @criterion_gettime() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load double, double* %5
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sitofp i32 %8 to double
%10 = call double @llvm.fmuladd.f64(double %9, double 1.000000e-09, double %6)
ret double %10
}
/* Variables and functions */
scalar_t__ gpio_write(unsigned int, char *, char *);
int /*<<< orphan*/ sprintf(char *, char *, unsigned int);
int gpio_set_value(unsigned int gpio, unsigned int value) {
  char buffer[64];
  sprintf(buffer, "%d", value);
  if (gpio_write(gpio, "value", buffer) < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<gpio_set_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xec4(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%edi
lea    -0x50(%rbp),%rdx
lea    0xeb4(%rip),%rsi
call   1030 <gpio_write@plt>
cmp    $0x0,%rax
jge    116a <gpio_set_value+0x4a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <gpio_set_value+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_set_value>:
push   %r14
push   %rbx
sub    $0x48,%rsp
mov    %esi,%edx
mov    %edi,%ebx
lea    0xece(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <sprintf@plt>
lea    0xebf(%rip),%rsi
mov    %ebx,%edi
mov    %r14,%rdx
call   1030 <gpio_write@plt>
sar    $0x3f,%rax
add    $0x48,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [6 x i8] c"value\00"
define i32 @gpio_set_value(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca [64 x i8]
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = getelementptr inbounds [64 x i8], [64 x i8]* %6, i64 0, i64 0
%8 = load i32, i32* %5
%9 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = load i32, i32* %4
%11 = getelementptr inbounds [64 x i8], [64 x i8]* %6, i64 0, i64 0
%12 = call i64 @gpio_write(i32 %10, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %11)
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %2
store i32 -1, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [6 x i8] c"value\00"
define i32 @gpio_set_value(i32 %0, i32 %1) {
%3 = alloca [64 x i8]
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
%6 = call i64 @gpio_write(i32 %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%7 = ashr i64 %6, 63
%8 = trunc i64 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ clear();
int get(int, int);
int main(void) {
  clear();
  int n = get(0, 100);
  int m = get(20, 50);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <clear@plt>
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get@plt>
mov    %eax,-0x4(%rbp)
mov    $0x14,%edi
mov    $0x32,%esi
call   1030 <get@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <clear@plt>
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get@plt>
mov    $0x14,%edi
mov    $0x32,%esi
call   1030 <get@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @clear()
%4 = call i32 @get(i32 0, i32 100)
store i32 %4, i32* %1
%5 = call i32 @get(i32 20, i32 50)
store i32 %5, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @clear()
%2 = tail call i32 @get(i32 0, i32 100)
%3 = tail call i32 @get(i32 20, i32 50)
ret i32 0
}
/* Variables and functions */
int SMBReadByte(int, int);
int readClearStatusRegister() { return SMBReadByte(0x16, 0x70); }


x86 assembly (clang, -O0):
<readClearStatusRegister>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%edi
mov    $0x70,%esi
call   1030 <SMBReadByte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<readClearStatusRegister>:
mov    $0x16,%edi
mov    $0x70,%esi
jmp    1030 <SMBReadByte@plt>

LLVM IR (-O0):
define i32 @readClearStatusRegister() {
%1 = call i32 @SMBReadByte(i32 22, i32 112)
ret i32 %1
}

LLVM IR (-O2):
define i32 @readClearStatusRegister() {
%1 = tail call i32 @SMBReadByte(i32 22, i32 112)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ FatalErrnoError(int, int, char *);
int dup(int);
int Edup(int fd) {
  int res = dup(fd);
  FatalErrnoError(res == -1, 1, "dup()");
  return res;
}


x86 assembly (clang, -O0):
<Edup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <dup@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x1,%esi
lea    0xeb2(%rip),%rdx
call   1040 <FatalErrnoError@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Edup>:
push   %rbx
call   1030 <dup@plt>
mov    %eax,%ebx
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
lea    0xec8(%rip),%rdx
mov    $0x1,%esi
call   1040 <FatalErrnoError@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"dup()\00"
define i32 @Edup(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @dup(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, -1
%8 = zext i1 %7 to i32
%9 = call i32 @FatalErrnoError(i32 %8, i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
@.str = [6 x i8] c"dup()\00"
define i32 @Edup(i32 %0) {
%2 = tail call i32 @dup(i32 %0)
%3 = icmp eq i32 %2, -1
%4 = zext i1 %3 to i32
%5 = tail call i32 @FatalErrnoError(i32 %4, i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
void SHA512Pad(void *context) {}


x86 assembly (clang, -O0):
<SHA512Pad>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA512Pad>:
ret

LLVM IR (-O0):
define void @SHA512Pad(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @SHA512Pad(i8* nocapture %0) {
ret void
}