xunge/DecIR huggingface dataset:
/* Type definitions */
struct Graph {
  int dummy;
};

/* Variables and functions */
struct Graph *create_graph(int);
int /*<<< orphan*/ get_fire_list(int, double, struct Graph *);
int /*<<< orphan*/ print_graph(struct Graph *);
int /*<<< orphan*/ set_emp_info(struct Graph *);
int /*<<< orphan*/ set_heirarchy(struct Graph *);
void main() {
  int V = 14;
  struct Graph *graph = create_graph(V);
  set_emp_info(graph);
  set_heirarchy(graph);
  print_graph(graph);
  get_fire_list(5, 0.5, graph);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xe,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1060 <create_graph@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <set_emp_info@plt>
mov    -0x10(%rbp),%rdi
call   1070 <set_heirarchy@plt>
mov    -0x10(%rbp),%rdi
call   1030 <print_graph@plt>
mov    -0x10(%rbp),%rsi
mov    $0x5,%edi
movsd  0xe69(%rip),%xmm0
call   1040 <get_fire_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xe,%edi
call   1060 <create_graph@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <set_emp_info@plt>
mov    %rbx,%rdi
call   1070 <set_heirarchy@plt>
mov    %rbx,%rdi
call   1030 <print_graph@plt>
movsd  0xe82(%rip),%xmm0
mov    $0x5,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <get_fire_list@plt>

LLVM IR (-O0):
%struct.Graph = type { i32 }
define void @main() {
%1 = alloca i32
%2 = alloca %struct.Graph*
store i32 14, i32* %1
%3 = load i32, i32* %1
%4 = call %struct.Graph* @create_graph(i32 %3)
store %struct.Graph* %4, %struct.Graph** %2
%5 = load %struct.Graph*, %struct.Graph** %2
%6 = call i32 @set_emp_info(%struct.Graph* %5)
%7 = load %struct.Graph*, %struct.Graph** %2
%8 = call i32 @set_heirarchy(%struct.Graph* %7)
%9 = load %struct.Graph*, %struct.Graph** %2
%10 = call i32 @print_graph(%struct.Graph* %9)
%11 = load %struct.Graph*, %struct.Graph** %2
%12 = call i32 @get_fire_list(i32 5, double 5.000000e-01, %struct.Graph* %11)
ret void
}

LLVM IR (-O2):
%struct.Graph = type { i32 }
define void @main() {
%1 = tail call %struct.Graph* @create_graph(i32 14)
%2 = tail call i32 @set_emp_info(%struct.Graph* %1)
%3 = tail call i32 @set_heirarchy(%struct.Graph* %1)
%4 = tail call i32 @print_graph(%struct.Graph* %1)
%5 = tail call i32 @get_fire_list(i32 5, double 5.000000e-01, %struct.Graph* %1)
ret void
}
/* Variables and functions */
long do_random(unsigned long *);
long random_r(unsigned long *ctx) { return do_random(ctx); }


x86 assembly (clang, -O0):
<random_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <do_random@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_r>:
jmp    1030 <do_random@plt>

LLVM IR (-O0):
define i64 @random_r(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = call i64 @do_random(i64* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @random_r(i64* %0) {
%2 = tail call i64 @do_random(i64* %0)
ret i64 %2
}
/* Variables and functions */
int foo(int *, int *);
int main(void) {
  int i = 0, j = 0;
  return foo(&i, &j);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
movl   $0x0,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <foo@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%4 = call i32 @foo(i32* %2, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = call i32 @foo(i32* %1, i32* %2)
ret i32 %5
}
float prv_process_fpa_mul_real32(float a, float b) { return a * b; }


x86 assembly (clang, -O0):
<prv_process_fpa_mul_real32>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_process_fpa_mul_real32>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @prv_process_fpa_mul_real32(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @prv_process_fpa_mul_real32(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ spxec_fft(void *, float *, float *);
void spxec_fft_float(void *table, float *in, float *out) {
  spxec_fft(table, in, out);
}


x86 assembly (clang, -O0):
<spxec_fft_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <spxec_fft@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spxec_fft_float>:
jmp    1030 <spxec_fft@plt>

LLVM IR (-O0):
define void @spxec_fft_float(i8* %0, float* %1, float* %2) {
%4 = alloca i8*
%5 = alloca float*
%6 = alloca float*
store i8* %0, i8** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load i8*, i8** %4
%8 = load float*, float** %5
%9 = load float*, float** %6
%10 = call i32 @spxec_fft(i8* %7, float* %8, float* %9)
ret void
}

LLVM IR (-O2):
define void @spxec_fft_float(i8* %0, float* %1, float* %2) {
%4 = tail call i32 @spxec_fft(i8* %0, float* %1, float* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ITM_SendChar(int /*<<< orphan*/);
int _write(int file, char *ptr, int len) {
  int index;
  for (index = 0; index < len; index++) {
    ITM_SendChar((*ptr++));
  }
  return len;
}


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115a <_write+0x4a>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
call   1030 <ITM_SendChar@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1129 <_write+0x19>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
test   %edx,%edx
jle    1142 <_write+0x32>
mov    %rsi,%r15
mov    %r14d,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1030 <ITM_SendChar@plt>
add    $0x1,%rbx
cmp    %ebx,%ebp
jne    1130 <_write+0x20>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %18, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = call i32 @ITM_SendChar(i32 %16)
br label %18
18: ; preds = %12
%19 = load i32, i32* %7
%20 = add nsw i32 %19, 1
store i32 %20, i32* %7
br label %8
21: ; preds = %8
%22 = load i32, i32* %6
ret i32 %22
}

LLVM IR (-O2):
define i32 @_write(i32 %0, i8* nocapture %1, i32 returned %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %12, %5 ], [ 0, %3 ]
%7 = phi i8* [ %8, %5 ], [ %1, %3 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = tail call i32 @ITM_SendChar(i32 %10)
%12 = add nuw nsw i32 %6, 1
%13 = icmp eq i32 %12, %2
br i1 %13, label %14, label %5
14: ; preds = %5, %3
ret i32 %2
}
int is_top(unsigned char ch) {
  if (ch == 0xdc || ch == '_' || ch == '.' || ch == ',' || ch == '-' ||
      (ch >= 'a' && ch <= 'z')) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_top>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0xdc,%eax
je     1167 <is_top+0x67>
movzbl -0x5(%rbp),%eax
cmp    $0x5f,%eax
je     1167 <is_top+0x67>
movzbl -0x5(%rbp),%eax
cmp    $0x2e,%eax
je     1167 <is_top+0x67>
movzbl -0x5(%rbp),%eax
cmp    $0x2c,%eax
je     1167 <is_top+0x67>
movzbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
je     1167 <is_top+0x67>
movzbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1173 <is_top+0x73>
movzbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1173 <is_top+0x73>
movl   $0x0,-0x4(%rbp)
jmp    117a <is_top+0x7a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_top>:
xor    %eax,%eax
lea    -0x2c(%rdi),%ecx
cmp    $0x33,%cl
ja     111d <is_top+0x1d>
movzbl %cl,%ecx
movabs $0x8000000000007,%rdx
bt     %rcx,%rdx
jb     1123 <is_top+0x23>
cmp    $0xdc,%dil
jne    1124 <is_top+0x24>
ret
add    $0x85,%dil
xor    %eax,%eax
cmp    $0xe6,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_top(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp eq i32 %5, 220
br i1 %6, label %31, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %9, 95
br i1 %10, label %31, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = icmp eq i32 %13, 46
br i1 %14, label %31, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp eq i32 %17, 44
br i1 %18, label %31, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = zext i8 %20 to i32
%22 = icmp eq i32 %21, 45
br i1 %22, label %31, label %23
23: ; preds = %19
%24 = load i8, i8* %3
%25 = zext i8 %24 to i32
%26 = icmp sge i32 %25, 97
br i1 %26, label %27, label %32
27: ; preds = %23
%28 = load i8, i8* %3
%29 = zext i8 %28 to i32
%30 = icmp sle i32 %29, 122
br i1 %30, label %31, label %32
31: ; preds = %27, %19, %15, %11, %7, %1
store i32 0, i32* %2
br label %33
32: ; preds = %27, %23
store i32 1, i32* %2
br label %33
33: ; preds = %32, %31
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @is_top(i8 zeroext %0) {
switch i8 %0, label %2 [
i8 -36, label %6
i8 95, label %6
i8 46, label %6
i8 45, label %6
i8 44, label %6
]
2: ; preds = %1
%3 = add i8 %0, -123
%4 = icmp ult i8 %3, -26
%5 = zext i1 %4 to i32
br label %6
6: ; preds = %2, %1, %1, %1, %1, %1
%7 = phi i32 [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ %5, %2 ]
ret i32 %7
}
/* Type definitions */
struct ac_buffer {
  int dummy;
};

/* Variables and functions */
int _buffer_write_array(struct ac_buffer *, char *, int, int);
int buffer_write_string(struct ac_buffer *buffer, char *value, int size) {
  return _buffer_write_array(buffer, value, size, sizeof(char));
}


x86 assembly (clang, -O0):
<buffer_write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x1,%ecx
call   1030 <_buffer_write_array@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_write_string>:
mov    $0x1,%ecx
jmp    1030 <_buffer_write_array@plt>

LLVM IR (-O0):
%struct.ac_buffer = type { i32 }
define i32 @buffer_write_string(%struct.ac_buffer* %0, i8* %1, i32 %2) {
%4 = alloca %struct.ac_buffer*
%5 = alloca i8*
%6 = alloca i32
store %struct.ac_buffer* %0, %struct.ac_buffer** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.ac_buffer*, %struct.ac_buffer** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @_buffer_write_array(%struct.ac_buffer* %7, i8* %8, i32 %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.ac_buffer = type { i32 }
define i32 @buffer_write_string(%struct.ac_buffer* %0, i8* %1, i32 %2) {
%4 = tail call i32 @_buffer_write_array(%struct.ac_buffer* %0, i8* %1, i32 %2, i32 1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, char *);
int validation(char *);
int main() {
  int result = 0;
  char EGN[12];
  scanf("%s", EGN);
  result = validation(EGN);
  printf("%d", result);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x10(%rbp),%rsi
lea    0xeb6(%rip),%rdi
call   1050 <scanf@plt>
lea    -0x10(%rbp),%rdi
call   1040 <validation@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rdi
lea    0x4(%rsp),%rbx
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    %rbx,%rdi
call   1040 <validation@plt>
lea    0xeab(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [12 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%6 = call i32 @validation(i8* %5)
store i32 %6, i32* %1
%7 = load i32, i32* %1
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @validation(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
void RasterDMASoftWareClkEnable(unsigned int baseAddr) {
  (*((volatile unsigned int *)(baseAddr + (0x6C)))) |= (0x00000004u);
}


x86 assembly (clang, -O0):
<RasterDMASoftWareClkEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x6c,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x4,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterDMASoftWareClkEnable>:
add    $0x6c,%edi
orl    $0x4,(%rdi)
ret

LLVM IR (-O0):
define void @RasterDMASoftWareClkEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 108
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 4
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @RasterDMASoftWareClkEnable(i32 %0) {
%2 = add i32 %0, 108
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = or i32 %5, 4
store volatile i32 %6, i32* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ yes;

/* Variables and functions */
int /*<<< orphan*/ IPPROTO_TCP;
int /*<<< orphan*/ TCP_NODELAY;
int setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/, int *, int);
int setSocketTcpNoDelay(int fd) {
  int yes = 1;
  if (setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, &yes, sizeof(yes)) == -1) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<setSocketTcpNoDelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
mov    0x2eb3(%rip),%rax
mov    (%rax),%edx
lea    -0xc(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
cmp    $0xffffffff,%eax
jne    115b <setSocketTcpNoDelay+0x4b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1162 <setSocketTcpNoDelay+0x52>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setSocketTcpNoDelay>:
push   %rax
movl   $0x1,0x4(%rsp)
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    0x2ebf(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@IPPROTO_TCP = global i32 0
@TCP_NODELAY = global i32 0
define i32 @setSocketTcpNoDelay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @IPPROTO_TCP
%7 = load i32, i32* @TCP_NODELAY
%8 = call i32 @setsockopt(i32 %5, i32 %6, i32 %7, i32* %4, i32 4)
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@IPPROTO_TCP = global i32 0
@TCP_NODELAY = global i32 0
define i32 @setSocketTcpNoDelay(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 1, i32* %2
%4 = load i32, i32* @IPPROTO_TCP
%5 = load i32, i32* @TCP_NODELAY
%6 = call i32 @setsockopt(i32 %0, i32 %4, i32 %5, i32* %2, i32 4)
%7 = icmp eq i32 %6, -1
%8 = sext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void hello() { puts("Hello, World!\n"); }


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, World!\0A\00"
define void @hello() {
%1 = call i32 @puts(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"Hello, World!\0A\00"
define void @hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int udpbyport(int /*<<< orphan*/);
int udpgetfree(void) { return udpbyport(0); }


x86 assembly (clang, -O0):
<udpgetfree>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <udpbyport@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<udpgetfree>:
xor    %edi,%edi
jmp    1030 <udpbyport@plt>

LLVM IR (-O0):
define i32 @udpgetfree() {
%1 = call i32 @udpbyport(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @udpgetfree() {
%1 = tail call i32 @udpbyport(i32 0)
ret i32 %1
}
int prog_q84add(int A, int B) {
  int C = A + (int)B;
  if (C > 127) {
    C = 127;
  } else if (C < -128) {
    C = -128;
  }
  return C;
}


x86 assembly (clang, -O0):
<prog_q84add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x7f,-0xc(%rbp)
jle    1129 <prog_q84add+0x29>
movl   $0x7f,-0xc(%rbp)
jmp    113f <prog_q84add+0x3f>
cmpl   $0xffffff80,-0xc(%rbp)
jge    113a <prog_q84add+0x3a>
movl   $0xffffff80,-0xc(%rbp)
jmp    113f <prog_q84add+0x3f>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prog_q84add>:
lea    (%rdi,%rsi,1),%eax
cmp    $0xffffff81,%eax
mov    $0xffffff80,%ecx
cmovge %eax,%ecx
cmp    $0x7f,%ecx
mov    $0x7f,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @prog_q84add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 127
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 127, i32* %5
br label %17
12: ; preds = %2
%13 = load i32, i32* %5
%14 = icmp slt i32 %13, -128
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 -128, i32* %5
br label %16
16: ; preds = %15, %12
br label %17
17: ; preds = %16, %11
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @prog_q84add(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = icmp sgt i32 %3, -128
%5 = select i1 %4, i32 %3, i32 -128
%6 = icmp slt i32 %5, 127
%7 = select i1 %6, i32 %5, i32 127
ret i32 %7
}
int map_parameter_oceanographic_currents(int center, int disc, int param_cat,
                                         int param_num) {
  (void)(disc);
  (void)(center);
  (void)(param_cat);
  switch (param_num) {
  case 0:
    return 47;
  case 1:
    return 48;
  case 2:
    return 49;
  case 3:
    return 50;
  default:
    break;
  }
  return -1;
}


x86 assembly (clang, -O0):
<map_parameter_oceanographic_currents>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %rax,-0x20(%rbp)
sub    $0x3,%rax
ja     1165 <map_parameter_oceanographic_currents+0x65>
mov    -0x20(%rbp),%rax
lea    0xed4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x2f,-0x4(%rbp)
jmp    1171 <map_parameter_oceanographic_currents+0x71>
movl   $0x30,-0x4(%rbp)
jmp    1171 <map_parameter_oceanographic_currents+0x71>
movl   $0x31,-0x4(%rbp)
jmp    1171 <map_parameter_oceanographic_currents+0x71>
movl   $0x32,-0x4(%rbp)
jmp    1171 <map_parameter_oceanographic_currents+0x71>
jmp    116a <map_parameter_oceanographic_currents+0x6a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_parameter_oceanographic_currents>:
lea    0x2f(%rcx),%edx
cmp    $0x4,%ecx
mov    $0xffffffff,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define i32 @map_parameter_oceanographic_currents(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = load i32, i32* %8
%13 = load i32, i32* %9
switch i32 %13, label %18 [
i32 0, label %14
i32 1, label %15
i32 2, label %16
i32 3, label %17
]
14: ; preds = %4
store i32 47, i32* %5
br label %20
15: ; preds = %4
store i32 48, i32* %5
br label %20
16: ; preds = %4
store i32 49, i32* %5
br label %20
17: ; preds = %4
store i32 50, i32* %5
br label %20
18: ; preds = %4
br label %19
19: ; preds = %18
store i32 -1, i32* %5
br label %20
20: ; preds = %19, %17, %16, %15, %14
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @map_parameter_oceanographic_currents(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp ult i32 %3, 4
%6 = add i32 %3, 47
%7 = select i1 %5, i32 %6, i32 -1
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ coins;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int ways(int *, int, int);
void main() {
  int coins[] = {1, 5, 10, 25, 50};
  int m = sizeof(coins) / sizeof(coins[0]);
  int res = ways(coins, m, 4);
  printf("Number of ways are %d", res);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecc(%rip),%eax
mov    %eax,-0x10(%rbp)
movl   $0x5,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    $0x4,%edx
call   1040 <ways@plt>
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xee6(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xecb(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
mov    $0x4,%edx
call   1040 <ways@plt>
lea    0xec2(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.coins = [5 x i32] [i32 1, i32 5, i32 10, i32 25, i32 50]
@.str = [22 x i8] c"Number of ways are %d\00"
define void @main() {
%1 = alloca [5 x i32]
%2 = alloca i32
%3 = alloca i32
%4 = bitcast [5 x i32]* %1 to i8*
store i32 5, i32* %2
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i32 @ways(i32* %5, i32 %6, i32 4)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@__const.main.coins = [5 x i32] [i32 1, i32 5, i32 10, i32 25, i32 50]
@.str = [22 x i8] c"Number of ways are %d\00"
define void @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @ways(i32* %3, i32 5, i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Type definitions */
struct dirent {
  scalar_t__ d_type;
  int /*<<< orphan*/ d_name;
};

/* Variables and functions */
scalar_t__ DT_DIR;
int strlen(int /*<<< orphan*/);
int folder_selection(const struct dirent *file) {
  return file->d_type == DT_DIR && strlen(file->d_name) == 19;
}


x86 assembly (clang, -O0):
<folder_selection>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
xor    %eax,%eax
mov    0x2eb4(%rip),%rdx
cmp    (%rdx),%rcx
mov    %al,-0x9(%rbp)
jne    114d <folder_selection+0x3d>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%edi
call   1030 <strlen@plt>
cmp    $0x13,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<folder_selection>:
push   %rax
mov    (%rdi),%rcx
mov    0x2ec5(%rip),%rdx
xor    %eax,%eax
cmp    (%rdx),%rcx
jne    1134 <folder_selection+0x24>
mov    0x8(%rdi),%edi
call   1030 <strlen@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x13,%ecx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
%struct.dirent = type { i64, i32 }
@DT_DIR = global i64 0
define i32 @folder_selection(%struct.dirent* %0) {
%2 = alloca %struct.dirent*
store %struct.dirent* %0, %struct.dirent** %2
%3 = load %struct.dirent*, %struct.dirent** %2
%4 = getelementptr inbounds %struct.dirent, %struct.dirent* %3, i32 0, i32 0
%5 = load i64, i64* %4
%6 = load i64, i64* @DT_DIR
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load %struct.dirent*, %struct.dirent** %2
%10 = getelementptr inbounds %struct.dirent, %struct.dirent* %9, i32 0, i32 1
%11 = load i32, i32* %10
%12 = call i32 @strlen(i32 %11)
%13 = icmp eq i32 %12, 19
br label %14
14: ; preds = %8, %1
%15 = phi i1 [ false, %1 ], [ %13, %8 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
%struct.dirent = type { i64, i32 }
@DT_DIR = global i64 0
define i32 @folder_selection(%struct.dirent* nocapture %0) {
%2 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = load i64, i64* @DT_DIR
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 1
%8 = load i32, i32* %7
%9 = tail call i32 @strlen(i32 %8)
%10 = icmp eq i32 %9, 19
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %6, %1
%13 = phi i32 [ 0, %1 ], [ %11, %6 ]
ret i32 %13
}
int sgn(int x) { return (x > 0) - (x < 0); }


x86 assembly (clang, -O0):
<sgn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0x4(%rbp)
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgn>:
xor    %eax,%eax
test   %edi,%edi
setg   %al
sar    $0x1f,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @sgn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
%5 = zext i1 %4 to i32
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = sub nsw i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @sgn(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = zext i1 %2 to i32
%4 = ashr i32 %0, 31
%5 = add nsw i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void kaldwin_yyfree(void *ptr) { free((char *)ptr); }


x86 assembly (clang, -O0):
<kaldwin_yyfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kaldwin_yyfree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @kaldwin_yyfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @kaldwin_yyfree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *, char *);
void *malloc(unsigned int);
void *xmalloc(int size) {
  void *result = malloc((unsigned)size);
  if (result == NULL) {
    fatal("%s", "virtual memory exhausted");
  }
  return result;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1155 <xmalloc+0x35>
lea    0xeb7(%rip),%rdi
lea    0xeb3(%rip),%rsi
call   1040 <fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1141 <xmalloc+0x21>
lea    0xecb(%rip),%rdi
lea    0xec7(%rip),%rsi
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [25 x i8] c"virtual memory exhausted\00"
define i8* @xmalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @fatal(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [25 x i8] c"virtual memory exhausted\00"
define noalias i8* @xmalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fatal(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
char uart_polled_read() {
  while ((*((volatile char *)(0xFFFC1000 + 0x1C))) & (0x80))
    continue;
  return (*((volatile char *)(0xFFFC1000 + 0x14)));
}


x86 assembly (clang, -O0):
<uart_polled_read>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <uart_polled_read+0x9>
mov    $0xfffc101c,%eax
mov    (%rax),%al
movsbl %al,%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1126 <uart_polled_read+0x26>
jmp    1109 <uart_polled_read+0x9>
mov    $0xfffc1014,%eax
mov    (%rax),%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_polled_read>:
mov    $0xfffc1014,%eax
cs nopw 0x0(%rax,%rax,1)
nop
cmpb   $0x0,0x8(%rax)
js     1110 <uart_polled_read+0x10>
mov    (%rax),%al
ret

LLVM IR (-O0):
define signext i8 @uart_polled_read() {
br label %1
1: ; preds = %6, %0
%2 = load volatile i8, i8* inttoptr (i64 4294709276 to i8*)
%3 = sext i8 %2 to i32
%4 = and i32 %3, 128
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %1
7: ; preds = %1
%8 = load volatile i8, i8* inttoptr (i64 4294709268 to i8*)
ret i8 %8
}

LLVM IR (-O2):
define signext i8 @uart_polled_read() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i8, i8* inttoptr (i64 4294709276 to i8*)
%3 = icmp sgt i8 %2, -1
br i1 %3, label %4, label %1
4: ; preds = %1
%5 = load volatile i8, i8* inttoptr (i64 4294709268 to i8*)
ret i8 %5
}
unsigned long min_ul(unsigned long val1, unsigned long val2) {
  return (val1 < val2) ? val1 : val2;
}


x86 assembly (clang, -O0):
<min_ul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1127 <min_ul+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min_ul+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_ul>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovb  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min_ul(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min_ul(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Type definitions */
struct ip {
  int ip_len;
};

/* Variables and functions */
int get_ip_len(struct ip *self) { return self->ip_len; }


x86 assembly (clang, -O0):
<get_ip_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ip_len>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.ip = type { i32 }
define i32 @get_ip_len(%struct.ip* %0) {
%2 = alloca %struct.ip*
store %struct.ip* %0, %struct.ip** %2
%3 = load %struct.ip*, %struct.ip** %2
%4 = getelementptr inbounds %struct.ip, %struct.ip* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.ip = type { i32 }
define i32 @get_ip_len(%struct.ip* nocapture %0) {
%2 = getelementptr inbounds %struct.ip, %struct.ip* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
__attribute__((always_)) int test_and_change_bit(int nr,
                                                 volatile unsigned long *addr) {
  int oldbit;
  asm volatile(".section .smp_locks,\"a\"\n"
               " "
               ".balign 8"
               " "
               "\n"
               " "
               ".quad"
               " "
               "661f\n"
               ".previous\n"
               "661:\n\tlock; "
               "btc %2,%1\n\t"
               "sbb %0,%0"
               : "=r"(oldbit), "+m"(*(volatile long *)(addr))
               : "Ir"(nr)
               : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<test_and_change_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
lock btc %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_change_bit>:
lock btc %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_and_change_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; btc $2,$1\0A\09sbb $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7, i64* elementtype(i64) %6)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_and_change_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; btc $2,$1\0A\09sbb $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ contador();
int main() {
  contador();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <contador@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <contador@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @contador()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @contador()
ret i32 0
}
int test_imm_1Buint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x1b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint64_highword_mem>:
testb  $0x1b,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 27
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Buint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 115964116992
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int findfirstu(unsigned int *a, int n, unsigned int val) {
  int i;
  for (i = 0; i < n; i++) {
    if (a[i] == val)
      return i;
  }
  return -1;
}


x86 assembly (clang, -O0):
<findfirstu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <findfirstu+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <findfirstu+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <findfirstu+0x5a>
jmp    1145 <findfirstu+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <findfirstu+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findfirstu>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <findfirstu+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edx,(%rdi,%rcx,4)
je     111f <findfirstu+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <findfirstu+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @findfirstu(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @findfirstu(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
intsize() { return 4; }


x86 assembly (clang, -O0):
<intsize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intsize>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @intsize() {
ret i32 4
}

LLVM IR (-O2):
define i32 @intsize() {
ret i32 4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(size_t);
void *realloc(void *, size_t);
void *rpl_realloc(void *p, size_t n) {
  if (n == 0) {
    n = 1;
    free(p);
    p = NULL;
  }
  if (p == NULL)
    return malloc(n);
  return realloc(p, n);
}


x86 assembly (clang, -O0):
<rpl_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1164 <rpl_realloc+0x34>
movq   $0x1,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1181 <rpl_realloc+0x51>
mov    -0x18(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
jmp    1192 <rpl_realloc+0x62>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpl_realloc>:
test   %rsi,%rsi
je     113f <rpl_realloc+0xf>
test   %rdi,%rdi
je     1153 <rpl_realloc+0x23>
jmp    1050 <realloc@plt>
push   %rax
call   1030 <free@plt>
mov    $0x1,%edi
add    $0x8,%rsp
jmp    1040 <malloc@plt>
mov    %rsi,%rdi
jmp    1040 <malloc@plt>

LLVM IR (-O0):
define i8* @rpl_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
store i64 1, i64* %5
%9 = load i8*, i8** %4
%10 = call i32 @free(i8* %9)
store i8* null, i8** %4
br label %11
11: ; preds = %8, %2
%12 = load i8*, i8** %4
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i64, i64* %5
%16 = call i8* @malloc(i64 %15)
store i8* %16, i8** %3
br label %21
17: ; preds = %11
%18 = load i8*, i8** %4
%19 = load i64, i64* %5
%20 = call i8* @realloc(i8* %18, i64 %19)
store i8* %20, i8** %3
br label %21
21: ; preds = %17, %14
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define noalias i8* @rpl_realloc(i8* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @free(i8* %0)
br label %8
6: ; preds = %2
%7 = icmp eq i8* %0, null
br i1 %7, label %8, label %11
8: ; preds = %4, %6
%9 = phi i64 [ 1, %4 ], [ %1, %6 ]
%10 = tail call i8* @malloc(i64 %9)
br label %13
11: ; preds = %6
%12 = tail call i8* @realloc(i8* %0, i64 %1)
br label %13
13: ; preds = %11, %8
%14 = phi i8* [ %10, %8 ], [ %12, %11 ]
ret i8* %14
}
unsigned int extract_tid(unsigned int pattern) {
  unsigned int ret;
  ret =
      (pattern >> ((__builtin_ctz((1024 / (sizeof(unsigned int))))) +
                   (((sizeof(unsigned int)) * 8) -
                    (8 + (__builtin_ctz((1024 / (sizeof(unsigned int))))))))) &
      ((1 << 8) - 1);
  return ret;
}


x86 assembly (clang, -O0):
<extract_tid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x18,%eax
and    $0xff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_tid>:
mov    %edi,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @extract_tid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = lshr i32 %4, 24
%6 = and i32 %5, 255
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @extract_tid(i32 %0) {
%2 = lshr i32 %0, 24
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint64_t;

/* Variables and functions */
int /*<<< orphan*/ const prince_m_prime_layer(int /*<<< orphan*/ const);
int /*<<< orphan*/ const prince_shift_rows(int /*<<< orphan*/ const, int);
uint64_t prince_m_inv_layer(const uint64_t m_inv_in) {
  const uint64_t shift_rows_out = prince_shift_rows(m_inv_in, 1);
  const uint64_t m_prime_out = prince_m_prime_layer(shift_rows_out);
  return m_prime_out;
}


x86 assembly (clang, -O0):
<prince_m_inv_layer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1040 <prince_shift_rows@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <prince_m_prime_layer@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prince_m_inv_layer>:
push   %rax
mov    $0x1,%esi
call   1040 <prince_shift_rows@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <prince_m_prime_layer@plt>

LLVM IR (-O0):
define i32 @prince_m_inv_layer(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @prince_shift_rows(i32 %5, i32 1)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @prince_m_prime_layer(i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @prince_m_inv_layer(i32 %0) {
%2 = tail call i32 @prince_shift_rows(i32 %0, i32 1)
%3 = tail call i32 @prince_m_prime_layer(i32 %2)
ret i32 %3
}
unsigned long long sign(double d) {
  return *(unsigned long long *)(&d) & (1ull << 63);
}


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movabs $0x8000000000000000,%rax
and    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
movmskpd %xmm0,%eax
shl    $0x3f,%rax
ret

LLVM IR (-O0):
define i64 @sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = bitcast double* %2 to i64*
%4 = load i64, i64* %3
%5 = and i64 %4, -9223372036854775808
ret i64 %5
}

LLVM IR (-O2):
define i64 @sign(double %0) {
%2 = bitcast double %0 to i64
%3 = and i64 %2, -9223372036854775808
ret i64 %3
}
void set_b(void) {}


x86 assembly (clang, -O0):
<set_b>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_b>:
ret

LLVM IR (-O0):
define void @set_b() {
ret void
}

LLVM IR (-O2):
define void @set_b() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x52() {
  Assert_real((isalpha(82)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              415, ("isalpha should be 1 for R"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x52>:
push   %rbp
mov    %rsp,%rbp
mov    $0x52,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x19f,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x52>:
push   %rax
mov    $0x52,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x19f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for R\00"
define void @t_isalpha_0x52() {
%1 = call i32 @isalpha(i32 82)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for R\00"
define void @t_isalpha_0x52() {
%1 = tail call i32 @isalpha(i32 82)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}