xunge/DecIR huggingface dataset:
int verificar(int a) {
  if (a % 2 == 0) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<verificar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <verificar+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <verificar+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificar>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @verificar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @verificar(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_IA5STRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_IA5STRING_it;
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void ASN1_IA5STRING_free(ASN1_IA5STRING *a) {
  ASN1_item_free((ASN1_VALUE *)a, &ASN1_IA5STRING_it);
}


x86 assembly (clang, -O0):
<ASN1_IA5STRING_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_IA5STRING_free>:
mov    0x2ec1(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@ASN1_IA5STRING_it = global i32 0
define void @ASN1_IA5STRING_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @ASN1_IA5STRING_it)
ret void
}

LLVM IR (-O2):
@ASN1_IA5STRING_it = global i32 0
define void @ASN1_IA5STRING_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @ASN1_IA5STRING_it)
ret void
}
/* Type definitions */
typedef scalar_t__ int16_t;

/* Variables and functions */
float i16tof(int16_t s) { return ((float)s) / ((float)(256)); }


x86 assembly (clang, -O0):
<i16tof>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2ssq -0x8(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<i16tof>:
cvtsi2ss %rdi,%xmm0
mulss  0xef3(%rip),%xmm0
ret

LLVM IR (-O0):
define float @i16tof(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to float
%5 = fdiv float %4, 2.560000e+02
ret float %5
}

LLVM IR (-O2):
define float @i16tof(i64 %0) {
%2 = sitofp i64 %0 to float
%3 = fmul float %2, 3.906250e-03
ret float %3
}
/* Type definitions */
struct sqlConnection {
  int dummy;
};

/* Variables and functions */
char *indirectString(struct sqlConnection *, int, char *, char *);
char *bioImageTreatment(struct sqlConnection *conn, int id) {
  return indirectString(conn, id, "treatment", "conditions");
}


x86 assembly (clang, -O0):
<bioImageTreatment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdx
lea    0xed6(%rip),%rcx
call   1030 <indirectString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bioImageTreatment>:
lea    0xee9(%rip),%rdx
lea    0xeec(%rip),%rcx
jmp    1030 <indirectString@plt>

LLVM IR (-O0):
%struct.sqlConnection = type { i32 }
@.str = [10 x i8] c"treatment\00"
@.str.1 = [11 x i8] c"conditions\00"
define i8* @bioImageTreatment(%struct.sqlConnection* %0, i32 %1) {
%3 = alloca %struct.sqlConnection*
%4 = alloca i32
store %struct.sqlConnection* %0, %struct.sqlConnection** %3
store i32 %1, i32* %4
%5 = load %struct.sqlConnection*, %struct.sqlConnection** %3
%6 = load i32, i32* %4
%7 = call i8* @indirectString(%struct.sqlConnection* %5, i32 %6, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret i8* %7
}

LLVM IR (-O2):
%struct.sqlConnection = type { i32 }
@.str = [10 x i8] c"treatment\00"
@.str.1 = [11 x i8] c"conditions\00"
define i8* @bioImageTreatment(%struct.sqlConnection* %0, i32 %1) {
%3 = tail call i8* @indirectString(%struct.sqlConnection* %0, i32 %1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret i8* %3
}
float nm_to_lbft(float value) { return value * 0.7375621493f; }


x86 assembly (clang, -O0):
<nm_to_lbft>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nm_to_lbft>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @nm_to_lbft(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x3FE79A1BE0000000
ret float %4
}

LLVM IR (-O2):
define float @nm_to_lbft(float %0) {
%2 = fmul float %0, 0x3FE79A1BE0000000
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ Report(char *);
int astG3DTxExt(const char *text, float ref[3], const char *just, float up[3],
                float norm[3], float *xb, float *yb, float *zb, float bl[3]) {
  Report("astG3DTxExt");
  return 0;
}


x86 assembly (clang, -O0):
<astG3DTxExt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <Report@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<astG3DTxExt>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <Report@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"astG3DTxExt\00"
define i32 @astG3DTxExt(i8* %0, float* %1, i8* %2, float* %3, float* %4, float* %5, float* %6, float* %7, float* %8) {
%10 = alloca i8*
%11 = alloca float*
%12 = alloca i8*
%13 = alloca float*
%14 = alloca float*
%15 = alloca float*
%16 = alloca float*
%17 = alloca float*
%18 = alloca float*
store i8* %0, i8** %10
store float* %1, float** %11
store i8* %2, i8** %12
store float* %3, float** %13
store float* %4, float** %14
store float* %5, float** %15
store float* %6, float** %16
store float* %7, float** %17
store float* %8, float** %18
%19 = call i32 @Report(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"astG3DTxExt\00"
define i32 @astG3DTxExt(i8* nocapture readnone %0, float* nocapture readnone %1, i8* nocapture readnone %2, float* nocapture readnone %3, float* nocapture readnone %4, float* nocapture readnone %5, float* nocapture readnone %6, float* nocapture readnone %7, float* nocapture readnone %8) {
%10 = tail call i32 @Report(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void pcp_def_net_icmp_metrics(void) {}


x86 assembly (clang, -O0):
<pcp_def_net_icmp_metrics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_net_icmp_metrics>:
ret

LLVM IR (-O0):
define void @pcp_def_net_icmp_metrics() {
ret void
}

LLVM IR (-O2):
define void @pcp_def_net_icmp_metrics() {
ret void
}
/* Variables and functions */
int yas_bma250_read_reg_byte(int);
int yas_bma250_write_reg_byte(int, int);
int yas_bma250_set_cal_trigger(unsigned char value) {
  int ret = 0;
  int reg_data = 0;
  reg_data = yas_bma250_read_reg_byte(0x36);
  reg_data = ((reg_data & ~0x60) | ((value << 5) & 0x60));
  ret = yas_bma250_write_reg_byte(0x36, reg_data);
  return ret;
}


x86 assembly (clang, -O0):
<yas_bma250_set_cal_trigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x36,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffffff9f,%eax
movzbl -0x1(%rbp),%ecx
shl    $0x5,%ecx
and    $0x60,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x36,%edi
call   1030 <yas_bma250_write_reg_byte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_bma250_set_cal_trigger>:
push   %rbx
mov    %edi,%ebx
mov    $0x36,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
and    $0xffffff9f,%eax
shl    $0x5,%ebx
and    $0x60,%ebx
or     %eax,%ebx
mov    $0x36,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <yas_bma250_write_reg_byte@plt>

LLVM IR (-O0):
define i32 @yas_bma250_set_cal_trigger(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @yas_bma250_read_reg_byte(i32 54)
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = and i32 %6, -97
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 5
%11 = and i32 %10, 96
%12 = or i32 %7, %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = call i32 @yas_bma250_write_reg_byte(i32 54, i32 %13)
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @yas_bma250_set_cal_trigger(i8 zeroext %0) {
%2 = tail call i32 @yas_bma250_read_reg_byte(i32 54)
%3 = and i32 %2, -97
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 5
%6 = and i32 %5, 96
%7 = or i32 %3, %6
%8 = tail call i32 @yas_bma250_write_reg_byte(i32 54, i32 %7)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ lines;

/* Variables and functions */
int /*<<< orphan*/ complete_from_string_list(char const *, char const **, int);
void complete_selective_sync(const char str[]) {
  static const char *lines[] = {
      "location", "cursorpos", "localopts", "filters", "all",
  };
  complete_from_string_list(str, lines, (sizeof(lines) / sizeof((lines)[0])));
}


x86 assembly (clang, -O0):
<complete_selective_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0x2f09(%rip),%rsi
mov    $0x5,%edx
call   1030 <complete_from_string_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<complete_selective_sync>:
lea    0x2f19(%rip),%rsi
mov    $0x5,%edx
jmp    1030 <complete_from_string_list@plt>

LLVM IR (-O0):
@complete_selective_sync.lines = internal global [5 x i8*] [i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.4, i32 0, i32 0)]
@.str = [9 x i8] c"location\00"
@.str.1 = [10 x i8] c"cursorpos\00"
@.str.2 = [10 x i8] c"localopts\00"
@.str.3 = [8 x i8] c"filters\00"
@.str.4 = [4 x i8] c"all\00"
define void @complete_selective_sync(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @complete_from_string_list(i8* %3, i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @complete_selective_sync.lines, i64 0, i64 0), i32 5)
ret void
}

LLVM IR (-O2):
@complete_selective_sync.lines = internal global [5 x i8*] [i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.4, i32 0, i32 0)]
@.str = [9 x i8] c"location\00"
@.str.1 = [10 x i8] c"cursorpos\00"
@.str.2 = [10 x i8] c"localopts\00"
@.str.3 = [8 x i8] c"filters\00"
@.str.4 = [4 x i8] c"all\00"
define void @complete_selective_sync(i8* %0) {
%2 = tail call i32 @complete_from_string_list(i8* %0, i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @complete_selective_sync.lines, i64 0, i64 0), i32 5)
ret void
}
void CONF_get_section(void) {}


x86 assembly (clang, -O0):
<CONF_get_section>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CONF_get_section>:
ret

LLVM IR (-O0):
define void @CONF_get_section() {
ret void
}

LLVM IR (-O2):
define void @CONF_get_section() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int standard_diagonal_cascade_solutions(int a, int b) {
  int fail;
  double *c;
  fail = _ada_use_c2phc4c(271, &a, &b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<standard_diagonal_cascade_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x18(%rbp),%rcx
mov    $0x10f,%edi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<standard_diagonal_cascade_solutions>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
mov    $0x10f,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @standard_diagonal_cascade_solutions(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load double*, double** %6
%8 = call i32 @_ada_use_c2phc4c(i32 271, i32* %3, i32* %4, double* %7, i32 0)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @standard_diagonal_cascade_solutions(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @_ada_use_c2phc4c(i32 271, i32* %3, i32* %4, double* undef, i32 0)
ret i32 %5
}
int hputi2(hstring, keyword, ival)
char *hstring;
char *keyword;
short ival;
{
  char value[30];
  sprintf(value, "%d", ival);
  return (hputc(hstring, keyword, value));
}


x86 assembly (clang, -O0):
<hputi2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
lea    -0x30(%rbp),%rdi
movswl -0x12(%rbp),%edx
lea    0xeba(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x30(%rbp),%rdx
mov    $0x0,%al
call   1030 <hputc@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hputi2>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
movswl %dx,%edx
lea    0xec7(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdi
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
xor    %eax,%eax
call   1030 <hputc@plt>
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @hputi2(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i16
%7 = alloca [30 x i8]
%8 = trunc i32 %2 to i16
store i8* %0, i8** %4
store i8* %1, i8** %5
store i16 %8, i16* %6
%9 = getelementptr inbounds [30 x i8], [30 x i8]* %7, i64 0, i64 0
%10 = load i16, i16* %6
%11 = sext i16 %10 to i32
%12 = call i32 (i8*, i8*, ...) @sprintf(i8* %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = getelementptr inbounds [30 x i8], [30 x i8]* %7, i64 0, i64 0
%16 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @hputc to i32 (i8*, i8*, i8*, ...)*)(i8* %13, i8* %14, i8* %15)
ret i32 %16
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @hputi2(i8* %0, i8* %1, i32 %2) {
%4 = alloca [30 x i8]
%5 = getelementptr inbounds [30 x i8], [30 x i8]* %4, i64 0, i64 0
%6 = shl i32 %2, 16
%7 = ashr exact i32 %6, 16
%8 = call i32 (i8*, i8*, ...) @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @hputc to i32 (i8*, i8*, i8*, ...)*)(i8* %0, i8* %1, i8* %5)
ret i32 %9
}
void Clear_screen() {}


x86 assembly (clang, -O0):
<Clear_screen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Clear_screen>:
ret

LLVM IR (-O0):
define void @Clear_screen() {
ret void
}

LLVM IR (-O2):
define void @Clear_screen() {
ret void
}
/* Variables and functions */
int new_clone(int);
int /*<<< orphan*/ printf(char *);
page51() {
  printf("You run for it, but you don\'t run far.  Three hundred strange and "
         "exotic\n");
  printf("weapons turn you into a freeze dried cloud of soot.\n");
  return new_clone(32);
}


x86 assembly (clang, -O0):
<page51>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf13(%rip),%rdi
call   1030 <printf@plt>
mov    $0x20,%edi
call   1040 <new_clone@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<page51>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf15(%rip),%rdi
call   1030 <puts@plt>
mov    $0x20,%edi
pop    %rax
jmp    1040 <new_clone@plt>

LLVM IR (-O0):
@.str = [74 x i8] c"You run for it, but you don't run far. Three hundred strange and exotic\0A\00"
@.str.1 = [53 x i8] c"weapons turn you into a freeze dried cloud of soot.\0A\00"
define i32 @page51() {
%1 = call i32 @printf(i8* getelementptr inbounds ([74 x i8], [74 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @new_clone(i32 32)
ret i32 %3
}

LLVM IR (-O2):
@str = [73 x i8] c"You run for it, but you don't run far. Three hundred strange and exotic\00"
@str.2 = [52 x i8] c"weapons turn you into a freeze dried cloud of soot.\00"
define i32 @page51() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([73 x i8], [73 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([52 x i8], [52 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 @new_clone(i32 32)
ret i32 %3
}
void arch_irq_init(void) {
  extern void io_apic_init(void);
  io_apic_init();
}


x86 assembly (clang, -O0):
<arch_irq_init>:
push   %rbp
mov    %rsp,%rbp
call   1030 <io_apic_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_irq_init>:
jmp    1030 <io_apic_init@plt>

LLVM IR (-O0):
define void @arch_irq_init() {
ret void
}

LLVM IR (-O2):
define void @arch_irq_init() {
tail call void @io_apic_init()
ret void
}
/* Variables and functions */
scalar_t__ isnan(float);
int __ocl_isnotequal_float(float src1, float src2) {
  return isnan(src1) || isnan(src2) ? 1 : src1 != src2;
}


x86 assembly (clang, -O0):
<__ocl_isnotequal_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
jne    114a <__ocl_isnotequal_float+0x3a>
movss  -0x8(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
je     1157 <__ocl_isnotequal_float+0x47>
mov    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1170 <__ocl_isnotequal_float+0x60>
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setne  %al
setp   %cl
or     %cl,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_isnotequal_float>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm1,0x8(%rsp)
movss  %xmm0,0xc(%rsp)
call   1030 <isnan@plt>
mov    $0x1,%ebx
test   %rax,%rax
jne    1154 <__ocl_isnotequal_float+0x44>
movss  0x8(%rsp),%xmm0
call   1030 <isnan@plt>
test   %rax,%rax
jne    1154 <__ocl_isnotequal_float+0x44>
movss  0xc(%rsp),%xmm0
cmpneqss 0x8(%rsp),%xmm0
movd   %xmm0,%ebx
and    $0x1,%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__ocl_isnotequal_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call i64 @isnan(float %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load float, float* %4
%10 = call i64 @isnan(float %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8, %2
br label %18
13: ; preds = %8
%14 = load float, float* %3
%15 = load float, float* %4
%16 = fcmp une float %14, %15
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %13, %12
%19 = phi i32 [ 1, %12 ], [ %17, %13 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @__ocl_isnotequal_float(float %0, float %1) {
%3 = tail call i64 @isnan(float %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = tail call i64 @isnan(float %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = fcmp une float %0, %1
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %2, %5, %8
%12 = phi i32 [ %10, %8 ], [ 1, %5 ], [ 1, %2 ]
ret i32 %12
}
int ft_toupper(int c) {
  if (c >= 'a' && c <= 'z')
    return (c - 32);
  else
    return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1129 <ft_toupper+0x29>
cmpl   $0x7a,-0x8(%rbp)
jg     1129 <ft_toupper+0x29>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <ft_toupper+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ sendCmd(int, char *, int, int, int, int, int, int);
void sketchBlit(int fd, int srcX, int srcY, int srcH, int srcW, int destX,
                int destY) {
  sendCmd(fd, "blit %i %i %i %i %i %i\n", destX, destY, srcX, srcY, srcW, srcH);
}


x86 assembly (clang, -O0):
<sketchBlit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%edx
mov    0x10(%rbp),%ecx
mov    -0x8(%rbp),%r8d
mov    -0xc(%rbp),%r9d
mov    -0x14(%rbp),%r10d
mov    -0x10(%rbp),%eax
lea    0xeb2(%rip),%rsi
mov    %r10d,(%rsp)
mov    %eax,0x8(%rsp)
call   1030 <sendCmd@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sketchBlit>:
push   %rax
mov    %r8d,%r10d
mov    %ecx,%r11d
mov    %edx,%eax
mov    %esi,%r8d
mov    0x10(%rsp),%ecx
lea    0xed9(%rip),%rsi
mov    %r9d,%edx
mov    %eax,%r9d
push   %r11
push   %r10
call   1030 <sendCmd@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
@.str = [24 x i8] c"blit %i %i %i %i %i %i\0A\00"
define void @sketchBlit(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load i32, i32* %8
%16 = load i32, i32* %13
%17 = load i32, i32* %14
%18 = load i32, i32* %9
%19 = load i32, i32* %10
%20 = load i32, i32* %12
%21 = load i32, i32* %11
%22 = call i32 @sendCmd(i32 %15, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %16, i32 %17, i32 %18, i32 %19, i32 %20, i32 %21)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"blit %i %i %i %i %i %i\0A\00"
define void @sketchBlit(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = tail call i32 @sendCmd(i32 %0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6, i32 %1, i32 %2, i32 %4, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_agile_mst();
int /*<<< orphan*/ test_agile_shortest();
int /*<<< orphan*/ test_agile_tsp();
void test_agile_graph_alg() {
  test_agile_mst();
  printf("\n");
  test_agile_shortest();
  printf("\n");
  test_agile_tsp();
}


x86 assembly (clang, -O0):
<test_agile_graph_alg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_agile_mst@plt>
lea    0xeae(%rip),%rdi
call   1050 <printf@plt>
mov    $0x0,%al
call   1030 <test_agile_shortest@plt>
lea    0xe9b(%rip),%rdi
call   1050 <printf@plt>
mov    $0x0,%al
call   1060 <test_agile_tsp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_agile_graph_alg>:
push   %rax
xor    %eax,%eax
call   1050 <test_agile_mst@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <test_agile_shortest@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <test_agile_tsp@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @test_agile_graph_alg() {
%1 = call i32 (...) @test_agile_mst()
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @test_agile_shortest()
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @test_agile_tsp()
ret void
}

LLVM IR (-O2):
define void @test_agile_graph_alg() {
%1 = tail call i32 (...) @test_agile_mst()
%2 = tail call i32 @putchar(i32 10)
%3 = tail call i32 (...) @test_agile_shortest()
%4 = tail call i32 @putchar(i32 10)
%5 = tail call i32 (...) @test_agile_tsp()
ret void
}
const char *hfi_display(const struct hfinfo *hfi) { return "BASE_NONE"; }


x86 assembly (clang, -O0):
<hfi_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfi_display>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
%struct.hfinfo = type opaque
@.str = [10 x i8] c"BASE_NONE\00"
define i8* @hfi_display(%struct.hfinfo* %0) {
%2 = alloca %struct.hfinfo*
store %struct.hfinfo* %0, %struct.hfinfo** %2
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.hfinfo = type opaque
@.str = [10 x i8] c"BASE_NONE\00"
define i8* @hfi_display(%struct.hfinfo* nocapture readnone %0) {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
int sasl_usererr(int saslerr) {
  if (saslerr == -20)
    return -13;
  return saslerr;
}


x86 assembly (clang, -O0):
<sasl_usererr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffffec,-0x8(%rbp)
jne    111d <sasl_usererr+0x1d>
movl   $0xfffffff3,-0x4(%rbp)
jmp    1123 <sasl_usererr+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sasl_usererr>:
cmp    $0xffffffec,%edi
mov    $0xfffffff3,%eax
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @sasl_usererr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, -20
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -13, i32* %2
br label %9
7: ; preds = %1
%8 = load i32, i32* %3
store i32 %8, i32* %2
br label %9
9: ; preds = %7, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @sasl_usererr(i32 %0) {
%2 = icmp eq i32 %0, -20
%3 = select i1 %2, i32 -13, i32 %0
ret i32 %3
}
/* Variables and functions */
void igt_ignore_warn(bool value) {}


x86 assembly (clang, -O0):
<igt_ignore_warn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<igt_ignore_warn>:
ret

LLVM IR (-O0):
define void @igt_ignore_warn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @igt_ignore_warn(i32 %0) {
ret void
}
int init_emergency_isa_pool(void) {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<init_emergency_isa_pool>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_emergency_isa_pool>:
ret

LLVM IR (-O0):
define i32 @init_emergency_isa_pool() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @init_emergency_isa_pool() {
ret i32 undef
}
/* Variables and functions */
int f1(int);
int g() { return f1(2); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <f1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x2,%edi
jmp    1030 <f1@plt>

LLVM IR (-O0):
define i32 @g() {
%1 = call i32 @f1(i32 2)
ret i32 %1
}

LLVM IR (-O2):
define i32 @g() {
%1 = tail call i32 @f1(i32 2)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ vmi_set_lazy_mode(int);
void arch_enter_lazy_mmu_mode(void) { vmi_set_lazy_mode(0x01); }


x86 assembly (clang, -O0):
<arch_enter_lazy_mmu_mode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <vmi_set_lazy_mode@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_enter_lazy_mmu_mode>:
mov    $0x1,%edi
jmp    1030 <vmi_set_lazy_mode@plt>

LLVM IR (-O0):
define void @arch_enter_lazy_mmu_mode() {
%1 = call i32 @vmi_set_lazy_mode(i32 1)
ret void
}

LLVM IR (-O2):
define void @arch_enter_lazy_mmu_mode() {
%1 = tail call i32 @vmi_set_lazy_mode(i32 1)
ret void
}
/* Variables and functions */
void memcmp() {}


x86 assembly (clang, -O0):
<memcmp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcmp>:
ret

LLVM IR (-O0):
define void @memcmp() {
ret void
}

LLVM IR (-O2):
define void @memcmp() {
ret void
}
int foo() {
  int y;
  volatile int x;
  x = 5;
  x = 5;
  y = 3;
  return x + y;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x8(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x3,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movl   $0x5,-0x4(%rsp)
movl   $0x5,-0x4(%rsp)
mov    -0x4(%rsp),%eax
add    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = alloca i32
store volatile i32 5, i32* %2
store volatile i32 5, i32* %2
store i32 3, i32* %1
%3 = load volatile i32, i32* %2
%4 = load i32, i32* %1
%5 = add nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 5, i32* %1
store volatile i32 5, i32* %1
%3 = load volatile i32, i32* %1
%4 = add nsw i32 %3, 3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ setenv(char *, char *, int);
int /*<<< orphan*/ test_mktime();
int /*<<< orphan*/ tzset();
int main(int argc, char **argv) {
  setenv("TZ", "", 1);
  tzset();
  if (!test_mktime())
    return 1;
  printf("OK\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
lea    0xea2(%rip),%rsi
mov    $0x1,%edx
call   1030 <setenv@plt>
mov    $0x0,%al
call   1060 <tzset@plt>
mov    $0x0,%al
call   1050 <test_mktime@plt>
cmp    $0x0,%eax
jne    1191 <main+0x51>
movl   $0x1,-0x4(%rbp)
jmp    11a4 <main+0x64>
lea    0xe6b(%rip),%rdi
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeb8(%rip),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x1,%ebx
mov    $0x1,%edx
call   1040 <setenv@plt>
xor    %eax,%eax
call   1060 <tzset@plt>
xor    %eax,%eax
call   1050 <test_mktime@plt>
test   %eax,%eax
je     117e <main+0x3e>
lea    0xe8c(%rip),%rdi
call   1030 <puts@plt>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"TZ\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [4 x i8] c"OK\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @setenv(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
%7 = call i32 (...) @tzset()
%8 = call i32 (...) @test_mktime()
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 1, i32* %3
br label %13
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
store i32 0, i32* %3
br label %13
13: ; preds = %11, %10
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"TZ\00"
@.str.1 = [1 x i8] zeroinitializer
@str = [3 x i8] c"OK\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @setenv(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
%4 = tail call i32 (...) @tzset()
%5 = tail call i32 (...) @test_mktime()
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ 0, %7 ], [ 1, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void _FAT_mem_free(void *mem) { free(mem); }


x86 assembly (clang, -O0):
<_FAT_mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_FAT_mem_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @_FAT_mem_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @_FAT_mem_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int test_imm_18int64_lowword_mem(long long *val) {
  return ((*val) & (0x18 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_18int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x18,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_18int64_lowword_mem>:
testb  $0x18,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_18int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 24
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_18int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 24
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
unsigned int __blsmsk_u32(unsigned int);
unsigned int test__blsmsk_u32(unsigned int __X) { return __blsmsk_u32(__X); }


x86 assembly (clang, -O0):
<test__blsmsk_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__blsmsk_u32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__blsmsk_u32>:
jmp    1030 <__blsmsk_u32@plt>

LLVM IR (-O0):
define i32 @test__blsmsk_u32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__blsmsk_u32(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test__blsmsk_u32(i32 %0) {
%2 = tail call i32 @__blsmsk_u32(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ FatalErrnoError(int, int, char *);
int chdir(char const *);
void Echdir(char const path[]) {
  FatalErrnoError(chdir(path) == -1, 1, "chdir()");
}


x86 assembly (clang, -O0):
<Echdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chdir@plt>
cmp    $0xffffffff,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x1,%esi
lea    0xeb4(%rip),%rdx
call   1040 <FatalErrnoError@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Echdir>:
push   %rax
call   1030 <chdir@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
lea    0xeca(%rip),%rdx
mov    $0x1,%esi
pop    %rax
jmp    1040 <FatalErrnoError@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"chdir()\00"
define void @Echdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @chdir(i8* %3)
%5 = icmp eq i32 %4, -1
%6 = zext i1 %5 to i32
%7 = call i32 @FatalErrnoError(i32 %6, i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"chdir()\00"
define void @Echdir(i8* %0) {
%2 = tail call i32 @chdir(i8* %0)
%3 = icmp eq i32 %2, -1
%4 = zext i1 %3 to i32
%5 = tail call i32 @FatalErrnoError(i32 %4, i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t onError(void *context, int32_t result) { return 0; }


x86 assembly (clang, -O0):
<onError>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<onError>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @onError(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @onError(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Type definitions */
struct token {
  int dummy;
};

/* Variables and functions */
int func_wait(struct token *tok, size_t size) { return 0; }


x86 assembly (clang, -O0):
<func_wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_wait>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.token = type { i32 }
define i32 @func_wait(%struct.token* %0, i64 %1) {
%3 = alloca %struct.token*
%4 = alloca i64
store %struct.token* %0, %struct.token** %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
%struct.token = type { i32 }
define i32 @func_wait(%struct.token* nocapture readnone %0, i64 %1) {
ret i32 0
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ cli_addr;

/* Variables and functions */
int accept(int, struct sockaddr *, int *);
int unified_sockets__accept(int _sd) {
  int ret;
  struct sockaddr_in cli_addr;
  int len;
  len = sizeof(cli_addr);
  ret = accept(_sd, (struct sockaddr *)&cli_addr, &len);
  if (ret >= 0) {
    ;
  } else {
    ret = -1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<unified_sockets__accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x4,-0x14(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
call   1030 <accept@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1144 <unified_sockets__accept+0x34>
jmp    114b <unified_sockets__accept+0x3b>
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unified_sockets__accept>:
sub    $0x18,%rsp
movl   $0x4,0xc(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1030 <accept@plt>
test   %eax,%eax
mov    $0xffffffff,%ecx
cmovs  %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @unified_sockets__accept(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.sockaddr_in
%5 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %5
%6 = load i32, i32* %2
%7 = bitcast %struct.sockaddr_in* %4 to %struct.sockaddr*
%8 = call i32 @accept(i32 %6, %struct.sockaddr* %7, i32* %5)
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
br label %13
12: ; preds = %1
store i32 -1, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @unified_sockets__accept(i32 %0) {
%2 = alloca %struct.sockaddr_in
%3 = alloca i32
%4 = bitcast %struct.sockaddr_in* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%6 = bitcast %struct.sockaddr_in* %2 to %struct.sockaddr*
%7 = call i32 @accept(i32 %0, %struct.sockaddr* %6, i32* %3)
%8 = icmp sgt i32 %7, -1
%9 = select i1 %8, i32 %7, i32 -1
ret i32 %9
}
long sse42_pop_l(long a) { return __builtin_popcountl(a); }


x86 assembly (clang, -O0):
<sse42_pop_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<sse42_pop_l>:
mov    %rdi,%rax
shr    %rax
movabs $0x5555555555555555,%rcx
55 55 55
and    %rax,%rcx
sub    %rcx,%rdi
movabs $0x3333333333333333,%rax
33 33 33
mov    %rdi,%rcx
and    %rax,%rcx
shr    $0x2,%rdi
and    %rdi,%rax
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rax,%rcx
movabs $0xf0f0f0f0f0f0f0f,%rdx
0f 0f 0f
and    %rcx,%rdx
movabs $0x101010101010101,%rax
01 01 01
imul   %rdx,%rax
shr    $0x38,%rax
ret

LLVM IR (-O0):
define i64 @sse42_pop_l(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = trunc i64 %4 to i32
%6 = sext i32 %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @sse42_pop_l(i64 %0) {
%2 = tail call i64 @llvm.ctpop.i64(i64 %0)
ret i64 %2
}
int raise(sig)
int sig;
{ return __kill(__getpid(), sig); }


x86 assembly (clang, -O0):
<raise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__getpid@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
mov    $0x0,%al
call   1040 <__kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raise>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <__getpid@plt>
mov    %eax,%edi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1040 <__kill@plt>

LLVM IR (-O0):
define i32 @raise(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @__getpid()
%4 = load i32, i32* %2
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @__kill to i32 (i32, i32, ...)*)(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @raise(i32 %0) {
%2 = tail call i32 (...) @__getpid()
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @__kill to i32 (i32, i32, ...)*)(i32 %2, i32 %0)
ret i32 %3
}
void example_NCC__direct_isalist_foreach(struct module *mod) {}


x86 assembly (clang, -O0):
<example_NCC__direct_isalist_foreach>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<example_NCC__direct_isalist_foreach>:
ret

LLVM IR (-O0):
%struct.module = type opaque
define void @example_NCC__direct_isalist_foreach(%struct.module* %0) {
%2 = alloca %struct.module*
store %struct.module* %0, %struct.module** %2
ret void
}

LLVM IR (-O2):
%struct.module = type opaque
define void @example_NCC__direct_isalist_foreach(%struct.module* nocapture %0) {
ret void
}
unsigned int call_reset(unsigned int descriptor) { return 0; }


x86 assembly (clang, -O0):
<call_reset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_reset>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @call_reset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @call_reset(i32 %0) {
ret i32 0
}
void netsnmp_generic_remove_delete_row(void *table, void *row) {}


x86 assembly (clang, -O0):
<netsnmp_generic_remove_delete_row>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<netsnmp_generic_remove_delete_row>:
ret

LLVM IR (-O0):
define void @netsnmp_generic_remove_delete_row(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @netsnmp_generic_remove_delete_row(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
struct i2c_adapter {
  int dummy;
};

/* Variables and functions */
int inv_i2c_write_register(struct i2c_adapter *, unsigned char, unsigned char,
                           unsigned char);
int inv_serial_single_write(void *sl_handle, unsigned char slave_addr,
                            unsigned char register_addr, unsigned char data) {
  return inv_i2c_write_register((struct i2c_adapter *)sl_handle, slave_addr,
                                register_addr, data);
}


x86 assembly (clang, -O0):
<inv_serial_single_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %rdi,-0x8(%rbp)
mov    %dl,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%cl
mov    -0xa(%rbp),%al
movzbl %cl,%esi
movzbl %al,%edx
movzbl -0xb(%rbp),%ecx
call   1030 <inv_i2c_write_register@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_serial_single_write>:
jmp    1030 <inv_i2c_write_register@plt>

LLVM IR (-O0):
%struct.i2c_adapter = type { i32 }
define i32 @inv_serial_single_write(i8* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to %struct.i2c_adapter*
%11 = load i8, i8* %6
%12 = load i8, i8* %7
%13 = load i8, i8* %8
%14 = call i32 @inv_i2c_write_register(%struct.i2c_adapter* %10, i8 zeroext %11, i8 zeroext %12, i8 zeroext %13)
ret i32 %14
}

LLVM IR (-O2):
%struct.i2c_adapter = type { i32 }
define i32 @inv_serial_single_write(i8* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = bitcast i8* %0 to %struct.i2c_adapter*
%6 = tail call i32 @inv_i2c_write_register(%struct.i2c_adapter* %5, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ yet_another(int);
int main(int argc, char *argv[]) {
  yet_another(argc > 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <yet_another@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
cmp    $0x2,%edi
setge  %al
mov    %eax,%edi
call   1030 <yet_another@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
%8 = zext i1 %7 to i32
%9 = call i32 @yet_another(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp sgt i32 %0, 1
%4 = zext i1 %3 to i32
%5 = tail call i32 @yet_another(i32 %4)
ret i32 0
}
void pinmux_show_map(struct seq_file *s, const struct pinctrl_map *map) {}


x86 assembly (clang, -O0):
<pinmux_show_map>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pinmux_show_map>:
ret

LLVM IR (-O0):
%struct.seq_file = type opaque
%struct.pinctrl_map = type opaque
define void @pinmux_show_map(%struct.seq_file* %0, %struct.pinctrl_map* %1) {
%3 = alloca %struct.seq_file*
%4 = alloca %struct.pinctrl_map*
store %struct.seq_file* %0, %struct.seq_file** %3
store %struct.pinctrl_map* %1, %struct.pinctrl_map** %4
ret void
}

LLVM IR (-O2):
%struct.seq_file = type opaque
%struct.pinctrl_map = type opaque
define void @pinmux_show_map(%struct.seq_file* nocapture %0, %struct.pinctrl_map* nocapture %1) {
ret void
}
int AlwaysGreater(void *Data1, void *Data2) { return 1; }


x86 assembly (clang, -O0):
<AlwaysGreater>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AlwaysGreater>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @AlwaysGreater(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @AlwaysGreater(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}