xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ read(int, unsigned char *, int);
int nextchar(int fd) {
  unsigned char b[4] = {0};
  read(fd, b, 1);
  return b[0];
}


x86 assembly (clang, -O0):
<nextchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
movzbl -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nextchar>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
movzbl 0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @nextchar(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i8]
store i32 %0, i32* %2
%4 = bitcast [4 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%7 = call i32 @read(i32 %5, i8* %6, i32 1)
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @nextchar(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @read(i32 %0, i8* %3, i32 1)
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
ret i32 %6
}
void quat_to_eul2(const float q[4], int order, float e1[3], float e2[3]) {
  float m[3][3];
  quat_to_mat3(q, m);
  mat3_to_eul2(m, order, e1, e2);
}


x86 assembly (clang, -O0):
<quat_to_eul2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x50(%rbp),%rsi
mov    $0x0,%al
call   1040 <quat_to_mat3@plt>
lea    -0x50(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x0,%al
call   1030 <mat3_to_eul2@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quat_to_eul2>:
push   %rbp
push   %r15
push   %r14
push   %rbx
sub    $0x28,%rsp
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %esi,%ebp
mov    %rsp,%r15
mov    %r15,%rsi
xor    %eax,%eax
call   1040 <quat_to_mat3@plt>
mov    %r15,%rdi
mov    %ebp,%esi
mov    %rbx,%rdx
mov    %r14,%rcx
xor    %eax,%eax
call   1030 <mat3_to_eul2@plt>
add    $0x28,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quat_to_eul2(float* %0, i32 %1, float* %2, float* %3) {
%5 = alloca float*
%6 = alloca i32
%7 = alloca float*
%8 = alloca float*
%9 = alloca [3 x [3 x float]]
store float* %0, float** %5
store i32 %1, i32* %6
store float* %2, float** %7
store float* %3, float** %8
%10 = load float*, float** %5
%11 = getelementptr inbounds [3 x [3 x float]], [3 x [3 x float]]* %9, i64 0, i64 0
%12 = call i32 (float*, [3 x float]*, ...) bitcast (i32 (...)* @quat_to_mat3 to i32 (float*, [3 x float]*, ...)*)(float* %10, [3 x float]* %11)
%13 = getelementptr inbounds [3 x [3 x float]], [3 x [3 x float]]* %9, i64 0, i64 0
%14 = load i32, i32* %6
%15 = load float*, float** %7
%16 = load float*, float** %8
%17 = call i32 ([3 x float]*, i32, float*, float*, ...) bitcast (i32 (...)* @mat3_to_eul2 to i32 ([3 x float]*, i32, float*, float*, ...)*)([3 x float]* %13, i32 %14, float* %15, float* %16)
ret void
}

LLVM IR (-O2):
define void @quat_to_eul2(float* %0, i32 %1, float* %2, float* %3) {
%5 = alloca [3 x [3 x float]]
%6 = bitcast [3 x [3 x float]]* %5 to i8*
%7 = getelementptr inbounds [3 x [3 x float]], [3 x [3 x float]]* %5, i64 0, i64 0
%8 = call i32 (float*, [3 x float]*, ...) bitcast (i32 (...)* @quat_to_mat3 to i32 (float*, [3 x float]*, ...)*)(float* %0, [3 x float]* %7)
%9 = call i32 ([3 x float]*, i32, float*, float*, ...) bitcast (i32 (...)* @mat3_to_eul2 to i32 ([3 x float]*, i32, float*, float*, ...)*)([3 x float]* %7, i32 %1, float* %2, float* %3)
ret void
}
/* Type definitions */
struct bee_getopt_ctl {
  int dummy;
};

/* Variables and functions */
int _bee_getopt_long(struct bee_getopt_ctl *, int *);
int bee_getopt_long(struct bee_getopt_ctl *optctl, int *optindex) {
  return _bee_getopt_long(optctl, optindex);
}


x86 assembly (clang, -O0):
<bee_getopt_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_bee_getopt_long@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bee_getopt_long>:
jmp    1030 <_bee_getopt_long@plt>

LLVM IR (-O0):
%struct.bee_getopt_ctl = type { i32 }
define i32 @bee_getopt_long(%struct.bee_getopt_ctl* %0, i32* %1) {
%3 = alloca %struct.bee_getopt_ctl*
%4 = alloca i32*
store %struct.bee_getopt_ctl* %0, %struct.bee_getopt_ctl** %3
store i32* %1, i32** %4
%5 = load %struct.bee_getopt_ctl*, %struct.bee_getopt_ctl** %3
%6 = load i32*, i32** %4
%7 = call i32 @_bee_getopt_long(%struct.bee_getopt_ctl* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.bee_getopt_ctl = type { i32 }
define i32 @bee_getopt_long(%struct.bee_getopt_ctl* %0, i32* %1) {
%3 = tail call i32 @_bee_getopt_long(%struct.bee_getopt_ctl* %0, i32* %1)
ret i32 %3
}
__attribute__((no, noclone)) int fn2(signed char x, long int y) {
  short int res;
  int ovf = __builtin_mul_overflow(x, y, &res);
  int res2 = res;
  int res3 = res2 - 2;
  (void)ovf;
  return res;
}


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x10(%rbp),%rax
movsbq %cl,%rdx
imul   %rax,%rdx
seto   %al
mov    %dx,%cx
movswq %cx,%rsi
cmp    %rsi,%rdx
setne  %dl
or     %dl,%al
mov    %cx,-0x12(%rbp)
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x18(%rbp)
movswl -0x12(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x20(%rbp)
movswl -0x12(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
imul   %edi,%esi
movswl %si,%eax
ret

LLVM IR (-O0):
define i32 @fn2(i8 signext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
%5 = alloca i16
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i64 %1, i64* %4
%9 = load i8, i8* %3
%10 = load i64, i64* %4
%11 = sext i8 %9 to i64
%12 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %11, i64 %10)
%13 = extractvalue { i64, i1 } %12, 1
%14 = extractvalue { i64, i1 } %12, 0
%15 = trunc i64 %14 to i16
%16 = sext i16 %15 to i64
%17 = icmp ne i64 %14, %16
%18 = or i1 %13, %17
store i16 %15, i16* %5
%19 = zext i1 %18 to i32
store i32 %19, i32* %6
%20 = load i16, i16* %5
%21 = sext i16 %20 to i32
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = sub nsw i32 %22, 2
store i32 %23, i32* %8
%24 = load i32, i32* %6
%25 = load i16, i16* %5
%26 = sext i16 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @fn2(i8 signext %0, i64 %1) {
%3 = sext i8 %0 to i64
%4 = mul i64 %3, %1
%5 = trunc i64 %4 to i32
%6 = shl i32 %5, 16
%7 = ashr exact i32 %6, 16
ret i32 %7
}
int ctoi(unsigned char c) { return c - '0'; }


x86 assembly (clang, -O0):
<ctoi>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sub    $0x30,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctoi>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ctoi(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = sub nsw i32 %4, 48
ret i32 %5
}

LLVM IR (-O2):
define i32 @ctoi(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = add nsw i32 %2, -48
ret i32 %3
}
/* Variables and functions */
bool SHAREMIND_SET_KEY_EQUALS_size_t(size_t const k1, size_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_EQUALS_size_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_EQUALS_size_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_EQUALS_size_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_EQUALS_size_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void abcd4efghijklmnopqrstuvwxzy() {}


x86 assembly (clang, -O0):
<abcd4efghijklmnopqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abcd4efghijklmnopqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @abcd4efghijklmnopqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @abcd4efghijklmnopqrstuvwxzy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void usage(char *prog) {
  printf("  Usage: %s <ESSID> <band>\n", prog);
  printf("   - ESSID should be in 'UPCxxxxxxx' format\n");
  printf("   - band should be either '24' for 2.4GHz or '5' for 5GHz\n\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf06(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xee3(%rip),%rdi
call   1030 <puts@plt>
lea    0xf03(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [28 x i8] c" Usage: %s <ESSID> <band>\0A\00"
@.str.1 = [45 x i8] c" - ESSID should be in 'UPCxxxxxxx' format\0A\00"
@.str.2 = [61 x i8] c" - band should be either '24' for 2.4GHz or '5' for 5GHz\0A\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c" Usage: %s <ESSID> <band>\0A\00"
@str = [44 x i8] c" - ESSID should be in 'UPCxxxxxxx' format\00"
@str.3 = [60 x i8] c" - band should be either '24' for 2.4GHz or '5' for 5GHz\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([60 x i8], [60 x i8]* @str.3, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ stdout;
void move_cursor_right(int count) {
  char buffer[10];
  memset(buffer, 0, sizeof(buffer));
  sprintf(buffer, "\033[%dC", count);
  fputs(buffer, stdout);
}


x86 assembly (clang, -O0):
<move_cursor_right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0xe(%rbp),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1040 <memset@plt>
lea    -0xe(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xea7(%rip),%rsi
call   1050 <sprintf@plt>
lea    -0xe(%rbp),%rdi
mov    0x2e77(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_cursor_right>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebx
lea    0xe(%rsp),%r14
mov    %r14,%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1040 <memset@plt>
lea    0xeac(%rip),%rsi
mov    %r14,%rdi
mov    %ebx,%edx
call   1050 <sprintf@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%esi
mov    %r14,%rdi
call   1030 <fputs@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dC\00"
@stdout = global i32 0
define void @move_cursor_right(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%5 = call i32 @memset(i8* %4, i32 0, i32 10)
%6 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%7 = load i32, i32* %2
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%10 = load i32, i32* @stdout
%11 = call i32 @fputs(i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dC\00"
@stdout = global i32 0
define void @move_cursor_right(i32 %0) {
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = call i32 @memset(i8* %3, i32 0, i32 10)
%5 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
%6 = load i32, i32* @stdout
%7 = call i32 @fputs(i8* %3, i32 %6)
ret void
}
/* Type definitions */
struct i2c {
  int dummy;
};

/* Variables and functions */
long getByte(struct i2c *, int, int);
long getKey(struct i2c *i2c, int key) { return getByte(i2c, 0x69, 0x09 + key); }


x86 assembly (clang, -O0):
<getKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
add    $0x9,%edx
mov    $0x69,%esi
call   1030 <getByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getKey>:
lea    0x9(%rsi),%edx
mov    $0x69,%esi
jmp    1030 <getByte@plt>

LLVM IR (-O0):
%struct.i2c = type { i32 }
define i64 @getKey(%struct.i2c* %0, i32 %1) {
%3 = alloca %struct.i2c*
%4 = alloca i32
store %struct.i2c* %0, %struct.i2c** %3
store i32 %1, i32* %4
%5 = load %struct.i2c*, %struct.i2c** %3
%6 = load i32, i32* %4
%7 = add nsw i32 9, %6
%8 = call i64 @getByte(%struct.i2c* %5, i32 105, i32 %7)
ret i64 %8
}

LLVM IR (-O2):
%struct.i2c = type { i32 }
define i64 @getKey(%struct.i2c* %0, i32 %1) {
%3 = add nsw i32 %1, 9
%4 = tail call i64 @getByte(%struct.i2c* %0, i32 105, i32 %3)
ret i64 %4
}
int main() {
  double val = 3;
  return (int)val;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movsd  0xeed(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double
store i32 0, i32* %1
store double 3.000000e+00, double* %2
%3 = load double, double* %2
%4 = fptosi double %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  int i = 0;
  for (i = 0; i < argc; i++) {
    printf("%s\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115a <main+0x4a>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1134 <main+0x24>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    113d <main+0x2d>
mov    %edi,%ebx
lea    0xedf(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %6
br label %7
7: ; preds = %13, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 1
store i32 %15, i32* %6
br label %7
16: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret i32 0
}
void gdk_rgb_colormap_ditherable() {}


x86 assembly (clang, -O0):
<gdk_rgb_colormap_ditherable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_rgb_colormap_ditherable>:
ret

LLVM IR (-O0):
define void @gdk_rgb_colormap_ditherable() {
ret void
}

LLVM IR (-O2):
define void @gdk_rgb_colormap_ditherable() {
ret void
}
void fob() {
  for (;;) {
  }
}


x86 assembly (clang, -O0):
<fob>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <fob+0x9>
jmp    1109 <fob+0x9>

x86 assembly (clang, -O2):
<fob>:
jmp    1100 <fob>

LLVM IR (-O0):
define void @fob() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @fob() {
br label %1
1: ; preds = %1, %0
br label %1
}
int getImgSizeCategory(int width, int height) {
  int imgcat;
  long i = width * height;
  if (i < 5000)
    imgcat = 0;
  else if ((i < 50000) || (width < 150) || (height < 150))
    imgcat = 1;
  else if (i < 250000)
    imgcat = 2;
  else
    imgcat = 3;
  return (imgcat);
}


x86 assembly (clang, -O0):
<getImgSizeCategory>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
cltq
mov    %rax,-0x18(%rbp)
cmpq   $0x1388,-0x18(%rbp)
jge    1131 <getImgSizeCategory+0x31>
movl   $0x0,-0xc(%rbp)
jmp    1190 <getImgSizeCategory+0x90>
cmpq   $0xc350,-0x18(%rbp)
jl     1159 <getImgSizeCategory+0x59>
cmpl   $0x96,-0x4(%rbp)
jl     1159 <getImgSizeCategory+0x59>
cmpl   $0x96,-0x8(%rbp)
jge    1165 <getImgSizeCategory+0x65>
movl   $0x1,-0xc(%rbp)
jmp    118b <getImgSizeCategory+0x8b>
cmpq   $0x3d090,-0x18(%rbp)
jge    117f <getImgSizeCategory+0x7f>
movl   $0x2,-0xc(%rbp)
jmp    1186 <getImgSizeCategory+0x86>
movl   $0x3,-0xc(%rbp)
jmp    118b <getImgSizeCategory+0x8b>
jmp    1190 <getImgSizeCategory+0x90>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getImgSizeCategory>:
mov    %esi,%ecx
imul   %edi,%ecx
xor    %eax,%eax
cmp    $0x1388,%ecx
jl     113a <getImgSizeCategory+0x3a>
mov    $0x1,%eax
cmp    $0x96,%esi
jl     113a <getImgSizeCategory+0x3a>
cmp    $0x96,%edi
jl     113a <getImgSizeCategory+0x3a>
cmp    $0xc350,%ecx
jb     113a <getImgSizeCategory+0x3a>
cmp    $0x3d090,%ecx
mov    $0x3,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @getImgSizeCategory(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = mul nsw i32 %7, %8
%10 = sext i32 %9 to i64
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = icmp slt i64 %11, 5000
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %5
br label %31
14: ; preds = %2
%15 = load i64, i64* %6
%16 = icmp slt i64 %15, 50000
br i1 %16, label %23, label %17
17: ; preds = %14
%18 = load i32, i32* %3
%19 = icmp slt i32 %18, 150
br i1 %19, label %23, label %20
20: ; preds = %17
%21 = load i32, i32* %4
%22 = icmp slt i32 %21, 150
br i1 %22, label %23, label %24
23: ; preds = %20, %17, %14
store i32 1, i32* %5
br label %30
24: ; preds = %20
%25 = load i64, i64* %6
%26 = icmp slt i64 %25, 250000
br i1 %26, label %27, label %28
27: ; preds = %24
store i32 2, i32* %5
br label %29
28: ; preds = %24
store i32 3, i32* %5
br label %29
29: ; preds = %28, %27
br label %30
30: ; preds = %29, %23
br label %31
31: ; preds = %30, %13
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
define i32 @getImgSizeCategory(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = icmp slt i32 %3, 5000
br i1 %4, label %14, label %5
5: ; preds = %2
%6 = icmp ult i32 %3, 50000
%7 = icmp slt i32 %0, 150
%8 = or i1 %7, %6
%9 = icmp slt i32 %1, 150
%10 = or i1 %9, %8
br i1 %10, label %14, label %11
11: ; preds = %5
%12 = icmp ult i32 %3, 250000
%13 = select i1 %12, i32 2, i32 3
br label %14
14: ; preds = %11, %5, %2
%15 = phi i32 [ 0, %2 ], [ 1, %5 ], [ %13, %11 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int whoFramedRogerRabbitSpolier() {
  printf("Judge Doom");
  return 0;
}


x86 assembly (clang, -O0):
<whoFramedRogerRabbitSpolier>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<whoFramedRogerRabbitSpolier>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Judge Doom\00"
define i32 @whoFramedRogerRabbitSpolier() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"Judge Doom\00"
define i32 @whoFramedRogerRabbitSpolier() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ m68ki_exception_illegal();
void m68k_op_pflush_32(void) {
  if (0) {
    return;
  }
  m68ki_exception_illegal();
}


x86 assembly (clang, -O0):
<m68k_op_pflush_32>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <m68ki_exception_illegal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_pflush_32>:
xor    %eax,%eax
jmp    1030 <m68ki_exception_illegal@plt>

LLVM IR (-O0):
define void @m68k_op_pflush_32() {
%1 = call i32 (...) @m68ki_exception_illegal()
ret void
}

LLVM IR (-O2):
define void @m68k_op_pflush_32() {
%1 = tail call i32 (...) @m68ki_exception_illegal()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t swap_endianness(uint32_t in) {
  return (in << 24) | ((in & 0xff00) << 8) | ((in >> 8) & 0xff00) | (in >> 24);
}


x86 assembly (clang, -O0):
<swap_endianness>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_endianness>:
mov    %edi,%eax
and    $0xffffff,%eax
bswap  %eax
sar    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @swap_endianness(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 24
%5 = load i32, i32* %2
%6 = and i32 %5, 65280
%7 = shl i32 %6, 8
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = ashr i32 %9, 8
%11 = and i32 %10, 65280
%12 = or i32 %8, %11
%13 = load i32, i32* %2
%14 = ashr i32 %13, 24
%15 = or i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @swap_endianness(i32 %0) {
%2 = and i32 %0, 16777215
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
%4 = ashr i32 %0, 24
%5 = or i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ xlfail(char *);
checkfneg(float farg) {
  if (farg < 0.0)
    xlfail("square root of a negative number");
}


x86 assembly (clang, -O0):
<checkfneg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    113f <checkfneg+0x2f>
lea    0xec6(%rip),%rdi
call   1030 <xlfail@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkfneg>:
xorps  %xmm1,%xmm1
ucomiss %xmm0,%xmm1
jbe    1129 <checkfneg+0x19>
push   %rax
lea    0xee0(%rip),%rdi
call   1030 <xlfail@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [33 x i8] c"square root of a negative number\00"
define i32 @checkfneg(float %0) {
%2 = alloca i32
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @xlfail(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [33 x i8] c"square root of a negative number\00"
define i32 @checkfneg(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @xlfail(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
ret i32 undef
}
int test_imm_E7uint8_mem(unsigned char *val) {
  return ((*val) & (0xE7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E7uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xe7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E7uint8_mem>:
testb  $0xe7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E7uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 231
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E7uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -25
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ new_t;

/* Variables and functions */
int /*<<< orphan*/ *realloc(int /*<<< orphan*/ *, size_t);
int buf_grow(uint8_t **t, size_t *capacity, size_t new_capacity) {
  uint8_t *new_t;
  new_t = realloc(*t, new_capacity * sizeof(new_t[0]));
  if (new_t == NULL)
    return -1;
  *t = new_t;
  *capacity = new_capacity;
  return 0;
}


x86 assembly (clang, -O0):
<buf_grow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x20(%rbp),%rsi
shl    $0x2,%rsi
call   1030 <realloc@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    1153 <buf_grow+0x43>
movl   $0xffffffff,-0x4(%rbp)
jmp    1170 <buf_grow+0x60>
mov    -0x28(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_grow>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%rdi
lea    0x0(,%rdx,4),%rsi
call   1030 <realloc@plt>
test   %rax,%rax
je     113d <buf_grow+0x2d>
mov    %rax,(%rbx)
mov    %r15,(%r14)
xor    %eax,%eax
jmp    1142 <buf_grow+0x32>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @buf_grow(i32** %0, i64* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32**
%6 = alloca i64*
%7 = alloca i64
%8 = alloca i32*
store i32** %0, i32*** %5
store i64* %1, i64** %6
store i64 %2, i64* %7
%9 = load i32**, i32*** %5
%10 = load i32*, i32** %9
%11 = load i64, i64* %7
%12 = mul i64 %11, 4
%13 = call i32* @realloc(i32* %10, i64 %12)
store i32* %13, i32** %8
%14 = load i32*, i32** %8
%15 = icmp eq i32* %14, null
br i1 %15, label %16, label %17
16: ; preds = %3
store i32 -1, i32* %4
br label %22
17: ; preds = %3
%18 = load i32*, i32** %8
%19 = load i32**, i32*** %5
store i32* %18, i32** %19
%20 = load i64, i64* %7
%21 = load i64*, i64** %6
store i64 %20, i64* %21
store i32 0, i32* %4
br label %22
22: ; preds = %17, %16
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @buf_grow(i32** nocapture %0, i64* nocapture writeonly %1, i64 %2) {
%4 = load i32*, i32** %0
%5 = shl i64 %2, 2
%6 = tail call i32* @realloc(i32* %4, i64 %5)
%7 = icmp eq i32* %6, null
br i1 %7, label %9, label %8
8: ; preds = %3
store i32* %6, i32** %0
store i64 %2, i64* %1
br label %9
9: ; preds = %3, %8
%10 = phi i32 [ 0, %8 ], [ -1, %3 ]
ret i32 %10
}
int cmp1(const void *pa, const void *pb) {
  const short *a = (const short *)pa;
  const short *b = (const short *)pb;
  if (a[1] < b[1])
    return -1;
  if (a[1] > b[1])
    return +1;
  return 0;
}


x86 assembly (clang, -O0):
<cmp1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movswl 0x2(%rax),%eax
mov    -0x28(%rbp),%rcx
movswl 0x2(%rcx),%ecx
cmp    %ecx,%eax
jge    1140 <cmp1+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    116b <cmp1+0x6b>
mov    -0x20(%rbp),%rax
movswl 0x2(%rax),%eax
mov    -0x28(%rbp),%rcx
movswl 0x2(%rcx),%ecx
cmp    %ecx,%eax
jle    1164 <cmp1+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <cmp1+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp1>:
movzwl 0x2(%rdi),%eax
xor    %ecx,%ecx
cmp    0x2(%rsi),%ax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp1(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i16*
%7 = alloca i16*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i16*
store i16* %9, i16** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i16*
store i16* %11, i16** %7
%12 = load i16*, i16** %6
%13 = getelementptr inbounds i16, i16* %12, i64 1
%14 = load i16, i16* %13
%15 = sext i16 %14 to i32
%16 = load i16*, i16** %7
%17 = getelementptr inbounds i16, i16* %16, i64 1
%18 = load i16, i16* %17
%19 = sext i16 %18 to i32
%20 = icmp slt i32 %15, %19
br i1 %20, label %21, label %22
21: ; preds = %2
store i32 -1, i32* %3
br label %34
22: ; preds = %2
%23 = load i16*, i16** %6
%24 = getelementptr inbounds i16, i16* %23, i64 1
%25 = load i16, i16* %24
%26 = sext i16 %25 to i32
%27 = load i16*, i16** %7
%28 = getelementptr inbounds i16, i16* %27, i64 1
%29 = load i16, i16* %28
%30 = sext i16 %29 to i32
%31 = icmp sgt i32 %26, %30
br i1 %31, label %32, label %33
32: ; preds = %22
store i32 1, i32* %3
br label %34
33: ; preds = %22
store i32 0, i32* %3
br label %34
34: ; preds = %33, %32, %21
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @cmp1(i8* nocapture %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 2
%4 = bitcast i8* %3 to i16*
%5 = load i16, i16* %4
%6 = getelementptr inbounds i8, i8* %1, i64 2
%7 = bitcast i8* %6 to i16*
%8 = load i16, i16* %7
%9 = icmp slt i16 %5, %8
%10 = icmp sgt i16 %5, %8
%11 = zext i1 %10 to i32
%12 = select i1 %9, i32 -1, i32 %11
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void main() {
  int i;
  for (i = 0; i < 100; i++) {
    printf("i equals %d\n", i);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    1146 <main+0x36>
mov    -0x4(%rbp),%esi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <main+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x64,%ebx
jne    1120 <main+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [13 x i8] c"i equals %d\0A\00"
define void @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 100
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"i equals %d\0A\00"
define void @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 100
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  char lt;
  printf("\nDec\tChar");
  for (lt = 33; lt < 126; lt = lt + 1) {
    printf("\n%d\t%c", lt, lt);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movb   $0x21,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x7e,%eax
jge    1163 <main+0x53>
movsbl -0x5(%rbp),%esi
movsbl -0x5(%rbp),%edx
lea    0xebd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movsbl -0x5(%rbp),%eax
add    $0x1,%eax
mov    %al,-0x5(%rbp)
jmp    1131 <main+0x21>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
lea    0xee6(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x21,%ebp
lea    0xedd(%rip),%rbx
nopl   (%rax)
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %ebp,%edx
xor    %eax,%eax
call   1030 <printf@plt>
shl    $0x18,%ebp
add    $0x1000000,%ebp
mov    %ebp,%eax
sar    $0x18,%eax
cmp    $0x7e000000,%ebp
mov    %eax,%ebp
jl     1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [10 x i8] c"\0ADec\09Char\00"
@.str.1 = [7 x i8] c"\0A%d\09%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
store i8 33, i8* %2
br label %4
4: ; preds = %14, %0
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = icmp slt i32 %6, 126
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %10, i32 %12)
br label %14
14: ; preds = %8
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = add nsw i32 %16, 1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
@.str = [10 x i8] c"\0ADec\09Char\00"
@.str.1 = [7 x i8] c"\0A%d\09%c\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
%3 = phi i32 [ 33, %0 ], [ %7, %2 ]
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %3, i32 %3)
%5 = shl nsw i32 %3, 24
%6 = add i32 %5, 16777216
%7 = ashr exact i32 %6, 24
%8 = icmp slt i32 %6, 2113929216
br i1 %8, label %2, label %9
9: ; preds = %2
ret i32 0
}
void rop3_64_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = S & stk3;
  stk1 = T & stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_64_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_64_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_64_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_64_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
double fabs(double);
double hl_math_abs(double a) { return fabs(a); }


x86 assembly (clang, -O0):
<hl_math_abs>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movaps 0xeeb(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<hl_math_abs>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @hl_math_abs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fabs.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @hl_math_abs(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(int argc, const char *argv[]) {
  puts("abcdefghijklm\n"
       "nopqrstuvwxyz\n"
       "zyxwvutsrqpon\n"
       "mlkjihgfedcba");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [56 x i8] c"abcdefghijklm\0Anopqrstuvwxyz\0Azyxwvutsrqpon\0Amlkjihgfedcba\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @puts(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [56 x i8] c"abcdefghijklm\0Anopqrstuvwxyz\0Azyxwvutsrqpon\0Amlkjihgfedcba\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double cos(double);
double min_caml_cos(void *fv, double f) { return cos(f); }


x86 assembly (clang, -O0):
<min_caml_cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <cos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_caml_cos>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define double @min_caml_cos(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = call double @cos(double %5)
ret double %6
}

LLVM IR (-O2):
define double @min_caml_cos(i8* nocapture readnone %0, double %1) {
%3 = tail call double @cos(double %1)
ret double %3
}
signed long int feed_device_null_read(void *const p_context,
                                      unsigned char *const p_buf,
                                      unsigned long int const i_buf_len) {
  (void)(p_context);
  (void)(p_buf);
  (void)(i_buf_len);
  return -1;
}


x86 assembly (clang, -O0):
<feed_device_null_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<feed_device_null_read>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @feed_device_null_read(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
ret i64 -1
}

LLVM IR (-O2):
define i64 @feed_device_null_read(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2) {
ret i64 -1
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
int cs5530_get_vsa2_softvga_enable(void) {
  unsigned long reg_val;
  reg_val = gfx_pci_config_read(0x80009444);
  if ((reg_val & 0x1) == 0)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<cs5530_get_vsa2_softvga_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x80009444,%edi
call   1030 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    1144 <cs5530_get_vsa2_softvga_enable+0x34>
movl   $0x1,-0x4(%rbp)
jmp    114b <cs5530_get_vsa2_softvga_enable+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs5530_get_vsa2_softvga_enable>:
push   %rax
mov    $0x80009444,%edi
call   1030 <gfx_pci_config_read@plt>
not    %eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cs5530_get_vsa2_softvga_enable() {
%1 = alloca i32
%2 = alloca i64
%3 = call i64 @gfx_pci_config_read(i32 -2147445692)
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 1
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %1
br label %9
8: ; preds = %0
store i32 0, i32* %1
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @cs5530_get_vsa2_softvga_enable() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147445692)
%2 = trunc i64 %1 to i32
%3 = and i32 %2, 1
%4 = xor i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int hammingDistance(int, int);
int main(int argc, char **argv) {
  assert(hammingDistance(1, 4) == 2);
  assert(hammingDistance(93, 73) == 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
mov    $0x4,%esi
call   1030 <hammingDistance@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0x5d,%edi
mov    $0x49,%esi
call   1030 <hammingDistance@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x4,%esi
call   1030 <hammingDistance@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
call   1040 <assert@plt>
mov    $0x5d,%edi
mov    $0x49,%esi
call   1030 <hammingDistance@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @hammingDistance(i32 1, i32 4)
%7 = icmp eq i32 %6, 2
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = call i32 @hammingDistance(i32 93, i32 73)
%11 = icmp eq i32 %10, 2
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @hammingDistance(i32 1, i32 4)
%4 = icmp eq i32 %3, 2
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i32 @hammingDistance(i32 93, i32 73)
%8 = icmp eq i32 %7, 2
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
ret i32 0
}
int fun1268() { return 1268; }


x86 assembly (clang, -O0):
<fun1268>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4f4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1268>:
mov    $0x4f4,%eax
ret

LLVM IR (-O0):
define i32 @fun1268() {
ret i32 1268
}

LLVM IR (-O2):
define i32 @fun1268() {
ret i32 1268
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x34() {
  Assert_real((isprint(52)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              265, ("isprint should be 1 for 4"));
}


x86 assembly (clang, -O0):
<t_isprint_0x34>:
push   %rbp
mov    %rsp,%rbp
mov    $0x34,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x109,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x34>:
push   %rax
mov    $0x34,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x109,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for 4\00"
define void @t_isprint_0x34() {
%1 = call i32 @isprint(i32 52)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 265, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for 4\00"
define void @t_isprint_0x34() {
%1 = tail call i32 @isprint(i32 52)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 265, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}