xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void crc16(uint8_t data, uint16_t *crc) {
  uint16_t c = ((*crc >> 8) ^ data) & 0xff;
  c ^= c >> 4;
  *crc = (*crc << 8) ^ (c << 12) ^ (c << 5) ^ c;
}


x86 assembly (clang, -O0):
<crc16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
sar    $0x8,%eax
xor    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x4,%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
shl    $0x8,%ecx
mov    -0x14(%rbp),%eax
shl    $0xc,%eax
xor    %eax,%ecx
mov    -0x14(%rbp),%eax
shl    $0x5,%eax
xor    %eax,%ecx
xor    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc16>:
mov    (%rsi),%eax
mov    %eax,%ecx
shr    $0x8,%ecx
xor    %edi,%ecx
movzbl %cl,%ecx
mov    %ecx,%edx
shr    $0x4,%edx
xor    %ecx,%edx
shl    $0x8,%eax
mov    %edx,%ecx
or     %edx,%eax
shl    $0xc,%edx
shl    $0x5,%ecx
xor    %edx,%eax
xor    %ecx,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @crc16(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = ashr i32 %7, 8
%9 = load i32, i32* %3
%10 = xor i32 %8, %9
%11 = and i32 %10, 255
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = ashr i32 %12, 4
%14 = load i32, i32* %5
%15 = xor i32 %14, %13
store i32 %15, i32* %5
%16 = load i32*, i32** %4
%17 = load i32, i32* %16
%18 = shl i32 %17, 8
%19 = load i32, i32* %5
%20 = shl i32 %19, 12
%21 = xor i32 %18, %20
%22 = load i32, i32* %5
%23 = shl i32 %22, 5
%24 = xor i32 %21, %23
%25 = load i32, i32* %5
%26 = xor i32 %24, %25
%27 = load i32*, i32** %4
store i32 %26, i32* %27
ret void
}

LLVM IR (-O2):
define void @crc16(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = lshr i32 %3, 8
%5 = xor i32 %4, %0
%6 = and i32 %5, 255
%7 = lshr i32 %6, 4
%8 = xor i32 %7, %6
%9 = shl i32 %3, 8
%10 = shl nuw nsw i32 %8, 12
%11 = shl nuw nsw i32 %8, 5
%12 = or i32 %8, %9
%13 = xor i32 %12, %10
%14 = xor i32 %13, %11
store i32 %14, i32* %1
ret void
}
int test(int x) {
  switch (x) {
  case 5:
    return 100;
  case 102:
    return 105;
  case 321:
    return 10044;
  case 121:
    return 100223;
  case 3:
    return 89127883;
  case -3:
    return 12398;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0xfffffffd,%eax
je     11ae <test+0xae>
jmp    111b <test+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x3,%eax
je     11a2 <test+0xa2>
jmp    112c <test+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x5,%eax
je     1172 <test+0x72>
jmp    113d <test+0x3d>
mov    -0xc(%rbp),%eax
sub    $0x66,%eax
je     117e <test+0x7e>
jmp    114e <test+0x4e>
mov    -0xc(%rbp),%eax
sub    $0x79,%eax
je     1196 <test+0x96>
jmp    115f <test+0x5f>
mov    -0xc(%rbp),%eax
sub    $0x141,%eax
je     118a <test+0x8a>
jmp    11ba <test+0xba>
movl   $0x64,-0x4(%rbp)
jmp    11c1 <test+0xc1>
movl   $0x69,-0x4(%rbp)
jmp    11c1 <test+0xc1>
movl   $0x273c,-0x4(%rbp)
jmp    11c1 <test+0xc1>
movl   $0x1877f,-0x4(%rbp)
jmp    11c1 <test+0xc1>
movl   $0x54ffbcb,-0x4(%rbp)
jmp    11c1 <test+0xc1>
movl   $0x306e,-0x4(%rbp)
jmp    11c1 <test+0xc1>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
cmp    $0x65,%edi
jg     111a <test+0x1a>
cmp    $0xfffffffd,%edi
je     1132 <test+0x32>
cmp    $0x3,%edi
je     1138 <test+0x38>
mov    $0x64,%eax
cmp    $0x5,%edi
jne    114a <test+0x4a>
ret
cmp    $0x141,%edi
je     113e <test+0x3e>
cmp    $0x79,%edi
je     1144 <test+0x44>
cmp    $0x66,%edi
jne    114a <test+0x4a>
mov    $0x69,%eax
ret
mov    $0x306e,%eax
ret
mov    $0x54ffbcb,%eax
ret
mov    $0x273c,%eax
ret
mov    $0x1877f,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %11 [
i32 5, label %5
i32 102, label %6
i32 321, label %7
i32 121, label %8
i32 3, label %9
i32 -3, label %10
]
5: ; preds = %1
store i32 100, i32* %2
br label %12
6: ; preds = %1
store i32 105, i32* %2
br label %12
7: ; preds = %1
store i32 10044, i32* %2
br label %12
8: ; preds = %1
store i32 100223, i32* %2
br label %12
9: ; preds = %1
store i32 89127883, i32* %2
br label %12
10: ; preds = %1
store i32 12398, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %10, %9, %8, %7, %6, %5
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @test(i32 %0) {
switch i32 %0, label %7 [
i32 5, label %8
i32 102, label %2
i32 321, label %3
i32 121, label %4
i32 3, label %5
i32 -3, label %6
]
2: ; preds = %1
br label %8
3: ; preds = %1
br label %8
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6, %5, %4, %3, %2
%9 = phi i32 [ -1, %7 ], [ 12398, %6 ], [ 89127883, %5 ], [ 100223, %4 ], [ 10044, %3 ], [ 105, %2 ], [ 100, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ trap_R_RegisterShaderNoMip(char *);
void UI_SoundOptionsMenu_Cache(void) {
  trap_R_RegisterShaderNoMip("menu/art/frame2_l");
  trap_R_RegisterShaderNoMip("menu/art/frame1_r");
  trap_R_RegisterShaderNoMip("menu/art/back_0");
  trap_R_RegisterShaderNoMip("menu/art/back_1");
}


x86 assembly (clang, -O0):
<UI_SoundOptionsMenu_Cache>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xeeb(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef1(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef5(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_SoundOptionsMenu_Cache>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xeee(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef4(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef8(%rip),%rdi
pop    %rax
jmp    1030 <trap_R_RegisterShaderNoMip@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"menu/art/frame2_l\00"
@.str.1 = [18 x i8] c"menu/art/frame1_r\00"
@.str.2 = [16 x i8] c"menu/art/back_0\00"
@.str.3 = [16 x i8] c"menu/art/back_1\00"
define void @UI_SoundOptionsMenu_Cache() {
%1 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"menu/art/frame2_l\00"
@.str.1 = [18 x i8] c"menu/art/frame1_r\00"
@.str.2 = [16 x i8] c"menu/art/back_0\00"
@.str.3 = [16 x i8] c"menu/art/back_1\00"
define void @UI_SoundOptionsMenu_Cache() {
%1 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef char const uint8_t;

/* Variables and functions */
uint8_t bbp_hex2byte(const char ch) {
  if ((ch >= '0') && (ch <= '9')) {
    return ch - '0';
  }
  if ((ch >= 'a') && (ch <= 'f')) {
    return ch - 'a' + 10;
  }
  return 0;
}


x86 assembly (clang, -O0):
<bbp_hex2byte>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <bbp_hex2byte+0x33>
movsbl -0x2(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <bbp_hex2byte+0x33>
movsbl -0x2(%rbp),%eax
sub    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1163 <bbp_hex2byte+0x63>
movsbl -0x2(%rbp),%eax
cmp    $0x61,%eax
jl     115f <bbp_hex2byte+0x5f>
movsbl -0x2(%rbp),%eax
cmp    $0x66,%eax
jg     115f <bbp_hex2byte+0x5f>
movsbl -0x2(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %al,-0x1(%rbp)
jmp    1163 <bbp_hex2byte+0x63>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbp_hex2byte>:
lea    -0x30(%rdi),%eax
lea    -0x61(%rdi),%ecx
add    $0xa9,%dil
xor    %edx,%edx
cmp    $0x6,%cl
movzbl %dil,%ecx
cmovae %edx,%ecx
cmp    $0xa,%al
movzbl %al,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @bbp_hex2byte(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %31
16: ; preds = %7, %1
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 97
br i1 %19, label %20, label %30
20: ; preds = %16
%21 = load i8, i8* %3
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %22, 102
br i1 %23, label %24, label %30
24: ; preds = %20
%25 = load i8, i8* %3
%26 = sext i8 %25 to i32
%27 = sub nsw i32 %26, 97
%28 = add nsw i32 %27, 10
%29 = trunc i32 %28 to i8
store i8 %29, i8* %2
br label %31
30: ; preds = %20, %16
store i8 0, i8* %2
br label %31
31: ; preds = %30, %24, %11
%32 = load i8, i8* %2
ret i8 %32
}

LLVM IR (-O2):
define signext i8 @bbp_hex2byte(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = add i8 %0, -97
%5 = icmp ult i8 %4, 6
%6 = add i8 %0, -87
%7 = select i1 %5, i8 %6, i8 0
%8 = select i1 %3, i8 %2, i8 %7
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ error(char *, char *);
int /*<<< orphan*/ exit(int);
void fatal_error(char *func_name, char *message) {
  error(func_name, message);
  exit(-1);
}


x86 assembly (clang, -O0):
<fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <error@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal_error>:
push   %rax
call   1030 <error@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @fatal_error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @error(i8* %5, i8* %6)
%8 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define void @fatal_error(i8* %0, i8* %1) {
%3 = tail call i32 @error(i8* %0, i8* %1)
%4 = tail call i32 @exit(i32 -1)
unreachable
}
int imin2(int a, int b) { return (b < a) ? b : a; }


x86 assembly (clang, -O0):
<imin2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1121 <imin2+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <imin2+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imin2>:
mov    %edi,%eax
cmp    %edi,%esi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @imin2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @imin2(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, %0
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int /*<<< orphan*/ usleep(int);
int main() {
  srand(0);
  while (1) {
    printf("%d\n", rand());
    fflush(stdout);
    usleep(100000);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <srand@plt>
mov    $0x0,%al
call   1060 <rand@plt>
mov    %eax,%esi
lea    0xe8a(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e5e(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    $0x186a0,%edi
call   1070 <usleep@plt>
jmp    1166 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %edi,%edi
call   1040 <srand@plt>
lea    0xe9e(%rip),%r14
mov    0x2e77(%rip),%rbx
nopl   0x0(%rax)
xor    %eax,%eax
call   1060 <rand@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    (%rbx),%edi
call   1050 <fflush@plt>
mov    $0x186a0,%edi
call   1070 <usleep@plt>
jmp    1170 <main+0x20>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @srand(i32 0)
br label %3
3: ; preds = %0, %3
%4 = call i32 (...) @rand()
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* @stdout
%7 = call i32 @fflush(i32 %6)
%8 = call i32 @usleep(i32 100000)
br label %3
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = tail call i32 @srand(i32 0)
br label %2
2: ; preds = %0, %2
%3 = tail call i32 (...) @rand()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @stdout
%6 = tail call i32 @fflush(i32 %5)
%7 = tail call i32 @usleep(i32 100000)
br label %2
}
/* Type definitions */
struct webidl_node {
  int dummy;
};
struct binding {
  int dummy;
};

/* Variables and functions */
int output_const_defines(struct binding *, int /*<<< orphan*/);
int /*<<< orphan*/ webidl_node_gettext(struct webidl_node *);
int webidl_const_spec_implements_cb(struct webidl_node *node, void *ctx) {
  struct binding *binding = ctx;
  return output_const_defines(binding, webidl_node_gettext(node));
}


x86 assembly (clang, -O0):
<webidl_const_spec_implements_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <webidl_node_gettext@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1040 <output_const_defines@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<webidl_const_spec_implements_cb>:
push   %rbx
mov    %rsi,%rbx
call   1030 <webidl_node_gettext@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <output_const_defines@plt>

LLVM IR (-O0):
%struct.webidl_node = type { i32 }
%struct.binding = type { i32 }
define i32 @webidl_const_spec_implements_cb(%struct.webidl_node* %0, i8* %1) {
%3 = alloca %struct.webidl_node*
%4 = alloca i8*
%5 = alloca %struct.binding*
store %struct.webidl_node* %0, %struct.webidl_node** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to %struct.binding*
store %struct.binding* %7, %struct.binding** %5
%8 = load %struct.binding*, %struct.binding** %5
%9 = load %struct.webidl_node*, %struct.webidl_node** %3
%10 = call i32 @webidl_node_gettext(%struct.webidl_node* %9)
%11 = call i32 @output_const_defines(%struct.binding* %8, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.webidl_node = type { i32 }
%struct.binding = type { i32 }
define i32 @webidl_const_spec_implements_cb(%struct.webidl_node* %0, i8* %1) {
%3 = bitcast i8* %1 to %struct.binding*
%4 = tail call i32 @webidl_node_gettext(%struct.webidl_node* %0)
%5 = tail call i32 @output_const_defines(%struct.binding* %3, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char *);
char *strcat(char *restrict dest, const char *restrict src) {
  strcpy(dest + strlen(dest), src);
  return dest;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rdi
cltq
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
movslq %eax,%rdi
add    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcat(i8* noalias %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8*, i8** %4
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @strcat(i8* noalias returned %0, i8* noalias %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = tail call i32 @strcpy(i8* %5, i8* %1)
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void parlcd_write_cmd(unsigned char *parlcd_mem_base, uint16_t cmd) {
  *(volatile uint16_t *)(parlcd_mem_base + 0x0008) = cmd;
}


x86 assembly (clang, -O0):
<parlcd_write_cmd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<parlcd_write_cmd>:
mov    %esi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @parlcd_write_cmd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 8
%8 = bitcast i8* %7 to i32*
store volatile i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @parlcd_write_cmd(i8* %0, i32 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 8
%4 = bitcast i8* %3 to i32*
store volatile i32 %1, i32* %4
ret void
}
void ff_hevc_put_hevc_bi_qpel_v24_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v24_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v24_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v24_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v24_10_avx2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("HelloWorld\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"HelloWorld\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [11 x i8] c"HelloWorld\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
float sigmoid(float);
float sigmoid_prime(float x) {
  float s = sigmoid(x);
  return (1.f - s) * s;
}


x86 assembly (clang, -O0):
<sigmoid_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sigmoid@plt>
movss  %xmm0,-0x8(%rbp)
movss  0xecc(%rip),%xmm0
subss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigmoid_prime>:
push   %rax
call   1030 <sigmoid@plt>
movss  0xee2(%rip),%xmm1
subss  %xmm0,%xmm1
mulss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @sigmoid_prime(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @sigmoid(float %4)
store float %5, float* %3
%6 = load float, float* %3
%7 = fsub float 1.000000e+00, %6
%8 = load float, float* %3
%9 = fmul float %7, %8
ret float %9
}

LLVM IR (-O2):
define float @sigmoid_prime(float %0) {
%2 = tail call float @sigmoid(float %0)
%3 = fsub float 1.000000e+00, %2
%4 = fmul float %2, %3
ret float %4
}
/* Variables and functions */
double pow(double, double);
double stellar_dust_limit(double stellar_mass_ratio) {
  return (200.0 * pow(stellar_mass_ratio, (1.0 / 3.0)));
}


x86 assembly (clang, -O0):
<stellar_dust_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xede(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  0xec6(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stellar_dust_limit>:
push   %rax
movsd  0xee7(%rip),%xmm1
call   1030 <pow@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @stellar_dust_limit(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @pow(double %3, double 0x3FD5555555555555)
%5 = fmul double 2.000000e+02, %4
ret double %5
}

LLVM IR (-O2):
define double @stellar_dust_limit(double %0) {
%2 = tail call double @pow(double %0, double 0x3FD5555555555555)
%3 = fmul double %2, 2.000000e+02
ret double %3
}
void dyna_stop() {}


x86 assembly (clang, -O0):
<dyna_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dyna_stop>:
ret

LLVM IR (-O0):
define void @dyna_stop() {
ret void
}

LLVM IR (-O2):
define void @dyna_stop() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assume(int);
int log2(int n) {
  int i;
  int r = 0;
  __VERIFIER_assume(n > 0);
  for (i = 1; i < n; i *= 2) {
    r++;
  }
  return r;
}


x86 assembly (clang, -O0):
<log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assume@plt>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115d <log2+0x4d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113a <log2+0x2a>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   %ebx,%ebx
setg   %dil
call   1030 <__VERIFIER_assume@plt>
xor    %eax,%eax
cmp    $0x2,%ebx
jl     1139 <log2+0x29>
mov    $0x1,%ecx
xor    %eax,%eax
xchg   %ax,%ax
add    $0x1,%eax
add    %ecx,%ecx
cmp    %ebx,%ecx
jl     1130 <log2+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @log2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @__VERIFIER_assume(i32 %7)
store i32 1, i32* %3
br label %9
9: ; preds = %16, %1
%10 = load i32, i32* %3
%11 = load i32, i32* %2
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %16
16: ; preds = %13
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 2
store i32 %18, i32* %3
br label %9
19: ; preds = %9
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @log2(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @__VERIFIER_assume(i32 %3)
%5 = icmp sgt i32 %0, 1
br i1 %5, label %6, label %12
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ 0, %1 ]
%8 = phi i32 [ %10, %6 ], [ 1, %1 ]
%9 = add nuw nsw i32 %7, 1
%10 = shl nsw i32 %8, 1
%11 = icmp slt i32 %10, %0
br i1 %11, label %6, label %12
12: ; preds = %6, %1
%13 = phi i32 [ 0, %1 ], [ %9, %6 ]
ret i32 %13
}
/* Type definitions */
typedef scalar_t__ uint_least64_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_uint_least64_t(uint_least64_t const k1,
                                             uint_least64_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_uint_least64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_uint_least64_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_least64_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_least64_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int off_t;

/* Variables and functions */
off_t divide(off_t x, off_t d) { return (x + (d - 1) / 2) / d; }


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
lea    -0x1(%rsi),%eax
shr    $0x1f,%eax
add    %esi,%eax
add    $0xffffffff,%eax
sar    %eax
add    %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @divide(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = sdiv i32 %7, 2
%9 = add nsw i32 %5, %8
%10 = load i32, i32* %4
%11 = sdiv i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @divide(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = sdiv i32 %3, 2
%5 = add nsw i32 %4, %0
%6 = sdiv i32 %5, %1
ret i32 %6
}
/* Variables and functions */
char *malloc(size_t);
char *memcpy(char *, char const *, size_t);
size_t strlen(char const *);
char *strdup(const char *s) {
  size_t l = strlen(s);
  char *d = malloc(l + 1);
  if (!d)
    return NULL;
  return memcpy(d, s, l + 1);
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1172 <strdup+0x42>
movq   $0x0,-0x8(%rbp)
jmp    118b <strdup+0x5b>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
add    $0x1,%rdx
call   1040 <memcpy@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    %rax,%rbx
add    $0x1,%rbx
mov    %rbx,%rdi
call   1050 <malloc@plt>
mov    %rax,%r15
test   %rax,%rax
je     1162 <strdup+0x32>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1040 <memcpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = add i64 %8, 1
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = icmp ne i8* %11, null
br i1 %12, label %14, label %13
13: ; preds = %1
store i8* null, i8** %2
br label %20
14: ; preds = %1
%15 = load i8*, i8** %5
%16 = load i8*, i8** %3
%17 = load i64, i64* %4
%18 = add i64 %17, 1
%19 = call i8* @memcpy(i8* %15, i8* %16, i64 %18)
store i8* %19, i8** %2
br label %20
20: ; preds = %14, %13
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define noalias i8* @strdup(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %4, i8* align 1 %0, i64 %3, i1 false)
br label %7
7: ; preds = %1, %6
ret i8* %4
}
int ft_isascii(int c) {
  if (c >= 0 && c <= 0177)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1127 <ft_isascii+0x27>
cmpl   $0x7f,-0x8(%rbp)
jg     1127 <ft_isascii+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <ft_isascii+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isascii>:
xor    %eax,%eax
cmp    $0x80,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isascii(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 127
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ft_isascii(i32 %0) {
%2 = icmp ult i32 %0, 128
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int ptrs_equal(void *a, void *b) { return ((size_t)a) == ((size_t)b); }


x86 assembly (clang, -O0):
<ptrs_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrs_equal>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @ptrs_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = icmp eq i64 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ptrs_equal(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
int /*<<< orphan*/ ft_putstr(char *);
int main(int argc, char **argv) {
  if (argc) {
    ft_putstr(argv[0]);
    ft_putchar('\n');
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1156 <main+0x36>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1040 <ft_putstr@plt>
mov    $0xa,%edi
call   1030 <ft_putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
test   %edi,%edi
je     113b <main+0x1b>
push   %rax
mov    (%rsi),%rdi
call   1040 <ft_putstr@plt>
mov    $0xa,%edi
call   1030 <ft_putchar@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @ft_putstr(i8* %11)
%13 = call i32 @ft_putchar(i8 signext 10)
br label %14
14: ; preds = %8, %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @ft_putstr(i8* %5)
%7 = tail call i32 @ft_putchar(i8 signext 10)
br label %8
8: ; preds = %4, %2
ret i32 0
}
const char *loadavgwatch_impl_get_system(void) { return "linux"; }


x86 assembly (clang, -O0):
<loadavgwatch_impl_get_system>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadavgwatch_impl_get_system>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"linux\00"
define i8* @loadavgwatch_impl_get_system() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"linux\00"
define i8* @loadavgwatch_impl_get_system() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
void rop3_118_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~S;
  stk3 = T & stk4;
  stk2 = *D | stk3;
  stk1 = S ^ stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_118_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_118_1_0>:
mov    %esi,%eax
not    %al
and    %al,%dl
mov    (%rdi),%cl
or     %cl,%dl
and    %sil,%cl
and    %al,%dl
or     %cl,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_118_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %10
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %10
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = or i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = load i8, i8* %8
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = xor i32 %37, -1
%39 = and i32 %35, %38
%40 = load i8*, i8** %4
%41 = load i8, i8* %40
%42 = zext i8 %41 to i32
%43 = load i8, i8* %5
%44 = zext i8 %43 to i32
%45 = and i32 %42, %44
%46 = or i32 %39, %45
%47 = trunc i32 %46 to i8
%48 = load i8*, i8** %4
store i8 %47, i8* %48
ret void
}

LLVM IR (-O2):
define void @rop3_118_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %1, -1
%5 = and i8 %4, %2
%6 = load i8, i8* %0
%7 = or i8 %6, %5
%8 = and i8 %6, %1
%9 = and i8 %7, %4
%10 = or i8 %9, %8
store i8 %10, i8* %0
ret void
}
int f(int x) {
  if (x > 0)
    return 2 + f(x - 1);
  return 112;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    113b <f+0x2b>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <f@plt>
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
jmp    1142 <f+0x32>
movl   $0x70,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
test   %edi,%edi
lea    0x70(%rdi,%rdi,1),%ecx
mov    $0x70,%eax
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = call i32 @f(i32 %8)
%10 = add nsw i32 2, %9
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 112, i32* %2
br label %12
12: ; preds = %11, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = shl nuw i32 %0, 1
%4 = add i32 %3, 112
%5 = select i1 %2, i32 %4, i32 112
ret i32 %5
}
float celsius_to_rankine(float temperature) {
  return (temperature + 273.15) * 9 / 5;
}


x86 assembly (clang, -O0):
<celsius_to_rankine>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xef6(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xee2(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<celsius_to_rankine>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
divsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @celsius_to_rankine(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fadd double %4, 2.731500e+02
%6 = fmul double %5, 9.000000e+00
%7 = fdiv double %6, 5.000000e+00
%8 = fptrunc double %7 to float
ret float %8
}

LLVM IR (-O2):
define float @celsius_to_rankine(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, 2.731500e+02
%4 = fmul double %3, 9.000000e+00
%5 = fdiv double %4, 5.000000e+00
%6 = fptrunc double %5 to float
ret float %6
}
void foo073() {}


x86 assembly (clang, -O0):
<foo073>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo073>:
ret

LLVM IR (-O0):
define void @foo073() {
ret void
}

LLVM IR (-O2):
define void @foo073() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t MIPS32_JR(unsigned src) { return (0x00000008 | (src << 21)); }


x86 assembly (clang, -O0):
<MIPS32_JR>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x15,%eax
or     $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MIPS32_JR>:
shl    $0x15,%edi
lea    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @MIPS32_JR(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 21
%5 = or i32 8, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @MIPS32_JR(i32 %0) {
%2 = shl i32 %0, 21
%3 = or i32 %2, 8
ret i32 %3
}
double ucs_arch_generic_get_clocks_per_sec() { return 1.0E6; }


x86 assembly (clang, -O0):
<ucs_arch_generic_get_clocks_per_sec>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ucs_arch_generic_get_clocks_per_sec>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @ucs_arch_generic_get_clocks_per_sec() {
ret double 1.000000e+06
}

LLVM IR (-O2):
define double @ucs_arch_generic_get_clocks_per_sec() {
ret double 1.000000e+06
}
void save_audio_state(void) {}


x86 assembly (clang, -O0):
<save_audio_state>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_audio_state>:
ret

LLVM IR (-O0):
define void @save_audio_state() {
ret void
}

LLVM IR (-O2):
define void @save_audio_state() {
ret void
}
/* Variables and functions */
scalar_t__ isspace(char const);
void skip_space(const char **ptr) {
  const char *s = *ptr;
  while (isspace(*s)) {
    s++;
  }
  *ptr = s;
}


x86 assembly (clang, -O0):
<skip_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     114e <skip_space+0x3e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1127 <skip_space+0x17>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_space>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rbx
add    $0xffffffffffffffff,%rbx
xchg   %ax,%ax
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <skip_space+0x10>
mov    %rbx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @skip_space(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
store i8* %5, i8** %3
br label %6
6: ; preds = %11, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = call i64 @isspace(i8 signext %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
br label %6
14: ; preds = %6
%15 = load i8*, i8** %3
%16 = load i8**, i8*** %2
store i8* %15, i8** %16
ret void
}

LLVM IR (-O2):
define void @skip_space(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %3, %1
%4 = phi i8* [ %2, %1 ], [ %8, %3 ]
%5 = load i8, i8* %4
%6 = tail call i64 @isspace(i8 signext %5)
%7 = icmp eq i64 %6, 0
%8 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %7, label %9, label %3
9: ; preds = %3
store i8* %4, i8** %0
ret void
}
void RTTestPrintfV(void) {}


x86 assembly (clang, -O0):
<RTTestPrintfV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTestPrintfV>:
ret

LLVM IR (-O0):
define void @RTTestPrintfV() {
ret void
}

LLVM IR (-O2):
define void @RTTestPrintfV() {
ret void
}
int neg_deinterleave(int x, int ref) {
  if (x < 2 * ref - 1) {
    if (x & 1)
      return ref - 1 - (x >> 1);
    else
      return ref + (x >> 1);
  } else
    return x + 1;
}


x86 assembly (clang, -O0):
<neg_deinterleave>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    1156 <neg_deinterleave+0x56>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1143 <neg_deinterleave+0x43>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    -0x8(%rbp),%ecx
sar    $0x1,%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    115f <neg_deinterleave+0x5f>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x1,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    115f <neg_deinterleave+0x5f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<neg_deinterleave>:
mov    %edi,%eax
lea    (%rsi,%rsi,1),%ecx
add    $0xffffffff,%ecx
cmp    %edi,%ecx
jle    111a <neg_deinterleave+0x1a>
mov    %eax,%ecx
sar    %eax
test   $0x1,%cl
je     1117 <neg_deinterleave+0x17>
not    %eax
add    %esi,%eax
ret
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @neg_deinterleave(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = mul nsw i32 2, %7
%9 = sub nsw i32 %8, 1
%10 = icmp slt i32 %6, %9
br i1 %10, label %11, label %26
11: ; preds = %2
%12 = load i32, i32* %4
%13 = and i32 %12, 1
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %21
15: ; preds = %11
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 1
%18 = load i32, i32* %4
%19 = ashr i32 %18, 1
%20 = sub nsw i32 %17, %19
store i32 %20, i32* %3
br label %29
21: ; preds = %11
%22 = load i32, i32* %5
%23 = load i32, i32* %4
%24 = ashr i32 %23, 1
%25 = add nsw i32 %22, %24
store i32 %25, i32* %3
br label %29
26: ; preds = %2
%27 = load i32, i32* %4
%28 = add nsw i32 %27, 1
store i32 %28, i32* %3
br label %29
29: ; preds = %26, %21, %15
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @neg_deinterleave(i32 %0, i32 %1) {
%3 = shl nsw i32 %1, 1
%4 = add nsw i32 %3, -1
%5 = icmp sgt i32 %4, %0
br i1 %5, label %6, label %15
6: ; preds = %2
%7 = and i32 %0, 1
%8 = icmp eq i32 %7, 0
%9 = ashr i32 %0, 1
br i1 %8, label %13, label %10
10: ; preds = %6
%11 = xor i32 %9, -1
%12 = add i32 %11, %1
br label %17
13: ; preds = %6
%14 = add nsw i32 %9, %1
br label %17
15: ; preds = %2
%16 = add nsw i32 %0, 1
br label %17
17: ; preds = %15, %13, %10
%18 = phi i32 [ %12, %10 ], [ %14, %13 ], [ %16, %15 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ numtoa(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
size_t strlen(char *);
int stamp(char *s, char *template) {
  char *p;
  strcpy(s, "/tmp/");
  strcat(s, template);
  numtoa(&s[strlen(s)], getpid());
}


x86 assembly (clang, -O0):
<stamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xe95(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1070 <strcat@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <strlen@plt>
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    $0x0,%al
call   1040 <getpid@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
call   1060 <numtoa@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stamp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xe9f(%rip),%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1070 <strcat@plt>
mov    %rbx,%rdi
call   1050 <strlen@plt>
add    %rax,%rbx
xor    %eax,%eax
call   1040 <getpid@plt>
mov    %rbx,%rdi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1060 <numtoa@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"/tmp/\00"
define i32 @stamp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = call i32 @strcpy(i8* %7, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = call i32 @strcat(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = load i8*, i8** %4
%14 = call i64 @strlen(i8* %13)
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = call i32 (...) @getpid()
%17 = call i32 @numtoa(i8* %15, i32 %16)
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@.str = [6 x i8] c"/tmp/\00"
define i32 @stamp(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @strcat(i8* %0, i8* %1)
%5 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = tail call i32 (...) @getpid()
%8 = tail call i32 @numtoa(i8* %6, i32 %7)
ret i32 undef
}
void catcher(int arg) { return; }


x86 assembly (clang, -O0):
<catcher>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<catcher>:
ret

LLVM IR (-O0):
define void @catcher(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @catcher(i32 %0) {
ret void
}
void unregister_shrinker(struct shrinker *shrinker) {}


x86 assembly (clang, -O0):
<unregister_shrinker>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_shrinker>:
ret

LLVM IR (-O0):
%struct.shrinker = type opaque
define void @unregister_shrinker(%struct.shrinker* %0) {
%2 = alloca %struct.shrinker*
store %struct.shrinker* %0, %struct.shrinker** %2
ret void
}

LLVM IR (-O2):
%struct.shrinker = type opaque
define void @unregister_shrinker(%struct.shrinker* nocapture %0) {
ret void
}