xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int foo() {
  int i = 0;
#pragma pomp inst begin(foo)
  printf("Hello from foo.\n");
  if (i == 0) {
#pragma pomp inst altend(foo)
    return 42;
  }
  return i;
#pragma pomp inst end(foo)
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x0,-0x8(%rbp)
jne    1141 <foo+0x31>
movl   $0x2a,-0x4(%rbp)
jmp    1147 <foo+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x2a,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Hello from foo.\0A\00"
define i32 @foo() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 42, i32* %1
br label %9
7: ; preds = %0
%8 = load i32, i32* %2
store i32 %8, i32* %1
br label %9
9: ; preds = %7, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@str = [16 x i8] c"Hello from foo.\00"
define i32 @foo() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
ret i32 42
}
void fd197(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  a : {
    typedef int(*h)[n];
  p025A:
    goto p025A;
    goto a;
  P025A:
    goto P025A;
    0;
  };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd197>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd197+0x7>

x86 assembly (clang, -O2):
<fd197>:
jmp    1100 <fd197>

LLVM IR (-O0):
define void @fd197(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; No predecessors!
%32 = load i32, i32* %2
%33 = zext i32 %32 to i64
br label %34
34: ; preds = %34, %31
br label %34
35: ; preds = %35
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd197(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
void ceph_fscache_register_inode_cookie(struct inode *inode) {}


x86 assembly (clang, -O0):
<ceph_fscache_register_inode_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_fscache_register_inode_cookie>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @ceph_fscache_register_inode_cookie(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @ceph_fscache_register_inode_cookie(%struct.inode* nocapture %0) {
ret void
}
/* Type definitions */
struct ptr_array {
  int dummy;
};

/* Variables and functions */
void *ptr_array_rel(struct ptr_array *, void *, int);
void *ptr_array_prev(struct ptr_array *array, void *ptr) {
  return ptr_array_rel(array, ptr, -1);
}


x86 assembly (clang, -O0):
<ptr_array_prev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xffffffff,%edx
call   1030 <ptr_array_rel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_array_prev>:
mov    $0xffffffff,%edx
jmp    1030 <ptr_array_rel@plt>

LLVM IR (-O0):
%struct.ptr_array = type { i32 }
define i8* @ptr_array_prev(%struct.ptr_array* %0, i8* %1) {
%3 = alloca %struct.ptr_array*
%4 = alloca i8*
store %struct.ptr_array* %0, %struct.ptr_array** %3
store i8* %1, i8** %4
%5 = load %struct.ptr_array*, %struct.ptr_array** %3
%6 = load i8*, i8** %4
%7 = call i8* @ptr_array_rel(%struct.ptr_array* %5, i8* %6, i32 -1)
ret i8* %7
}

LLVM IR (-O2):
%struct.ptr_array = type { i32 }
define i8* @ptr_array_prev(%struct.ptr_array* %0, i8* %1) {
%3 = tail call i8* @ptr_array_rel(%struct.ptr_array* %0, i8* %1, i32 -1)
ret i8* %3
}
/* Type definitions */
struct hostent {
  int dummy;
};

/* Variables and functions */
struct hostent *gethostbyname(char const *);
struct hostent *gethostbyname2(const char *name, int af) {
  return gethostbyname(name);
}


x86 assembly (clang, -O0):
<gethostbyname2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gethostbyname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gethostbyname2>:
jmp    1030 <gethostbyname@plt>

LLVM IR (-O0):
%struct.hostent = type { i32 }
define %struct.hostent* @gethostbyname2(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call %struct.hostent* @gethostbyname(i8* %5)
ret %struct.hostent* %6
}

LLVM IR (-O2):
%struct.hostent = type { i32 }
define %struct.hostent* @gethostbyname2(i8* %0, i32 %1) {
%3 = tail call %struct.hostent* @gethostbyname(i8* %0)
ret %struct.hostent* %3
}
/* Variables and functions */
int ft_abs(int);
void ft_neg_case(int *n, char *s) {
  s[0] = '-';
  if (*n == -2147483648) {
    s[1] = '2';
    *n = 147483648;
  }
  *n = ft_abs(*n);
}


x86 assembly (clang, -O0):
<ft_neg_case>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x2d,(%rax)
mov    -0x8(%rbp),%rax
movslq (%rax),%rax
cmp    $0xffffffff80000000,%rax
jne    114c <ft_neg_case+0x3c>
mov    -0x10(%rbp),%rax
movb   $0x32,0x1(%rax)
mov    -0x8(%rbp),%rax
movl   $0x8ca6c00,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <ft_abs@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_neg_case>:
push   %rbx
mov    %rdi,%rbx
movb   $0x2d,(%rsi)
mov    (%rdi),%edi
cmp    $0x80000000,%edi
jne    1130 <ft_neg_case+0x20>
movb   $0x32,0x1(%rsi)
movl   $0x8ca6c00,(%rbx)
mov    $0x8ca6c00,%edi
call   1030 <ft_abs@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_neg_case(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i64 0
store i8 45, i8* %6
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
%9 = sext i32 %8 to i64
%10 = icmp eq i64 %9, -2147483648
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8 50, i8* %13
%14 = load i32*, i32** %3
store i32 147483648, i32* %14
br label %15
15: ; preds = %11, %2
%16 = load i32*, i32** %3
%17 = load i32, i32* %16
%18 = call i32 @ft_abs(i32 %17)
%19 = load i32*, i32** %3
store i32 %18, i32* %19
ret void
}

LLVM IR (-O2):
define void @ft_neg_case(i32* nocapture %0, i8* nocapture writeonly %1) {
store i8 45, i8* %1
%3 = load i32, i32* %0
%4 = icmp eq i32 %3, -2147483648
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %1, i64 1
store i8 50, i8* %6
store i32 147483648, i32* %0
br label %7
7: ; preds = %5, %2
%8 = phi i32 [ 147483648, %5 ], [ %3, %2 ]
%9 = tail call i32 @ft_abs(i32 %8)
store i32 %9, i32* %0
ret void
}
char *ft_strcpy(char *dst, const char *src) {
  char *tmp;
  tmp = dst;
  while (*src)
    *tmp++ = *src++;
  *tmp = 0;
  return (dst);
}


x86 assembly (clang, -O0):
<ft_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <ft_strcpy+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1114 <ft_strcpy+0x14>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
mov    %rdi,%rdx
test   %cl,%cl
je     1131 <ft_strcpy+0x31>
add    $0x1,%rsi
mov    %rax,%rdx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %cl,(%rdx)
add    $0x1,%rdx
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <ft_strcpy+0x20>
movb   $0x0,(%rdx)
ret

LLVM IR (-O0):
define i8* @ft_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
store i8 %14, i8* %15
br label %7
17: ; preds = %7
%18 = load i8*, i8** %5
store i8 0, i8* %18
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @ft_strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i8* %0
}
int test_bit(int nr, volatile const unsigned long *addr) {
  int oldbit;
  asm volatile("bt %2,%1\n\t"
               "sbb %0,%0"
               : "=r"(oldbit)
               : "m"(*(unsigned long *)addr), "Ir"(nr));
  return oldbit;
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
bt     %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
bt     %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "bt $2,$1\0A\09sbb $0,$0", "=r,*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "bt $2,$1\0A\09sbb $0,$0", "=r,*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret i32 %3
}
const char *TA_GetVersionMajor(void) { return "0"; }


x86 assembly (clang, -O0):
<TA_GetVersionMajor>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TA_GetVersionMajor>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"0\00"
define i8* @TA_GetVersionMajor() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [2 x i8] c"0\00"
define i8* @TA_GetVersionMajor() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR4F_get(void) { return U_WMRCORENONE_get("U_WMRSTARTPAGE"); }


x86 assembly (clang, -O0):
<U_WMR4F_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR4F_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"U_WMRSTARTPAGE\00"
define i32 @U_WMR4F_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [15 x i8] c"U_WMRSTARTPAGE\00"
define i32 @U_WMR4F_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void __dealloc_vertices(void) {}


x86 assembly (clang, -O0):
<__dealloc_vertices>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dealloc_vertices>:
ret

LLVM IR (-O0):
define void @__dealloc_vertices() {
ret void
}

LLVM IR (-O2):
define void @__dealloc_vertices() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int type;
};
typedef TYPE_1__ XPropertyEvent;

/* Variables and functions */
void set_XPropertyEvent_type(void *_p, int _v) {
  ((XPropertyEvent *)_p)->type = (int)_v;
}


x86 assembly (clang, -O0):
<set_XPropertyEvent_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XPropertyEvent_type>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XPropertyEvent_type(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XPropertyEvent_type(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system_halt();
void __aeabi_ldiv0(void) { system_halt(); }


x86 assembly (clang, -O0):
<__aeabi_ldiv0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <system_halt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_ldiv0>:
xor    %eax,%eax
jmp    1030 <system_halt@plt>

LLVM IR (-O0):
define void @__aeabi_ldiv0() {
%1 = call i32 (...) @system_halt()
ret void
}

LLVM IR (-O2):
define void @__aeabi_ldiv0() {
%1 = tail call i32 (...) @system_halt()
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t umin64(uint64_t a, uint64_t b) { return a <= b ? a : b; }


x86 assembly (clang, -O0):
<umin64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jg     1127 <umin64+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umin64+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umin64>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovg  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @umin64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sle i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umin64(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
void swap(unsigned *a, unsigned *b) {
  unsigned tmp = *a;
  *a = *b;
  *b = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
char __aes_multiply_by_2(char);
char __aes_power_by_2(char a, int n) {
  int i;
  char t = a;
  for (i = 0; i < n; i++)
    t = __aes_multiply_by_2(t);
  return t;
}


x86 assembly (clang, -O0):
<__aes_power_by_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0xd(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1154 <__aes_power_by_2+0x44>
movsbl -0xd(%rbp),%edi
call   1030 <__aes_multiply_by_2@plt>
mov    %al,-0xd(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112e <__aes_power_by_2+0x1e>
movsbl -0xd(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aes_power_by_2>:
push   %rbx
mov    %edi,%eax
test   %esi,%esi
jle    112d <__aes_power_by_2+0x1d>
mov    %esi,%ebx
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <__aes_multiply_by_2@plt>
add    $0xffffffff,%ebx
jne    1120 <__aes_power_by_2+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @__aes_power_by_2(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i8 %0, i8* %3
store i32 %1, i32* %4
%7 = load i8, i8* %3
store i8 %7, i8* %6
store i32 0, i32* %5
br label %8
8: ; preds = %15, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load i8, i8* %6
%14 = call signext i8 @__aes_multiply_by_2(i8 signext %13)
store i8 %14, i8* %6
br label %15
15: ; preds = %12
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %8
18: ; preds = %8
%19 = load i8, i8* %6
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @__aes_power_by_2(i8 signext %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i8 [ %7, %4 ], [ %0, %2 ]
%6 = phi i32 [ %8, %4 ], [ 0, %2 ]
%7 = tail call signext i8 @__aes_multiply_by_2(i8 signext %5)
%8 = add nuw nsw i32 %6, 1
%9 = icmp eq i32 %8, %1
br i1 %9, label %10, label %4
10: ; preds = %4, %2
%11 = phi i8 [ %0, %2 ], [ %7, %4 ]
ret i8 %11
}
/* Variables and functions */
int /*<<< orphan*/ atExitHandler();
extern void atExitHandlerInC() { atExitHandler(); }


x86 assembly (clang, -O0):
<atExitHandlerInC>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <atExitHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<atExitHandlerInC>:
xor    %eax,%eax
jmp    1030 <atExitHandler@plt>

LLVM IR (-O0):
define void @atExitHandlerInC() {
%1 = call i32 (...) @atExitHandler()
ret void
}

LLVM IR (-O2):
define void @atExitHandlerInC() {
%1 = tail call i32 (...) @atExitHandler()
ret void
}
/* Variables and functions */
int foo();
int func() { return foo(); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xor    %eax,%eax
jmp    1030 <foo@plt>

LLVM IR (-O0):
define i32 @func() {
%1 = call i32 (...) @foo()
ret i32 %1
}

LLVM IR (-O2):
define i32 @func() {
%1 = tail call i32 (...) @foo()
ret i32 %1
}
void XkbSetXlibControls() {}


x86 assembly (clang, -O0):
<XkbSetXlibControls>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbSetXlibControls>:
ret

LLVM IR (-O0):
define void @XkbSetXlibControls() {
ret void
}

LLVM IR (-O2):
define void @XkbSetXlibControls() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ send_event;
};
typedef TYPE_1__ XButtonPressedEvent;

/* Variables and functions */
int get_XButtonPressedEvent_send_event(void *_p) {
  return (int)((XButtonPressedEvent *)_p)->send_event;
}


x86 assembly (clang, -O0):
<get_XButtonPressedEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XButtonPressedEvent_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XButtonPressedEvent_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XButtonPressedEvent_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ puts(char *);
int main() {
  int a, b = 3;
  a = b;
  a += 2;
  puts("\a/a");
  printf("hola manny \a");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
lea    0xeb4(%rip),%rdi
call   1030 <puts@plt>
lea    0xeac(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xed0(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\07/a\00"
@.str.1 = [13 x i8] c"hola manny \07\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %3
%4 = load i32, i32* %3
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 2
store i32 %6, i32* %2
%7 = call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"\07/a\00"
@.str.1 = [13 x i8] c"hola manny \07\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ HwSharedHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void HwSharedUpdated() { UAVObjUpdated(HwSharedHandle()); }


x86 assembly (clang, -O0):
<HwSharedUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HwSharedHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HwSharedUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <HwSharedHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @HwSharedUpdated() {
%1 = call i32 (...) @HwSharedHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @HwSharedUpdated() {
%1 = tail call i32 (...) @HwSharedHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
void sn_coap_protocol_clear_retransmission_buffer(struct coap_s *handle) {}


x86 assembly (clang, -O0):
<sn_coap_protocol_clear_retransmission_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sn_coap_protocol_clear_retransmission_buffer>:
ret

LLVM IR (-O0):
%struct.coap_s = type opaque
define void @sn_coap_protocol_clear_retransmission_buffer(%struct.coap_s* %0) {
%2 = alloca %struct.coap_s*
store %struct.coap_s* %0, %struct.coap_s** %2
ret void
}

LLVM IR (-O2):
%struct.coap_s = type opaque
define void @sn_coap_protocol_clear_retransmission_buffer(%struct.coap_s* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void __attribute__((noreturn)) usage(const char *argv[]) {
  printf("Usage: %s [num-steps]\n", argv[0]);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    (%rdi),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Usage: %s [num-steps]\0A\00"
define void @usage(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 0
%5 = load i8*, i8** %4
%6 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [23 x i8] c"Usage: %s [num-steps]\0A\00"
define void @usage(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t enshift(uint32_t x) { return x & 0x0000001f; }


x86 assembly (clang, -O0):
<enshift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<enshift>:
mov    %edi,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @enshift(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 31
ret i32 %4
}

LLVM IR (-O2):
define i32 @enshift(i32 %0) {
%2 = and i32 %0, 31
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ g(int *);
__attribute((always_)) int f(int i) {
a:
  g(&i);
  if (i == 7)
    goto a;
  return 3 + i;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <g@plt>
cmpl   $0x7,-0x4(%rbp)
jne    1133 <f+0x23>
jmp    111b <f+0xb>
mov    -0x4(%rbp),%eax
add    $0x3,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,0xc(%rsp)
lea    0xc(%rsp),%rbx
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <g@plt>
mov    0xc(%rsp),%eax
cmp    $0x7,%eax
je     1120 <f+0x10>
add    $0x3,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = call i32 @g(i32* %2)
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 7
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i32, i32* %2
%10 = add nsw i32 3, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
%4 = call i32 @g(i32* %2)
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 7
br i1 %6, label %3, label %7
7: ; preds = %3
%8 = add nsw i32 %5, 3
ret i32 %8
}
void zcalloc(void) {}


x86 assembly (clang, -O0):
<zcalloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zcalloc>:
ret

LLVM IR (-O0):
define void @zcalloc() {
ret void
}

LLVM IR (-O2):
define void @zcalloc() {
ret void
}
long scale(long what) {
  return ((what / 1000) * (0x100000L)) +
         (((what % 1000) * (0x100000L)) + 500) / 1000;
}


x86 assembly (clang, -O0):
<scale>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
shl    $0x14,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
mov    %rdx,%rax
shl    $0x14,%rax
add    $0x1f4,%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale>:
movabs $0x20c49ba5e353f7cf,%rsi
9b c4 20
mov    %rdi,%rax
imul   %rsi
mov    %rdx,%rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x7,%rcx
add    %rax,%rcx
imul   $0x3e8,%rcx,%rax
shl    $0x14,%rcx
sub    %rax,%rdi
shl    $0x14,%rdi
lea    0x1f4(%rdi),%rax
imul   %rsi
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x7,%rdx
add    %rdx,%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @scale(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sdiv i64 %3, 1000
%5 = mul nsw i64 %4, 1048576
%6 = load i64, i64* %2
%7 = srem i64 %6, 1000
%8 = mul nsw i64 %7, 1048576
%9 = add nsw i64 %8, 500
%10 = sdiv i64 %9, 1000
%11 = add nsw i64 %5, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @scale(i64 %0) {
%2 = sdiv i64 %0, 1000
%3 = shl nsw i64 %2, 20
%4 = srem i64 %0, 1000
%5 = shl nsw i64 %4, 20
%6 = or i64 %5, 500
%7 = sdiv i64 %6, 1000
%8 = add nsw i64 %7, %3
ret i64 %8
}
/* Variables and functions */
int rand();
void rand_doubles(int size, double *rands) {
  int i;
  for (i = 0; i < size; i++) {
    rands[i] = rand() % 10 + 1;
  }
}


x86 assembly (clang, -O0):
<rand_doubles>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1163 <rand_doubles+0x53>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
cvtsi2sd %edx,%xmm0
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <rand_doubles+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_doubles>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    116f <rand_doubles+0x5f>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
add    %ecx,%eax
add    $0x1,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
movsd  %xmm0,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <rand_doubles+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @rand_doubles(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
store i32 %0, i32* %3
store double* %1, double** %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = srem i32 %11, 10
%13 = add nsw i32 %12, 1
%14 = sitofp i32 %13 to double
%15 = load double*, double** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %15, i64 %17
store double %14, double* %18
br label %19
19: ; preds = %10
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @rand_doubles(i32 %0, double* nocapture writeonly %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %13, %6 ]
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, 10
%10 = add nsw i32 %9, 1
%11 = sitofp i32 %10 to double
%12 = getelementptr inbounds double, double* %1, i64 %7
store double %11, double* %12
%13 = add nuw nsw i64 %7, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %15, label %6
15: ; preds = %6, %2
ret void
}
sizeInt(int val) {
  int cpt = 1;
  while ((val / 10) > 0) {
    val = val / 10;
    cpt++;
  }
  return cpt;
}


x86 assembly (clang, -O0):
<sizeInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
cmp    $0x0,%eax
jle    113e <sizeInt+0x3e>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <sizeInt+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeInt>:
mov    $0x1,%eax
cmp    $0xa,%edi
jl     1134 <sizeInt+0x34>
mov    $0x1,%eax
mov    $0xcccccccd,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x23,%rdx
add    $0x1,%eax
cmp    $0x63,%edi
mov    %edx,%edi
ja     1120 <sizeInt+0x20>
ret

LLVM IR (-O0):
define i32 @sizeInt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 10
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, i32* %2
%10 = sdiv i32 %9, 10
store i32 %10, i32* %2
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @sizeInt(i32 %0) {
%2 = icmp sgt i32 %0, 9
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = udiv i32 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i32 %5, 99
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
int wait_core(void) {
  volatile unsigned long *sent;
  int i;
  sent = (volatile unsigned long *)4;
  for (i = 0; i < 100; i++) {
    if (*sent == 0) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<wait_core>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x64,-0x14(%rbp)
jge    114e <wait_core+0x4e>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    $0x0,%rax
jne    113b <wait_core+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1155 <wait_core+0x55>
jmp    1140 <wait_core+0x40>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1114 <wait_core+0x14>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_core>:
mov    $0x64,%ecx
mov    $0x1,%eax
nopw   0x0(%rax,%rax,1)
cmpq   $0x0,0x4
je     114e <wait_core+0x4e>
cmpq   $0x0,0x4
je     114e <wait_core+0x4e>
cmpq   $0x0,0x4
je     114e <wait_core+0x4e>
cmpq   $0x0,0x4
je     114e <wait_core+0x4e>
cmpq   $0x0,0x4
je     114e <wait_core+0x4e>
add    $0xfffffffb,%ecx
jne    1110 <wait_core+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @wait_core() {
%1 = alloca i32
%2 = alloca i64*
%3 = alloca i32
store i64* inttoptr (i64 4 to i64*), i64** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i64*, i64** %2
%9 = load volatile i64, i64* %8
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %1
br label %17
12: ; preds = %7
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
store i32 0, i32* %1
br label %17
17: ; preds = %16, %11
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @wait_core() {
br label %16
1: ; preds = %16
%2 = load volatile i64, i64* inttoptr (i64 4 to i64*)
%3 = icmp eq i64 %2, 0
br i1 %3, label %20, label %4
4: ; preds = %1
%5 = load volatile i64, i64* inttoptr (i64 4 to i64*)
%6 = icmp eq i64 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %4
%8 = load volatile i64, i64* inttoptr (i64 4 to i64*)
%9 = icmp eq i64 %8, 0
br i1 %9, label %20, label %10
10: ; preds = %7
%11 = load volatile i64, i64* inttoptr (i64 4 to i64*)
%12 = icmp eq i64 %11, 0
br i1 %12, label %20, label %13
13: ; preds = %10
%14 = add nuw nsw i32 %17, 5
%15 = icmp eq i32 %14, 100
br i1 %15, label %20, label %16
16: ; preds = %13, %0
%17 = phi i32 [ 0, %0 ], [ %14, %13 ]
%18 = load volatile i64, i64* inttoptr (i64 4 to i64*)
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %1
20: ; preds = %13, %10, %7, %4, %1, %16
%21 = phi i32 [ 1, %16 ], [ 1, %1 ], [ 1, %4 ], [ 1, %7 ], [ 1, %10 ], [ 0, %13 ]
ret i32 %21
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ vrc2_4_setParams9XX0(int /*<<< orphan*/, int);
void m22_setParams9XX0(uint16_t addr, uint8_t val) {
  val &= 1;
  vrc2_4_setParams9XX0(addr, val);
}


x86 assembly (clang, -O0):
<m22_setParams9XX0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <vrc2_4_setParams9XX0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m22_setParams9XX0>:
and    $0x1,%esi
jmp    1030 <vrc2_4_setParams9XX0@plt>

LLVM IR (-O0):
define void @m22_setParams9XX0(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 1
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @vrc2_4_setParams9XX0(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @m22_setParams9XX0(i32 %0, i32 %1) {
%3 = and i32 %1, 1
%4 = tail call i32 @vrc2_4_setParams9XX0(i32 %0, i32 %3)
ret void
}
int test_imm_26int16_mem(short *val) {
  return ((*val) & (-0x26 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_26int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffffda,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_26int16_mem>:
movzwl (%rdi),%eax
test   $0xffda,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_26int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -38
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_26int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -38
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ spamm_exit(int const *const);
void spamm_exit_(const int *const exitcode) { spamm_exit(exitcode); }


x86 assembly (clang, -O0):
<spamm_exit_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <spamm_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spamm_exit_>:
jmp    1030 <spamm_exit@plt>

LLVM IR (-O0):
define void @spamm_exit_(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @spamm_exit(i32* %3)
ret void
}

LLVM IR (-O2):
define void @spamm_exit_(i32* %0) {
%2 = tail call i32 @spamm_exit(i32* %0)
ret void
}
char const *get_current_color() { return "\033[0m"; }


x86 assembly (clang, -O0):
<get_current_color>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_current_color>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[0m\00"
define i8* @get_current_color() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[0m\00"
define i8* @get_current_color() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ atan(double);
int /*<<< orphan*/ atanf(float);
int /*<<< orphan*/ atanl(long double);
void uninitvar_atan(void) {
  float f;
  (void)atanf(f);
  double d;
  (void)atan(d);
  long double ld;
  (void)atanl(ld);
}


x86 assembly (clang, -O0):
<uninitvar_atan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movss  -0x4(%rbp),%xmm0
call   1040 <atanf@plt>
movsd  -0x10(%rbp),%xmm0
call   1050 <atan@plt>
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <atanl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_atan>:
sub    $0x18,%rsp
call   1040 <atanf@plt>
call   1050 <atan@plt>
call   1030 <atanl@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @uninitvar_atan() {
%1 = alloca float
%2 = alloca double
%3 = alloca x86_fp80
%4 = load float, float* %1
%5 = call i32 @atanf(float %4)
%6 = load double, double* %2
%7 = call i32 @atan(double %6)
%8 = load x86_fp80, x86_fp80* %3
%9 = call i32 @atanl(x86_fp80 %8)
ret void
}

LLVM IR (-O2):
define void @uninitvar_atan() {
%1 = tail call i32 @atanf(float undef)
%2 = tail call i32 @atan(double undef)
%3 = tail call i32 @atanl(x86_fp80 undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void bh_align_free(void *buf) {
  if (buf != NULL) {
    {
      if (buf) {
        free(buf);
        (buf) = NULL;
      }
    };
  }
  buf = NULL;
}


x86 assembly (clang, -O0):
<bh_align_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1148 <bh_align_free+0x38>
cmpq   $0x0,-0x8(%rbp)
je     1143 <bh_align_free+0x33>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
jmp    1148 <bh_align_free+0x38>
movq   $0x0,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bh_align_free>:
test   %rdi,%rdi
je     111a <bh_align_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @bh_align_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = call i32 @free(i8* %9)
store i8* null, i8** %2
br label %11
11: ; preds = %8, %5
br label %12
12: ; preds = %11, %1
store i8* null, i8** %2
ret void
}

LLVM IR (-O2):
define void @bh_align_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
double heaviside(double x) { return (x >= 0.0 ? 1.0 : 0.0); }


x86 assembly (clang, -O0):
<heaviside>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xeea(%rip),%xmm3
xorps  %xmm2,%xmm2
movaps %xmm2,%xmm0
cmplesd %xmm1,%xmm0
movaps %xmm0,%xmm1
andpd  %xmm3,%xmm1
andnpd %xmm2,%xmm0
orpd   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<heaviside>:
xorpd  %xmm1,%xmm1
cmplesd %xmm0,%xmm1
movsd  0xeef(%rip),%xmm0
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @heaviside(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0.000000e+00
%5 = zext i1 %4 to i64
%6 = select i1 %4, double 1.000000e+00, double 0.000000e+00
ret double %6
}

LLVM IR (-O2):
define double @heaviside(double %0) {
%2 = fcmp oge double %0, 0.000000e+00
%3 = select i1 %2, double 1.000000e+00, double 0.000000e+00
ret double %3
}
__attribute__((always_)) void SCB_DisableDCache(void) {}


x86 assembly (clang, -O0):
<SCB_DisableDCache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCB_DisableDCache>:
ret

LLVM IR (-O0):
define void @SCB_DisableDCache() {
ret void
}

LLVM IR (-O2):
define void @SCB_DisableDCache() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hoic_read_ram(int, char *);
int hdoip_cli_read_ram(int fd, int fdr, char **argv, int argc) {
  hoic_read_ram(fd, argv[0]);
  return 0;
}


x86 assembly (clang, -O0):
<hdoip_cli_read_ram>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <hoic_read_ram@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdoip_cli_read_ram>:
push   %rax
mov    (%rdx),%rsi
call   1030 <hoic_read_ram@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hdoip_cli_read_ram(i32 %0, i32 %1, i8** %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8**, i8*** %7
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = call i32 @hoic_read_ram(i32 %9, i8* %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @hdoip_cli_read_ram(i32 %0, i32 %1, i8** nocapture %2, i32 %3) {
%5 = load i8*, i8** %2
%6 = tail call i32 @hoic_read_ram(i32 %0, i8* %5)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint_least16_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_uint_least16_t(uint_least16_t const k1,
                                             uint_least16_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_uint_least16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_uint_least16_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_least16_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_least16_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
uint32_t OneWireBusStatus(uint32_t ui32Base) {
  ASSERT(ui32Base == 0x400B6000);
  return ((*((volatile uint32_t *)(ui32Base + 0x00000000))) &
          (0x00000100 | 0x00000200 | 0x00000400));
}


x86 assembly (clang, -O0):
<OneWireBusStatus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x400b6000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%eax
and    $0x700,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OneWireBusStatus>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x400b6000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rcx
mov    $0x700,%eax
and    (%rcx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @OneWireBusStatus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1074487296
%5 = zext i1 %4 to i32
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 0
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, 1792
ret i32 %12
}

LLVM IR (-O2):
define i32 @OneWireBusStatus(i32 %0) {
%2 = icmp eq i32 %0, 1074487296
%3 = zext i1 %2 to i32
%4 = tail call i32 @ASSERT(i32 %3)
%5 = sext i32 %0 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 1792
ret i32 %8
}