xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t FlashErase(uint32_t ui32Address) {
  ;
  (*((volatile uint32_t *)(0x400FD014))) =
      (0x00000001 | 0x00000200 | 0x00000800);
  (*((volatile uint32_t *)(0x400FD000))) = ui32Address;
  (*((volatile uint32_t *)(0x400FD008))) = 0xA4420000 | 0x00000002;
  while ((*((volatile uint32_t *)(0x400FD008))) & 0x00000002) {
  }
  if ((*((volatile uint32_t *)(0x400FD00C))) &
      (0x00000001 | 0x00000200 | 0x00000800)) {
    return (-1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<FlashErase>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    $0x400fd014,%eax
movl   $0xa01,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0x400fd000,%eax
mov    %ecx,(%rax)
mov    $0x400fd008,%eax
movl   $0xa4420002,(%rax)
mov    $0x400fd008,%eax
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     113f <FlashErase+0x3f>
jmp    1127 <FlashErase+0x27>
mov    $0x400fd00c,%eax
mov    (%rax),%eax
and    $0xa01,%eax
cmp    $0x0,%eax
je     1160 <FlashErase+0x60>
movl   $0xffffffff,-0x4(%rbp)
jmp    1167 <FlashErase+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashErase>:
movl   $0xa01,0x400fd014
mov    %edi,0x400fd000
movl   $0xa4420002,0x400fd008
nopl   (%rax)
testl  $0x2,0x400fd008
jne    1120 <FlashErase+0x20>
mov    $0xa01,%eax
and    0x400fd00c,%eax
neg    %eax
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @FlashErase(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
store volatile i32 2561, i32* inttoptr (i64 1074778132 to i32*)
%4 = load i32, i32* %3
store volatile i32 %4, i32* inttoptr (i64 1074778112 to i32*)
store volatile i32 -1539178494, i32* inttoptr (i64 1074778120 to i32*)
br label %5
5: ; preds = %9, %1
%6 = load volatile i32, i32* inttoptr (i64 1074778120 to i32*)
%7 = and i32 %6, 2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
%11 = load volatile i32, i32* inttoptr (i64 1074778124 to i32*)
%12 = and i32 %11, 2561
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 -1, i32* %2
br label %16
15: ; preds = %10
store i32 0, i32* %2
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @FlashErase(i32 %0) {
store volatile i32 2561, i32* inttoptr (i64 1074778132 to i32*)
store volatile i32 %0, i32* inttoptr (i64 1074778112 to i32*)
store volatile i32 -1539178494, i32* inttoptr (i64 1074778120 to i32*)
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 1074778120 to i32*)
%4 = and i32 %3, 2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = load volatile i32, i32* inttoptr (i64 1074778124 to i32*)
%8 = and i32 %7, 2561
%9 = icmp ne i32 %8, 0
%10 = sext i1 %9 to i32
ret i32 %10
}
void main() { main(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
call   1030 <main@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define void @main() {
ret void
}

LLVM IR (-O2):
define void @main() {
br label %1
1: ; preds = %1, %0
br label %1
}
int test_imm_B0uint16_mem(unsigned short *val) {
  return ((*val) & (0xB0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B0uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xb0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B0uint16_mem>:
testb  $0xb0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B0uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 176
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B0uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 176
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
reg0adrx1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if (r0 <= (((unsigned short *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<reg0adrx1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movzwl -0x6(%rbp),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movzwl (%rcx,%rdx,2),%ecx
cmp    %ecx,%eax
jg     1144 <reg0adrx1+0x44>
movl   $0x1,-0x4(%rbp)
jmp    114b <reg0adrx1+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0adrx1>:
movzwl %di,%edx
movslq %ecx,%rax
movzwl 0xa98ac7(%rax,%rax,1),%ecx
xor    %eax,%eax
cmp    %ecx,%edx
setbe  %al
ret

LLVM IR (-O0):
define i32 @reg0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* %8
%17 = zext i16 %16 to i32
%18 = load i32, i32* %11
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %19
%21 = load i16, i16* %20
%22 = zext i16 %21 to i32
%23 = icmp sle i32 %17, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @reg0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = and i32 %0, 65535
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %8
%10 = load i16, i16* %9
%11 = zext i16 %10 to i32
%12 = icmp ule i32 %7, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x78() {
  Assert_real((isxdigit(120) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              605, ("isxdigit should be 0 for x"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x78>:
push   %rbp
mov    %rsp,%rbp
mov    $0x78,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x25d,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x78>:
push   %rax
mov    $0x78,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x25d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for x\00"
define void @t_isxdigit_0x78() {
%1 = call i64 @isxdigit(i32 120)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 605, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for x\00"
define void @t_isxdigit_0x78() {
%1 = tail call i64 @isxdigit(i32 120)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 605, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void libtunnel_init() {}


x86 assembly (clang, -O0):
<libtunnel_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libtunnel_init>:
ret

LLVM IR (-O0):
define void @libtunnel_init() {
ret void
}

LLVM IR (-O2):
define void @libtunnel_init() {
ret void
}
unsigned int asc_to_int(char a) {
  if (a >= 'A')
    return (a - 'A') + 10;
  else
    return a - '0';
}


x86 assembly (clang, -O0):
<asc_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1129 <asc_to_int+0x29>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1133 <asc_to_int+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asc_to_int>:
lea    -0x30(%rdi),%ecx
lea    -0x37(%rdi),%eax
cmp    $0x41,%dil
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @asc_to_int(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 65
%11 = add nsw i32 %10, 10
store i32 %11, i32* %2
br label %16
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 48
store i32 %15, i32* %2
br label %16
16: ; preds = %12, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @asc_to_int(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = icmp sgt i8 %0, 64
%4 = select i1 %3, i32 -55, i32 -48
%5 = add nsw i32 %4, %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, unsigned int, unsigned int);
const char *version_string(unsigned v) {
  static char buf[32];
#pragma warning(suppress : 6031)
  snprintf(buf, 31, "%u.%u", v >> 16, v & 0xFFFF);
  return buf;
}


x86 assembly (clang, -O0):
<version_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
shr    $0x10,%ecx
mov    -0x4(%rbp),%r8d
and    $0xffff,%r8d
lea    0x2f0d(%rip),%rdi
mov    $0x1f,%esi
lea    0xec1(%rip),%rdx
call   1030 <snprintf@plt>
lea    0x2ef5(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<version_string>:
push   %rbx
movzwl %di,%r8d
mov    %edi,%ecx
shr    $0x10,%ecx
lea    0x2f1f(%rip),%rbx
lea    0xed8(%rip),%rdx
mov    %rbx,%rdi
mov    $0x1f,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@version_string.buf = internal global [32 x i8] zeroinitializer
@.str = [6 x i8] c"%u.%u\00"
define i8* @version_string(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 16
%5 = load i32, i32* %2
%6 = and i32 %5, 65535
%7 = call i32 @snprintf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @version_string.buf, i64 0, i64 0), i32 31, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %6)
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @version_string.buf, i64 0, i64 0)
}

LLVM IR (-O2):
@version_string.buf = internal global [32 x i8] zeroinitializer
@.str = [6 x i8] c"%u.%u\00"
define i8* @version_string(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %0, 65535
%4 = tail call i32 @snprintf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @version_string.buf, i64 0, i64 0), i32 31, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %3)
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @version_string.buf, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
char *appaserver_link_get_tail_half(char *, char *, char *, char *,
                                    int /*<<< orphan*/, char *, char *);
char *appaserver_link_tail_half(char *application_name, char *filename_stem,
                                char *begin_date_string, char *end_date_string,
                                pid_t process_id, char *session,
                                char *extension) {
  return appaserver_link_get_tail_half(application_name, filename_stem,
                                       begin_date_string, end_date_string,
                                       process_id, session, extension);
}


x86 assembly (clang, -O0):
<appaserver_link_tail_half>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <appaserver_link_get_tail_half@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<appaserver_link_tail_half>:
jmp    1030 <appaserver_link_get_tail_half@plt>

LLVM IR (-O0):
define i8* @appaserver_link_tail_half(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i8* %5, i8* %6) {
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i8*
store i8* %0, i8** %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i32 %4, i32* %12
store i8* %5, i8** %13
store i8* %6, i8** %14
%15 = load i8*, i8** %8
%16 = load i8*, i8** %9
%17 = load i8*, i8** %10
%18 = load i8*, i8** %11
%19 = load i32, i32* %12
%20 = load i8*, i8** %13
%21 = load i8*, i8** %14
%22 = call i8* @appaserver_link_get_tail_half(i8* %15, i8* %16, i8* %17, i8* %18, i32 %19, i8* %20, i8* %21)
ret i8* %22
}

LLVM IR (-O2):
define i8* @appaserver_link_tail_half(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i8* %5, i8* %6) {
%8 = tail call i8* @appaserver_link_get_tail_half(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i8* %5, i8* %6)
ret i8* %8
}
int text_is_valid_char(int c) {
  if (c == 0177)
    return 0;
  if (c < 0 || c >= ' ' || c == '\t' || c == '\n' || c == '\r')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<text_is_valid_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x7f,-0x8(%rbp)
jne    111d <text_is_valid_char+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1162 <text_is_valid_char+0x62>
cmpl   $0x0,-0x8(%rbp)
jl     114f <text_is_valid_char+0x4f>
cmpl   $0x20,-0x8(%rbp)
jge    114f <text_is_valid_char+0x4f>
cmpl   $0x9,-0x8(%rbp)
je     114f <text_is_valid_char+0x4f>
cmpl   $0xa,-0x8(%rbp)
je     114f <text_is_valid_char+0x4f>
cmpl   $0xd,-0x8(%rbp)
jne    115b <text_is_valid_char+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    1162 <text_is_valid_char+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<text_is_valid_char>:
xor    %eax,%eax
cmp    $0x7f,%edi
je     112b <text_is_valid_char+0x2b>
mov    $0x1,%eax
cmp    $0x1f,%edi
ja     112b <text_is_valid_char+0x2b>
add    $0xfffffff7,%edi
mov    $0x0,%eax
cmp    $0x4,%edi
ja     112b <text_is_valid_char+0x2b>
movslq %edi,%rax
lea    0xed8(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @text_is_valid_char(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 127
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %24
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %22, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 32
br i1 %12, label %22, label %13
13: ; preds = %10
%14 = load i32, i32* %3
%15 = icmp eq i32 %14, 9
br i1 %15, label %22, label %16
16: ; preds = %13
%17 = load i32, i32* %3
%18 = icmp eq i32 %17, 10
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = load i32, i32* %3
%21 = icmp eq i32 %20, 13
br i1 %21, label %22, label %23
22: ; preds = %19, %16, %13, %10, %7
store i32 1, i32* %2
br label %24
23: ; preds = %19
store i32 0, i32* %2
br label %24
24: ; preds = %23, %22, %6
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
@switch.table.text_is_valid_char = [5 x i32] [i32 1, i32 1, i32 0, i32 0, i32 1]
define i32 @text_is_valid_char(i32 %0) {
%2 = icmp eq i32 %0, 127
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp ugt i32 %0, 31
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = add i32 %0, -9
%7 = icmp ult i32 %6, 5
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = sext i32 %6 to i64
%10 = getelementptr inbounds [5 x i32], [5 x i32]* @switch.table.text_is_valid_char, i64 0, i64 %9
%11 = load i32, i32* %10
br label %12
12: ; preds = %5, %8, %3, %1
%13 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %11, %8 ], [ 0, %5 ]
ret i32 %13
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_add_dobldobl_Laurent_term(int i, int n, int *exp, double *c) {
  int a[2], fail;
  a[0] = n;
  a[1] = i;
  fail = _ada_use_c2phc4c(556, a, exp, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_add_dobldobl_Laurent_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x20(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x22c,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_add_dobldobl_Laurent_term>:
push   %rax
mov    %esi,(%rsp)
mov    %edi,0x4(%rsp)
mov    %rsp,%rsi
mov    $0x22c,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syscon_add_dobldobl_Laurent_term(i32 %0, i32 %1, i32* %2, double* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca double*
%9 = alloca [2 x i32]
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store double* %3, double** %8
%11 = load i32, i32* %6
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %11, i32* %12
%13 = load i32, i32* %5
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %13, i32* %14
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%16 = load i32*, i32** %7
%17 = load double*, double** %8
%18 = call i32 @_ada_use_c2phc4c(i32 556, i32* %15, i32* %16, double* %17, i32 0)
store i32 %18, i32* %10
%19 = load i32, i32* %10
ret i32 %19
}

LLVM IR (-O2):
define i32 @syscon_add_dobldobl_Laurent_term(i32 %0, i32 %1, i32* %2, double* %3) {
%5 = alloca [2 x i32]
%6 = bitcast [2 x i32]* %5 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 0
store i32 %1, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 1
store i32 %0, i32* %8
%9 = call i32 @_ada_use_c2phc4c(i32 556, i32* %7, i32* %2, double* %3, i32 0)
ret i32 %9
}
char randomTexture(int i) {
  if (i % 3 == 0)
    return 'b';
  if (i % 3 == 1)
    return 'e';
  if (i % 3 == 2)
    return 'h';
  return 'e';
}


x86 assembly (clang, -O0):
<randomTexture>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1124 <randomTexture+0x24>
movb   $0x62,-0x1(%rbp)
jmp    1162 <randomTexture+0x62>
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    1141 <randomTexture+0x41>
movb   $0x65,-0x1(%rbp)
jmp    1162 <randomTexture+0x62>
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cmp    $0x2,%edx
jne    115e <randomTexture+0x5e>
movb   $0x68,-0x1(%rbp)
jmp    1162 <randomTexture+0x62>
movb   $0x65,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomTexture>:
movslq %edi,%rax
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
lea    (%rax,%rax,2),%ecx
add    $0x62,%cl
cmp    $0x3,%eax
movzbl %cl,%ecx
mov    $0x65,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @randomTexture(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i8 98, i8* %2
br label %19
8: ; preds = %1
%9 = load i32, i32* %3
%10 = srem i32 %9, 3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %8
store i8 101, i8* %2
br label %19
13: ; preds = %8
%14 = load i32, i32* %3
%15 = srem i32 %14, 3
%16 = icmp eq i32 %15, 2
br i1 %16, label %17, label %18
17: ; preds = %13
store i8 104, i8* %2
br label %19
18: ; preds = %13
store i8 101, i8* %2
br label %19
19: ; preds = %18, %17, %12, %7
%20 = load i8, i8* %2
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @randomTexture(i32 %0) {
%2 = srem i32 %0, 3
%3 = icmp ult i32 %2, 3
%4 = trunc i32 %2 to i8
%5 = mul i8 %4, 3
%6 = add i8 %5, 98
%7 = select i1 %3, i8 %6, i8 101
ret i8 %7
}
void LOS_EvbLedControl(int index, int cmd) { return; }


x86 assembly (clang, -O0):
<LOS_EvbLedControl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOS_EvbLedControl>:
ret

LLVM IR (-O0):
define void @LOS_EvbLedControl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @LOS_EvbLedControl(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint_fast16_t;

/* Variables and functions */
uint_fast16_t lzs_idx_delta2_wrap(uint_fast16_t idx1, uint_fast16_t idx2,
                                  uint_fast16_t array_size) {
  if (idx1 <= idx2) {
    idx1 += array_size;
  }
  return idx1 - idx2;
}


x86 assembly (clang, -O0):
<lzs_idx_delta2_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jg     112a <lzs_idx_delta2_wrap+0x2a>
mov    -0x18(%rbp),%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lzs_idx_delta2_wrap>:
xor    %eax,%eax
sub    %rsi,%rdi
cmovle %rdx,%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @lzs_idx_delta2_wrap(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = icmp sle i64 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i64, i64* %6
%12 = load i64, i64* %4
%13 = add nsw i64 %12, %11
store i64 %13, i64* %4
br label %14
14: ; preds = %10, %3
%15 = load i64, i64* %4
%16 = load i64, i64* %5
%17 = sub nsw i64 %15, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @lzs_idx_delta2_wrap(i64 %0, i64 %1, i64 %2) {
%4 = icmp sgt i64 %0, %1
%5 = select i1 %4, i64 0, i64 %2
%6 = sub i64 %0, %1
%7 = add i64 %6, %5
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int main(void) {
  putchar('\\');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5c,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5c,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @putchar(i8 signext 92)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @putchar(i8 signext 92)
ret i32 0
}
void test_hash(void) {}


x86 assembly (clang, -O0):
<test_hash>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_hash>:
ret

LLVM IR (-O0):
define void @test_hash() {
ret void
}

LLVM IR (-O2):
define void @test_hash() {
ret void
}
/* Variables and functions */
void _mm_pause();
void test_mm_pause() { return _mm_pause(); }


x86 assembly (clang, -O0):
<test_mm_pause>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_pause>:
pause
ret

LLVM IR (-O0):
define void @test_mm_pause() {
ret void
}

LLVM IR (-O2):
define void @test_mm_pause() {
tail call void @llvm.x86.sse2.pause()
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
void main() {
  int32_t a;
  a = 1;
  a++;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
int wpas_wps_eapol_cb(struct wpa_supplicant *wpa_s) { return 0; }


x86 assembly (clang, -O0):
<wpas_wps_eapol_cb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_wps_eapol_cb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define i32 @wpas_wps_eapol_cb(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret i32 0
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define i32 @wpas_wps_eapol_cb(%struct.wpa_supplicant* nocapture readnone %0) {
ret i32 0
}
void do_graph_created() { int i = 0; }


x86 assembly (clang, -O0):
<do_graph_created>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_graph_created>:
ret

LLVM IR (-O0):
define void @do_graph_created() {
%1 = alloca i32
store i32 0, i32* %1
ret void
}

LLVM IR (-O2):
define void @do_graph_created() {
ret void
}
/* Variables and functions */
double log(double);
double idfExponential(double m, double u) { return (-m * log(1.0 - u)); }


x86 assembly (clang, -O0):
<idfExponential>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeb5(%rip),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idfExponential>:
sub    $0x18,%rsp
xorps  0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
movsd  0xee9(%rip),%xmm0
subsd  %xmm1,%xmm0
call   1030 <log@plt>
mulsd  (%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @idfExponential(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fneg double %5
%7 = load double, double* %4
%8 = fsub double 1.000000e+00, %7
%9 = call double @log(double %8)
%10 = fmul double %6, %9
ret double %10
}

LLVM IR (-O2):
define double @idfExponential(double %0, double %1) {
%3 = fneg double %0
%4 = fsub double 1.000000e+00, %1
%5 = tail call double @log(double %4)
%6 = fmul double %5, %3
ret double %6
}
void pseudo_handler() {}


x86 assembly (clang, -O0):
<pseudo_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pseudo_handler>:
ret

LLVM IR (-O0):
define void @pseudo_handler() {
ret void
}

LLVM IR (-O2):
define void @pseudo_handler() {
ret void
}
int rt_numnodes(void) {
  int a = 1;
  return a;
}


x86 assembly (clang, -O0):
<rt_numnodes>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_numnodes>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @rt_numnodes() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @rt_numnodes() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int);
void MFRC522_HAL_Delay(unsigned int ms) { usleep(ms * 1000); }


x86 assembly (clang, -O0):
<MFRC522_HAL_Delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFRC522_HAL_Delay>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @MFRC522_HAL_Delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @MFRC522_HAL_Delay(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
void guix11_dummy(void) {}


x86 assembly (clang, -O0):
<guix11_dummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<guix11_dummy>:
ret

LLVM IR (-O0):
define void @guix11_dummy() {
ret void
}

LLVM IR (-O2):
define void @guix11_dummy() {
ret void
}
/* Variables and functions */
scalar_t__ isupper(int);
int tolower(int c) { return isupper(c) ? (c ^ 0x20) : c; }


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     113b <tolower+0x2b>
mov    -0x4(%rbp),%eax
xor    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <tolower+0x31>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
mov    %ebx,%ecx
xor    $0x20,%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isupper(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = xor i32 %7, 32
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = xor i32 %0, 32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
void glClearBufferuiv(void) { return; }


x86 assembly (clang, -O0):
<glClearBufferuiv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glClearBufferuiv>:
ret

LLVM IR (-O0):
define void @glClearBufferuiv() {
ret void
}

LLVM IR (-O2):
define void @glClearBufferuiv() {
ret void
}
void enableTimer(void) {
  volatile unsigned int *timerControl = (unsigned int *)((0x20400000) + 0);
  volatile unsigned int *timerLoad = (unsigned int *)((0x20400000) + 4);
  *timerLoad = 0x00000000;
  *timerControl = 0x590;
}


x86 assembly (clang, -O0):
<enableTimer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20400000,%eax
mov    %rax,-0x8(%rbp)
mov    $0x20400004,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x590,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enableTimer>:
movl   $0x0,0x20400004
movl   $0x590,0x20400000
ret

LLVM IR (-O0):
define void @enableTimer() {
%1 = alloca i32*
%2 = alloca i32*
store i32* inttoptr (i64 541065216 to i32*), i32** %1
store i32* inttoptr (i64 541065220 to i32*), i32** %2
%3 = load i32*, i32** %2
store volatile i32 0, i32* %3
%4 = load i32*, i32** %1
store volatile i32 1424, i32* %4
ret void
}

LLVM IR (-O2):
define void @enableTimer() {
store volatile i32 0, i32* inttoptr (i64 541065220 to i32*)
store volatile i32 1424, i32* inttoptr (i64 541065216 to i32*)
ret void
}
double permiss_eval(double x, double y) {}


x86 assembly (clang, -O0):
<permiss_eval>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<permiss_eval>:
ret

LLVM IR (-O0):
define double @permiss_eval(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @permiss_eval(double %0, double %1) {
ret double undef
}
/* Variables and functions */
int /*<<< orphan*/ WriteInstruction(char *);
void CR_Original(void) { WriteInstruction("ld ix,(ogptr)"); }


x86 assembly (clang, -O0):
<CR_Original>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <WriteInstruction@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CR_Original>:
lea    0xee9(%rip),%rdi
jmp    1030 <WriteInstruction@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"ld ix,(ogptr)\00"
define void @CR_Original() {
%1 = call i32 @WriteInstruction(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"ld ix,(ogptr)\00"
define void @CR_Original() {
%1 = tail call i32 @WriteInstruction(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void message2() { printf("World!\n"); }


x86 assembly (clang, -O0):
<message2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<message2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"World!\0A\00"
define void @message2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"World!\00"
define void @message2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
int rshift_s_u(int left, unsigned int right) {
  if ((left < 0) || (right >= sizeof(int) * 8)) {
    return left;
  }
  return left >> right;
}


x86 assembly (clang, -O0):
<rshift_s_u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1121 <rshift_s_u+0x21>
mov    -0xc(%rbp),%eax
cmp    $0x20,%rax
jb     112c <rshift_s_u+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1137 <rshift_s_u+0x37>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rshift_s_u>:
xor    %ecx,%ecx
cmp    $0x20,%esi
cmovae %ecx,%esi
mov    %edi,%eax
test   %edi,%edi
cmovns %esi,%ecx
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rshift_s_u(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = zext i32 %9 to i64
%11 = icmp uge i64 %10, 32
br i1 %11, label %12, label %14
12: ; preds = %8, %2
%13 = load i32, i32* %4
store i32 %13, i32* %3
br label %18
14: ; preds = %8
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = ashr i32 %15, %16
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @rshift_s_u(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = icmp ugt i32 %1, 31
%5 = or i1 %3, %4
%6 = select i1 %5, i32 0, i32 %1
%7 = ashr i32 %0, %6
ret i32 %7
}
/* Type definitions */
struct Channel {
  int dummy;
};

/* Variables and functions */
struct Channel *getchannel_msg(int /*<<< orphan*/ *);
struct Channel *getchannel(void) {
  return getchannel_msg(NULL);
}


x86 assembly (clang, -O0):
<getchannel>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <getchannel_msg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchannel>:
xor    %edi,%edi
jmp    1030 <getchannel_msg@plt>

LLVM IR (-O0):
%struct.Channel = type { i32 }
define %struct.Channel* @getchannel() {
%1 = call %struct.Channel* @getchannel_msg(i32* null)
ret %struct.Channel* %1
}

LLVM IR (-O2):
%struct.Channel = type { i32 }
define %struct.Channel* @getchannel() {
%1 = tail call %struct.Channel* @getchannel_msg(i32* null)
ret %struct.Channel* %1
}
/* Variables and functions */
double sqrt(int);
int num_factors(int n) {
  int i;
  int count = 2;
  double sqrt_n = sqrt(n);
  for (i = 2; i <= sqrt_n; ++i)
    if (n % i == 0)
      count = count + 2;
  return count;
}


x86 assembly (clang, -O0):
<num_factors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sqrt@plt>
movsd  %xmm0,-0x18(%rbp)
movl   $0x2,-0x8(%rbp)
cvtsi2sdl -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     1176 <num_factors+0x66>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    1163 <num_factors+0x53>
mov    -0xc(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1168 <num_factors+0x58>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <num_factors+0x26>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_factors>:
push   %rbx
mov    %edi,%ebx
call   1030 <sqrt@plt>
mov    $0x2,%eax
ucomisd 0xedb(%rip),%xmm0
jb     115f <num_factors+0x4f>
mov    $0x2,%ecx
mov    $0x2,%esi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %ebx,%eax
cltd
idiv   %ecx
lea    0x2(%rsi),%eax
test   %edx,%edx
cmovne %esi,%eax
add    $0x1,%ecx
xorps  %xmm1,%xmm1
cvtsi2sd %ecx,%xmm1
ucomisd %xmm1,%xmm0
mov    %eax,%esi
jae    1140 <num_factors+0x30>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @num_factors(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %2
store i32 2, i32* %4
%6 = load i32, i32* %2
%7 = call double @sqrt(i32 %6)
store double %7, double* %5
store i32 2, i32* %3
br label %8
8: ; preds = %22, %1
%9 = load i32, i32* %3
%10 = sitofp i32 %9 to double
%11 = load double, double* %5
%12 = fcmp ole double %10, %11
br i1 %12, label %13, label %25
13: ; preds = %8
%14 = load i32, i32* %2
%15 = load i32, i32* %3
%16 = srem i32 %14, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %13
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 2
store i32 %20, i32* %4
br label %21
21: ; preds = %18, %13
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %8
25: ; preds = %8
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @num_factors(i32 %0) {
%2 = tail call double @sqrt(i32 %0)
%3 = fcmp ult double %2, 2.000000e+00
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %11, %4 ], [ 2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 2, %1 ]
%7 = srem i32 %0, %5
%8 = icmp eq i32 %7, 0
%9 = add nsw i32 %6, 2
%10 = select i1 %8, i32 %9, i32 %6
%11 = add nuw nsw i32 %5, 1
%12 = sitofp i32 %11 to double
%13 = fcmp ult double %2, %12
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 2, %1 ], [ %10, %4 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ db_init();
int /*<<< orphan*/ listen_for_new_connections();
void start() {
  db_init();
  listen_for_new_connections();
}


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <db_init@plt>
mov    $0x0,%al
call   1030 <listen_for_new_connections@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
push   %rax
xor    %eax,%eax
call   1040 <db_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <listen_for_new_connections@plt>

LLVM IR (-O0):
define void @start() {
%1 = call i32 (...) @db_init()
%2 = call i32 (...) @listen_for_new_connections()
ret void
}

LLVM IR (-O2):
define void @start() {
%1 = tail call i32 (...) @db_init()
%2 = tail call i32 (...) @listen_for_new_connections()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glutSolidRhombicDodecahedron();
void drawSolidRhombicDodecahedron(void) { glutSolidRhombicDodecahedron(); }


x86 assembly (clang, -O0):
<drawSolidRhombicDodecahedron>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glutSolidRhombicDodecahedron@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawSolidRhombicDodecahedron>:
xor    %eax,%eax
jmp    1030 <glutSolidRhombicDodecahedron@plt>

LLVM IR (-O0):
define void @drawSolidRhombicDodecahedron() {
%1 = call i32 (...) @glutSolidRhombicDodecahedron()
ret void
}

LLVM IR (-O2):
define void @drawSolidRhombicDodecahedron() {
%1 = tail call i32 (...) @glutSolidRhombicDodecahedron()
ret void
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int *arr, int start, int end) {
  if (start >= end)
    return;
  int p = partition(arr, start, end);
  quicksort(arr, start, p - 1);
  quicksort(arr, p + 1, end);
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1143 <quicksort+0x23>
jmp    1179 <quicksort+0x59>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sge i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
br label %25
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @partition(i32* %13, i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = load i32, i32* %7
%20 = sub nsw i32 %19, 1
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
br label %25
25: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Type definitions */
typedef double int64_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
double ldexp(double, int);
double UnflattenDouble(double *number, int64_t mantissa, int16_t exponent) {
  const int64_t MAXVAL = 0x7FFFFFFFFFFFFFFF;
  double fractional_mant = ((double)mantissa) / MAXVAL;
  double result = ldexp(fractional_mant, (int)exponent);
  if (number) {
    *number = result;
  }
  return result;
}


x86 assembly (clang, -O0):
<UnflattenDouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  0xed3(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xec1(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
mov    -0x18(%rbp),%rax
mov    %eax,%edi
call   1030 <ldexp@plt>
movsd  %xmm0,-0x30(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1175 <UnflattenDouble+0x65>
movsd  -0x30(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x30(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnflattenDouble>:
push   %rbx
mov    %rdi,%rbx
mulsd  0xee4(%rip),%xmm0
mov    %esi,%edi
call   1030 <ldexp@plt>
test   %rbx,%rbx
je     112c <UnflattenDouble+0x1c>
movsd  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define double @UnflattenDouble(double* %0, double %1, i64 %2) {
%4 = alloca double*
%5 = alloca double
%6 = alloca i64
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double* %0, double** %4
store double %1, double* %5
store i64 %2, i64* %6
store double 0x43E0000000000000, double* %7
%10 = load double, double* %5
%11 = fdiv double %10, 0x43E0000000000000
store double %11, double* %8
%12 = load double, double* %8
%13 = load i64, i64* %6
%14 = trunc i64 %13 to i32
%15 = call double @ldexp(double %12, i32 %14)
store double %15, double* %9
%16 = load double*, double** %4
%17 = icmp ne double* %16, null
br i1 %17, label %18, label %21
18: ; preds = %3
%19 = load double, double* %9
%20 = load double*, double** %4
store double %19, double* %20
br label %21
21: ; preds = %18, %3
%22 = load double, double* %9
ret double %22
}

LLVM IR (-O2):
define double @UnflattenDouble(double* writeonly %0, double %1, i64 %2) {
%4 = fmul double %1, 0x3C00000000000000
%5 = trunc i64 %2 to i32
%6 = tail call double @ldexp(double %4, i32 %5)
%7 = icmp eq double* %0, null
br i1 %7, label %9, label %8
8: ; preds = %3
store double %6, double* %0
br label %9
9: ; preds = %8, %3
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ ddb_list_scripts(int /*<<< orphan*/ *);
int /*<<< orphan*/ usage();
void ddb_scripts(int argc, char *argv[]) {
  if (argc != 1)
    usage();
  ddb_list_scripts(NULL);
}


x86 assembly (clang, -O0):
<ddb_scripts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     1140 <ddb_scripts+0x20>
mov    $0x0,%al
call   1030 <usage@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <ddb_list_scripts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddb_scripts>:
cmp    $0x1,%edi
je     1131 <ddb_scripts+0x11>
push   %rax
xor    %eax,%eax
call   1030 <usage@plt>
add    $0x8,%rsp
xor    %edi,%edi
jmp    1040 <ddb_list_scripts@plt>

LLVM IR (-O0):
define void @ddb_scripts(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 (...) @usage()
br label %9
9: ; preds = %7, %2
%10 = call i32 @ddb_list_scripts(i32* null)
ret void
}

LLVM IR (-O2):
define void @ddb_scripts(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @usage()
br label %6
6: ; preds = %4, %2
%7 = tail call i32 @ddb_list_scripts(i32* null)
ret void
}
int test_imm_70int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x70,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70int64_midword_mem>:
testb  $0x70,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 112
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_70int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7340032
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
double atof(char *);
double str_to_double(char *s) { return atof(s); }


x86 assembly (clang, -O0):
<str_to_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_to_double>:
jmp    1030 <atof@plt>

LLVM IR (-O0):
define double @str_to_double(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @atof(i8* %3)
ret double %4
}

LLVM IR (-O2):
define double @str_to_double(i8* nocapture %0) {
%2 = tail call double @atof(i8* %0)
ret double %2
}