xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_elem(int elem) { printf("%d\n", elem); }


x86 assembly (clang, -O0):
<print_elem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_elem>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @print_elem(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @print_elem(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
int /*<<< orphan*/ access(char *, int /*<<< orphan*/);
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
int gpio_exported(char *pin) {
  char dir[80];
  sprintf(dir, "%sgpio%s/", "/sys/class/gpio/", pin);
  return !access(dir, F_OK);
}


x86 assembly (clang, -O0):
<gpio_exported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x60(%rbp),%rdi
mov    -0x8(%rbp),%rcx
lea    0xec5(%rip),%rsi
lea    0xec8(%rip),%rdx
call   1040 <sprintf@plt>
lea    -0x60(%rbp),%rdi
mov    0x2e86(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_exported>:
push   %rbx
sub    $0x50,%rsp
mov    %rdi,%rcx
lea    0xed1(%rip),%rsi
lea    0xed4(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1030 <access@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%sgpio%s/\00"
@.str.1 = [17 x i8] c"/sys/class/gpio/\00"
@F_OK = global i32 0
define i32 @gpio_exported(i8* %0) {
%2 = alloca i8*
%3 = alloca [80 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%8 = load i32, i32* @F_OK
%9 = call i32 @access(i8* %7, i32 %8)
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@.str = [10 x i8] c"%sgpio%s/\00"
@.str.1 = [17 x i8] c"/sys/class/gpio/\00"
@F_OK = global i32 0
define i32 @gpio_exported(i8* %0) {
%2 = alloca [80 x i8]
%3 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%5 = load i32, i32* @F_OK
%6 = call i32 @access(i8* %3, i32 %5)
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long long);
long long range(int, int);
int main() {
  long long int i;
  for (; i = range(1, 7274);) {
    printf("%d\n", i);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x1c6a,%esi
call   1040 <range@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1161 <main+0x41>
mov    -0x10(%rbp),%rsi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
mov    $0x1c6a,%esi
call   1040 <range@plt>
test   %rax,%rax
je     115f <main+0x3f>
lea    0xec4(%rip),%rbx
nopl   0x0(%rax)
mov    %rbx,%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    $0x1,%edi
mov    $0x1c6a,%esi
call   1040 <range@plt>
test   %rax,%rax
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
br label %3
3: ; preds = %6, %0
%4 = call i64 @range(i32 1, i32 7274)
store i64 %4, i64* %2
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i64, i64* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %7)
br label %3
9: ; preds = %3
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i64 @range(i32 1, i32 7274)
%2 = icmp eq i64 %1, 0
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = phi i64 [ %6, %3 ], [ %1, %0 ]
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %4)
%6 = tail call i64 @range(i32 1, i32 7274)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %0
ret i32 0
}
int scsi_is_wlun(unsigned int lun) { return (lun & 0xff00) == 0xc100; }


x86 assembly (clang, -O0):
<scsi_is_wlun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
cmp    $0xc100,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scsi_is_wlun>:
and    $0xff00,%edi
xor    %eax,%eax
cmp    $0xc100,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @scsi_is_wlun(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = icmp eq i32 %4, 49408
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @scsi_is_wlun(i32 %0) {
%2 = and i32 %0, 65280
%3 = icmp eq i32 %2, 49408
%4 = zext i1 %3 to i32
ret i32 %4
}
const char *get_idstring(void) {
  return "SFMT-19937:122-18-1-11-1:dfffffef-ddfecb7f-bffaffff-bffffff6";
}


x86 assembly (clang, -O0):
<get_idstring>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_idstring>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [61 x i8] c"SFMT-19937:122-18-1-11-1:dfffffef-ddfecb7f-bffaffff-bffffff6\00"
define i8* @get_idstring() {
ret i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [61 x i8] c"SFMT-19937:122-18-1-11-1:dfffffef-ddfecb7f-bffaffff-bffffff6\00"
define i8* @get_idstring() {
ret i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ serial_io_close();
void _signal_handler(int sig) {
  serial_io_close();
  exit(128 + sig);
}


x86 assembly (clang, -O0):
<_signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <serial_io_close@plt>
mov    -0x4(%rbp),%edi
add    $0x80,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<_signal_handler>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <serial_io_close@plt>
sub    $0xffffff80,%ebx
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @_signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @serial_io_close()
%4 = load i32, i32* %2
%5 = add nsw i32 128, %4
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
define void @_signal_handler(i32 %0) {
%2 = tail call i32 (...) @serial_io_close()
%3 = add nsw i32 %0, 128
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ foo(long, long, long, long, long, long, long, long, long,
                       long);
void callfoo() {
  foo((((long)(1) << 1) | 0x00000001), (((long)(2) << 1) | 0x00000001),
      (((long)(3) << 1) | 0x00000001), (((long)(4) << 1) | 0x00000001),
      (((long)(5) << 1) | 0x00000001), (((long)(6) << 1) | 0x00000001),
      (((long)(7) << 1) | 0x00000001), (((long)(8) << 1) | 0x00000001),
      (((long)(9) << 1) | 0x00000001), (((long)(10) << 1) | 0x00000001));
}


x86 assembly (clang, -O0):
<callfoo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x3,%edi
mov    $0x5,%esi
mov    $0x7,%edx
mov    $0x9,%ecx
mov    $0xb,%r8d
mov    $0xd,%r9d
movq   $0xf,(%rsp)
movq   $0x11,0x8(%rsp)
movq   $0x13,0x10(%rsp)
movq   $0x15,0x18(%rsp)
call   1030 <foo@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callfoo>:
push   %rax
mov    $0x3,%edi
mov    $0x5,%esi
mov    $0x7,%edx
mov    $0x9,%ecx
mov    $0xb,%r8d
mov    $0xd,%r9d
push   $0x15
push   $0x13
push   $0x11
push   $0xf
call   1030 <foo@plt>
add    $0x20,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @callfoo() {
%1 = call i32 @foo(i64 3, i64 5, i64 7, i64 9, i64 11, i64 13, i64 15, i64 17, i64 19, i64 21)
ret void
}

LLVM IR (-O2):
define void @callfoo() {
%1 = tail call i32 @foo(i64 3, i64 5, i64 7, i64 9, i64 11, i64 13, i64 15, i64 17, i64 19, i64 21)
ret void
}
int is_cond(unsigned int inst) { return inst >> 29 != 0x7; }


x86 assembly (clang, -O0):
<is_cond>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1d,%eax
cmp    $0x7,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_cond>:
xor    %eax,%eax
cmp    $0xe0000000,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @is_cond(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 29
%5 = icmp ne i32 %4, 7
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_cond(i32 %0) {
%2 = icmp ult i32 %0, -536870912
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Label_Printf(char *, int, char *);
void Source_Line(int line_no, char *cmt) {
  Label_Printf("\t! %6d: %s", line_no, cmt);
}


x86 assembly (clang, -O0):
<Source_Line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
lea    0xed3(%rip),%rdi
call   1030 <Label_Printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Source_Line>:
mov    %rsi,%rdx
mov    %edi,%esi
lea    0xee4(%rip),%rdi
jmp    1030 <Label_Printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\09! %6d: %s\00"
define void @Source_Line(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @Label_Printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"\09! %6d: %s\00"
define void @Source_Line(i32 %0, i8* %1) {
%3 = tail call i32 @Label_Printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1)
ret void
}
/* Variables and functions */
scalar_t__ appIsValid();
int /*<<< orphan*/ bootLoaderLogic();
int /*<<< orphan*/ rf12_sleep();
int /*<<< orphan*/ sleep(long);
void bootLoader() {
  sleep(20);
  for (int backOff = 0;; ++backOff) {
    bootLoaderLogic();
    if (appIsValid())
      rf12_sleep();
    break;
    sleep(100L << (backOff & 0x0F));
  }
}


x86 assembly (clang, -O0):
<bootLoader>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x14,%edi
call   1060 <sleep@plt>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <bootLoaderLogic@plt>
mov    $0x0,%al
call   1030 <appIsValid@plt>
cmp    $0x0,%rax
je     1178 <bootLoader+0x38>
mov    $0x0,%al
call   1050 <rf12_sleep@plt>
jmp    117d <bootLoader+0x3d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bootLoader>:
push   %rax
mov    $0x14,%edi
call   1060 <sleep@plt>
xor    %eax,%eax
call   1040 <bootLoaderLogic@plt>
xor    %eax,%eax
call   1030 <appIsValid@plt>
test   %rax,%rax
je     1166 <bootLoader+0x26>
xor    %eax,%eax
pop    %rcx
jmp    1050 <rf12_sleep@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @bootLoader() {
%1 = alloca i32
%2 = call i32 @sleep(i64 20)
store i32 0, i32* %1
br label %3
3: ; preds = %10, %0
%4 = call i32 (...) @bootLoaderLogic()
%5 = call i64 (...) @appIsValid()
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @rf12_sleep()
br label %9
9: ; preds = %7, %3
br label %13
10: ; No predecessors!
%11 = load i32, i32* %1
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1
br label %3
13: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @bootLoader() {
%1 = tail call i32 @sleep(i64 20)
%2 = tail call i32 (...) @bootLoaderLogic()
%3 = tail call i64 (...) @appIsValid()
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %0
%6 = tail call i32 (...) @rf12_sleep()
br label %7
7: ; preds = %5, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TMR1_DriverIRQHandler();
__attribute__((weak)) void TMR1_IRQHandler(void) { TMR1_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<TMR1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TMR1_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TMR1_IRQHandler>:
xor    %eax,%eax
jmp    1030 <TMR1_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @TMR1_IRQHandler() {
%1 = call i32 (...) @TMR1_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @TMR1_IRQHandler() {
%1 = tail call i32 (...) @TMR1_DriverIRQHandler()
ret void
}
unsigned xrop3_116_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T ^ D;
  stk2 = S | stk3;
  stk1 = D ^ stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_116_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_116_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %ecx,%edx
xor    $0xff,%edx
or     %eax,%edx
xor    $0xff,%edx
xor    %eax,%edi
not    %ecx
and    %edx,%ecx
not    %eax
and    %esi,%eax
or     %edi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_116_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %5
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %5
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = and i32 %32, %33
%35 = load i32, i32* %8
%36 = load i32, i32* %7
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = or i32 %34, %38
%40 = load i32, i32* %7
%41 = load i32, i32* %6
%42 = xor i32 %41, -1
%43 = and i32 %40, %42
%44 = load i32, i32* %5
%45 = and i32 %43, %44
%46 = or i32 %39, %45
ret i32 %46
}

LLVM IR (-O2):
define i32 @xrop3_116_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 255
%8 = or i32 %7, %4
%9 = xor i32 %8, 255
%10 = xor i32 %4, %3
%11 = xor i32 %6, -1
%12 = and i32 %9, %11
%13 = xor i32 %4, -1
%14 = and i32 %13, %5
%15 = or i32 %14, %10
%16 = or i32 %15, %12
ret i32 %16
}
long core___core__Bool___Object__object_id(short int self) {
  long var;
  long var1;
  var1 = (long)self;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Bool___Object__object_id>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswq -0x2(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Bool___Object__object_id>:
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @core___core__Bool___Object__object_id(i16 signext %0) {
%2 = alloca i16
%3 = alloca i64
%4 = alloca i64
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = sext i16 %5 to i64
store i64 %6, i64* %4
%7 = load i64, i64* %4
store i64 %7, i64* %3
br label %8
8: ; preds = %1
%9 = load i64, i64* %3
ret i64 %9
}

LLVM IR (-O2):
define i64 @core___core__Bool___Object__object_id(i16 signext %0) {
%2 = sext i16 %0 to i64
ret i64 %2
}
int Fibonacci(int n) {
  if (n == 0 || n == 1)
    return 1;
  else
    return Fibonacci(n - 1) + Fibonacci(n - 2);
}


x86 assembly (clang, -O0):
<Fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <Fibonacci+0x1f>
cmpl   $0x1,-0x8(%rbp)
jne    113b <Fibonacci+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115e <Fibonacci+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <Fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <Fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jb     1145 <Fibonacci+0x35>
mov    %edi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%edi
call   1030 <Fibonacci@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1130 <Fibonacci+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @Fibonacci(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @Fibonacci(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @Fibonacci(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @Fibonacci(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ overflow(int, int);
int test_not_overflow() {
  return !overflow(0x00000001, 0x00000001) && !overflow(0xFFFFFFFF, 0xFFFFFFFF);
}


x86 assembly (clang, -O0):
<test_not_overflow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <overflow@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x1(%rbp)
jne    114b <test_not_overflow+0x3b>
mov    $0xffffffff,%esi
mov    %esi,%edi
call   1030 <overflow@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_not_overflow>:
push   %rax
mov    $0x1,%edi
mov    $0x1,%esi
call   1030 <overflow@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     112a <test_not_overflow+0x1a>
pop    %rcx
ret
mov    $0xffffffff,%edi
mov    $0xffffffff,%esi
call   1030 <overflow@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_not_overflow() {
%1 = call i32 @overflow(i32 1, i32 1)
%2 = icmp ne i32 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = call i32 @overflow(i32 -1, i32 -1)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
br label %7
7: ; preds = %3, %0
%8 = phi i1 [ false, %0 ], [ %6, %3 ]
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_not_overflow() {
%1 = tail call i32 @overflow(i32 1, i32 1)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i32 @overflow(i32 -1, i32 -1)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ _fail(char const *const, int const);
int /*<<< orphan*/ memory_equal_display_error(char const *, char const *,
                                              size_t const);
void _assert_memory_equal(const void *const a, const void *const b,
                          const size_t size, const char *const file,
                          const int line) {
  if (!memory_equal_display_error((const char *)a, (const char *)b, size)) {
    _fail(file, line);
  }
}


x86 assembly (clang, -O0):
<_assert_memory_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memory_equal_display_error@plt>
cmp    $0x0,%eax
jne    1162 <_assert_memory_equal+0x42>
mov    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1030 <_fail@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_memory_equal>:
push   %rbp
push   %rbx
push   %rax
mov    %r8d,%ebp
mov    %rcx,%rbx
call   1040 <memory_equal_display_error@plt>
test   %eax,%eax
je     1139 <_assert_memory_equal+0x19>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <_fail@plt>

LLVM IR (-O0):
define void @_assert_memory_equal(i8* %0, i8* %1, i64 %2, i8* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = call i32 @memory_equal_display_error(i8* %11, i8* %12, i64 %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %20, label %16
16: ; preds = %5
%17 = load i8*, i8** %9
%18 = load i32, i32* %10
%19 = call i32 @_fail(i8* %17, i32 %18)
br label %20
20: ; preds = %16, %5
ret void
}

LLVM IR (-O2):
define void @_assert_memory_equal(i8* %0, i8* %1, i64 %2, i8* %3, i32 %4) {
%6 = tail call i32 @memory_equal_display_error(i8* %0, i8* %1, i64 %2)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @_fail(i8* %3, i32 %4)
br label %10
10: ; preds = %8, %5
ret void
}
void arm64_check_cache_ecc(void *info) {}


x86 assembly (clang, -O0):
<arm64_check_cache_ecc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm64_check_cache_ecc>:
ret

LLVM IR (-O0):
define void @arm64_check_cache_ecc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @arm64_check_cache_ecc(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int strlen(char *);
long hash(char *word) {
  long a = 42;
  int i;
  for (i = 0; i < strlen(word); i++) {
    a += (word[i] * (i + 1));
  }
  return a;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x2a,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jge    1174 <hash+0x64>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x14(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
cltq
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112b <hash+0x1b>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    $0x2a,%r15d
test   %eax,%eax
jle    1150 <hash+0x40>
xor    %ebx,%ebx
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%eax
add    $0x1,%rbx
imul   %ebx,%eax
cltq
add    %rax,%r15
mov    %r14,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1130 <hash+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 42, i64* %3
store i32 0, i32* %4
br label %5
5: ; preds = %23, %1
%6 = load i32, i32* %4
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %26
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
%19 = mul nsw i32 %16, %18
%20 = sext i32 %19 to i64
%21 = load i64, i64* %3
%22 = add nsw i64 %21, %20
store i64 %22, i64* %3
br label %23
23: ; preds = %10
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %5
%27 = load i64, i64* %3
ret i64 %27
}

LLVM IR (-O2):
define i64 @hash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %18
4: ; preds = %1, %4
%5 = phi i64 [ %10, %4 ], [ 0, %1 ]
%6 = phi i64 [ %14, %4 ], [ 42, %1 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %5
%8 = load i8, i8* %7
%9 = sext i8 %8 to i64
%10 = add nuw nsw i64 %5, 1
%11 = mul i64 %10, %9
%12 = shl i64 %11, 32
%13 = ashr exact i64 %12, 32
%14 = add nsw i64 %6, %13
%15 = tail call i32 @strlen(i8* %0)
%16 = sext i32 %15 to i64
%17 = icmp slt i64 %10, %16
br i1 %17, label %4, label %18
18: ; preds = %4, %1
%19 = phi i64 [ 42, %1 ], [ %14, %4 ]
ret i64 %19
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
char *strlcpy(char *dest, const char *src, size_t l) {
  strncpy(dest, src, l);
  dest[l - 1] = '\0';
  return dest;
}


x86 assembly (clang, -O0):
<strlcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlcpy>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <strncpy@plt>
movb   $0x0,-0x1(%r14,%rbx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strlcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @strncpy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
%12 = load i64, i64* %6
%13 = sub i64 %12, 1
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @strlcpy(i8* returned %0, i8* %1, i64 %2) {
%4 = tail call i32 @strncpy(i8* %0, i8* %1, i64 %2)
%5 = add i64 %2, -1
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int foo[2][4];
  assert(sizeof foo == 8 * sizeof(int));
  assert(sizeof foo[0] == 4 * sizeof(int));
  struct {
    int a[2][2];
    int b;
  } bar;
  bar.b = 1;
  bar.a[1][0] = 2;
  assert(bar.b == 1);
  assert(bar.a[1][0] == 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
movl   $0x1,-0x38(%rbp)
movl   $0x2,-0x40(%rbp)
cmpl   $0x1,-0x38(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x2,-0x40(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.anon = type { [2 x [2 x i32]], i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x [4 x i32]]
%3 = alloca %struct.anon
store i32 0, i32* %1
%4 = call i32 @assert(i32 1)
%5 = call i32 @assert(i32 1)
%6 = getelementptr inbounds %struct.anon, %struct.anon* %3, i32 0, i32 1
store i32 1, i32* %6
%7 = getelementptr inbounds %struct.anon, %struct.anon* %3, i32 0, i32 0
%8 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %7, i64 0, i64 1
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
store i32 2, i32* %9
%10 = getelementptr inbounds %struct.anon, %struct.anon* %3, i32 0, i32 1
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, 1
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = getelementptr inbounds %struct.anon, %struct.anon* %3, i32 0, i32 0
%16 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %15, i64 0, i64 1
%17 = getelementptr inbounds [2 x i32], [2 x i32]* %16, i64 0, i64 0
%18 = load i32, i32* %17
%19 = icmp eq i32 %18, 2
%20 = zext i1 %19 to i32
%21 = call i32 @assert(i32 %20)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
%3 = tail call i32 @assert(i32 1)
%4 = tail call i32 @assert(i32 1)
ret i32 0
}
unsigned xrop3_8_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = D & stk3;
  stk1 = S & stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_8_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_8_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
xor    %edi,%eax
not    %eax
and    %esi,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_8_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = and i32 %31, %32
%34 = load i32, i32* %8
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = or i32 %33, %37
%39 = load i32, i32* %7
%40 = load i32, i32* %6
%41 = xor i32 %40, -1
%42 = and i32 %39, %41
%43 = load i32, i32* %5
%44 = and i32 %42, %43
%45 = or i32 %38, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_8_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = xor i32 %5, -1
%7 = and i32 %6, %3
%8 = xor i32 %4, -1
%9 = and i32 %8, %5
%10 = or i32 %9, %7
ret i32 %10
}
int testLibRequired(void) { return 0; }


x86 assembly (clang, -O0):
<testLibRequired>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testLibRequired>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @testLibRequired() {
ret i32 0
}

LLVM IR (-O2):
define i32 @testLibRequired() {
ret i32 0
}
char *find_first(char *s, char c) {
  char *p = s;
  while (*p && *p != c) {
    ++p;
  }
  return p;
}


x86 assembly (clang, -O0):
<find_first>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x19(%rbp)
je     113e <find_first+0x3e>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    114e <find_first+0x4e>
jmp    115f <find_first+0x5f>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1116 <find_first+0x16>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_first>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
je     1121 <find_first+0x21>
cmp    %sil,%cl
jne    1110 <find_first+0x10>
ret

LLVM IR (-O0):
define i8* @find_first(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %21, %2
%8 = load i8*, i8** %5
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %19
12: ; preds = %7
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %15, %17
br label %19
19: ; preds = %12, %7
%20 = phi i1 [ false, %7 ], [ %18, %12 ]
br i1 %20, label %21, label %24
21: ; preds = %19
%22 = load i8*, i8** %5
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %5
br label %7
24: ; preds = %19
%25 = load i8*, i8** %5
ret i8* %25
}

LLVM IR (-O2):
define i8* @find_first(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %9, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = icmp eq i8 %5, %1
%8 = or i1 %6, %7
%9 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %8, label %10, label %3
10: ; preds = %3
ret i8* %4
}
/* Type definitions */
struct ListNode {
  int dummy;
};

/* Variables and functions */
struct ListNode *createNode(int /*<<< orphan*/);
int /*<<< orphan*/ createStudent(int /*<<< orphan*/);
struct ListNode *unshift(struct ListNode *, struct ListNode *);
int main(void) {
  struct ListNode *studList;
  studList = createNode(createStudent(0));
  studList = unshift(studList, createNode(createStudent(0)));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <createStudent@plt>
mov    %eax,%edi
call   1050 <createNode@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %edi,%edi
call   1030 <createStudent@plt>
mov    %eax,%edi
call   1050 <createNode@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rsi
call   1040 <unshift@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %edi,%edi
call   1030 <createStudent@plt>
mov    %eax,%edi
call   1050 <createNode@plt>
mov    %rax,%rbx
xor    %edi,%edi
call   1030 <createStudent@plt>
mov    %eax,%edi
call   1050 <createNode@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <unshift@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.ListNode = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.ListNode*
store i32 0, i32* %1
%3 = call i32 @createStudent(i32 0)
%4 = call %struct.ListNode* @createNode(i32 %3)
store %struct.ListNode* %4, %struct.ListNode** %2
%5 = load %struct.ListNode*, %struct.ListNode** %2
%6 = call i32 @createStudent(i32 0)
%7 = call %struct.ListNode* @createNode(i32 %6)
%8 = call %struct.ListNode* @unshift(%struct.ListNode* %5, %struct.ListNode* %7)
store %struct.ListNode* %8, %struct.ListNode** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ListNode = type { i32 }
define i32 @main() {
%1 = tail call i32 @createStudent(i32 0)
%2 = tail call %struct.ListNode* @createNode(i32 %1)
%3 = tail call i32 @createStudent(i32 0)
%4 = tail call %struct.ListNode* @createNode(i32 %3)
%5 = tail call %struct.ListNode* @unshift(%struct.ListNode* %2, %struct.ListNode* %4)
ret i32 0
}
int chaz_Integers_machine_is_big_endian(void) {
  long one = 1;
  return !(*((char *)(&one)));
}


x86 assembly (clang, -O0):
<chaz_Integers_machine_is_big_endian>:
push   %rbp
mov    %rsp,%rbp
movq   $0x1,-0x8(%rbp)
cmpb   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_Integers_machine_is_big_endian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @chaz_Integers_machine_is_big_endian() {
%1 = alloca i64
store i64 1, i64* %1
%2 = bitcast i64* %1 to i8*
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @chaz_Integers_machine_is_big_endian() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, void *, unsigned long);
unsigned char mem_copy_from(void *src, char *bytes, unsigned long len) {
  memcpy(bytes, src, len);
  return (1);
}


x86 assembly (clang, -O0):
<mem_copy_from>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_copy_from>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <memcpy@plt>
mov    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @mem_copy_from(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret i8 1
}

LLVM IR (-O2):
define zeroext i8 @mem_copy_from(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %1, i8* %0, i64 %2)
ret i8 1
}
/* Variables and functions */
int ia64_get_cpuid(int);
int pfm_ia64_get_cpu_model(void) {
  return (int)((ia64_get_cpuid(3) >> 16) & 0xff);
}


x86 assembly (clang, -O0):
<pfm_ia64_get_cpu_model>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <ia64_get_cpuid@plt>
sar    $0x10,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfm_ia64_get_cpu_model>:
push   %rax
mov    $0x3,%edi
call   1030 <ia64_get_cpuid@plt>
shr    $0x10,%eax
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pfm_ia64_get_cpu_model() {
%1 = call i32 @ia64_get_cpuid(i32 3)
%2 = ashr i32 %1, 16
%3 = and i32 %2, 255
ret i32 %3
}

LLVM IR (-O2):
define i32 @pfm_ia64_get_cpu_model() {
%1 = tail call i32 @ia64_get_cpuid(i32 3)
%2 = lshr i32 %1, 16
%3 = and i32 %2, 255
ret i32 %3
}
unsigned long uDMAIntStatus(void) {
  return ((*((volatile unsigned long *)(0x400FF000 + 0x00000504))));
}


x86 assembly (clang, -O0):
<uDMAIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400ff504,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAIntStatus>:
mov    0x400ff504,%rax
40
ret

LLVM IR (-O0):
define i64 @uDMAIntStatus() {
%1 = load volatile i64, i64* inttoptr (i64 1074787588 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @uDMAIntStatus() {
%1 = load volatile i64, i64* inttoptr (i64 1074787588 to i64*)
ret i64 %1
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
void addCpy(uint16_t *dst, uint16_t *src, uint16_t *srcNew) {
  while (*src) {
    (*dst)++;
    (*srcNew)++;
    (*src)--;
  }
}


x86 assembly (clang, -O0):
<addCpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     114d <addCpy+0x4d>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,(%rax)
jmp    1110 <addCpy+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<addCpy>:
cmpq   $0x0,(%rsi)
je     111e <addCpy+0x1e>
cs nopw 0x0(%rax,%rax,1)
addq   $0x1,(%rdi)
addq   $0x1,(%rdx)
addq   $0xffffffffffffffff,(%rsi)
jne    1110 <addCpy+0x10>
ret

LLVM IR (-O0):
define void @addCpy(i64* %0, i64* %1, i64* %2) {
%4 = alloca i64*
%5 = alloca i64*
%6 = alloca i64*
store i64* %0, i64** %4
store i64* %1, i64** %5
store i64* %2, i64** %6
br label %7
7: ; preds = %11, %3
%8 = load i64*, i64** %5
%9 = load i64, i64* %8
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i64*, i64** %4
%13 = load i64, i64* %12
%14 = add nsw i64 %13, 1
store i64 %14, i64* %12
%15 = load i64*, i64** %6
%16 = load i64, i64* %15
%17 = add nsw i64 %16, 1
store i64 %17, i64* %15
%18 = load i64*, i64** %5
%19 = load i64, i64* %18
%20 = add nsw i64 %19, -1
store i64 %20, i64* %18
br label %7
21: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @addCpy(i64* nocapture %0, i64* nocapture %1, i64* nocapture %2) {
%4 = load i64, i64* %1
%5 = icmp eq i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = load i64, i64* %0
%8 = add nsw i64 %7, 1
store i64 %8, i64* %0
%9 = load i64, i64* %2
%10 = add nsw i64 %9, 1
store i64 %10, i64* %2
%11 = load i64, i64* %1
%12 = add nsw i64 %11, -1
store i64 %12, i64* %1
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %6
14: ; preds = %6, %3
ret void
}
void do_nested_struct_union_tests(void) {
  struct s_a {
    int a;
  };
  struct s_b {
    int b;
  };
  union u_ab {
    struct s_a a;
    struct s_b b;
  };
  struct ss {
    struct s_a a1;
    struct s_b b1;
    union u_ab u1;
    union {
      struct s_a a2;
      struct s_b b2;
    };
    union {
      struct s_a a3;
      struct s_b b3;
    } u2;
  };
  typedef struct {
    int a;
  } td_s_a;
  typedef struct {
    int b;
  } td_s_b;
  typedef union {
    td_s_a a;
    td_s_b b;
  } td_u_ab;
  struct ss var;
  struct {
    td_u_ab ab;
  } var2;
  struct ss *ss_ptr;
  memset(&var, 0, sizeof(var));
  memset(&var2, 0, sizeof(var2));
  ss_ptr = &var;
  return;
}


x86 assembly (clang, -O0):
<do_nested_struct_union_tests>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x18(%rbp),%rdi
xor    %esi,%esi
mov    $0x14,%edx
call   1030 <memset@plt>
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
lea    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_nested_struct_union_tests>:
ret

LLVM IR (-O0):
%struct.ss = type { %struct.s_a, %struct.s_b, %union.u_ab, %union.anon, %union.anon.0 }
%struct.s_a = type { i32 }
%struct.s_b = type { i32 }
%union.u_ab = type { %struct.s_a }
%union.anon = type { %struct.s_a }
%union.anon.0 = type { %struct.s_a }
%struct.anon = type { %union.td_u_ab }
%union.td_u_ab = type { %struct.td_s_a }
%struct.td_s_a = type { i32 }
define void @do_nested_struct_union_tests() {
%1 = alloca %struct.ss
%2 = alloca %struct.anon
%3 = alloca %struct.ss*
%4 = bitcast %struct.ss* %1 to i8*
%5 = bitcast %struct.anon* %2 to i8*
store %struct.ss* %1, %struct.ss** %3
ret void
}

LLVM IR (-O2):
%struct.ss = type { %struct.s_a, %struct.s_b, %union.u_ab, %union.anon, %union.anon.0 }
%struct.s_a = type { i32 }
%struct.s_b = type { i32 }
%union.u_ab = type { %struct.s_a }
%union.anon = type { %struct.s_a }
%union.anon.0 = type { %struct.s_a }
define void @do_nested_struct_union_tests() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int /*<<< orphan*/ foo2();
void doit() {
  foo();
  foo2();
}


x86 assembly (clang, -O0):
<doit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <foo@plt>
mov    $0x0,%al
call   1030 <foo2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doit>:
push   %rax
xor    %eax,%eax
call   1040 <foo@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <foo2@plt>

LLVM IR (-O0):
define void @doit() {
%1 = call i32 (...) @foo()
%2 = call i32 (...) @foo2()
ret void
}

LLVM IR (-O2):
define void @doit() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo2()
ret void
}
int reflect(int x, int min, int max) {
  return (x >= max) ? (2 * (max - 1) - x) : ((x < min) ? (2 * min - x) : x);
}


x86 assembly (clang, -O0):
<reflect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     112d <reflect+0x2d>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
shl    $0x1,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1156 <reflect+0x56>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114a <reflect+0x4a>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1150 <reflect+0x50>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reflect>:
mov    %edi,%eax
cmp    %edx,%edi
jge    1111 <reflect+0x11>
cmp    %esi,%eax
jge    1110 <reflect+0x10>
add    %esi,%esi
sub    %eax,%esi
mov    %esi,%eax
ret
add    %edx,%edx
sub    %eax,%edx
add    $0xfffffffe,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @reflect(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = icmp sge i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %3
%11 = load i32, i32* %6
%12 = sub nsw i32 %11, 1
%13 = mul nsw i32 2, %12
%14 = load i32, i32* %4
%15 = sub nsw i32 %13, %14
br label %29
16: ; preds = %3
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %25
20: ; preds = %16
%21 = load i32, i32* %5
%22 = mul nsw i32 2, %21
%23 = load i32, i32* %4
%24 = sub nsw i32 %22, %23
br label %27
25: ; preds = %16
%26 = load i32, i32* %4
br label %27
27: ; preds = %25, %20
%28 = phi i32 [ %24, %20 ], [ %26, %25 ]
br label %29
29: ; preds = %27, %10
%30 = phi i32 [ %15, %10 ], [ %28, %27 ]
ret i32 %30
}

LLVM IR (-O2):
define i32 @reflect(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %2
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = shl i32 %2, 1
%7 = sub i32 -2, %0
%8 = add i32 %7, %6
br label %14
9: ; preds = %3
%10 = icmp slt i32 %0, %1
br i1 %10, label %11, label %14
11: ; preds = %9
%12 = shl nsw i32 %1, 1
%13 = sub nsw i32 %12, %0
br label %14
14: ; preds = %9, %11, %5
%15 = phi i32 [ %8, %5 ], [ %13, %11 ], [ %0, %9 ]
ret i32 %15
}