xunge/DecIR huggingface dataset:
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ os_error(char *);
void *xmalloc(size_t n) {
  void *p;
  if (n == 0)
    n = 1;
  p = malloc(n);
  if (p == NULL)
    os_error("Memory allocation failed");
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113f <xmalloc+0x1f>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1163 <xmalloc+0x43>
lea    0xea2(%rip),%rdi
call   1040 <os_error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
test   %rdi,%rdi
mov    $0x1,%eax
cmove  %rax,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1146 <xmalloc+0x26>
lea    0xebf(%rip),%rdi
call   1040 <os_error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Memory allocation failed\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %7
7: ; preds = %6, %1
%8 = load i64, i64* %2
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %14
12: ; preds = %7
%13 = call i32 @os_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %12, %7
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
@.str = [25 x i8] c"Memory allocation failed\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = select i1 %2, i64 1, i64 %0
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @os_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void sleep_ms(int ms) { usleep(ms * 1000); }


x86 assembly (clang, -O0):
<sleep_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_ms>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @sleep_ms(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @sleep_ms(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
void Warning(char *FUNCTION, char *CAUSE) {
  fprintf(stderr, "*** Warning in function %s. Cause: %s.\n", FUNCTION, CAUSE);
}


x86 assembly (clang, -O0):
<Warning>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Warning>:
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
lea    0xeda(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [40 x i8] c"*** Warning in function %s. Cause: %s.\0A\00"
define void @Warning(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [40 x i8] c"*** Warning in function %s. Cause: %s.\0A\00"
define void @Warning(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
int WIFI_POWER_START(void) { return 0; }


x86 assembly (clang, -O0):
<WIFI_POWER_START>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WIFI_POWER_START>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @WIFI_POWER_START() {
ret i32 0
}

LLVM IR (-O2):
define i32 @WIFI_POWER_START() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ preempt_enable();
void __preempt_enable(void *data) { preempt_enable(); }


x86 assembly (clang, -O0):
<__preempt_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <preempt_enable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__preempt_enable>:
xor    %eax,%eax
jmp    1030 <preempt_enable@plt>

LLVM IR (-O0):
define void @__preempt_enable(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @preempt_enable()
ret void
}

LLVM IR (-O2):
define void @__preempt_enable(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @preempt_enable()
ret void
}
/* Variables and functions */
int in_range(uintptr_t val, uintptr_t low, uintptr_t high) {
  return val >= low && val <= high;
}


x86 assembly (clang, -O0):
<in_range>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x19(%rbp)
jb     1131 <in_range+0x31>
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
setbe  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_range>:
cmp    %rsi,%rdi
setae  %al
cmp    %rdx,%rdi
setbe  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @in_range(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = icmp uge i64 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i64, i64* %4
%12 = load i64, i64* %6
%13 = icmp ule i64 %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @in_range(i64 %0, i64 %1, i64 %2) {
%4 = icmp uge i64 %0, %1
%5 = icmp ule i64 %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
size_t lens2sz(uint8_t lens[3]) {
  return (lens[0] << 16) | (lens[1] << 8) || lens[2];
}


x86 assembly (clang, -O0):
<lens2sz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
shl    $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1139 <lens2sz+0x39>
mov    -0x8(%rbp),%rax
cmpl   $0x0,0x8(%rax)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<lens2sz>:
mov    (%rdi),%ecx
mov    0x4(%rdi),%edx
shl    $0x10,%ecx
shl    $0x8,%edx
mov    $0x1,%eax
or     %ecx,%edx
je     1115 <lens2sz+0x15>
ret
xor    %eax,%eax
cmpl   $0x0,0x8(%rdi)
setne  %al
ret

LLVM IR (-O0):
define i64 @lens2sz(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %6, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %18, label %13
13: ; preds = %1
%14 = load i32*, i32** %2
%15 = getelementptr inbounds i32, i32* %14, i64 2
%16 = load i32, i32* %15
%17 = icmp ne i32 %16, 0
br label %18
18: ; preds = %13, %1
%19 = phi i1 [ true, %1 ], [ %17, %13 ]
%20 = zext i1 %19 to i32
%21 = sext i32 %20 to i64
ret i64 %21
}

LLVM IR (-O2):
define i64 @lens2sz(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 16
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = or i32 %6, %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %1
%10 = getelementptr inbounds i32, i32* %0, i64 2
%11 = load i32, i32* %10
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
br label %14
14: ; preds = %9, %1
%15 = phi i64 [ 1, %1 ], [ %13, %9 ]
ret i64 %15
}
/* Type definitions */
struct mcp23017 {
  int dummy;
};
struct hd44780 {
  int dummy;
};
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int /*<<< orphan*/ hd44780WriteByte(struct mcp23017 *, struct hd44780 *, int,
                                    int /*<<< orphan*/);
int /*<<< orphan*/ usleep(int);
int8_t hd44780Clear(struct mcp23017 *mcp23017, struct hd44780 *hd44780) {
  hd44780WriteByte(mcp23017, hd44780, 0x01, 0);
  usleep(1600);
  return 0;
}


x86 assembly (clang, -O0):
<hd44780Clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <hd44780WriteByte@plt>
mov    $0x640,%edi
call   1040 <usleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hd44780Clear>:
push   %rax
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <hd44780WriteByte@plt>
mov    $0x640,%edi
call   1040 <usleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.mcp23017 = type { i32 }
%struct.hd44780 = type { i32 }
define i32 @hd44780Clear(%struct.mcp23017* %0, %struct.hd44780* %1) {
%3 = alloca %struct.mcp23017*
%4 = alloca %struct.hd44780*
store %struct.mcp23017* %0, %struct.mcp23017** %3
store %struct.hd44780* %1, %struct.hd44780** %4
%5 = load %struct.mcp23017*, %struct.mcp23017** %3
%6 = load %struct.hd44780*, %struct.hd44780** %4
%7 = call i32 @hd44780WriteByte(%struct.mcp23017* %5, %struct.hd44780* %6, i32 1, i32 0)
%8 = call i32 @usleep(i32 1600)
ret i32 0
}

LLVM IR (-O2):
%struct.mcp23017 = type { i32 }
%struct.hd44780 = type { i32 }
define i32 @hd44780Clear(%struct.mcp23017* %0, %struct.hd44780* %1) {
%3 = tail call i32 @hd44780WriteByte(%struct.mcp23017* %0, %struct.hd44780* %1, i32 1, i32 0)
%4 = tail call i32 @usleep(i32 1600)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t bcd_to_bin(uint8_t value) {
  return (value & 0x0F) + ((value >> 4) * 10);
}


x86 assembly (clang, -O0):
<bcd_to_bin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
imul   $0xa,%ecx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd_to_bin>:
mov    %edi,%eax
and    $0xf,%eax
sar    $0x4,%edi
lea    (%rdi,%rdi,4),%ecx
lea    (%rax,%rcx,2),%eax
ret

LLVM IR (-O0):
define i32 @bcd_to_bin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
%5 = load i32, i32* %2
%6 = ashr i32 %5, 4
%7 = mul nsw i32 %6, 10
%8 = add nsw i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @bcd_to_bin(i32 %0) {
%2 = and i32 %0, 15
%3 = ashr i32 %0, 4
%4 = mul nsw i32 %3, 10
%5 = add nsw i32 %4, %2
ret i32 %5
}
__attribute__((noreturn)) void fn2(void) { __builtin_abort(); }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<fn2>:
push   %rax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @fn2() {
unreachable
}

LLVM IR (-O2):
define void @fn2() {
tail call void @abort()
unreachable
}
sock_send(s, message) struct SOCK *s;
char *message;
{ return (sock_write(s, message, strlen(message))); }


x86 assembly (clang, -O0):
<sock_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
mov    $0x0,%al
call   1040 <sock_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_send>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <sock_write@plt>

LLVM IR (-O0):
%struct.SOCK = type opaque
define i32 @sock_send(%struct.SOCK* %0, i8* %1) {
%3 = alloca %struct.SOCK*
%4 = alloca i8*
store %struct.SOCK* %0, %struct.SOCK** %3
store i8* %1, i8** %4
%5 = load %struct.SOCK*, %struct.SOCK** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = call i32 (%struct.SOCK*, i8*, i64, ...) bitcast (i32 (...)* @sock_write to i32 (%struct.SOCK*, i8*, i64, ...)*)(%struct.SOCK* %5, i8* %6, i64 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.SOCK = type opaque
define i32 @sock_send(%struct.SOCK* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 (%struct.SOCK*, i8*, i64, ...) bitcast (i32 (...)* @sock_write to i32 (%struct.SOCK*, i8*, i64, ...)*)(%struct.SOCK* %0, i8* %1, i64 %3)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ array;

/* Variables and functions */
int /*<<< orphan*/ array_dump(int *, int);
int /*<<< orphan*/ quick_sort(int *, int);
int main(void) {
  int array[] = {1, 3, 8, 2, 4, 9, 6, 5, 7, 0};
  array_dump(array, sizeof(array) / sizeof(int));
  quick_sort(array, sizeof(array) / sizeof(int));
  array_dump(array, sizeof(array) / sizeof(int));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1040 <array_dump@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1050 <quick_sort@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1040 <array_dump@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    0xef4(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xed8(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebc(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <array_dump@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1040 <quick_sort@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <array_dump@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.array = [10 x i32] [i32 1, i32 3, i32 8, i32 2, i32 4, i32 9, i32 6, i32 5, i32 7, i32 0]
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
store i32 0, i32* %1
%3 = bitcast [10 x i32]* %2 to i8*
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%5 = call i32 @array_dump(i32* %4, i32 10)
%6 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%7 = call i32 @quick_sort(i32* %6, i32 10)
%8 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%9 = call i32 @array_dump(i32* %8, i32 10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.array = [10 x i32] [i32 1, i32 3, i32 8, i32 2, i32 4, i32 9, i32 6, i32 5, i32 7, i32 0]
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @array_dump(i32* %3, i32 10)
%5 = call i32 @quick_sort(i32* %3, i32 10)
%6 = call i32 @array_dump(i32* %3, i32 10)
ret i32 0
}
int fibs(long n) { return (n < 2) ? 1 : (fibs(n - 1) + fibs(n - 2) + 1); }


x86 assembly (clang, -O0):
<fibs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x2,-0x8(%rbp)
jge    1134 <fibs+0x24>
mov    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    115e <fibs+0x4e>
mov    -0x8(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fibs@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fibs@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibs>:
mov    $0x1,%eax
cmp    $0x1,%rdi
jle    1147 <fibs+0x37>
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rdi
call   1030 <fibs@plt>
mov    %eax,%r14d
add    $0xfffffffffffffffe,%rbx
mov    %rbx,%rdi
call   1030 <fibs@plt>
add    %r14d,%eax
add    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fibs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %1
br label %15
6: ; preds = %1
%7 = load i64, i64* %2
%8 = sub nsw i64 %7, 1
%9 = call i32 @fibs(i64 %8)
%10 = load i64, i64* %2
%11 = sub nsw i64 %10, 2
%12 = call i32 @fibs(i64 %11)
%13 = add nsw i32 %9, %12
%14 = add nsw i32 %13, 1
br label %15
15: ; preds = %6, %5
%16 = phi i32 [ 1, %5 ], [ %14, %6 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @fibs(i64 %0) {
%2 = icmp slt i64 %0, 2
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i32 [ %11, %5 ], [ 1, %1 ]
ret i32 %4
5: ; preds = %1
%6 = add nsw i64 %0, -1
%7 = tail call i32 @fibs(i64 %6)
%8 = add nsw i64 %0, -2
%9 = tail call i32 @fibs(i64 %8)
%10 = add i32 %7, 1
%11 = add i32 %10, %9
br label %3
}
int fib(int n) {
  if (n < 2)
    return 1;
  return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fib+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fib(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
unsigned char gfx_inb(int);
int /*<<< orphan*/ gfx_outb(int, unsigned char);
void toggle_Centaurus_9211_clock(void) {
  unsigned char port_val;
  port_val = gfx_inb(0xE0);
  gfx_outb(0xE0, (unsigned char)(port_val | 0x10));
  gfx_outb(0xE0, (unsigned char)(port_val & ~0x10));
}


x86 assembly (clang, -O0):
<toggle_Centaurus_9211_clock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xe0,%edi
call   1030 <gfx_inb@plt>
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
or     $0x10,%eax
mov    $0xe0,%edi
movzbl %al,%esi
call   1040 <gfx_outb@plt>
movzbl -0x1(%rbp),%eax
and    $0xffffffef,%eax
mov    $0xe0,%edi
movzbl %al,%esi
call   1040 <gfx_outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toggle_Centaurus_9211_clock>:
push   %rbx
mov    $0xe0,%edi
call   1030 <gfx_inb@plt>
mov    %eax,%ebx
or     $0x10,%al
movzbl %al,%esi
mov    $0xe0,%edi
call   1040 <gfx_outb@plt>
and    $0xef,%bl
movzbl %bl,%esi
mov    $0xe0,%edi
pop    %rbx
jmp    1040 <gfx_outb@plt>

LLVM IR (-O0):
define void @toggle_Centaurus_9211_clock() {
%1 = alloca i8
%2 = call zeroext i8 @gfx_inb(i32 224)
store i8 %2, i8* %1
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = or i32 %4, 16
%6 = trunc i32 %5 to i8
%7 = call i32 @gfx_outb(i32 224, i8 zeroext %6)
%8 = load i8, i8* %1
%9 = zext i8 %8 to i32
%10 = and i32 %9, -17
%11 = trunc i32 %10 to i8
%12 = call i32 @gfx_outb(i32 224, i8 zeroext %11)
ret void
}

LLVM IR (-O2):
define void @toggle_Centaurus_9211_clock() {
%1 = tail call zeroext i8 @gfx_inb(i32 224)
%2 = or i8 %1, 16
%3 = tail call i32 @gfx_outb(i32 224, i8 zeroext %2)
%4 = and i8 %1, -17
%5 = tail call i32 @gfx_outb(i32 224, i8 zeroext %4)
ret void
}
char *skip_char(const char str[], char c) {
  while (*str == c) {
    str++;
  }
  return (char *)str;
}


x86 assembly (clang, -O0):
<skip_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1132 <skip_char+0x32>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110e <skip_char+0xe>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_char>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
mov    %rax,%rcx
add    $0x1,%rax
cmp    %sil,0x1(%rcx)
je     1110 <skip_char+0x10>
ret

LLVM IR (-O0):
define i8* @skip_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
br label %5
5: ; preds = %12, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8, i8* %4
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %8, %10
br i1 %11, label %12, label %15
12: ; preds = %5
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
br label %5
15: ; preds = %5
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @skip_char(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, %1
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %3, label %8
8: ; preds = %3
ret i8* %4
}
int g(int y) {
  if (y) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111d <g+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <g+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Odd_even_iter(int *, int, int);
void Odd_even_sort(int a[], int n) {
  int phase;
  for (phase = 0; phase < n; phase++) {
    Odd_even_iter(a, n, phase);
  }
}


x86 assembly (clang, -O0):
<Odd_even_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    114f <Odd_even_sort+0x3f>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <Odd_even_iter@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <Odd_even_sort+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Odd_even_sort>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
jle    1133 <Odd_even_sort+0x23>
mov    %esi,%ebx
mov    %rdi,%r14
xor    %ebp,%ebp
nop
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
call   1030 <Odd_even_iter@plt>
add    $0x1,%ebp
cmp    %ebp,%ebx
jne    1120 <Odd_even_sort+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @Odd_even_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = call i32 @Odd_even_iter(i32* %11, i32 %12, i32 %13)
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @Odd_even_sort(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 @Odd_even_iter(i32* %0, i32 %1, i32 %5)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
int reverse(int num) {
  int rev;
  rev = 0;
  while (num > 0) {
    rev = rev * 10 + num % 10;
    num = num / 10;
  }
  return rev;
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1145 <reverse+0x45>
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <reverse+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
xor    %eax,%eax
test   %edi,%edi
jle    1131 <reverse+0x31>
mov    $0xcccccccd,%r8d
nopl   0x0(%rax)
lea    (%rax,%rax,4),%eax
mov    %edi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%esi
lea    (%rsi,%rsi,4),%esi
mov    %edi,%ecx
sub    %esi,%ecx
lea    (%rcx,%rax,2),%eax
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <reverse+0x10>
ret

LLVM IR (-O0):
define i32 @reverse(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %3
%9 = mul nsw i32 %8, 10
%10 = load i32, i32* %2
%11 = srem i32 %10, 10
%12 = add nsw i32 %9, %11
store i32 %12, i32* %3
%13 = load i32, i32* %2
%14 = sdiv i32 %13, 10
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @reverse(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ %0, %1 ]
%6 = mul nsw i32 %4, 10
%7 = urem i32 %5, 10
%8 = add nsw i32 %6, %7
%9 = udiv i32 %5, 10
%10 = icmp ult i32 %5, 10
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
__attribute__((no, noclone)) int fn3(signed char x, unsigned short y,
                                     int *ovf) {
  int res;
  *ovf = __builtin_add_overflow(x, y, &res);
  return res;
}


x86 assembly (clang, -O0):
<fn3>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x4(%rbp),%ax
movsbl %cl,%ecx
movzwl %ax,%eax
add    %eax,%ecx
seto   %al
mov    %ecx,-0x14(%rbp)
and    $0x1,%al
movzbl %al,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn3>:
lea    (%rdi,%rsi,1),%eax
movl   $0x0,(%rdx)
ret

LLVM IR (-O0):
define i32 @fn3(i8 signext %0, i16 zeroext %1, i32* %2) {
%4 = alloca i8
%5 = alloca i16
%6 = alloca i32*
%7 = alloca i32
store i8 %0, i8* %4
store i16 %1, i16* %5
store i32* %2, i32** %6
%8 = load i8, i8* %4
%9 = load i16, i16* %5
%10 = sext i8 %8 to i32
%11 = zext i16 %9 to i32
%12 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %10, i32 %11)
%13 = extractvalue { i32, i1 } %12, 1
%14 = extractvalue { i32, i1 } %12, 0
store i32 %14, i32* %7
%15 = zext i1 %13 to i32
%16 = load i32*, i32** %6
store i32 %15, i32* %16
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @fn3(i8 signext %0, i16 zeroext %1, i32* nocapture writeonly %2) {
%4 = sext i8 %0 to i32
%5 = zext i16 %1 to i32
%6 = add nsw i32 %5, %4
store i32 0, i32* %2
ret i32 %6
}
int next(p)
int p;
{ return ++p; }


x86 assembly (clang, -O0):
<next>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<next>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @next(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @next(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ errnoAbort(char *);
int fork();
int mustFork() {
  int childId = fork();
  if (childId == -1)
    errnoAbort("mustFork: Unable to fork");
  return childId;
}


x86 assembly (clang, -O0):
<mustFork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <fork@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    1148 <mustFork+0x28>
lea    0xebd(%rip),%rdi
call   1030 <errnoAbort@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mustFork>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    113b <mustFork+0x1b>
lea    0xeca(%rip),%rdi
call   1030 <errnoAbort@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"mustFork: Unable to fork\00"
define i32 @mustFork() {
%1 = alloca i32
%2 = call i32 (...) @fork()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @errnoAbort(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [25 x i8] c"mustFork: Unable to fork\00"
define i32 @mustFork() {
%1 = tail call i32 (...) @fork()
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @errnoAbort(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void emit_help(void) {
  fprintf(stderr, "Usage: [-q] ipv4-address\n");
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<emit_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<emit_help>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"Usage: [-q] ipv4-address\0A\00"
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EX_USAGE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"Usage: [-q] ipv4-address\0A\00"
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EX_USAGE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
double julian_increment_minutes(double, int);
double julian_add_minutes(double julian, int minutes) {
  return julian_increment_minutes(julian, minutes);
}


x86 assembly (clang, -O0):
<julian_add_minutes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%edi
call   1030 <julian_increment_minutes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<julian_add_minutes>:
jmp    1030 <julian_increment_minutes@plt>

LLVM IR (-O0):
define double @julian_add_minutes(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* %4
%7 = call double @julian_increment_minutes(double %5, i32 %6)
ret double %7
}

LLVM IR (-O2):
define double @julian_add_minutes(double %0, i32 %1) {
%3 = tail call double @julian_increment_minutes(double %0, i32 %1)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ cjet_free(void *);
void buffered_socket_release(void *this_ptr) { cjet_free(this_ptr); }


x86 assembly (clang, -O0):
<buffered_socket_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cjet_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffered_socket_release>:
jmp    1030 <cjet_free@plt>

LLVM IR (-O0):
define void @buffered_socket_release(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @cjet_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @buffered_socket_release(i8* %0) {
%2 = tail call i32 @cjet_free(i8* %0)
ret void
}
int dns_txt_cmp(const struct dns_txt *a, const struct dns_txt *b) { return -1; }


x86 assembly (clang, -O0):
<dns_txt_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_txt_cmp>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.dns_txt = type opaque
define i32 @dns_txt_cmp(%struct.dns_txt* %0, %struct.dns_txt* %1) {
%3 = alloca %struct.dns_txt*
%4 = alloca %struct.dns_txt*
store %struct.dns_txt* %0, %struct.dns_txt** %3
store %struct.dns_txt* %1, %struct.dns_txt** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.dns_txt = type opaque
define i32 @dns_txt_cmp(%struct.dns_txt* nocapture readnone %0, %struct.dns_txt* nocapture readnone %1) {
ret i32 -1
}
long dbzsize(contents)
long contents;
{
  register long n;
  if (contents <= 0) {
    ;
    ;
    return (120011);
  }
  n = (contents / 2) * 3;
  if (!(n & 01))
    n++;
  ;
  ;
  while (!isprime(n))
    n += 2;
  ;
  ;
  return (n);
}


x86 assembly (clang, -O0):
<dbzsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jg     1134 <dbzsize+0x24>
movq   $0x1d4cb,-0x8(%rbp)
jmp    11a6 <dbzsize+0x96>
mov    -0x10(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
imul   $0x3,%rax,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    1168 <dbzsize+0x58>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    116d <dbzsize+0x5d>
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <isprime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    118d <dbzsize+0x7d>
jmp    119e <dbzsize+0x8e>
mov    -0x18(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x18(%rbp)
jmp    116d <dbzsize+0x5d>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbzsize>:
push   %rbx
test   %rdi,%rdi
jle    1148 <dbzsize+0x38>
shr    %rdi
lea    (%rdi,%rdi,2),%rax
mov    %eax,%ebx
not    %ebx
and    $0x1,%ebx
add    %rax,%rbx
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <isprime@plt>
add    $0x2,%rbx
test   %eax,%eax
je     1130 <dbzsize+0x20>
add    $0xfffffffffffffffe,%rbx
jmp    114d <dbzsize+0x3d>
mov    $0x1d4cb,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @dbzsize(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp sle i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 120011, i64* %2
br label %29
8: ; preds = %1
%9 = load i64, i64* %3
%10 = sdiv i64 %9, 2
%11 = mul nsw i64 %10, 3
store i64 %11, i64* %4
%12 = load i64, i64* %4
%13 = and i64 %12, 1
%14 = icmp ne i64 %13, 0
br i1 %14, label %18, label %15
15: ; preds = %8
%16 = load i64, i64* %4
%17 = add nsw i64 %16, 1
store i64 %17, i64* %4
br label %18
18: ; preds = %15, %8
br label %19
19: ; preds = %24, %18
%20 = load i64, i64* %4
%21 = call i32 (i64, ...) bitcast (i32 (...)* @isprime to i32 (i64, ...)*)(i64 %20)
%22 = icmp ne i32 %21, 0
%23 = xor i1 %22, true
br i1 %23, label %24, label %27
24: ; preds = %19
%25 = load i64, i64* %4
%26 = add nsw i64 %25, 2
store i64 %26, i64* %4
br label %19
27: ; preds = %19
%28 = load i64, i64* %4
store i64 %28, i64* %2
br label %29
29: ; preds = %27, %7
%30 = load i64, i64* %2
ret i64 %30
}

LLVM IR (-O2):
define i64 @dbzsize(i64 %0) {
%2 = icmp slt i64 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = lshr i64 %0, 1
%5 = mul nuw nsw i64 %4, 3
%6 = and i64 %5, 1
%7 = xor i64 %6, 1
%8 = add nuw nsw i64 %7, %5
br label %9
9: ; preds = %9, %3
%10 = phi i64 [ %8, %3 ], [ %13, %9 ]
%11 = tail call i32 (i64, ...) bitcast (i32 (...)* @isprime to i32 (i64, ...)*)(i64 %10)
%12 = icmp eq i32 %11, 0
%13 = add nuw nsw i64 %10, 2
br i1 %12, label %9, label %14
14: ; preds = %9, %1
%15 = phi i64 [ 120011, %1 ], [ %10, %9 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ merge(int, int, int);
void mergeSort(int p, int r) {
  if (p < r) {
    int q = (p + r) / 2;
    mergeSort(p, q);
    mergeSort(q + 1, r);
    merge(p, q, r);
  }
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1172 <mergeSort+0x52>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <mergeSort@plt>
mov    -0xc(%rbp),%edi
add    $0x1,%edi
mov    -0x8(%rbp),%esi
call   1030 <mergeSort@plt>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1040 <merge@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
cmp    %esi,%edi
jge    1160 <mergeSort+0x40>
push   %r15
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%r15d
lea    (%r14,%r15,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%esi
call   1030 <mergeSort@plt>
lea    0x1(%rbx),%edi
mov    %r14d,%esi
call   1030 <mergeSort@plt>
mov    %r15d,%edi
mov    %ebx,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @mergeSort(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %23
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
%13 = sdiv i32 %12, 2
store i32 %13, i32* %5
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
%18 = load i32, i32* %4
%19 = load i32, i32* %3
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = call i32 @merge(i32 %19, i32 %20, i32 %21)
br label %23
23: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %5, label %4
4: ; preds = %2, %5
ret void
5: ; preds = %2
%6 = add nsw i32 %1, %0
%7 = sdiv i32 %6, 2
tail call void @mergeSort(i32 %0, i32 %7)
%8 = add nsw i32 %7, 1
tail call void @mergeSort(i32 %8, i32 %1)
%9 = tail call i32 @merge(i32 %0, i32 %7, i32 %1)
br label %4
}
long long foo5(long long x) { return x ^ 1; }


x86 assembly (clang, -O0):
<foo5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo5>:
mov    %rdi,%rax
xor    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @foo5(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, 1
ret i64 %4
}

LLVM IR (-O2):
define i64 @foo5(i64 %0) {
%2 = xor i64 %0, 1
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(_Bool);
void __DSVERIFIER_assert(_Bool expression) { assert(expression); }


x86 assembly (clang, -O0):
<__DSVERIFIER_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
and    $0x1,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DSVERIFIER_assert>:
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @__DSVERIFIER_assert(i1 zeroext %0) {
%2 = alloca i8
%3 = zext i1 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = trunc i8 %4 to i1
%6 = call i32 @assert(i1 zeroext %5)
ret void
}

LLVM IR (-O2):
define void @__DSVERIFIER_assert(i1 zeroext %0) {
%2 = tail call i32 @assert(i1 zeroext %0)
ret void
}
void foo699(int p) {}


x86 assembly (clang, -O0):
<foo699>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo699>:
ret

LLVM IR (-O0):
define void @foo699(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo699(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
void convert_64_bit_to_byte_array(uint64_t value, uint8_t *data) {
  uint8_t index = 0;
  while (index < 8) {
    data[index++] = value & 0xFF;
    value = value >> 8;
  }
}


x86 assembly (clang, -O0):
<convert_64_bit_to_byte_array>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x8,-0x14(%rbp)
jge    1148 <convert_64_bit_to_byte_array+0x48>
mov    -0x4(%rbp),%edx
and    $0xff,%edx
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    %ecx,%esi
add    $0x1,%esi
mov    %esi,-0x14(%rbp)
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
jmp    1112 <convert_64_bit_to_byte_array+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_64_bit_to_byte_array>:
mov    %edi,%eax
movzbl %al,%ecx
mov    %ecx,(%rsi)
movzbl %ah,%ecx
mov    %ecx,0x4(%rsi)
mov    %edi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x8(%rsi)
mov    %edi,%ecx
shr    $0x18,%ecx
mov    %ecx,0xc(%rsi)
sar    $0x1f,%eax
movzbl %al,%eax
movd   %eax,%xmm0
pshufd $0x0,%xmm0,%xmm0
movdqu %xmm0,0x10(%rsi)
ret

LLVM IR (-O0):
define void @convert_64_bit_to_byte_array(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 0, i32* %5
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 8
br i1 %8, label %9, label %19
9: ; preds = %6
%10 = load i32, i32* %3
%11 = and i32 %10, 255
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i32, i32* %12, i64 %15
store i32 %11, i32* %16
%17 = load i32, i32* %3
%18 = ashr i32 %17, 8
store i32 %18, i32* %3
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @convert_64_bit_to_byte_array(i32 %0, i32* nocapture writeonly %1) {
%3 = and i32 %0, 255
store i32 %3, i32* %1
%4 = lshr i32 %0, 8
%5 = and i32 %4, 255
%6 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %5, i32* %6
%7 = lshr i32 %0, 16
%8 = and i32 %7, 255
%9 = getelementptr inbounds i32, i32* %1, i64 2
store i32 %8, i32* %9
%10 = lshr i32 %0, 24
%11 = getelementptr inbounds i32, i32* %1, i64 3
store i32 %10, i32* %11
%12 = icmp slt i32 %0, 0
%13 = select i1 %12, i32 255, i32 0
%14 = getelementptr inbounds i32, i32* %1, i64 4
%15 = insertelement <4 x i32> poison, i32 %13, i64 0
%16 = shufflevector <4 x i32> %15, <4 x i32> poison, <4 x i32> zeroinitializer
%17 = bitcast i32* %14 to <4 x i32>*
store <4 x i32> %16, <4 x i32>* %17
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ReadSEQ(int);
extern void SetNewMode(void) { ReadSEQ(0xB); }


x86 assembly (clang, -O0):
<SetNewMode>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%edi
call   1030 <ReadSEQ@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetNewMode>:
mov    $0xb,%edi
jmp    1030 <ReadSEQ@plt>

LLVM IR (-O0):
define void @SetNewMode() {
%1 = call i32 @ReadSEQ(i32 11)
ret void
}

LLVM IR (-O2):
define void @SetNewMode() {
%1 = tail call i32 @ReadSEQ(i32 11)
ret void
}
/* Variables and functions */
scalar_t__ strdup(char const *);
void *df(void *i) { return (void *)strdup((const char *)i); }


x86 assembly (clang, -O0):
<df>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strdup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<df>:
jmp    1030 <strdup@plt>

LLVM IR (-O0):
define i8* @df(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strdup(i8* %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @df(i8* %0) {
%2 = tail call i64 @strdup(i8* %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ swap(int *, int, int);
void shuffle(int array[], int size) {
  for (int i = size - 1; i > 0; i--) {
    int j = rand() % (i + 1);
    swap(array, i, j);
  }
}


x86 assembly (clang, -O0):
<shuffle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1172 <shuffle+0x52>
mov    $0x0,%al
call   1040 <rand@plt>
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <swap@plt>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1138 <shuffle+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shuffle>:
push   %rbp
push   %r14
push   %rbx
cmp    $0x2,%esi
jl     114e <shuffle+0x2e>
mov    %esi,%ebx
mov    %rdi,%r14
xchg   %ax,%ax
xor    %eax,%eax
call   1040 <rand@plt>
cltd
idiv   %ebx
lea    -0x1(%rbx),%ebp
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <swap@plt>
cmp    $0x2,%ebx
mov    %ebp,%ebx
ja     1130 <shuffle+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @shuffle(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %5
br label %9
9: ; preds = %21, %2
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %24
12: ; preds = %9
%13 = call i32 (...) @rand()
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
%16 = srem i32 %13, %15
store i32 %16, i32* %6
%17 = load i32*, i32** %3
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = call i32 @swap(i32* %17, i32 %18, i32 %19)
br label %21
21: ; preds = %12
%22 = load i32, i32* %5
%23 = add nsw i32 %22, -1
store i32 %23, i32* %5
br label %9
24: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @shuffle(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %5, label %4
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i32 [ %7, %5 ], [ %1, %2 ]
%7 = add nsw i32 %6, -1
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, %6
%10 = tail call i32 @swap(i32* %0, i32 %7, i32 %9)
%11 = icmp ugt i32 %6, 2
br i1 %11, label %5, label %4
}
/* Variables and functions */
int /*<<< orphan*/ __span_free(void *);
void span_free(void *ptr) { __span_free(ptr); }


x86 assembly (clang, -O0):
<span_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__span_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<span_free>:
jmp    1030 <__span_free@plt>

LLVM IR (-O0):
define void @span_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__span_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @span_free(i8* %0) {
%2 = tail call i32 @__span_free(i8* %0)
ret void
}
void gtk_tree_view_column_set_fixed_width() {}


x86 assembly (clang, -O0):
<gtk_tree_view_column_set_fixed_width>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_column_set_fixed_width>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_column_set_fixed_width() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_column_set_fixed_width() {
ret void
}