xunge/DecIR huggingface dataset:
float ScalePointX(float x, float centerX, float scale) {
  return (scale * (x - centerX)) + centerX;
}


x86 assembly (clang, -O0):
<ScalePointX>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
subss  -0x8(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScalePointX>:
subss  %xmm1,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @ScalePointX(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %6
%8 = load float, float* %4
%9 = load float, float* %5
%10 = fsub float %8, %9
%11 = load float, float* %5
%12 = call float @llvm.fmuladd.f32(float %7, float %10, float %11)
ret float %12
}

LLVM IR (-O2):
define float @ScalePointX(float %0, float %1, float %2) {
%4 = fsub float %0, %1
%5 = tail call float @llvm.fmuladd.f32(float %2, float %4, float %1)
ret float %5
}
/* Type definitions */
typedef int gid_t;

/* Variables and functions */
int /*<<< orphan*/ EPERM;
int /*<<< orphan*/ errno;
int setegid(gid_t egid) {
  if (egid == 1)
    return 0;
  errno = EPERM;
  return -1;
}


x86 assembly (clang, -O0):
<setegid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <setegid+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1136 <setegid+0x36>
mov    0x2eac(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb3(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setegid>:
xor    %eax,%eax
cmp    $0x1,%edi
je     111e <setegid+0x1e>
mov    0x2ec2(%rip),%rax
mov    (%rax),%eax
mov    0x2ec9(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EPERM = global i32 0
@errno = global i32 0
define i32 @setegid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %9
7: ; preds = %1
%8 = load i32, i32* @EPERM
store i32 %8, i32* @errno
store i32 -1, i32* %2
br label %9
9: ; preds = %7, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@EPERM = global i32 0
@errno = global i32 0
define i32 @setegid(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = load i32, i32* @EPERM
store i32 %4, i32* @errno
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ -1, %3 ], [ 0, %1 ]
ret i32 %6
}
int GC_get_heap_size(void) { return 0x10000000; }


x86 assembly (clang, -O0):
<GC_get_heap_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GC_get_heap_size>:
mov    $0x10000000,%eax
ret

LLVM IR (-O0):
define i32 @GC_get_heap_size() {
ret i32 268435456
}

LLVM IR (-O2):
define i32 @GC_get_heap_size() {
ret i32 268435456
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_BLOCK;
int /*<<< orphan*/ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *);
int sigset_get_old_mask(int /*<<< orphan*/ *);
int /*<<< orphan*/ sigset_set_old_mask(int /*<<< orphan*/ *, int);
int sigblock(int mask) {
  sigset_t set, oset;
  sigset_set_old_mask(&set, mask);
  sigprocmask(SIG_BLOCK, &set, &oset);
  return sigset_get_old_mask(&oset);
}


x86 assembly (clang, -O0):
<sigblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    -0x8(%rbp),%rdi
call   1050 <sigset_set_old_mask@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <sigprocmask@plt>
lea    -0xc(%rbp),%rdi
call   1040 <sigset_get_old_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigblock>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%esi
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1050 <sigset_set_old_mask@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rbx
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <sigprocmask@plt>
mov    %rbx,%rdi
call   1040 <sigset_get_old_mask@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@SIG_BLOCK = global i32 0
define i32 @sigblock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @sigset_set_old_mask(i32* %3, i32 %5)
%7 = load i32, i32* @SIG_BLOCK
%8 = call i32 @sigprocmask(i32 %7, i32* %3, i32* %4)
%9 = call i32 @sigset_get_old_mask(i32* %4)
ret i32 %9
}

LLVM IR (-O2):
@SIG_BLOCK = global i32 0
define i32 @sigblock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = call i32 @sigset_set_old_mask(i32* %2, i32 %0)
%7 = load i32, i32* @SIG_BLOCK
%8 = call i32 @sigprocmask(i32 %7, i32* %2, i32* %3)
%9 = call i32 @sigset_get_old_mask(i32* %3)
ret i32 %9
}
int gcd(int num, int denom) {
  if (denom == 0) {
    return num;
  }
  return gcd(denom, num % denom);
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1133 <gcd+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1147 <gcd+0x37>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = srem i32 %12, %13
%15 = call i32 @gcd(i32 %11, i32 %14)
store i32 %15, i32* %3
br label %16
16: ; preds = %10, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
scalar_t__ KIONIX_ACCEL_read_bytes(int, char *, int);
int KIONIX_ACCEL_read_interrupt_status(void) {
  int interrupt_status;
  char status_reg;
  if (KIONIX_ACCEL_read_bytes(0x18, &status_reg, 1) == 0) {
    if ((status_reg & 0x10) == 0x00) {
      interrupt_status = 1;
    } else
      interrupt_status = 0;
  } else
    interrupt_status = 1;
  return interrupt_status;
}


x86 assembly (clang, -O0):
<KIONIX_ACCEL_read_interrupt_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x18,%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <KIONIX_ACCEL_read_bytes@plt>
cmp    $0x0,%rax
jne    115d <KIONIX_ACCEL_read_interrupt_status+0x4d>
movsbl -0x5(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
jne    1151 <KIONIX_ACCEL_read_interrupt_status+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1158 <KIONIX_ACCEL_read_interrupt_status+0x48>
movl   $0x0,-0x4(%rbp)
jmp    1164 <KIONIX_ACCEL_read_interrupt_status+0x54>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KIONIX_ACCEL_read_interrupt_status>:
push   %rbx
sub    $0x10,%rsp
lea    0xf(%rsp),%rsi
mov    $0x1,%ebx
mov    $0x18,%edi
mov    $0x1,%edx
call   1030 <KIONIX_ACCEL_read_bytes@plt>
movzbl 0xf(%rsp),%edx
xor    %ecx,%ecx
test   $0x10,%dl
sete   %cl
test   %rax,%rax
cmovne %ebx,%ecx
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @KIONIX_ACCEL_read_interrupt_status() {
%1 = alloca i32
%2 = alloca i8
%3 = call i64 @KIONIX_ACCEL_read_bytes(i32 24, i8* %2, i32 1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %13
5: ; preds = %0
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = and i32 %7, 16
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5
store i32 1, i32* %1
br label %12
11: ; preds = %5
store i32 0, i32* %1
br label %12
12: ; preds = %11, %10
br label %14
13: ; preds = %0
store i32 1, i32* %1
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @KIONIX_ACCEL_read_interrupt_status() {
%1 = alloca i8
%2 = call i64 @KIONIX_ACCEL_read_bytes(i32 24, i8* %1, i32 1)
%3 = icmp eq i64 %2, 0
%4 = load i8, i8* %1
%5 = lshr i8 %4, 4
%6 = and i8 %5, 1
%7 = xor i8 %6, 1
%8 = zext i8 %7 to i32
%9 = select i1 %3, i32 %8, i32 1
ret i32 %9
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ test_single(int, int);
int main(int argc, char **argv) {
  int max = argc > 1 ? atoi(argv[1]) : 64 * 1024;
  test_single(max, 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1155 <main+0x35>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x18(%rbp)
jmp    1162 <main+0x42>
mov    $0x10000,%eax
mov    %eax,-0x18(%rbp)
jmp    1162 <main+0x42>
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x1,%esi
call   1040 <test_single@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %edi,%eax
mov    $0x10000,%edi
cmp    $0x2,%eax
jl     1138 <main+0x18>
mov    0x8(%rsi),%rdi
call   1030 <atoi@plt>
mov    %eax,%edi
mov    $0x1,%esi
call   1040 <test_single@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
br label %15
14: ; preds = %2
br label %15
15: ; preds = %14, %9
%16 = phi i32 [ %13, %9 ], [ 65536, %14 ]
store i32 %16, i32* %6
%17 = load i32, i32* %6
%18 = call i32 @test_single(i32 %17, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 65536, %2 ]
%10 = tail call i32 @test_single(i32 %9, i32 1)
ret i32 0
}
/* Variables and functions */
long diffsec(int, int, int, int /*<<< orphan*/, int /*<<< orphan*/,
             int /*<<< orphan*/, int, int, int, int /*<<< orphan*/,
             int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, long);
int main(int argc, char **argv) {
  long sec;
  sec = diffsec(2012, 7, 8, 0, 0, 0, 2012, 9, 10, 0, 0, 0);
  printf("%ld\n", sec);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x7dc,%edi
mov    $0x7,%esi
mov    $0x8,%edx
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
movl   $0x7dc,(%rsp)
movl   $0x9,0x8(%rsp)
movl   $0xa,0x10(%rsp)
movl   $0x0,0x18(%rsp)
movl   $0x0,0x20(%rsp)
movl   $0x0,0x28(%rsp)
call   1030 <diffsec@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xe6f(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7dc,%edi
mov    $0x7,%esi
mov    $0x8,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
push   $0x0
push   $0x0
push   $0x0
push   $0xa
push   $0x9
push   $0x7dc
call   1030 <diffsec@plt>
add    $0x30,%rsp
lea    0xea9(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i64 @diffsec(i32 2012, i32 7, i32 8, i32 0, i32 0, i32 0, i32 2012, i32 9, i32 10, i32 0, i32 0, i32 0)
store i64 %7, i64* %6
%8 = load i64, i64* %6
%9 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @diffsec(i32 2012, i32 7, i32 8, i32 0, i32 0, i32 0, i32 2012, i32 9, i32 10, i32 0, i32 0, i32 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ rtx_dbug_out_char(int /*<<< orphan*/);
signed long int rtx_dbug_outs(char *s) {
  if (s == 0) {
    return -1;
  }
  while (*s != '\0') {
    rtx_dbug_out_char(*s++);
  }
  return 0;
}


x86 assembly (clang, -O0):
<rtx_dbug_outs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <rtx_dbug_outs+0x24>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    116d <rtx_dbug_outs+0x5d>
jmp    1139 <rtx_dbug_outs+0x29>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1165 <rtx_dbug_outs+0x55>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
call   1030 <rtx_dbug_out_char@plt>
jmp    1139 <rtx_dbug_outs+0x29>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtx_dbug_outs>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     1145 <rtx_dbug_outs+0x35>
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     114e <rtx_dbug_outs+0x3e>
add    $0x1,%rbx
xor    %r14d,%r14d
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <rtx_dbug_out_char@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <rtx_dbug_outs+0x20>
jmp    1151 <rtx_dbug_outs+0x41>
mov    $0xffffffffffffffff,%r14
jmp    1151 <rtx_dbug_outs+0x41>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @rtx_dbug_outs(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 -1, i64* %2
br label %20
7: ; preds = %1
br label %8
8: ; preds = %13, %7
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %8
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = call i32 @rtx_dbug_out_char(i32 %17)
br label %8
19: ; preds = %8
store i64 0, i64* %2
br label %20
20: ; preds = %19, %6
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
define i64 @rtx_dbug_outs(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = phi i8 [ %12, %6 ], [ %4, %3 ]
%8 = phi i8* [ %10, %6 ], [ %0, %3 ]
%9 = sext i8 %7 to i32
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = tail call i32 @rtx_dbug_out_char(i32 %9)
%12 = load i8, i8* %10
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %6
14: ; preds = %6, %3, %1
%15 = phi i64 [ -1, %1 ], [ 0, %3 ], [ 0, %6 ]
ret i64 %15
}
int oa_end_vector(struct oarchive *oa, const char *tag) { return 0; }


x86 assembly (clang, -O0):
<oa_end_vector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oa_end_vector>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.oarchive = type opaque
define i32 @oa_end_vector(%struct.oarchive* %0, i8* %1) {
%3 = alloca %struct.oarchive*
%4 = alloca i8*
store %struct.oarchive* %0, %struct.oarchive** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
%struct.oarchive = type opaque
define i32 @oa_end_vector(%struct.oarchive* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_goldfish_pic();
void module_init() { init_goldfish_pic(); }


x86 assembly (clang, -O0):
<module_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_goldfish_pic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_init>:
xor    %eax,%eax
jmp    1030 <init_goldfish_pic@plt>

LLVM IR (-O0):
define void @module_init() {
%1 = call i32 (...) @init_goldfish_pic()
ret void
}

LLVM IR (-O2):
define void @module_init() {
%1 = tail call i32 (...) @init_goldfish_pic()
ret void
}
double INtoM(double IN) { return IN * 0.0254; }


x86 assembly (clang, -O0):
<INtoM>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<INtoM>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @INtoM(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 2.540000e-02
ret double %4
}

LLVM IR (-O2):
define double @INtoM(double %0) {
%2 = fmul double %0, 2.540000e-02
ret double %2
}
/* Variables and functions */
int func_add_sub(int, int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("add = %d\n", func_add_sub(0, 6, 4));
  printf("sub = %d\n", func_add_sub(1, 6, 4));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x6,%esi
mov    $0x4,%edx
call   1040 <func_add_sub@plt>
mov    %eax,%esi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
mov    $0x6,%esi
mov    $0x4,%edx
call   1040 <func_add_sub@plt>
mov    %eax,%esi
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x6,%esi
mov    $0x4,%edx
call   1040 <func_add_sub@plt>
lea    0xec7(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    $0x1,%edi
mov    $0x6,%esi
mov    $0x4,%edx
call   1040 <func_add_sub@plt>
lea    0xeaf(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"add = %d\0A\00"
@.str.1 = [10 x i8] c"sub = %d\0A\00"
define i32 @main() {
%1 = call i32 @func_add_sub(i32 0, i32 6, i32 4)
%2 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @func_add_sub(i32 1, i32 6, i32 4)
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"add = %d\0A\00"
@.str.1 = [10 x i8] c"sub = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @func_add_sub(i32 0, i32 6, i32 4)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @func_add_sub(i32 1, i32 6, i32 4)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}
int jsw_cmp_int(const void *a, const void *b) {
  const int *ua = a;
  const int *ub = b;
  return ((*ua) < (*ub) ? -1 : (*ua) > (*ub));
}


x86 assembly (clang, -O0):
<jsw_cmp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%eax
jge    113b <jsw_cmp_int+0x3b>
mov    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
jmp    1152 <jsw_cmp_int+0x52>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsw_cmp_int>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @jsw_cmp_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = icmp slt i32 %12, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %24
17: ; preds = %2
%18 = load i32*, i32** %5
%19 = load i32, i32* %18
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = icmp sgt i32 %19, %21
%23 = zext i1 %22 to i32
br label %24
24: ; preds = %17, %16
%25 = phi i32 [ -1, %16 ], [ %23, %17 ]
ret i32 %25
}

LLVM IR (-O2):
define i32 @jsw_cmp_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = icmp sgt i32 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
void send_user_interrupt(int intrsrc) {}


x86 assembly (clang, -O0):
<send_user_interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_user_interrupt>:
ret

LLVM IR (-O0):
define void @send_user_interrupt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @send_user_interrupt(i32 %0) {
ret void
}
int nvg__mini(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<nvg__mini>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <nvg__mini+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <nvg__mini+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvg__mini>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @nvg__mini(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @nvg__mini(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void pivm_destructor_error(void) {
  fprintf(stderr, "DestructorException\n");
  abort();
}


x86 assembly (clang, -O0):
<pivm_destructor_error>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<pivm_destructor_error>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"DestructorException\0A\00"
define void @pivm_destructor_error() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"DestructorException\0A\00"
define void @pivm_destructor_error() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_network_get_operational_state(char **state) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_network_get_operational_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_network_get_operational_state>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_network_get_operational_state(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_network_get_operational_state(i8** nocapture readnone %0) {
%2 = load i32, i32* @EINVAL
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void txfree(void *ptr) {
  if (ptr)
    free(ptr);
}


x86 assembly (clang, -O0):
<txfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <txfree+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txfree>:
test   %rdi,%rdi
je     111a <txfree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @txfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @txfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void CRYPTO_mem_leaks_fp(FILE *fp) { return; }


x86 assembly (clang, -O0):
<CRYPTO_mem_leaks_fp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_mem_leaks_fp>:
ret

LLVM IR (-O0):
define void @CRYPTO_mem_leaks_fp(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @CRYPTO_mem_leaks_fp(i32* nocapture %0) {
ret void
}
int pRec3(int argc) { return (argc == 3); }


x86 assembly (clang, -O0):
<pRec3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pRec3>:
xor    %eax,%eax
cmp    $0x3,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @pRec3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @pRec3(i32 %0) {
%2 = icmp eq i32 %0, 3
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct wl_resource {
  int dummy;
};
struct wl_client {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_resource_destroy(struct wl_resource *);
void shm_buffer_destroy(struct wl_client *client,
                        struct wl_resource *resource) {
  wl_resource_destroy(resource);
}


x86 assembly (clang, -O0):
<shm_buffer_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <wl_resource_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shm_buffer_destroy>:
mov    %rsi,%rdi
jmp    1030 <wl_resource_destroy@plt>

LLVM IR (-O0):
%struct.wl_client = type { i32 }
%struct.wl_resource = type { i32 }
define void @shm_buffer_destroy(%struct.wl_client* %0, %struct.wl_resource* %1) {
%3 = alloca %struct.wl_client*
%4 = alloca %struct.wl_resource*
store %struct.wl_client* %0, %struct.wl_client** %3
store %struct.wl_resource* %1, %struct.wl_resource** %4
%5 = load %struct.wl_resource*, %struct.wl_resource** %4
%6 = call i32 @wl_resource_destroy(%struct.wl_resource* %5)
ret void
}

LLVM IR (-O2):
%struct.wl_client = type { i32 }
%struct.wl_resource = type { i32 }
define void @shm_buffer_destroy(%struct.wl_client* nocapture readnone %0, %struct.wl_resource* %1) {
%3 = tail call i32 @wl_resource_destroy(%struct.wl_resource* %1)
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRC8_get(void) { return U_WMRCORENONE_get("U_WMRC8"); }


x86 assembly (clang, -O0):
<U_WMRC8_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRC8_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRC8\00"
define i32 @U_WMRC8_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRC8\00"
define i32 @U_WMRC8_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Type definitions */
struct qconfig {
  int dummy;
};

/* Variables and functions */
int qaoed_devices(struct qconfig *);
int qaoed_network(struct qconfig *);
int /*<<< orphan*/ qaoed_startapi(struct qconfig *);
int qaoed_startup(struct qconfig *conf) {
  if (qaoed_devices(conf) == -1)
    return (-1);
  if (qaoed_network(conf) == -1)
    return (-1);
  qaoed_startapi(conf);
  return (0);
}


x86 assembly (clang, -O0):
<qaoed_startup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <qaoed_devices@plt>
cmp    $0xffffffff,%eax
jne    115a <qaoed_startup+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <qaoed_startup+0x58>
mov    -0x10(%rbp),%rdi
call   1040 <qaoed_network@plt>
cmp    $0xffffffff,%eax
jne    1178 <qaoed_startup+0x48>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <qaoed_startup+0x58>
mov    -0x10(%rbp),%rdi
call   1030 <qaoed_startapi@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qaoed_startup>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1050 <qaoed_devices@plt>
mov    $0xffffffff,%ebp
cmp    $0xffffffff,%eax
je     115c <qaoed_startup+0x2c>
mov    %rbx,%rdi
call   1040 <qaoed_network@plt>
cmp    $0xffffffff,%eax
je     115c <qaoed_startup+0x2c>
mov    %rbx,%rdi
call   1030 <qaoed_startapi@plt>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.qconfig = type { i32 }
define i32 @qaoed_startup(%struct.qconfig* %0) {
%2 = alloca i32
%3 = alloca %struct.qconfig*
store %struct.qconfig* %0, %struct.qconfig** %3
%4 = load %struct.qconfig*, %struct.qconfig** %3
%5 = call i32 @qaoed_devices(%struct.qconfig* %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %16
8: ; preds = %1
%9 = load %struct.qconfig*, %struct.qconfig** %3
%10 = call i32 @qaoed_network(%struct.qconfig* %9)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 -1, i32* %2
br label %16
13: ; preds = %8
%14 = load %struct.qconfig*, %struct.qconfig** %3
%15 = call i32 @qaoed_startapi(%struct.qconfig* %14)
store i32 0, i32* %2
br label %16
16: ; preds = %13, %12, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
%struct.qconfig = type { i32 }
define i32 @qaoed_startup(%struct.qconfig* %0) {
%2 = tail call i32 @qaoed_devices(%struct.qconfig* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = tail call i32 @qaoed_network(%struct.qconfig* %0)
%6 = icmp eq i32 %5, -1
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @qaoed_startapi(%struct.qconfig* %0)
br label %9
9: ; preds = %4, %1, %7
%10 = phi i32 [ 0, %7 ], [ -1, %1 ], [ -1, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, double, double,
                           int);
int /*<<< orphan*/ stderr;
void progress_pcg_v2(char *form, int in0, double in1, double in2, double in3,
                     double in4, double in5, int in6, double in7, int in8) {
  fprintf(stderr, form, in0, in1, in2, in8);
}


x86 assembly (clang, -O0):
<progress_pcg_v2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
movsd  %xmm2,-0x28(%rbp)
movsd  %xmm3,-0x30(%rbp)
movsd  %xmm4,-0x38(%rbp)
mov    %edx,-0x3c(%rbp)
movsd  %xmm5,-0x48(%rbp)
mov    %ecx,-0x4c(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
mov    -0x4c(%rbp),%ecx
call   1030 <fprintf@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<progress_pcg_v2>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @progress_pcg_v2(i8* %0, i32 %1, double %2, double %3, double %4, double %5, double %6, i32 %7, double %8, i32 %9) {
%11 = alloca i8*
%12 = alloca i32
%13 = alloca double
%14 = alloca double
%15 = alloca double
%16 = alloca double
%17 = alloca double
%18 = alloca i32
%19 = alloca double
%20 = alloca i32
store i8* %0, i8** %11
store i32 %1, i32* %12
store double %2, double* %13
store double %3, double* %14
store double %4, double* %15
store double %5, double* %16
store double %6, double* %17
store i32 %7, i32* %18
store double %8, double* %19
store i32 %9, i32* %20
%21 = load i32, i32* @stderr
%22 = load i8*, i8** %11
%23 = load i32, i32* %12
%24 = load double, double* %13
%25 = load double, double* %14
%26 = load i32, i32* %20
%27 = call i32 @fprintf(i32 %21, i8* %22, i32 %23, double %24, double %25, i32 %26)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @progress_pcg_v2(i8* %0, i32 %1, double %2, double %3, double %4, double %5, double %6, i32 %7, double %8, i32 %9) {
%11 = load i32, i32* @stderr
%12 = tail call i32 @fprintf(i32 %11, i8* %0, i32 %1, double %2, double %3, i32 %9)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_CRLID;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_CRLID_it;
int i2d_OCSP_CRLID(OCSP_CRLID *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &OCSP_CRLID_it);
}


x86 assembly (clang, -O0):
<i2d_OCSP_CRLID>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_OCSP_CRLID>:
mov    0x2ec9(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@OCSP_CRLID_it = global i32 0
define i32 @i2d_OCSP_CRLID(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @OCSP_CRLID_it)
ret i32 %7
}

LLVM IR (-O2):
@OCSP_CRLID_it = global i32 0
define i32 @i2d_OCSP_CRLID(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @OCSP_CRLID_it)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ glmFloor3f(float *, float *);
void glmFloor3f_(float x[3]) { glmFloor3f(x, x); }


x86 assembly (clang, -O0):
<glmFloor3f_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <glmFloor3f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmFloor3f_>:
mov    %rdi,%rsi
jmp    1030 <glmFloor3f@plt>

LLVM IR (-O0):
define void @glmFloor3f_(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float*, float** %2
%5 = call i32 @glmFloor3f(float* %3, float* %4)
ret void
}

LLVM IR (-O2):
define void @glmFloor3f_(float* %0) {
%2 = tail call i32 @glmFloor3f(float* %0, float* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ en();
int /*<<< orphan*/ foo(char *);
void p2() {
  char *rl = 0;
  en();
  foo(rl);
}


x86 assembly (clang, -O0):
<p2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <en@plt>
mov    -0x8(%rbp),%rdi
call   1040 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p2>:
push   %rax
xor    %eax,%eax
call   1030 <en@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <foo@plt>

LLVM IR (-O0):
define void @p2() {
%1 = alloca i8*
store i8* null, i8** %1
%2 = call i32 (...) @en()
%3 = load i8*, i8** %1
%4 = call i32 @foo(i8* %3)
ret void
}

LLVM IR (-O2):
define void @p2() {
%1 = tail call i32 (...) @en()
%2 = tail call i32 @foo(i8* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void NRerror(const char error_text[]) {
  fprintf(stderr, "Numerical Recipes run-time error...\n");
  fprintf(stderr, "%s\n", error_text);
  fprintf(stderr, "...now exiting to system...\n");
  exit(1000);
}


x86 assembly (clang, -O0):
<NRerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xece(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
lea    0xebb(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    $0x3e8,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<NRerror>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb2(%rip),%r14
mov    (%r14),%edi
lea    0xec8(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xedc(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xecc(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    $0x3e8,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [37 x i8] c"Numerical Recipes run-time error...\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@.str.2 = [29 x i8] c"...now exiting to system...\0A\00"
define void @NRerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0))
%10 = call i32 @exit(i32 1000)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [37 x i8] c"Numerical Recipes run-time error...\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@.str.2 = [29 x i8] c"...now exiting to system...\0A\00"
define void @NRerror(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 (i32, i8*, ...) @fprintf(i32 %2, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stderr
%5 = tail call i32 (i32, i8*, ...) @fprintf(i32 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%6 = load i32, i32* @stderr
%7 = tail call i32 (i32, i8*, ...) @fprintf(i32 %6, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1000)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
struct pane {
  int dummy;
};
struct mark {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __doc_step(struct pane *, struct mark *, int /*<<< orphan*/,
                              int /*<<< orphan*/);
wint_t doc_prior(struct pane *p, struct mark *m) {
  return __doc_step(p, m, 0, 0);
}


x86 assembly (clang, -O0):
<doc_prior>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <__doc_step@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doc_prior>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <__doc_step@plt>

LLVM IR (-O0):
%struct.pane = type { i32 }
%struct.mark = type { i32 }
define i32 @doc_prior(%struct.pane* %0, %struct.mark* %1) {
%3 = alloca %struct.pane*
%4 = alloca %struct.mark*
store %struct.pane* %0, %struct.pane** %3
store %struct.mark* %1, %struct.mark** %4
%5 = load %struct.pane*, %struct.pane** %3
%6 = load %struct.mark*, %struct.mark** %4
%7 = call i32 @__doc_step(%struct.pane* %5, %struct.mark* %6, i32 0, i32 0)
ret i32 %7
}

LLVM IR (-O2):
%struct.pane = type { i32 }
%struct.mark = type { i32 }
define i32 @doc_prior(%struct.pane* %0, %struct.mark* %1) {
%3 = tail call i32 @__doc_step(%struct.pane* %0, %struct.mark* %1, i32 0, i32 0)
ret i32 %3
}
/* Variables and functions */
int *x_malloc(int);
int *copy_int(int num) {
  int *i_ptr = x_malloc(sizeof(int));
  *i_ptr = num;
  return i_ptr;
}


x86 assembly (clang, -O0):
<copy_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <x_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_int>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <x_malloc@plt>
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @copy_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i32* @x_malloc(i32 4)
store i32* %4, i32** %3
%5 = load i32, i32* %2
%6 = load i32*, i32** %3
store i32 %5, i32* %6
%7 = load i32*, i32** %3
ret i32* %7
}

LLVM IR (-O2):
define i32* @copy_int(i32 %0) {
%2 = tail call i32* @x_malloc(i32 4)
store i32 %0, i32* %2
ret i32* %2
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t htons(uint16_t hostshort) {
  return ((hostshort & 0xff00) >> 8) | ((hostshort & 0x00ff) << 8);
}


x86 assembly (clang, -O0):
<htons>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htons>:
rol    $0x8,%di
movzwl %di,%eax
ret

LLVM IR (-O0):
define i32 @htons(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = load i32, i32* %2
%7 = and i32 %6, 255
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @htons(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i16 @llvm.bswap.i16(i16 %2)
%4 = zext i16 %3 to i32
ret i32 %4
}
/* Variables and functions */
int strcmp(char *, char *);
int key_cmp_const_str_p(char **old, char *new) { return strcmp(new, *old); }


x86 assembly (clang, -O0):
<key_cmp_const_str_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_cmp_const_str_p>:
mov    %rsi,%rax
mov    (%rdi),%rsi
mov    %rax,%rdi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @key_cmp_const_str_p(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = call i32 @strcmp(i8* %5, i8* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @key_cmp_const_str_p(i8** nocapture %0, i8* nocapture %1) {
%3 = load i8*, i8** %0
%4 = tail call i32 @strcmp(i8* dereferenceable(1) %1, i8* dereferenceable(1) %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ goodG2B();
void CWE78_OS_Command_Injection__char_console_execl_41_good() { goodG2B(); }


x86 assembly (clang, -O0):
<CWE78_OS_Command_Injection__char_console_execl_41_good>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <goodG2B@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CWE78_OS_Command_Injection__char_console_execl_41_good>:
xor    %eax,%eax
jmp    1030 <goodG2B@plt>

LLVM IR (-O0):
define void @CWE78_OS_Command_Injection__char_console_execl_41_good() {
%1 = call i32 (...) @goodG2B()
ret void
}

LLVM IR (-O2):
define void @CWE78_OS_Command_Injection__char_console_execl_41_good() {
%1 = tail call i32 (...) @goodG2B()
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int default_hash_compare(const void *a, const void *b) {
  return strcmp((char *)a, (char *)b);
}


x86 assembly (clang, -O0):
<default_hash_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_hash_compare>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @default_hash_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @default_hash_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rotl_64g(short dummy, uint64_t x) { return (x << 8) | (x >> 56); }


x86 assembly (clang, -O0):
<rotl_64g>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%edx
mov    $0x38,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl_64g>:
ret

LLVM IR (-O0):
define i32 @rotl_64g(i16 signext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32, i32* %4
%8 = ashr i32 %7, 56
%9 = or i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @rotl_64g(i16 signext %0, i32 %1) {
ret i32 poison
}