xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
unsigned long FanChannelRPMGet(unsigned long ulBase, unsigned long ulChannel) {
  DEBUG_ASSERT(ulBase == 0x40084000);
  DEBUG_ASSERT(ulChannel < 6);
  return ((*((volatile unsigned long *)(ulBase + 0x00000018 +
                                        (ulChannel * 0x10)))) &
          0x00001FFF);
}


x86 assembly (clang, -O0):
<FanChannelRPMGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x40084000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x6,-0x10(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
add    $0x18,%rax
mov    -0x10(%rbp),%rcx
shl    $0x4,%rcx
add    %rcx,%rax
mov    (%rax),%rax
and    $0x1fff,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FanChannelRPMGet>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x40084000,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x6,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
shl    $0x4,%rbx
mov    0x18(%r14,%rbx,1),%rax
and    $0x1fff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @FanChannelRPMGet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074282496
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %4
%10 = icmp ult i64 %9, 6
%11 = zext i1 %10 to i32
%12 = call i32 @DEBUG_ASSERT(i32 %11)
%13 = load i64, i64* %3
%14 = add i64 %13, 24
%15 = load i64, i64* %4
%16 = mul i64 %15, 16
%17 = add i64 %14, %16
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = and i64 %19, 8191
ret i64 %20
}

LLVM IR (-O2):
define i64 @FanChannelRPMGet(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074282496
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = icmp ult i64 %1, 6
%7 = zext i1 %6 to i32
%8 = tail call i32 @DEBUG_ASSERT(i32 %7)
%9 = add i64 %0, 24
%10 = shl i64 %1, 4
%11 = add i64 %9, %10
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, 8191
ret i64 %14
}
int thermal_notify_tz_create(int tz_id, const char *name) { return 0; }


x86 assembly (clang, -O0):
<thermal_notify_tz_create>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thermal_notify_tz_create>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @thermal_notify_tz_create(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @thermal_notify_tz_create(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t safe(uint32_t addr) { return addr & 0x1000 - 1; }


x86 assembly (clang, -O0):
<safe>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe>:
mov    %edi,%eax
and    $0xfff,%eax
ret

LLVM IR (-O0):
define i32 @safe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 4095
ret i32 %4
}

LLVM IR (-O2):
define i32 @safe(i32 %0) {
%2 = and i32 %0, 4095
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void encode_u32le(uint8_t **cursor, uint32_t val) {
  uint8_t *p = *cursor;
  *cursor += 4;
  p[0] = val & 0xff;
  p[1] = (val >> 8) & 0xff;
  p[2] = (val >> 16) & 0xff;
  p[3] = (val >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<encode_u32le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x10,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_u32le>:
mov    %esi,%eax
mov    (%rdi),%rcx
lea    0x10(%rcx),%rdx
mov    %rdx,(%rdi)
movzbl %al,%edx
mov    %edx,(%rcx)
movzbl %ah,%edx
mov    %edx,0x4(%rcx)
mov    %esi,%edx
shr    $0x10,%edx
movzbl %dl,%edx
mov    %edx,0x8(%rcx)
shr    $0x18,%eax
mov    %eax,0xc(%rcx)
ret

LLVM IR (-O0):
define void @encode_u32le(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32*
store i32** %0, i32*** %3
store i32 %1, i32* %4
%6 = load i32**, i32*** %3
%7 = load i32*, i32** %6
store i32* %7, i32** %5
%8 = load i32**, i32*** %3
%9 = load i32*, i32** %8
%10 = getelementptr inbounds i32, i32* %9, i64 4
store i32* %10, i32** %8
%11 = load i32, i32* %4
%12 = and i32 %11, 255
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 0
store i32 %12, i32* %14
%15 = load i32, i32* %4
%16 = ashr i32 %15, 8
%17 = and i32 %16, 255
%18 = load i32*, i32** %5
%19 = getelementptr inbounds i32, i32* %18, i64 1
store i32 %17, i32* %19
%20 = load i32, i32* %4
%21 = ashr i32 %20, 16
%22 = and i32 %21, 255
%23 = load i32*, i32** %5
%24 = getelementptr inbounds i32, i32* %23, i64 2
store i32 %22, i32* %24
%25 = load i32, i32* %4
%26 = ashr i32 %25, 24
%27 = and i32 %26, 255
%28 = load i32*, i32** %5
%29 = getelementptr inbounds i32, i32* %28, i64 3
store i32 %27, i32* %29
ret void
}

LLVM IR (-O2):
define void @encode_u32le(i32** nocapture %0, i32 %1) {
%3 = load i32*, i32** %0
%4 = getelementptr inbounds i32, i32* %3, i64 4
store i32* %4, i32** %0
%5 = and i32 %1, 255
store i32 %5, i32* %3
%6 = lshr i32 %1, 8
%7 = and i32 %6, 255
%8 = getelementptr inbounds i32, i32* %3, i64 1
store i32 %7, i32* %8
%9 = lshr i32 %1, 16
%10 = and i32 %9, 255
%11 = getelementptr inbounds i32, i32* %3, i64 2
store i32 %10, i32* %11
%12 = lshr i32 %1, 24
%13 = getelementptr inbounds i32, i32* %3, i64 3
store i32 %12, i32* %13
ret void
}
unsigned int snapscani_bernstein(const unsigned char *str) {
  unsigned int hash = 5381;
  int c;
  while (*str) {
    c = *str++;
    hash = ((hash << 5) + hash) + c;
  }
  return hash;
}


x86 assembly (clang, -O0):
<snapscani_bernstein>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1505,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <snapscani_bernstein+0x45>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <snapscani_bernstein+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snapscani_bernstein>:
mov    (%rdi),%cl
test   %cl,%cl
je     1138 <snapscani_bernstein+0x38>
add    $0x1,%rdi
mov    $0x1505,%edx
mov    %edx,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl %cl,%ecx
shl    $0x5,%eax
add    %edx,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
mov    %eax,%edx
test   %cl,%cl
jne    1120 <snapscani_bernstein+0x20>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i32 @snapscani_bernstein(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 5381, i32* %3
br label %5
5: ; preds = %9, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
%12 = load i8, i8* %10
%13 = zext i8 %12 to i32
store i32 %13, i32* %4
%14 = load i32, i32* %3
%15 = shl i32 %14, 5
%16 = load i32, i32* %3
%17 = add i32 %15, %16
%18 = load i32, i32* %4
%19 = add i32 %17, %18
store i32 %19, i32* %3
br label %5
20: ; preds = %5
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @snapscani_bernstein(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i32 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = zext i8 %5 to i32
%10 = mul i32 %7, 33
%11 = add i32 %10, %9
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 5381, %1 ], [ %11, %4 ]
ret i32 %15
}
void set32(void *buf_, unsigned offset, unsigned int val) {
  unsigned char *buf = (unsigned char *)buf_ + offset;
  buf[0] = val;
  buf[1] = val >> 8;
  buf[2] = val >> 16;
  buf[3] = val >> 24;
}


x86 assembly (clang, -O0):
<set32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%eax
shr    $0x10,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%eax
shr    $0x18,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set32>:
mov    %esi,%eax
mov    %edx,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @set32(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8* %11, i8** %7
%12 = load i32, i32* %6
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %7
%15 = getelementptr inbounds i8, i8* %14, i64 0
store i8 %13, i8* %15
%16 = load i32, i32* %6
%17 = lshr i32 %16, 8
%18 = trunc i32 %17 to i8
%19 = load i8*, i8** %7
%20 = getelementptr inbounds i8, i8* %19, i64 1
store i8 %18, i8* %20
%21 = load i32, i32* %6
%22 = lshr i32 %21, 16
%23 = trunc i32 %22 to i8
%24 = load i8*, i8** %7
%25 = getelementptr inbounds i8, i8* %24, i64 2
store i8 %23, i8* %25
%26 = load i32, i32* %6
%27 = lshr i32 %26, 24
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %7
%30 = getelementptr inbounds i8, i8* %29, i64 3
store i8 %28, i8* %30
ret void
}

LLVM IR (-O2):
define void @set32(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = zext i32 %1 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = trunc i32 %2 to i8
store i8 %6, i8* %5
%7 = lshr i32 %2, 8
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %8, i8* %9
%10 = lshr i32 %2, 16
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %5, i64 2
store i8 %11, i8* %12
%13 = lshr i32 %2, 24
%14 = trunc i32 %13 to i8
%15 = getelementptr inbounds i8, i8* %5, i64 3
store i8 %14, i8* %15
ret void
}
void TclInitNamespaceSubsystem() {}


x86 assembly (clang, -O0):
<TclInitNamespaceSubsystem>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TclInitNamespaceSubsystem>:
ret

LLVM IR (-O0):
define void @TclInitNamespaceSubsystem() {
ret void
}

LLVM IR (-O2):
define void @TclInitNamespaceSubsystem() {
ret void
}
int twos(void) { return 222; }


x86 assembly (clang, -O0):
<twos>:
push   %rbp
mov    %rsp,%rbp
mov    $0xde,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<twos>:
mov    $0xde,%eax
ret

LLVM IR (-O0):
define i32 @twos() {
ret i32 222
}

LLVM IR (-O2):
define i32 @twos() {
ret i32 222
}
float vec2_dot(float *a, float *b) { return a[0] * b[0] + a[1] * b[1]; }


x86 assembly (clang, -O0):
<vec2_dot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x10(%rbp),%rax
mulss  0x4(%rax),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec2_dot>:
movss  0x4(%rdi),%xmm1
mulss  0x4(%rsi),%xmm1
movss  (%rdi),%xmm0
mulss  (%rsi),%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @vec2_dot(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
%10 = load float, float* %9
%11 = load float*, float** %3
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = fmul float %13, %16
%18 = call float @llvm.fmuladd.f32(float %7, float %10, float %17)
ret float %18
}

LLVM IR (-O2):
define float @vec2_dot(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fmul float %6, %8
%10 = tail call float @llvm.fmuladd.f32(float %3, float %4, float %9)
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ call7c(short, long, float, unsigned char, double,
                          unsigned short, unsigned long, unsigned int, char,
                          int);
void call7b(int i, short s, long l, float f, unsigned char uc, double d,
            unsigned short us, unsigned long ul, unsigned int ui, char c) {
  call7c(s, l, f, uc, d, us, ul, ui, c, i);
}


x86 assembly (clang, -O0):
<call7b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %r8w,%ax
mov    0x18(%rbp),%r8b
mov    0x10(%rbp),%r8d
mov    %edi,-0x4(%rbp)
mov    %si,-0x6(%rbp)
mov    %rdx,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    %cl,-0x15(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    %ax,-0x22(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x6(%rbp),%di
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
mov    -0x15(%rbp),%dl
movsd  -0x20(%rbp),%xmm1
mov    -0x22(%rbp),%cx
mov    -0x30(%rbp),%r8
mov    0x10(%rbp),%r9d
mov    0x18(%rbp),%r10b
mov    -0x4(%rbp),%eax
movswl %di,%edi
movzbl %dl,%edx
movzwl %cx,%ecx
movsbl %r10b,%r10d
mov    %r10d,(%rsp)
mov    %eax,0x8(%rsp)
call   1030 <call7c@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call7b>:
push   %rax
mov    %r9,%r10
mov    %edi,%eax
mov    0x10(%rsp),%r9d
movsbl 0x18(%rsp),%r11d
mov    %esi,%edi
mov    %rdx,%rsi
mov    %ecx,%edx
mov    %r8d,%ecx
mov    %r10,%r8
push   %rax
push   %r11
call   1030 <call7c@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @call7b(i32 %0, i16 signext %1, i64 %2, float %3, i8 zeroext %4, double %5, i16 zeroext %6, i64 %7, i32 %8, i8 signext %9) {
%11 = alloca i32
%12 = alloca i16
%13 = alloca i64
%14 = alloca float
%15 = alloca i8
%16 = alloca double
%17 = alloca i16
%18 = alloca i64
%19 = alloca i32
%20 = alloca i8
store i32 %0, i32* %11
store i16 %1, i16* %12
store i64 %2, i64* %13
store float %3, float* %14
store i8 %4, i8* %15
store double %5, double* %16
store i16 %6, i16* %17
store i64 %7, i64* %18
store i32 %8, i32* %19
store i8 %9, i8* %20
%21 = load i16, i16* %12
%22 = load i64, i64* %13
%23 = load float, float* %14
%24 = load i8, i8* %15
%25 = load double, double* %16
%26 = load i16, i16* %17
%27 = load i64, i64* %18
%28 = load i32, i32* %19
%29 = load i8, i8* %20
%30 = load i32, i32* %11
%31 = call i32 @call7c(i16 signext %21, i64 %22, float %23, i8 zeroext %24, double %25, i16 zeroext %26, i64 %27, i32 %28, i8 signext %29, i32 %30)
ret void
}

LLVM IR (-O2):
define void @call7b(i32 %0, i16 signext %1, i64 %2, float %3, i8 zeroext %4, double %5, i16 zeroext %6, i64 %7, i32 %8, i8 signext %9) {
%11 = tail call i32 @call7c(i16 signext %1, i64 %2, float %3, i8 zeroext %4, double %5, i16 zeroext %6, i64 %7, i32 %8, i8 signext %9, i32 %0)
ret void
}
char *md_write_e_type(int type) {
  switch (type) {
  case 0:
    return ("|--|");
    break;
  case 1:
    return ("o--|");
    break;
  case 2:
    return ("o--|");
    break;
  case 3:
    return ("o--o");
    break;
  }
  return ("|--|");
}


x86 assembly (clang, -O0):
<md_write_e_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     116c <md_write_e_type+0x6c>
mov    -0x18(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <md_write_e_type+0x77>
lea    0xed2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <md_write_e_type+0x77>
lea    0xec2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <md_write_e_type+0x77>
lea    0xeb7(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <md_write_e_type+0x77>
lea    0xe9d(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_write_e_type>:
add    $0xffffffff,%edi
cmp    $0x2,%edi
ja     111a <md_write_e_type+0x1a>
movslq %edi,%rax
lea    0xefe(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
lea    0xedf(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"|--|\00"
@.str.1 = [5 x i8] c"o--|\00"
@.str.2 = [5 x i8] c"o--o\00"
define i8* @md_write_e_type(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %10
6: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %10
7: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %10
8: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %10
9: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
@.str = [5 x i8] c"|--|\00"
@.str.1 = [5 x i8] c"o--|\00"
@.str.2 = [5 x i8] c"o--o\00"
@reltable.md_write_e_type = [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.1 to i64), i64 ptrtoint ([3 x i32]* @reltable.md_write_e_type to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.1 to i64), i64 ptrtoint ([3 x i32]* @reltable.md_write_e_type to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.2 to i64), i64 ptrtoint ([3 x i32]* @reltable.md_write_e_type to i64)) to i32)]
define i8* @md_write_e_type(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = shl i64 %5, 2
%7 = call i8* @llvm.load.relative.i64(i8* bitcast ([3 x i32]* @reltable.md_write_e_type to i8*), i64 %6)
br label %8
8: ; preds = %4, %1
%9 = phi i8* [ getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), %1 ], [ %7, %4 ]
ret i8* %9
}
/* Variables and functions */
int expo(int, int, int);
int inverse(int base, int n) {
  if (n == 0)
    return -1;
  return expo(base, n, base - 2);
}


x86 assembly (clang, -O0):
<inverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1134 <inverse+0x24>
movl   $0xffffffff,-0x4(%rbp)
jmp    1148 <inverse+0x38>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%edx
sub    $0x2,%edx
call   1030 <expo@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverse>:
test   %esi,%esi
je     111c <inverse+0xc>
lea    -0x2(%rdi),%edx
jmp    1030 <expo@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @inverse(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 -1, i32* %3
br label %15
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 2
%14 = call i32 @expo(i32 %10, i32 %11, i32 %13)
store i32 %14, i32* %3
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @inverse(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = add nsw i32 %0, -2
%6 = tail call i32 @expo(i32 %0, i32 %1, i32 %5)
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ -1, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ sleep(int);
void sleep_2_secs() {
  sleep(2);
  puts("SLEPT");
}


x86 assembly (clang, -O0):
<sleep_2_secs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1040 <sleep@plt>
lea    0xecb(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_2_secs>:
push   %rax
mov    $0x2,%edi
call   1040 <sleep@plt>
lea    0xece(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"SLEPT\00"
define void @sleep_2_secs() {
%1 = call i32 @sleep(i32 2)
%2 = call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"SLEPT\00"
define void @sleep_2_secs() {
%1 = tail call i32 @sleep(i32 2)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ interchangeRow(int, int, int);
int maxrow(int, int);
void partial_pivot(int k, int n) {
  int pos = maxrow(k, n);
  if (pos != k)
    interchangeRow(pos, k, n);
}


x86 assembly (clang, -O0):
<partial_pivot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <maxrow@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
je     1156 <partial_pivot+0x36>
mov    -0xc(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <interchangeRow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<partial_pivot>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1040 <maxrow@plt>
cmp    %ebp,%eax
jne    1137 <partial_pivot+0x17>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %eax,%edi
mov    %ebp,%esi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <interchangeRow@plt>

LLVM IR (-O0):
define void @partial_pivot(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @maxrow(i32 %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %3
%11 = icmp ne i32 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %2
%13 = load i32, i32* %5
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = call i32 @interchangeRow(i32 %13, i32 %14, i32 %15)
br label %17
17: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @partial_pivot(i32 %0, i32 %1) {
%3 = tail call i32 @maxrow(i32 %0, i32 %1)
%4 = icmp eq i32 %3, %0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @interchangeRow(i32 %3, i32 %0, i32 %1)
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __softboundmpx_store_null_return_metadata();
int /*<<< orphan*/ __softboundmpx_store_return_metadata(void *, void *);
int strlen(void *);
__attribute__((__weak__, __always___)) void
__softboundmpx_strdup_handler(void *ret_ptr) {
  if (ret_ptr == NULL) {
    __softboundmpx_store_null_return_metadata();
  } else {
    __softboundmpx_store_return_metadata(
        ret_ptr, (void *)((char *)ret_ptr + strlen(ret_ptr) + 1));
  }
}


x86 assembly (clang, -O0):
<__softboundmpx_strdup_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1153 <__softboundmpx_strdup_handler+0x23>
mov    $0x0,%al
call   1050 <__softboundmpx_store_null_return_metadata@plt>
jmp    1182 <__softboundmpx_strdup_handler+0x52>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdi
cltq
add    %rax,%rsi
add    $0x1,%rsi
call   1040 <__softboundmpx_store_return_metadata@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__softboundmpx_strdup_handler>:
test   %rdi,%rdi
je     1151 <__softboundmpx_strdup_handler+0x21>
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
lea    (%rbx,%rax,1),%rsi
add    $0x1,%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__softboundmpx_store_return_metadata@plt>
xor    %eax,%eax
jmp    1050 <__softboundmpx_store_null_return_metadata@plt>

LLVM IR (-O0):
define weak void @__softboundmpx_strdup_handler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @__softboundmpx_store_null_return_metadata()
br label %16
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = load i8*, i8** %2
%10 = load i8*, i8** %2
%11 = call i32 @strlen(i8* %10)
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = call i32 @__softboundmpx_store_return_metadata(i8* %8, i8* %14)
br label %16
16: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define weak void @__softboundmpx_strdup_handler(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @__softboundmpx_store_null_return_metadata()
br label %11
5: ; preds = %1
%6 = tail call i32 @strlen(i8* %0)
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = tail call i32 @__softboundmpx_store_return_metadata(i8* %0, i8* %9)
br label %11
11: ; preds = %5, %3
ret void
}
void ff_get_atom_gradient(struct ff *ff, int idx, double *xyz) {
  (void)ff;
  (void)idx;
  (void)xyz;
}


x86 assembly (clang, -O0):
<ff_get_atom_gradient>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_get_atom_gradient>:
ret

LLVM IR (-O0):
%struct.ff = type opaque
define void @ff_get_atom_gradient(%struct.ff* %0, i32 %1, double* %2) {
%4 = alloca %struct.ff*
%5 = alloca i32
%6 = alloca double*
store %struct.ff* %0, %struct.ff** %4
store i32 %1, i32* %5
store double* %2, double** %6
%7 = load %struct.ff*, %struct.ff** %4
%8 = load i32, i32* %5
%9 = load double*, double** %6
ret void
}

LLVM IR (-O2):
%struct.ff = type opaque
define void @ff_get_atom_gradient(%struct.ff* nocapture %0, i32 %1, double* nocapture %2) {
ret void
}
int f2(int x) {
  switch (x) {
  default:
    return 3;
  case 10 ... - 1:
    return 0;
  }
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %5 [
]
5: ; preds = %1
store i32 3, i32* %2
br label %7
6: ; No predecessors!
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
ret i32 3
}
float calct2(float segmentStart, float segmentEnd, float segmentLength,
             float time) {
  float t = (time - segmentStart) / segmentLength;
  return t;
}


x86 assembly (clang, -O0):
<calct2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calct2>:
subss  %xmm0,%xmm3
divss  %xmm2,%xmm3
movaps %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @calct2(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%10 = load float, float* %8
%11 = load float, float* %5
%12 = fsub float %10, %11
%13 = load float, float* %7
%14 = fdiv float %12, %13
store float %14, float* %9
%15 = load float, float* %9
ret float %15
}

LLVM IR (-O2):
define float @calct2(float %0, float %1, float %2, float %3) {
%5 = fsub float %3, %0
%6 = fdiv float %5, %2
ret float %6
}
void t91() {
  char c[(int)(sizeof(typeof((0 ? 2.0f : (_Complex double)2.0f))) -
               sizeof(_Complex double))];
  (0 ? 2.0f : (_Complex double)2.0f);
}


x86 assembly (clang, -O0):
<t91>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
test   $0x1,%al
jne    1113 <t91+0x13>
jmp    1118 <t91+0x18>
jmp    111d <t91+0x1d>
jmp    111d <t91+0x1d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t91>:
ret

LLVM IR (-O0):
define void @t91() {
%1 = alloca [0 x i8]
br i1 false, label %2, label %3
2: ; preds = %0
br label %4
3: ; preds = %0
br label %4
4: ; preds = %3, %2
%5 = phi double [ 2.000000e+00, %2 ], [ 2.000000e+00, %3 ]
%6 = phi double [ 0.000000e+00, %2 ], [ 0.000000e+00, %3 ]
ret void
}

LLVM IR (-O2):
define void @t91() {
ret void
}
void romfs_write_inode(struct inode_type *inode) { return; }


x86 assembly (clang, -O0):
<romfs_write_inode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<romfs_write_inode>:
ret

LLVM IR (-O0):
%struct.inode_type = type opaque
define void @romfs_write_inode(%struct.inode_type* %0) {
%2 = alloca %struct.inode_type*
store %struct.inode_type* %0, %struct.inode_type** %2
ret void
}

LLVM IR (-O2):
%struct.inode_type = type opaque
define void @romfs_write_inode(%struct.inode_type* nocapture %0) {
ret void
}
int f(int i1, unsigned int u1, unsigned int u2) {
  int j1;
  unsigned int v1, v2;
  v1 = u1 << i1;
  j1 = i1 << i1;
  v2 = u2 << 5;
  v2 = u2 << 5;
  v2 = u2 << -2;
  return 3;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xfffffffe,%ecx
shl    %cl,%eax
mov    %eax,-0x18(%rbp)
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = shl i32 %10, %11
store i32 %12, i32* %8
%13 = load i32, i32* %4
%14 = load i32, i32* %4
%15 = shl i32 %13, %14
store i32 %15, i32* %7
%16 = load i32, i32* %6
%17 = shl i32 %16, 5
store i32 %17, i32* %9
%18 = load i32, i32* %6
%19 = shl i32 %18, 5
store i32 %19, i32* %9
%20 = load i32, i32* %6
%21 = shl i32 %20, -2
store i32 %21, i32* %9
ret i32 3
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1, i32 %2) {
ret i32 3
}
/* Variables and functions */
double acos(double);
__attribute__((__weak__, __always___)) double softboundcets_acos(double x) {
  return acos(x);
}


x86 assembly (clang, -O0):
<softboundcets_acos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <acos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_acos>:
jmp    1030 <acos@plt>

LLVM IR (-O0):
define weak double @softboundcets_acos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @acos(double %3)
ret double %4
}

LLVM IR (-O2):
define weak double @softboundcets_acos(double %0) {
%2 = tail call double @acos(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ region_init();
int region_main(int, char **, char **);
int main(int argc, char **argv, char **envp) {
  region_init();
  return region_main(argc, argv, envp);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <region_init@plt>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <region_main@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <region_init@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <region_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%8 = call i32 (...) @region_init()
%9 = load i32, i32* %5
%10 = load i8**, i8*** %6
%11 = load i8**, i8*** %7
%12 = call i32 @region_main(i32 %9, i8** %10, i8** %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = tail call i32 (...) @region_init()
%5 = tail call i32 @region_main(i32 %0, i8** %1, i8** %2)
ret i32 %5
}
_mul(int bar) { return (bar * 3); }


x86 assembly (clang, -O0):
<_mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mul>:
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @_mul(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 3
ret i32 %4
}

LLVM IR (-O2):
define i32 @_mul(i32 %0) {
%2 = mul nsw i32 %0, 3
ret i32 %2
}
int test2u(unsigned int x) { return x / 10U == 0; }


x86 assembly (clang, -O0):
<test2u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2u>:
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @test2u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = udiv i32 %3, 10
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test2u(i32 %0) {
%2 = icmp ult i32 %0, 10
%3 = zext i1 %2 to i32
ret i32 %3
}
char cbm_ascii2petscii_c(char Character) {
  if ((Character >= 0x5b) && (Character <= 0x7e)) {
    return Character ^ 0x20;
  } else if ((Character >= 'A') && (Character <= 'Z')) {
    return Character | 0x80;
  }
  return Character;
}


x86 assembly (clang, -O0):
<cbm_ascii2petscii_c>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x5b,%eax
jl     1133 <cbm_ascii2petscii_c+0x33>
movsbl -0x2(%rbp),%eax
cmp    $0x7e,%eax
jg     1133 <cbm_ascii2petscii_c+0x33>
movsbl -0x2(%rbp),%eax
xor    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    1169 <cbm_ascii2petscii_c+0x69>
movsbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     115e <cbm_ascii2petscii_c+0x5e>
movsbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     115e <cbm_ascii2petscii_c+0x5e>
movsbl -0x2(%rbp),%eax
or     $0x80,%eax
mov    %al,-0x1(%rbp)
jmp    1169 <cbm_ascii2petscii_c+0x69>
jmp    1163 <cbm_ascii2petscii_c+0x63>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbm_ascii2petscii_c>:
mov    %edi,%eax
lea    -0x5b(%rax),%ecx
cmp    $0x23,%cl
ja     110d <cbm_ascii2petscii_c+0xd>
xor    $0x20,%al
ret
lea    -0x41(%rax),%ecx
movzbl %al,%edx
or     $0x80,%al
cmp    $0x1a,%cl
movzbl %al,%eax
cmovae %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @cbm_ascii2petscii_c(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 91
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 126
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = xor i32 %13, 32
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %32
16: ; preds = %7, %1
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 65
br i1 %19, label %20, label %29
20: ; preds = %16
%21 = load i8, i8* %3
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %22, 90
br i1 %23, label %24, label %29
24: ; preds = %20
%25 = load i8, i8* %3
%26 = sext i8 %25 to i32
%27 = or i32 %26, 128
%28 = trunc i32 %27 to i8
store i8 %28, i8* %2
br label %32
29: ; preds = %20, %16
br label %30
30: ; preds = %29
%31 = load i8, i8* %3
store i8 %31, i8* %2
br label %32
32: ; preds = %30, %24, %11
%33 = load i8, i8* %2
ret i8 %33
}

LLVM IR (-O2):
define signext i8 @cbm_ascii2petscii_c(i8 signext %0) {
%2 = add i8 %0, -91
%3 = icmp ult i8 %2, 36
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = xor i8 %0, 32
br label %11
6: ; preds = %1
%7 = add i8 %0, -65
%8 = icmp ult i8 %7, 26
%9 = or i8 %0, -128
%10 = select i1 %8, i8 %9, i8 %0
br label %11
11: ; preds = %6, %4
%12 = phi i8 [ %5, %4 ], [ %10, %6 ]
ret i8 %12
}
/* Type definitions */
struct sockaddr_storage {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ ss;
typedef int socklen_t;

/* Variables and functions */
scalar_t__ getpeername(int, struct sockaddr *, int *);
int net_is_connected(int fd) {
  struct sockaddr_storage ss;
  socklen_t len = sizeof(ss);
  return getpeername(fd, (struct sockaddr *)&ss, &len) == 0;
}


x86 assembly (clang, -O0):
<net_is_connected>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <getpeername@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_is_connected>:
sub    $0x18,%rsp
movl   $0x4,0xc(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1030 <getpeername@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sockaddr_storage = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @net_is_connected(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_storage
%4 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %4
%5 = load i32, i32* %2
%6 = bitcast %struct.sockaddr_storage* %3 to %struct.sockaddr*
%7 = call i64 @getpeername(i32 %5, %struct.sockaddr* %6, i32* %4)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.sockaddr_storage = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @net_is_connected(i32 %0) {
%2 = alloca %struct.sockaddr_storage
%3 = alloca i32
%4 = bitcast %struct.sockaddr_storage* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%6 = bitcast %struct.sockaddr_storage* %2 to %struct.sockaddr*
%7 = call i64 @getpeername(i32 %0, %struct.sockaddr* %6, i32* %3)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
int SWARM_get_num_cores(void) {
  int num_cores = 2;
  return num_cores;
}


x86 assembly (clang, -O0):
<SWARM_get_num_cores>:
push   %rbp
mov    %rsp,%rbp
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SWARM_get_num_cores>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @SWARM_get_num_cores() {
%1 = alloca i32
store i32 2, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @SWARM_get_num_cores() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_X509_CSR_WRITE_C and/or MBEDTLS_FS_IO and/or "
         "MBEDTLS_PK_PARSE_C and/or MBEDTLS_SHA256_C and/or "
         "MBEDTLS_ENTROPY_C and/or MBEDTLS_CTR_DRBG_C "
         "not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [161 x i8] c"MBEDTLS_X509_CSR_WRITE_C and/or MBEDTLS_FS_IO and/or MBEDTLS_PK_PARSE_C and/or MBEDTLS_SHA256_C and/or MBEDTLS_ENTROPY_C and/or MBEDTLS_CTR_DRBG_C not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [160 x i8] c"MBEDTLS_X509_CSR_WRITE_C and/or MBEDTLS_FS_IO and/or MBEDTLS_PK_PARSE_C and/or MBEDTLS_SHA256_C and/or MBEDTLS_ENTROPY_C and/or MBEDTLS_CTR_DRBG_C not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([160 x i8], [160 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() { printf("usage: pseudo <COMMAND> [OPTIONS]\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"usage: pseudo <COMMAND> [OPTIONS]\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [34 x i8] c"usage: pseudo <COMMAND> [OPTIONS]\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_nothing(int /*<<< orphan*/);
void bar() { do_nothing(0); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <do_nothing@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xor    %edi,%edi
jmp    1030 <do_nothing@plt>

LLVM IR (-O0):
define void @bar() {
%1 = call i32 @do_nothing(i32 0)
ret void
}

LLVM IR (-O2):
define void @bar() {
%1 = tail call i32 @do_nothing(i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fseeko(int /*<<< orphan*/ *, int /*<<< orphan*/, int);
int fseek(FILE *file, long offset, int whence) {
  return fseeko(file, (off_t)offset, whence);
}


x86 assembly (clang, -O0):
<fseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %eax,%esi
mov    -0x14(%rbp),%edx
call   1030 <fseeko@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fseek>:
jmp    1030 <fseeko@plt>

LLVM IR (-O0):
define i32 @fseek(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i32
store i32* %0, i32** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = trunc i64 %8 to i32
%10 = load i32, i32* %6
%11 = call i32 @fseeko(i32* %7, i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @fseek(i32* nocapture %0, i64 %1, i32 %2) {
%4 = trunc i64 %1 to i32
%5 = tail call i32 @fseeko(i32* %0, i32 %4, i32 %2)
ret i32 %5
}
/* Variables and functions */
unsigned int norm_shift_amt_U_and_non_U(int, int);
unsigned int _norm(int src2) { return norm_shift_amt_U_and_non_U(1, src2); }


x86 assembly (clang, -O0):
<_norm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1030 <norm_shift_amt_U_and_non_U@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_norm>:
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <norm_shift_amt_U_and_non_U@plt>

LLVM IR (-O0):
define i32 @_norm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @norm_shift_amt_U_and_non_U(i32 1, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @_norm(i32 %0) {
%2 = tail call i32 @norm_shift_amt_U_and_non_U(i32 1, i32 %0)
ret i32 %2
}
char *get_profile_vertex_type(int v, int *silent_vertices) {
  while (*silent_vertices != -999) {
    if (v == *silent_vertices) {
      return "silent\n";
    }
    silent_vertices++;
  }
  return "standard\n";
}


x86 assembly (clang, -O0):
<get_profile_vertex_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpl   $0xfffffc19,(%rax)
je     114b <get_profile_vertex_type+0x4b>
mov    -0xc(%rbp),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jne    113a <get_profile_vertex_type+0x3a>
lea    0xecf(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1156 <get_profile_vertex_type+0x56>
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
jmp    110b <get_profile_vertex_type+0xb>
lea    0xeb6(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_profile_vertex_type>:
mov    (%rsi),%ecx
lea    0xeff(%rip),%rax
cmp    $0xfffffc19,%ecx
je     1132 <get_profile_vertex_type+0x32>
add    $0x4,%rsi
lea    0xee4(%rip),%rdx
nopl   0x0(%rax)
cmp    %edi,%ecx
je     1133 <get_profile_vertex_type+0x33>
mov    (%rsi),%ecx
add    $0x4,%rsi
cmp    $0xfffffc19,%ecx
jne    1120 <get_profile_vertex_type+0x20>
ret
mov    %rdx,%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"silent\0A\00"
@.str.1 = [10 x i8] c"standard\0A\00"
define i8* @get_profile_vertex_type(i32 %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
br label %6
6: ; preds = %16, %2
%7 = load i32*, i32** %5
%8 = load i32, i32* %7
%9 = icmp ne i32 %8, -999
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32, i32* %4
%12 = load i32*, i32** %5
%13 = load i32, i32* %12
%14 = icmp eq i32 %11, %13
br i1 %14, label %15, label %16
15: ; preds = %10
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %3
br label %20
16: ; preds = %10
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i32 1
store i32* %18, i32** %5
br label %6
19: ; preds = %6
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8** %3
br label %20
20: ; preds = %19, %15
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
@.str = [8 x i8] c"silent\0A\00"
@.str.1 = [10 x i8] c"standard\0A\00"
define i8* @get_profile_vertex_type(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, -999
br i1 %4, label %13, label %8
5: ; preds = %8
%6 = load i32, i32* %12
%7 = icmp eq i32 %6, -999
br i1 %7, label %13, label %8
8: ; preds = %2, %5
%9 = phi i32 [ %6, %5 ], [ %3, %2 ]
%10 = phi i32* [ %12, %5 ], [ %1, %2 ]
%11 = icmp eq i32 %9, %0
%12 = getelementptr inbounds i32, i32* %10, i64 1
br i1 %11, label %13, label %5
13: ; preds = %8, %5, %2
%14 = phi i8* [ getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), %2 ], [ getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), %5 ], [ getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), %8 ]
ret i8* %14
}
void gdk_event_get_coords() {}


x86 assembly (clang, -O0):
<gdk_event_get_coords>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_event_get_coords>:
ret

LLVM IR (-O0):
define void @gdk_event_get_coords() {
ret void
}

LLVM IR (-O2):
define void @gdk_event_get_coords() {
ret void
}