xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void oiMundo() { puts("oie"); }


x86 assembly (clang, -O0):
<oiMundo>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<oiMundo>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"oie\00"
define void @oiMundo() {
%1 = call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"oie\00"
define void @oiMundo() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t swap_endianness16(uint16_t in) { return (in << 8) | (in >> 8); }


x86 assembly (clang, -O0):
<swap_endianness16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_endianness16>:
mov    %edi,%eax
shl    $0x8,%eax
sar    $0x8,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @swap_endianness16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @swap_endianness16(i32 %0) {
%2 = shl i32 %0, 8
%3 = ashr i32 %0, 8
%4 = or i32 %2, %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ENODEV;
long UINT32_MAX;
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
int /*<<< orphan*/ errno;
long sysconf(int /*<<< orphan*/);
uint32_t get_cpu_count(void) {
  long n = sysconf(_SC_NPROCESSORS_ONLN);
  if (n <= 0 || n > UINT32_MAX) {
    errno = ENODEV;
    return 0;
  }
  return (uint32_t)n;
}


x86 assembly (clang, -O0):
<get_cpu_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jle    1149 <get_cpu_count+0x39>
mov    -0x10(%rbp),%rax
mov    0x2eb8(%rip),%rcx
cmp    (%rcx),%rax
jle    1167 <get_cpu_count+0x57>
mov    0x2e78(%rip),%rax
mov    (%rax),%ecx
mov    0x2e77(%rip),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    116e <get_cpu_count+0x5e>
mov    -0x10(%rbp),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cpu_count>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
test   %rax,%rax
jle    1132 <get_cpu_count+0x22>
mov    0x2ecd(%rip),%rcx
cmp    (%rcx),%rax
jg     1132 <get_cpu_count+0x22>
pop    %rcx
ret
mov    0x2e8f(%rip),%rax
mov    (%rax),%eax
mov    0x2e8e(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
@UINT32_MAX = global i64 0
@ENODEV = global i32 0
@errno = global i32 0
define i32 @get_cpu_count() {
%1 = alloca i32
%2 = alloca i64
%3 = load i32, i32* @_SC_NPROCESSORS_ONLN
%4 = call i64 @sysconf(i32 %3)
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = icmp sle i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %0
%8 = load i64, i64* %2
%9 = load i64, i64* @UINT32_MAX
%10 = icmp sgt i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %7, %0
%12 = load i32, i32* @ENODEV
store i32 %12, i32* @errno
store i32 0, i32* %1
br label %16
13: ; preds = %7
%14 = load i64, i64* %2
%15 = trunc i64 %14 to i32
store i32 %15, i32* %1
br label %16
16: ; preds = %13, %11
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
@UINT32_MAX = global i64 0
@ENODEV = global i32 0
@errno = global i32 0
define i32 @get_cpu_count() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i64 @sysconf(i32 %1)
%3 = icmp slt i64 %2, 1
%4 = load i64, i64* @UINT32_MAX
%5 = icmp sgt i64 %2, %4
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i32, i32* @ENODEV
store i32 %8, i32* @errno
br label %11
9: ; preds = %0
%10 = trunc i64 %2 to i32
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ 0, %7 ], [ %10, %9 ]
ret i32 %12
}
/* Variables and functions */
scalar_t__ test_reverse();
scalar_t__ test_substr();
int main(int argc, char *argv[]) { return test_reverse() || test_substr(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test_reverse@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x11(%rbp)
jne    1160 <main+0x40>
mov    $0x0,%al
call   1040 <test_substr@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_reverse@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <main+0x17>
pop    %rcx
ret
xor    %eax,%eax
call   1040 <test_substr@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @test_reverse()
%7 = icmp ne i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = call i64 (...) @test_substr()
%10 = icmp ne i64 %9, 0
br label %11
11: ; preds = %8, %2
%12 = phi i1 [ true, %2 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @test_reverse()
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 (...) @test_substr()
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
void upcase(char *message) {
  int i = 0;
  while (message[i] != '\0') {
    if (('a' <= message[i]) && (message[i] <= 'z'))
      message[i] -= 32;
    ++i;
  };
}


x86 assembly (clang, -O0):
<upcase>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1172 <upcase+0x72>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1164 <upcase+0x64>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x7a,%eax
jg     1164 <upcase+0x64>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edx
sub    $0x20,%edx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <upcase+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<upcase>:
mov    (%rdi),%al
test   %al,%al
je     112a <upcase+0x2a>
add    $0x1,%rdi
jmp    111b <upcase+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <upcase+0x2a>
lea    -0x61(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <upcase+0x10>
add    $0xe0,%al
mov    %al,-0x1(%rdi)
jmp    1110 <upcase+0x10>
ret

LLVM IR (-O0):
define void @upcase(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %37, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %40
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp sle i32 97, %18
br i1 %19, label %20, label %37
20: ; preds = %12
%21 = load i8*, i8** %2
%22 = load i32, i32* %3
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp sle i32 %26, 122
br i1 %27, label %28, label %37
28: ; preds = %20
%29 = load i8*, i8** %2
%30 = load i32, i32* %3
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds i8, i8* %29, i64 %31
%33 = load i8, i8* %32
%34 = sext i8 %33 to i32
%35 = sub nsw i32 %34, 32
%36 = trunc i32 %35 to i8
store i8 %36, i8* %32
br label %37
37: ; preds = %28, %20, %12
%38 = load i32, i32* %3
%39 = add nsw i32 %38, 1
store i32 %39, i32* %3
br label %4
40: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @upcase(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1, %12
%5 = phi i64 [ %13, %12 ], [ 0, %1 ]
%6 = phi i8 [ %15, %12 ], [ %2, %1 ]
%7 = phi i8* [ %14, %12 ], [ %0, %1 ]
%8 = add i8 %6, -97
%9 = icmp ult i8 %8, 26
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = add nsw i8 %6, -32
store i8 %11, i8* %7
br label %12
12: ; preds = %10, %4
%13 = add nuw i64 %5, 1
%14 = getelementptr inbounds i8, i8* %0, i64 %13
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %4
17: ; preds = %12, %1
ret void
}
void pollen_event_Newsroom_targetInit__I() {}


x86 assembly (clang, -O0):
<pollen_event_Newsroom_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_event_Newsroom_targetInit__I>:
ret

LLVM IR (-O0):
define void @pollen_event_Newsroom_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @pollen_event_Newsroom_targetInit__I() {
ret void
}
float obdConvert_2E(unsigned int A, unsigned int B, unsigned int C,
                    unsigned int D) {
  return (float)A * 100.0f / 255.0f;
}


x86 assembly (clang, -O0):
<obdConvert_2E>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm0
movss  0xee4(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed4(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<obdConvert_2E>:
mov    %edi,%eax
cvtsi2ss %rax,%xmm0
mulss  0xef1(%rip),%xmm0
divss  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
define float @obdConvert_2E(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = uitofp i32 %9 to float
%11 = fmul float %10, 1.000000e+02
%12 = fdiv float %11, 2.550000e+02
ret float %12
}

LLVM IR (-O2):
define float @obdConvert_2E(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = uitofp i32 %0 to float
%6 = fmul float %5, 1.000000e+02
%7 = fdiv float %6, 2.550000e+02
ret float %7
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ keycode;
};
typedef TYPE_1__ XKeyReleasedEvent;

/* Variables and functions */
unsigned get_XKeyReleasedEvent_keycode(void *_p) {
  return (unsigned)((XKeyReleasedEvent *)_p)->keycode;
}


x86 assembly (clang, -O0):
<get_XKeyReleasedEvent_keycode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyReleasedEvent_keycode>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define i32 @get_XKeyReleasedEvent_keycode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_XKeyReleasedEvent_keycode(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
void zero_1(double *dat) {
  for (int n = 0; n < 1; ++n) {
    dat[n] = (double)0;
  }
}


x86 assembly (clang, -O0):
<zero_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jge    1137 <zero_1+0x37>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <zero_1+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_1>:
movq   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @zero_1(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load double*, double** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds double, double* %8, i64 %10
store double 0.000000e+00, double* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @zero_1(double* nocapture writeonly %0) {
store double 0.000000e+00, double* %0
ret void
}
unsigned char explicit_voidptr_to_unsigned_char(void *src) {
  return (unsigned char)src;
}


x86 assembly (clang, -O0):
<explicit_voidptr_to_unsigned_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<explicit_voidptr_to_unsigned_char>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define zeroext i8 @explicit_voidptr_to_unsigned_char(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @explicit_voidptr_to_unsigned_char(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i8
ret i8 %3
}
int get_pipe(int *pipes, int index, int io) {
  return *(pipes + (index * 2 + io));
}


x86 assembly (clang, -O0):
<get_pipe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
add    -0x10(%rbp),%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pipe>:
lea    (%rdx,%rsi,2),%eax
cltq
mov    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @get_pipe(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %8, 2
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %7, i64 %12
%14 = load i32, i32* %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @get_pipe(i32* nocapture %0, i32 %1, i32 %2) {
%4 = shl nsw i32 %1, 1
%5 = add nsw i32 %4, %2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
ret i32 %8
}
double _G_R_BETA(const double rr, const double Dx, const double beta) {
  const double r = rr / Dx;
}


x86 assembly (clang, -O0):
<_G_R_BETA>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
divsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_G_R_BETA>:
ret

LLVM IR (-O0):
define double @_G_R_BETA(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%9 = load double, double* %5
%10 = load double, double* %6
%11 = fdiv double %9, %10
store double %11, double* %8
%12 = load double, double* %4
ret double %12
}

LLVM IR (-O2):
define double @_G_R_BETA(double %0, double %1, double %2) {
ret double undef
}
/* Variables and functions */
double sin(double);
double Delta_ET(double year) {
  double delta_et;
  delta_et = 26.465 + 0.747622 * (year - 1950) +
             1.886913 * sin(6.28318530717958623 * (year - 1975) / 33);
  return delta_et;
}


x86 assembly (clang, -O0):
<Delta_ET>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xf06(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xeea(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xec0(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xeac(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xe98(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <sin@plt>
movsd  -0x18(%rbp),%xmm1
movsd  0xe7a(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Delta_ET>:
push   %rax
movsd  0xee7(%rip),%xmm1
addsd  %xmm0,%xmm1
mulsd  0xee3(%rip),%xmm1
addsd  0xee3(%rip),%xmm1
movsd  %xmm1,(%rsp)
addsd  0xede(%rip),%xmm0
mulsd  0xede(%rip),%xmm0
divsd  0xede(%rip),%xmm0
call   1030 <sin@plt>
mulsd  0xed9(%rip),%xmm0
addsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @Delta_ET(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fsub double %4, 1.950000e+03
%6 = call double @llvm.fmuladd.f64(double 7.476220e-01, double %5, double 2.646500e+01)
%7 = load double, double* %2
%8 = fsub double %7, 1.975000e+03
%9 = fmul double 0x401921FB54442D18, %8
%10 = fdiv double %9, 3.300000e+01
%11 = call double @sin(double %10)
%12 = call double @llvm.fmuladd.f64(double 0x3FFE30CBAF965B21, double %11, double %6)
store double %12, double* %3
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
define double @Delta_ET(double %0) {
%2 = fadd double %0, -1.950000e+03
%3 = tail call double @llvm.fmuladd.f64(double %2, double 7.476220e-01, double 2.646500e+01)
%4 = fadd double %0, -1.975000e+03
%5 = fmul double %4, 0x401921FB54442D18
%6 = fdiv double %5, 3.300000e+01
%7 = tail call double @sin(double %6)
%8 = tail call double @llvm.fmuladd.f64(double %7, double 0x3FFE30CBAF965B21, double %3)
ret double %8
}
/* Variables and functions */
int f405(int *);
int f406(int *p) { return f405(p); }


x86 assembly (clang, -O0):
<f406>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f405@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f406>:
jmp    1030 <f405@plt>

LLVM IR (-O0):
define i32 @f406(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f405(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f406(i32* %0) {
%2 = tail call i32 @f405(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ TIOCMGET;
int TIOCM_CTS;
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, int *);
int getCTS(int fd) {
  int s;
  ioctl(fd, TIOCMGET, &s);
  return (s & TIOCM_CTS) != 0;
}


x86 assembly (clang, -O0):
<getCTS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
mov    -0x8(%rbp),%eax
mov    0x2e9e(%rip),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCTS>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <ioctl@plt>
mov    0x2ead(%rip),%rax
mov    (%rax),%ecx
xor    %eax,%eax
and    0x4(%rsp),%ecx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
@TIOCMGET = global i32 0
@TIOCM_CTS = global i32 0
define i32 @getCTS(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @TIOCMGET
%6 = call i32 @ioctl(i32 %4, i32 %5, i32* %3)
%7 = load i32, i32* %3
%8 = load i32, i32* @TIOCM_CTS
%9 = and i32 %7, %8
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@TIOCMGET = global i32 0
@TIOCM_CTS = global i32 0
define i32 @getCTS(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @TIOCMGET
%5 = call i32 @ioctl(i32 %0, i32 %4, i32* %2)
%6 = load i32, i32* %2
%7 = load i32, i32* @TIOCM_CTS
%8 = and i32 %7, %6
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ errx(int const, char *);
void usage(const int code) {
  errx(code, "Usage: bkc [-h46] -r dir -a host -p port");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <errx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rsi
jmp    1030 <errx@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"Usage: bkc [-h46] -r dir -a host -p port\00"
define void @usage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @errx(i32 %3, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"Usage: bkc [-h46] -r dir -a host -p port\00"
define void @usage(i32 %0) {
%2 = tail call i32 @errx(i32 %0, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}
int util_number_is_power_2(unsigned input) {
  unsigned minus1;
  if (!input)
    return 0;
  minus1 = input - 1;
  return ((input | minus1) == (input ^ minus1)) ? 1 : 0;
}


x86 assembly (clang, -O0):
<util_number_is_power_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <util_number_is_power_2+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1141 <util_number_is_power_2+0x41>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edx
or     -0xc(%rbp),%edx
mov    -0x8(%rbp),%esi
xor    -0xc(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_number_is_power_2>:
test   %edi,%edi
je     1115 <util_number_is_power_2+0x15>
lea    -0x1(%rdi),%ecx
mov    %ecx,%edx
or     %edi,%edx
xor    %edi,%ecx
xor    %eax,%eax
cmp    %ecx,%edx
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @util_number_is_power_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %20
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub i32 %9, 1
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = or i32 %11, %12
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = xor i32 %14, %15
%17 = icmp eq i32 %13, %16
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 1, i32 0
store i32 %19, i32* %2
br label %20
20: ; preds = %8, %7
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @util_number_is_power_2(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = or i32 %4, %0
%6 = xor i32 %4, %0
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ 0, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ end_conn(int);
void got_connection_er(int fd, void *data) {
  end_conn(fd);
  end_conn(((int)(intptr_t)(data)));
}


x86 assembly (clang, -O0):
<got_connection_er>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <end_conn@plt>
mov    -0x10(%rbp),%rax
mov    %eax,%edi
call   1030 <end_conn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<got_connection_er>:
push   %rbx
mov    %rsi,%rbx
call   1030 <end_conn@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <end_conn@plt>

LLVM IR (-O0):
define void @got_connection_er(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @end_conn(i32 %5)
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = trunc i64 %8 to i32
%10 = call i32 @end_conn(i32 %9)
ret void
}

LLVM IR (-O2):
define void @got_connection_er(i32 %0, i8* %1) {
%3 = tail call i32 @end_conn(i32 %0)
%4 = ptrtoint i8* %1 to i64
%5 = trunc i64 %4 to i32
%6 = tail call i32 @end_conn(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int testBitAbsolute();
int testBitZeropage();
void testBit() {
  printf("testBitZeropage: %d\r\n", testBitZeropage());
  printf("testBitAbsolute: %d\r\n", testBitAbsolute());
}


x86 assembly (clang, -O0):
<testBit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <testBitZeropage@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <testBitAbsolute@plt>
mov    %eax,%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testBit>:
push   %rax
xor    %eax,%eax
call   1050 <testBitZeropage@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <testBitAbsolute@plt>
lea    0xec2(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"testBitZeropage: %d\0D\0A\00"
@.str.1 = [22 x i8] c"testBitAbsolute: %d\0D\0A\00"
define void @testBit() {
%1 = call i32 (...) @testBitZeropage()
%2 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @testBitAbsolute()
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"testBitZeropage: %d\0D\0A\00"
@.str.1 = [22 x i8] c"testBitAbsolute: %d\0D\0A\00"
define void @testBit() {
%1 = tail call i32 (...) @testBitZeropage()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @testBitAbsolute()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dtoi(float);
int /*<<< orphan*/ g2_detach(int /*<<< orphan*/, int /*<<< orphan*/);
void g2_detach_(float *vd_dev, float *dev) {
  g2_detach(dtoi(*vd_dev), dtoi(*dev));
}


x86 assembly (clang, -O0):
<g2_detach_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <dtoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <dtoi@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
call   1040 <g2_detach@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_detach_>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1030 <dtoi@plt>
mov    %eax,%ebp
movss  (%rbx),%xmm0
call   1030 <dtoi@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <g2_detach@plt>

LLVM IR (-O0):
define void @g2_detach_(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = call i32 @dtoi(float %6)
%8 = load float*, float** %4
%9 = load float, float* %8
%10 = call i32 @dtoi(float %9)
%11 = call i32 @g2_detach(i32 %7, i32 %10)
ret void
}

LLVM IR (-O2):
define void @g2_detach_(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = tail call i32 @dtoi(float %3)
%5 = load float, float* %1
%6 = tail call i32 @dtoi(float %5)
%7 = tail call i32 @g2_detach(i32 %4, i32 %6)
ret void
}
int _xdg_utf8_validate(const char *source) {
  (void)source;
  return (!(0));
}


x86 assembly (clang, -O0):
<_xdg_utf8_validate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_xdg_utf8_validate>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_xdg_utf8_validate(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @_xdg_utf8_validate(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
unsigned long atoi(char const *);
unsigned long read_turns(const char *num) { return atoi(num); }


x86 assembly (clang, -O0):
<read_turns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_turns>:
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i64 @read_turns(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @atoi(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @read_turns(i8* nocapture %0) {
%2 = tail call i64 @atoi(i8* %0)
ret i64 %2
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int padcon_get_quaddobl_closest_pole(double *cre, double *cim) {
  int fail;
  int precision = 2;
  int *b;
  double nbr[2];
  fail = _ada_use_c2phc4c(866, &precision, b, nbr, 0);
  *cre = nbr[0];
  *cim = nbr[1];
  return fail;
}


x86 assembly (clang, -O0):
<padcon_get_quaddobl_closest_pole>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x2,-0x18(%rbp)
mov    -0x20(%rbp),%rdx
lea    -0x30(%rbp),%rcx
mov    $0x362,%edi
lea    -0x18(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
movsd  -0x30(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x28(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x14(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padcon_get_quaddobl_closest_pole>:
push   %r14
push   %rbx
sub    $0x28,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
movl   $0x2,0xc(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rcx
mov    $0x362,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
movsd  0x10(%rsp),%xmm0
movsd  %xmm0,(%rbx)
movsd  0x18(%rsp),%xmm0
movsd  %xmm0,(%r14)
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @padcon_get_quaddobl_closest_pole(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca [2 x double]
store double* %0, double** %3
store double* %1, double** %4
store i32 2, i32* %6
%9 = load i32*, i32** %7
%10 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
%11 = call i32 @_ada_use_c2phc4c(i32 866, i32* %6, i32* %9, double* %10, i32 0)
store i32 %11, i32* %5
%12 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
%13 = load double, double* %12
%14 = load double*, double** %3
store double %13, double* %14
%15 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 1
%16 = load double, double* %15
%17 = load double*, double** %4
store double %16, double* %17
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @padcon_get_quaddobl_closest_pole(double* nocapture writeonly %0, double* nocapture writeonly %1) {
%3 = alloca i32
%4 = alloca [2 x double]
%5 = bitcast i32* %3 to i8*
store i32 2, i32* %3
%6 = bitcast [2 x double]* %4 to i8*
%7 = getelementptr inbounds [2 x double], [2 x double]* %4, i64 0, i64 0
%8 = call i32 @_ada_use_c2phc4c(i32 866, i32* %3, i32* undef, double* %7, i32 0)
%9 = load double, double* %7
store double %9, double* %0
%10 = getelementptr inbounds [2 x double], [2 x double]* %4, i64 0, i64 1
%11 = load double, double* %10
store double %11, double* %1
ret i32 %8
}
int test_imm_02uint16_reg(unsigned short val) {
  return ((val) & (0x02 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_02uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_02uint16_reg>:
test   $0x2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_02uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 2
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_02uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 2
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct t_arraylist {
  int dummy;
};

/* Variables and functions */
int arraylist_insert(struct t_arraylist *, int, void *);
int arraylist_add(struct t_arraylist *arraylist, void *pointer) {
  if (!arraylist)
    return -1;
  return arraylist_insert(arraylist, -1, pointer);
}


x86 assembly (clang, -O0):
<arraylist_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1137 <arraylist_add+0x27>
movl   $0xffffffff,-0x4(%rbp)
jmp    114c <arraylist_add+0x3c>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    $0xffffffff,%esi
call   1030 <arraylist_insert@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arraylist_add>:
test   %rdi,%rdi
je     1122 <arraylist_add+0x12>
mov    %rsi,%rdx
mov    $0xffffffff,%esi
jmp    1030 <arraylist_insert@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.t_arraylist = type { i32 }
define i32 @arraylist_add(%struct.t_arraylist* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.t_arraylist*
%5 = alloca i8*
store %struct.t_arraylist* %0, %struct.t_arraylist** %4
store i8* %1, i8** %5
%6 = load %struct.t_arraylist*, %struct.t_arraylist** %4
%7 = icmp ne %struct.t_arraylist* %6, null
br i1 %7, label %9, label %8
8: ; preds = %2
store i32 -1, i32* %3
br label %13
9: ; preds = %2
%10 = load %struct.t_arraylist*, %struct.t_arraylist** %4
%11 = load i8*, i8** %5
%12 = call i32 @arraylist_insert(%struct.t_arraylist* %10, i32 -1, i8* %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
%struct.t_arraylist = type { i32 }
define i32 @arraylist_add(%struct.t_arraylist* %0, i8* %1) {
%3 = icmp eq %struct.t_arraylist* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @arraylist_insert(%struct.t_arraylist* %0, i32 -1, i8* %1)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ -1, %2 ]
ret i32 %7
}
float fastpow(float base, int expo) {
  float ans;
  if (expo <= 0)
    ans = 1;
  while (expo > 0) {
    if (expo % 2)
      ans *= base;
    base *= base;
    expo >>= 1;
  }
  return ans;
}


x86 assembly (clang, -O0):
<fastpow>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1123 <fastpow+0x23>
movss  0xee2(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1128 <fastpow+0x28>
cmpl   $0x0,-0x8(%rbp)
jle    1172 <fastpow+0x72>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1155 <fastpow+0x55>
movss  -0x4(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1128 <fastpow+0x28>
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastpow>:
test   %edi,%edi
jle    1145 <fastpow+0x45>
movss  0xef4(%rip),%xmm2
movaps %xmm2,%xmm1
jmp    1133 <fastpow+0x33>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mulss  %xmm3,%xmm1
mulss  %xmm0,%xmm0
mov    %edi,%eax
shr    %eax
cmp    $0x1,%edi
mov    %eax,%edi
jbe    1141 <fastpow+0x41>
movaps %xmm2,%xmm3
test   $0x1,%dil
je     1120 <fastpow+0x20>
movaps %xmm0,%xmm3
jmp    1120 <fastpow+0x20>
movaps %xmm1,%xmm0
ret
movss  0xeb3(%rip),%xmm0
ret

LLVM IR (-O0):
define float @fastpow(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
%5 = alloca float
store float %0, float* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp sle i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store float 1.000000e+00, float* %5
br label %9
9: ; preds = %8, %2
br label %10
10: ; preds = %21, %9
%11 = load i32, i32* %4
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %27
13: ; preds = %10
%14 = load i32, i32* %4
%15 = srem i32 %14, 2
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %13
%18 = load float, float* %3
%19 = load float, float* %5
%20 = fmul float %19, %18
store float %20, float* %5
br label %21
21: ; preds = %17, %13
%22 = load float, float* %3
%23 = load float, float* %3
%24 = fmul float %23, %22
store float %24, float* %3
%25 = load i32, i32* %4
%26 = ashr i32 %25, 1
store i32 %26, i32* %4
br label %10
27: ; preds = %10
%28 = load float, float* %5
ret float %28
}

LLVM IR (-O2):
define float @fastpow(float %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %15
4: ; preds = %2, %4
%5 = phi float [ %11, %4 ], [ 1.000000e+00, %2 ]
%6 = phi i32 [ %13, %4 ], [ %1, %2 ]
%7 = phi float [ %12, %4 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, float 1.000000e+00, float %7
%11 = fmul float %5, %10
%12 = fmul float %7, %7
%13 = lshr i32 %6, 1
%14 = icmp ult i32 %6, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi float [ 1.000000e+00, %2 ], [ %11, %4 ]
ret float %16
}
void gic_set_irq_secure(unsigned int irq) {}


x86 assembly (clang, -O0):
<gic_set_irq_secure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gic_set_irq_secure>:
ret

LLVM IR (-O0):
define void @gic_set_irq_secure(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gic_set_irq_secure(i32 %0) {
ret void
}
/* Variables and functions */
int coprthr_dmsync(void *ptr, size_t sizeb, int flags) {}


x86 assembly (clang, -O0):
<coprthr_dmsync>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<coprthr_dmsync>:
ret

LLVM IR (-O0):
define i32 @coprthr_dmsync(i8* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @coprthr_dmsync(i8* nocapture readnone %0, i64 %1, i32 %2) {
ret i32 undef
}
void ShowIOC(void) {}


x86 assembly (clang, -O0):
<ShowIOC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShowIOC>:
ret

LLVM IR (-O0):
define void @ShowIOC() {
ret void
}

LLVM IR (-O2):
define void @ShowIOC() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initfirstSerial();
int /*<<< orphan*/ initsecondSerial();
int /*<<< orphan*/ system(char *);
int main(void) {
  system(". dialscript3.sh");
  initfirstSerial();
  initsecondSerial();
  while (1) {
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <system@plt>
mov    $0x0,%al
call   1040 <initfirstSerial@plt>
mov    $0x0,%al
call   1050 <initsecondSerial@plt>
jmp    1159 <main+0x29>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
call   1040 <initfirstSerial@plt>
xor    %eax,%eax
call   1050 <initsecondSerial@plt>
nopl   0x0(%rax,%rax,1)
jmp    1150 <main+0x20>

LLVM IR (-O0):
@.str = [17 x i8] c". dialscript3.sh\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @initfirstSerial()
%4 = call i32 (...) @initsecondSerial()
br label %5
5: ; preds = %0, %5
br label %5
}

LLVM IR (-O2):
@.str = [17 x i8] c". dialscript3.sh\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @initfirstSerial()
%3 = tail call i32 (...) @initsecondSerial()
br label %4
4: ; preds = %0, %4
br label %4
}
/* Variables and functions */
float __llvm_amdgcn_rcp_f32(float);
float __frcp_ru(float x) { return __llvm_amdgcn_rcp_f32(x); }


x86 assembly (clang, -O0):
<__frcp_ru>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__llvm_amdgcn_rcp_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__frcp_ru>:
jmp    1030 <__llvm_amdgcn_rcp_f32@plt>

LLVM IR (-O0):
define float @__frcp_ru(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__llvm_amdgcn_rcp_f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @__frcp_ru(float %0) {
%2 = tail call float @__llvm_amdgcn_rcp_f32(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
void set_seed(unsigned int seed) { srand(seed); }


x86 assembly (clang, -O0):
<set_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_seed>:
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @set_seed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @srand(i32 %3)
ret void
}

LLVM IR (-O2):
define void @set_seed(i32 %0) {
%2 = tail call i32 @srand(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ crossprod(float *, float *, float *);
int /*<<< orphan*/ normalize(float *);
void normcrossprod(float *v1, float *v2, float *out) {
  crossprod(v1, v2, out);
  normalize(out);
}


x86 assembly (clang, -O0):
<normcrossprod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <crossprod@plt>
mov    -0x18(%rbp),%rdi
call   1030 <normalize@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<normcrossprod>:
push   %rbx
mov    %rdx,%rbx
call   1040 <crossprod@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <normalize@plt>

LLVM IR (-O0):
define void @normcrossprod(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float*, float** %5
%9 = load float*, float** %6
%10 = call i32 @crossprod(float* %7, float* %8, float* %9)
%11 = load float*, float** %6
%12 = call i32 @normalize(float* %11)
ret void
}

LLVM IR (-O2):
define void @normcrossprod(float* %0, float* %1, float* %2) {
%4 = tail call i32 @crossprod(float* %0, float* %1, float* %2)
%5 = tail call i32 @normalize(float* %2)
ret void
}
double GetTKelvinFromTCelsius(double T_C) { return T_C + 273.15; }


x86 assembly (clang, -O0):
<GetTKelvinFromTCelsius>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetTKelvinFromTCelsius>:
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @GetTKelvinFromTCelsius(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 2.731500e+02
ret double %4
}

LLVM IR (-O2):
define double @GetTKelvinFromTCelsius(double %0) {
%2 = fadd double %0, 2.731500e+02
ret double %2
}
int test_imm_60uint8_reg(unsigned char val) {
  return ((val) & (0x60 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_60uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x60,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_60uint8_reg>:
test   $0x60,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_60uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 96
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_60uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 96
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char *strcat(char *s1, const char *s2) {
  char *tmp = s1;
  char *tmp2 = (char *)s2;
  while (*tmp)
    tmp++;
  while (*tmp2)
    *tmp++ = *tmp2++;
  return s1;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     113a <strcat+0x3a>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111c <strcat+0x1c>
jmp    113f <strcat+0x3f>
mov    -0x20(%rbp),%rax
cmpb   $0x0,(%rax)
je     1173 <strcat+0x73>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    113f <strcat+0x3f>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
cmpb   $0x0,(%rcx)
lea    0x1(%rcx),%rcx
jne    1110 <strcat+0x10>
mov    (%rsi),%dl
test   %dl,%dl
je     1141 <strcat+0x41>
xor    %edi,%edi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %dl,-0x1(%rcx,%rdi,1)
movzbl 0x1(%rsi,%rdi,1),%edx
add    $0x1,%rdi
test   %dl,%dl
jne    1130 <strcat+0x30>
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
br label %9
9: ; preds = %13, %2
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
br label %9
16: ; preds = %9
br label %17
17: ; preds = %21, %16
%18 = load i8*, i8** %6
%19 = load i8, i8* %18
%20 = icmp ne i8 %19, 0
br i1 %20, label %21, label %27
21: ; preds = %17
%22 = load i8*, i8** %6
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %6
%24 = load i8, i8* %22
%25 = load i8*, i8** %5
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %5
store i8 %24, i8* %25
br label %17
27: ; preds = %17
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = load i8, i8* %1
%10 = icmp eq i8 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %8, %11
%12 = phi i8 [ %17, %11 ], [ %9, %8 ]
%13 = phi i8* [ %15, %11 ], [ %1, %8 ]
%14 = phi i8* [ %16, %11 ], [ %4, %8 ]
%15 = getelementptr inbounds i8, i8* %13, i64 1
%16 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %12, i8* %14
%17 = load i8, i8* %15
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %11
19: ; preds = %11, %8
ret i8* %0
}