xunge/DecIR huggingface dataset:
/* Variables and functions */
void *kh_init_str2int();
void *khash_str2int_init(void) { return kh_init_str2int(); }


x86 assembly (clang, -O0):
<khash_str2int_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <kh_init_str2int@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<khash_str2int_init>:
xor    %eax,%eax
jmp    1030 <kh_init_str2int@plt>

LLVM IR (-O0):
define i8* @khash_str2int_init() {
%1 = call i8* (...) @kh_init_str2int()
ret i8* %1
}

LLVM IR (-O2):
define i8* @khash_str2int_init() {
%1 = tail call i8* (...) @kh_init_str2int()
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
scalar_t__ xmalloc(scalar_t__);
char *xstrdup(const char *s) {
  char *ptr = (char *)xmalloc(strlen(s) + 1);
  strcpy(ptr, s);
  return (char *)ptr;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @xmalloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = load i8*, i8** %2
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @xmalloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main(void) { printf("hell world\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"hell world\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"hell world\00"
define void @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, unsigned char);
void sprint_mov_atRi_to_direct(char *str, unsigned char i, uint8_t direct) {
  sprintf(str,
          "MOV   "
          "0x%02X"
          ", @R%X                 ",
          direct, i);
}


x86 assembly (clang, -O0):
<sprint_mov_atRi_to_direct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
lea    0xecd(%rip),%rsi
movzbl -0x9(%rbp),%ecx
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_mov_atRi_to_direct>:
mov    %esi,%ecx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"MOV 0x%02X, @R%X \00"
define void @sprint_mov_atRi_to_direct(i8* %0, i8 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %6
%9 = load i8, i8* %5
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %8, i8 zeroext %9)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"MOV 0x%02X, @R%X \00"
define void @sprint_mov_atRi_to_direct(i8* nocapture writeonly %0, i8 zeroext %1, i32 %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %2, i8 zeroext %1)
ret void
}
char *preinc(char *base) {
  ++base;
  return base;
}


x86 assembly (clang, -O0):
<preinc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<preinc>:
lea    0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @preinc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i32 1
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @preinc(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
ret i8* %2
}
int is_legal(int x, int y) {
  return ((x >= 0) && (y >= 0) && (x < 80) && (y < 21));
}


x86 assembly (clang, -O0):
<is_legal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jl     1141 <is_legal+0x41>
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jl     1141 <is_legal+0x41>
xor    %eax,%eax
cmpl   $0x50,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jge    1141 <is_legal+0x41>
cmpl   $0x15,-0x8(%rbp)
setl   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_legal>:
mov    %esi,%eax
or     %edi,%eax
setns  %al
cmp    $0x50,%edi
setl   %cl
and    %al,%cl
cmp    $0x15,%esi
setl   %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_legal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp slt i32 %11, 80
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 21
br label %16
16: ; preds = %13, %10, %7, %2
%17 = phi i1 [ false, %10 ], [ false, %7 ], [ false, %2 ], [ %15, %13 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_legal(i32 %0, i32 %1) {
%3 = or i32 %1, %0
%4 = icmp sgt i32 %3, -1
%5 = icmp slt i32 %0, 80
%6 = and i1 %5, %4
%7 = icmp slt i32 %1, 21
%8 = and i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
int test() {
  double x = 2;
  x /= 3;
  int false1 = 0.2 > x;
  int true1 = 0.3 < x;
  int true2 = 0.3 != 3.2;
  return (true1 && true2 && false1 == 0) ? 0 : 1;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
movsd  0xf0c(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xef2(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xed9(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeb4(%rip),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x10(%rbp)
mov    %al,-0x15(%rbp)
je     118a <test+0x8a>
xor    %eax,%eax
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x15(%rbp)
je     118a <test+0x8a>
cmpl   $0x0,-0xc(%rbp)
sete   %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%dl
mov    $0x1,%eax
xor    %ecx,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test() {
%1 = alloca double
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store double 2.000000e+00, double* %1
%5 = load double, double* %1
%6 = fdiv double %5, 3.000000e+00
store double %6, double* %1
%7 = load double, double* %1
%8 = fcmp ogt double 2.000000e-01, %7
%9 = zext i1 %8 to i32
store i32 %9, i32* %2
%10 = load double, double* %1
%11 = fcmp olt double 3.000000e-01, %10
%12 = zext i1 %11 to i32
store i32 %12, i32* %3
store i32 1, i32* %4
%13 = load i32, i32* %3
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %21
15: ; preds = %0
%16 = load i32, i32* %4
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i32, i32* %2
%20 = icmp eq i32 %19, 0
br label %21
21: ; preds = %18, %15, %0
%22 = phi i1 [ false, %15 ], [ false, %0 ], [ %20, %18 ]
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 0, i32 1
ret i32 %24
}

LLVM IR (-O2):
define i32 @test() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ hd44780_extif_data_set(int /*<<< orphan*/);
int /*<<< orphan*/ hd44780_extif_pin_rw(int /*<<< orphan*/);
int /*<<< orphan*/ hd44780_extif_wait_1us(int);
int /*<<< orphan*/ hd44780_ll_enable_pulse();
int /*<<< orphan*/ hd44780_ll_select_register(int /*<<< orphan*/);
void hd44780_ll_register_write_ifs(uint8_t data) {
  hd44780_ll_select_register(0);
  hd44780_extif_pin_rw(0);
  hd44780_extif_wait_1us(1);
  hd44780_extif_data_set(data);
  hd44780_ll_enable_pulse();
}


x86 assembly (clang, -O0):
<hd44780_ll_register_write_ifs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <hd44780_ll_select_register@plt>
xor    %edi,%edi
call   1070 <hd44780_extif_pin_rw@plt>
mov    $0x1,%edi
call   1050 <hd44780_extif_wait_1us@plt>
mov    -0x4(%rbp),%edi
call   1060 <hd44780_extif_data_set@plt>
mov    $0x0,%al
call   1040 <hd44780_ll_enable_pulse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hd44780_ll_register_write_ifs>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <hd44780_ll_select_register@plt>
xor    %edi,%edi
call   1070 <hd44780_extif_pin_rw@plt>
mov    $0x1,%edi
call   1050 <hd44780_extif_wait_1us@plt>
mov    %ebx,%edi
call   1060 <hd44780_extif_data_set@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <hd44780_ll_enable_pulse@plt>

LLVM IR (-O0):
define void @hd44780_ll_register_write_ifs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @hd44780_ll_select_register(i32 0)
%4 = call i32 @hd44780_extif_pin_rw(i32 0)
%5 = call i32 @hd44780_extif_wait_1us(i32 1)
%6 = load i32, i32* %2
%7 = call i32 @hd44780_extif_data_set(i32 %6)
%8 = call i32 (...) @hd44780_ll_enable_pulse()
ret void
}

LLVM IR (-O2):
define void @hd44780_ll_register_write_ifs(i32 %0) {
%2 = tail call i32 @hd44780_ll_select_register(i32 0)
%3 = tail call i32 @hd44780_extif_pin_rw(i32 0)
%4 = tail call i32 @hd44780_extif_wait_1us(i32 1)
%5 = tail call i32 @hd44780_extif_data_set(i32 %0)
%6 = tail call i32 (...) @hd44780_ll_enable_pulse()
ret void
}
int _kill(int pid, int sig) { return (-1); }


x86 assembly (clang, -O0):
<_kill>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_kill>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @_kill(i32 %0, i32 %1) {
ret i32 -1
}
/* Variables and functions */
scalar_t__ prefix(char const *, char *);
const char *strip_ego_name(const char *name) {
  if (prefix(name, "of the "))
    return name + 7;
  if (prefix(name, "of "))
    return name + 3;
  return name;
}


x86 assembly (clang, -O0):
<strip_ego_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <prefix@plt>
cmp    $0x0,%rax
je     1147 <strip_ego_name+0x37>
mov    -0x10(%rbp),%rax
add    $0x7,%rax
mov    %rax,-0x8(%rbp)
jmp    117a <strip_ego_name+0x6a>
mov    -0x10(%rbp),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <prefix@plt>
cmp    $0x0,%rax
je     1172 <strip_ego_name+0x62>
mov    -0x10(%rbp),%rax
add    $0x3,%rax
mov    %rax,-0x8(%rbp)
jmp    117a <strip_ego_name+0x6a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strip_ego_name>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <prefix@plt>
mov    $0x7,%ecx
test   %rax,%rax
jne    1145 <strip_ego_name+0x35>
lea    0xed7(%rip),%rsi
mov    %rbx,%rdi
call   1030 <prefix@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
lea    (%rcx,%rcx,2),%rcx
add    %rcx,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"of the \00"
@.str.1 = [4 x i8] c"of \00"
define i8* @strip_ego_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @prefix(i8* %4, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 7
store i8* %9, i8** %2
br label %19
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = call i64 @prefix(i8* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 3
store i8* %16, i8** %2
br label %19
17: ; preds = %10
%18 = load i8*, i8** %3
store i8* %18, i8** %2
br label %19
19: ; preds = %17, %14, %7
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
@.str = [8 x i8] c"of the \00"
@.str.1 = [4 x i8] c"of \00"
define i8* @strip_ego_name(i8* %0) {
%2 = tail call i64 @prefix(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @prefix(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i64 0, i64 3
br label %8
8: ; preds = %1, %4
%9 = phi i64 [ %7, %4 ], [ 7, %1 ]
%10 = getelementptr i8, i8* %0, i64 %9
ret i8* %10
}
void outbyte(int c) {
  volatile int *rxstat;
  volatile int *rxadata;
  int rxmask;
  rxstat = (int *)0x01F800E8;
  rxadata = (int *)0x01F800E0;
  rxmask = 6;
  while ((*rxstat & rxmask) == 0)
    ;
  *rxadata = c;
}


x86 assembly (clang, -O0):
<outbyte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1f800e8,%eax
mov    %rax,-0x10(%rbp)
mov    $0x1f800e0,%eax
mov    %rax,-0x18(%rbp)
movl   $0x6,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    -0x1c(%rbp),%eax
cmp    $0x0,%eax
jne    1137 <outbyte+0x37>
jmp    1120 <outbyte+0x20>
mov    -0x4(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outbyte>:
testl  $0x6,0x1f800e8
je     1100 <outbyte>
mov    %edi,0x1f800e0
ret

LLVM IR (-O0):
define void @outbyte(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %2
store i32* inttoptr (i64 33030376 to i32*), i32** %3
store i32* inttoptr (i64 33030368 to i32*), i32** %4
store i32 6, i32* %5
br label %6
6: ; preds = %12, %1
%7 = load i32*, i32** %3
%8 = load volatile i32, i32* %7
%9 = load i32, i32* %5
%10 = and i32 %8, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %6
br label %6
13: ; preds = %6
%14 = load i32, i32* %2
%15 = load i32*, i32** %4
store volatile i32 %14, i32* %15
ret void
}

LLVM IR (-O2):
define void @outbyte(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 33030376 to i32*)
%4 = and i32 %3, 6
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
store volatile i32 %0, i32* inttoptr (i64 33030368 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LedsP__Led1__set();
void LedsP__Leds__led1Off(void) {
  LedsP__Led1__set();
  ;
  ;
}


x86 assembly (clang, -O0):
<LedsP__Leds__led1Off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LedsP__Led1__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Leds__led1Off>:
xor    %eax,%eax
jmp    1030 <LedsP__Led1__set@plt>

LLVM IR (-O0):
define void @LedsP__Leds__led1Off() {
%1 = call i32 (...) @LedsP__Led1__set()
ret void
}

LLVM IR (-O2):
define void @LedsP__Leds__led1Off() {
%1 = tail call i32 (...) @LedsP__Led1__set()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stringShouldConvertedToNullCoord(char *);
void invalidStringsConvertedToNullCoord(void) {
  stringShouldConvertedToNullCoord("45");
  stringShouldConvertedToNullCoord("ff");
  stringShouldConvertedToNullCoord("X16");
}


x86 assembly (clang, -O0):
<invalidStringsConvertedToNullCoord>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <stringShouldConvertedToNullCoord@plt>
lea    0xedc(%rip),%rdi
call   1030 <stringShouldConvertedToNullCoord@plt>
lea    0xed3(%rip),%rdi
call   1030 <stringShouldConvertedToNullCoord@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalidStringsConvertedToNullCoord>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <stringShouldConvertedToNullCoord@plt>
lea    0xedf(%rip),%rdi
call   1030 <stringShouldConvertedToNullCoord@plt>
lea    0xed6(%rip),%rdi
pop    %rax
jmp    1030 <stringShouldConvertedToNullCoord@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"45\00"
@.str.1 = [3 x i8] c"ff\00"
@.str.2 = [4 x i8] c"X16\00"
define void @invalidStringsConvertedToNullCoord() {
%1 = call i32 @stringShouldConvertedToNullCoord(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @stringShouldConvertedToNullCoord(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @stringShouldConvertedToNullCoord(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"45\00"
@.str.1 = [3 x i8] c"ff\00"
@.str.2 = [4 x i8] c"X16\00"
define void @invalidStringsConvertedToNullCoord() {
%1 = tail call i32 @stringShouldConvertedToNullCoord(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @stringShouldConvertedToNullCoord(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @stringShouldConvertedToNullCoord(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ Char_2d_array(int, int);
short **Short_2d_array(int i_size, int j_size) {
  return ((short **)Char_2d_array(i_size, j_size * sizeof(short)));
}


x86 assembly (clang, -O0):
<Short_2d_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
movslq -0x8(%rbp),%rax
shl    $0x1,%rax
mov    %eax,%esi
call   1030 <Char_2d_array@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Short_2d_array>:
add    %esi,%esi
jmp    1030 <Char_2d_array@plt>

LLVM IR (-O0):
define i16** @Short_2d_array(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 2
%9 = trunc i64 %8 to i32
%10 = call i64 @Char_2d_array(i32 %5, i32 %9)
%11 = inttoptr i64 %10 to i16**
ret i16** %11
}

LLVM IR (-O2):
define i16** @Short_2d_array(i32 %0, i32 %1) {
%3 = shl i32 %1, 1
%4 = tail call i64 @Char_2d_array(i32 %0, i32 %3)
%5 = inttoptr i64 %4 to i16**
ret i16** %5
}
int swap(int *a, int *b) {
  int t = *a;
  *a = *b;
  *b = t;
  return 0;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int _UARTBaseValid(int);
void UARTClockSourceSet(uint32_t ui32Base, uint32_t ui32Source) {
  ASSERT(_UARTBaseValid(ui32Base));
  ASSERT((ui32Source == 0x00000000) || (ui32Source == 0x00000005));
  (*((volatile uint32_t *)(ui32Base + 0x00000FC8))) = ui32Source;
}


x86 assembly (clang, -O0):
<UARTClockSourceSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1156 <UARTClockSourceSet+0x36>
cmpl   $0x5,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xfc8,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTClockSourceSet>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
test   %ebx,%ebx
sete   %al
cmp    $0x5,%ebx
sete   %cl
or     %al,%cl
movzbl %cl,%edi
call   1040 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0xfc8(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @UARTClockSourceSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @_UARTBaseValid(i32 %5)
%7 = call i32 @ASSERT(i32 %6)
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i32, i32* %4
%12 = icmp eq i32 %11, 5
br label %13
13: ; preds = %10, %2
%14 = phi i1 [ true, %2 ], [ %12, %10 ]
%15 = zext i1 %14 to i32
%16 = call i32 @ASSERT(i32 %15)
%17 = load i32, i32* %4
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 4040
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 %17, i32* %21
ret void
}

LLVM IR (-O2):
define void @UARTClockSourceSet(i32 %0, i32 %1) {
%3 = tail call i32 @_UARTBaseValid(i32 %0)
%4 = tail call i32 @ASSERT(i32 %3)
%5 = icmp eq i32 %1, 0
%6 = icmp eq i32 %1, 5
%7 = or i1 %5, %6
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 4040
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %1, i32* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exitf(char *);
void unreachable() { exitf("unreachable code was reached"); }


x86 assembly (clang, -O0):
<unreachable>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <exitf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unreachable>:
lea    0xee9(%rip),%rdi
jmp    1030 <exitf@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"unreachable code was reached\00"
define void @unreachable() {
%1 = call i32 @exitf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"unreachable code was reached\00"
define void @unreachable() {
%1 = tail call i32 @exitf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printer_set_fan_speed(int /*<<< orphan*/);
int M107_f(char *s) {
  printer_set_fan_speed(0);
  return 1;
}


x86 assembly (clang, -O0):
<M107_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <printer_set_fan_speed@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M107_f>:
push   %rax
xor    %edi,%edi
call   1030 <printer_set_fan_speed@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @M107_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printer_set_fan_speed(i32 0)
ret i32 1
}

LLVM IR (-O2):
define i32 @M107_f(i8* nocapture readnone %0) {
%2 = tail call i32 @printer_set_fan_speed(i32 0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, int);
void signal_handler(int x) {
  printf("\nCaught signal %d, writing config file and exiting...\n", x);
  cleanup();
  exit(x);
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <cleanup@plt>
mov    -0x4(%rbp),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<signal_handler>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <cleanup@plt>
mov    %ebx,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [55 x i8] c"\0ACaught signal %d, writing config file and exiting...\0A\00"
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 (...) @cleanup()
%6 = load i32, i32* %2
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@.str = [55 x i8] c"\0ACaught signal %d, writing config file and exiting...\0A\00"
define void @signal_handler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 (...) @cleanup()
%4 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
char *p2_table(unsigned int);
int /*<<< orphan*/ snprintf(char *, unsigned int, char *, char *);
char *ipv6_prefix_to_hosts(char *hosts, unsigned hosts_size, unsigned prefix) {
  snprintf(hosts, hosts_size, "%s", p2_table(128 - prefix));
  return hosts;
}


x86 assembly (clang, -O0):
<ipv6_prefix_to_hosts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    $0x80,%edi
sub    -0x10(%rbp),%edi
call   1040 <p2_table@plt>
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    %rax,%rcx
lea    0xea2(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipv6_prefix_to_hosts>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x80,%edi
sub    %edx,%edi
call   1040 <p2_table@plt>
lea    0xec5(%rip),%rdx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %rax,%rcx
call   1030 <snprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i8* @ipv6_prefix_to_hosts(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = sub i32 128, %9
%11 = call i8* @p2_table(i32 %10)
%12 = call i32 @snprintf(i8* %7, i32 %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i8* @ipv6_prefix_to_hosts(i8* returned %0, i32 %1, i32 %2) {
%4 = sub i32 128, %2
%5 = tail call i8* @p2_table(i32 %4)
%6 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i8* %0
}
/* Type definitions */
struct Hero {
  int dummy;
};
struct Ability {
  int dummy;
};

/* Variables and functions */
int Hero_checkAbilityRandom(struct Hero *, int);
int HuBenBiFa_check(struct Ability *self, struct Hero *attacker) {
  return (Hero_checkAbilityRandom(attacker, 30));
}


x86 assembly (clang, -O0):
<HuBenBiFa_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1e,%esi
call   1030 <Hero_checkAbilityRandom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HuBenBiFa_check>:
mov    %rsi,%rdi
mov    $0x1e,%esi
jmp    1030 <Hero_checkAbilityRandom@plt>

LLVM IR (-O0):
%struct.Ability = type { i32 }
%struct.Hero = type { i32 }
define i32 @HuBenBiFa_check(%struct.Ability* %0, %struct.Hero* %1) {
%3 = alloca %struct.Ability*
%4 = alloca %struct.Hero*
store %struct.Ability* %0, %struct.Ability** %3
store %struct.Hero* %1, %struct.Hero** %4
%5 = load %struct.Hero*, %struct.Hero** %4
%6 = call i32 @Hero_checkAbilityRandom(%struct.Hero* %5, i32 30)
ret i32 %6
}

LLVM IR (-O2):
%struct.Ability = type { i32 }
%struct.Hero = type { i32 }
define i32 @HuBenBiFa_check(%struct.Ability* nocapture readnone %0, %struct.Hero* %1) {
%3 = tail call i32 @Hero_checkAbilityRandom(%struct.Hero* %1, i32 30)
ret i32 %3
}
void gf8mul_00000100(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm7, %xmm2\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm6, %xmm1\n"
                       "\tpxor    %xmm5, %xmm7\n"
                       "\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm4, %xmm6\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm3, %xmm5\n"
                       "\tpxor    %xmm5, %xmm3\n"
                       "\tpxor    %xmm2, %xmm4\n"
                       "\tpxor    %xmm4, %xmm2\n"
                       "\tpxor    %xmm1, %xmm3\n"
                       "\tpxor    %xmm3, %xmm1\n"
                       "\tpxor    %xmm0, %xmm2\n"
                       "\tpxor    %xmm2, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm2
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm1
pxor   %xmm5,%xmm7
pxor   %xmm7,%xmm5
pxor   %xmm4,%xmm6
pxor   %xmm6,%xmm4
pxor   %xmm3,%xmm5
pxor   %xmm5,%xmm3
pxor   %xmm2,%xmm4
pxor   %xmm4,%xmm2
pxor   %xmm1,%xmm3
pxor   %xmm3,%xmm1
pxor   %xmm0,%xmm2
pxor   %xmm2,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm2
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm1
pxor   %xmm5,%xmm7
pxor   %xmm7,%xmm5
pxor   %xmm4,%xmm6
pxor   %xmm6,%xmm4
pxor   %xmm3,%xmm5
pxor   %xmm5,%xmm3
pxor   %xmm2,%xmm4
pxor   %xmm4,%xmm2
pxor   %xmm1,%xmm3
pxor   %xmm3,%xmm1
pxor   %xmm0,%xmm2
pxor   %xmm2,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_00000100() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00000100() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm5\0A\09pxor %xmm7, %xmm2\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm6, %xmm1\0A\09pxor %xmm5, %xmm7\0A\09pxor %xmm7, %xmm5\0A\09pxor %xmm4, %xmm6\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm3, %xmm5\0A\09pxor %xmm5, %xmm3\0A\09pxor %xmm2, %xmm4\0A\09pxor %xmm4, %xmm2\0A\09pxor %xmm1, %xmm3\0A\09pxor %xmm3, %xmm1\0A\09pxor %xmm0, %xmm2\0A\09pxor %xmm2, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
double str2dec(char const *);
scalar_t__ strsrch(char const *, char *);
double str2ra(const char *in) {
  double ra;
  ra = str2dec(in);
  if (strsrch(in, ":")) {
    ra = ra * 15.0;
  }
  return (ra);
}


x86 assembly (clang, -O0):
<str2ra>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <str2dec@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec3(%rip),%rsi
call   1030 <strsrch@plt>
cmp    $0x0,%rax
je     1166 <str2ra+0x46>
movsd  0xea4(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str2ra>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1040 <str2dec@plt>
movsd  %xmm0,0x8(%rsp)
lea    0xece(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strsrch@plt>
test   %rax,%rax
je     1157 <str2ra+0x37>
movsd  0x8(%rsp),%xmm0
mulsd  0xeab(%rip),%xmm0
jmp    115d <str2ra+0x3d>
movsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c":\00"
define double @str2ra(i8* %0) {
%2 = alloca i8*
%3 = alloca double
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call double @str2dec(i8* %4)
store double %5, double* %3
%6 = load i8*, i8** %2
%7 = call i64 @strsrch(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load double, double* %3
%11 = fmul double %10, 1.500000e+01
store double %11, double* %3
br label %12
12: ; preds = %9, %1
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
@.str = [2 x i8] c":\00"
define double @str2ra(i8* %0) {
%2 = tail call double @str2dec(i8* %0)
%3 = tail call i64 @strsrch(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
%5 = fmul double %2, 1.500000e+01
%6 = select i1 %4, double %2, double %5
ret double %6
}
void pthread_setspecific() {}


x86 assembly (clang, -O0):
<pthread_setspecific>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_setspecific>:
ret

LLVM IR (-O0):
define void @pthread_setspecific() {
ret void
}

LLVM IR (-O2):
define void @pthread_setspecific() {
ret void
}
/* Variables and functions */
char **realloc(char **, int);
void htsstr_argsplit_add(char ***argv, int *argc, char *s) {
  *argv = realloc(*argv, sizeof((*argv)[0]) * (*argc + 1));
  (*argv)[(*argc)++] = s;
}


x86 assembly (clang, -O0):
<htsstr_argsplit_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
cltq
shl    $0x3,%rax
mov    %eax,%esi
call   1030 <realloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rsi
mov    (%rsi),%ecx
mov    %ecx,%edi
add    $0x1,%edi
mov    %edi,(%rsi)
movslq %ecx,%rcx
mov    %rdx,(%rax,%rcx,8)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htsstr_argsplit_add>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
mov    (%rdi),%rdi
mov    (%rsi),%eax
lea    0x8(,%rax,8),%esi
call   1030 <realloc@plt>
mov    %rax,(%r15)
movslq (%rbx),%rcx
lea    0x1(%rcx),%edx
mov    %edx,(%rbx)
mov    %r14,(%rax,%rcx,8)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @htsstr_argsplit_add(i8*** %0, i32* %1, i8* %2) {
%4 = alloca i8***
%5 = alloca i32*
%6 = alloca i8*
store i8*** %0, i8**** %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i8***, i8**** %4
%8 = load i8**, i8*** %7
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = mul i64 8, %12
%14 = trunc i64 %13 to i32
%15 = call i8** @realloc(i8** %8, i32 %14)
%16 = load i8***, i8**** %4
store i8** %15, i8*** %16
%17 = load i8*, i8** %6
%18 = load i8***, i8**** %4
%19 = load i8**, i8*** %18
%20 = load i32*, i32** %5
%21 = load i32, i32* %20
%22 = add nsw i32 %21, 1
store i32 %22, i32* %20
%23 = sext i32 %21 to i64
%24 = getelementptr inbounds i8*, i8** %19, i64 %23
store i8* %17, i8** %24
ret void
}

LLVM IR (-O2):
define void @htsstr_argsplit_add(i8*** nocapture %0, i32* nocapture %1, i8* %2) {
%4 = load i8**, i8*** %0
%5 = load i32, i32* %1
%6 = shl i32 %5, 3
%7 = add i32 %6, 8
%8 = tail call i8** @realloc(i8** %4, i32 %7)
store i8** %8, i8*** %0
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
%11 = sext i32 %9 to i64
%12 = getelementptr inbounds i8*, i8** %8, i64 %11
store i8* %2, i8** %12
ret void
}
void gpio_int_trigger_set(unsigned gpio, int trigger_type) { return; }


x86 assembly (clang, -O0):
<gpio_int_trigger_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_int_trigger_set>:
ret

LLVM IR (-O0):
define void @gpio_int_trigger_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @gpio_int_trigger_set(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef scalar_t__ const wchar_t;

/* Variables and functions */
wchar_t *wmemchr(const wchar_t *ws, wchar_t wc, size_t length) {
  for (size_t i = 0; i < length; i++) {
    if (ws[i] == wc) {
      return (wchar_t *)&ws[i];
    }
  }
  return NULL;
}


x86 assembly (clang, -O0):
<wmemchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    116a <wmemchr+0x6a>
mov    -0x10(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
cmp    -0x18(%rbp),%rax
jne    1154 <wmemchr+0x54>
mov    -0x10(%rbp),%rax
mov    -0x28(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1172 <wmemchr+0x72>
jmp    1159 <wmemchr+0x59>
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    1118 <wmemchr+0x18>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wmemchr>:
test   %rdx,%rdx
je     111f <wmemchr+0x1f>
mov    %rdi,%rax
nopl   0x0(%rax,%rax,1)
cmp    %rsi,(%rax)
je     1121 <wmemchr+0x21>
add    $0x8,%rax
add    $0xffffffffffffffff,%rdx
jne    1110 <wmemchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64* @wmemchr(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64* %0, i64** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 0, i64* %8
br label %9
9: ; preds = %25, %3
%10 = load i64, i64* %8
%11 = load i64, i64* %7
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i64*, i64** %5
%15 = load i64, i64* %8
%16 = getelementptr inbounds i64, i64* %14, i64 %15
%17 = load i64, i64* %16
%18 = load i64, i64* %6
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %24
20: ; preds = %13
%21 = load i64*, i64** %5
%22 = load i64, i64* %8
%23 = getelementptr inbounds i64, i64* %21, i64 %22
store i64* %23, i64** %4
br label %29
24: ; preds = %13
br label %25
25: ; preds = %24
%26 = load i64, i64* %8
%27 = add i64 %26, 1
store i64 %27, i64* %8
br label %9
28: ; preds = %9
store i64* null, i64** %4
br label %29
29: ; preds = %28, %20
%30 = load i64*, i64** %4
ret i64* %30
}

LLVM IR (-O2):
define i64* @wmemchr(i64* %0, i64 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %15, label %5
5: ; preds = %3, %10
%6 = phi i64 [ %11, %10 ], [ 0, %3 ]
%7 = getelementptr inbounds i64, i64* %0, i64 %6
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, %1
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = add nuw i64 %6, 1
%12 = icmp eq i64 %11, %2
br i1 %12, label %15, label %5
13: ; preds = %5
%14 = getelementptr inbounds i64, i64* %0, i64 %6
br label %15
15: ; preds = %10, %13, %3
%16 = phi i64* [ null, %3 ], [ %14, %13 ], [ null, %10 ]
ret i64* %16
}
/* Variables and functions */
int fact(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  printf("%d\n", fact(8));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x8,%edi
call   1040 <fact@plt>
mov    %eax,%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x8,%edi
call   1040 <fact@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @fact(i32 8)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fact(i32 8)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
int serial_read();
int _getchar() {
  int c;
  c = serial_read();
  if (c == '\r') {
    c = '\n';
  }
  return c;
}


x86 assembly (clang, -O0):
<_getchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <serial_read@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xd,-0x4(%rbp)
jne    1133 <_getchar+0x23>
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getchar>:
push   %rax
xor    %eax,%eax
call   1030 <serial_read@plt>
cmp    $0xd,%eax
mov    $0xa,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_getchar() {
%1 = alloca i32
%2 = call i32 (...) @serial_read()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 13
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 10, i32* %1
br label %6
6: ; preds = %5, %0
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @_getchar() {
%1 = tail call i32 (...) @serial_read()
%2 = icmp eq i32 %1, 13
%3 = select i1 %2, i32 10, i32 %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ perm_a(int, int /*<<< orphan*/);
void gpr_orbits(void) { perm_a(1, 0); }


x86 assembly (clang, -O0):
<gpr_orbits>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <perm_a@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpr_orbits>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <perm_a@plt>

LLVM IR (-O0):
define void @gpr_orbits() {
%1 = call i32 @perm_a(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @gpr_orbits() {
%1 = tail call i32 @perm_a(i32 1, i32 0)
ret void
}
/* Variables and functions */
int g();
int h(void) {
  int ret = 2;
  int x = g();
  return x + ret;
}


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2,-0x4(%rbp)
mov    $0x0,%al
call   1030 <g@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
push   %rax
xor    %eax,%eax
call   1030 <g@plt>
add    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @h() {
%1 = alloca i32
%2 = alloca i32
store i32 2, i32* %1
%3 = call i32 (...) @g()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %1
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @h() {
%1 = tail call i32 (...) @g()
%2 = add nsw i32 %1, 2
ret i32 %2
}
/* Variables and functions */
double get_sec(int /*<<< orphan*/);
double get_secv(void) { return get_sec(0); }


x86 assembly (clang, -O0):
<get_secv>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <get_sec@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_secv>:
xor    %edi,%edi
jmp    1030 <get_sec@plt>

LLVM IR (-O0):
define double @get_secv() {
%1 = call double @get_sec(i32 0)
ret double %1
}

LLVM IR (-O2):
define double @get_secv() {
%1 = tail call double @get_sec(i32 0)
ret double %1
}
/* Variables and functions */
int valid_user_group_name_full(char const *, int);
bool valid_user_group_name(const char *u) {
  return valid_user_group_name_full(u, true);
}


x86 assembly (clang, -O0):
<valid_user_group_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <valid_user_group_name_full@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_user_group_name>:
mov    $0x1,%esi
jmp    1030 <valid_user_group_name_full@plt>

LLVM IR (-O0):
define i32 @valid_user_group_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @valid_user_group_name_full(i8* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @valid_user_group_name(i8* %0) {
%2 = tail call i32 @valid_user_group_name_full(i8* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int S_IREAD;
int S_IWRITE;
int /*<<< orphan*/ close(int);
int creat(char *, int);
int /*<<< orphan*/ fdatasync(int);
int /*<<< orphan*/ fsync(int);
int /*<<< orphan*/ sync();
int main() {
  int fd;
  fd = creat("foobar", S_IREAD | S_IWRITE);
  sync();
  fsync(fd);
  fdatasync(fd);
  close(fd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2e72(%rip),%rax
mov    (%rax),%esi
mov    0x2e79(%rip),%rax
or     (%rax),%esi
lea    0xe88(%rip),%rdi
call   1070 <creat@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <sync@plt>
mov    -0x8(%rbp),%edi
call   1060 <fsync@plt>
mov    -0x8(%rbp),%edi
call   1030 <fdatasync@plt>
mov    -0x8(%rbp),%edi
call   1040 <close@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2e80(%rip),%rax
mov    0x2e89(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xe96(%rip),%rdi
call   1070 <creat@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <sync@plt>
mov    %ebx,%edi
call   1060 <fsync@plt>
mov    %ebx,%edi
call   1030 <fdatasync@plt>
mov    %ebx,%edi
call   1040 <close@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"foobar\00"
@S_IREAD = global i32 0
@S_IWRITE = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @S_IREAD
%4 = load i32, i32* @S_IWRITE
%5 = or i32 %3, %4
%6 = call i32 @creat(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5)
store i32 %6, i32* %2
%7 = call i32 (...) @sync()
%8 = load i32, i32* %2
%9 = call i32 @fsync(i32 %8)
%10 = load i32, i32* %2
%11 = call i32 @fdatasync(i32 %10)
%12 = load i32, i32* %2
%13 = call i32 @close(i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"foobar\00"
@S_IREAD = global i32 0
@S_IWRITE = global i32 0
define i32 @main() {
%1 = load i32, i32* @S_IREAD
%2 = load i32, i32* @S_IWRITE
%3 = or i32 %2, %1
%4 = tail call i32 @creat(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 (...) @sync()
%6 = tail call i32 @fsync(i32 %4)
%7 = tail call i32 @fdatasync(i32 %4)
%8 = tail call i32 @close(i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, float);
size_t strlen(char *);
void floatToStr(float x, char y[]) {
  sprintf(y, "%f", x);
  y[strlen(y)] = '\0';
}


x86 assembly (clang, -O0):
<floatToStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
movss  -0x4(%rbp),%xmm0
lea    0xebf(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatToStr>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <strlen@plt>
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define void @floatToStr(float %0, i8* %1) {
%3 = alloca float
%4 = alloca i8*
store float %0, float* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load float, float* %3
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %6)
%8 = load i8*, i8** %4
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8 0, i8* %11
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define void @floatToStr(float %0, i8* nocapture %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = getelementptr inbounds i8, i8* %1, i64 %4
store i8 0, i8* %5
ret void
}