#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int sio_read_reg(int, unsigned long *);
int FS460_get_sync_invert(int *p_hsync_invert, int *p_vsync_invert,
                          int *p_field_invert) {
  int err;
  unsigned long mux1;
  if (!p_hsync_invert || !p_vsync_invert || !p_field_invert)
    return 0x1000;
  err = sio_read_reg(0x3C, &mux1);
  if (err)
    return err;
  *p_hsync_invert = ((1 << 14) & mux1) ? 1 : 0;
  *p_vsync_invert = ((1 << 5) & mux1) ? 1 : 0;
  *p_field_invert = ((1 << 15) & mux1) ? 1 : 0;
  return 0;
}


x86 assembly (clang, -O0):
<FS460_get_sync_invert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1145 <FS460_get_sync_invert+0x35>
cmpq   $0x0,-0x18(%rbp)
je     1145 <FS460_get_sync_invert+0x35>
cmpq   $0x0,-0x20(%rbp)
jne    1151 <FS460_get_sync_invert+0x41>
movl   $0x1000,-0x4(%rbp)
jmp    11d8 <FS460_get_sync_invert+0xc8>
mov    $0x3c,%edi
lea    -0x30(%rbp),%rsi
call   1030 <sio_read_reg@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
je     1177 <FS460_get_sync_invert+0x67>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11d8 <FS460_get_sync_invert+0xc8>
mov    -0x30(%rbp),%rdx
and    $0x4000,%rdx
xor    %ecx,%ecx
mov    $0x1,%eax
cmp    $0x0,%rdx
cmovne %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x30(%rbp),%rdx
and    $0x20,%rdx
xor    %ecx,%ecx
mov    $0x1,%eax
cmp    $0x0,%rdx
cmovne %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x30(%rbp),%rdx
and    $0x8000,%rdx
xor    %ecx,%ecx
mov    $0x1,%eax
cmp    $0x0,%rdx
cmovne %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FS460_get_sync_invert>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    $0x1000,%eax
test   %rdi,%rdi
je     116d <FS460_get_sync_invert+0x5d>
mov    %rsi,%r15
test   %rsi,%rsi
je     116d <FS460_get_sync_invert+0x5d>
mov    %rdx,%r14
test   %rdx,%rdx
je     116d <FS460_get_sync_invert+0x5d>
mov    %rdi,%rbx
lea    0x8(%rsp),%rsi
mov    $0x3c,%edi
call   1030 <sio_read_reg@plt>
test   %eax,%eax
jne    116d <FS460_get_sync_invert+0x5d>
mov    0x8(%rsp),%eax
mov    %eax,%ecx
shr    $0xe,%ecx
and    $0x1,%ecx
mov    %ecx,(%rbx)
mov    %eax,%ecx
shr    $0x5,%ecx
and    $0x1,%ecx
mov    %ecx,(%r15)
shr    $0xf,%eax
and    $0x1,%eax
mov    %eax,(%r14)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @FS460_get_sync_invert(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i64
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%10 = load i32*, i32** %5
%11 = icmp ne i32* %10, null
br i1 %11, label %12, label %18
12: ; preds = %3
%13 = load i32*, i32** %6
%14 = icmp ne i32* %13, null
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32*, i32** %7
%17 = icmp ne i32* %16, null
br i1 %17, label %19, label %18
18: ; preds = %15, %12, %3
store i32 4096, i32* %4
br label %44
19: ; preds = %15
%20 = call i32 @sio_read_reg(i32 60, i64* %9)
store i32 %20, i32* %8
%21 = load i32, i32* %8
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = load i32, i32* %8
store i32 %24, i32* %4
br label %44
25: ; preds = %19
%26 = load i64, i64* %9
%27 = and i64 16384, %26
%28 = icmp ne i64 %27, 0
%29 = zext i1 %28 to i64
%30 = select i1 %28, i32 1, i32 0
%31 = load i32*, i32** %5
store i32 %30, i32* %31
%32 = load i64, i64* %9
%33 = and i64 32, %32
%34 = icmp ne i64 %33, 0
%35 = zext i1 %34 to i64
%36 = select i1 %34, i32 1, i32 0
%37 = load i32*, i32** %6
store i32 %36, i32* %37
%38 = load i64, i64* %9
%39 = and i64 32768, %38
%40 = icmp ne i64 %39, 0
%41 = zext i1 %40 to i64
%42 = select i1 %40, i32 1, i32 0
%43 = load i32*, i32** %7
store i32 %42, i32* %43
store i32 0, i32* %4
br label %44
44: ; preds = %25, %23, %18
%45 = load i32, i32* %4
ret i32 %45
}

LLVM IR (-O2):
define i32 @FS460_get_sync_invert(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
%6 = icmp ne i32* %0, null
%7 = icmp ne i32* %1, null
%8 = and i1 %6, %7
%9 = icmp ne i32* %2, null
%10 = and i1 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %3
%12 = call i32 @sio_read_reg(i32 60, i64* %4)
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %23
14: ; preds = %11
%15 = load i64, i64* %4
%16 = trunc i64 %15 to i32
%17 = lshr i32 %16, 14
%18 = and i32 %17, 1
store i32 %18, i32* %0
%19 = lshr i32 %16, 5
%20 = and i32 %19, 1
store i32 %20, i32* %1
%21 = lshr i32 %16, 15
%22 = and i32 %21, 1
store i32 %22, i32* %2
br label %23
23: ; preds = %11, %3, %14
%24 = phi i32 [ 0, %14 ], [ 4096, %3 ], [ %12, %11 ]
ret i32 %24
}