xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void error_null_file(const char *string) {
  fprintf(stderr, "%s could not be opened or created.\n", string);
}


x86 assembly (clang, -O0):
<error_null_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_null_file>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [36 x i8] c"%s could not be opened or created.\0A\00"
define void @error_null_file(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [36 x i8] c"%s could not be opened or created.\0A\00"
define void @error_null_file(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
float d2f(double);
double gs_cos_degrees(float);
float d2fcos_d(double x) { return d2f(gs_cos_degrees(d2f(x))); }


x86 assembly (clang, -O0):
<d2fcos_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <d2f@plt>
call   1040 <gs_cos_degrees@plt>
call   1030 <d2f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2fcos_d>:
push   %rax
call   1030 <d2f@plt>
call   1040 <gs_cos_degrees@plt>
pop    %rax
jmp    1030 <d2f@plt>

LLVM IR (-O0):
define float @d2fcos_d(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call float @d2f(double %3)
%5 = call double @gs_cos_degrees(float %4)
%6 = call float @d2f(double %5)
ret float %6
}

LLVM IR (-O2):
define float @d2fcos_d(double %0) {
%2 = tail call float @d2f(double %0)
%3 = tail call double @gs_cos_degrees(float %2)
%4 = tail call float @d2f(double %3)
ret float %4
}
void NV12ToI420Rotate() {}


x86 assembly (clang, -O0):
<NV12ToI420Rotate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV12ToI420Rotate>:
ret

LLVM IR (-O0):
define void @NV12ToI420Rotate() {
ret void
}

LLVM IR (-O2):
define void @NV12ToI420Rotate() {
ret void
}
/* Variables and functions */
scalar_t__ COND_HI();
int /*<<< orphan*/ EA_A7_PI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_shi_8_pi7(void) {
  m68ki_write_8(EA_A7_PI_8(), COND_HI() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_shi_8_pi7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_HI@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_shi_8_pi7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_HI@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_shi_8_pi7() {
%1 = call i32 (...) @EA_A7_PI_8()
%2 = call i64 (...) @COND_HI()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_shi_8_pi7() {
%1 = tail call i32 (...) @EA_A7_PI_8()
%2 = tail call i64 (...) @COND_HI()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ ncolors;
  int /*<<< orphan*/ header_size;
};
typedef TYPE_1__ XWDFileHeader;
typedef int /*<<< orphan*/ XWDColor;

/* Variables and functions */
int readValue(int /*<<< orphan*/ *);
unsigned int get_header_size(XWDFileHeader *header) {
  unsigned int header_size = readValue(&header->header_size);
  unsigned int colourmap_size = readValue(&header->ncolors) * sizeof(XWDColor);
  return header_size + colourmap_size;
}


x86 assembly (clang, -O0):
<get_header_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
call   1030 <readValue@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <readValue@plt>
cltq
shl    $0x2,%rax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_header_size>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
add    $0x4,%rdi
call   1030 <readValue@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1030 <readValue@plt>
lea    (%r14,%rax,4),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i32 }
define i32 @get_header_size(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
%3 = alloca i32
%4 = alloca i32
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%5 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 1
%7 = call i32 @readValue(i32* %6)
store i32 %7, i32* %3
%8 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
%10 = call i32 @readValue(i32* %9)
%11 = sext i32 %10 to i64
%12 = mul i64 %11, 4
%13 = trunc i64 %12 to i32
store i32 %13, i32* %4
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = add i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32, i32 }
define i32 @get_header_size(%struct.TYPE_3__* %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 1
%3 = tail call i32 @readValue(i32* %2)
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%5 = tail call i32 @readValue(i32* %4)
%6 = shl i32 %5, 2
%7 = add i32 %6, %3
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ ssp_nonblocking(int);
void sp_nonblocking(int sock) { ssp_nonblocking(sock); }


x86 assembly (clang, -O0):
<sp_nonblocking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ssp_nonblocking@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_nonblocking>:
jmp    1030 <ssp_nonblocking@plt>

LLVM IR (-O0):
define void @sp_nonblocking(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ssp_nonblocking(i32 %3)
ret void
}

LLVM IR (-O2):
define void @sp_nonblocking(i32 %0) {
%2 = tail call i32 @ssp_nonblocking(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gfx_select_alpha_region(int);
int /*<<< orphan*/ gfx_set_alpha_enable(int /*<<< orphan*/);
int /*<<< orphan*/ gfx_set_video_enable(int /*<<< orphan*/);
void gfx_reset_video(void) {
  gfx_set_video_enable(0);
  gfx_select_alpha_region(1);
  gfx_set_alpha_enable(0);
  gfx_select_alpha_region(2);
  gfx_set_alpha_enable(0);
  gfx_select_alpha_region(0);
  gfx_set_alpha_enable(0);
}


x86 assembly (clang, -O0):
<gfx_reset_video>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <gfx_set_video_enable@plt>
mov    $0x1,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_enable@plt>
mov    $0x2,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_enable@plt>
xor    %edi,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_reset_video>:
push   %rax
xor    %edi,%edi
call   1030 <gfx_set_video_enable@plt>
mov    $0x1,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_enable@plt>
mov    $0x2,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_enable@plt>
xor    %edi,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
pop    %rax
jmp    1050 <gfx_set_alpha_enable@plt>

LLVM IR (-O0):
define void @gfx_reset_video() {
%1 = call i32 @gfx_set_video_enable(i32 0)
%2 = call i32 @gfx_select_alpha_region(i32 1)
%3 = call i32 @gfx_set_alpha_enable(i32 0)
%4 = call i32 @gfx_select_alpha_region(i32 2)
%5 = call i32 @gfx_set_alpha_enable(i32 0)
%6 = call i32 @gfx_select_alpha_region(i32 0)
%7 = call i32 @gfx_set_alpha_enable(i32 0)
ret void
}

LLVM IR (-O2):
define void @gfx_reset_video() {
%1 = tail call i32 @gfx_set_video_enable(i32 0)
%2 = tail call i32 @gfx_select_alpha_region(i32 1)
%3 = tail call i32 @gfx_set_alpha_enable(i32 0)
%4 = tail call i32 @gfx_select_alpha_region(i32 2)
%5 = tail call i32 @gfx_set_alpha_enable(i32 0)
%6 = tail call i32 @gfx_select_alpha_region(i32 0)
%7 = tail call i32 @gfx_set_alpha_enable(i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef int /*<<< orphan*/ __s32;

/* Variables and functions */
int /*<<< orphan*/ i2c_smbus_access(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                    int /*<<< orphan*/, int /*<<< orphan*/ *);
__s32 i2c_smbus_write_quick(int file, __u8 value) {
  return i2c_smbus_access(file, value, 0, 0, NULL);
}


x86 assembly (clang, -O0):
<i2c_smbus_write_quick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %ecx,%ecx
xor    %eax,%eax
mov    %eax,%r8d
mov    %ecx,%edx
call   1030 <i2c_smbus_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_write_quick>:
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <i2c_smbus_access@plt>

LLVM IR (-O0):
define i32 @i2c_smbus_write_quick(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @i2c_smbus_access(i32 %5, i32 %6, i32 0, i32 0, i32* null)
ret i32 %7
}

LLVM IR (-O2):
define i32 @i2c_smbus_write_quick(i32 %0, i32 %1) {
%3 = tail call i32 @i2c_smbus_access(i32 %0, i32 %1, i32 0, i32 0, i32* null)
ret i32 %3
}
int execute_quotactl() { return 0; }


x86 assembly (clang, -O0):
<execute_quotactl>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_quotactl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_quotactl() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_quotactl() {
ret i32 0
}
/* Variables and functions */
int __WORDSIZE;
int test_user_bit_width(void) { return __WORDSIZE; }


x86 assembly (clang, -O0):
<test_user_bit_width>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_user_bit_width>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@__WORDSIZE = global i32 0
define i32 @test_user_bit_width() {
%1 = load i32, i32* @__WORDSIZE
ret i32 %1
}

LLVM IR (-O2):
@__WORDSIZE = global i32 0
define i32 @test_user_bit_width() {
%1 = load i32, i32* @__WORDSIZE
ret i32 %1
}
/* Variables and functions */
scalar_t__ is_empty();
int /*<<< orphan*/ outbyte(int, char);
void putc_serial(char a) {
  while (is_empty() == 0)
    ;
  outbyte(0x3f8, a);
}


x86 assembly (clang, -O0):
<putc_serial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <is_empty@plt>
cmp    $0x0,%rax
jne    1144 <putc_serial+0x24>
jmp    112e <putc_serial+0xe>
mov    $0x3f8,%edi
movsbl -0x1(%rbp),%esi
call   1040 <outbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc_serial>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <is_empty@plt>
test   %rax,%rax
je     1130 <putc_serial+0x10>
movsbl %bl,%esi
mov    $0x3f8,%edi
pop    %rbx
jmp    1040 <outbyte@plt>

LLVM IR (-O0):
define void @putc_serial(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %6, %1
%4 = call i64 (...) @is_empty()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %3
br label %3
7: ; preds = %3
%8 = load i8, i8* %2
%9 = call i32 @outbyte(i32 1016, i8 signext %8)
ret void
}

LLVM IR (-O2):
define void @putc_serial(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i64 (...) @is_empty()
%4 = icmp eq i64 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
%6 = tail call i32 @outbyte(i32 1016, i8 signext %0)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t swap64(uint64_t x) {
  x = ((x & 0x00ff00ff00ff00ff) << 8) | ((x & 0xff00ff00ff00ff00) >> 8);
  x = ((x & 0x0000ffff0000ffff) << 16) | ((x & 0xffff0000ffff0000) >> 16);
  return (x << 32) | (x >> 32);
}


x86 assembly (clang, -O0):
<swap64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0xff00ff00ff00ff,%rcx
and    %rcx,%rax
shl    $0x8,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff00ff00ff00ff00,%rdx
and    %rdx,%rcx
shr    $0x8,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0xffff0000ffff,%rcx
and    %rcx,%rax
shl    $0x10,%rax
movslq -0x4(%rbp),%rcx
movabs $0xffff0000ffff0000,%rdx
and    %rdx,%rcx
shr    $0x10,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap64>:
ret

LLVM IR (-O0):
define i32 @swap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = and i64 %4, 71777214294589695
%6 = shl i64 %5, 8
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = and i64 %8, -71777214294589696
%10 = lshr i64 %9, 8
%11 = or i64 %6, %10
%12 = trunc i64 %11 to i32
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = sext i32 %13 to i64
%15 = and i64 %14, 281470681808895
%16 = shl i64 %15, 16
%17 = load i32, i32* %2
%18 = sext i32 %17 to i64
%19 = and i64 %18, -281470681808896
%20 = lshr i64 %19, 16
%21 = or i64 %16, %20
%22 = trunc i64 %21 to i32
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = shl i32 %23, 32
%25 = load i32, i32* %2
%26 = ashr i32 %25, 32
%27 = or i32 %24, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @swap64(i32 %0) {
ret i32 poison
}
int omp_thread_count() {
  int n = 0;
#pragma omp parallel reduction(+ : n)
  n += 1;
  return n;
}


x86 assembly (clang, -O0):
<omp_thread_count>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omp_thread_count>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @omp_thread_count() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @omp_thread_count() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char aFunction(char x[2]) {
  printf("%p\n", x);
  printf("%s\n", x);
  return x[3];
}


x86 assembly (clang, -O0):
<aFunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
movsbl 0x3(%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aFunction>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    0x3(%rbx),%al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%p\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define signext i8 @aFunction(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 3
%9 = load i8, i8* %8
ret i8 %9
}

LLVM IR (-O2):
@.str = [4 x i8] c"%p\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define signext i8 @aFunction(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%4 = getelementptr inbounds i8, i8* %0, i64 3
%5 = load i8, i8* %4
ret i8 %5
}
void fn413A() { return; }


x86 assembly (clang, -O0):
<fn413A>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn413A>:
ret

LLVM IR (-O0):
define void @fn413A() {
ret void
}

LLVM IR (-O2):
define void @fn413A() {
ret void
}
void cprop_test1(int *data) {
  int j = 1 + 2 * 4;
  data[0] = j;
}


x86 assembly (clang, -O0):
<cprop_test1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x9,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cprop_test1>:
movl   $0x9,(%rdi)
ret

LLVM IR (-O0):
define void @cprop_test1(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 9, i32* %3
%4 = load i32, i32* %3
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 %4, i32* %6
ret void
}

LLVM IR (-O2):
define void @cprop_test1(i32* nocapture writeonly %0) {
store i32 9, i32* %0
ret void
}
void anc_hs_charge_detect(int saradc_value, int headset_type) { return; }


x86 assembly (clang, -O0):
<anc_hs_charge_detect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<anc_hs_charge_detect>:
ret

LLVM IR (-O0):
define void @anc_hs_charge_detect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @anc_hs_charge_detect(i32 %0, i32 %1) {
ret void
}
unsigned long hash_wc(const char *chave, int tamanho) {
  int i = 0, l = 0;
  while (chave[i]) {
    l += chave[i++];
  }
  return l % tamanho;
}


x86 assembly (clang, -O0):
<hash_wc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     114c <hash_wc+0x4c>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x10(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <hash_wc+0x19>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
movslq %edx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_wc>:
mov    (%rdi),%cl
test   %cl,%cl
je     1122 <hash_wc+0x22>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash_wc+0x10>
jmp    1124 <hash_wc+0x24>
xor    %eax,%eax
cltd
idiv   %esi
movslq %edx,%rax
ret

LLVM IR (-O0):
define i64 @hash_wc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %24
14: ; preds = %7
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
%18 = sext i32 %16 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i32, i32* %6
%23 = add nsw i32 %22, %21
store i32 %23, i32* %6
br label %7
24: ; preds = %7
%25 = load i32, i32* %6
%26 = load i32, i32* %4
%27 = srem i32 %25, %26
%28 = sext i32 %27 to i64
ret i64 %28
}

LLVM IR (-O2):
define i64 @hash_wc(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8 [ %13, %5 ], [ %3, %2 ]
%8 = phi i32 [ %11, %5 ], [ 0, %2 ]
%9 = add nuw nsw i64 %6, 1
%10 = sext i8 %7 to i32
%11 = add nsw i32 %8, %10
%12 = getelementptr inbounds i8, i8* %0, i64 %9
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %11, %5 ]
%17 = srem i32 %16, %1
%18 = sext i32 %17 to i64
ret i64 %18
}
/* Variables and functions */
void *xmalloc(int);
void *s_malloc(int n) {
  void *p;
  p = xmalloc(n);
  ;
  return p;
}


x86 assembly (clang, -O0):
<s_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_malloc>:
jmp    1030 <xmalloc@plt>

LLVM IR (-O0):
define i8* @s_malloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @xmalloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @s_malloc(i32 %0) {
%2 = tail call i8* @xmalloc(i32 %0)
ret i8* %2
}
/* Variables and functions */
int incr(int);
int main(int argc, char *argv[]) {
  int i = 0;
  while (1) {
    i = incr(i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <incr@plt>
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%edi
call   1030 <incr@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %2, %7
%8 = load i32, i32* %6
%9 = call i32 @incr(i32 %8)
store i32 %9, i32* %6
br label %7
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ 0, %2 ], [ %5, %3 ]
%5 = tail call i32 @incr(i32 %4)
br label %3
}
long bar(long a, long b) { return b; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @bar(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @bar(i64 %0, i64 returned %1) {
ret i64 %1
}
/* Type definitions */
struct array_s {
  int dummy;
};

/* Variables and functions */
int array___reserve_with_ratio(struct array_s *, unsigned long, float,
                               int /*<<< orphan*/);
int array_reserve_with_ratio(struct array_s *a, unsigned long count,
                             float ratio) {
  return array___reserve_with_ratio(a, count, ratio, 0);
}


x86 assembly (clang, -O0):
<array_reserve_with_ratio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
xor    %edx,%edx
call   1030 <array___reserve_with_ratio@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_reserve_with_ratio>:
xor    %edx,%edx
jmp    1030 <array___reserve_with_ratio@plt>

LLVM IR (-O0):
%struct.array_s = type { i32 }
define i32 @array_reserve_with_ratio(%struct.array_s* %0, i64 %1, float %2) {
%4 = alloca %struct.array_s*
%5 = alloca i64
%6 = alloca float
store %struct.array_s* %0, %struct.array_s** %4
store i64 %1, i64* %5
store float %2, float* %6
%7 = load %struct.array_s*, %struct.array_s** %4
%8 = load i64, i64* %5
%9 = load float, float* %6
%10 = call i32 @array___reserve_with_ratio(%struct.array_s* %7, i64 %8, float %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.array_s = type { i32 }
define i32 @array_reserve_with_ratio(%struct.array_s* %0, i64 %1, float %2) {
%4 = tail call i32 @array___reserve_with_ratio(%struct.array_s* %0, i64 %1, float %2, i32 0)
ret i32 %4
}
void lgtd_lifx_tagging_decref(struct lgtd_lifx_tag *tag,
                              struct lgtd_lifx_gateway *gw) {
  (void)tag;
  (void)gw;
}


x86 assembly (clang, -O0):
<lgtd_lifx_tagging_decref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lgtd_lifx_tagging_decref>:
ret

LLVM IR (-O0):
%struct.lgtd_lifx_tag = type opaque
%struct.lgtd_lifx_gateway = type opaque
define void @lgtd_lifx_tagging_decref(%struct.lgtd_lifx_tag* %0, %struct.lgtd_lifx_gateway* %1) {
%3 = alloca %struct.lgtd_lifx_tag*
%4 = alloca %struct.lgtd_lifx_gateway*
store %struct.lgtd_lifx_tag* %0, %struct.lgtd_lifx_tag** %3
store %struct.lgtd_lifx_gateway* %1, %struct.lgtd_lifx_gateway** %4
%5 = load %struct.lgtd_lifx_tag*, %struct.lgtd_lifx_tag** %3
%6 = load %struct.lgtd_lifx_gateway*, %struct.lgtd_lifx_gateway** %4
ret void
}

LLVM IR (-O2):
%struct.lgtd_lifx_tag = type opaque
%struct.lgtd_lifx_gateway = type opaque
define void @lgtd_lifx_tagging_decref(%struct.lgtd_lifx_tag* nocapture %0, %struct.lgtd_lifx_gateway* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SVCXPRT;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ svc_destroy(int /*<<< orphan*/ *);
int /*<<< orphan*/ *svcraw_create();
int main(void) {
  int test_status = 1;
  SVCXPRT *svcr = NULL;
  svcr = svcraw_create();
  test_status = (svcr != NULL) ? 0 : 1;
  svc_destroy(svcr);
  printf("%d\n", test_status);
  return test_status;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <svcraw_create@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <svc_destroy@plt>
mov    -0x8(%rbp),%esi
lea    0xe7f(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <svcraw_create@plt>
xor    %ebx,%ebx
test   %rax,%rax
sete   %bl
mov    %rax,%rdi
call   1050 <svc_destroy@plt>
lea    0xeb1(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 1, i32* %2
store i32* null, i32** %3
%4 = call i32* (...) @svcraw_create()
store i32* %4, i32** %3
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 0, i32 1
store i32 %8, i32* %2
%9 = load i32*, i32** %3
%10 = call i32 @svc_destroy(i32* %9)
%11 = load i32, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32* (...) @svcraw_create()
%2 = icmp eq i32* %1, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @svc_destroy(i32* %1)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %3
}
int steps(int number) {
  int count = 1;
  while (number != 1) {
    if (number % 2 == 1) {
      number = number * 3 + 1;
    } else {
      number /= 2;
    }
    count += 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<steps>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     1157 <steps+0x57>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    113b <steps+0x3b>
imul   $0x3,-0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1149 <steps+0x49>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <steps+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<steps>:
mov    $0x1,%eax
cmp    $0x1,%edi
jne    110b <steps+0xb>
ret
mov    $0x1,%eax
jmp    112c <steps+0x2c>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
sar    %ecx
mov    %ecx,%edi
add    $0x1,%eax
cmp    $0x1,%edi
je     110a <steps+0xa>
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
mov    %ecx,%edx
and    $0xfffffffe,%edx
mov    %edi,%esi
sub    %edx,%esi
cmp    $0x1,%esi
jne    1120 <steps+0x20>
lea    (%rdi,%rdi,2),%edi
add    $0x1,%edi
jmp    1124 <steps+0x24>

LLVM IR (-O0):
define i32 @steps(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i32, i32* %2
%9 = srem i32 %8, 2
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i32, i32* %2
%13 = mul nsw i32 %12, 3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %18
15: ; preds = %7
%16 = load i32, i32* %2
%17 = sdiv i32 %16, 2
store i32 %17, i32* %2
br label %18
18: ; preds = %15, %11
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @steps(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %12, %3 ], [ 1, %1 ]
%5 = phi i32 [ %11, %3 ], [ %0, %1 ]
%6 = srem i32 %5, 2
%7 = sdiv i32 %5, 2
%8 = icmp eq i32 %6, 1
%9 = mul nsw i32 %5, 3
%10 = add nsw i32 %9, 1
%11 = select i1 %8, i32 %10, i32 %7
%12 = add nuw nsw i32 %4, 1
%13 = icmp eq i32 %11, 1
br i1 %13, label %14, label %3
14: ; preds = %3, %1
%15 = phi i32 [ 1, %1 ], [ %12, %3 ]
ret i32 %15
}
/* Variables and functions */
void SHAREMIND_MAP_KEY_FREE_size_t(size_t *const dest) { (void)dest; }


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_FREE_size_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_FREE_size_t>:
ret

LLVM IR (-O0):
define void @SHAREMIND_MAP_KEY_FREE_size_t(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
ret void
}

LLVM IR (-O2):
define void @SHAREMIND_MAP_KEY_FREE_size_t(i64* nocapture %0) {
ret void
}
/* Variables and functions */
int crypto_sign_ed25519_verify_detached(unsigned char const *,
                                        unsigned char const *,
                                        unsigned long long,
                                        unsigned char const *);
int crypto_sign_verify_detached(const unsigned char *sig,
                                const unsigned char *m, unsigned long long mlen,
                                const unsigned char *pk) {
  return crypto_sign_ed25519_verify_detached(sig, m, mlen, pk);
}


x86 assembly (clang, -O0):
<crypto_sign_verify_detached>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <crypto_sign_ed25519_verify_detached@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_sign_verify_detached>:
jmp    1030 <crypto_sign_ed25519_verify_detached@plt>

LLVM IR (-O0):
define i32 @crypto_sign_verify_detached(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i8*, i8** %8
%13 = call i32 @crypto_sign_ed25519_verify_detached(i8* %9, i8* %10, i64 %11, i8* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @crypto_sign_verify_detached(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = tail call i32 @crypto_sign_ed25519_verify_detached(i8* %0, i8* %1, i64 %2, i8* %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ft_putendl(char *);
int /*<<< orphan*/ ft_putstr(char const *);
void ft_putendl_err(char const *s) {
  ft_putstr("\x1B[31m");
  ft_putstr(s);
  ft_putendl("\x1B[0m");
}


x86 assembly (clang, -O0):
<ft_putendl_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <ft_putstr@plt>
mov    -0x8(%rbp),%rdi
call   1040 <ft_putstr@plt>
lea    0xebe(%rip),%rdi
call   1030 <ft_putendl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl_err>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <ft_putstr@plt>
mov    %rbx,%rdi
call   1040 <ft_putstr@plt>
lea    0xec7(%rip),%rdi
pop    %rbx
jmp    1030 <ft_putendl@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[31m\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @ft_putendl_err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @ft_putstr(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @ft_putstr(i8* %4)
%6 = call i32 @ft_putendl(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[31m\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @ft_putendl_err(i8* %0) {
%2 = tail call i32 @ft_putstr(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @ft_putstr(i8* %0)
%4 = tail call i32 @ft_putendl(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int foo() { return 23; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x17,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
ret i32 23
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 23
}
int test_imm_E1uint16_reg(unsigned short val) {
  return ((val) & (-0xE1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E1uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff1f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E1uint16_reg>:
test   $0xff1f,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E1uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -225
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E1uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -225
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ transitiveClosure(int **);
int main() {
  int graph[4][4] = {{1, 1, 0, 1}, {0, 1, 1, 0}, {0, 0, 1, 1}, {0, 0, 0, 1}};
  transitiveClosure(graph);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
lea    0xec6(%rip),%rsi
mov    $0x40,%edx
call   1040 <memcpy@plt>
lea    -0x50(%rbp),%rdi
call   1030 <transitiveClosure@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x48,%rsp
movaps 0xf15(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xef9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xedd(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec1(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <transitiveClosure@plt>
xor    %eax,%eax
add    $0x48,%rsp
ret

LLVM IR (-O0):
@__const.main.graph = [4 x [4 x i32]] [[4 x i32] [i32 1, i32 1, i32 0, i32 1], [4 x i32] [i32 0, i32 1, i32 1, i32 0], [4 x i32] [i32 0, i32 0, i32 1, i32 1], [4 x i32] [i32 0, i32 0, i32 0, i32 1]]
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x [4 x i32]]
store i32 0, i32* %1
%3 = bitcast [4 x [4 x i32]]* %2 to i8*
%4 = getelementptr inbounds [4 x [4 x i32]], [4 x [4 x i32]]* %2, i64 0, i64 0
%5 = bitcast [4 x i32]* %4 to i32**
%6 = call i32 @transitiveClosure(i32** %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.graph = [4 x [4 x i32]] [[4 x i32] [i32 1, i32 1, i32 0, i32 1], [4 x i32] [i32 0, i32 1, i32 1, i32 0], [4 x i32] [i32 0, i32 0, i32 1, i32 1], [4 x i32] [i32 0, i32 0, i32 0, i32 1]]
define i32 @main() {
%1 = alloca [4 x [4 x i32]]
%2 = bitcast [4 x [4 x i32]]* %1 to i8*
%3 = bitcast [4 x [4 x i32]]* %1 to i32**
%4 = call i32 @transitiveClosure(i32** %3)
ret i32 0
}
/* Variables and functions */
bool SHAREMIND_SET_KEY_LESS_THAN_unsigned_long(unsigned long const k1,
                                               unsigned long const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_LESS_THAN_unsigned_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_LESS_THAN_unsigned_long>:
xor    %eax,%eax
cmp    %rsi,%rdi
setb   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_unsigned_long(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_unsigned_long(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void pcm_drop(struct codec *c) {}


x86 assembly (clang, -O0):
<pcm_drop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcm_drop>:
ret

LLVM IR (-O0):
%struct.codec = type opaque
define void @pcm_drop(%struct.codec* %0) {
%2 = alloca %struct.codec*
store %struct.codec* %0, %struct.codec** %2
ret void
}

LLVM IR (-O2):
%struct.codec = type opaque
define void @pcm_drop(%struct.codec* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int check_for_suitable_knife(int watermelon, int knife) {
  if (watermelon % knife != 0) {
    printf("Error: %d can\'t be resolved by %d.\n", watermelon, knife);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<check_for_suitable_knife>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     114c <check_for_suitable_knife+0x3c>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1153 <check_for_suitable_knife+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_for_suitable_knife>:
mov    %esi,%ecx
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1136 <check_for_suitable_knife+0x26>
push   %rax
mov    %edi,%esi
lea    0xedb(%rip),%rdi
mov    %ecx,%edx
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Error: %d can't be resolved by %d.\0A\00"
define i32 @check_for_suitable_knife(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = srem i32 %6, %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12)
store i32 -1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %10
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [36 x i8] c"Error: %d can't be resolved by %d.\0A\00"
define i32 @check_for_suitable_knife(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ -1, %5 ], [ 0, %2 ]
ret i32 %8
}
atoo(s) char *s;
{
  register n = 0;
  while ('0' <= *s && *s < '8') {
    n *= 8;
    n += *s++ - '0';
  }
  return (n);
}


x86 assembly (clang, -O0):
<atoo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0xd(%rbp)
jg     1138 <atoo+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x38,%eax
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1148 <atoo+0x48>
jmp    1171 <atoo+0x71>
mov    -0xc(%rbp),%eax
shl    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
sub    $0x30,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <atoo+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoo>:
mov    (%rdi),%cl
mov    %ecx,%edx
and    $0xf8,%dl
xor    %eax,%eax
cmp    $0x30,%dl
jne    113a <atoo+0x3a>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl %cl,%ecx
lea    (%rcx,%rax,8),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
mov    %ecx,%edx
and    $0xf8,%dl
add    $0x1,%rdi
cmp    $0x30,%dl
je     1120 <atoo+0x20>
ret

LLVM IR (-O0):
define i32 @atoo(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp sle i32 48, %7
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp slt i32 %12, 56
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %26
16: ; preds = %14
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 8
store i32 %18, i32* %3
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
%21 = load i8, i8* %19
%22 = sext i8 %21 to i32
%23 = sub nsw i32 %22, 48
%24 = load i32, i32* %3
%25 = add nsw i32 %24, %23
store i32 %25, i32* %3
br label %4
26: ; preds = %14
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @atoo(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -8
%4 = icmp eq i8 %3, 48
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i32 [ %13, %5 ], [ 0, %1 ]
%8 = phi i8* [ %11, %5 ], [ %0, %1 ]
%9 = zext i8 %6 to i32
%10 = shl nsw i32 %7, 3
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = add i32 %10, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %11
%15 = and i8 %14, -8
%16 = icmp eq i8 %15, 48
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
/* Variables and functions */
unsigned int __bextr_u32(unsigned int, unsigned int);
unsigned int func_bextr32(unsigned int X, unsigned int Y) {
  return __bextr_u32(X, Y);
}


x86 assembly (clang, -O0):
<func_bextr32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__bextr_u32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_bextr32>:
jmp    1030 <__bextr_u32@plt>

LLVM IR (-O0):
define i32 @func_bextr32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__bextr_u32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @func_bextr32(i32 %0, i32 %1) {
%3 = tail call i32 @__bextr_u32(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
void SHAREMIND_MAP_KEY_FREE_int16_t(int16_t *const dest) { (void)dest; }


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_FREE_int16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_FREE_int16_t>:
ret

LLVM IR (-O0):
define void @SHAREMIND_MAP_KEY_FREE_int16_t(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @SHAREMIND_MAP_KEY_FREE_int16_t(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, void *);
int /*<<< orphan*/ stderr;
void rtpp_socket_bind_fin(void *pub) {
  fprintf(stderr,
          "Method rtpp_socket@%p::bind2 (rtpp_socket_bind) is invoked after "
          "destruction\x0a",
          pub);
  abort();
}


x86 assembly (clang, -O0):
<rtpp_socket_bind_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<rtpp_socket_bind_fin>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [78 x i8] c"Method rtpp_socket@%p::bind2 (rtpp_socket_bind) is invoked after destruction\0A\00"
define void @rtpp_socket_bind_fin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [78 x i8] c"Method rtpp_socket@%p::bind2 (rtpp_socket_bind) is invoked after destruction\0A\00"
define void @rtpp_socket_bind_fin(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (...) @abort()
unreachable
}