#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SHAMD5ResultRead(uint32_t ui32Base, uint32_t *pui32Dest) {
  uint32_t ui32Idx, ui32Count;
  ;
  switch ((*((volatile uint32_t *)(ui32Base + 0x00000044))) & 0x00000007) {
  case 0x00000000: {
    ui32Count = 16;
    break;
  }
  case 0x00000002: {
    ui32Count = 20;
    break;
  }
  case 0x00000004: {
    ui32Count = 28;
    break;
  }
  case 0x00000006: {
    ui32Count = 32;
    break;
  }
  default: {
    return;
  }
  }
  for (ui32Idx = 0; ui32Idx < ui32Count; ui32Idx += 4) {
    *pui32Dest++ = (*((volatile uint32_t *)(ui32Base + 0x00000020 + ui32Idx)));
  }
}


x86 assembly (clang, -O0):
<SHAMD5ResultRead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x44,%eax
cltq
mov    (%rax),%eax
and    $0x7,%eax
mov    %rax,-0x20(%rbp)
sub    $0x6,%eax
ja     1169 <SHAMD5ResultRead+0x69>
mov    -0x20(%rbp),%rax
lea    0xed0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x10,-0x18(%rbp)
jmp    116e <SHAMD5ResultRead+0x6e>
movl   $0x14,-0x18(%rbp)
jmp    116e <SHAMD5ResultRead+0x6e>
movl   $0x1c,-0x18(%rbp)
jmp    116e <SHAMD5ResultRead+0x6e>
movl   $0x20,-0x18(%rbp)
jmp    116e <SHAMD5ResultRead+0x6e>
jmp    11ad <SHAMD5ResultRead+0xad>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    11ad <SHAMD5ResultRead+0xad>
mov    -0x4(%rbp),%eax
add    $0x20,%eax
add    -0x14(%rbp),%eax
cltq
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x10(%rbp)
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x14(%rbp)
jmp    1175 <SHAMD5ResultRead+0x75>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5ResultRead>:
movslq %edi,%rax
mov    0x44(%rax),%ecx
and    $0x7,%ecx
cmp    $0x7,%ecx
je     1140 <SHAMD5ResultRead+0x40>
mov    $0x55,%edx
bt     %ecx,%edx
jae    1140 <SHAMD5ResultRead+0x40>
lea    0xee1(%rip),%rdx
mov    (%rdx,%rcx,8),%rcx
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nop
mov    0x20(%rdx,%rax,1),%edi
mov    %edi,(%rsi,%rdx,1)
add    $0x4,%rdx
cmp    %rcx,%rdx
jb     1130 <SHAMD5ResultRead+0x30>
ret

LLVM IR (-O0):
define void @SHAMD5ResultRead(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 68
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, 7
switch i32 %12, label %17 [
i32 0, label %13
i32 2, label %14
i32 4, label %15
i32 6, label %16
]
13: ; preds = %2
store i32 16, i32* %6
br label %18
14: ; preds = %2
store i32 20, i32* %6
br label %18
15: ; preds = %2
store i32 28, i32* %6
br label %18
16: ; preds = %2
store i32 32, i32* %6
br label %18
17: ; preds = %2
br label %36
18: ; preds = %16, %15, %14, %13
store i32 0, i32* %5
br label %19
19: ; preds = %33, %18
%20 = load i32, i32* %5
%21 = load i32, i32* %6
%22 = icmp slt i32 %20, %21
br i1 %22, label %23, label %36
23: ; preds = %19
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 32
%26 = load i32, i32* %5
%27 = add nsw i32 %25, %26
%28 = sext i32 %27 to i64
%29 = inttoptr i64 %28 to i32*
%30 = load volatile i32, i32* %29
%31 = load i32*, i32** %4
%32 = getelementptr inbounds i32, i32* %31, i32 1
store i32* %32, i32** %4
store i32 %30, i32* %31
br label %33
33: ; preds = %23
%34 = load i32, i32* %5
%35 = add nsw i32 %34, 4
store i32 %35, i32* %5
br label %19
36: ; preds = %17, %19
ret void
}

LLVM IR (-O2):
@switch.table.SHAMD5ResultRead = [7 x i64] [i64 16, i64 16, i64 20, i64 16, i64 28, i64 16, i64 32]
define void @SHAMD5ResultRead(i32 %0, i32* nocapture writeonly %1) {
%3 = add nsw i32 %0, 68
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, 7
%8 = icmp eq i32 %7, 7
br i1 %8, label %29, label %9
9: ; preds = %2
%10 = trunc i32 %7 to i8
%11 = lshr i8 85, %10
%12 = and i8 %11, 1
%13 = icmp eq i8 %12, 0
br i1 %13, label %29, label %14
14: ; preds = %9
%15 = zext i32 %7 to i64
%16 = getelementptr inbounds [7 x i64], [7 x i64]* @switch.table.SHAMD5ResultRead, i64 0, i64 %15
%17 = load i64, i64* %16
%18 = add nsw i32 %0, 32
%19 = sext i32 %18 to i64
br label %20
20: ; preds = %14, %20
%21 = phi i64 [ 0, %14 ], [ %27, %20 ]
%22 = phi i32* [ %1, %14 ], [ %26, %20 ]
%23 = add nsw i64 %21, %19
%24 = inttoptr i64 %23 to i32*
%25 = load volatile i32, i32* %24
%26 = getelementptr inbounds i32, i32* %22, i64 1
store i32 %25, i32* %22
%27 = add nuw nsw i64 %21, 4
%28 = icmp ult i64 %27, %17
br i1 %28, label %20, label %29
29: ; preds = %20, %9, %2
ret void
}