xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void print_simulation_not_completed(void) {
  puts(">>> WARNING! The simulation did not complete! <<<");
  puts(">>> Increase the maximum simulation duration. <<<");
  puts("------------------------------------------------");
}


x86 assembly (clang, -O0):
<print_simulation_not_completed>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0b(%rip),%rdi
call   1030 <puts@plt>
lea    0xf31(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_simulation_not_completed>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0e(%rip),%rdi
call   1030 <puts@plt>
lea    0xf34(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [50 x i8] c">>> WARNING! The simulation did not complete! <<<\00"
@.str.1 = [50 x i8] c">>> Increase the maximum simulation duration. <<<\00"
@.str.2 = [49 x i8] c"------------------------------------------------\00"
define void @print_simulation_not_completed() {
%1 = call i32 @puts(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c">>> WARNING! The simulation did not complete! <<<\00"
@.str.1 = [50 x i8] c">>> Increase the maximum simulation duration. <<<\00"
@.str.2 = [49 x i8] c"------------------------------------------------\00"
define void @print_simulation_not_completed() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bitonicSortSB(int *, int /*<<< orphan*/, int, int);
int callerSB(int sizeSB, int *dataSB) { bitonicSortSB(dataSB, 0, sizeSB, 1); }


x86 assembly (clang, -O0):
<callerSB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%edx
xor    %esi,%esi
mov    $0x1,%ecx
call   1030 <bitonicSortSB@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callerSB>:
mov    %edi,%edx
mov    %rsi,%rdi
xor    %esi,%esi
mov    $0x1,%ecx
jmp    1030 <bitonicSortSB@plt>

LLVM IR (-O0):
define i32 @callerSB(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = load i32, i32* %4
%8 = call i32 @bitonicSortSB(i32* %6, i32 0, i32 %7, i32 1)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @callerSB(i32 %0, i32* %1) {
%3 = tail call i32 @bitonicSortSB(i32* %1, i32 0, i32 %0, i32 1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hello() { printf("Hello, I have been written in C\n"); }


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"Hello, I have been written in C\0A\00"
define void @hello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [32 x i8] c"Hello, I have been written in C\00"
define void @hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ mod_with_sub(int, int);
int is_prime(int x) {
  int i;
  for (i = 2; i < x; i++)
    if (mod_with_sub(x, i) == 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1162 <is_prime+0x52>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <mod_with_sub@plt>
cmp    $0x0,%rax
jne    114f <is_prime+0x3f>
movl   $0x0,-0x4(%rbp)
jmp    1169 <is_prime+0x59>
jmp    1154 <is_prime+0x44>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1122 <is_prime+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
push   %rbp
push   %r14
push   %rbx
mov    $0x1,%r14d
cmp    $0x3,%edi
jl     114a <is_prime+0x3a>
mov    %edi,%ebp
mov    $0x2,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %ebx,%esi
call   1030 <mod_with_sub@plt>
test   %rax,%rax
je     1147 <is_prime+0x37>
add    $0x1,%ebx
cmp    %ebx,%ebp
jne    1130 <is_prime+0x20>
jmp    114a <is_prime+0x3a>
xor    %r14d,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i64 @mod_with_sub(i32 %10, i32 %11)
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %2
br label %20
15: ; preds = %9
br label %16
16: ; preds = %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
store i32 1, i32* %2
br label %20
20: ; preds = %19, %14
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = tail call i64 @mod_with_sub(i32 %0, i32 %6)
%8 = icmp eq i64 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 1, %3 ], [ 0, %5 ]
ret i32 %11
}
void foo(int *a, char *b, char *c) {
  __builtin_memmove(c, b, a[c[0]]);
  int d = c[0] == 1;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbq (%rcx),%rcx
movslq (%rax,%rcx,4),%rdx
call   1030 <memmove@plt>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %rdx,%rax
movsbq (%rdx),%rcx
movslq (%rdi,%rcx,4),%rdx
mov    %rax,%rdi
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @foo(i32* %0, i8* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = load i8*, i8** %5
%10 = load i32*, i32** %4
%11 = load i8*, i8** %6
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
%14 = sext i8 %13 to i64
%15 = getelementptr inbounds i32, i32* %10, i64 %14
%16 = load i32, i32* %15
%17 = sext i32 %16 to i64
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i64 0
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 1
%23 = zext i1 %22 to i32
store i32 %23, i32* %7
ret void
}

LLVM IR (-O2):
define void @foo(i32* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
%4 = load i8, i8* %2
%5 = sext i8 %4 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = sext i32 %7 to i64
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %2, i8* align 1 %1, i64 %8, i1 false)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ anvil_syslog(int /*<<< orphan*/, char *);
int /*<<< orphan*/ waitpid(int, int *, int /*<<< orphan*/);
pid_t wait(int *stat_loc) {
  anvil_syslog(0, "Calling wait()\n");
  return waitpid(-1, stat_loc, 0);
}


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
lea    0xecb(%rip),%rsi
call   1030 <anvil_syslog@plt>
mov    -0x8(%rbp),%rsi
mov    $0xffffffff,%edi
xor    %edx,%edx
call   1040 <waitpid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
xor    %edi,%edi
call   1030 <anvil_syslog@plt>
mov    $0xffffffff,%edi
mov    %rbx,%rsi
xor    %edx,%edx
pop    %rbx
jmp    1040 <waitpid@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Calling wait()\0A\00"
define i32 @wait(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 @anvil_syslog(i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = load i32*, i32** %2
%5 = call i32 @waitpid(i32 -1, i32* %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
@.str = [16 x i8] c"Calling wait()\0A\00"
define i32 @wait(i32* %0) {
%2 = tail call i32 @anvil_syslog(i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @waitpid(i32 -1, i32* %0, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void display_gnu(void) {
  printf("ut804_logger  Copyright (C) 2013 MXN, katosheen. ");
  printf("This program comes with ABSOLUTELY NO WARRANTY. \n");
  printf("This is free software, and you are welcome to redistribute it under "
         "certain conditions, ");
  printf("GNU General Public License <http://www.gnu.org/licenses/>\n\n");
}


x86 assembly (clang, -O0):
<display_gnu>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0b(%rip),%rdi
call   1030 <printf@plt>
lea    0xf31(%rip),%rdi
call   1030 <printf@plt>
lea    0xf7e(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_gnu>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xf57(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1040 <printf@plt>
lea    0xf70(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"ut804_logger Copyright (C) 2013 MXN, katosheen. \00"
@.str.1 = [50 x i8] c"This program comes with ABSOLUTELY NO WARRANTY. \0A\00"
@.str.2 = [89 x i8] c"This is free software, and you are welcome to redistribute it under certain conditions, \00"
@.str.3 = [60 x i8] c"GNU General Public License <http://www.gnu.org/licenses/>\0A\0A\00"
define void @display_gnu() {
%1 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([89 x i8], [89 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c"ut804_logger Copyright (C) 2013 MXN, katosheen. \00"
@.str.2 = [89 x i8] c"This is free software, and you are welcome to redistribute it under certain conditions, \00"
@str = [49 x i8] c"This program comes with ABSOLUTELY NO WARRANTY. \00"
@str.4 = [59 x i8] c"GNU General Public License <http://www.gnu.org/licenses/>\0A\00"
define void @display_gnu() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([89 x i8], [89 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Sync();
void M36Restore(int version) { Sync(); }


x86 assembly (clang, -O0):
<M36Restore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Sync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M36Restore>:
xor    %eax,%eax
jmp    1030 <Sync@plt>

LLVM IR (-O0):
define void @M36Restore(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @Sync()
ret void
}

LLVM IR (-O2):
define void @M36Restore(i32 %0) {
%2 = tail call i32 (...) @Sync()
ret void
}
/* Variables and functions */
double pow(int, double);
double DBToW(double x) { return (pow(10, (x / 10))); }


x86 assembly (clang, -O0):
<DBToW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
mov    $0xa,%edi
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBToW>:
divsd  0xee8(%rip),%xmm0
mov    $0xa,%edi
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @DBToW(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+01
%5 = call double @pow(i32 10, double %4)
ret double %5
}

LLVM IR (-O2):
define double @DBToW(double %0) {
%2 = fdiv double %0, 1.000000e+01
%3 = tail call double @pow(i32 10, double %2)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_151() {
  Assert_real((isqrt(151) == 12),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              760, ("Integer square root of 151 should be 12"));
}


x86 assembly (clang, -O0):
<t_sqrt_151>:
push   %rbp
mov    %rsp,%rbp
mov    $0x97,%edi
call   1030 <isqrt@plt>
cmp    $0xc,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x2f8,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_151>:
push   %rax
mov    $0x97,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xc,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x2f8,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 151 should be 12\00"
define void @t_sqrt_151() {
%1 = call i32 @isqrt(i32 151)
%2 = icmp eq i32 %1, 12
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 760, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 151 should be 12\00"
define void @t_sqrt_151() {
%1 = tail call i32 @isqrt(i32 151)
%2 = icmp eq i32 %1, 12
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 760, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x61() {
  Assert_real((iscntrl(97) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              490, ("iscntrl should be 0 for a"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x61>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1ea,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x61>:
push   %rax
mov    $0x61,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1ea,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for a\00"
define void @t_iscntrl_0x61() {
%1 = call i64 @iscntrl(i32 97)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 490, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for a\00"
define void @t_iscntrl_0x61() {
%1 = tail call i64 @iscntrl(i32 97)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 490, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void wpas_dbus_signal_p2p_group_started(struct wpa_supplicant *wpa_s,
                                        const struct wpa_ssid *ssid, int client,
                                        int network_id) {}


x86 assembly (clang, -O0):
<wpas_dbus_signal_p2p_group_started>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_dbus_signal_p2p_group_started>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
%struct.wpa_ssid = type opaque
define void @wpas_dbus_signal_p2p_group_started(%struct.wpa_supplicant* %0, %struct.wpa_ssid* %1, i32 %2, i32 %3) {
%5 = alloca %struct.wpa_supplicant*
%6 = alloca %struct.wpa_ssid*
%7 = alloca i32
%8 = alloca i32
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %5
store %struct.wpa_ssid* %1, %struct.wpa_ssid** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
%struct.wpa_ssid = type opaque
define void @wpas_dbus_signal_p2p_group_started(%struct.wpa_supplicant* nocapture %0, %struct.wpa_ssid* nocapture %1, i32 %2, i32 %3) {
ret void
}
copia(char *dest, const char *fonte) {
  while (*fonte)
    *dest++ = *fonte++;
  *dest = 0;
}


x86 assembly (clang, -O0):
<copia>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1140 <copia+0x40>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
jmp    110c <copia+0xc>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<copia>:
mov    (%rsi),%al
test   %al,%al
je     1121 <copia+0x21>
add    $0x1,%rsi
nopw   0x0(%rax,%rax,1)
mov    %al,(%rdi)
add    $0x1,%rdi
movzbl (%rsi),%eax
add    $0x1,%rsi
test   %al,%al
jne    1110 <copia+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define i32 @copia(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
%13 = load i8, i8* %11
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %4
store i8 %13, i8* %14
br label %6
16: ; preds = %6
%17 = load i8*, i8** %4
store i8 0, i8* %17
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @copia(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %9, %5 ], [ %1, %2 ]
%8 = phi i8* [ %10, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = getelementptr inbounds i8, i8* %8, i64 1
store i8 %6, i8* %8
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int get_bit(uint8_t *data_buf, int bit_idx) {
  if ((data_buf[bit_idx / 8] & 0x80 >> (bit_idx % 8)) == 0)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<get_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%eax
mov    %edx,%ecx
mov    $0x80,%edx
sar    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
jne    115d <get_bit+0x5d>
movl   $0x0,-0x4(%rbp)
jmp    1164 <get_bit+0x64>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bit>:
mov    %esi,%ecx
lea    0x7(%rcx),%eax
test   %esi,%esi
cmovns %esi,%eax
sar    $0x3,%eax
cltq
mov    (%rdi,%rax,4),%eax
and    $0x7,%cl
shl    %cl,%eax
movzbl %al,%eax
shr    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @get_bit(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %5
%8 = sdiv i32 %7, 8
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %6, i64 %9
%11 = load i32, i32* %10
%12 = load i32, i32* %5
%13 = srem i32 %12, 8
%14 = ashr i32 128, %13
%15 = and i32 %11, %14
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 0, i32* %3
br label %19
18: ; preds = %2
store i32 1, i32* %3
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @get_bit(i32* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = and i32 %1, 7
%8 = lshr i32 128, %7
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ wait(int *);
int main(int argc, char **argv) {
  int status;
  wait(&status);
  perror("error on wait");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
call   1040 <wait@plt>
lea    0xeba(%rip),%rdi
call   1030 <perror@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
call   1040 <wait@plt>
lea    0xece(%rip),%rdi
call   1030 <perror@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"error on wait\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @wait(i32* %6)
%8 = call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"error on wait\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @wait(i32* %3)
%6 = call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int getPositiveInt();
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int n = getPositiveInt();
  printf("Thanks for the %i\n", n);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <getPositiveInt@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getPositiveInt@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Thanks for the %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 (...) @getPositiveInt()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"Thanks for the %i\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getPositiveInt()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int LOCK_NB;
int LOCK_SH;
int sw_flock(int, int);
int sw_nb_sh_flock(int fd) { return sw_flock(fd, LOCK_SH | LOCK_NB); }


x86 assembly (clang, -O0):
<sw_nb_sh_flock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
mov    0x2ea2(%rip),%rax
or     (%rax),%esi
call   1030 <sw_flock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sw_nb_sh_flock>:
mov    0x2ed1(%rip),%rax
mov    0x2eb2(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
jmp    1030 <sw_flock@plt>

LLVM IR (-O0):
@LOCK_SH = global i32 0
@LOCK_NB = global i32 0
define i32 @sw_nb_sh_flock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @LOCK_SH
%5 = load i32, i32* @LOCK_NB
%6 = or i32 %4, %5
%7 = call i32 @sw_flock(i32 %3, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@LOCK_SH = global i32 0
@LOCK_NB = global i32 0
define i32 @sw_nb_sh_flock(i32 %0) {
%2 = load i32, i32* @LOCK_SH
%3 = load i32, i32* @LOCK_NB
%4 = or i32 %3, %2
%5 = tail call i32 @sw_flock(i32 %0, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ setup_parent(char *, int, char **);
int main(int argc, char *argv[]) { setup_parent("domain", argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
lea    0xed3(%rip),%rdi
call   1030 <setup_parent@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsi,%rdx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
call   1030 <setup_parent@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"domain\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @setup_parent(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5, i8** %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"domain\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @setup_parent(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0, i8** %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __cpuid(unsigned int, unsigned int, unsigned int,
                           unsigned int, unsigned int);
unsigned int cpuid_ecx(unsigned int op) {
  unsigned int eax, ebx, ecx, edx;
  __cpuid(op, eax, ebx, ecx, edx);
  return ecx;
}


x86 assembly (clang, -O0):
<cpuid_ecx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
call   1030 <__cpuid@plt>
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_ecx>:
jmp    1030 <__cpuid@plt>

LLVM IR (-O0):
define i32 @cpuid_ecx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @__cpuid(i32 %7, i32 %8, i32 %9, i32 %10, i32 %11)
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @cpuid_ecx(i32 %0) {
%2 = tail call i32 @__cpuid(i32 %0, i32 undef, i32 undef, i32 undef, i32 undef)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ RDoSQ(int /*<<< orphan*/);
void RDoSQ1(void) { RDoSQ(0); }


x86 assembly (clang, -O0):
<RDoSQ1>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <RDoSQ@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RDoSQ1>:
xor    %edi,%edi
jmp    1030 <RDoSQ@plt>

LLVM IR (-O0):
define void @RDoSQ1() {
%1 = call i32 @RDoSQ(i32 0)
ret void
}

LLVM IR (-O2):
define void @RDoSQ1() {
%1 = tail call i32 @RDoSQ(i32 0)
ret void
}
/* Type definitions */
struct RNAeval_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ RNAeval_cmdline_parser_release(struct RNAeval_args_info *);
void RNAeval_cmdline_parser_free(struct RNAeval_args_info *args_info) {
  RNAeval_cmdline_parser_release(args_info);
}


x86 assembly (clang, -O0):
<RNAeval_cmdline_parser_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RNAeval_cmdline_parser_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAeval_cmdline_parser_free>:
jmp    1030 <RNAeval_cmdline_parser_release@plt>

LLVM IR (-O0):
%struct.RNAeval_args_info = type { i32 }
define void @RNAeval_cmdline_parser_free(%struct.RNAeval_args_info* %0) {
%2 = alloca %struct.RNAeval_args_info*
store %struct.RNAeval_args_info* %0, %struct.RNAeval_args_info** %2
%3 = load %struct.RNAeval_args_info*, %struct.RNAeval_args_info** %2
%4 = call i32 @RNAeval_cmdline_parser_release(%struct.RNAeval_args_info* %3)
ret void
}

LLVM IR (-O2):
%struct.RNAeval_args_info = type { i32 }
define void @RNAeval_cmdline_parser_free(%struct.RNAeval_args_info* %0) {
%2 = tail call i32 @RNAeval_cmdline_parser_release(%struct.RNAeval_args_info* %0)
ret void
}
void noop(void) { return; }


x86 assembly (clang, -O0):
<noop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop>:
ret

LLVM IR (-O0):
define void @noop() {
ret void
}

LLVM IR (-O2):
define void @noop() {
ret void
}
int reverse(int n) {
  int result = 0;
  while (n > 0) {
    result = 10 * result + n % 10;
    n /= 10;
  }
  return result;
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1145 <reverse+0x45>
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <reverse+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
xor    %eax,%eax
test   %edi,%edi
jle    1131 <reverse+0x31>
mov    $0xcccccccd,%r8d
nopl   0x0(%rax)
lea    (%rax,%rax,4),%eax
mov    %edi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%esi
lea    (%rsi,%rsi,4),%esi
mov    %edi,%ecx
sub    %esi,%ecx
lea    (%rcx,%rax,2),%eax
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <reverse+0x10>
ret

LLVM IR (-O0):
define i32 @reverse(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %3
%9 = mul nsw i32 10, %8
%10 = load i32, i32* %2
%11 = srem i32 %10, 10
%12 = add nsw i32 %9, %11
store i32 %12, i32* %3
%13 = load i32, i32* %2
%14 = sdiv i32 %13, 10
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @reverse(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ %0, %1 ]
%6 = mul nsw i32 %4, 10
%7 = urem i32 %5, 10
%8 = add nsw i32 %6, %7
%9 = udiv i32 %5, 10
%10 = icmp ult i32 %5, 10
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ __free_cf(void *);
void CGPDFDocumentRelease(void *item) { __free_cf(item); }


x86 assembly (clang, -O0):
<CGPDFDocumentRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__free_cf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CGPDFDocumentRelease>:
jmp    1030 <__free_cf@plt>

LLVM IR (-O0):
define void @CGPDFDocumentRelease(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__free_cf(i8* %3)
ret void
}

LLVM IR (-O2):
define void @CGPDFDocumentRelease(i8* %0) {
%2 = tail call i32 @__free_cf(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ am_util_string_strncmp(char const *, char const *, int);
int32_t am_util_string_strcmp(const char *str1, const char *str2) {
  return am_util_string_strncmp(str1, str2, 0xffffffff);
}


x86 assembly (clang, -O0):
<am_util_string_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xffffffff,%edx
call   1030 <am_util_string_strncmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<am_util_string_strcmp>:
mov    $0xffffffff,%edx
jmp    1030 <am_util_string_strncmp@plt>

LLVM IR (-O0):
define i32 @am_util_string_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @am_util_string_strncmp(i8* %5, i8* %6, i32 -1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @am_util_string_strcmp(i8* %0, i8* %1) {
%3 = tail call i32 @am_util_string_strncmp(i8* %0, i8* %1, i32 -1)
ret i32 %3
}
/* Type definitions */
struct feature_pair {
  int dummy;
};
struct CovariateAnalysis {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void _emitJSONCovSign(const struct feature_pair *pair,
                      const struct CovariateAnalysis *covan, FILE *fp) {}


x86 assembly (clang, -O0):
<_emitJSONCovSign>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_emitJSONCovSign>:
ret

LLVM IR (-O0):
%struct.feature_pair = type { i32 }
%struct.CovariateAnalysis = type { i32 }
define void @_emitJSONCovSign(%struct.feature_pair* %0, %struct.CovariateAnalysis* %1, i32* %2) {
%4 = alloca %struct.feature_pair*
%5 = alloca %struct.CovariateAnalysis*
%6 = alloca i32*
store %struct.feature_pair* %0, %struct.feature_pair** %4
store %struct.CovariateAnalysis* %1, %struct.CovariateAnalysis** %5
store i32* %2, i32** %6
ret void
}

LLVM IR (-O2):
%struct.feature_pair = type { i32 }
%struct.CovariateAnalysis = type { i32 }
define void @_emitJSONCovSign(%struct.feature_pair* nocapture %0, %struct.CovariateAnalysis* nocapture %1, i32* nocapture %2) {
ret void
}
void foo820(int p) {}


x86 assembly (clang, -O0):
<foo820>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo820>:
ret

LLVM IR (-O0):
define void @foo820(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo820(i32 %0) {
ret void
}
/* Type definitions */
struct file_info {
  int dummy;
};
struct dir_entry_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ file_unlink(struct dir_entry_info *);
struct dir_entry_info *pick_entry(struct file_info *);
void file_unlink_file(struct file_info *file) {
  struct dir_entry_info *entry;
  entry = pick_entry(file);
  if (!entry)
    return;
  file_unlink(entry);
}


x86 assembly (clang, -O0):
<file_unlink_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pick_entry@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1149 <file_unlink_file+0x29>
jmp    1152 <file_unlink_file+0x32>
mov    -0x10(%rbp),%rdi
call   1040 <file_unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_unlink_file>:
push   %rax
call   1030 <pick_entry@plt>
test   %rax,%rax
je     1134 <file_unlink_file+0x14>
mov    %rax,%rdi
pop    %rax
jmp    1040 <file_unlink@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.file_info = type { i32 }
%struct.dir_entry_info = type { i32 }
define void @file_unlink_file(%struct.file_info* %0) {
%2 = alloca %struct.file_info*
%3 = alloca %struct.dir_entry_info*
store %struct.file_info* %0, %struct.file_info** %2
%4 = load %struct.file_info*, %struct.file_info** %2
%5 = call %struct.dir_entry_info* @pick_entry(%struct.file_info* %4)
store %struct.dir_entry_info* %5, %struct.dir_entry_info** %3
%6 = load %struct.dir_entry_info*, %struct.dir_entry_info** %3
%7 = icmp ne %struct.dir_entry_info* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
br label %12
9: ; preds = %1
%10 = load %struct.dir_entry_info*, %struct.dir_entry_info** %3
%11 = call i32 @file_unlink(%struct.dir_entry_info* %10)
br label %12
12: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
%struct.file_info = type { i32 }
%struct.dir_entry_info = type { i32 }
define void @file_unlink_file(%struct.file_info* %0) {
%2 = tail call %struct.dir_entry_info* @pick_entry(%struct.file_info* %0)
%3 = icmp eq %struct.dir_entry_info* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @file_unlink(%struct.dir_entry_info* %2)
br label %6
6: ; preds = %1, %4
ret void
}
int func(unsigned int n) { return n && !(n & (n - 1)); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112c <func+0x2c>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
test   %edi,%edi
je     110f <func+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = sub i32 %7, 1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br label %12
12: ; preds = %5, %1
%13 = phi i1 [ false, %1 ], [ %11, %5 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @func(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ WriteInstruction(char *);
void CR_NextLevel(void) {
  WriteInstruction("ld hl,nexlev");
  WriteInstruction("ld (hl),h");
}


x86 assembly (clang, -O0):
<CR_NextLevel>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <WriteInstruction@plt>
lea    0xee6(%rip),%rdi
call   1030 <WriteInstruction@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CR_NextLevel>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <WriteInstruction@plt>
lea    0xee9(%rip),%rdi
pop    %rax
jmp    1030 <WriteInstruction@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"ld hl,nexlev\00"
@.str.1 = [10 x i8] c"ld (hl),h\00"
define void @CR_NextLevel() {
%1 = call i32 @WriteInstruction(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @WriteInstruction(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"ld hl,nexlev\00"
@.str.1 = [10 x i8] c"ld (hl),h\00"
define void @CR_NextLevel() {
%1 = tail call i32 @WriteInstruction(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @WriteInstruction(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
void WriteCommentoutText(char *str, FILE *out) {
  fputs("\n/*", out);
  fputs(str, out);
  fputs("*/\n", out);
  return;
}


x86 assembly (clang, -O0):
<WriteCommentoutText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fputs@plt>
mov    -0x10(%rbp),%rsi
lea    0xebc(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteCommentoutText>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0xecf(%rip),%rdi
mov    $0x3,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <fputs@plt>
lea    0xeaf(%rip),%rdi
mov    $0x3,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\0A/*\00"
@.str.1 = [4 x i8] c"*/\0A\00"
define void @WriteCommentoutText(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @fputs(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %5)
%7 = load i8*, i8** %3
%8 = load i32*, i32** %4
%9 = call i32 @fputs(i8* %7, i32* %8)
%10 = load i32*, i32** %4
%11 = call i32 @fputs(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %10)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\0A/*\00"
@.str.1 = [4 x i8] c"*/\0A\00"
define void @WriteCommentoutText(i8* nocapture %0, i32* nocapture %1) {
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 3, i64 1, i32* %1)
%4 = tail call i32 @fputs(i8* %0, i32* %1)
%5 = tail call i64 @fwrite(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i64 3, i64 1, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_int(int *printme) { printf("\t%d", *printme); }


x86 assembly (clang, -O0):
<print_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\09%d\00"
define void @print_int(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\09%d\00"
define void @print_int(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
/* Type definitions */
struct l_class_OC_small {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ZN5smallD2Ev(struct l_class_OC_small *);
void _ZN5smallD1Ev(struct l_class_OC_small *llvm_cbe_this) {
  struct l_class_OC_small *llvm_cbe_this_2e_addr;
  struct l_class_OC_small *llvm_cbe_this1;
  *(&llvm_cbe_this_2e_addr) = llvm_cbe_this;
  llvm_cbe_this1 = *(&llvm_cbe_this_2e_addr);
  _ZN5smallD2Ev(llvm_cbe_this1);
  return;
}


x86 assembly (clang, -O0):
<_ZN5smallD1Ev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <_ZN5smallD2Ev@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN5smallD1Ev>:
jmp    1030 <_ZN5smallD2Ev@plt>

LLVM IR (-O0):
%struct.l_class_OC_small = type { i32 }
define void @_ZN5smallD1Ev(%struct.l_class_OC_small* %0) {
%2 = alloca %struct.l_class_OC_small*
%3 = alloca %struct.l_class_OC_small*
%4 = alloca %struct.l_class_OC_small*
store %struct.l_class_OC_small* %0, %struct.l_class_OC_small** %2
%5 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %2
store %struct.l_class_OC_small* %5, %struct.l_class_OC_small** %3
%6 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %3
store %struct.l_class_OC_small* %6, %struct.l_class_OC_small** %4
%7 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %4
%8 = call i32 @_ZN5smallD2Ev(%struct.l_class_OC_small* %7)
ret void
}

LLVM IR (-O2):
%struct.l_class_OC_small = type { i32 }
define void @_ZN5smallD1Ev(%struct.l_class_OC_small* %0) {
%2 = tail call i32 @_ZN5smallD2Ev(%struct.l_class_OC_small* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ MD5_CTX;

/* Variables and functions */
int /*<<< orphan*/ MD5Final(unsigned char *, int /*<<< orphan*/ *);
int MD5_Final(unsigned char *md, MD5_CTX *c) {
  MD5Final(md, c);
  return 0;
}


x86 assembly (clang, -O0):
<MD5_Final>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <MD5Final@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MD5_Final>:
push   %rax
call   1030 <MD5Final@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @MD5_Final(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @MD5Final(i8* %5, i32* %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @MD5_Final(i8* %0, i32* %1) {
%3 = tail call i32 @MD5Final(i8* %0, i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void left_arrow(void) { printf("Hey, you pressed the left arrow! \n"); }


x86 assembly (clang, -O0):
<left_arrow>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<left_arrow>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"Hey, you pressed the left arrow! \0A\00"
define void @left_arrow() {
%1 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [34 x i8] c"Hey, you pressed the left arrow! \00"
define void @left_arrow() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret void
}