xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void do_cmd_check_usage(void) {
  fprintf(stderr, "usage: check <width> <cmd> <addr> <mask>\n"
                  "<width> access width in bytes [1|2|4]\n"
                  "with <cmd> one of:\n"
                  "while_all_bits_clear: while ((*addr & mask) == 0)\n"
                  "while_all_bits_set:   while ((*addr & mask) == mask)\n"
                  "while_any_bit_clear:  while ((*addr & mask) != mask)\n"
                  "while_any_bit_set:    while ((*addr & mask) != 0)\n");
}


x86 assembly (clang, -O0):
<do_cmd_check_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_cmd_check_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [305 x i8] c"usage: check <width> <cmd> <addr> <mask>\0A<width> access width in bytes [1|2|4]\0Awith <cmd> one of:\0Awhile_all_bits_clear: while ((*addr & mask) == 0)\0Awhile_all_bits_set: while ((*addr & mask) == mask)\0Awhile_any_bit_clear: while ((*addr & mask) != mask)\0Awhile_any_bit_set: while ((*addr & mask) != 0)\0A\00"
define void @do_cmd_check_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([305 x i8], [305 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [305 x i8] c"usage: check <width> <cmd> <addr> <mask>\0A<width> access width in bytes [1|2|4]\0Awith <cmd> one of:\0Awhile_all_bits_clear: while ((*addr & mask) == 0)\0Awhile_all_bits_set: while ((*addr & mask) == mask)\0Awhile_any_bit_clear: while ((*addr & mask) != mask)\0Awhile_any_bit_set: while ((*addr & mask) != 0)\0A\00"
define void @do_cmd_check_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([305 x i8], [305 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct gdb_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gdb_printf(struct gdb_data *, char *);
void gdb_packet_start(struct gdb_data *data) { gdb_printf(data, "$"); }


x86 assembly (clang, -O0):
<gdb_packet_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <gdb_printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdb_packet_start>:
lea    0xee9(%rip),%rsi
jmp    1030 <gdb_printf@plt>

LLVM IR (-O0):
%struct.gdb_data = type { i32 }
@.str = [2 x i8] c"$\00"
define void @gdb_packet_start(%struct.gdb_data* %0) {
%2 = alloca %struct.gdb_data*
store %struct.gdb_data* %0, %struct.gdb_data** %2
%3 = load %struct.gdb_data*, %struct.gdb_data** %2
%4 = call i32 @gdb_printf(%struct.gdb_data* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.gdb_data = type { i32 }
@.str = [2 x i8] c"$\00"
define void @gdb_packet_start(%struct.gdb_data* %0) {
%2 = tail call i32 @gdb_printf(%struct.gdb_data* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *strrchr(char *, char);
char *file_type(char *f) {
  char *cp;
  if ((cp = strrchr(f, '.')) != NULL)
    return cp + 1;
  return " -";
}


x86 assembly (clang, -O0):
<file_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2e,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1149 <file_type+0x39>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1154 <file_type+0x44>
lea    0xeb0(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_type>:
push   %rax
mov    $0x2e,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
lea    0xed7(%rip),%rax
cmovne %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c" -\00"
define i8* @file_type(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 46)
store i8* %6, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i64 1
store i8* %10, i8** %2
br label %12
11: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %12
12: ; preds = %11, %8
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
@.str = [3 x i8] c" -\00"
define i8* @file_type(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = select i1 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4
ret i8* %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t test_bit24(uint32_t *bitarray, uint32_t index) {
  return bitarray[index >> 5] & (0x80000000 >> (index & 0x0000001f));
}


x86 assembly (clang, -O0):
<test_bit24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    -0xc(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x80000000,%edx
shr    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit24>:
mov    %esi,%ecx
mov    %esi,%edx
mov    $0x80000000,%eax
shr    %cl,%eax
sar    $0x5,%edx
movslq %edx,%rcx
and    (%rdi,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @test_bit24(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = ashr i32 %6, 5
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32, i32* %9
%11 = load i32, i32* %4
%12 = and i32 %11, 31
%13 = lshr i32 -2147483648, %12
%14 = and i32 %10, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @test_bit24(i32* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 5
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = and i32 %1, 31
%8 = lshr i32 -2147483648, %7
%9 = and i32 %6, %8
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ val;

/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, int);
void copy_int(int val, void *buf, int maxbytes) {
  if (maxbytes >= (int)sizeof(val)) {
    memcpy(buf, (void *)&val, sizeof(val));
  }
}


x86 assembly (clang, -O0):
<copy_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jl     113e <copy_int+0x2e>
mov    -0x10(%rbp),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_int>:
push   %rax
mov    %edi,0x4(%rsp)
cmp    $0x4,%edx
jl     112f <copy_int+0x1f>
lea    0x4(%rsp),%rax
mov    %rsi,%rdi
mov    %rax,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @copy_int(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp sge i32 %7, 4
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i8*, i8** %5
%11 = bitcast i32* %4 to i8*
%12 = call i32 @memcpy(i8* %10, i8* %11, i32 4)
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
define void @copy_int(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
store i32 %0, i32* %4
%5 = icmp sgt i32 %2, 3
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = bitcast i32* %4 to i8*
%8 = call i32 @memcpy(i8* %1, i8* %7, i32 4)
br label %9
9: ; preds = %6, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ conf_init();
int /*<<< orphan*/ glob_init();
int /*<<< orphan*/ mess_init();
int /*<<< orphan*/ obj_init();
void pd_init(void) {
  mess_init();
  obj_init();
  conf_init();
  glob_init();
}


x86 assembly (clang, -O0):
<pd_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <mess_init@plt>
mov    $0x0,%al
call   1050 <obj_init@plt>
mov    $0x0,%al
call   1060 <conf_init@plt>
mov    $0x0,%al
call   1030 <glob_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pd_init>:
push   %rax
xor    %eax,%eax
call   1040 <mess_init@plt>
xor    %eax,%eax
call   1050 <obj_init@plt>
xor    %eax,%eax
call   1060 <conf_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <glob_init@plt>

LLVM IR (-O0):
define void @pd_init() {
%1 = call i32 (...) @mess_init()
%2 = call i32 (...) @obj_init()
%3 = call i32 (...) @conf_init()
%4 = call i32 (...) @glob_init()
ret void
}

LLVM IR (-O2):
define void @pd_init() {
%1 = tail call i32 (...) @mess_init()
%2 = tail call i32 (...) @obj_init()
%3 = tail call i32 (...) @conf_init()
%4 = tail call i32 (...) @glob_init()
ret void
}
int isBinary(char p) {
  switch (p) {
  case '+':
  case '*':
  case '-':
  case '/':
  case '<':
  case '=':
  case '>':
  case '@':
  case '~':
  case ',':
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isBinary>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffd6,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x54,%eax
ja     1140 <isBinary+0x40>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1147 <isBinary+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBinary>:
add    $0xffffffd6,%edi
cmp    $0x54,%edi
ja     111e <isBinary+0x1e>
mov    $0x1,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isBinary(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 43, label %6
i32 42, label %6
i32 45, label %6
i32 47, label %6
i32 60, label %6
i32 61, label %6
i32 62, label %6
i32 64, label %6
i32 126, label %6
i32 44, label %6
]
6: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @isBinary(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 43, label %4
i32 42, label %4
i32 45, label %4
i32 47, label %4
i32 60, label %4
i32 61, label %4
i32 62, label %4
i32 64, label %4
i32 126, label %4
i32 44, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
void mstrcat(char *s, char *t) {
  while (*s++) {
    ;
  }
  s--;
  while ((*s++ = *t++)) {
    ;
  }
}


x86 assembly (clang, -O0):
<mstrcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1129 <mstrcat+0x29>
jmp    110c <mstrcat+0xc>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1164 <mstrcat+0x64>
jmp    1135 <mstrcat+0x35>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mstrcat>:
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1100 <mstrcat>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,-0x1(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <mstrcat+0x10>
ret

LLVM IR (-O0):
define void @mstrcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %3
%8 = load i8, i8* %6
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5
br label %5
11: ; preds = %5
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 -1
store i8* %13, i8** %3
br label %14
14: ; preds = %21, %11
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
store i8 %17, i8* %18
%20 = icmp ne i8 %17, 0
br i1 %20, label %21, label %22
21: ; preds = %14
br label %14
22: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @mstrcat(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %5, %3 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %4
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %8
%9 = phi i8* [ %13, %8 ], [ %4, %3 ]
%10 = phi i8* [ %11, %8 ], [ %1, %3 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %10
%13 = getelementptr inbounds i8, i8* %9, i64 1
store i8 %12, i8* %9
%14 = icmp eq i8 %12, 0
br i1 %14, label %15, label %8
15: ; preds = %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int main(void) {
  foo();
  foo();
  foo();
  foo();
  foo();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = call i32 (...) @foo()
%4 = call i32 (...) @foo()
%5 = call i32 (...) @foo()
%6 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo()
%3 = tail call i32 (...) @foo()
%4 = tail call i32 (...) @foo()
%5 = tail call i32 (...) @foo()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_rqcounter();
int main(void) {
  init_rqcounter();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <init_rqcounter@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <init_rqcounter@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init_rqcounter()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init_rqcounter()
ret i32 0
}
int SizeWMov(int x) {
  if (x == 0)
    return 5;
  else if (x < 256)
    return 6;
  else
    return 9;
}


x86 assembly (clang, -O0):
<SizeWMov>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <SizeWMov+0x1d>
movl   $0x5,-0x4(%rbp)
jmp    113d <SizeWMov+0x3d>
cmpl   $0x100,-0x8(%rbp)
jge    1136 <SizeWMov+0x36>
movl   $0x6,-0x4(%rbp)
jmp    113d <SizeWMov+0x3d>
movl   $0x9,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SizeWMov>:
xor    %eax,%eax
cmp    $0x100,%edi
setge  %al
test   %edi,%edi
lea    0x6(%rax,%rax,2),%ecx
mov    $0x5,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @SizeWMov(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 5, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 256
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 6, i32* %2
br label %12
11: ; preds = %7
store i32 9, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @SizeWMov(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = icmp slt i32 %0, 256
%4 = select i1 %3, i32 6, i32 9
%5 = select i1 %2, i32 5, i32 %4
ret i32 %5
}
/* Type definitions */
typedef int uint_least32_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_COPY_uint_least32_t(uint_least32_t *const dest,
                                           uint_least32_t const src) {
  return (((*dest) = src), true);
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_COPY_uint_least32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_COPY_uint_least32_t>:
mov    %esi,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_COPY_uint_least32_t(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_COPY_uint_least32_t(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void mov_reg64_preg64(int reg1, int reg2) {
  put8(0x48);
  put8(0x8B);
  put8((reg1 << 3) | reg2);
}


x86 assembly (clang, -O0):
<mov_reg64_preg64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     -0x8(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg64_preg64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0x8b,%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_reg64_preg64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 72)
%6 = call i32 @put8(i32 139)
%7 = load i32, i32* %3
%8 = shl i32 %7, 3
%9 = load i32, i32* %4
%10 = or i32 %8, %9
%11 = call i32 @put8(i32 %10)
ret void
}

LLVM IR (-O2):
define void @mov_reg64_preg64(i32 %0, i32 %1) {
%3 = tail call i32 @put8(i32 72)
%4 = tail call i32 @put8(i32 139)
%5 = shl i32 %0, 3
%6 = or i32 %5, %1
%7 = tail call i32 @put8(i32 %6)
ret void
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ sysbail(char *, unsigned long);
void *bcalloc(size_t n, size_t size) {
  void *p;
  p = calloc(n, size);
  if (p == NULL)
    sysbail("failed to calloc %lu", (unsigned long)(n * size));
  return p;
}


x86 assembly (clang, -O0):
<bcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1161 <bcalloc+0x41>
mov    -0x8(%rbp),%rsi
imul   -0x10(%rbp),%rsi
lea    0xea4(%rip),%rdi
call   1040 <sysbail@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcalloc>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114b <bcalloc+0x2b>
imul   %r15,%r14
lea    0xebd(%rip),%rdi
mov    %r14,%rsi
call   1040 <sysbail@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [21 x i8] c"failed to calloc %lu\00"
define i8* @bcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load i64, i64* %3
%13 = load i64, i64* %4
%14 = mul i64 %12, %13
%15 = call i32 @sysbail(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i64 %14)
br label %16
16: ; preds = %11, %2
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
@.str = [21 x i8] c"failed to calloc %lu\00"
define noalias i8* @bcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = mul i64 %1, %0
%7 = tail call i32 @sysbail(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i64 %6)
br label %8
8: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int sortFirst(int *, int);
void sortArray(int *array, int length) {
  bool swappedValues;
  do {
    swappedValues = sortFirst(array, length);
  } while (swappedValues);
}


x86 assembly (clang, -O0):
<sortArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sortFirst@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    111f <sortArray+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortArray>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <sortFirst@plt>
test   %eax,%eax
jne    1120 <sortArray+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @sortArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %6
6: ; preds = %10, %2
%7 = load i32*, i32** %3
%8 = load i32, i32* %4
%9 = call i32 @sortFirst(i32* %7, i32 %8)
store i32 %9, i32* %5
br label %10
10: ; preds = %6
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @sortArray(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @sortFirst(i32* %0, i32 %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %3
6: ; preds = %3
ret void
}
/* Variables and functions */
scalar_t__ Fork();
int getpid();
int /*<<< orphan*/ printf(char *, int);
void doit() {
  if (Fork() == 0) {
    Fork();
    printf("hello %d\n", getpid());
    return;
  }
}


x86 assembly (clang, -O0):
<doit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Fork@plt>
cmp    $0x0,%rax
jne    1161 <doit+0x31>
mov    $0x0,%al
call   1030 <Fork@plt>
mov    $0x0,%al
call   1040 <getpid@plt>
mov    %eax,%esi
lea    0xea4(%rip),%rdi
call   1050 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doit>:
push   %rax
xor    %eax,%eax
call   1030 <Fork@plt>
test   %rax,%rax
je     113f <doit+0xf>
pop    %rax
ret
xor    %eax,%eax
call   1030 <Fork@plt>
xor    %eax,%eax
call   1040 <getpid@plt>
lea    0xeac(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1050 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"hello %d\0A\00"
define void @doit() {
%1 = call i64 (...) @Fork()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = call i64 (...) @Fork()
%5 = call i32 (...) @getpid()
%6 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
br label %7
7: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"hello %d\0A\00"
define void @doit() {
%1 = tail call i64 (...) @Fork()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i64 (...) @Fork()
%5 = tail call i32 (...) @getpid()
%6 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
br label %7
7: ; preds = %3, %0
ret void
}
void rcu_irq_exit(void) {}


x86 assembly (clang, -O0):
<rcu_irq_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_irq_exit>:
ret

LLVM IR (-O0):
define void @rcu_irq_exit() {
ret void
}

LLVM IR (-O2):
define void @rcu_irq_exit() {
ret void
}
void ff_hevc_put_hevc_qpel_v64_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_v64_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_v64_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_v64_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_v64_8_sse4() {
ret void
}
int f_i10(int i0, int i1, int i2, int i3, int i4, int i5, int i6, int i7,
          int i8, int i9) {
  return i9;
}


x86 assembly (clang, -O0):
<f_i10>:
push   %rbp
mov    %rsp,%rbp
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    0x28(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_i10>:
mov    0x20(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @f_i10(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
store i32 %0, i32* %11
store i32 %1, i32* %12
store i32 %2, i32* %13
store i32 %3, i32* %14
store i32 %4, i32* %15
store i32 %5, i32* %16
store i32 %6, i32* %17
store i32 %7, i32* %18
store i32 %8, i32* %19
store i32 %9, i32* %20
%21 = load i32, i32* %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @f_i10(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 returned %9) {
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ SwoPutsOnChannel(int /*<<< orphan*/, char const *);
void SwoPuts(const char *str) { SwoPutsOnChannel(0, str); }


x86 assembly (clang, -O0):
<SwoPuts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <SwoPutsOnChannel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwoPuts>:
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <SwoPutsOnChannel@plt>

LLVM IR (-O0):
define void @SwoPuts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @SwoPutsOnChannel(i32 0, i8* %3)
ret void
}

LLVM IR (-O2):
define void @SwoPuts(i8* %0) {
%2 = tail call i32 @SwoPutsOnChannel(i32 0, i8* %0)
ret void
}
void free_int_tab(int **tab, int x) {
  int i;
  for (i = 0; i < x; i++) {
    free(tab[i]);
  }
  free(tab);
}


x86 assembly (clang, -O0):
<free_int_tab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_int_tab+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_int_tab+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_int_tab>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_int_tab+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_int_tab+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_int_tab(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = bitcast i32* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32**, i32*** %3
%22 = bitcast i32** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @free_int_tab(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = bitcast i32** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast i32** %0 to i8*
tail call void @free(i8* %14)
ret void
}
/* Variables and functions */
unsigned int L_tmpnam;
unsigned int scalanative_libc_l_tmpnam() { return L_tmpnam; }


x86 assembly (clang, -O0):
<scalanative_libc_l_tmpnam>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalanative_libc_l_tmpnam>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@L_tmpnam = global i32 0
define i32 @scalanative_libc_l_tmpnam() {
%1 = load i32, i32* @L_tmpnam
ret i32 %1
}

LLVM IR (-O2):
@L_tmpnam = global i32 0
define i32 @scalanative_libc_l_tmpnam() {
%1 = load i32, i32* @L_tmpnam
ret i32 %1
}
void gtk_rc_reparse_all_for_settings() {}


x86 assembly (clang, -O0):
<gtk_rc_reparse_all_for_settings>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_rc_reparse_all_for_settings>:
ret

LLVM IR (-O0):
define void @gtk_rc_reparse_all_for_settings() {
ret void
}

LLVM IR (-O2):
define void @gtk_rc_reparse_all_for_settings() {
ret void
}
/* Variables and functions */
int detectPresence(char *);
scalar_t__ graphicMode();
int zenityPresent(void) {
  static int lZenityPresent = -1;
  if (lZenityPresent < 0) {
    lZenityPresent = detectPresence("zenity");
  }
  return lZenityPresent && graphicMode();
}


x86 assembly (clang, -O0):
<zenityPresent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,0x2f01(%rip)
jge    1147 <zenityPresent+0x27>
lea    0xec4(%rip),%rdi
call   1040 <detectPresence@plt>
mov    %eax,0x2ee9(%rip)
xor    %eax,%eax
cmpl   $0x0,0x2ee0(%rip)
mov    %al,-0x1(%rbp)
je     116a <zenityPresent+0x4a>
mov    $0x0,%al
call   1030 <graphicMode@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zenityPresent>:
push   %rax
mov    0x2f09(%rip),%eax
test   %eax,%eax
js     1143 <zenityPresent+0x23>
test   %eax,%eax
je     1159 <zenityPresent+0x39>
xor    %eax,%eax
call   1030 <graphicMode@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret
lea    0xeb6(%rip),%rdi
call   1040 <detectPresence@plt>
mov    %eax,0x2edb(%rip)
test   %eax,%eax
jne    112f <zenityPresent+0xf>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@zenityPresent.lZenityPresent = internal global i32 -1
@.str = [7 x i8] c"zenity\00"
define i32 @zenityPresent() {
%1 = load i32, i32* @zenityPresent.lZenityPresent
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 @detectPresence(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* @zenityPresent.lZenityPresent
br label %5
5: ; preds = %3, %0
%6 = load i32, i32* @zenityPresent.lZenityPresent
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = call i64 (...) @graphicMode()
%10 = icmp ne i64 %9, 0
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@zenityPresent.lZenityPresent = internal unnamed_addr global i32 -1
@.str = [7 x i8] c"zenity\00"
define i32 @zenityPresent() {
%1 = load i32, i32* @zenityPresent.lZenityPresent
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @detectPresence(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* @zenityPresent.lZenityPresent
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %4, %3 ], [ %1, %0 ]
%7 = icmp eq i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %5
%9 = tail call i64 (...) @graphicMode()
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ 0, %5 ], [ %11, %8 ]
ret i32 %13
}
struct dict *load_dicts(const char *directory) {}


x86 assembly (clang, -O0):
<load_dicts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_dicts>:
ret

LLVM IR (-O0):
%struct.dict = type opaque
define %struct.dict* @load_dicts(i8* %0) {
%2 = alloca %struct.dict*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load %struct.dict*, %struct.dict** %2
ret %struct.dict* %4
}

LLVM IR (-O2):
%struct.dict = type opaque
define noalias %struct.dict* @load_dicts(i8* nocapture readnone %0) {
ret %struct.dict* undef
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t int32p_comparator(const void *pl, const void *pr) {
  int32_t lv = *(const int32_t *)pl;
  int32_t rv = *(const int32_t *)pr;
  if (lv < rv)
    return -1;
  else if (lv == rv)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<int32p_comparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jge    113d <int32p_comparator+0x3d>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1160 <int32p_comparator+0x60>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jne    1158 <int32p_comparator+0x58>
movq   $0x0,-0x8(%rbp)
jmp    1160 <int32p_comparator+0x60>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int32p_comparator>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
setne  %cl
mov    $0xffffffffffffffff,%rax
cmovge %rcx,%rax
ret

LLVM IR (-O0):
define i64 @int32p_comparator(i8* %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i64*
%13 = load i64, i64* %12
store i64 %13, i64* %7
%14 = load i64, i64* %6
%15 = load i64, i64* %7
%16 = icmp slt i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i64 -1, i64* %3
br label %24
18: ; preds = %2
%19 = load i64, i64* %6
%20 = load i64, i64* %7
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i64 0, i64* %3
br label %24
23: ; preds = %18
store i64 1, i64* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i64, i64* %3
ret i64 %25
}

LLVM IR (-O2):
define i64 @int32p_comparator(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp slt i64 %4, %6
%8 = icmp ne i64 %4, %6
%9 = zext i1 %8 to i64
%10 = select i1 %7, i64 -1, i64 %9
ret i64 %10
}
void f2(void) {
  int i, j;
#pragma omp for ordered(2)
  for (i = 0; i < 64; i++)
    for (j = 0; j < 64; j++) {
#pragma omp ordered depend(iterator(k = 0 : 1), sink : i - 1, j - 1)
#pragma omp ordered depend(iterator(int l = 0 : 2 : 3), source)
    }
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x40,-0x4(%rbp)
jge    114c <f2+0x4c>
movl   $0x0,-0x8(%rbp)
cmpl   $0x40,-0x8(%rbp)
jge    1139 <f2+0x39>
jmp    112b <f2+0x2b>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111c <f2+0x1c>
jmp    113e <f2+0x3e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <f2+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
ret

LLVM IR (-O0):
define void @f2() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %15, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 64
br i1 %5, label %6, label %18
6: ; preds = %3
store i32 0, i32* %2
br label %7
7: ; preds = %11, %6
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 64
br i1 %9, label %10, label %14
10: ; preds = %7
br label %11
11: ; preds = %10
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %7
14: ; preds = %7
br label %15
15: ; preds = %14
%16 = load i32, i32* %1
%17 = add nsw i32 %16, 1
store i32 %17, i32* %1
br label %3
18: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @f2() {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t size64(uint64_t N) { return (N + 64) >> 6; }


x86 assembly (clang, -O0):
<size64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%eax
sar    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size64>:
lea    0x40(%rdi),%eax
sar    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @size64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 64
%5 = ashr i32 %4, 6
ret i32 %5
}

LLVM IR (-O2):
define i32 @size64(i32 %0) {
%2 = add nsw i32 %0, 64
%3 = ashr i32 %2, 6
ret i32 %3
}
/* Variables and functions */
int g();
int main(void) { return g(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <g@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @g()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @g()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ br();
int /*<<< orphan*/ esay(char const *);
void brp(const char *s) {
  esay(s);
  br();
}


x86 assembly (clang, -O0):
<brp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <esay@plt>
mov    $0x0,%al
call   1040 <br@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brp>:
push   %rax
call   1030 <esay@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <br@plt>

LLVM IR (-O0):
define void @brp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @esay(i8* %3)
%5 = call i32 (...) @br()
ret void
}

LLVM IR (-O2):
define void @brp(i8* %0) {
%2 = tail call i32 @esay(i8* %0)
%3 = tail call i32 (...) @br()
ret void
}
/* Variables and functions */
void *realloc(void *, int);
void *MemReAlloc(void *p, int size) { return realloc(p, size); }


x86 assembly (clang, -O0):
<MemReAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemReAlloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @MemReAlloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @realloc(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @MemReAlloc(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
ret i8* %3
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ parent;
};
struct TYPE_4__ {
  TYPE_1__ xreparent;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xreparent_parent(void *_p) {
  return (unsigned long)((XEvent *)_p)->xreparent.parent;
}


x86 assembly (clang, -O0):
<get_XEvent_xreparent_parent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xreparent_parent>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xreparent_parent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xreparent_parent(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void BGRAToUVRow_NEON() {}


x86 assembly (clang, -O0):
<BGRAToUVRow_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGRAToUVRow_NEON>:
ret

LLVM IR (-O0):
define void @BGRAToUVRow_NEON() {
ret void
}

LLVM IR (-O2):
define void @BGRAToUVRow_NEON() {
ret void
}
void glGetQueryObjectuiv(void) { return; }


x86 assembly (clang, -O0):
<glGetQueryObjectuiv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGetQueryObjectuiv>:
ret

LLVM IR (-O0):
define void @glGetQueryObjectuiv() {
ret void
}

LLVM IR (-O2):
define void @glGetQueryObjectuiv() {
ret void
}
/* Variables and functions */
scalar_t__ islower(int);
scalar_t__ isupper(int);
int isalpha(int ch) { return islower(ch) || isupper(ch); }


x86 assembly (clang, -O0):
<isalpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <isalpha+0x37>
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isalpha+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1040 <isupper@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isupper(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isalpha(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isupper(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void load_mod3() { printf("load mod3\n"); }


x86 assembly (clang, -O0):
<load_mod3>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_mod3>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"load mod3\0A\00"
define void @load_mod3() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [10 x i8] c"load mod3\00"
define void @load_mod3() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ X11InitVideoDisplay();
void InitVideoDisplay(void) { X11InitVideoDisplay(); }


x86 assembly (clang, -O0):
<InitVideoDisplay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <X11InitVideoDisplay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitVideoDisplay>:
xor    %eax,%eax
jmp    1030 <X11InitVideoDisplay@plt>

LLVM IR (-O0):
define void @InitVideoDisplay() {
%1 = call i32 (...) @X11InitVideoDisplay()
ret void
}

LLVM IR (-O2):
define void @InitVideoDisplay() {
%1 = tail call i32 (...) @X11InitVideoDisplay()
ret void
}
void do_fsave(void *p) {
  asm __volatile__("fninit");
  asm __volatile__("fldpi");
  asm __volatile__("fld1");
  asm __volatile__("fldln2");
  asm __volatile__("fsave (%0)" : : "r"(p) : "memory");
}


x86 assembly (clang, -O0):
<do_fsave>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
fninit
fldpi
fld1
fldln2
mov    -0x8(%rbp),%rax
fsave  (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_fsave>:
fninit
fldpi
fld1
fldln2
fsave  (%rdi)
ret

LLVM IR (-O0):
define void @do_fsave(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @do_fsave(i8* %0) {
tail call void asm sideeffect "fninit", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "fldpi", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "fld1", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "fldln2", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "fsave ($0)", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Type definitions */
struct vec4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec4_floor(float *, float *);
__attribute__((always_)) struct vec4 *psvec4_floor(struct vec4 *result,
                                                   struct vec4 *a) {
  vec4_floor((float *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec4_floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec4_floor@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4_floor>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4_floor@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_floor(%struct.vec4* %0, %struct.vec4* %1) {
%3 = alloca %struct.vec4*
%4 = alloca %struct.vec4*
store %struct.vec4* %0, %struct.vec4** %3
store %struct.vec4* %1, %struct.vec4** %4
%5 = load %struct.vec4*, %struct.vec4** %3
%6 = bitcast %struct.vec4* %5 to float*
%7 = load %struct.vec4*, %struct.vec4** %4
%8 = bitcast %struct.vec4* %7 to float*
%9 = call i32 @vec4_floor(float* %6, float* %8)
%10 = load %struct.vec4*, %struct.vec4** %3
ret %struct.vec4* %10
}

LLVM IR (-O2):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_floor(%struct.vec4* returned %0, %struct.vec4* %1) {
%3 = bitcast %struct.vec4* %0 to float*
%4 = bitcast %struct.vec4* %1 to float*
%5 = tail call i32 @vec4_floor(float* %3, float* %4)
ret %struct.vec4* %0
}
/* Variables and functions */
int O_RDWR;
int O_TRUNC;
int open(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ read(int, int, int);
int main() {
  int fd = open("/rdtest.txt", O_RDWR | O_TRUNC, 0);
  read(fd, 0x00, 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
mov    0x2eb9(%rip),%rax
or     (%rax),%esi
lea    0xeb8(%rip),%rdi
xor    %edx,%edx
call   1040 <open@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <read@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    0x2ec9(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xec6(%rip),%rdi
xor    %edx,%edx
call   1040 <open@plt>
mov    %eax,%edi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <read@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"/rdtest.txt\00"
@O_RDWR = global i32 0
@O_TRUNC = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @O_RDWR
%4 = load i32, i32* @O_TRUNC
%5 = or i32 %3, %4
%6 = call i32 @open(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %5, i32 0)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @read(i32 %7, i32 0, i32 10)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"/rdtest.txt\00"
@O_RDWR = global i32 0
@O_TRUNC = global i32 0
define i32 @main() {
%1 = load i32, i32* @O_RDWR
%2 = load i32, i32* @O_TRUNC
%3 = or i32 %2, %1
%4 = tail call i32 @open(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3, i32 0)
%5 = tail call i32 @read(i32 %4, i32 0, i32 10)
ret i32 0
}