xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xb8() {
  Assert_real((isalnum(184) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              925, ("isalnum should be 0 for 0xb8"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xb8>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb8,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x39d,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xb8>:
push   %rax
mov    $0xb8,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x39d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xb8\00"
define void @t_isalnum_0xb8() {
%1 = call i64 @isalnum(i32 184)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 925, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xb8\00"
define void @t_isalnum_0xb8() {
%1 = tail call i64 @isalnum(i32 184)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 925, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
int main() {
  char t[15] = "Hello world!\n";
  char s[20];
  strcpy(s, t);
  printf("%s", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x13(%rbp)
mov    0xec8(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xec2(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xeba(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0x30(%rbp),%rdi
lea    -0x13(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0x30(%rbp),%rsi
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
movabs $0xa21646c726f,%rax
mov    %rax,0x7(%rsp)
movabs $0x6f77206f6c6c6548,%rax
20 77 6f
mov    %rax,(%rsp)
lea    0x10(%rsp),%rbx
mov    %rsp,%rsi
mov    %rbx,%rdi
call   1030 <strcpy@plt>
lea    0xeb6(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.t = [15 x i8] c"Hello world!\0A\00\00"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [15 x i8]
%3 = alloca [20 x i8]
store i32 0, i32* %1
%4 = bitcast [15 x i8]* %2 to i8*
%5 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%6 = getelementptr inbounds [15 x i8], [15 x i8]* %2, i64 0, i64 0
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@__const.main.t = [15 x i8] c"Hello world!\0A\00\00"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [15 x i8]
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [15 x i8], [15 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* %3)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Variables and functions */
float asinf(float);
void sAsin_process(float bIn, float *bOut) { *bOut = asinf(bIn); }


x86 assembly (clang, -O0):
<sAsin_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <asinf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sAsin_process>:
push   %rbx
mov    %rdi,%rbx
call   1030 <asinf@plt>
movss  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @sAsin_process(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = call float @asinf(float %5)
%7 = load float*, float** %4
store float %6, float* %7
ret void
}

LLVM IR (-O2):
define void @sAsin_process(float %0, float* nocapture writeonly %1) {
%3 = tail call float @asinf(float %0)
store float %3, float* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
char *strend(char *);
char *strrchr(char *, char);
char *force_extension(char *filename, char *extension) {
  char *p;
  p = strrchr(filename, '.');
  if (!p)
    p = strend(filename);
  strcpy(p, extension);
  return filename;
}


x86 assembly (clang, -O0):
<force_extension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    116a <force_extension+0x3a>
mov    -0x8(%rbp),%rdi
call   1050 <strend@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<force_extension>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x2e,%esi
call   1040 <strrchr@plt>
test   %rax,%rax
jne    1151 <force_extension+0x21>
mov    %rbx,%rdi
call   1050 <strend@plt>
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @force_extension(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i8* @strrchr(i8* %6, i8 signext 46)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = call i8* @strend(i8* %11)
store i8* %12, i8** %5
br label %13
13: ; preds = %10, %2
%14 = load i8*, i8** %5
%15 = load i8*, i8** %4
%16 = call i32 @strcpy(i8* %14, i8* %15)
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @force_extension(i8* returned %0, i8* %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i8* @strend(i8* %0)
br label %7
7: ; preds = %5, %2
%8 = phi i8* [ %3, %2 ], [ %6, %5 ]
%9 = tail call i32 @strcpy(i8* %8, i8* %1)
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ msg;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ write(int, char *, int);
void _Unwind_PNaClSetResult1() {
  char msg[] = "Aborting: "
               "_Unwind_PNaClSetResult1"
               " called "
               "(C++ exception handling is disabled)\n";
  write(2, msg, sizeof(msg) - 1);
  abort();
}


x86 assembly (clang, -O0):
<_Unwind_PNaClSetResult1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    -0x50(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x4f,%edx
call   1050 <memcpy@plt>
lea    -0x50(%rbp),%rsi
mov    $0x2,%edi
mov    $0x4e,%edx
call   1040 <write@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<_Unwind_PNaClSetResult1>:
sub    $0x58,%rsp
movups 0xf14(%rip),%xmm0
movups %xmm0,0x3f(%rsp)
movaps 0xef9(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xedd(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xec1(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xea5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x2,%edi
mov    $0x4e,%edx
call   1040 <write@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@__const._Unwind_PNaClSetResult1.msg = [79 x i8] c"Aborting: _Unwind_PNaClSetResult1 called (C++ exception handling is disabled)\0A\00"
define void @_Unwind_PNaClSetResult1() {
%1 = alloca [79 x i8]
%2 = bitcast [79 x i8]* %1 to i8*
%3 = getelementptr inbounds [79 x i8], [79 x i8]* %1, i64 0, i64 0
%4 = call i32 @write(i32 2, i8* %3, i32 78)
%5 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@__const._Unwind_PNaClSetResult1.msg = [79 x i8] c"Aborting: _Unwind_PNaClSetResult1 called (C++ exception handling is disabled)\0A\00"
define void @_Unwind_PNaClSetResult1() {
%1 = alloca [79 x i8]
%2 = getelementptr inbounds [79 x i8], [79 x i8]* %1, i64 0, i64 0
%3 = call i32 @write(i32 2, i8* %2, i32 78)
%4 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *realloc(void *, size_t);
void *l_alloc(void *ud, void *ptr, size_t osize, size_t nsize,
              const char *allocName, unsigned int flags) {
  (void)ud;
  (void)osize;
  (void)allocName;
  (void)flags;
  if (nsize == 0) {
    free(ptr);
    return NULL;
  } else
    return realloc(ptr, nsize);
}


x86 assembly (clang, -O0):
<l_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9d,-0x34(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    1161 <l_alloc+0x41>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
jmp    1172 <l_alloc+0x52>
mov    -0x18(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l_alloc>:
mov    %rsi,%rdi
test   %rcx,%rcx
je     1130 <l_alloc+0x10>
mov    %rcx,%rsi
jmp    1040 <realloc@plt>
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @l_alloc(i8* %0, i8* %1, i64 %2, i64 %3, i8* %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i64
%11 = alloca i64
%12 = alloca i8*
%13 = alloca i32
store i8* %0, i8** %8
store i8* %1, i8** %9
store i64 %2, i64* %10
store i64 %3, i64* %11
store i8* %4, i8** %12
store i32 %5, i32* %13
%14 = load i8*, i8** %8
%15 = load i64, i64* %10
%16 = load i8*, i8** %12
%17 = load i32, i32* %13
%18 = load i64, i64* %11
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %6
%21 = load i8*, i8** %9
%22 = call i32 @free(i8* %21)
store i8* null, i8** %7
br label %27
23: ; preds = %6
%24 = load i8*, i8** %9
%25 = load i64, i64* %11
%26 = call i8* @realloc(i8* %24, i64 %25)
store i8* %26, i8** %7
br label %27
27: ; preds = %23, %20
%28 = load i8*, i8** %7
ret i8* %28
}

LLVM IR (-O2):
define noalias i8* @l_alloc(i8* nocapture readnone %0, i8* nocapture %1, i64 %2, i64 %3, i8* nocapture readnone %4, i32 %5) {
%7 = icmp eq i64 %3, 0
br i1 %7, label %8, label %10
8: ; preds = %6
%9 = tail call i32 @free(i8* %1)
br label %12
10: ; preds = %6
%11 = tail call i8* @realloc(i8* %1, i64 %3)
br label %12
12: ; preds = %10, %8
%13 = phi i8* [ null, %8 ], [ %11, %10 ]
ret i8* %13
}
int Sequential_Search(int *a, int n, int key) {
  int i;
  for (i = 1; i <= n; i++) {
    if (a[i] == key)
      return i;
  }
  return 0;
}


x86 assembly (clang, -O0):
<Sequential_Search>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jg     1153 <Sequential_Search+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <Sequential_Search+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <Sequential_Search+0x5a>
jmp    1145 <Sequential_Search+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <Sequential_Search+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sequential_Search>:
xor    %eax,%eax
test   %esi,%esi
jle    111e <Sequential_Search+0x1e>
add    $0x1,%esi
mov    $0x1,%ecx
xchg   %ax,%ax
cmp    %edx,(%rdi,%rcx,4)
je     111f <Sequential_Search+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <Sequential_Search+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Sequential_Search(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 1, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp sle i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 0, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @Sequential_Search(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 1
br i1 %4, label %18, label %5
5: ; preds = %3
%6 = add nuw i32 %1, 1
%7 = zext i32 %6 to i64
br label %8
8: ; preds = %5, %13
%9 = phi i64 [ 1, %5 ], [ %14, %13 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, %2
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = add nuw nsw i64 %9, 1
%15 = icmp eq i64 %14, %7
br i1 %15, label %18, label %8
16: ; preds = %8
%17 = trunc i64 %9 to i32
br label %18
18: ; preds = %13, %16, %3
%19 = phi i32 [ 0, %3 ], [ %17, %16 ], [ 0, %13 ]
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ s3c2410_wait_idle();
int /*<<< orphan*/ s3c2440_wait_idle();
void wait_idle(void) {
  if (((*(volatile unsigned int *)0x560000B0) == 0x32410000) ||
      ((*(volatile unsigned int *)0x560000B0) == 0x32410002)) {
    s3c2410_wait_idle();
  } else {
    s3c2440_wait_idle();
  }
}


x86 assembly (clang, -O0):
<wait_idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x560000b0,%eax
mov    (%rax),%eax
cmp    $0x32410000,%eax
je     1148 <wait_idle+0x28>
mov    $0x560000b0,%eax
mov    (%rax),%eax
cmp    $0x32410002,%eax
jne    1154 <wait_idle+0x34>
mov    $0x0,%al
call   1040 <s3c2410_wait_idle@plt>
jmp    115b <wait_idle+0x3b>
mov    $0x0,%al
call   1030 <s3c2440_wait_idle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_idle>:
mov    0x560000b0,%eax
cmp    $0x32410000,%eax
je     113c <wait_idle+0x1c>
mov    0x560000b0,%eax
cmp    $0x32410002,%eax
jne    1143 <wait_idle+0x23>
xor    %eax,%eax
jmp    1040 <s3c2410_wait_idle@plt>
xor    %eax,%eax
jmp    1030 <s3c2440_wait_idle@plt>

LLVM IR (-O0):
define void @wait_idle() {
%1 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%2 = icmp eq i32 %1, 843120640
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%5 = icmp eq i32 %4, 843120642
br i1 %5, label %6, label %8
6: ; preds = %3, %0
%7 = call i32 (...) @s3c2410_wait_idle()
br label %10
8: ; preds = %3
%9 = call i32 (...) @s3c2440_wait_idle()
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
define void @wait_idle() {
%1 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%2 = icmp eq i32 %1, 843120640
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%5 = icmp eq i32 %4, 843120642
br i1 %5, label %6, label %8
6: ; preds = %3, %0
%7 = tail call i32 (...) @s3c2410_wait_idle()
br label %10
8: ; preds = %3
%9 = tail call i32 (...) @s3c2440_wait_idle()
br label %10
10: ; preds = %8, %6
ret void
}
/* Type definitions */
typedef int __u8;
typedef int __u16;

/* Variables and functions */
__u16 pn_object(__u8 addr, __u16 port) { return (addr << 8) | (port & 0x3ff); }


x86 assembly (clang, -O0):
<pn_object>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%ecx
and    $0x3ff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pn_object>:
mov    %esi,%eax
shl    $0x8,%edi
and    $0x3ff,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @pn_object(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 8
%7 = load i32, i32* %4
%8 = and i32 %7, 1023
%9 = or i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @pn_object(i32 %0, i32 %1) {
%3 = shl i32 %0, 8
%4 = and i32 %1, 1023
%5 = or i32 %4, %3
ret i32 %5
}
void q_set(unsigned char *table, int pos) { table[pos >> 3] |= 1 << (pos & 7); }


x86 assembly (clang, -O0):
<q_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%esi
shl    %cl,%esi
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%edx
or     %esi,%edx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<q_set>:
mov    %esi,%ecx
and    $0x7,%cl
mov    $0x1,%eax
shl    %cl,%eax
sar    $0x3,%esi
movslq %esi,%rcx
or     %al,(%rdi,%rcx,1)
ret

LLVM IR (-O0):
define void @q_set(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 7
%7 = shl i32 1, %6
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = ashr i32 %9, 3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %8, i64 %11
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = or i32 %14, %7
%16 = trunc i32 %15 to i8
store i8 %16, i8* %12
ret void
}

LLVM IR (-O2):
define void @q_set(i8* nocapture %0, i32 %1) {
%3 = and i32 %1, 7
%4 = shl nuw nsw i32 1, %3
%5 = ashr i32 %1, 3
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = trunc i32 %4 to i8
%10 = or i8 %8, %9
store i8 %10, i8* %7
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ _PC_PIPE_BUF;
long fpathconf(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, long);
int main() {
  long value;
  value = fpathconf(0, _PC_PIPE_BUF);
  printf("FIFO atomic buffer size is %ld bytes\n", value);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1040 <fpathconf@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e7e(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1040 <fpathconf@plt>
lea    0xec8(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    0x2e91(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@_PC_PIPE_BUF = global i32 0
@.str = [38 x i8] c"FIFO atomic buffer size is %ld bytes\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = load i32, i32* @_PC_PIPE_BUF
%4 = call i64 @fpathconf(i32 0, i32 %3)
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i64 %5)
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@_PC_PIPE_BUF = global i32 0
@.str = [38 x i8] c"FIFO atomic buffer size is %ld bytes\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @_PC_PIPE_BUF
%2 = tail call i64 @fpathconf(i32 0, i32 %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i64 %2)
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t update_zns_flags(int result, uint8_t sreg) {
  if ((result & 0xFF) == 0x00)
    sreg |= (1 << 1);
  if (result & 0x80)
    sreg |= (1 << 2);
  if (((sreg & (1 << 2)) != 0) != ((sreg & (1 << 3)) != 0))
    sreg |= (1 << 4);
  return sreg;
}


x86 assembly (clang, -O0):
<update_zns_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
cmp    $0x0,%eax
jne    1124 <update_zns_flags+0x24>
mov    -0x8(%rbp),%eax
or     $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     113e <update_zns_flags+0x3e>
mov    -0x8(%rbp),%eax
or     $0x4,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x8(%rbp),%ecx
and    $0x8,%ecx
cmp    $0x0,%ecx
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
je     1172 <update_zns_flags+0x72>
mov    -0x8(%rbp),%eax
or     $0x10,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_zns_flags>:
mov    %esi,%eax
or     $0x2,%eax
test   %dil,%dil
cmovne %esi,%eax
shr    $0x5,%edi
and    $0x4,%edi
or     %eax,%edi
mov    %edi,%ecx
shr    $0x2,%ecx
shr    $0x3,%eax
xor    %ecx,%eax
shl    $0x4,%eax
and    $0x10,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @update_zns_flags(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %4
%10 = or i32 %9, 2
store i32 %10, i32* %4
br label %11
11: ; preds = %8, %2
%12 = load i32, i32* %3
%13 = and i32 %12, 128
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %4
%17 = or i32 %16, 4
store i32 %17, i32* %4
br label %18
18: ; preds = %15, %11
%19 = load i32, i32* %4
%20 = and i32 %19, 4
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i32
%23 = load i32, i32* %4
%24 = and i32 %23, 8
%25 = icmp ne i32 %24, 0
%26 = zext i1 %25 to i32
%27 = icmp ne i32 %22, %26
br i1 %27, label %28, label %31
28: ; preds = %18
%29 = load i32, i32* %4
%30 = or i32 %29, 16
store i32 %30, i32* %4
br label %31
31: ; preds = %28, %18
%32 = load i32, i32* %4
ret i32 %32
}

LLVM IR (-O2):
define i32 @update_zns_flags(i32 %0, i32 %1) {
%3 = and i32 %0, 255
%4 = icmp eq i32 %3, 0
%5 = or i32 %1, 2
%6 = select i1 %4, i32 %5, i32 %1
%7 = lshr i32 %0, 5
%8 = and i32 %7, 4
%9 = or i32 %6, %8
%10 = lshr i32 %9, 2
%11 = lshr i32 %6, 3
%12 = xor i32 %10, %11
%13 = shl i32 %12, 4
%14 = and i32 %13, 16
%15 = or i32 %14, %9
ret i32 %15
}
int xisplainspace(int c) {
  return c == ' ' || c == '\f' || c == '\r' || c == '\t' || c == '\v';
}


x86 assembly (clang, -O0):
<xisplainspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <xisplainspace+0x4d>
mov    $0x1,%al
cmpl   $0xc,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <xisplainspace+0x4d>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <xisplainspace+0x4d>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <xisplainspace+0x4d>
cmpl   $0xb,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xisplainspace>:
cmp    $0x20,%edi
ja     111d <xisplainspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100003200,%rdx
bt     %rcx,%rdx
jae    111d <xisplainspace+0x1d>
ret
xor    %eax,%eax
cmp    $0xb,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xisplainspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 12
br i1 %7, label %17, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 13
br i1 %10, label %17, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 9
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 11
br label %17
17: ; preds = %14, %11, %8, %5, %1
%18 = phi i1 [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %16, %14 ]
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @xisplainspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 12, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 11
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
double wtime_impl();
double wtime_(void) { return wtime_impl(); }


x86 assembly (clang, -O0):
<wtime_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <wtime_impl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wtime_>:
xor    %eax,%eax
jmp    1030 <wtime_impl@plt>

LLVM IR (-O0):
define double @wtime_() {
%1 = call double (...) @wtime_impl()
ret double %1
}

LLVM IR (-O2):
define double @wtime_() {
%1 = tail call double (...) @wtime_impl()
ret double %1
}
/* Variables and functions */
int /*<<< orphan*/ is_prime(int, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int num, pom;
  scanf("%d", &num);
  is_prime(num, pom);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <is_prime@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <is_prime@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @is_prime(i32 %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @is_prime(i32 %4, i32 undef)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xba() {
  Assert_real((isspace(186) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              935, ("isspace should be 0 for 0xba"));
}


x86 assembly (clang, -O0):
<t_isspace_0xba>:
push   %rbp
mov    %rsp,%rbp
mov    $0xba,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3a7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xba>:
push   %rax
mov    $0xba,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3a7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xba\00"
define void @t_isspace_0xba() {
%1 = call i64 @isspace(i32 186)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 935, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xba\00"
define void @t_isspace_0xba() {
%1 = tail call i64 @isspace(i32 186)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 935, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *get_proc(char const *);
void *gl3wGetProcAddress(const char *proc) { return get_proc(proc); }


x86 assembly (clang, -O0):
<gl3wGetProcAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <get_proc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl3wGetProcAddress>:
jmp    1030 <get_proc@plt>

LLVM IR (-O0):
define i8* @gl3wGetProcAddress(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @get_proc(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @gl3wGetProcAddress(i8* %0) {
%2 = tail call i8* @get_proc(i8* %0)
ret i8* %2
}
void flush_uart(void *base_address) {}


x86 assembly (clang, -O0):
<flush_uart>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_uart>:
ret

LLVM IR (-O0):
define void @flush_uart(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @flush_uart(i8* nocapture %0) {
ret void
}
float _lerp(float a, float b, float lambda) {
  return a * (1.f - lambda) + b * lambda;
}


x86 assembly (clang, -O0):
<_lerp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
subss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_lerp>:
movss  0xef8(%rip),%xmm3
subss  %xmm2,%xmm3
mulss  %xmm2,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @_lerp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = fsub float 1.000000e+00, %8
%10 = load float, float* %5
%11 = load float, float* %6
%12 = fmul float %10, %11
%13 = call float @llvm.fmuladd.f32(float %7, float %9, float %12)
ret float %13
}

LLVM IR (-O2):
define float @_lerp(float %0, float %1, float %2) {
%4 = fsub float 1.000000e+00, %2
%5 = fmul float %1, %2
%6 = tail call float @llvm.fmuladd.f32(float %0, float %4, float %5)
ret float %6
}
float kronecker_deltaf(float i, float j) {
  if (i == j) {
    return 1.0f;
  }
  return 0.0f;
}


x86 assembly (clang, -O0):
<kronecker_deltaf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jne    1135 <kronecker_deltaf+0x35>
jp     1135 <kronecker_deltaf+0x35>
movss  0xed5(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    113d <kronecker_deltaf+0x3d>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<kronecker_deltaf>:
cmpeqss %xmm1,%xmm0
movss  0xef3(%rip),%xmm1
andps  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @kronecker_deltaf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp oeq float %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store float 1.000000e+00, float* %3
br label %11
10: ; preds = %2
store float 0.000000e+00, float* %3
br label %11
11: ; preds = %10, %9
%12 = load float, float* %3
ret float %12
}

LLVM IR (-O2):
define float @kronecker_deltaf(float %0, float %1) {
%3 = fcmp oeq float %0, %1
%4 = select i1 %3, float 1.000000e+00, float 0.000000e+00
ret float %4
}
void gtk_clipboard_set_with_data() {}


x86 assembly (clang, -O0):
<gtk_clipboard_set_with_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_clipboard_set_with_data>:
ret

LLVM IR (-O0):
define void @gtk_clipboard_set_with_data() {
ret void
}

LLVM IR (-O2):
define void @gtk_clipboard_set_with_data() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ grava_li(int, char *);
void rot26_sem() { grava_li(1, "$BREAK"); }


x86 assembly (clang, -O0):
<rot26_sem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <grava_li@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot26_sem>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <grava_li@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"$BREAK\00"
define void @rot26_sem() {
%1 = call i32 @grava_li(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"$BREAK\00"
define void @rot26_sem() {
%1 = tail call i32 @grava_li(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
void ff_hevc_put_hevc_epel_v24_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_v24_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_v24_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_v24_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_v24_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CG_MWheel_f(int);
void CG_MWhelldn_f(void) { CG_MWheel_f(1); }


x86 assembly (clang, -O0):
<CG_MWhelldn_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <CG_MWheel_f@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_MWhelldn_f>:
mov    $0x1,%edi
jmp    1030 <CG_MWheel_f@plt>

LLVM IR (-O0):
define void @CG_MWhelldn_f() {
%1 = call i32 @CG_MWheel_f(i32 1)
ret void
}

LLVM IR (-O2):
define void @CG_MWhelldn_f() {
%1 = tail call i32 @CG_MWheel_f(i32 1)
ret void
}
int config_READER_TONGFANG(void) { return 0; }


x86 assembly (clang, -O0):
<config_READER_TONGFANG>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_READER_TONGFANG>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_READER_TONGFANG() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_READER_TONGFANG() {
ret i32 0
}
int config_CARDREADER_INTERNAL_COOLAPI(void) { return 0; }


x86 assembly (clang, -O0):
<config_CARDREADER_INTERNAL_COOLAPI>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_CARDREADER_INTERNAL_COOLAPI>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_CARDREADER_INTERNAL_COOLAPI() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_CARDREADER_INTERNAL_COOLAPI() {
ret i32 0
}
int plat_device_is_coherent(struct device *dev) { return 0; }


x86 assembly (clang, -O0):
<plat_device_is_coherent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plat_device_is_coherent>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @plat_device_is_coherent(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @plat_device_is_coherent(%struct.device* nocapture readnone %0) {
ret i32 0
}
void mycp_free_sources(char **array, int ar_len) {
  int i;
  for (i = 0; i < ar_len; i++)
    free(array[i]);
  free(array);
}


x86 assembly (clang, -O0):
<mycp_free_sources>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <mycp_free_sources+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <mycp_free_sources+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mycp_free_sources>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <mycp_free_sources+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <mycp_free_sources+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mycp_free_sources(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
%20 = load i8**, i8*** %3
%21 = bitcast i8** %20 to i8*
ret void
}

LLVM IR (-O2):
define void @mycp_free_sources(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
tail call void @free(i8* %9)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
%13 = bitcast i8** %0 to i8*
tail call void @free(i8* %13)
ret void
}
/* Variables and functions */
int goesIntoNum(int, int, int);
int filesPerLine(int scrx, int maxNameSize) {
  return goesIntoNum(scrx, maxNameSize, 1);
}


x86 assembly (clang, -O0):
<filesPerLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
call   1030 <goesIntoNum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesPerLine>:
mov    $0x1,%edx
jmp    1030 <goesIntoNum@plt>

LLVM IR (-O0):
define i32 @filesPerLine(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @goesIntoNum(i32 %5, i32 %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @filesPerLine(i32 %0, i32 %1) {
%3 = tail call i32 @goesIntoNum(i32 %0, i32 %1, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ os_printoutput(char *);
int /*<<< orphan*/ sprintf(char *, char *, char const *, char *);
void llsif_symlink_xml(const char *xmlpath) {
  char cmd[2048] = {0};
  sprintf(cmd, "adb shell \"su -c 'ln -s %s %s/GameEngineActivity.xml'\"",
          xmlpath, "/data/data/klb.android.lovelive_en/shared_prefs");
  os_printoutput(cmd);
}


x86 assembly (clang, -O0):
<llsif_symlink_xml>:
push   %rbp
mov    %rsp,%rbp
sub    $0x810,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x810(%rbp),%rdi
xor    %esi,%esi
mov    $0x800,%edx
call   1040 <memset@plt>
lea    -0x810(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xe9c(%rip),%rsi
lea    0xecc(%rip),%rcx
call   1050 <sprintf@plt>
lea    -0x810(%rbp),%rdi
call   1030 <os_printoutput@plt>
add    $0x810,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<llsif_symlink_xml>:
push   %r14
push   %rbx
sub    $0x808,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    $0x800,%edx
mov    %r14,%rdi
xor    %esi,%esi
call   1040 <memset@plt>
lea    0xeaa(%rip),%rsi
lea    0xeda(%rip),%rcx
mov    %r14,%rdi
mov    %rbx,%rdx
call   1050 <sprintf@plt>
mov    %r14,%rdi
call   1030 <os_printoutput@plt>
add    $0x808,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [55 x i8] c"adb shell \22su -c 'ln -s %s %s/GameEngineActivity.xml'\22\00"
@.str.1 = [48 x i8] c"/data/data/klb.android.lovelive_en/shared_prefs\00"
define void @llsif_symlink_xml(i8* %0) {
%2 = alloca i8*
%3 = alloca [2048 x i8]
store i8* %0, i8** %2
%4 = bitcast [2048 x i8]* %3 to i8*
%5 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %6, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.1, i64 0, i64 0))
%8 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%9 = call i32 @os_printoutput(i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [55 x i8] c"adb shell \22su -c 'ln -s %s %s/GameEngineActivity.xml'\22\00"
@.str.1 = [48 x i8] c"/data/data/klb.android.lovelive_en/shared_prefs\00"
define void @llsif_symlink_xml(i8* %0) {
%2 = alloca [2048 x i8]
%3 = getelementptr inbounds [2048 x i8], [2048 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %0, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @os_printoutput(i8* %3)
ret void
}
/* Type definitions */
struct vector_cnets_osblinnikov_github_com {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vector_cnets_osblinnikov_github_com_onCreate(
    struct vector_cnets_osblinnikov_github_com *);
void vector_cnets_osblinnikov_github_com_init(
    struct vector_cnets_osblinnikov_github_com *that) {
  vector_cnets_osblinnikov_github_com_onCreate(that);
}


x86 assembly (clang, -O0):
<vector_cnets_osblinnikov_github_com_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vector_cnets_osblinnikov_github_com_onCreate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_cnets_osblinnikov_github_com_init>:
jmp    1030 <vector_cnets_osblinnikov_github_com_onCreate@plt>

LLVM IR (-O0):
%struct.vector_cnets_osblinnikov_github_com = type { i32 }
define void @vector_cnets_osblinnikov_github_com_init(%struct.vector_cnets_osblinnikov_github_com* %0) {
%2 = alloca %struct.vector_cnets_osblinnikov_github_com*
store %struct.vector_cnets_osblinnikov_github_com* %0, %struct.vector_cnets_osblinnikov_github_com** %2
%3 = load %struct.vector_cnets_osblinnikov_github_com*, %struct.vector_cnets_osblinnikov_github_com** %2
%4 = call i32 @vector_cnets_osblinnikov_github_com_onCreate(%struct.vector_cnets_osblinnikov_github_com* %3)
ret void
}

LLVM IR (-O2):
%struct.vector_cnets_osblinnikov_github_com = type { i32 }
define void @vector_cnets_osblinnikov_github_com_init(%struct.vector_cnets_osblinnikov_github_com* %0) {
%2 = tail call i32 @vector_cnets_osblinnikov_github_com_onCreate(%struct.vector_cnets_osblinnikov_github_com* %0)
ret void
}
/* Variables and functions */
double log10(double);
double concaveInvertedTransform(double dValue) {
  if (dValue <= 0.00398107)
    return 1.0;
  return -(5.0 / 12.0) * log10(dValue);
}


x86 assembly (clang, -O0):
<concaveInvertedTransform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  0xedb(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1142 <concaveInvertedTransform+0x32>
movsd  0xed8(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1160 <concaveInvertedTransform+0x50>
movsd  -0x10(%rbp),%xmm0
call   1030 <log10@plt>
movaps %xmm0,%xmm1
movsd  0xeb1(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<concaveInvertedTransform>:
push   %rax
movsd  0xeef(%rip),%xmm1
ucomisd %xmm0,%xmm1
jae    112e <concaveInvertedTransform+0x1e>
call   1030 <log10@plt>
mulsd  0xee4(%rip),%xmm0
pop    %rax
ret
movsd  0xeca(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @concaveInvertedTransform(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ole double %4, 3.981070e-03
br i1 %5, label %6, label %7
6: ; preds = %1
store double 1.000000e+00, double* %2
br label %11
7: ; preds = %1
%8 = load double, double* %3
%9 = call double @log10(double %8)
%10 = fmul double 0xBFDAAAAAAAAAAAAB, %9
store double %10, double* %2
br label %11
11: ; preds = %7, %6
%12 = load double, double* %2
ret double %12
}

LLVM IR (-O2):
define double @concaveInvertedTransform(double %0) {
%2 = fcmp ugt double %0, 3.981070e-03
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call double @log10(double %0)
%5 = fmul double %4, 0xBFDAAAAAAAAAAAAB
br label %6
6: ; preds = %1, %3
%7 = phi double [ %5, %3 ], [ 1.000000e+00, %1 ]
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ in_video_mode();
int /*<<< orphan*/ video_putchar(unsigned char);
void putchar(unsigned char c) {
  if (!in_video_mode())
    video_putchar(c);
  if (c == '\n')
    putchar('\r');
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1050 <in_video_mode@plt>
cmp    $0x0,%eax
jne    1157 <putchar+0x27>
movzbl -0x1(%rbp),%edi
call   1030 <video_putchar@plt>
movzbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jne    116e <putchar+0x3e>
mov    $0xd,%edi
call   1040 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <in_video_mode@plt>
test   %eax,%eax
je     1135 <putchar+0x15>
cmp    $0xa,%bl
je     1142 <putchar+0x22>
jmp    114d <putchar+0x2d>
movzbl %bl,%edi
call   1030 <video_putchar@plt>
cmp    $0xa,%bl
jne    114d <putchar+0x2d>
xor    %eax,%eax
call   1040 <in_video_mode@plt>
test   %eax,%eax
je     114f <putchar+0x2f>
pop    %rbx
ret
mov    $0xd,%edi
pop    %rbx
jmp    1030 <video_putchar@plt>

LLVM IR (-O0):
define void @putchar(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 (...) @in_video_mode()
%4 = icmp ne i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i8, i8* %2
%7 = call i32 @video_putchar(i8 zeroext %6)
br label %8
8: ; preds = %5, %1
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = icmp eq i32 %10, 10
br i1 %11, label %12, label %13
12: ; preds = %8
br label %13
13: ; preds = %12, %8
ret void
}

LLVM IR (-O2):
define void @putchar(i8 zeroext %0) {
%2 = tail call i32 (...) @in_video_mode()
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @video_putchar(i8 zeroext %0)
br label %6
6: ; preds = %4, %1
%7 = icmp eq i8 %0, 10
br i1 %7, label %8, label %13
8: ; preds = %6
%9 = tail call i32 (...) @in_video_mode()
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = tail call i32 @video_putchar(i8 zeroext 13)
br label %13
13: ; preds = %11, %8, %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ m137common_setParams4101(int /*<<< orphan*/,
                                            int /*<<< orphan*/);
int /*<<< orphan*/ m141setChrBankPtr();
void m141setParams4101(uint16_t addr, uint8_t val) {
  m137common_setParams4101(addr, val);
  m141setChrBankPtr();
}


x86 assembly (clang, -O0):
<m141setParams4101>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <m137common_setParams4101@plt>
mov    $0x0,%al
call   1030 <m141setChrBankPtr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m141setParams4101>:
push   %rax
call   1040 <m137common_setParams4101@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <m141setChrBankPtr@plt>

LLVM IR (-O0):
define void @m141setParams4101(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @m137common_setParams4101(i32 %5, i32 %6)
%8 = call i32 (...) @m141setChrBankPtr()
ret void
}

LLVM IR (-O2):
define void @m141setParams4101(i32 %0, i32 %1) {
%3 = tail call i32 @m137common_setParams4101(i32 %0, i32 %1)
%4 = tail call i32 (...) @m141setChrBankPtr()
ret void
}