xunge/DecIR huggingface dataset:
/* Variables and functions */
int get_class_gen(char *, int);
int get_class_num(char *str) { return get_class_gen(str, 1); }


x86 assembly (clang, -O0):
<get_class_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <get_class_gen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_class_num>:
mov    $0x1,%esi
jmp    1030 <get_class_gen@plt>

LLVM IR (-O0):
define i32 @get_class_num(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @get_class_gen(i8* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_class_num(i8* %0) {
%2 = tail call i32 @get_class_gen(i8* %0, i32 1)
ret i32 %2
}
int cairo_code_draw_casChLabel_get_width() { return 15; }


x86 assembly (clang, -O0):
<cairo_code_draw_casChLabel_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_casChLabel_get_width>:
mov    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_casChLabel_get_width() {
ret i32 15
}

LLVM IR (-O2):
define i32 @cairo_code_draw_casChLabel_get_width() {
ret i32 15
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t d86f_header_size(int drive) { return 8; }


x86 assembly (clang, -O0):
<d86f_header_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d86f_header_size>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @d86f_header_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 8
}

LLVM IR (-O2):
define i32 @d86f_header_size(i32 %0) {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ log_f(char *);
void soundb_none_stop(void) { log_f("sound: soundb_none_stop()\n"); }


x86 assembly (clang, -O0):
<soundb_none_stop>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <log_f@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<soundb_none_stop>:
lea    0xee9(%rip),%rdi
jmp    1030 <log_f@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"sound: soundb_none_stop()\0A\00"
define void @soundb_none_stop() {
%1 = call i32 @log_f(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"sound: soundb_none_stop()\0A\00"
define void @soundb_none_stop() {
%1 = tail call i32 @log_f(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int gprc_advanced_instruction_set(int *);
int gprcm_advanced_instruction_set(int *instruction_set) {
  return gprc_advanced_instruction_set(instruction_set);
}


x86 assembly (clang, -O0):
<gprcm_advanced_instruction_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gprc_advanced_instruction_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gprcm_advanced_instruction_set>:
jmp    1030 <gprc_advanced_instruction_set@plt>

LLVM IR (-O0):
define i32 @gprcm_advanced_instruction_set(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @gprc_advanced_instruction_set(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @gprcm_advanced_instruction_set(i32* %0) {
%2 = tail call i32 @gprc_advanced_instruction_set(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef unsigned int uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ pcg_rotr_16(unsigned int, unsigned int);
uint16_t pcg_output_xsh_rr_32_16(uint32_t state) {
  return pcg_rotr_16(((state >> 10u) ^ state) >> 12u, state >> 28u);
}


x86 assembly (clang, -O0):
<pcg_output_xsh_rr_32_16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shr    $0xa,%edi
xor    -0x4(%rbp),%edi
shr    $0xc,%edi
mov    -0x4(%rbp),%esi
shr    $0x1c,%esi
call   1030 <pcg_rotr_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcg_output_xsh_rr_32_16>:
mov    %edi,%esi
mov    %edi,%eax
shr    $0x16,%eax
shr    $0xc,%edi
xor    %eax,%edi
shr    $0x1c,%esi
jmp    1030 <pcg_rotr_16@plt>

LLVM IR (-O0):
define i32 @pcg_output_xsh_rr_32_16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 10
%5 = load i32, i32* %2
%6 = xor i32 %4, %5
%7 = lshr i32 %6, 12
%8 = load i32, i32* %2
%9 = lshr i32 %8, 28
%10 = call i32 @pcg_rotr_16(i32 %7, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @pcg_output_xsh_rr_32_16(i32 %0) {
%2 = lshr i32 %0, 22
%3 = lshr i32 %0, 12
%4 = xor i32 %2, %3
%5 = lshr i32 %0, 28
%6 = tail call i32 @pcg_rotr_16(i32 %4, i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ send(int, char *, int, int /*<<< orphan*/);
void http_response_end_header(int connfd) { send(connfd, "\r\n", 2, 0); }


x86 assembly (clang, -O0):
<http_response_end_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
mov    $0x2,%edx
xor    %ecx,%ecx
call   1030 <send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<http_response_end_header>:
lea    0xee9(%rip),%rsi
mov    $0x2,%edx
xor    %ecx,%ecx
jmp    1030 <send@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\0D\0A\00"
define void @http_response_end_header(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @send(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\0D\0A\00"
define void @http_response_end_header(i32 %0) {
%2 = tail call i32 @send(i32 %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2, i32 0)
ret void
}
void ScaleARGBCols64_C() {}


x86 assembly (clang, -O0):
<ScaleARGBCols64_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleARGBCols64_C>:
ret

LLVM IR (-O0):
define void @ScaleARGBCols64_C() {
ret void
}

LLVM IR (-O2):
define void @ScaleARGBCols64_C() {
ret void
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int write(int, void const *, int);
int unix_write(int fd, const void *buff, int len) {
  int ret;
  do {
    ret = write(fd, buff, len);
  } while (ret < 0 && errno == EINTR);
  return ret;
}


x86 assembly (clang, -O0):
<unix_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x18(%rbp)
mov    %al,-0x19(%rbp)
jge    115d <unix_write+0x4d>
mov    0x2e96(%rip),%rax
mov    (%rax),%rax
mov    0x2e84(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1122 <unix_write+0x12>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unix_write>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1030 <write@plt>
test   %eax,%eax
jns    114a <unix_write+0x3a>
mov    (%r12),%rcx
cmp    %rcx,(%r15)
je     1130 <unix_write+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @unix_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %4
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @write(i32 %9, i8* %10, i32 %11)
store i32 %12, i32* %7
br label %13
13: ; preds = %8
%14 = load i32, i32* %7
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %13
%17 = load i64, i64* @errno
%18 = load i64, i64* @EINTR
%19 = icmp eq i64 %17, %18
br label %20
20: ; preds = %16, %13
%21 = phi i1 [ false, %13 ], [ %19, %16 ]
br i1 %21, label %8, label %22
22: ; preds = %20
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @unix_write(i32 %0, i8* nocapture %1, i32 %2) {
br label %4
4: ; preds = %4, %3
%5 = tail call i32 @write(i32 %0, i8* %1, i32 %2)
%6 = icmp slt i32 %5, 0
%7 = load i64, i64* @errno
%8 = load i64, i64* @EINTR
%9 = icmp eq i64 %7, %8
%10 = select i1 %6, i1 %9, i1 false
br i1 %10, label %4, label %11
11: ; preds = %4
ret i32 %5
}
long fibonacci(int n) {
  long result;
  long previous_result;
  long next_older_result;
  result = previous_result = 1;
  while (n > 2) {
    n -= 1;
    next_older_result = previous_result;
    previous_result = result;
    result = previous_result + next_older_result;
  }
  return result;
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x1,-0x18(%rbp)
movq   $0x1,-0x10(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    114b <fibonacci+0x4b>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1117 <fibonacci+0x17>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
mov    $0x1,%eax
cmp    $0x3,%edi
jl     1134 <fibonacci+0x34>
add    $0x1,%edi
mov    $0x1,%edx
mov    $0x1,%ecx
nopw   0x0(%rax,%rax,1)
mov    %rdx,%rax
add    %rcx,%rax
add    $0xffffffff,%edi
mov    %rcx,%rdx
mov    %rax,%rcx
cmp    $0x3,%edi
ja     1120 <fibonacci+0x20>
ret

LLVM IR (-O0):
define i64 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %2
store i64 1, i64* %4
store i64 1, i64* %3
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 2
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 1
store i32 %11, i32* %2
%12 = load i64, i64* %4
store i64 %12, i64* %5
%13 = load i64, i64* %3
store i64 %13, i64* %4
%14 = load i64, i64* %4
%15 = load i64, i64* %5
%16 = add nsw i64 %14, %15
store i64 %16, i64* %3
br label %6
17: ; preds = %6
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @fibonacci(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = phi i64 [ %6, %3 ], [ 1, %1 ]
%6 = phi i64 [ %8, %3 ], [ 1, %1 ]
%7 = add nsw i32 %4, -1
%8 = add nsw i64 %5, %6
%9 = icmp ugt i32 %4, 3
br i1 %9, label %3, label %10
10: ; preds = %3, %1
%11 = phi i64 [ 1, %1 ], [ %8, %3 ]
ret i64 %11
}
void f27(void) {
  ({
    a:
      goto a;
      ({ 0; });
      ({ 0; });
      0;
  });
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  0;
}


x86 assembly (clang, -O0):
<f27>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <f27+0x4>

x86 assembly (clang, -O2):
<f27>:
jmp    1100 <f27>

LLVM IR (-O0):
define void @f27() {
%1 = alloca i32
br label %2
2: ; preds = %2, %0
br label %2
}

LLVM IR (-O2):
define void @f27() {
br label %1
1: ; preds = %1, %0
br label %1
}
void cleanup_dead_jobs() {}


x86 assembly (clang, -O0):
<cleanup_dead_jobs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup_dead_jobs>:
ret

LLVM IR (-O0):
define void @cleanup_dead_jobs() {
ret void
}

LLVM IR (-O2):
define void @cleanup_dead_jobs() {
ret void
}
int imax2(int a, int b) { return (b > a) ? b : a; }


x86 assembly (clang, -O0):
<imax2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jle    1121 <imax2+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <imax2+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imax2>:
mov    %edi,%eax
cmp    %edi,%esi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @imax2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @imax2(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int volatile *mem_get_reg32(int);
volatile uint32_t *mem_get_bitband(uint32_t reg_addr, uint32_t reg_bit) {
  return mem_get_reg32(0x42000000 + (reg_addr - 0x40000000) * 32 + reg_bit * 4);
}


x86 assembly (clang, -O0):
<mem_get_bitband>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x40000000,%edi
shl    $0x5,%edi
add    $0x42000000,%edi
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    %eax,%edi
call   1030 <mem_get_reg32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_get_bitband>:
shl    $0x5,%edi
lea    (%rdi,%rsi,4),%edi
add    $0x42000000,%edi
jmp    1030 <mem_get_reg32@plt>

LLVM IR (-O0):
define i32* @mem_get_bitband(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sub nsw i32 %5, 1073741824
%7 = mul nsw i32 %6, 32
%8 = add nsw i32 1107296256, %7
%9 = load i32, i32* %4
%10 = mul nsw i32 %9, 4
%11 = add nsw i32 %8, %10
%12 = call i32* @mem_get_reg32(i32 %11)
ret i32* %12
}

LLVM IR (-O2):
define i32* @mem_get_bitband(i32 %0, i32 %1) {
%3 = shl i32 %0, 5
%4 = add nsw i32 %3, 1107296256
%5 = shl nsw i32 %1, 2
%6 = add nsw i32 %4, %5
%7 = tail call i32* @mem_get_reg32(i32 %6)
ret i32* %7
}
int main(void) {
  static long i;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@main.i = internal global i64 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void restorescreen() { printf("\x1b[?47l"); }


x86 assembly (clang, -O0):
<restorescreen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<restorescreen>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\1B[?47l\00"
define void @restorescreen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\1B[?47l\00"
define void @restorescreen() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
void glwin_swap_buffers(void *voidhandle) {
  { return; }
}


x86 assembly (clang, -O0):
<glwin_swap_buffers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glwin_swap_buffers>:
ret

LLVM IR (-O0):
define void @glwin_swap_buffers(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @glwin_swap_buffers(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
void readSudirriptionUpdatePacket(uint8_t *data, uint8_t **key,
                                  uint8_t *set_children,
                                  uint16_t *refresh_skip) {
  (*key) = data + 4;
  (*set_children) = !!(data[1] & (0x01 << 0));
  (*refresh_skip) = ntohs(*((uint16_t *)(data + 2)));
}


x86 assembly (clang, -O0):
<readSudirriptionUpdatePacket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rcx
add    $0x10,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%edi
call   1030 <ntohs@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readSudirriptionUpdatePacket>:
push   %rbx
mov    %rcx,%rbx
lea    0x10(%rdi),%rax
mov    %rax,(%rsi)
mov    0x4(%rdi),%eax
and    $0x1,%eax
mov    %eax,(%rdx)
mov    0x8(%rdi),%edi
call   1030 <ntohs@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @readSudirriptionUpdatePacket(i32* %0, i32** %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32**
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32** %1, i32*** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 4
%11 = load i32**, i32*** %6
store i32* %10, i32** %11
%12 = load i32*, i32** %5
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32, i32* %13
%15 = and i32 %14, 1
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = xor i1 %17, true
%19 = zext i1 %18 to i32
%20 = load i32*, i32** %7
store i32 %19, i32* %20
%21 = load i32*, i32** %5
%22 = getelementptr inbounds i32, i32* %21, i64 2
%23 = load i32, i32* %22
%24 = call i32 @ntohs(i32 %23)
%25 = load i32*, i32** %8
store i32 %24, i32* %25
ret void
}

LLVM IR (-O2):
define void @readSudirriptionUpdatePacket(i32* %0, i32** nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = getelementptr inbounds i32, i32* %0, i64 4
store i32* %5, i32** %1
%6 = getelementptr inbounds i32, i32* %0, i64 1
%7 = load i32, i32* %6
%8 = and i32 %7, 1
store i32 %8, i32* %2
%9 = getelementptr inbounds i32, i32* %0, i64 2
%10 = load i32, i32* %9
%11 = tail call i32 @ntohs(i32 %10)
store i32 %11, i32* %3
ret void
}
void sch_load_report() {}


x86 assembly (clang, -O0):
<sch_load_report>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sch_load_report>:
ret

LLVM IR (-O0):
define void @sch_load_report() {
ret void
}

LLVM IR (-O2):
define void @sch_load_report() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main(void) { printf("hello"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define void @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dis_fl_pred_PERT();
int /*<<< orphan*/ dis_print_sched_Modal7tif_ffsol(char *);
void dis_print_Modal7tif_ffsol(char *fact_file_name) {
  dis_fl_pred_PERT();
  dis_print_sched_Modal7tif_ffsol(fact_file_name);
}


x86 assembly (clang, -O0):
<dis_print_Modal7tif_ffsol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <dis_fl_pred_PERT@plt>
mov    -0x8(%rbp),%rdi
call   1030 <dis_print_sched_Modal7tif_ffsol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dis_print_Modal7tif_ffsol>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <dis_fl_pred_PERT@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <dis_print_sched_Modal7tif_ffsol@plt>

LLVM IR (-O0):
define void @dis_print_Modal7tif_ffsol(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @dis_fl_pred_PERT()
%4 = load i8*, i8** %2
%5 = call i32 @dis_print_sched_Modal7tif_ffsol(i8* %4)
ret void
}

LLVM IR (-O2):
define void @dis_print_Modal7tif_ffsol(i8* %0) {
%2 = tail call i32 (...) @dis_fl_pred_PERT()
%3 = tail call i32 @dis_print_sched_Modal7tif_ffsol(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ bswap_32(int /*<<< orphan*/);
uint32_t cpu_to_le32(uint32_t native) { return bswap_32(native); }


x86 assembly (clang, -O0):
<cpu_to_le32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bswap_32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_to_le32>:
jmp    1030 <bswap_32@plt>

LLVM IR (-O0):
define i32 @cpu_to_le32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bswap_32(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cpu_to_le32(i32 %0) {
%2 = tail call i32 @bswap_32(i32 %0)
ret i32 %2
}
int test_imm_A9int16_mem(short *val) {
  return ((*val) & (-0xA9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A9int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff57,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A9int16_mem>:
movzwl (%rdi),%eax
test   $0xff57,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A9int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -169
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A9int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -169
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_82uint8_mem(unsigned char *val) {
  return ((*val) & (0x82 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_82uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x82,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_82uint8_mem>:
testb  $0x82,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_82uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 130
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_82uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -126
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned long long nlm_crypto_form_pkt_desc3(unsigned int designer_vc,
                                             unsigned int taglen,
                                             unsigned int arc4_state_save_l3,
                                             unsigned int arc4_save_state,
                                             unsigned int hmacpad) {
  return ((unsigned long long)(designer_vc) << (48)) |
         ((unsigned long long)(taglen) << (11)) |
         ((unsigned long long)(arc4_state_save_l3) << (8)) |
         ((unsigned long long)(arc4_save_state) << (6)) |
         ((unsigned long long)(hmacpad) << (5));
}


x86 assembly (clang, -O0):
<nlm_crypto_form_pkt_desc3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x30,%rax
mov    -0x8(%rbp),%ecx
shl    $0xb,%rcx
or     %rcx,%rax
mov    -0xc(%rbp),%ecx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x10(%rbp),%ecx
shl    $0x6,%rcx
or     %rcx,%rax
mov    -0x14(%rbp),%ecx
shl    $0x5,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nlm_crypto_form_pkt_desc3>:
shl    $0x30,%rdi
mov    %esi,%eax
shl    $0xb,%rax
or     %rdi,%rax
mov    %edx,%edx
shl    $0x8,%rdx
mov    %ecx,%ecx
shl    $0x6,%rcx
or     %rdx,%rcx
or     %rax,%rcx
mov    %r8d,%eax
shl    $0x5,%rax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @nlm_crypto_form_pkt_desc3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = zext i32 %11 to i64
%13 = shl i64 %12, 48
%14 = load i32, i32* %7
%15 = zext i32 %14 to i64
%16 = shl i64 %15, 11
%17 = or i64 %13, %16
%18 = load i32, i32* %8
%19 = zext i32 %18 to i64
%20 = shl i64 %19, 8
%21 = or i64 %17, %20
%22 = load i32, i32* %9
%23 = zext i32 %22 to i64
%24 = shl i64 %23, 6
%25 = or i64 %21, %24
%26 = load i32, i32* %10
%27 = zext i32 %26 to i64
%28 = shl i64 %27, 5
%29 = or i64 %25, %28
ret i64 %29
}

LLVM IR (-O2):
define i64 @nlm_crypto_form_pkt_desc3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = zext i32 %0 to i64
%7 = shl i64 %6, 48
%8 = zext i32 %1 to i64
%9 = shl nuw nsw i64 %8, 11
%10 = or i64 %9, %7
%11 = zext i32 %2 to i64
%12 = shl nuw nsw i64 %11, 8
%13 = or i64 %10, %12
%14 = zext i32 %3 to i64
%15 = shl nuw nsw i64 %14, 6
%16 = or i64 %13, %15
%17 = zext i32 %4 to i64
%18 = shl nuw nsw i64 %17, 5
%19 = or i64 %16, %18
ret i64 %19
}
int test_70_4(int *mem) { return __atomic_fetch_xor(mem + 4, -1, 4); }


x86 assembly (clang, -O0):
<test_70_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x10,%rcx
mov    %rcx,-0x20(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    0x10(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
xor    %esi,%edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    1153 <test_70_4+0x53>
jmp    112a <test_70_4+0x2a>
mov    -0x24(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_70_4>:
mov    0x10(%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%ecx
not    %ecx
lock cmpxchg %ecx,0x10(%rdi)
jne    1110 <test_70_4+0x10>
ret

LLVM IR (-O0):
define i32 @test_70_4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 4
store i32 -1, i32* %3
%7 = load i32, i32* %3
%8 = atomicrmw xor i32* %6, i32 %7 acq_rel
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_70_4(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = atomicrmw xor i32* %2, i32 -1 acq_rel
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Msp430Adc12ImplP__CompareA0__fired();
void Msp430TimerCapComP__0__Compare__fired(void) {
  Msp430Adc12ImplP__CompareA0__fired();
}


x86 assembly (clang, -O0):
<Msp430TimerCapComP__0__Compare__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430Adc12ImplP__CompareA0__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430TimerCapComP__0__Compare__fired>:
xor    %eax,%eax
jmp    1030 <Msp430Adc12ImplP__CompareA0__fired@plt>

LLVM IR (-O0):
define void @Msp430TimerCapComP__0__Compare__fired() {
%1 = call i32 (...) @Msp430Adc12ImplP__CompareA0__fired()
ret void
}

LLVM IR (-O2):
define void @Msp430TimerCapComP__0__Compare__fired() {
%1 = tail call i32 (...) @Msp430Adc12ImplP__CompareA0__fired()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stat_file(char *);
int /*<<< orphan*/ usage();
int main(int argc, char *argv[]) {
  if (argc < 2)
    usage();
  else {
    for (int i = 1; i < argc; ++i)
      stat_file(argv[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    114c <main+0x2c>
mov    $0x0,%al
call   1040 <usage@plt>
jmp    1183 <main+0x63>
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    117e <main+0x5e>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <stat_file@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1153 <main+0x33>
jmp    1183 <main+0x63>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%edi
jge    1133 <main+0x13>
xor    %eax,%eax
call   1040 <usage@plt>
jmp    1152 <main+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
xchg   %ax,%ax
mov    (%r14,%rbx,8),%rdi
call   1030 <stat_file@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 (...) @usage()
br label %27
11: ; preds = %2
store i32 1, i32* %6
br label %12
12: ; preds = %23, %11
%13 = load i32, i32* %6
%14 = load i32, i32* %4
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %26
16: ; preds = %12
%17 = load i8**, i8*** %5
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8*, i8** %17, i64 %19
%21 = load i8*, i8** %20
%22 = call i32 @stat_file(i8* %21)
br label %23
23: ; preds = %16
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %12
26: ; preds = %12
br label %27
27: ; preds = %26, %9
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %8
6: ; preds = %2
%7 = tail call i32 (...) @usage()
br label %15
8: ; preds = %4, %8
%9 = phi i64 [ 1, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i8*, i8** %1, i64 %9
%11 = load i8*, i8** %10
%12 = tail call i32 @stat_file(i8* %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %15, label %8
15: ; preds = %8, %6
ret i32 0
}
unsigned long LSBit(unsigned long x) { return x & -(signed long)x; }


x86 assembly (clang, -O0):
<LSBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LSBit>:
mov    %rdi,%rax
neg    %rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @LSBit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = sub nsw i64 0, %4
%6 = and i64 %3, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @LSBit(i64 %0) {
%2 = sub nsw i64 0, %0
%3 = and i64 %2, %0
ret i64 %3
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main(int argc, const char **argv) {
  printf("Hello World\n");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [12 x i8] c"Hello World\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int foo2(int i, int j, int b) {
  int res = 0;
  if (b)
    res = i / j;
  res += i / j;
  bar();
  return res;
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     113c <foo2+0x2c>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
push   %rbx
mov    %edx,%ecx
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,%ebx
test   %ecx,%ecx
cmovne %eax,%ecx
add    %ecx,%ebx
xor    %eax,%eax
call   1030 <bar@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @foo2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %6
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = sdiv i32 %11, %12
store i32 %13, i32* %7
br label %14
14: ; preds = %10, %3
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = sdiv i32 %15, %16
%18 = load i32, i32* %7
%19 = add nsw i32 %18, %17
store i32 %19, i32* %7
%20 = call i32 (...) @bar()
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @foo2(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
%5 = sdiv i32 %0, %1
%6 = select i1 %4, i32 0, i32 %5
%7 = add nsw i32 %5, %6
%8 = tail call i32 (...) @bar()
ret i32 %7
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int celcon_write_mixed_cell_configuration(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(81, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_write_mixed_cell_configuration>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x51,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_write_mixed_cell_configuration>:
mov    $0x51,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @celcon_write_mixed_cell_configuration() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 81, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @celcon_write_mixed_cell_configuration() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 81, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, unsigned int, float);
int /*<<< orphan*/ stdout;
main() {
  unsigned int x;
  float y;
  x = 4000000000;
  y = x;
  fprintf(stdout, "%u %f\n", x, y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xee6b2800,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm0
movss  %xmm0,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
movss  -0x8(%rbp),%xmm0
lea    0xebc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xee3(%rip),%rsi
movss  0xed7(%rip),%xmm0
mov    $0xee6b2800,%edx
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [7 x i8] c"%u %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 -294967296, i32* %1
%3 = load i32, i32* %1
%4 = uitofp i32 %3 to float
store float %4, float* %2
%5 = load i32, i32* @stdout
%6 = load i32, i32* %1
%7 = load float, float* %2
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6, float %7)
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [7 x i8] c"%u %f\0A\00"
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 -294967296, float 4.000000e+09)
ret i32 0
}
void waitQueue(void) {}


x86 assembly (clang, -O0):
<waitQueue>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitQueue>:
ret

LLVM IR (-O0):
define void @waitQueue() {
ret void
}

LLVM IR (-O2):
define void @waitQueue() {
ret void
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int compare_int64(const void *p1, const void *p2) {
  return (*(const int64_t *)p1 > *(const int64_t *)p2);
}


x86 assembly (clang, -O0):
<compare_int64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int64>:
mov    (%rdi),%rcx
xor    %eax,%eax
cmp    (%rsi),%rcx
setg   %al
ret

LLVM IR (-O0):
define i32 @compare_int64(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
%11 = icmp sgt i64 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @compare_int64(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Car_Get(int);
int Car_GetWeight(int /*<<< orphan*/);
int Car_GetCarWeight(int carnum) { return Car_GetWeight(Car_Get(carnum)); }


x86 assembly (clang, -O0):
<Car_GetCarWeight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <Car_Get@plt>
mov    %eax,%edi
call   1040 <Car_GetWeight@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Car_GetCarWeight>:
push   %rax
call   1030 <Car_Get@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <Car_GetWeight@plt>

LLVM IR (-O0):
define i32 @Car_GetCarWeight(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @Car_Get(i32 %3)
%5 = call i32 @Car_GetWeight(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @Car_GetCarWeight(i32 %0) {
%2 = tail call i32 @Car_Get(i32 %0)
%3 = tail call i32 @Car_GetWeight(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ beep();
void my_beep(void) { beep(); }


x86 assembly (clang, -O0):
<my_beep>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <beep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_beep>:
xor    %eax,%eax
jmp    1030 <beep@plt>

LLVM IR (-O0):
define void @my_beep() {
%1 = call i32 (...) @beep()
ret void
}

LLVM IR (-O2):
define void @my_beep() {
%1 = tail call i32 (...) @beep()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fill_outgoing_packet_header(unsigned char *, int, int);
int /*<<< orphan*/ memset(unsigned char *, int /*<<< orphan*/, int);
void fill_config_req(unsigned char *buf, int body_len) {
  fill_outgoing_packet_header(buf, 0x43, body_len);
  memset(buf + 6, 0, 12);
}


x86 assembly (clang, -O0):
<fill_config_req>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x43,%esi
call   1040 <fill_outgoing_packet_header@plt>
mov    -0x8(%rbp),%rdi
add    $0x6,%rdi
xor    %esi,%esi
mov    $0xc,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_config_req>:
push   %rbx
mov    %esi,%edx
mov    %rdi,%rbx
mov    $0x43,%esi
call   1040 <fill_outgoing_packet_header@plt>
add    $0x6,%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0xc,%edx
pop    %rbx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @fill_config_req(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @fill_outgoing_packet_header(i8* %5, i32 67, i32 %6)
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 6
%10 = call i32 @memset(i8* %9, i32 0, i32 12)
ret void
}

LLVM IR (-O2):
define void @fill_config_req(i8* %0, i32 %1) {
%3 = tail call i32 @fill_outgoing_packet_header(i8* %0, i32 67, i32 %1)
%4 = getelementptr inbounds i8, i8* %0, i64 6
%5 = tail call i32 @memset(i8* %4, i32 0, i32 12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EIO;
int /*<<< orphan*/ errno;
int open(const char *buf, int flags, int mode) {
  errno = EIO;
  return (-1);
}


x86 assembly (clang, -O0):
<open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EIO = global i32 0
@errno = global i32 0
define i32 @open(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @EIO
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EIO = global i32 0
@errno = global i32 0
define i32 @open(i8* nocapture readnone %0, i32 %1, i32 %2) {
%4 = load i32, i32* @EIO
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf_skip(char *, char const *);
int stress_apparmor_supported(const char *name) {
  pr_inf_skip("%s: stressor will be skipped, "
              "AppArmor is not available\n",
              name);
  return -1;
}


x86 assembly (clang, -O0):
<stress_apparmor_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_apparmor_supported>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [57 x i8] c"%s: stressor will be skipped, AppArmor is not available\0A\00"
define i32 @stress_apparmor_supported(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @pr_inf_skip(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 -1
}

LLVM IR (-O2):
@.str = [57 x i8] c"%s: stressor will be skipped, AppArmor is not available\0A\00"
define i32 @stress_apparmor_supported(i8* %0) {
%2 = tail call i32 @pr_inf_skip(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 -1
}
/* Type definitions */
struct tls {
  int dummy;
};

/* Variables and functions */
int tls_connect_fds(struct tls *, int, int, char const *);
int tls_connect_socket(struct tls *ctx, int s, const char *servername) {
  return tls_connect_fds(ctx, s, s, servername);
}


x86 assembly (clang, -O0):
<tls_connect_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <tls_connect_fds@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tls_connect_socket>:
mov    %rdx,%rcx
mov    %esi,%edx
jmp    1030 <tls_connect_fds@plt>

LLVM IR (-O0):
%struct.tls = type { i32 }
define i32 @tls_connect_socket(%struct.tls* %0, i32 %1, i8* %2) {
%4 = alloca %struct.tls*
%5 = alloca i32
%6 = alloca i8*
store %struct.tls* %0, %struct.tls** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.tls*, %struct.tls** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = call i32 @tls_connect_fds(%struct.tls* %7, i32 %8, i32 %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.tls = type { i32 }
define i32 @tls_connect_socket(%struct.tls* %0, i32 %1, i8* %2) {
%4 = tail call i32 @tls_connect_fds(%struct.tls* %0, i32 %1, i32 %1, i8* %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
int triencmp(char const *, int /*<<< orphan*/, char const *, int /*<<< orphan*/,
             int *);
int triecmp(const char *a, const char *b, int *offset) {
  return triencmp(a, strlen(a), b, strlen(b), offset);
}


x86 assembly (clang, -O0):
<triecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x24(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x30(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    -0x20(%rbp),%rdx
mov    %eax,%ecx
mov    -0x18(%rbp),%r8
call   1040 <triencmp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<triecmp>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %r15,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r15,%rdx
mov    %eax,%ecx
mov    %r14,%r8
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <triencmp@plt>

LLVM IR (-O0):
define i32 @triecmp(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = load i8*, i8** %5
%11 = load i8*, i8** %5
%12 = call i32 @strlen(i8* %11)
%13 = load i32*, i32** %6
%14 = call i32 @triencmp(i8* %7, i32 %9, i8* %10, i32 %12, i32* %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @triecmp(i8* %0, i8* %1, i32* %2) {
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i32 @strlen(i8* %1)
%6 = tail call i32 @triencmp(i8* %0, i32 %4, i8* %1, i32 %5, i32* %2)
ret i32 %6
}
int main_prg(int argc, char **argv) { return (0); }


x86 assembly (clang, -O0):
<main_prg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_prg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main_prg(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main_prg(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ refresh();
void di_refresh() { refresh(); }


x86 assembly (clang, -O0):
<di_refresh>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <refresh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<di_refresh>:
xor    %eax,%eax
jmp    1030 <refresh@plt>

LLVM IR (-O0):
define void @di_refresh() {
%1 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @di_refresh() {
%1 = tail call i32 (...) @refresh()
ret void
}