xunge/DecIR huggingface dataset:
/* Variables and functions */
char *dstrdeln(char *, size_t, int);
char *dstrdel(char *str, size_t pos) { return dstrdeln(str, pos, 1); }


x86 assembly (clang, -O0):
<dstrdel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <dstrdeln@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dstrdel>:
mov    $0x1,%edx
jmp    1030 <dstrdeln@plt>

LLVM IR (-O0):
define i8* @dstrdel(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @dstrdeln(i8* %5, i64 %6, i32 1)
ret i8* %7
}

LLVM IR (-O2):
define i8* @dstrdel(i8* %0, i64 %1) {
%3 = tail call i8* @dstrdeln(i8* %0, i64 %1, i32 1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x1e() {
  Assert_real((isspace(30) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              155, ("isspace should be 0 for 0x1e"));
}


x86 assembly (clang, -O0):
<t_isspace_0x1e>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x9b,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x1e>:
push   %rax
mov    $0x1e,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x9b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x1e\00"
define void @t_isspace_0x1e() {
%1 = call i64 @isspace(i32 30)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 155, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x1e\00"
define void @t_isspace_0x1e() {
%1 = tail call i64 @isspace(i32 30)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 155, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void smpte_hbrmt_set_ext(uint8_t *p_hbrmt, uint8_t ext) {
  p_hbrmt[0] |= (ext & 0xf) << 4;
}


x86 assembly (clang, -O0):
<smpte_hbrmt_set_ext>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
mov    -0x8(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpte_hbrmt_set_ext>:
shl    $0x4,%esi
movzbl %sil,%eax
or     %eax,(%rdi)
ret

LLVM IR (-O0):
define void @smpte_hbrmt_set_ext(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 15
%7 = shl i32 %6, 4
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = or i32 %10, %7
store i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @smpte_hbrmt_set_ext(i32* nocapture %0, i32 %1) {
%3 = shl i32 %1, 4
%4 = and i32 %3, 240
%5 = load i32, i32* %0
%6 = or i32 %5, %4
store i32 %6, i32* %0
ret void
}
/* Type definitions */
struct target {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ isns_target_deregister(struct target *);
void isns_stop(void) { isns_target_deregister(((struct target *)1)); }


x86 assembly (clang, -O0):
<isns_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <isns_target_deregister@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isns_stop>:
mov    $0x1,%edi
jmp    1030 <isns_target_deregister@plt>

LLVM IR (-O0):
%struct.target = type { i32 }
define void @isns_stop() {
%1 = call i32 @isns_target_deregister(%struct.target* inttoptr (i64 1 to %struct.target*))
ret void
}

LLVM IR (-O2):
%struct.target = type { i32 }
define void @isns_stop() {
%1 = tail call i32 @isns_target_deregister(%struct.target* inttoptr (i64 1 to %struct.target*))
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int int32_t;

/* Variables and functions */
int32_t _sg_info_excep_interpret_asc(uint8_t asc) {
  if (asc == 0x5d)
    return 0;
  else if (asc == 0x0b)
    return 1;
  else
    return 2;
}


x86 assembly (clang, -O0):
<_sg_info_excep_interpret_asc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5d,-0x8(%rbp)
jne    111d <_sg_info_excep_interpret_asc+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    113a <_sg_info_excep_interpret_asc+0x3a>
cmpl   $0xb,-0x8(%rbp)
jne    1133 <_sg_info_excep_interpret_asc+0x33>
movl   $0x1,-0x4(%rbp)
jmp    113a <_sg_info_excep_interpret_asc+0x3a>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sg_info_excep_interpret_asc>:
xor    %eax,%eax
cmp    $0xb,%edi
sete   %al
mov    $0x2,%ecx
sub    %eax,%ecx
xor    %eax,%eax
cmp    $0x5d,%edi
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_sg_info_excep_interpret_asc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 93
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 11
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %12
11: ; preds = %7
store i32 2, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @_sg_info_excep_interpret_asc(i32 %0) {
%2 = icmp eq i32 %0, 11
%3 = select i1 %2, i32 1, i32 2
%4 = icmp eq i32 %0, 93
%5 = select i1 %4, i32 0, i32 %3
ret i32 %5
}
unsigned char HwMdReadSram(unsigned short offset) {
  while ((*(volatile unsigned short *)0x20004020))
    ;
  (*(volatile unsigned short *)0x20004022) = offset;
  (*(volatile unsigned short *)0x20004020) = 0x0100;
  while ((*(volatile unsigned short *)0x20004020))
    ;
  return (*(volatile unsigned short *)0x20004022) & 0x00FF;
}


x86 assembly (clang, -O0):
<HwMdReadSram>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x20004020,%eax
mov    (%rax),%ax
cmp    $0x0,%ax
je     1122 <HwMdReadSram+0x22>
jmp    110b <HwMdReadSram+0xb>
mov    -0x2(%rbp),%cx
mov    $0x20004022,%eax
mov    %cx,(%rax)
mov    $0x20004020,%eax
movw   $0x100,(%rax)
mov    $0x20004020,%eax
mov    (%rax),%ax
cmp    $0x0,%ax
je     114f <HwMdReadSram+0x4f>
jmp    1138 <HwMdReadSram+0x38>
mov    $0x20004022,%eax
mov    (%rax),%ax
movzwl %ax,%eax
and    $0xff,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HwMdReadSram>:
cmpw   $0x0,0x20004020
jne    1100 <HwMdReadSram>
mov    %di,0x20004022
20
movw   $0x100,0x20004020
nopl   (%rax)
cmpw   $0x0,0x20004020
jne    1120 <HwMdReadSram+0x20>
movzwl 0x20004022,%eax
20
ret

LLVM IR (-O0):
define zeroext i8 @HwMdReadSram(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
br label %3
3: ; preds = %6, %1
%4 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%5 = icmp ne i16 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %3
br label %3
7: ; preds = %3
%8 = load i16, i16* %2
store volatile i16 %8, i16* inttoptr (i64 536887330 to i16*)
store volatile i16 256, i16* inttoptr (i64 536887328 to i16*)
br label %9
9: ; preds = %12, %7
%10 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%11 = icmp ne i16 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
br label %9
13: ; preds = %9
%14 = load volatile i16, i16* inttoptr (i64 536887330 to i16*)
%15 = zext i16 %14 to i32
%16 = and i32 %15, 255
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @HwMdReadSram(i16 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%4 = icmp eq i16 %3, 0
br i1 %4, label %5, label %2
5: ; preds = %2
store volatile i16 %0, i16* inttoptr (i64 536887330 to i16*)
store volatile i16 256, i16* inttoptr (i64 536887328 to i16*)
br label %6
6: ; preds = %6, %5
%7 = load volatile i16, i16* inttoptr (i64 536887328 to i16*)
%8 = icmp eq i16 %7, 0
br i1 %8, label %9, label %6
9: ; preds = %6
%10 = load volatile i16, i16* inttoptr (i64 536887330 to i16*)
%11 = trunc i16 %10 to i8
ret i8 %11
}
/* Variables and functions */
int /*<<< orphan*/ strncmp(char *, char *, size_t);
void uninitvar_strncmp(char *Ct, char *S, size_t N) {
  char *ct;
  char *s;
  size_t n1;
  (void)strncmp(ct, S, N);
  (void)strncmp(Ct, s, N);
  (void)strncmp(Ct, S, n1);
  (void)strncmp(Ct, S, N);
}


x86 assembly (clang, -O0):
<uninitvar_strncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_strncmp>:
ret

LLVM IR (-O0):
define void @uninitvar_strncmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i8*, i8** %7
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @strncmp(i8* %10, i8* %11, i64 %12)
%14 = load i8*, i8** %4
%15 = load i8*, i8** %8
%16 = load i64, i64* %6
%17 = call i32 @strncmp(i8* %14, i8* %15, i64 %16)
%18 = load i8*, i8** %4
%19 = load i8*, i8** %5
%20 = load i64, i64* %9
%21 = call i32 @strncmp(i8* %18, i8* %19, i64 %20)
%22 = load i8*, i8** %4
%23 = load i8*, i8** %5
%24 = load i64, i64* %6
%25 = call i32 @strncmp(i8* %22, i8* %23, i64 %24)
ret void
}

LLVM IR (-O2):
define void @uninitvar_strncmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
ret void
}
int LeftJust_str(char *fmt_str, char *from_str, char *to_str) {
  int num_of_s = count_chars('s', fmt_str);
  sprintf(to_str, "%-*s", num_of_s, from_str);
  return num_of_s;
}


x86 assembly (clang, -O0):
<LeftJust_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x73,%edi
mov    $0x0,%al
call   1030 <count_chars@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    0xea7(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LeftJust_str>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%rsi
mov    $0x73,%edi
xor    %eax,%eax
call   1030 <count_chars@plt>
mov    %eax,%ebp
lea    0xebe(%rip),%rsi
mov    %rbx,%rdi
mov    %eax,%edx
mov    %r14,%rcx
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%-*s\00"
define i32 @LeftJust_str(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
%9 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @count_chars to i32 (i32, i8*, ...)*)(i32 115, i8* %8)
store i32 %9, i32* %7
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %5
%13 = call i32 (i8*, i8*, ...) @sprintf(i8* %10, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %12)
%14 = load i32, i32* %7
ret i32 %14
}

LLVM IR (-O2):
@.str = [5 x i8] c"%-*s\00"
define i32 @LeftJust_str(i8* %0, i8* %1, i8* nocapture writeonly %2) {
%4 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @count_chars to i32 (i32, i8*, ...)*)(i32 115, i8* %0)
%5 = tail call i32 (i8*, i8*, ...) @sprintf(i8* dereferenceable(1) %2, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %4, i8* %1)
ret i32 %4
}
unsigned int processorClockFrequency(void) { return 58982400; }


x86 assembly (clang, -O0):
<processorClockFrequency>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3840000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<processorClockFrequency>:
mov    $0x3840000,%eax
ret

LLVM IR (-O0):
define i32 @processorClockFrequency() {
ret i32 58982400
}

LLVM IR (-O2):
define i32 @processorClockFrequency() {
ret i32 58982400
}
/* Variables and functions */
int /*<<< orphan*/ __map2check_main__();
void *fuzzer_execution_function(void *args) {
  __map2check_main__();
  return NULL;
}


x86 assembly (clang, -O0):
<fuzzer_execution_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__map2check_main__@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fuzzer_execution_function>:
push   %rax
xor    %eax,%eax
call   1030 <__map2check_main__@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @fuzzer_execution_function(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @__map2check_main__()
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @fuzzer_execution_function(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @__map2check_main__()
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x70() {
  Assert_real((isascii(112)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              565, ("isascii should be 1 for p"));
}


x86 assembly (clang, -O0):
<t_isascii_0x70>:
push   %rbp
mov    %rsp,%rbp
mov    $0x70,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x235,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x70>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x235,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for p\00"
define void @t_isascii_0x70() {
%1 = call i32 @isascii(i32 112)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 565, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for p\00"
define void @t_isascii_0x70() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 565, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void nand_clear_Rnb(void) {
  (*(volatile unsigned int *)0x4E000028) &= (1 << 4);
}


x86 assembly (clang, -O0):
<nand_clear_Rnb>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4e000028,%eax
mov    (%rax),%ecx
and    $0x10,%ecx
mov    $0x4e000028,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_clear_Rnb>:
andl   $0x10,0x4e000028
10
ret

LLVM IR (-O0):
define void @nand_clear_Rnb() {
%1 = load volatile i32, i32* inttoptr (i64 1308622888 to i32*)
%2 = and i32 %1, 16
store volatile i32 %2, i32* inttoptr (i64 1308622888 to i32*)
ret void
}

LLVM IR (-O2):
define void @nand_clear_Rnb() {
%1 = load volatile i32, i32* inttoptr (i64 1308622888 to i32*)
%2 = and i32 %1, 16
store volatile i32 %2, i32* inttoptr (i64 1308622888 to i32*)
ret void
}
/* Variables and functions */
bool isKaprekar(unsigned number, unsigned sum) { return (number == sum); }


x86 assembly (clang, -O0):
<isKaprekar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isKaprekar>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isKaprekar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @isKaprekar(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void av_qsv_alloc_context() {}


x86 assembly (clang, -O0):
<av_qsv_alloc_context>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_qsv_alloc_context>:
ret

LLVM IR (-O0):
define void @av_qsv_alloc_context() {
ret void
}

LLVM IR (-O2):
define void @av_qsv_alloc_context() {
ret void
}
void glmCopyQuaterniond(const double source[4], double target[4]) {
  target[0] = source[0];
  target[1] = source[1];
  target[2] = source[2];
  target[3] = source[3];
}


x86 assembly (clang, -O0):
<glmCopyQuaterniond>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,0x10(%rax)
mov    -0x8(%rbp),%rax
movsd  0x18(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmCopyQuaterniond>:
movsd  (%rdi),%xmm0
movsd  %xmm0,(%rsi)
movsd  0x8(%rdi),%xmm0
movsd  %xmm0,0x8(%rsi)
movsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rsi)
movsd  0x18(%rdi),%xmm0
movsd  %xmm0,0x18(%rsi)
ret

LLVM IR (-O0):
define void @glmCopyQuaterniond(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
store double %7, double* %9
%10 = load double*, double** %3
%11 = getelementptr inbounds double, double* %10, i64 1
%12 = load double, double* %11
%13 = load double*, double** %4
%14 = getelementptr inbounds double, double* %13, i64 1
store double %12, double* %14
%15 = load double*, double** %3
%16 = getelementptr inbounds double, double* %15, i64 2
%17 = load double, double* %16
%18 = load double*, double** %4
%19 = getelementptr inbounds double, double* %18, i64 2
store double %17, double* %19
%20 = load double*, double** %3
%21 = getelementptr inbounds double, double* %20, i64 3
%22 = load double, double* %21
%23 = load double*, double** %4
%24 = getelementptr inbounds double, double* %23, i64 3
store double %22, double* %24
ret void
}

LLVM IR (-O2):
define void @glmCopyQuaterniond(double* nocapture %0, double* nocapture writeonly %1) {
%3 = load double, double* %0
store double %3, double* %1
%4 = getelementptr inbounds double, double* %0, i64 1
%5 = load double, double* %4
%6 = getelementptr inbounds double, double* %1, i64 1
store double %5, double* %6
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 2
store double %8, double* %9
%10 = getelementptr inbounds double, double* %0, i64 3
%11 = load double, double* %10
%12 = getelementptr inbounds double, double* %1, i64 3
store double %11, double* %12
ret void
}
void vectorAdd(float dest[3], const float a[3], const float b[3]) {
  int i;
  for (i = 0; i < 3; i++)
    dest[i] = a[i] + b[i];
}


x86 assembly (clang, -O0):
<vectorAdd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x3,-0x1c(%rbp)
jge    1156 <vectorAdd+0x56>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
addss  (%rax,%rcx,4),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <vectorAdd+0x17>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vectorAdd>:
movss  (%rsi),%xmm0
addss  (%rdx),%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
addss  0x4(%rdx),%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
addss  0x8(%rdx),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @vectorAdd(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
%7 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
store i32 0, i32* %7
br label %8
8: ; preds = %27, %3
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %30
11: ; preds = %8
%12 = load float*, float** %5
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds float, float* %12, i64 %14
%16 = load float, float* %15
%17 = load float*, float** %6
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds float, float* %17, i64 %19
%21 = load float, float* %20
%22 = fadd float %16, %21
%23 = load float*, float** %4
%24 = load i32, i32* %7
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds float, float* %23, i64 %25
store float %22, float* %26
br label %27
27: ; preds = %11
%28 = load i32, i32* %7
%29 = add nsw i32 %28, 1
store i32 %29, i32* %7
br label %8
30: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @vectorAdd(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fadd float %4, %5
store float %6, float* %0
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %2, i64 1
%10 = load float, float* %9
%11 = fadd float %8, %10
%12 = getelementptr inbounds float, float* %0, i64 1
store float %11, float* %12
%13 = getelementptr inbounds float, float* %1, i64 2
%14 = load float, float* %13
%15 = getelementptr inbounds float, float* %2, i64 2
%16 = load float, float* %15
%17 = fadd float %14, %16
%18 = getelementptr inbounds float, float* %0, i64 2
store float %17, float* %18
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void event_close(int f) { close(f); }


x86 assembly (clang, -O0):
<event_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @event_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @event_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
/* Variables and functions */
int ExecuterCommande(char *, char *);
int /*<<< orphan*/ printf(char *);
void testExecuterCommande() {
  char *commande;
  char *resultat;
  int result = ExecuterCommande(commande, resultat);
  if (1) {
    printf("%%TEST_FAILED%% time=0 testname=testExecuterCommande "
           "(Test_gestioncommandes) message=error message sample\n");
  }
}


x86 assembly (clang, -O0):
<testExecuterCommande>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <ExecuterCommande@plt>
mov    %eax,-0x14(%rbp)
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testExecuterCommande>:
push   %rax
call   1040 <ExecuterCommande@plt>
lea    0xed3(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [107 x i8] c"%%TEST_FAILED%% time=0 testname=testExecuterCommande (Test_gestioncommandes) message=error message sample\0A\00"
define void @testExecuterCommande() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i32
%4 = load i8*, i8** %1
%5 = load i8*, i8** %2
%6 = call i32 @ExecuterCommande(i8* %4, i8* %5)
store i32 %6, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([107 x i8], [107 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [107 x i8] c"%%TEST_FAILED%% time=0 testname=testExecuterCommande (Test_gestioncommandes) message=error message sample\0A\00"
define void @testExecuterCommande() {
%1 = tail call i32 @ExecuterCommande(i8* undef, i8* undef)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([107 x i8], [107 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_it;
int i2d_PKCS7(PKCS7 *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &PKCS7_it);
}


x86 assembly (clang, -O0):
<i2d_PKCS7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_PKCS7>:
mov    0x2ec9(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@PKCS7_it = global i32 0
define i32 @i2d_PKCS7(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @PKCS7_it)
ret i32 %7
}

LLVM IR (-O2):
@PKCS7_it = global i32 0
define i32 @i2d_PKCS7(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @PKCS7_it)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ sleep(int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int main(int argc, char **argv) {
  if (argc < 2) {
    fputs("Not enough arguments\n", stderr);
    return 2;
  }
  sleep(atoi(argv[1]));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1171 <main+0x41>
mov    0x2e89(%rip),%rax
mov    (%rax),%esi
lea    0xea0(%rip),%rdi
call   1030 <fputs@plt>
movl   $0x2,-0x4(%rbp)
jmp    118c <main+0x5c>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1050 <sleep@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jg     1152 <main+0x22>
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
lea    0xeba(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x2,%eax
pop    %rcx
ret
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Not enough arguments\0A\00"
@stderr = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fputs(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %9)
store i32 2, i32* %3
br label %17
11: ; preds = %2
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i32 @atoi(i8* %14)
%16 = call i32 @sleep(i32 %15)
store i32 0, i32* %3
br label %17
17: ; preds = %11, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@.str = [22 x i8] c"Not enough arguments\0A\00"
@stderr = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fputs(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %5)
br label %12
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i32 @atoi(i8* %9)
%11 = tail call i32 @sleep(i32 %10)
br label %12
12: ; preds = %7, %4
%13 = phi i32 [ 2, %4 ], [ 0, %7 ]
ret i32 %13
}
void ff_hevc_put_hevc_epel_v48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_v48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_v48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_v48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_v48_10_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
FILE *setmntent(const char *filename, const char *type) { return NULL; }


x86 assembly (clang, -O0):
<setmntent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setmntent>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32* @setmntent(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32* null
}

LLVM IR (-O2):
define noalias i32* @setmntent(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32* null
}
/* Variables and functions */
scalar_t__ malloc(int);
int *int_var(int i) {
  int *p = (int *)malloc(sizeof(int));
  *p = i;
  return p;
}


x86 assembly (clang, -O0):
<int_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_var>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @int_var(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %3
%6 = load i32, i32* %2
%7 = load i32*, i32** %3
store i32 %6, i32* %7
%8 = load i32*, i32** %3
ret i32* %8
}

LLVM IR (-O2):
define i32* @int_var(i32 %0) {
%2 = tail call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32 %0, i32* %3
ret i32* %3
}
/* Variables and functions */
int BIT(int);
int wpa_key_mgmt_sha256(int akm) {
  return !!(akm & (BIT(8) | BIT(7) | BIT(15) | BIT(16)));
}


x86 assembly (clang, -O0):
<wpa_key_mgmt_sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x8,%edi
call   1030 <BIT@plt>
mov    %eax,-0x14(%rbp)
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    $0xf,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    $0x10,%edi
call   1030 <BIT@plt>
mov    -0xc(%rbp),%ecx
mov    %eax,%edx
mov    -0x8(%rbp),%eax
or     %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_key_mgmt_sha256>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
mov    $0x8,%edi
call   1030 <BIT@plt>
mov    %eax,%ebp
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    %eax,%ebx
or     %ebp,%ebx
mov    $0xf,%edi
call   1030 <BIT@plt>
mov    %eax,%ebp
mov    $0x10,%edi
call   1030 <BIT@plt>
or     %ebp,%eax
or     %ebx,%eax
xor    %ecx,%ecx
test   %r14d,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @BIT(i32 8)
%5 = call i32 @BIT(i32 7)
%6 = or i32 %4, %5
%7 = call i32 @BIT(i32 15)
%8 = or i32 %6, %7
%9 = call i32 @BIT(i32 16)
%10 = or i32 %8, %9
%11 = and i32 %3, %10
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = tail call i32 @BIT(i32 8)
%3 = tail call i32 @BIT(i32 7)
%4 = or i32 %3, %2
%5 = tail call i32 @BIT(i32 15)
%6 = or i32 %4, %5
%7 = tail call i32 @BIT(i32 16)
%8 = or i32 %6, %7
%9 = and i32 %8, %0
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int bdos(int);
int chrin() { return bdos(1); }


x86 assembly (clang, -O0):
<chrin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <bdos@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chrin>:
mov    $0x1,%edi
jmp    1030 <bdos@plt>

LLVM IR (-O0):
define i32 @chrin() {
%1 = call i32 @bdos(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @chrin() {
%1 = tail call i32 @bdos(i32 1)
ret i32 %1
}
unsigned int f18(unsigned int x, long int y) {
  return (x >> ((-y) & (8 * 4 - 1))) ^ (x << y);
}


x86 assembly (clang, -O0):
<f18>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f18>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f18(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 0, %6
%8 = and i64 %7, 31
%9 = trunc i64 %8 to i32
%10 = lshr i32 %5, %9
%11 = load i32, i32* %3
%12 = load i64, i64* %4
%13 = trunc i64 %12 to i32
%14 = shl i32 %11, %13
%15 = xor i32 %10, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f18(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = sub i32 0, %3
%5 = and i32 %4, 31
%6 = lshr i32 %0, %5
%7 = shl i32 %0, %3
%8 = xor i32 %6, %7
ret i32 %8
}
void bitmap_set_bit(int nr, unsigned long *maskp) {
  maskp[((nr) / (8 * sizeof(long)))] |= (1UL << ((nr) % (8 * sizeof(long))));
}


x86 assembly (clang, -O0):
<bitmap_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rcx
and    $0x3f,%rcx
mov    $0x1,%edx
shl    %cl,%rdx
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
shr    $0x6,%rcx
or     (%rax,%rcx,8),%rdx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_set_bit>:
movslq %edi,%rcx
mov    $0x1,%eax
shl    %cl,%rax
shr    $0x6,%rcx
or     %rax,(%rsi,%rcx,8)
ret

LLVM IR (-O0):
define void @bitmap_set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = urem i64 %6, 64
%8 = shl i64 1, %7
%9 = load i64*, i64** %4
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = udiv i64 %11, 64
%13 = getelementptr inbounds i64, i64* %9, i64 %12
%14 = load i64, i64* %13
%15 = or i64 %14, %8
store i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @bitmap_set_bit(i32 %0, i64* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = and i64 %3, 63
%5 = shl nuw i64 1, %4
%6 = lshr i64 %3, 6
%7 = getelementptr inbounds i64, i64* %1, i64 %6
%8 = load i64, i64* %7
%9 = or i64 %8, %5
store i64 %9, i64* %7
ret void
}
float prv_process_fpa_rdiv_real32(float a, float b) { return b / a; }


x86 assembly (clang, -O0):
<prv_process_fpa_rdiv_real32>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
divss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_process_fpa_rdiv_real32>:
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @prv_process_fpa_rdiv_real32(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float, float* %3
%7 = fdiv float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @prv_process_fpa_rdiv_real32(float %0, float %1) {
%3 = fdiv float %1, %0
ret float %3
}
void attachInterrupt(int pin, void (*interrupt)(void), int level) {}


x86 assembly (clang, -O0):
<attachInterrupt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<attachInterrupt>:
ret

LLVM IR (-O0):
define void @attachInterrupt(i32 %0, void ()* %1, i32 %2) {
%4 = alloca i32
%5 = alloca void ()*
%6 = alloca i32
store i32 %0, i32* %4
store void ()* %1, void ()** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @attachInterrupt(i32 %0, void ()* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcmp(char const *, char const *, size_t);
size_t strlen(char const *);
int strbegins(const char *haystack, const char *needle) {
  size_t hlen = strlen(haystack), nlen = strlen(needle);
  return (hlen >= nlen) && !memcmp(haystack, needle, nlen);
}


x86 assembly (clang, -O0):
<strbegins>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
cmp    -0x20(%rbp),%rcx
mov    %al,-0x21(%rbp)
jb     1179 <strbegins+0x59>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <memcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strbegins>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %rax,%rdx
xor    %eax,%eax
cmp    %rdx,%rbx
jb     1159 <strbegins+0x39>
mov    %r15,%rdi
mov    %r14,%rsi
call   1040 <bcmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @strbegins(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = icmp uge i64 %11, %12
br i1 %13, label %14, label %21
14: ; preds = %2
%15 = load i8*, i8** %3
%16 = load i8*, i8** %4
%17 = load i64, i64* %6
%18 = call i32 @memcmp(i8* %15, i8* %16, i64 %17)
%19 = icmp ne i32 %18, 0
%20 = xor i1 %19, true
br label %21
21: ; preds = %14, %2
%22 = phi i1 [ false, %2 ], [ %20, %14 ]
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @strbegins(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = icmp ult i64 %3, %4
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @bcmp(i8* %0, i8* %1, i64 %4)
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %2
%11 = phi i32 [ 0, %2 ], [ %9, %6 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void print_outro(void) {
  puts("\tfree(mem);");
  puts("\treturn 0;");
  puts("}");
}


x86 assembly (clang, -O0):
<print_outro>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee4(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_outro>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee7(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"\09free(mem);\00"
@.str.1 = [11 x i8] c"\09return 0;\00"
@.str.2 = [2 x i8] c"}\00"
define void @print_outro() {
%1 = call i32 @puts(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"\09free(mem);\00"
@.str.1 = [11 x i8] c"\09return 0;\00"
@.str.2 = [2 x i8] c"}\00"
define void @print_outro() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}
extern int dummy() { return 0; }


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dummy() {
ret i32 0
}

LLVM IR (-O2):
define i32 @dummy() {
ret i32 0
}
/* Type definitions */
struct Result {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_screen();
int /*<<< orphan*/ print_all_results(struct Result *);
int /*<<< orphan*/ print_progress_bar(size_t);
void update_progress(struct Result *results, size_t completed) {
  clear_screen();
  print_all_results(results);
  print_progress_bar(completed);
}


x86 assembly (clang, -O0):
<update_progress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <clear_screen@plt>
mov    -0x8(%rbp),%rdi
call   1050 <print_all_results@plt>
mov    -0x10(%rbp),%rdi
call   1040 <print_progress_bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_progress>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <clear_screen@plt>
mov    %rbx,%rdi
call   1050 <print_all_results@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <print_progress_bar@plt>

LLVM IR (-O0):
%struct.Result = type { i32 }
define void @update_progress(%struct.Result* %0, i64 %1) {
%3 = alloca %struct.Result*
%4 = alloca i64
store %struct.Result* %0, %struct.Result** %3
store i64 %1, i64* %4
%5 = call i32 (...) @clear_screen()
%6 = load %struct.Result*, %struct.Result** %3
%7 = call i32 @print_all_results(%struct.Result* %6)
%8 = load i64, i64* %4
%9 = call i32 @print_progress_bar(i64 %8)
ret void
}

LLVM IR (-O2):
%struct.Result = type { i32 }
define void @update_progress(%struct.Result* %0, i64 %1) {
%3 = tail call i32 (...) @clear_screen()
%4 = tail call i32 @print_all_results(%struct.Result* %0)
%5 = tail call i32 @print_progress_bar(i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCD_CLR_RESET();
int /*<<< orphan*/ LCD_SET_A0();
int /*<<< orphan*/ LCD_SET_CLK();
int /*<<< orphan*/ LCD_SET_DATA();
int /*<<< orphan*/ LCD_SET_DIR_OUT();
int /*<<< orphan*/ LCD_SET_RESET();
void LCD_X_Init(void) {
  LCD_CLR_RESET();
  LCD_SET_DIR_OUT();
  ;
  LCD_SET_A0();
  LCD_SET_RESET();
  LCD_SET_CLK();
  LCD_SET_DATA();
  ;
  LCD_SET_RESET();
  ;
}


x86 assembly (clang, -O0):
<LCD_X_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <LCD_CLR_RESET@plt>
mov    $0x0,%al
call   1050 <LCD_SET_DIR_OUT@plt>
mov    $0x0,%al
call   1060 <LCD_SET_A0@plt>
mov    $0x0,%al
call   1030 <LCD_SET_RESET@plt>
mov    $0x0,%al
call   1080 <LCD_SET_CLK@plt>
mov    $0x0,%al
call   1040 <LCD_SET_DATA@plt>
mov    $0x0,%al
call   1030 <LCD_SET_RESET@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_X_Init>:
push   %rax
xor    %eax,%eax
call   1070 <LCD_CLR_RESET@plt>
xor    %eax,%eax
call   1050 <LCD_SET_DIR_OUT@plt>
xor    %eax,%eax
call   1060 <LCD_SET_A0@plt>
xor    %eax,%eax
call   1030 <LCD_SET_RESET@plt>
xor    %eax,%eax
call   1080 <LCD_SET_CLK@plt>
xor    %eax,%eax
call   1040 <LCD_SET_DATA@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <LCD_SET_RESET@plt>

LLVM IR (-O0):
define void @LCD_X_Init() {
%1 = call i32 (...) @LCD_CLR_RESET()
%2 = call i32 (...) @LCD_SET_DIR_OUT()
%3 = call i32 (...) @LCD_SET_A0()
%4 = call i32 (...) @LCD_SET_RESET()
%5 = call i32 (...) @LCD_SET_CLK()
%6 = call i32 (...) @LCD_SET_DATA()
%7 = call i32 (...) @LCD_SET_RESET()
ret void
}

LLVM IR (-O2):
define void @LCD_X_Init() {
%1 = tail call i32 (...) @LCD_CLR_RESET()
%2 = tail call i32 (...) @LCD_SET_DIR_OUT()
%3 = tail call i32 (...) @LCD_SET_A0()
%4 = tail call i32 (...) @LCD_SET_RESET()
%5 = tail call i32 (...) @LCD_SET_CLK()
%6 = tail call i32 (...) @LCD_SET_DATA()
%7 = tail call i32 (...) @LCD_SET_RESET()
ret void
}
extern unsigned long long join_words(unsigned a, unsigned b) {
  return ((unsigned long long)a << 32) | b;
}


x86 assembly (clang, -O0):
<join_words>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x20,%rax
mov    -0x8(%rbp),%ecx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<join_words>:
shl    $0x20,%rdi
mov    %esi,%eax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @join_words(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = zext i32 %5 to i64
%7 = shl i64 %6, 32
%8 = load i32, i32* %4
%9 = zext i32 %8 to i64
%10 = or i64 %7, %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @join_words(i32 %0, i32 %1) {
%3 = zext i32 %0 to i64
%4 = shl nuw i64 %3, 32
%5 = zext i32 %1 to i64
%6 = or i64 %4, %5
ret i64 %6
}
int sb_is_blkdev_sb(struct super_block *sb) { return 0; }


x86 assembly (clang, -O0):
<sb_is_blkdev_sb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_is_blkdev_sb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.super_block = type opaque
define i32 @sb_is_blkdev_sb(%struct.super_block* %0) {
%2 = alloca %struct.super_block*
store %struct.super_block* %0, %struct.super_block** %2
ret i32 0
}

LLVM IR (-O2):
%struct.super_block = type opaque
define i32 @sb_is_blkdev_sb(%struct.super_block* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void csr_writel(uint32_t value, uint32_t addr) {
  *((volatile uint32_t *)addr) = value;
}


x86 assembly (clang, -O0):
<csr_writel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<csr_writel>:
mov    %rdi,(%rsi)
ret

LLVM IR (-O0):
define void @csr_writel(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}

LLVM IR (-O2):
define void @csr_writel(i64 %0, i64 %1) {
%3 = inttoptr i64 %1 to i64*
store volatile i64 %0, i64* %3
ret void
}