xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ vuln(char *);
int main(int argc, char **argv) {
  if (argc > 1)
    vuln(argv[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    113d <main+0x2d>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <vuln@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jl     1123 <main+0x13>
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <vuln@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @vuln(i8* %11)
br label %13
13: ; preds = %8, %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @vuln(i8* %6)
br label %8
8: ; preds = %4, %2
ret i32 0
}
int test1(int a, int b, int c) { return (a * b - c); }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    %edi,%eax
imul   %esi,%eax
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @test1(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = sub nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @test1(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %1, %0
%5 = sub nsw i32 %4, %2
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_SETMASK;
int /*<<< orphan*/ log_err(char *);
int sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ const *,
                int /*<<< orphan*/ *);
void shutdown_quit_notification(const sigset_t *origset) {
  if (sigprocmask(SIG_SETMASK, origset, NULL) == -1)
    log_err("sigprocmask error: %m");
}


x86 assembly (clang, -O0):
<shutdown_quit_notification>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
cmp    $0xffffffff,%eax
jne    1157 <shutdown_quit_notification+0x37>
lea    0xeae(%rip),%rdi
call   1040 <log_err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdown_quit_notification>:
push   %rax
mov    %rdi,%rsi
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
cmp    $0xffffffff,%eax
je     113b <shutdown_quit_notification+0x1b>
pop    %rax
ret
lea    0xebe(%rip),%rdi
pop    %rax
jmp    1040 <log_err@plt>

LLVM IR (-O0):
@SIG_SETMASK = global i32 0
@.str = [22 x i8] c"sigprocmask error: %m\00"
define void @shutdown_quit_notification(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @SIG_SETMASK
%4 = load i32*, i32** %2
%5 = call i32 @sigprocmask(i32 %3, i32* %4, i32* null)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @log_err(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
@SIG_SETMASK = global i32 0
@.str = [22 x i8] c"sigprocmask error: %m\00"
define void @shutdown_quit_notification(i32* %0) {
%2 = load i32, i32* @SIG_SETMASK
%3 = tail call i32 @sigprocmask(i32 %2, i32* %0, i32* null)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @log_err(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int fatorial(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int n = 0;
  scanf("%d", &n);
  if (n < 0 || n > 12) {
    return 0;
  } else {
    printf("%d", fatorial(n));
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xeb3(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
jl     116a <main+0x3a>
cmpl   $0xc,-0x8(%rbp)
jle    1176 <main+0x46>
movl   $0x0,-0x4(%rbp)
jmp    118c <main+0x5c>
mov    -0x8(%rbp),%edi
call   1040 <fatorial@plt>
mov    %eax,%esi
lea    0xe79(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
cmp    $0xc,%edi
ja     1166 <main+0x36>
call   1040 <fatorial@plt>
lea    0xea1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 12
br i1 %8, label %9, label %10
9: ; preds = %6, %0
store i32 0, i32* %1
br label %14
10: ; preds = %6
%11 = load i32, i32* %2
%12 = call i32 @fatorial(i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %9, %10
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp ugt i32 %4, 12
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = call i32 @fatorial(i32 %4)
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %0, %6
ret i32 0
}
void w4(void *x, double y) { *(double *)(x + 32764) = y; }


x86 assembly (clang, -O0):
<w4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x7ffc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<w4>:
movsd  %xmm0,0x7ffc(%rdi)
ret

LLVM IR (-O0):
define void @w4(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load i8*, i8** %3
%7 = getelementptr i8, i8* %6, i64 32764
%8 = bitcast i8* %7 to double*
store double %5, double* %8
ret void
}

LLVM IR (-O2):
define void @w4(i8* nocapture writeonly %0, double %1) {
%3 = getelementptr i8, i8* %0, i64 32764
%4 = bitcast i8* %3 to double*
store double %1, double* %4
ret void
}
_Complex short dfn_rcs(void) {
  return ({
    _Complex short x;
    __real__(x) = (3), __imag__(x) == (4);
    x;
  });
}


x86 assembly (clang, -O0):
<dfn_rcs>:
push   %rbp
mov    %rsp,%rbp
movw   $0x3,-0x10(%rbp)
mov    -0x10(%rbp),%cx
mov    -0xe(%rbp),%ax
mov    %cx,-0x18(%rbp)
mov    %ax,-0x16(%rbp)
mov    -0x18(%rbp),%cx
mov    -0x16(%rbp),%ax
mov    %cx,-0x8(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfn_rcs>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @dfn_rcs() {
%1 = alloca { i16, i16 }
%2 = alloca { i16, i16 }
%3 = alloca { i16, i16 }
%4 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %2, i32 0, i32 0
store i16 3, i16* %4
%5 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %2, i32 0, i32 1
%6 = load i16, i16* %5
%7 = sext i16 %6 to i32
%8 = icmp eq i32 %7, 4
%9 = zext i1 %8 to i32
%10 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %2, i32 0, i32 0
%11 = load i16, i16* %10
%12 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %2, i32 0, i32 1
%13 = load i16, i16* %12
%14 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %3, i32 0, i32 0
%15 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %3, i32 0, i32 1
store i16 %11, i16* %14
store i16 %13, i16* %15
%16 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %3, i32 0, i32 0
%17 = load i16, i16* %16
%18 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %3, i32 0, i32 1
%19 = load i16, i16* %18
%20 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %1, i32 0, i32 0
%21 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %1, i32 0, i32 1
store i16 %17, i16* %20
store i16 %19, i16* %21
%22 = bitcast { i16, i16 }* %1 to i32*
%23 = load i32, i32* %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @dfn_rcs() {
ret i32 3
}
/* Variables and functions */
double RAND_MAX;
double rand();
int random_range(int min, int max) {
  int dif = max - min;
  return (int)(((double)(dif + 1) / RAND_MAX) * rand() + min);
}


x86 assembly (clang, -O0):
<random_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
cvtsi2sd %eax,%xmm0
mov    0x2eb0(%rip),%rax
divsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movaps %xmm0,%xmm2
movsd  -0x18(%rbp),%xmm0
cvtsi2sdl -0x4(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_range>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
sub    %edi,%esi
add    $0x1,%esi
cvtsi2sd %esi,%xmm0
mov    0x2ec1(%rip),%rax
divsd  (%rax),%xmm0
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %ebx,%xmm1
mulsd  0x8(%rsp),%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define i32 @random_range(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
%11 = sitofp i32 %10 to double
%12 = load double, double* @RAND_MAX
%13 = fdiv double %11, %12
%14 = call double (...) @rand()
%15 = load i32, i32* %3
%16 = sitofp i32 %15 to double
%17 = call double @llvm.fmuladd.f64(double %13, double %14, double %16)
%18 = fptosi double %17 to i32
ret i32 %18
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define i32 @random_range(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = sitofp i32 %4 to double
%6 = load double, double* @RAND_MAX
%7 = fdiv double %5, %6
%8 = tail call double (...) @rand()
%9 = sitofp i32 %0 to double
%10 = tail call double @llvm.fmuladd.f64(double %7, double %8, double %9)
%11 = fptosi double %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ SIGPIPE;
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ sig_catch(int /*<<< orphan*/, int /*<<< orphan*/);
void sig_pipedefault(void) { sig_catch(SIGPIPE, SIG_DFL); }


x86 assembly (clang, -O0):
<sig_pipedefault>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
call   1030 <sig_catch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_pipedefault>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
jmp    1030 <sig_catch@plt>

LLVM IR (-O0):
@SIGPIPE = global i32 0
@SIG_DFL = global i32 0
define void @sig_pipedefault() {
%1 = load i32, i32* @SIGPIPE
%2 = load i32, i32* @SIG_DFL
%3 = call i32 @sig_catch(i32 %1, i32 %2)
ret void
}

LLVM IR (-O2):
@SIGPIPE = global i32 0
@SIG_DFL = global i32 0
define void @sig_pipedefault() {
%1 = load i32, i32* @SIGPIPE
%2 = load i32, i32* @SIG_DFL
%3 = tail call i32 @sig_catch(i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int, int);
void openlog(const char *ident, int option, int facility) {
  printf("log_test: openlog(\"%s\", %#x, %d)\n", ident, option, facility);
}


x86 assembly (clang, -O0):
<openlog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openlog>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"log_test: openlog(\22%s\22, %#x, %d)\0A\00"
define void @openlog(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"log_test: openlog(\22%s\22, %#x, %d)\0A\00"
define void @openlog(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
long strtoull(char *, char **, int);
long int t24(char **x) { return strtoull("1234", x, 10); }


x86 assembly (clang, -O0):
<t24>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0xa,%edx
call   1030 <strtoull@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t24>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
mov    $0xa,%edx
jmp    1030 <strtoull@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"1234\00"
define i64 @t24(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i64 @strtoull(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %3, i32 10)
ret i64 %4
}

LLVM IR (-O2):
@.str = [5 x i8] c"1234\00"
define i64 @t24(i8** nocapture %0) {
%2 = tail call i64 @strtoull(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %0, i32 10)
ret i64 %2
}
/* Variables and functions */
void *mf__mem_realloc(void *, size_t);
void *mem_realloc(void *ptr, size_t size) {
  void *r_ptr = NULL;
  ;
  r_ptr = mf__mem_realloc(ptr, size);
  ;
  return (r_ptr);
}


x86 assembly (clang, -O0):
<mem_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mf__mem_realloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_realloc>:
jmp    1030 <mf__mem_realloc@plt>

LLVM IR (-O0):
define i8* @mem_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
store i8* null, i8** %5
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @mf__mem_realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
ret i8* %9
}

LLVM IR (-O2):
define i8* @mem_realloc(i8* %0, i64 %1) {
%3 = tail call i8* @mf__mem_realloc(i8* %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ step_hash(int);
signed char func_1(void) {
  int l_2[8];
  int i;
  for (i = 0; i < 8; i++)
    l_2[i] = 0L;
  step_hash(1);
  return l_2[1];
}


x86 assembly (clang, -O0):
<func_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x24(%rbp)
cmpl   $0x8,-0x24(%rbp)
jge    1143 <func_1+0x33>
movslq -0x24(%rbp),%rax
movl   $0x0,-0x20(%rbp,%rax,4)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    111f <func_1+0xf>
mov    $0x1,%edi
call   1030 <step_hash@plt>
mov    -0x1c(%rbp),%eax
movsbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_1>:
push   %rax
mov    $0x1,%edi
call   1030 <step_hash@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @func_1() {
%1 = alloca [8 x i32]
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 8
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 %8
store i32 0, i32* %9
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
%14 = call i32 @step_hash(i32 1)
%15 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 1
%16 = load i32, i32* %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @func_1() {
%1 = tail call i32 @step_hash(i32 1)
ret i8 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long event;
};
struct TYPE_4__ {
  TYPE_1__ xconfigure;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xconfigure_event(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xconfigure.event = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xconfigure_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xconfigure_event>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xconfigure_event(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xconfigure_event(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
short posterior(elem, lim)
short elem, lim;
{ return (elem == lim) ? 0 : ++elem; }


x86 assembly (clang, -O0):
<posterior>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%cx
mov    %si,%ax
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x4(%rbp),%ecx
cmp    %ecx,%eax
jne    112c <posterior+0x2c>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    113c <posterior+0x3c>
mov    -0x2(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x2(%rbp)
cwtl
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<posterior>:
lea    0x1(%rdi),%ecx
xor    %eax,%eax
xor    %si,%di
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @posterior(i32 %0, i32 %1) {
%3 = alloca i16
%4 = alloca i16
%5 = trunc i32 %0 to i16
%6 = trunc i32 %1 to i16
store i16 %5, i16* %3
store i16 %6, i16* %4
%7 = load i16, i16* %3
%8 = sext i16 %7 to i32
%9 = load i16, i16* %4
%10 = sext i16 %9 to i32
%11 = icmp eq i32 %8, %10
br i1 %11, label %12, label %13
12: ; preds = %2
br label %17
13: ; preds = %2
%14 = load i16, i16* %3
%15 = add i16 %14, 1
store i16 %15, i16* %3
%16 = sext i16 %15 to i32
br label %17
17: ; preds = %13, %12
%18 = phi i32 [ 0, %12 ], [ %16, %13 ]
%19 = trunc i32 %18 to i16
ret i16 %19
}

LLVM IR (-O2):
define signext i16 @posterior(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = and i32 %3, 65535
%5 = icmp eq i32 %4, 0
%6 = trunc i32 %0 to i16
%7 = add i16 %6, 1
%8 = select i1 %5, i16 0, i16 %7
ret i16 %8
}
short test_171_8(short *mem) {
  short expected = 1;
  short desired = 5;
  return __atomic_compare_exchange(mem + 4, &expected, &desired, 0, 4, 0);
}


x86 assembly (clang, -O0):
<test_171_8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movw   $0x1,-0xa(%rbp)
movw   $0x5,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xa(%rbp),%ax
mov    -0xc(%rbp),%dx
lock cmpxchg %dx,0x8(%rcx)
mov    %ax,%cx
sete   %al
mov    %al,-0x11(%rbp)
mov    %cx,-0x10(%rbp)
test   $0x1,%al
jne    1143 <test_171_8+0x43>
mov    -0x10(%rbp),%ax
mov    %ax,-0xa(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_171_8>:
mov    $0x5,%dx
xor    %ecx,%ecx
mov    $0x1,%ax
lock cmpxchg %dx,0x8(%rdi)
sete   %cl
mov    %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @test_171_8(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
%5 = alloca i8
store i16* %0, i16** %2
store i16 1, i16* %3
store i16 5, i16* %4
%6 = load i16*, i16** %2
%7 = getelementptr inbounds i16, i16* %6, i64 4
%8 = load i16, i16* %3
%9 = load i16, i16* %4
%10 = cmpxchg i16* %7, i16 %8, i16 %9 acq_rel monotonic
%11 = extractvalue { i16, i1 } %10, 0
%12 = extractvalue { i16, i1 } %10, 1
br i1 %12, label %14, label %13
13: ; preds = %1
store i16 %11, i16* %3
br label %14
14: ; preds = %13, %1
%15 = zext i1 %12 to i8
store i8 %15, i8* %5
%16 = load i8, i8* %5
%17 = trunc i8 %16 to i1
%18 = zext i1 %17 to i16
ret i16 %18
}

LLVM IR (-O2):
define signext i16 @test_171_8(i16* nocapture %0) {
%2 = getelementptr inbounds i16, i16* %0, i64 4
%3 = cmpxchg i16* %2, i16 1, i16 5 acq_rel monotonic
%4 = extractvalue { i16, i1 } %3, 1
%5 = zext i1 %4 to i16
ret i16 %5
}
/* Variables and functions */
int msgsnd(int, long *, int, int /*<<< orphan*/);
int sendBloqueCompleto(int queue) {
  long tipo = 6;
  return msgsnd(queue, &tipo, sizeof(long), 0);
}


x86 assembly (clang, -O0):
<sendBloqueCompleto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x6,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
mov    $0x8,%edx
xor    %ecx,%ecx
call   1030 <msgsnd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendBloqueCompleto>:
push   %rax
movq   $0x6,(%rsp)
mov    %rsp,%rsi
mov    $0x8,%edx
xor    %ecx,%ecx
call   1030 <msgsnd@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sendBloqueCompleto(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
store i64 6, i64* %3
%4 = load i32, i32* %2
%5 = call i32 @msgsnd(i32 %4, i64* %3, i32 8, i32 0)
ret i32 %5
}

LLVM IR (-O2):
define i32 @sendBloqueCompleto(i32 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
store i64 6, i64* %2
%4 = call i32 @msgsnd(i32 %0, i64* %2, i32 8, i32 0)
ret i32 %4
}
void gfx_i2c_cleanup(void) {}


x86 assembly (clang, -O0):
<gfx_i2c_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_i2c_cleanup>:
ret

LLVM IR (-O0):
define void @gfx_i2c_cleanup() {
ret void
}

LLVM IR (-O2):
define void @gfx_i2c_cleanup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_34() {
  Assert_real((isqrt(34) == 5),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              175, ("Integer square root of 34 should be 5"));
}


x86 assembly (clang, -O0):
<t_sqrt_34>:
push   %rbp
mov    %rsp,%rbp
mov    $0x22,%edi
call   1030 <isqrt@plt>
cmp    $0x5,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0xaf,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_34>:
push   %rax
mov    $0x22,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x5,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0xaf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 34 should be 5\00"
define void @t_sqrt_34() {
%1 = call i32 @isqrt(i32 34)
%2 = icmp eq i32 %1, 5
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 175, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 34 should be 5\00"
define void @t_sqrt_34() {
%1 = tail call i32 @isqrt(i32 34)
%2 = icmp eq i32 %1, 5
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 175, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct parser_params {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ comment_at_top(struct parser_params *);
int /*<<< orphan*/ parser_set_encode(struct parser_params *, char const *);
void magic_comment_encoding(struct parser_params *parser, const char *name,
                            const char *val) {
  if (!comment_at_top(parser)) {
    return;
  }
  parser_set_encode(parser, val);
}


x86 assembly (clang, -O0):
<magic_comment_encoding>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <comment_at_top@plt>
cmp    $0x0,%eax
jne    114b <magic_comment_encoding+0x2b>
jmp    1158 <magic_comment_encoding+0x38>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <parser_set_encode@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magic_comment_encoding>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <comment_at_top@plt>
test   %eax,%eax
je     1145 <magic_comment_encoding+0x25>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <parser_set_encode@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.parser_params = type { i32 }
define void @magic_comment_encoding(%struct.parser_params* %0, i8* %1, i8* %2) {
%4 = alloca %struct.parser_params*
%5 = alloca i8*
%6 = alloca i8*
store %struct.parser_params* %0, %struct.parser_params** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.parser_params*, %struct.parser_params** %4
%8 = call i32 @comment_at_top(%struct.parser_params* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %3
br label %15
11: ; preds = %3
%12 = load %struct.parser_params*, %struct.parser_params** %4
%13 = load i8*, i8** %6
%14 = call i32 @parser_set_encode(%struct.parser_params* %12, i8* %13)
br label %15
15: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
%struct.parser_params = type { i32 }
define void @magic_comment_encoding(%struct.parser_params* %0, i8* nocapture readnone %1, i8* %2) {
%4 = tail call i32 @comment_at_top(%struct.parser_params* %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @parser_set_encode(%struct.parser_params* %0, i8* %2)
br label %8
8: ; preds = %3, %6
ret void
}
/* Type definitions */
struct BoolExpr {
  int dummy;
};

/* Variables and functions */
struct BoolExpr *BX_IncRef(struct BoolExpr *);
struct BoolExpr *_orandnot_nnfify(struct BoolExpr *op) {
  return BX_IncRef(op);
}


x86 assembly (clang, -O0):
<_orandnot_nnfify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <BX_IncRef@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_orandnot_nnfify>:
jmp    1030 <BX_IncRef@plt>

LLVM IR (-O0):
%struct.BoolExpr = type { i32 }
define %struct.BoolExpr* @_orandnot_nnfify(%struct.BoolExpr* %0) {
%2 = alloca %struct.BoolExpr*
store %struct.BoolExpr* %0, %struct.BoolExpr** %2
%3 = load %struct.BoolExpr*, %struct.BoolExpr** %2
%4 = call %struct.BoolExpr* @BX_IncRef(%struct.BoolExpr* %3)
ret %struct.BoolExpr* %4
}

LLVM IR (-O2):
%struct.BoolExpr = type { i32 }
define %struct.BoolExpr* @_orandnot_nnfify(%struct.BoolExpr* %0) {
%2 = tail call %struct.BoolExpr* @BX_IncRef(%struct.BoolExpr* %0)
ret %struct.BoolExpr* %2
}
void call_real(struct bootapp_callback_params *params) { (void)params; }


x86 assembly (clang, -O0):
<call_real>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_real>:
ret

LLVM IR (-O0):
%struct.bootapp_callback_params = type opaque
define void @call_real(%struct.bootapp_callback_params* %0) {
%2 = alloca %struct.bootapp_callback_params*
store %struct.bootapp_callback_params* %0, %struct.bootapp_callback_params** %2
%3 = load %struct.bootapp_callback_params*, %struct.bootapp_callback_params** %2
ret void
}

LLVM IR (-O2):
%struct.bootapp_callback_params = type opaque
define void @call_real(%struct.bootapp_callback_params* nocapture %0) {
ret void
}
unsigned xrop3_117_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = S | stk3;
  stk1 = D & stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_117_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_117_0_0>:
not    %sil
or     %dil,%sil
movzbl %sil,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_117_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_117_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = xor i8 %1, -1
%4 = or i8 %3, %0
%5 = zext i8 %4 to i32
%6 = xor i32 %5, -1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_ext_stream_restore_delete() {
  printf("NOT IMPLEMENTED:"
         "pa_ext_stream_restore_delete"
         "\n");
}


x86 assembly (clang, -O0):
<pa_ext_stream_restore_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_ext_stream_restore_delete>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"NOT IMPLEMENTED:pa_ext_stream_restore_delete\0A\00"
define i32 @pa_ext_stream_restore_delete() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [45 x i8] c"NOT IMPLEMENTED:pa_ext_stream_restore_delete\00"
define i32 @pa_ext_stream_restore_delete() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int jac_chain_nm2_init(int *n_in, int *n_out, int *n_int, int *n_real) {
  if (n_in)
    *n_in = 2;
  if (n_out)
    *n_out = 2;
  if (n_int)
    *n_int = 0;
  if (n_real)
    *n_real = 0;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm2_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <jac_chain_nm2_init+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <jac_chain_nm2_init+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <jac_chain_nm2_init+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <jac_chain_nm2_init+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm2_init>:
test   %rdi,%rdi
je     110b <jac_chain_nm2_init+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <jac_chain_nm2_init+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <jac_chain_nm2_init+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <jac_chain_nm2_init+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm2_init(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm2_init(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
int test_imm_83int32_mem(int *val) {
  return ((*val) & (0x83 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_83int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x83,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_83int32_mem>:
testb  $0x83,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_83int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 131
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_83int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 131
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int main() {
  fprintf(stdout, "hello");
  fputs("hh", stdout);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
lea    0xec1(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
lea    0xeb2(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
mov    (%rbx),%esi
lea    0xec7(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [6 x i8] c"hello\00"
@.str.1 = [3 x i8] c"hh\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stdout
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stdout
%5 = call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [6 x i8] c"hello\00"
@.str.1 = [3 x i8] c"hh\00"
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stdout
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}
int test_imm_92uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x92 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_92uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x92,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_92uint64_lowword_mem>:
testb  $0x92,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_92uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 146
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_92uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 146
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void av_fifo_generic_peek() {}


x86 assembly (clang, -O0):
<av_fifo_generic_peek>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_fifo_generic_peek>:
ret

LLVM IR (-O0):
define void @av_fifo_generic_peek() {
ret void
}

LLVM IR (-O2):
define void @av_fifo_generic_peek() {
ret void
}
/* Variables and functions */
int unlink(char const *);
int _q_unlink(const char *pathname) { return unlink(pathname); }


x86 assembly (clang, -O0):
<_q_unlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_q_unlink>:
jmp    1030 <unlink@plt>

LLVM IR (-O0):
define i32 @_q_unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @unlink(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @_q_unlink(i8* nocapture %0) {
%2 = tail call i32 @unlink(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int send(int, char *, int, int /*<<< orphan*/);
int strlen(char *);
int send_msg(int fd, char *msg) {
  int len = strlen(msg);
  if (len = send(fd, msg, len, 0) == -1) {
    perror("send_msg");
  }
  return len;
}


x86 assembly (clang, -O0):
<send_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0xffffffff,%eax
sete   %al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x14(%rbp)
test   $0x1,%al
jne    117a <send_msg+0x4a>
jmp    1186 <send_msg+0x56>
lea    0xe7f(%rip),%rdi
call   1050 <perror@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_msg>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
je     1164 <send_msg+0x34>
xor    %eax,%eax
cmp    $0xffffffff,%ebx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
lea    0xe95(%rip),%rdi
call   1050 <perror@plt>
jmp    1155 <send_msg+0x25>

LLVM IR (-O0):
@.str = [9 x i8] c"send_msg\00"
define i32 @send_msg(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = call i32 @send(i32 %8, i8* %9, i32 %10, i32 0)
%12 = icmp eq i32 %11, -1
%13 = zext i1 %12 to i32
store i32 %13, i32* %5
br i1 %12, label %14, label %16
14: ; preds = %2
%15 = call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %2
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
@.str = [9 x i8] c"send_msg\00"
define i32 @send_msg(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @send(i32 %0, i8* %1, i32 %3, i32 0)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
%9 = zext i1 %5 to i32
ret i32 %9
}
/* Variables and functions */
int changeChannelState(unsigned int, int /*<<< orphan*/);
int disableChannel(unsigned int channel) {
  return changeChannelState(channel, '0');
}


x86 assembly (clang, -O0):
<disableChannel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x30,%esi
call   1030 <changeChannelState@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disableChannel>:
mov    $0x30,%esi
jmp    1030 <changeChannelState@plt>

LLVM IR (-O0):
define i32 @disableChannel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @changeChannelState(i32 %3, i32 48)
ret i32 %4
}

LLVM IR (-O2):
define i32 @disableChannel(i32 %0) {
%2 = tail call i32 @changeChannelState(i32 %0, i32 48)
ret i32 %2
}
double c_to_f(double celsius) { return (celsius * 9.0 / 5.0) + 32; }


x86 assembly (clang, -O0):
<c_to_f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeff(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xed6(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_to_f>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @c_to_f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 9.000000e+00
%5 = fdiv double %4, 5.000000e+00
%6 = fadd double %5, 3.200000e+01
ret double %6
}

LLVM IR (-O2):
define double @c_to_f(double %0) {
%2 = fmul double %0, 9.000000e+00
%3 = fdiv double %2, 5.000000e+00
%4 = fadd double %3, 3.200000e+01
ret double %4
}
void DBGFR3AddrFromFlat(void) {}


x86 assembly (clang, -O0):
<DBGFR3AddrFromFlat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3AddrFromFlat>:
ret

LLVM IR (-O0):
define void @DBGFR3AddrFromFlat() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3AddrFromFlat() {
ret void
}
/* Variables and functions */
float fact(int);
float comb(int n, int r) { return fact(n) / (fact(r) * fact(n - r)); }


x86 assembly (clang, -O0):
<comb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fact@plt>
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <fact@plt>
movss  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <fact@plt>
movss  -0x10(%rbp),%xmm1
movaps %xmm0,%xmm2
movss  -0xc(%rbp),%xmm0
mulss  %xmm2,%xmm1
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comb>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <fact@plt>
movss  %xmm0,0x4(%rsp)
mov    %ebx,%edi
call   1030 <fact@plt>
movss  %xmm0,(%rsp)
sub    %ebx,%ebp
mov    %ebp,%edi
call   1030 <fact@plt>
mulss  (%rsp),%xmm0
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define float @comb(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call float @fact(i32 %5)
%7 = load i32, i32* %4
%8 = call float @fact(i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %9, %10
%12 = call float @fact(i32 %11)
%13 = fmul float %8, %12
%14 = fdiv float %6, %13
ret float %14
}

LLVM IR (-O2):
define float @comb(i32 %0, i32 %1) {
%3 = tail call float @fact(i32 %0)
%4 = tail call float @fact(i32 %1)
%5 = sub nsw i32 %0, %1
%6 = tail call float @fact(i32 %5)
%7 = fmul float %4, %6
%8 = fdiv float %3, %7
ret float %8
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ send_event;
};
struct TYPE_4__ {
  TYPE_1__ xmapping;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xmapping_send_event(void *_p) {
  return (int)((XEvent *)_p)->xmapping.send_event;
}


x86 assembly (clang, -O0):
<get_XEvent_xmapping_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xmapping_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xmapping_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xmapping_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int Abc_TtSuppIsMinBase(int Supp) {
  assert(Supp > 0);
  return (Supp & (Supp + 1)) == 0;
}


x86 assembly (clang, -O0):
<Abc_TtSuppIsMinBase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Abc_TtSuppIsMinBase>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   %ebx,%ebx
setg   %dil
call   1030 <assert@plt>
lea    0x1(%rbx),%ecx
xor    %eax,%eax
test   %ebx,%ecx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Abc_TtSuppIsMinBase(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
%10 = and i32 %7, %9
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @Abc_TtSuppIsMinBase(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = add nsw i32 %0, 1
%6 = and i32 %5, %0
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}