xunge/DecIR huggingface dataset:
void TimerETRConfigure(unsigned long ulBase, unsigned long ulExtTRGPrescaler,
                       unsigned long ulExtTRGPolarity,
                       unsigned long ulExtTRGFilter) {
  unsigned long ulTempsmcr = 0;

  ;

  ;

  ;
  ;
  ulTempsmcr = (*((volatile unsigned long *)(ulBase + 0x00000008)));
  ulTempsmcr &= ~(0x00008000 | 0x00003000 | 0x00000F00);
  ulTempsmcr |= (ulExtTRGPrescaler | ulExtTRGPolarity | (ulExtTRGFilter << 8));
  (*((volatile unsigned long *)(ulBase + 0x00000008))) = ulTempsmcr;
}


x86 assembly (clang, -O0):
<TimerETRConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
and    $0xffffffffffff40ff,%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
or     -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
or     -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerETRConfigure>:
mov    $0xffffffffffff40ff,%rax
and    0x8(%rdi),%rax
or     %rdx,%rsi
shl    $0x8,%rcx
or     %rsi,%rcx
or     %rax,%rcx
mov    %rcx,0x8(%rdi)
ret

LLVM IR (-O0):
define void @TimerETRConfigure(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
store i64 0, i64* %9
%10 = load i64, i64* %5
%11 = add i64 %10, 8
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
store i64 %13, i64* %9
%14 = load i64, i64* %9
%15 = and i64 %14, -48897
store i64 %15, i64* %9
%16 = load i64, i64* %6
%17 = load i64, i64* %7
%18 = or i64 %16, %17
%19 = load i64, i64* %8
%20 = shl i64 %19, 8
%21 = or i64 %18, %20
%22 = load i64, i64* %9
%23 = or i64 %22, %21
store i64 %23, i64* %9
%24 = load i64, i64* %9
%25 = load i64, i64* %5
%26 = add i64 %25, 8
%27 = inttoptr i64 %26 to i64*
store volatile i64 %24, i64* %27
ret void
}

LLVM IR (-O2):
define void @TimerETRConfigure(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = add i64 %0, 8
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = and i64 %7, -48897
%9 = or i64 %2, %1
%10 = shl i64 %3, 8
%11 = or i64 %9, %10
%12 = or i64 %11, %8
store volatile i64 %12, i64* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glmASin3f_(float *);
int /*<<< orphan*/ glmDegrees3f_(float *);
void glmASinD3f_(float x[3]) {
  glmASin3f_(x);
  glmDegrees3f_(x);
}


x86 assembly (clang, -O0):
<glmASinD3f_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <glmASin3f_@plt>
mov    -0x8(%rbp),%rdi
call   1030 <glmDegrees3f_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmASinD3f_>:
push   %rbx
mov    %rdi,%rbx
call   1040 <glmASin3f_@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <glmDegrees3f_@plt>

LLVM IR (-O0):
define void @glmASinD3f_(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @glmASin3f_(float* %3)
%5 = load float*, float** %2
%6 = call i32 @glmDegrees3f_(float* %5)
ret void
}

LLVM IR (-O2):
define void @glmASinD3f_(float* %0) {
%2 = tail call i32 @glmASin3f_(float* %0)
%3 = tail call i32 @glmDegrees3f_(float* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ MYSQL;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ mysql_close(int /*<<< orphan*/ *);
int mysql_errno(int /*<<< orphan*/ *);
char *mysql_error(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, char *, int, char *);
void mysqlErrAndExit(MYSQL *dbconn, char *text) {
  printf("MySQL Error, %s: %u: %s\n", text, mysql_errno(dbconn),
         mysql_error(dbconn));
  mysql_close(dbconn);
  exit(1);
}


x86 assembly (clang, -O0):
<mysqlErrAndExit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mysql_errno@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <mysql_error@plt>
mov    -0x20(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    %rax,%rcx
lea    0xe72(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1050 <mysql_close@plt>
mov    $0x1,%edi
call   1070 <exit@plt>

x86 assembly (clang, -O2):
<mysqlErrAndExit>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <mysql_errno@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1060 <mysql_error@plt>
lea    0xe90(%rip),%rdi
mov    %r14,%rsi
mov    %ebp,%edx
mov    %rax,%rcx
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1050 <mysql_close@plt>
mov    $0x1,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"MySQL Error, %s: %u: %s\0A\00"
define void @mysqlErrAndExit(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32*, i32** %3
%7 = call i32 @mysql_errno(i32* %6)
%8 = load i32*, i32** %3
%9 = call i8* @mysql_error(i32* %8)
%10 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %7, i8* %9)
%11 = load i32*, i32** %3
%12 = call i32 @mysql_close(i32* %11)
%13 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [25 x i8] c"MySQL Error, %s: %u: %s\0A\00"
define void @mysqlErrAndExit(i32* %0, i8* %1) {
%3 = tail call i32 @mysql_errno(i32* %0)
%4 = tail call i8* @mysql_error(i32* %0)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %3, i8* %4)
%6 = tail call i32 @mysql_close(i32* %0)
%7 = tail call i32 @exit(i32 1)
unreachable
}
int clad_maxi(int one, int two) { return (one > two) ? one : two; }


x86 assembly (clang, -O0):
<clad_maxi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <clad_maxi+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <clad_maxi+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clad_maxi>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @clad_maxi(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @clad_maxi(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void c_abort_() { abort(); }


x86 assembly (clang, -O0):
<c_abort_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<c_abort_>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @c_abort_() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @c_abort_() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int alu_teq(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ op_pop();
int op_teq() { return alu_teq(op_pop(), op_pop()); }


x86 assembly (clang, -O0):
<op_teq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <op_pop@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <op_pop@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
call   1030 <alu_teq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_teq>:
push   %rbx
xor    %eax,%eax
call   1040 <op_pop@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <op_pop@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <alu_teq@plt>

LLVM IR (-O0):
define i32 @op_teq() {
%1 = call i32 (...) @op_pop()
%2 = call i32 (...) @op_pop()
%3 = call i32 @alu_teq(i32 %1, i32 %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @op_teq() {
%1 = tail call i32 (...) @op_pop()
%2 = tail call i32 (...) @op_pop()
%3 = tail call i32 @alu_teq(i32 %1, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int /*<<< orphan*/ g(int);
int mult(int /*<<< orphan*/, int /*<<< orphan*/);
int something_else(int i) { return mult(f(i), g(i + 1)); }


x86 assembly (clang, -O0):
<something_else>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1050 <g@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1040 <mult@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<something_else>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <f@plt>
mov    %eax,%ebp
add    $0x1,%ebx
mov    %ebx,%edi
call   1050 <g@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <mult@plt>

LLVM IR (-O0):
define i32 @something_else(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f(i32 %3)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
%7 = call i32 @g(i32 %6)
%8 = call i32 @mult(i32 %4, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @something_else(i32 %0) {
%2 = tail call i32 @f(i32 %0)
%3 = add nsw i32 %0, 1
%4 = tail call i32 @g(i32 %3)
%5 = tail call i32 @mult(i32 %2, i32 %4)
ret i32 %5
}
void foo480() {}


x86 assembly (clang, -O0):
<foo480>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo480>:
ret

LLVM IR (-O0):
define void @foo480() {
ret void
}

LLVM IR (-O2):
define void @foo480() {
ret void
}
int am33xx_bbu_nand_slots_register_handler(const char *name, char **devicefile,
                                           int num_devicefiles) {
  return 0;
}


x86 assembly (clang, -O0):
<am33xx_bbu_nand_slots_register_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<am33xx_bbu_nand_slots_register_handler>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @am33xx_bbu_nand_slots_register_handler(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @am33xx_bbu_nand_slots_register_handler(i8* nocapture readnone %0, i8** nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void tab(int i) {
  for (; i > 0; i--)
    putchar(' ');
}


x86 assembly (clang, -O0):
<tab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113d <tab+0x2d>
mov    $0x20,%edi
call   1030 <putchar@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111b <tab+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tab>:
push   %rbx
test   %edi,%edi
jle    1132 <tab+0x22>
mov    %edi,%ebx
add    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <tab+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @tab(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @putchar(i8 signext 32)
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @tab(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 @putchar(i8 signext 32)
%6 = add nsw i32 %4, -1
%7 = icmp ugt i32 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret void
}
unsigned int hash(register const char *k) {
  register unsigned int h = 0x123;
  while (*k)
    h = *k++ + 509 * h;
  return h;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x123,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113f <hash+0x3f>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
imul   $0x1fd,-0xc(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <hash+0x27>
add    $0x1,%rdi
mov    $0x123,%eax
nop
movsbl %cl,%ecx
imul   $0x1fd,%eax,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
mov    $0x123,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 291, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = load i32, i32* %3
%14 = mul i32 509, %13
%15 = add i32 %12, %14
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 291, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = sext i8 %5 to i32
%10 = mul i32 %6, 509
%11 = add i32 %10, %9
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 291, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ ICPrintParents();
int main(int argc, const char *argv[]) {
  ICPrintParents();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <ICPrintParents@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <ICPrintParents@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @ICPrintParents()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @ICPrintParents()
ret i32 0
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int getppid_of(int);
int is_child_of(pid_t child_pid, pid_t parent_pid) {
  int ppid = child_pid;
  while (ppid > 1 && ppid != parent_pid) {
    ppid = getppid_of(ppid);
  }
  return ppid == parent_pid;
}


x86 assembly (clang, -O0):
<is_child_of>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    113f <is_child_of+0x2f>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    114f <is_child_of+0x3f>
jmp    115f <is_child_of+0x4f>
mov    -0xc(%rbp),%edi
call   1030 <getppid_of@plt>
mov    %eax,-0xc(%rbp)
jmp    1124 <is_child_of+0x14>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_child_of>:
push   %rbx
mov    %esi,%ebx
mov    %edi,%eax
cmp    $0x2,%edi
jl     1130 <is_child_of+0x20>
nopw   0x0(%rax,%rax,1)
cmp    %ebx,%eax
je     1130 <is_child_of+0x20>
mov    %eax,%edi
call   1030 <getppid_of@plt>
cmp    $0x2,%eax
jge    1120 <is_child_of+0x10>
xor    %ecx,%ecx
cmp    %ebx,%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_child_of(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
br label %7
7: ; preds = %16, %2
%8 = load i32, i32* %5
%9 = icmp sgt i32 %8, 1
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = icmp ne i32 %11, %12
br label %14
14: ; preds = %10, %7
%15 = phi i1 [ false, %7 ], [ %13, %10 ]
br i1 %15, label %16, label %19
16: ; preds = %14
%17 = load i32, i32* %5
%18 = call i32 @getppid_of(i32 %17)
store i32 %18, i32* %5
br label %7
19: ; preds = %14
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = icmp eq i32 %20, %21
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @is_child_of(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 1
%4 = icmp ne i32 %0, %1
%5 = and i1 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %2, %6
%7 = phi i32 [ %8, %6 ], [ %0, %2 ]
%8 = tail call i32 @getppid_of(i32 %7)
%9 = icmp sgt i32 %8, 1
%10 = icmp ne i32 %8, %1
%11 = and i1 %9, %10
br i1 %11, label %6, label %12
12: ; preds = %6, %2
%13 = phi i32 [ %0, %2 ], [ %8, %6 ]
%14 = icmp eq i32 %13, %1
%15 = zext i1 %14 to i32
ret i32 %15
}
int test_imm_DFint32_mem(int *val) {
  return ((*val) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xdf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFint32_mem>:
testb  $0xdf,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 223
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DFint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 223
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int getchar();
int myfunction() {
  int number = 0;
  int c = getchar();
  while (c != '\n') {
    number = 10 * number + (c - '0');
    c = getchar();
  }
  return number;
}


x86 assembly (clang, -O0):
<myfunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
je     1151 <myfunction+0x41>
imul   $0xa,-0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,-0x8(%rbp)
jmp    1129 <myfunction+0x19>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myfunction>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%eax
je     1145 <myfunction+0x35>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    (%rbx,%rbx,4),%ecx
lea    (%rax,%rcx,2),%ebx
add    $0xffffffd0,%ebx
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%eax
jne    1130 <myfunction+0x20>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @myfunction() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @getchar()
store i32 %3, i32* %2
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %1
%9 = mul nsw i32 10, %8
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 48
%12 = add nsw i32 %9, %11
store i32 %12, i32* %1
%13 = call i32 (...) @getchar()
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @myfunction() {
%1 = tail call i32 (...) @getchar()
%2 = icmp eq i32 %1, 10
br i1 %2, label %11, label %3
3: ; preds = %0, %3
%4 = phi i32 [ %9, %3 ], [ %1, %0 ]
%5 = phi i32 [ %8, %3 ], [ 0, %0 ]
%6 = mul nsw i32 %5, 10
%7 = add nsw i32 %4, -48
%8 = add nsw i32 %7, %6
%9 = tail call i32 (...) @getchar()
%10 = icmp eq i32 %9, 10
br i1 %10, label %11, label %3
11: ; preds = %3, %0
%12 = phi i32 [ 0, %0 ], [ %8, %3 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: pathchk [-p] pathname ...\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"usage: pathchk [-p] pathname ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"usage: pathchk [-p] pathname ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ XEvent;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ do_ButtonPress(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void do_ButtonRelease(FILE *out_f, XEvent *eventp) {
  do_ButtonPress(out_f, eventp);
}


x86 assembly (clang, -O0):
<do_ButtonRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <do_ButtonPress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_ButtonRelease>:
jmp    1030 <do_ButtonPress@plt>

LLVM IR (-O0):
define void @do_ButtonRelease(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @do_ButtonPress(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @do_ButtonRelease(i32* %0, i32* %1) {
%3 = tail call i32 @do_ButtonPress(i32* %0, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ a(int, int, int, int, int);
int main(int argc, char **argv) {
  a(5, 3, 4, 5, 6);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x5,%ecx
mov    $0x3,%esi
mov    $0x4,%edx
mov    $0x6,%r8d
mov    %ecx,%edi
call   1030 <a@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x3,%esi
mov    $0x4,%edx
mov    $0x5,%ecx
mov    $0x6,%r8d
call   1030 <a@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @a(i32 5, i32 3, i32 4, i32 5, i32 6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @a(i32 5, i32 3, i32 4, i32 5, i32 6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_init(int, char **);
int /*<<< orphan*/ test_msg(char *, char *, int);
int main(int argc, char *argv[]) {
  test_init(argc, argv);
  test_msg("SKIP: %s:%d: "
           "This test is supposed to run on an ARM machine!"
           "\n",
           "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
           "2022-01-22/02-19-57/repos/AuthenticEshkinKot/criu/refs/heads/"
           "master/test/zdtm/live/static/arm-neon00.c",
           63);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <test_init@plt>
lea    0xeb7(%rip),%rdi
lea    0xeee(%rip),%rsi
mov    $0x3f,%edx
call   1040 <test_msg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <test_init@plt>
lea    0xed3(%rip),%rdi
lea    0xf0a(%rip),%rsi
mov    $0x3f,%edx
call   1040 <test_msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [62 x i8] c"SKIP: %s:%d: This test is supposed to run on an ARM machine!\0A\00"
@.str.1 = [167 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AuthenticEshkinKot/criu/refs/heads/master/test/zdtm/live/static/arm-neon00.c\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @test_init(i32 %6, i8** %7)
%9 = call i32 @test_msg(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([167 x i8], [167 x i8]* @.str.1, i64 0, i64 0), i32 63)
ret i32 0
}

LLVM IR (-O2):
@.str = [62 x i8] c"SKIP: %s:%d: This test is supposed to run on an ARM machine!\0A\00"
@.str.1 = [167 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AuthenticEshkinKot/criu/refs/heads/master/test/zdtm/live/static/arm-neon00.c\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @test_init(i32 %0, i8** %1)
%4 = tail call i32 @test_msg(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([167 x i8], [167 x i8]* @.str.1, i64 0, i64 0), i32 63)
ret i32 0
}
const char *ls_costN_nm5_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<ls_costN_nm5_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <ls_costN_nm5_name_out+0x2b>
jmp    111a <ls_costN_nm5_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <ls_costN_nm5_name_out+0x3b>
jmp    114b <ls_costN_nm5_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <ls_costN_nm5_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <ls_costN_nm5_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm5_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @ls_costN_nm5_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @ls_costN_nm5_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ get_input_arguments(double *, double *, double *);
double newtons_method(double, double, double);
int main(void) {
  double x_0, error_tol, max_iters, result;
  get_input_arguments(&x_0, &error_tol, &max_iters);
  result = newtons_method(x_0, error_tol, max_iters);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1040 <get_input_arguments@plt>
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm2
call   1030 <newtons_method@plt>
movsd  %xmm0,-0x28(%rbp)
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <get_input_arguments@plt>
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
movsd  (%rsp),%xmm2
call   1030 <newtons_method@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
store i32 0, i32* %1
%6 = call i32 @get_input_arguments(double* %2, double* %3, double* %4)
%7 = load double, double* %2
%8 = load double, double* %3
%9 = load double, double* %4
%10 = call double @newtons_method(double %7, double %8, double %9)
store double %10, double* %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca double
%2 = alloca double
%3 = alloca double
%4 = bitcast double* %1 to i8*
%5 = bitcast double* %2 to i8*
%6 = bitcast double* %3 to i8*
%7 = call i32 @get_input_arguments(double* %1, double* %2, double* %3)
%8 = load double, double* %1
%9 = load double, double* %2
%10 = load double, double* %3
%11 = call double @newtons_method(double %8, double %9, double %10)
ret i32 0
}
void printk(char *fmt, ...) {
  int *ct;
  ct = (getarg() * 2) + &fmt - 4;
  printk1(*ct, ct - 1);
}


x86 assembly (clang, -O0):
<printk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %al,-0x11(%rbp)
call   1030 <getarg@plt>
mov    %eax,%ecx
mov    -0x11(%rbp),%al
add    %ecx,%ecx
movslq %ecx,%rcx
lea    -0x28(%rbp,%rcx,8),%rcx
mov    %rcx,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    (%rsi),%edi
add    $0xfffffffffffffffc,%rsi
call   1040 <printk1@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printk>:
push   %rax
mov    %rdi,(%rsp)
xor    %eax,%eax
call   1030 <getarg@plt>
add    %eax,%eax
cltq
mov    -0x20(%rsp,%rax,8),%edi
lea    (%rsp,%rax,8),%rsi
add    $0xffffffffffffffdc,%rsi
xor    %eax,%eax
call   1040 <printk1@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @printk(i8* %0, ...) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = call i32 (...) @getarg()
%5 = mul nsw i32 %4, 2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8*, i8** %2, i64 %6
%8 = getelementptr inbounds i8*, i8** %7, i64 -4
%9 = bitcast i8** %8 to i32*
store i32* %9, i32** %3
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 -1
%14 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @printk1 to i32 (i32, i32*, ...)*)(i32 %11, i32* %13)
ret void
}

LLVM IR (-O2):
define void @printk(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = tail call i32 (...) @getarg()
%4 = shl nsw i32 %3, 1
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8*, i8** %2, i64 %5
%7 = getelementptr inbounds i8*, i8** %6, i64 -4
%8 = bitcast i8** %7 to i32*
%9 = load i32, i32* %8
%10 = getelementptr inbounds i32, i32* %8, i64 -1
%11 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @printk1 to i32 (i32, i32*, ...)*)(i32 %9, i32* %10)
ret void
}
/* Type definitions */
struct queue {
  int dummy;
};
struct el {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ printf(char *);
int q_push_error(struct el *e, struct queue *q) {
  printf("q_push_error()\n");
  abort();
}


x86 assembly (clang, -O0):
<q_push_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec9(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<q_push_error>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
%struct.el = type { i32 }
%struct.queue = type { i32 }
@.str = [16 x i8] c"q_push_error()\0A\00"
define i32 @q_push_error(%struct.el* %0, %struct.queue* %1) {
%3 = alloca %struct.el*
%4 = alloca %struct.queue*
store %struct.el* %0, %struct.el** %3
store %struct.queue* %1, %struct.queue** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
%struct.el = type { i32 }
%struct.queue = type { i32 }
@str = [15 x i8] c"q_push_error()\00"
define i32 @q_push_error(%struct.el* nocapture readnone %0, %struct.queue* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
bool divideA(unsigned long long num1, unsigned long long num2) {
  return (num1 % num2 == 0);
}


x86 assembly (clang, -O0):
<divideA>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
cmp    $0x0,%rdx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divideA>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1116 <divideA+0x16>
xor    %edx,%edx
div    %rsi
jmp    111a <divideA+0x1a>
xor    %edx,%edx
div    %esi
xor    %eax,%eax
test   %rdx,%rdx
sete   %al
ret

LLVM IR (-O0):
define i32 @divideA(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = urem i64 %5, %6
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @divideA(i64 %0, i64 %1) {
%3 = urem i64 %0, %1
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
struct ffs_chain_t {
  int dummy;
};

/* Variables and functions */
int find_next_entry(int, struct ffs_chain_t *);
int read_config(int conf_file, struct ffs_chain_t *ffs_chain) {
  int rc;
  while (1) {
    rc = find_next_entry(conf_file, ffs_chain);
    if (rc != 0)
      break;
  }
  return rc;
}


x86 assembly (clang, -O0):
<read_config>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <find_next_entry@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     113d <read_config+0x2d>
jmp    1142 <read_config+0x32>
jmp    111f <read_config+0xf>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_config>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %rbx,%rsi
call   1030 <find_next_entry@plt>
test   %eax,%eax
je     1120 <read_config+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.ffs_chain_t = type { i32 }
define i32 @read_config(i32 %0, %struct.ffs_chain_t* %1) {
%3 = alloca i32
%4 = alloca %struct.ffs_chain_t*
%5 = alloca i32
store i32 %0, i32* %3
store %struct.ffs_chain_t* %1, %struct.ffs_chain_t** %4
br label %6
6: ; preds = %2, %13
%7 = load i32, i32* %3
%8 = load %struct.ffs_chain_t*, %struct.ffs_chain_t** %4
%9 = call i32 @find_next_entry(i32 %7, %struct.ffs_chain_t* %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %6
br label %14
13: ; preds = %6
br label %6
14: ; preds = %12
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
%struct.ffs_chain_t = type { i32 }
define i32 @read_config(i32 %0, %struct.ffs_chain_t* %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @find_next_entry(i32 %0, %struct.ffs_chain_t* %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %3, label %6
6: ; preds = %3
ret i32 %4
}
char *longopts_arg(char *option) {
  for (; *option && *option != '='; option++)
    ;
  if (*option == '=')
    return option + 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<longopts_arg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     112d <longopts_arg+0x2d>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x3d,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    113d <longopts_arg+0x3d>
jmp    1153 <longopts_arg+0x53>
jmp    1142 <longopts_arg+0x42>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <longopts_arg+0x8>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x3d,%eax
jne    1174 <longopts_arg+0x74>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    117c <longopts_arg+0x7c>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longopts_arg>:
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl -0x1(%rdi),%ecx
test   %cl,%cl
je     1123 <longopts_arg+0x23>
cmp    $0x3d,%cl
je     1123 <longopts_arg+0x23>
add    $0x1,%rdi
jmp    1110 <longopts_arg+0x10>
xor    %eax,%eax
cmp    $0x3d,%cl
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i8* @longopts_arg(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 61
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %20
16: ; preds = %14
br label %17
17: ; preds = %16
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %4
20: ; preds = %14
%21 = load i8*, i8** %3
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %23, 61
br i1 %24, label %25, label %28
25: ; preds = %20
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i64 1
store i8* %27, i8** %2
br label %29
28: ; preds = %20
store i8* null, i8** %2
br label %29
29: ; preds = %28, %25
%30 = load i8*, i8** %2
ret i8* %30
}

LLVM IR (-O2):
define i8* @longopts_arg(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %7
i8 61, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2
%8 = icmp eq i8 %4, 61
%9 = getelementptr inbounds i8, i8* %3, i64 1
%10 = select i1 %8, i8* %9, i8* null
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ attr_delete(void *);
void attr_delete_cb(void *self) { attr_delete(self); }


x86 assembly (clang, -O0):
<attr_delete_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <attr_delete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<attr_delete_cb>:
jmp    1030 <attr_delete@plt>

LLVM IR (-O0):
define void @attr_delete_cb(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @attr_delete(i8* %3)
ret void
}

LLVM IR (-O2):
define void @attr_delete_cb(i8* %0) {
%2 = tail call i32 @attr_delete(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fabs(double);
double lr_round_half_up(int /*<<< orphan*/, double);
double lr_round_half_up0(double value, double rf) {
  double result;
  result = lr_round_half_up(fabs(value), rf);
  if (value < 0.0)
    return -result;
  return result;
}


x86 assembly (clang, -O0):
<lr_round_half_up0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
mov    %eax,%edi
movsd  -0x18(%rbp),%xmm0
call   1040 <lr_round_half_up@plt>
movsd  %xmm0,-0x20(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1181 <lr_round_half_up0+0x61>
movsd  -0x20(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118b <lr_round_half_up0+0x6b>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lr_round_half_up0>:
sub    $0x28,%rsp
movsd  %xmm1,0x8(%rsp)
movaps %xmm0,0x10(%rsp)
call   1030 <fabs@plt>
mov    %eax,%edi
movsd  0x8(%rsp),%xmm0
call   1040 <lr_round_half_up@plt>
movapd 0xeb7(%rip),%xmm1
xorpd  %xmm0,%xmm1
xorpd  %xmm2,%xmm2
movapd 0x10(%rsp),%xmm3
cmpltsd %xmm2,%xmm3
movapd %xmm3,%xmm2
andnpd %xmm0,%xmm2
andpd  %xmm1,%xmm3
orpd   %xmm2,%xmm3
movapd %xmm3,%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @lr_round_half_up0(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
%7 = load double, double* %4
%8 = call i32 @fabs(double %7)
%9 = load double, double* %5
%10 = call double @lr_round_half_up(i32 %8, double %9)
store double %10, double* %6
%11 = load double, double* %4
%12 = fcmp olt double %11, 0.000000e+00
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = load double, double* %6
%15 = fneg double %14
store double %15, double* %3
br label %18
16: ; preds = %2
%17 = load double, double* %6
store double %17, double* %3
br label %18
18: ; preds = %16, %13
%19 = load double, double* %3
ret double %19
}

LLVM IR (-O2):
define double @lr_round_half_up0(double %0, double %1) {
%3 = tail call i32 @fabs(double %0)
%4 = tail call double @lr_round_half_up(i32 %3, double %1)
%5 = fcmp olt double %0, 0.000000e+00
%6 = fneg double %4
%7 = select i1 %5, double %6, double %4
ret double %7
}
/* Variables and functions */
int bar(int, char **);
int baz(int, char **);
int foo(int x, char *y) {
  int a;
  char *b = y;
  a = bar(x, &y);
  if (a) {
    y = b;
    a = baz(x, &y);
  }
  if (a)
    return a;
  baz(x, &y);
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1040 <bar@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1167 <foo+0x47>
mov    -0x20(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1030 <baz@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     117c <foo+0x5c>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    118f <foo+0x6f>
mov    -0x8(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1030 <baz@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,(%rsp)
mov    %rsp,%rsi
call   1040 <bar@plt>
test   %eax,%eax
je     114a <foo+0x2a>
mov    %rbx,(%rsp)
mov    %rsp,%rsi
mov    %ebp,%edi
call   1030 <baz@plt>
test   %eax,%eax
jne    1156 <foo+0x36>
mov    %rsp,%rsi
mov    %ebp,%edi
call   1030 <baz@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%8 = load i8*, i8** %5
store i8* %8, i8** %7
%9 = load i32, i32* %4
%10 = call i32 @bar(i32 %9, i8** %5)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i8*, i8** %7
store i8* %14, i8** %5
%15 = load i32, i32* %4
%16 = call i32 @baz(i32 %15, i8** %5)
store i32 %16, i32* %6
br label %17
17: ; preds = %13, %2
%18 = load i32, i32* %6
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = load i32, i32* %6
store i32 %21, i32* %3
br label %25
22: ; preds = %17
%23 = load i32, i32* %4
%24 = call i32 @baz(i32 %23, i8** %5)
store i32 0, i32* %3
br label %25
25: ; preds = %22, %20
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i8* %1) {
%3 = alloca i8*
store i8* %1, i8** %3
%4 = call i32 @bar(i32 %0, i8** %3)
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
store i8* %1, i8** %3
%7 = call i32 @baz(i32 %0, i8** %3)
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2, %6
%10 = call i32 @baz(i32 %0, i8** %3)
br label %11
11: ; preds = %6, %9
%12 = phi i32 [ 0, %9 ], [ %7, %6 ]
ret i32 %12
}
/* Variables and functions */
scalar_t__ islower(int);
int toupper(int c) {
  if (islower(c))
    return c & (~0x20 & 0x7F);
  return c;
}


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     113b <toupper+0x2b>
mov    -0x8(%rbp),%eax
and    $0x5f,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <toupper+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
mov    %ebx,%ecx
and    $0x5f,%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @islower(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = and i32 %8, 95
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = and i32 %0, 95
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
int test_imm_5Buint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x5B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Buint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x5b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Buint64_lowword_reg>:
test   $0x5b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Buint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 91
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Buint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 91
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}