xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ realloc(char *, unsigned int);
char *TclpRealloc(char *cp, unsigned int nbytes) {
  return (char *)realloc(cp, nbytes);
}


x86 assembly (clang, -O0):
<TclpRealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TclpRealloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @TclpRealloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @realloc(i8* %5, i32 %6)
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @TclpRealloc(i8* %0, i32 %1) {
%3 = tail call i64 @realloc(i8* %0, i32 %1)
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
int min(const int a, const int b) { return ((a < b) ? a : b); }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void debug_print(const char *s) {
  while (*s) {
    (*((volatile char *)0x20)) = *s;
    s++;
  }
}


x86 assembly (clang, -O0):
<debug_print>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1133 <debug_print+0x33>
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    $0x20,%eax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <debug_print+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_print>:
mov    (%rdi),%al
test   %al,%al
je     1122 <debug_print+0x22>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
mov    %al,0x20
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <debug_print+0x10>
ret

LLVM IR (-O0):
define void @debug_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
store volatile i8 %9, i8* inttoptr (i64 32 to i8*)
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
br label %3
12: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @debug_print(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %8, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
store volatile i8 %5, i8* inttoptr (i64 32 to i8*)
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %10, label %4
10: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rnd_avg64(uint64_t a, uint64_t b) {
  return (a | b) - (((a ^ b) & ~((0x01) * 0x0001000100010001UL)) >> 1);
}


x86 assembly (clang, -O0):
<rnd_avg64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
cltq
mov    -0x4(%rbp),%ecx
xor    -0x8(%rbp),%ecx
movslq %ecx,%rcx
movabs $0xfffefffefffefffe,%rdx
ff fe ff
and    %rdx,%rcx
shr    $0x1,%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd_avg64>:
mov    %esi,%eax
or     %edi,%eax
xor    %edi,%esi
shr    %esi
and    $0x7fff7fff,%esi
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @rnd_avg64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = or i32 %5, %6
%8 = sext i32 %7 to i64
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = xor i32 %9, %10
%12 = sext i32 %11 to i64
%13 = and i64 %12, -281479271743490
%14 = lshr i64 %13, 1
%15 = sub i64 %8, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @rnd_avg64(i32 %0, i32 %1) {
%3 = or i32 %1, %0
%4 = xor i32 %1, %0
%5 = lshr i32 %4, 1
%6 = and i32 %5, 2147450879
%7 = sub i32 %3, %6
ret i32 %7
}
int getuid() { return (0); }


x86 assembly (clang, -O0):
<getuid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getuid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @getuid() {
ret i32 0
}
/* Variables and functions */
int ad_turn_on(int, int, int);
int cmd_open_dev(int dev, int subdev) { return ad_turn_on(1, dev, subdev); }


x86 assembly (clang, -O0):
<cmd_open_dev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x1,%edi
call   1030 <ad_turn_on@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_open_dev>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <ad_turn_on@plt>

LLVM IR (-O0):
define i32 @cmd_open_dev(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ad_turn_on(i32 1, i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cmd_open_dev(i32 %0, i32 %1) {
%3 = tail call i32 @ad_turn_on(i32 1, i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int getc(int /*<<< orphan*/ *);
unsigned short getshort(FILE *f) {
  unsigned short ret;
  ret = getc(f);
  ret = ret | (getc(f) << 8);
  return ret;
}


x86 assembly (clang, -O0):
<getshort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
shl    $0x8,%ecx
or     %ecx,%eax
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getshort>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <getc@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <getc@plt>
shl    $0x8,%eax
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i16 @getshort(i32* %0) {
%2 = alloca i32*
%3 = alloca i16
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @getc(i32* %4)
%6 = trunc i32 %5 to i16
store i16 %6, i16* %3
%7 = load i16, i16* %3
%8 = zext i16 %7 to i32
%9 = load i32*, i32** %2
%10 = call i32 @getc(i32* %9)
%11 = shl i32 %10, 8
%12 = or i32 %8, %11
%13 = trunc i32 %12 to i16
store i16 %13, i16* %3
%14 = load i16, i16* %3
ret i16 %14
}

LLVM IR (-O2):
define zeroext i16 @getshort(i32* nocapture %0) {
%2 = tail call i32 @getc(i32* %0)
%3 = tail call i32 @getc(i32* %0)
%4 = shl i32 %3, 8
%5 = or i32 %4, %2
%6 = trunc i32 %5 to i16
ret i16 %6
}
/* Variables and functions */
int /*<<< orphan*/ Msp430TimerP__1__Timer__overflow();
void Msp430TimerP__1__Overflow__fired(void) {
  Msp430TimerP__1__Timer__overflow();
}


x86 assembly (clang, -O0):
<Msp430TimerP__1__Overflow__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430TimerP__1__Timer__overflow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430TimerP__1__Overflow__fired>:
xor    %eax,%eax
jmp    1030 <Msp430TimerP__1__Timer__overflow@plt>

LLVM IR (-O0):
define void @Msp430TimerP__1__Overflow__fired() {
%1 = call i32 (...) @Msp430TimerP__1__Timer__overflow()
ret void
}

LLVM IR (-O2):
define void @Msp430TimerP__1__Overflow__fired() {
%1 = tail call i32 (...) @Msp430TimerP__1__Timer__overflow()
ret void
}
const char *RC4_options(void) {
  if (sizeof(unsigned int) == 1)
    return ("rc4(ptr,char)");
  else
    return ("rc4(ptr,int)");
}


x86 assembly (clang, -O0):
<RC4_options>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RC4_options>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [13 x i8] c"rc4(ptr,int)\00"
define i8* @RC4_options() {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [13 x i8] c"rc4(ptr,int)\00"
define i8* @RC4_options() {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ msm_arch_idle();
void arch_idle(void) { msm_arch_idle(); }


x86 assembly (clang, -O0):
<arch_idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <msm_arch_idle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_idle>:
xor    %eax,%eax
jmp    1030 <msm_arch_idle@plt>

LLVM IR (-O0):
define void @arch_idle() {
%1 = call i32 (...) @msm_arch_idle()
ret void
}

LLVM IR (-O2):
define void @arch_idle() {
%1 = tail call i32 (...) @msm_arch_idle()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int _close(int32_t file) { return -1; }


x86 assembly (clang, -O0):
<_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_close>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @_close(i32 %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ reset_mark();
int /*<<< orphan*/ reset_queues();
void Reset_Flood() {
  reset_mark();
  reset_queues();
}


x86 assembly (clang, -O0):
<Reset_Flood>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <reset_mark@plt>
mov    $0x0,%al
call   1040 <reset_queues@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reset_Flood>:
push   %rax
xor    %eax,%eax
call   1030 <reset_mark@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <reset_queues@plt>

LLVM IR (-O0):
define void @Reset_Flood() {
%1 = call i32 (...) @reset_mark()
%2 = call i32 (...) @reset_queues()
ret void
}

LLVM IR (-O2):
define void @Reset_Flood() {
%1 = tail call i32 (...) @reset_mark()
%2 = tail call i32 (...) @reset_queues()
ret void
}
/* Variables and functions */
int main_plambda(int, char **);
int main(int c, char **v) { return main_plambda(c, v); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <main_plambda@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <main_plambda@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @main_plambda(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @main_plambda(i32 %0, i8** %1)
ret i32 %3
}
void smc_insl(unsigned int addr, void *vbuf, unsigned long len) {
  volatile unsigned long *rp;
  unsigned long *buf, *ebuf;
  buf = (unsigned long *)vbuf;
  rp = (volatile unsigned long *)addr;
  for (ebuf = buf + len; (buf < ebuf);)
    *buf++ = *rp;
}


x86 assembly (clang, -O0):
<smc_insl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
mov    -0x18(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x30(%rbp),%rax
jae    115d <smc_insl+0x5d>
mov    -0x20(%rbp),%rax
mov    (%rax),%rcx
mov    -0x28(%rbp),%rax
mov    %rax,%rdx
add    $0x8,%rdx
mov    %rdx,-0x28(%rbp)
mov    %rcx,(%rax)
jmp    1131 <smc_insl+0x31>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smc_insl>:
lea    (%rsi,%rdx,8),%rax
cmp    %rsi,%rax
jbe    111f <smc_insl+0x1f>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    (%rcx),%rdx
mov    %rdx,(%rsi)
add    $0x8,%rsi
cmp    %rax,%rsi
jb     1110 <smc_insl+0x10>
ret

LLVM IR (-O0):
define void @smc_insl(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64*
%8 = alloca i64*
%9 = alloca i64*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i64*
store i64* %11, i64** %8
%12 = load i32, i32* %4
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i64*
store i64* %14, i64** %7
%15 = load i64*, i64** %8
%16 = load i64, i64* %6
%17 = getelementptr inbounds i64, i64* %15, i64 %16
store i64* %17, i64** %9
br label %18
18: ; preds = %22, %3
%19 = load i64*, i64** %8
%20 = load i64*, i64** %9
%21 = icmp ult i64* %19, %20
br i1 %21, label %22, label %27
22: ; preds = %18
%23 = load i64*, i64** %7
%24 = load volatile i64, i64* %23
%25 = load i64*, i64** %8
%26 = getelementptr inbounds i64, i64* %25, i32 1
store i64* %26, i64** %8
store i64 %24, i64* %25
br label %18
27: ; preds = %18
ret void
}

LLVM IR (-O2):
define void @smc_insl(i32 %0, i8* writeonly %1, i64 %2) {
%4 = bitcast i8* %1 to i64*
%5 = zext i32 %0 to i64
%6 = inttoptr i64 %5 to i64*
%7 = getelementptr inbounds i64, i64* %4, i64 %2
%8 = icmp ugt i64* %7, %4
br i1 %8, label %9, label %14
9: ; preds = %3, %9
%10 = phi i64* [ %12, %9 ], [ %4, %3 ]
%11 = load volatile i64, i64* %6
%12 = getelementptr inbounds i64, i64* %10, i64 1
store i64 %11, i64* %10
%13 = icmp ult i64* %12, %7
br i1 %13, label %9, label %14
14: ; preds = %9, %3
ret void
}
void set_bit(unsigned long bit, unsigned long *b) {
  (b)[bit / (8 * sizeof(long))] |= (1 << (bit % (8 * sizeof(long))));
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0x3f,%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x6,%rcx
or     (%rax,%rcx,8),%rdx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
mov    %rdi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
cltq
shr    $0x6,%rcx
or     %rax,(%rsi,%rcx,8)
ret

LLVM IR (-O0):
define void @set_bit(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
%5 = load i64, i64* %3
%6 = urem i64 %5, 64
%7 = trunc i64 %6 to i32
%8 = shl i32 1, %7
%9 = sext i32 %8 to i64
%10 = load i64*, i64** %4
%11 = load i64, i64* %3
%12 = udiv i64 %11, 64
%13 = getelementptr inbounds i64, i64* %10, i64 %12
%14 = load i64, i64* %13
%15 = or i64 %14, %9
store i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @set_bit(i64 %0, i64* nocapture %1) {
%3 = trunc i64 %0 to i32
%4 = and i32 %3, 63
%5 = shl nuw i32 1, %4
%6 = sext i32 %5 to i64
%7 = lshr i64 %0, 6
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = load i64, i64* %8
%10 = or i64 %9, %6
store i64 %10, i64* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nlTransition(int, int);
void nlEndSystem() { nlTransition(4, 5); }


x86 assembly (clang, -O0):
<nlEndSystem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
mov    $0x5,%esi
call   1030 <nlTransition@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nlEndSystem>:
mov    $0x4,%edi
mov    $0x5,%esi
jmp    1030 <nlTransition@plt>

LLVM IR (-O0):
define void @nlEndSystem() {
%1 = call i32 @nlTransition(i32 4, i32 5)
ret void
}

LLVM IR (-O2):
define void @nlEndSystem() {
%1 = tail call i32 @nlTransition(i32 4, i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
int /*<<< orphan*/ ft_putstr(char const *);
void ft_putendl(const char *s) {
  ft_putstr(s);
  ft_putchar('\n');
}


x86 assembly (clang, -O0):
<ft_putendl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_putstr@plt>
mov    $0xa,%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl>:
push   %rax
call   1040 <ft_putstr@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_putendl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ft_putstr(i8* %3)
%5 = call i32 @ft_putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @ft_putendl(i8* %0) {
%2 = tail call i32 @ft_putstr(i8* %0)
%3 = tail call i32 @ft_putchar(i8 signext 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
double roundInt(float);
void main() {
  float a[1];
  int temp;
  a[0] = -12.5;
  assert(roundInt(a[0]) == -12.0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xed8(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <roundInt@plt>
movsd  0xeb9(%rip),%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movss  0xed7(%rip),%xmm0
call   1040 <roundInt@plt>
cmpeqsd 0xed1(%rip),%xmm0
movq   %xmm0,%rdi
and    $0x1,%edi
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca [1 x float]
%2 = alloca i32
%3 = getelementptr inbounds [1 x float], [1 x float]* %1, i64 0, i64 0
store float -1.250000e+01, float* %3
%4 = getelementptr inbounds [1 x float], [1 x float]* %1, i64 0, i64 0
%5 = load float, float* %4
%6 = call double @roundInt(float %5)
%7 = fcmp oeq double %6, -1.200000e+01
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call double @roundInt(float -1.250000e+01)
%2 = fcmp oeq double %1, -1.200000e+01
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}
/* Variables and functions */
bool is_bindigit(int c) {
  if (c == '0' || c == '1') {
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<is_bindigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
je     111b <is_bindigit+0x1b>
cmpl   $0x31,-0x8(%rbp)
jne    1127 <is_bindigit+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <is_bindigit+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_bindigit>:
and    $0xfffffffe,%edi
xor    %eax,%eax
cmp    $0x30,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_bindigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 48
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 49
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %11
10: ; preds = %6
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_bindigit(i32 %0) {
%2 = and i32 %0, -2
%3 = icmp eq i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int div(int, int);
int compute_volume(int rad) {
  int rad3 = rad * rad * rad;
  return div(4 * 355 * rad3, 3 * 113);
}


x86 assembly (clang, -O0):
<compute_volume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x58c,-0x8(%rbp),%edi
mov    $0x153,%esi
call   1030 <div@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_volume>:
mov    %edi,%eax
imul   %edi,%eax
imul   %edi,%eax
imul   $0x58c,%eax,%edi
mov    $0x153,%esi
jmp    1030 <div@plt>

LLVM IR (-O0):
define i32 @compute_volume(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
%7 = load i32, i32* %2
%8 = mul nsw i32 %6, %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = mul nsw i32 1420, %9
%11 = call i32 @div(i32 %10, i32 339)
ret i32 %11
}

LLVM IR (-O2):
define i32 @compute_volume(i32 %0) {
%2 = mul i32 %0, 1420
%3 = mul i32 %2, %0
%4 = mul i32 %3, %0
%5 = tail call i32 @div(i32 %4, i32 339)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ assume(int);
int main() {
  int xa;
  int ya;
  assume(xa + ya > 0);
  while (xa > 0) {
    xa--;
    ya++;
  }
  assert(ya >= 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0x0,%eax
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assume@plt>
cmpl   $0x0,-0x8(%rbp)
jle    1166 <main+0x46>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1145 <main+0x25>
cmpl   $0x0,-0xc(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <assume@plt>
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = add nsw i32 %4, %5
%7 = icmp sgt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = call i32 @assume(i32 %8)
br label %10
10: ; preds = %13, %0
%11 = load i32, i32* %2
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %10
%14 = load i32, i32* %2
%15 = add nsw i32 %14, -1
store i32 %15, i32* %2
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %10
18: ; preds = %10
%19 = load i32, i32* %3
%20 = icmp sge i32 %19, 0
%21 = zext i1 %20 to i32
%22 = call i32 @assert(i32 %21)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assume(i32 0)
%2 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t gfmul(uint8_t a, uint8_t b) {
  uint8_t v = 0;
  while (b) {
    if (b & 1) {
      v ^= a;
    }
    a = (a << 1) ^ (a & 0x80 ? 0x1d : 0);
    b >>= 1;
  }
  return v;
}


x86 assembly (clang, -O0):
<gfmul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1162 <gfmul+0x62>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1133 <gfmul+0x33>
mov    -0x4(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%esi
and    $0x80,%esi
xor    %ecx,%ecx
mov    $0x1d,%edx
cmp    $0x0,%esi
cmovne %edx,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1111 <gfmul+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfmul>:
xor    %eax,%eax
test   %esi,%esi
je     1133 <gfmul+0x33>
mov    %esi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %esi,%edx
and    $0x1,%edx
neg    %edx
and    %edi,%edx
xor    %edx,%eax
lea    (%rdi,%rdi,1),%edx
movsbl %dil,%edi
shr    $0x7,%edi
and    $0x1d,%edi
xor    %edx,%edi
sar    %ecx
cmp    $0x1,%esi
mov    %ecx,%esi
ja     1110 <gfmul+0x10>
ret

LLVM IR (-O0):
define i32 @gfmul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %28
9: ; preds = %6
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = xor i32 %15, %14
store i32 %16, i32* %5
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %3
%19 = shl i32 %18, 1
%20 = load i32, i32* %3
%21 = and i32 %20, 128
%22 = icmp ne i32 %21, 0
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 29, i32 0
%25 = xor i32 %19, %24
store i32 %25, i32* %3
%26 = load i32, i32* %4
%27 = ashr i32 %26, 1
store i32 %27, i32* %4
br label %6
28: ; preds = %6
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @gfmul(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %19, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 0, %2 ]
%6 = phi i32 [ %17, %4 ], [ %1, %2 ]
%7 = phi i32 [ %16, %4 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 0, i32 %7
%11 = xor i32 %10, %5
%12 = shl i32 %7, 1
%13 = and i32 %7, 128
%14 = icmp eq i32 %13, 0
%15 = select i1 %14, i32 0, i32 29
%16 = xor i32 %15, %12
%17 = ashr i32 %6, 1
%18 = icmp ult i32 %6, 2
br i1 %18, label %19, label %4
19: ; preds = %4, %2
%20 = phi i32 [ 0, %2 ], [ %11, %4 ]
ret i32 %20
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int intf_numa_node(char const *);
int numa_node_to_cpusmask(int, int /*<<< orphan*/ *, int *);
int intf_name_best_cpus(const char *if_name, uint64_t *cpusmask, int *nr) {
  int numa_node, retval;
  numa_node = intf_numa_node(if_name);
  if (numa_node < 0)
    return -1;
  retval = numa_node_to_cpusmask(numa_node, cpusmask, nr);
  return retval;
}


x86 assembly (clang, -O0):
<intf_name_best_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <intf_numa_node@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    1156 <intf_name_best_cpus+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <intf_name_best_cpus+0x4f>
mov    -0x24(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <numa_node_to_cpusmask@plt>
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intf_name_best_cpus>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
call   1030 <intf_numa_node@plt>
test   %eax,%eax
js     1147 <intf_name_best_cpus+0x27>
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <numa_node_to_cpusmask@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @intf_name_best_cpus(i8* %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%10 = load i8*, i8** %5
%11 = call i32 @intf_numa_node(i8* %10)
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %3
store i32 -1, i32* %4
br label %21
15: ; preds = %3
%16 = load i32, i32* %8
%17 = load i32*, i32** %6
%18 = load i32*, i32** %7
%19 = call i32 @numa_node_to_cpusmask(i32 %16, i32* %17, i32* %18)
store i32 %19, i32* %9
%20 = load i32, i32* %9
store i32 %20, i32* %4
br label %21
21: ; preds = %15, %14
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @intf_name_best_cpus(i8* %0, i32* %1, i32* %2) {
%4 = tail call i32 @intf_numa_node(i8* %0)
%5 = icmp slt i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @numa_node_to_cpusmask(i32 %4, i32* %1, i32* %2)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ -1, %3 ]
ret i32 %9
}
/* Type definitions */
struct C {
  int dummy;
};

/* Variables and functions */
int C_write_delimited_to(struct C *, void *, int);
int write_raw_varint32(int, void *, int);
int C_write_with_tag(struct C *_C, void *_buffer, int offset, int tag) {
  offset = write_raw_varint32((tag << 3) + 2, _buffer, offset);
  offset = C_write_delimited_to(_C, _buffer, offset);
  return offset;
}


x86 assembly (clang, -O0):
<C_write_with_tag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
shl    $0x3,%edi
add    $0x2,%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write_raw_varint32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <C_write_delimited_to@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_write_with_tag>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0x2(,%rcx,8),%edi
call   1030 <write_raw_varint32@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <C_write_delimited_to@plt>

LLVM IR (-O0):
%struct.C = type { i32 }
define i32 @C_write_with_tag(%struct.C* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca %struct.C*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store %struct.C* %0, %struct.C** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = shl i32 %9, 3
%11 = add nsw i32 %10, 2
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = call i32 @write_raw_varint32(i32 %11, i8* %12, i32 %13)
store i32 %14, i32* %7
%15 = load %struct.C*, %struct.C** %5
%16 = load i8*, i8** %6
%17 = load i32, i32* %7
%18 = call i32 @C_write_delimited_to(%struct.C* %15, i8* %16, i32 %17)
store i32 %18, i32* %7
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
%struct.C = type { i32 }
define i32 @C_write_with_tag(%struct.C* %0, i8* %1, i32 %2, i32 %3) {
%5 = shl i32 %3, 3
%6 = or i32 %5, 2
%7 = tail call i32 @write_raw_varint32(i32 %6, i8* %1, i32 %2)
%8 = tail call i32 @C_write_delimited_to(%struct.C* %0, i8* %1, i32 %7)
ret i32 %8
}
int is_even(int *val) {
  if (*val % 2 == 0)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<is_even>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    112b <is_even+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    1132 <is_even+0x32>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_even>:
mov    (%rdi),%eax
and    $0x1,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @is_even(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @is_even(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 1
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ MCM_DriverIRQHandler();
__attribute__((weak)) void MCM_IRQHandler(void) { MCM_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<MCM_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MCM_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCM_IRQHandler>:
xor    %eax,%eax
jmp    1030 <MCM_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @MCM_IRQHandler() {
%1 = call i32 (...) @MCM_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @MCM_IRQHandler() {
%1 = tail call i32 (...) @MCM_DriverIRQHandler()
ret void
}
unsigned xrop3_112_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk2 = ~stk2;
  stk1 = T & stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_112_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_112_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_112_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = and i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %5
%38 = load i32, i32* %6
%39 = and i32 %37, %38
%40 = or i32 %36, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %7
%43 = and i32 %41, %42
%44 = or i32 %40, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_112_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
long double __qlog(long double);
long double __q_log(long double *arg) { return (__qlog(*arg)); }


x86 assembly (clang, -O0):
<__q_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__qlog@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__q_log>:
sub    $0x18,%rsp
fldt   (%rdi)
fstpt  (%rsp)
call   1030 <__qlog@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @__q_log(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = load x86_fp80*, x86_fp80** %2
%4 = load x86_fp80, x86_fp80* %3
%5 = call x86_fp80 @__qlog(x86_fp80 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @__q_log(x86_fp80* nocapture %0) {
%2 = load x86_fp80, x86_fp80* %0
%3 = tail call x86_fp80 @__qlog(x86_fp80 %2)
ret x86_fp80 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void handler2(int signo, siginfo_t *info, void *context) {
  printf("handler2 entered: signal %d\n", signo);
}


x86 assembly (clang, -O0):
<handler2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler2>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"handler2 entered: signal %d\0A\00"
define void @handler2(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"handler2 entered: signal %d\0A\00"
define void @handler2(i32 %0, i32* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
float M_PI;
float radians(float degres) { return (degres * M_PI / 180); }


x86 assembly (clang, -O0):
<radians>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    0x2ed3(%rip),%rax
mulss  (%rax),%xmm0
movss  0xedf(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radians>:
mov    0x2ee1(%rip),%rax
mulss  (%rax),%xmm0
divss  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
@M_PI = global float 0.000000e+00
define float @radians(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* @M_PI
%5 = fmul float %3, %4
%6 = fdiv float %5, 1.800000e+02
ret float %6
}

LLVM IR (-O2):
@M_PI = global float 0.000000e+00
define float @radians(float %0) {
%2 = load float, float* @M_PI
%3 = fmul float %2, %0
%4 = fdiv float %3, 1.800000e+02
ret float %4
}
/* Type definitions */
typedef scalar_t__ rlim_t;

/* Variables and functions */
scalar_t__ const RLIM_INFINITY;
int /*<<< orphan*/ printf(char *, char const *, ...);
void print_limit(const char *str, const rlim_t lim) {
  if (lim == RLIM_INFINITY)
    printf("%s=-1\n", str);
  else
    printf("%s=%lu\n", str, (unsigned long)lim);
}


x86 assembly (clang, -O0):
<print_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2eb5(%rip),%rcx
cmp    (%rcx),%rax
jne    114b <print_limit+0x3b>
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1161 <print_limit+0x51>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xeb5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_limit>:
mov    %rsi,%rdx
mov    %rdi,%rsi
test   %rdx,%rdx
je     1129 <print_limit+0x19>
lea    0xeed(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>
lea    0xed8(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@RLIM_INFINITY = constant i64 0
@.str = [7 x i8] c"%s=-1\0A\00"
@.str.1 = [8 x i8] c"%s=%lu\0A\00"
define void @print_limit(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* @RLIM_INFINITY
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %9)
br label %15
11: ; preds = %2
%12 = load i8*, i8** %3
%13 = load i64, i64* %4
%14 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* %12, i64 %13)
br label %15
15: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
@RLIM_INFINITY = constant i64 0
@.str = [7 x i8] c"%s=-1\0A\00"
@.str.1 = [8 x i8] c"%s=%lu\0A\00"
define void @print_limit(i8* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %8
6: ; preds = %2
%7 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* %0, i64 %1)
br label %8
8: ; preds = %6, %4
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_wait4;
scalar_t__ syscall_3(int /*<<< orphan*/, long, long, long);
pid_t waitpid(pid_t pid, int *status, int options) {
  pid_t ret;
  ret =
      syscall_3(SYS_wait4, ((long)(pid)), ((long)(status)), ((long)(options)));
  return ret;
}


x86 assembly (clang, -O0):
<waitpid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
movslq -0x14(%rbp),%rcx
call   1030 <syscall_3@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitpid>:
mov    %rsi,%rax
mov    %rdi,%rsi
mov    0x2ecb(%rip),%rcx
mov    (%rcx),%edi
movslq %edx,%rcx
mov    %rax,%rdx
jmp    1030 <syscall_3@plt>

LLVM IR (-O0):
@SYS_wait4 = global i32 0
define i64 @waitpid(i64 %0, i32* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i64
store i64 %0, i64* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = load i32, i32* @SYS_wait4
%9 = load i64, i64* %4
%10 = load i32*, i32** %5
%11 = ptrtoint i32* %10 to i64
%12 = load i32, i32* %6
%13 = sext i32 %12 to i64
%14 = call i64 @syscall_3(i32 %8, i64 %9, i64 %11, i64 %13)
store i64 %14, i64* %7
%15 = load i64, i64* %7
ret i64 %15
}

LLVM IR (-O2):
@SYS_wait4 = global i32 0
define i64 @waitpid(i64 %0, i32* %1, i32 %2) {
%4 = load i32, i32* @SYS_wait4
%5 = ptrtoint i32* %1 to i64
%6 = sext i32 %2 to i64
%7 = tail call i64 @syscall_3(i32 %4, i64 %0, i64 %5, i64 %6)
ret i64 %7
}
int Max(int a, int b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<Max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <Max+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <Max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @Max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @Max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void ff_network_close(void) {}


x86 assembly (clang, -O0):
<ff_network_close>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_network_close>:
ret

LLVM IR (-O0):
define void @ff_network_close() {
ret void
}

LLVM IR (-O2):
define void @ff_network_close() {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
scalar_t__ ByteSwap32(int);
uint64_t ByteSwap64(uint64_t value) {
  return (uint64_t)(ByteSwap32((uint32_t)(value >> 32))) |
         ((uint64_t)(ByteSwap32(value)) << 32);
}


x86 assembly (clang, -O0):
<ByteSwap64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x20,%ecx
sar    %cl,%edi
call   1030 <ByteSwap32@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ByteSwap32@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%eax
mov    %ecx,%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ByteSwap64>:
push   %rbx
mov    %edi,%ebx
call   1030 <ByteSwap32@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <ByteSwap32@plt>

LLVM IR (-O0):
define i32 @ByteSwap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 32
%5 = call i64 @ByteSwap32(i32 %4)
%6 = trunc i64 %5 to i32
%7 = load i32, i32* %2
%8 = call i64 @ByteSwap32(i32 %7)
%9 = trunc i64 %8 to i32
%10 = shl i32 %9, 32
%11 = or i32 %6, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @ByteSwap64(i32 %0) {
%2 = tail call i64 @ByteSwap32(i32 poison)
%3 = tail call i64 @ByteSwap32(i32 %0)
ret i32 poison
}
char *SDL_strchr(const char *string, int c) {
  while (*string) {
    if (*string == c) {
      return (char *)string;
    }
    ++string;
  }
  return ((void *)0);
}


x86 assembly (clang, -O0):
<SDL_strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <SDL_strchr+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1135 <SDL_strchr+0x35>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <SDL_strchr+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <SDL_strchr+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_strchr>:
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <SDL_strchr+0x23>
mov    %rdi,%rax
nopl   0x0(%rax)
movsbl %cl,%ecx
cmp    %esi,%ecx
je     1125 <SDL_strchr+0x25>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <SDL_strchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @SDL_strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %5
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %4
store i8* %17, i8** %3
br label %22
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %4
br label %6
21: ; preds = %6
store i8* null, i8** %3
br label %22
22: ; preds = %21, %16
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @SDL_strchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %10
%6 = phi i8 [ %12, %10 ], [ %3, %2 ]
%7 = phi i8* [ %11, %10 ], [ %0, %2 ]
%8 = sext i8 %6 to i32
%9 = icmp eq i32 %8, %1
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %10, %2
%15 = phi i8* [ null, %2 ], [ null, %10 ], [ %7, %5 ]
ret i8* %15
}
void __attribute__((__unused__, __format__(__printf__, 1, 2)))
ldebug(const char *fmt, ...) {
  (void)fmt;
}


x86 assembly (clang, -O0):
<ldebug>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldebug>:
ret

LLVM IR (-O0):
define void @ldebug(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @ldebug(i8* nocapture %0, ...) {
ret void
}
void ExttSiteUserAuxTable(void) {}


x86 assembly (clang, -O0):
<ExttSiteUserAuxTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttSiteUserAuxTable>:
ret

LLVM IR (-O0):
define void @ExttSiteUserAuxTable() {
ret void
}

LLVM IR (-O2):
define void @ExttSiteUserAuxTable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *);
void _exc_to_str_nomem(char *buf, int n) {
  (void)snprintf(buf, n, "Out of heap memory");
}


x86 assembly (clang, -O0):
<_exc_to_str_nomem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_exc_to_str_nomem>:
lea    0xee9(%rip),%rdx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Out of heap memory\00"
define void @_exc_to_str_nomem(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @snprintf(i8* %5, i32 %6, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"Out of heap memory\00"
define void @_exc_to_str_nomem(i8* %0, i32 %1) {
%3 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ld_a_hli();
void opcode_2a() { ld_a_hli(); }


x86 assembly (clang, -O0):
<opcode_2a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ld_a_hli@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_2a>:
xor    %eax,%eax
jmp    1030 <ld_a_hli@plt>

LLVM IR (-O0):
define void @opcode_2a() {
%1 = call i32 (...) @ld_a_hli()
ret void
}

LLVM IR (-O2):
define void @opcode_2a() {
%1 = tail call i32 (...) @ld_a_hli()
ret void
}