xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int /*<<< orphan*/ term_exit();
int /*<<< orphan*/ term_init();
int term_read();
char get_keypress() {
  char value = '\0';
  int pressed = 0;
  fflush(stdout);
  term_init();
  while ((pressed = term_read()) == -1)
    ;
  term_exit();
  value = (char)pressed;
  return value;
}


x86 assembly (clang, -O0):
<get_keypress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
mov    $0x0,%al
call   1050 <term_init@plt>
mov    $0x0,%al
call   1060 <term_read@plt>
mov    %eax,-0x8(%rbp)
cmp    $0xffffffff,%eax
jne    1180 <get_keypress+0x40>
jmp    1168 <get_keypress+0x28>
mov    $0x0,%al
call   1040 <term_exit@plt>
mov    -0x8(%rbp),%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_keypress>:
push   %rbx
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
xor    %eax,%eax
call   1050 <term_init@plt>
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1060 <term_read@plt>
cmp    $0xffffffff,%eax
je     1160 <get_keypress+0x20>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <term_exit@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stdout = global i32 0
define signext i8 @get_keypress() {
%1 = alloca i8
%2 = alloca i32
store i8 0, i8* %1
store i32 0, i32* %2
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
%5 = call i32 (...) @term_init()
br label %6
6: ; preds = %9, %0
%7 = call i32 (...) @term_read()
store i32 %7, i32* %2
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %10
9: ; preds = %6
br label %6
10: ; preds = %6
%11 = call i32 (...) @term_exit()
%12 = load i32, i32* %2
%13 = trunc i32 %12 to i8
store i8 %13, i8* %1
%14 = load i8, i8* %1
ret i8 %14
}

LLVM IR (-O2):
@stdout = global i32 0
define signext i8 @get_keypress() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fflush(i32 %1)
%3 = tail call i32 (...) @term_init()
br label %4
4: ; preds = %4, %0
%5 = tail call i32 (...) @term_read()
%6 = icmp eq i32 %5, -1
br i1 %6, label %4, label %7
7: ; preds = %4
%8 = tail call i32 (...) @term_exit()
%9 = trunc i32 %5 to i8
ret i8 %9
}
void parallel_install(void) {}


x86 assembly (clang, -O0):
<parallel_install>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_install>:
ret

LLVM IR (-O0):
define void @parallel_install() {
ret void
}

LLVM IR (-O2):
define void @parallel_install() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ KAPI_save_as_header_Enum(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ fwrite(char *, int, int, int /*<<< orphan*/ *);
void KAPI_save_as_header_Enum_list(FILE *fp, char *pch) {
  FILE *fpTmp = fp;
  KAPI_save_as_header_Enum(fp, pch);
  fwrite(",", sizeof(char), 1, fpTmp);
}


x86 assembly (clang, -O0):
<KAPI_save_as_header_Enum_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <KAPI_save_as_header_Enum@plt>
mov    -0x18(%rbp),%rcx
lea    0xeb0(%rip),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KAPI_save_as_header_Enum_list>:
push   %rbx
mov    %rdi,%rbx
call   1040 <KAPI_save_as_header_Enum@plt>
mov    $0x2c,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@.str = [2 x i8] c",\00"
define void @KAPI_save_as_header_Enum_list(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32*
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i32*, i32** %3
store i32* %6, i32** %5
%7 = load i32*, i32** %3
%8 = load i8*, i8** %4
%9 = call i32 @KAPI_save_as_header_Enum(i32* %7, i8* %8)
%10 = load i32*, i32** %5
%11 = call i32 @fwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1, i32 1, i32* %10)
ret void
}

LLVM IR (-O2):
define void @KAPI_save_as_header_Enum_list(i32* %0, i8* %1) {
%3 = tail call i32 @KAPI_save_as_header_Enum(i32* %0, i8* %1)
%4 = tail call i32 @fputc(i32 44, i32* %0)
ret void
}
void gencvt_s_l() {}


x86 assembly (clang, -O0):
<gencvt_s_l>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gencvt_s_l>:
ret

LLVM IR (-O0):
define void @gencvt_s_l() {
ret void
}

LLVM IR (-O2):
define void @gencvt_s_l() {
ret void
}
int isoct(int c) { return c >= '0' && c <= '7'; }


x86 assembly (clang, -O0):
<isoct>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isoct+0x20>
cmpl   $0x37,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoct>:
and    $0xfffffff8,%edi
xor    %eax,%eax
cmp    $0x30,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isoct(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 55
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isoct(i32 %0) {
%2 = and i32 %0, -8
%3 = icmp eq i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct config_entry {
  int dummy;
};
struct bucket_list {
  int dummy;
};

/* Variables and functions */
struct config_entry *bucket_list_find_key(struct bucket_list *, char const *);
extern struct config_entry *get_config_entry(struct bucket_list *categories,
                                             const char *item) {
  struct config_entry *entry;
  entry = bucket_list_find_key(categories, item);
  return (entry);
}


x86 assembly (clang, -O0):
<get_config_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <bucket_list_find_key@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_config_entry>:
jmp    1030 <bucket_list_find_key@plt>

LLVM IR (-O0):
%struct.config_entry = type { i32 }
%struct.bucket_list = type { i32 }
define %struct.config_entry* @get_config_entry(%struct.bucket_list* %0, i8* %1) {
%3 = alloca %struct.bucket_list*
%4 = alloca i8*
%5 = alloca %struct.config_entry*
store %struct.bucket_list* %0, %struct.bucket_list** %3
store i8* %1, i8** %4
%6 = load %struct.bucket_list*, %struct.bucket_list** %3
%7 = load i8*, i8** %4
%8 = call %struct.config_entry* @bucket_list_find_key(%struct.bucket_list* %6, i8* %7)
store %struct.config_entry* %8, %struct.config_entry** %5
%9 = load %struct.config_entry*, %struct.config_entry** %5
ret %struct.config_entry* %9
}

LLVM IR (-O2):
%struct.config_entry = type { i32 }
%struct.bucket_list = type { i32 }
define %struct.config_entry* @get_config_entry(%struct.bucket_list* %0, i8* %1) {
%3 = tail call %struct.config_entry* @bucket_list_find_key(%struct.bucket_list* %0, i8* %1)
ret %struct.config_entry* %3
}
/* Variables and functions */
__attribute__((visibility("default"))) void *
sd_resolve_query_get_resolve(void *q) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_resolve_query_get_resolve>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_resolve_query_get_resolve>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_resolve_query_get_resolve(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_resolve_query_get_resolve(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ Lcd_Draw_Pixel(int, int, int);
void Lcd_Draw_Hline(int row, int col1, int col2, int color) {
  int j;
  for (j = col1; j <= col2; j++)
    Lcd_Draw_Pixel(row, j, color);
}


x86 assembly (clang, -O0):
<Lcd_Draw_Hline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1152 <Lcd_Draw_Hline+0x42>
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <Lcd_Draw_Pixel@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112a <Lcd_Draw_Hline+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lcd_Draw_Hline>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jg     1144 <Lcd_Draw_Hline+0x34>
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%ebx
mov    %edi,%r15d
add    $0x1,%ebp
nopl   0x0(%rax,%rax,1)
mov    %r15d,%edi
mov    %ebx,%esi
mov    %r14d,%edx
call   1030 <Lcd_Draw_Pixel@plt>
add    $0x1,%ebx
cmp    %ebx,%ebp
jne    1130 <Lcd_Draw_Hline+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @Lcd_Draw_Hline(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %6
store i32 %10, i32* %9
br label %11
11: ; preds = %20, %4
%12 = load i32, i32* %9
%13 = load i32, i32* %7
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %23
15: ; preds = %11
%16 = load i32, i32* %5
%17 = load i32, i32* %9
%18 = load i32, i32* %8
%19 = call i32 @Lcd_Draw_Pixel(i32 %16, i32 %17, i32 %18)
br label %20
20: ; preds = %15
%21 = load i32, i32* %9
%22 = add nsw i32 %21, 1
store i32 %22, i32* %9
br label %11
23: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @Lcd_Draw_Hline(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp sgt i32 %1, %2
br i1 %5, label %11, label %6
6: ; preds = %4, %6
%7 = phi i32 [ %9, %6 ], [ %1, %4 ]
%8 = tail call i32 @Lcd_Draw_Pixel(i32 %0, i32 %7, i32 %3)
%9 = add i32 %7, 1
%10 = icmp eq i32 %7, %2
br i1 %10, label %11, label %6
11: ; preds = %6, %4
ret void
}
/* Variables and functions */
void puts(const char *something) {}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ glFogi(int /*<<< orphan*/, int /*<<< orphan*/);
void Fogi(GLenum pname, GLint param) { glFogi(pname, param); }


x86 assembly (clang, -O0):
<Fogi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <glFogi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fogi>:
jmp    1030 <glFogi@plt>

LLVM IR (-O0):
define void @Fogi(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @glFogi(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @Fogi(i32 %0, i32 %1) {
%3 = tail call i32 @glFogi(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
double atan(double);
double __datand(double x) { return (atan(x) * 57.29577951308232); }


x86 assembly (clang, -O0):
<__datand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <atan@plt>
movsd  0xed1(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__datand>:
push   %rax
call   1030 <atan@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @__datand(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @atan(double %3)
%5 = fmul double %4, 0x404CA5DC1A63C1F8
ret double %5
}

LLVM IR (-O2):
define double @__datand(double %0) {
%2 = tail call double @atan(double %0)
%3 = fmul double %2, 0x404CA5DC1A63C1F8
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(
      stderr,
      "Usage: pathwalk root-path [-c|-r|-t] [OPTIONS]\n"
      "   -l,--length N          set number of directories to search dflt: "
      "16)\n"
      "   -f,--files N           set number of files to search for (dflt: "
      "10000)\n"
      "   -c,--create            create files and directories\n"
      "   -r,--remove            remove files and directories\n"
      "   -t,--test              run test\n"
      "   -C,--primecache        run one path search before starting timing\n"
      "   -F,--failsearch        arrange for search to be unsuccessful\n"
      "   -q,--quiet             suppress timing messages\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [523 x i8] c"Usage: pathwalk root-path [-c|-r|-t] [OPTIONS]\0A -l,--length N set number of directories to search dflt: 16)\0A -f,--files N set number of files to search for (dflt: 10000)\0A -c,--create create files and directories\0A -r,--remove remove files and directories\0A -t,--test run test\0A -C,--primecache run one path search before starting timing\0A -F,--failsearch arrange for search to be unsuccessful\0A -q,--quiet suppress timing messages\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([523 x i8], [523 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [523 x i8] c"Usage: pathwalk root-path [-c|-r|-t] [OPTIONS]\0A -l,--length N set number of directories to search dflt: 16)\0A -f,--files N set number of files to search for (dflt: 10000)\0A -c,--create create files and directories\0A -r,--remove remove files and directories\0A -t,--test run test\0A -C,--primecache run one path search before starting timing\0A -F,--failsearch arrange for search to be unsuccessful\0A -q,--quiet suppress timing messages\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([523 x i8], [523 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void __attribute__((noreturn)) usage(void) {
  fprintf(stderr, "call: outpsfheader psftype fontsize charsize hastable\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [55 x i8] c"call: outpsfheader psftype fontsize charsize hastable\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [55 x i8] c"call: outpsfheader psftype fontsize charsize hastable\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int dposv(char UPLO, int N, int NRHS, double *A, int LDA, double *B, int LDB) {
  extern void dposv_(char *UPLO, int *N, int *NRHS, double *A, int *LDA,
                     double *B, int *LDB, int *INFO);
  int INFO;
  dposv_(&UPLO, &N, &NRHS, A, &LDA, B, &LDB, &INFO);
  return INFO;
}


x86 assembly (clang, -O0):
<dposv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %dil,%al
mov    0x10(%rbp),%edi
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x28(%rbp),%r9
lea    -0x1(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x1c(%rbp),%r8
lea    0x10(%rbp),%r10
lea    -0x2c(%rbp),%rax
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <dposv_@plt>
mov    -0x2c(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dposv>:
sub    $0x18,%rsp
mov    %dil,0x7(%rsp)
mov    %esi,0x14(%rsp)
mov    %edx,0x10(%rsp)
mov    %r8d,0xc(%rsp)
lea    0x8(%rsp),%rax
lea    0x20(%rsp),%r10
lea    0x7(%rsp),%rdi
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%r8
push   %rax
push   %r10
call   1030 <dposv_@plt>
add    $0x10,%rsp
mov    0x8(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @dposv(i8 signext %0, i32 %1, i32 %2, double* %3, i32 %4, double* %5, i32 %6) {
%8 = alloca i8
%9 = alloca i32
%10 = alloca i32
%11 = alloca double*
%12 = alloca i32
%13 = alloca double*
%14 = alloca i32
%15 = alloca i32
store i8 %0, i8* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store double* %3, double** %11
store i32 %4, i32* %12
store double* %5, double** %13
store i32 %6, i32* %14
%16 = load double*, double** %11
%17 = load double*, double** %13
%18 = load i32, i32* %15
ret i32 %18
}

LLVM IR (-O2):
define i32 @dposv(i8 signext %0, i32 %1, i32 %2, double* %3, i32 %4, double* %5, i32 %6) {
%8 = alloca i8
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i8 %0, i8* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %4, i32* %11
store i32 %6, i32* %12
%14 = bitcast i32* %13 to i8*
%15 = load i32, i32* %13
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int test();
int main() {
  extern int a;
  printf("%d\n", a);
  printf("%d\n", test());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <test@plt>
mov    %eax,%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rbx
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <test@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@a = external global i32
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @a
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @test()
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@a = external global i32
define i32 @main() {
%1 = load i32, i32* @a
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @test()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int st103_get_epreg(int /*<<< orphan*/);
uint16_t st103_ep_get_tx_status(uint8_t ep_num) {
  uint16_t value = st103_get_epreg(ep_num);
  return value & (0x0030);
}


x86 assembly (clang, -O0):
<st103_ep_get_tx_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <st103_get_epreg@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x30,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<st103_ep_get_tx_status>:
push   %rax
call   1030 <st103_get_epreg@plt>
and    $0x30,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @st103_ep_get_tx_status(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @st103_get_epreg(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 48
ret i32 %7
}

LLVM IR (-O2):
define i32 @st103_ep_get_tx_status(i32 %0) {
%2 = tail call i32 @st103_get_epreg(i32 %0)
%3 = and i32 %2, 48
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ api_putchar(char);
void HariMain(void) {
  api_putchar('h');
  api_putchar('e');
  api_putchar('l');
  api_putchar('l');
  api_putchar('o');
  return;
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x68,%edi
call   1030 <api_putchar@plt>
mov    $0x65,%edi
call   1030 <api_putchar@plt>
mov    $0x6c,%edi
call   1030 <api_putchar@plt>
mov    $0x6c,%edi
call   1030 <api_putchar@plt>
mov    $0x6f,%edi
call   1030 <api_putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HariMain>:
push   %rax
mov    $0x68,%edi
call   1030 <api_putchar@plt>
mov    $0x65,%edi
call   1030 <api_putchar@plt>
mov    $0x6c,%edi
call   1030 <api_putchar@plt>
mov    $0x6c,%edi
call   1030 <api_putchar@plt>
mov    $0x6f,%edi
pop    %rax
jmp    1030 <api_putchar@plt>

LLVM IR (-O0):
define void @HariMain() {
%1 = call i32 @api_putchar(i8 signext 104)
%2 = call i32 @api_putchar(i8 signext 101)
%3 = call i32 @api_putchar(i8 signext 108)
%4 = call i32 @api_putchar(i8 signext 108)
%5 = call i32 @api_putchar(i8 signext 111)
ret void
}

LLVM IR (-O2):
define void @HariMain() {
%1 = tail call i32 @api_putchar(i8 signext 104)
%2 = tail call i32 @api_putchar(i8 signext 101)
%3 = tail call i32 @api_putchar(i8 signext 108)
%4 = tail call i32 @api_putchar(i8 signext 108)
%5 = tail call i32 @api_putchar(i8 signext 111)
ret void
}
/* Type definitions */
struct wl_region {
  int dummy;
};
struct wl_proxy {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_marshal(struct wl_proxy *, int, int /*<<< orphan*/,
                                    int /*<<< orphan*/, int /*<<< orphan*/,
                                    int /*<<< orphan*/);
void wl_region_add(struct wl_region *wl_region, int32_t x, int32_t y,
                   int32_t width, int32_t height) {
  wl_proxy_marshal((struct wl_proxy *)wl_region, 1, x, y, width, height);
}


x86 assembly (clang, -O0):
<wl_region_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    $0x1,%esi
call   1030 <wl_proxy_marshal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_region_add>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <wl_proxy_marshal@plt>

LLVM IR (-O0):
%struct.wl_region = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_region_add(%struct.wl_region* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.wl_region*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.wl_region* %0, %struct.wl_region** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.wl_region*, %struct.wl_region** %6
%12 = bitcast %struct.wl_region* %11 to %struct.wl_proxy*
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = call i32 @wl_proxy_marshal(%struct.wl_proxy* %12, i32 1, i32 %13, i32 %14, i32 %15, i32 %16)
ret void
}

LLVM IR (-O2):
%struct.wl_region = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_region_add(%struct.wl_region* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = bitcast %struct.wl_region* %0 to %struct.wl_proxy*
%7 = tail call i32 @wl_proxy_marshal(%struct.wl_proxy* %6, i32 1, i32 %1, i32 %2, i32 %3, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fn(char const *const, char const *const *);
int main() {
  const char *const foo[] = {"hello world", "bye bye world"};
  fn(foo[0], foo + 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2cea(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0x2ce7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
lea    -0x20(%rbp),%rsi
add    $0x8,%rsi
call   1030 <fn@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0x2cf5(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x8(%rsp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <fn@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hello world\00"
@.str.1 = [14 x i8] c"bye bye world\00"
@__const.main.foo = [2 x i8*] [i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i32 0, i32 0)]
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i8*]
store i32 0, i32* %1
%3 = bitcast [2 x i8*]* %2 to i8*
%4 = getelementptr inbounds [2 x i8*], [2 x i8*]* %2, i64 0, i64 0
%5 = load i8*, i8** %4
%6 = getelementptr inbounds [2 x i8*], [2 x i8*]* %2, i64 0, i64 0
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = call i32 @fn(i8* %5, i8** %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"hello world\00"
@.str.1 = [14 x i8] c"bye bye world\00"
@__const.main.foo = [2 x i8*] [i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i32 0, i32 0)]
define i32 @main() {
%1 = alloca [2 x i8*]
%2 = bitcast [2 x i8*]* %1 to i8*
%3 = getelementptr inbounds [2 x i8*], [2 x i8*]* %1, i64 0, i64 1
%4 = call i32 @fn(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8** %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void QEIIntDisable(unsigned long ulBase, unsigned long ulIntFlags) {
  DEBUG_ASSERT((ulBase == 0x4002C000) || (ulBase == 0x4002D000));
  (*((volatile unsigned long *)(ulBase + 0x00000020))) &= ~(ulIntFlags);
}


x86 assembly (clang, -O0):
<QEIIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
cmpq   $0x4002c000,-0x8(%rbp)
40
mov    %al,-0x11(%rbp)
je     1141 <QEIIntDisable+0x31>
cmpq   $0x4002d000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x20(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x20(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIIntDisable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x4002c000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
not    %rbx
and    %rbx,0x20(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @QEIIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1073922048
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 1073926144
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @DEBUG_ASSERT(i32 %12)
%14 = load i64, i64* %4
%15 = xor i64 %14, -1
%16 = load i64, i64* %3
%17 = add i64 %16, 32
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = and i64 %19, %15
store volatile i64 %20, i64* %18
ret void
}

LLVM IR (-O2):
define void @QEIIntDisable(i64 %0, i64 %1) {
%3 = and i64 %0, -4097
%4 = icmp eq i64 %3, 1073922048
%5 = zext i1 %4 to i32
%6 = tail call i32 @DEBUG_ASSERT(i32 %5)
%7 = xor i64 %1, -1
%8 = add i64 %0, 32
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %7
store volatile i64 %11, i64* %9
ret void
}
__attribute__((no, noclone)) int f4(int x) { return x <= 0 ? x : ~x; }


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jg     111c <f4+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1125 <f4+0x25>
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
xor    %eax,%eax
test   %edi,%edi
setg   %al
neg    %eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = xor i32 %8, -1
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @f4(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = sext i1 %2 to i32
%4 = xor i32 %3, %0
ret i32 %4
}
/* Variables and functions */
void *dlsym(void *, char const *);
void *vogl_load_function(void *handle, const char *name) {
  return dlsym(handle, name);
}


x86 assembly (clang, -O0):
<vogl_load_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dlsym@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vogl_load_function>:
jmp    1030 <dlsym@plt>

LLVM IR (-O0):
define i8* @vogl_load_function(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @dlsym(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @vogl_load_function(i8* %0, i8* %1) {
%3 = tail call i8* @dlsym(i8* %0, i8* %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ TestBitArray();
void TestAll() { TestBitArray(); }


x86 assembly (clang, -O0):
<TestAll>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TestBitArray@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestAll>:
xor    %eax,%eax
jmp    1030 <TestBitArray@plt>

LLVM IR (-O0):
define void @TestAll() {
%1 = call i32 (...) @TestBitArray()
ret void
}

LLVM IR (-O2):
define void @TestAll() {
%1 = tail call i32 (...) @TestBitArray()
ret void
}
int fn5(signed short a) { return ((int)a) | ((int)~a); }


x86 assembly (clang, -O0):
<fn5>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x2(%rbp),%ecx
xor    $0xffffffff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn5>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fn5(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = load i16, i16* %2
%6 = sext i16 %5 to i32
%7 = xor i32 %6, -1
%8 = or i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @fn5(i16 signext %0) {
ret i32 -1
}
int do_165() { return 165; }


x86 assembly (clang, -O0):
<do_165>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_165>:
mov    $0xa5,%eax
ret

LLVM IR (-O0):
define i32 @do_165() {
ret i32 165
}

LLVM IR (-O2):
define i32 @do_165() {
ret i32 165
}
void gll_coordinates_order4_square(double *out_3496294405507664450) {
  out_3496294405507664450[0] = -1.0;
  out_3496294405507664450[1] = -0.654653670707977;
  out_3496294405507664450[2] = 0.0;
  out_3496294405507664450[3] = 0.654653670707977;
  out_3496294405507664450[4] = 1.0;
}


x86 assembly (clang, -O0):
<gll_coordinates_order4_square>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xf04(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x10(%rax)
mov    -0x8(%rbp),%rax
movsd  0xec7(%rip),%xmm0
movsd  %xmm0,0x18(%rax)
mov    -0x8(%rbp),%rax
movsd  0xeae(%rip),%xmm0
movsd  %xmm0,0x20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gll_coordinates_order4_square>:
movaps 0xef9(%rip),%xmm0
xorps  %xmm1,%xmm1
movhps 0xeff(%rip),%xmm1
movups %xmm0,(%rdi)
movups %xmm1,0x10(%rdi)
movabs $0x3ff0000000000000,%rax
mov    %rax,0x20(%rdi)
ret

LLVM IR (-O0):
define void @gll_coordinates_order4_square(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
store double -1.000000e+00, double* %4
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 1
store double 0xBFE4F2EC413CB529, double* %6
%7 = load double*, double** %2
%8 = getelementptr inbounds double, double* %7, i64 2
store double 0.000000e+00, double* %8
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 3
store double 0x3FE4F2EC413CB529, double* %10
%11 = load double*, double** %2
%12 = getelementptr inbounds double, double* %11, i64 4
store double 1.000000e+00, double* %12
ret void
}

LLVM IR (-O2):
define void @gll_coordinates_order4_square(double* nocapture writeonly %0) {
%2 = bitcast double* %0 to <2 x double>*
store <2 x double> <double -1.000000e+00, double 0xBFE4F2EC413CB529>, <2 x double>* %2
%3 = getelementptr inbounds double, double* %0, i64 2
%4 = bitcast double* %3 to <2 x double>*
store <2 x double> <double 0.000000e+00, double 0x3FE4F2EC413CB529>, <2 x double>* %4
%5 = getelementptr inbounds double, double* %0, i64 4
store double 1.000000e+00, double* %5
ret void
}
int isdigit(int c) {
  if ('0' <= c && c <= '9')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    $0x30,%eax
cmp    -0x8(%rbp),%eax
jg     112b <isdigit+0x2b>
cmpl   $0x39,-0x8(%rbp)
jg     112b <isdigit+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1132 <isdigit+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 48, %4
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t mlv_prng_lfsr(uint64_t value) {
  uint64_t lfsr = value;
  int max_clocks = 512;
  for (int clocks = 0; clocks < max_clocks; clocks++) {
    int bit = ((lfsr >> 63) ^ (lfsr >> 62) ^ (lfsr >> 60) ^ (lfsr >> 59)) & 1;
    lfsr = (lfsr << 1) | bit;
  }
  return lfsr;
}


x86 assembly (clang, -O0):
<mlv_prng_lfsr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x200,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    117b <mlv_prng_lfsr+0x7b>
mov    -0x8(%rbp),%eax
mov    $0x3f,%ecx
sar    %cl,%eax
mov    -0x8(%rbp),%edx
mov    $0x3e,%ecx
sar    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
mov    -0x8(%rbp),%edx
mov    $0x3c,%ecx
sar    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
mov    -0x8(%rbp),%edx
mov    $0x3b,%ecx
sar    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
and    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111b <mlv_prng_lfsr+0x1b>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlv_prng_lfsr>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mlv_prng_lfsr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
store i32 %7, i32* %3
store i32 512, i32* %4
store i32 0, i32* %5
br label %8
8: ; preds = %29, %1
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %32
12: ; preds = %8
%13 = load i32, i32* %3
%14 = ashr i32 %13, 63
%15 = load i32, i32* %3
%16 = ashr i32 %15, 62
%17 = xor i32 %14, %16
%18 = load i32, i32* %3
%19 = ashr i32 %18, 60
%20 = xor i32 %17, %19
%21 = load i32, i32* %3
%22 = ashr i32 %21, 59
%23 = xor i32 %20, %22
%24 = and i32 %23, 1
store i32 %24, i32* %6
%25 = load i32, i32* %3
%26 = shl i32 %25, 1
%27 = load i32, i32* %6
%28 = or i32 %26, %27
store i32 %28, i32* %3
br label %29
29: ; preds = %12
%30 = load i32, i32* %5
%31 = add nsw i32 %30, 1
store i32 %31, i32* %5
br label %8
32: ; preds = %8
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @mlv_prng_lfsr(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void cbKeyboard(unsigned char ucKey, int iX, int iY) {
  switch (ucKey) {
  case 'q':
    exit(0);
    break;
  }
}


x86 assembly (clang, -O0):
<cbKeyboard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x1(%rbp),%al
sub    $0x71,%al
jne    113b <cbKeyboard+0x2b>
jmp    1134 <cbKeyboard+0x24>
xor    %edi,%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbKeyboard>:
cmp    $0x71,%dil
je     1117 <cbKeyboard+0x7>
ret
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @cbKeyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
switch i32 %8, label %11 [
i32 113, label %9
]
9: ; preds = %3
%10 = call i32 @exit(i32 0)
unreachable
11: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @cbKeyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = icmp eq i8 %0, 113
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %3
ret void
}
noev(cp) char *cp;
{ seterr2(cp, ": Event not found"); }


x86 assembly (clang, -O0):
<noev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x0,%al
call   1030 <seterr2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<noev>:
lea    0xee9(%rip),%rsi
xor    %eax,%eax
jmp    1030 <seterr2@plt>

LLVM IR (-O0):
@.str = [18 x i8] c": Event not found\00"
define i32 @noev(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @seterr2 to i32 (i8*, i8*, ...)*)(i8* %4, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [18 x i8] c": Event not found\00"
define i32 @noev(i8* %0) {
%2 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @seterr2 to i32 (i8*, i8*, ...)*)(i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ MicroDelay(int);
int /*<<< orphan*/ nic_outb(int, int);
int /*<<< orphan*/ nic_outw(int, unsigned short);
void phy_outw(unsigned char reg, unsigned short val) {
  nic_outb(0x0C, 0x40 | reg);
  nic_outw(0x0D, val);
  nic_outb(0x0B, 0x0A);
  MicroDelay(100);
  nic_outb(0x0B, 0x00);
}


x86 assembly (clang, -O0):
<phy_outw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
movzbl -0x1(%rbp),%esi
or     $0x40,%esi
mov    $0xc,%edi
call   1040 <nic_outb@plt>
mov    $0xd,%edi
movzwl -0x4(%rbp),%esi
call   1050 <nic_outw@plt>
mov    $0xb,%edi
mov    $0xa,%esi
call   1040 <nic_outb@plt>
mov    $0x64,%edi
call   1030 <MicroDelay@plt>
mov    $0xb,%edi
xor    %esi,%esi
call   1040 <nic_outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phy_outw>:
push   %rbx
mov    %esi,%ebx
or     $0x40,%dil
movzbl %dil,%esi
mov    $0xc,%edi
call   1040 <nic_outb@plt>
mov    $0xd,%edi
mov    %ebx,%esi
call   1050 <nic_outw@plt>
mov    $0xb,%edi
mov    $0xa,%esi
call   1040 <nic_outb@plt>
mov    $0x64,%edi
call   1030 <MicroDelay@plt>
mov    $0xb,%edi
xor    %esi,%esi
pop    %rbx
jmp    1040 <nic_outb@plt>

LLVM IR (-O0):
define void @phy_outw(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = or i32 64, %6
%8 = call i32 @nic_outb(i32 12, i32 %7)
%9 = load i16, i16* %4
%10 = call i32 @nic_outw(i32 13, i16 zeroext %9)
%11 = call i32 @nic_outb(i32 11, i32 10)
%12 = call i32 @MicroDelay(i32 100)
%13 = call i32 @nic_outb(i32 11, i32 0)
ret void
}

LLVM IR (-O2):
define void @phy_outw(i8 zeroext %0, i16 zeroext %1) {
%3 = or i8 %0, 64
%4 = zext i8 %3 to i32
%5 = tail call i32 @nic_outb(i32 12, i32 %4)
%6 = tail call i32 @nic_outw(i32 13, i16 zeroext %1)
%7 = tail call i32 @nic_outb(i32 11, i32 10)
%8 = tail call i32 @MicroDelay(i32 100)
%9 = tail call i32 @nic_outb(i32 11, i32 0)
ret void
}
/* Variables and functions */
float __ocml_pow_f32(float, float);
float powf(float x, float y) { return __ocml_pow_f32(x, y); }


x86 assembly (clang, -O0):
<powf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__ocml_pow_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<powf>:
jmp    1030 <__ocml_pow_f32@plt>

LLVM IR (-O0):
define float @powf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @__ocml_pow_f32(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @powf(float %0, float %1) {
%3 = tail call float @__ocml_pow_f32(float %0, float %1)
ret float %3
}
_Bool isNeo(double q, double e, double i) { return q < 1.3; }


x86 assembly (clang, -O0):
<isNeo>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee5(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNeo>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define zeroext i1 @isNeo(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fcmp olt double %7, 1.300000e+00
ret i1 %8
}

LLVM IR (-O2):
define zeroext i1 @isNeo(double %0, double %1, double %2) {
%4 = fcmp olt double %0, 1.300000e+00
ret i1 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x04() {
  Assert_real((isbdigit(4) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              25, ("isbdigit should be 0 for 0x04"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x04>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x19,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x04>:
push   %rax
mov    $0x4,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x19,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x04\00"
define void @t_isbdigit_0x04() {
%1 = call i64 @isbdigit(i32 4)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 25, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x04\00"
define void @t_isbdigit_0x04() {
%1 = tail call i64 @isbdigit(i32 4)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 25, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int VecEqual3fv(const float a[3], const float b[3]) {
  return (a[0] == b[0] && a[1] == b[1] && a[2] == b[2]);
}


x86 assembly (clang, -O0):
<VecEqual3fv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
ucomiss (%rcx),%xmm0
mov    %al,-0x11(%rbp)
jne    116a <VecEqual3fv+0x6a>
jp     116a <VecEqual3fv+0x6a>
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
ucomiss 0x4(%rcx),%xmm0
mov    %al,-0x11(%rbp)
jne    116a <VecEqual3fv+0x6a>
jp     116a <VecEqual3fv+0x6a>
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
ucomiss 0x8(%rax),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<VecEqual3fv>:
movss  (%rdi),%xmm0
xor    %eax,%eax
ucomiss (%rsi),%xmm0
jne    112c <VecEqual3fv+0x2c>
jp     112c <VecEqual3fv+0x2c>
movss  0x4(%rdi),%xmm0
ucomiss 0x4(%rsi),%xmm0
jne    112c <VecEqual3fv+0x2c>
jp     112c <VecEqual3fv+0x2c>
movss  0x8(%rsi),%xmm0
cmpeqss 0x8(%rdi),%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @VecEqual3fv(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
%10 = load float, float* %9
%11 = fcmp oeq float %7, %10
br i1 %11, label %12, label %28
12: ; preds = %2
%13 = load float*, float** %3
%14 = getelementptr inbounds float, float* %13, i64 1
%15 = load float, float* %14
%16 = load float*, float** %4
%17 = getelementptr inbounds float, float* %16, i64 1
%18 = load float, float* %17
%19 = fcmp oeq float %15, %18
br i1 %19, label %20, label %28
20: ; preds = %12
%21 = load float*, float** %3
%22 = getelementptr inbounds float, float* %21, i64 2
%23 = load float, float* %22
%24 = load float*, float** %4
%25 = getelementptr inbounds float, float* %24, i64 2
%26 = load float, float* %25
%27 = fcmp oeq float %23, %26
br label %28
28: ; preds = %20, %12, %2
%29 = phi i1 [ false, %12 ], [ false, %2 ], [ %27, %20 ]
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @VecEqual3fv(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = fcmp oeq float %3, %4
br i1 %5, label %6, label %19
6: ; preds = %2
%7 = getelementptr inbounds float, float* %0, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %1, i64 1
%10 = load float, float* %9
%11 = fcmp oeq float %8, %10
br i1 %11, label %12, label %19
12: ; preds = %6
%13 = getelementptr inbounds float, float* %0, i64 2
%14 = load float, float* %13
%15 = getelementptr inbounds float, float* %1, i64 2
%16 = load float, float* %15
%17 = fcmp oeq float %14, %16
%18 = zext i1 %17 to i32
br label %19
19: ; preds = %12, %6, %2
%20 = phi i32 [ 0, %6 ], [ 0, %2 ], [ %18, %12 ]
ret i32 %20
}