xunge/DecIR huggingface dataset:
int unsetenv(const char *name) {
  anvil_syslog(0, "%s unimplemented %s\n", __FUNCTION__, name);
  return 0;
}


x86 assembly (clang, -O0):
<unsetenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
xor    %edi,%edi
lea    0xed7(%rip),%rsi
lea    0xee5(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsetenv>:
push   %rax
mov    %rdi,%rcx
lea    0xee5(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"%s unimplemented %s\0A\00"
@__FUNCTION__.unsetenv = [9 x i8] c"unsetenv\00"
define i32 @unsetenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.unsetenv, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"%s unimplemented %s\0A\00"
@__FUNCTION__.unsetenv = [9 x i8] c"unsetenv\00"
define i32 @unsetenv(i8* %0) {
%2 = tail call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.unsetenv, i64 0, i64 0), i8* %0)
ret i32 0
}
int ctz1(unsigned x) {
  static const char table[32] = {0,  1,  28, 2,  29, 14, 24, 3,  30, 22, 20,
                                 15, 25, 17, 4,  8,  31, 27, 13, 23, 21, 19,
                                 16, 7,  26, 12, 18, 6,  11, 5,  10, 9};
  return table[((unsigned)((x & -x) * 0x077CB531U)) >> 27];
}


x86 assembly (clang, -O0):
<ctz1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
and    %ecx,%eax
imul   $0x77cb531,%eax,%eax
shr    $0x1b,%eax
mov    %eax,%eax
mov    %eax,%ecx
lea    0xedb(%rip),%rax
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctz1>:
mov    %edi,%eax
neg    %eax
and    %edi,%eax
imul   $0x77cb531,%eax,%eax
shr    $0x1b,%rax
lea    0xee9(%rip),%rcx
movsbl (%rax,%rcx,1),%eax
ret

LLVM IR (-O0):
@ctz1.table = internal constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09"
define i32 @ctz1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub i32 0, %4
%6 = and i32 %3, %5
%7 = mul i32 %6, 125613361
%8 = lshr i32 %7, 27
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds [32 x i8], [32 x i8]* @ctz1.table, i64 0, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@ctz1.table = internal unnamed_addr constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09"
define i32 @ctz1(i32 %0) {
%2 = sub i32 0, %0
%3 = and i32 %2, %0
%4 = mul i32 %3, 125613361
%5 = lshr i32 %4, 27
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds [32 x i8], [32 x i8]* @ctz1.table, i64 0, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
ret i32 %9
}
/* Variables and functions */
scalar_t__ nrf_drv_usbd_errata_type_52840_eng_a();
bool nrf_drv_usbd_errata_200(void) {
  return (1 && nrf_drv_usbd_errata_type_52840_eng_a());
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nrf_drv_usbd_errata_type_52840_eng_a@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1030 <nrf_drv_usbd_errata_type_52840_eng_a@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @nrf_drv_usbd_errata_200() {
%1 = call i64 (...) @nrf_drv_usbd_errata_type_52840_eng_a()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @nrf_drv_usbd_errata_200() {
%1 = tail call i64 (...) @nrf_drv_usbd_errata_type_52840_eng_a()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int config_get_int(char *, int);
int max_transfers(void) { return config_get_int("rules.give.max_men", 5); }


x86 assembly (clang, -O0):
<max_transfers>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x5,%esi
call   1030 <config_get_int@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_transfers>:
lea    0xee9(%rip),%rdi
mov    $0x5,%esi
jmp    1030 <config_get_int@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"rules.give.max_men\00"
define i32 @max_transfers() {
%1 = call i32 @config_get_int(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 5)
ret i32 %1
}

LLVM IR (-O2):
@.str = [19 x i8] c"rules.give.max_men\00"
define i32 @max_transfers() {
%1 = tail call i32 @config_get_int(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 5)
ret i32 %1
}
void PDO_DBG_INF(char *msg) {}


x86 assembly (clang, -O0):
<PDO_DBG_INF>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDO_DBG_INF>:
ret

LLVM IR (-O0):
define void @PDO_DBG_INF(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @PDO_DBG_INF(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *_subst_val(char **dst, char *src) {
  if (src != NULL) {
    if (*dst)
      free(*dst);
    *dst = src;
  }
  return *dst;
}


x86 assembly (clang, -O0):
<_subst_val>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1150 <_subst_val+0x40>
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1145 <_subst_val+0x35>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_subst_val>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rsi,%rsi
je     1131 <_subst_val+0x21>
mov    %rsi,%rbx
test   %rdi,%rdi
je     112c <_subst_val+0x1c>
call   1030 <free@plt>
mov    %rbx,(%r14)
jmp    1134 <_subst_val+0x24>
mov    %rdi,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_subst_val(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %18
7: ; preds = %2
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8**, i8*** %3
%13 = load i8*, i8** %12
%14 = call i32 @free(i8* %13)
br label %15
15: ; preds = %11, %7
%16 = load i8*, i8** %4
%17 = load i8**, i8*** %3
store i8* %16, i8** %17
br label %18
18: ; preds = %15, %2
%19 = load i8**, i8*** %3
%20 = load i8*, i8** %19
ret i8* %20
}

LLVM IR (-O2):
define i8* @_subst_val(i8** nocapture %0, i8* %1) {
%3 = icmp eq i8* %1, null
%4 = load i8*, i8** %0
br i1 %3, label %10, label %5
5: ; preds = %2
%6 = icmp eq i8* %4, null
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = tail call i32 @free(i8* %4)
br label %9
9: ; preds = %7, %5
store i8* %1, i8** %0
br label %10
10: ; preds = %2, %9
%11 = phi i8* [ %1, %9 ], [ %4, %2 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
size_t bytes_per_sample(char typechar) {
  switch (typechar) {
  case 'c':
    return 1;
  case 's':
  case 'u':
    return 2;
  case 'S':
  case 'U':
  case 'i':
  case 'f':
    return 4;
  case 'd':
    return 8;
  }
  assert(1 == 0);
  return 0;
}


x86 assembly (clang, -O0):
<bytes_per_sample>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
add    $0xffffffad,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x22,%eax
ja     117c <bytes_per_sample+0x6c>
mov    -0x18(%rbp),%rax
lea    0xec1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movq   $0x1,-0x8(%rbp)
jmp    118b <bytes_per_sample+0x7b>
movq   $0x2,-0x8(%rbp)
jmp    118b <bytes_per_sample+0x7b>
movq   $0x4,-0x8(%rbp)
jmp    118b <bytes_per_sample+0x7b>
movq   $0x8,-0x8(%rbp)
jmp    118b <bytes_per_sample+0x7b>
xor    %edi,%edi
call   1030 <assert@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytes_per_sample>:
push   %rbx
add    $0xffffffad,%edi
cmp    $0x22,%edi
ja     113c <bytes_per_sample+0x2c>
mov    $0x1,%ebx
lea    0xedb(%rip),%rax
movslq (%rax,%rdi,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x4,%ebx
jmp    114c <bytes_per_sample+0x3c>
mov    $0x2,%ebx
jmp    114c <bytes_per_sample+0x3c>
xor    %ebx,%ebx
xor    %edi,%edi
call   1030 <assert@plt>
jmp    114c <bytes_per_sample+0x3c>
mov    $0x8,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @bytes_per_sample(i8 signext %0) {
%2 = alloca i64
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 99, label %6
i32 115, label %7
i32 117, label %7
i32 83, label %8
i32 85, label %8
i32 105, label %8
i32 102, label %8
i32 100, label %9
]
6: ; preds = %1
store i64 1, i64* %2
br label %12
7: ; preds = %1, %1
store i64 2, i64* %2
br label %12
8: ; preds = %1, %1, %1, %1
store i64 4, i64* %2
br label %12
9: ; preds = %1
store i64 8, i64* %2
br label %12
10: ; preds = %1
%11 = call i32 @assert(i32 0)
store i64 0, i64* %2
br label %12
12: ; preds = %10, %9, %8, %7, %6
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
define i64 @bytes_per_sample(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %6 [
i32 99, label %8
i32 115, label %3
i32 117, label %3
i32 83, label %4
i32 85, label %4
i32 105, label %4
i32 102, label %4
i32 100, label %5
]
3: ; preds = %1, %1
br label %8
4: ; preds = %1, %1, %1, %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
%7 = tail call i32 @assert(i32 0)
br label %8
8: ; preds = %1, %6, %5, %4, %3
%9 = phi i64 [ 0, %6 ], [ 8, %5 ], [ 4, %4 ], [ 2, %3 ], [ 1, %1 ]
ret i64 %9
}
/* Type definitions */
struct dpl_eventq {
  int dummy;
};

/* Variables and functions */
scalar_t__ uwb_core_get_eventq();
struct dpl_eventq *dpl_eventq_dflt_get(void) {
  return (struct dpl_eventq *)uwb_core_get_eventq();
}


x86 assembly (clang, -O0):
<dpl_eventq_dflt_get>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <uwb_core_get_eventq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpl_eventq_dflt_get>:
xor    %eax,%eax
jmp    1030 <uwb_core_get_eventq@plt>

LLVM IR (-O0):
%struct.dpl_eventq = type { i32 }
define %struct.dpl_eventq* @dpl_eventq_dflt_get() {
%1 = call i64 (...) @uwb_core_get_eventq()
%2 = inttoptr i64 %1 to %struct.dpl_eventq*
ret %struct.dpl_eventq* %2
}

LLVM IR (-O2):
%struct.dpl_eventq = type { i32 }
define %struct.dpl_eventq* @dpl_eventq_dflt_get() {
%1 = tail call i64 (...) @uwb_core_get_eventq()
%2 = inttoptr i64 %1 to %struct.dpl_eventq*
ret %struct.dpl_eventq* %2
}
/* Type definitions */
typedef void sl_node;

/* Variables and functions */
void free(void *);
void *sl_pop(void **);
void sl__free(void *root, void (*func)(void *)) {
  struct sl_node *p;
  if (func == NULL)
    func = free;
  while ((p = sl_pop(&root)))
    func(p);
}


x86 assembly (clang, -O0):
<sl__free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1136 <sl__free+0x26>
mov    0x2ea6(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    113b <sl__free+0x2b>
lea    -0x8(%rbp),%rdi
call   1030 <sl_pop@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1161 <sl__free+0x51>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rdi
call   *%rax
jmp    113b <sl__free+0x2b>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sl__free>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,(%rsp)
test   %rsi,%rsi
jne    1127 <sl__free+0x17>
mov    0x2eb1(%rip),%rbx
mov    %rsp,%rdi
call   1030 <sl_pop@plt>
test   %rax,%rax
je     1152 <sl__free+0x42>
mov    %rsp,%r14
nopw   0x0(%rax,%rax,1)
mov    %rax,%rdi
call   *%rbx
mov    %r14,%rdi
call   1030 <sl_pop@plt>
test   %rax,%rax
jne    1140 <sl__free+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.sl_node = type opaque
define void @sl__free(i8* %0, void (i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i8*)*
%5 = alloca %struct.sl_node*
store i8* %0, i8** %3
store void (i8*)* %1, void (i8*)** %4
%6 = load void (i8*)*, void (i8*)** %4
%7 = icmp eq void (i8*)* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
store void (i8*)* @free, void (i8*)** %4
br label %9
9: ; preds = %8, %2
br label %10
10: ; preds = %14, %9
%11 = call i8* @sl_pop(i8** %3)
%12 = bitcast i8* %11 to %struct.sl_node*
store %struct.sl_node* %12, %struct.sl_node** %5
%13 = icmp ne %struct.sl_node* %12, null
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load void (i8*)*, void (i8*)** %4
%16 = load %struct.sl_node*, %struct.sl_node** %5
%17 = bitcast %struct.sl_node* %16 to i8*
br label %10
18: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @sl__free(i8* %0, void (i8*)* %1) {
%3 = alloca i8*
store i8* %0, i8** %3
%4 = icmp eq void (i8*)* %1, null
%5 = select i1 %4, void (i8*)* @free, void (i8*)* %1
%6 = call i8* @sl_pop(i8** %3)
%7 = icmp eq i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %2, %8
%9 = phi i8* [ %10, %8 ], [ %6, %2 ]
%10 = call i8* @sl_pop(i8** %3)
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %8
12: ; preds = %8, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
scalar_t__ sem_post(int /*<<< orphan*/ *);
int /*<<< orphan*/ unix_error(char *);
void V(sem_t *sem) {
  if (sem_post(sem) < 0)
    unix_error("V error");
}


x86 assembly (clang, -O0):
<V>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sem_post@plt>
cmp    $0x0,%rax
jge    114b <V+0x2b>
lea    0xeba(%rip),%rdi
call   1040 <unix_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<V>:
push   %rax
call   1030 <sem_post@plt>
test   %rax,%rax
js     112d <V+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1040 <unix_error@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"V error\00"
define void @V(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i64 @sem_post(i32* %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @unix_error(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"V error\00"
define void @V(i32* %0) {
%2 = tail call i64 @sem_post(i32* %0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @unix_error(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef float uint64_t;

/* Variables and functions */
float milliseconds(uint64_t microseconds) {
  return microseconds / (1000.0f * 1000.0f);
}


x86 assembly (clang, -O0):
<milliseconds>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<milliseconds>:
divss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @milliseconds(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 1.000000e+06
ret float %4
}

LLVM IR (-O2):
define float @milliseconds(float %0) {
%2 = fdiv float %0, 1.000000e+06
ret float %2
}
int sum_single_loop(int a) {
  int su = 0, i;
  for (i = 0; i < a; i++)
    su = su + i;
  return su;
}


x86 assembly (clang, -O0):
<sum_single_loop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1138 <sum_single_loop+0x38>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <sum_single_loop+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_single_loop>:
test   %edi,%edi
jle    1118 <sum_single_loop+0x18>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %rax,%rcx
shr    %rcx
lea    (%rcx,%rdi,1),%eax
add    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sum_single_loop(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
store i32 %12, i32* %3
br label %13
13: ; preds = %9
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @sum_single_loop(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %13
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = zext i32 %4 to i33
%6 = add nsw i32 %0, -2
%7 = zext i32 %6 to i33
%8 = mul i33 %5, %7
%9 = lshr i33 %8, 1
%10 = trunc i33 %9 to i32
%11 = add i32 %10, %0
%12 = add i32 %11, -1
br label %13
13: ; preds = %3, %1
%14 = phi i32 [ 0, %1 ], [ %12, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ HwSparkyBGCHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void HwSparkyBGCUpdated() { UAVObjUpdated(HwSparkyBGCHandle()); }


x86 assembly (clang, -O0):
<HwSparkyBGCUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <HwSparkyBGCHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HwSparkyBGCUpdated>:
push   %rax
xor    %eax,%eax
call   1040 <HwSparkyBGCHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @HwSparkyBGCUpdated() {
%1 = call i32 (...) @HwSparkyBGCHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @HwSparkyBGCUpdated() {
%1 = tail call i32 (...) @HwSparkyBGCHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
void TMTimerSetFrequencyHint(void) {}


x86 assembly (clang, -O0):
<TMTimerSetFrequencyHint>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TMTimerSetFrequencyHint>:
ret

LLVM IR (-O0):
define void @TMTimerSetFrequencyHint() {
ret void
}

LLVM IR (-O2):
define void @TMTimerSetFrequencyHint() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ exit(int);
int open(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void do_open_rd(const char *fname, int *fd) {
  *fd = open(fname, O_RDONLY);
  if (*fd < 0) {
    perror("open");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<do_open_rd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
jge    117d <do_open_rd+0x4d>
lea    0xe92(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_open_rd>:
push   %rbx
mov    %rsi,%rbx
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
mov    %eax,(%rbx)
test   %eax,%eax
js     114a <do_open_rd+0x1a>
pop    %rbx
ret
lea    0xeaf(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@O_RDONLY = global i32 0
@.str = [5 x i8] c"open\00"
define void @do_open_rd(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @O_RDONLY
%7 = call i32 @open(i8* %5, i32 %6)
%8 = load i32*, i32** %4
store i32 %7, i32* %8
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
ret void
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
@.str = [5 x i8] c"open\00"
define void @do_open_rd(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* @O_RDONLY
%4 = tail call i32 @open(i8* %0, i32 %3)
store i32 %4, i32* %1
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void error_exit(char *emsg) {
  fprintf(stderr, "error: \"%s\"", emsg);
  exit(1);
}


x86 assembly (clang, -O0):
<error_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error_exit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [12 x i8] c"error: \22%s\22\00"
define void @error_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [12 x i8] c"error: \22%s\22\00"
define void @error_exit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void printUsage(char *pname) {
  fprintf(stderr, "usage: %s [-r] <intel-hexfile>\n", pname);
}


x86 assembly (clang, -O0):
<printUsage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printUsage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [32 x i8] c"usage: %s [-r] <intel-hexfile>\0A\00"
define void @printUsage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [32 x i8] c"usage: %s [-r] <intel-hexfile>\0A\00"
define void @printUsage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
int access(char *, int /*<<< orphan*/);
int /*<<< orphan*/ assert(char *);
bool files_exists(char *path) {
  assert(path);
  return access(path, F_OK) != -1;
}


x86 assembly (clang, -O0):
<files_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    0x2e98(%rip),%rax
mov    (%rax),%esi
call   1040 <access@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<files_exists>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1040 <access@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @files_exists(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @assert(i8* %3)
%5 = load i8*, i8** %2
%6 = load i32, i32* @F_OK
%7 = call i32 @access(i8* %5, i32 %6)
%8 = icmp ne i32 %7, -1
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @files_exists(i8* %0) {
%2 = tail call i32 @assert(i8* %0)
%3 = load i32, i32* @F_OK
%4 = tail call i32 @access(i8* %0, i32 %3)
%5 = icmp ne i32 %4, -1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int ceil(int);
int log(int);
int default_l(int len) { return ceil(1 + log(len) / log(4)); }


x86 assembly (clang, -O0):
<default_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <log@plt>
mov    %eax,-0x8(%rbp)
mov    $0x4,%edi
call   1040 <log@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,%edi
add    $0x1,%edi
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_l>:
push   %rbx
call   1040 <log@plt>
mov    %eax,%ebx
mov    $0x4,%edi
call   1040 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
lea    0x1(%rax),%edi
pop    %rbx
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define i32 @default_l(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @log(i32 %3)
%5 = call i32 @log(i32 4)
%6 = sdiv i32 %4, %5
%7 = add nsw i32 1, %6
%8 = call i32 @ceil(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @default_l(i32 %0) {
%2 = tail call i32 @log(i32 %0)
%3 = tail call i32 @log(i32 4)
%4 = sdiv i32 %2, %3
%5 = add nsw i32 %4, 1
%6 = tail call i32 @ceil(i32 %5)
ret i32 %6
}
/* Variables and functions */
int read_u16(unsigned char const *);
unsigned int read_u32(const unsigned char *b) {
  return (unsigned int)(read_u16(b) + (read_u16(b + 2) << 16));
}


x86 assembly (clang, -O0):
<read_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <read_u16@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x2,%rdi
call   1030 <read_u16@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
shl    $0x10,%ecx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_u32>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <read_u16@plt>
mov    %eax,%ebp
add    $0x2,%rbx
mov    %rbx,%rdi
call   1030 <read_u16@plt>
shl    $0x10,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_u32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @read_u16(i8* %3)
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 2
%7 = call i32 @read_u16(i8* %6)
%8 = shl i32 %7, 16
%9 = add nsw i32 %4, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @read_u32(i8* %0) {
%2 = tail call i32 @read_u16(i8* %0)
%3 = getelementptr inbounds i8, i8* %0, i64 2
%4 = tail call i32 @read_u16(i8* %3)
%5 = shl i32 %4, 16
%6 = add nsw i32 %5, %2
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ EV_KEY;
int /*<<< orphan*/ EV_SYN;
int SYN_REPORT;
int /*<<< orphan*/ input_event(int /*<<< orphan*/, int, int);
void send_a_key(int key_event_code, int down) {
  input_event(EV_KEY, key_event_code, !!down);
  input_event(EV_SYN, SYN_REPORT, 0);
}


x86 assembly (clang, -O0):
<send_a_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edx
call   1030 <input_event@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    0x2e89(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <input_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_a_key>:
push   %rax
mov    %edi,%eax
mov    0x2ec6(%rip),%rcx
mov    (%rcx),%edi
xor    %edx,%edx
test   %esi,%esi
setne  %dl
mov    %eax,%esi
call   1030 <input_event@plt>
mov    0x2ebf(%rip),%rax
mov    (%rax),%edi
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
pop    %rax
jmp    1030 <input_event@plt>

LLVM IR (-O0):
@EV_KEY = global i32 0
@EV_SYN = global i32 0
@SYN_REPORT = global i32 0
define void @send_a_key(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @EV_KEY
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
%12 = call i32 @input_event(i32 %5, i32 %6, i32 %11)
%13 = load i32, i32* @EV_SYN
%14 = load i32, i32* @SYN_REPORT
%15 = call i32 @input_event(i32 %13, i32 %14, i32 0)
ret void
}

LLVM IR (-O2):
@EV_KEY = global i32 0
@EV_SYN = global i32 0
@SYN_REPORT = global i32 0
define void @send_a_key(i32 %0, i32 %1) {
%3 = load i32, i32* @EV_KEY
%4 = icmp ne i32 %1, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @input_event(i32 %3, i32 %0, i32 %5)
%7 = load i32, i32* @EV_SYN
%8 = load i32, i32* @SYN_REPORT
%9 = tail call i32 @input_event(i32 %7, i32 %8, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void show_function(void *addr) { assert(!"not implemented"); }


x86 assembly (clang, -O0):
<show_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_function>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"not implemented\00"
define void @show_function(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @show_function(i8* nocapture readnone %0) {
%2 = tail call i32 @assert(i32 0)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool tsaf_has_discontinuity(const uint8_t *p_ts) { return !!(p_ts[5] & 0x80); }


x86 assembly (clang, -O0):
<tsaf_has_discontinuity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
and    $0x80,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tsaf_has_discontinuity>:
mov    0x14(%rdi),%eax
shr    $0x7,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @tsaf_has_discontinuity(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = and i32 %5, 128
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @tsaf_has_discontinuity(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = lshr i32 %3, 7
%5 = and i32 %4, 1
ret i32 %5
}
/* Variables and functions */
int M_PI;
double cos(int);
double hamming(double x) { return 0.54 - 0.46 * cos((2 * M_PI) * x); }


x86 assembly (clang, -O0):
<hamming>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
mulsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <cos@plt>
movsd  0xebd(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb9(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hamming>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%eax
add    %eax,%eax
cvtsi2sd %eax,%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%edi
call   1030 <cos@plt>
mulsd  0xecb(%rip),%xmm0
addsd  0xecb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = global i32 0
define double @hamming(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load i32, i32* @M_PI
%4 = mul nsw i32 2, %3
%5 = sitofp i32 %4 to double
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = fptosi double %7 to i32
%9 = call double @cos(i32 %8)
%10 = call double @llvm.fmuladd.f64(double -4.600000e-01, double %9, double 5.400000e-01)
ret double %10
}

LLVM IR (-O2):
@M_PI = global i32 0
define double @hamming(double %0) {
%2 = load i32, i32* @M_PI
%3 = shl nsw i32 %2, 1
%4 = sitofp i32 %3 to double
%5 = fmul double %4, %0
%6 = fptosi double %5 to i32
%7 = tail call double @cos(i32 %6)
%8 = tail call double @llvm.fmuladd.f64(double %7, double -4.600000e-01, double 5.400000e-01)
ret double %8
}
/* Type definitions */
struct cpufreq_affected_cpus {
  int dummy;
};

/* Variables and functions */
struct cpufreq_affected_cpus *proc_get_affected_cpus(unsigned int cpu) {
  return NULL;
}


x86 assembly (clang, -O0):
<proc_get_affected_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_get_affected_cpus>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cpufreq_affected_cpus = type { i32 }
define %struct.cpufreq_affected_cpus* @proc_get_affected_cpus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret %struct.cpufreq_affected_cpus* null
}

LLVM IR (-O2):
%struct.cpufreq_affected_cpus = type { i32 }
define noalias %struct.cpufreq_affected_cpus* @proc_get_affected_cpus(i32 %0) {
ret %struct.cpufreq_affected_cpus* null
}
int blink1_degamma_log2lin(int n) {
  return (((1 << (n / 32)) - 1) + ((1 << (n / 32)) * ((n % 32) + 1) + 15) / 32);
}


x86 assembly (clang, -O0):
<blink1_degamma_log2lin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    $0x1,%edx
imul   %edx,%eax
add    $0xf,%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blink1_degamma_log2lin>:
lea    0x1f(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
mov    %eax,%ecx
sar    $0x5,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
and    $0xffffffe0,%eax
neg    %eax
add    %edi,%eax
add    $0x1,%eax
shl    %cl,%eax
not    %edx
lea    0xf(%rax),%ecx
add    $0x2e,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x5,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @blink1_degamma_log2lin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 32
%5 = shl i32 1, %4
%6 = sub nsw i32 %5, 1
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 32
%9 = shl i32 1, %8
%10 = load i32, i32* %2
%11 = srem i32 %10, 32
%12 = add nsw i32 %11, 1
%13 = mul nsw i32 %9, %12
%14 = add nsw i32 %13, 15
%15 = sdiv i32 %14, 32
%16 = add nsw i32 %6, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @blink1_degamma_log2lin(i32 %0) {
%2 = sdiv i32 %0, 32
%3 = shl nsw i32 -1, %2
%4 = xor i32 %3, -1
%5 = srem i32 %0, 32
%6 = add nsw i32 %5, 1
%7 = shl i32 %6, %2
%8 = add nsw i32 %7, 15
%9 = sdiv i32 %8, 32
%10 = add nsw i32 %9, %4
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int EXIT_FAILURE;
int EXIT_SUCCESS;
scalar_t__ linkat(int /*<<< orphan*/, char *, int /*<<< orphan*/, char *,
                  int /*<<< orphan*/);
int main(void) {
  if (0 > linkat(AT_FDCWD, "arnold.layne", AT_FDCWD, "arnold.layne.hard", 0))
    return EXIT_FAILURE;
  else
    return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
mov    0x2e99(%rip),%rax
mov    (%rax),%edx
lea    0xec8(%rip),%rsi
lea    0xece(%rip),%rcx
xor    %r8d,%r8d
call   1030 <linkat@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jle    1166 <main+0x56>
mov    0x2e84(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1172 <main+0x62>
mov    0x2e6b(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
lea    0xee5(%rip),%rcx
mov    %edi,%edx
xor    %r8d,%r8d
call   1030 <linkat@plt>
test   %rax,%rax
jns    1140 <main+0x30>
mov    0x2ea2(%rip),%rax
jmp    1147 <main+0x37>
mov    0x2e91(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@AT_FDCWD = global i32 0
@.str = [13 x i8] c"arnold.layne\00"
@.str.1 = [18 x i8] c"arnold.layne.hard\00"
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @AT_FDCWD
%3 = load i32, i32* @AT_FDCWD
%4 = call i64 @linkat(i32 %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 0)
%5 = icmp sgt i64 0, %4
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* @EXIT_FAILURE
store i32 %7, i32* %1
br label %10
8: ; preds = %0
%9 = load i32, i32* @EXIT_SUCCESS
store i32 %9, i32* %1
br label %10
10: ; preds = %8, %6
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@AT_FDCWD = global i32 0
@.str = [13 x i8] c"arnold.layne\00"
@.str.1 = [18 x i8] c"arnold.layne.hard\00"
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @AT_FDCWD
%2 = tail call i64 @linkat(i32 %1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 0)
%3 = icmp slt i64 %2, 0
%4 = load i32, i32* @EXIT_FAILURE
%5 = load i32, i32* @EXIT_SUCCESS
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
int lw6map_team_color_is_valid(int team_color) {
  return (team_color >= 0 && team_color < 10);
}


x86 assembly (clang, -O0):
<lw6map_team_color_is_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <lw6map_team_color_is_valid+0x20>
cmpl   $0xa,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lw6map_team_color_is_valid>:
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @lw6map_team_color_is_valid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 10
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @lw6map_team_color_is_valid(i32 %0) {
%2 = icmp ult i32 %0, 10
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int read(int, void *, size_t);
size_t safe_read(int fd, void *buf, size_t count) {
  int r;
  do {
    r = read(fd, buf, count);
  } while (r == -1 && errno == EINTR);
  return r;
}


x86 assembly (clang, -O0):
<safe_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
cmpl   $0xffffffff,-0x1c(%rbp)
mov    %al,-0x1d(%rbp)
jne    115f <safe_read+0x4f>
mov    0x2e94(%rip),%rax
mov    (%rax),%rax
mov    0x2e82(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    1123 <safe_read+0x13>
movslq -0x1c(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_read>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <read@plt>
cmp    $0xffffffff,%eax
jne    114b <safe_read+0x3b>
mov    (%r12),%rcx
cmp    %rcx,(%r15)
je     1130 <safe_read+0x20>
cltq
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i64 @safe_read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %4
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = call i32 @read(i32 %9, i8* %10, i64 %11)
store i32 %12, i32* %7
br label %13
13: ; preds = %8
%14 = load i32, i32* %7
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %20
16: ; preds = %13
%17 = load i64, i64* @errno
%18 = load i64, i64* @EINTR
%19 = icmp eq i64 %17, %18
br label %20
20: ; preds = %16, %13
%21 = phi i1 [ false, %13 ], [ %19, %16 ]
br i1 %21, label %8, label %22
22: ; preds = %20
%23 = load i32, i32* %7
%24 = sext i32 %23 to i64
ret i64 %24
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i64 @safe_read(i32 %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %4, %3
%5 = tail call i32 @read(i32 %0, i8* %1, i64 %2)
%6 = icmp eq i32 %5, -1
%7 = load i64, i64* @errno
%8 = load i64, i64* @EINTR
%9 = icmp eq i64 %7, %8
%10 = select i1 %6, i1 %9, i1 false
br i1 %10, label %4, label %11
11: ; preds = %4
%12 = sext i32 %5 to i64
ret i64 %12
}
/* Type definitions */
struct gps_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void sky_gps_endian_swap(struct gps_t *p) {
  assert(p != NULL);
  ;
  ;
  ;
  ;
  ;
  ;
}


x86 assembly (clang, -O0):
<sky_gps_endian_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sky_gps_endian_swap>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
mov    %eax,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
%struct.gps_t = type { i32 }
define void @sky_gps_endian_swap(%struct.gps_t* %0) {
%2 = alloca %struct.gps_t*
store %struct.gps_t* %0, %struct.gps_t** %2
%3 = load %struct.gps_t*, %struct.gps_t** %2
%4 = icmp ne %struct.gps_t* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret void
}

LLVM IR (-O2):
%struct.gps_t = type { i32 }
define void @sky_gps_endian_swap(%struct.gps_t* readnone %0) {
%2 = icmp ne %struct.gps_t* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}
void PDMR3DeviceDetach(void) {}


x86 assembly (clang, -O0):
<PDMR3DeviceDetach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMR3DeviceDetach>:
ret

LLVM IR (-O0):
define void @PDMR3DeviceDetach() {
ret void
}

LLVM IR (-O2):
define void @PDMR3DeviceDetach() {
ret void
}
void pthread_setcancelstate() {}


x86 assembly (clang, -O0):
<pthread_setcancelstate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_setcancelstate>:
ret

LLVM IR (-O0):
define void @pthread_setcancelstate() {
ret void
}

LLVM IR (-O2):
define void @pthread_setcancelstate() {
ret void
}
int rt_open_handler(const char *path, void *io_ctx) { return 0; }


x86 assembly (clang, -O0):
<rt_open_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_open_handler>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rt_open_handler(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @rt_open_handler(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
void retro_set_controller_port_device(unsigned port, unsigned device) {}


x86 assembly (clang, -O0):
<retro_set_controller_port_device>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<retro_set_controller_port_device>:
ret

LLVM IR (-O0):
define void @retro_set_controller_port_device(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @retro_set_controller_port_device(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *lfs1_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<lfs1_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lfs1_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @lfs1_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @lfs1_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
int g(double v) { return 0; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @g(double %0) {
%2 = alloca double
store double %0, double* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @g(double %0) {
ret i32 0
}
/* Variables and functions */
int errno;
int idris2_getErrno() { return errno; }


x86 assembly (clang, -O0):
<idris2_getErrno>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idris2_getErrno>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @idris2_getErrno() {
%1 = load i32, i32* @errno
ret i32 %1
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @idris2_getErrno() {
%1 = load i32, i32* @errno
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ pre_process(int *, int);
int /*<<< orphan*/ printf(char *, int);
int query(int *, int, int);
int main() {
  int a[10] = {1, 3, 5, 7, 9, 2, 4, 6, 8, 10};
  pre_process(a, 10);
  int sum = query(a, 2, 4);
  printf("sum of a[2] to a[4] is:%d\n", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xea6(%rip),%rsi
mov    $0x28,%edx
call   1050 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1060 <pre_process@plt>
lea    -0x30(%rbp),%rdi
mov    $0x2,%esi
mov    $0x4,%edx
call   1040 <query@plt>
mov    %eax,-0x34(%rbp)
mov    -0x34(%rbp),%esi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    0xee4(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeac(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1050 <pre_process@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
mov    $0x4,%edx
call   1040 <query@plt>
lea    0xea7(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.a = [10 x i32] [i32 1, i32 3, i32 5, i32 7, i32 9, i32 2, i32 4, i32 6, i32 8, i32 10]
@.str = [27 x i8] c"sum of a[2] to a[4] is:%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [10 x i32]* %2 to i8*
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%6 = call i32 @pre_process(i32* %5, i32 10)
%7 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%8 = call i32 @query(i32* %7, i32 2, i32 4)
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [10 x i32] [i32 1, i32 3, i32 5, i32 7, i32 9, i32 2, i32 4, i32 6, i32 8, i32 10]
@.str = [27 x i8] c"sum of a[2] to a[4] is:%d\0A\00"
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @pre_process(i32* %3, i32 10)
%5 = call i32 @query(i32* %3, i32 2, i32 4)
%6 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}