xunge/DecIR huggingface dataset:
void d2i_X509_NAME_ENTRY(void) {}


x86 assembly (clang, -O0):
<d2i_X509_NAME_ENTRY>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_X509_NAME_ENTRY>:
ret

LLVM IR (-O0):
define void @d2i_X509_NAME_ENTRY() {
ret void
}

LLVM IR (-O2):
define void @d2i_X509_NAME_ENTRY() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGHUP;
int /*<<< orphan*/ sig_default(int /*<<< orphan*/);
extern void sig_hup_default(void) { sig_default(SIGHUP); }


x86 assembly (clang, -O0):
<sig_hup_default>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%edi
call   1030 <sig_default@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_hup_default>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sig_default@plt>

LLVM IR (-O0):
@SIGHUP = global i32 0
define void @sig_hup_default() {
%1 = load i32, i32* @SIGHUP
%2 = call i32 @sig_default(i32 %1)
ret void
}

LLVM IR (-O2):
@SIGHUP = global i32 0
define void @sig_hup_default() {
%1 = load i32, i32* @SIGHUP
%2 = tail call i32 @sig_default(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ setbuf(int /*<<< orphan*/ *, char *);
__attribute__((__weak__, __always___)) void softboundcets_setbuf(FILE *stream,
                                                                 char *buf) {
  setbuf(stream, buf);
}


x86 assembly (clang, -O0):
<softboundcets_setbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <setbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_setbuf>:
jmp    1030 <setbuf@plt>

LLVM IR (-O0):
define weak void @softboundcets_setbuf(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @setbuf(i32* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define weak void @softboundcets_setbuf(i32* %0, i8* %1) {
%3 = tail call i32 @setbuf(i32* %0, i8* %1)
ret void
}
void gtk_label_set_selectable() {}


x86 assembly (clang, -O0):
<gtk_label_set_selectable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_label_set_selectable>:
ret

LLVM IR (-O0):
define void @gtk_label_set_selectable() {
ret void
}

LLVM IR (-O2):
define void @gtk_label_set_selectable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char, char, char);
void trace(int s) {
  unsigned int x;
  char hex[17] = "0123456789ABCDEF";
  x = ((int *)&s)[4];
  printf("%c%c%c%c\n", hex[x >> 12], hex[(x & 0xf00) >> 8],
         hex[(x & 0xf0) >> 4], hex[x & 0xf]);
}


x86 assembly (clang, -O0):
<trace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    0xede(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xedb(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed9(%rip),%al
mov    %al,-0x10(%rbp)
mov    0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0xc,%eax
mov    %eax,%eax
mov    -0x20(%rbp,%rax,1),%sil
mov    -0x8(%rbp),%eax
and    $0xf00,%eax
shr    $0x8,%eax
mov    %eax,%eax
mov    -0x20(%rbp,%rax,1),%dl
mov    -0x8(%rbp),%eax
and    $0xf0,%eax
shr    $0x4,%eax
mov    %eax,%eax
mov    -0x20(%rbp,%rax,1),%cl
mov    -0x8(%rbp),%eax
and    $0xf,%eax
mov    %eax,%eax
lea    0xe93(%rip),%rdi
movsbl %sil,%esi
movsbl %dl,%edx
movsbl %cl,%ecx
movsbl -0x20(%rbp,%rax,1),%r8d
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <printf@plt>

LLVM IR (-O0):
@__const.trace.hex = [17 x i8] c"0123456789ABCDEF\00"
@.str = [10 x i8] c"%c%c%c%c\0A\00"
define void @trace(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [17 x i8]
store i32 %0, i32* %2
%5 = bitcast [17 x i8]* %4 to i8*
%6 = getelementptr inbounds i32, i32* %2, i64 4
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = lshr i32 %8, 12
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds [17 x i8], [17 x i8]* %4, i64 0, i64 %10
%12 = load i8, i8* %11
%13 = load i32, i32* %3
%14 = and i32 %13, 3840
%15 = lshr i32 %14, 8
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds [17 x i8], [17 x i8]* %4, i64 0, i64 %16
%18 = load i8, i8* %17
%19 = load i32, i32* %3
%20 = and i32 %19, 240
%21 = lshr i32 %20, 4
%22 = zext i32 %21 to i64
%23 = getelementptr inbounds [17 x i8], [17 x i8]* %4, i64 0, i64 %22
%24 = load i8, i8* %23
%25 = load i32, i32* %3
%26 = and i32 %25, 15
%27 = zext i32 %26 to i64
%28 = getelementptr inbounds [17 x i8], [17 x i8]* %4, i64 0, i64 %27
%29 = load i8, i8* %28
%30 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8 signext %12, i8 signext %18, i8 signext %24, i8 signext %29)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%c%c%c%c\0A\00"
define void @trace(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8 signext undef, i8 signext undef, i8 signext undef, i8 signext undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGTSTP;
int /*<<< orphan*/ killpg(int /*<<< orphan*/, int /*<<< orphan*/);
void wrap_sendsigtstp() { killpg(0, SIGTSTP); }


x86 assembly (clang, -O0):
<wrap_sendsigtstp>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1030 <killpg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_sendsigtstp>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
jmp    1030 <killpg@plt>

LLVM IR (-O0):
@SIGTSTP = global i32 0
define void @wrap_sendsigtstp() {
%1 = load i32, i32* @SIGTSTP
%2 = call i32 @killpg(i32 0, i32 %1)
ret void
}

LLVM IR (-O2):
@SIGTSTP = global i32 0
define void @wrap_sendsigtstp() {
%1 = load i32, i32* @SIGTSTP
%2 = tail call i32 @killpg(i32 0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void joga(int x) {
  printf("joga %d\n", x);
  x++;
  printf("joga %d\n", x);
}


x86 assembly (clang, -O0):
<joga>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<joga>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0xee3(%rip),%r14
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"joga %d\0A\00"
define void @joga(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"joga %d\0A\00"
define void @joga(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = add nsw i32 %0, 1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
char *hash_plugin_summary(void) {
  return ("sha1sha1 \tsha1(sha1(pass)) plugin");
}


x86 assembly (clang, -O0):
<hash_plugin_summary>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_summary>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [34 x i8] c"sha1sha1 \09sha1(sha1(pass)) plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [34 x i8] c"sha1sha1 \09sha1(sha1(pass)) plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ mask;

/* Variables and functions */
int syscall(int, int, int /*<<< orphan*/ const *, int, int);
int signalfd(int fd, const sigset_t *mask, int flags) {
  return syscall(289, fd, mask, sizeof(mask), flags);
}


x86 assembly (clang, -O0):
<signalfd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%r8d
mov    $0x121,%edi
mov    $0x8,%ecx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signalfd>:
mov    %edx,%r8d
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x121,%edi
mov    $0x8,%ecx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @signalfd(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = call i32 @syscall(i32 289, i32 %7, i32* %8, i32 8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @signalfd(i32 %0, i32* %1, i32 %2) {
%4 = tail call i32 @syscall(i32 289, i32 %0, i32* %1, i32 8, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(unsigned char, unsigned char);
void SensorSetReg_NOON30PC11(unsigned short uAddr, unsigned short uVal) {
  VIM_SIF_I2cWriteByte((unsigned char)uAddr, (unsigned char)uVal);
}


x86 assembly (clang, -O0):
<SensorSetReg_NOON30PC11>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
mov    %al,%cl
mov    -0x4(%rbp),%ax
movzbl %cl,%edi
movzbl %al,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetReg_NOON30PC11>:
movzbl %dil,%edi
movzbl %sil,%esi
jmp    1030 <VIM_SIF_I2cWriteByte@plt>

LLVM IR (-O0):
define void @SensorSetReg_NOON30PC11(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = trunc i16 %5 to i8
%7 = load i16, i16* %4
%8 = trunc i16 %7 to i8
%9 = call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %6, i8 zeroext %8)
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_NOON30PC11(i16 zeroext %0, i16 zeroext %1) {
%3 = trunc i16 %0 to i8
%4 = trunc i16 %1 to i8
%5 = tail call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %3, i8 zeroext %4)
ret void
}
int toDecimal(int n, int b) {
  int result = 0;
  int multiplier = 1;
  while (n > 0) {
    result += n % 10 * multiplier;
    multiplier *= b;
    n /= 10;
  }
  return result;
}


x86 assembly (clang, -O0):
<toDecimal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1156 <toDecimal+0x56>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
imul   -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    1118 <toDecimal+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toDecimal>:
xor    %eax,%eax
test   %edi,%edi
jle    1147 <toDecimal+0x47>
mov    $0x1,%r9d
mov    $0xcccccccd,%r8d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %edi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%ecx
lea    (%rcx,%rcx,4),%r10d
mov    %edi,%ecx
sub    %r10d,%ecx
imul   %r9d,%ecx
add    %ecx,%eax
imul   %esi,%r9d
cmp    $0x9,%edi
mov    %edx,%edi
ja     1120 <toDecimal+0x20>
ret

LLVM IR (-O0):
define i32 @toDecimal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 1, i32* %6
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %7
%11 = load i32, i32* %3
%12 = srem i32 %11, 10
%13 = load i32, i32* %6
%14 = mul nsw i32 %12, %13
%15 = load i32, i32* %5
%16 = add nsw i32 %15, %14
store i32 %16, i32* %5
%17 = load i32, i32* %4
%18 = load i32, i32* %6
%19 = mul nsw i32 %18, %17
store i32 %19, i32* %6
%20 = load i32, i32* %3
%21 = sdiv i32 %20, 10
store i32 %21, i32* %3
br label %7
22: ; preds = %7
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @toDecimal(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %14
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 1, %2 ]
%6 = phi i32 [ %10, %4 ], [ 0, %2 ]
%7 = phi i32 [ %12, %4 ], [ %0, %2 ]
%8 = urem i32 %7, 10
%9 = mul nsw i32 %5, %8
%10 = add nsw i32 %9, %6
%11 = mul nsw i32 %5, %1
%12 = udiv i32 %7, 10
%13 = icmp ult i32 %7, 10
br i1 %13, label %14, label %4
14: ; preds = %4, %2
%15 = phi i32 [ 0, %2 ], [ %10, %4 ]
ret i32 %15
}
/* Variables and functions */
unsigned int __get_cpsr();
int /*<<< orphan*/ __set_cpsr(unsigned int);
unsigned FIQ_restore(unsigned old_cpsr) {
  unsigned _cpsr_val;
  _cpsr_val = __get_cpsr();
  __set_cpsr((_cpsr_val & ~0x00000040) | (old_cpsr & 0x00000040));
  return _cpsr_val;
}


x86 assembly (clang, -O0):
<FIQ_restore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__get_cpsr@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
and    $0xffffffbf,%edi
mov    -0x4(%rbp),%eax
and    $0x40,%eax
or     %eax,%edi
call   1030 <__set_cpsr@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FIQ_restore>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <__get_cpsr@plt>
mov    %eax,%ebp
and    $0xffffffbf,%eax
and    $0x40,%ebx
or     %eax,%ebx
mov    %ebx,%edi
call   1030 <__set_cpsr@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @FIQ_restore(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @__get_cpsr()
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = and i32 %5, -65
%7 = load i32, i32* %2
%8 = and i32 %7, 64
%9 = or i32 %6, %8
%10 = call i32 @__set_cpsr(i32 %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @FIQ_restore(i32 %0) {
%2 = tail call i32 (...) @__get_cpsr()
%3 = and i32 %2, -65
%4 = and i32 %0, 64
%5 = or i32 %3, %4
%6 = tail call i32 @__set_cpsr(i32 %5)
ret i32 %2
}
int foo(int a) {
  if (a)
    return a * (2 * (foo(a - 1))) + a + 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     114f <foo+0x3f>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <foo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
shl    $0x1,%ecx
imul   %ecx,%eax
add    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <foo+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %edi,%edi
je     112a <foo+0x1a>
push   %rbx
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <foo@plt>
imul   %ebx,%eax
lea    (%rbx,%rax,2),%eax
add    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i32, i32* %3
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @foo(i32 %9)
%11 = mul nsw i32 2, %10
%12 = mul nsw i32 %7, %11
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %17
16: ; preds = %1
store i32 0, i32* %2
br label %17
17: ; preds = %16, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i32 [ %11, %5 ], [ 0, %1 ]
ret i32 %4
5: ; preds = %1
%6 = add nsw i32 %0, -1
%7 = tail call i32 @foo(i32 %6)
%8 = shl i32 %0, 1
%9 = mul i32 %8, %7
%10 = add i32 %0, 1
%11 = add i32 %10, %9
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main() {
  puts("Hello World!");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct rb_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct rb_node *);
void rb_node_free(struct rb_node *x) { free(x); }


x86 assembly (clang, -O0):
<rb_node_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_node_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.rb_node = type { i32 }
define void @rb_node_free(%struct.rb_node* %0) {
%2 = alloca %struct.rb_node*
store %struct.rb_node* %0, %struct.rb_node** %2
%3 = load %struct.rb_node*, %struct.rb_node** %2
%4 = call i32 @free(%struct.rb_node* %3)
ret void
}

LLVM IR (-O2):
%struct.rb_node = type { i32 }
define void @rb_node_free(%struct.rb_node* nocapture %0) {
%2 = tail call i32 @free(%struct.rb_node* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fwrite(unsigned char *, int, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int main() {
  unsigned char b = 0xff;
  while (1)
    fwrite(&b, 1, 1, stdout);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0xff,-0x5(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%ecx
lea    -0x5(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fwrite@plt>
jmp    1123 <main+0x13>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movb   $0xff,0x7(%rsp)
mov    0x2ec0(%rip),%r14
lea    0x7(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14),%ecx
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
jmp    1130 <main+0x20>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 -1, i8* %2
br label %3
3: ; preds = %0, %3
%4 = load i32, i32* @stdout
%5 = call i32 @fwrite(i8* %2, i32 1, i32 1, i32 %4)
br label %3
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @main() {
%1 = alloca i8
store i8 -1, i8* %1
br label %2
2: ; preds = %2, %0
%3 = load i32, i32* @stdout
%4 = call i32 @fwrite(i8* %1, i32 1, i32 1, i32 %3)
br label %2
}
void gtk_gc_release() {}


x86 assembly (clang, -O0):
<gtk_gc_release>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_gc_release>:
ret

LLVM IR (-O0):
define void @gtk_gc_release() {
ret void
}

LLVM IR (-O2):
define void @gtk_gc_release() {
ret void
}
A0RX1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (*((short *)10000000)) = (p1[x1]); }


x86 assembly (clang, -O0):
<A0RX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,2),%cx
mov    $0x989680,%eax
mov    %cx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<A0RX1>:
movslq %ecx,%rax
movzwl (%r9,%rax,2),%eax
mov    %ax,0x989680
ret

LLVM IR (-O0):
define i32 @A0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i16, i16* %16, i64 %18
%20 = load i16, i16* %19
store i16 %20, i16* inttoptr (i64 10000000 to i16*)
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @A0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i16, i16* %5, i64 %7
%9 = load i16, i16* %8
store i16 %9, i16* inttoptr (i64 10000000 to i16*)
ret i32 undef
}
/* Type definitions */
struct pop3_message {
  int dummy;
};

/* Variables and functions */
struct pop3_message *_default_storage_first_message() {
  return NULL;
}


x86 assembly (clang, -O0):
<_default_storage_first_message>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_default_storage_first_message>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pop3_message = type { i32 }
define %struct.pop3_message* @_default_storage_first_message() {
ret %struct.pop3_message* null
}

LLVM IR (-O2):
%struct.pop3_message = type { i32 }
define noalias %struct.pop3_message* @_default_storage_first_message() {
ret %struct.pop3_message* null
}
/* Variables and functions */
int /*<<< orphan*/ dprintf(int, char *, ...);
int help_shortcmdline(int brief, const char *program, const char *argstring) {
  dprintf(2, "\n");
  dprintf(2, "\t");
  dprintf(2, "%s %s", program, argstring);
  return brief;
}


x86 assembly (clang, -O0):
<help_shortcmdline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x2,%edi
lea    0xed1(%rip),%rsi
mov    $0x0,%al
call   1030 <dprintf@plt>
mov    $0x2,%edi
lea    0xec0(%rip),%rsi
mov    $0x0,%al
call   1030 <dprintf@plt>
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x2,%edi
lea    0xea7(%rip),%rsi
mov    $0x0,%al
call   1030 <dprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_shortcmdline>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
lea    0xedd(%rip),%rsi
mov    $0x2,%edi
xor    %eax,%eax
call   1030 <dprintf@plt>
lea    0xecc(%rip),%rsi
mov    $0x2,%edi
xor    %eax,%eax
call   1030 <dprintf@plt>
lea    0xebb(%rip),%rsi
mov    $0x2,%edi
mov    %rbx,%rdx
mov    %r14,%rcx
xor    %eax,%eax
call   1030 <dprintf@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
@.str.1 = [2 x i8] c"\09\00"
@.str.2 = [6 x i8] c"%s %s\00"
define i32 @help_shortcmdline(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = call i32 (i32, i8*, ...) @dprintf(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = call i32 (i32, i8*, ...) @dprintf(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 (i32, i8*, ...) @dprintf(i32 2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* %9, i8* %10)
%12 = load i32, i32* %4
ret i32 %12
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
@.str.1 = [2 x i8] c"\09\00"
@.str.2 = [6 x i8] c"%s %s\00"
define i32 @help_shortcmdline(i32 returned %0, i8* %1, i8* %2) {
%4 = tail call i32 (i32, i8*, ...) @dprintf(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 (i32, i8*, ...) @dprintf(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 (i32, i8*, ...) @dprintf(i32 2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* %1, i8* %2)
ret i32 %0
}
int isPSquare(int a) {
  for (int i = 0; i <= a; i++) {
    if (a == i * i) {
      return 0;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<isPSquare>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     114b <isPSquare+0x4b>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
jne    1138 <isPSquare+0x38>
movl   $0x0,-0x4(%rbp)
jmp    1152 <isPSquare+0x52>
jmp    113d <isPSquare+0x3d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <isPSquare+0xe>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPSquare>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
cmp    %edi,%eax
jg     1122 <isPSquare+0x22>
mov    %ecx,%edx
imul   %ecx,%edx
lea    0x1(%rcx),%eax
cmp    %edi,%edx
jne    1110 <isPSquare+0x10>
xor    %eax,%eax
cmp    %edi,%ecx
setg   %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @isPSquare(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = mul nsw i32 %11, %12
%14 = icmp eq i32 %10, %13
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 0, i32* %2
br label %21
16: ; preds = %9
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 -1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @isPSquare(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %8, %2 ]
%4 = icmp sgt i32 %3, %0
%5 = mul nsw i32 %3, %3
%6 = icmp eq i32 %5, %0
%7 = select i1 %4, i1 true, i1 %6
%8 = add nuw nsw i32 %3, 1
br i1 %7, label %9, label %2
9: ; preds = %2
%10 = sext i1 %4 to i32
ret i32 %10
}
void atmega_gpio_Test_01_targetInit__I() {}


x86 assembly (clang, -O0):
<atmega_gpio_Test_01_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atmega_gpio_Test_01_targetInit__I>:
ret

LLVM IR (-O0):
define void @atmega_gpio_Test_01_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @atmega_gpio_Test_01_targetInit__I() {
ret void
}
void crypto_aead_setauthsize(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<crypto_aead_setauthsize>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_aead_setauthsize>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.crypto_aead_setauthsize = [24 x i8] c"crypto_aead_setauthsize\00"
define void @crypto_aead_setauthsize() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @__func__.crypto_aead_setauthsize, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.crypto_aead_setauthsize = [24 x i8] c"crypto_aead_setauthsize\00"
define void @crypto_aead_setauthsize() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @__func__.crypto_aead_setauthsize, i64 0, i64 0))
ret void
}
/* Variables and functions */
int mintaka_index_allocate3(char const *, int, char const *, char const *, int);
int mintaka_index_allocate3_(const char *string, int *number,
                             const char *string2, const char *string3,
                             int *event) {
  return mintaka_index_allocate3(string, *number, string2, string3, *event);
}


x86 assembly (clang, -O0):
<mintaka_index_allocate3_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    (%rax),%r8d
call   1030 <mintaka_index_allocate3@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mintaka_index_allocate3_>:
mov    (%rsi),%esi
mov    (%r8),%r8d
jmp    1030 <mintaka_index_allocate3@plt>

LLVM IR (-O0):
define i32 @mintaka_index_allocate3_(i8* %0, i32* %1, i8* %2, i8* %3, i32* %4) {
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32*
store i8* %0, i8** %6
store i32* %1, i32** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i32* %4, i32** %10
%11 = load i8*, i8** %6
%12 = load i32*, i32** %7
%13 = load i32, i32* %12
%14 = load i8*, i8** %8
%15 = load i8*, i8** %9
%16 = load i32*, i32** %10
%17 = load i32, i32* %16
%18 = call i32 @mintaka_index_allocate3(i8* %11, i32 %13, i8* %14, i8* %15, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @mintaka_index_allocate3_(i8* %0, i32* nocapture %1, i8* %2, i8* %3, i32* nocapture %4) {
%6 = load i32, i32* %1
%7 = load i32, i32* %4
%8 = tail call i32 @mintaka_index_allocate3(i8* %0, i32 %6, i8* %2, i8* %3, i32 %7)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_TIME;

/* Variables and functions */
int /*<<< orphan*/ ASN1_TIME_it;
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
ASN1_TIME *ASN1_TIME_new(void) {
  return (ASN1_TIME *)ASN1_item_new(&ASN1_TIME_it);
}


x86 assembly (clang, -O0):
<ASN1_TIME_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_TIME_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@ASN1_TIME_it = global i32 0
define i32* @ASN1_TIME_new() {
%1 = call i64 @ASN1_item_new(i32* @ASN1_TIME_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@ASN1_TIME_it = global i32 0
define i32* @ASN1_TIME_new() {
%1 = tail call i64 @ASN1_item_new(i32* @ASN1_TIME_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
int test_imm_13int16_reg(short val) {
  return ((val) & (-0x13 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_13int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffed,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_13int16_reg>:
test   $0xffed,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_13int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -19
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_13int16_reg(i16 signext %0) {
%2 = and i16 %0, -19
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int power(int, unsigned int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int x = 2;
  unsigned int y = 3;
  printf("%d", power(x, y));
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <power@plt>
mov    %eax,%esi
lea    0xe9f(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <power@plt>
lea    0xeb9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
store i32 3, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @power(i32 %4, i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @power(i32 2, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @getchar()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ s_value_array_test();
int /*<<< orphan*/ s_value_basic_test();
void s_value_test() {
  s_value_basic_test();
  s_value_array_test();
}


x86 assembly (clang, -O0):
<s_value_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <s_value_basic_test@plt>
mov    $0x0,%al
call   1040 <s_value_array_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_value_test>:
push   %rax
xor    %eax,%eax
call   1030 <s_value_basic_test@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <s_value_array_test@plt>

LLVM IR (-O0):
define void @s_value_test() {
%1 = call i32 (...) @s_value_basic_test()
%2 = call i32 (...) @s_value_array_test()
ret void
}

LLVM IR (-O2):
define void @s_value_test() {
%1 = tail call i32 (...) @s_value_basic_test()
%2 = tail call i32 (...) @s_value_array_test()
ret void
}
void sting_syscall_begin(void) {}


x86 assembly (clang, -O0):
<sting_syscall_begin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sting_syscall_begin>:
ret

LLVM IR (-O0):
define void @sting_syscall_begin() {
ret void
}

LLVM IR (-O2):
define void @sting_syscall_begin() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
struct passwd {
  int /*<<< orphan*/ pw_uid;
};

/* Variables and functions */
struct passwd *getpwnam(char const *);
uid_t getuid_by_loginname(const char *name) {
  struct passwd *pwd;
  if (name) {
    pwd = getpwnam(name);
    if (pwd)
      return pwd->pw_uid;
  }
  return (uid_t)-1;
}


x86 assembly (clang, -O0):
<getuid_by_loginname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1152 <getuid_by_loginname+0x42>
mov    -0x10(%rbp),%rdi
call   1030 <getpwnam@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114d <getuid_by_loginname+0x3d>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <getuid_by_loginname+0x49>
jmp    1152 <getuid_by_loginname+0x42>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getuid_by_loginname>:
push   %rbx
mov    $0xffffffff,%ebx
test   %rdi,%rdi
je     1127 <getuid_by_loginname+0x17>
call   1030 <getpwnam@plt>
test   %rax,%rax
je     1127 <getuid_by_loginname+0x17>
mov    (%rax),%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.passwd = type { i32 }
define i32 @getuid_by_loginname(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.passwd*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call %struct.passwd* @getpwnam(i8* %8)
store %struct.passwd* %9, %struct.passwd** %4
%10 = load %struct.passwd*, %struct.passwd** %4
%11 = icmp ne %struct.passwd* %10, null
br i1 %11, label %12, label %16
12: ; preds = %7
%13 = load %struct.passwd*, %struct.passwd** %4
%14 = getelementptr inbounds %struct.passwd, %struct.passwd* %13, i32 0, i32 0
%15 = load i32, i32* %14
store i32 %15, i32* %2
br label %18
16: ; preds = %7
br label %17
17: ; preds = %16, %1
store i32 -1, i32* %2
br label %18
18: ; preds = %17, %12
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
%struct.passwd = type { i32 }
define i32 @getuid_by_loginname(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call %struct.passwd* @getpwnam(i8* %0)
%5 = icmp eq %struct.passwd* %4, null
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = getelementptr inbounds %struct.passwd, %struct.passwd* %4, i64 0, i32 0
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %3, %6
%10 = phi i32 [ %8, %6 ], [ -1, %3 ], [ -1, %1 ]
ret i32 %10
}
int blockMarked(int *p) { return *(p - 1) != (*(p - 1) & ~0x2); }


x86 assembly (clang, -O0):
<blockMarked>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x4(%rax),%eax
mov    -0x8(%rbp),%rcx
mov    -0x4(%rcx),%ecx
and    $0xfffffffd,%ecx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blockMarked>:
mov    -0x4(%rdi),%al
and    $0x2,%al
shr    %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @blockMarked(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 -1
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 -1
%8 = load i32, i32* %7
%9 = and i32 %8, -3
%10 = icmp ne i32 %5, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @blockMarked(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 -1
%3 = load i32, i32* %2
%4 = and i32 %3, -3
%5 = icmp ne i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int test_imm_9Buint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x9B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Buint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x9b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Buint64_midword_mem>:
testb  $0x9b,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Buint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 155
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Buint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10158080
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int vec_ui32_desc_compare(const void *p1, const void *p2) {
  const uint32_t *pp1 = (const uint32_t *)p1;
  const uint32_t *pp2 = (const uint32_t *)p2;
  if (*pp1 > *pp2)
    return -1;
  if (*pp1 < *pp2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<vec_ui32_desc_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jle    113c <vec_ui32_desc_compare+0x3c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <vec_ui32_desc_compare+0x63>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jge    115c <vec_ui32_desc_compare+0x5c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <vec_ui32_desc_compare+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec_ui32_desc_compare>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
setl   %cl
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @vec_ui32_desc_compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64*
%7 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
store i64* %9, i64** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i64*
store i64* %11, i64** %7
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i64*, i64** %7
%15 = load i64, i64* %14
%16 = icmp sgt i64 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %26
18: ; preds = %2
%19 = load i64*, i64** %6
%20 = load i64, i64* %19
%21 = load i64*, i64** %7
%22 = load i64, i64* %21
%23 = icmp slt i64 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @vec_ui32_desc_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
%8 = icmp slt i64 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
void InterpolateRow_16_C() {}


x86 assembly (clang, -O0):
<InterpolateRow_16_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InterpolateRow_16_C>:
ret

LLVM IR (-O0):
define void @InterpolateRow_16_C() {
ret void
}

LLVM IR (-O2):
define void @InterpolateRow_16_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void sp_release(int efd) { close(efd); }


x86 assembly (clang, -O0):
<sp_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_release>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @sp_release(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @sp_release(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x6c() {
  Assert_real((isdigit(108) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              545, ("isdigit should be 0 for l"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x6c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6c,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x221,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x6c>:
push   %rax
mov    $0x6c,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x221,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for l\00"
define void @t_isdigit_0x6c() {
%1 = call i64 @isdigit(i32 108)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 545, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for l\00"
define void @t_isdigit_0x6c() {
%1 = tail call i64 @isdigit(i32 108)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 545, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void RTSocketSetInheritance(void) {}


x86 assembly (clang, -O0):
<RTSocketSetInheritance>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSocketSetInheritance>:
ret

LLVM IR (-O0):
define void @RTSocketSetInheritance() {
ret void
}

LLVM IR (-O2):
define void @RTSocketSetInheritance() {
ret void
}
int reverter(int n, char *p) {
  if (n <= 1)
    return 1;
  char t = p[0];
  p[0] = p[n - 1];
  p[n - 1] = t;
  return reverter(n - 2, p + 1);
}


x86 assembly (clang, -O0):
<reverter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1135 <reverter+0x25>
movl   $0x1,-0x4(%rbp)
jmp    117d <reverter+0x6d>
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%dl
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
mov    -0x10(%rbp),%rsi
add    $0x1,%rsi
call   1030 <reverter@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverter>:
cmp    $0x2,%edi
jl     112a <reverter+0x2a>
lea    -0x1(%rdi),%eax
add    %rsi,%rax
add    $0x2,%edi
xchg   %ax,%ax
movzbl (%rsi),%ecx
movzbl (%rax),%edx
mov    %dl,(%rsi)
mov    %cl,(%rax)
add    $0x1,%rsi
add    $0xffffffffffffffff,%rax
add    $0xfffffffe,%edi
cmp    $0x3,%edi
ja     1110 <reverter+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @reverter(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8
store i32 %0, i32* %4
store i8* %1, i8** %5
%7 = load i32, i32* %4
%8 = icmp sle i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %33
10: ; preds = %2
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
store i8 %13, i8* %6
%14 = load i8*, i8** %5
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = load i8, i8* %18
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i64 0
store i8 %19, i8* %21
%22 = load i8, i8* %6
%23 = load i8*, i8** %5
%24 = load i32, i32* %4
%25 = sub nsw i32 %24, 1
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i8, i8* %23, i64 %26
store i8 %22, i8* %27
%28 = load i32, i32* %4
%29 = sub nsw i32 %28, 2
%30 = load i8*, i8** %5
%31 = getelementptr inbounds i8, i8* %30, i64 1
%32 = call i32 @reverter(i32 %29, i8* %31)
store i32 %32, i32* %3
br label %33
33: ; preds = %10, %9
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @reverter(i32 %0, i8* nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i8* [ %13, %4 ], [ %1, %2 ]
%6 = phi i32 [ %12, %4 ], [ %0, %2 ]
%7 = load i8, i8* %5
%8 = add nsw i32 %6, -1
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %5, i64 %9
%11 = load i8, i8* %10
store i8 %11, i8* %5
store i8 %7, i8* %10
%12 = add nsw i32 %6, -2
%13 = getelementptr inbounds i8, i8* %5, i64 1
%14 = icmp ult i32 %6, 4
br i1 %14, label %15, label %4
15: ; preds = %4, %2
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ map2check_malloc(void *, int);
void map2check_calloc(void *ptr, int quantity, int size) {
  map2check_malloc(ptr, quantity * size);
}


x86 assembly (clang, -O0):
<map2check_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
imul   -0x10(%rbp),%esi
call   1030 <map2check_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_calloc>:
imul   %edx,%esi
jmp    1030 <map2check_malloc@plt>

LLVM IR (-O0):
define void @map2check_calloc(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = mul nsw i32 %8, %9
%11 = call i32 @map2check_malloc(i8* %7, i32 %10)
ret void
}

LLVM IR (-O2):
define void @map2check_calloc(i8* %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
%5 = tail call i32 @map2check_malloc(i8* %0, i32 %4)
ret void
}