xunge/DecIR huggingface dataset:
int ulongGreaterThan(const void *a, const void *b) {
  unsigned long an = *(unsigned long *)a;
  unsigned long bn = *(unsigned long *)b;
  if (an > bn)
    return 1;
  else if (an == bn)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<ulongGreaterThan>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jbe    113c <ulongGreaterThan+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    115d <ulongGreaterThan+0x5d>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jne    1156 <ulongGreaterThan+0x56>
movl   $0x0,-0x4(%rbp)
jmp    115d <ulongGreaterThan+0x5d>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulongGreaterThan>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    %rcx,%rax
setne  %dl
neg    %edx
cmp    %rcx,%rax
mov    $0x1,%eax
cmovbe %edx,%eax
ret

LLVM IR (-O0):
define i32 @ulongGreaterThan(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i64*
%13 = load i64, i64* %12
store i64 %13, i64* %7
%14 = load i64, i64* %6
%15 = load i64, i64* %7
%16 = icmp ugt i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %24
18: ; preds = %2
%19 = load i64, i64* %6
%20 = load i64, i64* %7
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 0, i32* %3
br label %24
23: ; preds = %18
store i32 -1, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @ulongGreaterThan(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp ugt i64 %4, %6
%8 = icmp ne i64 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ Chord178(long, long, long, long, double, double,
                            unsigned long, unsigned long);
void chord(long x, long y, long rx, long ry, double sa, double ea,
           unsigned long cfg, unsigned long cbg) {
  Chord178(x, y, rx, ry, sa, ea, cfg, cbg);
}


x86 assembly (clang, -O0):
<chord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movsd  %xmm0,-0x28(%rbp)
movsd  %xmm1,-0x30(%rbp)
mov    %r8,-0x38(%rbp)
mov    %r9,-0x40(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
movsd  -0x28(%rbp),%xmm0
movsd  -0x30(%rbp),%xmm1
mov    -0x38(%rbp),%r8
mov    -0x40(%rbp),%r9
call   1030 <Chord178@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chord>:
jmp    1030 <Chord178@plt>

LLVM IR (-O0):
define void @chord(i64 %0, i64 %1, i64 %2, i64 %3, double %4, double %5, i64 %6, i64 %7) {
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
%13 = alloca double
%14 = alloca double
%15 = alloca i64
%16 = alloca i64
store i64 %0, i64* %9
store i64 %1, i64* %10
store i64 %2, i64* %11
store i64 %3, i64* %12
store double %4, double* %13
store double %5, double* %14
store i64 %6, i64* %15
store i64 %7, i64* %16
%17 = load i64, i64* %9
%18 = load i64, i64* %10
%19 = load i64, i64* %11
%20 = load i64, i64* %12
%21 = load double, double* %13
%22 = load double, double* %14
%23 = load i64, i64* %15
%24 = load i64, i64* %16
%25 = call i32 @Chord178(i64 %17, i64 %18, i64 %19, i64 %20, double %21, double %22, i64 %23, i64 %24)
ret void
}

LLVM IR (-O2):
define void @chord(i64 %0, i64 %1, i64 %2, i64 %3, double %4, double %5, i64 %6, i64 %7) {
%9 = tail call i32 @Chord178(i64 %0, i64 %1, i64 %2, i64 %3, double %4, double %5, i64 %6, i64 %7)
ret void
}
/* Type definitions */
struct _packet {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rw_packet_ipv6_last_ext(struct _packet *, int *);
int rw_packet_ipv6_ext_num(struct _packet *packet) {
  int headers_n = 0;
  rw_packet_ipv6_last_ext(packet, &headers_n);
  return headers_n;
}


x86 assembly (clang, -O0):
<rw_packet_ipv6_ext_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <rw_packet_ipv6_last_ext@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rw_packet_ipv6_ext_num>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <rw_packet_ipv6_last_ext@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct._packet = type { i32 }
define i32 @rw_packet_ipv6_ext_num(%struct._packet* %0) {
%2 = alloca %struct._packet*
%3 = alloca i32
store %struct._packet* %0, %struct._packet** %2
store i32 0, i32* %3
%4 = load %struct._packet*, %struct._packet** %2
%5 = call i32 @rw_packet_ipv6_last_ext(%struct._packet* %4, i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct._packet = type { i32 }
define i32 @rw_packet_ipv6_ext_num(%struct._packet* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @rw_packet_ipv6_last_ext(%struct._packet* %0, i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ leftDropAtPos(int);
int /*<<< orphan*/ writeDebugStreamLine(char *);
void leftOuterCrate3() {
  writeDebugStreamLine("Crate 3");
  leftDropAtPos(2);
}


x86 assembly (clang, -O0):
<leftOuterCrate3>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <writeDebugStreamLine@plt>
mov    $0x2,%edi
call   1030 <leftDropAtPos@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<leftOuterCrate3>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <writeDebugStreamLine@plt>
mov    $0x2,%edi
pop    %rax
jmp    1030 <leftDropAtPos@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Crate 3\00"
define void @leftOuterCrate3() {
%1 = call i32 @writeDebugStreamLine(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @leftDropAtPos(i32 2)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"Crate 3\00"
define void @leftOuterCrate3() {
%1 = tail call i32 @writeDebugStreamLine(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @leftDropAtPos(i32 2)
ret void
}
int test_imm_22uint8_mem(unsigned char *val) {
  return ((*val) & (0x22 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_22uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x22,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_22uint8_mem>:
testb  $0x22,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_22uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 34
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_22uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 34
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *x) {
  fprintf(stderr, "Usage: %s -I|A [-W<format>]\n", x);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [29 x i8] c"Usage: %s -I|A [-W<format>]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [29 x i8] c"Usage: %s -I|A [-W<format>]\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
void *test_anti_range_74(unsigned char n) {
  extern void *alloc_anti_range_74(unsigned char)
      __attribute__((alloc_size(1)));
  if (1 <= n && n <= 1)
    n = 1 - 1;
  return alloc_anti_range_74(n);
}


x86 assembly (clang, -O0):
<test_anti_range_74>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
mov    $0x1,%eax
cmp    %ecx,%eax
jg     1140 <test_anti_range_74+0x30>
movzbl -0x1(%rbp),%eax
cmp    $0x1,%eax
jg     1140 <test_anti_range_74+0x30>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <alloc_anti_range_74@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_74>:
xor    %eax,%eax
cmp    $0x1,%dil
cmove  %eax,%edi
jmp    1030 <alloc_anti_range_74@plt>

LLVM IR (-O0):
define i8* @test_anti_range_74(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sle i32 1, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 0, i8* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i8, i8* %2
%13 = call i8* @alloc_anti_range_74(i8 zeroext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_74(i8 zeroext %0) {
%2 = icmp eq i8 %0, 1
%3 = select i1 %2, i8 0, i8 %0
%4 = tail call i8* @alloc_anti_range_74(i8 zeroext %3)
ret i8* %4
}
int honor(int *coefficient, int *basePtr, int x) {
  if (coefficient == basePtr) {
    return (*coefficient);
  } else {
    return x * honor(coefficient + 1, basePtr, x) + *coefficient;
  }
}


x86 assembly (clang, -O0):
<honor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    113f <honor+0x2f>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <honor+0x5a>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x4,%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <honor@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%eax
imul   %ecx,%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<honor>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
cmp    %rsi,%rdi
je     112d <honor+0x1d>
mov    %edx,%ebp
lea    0x4(%rbx),%rdi
call   1030 <honor@plt>
imul   %ebp,%eax
add    (%rbx),%eax
jmp    112f <honor+0x1f>
mov    (%rbx),%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @honor(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
%8 = load i32*, i32** %5
%9 = load i32*, i32** %6
%10 = icmp eq i32* %8, %9
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32*, i32** %5
%13 = load i32, i32* %12
store i32 %13, i32* %4
br label %25
14: ; preds = %3
%15 = load i32, i32* %7
%16 = load i32*, i32** %5
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i32*, i32** %6
%19 = load i32, i32* %7
%20 = call i32 @honor(i32* %17, i32* %18, i32 %19)
%21 = mul nsw i32 %15, %20
%22 = load i32*, i32** %5
%23 = load i32, i32* %22
%24 = add nsw i32 %21, %23
store i32 %24, i32* %4
br label %25
25: ; preds = %14, %11
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @honor(i32* %0, i32* %1, i32 %2) {
%4 = icmp eq i32* %0, %1
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = load i32, i32* %0
br label %7
7: ; preds = %5, %9
%8 = phi i32 [ %14, %9 ], [ %6, %5 ]
ret i32 %8
9: ; preds = %3
%10 = getelementptr inbounds i32, i32* %0, i64 1
%11 = tail call i32 @honor(i32* %10, i32* %1, i32 %2)
%12 = mul nsw i32 %11, %2
%13 = load i32, i32* %0
%14 = add nsw i32 %12, %13
br label %7
}
/* Variables and functions */
int /*<<< orphan*/ faulhaber(int);
int main() {
  int i;
  for (i = 0; i < 10; ++i) {
    faulhaber(i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1146 <main+0x36>
mov    -0x8(%rbp),%edi
call   1030 <faulhaber@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <faulhaber@plt>
mov    $0x1,%edi
call   1030 <faulhaber@plt>
mov    $0x2,%edi
call   1030 <faulhaber@plt>
mov    $0x3,%edi
call   1030 <faulhaber@plt>
mov    $0x4,%edi
call   1030 <faulhaber@plt>
mov    $0x5,%edi
call   1030 <faulhaber@plt>
mov    $0x6,%edi
call   1030 <faulhaber@plt>
mov    $0x7,%edi
call   1030 <faulhaber@plt>
mov    $0x8,%edi
call   1030 <faulhaber@plt>
mov    $0x9,%edi
call   1030 <faulhaber@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @faulhaber(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @faulhaber(i32 0)
%2 = tail call i32 @faulhaber(i32 1)
%3 = tail call i32 @faulhaber(i32 2)
%4 = tail call i32 @faulhaber(i32 3)
%5 = tail call i32 @faulhaber(i32 4)
%6 = tail call i32 @faulhaber(i32 5)
%7 = tail call i32 @faulhaber(i32 6)
%8 = tail call i32 @faulhaber(i32 7)
%9 = tail call i32 @faulhaber(i32 8)
%10 = tail call i32 @faulhaber(i32 9)
ret i32 0
}
void fa101(int n) {
  {
    int b[n];
    {
      int c[n];
      0;
    }
    {
      int d[n];
      0;
    }
  a:
    goto a;
    ;
    int e[n];
    0;
  };
  {
    int f[n];
    {
      int g[n];
      0;
    };
    {
      int h[n];
      0;
    };
    ;
    int i[n];
    0;
  };
  ;
  int j[n];
  0;
}


x86 assembly (clang, -O0):
<fa101>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x30(%rbp)
mov    %rax,-0x38(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,%rsp
jmp    1146 <fa101+0x46>

x86 assembly (clang, -O2):
<fa101>:
jmp    1100 <fa101>

LLVM IR (-O0):
define void @fa101(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i8*
%11 = alloca i64
%12 = alloca i8*
%13 = alloca i64
%14 = alloca i8*
%15 = alloca i64
%16 = alloca i64
%17 = alloca i8*
%18 = alloca i64
store i32 %0, i32* %2
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = call i8* @llvm.stacksave()
store i8* %21, i8** %3
%22 = alloca i32, i64 %20
store i64 %20, i64* %4
%23 = load i32, i32* %2
%24 = zext i32 %23 to i64
%25 = call i8* @llvm.stacksave()
store i8* %25, i8** %5
%26 = alloca i32, i64 %24
store i64 %24, i64* %6
%27 = load i8*, i8** %5
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
%30 = call i8* @llvm.stacksave()
store i8* %30, i8** %7
%31 = alloca i32, i64 %29
store i64 %29, i64* %8
%32 = load i8*, i8** %7
br label %33
33: ; preds = %33, %1
br label %33
34: ; No predecessors!
%35 = load i32, i32* %2
%36 = zext i32 %35 to i64
%37 = alloca i32, i64 %36
store i64 %36, i64* %9
%38 = load i8*, i8** %3
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
%41 = call i8* @llvm.stacksave()
store i8* %41, i8** %10
%42 = alloca i32, i64 %40
store i64 %40, i64* %11
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
%45 = call i8* @llvm.stacksave()
store i8* %45, i8** %12
%46 = alloca i32, i64 %44
store i64 %44, i64* %13
%47 = load i8*, i8** %12
%48 = load i32, i32* %2
%49 = zext i32 %48 to i64
%50 = call i8* @llvm.stacksave()
store i8* %50, i8** %14
%51 = alloca i32, i64 %49
store i64 %49, i64* %15
%52 = load i8*, i8** %14
%53 = load i32, i32* %2
%54 = zext i32 %53 to i64
%55 = alloca i32, i64 %54
store i64 %54, i64* %16
%56 = load i8*, i8** %10
%57 = load i32, i32* %2
%58 = zext i32 %57 to i64
%59 = call i8* @llvm.stacksave()
store i8* %59, i8** %17
%60 = alloca i32, i64 %58
store i64 %58, i64* %18
%61 = load i8*, i8** %17
ret void
}

LLVM IR (-O2):
define void @fa101(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
float cosf(float);
float futrts_cos32(float x) { return cosf(x); }


x86 assembly (clang, -O0):
<futrts_cos32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <cosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futrts_cos32>:
jmp    1030 <cosf@plt>

LLVM IR (-O0):
define float @futrts_cos32(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @cosf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @futrts_cos32(float %0) {
%2 = tail call float @cosf(float %0)
ret float %2
}
/* Type definitions */
struct Cyc_Lexing_lexbuf {
  int dummy;
};

/* Variables and functions */
int Cyc_macroname_rec(struct Cyc_Lexing_lexbuf *, int);
int Cyc_macroname(struct Cyc_Lexing_lexbuf *lexbuf) {
  int _T0;
  _T0 = Cyc_macroname_rec(lexbuf, 1);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_macroname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <Cyc_macroname_rec@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_macroname>:
mov    $0x1,%esi
jmp    1030 <Cyc_macroname_rec@plt>

LLVM IR (-O0):
%struct.Cyc_Lexing_lexbuf = type { i32 }
define i32 @Cyc_macroname(%struct.Cyc_Lexing_lexbuf* %0) {
%2 = alloca %struct.Cyc_Lexing_lexbuf*
%3 = alloca i32
store %struct.Cyc_Lexing_lexbuf* %0, %struct.Cyc_Lexing_lexbuf** %2
%4 = load %struct.Cyc_Lexing_lexbuf*, %struct.Cyc_Lexing_lexbuf** %2
%5 = call i32 @Cyc_macroname_rec(%struct.Cyc_Lexing_lexbuf* %4, i32 1)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.Cyc_Lexing_lexbuf = type { i32 }
define i32 @Cyc_macroname(%struct.Cyc_Lexing_lexbuf* %0) {
%2 = tail call i32 @Cyc_macroname_rec(%struct.Cyc_Lexing_lexbuf* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
void copyStringLib(char *destination, char *source) {
  strcpy(destination, source);
  printf("copied string..\n%s", destination);
}


x86 assembly (clang, -O0):
<copyStringLib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rsi
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyStringLib>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strcpy@plt>
lea    0xed0(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"copied string..\0A%s\00"
define void @copyStringLib(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"copied string..\0A%s\00"
define void @copyStringLib(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Timer_ConfigureInterruptHandler();
int /*<<< orphan*/ Timer_ConfigureMode();
int /*<<< orphan*/ Timer_ConfigurePeriod();
int /*<<< orphan*/ Timer_Enable();
int /*<<< orphan*/ Timer_EnableOutputPin();
int /*<<< orphan*/ Timer_EnablePeripheralClocks();
int /*<<< orphan*/ Timer_Reset();
int /*<<< orphan*/ Timer_Start();
void TimerHardware_Init(void) {
  Timer_EnablePeripheralClocks();
  Timer_Reset();
  Timer_ConfigureMode();
  Timer_ConfigurePeriod();
  Timer_EnableOutputPin();
  Timer_Enable();
  Timer_ConfigureInterruptHandler();
  Timer_Start();
}


x86 assembly (clang, -O0):
<TimerHardware_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <Timer_EnablePeripheralClocks@plt>
mov    $0x0,%al
call   1080 <Timer_Reset@plt>
mov    $0x0,%al
call   1060 <Timer_ConfigureMode@plt>
mov    $0x0,%al
call   1050 <Timer_ConfigurePeriod@plt>
mov    $0x0,%al
call   1070 <Timer_EnableOutputPin@plt>
mov    $0x0,%al
call   1030 <Timer_Enable@plt>
mov    $0x0,%al
call   10a0 <Timer_ConfigureInterruptHandler@plt>
mov    $0x0,%al
call   1090 <Timer_Start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerHardware_Init>:
push   %rax
xor    %eax,%eax
call   1040 <Timer_EnablePeripheralClocks@plt>
xor    %eax,%eax
call   1080 <Timer_Reset@plt>
xor    %eax,%eax
call   1060 <Timer_ConfigureMode@plt>
xor    %eax,%eax
call   1050 <Timer_ConfigurePeriod@plt>
xor    %eax,%eax
call   1070 <Timer_EnableOutputPin@plt>
xor    %eax,%eax
call   1030 <Timer_Enable@plt>
xor    %eax,%eax
call   10a0 <Timer_ConfigureInterruptHandler@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <Timer_Start@plt>

LLVM IR (-O0):
define void @TimerHardware_Init() {
%1 = call i32 (...) @Timer_EnablePeripheralClocks()
%2 = call i32 (...) @Timer_Reset()
%3 = call i32 (...) @Timer_ConfigureMode()
%4 = call i32 (...) @Timer_ConfigurePeriod()
%5 = call i32 (...) @Timer_EnableOutputPin()
%6 = call i32 (...) @Timer_Enable()
%7 = call i32 (...) @Timer_ConfigureInterruptHandler()
%8 = call i32 (...) @Timer_Start()
ret void
}

LLVM IR (-O2):
define void @TimerHardware_Init() {
%1 = tail call i32 (...) @Timer_EnablePeripheralClocks()
%2 = tail call i32 (...) @Timer_Reset()
%3 = tail call i32 (...) @Timer_ConfigureMode()
%4 = tail call i32 (...) @Timer_ConfigurePeriod()
%5 = tail call i32 (...) @Timer_EnableOutputPin()
%6 = tail call i32 (...) @Timer_Enable()
%7 = tail call i32 (...) @Timer_ConfigureInterruptHandler()
%8 = tail call i32 (...) @Timer_Start()
ret void
}
int pfasta_threadsafe() { return 1; }


x86 assembly (clang, -O0):
<pfasta_threadsafe>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfasta_threadsafe>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pfasta_threadsafe() {
ret i32 1
}

LLVM IR (-O2):
define i32 @pfasta_threadsafe() {
ret i32 1
}
void free_clique_adjacency_matrix(int **matrix, int size) {
  for (int i = 0; i < size; i++) {
    free(matrix[i]);
  }
  free(matrix);
}


x86 assembly (clang, -O0):
<free_clique_adjacency_matrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_clique_adjacency_matrix+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_clique_adjacency_matrix+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_clique_adjacency_matrix>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_clique_adjacency_matrix+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_clique_adjacency_matrix+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_clique_adjacency_matrix(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = bitcast i32* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32**, i32*** %3
%22 = bitcast i32** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @free_clique_adjacency_matrix(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = bitcast i32** %0 to i8*
tail call void @free(i8* %7)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32*, i32** %0, i64 %9
%11 = bitcast i32** %10 to i8**
%12 = load i8*, i8** %11
tail call void @free(i8* %12)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
double core___core__Float___Numeric__unary_32d_45d(double self) {
  double var;
  double var1;
  var1 = -self;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Float___Numeric__unary_32d_45d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Float___Numeric__unary_32d_45d>:
xorps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @core___core__Float___Numeric__unary_32d_45d(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = fneg double %5
store double %6, double* %4
%7 = load double, double* %4
store double %7, double* %3
br label %8
8: ; preds = %1
%9 = load double, double* %3
ret double %9
}

LLVM IR (-O2):
define double @core___core__Float___Numeric__unary_32d_45d(double %0) {
%2 = fneg double %0
ret double %2
}
int gumbo_tolower(int c) { return c | ((c >= 'A' && c <= 'Z') << 5); }


x86 assembly (clang, -O0):
<gumbo_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <gumbo_tolower+0x26>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x5(%rbp),%cl
and    $0x1,%cl
movzbl %cl,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gumbo_tolower>:
lea    -0x41(%rdi),%ecx
xor    %eax,%eax
cmp    $0x1a,%ecx
setb   %al
shl    $0x5,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @gumbo_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sle i32 %7, 90
br label %9
9: ; preds = %6, %1
%10 = phi i1 [ false, %1 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
%12 = shl i32 %11, 5
%13 = or i32 %3, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @gumbo_tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = select i1 %3, i32 32, i32 0
%5 = or i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ matNd_getRow(double *, double const *, int const, int);
void mat3d_getRow(double result[3], const double m[9], const int row) {
  matNd_getRow(result, m, row, 3);
}


x86 assembly (clang, -O0):
<mat3d_getRow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x3,%ecx
call   1030 <matNd_getRow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat3d_getRow>:
mov    $0x3,%ecx
jmp    1030 <matNd_getRow@plt>

LLVM IR (-O0):
define void @mat3d_getRow(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = call i32 @matNd_getRow(double* %7, double* %8, i32 %9, i32 3)
ret void
}

LLVM IR (-O2):
define void @mat3d_getRow(double* %0, double* %1, i32 %2) {
%4 = tail call i32 @matNd_getRow(double* %0, double* %1, i32 %2, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ matNf_getRow(float *, float const *, int const, int);
void mat3f_getRow(float result[3], const float m[9], const int row) {
  matNf_getRow(result, m, row, 3);
}


x86 assembly (clang, -O0):
<mat3f_getRow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x3,%ecx
call   1030 <matNf_getRow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat3f_getRow>:
mov    $0x3,%ecx
jmp    1030 <matNf_getRow@plt>

LLVM IR (-O0):
define void @mat3f_getRow(float* %0, float* %1, i32 %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store i32 %2, i32* %6
%7 = load float*, float** %4
%8 = load float*, float** %5
%9 = load i32, i32* %6
%10 = call i32 @matNf_getRow(float* %7, float* %8, i32 %9, i32 3)
ret void
}

LLVM IR (-O2):
define void @mat3f_getRow(float* %0, float* %1, i32 %2) {
%4 = tail call i32 @matNf_getRow(float* %0, float* %1, i32 %2, i32 3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *);
void print_usage(FILE *stream, const char *program) {
  (void)fprintf(stream, "Usage: %s [OPTION]... [DIRECTORY]\n", program);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"Usage: %s [OPTION]... [DIRECTORY]\0A\00"
define void @print_usage(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"Usage: %s [OPTION]... [DIRECTORY]\0A\00"
define void @print_usage(i32* nocapture %0, i8* %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ immain();
int /*<<< orphan*/ wingo();
refresh() {
  wingo();
  immain();
}


x86 assembly (clang, -O0):
<refresh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <wingo@plt>
mov    $0x0,%al
call   1040 <immain@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<refresh>:
push   %rax
xor    %eax,%eax
call   1030 <wingo@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <immain@plt>

LLVM IR (-O0):
define i32 @refresh() {
%1 = alloca i32
%2 = call i32 (...) @wingo()
%3 = call i32 (...) @immain()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @refresh() {
%1 = tail call i32 (...) @wingo()
%2 = tail call i32 (...) @immain()
ret i32 undef
}
int test_imm_30uint8_reg(unsigned char val) {
  return ((val) & (0x30 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_30uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x30,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_30uint8_reg>:
test   $0x30,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_30uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 48
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_30uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 48
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ cargo_in_anchorages();
int /*<<< orphan*/ cargo_in_boats();
int dock_is_closed() { return !cargo_in_boats() && !cargo_in_anchorages(); }


x86 assembly (clang, -O0):
<dock_is_closed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <cargo_in_boats@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x1(%rbp)
jne    1151 <dock_is_closed+0x31>
mov    $0x0,%al
call   1030 <cargo_in_anchorages@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dock_is_closed>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <cargo_in_boats@plt>
test   %eax,%eax
jne    113c <dock_is_closed+0x1c>
xor    %eax,%eax
call   1030 <cargo_in_anchorages@plt>
xor    %ebx,%ebx
test   %eax,%eax
sete   %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dock_is_closed() {
%1 = call i32 (...) @cargo_in_boats()
%2 = icmp ne i32 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = call i32 (...) @cargo_in_anchorages()
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
br label %7
7: ; preds = %3, %0
%8 = phi i1 [ false, %0 ], [ %6, %3 ]
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @dock_is_closed() {
%1 = tail call i32 (...) @cargo_in_boats()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i32 (...) @cargo_in_anchorages()
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fwrite(void const *, size_t, size_t, int /*<<< orphan*/ *);
size_t internalFwrite(const void *ptr, size_t size, size_t count,
                      void *userPtr) {
  return fwrite(ptr, size, count, (FILE *)userPtr);
}


x86 assembly (clang, -O0):
<internalFwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internalFwrite>:
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define i64 @internalFwrite(i8* %0, i64 %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i8*, i8** %8
%13 = bitcast i8* %12 to i32*
%14 = call i64 @fwrite(i8* %9, i64 %10, i64 %11, i32* %13)
ret i64 %14
}

LLVM IR (-O2):
define i64 @internalFwrite(i8* nocapture %0, i64 %1, i64 %2, i8* nocapture %3) {
%5 = bitcast i8* %3 to i32*
%6 = tail call i64 @fwrite(i8* %0, i64 %1, i64 %2, i32* %5)
ret i64 %6
}
long long poptRandomValue(long long limit) { return -19; }


x86 assembly (clang, -O0):
<poptRandomValue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffffffffffed,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<poptRandomValue>:
mov    $0xffffffffffffffed,%rax
ret

LLVM IR (-O0):
define i64 @poptRandomValue(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i64 -19
}

LLVM IR (-O2):
define i64 @poptRandomValue(i64 %0) {
ret i64 -19
}
double OP_Negate(double op1, double op2) { return -op1; }


x86 assembly (clang, -O0):
<OP_Negate>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP_Negate>:
xorps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @OP_Negate(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fneg double %5
ret double %6
}

LLVM IR (-O2):
define double @OP_Negate(double %0, double %1) {
%3 = fneg double %0
ret double %3
}
int dev_puncher_read(struct dev_puncher *puncher) { return 0; }


x86 assembly (clang, -O0):
<dev_puncher_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_puncher_read>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dev_puncher = type opaque
define i32 @dev_puncher_read(%struct.dev_puncher* %0) {
%2 = alloca %struct.dev_puncher*
store %struct.dev_puncher* %0, %struct.dev_puncher** %2
ret i32 0
}

LLVM IR (-O2):
%struct.dev_puncher = type opaque
define i32 @dev_puncher_read(%struct.dev_puncher* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int strlen(char const *);
unsigned char CalculateHash(const char *String) {
  unsigned char Hash = 0;
  int i;
  for (i = 0; i < strlen(String); i++) {
    Hash ^= String[i];
  }
  return Hash;
}


x86 assembly (clang, -O0):
<CalculateHash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
jge    1166 <CalculateHash+0x56>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
movzbl -0x9(%rbp),%eax
xor    %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1127 <CalculateHash+0x17>
movzbl -0x9(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CalculateHash>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %eax,%eax
jle    1149 <CalculateHash+0x39>
xor    %ebx,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    (%r14,%rbx,1),%bpl
add    $0x1,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1130 <CalculateHash+0x20>
jmp    114b <CalculateHash+0x3b>
xor    %ebp,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i8 @CalculateHash(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i32
store i8* %0, i8** %2
store i8 0, i8* %3
store i32 0, i32* %4
br label %5
5: ; preds = %21, %1
%6 = load i32, i32* %4
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %24
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = xor i32 %18, %16
%20 = trunc i32 %19 to i8
store i8 %20, i8* %3
br label %21
21: ; preds = %10
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %5
24: ; preds = %5
%25 = load i8, i8* %3
ret i8 %25
}

LLVM IR (-O2):
define zeroext i8 @CalculateHash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %14
4: ; preds = %1, %4
%5 = phi i64 [ %10, %4 ], [ 0, %1 ]
%6 = phi i8 [ %9, %4 ], [ 0, %1 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %5
%8 = load i8, i8* %7
%9 = xor i8 %8, %6
%10 = add nuw nsw i64 %5, 1
%11 = tail call i32 @strlen(i8* %0)
%12 = sext i32 %11 to i64
%13 = icmp slt i64 %10, %12
br i1 %13, label %4, label %14
14: ; preds = %4, %1
%15 = phi i8 [ 0, %1 ], [ %9, %4 ]
ret i8 %15
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void QEIDisable(unsigned long ulBase) {
  DEBUG_ASSERT((ulBase == 0x4002C000) || (ulBase == 0x4002D000));
  (*((volatile unsigned long *)(ulBase + 0x00000000))) &= ~(0x00000001);
}


x86 assembly (clang, -O0):
<QEIDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x4002c000,-0x8(%rbp)
40
mov    %al,-0x9(%rbp)
je     113d <QEIDisable+0x2d>
cmpq   $0x4002d000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIDisable>:
push   %rbx
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x4002c000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
andq   $0xfffffffffffffffe,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @QEIDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 1073922048
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 1073926144
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @DEBUG_ASSERT(i32 %10)
%12 = load i64, i64* %2
%13 = add i64 %12, 0
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, -2
store volatile i64 %16, i64* %14
ret void
}

LLVM IR (-O2):
define void @QEIDisable(i64 %0) {
%2 = and i64 %0, -4097
%3 = icmp eq i64 %2, 1073922048
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = inttoptr i64 %0 to i64*
%7 = load volatile i64, i64* %6
%8 = and i64 %7, -2
store volatile i64 %8, i64* %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpgt_pi8(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 __attribute__((no, unused)) test(__m64 s1, __m64 s2) {
  return _mm_cmpgt_pi8(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpgt_pi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_cmpgt_pi8@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpgt_pi8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpgt_pi8(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, short, int);
main(void) {
  unsigned int x;
  char *cPtr;
  short *sPtr;
  int *iPtr;
  cPtr = (char *)&x;
  sPtr = (short *)&x;
  iPtr = &x;
  x = 0x12345678;
  printf("*cPtr = %x, *sPtr =%x, *iPtr = %x\n", *cPtr, *sPtr, *iPtr);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x12345678,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%dl
mov    -0x18(%rbp),%rax
mov    (%rax),%ax
mov    -0x20(%rbp),%rcx
mov    (%rcx),%ecx
lea    0xeaf(%rip),%rdi
movsbl %dl,%esi
movswl %ax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x78,%esi
mov    $0x5678,%edx
mov    $0x12345678,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"*cPtr = %x, *sPtr =%x, *iPtr = %x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i16*
%4 = alloca i32*
%5 = bitcast i32* %1 to i8*
store i8* %5, i8** %2
%6 = bitcast i32* %1 to i16*
store i16* %6, i16** %3
store i32* %1, i32** %4
store i32 305419896, i32* %1
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = load i16*, i16** %3
%10 = load i16, i16* %9
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8 signext %8, i16 signext %10, i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"*cPtr = %x, *sPtr =%x, *iPtr = %x\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8 signext 120, i16 signext 22136, i32 305419896)
ret i32 0
}
int authless_succeed_1param(struct authhandle *auth) { return (0); }


x86 assembly (clang, -O0):
<authless_succeed_1param>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<authless_succeed_1param>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.authhandle = type opaque
define i32 @authless_succeed_1param(%struct.authhandle* %0) {
%2 = alloca %struct.authhandle*
store %struct.authhandle* %0, %struct.authhandle** %2
ret i32 0
}

LLVM IR (-O2):
%struct.authhandle = type opaque
define i32 @authless_succeed_1param(%struct.authhandle* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ out52(char);
int /*<<< orphan*/ qbyte(char);
void out52n(char c, char n) {
  out52(c);
  qbyte(n);
}


x86 assembly (clang, -O0):
<out52n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <out52@plt>
movsbl -0x2(%rbp),%edi
call   1030 <qbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out52n>:
push   %rbx
mov    %esi,%ebx
call   1040 <out52@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <qbyte@plt>

LLVM IR (-O0):
define void @out52n(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = call i32 @out52(i8 signext %5)
%7 = load i8, i8* %4
%8 = call i32 @qbyte(i8 signext %7)
ret void
}

LLVM IR (-O2):
define void @out52n(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @out52(i8 signext %0)
%4 = tail call i32 @qbyte(i8 signext %1)
ret void
}
/* Variables and functions */
scalar_t__ wfile_leap_year(int);
int wfile_days_in_year(int year) { return (wfile_leap_year(year) ? 366 : 365); }


x86 assembly (clang, -O0):
<wfile_days_in_year>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <wfile_leap_year@plt>
mov    %rax,%rdx
mov    $0x16d,%eax
mov    $0x16e,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfile_days_in_year>:
push   %rax
call   1030 <wfile_leap_year@plt>
cmp    $0x1,%rax
mov    $0x16e,%eax
sbb    $0x0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wfile_days_in_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @wfile_leap_year(i32 %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 366, i32 365
ret i32 %7
}

LLVM IR (-O2):
define i32 @wfile_days_in_year(i32 %0) {
%2 = tail call i64 @wfile_leap_year(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 365, i32 366
ret i32 %4
}