xunge/DecIR huggingface dataset:
int sigma(int n) {
  if (n <= 0)
    return 0;
  return n + sigma(n - 1);
}


x86 assembly (clang, -O0):
<sigma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1131 <sigma+0x21>
movl   $0x0,-0x4(%rbp)
jmp    114c <sigma+0x3c>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <sigma@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigma>:
test   %edi,%edi
jle    1119 <sigma+0x19>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %rax,%rcx
imul   %eax,%eax
shr    %rcx
add    %edi,%eax
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sigma(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @sigma(i32 %10)
%12 = add nsw i32 %8, %11
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @sigma(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = mul i32 %4, %4
%6 = zext i32 %4 to i33
%7 = add nsw i32 %0, -2
%8 = zext i32 %7 to i33
%9 = mul i33 %6, %8
%10 = lshr i33 %9, 1
%11 = trunc i33 %10 to i32
%12 = add i32 %5, %0
%13 = sub i32 %12, %11
br label %14
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %13, %3 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ fib(int, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int x, y;
  scanf("%d", &x);
  scanf("%d", &y);
  fib(x, y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <scanf@plt>
lea    0xeba(%rip),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <fib@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1030 <scanf@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1030 <scanf@plt>
mov    0xc(%rsp),%edi
mov    0x8(%rsp),%esi
call   1040 <fib@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = call i32 @fib(i32 %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = call i32 @fib(i32 %7, i32 %8)
ret i32 0
}
float Float_from_MINUS_int(int x) { return (float)x; }


x86 assembly (clang, -O0):
<Float_from_MINUS_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Float_from_MINUS_int>:
cvtsi2ss %edi,%xmm0
ret

LLVM IR (-O0):
define float @Float_from_MINUS_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to float
ret float %4
}

LLVM IR (-O2):
define float @Float_from_MINUS_int(i32 %0) {
%2 = sitofp i32 %0 to float
ret float %2
}
int TEL2() { return 0; }


x86 assembly (clang, -O0):
<TEL2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TEL2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @TEL2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @TEL2() {
ret i32 0
}
void SetScrollRegn(Top, Bottom) int Top, Bottom;
{
  char Str[20];
  sprintf(Str, "\033[%d;%dr", Top, Bottom);
  WRITETEST(Str);
}


x86 assembly (clang, -O0):
<SetScrollRegn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xec1(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
lea    -0x20(%rbp),%rdi
mov    $0x0,%al
call   1030 <WRITETEST@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetScrollRegn>:
push   %rbx
sub    $0x20,%rsp
mov    %esi,%ecx
mov    %edi,%edx
lea    0xed0(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <WRITETEST@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"\1B[%d;%dr\00"
define void @SetScrollRegn(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [20 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [20 x i8], [20 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 (i8*, i8*, ...) @sprintf(i8* %6, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
%10 = getelementptr inbounds [20 x i8], [20 x i8]* %5, i64 0, i64 0
%11 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"\1B[%d;%dr\00"
define void @SetScrollRegn(i32 %0, i32 %1) {
%3 = alloca [20 x i8]
%4 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%5 = call i32 (i8*, i8*, ...) @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %4)
ret void
}
/* Variables and functions */
float fabsf(float);
float __glsl_distance(float p0, float p1) { return fabsf(p0 - p1); }


x86 assembly (clang, -O0):
<__glsl_distance>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movaps 0xee1(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glsl_distance>:
subss  %xmm1,%xmm0
andps  0xef5(%rip),%xmm0
ret

LLVM IR (-O0):
define float @__glsl_distance(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fsub float %5, %6
%8 = call float @llvm.fabs.f32(float %7)
ret float %8
}

LLVM IR (-O2):
define float @__glsl_distance(float %0, float %1) {
%3 = fsub float %0, %1
%4 = tail call float @llvm.fabs.f32(float %3)
ret float %4
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ return_sense(int, int /*<<< orphan*/, int /*<<< orphan*/ *,
                                int *);
void sam_no_sense(uint8_t key, uint16_t ascq, uint8_t *sam_stat) {
  return_sense(0x00 | key, ascq, NULL, sam_stat);
}


x86 assembly (clang, -O0):
<sam_no_sense>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
or     $0x0,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edx
call   1030 <return_sense@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sam_no_sense>:
mov    %rdx,%rcx
xor    %edx,%edx
jmp    1030 <return_sense@plt>

LLVM IR (-O0):
define void @sam_no_sense(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = or i32 0, %7
%9 = load i32, i32* %5
%10 = load i32*, i32** %6
%11 = call i32 @return_sense(i32 %8, i32 %9, i32* null, i32* %10)
ret void
}

LLVM IR (-O2):
define void @sam_no_sense(i32 %0, i32 %1, i32* %2) {
%4 = tail call i32 @return_sense(i32 %0, i32 %1, i32* null, i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cleanup_screen();
int /*<<< orphan*/ demo();
int /*<<< orphan*/ setup_screen();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int main() {
  srand(time(NULL));
  setup_screen();
  demo();
  cleanup_screen();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1070 <time@plt>
mov    %eax,%edi
call   1050 <srand@plt>
mov    $0x0,%al
call   1060 <setup_screen@plt>
mov    $0x0,%al
call   1040 <demo@plt>
mov    $0x0,%al
call   1030 <cleanup_screen@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1070 <time@plt>
mov    %eax,%edi
call   1050 <srand@plt>
xor    %eax,%eax
call   1060 <setup_screen@plt>
xor    %eax,%eax
call   1040 <demo@plt>
xor    %eax,%eax
call   1030 <cleanup_screen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @time(i32* null)
%3 = call i32 @srand(i32 %2)
%4 = call i32 (...) @setup_screen()
%5 = call i32 (...) @demo()
%6 = call i32 (...) @cleanup_screen()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @setup_screen()
%4 = tail call i32 (...) @demo()
%5 = tail call i32 (...) @cleanup_screen()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int c;
  for (c = 0; c <= 255; c++) {
    printf("%d - %c\n", c, c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xff,-0x8(%rbp)
jg     1153 <main+0x43>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d - %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 255
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d - %c\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
__attribute__((always_)) void rq_flush_dcache_pages(struct request *rq) {}


x86 assembly (clang, -O0):
<rq_flush_dcache_pages>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rq_flush_dcache_pages>:
ret

LLVM IR (-O0):
%struct.request = type opaque
define void @rq_flush_dcache_pages(%struct.request* %0) {
%2 = alloca %struct.request*
store %struct.request* %0, %struct.request** %2
ret void
}

LLVM IR (-O2):
%struct.request = type opaque
define void @rq_flush_dcache_pages(%struct.request* nocapture %0) {
ret void
}
int arria10_load_fpga(int offset, int size) { return 0; }


x86 assembly (clang, -O0):
<arria10_load_fpga>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arria10_load_fpga>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @arria10_load_fpga(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @arria10_load_fpga(i32 %0, i32 %1) {
ret i32 0
}
int crush_calc_tree_node(int i) { return ((i + 1) << 1) - 1; }


x86 assembly (clang, -O0):
<crush_calc_tree_node>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
shl    $0x1,%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crush_calc_tree_node>:
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @crush_calc_tree_node(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = shl i32 %4, 1
%6 = sub nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @crush_calc_tree_node(i32 %0) {
%2 = shl i32 %0, 1
%3 = or i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fn2();
int __attribute__((no)) fn1(void) {
  fn2();
  return 0;
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fn2@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
push   %rax
xor    %eax,%eax
call   1030 <fn2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn1() {
%1 = call i32 (...) @fn2()
ret i32 0
}

LLVM IR (-O2):
define i32 @fn1() {
%1 = tail call i32 (...) @fn2()
ret i32 0
}
/* Variables and functions */
size_t popcount(const size_t number) {
  size_t n = number - 1;
  size_t j = 1;
  size_t i = 1;
  while (n >>= 1) {
    i++;
    if (!!(n & 1) == 1) {
      j = i;
      ;
    }
  }
  return j;
}


x86 assembly (clang, -O0):
<popcount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
movq   $0x1,-0x20(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1174 <popcount+0x74>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x1,%eax
jne    116f <popcount+0x6f>
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1124 <popcount+0x24>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcount>:
add    $0xffffffffffffffff,%rdi
mov    $0x1,%eax
cmp    $0x2,%rdi
jb     1138 <popcount+0x38>
mov    $0x1,%eax
mov    $0x2,%ecx
mov    %rdi,%rdx
nopl   0x0(%rax)
shr    %rdx
test   $0x2,%dil
cmovne %rcx,%rax
add    $0x1,%rcx
cmp    $0x3,%rdi
mov    %rdx,%rdi
ja     1120 <popcount+0x20>
ret

LLVM IR (-O0):
define i64 @popcount(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %2
%6 = load i64, i64* %2
%7 = sub i64 %6, 1
store i64 %7, i64* %3
store i64 1, i64* %4
store i64 1, i64* %5
br label %8
8: ; preds = %24, %1
%9 = load i64, i64* %3
%10 = lshr i64 %9, 1
store i64 %10, i64* %3
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %8
%13 = load i64, i64* %5
%14 = add i64 %13, 1
store i64 %14, i64* %5
%15 = load i64, i64* %3
%16 = and i64 %15, 1
%17 = icmp ne i64 %16, 0
%18 = xor i1 %17, true
%19 = xor i1 %18, true
%20 = zext i1 %19 to i32
%21 = icmp eq i32 %20, 1
br i1 %21, label %22, label %24
22: ; preds = %12
%23 = load i64, i64* %5
store i64 %23, i64* %4
br label %24
24: ; preds = %22, %12
br label %8
25: ; preds = %8
%26 = load i64, i64* %4
ret i64 %26
}

LLVM IR (-O2):
define i64 @popcount(i64 %0) {
%2 = add i64 %0, -1
%3 = icmp ult i64 %2, 2
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %9, %4 ], [ 1, %1 ]
%6 = phi i64 [ %12, %4 ], [ 1, %1 ]
%7 = phi i64 [ %8, %4 ], [ %2, %1 ]
%8 = lshr i64 %7, 1
%9 = add nuw nsw i64 %5, 1
%10 = and i64 %7, 2
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, i64 %6, i64 %9
%13 = icmp ult i64 %7, 4
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 1, %1 ], [ %12, %4 ]
ret i64 %15
}
int main() {
  int j = 0;
  while (j < 5)
    ++j;
  j = 0;
  while (j < 5)
    ++j;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1149 <main+0x49>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1131 <main+0x31>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
store i32 0, i32* %2
br label %10
10: ; preds = %13, %9
%11 = load i32, i32* %2
%12 = icmp slt i32 %11, 5
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %10
16: ; preds = %10
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
void *mxml_get_sibling(void *);
void *cfg_io_get_gpio_next_port(void *port) {
  void *next_port = ((void *)0);
  if (((void *)0) != port) {
    next_port = mxml_get_sibling(port);
  }
  return next_port;
}


x86 assembly (clang, -O0):
<cfg_io_get_gpio_next_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     113d <cfg_io_get_gpio_next_port+0x2d>
mov    -0x8(%rbp),%rdi
call   1030 <mxml_get_sibling@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_io_get_gpio_next_port>:
test   %rdi,%rdi
je     111a <cfg_io_get_gpio_next_port+0xa>
jmp    1030 <mxml_get_sibling@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @cfg_io_get_gpio_next_port(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* null, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i8* @mxml_get_sibling(i8* %7)
store i8* %8, i8** %3
br label %9
9: ; preds = %6, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define i8* @cfg_io_get_gpio_next_port(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @mxml_get_sibling(i8* %0)
br label %5
5: ; preds = %3, %1
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
int main(int argc, char **argv) {
  int i;
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 undef
}
void j2k_read_unk() {}


x86 assembly (clang, -O0):
<j2k_read_unk>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j2k_read_unk>:
ret

LLVM IR (-O0):
define void @j2k_read_unk() {
ret void
}

LLVM IR (-O2):
define void @j2k_read_unk() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enable_8259A_irq(unsigned int);
unsigned int startup_8259A_irq(unsigned int irq) {
  enable_8259A_irq(irq);
  return 0;
}


x86 assembly (clang, -O0):
<startup_8259A_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <enable_8259A_irq@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<startup_8259A_irq>:
push   %rax
call   1030 <enable_8259A_irq@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @startup_8259A_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @enable_8259A_irq(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @startup_8259A_irq(i32 %0) {
%2 = tail call i32 @enable_8259A_irq(i32 %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char, float);
int /*<<< orphan*/ scanf(char *, int *, char *, float *);
int main() {
  int x;
  char y;
  float z;
  scanf("%s%c%f", &x, &y, &z);
  printf("You typed: %d %c %f\n", x, y, z);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0x9(%rbp),%rdx
lea    -0x10(%rbp),%rcx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
mov    -0x9(%rbp),%al
movss  -0x10(%rbp),%xmm0
lea    0xeae(%rip),%rdi
movsbl %al,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xed5(%rip),%rdi
lea    0x14(%rsp),%rsi
lea    0xf(%rsp),%rdx
lea    0x10(%rsp),%rcx
call   1040 <scanf@plt>
mov    0x14(%rsp),%esi
movsbl 0xf(%rsp),%edx
movss  0x10(%rsp),%xmm0
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%s%c%f\00"
@.str.1 = [21 x i8] c"You typed: %d %c %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
%4 = alloca float
store i32 0, i32* %1
%5 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %2, i8* %3, float* %4)
%6 = load i32, i32* %2
%7 = load i8, i8* %3
%8 = load float, float* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i32 %6, i8 signext %7, float %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s%c%f\00"
@.str.1 = [21 x i8] c"You typed: %d %c %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca float
%4 = bitcast i32* %1 to i8*
%5 = bitcast float* %3 to i8*
%6 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %1, i8* %2, float* %3)
%7 = load i32, i32* %1
%8 = load i8, i8* %2
%9 = load float, float* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i32 %7, i8 signext %8, float %9)
ret i32 0
}
imm0adr1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if (22 <= (*((double *)(11111111 & ~(__alignof__(double) - 1)))))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<imm0adr1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    $0xa98ac0,%eax
movsd  (%rax),%xmm0
movsd  0xed3(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1143 <imm0adr1+0x43>
movl   $0x1,-0x4(%rbp)
jmp    114a <imm0adr1+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imm0adr1>:
movsd  0xa98ac0,%xmm0
xor    %eax,%eax
ucomisd 0xeed(%rip),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @imm0adr1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double, double* inttoptr (i64 11111104 to double*)
%15 = fcmp ole double 2.200000e+01, %14
br i1 %15, label %16, label %17
16: ; preds = %6
store i32 1, i32* %7
br label %18
17: ; preds = %6
store i32 0, i32* %7
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @imm0adr1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture readnone %5) {
%7 = load double, double* inttoptr (i64 11111104 to double*)
%8 = fcmp oge double %7, 2.200000e+01
%9 = zext i1 %8 to i32
ret i32 %9
}
int isgraph(int c) { return !!(c > ' '); }


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x20,-0x4(%rbp)
setg   %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
xor    %eax,%eax
cmp    $0x21,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 32
%5 = xor i1 %4, true
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
%2 = icmp sgt i32 %0, 32
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ readclock(unsigned int *, unsigned int *);
int readticks(unsigned int *ticks) {
  unsigned int myt1, myt2;
  readclock(&myt1, &myt2);
  *ticks = myt2;
}


x86 assembly (clang, -O0):
<readticks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <readclock@plt>
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readticks>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xc(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <readclock@plt>
mov    0x8(%rsp),%eax
mov    %eax,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @readticks(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
%6 = call i32 @readclock(i32* %4, i32* %5)
%7 = load i32, i32* %5
%8 = load i32*, i32** %3
store i32 %7, i32* %8
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @readticks(i32* nocapture writeonly %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = call i32 @readclock(i32* %2, i32* %3)
%7 = load i32, i32* %3
store i32 %7, i32* %0
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, int, int);
void exitfunc5(int status, void *arg) {
  printf("Executing exitfunc5 (status=%d, arg=%d)\n", status, (int)arg);
  exit((int)arg);
}


x86 assembly (clang, -O0):
<exitfunc5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rax
mov    %eax,%edx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    %eax,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exitfunc5>:
push   %rbx
mov    %rsi,%rbx
mov    %edi,%esi
lea    0xed3(%rip),%rdi
mov    %ebx,%edx
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"Executing exitfunc5 (status=%d, arg=%d)\0A\00"
define void @exitfunc5(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = ptrtoint i8* %6 to i32
%8 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %7)
%9 = load i8*, i8** %4
%10 = ptrtoint i8* %9 to i32
%11 = call i32 @exit(i32 %10)
unreachable
}

LLVM IR (-O2):
@.str = [41 x i8] c"Executing exitfunc5 (status=%d, arg=%d)\0A\00"
define void @exitfunc5(i32 %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = trunc i64 %3 to i32
%5 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %4)
%6 = tail call i32 @exit(i32 %4)
unreachable
}
/* Type definitions */
struct table_row {
  int dummy;
};
struct table {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ l_row_last_calc(struct table *);
struct table_row *l_selected_row(struct table *);
int /*<<< orphan*/ table_row_mark_toggle(struct table *, struct table_row *);
void l_row_select_mark_toggle(struct table *t) {
  struct table_row *row;
  row = l_selected_row(t);
  table_row_mark_toggle(t, row);
  l_row_last_calc(t);
}


x86 assembly (clang, -O0):
<l_row_select_mark_toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <l_selected_row@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <table_row_mark_toggle@plt>
mov    -0x8(%rbp),%rdi
call   1050 <l_row_last_calc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l_row_select_mark_toggle>:
push   %rbx
mov    %rdi,%rbx
call   1030 <l_selected_row@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <table_row_mark_toggle@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <l_row_last_calc@plt>

LLVM IR (-O0):
%struct.table = type { i32 }
%struct.table_row = type { i32 }
define void @l_row_select_mark_toggle(%struct.table* %0) {
%2 = alloca %struct.table*
%3 = alloca %struct.table_row*
store %struct.table* %0, %struct.table** %2
%4 = load %struct.table*, %struct.table** %2
%5 = call %struct.table_row* @l_selected_row(%struct.table* %4)
store %struct.table_row* %5, %struct.table_row** %3
%6 = load %struct.table*, %struct.table** %2
%7 = load %struct.table_row*, %struct.table_row** %3
%8 = call i32 @table_row_mark_toggle(%struct.table* %6, %struct.table_row* %7)
%9 = load %struct.table*, %struct.table** %2
%10 = call i32 @l_row_last_calc(%struct.table* %9)
ret void
}

LLVM IR (-O2):
%struct.table = type { i32 }
%struct.table_row = type { i32 }
define void @l_row_select_mark_toggle(%struct.table* %0) {
%2 = tail call %struct.table_row* @l_selected_row(%struct.table* %0)
%3 = tail call i32 @table_row_mark_toggle(%struct.table* %0, %struct.table_row* %2)
%4 = tail call i32 @l_row_last_calc(%struct.table* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UI_CDKeyMenu2();
void UI_CDKeyMenu_f(void) { UI_CDKeyMenu2(); }


x86 assembly (clang, -O0):
<UI_CDKeyMenu_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <UI_CDKeyMenu2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_CDKeyMenu_f>:
xor    %eax,%eax
jmp    1030 <UI_CDKeyMenu2@plt>

LLVM IR (-O0):
define void @UI_CDKeyMenu_f() {
%1 = call i32 (...) @UI_CDKeyMenu2()
ret void
}

LLVM IR (-O2):
define void @UI_CDKeyMenu_f() {
%1 = tail call i32 (...) @UI_CDKeyMenu2()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ arm_int(int, int);
void arm_reset() { arm_int(0x00, 0b10011); }


x86 assembly (clang, -O0):
<arm_reset>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x13,%esi
call   1030 <arm_int@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_reset>:
xor    %edi,%edi
mov    $0x13,%esi
jmp    1030 <arm_int@plt>

LLVM IR (-O0):
define void @arm_reset() {
%1 = call i32 @arm_int(i32 0, i32 19)
ret void
}

LLVM IR (-O2):
define void @arm_reset() {
%1 = tail call i32 @arm_int(i32 0, i32 19)
ret void
}
void bu_compile_null(args) struct conscell *args;
{
  int n = bu_compile_arg_list(args);
  if (n != 1)
    goto er;
  EMIT1ATM("NULL");
  EMITEND();
  return;
er:
  cerror("null: wrong # of args", args);
}


x86 assembly (clang, -O0):
<bu_compile_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <bu_compile_arg_list@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     1169 <bu_compile_null+0x29>
jmp    1183 <bu_compile_null+0x43>
lea    0xe90(%rip),%rdi
mov    $0x0,%al
call   1050 <EMIT1ATM@plt>
mov    $0x0,%al
call   1030 <EMITEND@plt>
jmp    1195 <bu_compile_null+0x55>
mov    -0x8(%rbp),%rsi
lea    0xe77(%rip),%rdi
mov    $0x0,%al
call   1060 <cerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bu_compile_null>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <bu_compile_arg_list@plt>
cmp    $0x1,%eax
jne    1166 <bu_compile_null+0x26>
lea    0xea9(%rip),%rdi
xor    %eax,%eax
call   1050 <EMIT1ATM@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <EMITEND@plt>
lea    0xe98(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1060 <cerror@plt>

LLVM IR (-O0):
%struct.conscell = type opaque
@.str = [5 x i8] c"NULL\00"
@.str.1 = [22 x i8] c"null: wrong # of args\00"
define void @bu_compile_null(%struct.conscell* %0) {
%2 = alloca %struct.conscell*
%3 = alloca i32
store %struct.conscell* %0, %struct.conscell** %2
%4 = load %struct.conscell*, %struct.conscell** %2
%5 = call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
br label %12
9: ; preds = %1
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @EMITEND()
br label %15
12: ; preds = %8
%13 = load %struct.conscell*, %struct.conscell** %2
%14 = call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %13)
br label %15
15: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
%struct.conscell = type opaque
@.str = [5 x i8] c"NULL\00"
@.str.1 = [22 x i8] c"null: wrong # of args\00"
define void @bu_compile_null(%struct.conscell* %0) {
%2 = tail call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %0)
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @EMITEND()
br label %9
7: ; preds = %1
%8 = tail call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %0)
br label %9
9: ; preds = %7, %4
ret void
}
int capture_nullchar(const char *carg, void *pvar) {
  char *p = pvar;
  if (!p)
    return 1;
  *p = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<capture_nullchar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    112b <capture_nullchar+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1139 <capture_nullchar+0x39>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<capture_nullchar>:
test   %rsi,%rsi
je     110b <capture_nullchar+0xb>
movb   $0x0,(%rsi)
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @capture_nullchar(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
store i8* %7, i8** %6
%8 = load i8*, i8** %6
%9 = icmp ne i8* %8, null
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 1, i32* %3
br label %13
11: ; preds = %2
%12 = load i8*, i8** %6
store i8 0, i8* %12
store i32 0, i32* %3
br label %13
13: ; preds = %11, %10
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @capture_nullchar(i8* nocapture readnone %0, i8* writeonly %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %5, label %4
4: ; preds = %2
store i8 0, i8* %1
br label %5
5: ; preds = %2, %4
%6 = phi i32 [ 0, %4 ], [ 1, %2 ]
ret i32 %6
}
/* Variables and functions */
void Reserved_Handler16(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<Reserved_Handler16>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Reserved_Handler16+0x9>
jmp    1109 <Reserved_Handler16+0x9>

x86 assembly (clang, -O2):
<Reserved_Handler16>:
jmp    1100 <Reserved_Handler16>

LLVM IR (-O0):
define void @Reserved_Handler16() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Reserved_Handler16() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int yyparse();
int main() {
  printf("> ");
  return yyparse();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <yyparse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <yyparse@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"> \00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @yyparse()
ret i32 %3
}

LLVM IR (-O2):
@.str = [3 x i8] c"> \00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @yyparse()
ret i32 %2
}
void gtk_progress_bar_set_text() {}


x86 assembly (clang, -O0):
<gtk_progress_bar_set_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_progress_bar_set_text>:
ret

LLVM IR (-O0):
define void @gtk_progress_bar_set_text() {
ret void
}

LLVM IR (-O2):
define void @gtk_progress_bar_set_text() {
ret void
}
void nntp_main_set_timeout(int sec) {}


x86 assembly (clang, -O0):
<nntp_main_set_timeout>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nntp_main_set_timeout>:
ret

LLVM IR (-O0):
define void @nntp_main_set_timeout(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @nntp_main_set_timeout(i32 %0) {
ret void
}
/* Variables and functions */
int *malloc_wrapper_1();
int *malloc_wrapper_2(int b) {
  if (b) {
    return malloc_wrapper_1();
  }
}


x86 assembly (clang, -O0):
<malloc_wrapper_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1130 <malloc_wrapper_2+0x20>
mov    $0x0,%al
call   1030 <malloc_wrapper_1@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_wrapper_2>:
test   %edi,%edi
je     111b <malloc_wrapper_2+0xb>
xor    %eax,%eax
jmp    1030 <malloc_wrapper_1@plt>
ret

LLVM IR (-O0):
define i32* @malloc_wrapper_2(i32 %0) {
%2 = alloca i32*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32* (...) @malloc_wrapper_1()
store i32* %7, i32** %2
br label %8
8: ; preds = %6, %1
%9 = load i32*, i32** %2
ret i32* %9
}

LLVM IR (-O2):
define i32* @malloc_wrapper_2(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32* (...) @malloc_wrapper_1()
br label %5
5: ; preds = %3, %1
%6 = phi i32* [ %4, %3 ], [ undef, %1 ]
ret i32* %6
}
unsigned long ADCPhaseDelayGet(unsigned long ulBase) {
  ;
  return ((*((volatile unsigned long *)(ulBase + 0x00000024))));
}


x86 assembly (clang, -O0):
<ADCPhaseDelayGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCPhaseDelayGet>:
mov    0x24(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @ADCPhaseDelayGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 36
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @ADCPhaseDelayGet(i64 %0) {
%2 = add i64 %0, 36
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ putc(int);
int uart_get();
int getc(void) {
  int c = uart_get();
  putc(c);
  return c;
}


x86 assembly (clang, -O0):
<getc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <uart_get@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <putc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getc>:
push   %rbx
xor    %eax,%eax
call   1030 <uart_get@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1040 <putc@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getc() {
%1 = alloca i32
%2 = call i32 (...) @uart_get()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @putc(i32 %3)
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @getc() {
%1 = tail call i32 (...) @uart_get()
%2 = tail call i32 @putc(i32 %1)
ret i32 %1
}
char fmt_tohex(char c) { return (char)(c >= 10 ? c - 10 + 'a' : c + '0'); }


x86 assembly (clang, -O0):
<fmt_tohex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jl     1129 <fmt_tohex+0x29>
movsbl -0x1(%rbp),%eax
sub    $0xa,%eax
add    $0x61,%eax
mov    %eax,-0x8(%rbp)
jmp    1133 <fmt_tohex+0x33>
movsbl -0x1(%rbp),%eax
add    $0x30,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_tohex>:
cmp    $0xa,%dil
mov    $0x57,%ecx
mov    $0x30,%eax
cmovge %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @fmt_tohex(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 10
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = sub nsw i32 %8, 10
%10 = add nsw i32 %9, 97
br label %15
11: ; preds = %1
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = add nsw i32 %13, 48
br label %15
15: ; preds = %11, %6
%16 = phi i32 [ %10, %6 ], [ %14, %11 ]
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @fmt_tohex(i8 signext %0) {
%2 = icmp sgt i8 %0, 9
%3 = select i1 %2, i8 87, i8 48
%4 = add i8 %3, %0
ret i8 %4
}
int fstat(f, b)
struct stat *b;
{
  return (0);
}


x86 assembly (clang, -O0):
<fstat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstat>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.stat = type opaque
define i32 @fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
ret i32 0
}

LLVM IR (-O2):
%struct.stat = type opaque
define i32 @fstat(i32 %0, %struct.stat* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
scalar_t__ gethostname(char *, int);
int /*<<< orphan*/ string_to_fortchar(char *, int, char *);
void util_hostname_(char *name, int namelen) {
  char buf[256];
  if (gethostname(buf, (int)sizeof(buf)) != 0)
    buf[0] = 0;
  (void)string_to_fortchar(name, namelen, buf);
}


x86 assembly (clang, -O0):
<util_hostname_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x110(%rbp),%rdi
mov    $0x100,%esi
call   1040 <gethostname@plt>
cmp    $0x0,%rax
je     1154 <util_hostname_+0x34>
movb   $0x0,-0x110(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    -0x110(%rbp),%rdx
call   1030 <string_to_fortchar@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_hostname_>:
push   %rbp
push   %rbx
sub    $0x108,%rsp
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %rsp,%rdi
mov    $0x100,%esi
call   1040 <gethostname@plt>
test   %rax,%rax
je     1144 <util_hostname_+0x24>
movb   $0x0,(%rsp)
mov    %rsp,%rdx
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <string_to_fortchar@plt>
add    $0x108,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @util_hostname_(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = call i64 @gethostname(i8* %6, i32 256)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
store i8 0, i8* %10
br label %11
11: ; preds = %9, %2
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%15 = call i32 @string_to_fortchar(i8* %12, i32 %13, i8* %14)
ret void
}

LLVM IR (-O2):
define void @util_hostname_(i8* %0, i32 %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i64 @gethostname(i8* %4, i32 256)
%6 = icmp eq i64 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
store i8 0, i8* %4
br label %8
8: ; preds = %7, %2
%9 = call i32 @string_to_fortchar(i8* %0, i32 %1, i8* %4)
ret void
}
/* Type definitions */
struct aiocb {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int aio_error(const struct aiocb *cb) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<aio_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aio_error>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.aiocb = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @aio_error(%struct.aiocb* %0) {
%2 = alloca %struct.aiocb*
store %struct.aiocb* %0, %struct.aiocb** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.aiocb = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @aio_error(%struct.aiocb* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i32 -1
}
int succ_key_int_pos(void) {
  static int i = 0;
  i = (i + 1) & 0x7FFFFFFF;
  return i;
}


x86 assembly (clang, -O0):
<succ_key_int_pos>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
add    $0x1,%eax
and    $0x7fffffff,%eax
mov    %eax,0x2f0c(%rip)
mov    0x2f06(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<succ_key_int_pos>:
mov    0x2f1e(%rip),%eax
add    $0x1,%eax
and    $0x7fffffff,%eax
mov    %eax,0x2f10(%rip)
ret

LLVM IR (-O0):
@succ_key_int_pos.i = internal global i32 0
define i32 @succ_key_int_pos() {
%1 = load i32, i32* @succ_key_int_pos.i
%2 = add nsw i32 %1, 1
%3 = and i32 %2, 2147483647
store i32 %3, i32* @succ_key_int_pos.i
%4 = load i32, i32* @succ_key_int_pos.i
ret i32 %4
}

LLVM IR (-O2):
@succ_key_int_pos.i = internal unnamed_addr global i32 0
define i32 @succ_key_int_pos() {
%1 = load i32, i32* @succ_key_int_pos.i
%2 = add nsw i32 %1, 1
%3 = and i32 %2, 2147483647
store i32 %3, i32* @succ_key_int_pos.i
ret i32 %3
}
int dquot_transfer(struct inode *inode, struct iattr *iattr) { return 0; }


x86 assembly (clang, -O0):
<dquot_transfer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dquot_transfer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.iattr = type opaque
define i32 @dquot_transfer(%struct.inode* %0, %struct.iattr* %1) {
%3 = alloca %struct.inode*
%4 = alloca %struct.iattr*
store %struct.inode* %0, %struct.inode** %3
store %struct.iattr* %1, %struct.iattr** %4
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.iattr = type opaque
define i32 @dquot_transfer(%struct.inode* nocapture readnone %0, %struct.iattr* nocapture readnone %1) {
ret i32 0
}