#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int get_cputype(int);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
scalar_t__ support_avx();
int get_coretype(void) {
  int family, exfamily, model, exmodel, vendor;
  if (!have_cpuid())
    return 1;
  family = get_cputype(4);
  exfamily = get_cputype(1);
  model = get_cputype(5);
  exmodel = get_cputype(2);
  vendor = get_vendor();
  if (vendor == 1) {
    switch (family) {
    case 4:
      return 1;
    case 5:
      return 2;
    case 6:
      switch (exmodel) {
      case 0:
        switch (model) {
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
          return 3;
        case 7:
          return 4;
        case 8:
        case 10:
        case 11:
          return 5;
        case 9:
        case 13:
        case 14:
          return 8;
        case 15:
          return 14;
        }
        break;
      case 1:
        switch (model) {
        case 6:
          return 14;
        case 7:
          return 15;
        case 10:
        case 11:
        case 14:
        case 15:
          return 17;
        case 12:
          return 18;
        case 13:
          return 16;
        }
        break;
      case 2:
        switch (model) {
        case 5:
          return 17;
        case 10:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
          return 17;
        case 13:
          if (support_avx())
            return 20;
          else
            return 17;
        case 14:
        case 15:
          return 17;
        }
        break;
      case 3:
        switch (model) {
        case 10:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
          if (support_avx())
            return 20;
          else
            return 17;
        }
        break;
      case 4:
        switch (model) {
        case 5:
          if (support_avx())
            return 20;
          else
            return 17;
        }
        break;
      }
      break;
    case 15:
      if (model <= 0x2)
        return 6;
      else
        return 7;
    }
  }
  if (vendor == 3) {
    if (family <= 0x5)
      return 1;
    if (family <= 0xe)
      return 9;
    if (family == 0xf) {
      if ((exfamily == 0) || (exfamily == 2))
        return 10;
      else if (exfamily == 5)
        return 21;
      else if (exfamily == 6) {
        if (support_avx())
          return 22;
        else
          return 11;
      } else
        return 11;
    }
  }
  if (vendor == 6) {
    switch (family) {
    case 0x6:
      return 19;
      break;
    }
    return 12;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_coretype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    $0x0,%al
call   1060 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1164 <get_coretype+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0xc(%rbp)
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    146d <get_coretype+0x32d>
mov    -0x8(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0xb,%eax
ja     1468 <get_coretype+0x328>
mov    -0x20(%rbp),%rax
lea    0xe34(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x2,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
mov    -0x14(%rbp),%eax
mov    %rax,-0x28(%rbp)
sub    $0x4,%rax
ja     1441 <get_coretype+0x301>
mov    -0x28(%rbp),%rax
lea    0xe27(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%eax
mov    %rax,-0x30(%rbp)
sub    $0xf,%rax
ja     1273 <get_coretype+0x133>
mov    -0x30(%rbp),%rax
lea    0xe6a(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x4,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x5,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x8,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0xe,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    1441 <get_coretype+0x301>
mov    -0x10(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x38(%rbp)
sub    $0x9,%eax
ja     12dd <get_coretype+0x19d>
mov    -0x38(%rbp),%rax
lea    0xdd8(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0xf,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x12,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x10,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    1441 <get_coretype+0x301>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0xa,%eax
ja     1381 <get_coretype+0x241>
mov    -0x40(%rbp),%rax
lea    0xd42(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%rax
je     1334 <get_coretype+0x1f4>
movl   $0x14,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%rax
je     1369 <get_coretype+0x229>
movl   $0x14,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    1441 <get_coretype+0x301>
mov    -0x10(%rbp),%eax
mov    %eax,-0x44(%rbp)
sub    $0xa,%eax
je     13ab <get_coretype+0x26b>
jmp    139a <get_coretype+0x25a>
mov    -0x44(%rbp),%eax
sub    $0xc,%eax
je     13d4 <get_coretype+0x294>
jmp    13fd <get_coretype+0x2bd>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%rax
je     13c8 <get_coretype+0x288>
movl   $0x14,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%rax
je     13f1 <get_coretype+0x2b1>
movl   $0x14,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    1441 <get_coretype+0x301>
mov    -0x10(%rbp),%eax
sub    $0x5,%eax
jne    143c <get_coretype+0x2fc>
jmp    1413 <get_coretype+0x2d3>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%rax
je     1430 <get_coretype+0x2f0>
movl   $0x14,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x11,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    1441 <get_coretype+0x301>
jmp    1468 <get_coretype+0x328>
cmpl   $0x2,-0x10(%rbp)
jg     145c <get_coretype+0x31c>
movl   $0x6,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x7,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    146d <get_coretype+0x32d>
cmpl   $0x3,-0x18(%rbp)
jne    1527 <get_coretype+0x3e7>
cmpl   $0x5,-0x8(%rbp)
jg     148d <get_coretype+0x34d>
movl   $0x1,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
cmpl   $0xe,-0x8(%rbp)
jg     14a3 <get_coretype+0x363>
movl   $0x9,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
cmpl   $0xf,-0x8(%rbp)
jne    1522 <get_coretype+0x3e2>
cmpl   $0x0,-0xc(%rbp)
je     14c1 <get_coretype+0x381>
cmpl   $0x2,-0xc(%rbp)
jne    14cd <get_coretype+0x38d>
movl   $0xa,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
cmpl   $0x5,-0xc(%rbp)
jne    14e3 <get_coretype+0x3a3>
movl   $0x15,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
cmpl   $0x6,-0xc(%rbp)
jne    1516 <get_coretype+0x3d6>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%rax
je     150a <get_coretype+0x3ca>
movl   $0x16,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0xb,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0xb,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
jmp    1527 <get_coretype+0x3e7>
cmpl   $0x6,-0x18(%rbp)
jne    155a <get_coretype+0x41a>
mov    -0x8(%rbp),%eax
sub    $0x6,%eax
jne    154e <get_coretype+0x40e>
jmp    1542 <get_coretype+0x402>
movl   $0x13,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0xc,-0x4(%rbp)
jmp    1561 <get_coretype+0x421>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coretype>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1060 <have_cpuid@plt>
test   %eax,%eax
je     11cd <get_coretype+0x8d>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebp
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r15d
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r14d
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r12d
xor    %eax,%eax
call   1040 <get_vendor@plt>
cmp    $0x6,%eax
je     11d7 <get_coretype+0x97>
cmp    $0x3,%eax
je     11ec <get_coretype+0xac>
cmp    $0x1,%eax
jne    12fc <get_coretype+0x1bc>
add    $0xfffffffc,%ebp
cmp    $0xb,%ebp
ja     12fa <get_coretype+0x1ba>
mov    $0x1,%ebx
lea    0xe46(%rip),%rax
movslq (%rax,%rbp,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x2,%ebx
jmp    12fc <get_coretype+0x1bc>
mov    $0x1,%ebx
jmp    12fc <get_coretype+0x1bc>
cmp    $0x6,%ebp
mov    $0x13,%eax
mov    $0xc,%ebx
cmove  %eax,%ebx
jmp    12fc <get_coretype+0x1bc>
mov    $0x1,%ebx
cmp    $0x6,%ebp
jl     12fc <get_coretype+0x1bc>
mov    $0x9,%ebx
cmp    $0xf,%ebp
jb     12fc <get_coretype+0x1bc>
mov    $0x0,%ebx
jne    12fc <get_coretype+0x1bc>
test   $0xfffffffd,%r15d
je     128d <get_coretype+0x14d>
cmp    $0x5,%r15d
je     1307 <get_coretype+0x1c7>
cmp    $0x6,%r15d
jne    130e <get_coretype+0x1ce>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x16,%ebx
cmove  %eax,%ebx
jmp    12fc <get_coretype+0x1bc>
cmp    $0x4,%r12d
ja     12fa <get_coretype+0x1ba>
mov    %r12d,%eax
lea    0xdd0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0x10,%r14d
jae    12fa <get_coretype+0x1ba>
movslq %r14d,%rax
lea    0xdc7(%rip),%rcx
jmp    12a8 <get_coretype+0x168>
xor    %ebx,%ebx
cmp    $0x3,%r14d
setl   %bl
xor    $0x7,%ebx
jmp    12fc <get_coretype+0x1bc>
mov    $0xa,%ebx
jmp    12fc <get_coretype+0x1bc>
add    $0xfffffffa,%r14d
cmp    $0xa,%r14d
jae    12fa <get_coretype+0x1ba>
movslq %r14d,%rax
lea    0xddc(%rip),%rcx
mov    (%rcx,%rax,4),%ebx
jmp    12fc <get_coretype+0x1bc>
cmp    $0xf,%r14d
ja     12fa <get_coretype+0x1ba>
mov    $0x11,%ebx
mov    $0xd020,%eax
bt     %r14d,%eax
jb     12fc <get_coretype+0x1bc>
cmp    $0xa,%r14d
je     12dd <get_coretype+0x19d>
cmp    $0xd,%r14d
je     12dd <get_coretype+0x19d>
jmp    12fa <get_coretype+0x1ba>
cmp    $0xc,%r14d
je     12dd <get_coretype+0x19d>
cmp    $0xa,%r14d
jne    12fa <get_coretype+0x1ba>
xor    %eax,%eax
call   1050 <support_avx@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
lea    (%rcx,%rcx,2),%ebx
add    $0x11,%ebx
jmp    12fc <get_coretype+0x1bc>
cmp    $0x5,%r14d
je     12dd <get_coretype+0x19d>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret
mov    $0x15,%ebx
jmp    12fc <get_coretype+0x1bc>
mov    $0xb,%ebx
jmp    12fc <get_coretype+0x1bc>

LLVM IR (-O0):
define i32 @get_coretype() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = call i32 (...) @have_cpuid()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 1, i32* %1
br label %127
10: ; preds = %0
%11 = call i32 @get_cputype(i32 4)
store i32 %11, i32* %2
%12 = call i32 @get_cputype(i32 1)
store i32 %12, i32* %3
%13 = call i32 @get_cputype(i32 5)
store i32 %13, i32* %4
%14 = call i32 @get_cputype(i32 2)
store i32 %14, i32* %5
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = load i32, i32* %6
%17 = icmp eq i32 %16, 1
br i1 %17, label %18, label %84
18: ; preds = %10
%19 = load i32, i32* %2
switch i32 %19, label %83 [
i32 4, label %20
i32 5, label %21
i32 6, label %22
i32 15, label %78
]
20: ; preds = %18
store i32 1, i32* %1
br label %127
21: ; preds = %18
store i32 2, i32* %1
br label %127
22: ; preds = %18
%23 = load i32, i32* %5
switch i32 %23, label %77 [
i32 0, label %24
i32 1, label %32
i32 2, label %40
i32 3, label %56
i32 4, label %69
]
24: ; preds = %22
%25 = load i32, i32* %4
switch i32 %25, label %31 [
i32 0, label %26
i32 1, label %26
i32 2, label %26
i32 3, label %26
i32 4, label %26
i32 5, label %26
i32 6, label %26
i32 7, label %27
i32 8, label %28
i32 10, label %28
i32 11, label %28
i32 9, label %29
i32 13, label %29
i32 14, label %29
i32 15, label %30
]
26: ; preds = %24, %24, %24, %24, %24, %24, %24
store i32 3, i32* %1
br label %127
27: ; preds = %24
store i32 4, i32* %1
br label %127
28: ; preds = %24, %24, %24
store i32 5, i32* %1
br label %127
29: ; preds = %24, %24, %24
store i32 8, i32* %1
br label %127
30: ; preds = %24
store i32 14, i32* %1
br label %127
31: ; preds = %24
br label %77
32: ; preds = %22
%33 = load i32, i32* %4
switch i32 %33, label %39 [
i32 6, label %34
i32 7, label %35
i32 10, label %36
i32 11, label %36
i32 14, label %36
i32 15, label %36
i32 12, label %37
i32 13, label %38
]
34: ; preds = %32
store i32 14, i32* %1
br label %127
35: ; preds = %32
store i32 15, i32* %1
br label %127
36: ; preds = %32, %32, %32, %32
store i32 17, i32* %1
br label %127
37: ; preds = %32
store i32 18, i32* %1
br label %127
38: ; preds = %32
store i32 16, i32* %1
br label %127
39: ; preds = %32
br label %77
40: ; preds = %22
%41 = load i32, i32* %4
switch i32 %41, label %55 [
i32 5, label %42
i32 10, label %43
i32 12, label %48
i32 13, label %49
i32 14, label %54
i32 15, label %54
]
42: ; preds = %40
store i32 17, i32* %1
br label %127
43: ; preds = %40
%44 = call i64 (...) @support_avx()
%45 = icmp ne i64 %44, 0
br i1 %45, label %46, label %47
46: ; preds = %43
store i32 20, i32* %1
br label %127
47: ; preds = %43
store i32 17, i32* %1
br label %127
48: ; preds = %40
store i32 17, i32* %1
br label %127
49: ; preds = %40
%50 = call i64 (...) @support_avx()
%51 = icmp ne i64 %50, 0
br i1 %51, label %52, label %53
52: ; preds = %49
store i32 20, i32* %1
br label %127
53: ; preds = %49
store i32 17, i32* %1
br label %127
54: ; preds = %40, %40
store i32 17, i32* %1
br label %127
55: ; preds = %40
br label %77
56: ; preds = %22
%57 = load i32, i32* %4
switch i32 %57, label %68 [
i32 10, label %58
i32 12, label %63
]
58: ; preds = %56
%59 = call i64 (...) @support_avx()
%60 = icmp ne i64 %59, 0
br i1 %60, label %61, label %62
61: ; preds = %58
store i32 20, i32* %1
br label %127
62: ; preds = %58
store i32 17, i32* %1
br label %127
63: ; preds = %56
%64 = call i64 (...) @support_avx()
%65 = icmp ne i64 %64, 0
br i1 %65, label %66, label %67
66: ; preds = %63
store i32 20, i32* %1
br label %127
67: ; preds = %63
store i32 17, i32* %1
br label %127
68: ; preds = %56
br label %77
69: ; preds = %22
%70 = load i32, i32* %4
switch i32 %70, label %76 [
i32 5, label %71
]
71: ; preds = %69
%72 = call i64 (...) @support_avx()
%73 = icmp ne i64 %72, 0
br i1 %73, label %74, label %75
74: ; preds = %71
store i32 20, i32* %1
br label %127
75: ; preds = %71
store i32 17, i32* %1
br label %127
76: ; preds = %69
br label %77
77: ; preds = %22, %76, %68, %55, %39, %31
br label %83
78: ; preds = %18
%79 = load i32, i32* %4
%80 = icmp sle i32 %79, 2
br i1 %80, label %81, label %82
81: ; preds = %78
store i32 6, i32* %1
br label %127
82: ; preds = %78
store i32 7, i32* %1
br label %127
83: ; preds = %18, %77
br label %84
84: ; preds = %83, %10
%85 = load i32, i32* %6
%86 = icmp eq i32 %85, 3
br i1 %86, label %87, label %119
87: ; preds = %84
%88 = load i32, i32* %2
%89 = icmp sle i32 %88, 5
br i1 %89, label %90, label %91
90: ; preds = %87
store i32 1, i32* %1
br label %127
91: ; preds = %87
%92 = load i32, i32* %2
%93 = icmp sle i32 %92, 14
br i1 %93, label %94, label %95
94: ; preds = %91
store i32 9, i32* %1
br label %127
95: ; preds = %91
%96 = load i32, i32* %2
%97 = icmp eq i32 %96, 15
br i1 %97, label %98, label %118
98: ; preds = %95
%99 = load i32, i32* %3
%100 = icmp eq i32 %99, 0
br i1 %100, label %104, label %101
101: ; preds = %98
%102 = load i32, i32* %3
%103 = icmp eq i32 %102, 2
br i1 %103, label %104, label %105
104: ; preds = %101, %98
store i32 10, i32* %1
br label %127
105: ; preds = %101
%106 = load i32, i32* %3
%107 = icmp eq i32 %106, 5
br i1 %107, label %108, label %109
108: ; preds = %105
store i32 21, i32* %1
br label %127
109: ; preds = %105
%110 = load i32, i32* %3
%111 = icmp eq i32 %110, 6
br i1 %111, label %112, label %117
112: ; preds = %109
%113 = call i64 (...) @support_avx()
%114 = icmp ne i64 %113, 0
br i1 %114, label %115, label %116
115: ; preds = %112
store i32 22, i32* %1
br label %127
116: ; preds = %112
store i32 11, i32* %1
br label %127
117: ; preds = %109
store i32 11, i32* %1
br label %127
118: ; preds = %95
br label %119
119: ; preds = %118, %84
%120 = load i32, i32* %6
%121 = icmp eq i32 %120, 6
br i1 %121, label %122, label %126
122: ; preds = %119
%123 = load i32, i32* %2
switch i32 %123, label %125 [
i32 6, label %124
]
124: ; preds = %122
store i32 19, i32* %1
br label %127
125: ; preds = %122
store i32 12, i32* %1
br label %127
126: ; preds = %119
store i32 0, i32* %1
br label %127
127: ; preds = %126, %125, %124, %117, %116, %115, %108, %104, %94, %90, %82, %81, %75, %74, %67, %66, %62, %61, %54, %53, %52, %48, %47, %46, %42, %38, %37, %36, %35, %34, %30, %29, %28, %27, %26, %21, %20, %9
%128 = load i32, i32* %1
ret i32 %128
}

LLVM IR (-O2):
@switch.table.get_coretype = [16 x i32] [i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 4, i32 5, i32 8, i32 5, i32 5, i32 0, i32 8, i32 8, i32 14]
@switch.table.get_coretype.1 = [10 x i32] [i32 14, i32 15, i32 0, i32 0, i32 17, i32 17, i32 18, i32 16, i32 17, i32 17]
define i32 @get_coretype() {
%1 = tail call i32 (...) @have_cpuid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %71, label %3
3: ; preds = %0
%4 = tail call i32 @get_cputype(i32 4)
%5 = tail call i32 @get_cputype(i32 1)
%6 = tail call i32 @get_cputype(i32 5)
%7 = tail call i32 @get_cputype(i32 2)
%8 = tail call i32 (...) @get_vendor()
switch i32 %8, label %71 [
i32 1, label %9
i32 3, label %45
i32 6, label %60
]
9: ; preds = %3
switch i32 %4, label %44 [
i32 4, label %71
i32 5, label %10
i32 6, label %11
i32 15, label %41
]
10: ; preds = %9
br label %71
11: ; preds = %9
switch i32 %7, label %44 [
i32 0, label %12
i32 1, label %14
i32 2, label %17
i32 3, label %26
i32 4, label %35
]
12: ; preds = %11
%13 = icmp ult i32 %6, 16
br i1 %13, label %63, label %44
14: ; preds = %11
%15 = add i32 %6, -6
%16 = icmp ult i32 %15, 10
br i1 %16, label %67, label %44
17: ; preds = %11
switch i32 %6, label %44 [
i32 5, label %71
i32 10, label %18
i32 12, label %71
i32 13, label %22
i32 14, label %71
i32 15, label %71
]
18: ; preds = %17
%19 = tail call i64 (...) @support_avx()
%20 = icmp eq i64 %19, 0
%21 = select i1 %20, i32 17, i32 20
br label %71
22: ; preds = %17
%23 = tail call i64 (...) @support_avx()
%24 = icmp eq i64 %23, 0
%25 = select i1 %24, i32 17, i32 20
br label %71
26: ; preds = %11
switch i32 %6, label %44 [
i32 10, label %27
i32 12, label %31
]
27: ; preds = %26
%28 = tail call i64 (...) @support_avx()
%29 = icmp eq i64 %28, 0
%30 = select i1 %29, i32 17, i32 20
br label %71
31: ; preds = %26
%32 = tail call i64 (...) @support_avx()
%33 = icmp eq i64 %32, 0
%34 = select i1 %33, i32 17, i32 20
br label %71
35: ; preds = %11
%36 = icmp eq i32 %6, 5
br i1 %36, label %37, label %44
37: ; preds = %35
%38 = tail call i64 (...) @support_avx()
%39 = icmp eq i64 %38, 0
%40 = select i1 %39, i32 17, i32 20
br label %71
41: ; preds = %9
%42 = icmp slt i32 %6, 3
%43 = select i1 %42, i32 6, i32 7
br label %71
44: ; preds = %14, %12, %9, %35, %26, %17, %11
br label %71
45: ; preds = %3
%46 = icmp slt i32 %4, 6
br i1 %46, label %71, label %47
47: ; preds = %45
%48 = icmp ult i32 %4, 15
br i1 %48, label %71, label %49
49: ; preds = %47
%50 = icmp eq i32 %4, 15
br i1 %50, label %51, label %71
51: ; preds = %49
%52 = and i32 %5, -3
%53 = icmp eq i32 %52, 0
br i1 %53, label %71, label %54
54: ; preds = %51
switch i32 %5, label %59 [
i32 5, label %71
i32 6, label %55
]
55: ; preds = %54
%56 = tail call i64 (...) @support_avx()
%57 = icmp eq i64 %56, 0
%58 = select i1 %57, i32 11, i32 22
br label %71
59: ; preds = %54
br label %71
60: ; preds = %3
%61 = icmp eq i32 %4, 6
%62 = select i1 %61, i32 19, i32 12
br label %71
63: ; preds = %12
%64 = sext i32 %6 to i64
%65 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.get_coretype, i64 0, i64 %64
%66 = load i32, i32* %65
br label %71
67: ; preds = %14
%68 = sext i32 %15 to i64
%69 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.get_coretype.1, i64 0, i64 %68
%70 = load i32, i32* %69
br label %71
71: ; preds = %67, %63, %49, %44, %3, %60, %55, %54, %51, %47, %45, %41, %37, %31, %27, %17, %17, %22, %17, %18, %17, %9, %0, %59, %10
%72 = phi i32 [ 11, %59 ], [ 2, %10 ], [ 1, %0 ], [ 1, %9 ], [ 17, %17 ], [ %21, %18 ], [ 17, %17 ], [ %25, %22 ], [ 17, %17 ], [ 17, %17 ], [ %30, %27 ], [ %34, %31 ], [ %40, %37 ], [ %43, %41 ], [ 1, %45 ], [ 9, %47 ], [ 10, %51 ], [ 21, %54 ], [ %58, %55 ], [ %62, %60 ], [ 0, %3 ], [ 0, %44 ], [ 0, %49 ], [ %66, %63 ], [ %70, %67 ]
ret i32 %72
}