void kernel_CPU_06_mod_3DRhoCte(float *gU0, float *gU1, float *gVorg, int nnoi,
                                int nnoj, int k0, int k1, float FATMDFX,
                                float FATMDFY, float FATMDFZ, float *W) {
  int index_X, index_Y;
  int block_index_X, block_k;
  int stride = nnoi * nnoj;
  int index, k;
  for (k = 0; k < k1 - k0; k += 2)
    for (index_X = 0; index_X < nnoi; index_X += 2)
      for (index_Y = 0; index_Y < nnoj; index_Y++)
        for (block_k = k; block_k < ({
                            typeof(k1 - k0) _min1 = (k1 - k0);
                            typeof(k + 2) _min2 = (k + 2);
                            (void)(&_min1 == &_min2);
                            _min1 < _min2 ? _min1 : _min2;
                          });
             block_k++) {
          for (block_index_X = index_X; block_index_X < ({
                                          typeof(nnoi) _min1 = (nnoi);
                                          typeof(index_X + 2) _min2 =
                                              (index_X + 2);
                                          (void)(&_min1 == &_min2);
                                          _min1 < _min2 ? _min1 : _min2;
                                        });
               block_index_X++) {
            index = (index_Y * nnoi + block_index_X) + (k0 + block_k) * stride;
            if (gVorg[index] > 0.0f) {
              gU1[index] =
                  2.0f * gU0[index] - gU1[index] +
                  FATMDFX * gVorg[index] * gVorg[index] *
                      (+W[6] * (gU0[index - 6] + gU0[index + 6]) +
                       W[5] * (gU0[index - 5] + gU0[index + 5]) +
                       W[4] * (gU0[index - 4] + gU0[index + 4]) +
                       W[3] * (gU0[index - 3] + gU0[index + 3]) +
                       W[2] * (gU0[index - 2] + gU0[index + 2]) +
                       W[1] * (gU0[index - 1] + gU0[index + 1]) +
                       W[0] * gU0[index]) +
                  FATMDFY * gVorg[index] * gVorg[index] *
                      (+W[6] * (gU0[index - 6 * nnoi] + gU0[index + 6 * nnoi]) +
                       W[5] * (gU0[index - 5 * nnoi] + gU0[index + 5 * nnoi]) +
                       W[4] * (gU0[index - 4 * nnoi] + gU0[index + 4 * nnoi]) +
                       W[3] * (gU0[index - 3 * nnoi] + gU0[index + 3 * nnoi]) +
                       W[2] * (gU0[index - 2 * nnoi] + gU0[index + 2 * nnoi]) +
                       W[1] * (gU0[index - nnoi] + gU0[index + nnoi]) +
                       W[0] * gU0[index]) +
                  FATMDFZ * gVorg[index] * gVorg[index] *
                      (+W[6] *
                           (gU0[index + 6 * stride] + gU0[index - 6 * stride]) +
                       W[5] *
                           (gU0[index + 5 * stride] + gU0[index - 5 * stride]) +
                       W[4] *
                           (gU0[index + 4 * stride] + gU0[index - 4 * stride]) +
                       W[3] *
                           (gU0[index + 3 * stride] + gU0[index - 3 * stride]) +
                       W[2] *
                           (gU0[index + 2 * stride] + gU0[index - 2 * stride]) +
                       W[1] * (gU0[index + stride] + gU0[index - stride]) +
                       W[0] * gU0[index]);
            }
          }
        }
}


x86 assembly (clang, -O0):
<kernel_CPU_06_mod_3DRhoCte>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movss  %xmm0,-0x28(%rbp)
movss  %xmm1,-0x2c(%rbp)
movss  %xmm2,-0x30(%rbp)
mov    -0x1c(%rbp),%eax
imul   -0x20(%rbp),%eax
mov    %eax,-0x44(%rbp)
movl   $0x0,-0x4c(%rbp)
mov    -0x4c(%rbp),%eax
mov    0x10(%rbp),%ecx
sub    -0x24(%rbp),%ecx
cmp    %ecx,%eax
jge    17a3 <kernel_CPU_06_mod_3DRhoCte+0x6a3>
movl   $0x0,-0x34(%rbp)
mov    -0x34(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    1790 <kernel_CPU_06_mod_3DRhoCte+0x690>
movl   $0x0,-0x38(%rbp)
mov    -0x38(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    177d <kernel_CPU_06_mod_3DRhoCte+0x67d>
mov    -0x4c(%rbp),%eax
mov    %eax,-0x40(%rbp)
mov    -0x40(%rbp),%eax
mov    %eax,-0x68(%rbp)
mov    0x10(%rbp),%eax
sub    -0x24(%rbp),%eax
mov    %eax,-0x50(%rbp)
mov    -0x4c(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x54(%rbp)
mov    -0x50(%rbp),%eax
cmp    -0x54(%rbp),%eax
jge    11ae <kernel_CPU_06_mod_3DRhoCte+0xae>
mov    -0x50(%rbp),%eax
mov    %eax,-0x6c(%rbp)
jmp    11b4 <kernel_CPU_06_mod_3DRhoCte+0xb4>
mov    -0x54(%rbp),%eax
mov    %eax,-0x6c(%rbp)
mov    -0x68(%rbp),%eax
mov    -0x6c(%rbp),%ecx
mov    %ecx,-0x58(%rbp)
cmp    -0x58(%rbp),%eax
jge    176a <kernel_CPU_06_mod_3DRhoCte+0x66a>
mov    -0x34(%rbp),%eax
mov    %eax,-0x3c(%rbp)
mov    -0x3c(%rbp),%eax
mov    %eax,-0x70(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x5c(%rbp)
mov    -0x34(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x60(%rbp)
mov    -0x5c(%rbp),%eax
cmp    -0x60(%rbp),%eax
jge    11f8 <kernel_CPU_06_mod_3DRhoCte+0xf8>
mov    -0x5c(%rbp),%eax
mov    %eax,-0x74(%rbp)
jmp    11fe <kernel_CPU_06_mod_3DRhoCte+0xfe>
mov    -0x60(%rbp),%eax
mov    %eax,-0x74(%rbp)
mov    -0x70(%rbp),%eax
mov    -0x74(%rbp),%ecx
mov    %ecx,-0x64(%rbp)
cmp    -0x64(%rbp),%eax
jge    1757 <kernel_CPU_06_mod_3DRhoCte+0x657>
mov    -0x38(%rbp),%eax
imul   -0x1c(%rbp),%eax
add    -0x3c(%rbp),%eax
mov    -0x24(%rbp),%ecx
add    -0x40(%rbp),%ecx
imul   -0x44(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x48(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1744 <kernel_CPU_06_mod_3DRhoCte+0x644>
mov    -0x8(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm1
mov    -0x10(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
addss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  -0x28(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    $0x6,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    $0x6,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    $0x5,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    $0x5,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    $0x4,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    $0x4,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    $0x3,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    $0x3,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    $0x2,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    $0x2,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  -0x2c(%rbp),%xmm1
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm1
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm1
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x6,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x6,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x5,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x5,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x2,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x2,%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x3,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x3,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x1,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x1,%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0x30(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x48(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x6,-0x44(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x6,-0x44(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x5,-0x44(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x5,-0x44(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x44(%rbp),%edx
shl    $0x2,%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x44(%rbp),%edx
shl    $0x2,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x3,-0x44(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
imul   $0x3,-0x44(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x44(%rbp),%edx
shl    $0x1,%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
mov    -0x44(%rbp),%edx
shl    $0x1,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
add    -0x44(%rbp),%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x48(%rbp),%ecx
sub    -0x44(%rbp),%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movslq -0x48(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
jmp    1749 <kernel_CPU_06_mod_3DRhoCte+0x649>
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
jmp    11cc <kernel_CPU_06_mod_3DRhoCte+0xcc>
jmp    175c <kernel_CPU_06_mod_3DRhoCte+0x65c>
mov    -0x40(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x40(%rbp)
jmp    117f <kernel_CPU_06_mod_3DRhoCte+0x7f>
jmp    176f <kernel_CPU_06_mod_3DRhoCte+0x66f>
mov    -0x38(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x38(%rbp)
jmp    116d <kernel_CPU_06_mod_3DRhoCte+0x6d>
jmp    1782 <kernel_CPU_06_mod_3DRhoCte+0x682>
mov    -0x34(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x34(%rbp)
jmp    115a <kernel_CPU_06_mod_3DRhoCte+0x5a>
jmp    1795 <kernel_CPU_06_mod_3DRhoCte+0x695>
mov    -0x4c(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4c(%rbp)
jmp    1142 <kernel_CPU_06_mod_3DRhoCte+0x42>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_CPU_06_mod_3DRhoCte>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x450,%rsp
movss  %xmm2,-0x4c(%rsp)
movss  %xmm1,-0x50(%rsp)
movss  %xmm0,-0x54(%rsp)
mov    %r8d,-0x78(%rsp)
mov    %ecx,-0x7c(%rsp)
mov    %rdx,0x448(%rsp)
mov    %rsi,0x440(%rsp)
mov    0x488(%rsp),%ebp
sub    %r9d,%ebp
test   %ebp,%ebp
jle    2350 <kernel_CPU_06_mod_3DRhoCte+0x1250>
mov    %r9,%rcx
mov    -0x78(%rsp),%edx
mov    %edx,%eax
mov    -0x7c(%rsp),%esi
imul   %esi,%eax
lea    (%rax,%rax,1),%ebx
mov    %rbx,0x430(%rsp)
mov    %r9,%rbx
imul   %edx,%ecx
mov    %ecx,%r8d
imul   %esi,%r8d
lea    0x6(%r9),%edx
imul   %eax,%edx
mov    %rdx,0xc0(%rsp)
lea    -0x6(%r9),%edx
imul   %eax,%edx
mov    %rdx,0xb8(%rsp)
lea    0x5(%r9),%edx
imul   %eax,%edx
mov    %rdx,0xb0(%rsp)
lea    -0x5(%r9),%edx
imul   %eax,%edx
mov    %rdx,0xa8(%rsp)
lea    0x4(%r9),%edx
imul   %eax,%edx
mov    %rdx,0xa0(%rsp)
lea    -0x4(%r9),%edx
imul   %eax,%edx
mov    %rdx,0x98(%rsp)
lea    0x3(%r9),%edx
imul   %eax,%edx
mov    %rdx,0x90(%rsp)
lea    -0x3(%r9),%edx
imul   %eax,%edx
mov    %rdx,0x88(%rsp)
lea    0x2(%r9),%edx
imul   %eax,%edx
mov    %rdx,0x80(%rsp)
lea    -0x2(%r9),%edx
imul   %eax,%edx
mov    %rdx,0x78(%rsp)
lea    0x1(%r9),%edx
imul   %eax,%edx
mov    %rdx,0x70(%rsp)
add    $0xffffffff,%ebx
imul   %eax,%ebx
mov    %rbx,0xd8(%rsp)
mov    %eax,%r13d
mov    %r8d,%eax
add    $0x1,%eax
mov    %rax,0x68(%rsp)
lea    -0x6(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x60(%rsp)
lea    0x6(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x58(%rsp)
lea    -0x5(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x50(%rsp)
lea    0x5(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x48(%rsp)
lea    -0x4(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x40(%rsp)
lea    0x4(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x38(%rsp)
lea    -0x3(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x30(%rsp)
lea    0x3(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x28(%rsp)
lea    -0x2(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x20(%rsp)
lea    0x2(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x18(%rsp)
lea    -0x1(%rcx),%eax
imul   %esi,%eax
mov    %rax,0x10(%rsp)
add    $0x1,%ecx
imul   %esi,%ecx
mov    %rcx,0xd0(%rsp)
xorps  %xmm0,%xmm0
lea    -0x1(%r8),%eax
mov    %rax,0x8(%rsp)
mov    %esi,%eax
mov    %rax,0x438(%rsp)
lea    -0x2(%r8),%eax
mov    %rax,(%rsp)
lea    -0x3(%r8),%eax
mov    %rax,-0x8(%rsp)
lea    -0x4(%r8),%eax
mov    %rax,-0x10(%rsp)
lea    -0x5(%r8),%eax
mov    %rax,-0x18(%rsp)
lea    -0x6(%r8),%eax
mov    %rax,-0x20(%rsp)
lea    0x6(%r8),%eax
mov    %rax,-0x28(%rsp)
lea    0x5(%r8),%eax
mov    %rax,-0x30(%rsp)
lea    0x4(%r8),%eax
mov    %rax,-0x38(%rsp)
lea    0x3(%r8),%eax
mov    %rax,-0x40(%rsp)
mov    %r8,0xc8(%rsp)
lea    0x2(%r8),%eax
mov    %rax,-0x48(%rsp)
xor    %esi,%esi
mov    $0x2,%ecx
mov    %ebp,-0x74(%rsp)
mov    0x440(%rsp),%r8
jmp    144d <kernel_CPU_06_mod_3DRhoCte+0x34d>
nopw   0x0(%rax,%rax,1)
mov    -0x6c(%rsp),%ecx
add    $0x2,%ecx
mov    0x430(%rsp),%rax
add    %rax,0x8(%rsp)
add    %rax,(%rsp)
add    %rax,-0x8(%rsp)
add    %rax,-0x10(%rsp)
add    %rax,-0x18(%rsp)
add    %rax,-0x20(%rsp)
add    %rax,0xc8(%rsp)
add    %rax,-0x28(%rsp)
add    %rax,-0x30(%rsp)
add    %rax,-0x38(%rsp)
add    %rax,-0x40(%rsp)
add    %rax,-0x48(%rsp)
add    %rax,0x68(%rsp)
add    %rax,0x60(%rsp)
add    %rax,0x58(%rsp)
add    %rax,0x50(%rsp)
add    %rax,0x48(%rsp)
add    %rax,0x40(%rsp)
add    %rax,0x38(%rsp)
add    %rax,0x30(%rsp)
add    %rax,0x28(%rsp)
add    %rax,0x20(%rsp)
add    %rax,0x18(%rsp)
add    %rax,0x10(%rsp)
add    %rax,0xd0(%rsp)
add    %rax,0xc0(%rsp)
add    %rax,0xb8(%rsp)
add    %rax,0xb0(%rsp)
add    %rax,0xa8(%rsp)
add    %rax,0xa0(%rsp)
add    %rax,0x98(%rsp)
add    %rax,0x90(%rsp)
add    %rax,0x88(%rsp)
add    %rax,0x80(%rsp)
add    %rax,0x78(%rsp)
add    %rax,0x70(%rsp)
add    %rax,0xd8(%rsp)
mov    -0x70(%rsp),%eax
mov    %eax,%esi
mov    -0x74(%rsp),%ebp
cmp    %ebp,%eax
jge    2350 <kernel_CPU_06_mod_3DRhoCte+0x1250>
cmp    %ebp,%ecx
mov    %ecx,-0x6c(%rsp)
cmovl  %ecx,%ebp
mov    %ebp,-0x60(%rsp)
lea    0x2(%rsi),%eax
mov    %eax,-0x70(%rsp)
cmpl   $0x0,-0x7c(%rsp)
jle    1350 <kernel_CPU_06_mod_3DRhoCte+0x250>
mov    -0x74(%rsp),%eax
mov    -0x70(%rsp),%ecx
cmp    %ecx,%eax
cmovl  %eax,%ecx
mov    %ecx,-0x68(%rsp)
mov    0xd8(%rsp),%rax
mov    %rax,0x200(%rsp)
mov    0x70(%rsp),%rax
mov    %rax,0x1f8(%rsp)
mov    0x78(%rsp),%rax
mov    %rax,0x1f0(%rsp)
mov    0x80(%rsp),%rax
mov    %rax,0x1e8(%rsp)
mov    0x88(%rsp),%rax
mov    %rax,0x1e0(%rsp)
mov    0x90(%rsp),%rax
mov    %rax,0x1d8(%rsp)
mov    0x98(%rsp),%rax
mov    %rax,0x1d0(%rsp)
mov    0xa0(%rsp),%rax
mov    %rax,0x1c8(%rsp)
mov    0xa8(%rsp),%rax
mov    %rax,0x1c0(%rsp)
mov    0xb0(%rsp),%rax
mov    %rax,0x1b8(%rsp)
mov    0xb8(%rsp),%rax
mov    %rax,0x1b0(%rsp)
mov    0xc0(%rsp),%rax
mov    %rax,0x1a8(%rsp)
mov    0xd0(%rsp),%rax
mov    %rax,0x1a0(%rsp)
mov    0x10(%rsp),%rax
mov    %rax,0x198(%rsp)
mov    0x18(%rsp),%rax
mov    %rax,0x190(%rsp)
mov    0x20(%rsp),%rax
mov    %rax,0x188(%rsp)
mov    0x28(%rsp),%rax
mov    %rax,0x180(%rsp)
mov    0x30(%rsp),%rax
mov    %rax,0x178(%rsp)
mov    0x38(%rsp),%rax
mov    %rax,0x170(%rsp)
mov    0x40(%rsp),%rax
mov    %rax,0x168(%rsp)
mov    0x48(%rsp),%rax
mov    %rax,0x160(%rsp)
mov    0x50(%rsp),%rax
mov    %rax,0x158(%rsp)
mov    0x58(%rsp),%rax
mov    %rax,0x150(%rsp)
mov    0x60(%rsp),%rax
mov    %rax,0x148(%rsp)
mov    0x68(%rsp),%rax
mov    %rax,0x140(%rsp)
mov    -0x48(%rsp),%rax
mov    %rax,0x138(%rsp)
mov    -0x40(%rsp),%rax
mov    %rax,0x130(%rsp)
mov    -0x38(%rsp),%rax
mov    %rax,0x128(%rsp)
mov    -0x30(%rsp),%rax
mov    %rax,0x120(%rsp)
mov    -0x28(%rsp),%rax
mov    %rax,0x118(%rsp)
mov    0xc8(%rsp),%rax
mov    %rax,0x110(%rsp)
mov    -0x20(%rsp),%rax
mov    %rax,0x108(%rsp)
mov    -0x18(%rsp),%rax
mov    %rax,0x100(%rsp)
mov    -0x10(%rsp),%rax
mov    %rax,0xf8(%rsp)
mov    -0x8(%rsp),%rax
mov    %rax,0xf0(%rsp)
mov    (%rsp),%rax
mov    %rax,0xe8(%rsp)
mov    0x8(%rsp),%rax
mov    %rax,0xe0(%rsp)
xor    %ebx,%ebx
mov    %rsi,0x208(%rsp)
jmp    17eb <kernel_CPU_06_mod_3DRhoCte+0x6eb>
add    $0x2,%rbx
addq   $0x2,0xe0(%rsp)
addq   $0x2,0xe8(%rsp)
addq   $0x2,0xf0(%rsp)
addq   $0x2,0xf8(%rsp)
addq   $0x2,0x100(%rsp)
addq   $0x2,0x108(%rsp)
addq   $0x2,0x110(%rsp)
addq   $0x2,0x118(%rsp)
addq   $0x2,0x120(%rsp)
addq   $0x2,0x128(%rsp)
addq   $0x2,0x130(%rsp)
addq   $0x2,0x138(%rsp)
addq   $0x2,0x140(%rsp)
addq   $0x2,0x148(%rsp)
addq   $0x2,0x150(%rsp)
addq   $0x2,0x158(%rsp)
addq   $0x2,0x160(%rsp)
addq   $0x2,0x168(%rsp)
addq   $0x2,0x170(%rsp)
addq   $0x2,0x178(%rsp)
addq   $0x2,0x180(%rsp)
addq   $0x2,0x188(%rsp)
addq   $0x2,0x190(%rsp)
addq   $0x2,0x198(%rsp)
addq   $0x2,0x1a0(%rsp)
addq   $0x2,0x1a8(%rsp)
addq   $0x2,0x1b0(%rsp)
addq   $0x2,0x1b8(%rsp)
addq   $0x2,0x1c0(%rsp)
addq   $0x2,0x1c8(%rsp)
addq   $0x2,0x1d0(%rsp)
addq   $0x2,0x1d8(%rsp)
addq   $0x2,0x1e0(%rsp)
addq   $0x2,0x1e8(%rsp)
addq   $0x2,0x1f0(%rsp)
addq   $0x2,0x1f8(%rsp)
addq   $0x2,0x200(%rsp)
cmp    -0x7c(%rsp),%ebx
jge    1350 <kernel_CPU_06_mod_3DRhoCte+0x250>
cmpl   $0x0,-0x78(%rsp)
jle    1690 <kernel_CPU_06_mod_3DRhoCte+0x590>
lea    0x2(%rbx),%ecx
mov    -0x7c(%rsp),%eax
cmp    %eax,%ecx
cmovg  %eax,%ecx
mov    %ecx,-0x5c(%rsp)
movslq %ecx,%rdx
xor    %ecx,%ecx
mov    0x200(%rsp),%rax
mov    %rax,0x330(%rsp)
mov    0x1f8(%rsp),%rax
mov    %rax,0x328(%rsp)
mov    0x1f0(%rsp),%rax
mov    %rax,0x320(%rsp)
mov    0x1e8(%rsp),%rax
mov    %rax,0x318(%rsp)
mov    0x1e0(%rsp),%rax
mov    %rax,0x310(%rsp)
mov    0x1d8(%rsp),%rax
mov    %rax,0x308(%rsp)
mov    0x1d0(%rsp),%rax
mov    %rax,0x300(%rsp)
mov    0x1c8(%rsp),%rax
mov    %rax,0x2f8(%rsp)
mov    0x1c0(%rsp),%rax
mov    %rax,0x2f0(%rsp)
mov    0x1b8(%rsp),%rax
mov    %rax,0x2e8(%rsp)
mov    0x1b0(%rsp),%rax
mov    %rax,0x2e0(%rsp)
mov    0x1a8(%rsp),%rax
mov    %rax,0x2d8(%rsp)
mov    0x1a0(%rsp),%rax
mov    %rax,0x2d0(%rsp)
mov    0x198(%rsp),%rax
mov    %rax,0x2c8(%rsp)
mov    0x190(%rsp),%rax
mov    %rax,0x2c0(%rsp)
mov    0x188(%rsp),%rax
mov    %rax,0x2b8(%rsp)
mov    0x180(%rsp),%rax
mov    %rax,0x2b0(%rsp)
mov    0x178(%rsp),%rax
mov    %rax,0x2a8(%rsp)
mov    0x170(%rsp),%rax
mov    %rax,0x2a0(%rsp)
mov    0x168(%rsp),%rax
mov    %rax,0x298(%rsp)
mov    0x160(%rsp),%rax
mov    %rax,0x290(%rsp)
mov    0x158(%rsp),%rax
mov    %rax,0x288(%rsp)
mov    0x150(%rsp),%rax
mov    %rax,0x280(%rsp)
mov    0x148(%rsp),%rax
mov    %rax,0x278(%rsp)
mov    0x140(%rsp),%rax
mov    %rax,0x270(%rsp)
mov    0x138(%rsp),%rax
mov    %rax,0x268(%rsp)
mov    0x130(%rsp),%rax
mov    %rax,0x260(%rsp)
mov    0x128(%rsp),%rax
mov    %rax,0x258(%rsp)
mov    0x120(%rsp),%rax
mov    %rax,0x250(%rsp)
mov    0x118(%rsp),%rax
mov    %rax,0x248(%rsp)
mov    0x110(%rsp),%rax
mov    %rax,0x240(%rsp)
mov    0x108(%rsp),%rax
mov    %rax,0x238(%rsp)
mov    0x100(%rsp),%rax
mov    %rax,0x230(%rsp)
mov    0xf8(%rsp),%rax
mov    %rax,0x228(%rsp)
mov    0xf0(%rsp),%rax
mov    %rax,0x220(%rsp)
mov    0xe8(%rsp),%rax
mov    %rax,0x218(%rsp)
mov    0xe0(%rsp),%rax
mov    %rax,0x210(%rsp)
jmp    1ba9 <kernel_CPU_06_mod_3DRhoCte+0xaa9>
mov    -0x64(%rsp),%ecx
add    $0x1,%ecx
mov    0x438(%rsp),%rax
add    %rax,0x210(%rsp)
add    %rax,0x218(%rsp)
add    %rax,0x220(%rsp)
add    %rax,0x228(%rsp)
add    %rax,0x230(%rsp)
add    %rax,0x238(%rsp)
add    %rax,0x240(%rsp)
add    %rax,0x248(%rsp)
add    %rax,0x250(%rsp)
add    %rax,0x258(%rsp)
add    %rax,0x260(%rsp)
add    %rax,0x268(%rsp)
add    %rax,0x270(%rsp)
add    %rax,0x278(%rsp)
add    %rax,0x280(%rsp)
add    %rax,0x288(%rsp)
add    %rax,0x290(%rsp)
add    %rax,0x298(%rsp)
add    %rax,0x2a0(%rsp)
add    %rax,0x2a8(%rsp)
add    %rax,0x2b0(%rsp)
add    %rax,0x2b8(%rsp)
add    %rax,0x2c0(%rsp)
add    %rax,0x2c8(%rsp)
add    %rax,0x2d0(%rsp)
add    %rax,0x2d8(%rsp)
add    %rax,0x2e0(%rsp)
add    %rax,0x2e8(%rsp)
add    %rax,0x2f0(%rsp)
add    %rax,0x2f8(%rsp)
add    %rax,0x300(%rsp)
add    %rax,0x308(%rsp)
add    %rax,0x310(%rsp)
add    %rax,0x318(%rsp)
add    %rax,0x320(%rsp)
add    %rax,0x328(%rsp)
add    %rax,0x330(%rsp)
cmp    -0x78(%rsp),%ecx
mov    0x208(%rsp),%rsi
je     1690 <kernel_CPU_06_mod_3DRhoCte+0x590>
mov    %ecx,-0x64(%rsp)
cmp    -0x68(%rsp),%esi
jge    1a60 <kernel_CPU_06_mod_3DRhoCte+0x960>
mov    0x330(%rsp),%rax
mov    %rax,0x428(%rsp)
mov    0x328(%rsp),%rax
mov    %rax,0x420(%rsp)
mov    0x320(%rsp),%rax
mov    %rax,0x418(%rsp)
mov    0x318(%rsp),%rax
mov    %rax,0x410(%rsp)
mov    0x310(%rsp),%rax
mov    %rax,0x408(%rsp)
mov    0x308(%rsp),%rax
mov    %rax,0x400(%rsp)
mov    0x300(%rsp),%rax
mov    %rax,0x3f8(%rsp)
mov    0x2f8(%rsp),%rax
mov    %rax,0x3f0(%rsp)
mov    0x2f0(%rsp),%rax
mov    %rax,0x3e8(%rsp)
mov    0x2e8(%rsp),%rax
mov    %rax,0x3e0(%rsp)
mov    0x2e0(%rsp),%rax
mov    %rax,0x3d8(%rsp)
mov    0x2d8(%rsp),%rax
mov    %rax,0x3d0(%rsp)
mov    0x2d0(%rsp),%rax
mov    %rax,0x3c8(%rsp)
mov    0x2c8(%rsp),%rax
mov    %rax,0x3c0(%rsp)
mov    0x2c0(%rsp),%rax
mov    %rax,0x3b8(%rsp)
mov    0x2b8(%rsp),%rax
mov    %rax,0x3b0(%rsp)
mov    0x2b0(%rsp),%rax
mov    %rax,0x3a8(%rsp)
mov    0x2a8(%rsp),%rax
mov    %rax,0x3a0(%rsp)
mov    0x2a0(%rsp),%rax
mov    %rax,0x398(%rsp)
mov    0x298(%rsp),%rax
mov    %rax,0x390(%rsp)
mov    0x290(%rsp),%rax
mov    %rax,0x388(%rsp)
mov    0x288(%rsp),%rax
mov    %rax,0x380(%rsp)
mov    0x280(%rsp),%rax
mov    %rax,0x378(%rsp)
mov    0x278(%rsp),%rax
mov    %rax,0x370(%rsp)
mov    0x270(%rsp),%rax
mov    %rax,0x368(%rsp)
mov    0x268(%rsp),%rax
mov    %rax,0x360(%rsp)
mov    0x260(%rsp),%rax
mov    %rax,0x358(%rsp)
mov    0x258(%rsp),%rax
mov    %rax,0x350(%rsp)
mov    0x250(%rsp),%rax
mov    %rax,0x348(%rsp)
mov    0x248(%rsp),%rax
mov    %rax,0x340(%rsp)
mov    0x240(%rsp),%rcx
mov    0x238(%rsp),%rax
mov    %rax,0x338(%rsp)
mov    0x230(%rsp),%rax
mov    0x228(%rsp),%r9
mov    0x220(%rsp),%r12
mov    0x218(%rsp),%r14
mov    0x210(%rsp),%rsi
mov    0x208(%rsp),%rbp
jmp    1f0b <kernel_CPU_06_mod_3DRhoCte+0xe0b>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    -0x58(%rsp),%ebp
add    $0x1,%ebp
add    %r13,%rsi
add    %r13,%r14
add    %r13,%r12
add    %r13,%r9
add    %r13,%rax
add    %r13,0x338(%rsp)
add    %r13,%rcx
add    %r13,0x340(%rsp)
add    %r13,0x348(%rsp)
add    %r13,0x350(%rsp)
add    %r13,0x358(%rsp)
add    %r13,0x360(%rsp)
add    %r13,0x368(%rsp)
add    %r13,0x370(%rsp)
add    %r13,0x378(%rsp)
add    %r13,0x380(%rsp)
add    %r13,0x388(%rsp)
add    %r13,0x390(%rsp)
add    %r13,0x398(%rsp)
add    %r13,0x3a0(%rsp)
add    %r13,0x3a8(%rsp)
add    %r13,0x3b0(%rsp)
add    %r13,0x3b8(%rsp)
add    %r13,0x3c0(%rsp)
add    %r13,0x3c8(%rsp)
add    %r13,0x3d0(%rsp)
add    %r13,0x3d8(%rsp)
add    %r13,0x3e0(%rsp)
add    %r13,0x3e8(%rsp)
add    %r13,0x3f0(%rsp)
add    %r13,0x3f8(%rsp)
add    %r13,0x400(%rsp)
add    %r13,0x408(%rsp)
add    %r13,0x410(%rsp)
add    %r13,0x418(%rsp)
add    %r13,0x420(%rsp)
add    %r13,0x428(%rsp)
cmp    -0x60(%rsp),%ebp
je     1a60 <kernel_CPU_06_mod_3DRhoCte+0x960>
mov    %ebp,-0x58(%rsp)
cmp    %ebx,-0x5c(%rsp)
jle    1df0 <kernel_CPU_06_mod_3DRhoCte+0xcf0>
xor    %r10d,%r10d
jmp    1f35 <kernel_CPU_06_mod_3DRhoCte+0xe35>
xchg   %ax,%ax
lea    (%rbx,%r10,1),%rbp
add    $0x1,%rbp
add    $0x1,%r10
cmp    %rdx,%rbp
jge    1df0 <kernel_CPU_06_mod_3DRhoCte+0xcf0>
lea    (%rcx,%r10,1),%ebp
movslq %ebp,%r11
mov    0x448(%rsp),%rbp
movss  0x0(%rbp,%r11,4),%xmm7
ucomiss %xmm0,%xmm7
jbe    1f20 <kernel_CPU_06_mod_3DRhoCte+0xe20>
movss  (%rdi,%r11,4),%xmm15
movaps %xmm15,%xmm3
addss  %xmm15,%xmm3
subss  (%r8,%r11,4),%xmm3
movaps %xmm7,%xmm5
mulss  -0x54(%rsp),%xmm5
mulss  %xmm7,%xmm5
mov    0x490(%rsp),%r15
movss  0x18(%r15),%xmm9
mov    0x338(%rsp),%rbp
add    %r10d,%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm2
mov    0x340(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm2
movss  0x14(%r15),%xmm10
lea    (%rax,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm4
mov    0x348(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm4
mulss  %xmm10,%xmm4
mulss  %xmm9,%xmm2
addss  %xmm4,%xmm2
movss  0x10(%r15),%xmm11
lea    (%r9,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm4
mov    0x350(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm4
mulss  %xmm11,%xmm4
addss  %xmm2,%xmm4
movss  0xc(%r15),%xmm12
lea    (%r12,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm2
mov    0x358(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm2
mulss  %xmm12,%xmm2
addss  %xmm4,%xmm2
movss  0x4(%r15),%xmm13
movss  0x8(%r15),%xmm14
lea    (%r14,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm4
mov    0x360(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm4
mulss  %xmm14,%xmm4
addss  %xmm2,%xmm4
lea    (%rsi,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm6
mov    0x368(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm6
mulss  %xmm13,%xmm6
addss  %xmm4,%xmm6
mulss  (%r15),%xmm15
addss  %xmm15,%xmm6
mulss  %xmm5,%xmm6
addss  %xmm3,%xmm6
movaps %xmm7,%xmm5
mulss  -0x50(%rsp),%xmm5
mulss  %xmm7,%xmm5
mov    0x370(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm2
mov    0x378(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm2
mov    0x380(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm3
mov    0x388(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm3
mulss  %xmm10,%xmm3
mulss  %xmm9,%xmm2
mov    0x390(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm4
mov    0x398(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm4
addss  %xmm3,%xmm2
mulss  %xmm11,%xmm4
addss  %xmm2,%xmm4
mov    0x3a0(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm3
mov    0x3a8(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm3
mulss  %xmm12,%xmm3
addss  %xmm4,%xmm3
mov    0x3b0(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm2
mov    0x3b8(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm2
mulss  %xmm14,%xmm2
addss  %xmm3,%xmm2
mov    0x3c0(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm3
mov    0x3c8(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm3
mulss  %xmm13,%xmm3
mov    0x3d0(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm4
mov    0x3d8(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm4
addss  %xmm2,%xmm3
mov    0x3e0(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm8
mov    0x3e8(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm8
addss  %xmm15,%xmm3
mov    0x3f0(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm2
mov    0x3f8(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm2
mulss  %xmm5,%xmm3
mov    0x400(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm5
mov    0x408(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm5
mov    0x410(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm1
mov    0x418(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm1
mov    0x420(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
movss  (%rdi,%rbp,4),%xmm0
mov    0x428(%rsp),%rbp
lea    0x0(%rbp,%r10,1),%ebp
movslq %ebp,%rbp
addss  (%rdi,%rbp,4),%xmm0
addss  %xmm6,%xmm3
movaps %xmm7,%xmm6
mulss  -0x4c(%rsp),%xmm6
mulss  %xmm7,%xmm6
mulss  %xmm10,%xmm8
mulss  %xmm9,%xmm4
addss  %xmm8,%xmm4
mulss  %xmm11,%xmm2
addss  %xmm4,%xmm2
mulss  %xmm12,%xmm5
addss  %xmm2,%xmm5
mulss  %xmm14,%xmm1
addss  %xmm5,%xmm1
mulss  %xmm13,%xmm0
addss  %xmm1,%xmm0
addss  %xmm15,%xmm0
mulss  %xmm6,%xmm0
addss  %xmm3,%xmm0
movss  %xmm0,(%r8,%r11,4)
xorps  %xmm0,%xmm0
jmp    1f20 <kernel_CPU_06_mod_3DRhoCte+0xe20>
add    $0x450,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @kernel_CPU_06_mod_3DRhoCte(float* %0, float* %1, float* %2, i32 %3, i32 %4, i32 %5, i32 %6, float %7, float %8, float %9, float* %10) {
%12 = alloca float*
%13 = alloca float*
%14 = alloca float*
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca float
%20 = alloca float
%21 = alloca float
%22 = alloca float*
%23 = alloca i32
%24 = alloca i32
%25 = alloca i32
%26 = alloca i32
%27 = alloca i32
%28 = alloca i32
%29 = alloca i32
%30 = alloca i32
%31 = alloca i32
%32 = alloca i32
%33 = alloca i32
%34 = alloca i32
%35 = alloca i32
store float* %0, float** %12
store float* %1, float** %13
store float* %2, float** %14
store i32 %3, i32* %15
store i32 %4, i32* %16
store i32 %5, i32* %17
store i32 %6, i32* %18
store float %7, float* %19
store float %8, float* %20
store float %9, float* %21
store float* %10, float** %22
%36 = load i32, i32* %15
%37 = load i32, i32* %16
%38 = mul nsw i32 %36, %37
store i32 %38, i32* %27
store i32 0, i32* %29
br label %39
39: ; preds = %568, %11
%40 = load i32, i32* %29
%41 = load i32, i32* %18
%42 = load i32, i32* %17
%43 = sub nsw i32 %41, %42
%44 = icmp slt i32 %40, %43
br i1 %44, label %45, label %571
45: ; preds = %39
store i32 0, i32* %23
br label %46
46: ; preds = %564, %45
%47 = load i32, i32* %23
%48 = load i32, i32* %15
%49 = icmp slt i32 %47, %48
br i1 %49, label %50, label %567
50: ; preds = %46
store i32 0, i32* %24
br label %51
51: ; preds = %560, %50
%52 = load i32, i32* %24
%53 = load i32, i32* %16
%54 = icmp slt i32 %52, %53
br i1 %54, label %55, label %563
55: ; preds = %51
%56 = load i32, i32* %29
store i32 %56, i32* %26
br label %57
57: ; preds = %556, %55
%58 = load i32, i32* %26
%59 = load i32, i32* %18
%60 = load i32, i32* %17
%61 = sub nsw i32 %59, %60
store i32 %61, i32* %30
%62 = load i32, i32* %29
%63 = add nsw i32 %62, 2
store i32 %63, i32* %31
%64 = icmp eq i32* %30, %31
%65 = zext i1 %64 to i32
%66 = load i32, i32* %30
%67 = load i32, i32* %31
%68 = icmp slt i32 %66, %67
br i1 %68, label %69, label %71
69: ; preds = %57
%70 = load i32, i32* %30
br label %73
71: ; preds = %57
%72 = load i32, i32* %31
br label %73
73: ; preds = %71, %69
%74 = phi i32 [ %70, %69 ], [ %72, %71 ]
store i32 %74, i32* %32
%75 = load i32, i32* %32
%76 = icmp slt i32 %58, %75
br i1 %76, label %77, label %559
77: ; preds = %73
%78 = load i32, i32* %23
store i32 %78, i32* %25
br label %79
79: ; preds = %552, %77
%80 = load i32, i32* %25
%81 = load i32, i32* %15
store i32 %81, i32* %33
%82 = load i32, i32* %23
%83 = add nsw i32 %82, 2
store i32 %83, i32* %34
%84 = icmp eq i32* %33, %34
%85 = zext i1 %84 to i32
%86 = load i32, i32* %33
%87 = load i32, i32* %34
%88 = icmp slt i32 %86, %87
br i1 %88, label %89, label %91
89: ; preds = %79
%90 = load i32, i32* %33
br label %93
91: ; preds = %79
%92 = load i32, i32* %34
br label %93
93: ; preds = %91, %89
%94 = phi i32 [ %90, %89 ], [ %92, %91 ]
store i32 %94, i32* %35
%95 = load i32, i32* %35
%96 = icmp slt i32 %80, %95
br i1 %96, label %97, label %555
97: ; preds = %93
%98 = load i32, i32* %24
%99 = load i32, i32* %15
%100 = mul nsw i32 %98, %99
%101 = load i32, i32* %25
%102 = add nsw i32 %100, %101
%103 = load i32, i32* %17
%104 = load i32, i32* %26
%105 = add nsw i32 %103, %104
%106 = load i32, i32* %27
%107 = mul nsw i32 %105, %106
%108 = add nsw i32 %102, %107
store i32 %108, i32* %28
%109 = load float*, float** %14
%110 = load i32, i32* %28
%111 = sext i32 %110 to i64
%112 = getelementptr inbounds float, float* %109, i64 %111
%113 = load float, float* %112
%114 = fcmp ogt float %113, 0.000000e+00
br i1 %114, label %115, label %551
115: ; preds = %97
%116 = load float*, float** %12
%117 = load i32, i32* %28
%118 = sext i32 %117 to i64
%119 = getelementptr inbounds float, float* %116, i64 %118
%120 = load float, float* %119
%121 = load float*, float** %13
%122 = load i32, i32* %28
%123 = sext i32 %122 to i64
%124 = getelementptr inbounds float, float* %121, i64 %123
%125 = load float, float* %124
%126 = fneg float %125
%127 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %120, float %126)
%128 = load float, float* %19
%129 = load float*, float** %14
%130 = load i32, i32* %28
%131 = sext i32 %130 to i64
%132 = getelementptr inbounds float, float* %129, i64 %131
%133 = load float, float* %132
%134 = fmul float %128, %133
%135 = load float*, float** %14
%136 = load i32, i32* %28
%137 = sext i32 %136 to i64
%138 = getelementptr inbounds float, float* %135, i64 %137
%139 = load float, float* %138
%140 = fmul float %134, %139
%141 = load float*, float** %22
%142 = getelementptr inbounds float, float* %141, i64 6
%143 = load float, float* %142
%144 = load float*, float** %12
%145 = load i32, i32* %28
%146 = sub nsw i32 %145, 6
%147 = sext i32 %146 to i64
%148 = getelementptr inbounds float, float* %144, i64 %147
%149 = load float, float* %148
%150 = load float*, float** %12
%151 = load i32, i32* %28
%152 = add nsw i32 %151, 6
%153 = sext i32 %152 to i64
%154 = getelementptr inbounds float, float* %150, i64 %153
%155 = load float, float* %154
%156 = fadd float %149, %155
%157 = load float*, float** %22
%158 = getelementptr inbounds float, float* %157, i64 5
%159 = load float, float* %158
%160 = load float*, float** %12
%161 = load i32, i32* %28
%162 = sub nsw i32 %161, 5
%163 = sext i32 %162 to i64
%164 = getelementptr inbounds float, float* %160, i64 %163
%165 = load float, float* %164
%166 = load float*, float** %12
%167 = load i32, i32* %28
%168 = add nsw i32 %167, 5
%169 = sext i32 %168 to i64
%170 = getelementptr inbounds float, float* %166, i64 %169
%171 = load float, float* %170
%172 = fadd float %165, %171
%173 = fmul float %159, %172
%174 = call float @llvm.fmuladd.f32(float %143, float %156, float %173)
%175 = load float*, float** %22
%176 = getelementptr inbounds float, float* %175, i64 4
%177 = load float, float* %176
%178 = load float*, float** %12
%179 = load i32, i32* %28
%180 = sub nsw i32 %179, 4
%181 = sext i32 %180 to i64
%182 = getelementptr inbounds float, float* %178, i64 %181
%183 = load float, float* %182
%184 = load float*, float** %12
%185 = load i32, i32* %28
%186 = add nsw i32 %185, 4
%187 = sext i32 %186 to i64
%188 = getelementptr inbounds float, float* %184, i64 %187
%189 = load float, float* %188
%190 = fadd float %183, %189
%191 = call float @llvm.fmuladd.f32(float %177, float %190, float %174)
%192 = load float*, float** %22
%193 = getelementptr inbounds float, float* %192, i64 3
%194 = load float, float* %193
%195 = load float*, float** %12
%196 = load i32, i32* %28
%197 = sub nsw i32 %196, 3
%198 = sext i32 %197 to i64
%199 = getelementptr inbounds float, float* %195, i64 %198
%200 = load float, float* %199
%201 = load float*, float** %12
%202 = load i32, i32* %28
%203 = add nsw i32 %202, 3
%204 = sext i32 %203 to i64
%205 = getelementptr inbounds float, float* %201, i64 %204
%206 = load float, float* %205
%207 = fadd float %200, %206
%208 = call float @llvm.fmuladd.f32(float %194, float %207, float %191)
%209 = load float*, float** %22
%210 = getelementptr inbounds float, float* %209, i64 2
%211 = load float, float* %210
%212 = load float*, float** %12
%213 = load i32, i32* %28
%214 = sub nsw i32 %213, 2
%215 = sext i32 %214 to i64
%216 = getelementptr inbounds float, float* %212, i64 %215
%217 = load float, float* %216
%218 = load float*, float** %12
%219 = load i32, i32* %28
%220 = add nsw i32 %219, 2
%221 = sext i32 %220 to i64
%222 = getelementptr inbounds float, float* %218, i64 %221
%223 = load float, float* %222
%224 = fadd float %217, %223
%225 = call float @llvm.fmuladd.f32(float %211, float %224, float %208)
%226 = load float*, float** %22
%227 = getelementptr inbounds float, float* %226, i64 1
%228 = load float, float* %227
%229 = load float*, float** %12
%230 = load i32, i32* %28
%231 = sub nsw i32 %230, 1
%232 = sext i32 %231 to i64
%233 = getelementptr inbounds float, float* %229, i64 %232
%234 = load float, float* %233
%235 = load float*, float** %12
%236 = load i32, i32* %28
%237 = add nsw i32 %236, 1
%238 = sext i32 %237 to i64
%239 = getelementptr inbounds float, float* %235, i64 %238
%240 = load float, float* %239
%241 = fadd float %234, %240
%242 = call float @llvm.fmuladd.f32(float %228, float %241, float %225)
%243 = load float*, float** %22
%244 = getelementptr inbounds float, float* %243, i64 0
%245 = load float, float* %244
%246 = load float*, float** %12
%247 = load i32, i32* %28
%248 = sext i32 %247 to i64
%249 = getelementptr inbounds float, float* %246, i64 %248
%250 = load float, float* %249
%251 = call float @llvm.fmuladd.f32(float %245, float %250, float %242)
%252 = call float @llvm.fmuladd.f32(float %140, float %251, float %127)
%253 = load float, float* %20
%254 = load float*, float** %14
%255 = load i32, i32* %28
%256 = sext i32 %255 to i64
%257 = getelementptr inbounds float, float* %254, i64 %256
%258 = load float, float* %257
%259 = fmul float %253, %258
%260 = load float*, float** %14
%261 = load i32, i32* %28
%262 = sext i32 %261 to i64
%263 = getelementptr inbounds float, float* %260, i64 %262
%264 = load float, float* %263
%265 = fmul float %259, %264
%266 = load float*, float** %22
%267 = getelementptr inbounds float, float* %266, i64 6
%268 = load float, float* %267
%269 = load float*, float** %12
%270 = load i32, i32* %28
%271 = load i32, i32* %15
%272 = mul nsw i32 6, %271
%273 = sub nsw i32 %270, %272
%274 = sext i32 %273 to i64
%275 = getelementptr inbounds float, float* %269, i64 %274
%276 = load float, float* %275
%277 = load float*, float** %12
%278 = load i32, i32* %28
%279 = load i32, i32* %15
%280 = mul nsw i32 6, %279
%281 = add nsw i32 %278, %280
%282 = sext i32 %281 to i64
%283 = getelementptr inbounds float, float* %277, i64 %282
%284 = load float, float* %283
%285 = fadd float %276, %284
%286 = load float*, float** %22
%287 = getelementptr inbounds float, float* %286, i64 5
%288 = load float, float* %287
%289 = load float*, float** %12
%290 = load i32, i32* %28
%291 = load i32, i32* %15
%292 = mul nsw i32 5, %291
%293 = sub nsw i32 %290, %292
%294 = sext i32 %293 to i64
%295 = getelementptr inbounds float, float* %289, i64 %294
%296 = load float, float* %295
%297 = load float*, float** %12
%298 = load i32, i32* %28
%299 = load i32, i32* %15
%300 = mul nsw i32 5, %299
%301 = add nsw i32 %298, %300
%302 = sext i32 %301 to i64
%303 = getelementptr inbounds float, float* %297, i64 %302
%304 = load float, float* %303
%305 = fadd float %296, %304
%306 = fmul float %288, %305
%307 = call float @llvm.fmuladd.f32(float %268, float %285, float %306)
%308 = load float*, float** %22
%309 = getelementptr inbounds float, float* %308, i64 4
%310 = load float, float* %309
%311 = load float*, float** %12
%312 = load i32, i32* %28
%313 = load i32, i32* %15
%314 = mul nsw i32 4, %313
%315 = sub nsw i32 %312, %314
%316 = sext i32 %315 to i64
%317 = getelementptr inbounds float, float* %311, i64 %316
%318 = load float, float* %317
%319 = load float*, float** %12
%320 = load i32, i32* %28
%321 = load i32, i32* %15
%322 = mul nsw i32 4, %321
%323 = add nsw i32 %320, %322
%324 = sext i32 %323 to i64
%325 = getelementptr inbounds float, float* %319, i64 %324
%326 = load float, float* %325
%327 = fadd float %318, %326
%328 = call float @llvm.fmuladd.f32(float %310, float %327, float %307)
%329 = load float*, float** %22
%330 = getelementptr inbounds float, float* %329, i64 3
%331 = load float, float* %330
%332 = load float*, float** %12
%333 = load i32, i32* %28
%334 = load i32, i32* %15
%335 = mul nsw i32 3, %334
%336 = sub nsw i32 %333, %335
%337 = sext i32 %336 to i64
%338 = getelementptr inbounds float, float* %332, i64 %337
%339 = load float, float* %338
%340 = load float*, float** %12
%341 = load i32, i32* %28
%342 = load i32, i32* %15
%343 = mul nsw i32 3, %342
%344 = add nsw i32 %341, %343
%345 = sext i32 %344 to i64
%346 = getelementptr inbounds float, float* %340, i64 %345
%347 = load float, float* %346
%348 = fadd float %339, %347
%349 = call float @llvm.fmuladd.f32(float %331, float %348, float %328)
%350 = load float*, float** %22
%351 = getelementptr inbounds float, float* %350, i64 2
%352 = load float, float* %351
%353 = load float*, float** %12
%354 = load i32, i32* %28
%355 = load i32, i32* %15
%356 = mul nsw i32 2, %355
%357 = sub nsw i32 %354, %356
%358 = sext i32 %357 to i64
%359 = getelementptr inbounds float, float* %353, i64 %358
%360 = load float, float* %359
%361 = load float*, float** %12
%362 = load i32, i32* %28
%363 = load i32, i32* %15
%364 = mul nsw i32 2, %363
%365 = add nsw i32 %362, %364
%366 = sext i32 %365 to i64
%367 = getelementptr inbounds float, float* %361, i64 %366
%368 = load float, float* %367
%369 = fadd float %360, %368
%370 = call float @llvm.fmuladd.f32(float %352, float %369, float %349)
%371 = load float*, float** %22
%372 = getelementptr inbounds float, float* %371, i64 1
%373 = load float, float* %372
%374 = load float*, float** %12
%375 = load i32, i32* %28
%376 = load i32, i32* %15
%377 = sub nsw i32 %375, %376
%378 = sext i32 %377 to i64
%379 = getelementptr inbounds float, float* %374, i64 %378
%380 = load float, float* %379
%381 = load float*, float** %12
%382 = load i32, i32* %28
%383 = load i32, i32* %15
%384 = add nsw i32 %382, %383
%385 = sext i32 %384 to i64
%386 = getelementptr inbounds float, float* %381, i64 %385
%387 = load float, float* %386
%388 = fadd float %380, %387
%389 = call float @llvm.fmuladd.f32(float %373, float %388, float %370)
%390 = load float*, float** %22
%391 = getelementptr inbounds float, float* %390, i64 0
%392 = load float, float* %391
%393 = load float*, float** %12
%394 = load i32, i32* %28
%395 = sext i32 %394 to i64
%396 = getelementptr inbounds float, float* %393, i64 %395
%397 = load float, float* %396
%398 = call float @llvm.fmuladd.f32(float %392, float %397, float %389)
%399 = call float @llvm.fmuladd.f32(float %265, float %398, float %252)
%400 = load float, float* %21
%401 = load float*, float** %14
%402 = load i32, i32* %28
%403 = sext i32 %402 to i64
%404 = getelementptr inbounds float, float* %401, i64 %403
%405 = load float, float* %404
%406 = fmul float %400, %405
%407 = load float*, float** %14
%408 = load i32, i32* %28
%409 = sext i32 %408 to i64
%410 = getelementptr inbounds float, float* %407, i64 %409
%411 = load float, float* %410
%412 = fmul float %406, %411
%413 = load float*, float** %22
%414 = getelementptr inbounds float, float* %413, i64 6
%415 = load float, float* %414
%416 = load float*, float** %12
%417 = load i32, i32* %28
%418 = load i32, i32* %27
%419 = mul nsw i32 6, %418
%420 = add nsw i32 %417, %419
%421 = sext i32 %420 to i64
%422 = getelementptr inbounds float, float* %416, i64 %421
%423 = load float, float* %422
%424 = load float*, float** %12
%425 = load i32, i32* %28
%426 = load i32, i32* %27
%427 = mul nsw i32 6, %426
%428 = sub nsw i32 %425, %427
%429 = sext i32 %428 to i64
%430 = getelementptr inbounds float, float* %424, i64 %429
%431 = load float, float* %430
%432 = fadd float %423, %431
%433 = load float*, float** %22
%434 = getelementptr inbounds float, float* %433, i64 5
%435 = load float, float* %434
%436 = load float*, float** %12
%437 = load i32, i32* %28
%438 = load i32, i32* %27
%439 = mul nsw i32 5, %438
%440 = add nsw i32 %437, %439
%441 = sext i32 %440 to i64
%442 = getelementptr inbounds float, float* %436, i64 %441
%443 = load float, float* %442
%444 = load float*, float** %12
%445 = load i32, i32* %28
%446 = load i32, i32* %27
%447 = mul nsw i32 5, %446
%448 = sub nsw i32 %445, %447
%449 = sext i32 %448 to i64
%450 = getelementptr inbounds float, float* %444, i64 %449
%451 = load float, float* %450
%452 = fadd float %443, %451
%453 = fmul float %435, %452
%454 = call float @llvm.fmuladd.f32(float %415, float %432, float %453)
%455 = load float*, float** %22
%456 = getelementptr inbounds float, float* %455, i64 4
%457 = load float, float* %456
%458 = load float*, float** %12
%459 = load i32, i32* %28
%460 = load i32, i32* %27
%461 = mul nsw i32 4, %460
%462 = add nsw i32 %459, %461
%463 = sext i32 %462 to i64
%464 = getelementptr inbounds float, float* %458, i64 %463
%465 = load float, float* %464
%466 = load float*, float** %12
%467 = load i32, i32* %28
%468 = load i32, i32* %27
%469 = mul nsw i32 4, %468
%470 = sub nsw i32 %467, %469
%471 = sext i32 %470 to i64
%472 = getelementptr inbounds float, float* %466, i64 %471
%473 = load float, float* %472
%474 = fadd float %465, %473
%475 = call float @llvm.fmuladd.f32(float %457, float %474, float %454)
%476 = load float*, float** %22
%477 = getelementptr inbounds float, float* %476, i64 3
%478 = load float, float* %477
%479 = load float*, float** %12
%480 = load i32, i32* %28
%481 = load i32, i32* %27
%482 = mul nsw i32 3, %481
%483 = add nsw i32 %480, %482
%484 = sext i32 %483 to i64
%485 = getelementptr inbounds float, float* %479, i64 %484
%486 = load float, float* %485
%487 = load float*, float** %12
%488 = load i32, i32* %28
%489 = load i32, i32* %27
%490 = mul nsw i32 3, %489
%491 = sub nsw i32 %488, %490
%492 = sext i32 %491 to i64
%493 = getelementptr inbounds float, float* %487, i64 %492
%494 = load float, float* %493
%495 = fadd float %486, %494
%496 = call float @llvm.fmuladd.f32(float %478, float %495, float %475)
%497 = load float*, float** %22
%498 = getelementptr inbounds float, float* %497, i64 2
%499 = load float, float* %498
%500 = load float*, float** %12
%501 = load i32, i32* %28
%502 = load i32, i32* %27
%503 = mul nsw i32 2, %502
%504 = add nsw i32 %501, %503
%505 = sext i32 %504 to i64
%506 = getelementptr inbounds float, float* %500, i64 %505
%507 = load float, float* %506
%508 = load float*, float** %12
%509 = load i32, i32* %28
%510 = load i32, i32* %27
%511 = mul nsw i32 2, %510
%512 = sub nsw i32 %509, %511
%513 = sext i32 %512 to i64
%514 = getelementptr inbounds float, float* %508, i64 %513
%515 = load float, float* %514
%516 = fadd float %507, %515
%517 = call float @llvm.fmuladd.f32(float %499, float %516, float %496)
%518 = load float*, float** %22
%519 = getelementptr inbounds float, float* %518, i64 1
%520 = load float, float* %519
%521 = load float*, float** %12
%522 = load i32, i32* %28
%523 = load i32, i32* %27
%524 = add nsw i32 %522, %523
%525 = sext i32 %524 to i64
%526 = getelementptr inbounds float, float* %521, i64 %525
%527 = load float, float* %526
%528 = load float*, float** %12
%529 = load i32, i32* %28
%530 = load i32, i32* %27
%531 = sub nsw i32 %529, %530
%532 = sext i32 %531 to i64
%533 = getelementptr inbounds float, float* %528, i64 %532
%534 = load float, float* %533
%535 = fadd float %527, %534
%536 = call float @llvm.fmuladd.f32(float %520, float %535, float %517)
%537 = load float*, float** %22
%538 = getelementptr inbounds float, float* %537, i64 0
%539 = load float, float* %538
%540 = load float*, float** %12
%541 = load i32, i32* %28
%542 = sext i32 %541 to i64
%543 = getelementptr inbounds float, float* %540, i64 %542
%544 = load float, float* %543
%545 = call float @llvm.fmuladd.f32(float %539, float %544, float %536)
%546 = call float @llvm.fmuladd.f32(float %412, float %545, float %399)
%547 = load float*, float** %13
%548 = load i32, i32* %28
%549 = sext i32 %548 to i64
%550 = getelementptr inbounds float, float* %547, i64 %549
store float %546, float* %550
br label %551
551: ; preds = %115, %97
br label %552
552: ; preds = %551
%553 = load i32, i32* %25
%554 = add nsw i32 %553, 1
store i32 %554, i32* %25
br label %79
555: ; preds = %93
br label %556
556: ; preds = %555
%557 = load i32, i32* %26
%558 = add nsw i32 %557, 1
store i32 %558, i32* %26
br label %57
559: ; preds = %73
br label %560
560: ; preds = %559
%561 = load i32, i32* %24
%562 = add nsw i32 %561, 1
store i32 %562, i32* %24
br label %51
563: ; preds = %51
br label %564
564: ; preds = %563
%565 = load i32, i32* %23
%566 = add nsw i32 %565, 2
store i32 %566, i32* %23
br label %46
567: ; preds = %46
br label %568
568: ; preds = %567
%569 = load i32, i32* %29
%570 = add nsw i32 %569, 2
store i32 %570, i32* %29
br label %39
571: ; preds = %39
ret void
}

LLVM IR (-O2):
define void @kernel_CPU_06_mod_3DRhoCte(float* %0, float* nocapture %1, float* nocapture %2, i32 %3, i32 %4, i32 %5, i32 %6, float %7, float %8, float %9, float* nocapture %10) {
%12 = mul nsw i32 %4, %3
%13 = sub i32 %6, %5
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %292
15: ; preds = %11
%16 = icmp sgt i32 %3, 0
%17 = icmp sgt i32 %4, 0
%18 = getelementptr inbounds float, float* %10, i64 6
%19 = getelementptr inbounds float, float* %10, i64 5
%20 = getelementptr inbounds float, float* %10, i64 4
%21 = getelementptr inbounds float, float* %10, i64 3
%22 = getelementptr inbounds float, float* %10, i64 2
%23 = getelementptr inbounds float, float* %10, i64 1
%24 = mul nsw i32 %3, 6
%25 = mul nsw i32 %3, 5
%26 = shl nsw i32 %3, 2
%27 = mul nsw i32 %3, 3
%28 = shl nsw i32 %3, 1
%29 = mul nsw i32 %12, 6
%30 = mul nsw i32 %12, 5
%31 = shl nsw i32 %12, 2
%32 = mul nsw i32 %12, 3
%33 = shl nsw i32 %12, 1
br label %34
34: ; preds = %15, %289
%35 = phi i32 [ 2, %15 ], [ %291, %289 ]
%36 = phi i32 [ 0, %15 ], [ %38, %289 ]
%37 = call i32 @llvm.smin.i32(i32 %35, i32 %13)
%38 = add nuw nsw i32 %36, 2
br i1 %16, label %39, label %289
39: ; preds = %34
%40 = icmp slt i32 %13, %38
%41 = select i1 %40, i32 %13, i32 %38
%42 = icmp slt i32 %36, %41
br label %43
43: ; preds = %39, %285
%44 = phi i64 [ 0, %39 ], [ %286, %285 ]
%45 = trunc i64 %44 to i32
br i1 %17, label %46, label %285
46: ; preds = %43
%47 = add nuw nsw i32 %45, 2
%48 = icmp sgt i32 %47, %3
%49 = select i1 %48, i32 %3, i32 %47
%50 = icmp sgt i32 %49, %45
%51 = sext i32 %49 to i64
br label %52
52: ; preds = %46, %282
%53 = phi i32 [ 0, %46 ], [ %283, %282 ]
br i1 %42, label %54, label %282
54: ; preds = %52
%55 = mul nsw i32 %53, %3
br label %56
56: ; preds = %54, %279
%57 = phi i32 [ %36, %54 ], [ %280, %279 ]
br i1 %50, label %58, label %279
58: ; preds = %56
%59 = add nsw i32 %57, %5
%60 = mul nsw i32 %59, %12
%61 = add i32 %60, %55
br label %62
62: ; preds = %58, %276
%63 = phi i64 [ %44, %58 ], [ %277, %276 ]
%64 = trunc i64 %63 to i32
%65 = add i32 %61, %64
%66 = sext i32 %65 to i64
%67 = getelementptr inbounds float, float* %2, i64 %66
%68 = load float, float* %67
%69 = fcmp ogt float %68, 0.000000e+00
br i1 %69, label %70, label %276
70: ; preds = %62
%71 = getelementptr inbounds float, float* %0, i64 %66
%72 = load float, float* %71
%73 = getelementptr inbounds float, float* %1, i64 %66
%74 = load float, float* %73
%75 = fneg float %74
%76 = tail call float @llvm.fmuladd.f32(float %72, float 2.000000e+00, float %75)
%77 = fmul float %68, %7
%78 = fmul float %68, %77
%79 = load float, float* %18
%80 = add nsw i32 %65, -6
%81 = sext i32 %80 to i64
%82 = getelementptr inbounds float, float* %0, i64 %81
%83 = load float, float* %82
%84 = add nsw i32 %65, 6
%85 = sext i32 %84 to i64
%86 = getelementptr inbounds float, float* %0, i64 %85
%87 = load float, float* %86
%88 = fadd float %83, %87
%89 = load float, float* %19
%90 = add nsw i32 %65, -5
%91 = sext i32 %90 to i64
%92 = getelementptr inbounds float, float* %0, i64 %91
%93 = load float, float* %92
%94 = add nsw i32 %65, 5
%95 = sext i32 %94 to i64
%96 = getelementptr inbounds float, float* %0, i64 %95
%97 = load float, float* %96
%98 = fadd float %93, %97
%99 = fmul float %89, %98
%100 = tail call float @llvm.fmuladd.f32(float %79, float %88, float %99)
%101 = load float, float* %20
%102 = add nsw i32 %65, -4
%103 = sext i32 %102 to i64
%104 = getelementptr inbounds float, float* %0, i64 %103
%105 = load float, float* %104
%106 = add nsw i32 %65, 4
%107 = sext i32 %106 to i64
%108 = getelementptr inbounds float, float* %0, i64 %107
%109 = load float, float* %108
%110 = fadd float %105, %109
%111 = tail call float @llvm.fmuladd.f32(float %101, float %110, float %100)
%112 = load float, float* %21
%113 = add nsw i32 %65, -3
%114 = sext i32 %113 to i64
%115 = getelementptr inbounds float, float* %0, i64 %114
%116 = load float, float* %115
%117 = add nsw i32 %65, 3
%118 = sext i32 %117 to i64
%119 = getelementptr inbounds float, float* %0, i64 %118
%120 = load float, float* %119
%121 = fadd float %116, %120
%122 = tail call float @llvm.fmuladd.f32(float %112, float %121, float %111)
%123 = load float, float* %22
%124 = add nsw i32 %65, -2
%125 = sext i32 %124 to i64
%126 = getelementptr inbounds float, float* %0, i64 %125
%127 = load float, float* %126
%128 = add nsw i32 %65, 2
%129 = sext i32 %128 to i64
%130 = getelementptr inbounds float, float* %0, i64 %129
%131 = load float, float* %130
%132 = fadd float %127, %131
%133 = tail call float @llvm.fmuladd.f32(float %123, float %132, float %122)
%134 = load float, float* %23
%135 = add nsw i32 %65, -1
%136 = sext i32 %135 to i64
%137 = getelementptr inbounds float, float* %0, i64 %136
%138 = load float, float* %137
%139 = add nsw i32 %65, 1
%140 = sext i32 %139 to i64
%141 = getelementptr inbounds float, float* %0, i64 %140
%142 = load float, float* %141
%143 = fadd float %138, %142
%144 = tail call float @llvm.fmuladd.f32(float %134, float %143, float %133)
%145 = load float, float* %10
%146 = tail call float @llvm.fmuladd.f32(float %145, float %72, float %144)
%147 = tail call float @llvm.fmuladd.f32(float %78, float %146, float %76)
%148 = fmul float %68, %8
%149 = fmul float %68, %148
%150 = sub nsw i32 %65, %24
%151 = sext i32 %150 to i64
%152 = getelementptr inbounds float, float* %0, i64 %151
%153 = load float, float* %152
%154 = add nsw i32 %65, %24
%155 = sext i32 %154 to i64
%156 = getelementptr inbounds float, float* %0, i64 %155
%157 = load float, float* %156
%158 = fadd float %153, %157
%159 = sub nsw i32 %65, %25
%160 = sext i32 %159 to i64
%161 = getelementptr inbounds float, float* %0, i64 %160
%162 = load float, float* %161
%163 = add nsw i32 %65, %25
%164 = sext i32 %163 to i64
%165 = getelementptr inbounds float, float* %0, i64 %164
%166 = load float, float* %165
%167 = fadd float %162, %166
%168 = fmul float %89, %167
%169 = tail call float @llvm.fmuladd.f32(float %79, float %158, float %168)
%170 = sub nsw i32 %65, %26
%171 = sext i32 %170 to i64
%172 = getelementptr inbounds float, float* %0, i64 %171
%173 = load float, float* %172
%174 = add nsw i32 %65, %26
%175 = sext i32 %174 to i64
%176 = getelementptr inbounds float, float* %0, i64 %175
%177 = load float, float* %176
%178 = fadd float %173, %177
%179 = tail call float @llvm.fmuladd.f32(float %101, float %178, float %169)
%180 = sub nsw i32 %65, %27
%181 = sext i32 %180 to i64
%182 = getelementptr inbounds float, float* %0, i64 %181
%183 = load float, float* %182
%184 = add nsw i32 %65, %27
%185 = sext i32 %184 to i64
%186 = getelementptr inbounds float, float* %0, i64 %185
%187 = load float, float* %186
%188 = fadd float %183, %187
%189 = tail call float @llvm.fmuladd.f32(float %112, float %188, float %179)
%190 = sub nsw i32 %65, %28
%191 = sext i32 %190 to i64
%192 = getelementptr inbounds float, float* %0, i64 %191
%193 = load float, float* %192
%194 = add nsw i32 %65, %28
%195 = sext i32 %194 to i64
%196 = getelementptr inbounds float, float* %0, i64 %195
%197 = load float, float* %196
%198 = fadd float %193, %197
%199 = tail call float @llvm.fmuladd.f32(float %123, float %198, float %189)
%200 = sub nsw i32 %65, %3
%201 = sext i32 %200 to i64
%202 = getelementptr inbounds float, float* %0, i64 %201
%203 = load float, float* %202
%204 = add nsw i32 %65, %3
%205 = sext i32 %204 to i64
%206 = getelementptr inbounds float, float* %0, i64 %205
%207 = load float, float* %206
%208 = fadd float %203, %207
%209 = tail call float @llvm.fmuladd.f32(float %134, float %208, float %199)
%210 = tail call float @llvm.fmuladd.f32(float %145, float %72, float %209)
%211 = tail call float @llvm.fmuladd.f32(float %149, float %210, float %147)
%212 = fmul float %68, %9
%213 = fmul float %68, %212
%214 = add nsw i32 %65, %29
%215 = sext i32 %214 to i64
%216 = getelementptr inbounds float, float* %0, i64 %215
%217 = load float, float* %216
%218 = sub nsw i32 %65, %29
%219 = sext i32 %218 to i64
%220 = getelementptr inbounds float, float* %0, i64 %219
%221 = load float, float* %220
%222 = fadd float %217, %221
%223 = add nsw i32 %65, %30
%224 = sext i32 %223 to i64
%225 = getelementptr inbounds float, float* %0, i64 %224
%226 = load float, float* %225
%227 = sub nsw i32 %65, %30
%228 = sext i32 %227 to i64
%229 = getelementptr inbounds float, float* %0, i64 %228
%230 = load float, float* %229
%231 = fadd float %226, %230
%232 = fmul float %89, %231
%233 = tail call float @llvm.fmuladd.f32(float %79, float %222, float %232)
%234 = add nsw i32 %65, %31
%235 = sext i32 %234 to i64
%236 = getelementptr inbounds float, float* %0, i64 %235
%237 = load float, float* %236
%238 = sub nsw i32 %65, %31
%239 = sext i32 %238 to i64
%240 = getelementptr inbounds float, float* %0, i64 %239
%241 = load float, float* %240
%242 = fadd float %237, %241
%243 = tail call float @llvm.fmuladd.f32(float %101, float %242, float %233)
%244 = add nsw i32 %65, %32
%245 = sext i32 %244 to i64
%246 = getelementptr inbounds float, float* %0, i64 %245
%247 = load float, float* %246
%248 = sub nsw i32 %65, %32
%249 = sext i32 %248 to i64
%250 = getelementptr inbounds float, float* %0, i64 %249
%251 = load float, float* %250
%252 = fadd float %247, %251
%253 = tail call float @llvm.fmuladd.f32(float %112, float %252, float %243)
%254 = add nsw i32 %65, %33
%255 = sext i32 %254 to i64
%256 = getelementptr inbounds float, float* %0, i64 %255
%257 = load float, float* %256
%258 = sub nsw i32 %65, %33
%259 = sext i32 %258 to i64
%260 = getelementptr inbounds float, float* %0, i64 %259
%261 = load float, float* %260
%262 = fadd float %257, %261
%263 = tail call float @llvm.fmuladd.f32(float %123, float %262, float %253)
%264 = add nsw i32 %65, %12
%265 = sext i32 %264 to i64
%266 = getelementptr inbounds float, float* %0, i64 %265
%267 = load float, float* %266
%268 = sub nsw i32 %65, %12
%269 = sext i32 %268 to i64
%270 = getelementptr inbounds float, float* %0, i64 %269
%271 = load float, float* %270
%272 = fadd float %267, %271
%273 = tail call float @llvm.fmuladd.f32(float %134, float %272, float %263)
%274 = tail call float @llvm.fmuladd.f32(float %145, float %72, float %273)
%275 = tail call float @llvm.fmuladd.f32(float %213, float %274, float %211)
store float %275, float* %73
br label %276
276: ; preds = %62, %70
%277 = add nuw nsw i64 %63, 1
%278 = icmp slt i64 %277, %51
br i1 %278, label %62, label %279
279: ; preds = %276, %56
%280 = add nuw nsw i32 %57, 1
%281 = icmp eq i32 %280, %37
br i1 %281, label %282, label %56
282: ; preds = %279, %52
%283 = add nuw nsw i32 %53, 1
%284 = icmp eq i32 %283, %4
br i1 %284, label %285, label %52
285: ; preds = %282, %43
%286 = add nuw nsw i64 %44, 2
%287 = trunc i64 %286 to i32
%288 = icmp slt i32 %287, %3
br i1 %288, label %43, label %289
289: ; preds = %285, %34
%290 = icmp slt i32 %38, %13
%291 = add nuw i32 %35, 2
br i1 %290, label %34, label %292
292: ; preds = %289, %11
ret void
}