xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ cyl(float, float, float, int);
int /*<<< orphan*/ cylinder_rings(float, float, float, scalar_t__);
int /*<<< orphan*/ endonion();
int /*<<< orphan*/ onion();
scalar_t__ randn(int);
void cylindrical_thing(float length, float r1, float r2) {
  onion();
  cyl(length, r1, r2, 1);
  cylinder_rings(length, r1, r2, randn(3) + 5);
  endonion();
}


x86 assembly (clang, -O0):
<cylindrical_thing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
mov    $0x0,%al
call   1030 <onion@plt>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
mov    $0x1,%edi
call   1070 <cyl@plt>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    $0x3,%edi
call   1060 <randn@plt>
movss  -0x18(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
mov    %rax,%rdi
add    $0x5,%rdi
call   1040 <cylinder_rings@plt>
mov    $0x0,%al
call   1050 <endonion@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cylindrical_thing>:
sub    $0x18,%rsp
movss  %xmm2,0x14(%rsp)
movss  %xmm1,0x10(%rsp)
movss  %xmm0,0xc(%rsp)
xor    %eax,%eax
call   1030 <onion@plt>
movss  0xc(%rsp),%xmm0
movss  0x10(%rsp),%xmm1
movss  0x14(%rsp),%xmm2
mov    $0x1,%edi
call   1070 <cyl@plt>
mov    $0x3,%edi
call   1060 <randn@plt>
lea    0x5(%rax),%rdi
movss  0xc(%rsp),%xmm0
movss  0x10(%rsp),%xmm1
movss  0x14(%rsp),%xmm2
call   1040 <cylinder_rings@plt>
xor    %eax,%eax
add    $0x18,%rsp
jmp    1050 <endonion@plt>

LLVM IR (-O0):
define void @cylindrical_thing(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = call i32 (...) @onion()
%8 = load float, float* %4
%9 = load float, float* %5
%10 = load float, float* %6
%11 = call i32 @cyl(float %8, float %9, float %10, i32 1)
%12 = load float, float* %4
%13 = load float, float* %5
%14 = load float, float* %6
%15 = call i64 @randn(i32 3)
%16 = add nsw i64 %15, 5
%17 = call i32 @cylinder_rings(float %12, float %13, float %14, i64 %16)
%18 = call i32 (...) @endonion()
ret void
}

LLVM IR (-O2):
define void @cylindrical_thing(float %0, float %1, float %2) {
%4 = tail call i32 (...) @onion()
%5 = tail call i32 @cyl(float %0, float %1, float %2, i32 1)
%6 = tail call i64 @randn(i32 3)
%7 = add nsw i64 %6, 5
%8 = tail call i32 @cylinder_rings(float %0, float %1, float %2, i64 %7)
%9 = tail call i32 (...) @endonion()
ret void
}
void pending_query(void) {}


x86 assembly (clang, -O0):
<pending_query>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pending_query>:
ret

LLVM IR (-O0):
define void @pending_query() {
ret void
}

LLVM IR (-O2):
define void @pending_query() {
ret void
}
void GlobalInterruptDisable(void) {
  ;
  ;
}


x86 assembly (clang, -O0):
<GlobalInterruptDisable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GlobalInterruptDisable>:
ret

LLVM IR (-O0):
define void @GlobalInterruptDisable() {
ret void
}

LLVM IR (-O2):
define void @GlobalInterruptDisable() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t bswap_32(uint32_t val) {
  return ((val & (uint32_t)0x000000ffUL) << 24) |
         ((val & (uint32_t)0x0000ff00UL) << 8) |
         ((val & (uint32_t)0x00ff0000UL) >> 8) |
         ((val & (uint32_t)0xff000000UL) >> 24);
}


x86 assembly (clang, -O0):
<bswap_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_32>:
mov    %edi,%eax
and    $0xffffff,%eax
bswap  %eax
sar    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @bswap_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = ashr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = ashr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @bswap_32(i32 %0) {
%2 = and i32 %0, 16777215
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
%4 = ashr i32 %0, 24
%5 = or i32 %3, %4
ret i32 %5
}
int get_data_payload() {
  return ((8192 - sizeof(long)) - sizeof(int) - sizeof(int));
}


x86 assembly (clang, -O0):
<get_data_payload>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1ff0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_data_payload>:
mov    $0x1ff0,%eax
ret

LLVM IR (-O0):
define i32 @get_data_payload() {
ret i32 8176
}

LLVM IR (-O2):
define i32 @get_data_payload() {
ret i32 8176
}
/* Variables and functions */
int /*<<< orphan*/ MixColumn(unsigned char *);
void MixColumns(unsigned char *state) {
  MixColumn(state + 0 * 4);
  MixColumn(state + 1 * 4);
  MixColumn(state + 2 * 4);
  MixColumn(state + 3 * 4);
}


x86 assembly (clang, -O0):
<MixColumns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <MixColumn@plt>
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
call   1030 <MixColumn@plt>
mov    -0x8(%rbp),%rdi
add    $0x8,%rdi
call   1030 <MixColumn@plt>
mov    -0x8(%rbp),%rdi
add    $0xc,%rdi
call   1030 <MixColumn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MixColumns>:
push   %rbx
mov    %rdi,%rbx
call   1030 <MixColumn@plt>
lea    0x4(%rbx),%rdi
call   1030 <MixColumn@plt>
lea    0x8(%rbx),%rdi
call   1030 <MixColumn@plt>
add    $0xc,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <MixColumn@plt>

LLVM IR (-O0):
define void @MixColumns(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = call i32 @MixColumn(i8* %4)
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 4
%8 = call i32 @MixColumn(i8* %7)
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 8
%11 = call i32 @MixColumn(i8* %10)
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i64 12
%14 = call i32 @MixColumn(i8* %13)
ret void
}

LLVM IR (-O2):
define void @MixColumns(i8* %0) {
%2 = tail call i32 @MixColumn(i8* %0)
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = tail call i32 @MixColumn(i8* %3)
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = tail call i32 @MixColumn(i8* %5)
%7 = getelementptr inbounds i8, i8* %0, i64 12
%8 = tail call i32 @MixColumn(i8* %7)
ret void
}
int isLetter(char t) {
  return (t >= 'a' && t <= 'z') || (t >= 'A' && t <= 'Z') ||
         (t >= '0' && t <= '9');
}


x86 assembly (clang, -O0):
<isLetter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1129 <isLetter+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    116d <isLetter+0x6d>
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1148 <isLetter+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    116d <isLetter+0x6d>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x3(%rbp)
jl     1167 <isLetter+0x67>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLetter>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isLetter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %28, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br i1 %17, label %28, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sge i32 %20, 48
br i1 %21, label %22, label %26
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 57
br label %26
26: ; preds = %22, %18
%27 = phi i1 [ false, %18 ], [ %25, %22 ]
br label %28
28: ; preds = %26, %14, %6
%29 = phi i1 [ true, %14 ], [ true, %6 ], [ %27, %26 ]
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @isLetter(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ irqHandler();
void ns_irq() { irqHandler(); }


x86 assembly (clang, -O0):
<ns_irq>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <irqHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns_irq>:
xor    %eax,%eax
jmp    1030 <irqHandler@plt>

LLVM IR (-O0):
define void @ns_irq() {
%1 = call i32 (...) @irqHandler()
ret void
}

LLVM IR (-O2):
define void @ns_irq() {
%1 = tail call i32 (...) @irqHandler()
ret void
}
int whileStatementFunction() {
  auto int n = 3;
  auto int m = 4;
  while (m) {
    return n;
  }
}


x86 assembly (clang, -O0):
<whileStatementFunction>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1122 <whileStatementFunction+0x22>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<whileStatementFunction>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @whileStatementFunction() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 3, i32* %2
store i32 4, i32* %3
br label %4
4: ; preds = %0
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = load i32, i32* %2
store i32 %8, i32* %1
br label %9
9: ; preds = %7, %4
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @whileStatementFunction() {
ret i32 3
}
/* Variables and functions */
scalar_t__ fft_is_delimeter(char);
void fft_advance_whitespace(char **str) {
  while (**str && fft_is_delimeter(**str))
    ++(*str);
}


x86 assembly (clang, -O0):
<fft_advance_whitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     114d <fft_advance_whitespace+0x3d>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%edi
call   1030 <fft_is_delimeter@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    115d <fft_advance_whitespace+0x4d>
jmp    1170 <fft_advance_whitespace+0x60>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    111c <fft_advance_whitespace+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fft_advance_whitespace>:
push   %rbx
mov    (%rdi),%rax
mov    (%rax),%al
test   %al,%al
je     113f <fft_advance_whitespace+0x2f>
mov    %rdi,%rbx
nopl   (%rax)
movsbl %al,%edi
call   1030 <fft_is_delimeter@plt>
test   %rax,%rax
je     113f <fft_advance_whitespace+0x2f>
mov    (%rbx),%rax
lea    0x1(%rax),%rcx
mov    %rcx,(%rbx)
movzbl 0x1(%rax),%eax
test   %al,%al
jne    1120 <fft_advance_whitespace+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @fft_advance_whitespace(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
br label %3
3: ; preds = %17, %1
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = load i8, i8* %11
%13 = call i64 @fft_is_delimeter(i8 signext %12)
%14 = icmp ne i64 %13, 0
br label %15
15: ; preds = %9, %3
%16 = phi i1 [ false, %3 ], [ %14, %9 ]
br i1 %16, label %17, label %21
17: ; preds = %15
%18 = load i8**, i8*** %2
%19 = load i8*, i8** %18
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %18
br label %3
21: ; preds = %15
ret void
}

LLVM IR (-O2):
define void @fft_advance_whitespace(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %1, %9
%6 = phi i8 [ %12, %9 ], [ %3, %1 ]
%7 = tail call i64 @fft_is_delimeter(i8 signext %6)
%8 = icmp eq i64 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = load i8*, i8** %0
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8* %11, i8** %0
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %9, %1
ret void
}
int((carrier_identification_transmit))(struct ss7 *ss7, struct isup_call *c,
                                       int messagetype, unsigned char *parm,
                                       int len) {
  parm[0] = 0x22;
  parm[1] = 0x00;
  parm[2] = 0x00;
  return 3;
}


x86 assembly (clang, -O0):
<carrier_identification_transmit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x20(%rbp),%rax
movb   $0x22,(%rax)
mov    -0x20(%rbp),%rax
movb   $0x0,0x1(%rax)
mov    -0x20(%rbp),%rax
movb   $0x0,0x2(%rax)
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<carrier_identification_transmit>:
movw   $0x22,(%rcx)
movb   $0x0,0x2(%rcx)
mov    $0x3,%eax
ret

LLVM IR (-O0):
%struct.ss7 = type opaque
%struct.isup_call = type opaque
define i32 @carrier_identification_transmit(%struct.ss7* %0, %struct.isup_call* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca %struct.ss7*
%7 = alloca %struct.isup_call*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store %struct.ss7* %0, %struct.ss7** %6
store %struct.isup_call* %1, %struct.isup_call** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %9
%12 = getelementptr inbounds i8, i8* %11, i64 0
store i8 34, i8* %12
%13 = load i8*, i8** %9
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 0, i8* %14
%15 = load i8*, i8** %9
%16 = getelementptr inbounds i8, i8* %15, i64 2
store i8 0, i8* %16
ret i32 3
}

LLVM IR (-O2):
%struct.ss7 = type opaque
%struct.isup_call = type opaque
define i32 @carrier_identification_transmit(%struct.ss7* nocapture readnone %0, %struct.isup_call* nocapture readnone %1, i32 %2, i8* nocapture writeonly %3, i32 %4) {
store i8 34, i8* %3
%6 = getelementptr inbounds i8, i8* %3, i64 1
store i8 0, i8* %6
%7 = getelementptr inbounds i8, i8* %3, i64 2
store i8 0, i8* %7
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int foo();
int main(void) {
  if (168 != foo())
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <foo@plt>
mov    %eax,%ecx
mov    $0xa8,%eax
cmp    %ecx,%eax
je     114c <main+0x2c>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <foo@plt>
cmp    $0xa8,%eax
jne    1133 <main+0x13>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = icmp ne i32 168, %2
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = icmp eq i32 %1, 168
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ deletebob(int);
int popNumber();
int /*<<< orphan*/ pushNumber(int /*<<< orphan*/);
void basDeleteBob() {
  int n;
  n = popNumber();
  pushNumber(deletebob(n));
}


x86 assembly (clang, -O0):
<basDeleteBob>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <popNumber@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <deletebob@plt>
mov    %eax,%edi
call   1040 <pushNumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basDeleteBob>:
push   %rax
xor    %eax,%eax
call   1050 <popNumber@plt>
mov    %eax,%edi
call   1030 <deletebob@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <pushNumber@plt>

LLVM IR (-O0):
define void @basDeleteBob() {
%1 = alloca i32
%2 = call i32 (...) @popNumber()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @deletebob(i32 %3)
%5 = call i32 @pushNumber(i32 %4)
ret void
}

LLVM IR (-O2):
define void @basDeleteBob() {
%1 = tail call i32 (...) @popNumber()
%2 = tail call i32 @deletebob(i32 %1)
%3 = tail call i32 @pushNumber(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Release();
void signalInterruption(int no) {
  Release();
  return;
}


x86 assembly (clang, -O0):
<signalInterruption>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signalInterruption>:
xor    %eax,%eax
jmp    1030 <Release@plt>

LLVM IR (-O0):
define void @signalInterruption(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @Release()
ret void
}

LLVM IR (-O2):
define void @signalInterruption(i32 %0) {
%2 = tail call i32 (...) @Release()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_send(int, char *);
void japi_die(int sd) { do_send(sd, "DIE\n"); }


x86 assembly (clang, -O0):
<japi_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <do_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<japi_die>:
lea    0xee9(%rip),%rsi
jmp    1030 <do_send@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"DIE\0A\00"
define void @japi_die(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @do_send(i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"DIE\0A\00"
define void @japi_die(i32 %0) {
%2 = tail call i32 @do_send(i32 %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
char *skipspace(char *p) {
  for (; *p == ' '; p++) {
  }
  return p;
}


x86 assembly (clang, -O0):
<skipspace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    112e <skipspace+0x2e>
jmp    111d <skipspace+0x1d>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <skipspace+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipspace>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x20,0x1(%rax)
lea    0x1(%rax),%rax
je     1110 <skipspace+0x10>
ret

LLVM IR (-O0):
define i8* @skipspace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %9, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 32
br i1 %7, label %8, label %12
8: ; preds = %3
br label %9
9: ; preds = %8
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
br label %3
12: ; preds = %3
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
define i8* @skipspace(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i8* %3
}
void use_intended_integer_underflow_Good() {
  unsigned long long x = (0ULL - 2);
}


x86 assembly (clang, -O0):
<use_intended_integer_underflow_Good>:
push   %rbp
mov    %rsp,%rbp
movq   $0xfffffffffffffffe,-0x8(%rbp)
ff
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_intended_integer_underflow_Good>:
ret

LLVM IR (-O0):
define void @use_intended_integer_underflow_Good() {
%1 = alloca i64
store i64 -2, i64* %1
ret void
}

LLVM IR (-O2):
define void @use_intended_integer_underflow_Good() {
ret void
}
void encodeDmaReadMemBarrier(void) {}


x86 assembly (clang, -O0):
<encodeDmaReadMemBarrier>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodeDmaReadMemBarrier>:
ret

LLVM IR (-O0):
define void @encodeDmaReadMemBarrier() {
ret void
}

LLVM IR (-O2):
define void @encodeDmaReadMemBarrier() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *threadFunc1(void *arg) {
  printf("thread 1 returning\n");
  return (void *)1;
}


x86 assembly (clang, -O0):
<threadFunc1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadFunc1>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"thread 1 returning\0A\00"
define i8* @threadFunc1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
@str = [19 x i8] c"thread 1 returning\00"
define i8* @threadFunc1(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret i8* inttoptr (i64 1 to i8*)
}
/* Variables and functions */
int /*<<< orphan*/ test_sha256();
void main() { test_sha256(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_sha256@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <test_sha256@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @test_sha256()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @test_sha256()
ret void
}
/* Variables and functions */
int buffer_open(char const *, int);
int buffer_open_output(const char *tag) { return buffer_open(tag, 1); }


x86 assembly (clang, -O0):
<buffer_open_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <buffer_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_open_output>:
mov    $0x1,%esi
jmp    1030 <buffer_open@plt>

LLVM IR (-O0):
define i32 @buffer_open_output(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @buffer_open(i8* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @buffer_open_output(i8* %0) {
%2 = tail call i32 @buffer_open(i8* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ BNCIO2(int, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int BNCLCDEchoOnOff() {
  int ii, stat = 99;
  char com1, data;
  printf("LCD echo on/off=1/0 \n");
  printf("Beware of this as you may screw up the current status display of "
         "this program! \n");
  scanf("%i", &ii);
  BNCIO2(33, ii);
  return (stat);
}


x86 assembly (clang, -O0):
<BNCLCDEchoOnOff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x63,-0x8(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
lea    0xf09(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x4(%rbp),%esi
mov    $0x21,%edi
call   1040 <BNCIO2@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BNCLCDEchoOnOff>:
push   %rax
lea    0xecb(%rip),%rdi
call   1030 <puts@plt>
lea    0xed4(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%esi
mov    $0x21,%edi
call   1040 <BNCIO2@plt>
mov    $0x63,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"LCD echo on/off=1/0 \0A\00"
@.str.1 = [81 x i8] c"Beware of this as you may screw up the current status display of this program! \0A\00"
@.str.2 = [3 x i8] c"%i\00"
define i32 @BNCLCDEchoOnOff() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
store i32 99, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @printf(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i32* %1)
%8 = load i32, i32* %1
%9 = call i32 @BNCIO2(i32 33, i32 %8)
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str.2 = [3 x i8] c"%i\00"
@str = [21 x i8] c"LCD echo on/off=1/0 \00"
@str.3 = [80 x i8] c"Beware of this as you may screw up the current status display of this program! \00"
define i32 @BNCLCDEchoOnOff() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([80 x i8], [80 x i8]* @str.3, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i32* %1)
%6 = load i32, i32* %1
%7 = call i32 @BNCIO2(i32 33, i32 %6)
ret i32 99
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int i;
  scanf("%d", &i);
  printf("%d\n", ((i + 2) * (i + 2) * (i + 2)));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
add    $0x2,%esi
mov    -0x8(%rbp),%eax
add    $0x2,%eax
imul   %eax,%esi
mov    -0x8(%rbp),%eax
add    $0x2,%eax
imul   %eax,%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
add    $0x2,%eax
mov    %eax,%esi
imul   %eax,%esi
imul   %eax,%esi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 2
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 2
%8 = mul nsw i32 %5, %7
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 2
%11 = mul nsw i32 %8, %10
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 2
%6 = mul nsw i32 %5, %5
%7 = mul nsw i32 %6, %5
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}
cf(s1, s2) register char *s1, *s2;
{
  while (*s1++ == *s2)
    if (*s2++ == '\0')
      return (0);
  return *--s1 - *s2;
}


x86 assembly (clang, -O0):
<cf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    1159 <cf+0x59>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1154 <cf+0x54>
movl   $0x0,-0x4(%rbp)
jmp    1178 <cf+0x78>
jmp    110c <cf+0xc>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
movsbl -0x1(%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cf>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi,%rcx,1),%eax
movsbl (%rsi,%rcx,1),%edx
cmp    %dl,%al
jne    1127 <cf+0x27>
add    $0x1,%rcx
test   %al,%al
jne    1110 <cf+0x10>
xor    %eax,%eax
ret
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @cf(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = load i8*, i8** %5
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %10, %13
br i1 %14, label %15, label %23
15: ; preds = %6
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %5
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 0, i32* %3
br label %32
22: ; preds = %15
br label %6
23: ; preds = %6
%24 = load i8*, i8** %4
%25 = getelementptr inbounds i8, i8* %24, i32 -1
store i8* %25, i8** %4
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = load i8*, i8** %5
%29 = load i8, i8* %28
%30 = sext i8 %29 to i32
%31 = sub nsw i32 %27, %30
store i32 %31, i32* %3
br label %32
32: ; preds = %23, %21
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @cf(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %0, %2 ], [ %10, %9 ]
%5 = phi i8* [ %1, %2 ], [ %11, %9 ]
%6 = load i8, i8* %4
%7 = load i8, i8* %5
%8 = icmp eq i8 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = icmp eq i8 %6, 0
br i1 %12, label %17, label %3
13: ; preds = %3
%14 = sext i8 %7 to i32
%15 = sext i8 %6 to i32
%16 = sub nsw i32 %15, %14
br label %17
17: ; preds = %9, %13
%18 = phi i32 [ %16, %13 ], [ 0, %9 ]
ret i32 %18
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ ndm_endian_letoh64(int /*<<< orphan*/ const);
uint64_t ndm_endian_htole64(const uint64_t x) { return ndm_endian_letoh64(x); }


x86 assembly (clang, -O0):
<ndm_endian_htole64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ndm_endian_letoh64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndm_endian_htole64>:
jmp    1030 <ndm_endian_letoh64@plt>

LLVM IR (-O0):
define i32 @ndm_endian_htole64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ndm_endian_letoh64(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ndm_endian_htole64(i32 %0) {
%2 = tail call i32 @ndm_endian_letoh64(i32 %0)
ret i32 %2
}
void INT_SVC_handler(int r0, int r1, int r2, int r3) {}


x86 assembly (clang, -O0):
<INT_SVC_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_SVC_handler>:
ret

LLVM IR (-O0):
define void @INT_SVC_handler(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @INT_SVC_handler(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
char const *nbdcmd_to_ascii(int cmd) {
  {
    switch (cmd) {
    case 0:
      return ("read");
    case 1:
      return ("write");
    case 2:
      return ("disconnect");
    }
    return ("invalid");
  }
}


x86 assembly (clang, -O0):
<nbdcmd_to_ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     113c <nbdcmd_to_ascii+0x3c>
jmp    111a <nbdcmd_to_ascii+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     114c <nbdcmd_to_ascii+0x4c>
jmp    112b <nbdcmd_to_ascii+0x2b>
mov    -0x10(%rbp),%eax
sub    $0x2,%eax
je     115c <nbdcmd_to_ascii+0x5c>
jmp    116c <nbdcmd_to_ascii+0x6c>
lea    0xebd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <nbdcmd_to_ascii+0x77>
lea    0xeb2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <nbdcmd_to_ascii+0x77>
lea    0xea8(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <nbdcmd_to_ascii+0x77>
lea    0xea3(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nbdcmd_to_ascii>:
cmp    $0x2,%edi
ja     1117 <nbdcmd_to_ascii+0x17>
movslq %edi,%rax
lea    0xf11(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
lea    0xef8(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"read\00"
@.str.1 = [6 x i8] c"write\00"
@.str.2 = [11 x i8] c"disconnect\00"
@.str.3 = [8 x i8] c"invalid\00"
define i8* @nbdcmd_to_ascii(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
]
5: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %9
6: ; preds = %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %9
7: ; preds = %1
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %9
8: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@.str = [5 x i8] c"read\00"
@.str.1 = [6 x i8] c"write\00"
@.str.2 = [11 x i8] c"disconnect\00"
@.str.3 = [8 x i8] c"invalid\00"
@reltable.nbdcmd_to_ascii = [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str to i64), i64 ptrtoint ([3 x i32]* @reltable.nbdcmd_to_ascii to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([6 x i8]* @.str.1 to i64), i64 ptrtoint ([3 x i32]* @reltable.nbdcmd_to_ascii to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([11 x i8]* @.str.2 to i64), i64 ptrtoint ([3 x i32]* @reltable.nbdcmd_to_ascii to i64)) to i32)]
define i8* @nbdcmd_to_ascii(i32 %0) {
%2 = icmp ult i32 %0, 3
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = shl i64 %4, 2
%6 = call i8* @llvm.load.relative.i64(i8* bitcast ([3 x i32]* @reltable.nbdcmd_to_ascii to i8*), i64 %5)
br label %7
7: ; preds = %1, %3
%8 = phi i8* [ %6, %3 ], [ getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i64 0, i64 0), %1 ]
ret i8* %8
}
unsigned long edf_maxvallen(void) { return (2048); }


x86 assembly (clang, -O0):
<edf_maxvallen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x800,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edf_maxvallen>:
mov    $0x800,%eax
ret

LLVM IR (-O0):
define i64 @edf_maxvallen() {
ret i64 2048
}

LLVM IR (-O2):
define i64 @edf_maxvallen() {
ret i64 2048
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
scalar_t__ _ttime_number(char **, int *);
int _ttime_day(char **p, time_t *time) {
  time_t res;
  if (_ttime_number(p, &res) != 0)
    return 1;
  *time = res * 60 * 60 * 24;
  return 0;
}


x86 assembly (clang, -O0):
<_ttime_day>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x1c(%rbp),%rsi
call   1030 <_ttime_number@plt>
cmp    $0x0,%rax
je     1143 <_ttime_day+0x33>
movl   $0x1,-0x4(%rbp)
jmp    115a <_ttime_day+0x4a>
imul   $0x3c,-0x1c(%rbp),%eax
imul   $0x3c,%eax,%eax
imul   $0x18,%eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ttime_day>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0xc(%rsp),%rsi
call   1030 <_ttime_number@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
jne    113b <_ttime_day+0x2b>
imul   $0x15180,0xc(%rsp),%eax
mov    %eax,(%rbx)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_ttime_day(i8** %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
%6 = alloca i32
store i8** %0, i8*** %4
store i32* %1, i32** %5
%7 = load i8**, i8*** %4
%8 = call i64 @_ttime_number(i8** %7, i32* %6)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %17
11: ; preds = %2
%12 = load i32, i32* %6
%13 = mul nsw i32 %12, 60
%14 = mul nsw i32 %13, 60
%15 = mul nsw i32 %14, 24
%16 = load i32*, i32** %5
store i32 %15, i32* %16
store i32 0, i32* %3
br label %17
17: ; preds = %11, %10
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @_ttime_day(i8** %0, i32* nocapture writeonly %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i64 @_ttime_number(i8** %0, i32* %3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %3
%9 = mul i32 %8, 86400
store i32 %9, i32* %1
br label %10
10: ; preds = %2, %7
%11 = phi i32 [ 0, %7 ], [ 1, %2 ]
ret i32 %11
}
void ff_hevc_put_hevc_qpel_v32_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_v32_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_v32_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_v32_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_v32_8_sse4() {
ret void
}
/* Variables and functions */
char *readtoken(char *, char *, char *);
char *nthtoken(char *to, char *from, char *delims, int n) {
  int i = 0;
  for (i = 0; i < n; i++)
    from = readtoken(to, from, delims);
  return from;
}


x86 assembly (clang, -O0):
<nthtoken>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    1164 <nthtoken+0x54>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <readtoken@plt>
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1135 <nthtoken+0x25>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nthtoken>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rax
test   %ecx,%ecx
jle    1143 <nthtoken+0x33>
mov    %ecx,%ebx
mov    %rdx,%r14
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r15,%rdi
mov    %rax,%rsi
mov    %r14,%rdx
call   1030 <readtoken@plt>
add    $0xffffffff,%ebx
jne    1130 <nthtoken+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @nthtoken(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
store i32 0, i32* %9
store i32 0, i32* %9
br label %10
10: ; preds = %19, %4
%11 = load i32, i32* %9
%12 = load i32, i32* %8
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %22
14: ; preds = %10
%15 = load i8*, i8** %5
%16 = load i8*, i8** %6
%17 = load i8*, i8** %7
%18 = call i8* @readtoken(i8* %15, i8* %16, i8* %17)
store i8* %18, i8** %6
br label %19
19: ; preds = %14
%20 = load i32, i32* %9
%21 = add nsw i32 %20, 1
store i32 %21, i32* %9
br label %10
22: ; preds = %10
%23 = load i8*, i8** %6
ret i8* %23
}

LLVM IR (-O2):
define i8* @nthtoken(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = icmp sgt i32 %3, 0
br i1 %5, label %6, label %12
6: ; preds = %4, %6
%7 = phi i32 [ %10, %6 ], [ 0, %4 ]
%8 = phi i8* [ %9, %6 ], [ %1, %4 ]
%9 = tail call i8* @readtoken(i8* %0, i8* %8, i8* %2)
%10 = add nuw nsw i32 %7, 1
%11 = icmp eq i32 %10, %3
br i1 %11, label %12, label %6
12: ; preds = %6, %4
%13 = phi i8* [ %1, %4 ], [ %9, %6 ]
ret i8* %13
}
long cSunMiscSignal_atomicIncrement(volatile long *const address) {
  return __sync_fetch_and_add(address, 1);
}


x86 assembly (clang, -O0):
<cSunMiscSignal_atomicIncrement>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
lock xadd %rax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cSunMiscSignal_atomicIncrement>:
mov    $0x1,%eax
lock xadd %rax,(%rdi)
ret

LLVM IR (-O0):
define i64 @cSunMiscSignal_atomicIncrement(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = atomicrmw add i64* %3, i64 1 seq_cst
ret i64 %4
}

LLVM IR (-O2):
define i64 @cSunMiscSignal_atomicIncrement(i64* nocapture %0) {
%2 = atomicrmw add i64* %0, i64 1 seq_cst
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
long BIO_ctrl(int /*<<< orphan*/ *, int, long, char *);
long BIO_int_ctrl(BIO *b, int cmd, long larg, int iarg) {
  int i;
  i = iarg;
  return (BIO_ctrl(b, cmd, larg, (char *)&i));
}


x86 assembly (clang, -O0):
<BIO_int_ctrl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1030 <BIO_ctrl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_int_ctrl>:
push   %rax
mov    %ecx,0x4(%rsp)
lea    0x4(%rsp),%rcx
call   1030 <BIO_ctrl@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @BIO_int_ctrl(i32* %0, i32 %1, i64 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%10 = load i32, i32* %8
store i32 %10, i32* %9
%11 = load i32*, i32** %5
%12 = load i32, i32* %6
%13 = load i64, i64* %7
%14 = bitcast i32* %9 to i8*
%15 = call i64 @BIO_ctrl(i32* %11, i32 %12, i64 %13, i8* %14)
ret i64 %15
}

LLVM IR (-O2):
define i64 @BIO_int_ctrl(i32* %0, i32 %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = bitcast i32* %5 to i8*
store i32 %3, i32* %5
%7 = call i64 @BIO_ctrl(i32* %0, i32 %1, i64 %2, i8* %6)
ret i64 %7
}
int tray_loop(int blocking) { return -1; }


x86 assembly (clang, -O0):
<tray_loop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tray_loop>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @tray_loop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @tray_loop(i32 %0) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ XReparentEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XReparentEvent(void) {
  XReparentEvent *_p = (XReparentEvent *)malloc(sizeof(XReparentEvent));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XReparentEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XReparentEvent+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XReparentEvent>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XReparentEvent+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XReparentEvent() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XReparentEvent() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
/* Variables and functions */
int test00(int, int);
int __attribute__((interrupt_handler)) test01(int a, int b, int c, int d) {
  return test00(a, b) + c;
}


x86 assembly (clang, -O0):
<test01>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <test00@plt>
add    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test01>:
push   %rbx
mov    %edx,%ebx
call   1030 <test00@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test01(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @test00(i32 %9, i32 %10)
%12 = load i32, i32* %7
%13 = add nsw i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @test01(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @test00(i32 %0, i32 %1)
%6 = add nsw i32 %5, %2
ret i32 %6
}
float dv_float(float a, float b) { return a / b; }


x86 assembly (clang, -O0):
<dv_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dv_float>:
divss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @dv_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fdiv float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @dv_float(float %0, float %1) {
%3 = fdiv float %0, %1
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M754_f(char *s) {
  debug("M754_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M754_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M754_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M754_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M754_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M754_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M754_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}