xunge/DecIR huggingface dataset:
unsigned int check_maxNodes(int q) {
  if (q < 0 || q > 100) {
    return 0;
  } else
    return 1;
}


x86 assembly (clang, -O0):
<check_maxNodes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     111b <check_maxNodes+0x1b>
cmpl   $0x64,-0x8(%rbp)
jle    1127 <check_maxNodes+0x27>
movl   $0x0,-0x4(%rbp)
jmp    112e <check_maxNodes+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_maxNodes>:
xor    %eax,%eax
cmp    $0x65,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @check_maxNodes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 100
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @check_maxNodes(i32 %0) {
%2 = icmp ult i32 %0, 101
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ _atomic_set_u32(int /*<<< orphan*/ *, int /*<<< orphan*/);
void _atomic_set_s32(int32_t *ptr, int32_t value) {
  _atomic_set_u32((uint32_t *)ptr, value);
}


x86 assembly (clang, -O0):
<_atomic_set_s32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_atomic_set_u32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_atomic_set_s32>:
jmp    1030 <_atomic_set_u32@plt>

LLVM IR (-O0):
define void @_atomic_set_s32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @_atomic_set_u32(i32* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @_atomic_set_s32(i32* %0, i32 %1) {
%3 = tail call i32 @_atomic_set_u32(i32* %0, i32 %1)
ret void
}
/* Variables and functions */
int rand();
void initialize_array(int arr[], size_t len) {
  for (size_t i = 0; i < len; i++)
    arr[i] = 10 + rand() % 90;
}


x86 assembly (clang, -O0):
<initialize_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1164 <initialize_array+0x54>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x5a,%ecx
cltd
idiv   %ecx
add    $0xa,%edx
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <initialize_array+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_array>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1167 <initialize_array+0x57>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0xffffffffb60b60b7,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x6,%ecx
add    %edx,%ecx
imul   $0x5a,%ecx,%ecx
neg    %ecx
add    %ecx,%eax
add    $0xa,%eax
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <initialize_array+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @initialize_array(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = srem i32 %11, 90
%13 = add nsw i32 10, %12
%14 = load i32*, i32** %3
%15 = load i64, i64* %5
%16 = getelementptr inbounds i32, i32* %14, i64 %15
store i32 %13, i32* %16
br label %17
17: ; preds = %10
%18 = load i64, i64* %5
%19 = add i64 %18, 1
store i64 %19, i64* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @initialize_array(i32* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %11, %5 ], [ 0, %2 ]
%7 = tail call i32 (...) @rand()
%8 = srem i32 %7, 90
%9 = add nsw i32 %8, 10
%10 = getelementptr inbounds i32, i32* %0, i64 %6
store i32 %9, i32* %10
%11 = add nuw i64 %6, 1
%12 = icmp eq i64 %11, %1
br i1 %12, label %4, label %5
}
/* Variables and functions */
int /*<<< orphan*/ PyRun_SimpleString(char const *);
int /*<<< orphan*/ Py_Finalize();
int /*<<< orphan*/ Py_Initialize();
void mypython_main_code(const char *code) {
  Py_Initialize();
  PyRun_SimpleString(code);
  Py_Finalize();
}


x86 assembly (clang, -O0):
<mypython_main_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <Py_Initialize@plt>
mov    -0x8(%rbp),%rdi
call   1040 <PyRun_SimpleString@plt>
mov    $0x0,%al
call   1050 <Py_Finalize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mypython_main_code>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <Py_Initialize@plt>
mov    %rbx,%rdi
call   1040 <PyRun_SimpleString@plt>
xor    %eax,%eax
pop    %rbx
jmp    1050 <Py_Finalize@plt>

LLVM IR (-O0):
define void @mypython_main_code(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @Py_Initialize()
%4 = load i8*, i8** %2
%5 = call i32 @PyRun_SimpleString(i8* %4)
%6 = call i32 (...) @Py_Finalize()
ret void
}

LLVM IR (-O2):
define void @mypython_main_code(i8* %0) {
%2 = tail call i32 (...) @Py_Initialize()
%3 = tail call i32 @PyRun_SimpleString(i8* %0)
%4 = tail call i32 (...) @Py_Finalize()
ret void
}
/* Variables and functions */
char *CheckFirmwareVersionEx(int, char *, char *);
char *CheckFirmwareVersion(char *firmware_version, char *firmware_file_list) {
  return CheckFirmwareVersionEx((1), firmware_version, firmware_file_list);
}


x86 assembly (clang, -O0):
<CheckFirmwareVersion>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x1,%edi
call   1030 <CheckFirmwareVersionEx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckFirmwareVersion>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <CheckFirmwareVersionEx@plt>

LLVM IR (-O0):
define i8* @CheckFirmwareVersion(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @CheckFirmwareVersionEx(i32 1, i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @CheckFirmwareVersion(i8* %0, i8* %1) {
%3 = tail call i8* @CheckFirmwareVersionEx(i32 1, i8* %0, i8* %1)
ret i8* %3
}
int i_cmp(const void *v1, const void *v2) {
  int d1, d2;
  d1 = *((int *)v1);
  d2 = *((int *)v2);
  if (d1 < d2) {
    return (-1);
  } else if (d1 > d2) {
    return (1);
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<i_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    1136 <i_cmp+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <i_cmp+0x55>
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jle    114e <i_cmp+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1155 <i_cmp+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_cmp>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @i_cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
store i32 %13, i32* %7
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = icmp sgt i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @i_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = icmp sgt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Variables and functions */
float NAN;
float nanf(const char *s) { return NAN; }


x86 assembly (clang, -O0):
<nanf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ee9(%rip),%rax
movss  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanf>:
mov    0x2ef1(%rip),%rax
movss  (%rax),%xmm0
ret

LLVM IR (-O0):
@NAN = global float 0.000000e+00
define float @nanf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load float, float* @NAN
ret float %3
}

LLVM IR (-O2):
@NAN = global float 0.000000e+00
define float @nanf(i8* nocapture readnone %0) {
%2 = load float, float* @NAN
ret float %2
}
/* Variables and functions */
int ask(char *, char *);
void *strdup(char *);
void *fetch_dll_name() {
  char ans[1024];
  int i;
  i = ask("dll_filename", ans);
  if (i != 0) {
    return NULL;
  }
  return strdup(ans);
}


x86 assembly (clang, -O0):
<fetch_dll_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
lea    -0x410(%rbp),%rsi
lea    0xec7(%rip),%rdi
call   1030 <ask@plt>
mov    %eax,-0x414(%rbp)
cmpl   $0x0,-0x414(%rbp)
je     115e <fetch_dll_name+0x3e>
movq   $0x0,-0x8(%rbp)
jmp    116e <fetch_dll_name+0x4e>
lea    -0x410(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_dll_name>:
sub    $0x408,%rsp
lea    0xed2(%rip),%rdi
mov    %rsp,%rsi
call   1030 <ask@plt>
test   %eax,%eax
je     1144 <fetch_dll_name+0x24>
xor    %eax,%eax
add    $0x408,%rsp
ret
mov    %rsp,%rdi
call   1040 <strdup@plt>
add    $0x408,%rsp
ret

LLVM IR (-O0):
@.str = [13 x i8] c"dll_filename\00"
define i8* @fetch_dll_name() {
%1 = alloca i8*
%2 = alloca [1024 x i8]
%3 = alloca i32
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%5 = call i32 @ask(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
store i8* null, i8** %1
br label %12
9: ; preds = %0
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%11 = call i8* @strdup(i8* %10)
store i8* %11, i8** %1
br label %12
12: ; preds = %9, %8
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [13 x i8] c"dll_filename\00"
define noalias i8* @fetch_dll_name() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @ask(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i8* @strdup(i8* %2)
br label %7
7: ; preds = %0, %5
%8 = phi i8* [ %6, %5 ], [ null, %0 ]
ret i8* %8
}
/* Variables and functions */
double random();
double prandom_double() {
  double out = random();
  return out;
}


x86 assembly (clang, -O0):
<prandom_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <random@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prandom_double>:
xor    %eax,%eax
jmp    1030 <random@plt>

LLVM IR (-O0):
define double @prandom_double() {
%1 = alloca double
%2 = call double (...) @random()
store double %2, double* %1
%3 = load double, double* %1
ret double %3
}

LLVM IR (-O2):
define double @prandom_double() {
%1 = tail call double (...) @random()
ret double %1
}
/* Variables and functions */
float atof(char const *);
float CFloatChars(const char *Src) { return atof(Src); }


x86 assembly (clang, -O0):
<CFloatChars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFloatChars>:
jmp    1030 <atof@plt>

LLVM IR (-O0):
define float @CFloatChars(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call float @atof(i8* %3)
ret float %4
}

LLVM IR (-O2):
define float @CFloatChars(i8* nocapture %0) {
%2 = tail call float @atof(i8* %0)
ret float %2
}
/* Variables and functions */
char *tng_compress_vel(double *, int const, int const, double const, int const,
                       int *, int *);
char *tng_compress_vel_find_algo(double *vel, const int natoms,
                                 const int nframes,
                                 const double desired_precision,
                                 const int speed, int *algo, int *nitems) {
  algo[0] = -1;
  algo[1] = -1;
  algo[2] = -1;
  algo[3] = -1;
  return tng_compress_vel(vel, natoms, nframes, desired_precision, speed, algo,
                          nitems);
}


x86 assembly (clang, -O0):
<tng_compress_vel_find_algo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x28(%rbp),%rax
movl   $0xffffffff,(%rax)
mov    -0x28(%rbp),%rax
movl   $0xffffffff,0x4(%rax)
mov    -0x28(%rbp),%rax
movl   $0xffffffff,0x8(%rax)
mov    -0x28(%rbp),%rax
movl   $0xffffffff,0xc(%rax)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
movsd  -0x18(%rbp),%xmm0
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
call   1030 <tng_compress_vel@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tng_compress_vel_find_algo>:
pcmpeqd %xmm1,%xmm1
movdqu %xmm1,(%r8)
jmp    1030 <tng_compress_vel@plt>

LLVM IR (-O0):
define i8* @tng_compress_vel_find_algo(double* %0, i32 %1, i32 %2, double %3, i32 %4, i32* %5, i32* %6) {
%8 = alloca double*
%9 = alloca i32
%10 = alloca i32
%11 = alloca double
%12 = alloca i32
%13 = alloca i32*
%14 = alloca i32*
store double* %0, double** %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store double %3, double* %11
store i32 %4, i32* %12
store i32* %5, i32** %13
store i32* %6, i32** %14
%15 = load i32*, i32** %13
%16 = getelementptr inbounds i32, i32* %15, i64 0
store i32 -1, i32* %16
%17 = load i32*, i32** %13
%18 = getelementptr inbounds i32, i32* %17, i64 1
store i32 -1, i32* %18
%19 = load i32*, i32** %13
%20 = getelementptr inbounds i32, i32* %19, i64 2
store i32 -1, i32* %20
%21 = load i32*, i32** %13
%22 = getelementptr inbounds i32, i32* %21, i64 3
store i32 -1, i32* %22
%23 = load double*, double** %8
%24 = load i32, i32* %9
%25 = load i32, i32* %10
%26 = load double, double* %11
%27 = load i32, i32* %12
%28 = load i32*, i32** %13
%29 = load i32*, i32** %14
%30 = call i8* @tng_compress_vel(double* %23, i32 %24, i32 %25, double %26, i32 %27, i32* %28, i32* %29)
ret i8* %30
}

LLVM IR (-O2):
define i8* @tng_compress_vel_find_algo(double* %0, i32 %1, i32 %2, double %3, i32 %4, i32* %5, i32* %6) {
%8 = bitcast i32* %5 to i8*
%9 = tail call i8* @tng_compress_vel(double* %0, i32 %1, i32 %2, double %3, i32 %4, i32* %5, i32* %6)
ret i8* %9
}
int iwl_tm_gnl_init(void) { return 0; }


x86 assembly (clang, -O0):
<iwl_tm_gnl_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iwl_tm_gnl_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @iwl_tm_gnl_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @iwl_tm_gnl_init() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int dwrap_puts(BIO *b, const char *in) {
  assert(0);
  return 0;
}


x86 assembly (clang, -O0):
<dwrap_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dwrap_puts>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dwrap_puts(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = call i32 @assert(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @dwrap_puts(i32* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @assert(i32 0)
ret i32 0
}
unsigned int easydecrypt(char c) { return c - 1; }


x86 assembly (clang, -O0):
<easydecrypt>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<easydecrypt>:
lea    -0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @easydecrypt(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @easydecrypt(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ robber_erase(int);
int /*<<< orphan*/ robber_place(int);
int robber_down(int hex) {
  robber_erase(hex);
  hex += 5;
  if (hex == 26)
    hex = 1;
  if (hex == 20 || hex == 22)
    hex -= 15;
  if (hex > 21)
    hex -= 20;
  robber_place(hex);
  return hex;
}


x86 assembly (clang, -O0):
<robber_down>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <robber_erase@plt>
mov    -0x4(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x1a,-0x4(%rbp)
jne    114d <robber_down+0x2d>
movl   $0x1,-0x4(%rbp)
cmpl   $0x14,-0x4(%rbp)
je     1161 <robber_down+0x41>
cmpl   $0x16,-0x4(%rbp)
jne    116a <robber_down+0x4a>
mov    -0x4(%rbp),%eax
sub    $0xf,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x15,-0x4(%rbp)
jle    117d <robber_down+0x5d>
mov    -0x4(%rbp),%eax
sub    $0x14,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <robber_place@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<robber_down>:
push   %rbx
mov    %edi,%ebx
call   1040 <robber_erase@plt>
add    $0x5,%ebx
cmp    $0x1a,%ebx
mov    $0x1,%eax
cmovne %ebx,%eax
mov    %eax,%ecx
and    $0xfffffffd,%ecx
lea    -0xf(%rax),%edx
cmp    $0x14,%ecx
cmovne %eax,%edx
lea    -0x14(%rdx),%ebx
cmp    $0x16,%edx
cmovl  %edx,%ebx
mov    %ebx,%edi
call   1030 <robber_place@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @robber_down(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @robber_erase(i32 %3)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 26
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %1
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, 20
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp eq i32 %14, 22
br i1 %15, label %16, label %19
16: ; preds = %13, %10
%17 = load i32, i32* %2
%18 = sub nsw i32 %17, 15
store i32 %18, i32* %2
br label %19
19: ; preds = %16, %13
%20 = load i32, i32* %2
%21 = icmp sgt i32 %20, 21
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %2
%24 = sub nsw i32 %23, 20
store i32 %24, i32* %2
br label %25
25: ; preds = %22, %19
%26 = load i32, i32* %2
%27 = call i32 @robber_place(i32 %26)
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @robber_down(i32 %0) {
%2 = tail call i32 @robber_erase(i32 %0)
%3 = add nsw i32 %0, 5
%4 = icmp eq i32 %3, 26
%5 = select i1 %4, i32 1, i32 %3
%6 = and i32 %5, -3
%7 = icmp eq i32 %6, 20
%8 = add nsw i32 %5, -15
%9 = select i1 %7, i32 %8, i32 %5
%10 = icmp sgt i32 %9, 21
%11 = add nsw i32 %9, -20
%12 = select i1 %10, i32 %11, i32 %9
%13 = tail call i32 @robber_place(i32 %12)
ret i32 %12
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECSASD(const char *the_title) { return any_decrqss(the_title, "$}"); }


x86 assembly (clang, -O0):
<rpt_DECSASD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECSASD>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"$}\00"
define i32 @rpt_DECSASD(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"$}\00"
define i32 @rpt_DECSASD(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
void gtk_drag_dest_set_target_list() {}


x86 assembly (clang, -O0):
<gtk_drag_dest_set_target_list>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_drag_dest_set_target_list>:
ret

LLVM IR (-O0):
define void @gtk_drag_dest_set_target_list() {
ret void
}

LLVM IR (-O2):
define void @gtk_drag_dest_set_target_list() {
ret void
}
void ocl_hw_atomic16_set(int index, int value) {}


x86 assembly (clang, -O0):
<ocl_hw_atomic16_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ocl_hw_atomic16_set>:
ret

LLVM IR (-O0):
define void @ocl_hw_atomic16_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @ocl_hw_atomic16_set(i32 %0, i32 %1) {
ret void
}
void ble_rsp_hardware_io_port_irq_enable(
    const struct ble_msg_hardware_io_port_irq_enable_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_hardware_io_port_irq_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_hardware_io_port_irq_enable>:
ret

LLVM IR (-O0):
%struct.ble_msg_hardware_io_port_irq_enable_rsp_t = type opaque
define void @ble_rsp_hardware_io_port_irq_enable(%struct.ble_msg_hardware_io_port_irq_enable_rsp_t* %0) {
%2 = alloca %struct.ble_msg_hardware_io_port_irq_enable_rsp_t*
store %struct.ble_msg_hardware_io_port_irq_enable_rsp_t* %0, %struct.ble_msg_hardware_io_port_irq_enable_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_hardware_io_port_irq_enable_rsp_t = type opaque
define void @ble_rsp_hardware_io_port_irq_enable(%struct.ble_msg_hardware_io_port_irq_enable_rsp_t* nocapture %0) {
ret void
}
float clamp(float v, float min, float max) {
  return v < min ? min : v > max ? max : v;
}


x86 assembly (clang, -O0):
<clamp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <clamp+0x35>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1167 <clamp+0x67>
movss  -0x4(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1153 <clamp+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    115d <clamp+0x5d>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @clamp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %5
br label %22
12: ; preds = %3
%13 = load float, float* %4
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
br label %20
18: ; preds = %12
%19 = load float, float* %4
br label %20
20: ; preds = %18, %16
%21 = phi float [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi float [ %11, %10 ], [ %21, %20 ]
ret float %23
}

LLVM IR (-O2):
define float @clamp(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
void g_allocator_free() {}


x86 assembly (clang, -O0):
<g_allocator_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_allocator_free>:
ret

LLVM IR (-O0):
define void @g_allocator_free() {
ret void
}

LLVM IR (-O2):
define void @g_allocator_free() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("Testing multilib capabilities");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"Testing multilib capabilities\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"Testing multilib capabilities\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ uart1_writeb(char);
int putchar(int c) {
  uart1_writeb((char)c);
  return c;
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movsbl %al,%edi
call   1030 <uart1_writeb@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rbx
mov    %edi,%ebx
movsbl %bl,%edi
call   1030 <uart1_writeb@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = call i32 @uart1_writeb(i8 signext %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @putchar(i32 returned %0) {
%2 = trunc i32 %0 to i8
%3 = tail call i32 @uart1_writeb(i8 signext %2)
ret i32 %0
}
void disable_button_interrupt(void) {
  (*(volatile unsigned long *)(((0xFFFFF000) + 0x014))) = 0x8000;
  (*(volatile unsigned long *)((0xE002C000))) =
      ((*(volatile unsigned long *)((0xE002C000))) & ~0x30000000);
  (*(volatile unsigned long *)((0xE01FC140))) = 0x2;
}


x86 assembly (clang, -O0):
<disable_button_interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffff014,%eax
movq   $0x8000,(%rax)
mov    $0xe002c000,%eax
mov    (%rax),%rcx
and    $0xffffffffcfffffff,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe01fc140,%eax
movq   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_button_interrupt>:
mov    $0xe002c000,%eax
movq   $0x8000,0x1ffd3014(%rax)
andq   $0xffffffffcfffffff,(%rax)
movq   $0x2,0x1d0140(%rax)
ret

LLVM IR (-O0):
define void @disable_button_interrupt() {
store volatile i64 32768, i64* inttoptr (i64 4294963220 to i64*)
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = and i64 %1, -805306369
store volatile i64 %2, i64* inttoptr (i64 3758276608 to i64*)
store volatile i64 2, i64* inttoptr (i64 3760177472 to i64*)
ret void
}

LLVM IR (-O2):
define void @disable_button_interrupt() {
store volatile i64 32768, i64* inttoptr (i64 4294963220 to i64*)
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = and i64 %1, -805306369
store volatile i64 %2, i64* inttoptr (i64 3758276608 to i64*)
store volatile i64 2, i64* inttoptr (i64 3760177472 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void listChoices(void) {
  printf("\t[0]: Initialize RVI\n"
         "\t[1]: Connect to remote node\n"
         "\t[2]: Disconnect from remote node\n"
         "\t[3]: Get a list of connections\n"
         "\t[4]: Register a service\n"
         "\t[5]: Unregister a service\n"
         "\t[6]: Get a list of services\n"
         "\t[7]: Invoke remote service\n"
         "\t[8]: Process input\n"
         "\t[9]: Shutdown RVI\n"
         "\t[10]: Close program.\n"
         "Make a choice: ");
}


x86 assembly (clang, -O0):
<listChoices>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<listChoices>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [302 x i8] c"\09[0]: Initialize RVI\0A\09[1]: Connect to remote node\0A\09[2]: Disconnect from remote node\0A\09[3]: Get a list of connections\0A\09[4]: Register a service\0A\09[5]: Unregister a service\0A\09[6]: Get a list of services\0A\09[7]: Invoke remote service\0A\09[8]: Process input\0A\09[9]: Shutdown RVI\0A\09[10]: Close program.\0AMake a choice: \00"
define void @listChoices() {
%1 = call i32 @printf(i8* getelementptr inbounds ([302 x i8], [302 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [302 x i8] c"\09[0]: Initialize RVI\0A\09[1]: Connect to remote node\0A\09[2]: Disconnect from remote node\0A\09[3]: Get a list of connections\0A\09[4]: Register a service\0A\09[5]: Unregister a service\0A\09[6]: Get a list of services\0A\09[7]: Invoke remote service\0A\09[8]: Process input\0A\09[9]: Shutdown RVI\0A\09[10]: Close program.\0AMake a choice: \00"
define void @listChoices() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([302 x i8], [302 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_subs_pi8(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test_mm_subs_pi8(__m64 a, __m64 b) { return _mm_subs_pi8(a, b); }


x86 assembly (clang, -O0):
<test_mm_subs_pi8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_subs_pi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_subs_pi8>:
jmp    1030 <_mm_subs_pi8@plt>

LLVM IR (-O0):
define i32 @test_mm_subs_pi8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_subs_pi8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_subs_pi8(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_subs_pi8(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
char **load_indexed_ar(char *, int *);
char **load_otus(char *file) {
  int sz;
  return load_indexed_ar(file, &sz);
}


x86 assembly (clang, -O0):
<load_otus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <load_indexed_ar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_otus>:
push   %rax
lea    0x4(%rsp),%rsi
call   1030 <load_indexed_ar@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i8** @load_otus(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8** @load_indexed_ar(i8* %4, i32* %3)
ret i8** %5
}

LLVM IR (-O2):
define i8** @load_otus(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i8** @load_indexed_ar(i8* %0, i32* %2)
ret i8** %4
}
/* Variables and functions */
unsigned int readb(void *);
unsigned int ioread8(void *addr) { return readb(addr); }


x86 assembly (clang, -O0):
<ioread8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <readb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioread8>:
jmp    1030 <readb@plt>

LLVM IR (-O0):
define i32 @ioread8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @readb(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ioread8(i8* %0) {
%2 = tail call i32 @readb(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, void *);
int /*<<< orphan*/ stderr;
void rtpp_stats_update_derived_fin(void *pub) {
  fprintf(stderr,
          "Method rtpp_stats@%p::update_derived (rtpp_stats_update_derived) is "
          "invoked after destruction\x0a",
          pub);
  abort();
}


x86 assembly (clang, -O0):
<rtpp_stats_update_derived_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<rtpp_stats_update_derived_fin>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [95 x i8] c"Method rtpp_stats@%p::update_derived (rtpp_stats_update_derived) is invoked after destruction\0A\00"
define void @rtpp_stats_update_derived_fin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([95 x i8], [95 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [95 x i8] c"Method rtpp_stats@%p::update_derived (rtpp_stats_update_derived) is invoked after destruction\0A\00"
define void @rtpp_stats_update_derived_fin(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([95 x i8], [95 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p224_set_one(uintptr_t);
void fiat_p224_set_one(uint32_t out1[7]) {
  internal_fiat_p224_set_one((uintptr_t)out1);
}


x86 assembly (clang, -O0):
<fiat_p224_set_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <internal_fiat_p224_set_one@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p224_set_one>:
jmp    1030 <internal_fiat_p224_set_one@plt>

LLVM IR (-O0):
define void @fiat_p224_set_one(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = ptrtoint i32* %3 to i64
%5 = call i32 @internal_fiat_p224_set_one(i64 %4)
ret void
}

LLVM IR (-O2):
define void @fiat_p224_set_one(i32* %0) {
%2 = ptrtoint i32* %0 to i64
%3 = tail call i32 @internal_fiat_p224_set_one(i64 %2)
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void FlashIntEnable(uint32_t ui32IntFlags) {
  (*((volatile unsigned long *)(0x40030000 + 0x00002288))) = 5;
  (*((volatile unsigned long *)(0x40030000 + 0x0000227C))) |= ui32IntFlags;
  (*((volatile unsigned long *)(0x40030000 + 0x00002288))) = 2;
}


x86 assembly (clang, -O0):
<FlashIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x40032288,%eax
movq   $0x5,(%rax)
mov    -0x8(%rbp),%rax
mov    $0x4003227c,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x4003227c,%eax
mov    %rcx,(%rax)
mov    $0x40032288,%eax
movq   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashIntEnable>:
mov    %rdi,-0x8(%rsp)
movq   $0x5,0x40032288
mov    -0x8(%rsp),%rax
or     %rax,0x4003227c
40
movq   $0x2,0x40032288
ret

LLVM IR (-O0):
define void @FlashIntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
store volatile i64 5, i64* inttoptr (i64 1073947272 to i64*)
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1073947260 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1073947260 to i64*)
store volatile i64 2, i64* inttoptr (i64 1073947272 to i64*)
ret void
}

LLVM IR (-O2):
define void @FlashIntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
store volatile i64 5, i64* inttoptr (i64 1073947272 to i64*)
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1073947260 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1073947260 to i64*)
store volatile i64 2, i64* inttoptr (i64 1073947272 to i64*)
ret void
}
/* Type definitions */
struct wl_resource {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_resource_post_event(struct wl_resource *, int);
void wl_touch_send_frame(struct wl_resource *resource_) {
  wl_resource_post_event(resource_, 3);
}


x86 assembly (clang, -O0):
<wl_touch_send_frame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1030 <wl_resource_post_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_touch_send_frame>:
mov    $0x3,%esi
jmp    1030 <wl_resource_post_event@plt>

LLVM IR (-O0):
%struct.wl_resource = type { i32 }
define void @wl_touch_send_frame(%struct.wl_resource* %0) {
%2 = alloca %struct.wl_resource*
store %struct.wl_resource* %0, %struct.wl_resource** %2
%3 = load %struct.wl_resource*, %struct.wl_resource** %2
%4 = call i32 @wl_resource_post_event(%struct.wl_resource* %3, i32 3)
ret void
}

LLVM IR (-O2):
%struct.wl_resource = type { i32 }
define void @wl_touch_send_frame(%struct.wl_resource* %0) {
%2 = tail call i32 @wl_resource_post_event(%struct.wl_resource* %0, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *prog) {
  fprintf(stderr, "Execute a %s task\n", "Yannkins");
  fprintf(stderr, "Usage : %s <TASK_NAME> <COMMAND>\n", prog);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
lea    0xed0(%rip),%rdx
call   1030 <fprintf@plt>
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb2(%rip),%r14
mov    (%r14),%edi
lea    0xec8(%rip),%rsi
lea    0xed4(%rip),%rdx
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xece(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"Execute a %s task\0A\00"
@.str.1 = [9 x i8] c"Yannkins\00"
@.str.2 = [34 x i8] c"Usage : %s <TASK_NAME> <COMMAND>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.2, i64 0, i64 0), i8* %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"Execute a %s task\0A\00"
@.str.1 = [9 x i8] c"Yannkins\00"
@.str.2 = [34 x i8] c"Usage : %s <TASK_NAME> <COMMAND>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.2, i64 0, i64 0), i8* %0)
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
void *fb_StrAssignEx(void *, int, void *, int, int, int);
void *fb_StrInit(void *dst, int dst_size, void *src, int src_size,
                 int fill_rem) {
  return fb_StrAssignEx(dst, dst_size, src, src_size, fill_rem, (-1));
}


x86 assembly (clang, -O0):
<fb_StrInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
mov    $0xffffffff,%r9d
call   1030 <fb_StrAssignEx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_StrInit>:
mov    $0xffffffff,%r9d
jmp    1030 <fb_StrAssignEx@plt>

LLVM IR (-O0):
define i8* @fb_StrInit(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i8* @fb_StrAssignEx(i8* %11, i32 %12, i8* %13, i32 %14, i32 %15, i32 -1)
ret i8* %16
}

LLVM IR (-O2):
define i8* @fb_StrInit(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i8* @fb_StrAssignEx(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4, i32 -1)
ret i8* %6
}
/* Type definitions */
typedef scalar_t__ wchar_t;

/* Variables and functions */
int mbtowc(wchar_t *pwc, const char *s, size_t n) {
  if (s == NULL) {
    return 0;
  } else {
    if (n < 1)
      return 0;
    if (*s == 0)
      return 0;
    if (pwc != NULL) {
      *pwc = (wchar_t)*s;
    };
    return 1;
  };
}


x86 assembly (clang, -O0):
<mbtowc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1127 <mbtowc+0x27>
movl   $0x0,-0x4(%rbp)
jmp    117b <mbtowc+0x7b>
cmpq   $0x1,-0x20(%rbp)
jae    113e <mbtowc+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    117b <mbtowc+0x7b>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    115a <mbtowc+0x5a>
movl   $0x0,-0x4(%rbp)
jmp    117b <mbtowc+0x7b>
cmpq   $0x0,-0x10(%rbp)
je     1174 <mbtowc+0x74>
mov    -0x18(%rbp),%rax
movsbq (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbtowc>:
xor    %eax,%eax
test   %rsi,%rsi
je     1122 <mbtowc+0x22>
test   %rdx,%rdx
je     1122 <mbtowc+0x22>
movsbq (%rsi),%rcx
test   %rcx,%rcx
je     1122 <mbtowc+0x22>
mov    $0x1,%eax
test   %rdi,%rdi
je     1122 <mbtowc+0x22>
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @mbtowc(i64* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i8*
%7 = alloca i64
store i64* %0, i64** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %6
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 0, i32* %4
br label %30
11: ; preds = %3
%12 = load i64, i64* %7
%13 = icmp ult i64 %12, 1
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 0, i32* %4
br label %30
15: ; preds = %11
%16 = load i8*, i8** %6
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 0, i32* %4
br label %30
21: ; preds = %15
%22 = load i64*, i64** %5
%23 = icmp ne i64* %22, null
br i1 %23, label %24, label %29
24: ; preds = %21
%25 = load i8*, i8** %6
%26 = load i8, i8* %25
%27 = sext i8 %26 to i64
%28 = load i64*, i64** %5
store i64 %27, i64* %28
br label %29
29: ; preds = %24, %21
store i32 1, i32* %4
br label %30
30: ; preds = %29, %20, %14, %10
%31 = load i32, i32* %4
ret i32 %31
}

LLVM IR (-O2):
define i32 @mbtowc(i64* writeonly %0, i8* %1, i64 %2) {
%4 = icmp eq i8* %1, null
%5 = icmp eq i64 %2, 0
%6 = or i1 %4, %5
br i1 %6, label %14, label %7
7: ; preds = %3
%8 = load i8, i8* %1
%9 = icmp eq i8 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = icmp eq i64* %0, null
br i1 %11, label %14, label %12
12: ; preds = %10
%13 = sext i8 %8 to i64
store i64 %13, i64* %0
br label %14
14: ; preds = %10, %12, %7, %3
%15 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %12 ], [ 1, %10 ]
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ x;

/* Variables and functions */
int maxProfit(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int x[] = {3, 3, 5, 0, 0, 3, 1, 4};
  printf("%d\n", maxProfit(x, sizeof(x) / sizeof(x[0])));
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec1(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
mov    $0x8,%esi
call   1040 <maxProfit@plt>
mov    %eax,%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x8,%esi
call   1040 <maxProfit@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x i32] [i32 3, i32 3, i32 5, i32 0, i32 0, i32 3, i32 1, i32 4]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [8 x i32]
store i32 0, i32* %1
%3 = bitcast [8 x i32]* %2 to i8*
%4 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%5 = call i32 @maxProfit(i32* %4, i32 8)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x i32] [i32 3, i32 3, i32 5, i32 0, i32 0, i32 3, i32 1, i32 4]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @maxProfit(i32* %3, i32 8)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x1a() {
  Assert_real((isalnum(26) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              135, ("isalnum should be 0 for 0x1a"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x1a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1a,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x87,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x1a>:
push   %rax
mov    $0x1a,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x87,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x1a\00"
define void @t_isalnum_0x1a() {
%1 = call i64 @isalnum(i32 26)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 135, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x1a\00"
define void @t_isalnum_0x1a() {
%1 = tail call i64 @isalnum(i32 26)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 135, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}