xunge/DecIR huggingface dataset:
/* Variables and functions */
int fibN(int);
int /*<<< orphan*/ printf(char *, int, int);
void printValues(int limit) {
  int i, n = 1;
  for (i = 0; i < limit; ++i) {
    printf("[%2d]: %5d\n", n, fibN(n));
    ++n;
  }
}


x86 assembly (clang, -O0):
<printValues>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    117b <printValues+0x5b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <fibN@plt>
mov    -0x10(%rbp),%esi
mov    %eax,%edx
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1139 <printValues+0x19>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printValues>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1166 <printValues+0x46>
mov    %edi,%r15d
neg    %r15d
mov    $0x1,%ebx
lea    0xec5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1030 <fibN@plt>
mov    %r14,%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1040 <printf@plt>
lea    (%r15,%rbx,1),%eax
add    $0x1,%eax
mov    %ebx,%ecx
add    $0x1,%ecx
mov    %ecx,%ebx
cmp    $0x1,%eax
jne    1140 <printValues+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"[%2d]: %5d\0A\00"
define void @printValues(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = call i32 @fibN(i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %12)
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %16
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"[%2d]: %5d\0A\00"
define void @printValues(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = tail call i32 @fibN(i32 %4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = add nuw i32 %4, 1
%8 = icmp eq i32 %4, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
/* Variables and functions */
scalar_t__ snprintf(int /*<<< orphan*/ *, int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *xmalloc(scalar_t__);
char *int_to_str(int d) {
  char *s = xmalloc(snprintf(NULL, 0, "%d", d) + 1);
  sprintf(s, "%d", d);
  return s;
}


x86 assembly (clang, -O0):
<int_to_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
lea    0xeb5(%rip),%rdx
call   1030 <snprintf@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xe92(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_str>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebp
lea    0xec3(%rip),%r14
xor    %edi,%edi
xor    %esi,%esi
mov    %r14,%rdx
mov    %ebp,%ecx
call   1030 <snprintf@plt>
lea    0x1(%rax),%rdi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1050 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i8* @int_to_str(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @snprintf(i32* null, i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @xmalloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i32, i32* %2
%10 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i8* @int_to_str(i32 %0) {
%2 = tail call i64 @snprintf(i32* null, i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @xmalloc(i64 %3)
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %4, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(void const *);
scalar_t__ strcmp(void const *, void const *);
int _p11_hash_string_equal(const void *string_one, const void *string_two) {
  assert(string_one);
  assert(string_two);
  return strcmp(string_one, string_two) == 0;
}


x86 assembly (clang, -O0):
<_p11_hash_string_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_p11_hash_string_equal>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    %r14,%rdi
call   1040 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @_p11_hash_string_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @assert(i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i64 @strcmp(i8* %9, i8* %10)
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @_p11_hash_string_equal(i8* %0, i8* %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = tail call i32 @assert(i8* %1)
%5 = tail call i64 @strcmp(i8* %0, i8* %1)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
char *RCSid() {
  return RCSid("$Id: help.c,v 1.26.2.1 2011/12/28 19:30:43 sfeam Exp $");
}


x86 assembly (clang, -O0):
<RCSid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <RCSid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCSid>:
jmp    1100 <RCSid>

LLVM IR (-O0):
@.str = [55 x i8] c"$Id: help.c,v 1.26.2.1 2011/12/28 19:30:43 sfeam Exp $\00"
define i8* @RCSid() {
%1 = call i8* (i8*, ...) bitcast (i8* ()* @RCSid to i8* (i8*, ...)*)(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @RCSid() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ CG_DrawRect(int, int, int, int, int, int /*<<< orphan*/);
int /*<<< orphan*/ GetGameStageColor();
void CG_DrawBalanceBar(int left_side) {
  CG_DrawRect(left_side, 160, 640 - left_side, 125, 2, GetGameStageColor());
}


x86 assembly (clang, -O0):
<CG_DrawBalanceBar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x280,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <GetGameStageColor@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    %eax,%r9d
mov    $0xa0,%esi
mov    $0x7d,%ecx
mov    $0x2,%r8d
call   1040 <CG_DrawRect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_DrawBalanceBar>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x280,%ebp
sub    %edi,%ebp
xor    %eax,%eax
call   1030 <GetGameStageColor@plt>
mov    %ebx,%edi
mov    $0xa0,%esi
mov    %ebp,%edx
mov    $0x7d,%ecx
mov    $0x2,%r8d
mov    %eax,%r9d
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <CG_DrawRect@plt>

LLVM IR (-O0):
define void @CG_DrawBalanceBar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 640, %4
%6 = call i32 (...) @GetGameStageColor()
%7 = call i32 @CG_DrawRect(i32 %3, i32 160, i32 %5, i32 125, i32 2, i32 %6)
ret void
}

LLVM IR (-O2):
define void @CG_DrawBalanceBar(i32 %0) {
%2 = sub nsw i32 640, %0
%3 = tail call i32 (...) @GetGameStageColor()
%4 = tail call i32 @CG_DrawRect(i32 %0, i32 160, i32 %2, i32 125, i32 2, i32 %3)
ret void
}
int dotddot(char *p) {
  if (!*p)
    return 0;
  if (*p++ != '.')
    return 0;
  if (!*p)
    return 1;
  if (*p++ != '.')
    return 0;
  if (!*p)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<dotddot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1121 <dotddot+0x21>
movl   $0x0,-0x4(%rbp)
jmp    11a8 <dotddot+0xa8>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x2e,%eax
je     1148 <dotddot+0x48>
movl   $0x0,-0x4(%rbp)
jmp    11a8 <dotddot+0xa8>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1161 <dotddot+0x61>
movl   $0x1,-0x4(%rbp)
jmp    11a8 <dotddot+0xa8>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x2e,%eax
je     1188 <dotddot+0x88>
movl   $0x0,-0x4(%rbp)
jmp    11a8 <dotddot+0xa8>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    11a1 <dotddot+0xa1>
movl   $0x1,-0x4(%rbp)
jmp    11a8 <dotddot+0xa8>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dotddot>:
xor    %eax,%eax
cmpb   $0x2e,(%rdi)
jne    111c <dotddot+0x1c>
mov    0x1(%rdi),%cl
test   %cl,%cl
je     111d <dotddot+0x1d>
cmp    $0x2e,%cl
jne    111c <dotddot+0x1c>
xor    %eax,%eax
cmpb   $0x0,0x2(%rdi)
sete   %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @dotddot(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %33
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 46
br i1 %13, label %14, label %15
14: ; preds = %8
store i32 0, i32* %2
br label %33
15: ; preds = %8
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = icmp ne i8 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %15
store i32 1, i32* %2
br label %33
20: ; preds = %15
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8, i8* %21
%24 = sext i8 %23 to i32
%25 = icmp ne i32 %24, 46
br i1 %25, label %26, label %27
26: ; preds = %20
store i32 0, i32* %2
br label %33
27: ; preds = %20
%28 = load i8*, i8** %3
%29 = load i8, i8* %28
%30 = icmp ne i8 %29, 0
br i1 %30, label %32, label %31
31: ; preds = %27
store i32 1, i32* %2
br label %33
32: ; preds = %27
store i32 0, i32* %2
br label %33
33: ; preds = %32, %31, %26, %19, %14, %7
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @dotddot(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 46
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
switch i8 %6, label %7 [
i8 0, label %13
i8 46, label %8
]
7: ; preds = %4
br label %13
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %1, %8, %4, %7
%14 = phi i32 [ 0, %7 ], [ 0, %1 ], [ 1, %4 ], [ %12, %8 ]
ret i32 %14
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked) {
  ;
  if (bMasked) {
    return (((*((volatile unsigned long *)(ui32Base + 0x00000018)))) ? 1 : 0);
  } else {
    return (((*((volatile unsigned long *)(ui32Base + 0x00000014)))) ? 1 : 0);
  }
}


x86 assembly (clang, -O0):
<I2CMasterIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1133 <I2CMasterIntStatus+0x33>
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    114c <I2CMasterIntStatus+0x4c>
mov    -0x10(%rbp),%rax
mov    0x14(%rax),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterIntStatus>:
xor    %ecx,%ecx
test   %esi,%esi
setne  %cl
xor    %eax,%eax
cmpq   $0x0,0x14(%rdi,%rcx,4)
setne  %al
ret

LLVM IR (-O0):
define i32 @I2CMasterIntStatus(i64 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i64, i64* %4
%10 = add nsw i64 %9, 24
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = icmp ne i64 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 1, i32 0
store i32 %15, i32* %3
br label %24
16: ; preds = %2
%17 = load i64, i64* %4
%18 = add nsw i64 %17, 20
%19 = inttoptr i64 %18 to i64*
%20 = load volatile i64, i64* %19
%21 = icmp ne i64 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 1, i32 0
store i32 %23, i32* %3
br label %24
24: ; preds = %16, %8
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @I2CMasterIntStatus(i64 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i64 20, i64 24
%5 = add nsw i64 %4, %0
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ print_character(char);
void bin_dword(unsigned int word) {
  for (int i = 32; i > 0; i--) {
    if (word & 0x80000000)
      print_character('1');
    else
      print_character('0');
    word <<= 1;
  }
}


x86 assembly (clang, -O0):
<bin_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x20,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    116d <bin_dword+0x5d>
mov    -0x4(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     114c <bin_dword+0x3c>
mov    $0x31,%edi
call   1030 <print_character@plt>
jmp    1156 <bin_dword+0x46>
mov    $0x30,%edi
call   1030 <print_character@plt>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <bin_dword+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bin_dword>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x21,%ebp
nopw   0x0(%rax,%rax,1)
mov    %ebx,%edi
shr    $0x1f,%edi
or     $0x30,%edi
call   1030 <print_character@plt>
add    %ebx,%ebx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1120 <bin_dword+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @bin_dword(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 32, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, -2147483648
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = call i32 @print_character(i8 signext 49)
br label %15
13: ; preds = %7
%14 = call i32 @print_character(i8 signext 48)
br label %15
15: ; preds = %13, %11
%16 = load i32, i32* %2
%17 = shl i32 %16, 1
store i32 %17, i32* %2
br label %18
18: ; preds = %15
%19 = load i32, i32* %3
%20 = add nsw i32 %19, -1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @bin_dword(i32 %0) {
br label %3
2: ; preds = %3
ret void
3: ; preds = %1, %3
%4 = phi i32 [ 32, %1 ], [ %10, %3 ]
%5 = phi i32 [ %0, %1 ], [ %9, %3 ]
%6 = icmp sgt i32 %5, -1
%7 = select i1 %6, i8 48, i8 49
%8 = tail call i32 @print_character(i8 signext %7)
%9 = shl i32 %5, 1
%10 = add nsw i32 %4, -1
%11 = icmp ugt i32 %4, 1
br i1 %11, label %3, label %2
}
void hash_table_get() {}


x86 assembly (clang, -O0):
<hash_table_get>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_table_get>:
ret

LLVM IR (-O0):
define void @hash_table_get() {
ret void
}

LLVM IR (-O2):
define void @hash_table_get() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ smsc911x_disable_promiscuous_reception();
void disablePromiscuousReception(void) {
  smsc911x_disable_promiscuous_reception();
}


x86 assembly (clang, -O0):
<disablePromiscuousReception>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <smsc911x_disable_promiscuous_reception@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<disablePromiscuousReception>:
xor    %eax,%eax
jmp    1030 <smsc911x_disable_promiscuous_reception@plt>

LLVM IR (-O0):
define void @disablePromiscuousReception() {
%1 = call i32 (...) @smsc911x_disable_promiscuous_reception()
ret void
}

LLVM IR (-O2):
define void @disablePromiscuousReception() {
%1 = tail call i32 (...) @smsc911x_disable_promiscuous_reception()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, char *);
void function_auname(char *auname) {
  write("json-task.json", "\"username\":\"%s\",", auname);
}


x86 assembly (clang, -O0):
<function_auname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_auname>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [17 x i8] c"\22username\22:\22%s\22,\00"
define void @function_auname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [17 x i8] c"\22username\22:\22%s\22,\00"
define void @function_auname(i8* %0) {
%2 = tail call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mmask_t;

/* Variables and functions */
int settings_run(int key, mmask_t btn, int row, int col) { return 0; }


x86 assembly (clang, -O0):
<settings_run>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<settings_run>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @settings_run(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @settings_run(i32 %0, i32 %1, i32 %2, i32 %3) {
ret i32 0
}
/* Variables and functions */
unsigned long getpagesize();
void *pageAlignStart(void *startAddr) {
  unsigned long pageSize = getpagesize();
  unsigned long pageRnd = pageSize - 1;
  unsigned long pageMask = ~pageRnd;
  unsigned long addr = (unsigned long)startAddr;
  return (void *)(addr & pageMask);
}


x86 assembly (clang, -O0):
<pageAlignStart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpagesize@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
and    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pageAlignStart>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getpagesize@plt>
neg    %rax
and    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @pageAlignStart(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %2
%7 = call i64 (...) @getpagesize()
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = sub i64 %8, 1
store i64 %9, i64* %4
%10 = load i64, i64* %4
%11 = xor i64 %10, -1
store i64 %11, i64* %5
%12 = load i8*, i8** %2
%13 = ptrtoint i8* %12 to i64
store i64 %13, i64* %6
%14 = load i64, i64* %6
%15 = load i64, i64* %5
%16 = and i64 %14, %15
%17 = inttoptr i64 %16 to i8*
ret i8* %17
}

LLVM IR (-O2):
define i8* @pageAlignStart(i8* %0) {
%2 = tail call i64 (...) @getpagesize()
%3 = sub i64 0, %2
%4 = ptrtoint i8* %0 to i64
%5 = and i64 %3, %4
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ DynamicStrings_PushAllocation();
void doDSdbEnter(void) { DynamicStrings_PushAllocation(); }


x86 assembly (clang, -O0):
<doDSdbEnter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DynamicStrings_PushAllocation@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doDSdbEnter>:
xor    %eax,%eax
jmp    1030 <DynamicStrings_PushAllocation@plt>

LLVM IR (-O0):
define void @doDSdbEnter() {
%1 = call i32 (...) @DynamicStrings_PushAllocation()
ret void
}

LLVM IR (-O2):
define void @doDSdbEnter() {
%1 = tail call i32 (...) @DynamicStrings_PushAllocation()
ret void
}
/* Variables and functions */
double strtod(char *, char **);
double csv_float_parse(const char **ppos) {
  return strtod((char *)*ppos, (char **)ppos);
}


x86 assembly (clang, -O0):
<csv_float_parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<csv_float_parse>:
mov    %rdi,%rsi
mov    (%rdi),%rdi
jmp    1030 <strtod@plt>

LLVM IR (-O0):
define double @csv_float_parse(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = load i8**, i8*** %2
%6 = call double @strtod(i8* %4, i8** %5)
ret double %6
}

LLVM IR (-O2):
define double @csv_float_parse(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call double @strtod(i8* %2, i8** %0)
ret double %3
}
/* Variables and functions */
double acos(double);
double __dacosd(double x) { return (acos(x) * 57.29577951308232); }


x86 assembly (clang, -O0):
<__dacosd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <acos@plt>
movsd  0xed1(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dacosd>:
push   %rax
call   1030 <acos@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @__dacosd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @acos(double %3)
%5 = fmul double %4, 0x404CA5DC1A63C1F8
ret double %5
}

LLVM IR (-O2):
define double @__dacosd(double %0) {
%2 = tail call double @acos(double %0)
%3 = fmul double %2, 0x404CA5DC1A63C1F8
ret double %3
}
unsigned char fcn2(unsigned char toRot, unsigned char numToRot) {
  unsigned char toRet;
  if (numToRot > 8) {
    toRet = toRot;
  } else
    toRot = toRot << numToRot | toRot >> (8 - numToRot);
  return toRot;
}


x86 assembly (clang, -O0):
<fcn2>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x8,%eax
jle    1128 <fcn2+0x28>
mov    -0x1(%rbp),%al
mov    %al,-0x3(%rbp)
jmp    114a <fcn2+0x4a>
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
movzbl -0x2(%rbp),%esi
mov    $0x8,%ecx
sub    %esi,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcn2>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%al
cmp    $0x9,%cl
movzbl %al,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @fcn2(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
%8 = icmp sgt i32 %7, 8
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i8, i8* %3
store i8 %10, i8* %5
br label %25
11: ; preds = %2
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = load i8, i8* %4
%15 = zext i8 %14 to i32
%16 = shl i32 %13, %15
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = sub nsw i32 8, %20
%22 = ashr i32 %18, %21
%23 = or i32 %16, %22
%24 = trunc i32 %23 to i8
store i8 %24, i8* %3
br label %25
25: ; preds = %11, %9
%26 = load i8, i8* %3
ret i8 %26
}

LLVM IR (-O2):
define zeroext i8 @fcn2(i8 zeroext %0, i8 zeroext %1) {
%3 = icmp ugt i8 %1, 8
%4 = tail call i8 @llvm.fshl.i8(i8 %0, i8 %0, i8 %1)
%5 = select i1 %3, i8 %0, i8 %4
ret i8 %5
}
void lapic_timer_swi(void) {
  __asm__ __volatile__("int %0" ::"i"(0xD0 + 0xD) : "memory");
}


x86 assembly (clang, -O0):
<lapic_timer_swi>:
push   %rbp
mov    %rsp,%rbp
int    $0xdd
pop    %rbp
ret

x86 assembly (clang, -O2):
<lapic_timer_swi>:
int    $0xdd
ret

LLVM IR (-O0):
define void @lapic_timer_swi() {
ret void
}

LLVM IR (-O2):
define void @lapic_timer_swi() {
tail call void asm sideeffect "int $0", "i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 221)
ret void
}
int noargs() { return 42; }


x86 assembly (clang, -O0):
<noargs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<noargs>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @noargs() {
ret i32 42
}

LLVM IR (-O2):
define i32 @noargs() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ slrgb(double);
double sqrt(int /*<<< orphan*/);
double ssqrgb(double s) { return sqrt(slrgb(s)); }


x86 assembly (clang, -O0):
<ssqrgb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <slrgb@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssqrgb>:
push   %rax
call   1030 <slrgb@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @ssqrgb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @slrgb(double %3)
%5 = call double @sqrt(i32 %4)
ret double %5
}

LLVM IR (-O2):
define double @ssqrgb(double %0) {
%2 = tail call i32 @slrgb(double %0)
%3 = tail call double @sqrt(i32 %2)
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ stdout;
int vfwprintf(int /*<<< orphan*/, int /*<<< orphan*/ const *,
              int /*<<< orphan*/);
int vwprintf(const wchar_t *restrict fmt, va_list ap) {
  return vfwprintf(stdout, fmt, ap);
}


x86 assembly (clang, -O0):
<vwprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <vfwprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwprintf>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <vfwprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @vwprintf(i32* noalias %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stdout
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = call i32 @vfwprintf(i32 %5, i32* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @vwprintf(i32* noalias %0, i32 %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @vfwprintf(i32 %3, i32* %0, i32 %1)
ret i32 %4
}
void set_led(char l) {}


x86 assembly (clang, -O0):
<set_led>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_led>:
ret

LLVM IR (-O0):
define void @set_led(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @set_led(i8 signext %0) {
ret void
}
/* Variables and functions */
int _irc_client_message(char *, char *, char *, char *);
int irc_notice(char *target, char *text) {
  return _irc_client_message(target, "NOTICE", "%s", text);
}


x86 assembly (clang, -O0):
<irc_notice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
lea    0xed1(%rip),%rsi
lea    0xed1(%rip),%rdx
call   1030 <_irc_client_message@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_notice>:
mov    %rsi,%rcx
lea    0xee6(%rip),%rsi
lea    0xee6(%rip),%rdx
jmp    1030 <_irc_client_message@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"NOTICE\00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @irc_notice(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @_irc_client_message(i8* %5, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [7 x i8] c"NOTICE\00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @irc_notice(i8* %0, i8* %1) {
%3 = tail call i32 @_irc_client_message(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret i32 %3
}
/* Variables and functions */
unsigned int strlen(const char *str) {
  const char *strStart = str;
  while (*(str) != '\0') {
    ++str;
  }
  return str - strStart;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1131 <strlen+0x31>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %5
13: ; preds = %5
%14 = load i8*, i8** %2
%15 = load i8*, i8** %3
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
%19 = trunc i64 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @strlen(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = ptrtoint i8* %3 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i32
ret i32 %11
}
/* Variables and functions */
scalar_t__ FLT_EVAL_METHOD;
int FLT_ROUNDS;
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ main2();
int main(int argc, const char *argv[]) {
  assert(FLT_EVAL_METHOD == 0);
  assert(FLT_ROUNDS == 1);
  main2();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea2(%rip),%rax
cmpq   $0x0,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    0x2e9a(%rip),%rax
cmpl   $0x1,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x0,%al
call   1040 <main2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2eb0(%rip),%rax
xor    %edi,%edi
cmpq   $0x0,(%rax)
sete   %dil
call   1030 <assert@plt>
mov    0x2eaa(%rip),%rax
xor    %edi,%edi
cmpl   $0x1,(%rax)
sete   %dil
call   1030 <assert@plt>
xor    %eax,%eax
call   1040 <main2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@FLT_EVAL_METHOD = global i64 0
@FLT_ROUNDS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i64, i64* @FLT_EVAL_METHOD
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* @FLT_ROUNDS
%10 = icmp eq i32 %9, 1
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = call i32 (...) @main2()
ret i32 0
}

LLVM IR (-O2):
@FLT_EVAL_METHOD = global i64 0
@FLT_ROUNDS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i64, i64* @FLT_EVAL_METHOD
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = load i32, i32* @FLT_ROUNDS
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
%11 = tail call i32 (...) @main2()
ret i32 0
}
/* Type definitions */
struct timespec {
  double tv_sec;
  int tv_nsec;
};

/* Variables and functions */
double modf(double, double *);
struct timespec double_to_ts(double n) {
  double i, f;
  struct timespec r;
  f = modf(n, &i);
  r.tv_sec = i;
  r.tv_nsec = 1000000000 * f;
  return r;
}


x86 assembly (clang, -O0):
<double_to_ts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
lea    -0x20(%rbp),%rdi
call   1030 <modf@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_ts>:
push   %rax
mov    %rsp,%rdi
call   1030 <modf@plt>
movsd  (%rsp),%xmm1
mulsd  0xeda(%rip),%xmm0
cvttsd2si %xmm0,%eax
movaps %xmm1,%xmm0
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { double, i32 }
define { double, i32 } @double_to_ts(double %0) {
%2 = alloca %struct.timespec
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
%6 = load double, double* %3
%7 = call double @modf(double %6, double* %4)
store double %7, double* %5
%8 = load double, double* %4
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 0
store double %8, double* %9
%10 = load double, double* %5
%11 = fmul double 1.000000e+09, %10
%12 = fptosi double %11 to i32
%13 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 1
store i32 %12, i32* %13
%14 = bitcast %struct.timespec* %2 to { double, i32 }*
%15 = load { double, i32 }, { double, i32 }* %14
ret { double, i32 } %15
}

LLVM IR (-O2):
define { double, i32 } @double_to_ts(double %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
%4 = call double @modf(double %0, double* %2)
%5 = load double, double* %2
%6 = fmul double %4, 1.000000e+09
%7 = fptosi double %6 to i32
%8 = insertvalue { double, i32 } poison, double %5, 0
%9 = insertvalue { double, i32 } %8, i32 %7, 1
ret { double, i32 } %9
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
size_t strlen(char *);
void strcpy_strlen_Good() {
  char src[5] = "test";
  char dst[10];
  strcpy(dst, src);
  int a[5];
  a[strlen(dst)] = 0;
}


x86 assembly (clang, -O0):
<strcpy_strlen_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x5(%rbp)
mov    0xecd(%rip),%al
mov    %al,-0x1(%rbp)
lea    -0xf(%rbp),%rdi
lea    -0x5(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0xf(%rbp),%rdi
call   1040 <strlen@plt>
movl   $0x0,-0x30(%rbp,%rax,4)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy_strlen_Good>:
sub    $0x18,%rsp
movb   $0x0,0xc(%rsp)
movl   $0x74736574,0x8(%rsp)
74
lea    0xe(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <strcpy@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.strcpy_strlen_Good.src = [5 x i8] c"test\00"
define void @strcpy_strlen_Good() {
%1 = alloca [5 x i8]
%2 = alloca [10 x i8]
%3 = alloca [5 x i32]
%4 = bitcast [5 x i8]* %1 to i8*
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%6 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%9 = call i64 @strlen(i8* %8)
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 %9
store i32 0, i32* %10
ret void
}

LLVM IR (-O2):
@__const.strcpy_strlen_Good.src = [5 x i8] c"test\00"
define void @strcpy_strlen_Good() {
%1 = alloca [5 x i8]
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* %3)
ret void
}
/* Variables and functions */
double asin(double);
int /*<<< orphan*/ corrected_mean_ecliptic_obliquity(double);
double sin(int /*<<< orphan*/);
int /*<<< orphan*/ sun_apparent_longitude(double);
double solar_declination(double tm) {
  double rc = sin(corrected_mean_ecliptic_obliquity(tm));
  return asin(rc * sin(sun_apparent_longitude(tm)));
}


x86 assembly (clang, -O0):
<solar_declination>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <corrected_mean_ecliptic_obliquity@plt>
mov    %eax,%edi
call   1030 <sin@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1060 <sun_apparent_longitude@plt>
mov    %eax,%edi
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
call   1050 <asin@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solar_declination>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <corrected_mean_ecliptic_obliquity@plt>
mov    %eax,%edi
call   1030 <sin@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1060 <sun_apparent_longitude@plt>
mov    %eax,%edi
call   1030 <sin@plt>
mulsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
jmp    1050 <asin@plt>

LLVM IR (-O0):
define double @solar_declination(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call i32 @corrected_mean_ecliptic_obliquity(double %4)
%6 = call double @sin(i32 %5)
store double %6, double* %3
%7 = load double, double* %3
%8 = load double, double* %2
%9 = call i32 @sun_apparent_longitude(double %8)
%10 = call double @sin(i32 %9)
%11 = fmul double %7, %10
%12 = call double @asin(double %11)
ret double %12
}

LLVM IR (-O2):
define double @solar_declination(double %0) {
%2 = tail call i32 @corrected_mean_ecliptic_obliquity(double %0)
%3 = tail call double @sin(i32 %2)
%4 = tail call i32 @sun_apparent_longitude(double %0)
%5 = tail call double @sin(i32 %4)
%6 = fmul double %3, %5
%7 = tail call double @asin(double %6)
ret double %7
}
long long int power(long long int b, long long int e) {
  long long int a = 1;
  long long int i;
  for (i = 0; i < e; i++) {
    a *= 5;
  }
  return a;
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1144 <power+0x44>
imul   $0x5,-0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111c <power+0x1c>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
test   %rsi,%rsi
jle    111b <power+0x1b>
lea    -0x1(%rsi),%rax
mov    %esi,%ecx
and    $0x7,%ecx
cmp    $0x7,%rax
jae    1121 <power+0x21>
mov    $0x1,%eax
jmp    113d <power+0x3d>
mov    $0x1,%eax
ret
and    $0xfffffffffffffff8,%rsi
mov    $0x1,%eax
nopw   0x0(%rax,%rax,1)
imul   $0x5f5e1,%rax,%rax
add    $0xfffffffffffffff8,%rsi
jne    1130 <power+0x30>
test   %rcx,%rcx
je     115a <power+0x5a>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    (%rax,%rax,4),%rax
add    $0xffffffffffffffff,%rcx
jne    1150 <power+0x50>
ret

LLVM IR (-O0):
define i64 @power(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %14, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %4
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i64, i64* %5
%13 = mul nsw i64 %12, 5
store i64 %13, i64* %5
br label %14
14: ; preds = %11
%15 = load i64, i64* %6
%16 = add nsw i64 %15, 1
store i64 %16, i64* %6
br label %7
17: ; preds = %7
%18 = load i64, i64* %5
ret i64 %18
}

LLVM IR (-O2):
define i64 @power(i64 %0, i64 %1) {
%3 = icmp sgt i64 %1, 0
br i1 %3, label %4, label %26
4: ; preds = %2
%5 = add i64 %1, -1
%6 = and i64 %1, 7
%7 = icmp ult i64 %5, 7
br i1 %7, label %16, label %8
8: ; preds = %4
%9 = and i64 %1, -8
br label %10
10: ; preds = %10, %8
%11 = phi i64 [ 1, %8 ], [ %13, %10 ]
%12 = phi i64 [ 0, %8 ], [ %14, %10 ]
%13 = mul i64 %11, 390625
%14 = add i64 %12, 8
%15 = icmp eq i64 %14, %9
br i1 %15, label %16, label %10
16: ; preds = %10, %4
%17 = phi i64 [ undef, %4 ], [ %13, %10 ]
%18 = phi i64 [ 1, %4 ], [ %13, %10 ]
%19 = icmp eq i64 %6, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %20
%21 = phi i64 [ %23, %20 ], [ %18, %16 ]
%22 = phi i64 [ %24, %20 ], [ 0, %16 ]
%23 = mul nsw i64 %21, 5
%24 = add i64 %22, 1
%25 = icmp eq i64 %24, %6
br i1 %25, label %26, label %20
26: ; preds = %16, %20, %2
%27 = phi i64 [ 1, %2 ], [ %17, %16 ], [ %23, %20 ]
ret i64 %27
}
/* Type definitions */
struct vec4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec4_normalize(float *, float *);
__attribute__((always_)) struct vec4 *psvec4_normalize(struct vec4 *result,
                                                       struct vec4 *a) {
  vec4_normalize((float *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec4_normalize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec4_normalize@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4_normalize>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4_normalize@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_normalize(%struct.vec4* %0, %struct.vec4* %1) {
%3 = alloca %struct.vec4*
%4 = alloca %struct.vec4*
store %struct.vec4* %0, %struct.vec4** %3
store %struct.vec4* %1, %struct.vec4** %4
%5 = load %struct.vec4*, %struct.vec4** %3
%6 = bitcast %struct.vec4* %5 to float*
%7 = load %struct.vec4*, %struct.vec4** %4
%8 = bitcast %struct.vec4* %7 to float*
%9 = call i32 @vec4_normalize(float* %6, float* %8)
%10 = load %struct.vec4*, %struct.vec4** %3
ret %struct.vec4* %10
}

LLVM IR (-O2):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_normalize(%struct.vec4* returned %0, %struct.vec4* %1) {
%3 = bitcast %struct.vec4* %0 to float*
%4 = bitcast %struct.vec4* %1 to float*
%5 = tail call i32 @vec4_normalize(float* %3, float* %4)
ret %struct.vec4* %0
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_addr;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int inet_pton(int /*<<< orphan*/, char const *, int /*<<< orphan*/ *);
int is_valid_ip_address(const char *ip_address) {
  struct sockaddr_in sa;
  int result = inet_pton(AF_INET, ip_address, &(sa.sin_addr));
  return result;
}


x86 assembly (clang, -O0):
<is_valid_ip_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <inet_pton@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_ip_address>:
push   %rax
mov    %rdi,%rsi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
call   1030 <inet_pton@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
define i32 @is_valid_ip_address(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.sockaddr_in
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i32, i32* @AF_INET
%6 = load i8*, i8** %2
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
%8 = call i32 @inet_pton(i32 %5, i8* %6, i32* %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
define i32 @is_valid_ip_address(i8* %0) {
%2 = alloca %struct.sockaddr_in
%3 = bitcast %struct.sockaddr_in* %2 to i8*
%4 = load i32, i32* @AF_INET
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0
%6 = call i32 @inet_pton(i32 %4, i8* %0, i32* %5)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t be16_to_cpu(uint16_t be_val) { return be_val; }


x86 assembly (clang, -O0):
<be16_to_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<be16_to_cpu>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @be16_to_cpu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @be16_to_cpu(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void __sulong_dispose_context() { exit(0); }


x86 assembly (clang, -O0):
<__sulong_dispose_context>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<__sulong_dispose_context>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @__sulong_dispose_context() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @__sulong_dispose_context() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
int peer_addnew(struct peer_s *peer) { return -1; }


x86 assembly (clang, -O0):
<peer_addnew>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<peer_addnew>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.peer_s = type opaque
define i32 @peer_addnew(%struct.peer_s* %0) {
%2 = alloca %struct.peer_s*
store %struct.peer_s* %0, %struct.peer_s** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.peer_s = type opaque
define i32 @peer_addnew(%struct.peer_s* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Starting Wick assembler.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Starting Wick assembler.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Starting Wick assembler.\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void SUPC_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<SUPC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <SUPC_IRQHandler+0x9>
jmp    1109 <SUPC_IRQHandler+0x9>

x86 assembly (clang, -O2):
<SUPC_IRQHandler>:
jmp    1100 <SUPC_IRQHandler>

LLVM IR (-O0):
define void @SUPC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @SUPC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}