#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
long long scm_page_col(long long);
long long scm_page_index(long long, long long, long long, long long);
long long scm_page_level(long long);
long long scm_page_root(long long);
long long scm_page_row(long long);
long long scm_page_south(long long i) {
  long long l = scm_page_level(i);
  long long f = scm_page_root(i);
  long long r = scm_page_row(i);
  long long c = scm_page_col(i);
  long long n = 1LL << l, m = n - 1, t = m - c;
  if (r < m) {
    r = r + 1;
  } else if (f == 0) {
    f = 3;
    r = c;
    c = m;
  } else if (f == 1) {
    f = 3;
    r = t;
    c = 0;
  } else if (f == 2) {
    f = 4;
    r = 0;
  } else if (f == 3) {
    f = 5;
    r = m;
    c = t;
  } else if (f == 4) {
    f = 3;
    r = 0;
  } else {
    f = 3;
    r = m;
    c = t;
  }
  return scm_page_index(f, l, r, c);
}


x86 assembly (clang, -O0):
<scm_page_south>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <scm_page_level@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <scm_page_root@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <scm_page_row@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1070 <scm_page_col@plt>
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
sub    -0x28(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x38(%rbp),%rax
jge    11d7 <scm_page_south+0x87>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    12c0 <scm_page_south+0x170>
cmpq   $0x0,-0x18(%rbp)
jne    11ff <scm_page_south+0xaf>
movq   $0x3,-0x18(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x38(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    12bb <scm_page_south+0x16b>
cmpq   $0x1,-0x18(%rbp)
jne    1227 <scm_page_south+0xd7>
movq   $0x3,-0x18(%rbp)
mov    -0x40(%rbp),%rax
mov    %rax,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
jmp    12b6 <scm_page_south+0x166>
cmpq   $0x2,-0x18(%rbp)
jne    1247 <scm_page_south+0xf7>
movq   $0x4,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
jmp    12b1 <scm_page_south+0x161>
cmpq   $0x3,-0x18(%rbp)
jne    126f <scm_page_south+0x11f>
movq   $0x5,-0x18(%rbp)
mov    -0x38(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x40(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    12ac <scm_page_south+0x15c>
cmpq   $0x4,-0x18(%rbp)
jne    128f <scm_page_south+0x13f>
movq   $0x3,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
jmp    12a7 <scm_page_south+0x157>
movq   $0x3,-0x18(%rbp)
mov    -0x38(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x40(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    12ac <scm_page_south+0x15c>
jmp    12b1 <scm_page_south+0x161>
jmp    12b6 <scm_page_south+0x166>
jmp    12bb <scm_page_south+0x16b>
jmp    12c0 <scm_page_south+0x170>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
call   1040 <scm_page_index@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scm_page_south>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1050 <scm_page_level@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <scm_page_root@plt>
mov    %rax,%r15
mov    %rbx,%rdi
call   1060 <scm_page_row@plt>
mov    %rax,%r12
mov    %rbx,%rdi
call   1070 <scm_page_col@plt>
mov    $0xffffffffffffffff,%rdx
mov    %r14d,%ecx
shl    %cl,%rdx
not    %rdx
cmp    %rdx,%r12
jge    11a5 <scm_page_south+0x55>
add    $0x1,%r12
mov    %rax,%rcx
mov    %r12,%rax
mov    %r15,%rdi
jmp    11e7 <scm_page_south+0x97>
mov    %rdx,%rsi
sub    %rax,%rsi
mov    $0x3,%edi
cmp    $0x4,%r15
ja     11e1 <scm_page_south+0x91>
lea    0xe43(%rip),%rcx
movslq (%rcx,%r15,4),%rbx
add    %rcx,%rbx
mov    %rdx,%rcx
jmp    *%rbx
xor    %ecx,%ecx
mov    %rsi,%rax
jmp    11e7 <scm_page_south+0x97>
mov    $0x4,%edi
mov    %rax,%rcx
xor    %eax,%eax
jmp    11e7 <scm_page_south+0x97>
mov    $0x5,%edi
mov    %rsi,%rcx
mov    %rdx,%rax
mov    %r14,%rsi
mov    %rax,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <scm_page_index@plt>

LLVM IR (-O0):
define i64 @scm_page_south(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i64 %0, i64* %2
%10 = load i64, i64* %2
%11 = call i64 @scm_page_level(i64 %10)
store i64 %11, i64* %3
%12 = load i64, i64* %2
%13 = call i64 @scm_page_root(i64 %12)
store i64 %13, i64* %4
%14 = load i64, i64* %2
%15 = call i64 @scm_page_row(i64 %14)
store i64 %15, i64* %5
%16 = load i64, i64* %2
%17 = call i64 @scm_page_col(i64 %16)
store i64 %17, i64* %6
%18 = load i64, i64* %3
%19 = shl i64 1, %18
store i64 %19, i64* %7
%20 = load i64, i64* %7
%21 = sub nsw i64 %20, 1
store i64 %21, i64* %8
%22 = load i64, i64* %8
%23 = load i64, i64* %6
%24 = sub nsw i64 %22, %23
store i64 %24, i64* %9
%25 = load i64, i64* %5
%26 = load i64, i64* %8
%27 = icmp slt i64 %25, %26
br i1 %27, label %28, label %31
28: ; preds = %1
%29 = load i64, i64* %5
%30 = add nsw i64 %29, 1
store i64 %30, i64* %5
br label %64
31: ; preds = %1
%32 = load i64, i64* %4
%33 = icmp eq i64 %32, 0
br i1 %33, label %34, label %37
34: ; preds = %31
store i64 3, i64* %4
%35 = load i64, i64* %6
store i64 %35, i64* %5
%36 = load i64, i64* %8
store i64 %36, i64* %6
br label %63
37: ; preds = %31
%38 = load i64, i64* %4
%39 = icmp eq i64 %38, 1
br i1 %39, label %40, label %42
40: ; preds = %37
store i64 3, i64* %4
%41 = load i64, i64* %9
store i64 %41, i64* %5
store i64 0, i64* %6
br label %62
42: ; preds = %37
%43 = load i64, i64* %4
%44 = icmp eq i64 %43, 2
br i1 %44, label %45, label %46
45: ; preds = %42
store i64 4, i64* %4
store i64 0, i64* %5
br label %61
46: ; preds = %42
%47 = load i64, i64* %4
%48 = icmp eq i64 %47, 3
br i1 %48, label %49, label %52
49: ; preds = %46
store i64 5, i64* %4
%50 = load i64, i64* %8
store i64 %50, i64* %5
%51 = load i64, i64* %9
store i64 %51, i64* %6
br label %60
52: ; preds = %46
%53 = load i64, i64* %4
%54 = icmp eq i64 %53, 4
br i1 %54, label %55, label %56
55: ; preds = %52
store i64 3, i64* %4
store i64 0, i64* %5
br label %59
56: ; preds = %52
store i64 3, i64* %4
%57 = load i64, i64* %8
store i64 %57, i64* %5
%58 = load i64, i64* %9
store i64 %58, i64* %6
br label %59
59: ; preds = %56, %55
br label %60
60: ; preds = %59, %49
br label %61
61: ; preds = %60, %45
br label %62
62: ; preds = %61, %40
br label %63
63: ; preds = %62, %34
br label %64
64: ; preds = %63, %28
%65 = load i64, i64* %4
%66 = load i64, i64* %3
%67 = load i64, i64* %5
%68 = load i64, i64* %6
%69 = call i64 @scm_page_index(i64 %65, i64 %66, i64 %67, i64 %68)
ret i64 %69
}

LLVM IR (-O2):
define i64 @scm_page_south(i64 %0) {
%2 = tail call i64 @scm_page_level(i64 %0)
%3 = tail call i64 @scm_page_root(i64 %0)
%4 = tail call i64 @scm_page_row(i64 %0)
%5 = tail call i64 @scm_page_col(i64 %0)
%6 = shl nsw i64 -1, %2
%7 = xor i64 %6, -1
%8 = sub nsw i64 %7, %5
%9 = icmp slt i64 %4, %7
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = add nsw i64 %4, 1
br label %18
12: ; preds = %1
switch i64 %3, label %17 [
i64 0, label %18
i64 1, label %13
i64 2, label %14
i64 3, label %15
i64 4, label %16
]
13: ; preds = %12
br label %18
14: ; preds = %12
br label %18
15: ; preds = %12
br label %18
16: ; preds = %12
br label %18
17: ; preds = %12
br label %18
18: ; preds = %12, %14, %16, %17, %15, %13, %10
%19 = phi i64 [ %5, %10 ], [ 0, %13 ], [ %5, %14 ], [ %8, %15 ], [ %5, %16 ], [ %8, %17 ], [ %7, %12 ]
%20 = phi i64 [ %11, %10 ], [ %8, %13 ], [ 0, %14 ], [ %7, %15 ], [ 0, %16 ], [ %7, %17 ], [ %5, %12 ]
%21 = phi i64 [ %3, %10 ], [ 3, %13 ], [ 4, %14 ], [ 5, %15 ], [ 3, %16 ], [ 3, %17 ], [ 3, %12 ]
%22 = tail call i64 @scm_page_index(i64 %21, i64 %2, i64 %20, i64 %19)
ret i64 %22
}