#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void QEIConfigure(unsigned long ulBase, unsigned long ulConfig,
                  unsigned long ulMaxPosition) {
  DEBUG_ASSERT((ulBase == 0x4002C000) || (ulBase == 0x4002D000));
  (*((volatile unsigned long *)(ulBase + 0x00000000))) =
      (((*((volatile unsigned long *)(ulBase + 0x00000000))) &
        ~(0x00000008 | 0x00000010 | 0x00000004 | 0x00000002)) |
       ulConfig);
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) = ulMaxPosition;
}


x86 assembly (clang, -O0):
<QEIConfigure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%al
cmpq   $0x4002c000,-0x8(%rbp)
40
mov    %al,-0x19(%rbp)
je     1145 <QEIConfigure+0x35>
cmpq   $0x4002d000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xffffffffffffffe1,%rcx
or     -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0xc(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIConfigure>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x4002c000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    (%rbx),%rax
and    $0xffffffffffffffe1,%rax
or     %r15,%rax
mov    %rax,(%rbx)
mov    %r14,0xc(%rbx)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @QEIConfigure(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 1073922048
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i64, i64* %4
%11 = icmp eq i64 %10, 1073926144
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ true, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @DEBUG_ASSERT(i32 %14)
%16 = load i64, i64* %4
%17 = add i64 %16, 0
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = and i64 %19, -31
%21 = load i64, i64* %5
%22 = or i64 %20, %21
%23 = load i64, i64* %4
%24 = add i64 %23, 0
%25 = inttoptr i64 %24 to i64*
store volatile i64 %22, i64* %25
%26 = load i64, i64* %6
%27 = load i64, i64* %4
%28 = add i64 %27, 12
%29 = inttoptr i64 %28 to i64*
store volatile i64 %26, i64* %29
ret void
}

LLVM IR (-O2):
define void @QEIConfigure(i64 %0, i64 %1, i64 %2) {
%4 = and i64 %0, -4097
%5 = icmp eq i64 %4, 1073922048
%6 = zext i1 %5 to i32
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = inttoptr i64 %0 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, -31
%11 = or i64 %10, %1
store volatile i64 %11, i64* %8
%12 = add i64 %0, 12
%13 = inttoptr i64 %12 to i64*
store volatile i64 %2, i64* %13
ret void
}