xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void USBDMAChannelIntDisable(uint32_t ui32Base, uint32_t ui32Channel) {
  ASSERT(ui32Base == 0x40050000);
  ASSERT(ui32Channel < 8);
  (*((volatile uint32_t *)(ui32Base + 0x00000204 + (0x10 * ui32Channel)))) &=
      ~0x00000008;
}


x86 assembly (clang, -O0):
<USBDMAChannelIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x40050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x8,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x204,%eax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
add    %ecx,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffff7,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBDMAChannelIntDisable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x40050000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x8,%ebx
setl   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
movslq %ebx,%rcx
shl    $0x4,%rcx
andl   $0xfffffff7,0x204(%rax,%rcx,1)
f7
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @USBDMAChannelIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1074069504
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = icmp slt i32 %9, 8
%11 = zext i1 %10 to i32
%12 = call i32 @ASSERT(i32 %11)
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 516
%15 = load i32, i32* %4
%16 = mul nsw i32 16, %15
%17 = add nsw i32 %14, %16
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
%21 = and i32 %20, -9
store volatile i32 %21, i32* %19
ret void
}

LLVM IR (-O2):
define void @USBDMAChannelIntDisable(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1074069504
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = icmp slt i32 %1, 8
%7 = zext i1 %6 to i32
%8 = tail call i32 @ASSERT(i32 %7)
%9 = add nsw i32 %0, 516
%10 = shl nsw i32 %1, 4
%11 = add nsw i32 %9, %10
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
%14 = load volatile i32, i32* %13
%15 = and i32 %14, -9
store volatile i32 %15, i32* %13
ret void
}
void account_system_vtime(struct task_struct *tsk) {}


x86 assembly (clang, -O0):
<account_system_vtime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<account_system_vtime>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @account_system_vtime(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @account_system_vtime(%struct.task_struct* nocapture %0) {
ret void
}
int aa_pro_ctr_a06(int chan, unsigned char *buf, int len) {
  hu_log(6, "hu_aap", __func__, "!!!!!!!!");
  return (-1);
}


x86 assembly (clang, -O0):
<aa_pro_ctr_a06>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x6,%edi
lea    0xed2(%rip),%rsi
lea    0xed2(%rip),%rdx
lea    0xeda(%rip),%rcx
mov    $0x0,%al
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_pro_ctr_a06>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xee8(%rip),%rdx
lea    0xef0(%rip),%rcx
mov    $0x6,%edi
xor    %eax,%eax
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a06 = [15 x i8] c"aa_pro_ctr_a06\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a06(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a06, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a06 = [15 x i8] c"aa_pro_ctr_a06\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a06(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a06, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}
int xmlUCSIsLatinExtendedB(int code) {
  return (((code >= 0x0180) && (code <= 0x024F)));
}


x86 assembly (clang, -O0):
<xmlUCSIsLatinExtendedB>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x180,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsLatinExtendedB+0x26>
cmpl   $0x24f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsLatinExtendedB>:
add    $0xfffffe80,%edi
xor    %eax,%eax
cmp    $0xd0,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsLatinExtendedB(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 384
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 591
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsLatinExtendedB(i32 %0) {
%2 = add i32 %0, -384
%3 = icmp ult i32 %2, 208
%4 = zext i1 %3 to i32
ret i32 %4
}
int NeedCarrierFrequency(void) { return 0; }


x86 assembly (clang, -O0):
<NeedCarrierFrequency>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NeedCarrierFrequency>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @NeedCarrierFrequency() {
ret i32 0
}

LLVM IR (-O2):
define i32 @NeedCarrierFrequency() {
ret i32 0
}
unsigned xrop3_236_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & T;
  stk1 = S | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_236_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_236_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_236_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %6
%26 = load i32, i32* %9
%27 = or i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = xor i32 %29, -1
%31 = and i32 %28, %30
%32 = load i32, i32* %7
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %7
%41 = and i32 %39, %40
%42 = or i32 %38, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_236_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
int round_up(int x) {
  x--;
  x |= x >> 1;
  x |= x >> 2;
  x |= x >> 4;
  x |= x >> 8;
  x |= x >> 16;
  x++;
  return x;
}


x86 assembly (clang, -O0):
<round_up>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
sar    %ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
sar    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
sar    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @round_up(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = add nsw i32 %25, 1
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @round_up(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = ashr i32 %2, 1
%4 = or i32 %3, %2
%5 = ashr i32 %4, 2
%6 = or i32 %5, %4
%7 = ashr i32 %6, 4
%8 = or i32 %7, %6
%9 = ashr i32 %8, 8
%10 = or i32 %9, %8
%11 = ashr i32 %10, 16
%12 = or i32 %11, %10
%13 = add nsw i32 %12, 1
ret i32 %13
}
/* Variables and functions */
int evenBits();
int /*<<< orphan*/ printf(char *, int);
int main() {
  int c = evenBits();
  printf("a number with even bits set to 1 would be %d\n", 0x55555555);
  printf("evenBits() -> %d\n", c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <evenBits@plt>
mov    %eax,-0x4(%rbp)
lea    0xec7(%rip),%rdi
mov    $0x55555555,%esi
call   1030 <printf@plt>
mov    -0x4(%rbp),%esi
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <evenBits@plt>
mov    %eax,%ebx
lea    0xecf(%rip),%rdi
mov    $0x55555555,%esi
call   1030 <printf@plt>
lea    0xeec(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"a number with even bits set to 1 would be %d\0A\00"
@.str.1 = [18 x i8] c"evenBits() -> %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 (...) @evenBits()
store i32 %2, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 1431655765)
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [46 x i8] c"a number with even bits set to 1 would be %d\0A\00"
@.str.1 = [18 x i8] c"evenBits() -> %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @evenBits()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 1431655765)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Reserved45_DriverIRQHandler();
__attribute__((weak, section(".after_vectors"))) void
Reserved45_IRQHandler(void) {
  Reserved45_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<Reserved45_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Reserved45_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reserved45_IRQHandler>:
xor    %eax,%eax
jmp    1030 <Reserved45_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @Reserved45_IRQHandler() section ".after_vectors" {
%1 = call i32 (...) @Reserved45_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @Reserved45_IRQHandler() section ".after_vectors" {
%1 = tail call i32 (...) @Reserved45_DriverIRQHandler()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ randLIB_get_n_bytes_random(int /*<<< orphan*/ *, int);
uint8_t randLIB_get_8bit(void) {
  uint8_t ret_val;
  randLIB_get_n_bytes_random(&ret_val, 1);
  return ret_val;
}


x86 assembly (clang, -O0):
<randLIB_get_8bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
mov    $0x1,%esi
call   1030 <randLIB_get_n_bytes_random@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randLIB_get_8bit>:
push   %rax
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
call   1030 <randLIB_get_n_bytes_random@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @randLIB_get_8bit() {
%1 = alloca i32
%2 = call i32 @randLIB_get_n_bytes_random(i32* %1, i32 1)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @randLIB_get_8bit() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @randLIB_get_n_bytes_random(i32* %1, i32 1)
%4 = load i32, i32* %1
ret i32 %4
}
/* Variables and functions */
float fastsin(float);
float fasttan(float x) {
  static const float halfpi = 1.5707963267948966f;
  return fastsin(x) / fastsin(x + halfpi);
}


x86 assembly (clang, -O0):
<fasttan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <fastsin@plt>
movss  %xmm0,-0x8(%rbp)
movss  0xecc(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
call   1030 <fastsin@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fasttan>:
push   %rax
movss  %xmm0,(%rsp)
call   1030 <fastsin@plt>
movss  %xmm0,0x4(%rsp)
movss  (%rsp),%xmm0
addss  0xed2(%rip),%xmm0
call   1030 <fastsin@plt>
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@fasttan.halfpi = internal constant float 0x3FF921FB60000000
define float @fasttan(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @fastsin(float %3)
%5 = load float, float* %2
%6 = fadd float %5, 0x3FF921FB60000000
%7 = call float @fastsin(float %6)
%8 = fdiv float %4, %7
ret float %8
}

LLVM IR (-O2):
define float @fasttan(float %0) {
%2 = tail call float @fastsin(float %0)
%3 = fadd float %0, 0x3FF921FB60000000
%4 = tail call float @fastsin(float %3)
%5 = fdiv float %2, %4
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void do_bottom_border(void) {
  printf("************************************************************\n");
}


x86 assembly (clang, -O0):
<do_bottom_border>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_bottom_border>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"************************************************************\0A\00"
define void @do_bottom_border() {
%1 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [61 x i8] c"************************************************************\00"
define void @do_bottom_border() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([61 x i8], [61 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int write_quaddobl_target_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(247, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<write_quaddobl_target_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xf7,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_quaddobl_target_solutions>:
mov    $0xf7,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @write_quaddobl_target_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 247, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @write_quaddobl_target_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 247, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void FPUStackingEnable(void) {
  (*((volatile uint32_t *)(0xE000EF34))) =
      ((*((volatile uint32_t *)(0xE000EF34))) & ~0x40000000) | 0x80000000;
}


x86 assembly (clang, -O0):
<FPUStackingEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe000ef34,%eax
mov    (%rax),%ecx
and    $0xbfffffff,%ecx
or     $0x80000000,%ecx
mov    $0xe000ef34,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FPUStackingEnable>:
mov    $0xe000ef34,%eax
mov    $0x3fffffff,%ecx
and    (%rax),%ecx
or     $0x80000000,%ecx
mov    %ecx,(%rax)
ret

LLVM IR (-O0):
define void @FPUStackingEnable() {
%1 = load volatile i32, i32* inttoptr (i64 3758157620 to i32*)
%2 = and i32 %1, -1073741825
%3 = or i32 %2, -2147483648
store volatile i32 %3, i32* inttoptr (i64 3758157620 to i32*)
ret void
}

LLVM IR (-O2):
define void @FPUStackingEnable() {
%1 = load volatile i32, i32* inttoptr (i64 3758157620 to i32*)
%2 = and i32 %1, 1073741823
%3 = or i32 %2, -2147483648
store volatile i32 %3, i32* inttoptr (i64 3758157620 to i32*)
ret void
}
const char *yesno(int v) { return v ? "yes" : "no"; }


x86 assembly (clang, -O0):
<yesno>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef3(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x0,%edx
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yesno>:
test   %edi,%edi
lea    0xefb(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"yes\00"
@.str.1 = [3 x i8] c"no\00"
define i8* @yesno(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"yes\00"
@.str.1 = [3 x i8] c"no\00"
define i8* @yesno(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ interrupt(int, int, char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ makeInterrupt21();
int main() {
  char shell[6];
  int start;
  int i;
  makeInterrupt21();
  shell[0] = 's';
  shell[1] = 'h';
  shell[2] = 'e';
  shell[3] = 'l';
  shell[4] = 'l';
  shell[5] = '\0';
  interrupt(0x21, 4, shell, 0x2000, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <makeInterrupt21@plt>
movb   $0x73,-0xa(%rbp)
movb   $0x68,-0x9(%rbp)
movb   $0x65,-0x8(%rbp)
movb   $0x6c,-0x7(%rbp)
movb   $0x6c,-0x6(%rbp)
movb   $0x0,-0x5(%rbp)
lea    -0xa(%rbp),%rdx
mov    $0x21,%edi
mov    $0x4,%esi
mov    $0x2000,%ecx
xor    %r8d,%r8d
call   1030 <interrupt@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <makeInterrupt21@plt>
movl   $0x6c656873,0x2(%rsp)
6c
movw   $0x6c,0x6(%rsp)
lea    0x2(%rsp),%rdx
mov    $0x21,%edi
mov    $0x4,%esi
mov    $0x2000,%ecx
xor    %r8d,%r8d
call   1030 <interrupt@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i8]
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @makeInterrupt21()
%6 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
store i8 115, i8* %6
%7 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 1
store i8 104, i8* %7
%8 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 2
store i8 101, i8* %8
%9 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 3
store i8 108, i8* %9
%10 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 4
store i8 108, i8* %10
%11 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 5
store i8 0, i8* %11
%12 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%13 = call i32 @interrupt(i32 33, i32 4, i8* %12, i32 8192, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [6 x i8]
%2 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (...) @makeInterrupt21()
store i8 115, i8* %2
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 1
store i8 104, i8* %4
%5 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 2
store i8 101, i8* %5
%6 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 3
store i8 108, i8* %6
%7 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 4
store i8 108, i8* %7
%8 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 5
store i8 0, i8* %8
%9 = call i32 @interrupt(i32 33, i32 4, i8* %2, i32 8192, i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t randLIB_get_8bit(void) { return 0; }


x86 assembly (clang, -O0):
<randLIB_get_8bit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<randLIB_get_8bit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @randLIB_get_8bit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @randLIB_get_8bit() {
ret i32 0
}
void item_deinit(void) {}


x86 assembly (clang, -O0):
<item_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<item_deinit>:
ret

LLVM IR (-O0):
define void @item_deinit() {
ret void
}

LLVM IR (-O2):
define void @item_deinit() {
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
void main() {
  int32_t a;
  int32_t b;
  b = 1;
  for (a = 0; a < 10; a = a + 1) {
    b = b + 1;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1133 <main+0x33>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1112 <main+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %2
store i32 0, i32* %1
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %9
9: ; preds = %6
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
br label %3
12: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
int fun1294() { return 1294; }


x86 assembly (clang, -O0):
<fun1294>:
push   %rbp
mov    %rsp,%rbp
mov    $0x50e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1294>:
mov    $0x50e,%eax
ret

LLVM IR (-O0):
define i32 @fun1294() {
ret i32 1294
}

LLVM IR (-O2):
define i32 @fun1294() {
ret i32 1294
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int db_match(const wchar_t *fn, const wchar_t *pattern) {
  int found = 0;
  return found;
}


x86 assembly (clang, -O0):
<db_match>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_match>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @db_match(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
store i32 0, i32* %5
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @db_match(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
double scale(const double x) { return x * 10.0; }


x86 assembly (clang, -O0):
<scale>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @scale(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.000000e+01
ret double %4
}

LLVM IR (-O2):
define double @scale(double %0) {
%2 = fmul double %0, 1.000000e+01
ret double %2
}
/* Type definitions */
struct tpacket_hdr {
  int tp_status;
};

/* Variables and functions */
int TP_STATUS_SENDING;
int TP_STATUS_SEND_REQUEST;
int __v1_tx_kernel_ready(struct tpacket_hdr *hdr) {
  return !(hdr->tp_status & (TP_STATUS_SEND_REQUEST | TP_STATUS_SENDING));
}


x86 assembly (clang, -O0):
<__v1_tx_kernel_ready>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    0x2ed3(%rip),%rcx
mov    (%rcx),%ecx
mov    0x2eba(%rip),%rdx
or     (%rdx),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__v1_tx_kernel_ready>:
mov    0x2ee1(%rip),%rax
mov    0x2eca(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
xor    %eax,%eax
test   %ecx,(%rdi)
sete   %al
ret

LLVM IR (-O0):
%struct.tpacket_hdr = type { i32 }
@TP_STATUS_SEND_REQUEST = global i32 0
@TP_STATUS_SENDING = global i32 0
define i32 @__v1_tx_kernel_ready(%struct.tpacket_hdr* %0) {
%2 = alloca %struct.tpacket_hdr*
store %struct.tpacket_hdr* %0, %struct.tpacket_hdr** %2
%3 = load %struct.tpacket_hdr*, %struct.tpacket_hdr** %2
%4 = getelementptr inbounds %struct.tpacket_hdr, %struct.tpacket_hdr* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = load i32, i32* @TP_STATUS_SEND_REQUEST
%7 = load i32, i32* @TP_STATUS_SENDING
%8 = or i32 %6, %7
%9 = and i32 %5, %8
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
%struct.tpacket_hdr = type { i32 }
@TP_STATUS_SEND_REQUEST = global i32 0
@TP_STATUS_SENDING = global i32 0
define i32 @__v1_tx_kernel_ready(%struct.tpacket_hdr* nocapture %0) {
%2 = getelementptr inbounds %struct.tpacket_hdr, %struct.tpacket_hdr* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = load i32, i32* @TP_STATUS_SEND_REQUEST
%5 = load i32, i32* @TP_STATUS_SENDING
%6 = or i32 %5, %4
%7 = and i32 %6, %3
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ pddiagmk_(double *, int *, int *, int *, double *, int *);
void p_mateye(double *a, int *desca) {
  int ij = 1;
  double diag = 1.0;
  int ldiag = 1;
  pddiagmk_(a, &ij, &ij, desca, &diag, &ldiag);
}


x86 assembly (clang, -O0):
<p_mateye>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movsd  0xed1(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movl   $0x1,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%rdx
lea    -0x20(%rbp),%r8
lea    -0x24(%rbp),%r9
mov    %rdx,%rsi
call   1030 <pddiagmk_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p_mateye>:
sub    $0x18,%rsp
mov    %rsi,%rcx
movl   $0x1,0xc(%rsp)
movabs $0x3ff0000000000000,%rax
mov    %rax,0x10(%rsp)
movl   $0x1,0x8(%rsp)
lea    0xc(%rsp),%rdx
lea    0x10(%rsp),%r8
lea    0x8(%rsp),%r9
mov    %rdx,%rsi
call   1030 <pddiagmk_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @p_mateye(double* %0, i32* %1) {
%3 = alloca double*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double
%7 = alloca i32
store double* %0, double** %3
store i32* %1, i32** %4
store i32 1, i32* %5
store double 1.000000e+00, double* %6
store i32 1, i32* %7
%8 = load double*, double** %3
%9 = load i32*, i32** %4
%10 = call i32 @pddiagmk_(double* %8, i32* %5, i32* %5, i32* %9, double* %6, i32* %7)
ret void
}

LLVM IR (-O2):
define void @p_mateye(double* %0, i32* %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca i32
%6 = bitcast i32* %3 to i8*
store i32 1, i32* %3
%7 = bitcast double* %4 to i8*
store double 1.000000e+00, double* %4
%8 = bitcast i32* %5 to i8*
store i32 1, i32* %5
%9 = call i32 @pddiagmk_(double* %0, i32* %3, i32* %3, i32* %1, double* %4, i32* %5)
ret void
}
/* Variables and functions */
size_t get_data_tag_in_UndSecAltIDGrp(size_t __tag) {
  (void)__tag;
  return 0;
}


x86 assembly (clang, -O0):
<get_data_tag_in_UndSecAltIDGrp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_data_tag_in_UndSecAltIDGrp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @get_data_tag_in_UndSecAltIDGrp(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 0
}

LLVM IR (-O2):
define i64 @get_data_tag_in_UndSecAltIDGrp(i64 %0) {
ret i64 0
}
/* Variables and functions */
float __infer_nondet_float();
float truncf(float x) { return __infer_nondet_float(); }


x86 assembly (clang, -O0):
<truncf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncf>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_float@plt>

LLVM IR (-O0):
define float @truncf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call float (...) @__infer_nondet_float()
ret float %3
}

LLVM IR (-O2):
define float @truncf(float %0) {
%2 = tail call float (...) @__infer_nondet_float()
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ OPENSSL_cleanup();
void crypto_final() { OPENSSL_cleanup(); }


x86 assembly (clang, -O0):
<crypto_final>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OPENSSL_cleanup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_final>:
xor    %eax,%eax
jmp    1030 <OPENSSL_cleanup@plt>

LLVM IR (-O0):
define void @crypto_final() {
%1 = call i32 (...) @OPENSSL_cleanup()
ret void
}

LLVM IR (-O2):
define void @crypto_final() {
%1 = tail call i32 (...) @OPENSSL_cleanup()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
scalar_t__ wcrtomb__(char *, int /*<<< orphan*/, int /*<<< orphan*/ *);
int wctomb__(char *s, wchar_t wc) { return (int)wcrtomb__(s, wc, NULL); }


x86 assembly (clang, -O0):
<wctomb__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <wcrtomb__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wctomb__>:
xor    %edx,%edx
jmp    1030 <wcrtomb__@plt>

LLVM IR (-O0):
define i32 @wctomb__(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @wcrtomb__(i8* %5, i32 %6, i32* null)
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @wctomb__(i8* %0, i32 %1) {
%3 = tail call i64 @wcrtomb__(i8* %0, i32 %1, i32* null)
%4 = trunc i64 %3 to i32
ret i32 %4
}
void RTTimeNow(void) {}


x86 assembly (clang, -O0):
<RTTimeNow>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTimeNow>:
ret

LLVM IR (-O0):
define void @RTTimeNow() {
ret void
}

LLVM IR (-O2):
define void @RTTimeNow() {
ret void
}
char *strcpy(char *dst, const char *src) {
  int i = 0;
  while (1 < 2) {
    dst[i] = src[i];
    if (src[i] == '\0')
      break;
    i++;
  }
  return dst;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
jne    1143 <strcpy+0x43>
jmp    1151 <strcpy+0x51>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <strcpy+0x13>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
cmpb   $0x0,(%rsi,%rcx,1)
lea    0x1(%rcx),%rcx
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %2, %24
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 %11, i8* %15
%16 = load i8*, i8** %4
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %6
br label %27
24: ; preds = %6
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 1
store i32 %26, i32* %5
br label %6
27: ; preds = %23
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %10, %3 ], [ 0, %2 ]
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 %6, i8* %7
%8 = load i8, i8* %5
%9 = icmp eq i8 %8, 0
%10 = add nuw i64 %4, 1
br i1 %9, label %11, label %3
11: ; preds = %3
ret i8* %0
}
unsigned ring_data_contig(unsigned size, unsigned head, unsigned tail) {
  if (head >= tail)
    return head - tail;
  else
    return size - tail;
}


x86 assembly (clang, -O0):
<ring_data_contig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jb     1127 <ring_data_contig+0x27>
mov    -0xc(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1130 <ring_data_contig+0x30>
mov    -0x8(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ring_data_contig>:
mov    %edi,%eax
cmp    %edx,%esi
cmovae %esi,%eax
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @ring_data_contig(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = icmp uge i32 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = sub i32 %12, %13
store i32 %14, i32* %4
br label %19
15: ; preds = %3
%16 = load i32, i32* %5
%17 = load i32, i32* %7
%18 = sub i32 %16, %17
store i32 %18, i32* %4
br label %19
19: ; preds = %15, %11
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @ring_data_contig(i32 %0, i32 %1, i32 %2) {
%4 = icmp ult i32 %1, %2
%5 = select i1 %4, i32 %0, i32 %1
%6 = sub i32 %5, %2
ret i32 %6
}
void gtk_text_view_get_pixels_above_lines() {}


x86 assembly (clang, -O0):
<gtk_text_view_get_pixels_above_lines>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_get_pixels_above_lines>:
ret

LLVM IR (-O0):
define void @gtk_text_view_get_pixels_above_lines() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_get_pixels_above_lines() {
ret void
}
/* Variables and functions */
int fabs(double);
double sin(double);
double si(double x) {
  if (fabs(x) < 1e-9)
    return 1.0;
  return sin(x) / x;
}


x86 assembly (clang, -O0):
<si>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %eax,%xmm1
movsd  0xebd(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    115f <si+0x3f>
movsd  0xeb3(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1173 <si+0x53>
movsd  -0x10(%rbp),%xmm0
call   1040 <sin@plt>
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<si>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <fabs@plt>
test   %eax,%eax
jle    1140 <si+0x20>
movsd  (%rsp),%xmm0
call   1040 <sin@plt>
divsd  (%rsp),%xmm0
pop    %rax
ret
movsd  0xeb8(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @si(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = call i32 @fabs(double %4)
%6 = sitofp i32 %5 to double
%7 = fcmp olt double %6, 1.000000e-09
br i1 %7, label %8, label %9
8: ; preds = %1
store double 1.000000e+00, double* %2
br label %14
9: ; preds = %1
%10 = load double, double* %3
%11 = call double @sin(double %10)
%12 = load double, double* %3
%13 = fdiv double %11, %12
store double %13, double* %2
br label %14
14: ; preds = %9, %8
%15 = load double, double* %2
ret double %15
}

LLVM IR (-O2):
define double @si(double %0) {
%2 = tail call i32 @fabs(double %0)
%3 = icmp slt i32 %2, 1
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call double @sin(double %0)
%6 = fdiv double %5, %0
br label %7
7: ; preds = %1, %4
%8 = phi double [ %6, %4 ], [ 1.000000e+00, %1 ]
ret double %8
}
double anint(double x) {
  if (x > 0.0)
    return ((double)((int)(x + 0.5)));
  return ((double)((int)(x - 0.5)));
}


x86 assembly (clang, -O0):
<anint>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    113a <anint+0x3a>
movsd  0xedd(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1158 <anint+0x58>
movsd  -0x10(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<anint>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttpd2dq %xmm0,%xmm0
cvtdq2pd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @anint(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 0.000000e+00
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 5.000000e-01
%9 = fptosi double %8 to i32
%10 = sitofp i32 %9 to double
store double %10, double* %2
br label %16
11: ; preds = %1
%12 = load double, double* %3
%13 = fsub double %12, 5.000000e-01
%14 = fptosi double %13 to i32
%15 = sitofp i32 %14 to double
store double %15, double* %2
br label %16
16: ; preds = %11, %6
%17 = load double, double* %2
ret double %17
}

LLVM IR (-O2):
define double @anint(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = select i1 %2, double 5.000000e-01, double -5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
%6 = sitofp i32 %5 to double
ret double %6
}
void debug_urb_submitted(struct imx21 *imx21, struct urb *urb) {}


x86 assembly (clang, -O0):
<debug_urb_submitted>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_urb_submitted>:
ret

LLVM IR (-O0):
%struct.imx21 = type opaque
%struct.urb = type opaque
define void @debug_urb_submitted(%struct.imx21* %0, %struct.urb* %1) {
%3 = alloca %struct.imx21*
%4 = alloca %struct.urb*
store %struct.imx21* %0, %struct.imx21** %3
store %struct.urb* %1, %struct.urb** %4
ret void
}

LLVM IR (-O2):
%struct.imx21 = type opaque
%struct.urb = type opaque
define void @debug_urb_submitted(%struct.imx21* nocapture %0, %struct.urb* nocapture %1) {
ret void
}
double rk31sdk_get_sdio_wifi_voltage(void) {
  double voltage;
  voltage = 3.0;
  return voltage;
}


x86 assembly (clang, -O0):
<rk31sdk_get_sdio_wifi_voltage>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rk31sdk_get_sdio_wifi_voltage>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @rk31sdk_get_sdio_wifi_voltage() {
%1 = alloca double
store double 3.000000e+00, double* %1
%2 = load double, double* %1
ret double %2
}

LLVM IR (-O2):
define double @rk31sdk_get_sdio_wifi_voltage() {
ret double 3.000000e+00
}
int cisalpha(int c) {
  return ((c >= 'a') && (c <= 'z')) || ((c >= 'A') && (c <= 'Z'));
}


x86 assembly (clang, -O0):
<cisalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1120 <cisalpha+0x20>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    113f <cisalpha+0x3f>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1139 <cisalpha+0x39>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cisalpha>:
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @cisalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %16, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ false, %8 ], [ %13, %11 ]
br label %16
16: ; preds = %14, %5
%17 = phi i1 [ true, %5 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @cisalpha(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ntohex(int, char *);
int /*<<< orphan*/ write(int, char *, int);
int main(void) {
  int a = 0xdeadbeef, b = 0x1337;
  char buf[12];
  ntohex(a, buf);
  write(1, buf, 11);
  ntohex(b, buf);
  write(1, buf, 11);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xdeadbeef,-0x8(%rbp)
movl   $0x1337,-0xc(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1040 <ntohex@plt>
lea    -0x18(%rbp),%rsi
mov    $0x1,%edi
mov    $0xb,%edx
call   1030 <write@plt>
mov    -0xc(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1040 <ntohex@plt>
lea    -0x18(%rbp),%rsi
mov    $0x1,%edi
mov    $0xb,%edx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0x4(%rsp),%rbx
mov    $0xdeadbeef,%edi
mov    %rbx,%rsi
call   1040 <ntohex@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0xb,%edx
call   1030 <write@plt>
mov    $0x1337,%edi
mov    %rbx,%rsi
call   1040 <ntohex@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0xb,%edx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [12 x i8]
store i32 0, i32* %1
store i32 -559038737, i32* %2
store i32 4919, i32* %3
%5 = load i32, i32* %2
%6 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%7 = call i32 @ntohex(i32 %5, i8* %6)
%8 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%9 = call i32 @write(i32 1, i8* %8, i32 11)
%10 = load i32, i32* %3
%11 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%12 = call i32 @ntohex(i32 %10, i8* %11)
%13 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%14 = call i32 @write(i32 1, i8* %13, i32 11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%3 = call i32 @ntohex(i32 -559038737, i8* %2)
%4 = call i32 @write(i32 1, i8* %2, i32 11)
%5 = call i32 @ntohex(i32 4919, i8* %2)
%6 = call i32 @write(i32 1, i8* %2, i32 11)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void *myfunc(void *ptr) {
  int i = *((int *)ptr);
  printf("%d ", i);
  return NULL;
}


x86 assembly (clang, -O0):
<myfunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myfunc>:
push   %rax
mov    (%rdi),%esi
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define i8* @myfunc(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i8* null
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define noalias i8* @myfunc(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ __mmask16;
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpeq_epi8_mask(int /*<<< orphan*/, int /*<<< orphan*/);
__mmask16 __attribute__((__target__("avx512vl,avx512bw")))
mm_cmpeq_epi8_mask_wrap(__m128i a, __m128i b) {
  return _mm_cmpeq_epi8_mask(a, b);
}


x86 assembly (clang, -O0):
<mm_cmpeq_epi8_mask_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpeq_epi8_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_cmpeq_epi8_mask_wrap>:
jmp    1030 <_mm_cmpeq_epi8_mask@plt>

LLVM IR (-O0):
define i32 @mm_cmpeq_epi8_mask_wrap(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpeq_epi8_mask(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @mm_cmpeq_epi8_mask_wrap(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpeq_epi8_mask(i32 %0, i32 %1)
ret i32 %3
}