xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIG_UNBLOCK;
int /*<<< orphan*/ sigaddset(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int /*<<< orphan*/ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *);
void unmask_signals(void) {
  sigset_t my_set;
  sigemptyset(&my_set);
  sigaddset(&my_set, SIGINT);
  sigprocmask(SIG_UNBLOCK, &my_set, NULL);
}


x86 assembly (clang, -O0):
<unmask_signals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <sigemptyset@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%esi
lea    -0x4(%rbp),%rdi
call   1050 <sigaddset@plt>
mov    0x2e8e(%rip),%rax
mov    (%rax),%edi
lea    -0x4(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmask_signals>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigemptyset@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1050 <sigaddset@plt>
mov    0x2e8e(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_UNBLOCK = global i32 0
define void @unmask_signals() {
%1 = alloca i32
%2 = call i32 @sigemptyset(i32* %1)
%3 = load i32, i32* @SIGINT
%4 = call i32 @sigaddset(i32* %1, i32 %3)
%5 = load i32, i32* @SIG_UNBLOCK
%6 = call i32 @sigprocmask(i32 %5, i32* %1, i32* null)
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_UNBLOCK = global i32 0
define void @unmask_signals() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigemptyset(i32* %1)
%4 = load i32, i32* @SIGINT
%5 = call i32 @sigaddset(i32* %1, i32 %4)
%6 = load i32, i32* @SIG_UNBLOCK
%7 = call i32 @sigprocmask(i32 %6, i32* %1, i32* null)
ret void
}
void rop3_105_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D ^ S;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_105_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_105_1_0>:
mov    (%rdi),%al
xor    %esi,%edx
xor    %al,%dl
or     %sil,%dl
not    %dl
and    %sil,%al
or     %dl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_105_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = xor i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8*, i8** %4
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = and i32 %34, %36
%38 = or i32 %31, %37
%39 = trunc i32 %38 to i8
%40 = load i8*, i8** %4
store i8 %39, i8* %40
ret void
}

LLVM IR (-O2):
define void @rop3_105_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %2, %1
%6 = xor i8 %5, %4
%7 = or i8 %6, %1
%8 = xor i8 %7, -1
%9 = and i8 %4, %1
%10 = or i8 %9, %8
store i8 %10, i8* %0
ret void
}
float __cargf(__complex__ float x) { return __atan2f(__imag__ x, __real__ x); }


x86 assembly (clang, -O0):
<__cargf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movlpd %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
mov    $0x2,%al
call   1030 <__atan2f@plt>
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cargf>:
push   %rax
cvtss2sd %xmm0,%xmm1
shufps $0x55,%xmm0,%xmm0
cvtss2sd %xmm0,%xmm0
mov    $0x2,%al
call   1030 <__atan2f@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @__cargf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = bitcast { float, float }* %2 to <2 x float>*
store <2 x float> %0, <2 x float>* %3
%4 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
%5 = load float, float* %4
%6 = fpext float %5 to double
%7 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%8 = load float, float* %7
%9 = fpext float %8 to double
%10 = call i32 (double, double, ...) bitcast (i32 (...)* @__atan2f to i32 (double, double, ...)*)(double %6, double %9)
%11 = sitofp i32 %10 to float
ret float %11
}

LLVM IR (-O2):
define float @__cargf(<2 x float> %0) {
%2 = extractelement <2 x float> %0, i64 1
%3 = fpext float %2 to double
%4 = extractelement <2 x float> %0, i64 0
%5 = fpext float %4 to double
%6 = tail call i32 (double, double, ...) bitcast (i32 (...)* @__atan2f to i32 (double, double, ...)*)(double %3, double %5)
%7 = sitofp i32 %6 to float
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ GL_FLAT;
int /*<<< orphan*/ GL_MODELVIEW;
int /*<<< orphan*/ GL_PROJECTION;
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ glMatrixMode(int /*<<< orphan*/);
int /*<<< orphan*/ glOrtho(double, double, double, double, double, double);
int /*<<< orphan*/ glShadeModel(int /*<<< orphan*/);
void initialize(void) {
  glMatrixMode(GL_PROJECTION);
  glLoadIdentity();
  glOrtho(-1.5, 1.5, -1.5, 1.5, -1.5, 1.5);
  glMatrixMode(GL_MODELVIEW);
  glLoadIdentity();
  glShadeModel(GL_FLAT);
}


x86 assembly (clang, -O0):
<initialize>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1050 <glLoadIdentity@plt>
movsd  0xe9f(%rip),%xmm4
movsd  0xe9f(%rip),%xmm5
movaps %xmm4,%xmm0
movaps %xmm5,%xmm1
movaps %xmm4,%xmm2
movaps %xmm5,%xmm3
call   1040 <glOrtho@plt>
mov    0x2e5f(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1050 <glLoadIdentity@plt>
mov    0x2e52(%rip),%rax
mov    (%rax),%edi
call   1060 <glShadeModel@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize>:
push   %rax
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
call   1050 <glLoadIdentity@plt>
movsd  0xea2(%rip),%xmm0
movsd  0xea2(%rip),%xmm1
movaps %xmm0,%xmm2
movaps %xmm1,%xmm3
movaps %xmm0,%xmm4
movaps %xmm1,%xmm5
call   1040 <glOrtho@plt>
mov    0x2e62(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
call   1050 <glLoadIdentity@plt>
mov    0x2e55(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1060 <glShadeModel@plt>

LLVM IR (-O0):
@GL_PROJECTION = global i32 0
@GL_MODELVIEW = global i32 0
@GL_FLAT = global i32 0
define void @initialize() {
%1 = load i32, i32* @GL_PROJECTION
%2 = call i32 @glMatrixMode(i32 %1)
%3 = call i32 (...) @glLoadIdentity()
%4 = call i32 @glOrtho(double -1.500000e+00, double 1.500000e+00, double -1.500000e+00, double 1.500000e+00, double -1.500000e+00, double 1.500000e+00)
%5 = load i32, i32* @GL_MODELVIEW
%6 = call i32 @glMatrixMode(i32 %5)
%7 = call i32 (...) @glLoadIdentity()
%8 = load i32, i32* @GL_FLAT
%9 = call i32 @glShadeModel(i32 %8)
ret void
}

LLVM IR (-O2):
@GL_PROJECTION = global i32 0
@GL_MODELVIEW = global i32 0
@GL_FLAT = global i32 0
define void @initialize() {
%1 = load i32, i32* @GL_PROJECTION
%2 = tail call i32 @glMatrixMode(i32 %1)
%3 = tail call i32 (...) @glLoadIdentity()
%4 = tail call i32 @glOrtho(double -1.500000e+00, double 1.500000e+00, double -1.500000e+00, double 1.500000e+00, double -1.500000e+00, double 1.500000e+00)
%5 = load i32, i32* @GL_MODELVIEW
%6 = tail call i32 @glMatrixMode(i32 %5)
%7 = tail call i32 (...) @glLoadIdentity()
%8 = load i32, i32* @GL_FLAT
%9 = tail call i32 @glShadeModel(i32 %8)
ret void
}
void free_f3tensor(float ***m) {
  free(m[0][0]);
  free(m[0]);
  free(m);
}


x86 assembly (clang, -O0):
<free_f3tensor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_f3tensor>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    (%rbx),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_f3tensor(float*** %0) {
%2 = alloca float***
store float*** %0, float**** %2
%3 = load float***, float**** %2
%4 = getelementptr inbounds float**, float*** %3, i64 0
%5 = load float**, float*** %4
%6 = getelementptr inbounds float*, float** %5, i64 0
%7 = load float*, float** %6
%8 = bitcast float* %7 to i8*
%9 = load float***, float**** %2
%10 = getelementptr inbounds float**, float*** %9, i64 0
%11 = load float**, float*** %10
%12 = bitcast float** %11 to i8*
%13 = load float***, float**** %2
%14 = bitcast float*** %13 to i8*
ret void
}

LLVM IR (-O2):
define void @free_f3tensor(float*** nocapture %0) {
%2 = bitcast float*** %0 to i8***
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
tail call void @free(i8* %4)
%5 = bitcast float*** %0 to i8**
%6 = load i8*, i8** %5
tail call void @free(i8* %6)
%7 = bitcast float*** %0 to i8*
tail call void @free(i8* %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ iaap_media_decode(int, unsigned char *, int);
int iaap_media_process(int chan, int msg_type, int flags, unsigned char *buf,
                       int len) {
  iaap_media_decode(chan, buf, len);
  return (0);
}


x86 assembly (clang, -O0):
<iaap_media_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <iaap_media_decode@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iaap_media_process>:
push   %rax
mov    %r8d,%edx
mov    %rcx,%rsi
call   1030 <iaap_media_decode@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @iaap_media_process(i32 %0, i32 %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %9
%13 = load i32, i32* %10
%14 = call i32 @iaap_media_decode(i32 %11, i8* %12, i32 %13)
ret i32 0
}

LLVM IR (-O2):
define i32 @iaap_media_process(i32 %0, i32 %1, i32 %2, i8* %3, i32 %4) {
%6 = tail call i32 @iaap_media_decode(i32 %0, i8* %3, i32 %4)
ret i32 0
}
/* Type definitions */
struct nlattr {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t nla_read_s32(const struct nlattr *nla) { return *(int32_t *)(nla + 1); }


x86 assembly (clang, -O0):
<nla_read_s32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_read_s32>:
mov    0x4(%rdi),%eax
ret

LLVM IR (-O0):
%struct.nlattr = type { i32 }
define i32 @nla_read_s32(%struct.nlattr* %0) {
%2 = alloca %struct.nlattr*
store %struct.nlattr* %0, %struct.nlattr** %2
%3 = load %struct.nlattr*, %struct.nlattr** %2
%4 = getelementptr inbounds %struct.nlattr, %struct.nlattr* %3, i64 1
%5 = bitcast %struct.nlattr* %4 to i32*
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
%struct.nlattr = type { i32 }
define i32 @nla_read_s32(%struct.nlattr* nocapture %0) {
%2 = getelementptr inbounds %struct.nlattr, %struct.nlattr* %0, i64 1, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
unsigned xrop3_6_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D ^ S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_6_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_6_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %eax,%edx
xor    $0xffffff00,%edx
or     %ecx,%edx
not    %edx
not    %eax
and    %esi,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_6_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = xor i32 %30, -1
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = and i32 %32, %33
%35 = load i32, i32* %8
%36 = load i32, i32* %7
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = or i32 %34, %38
%40 = load i32, i32* %7
%41 = load i32, i32* %6
%42 = xor i32 %41, -1
%43 = and i32 %40, %42
%44 = load i32, i32* %5
%45 = and i32 %43, %44
%46 = or i32 %39, %45
ret i32 %46
}

LLVM IR (-O2):
define i32 @xrop3_6_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -256
%8 = or i32 %6, %7
%9 = xor i32 %8, -1
%10 = xor i32 %4, -1
%11 = and i32 %10, %5
%12 = or i32 %11, %9
ret i32 %12
}
/* Type definitions */
struct core_instr_params {
  int dummy;
};
struct core_cpu {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ core_cpu_i__jump(struct core_cpu *,
                                    struct core_instr_params *, int);
void core_cpu_i_op_jz(struct core_cpu *cpu, struct core_instr_params *p) {
  core_cpu_i__jump(cpu, p, 0x01);
}


x86 assembly (clang, -O0):
<core_cpu_i_op_jz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <core_cpu_i__jump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_cpu_i_op_jz>:
mov    $0x1,%edx
jmp    1030 <core_cpu_i__jump@plt>

LLVM IR (-O0):
%struct.core_cpu = type { i32 }
%struct.core_instr_params = type { i32 }
define void @core_cpu_i_op_jz(%struct.core_cpu* %0, %struct.core_instr_params* %1) {
%3 = alloca %struct.core_cpu*
%4 = alloca %struct.core_instr_params*
store %struct.core_cpu* %0, %struct.core_cpu** %3
store %struct.core_instr_params* %1, %struct.core_instr_params** %4
%5 = load %struct.core_cpu*, %struct.core_cpu** %3
%6 = load %struct.core_instr_params*, %struct.core_instr_params** %4
%7 = call i32 @core_cpu_i__jump(%struct.core_cpu* %5, %struct.core_instr_params* %6, i32 1)
ret void
}

LLVM IR (-O2):
%struct.core_cpu = type { i32 }
%struct.core_instr_params = type { i32 }
define void @core_cpu_i_op_jz(%struct.core_cpu* %0, %struct.core_instr_params* %1) {
%3 = tail call i32 @core_cpu_i__jump(%struct.core_cpu* %0, %struct.core_instr_params* %1, i32 1)
ret void
}
/* Variables and functions */
float powf(float, float);
float cbrtf(float f) { return powf(f, 1.0f / 3.0f); }


x86 assembly (clang, -O0):
<cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
call   1030 <powf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrtf>:
movss  0xee8(%rip),%xmm1
jmp    1030 <powf@plt>

LLVM IR (-O0):
define float @cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @powf(float %3, float 0x3FD5555560000000)
ret float %4
}

LLVM IR (-O2):
define float @cbrtf(float %0) {
%2 = tail call float @powf(float %0, float 0x3FD5555560000000)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x71() {
  Assert_real((isalnum(113)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              570, ("isalnum should be 1 for q"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x71>:
push   %rbp
mov    %rsp,%rbp
mov    $0x71,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x23a,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x71>:
push   %rax
mov    $0x71,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x23a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for q\00"
define void @t_isalnum_0x71() {
%1 = call i32 @isalnum(i32 113)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 570, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for q\00"
define void @t_isalnum_0x71() {
%1 = tail call i32 @isalnum(i32 113)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 570, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
char *strcpy(char *dest, const char *src) {
  do {
    *dest++ = *src++;
  } while (*src != 0);
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    110c <strcpy+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
add    $0x1,%rsi
nopl   0x0(%rax)
mov    %cl,(%rax)
add    $0x1,%rax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %11, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
br label %11
11: ; preds = %5
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 0
br i1 %15, label %5, label %16
16: ; preds = %11
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @strcpy(i8* writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
br label %4
4: ; preds = %4, %2
%5 = phi i8 [ %3, %2 ], [ %10, %4 ]
%6 = phi i8* [ %0, %2 ], [ %9, %4 ]
%7 = phi i8* [ %1, %2 ], [ %8, %4 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %5, i8* %6
%10 = load i8, i8* %8
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4
ret i8* %9
}
/* Variables and functions */
int CPUReadMemory(int);
int /*<<< orphan*/ printf(char *, int);
void ROMList(void) {
  int i;
  for (i = 0; i < 8192; i++) {
    printf("%x\n", CPUReadMemory(i));
  }
}


x86 assembly (clang, -O0):
<ROMList>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x2000,-0x4(%rbp)
jge    1160 <ROMList+0x40>
mov    -0x4(%rbp),%edi
call   1040 <CPUReadMemory@plt>
mov    %eax,%esi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <ROMList+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROMList>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    %ebx,%edi
call   1040 <CPUReadMemory@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x2000,%ebx
jne    1130 <ROMList+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%x\0A\00"
define void @ROMList() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %9, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 8192
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @CPUReadMemory(i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %5
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
br label %2
12: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%x\0A\00"
define void @ROMList() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = tail call i32 @CPUReadMemory(i32 %2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = add nuw nsw i32 %2, 1
%6 = icmp eq i32 %5, 8192
br i1 %6, label %7, label %1
7: ; preds = %1
ret void
}
/* Variables and functions */
int add(int, int);
int /*<<< orphan*/ printf(char *, int);
void main() {
  int A = 3, B = 12;
  printf("%d\n", add(A, B));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3,-0x4(%rbp)
movl   $0xc,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <add@plt>
mov    %eax,%esi
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
mov    $0xc,%esi
call   1030 <add@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 3, i32* %1
store i32 12, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = call i32 @add(i32 %3, i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = tail call i32 @add(i32 3, i32 12)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void bcma_core_mips_init(struct bcma_drv_mips *mcore) {}


x86 assembly (clang, -O0):
<bcma_core_mips_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcma_core_mips_init>:
ret

LLVM IR (-O0):
%struct.bcma_drv_mips = type opaque
define void @bcma_core_mips_init(%struct.bcma_drv_mips* %0) {
%2 = alloca %struct.bcma_drv_mips*
store %struct.bcma_drv_mips* %0, %struct.bcma_drv_mips** %2
ret void
}

LLVM IR (-O2):
%struct.bcma_drv_mips = type opaque
define void @bcma_core_mips_init(%struct.bcma_drv_mips* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int uecp_is_global_mec(uint8_t mec) {
  switch (mec) {
  case 0x0D:
  case 0x19:
  case 0x1C:
  case 0x1E:
  case 0x23:
  case 0x27:
  case 0x2C:
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<uecp_is_global_mec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0xd,%eax
je     1181 <uecp_is_global_mec+0x81>
jmp    111b <uecp_is_global_mec+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x19,%eax
je     1181 <uecp_is_global_mec+0x81>
jmp    112c <uecp_is_global_mec+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x1c,%eax
je     1181 <uecp_is_global_mec+0x81>
jmp    113d <uecp_is_global_mec+0x3d>
mov    -0xc(%rbp),%eax
sub    $0x1e,%eax
je     1181 <uecp_is_global_mec+0x81>
jmp    114e <uecp_is_global_mec+0x4e>
mov    -0xc(%rbp),%eax
sub    $0x23,%eax
je     1181 <uecp_is_global_mec+0x81>
jmp    115f <uecp_is_global_mec+0x5f>
mov    -0xc(%rbp),%eax
sub    $0x27,%eax
je     1181 <uecp_is_global_mec+0x81>
jmp    1170 <uecp_is_global_mec+0x70>
mov    -0xc(%rbp),%eax
sub    $0x2c,%eax
jne    118d <uecp_is_global_mec+0x8d>
jmp    1181 <uecp_is_global_mec+0x81>
movl   $0x1,-0x4(%rbp)
jmp    1194 <uecp_is_global_mec+0x94>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uecp_is_global_mec>:
cmp    $0x2c,%edi
ja     111d <uecp_is_global_mec+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x108852002000,%rdx
bt     %rcx,%rdx
jae    111d <uecp_is_global_mec+0x1d>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @uecp_is_global_mec(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 13, label %5
i32 25, label %5
i32 28, label %5
i32 30, label %5
i32 35, label %5
i32 39, label %5
i32 44, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @uecp_is_global_mec(i32 %0) {
switch i32 %0, label %2 [
i32 13, label %3
i32 25, label %3
i32 28, label %3
i32 30, label %3
i32 35, label %3
i32 39, label %3
i32 44, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Variables and functions */
float stb_smoothstep(float t) { return (3 - 2 * t) * (t * t); }


x86 assembly (clang, -O0):
<stb_smoothstep>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm1
addss  %xmm1,%xmm1
movss  0xee6(%rip),%xmm0
subss  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb_smoothstep>:
movaps %xmm0,%xmm1
addss  %xmm0,%xmm1
movss  0xef1(%rip),%xmm2
subss  %xmm1,%xmm2
mulss  %xmm0,%xmm0
mulss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @stb_smoothstep(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.fmuladd.f32(float -2.000000e+00, float %3, float 3.000000e+00)
%5 = load float, float* %2
%6 = load float, float* %2
%7 = fmul float %5, %6
%8 = fmul float %4, %7
ret float %8
}

LLVM IR (-O2):
define float @stb_smoothstep(float %0) {
%2 = tail call float @llvm.fmuladd.f32(float %0, float -2.000000e+00, float 3.000000e+00)
%3 = fmul float %0, %0
%4 = fmul float %2, %3
ret float %4
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_CIPHER;

/* Variables and functions */
const EVP_CIPHER *EVP_aes_256_ocb(void) { return NULL; }


x86 assembly (clang, -O0):
<EVP_aes_256_ocb>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_aes_256_ocb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32* @EVP_aes_256_ocb() {
ret i32* null
}

LLVM IR (-O2):
define noalias i32* @EVP_aes_256_ocb() {
ret i32* null
}
void g_utf8_strreverse() {}


x86 assembly (clang, -O0):
<g_utf8_strreverse>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_utf8_strreverse>:
ret

LLVM IR (-O0):
define void @g_utf8_strreverse() {
ret void
}

LLVM IR (-O2):
define void @g_utf8_strreverse() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void g_slist_cmn_ent_free(void *arg) { free(arg); }


x86 assembly (clang, -O0):
<g_slist_cmn_ent_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_slist_cmn_ent_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @g_slist_cmn_ent_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @g_slist_cmn_ent_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ REG_EXTENDED;
int /*<<< orphan*/ exec_regex(char *, char *, int /*<<< orphan*/);
void exec_regex_extended(char *str, char *pat) {
  exec_regex(str, pat, REG_EXTENDED);
}


x86 assembly (clang, -O0):
<exec_regex_extended>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
call   1030 <exec_regex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec_regex_extended>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
jmp    1030 <exec_regex@plt>

LLVM IR (-O0):
@REG_EXTENDED = global i32 0
define void @exec_regex_extended(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @REG_EXTENDED
%8 = call i32 @exec_regex(i8* %5, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@REG_EXTENDED = global i32 0
define void @exec_regex_extended(i8* %0, i8* %1) {
%3 = load i32, i32* @REG_EXTENDED
%4 = tail call i32 @exec_regex(i8* %0, i8* %1, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ itoa(int, char *);
int /*<<< orphan*/ terminal_writestring(char *);
void terminal_writeint(int n) {
  char f[20];
  itoa(n, f);
  terminal_writestring(f);
}


x86 assembly (clang, -O0):
<terminal_writeint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1040 <itoa@plt>
lea    -0x20(%rbp),%rdi
call   1030 <terminal_writestring@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminal_writeint>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1040 <itoa@plt>
mov    %rbx,%rdi
call   1030 <terminal_writestring@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @terminal_writeint(i32 %0) {
%2 = alloca i32
%3 = alloca [20 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%6 = call i32 @itoa(i32 %4, i8* %5)
%7 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%8 = call i32 @terminal_writestring(i8* %7)
ret void
}

LLVM IR (-O2):
define void @terminal_writeint(i32 %0) {
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%4 = call i32 @itoa(i32 %0, i8* %3)
%5 = call i32 @terminal_writestring(i8* %3)
ret void
}
void \U000000e9(void) {
  if (strcmp(__func__, "\u00e9") != 0)
    abort();
}


x86 assembly (clang, -O0):
<é>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<é>:
ret

LLVM IR (-O0):
define void @"\C3\A9"() {
ret void
}

LLVM IR (-O2):
define void @"\C3\A9"() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ t(int, void **);
m(void **p) { t(10, p); }


x86 assembly (clang, -O0):
<m>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0xa,%edi
call   1030 <t@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m>:
mov    %rdi,%rsi
mov    $0xa,%edi
jmp    1030 <t@plt>

LLVM IR (-O0):
define i32 @m(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
store i8** %0, i8*** %3
%4 = load i8**, i8*** %3
%5 = call i32 @t(i32 10, i8** %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @m(i8** %0) {
%2 = tail call i32 @t(i32 10, i8** %0)
ret i32 undef
}
void simtec_setup_heartbeat_timer_1ms() {}


x86 assembly (clang, -O0):
<simtec_setup_heartbeat_timer_1ms>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simtec_setup_heartbeat_timer_1ms>:
ret

LLVM IR (-O0):
define void @simtec_setup_heartbeat_timer_1ms() {
ret void
}

LLVM IR (-O2):
define void @simtec_setup_heartbeat_timer_1ms() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int /*<<< orphan*/ SOCK_STREAM;
int socket(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int createSocket(void) { return socket(AF_INET, SOCK_STREAM, 0); }


x86 assembly (clang, -O0):
<createSocket>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <socket@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<createSocket>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <socket@plt>

LLVM IR (-O0):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
define i32 @createSocket() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = call i32 @socket(i32 %1, i32 %2, i32 0)
ret i32 %3
}

LLVM IR (-O2):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
define i32 @createSocket() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ __console_tx_hex32(unsigned int);
void print_debug_hex32(unsigned int value) { __console_tx_hex32(value); }


x86 assembly (clang, -O0):
<print_debug_hex32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__console_tx_hex32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_debug_hex32>:
jmp    1030 <__console_tx_hex32@plt>

LLVM IR (-O0):
define void @print_debug_hex32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__console_tx_hex32(i32 %3)
ret void
}

LLVM IR (-O2):
define void @print_debug_hex32(i32 %0) {
%2 = tail call i32 @__console_tx_hex32(i32 %0)
ret void
}
void g_closure_remove_finalize_notifier() {}


x86 assembly (clang, -O0):
<g_closure_remove_finalize_notifier>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_closure_remove_finalize_notifier>:
ret

LLVM IR (-O0):
define void @g_closure_remove_finalize_notifier() {
ret void
}

LLVM IR (-O2):
define void @g_closure_remove_finalize_notifier() {
ret void
}
int fibI(int n) {
  int last, cur, tmp;
  last = 0;
  cur = 1;
  n = n - 1;
  while (n) {
    --n;
    tmp = cur;
    cur = last + cur;
    last = tmp;
  }
  return cur;
}


x86 assembly (clang, -O0):
<fibI>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114b <fibI+0x4b>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    111e <fibI+0x1e>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibI>:
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    1116 <fibI+0x16>
mov    $0x1,%edx
xor    %esi,%esi
jmp    1135 <fibI+0x35>
and    $0xfffffff8,%edi
mov    $0x1,%edx
xor    %esi,%esi
add    %edx,%esi
add    %esi,%edx
add    %edx,%esi
add    %esi,%edx
add    %edx,%esi
add    %esi,%edx
add    %edx,%esi
add    %esi,%edx
add    $0xfffffff8,%edi
jne    1120 <fibI+0x20>
mov    %esi,%eax
test   %ecx,%ecx
je     114d <fibI+0x4d>
nopl   0x0(%rax,%rax,1)
mov    %edx,%eax
mov    %esi,%edx
add    %eax,%edx
mov    %eax,%esi
add    $0xffffffff,%ecx
jne    1140 <fibI+0x40>
ret

LLVM IR (-O0):
define i32 @fibI(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 1, i32* %4
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %2
br label %8
8: ; preds = %11, %1
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %2
%13 = add nsw i32 %12, -1
store i32 %13, i32* %2
%14 = load i32, i32* %4
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
store i32 %17, i32* %4
%18 = load i32, i32* %5
store i32 %18, i32* %3
br label %8
19: ; preds = %8
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibI(i32 %0) {
%2 = add i32 %0, -1
%3 = and i32 %0, 7
%4 = icmp ult i32 %2, 7
br i1 %4, label %21, label %5
5: ; preds = %1
%6 = and i32 %0, -8
br label %7
7: ; preds = %7, %5
%8 = phi i32 [ 0, %5 ], [ %17, %7 ]
%9 = phi i32 [ 1, %5 ], [ %18, %7 ]
%10 = phi i32 [ 0, %5 ], [ %19, %7 ]
%11 = add nsw i32 %9, %8
%12 = add nsw i32 %11, %9
%13 = add nsw i32 %12, %11
%14 = add nsw i32 %13, %12
%15 = add nsw i32 %14, %13
%16 = add nsw i32 %15, %14
%17 = add nsw i32 %16, %15
%18 = add nsw i32 %17, %16
%19 = add i32 %10, 8
%20 = icmp eq i32 %19, %6
br i1 %20, label %21, label %7
21: ; preds = %7, %1
%22 = phi i32 [ undef, %1 ], [ %17, %7 ]
%23 = phi i32 [ 0, %1 ], [ %17, %7 ]
%24 = phi i32 [ 1, %1 ], [ %18, %7 ]
%25 = icmp eq i32 %3, 0
br i1 %25, label %33, label %26
26: ; preds = %21, %26
%27 = phi i32 [ %28, %26 ], [ %23, %21 ]
%28 = phi i32 [ %30, %26 ], [ %24, %21 ]
%29 = phi i32 [ %31, %26 ], [ 0, %21 ]
%30 = add nsw i32 %28, %27
%31 = add i32 %29, 1
%32 = icmp eq i32 %31, %3
br i1 %32, label %33, label %26
33: ; preds = %26, %21
%34 = phi i32 [ %22, %21 ], [ %28, %26 ]
ret i32 %34
}
void wifi_rsp_sme_stop_ap_mode(
    const struct wifi_msg_sme_stop_ap_mode_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_sme_stop_ap_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_sme_stop_ap_mode>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_stop_ap_mode_rsp_t = type opaque
define void @wifi_rsp_sme_stop_ap_mode(%struct.wifi_msg_sme_stop_ap_mode_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_sme_stop_ap_mode_rsp_t*
store %struct.wifi_msg_sme_stop_ap_mode_rsp_t* %0, %struct.wifi_msg_sme_stop_ap_mode_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_stop_ap_mode_rsp_t = type opaque
define void @wifi_rsp_sme_stop_ap_mode(%struct.wifi_msg_sme_stop_ap_mode_rsp_t* nocapture %0) {
ret void
}
void fun_1(short *arr1, int index, short *arr2) {
  int a = arr1[0];
  arr2[-1] = 0;
  int b = arr1[1];
  arr2[-2] = 0;
  arr2[-3] = a + b;
}


x86 assembly (clang, -O0):
<fun_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movw   $0x0,-0x2(%rax)
mov    -0x8(%rbp),%rax
movswl 0x2(%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movw   $0x0,-0x4(%rax)
mov    -0x1c(%rbp),%eax
add    -0x20(%rbp),%eax
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,-0x6(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_1>:
movzwl (%rdi),%eax
movw   $0x0,-0x2(%rdx)
add    0x2(%rdi),%ax
movw   $0x0,-0x4(%rdx)
mov    %ax,-0x6(%rdx)
ret

LLVM IR (-O0):
define void @fun_1(i16* %0, i32 %1, i16* %2) {
%4 = alloca i16*
%5 = alloca i32
%6 = alloca i16*
%7 = alloca i32
%8 = alloca i32
store i16* %0, i16** %4
store i32 %1, i32* %5
store i16* %2, i16** %6
%9 = load i16*, i16** %4
%10 = getelementptr inbounds i16, i16* %9, i64 0
%11 = load i16, i16* %10
%12 = sext i16 %11 to i32
store i32 %12, i32* %7
%13 = load i16*, i16** %6
%14 = getelementptr inbounds i16, i16* %13, i64 -1
store i16 0, i16* %14
%15 = load i16*, i16** %4
%16 = getelementptr inbounds i16, i16* %15, i64 1
%17 = load i16, i16* %16
%18 = sext i16 %17 to i32
store i32 %18, i32* %8
%19 = load i16*, i16** %6
%20 = getelementptr inbounds i16, i16* %19, i64 -2
store i16 0, i16* %20
%21 = load i32, i32* %7
%22 = load i32, i32* %8
%23 = add nsw i32 %21, %22
%24 = trunc i32 %23 to i16
%25 = load i16*, i16** %6
%26 = getelementptr inbounds i16, i16* %25, i64 -3
store i16 %24, i16* %26
ret void
}

LLVM IR (-O2):
define void @fun_1(i16* nocapture %0, i32 %1, i16* nocapture writeonly %2) {
%4 = load i16, i16* %0
%5 = getelementptr inbounds i16, i16* %2, i64 -1
store i16 0, i16* %5
%6 = getelementptr inbounds i16, i16* %0, i64 1
%7 = load i16, i16* %6
%8 = getelementptr inbounds i16, i16* %2, i64 -2
store i16 0, i16* %8
%9 = add i16 %7, %4
%10 = getelementptr inbounds i16, i16* %2, i64 -3
store i16 %9, i16* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_46(int /*<<< orphan*/);
int gen_46() { handle_46(0); }


x86 assembly (clang, -O0):
<gen_46>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <handle_46@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_46>:
xor    %edi,%edi
jmp    1030 <handle_46@plt>

LLVM IR (-O0):
define i32 @gen_46() {
%1 = alloca i32
%2 = call i32 @handle_46(i32 0)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @gen_46() {
%1 = tail call i32 @handle_46(i32 0)
ret i32 undef
}
/* Variables and functions */
void putchar(int c) {}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
ret

LLVM IR (-O0):
define void @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @putchar(i32 %0) {
ret void
}
int loop1(int k) {
  unsigned int i;
  int a[1000], b[1000], c[1000];
  for (i = 1; i < 1000; i++) {
    a[i] = c[i];
    b[i] = a[i - 1] + 1;
  }
  return a[1000 - 2] + b[1000 - 1] + c[1000 - 2];
}


x86 assembly (clang, -O0):
<loop1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x2e70,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jae    1160 <loop1+0x60>
mov    -0x8(%rbp),%eax
mov    -0x2ef0(%rbp,%rax,4),%ecx
mov    -0x8(%rbp),%eax
mov    %ecx,-0xfb0(%rbp,%rax,4)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,%eax
mov    -0xfb0(%rbp,%rax,4),%ecx
add    $0x1,%ecx
mov    -0x8(%rbp),%eax
mov    %ecx,-0x1f50(%rbp,%rax,4)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <loop1+0x15>
mov    -0x18(%rbp),%eax
add    -0xfb4(%rbp),%eax
add    -0x1f58(%rbp),%eax
add    $0x2e70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop1>:
ret

LLVM IR (-O0):
define i32 @loop1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [1000 x i32]
%5 = alloca [1000 x i32]
%6 = alloca [1000 x i32]
store i32 %0, i32* %2
store i32 1, i32* %3
br label %7
7: ; preds = %27, %1
%8 = load i32, i32* %3
%9 = icmp ult i32 %8, 1000
br i1 %9, label %10, label %30
10: ; preds = %7
%11 = load i32, i32* %3
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds [1000 x i32], [1000 x i32]* %6, i64 0, i64 %12
%14 = load i32, i32* %13
%15 = load i32, i32* %3
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds [1000 x i32], [1000 x i32]* %4, i64 0, i64 %16
store i32 %14, i32* %17
%18 = load i32, i32* %3
%19 = sub i32 %18, 1
%20 = zext i32 %19 to i64
%21 = getelementptr inbounds [1000 x i32], [1000 x i32]* %4, i64 0, i64 %20
%22 = load i32, i32* %21
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %3
%25 = zext i32 %24 to i64
%26 = getelementptr inbounds [1000 x i32], [1000 x i32]* %5, i64 0, i64 %25
store i32 %23, i32* %26
br label %27
27: ; preds = %10
%28 = load i32, i32* %3
%29 = add i32 %28, 1
store i32 %29, i32* %3
br label %7
30: ; preds = %7
%31 = getelementptr inbounds [1000 x i32], [1000 x i32]* %4, i64 0, i64 998
%32 = load i32, i32* %31
%33 = getelementptr inbounds [1000 x i32], [1000 x i32]* %5, i64 0, i64 999
%34 = load i32, i32* %33
%35 = add nsw i32 %32, %34
%36 = getelementptr inbounds [1000 x i32], [1000 x i32]* %6, i64 0, i64 998
%37 = load i32, i32* %36
%38 = add nsw i32 %35, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @loop1(i32 %0) {
ret i32 undef
}
double add_double(register double u, register double v) { return u + v; }


x86 assembly (clang, -O0):
<add_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_double>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @add_double(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @add_double(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}