xunge/DecIR huggingface dataset:
int test1(int *a) {
  a = __builtin_assume_aligned(a, 32, 0ull);
  return a[0];
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @test1(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = bitcast i32* %3 to i8*
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %2
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @test1(i32* %0) {
%2 = bitcast i32* %0 to i8*
%3 = load i32, i32* %0
ret i32 %3
}
/* Variables and functions */
void *realloc(void *, int);
void *default_realloc(void *ptr, int n) { return realloc(ptr, n); }


x86 assembly (clang, -O0):
<default_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @default_realloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @realloc(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @default_realloc(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
void *malloc_dirty_pages(size_t, size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *malloc_pages(size_t len, size_t alignment) {
  void *p;
  p = malloc_dirty_pages(len, alignment);
  memset(p, 0, len);
  return p;
}


x86 assembly (clang, -O0):
<malloc_pages>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <malloc_dirty_pages@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_pages>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <malloc_dirty_pages@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1040 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @malloc_pages(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @malloc_dirty_pages(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i64, i64* %3
%11 = call i32 @memset(i8* %9, i32 0, i64 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @malloc_pages(i64 %0, i64 %1) {
%3 = tail call i8* @malloc_dirty_pages(i64 %0, i64 %1)
%4 = tail call i32 @memset(i8* %3, i32 0, i64 %0)
ret i8* %3
}
__attribute__((noipa)) void fcas1(char a[1]) {
  sink(0, a[0]);
  sink(0, a[1]);
}


x86 assembly (clang, -O0):
<fcas1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%esi
xor    %edi,%edi
mov    $0x0,%al
call   1030 <sink@plt>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%esi
xor    %edi,%edi
mov    $0x0,%al
call   1030 <sink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcas1>:
push   %rbx
mov    %rdi,%rbx
movsbl (%rdi),%esi
xor    %edi,%edi
xor    %eax,%eax
call   1030 <sink@plt>
movsbl 0x1(%rbx),%esi
xor    %edi,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <sink@plt>

LLVM IR (-O0):
define void @fcas1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = call i32 (i32, i32, ...) bitcast (i32 (...)* @sink to i32 (i32, i32, ...)*)(i32 0, i32 %6)
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = call i32 (i32, i32, ...) bitcast (i32 (...)* @sink to i32 (i32, i32, ...)*)(i32 0, i32 %11)
ret void
}

LLVM IR (-O2):
define void @fcas1(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @sink to i32 (i32, i32, ...)*)(i32 0, i32 %3)
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @sink to i32 (i32, i32, ...)*)(i32 0, i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x1b() {
  Assert_real((isodigit(27) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              140, ("isodigit should be 0 for 0x1b"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x1b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1b,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x8c,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x1b>:
push   %rax
mov    $0x1b,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x8c,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x1b\00"
define void @t_isodigit_0x1b() {
%1 = call i64 @isodigit(i32 27)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 140, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x1b\00"
define void @t_isodigit_0x1b() {
%1 = tail call i64 @isodigit(i32 27)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 140, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
void unix_fatal(const char *err_msg) {
  perror(err_msg);
  exit(1);
}


x86 assembly (clang, -O0):
<unix_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<unix_fatal>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @unix_fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @unix_fatal(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
void km_new_mapping(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<km_new_mapping>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<km_new_mapping>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.km_new_mapping = [15 x i8] c"km_new_mapping\00"
define void @km_new_mapping() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.km_new_mapping, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.km_new_mapping = [15 x i8] c"km_new_mapping\00"
define void @km_new_mapping() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.km_new_mapping, i64 0, i64 0))
ret void
}
int __attribute__((always_)) trace_putchar(int c) { return c; }


x86 assembly (clang, -O0):
<trace_putchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_putchar>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @trace_putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @trace_putchar(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int ccp(int b) {
  int a = 1;
  a++;
  a++;
  a++;
  if (b)
    abort();
  return a;
}


x86 assembly (clang, -O0):
<ccp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114e <ccp+0x3e>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccp>:
test   %edi,%edi
jne    111a <ccp+0xa>
mov    $0x4,%eax
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @ccp(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = call i32 (...) @abort()
unreachable
14: ; preds = %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @ccp(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret i32 4
}
int test_imm_98uint8_reg(unsigned char val) {
  return ((val) & (-0x98 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_98uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_98uint8_reg>:
test   $0x68,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_98uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -152
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_98uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 104
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void XIMOfIC() {}


x86 assembly (clang, -O0):
<XIMOfIC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XIMOfIC>:
ret

LLVM IR (-O0):
define void @XIMOfIC() {
ret void
}

LLVM IR (-O2):
define void @XIMOfIC() {
ret void
}
/* Variables and functions */
scalar_t__ frexp(double, int *);
long double frexpl(long double x, int *exp) {
  return (long double)frexp((double)x, exp);
}


x86 assembly (clang, -O0):
<frexpl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
mov    -0x18(%rbp),%rdi
call   1030 <frexp@plt>
mov    %rax,-0x20(%rbp)
fildll -0x20(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<frexpl>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpl  0x8(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <frexp@plt>
mov    %rax,0x10(%rsp)
fildll 0x10(%rsp)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @frexpl(x86_fp80 %0, i32* %1) {
%3 = alloca x86_fp80
%4 = alloca i32*
store x86_fp80 %0, x86_fp80* %3
store i32* %1, i32** %4
%5 = load x86_fp80, x86_fp80* %3
%6 = fptrunc x86_fp80 %5 to double
%7 = load i32*, i32** %4
%8 = call i64 @frexp(double %6, i32* %7)
%9 = sitofp i64 %8 to x86_fp80
ret x86_fp80 %9
}

LLVM IR (-O2):
define x86_fp80 @frexpl(x86_fp80 %0, i32* nocapture %1) {
%3 = fptrunc x86_fp80 %0 to double
%4 = tail call i64 @frexp(double %3, i32* %1)
%5 = sitofp i64 %4 to x86_fp80
ret x86_fp80 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xe7() {
  Assert_real((iscntrl(231) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              1160, ("iscntrl should be 0 for 0xe7"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xe7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe7,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x488,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xe7>:
push   %rax
mov    $0xe7,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x488,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xe7\00"
define void @t_iscntrl_0xe7() {
%1 = call i64 @iscntrl(i32 231)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1160, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xe7\00"
define void @t_iscntrl_0xe7() {
%1 = tail call i64 @iscntrl(i32 231)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1160, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_swap_a(struct em8051 *aCPU, int aPosition, char *aBuffer) {
  sprintf(aBuffer, "SWAP  A");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_swap_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_swap_a>:
movabs $0x41202050415753,%rax
mov    %rax,(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [8 x i8] c"SWAP A\00"
define i32 @disasm_swap_a(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
define i32 @disasm_swap_a(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
%4 = bitcast i8* %2 to i64*
store i64 18331196643694419, i64* %4
ret i32 1
}
/* Variables and functions */
float exp(float);
float pow(float, float);
float expStep(float x, float k, float n) { return exp(-k * pow(x, n)); }


x86 assembly (clang, -O0):
<expStep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
call   1040 <pow@plt>
movaps %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
mulss  %xmm1,%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expStep>:
sub    $0x18,%rsp
xorps  0xed5(%rip),%xmm1
movaps %xmm1,(%rsp)
movaps %xmm2,%xmm1
call   1040 <pow@plt>
mulss  (%rsp),%xmm0
add    $0x18,%rsp
jmp    1030 <exp@plt>

LLVM IR (-O0):
define float @expStep(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = fneg float %7
%9 = load float, float* %4
%10 = load float, float* %6
%11 = call float @pow(float %9, float %10)
%12 = fmul float %8, %11
%13 = call float @exp(float %12)
ret float %13
}

LLVM IR (-O2):
define float @expStep(float %0, float %1, float %2) {
%4 = fneg float %1
%5 = tail call float @pow(float %0, float %2)
%6 = fmul float %5, %4
%7 = tail call float @exp(float %6)
ret float %7
}
/* Variables and functions */
int O_CREAT;
int O_EXCL;
int O_RDWR;
int /*<<< orphan*/ *_mktemp(char *, int /*<<< orphan*/, int *, int);
int mkstemp(char *template) {
  int fd = -1;
  if (_mktemp(template, 0, &fd, O_RDWR | O_EXCL | O_CREAT) == NULL)
    return -1;
  return fd;
}


x86 assembly (clang, -O0):
<mkstemp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0xffffffff,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2eb2(%rip),%rax
mov    (%rax),%ecx
mov    0x2e99(%rip),%rax
or     (%rax),%ecx
mov    0x2eb8(%rip),%rax
or     (%rax),%ecx
xor    %esi,%esi
lea    -0x14(%rbp),%rdx
call   1030 <_mktemp@plt>
cmp    $0x0,%rax
jne    1163 <mkstemp+0x53>
movl   $0xffffffff,-0x4(%rbp)
jmp    1169 <mkstemp+0x59>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkstemp>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    0x2eb1(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
movl   $0xffffffff,0x4(%rsp)
ff
mov    0x2ec6(%rip),%rax
or     (%rax),%ecx
lea    0x4(%rsp),%rdx
xor    %esi,%esi
call   1030 <_mktemp@plt>
cmp    $0x1,%rax
sbb    %eax,%eax
or     0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@O_RDWR = global i32 0
@O_EXCL = global i32 0
@O_CREAT = global i32 0
define i32 @mkstemp(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 -1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @O_RDWR
%7 = load i32, i32* @O_EXCL
%8 = or i32 %6, %7
%9 = load i32, i32* @O_CREAT
%10 = or i32 %8, %9
%11 = call i32* @_mktemp(i8* %5, i32 0, i32* %4, i32 %10)
%12 = icmp eq i32* %11, null
br i1 %12, label %13, label %14
13: ; preds = %1
store i32 -1, i32* %2
br label %16
14: ; preds = %1
%15 = load i32, i32* %4
store i32 %15, i32* %2
br label %16
16: ; preds = %14, %13
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@O_RDWR = global i32 0
@O_EXCL = global i32 0
@O_CREAT = global i32 0
define i32 @mkstemp(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 -1, i32* %2
%4 = load i32, i32* @O_RDWR
%5 = load i32, i32* @O_EXCL
%6 = or i32 %5, %4
%7 = load i32, i32* @O_CREAT
%8 = or i32 %6, %7
%9 = call i32* @_mktemp(i8* %0, i32 0, i32* %2, i32 %8)
%10 = icmp eq i32* %9, null
%11 = load i32, i32* %2
%12 = select i1 %10, i32 -1, i32 %11
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int power(int, int);
void power_test(void) {
  assert(power(0, 10) == 0);
  assert(power(10, 0) == 1);
  assert(power(3, 10) == 59049);
}


x86 assembly (clang, -O0):
<power_test>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xa,%esi
call   1030 <power@plt>
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0xa,%edi
xor    %esi,%esi
call   1030 <power@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0x3,%edi
mov    $0xa,%esi
call   1030 <power@plt>
cmp    $0xe6a9,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<power_test>:
push   %rax
xor    %edi,%edi
mov    $0xa,%esi
call   1030 <power@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1040 <assert@plt>
mov    $0xa,%edi
xor    %esi,%esi
call   1030 <power@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
call   1040 <assert@plt>
mov    $0x3,%edi
mov    $0xa,%esi
call   1030 <power@plt>
xor    %edi,%edi
cmp    $0xe6a9,%eax
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @power_test() {
%1 = call i32 @power(i32 0, i32 10)
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @assert(i32 %3)
%5 = call i32 @power(i32 10, i32 0)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = call i32 @power(i32 3, i32 10)
%10 = icmp eq i32 %9, 59049
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
ret void
}

LLVM IR (-O2):
define void @power_test() {
%1 = tail call i32 @power(i32 0, i32 10)
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @power(i32 10, i32 0)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @power(i32 3, i32 10)
%10 = icmp eq i32 %9, 59049
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 %11)
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t f16(int32_t i) {
  int32_t j = 0, i0;
  while (j < i * i) {
    i0 = i;
    i = i0 + i0 + 1;
    j = i0;
  }
  return i;
}


x86 assembly (clang, -O0):
<f16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
imul   -0x4(%rbp),%ecx
cmp    %ecx,%eax
jge    113d <f16+0x3d>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110e <f16+0xe>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f16>:
mov    %edi,%eax
imul   %edi,%eax
test   %eax,%eax
je     1122 <f16+0x22>
nopl   0x0(%rax)
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
mov    %eax,%ecx
imul   %eax,%ecx
cmp    %ecx,%edi
mov    %eax,%edi
jl     1110 <f16+0x10>
ret
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = mul nsw i32 %7, %8
%10 = icmp slt i32 %6, %9
br i1 %10, label %11, label %18
11: ; preds = %5
%12 = load i32, i32* %2
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = load i32, i32* %4
%15 = add nsw i32 %13, %14
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
%17 = load i32, i32* %4
store i32 %17, i32* %3
br label %5
18: ; preds = %5
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @f16(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = icmp eq i32 %2, 0
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ %0, %1 ]
%6 = shl nsw i32 %5, 1
%7 = or i32 %6, 1
%8 = mul nsw i32 %7, %7
%9 = icmp slt i32 %5, %8
br i1 %9, label %4, label %10
10: ; preds = %4, %1
%11 = phi i32 [ %0, %1 ], [ %7, %4 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, int *);
void getMol2AtomNum(char *line, int *anum) { sscanf(line, "%d", anum); }


x86 assembly (clang, -O0):
<getMol2AtomNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <sscanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMol2AtomNum>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <sscanf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @getMol2AtomNum(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @sscanf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @getMol2AtomNum(i8* nocapture %0, i32* %1) {
%3 = tail call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_ps(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_loadl_pi(int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ _mm_setzero_ps();
void foo(__m128 *x, __m64 *y) {
  __m128 a = _mm_setzero_ps();
  __m128 b = _mm_loadl_pi(a, y);
  *x = _mm_add_ps(b, b);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <_mm_setzero_ps@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <_mm_loadl_pi@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1040 <_mm_add_ps@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %eax,%eax
call   1050 <_mm_setzero_ps@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1030 <_mm_loadl_pi@plt>
mov    %eax,%edi
mov    %eax,%esi
call   1040 <_mm_add_ps@plt>
mov    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @foo(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = call i32 (...) @_mm_setzero_ps()
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32*, i32** %4
%10 = call i32 @_mm_loadl_pi(i32 %8, i32* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = load i32, i32* %6
%13 = call i32 @_mm_add_ps(i32 %11, i32 %12)
%14 = load i32*, i32** %3
store i32 %13, i32* %14
ret void
}

LLVM IR (-O2):
define void @foo(i32* nocapture writeonly %0, i32* %1) {
%3 = tail call i32 (...) @_mm_setzero_ps()
%4 = tail call i32 @_mm_loadl_pi(i32 %3, i32* %1)
%5 = tail call i32 @_mm_add_ps(i32 %4, i32 %4)
store i32 %5, i32* %0
ret void
}
void Write_To_Bank(int val) {}


x86 assembly (clang, -O0):
<Write_To_Bank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Write_To_Bank>:
ret

LLVM IR (-O0):
define void @Write_To_Bank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @Write_To_Bank(i32 %0) {
ret void
}
/* Variables and functions */
char pfio_get_pin_bit_mask(char);
char pfio_read_input();
char pfio_digital_read(char pin_number) {
  char current_pin_values = pfio_read_input();
  char pin_bit_mask = pfio_get_pin_bit_mask(pin_number);
  return (current_pin_values & pin_bit_mask) > 0;
}


x86 assembly (clang, -O0):
<pfio_digital_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1040 <pfio_read_input@plt>
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <pfio_get_pin_bit_mask@plt>
mov    %al,-0x3(%rbp)
movsbl -0x2(%rbp),%eax
movsbl -0x3(%rbp),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfio_digital_read>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <pfio_read_input@plt>
mov    %eax,%ebx
mov    %ebp,%edi
call   1030 <pfio_get_pin_bit_mask@plt>
test   %bl,%al
setg   %al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @pfio_digital_read(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %2
%5 = call signext i8 (...) @pfio_read_input()
store i8 %5, i8* %3
%6 = load i8, i8* %2
%7 = call signext i8 @pfio_get_pin_bit_mask(i8 signext %6)
store i8 %7, i8* %4
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = and i32 %9, %11
%13 = icmp sgt i32 %12, 0
%14 = zext i1 %13 to i32
%15 = trunc i32 %14 to i8
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @pfio_digital_read(i8 signext %0) {
%2 = tail call signext i8 (...) @pfio_read_input()
%3 = tail call signext i8 @pfio_get_pin_bit_mask(i8 signext %0)
%4 = and i8 %3, %2
%5 = icmp sgt i8 %4, 0
%6 = zext i1 %5 to i8
ret i8 %6
}
/* Variables and functions */
int /*<<< orphan*/ power_down();
int /*<<< orphan*/ puts(char *);
int main() {
  puts("Hello world!");
  power_down();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1040 <power_down@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <power_down@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world!\00"
define i32 @main() {
%1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @power_down()
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello world!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @power_down()
ret i32 0
}
unsigned long msec_to_usec(unsigned long msec) { return msec * 1000; }


x86 assembly (clang, -O0):
<msec_to_usec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
imul   $0x3e8,-0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msec_to_usec>:
imul   $0x3e8,%rdi,%rax
ret

LLVM IR (-O0):
define i64 @msec_to_usec(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 1000
ret i64 %4
}

LLVM IR (-O2):
define i64 @msec_to_usec(i64 %0) {
%2 = mul i64 %0, 1000
ret i64 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t EMACPowerManagementStatusGet(uint32_t ui32Base) {
  ;
  return ((*((volatile uint32_t *)(ui32Base + 0x0000002C))) &
          (0x00000040 | 0x00000020 | 0x00000001));
}


x86 assembly (clang, -O0):
<EMACPowerManagementStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2c,%eax
cltq
mov    (%rax),%eax
and    $0x61,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACPowerManagementStatusGet>:
movslq %edi,%rax
mov    0x2c(%rax),%eax
and    $0x61,%eax
ret

LLVM IR (-O0):
define i32 @EMACPowerManagementStatusGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 44
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 97
ret i32 %8
}

LLVM IR (-O2):
define i32 @EMACPowerManagementStatusGet(i32 %0) {
%2 = add nsw i32 %0, 44
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 97
ret i32 %6
}
/* Variables and functions */
int matrizes_iguais(double **, double **, int, int);
bool confere_solucao_linear(double **X, double **X_ok, int dim) {
  return matrizes_iguais(X, X_ok, dim, 1);
}


x86 assembly (clang, -O0):
<confere_solucao_linear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x1,%ecx
call   1030 <matrizes_iguais@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<confere_solucao_linear>:
mov    $0x1,%ecx
jmp    1030 <matrizes_iguais@plt>

LLVM IR (-O0):
define i32 @confere_solucao_linear(double** %0, double** %1, i32 %2) {
%4 = alloca double**
%5 = alloca double**
%6 = alloca i32
store double** %0, double*** %4
store double** %1, double*** %5
store i32 %2, i32* %6
%7 = load double**, double*** %4
%8 = load double**, double*** %5
%9 = load i32, i32* %6
%10 = call i32 @matrizes_iguais(double** %7, double** %8, i32 %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
define i32 @confere_solucao_linear(double** %0, double** %1, i32 %2) {
%4 = tail call i32 @matrizes_iguais(double** %0, double** %1, i32 %2, i32 1)
ret i32 %4
}
int hdmi_hdcp_clear_ksv_ram(void) { return 0; }


x86 assembly (clang, -O0):
<hdmi_hdcp_clear_ksv_ram>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdmi_hdcp_clear_ksv_ram>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hdmi_hdcp_clear_ksv_ram() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hdmi_hdcp_clear_ksv_ram() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ enc32le(unsigned char *, int /*<<< orphan*/);
void range_enc32le(void *dst, const uint32_t *v, size_t num) {
  unsigned char *buf;
  buf = dst;
  while (num-- > 0) {
    enc32le(buf, *v++);
    buf += 4;
  }
}


x86 assembly (clang, -O0):
<range_enc32le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
jbe    1170 <range_enc32le+0x60>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%esi
call   1030 <enc32le@plt>
mov    -0x20(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x20(%rbp)
jmp    112c <range_enc32le+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_enc32le>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     1149 <range_enc32le+0x39>
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%r12
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%esi
mov    %r12,%rdi
call   1030 <enc32le@plt>
add    $0x4,%r12
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <range_enc32le+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @range_enc32le(i8* %0, i32* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %13, %3
%10 = load i64, i64* %6
%11 = add i64 %10, -1
store i64 %11, i64* %6
%12 = icmp ugt i64 %10, 0
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i8*, i8** %7
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i32 1
store i32* %16, i32** %5
%17 = load i32, i32* %15
%18 = call i32 @enc32le(i8* %14, i32 %17)
%19 = load i8*, i8** %7
%20 = getelementptr inbounds i8, i8* %19, i64 4
store i8* %20, i8** %7
br label %9
21: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @range_enc32le(i8* %0, i32* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i8* [ %13, %5 ], [ %0, %3 ]
%7 = phi i64 [ %9, %5 ], [ %2, %3 ]
%8 = phi i32* [ %10, %5 ], [ %1, %3 ]
%9 = add i64 %7, -1
%10 = getelementptr inbounds i32, i32* %8, i64 1
%11 = load i32, i32* %8
%12 = tail call i32 @enc32le(i8* %6, i32 %11)
%13 = getelementptr inbounds i8, i8* %6, i64 4
%14 = icmp eq i64 %9, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %3
ret void
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
unsigned long gfx_get_graphics_register_base(void) {
  return gfx_pci_config_read(0x80000914);
}


x86 assembly (clang, -O0):
<gfx_get_graphics_register_base>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000914,%edi
call   1030 <gfx_pci_config_read@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_get_graphics_register_base>:
mov    $0x80000914,%edi
jmp    1030 <gfx_pci_config_read@plt>

LLVM IR (-O0):
define i64 @gfx_get_graphics_register_base() {
%1 = call i64 @gfx_pci_config_read(i32 -2147481324)
ret i64 %1
}

LLVM IR (-O2):
define i64 @gfx_get_graphics_register_base() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147481324)
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  printf("course:EG1302A-Spring\n");
  printf("Name:Alwasam Shigdar\n");
  printf("Date created: %d/%d/%d\n", 1, 28, 2014);
  printf("Assignment 5 \n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xeeb(%rip),%rdi
mov    $0x1,%esi
mov    $0x1c,%edx
mov    $0x7de,%ecx
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef0(%rip),%rdi
call   1030 <puts@plt>
lea    0xefa(%rip),%rdi
call   1030 <puts@plt>
lea    0xec0(%rip),%rdi
mov    $0x1,%esi
mov    $0x1c,%edx
mov    $0x7de,%ecx
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xee6(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"course:EG1302A-Spring\0A\00"
@.str.1 = [22 x i8] c"Name:Alwasam Shigdar\0A\00"
@.str.2 = [24 x i8] c"Date created: %d/%d/%d\0A\00"
@.str.3 = [15 x i8] c"Assignment 5 \0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0), i32 1, i32 28, i32 2014)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.2 = [24 x i8] c"Date created: %d/%d/%d\0A\00"
@str = [22 x i8] c"course:EG1302A-Spring\00"
@str.4 = [21 x i8] c"Name:Alwasam Shigdar\00"
@str.5 = [14 x i8] c"Assignment 5 \00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0), i32 1, i32 28, i32 2014)
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.5, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_powl();
scalar_t__ powl(long double, long double);
void test_powl(long double ld1, long double ld2) {
  if (powl(ld1, ld2) != powl(ld1, ld2))
    link_failure_powl();
}


x86 assembly (clang, -O0):
<test_powl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <powl@plt>
mov    %rax,-0x28(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <powl@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
je     1175 <test_powl+0x55>
mov    $0x0,%al
call   1040 <link_failure_powl@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_powl>:
push   %rbx
sub    $0x40,%rsp
fldt   0x50(%rsp)
fld    %st(0)
fstpt  0x34(%rsp)
fldt   0x60(%rsp)
fld    %st(0)
fstpt  0x28(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
call   1030 <powl@plt>
mov    %rax,%rbx
fldt   0x28(%rsp)
fstpt  0x10(%rsp)
fldt   0x34(%rsp)
fstpt  (%rsp)
call   1030 <powl@plt>
cmp    %rax,%rbx
jne    1167 <test_powl+0x47>
add    $0x40,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
jmp    1040 <link_failure_powl@plt>

LLVM IR (-O0):
define void @test_powl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @powl(x86_fp80 %5, x86_fp80 %6)
%8 = load x86_fp80, x86_fp80* %3
%9 = load x86_fp80, x86_fp80* %4
%10 = call i64 @powl(x86_fp80 %8, x86_fp80 %9)
%11 = icmp ne i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @link_failure_powl()
br label %14
14: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @test_powl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @powl(x86_fp80 %0, x86_fp80 %1)
%4 = tail call i64 @powl(x86_fp80 %0, x86_fp80 %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @link_failure_powl()
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit_leairrx4(int /*<<< orphan*/, int, int, int);
int gen_tlb_addr_r(int ar, int map) {
  if (map >= 0) {
    emit_leairrx4(0, ar, map, ar);
  }
}


x86 assembly (clang, -O0):
<gen_tlb_addr_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1138 <gen_tlb_addr_r+0x28>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%ecx
xor    %edi,%edi
call   1030 <emit_leairrx4@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_tlb_addr_r>:
test   %esi,%esi
js     1126 <gen_tlb_addr_r+0x16>
push   %rax
mov    %esi,%edx
mov    %edi,%ecx
xor    %edi,%edi
mov    %ecx,%esi
call   1030 <emit_leairrx4@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @gen_tlb_addr_r(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = call i32 @emit_leairrx4(i32 0, i32 %9, i32 %10, i32 %11)
br label %13
13: ; preds = %8, %2
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @gen_tlb_addr_r(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @emit_leairrx4(i32 0, i32 %0, i32 %1, i32 %0)
br label %6
6: ; preds = %4, %2
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ i2d_of_void;
typedef int /*<<< orphan*/ EC_KEY;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int PEM_ASN1_write_bio(int /*<<< orphan*/ *, int /*<<< orphan*/,
                       int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                       int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                       int /*<<< orphan*/, int /*<<< orphan*/ *,
                       int /*<<< orphan*/ *);
int /*<<< orphan*/ PEM_STRING_PUBLIC;
scalar_t__ i2d_EC_PUBKEY;
int PEM_write_bio_EC_PUBKEY(BIO *bp, EC_KEY *x) {
  return PEM_ASN1_write_bio((i2d_of_void *)i2d_EC_PUBKEY, PEM_STRING_PUBLIC, bp,
                            x, NULL, NULL, 0, NULL, NULL);
}


x86 assembly (clang, -O0):
<PEM_write_bio_EC_PUBKEY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed1(%rip),%rax
mov    (%rax),%rdi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r9d
xor    %eax,%eax
mov    %r9,%r8
movl   $0x0,(%rsp)
movq   $0x0,0x8(%rsp)
movq   $0x0,0x10(%rsp)
call   1030 <PEM_ASN1_write_bio@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PEM_write_bio_EC_PUBKEY>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ed7(%rip),%rax
mov    (%rax),%rdi
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
xorps  %xmm0,%xmm0
movups %xmm0,0x8(%rsp)
movl   $0x0,(%rsp)
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <PEM_ASN1_write_bio@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@i2d_EC_PUBKEY = global i64 0
@PEM_STRING_PUBLIC = global i32 0
define i32 @PEM_write_bio_EC_PUBKEY(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i64, i64* @i2d_EC_PUBKEY
%6 = inttoptr i64 %5 to i32*
%7 = load i32, i32* @PEM_STRING_PUBLIC
%8 = load i32*, i32** %3
%9 = load i32*, i32** %4
%10 = call i32 @PEM_ASN1_write_bio(i32* %6, i32 %7, i32* %8, i32* %9, i32* null, i32* null, i32 0, i32* null, i32* null)
ret i32 %10
}

LLVM IR (-O2):
@i2d_EC_PUBKEY = global i64 0
@PEM_STRING_PUBLIC = global i32 0
define i32 @PEM_write_bio_EC_PUBKEY(i32* %0, i32* %1) {
%3 = load i64, i64* @i2d_EC_PUBKEY
%4 = inttoptr i64 %3 to i32*
%5 = load i32, i32* @PEM_STRING_PUBLIC
%6 = tail call i32 @PEM_ASN1_write_bio(i32* %4, i32 %5, i32* %0, i32* %1, i32* null, i32* null, i32 0, i32* null, i32* null)
ret i32 %6
}
/* Type definitions */
struct lemon {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ allocator_free(struct lemon *, void *);
void lemon_allocator_free(struct lemon *lemon, void *ptr) {
  allocator_free(lemon, ptr);
}


x86 assembly (clang, -O0):
<lemon_allocator_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <allocator_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lemon_allocator_free>:
jmp    1030 <allocator_free@plt>

LLVM IR (-O0):
%struct.lemon = type { i32 }
define void @lemon_allocator_free(%struct.lemon* %0, i8* %1) {
%3 = alloca %struct.lemon*
%4 = alloca i8*
store %struct.lemon* %0, %struct.lemon** %3
store i8* %1, i8** %4
%5 = load %struct.lemon*, %struct.lemon** %3
%6 = load i8*, i8** %4
%7 = call i32 @allocator_free(%struct.lemon* %5, i8* %6)
ret void
}

LLVM IR (-O2):
%struct.lemon = type { i32 }
define void @lemon_allocator_free(%struct.lemon* %0, i8* %1) {
%3 = tail call i32 @allocator_free(%struct.lemon* %0, i8* %1)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
void grid_puts(uint8_t *buf, uint16_t val) {
  buf[0] = (uint8_t)(((val) >> 8) & 0xff);
  buf[1] = (uint8_t)(val & 0xff);
}


x86 assembly (clang, -O0):
<grid_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_puts>:
mov    %esi,%eax
movzbl %ah,%ecx
mov    %rcx,(%rdi)
movzbl %al,%eax
mov    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @grid_puts(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = and i32 %6, 255
%8 = sext i32 %7 to i64
%9 = load i64*, i64** %3
%10 = getelementptr inbounds i64, i64* %9, i64 0
store i64 %8, i64* %10
%11 = load i32, i32* %4
%12 = and i32 %11, 255
%13 = sext i32 %12 to i64
%14 = load i64*, i64** %3
%15 = getelementptr inbounds i64, i64* %14, i64 1
store i64 %13, i64* %15
ret void
}

LLVM IR (-O2):
define void @grid_puts(i64* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 255
%5 = zext i32 %4 to i64
store i64 %5, i64* %0
%6 = and i32 %1, 255
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %0, i64 1
store i64 %7, i64* %8
ret void
}
void avcodec_descriptor_next() {}


x86 assembly (clang, -O0):
<avcodec_descriptor_next>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avcodec_descriptor_next>:
ret

LLVM IR (-O0):
define void @avcodec_descriptor_next() {
ret void
}

LLVM IR (-O2):
define void @avcodec_descriptor_next() {
ret void
}