xunge/DecIR huggingface dataset:
int __glsw__Alphanumeric(char c) {
  return (c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z') ||
         (c >= '0' && c <= '9') || c == '_' || c == '.';
}


x86 assembly (clang, -O0):
<__glsw__Alphanumeric>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1129 <__glsw__Alphanumeric+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    1186 <__glsw__Alphanumeric+0x86>
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1148 <__glsw__Alphanumeric+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    1186 <__glsw__Alphanumeric+0x86>
movsbl -0x1(%rbp),%eax
cmp    $0x30,%eax
jl     1167 <__glsw__Alphanumeric+0x67>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x39,%ecx
mov    %al,-0x2(%rbp)
jle    1186 <__glsw__Alphanumeric+0x86>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5f,%ecx
mov    %al,-0x2(%rbp)
je     1186 <__glsw__Alphanumeric+0x86>
movsbl -0x1(%rbp),%eax
cmp    $0x2e,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glsw__Alphanumeric>:
mov    %edi,%ecx
and    $0xdf,%cl
add    $0xbf,%cl
mov    $0x1,%eax
cmp    $0x1a,%cl
jb     1129 <__glsw__Alphanumeric+0x29>
cmp    $0x5f,%dil
je     1129 <__glsw__Alphanumeric+0x29>
lea    -0x30(%rdi),%ecx
cmp    $0xa,%cl
jb     1129 <__glsw__Alphanumeric+0x29>
xor    %eax,%eax
cmp    $0x2e,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @__glsw__Alphanumeric(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %34, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 122
br i1 %17, label %34, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sge i32 %20, 48
br i1 %21, label %22, label %26
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 57
br i1 %25, label %34, label %26
26: ; preds = %22, %18
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 95
br i1 %29, label %34, label %30
30: ; preds = %26
%31 = load i8, i8* %2
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 46
br label %34
34: ; preds = %30, %26, %22, %14, %6
%35 = phi i1 [ true, %26 ], [ true, %22 ], [ true, %14 ], [ true, %6 ], [ %33, %30 ]
%36 = zext i1 %35 to i32
ret i32 %36
}

LLVM IR (-O2):
define i32 @__glsw__Alphanumeric(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = add i8 %0, -48
%7 = icmp ult i8 %6, 10
%8 = icmp eq i8 %0, 95
%9 = or i1 %8, %7
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = icmp eq i8 %0, 46
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %5, %1, %10
%14 = phi i32 [ %12, %10 ], [ 1, %1 ], [ 1, %5 ]
ret i32 %14
}
double foo(unsigned int x) { return (double)(float)(x & 0xffffff); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffff,%eax
cvtsi2ss %eax,%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
and    $0xffffff,%edi
cvtsi2ss %edi,%xmm0
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 16777215
%5 = uitofp i32 %4 to float
%6 = fpext float %5 to double
ret double %6
}

LLVM IR (-O2):
define double @foo(i32 %0) {
%2 = and i32 %0, 16777215
%3 = uitofp i32 %2 to float
%4 = fpext float %3 to double
ret double %4
}
/* Variables and functions */
int biscTimedDrive(int, int, int);
int biscTimedDriveStraight(int velocity, int mseconds) {
  return biscTimedDrive(velocity, 0x7FFF, mseconds);
}


x86 assembly (clang, -O0):
<biscTimedDriveStraight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x7fff,%esi
call   1030 <biscTimedDrive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<biscTimedDriveStraight>:
mov    %esi,%edx
mov    $0x7fff,%esi
jmp    1030 <biscTimedDrive@plt>

LLVM IR (-O0):
define i32 @biscTimedDriveStraight(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @biscTimedDrive(i32 %5, i32 32767, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @biscTimedDriveStraight(i32 %0, i32 %1) {
%3 = tail call i32 @biscTimedDrive(i32 %0, i32 32767, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ atomic_decrement(unsigned short volatile *);
void atomic_dec_ushort(volatile unsigned short *target) {
  atomic_decrement(target);
}


x86 assembly (clang, -O0):
<atomic_dec_ushort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atomic_decrement@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_dec_ushort>:
jmp    1030 <atomic_decrement@plt>

LLVM IR (-O0):
define void @atomic_dec_ushort(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = call i32 @atomic_decrement(i16* %3)
ret void
}

LLVM IR (-O2):
define void @atomic_dec_ushort(i16* %0) {
%2 = tail call i32 @atomic_decrement(i16* %0)
ret void
}
void __attribute__((noipa, no)) my_puts(const char *str) {}


x86 assembly (clang, -O0):
<my_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_puts>:
ret

LLVM IR (-O0):
define void @my_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @my_puts(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int fork();
int /*<<< orphan*/ panic(char *);
int fork1(void) {
  int pid;
  pid = fork();
  if (pid == -1)
    panic("fork");
  return pid;
}


x86 assembly (clang, -O0):
<fork1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <fork@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    1148 <fork1+0x28>
lea    0xebd(%rip),%rdi
call   1030 <panic@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork1>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    113b <fork1+0x1b>
lea    0xeca(%rip),%rdi
call   1030 <panic@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fork\00"
define i32 @fork1() {
%1 = alloca i32
%2 = call i32 (...) @fork()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @panic(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [5 x i8] c"fork\00"
define i32 @fork1() {
%1 = tail call i32 (...) @fork()
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @panic(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 %1
}
int main(void) {
  int a;
  int b;
  int *c;
  for (a = 11; a < 50; a++) {
    for (b = 8; b < 50; b += 5) {
      c[a++] = 5;
      c[b++] = 6;
    }
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xb,-0x8(%rbp)
cmpl   $0x32,-0x8(%rbp)
jge    1180 <main+0x80>
movl   $0x8,-0xc(%rbp)
cmpl   $0x32,-0xc(%rbp)
jge    116d <main+0x6d>
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
movslq %ecx,%rcx
movl   $0x5,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movl   $0x6,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <main+0x23>
jmp    1172 <main+0x72>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
store i32 0, i32* %1
store i32 11, i32* %2
br label %5
5: ; preds = %27, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 50
br i1 %7, label %8, label %30
8: ; preds = %5
store i32 8, i32* %3
br label %9
9: ; preds = %23, %8
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 50
br i1 %11, label %12, label %26
12: ; preds = %9
%13 = load i32*, i32** %4
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
%16 = sext i32 %14 to i64
%17 = getelementptr inbounds i32, i32* %13, i64 %16
store i32 5, i32* %17
%18 = load i32*, i32** %4
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
%21 = sext i32 %19 to i64
%22 = getelementptr inbounds i32, i32* %18, i64 %21
store i32 6, i32* %22
br label %23
23: ; preds = %12
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 5
store i32 %25, i32* %3
br label %9
26: ; preds = %9
br label %27
27: ; preds = %26
%28 = load i32, i32* %2
%29 = add nsw i32 %28, 1
store i32 %29, i32* %2
br label %5
30: ; preds = %5
%31 = load i32, i32* %1
ret i32 %31
}

LLVM IR (-O2):
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateTamperEnable(void) {
  (*((volatile uint32_t *)(0x400FC360))) = 0xA3359554;
  _HibernateWriteComplete();
  (*((volatile uint32_t *)(0x400FC400))) |= 0x00000001;
  _HibernateWriteComplete();
  (*((volatile uint32_t *)(0x400FC360))) = 0;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateTamperEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc360,%eax
movl   $0xa3359554,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
mov    $0x400fc400,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    $0x400fc400,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
mov    $0x400fc360,%eax
movl   $0x0,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateTamperEnable>:
push   %rax
movl   $0xa3359554,0x400fc360
54 95 35 a3
xor    %eax,%eax
call   1030 <_HibernateWriteComplete@plt>
orl    $0x1,0x400fc400
01
xor    %eax,%eax
call   1030 <_HibernateWriteComplete@plt>
movl   $0x0,0x400fc360
xor    %eax,%eax
pop    %rcx
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateTamperEnable() {
store volatile i32 -1556769452, i32* inttoptr (i64 1074774880 to i32*)
%1 = call i32 (...) @_HibernateWriteComplete()
%2 = load volatile i32, i32* inttoptr (i64 1074775040 to i32*)
%3 = or i32 %2, 1
store volatile i32 %3, i32* inttoptr (i64 1074775040 to i32*)
%4 = call i32 (...) @_HibernateWriteComplete()
store volatile i32 0, i32* inttoptr (i64 1074774880 to i32*)
%5 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateTamperEnable() {
store volatile i32 -1556769452, i32* inttoptr (i64 1074774880 to i32*)
%1 = tail call i32 (...) @_HibernateWriteComplete()
%2 = load volatile i32, i32* inttoptr (i64 1074775040 to i32*)
%3 = or i32 %2, 1
store volatile i32 %3, i32* inttoptr (i64 1074775040 to i32*)
%4 = tail call i32 (...) @_HibernateWriteComplete()
store volatile i32 0, i32* inttoptr (i64 1074774880 to i32*)
%5 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
int gcd(int a, int b) {
  while (b != 0) {
    int c = a % b;
    a = b;
    b = c;
  }
  return a;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <gcd+0x2f>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <gcd+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
store i32 %12, i32* %5
%13 = load i32, i32* %4
store i32 %13, i32* %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ TEMP_LOW_HIGH_DriverIRQHandler();
__attribute__((weak)) void TEMP_LOW_HIGH_IRQHandler(void) {
  TEMP_LOW_HIGH_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<TEMP_LOW_HIGH_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TEMP_LOW_HIGH_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TEMP_LOW_HIGH_IRQHandler>:
xor    %eax,%eax
jmp    1030 <TEMP_LOW_HIGH_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @TEMP_LOW_HIGH_IRQHandler() {
%1 = call i32 (...) @TEMP_LOW_HIGH_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @TEMP_LOW_HIGH_IRQHandler() {
%1 = tail call i32 (...) @TEMP_LOW_HIGH_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ esc(char *);
deckpnm() { esc(">"); }


x86 assembly (clang, -O0):
<deckpnm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <esc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deckpnm>:
lea    0xee9(%rip),%rdi
jmp    1030 <esc@plt>

LLVM IR (-O0):
@.str = [2 x i8] c">\00"
define i32 @deckpnm() {
%1 = alloca i32
%2 = call i32 @esc(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [2 x i8] c">\00"
define i32 @deckpnm() {
%1 = tail call i32 @esc(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int ComboX(int loc) { return loc % 16 * 16; }


x86 assembly (clang, -O0):
<ComboX>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
shl    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ComboX>:
mov    %edi,%eax
lea    0xf(%rax),%ecx
test   %edi,%edi
cmovns %edi,%ecx
and    $0xffffff0,%ecx
sub    %ecx,%eax
shl    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @ComboX(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 16
%5 = mul nsw i32 %4, 16
ret i32 %5
}

LLVM IR (-O2):
define i32 @ComboX(i32 %0) {
%2 = srem i32 %0, 16
%3 = shl nsw i32 %2, 4
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ halfNeighbourhoodGivesHalfEndIndex();
void testNeighbourhood(void) { halfNeighbourhoodGivesHalfEndIndex(); }


x86 assembly (clang, -O0):
<testNeighbourhood>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <halfNeighbourhoodGivesHalfEndIndex@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testNeighbourhood>:
xor    %eax,%eax
jmp    1030 <halfNeighbourhoodGivesHalfEndIndex@plt>

LLVM IR (-O0):
define void @testNeighbourhood() {
%1 = call i32 (...) @halfNeighbourhoodGivesHalfEndIndex()
ret void
}

LLVM IR (-O2):
define void @testNeighbourhood() {
%1 = tail call i32 (...) @halfNeighbourhoodGivesHalfEndIndex()
ret void
}
unsigned **(wcheck_unsigned_ptr_ptr)(unsigned **to_check) { return to_check; }


x86 assembly (clang, -O0):
<wcheck_unsigned_ptr_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcheck_unsigned_ptr_ptr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32** @wcheck_unsigned_ptr_ptr(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
ret i32** %3
}

LLVM IR (-O2):
define i32** @wcheck_unsigned_ptr_ptr(i32** readnone returned %0) {
ret i32** %0
}
/* Variables and functions */
double exp(double);
double cooling(double t, double temp_final, double tau) {
  return temp_final * exp(-t / tau);
}


x86 assembly (clang, -O0):
<cooling>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
divsd  -0x18(%rbp),%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cooling>:
push   %rax
movsd  %xmm1,(%rsp)
xorpd  0xee2(%rip),%xmm0
divsd  %xmm2,%xmm0
call   1030 <exp@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @cooling(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %4
%9 = fneg double %8
%10 = load double, double* %6
%11 = fdiv double %9, %10
%12 = call double @exp(double %11)
%13 = fmul double %7, %12
ret double %13
}

LLVM IR (-O2):
define double @cooling(double %0, double %1, double %2) {
%4 = fneg double %0
%5 = fdiv double %4, %2
%6 = tail call double @exp(double %5)
%7 = fmul double %6, %1
ret double %7
}
void Init_prelude(void) {}


x86 assembly (clang, -O0):
<Init_prelude>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init_prelude>:
ret

LLVM IR (-O0):
define void @Init_prelude() {
ret void
}

LLVM IR (-O2):
define void @Init_prelude() {
ret void
}
/* Variables and functions */
void *realloc(void *, size_t);
void *s_realloc(void *ptr, size_t size) { return realloc(ptr, size); }


x86 assembly (clang, -O0):
<s_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @s_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @s_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
unsigned int __make_mantissa(char const *);
float nanf(const char *tagp) {
  union {
    float val;
    struct ieee_float {
      unsigned mantissa : 22;
      unsigned quiet : 1;
      unsigned exponent : 8;
      unsigned sign : 1;
    } bits;
  } tmp;
  tmp.bits.sign = 0u;
  tmp.bits.exponent = ~0u;
  tmp.bits.quiet = 1u;
  tmp.bits.mantissa = __make_mantissa(tagp);
  return tmp.val;
}


x86 assembly (clang, -O0):
<nanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x10(%rbp),%eax
and    $0x7fffffff,%eax
or     $0x0,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0x807fffff,%eax
or     $0x7f800000,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0xffbfffff,%eax
or     $0x400000,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__make_mantissa@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
and    $0x3fffff,%ecx
and    $0xffc00000,%eax
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanf>:
push   %rax
call   1030 <__make_mantissa@plt>
and    $0x3fffff,%eax
or     $0x7fc00000,%eax
movd   %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
%union.anon = type { float }
%struct.ieee_float = type { i32 }
define float @nanf(i8* %0) {
%2 = alloca i8*
%3 = alloca %union.anon
store i8* %0, i8** %2
%4 = bitcast %union.anon* %3 to %struct.ieee_float*
%5 = bitcast %struct.ieee_float* %4 to i32*
%6 = load i32, i32* %5
%7 = and i32 %6, 2147483647
%8 = or i32 %7, 0
store i32 %8, i32* %5
%9 = bitcast %union.anon* %3 to %struct.ieee_float*
%10 = bitcast %struct.ieee_float* %9 to i32*
%11 = load i32, i32* %10
%12 = and i32 %11, -2139095041
%13 = or i32 %12, 2139095040
store i32 %13, i32* %10
%14 = bitcast %union.anon* %3 to %struct.ieee_float*
%15 = bitcast %struct.ieee_float* %14 to i32*
%16 = load i32, i32* %15
%17 = and i32 %16, -4194305
%18 = or i32 %17, 4194304
store i32 %18, i32* %15
%19 = load i8*, i8** %2
%20 = call i32 @__make_mantissa(i8* %19)
%21 = bitcast %union.anon* %3 to %struct.ieee_float*
%22 = bitcast %struct.ieee_float* %21 to i32*
%23 = load i32, i32* %22
%24 = and i32 %20, 4194303
%25 = and i32 %23, -4194304
%26 = or i32 %25, %24
store i32 %26, i32* %22
%27 = bitcast %union.anon* %3 to float*
%28 = load float, float* %27
ret float %28
}

LLVM IR (-O2):
define float @nanf(i8* %0) {
%2 = tail call i32 @__make_mantissa(i8* %0)
%3 = and i32 %2, 4194303
%4 = or i32 %3, 2143289344
%5 = bitcast i32 %4 to float
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ hello_sub();
int main() {
  hello_sub();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hello_sub@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <hello_sub@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hello_sub()
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @hello_sub()
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ eeprom_write_block(int /*<<< orphan*/ *,
                                      int /*<<< orphan*/ *, int);
void eeprom_write_word(uint16_t *addr, uint16_t value) {
  eeprom_write_block(&value, addr, 2);
}


x86 assembly (clang, -O0):
<eeprom_write_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x2,%edx
call   1030 <eeprom_write_block@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_write_word>:
push   %rax
mov    %rdi,%rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    %rax,%rsi
mov    $0x2,%edx
call   1030 <eeprom_write_block@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @eeprom_write_word(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = call i32 @eeprom_write_block(i32* %4, i32* %5, i32 2)
ret void
}

LLVM IR (-O2):
define void @eeprom_write_word(i32* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @eeprom_write_block(i32* %3, i32* %0, i32 2)
ret void
}
int f3(int x) { return 3 * x; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @f3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 3, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f3(i32 %0) {
%2 = mul nsw i32 %0, 3
ret i32 %2
}
/* Variables and functions */
int M_PI;
double Rad2Nm(const double rad) { return rad * ((180 * 60) / M_PI); }


x86 assembly (clang, -O0):
<Rad2Nm>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x2a30,%eax
mov    0x2ece(%rip),%rcx
cltd
idivl  (%rcx)
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rad2Nm>:
mov    0x2ee1(%rip),%rcx
mov    $0x2a30,%eax
xor    %edx,%edx
idivl  (%rcx)
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
@M_PI = global i32 0
define double @Rad2Nm(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load i32, i32* @M_PI
%5 = sdiv i32 10800, %4
%6 = sitofp i32 %5 to double
%7 = fmul double %3, %6
ret double %7
}

LLVM IR (-O2):
@M_PI = global i32 0
define double @Rad2Nm(double %0) {
%2 = load i32, i32* @M_PI
%3 = sdiv i32 10800, %2
%4 = sitofp i32 %3 to double
%5 = fmul double %4, %0
ret double %5
}
void INT_Excep_SCI10_RXI10(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SCI10_RXI10>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SCI10_RXI10>:
ret

LLVM IR (-O0):
define void @INT_Excep_SCI10_RXI10() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SCI10_RXI10() {
ret void
}
/* Variables and functions */
int bar();
int main(void) { return (bar() == 42) ? 0 : 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <bar@plt>
mov    %eax,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x2a,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
xor    %ecx,%ecx
cmp    $0x2a,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @bar()
%3 = icmp eq i32 %2, 42
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @bar()
%2 = icmp ne i32 %1, 42
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
scalar_t__ acosh(float);
float acoshf(float x) { return (float)acosh(x); }


x86 assembly (clang, -O0):
<acoshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <acosh@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acoshf>:
push   %rax
call   1030 <acosh@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @acoshf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @acosh(float %3)
%5 = sitofp i64 %4 to float
ret float %5
}

LLVM IR (-O2):
define float @acoshf(float %0) {
%2 = tail call i64 @acosh(float %0)
%3 = sitofp i64 %2 to float
ret float %3
}
/* Variables and functions */
bool nrf52_errata_149(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_149>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_149>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_149() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_149() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ lwgeom_init_allocators();
void *lwrealloc_var(void *, size_t);
void *init_reallocator(void *mem, size_t size) {
  lwgeom_init_allocators();
  return lwrealloc_var(mem, size);
}


x86 assembly (clang, -O0):
<init_reallocator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <lwgeom_init_allocators@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <lwrealloc_var@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_reallocator>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <lwgeom_init_allocators@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <lwrealloc_var@plt>

LLVM IR (-O0):
define i8* @init_reallocator(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = call i32 (...) @lwgeom_init_allocators()
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @lwrealloc_var(i8* %6, i64 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @init_reallocator(i8* %0, i64 %1) {
%3 = tail call i32 (...) @lwgeom_init_allocators()
%4 = tail call i8* @lwrealloc_var(i8* %0, i64 %1)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ glutPostRedisplay();
int /*<<< orphan*/ handleAnimation();
void keyboard(unsigned char key, int x, int y) {
  switch (key) {
  case ' ': {
    handleAnimation();
    break;
  }
  default: {
    break;
  }
  }
  glutPostRedisplay();
}


x86 assembly (clang, -O0):
<keyboard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x1(%rbp),%al
sub    $0x20,%al
jne    1150 <keyboard+0x30>
jmp    1144 <keyboard+0x24>
mov    $0x0,%al
call   1030 <handleAnimation@plt>
jmp    1155 <keyboard+0x35>
jmp    1155 <keyboard+0x35>
mov    $0x0,%al
call   1040 <glutPostRedisplay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyboard>:
cmp    $0x20,%dil
jne    1132 <keyboard+0x12>
push   %rax
xor    %eax,%eax
call   1030 <handleAnimation@plt>
add    $0x8,%rsp
xor    %eax,%eax
jmp    1040 <glutPostRedisplay@plt>

LLVM IR (-O0):
define void @keyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
switch i32 %8, label %11 [
i32 32, label %9
]
9: ; preds = %3
%10 = call i32 (...) @handleAnimation()
br label %12
11: ; preds = %3
br label %12
12: ; preds = %11, %9
%13 = call i32 (...) @glutPostRedisplay()
ret void
}

LLVM IR (-O2):
define void @keyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = icmp eq i8 %0, 32
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 (...) @handleAnimation()
br label %7
7: ; preds = %3, %5
%8 = tail call i32 (...) @glutPostRedisplay()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ libfunc(char *);
int main(int argc, char **argv) {
  assert(argc == 2);
  libfunc(argv[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <libfunc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
cmp    $0x2,%edi
sete   %al
mov    %eax,%edi
call   1040 <assert@plt>
mov    0x8(%rbx),%rdi
call   1030 <libfunc@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 2
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @libfunc(i8* %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = getelementptr inbounds i8*, i8** %1, i64 1
%7 = load i8*, i8** %6
%8 = tail call i32 @libfunc(i8* %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0x1a() {
  Assert_real((isprint(26) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              135, ("isprint should be 0 for 0x1a"));
}


x86 assembly (clang, -O0):
<t_isprint_0x1a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1a,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x87,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x1a>:
push   %rax
mov    $0x1a,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x87,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x1a\00"
define void @t_isprint_0x1a() {
%1 = call i64 @isprint(i32 26)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 135, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x1a\00"
define void @t_isprint_0x1a() {
%1 = tail call i64 @isprint(i32 26)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 135, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int main(void) {
  volatile int x = 42;
  volatile int y = 0;
  x = x / y;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2a,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0x2a,-0x8(%rsp)
movl   $0x0,-0x4(%rsp)
mov    -0x8(%rsp),%eax
cltd
idivl  -0x4(%rsp)
mov    %eax,-0x8(%rsp)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store volatile i32 42, i32* %2
store volatile i32 0, i32* %3
%4 = load volatile i32, i32* %2
%5 = load volatile i32, i32* %3
%6 = sdiv i32 %4, %5
store volatile i32 %6, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store volatile i32 42, i32* %1
%4 = bitcast i32* %2 to i8*
store volatile i32 0, i32* %2
%5 = load volatile i32, i32* %1
%6 = load volatile i32, i32* %2
%7 = sdiv i32 %5, %6
store volatile i32 %7, i32* %1
ret i32 0
}
/* Variables and functions */
scalar_t__ ajMemFree(void **);
void tableDelKey(void **Pkey, void **Pvalue, void *cl) {
  ((void)(ajMemFree((void **)&*Pkey)));
  *Pvalue = NULL;
  (void)cl;
  return;
}


x86 assembly (clang, -O0):
<tableDelKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ajMemFree@plt>
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tableDelKey>:
push   %rbx
mov    %rsi,%rbx
call   1030 <ajMemFree@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @tableDelKey(i8** %0, i8** %1, i8* %2) {
%4 = alloca i8**
%5 = alloca i8**
%6 = alloca i8*
store i8** %0, i8*** %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%7 = load i8**, i8*** %4
%8 = call i64 @ajMemFree(i8** %7)
%9 = load i8**, i8*** %5
store i8* null, i8** %9
%10 = load i8*, i8** %6
ret void
}

LLVM IR (-O2):
define void @tableDelKey(i8** %0, i8** nocapture writeonly %1, i8* nocapture readnone %2) {
%4 = tail call i64 @ajMemFree(i8** %0)
store i8* null, i8** %1
ret void
}
unsigned smellslike_udp_ntp(struct Ferret *ferret, struct NetFrame *frame,
                            const unsigned char *px, unsigned length,
                            unsigned direction) {
  ferret = (ferret);
  frame = (frame);
  px = (px);
  length = (length);
  direction = (direction);
  return 1;
}


x86 assembly (clang, -O0):
<smellslike_udp_ntp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smellslike_udp_ntp>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.Ferret = type opaque
%struct.NetFrame = type opaque
define i32 @smellslike_udp_ntp(%struct.Ferret* %0, %struct.NetFrame* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca %struct.Ferret*
%7 = alloca %struct.NetFrame*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store %struct.Ferret* %0, %struct.Ferret** %6
store %struct.NetFrame* %1, %struct.NetFrame** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.Ferret*, %struct.Ferret** %6
store %struct.Ferret* %11, %struct.Ferret** %6
%12 = load %struct.NetFrame*, %struct.NetFrame** %7
store %struct.NetFrame* %12, %struct.NetFrame** %7
%13 = load i8*, i8** %8
store i8* %13, i8** %8
%14 = load i32, i32* %9
store i32 %14, i32* %9
%15 = load i32, i32* %10
store i32 %15, i32* %10
ret i32 1
}

LLVM IR (-O2):
%struct.Ferret = type opaque
%struct.NetFrame = type opaque
define i32 @smellslike_udp_ntp(%struct.Ferret* nocapture readnone %0, %struct.NetFrame* nocapture readnone %1, i8* nocapture readnone %2, i32 %3, i32 %4) {
ret i32 1
}
int foo() {
  asm goto("" : : : : label);
  return 1;
label:
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <foo+0x9>
movl   $0x1,-0x4(%rbp)
jmp    111c <foo+0x1c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
to label %2 [label %3]
2: ; preds = %0
store i32 1, i32* %1
br label %4
3: ; preds = %0
store i32 0, i32* %1
br label %4
4: ; preds = %3, %2
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo() {
to label %2 [label %1]
1: ; preds = %0
br label %2
2: ; preds = %0, %1
%3 = phi i32 [ 0, %1 ], [ 1, %0 ]
ret i32 %3
}
/* Type definitions */
struct timespec {
  unsigned long long tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
long long unsigned minus_time(struct timespec *a, struct timespec *b) {
  long long unsigned result = 1000000000;
  result *= (a->tv_sec - b->tv_sec);
  result += (a->tv_nsec - b->tv_nsec);
  return (result);
}


x86 assembly (clang, -O0):
<minus_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x3b9aca00,-0x18(%rbp)
3b
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
sub    0x8(%rcx),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minus_time>:
mov    (%rdi),%rcx
mov    0x8(%rdi),%rax
sub    (%rsi),%rcx
imul   $0x3b9aca00,%rcx,%rcx
sub    0x8(%rsi),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i64 @minus_time(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
%5 = alloca i64
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
store i64 1000000000, i64* %5
%6 = load %struct.timespec*, %struct.timespec** %3
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 0
%8 = load i64, i64* %7
%9 = load %struct.timespec*, %struct.timespec** %4
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %9, i32 0, i32 0
%11 = load i64, i64* %10
%12 = sub i64 %8, %11
%13 = load i64, i64* %5
%14 = mul i64 %13, %12
store i64 %14, i64* %5
%15 = load %struct.timespec*, %struct.timespec** %3
%16 = getelementptr inbounds %struct.timespec, %struct.timespec* %15, i32 0, i32 1
%17 = load i64, i64* %16
%18 = load %struct.timespec*, %struct.timespec** %4
%19 = getelementptr inbounds %struct.timespec, %struct.timespec* %18, i32 0, i32 1
%20 = load i64, i64* %19
%21 = sub nsw i64 %17, %20
%22 = load i64, i64* %5
%23 = add i64 %22, %21
store i64 %23, i64* %5
%24 = load i64, i64* %5
ret i64 %24
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define i64 @minus_time(%struct.timespec* nocapture %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = sub i64 %4, %6
%8 = mul i64 %7, 1000000000
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%10 = load i64, i64* %9
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%12 = load i64, i64* %11
%13 = sub i64 %10, %12
%14 = add i64 %13, %8
ret i64 %14
}
/* Type definitions */
struct group {
  int gr_gid;
};
typedef int gid_t;

/* Variables and functions */
struct group *getgrnam(int /*<<< orphan*/);
int /*<<< orphan*/ getlogin();
gid_t getgid(void) {
  struct group *g;
  g = getgrnam(getlogin());
  return g ? g->gr_gid : 1;
}


x86 assembly (clang, -O0):
<getgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <getlogin@plt>
mov    %eax,%edi
call   1030 <getgrnam@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1153 <getgid+0x33>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
jmp    1160 <getgid+0x40>
mov    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1160 <getgid+0x40>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgid>:
push   %rax
xor    %eax,%eax
call   1040 <getlogin@plt>
mov    %eax,%edi
call   1030 <getgrnam@plt>
test   %rax,%rax
je     1138 <getgid+0x18>
mov    (%rax),%eax
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.group = type { i32 }
define i32 @getgid() {
%1 = alloca %struct.group*
%2 = call i32 (...) @getlogin()
%3 = call %struct.group* @getgrnam(i32 %2)
store %struct.group* %3, %struct.group** %1
%4 = load %struct.group*, %struct.group** %1
%5 = icmp ne %struct.group* %4, null
br i1 %5, label %6, label %10
6: ; preds = %0
%7 = load %struct.group*, %struct.group** %1
%8 = getelementptr inbounds %struct.group, %struct.group* %7, i32 0, i32 0
%9 = load i32, i32* %8
br label %11
10: ; preds = %0
br label %11
11: ; preds = %10, %6
%12 = phi i32 [ %9, %6 ], [ 1, %10 ]
ret i32 %12
}

LLVM IR (-O2):
%struct.group = type { i32 }
define i32 @getgid() {
%1 = tail call i32 (...) @getlogin()
%2 = tail call %struct.group* @getgrnam(i32 %1)
%3 = icmp eq %struct.group* %2, null
br i1 %3, label %7, label %4
4: ; preds = %0
%5 = getelementptr inbounds %struct.group, %struct.group* %2, i64 0, i32 0
%6 = load i32, i32* %5
br label %7
7: ; preds = %0, %4
%8 = phi i32 [ %6, %4 ], [ 1, %0 ]
ret i32 %8
}
int statfs(const char *path, struct statfs *buf) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  return 0;
}


x86 assembly (clang, -O0):
<statfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
lea    0xed7(%rip),%rsi
lea    0xee2(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<statfs>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.statfs = type opaque
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.statfs = [7 x i8] c"statfs\00"
define i32 @statfs(i8* %0, %struct.statfs* %1) {
%3 = alloca i8*
%4 = alloca %struct.statfs*
store i8* %0, i8** %3
store %struct.statfs* %1, %struct.statfs** %4
%5 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.statfs, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.statfs = type opaque
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.statfs = [7 x i8] c"statfs\00"
define i32 @statfs(i8* nocapture readnone %0, %struct.statfs* nocapture readnone %1) {
%3 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.statfs, i64 0, i64 0))
ret i32 0
}
void i_return_nothing(void) {}


x86 assembly (clang, -O0):
<i_return_nothing>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_return_nothing>:
ret

LLVM IR (-O0):
define void @i_return_nothing() {
ret void
}

LLVM IR (-O2):
define void @i_return_nothing() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HD44780_DisplayN_POS(unsigned long, scalar_t__, int, int,
                                        int);
void DISPLAY_DUTY(unsigned int duty) {
  unsigned long duty_percent;
  duty_percent = duty << 2;
  HD44780_DisplayN_POS(duty_percent, 0 + 9, 1, 5, 1);
}


x86 assembly (clang, -O0):
<DISPLAY_DUTY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x9,%esi
mov    $0x1,%r8d
mov    $0x5,%ecx
mov    %r8d,%edx
call   1030 <HD44780_DisplayN_POS@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DISPLAY_DUTY>:
shl    $0x2,%edi
mov    $0x9,%esi
mov    $0x1,%edx
mov    $0x5,%ecx
mov    $0x1,%r8d
jmp    1030 <HD44780_DisplayN_POS@plt>

LLVM IR (-O0):
define void @DISPLAY_DUTY(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = shl i32 %4, 2
%6 = zext i32 %5 to i64
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = call i32 @HD44780_DisplayN_POS(i64 %7, i64 9, i32 1, i32 5, i32 1)
ret void
}

LLVM IR (-O2):
define void @DISPLAY_DUTY(i32 %0) {
%2 = shl i32 %0, 2
%3 = zext i32 %2 to i64
%4 = tail call i32 @HD44780_DisplayN_POS(i64 %3, i64 9, i32 1, i32 5, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
void report_leak_in_correct_line_bad(int *x) {
  x = (int *)malloc(sizeof(int));
  if (x != NULL) {
    return;
  }
  free(x);
}


x86 assembly (clang, -O0):
<report_leak_in_correct_line_bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114a <report_leak_in_correct_line_bad+0x2a>
jmp    1153 <report_leak_in_correct_line_bad+0x33>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_leak_in_correct_line_bad>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <report_leak_in_correct_line_bad+0x12>
pop    %rax
ret
xor    %edi,%edi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @report_leak_in_correct_line_bad(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = icmp ne i32* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
br label %11
8: ; preds = %1
%9 = load i32*, i32** %2
%10 = call i32 @free(i32* %9)
br label %11
11: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @report_leak_in_correct_line_bad(i32* nocapture readnone %0) {
%2 = tail call i64 @malloc(i32 4)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @free(i32* null)
br label %6
6: ; preds = %1, %4
ret void
}