xunge/DecIR huggingface dataset:
unsigned long lib$expand_nodename(const struct dsc$descriptor_s *name,
                                  struct dsc$descriptor_s *xname,
                                  unsigned short *xname_len) {
  return 0;
}


x86 assembly (clang, -O0):
<lib$expand_nodename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib$expand_nodename>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%"struct.dsc$descriptor_s" = type opaque
define i64 @"lib$expand_nodename"(%"struct.dsc$descriptor_s"* %0, %"struct.dsc$descriptor_s"* %1, i16* %2) {
%4 = alloca %"struct.dsc$descriptor_s"*
%5 = alloca %"struct.dsc$descriptor_s"*
%6 = alloca i16*
store %"struct.dsc$descriptor_s"* %0, %"struct.dsc$descriptor_s"** %4
store %"struct.dsc$descriptor_s"* %1, %"struct.dsc$descriptor_s"** %5
store i16* %2, i16** %6
ret i64 0
}

LLVM IR (-O2):
%"struct.dsc$descriptor_s" = type opaque
define i64 @"lib$expand_nodename"(%"struct.dsc$descriptor_s"* nocapture readnone %0, %"struct.dsc$descriptor_s"* nocapture readnone %1, i16* nocapture readnone %2) {
ret i64 0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x;
  int y;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  while (x >= y + 1) {
    y = y + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
cmp    %ecx,%eax
jl     1152 <main+0x42>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <main+0x23>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
br label %6
6: ; preds = %11, %0
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
%10 = icmp sge i32 %7, %9
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %6
14: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int strcmp(void *, void *);
int compare_strings(void *key_a, void *key_b) { return strcmp(key_a, key_b); }


x86 assembly (clang, -O0):
<compare_strings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_strings>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare_strings(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @compare_strings(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
/* Variables and functions */
int abs(int);
float next_layer(float);
float range_mid(int, int);
int nor_rand(int start, int end) {
  float pile = range_mid(start, end);
  int curr_layer = abs(start - end);
  while (curr_layer > 0) {
    pile = next_layer(pile);
    curr_layer--;
  }
  return (int)pile;
}


x86 assembly (clang, -O0):
<nor_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <range_mid@plt>
movss  %xmm0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <abs@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1183 <nor_rand+0x53>
movss  -0xc(%rbp),%xmm0
call   1050 <next_layer@plt>
movss  %xmm0,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    115c <nor_rand+0x2c>
cvttss2si -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nor_rand>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <range_mid@plt>
sub    %ebp,%ebx
je     114d <nor_rand+0x2d>
mov    %ebx,%ebp
neg    %ebp
cmovs  %ebx,%ebp
add    $0x1,%ebp
nopw   0x0(%rax,%rax,1)
call   1040 <next_layer@plt>
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1140 <nor_rand+0x20>
cvttss2si %xmm0,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @nor_rand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call float @range_mid(i32 %7, i32 %8)
store float %9, float* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = sub nsw i32 %10, %11
%13 = call i32 @abs(i32 %12)
store i32 %13, i32* %6
br label %14
14: ; preds = %17, %2
%15 = load i32, i32* %6
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %22
17: ; preds = %14
%18 = load float, float* %5
%19 = call float @next_layer(float %18)
store float %19, float* %5
%20 = load i32, i32* %6
%21 = add nsw i32 %20, -1
store i32 %21, i32* %6
br label %14
22: ; preds = %14
%23 = load float, float* %5
%24 = fptosi float %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @nor_rand(i32 %0, i32 %1) {
%3 = tail call float @range_mid(i32 %0, i32 %1)
%4 = sub nsw i32 %0, %1
%5 = icmp eq i32 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %2
%7 = tail call i32 @llvm.abs.i32(i32 %4, i1 true)
br label %8
8: ; preds = %6, %8
%9 = phi i32 [ %12, %8 ], [ %7, %6 ]
%10 = phi float [ %11, %8 ], [ %3, %6 ]
%11 = tail call float @next_layer(float %10)
%12 = add nsw i32 %9, -1
%13 = icmp ugt i32 %9, 1
br i1 %13, label %8, label %14
14: ; preds = %8, %2
%15 = phi float [ %3, %2 ], [ %11, %8 ]
%16 = fptosi float %15 to i32
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ quick_sort(int *, int, int, int /*<<< orphan*/);
void sort(int *vetor, int esq, int dir) { quick_sort(vetor, esq, dir, 0); }


x86 assembly (clang, -O0):
<sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %ecx,%ecx
call   1030 <quick_sort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort>:
xor    %ecx,%ecx
jmp    1030 <quick_sort@plt>

LLVM IR (-O0):
define void @sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @quick_sort(i32* %7, i32 %8, i32 %9, i32 0)
ret void
}

LLVM IR (-O2):
define void @sort(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @quick_sort(i32* %0, i32 %1, i32 %2, i32 0)
ret void
}
cbuf16(f, n) { return (cbuf(f, n, 16)); }


x86 assembly (clang, -O0):
<cbuf16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x10,%edx
mov    $0x0,%al
call   1030 <cbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf16>:
mov    $0x10,%edx
xor    %eax,%eax
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %5, i32 %6, i32 16)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cbuf16(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %1, i32 16)
ret i32 %3
}
void process_header_content_length(void *vp_hdr, void *vp_val, void *vp_msg) {}


x86 assembly (clang, -O0):
<process_header_content_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_header_content_length>:
ret

LLVM IR (-O0):
define void @process_header_content_length(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @process_header_content_length(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
int f(void) { return 2; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 2
}

LLVM IR (-O2):
define i32 @f() {
ret i32 2
}
/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_unsigned_char(unsigned char const k1,
                                            unsigned char const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_unsigned_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_unsigned_char>:
xor    %eax,%eax
cmp    %sil,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_unsigned_char(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = icmp eq i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_unsigned_char(i8 zeroext %0, i8 zeroext %1) {
%3 = icmp eq i8 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_BCuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xBC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BCuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xbc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BCuint64_highword_mem>:
testb  $0xbc,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BCuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 188
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_BCuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 807453851648
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ match(char);
void doProcedure() { match('p'); }


x86 assembly (clang, -O0):
<doProcedure>:
push   %rbp
mov    %rsp,%rbp
mov    $0x70,%edi
call   1030 <match@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doProcedure>:
mov    $0x70,%edi
jmp    1030 <match@plt>

LLVM IR (-O0):
define void @doProcedure() {
%1 = call i32 @match(i8 signext 112)
ret void
}

LLVM IR (-O2):
define void @doProcedure() {
%1 = tail call i32 @match(i8 signext 112)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int does_it_work() {
  int y, x = 3;
  f(x);
}


x86 assembly (clang, -O0):
<does_it_work>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <f@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<does_it_work>:
mov    $0x3,%edi
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @does_it_work() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 3, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @f(i32 %4)
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @does_it_work() {
%1 = tail call i32 @f(i32 3)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void startWarranty() {
  printf("Thank you for placing your order with us!"
         " Your order warrenty has now begun.\n");
}


x86 assembly (clang, -O0):
<startWarranty>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<startWarranty>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [78 x i8] c"Thank you for placing your order with us! Your order warrenty has now begun.\0A\00"
define void @startWarranty() {
%1 = call i32 @printf(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [77 x i8] c"Thank you for placing your order with us! Your order warrenty has now begun.\00"
define void @startWarranty() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([77 x i8], [77 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int setpag();
int afshelper_setpag() { return setpag(); }


x86 assembly (clang, -O0):
<afshelper_setpag>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setpag@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<afshelper_setpag>:
xor    %eax,%eax
jmp    1030 <setpag@plt>

LLVM IR (-O0):
define i32 @afshelper_setpag() {
%1 = call i32 (...) @setpag()
ret i32 %1
}

LLVM IR (-O2):
define i32 @afshelper_setpag() {
%1 = tail call i32 (...) @setpag()
ret i32 %1
}
/* Type definitions */
struct timeval {
  unsigned long tv_sec;
  unsigned long tv_usec;
};

/* Variables and functions */
unsigned long time_elapsed(struct timeval *last, struct timeval *current) {
  unsigned long secs, diff;
  secs = current->tv_sec - last->tv_sec;
  diff = 1000000 * secs + current->tv_usec - last->tv_usec;
  return (diff);
}


x86 assembly (clang, -O0):
<time_elapsed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%rax
mov    %rax,-0x18(%rbp)
imul   $0xf4240,-0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
add    0x8(%rcx),%rax
mov    -0x8(%rbp),%rcx
sub    0x8(%rcx),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_elapsed>:
mov    (%rsi),%rax
sub    (%rdi),%rax
imul   $0xf4240,%rax,%rax
add    0x8(%rsi),%rax
sub    0x8(%rdi),%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i64 @time_elapsed(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
%5 = alloca i64
%6 = alloca i64
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%7 = load %struct.timeval*, %struct.timeval** %4
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 0
%9 = load i64, i64* %8
%10 = load %struct.timeval*, %struct.timeval** %3
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %10, i32 0, i32 0
%12 = load i64, i64* %11
%13 = sub i64 %9, %12
store i64 %13, i64* %5
%14 = load i64, i64* %5
%15 = mul i64 1000000, %14
%16 = load %struct.timeval*, %struct.timeval** %4
%17 = getelementptr inbounds %struct.timeval, %struct.timeval* %16, i32 0, i32 1
%18 = load i64, i64* %17
%19 = add i64 %15, %18
%20 = load %struct.timeval*, %struct.timeval** %3
%21 = getelementptr inbounds %struct.timeval, %struct.timeval* %20, i32 0, i32 1
%22 = load i64, i64* %21
%23 = sub i64 %19, %22
store i64 %23, i64* %6
%24 = load i64, i64* %6
ret i64 %24
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i64 @time_elapsed(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%6 = load i64, i64* %5
%7 = sub i64 %4, %6
%8 = mul i64 %7, 1000000
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%10 = load i64, i64* %9
%11 = add i64 %8, %10
%12 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%13 = load i64, i64* %12
%14 = sub i64 %11, %13
ret i64 %14
}
void kol_paint_start() { asm("int $0x40" ::"a"(12), "b"(1)); }


x86 assembly (clang, -O0):
<kol_paint_start>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0xc,%eax
mov    $0x1,%ebx
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_paint_start>:
push   %rbx
mov    $0xc,%eax
mov    $0x1,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_paint_start() {
ret void
}

LLVM IR (-O2):
define void @kol_paint_start() {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 12, i32 1)
ret void
}
int sumR_r(int arr[], int n) {
  if (n == 0) {
    return 0;
  } else {
    return sumR_r(arr, n - 1) + arr[n - 1];
  }
}


x86 assembly (clang, -O0):
<sumR_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1135 <sumR_r+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1157 <sumR_r+0x47>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1030 <sumR_r@plt>
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
movslq %edx,%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumR_r>:
test   %esi,%esi
je     1135 <sumR_r+0x25>
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    -0x1(%rbx),%esi
call   1030 <sumR_r@plt>
movslq %ebx,%rcx
add    -0x4(%r14,%rcx,4),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sumR_r(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %21
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = call i32 @sumR_r(i32* %10, i32 %12)
%14 = load i32*, i32** %4
%15 = load i32, i32* %5
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %14, i64 %17
%19 = load i32, i32* %18
%20 = add nsw i32 %13, %19
store i32 %20, i32* %3
br label %21
21: ; preds = %9, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @sumR_r(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi i32 [ %12, %6 ], [ 0, %2 ]
ret i32 %5
6: ; preds = %2
%7 = add nsw i32 %1, -1
%8 = tail call i32 @sumR_r(i32* %0, i32 %7)
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = add nsw i32 %11, %8
br label %4
}
int comm_cb_nop(char *buf, int len) {
  (void)buf;
  (void)len;
  return 1;
}


x86 assembly (clang, -O0):
<comm_cb_nop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comm_cb_nop>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @comm_cb_nop(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @comm_cb_nop(i8* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printer_set_positioning_absolute();
int G90_f(char *s) {
  printer_set_positioning_absolute();
  return 1;
}


x86 assembly (clang, -O0):
<G90_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <printer_set_positioning_absolute@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<G90_f>:
push   %rax
xor    %eax,%eax
call   1030 <printer_set_positioning_absolute@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @G90_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @printer_set_positioning_absolute()
ret i32 1
}

LLVM IR (-O2):
define i32 @G90_f(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @printer_set_positioning_absolute()
ret i32 1
}
void ctl_master_volume(int mv) {}


x86 assembly (clang, -O0):
<ctl_master_volume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctl_master_volume>:
ret

LLVM IR (-O0):
define void @ctl_master_volume(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @ctl_master_volume(i32 %0) {
ret void
}
void updateUserGameDataDir() {}


x86 assembly (clang, -O0):
<updateUserGameDataDir>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateUserGameDataDir>:
ret

LLVM IR (-O0):
define void @updateUserGameDataDir() {
ret void
}

LLVM IR (-O2):
define void @updateUserGameDataDir() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bwt_bwtgen2(char const *, char const *, int);
void bwt_bwtgen(const char *fn_pac, const char *fn_bwt) {
  bwt_bwtgen2(fn_pac, fn_bwt, 10000000);
}


x86 assembly (clang, -O0):
<bwt_bwtgen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x989680,%edx
call   1030 <bwt_bwtgen2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwt_bwtgen>:
mov    $0x989680,%edx
jmp    1030 <bwt_bwtgen2@plt>

LLVM IR (-O0):
define void @bwt_bwtgen(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @bwt_bwtgen2(i8* %5, i8* %6, i32 10000000)
ret void
}

LLVM IR (-O2):
define void @bwt_bwtgen(i8* %0, i8* %1) {
%3 = tail call i32 @bwt_bwtgen2(i8* %0, i8* %1, i32 10000000)
ret void
}
int test_imm_55int8_mem(signed char *val) {
  return ((*val) & (0x55 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_55int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x55,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_55int8_mem>:
testb  $0x55,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_55int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 85
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_55int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 85
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void save_tar(struct thread_struct *prev) {}


x86 assembly (clang, -O0):
<save_tar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_tar>:
ret

LLVM IR (-O0):
%struct.thread_struct = type opaque
define void @save_tar(%struct.thread_struct* %0) {
%2 = alloca %struct.thread_struct*
store %struct.thread_struct* %0, %struct.thread_struct** %2
ret void
}

LLVM IR (-O2):
%struct.thread_struct = type opaque
define void @save_tar(%struct.thread_struct* nocapture %0) {
ret void
}
extern int shmem_int_finc(int *target, int pe) { return *target; }


x86 assembly (clang, -O0):
<shmem_int_finc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_int_finc>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @shmem_int_finc(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @shmem_int_finc(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void u32_to_le(uint8_t *dst, uint32_t u32) {
  dst[3] = (u32 >> 24) & 0xFF;
  dst[2] = (u32 >> 16) & 0xFF;
  dst[1] = (u32 >> 8) & 0xFF;
  dst[0] = u32 & 0xFF;
}


x86 assembly (clang, -O0):
<u32_to_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<u32_to_le>:
mov    %esi,%eax
mov    %esi,%ecx
movzbl %ah,%edx
movzbl %al,%esi
shr    $0x18,%eax
mov    %eax,0xc(%rdi)
shr    $0x10,%ecx
movzbl %cl,%eax
mov    %eax,0x8(%rdi)
mov    %edx,0x4(%rdi)
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @u32_to_le(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = and i32 %6, 255
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 3
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = ashr i32 %10, 16
%12 = and i32 %11, 255
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 2
store i32 %12, i32* %14
%15 = load i32, i32* %4
%16 = ashr i32 %15, 8
%17 = and i32 %16, 255
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 1
store i32 %17, i32* %19
%20 = load i32, i32* %4
%21 = and i32 %20, 255
%22 = load i32*, i32** %3
%23 = getelementptr inbounds i32, i32* %22, i64 0
store i32 %21, i32* %23
ret void
}

LLVM IR (-O2):
define void @u32_to_le(i32* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %3, i32* %4
%5 = lshr i32 %1, 16
%6 = and i32 %5, 255
%7 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %6, i32* %7
%8 = lshr i32 %1, 8
%9 = and i32 %8, 255
%10 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %9, i32* %10
%11 = and i32 %1, 255
store i32 %11, i32* %0
ret void
}
/* Variables and functions */
int add(int, int);
double multiply(int, int);
int /*<<< orphan*/ printf(char *, double);
int main() {
  int i = add(3, 5);
  printf("%i\n", i);
  printf("%.2f\n", multiply(2, 3));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
mov    $0x5,%esi
call   1030 <add@plt>
mov    %eax,-0x8(%rbp)
cvtsi2sdl -0x8(%rbp),%xmm0
lea    0xea3(%rip),%rdi
call   1050 <printf@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <multiply@plt>
lea    0xe8c(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
mov    $0x5,%esi
call   1030 <add@plt>
cvtsi2sd %eax,%xmm0
lea    0xeb5(%rip),%rdi
call   1050 <printf@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <multiply@plt>
lea    0xe9e(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [6 x i8] c"%.2f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @add(i32 3, i32 5)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to double
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %5)
%7 = call double @multiply(i32 2, i32 3)
%8 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), double %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [6 x i8] c"%.2f\0A\00"
define i32 @main() {
%1 = tail call i32 @add(i32 3, i32 5)
%2 = sitofp i32 %1 to double
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %2)
%4 = tail call double @multiply(i32 2, i32 3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), double %4)
ret i32 0
}
void outb(unsigned short _port, unsigned char _data) {
  asm volatile("outb %1, %0" : : "dN"(_port), "a"(_data));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x3(%rbp),%al
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i16, i16* %3
%6 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb $1, $0", "{dx}N,{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i8 %1)
ret void
}
/* Variables and functions */
void *ts_dynarr_resize(void *, int /*<<< orphan*/);
void *ts_dynarr_clear(void *da) { return ts_dynarr_resize(da, 0); }


x86 assembly (clang, -O0):
<ts_dynarr_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <ts_dynarr_resize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_dynarr_clear>:
xor    %esi,%esi
jmp    1030 <ts_dynarr_resize@plt>

LLVM IR (-O0):
define i8* @ts_dynarr_clear(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @ts_dynarr_resize(i8* %3, i32 0)
ret i8* %4
}

LLVM IR (-O2):
define i8* @ts_dynarr_clear(i8* %0) {
%2 = tail call i8* @ts_dynarr_resize(i8* %0, i32 0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ srandom(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void init_randomness(void) { srandom(time(NULL)); }


x86 assembly (clang, -O0):
<init_randomness>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_randomness>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srandom@plt>

LLVM IR (-O0):
define void @init_randomness() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srandom(i32 %1)
ret void
}

LLVM IR (-O2):
define void @init_randomness() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srandom(i32 %1)
ret void
}
int _kill(pid, sig)
int pid;
int sig;
{
  if (pid == 1)
    _exit(sig);
  return 0;
}


x86 assembly (clang, -O0):
<_kill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1130 <_kill+0x20>
mov    -0x8(%rbp),%edi
call   1030 <_exit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_kill>:
cmp    $0x1,%edi
je     1118 <_kill+0x8>
xor    %eax,%eax
ret
push   %rax
mov    %esi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @_kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %4
unreachable
9: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @_kill(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %5
4: ; preds = %2
tail call void @_exit(i32 %1)
unreachable
5: ; preds = %2
ret i32 0
}
int Operand_uimm8x4_decode(unsigned int *valp) {
  unsigned uimm8x4_0, imm8_0;
  imm8_0 = *valp & 0xff;
  uimm8x4_0 = imm8_0 << 2;
  *valp = uimm8x4_0;
  return 0;
}


x86 assembly (clang, -O0):
<Operand_uimm8x4_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_uimm8x4_decode>:
mov    (%rdi),%eax
movzbl %al,%eax
shl    $0x2,%eax
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_uimm8x4_decode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = and i32 %6, 255
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = shl i32 %8, 2
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = load i32*, i32** %2
store i32 %10, i32* %11
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_uimm8x4_decode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 2
%4 = and i32 %3, 1020
store i32 %4, i32* %0
ret i32 0
}
int utf8Len(unsigned char *utf8) {
  int count;
  for (count = 0; *utf8; count++) {
    int x = *utf8;
    utf8 += (x & 0x80) ? ((x & 0x20) ? 3 : 2) : 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<utf8Len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1181 <utf8Len+0x81>
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1155 <utf8Len+0x55>
mov    -0x10(%rbp),%edx
and    $0x20,%edx
mov    $0x2,%eax
mov    $0x3,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x14(%rbp)
jmp    1162 <utf8Len+0x62>
mov    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1162 <utf8Len+0x62>
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <utf8Len+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8Len>:
mov    (%rdi),%dl
xor    %eax,%eax
test   %dl,%dl
je     1139 <utf8Len+0x39>
mov    $0x1,%ecx
nopl   (%rax)
movzbl %dl,%edx
mov    %edx,%esi
and    $0x20,%esi
cmp    $0x1,%esi
mov    $0x3,%esi
sbb    $0x0,%rsi
test   $0x80,%dl
cmove  %rcx,%rsi
movzbl (%rdi,%rsi,1),%edx
add    %rsi,%rdi
add    $0x1,%eax
test   %dl,%dl
jne    1110 <utf8Len+0x10>
ret

LLVM IR (-O0):
define i32 @utf8Len(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %28, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %31
9: ; preds = %5
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = and i32 %13, 128
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %9
%17 = load i32, i32* %4
%18 = and i32 %17, 32
%19 = icmp ne i32 %18, 0
%20 = zext i1 %19 to i64
%21 = select i1 %19, i32 3, i32 2
br label %23
22: ; preds = %9
br label %23
23: ; preds = %22, %16
%24 = phi i32 [ %21, %16 ], [ 1, %22 ]
%25 = load i8*, i8** %2
%26 = sext i32 %24 to i64
%27 = getelementptr inbounds i8, i8* %25, i64 %26
store i8* %27, i8** %2
br label %28
28: ; preds = %23
%29 = load i32, i32* %3
%30 = add nsw i32 %29, 1
store i32 %30, i32* %3
br label %5
31: ; preds = %5
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @utf8Len(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %17, %4 ], [ %2, %1 ]
%6 = phi i8* [ %15, %4 ], [ %0, %1 ]
%7 = phi i32 [ %16, %4 ], [ 0, %1 ]
%8 = zext i8 %5 to i32
%9 = and i32 %8, 128
%10 = icmp eq i32 %9, 0
%11 = and i32 %8, 32
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, i64 2, i64 3
%14 = select i1 %10, i64 1, i64 %13
%15 = getelementptr inbounds i8, i8* %6, i64 %14
%16 = add nuw nsw i32 %7, 1
%17 = load i8, i8* %15
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %4
19: ; preds = %4, %1
%20 = phi i32 [ 0, %1 ], [ %16, %4 ]
ret i32 %20
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
void append_filename(char *dest, char *s1, char *s2, int size) {
  sprintf(dest, "%s%s", s1, s2);
}


x86 assembly (clang, -O0):
<append_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xec6(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append_filename>:
mov    %rdx,%rcx
mov    %rsi,%rdx
lea    0xee3(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%s%s\00"
define void @append_filename(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %10, i8* %11)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%s%s\00"
define void @append_filename(i8* nocapture writeonly %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void usage(char *prog) {
  printf("usage: %s infile\n", prog);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"usage: %s infile\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [18 x i8] c"usage: %s infile\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
void Ustar_newt2c(double *prim, double *Us, double sK, double sC, double x[2],
                  struct parList *pars) {}


x86 assembly (clang, -O0):
<Ustar_newt2c>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ustar_newt2c>:
ret

LLVM IR (-O0):
%struct.parList = type opaque
define void @Ustar_newt2c(double* %0, double* %1, double %2, double %3, double* %4, %struct.parList* %5) {
%7 = alloca double*
%8 = alloca double*
%9 = alloca double
%10 = alloca double
%11 = alloca double*
%12 = alloca %struct.parList*
store double* %0, double** %7
store double* %1, double** %8
store double %2, double* %9
store double %3, double* %10
store double* %4, double** %11
store %struct.parList* %5, %struct.parList** %12
ret void
}

LLVM IR (-O2):
%struct.parList = type opaque
define void @Ustar_newt2c(double* nocapture %0, double* nocapture %1, double %2, double %3, double* nocapture %4, %struct.parList* nocapture %5) {
ret void
}
int *asus_get_physToGpio(int rev) {
  static int physToGpio_AP[64] = {
      -1,         -1,         -1,         (4 + 248),  -1,         (5 + 248),
      -1,         17,         (9 + 152),  -1,         (8 + 152),  (12 + 152),
      (184),      (14 + 152), -1,         (15 + 152), (10 + 152), -1,
      (11 + 152), (9 + 248),  -1,         (8 + 248),  (19 + 152), (6 + 248),
      (7 + 248),  -1,         (3 + 248),  (17 + 216), (18 + 216), (13 + 152),
      -1,         (16 + 152), (23 + 216), (22 + 216), -1,         (1 + 184),
      (7 + 216),  (8 + 216),  (3 + 184),  -1,         (4 + 184),  -1,
      -1,         -1,         -1,         -1,         -1,         -1,
      -1,         -1,         -1,         -1,         -1,         -1,
      -1,         -1,         -1,         -1,         -1,         -1,
      -1,         -1,         -1,         -1};
  return physToGpio_AP;
}


x86 assembly (clang, -O0):
<asus_get_physToGpio>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0x2f22(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asus_get_physToGpio>:
lea    0x2f29(%rip),%rax
ret

LLVM IR (-O0):
@asus_get_physToGpio.physToGpio_AP = internal global [64 x i32] [i32 -1, i32 -1, i32 -1, i32 252, i32 -1, i32 253, i32 -1, i32 17, i32 161, i32 -1, i32 160, i32 164, i32 184, i32 166, i32 -1, i32 167, i32 162, i32 -1, i32 163, i32 257, i32 -1, i32 256, i32 171, i32 254, i32 255, i32 -1, i32 251, i32 233, i32 234, i32 165, i32 -1, i32 168, i32 239, i32 238, i32 -1, i32 185, i32 223, i32 224, i32 187, i32 -1, i32 188, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1]
define i32* @asus_get_physToGpio(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32* getelementptr inbounds ([64 x i32], [64 x i32]* @asus_get_physToGpio.physToGpio_AP, i64 0, i64 0)
}

LLVM IR (-O2):
@asus_get_physToGpio.physToGpio_AP = internal global [64 x i32] [i32 -1, i32 -1, i32 -1, i32 252, i32 -1, i32 253, i32 -1, i32 17, i32 161, i32 -1, i32 160, i32 164, i32 184, i32 166, i32 -1, i32 167, i32 162, i32 -1, i32 163, i32 257, i32 -1, i32 256, i32 171, i32 254, i32 255, i32 -1, i32 251, i32 233, i32 234, i32 165, i32 -1, i32 168, i32 239, i32 238, i32 -1, i32 185, i32 223, i32 224, i32 187, i32 -1, i32 188, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1]
define i32* @asus_get_physToGpio(i32 %0) {
ret i32* getelementptr inbounds ([64 x i32], [64 x i32]* @asus_get_physToGpio.physToGpio_AP, i64 0, i64 0)
}
/* Type definitions */
struct bufferevent {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stdout;
void bev_data_write_cb(struct bufferevent *bev, void *ctx) {
  ;
  ;
  ;
  int ret = 0;
  fprintf(stdout, "bev_data_write_cb: %d\n", ret);
}


x86 assembly (clang, -O0):
<bev_data_write_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
mov    -0x14(%rbp),%edx
lea    0xec6(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bev_data_write_cb>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
xor    %edx,%edx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
%struct.bufferevent = type { i32 }
@stdout = global i32 0
@.str = [23 x i8] c"bev_data_write_cb: %d\0A\00"
define void @bev_data_write_cb(%struct.bufferevent* %0, i8* %1) {
%3 = alloca %struct.bufferevent*
%4 = alloca i8*
%5 = alloca i32
store %struct.bufferevent* %0, %struct.bufferevent** %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = load i32, i32* @stdout
%7 = load i32, i32* %5
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
%struct.bufferevent = type { i32 }
@stdout = global i32 0
@.str = [23 x i8] c"bev_data_write_cb: %d\0A\00"
define void @bev_data_write_cb(%struct.bufferevent* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
int rmdir(char const *);
int os_rmdir(const char *name) { return rmdir(name); }


x86 assembly (clang, -O0):
<os_rmdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rmdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_rmdir>:
jmp    1030 <rmdir@plt>

LLVM IR (-O0):
define i32 @os_rmdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @rmdir(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @os_rmdir(i8* nocapture %0) {
%2 = tail call i32 @rmdir(i8* %0)
ret i32 %2
}
int test_019(int a, int b, int c, int d) { return (a & 1) + a + a; }


x86 assembly (clang, -O0):
<test_019>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x4(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_019>:
mov    %edi,%eax
and    $0x1,%eax
lea    (%rax,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @test_019(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = and i32 %9, 1
%11 = load i32, i32* %5
%12 = add nsw i32 %10, %11
%13 = load i32, i32* %5
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @test_019(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %0, 1
%6 = shl i32 %0, 1
%7 = or i32 %5, %6
ret i32 %7
}
int httplib_system_exit(void) { return 0; }


x86 assembly (clang, -O0):
<httplib_system_exit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<httplib_system_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @httplib_system_exit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @httplib_system_exit() {
ret i32 0
}
void ecm_nss_ipv6_stop(int num) { return; }


x86 assembly (clang, -O0):
<ecm_nss_ipv6_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecm_nss_ipv6_stop>:
ret

LLVM IR (-O0):
define void @ecm_nss_ipv6_stop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @ecm_nss_ipv6_stop(i32 %0) {
ret void
}
int main(int x) {
  int a;
  int b;
  return (a + b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %2
store i32 %0, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0) {
ret i32 undef
}