xunge/DecIR huggingface dataset:
/* Variables and functions */
char *malloc(int);
int main(int argc, char *argv[]) {
  char *pointer = 0;
  pointer = malloc(64);
  pointer = 0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    $0x40,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x18(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* null, i8** %6
%7 = call i8* @malloc(i32 64)
store i8* %7, i8** %6
store i8* null, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
double now_ms(void) {
  struct timespec ts;
  clock_gettime(CLOCK_MONOTONIC, &ts);
  return ts.tv_sec * 1000. + ts.tv_nsec * 1e-6;
}


x86 assembly (clang, -O0):
<now_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
cvtsi2sdl -0x8(%rbp),%xmm0
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xecc(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xeb8(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<now_ms>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
cvtsi2sdl (%rsp),%xmm0
cvtsi2sdl 0x4(%rsp),%xmm1
mulsd  0xecb(%rip),%xmm1
mulsd  0xecb(%rip),%xmm0
addsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define double @now_ms() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_MONOTONIC
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%5 = load i32, i32* %4
%6 = sitofp i32 %5 to double
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%8 = load i32, i32* %7
%9 = sitofp i32 %8 to double
%10 = fmul double %9, 0x3EB0C6F7A0B5ED8D
%11 = call double @llvm.fmuladd.f64(double %6, double 1.000000e+03, double %10)
ret double %11
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define double @now_ms() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = sitofp i32 %6 to double
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = sitofp i32 %9 to double
%11 = fmul double %10, 0x3EB0C6F7A0B5ED8D
%12 = call double @llvm.fmuladd.f64(double %7, double 1.000000e+03, double %11)
ret double %12
}
void msleep(int x) {
  int i, j;
  for (i = 0; i < x; ++i) {
    for (j = 0; j < 100000; ++j)
      asm volatile("");
  }
}


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114f <msleep+0x4f>
movl   $0x0,-0xc(%rbp)
cmpl   $0x186a0,-0xc(%rbp)
jge    113c <msleep+0x3c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <msleep+0x21>
jmp    1141 <msleep+0x41>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <msleep+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
test   %edi,%edi
jle    112c <msleep+0x2c>
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
mov    $0x186a0,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
add    $0xffffffff,%ecx
jne    1120 <msleep+0x20>
add    $0x1,%eax
cmp    %edi,%eax
jne    1110 <msleep+0x10>
ret

LLVM IR (-O0):
define void @msleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %21
9: ; preds = %5
store i32 0, i32* %4
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %4
%12 = icmp slt i32 %11, 100000
br i1 %12, label %13, label %17
13: ; preds = %10
br label %14
14: ; preds = %13
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
br label %10
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @msleep(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %12
3: ; preds = %1, %9
%4 = phi i32 [ %10, %9 ], [ 0, %1 ]
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ 0, %3 ], [ %7, %5 ]
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
%7 = add nuw nsw i32 %6, 1
%8 = icmp eq i32 %7, 100000
br i1 %8, label %9, label %5
9: ; preds = %5
%10 = add nuw nsw i32 %4, 1
%11 = icmp eq i32 %10, %0
br i1 %11, label %12, label %3
12: ; preds = %9, %1
ret void
}
void RGB565ToARGBRow_Any_NEON() {}


x86 assembly (clang, -O0):
<RGB565ToARGBRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGB565ToARGBRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @RGB565ToARGBRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @RGB565ToARGBRow_Any_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int /*<<< orphan*/);
int /*<<< orphan*/ isalpha(int);
void test_isalpha() {
  clang_analyzer_eval(isalpha(']'));
  clang_analyzer_eval(isalpha('Q'));
  clang_analyzer_eval(isalpha(128));
}


x86 assembly (clang, -O0):
<test_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5d,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
mov    $0x51,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
mov    $0x80,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_isalpha>:
push   %rax
mov    $0x5d,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
mov    $0x51,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
mov    $0x80,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @test_isalpha() {
%1 = call i32 @isalpha(i32 93)
%2 = call i32 @clang_analyzer_eval(i32 %1)
%3 = call i32 @isalpha(i32 81)
%4 = call i32 @clang_analyzer_eval(i32 %3)
%5 = call i32 @isalpha(i32 128)
%6 = call i32 @clang_analyzer_eval(i32 %5)
ret void
}

LLVM IR (-O2):
define void @test_isalpha() {
%1 = tail call i32 @isalpha(i32 93)
%2 = tail call i32 @clang_analyzer_eval(i32 %1)
%3 = tail call i32 @isalpha(i32 81)
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
%5 = tail call i32 @isalpha(i32 128)
%6 = tail call i32 @clang_analyzer_eval(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
long main() {
  printf("30: %ld\n", 10 + 20);
  printf("5: %ld\n", 1 + 2 + 2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
mov    $0x1e,%esi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1e,%esi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
mov    $0x5,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"30: %ld\0A\00"
@.str.1 = [8 x i8] c"5: %ld\0A\00"
define i64 @main() {
%1 = alloca i64
%2 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 30)
%3 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 5)
%4 = load i64, i64* %1
ret i64 %4
}

LLVM IR (-O2):
@.str = [9 x i8] c"30: %ld\0A\00"
@.str.1 = [8 x i8] c"5: %ld\0A\00"
define i64 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 30)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 5)
ret i64 undef
}
void cdns3_gadget_exit(struct cdns3 *cdns) {}


x86 assembly (clang, -O0):
<cdns3_gadget_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdns3_gadget_exit>:
ret

LLVM IR (-O0):
%struct.cdns3 = type opaque
define void @cdns3_gadget_exit(%struct.cdns3* %0) {
%2 = alloca %struct.cdns3*
store %struct.cdns3* %0, %struct.cdns3** %2
ret void
}

LLVM IR (-O2):
%struct.cdns3 = type opaque
define void @cdns3_gadget_exit(%struct.cdns3* nocapture %0) {
ret void
}
int bitXorwith(int sourceWord, int destinationWord) {
  return sourceWord ^ destinationWord;
}


x86 assembly (clang, -O0):
<bitXorwith>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitXorwith>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @bitXorwith(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @bitXorwith(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, size_t);
int /*<<< orphan*/ stderr;
void ErrorQuit(size_t s) {
  fprintf(stderr, "[x] Error allocating %zu bytes.\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<ErrorQuit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<ErrorQuit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [33 x i8] c"[x] Error allocating %zu bytes.\0A\00"
define void @ErrorQuit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i32, i32* @stderr
%4 = load i64, i64* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [33 x i8] c"[x] Error allocating %zu bytes.\0A\00"
define void @ErrorQuit(i64 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ s6eucldistsq(double *, double *);
double sqrt(int /*<<< orphan*/);
double s6eucldist(double v1[6], double v2[6]) {
  return sqrt(s6eucldistsq(v1, v2));
}


x86 assembly (clang, -O0):
<s6eucldist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <s6eucldistsq@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s6eucldist>:
push   %rax
call   1030 <s6eucldistsq@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @s6eucldist(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double*, double** %4
%7 = call i32 @s6eucldistsq(double* %5, double* %6)
%8 = call double @sqrt(i32 %7)
ret double %8
}

LLVM IR (-O2):
define double @s6eucldist(double* %0, double* %1) {
%3 = tail call i32 @s6eucldistsq(double* %0, double* %1)
%4 = tail call double @sqrt(i32 %3)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *fs_basepath(char const *);
int fs_mode(char *);
int /*<<< orphan*/ printf(char *, char *, char const *, int);
int fs_parent_mode(const char *restrict filename) {
  int returnValue = 0;
  char *restrict basepath = fs_basepath(filename);
  printf("%s, %s, %d\n", basepath, filename, returnValue);
  returnValue = fs_mode(basepath);
  free(basepath);
  return returnValue;
}


x86 assembly (clang, -O0):
<fs_parent_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <fs_basepath@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xe8e(%rip),%rdi
call   1060 <printf@plt>
mov    -0x18(%rbp),%rdi
call   1040 <fs_mode@plt>
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_parent_mode>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1050 <fs_basepath@plt>
mov    %rax,%rbx
lea    0xeaa(%rip),%rdi
mov    %rax,%rsi
mov    %r14,%rdx
xor    %ecx,%ecx
call   1060 <printf@plt>
mov    %rbx,%rdi
call   1040 <fs_mode@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%s, %s, %d\0A\00"
define i32 @fs_parent_mode(i8* noalias %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = call i8* @fs_basepath(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8, i32 %9)
%11 = load i8*, i8** %4
%12 = call i32 @fs_mode(i8* %11)
store i32 %12, i32* %3
%13 = load i8*, i8** %4
%14 = call i32 @free(i8* %13)
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s, %s, %d\0A\00"
define i32 @fs_parent_mode(i8* noalias %0) {
%2 = tail call i8* @fs_basepath(i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %0, i32 0)
%4 = tail call i32 @fs_mode(i8* %2)
%5 = tail call i32 @free(i8* %2)
ret i32 %4
}
const char *pathcon_nm4_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<pathcon_nm4_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <pathcon_nm4_name_out+0x2b>
jmp    111a <pathcon_nm4_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <pathcon_nm4_name_out+0x3b>
jmp    114b <pathcon_nm4_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathcon_nm4_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathcon_nm4_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm4_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathcon_nm4_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathcon_nm4_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
int f2i(float f) { return *(int *)(&f); }


x86 assembly (clang, -O0):
<f2i>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2i>:
movd   %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @f2i(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = bitcast float* %2 to i32*
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f2i(float %0) {
%2 = bitcast float %0 to i32
ret i32 %2
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_hashed(struct list_head const *);
int list_empty(const struct list_head *n) { return !list_hashed(n); }


x86 assembly (clang, -O0):
<list_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <list_hashed@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_empty>:
push   %rax
call   1030 <list_hashed@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.list_head = type { i32 }
define i32 @list_empty(%struct.list_head* %0) {
%2 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %2
%3 = load %struct.list_head*, %struct.list_head** %2
%4 = call i32 @list_hashed(%struct.list_head* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define i32 @list_empty(%struct.list_head* %0) {
%2 = tail call i32 @list_hashed(%struct.list_head* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(float *, int *, int);
float CPLNaN(void) {
  float fNan;
  int nNan = 0x7FC00000;
  memcpy(&fNan, &nNan, 4);
  return fNan;
}


x86 assembly (clang, -O0):
<CPLNaN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x7fc00000,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CPLNaN>:
push   %rax
movl   $0x7fc00000,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
movss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @CPLNaN() {
%1 = alloca float
%2 = alloca i32
store i32 2143289344, i32* %2
%3 = call i32 @memcpy(float* %1, i32* %2, i32 4)
%4 = load float, float* %1
ret float %4
}

LLVM IR (-O2):
define float @CPLNaN() {
%1 = alloca float
%2 = alloca i32
%3 = bitcast float* %1 to i8*
%4 = bitcast i32* %2 to i8*
store i32 2143289344, i32* %2
%5 = call i32 @memcpy(float* %1, i32* %2, i32 4)
%6 = load float, float* %1
ret float %6
}
int mars_numa_enabled(void) { return 0; }


x86 assembly (clang, -O0):
<mars_numa_enabled>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mars_numa_enabled>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mars_numa_enabled() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mars_numa_enabled() {
ret i32 0
}
void rop3_160_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = *D & T;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_160_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_160_0_0>:
and    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_160_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = and i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8, i8* %7
%16 = load i8*, i8** %4
store i8 %15, i8* %16
ret void
}

LLVM IR (-O2):
define void @rop3_160_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %2
store i8 %5, i8* %0
ret void
}
void sysfs_put(struct sysfs_dirent *sd) {}


x86 assembly (clang, -O0):
<sysfs_put>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_put>:
ret

LLVM IR (-O0):
%struct.sysfs_dirent = type opaque
define void @sysfs_put(%struct.sysfs_dirent* %0) {
%2 = alloca %struct.sysfs_dirent*
store %struct.sysfs_dirent* %0, %struct.sysfs_dirent** %2
ret void
}

LLVM IR (-O2):
%struct.sysfs_dirent = type opaque
define void @sysfs_put(%struct.sysfs_dirent* nocapture %0) {
ret void
}
f() {
  long *sp;
  long *pc;
  static void *dummy[] = {
      &&L1,
      &&L2,
  };
L1 : {
  float val;
  val = *(float *)sp;
  val = -val;
  *(float *)sp = val;
  goto *pc++;
}
L2 : {
  float from;
  *(long long *)sp = from;
  goto *pc++;
}
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x20(%rbp)
jmp    116d <f+0x6d>
cvttss2si -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
jmp    *%rax

x86 assembly (clang, -O2):
LLVM IR (-O0):
@f.dummy = internal global [2 x i8*] [i8* blockaddress(@f, %5), i8* blockaddress(@f, %17)]
define i32 @f() {
%1 = alloca i64*
%2 = alloca i64*
%3 = alloca float
%4 = alloca float
br label %5
5: ; preds = %0, %24
%6 = load i64*, i64** %1
%7 = bitcast i64* %6 to float*
%8 = load float, float* %7
store float %8, float* %3
%9 = load float, float* %3
%10 = fneg float %9
store float %10, float* %3
%11 = load float, float* %3
%12 = load i64*, i64** %1
%13 = bitcast i64* %12 to float*
store float %11, float* %13
%14 = load i64*, i64** %2
%15 = getelementptr inbounds i64, i64* %14, i32 1
store i64* %15, i64** %2
%16 = bitcast i64* %14 to i8*
br label %24
17: ; preds = %24
%18 = load float, float* %4
%19 = fptosi float %18 to i64
%20 = load i64*, i64** %1
store i64 %19, i64* %20
%21 = load i64*, i64** %2
%22 = getelementptr inbounds i64, i64* %21, i32 1
store i64* %22, i64** %2
%23 = bitcast i64* %21 to i8*
br label %24
24: ; preds = %17, %5
%25 = phi i8* [ %16, %5 ], [ %23, %17 ]
indirectbr i8* %25, [label %5, label %17]
}

LLVM IR (-O2):
void device_not_available_handler(struct exception_info *info) {
  asm volatile("" : : :);
  asm volatile("hlt");
}


x86 assembly (clang, -O0):
<device_not_available_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_not_available_handler>:
hlt
ret

LLVM IR (-O0):
%struct.exception_info = type opaque
define void @device_not_available_handler(%struct.exception_info* %0) {
%2 = alloca %struct.exception_info*
store %struct.exception_info* %0, %struct.exception_info** %2
ret void
}

LLVM IR (-O2):
%struct.exception_info = type opaque
define void @device_not_available_handler(%struct.exception_info* nocapture readnone %0) {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assign_out_inv(int, int *, int, char *);
int /*<<< orphan*/ assign_out_normal(int, int *, char *);
void assign_out(int nvtxs, int *sets, int nsets, char *outname) {
  extern int OUT_ASSIGN_INV;
  if (OUT_ASSIGN_INV) {
    assign_out_inv(nvtxs, sets, nsets, outname);
  } else {
    assign_out_normal(nvtxs, sets, outname);
  }
}


x86 assembly (clang, -O0):
<assign_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2eab(%rip),%rax
cmpl   $0x0,(%rax)
je     115e <assign_out+0x3e>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1040 <assign_out_inv@plt>
jmp    116e <assign_out+0x4e>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <assign_out_normal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assign_out>:
mov    0x2ec1(%rip),%rax
cmpl   $0x0,(%rax)
je     1131 <assign_out+0x11>
jmp    1040 <assign_out_inv@plt>
mov    %rcx,%rdx
jmp    1030 <assign_out_normal@plt>

LLVM IR (-O0):
@OUT_ASSIGN_INV = external global i32
define void @assign_out(i32 %0, i32* %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* @OUT_ASSIGN_INV
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %4
%12 = load i32, i32* %5
%13 = load i32*, i32** %6
%14 = load i32, i32* %7
%15 = load i8*, i8** %8
%16 = call i32 @assign_out_inv(i32 %12, i32* %13, i32 %14, i8* %15)
br label %22
17: ; preds = %4
%18 = load i32, i32* %5
%19 = load i32*, i32** %6
%20 = load i8*, i8** %8
%21 = call i32 @assign_out_normal(i32 %18, i32* %19, i8* %20)
br label %22
22: ; preds = %17, %11
ret void
}

LLVM IR (-O2):
@OUT_ASSIGN_INV = external global i32
define void @assign_out(i32 %0, i32* %1, i32 %2, i8* %3) {
%5 = load i32, i32* @OUT_ASSIGN_INV
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @assign_out_inv(i32 %0, i32* %1, i32 %2, i8* %3)
br label %11
9: ; preds = %4
%10 = tail call i32 @assign_out_normal(i32 %0, i32* %1, i8* %3)
br label %11
11: ; preds = %9, %7
ret void
}
const char *SafeStr(const char *ss) { return ss ? ss : ""; }


x86 assembly (clang, -O0):
<SafeStr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1120 <SafeStr+0x20>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1130 <SafeStr+0x30>
lea    0xed9(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1130 <SafeStr+0x30>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SafeStr>:
test   %rdi,%rdi
lea    0xef6(%rip),%rax
cmovne %rdi,%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @SafeStr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i8*, i8** %2
br label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %5
%9 = phi i8* [ %6, %5 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %7 ]
ret i8* %9
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @SafeStr(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = select i1 %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %0
ret i8* %3
}
/* Variables and functions */
unsigned long sys_timer_get_counter();
void sys_timer_wait(unsigned int wait_period) {
  unsigned long stop_time = sys_timer_get_counter() + wait_period;
  while (sys_timer_get_counter() < stop_time)
    ;
}


x86 assembly (clang, -O0):
<sys_timer_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <sys_timer_get_counter@plt>
mov    -0x4(%rbp),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <sys_timer_get_counter@plt>
cmp    -0x10(%rbp),%rax
jae    1142 <sys_timer_wait+0x32>
jmp    112c <sys_timer_wait+0x1c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_timer_wait>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <sys_timer_get_counter@plt>
mov    %ebx,%ebx
add    %rax,%rbx
nop
xor    %eax,%eax
call   1030 <sys_timer_get_counter@plt>
cmp    %rbx,%rax
jb     1120 <sys_timer_wait+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @sys_timer_wait(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = call i64 (...) @sys_timer_get_counter()
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = add i64 %4, %6
store i64 %7, i64* %3
br label %8
8: ; preds = %12, %1
%9 = call i64 (...) @sys_timer_get_counter()
%10 = load i64, i64* %3
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %8
br label %8
13: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @sys_timer_wait(i32 %0) {
%2 = tail call i64 (...) @sys_timer_get_counter()
%3 = zext i32 %0 to i64
%4 = add i64 %2, %3
br label %5
5: ; preds = %5, %1
%6 = tail call i64 (...) @sys_timer_get_counter()
%7 = icmp ult i64 %6, %4
br i1 %7, label %5, label %8
8: ; preds = %5
ret void
}
void initialize_session_handler() {}


x86 assembly (clang, -O0):
<initialize_session_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_session_handler>:
ret

LLVM IR (-O0):
define void @initialize_session_handler() {
ret void
}

LLVM IR (-O2):
define void @initialize_session_handler() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hci_event_inquiry_complete_get_status(const uint8_t *event) {
  return event[2];
}


x86 assembly (clang, -O0):
<hci_event_inquiry_complete_get_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_event_inquiry_complete_get_status>:
mov    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hci_event_inquiry_complete_get_status(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hci_event_inquiry_complete_get_status(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ pr_procmask(char *);
void sig_alrm(int signo) { pr_procmask("in sig_alrm: "); }


x86 assembly (clang, -O0):
<sig_alrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <pr_procmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_alrm>:
lea    0xee9(%rip),%rdi
jmp    1030 <pr_procmask@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"in sig_alrm: \00"
define void @sig_alrm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @pr_procmask(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"in sig_alrm: \00"
define void @sig_alrm(i32 %0) {
%2 = tail call i32 @pr_procmask(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double pow(double, double);
double q5(double indice) {
  if (indice <= 10) {
    indice = indice + 0.821;
    indice = pow(indice, -1.15);
    return 79.7 * indice;
  } else {
    return 5.0;
  }
}


x86 assembly (clang, -O0):
<q5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  0xedb(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1170 <q5+0x60>
movsd  0xee8(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xec9(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xeaf(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    117d <q5+0x6d>
movsd  0xe90(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<q5>:
push   %rax
movsd  0xeef(%rip),%xmm1
ucomisd %xmm0,%xmm1
jae    1129 <q5+0x19>
movsd  0xed9(%rip),%xmm0
pop    %rax
ret
addsd  0xedf(%rip),%xmm0
movsd  0xedf(%rip),%xmm1
call   1030 <pow@plt>
mulsd  0xeda(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @q5(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ole double %4, 1.000000e+01
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 0x3FEA45A1CAC08312
store double %8, double* %3
%9 = load double, double* %3
%10 = call double @pow(double %9, double -1.150000e+00)
store double %10, double* %3
%11 = load double, double* %3
%12 = fmul double 7.970000e+01, %11
store double %12, double* %2
br label %14
13: ; preds = %1
store double 5.000000e+00, double* %2
br label %14
14: ; preds = %13, %6
%15 = load double, double* %2
ret double %15
}

LLVM IR (-O2):
define double @q5(double %0) {
%2 = fcmp ugt double %0, 1.000000e+01
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = fadd double %0, 0x3FEA45A1CAC08312
%5 = tail call double @pow(double %4, double -1.150000e+00)
%6 = fmul double %5, 7.970000e+01
br label %7
7: ; preds = %1, %3
%8 = phi double [ %6, %3 ], [ 5.000000e+00, %1 ]
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *realloc(void *, int);
int /*<<< orphan*/ stderr;
void *Realloc(void *p, int size) {
  void *chunk;
  chunk = realloc(p, size);
  if (chunk == NULL)
    fprintf(stderr, "Red Alert: Insufficient Memory!\n");
  return chunk;
}


x86 assembly (clang, -O0):
<Realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115f <Realloc+0x3f>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
lea    0xea6(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Realloc>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1143 <Realloc+0x23>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [33 x i8] c"Red Alert: Insufficient Memory!\0A\00"
define i8* @Realloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @realloc(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %11, %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [33 x i8] c"Red Alert: Insufficient Memory!\0A\00"
define i8* @Realloc(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5, %2
ret i8* %3
}
int __attribute__((no)) bar(short *p) {
  unsigned int a = *p;
  asm volatile("nop" : : "D"((unsigned int)*p));
  asm volatile("nop" : : "D"((unsigned int)*p));
  return 0;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edi
nop
mov    -0x8(%rbp),%rax
movswl (%rax),%edi
nop
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %rdi,%rax
movswl (%rdi),%edi
nop
movswl (%rax),%edi
nop
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @bar(i16* %0) {
%2 = alloca i16*
%3 = alloca i32
store i16* %0, i16** %2
%4 = load i16*, i16** %2
%5 = load i16, i16* %4
%6 = sext i16 %5 to i32
store i32 %6, i32* %3
%7 = load i16*, i16** %2
%8 = load i16, i16* %7
%9 = sext i16 %8 to i32
%10 = load i16*, i16** %2
%11 = load i16, i16* %10
%12 = sext i16 %11 to i32
ret i32 0
}

LLVM IR (-O2):
define i32 @bar(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = sext i16 %2 to i32
tail call void asm sideeffect "nop", "{di},~{dirflag},~{fpsr},~{flags}"(i32 %3)
%4 = load i16, i16* %0
%5 = sext i16 %4 to i32
tail call void asm sideeffect "nop", "{di},~{dirflag},~{fpsr},~{flags}"(i32 %5)
ret i32 0
}
/* Variables and functions */
int *malloc(int);
int /*<<< orphan*/ printf(char *);
int main(void) {
  int *a = malloc(100 * sizeof(int));
  if (a == NULL) {
    printf("Insufficient memory.\n");
    return 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x190,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1160 <main+0x40>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
jmp    1167 <main+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x190,%edi
call   1040 <malloc@plt>
test   %rax,%rax
jne    113c <main+0x1c>
lea    0xec9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Insufficient memory.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @malloc(i32 400)
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %1
br label %9
8: ; preds = %0
store i32 0, i32* %1
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@str = [21 x i8] c"Insufficient memory.\00"
define i32 @main() {
%1 = tail call i32* @malloc(i32 400)
%2 = icmp eq i32* %1, null
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %0, %3
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void linux_i386_usage(void) {
  printf(
      "      --command-line=<string> Set the command line to <string>\n"
      "      --append=<string>       Set the command line to <string>\n"
      "      --initrd=<filename>     Set the initrd to <filename>\n"
      "      --ramdisk=<filename>    Set the initrd to <filename>\n"
      "      --ramdisk-base=<addr>   Set the initrd load address to <addr>\n");
  return;
}


x86 assembly (clang, -O0):
<linux_i386_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<linux_i386_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [313 x i8] c" --command-line=<string> Set the command line to <string>\0A --append=<string> Set the command line to <string>\0A --initrd=<filename> Set the initrd to <filename>\0A --ramdisk=<filename> Set the initrd to <filename>\0A --ramdisk-base=<addr> Set the initrd load address to <addr>\0A\00"
define void @linux_i386_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([313 x i8], [313 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [312 x i8] c" --command-line=<string> Set the command line to <string>\0A --append=<string> Set the command line to <string>\0A --initrd=<filename> Set the initrd to <filename>\0A --ramdisk=<filename> Set the initrd to <filename>\0A --ramdisk-base=<addr> Set the initrd load address to <addr>\00"
define void @linux_i386_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([312 x i8], [312 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) { (void)printf("Test main called\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Test main called\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [17 x i8] c"Test main called\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int CHECK_0F(unsigned char v) { return v == 0x0f; }


x86 assembly (clang, -O0):
<CHECK_0F>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0xf,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CHECK_0F>:
xor    %eax,%eax
cmp    $0xf,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @CHECK_0F(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 15
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @CHECK_0F(i8 zeroext %0) {
%2 = icmp eq i8 %0, 15
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int diminuto_ipc_shutdown(int);
int diminuto_ipcl_shutdown(int fd) { return diminuto_ipc_shutdown(fd); }


x86 assembly (clang, -O0):
<diminuto_ipcl_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <diminuto_ipc_shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipcl_shutdown>:
jmp    1030 <diminuto_ipc_shutdown@plt>

LLVM IR (-O0):
define i32 @diminuto_ipcl_shutdown(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @diminuto_ipc_shutdown(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @diminuto_ipcl_shutdown(i32 %0) {
%2 = tail call i32 @diminuto_ipc_shutdown(i32 %0)
ret i32 %2
}
/* Forward declarations */
typedef struct TYPE_5__ TYPE_2__;
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int /*<<< orphan*/ *ptr;
};
struct TYPE_5__ {
  scalar_t__ type;
  TYPE_1__ value;
};
typedef TYPE_2__ ASN1_TYPE;

/* Variables and functions */
scalar_t__ V_ASN1_NULL;
int ASN1_TYPE_get(const ASN1_TYPE *a) {
  if ((a->value.ptr != NULL) || (a->type == V_ASN1_NULL))
    return (a->type);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ASN1_TYPE_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,0x8(%rax)
jne    112e <ASN1_TYPE_get+0x2e>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    0x2ebb(%rip),%rcx
cmp    (%rcx),%rax
jne    113d <ASN1_TYPE_get+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %eax,-0x4(%rbp)
jmp    1144 <ASN1_TYPE_get+0x44>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_TYPE_get>:
mov    (%rdi),%rcx
mov    0x2ed6(%rip),%rdx
xor    %eax,%eax
cmp    (%rdx),%rcx
cmove  %ecx,%eax
cmpq   $0x0,0x8(%rdi)
cmovne %ecx,%eax
ret

LLVM IR (-O0):
%struct.TYPE_5__ = type { i64, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32* }
@V_ASN1_NULL = global i64 0
define i32 @ASN1_TYPE_get(%struct.TYPE_5__* %0) {
%2 = alloca i32
%3 = alloca %struct.TYPE_5__*
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %3
%4 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3
%5 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %4, i32 0, i32 1
%6 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %5, i32 0, i32 0
%7 = load i32*, i32** %6
%8 = icmp ne i32* %7, null
br i1 %8, label %15, label %9
9: ; preds = %1
%10 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3
%11 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %10, i32 0, i32 0
%12 = load i64, i64* %11
%13 = load i64, i64* @V_ASN1_NULL
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %20
15: ; preds = %9, %1
%16 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3
%17 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %16, i32 0, i32 0
%18 = load i64, i64* %17
%19 = trunc i64 %18 to i32
store i32 %19, i32* %2
br label %21
20: ; preds = %9
store i32 0, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
%struct.TYPE_5__ = type { i64, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32* }
@V_ASN1_NULL = global i64 0
define i32 @ASN1_TYPE_get(%struct.TYPE_5__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %0, i64 0, i32 1, i32 0
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
%5 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %0, i64 0, i32 0
%6 = load i64, i64* %5
%7 = load i64, i64* @V_ASN1_NULL
%8 = icmp eq i64 %6, %7
%9 = select i1 %4, i1 true, i1 %8
%10 = trunc i64 %6 to i32
%11 = select i1 %9, i32 %10, i32 0
ret i32 %11
}
/* Variables and functions */
int f9_0(int);
int f9() { return f9_0(2); }


x86 assembly (clang, -O0):
<f9>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <f9_0@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f9>:
mov    $0x2,%edi
jmp    1030 <f9_0@plt>

LLVM IR (-O0):
define i32 @f9() {
%1 = call i32 @f9_0(i32 2)
ret i32 %1
}

LLVM IR (-O2):
define i32 @f9() {
%1 = tail call i32 @f9_0(i32 2)
ret i32 %1
}
int main(int argc, const char *argv[]) {
  double a[2][2];
  a[0][0] = 0;
  a[0][1] = 0.1;
  a[1][0] = 0.2;
  a[1][1] = 0.3;
  int b = a[0][1];
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xeee(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xec4(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
cvttsd2si -0x28(%rbp),%eax
mov    %eax,-0x34(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [2 x [2 x double]]
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = getelementptr inbounds [2 x [2 x double]], [2 x [2 x double]]* %6, i64 0, i64 0
%9 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
store double 0.000000e+00, double* %9
%10 = getelementptr inbounds [2 x [2 x double]], [2 x [2 x double]]* %6, i64 0, i64 0
%11 = getelementptr inbounds [2 x double], [2 x double]* %10, i64 0, i64 1
store double 1.000000e-01, double* %11
%12 = getelementptr inbounds [2 x [2 x double]], [2 x [2 x double]]* %6, i64 0, i64 1
%13 = getelementptr inbounds [2 x double], [2 x double]* %12, i64 0, i64 0
store double 2.000000e-01, double* %13
%14 = getelementptr inbounds [2 x [2 x double]], [2 x [2 x double]]* %6, i64 0, i64 1
%15 = getelementptr inbounds [2 x double], [2 x double]* %14, i64 0, i64 1
store double 3.000000e-01, double* %15
%16 = getelementptr inbounds [2 x [2 x double]], [2 x [2 x double]]* %6, i64 0, i64 0
%17 = getelementptr inbounds [2 x double], [2 x double]* %16, i64 0, i64 1
%18 = load double, double* %17
%19 = fptosi double %18 to i32
store i32 %19, i32* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}