xunge/DecIR huggingface dataset:
/* Variables and functions */
int yas_mma8453q_write_reg(unsigned char, unsigned char *, int);
int yas_mma8453q_write_reg_byte(unsigned char adr, unsigned char val) {
  return yas_mma8453q_write_reg(adr, &val, 1);
}


x86 assembly (clang, -O0):
<yas_mma8453q_write_reg_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
lea    -0x2(%rbp),%rsi
mov    $0x1,%edx
movzbl -0x1(%rbp),%edi
call   1030 <yas_mma8453q_write_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_mma8453q_write_reg_byte>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <yas_mma8453q_write_reg@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @yas_mma8453q_write_reg_byte(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = call i32 @yas_mma8453q_write_reg(i8 zeroext %5, i8* %4, i32 1)
ret i32 %6
}

LLVM IR (-O2):
define i32 @yas_mma8453q_write_reg_byte(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i32 @yas_mma8453q_write_reg(i8 zeroext %0, i8* %3, i32 1)
ret i32 %4
}
int prima_cifra(int x) {
  int pr_cifra = 0;
  if (x == 0) {
    return 0;
  } else {
    for (; x > 0; pr_cifra = x % 10, x /= 10)
      ;
    return pr_cifra;
  }
}


x86 assembly (clang, -O0):
<prima_cifra>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1124 <prima_cifra+0x24>
movl   $0x0,-0x4(%rbp)
jmp    115f <prima_cifra+0x5f>
jmp    1129 <prima_cifra+0x29>
cmpl   $0x0,-0x8(%rbp)
jle    1159 <prima_cifra+0x59>
jmp    1138 <prima_cifra+0x38>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1129 <prima_cifra+0x29>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prima_cifra>:
test   %edi,%edi
jle    1139 <prima_cifra+0x39>
mov    $0xcccccccd,%eax
nopl   0x0(%rax)
mov    %edi,%ecx
mov    %edi,%edi
imul   %rax,%rdi
shr    $0x23,%rdi
cmp    $0x9,%ecx
ja     1110 <prima_cifra+0x10>
movzbl %cl,%eax
imul   $0xcd,%eax,%ecx
shr    $0xa,%ecx
and    $0xfffffffe,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %cl,%al
movzbl %al,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @prima_cifra(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %20
8: ; preds = %1
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %3
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %9
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = srem i32 %14, 10
store i32 %15, i32* %4
%16 = load i32, i32* %3
%17 = sdiv i32 %16, 10
store i32 %17, i32* %3
br label %9
18: ; preds = %9
%19 = load i32, i32* %4
store i32 %19, i32* %2
br label %20
20: ; preds = %18, %7
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @prima_cifra(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = udiv i32 %4, 10
%6 = icmp ult i32 %4, 10
br i1 %6, label %7, label %3
7: ; preds = %3
%8 = trunc i32 %4 to i8
%9 = urem i8 %8, 10
%10 = zext i8 %9 to i32
br label %11
11: ; preds = %7, %1
%12 = phi i32 [ 0, %1 ], [ %10, %7 ]
ret i32 %12
}
void log_out(const char *format, ...) { return; }


x86 assembly (clang, -O0):
<log_out>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_out>:
ret

LLVM IR (-O0):
define void @log_out(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @log_out(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MCUSendCmdUserEventRecordCtrl(int);
void MCUSendCmdUserEventRecordCtrlStop() { MCUSendCmdUserEventRecordCtrl(1); }


x86 assembly (clang, -O0):
<MCUSendCmdUserEventRecordCtrlStop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <MCUSendCmdUserEventRecordCtrl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCUSendCmdUserEventRecordCtrlStop>:
mov    $0x1,%edi
jmp    1030 <MCUSendCmdUserEventRecordCtrl@plt>

LLVM IR (-O0):
define void @MCUSendCmdUserEventRecordCtrlStop() {
%1 = call i32 @MCUSendCmdUserEventRecordCtrl(i32 1)
ret void
}

LLVM IR (-O2):
define void @MCUSendCmdUserEventRecordCtrlStop() {
%1 = tail call i32 @MCUSendCmdUserEventRecordCtrl(i32 1)
ret void
}
int zstime(f, yy, x)
char *f;
struct zattr *yy;
int x;
{
  int r = -1;
  int setdate = 0;
  return (r);
}


x86 assembly (clang, -O0):
<zstime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0xffffffff,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zstime>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.zattr = type opaque
define i32 @zstime(i8* %0, %struct.zattr* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca %struct.zattr*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %4
store %struct.zattr* %1, %struct.zattr** %5
store i32 %2, i32* %6
store i32 -1, i32* %7
store i32 0, i32* %8
%9 = load i32, i32* %7
ret i32 %9
}

LLVM IR (-O2):
%struct.zattr = type opaque
define i32 @zstime(i8* nocapture readnone %0, %struct.zattr* nocapture readnone %1, i32 %2) {
ret i32 -1
}
/* Variables and functions */
int get_action_val_name_any(char *, char *, int, int /*<<< orphan*/);
int get_action_val_name(char *saction, char *f_val, int len) {
  return get_action_val_name_any(saction, f_val, len, 0);
}


x86 assembly (clang, -O0):
<get_action_val_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <get_action_val_name_any@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_action_val_name>:
xor    %ecx,%ecx
jmp    1030 <get_action_val_name_any@plt>

LLVM IR (-O0):
define i32 @get_action_val_name(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @get_action_val_name_any(i8* %7, i8* %8, i32 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_action_val_name(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @get_action_val_name_any(i8* %0, i8* %1, i32 %2, i32 0)
ret i32 %4
}
int test1111(int param) {
  _Bool a, b, c;
  if (param) {
    a = 1;
    b = 0;
  } else {
    a = 0;
    b = 1;
  }
  c = a && b;
  if (c)
    return 2;
  return 0;
}


x86 assembly (clang, -O0):
<test1111>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111e <test1111+0x1e>
movb   $0x1,-0x9(%rbp)
movb   $0x0,-0xa(%rbp)
jmp    1126 <test1111+0x26>
movb   $0x0,-0x9(%rbp)
movb   $0x1,-0xa(%rbp)
xor    %eax,%eax
testb  $0x1,-0x9(%rbp)
mov    %al,-0xc(%rbp)
je     113b <test1111+0x3b>
mov    -0xa(%rbp),%al
mov    %al,-0xc(%rbp)
mov    -0xc(%rbp),%al
and    $0x1,%al
mov    %al,-0xb(%rbp)
testb  $0x1,-0xb(%rbp)
je     1159 <test1111+0x59>
movl   $0x2,-0x4(%rbp)
jmp    1160 <test1111+0x60>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1111>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test1111(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i32 %0, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i8 1, i8* %4
store i8 0, i8* %5
br label %11
10: ; preds = %1
store i8 0, i8* %4
store i8 1, i8* %5
br label %11
11: ; preds = %10, %9
%12 = load i8, i8* %4
%13 = trunc i8 %12 to i1
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i8, i8* %5
%16 = trunc i8 %15 to i1
br label %17
17: ; preds = %14, %11
%18 = phi i1 [ false, %11 ], [ %16, %14 ]
%19 = zext i1 %18 to i8
store i8 %19, i8* %6
%20 = load i8, i8* %6
%21 = trunc i8 %20 to i1
br i1 %21, label %22, label %23
22: ; preds = %17
store i32 2, i32* %2
br label %24
23: ; preds = %17
store i32 0, i32* %2
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @test1111(i32 %0) {
ret i32 0
}
void scale_dimensions(int *height_ptr, int *width_ptr) {
  int hscale = 3;
  int wscale = 5;
  *height_ptr = *height_ptr * hscale;
  *width_ptr = *width_ptr * wscale;
}


x86 assembly (clang, -O0):
<scale_dimensions>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
movl   $0x5,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
imul   -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
imul   -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_dimensions>:
mov    (%rdi),%eax
lea    (%rax,%rax,2),%eax
mov    %eax,(%rdi)
mov    (%rsi),%eax
lea    (%rax,%rax,4),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @scale_dimensions(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
store i32 3, i32* %5
store i32 5, i32* %6
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
%9 = load i32, i32* %5
%10 = mul nsw i32 %8, %9
%11 = load i32*, i32** %3
store i32 %10, i32* %11
%12 = load i32*, i32** %4
%13 = load i32, i32* %12
%14 = load i32, i32* %6
%15 = mul nsw i32 %13, %14
%16 = load i32*, i32** %4
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @scale_dimensions(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = mul nsw i32 %3, 3
store i32 %4, i32* %0
%5 = load i32, i32* %1
%6 = mul nsw i32 %5, 5
store i32 %6, i32* %1
ret void
}
long long int factorial(unsigned int n) {
  if (n <= 1) {
    return n;
  } else {
    return n * factorial(n - 1);
  }
}


x86 assembly (clang, -O0):
<factorial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
ja     1131 <factorial+0x21>
mov    -0xc(%rbp),%eax
mov    %rax,-0x8(%rbp)
jmp    1152 <factorial+0x42>
mov    -0xc(%rbp),%eax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <factorial@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<factorial>:
mov    $0x1,%ecx
cmp    $0x2,%edi
jb     1134 <factorial+0x34>
mov    %edi,%eax
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
imul   %rax,%rcx
add    $0xffffffffffffffff,%rax
test   $0xfffffffe,%eax
jne    1120 <factorial+0x20>
mov    $0x1,%edi
mov    %edi,%eax
imul   %rcx,%rax
ret

LLVM IR (-O0):
define i64 @factorial(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ule i32 %4, 1
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
store i64 %8, i64* %2
br label %16
9: ; preds = %1
%10 = load i32, i32* %3
%11 = zext i32 %10 to i64
%12 = load i32, i32* %3
%13 = sub i32 %12, 1
%14 = call i64 @factorial(i32 %13)
%15 = mul nsw i64 %11, %14
store i64 %15, i64* %2
br label %16
16: ; preds = %9, %6
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @factorial(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = zext i32 %0 to i64
br label %10
5: ; preds = %10, %1
%6 = phi i64 [ 1, %1 ], [ %14, %10 ]
%7 = phi i32 [ %0, %1 ], [ 1, %10 ]
%8 = zext i32 %7 to i64
%9 = mul nuw nsw i64 %6, %8
ret i64 %9
10: ; preds = %3, %10
%11 = phi i64 [ %4, %3 ], [ %13, %10 ]
%12 = phi i64 [ 1, %3 ], [ %14, %10 ]
%13 = add nsw i64 %11, -1
%14 = mul nsw i64 %12, %11
%15 = and i64 %13, 4294967294
%16 = icmp eq i64 %15, 0
br i1 %16, label %5, label %10
}
int binary_comparison(int x, int y) {
  if (x == y)
    return 0;
  if (x > y)
    return 1;
  return -1;
}


x86 assembly (clang, -O0):
<binary_comparison>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1122 <binary_comparison+0x22>
movl   $0x0,-0x4(%rbp)
jmp    1141 <binary_comparison+0x41>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113a <binary_comparison+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <binary_comparison+0x41>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<binary_comparison>:
xor    %ecx,%ecx
xor    %eax,%eax
cmp    %esi,%edi
setg   %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @binary_comparison(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = icmp sgt i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 1, i32* %3
br label %16
15: ; preds = %10
store i32 -1, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @binary_comparison(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = icmp sgt i32 %0, %1
%5 = select i1 %4, i32 1, i32 -1
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
float NormalDistrib(float, float);
float ProbabilityGGX(float ndh, float vdh, float Roughness) {
  return NormalDistrib(ndh, Roughness) * ndh / (4.0 * vdh);
}


x86 assembly (clang, -O0):
<ProbabilityGGX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
call   1030 <NormalDistrib@plt>
mulss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm2
movsd  0xeb0(%rip),%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ProbabilityGGX>:
push   %rax
movss  %xmm1,0x4(%rsp)
movss  %xmm0,(%rsp)
movaps %xmm2,%xmm1
call   1030 <NormalDistrib@plt>
mulss  (%rsp),%xmm0
movss  0x4(%rsp),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  0xec5(%rip),%xmm1
cvtss2sd %xmm0,%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @ProbabilityGGX(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = call float @NormalDistrib(float %7, float %8)
%10 = load float, float* %4
%11 = fmul float %9, %10
%12 = fpext float %11 to double
%13 = load float, float* %5
%14 = fpext float %13 to double
%15 = fmul double 4.000000e+00, %14
%16 = fdiv double %12, %15
%17 = fptrunc double %16 to float
ret float %17
}

LLVM IR (-O2):
define float @ProbabilityGGX(float %0, float %1, float %2) {
%4 = tail call float @NormalDistrib(float %0, float %2)
%5 = fmul float %4, %0
%6 = fpext float %5 to double
%7 = fpext float %1 to double
%8 = fmul double %7, 4.000000e+00
%9 = fdiv double %6, %8
%10 = fptrunc double %9 to float
ret float %10
}
/* Type definitions */
struct emuState {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TerminalEmulator_writeStr(struct emuState *, char *);
void do_DA(struct emuState *S) { TerminalEmulator_writeStr(S, "\e[?1;2c"); }


x86 assembly (clang, -O0):
<do_DA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <TerminalEmulator_writeStr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_DA>:
lea    0xee9(%rip),%rsi
jmp    1030 <TerminalEmulator_writeStr@plt>

LLVM IR (-O0):
%struct.emuState = type { i32 }
@.str = [8 x i8] c"\1B[?1;2c\00"
define void @do_DA(%struct.emuState* %0) {
%2 = alloca %struct.emuState*
store %struct.emuState* %0, %struct.emuState** %2
%3 = load %struct.emuState*, %struct.emuState** %2
%4 = call i32 @TerminalEmulator_writeStr(%struct.emuState* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.emuState = type { i32 }
@.str = [8 x i8] c"\1B[?1;2c\00"
define void @do_DA(%struct.emuState* %0) {
%2 = tail call i32 @TerminalEmulator_writeStr(%struct.emuState* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_24(int /*<<< orphan*/ const *, int);
uint32_t
hci_event_inquiry_result_with_rssi_get_class_of_device(const uint8_t *event) {
  return little_endian_read_24(event, 11);
}


x86 assembly (clang, -O0):
<hci_event_inquiry_result_with_rssi_get_class_of_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xb,%esi
call   1030 <little_endian_read_24@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_event_inquiry_result_with_rssi_get_class_of_device>:
mov    $0xb,%esi
jmp    1030 <little_endian_read_24@plt>

LLVM IR (-O0):
define i32 @hci_event_inquiry_result_with_rssi_get_class_of_device(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_24(i32* %3, i32 11)
ret i32 %4
}

LLVM IR (-O2):
define i32 @hci_event_inquiry_result_with_rssi_get_class_of_device(i32* %0) {
%2 = tail call i32 @little_endian_read_24(i32* %0, i32 11)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ average(int);
void sum(int n1, int n2, int n3) {
  int nSum;
  nSum = n1 + n2 + n3;
  average(nSum);
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <average@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
add    %esi,%edi
add    %edx,%edi
jmp    1030 <average@plt>

LLVM IR (-O0):
define void @sum(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = add nsw i32 %8, %9
%11 = load i32, i32* %6
%12 = add nsw i32 %10, %11
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = call i32 @average(i32 %13)
ret void
}

LLVM IR (-O2):
define void @sum(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
%6 = tail call i32 @average(i32 %5)
ret void
}
int Operand_bs_encode(unsigned int *valp) {
  int error;
  error = (*valp & ~0xf) != 0;
  return error;
}


x86 assembly (clang, -O0):
<Operand_bs_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xfffffff0,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_bs_encode>:
xor    %eax,%eax
cmpl   $0x10,(%rdi)
setae  %al
ret

LLVM IR (-O0):
define i32 @Operand_bs_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = and i32 %5, -16
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @Operand_bs_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp ugt i32 %2, 15
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
void __assert_func();
void ATATransfer(int num, int buffer) {
  int wordCount;
  while (num > 0) {
    wordCount = num * 512 / sizeof(int);
    ((0 == (buffer & 63)) ? (void)0 : __assert_func());
    ((0 == (wordCount & 31)) ? (void)0 : __assert_func());
  }
}


x86 assembly (clang, -O0):
<ATATransfer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1174 <ATATransfer+0x64>
mov    -0x4(%rbp),%eax
shl    $0x9,%eax
cltq
shr    $0x2,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
and    $0x3f,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    114c <ATATransfer+0x3c>
jmp    1153 <ATATransfer+0x43>
mov    $0x0,%al
call   1030 <__assert_func@plt>
mov    -0xc(%rbp),%ecx
and    $0x1f,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    1168 <ATATransfer+0x58>
jmp    116f <ATATransfer+0x5f>
mov    $0x0,%al
call   1030 <__assert_func@plt>
jmp    111e <ATATransfer+0xe>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ATATransfer>:
push   %rbx
test   %edi,%edi
jle    112e <ATATransfer+0x1e>
mov    %esi,%ebx
nopw   0x0(%rax,%rax,1)
test   $0x3f,%bl
je     1120 <ATATransfer+0x10>
xor    %eax,%eax
call   1030 <__assert_func@plt>
jmp    1120 <ATATransfer+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ATATransfer(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %26, %2
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %27
9: ; preds = %6
%10 = load i32, i32* %3
%11 = mul nsw i32 %10, 512
%12 = sext i32 %11 to i64
%13 = udiv i64 %12, 4
%14 = trunc i64 %13 to i32
store i32 %14, i32* %5
%15 = load i32, i32* %4
%16 = and i32 %15, 63
%17 = icmp eq i32 0, %16
br i1 %17, label %18, label %19
18: ; preds = %9
br label %20
19: ; preds = %9
br label %20
20: ; preds = %19, %18
%21 = load i32, i32* %5
%22 = and i32 %21, 31
%23 = icmp eq i32 0, %22
br i1 %23, label %24, label %25
24: ; preds = %20
br label %26
25: ; preds = %20
br label %26
26: ; preds = %25, %24
br label %6
27: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ATATransfer(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = and i32 %1, 63
%6 = icmp eq i32 %5, 0
br label %7
7: ; preds = %9, %4
br i1 %6, label %9, label %8
8: ; preds = %7
tail call void (...) @__assert_func()
br label %9
9: ; preds = %8, %7
br label %7
10: ; preds = %2
ret void
}
double perimeter(double radius) { return 2 * radius * 3.14; }


x86 assembly (clang, -O0):
<perimeter>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<perimeter>:
addsd  %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @perimeter(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 2.000000e+00, %3
%5 = fmul double %4, 3.140000e+00
ret double %5
}

LLVM IR (-O2):
define double @perimeter(double %0) {
%2 = fmul double %0, 2.000000e+00
%3 = fmul double %2, 3.140000e+00
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ Msp430TimerCapComP__5__Control__disableEvents();
void Msp430AlarmC__1__Msp430TimerControl__disableEvents(void) {
  Msp430TimerCapComP__5__Control__disableEvents();
}


x86 assembly (clang, -O0):
<Msp430AlarmC__1__Msp430TimerControl__disableEvents>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430TimerCapComP__5__Control__disableEvents@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430AlarmC__1__Msp430TimerControl__disableEvents>:
xor    %eax,%eax
jmp    1030 <Msp430TimerCapComP__5__Control__disableEvents@plt>

LLVM IR (-O0):
define void @Msp430AlarmC__1__Msp430TimerControl__disableEvents() {
%1 = call i32 (...) @Msp430TimerCapComP__5__Control__disableEvents()
ret void
}

LLVM IR (-O2):
define void @Msp430AlarmC__1__Msp430TimerControl__disableEvents() {
%1 = tail call i32 (...) @Msp430TimerCapComP__5__Control__disableEvents()
ret void
}
/* Type definitions */
struct Node {
  int dummy;
};

/* Variables and functions */
int internalGetNbOfNodes(struct Node *);
int getNbOfNodes(struct Node *n) {
  int c = internalGetNbOfNodes(n);
  return c;
}


x86 assembly (clang, -O0):
<getNbOfNodes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <internalGetNbOfNodes@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNbOfNodes>:
jmp    1030 <internalGetNbOfNodes@plt>

LLVM IR (-O0):
%struct.Node = type { i32 }
define i32 @getNbOfNodes(%struct.Node* %0) {
%2 = alloca %struct.Node*
%3 = alloca i32
store %struct.Node* %0, %struct.Node** %2
%4 = load %struct.Node*, %struct.Node** %2
%5 = call i32 @internalGetNbOfNodes(%struct.Node* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.Node = type { i32 }
define i32 @getNbOfNodes(%struct.Node* %0) {
%2 = tail call i32 @internalGetNbOfNodes(%struct.Node* %0)
ret i32 %2
}
int hexval(char c) {
  if ((c >= '0') && (c <= '9'))
    return c - 48;
  else if ((c >= 'A') && (c <= 'F'))
    return c - 55;
  else
    return 0;
}


x86 assembly (clang, -O0):
<hexval>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <hexval+0x33>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <hexval+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1163 <hexval+0x63>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     115c <hexval+0x5c>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jg     115c <hexval+0x5c>
movsbl -0x5(%rbp),%eax
sub    $0x37,%eax
mov    %eax,-0x4(%rbp)
jmp    1163 <hexval+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexval>:
mov    %edi,%eax
lea    -0x30(%rax),%ecx
cmp    $0x9,%cl
ja     110e <hexval+0xe>
add    $0xffffffd0,%eax
ret
lea    -0x41(%rax),%ecx
add    $0xffffffc9,%eax
xor    %edx,%edx
cmp    $0x6,%cl
cmovb  %eax,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hexval(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
store i32 %14, i32* %2
br label %28
15: ; preds = %7, %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sge i32 %17, 65
br i1 %18, label %19, label %27
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sle i32 %21, 70
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = sub nsw i32 %25, 55
store i32 %26, i32* %2
br label %28
27: ; preds = %19, %15
store i32 0, i32* %2
br label %28
28: ; preds = %27, %23, %11
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @hexval(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = add nsw i32 %2, -48
br label %12
7: ; preds = %1
%8 = add i8 %0, -65
%9 = icmp ult i8 %8, 6
%10 = add nsw i32 %2, -55
%11 = select i1 %9, i32 %10, i32 0
br label %12
12: ; preds = %7, %5
%13 = phi i32 [ %6, %5 ], [ %11, %7 ]
ret i32 %13
}
__attribute__((always_)) unsigned long virt_to_phys(volatile void *address) {
  return ((unsigned long)(address) - ((unsigned long)(0xC0000000UL)));
}


x86 assembly (clang, -O0):
<virt_to_phys>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movabs $0xc0000000,%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<virt_to_phys>:
movabs $0xffffffff40000000,%rax
ff ff ff
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @virt_to_phys(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = sub i64 %4, 3221225472
ret i64 %5
}

LLVM IR (-O2):
define i64 @virt_to_phys(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = add i64 %2, -3221225472
ret i64 %3
}
char *langRomTypeMirrored() { return "Mirrored ROM"; }


x86 assembly (clang, -O0):
<langRomTypeMirrored>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeMirrored>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Mirrored ROM\00"
define i8* @langRomTypeMirrored() {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [13 x i8] c"Mirrored ROM\00"
define i8* @langRomTypeMirrored() {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
double CLOCKS_PER_SEC;
double calCpuTime(int c0, int c1) {
  double wt;
  wt = (double)(c1 - c0) / CLOCKS_PER_SEC;
  return wt;
}


x86 assembly (clang, -O0):
<calCpuTime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
cvtsi2sd %eax,%xmm0
mov    0x2ecd(%rip),%rax
divsd  (%rax),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calCpuTime>:
sub    %edi,%esi
cvtsi2sd %esi,%xmm0
mov    0x2edb(%rip),%rax
divsd  (%rax),%xmm0
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global double 0.000000e+00
define double @calCpuTime(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = sitofp i32 %8 to double
%10 = load double, double* @CLOCKS_PER_SEC
%11 = fdiv double %9, %10
store double %11, double* %5
%12 = load double, double* %5
ret double %12
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global double 0.000000e+00
define double @calCpuTime(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = sitofp i32 %3 to double
%5 = load double, double* @CLOCKS_PER_SEC
%6 = fdiv double %4, %5
ret double %6
}
/* Type definitions */
typedef scalar_t__ int64_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ __stdfix_sat_k(scalar_t__);
int32_t __stdfix_sadd_k(int32_t x, int32_t y) {
  return (__stdfix_sat_k((int64_t)x + (int64_t)y));
}


x86 assembly (clang, -O0):
<__stdfix_sadd_k>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
add    -0x10(%rbp),%rdi
call   1030 <__stdfix_sat_k@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_sadd_k>:
add    %rsi,%rdi
jmp    1030 <__stdfix_sat_k@plt>

LLVM IR (-O0):
define i64 @__stdfix_sadd_k(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
%8 = call i64 @__stdfix_sat_k(i64 %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @__stdfix_sadd_k(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
%4 = tail call i64 @__stdfix_sat_k(i64 %3)
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ GLdouble;

/* Variables and functions */
int /*<<< orphan*/ glLoadMatrixd(int /*<<< orphan*/ *);
void LoadMatrixd(GLdouble v[16]) { glLoadMatrixd(v); }


x86 assembly (clang, -O0):
<LoadMatrixd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glLoadMatrixd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LoadMatrixd>:
jmp    1030 <glLoadMatrixd@plt>

LLVM IR (-O0):
define void @LoadMatrixd(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glLoadMatrixd(i32* %3)
ret void
}

LLVM IR (-O2):
define void @LoadMatrixd(i32* %0) {
%2 = tail call i32 @glLoadMatrixd(i32* %0)
ret void
}
/* Variables and functions */
const char *callback_null_ret(void *(*callback)()) {
  void *ret = callback();
  if (ret == NULL) {
    return "null";
  } else {
    return "non-null";
  }
}


x86 assembly (clang, -O0):
<callback_null_ret>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   *-0x10(%rbp)
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1130 <callback_null_ret+0x30>
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    113b <callback_null_ret+0x3b>
lea    0xec9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callback_null_ret>:
push   %rax
xor    %eax,%eax
call   *%rdi
test   %rax,%rax
lea    0xef5(%rip),%rcx
lea    0xeea(%rip),%rax
cmove  %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"null\00"
@.str.1 = [9 x i8] c"non-null\00"
define i8* @callback_null_ret(i8* (...)* %0) {
%2 = alloca i8*
%3 = alloca i8* (...)*
%4 = alloca i8*
store i8* (...)* %0, i8* (...)** %3
%5 = load i8* (...)*, i8* (...)** %3
%6 = call i8* (...) %5()
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %11
10: ; preds = %1
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %11
11: ; preds = %10, %9
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
@.str = [5 x i8] c"null\00"
@.str.1 = [9 x i8] c"non-null\00"
define i8* @callback_null_ret(i8* (...)* nocapture %0) {
%2 = tail call i8* (...) %0()
%3 = icmp eq i8* %2, null
%4 = select i1 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0)
ret i8* %4
}
int fd_out(int fd) {
  static int stored_fd = 1;
  if ((fd != -2) && (fd > 0)) {
    stored_fd = fd;
  }
  return (stored_fd);
}


x86 assembly (clang, -O0):
<fd_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xfffffffe,-0x4(%rbp)
je     1124 <fd_out+0x24>
cmpl   $0x0,-0x4(%rbp)
jle    1124 <fd_out+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,0x2efc(%rip)
mov    0x2ef6(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_out>:
test   %edi,%edi
jle    110d <fd_out+0xd>
mov    %edi,%eax
mov    %edi,0x2f14(%rip)
ret
mov    0x2f0d(%rip),%eax
ret

LLVM IR (-O0):
@fd_out.stored_fd = internal global i32 1
define i32 @fd_out(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, -2
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = load i32, i32* %2
store i32 %9, i32* @fd_out.stored_fd
br label %10
10: ; preds = %8, %5, %1
%11 = load i32, i32* @fd_out.stored_fd
ret i32 %11
}

LLVM IR (-O2):
@fd_out.stored_fd = internal unnamed_addr global i32 1
define i32 @fd_out(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = load i32, i32* @fd_out.stored_fd
br label %6
5: ; preds = %1
store i32 %0, i32* @fd_out.stored_fd
br label %6
6: ; preds = %3, %5
%7 = phi i32 [ %4, %3 ], [ %0, %5 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ system(char *);
void open_url(char *url) {
  char command[255];
  sprintf(command, "x-www-browser '%s'", url);
  system(command);
}


x86 assembly (clang, -O0):
<open_url>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xebf(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x110(%rbp),%rdi
call   1030 <system@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_url>:
push   %rbx
sub    $0x100,%rsp
mov    %rdi,%rdx
lea    0xece(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"x-www-browser '%s'\00"
define void @open_url(i8* %0) {
%2 = alloca i8*
%3 = alloca [255 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [255 x i8], [255 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [255 x i8], [255 x i8]* %3, i64 0, i64 0
%8 = call i32 @system(i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"x-www-browser '%s'\00"
define void @open_url(i8* %0) {
%2 = alloca [255 x i8]
%3 = getelementptr inbounds [255 x i8], [255 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = call i32 @system(i8* %3)
ret void
}
int df02_dialer(num, acu)
char *num, *acu;
{ return (df_dialer(num, acu, 0)); }


x86 assembly (clang, -O0):
<df02_dialer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
mov    $0x0,%al
call   1030 <df_dialer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<df02_dialer>:
xor    %edx,%edx
xor    %eax,%eax
jmp    1030 <df_dialer@plt>

LLVM IR (-O0):
define i32 @df02_dialer(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (i8*, i8*, i32, ...) bitcast (i32 (...)* @df_dialer to i32 (i8*, i8*, i32, ...)*)(i8* %5, i8* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @df02_dialer(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, i8*, i32, ...) bitcast (i32 (...)* @df_dialer to i32 (i8*, i8*, i32, ...)*)(i8* %0, i8* %1, i32 0)
ret i32 %3
}
/* Type definitions */
union bpf_attr {
  scalar_t__ kern_version;
  scalar_t__ log_level;
  scalar_t__ log_size;
  scalar_t__ log_buf;
  scalar_t__ license;
  scalar_t__ insns;
  scalar_t__ insn_cnt;
  int /*<<< orphan*/ prog_type;
};

/* Variables and functions */
int /*<<< orphan*/ BPF_PROG_TYPE_KPROBE;
int main(void) {
  union bpf_attr attr;
  attr.prog_type = BPF_PROG_TYPE_KPROBE;
  attr.insn_cnt = 0;
  attr.insns = 0;
  attr.license = 0;
  attr.log_buf = 0;
  attr.log_size = 0;
  attr.log_level = 0;
  attr.kern_version = 0;
  attr = attr;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%union.bpf_attr = type { i64 }
@BPF_PROG_TYPE_KPROBE = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca %union.bpf_attr
store i32 0, i32* %1
%3 = load i32, i32* @BPF_PROG_TYPE_KPROBE
%4 = bitcast %union.bpf_attr* %2 to i32*
store i32 %3, i32* %4
%5 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %5
%6 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %6
%7 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %7
%8 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %8
%9 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %9
%10 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %10
%11 = bitcast %union.bpf_attr* %2 to i64*
store i64 0, i64* %11
%12 = bitcast %union.bpf_attr* %2 to i8*
%13 = bitcast %union.bpf_attr* %2 to i8*
ret i32 0
}

LLVM IR (-O2):
@BPF_PROG_TYPE_KPROBE = global i32 0
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *);
int main() {
  double r, pi = 3.14159;
  scanf("%lf", &r);
  printf("A=%.4lf\n", pi * r * r);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xec9(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
lea    0xec5(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
movsd  -0x18(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee0(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm1
movsd  0xec3(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
store double 3.141590e+00, double* %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%5 = load double, double* %3
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = load double, double* %2
%9 = fmul double %7, %8
%10 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%4 = load double, double* %1
%5 = fmul double %4, 3.141590e+00
%6 = fmul double %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %6)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int iruserok2(int /*<<< orphan*/, int, char const *, char const *, char *);
int iruserok(u_int32_t raddr, int superuser, const char *ruser,
             const char *luser) {
  return iruserok2(raddr, superuser, ruser, luser, "-");
}


x86 assembly (clang, -O0):
<iruserok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xec5(%rip),%r8
call   1030 <iruserok2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iruserok>:
lea    0xee9(%rip),%r8
jmp    1030 <iruserok2@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"-\00"
define i32 @iruserok(i32 %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @iruserok2(i32 %9, i32 %10, i8* %11, i8* %12, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 %13
}

LLVM IR (-O2):
@.str = [2 x i8] c"-\00"
define i32 @iruserok(i32 %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i32 @iruserok2(i32 %0, i32 %1, i8* %2, i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 %5
}
void SPI_SD_DisableTxInt(void) {}


x86 assembly (clang, -O0):
<SPI_SD_DisableTxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_SD_DisableTxInt>:
ret

LLVM IR (-O0):
define void @SPI_SD_DisableTxInt() {
ret void
}

LLVM IR (-O2):
define void @SPI_SD_DisableTxInt() {
ret void
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=800 "
         "REPO_URL=heads/odroidc2-3.14.y-android-3-gd5a12c1 "
         "REVISION=-v3.14.23-2647-gd5a12c1 "
         "CHANGED_REVISION=v3.14.23-2647-gd5a12c1 CHANGE_DATE=2016-01-21 "
         "14:20:54 +0900 BUILD_DATE=2016. 01. 21. (목) 14:55:02 KST "
         "BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_DVFS= "
         "MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [440 x i8] c"malidrv: API_VERSION=800 REPO_URL=heads/odroidc2-3.14.y-android-3-gd5a12c1 REVISION=-v3.14.23-2647-gd5a12c1 CHANGED_REVISION=v3.14.23-2647-gd5a12c1 CHANGE_DATE=2016-01-21 14:20:54 +0900 BUILD_DATE=2016. 01. 21. (\EB\AA\A9) 14:55:02 KST BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_DVFS= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([440 x i8], [440 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [440 x i8] c"malidrv: API_VERSION=800 REPO_URL=heads/odroidc2-3.14.y-android-3-gd5a12c1 REVISION=-v3.14.23-2647-gd5a12c1 CHANGED_REVISION=v3.14.23-2647-gd5a12c1 CHANGE_DATE=2016-01-21 14:20:54 +0900 BUILD_DATE=2016. 01. 21. (\EB\AA\A9) 14:55:02 KST BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_DVFS= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([440 x i8], [440 x i8]* @.str, i64 0, i64 0)
}
unsigned xrop3_75_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = D | stk3;
  stk1 = T ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_75_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_75_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
not    %ecx
mov    %ecx,%eax
or     $0xff,%eax
xor    %edx,%eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_75_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = xor i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_75_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -1
%8 = or i32 %7, 255
%9 = xor i32 %6, %8
%10 = and i32 %9, %7
%11 = or i32 %10, %3
ret i32 %11
}
int f(int x) {
  _Bool b = (x < 10);
  return (b == 0);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
setl   %al
and    $0x1,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
cmp    $0xa,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
%6 = zext i1 %5 to i8
store i8 %6, i8* %3
%7 = load i8, i8* %3
%8 = trunc i8 %7 to i1
%9 = zext i1 %8 to i32
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp sgt i32 %0, 9
%3 = zext i1 %2 to i32
ret i32 %3
}