xunge/DecIR huggingface dataset:
int bang(int x) {
  int x1 = x | (x >> 16);
  int x2 = x1 | (x1 >> 8);
  int x3 = x2 | (x2 >> 4);
  int x4 = x3 | (x3 >> 2);
  int x5 = x4 | (x4 >> 1);
  return (~x5 & 0x1);
}


x86 assembly (clang, -O0):
<bang>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x10(%rbp),%ecx
sar    $0x2,%ecx
or     %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x14(%rbp),%ecx
sar    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bang>:
mov    %edi,%eax
sar    $0x10,%eax
or     %edi,%eax
mov    %eax,%ecx
sar    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    %eax
or     %ecx,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bang(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 16
%11 = or i32 %8, %10
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = load i32, i32* %3
%14 = ashr i32 %13, 8
%15 = or i32 %12, %14
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = load i32, i32* %4
%18 = ashr i32 %17, 4
%19 = or i32 %16, %18
store i32 %19, i32* %5
%20 = load i32, i32* %5
%21 = load i32, i32* %5
%22 = ashr i32 %21, 2
%23 = or i32 %20, %22
store i32 %23, i32* %6
%24 = load i32, i32* %6
%25 = load i32, i32* %6
%26 = ashr i32 %25, 1
%27 = or i32 %24, %26
store i32 %27, i32* %7
%28 = load i32, i32* %7
%29 = xor i32 %28, -1
%30 = and i32 %29, 1
ret i32 %30
}

LLVM IR (-O2):
define i32 @bang(i32 %0) {
%2 = ashr i32 %0, 16
%3 = or i32 %2, %0
%4 = ashr i32 %3, 8
%5 = or i32 %4, %3
%6 = ashr i32 %5, 4
%7 = or i32 %6, %5
%8 = ashr i32 %7, 2
%9 = or i32 %8, %7
%10 = lshr i32 %9, 1
%11 = or i32 %10, %9
%12 = and i32 %11, 1
%13 = xor i32 %12, 1
ret i32 %13
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void u16_ub(const char *i, uint16_t *o) {
  *o = ((uint16_t)((uint8_t)i[0]) << 8) + ((uint8_t)i[1]);
}


x86 assembly (clang, -O0):
<u16_ub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
shl    $0x8,%ecx
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%eax
add    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<u16_ub>:
movsbl (%rdi),%eax
shl    $0x8,%eax
movsbl 0x1(%rdi),%ecx
add    %eax,%ecx
mov    %ecx,(%rsi)
ret

LLVM IR (-O0):
define void @u16_ub(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = shl i32 %8, 8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = add nsw i32 %9, %13
%15 = load i32*, i32** %4
store i32 %14, i32* %15
ret void
}

LLVM IR (-O2):
define void @u16_ub(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = shl nsw i32 %4, 8
%6 = getelementptr inbounds i8, i8* %0, i64 1
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = add nsw i32 %5, %8
store i32 %9, i32* %1
ret void
}
/* Type definitions */
typedef int uint;

/* Variables and functions */
uint iterative_popcount_32(uint x) {
  uint n = 0;
  while (x != 0) {
    ++n;
    x &= (x - 1);
  }
  return n;
}


x86 assembly (clang, -O0):
<iterative_popcount_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <iterative_popcount_32+0x32>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <iterative_popcount_32+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iterative_popcount_32>:
xor    %eax,%eax
test   %edi,%edi
je     111c <iterative_popcount_32+0x1c>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%eax
lea    -0x1(%rdi),%ecx
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <iterative_popcount_32+0x10>
ret

LLVM IR (-O0):
define i32 @iterative_popcount_32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %2
%13 = and i32 %12, %11
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @iterative_popcount_32(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = add nsw i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_cond_free() {
  printf("NOT IMPLEMENTED:"
         "pa_cond_free"
         "\n");
}


x86 assembly (clang, -O0):
<pa_cond_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_cond_free>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"NOT IMPLEMENTED:pa_cond_free\0A\00"
define i32 @pa_cond_free() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [29 x i8] c"NOT IMPLEMENTED:pa_cond_free\00"
define i32 @pa_cond_free() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void h_cgreg(char *name, int argc, char **argv, void *user_data) {
  printf("Called: %s\n", __FUNCTION__);
}


x86 assembly (clang, -O0):
<h_cgreg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xed2(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h_cgreg>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Called: %s\0A\00"
@__FUNCTION__.h_cgreg = [8 x i8] c"h_cgreg\00"
define void @h_cgreg(i8* %0, i32 %1, i8** %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i8* %3, i8** %8
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__FUNCTION__.h_cgreg, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"Called: %s\0A\00"
@__FUNCTION__.h_cgreg = [8 x i8] c"h_cgreg\00"
define void @h_cgreg(i8* nocapture readnone %0, i32 %1, i8** nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__FUNCTION__.h_cgreg, i64 0, i64 0))
ret void
}
/* Variables and functions */
int place();
void vector_1(int *ary, int size) {
#pragma acc parallel num_workers(32) vector_length(32) copy(ary [0:size])      \
    firstprivate(size)
  {
#pragma acc loop gang
    for (int jx = 0; jx < 1; jx++)
#pragma acc loop auto
      for (int ix = 0; ix < size; ix++)
        ary[ix] = place();
  }
}


x86 assembly (clang, -O0):
<vector_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x1,-0x10(%rbp)
jge    1178 <vector_1+0x68>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1165 <vector_1+0x55>
mov    $0x0,%al
call   1030 <place@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1137 <vector_1+0x27>
jmp    116a <vector_1+0x5a>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <vector_1+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_1>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1144 <vector_1+0x34>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <place@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <vector_1+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @vector_1(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %25, %2
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 1
br i1 %9, label %10, label %28
10: ; preds = %7
store i32 0, i32* %6
br label %11
11: ; preds = %21, %10
%12 = load i32, i32* %6
%13 = load i32, i32* %4
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %24
15: ; preds = %11
%16 = call i32 (...) @place()
%17 = load i32*, i32** %3
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
br label %21
21: ; preds = %15
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 1
store i32 %23, i32* %6
br label %11
24: ; preds = %11
br label %25
25: ; preds = %24
%26 = load i32, i32* %5
%27 = add nsw i32 %26, 1
store i32 %27, i32* %5
br label %7
28: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @vector_1(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %11, %7 ]
%9 = tail call i32 (...) @place()
%10 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 %9, i32* %10
%11 = add nuw nsw i64 %8, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %6, label %7
}
/* Variables and functions */
int gAnd(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ gAnd4Way(int, int, int, int);
int gAnd8Way(int a, int b, int c, int d, int e, int f, int g, int h) {
  return gAnd(gAnd4Way(a, b, c, d), gAnd4Way(e, f, g, h));
}


x86 assembly (clang, -O0):
<gAnd8Way>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <gAnd4Way@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
mov    0x10(%rbp),%edx
mov    0x18(%rbp),%ecx
call   1040 <gAnd4Way@plt>
mov    -0x1c(%rbp),%edi
mov    %eax,%esi
call   1030 <gAnd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gAnd8Way>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %r9d,%r14d
mov    %r8d,%r15d
mov    0x30(%rsp),%r12d
mov    0x38(%rsp),%ebp
call   1040 <gAnd4Way@plt>
mov    %eax,%ebx
mov    %r15d,%edi
mov    %r14d,%esi
mov    %r12d,%edx
mov    %ebp,%ecx
call   1040 <gAnd4Way@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <gAnd@plt>

LLVM IR (-O0):
define i32 @gAnd8Way(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
store i32 %0, i32* %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%17 = load i32, i32* %9
%18 = load i32, i32* %10
%19 = load i32, i32* %11
%20 = load i32, i32* %12
%21 = call i32 @gAnd4Way(i32 %17, i32 %18, i32 %19, i32 %20)
%22 = load i32, i32* %13
%23 = load i32, i32* %14
%24 = load i32, i32* %15
%25 = load i32, i32* %16
%26 = call i32 @gAnd4Way(i32 %22, i32 %23, i32 %24, i32 %25)
%27 = call i32 @gAnd(i32 %21, i32 %26)
ret i32 %27
}

LLVM IR (-O2):
define i32 @gAnd8Way(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = tail call i32 @gAnd4Way(i32 %0, i32 %1, i32 %2, i32 %3)
%10 = tail call i32 @gAnd4Way(i32 %4, i32 %5, i32 %6, i32 %7)
%11 = tail call i32 @gAnd(i32 %9, i32 %10)
ret i32 %11
}
/* Variables and functions */
int core6_safe(char const *);
int U_EMRPOLYLINE16_safe(const char *record) { return (core6_safe(record)); }


x86 assembly (clang, -O0):
<U_EMRPOLYLINE16_safe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <core6_safe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRPOLYLINE16_safe>:
jmp    1030 <core6_safe@plt>

LLVM IR (-O0):
define i32 @U_EMRPOLYLINE16_safe(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core6_safe(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @U_EMRPOLYLINE16_safe(i8* %0) {
%2 = tail call i32 @core6_safe(i8* %0)
ret i32 %2
}
/* Variables and functions */
float __ocml_cosh_f32(float);
float coshf(float x) { return __ocml_cosh_f32(x); }


x86 assembly (clang, -O0):
<coshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__ocml_cosh_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coshf>:
jmp    1030 <__ocml_cosh_f32@plt>

LLVM IR (-O0):
define float @coshf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__ocml_cosh_f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @coshf(float %0) {
%2 = tail call float @__ocml_cosh_f32(float %0)
ret float %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
uint16_t network_to_host_short(uint16_t s) { return ntohs(s); }


x86 assembly (clang, -O0):
<network_to_host_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<network_to_host_short>:
jmp    1030 <ntohs@plt>

LLVM IR (-O0):
define i32 @network_to_host_short(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ntohs(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @network_to_host_short(i32 %0) {
%2 = tail call i32 @ntohs(i32 %0)
ret i32 %2
}
/* Variables and functions */
int time(int /*<<< orphan*/ *);
void pause(int inNum) {
  int iCurrentTime = 0;
  int iElapsedTime = 0;
  iCurrentTime = time(NULL);
  do {
    iElapsedTime = time(NULL);
  } while ((iElapsedTime - iCurrentTime) < inNum);
}


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jl     1135 <pause+0x25>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <time@plt>
mov    %eax,%ebp
xchg   %ax,%ax
xor    %edi,%edi
call   1030 <time@plt>
sub    %ebp,%eax
cmp    %ebx,%eax
jl     1120 <pause+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @pause(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @time(i32* null)
store i32 %5, i32* %3
br label %6
6: ; preds = %8, %1
%7 = call i32 @time(i32* null)
store i32 %7, i32* %4
br label %8
8: ; preds = %6
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = sub nsw i32 %9, %10
%12 = load i32, i32* %2
%13 = icmp slt i32 %11, %12
br i1 %13, label %6, label %14
14: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @pause(i32 %0) {
%2 = tail call i32 @time(i32* null)
br label %3
3: ; preds = %3, %1
%4 = tail call i32 @time(i32* null)
%5 = sub nsw i32 %4, %2
%6 = icmp slt i32 %5, %0
br i1 %6, label %3, label %7
7: ; preds = %3
ret void
}
/* Type definitions */
struct entity_conv {
  int dummy;
};

/* Variables and functions */
int encoding_norm_done(struct entity_conv *);
int entity_norm_done(struct entity_conv *conv) {
  return encoding_norm_done(conv);
}


x86 assembly (clang, -O0):
<entity_norm_done>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <encoding_norm_done@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entity_norm_done>:
jmp    1030 <encoding_norm_done@plt>

LLVM IR (-O0):
%struct.entity_conv = type { i32 }
define i32 @entity_norm_done(%struct.entity_conv* %0) {
%2 = alloca %struct.entity_conv*
store %struct.entity_conv* %0, %struct.entity_conv** %2
%3 = load %struct.entity_conv*, %struct.entity_conv** %2
%4 = call i32 @encoding_norm_done(%struct.entity_conv* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.entity_conv = type { i32 }
define i32 @entity_norm_done(%struct.entity_conv* %0) {
%2 = tail call i32 @encoding_norm_done(%struct.entity_conv* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ prints(char *);
void __attribute__((noreturn)) main(void) {
  prints("Welcome in stage2!\r\n");
  while (1)
    ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <prints@plt>
jmp    1120 <main+0x10>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <prints@plt>
nopl   (%rax)
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [21 x i8] c"Welcome in stage2!\0D\0A\00"
define void @main() {
%1 = call i32 @prints(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [21 x i8] c"Welcome in stage2!\0D\0A\00"
define void @main() {
%1 = tail call i32 @prints(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ freeWakeLock(int);
int /*<<< orphan*/ getWakeLock(int);
int main() {
  getWakeLock(1);
  freeWakeLock(1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <getWakeLock@plt>
mov    $0x1,%edi
call   1040 <freeWakeLock@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <getWakeLock@plt>
mov    $0x1,%edi
call   1040 <freeWakeLock@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @getWakeLock(i32 1)
%2 = call i32 @freeWakeLock(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @getWakeLock(i32 1)
%2 = tail call i32 @freeWakeLock(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ rec(int /*<<< orphan*/);
int main() { rec(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <rec@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <rec@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @rec(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @rec(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ msg(char *, int, int);
void exitonsig(int sig) {
  msg("exit(%d) on signal %d", sig, sig);
  exit(sig);
}


x86 assembly (clang, -O0):
<exitonsig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xec8(%rip),%rdi
call   1040 <msg@plt>
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<exitonsig>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1040 <msg@plt>
mov    %ebx,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"exit(%d) on signal %d\00"
define void @exitonsig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @msg(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@.str = [22 x i8] c"exit(%d) on signal %d\00"
define void @exitonsig(i32 %0) {
%2 = tail call i32 @msg(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %0)
%3 = tail call i32 @exit(i32 %0)
unreachable
}
unsigned int oreInSecondi(unsigned int oreTempoInput,
                          unsigned int minutiTempoInput,
                          unsigned int secondiTempoInput) {
  unsigned int secondiOrario;
  secondiOrario =
      (secondiTempoInput + (minutiTempoInput + (oreTempoInput * 60)) * 60);
  return secondiOrario;
}


x86 assembly (clang, -O0):
<oreInSecondi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   $0x3c,-0x4(%rbp),%edx
add    %edx,%ecx
imul   $0x3c,%ecx,%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oreInSecondi>:
imul   $0x3c,%edi,%eax
add    %esi,%eax
imul   $0x3c,%eax,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @oreInSecondi(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = mul i32 %10, 60
%12 = add i32 %9, %11
%13 = mul i32 %12, 60
%14 = add i32 %8, %13
store i32 %14, i32* %7
%15 = load i32, i32* %7
ret i32 %15
}

LLVM IR (-O2):
define i32 @oreInSecondi(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %0, 60
%5 = add i32 %4, %1
%6 = mul i32 %5, 60
%7 = add i32 %6, %2
ret i32 %7
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
uint32_t find(int *parent, uint32_t parent_len, uint32_t id) {
  if (parent[id] == -1) {
    return id;
  }
  return find(parent, parent_len, (uint32_t)parent[id]);
}


x86 assembly (clang, -O0):
<find>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
cmpl   $0xffffffff,(%rax,%rcx,4)
jne    1143 <find+0x33>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1160 <find+0x50>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
movslq (%rax,%rcx,4),%rdx
call   1030 <find@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find>:
mov    %rdx,%rax
movslq (%rdi,%rdx,4),%rdx
cmp    $0xffffffffffffffff,%rdx
jne    1100 <find>
ret

LLVM IR (-O0):
define i64 @find(i32* %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i64
store i32* %0, i32** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i32*, i32** %5
%9 = load i64, i64* %7
%10 = getelementptr inbounds i32, i32* %8, i64 %9
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i64, i64* %7
store i64 %14, i64* %4
br label %24
15: ; preds = %3
%16 = load i32*, i32** %5
%17 = load i64, i64* %6
%18 = load i32*, i32** %5
%19 = load i64, i64* %7
%20 = getelementptr inbounds i32, i32* %18, i64 %19
%21 = load i32, i32* %20
%22 = sext i32 %21 to i64
%23 = call i64 @find(i32* %16, i64 %17, i64 %22)
store i64 %23, i64* %4
br label %24
24: ; preds = %15, %13
%25 = load i64, i64* %4
ret i64 %25
}

LLVM IR (-O2):
define i64 @find(i32* nocapture %0, i64 %1, i64 %2) {
br label %4
4: ; preds = %4, %3
%5 = phi i64 [ %2, %3 ], [ %9, %4 ]
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, -1
%9 = sext i32 %7 to i64
br i1 %8, label %10, label %4
10: ; preds = %4
ret i64 %5
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local2;
  unsigned int local1;
  {
    state[0UL] = input[0UL] + 4284877637U;
    local1 = 0UL;
    while (local1 < 1UL) {
      local2 = 0UL;
      while (local2 < 1UL) {
        local2 += 2UL;
      }
      local1 += 2UL;
    }
    output[0UL] = state[0UL] - 3662329353U;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0xff660b45,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    $0x1,%rax
jae    1160 <RandomFunc+0x60>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    $0x1,%rax
jae    1151 <RandomFunc+0x51>
mov    -0x18(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x18(%rbp)
jmp    1135 <RandomFunc+0x35>
mov    -0x1c(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x1c(%rbp)
jmp    1121 <RandomFunc+0x21>
mov    -0x14(%rbp),%ecx
sub    $0xda4ab609,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0x251b553c,%eax
add    (%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = add i32 %10, -10089659
%12 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %11, i32* %12
store i32 0, i32* %7
br label %13
13: ; preds = %27, %2
%14 = load i32, i32* %7
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %15, 1
br i1 %16, label %17, label %32
17: ; preds = %13
store i32 0, i32* %6
br label %18
18: ; preds = %22, %17
%19 = load i32, i32* %6
%20 = zext i32 %19 to i64
%21 = icmp ult i64 %20, 1
br i1 %21, label %22, label %27
22: ; preds = %18
%23 = load i32, i32* %6
%24 = zext i32 %23 to i64
%25 = add i64 %24, 2
%26 = trunc i64 %25 to i32
store i32 %26, i32* %6
br label %18
27: ; preds = %18
%28 = load i32, i32* %7
%29 = zext i32 %28 to i64
%30 = add i64 %29, 2
%31 = trunc i64 %30 to i32
store i32 %31, i32* %7
br label %13
32: ; preds = %13
%33 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%34 = load i32, i32* %33
%35 = sub i32 %34, -632637943
%36 = load i32*, i32** %4
%37 = getelementptr inbounds i32, i32* %36, i64 0
store i32 %35, i32* %37
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = add i32 %3, 622548284
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _pmu(int);
int pigpio_command(int, int, unsigned int, unsigned int, int /*<<< orphan*/);
int recvMax(int, char *, int, int);
int i2c_read_block_data(int pi, unsigned handle, unsigned reg, char *buf) {
  int bytes;
  bytes = pigpio_command(pi, 65, handle, reg, 0);
  if (bytes > 0) {
    bytes = recvMax(pi, buf, 32, bytes);
  }
  _pmu(pi);
  return bytes;
}


x86 assembly (clang, -O0):
<i2c_read_block_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0x41,%esi
xor    %r8d,%r8d
call   1040 <pigpio_command@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    117f <i2c_read_block_data+0x4f>
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%ecx
mov    $0x20,%edx
call   1050 <recvMax@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_pmu@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_read_block_data>:
push   %rbp
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%ebx
mov    $0x41,%esi
xor    %r8d,%r8d
call   1040 <pigpio_command@plt>
mov    %eax,%ebp
test   %eax,%eax
jle    1163 <i2c_read_block_data+0x33>
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x20,%edx
mov    %ebp,%ecx
call   1050 <recvMax@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <_pmu@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @i2c_read_block_data(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = call i32 @pigpio_command(i32 %10, i32 65, i32 %11, i32 %12, i32 0)
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %4
%17 = load i32, i32* %5
%18 = load i8*, i8** %8
%19 = load i32, i32* %9
%20 = call i32 @recvMax(i32 %17, i8* %18, i32 32, i32 %19)
store i32 %20, i32* %9
br label %21
21: ; preds = %16, %4
%22 = load i32, i32* %5
%23 = call i32 @_pmu(i32 %22)
%24 = load i32, i32* %9
ret i32 %24
}

LLVM IR (-O2):
define i32 @i2c_read_block_data(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = tail call i32 @pigpio_command(i32 %0, i32 65, i32 %1, i32 %2, i32 0)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @recvMax(i32 %0, i8* %3, i32 32, i32 %5)
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ %8, %7 ], [ %5, %4 ]
%11 = tail call i32 @_pmu(i32 %0)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ print_char(char);
int /*<<< orphan*/ print_int(int);
int main() {
  int local_variable;
  print_int(local_variable);
  local_variable = 123;
  print_int(local_variable);
  print_char('\n');
  local_variable = 126;
  print_int(local_variable);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <print_int@plt>
movl   $0x7b,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <print_int@plt>
mov    $0xa,%edi
call   1040 <print_char@plt>
movl   $0x7e,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <print_int@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <print_int@plt>
mov    $0x7b,%edi
call   1030 <print_int@plt>
mov    $0xa,%edi
call   1040 <print_char@plt>
mov    $0x7e,%edi
call   1030 <print_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = call i32 @print_int(i32 %3)
store i32 123, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @print_int(i32 %5)
%7 = call i32 @print_char(i8 signext 10)
store i32 126, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @print_int(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_int(i32 undef)
%2 = tail call i32 @print_int(i32 123)
%3 = tail call i32 @print_char(i8 signext 10)
%4 = tail call i32 @print_int(i32 126)
ret i32 0
}
/* Variables and functions */
char *decode(char *, int, int /*<<< orphan*/ *, int /*<<< orphan*/ *);
char *decode_dup(char *input_string, int duplicate) {
  return decode(input_string, duplicate, NULL, NULL);
}


x86 assembly (clang, -O0):
<decode_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rdx
call   1030 <decode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_dup>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <decode@plt>

LLVM IR (-O0):
define i8* @decode_dup(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @decode(i8* %5, i32 %6, i32* null, i32* null)
ret i8* %7
}

LLVM IR (-O2):
define i8* @decode_dup(i8* %0, i32 %1) {
%3 = tail call i8* @decode(i8* %0, i32 %1, i32* null, i32* null)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void md_sleep(int s) { sleep(s); }


x86 assembly (clang, -O0):
<md_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_sleep>:
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @md_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @md_sleep(i32 %0) {
%2 = tail call i32 @sleep(i32 %0)
ret void
}
/* Variables and functions */
int max_water_surface(int, int, int **);
int test_water_land() {
  int map[5][5] = {{0, 0, 1, 1, 0},
                   {0, 0, 1, 0, 0},
                   {1, 2, 2, 0, 0},
                   {0, 0, 1, 0, 1},
                   {0, 1, 2, 1, 1}};
  return 6 == max_water_surface(5, 5, map);
}


x86 assembly (clang, -O0):
<test_water_land>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
lea    -0x70(%rbp),%rdi
lea    0xecd(%rip),%rsi
mov    $0x64,%edx
call   1030 <memcpy@plt>
lea    -0x70(%rbp),%rdx
mov    $0x5,%esi
mov    %esi,%edi
call   1040 <max_water_surface@plt>
mov    %eax,%ecx
mov    $0x6,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_water_land>:
sub    $0x68,%rsp
mov    0xf46(%rip),%eax
mov    %eax,0x60(%rsp)
movaps 0xf2b(%rip),%xmm0
movaps %xmm0,0x50(%rsp)
movaps 0xf0f(%rip),%xmm0
movaps %xmm0,0x40(%rsp)
movaps 0xef3(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xed7(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xebb(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xe9f(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdx
mov    $0x5,%edi
mov    $0x5,%esi
call   1030 <max_water_surface@plt>
xor    %ecx,%ecx
cmp    $0x6,%eax
sete   %cl
mov    %ecx,%eax
add    $0x68,%rsp
ret

LLVM IR (-O0):
@__const.test_water_land.map = [5 x [5 x i32]] [[5 x i32] [i32 0, i32 0, i32 1, i32 1, i32 0], [5 x i32] [i32 0, i32 0, i32 1, i32 0, i32 0], [5 x i32] [i32 1, i32 2, i32 2, i32 0, i32 0], [5 x i32] [i32 0, i32 0, i32 1, i32 0, i32 1], [5 x i32] [i32 0, i32 1, i32 2, i32 1, i32 1]]
define i32 @test_water_land() {
%1 = alloca [5 x [5 x i32]]
%2 = bitcast [5 x [5 x i32]]* %1 to i8*
%3 = getelementptr inbounds [5 x [5 x i32]], [5 x [5 x i32]]* %1, i64 0, i64 0
%4 = bitcast [5 x i32]* %3 to i32**
%5 = call i32 @max_water_surface(i32 5, i32 5, i32** %4)
%6 = icmp eq i32 6, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@__const.test_water_land.map = [5 x [5 x i32]] [[5 x i32] [i32 0, i32 0, i32 1, i32 1, i32 0], [5 x i32] [i32 0, i32 0, i32 1, i32 0, i32 0], [5 x i32] [i32 1, i32 2, i32 2, i32 0, i32 0], [5 x i32] [i32 0, i32 0, i32 1, i32 0, i32 1], [5 x i32] [i32 0, i32 1, i32 2, i32 1, i32 1]]
define i32 @test_water_land() {
%1 = alloca [5 x [5 x i32]]
%2 = bitcast [5 x [5 x i32]]* %1 to i8*
%3 = bitcast [5 x [5 x i32]]* %1 to i32**
%4 = call i32 @max_water_surface(i32 5, i32 5, i32** %3)
%5 = icmp eq i32 %4, 6
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ lasvm_error(char *);
void *malloc(int);
void *realloc(void *, int);
void *xrealloc(void *ptr, int n) {
  if (!ptr)
    ptr = malloc(n);
  else
    ptr = realloc(ptr, n);
  if (!ptr)
    lasvm_error("Function realloc() has returned NULL.\n");
  return ptr;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    115b <xrealloc+0x2b>
mov    -0xc(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
jmp    116b <xrealloc+0x3b>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1182 <xrealloc+0x52>
lea    0xe83(%rip),%rdi
call   1050 <lasvm_error@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rbx
test   %rdi,%rdi
je     113d <xrealloc+0xd>
call   1040 <realloc@plt>
jmp    1144 <xrealloc+0x14>
mov    %esi,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1158 <xrealloc+0x28>
lea    0xead(%rip),%rdi
call   1050 <lasvm_error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"Function realloc() has returned NULL.\0A\00"
define i8* @xrealloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = call i8* @malloc(i32 %8)
store i8* %9, i8** %3
br label %14
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i8* @realloc(i8* %11, i32 %12)
store i8* %13, i8** %3
br label %14
14: ; preds = %10, %7
%15 = load i8*, i8** %3
%16 = icmp ne i8* %15, null
br i1 %16, label %19, label %17
17: ; preds = %14
%18 = call i32 @lasvm_error(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %17, %14
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
@.str = [39 x i8] c"Function realloc() has returned NULL.\0A\00"
define i8* @xrealloc(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i8* @malloc(i32 %1)
br label %8
6: ; preds = %2
%7 = tail call i8* @realloc(i8* %0, i32 %1)
br label %8
8: ; preds = %6, %4
%9 = phi i8* [ %7, %6 ], [ %5, %4 ]
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = tail call i32 @lasvm_error(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %8
ret i8* %9
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void fat_uint32(uint8_t *dest, uint32_t value) {
  dest[0] = value;
  dest[1] = value >> 8;
  dest[2] = value >> 16;
  dest[3] = value >> 24;
}


x86 assembly (clang, -O0):
<fat_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat_uint32>:
mov    %esi,(%rdi)
mov    %esi,%eax
sar    $0x8,%eax
mov    %eax,0x4(%rdi)
mov    %esi,%eax
sar    $0x10,%eax
mov    %eax,0x8(%rdi)
sar    $0x18,%esi
mov    %esi,0xc(%rdi)
ret

LLVM IR (-O0):
define void @fat_uint32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load i32, i32* %4
%9 = ashr i32 %8, 8
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 1
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = ashr i32 %12, 16
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 2
store i32 %13, i32* %15
%16 = load i32, i32* %4
%17 = ashr i32 %16, 24
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 3
store i32 %17, i32* %19
ret void
}

LLVM IR (-O2):
define void @fat_uint32(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
%3 = ashr i32 %1, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %3, i32* %4
%5 = ashr i32 %1, 16
%6 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %5, i32* %6
%7 = ashr i32 %1, 24
%8 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %7, i32* %8
ret void
}
int test_imm_75uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x75 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_75uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x75,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_75uint64_highword_reg>:
movabs $0x7500000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_75uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 117
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_75uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 502511173632
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
__float128 foo(__float128 a) { return -a; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movaps %xmm0,-0x10(%rbp)
movaps -0x10(%rbp),%xmm0
movaps 0xeed(%rip),%xmm1
xorps  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xorps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define fp128 @foo(fp128 %0) {
%2 = alloca fp128
store fp128 %0, fp128* %2
%3 = load fp128, fp128* %2
%4 = fneg fp128 %3
ret fp128 %4
}

LLVM IR (-O2):
define fp128 @foo(fp128 %0) {
%2 = fneg fp128 %0
ret fp128 %2
}
int fib(int n) {
  int result;
  if (n <= 1)
    result = n;
  else
    result = fib(n - 1) + fib(n - 2);
  return result;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jg     1130 <fib+0x20>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1153 <fib+0x43>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %2
store i32 %7, i32* %3
br label %16
8: ; preds = %1
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
%11 = call i32 @fib(i32 %10)
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 2
%14 = call i32 @fib(i32 %13)
%15 = add nsw i32 %11, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
int g4(int (*p)[], int (*q)[3]) { return q >= p; }


x86 assembly (clang, -O0):
<g4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
cmp    %rcx,%rax
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g4>:
xor    %eax,%eax
cmp    %rsi,%rdi
setbe  %al
ret

LLVM IR (-O0):
define i32 @g4([0 x i32]* %0, [3 x i32]* %1) {
%3 = alloca [0 x i32]*
%4 = alloca [3 x i32]*
store [0 x i32]* %0, [0 x i32]** %3
store [3 x i32]* %1, [3 x i32]** %4
%5 = load [3 x i32]*, [3 x i32]** %4
%6 = load [0 x i32]*, [0 x i32]** %3
%7 = bitcast [0 x i32]* %6 to [3 x i32]*
%8 = icmp uge [3 x i32]* %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @g4([0 x i32]* readnone %0, [3 x i32]* readnone %1) {
%3 = bitcast [0 x i32]* %0 to [3 x i32]*
%4 = icmp ule [3 x i32]* %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
scalar_t__ nit_alloc(long);
char *core___core__NativeString___new(char *self, long p0) {
  char *var;
  char *var1;
  var1 = (char *)nit_alloc(p0);
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__NativeString___new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <nit_alloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__NativeString___new>:
mov    %rsi,%rdi
jmp    1030 <nit_alloc@plt>

LLVM IR (-O0):
define i8* @core___core__NativeString___new(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i64, i64* %4
%8 = call i64 @nit_alloc(i64 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %6
%10 = load i8*, i8** %6
store i8* %10, i8** %5
br label %11
11: ; preds = %2
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @core___core__NativeString___new(i8* nocapture readnone %0, i64 %1) {
%3 = tail call i64 @nit_alloc(i64 %1)
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
int switch5(int a, int b) {
  switch (a) {
  case 1 ... 2:
    return 1;
  case 3 ... 4:
    return 2;
  case 5 ... 6:
    return 3;
  case 7 ... 11:
    return 4;
  }
  return -1;
}


x86 assembly (clang, -O0):
<switch5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0xa,%eax
ja     1163 <switch5+0x63>
mov    -0x18(%rbp),%rax
lea    0xed6(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    116a <switch5+0x6a>
movl   $0x2,-0x4(%rbp)
jmp    116a <switch5+0x6a>
movl   $0x3,-0x4(%rbp)
jmp    116a <switch5+0x6a>
movl   $0x4,-0x4(%rbp)
jmp    116a <switch5+0x6a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch5>:
add    $0xffffffff,%edi
mov    $0xffffffff,%eax
cmp    $0xa,%edi
ja     111a <switch5+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @switch5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
switch i32 %6, label %11 [
i32 1, label %7
i32 2, label %7
i32 3, label %8
i32 4, label %8
i32 5, label %9
i32 6, label %9
i32 7, label %10
i32 8, label %10
i32 9, label %10
i32 10, label %10
i32 11, label %10
]
7: ; preds = %2, %2
store i32 1, i32* %3
br label %12
8: ; preds = %2, %2
store i32 2, i32* %3
br label %12
9: ; preds = %2, %2
store i32 3, i32* %3
br label %12
10: ; preds = %2, %2, %2, %2, %2
store i32 4, i32* %3
br label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %12
12: ; preds = %11, %10, %9, %8, %7
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@switch.table.switch5 = [11 x i32] [i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4]
define i32 @switch5(i32 %0, i32 %1) {
%3 = add i32 %0, -1
%4 = icmp ult i32 %3, 11
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds [11 x i32], [11 x i32]* @switch.table.switch5, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %2, %5
%10 = phi i32 [ %8, %5 ], [ -1, %2 ]
ret i32 %10
}