void eri1_irq() {
  if ((*(volatile unsigned char *)(0xffff8c)) & (1 << 5)) {
    (*(volatile unsigned char *)(0xffff8c)) &= ~((1 << 5) | (1 << 6));
  }
  if ((*(volatile unsigned char *)(0xffff8c)) & (1 << 3)) {
    (*(volatile unsigned char *)(0xffff8c)) &= ~(1 << 3);
  }
  if ((*(volatile unsigned char *)(0xffff8c)) & (1 << 4)) {
    (*(volatile unsigned char *)(0xffff8c)) &= ~(1 << 4);
  }
  if ((*(volatile unsigned char *)(0xffff8c)) & (1 << 6)) {
    (*(volatile unsigned char *)(0xffff8c)) &= ~((1 << 6));
  }
}


x86 assembly (clang, -O0):
<eri1_irq>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     1130 <eri1_irq+0x30>
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xffffff9f,%eax
mov    %al,%cl
mov    $0xffff8c,%eax
mov    %cl,(%rax)
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     115c <eri1_irq+0x5c>
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xfffffff7,%eax
mov    %al,%cl
mov    $0xffff8c,%eax
mov    %cl,(%rax)
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     1188 <eri1_irq+0x88>
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xffffffef,%eax
mov    %al,%cl
mov    $0xffff8c,%eax
mov    %cl,(%rax)
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     11b4 <eri1_irq+0xb4>
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xffffffbf,%eax
mov    %al,%cl
mov    $0xffff8c,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<eri1_irq>:
testb  $0x20,0xffff8c
20
jne    1129 <eri1_irq+0x29>
testb  $0x8,0xffff8c
08
jne    113b <eri1_irq+0x3b>
testb  $0x10,0xffff8c
10
jne    114d <eri1_irq+0x4d>
testb  $0x40,0xffff8c
40
jne    115f <eri1_irq+0x5f>
ret
andb   $0x9f,0xffff8c
9f
testb  $0x8,0xffff8c
08
je     1114 <eri1_irq+0x14>
andb   $0xf7,0xffff8c
f7
testb  $0x10,0xffff8c
10
je     111e <eri1_irq+0x1e>
andb   $0xef,0xffff8c
ef
testb  $0x40,0xffff8c
40
je     1128 <eri1_irq+0x28>
andb   $0xbf,0xffff8c
bf
ret

LLVM IR (-O0):
define void @eri1_irq() {
%1 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%2 = zext i8 %1 to i32
%3 = and i32 %2, 32
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%7 = zext i8 %6 to i32
%8 = and i32 %7, -97
%9 = trunc i32 %8 to i8
store volatile i8 %9, i8* inttoptr (i64 16777100 to i8*)
br label %10
10: ; preds = %5, %0
%11 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%12 = zext i8 %11 to i32
%13 = and i32 %12, 8
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%17 = zext i8 %16 to i32
%18 = and i32 %17, -9
%19 = trunc i32 %18 to i8
store volatile i8 %19, i8* inttoptr (i64 16777100 to i8*)
br label %20
20: ; preds = %15, %10
%21 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%22 = zext i8 %21 to i32
%23 = and i32 %22, 16
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %30
25: ; preds = %20
%26 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%27 = zext i8 %26 to i32
%28 = and i32 %27, -17
%29 = trunc i32 %28 to i8
store volatile i8 %29, i8* inttoptr (i64 16777100 to i8*)
br label %30
30: ; preds = %25, %20
%31 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%32 = zext i8 %31 to i32
%33 = and i32 %32, 64
%34 = icmp ne i32 %33, 0
br i1 %34, label %35, label %40
35: ; preds = %30
%36 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%37 = zext i8 %36 to i32
%38 = and i32 %37, -65
%39 = trunc i32 %38 to i8
store volatile i8 %39, i8* inttoptr (i64 16777100 to i8*)
br label %40
40: ; preds = %35, %30
ret void
}

LLVM IR (-O2):
define void @eri1_irq() {
%1 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%2 = and i8 %1, 32
%3 = icmp eq i8 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %0
%5 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%6 = and i8 %5, -97
store volatile i8 %6, i8* inttoptr (i64 16777100 to i8*)
br label %7
7: ; preds = %4, %0
%8 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%9 = and i8 %8, 8
%10 = icmp eq i8 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %7
%12 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%13 = and i8 %12, -9
store volatile i8 %13, i8* inttoptr (i64 16777100 to i8*)
br label %14
14: ; preds = %11, %7
%15 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%16 = and i8 %15, 16
%17 = icmp eq i8 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %14
%19 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%20 = and i8 %19, -17
store volatile i8 %20, i8* inttoptr (i64 16777100 to i8*)
br label %21
21: ; preds = %18, %14
%22 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%23 = and i8 %22, 64
%24 = icmp eq i8 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%27 = and i8 %26, -65
store volatile i8 %27, i8* inttoptr (i64 16777100 to i8*)
br label %28
28: ; preds = %25, %21
ret void
}