xunge/DecIR huggingface dataset:
__attribute__((always_)) int test_and_clear_bit(int nr,
                                                volatile unsigned long *addr) {
  int oldbit;
  __asm__ __volatile__("lock ; "
                       "btrl %2,%1\n\tsbbl %0,%0"
                       : "=r"(oldbit), "=m"((*(volatile long *)addr))
                       : "Ir"(nr)
                       : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
lock btr %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_clear_bit>:
lock btr %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "lock ; btrl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "lock ; btrl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret i32 %3
}
int strcmp(const char *s1, const char *s2) {
  while (*s1 == *s2 && *s1 != '\0') {
    s1++;
    s2++;
  }
  return (int)(unsigned char)*s1 - (int)(unsigned char)*s2;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
jne    1137 <strcmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <strcmp+0x47>
jmp    1164 <strcmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <strcmp+0xc>
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    (%rdi),%al
mov    (%rsi),%cl
test   %al,%al
je     1134 <strcmp+0x34>
cmp    %cl,%al
jne    1134 <strcmp+0x34>
mov    $0x1,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%rdi,%rdx,1),%eax
movzbl (%rsi,%rdx,1),%ecx
test   %al,%al
je     1134 <strcmp+0x34>
add    $0x1,%rdx
cmp    %cl,%al
je     1120 <strcmp+0x20>
movzbl %al,%eax
movzbl %cl,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %8, %11
br i1 %12, label %13, label %18
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br label %18
18: ; preds = %13, %5
%19 = phi i1 [ false, %5 ], [ %17, %13 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = sub nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp ne i8 %3, %4
%6 = icmp eq i8 %3, 0
%7 = or i1 %6, %5
br i1 %7, label %18, label %8
8: ; preds = %2, %8
%9 = phi i8* [ %12, %8 ], [ %1, %2 ]
%10 = phi i8* [ %11, %8 ], [ %0, %2 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = load i8, i8* %11
%14 = load i8, i8* %12
%15 = icmp ne i8 %13, %14
%16 = icmp eq i8 %13, 0
%17 = or i1 %16, %15
br i1 %17, label %18, label %8
18: ; preds = %8, %2
%19 = phi i8 [ %3, %2 ], [ %13, %8 ]
%20 = phi i8 [ %4, %2 ], [ %14, %8 ]
%21 = zext i8 %19 to i32
%22 = zext i8 %20 to i32
%23 = sub nsw i32 %21, %22
ret i32 %23
}
/* Variables and functions */
unsigned long UINT_MAX;
int /*<<< orphan*/ link_failure();
void foo(int var) {
  if (!(var <= 0 || ((long unsigned)(unsigned)(var - 1) < UINT_MAX)))
    link_failure();
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1144 <foo+0x34>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,%eax
mov    0x2eb4(%rip),%rcx
cmp    (%rcx),%rax
jb     1144 <foo+0x34>
mov    $0x0,%al
call   1030 <link_failure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %edi,%edi
jle    1123 <foo+0x13>
add    $0xffffffff,%edi
mov    0x2eca(%rip),%rax
cmp    %rdi,(%rax)
jbe    1124 <foo+0x14>
ret
xor    %eax,%eax
jmp    1030 <link_failure@plt>

LLVM IR (-O0):
@UINT_MAX = global i64 0
define void @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 1
%8 = zext i32 %7 to i64
%9 = load i64, i64* @UINT_MAX
%10 = icmp ult i64 %8, %9
br i1 %10, label %13, label %11
11: ; preds = %5
%12 = call i32 (...) @link_failure()
br label %13
13: ; preds = %11, %5, %1
ret void
}

LLVM IR (-O2):
@UINT_MAX = global i64 0
define void @foo(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = zext i32 %4 to i64
%6 = load i64, i64* @UINT_MAX
%7 = icmp ugt i64 %6, %5
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 (...) @link_failure()
br label %10
10: ; preds = %8, %3, %1
ret void
}
int integer_length(int x) {
  unsigned int i;
  for (i = sizeof(x); i >= 2; i--) {
    if ((x >> (8 * (i - 1))) & 0xFF)
      return i;
  }
  return 1;
}


x86 assembly (clang, -O0):
<integer_length>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jb     1152 <integer_length+0x52>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
shl    $0x3,%ecx
sar    %cl,%eax
and    $0xff,%eax
cmp    $0x0,%eax
je     113f <integer_length+0x3f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <integer_length+0x59>
jmp    1144 <integer_length+0x44>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <integer_length+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<integer_length>:
mov    $0x4,%eax
cmp    $0xffffff,%edi
ja     111a <integer_length+0x1a>
mov    $0x3,%eax
test   $0xff0000,%edi
je     111b <integer_length+0x1b>
ret
and    $0xff00,%edi
cmp    $0x1,%edi
mov    $0x2,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @integer_length(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 4, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = icmp uge i32 %6, 2
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub i32 %10, 1
%12 = mul i32 8, %11
%13 = ashr i32 %9, %12
%14 = and i32 %13, 255
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %8
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %23
18: ; preds = %8
br label %19
19: ; preds = %18
%20 = load i32, i32* %4
%21 = add i32 %20, -1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
store i32 1, i32* %2
br label %23
23: ; preds = %22, %16
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @integer_length(i32 %0) {
%2 = icmp ult i32 %0, 16777216
br i1 %2, label %3, label %10
3: ; preds = %1
%4 = and i32 %0, 16711680
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = and i32 %0, 65280
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i32 1, i32 2
br label %10
10: ; preds = %6, %3, %1
%11 = phi i32 [ 4, %1 ], [ 3, %3 ], [ %9, %6 ]
ret i32 %11
}
void foo(void) {
  unsigned int a[2];
  unsigned int b[2];
  unsigned int c[2];
#pragma acc kernels pcopyout(a, b, c)
  {
    a[0] = 0;
    b[0] = 1;
    c[0] = a[0];
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca [2 x i32]
%2 = alloca [2 x i32]
%3 = alloca [2 x i32]
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 0
store i32 0, i32* %4
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
store i32 1, i32* %5
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 0
%7 = load i32, i32* %6
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
char saveState(char nowS) { return nowS; }


x86 assembly (clang, -O0):
<saveState>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<saveState>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @saveState(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @saveState(i8 returned signext %0) {
ret i8 %0
}
char c_char2eiffel(void) { return '\n'; }


x86 assembly (clang, -O0):
<c_char2eiffel>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_char2eiffel>:
mov    $0xa,%al
ret

LLVM IR (-O0):
define signext i8 @c_char2eiffel() {
ret i8 10
}

LLVM IR (-O2):
define signext i8 @c_char2eiffel() {
ret i8 10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int print_array(int acum[50], char *leyenda) {
  int i;
  printf("\n%s\n", leyenda);
  for (i = 50 - 1; i >= 0; i--)
    printf("%d", acum[i]);
  return 0;
}


x86 assembly (clang, -O0):
<print_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x31,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     116a <print_array+0x5a>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xeb0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1139 <print_array+0x29>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_array>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
lea    0xee1(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x31,%ebx
lea    0xed3(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0xffffffffffffffff,%rbx
jb     1140 <print_array+0x30>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [5 x i8] c"\0A%s\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @print_array(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %6)
store i32 49, i32* %5
br label %8
8: ; preds = %18, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %8
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %5
%20 = add nsw i32 %19, -1
store i32 %20, i32* %5
br label %8
21: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0A%s\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @print_array(i32* nocapture %0, i8* %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %4
4: ; preds = %2, %4
%5 = phi i64 [ 49, %2 ], [ %9, %4 ]
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = add nsw i64 %5, -1
%10 = icmp eq i64 %5, 0
br i1 %10, label %11, label %4
11: ; preds = %4
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ vdmnum(int, char *);
int /*<<< orphan*/ vdmprintf(char *, int /*<<< orphan*/);
void vdmlinewidth(int width) {
  char wh[4];
  vdmprintf("F1%s\x1e", vdmnum(width, wh));
}


x86 assembly (clang, -O0):
<vdmlinewidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1030 <vdmnum@plt>
mov    %eax,%esi
lea    0xec0(%rip),%rdi
call   1040 <vdmprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdmlinewidth>:
push   %rax
lea    0x4(%rsp),%rsi
call   1030 <vdmnum@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1040 <vdmprintf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"F1%s\1E\00"
define void @vdmlinewidth(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%6 = call i32 @vdmnum(i32 %4, i8* %5)
%7 = call i32 @vdmprintf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"F1%s\1E\00"
define void @vdmlinewidth(i32 %0) {
%2 = alloca [4 x i8]
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%4 = call i32 @vdmnum(i32 %0, i8* %3)
%5 = call i32 @vdmprintf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t H(uint32_t B, uint32_t C, uint32_t D) { return B ^ C ^ D; }


x86 assembly (clang, -O0):
<H>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<H>:
mov    %edi,%eax
xor    %esi,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @H(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = xor i32 %7, %8
%10 = load i32, i32* %6
%11 = xor i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @H(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %1, %0
%5 = xor i32 %4, %2
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ ip2long(char *);
int qqwry_get_location_by_long(char *, char *, int /*<<< orphan*/,
                               int /*<<< orphan*/ *);
int qqwry_get_location(char *addr1, char *addr2, char *ip, FILE *qqwry_file) {
  return qqwry_get_location_by_long(addr1, addr2, ip2long(ip), qqwry_file);
}


x86 assembly (clang, -O0):
<qqwry_get_location>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <ip2long@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    %eax,%edx
mov    -0x20(%rbp),%rcx
call   1030 <qqwry_get_location_by_long@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qqwry_get_location>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
mov    %rdx,%rdi
call   1040 <ip2long@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %eax,%edx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <qqwry_get_location_by_long@plt>

LLVM IR (-O0):
define i32 @qqwry_get_location(i8* %0, i8* %1, i8* %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = call i32 @ip2long(i8* %11)
%13 = load i32*, i32** %8
%14 = call i32 @qqwry_get_location_by_long(i8* %9, i8* %10, i32 %12, i32* %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @qqwry_get_location(i8* %0, i8* %1, i8* %2, i32* %3) {
%5 = tail call i32 @ip2long(i8* %2)
%6 = tail call i32 @qqwry_get_location_by_long(i8* %0, i8* %1, i32 %5, i32* %3)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ assert(char *);
unsigned long xt_core_hash_djb2(char *string) {
  assert(string);
  unsigned long hash;
  int c;
  hash = 5381;
  while ((c = *string++)) {
    hash = ((hash << 5) + hash) + c;
  }
  return hash;
}


x86 assembly (clang, -O0):
<xt_core_hash_djb2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     1167 <xt_core_hash_djb2+0x57>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    112d <xt_core_hash_djb2+0x1d>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xt_core_hash_djb2>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    (%rbx),%cl
test   %cl,%cl
je     114e <xt_core_hash_djb2+0x3e>
add    $0x1,%rbx
mov    $0x1505,%eax
nopl   0x0(%rax,%rax,1)
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rbx),%ecx
add    $0x1,%rbx
test   %cl,%cl
jne    1130 <xt_core_hash_djb2+0x20>
pop    %rbx
ret
mov    $0x1505,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @xt_core_hash_djb2(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @assert(i8* %5)
store i64 5381, i64* %3
br label %7
7: ; preds = %13, %1
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
store i32 %11, i32* %4
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %21
13: ; preds = %7
%14 = load i64, i64* %3
%15 = shl i64 %14, 5
%16 = load i64, i64* %3
%17 = add i64 %15, %16
%18 = load i32, i32* %4
%19 = sext i32 %18 to i64
%20 = add i64 %17, %19
store i64 %20, i64* %3
br label %7
21: ; preds = %7
%22 = load i64, i64* %3
ret i64 %22
}

LLVM IR (-O2):
define i64 @xt_core_hash_djb2(i8* %0) {
%2 = tail call i32 @assert(i8* %0)
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %1, %5
%6 = phi i8 [ %13, %5 ], [ %3, %1 ]
%7 = phi i8* [ %9, %5 ], [ %0, %1 ]
%8 = phi i64 [ %12, %5 ], [ 5381, %1 ]
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = mul i64 %8, 33
%11 = sext i8 %6 to i64
%12 = add i64 %10, %11
%13 = load i8, i8* %9
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %1
%16 = phi i64 [ 5381, %1 ], [ %12, %5 ]
ret i64 %16
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, int);
main() {
  int c;
  while (c = (getchar() != EOF))
    printf("%d\n", c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2eab(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x8(%rbp)
test   $0x1,%al
jne    115b <main+0x3b>
jmp    116f <main+0x4f>
mov    -0x8(%rbp),%esi
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb6(%rip),%r14
cmp    (%r14),%rax
je     1159 <main+0x39>
lea    0xec2(%rip),%rbx
xchg   %ax,%ax
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%r14),%rax
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %8, %0
%4 = call i64 (...) @getchar()
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
%7 = zext i1 %6 to i32
store i32 %7, i32* %2
br i1 %6, label %8, label %11
8: ; preds = %3
%9 = load i32, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %3
11: ; preds = %3
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i64 (...) @getchar()
%2 = load i64, i64* @EOF
%3 = icmp eq i64 %1, %2
br i1 %3, label %9, label %4
4: ; preds = %0, %4
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
%6 = tail call i64 (...) @getchar()
%7 = load i64, i64* @EOF
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %4
9: ; preds = %4, %0
ret i32 0
}
void REMR3QueryPendingInterrupt(void) {}


x86 assembly (clang, -O0):
<REMR3QueryPendingInterrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<REMR3QueryPendingInterrupt>:
ret

LLVM IR (-O0):
define void @REMR3QueryPendingInterrupt() {
ret void
}

LLVM IR (-O2):
define void @REMR3QueryPendingInterrupt() {
ret void
}
int middlenumber(int *number, int size) {
  int middle;
  middle = number[((1 + size) / 2) - 1];
  return middle;
}


x86 assembly (clang, -O0):
<middlenumber>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<middlenumber>:
mov    %esi,%eax
add    $0x1,%eax
shr    $0x1f,%eax
add    %esi,%eax
add    $0x1,%eax
sar    %eax
cltq
mov    -0x4(%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @middlenumber(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = add nsw i32 1, %7
%9 = sdiv i32 %8, 2
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %6, i64 %11
%13 = load i32, i32* %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @middlenumber(i32* nocapture %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = sdiv i32 %3, 2
%5 = add nsw i32 %4, -1
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
ret i32 %8
}
int adis16400_configure_ring(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @adis16400_configure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @adis16400_configure_ring(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
void part_init(struct blk_desc *dev_desc) {}


x86 assembly (clang, -O0):
<part_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<part_init>:
ret

LLVM IR (-O0):
%struct.blk_desc = type opaque
define void @part_init(%struct.blk_desc* %0) {
%2 = alloca %struct.blk_desc*
store %struct.blk_desc* %0, %struct.blk_desc** %2
ret void
}

LLVM IR (-O2):
%struct.blk_desc = type opaque
define void @part_init(%struct.blk_desc* nocapture %0) {
ret void
}
int biz31w_dialer(num, acu)
char *num, *acu;
{ return (biz_dialer(num, "w")); }


x86 assembly (clang, -O0):
<biz31w_dialer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
mov    $0x0,%al
call   1030 <biz_dialer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<biz31w_dialer>:
lea    0xee9(%rip),%rsi
xor    %eax,%eax
jmp    1030 <biz_dialer@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define i32 @biz31w_dialer(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @biz_dialer to i32 (i8*, i8*, ...)*)(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 %6
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define i32 @biz31w_dialer(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @biz_dialer to i32 (i8*, i8*, ...)*)(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
int ft_isprint(int c) { return (c > 31 && c <= 127); }


x86 assembly (clang, -O0):
<ft_isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x1f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <ft_isprint+0x20>
cmpl   $0x7f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x60,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 31
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ft_isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 96
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ teste;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ reverse(char *, int);
int main() {
  char teste[] = "daniel";
  printf("%s\n", teste);
  reverse(teste, sizeof(teste));
  printf("%s\n", teste);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xec5(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xebd(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0xb(%rbp),%rsi
lea    0xeb0(%rip),%rdi
call   1040 <printf@plt>
lea    -0xb(%rbp),%rdi
mov    $0x7,%esi
call   1030 <reverse@plt>
lea    -0xb(%rbp),%rsi
lea    0xe92(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movl   $0x6c6569,0x3(%rsp)
movl   $0x696e6164,(%rsp)
lea    0xecd(%rip),%r14
mov    %rsp,%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
mov    %rbx,%rdi
mov    $0x7,%esi
call   1030 <reverse@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.main.teste = [7 x i8] c"daniel\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [7 x i8]
store i32 0, i32* %1
%3 = bitcast [7 x i8]* %2 to i8*
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%7 = call i32 @reverse(i8* %6, i32 7)
%8 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@__const.main.teste = [7 x i8] c"daniel\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @reverse(i8* %2, i32 7)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
double add(double left, double right) { return left + right; }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @add(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @add(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ milli_delay(int);
int /*<<< orphan*/ printf(char *);
void test_c() {
  int i = 512;
  while (1) {
    printf("Done");
    milli_delay(10000);
  }
}


x86 assembly (clang, -O0):
<test_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x200,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2710,%edi
call   1040 <milli_delay@plt>
jmp    112f <test_c+0xf>

x86 assembly (clang, -O2):
<test_c>:
push   %rbx
lea    0xed8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    $0x2710,%edi
call   1040 <milli_delay@plt>
jmp    1130 <test_c+0x10>

LLVM IR (-O0):
@.str = [5 x i8] c"Done\00"
define void @test_c() {
%1 = alloca i32
store i32 512, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @milli_delay(i32 10000)
br label %2
}

LLVM IR (-O2):
@.str = [5 x i8] c"Done\00"
define void @test_c() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @milli_delay(i32 10000)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ min_heapify(int *, int, int);
void build_min_heap(int *num, int num_length) {
  int height;
  for (height = (num_length - 1) / 2; height >= 0; height--) {
    min_heapify(num, height, num_length);
  }
}


x86 assembly (clang, -O0):
<build_min_heap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     1157 <build_min_heap+0x47>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <min_heapify@plt>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1130 <build_min_heap+0x20>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_min_heap>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
js     1141 <build_min_heap+0x31>
mov    %esi,%ebx
mov    %rdi,%r14
lea    -0x1(%rbx),%eax
shr    $0x1f,%eax
lea    (%rbx,%rax,1),%ebp
add    $0xffffffff,%ebp
sar    %ebp
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
call   1030 <min_heapify@plt>
add    $0xffffffff,%ebp
jb     1130 <build_min_heap+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @build_min_heap(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = sdiv i32 %7, 2
store i32 %8, i32* %5
br label %9
9: ; preds = %17, %2
%10 = load i32, i32* %5
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %9
%13 = load i32*, i32** %3
%14 = load i32, i32* %5
%15 = load i32, i32* %4
%16 = call i32 @min_heapify(i32* %13, i32 %14, i32 %15)
br label %17
17: ; preds = %12
%18 = load i32, i32* %5
%19 = add nsw i32 %18, -1
store i32 %19, i32* %5
br label %9
20: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @build_min_heap(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = add nsw i32 %1, -1
%6 = sdiv i32 %5, 2
br label %7
7: ; preds = %4, %7
%8 = phi i32 [ %10, %7 ], [ %6, %4 ]
%9 = tail call i32 @min_heapify(i32* %0, i32 %8, i32 %1)
%10 = add nsw i32 %8, -1
%11 = icmp eq i32 %8, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %2
ret void
}
/* Type definitions */
struct sigma_dut {
  int dummy;
};
struct sigma_conn {
  int dummy;
};
struct sigma_cmd {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ disconnect_station(struct sigma_dut *);
int cmd_sta_disconnect(struct sigma_dut *dut, struct sigma_conn *conn,
                       struct sigma_cmd *cmd) {
  disconnect_station(dut);
  return 1;
}


x86 assembly (clang, -O0):
<cmd_sta_disconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <disconnect_station@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_sta_disconnect>:
push   %rax
call   1030 <disconnect_station@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sigma_dut = type { i32 }
%struct.sigma_conn = type { i32 }
%struct.sigma_cmd = type { i32 }
define i32 @cmd_sta_disconnect(%struct.sigma_dut* %0, %struct.sigma_conn* %1, %struct.sigma_cmd* %2) {
%4 = alloca %struct.sigma_dut*
%5 = alloca %struct.sigma_conn*
%6 = alloca %struct.sigma_cmd*
store %struct.sigma_dut* %0, %struct.sigma_dut** %4
store %struct.sigma_conn* %1, %struct.sigma_conn** %5
store %struct.sigma_cmd* %2, %struct.sigma_cmd** %6
%7 = load %struct.sigma_dut*, %struct.sigma_dut** %4
%8 = call i32 @disconnect_station(%struct.sigma_dut* %7)
ret i32 1
}

LLVM IR (-O2):
%struct.sigma_dut = type { i32 }
%struct.sigma_conn = type { i32 }
%struct.sigma_cmd = type { i32 }
define i32 @cmd_sta_disconnect(%struct.sigma_dut* %0, %struct.sigma_conn* nocapture readnone %1, %struct.sigma_cmd* nocapture readnone %2) {
%4 = tail call i32 @disconnect_station(%struct.sigma_dut* %0)
ret i32 1
}
int substract(int num1, int num2) { return num1 - num2; }


x86 assembly (clang, -O0):
<substract>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<substract>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @substract(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @substract(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Type definitions */
struct queue {
  int dummy;
};

/* Variables and functions */
int queue_is_full_locked(struct queue *);
int /*<<< orphan*/ queue_lock_push(struct queue *);
int /*<<< orphan*/ queue_unlock_push(struct queue *);
bool queue_is_full(struct queue *q) {
  bool ret;
  queue_lock_push(q);
  ret = queue_is_full_locked(q);
  queue_unlock_push(q);
  return ret;
}


x86 assembly (clang, -O0):
<queue_is_full>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <queue_lock_push@plt>
mov    -0x8(%rbp),%rdi
call   1050 <queue_is_full_locked@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <queue_unlock_push@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<queue_is_full>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <queue_lock_push@plt>
mov    %rbx,%rdi
call   1050 <queue_is_full_locked@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <queue_unlock_push@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.queue = type { i32 }
define i32 @queue_is_full(%struct.queue* %0) {
%2 = alloca %struct.queue*
%3 = alloca i32
store %struct.queue* %0, %struct.queue** %2
%4 = load %struct.queue*, %struct.queue** %2
%5 = call i32 @queue_lock_push(%struct.queue* %4)
%6 = load %struct.queue*, %struct.queue** %2
%7 = call i32 @queue_is_full_locked(%struct.queue* %6)
store i32 %7, i32* %3
%8 = load %struct.queue*, %struct.queue** %2
%9 = call i32 @queue_unlock_push(%struct.queue* %8)
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
%struct.queue = type { i32 }
define i32 @queue_is_full(%struct.queue* %0) {
%2 = tail call i32 @queue_lock_push(%struct.queue* %0)
%3 = tail call i32 @queue_is_full_locked(%struct.queue* %0)
%4 = tail call i32 @queue_unlock_push(%struct.queue* %0)
ret i32 %3
}
void BN_MONT_CTX_new(void) {}


x86 assembly (clang, -O0):
<BN_MONT_CTX_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_MONT_CTX_new>:
ret

LLVM IR (-O0):
define void @BN_MONT_CTX_new() {
ret void
}

LLVM IR (-O2):
define void @BN_MONT_CTX_new() {
ret void
}
const char *__malidrv_build_info(void) {
  return "malidrv:  CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=10 REPO_URL= "
         "REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Tue May  7 "
         "18:53:02 IST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 "
         "USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 "
         "USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 "
         "USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=0";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [436 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=10 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Tue May 7 18:53:02 IST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=0\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([436 x i8], [436 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [436 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=10 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Tue May 7 18:53:02 IST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=0\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([436 x i8], [436 x i8]* @.str, i64 0, i64 0)
}
unsigned long strTolong(const char *str) {
  unsigned long ret = 0;
  unsigned int i;
  for (i = 0; i < 4; i++) {
    ret += (str[i] - 'a');
    if (i != 3)
      ret *= 100;
  }
  return ret;
}


x86 assembly (clang, -O0):
<strTolong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jae    115f <strTolong+0x5f>
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
sub    $0x61,%eax
cltq
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpl   $0x3,-0x14(%rbp)
je     114c <strTolong+0x4c>
imul   $0x64,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1151 <strTolong+0x51>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <strTolong+0x17>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strTolong>:
movsbq (%rdi),%rax
imul   $0x64,%rax,%rax
movsbq 0x1(%rdi),%rcx
add    %rax,%rcx
imul   $0x64,%rcx,%rax
movsbq 0x2(%rdi),%rcx
add    %rax,%rcx
imul   $0x64,%rcx,%rax
movsbq 0x3(%rdi),%rcx
add    %rcx,%rax
add    $0xfffffffffa28f26b,%rax
ret

LLVM IR (-O0):
define i64 @strTolong(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 0, i64* %3
store i32 0, i32* %4
br label %5
5: ; preds = %25, %1
%6 = load i32, i32* %4
%7 = icmp ult i32 %6, 4
br i1 %7, label %8, label %28
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = load i32, i32* %4
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 97
%16 = sext i32 %15 to i64
%17 = load i64, i64* %3
%18 = add i64 %17, %16
store i64 %18, i64* %3
%19 = load i32, i32* %4
%20 = icmp ne i32 %19, 3
br i1 %20, label %21, label %24
21: ; preds = %8
%22 = load i64, i64* %3
%23 = mul i64 %22, 100
store i64 %23, i64* %3
br label %24
24: ; preds = %21, %8
br label %25
25: ; preds = %24
%26 = load i32, i32* %4
%27 = add i32 %26, 1
store i32 %27, i32* %4
br label %5
28: ; preds = %5
%29 = load i64, i64* %3
ret i64 %29
}

LLVM IR (-O2):
define i64 @strTolong(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i64
%4 = mul nsw i64 %3, 100
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = sext i8 %6 to i64
%8 = add nsw i64 %4, -9797
%9 = add nsw i64 %8, %7
%10 = mul nsw i64 %9, 100
%11 = getelementptr inbounds i8, i8* %0, i64 2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i64
%14 = add nsw i64 %10, -97
%15 = add nsw i64 %14, %13
%16 = mul nsw i64 %15, 100
%17 = getelementptr inbounds i8, i8* %0, i64 3
%18 = load i8, i8* %17
%19 = sext i8 %18 to i64
%20 = add nsw i64 %16, -97
%21 = add nsw i64 %20, %19
ret i64 %21
}
/* Variables and functions */
char **malloc(int);
char *readLine();
char **helpReadLines(int soFar) {
  char *str;
  char **rtnVal;
  str = readLine();
  if (str == NULL) {
    rtnVal = malloc(soFar + 1);
  } else {
    rtnVal = helpReadLines(soFar + 1);
  }
  rtnVal[soFar] = str;
  return rtnVal;
}


x86 assembly (clang, -O0):
<helpReadLines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <readLine@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1165 <helpReadLines+0x35>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
jmp    1174 <helpReadLines+0x44>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <helpReadLines@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
movslq -0x4(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helpReadLines>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
xor    %eax,%eax
call   1040 <readLine@plt>
mov    %rax,%rbx
lea    0x1(%r14),%edi
test   %rax,%rax
je     1151 <helpReadLines+0x21>
call   1030 <helpReadLines@plt>
jmp    1156 <helpReadLines+0x26>
call   1050 <malloc@plt>
movslq %r14d,%rcx
mov    %rbx,(%rax,%rcx,8)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8** @helpReadLines(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8**
store i32 %0, i32* %2
%5 = call i8* (...) @readLine()
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
%11 = call i8** @malloc(i32 %10)
store i8** %11, i8*** %4
br label %16
12: ; preds = %1
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
%15 = call i8** @helpReadLines(i32 %14)
store i8** %15, i8*** %4
br label %16
16: ; preds = %12, %8
%17 = load i8*, i8** %3
%18 = load i8**, i8*** %4
%19 = load i32, i32* %2
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8*, i8** %18, i64 %20
store i8* %17, i8** %21
%22 = load i8**, i8*** %4
ret i8** %22
}

LLVM IR (-O2):
define noalias i8** @helpReadLines(i32 %0) {
%2 = tail call i8* (...) @readLine()
%3 = icmp eq i8* %2, null
%4 = add nsw i32 %0, 1
br i1 %3, label %5, label %7
5: ; preds = %1
%6 = tail call i8** @malloc(i32 %4)
br label %9
7: ; preds = %1
%8 = tail call i8** @helpReadLines(i32 %4)
br label %9
9: ; preds = %7, %5
%10 = phi i8** [ %6, %5 ], [ %8, %7 ]
%11 = sext i32 %0 to i64
%12 = getelementptr inbounds i8*, i8** %10, i64 %11
store i8* %2, i8** %12
ret i8** %10
}
/* Variables and functions */
int /*<<< orphan*/ sem_init(int *, int /*<<< orphan*/, int);
void sem_mutex_init(int *semid, int value) { sem_init(semid, 0, value); }


x86 assembly (clang, -O0):
<sem_mutex_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <sem_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_mutex_init>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <sem_init@plt>

LLVM IR (-O0):
define void @sem_mutex_init(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @sem_init(i32* %5, i32 0, i32 %6)
ret void
}

LLVM IR (-O2):
define void @sem_mutex_init(i32* %0, i32 %1) {
%3 = tail call i32 @sem_init(i32* %0, i32 0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int write(int, char *, int /*<<< orphan*/);
int serverWrite(int fd, char *message) {
  assert(message != NULL);
  return write(fd, message, strlen(message));
}


x86 assembly (clang, -O0):
<serverWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serverWrite>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %edi,%edi
test   %rsi,%rsi
setne  %dil
call   1050 <assert@plt>
mov    %rbx,%rdi
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @serverWrite(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %3
%10 = load i8*, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @strlen(i8* %11)
%13 = call i32 @write(i32 %9, i8* %10, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @serverWrite(i32 %0, i8* %1) {
%3 = icmp ne i8* %1, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @strlen(i8* %1)
%7 = tail call i32 @write(i32 %0, i8* %1, i32 %6)
ret i32 %7
}
/* Variables and functions */
intptr_t zig_subw_isize(intptr_t lhs, intptr_t rhs, intptr_t min,
                        intptr_t max) {
  return (intptr_t)(((uintptr_t)lhs) - ((uintptr_t)rhs));
}


x86 assembly (clang, -O0):
<zig_subw_isize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zig_subw_isize>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @zig_subw_isize(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = sub i64 %9, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @zig_subw_isize(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = sub i64 %0, %1
ret i64 %5
}