xunge/DecIR huggingface dataset:
unsigned clock_to_usecs(unsigned x) {
  extern unsigned int processor_id;
  if (processor_id & 0x00000030)
    return ((x) / 266);
  else if (processor_id & 0x00000010)
    return ((x) / 400);
  else
    return ((x) / 533);
}


x86 assembly (clang, -O0):
<clock_to_usecs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%eax
and    $0x30,%eax
cmp    $0x0,%eax
je     1130 <clock_to_usecs+0x30>
mov    -0x8(%rbp),%eax
mov    $0x10a,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
jmp    1168 <clock_to_usecs+0x68>
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     1159 <clock_to_usecs+0x59>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
jmp    1168 <clock_to_usecs+0x68>
mov    -0x8(%rbp),%eax
mov    $0x215,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_to_usecs>:
mov    %edi,%eax
mov    0x2ed7(%rip),%rcx
mov    (%rcx),%ecx
test   $0x10,%cl
mov    $0x215,%edx
mov    $0x190,%esi
cmove  %edx,%esi
test   $0x30,%cl
mov    $0x10a,%ecx
cmove  %esi,%ecx
xor    %edx,%edx
div    %ecx
ret

LLVM IR (-O0):
@processor_id = external global i32
define i32 @clock_to_usecs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* @processor_id
%5 = and i32 %4, 48
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = udiv i32 %8, 266
store i32 %9, i32* %2
br label %20
10: ; preds = %1
%11 = load i32, i32* @processor_id
%12 = and i32 %11, 16
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i32, i32* %3
%16 = udiv i32 %15, 400
store i32 %16, i32* %2
br label %20
17: ; preds = %10
%18 = load i32, i32* %3
%19 = udiv i32 %18, 533
store i32 %19, i32* %2
br label %20
20: ; preds = %17, %14, %7
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
@processor_id = external global i32
define i32 @clock_to_usecs(i32 %0) {
%2 = load i32, i32* @processor_id
%3 = and i32 %2, 48
%4 = icmp eq i32 %3, 0
%5 = and i32 %2, 16
%6 = icmp eq i32 %5, 0
%7 = select i1 %6, i32 533, i32 400
%8 = select i1 %4, i32 %7, i32 266
%9 = udiv i32 %0, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void end(void) { printf("\nIn end ()\n"); }


x86 assembly (clang, -O0):
<end>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<end>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"\0AIn end ()\0A\00"
define void @end() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"\0AIn end ()\00"
define void @end() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
void YUY2ToYRow_Any_SSE2() {}


x86 assembly (clang, -O0):
<YUY2ToYRow_Any_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<YUY2ToYRow_Any_SSE2>:
ret

LLVM IR (-O0):
define void @YUY2ToYRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @YUY2ToYRow_Any_SSE2() {
ret void
}
int min(int x, int y) {
  if (x <= y)
    return x;
  else
    return y;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ dgesv_(int *, int *, double *, int *, int *, double *, int *,
                          int *);
void clapack_dgesv(int n, int nrhs, double *a, int lda, int *ipiv, double *b,
                   int ldb, int *info) {
  dgesv_(&n, &nrhs, a, &lda, ipiv, b, &ldb, info);
}


x86 assembly (clang, -O0):
<clapack_dgesv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    0x18(%rbp),%rax
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0x14(%rbp),%rcx
lea    0x10(%rbp),%r10
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <dgesv_@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clapack_dgesv>:
sub    $0x18,%rsp
mov    0x28(%rsp),%r10
mov    %edi,0x14(%rsp)
mov    %esi,0x10(%rsp)
mov    %ecx,0xc(%rsp)
lea    0x20(%rsp),%rax
lea    0x14(%rsp),%rdi
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rcx
push   %r10
push   %rax
call   1030 <dgesv_@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @clapack_dgesv(i32 %0, i32 %1, double* %2, i32 %3, i32* %4, double* %5, i32 %6, i32* %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca double*
%12 = alloca i32
%13 = alloca i32*
%14 = alloca double*
%15 = alloca i32
%16 = alloca i32*
store i32 %0, i32* %9
store i32 %1, i32* %10
store double* %2, double** %11
store i32 %3, i32* %12
store i32* %4, i32** %13
store double* %5, double** %14
store i32 %6, i32* %15
store i32* %7, i32** %16
%17 = load double*, double** %11
%18 = load i32*, i32** %13
%19 = load double*, double** %14
%20 = load i32*, i32** %16
%21 = call i32 @dgesv_(i32* %9, i32* %10, double* %17, i32* %12, i32* %18, double* %19, i32* %15, i32* %20)
ret void
}

LLVM IR (-O2):
define void @clapack_dgesv(i32 %0, i32 %1, double* %2, i32 %3, i32* %4, double* %5, i32 %6, i32* %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %9
store i32 %1, i32* %10
store i32 %3, i32* %11
store i32 %6, i32* %12
%13 = call i32 @dgesv_(i32* %9, i32* %10, double* %2, i32* %11, i32* %4, double* %5, i32* %12, i32* %7)
ret void
}
int autok_is_vol_done(unsigned int voltage, int id) { return 2; }


x86 assembly (clang, -O0):
<autok_is_vol_done>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<autok_is_vol_done>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @autok_is_vol_done(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 2
}

LLVM IR (-O2):
define i32 @autok_is_vol_done(i32 %0, i32 %1) {
ret i32 2
}
int compose_request(char buf[(8 * 1024)]) { return 1; }


x86 assembly (clang, -O0):
<compose_request>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compose_request>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @compose_request(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @compose_request(i8* nocapture readnone %0) {
ret i32 1
}
int main() {
  int x = 13;
  printf("x = %d\n", x);
  int *x_pointer = &x;
  printf("x_pointer in memory = %d\n", x_pointer);
  printf("x_pointer real value = %d\n", *x_pointer);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xd,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0xd,0x4(%rsp)
lea    0xee0(%rip),%rdi
mov    $0xd,%esi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x4(%rsp),%esi
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"x = %d\0A\00"
@.str.1 = [26 x i8] c"x_pointer in memory = %d\0A\00"
@.str.2 = [27 x i8] c"x_pointer real value = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 13, i32* %1
%3 = load i32, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
store i32* %1, i32** %2
%5 = load i32*, i32** %2
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i32* %5)
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"x = %d\0A\00"
@.str.1 = [26 x i8] c"x_pointer in memory = %d\0A\00"
@.str.2 = [27 x i8] c"x_pointer real value = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 13, i32* %1
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 13)
%4 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
char *plugin_info(void) { return "PicTrack V1.0"; }


x86 assembly (clang, -O0):
<plugin_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [14 x i8] c"PicTrack V1.0\00"
define i8* @plugin_info() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [14 x i8] c"PicTrack V1.0\00"
define i8* @plugin_info() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  unsigned int x = 0b11010;
  int count = 0;
  while (x != 0) {
    x = x & (x - 1);
    count++;
  }
  printf("count: %d\n", count);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1a,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1153 <main+0x43>
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
mov    -0xc(%rbp),%esi
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"count: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 26, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = sub i32 %9, 1
%11 = and i32 %8, %10
store i32 %11, i32* %2
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
%16 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"count: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 3)
ret i32 0
}
int guiInitRGB() { return -1; }


x86 assembly (clang, -O0):
<guiInitRGB>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<guiInitRGB>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @guiInitRGB() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @guiInitRGB() {
ret i32 -1
}
int produceReturnValueTwo(a)
int a;
{ return a; }


x86 assembly (clang, -O0):
<produceReturnValueTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<produceReturnValueTwo>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @produceReturnValueTwo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @produceReturnValueTwo(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
struct ptp_clock_caps {
  int pps;
};
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
scalar_t__ phc_get_caps(int /*<<< orphan*/, struct ptp_clock_caps *);
int phc_has_pps(clockid_t clkid) {
  struct ptp_clock_caps caps;
  if (phc_get_caps(clkid, &caps))
    return 0;
  return caps.pps;
}


x86 assembly (clang, -O0):
<phc_has_pps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1030 <phc_get_caps@plt>
cmp    $0x0,%rax
je     113d <phc_has_pps+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1143 <phc_has_pps+0x33>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phc_has_pps>:
push   %rax
mov    %rsp,%rsi
call   1030 <phc_get_caps@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
jne    1126 <phc_has_pps+0x16>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.ptp_clock_caps = type { i32 }
define i32 @phc_has_pps(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.ptp_clock_caps
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i64 @phc_get_caps(i32 %5, %struct.ptp_clock_caps* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %12
9: ; preds = %1
%10 = getelementptr inbounds %struct.ptp_clock_caps, %struct.ptp_clock_caps* %4, i32 0, i32 0
%11 = load i32, i32* %10
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.ptp_clock_caps = type { i32 }
define i32 @phc_has_pps(i32 %0) {
%2 = alloca %struct.ptp_clock_caps
%3 = bitcast %struct.ptp_clock_caps* %2 to i8*
%4 = call i64 @phc_get_caps(i32 %0, %struct.ptp_clock_caps* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.ptp_clock_caps, %struct.ptp_clock_caps* %2, i64 0, i32 0
%7 = load i32, i32* %6
%8 = select i1 %5, i32 %7, i32 0
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void rtp_set_ssrc(uint8_t *p_rtp, const uint8_t pi_ssrc[4]) {
  p_rtp[8] = pi_ssrc[0];
  p_rtp[9] = pi_ssrc[1];
  p_rtp[10] = pi_ssrc[2];
  p_rtp[11] = pi_ssrc[3];
}


x86 assembly (clang, -O0):
<rtp_set_ssrc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x20(%rax)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x24(%rax)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x28(%rax)
mov    -0x10(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x2c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtp_set_ssrc>:
mov    (%rsi),%eax
mov    %eax,0x20(%rdi)
mov    0x4(%rsi),%eax
mov    %eax,0x24(%rdi)
mov    0x8(%rsi),%eax
mov    %eax,0x28(%rdi)
mov    0xc(%rsi),%eax
mov    %eax,0x2c(%rdi)
ret

LLVM IR (-O0):
define void @rtp_set_ssrc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 8
store i32 %7, i32* %9
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 9
store i32 %12, i32* %14
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 2
%17 = load i32, i32* %16
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 10
store i32 %17, i32* %19
%20 = load i32*, i32** %4
%21 = getelementptr inbounds i32, i32* %20, i64 3
%22 = load i32, i32* %21
%23 = load i32*, i32** %3
%24 = getelementptr inbounds i32, i32* %23, i64 11
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @rtp_set_ssrc(i32* nocapture writeonly %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = getelementptr inbounds i32, i32* %0, i64 8
store i32 %3, i32* %4
%5 = getelementptr inbounds i32, i32* %1, i64 1
%6 = load i32, i32* %5
%7 = getelementptr inbounds i32, i32* %0, i64 9
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %1, i64 2
%9 = load i32, i32* %8
%10 = getelementptr inbounds i32, i32* %0, i64 10
store i32 %9, i32* %10
%11 = getelementptr inbounds i32, i32* %1, i64 3
%12 = load i32, i32* %11
%13 = getelementptr inbounds i32, i32* %0, i64 11
store i32 %12, i32* %13
ret void
}
void ff_hevc_put_hevc_bi_qpel_h8_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_h8_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_h8_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_h8_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_h8_8_sse4() {
ret void
}
void __except_dont_do_shit(void *arg) { (void)arg; }


x86 assembly (clang, -O0):
<__except_dont_do_shit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__except_dont_do_shit>:
ret

LLVM IR (-O0):
define void @__except_dont_do_shit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @__except_dont_do_shit(i8* nocapture %0) {
ret void
}
/* Variables and functions */
double fabs(double);
int CHECK_EXPECTED_DOUBLE(double val, double expected) {
  double diff = val - expected;
  diff = fabs(diff);
  return diff > 0.0000001;
}


x86 assembly (clang, -O0):
<CHECK_EXPECTED_DOUBLE>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movaps 0xee7(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xec1(%rip),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CHECK_EXPECTED_DOUBLE>:
subsd  %xmm1,%xmm0
andpd  0xef4(%rip),%xmm0
xor    %eax,%eax
ucomisd 0xefa(%rip),%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @CHECK_EXPECTED_DOUBLE(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fsub double %6, %7
store double %8, double* %5
%9 = load double, double* %5
%10 = call double @llvm.fabs.f64(double %9)
store double %10, double* %5
%11 = load double, double* %5
%12 = fcmp ogt double %11, 0x3E7AD7F29ABCAF48
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @CHECK_EXPECTED_DOUBLE(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call double @llvm.fabs.f64(double %3)
%5 = fcmp ogt double %4, 0x3E7AD7F29ABCAF48
%6 = zext i1 %5 to i32
ret i32 %6
}
int xa1() {}


x86 assembly (clang, -O0):
<xa1>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xa1>:
ret

LLVM IR (-O0):
define i32 @xa1() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @xa1() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ complex_test();
int /*<<< orphan*/ simple_test();
int main() {
  simple_test();
  complex_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <simple_test@plt>
mov    $0x0,%al
call   1040 <complex_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <simple_test@plt>
xor    %eax,%eax
call   1040 <complex_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @simple_test()
%3 = call i32 (...) @complex_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @simple_test()
%2 = tail call i32 (...) @complex_test()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ OQS_MEM_secure_free(void *, int);
void OQS_AES256_free_schedule(void *schedule) {
  if (schedule != NULL) {
    OQS_MEM_secure_free(schedule, 16 * 15);
  }
}


x86 assembly (clang, -O0):
<OQS_AES256_free_schedule>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1135 <OQS_AES256_free_schedule+0x25>
mov    -0x8(%rbp),%rdi
mov    $0xf0,%esi
call   1030 <OQS_MEM_secure_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OQS_AES256_free_schedule>:
test   %rdi,%rdi
je     111f <OQS_AES256_free_schedule+0xf>
mov    $0xf0,%esi
jmp    1030 <OQS_MEM_secure_free@plt>
ret

LLVM IR (-O0):
define void @OQS_AES256_free_schedule(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @OQS_MEM_secure_free(i8* %6, i32 240)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @OQS_AES256_free_schedule(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @OQS_MEM_secure_free(i8* %0, i32 240)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_seconds();
void init_timer() { (void)get_seconds(); }


x86 assembly (clang, -O0):
<init_timer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_seconds@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_timer>:
xor    %eax,%eax
jmp    1030 <get_seconds@plt>

LLVM IR (-O0):
define void @init_timer() {
%1 = call i32 (...) @get_seconds()
ret void
}

LLVM IR (-O2):
define void @init_timer() {
%1 = tail call i32 (...) @get_seconds()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  printf("%s\n", "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                 "outputs/2022-01-22/02-19-57/repos/myd7349/Ongoing-Study/refs/"
                 "heads/master/c/sizeof/sizeof.c");
  printf("%zu\n", sizeof("/scratch/repos/new/home/jordi_armengol_estape/"
                         "c-scraper/outputs/2022-01-22/02-19-57/repos/myd7349/"
                         "Ongoing-Study/refs/heads/master/c/sizeof/sizeof.c"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf5d(%rip),%rdi
mov    $0x94,%esi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf60(%rip),%rdi
mov    $0x94,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/myd7349/Ongoing-Study/refs/heads/master/c/sizeof/sizeof.c\00"
@.str.2 = [5 x i8] c"%zu\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i64 148)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/myd7349/Ongoing-Study/refs/heads/master/c/sizeof/sizeof.c\00"
@.str.2 = [5 x i8] c"%zu\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([148 x i8], [148 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i64 148)
ret i32 0
}
int fun358() { return 358; }


x86 assembly (clang, -O0):
<fun358>:
push   %rbp
mov    %rsp,%rbp
mov    $0x166,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun358>:
mov    $0x166,%eax
ret

LLVM IR (-O0):
define i32 @fun358() {
ret i32 358
}

LLVM IR (-O2):
define i32 @fun358() {
ret i32 358
}
/* Type definitions */
struct uevent {
  int dummy;
};
struct trace {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ trace_read(struct trace *);
int on_signal(struct uevent *uevent, int sfd, int mask, void *userdata) {
  struct trace *trace = userdata;
  trace_read(trace);
  return 0;
}


x86 assembly (clang, -O0):
<on_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <trace_read@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_signal>:
push   %rax
mov    %rcx,%rdi
call   1030 <trace_read@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.uevent = type { i32 }
%struct.trace = type { i32 }
define i32 @on_signal(%struct.uevent* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.uevent*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca %struct.trace*
store %struct.uevent* %0, %struct.uevent** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load i8*, i8** %8
%11 = bitcast i8* %10 to %struct.trace*
store %struct.trace* %11, %struct.trace** %9
%12 = load %struct.trace*, %struct.trace** %9
%13 = call i32 @trace_read(%struct.trace* %12)
ret i32 0
}

LLVM IR (-O2):
%struct.uevent = type { i32 }
%struct.trace = type { i32 }
define i32 @on_signal(%struct.uevent* nocapture readnone %0, i32 %1, i32 %2, i8* %3) {
%5 = bitcast i8* %3 to %struct.trace*
%6 = tail call i32 @trace_read(%struct.trace* %5)
ret i32 0
}
void foo_2_2_2_1_1_1_2_2_1() {}


x86 assembly (clang, -O0):
<foo_2_2_2_1_1_1_2_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_2_1_1_1_2_2_1>:
ret

LLVM IR (-O0):
define void @foo_2_2_2_1_1_1_2_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_2_1_1_1_2_2_1() {
ret void
}
int ilog(unsigned int v) {
  int ret = 0;
  if (v)
    --v;
  while (v) {
    ret++;
    v >>= 1;
  }
  return (ret);
}


x86 assembly (clang, -O0):
<ilog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1121 <ilog+0x21>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1126 <ilog+0x26>
cmpl   $0x0,-0x4(%rbp)
je     1147 <ilog+0x47>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1126 <ilog+0x26>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilog>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <ilog+0x1c>
add    $0xffffffff,%edi
xor    %eax,%eax
mov    %edi,%ecx
xchg   %ax,%ax
add    $0x1,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <ilog+0x10>
ret

LLVM IR (-O0):
define i32 @ilog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = add i32 %7, -1
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %1
br label %10
10: ; preds = %13, %9
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %10
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
%16 = load i32, i32* %2
%17 = lshr i32 %16, 1
store i32 %17, i32* %2
br label %10
18: ; preds = %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @ilog(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = add i32 %0, -1
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %8, %5 ], [ 0, %3 ]
%7 = phi i32 [ %9, %5 ], [ %4, %3 ]
%8 = add nuw nsw i32 %6, 1
%9 = lshr i32 %7, 1
%10 = icmp ult i32 %7, 2
br i1 %10, label %11, label %5
11: ; preds = %5, %1
%12 = phi i32 [ 0, %1 ], [ %8, %5 ]
ret i32 %12
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ __syscall(int, char const *, struct stat *, int /*<<< orphan*/,
                     int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/,
                     int /*<<< orphan*/, int /*<<< orphan*/);
int stat(const char *path, struct stat *buf) {
  return (int)__syscall(6, (path), (buf), (0), (0), (0), (0), (0), (0));
}


x86 assembly (clang, -O0):
<stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x6,%edi
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
movl   $0x0,0x10(%rsp)
call   1030 <__syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stat>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
sub    $0x8,%rsp
mov    $0x6,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
push   $0x0
push   $0x0
push   $0x0
call   1030 <__syscall@plt>
add    $0x20,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @stat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i64 @__syscall(i32 6, i8* %5, %struct.stat* %6, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @stat(i8* %0, %struct.stat* %1) {
%3 = tail call i64 @__syscall(i32 6, i8* %0, %struct.stat* %1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int do_append_test(char const *);
int do_ftell_test(char const *);
int do_rewind_test(char const *);
int do_write_test(char const *);
int do_one_test(const char *filename) {
  int ret = 0;
  ret |= do_ftell_test(filename);
  ret |= do_write_test(filename);
  ret |= do_append_test(filename);
  ret |= do_rewind_test(filename);
  return ret;
}


x86 assembly (clang, -O0):
<do_one_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <do_ftell_test@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <do_write_test@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <do_append_test@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <do_rewind_test@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_one_test>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
call   1050 <do_ftell_test@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1060 <do_write_test@plt>
mov    %eax,%ebp
or     %r14d,%ebp
mov    %rbx,%rdi
call   1040 <do_append_test@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1030 <do_rewind_test@plt>
or     %r14d,%eax
or     %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @do_one_test(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = call i32 @do_ftell_test(i8* %4)
%6 = load i32, i32* %3
%7 = or i32 %6, %5
store i32 %7, i32* %3
%8 = load i8*, i8** %2
%9 = call i32 @do_write_test(i8* %8)
%10 = load i32, i32* %3
%11 = or i32 %10, %9
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = call i32 @do_append_test(i8* %12)
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i8*, i8** %2
%17 = call i32 @do_rewind_test(i8* %16)
%18 = load i32, i32* %3
%19 = or i32 %18, %17
store i32 %19, i32* %3
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @do_one_test(i8* %0) {
%2 = tail call i32 @do_ftell_test(i8* %0)
%3 = tail call i32 @do_write_test(i8* %0)
%4 = or i32 %3, %2
%5 = tail call i32 @do_append_test(i8* %0)
%6 = or i32 %4, %5
%7 = tail call i32 @do_rewind_test(i8* %0)
%8 = or i32 %6, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello from main.c");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"hello from main.c\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"hello from main.c\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void wait() { db(0x9B); }


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9b,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
mov    $0x9b,%edi
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @wait() {
%1 = call i32 @db(i32 155)
ret void
}

LLVM IR (-O2):
define void @wait() {
%1 = tail call i32 @db(i32 155)
ret void
}
/* Variables and functions */
size_t read(int, char *, size_t);
void read_arduino(int fd, char *arduino_output, size_t *length,
                  size_t max_length) {
  *length = read(fd, arduino_output, max_length);
}


x86 assembly (clang, -O0):
<read_arduino>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <read@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_arduino>:
push   %rbx
mov    %rdx,%rbx
mov    %rcx,%rdx
call   1030 <read@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @read_arduino(i32 %0, i8* %1, i64* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64*
%8 = alloca i64
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64* %2, i64** %7
store i64 %3, i64* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %8
%12 = call i64 @read(i32 %9, i8* %10, i64 %11)
%13 = load i64*, i64** %7
store i64 %12, i64* %13
ret void
}

LLVM IR (-O2):
define void @read_arduino(i32 %0, i8* nocapture %1, i64* nocapture writeonly %2, i64 %3) {
%5 = tail call i64 @read(i32 %0, i8* %1, i64 %3)
store i64 %5, i64* %2
ret void
}
/* Variables and functions */
unsigned int CHAR_BIT;
__attribute__((always_)) size_t getBytesForBits(unsigned int size) {
  return (size / CHAR_BIT + !!(size % CHAR_BIT));
}


x86 assembly (clang, -O0):
<getBytesForBits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ecf(%rip),%rcx
xor    %edx,%edx
divl   (%rcx)
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ebe(%rip),%rcx
xor    %edx,%edx
divl   (%rcx)
mov    -0x8(%rbp),%eax
cmp    $0x0,%edx
setne  %cl
xor    $0xff,%cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
mov    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBytesForBits>:
mov    %edi,%eax
mov    0x2ed7(%rip),%rcx
xor    %edx,%edx
divl   (%rcx)
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define i64 @getBytesForBits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @CHAR_BIT
%5 = udiv i32 %3, %4
%6 = load i32, i32* %2
%7 = load i32, i32* @CHAR_BIT
%8 = urem i32 %6, %7
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
%13 = add i32 %5, %12
%14 = zext i32 %13 to i64
ret i64 %14
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define i64 @getBytesForBits(i32 %0) {
%2 = load i32, i32* @CHAR_BIT
%3 = udiv i32 %0, %2
%4 = urem i32 %0, %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
%7 = add i32 %3, %6
%8 = zext i32 %7 to i64
ret i64 %8
}
int msm8996_cpuss_pm_init(unsigned int cpu) { return 0; }


x86 assembly (clang, -O0):
<msm8996_cpuss_pm_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm8996_cpuss_pm_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @msm8996_cpuss_pm_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @msm8996_cpuss_pm_init(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xa1() {
  Assert_real((isprint(161) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              810, ("isprint should be 0 for 0xa1"));
}


x86 assembly (clang, -O0):
<t_isprint_0xa1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa1,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x32a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xa1>:
push   %rax
mov    $0xa1,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x32a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xa1\00"
define void @t_isprint_0xa1() {
%1 = call i64 @isprint(i32 161)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 810, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xa1\00"
define void @t_isprint_0xa1() {
%1 = tail call i64 @isprint(i32 161)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 810, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ uint;

/* Variables and functions */
uint _h2_uintmin3(uint x, uint y, uint z) {
  return (x < y ? (z < x ? z : x) : (z < y ? z : y));
}


x86 assembly (clang, -O0):
<_h2_uintmin3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    114e <_h2_uintmin3+0x4e>
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    1139 <_h2_uintmin3+0x39>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1141 <_h2_uintmin3+0x41>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    1179 <_h2_uintmin3+0x79>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1169 <_h2_uintmin3+0x69>
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
jmp    1171 <_h2_uintmin3+0x71>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_h2_uintmin3>:
mov    %rdi,%rax
cmp    %rdi,%rdx
cmovl  %rdx,%rax
cmp    %rsi,%rax
cmovge %rsi,%rax
ret

LLVM IR (-O0):
define i64 @_h2_uintmin3(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load i64, i64* %6
%12 = load i64, i64* %4
%13 = icmp slt i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i64, i64* %6
br label %18
16: ; preds = %10
%17 = load i64, i64* %4
br label %18
18: ; preds = %16, %14
%19 = phi i64 [ %15, %14 ], [ %17, %16 ]
br label %30
20: ; preds = %3
%21 = load i64, i64* %6
%22 = load i64, i64* %5
%23 = icmp slt i64 %21, %22
br i1 %23, label %24, label %26
24: ; preds = %20
%25 = load i64, i64* %6
br label %28
26: ; preds = %20
%27 = load i64, i64* %5
br label %28
28: ; preds = %26, %24
%29 = phi i64 [ %25, %24 ], [ %27, %26 ]
br label %30
30: ; preds = %28, %18
%31 = phi i64 [ %19, %18 ], [ %29, %28 ]
ret i64 %31
}

LLVM IR (-O2):
define i64 @_h2_uintmin3(i64 %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %2, %0
%5 = select i1 %4, i64 %2, i64 %0
%6 = icmp slt i64 %5, %1
%7 = select i1 %6, i64 %5, i64 %1
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ move();
ptlead() { move(); }


x86 assembly (clang, -O0):
<ptlead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <move@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptlead>:
xor    %eax,%eax
jmp    1030 <move@plt>

LLVM IR (-O0):
define i32 @ptlead() {
%1 = alloca i32
%2 = call i32 (...) @move()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @ptlead() {
%1 = tail call i32 (...) @move()
ret i32 undef
}
char conv(char c) {
  if (c >= 'a' && c < 'z')
    c -= 32;
  else if (c >= 'A' && c < 'Z')
    c += 32;
  return c;
}


x86 assembly (clang, -O0):
<conv>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1133 <conv+0x33>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jge    1133 <conv+0x33>
movsbl -0x1(%rbp),%eax
sub    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    115c <conv+0x5c>
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1157 <conv+0x57>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jge    1157 <conv+0x57>
movsbl -0x1(%rbp),%eax
add    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    115c <conv+0x5c>
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv>:
mov    %edi,%eax
lea    -0x61(%rax),%ecx
cmp    $0x18,%cl
ja     110d <conv+0xd>
add    $0xe0,%al
ret
lea    -0x41(%rax),%ecx
lea    0x20(%rax),%edx
cmp    $0x19,%cl
movzbl %al,%ecx
movzbl %dl,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @conv(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp slt i32 %8, 122
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 32
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %29
15: ; preds = %6, %1
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
%18 = icmp sge i32 %17, 65
br i1 %18, label %19, label %28
19: ; preds = %15
%20 = load i8, i8* %2
%21 = sext i8 %20 to i32
%22 = icmp slt i32 %21, 90
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %2
%25 = sext i8 %24 to i32
%26 = add nsw i32 %25, 32
%27 = trunc i32 %26 to i8
store i8 %27, i8* %2
br label %28
28: ; preds = %23, %19, %15
br label %29
29: ; preds = %28, %10
%30 = load i8, i8* %2
ret i8 %30
}

LLVM IR (-O2):
define signext i8 @conv(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 25
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nsw i8 %0, -32
br label %11
6: ; preds = %1
%7 = add i8 %0, -65
%8 = icmp ult i8 %7, 25
%9 = add i8 %0, 32
%10 = select i1 %8, i8 %9, i8 %0
br label %11
11: ; preds = %6, %4
%12 = phi i8 [ %5, %4 ], [ %10, %6 ]
ret i8 %12
}
int(ars_d_set_tcpopt_sackperm)(struct ars_packet *pkt, int layer, char *f,
                               char *v) {
  return 0;
}


x86 assembly (clang, -O0):
<ars_d_set_tcpopt_sackperm>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ars_d_set_tcpopt_sackperm>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ars_packet = type opaque
define i32 @ars_d_set_tcpopt_sackperm(%struct.ars_packet* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca %struct.ars_packet*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store %struct.ars_packet* %0, %struct.ars_packet** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret i32 0
}

LLVM IR (-O2):
%struct.ars_packet = type opaque
define i32 @ars_d_set_tcpopt_sackperm(%struct.ars_packet* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void update_chisq(uint64_t symbol) {}


x86 assembly (clang, -O0):
<update_chisq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_chisq>:
ret

LLVM IR (-O0):
define void @update_chisq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @update_chisq(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
scalar_t__ pthread_create(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          void *(*)(void *), void *);
int /*<<< orphan*/ unix_error(char *);
void my_pthread_create(pthread_t *thread, const pthread_attr_t *attr,
                       void *(*start_routine)(void *), void *arg,
                       char *errormsg) {
  if (pthread_create(thread, attr, start_routine, arg) != 0) {
    unix_error(errormsg);
  }
}


x86 assembly (clang, -O0):
<my_pthread_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <pthread_create@plt>
cmp    $0x0,%rax
je     1164 <my_pthread_create+0x44>
mov    -0x28(%rbp),%rdi
call   1030 <unix_error@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_create>:
push   %rbx
mov    %r8,%rbx
call   1040 <pthread_create@plt>
test   %rax,%rax
je     1137 <my_pthread_create+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <unix_error@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @my_pthread_create(i32* %0, i32* %1, i8* (i8*)* %2, i8* %3, i8* %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i8* (i8*)*
%9 = alloca i8*
%10 = alloca i8*
store i32* %0, i32** %6
store i32* %1, i32** %7
store i8* (i8*)* %2, i8* (i8*)** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i32*, i32** %6
%12 = load i32*, i32** %7
%13 = load i8* (i8*)*, i8* (i8*)** %8
%14 = load i8*, i8** %9
%15 = call i64 @pthread_create(i32* %11, i32* %12, i8* (i8*)* %13, i8* %14)
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %5
%18 = load i8*, i8** %10
%19 = call i32 @unix_error(i8* %18)
br label %20
20: ; preds = %17, %5
ret void
}

LLVM IR (-O2):
define void @my_pthread_create(i32* %0, i32* %1, i8* (i8*)* %2, i8* %3, i8* %4) {
%6 = tail call i64 @pthread_create(i32* %0, i32* %1, i8* (i8*)* %2, i8* %3)
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 @unix_error(i8* %4)
br label %10
10: ; preds = %8, %5
ret void
}