xunge/DecIR huggingface dataset:
double cdflib_fifdsign(double mag, double sign) {
  if (mag < 0) {
    mag = -mag;
  }
  if (sign < 0) {
    mag = -mag;
  }
  return mag;
}


x86 assembly (clang, -O0):
<cdflib_fifdsign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    113d <cdflib_fifdsign+0x3d>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    116c <cdflib_fifdsign+0x6c>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdflib_fifdsign>:
movapd 0xef8(%rip),%xmm2
movapd %xmm0,%xmm3
xorpd  %xmm2,%xmm3
xorpd  %xmm4,%xmm4
movapd %xmm0,%xmm5
cmpltsd %xmm4,%xmm5
andpd  %xmm5,%xmm3
andnpd %xmm0,%xmm5
orpd   %xmm3,%xmm5
xorpd  %xmm5,%xmm2
cmpltsd %xmm4,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm5,%xmm1
orpd   %xmm1,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @cdflib_fifdsign(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load double, double* %3
%9 = fneg double %8
store double %9, double* %3
br label %10
10: ; preds = %7, %2
%11 = load double, double* %4
%12 = fcmp olt double %11, 0.000000e+00
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load double, double* %3
%15 = fneg double %14
store double %15, double* %3
br label %16
16: ; preds = %13, %10
%17 = load double, double* %3
ret double %17
}

LLVM IR (-O2):
define double @cdflib_fifdsign(double %0, double %1) {
%3 = fcmp olt double %0, 0.000000e+00
%4 = fneg double %0
%5 = select i1 %3, double %4, double %0
%6 = fcmp olt double %1, 0.000000e+00
%7 = fneg double %5
%8 = select i1 %6, double %7, double %5
ret double %8
}
double pathconN_nm7_twice(double x) { return x + x; }


x86 assembly (clang, -O0):
<pathconN_nm7_twice>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm7_twice>:
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @pathconN_nm7_twice(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fadd double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @pathconN_nm7_twice(double %0) {
%2 = fadd double %0, %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void f1(int x) { printf("%d\n", x); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @f1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @f1(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int foo(int);
int main(void) { return foo(4); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x4,%edi
jmp    1030 <foo@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 4)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 4)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ describeLocation(char *, short, short);
int /*<<< orphan*/ flavorMessage(char *);
void printLocationDescription(short x, short y) {
  char buf[(100 - 20 - 1) * 3];
  describeLocation(buf, x, y);
  flavorMessage(buf);
}


x86 assembly (clang, -O0):
<printLocationDescription>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
lea    -0x100(%rbp),%rdi
mov    -0x2(%rbp),%ax
movswl %ax,%esi
movswl -0x4(%rbp),%edx
call   1040 <describeLocation@plt>
lea    -0x100(%rbp),%rdi
call   1030 <flavorMessage@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printLocationDescription>:
push   %rbx
sub    $0xf0,%rsp
mov    %esi,%edx
mov    %edi,%esi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <describeLocation@plt>
mov    %rbx,%rdi
call   1030 <flavorMessage@plt>
add    $0xf0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @printLocationDescription(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca [237 x i8]
store i16 %0, i16* %3
store i16 %1, i16* %4
%6 = getelementptr inbounds [237 x i8], [237 x i8]* %5, i64 0, i64 0
%7 = load i16, i16* %3
%8 = load i16, i16* %4
%9 = call i32 @describeLocation(i8* %6, i16 signext %7, i16 signext %8)
%10 = getelementptr inbounds [237 x i8], [237 x i8]* %5, i64 0, i64 0
%11 = call i32 @flavorMessage(i8* %10)
ret void
}

LLVM IR (-O2):
define void @printLocationDescription(i16 signext %0, i16 signext %1) {
%3 = alloca [237 x i8]
%4 = getelementptr inbounds [237 x i8], [237 x i8]* %3, i64 0, i64 0
%5 = call i32 @describeLocation(i8* %4, i16 signext %0, i16 signext %1)
%6 = call i32 @flavorMessage(i8* %4)
ret void
}
float Pow4(float x) { return x * x * x * x; }


x86 assembly (clang, -O0):
<Pow4>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Pow4>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Pow4(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = fmul float %5, %6
%8 = load float, float* %2
%9 = fmul float %7, %8
ret float %9
}

LLVM IR (-O2):
define float @Pow4(float %0) {
%2 = fmul float %0, %0
%3 = fmul float %2, %0
%4 = fmul float %3, %0
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ hoc_pushx(int);
int /*<<< orphan*/ hoc_ret();
hoc_settext() {
  hoc_ret();
  hoc_pushx(0.);
}


x86 assembly (clang, -O0):
<hoc_settext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <hoc_ret@plt>
xor    %edi,%edi
call   1040 <hoc_pushx@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoc_settext>:
push   %rax
xor    %eax,%eax
call   1030 <hoc_ret@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <hoc_pushx@plt>

LLVM IR (-O0):
define i32 @hoc_settext() {
%1 = alloca i32
%2 = call i32 (...) @hoc_ret()
%3 = call i32 @hoc_pushx(i32 0)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @hoc_settext() {
%1 = tail call i32 (...) @hoc_ret()
%2 = tail call i32 @hoc_pushx(i32 0)
ret i32 undef
}
/* Variables and functions */
int compress_file(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  if (argc < 2) {
    printf("usage : %s file\n", argv[0]);
    return 1;
  }
  return compress_file(argv[1]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    115f <main+0x3f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    116f <main+0x4f>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <compress_file@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jg     113c <main+0x1c>
mov    (%rsi),%rsi
lea    0xed0(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret
mov    0x8(%rsi),%rdi
pop    %rax
jmp    1030 <compress_file@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"usage : %s file\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %11)
store i32 1, i32* %3
br label %18
13: ; preds = %2
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 1
%16 = load i8*, i8** %15
%17 = call i32 @compress_file(i8* %16)
store i32 %17, i32* %3
br label %18
18: ; preds = %13, %8
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [17 x i8] c"usage : %s file\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %5)
br label %11
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i32 @compress_file(i8* %9)
br label %11
11: ; preds = %7, %4
%12 = phi i32 [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
int Tree_Compare(struct Tree *this, int num1, int num2) {
  int ntb;
  int nti;
  ntb = 0;
  nti = num2 + 1;
  if (num1 < num2) {
    ntb = 0;
  } else {
    if (!num1 < nti) {
      ntb = 0;
    } else {
      ntb = 1;
    }
  }
  return ntb;
}


x86 assembly (clang, -O0):
<Tree_Compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1136 <Tree_Compare+0x36>
movl   $0x0,-0x14(%rbp)
jmp    1165 <Tree_Compare+0x65>
cmpl   $0x0,-0xc(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cmp    -0x18(%rbp),%eax
jge    1159 <Tree_Compare+0x59>
movl   $0x0,-0x14(%rbp)
jmp    1160 <Tree_Compare+0x60>
movl   $0x1,-0x14(%rbp)
jmp    1165 <Tree_Compare+0x65>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tree_Compare>:
cmp    %edx,%esi
setge  %al
xor    %ecx,%ecx
test   %esi,%esi
sete   %cl
cmp    %edx,%ecx
setg   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
%struct.Tree = type opaque
define i32 @Tree_Compare(%struct.Tree* %0, i32 %1, i32 %2) {
%4 = alloca %struct.Tree*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.Tree* %0, %struct.Tree** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%9 = load i32, i32* %6
%10 = add nsw i32 %9, 1
store i32 %10, i32* %8
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %3
store i32 0, i32* %7
br label %25
15: ; preds = %3
%16 = load i32, i32* %5
%17 = icmp ne i32 %16, 0
%18 = xor i1 %17, true
%19 = zext i1 %18 to i32
%20 = load i32, i32* %8
%21 = icmp slt i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %15
store i32 0, i32* %7
br label %24
23: ; preds = %15
store i32 1, i32* %7
br label %24
24: ; preds = %23, %22
br label %25
25: ; preds = %24, %14
%26 = load i32, i32* %7
ret i32 %26
}

LLVM IR (-O2):
%struct.Tree = type opaque
define i32 @Tree_Compare(%struct.Tree* nocapture readnone %0, i32 %1, i32 %2) {
%4 = icmp sge i32 %1, %2
%5 = icmp eq i32 %1, 0
%6 = zext i1 %5 to i32
%7 = icmp sgt i32 %6, %2
%8 = and i1 %4, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int strcmp(char *const, char *const);
int cmp(const void *p1, const void *p2) {
  return strcmp(*(char *const *)p1, *(char *const *)p2);
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int main() { fputs("fdsa\n", stdout); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"fdsa\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"fdsa\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ROR8(int /*<<< orphan*/);
int /*<<< orphan*/ SA1Direct(int);
void Op66M1(void) { ROR8(SA1Direct(3)); }


x86 assembly (clang, -O0):
<Op66M1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1040 <SA1Direct@plt>
mov    %eax,%edi
call   1030 <ROR8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op66M1>:
push   %rax
mov    $0x3,%edi
call   1040 <SA1Direct@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ROR8@plt>

LLVM IR (-O0):
define void @Op66M1() {
%1 = call i32 @SA1Direct(i32 3)
%2 = call i32 @ROR8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op66M1() {
%1 = tail call i32 @SA1Direct(i32 3)
%2 = tail call i32 @ROR8(i32 %1)
ret void
}
/* Variables and functions */
char *malloc(unsigned long);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
void init_buffer(char **bufp, unsigned int *sizep) {
  char *buf = malloc((1ul << 14));
  memset(buf, 0, (40));
  *sizep = (40);
  *bufp = buf;
}


x86 assembly (clang, -O0):
<init_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4000,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
xor    %esi,%esi
mov    $0x28,%edx
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
movl   $0x28,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_buffer>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    $0x4000,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    $0x28,%edx
call   1030 <memset@plt>
movl   $0x28,(%r15)
mov    %rbx,(%r14)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @init_buffer(i8** %0, i32* %1) {
%3 = alloca i8**
%4 = alloca i32*
%5 = alloca i8*
store i8** %0, i8*** %3
store i32* %1, i32** %4
%6 = call i8* @malloc(i64 16384)
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = call i32 @memset(i8* %7, i32 0, i32 40)
%9 = load i32*, i32** %4
store i32 40, i32* %9
%10 = load i8*, i8** %5
%11 = load i8**, i8*** %3
store i8* %10, i8** %11
ret void
}

LLVM IR (-O2):
define void @init_buffer(i8** nocapture writeonly %0, i32* nocapture writeonly %1) {
%3 = tail call dereferenceable_or_null(16384) i8* @malloc(i64 16384)
%4 = tail call i32 @memset(i8* %3, i32 0, i32 40)
store i32 40, i32* %1
store i8* %3, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void yield() { sched_yield(); }


x86 assembly (clang, -O0):
<yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<yield>:
xor    %eax,%eax
jmp    1030 <sched_yield@plt>

LLVM IR (-O0):
define void @yield() {
%1 = call i32 (...) @sched_yield()
ret void
}

LLVM IR (-O2):
define void @yield() {
%1 = tail call i32 (...) @sched_yield()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay_ms(int);
int /*<<< orphan*/ lcd_send_byte(int);
void lcd_clear() {
  lcd_send_byte(0x00);
  lcd_send_byte(0x10);
  delay_ms(2);
}


x86 assembly (clang, -O0):
<lcd_clear>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <lcd_send_byte@plt>
mov    $0x10,%edi
call   1040 <lcd_send_byte@plt>
mov    $0x2,%edi
call   1030 <delay_ms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_clear>:
push   %rax
xor    %edi,%edi
call   1040 <lcd_send_byte@plt>
mov    $0x10,%edi
call   1040 <lcd_send_byte@plt>
mov    $0x2,%edi
pop    %rax
jmp    1030 <delay_ms@plt>

LLVM IR (-O0):
define void @lcd_clear() {
%1 = call i32 @lcd_send_byte(i32 0)
%2 = call i32 @lcd_send_byte(i32 16)
%3 = call i32 @delay_ms(i32 2)
ret void
}

LLVM IR (-O2):
define void @lcd_clear() {
%1 = tail call i32 @lcd_send_byte(i32 0)
%2 = tail call i32 @lcd_send_byte(i32 16)
%3 = tail call i32 @delay_ms(i32 2)
ret void
}
void performance_read() {}


x86 assembly (clang, -O0):
<performance_read>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<performance_read>:
ret

LLVM IR (-O0):
define void @performance_read() {
ret void
}

LLVM IR (-O2):
define void @performance_read() {
ret void
}
/* Variables and functions */
unsigned int cvmx_coremask_core(int /*<<< orphan*/);
int /*<<< orphan*/ cvmx_get_core_num();
int cvmx_coremask_is_member(unsigned int coremask) {
  return ((cvmx_coremask_core(cvmx_get_core_num()) & coremask) != 0);
}


x86 assembly (clang, -O0):
<cvmx_coremask_is_member>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <cvmx_get_core_num@plt>
mov    %eax,%edi
call   1030 <cvmx_coremask_core@plt>
and    -0x4(%rbp),%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_coremask_is_member>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <cvmx_get_core_num@plt>
mov    %eax,%edi
call   1030 <cvmx_coremask_core@plt>
xor    %ecx,%ecx
test   %ebx,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cvmx_coremask_is_member(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @cvmx_get_core_num()
%4 = call i32 @cvmx_coremask_core(i32 %3)
%5 = load i32, i32* %2
%6 = and i32 %4, %5
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @cvmx_coremask_is_member(i32 %0) {
%2 = tail call i32 (...) @cvmx_get_core_num()
%3 = tail call i32 @cvmx_coremask_core(i32 %2)
%4 = and i32 %3, %0
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
void pthread_sched_done(void) {}


x86 assembly (clang, -O0):
<pthread_sched_done>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_sched_done>:
ret

LLVM IR (-O0):
define void @pthread_sched_done() {
ret void
}

LLVM IR (-O2):
define void @pthread_sched_done() {
ret void
}
int get_priority(char c) {
  if (c == '+') {
    return 2;
  } else if (c == '-') {
    return 2;
  } else if (c == '*') {
    return 3;
  } else if (c == '/') {
    return 3;
  } else {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_priority>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
jne    1123 <get_priority+0x23>
movl   $0x2,-0x4(%rbp)
jmp    1175 <get_priority+0x75>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
jne    113c <get_priority+0x3c>
movl   $0x2,-0x4(%rbp)
jmp    1175 <get_priority+0x75>
movsbl -0x5(%rbp),%eax
cmp    $0x2a,%eax
jne    1155 <get_priority+0x55>
movl   $0x3,-0x4(%rbp)
jmp    1175 <get_priority+0x75>
movsbl -0x5(%rbp),%eax
cmp    $0x2f,%eax
jne    116e <get_priority+0x6e>
movl   $0x3,-0x4(%rbp)
jmp    1175 <get_priority+0x75>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_priority>:
add    $0xd6,%dil
mov    $0xffffffff,%eax
cmp    $0x5,%dil
ja     111d <get_priority+0x1d>
movsbq %dil,%rax
lea    0xee6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @get_priority(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 43
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 2, i32* %2
br label %24
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 45
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 2, i32* %2
br label %24
13: ; preds = %8
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 42
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 3, i32* %2
br label %24
18: ; preds = %13
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 47
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 3, i32* %2
br label %24
23: ; preds = %18
store i32 -1, i32* %2
br label %24
24: ; preds = %23, %22, %17, %12, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
@switch.table.get_priority = [6 x i32] [i32 3, i32 2, i32 -1, i32 2, i32 -1, i32 3]
define i32 @get_priority(i8 signext %0) {
%2 = add i8 %0, -42
%3 = icmp ult i8 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i8 %2 to i64
%6 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.get_priority, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ -1, %1 ]
ret i32 %9
}
int my_str_isupper(char *str) {
  int i;
  char c;
  i = 0;
  while (str[i] != '\0') {
    c = str[i];
    if (c < 'A' || c > 'Z') {
      return (0);
    }
    i = i + 1;
  }
  return (1);
}


x86 assembly (clang, -O0):
<my_str_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1166 <my_str_isupper+0x66>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x15(%rbp)
movsbl -0x15(%rbp),%eax
cmp    $0x41,%eax
jl     114c <my_str_isupper+0x4c>
movsbl -0x15(%rbp),%eax
cmp    $0x5a,%eax
jle    1158 <my_str_isupper+0x58>
movl   $0x0,-0x4(%rbp)
jmp    116d <my_str_isupper+0x6d>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <my_str_isupper+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_str_isupper>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1123 <my_str_isupper+0x23>
add    $0x1,%rdi
nop
add    $0xa5,%cl
cmp    $0xe5,%cl
jbe    1124 <my_str_isupper+0x24>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <my_str_isupper+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_str_isupper(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 0, i32* %4
br label %6
6: ; preds = %28, %1
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %31
14: ; preds = %6
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %5
%20 = load i8, i8* %5
%21 = sext i8 %20 to i32
%22 = icmp slt i32 %21, 65
br i1 %22, label %27, label %23
23: ; preds = %14
%24 = load i8, i8* %5
%25 = sext i8 %24 to i32
%26 = icmp sgt i32 %25, 90
br i1 %26, label %27, label %28
27: ; preds = %23, %14
store i32 0, i32* %2
br label %32
28: ; preds = %23
%29 = load i32, i32* %4
%30 = add nsw i32 %29, 1
store i32 %30, i32* %4
br label %6
31: ; preds = %6
store i32 1, i32* %2
br label %32
32: ; preds = %31, %27
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @my_str_isupper(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %8
4: ; preds = %8
%5 = getelementptr inbounds i8, i8* %0, i64 %13
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %1, %4
%9 = phi i64 [ %13, %4 ], [ 0, %1 ]
%10 = phi i8 [ %6, %4 ], [ %2, %1 ]
%11 = add i8 %10, -91
%12 = icmp ult i8 %11, -26
%13 = add nuw i64 %9, 1
br i1 %12, label %14, label %4
14: ; preds = %8, %4, %1
%15 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %8 ]
ret i32 %15
}
/* Variables and functions */
long double Gamma_Function_Max_Arg();
long double logl(int /*<<< orphan*/);
int /*<<< orphan*/ xGamma_Function(long double);
long double xLnGamma_Asymptotic_Expansion(long double);
long double xLn_Gamma_Function(long double x) {
  if (x <= Gamma_Function_Max_Arg())
    return logl(xGamma_Function(x));
  return xLnGamma_Asymptotic_Expansion(x);
}


x86 assembly (clang, -O0):
<xLn_Gamma_Function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
fstpt  -0x2c(%rbp)
xor    %eax,%eax
call   1040 <Gamma_Function_Max_Arg@plt>
fldt   -0x2c(%rbp)
fld    %st(1)
fstp   %st(0)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jb     118f <xLn_Gamma_Function+0x4f>
jmp    1173 <xLn_Gamma_Function+0x33>
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1050 <xGamma_Function@plt>
mov    %eax,%edi
call   1030 <logl@plt>
fstpt  -0x10(%rbp)
jmp    119f <xLn_Gamma_Function+0x5f>
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1060 <xLnGamma_Asymptotic_Expansion@plt>
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xLn_Gamma_Function>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fstpt  0x1c(%rsp)
xor    %eax,%eax
call   1040 <Gamma_Function_Max_Arg@plt>
fldt   0x1c(%rsp)
fxch   %st(1)
fucomip %st(1),%st
jae    116a <xLn_Gamma_Function+0x2a>
fstpt  (%rsp)
call   1060 <xLnGamma_Asymptotic_Expansion@plt>
add    $0x28,%rsp
ret
fstpt  (%rsp)
call   1050 <xGamma_Function@plt>
mov    %eax,%edi
add    $0x28,%rsp
jmp    1030 <logl@plt>

LLVM IR (-O0):
define x86_fp80 @xLn_Gamma_Function(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
%4 = load x86_fp80, x86_fp80* %3
%5 = call x86_fp80 (...) @Gamma_Function_Max_Arg()
%6 = fcmp ole x86_fp80 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load x86_fp80, x86_fp80* %3
%9 = call i32 @xGamma_Function(x86_fp80 %8)
%10 = call x86_fp80 @logl(i32 %9)
store x86_fp80 %10, x86_fp80* %2
br label %14
11: ; preds = %1
%12 = load x86_fp80, x86_fp80* %3
%13 = call x86_fp80 @xLnGamma_Asymptotic_Expansion(x86_fp80 %12)
store x86_fp80 %13, x86_fp80* %2
br label %14
14: ; preds = %11, %7
%15 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %15
}

LLVM IR (-O2):
define x86_fp80 @xLn_Gamma_Function(x86_fp80 %0) {
%2 = tail call x86_fp80 (...) @Gamma_Function_Max_Arg()
%3 = fcmp ult x86_fp80 %2, %0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @xGamma_Function(x86_fp80 %0)
%6 = tail call x86_fp80 @logl(i32 %5)
br label %9
7: ; preds = %1
%8 = tail call x86_fp80 @xLnGamma_Asymptotic_Expansion(x86_fp80 %0)
br label %9
9: ; preds = %7, %4
%10 = phi x86_fp80 [ %6, %4 ], [ %8, %7 ]
ret x86_fp80 %10
}
int SDL_imageFilterSubMMX(unsigned char *Src1, unsigned char *Src2,
                          unsigned char *Dest, int length) {
  return (0);
}


x86 assembly (clang, -O0):
<SDL_imageFilterSubMMX>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_imageFilterSubMMX>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @SDL_imageFilterSubMMX(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @SDL_imageFilterSubMMX(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
ret i32 0
}
void UAPP_Task1(void) {}


x86 assembly (clang, -O0):
<UAPP_Task1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UAPP_Task1>:
ret

LLVM IR (-O0):
define void @UAPP_Task1() {
ret void
}

LLVM IR (-O2):
define void @UAPP_Task1() {
ret void
}
float bytes2Float_SE(const char *byteArray) {
  int number;
  char *addr = (char *)&number;
  int i;
  for (i = 0; i < sizeof(float); ++i)
    addr[i] = byteArray[i];
  return (float)number / (float)(1 << 29);
}


x86 assembly (clang, -O0):
<bytes2Float_SE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
cmp    $0x4,%rax
jae    1149 <bytes2Float_SE+0x49>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <bytes2Float_SE+0x17>
cvtsi2ssl -0xc(%rbp),%xmm0
movss  0xeaa(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytes2Float_SE>:
cvtsi2ssl (%rdi),%xmm0
mulss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @bytes2Float_SE(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %2
%6 = bitcast i32* %3 to i8*
store i8* %6, i8** %4
store i32 0, i32* %5
br label %7
7: ; preds = %21, %1
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = icmp ult i64 %9, 4
br i1 %10, label %11, label %24
11: ; preds = %7
%12 = load i8*, i8** %2
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = load i8*, i8** %4
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
br label %21
21: ; preds = %11
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
%25 = load i32, i32* %3
%26 = sitofp i32 %25 to float
%27 = fdiv float %26, 0x41C0000000000000
ret float %27
}

LLVM IR (-O2):
define float @bytes2Float_SE(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to float
%5 = fmul float %4, 0x3E20000000000000
ret float %5
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double stdlib_strided_dvariance(int, int, double *, int);
int main() {
  double x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
  int64_t N = 4;
  int64_t stride = 2;
  double v = stdlib_strided_dvariance(N, 1, x, stride);
  printf("sample variance: %lf\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    -0x40(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x40,%edx
call   1050 <memcpy@plt>
movl   $0x4,-0x44(%rbp)
movl   $0x2,-0x48(%rbp)
mov    -0x44(%rbp),%edi
lea    -0x40(%rbp),%rdx
mov    -0x48(%rbp),%ecx
mov    $0x1,%esi
call   1040 <stdlib_strided_dvariance@plt>
movsd  %xmm0,-0x50(%rbp)
movsd  -0x50(%rbp),%xmm0
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x48,%rsp
movaps 0xf05(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeb1(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdx
mov    $0x4,%edi
mov    $0x1,%esi
mov    $0x2,%ecx
call   1040 <stdlib_strided_dvariance@plt>
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x48,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00, double 5.000000e+00, double 6.000000e+00, double 7.000000e+00, double 8.000000e+00]
@.str = [22 x i8] c"sample variance: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x double]
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = bitcast [8 x double]* %1 to i8*
store i32 4, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [8 x double], [8 x double]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call double @stdlib_strided_dvariance(i32 %6, i32 1, double* %7, i32 %8)
store double %9, double* %4
%10 = load double, double* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00, double 5.000000e+00, double 6.000000e+00, double 7.000000e+00, double 8.000000e+00]
@.str = [22 x i8] c"sample variance: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x double]
%2 = bitcast [8 x double]* %1 to i8*
%3 = getelementptr inbounds [8 x double], [8 x double]* %1, i64 0, i64 0
%4 = call double @stdlib_strided_dvariance(i32 4, i32 1, double* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), double %4)
ret i32 0
}
/* Variables and functions */
int core_counter();
unsigned int core_random() { return core_counter() & 0x1D3F5EE20F7AF96FUL; }


x86 assembly (clang, -O0):
<core_random>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <core_counter@plt>
cltq
movabs $0x1d3f5ee20f7af96f,%rcx
5e 3f 1d
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_random>:
push   %rax
xor    %eax,%eax
call   1030 <core_counter@plt>
and    $0xf7af96f,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @core_random() {
%1 = call i32 (...) @core_counter()
%2 = sext i32 %1 to i64
%3 = and i64 %2, 2107507475648018799
%4 = trunc i64 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @core_random() {
%1 = tail call i32 (...) @core_counter()
%2 = and i32 %1, 259717487
ret i32 %2
}
/* Variables and functions */
int vz_fs_is_mounted(char const *);
int vps_is_mounted(const char *root) { return vz_fs_is_mounted(root); }


x86 assembly (clang, -O0):
<vps_is_mounted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vz_fs_is_mounted@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vps_is_mounted>:
jmp    1030 <vz_fs_is_mounted@plt>

LLVM IR (-O0):
define i32 @vps_is_mounted(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @vz_fs_is_mounted(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @vps_is_mounted(i8* %0) {
%2 = tail call i32 @vz_fs_is_mounted(i8* %0)
ret i32 %2
}
int g(int i) { return (i + 2) < i; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
cmp    -0x4(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
%5 = load i32, i32* %2
%6 = icmp slt i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
ret i32 0
}
void ASN1_PRINTABLE_free(void) {}


x86 assembly (clang, -O0):
<ASN1_PRINTABLE_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_PRINTABLE_free>:
ret

LLVM IR (-O0):
define void @ASN1_PRINTABLE_free() {
ret void
}

LLVM IR (-O2):
define void @ASN1_PRINTABLE_free() {
ret void
}
int min(int a, int b, int c) {
  int m = (a < b) ? a : b;
  return c < m ? c : m;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <min+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    112a <min+0x2a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1147 <min+0x47>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    114d <min+0x4d>
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
cmp    %edx,%eax
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %4
br label %15
13: ; preds = %3
%14 = load i32, i32* %5
br label %15
15: ; preds = %13, %11
%16 = phi i32 [ %12, %11 ], [ %14, %13 ]
store i32 %16, i32* %7
%17 = load i32, i32* %6
%18 = load i32, i32* %7
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load i32, i32* %6
br label %24
22: ; preds = %15
%23 = load i32, i32* %7
br label %24
24: ; preds = %22, %20
%25 = phi i32 [ %21, %20 ], [ %23, %22 ]
ret i32 %25
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = select i1 %4, i32 %0, i32 %1
%6 = icmp sgt i32 %5, %2
%7 = select i1 %6, i32 %2, i32 %5
ret i32 %7
}
int add4(int a[2][2]) { return a[0][0] + a[1][0]; }


x86 assembly (clang, -O0):
<add4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
add    0x8(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add4>:
mov    0x8(%rdi),%eax
add    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @add4([2 x i32]* %0) {
%2 = alloca [2 x i32]*
store [2 x i32]* %0, [2 x i32]** %2
%3 = load [2 x i32]*, [2 x i32]** %2
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
%6 = load i32, i32* %5
%7 = load [2 x i32]*, [2 x i32]** %2
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 1
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
%10 = load i32, i32* %9
%11 = add nsw i32 %6, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @add4([2 x i32]* nocapture %0) {
%2 = getelementptr inbounds [2 x i32], [2 x i32]* %0, i64 0, i64 0
%3 = load i32, i32* %2
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %0, i64 1, i64 0
%5 = load i32, i32* %4
%6 = add nsw i32 %5, %3
ret i32 %6
}
char *strpbrk(const char *first, const char *second) { return 0; }


x86 assembly (clang, -O0):
<strpbrk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strpbrk>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @strpbrk(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
double moon_dust_limit(planet_mass_ratio, dist_from_primary)
double planet_mass_ratio, dist_from_primary;
{
  double primary_influence;
  if (dist_from_primary > 5.0)
    primary_influence = 5.0;
  else
    primary_influence = dist_from_primary;
  return (0.4 * primary_influence * pow(planet_mass_ratio, (1.0 / 2.0)));
}


x86 assembly (clang, -O0):
<moon_dust_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xed1(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    114b <moon_dust_limit+0x3b>
movsd  0xebf(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1155 <moon_dust_limit+0x45>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeb3(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xe94(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<moon_dust_limit>:
sub    $0x18,%rsp
movsd  0xee4(%rip),%xmm2
mulsd  %xmm1,%xmm2
movsd  0xee0(%rip),%xmm3
cmpltsd %xmm1,%xmm3
movsd  0xedb(%rip),%xmm1
andpd  %xmm3,%xmm1
andnpd %xmm2,%xmm3
orpd   %xmm1,%xmm3
movapd %xmm3,(%rsp)
movsd  0xeca(%rip),%xmm1
call   1030 <pow@plt>
mulsd  (%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @moon_dust_limit(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = fcmp ogt double %6, 5.000000e+00
br i1 %7, label %8, label %9
8: ; preds = %2
store double 5.000000e+00, double* %5
br label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %5
br label %11
11: ; preds = %9, %8
%12 = load double, double* %5
%13 = fmul double 4.000000e-01, %12
%14 = load double, double* %3
%15 = call double @pow(double %14, double 5.000000e-01)
%16 = fmul double %13, %15
ret double %16
}

LLVM IR (-O2):
define double @moon_dust_limit(double %0, double %1) {
%3 = fcmp ogt double %1, 5.000000e+00
%4 = fmul double %1, 4.000000e-01
%5 = select i1 %3, double 2.000000e+00, double %4
%6 = tail call double @pow(double %0, double 5.000000e-01)
%7 = fmul double %5, %6
ret double %7
}
int min(int a, int b, int c) {
  int min = 0;
  if (a < b)
    min = a;
  else
    min = b;
  if (min > c)
    return c;
  else
    return min;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    112b <min+0x2b>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1131 <min+0x31>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1148 <min+0x48>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114e <min+0x4e>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
cmp    %edx,%eax
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load i32, i32* %5
store i32 %13, i32* %8
br label %16
14: ; preds = %3
%15 = load i32, i32* %6
store i32 %15, i32* %8
br label %16
16: ; preds = %14, %12
%17 = load i32, i32* %8
%18 = load i32, i32* %7
%19 = icmp sgt i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32, i32* %7
store i32 %21, i32* %4
br label %24
22: ; preds = %16
%23 = load i32, i32* %8
store i32 %23, i32* %4
br label %24
24: ; preds = %22, %20
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = select i1 %4, i32 %0, i32 %1
%6 = icmp sgt i32 %5, %2
%7 = select i1 %6, i32 %2, i32 %5
ret i32 %7
}
/* Variables and functions */
unsigned long CountLeadingZeroes(unsigned long);
unsigned long CountTrailingOnes(unsigned long x) {
  return 32 - CountLeadingZeroes(x & (~x - 1));
}


x86 assembly (clang, -O0):
<CountTrailingOnes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
sub    $0x1,%rax
and    %rax,%rdi
call   1030 <CountLeadingZeroes@plt>
mov    %rax,%rcx
mov    $0x20,%eax
sub    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CountTrailingOnes>:
push   %rax
mov    $0xfffffffffffffffe,%rax
sub    %rdi,%rax
and    %rax,%rdi
call   1030 <CountLeadingZeroes@plt>
mov    $0x20,%ecx
sub    %rax,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @CountTrailingOnes(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = xor i64 %4, -1
%6 = sub i64 %5, 1
%7 = and i64 %3, %6
%8 = call i64 @CountLeadingZeroes(i64 %7)
%9 = sub i64 32, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @CountTrailingOnes(i64 %0) {
%2 = sub i64 -2, %0
%3 = and i64 %2, %0
%4 = tail call i64 @CountLeadingZeroes(i64 %3)
%5 = sub i64 32, %4
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ function_with_leak2();
void use_function_with_leak2() { function_with_leak2(); }


x86 assembly (clang, -O0):
<use_function_with_leak2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <function_with_leak2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_function_with_leak2>:
xor    %eax,%eax
jmp    1030 <function_with_leak2@plt>

LLVM IR (-O0):
define void @use_function_with_leak2() {
%1 = call i32 (...) @function_with_leak2()
ret void
}

LLVM IR (-O2):
define void @use_function_with_leak2() {
%1 = tail call i32 (...) @function_with_leak2()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ x54x_out(int, int /*<<< orphan*/, void *);
void x54x_writeb(uint32_t port, uint8_t val, void *priv) {
  x54x_out(port & 3, val, priv);
}


x86 assembly (clang, -O0):
<x54x_writeb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0x3,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <x54x_out@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x54x_writeb>:
and    $0x3,%edi
jmp    1030 <x54x_out@plt>

LLVM IR (-O0):
define void @x54x_writeb(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = and i32 %7, 3
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = call i32 @x54x_out(i32 %8, i32 %9, i8* %10)
ret void
}

LLVM IR (-O2):
define void @x54x_writeb(i32 %0, i32 %1, i8* %2) {
%4 = and i32 %0, 3
%5 = tail call i32 @x54x_out(i32 %4, i32 %1, i8* %2)
ret void
}
void vs6451_stop(struct camera_info *caminfo) {}


x86 assembly (clang, -O0):
<vs6451_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vs6451_stop>:
ret

LLVM IR (-O0):
%struct.camera_info = type opaque
define void @vs6451_stop(%struct.camera_info* %0) {
%2 = alloca %struct.camera_info*
store %struct.camera_info* %0, %struct.camera_info** %2
ret void
}

LLVM IR (-O2):
%struct.camera_info = type opaque
define void @vs6451_stop(%struct.camera_info* nocapture %0) {
ret void
}
void av_thread_message_queue_set_free_func() {}


x86 assembly (clang, -O0):
<av_thread_message_queue_set_free_func>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_thread_message_queue_set_free_func>:
ret

LLVM IR (-O0):
define void @av_thread_message_queue_set_free_func() {
ret void
}

LLVM IR (-O2):
define void @av_thread_message_queue_set_free_func() {
ret void
}
int f1(int x) { return x ? 0 : 1; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @f1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 0, i32 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @f1(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}