void fwfwddct_8x8(int *ix, float *ox) {
  register float in0, in1, in2, in3, in4, in5, in6, in7;
  register float tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
  register float tmp;
  register int *ixaddr;
  register float *oxaddr;
  int i;
  int j;
  register float a1 = 0.707106718;
  register float a2 = -0.541196100;
  register float a3 = 0.707106718;
  register float a4 = 1.306562963;
  register float a5 = 0.382683432;
  ixaddr = ix;
  oxaddr = ox;
  for (i = 0; i < 8; i++) {
    in0 = *ixaddr;
    in1 = *(ixaddr + 1);
    in2 = *(ixaddr + 2);
    in3 = *(ixaddr + 3);
    in4 = *(ixaddr + 4);
    in5 = *(ixaddr + 5);
    in6 = *(ixaddr + 6);
    in7 = *(ixaddr + 7);
    tmp0 = in0 + in7;
    tmp1 = in1 + in6;
    tmp2 = in5 + in2;
    tmp3 = in3 + in4;
    tmp4 = in3 - in4;
    tmp5 = in2 - in5;
    tmp6 = in1 - in6;
    tmp7 = in0 - in7;
    in0 = tmp0 + tmp3;
    in1 = tmp1 + tmp2;
    in2 = tmp1 - tmp2;
    in3 = tmp0 - tmp3;
    in4 = -tmp4 - tmp5;
    in5 = tmp5 + tmp6;
    in6 = tmp6 + tmp7;
    *oxaddr = in0 + in1;
    *(oxaddr + 4) = in0 - in1;
    in2 = in2 + in3;
    tmp = (in6 + in4);
    tmp = a5 * tmp;
    tmp2 = a1 * in2;
    tmp4 = a2 * in4 - tmp;
    tmp5 = a3 * in5;
    tmp6 = a4 * in6 - tmp;
    *(oxaddr + 2) = tmp2 + in3;
    *(oxaddr + 6) = in3 - tmp2;
    in5 = tmp5 + tmp7;
    in7 = tmp7 - tmp5;
    *(oxaddr + 5) = tmp4 + in7;
    *(oxaddr + 1) = in5 + tmp6;
    *(oxaddr + 7) = in5 - tmp6;
    *(oxaddr + 3) = in7 - tmp4;
    oxaddr += 8;
    ixaddr += 8;
  }
  oxaddr = ox;
  for (i = 0; i < 8; i++) {
    in0 = *oxaddr;
    in1 = *(oxaddr + 8);
    in2 = *(oxaddr + 16);
    in3 = *(oxaddr + 24);
    in4 = *(oxaddr + 32);
    in5 = *(oxaddr + 40);
    in6 = *(oxaddr + 48);
    in7 = *(oxaddr + 56);
    tmp0 = in0 + in7;
    tmp1 = in1 + in6;
    tmp2 = in5 + in2;
    tmp3 = in3 + in4;
    tmp4 = in3 - in4;
    tmp5 = in2 - in5;
    tmp6 = in1 - in6;
    tmp7 = in0 - in7;
    in0 = tmp0 + tmp3;
    in1 = tmp1 + tmp2;
    in2 = tmp1 - tmp2;
    in3 = tmp0 - tmp3;
    in4 = -tmp4 - tmp5;
    in5 = tmp5 + tmp6;
    in6 = tmp6 + tmp7;
    *oxaddr = in0 + in1;
    *(oxaddr + 32) = in0 - in1;
    in2 += in3;
    tmp = (in6 + in4);
    tmp = a5 * tmp;
    tmp2 = a1 * in2;
    tmp4 = a2 * in4 - tmp;
    tmp5 = a3 * in5;
    tmp6 = a4 * in6 - tmp;
    *(oxaddr + 16) = tmp2 + in3;
    *(oxaddr + 48) = in3 - tmp2;
    in5 = tmp5 + tmp7;
    in7 = tmp7 - tmp5;
    *(oxaddr + 40) = tmp4 + in7;
    *(oxaddr + 8) = in5 + tmp6;
    *(oxaddr + 56) = in5 - tmp6;
    *(oxaddr + 24) = in7 - tmp4;
    oxaddr += 1;
  }
}


x86 assembly (clang, -O0):
<fwfwddct_8x8>:
push   %rbp
mov    %rsp,%rbp
push   %rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  0xef3(%rip),%xmm0
movss  %xmm0,-0x74(%rbp)
movss  0xeea(%rip),%xmm0
movss  %xmm0,-0x78(%rbp)
movss  0xed9(%rip),%xmm0
movss  %xmm0,-0x7c(%rbp)
movss  0xec8(%rip),%xmm0
movss  %xmm0,-0x80(%rbp)
movss  0xeb7(%rip),%xmm0
movss  %xmm0,-0x84(%rbp)
ff
mov    -0x8(%rbp),%rax
mov    %rax,-0x60(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x68(%rbp)
movl   $0x0,-0x6c(%rbp)
cmpl   $0x8,-0x6c(%rbp)
jge    144a <fwfwddct_8x8+0x34a>
mov    -0x60(%rbp),%rax
cvtsi2ssl (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0x4(%rax),%xmm0
movss  %xmm0,-0x18(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0x8(%rax),%xmm0
movss  %xmm0,-0x1c(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0xc(%rax),%xmm0
movss  %xmm0,-0x20(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0x10(%rax),%xmm0
movss  %xmm0,-0x24(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0x14(%rax),%xmm0
movss  %xmm0,-0x28(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0x18(%rax),%xmm0
movss  %xmm0,-0x2c(%rbp)
mov    -0x60(%rbp),%rax
cvtsi2ssl 0x1c(%rax),%xmm0
movss  %xmm0,-0x30(%rbp)
movss  -0x14(%rbp),%xmm0
addss  -0x30(%rbp),%xmm0
movss  %xmm0,-0x34(%rbp)
movss  -0x18(%rbp),%xmm0
addss  -0x2c(%rbp),%xmm0
movss  %xmm0,-0x38(%rbp)
movss  -0x28(%rbp),%xmm0
addss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x3c(%rbp)
movss  -0x20(%rbp),%xmm0
addss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x40(%rbp)
movss  -0x20(%rbp),%xmm0
subss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x44(%rbp)
movss  -0x1c(%rbp),%xmm0
subss  -0x28(%rbp),%xmm0
movss  %xmm0,-0x48(%rbp)
movss  -0x18(%rbp),%xmm0
subss  -0x2c(%rbp),%xmm0
movss  %xmm0,-0x4c(%rbp)
movss  -0x14(%rbp),%xmm0
subss  -0x30(%rbp),%xmm0
movss  %xmm0,-0x50(%rbp)
movss  -0x34(%rbp),%xmm0
addss  -0x40(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x38(%rbp),%xmm0
addss  -0x3c(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x38(%rbp),%xmm0
subss  -0x3c(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x34(%rbp),%xmm0
subss  -0x40(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x44(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
subss  -0x48(%rbp),%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x48(%rbp),%xmm0
addss  -0x4c(%rbp),%xmm0
movss  %xmm0,-0x28(%rbp)
movss  -0x4c(%rbp),%xmm0
addss  -0x50(%rbp),%xmm0
movss  %xmm0,-0x2c(%rbp)
movss  -0x14(%rbp),%xmm0
addss  -0x18(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x14(%rbp),%xmm0
subss  -0x18(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x10(%rax)
movss  -0x1c(%rbp),%xmm0
addss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x2c(%rbp),%xmm0
addss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x54(%rbp)
movss  -0x84(%rbp),%xmm0
ff
mulss  -0x54(%rbp),%xmm0
movss  %xmm0,-0x54(%rbp)
movss  -0x74(%rbp),%xmm0
mulss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x3c(%rbp)
movss  -0x78(%rbp),%xmm0
movss  -0x24(%rbp),%xmm2
movss  -0x54(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x44(%rbp)
movss  -0x7c(%rbp),%xmm0
mulss  -0x28(%rbp),%xmm0
movss  %xmm0,-0x48(%rbp)
movss  -0x80(%rbp),%xmm0
movss  -0x2c(%rbp),%xmm2
movss  -0x54(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4c(%rbp)
movss  -0x3c(%rbp),%xmm0
addss  -0x20(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x8(%rax)
movss  -0x20(%rbp),%xmm0
subss  -0x3c(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x18(%rax)
movss  -0x48(%rbp),%xmm0
addss  -0x50(%rbp),%xmm0
movss  %xmm0,-0x28(%rbp)
movss  -0x50(%rbp),%xmm0
subss  -0x48(%rbp),%xmm0
movss  %xmm0,-0x30(%rbp)
movss  -0x44(%rbp),%xmm0
addss  -0x30(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x14(%rax)
movss  -0x28(%rbp),%xmm0
addss  -0x4c(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x4(%rax)
movss  -0x28(%rbp),%xmm0
subss  -0x4c(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x1c(%rax)
movss  -0x30(%rbp),%xmm0
subss  -0x44(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0xc(%rax)
mov    -0x68(%rbp),%rax
add    $0x20,%rax
mov    %rax,-0x68(%rbp)
mov    -0x60(%rbp),%rax
add    $0x20,%rax
mov    %rax,-0x60(%rbp)
mov    -0x6c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x6c(%rbp)
jmp    1168 <fwfwddct_8x8+0x68>
mov    -0x10(%rbp),%rax
mov    %rax,-0x68(%rbp)
movl   $0x0,-0x6c(%rbp)
cmpl   $0x8,-0x6c(%rbp)
jge    1747 <fwfwddct_8x8+0x647>
mov    -0x68(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x68(%rbp),%rax
movss  0x20(%rax),%xmm0
movss  %xmm0,-0x18(%rbp)
mov    -0x68(%rbp),%rax
movss  0x40(%rax),%xmm0
movss  %xmm0,-0x1c(%rbp)
mov    -0x68(%rbp),%rax
movss  0x60(%rax),%xmm0
movss  %xmm0,-0x20(%rbp)
mov    -0x68(%rbp),%rax
movss  0x80(%rax),%xmm0
movss  %xmm0,-0x24(%rbp)
mov    -0x68(%rbp),%rax
movss  0xa0(%rax),%xmm0
movss  %xmm0,-0x28(%rbp)
mov    -0x68(%rbp),%rax
movss  0xc0(%rax),%xmm0
movss  %xmm0,-0x2c(%rbp)
mov    -0x68(%rbp),%rax
movss  0xe0(%rax),%xmm0
movss  %xmm0,-0x30(%rbp)
movss  -0x14(%rbp),%xmm0
addss  -0x30(%rbp),%xmm0
movss  %xmm0,-0x34(%rbp)
movss  -0x18(%rbp),%xmm0
addss  -0x2c(%rbp),%xmm0
movss  %xmm0,-0x38(%rbp)
movss  -0x28(%rbp),%xmm0
addss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x3c(%rbp)
movss  -0x20(%rbp),%xmm0
addss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x40(%rbp)
movss  -0x20(%rbp),%xmm0
subss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x44(%rbp)
movss  -0x1c(%rbp),%xmm0
subss  -0x28(%rbp),%xmm0
movss  %xmm0,-0x48(%rbp)
movss  -0x18(%rbp),%xmm0
subss  -0x2c(%rbp),%xmm0
movss  %xmm0,-0x4c(%rbp)
movss  -0x14(%rbp),%xmm0
subss  -0x30(%rbp),%xmm0
movss  %xmm0,-0x50(%rbp)
movss  -0x34(%rbp),%xmm0
addss  -0x40(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x38(%rbp),%xmm0
addss  -0x3c(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x38(%rbp),%xmm0
subss  -0x3c(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x34(%rbp),%xmm0
subss  -0x40(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x44(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
subss  -0x48(%rbp),%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x48(%rbp),%xmm0
addss  -0x4c(%rbp),%xmm0
movss  %xmm0,-0x28(%rbp)
movss  -0x4c(%rbp),%xmm0
addss  -0x50(%rbp),%xmm0
movss  %xmm0,-0x2c(%rbp)
movss  -0x14(%rbp),%xmm0
addss  -0x18(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x14(%rbp),%xmm0
subss  -0x18(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x80(%rax)
movss  -0x20(%rbp),%xmm0
addss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x2c(%rbp),%xmm0
addss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x54(%rbp)
movss  -0x84(%rbp),%xmm0
ff
mulss  -0x54(%rbp),%xmm0
movss  %xmm0,-0x54(%rbp)
movss  -0x74(%rbp),%xmm0
mulss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x3c(%rbp)
movss  -0x78(%rbp),%xmm0
movss  -0x24(%rbp),%xmm2
movss  -0x54(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x44(%rbp)
movss  -0x7c(%rbp),%xmm0
mulss  -0x28(%rbp),%xmm0
movss  %xmm0,-0x48(%rbp)
movss  -0x80(%rbp),%xmm0
movss  -0x2c(%rbp),%xmm2
movss  -0x54(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4c(%rbp)
movss  -0x3c(%rbp),%xmm0
addss  -0x20(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x40(%rax)
movss  -0x20(%rbp),%xmm0
subss  -0x3c(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0xc0(%rax)
movss  -0x48(%rbp),%xmm0
addss  -0x50(%rbp),%xmm0
movss  %xmm0,-0x28(%rbp)
movss  -0x50(%rbp),%xmm0
subss  -0x48(%rbp),%xmm0
movss  %xmm0,-0x30(%rbp)
movss  -0x44(%rbp),%xmm0
addss  -0x30(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0xa0(%rax)
movss  -0x28(%rbp),%xmm0
addss  -0x4c(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x20(%rax)
movss  -0x28(%rbp),%xmm0
subss  -0x4c(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0xe0(%rax)
movss  -0x30(%rbp),%xmm0
subss  -0x44(%rbp),%xmm0
mov    -0x68(%rbp),%rax
movss  %xmm0,0x60(%rax)
mov    -0x68(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x68(%rbp)
mov    -0x6c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x6c(%rbp)
jmp    1459 <fwfwddct_8x8+0x359>
add    $0x8,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwfwddct_8x8>:
movups 0x70(%rdi),%xmm8
movups 0x50(%rdi),%xmm5
movups (%rdi),%xmm4
movups 0x10(%rdi),%xmm0
movups 0x20(%rdi),%xmm10
movups 0x30(%rdi),%xmm9
movups 0x60(%rdi),%xmm6
movups 0x40(%rdi),%xmm3
movaps %xmm3,%xmm7
unpcklps %xmm6,%xmm7
movaps %xmm4,%xmm1
unpcklps %xmm10,%xmm1
movaps %xmm1,%xmm12
movlhps %xmm7,%xmm12
unpckhpd %xmm7,%xmm1
unpckhps %xmm6,%xmm3
unpckhps %xmm10,%xmm4
movaps %xmm4,%xmm11
movlhps %xmm3,%xmm11
unpckhpd %xmm3,%xmm4
movaps %xmm5,%xmm3
unpcklps %xmm8,%xmm3
movaps %xmm0,%xmm7
unpcklps %xmm9,%xmm7
movaps %xmm7,%xmm13
movlhps %xmm3,%xmm13
unpckhpd %xmm3,%xmm7
unpckhps %xmm8,%xmm5
unpckhps %xmm9,%xmm0
movaps %xmm0,%xmm2
movlhps %xmm5,%xmm2
unpckhpd %xmm5,%xmm0
cvtdq2ps %xmm12,%xmm10
cvtdq2ps %xmm1,%xmm5
cvtdq2ps %xmm11,%xmm6
cvtdq2ps %xmm4,%xmm4
cvtdq2ps %xmm13,%xmm9
cvtdq2ps %xmm7,%xmm8
cvtdq2ps %xmm2,%xmm11
cvtdq2ps %xmm0,%xmm0
movaps %xmm10,%xmm1
addps  %xmm0,%xmm1
movaps %xmm5,%xmm7
addps  %xmm11,%xmm7
movaps %xmm6,%xmm3
addps  %xmm8,%xmm3
movaps %xmm4,%xmm2
addps  %xmm9,%xmm2
subps  %xmm9,%xmm4
subps  %xmm8,%xmm6
subps  %xmm11,%xmm5
subps  %xmm0,%xmm10
movaps %xmm2,%xmm8
addps  %xmm1,%xmm8
movaps %xmm3,%xmm0
addps  %xmm7,%xmm0
subps  %xmm3,%xmm7
subps  %xmm2,%xmm1
xorps  0xe22(%rip),%xmm4
subps  %xmm6,%xmm4
addps  %xmm5,%xmm6
addps  %xmm10,%xmm5
movaps %xmm0,%xmm2
addps  %xmm8,%xmm2
subps  %xmm0,%xmm8
addps  %xmm1,%xmm7
movaps %xmm4,%xmm0
addps  %xmm5,%xmm0
movaps 0xe0c(%rip),%xmm13
mulps  %xmm13,%xmm7
mulps  0xe11(%rip),%xmm0
mulps  0xe1a(%rip),%xmm4
addps  %xmm0,%xmm4
mulps  %xmm13,%xmm6
mulps  0xe1c(%rip),%xmm5
addps  %xmm0,%xmm5
movaps %xmm1,%xmm3
addps  %xmm7,%xmm3
subps  %xmm7,%xmm1
movaps %xmm10,%xmm15
addps  %xmm6,%xmm15
subps  %xmm6,%xmm10
movaps %xmm10,%xmm6
addps  %xmm4,%xmm6
movaps %xmm15,%xmm12
addps  %xmm5,%xmm12
subps  %xmm5,%xmm15
subps  %xmm4,%xmm10
movaps %xmm10,%xmm0
movlhps %xmm3,%xmm0
movaps %xmm2,%xmm11
unpcklps %xmm12,%xmm11
shufps $0x24,%xmm0,%xmm11
movaps %xmm11,-0x58(%rsp)
movaps %xmm15,%xmm0
movlhps %xmm1,%xmm0
movaps %xmm8,%xmm9
unpcklps %xmm6,%xmm9
shufps $0x24,%xmm0,%xmm9
movaps %xmm9,-0x18(%rsp)
movaps %xmm3,%xmm0
unpcklps %xmm10,%xmm0
movaps %xmm12,%xmm5
shufps $0x11,%xmm2,%xmm5
shufps $0xe2,%xmm0,%xmm5
movaps %xmm5,%xmm14
movaps %xmm5,-0x68(%rsp)
movaps %xmm1,%xmm0
unpcklps %xmm15,%xmm0
movaps %xmm6,%xmm5
shufps $0x11,%xmm8,%xmm5
shufps $0xe2,%xmm0,%xmm5
movaps %xmm5,-0x28(%rsp)
movaps %xmm10,%xmm0
unpckhpd %xmm3,%xmm0
movaps %xmm2,%xmm4
unpckhps %xmm12,%xmm4
shufps $0x24,%xmm0,%xmm4
movaps %xmm4,-0x78(%rsp)
movaps %xmm15,%xmm0
unpckhpd %xmm1,%xmm0
movaps %xmm8,%xmm7
unpckhps %xmm6,%xmm7
shufps $0x24,%xmm0,%xmm7
movaps %xmm7,-0x38(%rsp)
unpckhps %xmm10,%xmm3
shufps $0x33,%xmm2,%xmm12
shufps $0xe2,%xmm3,%xmm12
unpckhps %xmm15,%xmm1
shufps $0x33,%xmm8,%xmm6
shufps $0xe2,%xmm1,%xmm6
movaps %xmm6,-0x48(%rsp)
movups %xmm6,0x70(%rsi)
movups %xmm12,0x60(%rsi)
movups %xmm7,0x50(%rsi)
movups %xmm4,0x40(%rsi)
movups %xmm5,0x30(%rsi)
movups %xmm14,0x20(%rsi)
movups %xmm9,0x10(%rsi)
movups %xmm11,(%rsi)
movups 0xe0(%rdi),%xmm1
movups 0xc0(%rdi),%xmm4
movaps %xmm4,%xmm5
unpcklps %xmm1,%xmm5
movups 0x80(%rdi),%xmm0
movups 0xa0(%rdi),%xmm6
movaps %xmm0,%xmm2
unpcklps %xmm6,%xmm2
movaps %xmm2,%xmm8
movlhps %xmm5,%xmm8
unpckhpd %xmm5,%xmm2
unpckhps %xmm1,%xmm4
unpckhps %xmm6,%xmm0
movaps %xmm0,%xmm10
movlhps %xmm4,%xmm10
unpckhpd %xmm4,%xmm0
movups 0xf0(%rdi),%xmm15
movups 0xd0(%rdi),%xmm6
movaps %xmm6,%xmm7
unpcklps %xmm15,%xmm7
movups 0x90(%rdi),%xmm5
movups 0xb0(%rdi),%xmm3
movaps %xmm5,%xmm1
unpcklps %xmm3,%xmm1
movaps %xmm1,%xmm4
movlhps %xmm7,%xmm4
unpckhpd %xmm7,%xmm1
unpckhps %xmm15,%xmm6
unpckhps %xmm3,%xmm5
movaps %xmm5,%xmm3
movlhps %xmm6,%xmm3
unpckhpd %xmm6,%xmm5
cvtdq2ps %xmm0,%xmm0
cvtdq2ps %xmm4,%xmm4
movaps %xmm0,%xmm7
addps  %xmm4,%xmm7
subps  %xmm4,%xmm0
cvtdq2ps %xmm10,%xmm6
cvtdq2ps %xmm1,%xmm1
movaps %xmm6,%xmm10
addps  %xmm1,%xmm10
subps  %xmm1,%xmm6
cvtdq2ps %xmm2,%xmm4
cvtdq2ps %xmm3,%xmm2
movaps %xmm4,%xmm1
addps  %xmm2,%xmm1
subps  %xmm2,%xmm4
cvtdq2ps %xmm8,%xmm3
cvtdq2ps %xmm5,%xmm5
movaps %xmm3,%xmm2
addps  %xmm5,%xmm2
subps  %xmm5,%xmm3
movaps %xmm10,%xmm5
addps  %xmm1,%xmm5
subps  %xmm10,%xmm1
movaps %xmm7,%xmm9
addps  %xmm2,%xmm9
subps  %xmm7,%xmm2
movaps %xmm5,%xmm14
addps  %xmm9,%xmm14
subps  %xmm5,%xmm9
xorps  0xbde(%rip),%xmm0
subps  %xmm6,%xmm0
addps  %xmm4,%xmm6
addps  %xmm3,%xmm4
movaps %xmm0,%xmm5
addps  %xmm4,%xmm5
mulps  0xbe8(%rip),%xmm5
mulps  0xbf1(%rip),%xmm0
addps  %xmm5,%xmm0
mulps  0xbf7(%rip),%xmm4
addps  %xmm5,%xmm4
addps  %xmm2,%xmm1
mulps  %xmm13,%xmm1
movaps %xmm2,%xmm7
addps  %xmm1,%xmm7
subps  %xmm1,%xmm2
mulps  %xmm13,%xmm6
movaps %xmm3,%xmm1
addps  %xmm6,%xmm1
subps  %xmm6,%xmm3
movaps %xmm1,%xmm6
addps  %xmm4,%xmm6
subps  %xmm4,%xmm1
movaps %xmm3,%xmm4
addps  %xmm0,%xmm4
subps  %xmm0,%xmm3
movaps %xmm1,%xmm0
unpckhpd %xmm2,%xmm0
movaps %xmm9,%xmm11
unpckhps %xmm4,%xmm11
shufps $0x24,%xmm0,%xmm11
movaps %xmm3,%xmm0
unpckhpd %xmm7,%xmm0
movaps %xmm14,%xmm10
unpckhps %xmm6,%xmm10
shufps $0x24,%xmm0,%xmm10
movaps %xmm2,%xmm0
unpckhps %xmm1,%xmm0
movaps %xmm4,%xmm8
shufps $0x33,%xmm9,%xmm8
shufps $0xe2,%xmm0,%xmm8
movaps %xmm7,%xmm0
unpckhps %xmm3,%xmm0
movaps %xmm6,%xmm5
shufps $0x33,%xmm14,%xmm5
shufps $0xe2,%xmm0,%xmm5
movaps %xmm1,%xmm0
movlhps %xmm2,%xmm0
movaps %xmm9,%xmm15
unpcklps %xmm4,%xmm15
shufps $0x24,%xmm0,%xmm15
movaps %xmm3,%xmm0
movlhps %xmm7,%xmm0
movaps %xmm14,%xmm13
unpcklps %xmm6,%xmm13
shufps $0x24,%xmm0,%xmm13
unpcklps %xmm1,%xmm2
shufps $0x11,%xmm9,%xmm4
shufps $0xe2,%xmm2,%xmm4
unpcklps %xmm3,%xmm7
shufps $0x11,%xmm14,%xmm6
shufps $0xe2,%xmm7,%xmm6
movups %xmm6,0xa0(%rsi)
movups %xmm4,0xb0(%rsi)
movups %xmm13,0x80(%rsi)
movups %xmm15,0x90(%rsi)
movups %xmm5,0xe0(%rsi)
movups %xmm8,0xf0(%rsi)
movups %xmm10,0xc0(%rsi)
movups %xmm11,0xd0(%rsi)
movups 0x80(%rsi),%xmm0
movups 0xa0(%rsi),%xmm1
movaps %xmm12,%xmm4
addps  %xmm0,%xmm4
subps  %xmm0,%xmm12
movaps -0x78(%rsp),%xmm2
movaps %xmm2,%xmm0
addps  %xmm1,%xmm0
subps  %xmm1,%xmm2
movaps %xmm2,%xmm9
movups 0xc0(%rsi),%xmm1
movaps -0x68(%rsp),%xmm3
movaps %xmm3,%xmm2
addps  %xmm1,%xmm2
subps  %xmm1,%xmm3
movaps %xmm3,%xmm8
movups 0xe0(%rsi),%xmm1
movaps -0x58(%rsp),%xmm7
movaps %xmm7,%xmm3
addps  %xmm1,%xmm3
subps  %xmm1,%xmm7
movaps %xmm0,%xmm5
addps  %xmm2,%xmm5
subps  %xmm0,%xmm2
movaps %xmm4,%xmm6
addps  %xmm3,%xmm6
subps  %xmm4,%xmm3
movaps %xmm5,%xmm4
addps  %xmm6,%xmm4
movups 0x90(%rsi),%xmm1
movups 0xb0(%rsi),%xmm0
movups %xmm4,(%rsi)
subps  %xmm5,%xmm6
movups %xmm6,0x80(%rsi)
movaps 0xa28(%rip),%xmm11
xorps  %xmm11,%xmm12
movaps %xmm9,%xmm4
subps  %xmm9,%xmm12
movaps %xmm8,%xmm5
addps  %xmm8,%xmm4
movaps %xmm4,%xmm6
addps  %xmm7,%xmm5
movaps %xmm12,%xmm4
addps  %xmm5,%xmm4
movaps 0xa1f(%rip),%xmm10
mulps  %xmm10,%xmm4
movaps 0xa23(%rip),%xmm8
mulps  %xmm8,%xmm12
addps  %xmm4,%xmm12
movaps 0xa23(%rip),%xmm9
mulps  %xmm9,%xmm5
addps  %xmm4,%xmm5
addps  %xmm3,%xmm2
movaps 0x9e1(%rip),%xmm14
mulps  %xmm14,%xmm2
movaps %xmm3,%xmm4
addps  %xmm2,%xmm4
movups %xmm4,0x40(%rsi)
subps  %xmm2,%xmm3
mulps  %xmm14,%xmm6
movups %xmm3,0xc0(%rsi)
movaps %xmm7,%xmm4
movaps %xmm7,%xmm2
addps  %xmm6,%xmm2
subps  %xmm6,%xmm4
movaps %xmm4,%xmm3
addps  %xmm12,%xmm3
movups %xmm3,0xa0(%rsi)
movaps %xmm2,%xmm3
addps  %xmm5,%xmm3
movups %xmm3,0x20(%rsi)
subps  %xmm5,%xmm2
movups %xmm2,0xe0(%rsi)
subps  %xmm12,%xmm4
movups %xmm4,0x60(%rsi)
movups 0xd0(%rsi),%xmm2
movups 0xf0(%rsi),%xmm3
movaps -0x48(%rsp),%xmm6
movaps %xmm6,%xmm4
addps  %xmm1,%xmm4
subps  %xmm1,%xmm6
movaps -0x38(%rsp),%xmm1
movaps %xmm1,%xmm5
addps  %xmm0,%xmm5
subps  %xmm0,%xmm1
movaps %xmm1,%xmm13
movaps -0x28(%rsp),%xmm1
movaps %xmm1,%xmm0
addps  %xmm2,%xmm0
subps  %xmm2,%xmm1
movaps %xmm1,%xmm12
movaps -0x18(%rsp),%xmm7
movaps %xmm7,%xmm1
addps  %xmm3,%xmm1
subps  %xmm3,%xmm7
movaps %xmm5,%xmm2
addps  %xmm0,%xmm2
subps  %xmm5,%xmm0
movaps %xmm4,%xmm3
addps  %xmm1,%xmm3
subps  %xmm4,%xmm1
xorps  %xmm11,%xmm6
movaps %xmm2,%xmm4
addps  %xmm3,%xmm4
movups %xmm4,0x10(%rsi)
subps  %xmm2,%xmm3
movaps %xmm13,%xmm2
subps  %xmm13,%xmm6
movaps %xmm12,%xmm4
addps  %xmm12,%xmm2
movaps %xmm2,%xmm5
addps  %xmm7,%xmm4
movups %xmm3,0x90(%rsi)
movaps %xmm6,%xmm2
addps  %xmm4,%xmm2
mulps  %xmm10,%xmm2
mulps  %xmm8,%xmm6
addps  %xmm1,%xmm0
mulps  %xmm14,%xmm0
mulps  %xmm14,%xmm5
mulps  %xmm9,%xmm4
addps  %xmm2,%xmm6
addps  %xmm2,%xmm4
movaps %xmm1,%xmm2
addps  %xmm0,%xmm2
movups %xmm2,0x50(%rsi)
subps  %xmm0,%xmm1
movups %xmm1,0xd0(%rsi)
movaps %xmm7,%xmm2
movaps %xmm7,%xmm0
addps  %xmm5,%xmm0
subps  %xmm5,%xmm2
movaps %xmm2,%xmm1
addps  %xmm6,%xmm1
movups %xmm1,0xb0(%rsi)
movaps %xmm0,%xmm1
addps  %xmm4,%xmm1
movups %xmm1,0x30(%rsi)
subps  %xmm4,%xmm0
movups %xmm0,0xf0(%rsi)
subps  %xmm6,%xmm2
movups %xmm2,0x70(%rsi)
ret

LLVM IR (-O0):
define void @fwfwddct_8x8(i32* %0, float* %1) {
%3 = alloca i32*
%4 = alloca float*
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
%13 = alloca float
%14 = alloca float
%15 = alloca float
%16 = alloca float
%17 = alloca float
%18 = alloca float
%19 = alloca float
%20 = alloca float
%21 = alloca float
%22 = alloca i32*
%23 = alloca float*
%24 = alloca i32
%25 = alloca i32
%26 = alloca float
%27 = alloca float
%28 = alloca float
%29 = alloca float
%30 = alloca float
store i32* %0, i32** %3
store float* %1, float** %4
store float 0x3FE6A09E40000000, float* %26
store float 0xBFE1517A80000000, float* %27
store float 0x3FE6A09E40000000, float* %28
store float 0x3FF4E7AEA0000000, float* %29
store float 0x3FD87DE2A0000000, float* %30
%31 = load i32*, i32** %3
store i32* %31, i32** %22
%32 = load float*, float** %4
store float* %32, float** %23
store i32 0, i32* %24
br label %33
33: ; preds = %188, %2
%34 = load i32, i32* %24
%35 = icmp slt i32 %34, 8
br i1 %35, label %36, label %191
36: ; preds = %33
%37 = load i32*, i32** %22
%38 = load i32, i32* %37
%39 = sitofp i32 %38 to float
store float %39, float* %5
%40 = load i32*, i32** %22
%41 = getelementptr inbounds i32, i32* %40, i64 1
%42 = load i32, i32* %41
%43 = sitofp i32 %42 to float
store float %43, float* %6
%44 = load i32*, i32** %22
%45 = getelementptr inbounds i32, i32* %44, i64 2
%46 = load i32, i32* %45
%47 = sitofp i32 %46 to float
store float %47, float* %7
%48 = load i32*, i32** %22
%49 = getelementptr inbounds i32, i32* %48, i64 3
%50 = load i32, i32* %49
%51 = sitofp i32 %50 to float
store float %51, float* %8
%52 = load i32*, i32** %22
%53 = getelementptr inbounds i32, i32* %52, i64 4
%54 = load i32, i32* %53
%55 = sitofp i32 %54 to float
store float %55, float* %9
%56 = load i32*, i32** %22
%57 = getelementptr inbounds i32, i32* %56, i64 5
%58 = load i32, i32* %57
%59 = sitofp i32 %58 to float
store float %59, float* %10
%60 = load i32*, i32** %22
%61 = getelementptr inbounds i32, i32* %60, i64 6
%62 = load i32, i32* %61
%63 = sitofp i32 %62 to float
store float %63, float* %11
%64 = load i32*, i32** %22
%65 = getelementptr inbounds i32, i32* %64, i64 7
%66 = load i32, i32* %65
%67 = sitofp i32 %66 to float
store float %67, float* %12
%68 = load float, float* %5
%69 = load float, float* %12
%70 = fadd float %68, %69
store float %70, float* %13
%71 = load float, float* %6
%72 = load float, float* %11
%73 = fadd float %71, %72
store float %73, float* %14
%74 = load float, float* %10
%75 = load float, float* %7
%76 = fadd float %74, %75
store float %76, float* %15
%77 = load float, float* %8
%78 = load float, float* %9
%79 = fadd float %77, %78
store float %79, float* %16
%80 = load float, float* %8
%81 = load float, float* %9
%82 = fsub float %80, %81
store float %82, float* %17
%83 = load float, float* %7
%84 = load float, float* %10
%85 = fsub float %83, %84
store float %85, float* %18
%86 = load float, float* %6
%87 = load float, float* %11
%88 = fsub float %86, %87
store float %88, float* %19
%89 = load float, float* %5
%90 = load float, float* %12
%91 = fsub float %89, %90
store float %91, float* %20
%92 = load float, float* %13
%93 = load float, float* %16
%94 = fadd float %92, %93
store float %94, float* %5
%95 = load float, float* %14
%96 = load float, float* %15
%97 = fadd float %95, %96
store float %97, float* %6
%98 = load float, float* %14
%99 = load float, float* %15
%100 = fsub float %98, %99
store float %100, float* %7
%101 = load float, float* %13
%102 = load float, float* %16
%103 = fsub float %101, %102
store float %103, float* %8
%104 = load float, float* %17
%105 = fneg float %104
%106 = load float, float* %18
%107 = fsub float %105, %106
store float %107, float* %9
%108 = load float, float* %18
%109 = load float, float* %19
%110 = fadd float %108, %109
store float %110, float* %10
%111 = load float, float* %19
%112 = load float, float* %20
%113 = fadd float %111, %112
store float %113, float* %11
%114 = load float, float* %5
%115 = load float, float* %6
%116 = fadd float %114, %115
%117 = load float*, float** %23
store float %116, float* %117
%118 = load float, float* %5
%119 = load float, float* %6
%120 = fsub float %118, %119
%121 = load float*, float** %23
%122 = getelementptr inbounds float, float* %121, i64 4
store float %120, float* %122
%123 = load float, float* %7
%124 = load float, float* %8
%125 = fadd float %123, %124
store float %125, float* %7
%126 = load float, float* %11
%127 = load float, float* %9
%128 = fadd float %126, %127
store float %128, float* %21
%129 = load float, float* %30
%130 = load float, float* %21
%131 = fmul float %129, %130
store float %131, float* %21
%132 = load float, float* %26
%133 = load float, float* %7
%134 = fmul float %132, %133
store float %134, float* %15
%135 = load float, float* %27
%136 = load float, float* %9
%137 = load float, float* %21
%138 = fneg float %137
%139 = call float @llvm.fmuladd.f32(float %135, float %136, float %138)
store float %139, float* %17
%140 = load float, float* %28
%141 = load float, float* %10
%142 = fmul float %140, %141
store float %142, float* %18
%143 = load float, float* %29
%144 = load float, float* %11
%145 = load float, float* %21
%146 = fneg float %145
%147 = call float @llvm.fmuladd.f32(float %143, float %144, float %146)
store float %147, float* %19
%148 = load float, float* %15
%149 = load float, float* %8
%150 = fadd float %148, %149
%151 = load float*, float** %23
%152 = getelementptr inbounds float, float* %151, i64 2
store float %150, float* %152
%153 = load float, float* %8
%154 = load float, float* %15
%155 = fsub float %153, %154
%156 = load float*, float** %23
%157 = getelementptr inbounds float, float* %156, i64 6
store float %155, float* %157
%158 = load float, float* %18
%159 = load float, float* %20
%160 = fadd float %158, %159
store float %160, float* %10
%161 = load float, float* %20
%162 = load float, float* %18
%163 = fsub float %161, %162
store float %163, float* %12
%164 = load float, float* %17
%165 = load float, float* %12
%166 = fadd float %164, %165
%167 = load float*, float** %23
%168 = getelementptr inbounds float, float* %167, i64 5
store float %166, float* %168
%169 = load float, float* %10
%170 = load float, float* %19
%171 = fadd float %169, %170
%172 = load float*, float** %23
%173 = getelementptr inbounds float, float* %172, i64 1
store float %171, float* %173
%174 = load float, float* %10
%175 = load float, float* %19
%176 = fsub float %174, %175
%177 = load float*, float** %23
%178 = getelementptr inbounds float, float* %177, i64 7
store float %176, float* %178
%179 = load float, float* %12
%180 = load float, float* %17
%181 = fsub float %179, %180
%182 = load float*, float** %23
%183 = getelementptr inbounds float, float* %182, i64 3
store float %181, float* %183
%184 = load float*, float** %23
%185 = getelementptr inbounds float, float* %184, i64 8
store float* %185, float** %23
%186 = load i32*, i32** %22
%187 = getelementptr inbounds i32, i32* %186, i64 8
store i32* %187, i32** %22
br label %188
188: ; preds = %36
%189 = load i32, i32* %24
%190 = add nsw i32 %189, 1
store i32 %190, i32* %24
br label %33
191: ; preds = %33
%192 = load float*, float** %4
store float* %192, float** %23
store i32 0, i32* %24
br label %193
193: ; preds = %338, %191
%194 = load i32, i32* %24
%195 = icmp slt i32 %194, 8
br i1 %195, label %196, label %341
196: ; preds = %193
%197 = load float*, float** %23
%198 = load float, float* %197
store float %198, float* %5
%199 = load float*, float** %23
%200 = getelementptr inbounds float, float* %199, i64 8
%201 = load float, float* %200
store float %201, float* %6
%202 = load float*, float** %23
%203 = getelementptr inbounds float, float* %202, i64 16
%204 = load float, float* %203
store float %204, float* %7
%205 = load float*, float** %23
%206 = getelementptr inbounds float, float* %205, i64 24
%207 = load float, float* %206
store float %207, float* %8
%208 = load float*, float** %23
%209 = getelementptr inbounds float, float* %208, i64 32
%210 = load float, float* %209
store float %210, float* %9
%211 = load float*, float** %23
%212 = getelementptr inbounds float, float* %211, i64 40
%213 = load float, float* %212
store float %213, float* %10
%214 = load float*, float** %23
%215 = getelementptr inbounds float, float* %214, i64 48
%216 = load float, float* %215
store float %216, float* %11
%217 = load float*, float** %23
%218 = getelementptr inbounds float, float* %217, i64 56
%219 = load float, float* %218
store float %219, float* %12
%220 = load float, float* %5
%221 = load float, float* %12
%222 = fadd float %220, %221
store float %222, float* %13
%223 = load float, float* %6
%224 = load float, float* %11
%225 = fadd float %223, %224
store float %225, float* %14
%226 = load float, float* %10
%227 = load float, float* %7
%228 = fadd float %226, %227
store float %228, float* %15
%229 = load float, float* %8
%230 = load float, float* %9
%231 = fadd float %229, %230
store float %231, float* %16
%232 = load float, float* %8
%233 = load float, float* %9
%234 = fsub float %232, %233
store float %234, float* %17
%235 = load float, float* %7
%236 = load float, float* %10
%237 = fsub float %235, %236
store float %237, float* %18
%238 = load float, float* %6
%239 = load float, float* %11
%240 = fsub float %238, %239
store float %240, float* %19
%241 = load float, float* %5
%242 = load float, float* %12
%243 = fsub float %241, %242
store float %243, float* %20
%244 = load float, float* %13
%245 = load float, float* %16
%246 = fadd float %244, %245
store float %246, float* %5
%247 = load float, float* %14
%248 = load float, float* %15
%249 = fadd float %247, %248
store float %249, float* %6
%250 = load float, float* %14
%251 = load float, float* %15
%252 = fsub float %250, %251
store float %252, float* %7
%253 = load float, float* %13
%254 = load float, float* %16
%255 = fsub float %253, %254
store float %255, float* %8
%256 = load float, float* %17
%257 = fneg float %256
%258 = load float, float* %18
%259 = fsub float %257, %258
store float %259, float* %9
%260 = load float, float* %18
%261 = load float, float* %19
%262 = fadd float %260, %261
store float %262, float* %10
%263 = load float, float* %19
%264 = load float, float* %20
%265 = fadd float %263, %264
store float %265, float* %11
%266 = load float, float* %5
%267 = load float, float* %6
%268 = fadd float %266, %267
%269 = load float*, float** %23
store float %268, float* %269
%270 = load float, float* %5
%271 = load float, float* %6
%272 = fsub float %270, %271
%273 = load float*, float** %23
%274 = getelementptr inbounds float, float* %273, i64 32
store float %272, float* %274
%275 = load float, float* %8
%276 = load float, float* %7
%277 = fadd float %276, %275
store float %277, float* %7
%278 = load float, float* %11
%279 = load float, float* %9
%280 = fadd float %278, %279
store float %280, float* %21
%281 = load float, float* %30
%282 = load float, float* %21
%283 = fmul float %281, %282
store float %283, float* %21
%284 = load float, float* %26
%285 = load float, float* %7
%286 = fmul float %284, %285
store float %286, float* %15
%287 = load float, float* %27
%288 = load float, float* %9
%289 = load float, float* %21
%290 = fneg float %289
%291 = call float @llvm.fmuladd.f32(float %287, float %288, float %290)
store float %291, float* %17
%292 = load float, float* %28
%293 = load float, float* %10
%294 = fmul float %292, %293
store float %294, float* %18
%295 = load float, float* %29
%296 = load float, float* %11
%297 = load float, float* %21
%298 = fneg float %297
%299 = call float @llvm.fmuladd.f32(float %295, float %296, float %298)
store float %299, float* %19
%300 = load float, float* %15
%301 = load float, float* %8
%302 = fadd float %300, %301
%303 = load float*, float** %23
%304 = getelementptr inbounds float, float* %303, i64 16
store float %302, float* %304
%305 = load float, float* %8
%306 = load float, float* %15
%307 = fsub float %305, %306
%308 = load float*, float** %23
%309 = getelementptr inbounds float, float* %308, i64 48
store float %307, float* %309
%310 = load float, float* %18
%311 = load float, float* %20
%312 = fadd float %310, %311
store float %312, float* %10
%313 = load float, float* %20
%314 = load float, float* %18
%315 = fsub float %313, %314
store float %315, float* %12
%316 = load float, float* %17
%317 = load float, float* %12
%318 = fadd float %316, %317
%319 = load float*, float** %23
%320 = getelementptr inbounds float, float* %319, i64 40
store float %318, float* %320
%321 = load float, float* %10
%322 = load float, float* %19
%323 = fadd float %321, %322
%324 = load float*, float** %23
%325 = getelementptr inbounds float, float* %324, i64 8
store float %323, float* %325
%326 = load float, float* %10
%327 = load float, float* %19
%328 = fsub float %326, %327
%329 = load float*, float** %23
%330 = getelementptr inbounds float, float* %329, i64 56
store float %328, float* %330
%331 = load float, float* %12
%332 = load float, float* %17
%333 = fsub float %331, %332
%334 = load float*, float** %23
%335 = getelementptr inbounds float, float* %334, i64 24
store float %333, float* %335
%336 = load float*, float** %23
%337 = getelementptr inbounds float, float* %336, i64 1
store float* %337, float** %23
br label %338
338: ; preds = %196
%339 = load i32, i32* %24
%340 = add nsw i32 %339, 1
store i32 %340, i32* %24
br label %193
341: ; preds = %193
ret void
}

LLVM IR (-O2):
define void @fwfwddct_8x8(i32* nocapture %0, float* nocapture %1) {
%3 = bitcast i32* %0 to <32 x i32>*
%4 = load <32 x i32>, <32 x i32>* %3
%5 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 0, i32 8, i32 16, i32 24>
%6 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 1, i32 9, i32 17, i32 25>
%7 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 2, i32 10, i32 18, i32 26>
%8 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 3, i32 11, i32 19, i32 27>
%9 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 4, i32 12, i32 20, i32 28>
%10 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 5, i32 13, i32 21, i32 29>
%11 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 6, i32 14, i32 22, i32 30>
%12 = shufflevector <32 x i32> %4, <32 x i32> poison, <4 x i32> <i32 7, i32 15, i32 23, i32 31>
%13 = sitofp <4 x i32> %5 to <4 x float>
%14 = sitofp <4 x i32> %6 to <4 x float>
%15 = sitofp <4 x i32> %7 to <4 x float>
%16 = sitofp <4 x i32> %8 to <4 x float>
%17 = sitofp <4 x i32> %9 to <4 x float>
%18 = sitofp <4 x i32> %10 to <4 x float>
%19 = sitofp <4 x i32> %11 to <4 x float>
%20 = sitofp <4 x i32> %12 to <4 x float>
%21 = fadd <4 x float> %13, %20
%22 = fadd <4 x float> %14, %19
%23 = fadd <4 x float> %15, %18
%24 = fadd <4 x float> %16, %17
%25 = fsub <4 x float> %16, %17
%26 = fsub <4 x float> %15, %18
%27 = fsub <4 x float> %14, %19
%28 = fsub <4 x float> %13, %20
%29 = fadd <4 x float> %24, %21
%30 = fadd <4 x float> %23, %22
%31 = fsub <4 x float> %22, %23
%32 = fsub <4 x float> %21, %24
%33 = fneg <4 x float> %25
%34 = fsub <4 x float> %33, %26
%35 = fadd <4 x float> %26, %27
%36 = fadd <4 x float> %27, %28
%37 = fadd <4 x float> %30, %29
%38 = fsub <4 x float> %29, %30
%39 = fadd <4 x float> %31, %32
%40 = fadd <4 x float> %34, %36
%41 = fmul <4 x float> %39, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%42 = fmul <4 x float> %40, <float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000>
%43 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %34, <4 x float> <float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000>, <4 x float> %42)
%44 = fmul <4 x float> %35, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%45 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %36, <4 x float> <float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000>, <4 x float> %42)
%46 = fadd <4 x float> %32, %41
%47 = fsub <4 x float> %32, %41
%48 = fadd <4 x float> %28, %44
%49 = fsub <4 x float> %28, %44
%50 = fadd <4 x float> %49, %43
%51 = fadd <4 x float> %48, %45
%52 = fsub <4 x float> %48, %45
%53 = fsub <4 x float> %49, %43
%54 = bitcast float* %1 to <32 x float>*
%55 = shufflevector <4 x float> %37, <4 x float> %51, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%56 = shufflevector <4 x float> %46, <4 x float> %53, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%57 = shufflevector <4 x float> %38, <4 x float> %50, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%58 = shufflevector <4 x float> %47, <4 x float> %52, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%59 = shufflevector <8 x float> %55, <8 x float> %56, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%60 = shufflevector <8 x float> %57, <8 x float> %58, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%61 = shufflevector <16 x float> %59, <16 x float> %60, <32 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29, i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
store <32 x float> %61, <32 x float>* %54
%62 = getelementptr i32, i32* %0, i64 32
%63 = bitcast i32* %62 to <32 x i32>*
%64 = load <32 x i32>, <32 x i32>* %63
%65 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 0, i32 8, i32 16, i32 24>
%66 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 1, i32 9, i32 17, i32 25>
%67 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 2, i32 10, i32 18, i32 26>
%68 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 3, i32 11, i32 19, i32 27>
%69 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 4, i32 12, i32 20, i32 28>
%70 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 5, i32 13, i32 21, i32 29>
%71 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 6, i32 14, i32 22, i32 30>
%72 = shufflevector <32 x i32> %64, <32 x i32> poison, <4 x i32> <i32 7, i32 15, i32 23, i32 31>
%73 = sitofp <4 x i32> %65 to <4 x float>
%74 = sitofp <4 x i32> %66 to <4 x float>
%75 = sitofp <4 x i32> %67 to <4 x float>
%76 = sitofp <4 x i32> %68 to <4 x float>
%77 = sitofp <4 x i32> %69 to <4 x float>
%78 = sitofp <4 x i32> %70 to <4 x float>
%79 = sitofp <4 x i32> %71 to <4 x float>
%80 = sitofp <4 x i32> %72 to <4 x float>
%81 = fadd <4 x float> %73, %80
%82 = fadd <4 x float> %74, %79
%83 = fadd <4 x float> %75, %78
%84 = fadd <4 x float> %76, %77
%85 = fsub <4 x float> %76, %77
%86 = fsub <4 x float> %75, %78
%87 = fsub <4 x float> %74, %79
%88 = fsub <4 x float> %73, %80
%89 = fadd <4 x float> %84, %81
%90 = fadd <4 x float> %83, %82
%91 = fsub <4 x float> %82, %83
%92 = fsub <4 x float> %81, %84
%93 = fneg <4 x float> %85
%94 = fsub <4 x float> %93, %86
%95 = fadd <4 x float> %86, %87
%96 = fadd <4 x float> %87, %88
%97 = fadd <4 x float> %90, %89
%98 = fsub <4 x float> %89, %90
%99 = fadd <4 x float> %91, %92
%100 = fadd <4 x float> %94, %96
%101 = fmul <4 x float> %99, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%102 = fmul <4 x float> %100, <float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000>
%103 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %94, <4 x float> <float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000>, <4 x float> %102)
%104 = fmul <4 x float> %95, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%105 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %96, <4 x float> <float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000>, <4 x float> %102)
%106 = fadd <4 x float> %92, %101
%107 = fsub <4 x float> %92, %101
%108 = fadd <4 x float> %88, %104
%109 = fsub <4 x float> %88, %104
%110 = fadd <4 x float> %109, %103
%111 = fadd <4 x float> %108, %105
%112 = fsub <4 x float> %108, %105
%113 = fsub <4 x float> %109, %103
%114 = getelementptr inbounds float, float* %1, i64 32
%115 = bitcast float* %114 to <32 x float>*
%116 = shufflevector <4 x float> %97, <4 x float> %111, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%117 = shufflevector <4 x float> %106, <4 x float> %113, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%118 = shufflevector <4 x float> %98, <4 x float> %110, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%119 = shufflevector <4 x float> %107, <4 x float> %112, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%120 = shufflevector <8 x float> %116, <8 x float> %117, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%121 = shufflevector <8 x float> %118, <8 x float> %119, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%122 = shufflevector <16 x float> %120, <16 x float> %121, <32 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29, i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
store <32 x float> %122, <32 x float>* %115
%123 = bitcast float* %1 to <4 x float>*
%124 = load <4 x float>, <4 x float>* %123
%125 = getelementptr inbounds float, float* %1, i64 8
%126 = bitcast float* %125 to <4 x float>*
%127 = load <4 x float>, <4 x float>* %126
%128 = getelementptr inbounds float, float* %1, i64 16
%129 = bitcast float* %128 to <4 x float>*
%130 = load <4 x float>, <4 x float>* %129
%131 = getelementptr inbounds float, float* %1, i64 24
%132 = bitcast float* %131 to <4 x float>*
%133 = load <4 x float>, <4 x float>* %132
%134 = getelementptr inbounds float, float* %1, i64 32
%135 = bitcast float* %134 to <4 x float>*
%136 = load <4 x float>, <4 x float>* %135
%137 = getelementptr inbounds float, float* %1, i64 40
%138 = bitcast float* %137 to <4 x float>*
%139 = load <4 x float>, <4 x float>* %138
%140 = getelementptr inbounds float, float* %1, i64 48
%141 = bitcast float* %140 to <4 x float>*
%142 = load <4 x float>, <4 x float>* %141
%143 = getelementptr inbounds float, float* %1, i64 56
%144 = bitcast float* %143 to <4 x float>*
%145 = load <4 x float>, <4 x float>* %144
%146 = fadd <4 x float> %124, %145
%147 = fadd <4 x float> %127, %142
%148 = fadd <4 x float> %130, %139
%149 = fadd <4 x float> %133, %136
%150 = fsub <4 x float> %133, %136
%151 = fsub <4 x float> %130, %139
%152 = fsub <4 x float> %127, %142
%153 = fsub <4 x float> %124, %145
%154 = fadd <4 x float> %149, %146
%155 = fadd <4 x float> %148, %147
%156 = fsub <4 x float> %147, %148
%157 = fsub <4 x float> %146, %149
%158 = fneg <4 x float> %150
%159 = fsub <4 x float> %158, %151
%160 = fadd <4 x float> %151, %152
%161 = fadd <4 x float> %152, %153
%162 = fadd <4 x float> %155, %154
%163 = bitcast float* %1 to <4 x float>*
store <4 x float> %162, <4 x float>* %163
%164 = fsub <4 x float> %154, %155
%165 = bitcast float* %134 to <4 x float>*
store <4 x float> %164, <4 x float>* %165
%166 = fadd <4 x float> %156, %157
%167 = fadd <4 x float> %159, %161
%168 = fmul <4 x float> %166, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%169 = fmul <4 x float> %167, <float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000>
%170 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %159, <4 x float> <float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000>, <4 x float> %169)
%171 = fmul <4 x float> %160, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%172 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %161, <4 x float> <float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000>, <4 x float> %169)
%173 = fadd <4 x float> %157, %168
%174 = bitcast float* %128 to <4 x float>*
store <4 x float> %173, <4 x float>* %174
%175 = fsub <4 x float> %157, %168
%176 = bitcast float* %140 to <4 x float>*
store <4 x float> %175, <4 x float>* %176
%177 = fadd <4 x float> %153, %171
%178 = fsub <4 x float> %153, %171
%179 = fadd <4 x float> %178, %170
%180 = bitcast float* %137 to <4 x float>*
store <4 x float> %179, <4 x float>* %180
%181 = fadd <4 x float> %177, %172
%182 = bitcast float* %125 to <4 x float>*
store <4 x float> %181, <4 x float>* %182
%183 = fsub <4 x float> %177, %172
%184 = bitcast float* %143 to <4 x float>*
store <4 x float> %183, <4 x float>* %184
%185 = fsub <4 x float> %178, %170
%186 = bitcast float* %131 to <4 x float>*
store <4 x float> %185, <4 x float>* %186
%187 = getelementptr float, float* %1, i64 4
%188 = bitcast float* %187 to <4 x float>*
%189 = load <4 x float>, <4 x float>* %188
%190 = getelementptr float, float* %1, i64 12
%191 = bitcast float* %190 to <4 x float>*
%192 = load <4 x float>, <4 x float>* %191
%193 = getelementptr float, float* %1, i64 20
%194 = bitcast float* %193 to <4 x float>*
%195 = load <4 x float>, <4 x float>* %194
%196 = getelementptr float, float* %1, i64 28
%197 = bitcast float* %196 to <4 x float>*
%198 = load <4 x float>, <4 x float>* %197
%199 = getelementptr float, float* %1, i64 36
%200 = bitcast float* %199 to <4 x float>*
%201 = load <4 x float>, <4 x float>* %200
%202 = getelementptr float, float* %1, i64 44
%203 = bitcast float* %202 to <4 x float>*
%204 = load <4 x float>, <4 x float>* %203
%205 = getelementptr float, float* %1, i64 52
%206 = bitcast float* %205 to <4 x float>*
%207 = load <4 x float>, <4 x float>* %206
%208 = getelementptr float, float* %1, i64 60
%209 = bitcast float* %208 to <4 x float>*
%210 = load <4 x float>, <4 x float>* %209
%211 = fadd <4 x float> %189, %210
%212 = fadd <4 x float> %192, %207
%213 = fadd <4 x float> %195, %204
%214 = fadd <4 x float> %198, %201
%215 = fsub <4 x float> %198, %201
%216 = fsub <4 x float> %195, %204
%217 = fsub <4 x float> %192, %207
%218 = fsub <4 x float> %189, %210
%219 = fadd <4 x float> %214, %211
%220 = fadd <4 x float> %213, %212
%221 = fsub <4 x float> %212, %213
%222 = fsub <4 x float> %211, %214
%223 = fneg <4 x float> %215
%224 = fsub <4 x float> %223, %216
%225 = fadd <4 x float> %216, %217
%226 = fadd <4 x float> %217, %218
%227 = fadd <4 x float> %220, %219
%228 = bitcast float* %187 to <4 x float>*
store <4 x float> %227, <4 x float>* %228
%229 = fsub <4 x float> %219, %220
%230 = bitcast float* %199 to <4 x float>*
store <4 x float> %229, <4 x float>* %230
%231 = fadd <4 x float> %221, %222
%232 = fadd <4 x float> %224, %226
%233 = fmul <4 x float> %231, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%234 = fmul <4 x float> %232, <float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000, float 0xBFD87DE2A0000000>
%235 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %224, <4 x float> <float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000, float 0xBFE1517A80000000>, <4 x float> %234)
%236 = fmul <4 x float> %225, <float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000, float 0x3FE6A09E40000000>
%237 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %226, <4 x float> <float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000, float 0x3FF4E7AEA0000000>, <4 x float> %234)
%238 = fadd <4 x float> %222, %233
%239 = bitcast float* %193 to <4 x float>*
store <4 x float> %238, <4 x float>* %239
%240 = fsub <4 x float> %222, %233
%241 = bitcast float* %205 to <4 x float>*
store <4 x float> %240, <4 x float>* %241
%242 = fadd <4 x float> %218, %236
%243 = fsub <4 x float> %218, %236
%244 = fadd <4 x float> %243, %235
%245 = bitcast float* %202 to <4 x float>*
store <4 x float> %244, <4 x float>* %245
%246 = fadd <4 x float> %242, %237
%247 = bitcast float* %190 to <4 x float>*
store <4 x float> %246, <4 x float>* %247
%248 = fsub <4 x float> %242, %237
%249 = bitcast float* %208 to <4 x float>*
store <4 x float> %248, <4 x float>* %249
%250 = fsub <4 x float> %243, %235
%251 = bitcast float* %196 to <4 x float>*
store <4 x float> %250, <4 x float>* %251
ret void
}