xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ SetTransferMatrix(int, int /*<<< orphan*/,
                                     int /*<<< orphan*/, int, double, double);
int /*<<< orphan*/ ZigZagArcHelp(double *);
void ZigZagArc(double *args) {
  SetTransferMatrix(1, 0, 0, 1, args[0], args[1]);
  ZigZagArcHelp(args);
}


x86 assembly (clang, -O0):
<ZigZagArc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    $0x1,%ecx
xor    %edx,%edx
mov    %ecx,%edi
mov    %edx,%esi
call   1040 <SetTransferMatrix@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ZigZagArcHelp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZigZagArc>:
push   %rbx
mov    %rdi,%rbx
movsd  (%rdi),%xmm0
movsd  0x8(%rdi),%xmm1
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1040 <SetTransferMatrix@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <ZigZagArcHelp@plt>

LLVM IR (-O0):
define void @ZigZagArc(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 1
%8 = load double, double* %7
%9 = call i32 @SetTransferMatrix(i32 1, i32 0, i32 0, i32 1, double %5, double %8)
%10 = load double*, double** %2
%11 = call i32 @ZigZagArcHelp(double* %10)
ret void
}

LLVM IR (-O2):
define void @ZigZagArc(double* %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = tail call i32 @SetTransferMatrix(i32 1, i32 0, i32 0, i32 1, double %2, double %4)
%6 = tail call i32 @ZigZagArcHelp(double* %0)
ret void
}
int hash_func(void *key) {
  int size = sizeof(int);
  unsigned char *ptr = (unsigned char *)key;
  int b = *ptr;
  for (int j = 2; j < size; j++) {
    b = ((b * 64) + *(ptr + j * size)) % 12289;
  }
  return b;
}


x86 assembly (clang, -O0):
<hash_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
movl   $0x2,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1167 <hash_func+0x67>
mov    -0x1c(%rbp),%eax
shl    $0x6,%eax
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%edx
imul   -0xc(%rbp),%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
mov    $0x3001,%ecx
cltd
idiv   %ecx
mov    %edx,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1128 <hash_func+0x28>
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_func>:
movzbl (%rdi),%eax
shl    $0x6,%eax
movzbl 0x8(%rdi),%ecx
add    %eax,%ecx
imul   $0x554f,%ecx,%eax
shr    $0x10,%eax
mov    %ecx,%edx
sub    %eax,%edx
movzwl %dx,%edx
shr    %edx
add    %eax,%edx
shr    $0xd,%edx
imul   $0x3001,%edx,%eax
sub    %eax,%ecx
movzwl %cx,%ecx
shl    $0x6,%ecx
movzbl 0xc(%rdi),%eax
add    %ecx,%eax
mov    $0xaaa71c85,%ecx
imul   %rax,%rcx
shr    $0x2d,%rcx
imul   $0x3001,%ecx,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash_func(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %2
store i32 4, i32* %3
%7 = load i8*, i8** %2
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
store i32 %10, i32* %5
store i32 2, i32* %6
br label %11
11: ; preds = %28, %1
%12 = load i32, i32* %6
%13 = load i32, i32* %3
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %31
15: ; preds = %11
%16 = load i32, i32* %5
%17 = mul nsw i32 %16, 64
%18 = load i8*, i8** %4
%19 = load i32, i32* %6
%20 = load i32, i32* %3
%21 = mul nsw i32 %19, %20
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %18, i64 %22
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = add nsw i32 %17, %25
%27 = srem i32 %26, 12289
store i32 %27, i32* %5
br label %28
28: ; preds = %15
%29 = load i32, i32* %6
%30 = add nsw i32 %29, 1
store i32 %30, i32* %6
br label %11
31: ; preds = %11
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
define i32 @hash_func(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i16
%4 = shl nuw nsw i16 %3, 6
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = load i8, i8* %5
%7 = zext i8 %6 to i16
%8 = add nuw nsw i16 %4, %7
%9 = urem i16 %8, 12289
%10 = zext i16 %9 to i32
%11 = shl nuw nsw i32 %10, 6
%12 = getelementptr inbounds i8, i8* %0, i64 12
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = add nuw nsw i32 %11, %14
%16 = urem i32 %15, 12289
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char const *, unsigned char const);
int is_metacharacter(const unsigned char *s) {
  static const char *metacharacters = "^$().[]*+?|\\Ssdbfnrtv";
  return strchr(metacharacters, *s) != NULL;
}


x86 assembly (clang, -O0):
<is_metacharacter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2f05(%rip),%rdi
mov    -0x8(%rbp),%rax
movzbl (%rax),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_metacharacter>:
push   %rax
movzbl (%rdi),%esi
lea    0xee5(%rip),%rdi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@is_metacharacter.metacharacters = internal global i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i32 0, i32 0)
@.str = [22 x i8] c"^$().[]*+?|\\Ssdbfnrtv\00"
define i32 @is_metacharacter(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** @is_metacharacter.metacharacters
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i32* @strchr(i8* %3, i8 zeroext %5)
%7 = icmp ne i32* %6, null
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@.str = [22 x i8] c"^$().[]*+?|\\Ssdbfnrtv\00"
define i32 @is_metacharacter(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call i32* @strchr(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8 zeroext %2)
%4 = icmp ne i32* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}
int badFunction() {
  if (__yield_setjmp(__builtin_return_address(0), __func__) == 42)
    return 0;
  else
    __yield_postjump();
  ;
  return (int){0};
}


x86 assembly (clang, -O0):
<badFunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x8(%rbp),%rdi
lea    0xecd(%rip),%rsi
mov    $0x0,%al
call   1030 <__yield_setjmp@plt>
cmp    $0x2a,%eax
jne    114f <badFunction+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1163 <badFunction+0x43>
mov    $0x0,%al
call   1040 <__yield_postjump@plt>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<badFunction>:
push   %rax
mov    0x8(%rsp),%rdi
lea    0xed3(%rip),%rsi
xor    %eax,%eax
call   1030 <__yield_setjmp@plt>
cmp    $0x2a,%eax
je     1140 <badFunction+0x20>
xor    %eax,%eax
call   1040 <__yield_postjump@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__func__.badFunction = [12 x i8] c"badFunction\00"
define i32 @badFunction() {
%1 = alloca i32
%2 = alloca i32
%3 = call i8* @llvm.returnaddress(i32 0)
%4 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @__yield_setjmp to i32 (i8*, i8*, ...)*)(i8* %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__func__.badFunction, i64 0, i64 0))
%5 = icmp eq i32 %4, 42
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %1
br label %11
7: ; preds = %0
%8 = call i32 (...) @__yield_postjump()
br label %9
9: ; preds = %7
store i32 0, i32* %2
%10 = load i32, i32* %2
store i32 %10, i32* %1
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@__func__.badFunction = [12 x i8] c"badFunction\00"
define i32 @badFunction() {
%1 = tail call i8* @llvm.returnaddress(i32 0)
%2 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @__yield_setjmp to i32 (i8*, i8*, ...)*)(i8* %1, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__func__.badFunction, i64 0, i64 0))
%3 = icmp eq i32 %2, 42
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 (...) @__yield_postjump()
br label %6
6: ; preds = %0, %4
ret i32 0
}
/* Variables and functions */
int close(int);
int CLOSE(int sock) { return close(sock); }


x86 assembly (clang, -O0):
<CLOSE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CLOSE>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @CLOSE(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @CLOSE(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, size_t *, size_t);
void *memmove(void *dest, const void *src, size_t len) {
  size_t tmp[len];
  memcpy(tmp, src, len);
  memcpy(dest, tmp, len);
  return dest;
}


x86 assembly (clang, -O0):
<memmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
lea    0xf(,%rax,8),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x30(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x30(%rbp),%rsi
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r15
mov    %rdi,%r14
mov    %rsp,%rbx
lea    0xf(,%rdx,8),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
call   1030 <memcpy@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %r15,%rdx
call   1030 <memcpy@plt>
mov    %r14,%rax
lea    -0x18(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8* @memmove(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%9 = load i64, i64* %6
%10 = call i8* @llvm.stacksave()
store i8* %10, i8** %7
%11 = alloca i64, i64 %9
store i64 %9, i64* %8
%12 = bitcast i64* %11 to i8*
%13 = load i8*, i8** %5
%14 = bitcast i8* %13 to i64*
%15 = load i64, i64* %6
%16 = call i32 @memcpy(i8* %12, i64* %14, i64 %15)
%17 = load i8*, i8** %4
%18 = load i64, i64* %6
%19 = call i32 @memcpy(i8* %17, i64* %11, i64 %18)
%20 = load i8*, i8** %4
%21 = load i8*, i8** %7
ret i8* %20
}

LLVM IR (-O2):
define i8* @memmove(i8* returned %0, i8* %1, i64 %2) {
%4 = alloca i64, i64 %2
%5 = bitcast i64* %4 to i8*
%6 = bitcast i8* %1 to i64*
%7 = call i32 @memcpy(i8* %5, i64* %6, i64 %2)
%8 = call i32 @memcpy(i8* %0, i64* %4, i64 %2)
ret i8* %0
}
int solve_nsnipers(int *battlefield, int n) { return 0; }


x86 assembly (clang, -O0):
<solve_nsnipers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<solve_nsnipers>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @solve_nsnipers(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @solve_nsnipers(i32* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ diag(char *);
int /*<<< orphan*/ sleep(int);
void *sleeping(void *arg) {
  (void)arg;
  diag("\tsleeping thread starts");
  diag("\t"
       "sleep(1)");
  sleep(1);
  diag("\tNOTREACHED");
  return arg;
}


x86 assembly (clang, -O0):
<sleeping>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <diag@plt>
lea    0xed9(%rip),%rdi
call   1030 <diag@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
lea    0xecd(%rip),%rdi
call   1030 <diag@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleeping>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <diag@plt>
lea    0xee1(%rip),%rdi
call   1030 <diag@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
lea    0xed5(%rip),%rdi
call   1030 <diag@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"\09sleeping thread starts\00"
@.str.1 = [10 x i8] c"\09sleep(1)\00"
@.str.2 = [12 x i8] c"\09NOTREACHED\00"
define i8* @sleeping(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @diag(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @diag(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @sleep(i32 1)
%7 = call i32 @diag(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0))
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
@.str = [24 x i8] c"\09sleeping thread starts\00"
@.str.1 = [10 x i8] c"\09sleep(1)\00"
@.str.2 = [12 x i8] c"\09NOTREACHED\00"
define i8* @sleeping(i8* readnone returned %0) {
%2 = tail call i32 @diag(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @diag(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @sleep(i32 1)
%5 = tail call i32 @diag(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0))
ret i8* %0
}
const char *find_not_char(const char *str, const char *strend, char ch) {
  while (str != strend && *str == ch)
    str++;
  return str;
}


x86 assembly (clang, -O0):
<find_not_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x12(%rbp)
je     1137 <find_not_char+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
test   $0x1,%al
jne    1147 <find_not_char+0x47>
jmp    1158 <find_not_char+0x58>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1111 <find_not_char+0x11>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_not_char>:
mov    %rdi,%rax
cmp    %rsi,%rdi
je     1120 <find_not_char+0x20>
nopl   0x0(%rax,%rax,1)
cmp    %dl,(%rax)
jne    1120 <find_not_char+0x20>
add    $0x1,%rax
cmp    %rsi,%rax
jne    1110 <find_not_char+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @find_not_char(i8* %0, i8* %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
br label %7
7: ; preds = %20, %3
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = icmp ne i8* %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8, i8* %6
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br label %18
18: ; preds = %11, %7
%19 = phi i1 [ false, %7 ], [ %17, %11 ]
br i1 %19, label %20, label %23
20: ; preds = %18
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
br label %7
23: ; preds = %18
%24 = load i8*, i8** %4
ret i8* %24
}

LLVM IR (-O2):
define i8* @find_not_char(i8* %0, i8* readnone %1, i8 signext %2) {
%4 = icmp eq i8* %0, %1
br i1 %4, label %17, label %5
5: ; preds = %3
%6 = ptrtoint i8* %1 to i64
%7 = ptrtoint i8* %0 to i64
%8 = sub i64 %6, %7
%9 = getelementptr i8, i8* %0, i64 %8
br label %10
10: ; preds = %5, %14
%11 = phi i8* [ %15, %14 ], [ %0, %5 ]
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, %2
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = getelementptr inbounds i8, i8* %11, i64 1
%16 = icmp eq i8* %15, %1
br i1 %16, label %17, label %10
17: ; preds = %10, %14, %3
%18 = phi i8* [ %0, %3 ], [ %9, %14 ], [ %11, %10 ]
ret i8* %18
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ *StringUtilities_copy_string_part(int /*<<< orphan*/ const *,
                                                     int /*<<< orphan*/);
int /*<<< orphan*/ wcslen(int /*<<< orphan*/ const *);
wchar_t *StringUtilities_copy_string(const wchar_t *string) {
  return StringUtilities_copy_string_part(string, wcslen(string));
}


x86 assembly (clang, -O0):
<StringUtilities_copy_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wcslen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <StringUtilities_copy_string_part@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StringUtilities_copy_string>:
push   %rbx
mov    %rdi,%rbx
call   1030 <wcslen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <StringUtilities_copy_string_part@plt>

LLVM IR (-O0):
define i32* @StringUtilities_copy_string(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @wcslen(i32* %4)
%6 = call i32* @StringUtilities_copy_string_part(i32* %3, i32 %5)
ret i32* %6
}

LLVM IR (-O2):
define i32* @StringUtilities_copy_string(i32* %0) {
%2 = tail call i32 @wcslen(i32* %0)
%3 = tail call i32* @StringUtilities_copy_string_part(i32* %0, i32 %2)
ret i32* %3
}
void initialize_spi(void) {}


x86 assembly (clang, -O0):
<initialize_spi>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_spi>:
ret

LLVM IR (-O0):
define void @initialize_spi() {
ret void
}

LLVM IR (-O2):
define void @initialize_spi() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FreeCharPP(char const **);
void free_char(const char **pointer) { FreeCharPP(pointer); }


x86 assembly (clang, -O0):
<free_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <FreeCharPP@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_char>:
jmp    1030 <FreeCharPP@plt>

LLVM IR (-O0):
define void @free_char(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @FreeCharPP(i8** %3)
ret void
}

LLVM IR (-O2):
define void @free_char(i8** %0) {
%2 = tail call i32 @FreeCharPP(i8** %0)
ret void
}
char biscHighByte(int num) { return (num >> 8) & 0xff; }


x86 assembly (clang, -O0):
<biscHighByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<biscHighByte>:
mov    %edi,%eax
shr    $0x8,%eax
ret

LLVM IR (-O0):
define signext i8 @biscHighByte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
%5 = and i32 %4, 255
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @biscHighByte(i32 %0) {
%2 = lshr i32 %0, 8
%3 = trunc i32 %2 to i8
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ noinline();
void use100() { noinline(); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <noinline@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
jmp    1030 <noinline@plt>

LLVM IR (-O0):
define void @use100() {
%1 = call i32 (...) @noinline()
ret void
}

LLVM IR (-O2):
define void @use100() {
%1 = tail call i32 (...) @noinline()
ret void
}
void default_stack_clean_func(const void *_e) { (void)_e; }


x86 assembly (clang, -O0):
<default_stack_clean_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_stack_clean_func>:
ret

LLVM IR (-O0):
define void @default_stack_clean_func(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @default_stack_clean_func(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GX_SetClipMode(int /*<<< orphan*/);
int /*<<< orphan*/ GX_SetScissor(int const, int const, int const, int const);
void GRRLIB_ClipDrawing(const int x, const int y, const int width,
                        const int height) {
  GX_SetClipMode(0);
  GX_SetScissor(x, y, width, height);
}


x86 assembly (clang, -O0):
<GRRLIB_ClipDrawing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
xor    %edi,%edi
call   1040 <GX_SetClipMode@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <GX_SetScissor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GRRLIB_ClipDrawing>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
call   1040 <GX_SetClipMode@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    %r15d,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <GX_SetScissor@plt>

LLVM IR (-O0):
define void @GRRLIB_ClipDrawing(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = call i32 @GX_SetClipMode(i32 0)
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @GX_SetScissor(i32 %10, i32 %11, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @GRRLIB_ClipDrawing(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @GX_SetClipMode(i32 0)
%6 = tail call i32 @GX_SetScissor(i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void allocationFree(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<allocationFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocationFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @allocationFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @allocationFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int bsd_syscall_getsockopt(int, int, int, void *, int /*<<< orphan*/ *);
int uptcp_getsockopt(int s, int level, int name, void *val,
                     socklen_t *avalsize) {
  return bsd_syscall_getsockopt(s, level, name, val, avalsize);
}


x86 assembly (clang, -O0):
<uptcp_getsockopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
call   1030 <bsd_syscall_getsockopt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uptcp_getsockopt>:
jmp    1030 <bsd_syscall_getsockopt@plt>

LLVM IR (-O0):
define i32 @uptcp_getsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32* %4, i32** %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i8*, i8** %9
%15 = load i32*, i32** %10
%16 = call i32 @bsd_syscall_getsockopt(i32 %11, i32 %12, i32 %13, i8* %14, i32* %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @uptcp_getsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32* %4) {
%6 = tail call i32 @bsd_syscall_getsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32* %4)
ret i32 %6
}
void freeStarStar(double **M, int m) {
  int i;
  for (i = 0; i < m; i++) {
    free(M[i]);
  }
  free(M);
  return;
}


x86 assembly (clang, -O0):
<freeStarStar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <freeStarStar+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <freeStarStar+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeStarStar>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <freeStarStar+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <freeStarStar+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeStarStar(double** %0, i32 %1) {
%3 = alloca double**
%4 = alloca i32
%5 = alloca i32
store double** %0, double*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double**, double*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double*, double** %11, i64 %13
%15 = load double*, double** %14
%16 = bitcast double* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load double**, double*** %3
%22 = bitcast double** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @freeStarStar(double** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double*, double** %0, i64 %7
%9 = bitcast double** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast double** %0 to i8*
tail call void @free(i8* %14)
ret void
}
int RAND_query_egd_bytes(const char *path, unsigned char *buf, int bytes) {
  return (-1);
}


x86 assembly (clang, -O0):
<RAND_query_egd_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAND_query_egd_bytes>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @RAND_query_egd_bytes(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @RAND_query_egd_bytes(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 -1
}
__int128_t quad_fetch_add_relaxed(__int128_t *ptr, __int128_t value) {
  return __atomic_fetch_add(ptr, value, 0);
}


x86 assembly (clang, -O0):
<quad_fetch_add_relaxed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rdi,-0x28(%rbp)
mov    %rcx,-0x38(%rbp)
mov    %rax,-0x40(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x68(%rbp)
mov    %rax,-0x70(%rbp)
mov    -0x70(%rbp),%rsi
mov    -0x68(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <__atomic_fetch_add_16@plt>
mov    %rax,-0x80(%rbp)
mov    %rdx,-0x78(%rbp)
mov    -0x80(%rbp),%rax
mov    -0x78(%rbp),%rcx
mov    %rcx,-0x58(%rbp)
mov    %rax,-0x60(%rbp)
mov    -0x60(%rbp),%rax
mov    -0x58(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quad_fetch_add_relaxed>:
xor    %ecx,%ecx
jmp    1030 <__atomic_fetch_add_16@plt>

LLVM IR (-O0):
define { i64, i64 } @quad_fetch_add_relaxed(i128* %0, i64 %1, i64 %2) {
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128*
%7 = alloca i128
%8 = alloca i128
%9 = alloca i128
%10 = alloca i128
%11 = alloca i128
%12 = bitcast i128* %5 to { i64, i64 }*
%13 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 0
store i64 %1, i64* %13
%14 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 1
store i64 %2, i64* %14
%15 = load i128, i128* %5
store i128* %0, i128** %6
store i128 %15, i128* %7
%16 = load i128*, i128** %6
%17 = load i128, i128* %7
store i128 %17, i128* %8
%18 = bitcast i128* %16 to i8*
%19 = load i128, i128* %8
store i128 %19, i128* %10
%20 = bitcast i128* %10 to { i64, i64 }*
%21 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 0
%22 = load i64, i64* %21
%23 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 1
%24 = load i64, i64* %23
%25 = call { i64, i64 } @__atomic_fetch_add_16(i8* %18, i64 %22, i64 %24, i32 0)
%26 = bitcast i128* %11 to { i64, i64 }*
%27 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 0
%28 = extractvalue { i64, i64 } %25, 0
store i64 %28, i64* %27
%29 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 1
%30 = extractvalue { i64, i64 } %25, 1
store i64 %30, i64* %29
%31 = load i128, i128* %11
store i128 %31, i128* %9
%32 = load i128, i128* %9
store i128 %32, i128* %4
%33 = bitcast i128* %4 to { i64, i64 }*
%34 = load { i64, i64 }, { i64, i64 }* %33
ret { i64, i64 } %34
}

LLVM IR (-O2):
define { i64, i64 } @quad_fetch_add_relaxed(i128* %0, i64 %1, i64 %2) {
%4 = bitcast i128* %0 to i8*
%5 = tail call { i64, i64 } @__atomic_fetch_add_16(i8* %4, i64 %1, i64 %2, i32 0)
ret { i64, i64 } %5
}
/* Variables and functions */
int lnch_main(int, char const *const *);
int main(int argc, char **argv) {
  return lnch_main(argc, (char const *const *)(argv));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <lnch_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <lnch_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @lnch_main(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @lnch_main(i32 %0, i8** %1)
ret i32 %3
}
int atomic_add_int(volatile int *var, int v) {
  int ret;
  asm volatile("lock ;"
               " "
               "xaddl %0, %1"
               " \n\t"
               : "=r"(ret), "=m"(*var)
               : "m"(*var), "0"(v)
               : "cc", "memory");
  return ret + v;
}


x86 assembly (clang, -O0):
<atomic_add_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%eax
lock xadd %eax,(%rcx)
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_add_int>:
mov    %esi,%eax
lock xadd %eax,(%rdi)
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @atomic_add_int(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32*, i32** %3
%8 = load i32, i32* %4
%9 = call i32 asm sideeffect "lock ; xaddl $0, $1 \0A\09", "=r,=*m,*m,0,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %6, i32* elementtype(i32) %7, i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @atomic_add_int(i32* %0, i32 %1) {
%3 = tail call i32 asm sideeffect "lock ; xaddl $0, $1 \0A\09", "=r,=*m,*m,0,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32* elementtype(i32) %0, i32 %1)
%4 = add nsw i32 %3, %1
ret i32 %4
}
unsigned int reg_read_32(volatile unsigned int *addr) { return (*addr); }


x86 assembly (clang, -O0):
<reg_read_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_read_32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @reg_read_32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load volatile i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @reg_read_32(i32* %0) {
%2 = load volatile i32, i32* %0
ret i32 %2
}
/* Variables and functions */
int __bsrd(int);
int test__bsrd(int X) { return __bsrd(X); }


x86 assembly (clang, -O0):
<test__bsrd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__bsrd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__bsrd>:
jmp    1030 <__bsrd@plt>

LLVM IR (-O0):
define i32 @test__bsrd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__bsrd(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test__bsrd(i32 %0) {
%2 = tail call i32 @__bsrd(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fterm();
int /*<<< orphan*/ fterms();
void eterm() {
  fterm();
  fterms();
}


x86 assembly (clang, -O0):
<eterm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fterm@plt>
mov    $0x0,%al
call   1040 <fterms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eterm>:
push   %rax
xor    %eax,%eax
call   1030 <fterm@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <fterms@plt>

LLVM IR (-O0):
define void @eterm() {
%1 = call i32 (...) @fterm()
%2 = call i32 (...) @fterms()
ret void
}

LLVM IR (-O2):
define void @eterm() {
%1 = tail call i32 (...) @fterm()
%2 = tail call i32 (...) @fterms()
ret void
}
void CtpRoutingEngineP$0$Routing$noRoute(void) {
  CtpForwardingEngineP$0$UnicastNameFreeRouting$noRoute();
}


x86 assembly (clang, -O0):
<CtpRoutingEngineP$0$Routing$noRoute>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CtpForwardingEngineP$0$UnicastNameFreeRouting$noRoute@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CtpRoutingEngineP$0$Routing$noRoute>:
xor    %eax,%eax
jmp    1030 <CtpForwardingEngineP$0$UnicastNameFreeRouting$noRoute@plt>

LLVM IR (-O0):
define void @"CtpRoutingEngineP$0$Routing$noRoute"() {
%1 = call i32 (...) @"CtpForwardingEngineP$0$UnicastNameFreeRouting$noRoute"()
ret void
}

LLVM IR (-O2):
define void @"CtpRoutingEngineP$0$Routing$noRoute"() {
%1 = tail call i32 (...) @"CtpForwardingEngineP$0$UnicastNameFreeRouting$noRoute"()
ret void
}
/* Type definitions */
struct b6_splay {
  int dummy;
};
struct b6_dref {
  int dummy;
};

/* Variables and functions */
int __b6_splay_is_thread(struct b6_dref *);
struct b6_dref *b6_splay_root(struct b6_splay const *);
int b6_splay_empty(const struct b6_splay *splay) {
  struct b6_dref *root = b6_splay_root(splay);
  return (!root) | __b6_splay_is_thread(root);
}


x86 assembly (clang, -O0):
<b6_splay_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <b6_splay_root@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <__b6_splay_is_thread@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
or     %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b6_splay_empty>:
push   %rbx
call   1040 <b6_splay_root@plt>
xor    %ebx,%ebx
test   %rax,%rax
sete   %bl
mov    %rax,%rdi
call   1030 <__b6_splay_is_thread@plt>
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.b6_splay = type { i32 }
%struct.b6_dref = type { i32 }
define i32 @b6_splay_empty(%struct.b6_splay* %0) {
%2 = alloca %struct.b6_splay*
%3 = alloca %struct.b6_dref*
store %struct.b6_splay* %0, %struct.b6_splay** %2
%4 = load %struct.b6_splay*, %struct.b6_splay** %2
%5 = call %struct.b6_dref* @b6_splay_root(%struct.b6_splay* %4)
store %struct.b6_dref* %5, %struct.b6_dref** %3
%6 = load %struct.b6_dref*, %struct.b6_dref** %3
%7 = icmp ne %struct.b6_dref* %6, null
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = load %struct.b6_dref*, %struct.b6_dref** %3
%11 = call i32 @__b6_splay_is_thread(%struct.b6_dref* %10)
%12 = or i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
%struct.b6_splay = type { i32 }
%struct.b6_dref = type { i32 }
define i32 @b6_splay_empty(%struct.b6_splay* %0) {
%2 = tail call %struct.b6_dref* @b6_splay_root(%struct.b6_splay* %0)
%3 = icmp eq %struct.b6_dref* %2, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @__b6_splay_is_thread(%struct.b6_dref* %2)
%6 = or i32 %5, %4
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int8_t;
struct kore_buf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ kore_buf_append(struct kore_buf *, int /*<<< orphan*/ *,
                                   size_t);
int /*<<< orphan*/ *kore_buf_release(struct kore_buf *, size_t *);
int /*<<< orphan*/ kore_mem_free(int /*<<< orphan*/ *);
void kore_buf_appendb(struct kore_buf *buf, struct kore_buf *src) {
  u_int8_t *d;
  size_t len;
  d = kore_buf_release(src, &len);
  kore_buf_append(buf, d, len);
  kore_mem_free(d);
}


x86 assembly (clang, -O0):
<kore_buf_appendb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <kore_buf_release@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <kore_buf_append@plt>
mov    -0x18(%rbp),%rdi
call   1050 <kore_mem_free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kore_buf_appendb>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rax
mov    %rdi,%r14
mov    %rsp,%rsi
mov    %rax,%rdi
call   1030 <kore_buf_release@plt>
mov    %rax,%rbx
mov    (%rsp),%rdx
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <kore_buf_append@plt>
mov    %rbx,%rdi
call   1050 <kore_mem_free@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.kore_buf = type { i32 }
define void @kore_buf_appendb(%struct.kore_buf* %0, %struct.kore_buf* %1) {
%3 = alloca %struct.kore_buf*
%4 = alloca %struct.kore_buf*
%5 = alloca i32*
%6 = alloca i64
store %struct.kore_buf* %0, %struct.kore_buf** %3
store %struct.kore_buf* %1, %struct.kore_buf** %4
%7 = load %struct.kore_buf*, %struct.kore_buf** %4
%8 = call i32* @kore_buf_release(%struct.kore_buf* %7, i64* %6)
store i32* %8, i32** %5
%9 = load %struct.kore_buf*, %struct.kore_buf** %3
%10 = load i32*, i32** %5
%11 = load i64, i64* %6
%12 = call i32 @kore_buf_append(%struct.kore_buf* %9, i32* %10, i64 %11)
%13 = load i32*, i32** %5
%14 = call i32 @kore_mem_free(i32* %13)
ret void
}

LLVM IR (-O2):
%struct.kore_buf = type { i32 }
define void @kore_buf_appendb(%struct.kore_buf* %0, %struct.kore_buf* %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i32* @kore_buf_release(%struct.kore_buf* %1, i64* %3)
%6 = load i64, i64* %3
%7 = call i32 @kore_buf_append(%struct.kore_buf* %0, i32* %5, i64 %6)
%8 = call i32 @kore_mem_free(i32* %5)
ret void
}
int CPU_SUBTYPE_INTEL(int Family, int Model) { return Family | (Model << 4); }


x86 assembly (clang, -O0):
<CPU_SUBTYPE_INTEL>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CPU_SUBTYPE_INTEL>:
mov    %esi,%eax
shl    $0x4,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @CPU_SUBTYPE_INTEL(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 4
%8 = or i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @CPU_SUBTYPE_INTEL(i32 %0, i32 %1) {
%3 = shl i32 %1, 4
%4 = or i32 %3, %0
ret i32 %4
}
void success_msg(int result, const char *command) {}


x86 assembly (clang, -O0):
<success_msg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<success_msg>:
ret

LLVM IR (-O0):
define void @success_msg(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @success_msg(i32 %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
float sqrtf(float);
float r_sqrt(float *x) { return (sqrtf(*x)); }


x86 assembly (clang, -O0):
<r_sqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r_sqrt>:
movss  (%rdi),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1121 <r_sqrt+0x11>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @r_sqrt(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = call float @sqrtf(float %4)
ret float %5
}

LLVM IR (-O2):
define float @r_sqrt(float* nocapture %0) {
%2 = load float, float* %0
%3 = tail call float @sqrtf(float %2)
ret float %3
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t prv_lte_real_fn(double a, double b) { return a <= b ? -1 : 0; }


x86 assembly (clang, -O0):
<prv_lte_real_fn>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
xor    %eax,%eax
mov    $0xffffffff,%ecx
ucomisd %xmm1,%xmm0
cmovae %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_lte_real_fn>:
xor    %eax,%eax
ucomisd %xmm0,%xmm1
adc    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @prv_lte_real_fn(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ole double %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @prv_lte_real_fn(double %0, double %1) {
%3 = fcmp ole double %0, %1
%4 = sext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void mov_reg64_preg64x8preg64(int reg1, int reg2, int reg3) {
  put8(0x48);
  put8(0x8B);
  put8((reg1 << 3) | 4);
  put8(0xC0 | (reg2 << 3) | reg3);
}


x86 assembly (clang, -O0):
<mov_reg64_preg64x8preg64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0x4,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0xc(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg64_preg64x8preg64>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0x8b,%edi
call   1030 <put8@plt>
lea    0x4(,%rbx,8),%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     %r14d,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_reg64_preg64x8preg64(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @put8(i32 72)
%8 = call i32 @put8(i32 139)
%9 = load i32, i32* %4
%10 = shl i32 %9, 3
%11 = or i32 %10, 4
%12 = call i32 @put8(i32 %11)
%13 = load i32, i32* %5
%14 = shl i32 %13, 3
%15 = or i32 192, %14
%16 = load i32, i32* %6
%17 = or i32 %15, %16
%18 = call i32 @put8(i32 %17)
ret void
}

LLVM IR (-O2):
define void @mov_reg64_preg64x8preg64(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @put8(i32 72)
%5 = tail call i32 @put8(i32 139)
%6 = shl i32 %0, 3
%7 = or i32 %6, 4
%8 = tail call i32 @put8(i32 %7)
%9 = shl i32 %1, 3
%10 = or i32 %9, %2
%11 = or i32 %10, 192
%12 = tail call i32 @put8(i32 %11)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ econais_ec19d_binary_file_read(char *, char **, size_t *,
                                                  int *);
void ext_configuration_read(char **buffer, size_t *buffer_size,
                            bool *needs_deallocation) {
  econais_ec19d_binary_file_read("kaa_configuration.bin", buffer, buffer_size,
                                 needs_deallocation);
}


x86 assembly (clang, -O0):
<ext_configuration_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xec9(%rip),%rdi
call   1030 <econais_ec19d_binary_file_read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext_configuration_read>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee0(%rip),%rdi
jmp    1030 <econais_ec19d_binary_file_read@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"kaa_configuration.bin\00"
define void @ext_configuration_read(i8** %0, i64* %1, i32* %2) {
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i32*
store i8** %0, i8*** %4
store i64* %1, i64** %5
store i32* %2, i32** %6
%7 = load i8**, i8*** %4
%8 = load i64*, i64** %5
%9 = load i32*, i32** %6
%10 = call i32 @econais_ec19d_binary_file_read(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8** %7, i64* %8, i32* %9)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"kaa_configuration.bin\00"
define void @ext_configuration_read(i8** %0, i64* %1, i32* %2) {
%4 = tail call i32 @econais_ec19d_binary_file_read(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8** %0, i64* %1, i32* %2)
ret void
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
scalar_t__ syscall(int /*<<< orphan*/, struct perf_event_attr *,
                   int /*<<< orphan*/, int, int, unsigned long);
int perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu,
                    int group_fd, unsigned long flags) {
  return (int)syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd,
                      flags);
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load i32, i32* @__NR_perf_event_open
%12 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i64, i64* %10
%17 = call i64 @syscall(i32 %11, %struct.perf_event_attr* %12, i32 %13, i32 %14, i32 %15, i64 %16)
%18 = trunc i64 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @__NR_perf_event_open
%7 = tail call i64 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
%8 = trunc i64 %7 to i32
ret i32 %8
}