xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ COND_HI();
int /*<<< orphan*/ EA_A7_PD_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_shi_8_pd7(void) {
  m68ki_write_8(EA_A7_PD_8(), COND_HI() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_shi_8_pd7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PD_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_HI@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_shi_8_pd7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PD_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_HI@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_shi_8_pd7() {
%1 = call i32 (...) @EA_A7_PD_8()
%2 = call i64 (...) @COND_HI()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_shi_8_pd7() {
%1 = tail call i32 (...) @EA_A7_PD_8()
%2 = tail call i64 (...) @COND_HI()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMcs51GeneralIOC__P10__set();
void ReverseGPIOP__0__In__set(void) { HplMcs51GeneralIOC__P10__set(); }


x86 assembly (clang, -O0):
<ReverseGPIOP__0__In__set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMcs51GeneralIOC__P10__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReverseGPIOP__0__In__set>:
xor    %eax,%eax
jmp    1030 <HplMcs51GeneralIOC__P10__set@plt>

LLVM IR (-O0):
define void @ReverseGPIOP__0__In__set() {
%1 = call i32 (...) @HplMcs51GeneralIOC__P10__set()
ret void
}

LLVM IR (-O2):
define void @ReverseGPIOP__0__In__set() {
%1 = tail call i32 (...) @HplMcs51GeneralIOC__P10__set()
ret void
}
void ag7240_phy_duplex(int unit, int *duplex) {
  {}
}


x86 assembly (clang, -O0):
<ag7240_phy_duplex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ag7240_phy_duplex>:
ret

LLVM IR (-O0):
define void @ag7240_phy_duplex(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @ag7240_phy_duplex(i32 %0, i32* nocapture %1) {
ret void
}
void do_nothing(const char *fmt, ...) {}


x86 assembly (clang, -O0):
<do_nothing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_nothing>:
ret

LLVM IR (-O0):
define void @do_nothing(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @do_nothing(i8* nocapture %0, ...) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SHA256_InitState(uint32_t *state) {
  state[0] = 0x6A09E667;
  state[1] = 0xBB67AE85;
  state[2] = 0x3C6EF372;
  state[3] = 0xA54FF53A;
  state[4] = 0x510E527F;
  state[5] = 0x9B05688C;
  state[6] = 0x1F83D9AB;
  state[7] = 0x5BE0CD19;
}


x86 assembly (clang, -O0):
<SHA256_InitState>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x6a09e667,(%rax)
mov    -0x8(%rbp),%rax
movl   $0xbb67ae85,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x3c6ef372,0x8(%rax)
mov    -0x8(%rbp),%rax
movl   $0xa54ff53a,0xc(%rax)
mov    -0x8(%rbp),%rax
movl   $0x510e527f,0x10(%rax)
mov    -0x8(%rbp),%rax
movl   $0x9b05688c,0x14(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1f83d9ab,0x18(%rax)
mov    -0x8(%rbp),%rax
movl   $0x5be0cd19,0x1c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA256_InitState>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movaps 0xeff(%rip),%xmm0
movups %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @SHA256_InitState(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 1779033703, i32* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32 -1150833019, i32* %6
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 1013904242, i32* %8
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 3
store i32 -1521486534, i32* %10
%11 = load i32*, i32** %2
%12 = getelementptr inbounds i32, i32* %11, i64 4
store i32 1359893119, i32* %12
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 5
store i32 -1694144372, i32* %14
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 6
store i32 528734635, i32* %16
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 7
store i32 1541459225, i32* %18
ret void
}

LLVM IR (-O2):
define void @SHA256_InitState(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 1779033703, i32 -1150833019, i32 1013904242, i32 -1521486534>, <4 x i32>* %2
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = bitcast i32* %3 to <4 x i32>*
store <4 x i32> <i32 1359893119, i32 -1694144372, i32 528734635, i32 1541459225>, <4 x i32>* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_pass();
int main() {
  do_pass();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <do_pass@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <do_pass@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @do_pass()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @do_pass()
ret i32 0
}
int main() {
  for (int i = 0; i < 10; ++i) {
    --i;
    ++i;
  }
  for (int i = 0; i < 10; ++i)
    --i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    113c <main+0x3c>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
movl   $0x0,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    1164 <main+0x64>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1143 <main+0x43>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %12, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, -1
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %4
15: ; preds = %4
store i32 0, i32* %3
br label %16
16: ; preds = %22, %15
%17 = load i32, i32* %3
%18 = icmp slt i32 %17, 10
br i1 %18, label %19, label %25
19: ; preds = %16
%20 = load i32, i32* %3
%21 = add nsw i32 %20, -1
store i32 %21, i32* %3
br label %22
22: ; preds = %19
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %16
25: ; preds = %16
%26 = load i32, i32* %1
ret i32 %26
}

LLVM IR (-O2):
/* Variables and functions */
scalar_t__ sgetpwent(char const *);
void *passwd_parse(const char *line) { return (void *)sgetpwent(line); }


x86 assembly (clang, -O0):
<passwd_parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sgetpwent@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<passwd_parse>:
jmp    1030 <sgetpwent@plt>

LLVM IR (-O0):
define i8* @passwd_parse(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @sgetpwent(i8* %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @passwd_parse(i8* %0) {
%2 = tail call i64 @sgetpwent(i8* %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
char *langRomTypeTc8566afFdc() { return "TC8566AF Disk Controller"; }


x86 assembly (clang, -O0):
<langRomTypeTc8566afFdc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeTc8566afFdc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [25 x i8] c"TC8566AF Disk Controller\00"
define i8* @langRomTypeTc8566afFdc() {
ret i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [25 x i8] c"TC8566AF Disk Controller\00"
define i8* @langRomTypeTc8566afFdc() {
ret i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
}
unsigned short TH_CONTROL_PHASE(volatile unsigned char *pb) {
  unsigned short val;
  *pb = 0x00;
  asm volatile("nop");
  asm volatile("nop");
  val = *pb;
  *pb = 0x40;
  val <<= 8;
  val |= *pb;
  return val;
}


x86 assembly (clang, -O0):
<TH_CONTROL_PHASE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
nop
nop
mov    -0x8(%rbp),%rax
mov    (%rax),%al
movzbl %al,%eax
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x40,(%rax)
movzwl -0xa(%rbp),%eax
shl    $0x8,%eax
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
movzbl %al,%ecx
movzwl -0xa(%rbp),%eax
or     %ecx,%eax
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TH_CONTROL_PHASE>:
movb   $0x0,(%rdi)
nop
nop
movzbl (%rdi),%ecx
movb   $0x40,(%rdi)
shl    $0x8,%ecx
movzbl (%rdi),%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @TH_CONTROL_PHASE(i8* %0) {
%2 = alloca i8*
%3 = alloca i16
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store volatile i8 0, i8* %4
%5 = load i8*, i8** %2
%6 = load volatile i8, i8* %5
%7 = zext i8 %6 to i16
store i16 %7, i16* %3
%8 = load i8*, i8** %2
store volatile i8 64, i8* %8
%9 = load i16, i16* %3
%10 = zext i16 %9 to i32
%11 = shl i32 %10, 8
%12 = trunc i32 %11 to i16
store i16 %12, i16* %3
%13 = load i8*, i8** %2
%14 = load volatile i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i16, i16* %3
%17 = zext i16 %16 to i32
%18 = or i32 %17, %15
%19 = trunc i32 %18 to i16
store i16 %19, i16* %3
%20 = load i16, i16* %3
ret i16 %20
}

LLVM IR (-O2):
define zeroext i16 @TH_CONTROL_PHASE(i8* %0) {
store volatile i8 0, i8* %0
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%2 = load volatile i8, i8* %0
store volatile i8 64, i8* %0
%3 = zext i8 %2 to i16
%4 = shl nuw i16 %3, 8
%5 = load volatile i8, i8* %0
%6 = zext i8 %5 to i16
%7 = or i16 %4, %6
ret i16 %7
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
char *substr_my(char *str, int start, int end) {
  char substr[100];
  memcpy(substr, &str[start], end);
  substr[end] = '\0';
  return substr;
}


x86 assembly (clang, -O0):
<substr_my>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
lea    -0x80(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rax
add    %rax,%rsi
mov    -0x10(%rbp),%edx
call   1030 <memcpy@plt>
movslq -0x10(%rbp),%rax
movb   $0x0,-0x80(%rbp,%rax,1)
lea    -0x80(%rbp),%rax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<substr_my>:
push   %rbx
sub    $0x70,%rsp
movslq %esi,%rsi
add    %rdi,%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <memcpy@plt>
mov    %rbx,%rax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @substr_my(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca [100 x i8]
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %7, i64 0, i64 0
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i32, i32* %6
%14 = call i32 @memcpy(i8* %8, i8* %12, i32 %13)
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds [100 x i8], [100 x i8]* %7, i64 0, i64 %16
store i8 0, i8* %17
%18 = getelementptr inbounds [100 x i8], [100 x i8]* %7, i64 0, i64 0
ret i8* %18
}

LLVM IR (-O2):
define i8* @substr_my(i8* %0, i32 %1, i32 %2) {
%4 = alloca [100 x i8]
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %4, i64 0, i64 0
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = call i32 @memcpy(i8* %5, i8* %7, i32 %2)
ret i8* %5
}
int deletePasswd(const char *username, char *passwd) { return 0; }


x86 assembly (clang, -O0):
<deletePasswd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deletePasswd>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @deletePasswd(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @deletePasswd(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
int aa_pro_ctr_a00(int chan, unsigned char *buf, int len) {
  hu_log(6, "hu_aap", __func__, "!!!!!!!!");
  return (-1);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x6,%edi
lea    0xed2(%rip),%rsi
lea    0xed2(%rip),%rdx
lea    0xeda(%rip),%rcx
mov    $0x0,%al
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
lea    0xee8(%rip),%rsi
lea    0xee8(%rip),%rdx
lea    0xef0(%rip),%rcx
mov    $0x6,%edi
xor    %eax,%eax
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a00 = [15 x i8] c"aa_pro_ctr_a00\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a00(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a00, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a00 = [15 x i8] c"aa_pro_ctr_a00\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a00(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a00, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(scalar_t__ volatile);
void UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT(_UARTBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x00000038))) |= ui32IntFlags;
}


x86 assembly (clang, -O0):
<UARTIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x38(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x38(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTIntEnable>:
sub    $0x18,%rsp
mov    %rdi,0x8(%rsp)
mov    %rsi,0x10(%rsp)
mov    0x8(%rsp),%rdi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    0x10(%rsp),%rax
mov    0x8(%rsp),%rcx
or     %rax,0x38(%rcx)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @UARTIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
%6 = call i32 @_UARTBaseValid(i64 %5)
%7 = call i32 @ASSERT(i32 %6)
%8 = load volatile i64, i64* %4
%9 = load volatile i64, i64* %3
%10 = add nsw i64 %9, 56
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}

LLVM IR (-O2):
define void @UARTIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
%6 = tail call i32 @_UARTBaseValid(i64 %5)
%7 = tail call i32 @ASSERT(i32 %6)
%8 = load volatile i64, i64* %4
%9 = load volatile i64, i64* %3
%10 = add nsw i64 %9, 56
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}
double max3(double val1, double val2, double val3) {
  double result = val1;
  if (val2 > result)
    result = val2;
  if (val3 > result)
    result = val3;
  return result;
}


x86 assembly (clang, -O0):
<max3>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1137 <max3+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1151 <max3+0x51>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max3>:
maxsd  %xmm0,%xmm1
maxsd  %xmm1,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @max3(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
store double %8, double* %7
%9 = load double, double* %5
%10 = load double, double* %7
%11 = fcmp ogt double %9, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load double, double* %5
store double %13, double* %7
br label %14
14: ; preds = %12, %3
%15 = load double, double* %6
%16 = load double, double* %7
%17 = fcmp ogt double %15, %16
br i1 %17, label %18, label %20
18: ; preds = %14
%19 = load double, double* %6
store double %19, double* %7
br label %20
20: ; preds = %18, %14
%21 = load double, double* %7
ret double %21
}

LLVM IR (-O2):
define double @max3(double %0, double %1, double %2) {
%4 = fcmp ogt double %1, %0
%5 = select i1 %4, double %1, double %0
%6 = fcmp olt double %5, %2
%7 = select i1 %6, double %2, double %5
ret double %7
}
char *strcpy(char *s1, const char *s2) {
  char *dst = s1;
  const char *src = s2;
  while ((*dst++ = *src++) != '\0')
    ;
  return s1;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     114f <strcpy+0x4f>
jmp    111c <strcpy+0x1c>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
br label %9
9: ; preds = %17, %2
%10 = load i8*, i8** %6
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %6
%12 = load i8, i8* %10
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
store i8 %12, i8* %13
%15 = sext i8 %12 to i32
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %9
br label %9
18: ; preds = %9
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
print_bmp_file_header(struct bmpfileheader *file_header) {}


x86 assembly (clang, -O0):
<print_bmp_file_header>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_bmp_file_header>:
ret

LLVM IR (-O0):
%struct.bmpfileheader = type opaque
define i32 @print_bmp_file_header(%struct.bmpfileheader* %0) {
%2 = alloca i32
%3 = alloca %struct.bmpfileheader*
store %struct.bmpfileheader* %0, %struct.bmpfileheader** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
%struct.bmpfileheader = type opaque
define i32 @print_bmp_file_header(%struct.bmpfileheader* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x4f() {
  Assert_real((isxdigit(79) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              400, ("isxdigit should be 0 for O"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x4f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4f,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x190,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x4f>:
push   %rax
mov    $0x4f,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x190,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for O\00"
define void @t_isxdigit_0x4f() {
%1 = call i64 @isxdigit(i32 79)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 400, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for O\00"
define void @t_isxdigit_0x4f() {
%1 = tail call i64 @isxdigit(i32 79)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 400, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int cbuf(int, int, int);
cbuf2(int f, int n) { return (cbuf(f, n, 2)); }


x86 assembly (clang, -O0):
<cbuf2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1030 <cbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf2>:
mov    $0x2,%edx
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @cbuf(i32 %5, i32 %6, i32 2)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cbuf2(i32 %0, i32 %1) {
%3 = tail call i32 @cbuf(i32 %0, i32 %1, i32 2)
ret i32 %3
}
void tcp_syn(struct Squirrel *squirrel, struct NetFrame *frame) {
  squirrel = (squirrel);
  frame = (frame);
}


x86 assembly (clang, -O0):
<tcp_syn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_syn>:
ret

LLVM IR (-O0):
%struct.Squirrel = type opaque
%struct.NetFrame = type opaque
define void @tcp_syn(%struct.Squirrel* %0, %struct.NetFrame* %1) {
%3 = alloca %struct.Squirrel*
%4 = alloca %struct.NetFrame*
store %struct.Squirrel* %0, %struct.Squirrel** %3
store %struct.NetFrame* %1, %struct.NetFrame** %4
%5 = load %struct.Squirrel*, %struct.Squirrel** %3
store %struct.Squirrel* %5, %struct.Squirrel** %3
%6 = load %struct.NetFrame*, %struct.NetFrame** %4
store %struct.NetFrame* %6, %struct.NetFrame** %4
ret void
}

LLVM IR (-O2):
%struct.Squirrel = type opaque
%struct.NetFrame = type opaque
define void @tcp_syn(%struct.Squirrel* nocapture %0, %struct.NetFrame* nocapture %1) {
ret void
}
void short_val_compare_and_swap(short *p, int i, int j, short *q) {
  *q = __sync_val_compare_and_swap(p, i, j);
}


x86 assembly (clang, -O0):
<short_val_compare_and_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%ax
mov    -0x10(%rbp),%dx
lock cmpxchg %dx,(%rcx)
mov    %ax,%cx
sete   %al
mov    -0x18(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_val_compare_and_swap>:
mov    %esi,%eax
lock cmpxchg %dx,(%rdi)
mov    %ax,(%rcx)
ret

LLVM IR (-O0):
define void @short_val_compare_and_swap(i16* %0, i32 %1, i32 %2, i16* %3) {
%5 = alloca i16*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i16*
store i16* %0, i16** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i16* %3, i16** %8
%9 = load i16*, i16** %5
%10 = load i32, i32* %6
%11 = trunc i32 %10 to i16
%12 = load i32, i32* %7
%13 = trunc i32 %12 to i16
%14 = cmpxchg i16* %9, i16 %11, i16 %13 seq_cst seq_cst
%15 = extractvalue { i16, i1 } %14, 0
%16 = load i16*, i16** %8
store i16 %15, i16* %16
ret void
}

LLVM IR (-O2):
define void @short_val_compare_and_swap(i16* nocapture %0, i32 %1, i32 %2, i16* nocapture writeonly %3) {
%5 = trunc i32 %1 to i16
%6 = trunc i32 %2 to i16
%7 = cmpxchg i16* %0, i16 %5, i16 %6 seq_cst seq_cst
%8 = extractvalue { i16, i1 } %7, 0
store i16 %8, i16* %3
ret void
}
long ksgn(long a) {
  if (a > 0)
    return 1;
  if (a < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<ksgn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jle    1120 <ksgn+0x20>
movq   $0x1,-0x8(%rbp)
jmp    1140 <ksgn+0x40>
cmpq   $0x0,-0x10(%rbp)
jge    1138 <ksgn+0x38>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1140 <ksgn+0x40>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ksgn>:
mov    %rdi,%rcx
sar    $0x3f,%rcx
test   %rdi,%rdi
mov    $0x1,%eax
cmovle %rcx,%rax
ret

LLVM IR (-O0):
define i64 @ksgn(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %12
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 -1, i64* %2
br label %12
11: ; preds = %7
store i64 0, i64* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
define i64 @ksgn(i64 %0) {
%2 = ashr i64 %0, 63
%3 = icmp slt i64 %0, 1
%4 = select i1 %3, i64 %2, i64 1
ret i64 %4
}
int crStrlen(const char *str) {
  const char *temp;
  if (!str)
    return 0;
  for (temp = str; *temp; temp++)
    ;
  return temp - str;
}


x86 assembly (clang, -O0):
<crStrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <crStrlen+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1158 <crStrlen+0x58>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     114a <crStrlen+0x4a>
jmp    1139 <crStrlen+0x39>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <crStrlen+0x27>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crStrlen>:
test   %rdi,%rdi
je     111d <crStrlen+0x1d>
mov    $0xffffffff,%eax
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <crStrlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @crStrlen(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %25
8: ; preds = %1
%9 = load i8*, i8** %3
store i8* %9, i8** %4
br label %10
10: ; preds = %15, %8
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %10
br label %15
15: ; preds = %14
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
br label %10
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = load i8*, i8** %3
%21 = ptrtoint i8* %19 to i64
%22 = ptrtoint i8* %20 to i64
%23 = sub i64 %21, %22
%24 = trunc i64 %23 to i32
store i32 %24, i32* %2
br label %25
25: ; preds = %18, %7
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @crStrlen(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i8* [ %7, %3 ], [ %0, %1 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = ptrtoint i8* %4 to i64
%10 = ptrtoint i8* %0 to i64
%11 = sub i64 %9, %10
%12 = trunc i64 %11 to i32
br label %13
13: ; preds = %1, %8
%14 = phi i32 [ %12, %8 ], [ 0, %1 ]
ret i32 %14
}
/* Type definitions */
struct slist_t {
  int dummy;
};

/* Variables and functions */
struct slist_t *config_split_line(char const *, char *);
struct slist_t *passcmd_create_list(const char *list_str) {
  if (!list_str) {
    return (struct slist_t *)0;
  }
  return config_split_line(list_str, " \t");
}


x86 assembly (clang, -O0):
<passcmd_create_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <passcmd_create_list+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1148 <passcmd_create_list+0x38>
mov    -0x10(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1030 <config_split_line@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<passcmd_create_list>:
test   %rdi,%rdi
je     1121 <passcmd_create_list+0x11>
lea    0xee4(%rip),%rsi
jmp    1030 <config_split_line@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.slist_t = type { i32 }
@.str = [3 x i8] c" \09\00"
define %struct.slist_t* @passcmd_create_list(i8* %0) {
%2 = alloca %struct.slist_t*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store %struct.slist_t* null, %struct.slist_t** %2
br label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call %struct.slist_t* @config_split_line(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store %struct.slist_t* %9, %struct.slist_t** %2
br label %10
10: ; preds = %7, %6
%11 = load %struct.slist_t*, %struct.slist_t** %2
ret %struct.slist_t* %11
}

LLVM IR (-O2):
%struct.slist_t = type { i32 }
@.str = [3 x i8] c" \09\00"
define %struct.slist_t* @passcmd_create_list(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call %struct.slist_t* @config_split_line(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %1, %3
%6 = phi %struct.slist_t* [ %4, %3 ], [ null, %1 ]
ret %struct.slist_t* %6
}
void radio_df_mode_set_aoa(void) {}


x86 assembly (clang, -O0):
<radio_df_mode_set_aoa>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_df_mode_set_aoa>:
ret

LLVM IR (-O0):
define void @radio_df_mode_set_aoa() {
ret void
}

LLVM IR (-O2):
define void @radio_df_mode_set_aoa() {
ret void
}
/* Variables and functions */
scalar_t__ roadmap_horizontal_screen_orientation();
int is_screen_wide() { return (int)roadmap_horizontal_screen_orientation(); }


x86 assembly (clang, -O0):
<is_screen_wide>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <roadmap_horizontal_screen_orientation@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_screen_wide>:
xor    %eax,%eax
jmp    1030 <roadmap_horizontal_screen_orientation@plt>

LLVM IR (-O0):
define i32 @is_screen_wide() {
%1 = call i64 (...) @roadmap_horizontal_screen_orientation()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @is_screen_wide() {
%1 = tail call i64 (...) @roadmap_horizontal_screen_orientation()
%2 = trunc i64 %1 to i32
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void nocrash_fputc() {
  FILE *f;
  f = fopen("this_file_doesnt_exist", "r");
  if (f) {
    fputc(42, f);
    fclose(f);
  }
}


x86 assembly (clang, -O0):
<nocrash_fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    0xed1(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1171 <nocrash_fputc+0x41>
mov    -0x8(%rbp),%rsi
mov    $0x2a,%edi
call   1040 <fputc@plt>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nocrash_fputc>:
push   %rbx
lea    0xec8(%rip),%rdi
lea    0xed8(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     1162 <nocrash_fputc+0x32>
mov    %rax,%rbx
mov    $0x2a,%edi
mov    %rax,%rsi
call   1040 <fputc@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <fclose@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"this_file_doesnt_exist\00"
@.str.1 = [2 x i8] c"r\00"
define void @nocrash_fputc() {
%1 = alloca i32*
%2 = call i32* @fopen(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = load i32*, i32** %1
%7 = call i32 @fputc(i32 42, i32* %6)
%8 = load i32*, i32** %1
%9 = call i32 @fclose(i32* %8)
br label %10
10: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"this_file_doesnt_exist\00"
@.str.1 = [2 x i8] c"r\00"
define void @nocrash_fputc() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32 @fputc(i32 42, i32* %1)
%5 = tail call i32 @fclose(i32* %1)
br label %6
6: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ read(int, char *, int);
int /*<<< orphan*/ suspend_close(int);
int suspend_open();
void suspend_abort(int handle) {
  int h = handle;
  char c;
  if (handle < 0)
    h = suspend_open();
  read(h, &c, 1);
  if (handle < 0)
    suspend_close(h);
}


x86 assembly (clang, -O0):
<suspend_abort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1155 <suspend_abort+0x25>
mov    $0x0,%al
call   1050 <suspend_open@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x9(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
cmpl   $0x0,-0x4(%rbp)
jge    1178 <suspend_abort+0x48>
mov    -0x8(%rbp),%edi
call   1030 <suspend_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<suspend_abort>:
push   %rbx
sub    $0x10,%rsp
test   %edi,%edi
js     114e <suspend_abort+0x1e>
lea    0xf(%rsp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
call   1050 <suspend_open@plt>
mov    %eax,%ebx
lea    0xf(%rsp),%rsi
mov    %eax,%edi
mov    $0x1,%edx
call   1040 <read@plt>
mov    %ebx,%edi
add    $0x10,%rsp
pop    %rbx
jmp    1030 <suspend_close@plt>

LLVM IR (-O0):
define void @suspend_abort(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @suspend_open()
store i32 %9, i32* %3
br label %10
10: ; preds = %8, %1
%11 = load i32, i32* %3
%12 = call i32 @read(i32 %11, i8* %4, i32 1)
%13 = load i32, i32* %2
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i32, i32* %3
%17 = call i32 @suspend_close(i32 %16)
br label %18
18: ; preds = %15, %10
ret void
}

LLVM IR (-O2):
define void @suspend_abort(i32 %0) {
%2 = alloca i8
%3 = icmp slt i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = call i32 @read(i32 %0, i8* %2, i32 1)
br label %10
6: ; preds = %1
%7 = tail call i32 (...) @suspend_open()
%8 = call i32 @read(i32 %7, i8* %2, i32 1)
%9 = tail call i32 @suspend_close(i32 %7)
br label %10
10: ; preds = %4, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_f1(int *);
int /*<<< orphan*/ other_func1(int, int /*<<< orphan*/);
int main() {
  int *p;
  my_f1(p);
  other_func1(1, 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1040 <my_f1@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <other_func1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <my_f1@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <other_func1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = call i32 @my_f1(i32* %2)
%4 = call i32 @other_func1(i32 1, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @my_f1(i32* undef)
%2 = tail call i32 @other_func1(i32 1, i32 0)
ret i32 0
}
unsigned int str2fourcc(char buf[4]) {
  return (buf[0]) + (buf[1] << 8) + (buf[2] << 16) + (buf[3] << 24);
}


x86 assembly (clang, -O0):
<str2fourcc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movsbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str2fourcc>:
movsbl (%rdi),%eax
movsbl 0x1(%rdi),%ecx
shl    $0x8,%ecx
add    %eax,%ecx
movsbl 0x2(%rdi),%edx
shl    $0x10,%edx
add    %ecx,%edx
movzbl 0x3(%rdi),%eax
shl    $0x18,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @str2fourcc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = add nsw i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = add nsw i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = add nsw i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @str2fourcc(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = shl nsw i32 %6, 8
%8 = add nsw i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = shl nsw i32 %11, 16
%13 = add nsw i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = add nsw i32 %13, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ refresh();
void _io_flush(void) { refresh(); }


x86 assembly (clang, -O0):
<_io_flush>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <refresh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_io_flush>:
xor    %eax,%eax
jmp    1030 <refresh@plt>

LLVM IR (-O0):
define void @_io_flush() {
%1 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @_io_flush() {
%1 = tail call i32 (...) @refresh()
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
int is_sep(const char *s) { return strcmp(s, "|") == 0; }


x86 assembly (clang, -O0):
<is_sep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_sep>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"|\00"
define i32 @is_sep(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [2 x i8] c"|\00"
define i32 @is_sep(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ outl(int /*<<< orphan*/, unsigned long);
void outsl(unsigned long port, const void *src, unsigned long count) {
  const unsigned long *p = src;
  while (count--)
    outl(*p++, port);
}


x86 assembly (clang, -O0):
<outsl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     1167 <outsl+0x57>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%rax
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1030 <outl@plt>
jmp    112c <outsl+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsl>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     1145 <outsl+0x35>
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%edi
mov    %r15,%rsi
call   1030 <outl@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <outsl+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @outsl(i64 %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64*
store i64 %0, i64* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to i64*
store i64* %9, i64** %7
br label %10
10: ; preds = %14, %3
%11 = load i64, i64* %6
%12 = add i64 %11, -1
store i64 %12, i64* %6
%13 = icmp ne i64 %11, 0
br i1 %13, label %14, label %21
14: ; preds = %10
%15 = load i64*, i64** %7
%16 = getelementptr inbounds i64, i64* %15, i32 1
store i64* %16, i64** %7
%17 = load i64, i64* %15
%18 = trunc i64 %17 to i32
%19 = load i64, i64* %4
%20 = call i32 @outl(i32 %18, i64 %19)
br label %10
21: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @outsl(i64 %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %16, label %5
5: ; preds = %3
%6 = bitcast i8* %1 to i64*
br label %7
7: ; preds = %5, %7
%8 = phi i64* [ %11, %7 ], [ %6, %5 ]
%9 = phi i64 [ %10, %7 ], [ %2, %5 ]
%10 = add i64 %9, -1
%11 = getelementptr inbounds i64, i64* %8, i64 1
%12 = load i64, i64* %8
%13 = trunc i64 %12 to i32
%14 = tail call i32 @outl(i32 %13, i64 %0)
%15 = icmp eq i64 %10, 0
br i1 %15, label %16, label %7
16: ; preds = %7, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ loc_fa(int, int);
int /*<<< orphan*/ set_err(char *);
loc_dif() {
  set_err("loc_dif");
  loc_fa(1, 2);
}


x86 assembly (clang, -O0):
<loc_dif>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <set_err@plt>
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <loc_fa@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loc_dif>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <set_err@plt>
mov    $0x1,%edi
mov    $0x2,%esi
pop    %rax
jmp    1030 <loc_fa@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"loc_dif\00"
define i32 @loc_dif() {
%1 = alloca i32
%2 = call i32 @set_err(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @loc_fa(i32 1, i32 2)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [8 x i8] c"loc_dif\00"
define i32 @loc_dif() {
%1 = tail call i32 @set_err(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @loc_fa(i32 1, i32 2)
ret i32 undef
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int fork();
int getpid();
int /*<<< orphan*/ printf(char *, int, ...);
int /*<<< orphan*/ sleep(int);
int main(int argc, char *argv[]) {
  pid_t pid, ret;
  pid = getpid();
  printf("Before: my pid is %d\n", pid);
  ret = fork();
  sleep(1);
  printf("After: my pid is %d, fork() said %d\n", getpid(), ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xe96(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1060 <fork@plt>
mov    %eax,-0x18(%rbp)
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
mov    -0x18(%rbp),%edx
lea    0xe7e(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
call   1060 <fork@plt>
mov    %eax,%ebx
mov    $0x1,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xe9d(%rip),%rdi
mov    %eax,%esi
mov    %ebx,%edx
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Before: my pid is %d\0A\00"
@.str.1 = [37 x i8] c"After: my pid is %d, fork() said %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 (...) @getpid()
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = call i32 (...) @fork()
store i32 %11, i32* %7
%12 = call i32 @sleep(i32 1)
%13 = call i32 (...) @getpid()
%14 = load i32, i32* %7
%15 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0), i32 %13, i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"Before: my pid is %d\0A\00"
@.str.1 = [37 x i8] c"After: my pid is %d, fork() said %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @getpid()
%4 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 (...) @fork()
%6 = tail call i32 @sleep(i32 1)
%7 = tail call i32 (...) @getpid()
%8 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32 %5)
ret i32 0
}