int main() {
  signed int a, b, c;
  signed int d;
  unsigned int ua, ub, uc;
  unsigned int ud;
  a = 0x0000FFFF;
  b = 0xFFFF0000;
  c = a - b;
  c = 0;
  a = 0xFFFFFFEC;
  b = 0xFFFFFFE2;
  c = a - b;
  c = 0;
  a = 0xFFFFFFFE;
  b = 0x00000002;
  c = a - b;
  c = 0;
  a = 0x0000000A;
  b = 0xFFFFFFFB;
  c = a - b;
  c = 0;
  a = 0x00000005;
  b = 0xFFFFFFF6;
  c = a - b;
  c = 0;
  a = 0x0F0F0F0F;
  b = 0xF0F0F0F0;
  c = a - b;
  c = 0;
  a = 0xAAAAAAAA;
  b = 0x55555555;
  c = a - b;
  c = 0;
  d = 15;
  d -= 1;
  d -= 2;
  d -= 3;
  d -= 4;
  d -= 5;
  d = 0;
  ua = 0x0000FFFF;
  ub = 0xFFFF0000;
  uc = ua - ub;
  uc = 0;
  ua = 0xFFFFFFEC;
  ub = 0xFFFFFFE2;
  uc = ua - ub;
  uc = 0;
  ua = 0xFFFFFFFE;
  ub = 0x00000002;
  uc = ua - ub;
  uc = 0;
  ua = 0x0000000A;
  ub = 0xFFFFFFFB;
  uc = ua - ub;
  uc = 0;
  ua = 0x00000005;
  ub = 0xFFFFFFF6;
  uc = ua - ub;
  uc = 0;
  ua = 0x0F0F0F0F;
  ub = 0xF0F0F0F0;
  uc = ua - ub;
  uc = 0;
  ua = 0xAAAAAAAA;
  ub = 0x55555555;
  uc = ua - ub;
  uc = 0;
  ud = 15;
  ud -= 1;
  ud -= 2;
  ud -= 3;
  ud -= 4;
  ud -= 5;
  ud = 0;
  d = 0;
  d -= 0xFFFFFFFF;
  d -= 0xFFFFFFFE;
  d -= 0xFFFFFFFD;
  d -= 0xFFFFFFFC;
  d -= 0xFFFFFFFB;
  d = 0;
  ud = 0;
  ud -= 0xFFFFFFFF;
  ud -= 0xFFFFFFFE;
  ud -= 0xFFFFFFFD;
  ud -= 0xFFFFFFFC;
  ud -= 0xFFFFFFFB;
  ud = 0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xffff,-0x8(%rbp)
movl   $0xffff0000,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0xffffffec,-0x8(%rbp)
movl   $0xffffffe2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0xfffffffe,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0xfffffffb,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0xfffffff6,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0xf0f0f0f,-0x8(%rbp)
movl   $0xf0f0f0f0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0xaaaaaaaa,-0x8(%rbp)
movl   $0x55555555,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0xf,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x3,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x4,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x5,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0xffff,-0x18(%rbp)
movl   $0xffff0000,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0xffffffec,-0x18(%rbp)
movl   $0xffffffe2,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0xfffffffe,-0x18(%rbp)
movl   $0x2,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0xa,-0x18(%rbp)
movl   $0xfffffffb,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0x5,-0x18(%rbp)
movl   $0xfffffff6,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0xf0f0f0f,-0x18(%rbp)
movl   $0xf0f0f0f0,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0xaaaaaaaa,-0x18(%rbp)
movl   $0x55555555,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0xf,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0x3,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0x4,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0x5,%eax
mov    %eax,-0x24(%rbp)
movl   $0x0,-0x24(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0xfffffffe,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0xfffffffd,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0xfffffffc,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0xfffffffb,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0xfffffffe,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0xfffffffd,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0xfffffffc,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
sub    $0xfffffffb,%eax
mov    %eax,-0x24(%rbp)
movl   $0x0,-0x24(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %1
store i32 65535, i32* %2
store i32 -65536, i32* %3
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = sub nsw i32 %10, %11
store i32 %12, i32* %4
store i32 0, i32* %4
store i32 -20, i32* %2
store i32 -30, i32* %3
%13 = load i32, i32* %2
%14 = load i32, i32* %3
%15 = sub nsw i32 %13, %14
store i32 %15, i32* %4
store i32 0, i32* %4
store i32 -2, i32* %2
store i32 2, i32* %3
%16 = load i32, i32* %2
%17 = load i32, i32* %3
%18 = sub nsw i32 %16, %17
store i32 %18, i32* %4
store i32 0, i32* %4
store i32 10, i32* %2
store i32 -5, i32* %3
%19 = load i32, i32* %2
%20 = load i32, i32* %3
%21 = sub nsw i32 %19, %20
store i32 %21, i32* %4
store i32 0, i32* %4
store i32 5, i32* %2
store i32 -10, i32* %3
%22 = load i32, i32* %2
%23 = load i32, i32* %3
%24 = sub nsw i32 %22, %23
store i32 %24, i32* %4
store i32 0, i32* %4
store i32 252645135, i32* %2
store i32 -252645136, i32* %3
%25 = load i32, i32* %2
%26 = load i32, i32* %3
%27 = sub nsw i32 %25, %26
store i32 %27, i32* %4
store i32 0, i32* %4
store i32 -1431655766, i32* %2
store i32 1431655765, i32* %3
%28 = load i32, i32* %2
%29 = load i32, i32* %3
%30 = sub nsw i32 %28, %29
store i32 %30, i32* %4
store i32 0, i32* %4
store i32 15, i32* %5
%31 = load i32, i32* %5
%32 = sub nsw i32 %31, 1
store i32 %32, i32* %5
%33 = load i32, i32* %5
%34 = sub nsw i32 %33, 2
store i32 %34, i32* %5
%35 = load i32, i32* %5
%36 = sub nsw i32 %35, 3
store i32 %36, i32* %5
%37 = load i32, i32* %5
%38 = sub nsw i32 %37, 4
store i32 %38, i32* %5
%39 = load i32, i32* %5
%40 = sub nsw i32 %39, 5
store i32 %40, i32* %5
store i32 0, i32* %5
store i32 65535, i32* %6
store i32 -65536, i32* %7
%41 = load i32, i32* %6
%42 = load i32, i32* %7
%43 = sub i32 %41, %42
store i32 %43, i32* %8
store i32 0, i32* %8
store i32 -20, i32* %6
store i32 -30, i32* %7
%44 = load i32, i32* %6
%45 = load i32, i32* %7
%46 = sub i32 %44, %45
store i32 %46, i32* %8
store i32 0, i32* %8
store i32 -2, i32* %6
store i32 2, i32* %7
%47 = load i32, i32* %6
%48 = load i32, i32* %7
%49 = sub i32 %47, %48
store i32 %49, i32* %8
store i32 0, i32* %8
store i32 10, i32* %6
store i32 -5, i32* %7
%50 = load i32, i32* %6
%51 = load i32, i32* %7
%52 = sub i32 %50, %51
store i32 %52, i32* %8
store i32 0, i32* %8
store i32 5, i32* %6
store i32 -10, i32* %7
%53 = load i32, i32* %6
%54 = load i32, i32* %7
%55 = sub i32 %53, %54
store i32 %55, i32* %8
store i32 0, i32* %8
store i32 252645135, i32* %6
store i32 -252645136, i32* %7
%56 = load i32, i32* %6
%57 = load i32, i32* %7
%58 = sub i32 %56, %57
store i32 %58, i32* %8
store i32 0, i32* %8
store i32 -1431655766, i32* %6
store i32 1431655765, i32* %7
%59 = load i32, i32* %6
%60 = load i32, i32* %7
%61 = sub i32 %59, %60
store i32 %61, i32* %8
store i32 0, i32* %8
store i32 15, i32* %9
%62 = load i32, i32* %9
%63 = sub i32 %62, 1
store i32 %63, i32* %9
%64 = load i32, i32* %9
%65 = sub i32 %64, 2
store i32 %65, i32* %9
%66 = load i32, i32* %9
%67 = sub i32 %66, 3
store i32 %67, i32* %9
%68 = load i32, i32* %9
%69 = sub i32 %68, 4
store i32 %69, i32* %9
%70 = load i32, i32* %9
%71 = sub i32 %70, 5
store i32 %71, i32* %9
store i32 0, i32* %9
store i32 0, i32* %5
%72 = load i32, i32* %5
%73 = sub i32 %72, -1
store i32 %73, i32* %5
%74 = load i32, i32* %5
%75 = sub i32 %74, -2
store i32 %75, i32* %5
%76 = load i32, i32* %5
%77 = sub i32 %76, -3
store i32 %77, i32* %5
%78 = load i32, i32* %5
%79 = sub i32 %78, -4
store i32 %79, i32* %5
%80 = load i32, i32* %5
%81 = sub i32 %80, -5
store i32 %81, i32* %5
store i32 0, i32* %5
store i32 0, i32* %9
%82 = load i32, i32* %9
%83 = sub i32 %82, -1
store i32 %83, i32* %9
%84 = load i32, i32* %9
%85 = sub i32 %84, -2
store i32 %85, i32* %9
%86 = load i32, i32* %9
%87 = sub i32 %86, -3
store i32 %87, i32* %9
%88 = load i32, i32* %9
%89 = sub i32 %88, -4
store i32 %89, i32* %9
%90 = load i32, i32* %9
%91 = sub i32 %90, -5
store i32 %91, i32* %9
store i32 0, i32* %9
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}