void init_ddr_pll() {
  unsigned int val = 0;
  val = (*(volatile unsigned int *)(0x44E00400 + 0x94));
  val &= ~0x7;
  val |= 0x4;
  (*(volatile unsigned int *)(0x44E00400 + 0x94) = (val));
  while (!((*(volatile unsigned int *)(0x44E00400 + 0x34)) & 0x100))
    ;
  val = (*(volatile unsigned int *)(0x44E00400 + 0x40));
  val &= ~0x7FF7F;
  (*(volatile unsigned int *)(0x44E00400 + 0x40) = (val));
  val = (*(volatile unsigned int *)(0x44E00400 + 0x40));
  val |= (303 << 8) | 23;
  (*(volatile unsigned int *)(0x44E00400 + 0x40) = (val));
  val = (*(volatile unsigned int *)(0x44E00400 + 0xA0));
  val &= ~0x1F;
  val |= 1;
  (*(volatile unsigned int *)(0x44E00400 + 0xA0) = (val));
  val = (*(volatile unsigned int *)(0x44E00400 + 0x94));
  val &= ~0x7;
  val |= 0x7;
  (*(volatile unsigned int *)(0x44E00400 + 0x94) = (val));
  while (!((*(volatile unsigned int *)(0x44E00400 + 0x34)) & 0x1))
    ;
}


x86 assembly (clang, -O0):
<init_ddr_pll>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x44e00494,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffff8,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x4,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x44e00494,%eax
mov    %ecx,(%rax)
mov    $0x44e00434,%eax
mov    (%rax),%eax
and    $0x100,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1152 <init_ddr_pll+0x52>
jmp    1157 <init_ddr_pll+0x57>
jmp    1131 <init_ddr_pll+0x31>
mov    $0x44e00440,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfff80080,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x44e00440,%eax
mov    %ecx,(%rax)
mov    $0x44e00440,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x12f17,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x44e00440,%eax
mov    %ecx,(%rax)
mov    $0x44e004a0,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffffe0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x44e004a0,%eax
mov    %ecx,(%rax)
mov    $0x44e00494,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffff8,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x7,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x44e00494,%eax
mov    %ecx,(%rax)
mov    $0x44e00434,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1200 <init_ddr_pll+0x100>
jmp    1205 <init_ddr_pll+0x105>
jmp    11e1 <init_ddr_pll+0xe1>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_ddr_pll>:
mov    0x44e00494,%eax
and    $0xfffffff8,%eax
or     $0x4,%eax
mov    %eax,0x44e00494
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
testl  $0x100,0x44e00434
je     1120 <init_ddr_pll+0x20>
andl   $0xfff80080,0x44e00440
orl    $0x12f17,0x44e00440
mov    0x44e004a0,%eax
and    $0xffffffe0,%eax
or     $0x1,%eax
mov    %eax,0x44e004a0
orl    $0x7,0x44e00494
07
nop
testl  $0x1,0x44e00434
je     1160 <init_ddr_pll+0x60>
ret

LLVM IR (-O0):
define void @init_ddr_pll() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load volatile i32, i32* inttoptr (i64 1155531924 to i32*)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = and i32 %3, -8
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = or i32 %5, 4
store i32 %6, i32* %1
%7 = load i32, i32* %1
store volatile i32 %7, i32* inttoptr (i64 1155531924 to i32*)
br label %8
8: ; preds = %13, %0
%9 = load volatile i32, i32* inttoptr (i64 1155531828 to i32*)
%10 = and i32 %9, 256
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
br i1 %12, label %13, label %14
13: ; preds = %8
br label %8
14: ; preds = %8
%15 = load volatile i32, i32* inttoptr (i64 1155531840 to i32*)
store i32 %15, i32* %1
%16 = load i32, i32* %1
%17 = and i32 %16, -524160
store i32 %17, i32* %1
%18 = load i32, i32* %1
store volatile i32 %18, i32* inttoptr (i64 1155531840 to i32*)
%19 = load volatile i32, i32* inttoptr (i64 1155531840 to i32*)
store i32 %19, i32* %1
%20 = load i32, i32* %1
%21 = or i32 %20, 77591
store i32 %21, i32* %1
%22 = load i32, i32* %1
store volatile i32 %22, i32* inttoptr (i64 1155531840 to i32*)
%23 = load volatile i32, i32* inttoptr (i64 1155531936 to i32*)
store i32 %23, i32* %1
%24 = load i32, i32* %1
%25 = and i32 %24, -32
store i32 %25, i32* %1
%26 = load i32, i32* %1
%27 = or i32 %26, 1
store i32 %27, i32* %1
%28 = load i32, i32* %1
store volatile i32 %28, i32* inttoptr (i64 1155531936 to i32*)
%29 = load volatile i32, i32* inttoptr (i64 1155531924 to i32*)
store i32 %29, i32* %1
%30 = load i32, i32* %1
%31 = and i32 %30, -8
store i32 %31, i32* %1
%32 = load i32, i32* %1
%33 = or i32 %32, 7
store i32 %33, i32* %1
%34 = load i32, i32* %1
store volatile i32 %34, i32* inttoptr (i64 1155531924 to i32*)
br label %35
35: ; preds = %40, %14
%36 = load volatile i32, i32* inttoptr (i64 1155531828 to i32*)
%37 = and i32 %36, 1
%38 = icmp ne i32 %37, 0
%39 = xor i1 %38, true
br i1 %39, label %40, label %41
40: ; preds = %35
br label %35
41: ; preds = %35
ret void
}

LLVM IR (-O2):
define void @init_ddr_pll() {
%1 = load volatile i32, i32* inttoptr (i64 1155531924 to i32*)
%2 = and i32 %1, -8
%3 = or i32 %2, 4
store volatile i32 %3, i32* inttoptr (i64 1155531924 to i32*)
br label %4
4: ; preds = %4, %0
%5 = load volatile i32, i32* inttoptr (i64 1155531828 to i32*)
%6 = and i32 %5, 256
%7 = icmp eq i32 %6, 0
br i1 %7, label %4, label %8
8: ; preds = %4
%9 = load volatile i32, i32* inttoptr (i64 1155531840 to i32*)
%10 = and i32 %9, -524160
store volatile i32 %10, i32* inttoptr (i64 1155531840 to i32*)
%11 = load volatile i32, i32* inttoptr (i64 1155531840 to i32*)
%12 = or i32 %11, 77591
store volatile i32 %12, i32* inttoptr (i64 1155531840 to i32*)
%13 = load volatile i32, i32* inttoptr (i64 1155531936 to i32*)
%14 = and i32 %13, -32
%15 = or i32 %14, 1
store volatile i32 %15, i32* inttoptr (i64 1155531936 to i32*)
%16 = load volatile i32, i32* inttoptr (i64 1155531924 to i32*)
%17 = or i32 %16, 7
store volatile i32 %17, i32* inttoptr (i64 1155531924 to i32*)
br label %18
18: ; preds = %18, %8
%19 = load volatile i32, i32* inttoptr (i64 1155531828 to i32*)
%20 = and i32 %19, 1
%21 = icmp eq i32 %20, 0
br i1 %21, label %18, label %22
22: ; preds = %18
ret void
}