xunge/DecIR huggingface dataset:
int test_imm_09uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x09 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_09uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_09uint64_highword_mem>:
testb  $0x9,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_09uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 9
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_09uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 38654705664
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void db_data_init(void *data, size_t data_length) {
  memset(data, 0, data_length);
}


x86 assembly (clang, -O0):
<db_data_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_data_init>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @db_data_init(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @memset(i8* %5, i32 0, i64 %6)
ret void
}

LLVM IR (-O2):
define void @db_data_init(i8* %0, i64 %1) {
%3 = tail call i32 @memset(i8* %0, i32 0, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void SHL_L_IMM(int reg, int count) {
  if (reg & 8)
    addbyte(0x41);
  addbyte(0xc1);
  addbyte(0xc0 | (reg & 7) | 0x20);
  addbyte(count);
}


x86 assembly (clang, -O0):
<SHL_L_IMM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     1137 <SHL_L_IMM+0x27>
mov    $0x41,%edi
call   1030 <addbyte@plt>
mov    $0xc1,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
and    $0x7,%edi
or     $0xc0,%edi
or     $0x20,%edi
call   1030 <addbyte@plt>
mov    -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHL_L_IMM>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
test   $0x8,%bpl
je     1127 <SHL_L_IMM+0x17>
mov    $0x41,%edi
call   1030 <addbyte@plt>
mov    $0xc1,%edi
call   1030 <addbyte@plt>
and    $0x7,%ebp
or     $0xe0,%ebp
mov    %ebp,%edi
call   1030 <addbyte@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @SHL_L_IMM(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 8
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @addbyte(i32 65)
br label %10
10: ; preds = %8, %2
%11 = call i32 @addbyte(i32 193)
%12 = load i32, i32* %3
%13 = and i32 %12, 7
%14 = or i32 192, %13
%15 = or i32 %14, 32
%16 = call i32 @addbyte(i32 %15)
%17 = load i32, i32* %4
%18 = call i32 @addbyte(i32 %17)
ret void
}

LLVM IR (-O2):
define void @SHL_L_IMM(i32 %0, i32 %1) {
%3 = and i32 %0, 8
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @addbyte(i32 65)
br label %7
7: ; preds = %5, %2
%8 = tail call i32 @addbyte(i32 193)
%9 = and i32 %0, 7
%10 = or i32 %9, 224
%11 = tail call i32 @addbyte(i32 %10)
%12 = tail call i32 @addbyte(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("Least significant word comes first...\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"Least significant word comes first...\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [38 x i8] c"Least significant word comes first...\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *);
int findslot(int /*<<< orphan*/);
int findfreeslot(void) {
  int slot;
  if ((slot = findslot((0))) < 0)
    errx(1, "internal error: no free pid slot");
  return (slot);
}


x86 assembly (clang, -O0):
<findfreeslot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1040 <findslot@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    114c <findfreeslot+0x2c>
mov    $0x1,%edi
lea    0xeb9(%rip),%rsi
call   1030 <errx@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findfreeslot>:
push   %rbx
xor    %edi,%edi
call   1040 <findslot@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    113f <findfreeslot+0x1f>
lea    0xecb(%rip),%rsi
mov    $0x1,%edi
call   1030 <errx@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"internal error: no free pid slot\00"
define i32 @findfreeslot() {
%1 = alloca i32
%2 = call i32 @findslot(i32 0)
store i32 %2, i32* %1
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @errx(i32 1, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
@.str = [33 x i8] c"internal error: no free pid slot\00"
define i32 @findfreeslot() {
%1 = tail call i32 @findslot(i32 0)
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 %1
}
int gl_octal_width(unsigned num) {
  int n;
  for (n = 1; num /= 8; n++)
    ;
  return n;
}


x86 assembly (clang, -O0):
<gl_octal_width>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x3,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
je     1133 <gl_octal_width+0x33>
jmp    1125 <gl_octal_width+0x25>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <gl_octal_width+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_octal_width>:
mov    $0x1,%eax
cmp    $0x8,%edi
jb     112d <gl_octal_width+0x2d>
mov    $0x1,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
shr    $0x3,%ecx
add    $0x1,%eax
cmp    $0x3f,%edi
mov    %ecx,%edi
ja     1120 <gl_octal_width+0x20>
ret

LLVM IR (-O0):
define i32 @gl_octal_width(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %2
%6 = udiv i32 %5, 8
store i32 %6, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @gl_octal_width(i32 %0) {
%2 = icmp ult i32 %0, 8
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 3
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 64
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ serial;
};
struct TYPE_4__ {
  TYPE_1__ xfocus;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xfocus_serial(void *_p) {
  return (unsigned long)((XEvent *)_p)->xfocus.serial;
}


x86 assembly (clang, -O0):
<get_XEvent_xfocus_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xfocus_serial>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xfocus_serial(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xfocus_serial(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ pinModeIn(int);
int /*<<< orphan*/ pinModeOut(int);
int mcp3008_init(int sclk, int cs, int mosi, int miso) {
  pinModeOut(sclk);
  pinModeOut(cs);
  pinModeIn(miso);
  pinModeOut(mosi);
  return 1;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <pinModeOut@plt>
mov    -0x8(%rbp),%edi
call   1030 <pinModeOut@plt>
mov    -0x10(%rbp),%edi
call   1040 <pinModeIn@plt>
mov    -0xc(%rbp),%edi
call   1030 <pinModeOut@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%ebx
mov    %edx,%r14d
mov    %esi,%ebp
call   1030 <pinModeOut@plt>
mov    %ebp,%edi
call   1030 <pinModeOut@plt>
mov    %ebx,%edi
call   1040 <pinModeIn@plt>
mov    %r14d,%edi
call   1030 <pinModeOut@plt>
mov    $0x1,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mcp3008_init(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @pinModeOut(i32 %9)
%11 = load i32, i32* %6
%12 = call i32 @pinModeOut(i32 %11)
%13 = load i32, i32* %8
%14 = call i32 @pinModeIn(i32 %13)
%15 = load i32, i32* %7
%16 = call i32 @pinModeOut(i32 %15)
ret i32 1
}

LLVM IR (-O2):
define i32 @mcp3008_init(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @pinModeOut(i32 %0)
%6 = tail call i32 @pinModeOut(i32 %1)
%7 = tail call i32 @pinModeIn(i32 %3)
%8 = tail call i32 @pinModeOut(i32 %2)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int getsockopt(int, int, int, void *, int /*<<< orphan*/ *);
__attribute__((weak)) int __real_getsockopt(int fd, int level, int optname,
                                            void *optval, socklen_t *optlen) {
  return getsockopt(fd, level, optname, optval, optlen);
}


x86 assembly (clang, -O0):
<__real_getsockopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
call   1030 <getsockopt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__real_getsockopt>:
jmp    1030 <getsockopt@plt>

LLVM IR (-O0):
define weak i32 @__real_getsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32* %4, i32** %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i8*, i8** %9
%15 = load i32*, i32** %10
%16 = call i32 @getsockopt(i32 %11, i32 %12, i32 %13, i8* %14, i32* %15)
ret i32 %16
}

LLVM IR (-O2):
define weak i32 @__real_getsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32* %4) {
%6 = tail call i32 @getsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32* %4)
ret i32 %6
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_track_add_name(void *track, const char *name) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_track_add_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_track_add_name>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_track_add_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_track_add_name(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
void mipi_dsi_iomux_config() {}


x86 assembly (clang, -O0):
<mipi_dsi_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mipi_dsi_iomux_config>:
ret

LLVM IR (-O0):
define void @mipi_dsi_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @mipi_dsi_iomux_config() {
ret void
}
unsigned xrop3_254_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T | S;
  stk1 = D | stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_254_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_254_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
lea    (%rcx,%rdi,1),%eax
shl    $0x8,%esi
or     %esi,%ecx
or     $0xff,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_254_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %6
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = or i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = xor i32 %29, -1
%31 = and i32 %28, %30
%32 = load i32, i32* %5
%33 = load i32, i32* %6
%34 = and i32 %32, %33
%35 = or i32 %31, %34
ret i32 %35
}

LLVM IR (-O2):
define i32 @xrop3_254_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %4, %7
%9 = or i32 %8, 255
%10 = xor i32 %5, -1
%11 = and i32 %9, %10
%12 = or i32 %11, %3
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ foo(long);
void xxx(void) {
  long iter, jter;
  for (iter = 0, jter = 2; iter < 100; iter++, jter++) {
    foo(iter);
    foo(jter);
  }
}


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x2,-0x10(%rbp)
cmpq   $0x64,-0x8(%rbp)
jge    1162 <xxx+0x52>
mov    -0x8(%rbp),%rdi
call   1030 <foo@plt>
mov    -0x10(%rbp),%rdi
call   1030 <foo@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1128 <xxx+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
push   %rbx
mov    $0x2,%ebx
cs nopw 0x0(%rax,%rax,1)
lea    -0x2(%rbx),%rdi
call   1030 <foo@plt>
mov    %rbx,%rdi
call   1030 <foo@plt>
add    $0x1,%rbx
cmp    $0x66,%rbx
jne    1120 <xxx+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @xxx() {
%1 = alloca i64
%2 = alloca i64
store i64 0, i64* %1
store i64 2, i64* %2
br label %3
3: ; preds = %11, %0
%4 = load i64, i64* %1
%5 = icmp slt i64 %4, 100
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i64, i64* %1
%8 = call i32 @foo(i64 %7)
%9 = load i64, i64* %2
%10 = call i32 @foo(i64 %9)
br label %11
11: ; preds = %6
%12 = load i64, i64* %1
%13 = add nsw i64 %12, 1
store i64 %13, i64* %1
%14 = load i64, i64* %2
%15 = add nsw i64 %14, 1
store i64 %15, i64* %2
br label %3
16: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @xxx() {
br label %1
1: ; preds = %0, %1
%2 = phi i64 [ 2, %0 ], [ %7, %1 ]
%3 = phi i64 [ 0, %0 ], [ %6, %1 ]
%4 = tail call i32 @foo(i64 %3)
%5 = tail call i32 @foo(i64 %2)
%6 = add nuw nsw i64 %3, 1
%7 = add nuw nsw i64 %2, 1
%8 = icmp eq i64 %6, 100
br i1 %8, label %9, label %1
9: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct fa_row {
  int dummy;
};

/* Variables and functions */
bool read_empty_sniffer(struct fa_row *block, size_t block_size,
                        uint64_t *timestamp) {
  return false;
}


x86 assembly (clang, -O0):
<read_empty_sniffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_empty_sniffer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fa_row = type { i32 }
define i32 @read_empty_sniffer(%struct.fa_row* %0, i64 %1, i32* %2) {
%4 = alloca %struct.fa_row*
%5 = alloca i64
%6 = alloca i32*
store %struct.fa_row* %0, %struct.fa_row** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
ret i32 0
}

LLVM IR (-O2):
%struct.fa_row = type { i32 }
define i32 @read_empty_sniffer(%struct.fa_row* nocapture readnone %0, i64 %1, i32* nocapture readnone %2) {
ret i32 0
}
void dl_F3DEX_MODIFYVTX() {}


x86 assembly (clang, -O0):
<dl_F3DEX_MODIFYVTX>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dl_F3DEX_MODIFYVTX>:
ret

LLVM IR (-O0):
define void @dl_F3DEX_MODIFYVTX() {
ret void
}

LLVM IR (-O2):
define void @dl_F3DEX_MODIFYVTX() {
ret void
}
struct PostProcessor *postprocessor_init(struct PostProcessor *pp) {
  return pp;
}


x86 assembly (clang, -O0):
<postprocessor_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<postprocessor_init>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.PostProcessor = type opaque
define %struct.PostProcessor* @postprocessor_init(%struct.PostProcessor* %0) {
%2 = alloca %struct.PostProcessor*
store %struct.PostProcessor* %0, %struct.PostProcessor** %2
%3 = load %struct.PostProcessor*, %struct.PostProcessor** %2
ret %struct.PostProcessor* %3
}

LLVM IR (-O2):
%struct.PostProcessor = type opaque
define %struct.PostProcessor* @postprocessor_init(%struct.PostProcessor* readnone returned %0) {
ret %struct.PostProcessor* %0
}
int __bsr32(int x) {
  asm("bsr  %1,%0" : "=r"(x) : "rm"(x));
  return x;
}


x86 assembly (clang, -O0):
<__bsr32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
bsr    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__bsr32>:
mov    %edi,-0x4(%rsp)
bsr    -0x4(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @__bsr32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 asm "bsr $1,$0", "=r,rm,~{dirflag},~{fpsr},~{flags}"(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @__bsr32(i32 %0) {
%2 = tail call i32 asm "bsr $1,$0", "=r,rm,~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i32 %2
}
void _libkb_kbmlock_c_extern_s(void) {}


x86 assembly (clang, -O0):
<_libkb_kbmlock_c_extern_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_libkb_kbmlock_c_extern_s>:
ret

LLVM IR (-O0):
define void @_libkb_kbmlock_c_extern_s() {
ret void
}

LLVM IR (-O2):
define void @_libkb_kbmlock_c_extern_s() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
int /*<<< orphan*/ isEmpty();
void __VERIFIER_atomic_assert(int r) {
  {
    if (!(!r || !isEmpty())) {
    ERROR:
      __VERIFIER_error();
      (void)0;
    }
  };
}


x86 assembly (clang, -O0):
<__VERIFIER_atomic_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1151 <__VERIFIER_atomic_assert+0x31>
mov    $0x0,%al
call   1030 <isEmpty@plt>
cmp    $0x0,%eax
je     1151 <__VERIFIER_atomic_assert+0x31>
jmp    114a <__VERIFIER_atomic_assert+0x2a>
mov    $0x0,%al
call   1040 <__VERIFIER_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_atomic_assert>:
test   %edi,%edi
je     113c <__VERIFIER_atomic_assert+0x1c>
push   %rax
xor    %eax,%eax
call   1030 <isEmpty@plt>
test   %eax,%eax
lea    0x8(%rsp),%rsp
je     113c <__VERIFIER_atomic_assert+0x1c>
xor    %eax,%eax
jmp    1040 <__VERIFIER_error@plt>
ret

LLVM IR (-O0):
define void @__VERIFIER_atomic_assert(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = call i32 (...) @isEmpty()
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
br label %9
9: ; preds = %8
%10 = call i32 (...) @__VERIFIER_error()
br label %11
11: ; preds = %9, %5, %1
ret void
}

LLVM IR (-O2):
define void @__VERIFIER_atomic_assert(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 (...) @isEmpty()
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 (...) @__VERIFIER_error()
br label %8
8: ; preds = %6, %3, %1
ret void
}
/* Variables and functions */
char *strchr(char const *, char);
char *strpbrk(char const *, char const *);
char *strpbrk_or_eos(const char *s, const char *accept) {
  char *p = strpbrk(s, accept);
  if (!p)
    p = strchr(s, '\0');
  return p;
}


x86 assembly (clang, -O0):
<strpbrk_or_eos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strpbrk@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115b <strpbrk_or_eos+0x3b>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strpbrk_or_eos>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strpbrk@plt>
test   %rax,%rax
je     1130 <strpbrk_or_eos+0x10>
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <strlen@plt>
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @strpbrk_or_eos(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i8* @strpbrk(i8* %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %14, label %11
11: ; preds = %2
%12 = load i8*, i8** %3
%13 = call i8* @strchr(i8* %12, i8 signext 0)
store i8* %13, i8** %5
br label %14
14: ; preds = %11, %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
define i8* @strpbrk_or_eos(i8* %0, i8* nocapture %1) {
%3 = tail call i8* @strpbrk(i8* %0, i8* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%7 = getelementptr i8, i8* %0, i64 %6
br label %8
8: ; preds = %5, %2
%9 = phi i8* [ %3, %2 ], [ %7, %5 ]
ret i8* %9
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int sandbox_suspend(pid_t pid) { return -1; }


x86 assembly (clang, -O0):
<sandbox_suspend>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sandbox_suspend>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sandbox_suspend(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @sandbox_suspend(i32 %0) {
ret i32 -1
}
const char *str_expr_str(void) { return "string"; }


x86 assembly (clang, -O0):
<str_expr_str>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_expr_str>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"string\00"
define i8* @str_expr_str() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"string\00"
define i8* @str_expr_str() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int omp_get_thread_num();
int /*<<< orphan*/ printf(char *, int);
void funcA() {
  printf("En funcA: esta sectión la ejecuta el thread %d\n",
         omp_get_thread_num());
}


x86 assembly (clang, -O0):
<funcA>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcA>:
push   %rax
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"En funcA: esta secti\C3\B3n la ejecuta el thread %d\0A\00"
define void @funcA() {
%1 = call i32 (...) @omp_get_thread_num()
%2 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [49 x i8] c"En funcA: esta secti\C3\B3n la ejecuta el thread %d\0A\00"
define void @funcA() {
%1 = tail call i32 (...) @omp_get_thread_num()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sesc_release(int);
void sesc_release_(int vaddr) { sesc_release(vaddr); }


x86 assembly (clang, -O0):
<sesc_release_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sesc_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_release_>:
jmp    1030 <sesc_release@plt>

LLVM IR (-O0):
define void @sesc_release_(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sesc_release(i32 %3)
ret void
}

LLVM IR (-O2):
define void @sesc_release_(i32 %0) {
%2 = tail call i32 @sesc_release(i32 %0)
ret void
}
int do_816() { return 816; }


x86 assembly (clang, -O0):
<do_816>:
push   %rbp
mov    %rsp,%rbp
mov    $0x330,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_816>:
mov    $0x330,%eax
ret

LLVM IR (-O0):
define i32 @do_816() {
ret i32 816
}

LLVM IR (-O2):
define i32 @do_816() {
ret i32 816
}
/* Variables and functions */
int /*<<< orphan*/ fgif(char *, char *);
void fgifw(char *buf) { fgif(buf, "-week.gif"); }


x86 assembly (clang, -O0):
<fgifw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fgif@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgifw>:
lea    0xee9(%rip),%rsi
jmp    1030 <fgif@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"-week.gif\00"
define void @fgifw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fgif(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"-week.gif\00"
define void @fgifw(i8* %0) {
%2 = tail call i32 @fgif(i8* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *zcodecom(int, char *, int, int *);
char *zdecode(char *inbuf, int inbuf_len, int *resultbuf_len) {
  return zcodecom(1, inbuf, inbuf_len, resultbuf_len);
}


x86 assembly (clang, -O0):
<zdecode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    $0x1,%edi
call   1030 <zcodecom@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zdecode>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <zcodecom@plt>

LLVM IR (-O0):
define i8* @zdecode(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i8* @zcodecom(i32 1, i8* %7, i32 %8, i32* %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @zdecode(i8* %0, i32 %1, i32* %2) {
%4 = tail call i8* @zcodecom(i32 1, i8* %0, i32 %1, i32* %2)
ret i8* %4
}
/* Variables and functions */
int sscanf(char const *, char *, double *);
int capture_double(const char *carg, void *pvar) {
  double *pf = pvar;
  return sscanf(carg, "%lf", pf) == 1 ? 0 : 1;
}


x86 assembly (clang, -O0):
<capture_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xec9(%rip),%rsi
call   1030 <sscanf@plt>
mov    %eax,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x1,%edx
cmove  %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capture_double>:
push   %rax
mov    %rsi,%rdx
lea    0xee5(%rip),%rsi
call   1030 <sscanf@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
define i32 @capture_double(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca double*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to double*
store double* %7, double** %5
%8 = load i8*, i8** %3
%9 = load double*, double** %5
%10 = call i32 @sscanf(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %9)
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 0, i32 1
ret i32 %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
define i32 @capture_double(i8* nocapture %0, i8* %1) {
%3 = bitcast i8* %1 to double*
%4 = tail call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %3)
%5 = icmp ne i32 %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ strv_remove(char **, char *);
char **strv_uniq(char **l) {
  char **i;
  for ((i) = (l); (i) && *(i); (i)++)
    strv_remove(i + 1, *i);
  return l;
}


x86 assembly (clang, -O0):
<strv_uniq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     1142 <strv_uniq+0x32>
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1152 <strv_uniq+0x42>
jmp    1177 <strv_uniq+0x67>
mov    -0x10(%rbp),%rdi
add    $0x8,%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strv_remove@plt>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <strv_uniq+0x14>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strv_uniq>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %rdi,%rdi
je     1144 <strv_uniq+0x34>
mov    (%r14),%rsi
test   %rsi,%rsi
je     1144 <strv_uniq+0x34>
lea    0x8(%r14),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <strv_remove@plt>
mov    (%rbx),%rsi
add    $0x8,%rbx
test   %rsi,%rsi
jne    1130 <strv_uniq+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8** @strv_uniq(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
store i8** %4, i8*** %3
br label %5
5: ; preds = %20, %1
%6 = load i8**, i8*** %3
%7 = icmp ne i8** %6, null
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i8**, i8*** %3
%10 = load i8*, i8** %9
%11 = icmp ne i8* %10, null
br label %12
12: ; preds = %8, %5
%13 = phi i1 [ false, %5 ], [ %11, %8 ]
br i1 %13, label %14, label %23
14: ; preds = %12
%15 = load i8**, i8*** %3
%16 = getelementptr inbounds i8*, i8** %15, i64 1
%17 = load i8**, i8*** %3
%18 = load i8*, i8** %17
%19 = call i32 @strv_remove(i8** %16, i8* %18)
br label %20
20: ; preds = %14
%21 = load i8**, i8*** %3
%22 = getelementptr inbounds i8*, i8** %21, i32 1
store i8** %22, i8*** %3
br label %5
23: ; preds = %12
%24 = load i8**, i8*** %2
ret i8** %24
}

LLVM IR (-O2):
define i8** @strv_uniq(i8** returned %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i8* [ %11, %6 ], [ %4, %3 ]
%8 = phi i8** [ %9, %6 ], [ %0, %3 ]
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = tail call i32 @strv_remove(i8** %9, i8* %7)
%11 = load i8*, i8** %9
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %6
13: ; preds = %6, %3, %1
ret i8** %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printStar() {
  printf("  *  \n");
  printf("*****\n");
  printf(" *** \n");
  printf("*****\n");
  printf("  *  \n");
}


x86 assembly (clang, -O0):
<printStar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printStar>:
push   %r14
push   %rbx
push   %rax
lea    0xef1(%rip),%r14
mov    %r14,%rdi
call   1030 <puts@plt>
lea    0xedc(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xec7(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c" * \0A\00"
@.str.1 = [7 x i8] c"*****\0A\00"
@.str.2 = [7 x i8] c" *** \0A\00"
define void @printStar() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str.4 = [6 x i8] c" *** \00"
@str.5 = [6 x i8] c"*****\00"
@str.6 = [6 x i8] c" * \00"
define void @printStar() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.6, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.5, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.4, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.5, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.6, i64 0, i64 0))
ret void
}
int test_imm_53uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x53 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_53uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x53,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_53uint64_midword_mem>:
testb  $0x53,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_53uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 83
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_53uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5439488
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ check(scalar_t__, scalar_t__);
void check_size(uint8_t size) {
  int i;
  uint8_t b1;
  uint8_t b2;
  b1 = 0;
  for (i = 0; i <= 256; i += 1) {
    b2 = b1;
    b2 += size;
    check(b1, b2);
    b1 += 1;
  }
}


x86 assembly (clang, -O0):
<check_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x18(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x100,-0xc(%rbp)
jg     1173 <check_size+0x63>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <check@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <check_size+0x1b>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_size>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
lea    (%r14,%rbx,1),%rsi
mov    %rbx,%rdi
call   1030 <check@plt>
add    $0x1,%rbx
cmp    $0x101,%rbx
jne    1120 <check_size+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @check_size(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %4
store i32 0, i32* %3
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 256
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i64, i64* %4
store i64 %10, i64* %5
%11 = load i64, i64* %2
%12 = load i64, i64* %5
%13 = add nsw i64 %12, %11
store i64 %13, i64* %5
%14 = load i64, i64* %4
%15 = load i64, i64* %5
%16 = call i32 @check(i64 %14, i64 %15)
%17 = load i64, i64* %4
%18 = add nsw i64 %17, 1
store i64 %18, i64* %4
br label %19
19: ; preds = %9
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @check_size(i64 %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i64 [ 0, %1 ], [ %6, %2 ]
%4 = add nsw i64 %3, %0
%5 = tail call i32 @check(i64 %3, i64 %4)
%6 = add nuw nsw i64 %3, 1
%7 = icmp eq i64 %6, 257
br i1 %7, label %8, label %2
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void mov_preg64_reg64(int reg1, int reg2) {
  put8(0x48);
  put8(0x89);
  put8((reg2 << 3) | reg1);
}


x86 assembly (clang, -O0):
<mov_preg64_reg64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0x89,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
shl    $0x3,%edi
or     -0x4(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_preg64_reg64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0x89,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %ebp,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_preg64_reg64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 72)
%6 = call i32 @put8(i32 137)
%7 = load i32, i32* %4
%8 = shl i32 %7, 3
%9 = load i32, i32* %3
%10 = or i32 %8, %9
%11 = call i32 @put8(i32 %10)
ret void
}

LLVM IR (-O2):
define void @mov_preg64_reg64(i32 %0, i32 %1) {
%3 = tail call i32 @put8(i32 72)
%4 = tail call i32 @put8(i32 137)
%5 = shl i32 %1, 3
%6 = or i32 %5, %0
%7 = tail call i32 @put8(i32 %6)
ret void
}
__attribute__((no, noclone)) int f4(void *a, const char *b, int c, int d,
                                    double *e, int f, char **g, int *h) {
  asm volatile("" : : "r"(a), "r"(b), "r"(c), "r"(d) : "memory");
  asm volatile("" : : "r"(e), "r"(f), "r"(g), "r"(h) : "memory");
  return 0;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
mov    -0x20(%rbp),%rax
mov    -0x24(%rbp),%ecx
mov    0x10(%rbp),%rdx
mov    0x18(%rbp),%rsi
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    0x8(%rsp),%r10
mov    0x10(%rsp),%rax
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f4(i8* %0, i8* %1, i32 %2, i32 %3, double* %4, i32 %5, i8** %6, i32* %7) {
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
%13 = alloca double*
%14 = alloca i32
%15 = alloca i8**
%16 = alloca i32*
store i8* %0, i8** %9
store i8* %1, i8** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store double* %4, double** %13
store i32 %5, i32* %14
store i8** %6, i8*** %15
store i32* %7, i32** %16
%17 = load i8*, i8** %9
%18 = load i8*, i8** %10
%19 = load i32, i32* %11
%20 = load i32, i32* %12
%21 = load double*, double** %13
%22 = load i32, i32* %14
%23 = load i8**, i8*** %15
%24 = load i32*, i32** %16
ret i32 0
}

LLVM IR (-O2):
define i32 @f4(i8* %0, i8* %1, i32 %2, i32 %3, double* %4, i32 %5, i8** %6, i32* %7) {
tail call void asm sideeffect "", "r,r,r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1, i32 %2, i32 %3)
tail call void asm sideeffect "", "r,r,r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(double* %4, i32 %5, i8** %6, i32* %7)
ret i32 0
}
void XGetZoomHints() {}


x86 assembly (clang, -O0):
<XGetZoomHints>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetZoomHints>:
ret

LLVM IR (-O0):
define void @XGetZoomHints() {
ret void
}

LLVM IR (-O2):
define void @XGetZoomHints() {
ret void
}
void blend_map_opt(double *dest, double *a, double *b, int size, int blend) {}


x86 assembly (clang, -O0):
<blend_map_opt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<blend_map_opt>:
ret

LLVM IR (-O0):
define void @blend_map_opt(double* %0, double* %1, double* %2, i32 %3, i32 %4) {
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
%9 = alloca i32
%10 = alloca i32
store double* %0, double** %6
store double* %1, double** %7
store double* %2, double** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
ret void
}

LLVM IR (-O2):
define void @blend_map_opt(double* nocapture %0, double* nocapture %1, double* nocapture %2, i32 %3, i32 %4) {
ret void
}
/* Type definitions */
struct bpf_prog {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __bpf_prog_release(struct bpf_prog *);
void bpf_prog_destroy(struct bpf_prog *fp) { __bpf_prog_release(fp); }


x86 assembly (clang, -O0):
<bpf_prog_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__bpf_prog_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_prog_destroy>:
jmp    1030 <__bpf_prog_release@plt>

LLVM IR (-O0):
%struct.bpf_prog = type { i32 }
define void @bpf_prog_destroy(%struct.bpf_prog* %0) {
%2 = alloca %struct.bpf_prog*
store %struct.bpf_prog* %0, %struct.bpf_prog** %2
%3 = load %struct.bpf_prog*, %struct.bpf_prog** %2
%4 = call i32 @__bpf_prog_release(%struct.bpf_prog* %3)
ret void
}

LLVM IR (-O2):
%struct.bpf_prog = type { i32 }
define void @bpf_prog_destroy(%struct.bpf_prog* %0) {
%2 = tail call i32 @__bpf_prog_release(%struct.bpf_prog* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_linux_file_name(char *);
int /*<<< orphan*/ tcp_naive_reno_register();
void module_register(void) {
  tcp_naive_reno_register();
  set_linux_file_name("tcp_naive_reno.c");
}


x86 assembly (clang, -O0):
<module_register>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tcp_naive_reno_register@plt>
lea    0xece(%rip),%rdi
call   1040 <set_linux_file_name@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_register>:
push   %rax
xor    %eax,%eax
call   1030 <tcp_naive_reno_register@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <set_linux_file_name@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"tcp_naive_reno.c\00"
define void @module_register() {
%1 = call i32 (...) @tcp_naive_reno_register()
%2 = call i32 @set_linux_file_name(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"tcp_naive_reno.c\00"
define void @module_register() {
%1 = tail call i32 (...) @tcp_naive_reno_register()
%2 = tail call i32 @set_linux_file_name(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void main_menu(int value) {
  if (value == 666)
    exit(0);
}


x86 assembly (clang, -O0):
<main_menu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x29a,-0x4(%rbp)
jne    112f <main_menu+0x1f>
xor    %edi,%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_menu>:
cmp    $0x29a,%edi
je     1119 <main_menu+0x9>
ret
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @main_menu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 666
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @exit(i32 0)
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @main_menu(i32 %0) {
%2 = icmp eq i32 %0, 666
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @exit(i32 0)
unreachable
5: ; preds = %1
ret void
}
int leap_years(int year) {
  return (year - 1) / 4 + (year - 1) / 400 - (year - 1) / 100;
}


x86 assembly (clang, -O0):
<leap_years>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leap_years>:
lea    -0x1(%rdi),%eax
lea    0x2(%rdi),%ecx
test   %eax,%eax
cmovns %eax,%ecx
sar    $0x2,%ecx
cltq
imul   $0x51eb851f,%rax,%rdx
mov    %rdx,%rsi
shr    $0x3f,%rsi
sar    $0x27,%rdx
add    %esi,%edx
add    %ecx,%edx
imul   $0xffffffffae147ae1,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @leap_years(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
%5 = sdiv i32 %4, 4
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 1
%8 = sdiv i32 %7, 400
%9 = add nsw i32 %5, %8
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 1
%12 = sdiv i32 %11, 100
%13 = sub nsw i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @leap_years(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = sdiv i32 %2, 4
%4 = sdiv i32 %2, 400
%5 = add nsw i32 %3, %4
%6 = sdiv i32 %2, -100
%7 = add nsw i32 %5, %6
ret i32 %7
}