xunge/DecIR huggingface dataset:
double pv_c(const double p0, const double qt, const double qv) {
  return p0 * 1.6074538488331591 * qv / (1.0 - qt + 1.6074538488331591 * qv);
}


x86 assembly (clang, -O0):
<pv_c>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee5(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  0xedb(%rip),%xmm2
subsd  -0x10(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
movsd  0xec1(%rip),%xmm3
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pv_c>:
movsd  0xef8(%rip),%xmm3
mulsd  %xmm3,%xmm0
mulsd  %xmm2,%xmm0
movsd  0xef0(%rip),%xmm4
subsd  %xmm1,%xmm4
mulsd  %xmm3,%xmm2
addsd  %xmm4,%xmm2
divsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @pv_c(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fmul double %7, 0x3FF9B82186E9157D
%9 = load double, double* %6
%10 = fmul double %8, %9
%11 = load double, double* %5
%12 = fsub double 1.000000e+00, %11
%13 = load double, double* %6
%14 = call double @llvm.fmuladd.f64(double 0x3FF9B82186E9157D, double %13, double %12)
%15 = fdiv double %10, %14
ret double %15
}

LLVM IR (-O2):
define double @pv_c(double %0, double %1, double %2) {
%4 = fmul double %0, 0x3FF9B82186E9157D
%5 = fmul double %4, %2
%6 = fsub double 1.000000e+00, %1
%7 = tail call double @llvm.fmuladd.f64(double %2, double 0x3FF9B82186E9157D, double %6)
%8 = fdiv double %5, %7
ret double %8
}
int is_lit(int state) { return (state <= 6); }


x86 assembly (clang, -O0):
<is_lit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x6,-0x4(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_lit>:
xor    %eax,%eax
cmp    $0x7,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @is_lit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 6
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_lit(i32 %0) {
%2 = icmp slt i32 %0, 7
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int db_getpkgid(char *, char *);
int get_pkgid(char *name, char *version) { return db_getpkgid(name, version); }


x86 assembly (clang, -O0):
<get_pkgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <db_getpkgid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pkgid>:
jmp    1030 <db_getpkgid@plt>

LLVM IR (-O0):
define i32 @get_pkgid(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @db_getpkgid(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_pkgid(i8* %0, i8* %1) {
%3 = tail call i32 @db_getpkgid(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
size_t heap_parent(size_t i) { return (i - 1) / 2; }


x86 assembly (clang, -O0):
<heap_parent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
shr    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_parent>:
lea    -0x1(%rdi),%rax
shr    %rax
ret

LLVM IR (-O0):
define i64 @heap_parent(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub i64 %3, 1
%5 = udiv i64 %4, 2
ret i64 %5
}

LLVM IR (-O2):
define i64 @heap_parent(i64 %0) {
%2 = add i64 %0, -1
%3 = lshr i64 %2, 1
ret i64 %3
}
/* Type definitions */
typedef char *uint32_t;

/* Variables and functions */
uint32_t ntohl(uint32_t v) {
  asm volatile("bswap %1" : "+r"(v));
  return v;
}


x86 assembly (clang, -O0):
<ntohl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bswap  %rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntohl>:
mov    %rdi,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i8* @ntohl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm sideeffect "bswap $1", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ntohl(i8* %0) {
%2 = tail call i8* asm sideeffect "bswap $1", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
strupr(str) char *str;
{
  int i;
  char az;
  for (i = 0; str[i] != 0; i++) {
    az = str[i];
    if (az > 96 && az < 123)
      str[i] = (az - 32);
  }
}


x86 assembly (clang, -O0):
<strupr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1173 <strupr+0x73>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x15(%rbp)
movsbl -0x15(%rbp),%eax
cmp    $0x60,%eax
jle    1160 <strupr+0x60>
movsbl -0x15(%rbp),%eax
cmp    $0x7b,%eax
jge    1160 <strupr+0x60>
movsbl -0x15(%rbp),%eax
sub    $0x20,%eax
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
jmp    1165 <strupr+0x65>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <strupr+0xf>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strupr>:
mov    (%rdi),%al
test   %al,%al
je     112a <strupr+0x2a>
add    $0x1,%rdi
jmp    111b <strupr+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <strupr+0x2a>
lea    -0x61(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <strupr+0x10>
add    $0xe0,%al
mov    %al,-0x1(%rdi)
jmp    1110 <strupr+0x10>
ret

LLVM IR (-O0):
define i32 @strupr(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 0, i32* %4
br label %6
6: ; preds = %37, %1
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %40
14: ; preds = %6
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %5
%20 = load i8, i8* %5
%21 = sext i8 %20 to i32
%22 = icmp sgt i32 %21, 96
br i1 %22, label %23, label %36
23: ; preds = %14
%24 = load i8, i8* %5
%25 = sext i8 %24 to i32
%26 = icmp slt i32 %25, 123
br i1 %26, label %27, label %36
27: ; preds = %23
%28 = load i8, i8* %5
%29 = sext i8 %28 to i32
%30 = sub nsw i32 %29, 32
%31 = trunc i32 %30 to i8
%32 = load i8*, i8** %3
%33 = load i32, i32* %4
%34 = sext i32 %33 to i64
%35 = getelementptr inbounds i8, i8* %32, i64 %34
store i8 %31, i8* %35
br label %36
36: ; preds = %27, %23, %14
br label %37
37: ; preds = %36
%38 = load i32, i32* %4
%39 = add nsw i32 %38, 1
store i32 %39, i32* %4
br label %6
40: ; preds = %6
%41 = load i32, i32* %2
ret i32 %41
}

LLVM IR (-O2):
define i32 @strupr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1, %12
%5 = phi i64 [ %13, %12 ], [ 0, %1 ]
%6 = phi i8 [ %15, %12 ], [ %2, %1 ]
%7 = phi i8* [ %14, %12 ], [ %0, %1 ]
%8 = add i8 %6, -97
%9 = icmp ult i8 %8, 26
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = add nsw i8 %6, -32
store i8 %11, i8* %7
br label %12
12: ; preds = %4, %10
%13 = add nuw i64 %5, 1
%14 = getelementptr inbounds i8, i8* %0, i64 %13
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %4
17: ; preds = %12, %1
ret i32 undef
}
__attribute__((no)) int read_ptr(int *ptr) {
  __asm__ __volatile__("" : : : "memory");
  return *ptr;
}


x86 assembly (clang, -O0):
<read_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_ptr>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_ptr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @read_ptr(i32* nocapture %0) {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
%2 = load i32, i32* %0
ret i32 %2
}
void put16(char *addr, unsigned short val16) {
  *addr++ = val16;
  *addr = val16 >> 8;
}


x86 assembly (clang, -O0):
<put16>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%ax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put16>:
mov    %si,(%rdi)
ret

LLVM IR (-O0):
define void @put16(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = trunc i16 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
store i8 %6, i8* %7
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = ashr i32 %10, 8
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %3
store i8 %12, i8* %13
ret void
}

LLVM IR (-O2):
define void @put16(i8* nocapture writeonly %0, i16 zeroext %1) {
%3 = trunc i16 %1 to i8
%4 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %3, i8* %0
%5 = lshr i16 %1, 8
%6 = trunc i16 %5 to i8
store i8 %6, i8* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Test18();
int /*<<< orphan*/ Test28BIS();
int /*<<< orphan*/ Test34();
int main(void) {
  Test18();
  Test28BIS();
  Test34();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <Test18@plt>
mov    $0x0,%al
call   1050 <Test28BIS@plt>
mov    $0x0,%al
call   1030 <Test34@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <Test18@plt>
xor    %eax,%eax
call   1050 <Test28BIS@plt>
xor    %eax,%eax
call   1030 <Test34@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @Test18()
%3 = call i32 (...) @Test28BIS()
%4 = call i32 (...) @Test34()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @Test18()
%2 = tail call i32 (...) @Test28BIS()
%3 = tail call i32 (...) @Test34()
ret i32 0
}
/* Type definitions */
struct rw_semaphore {
  int dummy;
};

/* Variables and functions */
int __down_write_trylock(struct rw_semaphore *);
__attribute__((always_)) int down_write_trylock(struct rw_semaphore *sem) {
  int ret;
  ;
  ret = __down_write_trylock(sem);
  ;
  return ret;
}


x86 assembly (clang, -O0):
<down_write_trylock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__down_write_trylock@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<down_write_trylock>:
jmp    1030 <__down_write_trylock@plt>

LLVM IR (-O0):
%struct.rw_semaphore = type { i32 }
define i32 @down_write_trylock(%struct.rw_semaphore* %0) {
%2 = alloca %struct.rw_semaphore*
%3 = alloca i32
store %struct.rw_semaphore* %0, %struct.rw_semaphore** %2
%4 = load %struct.rw_semaphore*, %struct.rw_semaphore** %2
%5 = call i32 @__down_write_trylock(%struct.rw_semaphore* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.rw_semaphore = type { i32 }
define i32 @down_write_trylock(%struct.rw_semaphore* %0) {
%2 = tail call i32 @__down_write_trylock(%struct.rw_semaphore* %0)
ret i32 %2
}
/* Type definitions */
typedef unsigned long uint64_t;

/* Variables and functions */
double double_min(void) {
  union {
    uint64_t bits;
    double d;
  } double_repr;
  double_repr.bits = ~0;
  double_repr.bits &= ~(1UL << 52);
  return double_repr.d;
}


x86 assembly (clang, -O0):
<double_min>:
push   %rbp
mov    %rsp,%rbp
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
movabs $0xffefffffffffffff,%rax
ff ef ff
and    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_min>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
%union.anon = type { i64 }
define double @double_min() {
%1 = alloca %union.anon
%2 = bitcast %union.anon* %1 to i64*
store i64 -1, i64* %2
%3 = bitcast %union.anon* %1 to i64*
%4 = load i64, i64* %3
%5 = and i64 %4, -4503599627370497
store i64 %5, i64* %3
%6 = bitcast %union.anon* %1 to double*
%7 = load double, double* %6
ret double %7
}

LLVM IR (-O2):
define double @double_min() {
ret double 0xFFEFFFFFFFFFFFFF
}
int test_imm_FCint32_mem(int *val) {
  return ((*val) & (0xFC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FCint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xfc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FCint32_mem>:
testb  $0xfc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FCint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 252
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FCint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 252
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct generator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wp(struct generator *, char const *, int /*<<< orphan*/);
void w(struct generator *g, const char *s) { wp(g, s, 0); }


x86 assembly (clang, -O0):
<w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <wp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w>:
xor    %edx,%edx
jmp    1030 <wp@plt>

LLVM IR (-O0):
%struct.generator = type { i32 }
define void @w(%struct.generator* %0, i8* %1) {
%3 = alloca %struct.generator*
%4 = alloca i8*
store %struct.generator* %0, %struct.generator** %3
store i8* %1, i8** %4
%5 = load %struct.generator*, %struct.generator** %3
%6 = load i8*, i8** %4
%7 = call i32 @wp(%struct.generator* %5, i8* %6, i32 0)
ret void
}

LLVM IR (-O2):
%struct.generator = type { i32 }
define void @w(%struct.generator* %0, i8* %1) {
%3 = tail call i32 @wp(%struct.generator* %0, i8* %1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_elem(int x) {
  switch (x) {
  case 1:
    printf("A");
    break;
  case 2:
    printf("C");
    break;
  case 3:
    printf("G");
    break;
  case 4:
    printf("T");
    break;
  default:
    printf("0");
  }
}


x86 assembly (clang, -O0):
<print_elem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     1188 <print_elem+0x78>
mov    -0x10(%rbp),%rax
lea    0xec5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
jmp    1194 <print_elem+0x84>
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
jmp    1194 <print_elem+0x84>
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
jmp    1194 <print_elem+0x84>
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
jmp    1194 <print_elem+0x84>
lea    0xe89(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_elem>:
add    $0xffffffff,%edi
mov    $0x30,%eax
cmp    $0x3,%edi
ja     112a <print_elem+0x1a>
movslq %edi,%rax
lea    0xed9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
mov    %eax,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"A\00"
@.str.1 = [2 x i8] c"C\00"
@.str.2 = [2 x i8] c"G\00"
@.str.3 = [2 x i8] c"T\00"
@.str.4 = [2 x i8] c"0\00"
define void @print_elem(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %12 [
i32 1, label %4
i32 2, label %6
i32 3, label %8
i32 4, label %10
]
4: ; preds = %1
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %14
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %14
8: ; preds = %1
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
br label %14
10: ; preds = %1
%11 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0))
br label %14
12: ; preds = %1
%13 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.4, i64 0, i64 0))
br label %14
14: ; preds = %12, %10, %8, %6, %4
ret void
}

LLVM IR (-O2):
@switch.table.print_elem = [4 x i32] [i32 65, i32 67, i32 71, i32 84]
define void @print_elem(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.print_elem, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 48, %1 ]
%10 = tail call i32 @putchar(i32 %9)
ret void
}
int is_whitespace(char c) {
  return (c == ' ' || c == '\t' || c == '\n' || c == '\r');
}


x86 assembly (clang, -O0):
<is_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_whitespace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_whitespace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_whitespace+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0xd,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_whitespace>:
cmp    $0x20,%dil
ja     1120 <is_whitespace+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100000600,%rdx
bt     %rcx,%rdx
jae    1120 <is_whitespace+0x20>
ret
xor    %eax,%eax
cmp    $0xd,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_whitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 13
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_whitespace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 10, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 13
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void rec(int *p, int i) {
  if (*p)
    return;
  else {
    (*p)++;
    i = (*p);
    p = &i;
    rec(p, i);
    return;
  }
}


x86 assembly (clang, -O0):
<rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
je     1131 <rec+0x21>
jmp    1159 <rec+0x49>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <rec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rec>:
push   %rax
cmpl   $0x0,(%rdi)
je     1118 <rec+0x8>
pop    %rax
ret
movl   $0x1,(%rdi)
movl   $0x1,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
call   1030 <rec@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @rec(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
br label %17
9: ; preds = %2
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %10
%13 = load i32*, i32** %3
%14 = load i32, i32* %13
store i32 %14, i32* %4
store i32* %4, i32** %3
%15 = load i32*, i32** %3
%16 = load i32, i32* %4
br label %17
17: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
define void @rec(i32* nocapture %0, i32 %1) {
%3 = alloca i32
%4 = load i32, i32* %0
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %2
store i32 1, i32* %0
store i32 1, i32* %3
br label %7
7: ; preds = %2, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CRT_done();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void CRT_handleSIGTERM(int sgn) {
  (void)sgn;
  CRT_done();
  exit(0);
}


x86 assembly (clang, -O0):
<CRT_handleSIGTERM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <CRT_done@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<CRT_handleSIGTERM>:
push   %rax
xor    %eax,%eax
call   1030 <CRT_done@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @CRT_handleSIGTERM(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @CRT_done()
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @CRT_handleSIGTERM(i32 %0) {
%2 = tail call i32 (...) @CRT_done()
%3 = tail call i32 @exit(i32 0)
unreachable
}
extern __attribute__((gnu_, always_)) void captainslog_debugtrap(void) {
  __asm__ volatile("int $0x03");
}


x86 assembly (clang, -O0):
<captainslog_debugtrap>:
push   %rbp
mov    %rsp,%rbp
int3
pop    %rbp
ret

x86 assembly (clang, -O2):
<captainslog_debugtrap>:
int3
ret

LLVM IR (-O0):
define void @captainslog_debugtrap() {
ret void
}

LLVM IR (-O2):
define void @captainslog_debugtrap() {
tail call void asm sideeffect "int $$0x03", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
unsigned char encode_temperature(float t) {
  if (t < -4)
    t = -4;
  t += 4;
  t = t * 250.0 / 40.0 + 0.5;
  if (t > 255)
    t = 255;
  return ((unsigned char)t);
}


x86 assembly (clang, -O0):
<encode_temperature>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1128 <encode_temperature+0x28>
movss  0xedd(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xed8(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed5(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec1(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xead(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xe87(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1193 <encode_temperature+0x93>
movss  0xe76(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_temperature>:
movss  0xef8(%rip),%xmm1
maxss  %xmm0,%xmm1
addss  0xef0(%rip),%xmm1
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
mulsd  0xeed(%rip),%xmm0
divsd  0xeed(%rip),%xmm0
addsd  0xeed(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  0xec9(%rip),%xmm1
minss  %xmm0,%xmm1
cvttss2si %xmm1,%eax
ret

LLVM IR (-O0):
define zeroext i8 @encode_temperature(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, -4.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
store float -4.000000e+00, float* %2
br label %6
6: ; preds = %5, %1
%7 = load float, float* %2
%8 = fadd float %7, 4.000000e+00
store float %8, float* %2
%9 = load float, float* %2
%10 = fpext float %9 to double
%11 = fmul double %10, 2.500000e+02
%12 = fdiv double %11, 4.000000e+01
%13 = fadd double %12, 5.000000e-01
%14 = fptrunc double %13 to float
store float %14, float* %2
%15 = load float, float* %2
%16 = fcmp ogt float %15, 2.550000e+02
br i1 %16, label %17, label %18
17: ; preds = %6
store float 2.550000e+02, float* %2
br label %18
18: ; preds = %17, %6
%19 = load float, float* %2
%20 = fptoui float %19 to i8
ret i8 %20
}

LLVM IR (-O2):
define zeroext i8 @encode_temperature(float %0) {
%2 = fcmp olt float %0, -4.000000e+00
%3 = select i1 %2, float -4.000000e+00, float %0
%4 = fadd float %3, 4.000000e+00
%5 = fpext float %4 to double
%6 = fmul double %5, 2.500000e+02
%7 = fdiv double %6, 4.000000e+01
%8 = fadd double %7, 5.000000e-01
%9 = fptrunc double %8 to float
%10 = fcmp ogt float %9, 2.550000e+02
%11 = select i1 %10, float 2.550000e+02, float %9
%12 = fptoui float %11 to i8
ret i8 %12
}
int tamAI(int mblocs) { return (mblocs / 64); }


x86 assembly (clang, -O0):
<tamAI>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<tamAI>:
lea    0x3f(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @tamAI(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 64
ret i32 %4
}

LLVM IR (-O2):
define i32 @tamAI(i32 %0) {
%2 = sdiv i32 %0, 64
ret i32 %2
}
/* Variables and functions */
int getOrigin(int);
int /*<<< orphan*/ initPersonOnFloor(int, int);
void monicaCall(void) {
  int tmp;
  {
    {
      tmp = getOrigin(4);
      initPersonOnFloor(4, tmp);
    }
    return;
  }
}


x86 assembly (clang, -O0):
<monicaCall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <getOrigin@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x4,%edi
call   1040 <initPersonOnFloor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<monicaCall>:
push   %rax
mov    $0x4,%edi
call   1030 <getOrigin@plt>
mov    $0x4,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <initPersonOnFloor@plt>

LLVM IR (-O0):
define void @monicaCall() {
%1 = alloca i32
%2 = call i32 @getOrigin(i32 4)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @initPersonOnFloor(i32 4, i32 %3)
ret void
}

LLVM IR (-O2):
define void @monicaCall() {
%1 = tail call i32 @getOrigin(i32 4)
%2 = tail call i32 @initPersonOnFloor(i32 4, i32 %1)
ret void
}
/* Type definitions */
struct ifreq {
  scalar_t__ *ifr_name;
};

/* Variables and functions */
int IFNAMSIZ;
int /*<<< orphan*/ memset(struct ifreq *, int /*<<< orphan*/, int);
int /*<<< orphan*/ strncpy(scalar_t__ *, char const *, int);
void ifc_init_ifr(const char *name, struct ifreq *ifr) {
  memset(ifr, 0, sizeof(struct ifreq));
  strncpy(ifr->ifr_name, name, IFNAMSIZ);
  ifr->ifr_name[IFNAMSIZ - 1] = 0;
}


x86 assembly (clang, -O0):
<ifc_init_ifr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x8(%rbp),%rsi
mov    0x2e8e(%rip),%rax
mov    (%rax),%edx
call   1030 <strncpy@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    0x2e79(%rip),%rcx
mov    (%rcx),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movq   $0x0,(%rax,%rcx,8)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ifc_init_ifr>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
mov    (%rbx),%rdi
mov    0x2e9c(%rip),%r15
mov    (%r15),%edx
mov    %r14,%rsi
call   1030 <strncpy@plt>
mov    (%rbx),%rax
movslq (%r15),%rcx
movq   $0x0,-0x8(%rax,%rcx,8)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.ifreq = type { i64* }
@IFNAMSIZ = global i32 0
define void @ifc_init_ifr(i8* %0, %struct.ifreq* %1) {
%3 = alloca i8*
%4 = alloca %struct.ifreq*
store i8* %0, i8** %3
store %struct.ifreq* %1, %struct.ifreq** %4
%5 = load %struct.ifreq*, %struct.ifreq** %4
%6 = call i32 @memset(%struct.ifreq* %5, i32 0, i32 8)
%7 = load %struct.ifreq*, %struct.ifreq** %4
%8 = getelementptr inbounds %struct.ifreq, %struct.ifreq* %7, i32 0, i32 0
%9 = load i64*, i64** %8
%10 = load i8*, i8** %3
%11 = load i32, i32* @IFNAMSIZ
%12 = call i32 @strncpy(i64* %9, i8* %10, i32 %11)
%13 = load %struct.ifreq*, %struct.ifreq** %4
%14 = getelementptr inbounds %struct.ifreq, %struct.ifreq* %13, i32 0, i32 0
%15 = load i64*, i64** %14
%16 = load i32, i32* @IFNAMSIZ
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i64, i64* %15, i64 %18
store i64 0, i64* %19
ret void
}

LLVM IR (-O2):
%struct.ifreq = type { i64* }
@IFNAMSIZ = global i32 0
define void @ifc_init_ifr(i8* %0, %struct.ifreq* %1) {
%3 = tail call i32 @memset(%struct.ifreq* %1, i32 0, i32 8)
%4 = getelementptr inbounds %struct.ifreq, %struct.ifreq* %1, i64 0, i32 0
%5 = load i64*, i64** %4
%6 = load i32, i32* @IFNAMSIZ
%7 = tail call i32 @strncpy(i64* %5, i8* %0, i32 %6)
%8 = load i64*, i64** %4
%9 = load i32, i32* @IFNAMSIZ
%10 = add nsw i32 %9, -1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %8, i64 %11
store i64 0, i64* %12
ret void
}
signed int f44(signed long long v_x) {
  signed long long v_shr4 = ((unsigned long long)v_x) >> 12;
  signed int v_conv = (unsigned int)v_shr4;
  signed int v_and = v_conv & 10;
  return v_and;
}


x86 assembly (clang, -O0):
<f44>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0xc,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0xa,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f44>:
mov    %rdi,%rax
shr    $0xc,%eax
and    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @f44(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i64 %0, i64* %2
%6 = load i64, i64* %2
%7 = lshr i64 %6, 12
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = and i32 %10, 10
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @f44(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = lshr i32 %2, 12
%4 = and i32 %3, 10
ret i32 %4
}
int main(void) {
  int a;
  for (a = 0; a < 10; a++)
    ;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    112f <main+0x2f>
jmp    1121 <main+0x21>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %3
10: ; preds = %3
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
ret i32 10
}
/* Variables and functions */
int /*<<< orphan*/ dice_init();
int rand();
void rollnd(int *r, int n, int d) {
  int i;
  dice_init();
  for (i = 0; i < n; i++) {
    r[i] = (rand() % d) + 1;
  }
}


x86 assembly (clang, -O0):
<rollnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x0,%al
call   1030 <dice_init@plt>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1173 <rollnd+0x53>
mov    $0x0,%al
call   1040 <rand@plt>
cltd
idivl  -0x10(%rbp)
add    $0x1,%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1140 <rollnd+0x20>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rollnd>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %edx,%r15d
mov    %esi,%r14d
mov    %rdi,%r12
xor    %eax,%eax
call   1030 <dice_init@plt>
test   %r14d,%r14d
jle    116b <rollnd+0x4b>
mov    %r14d,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <rand@plt>
cltd
idiv   %r15d
add    $0x1,%edx
mov    %edx,(%r12,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%rbp
jne    1150 <rollnd+0x30>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @rollnd(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = call i32 (...) @dice_init()
store i32 0, i32* %7
br label %9
9: ; preds = %22, %3
%10 = load i32, i32* %7
%11 = load i32, i32* %5
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = call i32 (...) @rand()
%15 = load i32, i32* %6
%16 = srem i32 %14, %15
%17 = add nsw i32 %16, 1
%18 = load i32*, i32** %4
%19 = load i32, i32* %7
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
br label %22
22: ; preds = %13
%23 = load i32, i32* %7
%24 = add nsw i32 %23, 1
store i32 %24, i32* %7
br label %9
25: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @rollnd(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @dice_init()
%5 = icmp sgt i32 %1, 0
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = zext i32 %1 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %14, %8 ]
%10 = tail call i32 (...) @rand()
%11 = srem i32 %10, %2
%12 = add nsw i32 %11, 1
%13 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %12, i32* %13
%14 = add nuw nsw i64 %9, 1
%15 = icmp eq i64 %14, %7
br i1 %15, label %16, label %8
16: ; preds = %8, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ nums;

/* Variables and functions */
int jump(int *, int);
int printf(char *, int);
int main(int argc, char *argv[]) {
  int nums[] = {
      1, 1, 1, 1, 1, 1, 1, 1,
  };
  int size = sizeof(nums) / 4;
  int ret = jump(nums, size);
  return printf("%d\n", ret);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xec3(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec0(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xebd(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeba(%rip),%rax
mov    %rax,-0x18(%rbp)
movl   $0x8,-0x34(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1040 <jump@plt>
mov    %eax,-0x38(%rbp)
mov    -0x38(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x8,%esi
call   1040 <jump@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.nums = [8 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [8 x i32]
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = bitcast [8 x i32]* %6 to i8*
store i32 8, i32* %7
%10 = getelementptr inbounds [8 x i32], [8 x i32]* %6, i64 0, i64 0
%11 = load i32, i32* %7
%12 = call i32 @jump(i32* %10, i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %13)
ret i32 %14
}

LLVM IR (-O2):
@__const.main.nums = [8 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [8 x i32]
%4 = bitcast [8 x i32]* %3 to i8*
%5 = getelementptr inbounds [8 x i32], [8 x i32]* %3, i64 0, i64 0
%6 = call i32 @jump(i32* %5, i32 8)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ eputc(int);
void eputnegd(int i) {
  int j = i / 10;
  if (j) {
    eputnegd(j);
  }
  eputc('0' - i % 10);
}


x86 assembly (clang, -O0):
<eputnegd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     114b <eputnegd+0x2b>
mov    -0x8(%rbp),%edi
call   1030 <eputnegd@plt>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0x30,%edi
sub    %edx,%edi
call   1040 <eputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eputnegd>:
push   %rbx
lea    0x9(%rdi),%eax
movslq %edi,%rbx
cmp    $0x13,%eax
jb     1145 <eputnegd+0x25>
imul   $0x66666667,%rbx,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
sar    $0x22,%rdi
add    %eax,%edi
call   1030 <eputnegd@plt>
imul   $0x66666667,%rbx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%edi
sub    %ebx,%edi
add    $0x30,%edi
pop    %rbx
jmp    1040 <eputc@plt>

LLVM IR (-O0):
define void @eputnegd(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 10
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %3
br label %10
10: ; preds = %8, %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 10
%13 = sub nsw i32 48, %12
%14 = call i32 @eputc(i32 %13)
ret void
}

LLVM IR (-O2):
define void @eputnegd(i32 %0) {
%2 = add i32 %0, 9
%3 = icmp ult i32 %2, 19
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = sdiv i32 %0, 10
tail call void @eputnegd(i32 %5)
br label %6
6: ; preds = %4, %1
%7 = srem i32 %0, 10
%8 = sub nsw i32 48, %7
%9 = tail call i32 @eputc(i32 %8)
ret void
}
/* Variables and functions */
char *strtok_r(char *, char *, char **);
unsigned int count_msrs(char *env_cores) {
  unsigned int ncores;
  char *saveptr;
  char *tok = strtok_r(env_cores, ", :;|", &saveptr);
  for (ncores = 0; tok; ncores++) {
    tok = strtok_r(NULL, ", :;|", &saveptr);
  }
  return ncores;
}


x86 assembly (clang, -O0):
<count_msrs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <strtok_r@plt>
mov    %rax,-0x20(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     116c <count_msrs+0x5c>
xor    %eax,%eax
mov    %eax,%edi
lea    0xeaf(%rip),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <strtok_r@plt>
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <count_msrs+0x2b>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_msrs>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xee0(%rip),%rsi
lea    0x8(%rsp),%rdx
call   1030 <strtok_r@plt>
xor    %ebx,%ebx
test   %rax,%rax
je     1155 <count_msrs+0x45>
lea    0xec8(%rip),%r14
lea    0x8(%rsp),%r15
nopl   (%rax)
xor    %edi,%edi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <strtok_r@plt>
add    $0x1,%ebx
test   %rax,%rax
jne    1140 <count_msrs+0x30>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [6 x i8] c", :;|\00"
define i32 @count_msrs(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i8* @strtok_r(i8* %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %4)
store i8* %7, i8** %5
store i32 0, i32* %3
br label %8
8: ; preds = %13, %1
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %16
11: ; preds = %8
%12 = call i8* @strtok_r(i8* null, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %4)
store i8* %12, i8** %5
br label %13
13: ; preds = %11
%14 = load i32, i32* %3
%15 = add i32 %14, 1
store i32 %15, i32* %3
br label %8
16: ; preds = %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [6 x i8] c", :;|\00"
define i32 @count_msrs(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = call i8* @strtok_r(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2)
%5 = icmp eq i8* %4, null
br i1 %5, label %11, label %6
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ 0, %1 ]
%8 = call i8* @strtok_r(i8* null, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2)
%9 = add i32 %7, 1
%10 = icmp eq i8* %8, null
br i1 %10, label %11, label %6
11: ; preds = %6, %1
%12 = phi i32 [ 0, %1 ], [ %9, %6 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int /*<<< orphan*/ uint32_t;
struct rnet_message {
  int dummy;
};

/* Variables and functions */
int add_field(struct rnet_message **, char *, int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ htonl(int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int rnet_message_add_u32(struct rnet_message **msg, char *key, uint32_t val) {
  uint32_t nval = htonl(val);
  return add_field(msg, key, strlen(key), (char *)&nval, sizeof(val));
}


x86 assembly (clang, -O0):
<rnet_message_add_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1050 <htonl@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
lea    -0x18(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <add_field@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnet_message_add_u32>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %edx,%edi
call   1050 <htonl@plt>
mov    %eax,0x4(%rsp)
mov    %rbx,%rdi
call   1040 <strlen@plt>
lea    0x4(%rsp),%rcx
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
mov    $0x4,%r8d
call   1030 <add_field@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.rnet_message = type { i32 }
define i32 @rnet_message_add_u32(%struct.rnet_message** %0, i8* %1, i32 %2) {
%4 = alloca %struct.rnet_message**
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store %struct.rnet_message** %0, %struct.rnet_message*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @htonl(i32 %8)
store i32 %9, i32* %7
%10 = load %struct.rnet_message**, %struct.rnet_message*** %4
%11 = load i8*, i8** %5
%12 = load i8*, i8** %5
%13 = call i32 @strlen(i8* %12)
%14 = bitcast i32* %7 to i8*
%15 = call i32 @add_field(%struct.rnet_message** %10, i8* %11, i32 %13, i8* %14, i32 4)
ret i32 %15
}

LLVM IR (-O2):
%struct.rnet_message = type { i32 }
define i32 @rnet_message_add_u32(%struct.rnet_message** %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = tail call i32 @htonl(i32 %2)
store i32 %6, i32* %4
%7 = tail call i32 @strlen(i8* %1)
%8 = call i32 @add_field(%struct.rnet_message** %0, i8* %1, i32 %7, i8* %5, i32 4)
ret i32 %8
}
int debug_printf(const char *format, ...) { return 0; }


x86 assembly (clang, -O0):
<debug_printf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_printf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @debug_printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @debug_printf(i8* nocapture readnone %0, ...) {
ret i32 0
}
int is_gbk(int ch) {
  if (ch < 0)
    return 0;
  unsigned char *c;
  c = (unsigned char *)&ch;
  if (c[0] >= 0x81 && c[0] <= 0xef) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_gbk>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <is_gbk+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    115c <is_gbk+0x5c>
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x81,%eax
jl     1155 <is_gbk+0x55>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0xef,%eax
jg     1155 <is_gbk+0x55>
movl   $0x1,-0x4(%rbp)
jmp    115c <is_gbk+0x5c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_gbk>:
movzbl %dil,%eax
test   %edi,%edi
setns  %cl
add    $0xffffff7f,%eax
cmp    $0x6f,%eax
setb   %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_gbk(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %23
8: ; preds = %1
%9 = bitcast i32* %3 to i8*
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = icmp sge i32 %13, 129
br i1 %14, label %15, label %22
15: ; preds = %8
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i64 0
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = icmp sle i32 %19, 239
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 1, i32* %2
br label %23
22: ; preds = %15, %8
store i32 0, i32* %2
br label %23
23: ; preds = %22, %21, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_gbk(i32 %0) {
%2 = and i32 %0, 255
%3 = icmp sgt i32 %0, -1
%4 = add nsw i32 %2, -129
%5 = icmp ult i32 %4, 111
%6 = select i1 %3, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help(void) {
  printf("Usage: memclinger OPTION [OPTIONS ...]\n"
         "\n"
         "Options:\n"
         "  -d DESC    Memory allocation description.\n"
         "             FORMAT := SIZE\n"
         "             SIZE   := NUM UNIT\n"
         "             NUM    := [1-9] [0-9]*\n"
         "             UNIT   := ( 'k' | 'K' | 'm' | 'M' | 'g' | 'G' ) ( 'b' | "
         "'B' )?\n"
         "  -w         Periodically write meaningless values to memory "
         "regions.\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [336 x i8] c"Usage: memclinger OPTION [OPTIONS ...]\0A\0AOptions:\0A -d DESC Memory allocation description.\0A FORMAT := SIZE\0A SIZE := NUM UNIT\0A NUM := [1-9] [0-9]*\0A UNIT := ( 'k' | 'K' | 'm' | 'M' | 'g' | 'G' ) ( 'b' | 'B' )?\0A -w Periodically write meaningless values to memory regions.\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([336 x i8], [336 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [335 x i8] c"Usage: memclinger OPTION [OPTIONS ...]\0A\0AOptions:\0A -d DESC Memory allocation description.\0A FORMAT := SIZE\0A SIZE := NUM UNIT\0A NUM := [1-9] [0-9]*\0A UNIT := ( 'k' | 'K' | 'm' | 'M' | 'g' | 'G' ) ( 'b' | 'B' )?\0A -w Periodically write meaningless values to memory regions.\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([335 x i8], [335 x i8]* @str, i64 0, i64 0))
ret void
}