xunge/DecIR huggingface dataset:
void __libc_message(int do_abort, const char *fmt, ...) {}


x86 assembly (clang, -O0):
<__libc_message>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_message>:
ret

LLVM IR (-O0):
define void @__libc_message(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__libc_message(i32 %0, i8* nocapture %1, ...) {
ret void
}
void sd_dif_config_host(struct scsi_disk *disk) {}


x86 assembly (clang, -O0):
<sd_dif_config_host>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_dif_config_host>:
ret

LLVM IR (-O0):
%struct.scsi_disk = type opaque
define void @sd_dif_config_host(%struct.scsi_disk* %0) {
%2 = alloca %struct.scsi_disk*
store %struct.scsi_disk* %0, %struct.scsi_disk** %2
ret void
}

LLVM IR (-O2):
%struct.scsi_disk = type opaque
define void @sd_dif_config_host(%struct.scsi_disk* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ drawBoard();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ initCurses();
scalar_t__ playGame();
int main() {
  do {
    initCurses();
    drawBoard();
  } while (playGame());
  endwin();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <initCurses@plt>
mov    $0x0,%al
call   1030 <drawBoard@plt>
mov    $0x0,%al
call   1060 <playGame@plt>
cmp    $0x0,%rax
jne    114f <main+0xf>
mov    $0x0,%al
call   1050 <endwin@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <initCurses@plt>
xor    %eax,%eax
call   1030 <drawBoard@plt>
xor    %eax,%eax
call   1060 <playGame@plt>
test   %rax,%rax
jne    1150 <main+0x10>
xor    %eax,%eax
call   1050 <endwin@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %5, %0
%3 = call i32 (...) @initCurses()
%4 = call i32 (...) @drawBoard()
br label %5
5: ; preds = %2
%6 = call i64 (...) @playGame()
%7 = icmp ne i64 %6, 0
br i1 %7, label %2, label %8
8: ; preds = %5
%9 = call i32 (...) @endwin()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @initCurses()
%3 = tail call i32 (...) @drawBoard()
%4 = tail call i64 (...) @playGame()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %1
6: ; preds = %1
%7 = tail call i32 (...) @endwin()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ change_ptr(void *, int /*<<< orphan*/ *);
void remove_ptr(void *ptr) { change_ptr(ptr, NULL); }


x86 assembly (clang, -O0):
<remove_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <change_ptr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_ptr>:
xor    %esi,%esi
jmp    1030 <change_ptr@plt>

LLVM IR (-O0):
define void @remove_ptr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @change_ptr(i8* %3, i32* null)
ret void
}

LLVM IR (-O2):
define void @remove_ptr(i8* %0) {
%2 = tail call i32 @change_ptr(i8* %0, i32* null)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t h264avcc_get_level(const uint8_t *p) { return p[3]; }


x86 assembly (clang, -O0):
<h264avcc_get_level>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h264avcc_get_level>:
mov    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @h264avcc_get_level(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @h264avcc_get_level(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
ret i32 %3
}
unsigned int thermo_temp_to_hex(char temp) {
  unsigned int ret = temp;
  ret &= 0xFF;
  ret <<= 8;
  ;
  return ret;
}


x86 assembly (clang, -O0):
<thermo_temp_to_hex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thermo_temp_to_hex>:
movzbl %dil,%eax
shl    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @thermo_temp_to_hex(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 255
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = shl i32 %8, 8
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @thermo_temp_to_hex(i8 signext %0) {
%2 = zext i8 %0 to i32
%3 = shl nuw nsw i32 %2, 8
ret i32 %3
}
void getTime() {}


x86 assembly (clang, -O0):
<getTime>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTime>:
ret

LLVM IR (-O0):
define void @getTime() {
ret void
}

LLVM IR (-O2):
define void @getTime() {
ret void
}
int main() {
  const int a = 2;
  int b[a];
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 0, i32* %1
store i32 2, i32* %2
%4 = call i8* @llvm.stacksave()
store i8* %4, i8** %3
%5 = alloca i32, i64 2
store i32 0, i32* %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int imax(int a, int b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<imax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <imax+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <imax+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imax>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @imax(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @imax(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void socketClose(int handle) { close(handle); }


x86 assembly (clang, -O0):
<socketClose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socketClose>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @socketClose(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @socketClose(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
void nat_traversal_change_port_lookup(struct msg_digest *md, struct state *st) {
}


x86 assembly (clang, -O0):
<nat_traversal_change_port_lookup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nat_traversal_change_port_lookup>:
ret

LLVM IR (-O0):
%struct.msg_digest = type opaque
%struct.state = type opaque
define void @nat_traversal_change_port_lookup(%struct.msg_digest* %0, %struct.state* %1) {
%3 = alloca %struct.msg_digest*
%4 = alloca %struct.state*
store %struct.msg_digest* %0, %struct.msg_digest** %3
store %struct.state* %1, %struct.state** %4
ret void
}

LLVM IR (-O2):
%struct.msg_digest = type opaque
%struct.state = type opaque
define void @nat_traversal_change_port_lookup(%struct.msg_digest* nocapture %0, %struct.state* nocapture %1) {
ret void
}
int test_imm_C4int8_reg(signed char val) {
  return ((val) & (-0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff3c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4int8_reg>:
test   $0xffffff3c,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -196
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C4int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -196
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int write(int, char *, int);
void ping(int pipe) {
  ssize_t bytes_written;
  while ((bytes_written = write(pipe, "*", 1)) == -1 && (errno == EINTR)) {
  }
}


x86 assembly (clang, -O0):
<ping>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %eax,%ecx
mov    %ecx,-0x8(%rbp)
xor    %eax,%eax
cmp    $0xffffffff,%ecx
mov    %al,-0x9(%rbp)
jne    115c <ping+0x4c>
mov    0x2e97(%rip),%rax
mov    (%rax),%rax
mov    0x2e85(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    116c <ping+0x5c>
jmp    1171 <ping+0x61>
jmp    111b <ping+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ping>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0xedf(%rip),%r14
mov    0x2eb8(%rip),%r15
mov    0x2ea9(%rip),%r12
nop
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0xffffffff,%eax
jne    114d <ping+0x3d>
mov    (%r12),%rax
cmp    %rax,(%r15)
je     1130 <ping+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [2 x i8] c"*\00"
@errno = global i64 0
@EINTR = global i64 0
define void @ping(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = call i32 @write(i32 %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
store i32 %6, i32* %3
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = load i64, i64* @errno
%10 = load i64, i64* @EINTR
%11 = icmp eq i64 %9, %10
br label %12
12: ; preds = %8, %4
%13 = phi i1 [ false, %4 ], [ %11, %8 ]
br i1 %13, label %14, label %15
14: ; preds = %12
br label %4
15: ; preds = %12
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"*\00"
@errno = global i64 0
@EINTR = global i64 0
define void @ping(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @write(i32 %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = icmp eq i32 %3, -1
%5 = load i64, i64* @errno
%6 = load i64, i64* @EINTR
%7 = icmp eq i64 %5, %6
%8 = select i1 %4, i1 %7, i1 false
br i1 %8, label %2, label %9
9: ; preds = %2
ret void
}
/* Variables and functions */
int calculate(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("calculate = %d\n", calculate(3));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
call   1040 <calculate@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1040 <calculate@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"calculate = %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @calculate(i32 3)
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"calculate = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @calculate(i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int transport_listen(struct transport_addr *lsten) { return 0; }


x86 assembly (clang, -O0):
<transport_listen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<transport_listen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.transport_addr = type opaque
define i32 @transport_listen(%struct.transport_addr* %0) {
%2 = alloca %struct.transport_addr*
store %struct.transport_addr* %0, %struct.transport_addr** %2
ret i32 0
}

LLVM IR (-O2):
%struct.transport_addr = type opaque
define i32 @transport_listen(%struct.transport_addr* nocapture readnone %0) {
ret i32 0
}
void Net_HttpServerShutdown(void) {}


x86 assembly (clang, -O0):
<Net_HttpServerShutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Net_HttpServerShutdown>:
ret

LLVM IR (-O0):
define void @Net_HttpServerShutdown() {
ret void
}

LLVM IR (-O2):
define void @Net_HttpServerShutdown() {
ret void
}
void serial1_handler(void) {}


x86 assembly (clang, -O0):
<serial1_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial1_handler>:
ret

LLVM IR (-O0):
define void @serial1_handler() {
ret void
}

LLVM IR (-O2):
define void @serial1_handler() {
ret void
}
void gpio_keypad_inactive(void) {}


x86 assembly (clang, -O0):
<gpio_keypad_inactive>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_keypad_inactive>:
ret

LLVM IR (-O0):
define void @gpio_keypad_inactive() {
ret void
}

LLVM IR (-O2):
define void @gpio_keypad_inactive() {
ret void
}
int test_imm_7Cuint16_mem(unsigned short *val) {
  return ((*val) & (-0x7C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Cuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff84,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Cuint16_mem>:
movzwl (%rdi),%eax
test   $0xff84,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Cuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -124
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Cuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -124
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
char *strtok(char *, char *);
void parse_spec(char *s, char **fname, char **list) {
  ;
  *fname = strtok(s, ":");
  *list = strtok(NULL, "");
  if (*list == NULL)
    *list = "!";
  ;
}


x86 assembly (clang, -O0):
<parse_spec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <strtok@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
mov    %eax,%edi
lea    0xeba(%rip),%rsi
call   1030 <strtok@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1174 <parse_spec+0x64>
mov    -0x18(%rbp),%rax
lea    0xe91(%rip),%rcx
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_spec>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
lea    0xedf(%rip),%rsi
call   1030 <strtok@plt>
mov    %rax,(%rbx)
lea    0xed3(%rip),%rsi
xor    %edi,%edi
call   1030 <strtok@plt>
test   %rax,%rax
lea    0xec1(%rip),%rcx
cmovne %rax,%rcx
mov    %rcx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c":\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [2 x i8] c"!\00"
define void @parse_spec(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8*, i8** %4
%8 = call i8* @strtok(i8* %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%9 = load i8**, i8*** %5
store i8* %8, i8** %9
%10 = call i8* @strtok(i8* null, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
%11 = load i8**, i8*** %6
store i8* %10, i8** %11
%12 = load i8**, i8*** %6
%13 = load i8*, i8** %12
%14 = icmp eq i8* %13, null
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i8**, i8*** %6
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0), i8** %16
br label %17
17: ; preds = %15, %3
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c":\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [2 x i8] c"!\00"
define void @parse_spec(i8* %0, i8** nocapture writeonly %1, i8** nocapture writeonly %2) {
%4 = tail call i8* @strtok(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %4, i8** %1
%5 = tail call i8* @strtok(i8* null, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i8* %5, null
%7 = select i1 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0), i8* %5
store i8* %7, i8** %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M136_f(char *s) {
  debug("M136_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M136_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M136_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M136_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M136_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M136_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M136_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int isempty(struct node *head) {
  if (head == NULL) {
    return 0;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<isempty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <isempty+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1126 <isempty+0x26>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isempty>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define i32 @isempty(%struct.node* %0) {
%2 = alloca i32
%3 = alloca %struct.node*
store %struct.node* %0, %struct.node** %3
%4 = load %struct.node*, %struct.node** %3
%5 = icmp eq %struct.node* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
%struct.node = type { i32 }
define i32 @isempty(%struct.node* readnone %0) {
%2 = icmp ne %struct.node* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char *, unsigned int);
unsigned char *sv_LoadToBuffer(unsigned char *SourceBuffer, unsigned int Offset,
                               unsigned int Size) {
  unsigned char *TargetBuffer = (unsigned char *)malloc(sizeof(char) * Size);
  memcpy(TargetBuffer, &SourceBuffer[Offset], Size);
  return TargetBuffer;
}


x86 assembly (clang, -O0):
<sv_LoadToBuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%eax
add    %rax,%rsi
mov    -0x10(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sv_LoadToBuffer>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%r15d
mov    %rdi,%r14
mov    %edx,%edi
call   1040 <malloc@plt>
mov    %rax,%rbp
mov    %r15d,%esi
add    %r14,%rsi
mov    %rax,%rdi
mov    %ebx,%edx
call   1030 <memcpy@plt>
mov    %rbp,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8* @sv_LoadToBuffer(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = zext i32 %8 to i64
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i64 @malloc(i32 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %7
%14 = load i8*, i8** %7
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i32, i32* %6
%20 = call i32 @memcpy(i8* %14, i8* %18, i32 %19)
%21 = load i8*, i8** %7
ret i8* %21
}

LLVM IR (-O2):
define i8* @sv_LoadToBuffer(i8* %0, i32 %1, i32 %2) {
%4 = tail call i64 @malloc(i32 %2)
%5 = inttoptr i64 %4 to i8*
%6 = zext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = tail call i32 @memcpy(i8* %5, i8* %7, i32 %2)
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ read(int, char *, size_t);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
int forward(int orig, int dest, char *buffer, size_t len) {
  ssize_t bytes;
  while ((bytes = read(orig, buffer, len)) > 0)
    write(dest, buffer, bytes);
  return len;
}


x86 assembly (clang, -O0):
<forward>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <read@plt>
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
jle    1166 <forward+0x46>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <write@plt>
jmp    1136 <forward+0x16>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forward>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %esi,%r15d
mov    %edi,%ebp
mov    %rdx,%rsi
mov    %rcx,%rdx
nopl   0x0(%rax,%rax,1)
call   1040 <read@plt>
test   %eax,%eax
jle    1160 <forward+0x40>
mov    %r15d,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
jmp    1140 <forward+0x20>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @forward(i32 %0, i32 %1, i8* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
br label %10
10: ; preds = %16, %4
%11 = load i32, i32* %5
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = call i32 @read(i32 %11, i8* %12, i64 %13)
store i32 %14, i32* %9
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %10
%17 = load i32, i32* %6
%18 = load i8*, i8** %7
%19 = load i32, i32* %9
%20 = call i32 @write(i32 %17, i8* %18, i32 %19)
br label %10
21: ; preds = %10
%22 = load i64, i64* %8
%23 = trunc i64 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @forward(i32 %0, i32 %1, i8* nocapture %2, i64 %3) {
%5 = tail call i32 @read(i32 %0, i8* %2, i64 %3)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4, %7
%8 = phi i32 [ %10, %7 ], [ %5, %4 ]
%9 = tail call i32 @write(i32 %1, i8* %2, i32 %8)
%10 = tail call i32 @read(i32 %0, i8* %2, i64 %3)
%11 = icmp sgt i32 %10, 0
br i1 %11, label %7, label %12
12: ; preds = %7, %4
%13 = trunc i64 %3 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ LRDP(char *);
void uc9_mix() { LRDP("uc9:mix IGNORED\n"); }


x86 assembly (clang, -O0):
<uc9_mix>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <LRDP@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uc9_mix>:
lea    0xee9(%rip),%rdi
jmp    1030 <LRDP@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"uc9:mix IGNORED\0A\00"
define void @uc9_mix() {
%1 = call i32 @LRDP(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"uc9:mix IGNORED\0A\00"
define void @uc9_mix() {
%1 = tail call i32 @LRDP(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
void ff_hevc_put_hevc_uni_w_epel_h8_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h8_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h8_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h8_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h8_12_sse4() {
ret void
}
int _eml_parse822_is_space(char c) { return c == ' '; }


x86 assembly (clang, -O0):
<_eml_parse822_is_space>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x20,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_eml_parse822_is_space>:
xor    %eax,%eax
cmp    $0x20,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_eml_parse822_is_space(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @_eml_parse822_is_space(i8 signext %0) {
%2 = icmp eq i8 %0, 32
%3 = zext i1 %2 to i32
ret i32 %3
}
void RSA_null_method(void) {}


x86 assembly (clang, -O0):
<RSA_null_method>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_null_method>:
ret

LLVM IR (-O0):
define void @RSA_null_method() {
ret void
}

LLVM IR (-O2):
define void @RSA_null_method() {
ret void
}
void TMTimerFromMicro(void) {}


x86 assembly (clang, -O0):
<TMTimerFromMicro>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TMTimerFromMicro>:
ret

LLVM IR (-O0):
define void @TMTimerFromMicro() {
ret void
}

LLVM IR (-O2):
define void @TMTimerFromMicro() {
ret void
}
/* Variables and functions */
void *mmap(void *, size_t, int, int, int, int);
void *Hmmap(void *a, size_t l, int p, int f, int fd, int o) {
  return mmap(a, l, p, (f & 0x1f) | (f & 32 ? 0x1000 : 0), fd, o);
}


x86 assembly (clang, -O0):
<Hmmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
and    $0x1f,%ecx
mov    -0x18(%rbp),%r9d
and    $0x20,%r9d
xor    %eax,%eax
mov    $0x1000,%r8d
cmp    $0x0,%r9d
cmovne %r8d,%eax
or     %eax,%ecx
mov    -0x1c(%rbp),%r8d
mov    -0x20(%rbp),%r9d
call   1030 <mmap@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hmmap>:
mov    %ecx,%eax
and    $0x1f,%eax
and    $0x20,%ecx
shl    $0x7,%ecx
or     %eax,%ecx
jmp    1030 <mmap@plt>

LLVM IR (-O0):
define i8* @Hmmap(i8* %0, i64 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i8* %0, i8** %7
store i64 %1, i64* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i8*, i8** %7
%14 = load i64, i64* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = and i32 %16, 31
%18 = load i32, i32* %10
%19 = and i32 %18, 32
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 4096, i32 0
%23 = or i32 %17, %22
%24 = load i32, i32* %11
%25 = load i32, i32* %12
%26 = call i8* @mmap(i8* %13, i64 %14, i32 %15, i32 %23, i32 %24, i32 %25)
ret i8* %26
}

LLVM IR (-O2):
define i8* @Hmmap(i8* %0, i64 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = and i32 %3, 31
%8 = shl i32 %3, 7
%9 = and i32 %8, 4096
%10 = or i32 %9, %7
%11 = tail call i8* @mmap(i8* %0, i64 %1, i32 %2, i32 %10, i32 %4, i32 %5)
ret i8* %11
}
/* Type definitions */
struct uevent {
  int dummy;
};

/* Variables and functions */
int uevent_get_env_positive_int(struct uevent const *, char *);
int uevent_get_minor(const struct uevent *uev) {
  return uevent_get_env_positive_int(uev, "MINOR");
}


x86 assembly (clang, -O0):
<uevent_get_minor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <uevent_get_env_positive_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uevent_get_minor>:
lea    0xee9(%rip),%rsi
jmp    1030 <uevent_get_env_positive_int@plt>

LLVM IR (-O0):
%struct.uevent = type { i32 }
@.str = [6 x i8] c"MINOR\00"
define i32 @uevent_get_minor(%struct.uevent* %0) {
%2 = alloca %struct.uevent*
store %struct.uevent* %0, %struct.uevent** %2
%3 = load %struct.uevent*, %struct.uevent** %2
%4 = call i32 @uevent_get_env_positive_int(%struct.uevent* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
%struct.uevent = type { i32 }
@.str = [6 x i8] c"MINOR\00"
define i32 @uevent_get_minor(%struct.uevent* %0) {
%2 = tail call i32 @uevent_get_env_positive_int(%struct.uevent* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  int dummy;
};

/* Variables and functions */
int gettimeofday(struct timeval *, struct timezone *);
int main(void) {
  struct timeval tv;
  struct timezone tz;
  return gettimeofday(&tv, &tz);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <gettimeofday@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <gettimeofday@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
%struct.timezone = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.timeval
%3 = alloca %struct.timezone
store i32 0, i32* %1
%4 = call i32 @gettimeofday(%struct.timeval* %2, %struct.timezone* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
%struct.timezone = type { i32 }
define i32 @main() {
%1 = alloca %struct.timeval
%2 = alloca %struct.timezone
%3 = bitcast %struct.timeval* %1 to i8*
%4 = bitcast %struct.timezone* %2 to i8*
%5 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ invalid_phase(char *);
void phase_4(char *input) { invalid_phase("4c"); }


x86 assembly (clang, -O0):
<phase_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <invalid_phase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phase_4>:
lea    0xee9(%rip),%rdi
jmp    1030 <invalid_phase@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"4c\00"
define void @phase_4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"4c\00"
define void @phase_4(i8* nocapture readnone %0) {
%2 = tail call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
void irq_enable(void) { asm volatile("sti" ::: "memory"); }


x86 assembly (clang, -O0):
<irq_enable>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_enable>:
sti
ret

LLVM IR (-O0):
define void @irq_enable() {
ret void
}

LLVM IR (-O2):
define void @irq_enable() {
tail call void asm sideeffect "sti", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OS_TaskRegister();
void task_7(void) {
  OS_TaskRegister();
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<task_7>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OS_TaskRegister@plt>
jmp    111b <task_7+0xb>

x86 assembly (clang, -O2):
<task_7>:
push   %rax
xor    %eax,%eax
call   1030 <OS_TaskRegister@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <task_7+0x10>

LLVM IR (-O0):
define void @task_7() {
%1 = call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @task_7() {
%1 = tail call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}
int isOrop(char c) { return '|' == c || '~' == c; }


x86 assembly (clang, -O0):
<isOrop>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
mov    $0x1,%al
mov    $0x7c,%ecx
cmp    %edx,%ecx
mov    %al,-0x2(%rbp)
je     1131 <isOrop+0x31>
movsbl -0x1(%rbp),%ecx
mov    $0x7e,%eax
cmp    %ecx,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isOrop>:
and    $0xfd,%dil
xor    %eax,%eax
cmp    $0x7c,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isOrop(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 124, %4
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 126, %8
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isOrop(i8 signext %0) {
%2 = and i8 %0, -3
%3 = icmp eq i8 %2, 124
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ sc(int /*<<< orphan*/, int);
int main(int argc, char **argv) { return (int)sc(0, 1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <sc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <sc@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 @sc(i32 0, i32 1)
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @sc(i32 0, i32 1)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EOF;
int /*<<< orphan*/ assert(int /*<<< orphan*/ *);
scalar_t__ fputc(char, int /*<<< orphan*/ *);
int IO_Write_BYTE(char value, FILE *fp) {
  assert(fp);
  return (fputc(value, fp) != EOF);
}


x86 assembly (clang, -O0):
<IO_Write_BYTE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movsbl %al,%edi
call   1030 <fputc@plt>
mov    0x2e97(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IO_Write_BYTE>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <assert@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1030 <fputc@plt>
mov    0x2ea7(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@EOF = global i64 0
define i32 @IO_Write_BYTE(i8 signext %0, i32* %1) {
%3 = alloca i8
%4 = alloca i32*
store i8 %0, i8* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @assert(i32* %5)
%7 = load i8, i8* %3
%8 = load i32*, i32** %4
%9 = call i64 @fputc(i8 signext %7, i32* %8)
%10 = load i64, i64* @EOF
%11 = icmp ne i64 %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@EOF = global i64 0
define i32 @IO_Write_BYTE(i8 signext %0, i32* %1) {
%3 = tail call i32 @assert(i32* %1)
%4 = tail call i64 @fputc(i8 signext %0, i32* %1)
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
void enable_int() { asm("sti"); }


x86 assembly (clang, -O0):
<enable_int>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_int>:
sti
ret

LLVM IR (-O0):
define void @enable_int() {
ret void
}

LLVM IR (-O2):
define void @enable_int() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ displaySetReset(int);
int /*<<< orphan*/ displayWriteData();
void displayReset() {
  displaySetReset(1);
  displaySetReset(0);
  displayWriteData();
}


x86 assembly (clang, -O0):
<displayReset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <displaySetReset@plt>
xor    %edi,%edi
call   1030 <displaySetReset@plt>
mov    $0x0,%al
call   1040 <displayWriteData@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<displayReset>:
push   %rax
mov    $0x1,%edi
call   1030 <displaySetReset@plt>
xor    %edi,%edi
call   1030 <displaySetReset@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <displayWriteData@plt>

LLVM IR (-O0):
define void @displayReset() {
%1 = call i32 @displaySetReset(i32 1)
%2 = call i32 @displaySetReset(i32 0)
%3 = call i32 (...) @displayWriteData()
ret void
}

LLVM IR (-O2):
define void @displayReset() {
%1 = tail call i32 @displaySetReset(i32 1)
%2 = tail call i32 @displaySetReset(i32 0)
%3 = tail call i32 (...) @displayWriteData()
ret void
}
int swapi(l)
int *l;
{
  union {
    int l;
    unsigned char c[4];
  } u;
  unsigned char temp;
  u.l = *l;
  temp = u.c[0];
  u.c[0] = u.c[3];
  u.c[3] = temp;
  temp = u.c[1];
  u.c[1] = u.c[2];
  u.c[2] = temp;
  return (u.l);
}


x86 assembly (clang, -O0):
<swapi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0xd(%rbp),%al
mov    %al,-0x10(%rbp)
mov    -0x11(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xf(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xf(%rbp)
mov    -0x11(%rbp),%al
mov    %al,-0xe(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapi>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define i32 @swapi(i32* %0) {
%2 = alloca i32*
%3 = alloca %union.anon
%4 = alloca i8
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = bitcast %union.anon* %3 to i32*
store i32 %6, i32* %7
%8 = bitcast %union.anon* %3 to [4 x i8]*
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %8, i64 0, i64 0
%10 = load i8, i8* %9
store i8 %10, i8* %4
%11 = bitcast %union.anon* %3 to [4 x i8]*
%12 = getelementptr inbounds [4 x i8], [4 x i8]* %11, i64 0, i64 3
%13 = load i8, i8* %12
%14 = bitcast %union.anon* %3 to [4 x i8]*
%15 = getelementptr inbounds [4 x i8], [4 x i8]* %14, i64 0, i64 0
store i8 %13, i8* %15
%16 = load i8, i8* %4
%17 = bitcast %union.anon* %3 to [4 x i8]*
%18 = getelementptr inbounds [4 x i8], [4 x i8]* %17, i64 0, i64 3
store i8 %16, i8* %18
%19 = bitcast %union.anon* %3 to [4 x i8]*
%20 = getelementptr inbounds [4 x i8], [4 x i8]* %19, i64 0, i64 1
%21 = load i8, i8* %20
store i8 %21, i8* %4
%22 = bitcast %union.anon* %3 to [4 x i8]*
%23 = getelementptr inbounds [4 x i8], [4 x i8]* %22, i64 0, i64 2
%24 = load i8, i8* %23
%25 = bitcast %union.anon* %3 to [4 x i8]*
%26 = getelementptr inbounds [4 x i8], [4 x i8]* %25, i64 0, i64 1
store i8 %24, i8* %26
%27 = load i8, i8* %4
%28 = bitcast %union.anon* %3 to [4 x i8]*
%29 = getelementptr inbounds [4 x i8], [4 x i8]* %28, i64 0, i64 2
store i8 %27, i8* %29
%30 = bitcast %union.anon* %3 to i32*
%31 = load i32, i32* %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @swapi(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
ret i32 %3
}
unsigned int __get_order(unsigned int pagesize) {
  unsigned int order = 0;
  while (pagesize != 1) {
    pagesize /= 2;
    order++;
  }
  return order;
}


x86 assembly (clang, -O0):
<__get_order>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     112f <__get_order+0x2f>
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <__get_order+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_order>:
xor    %eax,%eax
cmp    $0x1,%edi
je     111a <__get_order+0x1a>
xor    %eax,%eax
nopl   0x0(%rax)
shr    %edi
add    $0x1,%eax
cmp    $0x1,%edi
jne    1110 <__get_order+0x10>
ret

LLVM IR (-O0):
define i32 @__get_order(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = udiv i32 %8, 2
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @__get_order(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 1
%7 = add i32 %4, 1
%8 = icmp eq i32 %6, 1
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ tell_me_two_jokes();
int main() {
  tell_me_two_jokes();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <tell_me_two_jokes@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <tell_me_two_jokes@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @tell_me_two_jokes()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @tell_me_two_jokes()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ runCode(char *);
int main() { runCode("HQ9+"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <runCode@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <runCode@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"HQ9+\00"
define i32 @main() {
%1 = call i32 @runCode(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"HQ9+\00"
define i32 @main() {
%1 = tail call i32 @runCode(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int *return_first(int *x, int a, int **out) {
  int w = x;
  *out = w;
  return w;
}


x86 assembly (clang, -O0):
<return_first>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0x1c(%rbp)
movslq -0x1c(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movslq -0x1c(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_first>:
movslq %edi,%rax
mov    %rax,(%rdx)
ret

LLVM IR (-O0):
define i32* @return_first(i32* %0, i32 %1, i32** %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32**
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32** %2, i32*** %6
%8 = load i32*, i32** %4
%9 = ptrtoint i32* %8 to i32
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load i32**, i32*** %6
store i32* %12, i32** %13
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
ret i32* %16
}

LLVM IR (-O2):
define i32* @return_first(i32* %0, i32 %1, i32** nocapture writeonly %2) {
%4 = ptrtoint i32* %0 to i64
%5 = shl i64 %4, 32
%6 = ashr exact i64 %5, 32
%7 = inttoptr i64 %6 to i32*
store i32* %7, i32** %2
ret i32* %7
}
void BUF_strdup(void) {}


x86 assembly (clang, -O0):
<BUF_strdup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BUF_strdup>:
ret

LLVM IR (-O0):
define void @BUF_strdup() {
ret void
}

LLVM IR (-O2):
define void @BUF_strdup() {
ret void
}
int ListType(int nCode) {
  switch (nCode) {
  case 336:
    return 259;
  case 337:
    return 260;
  }
  return 258;
}


x86 assembly (clang, -O0):
<ListType>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x150,%eax
je     1130 <ListType+0x30>
jmp    111d <ListType+0x1d>
mov    -0xc(%rbp),%eax
sub    $0x151,%eax
je     113c <ListType+0x3c>
jmp    1148 <ListType+0x48>
movl   $0x103,-0x4(%rbp)
jmp    114f <ListType+0x4f>
movl   $0x104,-0x4(%rbp)
jmp    114f <ListType+0x4f>
movl   $0x102,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ListType>:
xor    %eax,%eax
cmp    $0x151,%edi
sete   %al
lea    (%rax,%rax,1),%ecx
add    $0x102,%ecx
cmp    $0x150,%edi
mov    $0x103,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ListType(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 336, label %5
i32 337, label %6
]
5: ; preds = %1
store i32 259, i32* %2
br label %8
6: ; preds = %1
store i32 260, i32* %2
br label %8
7: ; preds = %1
store i32 258, i32* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @ListType(i32 %0) {
%2 = icmp eq i32 %0, 337
%3 = select i1 %2, i32 260, i32 258
%4 = icmp eq i32 %0, 336
%5 = select i1 %4, i32 259, i32 %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ hybris_device_fb_quit();
void mce_hybris_framebuffer_quit(void) { hybris_device_fb_quit(); }


x86 assembly (clang, -O0):
<mce_hybris_framebuffer_quit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hybris_device_fb_quit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mce_hybris_framebuffer_quit>:
xor    %eax,%eax
jmp    1030 <hybris_device_fb_quit@plt>

LLVM IR (-O0):
define void @mce_hybris_framebuffer_quit() {
%1 = call i32 (...) @hybris_device_fb_quit()
ret void
}

LLVM IR (-O2):
define void @mce_hybris_framebuffer_quit() {
%1 = tail call i32 (...) @hybris_device_fb_quit()
ret void
}