xunge/DecIR huggingface dataset:
long int catalan(int n) {
  int i;
  long int res = 0;
  if (n <= 1)
    return 1;
  for (i = 0; i < n; i++)
    res += catalan(i) * catalan(n - i - 1);
  return res;
}


x86 assembly (clang, -O0):
<catalan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
cmpl   $0x1,-0xc(%rbp)
jg     113a <catalan+0x2a>
movq   $0x1,-0x8(%rbp)
jmp    1190 <catalan+0x80>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1188 <catalan+0x78>
mov    -0x10(%rbp),%edi
call   1030 <catalan@plt>
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%edi
sub    -0x10(%rbp),%edi
sub    $0x1,%edi
call   1030 <catalan@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
imul   %rcx,%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1141 <catalan+0x31>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catalan>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r14d
cmp    $0x2,%edi
jl     1150 <catalan+0x40>
mov    %edi,%ebx
add    $0xffffffff,%ebx
xor    %r14d,%r14d
xor    %ebp,%ebp
nopl   0x0(%rax)
mov    %ebp,%edi
call   1030 <catalan@plt>
mov    %rax,%r15
mov    %ebx,%edi
call   1030 <catalan@plt>
imul   %r15,%rax
add    %rax,%r14
add    $0x1,%ebp
add    $0xffffffff,%ebx
jb     1130 <catalan+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i64 @catalan(i32 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i64 0, i64* %5
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 1, i64* %2
br label %30
9: ; preds = %1
store i32 0, i32* %4
br label %10
10: ; preds = %25, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %28
14: ; preds = %10
%15 = load i32, i32* %4
%16 = call i64 @catalan(i32 %15)
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = sub nsw i32 %17, %18
%20 = sub nsw i32 %19, 1
%21 = call i64 @catalan(i32 %20)
%22 = mul nsw i64 %16, %21
%23 = load i64, i64* %5
%24 = add nsw i64 %23, %22
store i64 %24, i64* %5
br label %25
25: ; preds = %14
%26 = load i32, i32* %4
%27 = add nsw i32 %26, 1
store i32 %27, i32* %4
br label %10
28: ; preds = %10
%29 = load i64, i64* %5
store i64 %29, i64* %2
br label %30
30: ; preds = %28, %8
%31 = load i64, i64* %2
ret i64 %31
}

LLVM IR (-O2):
define i64 @catalan(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %11, %3 ], [ 0, %1 ]
%5 = phi i32 [ %12, %3 ], [ 0, %1 ]
%6 = tail call i64 @catalan(i32 %5)
%7 = xor i32 %5, -1
%8 = add i32 %7, %0
%9 = tail call i64 @catalan(i32 %8)
%10 = mul nsw i64 %9, %6
%11 = add nsw i64 %10, %4
%12 = add nuw nsw i32 %5, 1
%13 = icmp eq i32 %12, %0
br i1 %13, label %14, label %3
14: ; preds = %3, %1
%15 = phi i64 [ 1, %1 ], [ %11, %3 ]
ret i64 %15
}
int fun_base_1(int a) { return 0; }


x86 assembly (clang, -O0):
<fun_base_1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_base_1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fun_base_1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fun_base_1(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *err) {
  fprintf(stderr, "code_gen <base> <primary> [alt base] - Error = %s\n", err);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [51 x i8] c"code_gen <base> <primary> [alt base] - Error = %s\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [51 x i8] c"code_gen <base> <primary> [alt base] - Error = %s\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
main() {
  int *px, x = 7, y = 0;
  px = &x;
  y = *px;
  printf("dirección de memoria = %d, dato = %d\n", &x, x);
  printf("dirección de memoria = %d, dato = %d\n", px, *px);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x7,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edx
lea    0xebf(%rip),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movl   $0x7,0x4(%rsp)
lea    0xedd(%rip),%r14
lea    0x4(%rsp),%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
mov    $0x7,%edx
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x4(%rsp),%edx
mov    %r14,%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [39 x i8] c"direcci\C3\B3n de memoria = %d, dato = %d\0A\00"
define i32 @main() {
%1 = alloca i32*
%2 = alloca i32
%3 = alloca i32
store i32 7, i32* %2
store i32 0, i32* %3
store i32* %2, i32** %1
%4 = load i32*, i32** %1
%5 = load i32, i32* %4
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32* %2, i32 %6)
%8 = load i32*, i32** %1
%9 = load i32*, i32** %1
%10 = load i32, i32* %9
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32* %8, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [39 x i8] c"direcci\C3\B3n de memoria = %d, dato = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 7, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32* %1, i32 7)
%4 = load i32, i32* %1
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32* %1, i32 %4)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ const *);
struct tm mylocaltime(const time_t t) {
  return *localtime(&t);
}


x86 assembly (clang, -O0):
<mylocaltime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mylocaltime>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @mylocaltime(i32 %0) {
%2 = alloca %struct.tm
%3 = alloca i32
store i32 %0, i32* %3
%4 = call %struct.tm* @localtime(i32* %3)
%5 = bitcast %struct.tm* %2 to i8*
%6 = bitcast %struct.tm* %4 to i8*
%7 = getelementptr inbounds %struct.tm, %struct.tm* %2, i32 0, i32 0
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @mylocaltime(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call %struct.tm* @localtime(i32* %2)
%4 = getelementptr inbounds %struct.tm, %struct.tm* %3, i64 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Anton Bruckner\n");
  printf("Anton\n");
  printf("Bruckner\n");
  printf("Anton Bruckner\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeee(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Anton Bruckner\0A\00"
@.str.1 = [7 x i8] c"Anton\0A\00"
@.str.2 = [10 x i8] c"Bruckner\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str.3 = [6 x i8] c"Anton\00"
@str.4 = [9 x i8] c"Bruckner\00"
@str.5 = [15 x i8] c"Anton Bruckner\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.5, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str.4, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.5, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double exp(double);
int /*<<< orphan*/ getNumber(double *);
double exponencial(double a) {
  getNumber(&a);
  return exp(a);
}


x86 assembly (clang, -O0):
<exponencial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <getNumber@plt>
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exponencial>:
push   %rax
movsd  %xmm0,(%rsp)
mov    %rsp,%rdi
call   1040 <getNumber@plt>
movsd  (%rsp),%xmm0
call   1030 <exp@plt>
pop    %rax
ret

LLVM IR (-O0):
define double @exponencial(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i32 @getNumber(double* %2)
%4 = load double, double* %2
%5 = call double @exp(double %4)
ret double %5
}

LLVM IR (-O2):
define double @exponencial(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i32 @getNumber(double* %2)
%4 = load double, double* %2
%5 = call double @exp(double %4)
ret double %5
}
int bound(int val, int lower, int upper) {
  if (val < lower) {
    return lower;
  } else if (upper < val) {
    return upper;
  } else {
    return val;
  }
}


x86 assembly (clang, -O0):
<bound>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1124 <bound+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <bound+0x41>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    113b <bound+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <bound+0x41>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bound>:
mov    %edx,%eax
cmp    %edi,%edx
cmovge %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @bound(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %6
store i32 %12, i32* %4
br label %21
13: ; preds = %3
%14 = load i32, i32* %7
%15 = load i32, i32* %5
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %7
store i32 %18, i32* %4
br label %21
19: ; preds = %13
%20 = load i32, i32* %5
store i32 %20, i32* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @bound(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp slt i32 %2, %0
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
/* Variables and functions */
char *fg_error(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
int /*<<< orphan*/ stderr;
void fg_perror(const char *message, int errnum) {
  char *error = fg_error(errnum);
  if (error != NULL)
    fprintf(stderr, "%s : %s", message, error);
}


x86 assembly (clang, -O0):
<fg_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <fg_error@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1163 <fg_perror+0x43>
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xea2(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fg_perror>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <fg_error@plt>
test   %rax,%rax
je     114c <fg_perror+0x2c>
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%edi
lea    0xec0(%rip),%rsi
mov    %rbx,%rdx
mov    %rax,%rcx
pop    %rbx
jmp    1040 <fprintf@plt>
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s : %s\00"
define void @fg_perror(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i8* @fg_error(i32 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = load i8*, i8** %3
%13 = load i8*, i8** %5
%14 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %13)
br label %15
15: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s : %s\00"
define void @fg_perror(i8* %0, i32 %1) {
%3 = tail call i8* @fg_error(i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %3)
br label %8
8: ; preds = %5, %2
ret void
}
void ff_hevc_put_hevc_bi_epel_h32_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_h32_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_h32_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_h32_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_h32_8_avx2() {
ret void
}
/* Type definitions */
struct bi_record {
  int dummy;
};
typedef scalar_t__ offset;

/* Variables and functions */
scalar_t__ _ALIGN(scalar_t__, int);
struct bi_record *bootinfo_addr(unsigned long offset) {
  return (struct bi_record *)_ALIGN((offset) + (1 << 20) - 1, (1 << 20));
}


x86 assembly (clang, -O0):
<bootinfo_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x100000,%rdi
sub    $0x1,%rdi
mov    $0x100000,%esi
call   1030 <_ALIGN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bootinfo_addr>:
add    $0xfffff,%rdi
mov    $0x100000,%esi
jmp    1030 <_ALIGN@plt>

LLVM IR (-O0):
%struct.bi_record = type { i32 }
define %struct.bi_record* @bootinfo_addr(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 1048576
%5 = sub i64 %4, 1
%6 = call i64 @_ALIGN(i64 %5, i32 1048576)
%7 = inttoptr i64 %6 to %struct.bi_record*
ret %struct.bi_record* %7
}

LLVM IR (-O2):
%struct.bi_record = type { i32 }
define %struct.bi_record* @bootinfo_addr(i64 %0) {
%2 = add i64 %0, 1048575
%3 = tail call i64 @_ALIGN(i64 %2, i32 1048576)
%4 = inttoptr i64 %3 to %struct.bi_record*
ret %struct.bi_record* %4
}
/* Variables and functions */
void *gcalloc_(int /*<<< orphan*/, int);
void *gcallocleaf(int size) { return gcalloc_(0, size); }


x86 assembly (clang, -O0):
<gcallocleaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1030 <gcalloc_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcallocleaf>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <gcalloc_@plt>

LLVM IR (-O0):
define i8* @gcallocleaf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @gcalloc_(i32 0, i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @gcallocleaf(i32 %0) {
%2 = tail call i8* @gcalloc_(i32 0, i32 %0)
ret i8* %2
}
/* Variables and functions */
short uVtNum(char *);
short uVtNum2(char *c) {
  short i = 0;
  while (c[i] != ';')
    i++;
  i++;
  return uVtNum(&c[i]);
}


x86 assembly (clang, -O0):
<uVtNum2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movw   $0x0,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movswq -0xa(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x3b,%eax
je     1149 <uVtNum2+0x39>
mov    -0xa(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xa(%rbp)
jmp    1122 <uVtNum2+0x12>
mov    -0xa(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movswq -0xa(%rbp),%rax
add    %rax,%rdi
call   1030 <uVtNum@plt>
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uVtNum2>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movswq %ax,%rcx
add    $0x1,%eax
cmpb   $0x3b,(%rdi,%rcx,1)
jne    1120 <uVtNum2+0x10>
movswq %ax,%rax
add    %rax,%rdi
jmp    1030 <uVtNum@plt>

LLVM IR (-O0):
define signext i16 @uVtNum2(i8* %0) {
%2 = alloca i8*
%3 = alloca i16
store i8* %0, i8** %2
store i16 0, i16* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i16, i16* %3
%7 = sext i16 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 59
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i16, i16* %3
%14 = add i16 %13, 1
store i16 %14, i16* %3
br label %4
15: ; preds = %4
%16 = load i16, i16* %3
%17 = add i16 %16, 1
store i16 %17, i16* %3
%18 = load i8*, i8** %2
%19 = load i16, i16* %3
%20 = sext i16 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = call signext i16 @uVtNum(i8* %21)
ret i16 %22
}

LLVM IR (-O2):
define signext i16 @uVtNum2(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i16 [ 0, %1 ], [ %8, %2 ]
%4 = sext i16 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 59
%8 = add i16 %3, 1
br i1 %7, label %9, label %2
9: ; preds = %2
%10 = sext i16 %8 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = tail call signext i16 @uVtNum(i8* %11)
ret i16 %12
}
void rt2x00leds_unregister(struct rt2x00_dev *rt2x00dev) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.rt2x00_dev = type opaque
define void @rt2x00leds_unregister(%struct.rt2x00_dev* %0) {
%2 = alloca %struct.rt2x00_dev*
store %struct.rt2x00_dev* %0, %struct.rt2x00_dev** %2
ret void
}

LLVM IR (-O2):
%struct.rt2x00_dev = type opaque
define void @rt2x00leds_unregister(%struct.rt2x00_dev* nocapture %0) {
ret void
}
void AnalogSetDefault(void) {}


x86 assembly (clang, -O0):
<AnalogSetDefault>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnalogSetDefault>:
ret

LLVM IR (-O0):
define void @AnalogSetDefault() {
ret void
}

LLVM IR (-O2):
define void @AnalogSetDefault() {
ret void
}
int test_imm_E5uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xE5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E5uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xe5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E5uint64_midword_mem>:
testb  $0xe5,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E5uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 229
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E5uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 15007744
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int __sys_seek(int fd, int position) { return 0; }


x86 assembly (clang, -O0):
<__sys_seek>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sys_seek>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__sys_seek(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @__sys_seek(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ isspace(char const);
int str_all_space(const char *str) {
  while (*str) {
    if (!isspace(*str))
      return 0;
    str++;
  }
  return 1;
}


x86 assembly (clang, -O0):
<str_all_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115b <str_all_space+0x4b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%eax
jne    114a <str_all_space+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1162 <str_all_space+0x52>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <str_all_space+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_all_space>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
mov    $0x1,%ebp
test   %al,%al
je     114b <str_all_space+0x3b>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl %al,%edi
call   1030 <isspace@plt>
test   %eax,%eax
je     1149 <str_all_space+0x39>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <str_all_space+0x20>
jmp    114b <str_all_space+0x3b>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @str_all_space(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %14, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i32 @isspace(i8 signext %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %8
store i32 0, i32* %2
br label %18
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %4
17: ; preds = %4
store i32 1, i32* %2
br label %18
18: ; preds = %17, %13
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @str_all_space(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = tail call i32 @isspace(i8 signext %8)
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %7, %4, %1
%14 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %14
}
int juniper_fpga_num_devices() { return 1; }


x86 assembly (clang, -O0):
<juniper_fpga_num_devices>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<juniper_fpga_num_devices>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @juniper_fpga_num_devices() {
ret i32 1
}

LLVM IR (-O2):
define i32 @juniper_fpga_num_devices() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ putc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void tab(int num) {
  int i = 0;
  for (; i < num; i++) {
    putc('\t', stdout);
  }
}


x86 assembly (clang, -O0):
<tab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114f <tab+0x3f>
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
mov    $0x9,%edi
call   1030 <putc@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <tab+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tab>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1142 <tab+0x32>
mov    %edi,%ebx
mov    0x2ebf(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14),%esi
mov    $0x9,%edi
call   1030 <putc@plt>
add    $0xffffffff,%ebx
jne    1130 <tab+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdout = global i32 0
define void @tab(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* @stdout
%10 = call i32 @putc(i8 signext 9, i32 %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @tab(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = load i32, i32* @stdout
%6 = tail call i32 @putc(i8 signext 9, i32 %5)
%7 = add nuw nsw i32 %4, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
int power_opt(int action, int option) { return 3; }


x86 assembly (clang, -O0):
<power_opt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<power_opt>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @power_opt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 3
}

LLVM IR (-O2):
define i32 @power_opt(i32 %0, i32 %1) {
ret i32 3
}
const char *KlelGetReleaseString(void) { return "1.1.0"; }


x86 assembly (clang, -O0):
<KlelGetReleaseString>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<KlelGetReleaseString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1.1.0\00"
define i8* @KlelGetReleaseString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.1.0\00"
define i8* @KlelGetReleaseString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ memcmp(char *, unsigned char *, int);
int get_key_len(unsigned char *algo_id) {
  if (!memcmp("\x00\x12", algo_id, 2))
    return 16;
  else
    return -1;
}


x86 assembly (clang, -O0):
<get_key_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x2,%edx
call   1030 <memcmp@plt>
cmp    $0x0,%eax
jne    1146 <get_key_len+0x36>
movl   $0x10,-0x4(%rbp)
jmp    114d <get_key_len+0x3d>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_key_len>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
mov    $0x2,%edx
call   1030 <memcmp@plt>
neg    %eax
sbb    %eax,%eax
or     $0x10,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"\00\12\00"
define i32 @get_key_len(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @memcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4, i32 2)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 16, i32* %2
br label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [3 x i8] c"\00\12\00"
define i32 @get_key_len(i8* %0) {
%2 = tail call i32 @memcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0, i32 2)
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 16, i32 -1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ output();
void ch_screen_term(void) { output(); }


x86 assembly (clang, -O0):
<ch_screen_term>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <output@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch_screen_term>:
xor    %eax,%eax
jmp    1030 <output@plt>

LLVM IR (-O0):
define void @ch_screen_term() {
%1 = call i32 (...) @output()
ret void
}

LLVM IR (-O2):
define void @ch_screen_term() {
%1 = tail call i32 (...) @output()
ret void
}
int isPar(int num) { return (num % 2 == 0); }


x86 assembly (clang, -O0):
<isPar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPar>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isPar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @isPar(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void sleep_ms(int ms) {
  struct timespec ts;
  ts.tv_sec = ms / 1000;
  ts.tv_nsec = (ms % 1000) * 1000000;
  nanosleep(&ts, NULL);
}


x86 assembly (clang, -O0):
<sleep_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
imul   $0xf4240,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_ms>:
push   %rax
movslq %edi,%rax
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
mov    %ecx,(%rsp)
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
imul   $0xf4240,%eax,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @sleep_ms(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 1000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = load i32, i32* %2
%8 = srem i32 %7, 1000
%9 = mul nsw i32 %8, 1000000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @sleep_ms(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = sdiv i32 %0, 1000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %4, i32* %5
%6 = srem i32 %0, 1000
%7 = mul nsw i32 %6, 1000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
int init() { ; }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
ret

LLVM IR (-O0):
define i32 @init() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @init() {
ret i32 undef
}
int ddig(char c) { return c - '0'; }


x86 assembly (clang, -O0):
<ddig>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddig>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ddig(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 48
ret i32 %5
}

LLVM IR (-O2):
define i32 @ddig(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
ret i32 %3
}
/* Variables and functions */
int sockWrite(int, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int sockPuts(int sockfd, char *str) {
  int rc;
  rc = sockWrite(sockfd, str, strlen(str));
  return (rc);
}


x86 assembly (clang, -O0):
<sockPuts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x24(%rbp),%edi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
call   1040 <sockWrite@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockPuts>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <sockWrite@plt>

LLVM IR (-O0):
define i32 @sockPuts(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @sockWrite(i32 %6, i8* %7, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @sockPuts(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @sockWrite(i32 %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
void *calloc(unsigned long, int);
int /*<<< orphan*/ free(void *);
void f3(int i) {
  unsigned long j;
  j = 10;
  if (i < 0) {
    void *ptr = calloc(j, i);
    free(ptr);
  }
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0xa,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1156 <f3+0x36>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
test   %edi,%edi
js     1125 <f3+0x5>
ret
push   %rax
mov    %edi,%esi
mov    $0xa,%edi
call   1040 <calloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @f3(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i8*
store i32 %0, i32* %2
store i64 10, i64* %3
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i64, i64* %3
%9 = load i32, i32* %2
%10 = call i8* @calloc(i64 %8, i32 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @free(i8* %11)
br label %13
13: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i8* @calloc(i64 10, i32 %0)
%5 = tail call i32 @free(i8* %4)
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
int p_norm(double, double, double);
bool inside_ellipse(int x, int y, int x0, int y0, int xr, int yr, double p) {
  return (p_norm((((double)x) - x0) / xr, (((double)y) - y0) / yr, p) <= 1);
}


x86 assembly (clang, -O0):
<inside_ellipse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
subsd  %xmm1,%xmm0
cvtsi2sdl -0x14(%rbp),%xmm1
divsd  %xmm1,%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
cvtsi2sdl -0x10(%rbp),%xmm2
subsd  %xmm2,%xmm1
cvtsi2sdl -0x18(%rbp),%xmm2
divsd  %xmm2,%xmm1
movsd  -0x20(%rbp),%xmm2
call   1030 <p_norm@plt>
cmp    $0x1,%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inside_ellipse>:
push   %rax
movaps %xmm0,%xmm2
xorps  %xmm0,%xmm0
cvtsi2sd %edi,%xmm0
cvtsi2sd %edx,%xmm1
subsd  %xmm1,%xmm0
xorps  %xmm1,%xmm1
cvtsi2sd %r8d,%xmm1
divsd  %xmm1,%xmm0
xorps  %xmm1,%xmm1
cvtsi2sd %esi,%xmm1
cvtsi2sd %ecx,%xmm3
subsd  %xmm3,%xmm1
xorps  %xmm3,%xmm3
cvtsi2sd %r9d,%xmm3
divsd  %xmm3,%xmm1
call   1030 <p_norm@plt>
xor    %ecx,%ecx
cmp    $0x2,%eax
setl   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @inside_ellipse(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, double %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca double
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store double %6, double* %14
%15 = load i32, i32* %8
%16 = sitofp i32 %15 to double
%17 = load i32, i32* %10
%18 = sitofp i32 %17 to double
%19 = fsub double %16, %18
%20 = load i32, i32* %12
%21 = sitofp i32 %20 to double
%22 = fdiv double %19, %21
%23 = load i32, i32* %9
%24 = sitofp i32 %23 to double
%25 = load i32, i32* %11
%26 = sitofp i32 %25 to double
%27 = fsub double %24, %26
%28 = load i32, i32* %13
%29 = sitofp i32 %28 to double
%30 = fdiv double %27, %29
%31 = load double, double* %14
%32 = call i32 @p_norm(double %22, double %30, double %31)
%33 = icmp sle i32 %32, 1
%34 = zext i1 %33 to i32
ret i32 %34
}

LLVM IR (-O2):
define i32 @inside_ellipse(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, double %6) {
%8 = sitofp i32 %0 to double
%9 = sitofp i32 %2 to double
%10 = fsub double %8, %9
%11 = sitofp i32 %4 to double
%12 = fdiv double %10, %11
%13 = sitofp i32 %1 to double
%14 = sitofp i32 %3 to double
%15 = fsub double %13, %14
%16 = sitofp i32 %5 to double
%17 = fdiv double %15, %16
%18 = tail call i32 @p_norm(double %12, double %17, double %6)
%19 = icmp slt i32 %18, 2
%20 = zext i1 %19 to i32
ret i32 %20
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ sleep(int);
void *does_too() {
  int i;
  for (i = 0; i < 5; i++) {
    sleep(1);
    puts("Does too");
  }
  return NULL;
}


x86 assembly (clang, -O0):
<does_too>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jge    115d <does_too+0x3d>
mov    $0x1,%edi
call   1040 <sleep@plt>
lea    0xeb6(%rip),%rdi
call   1030 <puts@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <does_too+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<does_too>:
push   %rbx
mov    $0x1,%edi
call   1040 <sleep@plt>
lea    0xece(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Does too\00"
define i8* @does_too() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 5
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = call i32 @sleep(i32 1)
%7 = call i32 @puts(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret i8* null
}

LLVM IR (-O2):
@.str = [9 x i8] c"Does too\00"
define noalias i8* @does_too() {
%1 = tail call i32 @sleep(i32 1)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @sleep(i32 1)
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @sleep(i32 1)
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @sleep(i32 1)
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @sleep(i32 1)
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ channel;

/* Variables and functions */
int /*<<< orphan*/ adc_enable_channel(int /*<<< orphan*/);
size_t usart_in_waiting();
int /*<<< orphan*/ usart_read(int /*<<< orphan*/ *, int);
void rpc_adc_enable_channel(void) {
  uint8_t channel;
  size_t argsize = sizeof(channel);
  while (usart_in_waiting() < argsize)
    ;
  usart_read(&channel, sizeof(channel));
  adc_enable_channel(channel);
}


x86 assembly (clang, -O0):
<rpc_adc_enable_channel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x4,-0x10(%rbp)
mov    $0x0,%al
call   1050 <usart_in_waiting@plt>
cmp    -0x10(%rbp),%rax
jae    1156 <rpc_adc_enable_channel+0x26>
jmp    1140 <rpc_adc_enable_channel+0x10>
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1040 <usart_read@plt>
mov    -0x4(%rbp),%edi
call   1030 <adc_enable_channel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpc_adc_enable_channel>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <usart_in_waiting@plt>
cmp    $0x4,%rax
jb     1140 <rpc_adc_enable_channel+0x10>
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1040 <usart_read@plt>
mov    0x4(%rsp),%edi
call   1030 <adc_enable_channel@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @rpc_adc_enable_channel() {
%1 = alloca i32
%2 = alloca i64
store i64 4, i64* %2
br label %3
3: ; preds = %7, %0
%4 = call i64 (...) @usart_in_waiting()
%5 = load i64, i64* %2
%6 = icmp ult i64 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = call i32 @usart_read(i32* %1, i32 4)
%10 = load i32, i32* %1
%11 = call i32 @adc_enable_channel(i32 %10)
ret void
}

LLVM IR (-O2):
define void @rpc_adc_enable_channel() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
br label %3
3: ; preds = %3, %0
%4 = tail call i64 (...) @usart_in_waiting()
%5 = icmp ult i64 %4, 4
br i1 %5, label %3, label %6
6: ; preds = %3
%7 = call i32 @usart_read(i32* %1, i32 4)
%8 = load i32, i32* %1
%9 = call i32 @adc_enable_channel(i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int /*<<< orphan*/ SOCK_STREAM;
int socket(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int create_socket() {
  int sockfd = -1;
  if ((sockfd = socket(AF_INET, SOCK_STREAM, 0)) < 0) {
    return -1;
  } else {
    return sockfd;
  }
}


x86 assembly (clang, -O0):
<create_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x8(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <socket@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jge    1150 <create_socket+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    1156 <create_socket+0x46>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_socket>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    0x2eb7(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <socket@plt>
test   %eax,%eax
mov    $0xffffffff,%ecx
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
define i32 @create_socket() {
%1 = alloca i32
%2 = alloca i32
store i32 -1, i32* %2
%3 = load i32, i32* @AF_INET
%4 = load i32, i32* @SOCK_STREAM
%5 = call i32 @socket(i32 %3, i32 %4, i32 0)
store i32 %5, i32* %2
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 -1, i32* %1
br label %10
8: ; preds = %0
%9 = load i32, i32* %2
store i32 %9, i32* %1
br label %10
10: ; preds = %8, %7
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
define i32 @create_socket() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
%4 = icmp sgt i32 %3, -1
%5 = select i1 %4, i32 %3, i32 -1
ret i32 %5
}
void logger_log(char *phony, ...) { *phony = 0; }


x86 assembly (clang, -O0):
<logger_log>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<logger_log>:
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @logger_log(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
store i8 0, i8* %3
ret void
}

LLVM IR (-O2):
define void @logger_log(i8* nocapture writeonly %0, ...) {
store i8 0, i8* %0
ret void
}
void MJC_globalRoot(void *root) { return; }


x86 assembly (clang, -O0):
<MJC_globalRoot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MJC_globalRoot>:
ret

LLVM IR (-O0):
define void @MJC_globalRoot(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @MJC_globalRoot(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int /*<<< orphan*/ time_internal_set(struct tm *);
int /*<<< orphan*/ time_set_nvrram(char *, struct tm *);
void time_internal_sync(char *nvrram) {
  struct tm *cur_time_tm;
  time_t cur_time;
  time(&cur_time);
  cur_time_tm = localtime(&cur_time);
  time_internal_set(cur_time_tm);
  time_set_nvrram(nvrram, cur_time_tm);
}


x86 assembly (clang, -O0):
<time_internal_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x14(%rbp),%rdi
call   1050 <time@plt>
lea    -0x14(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <time_internal_set@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1060 <time_set_nvrram@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_internal_sync>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    0x4(%rsp),%rbx
mov    %rbx,%rdi
call   1050 <time@plt>
mov    %rbx,%rdi
call   1030 <localtime@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <time_internal_set@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1060 <time_set_nvrram@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define void @time_internal_sync(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.tm*
%4 = alloca i32
store i8* %0, i8** %2
%5 = call i32 @time(i32* %4)
%6 = call %struct.tm* @localtime(i32* %4)
store %struct.tm* %6, %struct.tm** %3
%7 = load %struct.tm*, %struct.tm** %3
%8 = call i32 @time_internal_set(%struct.tm* %7)
%9 = load i8*, i8** %2
%10 = load %struct.tm*, %struct.tm** %3
%11 = call i32 @time_set_nvrram(i8* %9, %struct.tm* %10)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define void @time_internal_sync(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @time(i32* %2)
%5 = call %struct.tm* @localtime(i32* %2)
%6 = call i32 @time_internal_set(%struct.tm* %5)
%7 = call i32 @time_set_nvrram(i8* %0, %struct.tm* %5)
ret void
}