xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t strlen(const char *s) {
  size_t len = 0;
  while (*s++) {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1139 <strlen+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i64 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %8, %4 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ menu();
int main() {
  menu();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <menu@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <menu@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @menu()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @menu()
ret i32 0
}
/* Type definitions */
typedef int uint;

/* Variables and functions */
uint readtrapno() { return *(int *)0x8000110C; }


x86 assembly (clang, -O0):
<readtrapno>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8000110c,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readtrapno>:
mov    $0x8000110c,%eax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @readtrapno() {
%1 = load i32, i32* inttoptr (i64 2147488012 to i32*)
ret i32 %1
}

LLVM IR (-O2):
define i32 @readtrapno() {
%1 = load i32, i32* inttoptr (i64 2147488012 to i32*)
ret i32 %1
}
/* Variables and functions */
double utc_offset(double);
double utc_time(double local_ms) { return local_ms - utc_offset(local_ms); }


x86 assembly (clang, -O0):
<utc_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <utc_offset@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utc_time>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <utc_offset@plt>
movsd  (%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @utc_time(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @utc_offset(double %4)
%6 = fsub double %3, %5
ret double %6
}

LLVM IR (-O2):
define double @utc_time(double %0) {
%2 = tail call double @utc_offset(double %0)
%3 = fsub double %0, %2
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int pthread_cond_broadcast(pthread_cond_t *cond) { return 0; }


x86 assembly (clang, -O0):
<pthread_cond_broadcast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_broadcast>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_cond_broadcast(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_cond_broadcast(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *Zalloc(size_t n) {
  void *pv = malloc(n);
  memset(pv, 0, n);
  return pv;
}


x86 assembly (clang, -O0):
<Zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Zalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @Zalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i64, i64* %2
%8 = call i32 @memset(i8* %6, i32 0, i64 %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
define i8* @Zalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
ret i8* %2
}
int voovel(char ch) {
  char v[7] = "eyuioa";
  int i;
  for (i = 0; i < 7; i++) {
    if (ch == v[i])
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<voovel>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    0xef0(%rip),%eax
mov    %eax,-0xc(%rbp)
mov    0xeea(%rip),%ax
mov    %ax,-0x8(%rbp)
mov    0xee2(%rip),%al
mov    %al,-0x6(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x7,-0x10(%rbp)
jge    116c <voovel+0x6c>
movsbl -0x5(%rbp),%eax
movslq -0x10(%rbp),%rcx
movsbl -0xc(%rbp,%rcx,1),%ecx
cmp    %ecx,%eax
jne    1159 <voovel+0x59>
movl   $0x1,-0x4(%rbp)
jmp    1173 <voovel+0x73>
jmp    115e <voovel+0x5e>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112e <voovel+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<voovel>:
mov    $0x1,%eax
lea    -0x61(%rdi),%ecx
cmp    $0x18,%cl
ja     111c <voovel+0x1c>
movzbl %cl,%ecx
mov    $0x1104111,%edx
bt     %rcx,%rdx
jae    111c <voovel+0x1c>
ret
test   %dil,%dil
je     111b <voovel+0x1b>
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.voovel.v = [7 x i8] c"eyuioa\00"
define i32 @voovel(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca [7 x i8]
%5 = alloca i32
store i8 %0, i8* %3
%6 = bitcast [7 x i8]* %4 to i8*
store i32 0, i32* %5
br label %7
7: ; preds = %21, %1
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 7
br i1 %9, label %10, label %24
10: ; preds = %7
%11 = load i8, i8* %3
%12 = sext i8 %11 to i32
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [7 x i8], [7 x i8]* %4, i64 0, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %12, %17
br i1 %18, label %19, label %20
19: ; preds = %10
store i32 1, i32* %2
br label %25
20: ; preds = %10
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
store i32 0, i32* %2
br label %25
25: ; preds = %24, %19
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @voovel(i8 signext %0) {
switch i8 %0, label %2 [
i8 101, label %3
i8 121, label %3
i8 117, label %3
i8 105, label %3
i8 111, label %3
i8 97, label %3
i8 0, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 1, %1 ], [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpnle_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_cmpnle_ps(__m128 __a, __m128 __b) {
  return _mm_cmpnle_ps(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpnle_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpnle_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpnle_ps>:
jmp    1030 <_mm_cmpnle_ps@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpnle_ps(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpnle_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpnle_ps(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpnle_ps(i32 %0, i32 %1)
ret i32 %3
}
void toe_neigh_update(struct ifnet *neigh) {}


x86 assembly (clang, -O0):
<toe_neigh_update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<toe_neigh_update>:
ret

LLVM IR (-O0):
%struct.ifnet = type opaque
define void @toe_neigh_update(%struct.ifnet* %0) {
%2 = alloca %struct.ifnet*
store %struct.ifnet* %0, %struct.ifnet** %2
ret void
}

LLVM IR (-O2):
%struct.ifnet = type opaque
define void @toe_neigh_update(%struct.ifnet* nocapture %0) {
ret void
}
float obdConvert_52(unsigned int A, unsigned int B, unsigned int C,
                    unsigned int D) {
  return (float)A * 100.0f / 255.0f;
}


x86 assembly (clang, -O0):
<obdConvert_52>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm0
movss  0xee4(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed4(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<obdConvert_52>:
mov    %edi,%eax
cvtsi2ss %rax,%xmm0
mulss  0xef1(%rip),%xmm0
divss  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
define float @obdConvert_52(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = uitofp i32 %9 to float
%11 = fmul float %10, 1.000000e+02
%12 = fdiv float %11, 2.550000e+02
ret float %12
}

LLVM IR (-O2):
define float @obdConvert_52(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = uitofp i32 %0 to float
%6 = fmul float %5, 1.000000e+02
%7 = fdiv float %6, 2.550000e+02
ret float %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ nasm_write(int /*<<< orphan*/ *, int, int /*<<< orphan*/ *);
void fwriteint32_t(uint32_t data, FILE *fp) { nasm_write(&data, 4, fp); }


x86 assembly (clang, -O0):
<fwriteint32_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1030 <nasm_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwriteint32_t>:
push   %rax
mov    %rsi,%rdx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <nasm_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @fwriteint32_t(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @nasm_write(i32* %3, i32 4, i32* %5)
ret void
}

LLVM IR (-O2):
define void @fwriteint32_t(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @nasm_write(i32* %3, i32 4, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ *Mem_Alloc(int);
int /*<<< orphan*/ Mem_Dump();
scalar_t__ Mem_Init(int);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  assert(Mem_Init(4096) == 0);
  assert(Mem_Alloc(2048) != NULL);
  assert(Mem_Alloc(2047) == NULL);
  Mem_Dump();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1000,%edi
call   1030 <Mem_Init@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    $0x800,%edi
call   1060 <Mem_Alloc@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    $0x7ff,%edi
call   1060 <Mem_Alloc@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    $0x0,%al
call   1040 <Mem_Dump@plt>
xor    %edi,%edi
call   1070 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1000,%edi
call   1030 <Mem_Init@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1050 <assert@plt>
mov    $0x800,%edi
call   1060 <Mem_Alloc@plt>
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1050 <assert@plt>
mov    $0x7ff,%edi
call   1060 <Mem_Alloc@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1050 <assert@plt>
xor    %eax,%eax
call   1040 <Mem_Dump@plt>
xor    %edi,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @Mem_Init(i32 4096)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = call i32 @assert(i32 %4)
%6 = call i32* @Mem_Alloc(i32 2048)
%7 = icmp ne i32* %6, null
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = call i32* @Mem_Alloc(i32 2047)
%11 = icmp eq i32* %10, null
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = call i32 (...) @Mem_Dump()
%15 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @Mem_Init(i32 4096)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32* @Mem_Alloc(i32 2048)
%6 = icmp ne i32* %5, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32* @Mem_Alloc(i32 2047)
%10 = icmp eq i32* %9, null
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 %11)
%13 = tail call i32 (...) @Mem_Dump()
%14 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ dump_error(char *);
scalar_t__ malloc(int);
long *lvector(int nl, int nh) {
  long *v;
  v = (long *)malloc((nh - nl + 1) * sizeof(long));
  if (!v)
    dump_error("allocation failure in lvector()");
  return v - nl;
}


x86 assembly (clang, -O0):
<lvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x3,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115f <lvector+0x3f>
lea    0xea6(%rip),%rdi
call   1030 <dump_error@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lvector>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
sub    %edi,%esi
lea    0x8(,%rsi,8),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1147 <lvector+0x27>
lea    0xebe(%rip),%rdi
call   1030 <dump_error@plt>
movslq %ebp,%rax
shl    $0x3,%rax
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [32 x i8] c"allocation failure in lvector()\00"
define i64* @lvector(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = trunc i64 %11 to i32
%13 = call i64 @malloc(i32 %12)
%14 = inttoptr i64 %13 to i64*
store i64* %14, i64** %5
%15 = load i64*, i64** %5
%16 = icmp ne i64* %15, null
br i1 %16, label %19, label %17
17: ; preds = %2
%18 = call i32 @dump_error(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %17, %2
%20 = load i64*, i64** %5
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = sub i64 0, %22
%24 = getelementptr inbounds i64, i64* %20, i64 %23
ret i64* %24
}

LLVM IR (-O2):
@.str = [32 x i8] c"allocation failure in lvector()\00"
define i64* @lvector(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = shl i32 %3, 3
%5 = add i32 %4, 8
%6 = tail call i64 @malloc(i32 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @dump_error(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
%11 = inttoptr i64 %6 to i64*
%12 = sext i32 %0 to i64
%13 = sub nsw i64 0, %12
%14 = getelementptr inbounds i64, i64* %11, i64 %13
ret i64* %14
}
int fibsequence() {
  int first = 1;
  int second = 1;
  int sum;
  for (int limit = 4000000; second < limit; first = first + second) {
    if (second % 2 == 0) {
      sum = sum + second;
    }
    if (first % 2 == 0) {
      sum = sum + first;
    }
    second = first + second;
  }
  return sum;
}


x86 assembly (clang, -O0):
<fibsequence>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x3d0900,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1176 <fibsequence+0x76>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1142 <fibsequence+0x42>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115f <fibsequence+0x5f>
mov    -0xc(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1119 <fibsequence+0x19>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibsequence>:
mov    $0x1,%ecx
mov    $0x1,%edx
nopw   0x0(%rax,%rax,1)
test   $0x1,%dl
mov    $0x0,%esi
cmove  %edx,%esi
add    %eax,%esi
test   $0x1,%cl
mov    $0x0,%eax
cmove  %ecx,%eax
add    %esi,%eax
add    %ecx,%edx
add    %edx,%ecx
cmp    $0x3d0900,%edx
jl     1110 <fibsequence+0x10>
ret

LLVM IR (-O0):
define i32 @fibsequence() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 1, i32* %1
store i32 1, i32* %2
store i32 4000000, i32* %4
br label %5
5: ; preds = %29, %0
%6 = load i32, i32* %2
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %33
9: ; preds = %5
%10 = load i32, i32* %2
%11 = srem i32 %10, 2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %2
%16 = add nsw i32 %14, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %1
%19 = srem i32 %18, 2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %25
21: ; preds = %17
%22 = load i32, i32* %3
%23 = load i32, i32* %1
%24 = add nsw i32 %22, %23
store i32 %24, i32* %3
br label %25
25: ; preds = %21, %17
%26 = load i32, i32* %1
%27 = load i32, i32* %2
%28 = add nsw i32 %26, %27
store i32 %28, i32* %2
br label %29
29: ; preds = %25
%30 = load i32, i32* %1
%31 = load i32, i32* %2
%32 = add nsw i32 %30, %31
store i32 %32, i32* %1
br label %5
33: ; preds = %5
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @fibsequence() {
br label %2
1: ; preds = %2
ret i32 %13
2: ; preds = %0, %2
%3 = phi i32 [ 1, %0 ], [ %15, %2 ]
%4 = phi i32 [ undef, %0 ], [ %13, %2 ]
%5 = phi i32 [ 1, %0 ], [ %14, %2 ]
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i32 %5, i32 0
%9 = add nsw i32 %8, %4
%10 = and i32 %3, 1
%11 = icmp eq i32 %10, 0
%12 = select i1 %11, i32 %3, i32 0
%13 = add nsw i32 %9, %12
%14 = add nsw i32 %3, %5
%15 = add nsw i32 %14, %3
%16 = icmp slt i32 %14, 4000000
br i1 %16, label %2, label %1
}
void cmov2_(x, y) float *x, *y;
{ cmov(*x, *y, 0.0); }


x86 assembly (clang, -O0):
<cmov2_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm1
cvtss2sd %xmm1,%xmm1
xorps  %xmm2,%xmm2
mov    $0x3,%al
call   1030 <cmov@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmov2_>:
movss  (%rdi),%xmm0
cvtss2sd %xmm0,%xmm0
movss  (%rsi),%xmm1
cvtss2sd %xmm1,%xmm1
xorps  %xmm2,%xmm2
mov    $0x3,%al
jmp    1030 <cmov@plt>

LLVM IR (-O0):
define void @cmov2_(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = fpext float %6 to double
%8 = load float*, float** %4
%9 = load float, float* %8
%10 = fpext float %9 to double
%11 = call i32 (double, double, double, ...) bitcast (i32 (...)* @cmov to i32 (double, double, double, ...)*)(double %7, double %10, double 0.000000e+00)
ret void
}

LLVM IR (-O2):
define void @cmov2_(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = fpext float %3 to double
%5 = load float, float* %1
%6 = fpext float %5 to double
%7 = tail call i32 (double, double, double, ...) bitcast (i32 (...)* @cmov to i32 (double, double, double, ...)*)(double %4, double %6, double 0.000000e+00)
ret void
}
int valueCard(char card) {
  int cardValue;
  switch (card) {
  case 'A':
    cardValue = 14;
    break;
  case 'K':
    cardValue = 13;
    break;
  case 'Q':
    cardValue = 12;
    break;
  case 'J':
    cardValue = 11;
    break;
  case 'T':
    cardValue = 10;
    break;
  default:
    cardValue = card - '0';
    break;
  }
  return cardValue;
}


x86 assembly (clang, -O0):
<valueCard>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x13,%eax
ja     1170 <valueCard+0x70>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x8(%rbp)
jmp    117a <valueCard+0x7a>
movl   $0xd,-0x8(%rbp)
jmp    117a <valueCard+0x7a>
movl   $0xc,-0x8(%rbp)
jmp    117a <valueCard+0x7a>
movl   $0xb,-0x8(%rbp)
jmp    117a <valueCard+0x7a>
movl   $0xa,-0x8(%rbp)
jmp    117a <valueCard+0x7a>
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valueCard>:
lea    -0x41(%rdi),%ecx
cmp    $0x13,%ecx
ja     1123 <valueCard+0x23>
mov    $0xe,%eax
lea    0xeec(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0xb,%eax
ret
add    $0xffffffd0,%edi
mov    %edi,%eax
ret
mov    $0xd,%eax
ret
mov    $0xc,%eax
ret
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @valueCard(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
switch i32 %5, label %11 [
i32 65, label %6
i32 75, label %7
i32 81, label %8
i32 74, label %9
i32 84, label %10
]
6: ; preds = %1
store i32 14, i32* %3
br label %15
7: ; preds = %1
store i32 13, i32* %3
br label %15
8: ; preds = %1
store i32 12, i32* %3
br label %15
9: ; preds = %1
store i32 11, i32* %3
br label %15
10: ; preds = %1
store i32 10, i32* %3
br label %15
11: ; preds = %1
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
store i32 %14, i32* %3
br label %15
15: ; preds = %11, %10, %9, %8, %7, %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @valueCard(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %7 [
i32 65, label %9
i32 75, label %3
i32 81, label %4
i32 74, label %5
i32 84, label %6
]
3: ; preds = %1
br label %9
4: ; preds = %1
br label %9
5: ; preds = %1
br label %9
6: ; preds = %1
br label %9
7: ; preds = %1
%8 = add nsw i32 %2, -48
br label %9
9: ; preds = %1, %7, %6, %5, %4, %3
%10 = phi i32 [ %8, %7 ], [ 10, %6 ], [ 11, %5 ], [ 12, %4 ], [ 13, %3 ], [ 14, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ DATA_personal();
int /*<<< orphan*/ LibraryHeader(char *, char *);
int /*<<< orphan*/ STARTUP_personal();
LIBRARY_personal() {
  LibraryHeader("personal", "Sat Feb  1 10:41:07 2014 ");
  DATA_personal();
  STARTUP_personal();
}


x86 assembly (clang, -O0):
<LIBRARY_personal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    0xec3(%rip),%rsi
call   1040 <LibraryHeader@plt>
mov    $0x0,%al
call   1050 <DATA_personal@plt>
mov    $0x0,%al
call   1030 <STARTUP_personal@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LIBRARY_personal>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0xeca(%rip),%rsi
call   1040 <LibraryHeader@plt>
xor    %eax,%eax
call   1050 <DATA_personal@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <STARTUP_personal@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"personal\00"
@.str.1 = [26 x i8] c"Sat Feb 1 10:41:07 2014 \00"
define i32 @LIBRARY_personal() {
%1 = alloca i32
%2 = call i32 @LibraryHeader(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @DATA_personal()
%4 = call i32 (...) @STARTUP_personal()
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@.str = [9 x i8] c"personal\00"
@.str.1 = [26 x i8] c"Sat Feb 1 10:41:07 2014 \00"
define i32 @LIBRARY_personal() {
%1 = tail call i32 @LibraryHeader(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 (...) @DATA_personal()
%3 = tail call i32 (...) @STARTUP_personal()
ret i32 undef
}
/* Variables and functions */
int FOO(int);
int g(int x) { return FOO(x); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <FOO@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
jmp    1030 <FOO@plt>

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @FOO(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = tail call i32 @FOO(i32 %0)
ret i32 %2
}
unsigned short GetSinGenFreqReg(unsigned short wFreq) {
  unsigned long dRet, dTemp;
  dRet = ((unsigned long)wFreq << 18) / 73728UL;
  dTemp = (dRet * 536UL) / 1000UL;
  dRet += dTemp;
  return (unsigned short)dRet;
}


x86 assembly (clang, -O0):
<GetSinGenFreqReg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
shl    $0x12,%rax
mov    $0x12000,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x10(%rbp)
imul   $0x218,-0x10(%rbp),%rax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetSinGenFreqReg>:
mov    %edi,%eax
shl    $0x12,%rax
movabs $0xe38e38e38e38e38f,%rcx
38 8e e3
mul    %rcx
shr    $0x10,%rdx
imul   $0x218,%edx,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
add    %edx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @GetSinGenFreqReg(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i64
%4 = alloca i64
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = zext i16 %5 to i64
%7 = shl i64 %6, 18
%8 = udiv i64 %7, 73728
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = mul i64 %9, 536
%11 = udiv i64 %10, 1000
store i64 %11, i64* %4
%12 = load i64, i64* %4
%13 = load i64, i64* %3
%14 = add i64 %13, %12
store i64 %14, i64* %3
%15 = load i64, i64* %3
%16 = trunc i64 %15 to i16
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @GetSinGenFreqReg(i16 zeroext %0) {
%2 = zext i16 %0 to i64
%3 = shl nuw nsw i64 %2, 18
%4 = udiv i64 %3, 73728
%5 = trunc i64 %4 to i32
%6 = mul nuw nsw i32 %5, 536
%7 = udiv i32 %6, 1000
%8 = zext i32 %7 to i64
%9 = add nuw nsw i64 %4, %8
%10 = trunc i64 %9 to i16
ret i16 %10
}
void main(int ram) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <main+0x7>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define void @main(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1, %3
br label %3
}

LLVM IR (-O2):
define void @main(i32 %0) {
br label %2
2: ; preds = %1, %2
br label %2
}
/* Variables and functions */
int getpid();
int libc_getpid(void) { return getpid(); }


x86 assembly (clang, -O0):
<libc_getpid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<libc_getpid>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i32 @libc_getpid() {
%1 = call i32 (...) @getpid()
ret i32 %1
}

LLVM IR (-O2):
define i32 @libc_getpid() {
%1 = tail call i32 (...) @getpid()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ srandom(int);
int time(int /*<<< orphan*/ *);
void QCC_init(int seed) {
  if (seed)
    srandom(seed);
  else
    srandom(time(NULL));
}


x86 assembly (clang, -O0):
<QCC_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1142 <QCC_init+0x22>
mov    -0x4(%rbp),%edi
call   1030 <srandom@plt>
jmp    1152 <QCC_init+0x32>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QCC_init>:
test   %edi,%edi
je     1129 <QCC_init+0x9>
jmp    1030 <srandom@plt>
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
add    $0x8,%rsp
jmp    1030 <srandom@plt>

LLVM IR (-O0):
define void @QCC_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @srandom(i32 %6)
br label %11
8: ; preds = %1
%9 = call i32 @time(i32* null)
%10 = call i32 @srandom(i32 %9)
br label %11
11: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
define void @QCC_init(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @time(i32* null)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ %0, %1 ]
%7 = tail call i32 @srandom(i32 %6)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t sign_extend8(uint32_t v) {
  if (v & 0x80)
    v |= 0xffffff00;
  return v;
}


x86 assembly (clang, -O0):
<sign_extend8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1123 <sign_extend8+0x23>
mov    -0x4(%rbp),%eax
or     $0xffffff00,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign_extend8>:
mov    %edi,%eax
or     $0xffffff00,%eax
test   $0x80,%dil
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @sign_extend8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 128
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = or i32 %7, -256
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @sign_extend8(i32 %0) {
%2 = and i32 %0, 128
%3 = icmp eq i32 %2, 0
%4 = or i32 %0, -256
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
int log_msg_enable() { return 1; }


x86 assembly (clang, -O0):
<log_msg_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_msg_enable>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @log_msg_enable() {
ret i32 1
}

LLVM IR (-O2):
define i32 @log_msg_enable() {
ret i32 1
}
/* Variables and functions */
int mfspr(scalar_t__);
int /*<<< orphan*/ mtspr(scalar_t__, int);
int int_disable(unsigned long vect) {
  if (vect >= 32)
    return -1;
  mtspr(((9 << (11)) + 0), mfspr(((9 << (11)) + 0)) & ~(0x00000001L << vect));
  return 0;
}


x86 assembly (clang, -O0):
<int_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x20,-0x10(%rbp)
jb     1143 <int_disable+0x23>
movl   $0xffffffff,-0x4(%rbp)
jmp    1178 <int_disable+0x58>
mov    $0x4800,%edi
call   1030 <mfspr@plt>
cltq
mov    -0x10(%rbp),%rcx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
mov    %eax,%esi
mov    $0x4800,%edi
call   1040 <mtspr@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_disable>:
mov    $0xffffffff,%eax
cmp    $0x1f,%rdi
ja     1154 <int_disable+0x34>
push   %rbx
mov    %rdi,%rbx
mov    $0x4800,%edi
call   1030 <mfspr@plt>
mov    $0x1,%esi
mov    %ebx,%ecx
shl    %cl,%rsi
not    %esi
and    %eax,%esi
mov    $0x4800,%edi
call   1040 <mtspr@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @int_disable(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp uge i64 %4, 32
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %16
7: ; preds = %1
%8 = call i32 @mfspr(i64 18432)
%9 = sext i32 %8 to i64
%10 = load i64, i64* %3
%11 = shl i64 1, %10
%12 = xor i64 %11, -1
%13 = and i64 %9, %12
%14 = trunc i64 %13 to i32
%15 = call i32 @mtspr(i64 18432, i32 %14)
store i32 0, i32* %2
br label %16
16: ; preds = %7, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @int_disable(i64 %0) {
%2 = icmp ugt i64 %0, 31
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i32 @mfspr(i64 18432)
%5 = shl nuw nsw i64 1, %0
%6 = trunc i64 %5 to i32
%7 = xor i32 %6, -1
%8 = and i32 %4, %7
%9 = tail call i32 @mtspr(i64 18432, i32 %8)
br label %10
10: ; preds = %1, %3
%11 = phi i32 [ 0, %3 ], [ -1, %1 ]
ret i32 %11
}
unsigned char f4(unsigned char x, unsigned char y) {
  x = x | (unsigned char)(y & 255);
  return x;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
and    $0xff,%ecx
movzbl %cl,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f4(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = and i32 %8, 255
%10 = trunc i32 %9 to i8
%11 = zext i8 %10 to i32
%12 = or i32 %6, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %3
%14 = load i8, i8* %3
ret i8 %14
}

LLVM IR (-O2):
define zeroext i8 @f4(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
ret i8 %3
}
/* Type definitions */
struct linux_binprm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cap_bprm_compute_creds(struct linux_binprm *);
void security_bprm_compute_creds(struct linux_binprm *bprm) {
  cap_bprm_compute_creds(bprm);
}


x86 assembly (clang, -O0):
<security_bprm_compute_creds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cap_bprm_compute_creds@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_bprm_compute_creds>:
jmp    1030 <cap_bprm_compute_creds@plt>

LLVM IR (-O0):
%struct.linux_binprm = type { i32 }
define void @security_bprm_compute_creds(%struct.linux_binprm* %0) {
%2 = alloca %struct.linux_binprm*
store %struct.linux_binprm* %0, %struct.linux_binprm** %2
%3 = load %struct.linux_binprm*, %struct.linux_binprm** %2
%4 = call i32 @cap_bprm_compute_creds(%struct.linux_binprm* %3)
ret void
}

LLVM IR (-O2):
%struct.linux_binprm = type { i32 }
define void @security_bprm_compute_creds(%struct.linux_binprm* %0) {
%2 = tail call i32 @cap_bprm_compute_creds(%struct.linux_binprm* %0)
ret void
}
void ff_hevc_put_hevc_bi_qpel_hv16_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_hv16_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_hv16_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_hv16_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_hv16_10_avx2() {
ret void
}
/* Variables and functions */
int EOF;
int sgetch(int _ignored, int _str_p) {
  const char **str_p = (const char **)_str_p;
  const char *str = *str_p;
  int c;
  if (*str == '\0') {
    c = EOF;
  } else {
    c = (unsigned char)(*str);
    *str_p = ++str;
  }
  return c;
}


x86 assembly (clang, -O0):
<sgetch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    113e <sgetch+0x3e>
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
jmp    115b <sgetch+0x5b>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgetch>:
movslq %esi,%rcx
mov    (%rcx),%rdx
movzbl (%rdx),%eax
test   %eax,%eax
je     1115 <sgetch+0x15>
add    $0x1,%rdx
mov    %rdx,(%rcx)
ret
mov    0x2ecc(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @sgetch(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i8**
store i8** %10, i8*** %5
%11 = load i8**, i8*** %5
%12 = load i8*, i8** %11
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %2
%18 = load i32, i32* @EOF
store i32 %18, i32* %7
br label %26
19: ; preds = %2
%20 = load i8*, i8** %6
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
store i32 %22, i32* %7
%23 = load i8*, i8** %6
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %6
%25 = load i8**, i8*** %5
store i8* %24, i8** %25
br label %26
26: ; preds = %19, %17
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @sgetch(i32 %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = inttoptr i64 %3 to i8**
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* @EOF
br label %13
10: ; preds = %2
%11 = zext i8 %6 to i32
%12 = getelementptr inbounds i8, i8* %5, i64 1
store i8* %12, i8** %4
br label %13
13: ; preds = %10, %8
%14 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ fatserror(char *);
volatile void unexpectedEOF() { fatserror("unexpected EOF"); }


x86 assembly (clang, -O0):
<unexpectedEOF>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fatserror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unexpectedEOF>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatserror@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"unexpected EOF\00"
define void @unexpectedEOF() {
%1 = call i32 @fatserror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"unexpected EOF\00"
define void @unexpectedEOF() {
%1 = tail call i32 @fatserror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
void stb(unsigned char *p, unsigned char x) { p[15] = x; }


x86 assembly (clang, -O0):
<stb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0xf(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb>:
mov    %sil,0xf(%rdi)
ret

LLVM IR (-O0):
define void @stb(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 15
store i8 %5, i8* %7
ret void
}

LLVM IR (-O2):
define void @stb(i8* nocapture writeonly %0, i8 zeroext %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 15
store i8 %1, i8* %3
ret void
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ INIT_LIST_HEAD(struct list_head *);
int /*<<< orphan*/ list_replace(struct list_head *, struct list_head *);
void list_replace_init(struct list_head *old, struct list_head *new_list) {
  list_replace(old, new_list);
  INIT_LIST_HEAD(old);
}


x86 assembly (clang, -O0):
<list_replace_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <list_replace@plt>
mov    -0x8(%rbp),%rdi
call   1030 <INIT_LIST_HEAD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_replace_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <list_replace@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <INIT_LIST_HEAD@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_replace_init(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %3
%6 = load %struct.list_head*, %struct.list_head** %4
%7 = call i32 @list_replace(%struct.list_head* %5, %struct.list_head* %6)
%8 = load %struct.list_head*, %struct.list_head** %3
%9 = call i32 @INIT_LIST_HEAD(%struct.list_head* %8)
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_replace_init(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i32 @list_replace(%struct.list_head* %0, %struct.list_head* %1)
%4 = tail call i32 @INIT_LIST_HEAD(%struct.list_head* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initialize_bss_section();
int /*<<< orphan*/ initialize_data_section();
int /*<<< orphan*/ main();
void interrupt_reset(void) {
  initialize_bss_section();
  initialize_data_section();
  main();
  while (1) {
  }
}


x86 assembly (clang, -O0):
<interrupt_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <initialize_bss_section@plt>
mov    $0x0,%al
call   1030 <initialize_data_section@plt>
mov    $0x0,%al
call   1050 <main@plt>
jmp    1149 <interrupt_reset+0x19>

x86 assembly (clang, -O2):
<interrupt_reset>:
push   %rax
xor    %eax,%eax
call   1040 <initialize_bss_section@plt>
xor    %eax,%eax
call   1030 <initialize_data_section@plt>
xor    %eax,%eax
call   1050 <main@plt>
cs nopw 0x0(%rax,%rax,1)
jmp    1150 <interrupt_reset+0x20>

LLVM IR (-O0):
define void @interrupt_reset() {
%1 = call i32 (...) @initialize_bss_section()
%2 = call i32 (...) @initialize_data_section()
%3 = call i32 (...) @main()
br label %4
4: ; preds = %0, %4
br label %4
}

LLVM IR (-O2):
define void @interrupt_reset() {
%1 = tail call i32 (...) @initialize_bss_section()
%2 = tail call i32 (...) @initialize_data_section()
%3 = tail call i32 (...) @main()
br label %4
4: ; preds = %0, %4
br label %4
}
int isLessOrEqual(int x, int y) {
  int signx = (x >> 31) & 1;
  int signy = (y >> 31) & 1;
  int signsub = ((y + (~x + 1)) >> 31) & 1;
  return ((signx ^ signy) & signx) | ((signx ^ signy ^ 1) & (signsub ^ 1));
}


x86 assembly (clang, -O0):
<isLessOrEqual>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
and    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1f,%eax
and    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
add    $0x1,%ecx
add    %ecx,%eax
sar    $0x1f,%eax
and    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    -0x10(%rbp),%ecx
xor    $0x1,%ecx
mov    -0x14(%rbp),%edx
xor    $0x1,%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLessOrEqual>:
mov    %esi,%ecx
not    %esi
lea    (%rsi,%rdi,1),%edx
mov    %edi,%eax
shr    $0x1f,%eax
shr    $0x1f,%ecx
xor    %eax,%ecx
shr    $0x1f,%edx
xor    %edx,%eax
and    %ecx,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @isLessOrEqual(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = ashr i32 %8, 31
%10 = and i32 %9, 1
store i32 %10, i32* %5
%11 = load i32, i32* %4
%12 = ashr i32 %11, 31
%13 = and i32 %12, 1
store i32 %13, i32* %6
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = xor i32 %15, -1
%17 = add nsw i32 %16, 1
%18 = add nsw i32 %14, %17
%19 = ashr i32 %18, 31
%20 = and i32 %19, 1
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %6
%23 = xor i32 %21, %22
%24 = load i32, i32* %5
%25 = and i32 %23, %24
%26 = load i32, i32* %5
%27 = load i32, i32* %6
%28 = xor i32 %26, %27
%29 = xor i32 %28, 1
%30 = load i32, i32* %7
%31 = xor i32 %30, 1
%32 = and i32 %29, %31
%33 = or i32 %25, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @isLessOrEqual(i32 %0, i32 %1) {
%3 = lshr i32 %0, 31
%4 = lshr i32 %1, 31
%5 = xor i32 %4, %3
%6 = and i32 %5, %3
%7 = xor i32 %5, -1
%8 = xor i32 %1, -1
%9 = add i32 %8, %0
%10 = lshr i32 %9, 31
%11 = and i32 %10, %7
%12 = or i32 %6, %11
ret i32 %12
}
int test_imm_EFint64_lowword_mem(long long *val) {
  return ((*val) & (0xEF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EFint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xef,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EFint64_lowword_mem>:
testb  $0xef,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EFint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 239
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EFint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 239
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ ptrdiff_t;

/* Variables and functions */
int /*<<< orphan*/ ff_bfin_put_pixels8uc(int /*<<< orphan*/ *,
                                         int /*<<< orphan*/ const *,
                                         int /*<<< orphan*/ const *,
                                         int /*<<< orphan*/, int /*<<< orphan*/,
                                         int);
void bfin_put_pixels8(uint8_t *block, const uint8_t *pixels,
                      ptrdiff_t line_size, int h) {
  ff_bfin_put_pixels8uc(block, pixels, pixels, line_size, line_size, h);
}


x86 assembly (clang, -O0):
<bfin_put_pixels8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
call   1030 <ff_bfin_put_pixels8uc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bfin_put_pixels8>:
mov    %ecx,%r9d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %ecx,%r8d
jmp    1030 <ff_bfin_put_pixels8uc@plt>

LLVM IR (-O0):
define void @bfin_put_pixels8(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = call i32 @ff_bfin_put_pixels8uc(i32* %9, i32* %10, i32* %11, i32 %12, i32 %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @bfin_put_pixels8(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @ff_bfin_put_pixels8uc(i32* %0, i32* %1, i32* %1, i32 %2, i32 %2, i32 %3)
ret void
}