xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t utf8_length(const char *utf8_data) {
  size_t i = 0, j = 0;
  while (utf8_data[i]) {
    if ((utf8_data[i] & 0xC0) != 0x80)
      j++;
    i++;
  }
  return j;
}


x86 assembly (clang, -O0):
<utf8_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1163 <utf8_length+0x63>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
je     1152 <utf8_length+0x52>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1118 <utf8_length+0x18>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8_length>:
mov    (%rdi),%cl
test   %cl,%cl
je     112a <utf8_length+0x2a>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
and    $0xc0,%cl
xor    %edx,%edx
cmp    $0x80,%cl
setne  %dl
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <utf8_length+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @utf8_length(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
store i64 0, i64* %4
br label %5
5: ; preds = %22, %1
%6 = load i8*, i8** %2
%7 = load i64, i64* %3
%8 = getelementptr inbounds i8, i8* %6, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %25
11: ; preds = %5
%12 = load i8*, i8** %2
%13 = load i64, i64* %3
%14 = getelementptr inbounds i8, i8* %12, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = and i32 %16, 192
%18 = icmp ne i32 %17, 128
br i1 %18, label %19, label %22
19: ; preds = %11
%20 = load i64, i64* %4
%21 = add i64 %20, 1
store i64 %21, i64* %4
br label %22
22: ; preds = %19, %11
%23 = load i64, i64* %3
%24 = add i64 %23, 1
store i64 %24, i64* %3
br label %5
25: ; preds = %5
%26 = load i64, i64* %4
ret i64 %26
}

LLVM IR (-O2):
define i64 @utf8_length(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %14, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ 0, %1 ]
%7 = phi i64 [ %12, %4 ], [ 0, %1 ]
%8 = and i8 %5, -64
%9 = icmp ne i8 %8, -128
%10 = zext i1 %9 to i64
%11 = add i64 %6, %10
%12 = add i64 %7, 1
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4, %1
%17 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %17
}
void abcde3fghijklmn9opqrstuvwxzy() {}


x86 assembly (clang, -O0):
<abcde3fghijklmn9opqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abcde3fghijklmn9opqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @abcde3fghijklmn9opqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @abcde3fghijklmn9opqrstuvwxzy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ compute_cross_distances_nonpacked(int, int, int,
                                                     float const *, int,
                                                     float const *, int,
                                                     float *, int);
void compute_cross_distances(int d, int na, int nb, const float *a,
                             const float *b, float *dist2) {
  compute_cross_distances_nonpacked(d, na, nb, a, d, b, d, dist2, na);
}


x86 assembly (clang, -O0):
<compute_cross_distances>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%r8d
mov    -0x20(%rbp),%r9
mov    -0x4(%rbp),%r11d
mov    -0x28(%rbp),%r10
mov    -0x8(%rbp),%eax
mov    %r11d,(%rsp)
mov    %r10,0x8(%rsp)
mov    %eax,0x10(%rsp)
call   1030 <compute_cross_distances_nonpacked@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_cross_distances>:
push   %rax
mov    %r9,%rax
mov    %r8,%r9
sub    $0x8,%rsp
mov    %edi,%r8d
push   %rsi
push   %rax
push   %rdi
call   1030 <compute_cross_distances_nonpacked@plt>
add    $0x20,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @compute_cross_distances(i32 %0, i32 %1, i32 %2, float* %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca float*
%11 = alloca float*
%12 = alloca float*
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store float* %3, float** %10
store float* %4, float** %11
store float* %5, float** %12
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load float*, float** %10
%17 = load i32, i32* %7
%18 = load float*, float** %11
%19 = load i32, i32* %7
%20 = load float*, float** %12
%21 = load i32, i32* %8
%22 = call i32 @compute_cross_distances_nonpacked(i32 %13, i32 %14, i32 %15, float* %16, i32 %17, float* %18, i32 %19, float* %20, i32 %21)
ret void
}

LLVM IR (-O2):
define void @compute_cross_distances(i32 %0, i32 %1, i32 %2, float* %3, float* %4, float* %5) {
%7 = tail call i32 @compute_cross_distances_nonpacked(i32 %0, i32 %1, i32 %2, float* %3, i32 %0, float* %4, i32 %0, float* %5, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_avg1_16(int, int /*<<< orphan*/ *,
                              int /*<<< orphan*/ const *, int, int);
void MC_avg_o_16_3dnow(uint8_t *dest, const uint8_t *ref, int stride,
                       int height) {
  MC_avg1_16(height, dest, ref, stride, 1);
}


x86 assembly (clang, -O0):
<MC_avg_o_16_3dnow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1,%r8d
call   1030 <MC_avg1_16@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_avg_o_16_3dnow>:
mov    %edx,%eax
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %ecx,%edi
mov    %eax,%ecx
mov    $0x1,%r8d
jmp    1030 <MC_avg1_16@plt>

LLVM IR (-O0):
define void @MC_avg_o_16_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @MC_avg1_16(i32 %9, i32* %10, i32* %11, i32 %12, i32 1)
ret void
}

LLVM IR (-O2):
define void @MC_avg_o_16_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_avg1_16(i32 %3, i32* %0, i32* %1, i32 %2, i32 1)
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
void bound_int32(int32_t *number, int32_t max, int32_t min) {
  if (*number > max)
    *number = max;
  else if (*number < min)
    *number = min;
}


x86 assembly (clang, -O0):
<bound_int32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
cmp    -0x10(%rbp),%rax
jle    1131 <bound_int32+0x31>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    1152 <bound_int32+0x52>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jge    114d <bound_int32+0x4d>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    1152 <bound_int32+0x52>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bound_int32>:
mov    (%rdi),%rax
cmp    %rsi,%rax
jg     1110 <bound_int32+0x10>
mov    %rdx,%rsi
cmp    %rdx,%rax
jge    1113 <bound_int32+0x13>
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @bound_int32(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %7
%9 = load i64, i64* %5
%10 = icmp sgt i64 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i64, i64* %5
%13 = load i64*, i64** %4
store i64 %12, i64* %13
br label %23
14: ; preds = %3
%15 = load i64*, i64** %4
%16 = load i64, i64* %15
%17 = load i64, i64* %6
%18 = icmp slt i64 %16, %17
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load i64, i64* %6
%21 = load i64*, i64** %4
store i64 %20, i64* %21
br label %22
22: ; preds = %19, %14
br label %23
23: ; preds = %22, %11
ret void
}

LLVM IR (-O2):
define void @bound_int32(i64* nocapture %0, i64 %1, i64 %2) {
%4 = load i64, i64* %0
%5 = icmp sgt i64 %4, %1
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = icmp slt i64 %4, %2
br i1 %7, label %8, label %10
8: ; preds = %6, %3
%9 = phi i64 [ %1, %3 ], [ %2, %6 ]
store i64 %9, i64* %0
br label %10
10: ; preds = %8, %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ val;

/* Variables and functions */
int /*<<< orphan*/ memcpy(size_t *, void const *, int);
size_t LZ4_read_ARCH(const void *memPtr) {
  size_t val;
  memcpy(&val, memPtr, sizeof(val));
  return val;
}


x86 assembly (clang, -O0):
<LZ4_read_ARCH>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_read_ARCH>:
push   %rax
mov    %rdi,%rsi
mov    %rsp,%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @LZ4_read_ARCH(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i64* %3, i8* %4, i32 8)
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @LZ4_read_ARCH(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @memcpy(i64* %2, i8* %0, i32 8)
%5 = load i64, i64* %2
ret i64 %5
}
void tex_disp_header(struct list *lst) {}


x86 assembly (clang, -O0):
<tex_disp_header>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tex_disp_header>:
ret

LLVM IR (-O0):
%struct.list = type opaque
define void @tex_disp_header(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
ret void
}

LLVM IR (-O2):
%struct.list = type opaque
define void @tex_disp_header(%struct.list* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(unsigned long);
void *realloc(void *, int);
void f2(int i) {
  unsigned long j = 10;
  void *ptr = malloc(j);
  ptr = realloc(ptr, i);
  free(ptr);
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0xa,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1050 <realloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
push   %rbx
mov    %edi,%ebx
mov    $0xa,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
mov    %ebx,%esi
call   1050 <realloc@plt>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @f2(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i8*
store i32 %0, i32* %2
store i64 10, i64* %3
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = load i32, i32* %2
%9 = call i8* @realloc(i8* %7, i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = call i32 @free(i8* %10)
ret void
}

LLVM IR (-O2):
define void @f2(i32 %0) {
%2 = tail call dereferenceable_or_null(10) i8* @malloc(i64 10)
%3 = tail call i8* @realloc(i8* %2, i32 %0)
%4 = tail call i32 @free(i8* %3)
ret void
}
int cont_add(int a) {
  static int b = 3;
  return b += a;
}


x86 assembly (clang, -O0):
<cont_add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    0x2f10(%rip),%eax
mov    %eax,0x2f0a(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cont_add>:
mov    %edi,%eax
add    0x2f18(%rip),%eax
mov    %eax,0x2f12(%rip)
ret

LLVM IR (-O0):
@cont_add.b = internal global i32 3
define i32 @cont_add(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @cont_add.b
%5 = add nsw i32 %4, %3
store i32 %5, i32* @cont_add.b
ret i32 %5
}

LLVM IR (-O2):
@cont_add.b = internal unnamed_addr global i32 3
define i32 @cont_add(i32 %0) {
%2 = load i32, i32* @cont_add.b
%3 = add nsw i32 %2, %0
store i32 %3, i32* @cont_add.b
ret i32 %3
}
int leading_bit(unsigned int x) { return 31 - __builtin_clz(x); }


x86 assembly (clang, -O0):
<leading_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bsr    %eax,%ecx
xor    $0x1f,%ecx
mov    $0x1f,%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leading_bit>:
bsr    %edi,%eax
ret

LLVM IR (-O0):
define i32 @leading_bit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.ctlz.i32(i32 %3, i1 true)
%5 = sub nsw i32 31, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @leading_bit(i32 %0) {
%2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 true)
%3 = xor i32 %2, 31
ret i32 %3
}
int is_close_brace(char c) {
  return c == ')' || c == ']' || c == '}' || c == '>';
}


x86 assembly (clang, -O0):
<is_close_brace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x29,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_close_brace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5d,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_close_brace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7d,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_close_brace+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x3e,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_close_brace>:
mov    $0x1,%eax
cmp    $0x29,%dil
je     1120 <is_close_brace+0x20>
cmp    $0x5d,%dil
je     1120 <is_close_brace+0x20>
cmp    $0x7d,%dil
je     1120 <is_close_brace+0x20>
xor    %eax,%eax
cmp    $0x3e,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_close_brace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 41
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 93
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 125
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 62
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_close_brace(i8 signext %0) {
switch i8 %0, label %2 [
i8 125, label %5
i8 93, label %5
i8 41, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 62
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int not_hidden();
int shared(void) { return not_hidden(); }


x86 assembly (clang, -O0):
<shared>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <not_hidden@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shared>:
xor    %eax,%eax
jmp    1030 <not_hidden@plt>

LLVM IR (-O0):
define i32 @shared() {
%1 = call i32 (...) @not_hidden()
ret i32 %1
}

LLVM IR (-O2):
define i32 @shared() {
%1 = tail call i32 (...) @not_hidden()
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ keywords;
typedef int int64_t;

/* Variables and functions */
int match_words(char const *, char const *, char const **, int const);
int64_t match_c_control(const char *str, const char *beginning_of_line) {
  static const char *keywords[] = {
      "break", "const", "continue", "goto", "return",
  };
  static const int64_t keyword_count = sizeof(keywords) / sizeof(keywords[0]);
  return match_words(str, beginning_of_line, keywords, keyword_count);
}


x86 assembly (clang, -O0):
<match_c_control>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0x2f01(%rip),%rdx
mov    $0x5,%ecx
call   1030 <match_words@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_c_control>:
lea    0x2f19(%rip),%rdx
mov    $0x5,%ecx
jmp    1030 <match_words@plt>

LLVM IR (-O0):
@match_c_control.keywords = internal global [5 x i8*] [i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.4, i32 0, i32 0)]
@.str = [6 x i8] c"break\00"
@.str.1 = [6 x i8] c"const\00"
@.str.2 = [9 x i8] c"continue\00"
@.str.3 = [5 x i8] c"goto\00"
@.str.4 = [7 x i8] c"return\00"
@match_c_control.keyword_count = internal constant i32 5
define i32 @match_c_control(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @match_words(i8* %5, i8* %6, i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @match_c_control.keywords, i64 0, i64 0), i32 5)
ret i32 %7
}

LLVM IR (-O2):
@match_c_control.keywords = internal global [5 x i8*] [i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.4, i32 0, i32 0)]
@.str = [6 x i8] c"break\00"
@.str.1 = [6 x i8] c"const\00"
@.str.2 = [9 x i8] c"continue\00"
@.str.3 = [5 x i8] c"goto\00"
@.str.4 = [7 x i8] c"return\00"
define i32 @match_c_control(i8* %0, i8* %1) {
%3 = tail call i32 @match_words(i8* %0, i8* %1, i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @match_c_control.keywords, i64 0, i64 0), i32 5)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ disp_str(char *);
int /*<<< orphan*/ milli_delay(int);
void TestB() {
  int i = 0x1000;
  while (1) {
    disp_str("B.");
    milli_delay(900);
  }
}


x86 assembly (clang, -O0):
<TestB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1000,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <disp_str@plt>
mov    $0x384,%edi
call   1040 <milli_delay@plt>
jmp    112f <TestB+0xf>

x86 assembly (clang, -O2):
<TestB>:
push   %rbx
lea    0xed8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <disp_str@plt>
mov    $0x384,%edi
call   1040 <milli_delay@plt>
jmp    1130 <TestB+0x10>

LLVM IR (-O0):
@.str = [3 x i8] c"B.\00"
define void @TestB() {
%1 = alloca i32
store i32 4096, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @disp_str(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @milli_delay(i32 900)
br label %2
}

LLVM IR (-O2):
@.str = [3 x i8] c"B.\00"
define void @TestB() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @disp_str(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @milli_delay(i32 900)
br label %1
}
/* Type definitions */
struct fid_ep {
  int dummy;
};
struct fi_rx_attr {
  int dummy;
};

/* Variables and functions */
int gnix_rx_context(struct fid_ep *, int, struct fi_rx_attr *, struct fid_ep **,
                    void *);
int fi_rx_context(struct fid_ep *ep, int index, struct fi_rx_attr *attr,
                  struct fid_ep **rx_ep, void *context) {
  return gnix_rx_context(ep, index, attr, rx_ep, context);
}


x86 assembly (clang, -O0):
<fi_rx_context>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <gnix_rx_context@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi_rx_context>:
jmp    1030 <gnix_rx_context@plt>

LLVM IR (-O0):
%struct.fid_ep = type { i32 }
%struct.fi_rx_attr = type { i32 }
define i32 @fi_rx_context(%struct.fid_ep* %0, i32 %1, %struct.fi_rx_attr* %2, %struct.fid_ep** %3, i8* %4) {
%6 = alloca %struct.fid_ep*
%7 = alloca i32
%8 = alloca %struct.fi_rx_attr*
%9 = alloca %struct.fid_ep**
%10 = alloca i8*
store %struct.fid_ep* %0, %struct.fid_ep** %6
store i32 %1, i32* %7
store %struct.fi_rx_attr* %2, %struct.fi_rx_attr** %8
store %struct.fid_ep** %3, %struct.fid_ep*** %9
store i8* %4, i8** %10
%11 = load %struct.fid_ep*, %struct.fid_ep** %6
%12 = load i32, i32* %7
%13 = load %struct.fi_rx_attr*, %struct.fi_rx_attr** %8
%14 = load %struct.fid_ep**, %struct.fid_ep*** %9
%15 = load i8*, i8** %10
%16 = call i32 @gnix_rx_context(%struct.fid_ep* %11, i32 %12, %struct.fi_rx_attr* %13, %struct.fid_ep** %14, i8* %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.fid_ep = type { i32 }
%struct.fi_rx_attr = type { i32 }
define i32 @fi_rx_context(%struct.fid_ep* %0, i32 %1, %struct.fi_rx_attr* %2, %struct.fid_ep** %3, i8* %4) {
%6 = tail call i32 @gnix_rx_context(%struct.fid_ep* %0, i32 %1, %struct.fi_rx_attr* %2, %struct.fid_ep** %3, i8* %4)
ret i32 %6
}
INSTRUCTION(rcf) { set_flag_c(0); }


x86 assembly (clang, -O0):
<INSTRUCTION>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
xor    %edi,%edi
mov    $0x0,%al
call   1030 <set_flag_c@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INSTRUCTION>:
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <set_flag_c@plt>

LLVM IR (-O0):
define i32 @INSTRUCTION(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (i32, ...) bitcast (i32 (...)* @set_flag_c to i32 (i32, ...)*)(i32 0)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @INSTRUCTION(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @set_flag_c to i32 (i32, ...)*)(i32 0)
ret i32 undef
}
int isallzero(char *str) {
  if (*str == '\0')
    return 0;
  while (*str == '0')
    str++;
  return *str == '\0';
}


x86 assembly (clang, -O0):
<isallzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1124 <isallzero+0x24>
movl   $0x0,-0x4(%rbp)
jmp    115f <isallzero+0x5f>
jmp    1129 <isallzero+0x29>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x30,%eax
jne    114a <isallzero+0x4a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1129 <isallzero+0x29>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isallzero>:
mov    (%rdi),%cl
test   %cl,%cl
je     1124 <isallzero+0x24>
cmp    $0x30,%cl
jne    111c <isallzero+0x1c>
add    $0x1,%rdi
nop
movzbl (%rdi),%ecx
add    $0x1,%rdi
cmp    $0x30,%cl
je     1110 <isallzero+0x10>
xor    %eax,%eax
test   %cl,%cl
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isallzero(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %24
9: ; preds = %1
br label %10
10: ; preds = %15, %9
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 48
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %10
18: ; preds = %10
%19 = load i8*, i8** %3
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 0
%23 = zext i1 %22 to i32
store i32 %23, i32* %2
br label %24
24: ; preds = %18, %8
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @isallzero(i8* nocapture %0) {
%2 = load i8, i8* %0
switch i8 %2, label %8 [
i8 0, label %12
i8 48, label %3
]
3: ; preds = %1, %3
%4 = phi i8* [ %5, %3 ], [ %0, %1 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 48
br i1 %7, label %3, label %8
8: ; preds = %3, %1
%9 = phi i8 [ %2, %1 ], [ %6, %3 ]
%10 = icmp eq i8 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %1, %8
%13 = phi i32 [ %11, %8 ], [ 0, %1 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
void handler(int sig) {
  printf("recv a sig=%d\n", sig);
  sleep(2);
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
pop    %rax
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"recv a sig=%d\0A\00"
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @sleep(i32 2)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"recv a sig=%d\0A\00"
define void @handler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 @sleep(i32 2)
ret void
}
int bar(unsigned int x) { return x >> 31 || (-x) >> 31; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
shr    $0x1f,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jne    112c <bar+0x2c>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
shr    $0x1f,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 31
%5 = icmp ne i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub i32 0, %7
%9 = lshr i32 %8, 31
%10 = icmp ne i32 %9, 0
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ true, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct feed_tty {
  int dummy;
};

/* Variables and functions */
char feed_tty_clear(struct feed_tty *const, int);
char feed_tty_clear_screen(struct feed_tty *const p_tty) {
  return feed_tty_clear(p_tty, 2);
}


x86 assembly (clang, -O0):
<feed_tty_clear_screen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <feed_tty_clear@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<feed_tty_clear_screen>:
mov    $0x2,%esi
jmp    1030 <feed_tty_clear@plt>

LLVM IR (-O0):
%struct.feed_tty = type { i32 }
define signext i8 @feed_tty_clear_screen(%struct.feed_tty* %0) {
%2 = alloca %struct.feed_tty*
store %struct.feed_tty* %0, %struct.feed_tty** %2
%3 = load %struct.feed_tty*, %struct.feed_tty** %2
%4 = call signext i8 @feed_tty_clear(%struct.feed_tty* %3, i32 2)
ret i8 %4
}

LLVM IR (-O2):
%struct.feed_tty = type { i32 }
define signext i8 @feed_tty_clear_screen(%struct.feed_tty* %0) {
%2 = tail call signext i8 @feed_tty_clear(%struct.feed_tty* %0, i32 2)
ret i8 %2
}
int main() {
  int a = 10;
  int b = 20;
  int result;
  result = a * b;
  __asm__("nop");
  printf("The result is %d\n", result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x14,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
nop
mov    -0x10(%rbp),%esi
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
nop
lea    0xee7(%rip),%rdi
mov    $0xc8,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"The result is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 20, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = mul nsw i32 %5, %6
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"The result is %d\0A\00"
define i32 @main() {
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 200)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
size_t fwrite(char const *, int, size_t, int /*<<< orphan*/ *);
size_t strlen(char const *);
int fputs(const char *restrict s, FILE *restrict stream) {
  size_t len = strlen(s);
  size_t ret = fwrite(s, 1, len, stream);
  return ret == len ? (int)ret : EOF;
}


x86 assembly (clang, -O0):
<fputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
call   1040 <fwrite@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1171 <fputs+0x51>
mov    -0x20(%rbp),%rax
mov    %eax,-0x24(%rbp)
jmp    117d <fputs+0x5d>
mov    0x2e70(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputs>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rax,%r15
mov    %rbx,%rdi
mov    $0x1,%esi
mov    %rax,%rdx
mov    %r14,%rcx
call   1040 <fwrite@plt>
cmp    %r15,%rax
je     1154 <fputs+0x34>
mov    0x2e96(%rip),%rax
mov    (%rax),%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @fputs(i8* noalias %0, i32* noalias %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i32* %1, i32** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %5
%11 = load i32*, i32** %4
%12 = call i64 @fwrite(i8* %9, i32 1, i64 %10, i32* %11)
store i64 %12, i64* %6
%13 = load i64, i64* %6
%14 = load i64, i64* %5
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %19
16: ; preds = %2
%17 = load i64, i64* %6
%18 = trunc i64 %17 to i32
br label %21
19: ; preds = %2
%20 = load i32, i32* @EOF
br label %21
21: ; preds = %19, %16
%22 = phi i32 [ %18, %16 ], [ %20, %19 ]
ret i32 %22
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @fputs(i8* noalias nocapture %0, i32* noalias nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @fwrite(i8* %0, i32 1, i64 %3, i32* %1)
%5 = icmp eq i64 %4, %3
%6 = trunc i64 %4 to i32
%7 = load i32, i32* @EOF
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
/* Variables and functions */
scalar_t__ ispunct(char const);
int PunctCount(const char *str) {
  int ct = 0;
  while (*str) {
    if (ispunct(*str)) {
      ct++;
    }
    str++;
  }
  return ct;
}


x86 assembly (clang, -O0):
<PunctCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1160 <PunctCount+0x50>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
je     114f <PunctCount+0x3f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1123 <PunctCount+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PunctCount>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     114c <PunctCount+0x3c>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <ispunct@plt>
cmp    $0x1,%rax
sbb    $0xffffffff,%ebp
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <PunctCount+0x20>
jmp    114e <PunctCount+0x3e>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @PunctCount(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i64 @ispunct(i8 signext %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %8
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @PunctCount(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = tail call i64 @ispunct(i8 signext %5)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %6, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %16
}
void BN_set_params(void) {}


x86 assembly (clang, -O0):
<BN_set_params>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_set_params>:
ret

LLVM IR (-O0):
define void @BN_set_params() {
ret void
}

LLVM IR (-O2):
define void @BN_set_params() {
ret void
}
unsigned int build_header(unsigned int dstAddr, unsigned int packetLength) {
  return ((dstAddr << 28) | (packetLength << 16));
}


x86 assembly (clang, -O0):
<build_header>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1c,%eax
mov    -0x8(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_header>:
mov    %esi,%eax
shl    $0x1c,%edi
shl    $0x10,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @build_header(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 28
%7 = load i32, i32* %4
%8 = shl i32 %7, 16
%9 = or i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @build_header(i32 %0, i32 %1) {
%3 = shl i32 %0, 28
%4 = shl i32 %1, 16
%5 = or i32 %4, %3
ret i32 %5
}
void gcontlist2_(actno, maxno, list, return_code) int *actno, *maxno,
    *return_code;
float *list;
{}


x86 assembly (clang, -O0):
<gcontlist2_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcontlist2_>:
ret

LLVM IR (-O0):
define void @gcontlist2_(i32* %0, i32* %1, float* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca float*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store float* %2, float** %7
store i32* %3, i32** %8
ret void
}

LLVM IR (-O2):
define void @gcontlist2_(i32* nocapture %0, i32* nocapture %1, float* nocapture %2, i32* nocapture %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nrf_drv_radio802154_swi_init();
void nrf_drv_radio802154_priority_drop_init(void) {
  nrf_drv_radio802154_swi_init();
}


x86 assembly (clang, -O0):
<nrf_drv_radio802154_priority_drop_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nrf_drv_radio802154_swi_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_drv_radio802154_priority_drop_init>:
xor    %eax,%eax
jmp    1030 <nrf_drv_radio802154_swi_init@plt>

LLVM IR (-O0):
define void @nrf_drv_radio802154_priority_drop_init() {
%1 = call i32 (...) @nrf_drv_radio802154_swi_init()
ret void
}

LLVM IR (-O2):
define void @nrf_drv_radio802154_priority_drop_init() {
%1 = tail call i32 (...) @nrf_drv_radio802154_swi_init()
ret void
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISDIR(int /*<<< orphan*/);
int stat(char *, struct stat *);
int test_isdir(char *path) {
  struct stat st;
  int res;
  res = stat(path, &st);
  if (res < 0)
    return -1;
  return S_ISDIR(st.st_mode);
}


x86 assembly (clang, -O0):
<test_isdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <stat@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    1152 <test_isdir+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    115d <test_isdir+0x3d>
mov    -0x18(%rbp),%edi
call   1030 <S_ISDIR@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_isdir>:
push   %rax
mov    %rsp,%rsi
call   1040 <stat@plt>
test   %eax,%eax
js     1136 <test_isdir+0x16>
mov    (%rsp),%edi
pop    %rax
jmp    1030 <S_ISDIR@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @test_isdir(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @stat(i8* %6, %struct.stat* %4)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %15
11: ; preds = %1
%12 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%13 = load i32, i32* %12
%14 = call i32 @S_ISDIR(i32 %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %10
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @test_isdir(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = tail call i32 @S_ISDIR(i32 %8)
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %9, %6 ], [ -1, %1 ]
ret i32 %11
}
void endnetent() {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<endnetent>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
lea    0xeee(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
jmp    112b <endnetent+0x1b>

x86 assembly (clang, -O2):
<endnetent>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
nopl   0x0(%rax,%rax,1)
jmp    1130 <endnetent+0x20>

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.endnetent = [10 x i8] c"endnetent\00"
define void @endnetent() {
%1 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.endnetent, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.endnetent = [10 x i8] c"endnetent\00"
define void @endnetent() {
%1 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.endnetent, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}
/* Type definitions */
typedef int /*<<< orphan*/ GLdouble;

/* Variables and functions */
int /*<<< orphan*/ glColor3f(int, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ glPopMatrix();
int /*<<< orphan*/ glPushMatrix();
int /*<<< orphan*/ glTranslatef(int /*<<< orphan*/, int /*<<< orphan*/,
                                int /*<<< orphan*/);
int /*<<< orphan*/ glutWireSphere(int, int, int);
void normalBullet(GLdouble x, GLdouble y) {
  glPushMatrix();
  glTranslatef(x, y, 0);
  glColor3f(1, 0, 0);
  glutWireSphere(1, 24, 24);
  glPopMatrix();
}


x86 assembly (clang, -O0):
<normalBullet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <glPushMatrix@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %edx,%edx
call   1070 <glTranslatef@plt>
mov    $0x1,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1040 <glColor3f@plt>
mov    $0x1,%edi
mov    $0x18,%edx
mov    %edx,%esi
call   1060 <glutWireSphere@plt>
mov    $0x0,%al
call   1030 <glPopMatrix@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalBullet>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1050 <glPushMatrix@plt>
mov    %ebp,%edi
mov    %ebx,%esi
xor    %edx,%edx
call   1070 <glTranslatef@plt>
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <glColor3f@plt>
mov    $0x1,%edi
mov    $0x18,%esi
mov    $0x18,%edx
call   1060 <glutWireSphere@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <glPopMatrix@plt>

LLVM IR (-O0):
define void @normalBullet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @glPushMatrix()
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @glTranslatef(i32 %6, i32 %7, i32 0)
%9 = call i32 @glColor3f(i32 1, i32 0, i32 0)
%10 = call i32 @glutWireSphere(i32 1, i32 24, i32 24)
%11 = call i32 (...) @glPopMatrix()
ret void
}

LLVM IR (-O2):
define void @normalBullet(i32 %0, i32 %1) {
%3 = tail call i32 (...) @glPushMatrix()
%4 = tail call i32 @glTranslatef(i32 %0, i32 %1, i32 0)
%5 = tail call i32 @glColor3f(i32 1, i32 0, i32 0)
%6 = tail call i32 @glutWireSphere(i32 1, i32 24, i32 24)
%7 = tail call i32 (...) @glPopMatrix()
ret void
}
int normalize_yuvp16(int fmt) {
  if ((((fmt - 0x51000034) & 0xfc0000ff) == 0))
    return (fmt & 0x00ffffff) | 0x51000000;
  if ((((fmt - 0x34000051) & 0xff0000fc) == 0))
    return (fmt & 0xffffff00) | 0x00000051;
  return 0;
}


x86 assembly (clang, -O0):
<normalize_yuvp16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x51000034,%eax
and    $0xfc0000ff,%eax
cmp    $0x0,%eax
jne    1132 <normalize_yuvp16+0x32>
mov    -0x8(%rbp),%eax
and    $0xffffff,%eax
or     $0x51000000,%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <normalize_yuvp16+0x62>
mov    -0x8(%rbp),%eax
sub    $0x34000051,%eax
and    $0xff0000fc,%eax
cmp    $0x0,%eax
jne    115b <normalize_yuvp16+0x5b>
mov    -0x8(%rbp),%eax
and    $0xffffff00,%eax
or     $0x51,%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <normalize_yuvp16+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalize_yuvp16>:
lea    -0x51000034(%rdi),%eax
test   $0xfc0000ff,%eax
je     111e <normalize_yuvp16+0x1e>
lea    -0x34000051(%rdi),%ecx
xor    %eax,%eax
test   $0xff0000fc,%ecx
je     112d <normalize_yuvp16+0x2d>
ret
and    $0xffffff,%edi
or     $0x51000000,%edi
mov    %edi,%eax
ret
and    $0xffffff00,%edi
or     $0x51,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @normalize_yuvp16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sub nsw i32 %4, 1358954548
%6 = and i32 %5, -67108609
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %3
%10 = and i32 %9, 16777215
%11 = or i32 %10, 1358954496
store i32 %11, i32* %2
br label %22
12: ; preds = %1
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 872415313
%15 = and i32 %14, -16776964
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %12
%18 = load i32, i32* %3
%19 = and i32 %18, -256
%20 = or i32 %19, 81
store i32 %20, i32* %2
br label %22
21: ; preds = %12
store i32 0, i32* %2
br label %22
22: ; preds = %21, %17, %8
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @normalize_yuvp16(i32 %0) {
%2 = add nsw i32 %0, -1358954548
%3 = and i32 %2, -67108609
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = and i32 %0, 16777215
%7 = or i32 %6, 1358954496
br label %15
8: ; preds = %1
%9 = add nsw i32 %0, -872415313
%10 = and i32 %9, -16776964
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = and i32 %0, -256
%14 = or i32 %13, 81
br label %15
15: ; preds = %8, %12, %5
%16 = phi i32 [ %7, %5 ], [ %14, %12 ], [ 0, %8 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ term_send(char);
void term_erase_screenTop() {
  term_send(27);
  term_send('[');
  term_send('1');
  term_send('J');
}


x86 assembly (clang, -O0):
<term_erase_screenTop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1b,%edi
call   1030 <term_send@plt>
mov    $0x5b,%edi
call   1030 <term_send@plt>
mov    $0x31,%edi
call   1030 <term_send@plt>
mov    $0x4a,%edi
call   1030 <term_send@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_erase_screenTop>:
push   %rax
mov    $0x1b,%edi
call   1030 <term_send@plt>
mov    $0x5b,%edi
call   1030 <term_send@plt>
mov    $0x31,%edi
call   1030 <term_send@plt>
mov    $0x4a,%edi
pop    %rax
jmp    1030 <term_send@plt>

LLVM IR (-O0):
define void @term_erase_screenTop() {
%1 = call i32 @term_send(i8 signext 27)
%2 = call i32 @term_send(i8 signext 91)
%3 = call i32 @term_send(i8 signext 49)
%4 = call i32 @term_send(i8 signext 74)
ret void
}

LLVM IR (-O2):
define void @term_erase_screenTop() {
%1 = tail call i32 @term_send(i8 signext 27)
%2 = tail call i32 @term_send(i8 signext 91)
%3 = tail call i32 @term_send(i8 signext 49)
%4 = tail call i32 @term_send(i8 signext 74)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ NonceKey_cache_invalidate();
void NonceKey_cache_destroy(void) { NonceKey_cache_invalidate(); }


x86 assembly (clang, -O0):
<NonceKey_cache_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NonceKey_cache_invalidate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NonceKey_cache_destroy>:
xor    %eax,%eax
jmp    1030 <NonceKey_cache_invalidate@plt>

LLVM IR (-O0):
define void @NonceKey_cache_destroy() {
%1 = call i32 (...) @NonceKey_cache_invalidate()
ret void
}

LLVM IR (-O2):
define void @NonceKey_cache_destroy() {
%1 = tail call i32 (...) @NonceKey_cache_invalidate()
ret void
}
my_fun(double *in, double *out, int nin, int nout, double *v, double *c) {}


x86 assembly (clang, -O0):
<my_fun>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_fun>:
ret

LLVM IR (-O0):
define i32 @my_fun(double* %0, double* %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double*
%9 = alloca double*
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double* %0, double** %8
store double* %1, double** %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load i32, i32* %7
ret i32 %14
}

LLVM IR (-O2):
define i32 @my_fun(double* nocapture readnone %0, double* nocapture readnone %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture readnone %5) {
ret i32 undef
}