xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, void *);
int /*<<< orphan*/ stderr;
void rtpp_server_set_ssrc_fin(void *pub) {
  fprintf(stderr,
          "Method rtpp_server@%p::set_ssrc (rtpp_server_set_ssrc) is invoked "
          "after destruction\x0a",
          pub);
  abort();
}


x86 assembly (clang, -O0):
<rtpp_server_set_ssrc_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<rtpp_server_set_ssrc_fin>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [85 x i8] c"Method rtpp_server@%p::set_ssrc (rtpp_server_set_ssrc) is invoked after destruction\0A\00"
define void @rtpp_server_set_ssrc_fin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([85 x i8], [85 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [85 x i8] c"Method rtpp_server@%p::set_ssrc (rtpp_server_set_ssrc) is invoked after destruction\0A\00"
define void @rtpp_server_set_ssrc_fin(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([85 x i8], [85 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
scalar_t__ NJ_is_distance(char *);
int NJ_is_label(char *token) {
  if (NJ_is_distance(token)) {
    return (0);
  } else {
    return (1);
  }
}


x86 assembly (clang, -O0):
<NJ_is_label>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <NJ_is_distance@plt>
cmp    $0x0,%rax
je     113b <NJ_is_label+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    1142 <NJ_is_label+0x32>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NJ_is_label>:
push   %rax
call   1030 <NJ_is_distance@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @NJ_is_label(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @NJ_is_distance(i8* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @NJ_is_label(i8* %0) {
%2 = tail call i64 @NJ_is_distance(i8* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int m25p16_isReady();
bool flashfsIsReady() { return m25p16_isReady(); }


x86 assembly (clang, -O0):
<flashfsIsReady>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <m25p16_isReady@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashfsIsReady>:
xor    %eax,%eax
jmp    1030 <m25p16_isReady@plt>

LLVM IR (-O0):
define i32 @flashfsIsReady() {
%1 = call i32 (...) @m25p16_isReady()
ret i32 %1
}

LLVM IR (-O2):
define i32 @flashfsIsReady() {
%1 = tail call i32 (...) @m25p16_isReady()
ret i32 %1
}
void new () {
  asm volatile("movq $0x2b, %%rdi\n\t"
               "movq %%rsp, %%r13\n\t"
               "movq %%r15, %%rsp\n\t"
               "callq *%%r12\n\t"
               "movq %%rsp, %%r15\n\t"
               "movq %%r13, %%rsp\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<new>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2b,%rdi
mov    %rsp,%r13
mov    %r15,%rsp
call   *%r12
mov    %rsp,%r15
mov    %r13,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new>:
mov    $0x2b,%rdi
mov    %rsp,%r13
mov    %r15,%rsp
call   *%r12
mov    %rsp,%r15
mov    %r13,%rsp
ret

LLVM IR (-O0):
define void @new() {
ret void
}

LLVM IR (-O2):
define void @new() {
tail call void asm sideeffect "movq $$0x2b, %rdi\0A\09movq %rsp, %r13\0A\09movq %r15, %rsp\0A\09callq *%r12\0A\09movq %rsp, %r15\0A\09movq %r13, %rsp\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
struct file_entry {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct file_entry *);
void free_file_entry(struct file_entry **p_fe) {
  if (p_fe) {
    free(*p_fe);
    *p_fe = NULL;
  }
}


x86 assembly (clang, -O0):
<free_file_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113e <free_file_entry+0x2e>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_file_entry>:
test   %rdi,%rdi
je     1129 <free_file_entry+0x19>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.file_entry = type { i32 }
define void @free_file_entry(%struct.file_entry** %0) {
%2 = alloca %struct.file_entry**
store %struct.file_entry** %0, %struct.file_entry*** %2
%3 = load %struct.file_entry**, %struct.file_entry*** %2
%4 = icmp ne %struct.file_entry** %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load %struct.file_entry**, %struct.file_entry*** %2
%7 = load %struct.file_entry*, %struct.file_entry** %6
%8 = call i32 @free(%struct.file_entry* %7)
%9 = load %struct.file_entry**, %struct.file_entry*** %2
store %struct.file_entry* null, %struct.file_entry** %9
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.file_entry = type { i32 }
define void @free_file_entry(%struct.file_entry** %0) {
%2 = icmp eq %struct.file_entry** %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load %struct.file_entry*, %struct.file_entry** %0
%5 = tail call i32 @free(%struct.file_entry* %4)
store %struct.file_entry* null, %struct.file_entry** %0
br label %6
6: ; preds = %3, %1
ret void
}
void *getMessage() { return "KKKKKKKKKKKKKKKKKLLLLLLLLL"; }


x86 assembly (clang, -O0):
<getMessage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMessage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [27 x i8] c"KKKKKKKKKKKKKKKKKLLLLLLLLL\00"
define i8* @getMessage() {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [27 x i8] c"KKKKKKKKKKKKKKKKKLLLLLLLLL\00"
define i8* @getMessage() {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ vt100_EscSeq2(int, int, unsigned char *, long long);
void vt100_CUP(int n, int m) {
  vt100_EscSeq2(n, m, (unsigned char *)"H", (long long)2);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    0xed5(%rip),%rdx
mov    $0x2,%ecx
call   1030 <vt100_EscSeq2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
lea    0xee9(%rip),%rdx
mov    $0x2,%ecx
jmp    1030 <vt100_EscSeq2@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"H\00"
define void @vt100_CUP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @vt100_EscSeq2(i32 %5, i32 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 2)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"H\00"
define void @vt100_CUP(i32 %0, i32 %1) {
%3 = tail call i32 @vt100_EscSeq2(i32 %0, i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 2)
ret void
}
void test___atomic_fetch_xor_1(short *mem) { __atomic_fetch_xor(mem, 1, 4); }


x86 assembly (clang, -O0):
<test___atomic_fetch_xor_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test___atomic_fetch_xor_1+0x5d>
jmp    1125 <test___atomic_fetch_xor_1+0x25>
mov    -0x1a(%rbp),%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_fetch_xor_1>:
lock xorw $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_fetch_xor_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw xor i16* %5, i16 %6 acq_rel
store i16 %7, i16* %4
%8 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_fetch_xor_1(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 1 acq_rel
ret void
}
void foo289() {}


x86 assembly (clang, -O0):
<foo289>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo289>:
ret

LLVM IR (-O0):
define void @foo289() {
ret void
}

LLVM IR (-O2):
define void @foo289() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_loadh_pd(int /*<<< orphan*/, void *);
__m128d test_mm_loadh_pd(__m128d x, void *y) { return _mm_loadh_pd(x, y); }


x86 assembly (clang, -O0):
<test_mm_loadh_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <_mm_loadh_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_loadh_pd>:
jmp    1030 <_mm_loadh_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_loadh_pd(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @_mm_loadh_pd(i32 %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_loadh_pd(i32 %0, i8* %1) {
%3 = tail call i32 @_mm_loadh_pd(i32 %0, i8* %1)
ret i32 %3
}
unsigned short i2u16(unsigned short *src) {
  unsigned char *low = ((unsigned char *)src) + 1;
  unsigned char *high = (unsigned char *)src;
  return (((unsigned short)(*low)) << 8) + (unsigned short)(*high);
}


x86 assembly (clang, -O0):
<i2u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
movzwl %ax,%eax
shl    $0x8,%eax
mov    -0x18(%rbp),%rcx
movzbl (%rcx),%ecx
movzwl %cx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2u16>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i16 @i2u16(i16* %0) {
%2 = alloca i16*
%3 = alloca i8*
%4 = alloca i8*
store i16* %0, i16** %2
%5 = load i16*, i16** %2
%6 = bitcast i16* %5 to i8*
%7 = getelementptr inbounds i8, i8* %6, i64 1
store i8* %7, i8** %3
%8 = load i16*, i16** %2
%9 = bitcast i16* %8 to i8*
store i8* %9, i8** %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = zext i8 %11 to i16
%13 = zext i16 %12 to i32
%14 = shl i32 %13, 8
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = zext i8 %16 to i16
%18 = zext i16 %17 to i32
%19 = add nsw i32 %14, %18
%20 = trunc i32 %19 to i16
ret i16 %20
}

LLVM IR (-O2):
define zeroext i16 @i2u16(i16* nocapture %0) {
%2 = bitcast i16* %0 to i8*
%3 = getelementptr inbounds i8, i8* %2, i64 1
%4 = load i8, i8* %3
%5 = zext i8 %4 to i16
%6 = shl nuw i16 %5, 8
%7 = load i8, i8* %2
%8 = zext i8 %7 to i16
%9 = or i16 %6, %8
ret i16 %9
}
/* Variables and functions */
int bitonic(int *, int);
int test_flat_bitonic() {
  int input[] = {7, 7, 7, 7, 7, 7, 7, 7, 7};
  return 1 == bitonic(input, 9);
}


x86 assembly (clang, -O0):
<test_flat_bitonic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
lea    0xecd(%rip),%rsi
mov    $0x24,%edx
call   1030 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0x9,%esi
call   1040 <bitonic@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_flat_bitonic>:
sub    $0x28,%rsp
mov    0xf06(%rip),%eax
mov    %eax,0x20(%rsp)
movaps 0xeeb(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xecf(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x9,%esi
call   1030 <bitonic@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.test_flat_bitonic.input = [9 x i32] [i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7]
define i32 @test_flat_bitonic() {
%1 = alloca [9 x i32]
%2 = bitcast [9 x i32]* %1 to i8*
%3 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 0
%4 = call i32 @bitonic(i32* %3, i32 9)
%5 = icmp eq i32 1, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@__const.test_flat_bitonic.input = [9 x i32] [i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7]
define i32 @test_flat_bitonic() {
%1 = alloca [9 x i32]
%2 = bitcast [9 x i32]* %1 to i8*
%3 = getelementptr inbounds [9 x i32], [9 x i32]* %1, i64 0, i64 0
%4 = call i32 @bitonic(i32* %3, i32 9)
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
void __attribute__((no)) HEX00_algorithmInit(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @HEX00_algorithmInit() {
ret void
}

LLVM IR (-O2):
define void @HEX00_algorithmInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void sendSignal() {
  printf("sendSignal SIGUSR1\n");
  kill(getpid(), SIGUSR1);
}


x86 assembly (clang, -O0):
<sendSignal>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%edi
mov    0x2e98(%rip),%rax
mov    (%rax),%esi
call   1050 <kill@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendSignal>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <getpid@plt>
mov    0x2e9d(%rip),%rcx
mov    (%rcx),%esi
mov    %eax,%edi
pop    %rax
jmp    1050 <kill@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"sendSignal SIGUSR1\0A\00"
@SIGUSR1 = global i32 0
define void @sendSignal() {
%1 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @getpid()
%3 = load i32, i32* @SIGUSR1
%4 = call i32 @kill(i32 %2, i32 %3)
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
@str = [19 x i8] c"sendSignal SIGUSR1\00"
define void @sendSignal() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @getpid()
%3 = load i32, i32* @SIGUSR1
%4 = tail call i32 @kill(i32 %2, i32 %3)
ret void
}
void foo735(int p) {}


x86 assembly (clang, -O0):
<foo735>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo735>:
ret

LLVM IR (-O0):
define void @foo735(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo735(i32 %0) {
ret void
}
void verify_cpu_run_el(void) {}


x86 assembly (clang, -O0):
<verify_cpu_run_el>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verify_cpu_run_el>:
ret

LLVM IR (-O0):
define void @verify_cpu_run_el() {
ret void
}

LLVM IR (-O2):
define void @verify_cpu_run_el() {
ret void
}
/* Variables and functions */
unsigned int __VERIFIER_nondet_uint();
unsigned int randuint() { return __VERIFIER_nondet_uint(); }


x86 assembly (clang, -O0):
<randuint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_uint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<randuint>:
xor    %eax,%eax
jmp    1030 <__VERIFIER_nondet_uint@plt>

LLVM IR (-O0):
define i32 @randuint() {
%1 = call i32 (...) @__VERIFIER_nondet_uint()
ret i32 %1
}

LLVM IR (-O2):
define i32 @randuint() {
%1 = tail call i32 (...) @__VERIFIER_nondet_uint()
ret i32 %1
}
int s5p_uart_divslot(void) { return 1; }


x86 assembly (clang, -O0):
<s5p_uart_divslot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5p_uart_divslot>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @s5p_uart_divslot() {
ret i32 1
}

LLVM IR (-O2):
define i32 @s5p_uart_divslot() {
ret i32 1
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int write(int, void const *, size_t);
int lxc_write_nointr(int fd, const void *buf, size_t count) {
  int ret;
again:
  ret = write(fd, buf, count);
  if (ret < 0 && errno == EINTR)
    goto again;
  return ret;
}


x86 assembly (clang, -O0):
<lxc_write_nointr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    115f <lxc_write_nointr+0x4f>
mov    0x2e99(%rip),%rax
mov    (%rax),%rax
mov    0x2e87(%rip),%rcx
cmp    (%rcx),%rax
jne    115f <lxc_write_nointr+0x4f>
jmp    1123 <lxc_write_nointr+0x13>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lxc_write_nointr>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <write@plt>
test   %eax,%eax
jns    114a <lxc_write_nointr+0x3a>
mov    (%r15),%rcx
cmp    (%r12),%rcx
je     1130 <lxc_write_nointr+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @lxc_write_nointr(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %4
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = call i32 @write(i32 %9, i8* %10, i64 %11)
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %8
%16 = load i64, i64* @errno
%17 = load i64, i64* @EINTR
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %20
19: ; preds = %15
br label %8
20: ; preds = %15, %8
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @lxc_write_nointr(i32 %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %7, %3
%5 = tail call i32 @write(i32 %0, i8* %1, i64 %2)
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = load i64, i64* @errno
%9 = load i64, i64* @EINTR
%10 = icmp eq i64 %8, %9
br i1 %10, label %4, label %11
11: ; preds = %7, %4
ret i32 %5
}
/* Variables and functions */
int parse_codenum(void *);
int parse_se(void *buf) {
  int ret = 0;
  int code_num;
  code_num = parse_codenum(buf);
  ret = (code_num + 1) >> 1;
  ret = (code_num & 0x01) ? ret : -ret;
  return ret;
}


x86 assembly (clang, -O0):
<parse_se>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <parse_codenum@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1155 <parse_se+0x45>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    115d <parse_se+0x4d>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_se>:
push   %rax
call   1030 <parse_codenum@plt>
lea    0x1(%rax),%edx
sar    %edx
mov    %edx,%ecx
neg    %ecx
test   $0x1,%al
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @parse_se(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = call i32 @parse_codenum(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = ashr i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = load i32, i32* %3
br label %18
15: ; preds = %1
%16 = load i32, i32* %3
%17 = sub nsw i32 0, %16
br label %18
18: ; preds = %15, %13
%19 = phi i32 [ %14, %13 ], [ %17, %15 ]
store i32 %19, i32* %3
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @parse_se(i8* %0) {
%2 = tail call i32 @parse_codenum(i8* %0)
%3 = add nsw i32 %2, 1
%4 = ashr i32 %3, 1
%5 = and i32 %2, 1
%6 = icmp eq i32 %5, 0
%7 = sub nsw i32 0, %4
%8 = select i1 %6, i32 %7, i32 %4
ret i32 %8
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
float powerof2f(uint32_t n) {
  union {
    float f;
    uint32_t u;
  } x;
  x.u = 0x3f800000;
  x.u += n * (1UL << 23);
  return x.f;
}


x86 assembly (clang, -O0):
<powerof2f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x3f800000,-0x10(%rbp)
3f
mov    -0x8(%rbp),%rax
shl    $0x17,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<powerof2f>:
shl    $0x17,%edi
add    $0x3f800000,%edi
movd   %edi,%xmm0
ret

LLVM IR (-O0):
%union.anon = type { i64 }
define float @powerof2f(i64 %0) {
%2 = alloca i64
%3 = alloca %union.anon
store i64 %0, i64* %2
%4 = bitcast %union.anon* %3 to i64*
store i64 1065353216, i64* %4
%5 = load i64, i64* %2
%6 = mul i64 %5, 8388608
%7 = bitcast %union.anon* %3 to i64*
%8 = load i64, i64* %7
%9 = add i64 %8, %6
store i64 %9, i64* %7
%10 = bitcast %union.anon* %3 to float*
%11 = load float, float* %10
ret float %11
}

LLVM IR (-O2):
define float @powerof2f(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = shl i32 %2, 23
%4 = add i32 %3, 1065353216
%5 = bitcast i32 %4 to float
ret float %5
}
/* Type definitions */
typedef int /*<<< orphan*/ fe_sec_voltage_t;

/* Variables and functions */
int /*<<< orphan*/ FE_SET_VOLTAGE;
scalar_t__ ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int FESetVoltage(int fd, fe_sec_voltage_t v) {
  int result;
  if ((result = ioctl(fd, FE_SET_VOLTAGE, v) < 0)) {
    perror("FE_SET_VOLTAGE");
    return result;
  }
  return 0;
}


x86 assembly (clang, -O0):
<FESetVoltage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
call   1030 <ioctl@plt>
cmp    $0x0,%rax
setl   %al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x10(%rbp)
test   $0x1,%al
jne    1161 <FESetVoltage+0x41>
jmp    1178 <FESetVoltage+0x58>
lea    0xe98(%rip),%rdi
call   1040 <perror@plt>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <FESetVoltage+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FESetVoltage>:
push   %rax
mov    %esi,%edx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
js     113d <FESetVoltage+0x1d>
pop    %rcx
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@FE_SET_VOLTAGE = global i32 0
@.str = [15 x i8] c"FE_SET_VOLTAGE\00"
define i32 @FESetVoltage(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* @FE_SET_VOLTAGE
%9 = load i32, i32* %5
%10 = call i64 @ioctl(i32 %7, i32 %8, i32 %9)
%11 = icmp slt i64 %10, 0
%12 = zext i1 %11 to i32
store i32 %12, i32* %6
br i1 %11, label %13, label %16
13: ; preds = %2
%14 = call i32 @perror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%15 = load i32, i32* %6
store i32 %15, i32* %3
br label %17
16: ; preds = %2
store i32 0, i32* %3
br label %17
17: ; preds = %16, %13
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@FE_SET_VOLTAGE = global i32 0
@.str = [15 x i8] c"FE_SET_VOLTAGE\00"
define i32 @FESetVoltage(i32 %0, i32 %1) {
%3 = load i32, i32* @FE_SET_VOLTAGE
%4 = tail call i64 @ioctl(i32 %0, i32 %3, i32 %1)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %9
}
int Left(int i) { return 2 * i; }


x86 assembly (clang, -O0):
<Left>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Left>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @Left(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @Left(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void emit_usage(void) {
  fputs("Usage: ipint positive-integer-or-ipv4-address\n", stderr);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<emit_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<emit_usage>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"Usage: ipint positive-integer-or-ipv4-address\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@.str = [47 x i8] c"Usage: ipint positive-integer-or-ipv4-address\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void b_int_to_string(unsigned long nbr, unsigned char *str) {
  asm volatile("call 0x001000C0" : : "a"(nbr), "D"(str));
}


x86 assembly (clang, -O0):
<b_int_to_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
call   1000c0 <completed.0+0xfc0a0>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_int_to_string>:
mov    %rdi,%rax
mov    %rsi,%rdi
call   1000c0 <completed.0+0xfc0a0>
ret

LLVM IR (-O0):
define void @b_int_to_string(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @b_int_to_string(i64 %0, i8* %1) {
tail call void asm sideeffect "call 0x001000C0", "{ax},{di},~{dirflag},~{fpsr},~{flags}"(i64 %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glColor4us(unsigned short, unsigned short, unsigned short,
                              unsigned short);
void Color4us(unsigned short r, unsigned short g, unsigned short b,
              unsigned short a) {
  glColor4us(r, g, b, a);
}


x86 assembly (clang, -O0):
<Color4us>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cx,%ax
mov    %dx,%cx
mov    %si,%dx
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %dx,-0x4(%rbp)
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x4(%rbp),%cx
mov    -0x6(%rbp),%ax
movzwl %dx,%edi
movzwl %cx,%esi
movzwl %ax,%edx
movzwl -0x8(%rbp),%ecx
call   1030 <glColor4us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Color4us>:
jmp    1030 <glColor4us@plt>

LLVM IR (-O0):
define void @Color4us(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
store i16 %0, i16* %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%9 = load i16, i16* %5
%10 = load i16, i16* %6
%11 = load i16, i16* %7
%12 = load i16, i16* %8
%13 = call i32 @glColor4us(i16 zeroext %9, i16 zeroext %10, i16 zeroext %11, i16 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @Color4us(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3) {
%5 = tail call i32 @glColor4us(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3)
ret void
}
/* Variables and functions */
scalar_t__ check_commandline_args(int, char **);
int /*<<< orphan*/ get_input(int /*<<< orphan*/);
int main(int argc, char **argv) {
  if (check_commandline_args(argc, argv) >= 0) {
    get_input(0);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <check_commandline_args@plt>
cmp    $0x0,%rax
jl     1153 <main+0x33>
xor    %edi,%edi
call   1040 <get_input@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <check_commandline_args@plt>
test   %rax,%rax
js     1132 <main+0x12>
xor    %edi,%edi
call   1040 <get_input@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i64 @check_commandline_args(i32 %6, i8** %7)
%9 = icmp sge i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @get_input(i32 0)
br label %12
12: ; preds = %10, %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i64 @check_commandline_args(i32 %0, i8** %1)
%4 = icmp sgt i64 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @get_input(i32 0)
br label %7
7: ; preds = %5, %2
ret i32 0
}
/* Variables and functions */
int EOF;
int getchar(void) { return EOF; }


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @getchar() {
%1 = load i32, i32* @EOF
ret i32 %1
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @getchar() {
%1 = load i32, i32* @EOF
ret i32 %1
}
int Chance(int d1, int d2, int d3, int d4, int d5) {
  int total = 0;
  total += d1;
  total += d2;
  total += d3;
  total += d4;
  total += d5;
  return total;
}


x86 assembly (clang, -O0):
<Chance>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Chance>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
add    %ecx,%eax
add    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @Chance(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
store i32 0, i32* %11
%12 = load i32, i32* %6
%13 = load i32, i32* %11
%14 = add nsw i32 %13, %12
store i32 %14, i32* %11
%15 = load i32, i32* %7
%16 = load i32, i32* %11
%17 = add nsw i32 %16, %15
store i32 %17, i32* %11
%18 = load i32, i32* %8
%19 = load i32, i32* %11
%20 = add nsw i32 %19, %18
store i32 %20, i32* %11
%21 = load i32, i32* %9
%22 = load i32, i32* %11
%23 = add nsw i32 %22, %21
store i32 %23, i32* %11
%24 = load i32, i32* %10
%25 = load i32, i32* %11
%26 = add nsw i32 %25, %24
store i32 %26, i32* %11
%27 = load i32, i32* %11
ret i32 %27
}

LLVM IR (-O2):
define i32 @Chance(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = add nsw i32 %1, %0
%7 = add nsw i32 %6, %2
%8 = add nsw i32 %7, %3
%9 = add nsw i32 %8, %4
ret i32 %9
}
int test_imm_68uint8_reg(unsigned char val) {
  return ((val) & (0x68 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_68uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_68uint8_reg>:
test   $0x68,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_68uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 104
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_68uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 104
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
long platform_format(char *destination, long size, char *format, ...) {
  return 0;
}


x86 assembly (clang, -O0):
<platform_format>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_format>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @platform_format(i8* %0, i64 %1, i8* %2, ...) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
ret i64 0
}

LLVM IR (-O2):
define i64 @platform_format(i8* nocapture readnone %0, i64 %1, i8* nocapture readnone %2, ...) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
float __VERIFIER_nondet_float();
int main(void) {
  float a = __VERIFIER_nondet_float();
  if (a < 0) {
    return 0;
  }
  __VERIFIER_assert(a < 10);
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_float@plt>
movss  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1154 <main+0x34>
movl   $0x0,-0x4(%rbp)
jmp    1175 <main+0x55>
movss  0xea4(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_float@plt>
xorps  %xmm1,%xmm1
ucomiss %xmm0,%xmm1
ja     1158 <main+0x38>
movss  0xec2(%rip),%xmm1
xor    %edi,%edi
ucomiss %xmm0,%xmm1
seta   %dil
movss  %xmm0,0xc(%rsp)
call   1030 <__VERIFIER_assert@plt>
cvttss2si 0xc(%rsp),%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call float (...) @__VERIFIER_nondet_float()
store float %3, float* %2
%4 = load float, float* %2
%5 = fcmp olt float %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %1
br label %14
7: ; preds = %0
%8 = load float, float* %2
%9 = fcmp olt float %8, 1.000000e+01
%10 = zext i1 %9 to i32
%11 = call i32 @__VERIFIER_assert(i32 %10)
%12 = load float, float* %2
%13 = fptosi float %12 to i32
store i32 %13, i32* %1
br label %14
14: ; preds = %7, %6
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call float (...) @__VERIFIER_nondet_float()
%2 = fcmp olt float %1, 0.000000e+00
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = fcmp olt float %1, 1.000000e+01
%5 = zext i1 %4 to i32
%6 = tail call i32 @__VERIFIER_assert(i32 %5)
%7 = fptosi float %1 to i32
br label %8
8: ; preds = %0, %3
%9 = phi i32 [ %7, %3 ], [ 0, %0 ]
ret i32 %9
}
const char *Copy_Name(void) { return "Copy"; }


x86 assembly (clang, -O0):
<Copy_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Copy_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"Copy\00"
define i8* @Copy_Name() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"Copy\00"
define i8* @Copy_Name() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
int strcmp(const char *s1, const char *s2) {
  while (*s1 == *s2 && *s1 != '\0') {
    s1++;
    s2++;
  }
  return (*s1 - *s2);
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
jne    1137 <strcmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <strcmp+0x47>
jmp    1164 <strcmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <strcmp+0xc>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    (%rdi),%al
mov    (%rsi),%cl
test   %al,%al
je     1134 <strcmp+0x34>
cmp    %cl,%al
jne    1134 <strcmp+0x34>
mov    $0x1,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%rdi,%rdx,1),%eax
movzbl (%rsi,%rdx,1),%ecx
test   %al,%al
je     1134 <strcmp+0x34>
add    $0x1,%rdx
cmp    %cl,%al
je     1120 <strcmp+0x20>
movsbl %al,%eax
movsbl %cl,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %8, %11
br i1 %12, label %13, label %18
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br label %18
18: ; preds = %13, %5
%19 = phi i1 [ false, %5 ], [ %17, %13 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = sext i8 %27 to i32
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = sext i8 %30 to i32
%32 = sub nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp ne i8 %3, %4
%6 = icmp eq i8 %3, 0
%7 = or i1 %6, %5
br i1 %7, label %18, label %8
8: ; preds = %2, %8
%9 = phi i8* [ %12, %8 ], [ %1, %2 ]
%10 = phi i8* [ %11, %8 ], [ %0, %2 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = load i8, i8* %11
%14 = load i8, i8* %12
%15 = icmp ne i8 %13, %14
%16 = icmp eq i8 %13, 0
%17 = or i1 %16, %15
br i1 %17, label %18, label %8
18: ; preds = %8, %2
%19 = phi i8 [ %3, %2 ], [ %13, %8 ]
%20 = phi i8 [ %4, %2 ], [ %14, %8 ]
%21 = sext i8 %19 to i32
%22 = sext i8 %20 to i32
%23 = sub nsw i32 %21, %22
ret i32 %23
}
extern float fsqr(float f) { return f * f; }


x86 assembly (clang, -O0):
<fsqr>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsqr>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @fsqr(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @fsqr(float %0) {
%2 = fmul float %0, %0
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void clr(void) { system("clear"); }


x86 assembly (clang, -O0):
<clr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clr>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"clear\00"
define void @clr() {
%1 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"clear\00"
define void @clr() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *strrchr(char *, char);
char *getprogramname(char **argv) {
  char *name;
  name = strrchr(argv[0], '/');
  if (!name)
    name = argv[0];
  else
    ++name;
  return name;
}


x86 assembly (clang, -O0):
<getprogramname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114c <getprogramname+0x3c>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
jmp    1158 <getprogramname+0x48>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getprogramname>:
push   %rbx
mov    (%rdi),%rbx
mov    %rbx,%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @getprogramname(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = getelementptr inbounds i8*, i8** %4, i64 0
%6 = load i8*, i8** %5
%7 = call i8* @strrchr(i8* %6, i8 signext 47)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %14, label %10
10: ; preds = %1
%11 = load i8**, i8*** %2
%12 = getelementptr inbounds i8*, i8** %11, i64 0
%13 = load i8*, i8** %12
store i8* %13, i8** %3
br label %17
14: ; preds = %1
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %17
17: ; preds = %14, %10
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @getprogramname(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %2, i8 signext 47)
%4 = icmp eq i8* %3, null
%5 = getelementptr inbounds i8, i8* %3, i64 1
%6 = select i1 %4, i8* %2, i8* %5
ret i8* %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
__attribute__((visibility("hidden"))) void
read_array(uint16_t address, uint8_t *data, uint32_t lenght) {}


x86 assembly (clang, -O0):
<read_array>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_array>:
ret

LLVM IR (-O0):
define hidden void @read_array(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define hidden void @read_array(i32 %0, i32* nocapture %1, i32 %2) {
ret void
}
/* Type definitions */
struct libjte_env {
  int dummy;
};

/* Variables and functions */
int jte_add_path_match(struct libjte_env *, char *, int /*<<< orphan*/);
extern int jte_add_include(struct libjte_env *o, char *pattern) {
  int ret;
  ret = jte_add_path_match(o, pattern, 0);
  return ret;
}


x86 assembly (clang, -O0):
<jte_add_include>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <jte_add_path_match@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jte_add_include>:
xor    %edx,%edx
jmp    1030 <jte_add_path_match@plt>

LLVM IR (-O0):
%struct.libjte_env = type { i32 }
define i32 @jte_add_include(%struct.libjte_env* %0, i8* %1) {
%3 = alloca %struct.libjte_env*
%4 = alloca i8*
%5 = alloca i32
store %struct.libjte_env* %0, %struct.libjte_env** %3
store i8* %1, i8** %4
%6 = load %struct.libjte_env*, %struct.libjte_env** %3
%7 = load i8*, i8** %4
%8 = call i32 @jte_add_path_match(%struct.libjte_env* %6, i8* %7, i32 0)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
%struct.libjte_env = type { i32 }
define i32 @jte_add_include(%struct.libjte_env* %0, i8* %1) {
%3 = tail call i32 @jte_add_path_match(%struct.libjte_env* %0, i8* %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ accum(int);
int /*<<< orphan*/ accum_ref(int);
int /*<<< orphan*/ check(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ init();
int main() {
  int i;
  init();
#pragma omp target update to(Q)
  for (i = 0; i < 1000; i++)
    check(accum(i), accum_ref(i));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <init@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jge    1195 <main+0x55>
mov    -0x8(%rbp),%edi
call   1040 <accum@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <accum_ref@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1060 <check@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    115d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <init@plt>
nopl   0x0(%rax)
mov    %ebx,%edi
call   1040 <accum@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <accum_ref@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1060 <check@plt>
add    $0x1,%ebx
cmp    $0x3e8,%ebx
jne    1150 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @init()
store i32 0, i32* %2
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 1000
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i32 @accum(i32 %8)
%10 = load i32, i32* %2
%11 = call i32 @accum_ref(i32 %10)
%12 = call i32 @check(i32 %9, i32 %11)
br label %13
13: ; preds = %7
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %4
16: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init()
br label %2
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %7, %2 ]
%4 = tail call i32 @accum(i32 %3)
%5 = tail call i32 @accum_ref(i32 %3)
%6 = tail call i32 @check(i32 %4, i32 %5)
%7 = add nuw nsw i32 %3, 1
%8 = icmp eq i32 %7, 1000
br i1 %8, label %9, label %2
9: ; preds = %2
ret i32 0
}
void init_snmp_mib(void) {}


x86 assembly (clang, -O0):
<init_snmp_mib>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_snmp_mib>:
ret

LLVM IR (-O0):
define void @init_snmp_mib() {
ret void
}

LLVM IR (-O2):
define void @init_snmp_mib() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system_halt();
void __aeabi_idiv0(void) { system_halt(); }


x86 assembly (clang, -O0):
<__aeabi_idiv0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <system_halt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_idiv0>:
xor    %eax,%eax
jmp    1030 <system_halt@plt>

LLVM IR (-O0):
define void @__aeabi_idiv0() {
%1 = call i32 (...) @system_halt()
ret void
}

LLVM IR (-O2):
define void @__aeabi_idiv0() {
%1 = tail call i32 (...) @system_halt()
ret void
}