xunge/DecIR huggingface dataset:
/* Variables and functions */
int CHAR_BIT;
unsigned long kbs_last_mask(size_t ni) {
  unsigned long mask = (1UL << ((ni) % (CHAR_BIT * sizeof(unsigned long)))) - 1;
  return mask ? mask : ~0UL;
}


x86 assembly (clang, -O0):
<kbs_last_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ecd(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x3,%rcx
xor    %edx,%edx
div    %rcx
mov    %rdx,%rcx
mov    $0x1,%eax
shl    %cl,%rax
sub    $0x1,%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114a <kbs_last_mask+0x4a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    115a <kbs_last_mask+0x5a>
mov    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    115a <kbs_last_mask+0x5a>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kbs_last_mask>:
mov    %rdi,%rax
mov    0x2ed6(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x3,%rcx
mov    %rdi,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
je     1127 <kbs_last_mask+0x27>
xor    %edx,%edx
div    %rcx
mov    %rdx,%rcx
jmp    112d <kbs_last_mask+0x2d>
xor    %edx,%edx
div    %ecx
mov    %edx,%ecx
mov    $0xffffffffffffffff,%rdx
shl    %cl,%rdx
not    %rdx
cmp    $0x1,%rcx
sbb    %rax,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define i64 @kbs_last_mask(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = load i32, i32* @CHAR_BIT
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 8
%8 = urem i64 %4, %7
%9 = shl i64 1, %8
%10 = sub i64 %9, 1
store i64 %10, i64* %3
%11 = load i64, i64* %3
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = load i64, i64* %3
br label %16
15: ; preds = %1
br label %16
16: ; preds = %15, %13
%17 = phi i64 [ %14, %13 ], [ -1, %15 ]
ret i64 %17
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define i64 @kbs_last_mask(i64 %0) {
%2 = load i32, i32* @CHAR_BIT
%3 = sext i32 %2 to i64
%4 = shl nsw i64 %3, 3
%5 = urem i64 %0, %4
%6 = shl nsw i64 -1, %5
%7 = xor i64 %6, -1
%8 = icmp eq i64 %5, 0
%9 = select i1 %8, i64 -1, i64 %7
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ _vWrite(int /*<<< orphan*/);
void _vPrint(char *c) {
  while (*c)
    _vWrite(*c++);
}


x86 assembly (clang, -O0):
<_vPrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <_vPrint+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <_vWrite@plt>
jmp    111c <_vPrint+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vPrint>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <_vPrint+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <_vWrite@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <_vPrint+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @_vPrint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @_vWrite(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @_vPrint(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @_vWrite(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printRows();
int /*<<< orphan*/ refresh();
void update(int t) {
  printRows();
  refresh();
}


x86 assembly (clang, -O0):
<update>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <printRows@plt>
mov    $0x0,%al
call   1030 <refresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<update>:
push   %rax
xor    %eax,%eax
call   1040 <printRows@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <refresh@plt>

LLVM IR (-O0):
define void @update(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @printRows()
%4 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @update(i32 %0) {
%2 = tail call i32 (...) @printRows()
%3 = tail call i32 (...) @refresh()
ret void
}
/* Variables and functions */
int __builtin_mips_cabs_ult_d(double, double);
int test5(double a, double b) { return __builtin_mips_cabs_ult_d(a, b); }


x86 assembly (clang, -O0):
<test5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <__builtin_mips_cabs_ult_d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test5>:
jmp    1030 <__builtin_mips_cabs_ult_d@plt>

LLVM IR (-O0):
define i32 @test5(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @__builtin_mips_cabs_ult_d(double %5, double %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test5(double %0, double %1) {
%3 = tail call i32 @__builtin_mips_cabs_ult_d(double %0, double %1)
ret i32 %3
}
/* Type definitions */
struct iovec {
  size_t iov_len;
  void *iov_base;
};

/* Variables and functions */
size_t pushv(int, struct iovec *, int);
size_t push(int fd, const void *data, size_t size) {
  struct iovec iov;
  iov.iov_base = (void *)data;
  iov.iov_len = size;
  return pushv(fd, &iov, 1);
}


x86 assembly (clang, -O0):
<push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x28(%rbp),%rsi
mov    $0x1,%edx
call   1030 <pushv@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<push>:
sub    $0x18,%rsp
mov    %rsi,0x10(%rsp)
mov    %rdx,0x8(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <pushv@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.iovec = type { i64, i8* }
define i64 @push(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca %struct.iovec
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = getelementptr inbounds %struct.iovec, %struct.iovec* %7, i32 0, i32 1
store i8* %8, i8** %9
%10 = load i64, i64* %6
%11 = getelementptr inbounds %struct.iovec, %struct.iovec* %7, i32 0, i32 0
store i64 %10, i64* %11
%12 = load i32, i32* %4
%13 = call i64 @pushv(i32 %12, %struct.iovec* %7, i32 1)
ret i64 %13
}

LLVM IR (-O2):
%struct.iovec = type { i64, i8* }
define i64 @push(i32 %0, i8* %1, i64 %2) {
%4 = alloca %struct.iovec
%5 = bitcast %struct.iovec* %4 to i8*
%6 = getelementptr inbounds %struct.iovec, %struct.iovec* %4, i64 0, i32 1
store i8* %1, i8** %6
%7 = getelementptr inbounds %struct.iovec, %struct.iovec* %4, i64 0, i32 0
store i64 %2, i64* %7
%8 = call i64 @pushv(i32 %0, %struct.iovec* %4, i32 1)
ret i64 %8
}
/* Variables and functions */
int cfg_nor_set(unsigned char *);
int /*<<< orphan*/ sprintf(unsigned char *, char *, char *, unsigned char *);
int nor_set(char *str_name, unsigned char *value) {
  unsigned char argv[256] = {0};
  sprintf(argv, "%s=%s", str_name, value);
  return cfg_nor_set(argv);
}


x86 assembly (clang, -O0):
<nor_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x110(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1030 <memset@plt>
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe94(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x110(%rbp),%rdi
call   1050 <cfg_nor_set@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nor_set>:
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
xorps  %xmm0,%xmm0
movaps %xmm0,0xf0(%rsp)
movaps %xmm0,0xe0(%rsp)
movaps %xmm0,0xd0(%rsp)
movaps %xmm0,0xc0(%rsp)
movaps %xmm0,0xb0(%rsp)
movaps %xmm0,0xa0(%rsp)
movaps %xmm0,0x90(%rsp)
movaps %xmm0,0x80(%rsp)
movaps %xmm0,0x70(%rsp)
movaps %xmm0,0x60(%rsp)
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
lea    0xe61(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <cfg_nor_set@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s=%s\00"
define i32 @nor_set(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = bitcast [256 x i8]* %5 to i8*
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9)
%11 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%12 = call i32 @cfg_nor_set(i8* %11)
ret i32 %12
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s=%s\00"
define i32 @nor_set(i8* %0, i8* %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = call i32 @cfg_nor_set(i8* %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ video_char(char);
void video_nl() { video_char('\n'); }


x86 assembly (clang, -O0):
<video_nl>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <video_char@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<video_nl>:
mov    $0xa,%edi
jmp    1030 <video_char@plt>

LLVM IR (-O0):
define void @video_nl() {
%1 = call i32 @video_char(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @video_nl() {
%1 = tail call i32 @video_char(i8 signext 10)
ret void
}
/* Variables and functions */
int standardize_cell(double **, double **, int *, int const, int /*<<< orphan*/,
                     double const, double);
int spg_refine_cell(double lattice[3][3], double position[][3], int types[],
                    const int num_atom, const double symprec) {
  return standardize_cell(lattice, position, types, num_atom, 0, symprec, -1.0);
}


x86 assembly (clang, -O0):
<spg_refine_cell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movsd  %xmm0,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
movsd  -0x28(%rbp),%xmm0
xor    %r8d,%r8d
movsd  0xeb5(%rip),%xmm1
call   1030 <standardize_cell@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spg_refine_cell>:
movsd  0xee8(%rip),%xmm1
xor    %r8d,%r8d
jmp    1030 <standardize_cell@plt>

LLVM IR (-O0):
define i32 @spg_refine_cell([3 x double]* %0, [3 x double]* %1, i32* %2, i32 %3, double %4) {
%6 = alloca [3 x double]*
%7 = alloca [3 x double]*
%8 = alloca i32*
%9 = alloca i32
%10 = alloca double
store [3 x double]* %0, [3 x double]** %6
store [3 x double]* %1, [3 x double]** %7
store i32* %2, i32** %8
store i32 %3, i32* %9
store double %4, double* %10
%11 = load [3 x double]*, [3 x double]** %6
%12 = bitcast [3 x double]* %11 to double**
%13 = load [3 x double]*, [3 x double]** %7
%14 = bitcast [3 x double]* %13 to double**
%15 = load i32*, i32** %8
%16 = load i32, i32* %9
%17 = load double, double* %10
%18 = call i32 @standardize_cell(double** %12, double** %14, i32* %15, i32 %16, i32 0, double %17, double -1.000000e+00)
ret i32 %18
}

LLVM IR (-O2):
define i32 @spg_refine_cell([3 x double]* %0, [3 x double]* %1, i32* %2, i32 %3, double %4) {
%6 = bitcast [3 x double]* %0 to double**
%7 = bitcast [3 x double]* %1 to double**
%8 = tail call i32 @standardize_cell(double** %6, double** %7, i32* %2, i32 %3, i32 0, double %4, double -1.000000e+00)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ EPOLL_CTL_DEL;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ epoll_ctl(int, int /*<<< orphan*/, int,
                             int /*<<< orphan*/ *);
void deleteSock(int evSockDesc, int fd) {
  epoll_ctl(evSockDesc, EPOLL_CTL_DEL, fd, NULL);
  close(fd);
}


x86 assembly (clang, -O0):
<deleteSock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1040 <epoll_ctl@plt>
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deleteSock>:
push   %rbx
mov    %esi,%ebx
mov    0x2ece(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edx
xor    %ecx,%ecx
call   1040 <epoll_ctl@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
@EPOLL_CTL_DEL = global i32 0
define void @deleteSock(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @EPOLL_CTL_DEL
%7 = load i32, i32* %4
%8 = call i32 @epoll_ctl(i32 %5, i32 %6, i32 %7, i32* null)
%9 = load i32, i32* %4
%10 = call i32 @close(i32 %9)
ret void
}

LLVM IR (-O2):
@EPOLL_CTL_DEL = global i32 0
define void @deleteSock(i32 %0, i32 %1) {
%3 = load i32, i32* @EPOLL_CTL_DEL
%4 = tail call i32 @epoll_ctl(i32 %0, i32 %3, i32 %1, i32* null)
%5 = tail call i32 @close(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_absx();
int /*<<< orphan*/ e_inc();
int /*<<< orphan*/ e_writeback();
void e_inc_absx() {
  e_absx();
  e_inc();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_inc_absx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <e_absx@plt>
mov    $0x0,%al
call   1040 <e_inc@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_inc_absx>:
push   %rax
xor    %eax,%eax
call   1050 <e_absx@plt>
xor    %eax,%eax
call   1040 <e_inc@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_inc_absx() {
%1 = call i32 (...) @e_absx()
%2 = call i32 (...) @e_inc()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_inc_absx() {
%1 = tail call i32 (...) @e_absx()
%2 = tail call i32 (...) @e_inc()
%3 = tail call i32 (...) @e_writeback()
ret void
}
void Timer1_RestoreConfig(void) {}


x86 assembly (clang, -O0):
<Timer1_RestoreConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Timer1_RestoreConfig>:
ret

LLVM IR (-O0):
define void @Timer1_RestoreConfig() {
ret void
}

LLVM IR (-O2):
define void @Timer1_RestoreConfig() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rep(int /*<<< orphan*/);
void op_rep() { rep(0); }


x86 assembly (clang, -O0):
<op_rep>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <rep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_rep>:
xor    %edi,%edi
jmp    1030 <rep@plt>

LLVM IR (-O0):
define void @op_rep() {
%1 = call i32 @rep(i32 0)
ret void
}

LLVM IR (-O2):
define void @op_rep() {
%1 = tail call i32 @rep(i32 0)
ret void
}
unsigned int BSP_MNTN_ProductTypeGet(void) { return 0; }


x86 assembly (clang, -O0):
<BSP_MNTN_ProductTypeGet>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_MNTN_ProductTypeGet>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @BSP_MNTN_ProductTypeGet() {
ret i32 0
}

LLVM IR (-O2):
define i32 @BSP_MNTN_ProductTypeGet() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
_Bool zc_block_size_check(int /*<<< orphan*/ const, int /*<<< orphan*/,
                          int /*<<< orphan*/ *);
_Bool zc_block_size_is_valid(const uint64_t block_size) {
  return zc_block_size_check(block_size, 0, NULL);
}


x86 assembly (clang, -O0):
<zc_block_size_is_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <zc_block_size_check@plt>
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zc_block_size_is_valid>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <zc_block_size_check@plt>

LLVM IR (-O0):
define zeroext i1 @zc_block_size_is_valid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call zeroext i1 @zc_block_size_check(i32 %3, i32 0, i32* null)
ret i1 %4
}

LLVM IR (-O2):
define zeroext i1 @zc_block_size_is_valid(i32 %0) {
%2 = tail call zeroext i1 @zc_block_size_check(i32 %0, i32 0, i32* null)
ret i1 %2
}
/* Variables and functions */
int RAND_MAX;
int rand();
int random_level() {
  int x = 1;
  while ((rand() < (RAND_MAX / 2)) && x < 32)
    x = x + 1;
  return x;
}


x86 assembly (clang, -O0):
<random_level>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,%ecx
mov    0x2eb9(%rip),%rax
mov    (%rax),%eax
mov    $0x2,%esi
cltd
idiv   %esi
mov    %eax,%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
jge    1152 <random_level+0x42>
cmpl   $0x20,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    1162 <random_level+0x52>
jmp    1170 <random_level+0x60>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <random_level+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_level>:
push   %r14
push   %rbx
push   %rax
mov    0x2ecd(%rip),%r14
xor    %ebx,%ebx
nopl   (%rax)
add    $0x1,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
mov    (%r14),%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
add    %ecx,%edx
sar    %edx
cmp    %edx,%eax
jge    113f <random_level+0x2f>
cmp    $0x20,%ebx
jb     1120 <random_level+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @random_level() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %12, %0
%3 = call i32 (...) @rand()
%4 = load i32, i32* @RAND_MAX
%5 = sdiv i32 %4, 2
%6 = icmp slt i32 %3, %5
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %1
%9 = icmp slt i32 %8, 32
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
br i1 %11, label %12, label %15
12: ; preds = %10
%13 = load i32, i32* %1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %1
br label %2
15: ; preds = %10
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @random_level() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 1, %0 ], [ %9, %1 ]
%3 = tail call i32 (...) @rand()
%4 = load i32, i32* @RAND_MAX
%5 = sdiv i32 %4, 2
%6 = icmp slt i32 %3, %5
%7 = icmp ult i32 %2, 32
%8 = select i1 %6, i1 %7, i1 false
%9 = add nuw nsw i32 %2, 1
br i1 %8, label %1, label %10
10: ; preds = %1
ret i32 %2
}
int f4(int t, int v) {
  int a = 1 - t;
  int b = a * v;
  return v - b;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @f4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 1, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
store i32 %11, i32* %6
%12 = load i32, i32* %4
%13 = load i32, i32* %6
%14 = sub nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f4(i32 %0, i32 %1) {
%3 = mul i32 %1, %0
ret i32 %3
}
unsigned kol_system_cpufreq() { asm volatile("int $0x40" ::"a"(18), "b"(5)); }


x86 assembly (clang, -O0):
<kol_system_cpufreq>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x12,%eax
mov    $0x5,%ebx
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_system_cpufreq>:
push   %rbx
mov    $0x12,%eax
mov    $0x5,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_system_cpufreq() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @kol_system_cpufreq() {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 18, i32 5)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void freeMatrices(int *first, int *second, int *product) {
  free(first);
  free(second);
  free(product);
}


x86 assembly (clang, -O0):
<freeMatrices>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeMatrices>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
call   1030 <free@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeMatrices(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = call i32 @free(i32* %7)
%9 = load i32*, i32** %5
%10 = call i32 @free(i32* %9)
%11 = load i32*, i32** %6
%12 = call i32 @free(i32* %11)
ret void
}

LLVM IR (-O2):
define void @freeMatrices(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = tail call i32 @free(i32* %0)
%5 = tail call i32 @free(i32* %1)
%6 = tail call i32 @free(i32* %2)
ret void
}
double f2() {
  double x;
  asm("" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
movq   %rax,%xmm0
ret

LLVM IR (-O0):
define double @f2() {
%1 = alloca double
%2 = load double, double* %1
%3 = call double asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"(double %2)
store double %3, double* %1
%4 = load double, double* %1
ret double %4
}

LLVM IR (-O2):
define double @f2() {
%1 = tail call double asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"(double undef)
ret double %1
}
int ra_conf_reachable(int newvalue) {
  static int value = 0;
  if (newvalue > 0 && newvalue <= 3600000)
    value = newvalue;
  return value;
}


x86 assembly (clang, -O0):
<ra_conf_reachable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1127 <ra_conf_reachable+0x27>
cmpl   $0x36ee80,-0x4(%rbp)
jg     1127 <ra_conf_reachable+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,0x2efd(%rip)
mov    0x2ef7(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ra_conf_reachable>:
mov    %edi,%eax
lea    -0x1(%rax),%ecx
cmp    $0x36ee80,%ecx
jae    1114 <ra_conf_reachable+0x14>
mov    %eax,0x2f11(%rip)
ret
mov    0x2f0a(%rip),%eax
ret

LLVM IR (-O0):
@ra_conf_reachable.value = internal global i32 0
define i32 @ra_conf_reachable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 3600000
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = load i32, i32* %2
store i32 %9, i32* @ra_conf_reachable.value
br label %10
10: ; preds = %8, %5, %1
%11 = load i32, i32* @ra_conf_reachable.value
ret i32 %11
}

LLVM IR (-O2):
@ra_conf_reachable.value = internal unnamed_addr global i32 0
define i32 @ra_conf_reachable(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3600000
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, i32* @ra_conf_reachable.value
br label %7
6: ; preds = %1
store i32 %0, i32* @ra_conf_reachable.value
br label %7
7: ; preds = %4, %6
%8 = phi i32 [ %5, %4 ], [ %0, %6 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ test_haml_comment();
int /*<<< orphan*/ test_haml_comment_entities();
int /*<<< orphan*/ test_haml_element();
void all_haml_tests() {
  test_haml_comment();
  test_haml_element();
  test_haml_comment_entities();
}


x86 assembly (clang, -O0):
<all_haml_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_haml_comment@plt>
mov    $0x0,%al
call   1040 <test_haml_element@plt>
mov    $0x0,%al
call   1050 <test_haml_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_haml_tests>:
push   %rax
xor    %eax,%eax
call   1030 <test_haml_comment@plt>
xor    %eax,%eax
call   1040 <test_haml_element@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <test_haml_comment_entities@plt>

LLVM IR (-O0):
define void @all_haml_tests() {
%1 = call i32 (...) @test_haml_comment()
%2 = call i32 (...) @test_haml_element()
%3 = call i32 (...) @test_haml_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_haml_tests() {
%1 = tail call i32 (...) @test_haml_comment()
%2 = tail call i32 (...) @test_haml_element()
%3 = tail call i32 (...) @test_haml_comment_entities()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ jahresliste();
int main() {
  jahresliste();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <jahresliste@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <jahresliste@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @jahresliste()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @jahresliste()
ret i32 0
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int64_t pb_uint2int(uint64_t u) {
  return (u & 1) ? (int64_t)(~(u >> 1)) : (int64_t)(u >> 1);
}


x86 assembly (clang, -O0):
<pb_uint2int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1127 <pb_uint2int+0x27>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1130 <pb_uint2int+0x30>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pb_uint2int>:
mov    %edi,%eax
sar    %eax
and    $0x1,%edi
neg    %edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @pb_uint2int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = ashr i32 %7, 1
%9 = xor i32 %8, -1
br label %13
10: ; preds = %1
%11 = load i32, i32* %2
%12 = ashr i32 %11, 1
br label %13
13: ; preds = %10, %6
%14 = phi i32 [ %9, %6 ], [ %12, %10 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @pb_uint2int(i32 %0) {
%2 = ashr i32 %0, 1
%3 = and i32 %0, 1
%4 = sub nsw i32 0, %3
%5 = xor i32 %2, %4
ret i32 %5
}
/* Variables and functions */
scalar_t__ BIO_socket_ioctl(int, int /*<<< orphan*/, int *);
int /*<<< orphan*/ FIONBIO;
int BIO_socket_nbio(int s, int mode) {
  return (BIO_socket_ioctl(s, FIONBIO, &mode) == 0);
}


x86 assembly (clang, -O0):
<BIO_socket_nbio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <BIO_socket_ioctl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_socket_nbio>:
push   %rax
mov    %esi,0x4(%rsp)
mov    0x2ec4(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <BIO_socket_ioctl@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@FIONBIO = global i32 0
define i32 @BIO_socket_nbio(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @FIONBIO
%7 = call i64 @BIO_socket_ioctl(i32 %5, i32 %6, i32* %4)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@FIONBIO = global i32 0
define i32 @BIO_socket_nbio(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = load i32, i32* @FIONBIO
%5 = call i64 @BIO_socket_ioctl(i32 %0, i32 %4, i32* %3)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
void pcie_clear_aspm(struct pci_bus *bus) {}


x86 assembly (clang, -O0):
<pcie_clear_aspm>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcie_clear_aspm>:
ret

LLVM IR (-O0):
%struct.pci_bus = type opaque
define void @pcie_clear_aspm(%struct.pci_bus* %0) {
%2 = alloca %struct.pci_bus*
store %struct.pci_bus* %0, %struct.pci_bus** %2
ret void
}

LLVM IR (-O2):
%struct.pci_bus = type opaque
define void @pcie_clear_aspm(%struct.pci_bus* nocapture %0) {
ret void
}
void xpanalyse() {}


x86 assembly (clang, -O0):
<xpanalyse>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xpanalyse>:
ret

LLVM IR (-O0):
define void @xpanalyse() {
ret void
}

LLVM IR (-O2):
define void @xpanalyse() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
double *malloc(uintptr_t);
double *mallocDouble(uintptr_t numDoubles) {
  {};
  double *temp = NULL;
  temp = malloc(numDoubles * sizeof(double));
  if (temp == NULL) {
    fatal("Memory alocation error.\n");
  }
  {};
  return temp;
}


x86 assembly (clang, -O0):
<mallocDouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x3,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115c <mallocDouble+0x3c>
lea    0xea9(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocDouble>:
push   %rbx
shl    $0x3,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113e <mallocDouble+0x1e>
lea    0xec7(%rip),%rdi
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Memory alocation error.\0A\00"
define double* @mallocDouble(i64 %0) {
%2 = alloca i64
%3 = alloca double*
store i64 %0, i64* %2
store double* null, double** %3
%4 = load i64, i64* %2
%5 = mul i64 %4, 8
%6 = call double* @malloc(i64 %5)
store double* %6, double** %3
%7 = load double*, double** %3
%8 = icmp eq double* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @fatal(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load double*, double** %3
ret double* %12
}

LLVM IR (-O2):
@.str = [25 x i8] c"Memory alocation error.\0A\00"
define noalias double* @mallocDouble(i64 %0) {
%2 = shl i64 %0, 3
%3 = tail call double* @malloc(i64 %2)
%4 = icmp eq double* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @fatal(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret double* %3
}
/* Type definitions */
typedef int wint_t;

/* Variables and functions */
int WEOF;
int wctob(wint_t c) {
  if (c & 0xffffff80)
    return WEOF;
  return c;
}


x86 assembly (clang, -O0):
<wctob>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffffff80,%eax
cmp    $0x0,%eax
je     1127 <wctob+0x27>
mov    0x2ec3(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    112d <wctob+0x2d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wctob>:
mov    %edi,%eax
cmp    $0x80,%edi
jb     1113 <wctob+0x13>
mov    0x2ecf(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@WEOF = global i32 0
define i32 @wctob(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, -128
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @WEOF
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@WEOF = global i32 0
define i32 @wctob(i32 %0) {
%2 = icmp ult i32 %0, 128
%3 = load i32, i32* @WEOF
%4 = select i1 %2, i32 %0, i32 %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(int, int *, int);
void printchar(unsigned char **str, int c) {
  if (str) {
    **str = c;
    ++(*str);
  } else
    (void)write(1, &c, 1);
}


x86 assembly (clang, -O0):
<printchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114b <printchar+0x3b>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    115b <printchar+0x4b>
mov    $0x1,%edx
lea    -0xc(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printchar>:
push   %rax
mov    %esi,0x4(%rsp)
test   %rdi,%rdi
je     1126 <printchar+0x16>
mov    (%rdi),%rax
mov    %sil,(%rax)
addq   $0x1,(%rdi)
pop    %rax
ret
lea    0x4(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @printchar(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = icmp ne i8** %5, null
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %4
%9 = trunc i32 %8 to i8
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
store i8 %9, i8* %11
%12 = load i8**, i8*** %3
%13 = load i8*, i8** %12
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %12
br label %17
15: ; preds = %2
%16 = call i32 @write(i32 1, i32* %4, i32 1)
br label %17
17: ; preds = %15, %7
ret void
}

LLVM IR (-O2):
define void @printchar(i8** %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = icmp eq i8** %0, null
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = trunc i32 %1 to i8
%7 = load i8*, i8** %0
store i8 %6, i8* %7
%8 = load i8*, i8** %0
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %9, i8** %0
br label %12
10: ; preds = %2
%11 = call i32 @write(i32 1, i32* %3, i32 1)
br label %12
12: ; preds = %10, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_path(char *);
void add_local_bin_to_path(void) { set_path("/usr/local/bin"); }


x86 assembly (clang, -O0):
<add_local_bin_to_path>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <set_path@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_local_bin_to_path>:
lea    0xee9(%rip),%rdi
jmp    1030 <set_path@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"/usr/local/bin\00"
define void @add_local_bin_to_path() {
%1 = call i32 @set_path(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"/usr/local/bin\00"
define void @add_local_bin_to_path() {
%1 = tail call i32 @set_path(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct RNAduplex_args_info {
  int dummy;
};

/* Variables and functions */
int EXIT_SUCCESS;
int RNAduplex_cmdline_parser_required(struct RNAduplex_args_info *args_info,
                                      const char *prog_name) {
  (void)(args_info);
  (void)(prog_name);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<RNAduplex_cmdline_parser_required>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAduplex_cmdline_parser_required>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.RNAduplex_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @RNAduplex_cmdline_parser_required(%struct.RNAduplex_args_info* %0, i8* %1) {
%3 = alloca %struct.RNAduplex_args_info*
%4 = alloca i8*
store %struct.RNAduplex_args_info* %0, %struct.RNAduplex_args_info** %3
store i8* %1, i8** %4
%5 = load %struct.RNAduplex_args_info*, %struct.RNAduplex_args_info** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
%struct.RNAduplex_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @RNAduplex_cmdline_parser_required(%struct.RNAduplex_args_info* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
int min(int a, int b, int c) {
  if (a <= b && a <= c) {
    return a;
  } else if (b <= a && b <= c) {
    return b;
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1130 <min+0x30>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1130 <min+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <min+0x59>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1153 <min+0x53>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1153 <min+0x53>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <min+0x59>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
cmp    %edx,%esi
mov    %esi,%ecx
cmovg  %edx,%ecx
cmp    %edi,%esi
cmovg  %edx,%ecx
cmp    %edx,%edi
mov    %edi,%eax
cmovg  %ecx,%eax
cmp    %esi,%edi
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %29
17: ; preds = %11, %3
%18 = load i32, i32* %6
%19 = load i32, i32* %5
%20 = icmp sle i32 %18, %19
br i1 %20, label %21, label %27
21: ; preds = %17
%22 = load i32, i32* %6
%23 = load i32, i32* %7
%24 = icmp sle i32 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21
%26 = load i32, i32* %6
store i32 %26, i32* %4
br label %29
27: ; preds = %21, %17
%28 = load i32, i32* %7
store i32 %28, i32* %4
br label %29
29: ; preds = %27, %25, %15
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = or i1 %4, %5
%7 = icmp sgt i32 %1, %0
%8 = icmp sgt i32 %1, %2
%9 = or i1 %7, %8
%10 = select i1 %9, i32 %2, i32 %1
%11 = select i1 %6, i32 %10, i32 %0
ret i32 %11
}
void test__toupper(void) {
  int i, j;
  for (i = -127; i < 256;)
    j = i, printf("%s: %d -> %d\n", __FUNCTION__, j, _toupper(i++));
}


x86 assembly (clang, -O0):
<test__toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffff81,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
jge    1179 <test__toupper+0x59>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    %edi,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <_toupper@plt>
mov    -0xc(%rbp),%edx
mov    %eax,%ecx
lea    0xe9a(%rip),%rdi
lea    0xea1(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    112f <test__toupper+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__toupper>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    $0xffffff81,%ebx
lea    0xecd(%rip),%r14
lea    0xed4(%rip),%r15
nopw   0x0(%rax,%rax,1)
lea    0x1(%rbx),%ebp
mov    %ebx,%edi
xor    %eax,%eax
call   1040 <_toupper@plt>
mov    %r14,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %eax,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
mov    %ebp,%ebx
cmp    $0x100,%ebp
jne    1140 <test__toupper+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%s: %d -> %d\0A\00"
@__FUNCTION__.test__toupper = [14 x i8] c"test__toupper\00"
define void @test__toupper() {
%1 = alloca i32
%2 = alloca i32
store i32 -127, i32* %1
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %1
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
%11 = call i32 (i32, ...) bitcast (i32 (...)* @_toupper to i32 (i32, ...)*)(i32 %9)
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__FUNCTION__.test__toupper, i64 0, i64 0), i32 %8, i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"%s: %d -> %d\0A\00"
@__FUNCTION__.test__toupper = [14 x i8] c"test__toupper\00"
define void @test__toupper() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ -127, %0 ], [ %3, %1 ]
%3 = add nsw i32 %2, 1
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @_toupper to i32 (i32, ...)*)(i32 %2)
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__FUNCTION__.test__toupper, i64 0, i64 0), i32 %2, i32 %4)
%6 = icmp eq i32 %3, 256
br i1 %6, label %7, label %1
7: ; preds = %1
ret void
}
void ff_hevc_put_hevc_uni_w_epel_v4_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_v4_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_v4_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_v4_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_v4_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("Doble: %d\n", sizeof(double));
  printf("Entero: %d\n", sizeof(int));
  printf("flotante: %d\n", sizeof(float));
  printf("Caracter: %d\n", sizeof(char));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xecf(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xecc(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Doble: %d\0A\00"
@.str.1 = [12 x i8] c"Entero: %d\0A\00"
@.str.2 = [14 x i8] c"flotante: %d\0A\00"
@.str.3 = [14 x i8] c"Caracter: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 8)
%3 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 4)
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.3, i64 0, i64 0), i32 1)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"Doble: %d\0A\00"
@.str.1 = [12 x i8] c"Entero: %d\0A\00"
@.str.2 = [14 x i8] c"flotante: %d\0A\00"
@.str.3 = [14 x i8] c"Caracter: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 8)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 4)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 4)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.3, i64 0, i64 0), i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ stdout;
int main(int argc, char *argv[]) {
  int count = 1;
  while (1) {
    printf(" %2d ", count++);
    fflush(stdout);
    sleep(2);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    %eax,-0x14(%rbp)
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    $0x2,%edi
call   1050 <sleep@plt>
jmp    114d <main+0x1d>

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    $0x1,%esi
lea    0xec0(%rip),%r14
mov    0x2e99(%rip),%rbx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rsi),%ebp
mov    %r14,%rdi
call   1030 <printf@plt>
mov    (%rbx),%edi
call   1040 <fflush@plt>
mov    $0x2,%edi
call   1050 <sleep@plt>
mov    %ebp,%esi
jmp    1150 <main+0x20>

LLVM IR (-O0):
@.str = [6 x i8] c" %2d \00"
@stdout = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %2, %7
%8 = load i32, i32* %6
%9 = add nsw i32 %8, 1
store i32 %9, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %8)
%11 = load i32, i32* @stdout
%12 = call i32 @fflush(i32 %11)
%13 = call i32 @sleep(i32 2)
br label %7
}

LLVM IR (-O2):
@.str = [6 x i8] c" %2d \00"
@stdout = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ 1, %2 ], [ %5, %3 ]
%5 = add nuw nsw i32 %4, 1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %4)
%7 = load i32, i32* @stdout
%8 = tail call i32 @fflush(i32 %7)
%9 = tail call i32 @sleep(i32 2)
br label %3
}
signed int vdprintf(signed int __fd, const char *restrict __fmt, void **__ap) {
  signed int return_value___vdprintf_chk$1;
  return_value___vdprintf_chk$1 = __vdprintf_chk(__fd, 2 - 1, __fmt, __ap);
  return return_value___vdprintf_chk$1;
}


x86 assembly (clang, -O0):
<vdprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <__vdprintf_chk@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdprintf>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <__vdprintf_chk@plt>

LLVM IR (-O0):
define i32 @vdprintf(i32 %0, i8* noalias %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i8**, i8*** %6
%11 = call i32 (i32, i32, i8*, i8**, ...) bitcast (i32 (...)* @__vdprintf_chk to i32 (i32, i32, i8*, i8**, ...)*)(i32 %8, i32 1, i8* %9, i8** %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @vdprintf(i32 %0, i8* noalias %1, i8** %2) {
%4 = tail call i32 (i32, i32, i8*, i8**, ...) bitcast (i32 (...)* @__vdprintf_chk to i32 (i32, i32, i8*, i8**, ...)*)(i32 %0, i32 1, i8* %1, i8** %2)
ret i32 %4
}