xunge/DecIR huggingface dataset:
/* Variables and functions */
int libc_execv(char const *, char *const *);
int /*<<< orphan*/ watch_log(char *, char const *);
int execv(const char *path, char *const *argv) {
  watch_log("exec %s\n", path);
  return libc_execv(path, argv);
}


x86 assembly (clang, -O0):
<execv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec5(%rip),%rdi
call   1040 <watch_log@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <libc_execv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execv>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
mov    %rbx,%rsi
call   1040 <watch_log@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <libc_execv@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"exec %s\0A\00"
define i32 @execv(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = call i32 @watch_log(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %3
%8 = load i8**, i8*** %4
%9 = call i32 @libc_execv(i8* %7, i8** %8)
ret i32 %9
}

LLVM IR (-O2):
@.str = [9 x i8] c"exec %s\0A\00"
define i32 @execv(i8* %0, i8** %1) {
%3 = tail call i32 @watch_log(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @libc_execv(i8* %0, i8** %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ test1();
int /*<<< orphan*/ test2();
int /*<<< orphan*/ test3();
int /*<<< orphan*/ test4();
int /*<<< orphan*/ test5();
int main(void) {
  test1();
  test2();
  test3();
  test4();
  test5();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <test1@plt>
mov    $0x0,%al
call   1070 <test2@plt>
mov    $0x0,%al
call   1040 <test3@plt>
mov    $0x0,%al
call   1060 <test4@plt>
mov    $0x0,%al
call   1030 <test5@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <test1@plt>
xor    %eax,%eax
call   1070 <test2@plt>
xor    %eax,%eax
call   1040 <test3@plt>
xor    %eax,%eax
call   1060 <test4@plt>
xor    %eax,%eax
call   1030 <test5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test1()
%3 = call i32 (...) @test2()
%4 = call i32 (...) @test3()
%5 = call i32 (...) @test4()
%6 = call i32 (...) @test5()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test1()
%2 = tail call i32 (...) @test2()
%3 = tail call i32 (...) @test3()
%4 = tail call i32 (...) @test4()
%5 = tail call i32 (...) @test5()
ret i32 0
}
/* Variables and functions */
double pow(int, unsigned long long);
int sqrt(int);
unsigned long long calculateFibo(unsigned long long n) {
  return (
      int)((pow(((1 + sqrt(5)) / 2), n) - pow(((1 - sqrt(5)) / 2), n) + 0.5) /
           2.24);
}


x86 assembly (clang, -O0):
<calculateFibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x5,%edi
call   1040 <sqrt@plt>
add    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1030 <pow@plt>
movsd  %xmm0,-0x10(%rbp)
mov    $0x5,%edi
call   1040 <sqrt@plt>
mov    %eax,%ecx
mov    $0x1,%eax
sub    %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
subsd  %xmm1,%xmm0
movsd  0xe7d(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xe69(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculateFibo>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    $0x5,%edi
call   1040 <sqrt@plt>
mov    %eax,%ecx
add    $0x1,%ecx
shr    $0x1f,%ecx
lea    (%rax,%rcx,1),%edi
add    $0x1,%edi
sar    %edi
mov    %rbx,%rsi
call   1030 <pow@plt>
movsd  %xmm0,0x8(%rsp)
mov    $0x5,%edi
call   1040 <sqrt@plt>
mov    $0x1,%ecx
sub    %eax,%ecx
mov    %ecx,%edi
shr    $0x1f,%edi
add    %ecx,%edi
sar    %edi
mov    %rbx,%rsi
call   1030 <pow@plt>
movsd  0x8(%rsp),%xmm1
subsd  %xmm0,%xmm1
addsd  0xe7c(%rip),%xmm1
divsd  0xe7c(%rip),%xmm1
cvttsd2si %xmm1,%eax
cltq
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i64 @calculateFibo(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 @sqrt(i32 5)
%4 = add nsw i32 1, %3
%5 = sdiv i32 %4, 2
%6 = load i64, i64* %2
%7 = call double @pow(i32 %5, i64 %6)
%8 = call i32 @sqrt(i32 5)
%9 = sub nsw i32 1, %8
%10 = sdiv i32 %9, 2
%11 = load i64, i64* %2
%12 = call double @pow(i32 %10, i64 %11)
%13 = fsub double %7, %12
%14 = fadd double %13, 5.000000e-01
%15 = fdiv double %14, 2.240000e+00
%16 = fptosi double %15 to i32
%17 = sext i32 %16 to i64
ret i64 %17
}

LLVM IR (-O2):
define i64 @calculateFibo(i64 %0) {
%2 = tail call i32 @sqrt(i32 5)
%3 = add nsw i32 %2, 1
%4 = sdiv i32 %3, 2
%5 = tail call double @pow(i32 %4, i64 %0)
%6 = tail call i32 @sqrt(i32 5)
%7 = sub nsw i32 1, %6
%8 = sdiv i32 %7, 2
%9 = tail call double @pow(i32 %8, i64 %0)
%10 = fsub double %5, %9
%11 = fadd double %10, 5.000000e-01
%12 = fdiv double %11, 2.240000e+00
%13 = fptosi double %12 to i32
%14 = sext i32 %13 to i64
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
void shutdown(void) { endwin(); }


x86 assembly (clang, -O0):
<shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdown>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @shutdown() {
%1 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @shutdown() {
%1 = tail call i32 (...) @endwin()
ret void
}
/* Variables and functions */
double medmeddev_double(int, double *);
double MAD(int n, double *data) { return 1.483 * medmeddev_double(n, data); }


x86 assembly (clang, -O0):
<MAD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <medmeddev_double@plt>
movaps %xmm0,%xmm1
movsd  0xeca(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAD>:
push   %rax
call   1030 <medmeddev_double@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @MAD(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
store i32 %0, i32* %3
store double* %1, double** %4
%5 = load i32, i32* %3
%6 = load double*, double** %4
%7 = call double @medmeddev_double(i32 %5, double* %6)
%8 = fmul double 1.483000e+00, %7
ret double %8
}

LLVM IR (-O2):
define double @MAD(i32 %0, double* %1) {
%3 = tail call double @medmeddev_double(i32 %0, double* %1)
%4 = fmul double %3, 1.483000e+00
ret double %4
}
/* Type definitions */
struct in6_addr {
  int dummy;
};
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ AF_INET6;
char const *inet_ntop(int /*<<< orphan*/, struct in6_addr const *, char *, int);
const char *xtables_ip6addr_to_numeric(const struct in6_addr *addrp) {
  static char buf[50 + 1];
  return inet_ntop(AF_INET6, addrp, buf, sizeof(buf));
}


x86 assembly (clang, -O0):
<xtables_ip6addr_to_numeric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
lea    0x2f10(%rip),%rdx
mov    $0x33,%ecx
call   1030 <inet_ntop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtables_ip6addr_to_numeric>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
lea    0x2f1d(%rip),%rdx
mov    $0x33,%ecx
jmp    1030 <inet_ntop@plt>

LLVM IR (-O0):
%struct.in6_addr = type { i32 }
@xtables_ip6addr_to_numeric.buf = internal global [51 x i8] zeroinitializer
@AF_INET6 = global i32 0
define i8* @xtables_ip6addr_to_numeric(%struct.in6_addr* %0) {
%2 = alloca %struct.in6_addr*
store %struct.in6_addr* %0, %struct.in6_addr** %2
%3 = load i32, i32* @AF_INET6
%4 = load %struct.in6_addr*, %struct.in6_addr** %2
%5 = call i8* @inet_ntop(i32 %3, %struct.in6_addr* %4, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @xtables_ip6addr_to_numeric.buf, i64 0, i64 0), i32 51)
ret i8* %5
}

LLVM IR (-O2):
%struct.in6_addr = type { i32 }
@xtables_ip6addr_to_numeric.buf = internal global [51 x i8] zeroinitializer
@AF_INET6 = global i32 0
define i8* @xtables_ip6addr_to_numeric(%struct.in6_addr* %0) {
%2 = load i32, i32* @AF_INET6
%3 = tail call i8* @inet_ntop(i32 %2, %struct.in6_addr* %0, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @xtables_ip6addr_to_numeric.buf, i64 0, i64 0), i32 51)
ret i8* %3
}
void BLEConnected() {}


x86 assembly (clang, -O0):
<BLEConnected>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BLEConnected>:
ret

LLVM IR (-O0):
define void @BLEConnected() {
ret void
}

LLVM IR (-O2):
define void @BLEConnected() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void cubeByReference(int *iptr) {
  *iptr = (*iptr) * (*iptr) * (*iptr);
  printf("Input cube is %d \n", *iptr);
}


x86 assembly (clang, -O0):
<cubeByReference>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
imul   (%rax),%ecx
mov    -0x8(%rbp),%rax
imul   (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cubeByReference>:
mov    (%rdi),%eax
mov    %eax,%esi
imul   %eax,%esi
imul   %eax,%esi
mov    %esi,(%rdi)
lea    0xedd(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Input cube is %d \0A\00"
define void @cubeByReference(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = mul nsw i32 %4, %6
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = mul nsw i32 %7, %9
%11 = load i32*, i32** %2
store i32 %10, i32* %11
%12 = load i32*, i32** %2
%13 = load i32, i32* %12
%14 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"Input cube is %d \0A\00"
define void @cubeByReference(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul nsw i32 %2, %2
%4 = mul nsw i32 %3, %2
store i32 %4, i32* %0
%5 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
unsigned char cstylecast_2(signed int x) { return (unsigned char)x; }


x86 assembly (clang, -O0):
<cstylecast_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstylecast_2>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @cstylecast_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @cstylecast_2(i32 %0) {
%2 = trunc i32 %0 to i8
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/, int /*<<< orphan*/);
void version() {
  printf("'ga_deltaG' in genome analysis tools version: %d.%d.%d\n", 1, 0, 0);
  exit(0);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
mov    $0x1,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<version>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x1,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"'ga_deltaG' in genome analysis tools version: %d.%d.%d\0A\00"
define void @version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), i32 1, i32 0, i32 0)
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [56 x i8] c"'ga_deltaG' in genome analysis tools version: %d.%d.%d\0A\00"
define void @version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), i32 1, i32 0, i32 0)
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *, int);
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *mymalloc(size_t n) {
  void *m = malloc(n);
  if (!n)
    errx(1, "Cannot malloc %d", (int)n);
  memset(m, 0, n);
  return m;
}


x86 assembly (clang, -O0):
<mymalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    116b <mymalloc+0x3b>
mov    -0x8(%rbp),%rax
mov    %eax,%edx
mov    $0x1,%edi
lea    0xe9a(%rip),%rsi
call   1030 <errx@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mymalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1050 <malloc@plt>
mov    %rax,%r14
test   %rbx,%rbx
jne    1157 <mymalloc+0x27>
lea    0xeb5(%rip),%rsi
mov    $0x1,%edi
xor    %edx,%edx
call   1030 <errx@plt>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1040 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Cannot malloc %d\00"
define i8* @mymalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i64, i64* %2
%7 = icmp ne i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i64, i64* %2
%10 = trunc i64 %9 to i32
%11 = call i32 @errx(i32 1, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %12
12: ; preds = %8, %1
%13 = load i8*, i8** %3
%14 = load i64, i64* %2
%15 = call i32 @memset(i8* %13, i32 0, i64 %14)
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
@.str = [17 x i8] c"Cannot malloc %d\00"
define i8* @mymalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i64 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 0)
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
ret i8* %2
}
/* Variables and functions */
int WIFEXITED(int);
int goose_WIFEXITED(int status) { return WIFEXITED(status); }


x86 assembly (clang, -O0):
<goose_WIFEXITED>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <WIFEXITED@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goose_WIFEXITED>:
jmp    1030 <WIFEXITED@plt>

LLVM IR (-O0):
define i32 @goose_WIFEXITED(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @WIFEXITED(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @goose_WIFEXITED(i32 %0) {
%2 = tail call i32 @WIFEXITED(i32 %0)
ret i32 %2
}
unsigned char rotateL_fun_uchar(unsigned char x, int i) {
  if ((i %= 8) == 0)
    return x;
  return (x << i) | (x >> (8 - i));
}


x86 assembly (clang, -O0):
<rotateL_fun_uchar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
cmp    $0x0,%edx
jne    112f <rotateL_fun_uchar+0x2f>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    114d <rotateL_fun_uchar+0x4d>
movzbl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzbl -0x2(%rbp),%edx
mov    $0x8,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotateL_fun_uchar>:
mov    %esi,%ecx
lea    0x7(%rcx),%eax
test   %esi,%esi
cmovns %esi,%eax
and    $0xfffffff8,%eax
sub    %eax,%ecx
mov    %edi,%eax
rol    %cl,%al
test   %ecx,%ecx
movzbl %al,%eax
cmove  %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @rotateL_fun_uchar(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = srem i32 %6, 8
store i32 %7, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i8, i8* %4
store i8 %10, i8* %3
br label %23
11: ; preds = %2
%12 = load i8, i8* %4
%13 = zext i8 %12 to i32
%14 = load i32, i32* %5
%15 = shl i32 %13, %14
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = load i32, i32* %5
%19 = sub nsw i32 8, %18
%20 = ashr i32 %17, %19
%21 = or i32 %15, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %3
br label %23
23: ; preds = %11, %9
%24 = load i8, i8* %3
ret i8 %24
}

LLVM IR (-O2):
define zeroext i8 @rotateL_fun_uchar(i8 zeroext %0, i32 %1) {
%3 = srem i32 %1, 8
%4 = icmp eq i32 %3, 0
%5 = trunc i32 %3 to i8
%6 = tail call i8 @llvm.fshl.i8(i8 %0, i8 %0, i8 %5)
%7 = select i1 %4, i8 %0, i8 %6
ret i8 %7
}
int colorFromBattery(int batteryLevel) { return 0; }


x86 assembly (clang, -O0):
<colorFromBattery>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorFromBattery>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @colorFromBattery(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @colorFromBattery(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, short);
void test13(short x) {
  char bel = 007;
  printf("bel: '0%hhd'\n", bel);
  printf("x: '0%hhd'\n", x);
}


x86 assembly (clang, -O0):
<test13>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movb   $0x7,-0x3(%rbp)
movsbl -0x3(%rbp),%eax
lea    0xed2(%rip),%rdi
movswl %ax,%esi
call   1030 <printf@plt>
lea    0xed1(%rip),%rdi
movswl -0x2(%rbp),%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test13>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
mov    $0x7,%esi
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"bel: '0%hhd'\0A\00"
@.str.1 = [12 x i8] c"x: '0%hhd'\0A\00"
define void @test13(i16 signext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
store i8 7, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i16
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i16 signext %5)
%7 = load i16, i16* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i16 signext %7)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"bel: '0%hhd'\0A\00"
@.str.1 = [12 x i8] c"x: '0%hhd'\0A\00"
define void @test13(i16 signext %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i16 signext 7)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i16 signext %0)
ret void
}
void __attribute__((weak)) free(void *ptr) {
  (void)ptr;
  ;
}


x86 assembly (clang, -O0):
<free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free>:
ret

LLVM IR (-O0):
define weak void @free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define weak void @free(i8* %0) {
ret void
}
int gfx_set_tv_format(int format, int resolution) { return (0); }


x86 assembly (clang, -O0):
<gfx_set_tv_format>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_set_tv_format>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gfx_set_tv_format(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @gfx_set_tv_format(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
char getach();
int getrq();
char i;
getsn() {
  register i;
  if ((i = getach()) == 0)
    return (0);
  if (i == '(')
    return (getrq());
  else
    return (i);
}


x86 assembly (clang, -O0):
<getsn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getach@plt>
movsbl %al,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jne    114a <getsn+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1169 <getsn+0x49>
cmpl   $0x28,-0x8(%rbp)
jne    1163 <getsn+0x43>
mov    $0x0,%al
call   1040 <getrq@plt>
mov    %eax,-0x4(%rbp)
jmp    1169 <getsn+0x49>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getsn>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <getach@plt>
test   %al,%al
je     113d <getsn+0x1d>
cmp    $0x28,%al
jne    113a <getsn+0x1a>
xor    %eax,%eax
pop    %rbx
jmp    1040 <getrq@plt>
movsbl %al,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@i = global i8 0
define i32 @getsn() {
%1 = alloca i32
%2 = alloca i32
%3 = call signext i8 (...) @getach()
%4 = sext i8 %3 to i32
store i32 %4, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %1
br label %14
7: ; preds = %0
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 40
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 (...) @getrq()
store i32 %11, i32* %1
br label %14
12: ; preds = %7
%13 = load i32, i32* %2
store i32 %13, i32* %1
br label %14
14: ; preds = %12, %10, %6
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
@i = global i8 0
define i32 @getsn() {
%1 = tail call signext i8 (...) @getach()
switch i8 %1, label %4 [
i8 0, label %6
i8 40, label %2
]
2: ; preds = %0
%3 = tail call i32 (...) @getrq()
br label %6
4: ; preds = %0
%5 = sext i8 %1 to i32
br label %6
6: ; preds = %0, %4, %2
%7 = phi i32 [ %3, %2 ], [ %5, %4 ], [ 0, %0 ]
ret i32 %7
}
int foo(int i) {
  int a = 2;
  if (i == 0) {
    return a;
  } else {
    return a + foo(--i);
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1137 <foo+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1155 <foo+0x45>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
add    $0xffffffff,%edi
mov    %edi,-0x8(%rbp)
call   1030 <foo@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %edi,%edi
lea    0x2(%rdi,%rdi,1),%ecx
mov    $0x2,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* %4
store i32 %8, i32* %2
br label %15
9: ; preds = %1
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, -1
store i32 %12, i32* %3
%13 = call i32 @foo(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %9, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = shl i32 %0, 1
%4 = add i32 %3, 2
%5 = select i1 %2, i32 2, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _MPI_checkMemAlloc(void *, char *);
void *realloc(void *, int);
void *_MPI_safeRealloc(void *oldBuffer, int size, char *message) {
  ;
  oldBuffer = realloc(oldBuffer, size);
  _MPI_checkMemAlloc(oldBuffer, message);
  return oldBuffer;
}


x86 assembly (clang, -O0):
<_MPI_safeRealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <_MPI_checkMemAlloc@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_MPI_safeRealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
call   1040 <realloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <_MPI_checkMemAlloc@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_MPI_safeRealloc(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i8* @realloc(i8* %7, i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = load i8*, i8** %6
%12 = call i32 @_MPI_checkMemAlloc(i8* %10, i8* %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
define i8* @_MPI_safeRealloc(i8* %0, i32 %1, i8* %2) {
%4 = tail call i8* @realloc(i8* %0, i32 %1)
%5 = tail call i32 @_MPI_checkMemAlloc(i8* %4, i8* %2)
ret i8* %4
}
void waitrsv(void) {
  asm volatile(".long (0x7c00007c | (((1) & 0x3) << (31 - 10)))");
}


x86 assembly (clang, -O0):
<waitrsv>:
push   %rbp
mov    %rsp,%rbp
jl     1106 <waitrsv+0x6>
and    %bh,-0x3d(%rbp,%rbx,2)

x86 assembly (clang, -O2):
<waitrsv>:
jl     1102 <waitrsv+0x2>
.byte 0x20
jl     10c8 <__do_global_dtors_aux+0x18>

LLVM IR (-O0):
define void @waitrsv() {
ret void
}

LLVM IR (-O2):
define void @waitrsv() {
tail call void asm sideeffect ".long (0x7c00007c | (((1) & 0x3) << (31 - 10)))", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ display(int);
int main() {
  int no = 1;
  display(no);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <display@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <display@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @display(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @display(i32 1)
ret i32 0
}
int test_imm_C1uint16_reg(unsigned short val) {
  return ((val) & (0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xc1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1uint16_reg>:
test   $0xc1,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 193
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C1uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 193
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void ArrayTests(void) {}


x86 assembly (clang, -O0):
<ArrayTests>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArrayTests>:
ret

LLVM IR (-O0):
define void @ArrayTests() {
ret void
}

LLVM IR (-O2):
define void @ArrayTests() {
ret void
}
void gp_init(void) {}


x86 assembly (clang, -O0):
<gp_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gp_init>:
ret

LLVM IR (-O0):
define void @gp_init() {
ret void
}

LLVM IR (-O2):
define void @gp_init() {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int send_event;
};
struct TYPE_4__ {
  TYPE_1__ xconfigure;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xconfigure_send_event(void *_p, int _v) {
  ((XEvent *)_p)->xconfigure.send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xconfigure_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xconfigure_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xconfigure_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xconfigure_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int test_imm_81uint32_mem(unsigned int *val) {
  return ((*val) & (0x81 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_81uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x81,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_81uint32_mem>:
testb  $0x81,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_81uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 129
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_81uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 129
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int a_fun();
int b_fun();
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int life = a_fun() + b_fun();
  printf("%d\n", life);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <a_fun@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <b_fun@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe9c(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <a_fun@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <b_fun@plt>
add    %eax,%ebx
lea    0xeb6(%rip),%rdi
mov    %ebx,%esi
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @a_fun()
%4 = call i32 (...) @b_fun()
%5 = add nsw i32 %3, %4
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @a_fun()
%2 = tail call i32 (...) @b_fun()
%3 = add nsw i32 %2, %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ WriteUint24Le(int /*<<< orphan*/, void *);
int32_t WriteInt24Le(int32_t value, void *out) {
  return WriteUint24Le((uint32_t)value, out);
}


x86 assembly (clang, -O0):
<WriteInt24Le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <WriteUint24Le@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteInt24Le>:
jmp    1030 <WriteUint24Le@plt>

LLVM IR (-O0):
define i64 @WriteInt24Le(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i32
%7 = load i8*, i8** %4
%8 = call i64 @WriteUint24Le(i32 %6, i8* %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @WriteInt24Le(i64 %0, i8* %1) {
%3 = trunc i64 %0 to i32
%4 = tail call i64 @WriteUint24Le(i32 %3, i8* %1)
ret i64 %4
}
/* Variables and functions */
int atoi(char *);
int g_atoi(char *str) { return atoi(str); }


x86 assembly (clang, -O0):
<g_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_atoi>:
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i32 @g_atoi(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @atoi(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @g_atoi(i8* nocapture %0) {
%2 = tail call i32 @atoi(i8* %0)
ret i32 %2
}
int isxdigit(int character) {
  return (character >= '0' && character <= '9') ||
         (character >= 'a' && character <= 'f') ||
         (character >= 'A' && character <= 'F');
}


x86 assembly (clang, -O0):
<isxdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1120 <isxdigit+0x20>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isxdigit+0x58>
cmpl   $0x61,-0x4(%rbp)
jl     1139 <isxdigit+0x39>
mov    $0x1,%al
cmpl   $0x66,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isxdigit+0x58>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <isxdigit+0x52>
cmpl   $0x46,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isxdigit>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x6,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 97
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 102
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 65
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 70
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @isxdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
int list_count_cb(void *data, void *private) { return (1); }


x86 assembly (clang, -O0):
<list_count_cb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_count_cb>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @list_count_cb(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @list_count_cb(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(int);
void xor_reg32_imm32(int reg32, unsigned long imm32) {
  put8(0x81);
  put8(0xF0 + reg32);
  put32(imm32);
}


x86 assembly (clang, -O0):
<xor_reg32_imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x81,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
add    $0xf0,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rdi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor_reg32_imm32>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    $0x81,%edi
call   1030 <put8@plt>
add    $0xf0,%ebp
mov    %ebp,%edi
call   1030 <put8@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @xor_reg32_imm32(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = call i32 @put8(i32 129)
%6 = load i32, i32* %3
%7 = add nsw i32 240, %6
%8 = call i32 @put8(i32 %7)
%9 = load i64, i64* %4
%10 = call i32 @put32(i64 %9)
ret void
}

LLVM IR (-O2):
define void @xor_reg32_imm32(i32 %0, i64 %1) {
%3 = tail call i32 @put8(i32 129)
%4 = add nsw i32 %0, 240
%5 = tail call i32 @put8(i32 %4)
%6 = tail call i32 @put32(i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char *argv[]) {
  int x, y, z;
  x = 1;
  y = 42;
  z = 1;
#pragma omp single private(x) firstprivate(y)
  {
    x = 99;
    if (y != 42) {
      abort();
    }
    y = 99;
    z = 99;
  }
  if (x != 1) {
    abort();
  }
  if (y != 42) {
    abort();
  }
  if (z != 99) {
    abort();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x2a,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
movl   $0x63,-0x14(%rbp)
cmpl   $0x2a,-0x18(%rbp)
je     1153 <main+0x43>
mov    $0x0,%al
call   1030 <abort@plt>
movl   $0x63,-0x18(%rbp)
movl   $0x63,-0x1c(%rbp)
cmpl   $0x1,-0x14(%rbp)
je     1172 <main+0x62>
mov    $0x0,%al
call   1030 <abort@plt>
cmpl   $0x2a,-0x18(%rbp)
je     1183 <main+0x73>
mov    $0x0,%al
call   1030 <abort@plt>
cmpl   $0x63,-0x1c(%rbp)
je     1194 <main+0x84>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
store i32 42, i32* %7
store i32 1, i32* %8
store i32 99, i32* %6
%9 = load i32, i32* %7
%10 = icmp ne i32 %9, 42
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %2
store i32 99, i32* %7
store i32 99, i32* %8
%14 = load i32, i32* %6
%15 = icmp ne i32 %14, 1
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = call i32 (...) @abort()
unreachable
18: ; preds = %13
%19 = load i32, i32* %7
%20 = icmp ne i32 %19, 42
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = call i32 (...) @abort()
unreachable
23: ; preds = %18
%24 = load i32, i32* %8
%25 = icmp ne i32 %24, 99
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = call i32 (...) @abort()
unreachable
28: ; preds = %23
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @abort()
unreachable
}
int kfd_iommu_add_perf_counters(struct kfd_topology_device *kdev) { return 0; }


x86 assembly (clang, -O0):
<kfd_iommu_add_perf_counters>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kfd_iommu_add_perf_counters>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.kfd_topology_device = type opaque
define i32 @kfd_iommu_add_perf_counters(%struct.kfd_topology_device* %0) {
%2 = alloca %struct.kfd_topology_device*
store %struct.kfd_topology_device* %0, %struct.kfd_topology_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.kfd_topology_device = type opaque
define i32 @kfd_iommu_add_perf_counters(%struct.kfd_topology_device* nocapture readnone %0) {
ret i32 0
}
struct device_node *of_get_child_by_name(const struct device_node *node,
                                         const char *name) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<of_get_child_by_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_get_child_by_name>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device_node = type opaque
define %struct.device_node* @of_get_child_by_name(%struct.device_node* %0, i8* %1) {
%3 = alloca %struct.device_node*
%4 = alloca i8*
store %struct.device_node* %0, %struct.device_node** %3
store i8* %1, i8** %4
ret %struct.device_node* null
}

LLVM IR (-O2):
%struct.device_node = type opaque
define noalias %struct.device_node* @of_get_child_by_name(%struct.device_node* nocapture readnone %0, i8* nocapture readnone %1) {
ret %struct.device_node* null
}
/* Variables and functions */
int /*<<< orphan*/ iParseToTrace(int, int, unsigned char *, int, int,
                                 int /*<<< orphan*/);
void vTraceWriteStruct(int iTraceType, int iInfoType, unsigned char *psInfo,
                       int iInfoLen, int iIndent) {
  iParseToTrace(iTraceType, iInfoType, psInfo, iInfoLen, iIndent, 0);
}


x86 assembly (clang, -O0):
<vTraceWriteStruct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
xor    %r9d,%r9d
call   1030 <iParseToTrace@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vTraceWriteStruct>:
xor    %r9d,%r9d
jmp    1030 <iParseToTrace@plt>

LLVM IR (-O0):
define void @vTraceWriteStruct(i32 %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @iParseToTrace(i32 %11, i32 %12, i8* %13, i32 %14, i32 %15, i32 0)
ret void
}

LLVM IR (-O2):
define void @vTraceWriteStruct(i32 %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @iParseToTrace(i32 %0, i32 %1, i8* %2, i32 %3, i32 %4, i32 0)
ret void
}
/* Variables and functions */
char detab();
main() {
  char i;
  i = detab();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <detab@plt>
mov    %al,-0x5(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <detab@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call signext i8 (...) @detab()
store i8 %3, i8* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call signext i8 (...) @detab()
ret i32 0
}
double *point(double x, double y, double *s) {
  s[0] = x;
  s[1] = y;
  return s;
}


x86 assembly (clang, -O0):
<point>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<point>:
mov    %rdi,%rax
movsd  %xmm0,(%rdi)
movsd  %xmm1,0x8(%rdi)
ret

LLVM IR (-O0):
define double* @point(double %0, double %1, double* %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double*
store double %0, double* %4
store double %1, double* %5
store double* %2, double** %6
%7 = load double, double* %4
%8 = load double*, double** %6
%9 = getelementptr inbounds double, double* %8, i64 0
store double %7, double* %9
%10 = load double, double* %5
%11 = load double*, double** %6
%12 = getelementptr inbounds double, double* %11, i64 1
store double %10, double* %12
%13 = load double*, double** %6
ret double* %13
}

LLVM IR (-O2):
define double* @point(double %0, double %1, double* returned writeonly %2) {
store double %0, double* %2
%4 = getelementptr inbounds double, double* %2, i64 1
store double %1, double* %4
ret double* %2
}
void pthread_rwlock_timedwrlock() {}


x86 assembly (clang, -O0):
<pthread_rwlock_timedwrlock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_rwlock_timedwrlock>:
ret

LLVM IR (-O0):
define void @pthread_rwlock_timedwrlock() {
ret void
}

LLVM IR (-O2):
define void @pthread_rwlock_timedwrlock() {
ret void
}
void RefBuffer_SaveConfig(void) {}


x86 assembly (clang, -O0):
<RefBuffer_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RefBuffer_SaveConfig>:
ret

LLVM IR (-O0):
define void @RefBuffer_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @RefBuffer_SaveConfig() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int int64_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t __SMMLA(int32_t x, int32_t y, int32_t sum) {
  return (uint32_t)((int32_t)((int64_t)((int64_t)x * (int64_t)y) >> 32) + sum);
}


x86 assembly (clang, -O0):
<__SMMLA>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
imul   %ecx,%eax
mov    $0x20,%ecx
sar    %cl,%eax
cltq
add    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__SMMLA>:
ret

LLVM IR (-O0):
define i32 @__SMMLA(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = load i64, i64* %5
%10 = trunc i64 %9 to i32
%11 = mul nsw i32 %8, %10
%12 = ashr i32 %11, 32
%13 = sext i32 %12 to i64
%14 = load i64, i64* %6
%15 = add nsw i64 %13, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @__SMMLA(i64 %0, i64 %1, i64 %2) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ __console_tx_hex8(unsigned char);
void print_warning_hex8(unsigned char value) { __console_tx_hex8(value); }


x86 assembly (clang, -O0):
<print_warning_hex8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <__console_tx_hex8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_warning_hex8>:
jmp    1030 <__console_tx_hex8@plt>

LLVM IR (-O0):
define void @print_warning_hex8(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @__console_tx_hex8(i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @print_warning_hex8(i8 zeroext %0) {
%2 = tail call i32 @__console_tx_hex8(i8 zeroext %0)
ret void
}