xunge/DecIR huggingface dataset:
void vecadd(float t[], float u[], float v[]) {
  t[0] = u[0] + v[0];
  t[1] = u[1] + v[1];
  t[2] = u[2] + v[2];
}


x86 assembly (clang, -O0):
<vecadd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vecadd>:
movss  (%rsi),%xmm0
addss  (%rdx),%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
addss  0x4(%rdx),%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
addss  0x8(%rdx),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @vecadd(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %6
%11 = getelementptr inbounds float, float* %10, i64 0
%12 = load float, float* %11
%13 = fadd float %9, %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 0
store float %13, float* %15
%16 = load float*, float** %5
%17 = getelementptr inbounds float, float* %16, i64 1
%18 = load float, float* %17
%19 = load float*, float** %6
%20 = getelementptr inbounds float, float* %19, i64 1
%21 = load float, float* %20
%22 = fadd float %18, %21
%23 = load float*, float** %4
%24 = getelementptr inbounds float, float* %23, i64 1
store float %22, float* %24
%25 = load float*, float** %5
%26 = getelementptr inbounds float, float* %25, i64 2
%27 = load float, float* %26
%28 = load float*, float** %6
%29 = getelementptr inbounds float, float* %28, i64 2
%30 = load float, float* %29
%31 = fadd float %27, %30
%32 = load float*, float** %4
%33 = getelementptr inbounds float, float* %32, i64 2
store float %31, float* %33
ret void
}

LLVM IR (-O2):
define void @vecadd(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fadd float %4, %5
store float %6, float* %0
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %2, i64 1
%10 = load float, float* %9
%11 = fadd float %8, %10
%12 = getelementptr inbounds float, float* %0, i64 1
store float %11, float* %12
%13 = getelementptr inbounds float, float* %1, i64 2
%14 = load float, float* %13
%15 = getelementptr inbounds float, float* %2, i64 2
%16 = load float, float* %15
%17 = fadd float %14, %16
%18 = getelementptr inbounds float, float* %0, i64 2
store float %17, float* %18
ret void
}
void free_attr_list(const char **list) {
  int i = 0;
  if (!list)
    return;
  while (list[i]) {
    SAFE_FREE(list[i]);
    i += 1;
  }
  SAFE_FREE(list);
}


x86 assembly (clang, -O0):
<free_attr_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1133 <free_attr_list+0x23>
jmp    1177 <free_attr_list+0x67>
jmp    1138 <free_attr_list+0x28>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     116c <free_attr_list+0x5c>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    $0x0,%al
call   1030 <SAFE_FREE@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1138 <free_attr_list+0x28>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <SAFE_FREE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_attr_list>:
test   %rdi,%rdi
je     1154 <free_attr_list+0x44>
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1143 <free_attr_list+0x33>
lea    0x8(%r14),%rbx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <SAFE_FREE@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <free_attr_list+0x20>
mov    %r14,%rdi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <SAFE_FREE@plt>
ret

LLVM IR (-O0):
define void @free_attr_list(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
br label %27
7: ; preds = %1
br label %8
8: ; preds = %15, %7
%9 = load i8**, i8*** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8*, i8** %9, i64 %11
%13 = load i8*, i8** %12
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %24
15: ; preds = %8
%16 = load i8**, i8*** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
%21 = call i32 (i8*, ...) bitcast (i32 (...)* @SAFE_FREE to i32 (i8*, ...)*)(i8* %20)
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %8
24: ; preds = %8
%25 = load i8**, i8*** %2
%26 = call i32 (i8**, ...) bitcast (i32 (...)* @SAFE_FREE to i32 (i8**, ...)*)(i8** %25)
br label %27
27: ; preds = %24, %6
ret void
}

LLVM IR (-O2):
define void @free_attr_list(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %10, %6 ], [ 0, %3 ]
%8 = phi i8* [ %12, %6 ], [ %4, %3 ]
%9 = tail call i32 (i8*, ...) bitcast (i32 (...)* @SAFE_FREE to i32 (i8*, ...)*)(i8* %8)
%10 = add nuw i64 %7, 1
%11 = getelementptr inbounds i8*, i8** %0, i64 %10
%12 = load i8*, i8** %11
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %6
14: ; preds = %6, %3
%15 = tail call i32 (i8**, ...) bitcast (i32 (...)* @SAFE_FREE to i32 (i8**, ...)*)(i8** %0)
br label %16
16: ; preds = %1, %14
ret void
}
int ipmpar(int *i) {
  static int imach[11];
  imach[1] = 2;
  imach[2] = 31;
  imach[3] = 2147483647;
  imach[4] = 2;
  imach[5] = 24;
  imach[6] = -125;
  imach[7] = 128;
  imach[8] = 53;
  imach[9] = -1021;
  imach[10] = 1024;
  return imach[*i];
}


x86 assembly (clang, -O0):
<ipmpar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x2,0x2f22(%rip)
movl   $0x1f,0x2f1c(%rip)
movl   $0x7fffffff,0x2f16(%rip)
ff ff 7f
movl   $0x2,0x2f10(%rip)
movl   $0x18,0x2f0a(%rip)
movl   $0xffffff83,0x2f04(%rip)
ff ff ff
movl   $0x80,0x2efe(%rip)
movl   $0x35,0x2ef8(%rip)
movl   $0xfffffc03,0x2ef2(%rip)
fc ff ff
movl   $0x400,0x2eec(%rip)
mov    -0x8(%rbp),%rax
movslq (%rax),%rcx
lea    0x2eb6(%rip),%rax
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipmpar>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,0x2f26(%rip)
lea    0x2f1b(%rip),%rax
movaps 0xef4(%rip),%xmm0
movups %xmm0,0x2f21(%rip)
movabs $0x400fffffc03,%rcx
mov    %rcx,0x2f20(%rip)
movslq (%rdi),%rcx
mov    (%rax,%rcx,4),%eax
ret

LLVM IR (-O0):
@ipmpar.imach = internal global [11 x i32] zeroinitializer
define i32 @ipmpar(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
store i32 2, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 1)
store i32 31, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 2)
store i32 2147483647, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 3)
store i32 2, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 4)
store i32 24, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 5)
store i32 -125, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 6)
store i32 128, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 7)
store i32 53, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 8)
store i32 -1021, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 9)
store i32 1024, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 10)
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds [11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 %5
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
@ipmpar.imach = internal unnamed_addr global [11 x i32] zeroinitializer
define i32 @ipmpar(i32* nocapture %0) {
store <4 x i32> <i32 2, i32 31, i32 2147483647, i32 2>, <4 x i32>* bitcast (i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 1) to <4 x i32>*)
store <4 x i32> <i32 24, i32 -125, i32 128, i32 53>, <4 x i32>* bitcast (i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 5) to <4 x i32>*)
store i32 -1021, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 9)
store i32 1024, i32* getelementptr inbounds ([11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 10)
%2 = load i32, i32* %0
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds [11 x i32], [11 x i32]* @ipmpar.imach, i64 0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
void giveup_fpu(struct task_struct *t) {}


x86 assembly (clang, -O0):
<giveup_fpu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<giveup_fpu>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @giveup_fpu(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @giveup_fpu(%struct.task_struct* nocapture %0) {
ret void
}
/* Variables and functions */
int rom_present(char *);
int oti037c_available(void) {
  return (rom_present(L"roms/video/oti/bios.bin"));
}


x86 assembly (clang, -O0):
<oti037c_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<oti037c_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [24 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 111, i32 116, i32 105, i32 47, i32 98, i32 105, i32 111, i32 115, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @oti037c_available() {
%1 = call i32 @rom_present(i8* bitcast ([24 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [24 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 111, i32 116, i32 105, i32 47, i32 98, i32 105, i32 111, i32 115, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @oti037c_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([24 x i32]* @.str to i8*))
ret i32 %1
}
int indexOfRightChild(int index) { return 2 * index + 2; }


x86 assembly (clang, -O0):
<indexOfRightChild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indexOfRightChild>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @indexOfRightChild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @indexOfRightChild(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = add nsw i32 %2, 2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ print_usage(char *);
int /*<<< orphan*/ printf(char *, char *);
void unknown_option(char *unknown, char *prog_name) {
  printf("Unknown option: %s\n\n", unknown);
  print_usage(prog_name);
}


x86 assembly (clang, -O0):
<unknown_option>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1040 <print_usage@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unknown_option>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <print_usage@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Unknown option: %s\0A\0A\00"
define void @unknown_option(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @print_usage(i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Unknown option: %s\0A\0A\00"
define void @unknown_option(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @print_usage(i8* %1)
ret void
}
/* Variables and functions */
int ToHex(char);
int A2HexByte(char A1, char A2) {
  int HexByte;
  HexByte = 16 * ToHex(A1) + ToHex(A2);
  return HexByte;
}


x86 assembly (clang, -O0):
<A2HexByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <ToHex@plt>
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
movsbl -0x2(%rbp),%edi
call   1030 <ToHex@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<A2HexByte>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <ToHex@plt>
mov    %eax,%ebp
shl    $0x4,%ebp
mov    %ebx,%edi
call   1030 <ToHex@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @A2HexByte(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %3
%7 = call i32 @ToHex(i8 signext %6)
%8 = mul nsw i32 16, %7
%9 = load i8, i8* %4
%10 = call i32 @ToHex(i8 signext %9)
%11 = add nsw i32 %8, %10
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @A2HexByte(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @ToHex(i8 signext %0)
%4 = shl nsw i32 %3, 4
%5 = tail call i32 @ToHex(i8 signext %1)
%6 = add nsw i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  (void)fprintf(stderr,
                "usage: column [-tx] [-c columns] [-s sep] [file ...]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [54 x i8] c"usage: column [-tx] [-c columns] [-s sep] [file ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [54 x i8] c"usage: column [-tx] [-c columns] [-s sep] [file ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x16() {
  Assert_real((isgraph(22) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              115, ("isgraph should be 0 for 0x16"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x73,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x16>:
push   %rax
mov    $0x16,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x73,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x16\00"
define void @t_isgraph_0x16() {
%1 = call i64 @isgraph(i32 22)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x16\00"
define void @t_isgraph_0x16() {
%1 = tail call i64 @isgraph(i32 22)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef unsigned long long uint64_t;

/* Variables and functions */
uint64_t xscom_mangle_addr(uint64_t addr) {
  if (addr & (1ull << 63))
    addr |= (1ull << 59);
  return addr << 3;
}


x86 assembly (clang, -O0):
<xscom_mangle_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x8000000000000000,%rax
and    -0x8(%rbp),%rax
cmp    $0x0,%rax
je     1132 <xscom_mangle_addr+0x32>
movabs $0x800000000000000,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xscom_mangle_addr>:
lea    0x0(,%rdi,8),%rcx
movabs $0x4000000000000000,%rax
or     %rcx,%rax
test   %rdi,%rdi
cmovns %rcx,%rax
ret

LLVM IR (-O0):
define i64 @xscom_mangle_addr(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, -9223372036854775808
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i64, i64* %2
%8 = or i64 %7, 576460752303423488
store i64 %8, i64* %2
br label %9
9: ; preds = %6, %1
%10 = load i64, i64* %2
%11 = shl i64 %10, 3
ret i64 %11
}

LLVM IR (-O2):
define i64 @xscom_mangle_addr(i64 %0) {
%2 = icmp sgt i64 %0, -1
%3 = shl i64 %0, 3
%4 = or i64 %3, 4611686018427387904
%5 = select i1 %2, i64 %3, i64 %4
ret i64 %5
}
int test_imm_20uint8_mem(unsigned char *val) {
  return ((*val) & (0x20 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_20uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x20,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_20uint8_mem>:
testb  $0x20,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_20uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 32
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_20uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 32
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void rop3_173_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = S & *D;
  stk2 = T | stk3;
  stk1 = *D ^ stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_173_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_173_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
and    %sil,%cl
or     %cl,%dl
xor    %al,%dl
or     %sil,%dl
not    %dl
or     %cl,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_173_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = and i32 %11, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %6
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8*, i8** %4
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = load i8, i8* %8
%27 = zext i8 %26 to i32
%28 = xor i32 %25, %27
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = xor i32 %31, -1
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = xor i32 %37, -1
%39 = and i32 %35, %38
%40 = load i8*, i8** %4
%41 = load i8, i8* %40
%42 = zext i8 %41 to i32
%43 = load i8, i8* %5
%44 = zext i8 %43 to i32
%45 = and i32 %42, %44
%46 = or i32 %39, %45
%47 = trunc i32 %46 to i8
%48 = load i8*, i8** %4
store i8 %47, i8* %48
ret void
}

LLVM IR (-O2):
define void @rop3_173_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %1
%6 = or i8 %5, %2
%7 = xor i8 %6, %4
%8 = or i8 %7, %1
%9 = xor i8 %8, -1
%10 = or i8 %5, %9
store i8 %10, i8* %0
ret void
}
int metric_killing(int mu) {
  if (mu == 1)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<metric_killing>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <metric_killing+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1124 <metric_killing+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<metric_killing>:
xor    %eax,%eax
cmp    $0x1,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @metric_killing(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @metric_killing(i32 %0) {
%2 = icmp ne i32 %0, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int /*<<< orphan*/ scanf(char *, float *, float *);
int main() {
  float a, b;
  scanf("%f%f", &a, &b);
  printf("%.2f", a / b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
movss  -0x8(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
movss  0x4(%rsp),%xmm0
divss  (%rsp),%xmm0
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%f%f\00"
@.str.1 = [5 x i8] c"%.2f\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float* %2, float* %3)
%5 = load float, float* %2
%6 = load float, float* %3
%7 = fdiv float %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), float %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%f%f\00"
@.str.1 = [5 x i8] c"%.2f\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = bitcast float* %1 to i8*
%4 = bitcast float* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float* %1, float* %2)
%6 = load float, float* %1
%7 = load float, float* %2
%8 = fdiv float %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), float %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
char *get_ipcam_name(char *ipcam_name) {
  strncpy(ipcam_name, "ipcam_name_test", 32);
  return ipcam_name;
}


x86 assembly (clang, -O0):
<get_ipcam_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x20,%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ipcam_name>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
mov    $0x20,%edx
call   1030 <strncpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"ipcam_name_test\00"
define i8* @get_ipcam_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strncpy(i8* %3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 32)
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
@.str = [16 x i8] c"ipcam_name_test\00"
define i8* @get_ipcam_name(i8* returned %0) {
%2 = tail call i32 @strncpy(i8* %0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 32)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ acc_device_not_host;
int acc_on_device(int /*<<< orphan*/);
int main() {
  int dev;
#pragma acc parallel copyout(dev)
  { dev = acc_on_device(acc_device_not_host); }
  int expect = 1;
  return dev != expect;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <acc_on_device@plt>
mov    %eax,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <acc_on_device@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@acc_device_not_host = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* @acc_device_not_host
%5 = call i32 @acc_on_device(i32 %4)
store i32 %5, i32* %2
store i32 1, i32* %3
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = icmp ne i32 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@acc_device_not_host = global i32 0
define i32 @main() {
%1 = load i32, i32* @acc_device_not_host
%2 = tail call i32 @acc_on_device(i32 %1)
%3 = icmp ne i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int rand();
void _genRandom(int n, int *a) {
  int i;
  for (i = 0; i < n; ++i) {
    a[i] = rand();
  }
}


x86 assembly (clang, -O0):
<_genRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1154 <_genRandom+0x44>
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,%edx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <_genRandom+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_genRandom>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1144 <_genRandom+0x34>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <_genRandom+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @_genRandom(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
store i32 %11, i32* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @_genRandom(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = tail call i32 (...) @rand()
%9 = getelementptr inbounds i32, i32* %1, i64 %7
store i32 %8, i32* %9
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ foo();
void cbcondle(long a) {
  if (a <= 0)
    foo();
  bar();
}


x86 assembly (clang, -O0):
<cbcondle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jg     113e <cbcondle+0x1e>
mov    $0x0,%al
call   1040 <foo@plt>
mov    $0x0,%al
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbcondle>:
test   %rdi,%rdi
jle    112c <cbcondle+0xc>
xor    %eax,%eax
jmp    1030 <bar@plt>
push   %rax
xor    %eax,%eax
call   1040 <foo@plt>
add    $0x8,%rsp
xor    %eax,%eax
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @cbcondle(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sle i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @foo()
br label %7
7: ; preds = %5, %1
%8 = call i32 (...) @bar()
ret void
}

LLVM IR (-O2):
define void @cbcondle(i64 %0) {
%2 = icmp slt i64 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @foo()
br label %5
5: ; preds = %3, %1
%6 = tail call i32 (...) @bar()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ee_dump();
void dump_prom(void) { ee_dump(); }


x86 assembly (clang, -O0):
<dump_prom>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ee_dump@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_prom>:
xor    %eax,%eax
jmp    1030 <ee_dump@plt>

LLVM IR (-O0):
define void @dump_prom() {
%1 = call i32 (...) @ee_dump()
ret void
}

LLVM IR (-O2):
define void @dump_prom() {
%1 = tail call i32 (...) @ee_dump()
ret void
}
int databits_encode_ascii8(unsigned int *databits_outp, char char_out) {
  *databits_outp = char_out;
  return 1;
}


x86 assembly (clang, -O0):
<databits_encode_ascii8>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<databits_encode_ascii8>:
mov    %esi,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @databits_encode_ascii8(i32* %0, i8 signext %1) {
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = load i32*, i32** %3
store i32 %6, i32* %7
ret i32 1
}

LLVM IR (-O2):
define i32 @databits_encode_ascii8(i32* nocapture writeonly %0, i8 signext %1) {
%3 = sext i8 %1 to i32
store i32 %3, i32* %0
ret i32 1
}
/* Type definitions */
struct gsm0710_context {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct gsm0710_context *);
void gsm0710_context_free(struct gsm0710_context *ctx) { free(ctx); }


x86 assembly (clang, -O0):
<gsm0710_context_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsm0710_context_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.gsm0710_context = type { i32 }
define void @gsm0710_context_free(%struct.gsm0710_context* %0) {
%2 = alloca %struct.gsm0710_context*
store %struct.gsm0710_context* %0, %struct.gsm0710_context** %2
%3 = load %struct.gsm0710_context*, %struct.gsm0710_context** %2
%4 = call i32 @free(%struct.gsm0710_context* %3)
ret void
}

LLVM IR (-O2):
%struct.gsm0710_context = type { i32 }
define void @gsm0710_context_free(%struct.gsm0710_context* nocapture %0) {
%2 = tail call i32 @free(%struct.gsm0710_context* %0)
ret void
}
long syscall2(int op, unsigned int arg1, unsigned int arg2) {
  long ret;
  asm volatile("int $0xff"
               : "=a"(ret)
               : "0"(op), "d"(arg1), "c"(arg2)
               : "cc", "ebx", "edi", "esi", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<syscall2>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
int    $0xff
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall2>:
push   %rbx
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%eax
int    $0xff
pop    %rbx
ret

LLVM IR (-O0):
define i64 @syscall2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = zext i32 %8 to i64
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i64 asm sideeffect "int $$0xff", "={ax},0,{dx},{cx},~{cc},~{ebx},~{edi},~{esi},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %9, i32 %10, i32 %11)
store i64 %12, i64* %7
%13 = load i64, i64* %7
ret i64 %13
}

LLVM IR (-O2):
define i64 @syscall2(i32 %0, i32 %1, i32 %2) {
%4 = zext i32 %0 to i64
%5 = tail call i64 asm sideeffect "int $$0xff", "={ax},0,{dx},{cx},~{cc},~{ebx},~{edi},~{esi},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4, i32 %1, i32 %2)
ret i64 %5
}
char charat(int i) { return 'a' + i - 1; }


x86 assembly (clang, -O0):
<charat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x61,%eax
sub    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charat>:
lea    0x60(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @charat(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 97, %3
%5 = sub nsw i32 %4, 1
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @charat(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = add i8 %2, 96
ret i8 %3
}
void platformStartup(void) {}


x86 assembly (clang, -O0):
<platformStartup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platformStartup>:
ret

LLVM IR (-O0):
define void @platformStartup() {
ret void
}

LLVM IR (-O2):
define void @platformStartup() {
ret void
}
/* Variables and functions */
void cacheflush(void *p, size_t size) {}


x86 assembly (clang, -O0):
<cacheflush>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cacheflush>:
ret

LLVM IR (-O0):
define void @cacheflush(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @cacheflush(i8* nocapture %0, i64 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ int2bin(int, int *);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int num;
  int bin[30];
  printf("Please insert an unsigned int: ");
  scanf("%d", &num);
  int2bin(num, bin);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeb7(%rip),%rdi
call   1040 <printf@plt>
lea    0xecb(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
lea    -0x80(%rbp),%rsi
call   1030 <int2bin@plt>
xor    %eax,%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x88,%rsp
lea    0xec2(%rip),%rdi
call   1040 <printf@plt>
lea    0xed6(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
lea    0x10(%rsp),%rsi
call   1030 <int2bin@plt>
xor    %eax,%eax
add    $0x88,%rsp
ret

LLVM IR (-O0):
@.str = [32 x i8] c"Please insert an unsigned int: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [30 x i32]
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = getelementptr inbounds [30 x i32], [30 x i32]* %3, i64 0, i64 0
%8 = call i32 @int2bin(i32 %6, i32* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [32 x i8] c"Please insert an unsigned int: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [30 x i32]
%3 = bitcast i32* %1 to i8*
%4 = bitcast [30 x i32]* %2 to i8*
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%7 = load i32, i32* %1
%8 = getelementptr inbounds [30 x i32], [30 x i32]* %2, i64 0, i64 0
%9 = call i32 @int2bin(i32 %7, i32* %8)
ret i32 0
}
/* Variables and functions */
float __ocml_hypot_f32(float, float);
float hypotf(float x, float y) { return __ocml_hypot_f32(x, y); }


x86 assembly (clang, -O0):
<hypotf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__ocml_hypot_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hypotf>:
jmp    1030 <__ocml_hypot_f32@plt>

LLVM IR (-O0):
define float @hypotf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @__ocml_hypot_f32(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @hypotf(float %0, float %1) {
%3 = tail call float @__ocml_hypot_f32(float %0, float %1)
ret float %3
}
/* Variables and functions */
long randm_sub(long);
long randm(long n) {
  long i, max_i;
  max_i = randm_sub(3);
  for (i = 0; i < max_i; i++)
    randm_sub(n);
  return (randm_sub(n));
}


x86 assembly (clang, -O0):
<randm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3,%edi
call   1030 <randm_sub@plt>
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    115a <randm+0x4a>
mov    -0x8(%rbp),%rdi
call   1030 <randm_sub@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1132 <randm+0x22>
mov    -0x8(%rbp),%rdi
call   1030 <randm_sub@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randm>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x3,%edi
call   1030 <randm_sub@plt>
test   %rax,%rax
jle    113e <randm+0x2e>
mov    %rax,%rbx
nopl   0x0(%rax)
mov    %r14,%rdi
call   1030 <randm_sub@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <randm+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <randm_sub@plt>

LLVM IR (-O0):
define i64 @randm(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = call i64 @randm_sub(i64 3)
store i64 %5, i64* %4
store i64 0, i64* %3
br label %6
6: ; preds = %13, %1
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i64, i64* %2
%12 = call i64 @randm_sub(i64 %11)
br label %13
13: ; preds = %10
%14 = load i64, i64* %3
%15 = add nsw i64 %14, 1
store i64 %15, i64* %3
br label %6
16: ; preds = %6
%17 = load i64, i64* %2
%18 = call i64 @randm_sub(i64 %17)
ret i64 %18
}

LLVM IR (-O2):
define i64 @randm(i64 %0) {
%2 = tail call i64 @randm_sub(i64 3)
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i64 @randm_sub(i64 %0)
%7 = add nuw nsw i64 %5, 1
%8 = icmp eq i64 %7, %2
br i1 %8, label %9, label %4
9: ; preds = %4, %1
%10 = tail call i64 @randm_sub(i64 %0)
ret i64 %10
}
void ceph_fscache_invalidate(struct inode *inode) {}


x86 assembly (clang, -O0):
<ceph_fscache_invalidate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_fscache_invalidate>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @ceph_fscache_invalidate(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @ceph_fscache_invalidate(%struct.inode* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;
typedef scalar_t__ B;

/* Variables and functions */
uint64_t integerify(void *B, size_t r) {
  uint32_t *X = (void *)((uintptr_t)(B) + (2 * r - 1) * 64);
  return (((uint64_t)(X[13]) << 32) + X[0]);
}


x86 assembly (clang, -O0):
<integerify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x1,%rcx
sub    $0x1,%rcx
shl    $0x6,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x34(%rax),%eax
mov    $0x20,%ecx
shl    %cl,%eax
mov    -0x18(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<integerify>:
ret

LLVM IR (-O0):
define i32 @integerify(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %6 to i64
%8 = load i64, i64* %4
%9 = mul i64 2, %8
%10 = sub i64 %9, 1
%11 = mul i64 %10, 64
%12 = add i64 %7, %11
%13 = inttoptr i64 %12 to i8*
%14 = bitcast i8* %13 to i32*
store i32* %14, i32** %5
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 13
%17 = load i32, i32* %16
%18 = shl i32 %17, 32
%19 = load i32*, i32** %5
%20 = getelementptr inbounds i32, i32* %19, i64 0
%21 = load i32, i32* %20
%22 = add nsw i32 %18, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @integerify(i8* nocapture readnone %0, i64 %1) {
ret i32 poison
}
void __do_set_cmd_task_1(struct coprthr_event *ev1,
                         struct coprthr_kernel *krn1) {}


x86 assembly (clang, -O0):
<__do_set_cmd_task_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__do_set_cmd_task_1>:
ret

LLVM IR (-O0):
%struct.coprthr_event = type opaque
%struct.coprthr_kernel = type opaque
define void @__do_set_cmd_task_1(%struct.coprthr_event* %0, %struct.coprthr_kernel* %1) {
%3 = alloca %struct.coprthr_event*
%4 = alloca %struct.coprthr_kernel*
store %struct.coprthr_event* %0, %struct.coprthr_event** %3
store %struct.coprthr_kernel* %1, %struct.coprthr_kernel** %4
ret void
}

LLVM IR (-O2):
%struct.coprthr_event = type opaque
%struct.coprthr_kernel = type opaque
define void @__do_set_cmd_task_1(%struct.coprthr_event* nocapture %0, %struct.coprthr_kernel* nocapture %1) {
ret void
}
/* Type definitions */
struct Cyc_Absyn_Exp {
  int dummy;
};

/* Variables and functions */
struct Cyc_Absyn_Exp *Cyc_Absyn_prim2_exp(unsigned int, struct Cyc_Absyn_Exp *,
                                          struct Cyc_Absyn_Exp *, unsigned int);
struct Cyc_Absyn_Exp *Cyc_Absyn_ult_exp(struct Cyc_Absyn_Exp *e1,
                                        struct Cyc_Absyn_Exp *e2,
                                        unsigned loc) {
  struct Cyc_Absyn_Exp *_T0;
  _T0 = Cyc_Absyn_prim2_exp(23U, e1, e2, loc);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_Absyn_ult_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x17,%edi
call   1030 <Cyc_Absyn_prim2_exp@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyn_ult_exp>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x17,%edi
jmp    1030 <Cyc_Absyn_prim2_exp@plt>

LLVM IR (-O0):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Absyn_ult_exp(%struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2) {
%4 = alloca %struct.Cyc_Absyn_Exp*
%5 = alloca %struct.Cyc_Absyn_Exp*
%6 = alloca i32
%7 = alloca %struct.Cyc_Absyn_Exp*
store %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp** %4
store %struct.Cyc_Absyn_Exp* %1, %struct.Cyc_Absyn_Exp** %5
store i32 %2, i32* %6
%8 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %4
%9 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %5
%10 = load i32, i32* %6
%11 = call %struct.Cyc_Absyn_Exp* @Cyc_Absyn_prim2_exp(i32 23, %struct.Cyc_Absyn_Exp* %8, %struct.Cyc_Absyn_Exp* %9, i32 %10)
store %struct.Cyc_Absyn_Exp* %11, %struct.Cyc_Absyn_Exp** %7
%12 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %7
ret %struct.Cyc_Absyn_Exp* %12
}

LLVM IR (-O2):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Absyn_ult_exp(%struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2) {
%4 = tail call %struct.Cyc_Absyn_Exp* @Cyc_Absyn_prim2_exp(i32 23, %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2)
ret %struct.Cyc_Absyn_Exp* %4
}
float test_logbf(float x) { return __builtin_logbf(x); }


x86 assembly (clang, -O0):
<test_logbf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <logbf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_logbf>:
jmp    1030 <logbf@plt>

LLVM IR (-O0):
define float @test_logbf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @logbf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @test_logbf(float %0) {
%2 = tail call float @logbf(float %0)
ret float %2
}