xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ poe_iswhitespace(char);
int poe_isnotwhitespace(char c) { return !poe_iswhitespace(c); }


x86 assembly (clang, -O0):
<poe_isnotwhitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <poe_iswhitespace@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<poe_isnotwhitespace>:
push   %rax
call   1030 <poe_iswhitespace@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @poe_isnotwhitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @poe_iswhitespace(i8 signext %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @poe_isnotwhitespace(i8 signext %0) {
%2 = tail call i32 @poe_iswhitespace(i8 signext %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void os_setup_signal_handling(void) {}


x86 assembly (clang, -O0):
<os_setup_signal_handling>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_setup_signal_handling>:
ret

LLVM IR (-O0):
define void @os_setup_signal_handling() {
ret void
}

LLVM IR (-O2):
define void @os_setup_signal_handling() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *malloc(int);
int /*<<< orphan*/ my_fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void *my_malloc(int sz, const char *err_string) {
  void *p = malloc(sz);
  if (p == NULL) {
    my_fprintf(stderr, "-- malloc failure allocating %s\n", err_string);
    exit(1);
  }
  return p;
}


x86 assembly (clang, -O0):
<my_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1179 <my_malloc+0x49>
mov    0x2e83(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xe96(%rip),%rsi
call   1030 <my_fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_malloc>:
push   %rbx
mov    %rsi,%rbx
call   1040 <malloc@plt>
test   %rax,%rax
je     1140 <my_malloc+0x10>
pop    %rbx
ret
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
mov    %rbx,%rdx
call   1030 <my_fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [33 x i8] c"-- malloc failure allocating %s\0A\00"
define i8* @my_malloc(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = call i8* @malloc(i32 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = load i8*, i8** %4
%13 = call i32 @my_fprintf(i32 %11, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [33 x i8] c"-- malloc failure allocating %s\0A\00"
define noalias i8* @my_malloc(i32 %0, i8* %1) {
%3 = tail call i8* @malloc(i32 %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @my_fprintf(i32 %6, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %1)
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int N;
  scanf("%d", &N);
  printf("%d", N * N);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
imul   -0x8(%rbp),%esi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
imul   %esi,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usbInit();
void uartInit() { usbInit(); }


x86 assembly (clang, -O0):
<uartInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <usbInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uartInit>:
xor    %eax,%eax
jmp    1030 <usbInit@plt>

LLVM IR (-O0):
define void @uartInit() {
%1 = call i32 (...) @usbInit()
ret void
}

LLVM IR (-O2):
define void @uartInit() {
%1 = tail call i32 (...) @usbInit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ remove(char *);
void mba_test_cleanup(void) { remove("result_mba"); }


x86 assembly (clang, -O0):
<mba_test_cleanup>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <remove@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mba_test_cleanup>:
lea    0xee9(%rip),%rdi
jmp    1030 <remove@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"result_mba\00"
define void @mba_test_cleanup() {
%1 = call i32 @remove(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"result_mba\00"
define void @mba_test_cleanup() {
%1 = tail call i32 @remove(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct stat {
  scalar_t__ st_size;
};

/* Variables and functions */
scalar_t__ stat(char *, struct stat *);
int _is_file_size(char *pathname) {
  struct stat st;
  if (stat(pathname, &st) != 0)
    return 0;
  return st.st_size > 0 ? 1 : 0;
}


x86 assembly (clang, -O0):
<_is_file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
je     113f <_is_file_size+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1154 <_is_file_size+0x44>
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovg  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_file_size>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
sete   %al
cmpq   $0x0,(%rsp)
setg   %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i32 @_is_file_size(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %15
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i64, i64* %10
%12 = icmp sgt i64 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
store i32 %14, i32* %2
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i32 @_is_file_size(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = icmp sgt i64 %7, 0
%9 = select i1 %5, i1 %8, i1 false
%10 = zext i1 %9 to i32
ret i32 %10
}
char *langRomTypeMsxPrinter() { return "MSX Printer"; }


x86 assembly (clang, -O0):
<langRomTypeMsxPrinter>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeMsxPrinter>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"MSX Printer\00"
define i8* @langRomTypeMsxPrinter() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [12 x i8] c"MSX Printer\00"
define i8* @langRomTypeMsxPrinter() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}
int do_036() { return 36; }


x86 assembly (clang, -O0):
<do_036>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_036>:
mov    $0x24,%eax
ret

LLVM IR (-O0):
define i32 @do_036() {
ret i32 36
}

LLVM IR (-O2):
define i32 @do_036() {
ret i32 36
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint64_t vid_to_data_oid(uint32_t vid, uint64_t idx) {
  return ((uint64_t)vid << 32) | idx;
}


x86 assembly (clang, -O0):
<vid_to_data_oid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x20,%ecx
shl    %cl,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vid_to_data_oid>:
ret

LLVM IR (-O0):
define i32 @vid_to_data_oid(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 32
%8 = load i32, i32* %4
%9 = or i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @vid_to_data_oid(i64 %0, i32 %1) {
ret i32 poison
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, int);
void e_1_6() { printf("%d", getchar() != EOF); }


x86 assembly (clang, -O0):
<e_1_6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2eb6(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_1_6>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rcx
xor    %esi,%esi
cmp    (%rcx),%rax
setne  %sil
lea    0xec1(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@EOF = global i64 0
define void @e_1_6() {
%1 = call i64 (...) @getchar()
%2 = load i64, i64* @EOF
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@EOF = global i64 0
define void @e_1_6() {
%1 = tail call i64 (...) @getchar()
%2 = load i64, i64* @EOF
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
%5 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int is_palindrome_string(char *);
int snprintf(char *, int, char *, unsigned int);
int is_palindrome_number(unsigned int number) {
  char buffer[256] = {0x00};
  char pale_buffer[256] = {0x00};
  int len = 0;
  len = snprintf(buffer, sizeof(buffer) - 1, "%d", number);
  return is_palindrome_string(buffer);
}


x86 assembly (clang, -O0):
<is_palindrome_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x220,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x110(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1040 <memset@plt>
lea    -0x210(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1040 <memset@plt>
movl   $0x0,-0x214(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0xff,%esi
lea    0xe7c(%rip),%rdx
call   1030 <snprintf@plt>
mov    %eax,-0x214(%rbp)
lea    -0x110(%rbp),%rdi
call   1050 <is_palindrome_string@plt>
add    $0x220,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_palindrome_number>:
push   %rbx
sub    $0x100,%rsp
mov    %edi,%ecx
xorps  %xmm0,%xmm0
movaps %xmm0,0xf0(%rsp)
movaps %xmm0,0xe0(%rsp)
movaps %xmm0,0xd0(%rsp)
movaps %xmm0,0xc0(%rsp)
movaps %xmm0,0xb0(%rsp)
movaps %xmm0,0xa0(%rsp)
movaps %xmm0,0x90(%rsp)
movaps %xmm0,0x80(%rsp)
movaps %xmm0,0x70(%rsp)
movaps %xmm0,0x60(%rsp)
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
lea    0xe65(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xff,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <is_palindrome_string@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @is_palindrome_number(i32 %0) {
%2 = alloca i32
%3 = alloca [256 x i8]
%4 = alloca [256 x i8]
%5 = alloca i32
store i32 %0, i32* %2
%6 = bitcast [256 x i8]* %3 to i8*
%7 = bitcast [256 x i8]* %4 to i8*
store i32 0, i32* %5
%8 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%9 = load i32, i32* %2
%10 = call i32 @snprintf(i8* %8, i32 255, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
store i32 %10, i32* %5
%11 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%12 = call i32 @is_palindrome_string(i8* %11)
ret i32 %12
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @is_palindrome_number(i32 %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 255, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = call i32 @is_palindrome_string(i8* %3)
ret i32 %5
}
int __signbitl(long double x) { return __builtin_signbitl(x); }


x86 assembly (clang, -O0):
<__signbitl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
movzwl -0x8(%rbp),%eax
shr    $0xf,%rax
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__signbitl>:
movzwl 0x10(%rsp),%eax
shr    $0xf,%rax
ret

LLVM IR (-O0):
define i32 @__signbitl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = bitcast x86_fp80 %3 to i80
%5 = icmp slt i80 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @__signbitl(x86_fp80 %0) {
%2 = bitcast x86_fp80 %0 to i80
%3 = lshr i80 %2, 79
%4 = trunc i80 %3 to i32
ret i32 %4
}
int GenMaxLocalsSize(void) { return 0x7FFF; }


x86 assembly (clang, -O0):
<GenMaxLocalsSize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7fff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenMaxLocalsSize>:
mov    $0x7fff,%eax
ret

LLVM IR (-O0):
define i32 @GenMaxLocalsSize() {
ret i32 32767
}

LLVM IR (-O2):
define i32 @GenMaxLocalsSize() {
ret i32 32767
}
void test_instructions_to_string() {}


x86 assembly (clang, -O0):
<test_instructions_to_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_instructions_to_string>:
ret

LLVM IR (-O0):
define void @test_instructions_to_string() {
ret void
}

LLVM IR (-O2):
define void @test_instructions_to_string() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ zwave_sendClassCommand(unsigned int, int, int,
                                          unsigned char *, int);
void zwavecmd_scene_activation_set(unsigned int id, unsigned char scene) {
  unsigned char buf[6];
  buf[0] = scene;
  zwave_sendClassCommand(id, 0x2B, 0x01, buf, 1);
}


x86 assembly (clang, -O0):
<zwavecmd_scene_activation_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0xb(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xb(%rbp),%rcx
mov    $0x2b,%esi
mov    $0x1,%r8d
mov    %r8d,%edx
call   1030 <zwave_sendClassCommand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zwavecmd_scene_activation_set>:
push   %rax
mov    %sil,0x2(%rsp)
lea    0x2(%rsp),%rcx
mov    $0x2b,%esi
mov    $0x1,%edx
mov    $0x1,%r8d
call   1030 <zwave_sendClassCommand@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @zwavecmd_scene_activation_set(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca [6 x i8]
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = getelementptr inbounds [6 x i8], [6 x i8]* %5, i64 0, i64 0
store i8 %6, i8* %7
%8 = load i32, i32* %3
%9 = getelementptr inbounds [6 x i8], [6 x i8]* %5, i64 0, i64 0
%10 = call i32 @zwave_sendClassCommand(i32 %8, i32 43, i32 1, i8* %9, i32 1)
ret void
}

LLVM IR (-O2):
define void @zwavecmd_scene_activation_set(i32 %0, i8 zeroext %1) {
%3 = alloca [6 x i8]
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = call i32 @zwave_sendClassCommand(i32 %0, i32 43, i32 1, i8* %4, i32 1)
ret void
}
unsigned int netbas_system_call(int function_number, int p1, int p2, int p3,
                                int p4, int p5) {
  int return_value;
  __asm__ volatile("int $0x60"
                   : "=a"(return_value)
                   : "0"((long)(function_number)), "b"((long)(p1)),
                     "c"((long)(p2)), "d"((long)(p3)), "S"((long)(p4)),
                     "D"((long)(p5)));
  return return_value;
}


x86 assembly (clang, -O0):
<netbas_system_call>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
movslq -0xc(%rbp),%rax
movslq -0x10(%rbp),%rbx
movslq -0x14(%rbp),%rcx
movslq -0x18(%rbp),%rdx
movslq -0x1c(%rbp),%rsi
movslq -0x20(%rbp),%rdi
int    $0x60
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<netbas_system_call>:
push   %rbx
movslq %edi,%rax
movslq %esi,%rbx
movslq %edx,%r10
movslq %ecx,%rdx
movslq %r8d,%rsi
movslq %r9d,%rdi
mov    %r10,%rcx
int    $0x60
pop    %rbx
ret

LLVM IR (-O0):
define i32 @netbas_system_call(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = load i32, i32* %9
%19 = sext i32 %18 to i64
%20 = load i32, i32* %10
%21 = sext i32 %20 to i64
%22 = load i32, i32* %11
%23 = sext i32 %22 to i64
%24 = load i32, i32* %12
%25 = sext i32 %24 to i64
%26 = call i64 asm sideeffect "int $$0x60", "={ax},0,{bx},{cx},{dx},{si},{di},~{dirflag},~{fpsr},~{flags}"(i64 %15, i64 %17, i64 %19, i64 %21, i64 %23, i64 %25)
%27 = trunc i64 %26 to i32
store i32 %27, i32* %13
%28 = load i32, i32* %13
ret i32 %28
}

LLVM IR (-O2):
define i32 @netbas_system_call(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = sext i32 %0 to i64
%8 = sext i32 %1 to i64
%9 = sext i32 %2 to i64
%10 = sext i32 %3 to i64
%11 = sext i32 %4 to i64
%12 = sext i32 %5 to i64
%13 = tail call i64 asm sideeffect "int $$0x60", "={ax},0,{bx},{cx},{dx},{si},{di},~{dirflag},~{fpsr},~{flags}"(i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12)
%14 = trunc i64 %13 to i32
ret i32 %14
}
void *my_malloc(size, where)
unsigned size;
char *where;
{
  void *block;
  if ((block = malloc(size)) == 0)
    outofmemory(where);
  return block;
}


x86 assembly (clang, -O0):
<my_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1152 <my_malloc+0x32>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <outofmemory@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_malloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1140 <my_malloc+0x20>
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <outofmemory@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @my_malloc(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i32 (i8*, ...) bitcast (i32 (...)* @outofmemory to i32 (i8*, ...)*)(i8* %11)
br label %13
13: ; preds = %10, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define i8* @my_malloc(i32 %0, i8* %1) {
%3 = zext i32 %0 to i64
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (i8*, ...) bitcast (i32 (...)* @outofmemory to i32 (i8*, ...)*)(i8* %1)
br label %8
8: ; preds = %6, %2
ret i8* %4
}
/* Type definitions */
struct _Unwind_Exception {
  int dummy;
};

/* Variables and functions */
int __pnacl_eh_sjlj_Unwind_Resume_or_Rethrow(struct _Unwind_Exception *);
int _Unwind_Resume_or_Rethrow(struct _Unwind_Exception *exc) {
  return __pnacl_eh_sjlj_Unwind_Resume_or_Rethrow(exc);
}


x86 assembly (clang, -O0):
<_Unwind_Resume_or_Rethrow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__pnacl_eh_sjlj_Unwind_Resume_or_Rethrow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Unwind_Resume_or_Rethrow>:
jmp    1030 <__pnacl_eh_sjlj_Unwind_Resume_or_Rethrow@plt>

LLVM IR (-O0):
%struct._Unwind_Exception = type { i32 }
define i32 @_Unwind_Resume_or_Rethrow(%struct._Unwind_Exception* %0) {
%2 = alloca %struct._Unwind_Exception*
store %struct._Unwind_Exception* %0, %struct._Unwind_Exception** %2
%3 = load %struct._Unwind_Exception*, %struct._Unwind_Exception** %2
%4 = call i32 @__pnacl_eh_sjlj_Unwind_Resume_or_Rethrow(%struct._Unwind_Exception* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct._Unwind_Exception = type { i32 }
define i32 @_Unwind_Resume_or_Rethrow(%struct._Unwind_Exception* %0) {
%2 = tail call i32 @__pnacl_eh_sjlj_Unwind_Resume_or_Rethrow(%struct._Unwind_Exception* %0)
ret i32 %2
}
/* Variables and functions */
double BELLERO_getError();
int /*<<< orphan*/ printf(char *, double);
int main(int argc, const char *argv[]) {
  printf("MSE: %f", BELLERO_getError());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <BELLERO_getError@plt>
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <BELLERO_getError@plt>
lea    0xed1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"MSE: %f\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call double (...) @BELLERO_getError()
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"MSE: %f\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call double (...) @BELLERO_getError()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %3)
ret i32 0
}
/* Type definitions */
struct json_stream_t {
  int dummy;
};
struct json_parser_handler_t {
  int dummy;
};

/* Variables and functions */
int json_read_string_opt(struct json_stream_t *, struct json_parser_handler_t *,
                         int /*<<< orphan*/);
int json_read_string(struct json_stream_t *stream,
                     struct json_parser_handler_t *handler) {
  return json_read_string_opt(stream, handler, 0);
}


x86 assembly (clang, -O0):
<json_read_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <json_read_string_opt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_read_string>:
xor    %edx,%edx
jmp    1030 <json_read_string_opt@plt>

LLVM IR (-O0):
%struct.json_stream_t = type { i32 }
%struct.json_parser_handler_t = type { i32 }
define i32 @json_read_string(%struct.json_stream_t* %0, %struct.json_parser_handler_t* %1) {
%3 = alloca %struct.json_stream_t*
%4 = alloca %struct.json_parser_handler_t*
store %struct.json_stream_t* %0, %struct.json_stream_t** %3
store %struct.json_parser_handler_t* %1, %struct.json_parser_handler_t** %4
%5 = load %struct.json_stream_t*, %struct.json_stream_t** %3
%6 = load %struct.json_parser_handler_t*, %struct.json_parser_handler_t** %4
%7 = call i32 @json_read_string_opt(%struct.json_stream_t* %5, %struct.json_parser_handler_t* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
%struct.json_stream_t = type { i32 }
%struct.json_parser_handler_t = type { i32 }
define i32 @json_read_string(%struct.json_stream_t* %0, %struct.json_parser_handler_t* %1) {
%3 = tail call i32 @json_read_string_opt(%struct.json_stream_t* %0, %struct.json_parser_handler_t* %1, i32 0)
ret i32 %3
}
unsigned int cast_ulong_uint(unsigned long int x) { return (unsigned int)x; }


x86 assembly (clang, -O0):
<cast_ulong_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_ulong_uint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @cast_ulong_uint(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @cast_ulong_uint(i64 %0) {
%2 = trunc i64 %0 to i32
ret i32 %2
}
double radParam(double k) { return (2.7 * 2.33236e-008 * k); }


x86 assembly (clang, -O0):
<radParam>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radParam>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @radParam(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 0x3E70E78565ED171D, %3
ret double %4
}

LLVM IR (-O2):
define double @radParam(double %0) {
%2 = fmul double %0, 0x3E70E78565ED171D
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ write_instr(int);
void eval_div(void) { write_instr(0x13); }


x86 assembly (clang, -O0):
<eval_div>:
push   %rbp
mov    %rsp,%rbp
mov    $0x13,%edi
call   1030 <write_instr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_div>:
mov    $0x13,%edi
jmp    1030 <write_instr@plt>

LLVM IR (-O0):
define void @eval_div() {
%1 = call i32 @write_instr(i32 19)
ret void
}

LLVM IR (-O2):
define void @eval_div() {
%1 = tail call i32 @write_instr(i32 19)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GE2D_Done();
void DLLUnRegister() { GE2D_Done(); }


x86 assembly (clang, -O0):
<DLLUnRegister>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GE2D_Done@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DLLUnRegister>:
xor    %eax,%eax
jmp    1030 <GE2D_Done@plt>

LLVM IR (-O0):
define void @DLLUnRegister() {
%1 = call i32 (...) @GE2D_Done()
ret void
}

LLVM IR (-O2):
define void @DLLUnRegister() {
%1 = tail call i32 (...) @GE2D_Done()
ret void
}
const char *str_expr_cast() { return "cast"; }


x86 assembly (clang, -O0):
<str_expr_cast>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_expr_cast>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"cast\00"
define i8* @str_expr_cast() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"cast\00"
define i8* @str_expr_cast() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
int isc40(const unsigned char input) {
  if ((input >= '0' && input <= '9') || (input >= 'A' && input <= 'Z') ||
      input == ' ') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isc40>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <isc40+0x24>
movzbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    114b <isc40+0x4b>
movzbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     113e <isc40+0x3e>
movzbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jle    114b <isc40+0x4b>
movzbl -0x5(%rbp),%eax
cmp    $0x20,%eax
jne    1157 <isc40+0x57>
movl   $0x1,-0x4(%rbp)
jmp    115e <isc40+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isc40>:
lea    -0x30(%rdi),%ecx
mov    $0x1,%eax
cmp    $0xa,%cl
jb     1121 <isc40+0x21>
lea    -0x41(%rdi),%eax
cmp    $0x1a,%al
setb   %al
cmp    $0x20,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isc40(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %23, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %23, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = zext i8 %20 to i32
%22 = icmp eq i32 %21, 32
br i1 %22, label %23, label %24
23: ; preds = %19, %15, %7
store i32 1, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @isc40(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = add i8 %0, -65
%6 = icmp ult i8 %5, 26
%7 = icmp eq i8 %0, 32
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %4, %1
%11 = phi i32 [ 1, %1 ], [ %9, %4 ]
ret i32 %11
}
/* Type definitions */
struct ieeeSection {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ieee_write_byte(struct ieeeSection *, int);
void ieee_write_word(struct ieeeSection *seg, int data) {
  ieee_write_byte(seg, data & 0xFF);
  ieee_write_byte(seg, (data >> 8) & 0xFF);
}


x86 assembly (clang, -O0):
<ieee_write_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
and    $0xff,%esi
call   1030 <ieee_write_byte@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
sar    $0x8,%esi
and    $0xff,%esi
call   1030 <ieee_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee_write_word>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%eax
mov    %rdi,%rbx
movzbl %al,%esi
mov    %eax,%ebp
call   1030 <ieee_write_byte@plt>
mov    %ebp,%eax
movzbl %ah,%esi
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ieee_write_byte@plt>

LLVM IR (-O0):
%struct.ieeeSection = type { i32 }
define void @ieee_write_word(%struct.ieeeSection* %0, i32 %1) {
%3 = alloca %struct.ieeeSection*
%4 = alloca i32
store %struct.ieeeSection* %0, %struct.ieeeSection** %3
store i32 %1, i32* %4
%5 = load %struct.ieeeSection*, %struct.ieeeSection** %3
%6 = load i32, i32* %4
%7 = and i32 %6, 255
%8 = call i32 @ieee_write_byte(%struct.ieeeSection* %5, i32 %7)
%9 = load %struct.ieeeSection*, %struct.ieeeSection** %3
%10 = load i32, i32* %4
%11 = ashr i32 %10, 8
%12 = and i32 %11, 255
%13 = call i32 @ieee_write_byte(%struct.ieeeSection* %9, i32 %12)
ret void
}

LLVM IR (-O2):
%struct.ieeeSection = type { i32 }
define void @ieee_write_word(%struct.ieeeSection* %0, i32 %1) {
%3 = and i32 %1, 255
%4 = tail call i32 @ieee_write_byte(%struct.ieeeSection* %0, i32 %3)
%5 = lshr i32 %1, 8
%6 = and i32 %5, 255
%7 = tail call i32 @ieee_write_byte(%struct.ieeeSection* %0, i32 %6)
ret void
}
/* Variables and functions */
int COLOR_PAIR(int);
int rand();
int colorRandom() {
  switch (rand() % 3) {
  case 0:
    return COLOR_PAIR(1);
    break;
  case 1:
    return COLOR_PAIR(3);
    break;
  default:
    return COLOR_PAIR(4);
    break;
  }
}


x86 assembly (clang, -O0):
<colorRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1040 <rand@plt>
movslq %eax,%rcx
imul   $0x55555556,%rcx,%rdx
mov    %rdx,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
je     116c <colorRandom+0x4c>
jmp    115b <colorRandom+0x3b>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
je     117e <colorRandom+0x5e>
jmp    1190 <colorRandom+0x70>
mov    $0x1,%edi
call   1030 <COLOR_PAIR@plt>
mov    %eax,-0x4(%rbp)
jmp    119d <colorRandom+0x7d>
mov    $0x3,%edi
call   1030 <COLOR_PAIR@plt>
mov    %eax,-0x4(%rbp)
jmp    119d <colorRandom+0x7d>
mov    $0x4,%edi
call   1030 <COLOR_PAIR@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorRandom>:
push   %rax
xor    %eax,%eax
call   1040 <rand@plt>
cltq
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
mov    %eax,%edx
sub    %ecx,%edx
xor    %esi,%esi
cmp    $0x1,%edx
sete   %sil
mov    $0x4,%edx
sub    %esi,%edx
cmp    %ecx,%eax
mov    $0x1,%edi
cmovne %edx,%edi
pop    %rax
jmp    1030 <COLOR_PAIR@plt>

LLVM IR (-O0):
define i32 @colorRandom() {
%1 = alloca i32
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 3
switch i32 %3, label %8 [
i32 0, label %4
i32 1, label %6
]
4: ; preds = %0
%5 = call i32 @COLOR_PAIR(i32 1)
store i32 %5, i32* %1
br label %10
6: ; preds = %0
%7 = call i32 @COLOR_PAIR(i32 3)
store i32 %7, i32* %1
br label %10
8: ; preds = %0
%9 = call i32 @COLOR_PAIR(i32 4)
store i32 %9, i32* %1
br label %10
10: ; preds = %8, %6, %4
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @colorRandom() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 3
%3 = icmp eq i32 %2, 1
%4 = select i1 %3, i32 3, i32 4
%5 = icmp eq i32 %2, 0
%6 = select i1 %5, i32 1, i32 %4
%7 = tail call i32 @COLOR_PAIR(i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
scalar_t__ waitpid(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
void chldhandler(int sig) {
  while (waitpid(-1, NULL, WNOHANG) > 0)
    ;
}


x86 assembly (clang, -O0):
<chldhandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jle    1141 <chldhandler+0x31>
jmp    111b <chldhandler+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chldhandler>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    (%rbx),%edx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1030 <waitpid@plt>
test   %rax,%rax
jg     1120 <chldhandler+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define void @chldhandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* @WNOHANG
%5 = call i64 @waitpid(i32 -1, i32* null, i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define void @chldhandler(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load i32, i32* @WNOHANG
%4 = tail call i64 @waitpid(i32 -1, i32* null, i32 %3)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
ret void
}
double ConvertLatLonFromDegreestoDegreesMinutes(double PositionDegrees) {
  double Degrees = (int)PositionDegrees;
  double Minutes = PositionDegrees - Degrees;
  double DegreesMinutes = Minutes * 60 + (Degrees * 10 * 10);
  return DegreesMinutes;
}


x86 assembly (clang, -O0):
<ConvertLatLonFromDegreestoDegreesMinutes>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xed5(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xec8(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xeb4(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConvertLatLonFromDegreestoDegreesMinutes>:
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
subsd  %xmm1,%xmm0
movsd  0xeec(%rip),%xmm2
mulsd  %xmm2,%xmm1
mulsd  %xmm2,%xmm1
mulsd  0xee4(%rip),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @ConvertLatLonFromDegreestoDegreesMinutes(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %2
%6 = load double, double* %2
%7 = fptosi double %6 to i32
%8 = sitofp i32 %7 to double
store double %8, double* %3
%9 = load double, double* %2
%10 = load double, double* %3
%11 = fsub double %9, %10
store double %11, double* %4
%12 = load double, double* %4
%13 = load double, double* %3
%14 = fmul double %13, 1.000000e+01
%15 = fmul double %14, 1.000000e+01
%16 = call double @llvm.fmuladd.f64(double %12, double 6.000000e+01, double %15)
store double %16, double* %5
%17 = load double, double* %5
ret double %17
}

LLVM IR (-O2):
define double @ConvertLatLonFromDegreestoDegreesMinutes(double %0) {
%2 = fptosi double %0 to i32
%3 = sitofp i32 %2 to double
%4 = fsub double %0, %3
%5 = fmul double %3, 1.000000e+01
%6 = fmul double %5, 1.000000e+01
%7 = tail call double @llvm.fmuladd.f64(double %4, double 6.000000e+01, double %6)
ret double %7
}
int equiv(int i, int j) { return (i % 4) == (j % 4); }


x86 assembly (clang, -O0):
<equiv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    -0xc(%rbp),%edx
cmp    %eax,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<equiv>:
lea    0x3(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
and    $0xfffffffc,%eax
sub    %eax,%edi
lea    0x3(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
and    $0xfffffffc,%eax
sub    %eax,%esi
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @equiv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = srem i32 %5, 4
%7 = load i32, i32* %4
%8 = srem i32 %7, 4
%9 = icmp eq i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @equiv(i32 %0, i32 %1) {
%3 = srem i32 %0, 4
%4 = srem i32 %1, 4
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void setpinhiz() {
  (*(volatile unsigned long *)(0x3FFFC000 + 0x00)) &= ~(1 << 7);
}


x86 assembly (clang, -O0):
<setpinhiz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3fffc000,%eax
mov    (%rax),%rcx
and    $0xffffffffffffff7f,%rcx
mov    $0x3fffc000,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setpinhiz>:
andq   $0xffffffffffffff7f,0x3fffc000
3f 7f ff ff ff
ret

LLVM IR (-O0):
define void @setpinhiz() {
%1 = load volatile i64, i64* inttoptr (i64 1073725440 to i64*)
%2 = and i64 %1, -129
store volatile i64 %2, i64* inttoptr (i64 1073725440 to i64*)
ret void
}

LLVM IR (-O2):
define void @setpinhiz() {
%1 = load volatile i64, i64* inttoptr (i64 1073725440 to i64*)
%2 = and i64 %1, -129
store volatile i64 %2, i64* inttoptr (i64 1073725440 to i64*)
ret void
}
void sighandler(int sig) {}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
ret

LLVM IR (-O0):
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sighandler(i32 %0) {
ret void
}
unsigned short Color(int r, int g, int b) {
  return (b >> 3) + ((g >> 2) * 32) + ((r >> 3) * 2048);
}


x86 assembly (clang, -O0):
<Color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x3,%eax
mov    -0x8(%rbp),%ecx
sar    $0x2,%ecx
shl    $0x5,%ecx
add    %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x3,%ecx
shl    $0xb,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Color>:
shr    $0x3,%edx
and    $0x1ffc,%esi
shl    $0x8,%edi
and    $0xf800,%edi
lea    (%rdi,%rsi,8),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @Color(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = ashr i32 %7, 3
%9 = load i32, i32* %5
%10 = ashr i32 %9, 2
%11 = mul nsw i32 %10, 32
%12 = add nsw i32 %8, %11
%13 = load i32, i32* %4
%14 = ashr i32 %13, 3
%15 = mul nsw i32 %14, 2048
%16 = add nsw i32 %12, %15
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define zeroext i16 @Color(i32 %0, i32 %1, i32 %2) {
%4 = lshr i32 %2, 3
%5 = shl nsw i32 %1, 3
%6 = and i32 %5, 65504
%7 = shl nsw i32 %0, 8
%8 = and i32 %7, 63488
%9 = add nuw nsw i32 %6, %8
%10 = add nuw nsw i32 %9, %4
%11 = trunc i32 %10 to i16
ret i16 %11
}
void INT_Excep_TPU7_TGI7A(void) {}


x86 assembly (clang, -O0):
<INT_Excep_TPU7_TGI7A>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_TPU7_TGI7A>:
ret

LLVM IR (-O0):
define void @INT_Excep_TPU7_TGI7A() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_TPU7_TGI7A() {
ret void
}
void PDMCritSectTryEnterDebug(void) {}


x86 assembly (clang, -O0):
<PDMCritSectTryEnterDebug>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMCritSectTryEnterDebug>:
ret

LLVM IR (-O0):
define void @PDMCritSectTryEnterDebug() {
ret void
}

LLVM IR (-O2):
define void @PDMCritSectTryEnterDebug() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x41() {
  Assert_real((isascii(65)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              330, ("isascii should be 1 for A"));
}


x86 assembly (clang, -O0):
<t_isascii_0x41>:
push   %rbp
mov    %rsp,%rbp
mov    $0x41,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x14a,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x41>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x14a,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for A\00"
define void @t_isascii_0x41() {
%1 = call i32 @isascii(i32 65)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 330, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for A\00"
define void @t_isascii_0x41() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 330, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void divide(int *a, int low, int high) {
  if (low < high) {
    int mid = (low + high) / 2;
    divide(a, low, mid);
    divide(a, mid + 1, high);
    merge(a, low, mid, high);
  }
}


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <divide+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <divide@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <divide@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
cmp    %edx,%esi
jge    1172 <divide+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1030 <divide@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1030 <divide@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @divide(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @divide(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @divide(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @divide(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
incremento(void *arg) {}


x86 assembly (clang, -O0):
<incremento>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<incremento>:
ret

LLVM IR (-O0):
define i32 @incremento(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @incremento(i8* nocapture readnone %0) {
ret i32 undef
}