xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  if (sizeof(int) == 4)
    printf("#define SH_CELL 2\n");
  else if (sizeof(int) == 8)
    printf("#define SH_CELL 3\n");
  else
    printf(
        "#error \"What kind of machine are you running this on, anyway?\"\n");
  if ((-7 / 4) == -2)
    printf("#define HOST_DIVIDE_FLOORS\n");
  if (sizeof(int) != sizeof(void *))
    printf("#error \"Hmm. Pointer and int types are different sizes.\"\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeee(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"#define SH_CELL 2\0A\00"
@.str.1 = [58 x i8] c"#error \22Hmm. Pointer and int types are different sizes.\22\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [18 x i8] c"#define SH_CELL 2\00"
@str.2 = [57 x i8] c"#error \22Hmm. Pointer and int types are different sizes.\22\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([57 x i8], [57 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __svgalib_driver8p_getbox(int, int, int, int, void *, int);
void __svgalib_driver8p_getboxpart(int x, int y, int w, int h, int ow, int oh,
                                   void *b, int xo, int yo) {
  __svgalib_driver8p_getbox(x, y, w, h, b + yo * ow + xo, ow);
}


x86 assembly (clang, -O0):
<__svgalib_driver8p_getboxpart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    0x10(%rbp),%r8
mov    0x20(%rbp),%eax
imul   -0x14(%rbp),%eax
cltq
add    %rax,%r8
movslq 0x18(%rbp),%rax
add    %rax,%r8
mov    -0x14(%rbp),%r9d
call   1030 <__svgalib_driver8p_getbox@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_driver8p_getboxpart>:
mov    %r8d,%r9d
movslq 0x10(%rsp),%r10
mov    0x18(%rsp),%eax
imul   %r8d,%eax
movslq %eax,%r8
add    0x8(%rsp),%r8
add    %r10,%r8
jmp    1030 <__svgalib_driver8p_getbox@plt>

LLVM IR (-O0):
define void @__svgalib_driver8p_getboxpart(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8* %6, i32 %7, i32 %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i8*
%17 = alloca i32
%18 = alloca i32
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i32 %3, i32* %13
store i32 %4, i32* %14
store i32 %5, i32* %15
store i8* %6, i8** %16
store i32 %7, i32* %17
store i32 %8, i32* %18
%19 = load i32, i32* %10
%20 = load i32, i32* %11
%21 = load i32, i32* %12
%22 = load i32, i32* %13
%23 = load i8*, i8** %16
%24 = load i32, i32* %18
%25 = load i32, i32* %14
%26 = mul nsw i32 %24, %25
%27 = sext i32 %26 to i64
%28 = getelementptr i8, i8* %23, i64 %27
%29 = load i32, i32* %17
%30 = sext i32 %29 to i64
%31 = getelementptr i8, i8* %28, i64 %30
%32 = load i32, i32* %14
%33 = call i32 @__svgalib_driver8p_getbox(i32 %19, i32 %20, i32 %21, i32 %22, i8* %31, i32 %32)
ret void
}

LLVM IR (-O2):
define void @__svgalib_driver8p_getboxpart(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8* %6, i32 %7, i32 %8) {
%10 = mul nsw i32 %8, %4
%11 = sext i32 %10 to i64
%12 = getelementptr i8, i8* %6, i64 %11
%13 = sext i32 %7 to i64
%14 = getelementptr i8, i8* %12, i64 %13
%15 = tail call i32 @__svgalib_driver8p_getbox(i32 %0, i32 %1, i32 %2, i32 %3, i8* %14, i32 %4)
ret void
}
signed char signedchar_ignoring_signedshortint(signed char x,
                                               signed short int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedchar_ignoring_signedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedchar_ignoring_signedshortint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @signedchar_ignoring_signedshortint(i8 signext %0, i16 signext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @signedchar_ignoring_signedshortint(i8 returned signext %0, i16 signext %1) {
ret i8 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  int xyz = 11 / 10 / 9;
  printf("%d", xyz);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
void test1(void *dead) {
  sleep(1000000);
  printf("test1\n");
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xf4240,%edi
call   1040 <sleep@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
push   %rax
mov    $0xf4240,%edi
call   1040 <sleep@plt>
lea    0xece(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"test1\0A\00"
define void @test1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @sleep(i32 1000000)
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"test1\00"
define void @test1(i8* nocapture readnone %0) {
%2 = tail call i32 @sleep(i32 1000000)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
int main() {
  int j = 0;
  for (int i = 0; i < 20; ++i) {
    if (i < 10) {
      if (i < 5) {
        continue;
        j = 1;
      } else {
        j = 2;
      }
      j = 3;
      if (i < 7) {
        continue;
        j = 4;
      } else
        j = 5;
      j = 6;
    } else
      j = 7;
    j = 8;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x14,-0xc(%rbp)
jge    1188 <main+0x88>
cmpl   $0xa,-0xc(%rbp)
jge    116c <main+0x6c>
cmpl   $0x5,-0xc(%rbp)
jge    113c <main+0x3c>
jmp    117a <main+0x7a>
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0x8(%rbp)
cmpl   $0x7,-0xc(%rbp)
jge    1159 <main+0x59>
jmp    117a <main+0x7a>
movl   $0x5,-0x8(%rbp)
movl   $0x6,-0x8(%rbp)
jmp    1173 <main+0x73>
movl   $0x7,-0x8(%rbp)
movl   $0x8,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1119 <main+0x19>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %23, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 20
br i1 %6, label %7, label %26
7: ; preds = %4
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 10
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp slt i32 %11, 5
br i1 %12, label %13, label %14
13: ; preds = %10
br label %23
14: ; preds = %10
store i32 2, i32* %2
br label %15
15: ; preds = %14
store i32 3, i32* %2
%16 = load i32, i32* %3
%17 = icmp slt i32 %16, 7
br i1 %17, label %18, label %19
18: ; preds = %15
br label %23
19: ; preds = %15
store i32 5, i32* %2
br label %20
20: ; preds = %19
store i32 6, i32* %2
br label %22
21: ; preds = %7
store i32 7, i32* %2
br label %22
22: ; preds = %21, %20
store i32 8, i32* %2
br label %23
23: ; preds = %22, %18, %13
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 1
store i32 %25, i32* %3
br label %4
26: ; preds = %4
%27 = load i32, i32* %1
ret i32 %27
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void ARGBToRGB565DitherRow_Any_SSE2() {}


x86 assembly (clang, -O0):
<ARGBToRGB565DitherRow_Any_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToRGB565DitherRow_Any_SSE2>:
ret

LLVM IR (-O0):
define void @ARGBToRGB565DitherRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToRGB565DitherRow_Any_SSE2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
void error(const char *err) {
  perror(err);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1030 <perror@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @error(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADCClockConfigSet(uint32_t ui32Base, uint32_t ui32Config,
                       uint32_t ui32ClockDiv) {
  ;
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000FC4))) =
      (ui32Config >> 4) & 0x0000000F;
  (*((volatile uint32_t *)(ui32Base + 0x00000FC8))) =
      (ui32Config & 0x0000000F) | (((ui32ClockDiv - 1) << 4));
}


x86 assembly (clang, -O0):
<ADCClockConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
sar    $0x4,%ecx
and    $0xf,%ecx
mov    -0x4(%rbp),%eax
add    $0xfc4,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
and    $0xf,%ecx
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
shl    $0x4,%eax
or     %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0xfc8,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCClockConfigSet>:
mov    %esi,%eax
shr    $0x4,%eax
and    $0xf,%eax
movslq %edi,%rcx
mov    %eax,0xfc4(%rcx)
and    $0xf,%esi
shl    $0x4,%edx
lea    (%rdx,%rsi,1),%eax
add    $0xfffffff0,%eax
mov    %eax,0xfc8(%rcx)
ret

LLVM IR (-O0):
define void @ADCClockConfigSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = ashr i32 %7, 4
%9 = and i32 %8, 15
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 4036
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %9, i32* %13
%14 = load i32, i32* %5
%15 = and i32 %14, 15
%16 = load i32, i32* %6
%17 = sub nsw i32 %16, 1
%18 = shl i32 %17, 4
%19 = or i32 %15, %18
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 4040
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %19, i32* %23
ret void
}

LLVM IR (-O2):
define void @ADCClockConfigSet(i32 %0, i32 %1, i32 %2) {
%4 = lshr i32 %1, 4
%5 = and i32 %4, 15
%6 = add nsw i32 %0, 4036
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %5, i32* %8
%9 = and i32 %1, 15
%10 = shl i32 %2, 4
%11 = add i32 %10, -16
%12 = or i32 %11, %9
%13 = add nsw i32 %0, 4040
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
store volatile i32 %12, i32* %15
ret void
}
void av_sha_init() {}


x86 assembly (clang, -O0):
<av_sha_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_sha_init>:
ret

LLVM IR (-O0):
define void @av_sha_init() {
ret void
}

LLVM IR (-O2):
define void @av_sha_init() {
ret void
}
int add(int a, long b) { return 0; }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @add(i32 %0, i64 %1) {
ret i32 0
}
int generate_inputs(int *T) {}


x86 assembly (clang, -O0):
<generate_inputs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_inputs>:
ret

LLVM IR (-O0):
define i32 @generate_inputs(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @generate_inputs(i32* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t __USAT(uint32_t value, uint32_t sat) {
  uint32_t result;
  if ((((0xFFFFFFFF >> sat) << sat) & value) != 0) {
    result = 0xFFFFFFFF >> (32 - sat);
  } else {
    result = value;
  }
  return (result);
}


x86 assembly (clang, -O0):
<__USAT>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0xffffffff,%eax
shr    %cl,%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
and    -0x4(%rbp),%eax
cmp    $0x0,%eax
je     113c <__USAT+0x3c>
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
mov    $0xffffffff,%eax
shr    %cl,%eax
mov    %eax,-0xc(%rbp)
jmp    1142 <__USAT+0x42>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__USAT>:
mov    %esi,%ecx
mov    %edi,%edx
shr    %cl,%edx
neg    %cl
mov    $0xffffffff,%eax
shr    %cl,%eax
test   %edx,%edx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @__USAT(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = lshr i32 -1, %6
%8 = load i32, i32* %4
%9 = shl i32 %7, %8
%10 = load i32, i32* %3
%11 = and i32 %9, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i32, i32* %4
%15 = sub nsw i32 32, %14
%16 = lshr i32 -1, %15
store i32 %16, i32* %5
br label %19
17: ; preds = %2
%18 = load i32, i32* %3
store i32 %18, i32* %5
br label %19
19: ; preds = %17, %13
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @__USAT(i32 %0, i32 %1) {
%3 = shl nsw i32 -1, %1
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = sub nsw i32 32, %1
%7 = lshr i32 -1, %6
%8 = select i1 %5, i32 %0, i32 %7
ret i32 %8
}
/* Variables and functions */
scalar_t__ rand();
void loop_character_symbols_linear(char c) {
  for (; c < 'z';) {
    if (rand()) {
      c = 'a';
    }
  }
}


x86 assembly (clang, -O0):
<loop_character_symbols_linear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jge    1145 <loop_character_symbols_linear+0x35>
mov    $0x0,%al
call   1030 <rand@plt>
cmp    $0x0,%rax
je     1140 <loop_character_symbols_linear+0x30>
movb   $0x61,-0x1(%rbp)
jmp    111e <loop_character_symbols_linear+0xe>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop_character_symbols_linear>:
push   %rax
cmp    $0x79,%dil
jg     1129 <loop_character_symbols_linear+0x19>
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
jmp    1120 <loop_character_symbols_linear+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @loop_character_symbols_linear(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %11, %1
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp slt i32 %5, 122
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = call i64 (...) @rand()
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 97, i8* %2
br label %11
11: ; preds = %10, %7
br label %3
12: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @loop_character_symbols_linear(i8 signext %0) {
%2 = icmp slt i8 %0, 122
br i1 %2, label %3, label %5
3: ; preds = %1, %3
%4 = tail call i64 (...) @rand()
br label %3
5: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void rotate(uint8_t *in) {
  uint8_t temp;
  temp = in[0];
  in[0] = in[1];
  in[1] = in[2];
  in[2] = in[3];
  in[3] = temp;
}


x86 assembly (clang, -O0):
<rotate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate>:
movdqu (%rdi),%xmm0
pshufd $0x39,%xmm0,%xmm0
movdqu %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @rotate(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 %9, i32* %11
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 1
store i32 %14, i32* %16
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = load i32*, i32** %2
%21 = getelementptr inbounds i32, i32* %20, i64 2
store i32 %19, i32* %21
%22 = load i32, i32* %3
%23 = load i32*, i32** %2
%24 = getelementptr inbounds i32, i32* %23, i64 3
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @rotate(i32* nocapture %0) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2
%4 = shufflevector <4 x i32> %3, <4 x i32> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
%5 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> %4, <4 x i32>* %5
ret void
}
unsigned int sum3(unsigned int n) { return (n * (n + 1) >> 1); }


x86 assembly (clang, -O0):
<sum3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
shr    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum3>:
lea    0x1(%rdi),%eax
imul   %edi,%eax
shr    %eax
ret

LLVM IR (-O0):
define i32 @sum3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add i32 %4, 1
%6 = mul i32 %3, %5
%7 = lshr i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @sum3(i32 %0) {
%2 = add i32 %0, 1
%3 = mul i32 %2, %0
%4 = lshr i32 %3, 1
ret i32 %4
}
int test_imm_09int64_lowword_reg(long long val) {
  return ((val) & (0x09 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_09int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_09int64_lowword_reg>:
test   $0x9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_09int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 9
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_09int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 9
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void hieth_clk_dis(void) {}


x86 assembly (clang, -O0):
<hieth_clk_dis>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hieth_clk_dis>:
ret

LLVM IR (-O0):
define void @hieth_clk_dis() {
ret void
}

LLVM IR (-O2):
define void @hieth_clk_dis() {
ret void
}
/* Variables and functions */
void *calloc(int, size_t);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void *allocate_memory(size_t bytes) {
  void *ptr;
  if ((ptr = calloc(1, bytes)) == NULL) {
    printf("alloc memory error\n");
    exit(1);
  }
  return ptr;
}


x86 assembly (clang, -O0):
<allocate_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    116e <allocate_memory+0x3e>
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocate_memory>:
push   %rax
mov    %rdi,%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
test   %rax,%rax
je     1145 <allocate_memory+0x15>
pop    %rcx
ret
lea    0xeb4(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"alloc memory error\0A\00"
define i8* @allocate_memory(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @calloc(i32 1, i64 %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@str = [19 x i8] c"alloc memory error\00"
define i8* @allocate_memory(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret i8* %2
}
int is_it_in(int *list, int siz, int len) {
  int i;
  for (i = 0; i < len; i++) {
    if (list[i] == siz)
      return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<is_it_in>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1154 <is_it_in+0x54>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x14(%rbp),%eax
jne    1141 <is_it_in+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <is_it_in+0x5b>
jmp    1146 <is_it_in+0x46>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <is_it_in+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_it_in>:
test   %edx,%edx
jle    111e <is_it_in+0x1e>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %esi,(%rdi,%rcx,4)
je     1121 <is_it_in+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <is_it_in+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_it_in(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %6
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @is_it_in(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %1
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ write(int, unsigned char *, int);
void serialPutchar(int fd, unsigned char c) { write(fd, &c, 1); }


x86 assembly (clang, -O0):
<serialPutchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialPutchar>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @serialPutchar(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = call i32 @write(i32 %5, i8* %4, i32 1)
ret void
}

LLVM IR (-O2):
define void @serialPutchar(i32 %0, i8 zeroext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i32 @write(i32 %0, i8* %3, i32 1)
ret void
}
void handle_38(int sig) {}


x86 assembly (clang, -O0):
<handle_38>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_38>:
ret

LLVM IR (-O0):
define void @handle_38(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_38(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flyback();
int /*<<< orphan*/ hvflush();
int /*<<< orphan*/ printf(char *);
void dot(void) {
  hvflush();
  printf("\\&\\f1\\h'-.1m'\\v'.03m'\\s-3.\\s+3\\fP\n");
  flyback();
}


x86 assembly (clang, -O0):
<dot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <hvflush@plt>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1050 <flyback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot>:
push   %rax
xor    %eax,%eax
call   1040 <hvflush@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <flyback@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"\\&\\f1\\h'-.1m'\\v'.03m'\\s-3.\\s+3\\fP\0A\00"
define void @dot() {
%1 = call i32 (...) @hvflush()
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @flyback()
ret void
}

LLVM IR (-O2):
@str = [34 x i8] c"\\&\\f1\\h'-.1m'\\v'.03m'\\s-3.\\s+3\\fP\00"
define void @dot() {
%1 = tail call i32 (...) @hvflush()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @flyback()
ret void
}
void g_param_spec_param() {}


x86 assembly (clang, -O0):
<g_param_spec_param>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_param>:
ret

LLVM IR (-O0):
define void @g_param_spec_param() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_param() {
ret void
}
int __attribute__((nomips16)) f9(unsigned long long y) {
  return (char)((char)(y >> 61) + 1);
}


x86 assembly (clang, -O0):
<f9>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x3d,%rax
movsbl %al,%eax
add    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f9>:
shr    $0x3d,%rdi
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f9(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 61
%5 = trunc i64 %4 to i8
%6 = sext i8 %5 to i32
%7 = add nsw i32 %6, 1
%8 = trunc i32 %7 to i8
%9 = sext i8 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f9(i64 %0) {
%2 = lshr i64 %0, 61
%3 = trunc i64 %2 to i32
%4 = add nuw nsw i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int *malloc(int);
int *declareArray(int n) {
  int *x;
  x = malloc(n * (sizeof(int)));
  return x;
}


x86 assembly (clang, -O0):
<declareArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<declareArray>:
shl    $0x2,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @declareArray(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 4
%7 = trunc i64 %6 to i32
%8 = call i32* @malloc(i32 %7)
store i32* %8, i32** %3
%9 = load i32*, i32** %3
ret i32* %9
}

LLVM IR (-O2):
define noalias i32* @declareArray(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call i32* @malloc(i32 %2)
ret i32* %3
}
void __attribute__((constructor)) xxx(void) {
  extern void baz(void);
  baz();
}


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
call   1030 <baz@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
jmp    1030 <baz@plt>

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @xxx, i8* null }]
define void @xxx() {
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @xxx, i8* null }]
define void @xxx() {
tail call void @baz()
ret void
}
char GetEncoding10() { return 0xe8; }


x86 assembly (clang, -O0):
<GetEncoding10>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe8,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetEncoding10>:
mov    $0xe8,%al
ret

LLVM IR (-O0):
define signext i8 @GetEncoding10() {
ret i8 -24
}

LLVM IR (-O2):
define signext i8 @GetEncoding10() {
ret i8 -24
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XForceScreenSaver() {
  printf("XForceScreenSaver called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XForceScreenSaver>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XForceScreenSaver>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"XForceScreenSaver called\0A\00"
define i32 @XForceScreenSaver() {
%1 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"XForceScreenSaver called\00"
define i32 @XForceScreenSaver() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ switch_off_bits(unsigned char *, int);
void CTRL_REGSB_BITSET_clk_ctrl_off(unsigned char *data) {
  switch_off_bits(data, (0x80));
}


x86 assembly (clang, -O0):
<CTRL_REGSB_BITSET_clk_ctrl_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x80,%esi
call   1030 <switch_off_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CTRL_REGSB_BITSET_clk_ctrl_off>:
mov    $0x80,%esi
jmp    1030 <switch_off_bits@plt>

LLVM IR (-O0):
define void @CTRL_REGSB_BITSET_clk_ctrl_off(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @switch_off_bits(i8* %3, i32 128)
ret void
}

LLVM IR (-O2):
define void @CTRL_REGSB_BITSET_clk_ctrl_off(i8* %0) {
%2 = tail call i32 @switch_off_bits(i8* %0, i32 128)
ret void
}
/* Variables and functions */
int create_srv_sock(char *, int);
int /*<<< orphan*/ handle_sockets(int);
int main() {
  int sock;
  sock = create_srv_sock("127.0.0.1", 4444);
  handle_sockets(sock);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x115c,%esi
call   1040 <create_srv_sock@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <handle_sockets@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x115c,%esi
call   1040 <create_srv_sock@plt>
mov    %eax,%edi
call   1030 <handle_sockets@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"127.0.0.1\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @create_srv_sock(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 4444)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @handle_sockets(i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"127.0.0.1\00"
define i32 @main() {
%1 = tail call i32 @create_srv_sock(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 4444)
%2 = tail call i32 @handle_sockets(i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ execl(char *, char *, int /*<<< orphan*/ *);
void *e() { execl("/usr/ls", "-a", NULL); }


x86 assembly (clang, -O0):
<e>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
lea    0xee2(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <execl@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e>:
lea    0xee9(%rip),%rdi
lea    0xeea(%rip),%rsi
xor    %edx,%edx
jmp    1030 <execl@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"/usr/ls\00"
@.str.1 = [3 x i8] c"-a\00"
define i8* @e() {
%1 = alloca i8*
%2 = call i32 @execl(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* null)
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
@.str = [8 x i8] c"/usr/ls\00"
@.str.1 = [3 x i8] c"-a\00"
define noalias i8* @e() {
%1 = tail call i32 @execl(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ cfg_get(char *);
int file_load_from_dir(int /*<<< orphan*/, char const *);
int file_load_from_include_dir(const char *fname) {
  return file_load_from_dir(cfg_get("include-dirname"), fname);
}


x86 assembly (clang, -O0):
<file_load_from_include_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <cfg_get@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1030 <file_load_from_dir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_load_from_include_dir>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <cfg_get@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <file_load_from_dir@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"include-dirname\00"
define i32 @file_load_from_include_dir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @cfg_get(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @file_load_from_dir(i32 %3, i8* %4)
ret i32 %5
}

LLVM IR (-O2):
@.str = [16 x i8] c"include-dirname\00"
define i32 @file_load_from_include_dir(i8* %0) {
%2 = tail call i32 @cfg_get(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @file_load_from_dir(i32 %2, i8* %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ emit_adc(int, int);
int /*<<< orphan*/ emit_sbb(int, int);
int /*<<< orphan*/ emit_shrimm(int, int, int);
void emit_subc(int s, int t, int sr) {
  emit_shrimm(sr, 1, sr);
  emit_sbb(s, t);
  emit_adc(sr, sr);
}


x86 assembly (clang, -O0):
<emit_subc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1040 <emit_shrimm@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <emit_sbb@plt>
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1050 <emit_adc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_subc>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%ebp
mov    %edx,%edi
mov    $0x1,%esi
call   1040 <emit_shrimm@plt>
mov    %ebp,%edi
mov    %r14d,%esi
call   1030 <emit_sbb@plt>
mov    %ebx,%edi
mov    %ebx,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <emit_adc@plt>

LLVM IR (-O0):
define void @emit_subc(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @emit_shrimm(i32 %7, i32 1, i32 %8)
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = call i32 @emit_sbb(i32 %10, i32 %11)
%13 = load i32, i32* %6
%14 = load i32, i32* %6
%15 = call i32 @emit_adc(i32 %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @emit_subc(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @emit_shrimm(i32 %2, i32 1, i32 %2)
%5 = tail call i32 @emit_sbb(i32 %0, i32 %1)
%6 = tail call i32 @emit_adc(i32 %2, i32 %2)
ret void
}
void gdk_overlap_type_get_type() {}


x86 assembly (clang, -O0):
<gdk_overlap_type_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_overlap_type_get_type>:
ret

LLVM IR (-O0):
define void @gdk_overlap_type_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_overlap_type_get_type() {
ret void
}
unsigned long long hex_val(char c) {
  if ('a' <= c && c <= 'f') {
    return c - 'a' + 10;
  } else if ('A' <= c && c <= 'F') {
    return c - 'A' + 10;
  }
  return c - '0';
}


x86 assembly (clang, -O0):
<hex_val>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     113d <hex_val+0x3d>
movsbl -0x9(%rbp),%eax
cmp    $0x66,%eax
jg     113d <hex_val+0x3d>
movsbl -0x9(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
cltq
mov    %rax,-0x8(%rbp)
jmp    1182 <hex_val+0x82>
movsbl -0x9(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     1170 <hex_val+0x70>
movsbl -0x9(%rbp),%eax
cmp    $0x46,%eax
jg     1170 <hex_val+0x70>
movsbl -0x9(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
cltq
mov    %rax,-0x8(%rbp)
jmp    1182 <hex_val+0x82>
jmp    1175 <hex_val+0x75>
movsbl -0x9(%rbp),%eax
sub    $0x30,%eax
cltq
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex_val>:
mov    %edi,%eax
lea    -0x61(%rax),%ecx
cmp    $0x5,%cl
ja     110e <hex_val+0xe>
add    $0xffffffa9,%eax
ret
lea    -0x41(%rax),%ecx
cmp    $0x5,%cl
ja     111a <hex_val+0x1a>
add    $0xffffffc9,%eax
ret
add    $0xffffffd0,%eax
cltq
ret

LLVM IR (-O0):
define i64 @hex_val(i8 signext %0) {
%2 = alloca i64
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sle i32 97, %5
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 102
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 97
%15 = add nsw i32 %14, 10
%16 = sext i32 %15 to i64
store i64 %16, i64* %2
br label %37
17: ; preds = %7, %1
%18 = load i8, i8* %3
%19 = sext i8 %18 to i32
%20 = icmp sle i32 65, %19
br i1 %20, label %21, label %31
21: ; preds = %17
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp sle i32 %23, 70
br i1 %24, label %25, label %31
25: ; preds = %21
%26 = load i8, i8* %3
%27 = sext i8 %26 to i32
%28 = sub nsw i32 %27, 65
%29 = add nsw i32 %28, 10
%30 = sext i32 %29 to i64
store i64 %30, i64* %2
br label %37
31: ; preds = %21, %17
br label %32
32: ; preds = %31
%33 = load i8, i8* %3
%34 = sext i8 %33 to i32
%35 = sub nsw i32 %34, 48
%36 = sext i32 %35 to i64
store i64 %36, i64* %2
br label %37
37: ; preds = %32, %25, %11
%38 = load i64, i64* %2
ret i64 %38
}

LLVM IR (-O2):
define i64 @hex_val(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -97
%4 = icmp ult i8 %3, 6
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = add nsw i32 %2, -87
%7 = zext i32 %6 to i64
br label %17
8: ; preds = %1
%9 = add i8 %0, -65
%10 = icmp ult i8 %9, 6
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = add nsw i32 %2, -55
%13 = zext i32 %12 to i64
br label %17
14: ; preds = %8
%15 = add nsw i32 %2, -48
%16 = sext i32 %15 to i64
br label %17
17: ; preds = %14, %11, %5
%18 = phi i64 [ %7, %5 ], [ %13, %11 ], [ %16, %14 ]
ret i64 %18
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
scalar_t__ rec_insert(void *, char *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ test_dump(void *);
int insert(void *ds, char *k, int v, FILE *output) {
  ds = (void *)rec_insert(ds, k, v, output);
  if (0) {
    printf("inserted %s into tree at %p\n", k, (void *)ds);
    printf("complete tree so far:\n");
    test_dump(ds);
    printf("\n");
  }
  return (0 == 0);
}


x86 assembly (clang, -O0):
<insert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1030 <rec_insert@plt>
mov    %rax,-0x8(%rbp)
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert>:
push   %rax
call   1030 <rec_insert@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @insert(i8* %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32*, i32** %8
%13 = call i64 @rec_insert(i8* %9, i8* %10, i32 %11, i32* %12)
%14 = inttoptr i64 %13 to i8*
store i8* %14, i8** %5
ret i32 1
}

LLVM IR (-O2):
define i32 @insert(i8* %0, i8* %1, i32 %2, i32* %3) {
%5 = tail call i64 @rec_insert(i8* %0, i8* %1, i32 %2, i32* %3)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ task1();
int /*<<< orphan*/ task2();
int /*<<< orphan*/ task3();
int main() {
  while (1) {
    task1();
    task2();
    task3();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <task1@plt>
mov    $0x0,%al
call   1030 <task2@plt>
mov    $0x0,%al
call   1040 <task3@plt>
jmp    113f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <task1@plt>
xor    %eax,%eax
call   1030 <task2@plt>
xor    %eax,%eax
call   1040 <task3@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 (...) @task1()
%4 = call i32 (...) @task2()
%5 = call i32 (...) @task3()
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @task1()
%3 = tail call i32 (...) @task2()
%4 = tail call i32 (...) @task3()
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int setuid(uid_t __attribute__((unused)) uid) { return 0; }


x86 assembly (clang, -O0):
<setuid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @setuid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @setuid(i32 %0) {
ret i32 0
}
main(j) { printf(j = "main(j){printf(j=%c%s%c,34,j,34);}", 34, j, 34); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xed1(%rip),%rax
movslq %eax,%rdi
mov    $0x22,%ecx
mov    %ecx,%esi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rax
movslq %eax,%rdi
mov    $0x22,%esi
mov    %edi,%edx
mov    $0x22,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"main(j){printf(j=%c%s%c,34,j,34);}\00"
define i32 @main(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store i32 ptrtoint ([35 x i8]* @.str to i32), i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* inttoptr (i64 sext (i32 ptrtoint ([35 x i8]* @.str to i32) to i64) to i8*), i32 34, i32 %3, i32 34)
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"main(j){printf(j=%c%s%c,34,j,34);}\00"
define i32 @main(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) inttoptr (i64 sext (i32 ptrtoint ([35 x i8]* @.str to i32) to i64) to i8*), i32 34, i32 ptrtoint ([35 x i8]* @.str to i32), i32 34)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ mangle_double(char *, int);
int /*<<< orphan*/ mangle_reverse(char *, int);
int mangle_reflect(char arr[64], int arr_len) {
  if ((arr_len * 2) >= 64)
    return (arr_len);
  mangle_double(arr, arr_len);
  mangle_reverse(arr + arr_len, arr_len);
  return (arr_len * 2);
}


x86 assembly (clang, -O0):
<mangle_reflect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
cmp    $0x40,%eax
jl     1149 <mangle_reflect+0x29>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1171 <mangle_reflect+0x51>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <mangle_double@plt>
mov    -0x10(%rbp),%rdi
movslq -0x14(%rbp),%rax
add    %rax,%rdi
mov    -0x14(%rbp),%esi
call   1040 <mangle_reverse@plt>
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mangle_reflect>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
cmp    $0x1f,%esi
jg     1147 <mangle_reflect+0x27>
mov    %rdi,%r14
lea    (%rbx,%rbx,1),%ebp
mov    %ebx,%esi
call   1030 <mangle_double@plt>
movslq %ebx,%rdi
add    %r14,%rdi
mov    %ebx,%esi
call   1040 <mangle_reverse@plt>
mov    %ebp,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mangle_reflect(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = mul nsw i32 %6, 2
%8 = icmp sge i32 %7, 64
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %23
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = load i32, i32* %5
%14 = call i32 @mangle_double(i8* %12, i32 %13)
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i32, i32* %5
%20 = call i32 @mangle_reverse(i8* %18, i32 %19)
%21 = load i32, i32* %5
%22 = mul nsw i32 %21, 2
store i32 %22, i32* %3
br label %23
23: ; preds = %11, %9
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @mangle_reflect(i8* %0, i32 %1) {
%3 = icmp sgt i32 %1, 31
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = shl nsw i32 %1, 1
%6 = tail call i32 @mangle_double(i8* %0, i32 %1)
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = tail call i32 @mangle_reverse(i8* %8, i32 %1)
br label %10
10: ; preds = %2, %4
%11 = phi i32 [ %5, %4 ], [ %1, %2 ]
ret i32 %11
}