xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ v;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ _fwrite(unsigned long *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ *fdopen(int, char *);
void make_test_file(int fd) {
  unsigned long v;
  FILE *f = fdopen(fd, "wb");
  for (v = 0; v < 262144; v += sizeof(v))
    _fwrite(&v, sizeof(v), f);
}


x86 assembly (clang, -O0):
<make_test_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xecb(%rip),%rsi
call   1030 <fdopen@plt>
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x40000,-0x10(%rbp)
jae    1177 <make_test_file+0x57>
mov    -0x18(%rbp),%rdx
lea    -0x10(%rbp),%rdi
mov    $0x8,%esi
call   1040 <_fwrite@plt>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    1146 <make_test_file+0x26>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_test_file>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rsi
call   1030 <fdopen@plt>
mov    %rax,%rbx
movq   $0x0,(%rsp)
mov    %rsp,%r14
xchg   %ax,%ax
mov    %r14,%rdi
mov    $0x8,%esi
mov    %rbx,%rdx
call   1040 <_fwrite@plt>
mov    (%rsp),%rax
add    $0x8,%rax
mov    %rax,(%rsp)
cmp    $0x40000,%rax
jb     1140 <make_test_file+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"wb\00"
define void @make_test_file(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32* @fdopen(i32 %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %4
store i64 0, i64* %3
br label %7
7: ; preds = %13, %1
%8 = load i64, i64* %3
%9 = icmp ult i64 %8, 262144
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32*, i32** %4
%12 = call i32 @_fwrite(i64* %3, i32 8, i32* %11)
br label %13
13: ; preds = %10
%14 = load i64, i64* %3
%15 = add i64 %14, 8
store i64 %15, i64* %3
br label %7
16: ; preds = %7
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"wb\00"
define void @make_test_file(i32 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = tail call i32* @fdopen(i32 %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i64 0, i64* %2
br label %5
5: ; preds = %1, %5
%6 = call i32 @_fwrite(i64* %2, i32 8, i32* %4)
%7 = load i64, i64* %2
%8 = add i64 %7, 8
store i64 %8, i64* %2
%9 = icmp ult i64 %8, 262144
br i1 %9, label %5, label %10
10: ; preds = %5
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool mii_can_100_mbps_half_dp(uint16_t bmsr) {
  return (bmsr & (0x00008000 | 0x00002000 | 0x00000200));
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xa200,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %edi,%eax
and    $0xa200,%eax
ret

LLVM IR (-O0):
define i32 @mii_can_100_mbps_half_dp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 41472
ret i32 %4
}

LLVM IR (-O2):
define i32 @mii_can_100_mbps_half_dp(i32 %0) {
%2 = and i32 %0, 41472
ret i32 %2
}
unsigned short SIO1readStat16(void) { return 0; }


x86 assembly (clang, -O0):
<SIO1readStat16>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIO1readStat16>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i16 @SIO1readStat16() {
ret i16 0
}

LLVM IR (-O2):
define zeroext i16 @SIO1readStat16() {
ret i16 0
}
/* Variables and functions */
int /*<<< orphan*/ http_reply(int, int /*<<< orphan*/ *, int, char *, char *,
                              char *);
void cannot_do(int fd) {
  http_reply(fd, NULL, 501, "Not Implemented", "text/plain",
             "This command is not yet implemented");
}


x86 assembly (clang, -O0):
<cannot_do>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x1f5,%edx
lea    0xed2(%rip),%rcx
lea    0xedb(%rip),%r8
lea    0xedf(%rip),%r9
call   1030 <http_reply@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cannot_do>:
lea    0xee9(%rip),%rcx
lea    0xef2(%rip),%r8
lea    0xef6(%rip),%r9
xor    %esi,%esi
mov    $0x1f5,%edx
jmp    1030 <http_reply@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Not Implemented\00"
@.str.1 = [11 x i8] c"text/plain\00"
@.str.2 = [36 x i8] c"This command is not yet implemented\00"
define void @cannot_do(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @http_reply(i32 %3, i32* null, i32 501, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"Not Implemented\00"
@.str.1 = [11 x i8] c"text/plain\00"
@.str.2 = [36 x i8] c"This command is not yet implemented\00"
define void @cannot_do(i32 %0) {
%2 = tail call i32 @http_reply(i32 %0, i32* null, i32 501, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int norx_verify_tag(const unsigned char *tag1, const unsigned char *tag2) {
  unsigned acc = 0;
  size_t i;
  for (i = 0; i < ((((4 * 32)) + 7) / 8); ++i)
    acc |= tag1[i] ^ tag2[i];
  return (((acc - 1) >> 8) & 1) - 1;
}


x86 assembly (clang, -O0):
<norx_verify_tag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x10,-0x20(%rbp)
jae    1157 <norx_verify_tag+0x57>
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x10(%rbp),%rcx
mov    -0x20(%rbp),%rdx
movzbl (%rcx,%rdx,1),%ecx
xor    %ecx,%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111b <norx_verify_tag+0x1b>
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
shr    $0x8,%eax
and    $0x1,%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<norx_verify_tag>:
movdqu (%rdi),%xmm0
movdqu (%rsi),%xmm1
pxor   %xmm0,%xmm1
pshufd $0xee,%xmm1,%xmm0
por    %xmm1,%xmm0
pshufd $0x55,%xmm0,%xmm1
por    %xmm0,%xmm1
movdqa %xmm1,%xmm0
psrld  $0x10,%xmm0
por    %xmm1,%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x8,%xmm1
por    %xmm0,%xmm1
movd   %xmm1,%eax
movzbl %al,%eax
add    $0xffffffff,%eax
shr    $0x8,%eax
and    $0x1,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @norx_verify_tag(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
store i64 0, i64* %6
br label %7
7: ; preds = %24, %2
%8 = load i64, i64* %6
%9 = icmp ult i64 %8, 16
br i1 %9, label %10, label %27
10: ; preds = %7
%11 = load i8*, i8** %3
%12 = load i64, i64* %6
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i8*, i8** %4
%17 = load i64, i64* %6
%18 = getelementptr inbounds i8, i8* %16, i64 %17
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = xor i32 %15, %20
%22 = load i32, i32* %5
%23 = or i32 %22, %21
store i32 %23, i32* %5
br label %24
24: ; preds = %10
%25 = load i64, i64* %6
%26 = add i64 %25, 1
store i64 %26, i64* %6
br label %7
27: ; preds = %7
%28 = load i32, i32* %5
%29 = sub i32 %28, 1
%30 = lshr i32 %29, 8
%31 = and i32 %30, 1
%32 = sub i32 %31, 1
ret i32 %32
}

LLVM IR (-O2):
define i32 @norx_verify_tag(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to <16 x i8>*
%4 = load <16 x i8>, <16 x i8>* %3
%5 = bitcast i8* %1 to <16 x i8>*
%6 = load <16 x i8>, <16 x i8>* %5
%7 = xor <16 x i8> %6, %4
%8 = call i8 @llvm.vector.reduce.or.v16i8(<16 x i8> %7)
%9 = zext i8 %8 to i32
%10 = add nuw nsw i32 %9, 511
%11 = lshr i32 %10, 8
%12 = and i32 %11, 1
%13 = add nsw i32 %12, -1
ret i32 %13
}
/* Type definitions */
struct __sk_buff {
  int dummy;
};
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
int skb_load_bytes(struct __sk_buff *, int, int /*<<< orphan*/ *, int);
int eth_load_daddr(struct __sk_buff *skb, __u8 *mac, int off) {
  return skb_load_bytes(skb, off, mac, 6);
}


x86 assembly (clang, -O0):
<eth_load_daddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0x6,%ecx
call   1030 <skb_load_bytes@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eth_load_daddr>:
mov    %rsi,%rax
mov    %edx,%esi
mov    %rax,%rdx
mov    $0x6,%ecx
jmp    1030 <skb_load_bytes@plt>

LLVM IR (-O0):
%struct.__sk_buff = type { i32 }
define i32 @eth_load_daddr(%struct.__sk_buff* %0, i32* %1, i32 %2) {
%4 = alloca %struct.__sk_buff*
%5 = alloca i32*
%6 = alloca i32
store %struct.__sk_buff* %0, %struct.__sk_buff** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load %struct.__sk_buff*, %struct.__sk_buff** %4
%8 = load i32, i32* %6
%9 = load i32*, i32** %5
%10 = call i32 @skb_load_bytes(%struct.__sk_buff* %7, i32 %8, i32* %9, i32 6)
ret i32 %10
}

LLVM IR (-O2):
%struct.__sk_buff = type { i32 }
define i32 @eth_load_daddr(%struct.__sk_buff* %0, i32* %1, i32 %2) {
%4 = tail call i32 @skb_load_bytes(%struct.__sk_buff* %0, i32 %2, i32* %1, i32 6)
ret i32 %4
}
int initialize_magnetic_sensor(struct ssp_data *data) { return 0; }


x86 assembly (clang, -O0):
<initialize_magnetic_sensor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_magnetic_sensor>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ssp_data = type opaque
define i32 @initialize_magnetic_sensor(%struct.ssp_data* %0) {
%2 = alloca %struct.ssp_data*
store %struct.ssp_data* %0, %struct.ssp_data** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ssp_data = type opaque
define i32 @initialize_magnetic_sensor(%struct.ssp_data* nocapture readnone %0) {
ret i32 0
}
int test_imm_0Duint8_mem(unsigned char *val) {
  return ((*val) & (0x0D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Duint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xd,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Duint8_mem>:
testb  $0xd,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Duint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 13
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Duint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 13
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
float getfre(float t, short int n, short int i) { return i / (t * n); }


x86 assembly (clang, -O0):
<getfre>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
movss  %xmm0,-0x4(%rbp)
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
movswl -0x8(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  -0x4(%rbp),%xmm1
movswl -0x6(%rbp),%eax
cvtsi2ss %eax,%xmm2
mulss  %xmm2,%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getfre>:
cvtsi2ss %esi,%xmm1
cvtsi2ss %edi,%xmm2
mulss  %xmm0,%xmm2
divss  %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @getfre(float %0, i16 signext %1, i16 signext %2) {
%4 = alloca float
%5 = alloca i16
%6 = alloca i16
store float %0, float* %4
store i16 %1, i16* %5
store i16 %2, i16* %6
%7 = load i16, i16* %6
%8 = sext i16 %7 to i32
%9 = sitofp i32 %8 to float
%10 = load float, float* %4
%11 = load i16, i16* %5
%12 = sext i16 %11 to i32
%13 = sitofp i32 %12 to float
%14 = fmul float %10, %13
%15 = fdiv float %9, %14
ret float %15
}

LLVM IR (-O2):
define float @getfre(float %0, i16 signext %1, i16 signext %2) {
%4 = sitofp i16 %2 to float
%5 = sitofp i16 %1 to float
%6 = fmul float %5, %0
%7 = fdiv float %4, %6
ret float %7
}
int input_map_b1(char c) {
  if (c == 'a')
    return 1;
  if (c >= '4' && c <= '9')
    return 2;
  else
    return 0;
}


x86 assembly (clang, -O0):
<input_map_b1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jne    1123 <input_map_b1+0x23>
movl   $0x1,-0x4(%rbp)
jmp    1150 <input_map_b1+0x50>
movsbl -0x5(%rbp),%eax
cmp    $0x34,%eax
jl     1149 <input_map_b1+0x49>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1149 <input_map_b1+0x49>
movl   $0x2,-0x4(%rbp)
jmp    1150 <input_map_b1+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_map_b1>:
lea    -0x34(%rdi),%eax
xor    %ecx,%ecx
cmp    $0x6,%al
setb   %cl
add    %ecx,%ecx
cmp    $0x61,%dil
mov    $0x1,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @input_map_b1(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 97
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %18
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp sge i32 %10, 52
br i1 %11, label %12, label %17
12: ; preds = %8
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sle i32 %14, 57
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 2, i32* %2
br label %18
17: ; preds = %12, %8
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @input_map_b1(i8 signext %0) {
%2 = icmp eq i8 %0, 97
%3 = add i8 %0, -52
%4 = icmp ult i8 %3, 6
%5 = select i1 %4, i32 2, i32 0
%6 = select i1 %2, i32 1, i32 %5
ret i32 %6
}
void av_get_default_channel_layout() {}


x86 assembly (clang, -O0):
<av_get_default_channel_layout>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_default_channel_layout>:
ret

LLVM IR (-O0):
define void @av_get_default_channel_layout() {
ret void
}

LLVM IR (-O2):
define void @av_get_default_channel_layout() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void fld1() {
  db(0xD9);
  db(0xE8);
}


x86 assembly (clang, -O0):
<fld1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd9,%edi
call   1030 <db@plt>
mov    $0xe8,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fld1>:
push   %rax
mov    $0xd9,%edi
call   1030 <db@plt>
mov    $0xe8,%edi
pop    %rax
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @fld1() {
%1 = call i32 @db(i32 217)
%2 = call i32 @db(i32 232)
ret void
}

LLVM IR (-O2):
define void @fld1() {
%1 = tail call i32 @db(i32 217)
%2 = tail call i32 @db(i32 232)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ write_and_check_aux(int /*<<< orphan*/ *, unsigned int,
                                       unsigned int, int);
void write_and_check(uint16_t *input, unsigned num_input_bytes,
                     unsigned num_expected_output_bytes) {
  write_and_check_aux(input, num_input_bytes, num_expected_output_bytes, 0x0);
  write_and_check_aux(input, num_input_bytes, num_expected_output_bytes, 0xFF);
}


x86 assembly (clang, -O0):
<write_and_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %ecx,%ecx
call   1030 <write_and_check_aux@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    $0xff,%ecx
call   1030 <write_and_check_aux@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_and_check>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %ecx,%ecx
call   1030 <write_and_check_aux@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
mov    $0xff,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <write_and_check_aux@plt>

LLVM IR (-O0):
define void @write_and_check(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @write_and_check_aux(i32* %7, i32 %8, i32 %9, i32 0)
%11 = load i32*, i32** %4
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = call i32 @write_and_check_aux(i32* %11, i32 %12, i32 %13, i32 255)
ret void
}

LLVM IR (-O2):
define void @write_and_check(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @write_and_check_aux(i32* %0, i32 %1, i32 %2, i32 0)
%5 = tail call i32 @write_and_check_aux(i32* %0, i32 %1, i32 %2, i32 255)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ popNarray(char *, unsigned int);
void poppointer4array(char *x, int n) {
  popNarray((char *)x, (unsigned int)(n * 4));
}


x86 assembly (clang, -O0):
<poppointer4array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
shl    $0x2,%esi
call   1030 <popNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<poppointer4array>:
shl    $0x2,%esi
jmp    1030 <popNarray@plt>

LLVM IR (-O0):
define void @poppointer4array(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %6, 4
%8 = call i32 @popNarray(i8* %5, i32 %7)
ret void
}

LLVM IR (-O2):
define void @poppointer4array(i8* %0, i32 %1) {
%3 = shl nsw i32 %1, 2
%4 = tail call i32 @popNarray(i8* %0, i32 %3)
ret void
}
/* Variables and functions */
int _nvram_set(char const *, char const *);
int /*<<< orphan*/ nvram_close();
int /*<<< orphan*/ nvram_init(int /*<<< orphan*/ *);
int nvram_fset(const char *name, const char *value) {
  int ret = 0;
  nvram_init(NULL);
  ret = _nvram_set(name, value);
  nvram_close();
  return ret;
}


x86 assembly (clang, -O0):
<nvram_fset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1050 <nvram_init@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_nvram_set@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <nvram_close@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvram_fset>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
call   1050 <nvram_init@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <_nvram_set@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <nvram_close@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @nvram_fset(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = call i32 @nvram_init(i32* null)
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i32 @_nvram_set(i8* %7, i8* %8)
store i32 %9, i32* %5
%10 = call i32 (...) @nvram_close()
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @nvram_fset(i8* %0, i8* %1) {
%3 = tail call i32 @nvram_init(i32* null)
%4 = tail call i32 @_nvram_set(i8* %0, i8* %1)
%5 = tail call i32 (...) @nvram_close()
ret i32 %4
}
int _isatty_r(struct _reent *r, int fd) {
  (void)r;
  (void)fd;
  return 1;
}


x86 assembly (clang, -O0):
<_isatty_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isatty_r>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct._reent = type opaque
define i32 @_isatty_r(%struct._reent* %0, i32 %1) {
%3 = alloca %struct._reent*
%4 = alloca i32
store %struct._reent* %0, %struct._reent** %3
store i32 %1, i32* %4
%5 = load %struct._reent*, %struct._reent** %3
%6 = load i32, i32* %4
ret i32 1
}

LLVM IR (-O2):
%struct._reent = type opaque
define i32 @_isatty_r(%struct._reent* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgnot(void) { gen("not\tax"); }


x86 assembly (clang, -O0):
<cgnot>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgnot>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"not\09ax\00"
define void @cgnot() {
%1 = call i32 @gen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"not\09ax\00"
define void @cgnot() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct transaction {
  int dummy;
};

/* Variables and functions */
size_t serialize_transaction(int /*<<< orphan*/ *, struct transaction const *);
size_t transaction_size(struct transaction const *tx) {
  return serialize_transaction(NULL, tx);
}


x86 assembly (clang, -O0):
<transaction_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edi
call   1030 <serialize_transaction@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<transaction_size>:
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <serialize_transaction@plt>

LLVM IR (-O0):
%struct.transaction = type { i32 }
define i64 @transaction_size(%struct.transaction* %0) {
%2 = alloca %struct.transaction*
store %struct.transaction* %0, %struct.transaction** %2
%3 = load %struct.transaction*, %struct.transaction** %2
%4 = call i64 @serialize_transaction(i32* null, %struct.transaction* %3)
ret i64 %4
}

LLVM IR (-O2):
%struct.transaction = type { i32 }
define i64 @transaction_size(%struct.transaction* %0) {
%2 = tail call i64 @serialize_transaction(i32* null, %struct.transaction* %0)
ret i64 %2
}
void d2i_ASN1_GENERALIZEDTIME(void) {}


x86 assembly (clang, -O0):
<d2i_ASN1_GENERALIZEDTIME>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_ASN1_GENERALIZEDTIME>:
ret

LLVM IR (-O0):
define void @d2i_ASN1_GENERALIZEDTIME() {
ret void
}

LLVM IR (-O2):
define void @d2i_ASN1_GENERALIZEDTIME() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Start_c();
void Reset(void) { Start_c(); }


x86 assembly (clang, -O0):
<Reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Start_c@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reset>:
xor    %eax,%eax
jmp    1030 <Start_c@plt>

LLVM IR (-O0):
define void @Reset() {
%1 = call i32 (...) @Start_c()
ret void
}

LLVM IR (-O2):
define void @Reset() {
%1 = tail call i32 (...) @Start_c()
ret void
}
extern int mdp_ppp_load_blur(struct mdp_info *mdp) { return 0; }


x86 assembly (clang, -O0):
<mdp_ppp_load_blur>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp_ppp_load_blur>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mdp_info = type opaque
define i32 @mdp_ppp_load_blur(%struct.mdp_info* %0) {
%2 = alloca %struct.mdp_info*
store %struct.mdp_info* %0, %struct.mdp_info** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mdp_info = type opaque
define i32 @mdp_ppp_load_blur(%struct.mdp_info* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int read_from_address(int);
int /*<<< orphan*/ write_to_address(int, unsigned char);
void uart_write_char(unsigned char byte) {
  while (read_from_address(0x3F201018) & (1 << 5)) {
  }
  write_to_address(0x3F201000, byte);
}


x86 assembly (clang, -O0):
<uart_write_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x3f201018,%edi
call   1030 <read_from_address@plt>
and    $0x20,%eax
cmp    $0x0,%eax
je     1149 <uart_write_char+0x29>
jmp    112e <uart_write_char+0xe>
mov    $0x3f201000,%edi
movzbl -0x1(%rbp),%esi
call   1040 <write_to_address@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_write_char>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x3f201018,%edi
call   1030 <read_from_address@plt>
test   $0x20,%al
jne    1130 <uart_write_char+0x10>
movzbl %bl,%esi
mov    $0x3f201000,%edi
pop    %rbx
jmp    1040 <write_to_address@plt>

LLVM IR (-O0):
define void @uart_write_char(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %7, %1
%4 = call i32 @read_from_address(i32 1059065880)
%5 = and i32 %4, 32
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i8, i8* %2
%10 = call i32 @write_to_address(i32 1059065856, i8 zeroext %9)
ret void
}

LLVM IR (-O2):
define void @uart_write_char(i8 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @read_from_address(i32 1059065880)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = tail call i32 @write_to_address(i32 1059065856, i8 zeroext %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigprocmask(int, int /*<<< orphan*/ const *, int /*<<< orphan*/ *);
int real_sigprocmask(int option, const sigset_t *new_set, sigset_t *old_set) {
  return sigprocmask(option, new_set, old_set);
}


x86 assembly (clang, -O0):
<real_sigprocmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <sigprocmask@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<real_sigprocmask>:
jmp    1030 <sigprocmask@plt>

LLVM IR (-O0):
define i32 @real_sigprocmask(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32*, i32** %6
%10 = call i32 @sigprocmask(i32 %7, i32* %8, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @real_sigprocmask(i32 %0, i32* %1, i32* %2) {
%4 = tail call i32 @sigprocmask(i32 %0, i32* %1, i32* %2)
ret i32 %4
}
/* Type definitions */
struct tm {
  int dummy;
};

/* Variables and functions */
size_t strftime(char *s, size_t max, const char *format, const struct tm *tm) {
  return 0;
}


x86 assembly (clang, -O0):
<strftime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strftime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i64 @strftime(i8* %0, i64 %1, i8* %2, %struct.tm* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca %struct.tm*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store %struct.tm* %3, %struct.tm** %8
ret i64 0
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i64 @strftime(i8* nocapture readnone %0, i64 %1, i8* nocapture readnone %2, %struct.tm* nocapture readnone %3) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ decode_indent();
int /*<<< orphan*/ decode_lines();
int /*<<< orphan*/ output_token_name();
void output_token(void) {
  decode_lines();
  decode_indent();
  output_token_name();
}


x86 assembly (clang, -O0):
<output_token>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <decode_lines@plt>
mov    $0x0,%al
call   1030 <decode_indent@plt>
mov    $0x0,%al
call   1040 <output_token_name@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_token>:
push   %rax
xor    %eax,%eax
call   1050 <decode_lines@plt>
xor    %eax,%eax
call   1030 <decode_indent@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <output_token_name@plt>

LLVM IR (-O0):
define void @output_token() {
%1 = call i32 (...) @decode_lines()
%2 = call i32 (...) @decode_indent()
%3 = call i32 (...) @output_token_name()
ret void
}

LLVM IR (-O2):
define void @output_token() {
%1 = tail call i32 (...) @decode_lines()
%2 = tail call i32 (...) @decode_indent()
%3 = tail call i32 (...) @output_token_name()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
float sqrt(int);
int square_root(int reply) {
  int num;
  float supp;
  scanf("%d", &num);
  supp = sqrt(num);
  if (num / supp == supp) {
    reply = 1;
  } else
    reply = 0;
  return reply;
}


x86 assembly (clang, -O0):
<square_root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <sqrt@plt>
movss  %xmm0,-0xc(%rbp)
cvtsi2ssl -0x8(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jne    116e <square_root+0x4e>
jp     116e <square_root+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1175 <square_root+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<square_root>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1030 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <sqrt@plt>
cvtsi2ssl 0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
cmpeqss %xmm0,%xmm1
movd   %xmm1,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @square_root(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %2
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
%7 = call float @sqrt(i32 %6)
store float %7, float* %4
%8 = load i32, i32* %3
%9 = sitofp i32 %8 to float
%10 = load float, float* %4
%11 = fdiv float %9, %10
%12 = load float, float* %4
%13 = fcmp oeq float %11, %12
br i1 %13, label %14, label %15
14: ; preds = %1
store i32 1, i32* %2
br label %16
15: ; preds = %1
store i32 0, i32* %2
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @square_root(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call float @sqrt(i32 %5)
%7 = load i32, i32* %2
%8 = sitofp i32 %7 to float
%9 = fdiv float %8, %6
%10 = fcmp oeq float %9, %6
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
bool fsexists(const char *path) {
  struct stat sb;
  return stat(path, &sb) == 0;
}


x86 assembly (clang, -O0):
<fsexists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsexists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @fsexists(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @stat(i8* %4, %struct.stat* %3)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @fsexists(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void codecrc(char *salt, char *result) { strcpy(result, "<open>"); }


x86 assembly (clang, -O0):
<codecrc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<codecrc>:
mov    %rsi,%rdi
lea    0xee6(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"<open>\00"
define void @codecrc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @strcpy(i8* %5, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"<open>\00"
define void @codecrc(i8* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ start_streaming();
int main(int argc, char *argv[]) { start_streaming(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <start_streaming@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <start_streaming@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @start_streaming()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @start_streaming()
ret i32 0
}
/* Variables and functions */
int __ioctl(int, int, int);
int __libc_tcdrain(int fd) { return __ioctl(fd, 0x5405, 1); }


x86 assembly (clang, -O0):
<__libc_tcdrain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x5405,%esi
mov    $0x1,%edx
call   1030 <__ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_tcdrain>:
mov    $0x5405,%esi
mov    $0x1,%edx
jmp    1030 <__ioctl@plt>

LLVM IR (-O0):
define i32 @__libc_tcdrain(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__ioctl(i32 %3, i32 21509, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__libc_tcdrain(i32 %0) {
%2 = tail call i32 @__ioctl(i32 %0, i32 21509, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello, two!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello, two!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello, two!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int in_word(int port) {
  int v = 0;
  __asm__("movl %1, %%edx;		        xor %%eax, %%eax;	"
          "	        inw %%dx, %%ax;		        movl %%eax,%0;"
          : "=r"(v)
          : "r"(port)
          : "%eax", "%edx");
  return v;
}


x86 assembly (clang, -O0):
<in_word>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,%edx
xor    %eax,%eax
in     (%dx),%ax
mov    %eax,%ecx
mov    %ecx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_word>:
mov    %edi,%edx
xor    %eax,%eax
in     (%dx),%ax
mov    %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @in_word(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i32 asm "movl $1, %edx;\09\09 xor %eax, %eax;\09\09 inw %dx, %ax;\09\09 movl %eax,$0;", "=r,r,~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @in_word(i32 %0) {
%2 = tail call i32 asm "movl $1, %edx;\09\09 xor %eax, %eax;\09\09 inw %dx, %ax;\09\09 movl %eax,$0;", "=r,r,~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i32 %2
}
void __mutex_lock(volatile int *val) {
  int tmp;
  __asm__ __volatile__("0:\n\t"
                       "mov %0, %1\n\t"
                       "testl %1, %1\n\t"
                       "jz 1f\n\t"
                       "movl $68, %%eax\n\t"
                       "movl $1,  %%ebx\n\t"
                       "int  $0x40\n\t"
                       "jmp 0b\n\t"
                       "1:\n\t"
                       "incl %1\n\t"
                       "xchgl %0, %1\n\t"
                       "testl %1, %1\n\t"
                       "jnz 0b\n"
                       : "+m"(*val), "=&r"(tmp)::"eax", "ebx");
}


x86 assembly (clang, -O0):
<__mutex_lock>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    (%rdx),%ecx
test   %ecx,%ecx
je     1128 <__mutex_lock+0x28>
mov    $0x44,%eax
mov    $0x1,%ebx
int    $0x40
jmp    110d <__mutex_lock+0xd>
inc    %ecx
xchg   %ecx,(%rdx)
test   %ecx,%ecx
jne    110d <__mutex_lock+0xd>
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mutex_lock>:
push   %rbx
mov    (%rdi),%ecx
test   %ecx,%ecx
je     1115 <__mutex_lock+0x15>
mov    $0x44,%eax
mov    $0x1,%ebx
int    $0x40
jmp    1101 <__mutex_lock+0x1>
inc    %ecx
xchg   %ecx,(%rdi)
test   %ecx,%ecx
jne    1101 <__mutex_lock+0x1>
pop    %rbx
ret

LLVM IR (-O0):
define void @__mutex_lock(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 asm sideeffect "0:\0A\09mov $0, $1\0A\09testl $1, $1\0A\09jz 1f\0A\09movl $$68, %eax\0A\09movl $$1, %ebx\0A\09int $$0x40\0A\09jmp 0b\0A\091:\0A\09incl $1\0A\09xchgl $0, $1\0A\09testl $1, $1\0A\09jnz 0b\0A", "=*m,=&r,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %4, i32* elementtype(i32) %4)
store i32 %5, i32* %3
ret void
}

LLVM IR (-O2):
define void @__mutex_lock(i32* %0) {
%2 = tail call i32 asm sideeffect "0:\0A\09mov $0, $1\0A\09testl $1, $1\0A\09jz 1f\0A\09movl $$68, %eax\0A\09movl $$1, %ebx\0A\09int $$0x40\0A\09jmp 0b\0A\091:\0A\09incl $1\0A\09xchgl $0, $1\0A\09testl $1, $1\0A\09jnz 0b\0A", "=*m,=&r,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32* elementtype(i32) %0)
ret void
}
/* Variables and functions */
unsigned long floor_lg(unsigned long);
unsigned long ceil_lg(unsigned long v) {
  unsigned long lg = floor_lg(v);
  return (lg + (v - (1l << lg) > 0l));
}


x86 assembly (clang, -O0):
<ceil_lg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <floor_lg@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x1,%edx
shl    %cl,%rdx
mov    -0x18(%rbp),%rcx
sub    %rdx,%rcx
cmp    $0x0,%rcx
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil_lg>:
push   %rbx
mov    %rdi,%rbx
call   1030 <floor_lg@plt>
mov    $0xffffffffffffffff,%rdx
mov    %eax,%ecx
shl    %cl,%rdx
xor    %ecx,%ecx
add    %rbx,%rdx
setne  %cl
add    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @ceil_lg(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @floor_lg(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = load i64, i64* %2
%8 = load i64, i64* %3
%9 = shl i64 1, %8
%10 = sub i64 %7, %9
%11 = icmp ugt i64 %10, 0
%12 = zext i1 %11 to i32
%13 = sext i32 %12 to i64
%14 = add i64 %6, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @ceil_lg(i64 %0) {
%2 = tail call i64 @floor_lg(i64 %0)
%3 = shl nsw i64 -1, %2
%4 = sub i64 0, %0
%5 = icmp ne i64 %3, %4
%6 = zext i1 %5 to i64
%7 = add i64 %2, %6
ret i64 %7
}
void g_param_spec_pool_new() {}


x86 assembly (clang, -O0):
<g_param_spec_pool_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_pool_new>:
ret

LLVM IR (-O0):
define void @g_param_spec_pool_new() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_pool_new() {
ret void
}
/* Variables and functions */
scalar_t__ isnum(char const *);
int notnum(const char *string) {
  if (isnum(string)) {
    return (0);
  } else {
    return (1);
  }
}


x86 assembly (clang, -O0):
<notnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <isnum@plt>
cmp    $0x0,%rax
je     113b <notnum+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    1142 <notnum+0x32>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notnum>:
push   %rax
call   1030 <isnum@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @notnum(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @isnum(i8* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @notnum(i8* %0) {
%2 = tail call i64 @isnum(i8* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_srli_si64(int /*<<< orphan*/, int);
__m64 test_mm_srli_si64(__m64 a) { return _mm_srli_si64(a, 3); }


x86 assembly (clang, -O0):
<test_mm_srli_si64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x3,%esi
call   1030 <_mm_srli_si64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_srli_si64>:
mov    $0x3,%esi
jmp    1030 <_mm_srli_si64@plt>

LLVM IR (-O0):
define i32 @test_mm_srli_si64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_srli_si64(i32 %3, i32 3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_srli_si64(i32 %0) {
%2 = tail call i32 @_mm_srli_si64(i32 %0, i32 3)
ret i32 %2
}
char *TrimLeft(char *fromStrPtr) {
  char *tmp = &fromStrPtr[0];
  while ((*tmp <= ' ') && (*tmp != 0))
    tmp++;
  return tmp;
}


x86 assembly (clang, -O0):
<TrimLeft>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x20,%ecx
mov    %al,-0x11(%rbp)
jg     1135 <TrimLeft+0x35>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1145 <TrimLeft+0x45>
jmp    1156 <TrimLeft+0x56>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <TrimLeft+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TrimLeft>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
cmp    $0x20,%cl
jg     1121 <TrimLeft+0x21>
test   %cl,%cl
jne    1110 <TrimLeft+0x10>
ret

LLVM IR (-O0):
define i8* @TrimLeft(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
store i8* %5, i8** %3
br label %6
6: ; preds = %18, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 32
br i1 %10, label %11, label %16
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 0
br label %16
16: ; preds = %11, %6
%17 = phi i1 [ false, %6 ], [ %15, %11 ]
br i1 %17, label %18, label %21
18: ; preds = %16
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %6
21: ; preds = %16
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @TrimLeft(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %8, %2 ]
%4 = load i8, i8* %3
%5 = icmp sgt i8 %4, 32
%6 = icmp eq i8 %4, 0
%7 = or i1 %5, %6
%8 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %7, label %9, label %2
9: ; preds = %2
ret i8* %3
}
double opr_g(struct lifo *stack) { return 9.80665; }


x86 assembly (clang, -O0):
<opr_g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_g>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
%struct.lifo = type opaque
define double @opr_g(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
store %struct.lifo* %0, %struct.lifo** %2
ret double 0x40239D013A92A305
}

LLVM IR (-O2):
%struct.lifo = type opaque
define double @opr_g(%struct.lifo* nocapture readnone %0) {
ret double 0x40239D013A92A305
}
void __DELETE_java_util_Collections(void *me, void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_java_util_Collections>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_java_util_Collections>:
ret

LLVM IR (-O0):
define void @__DELETE_java_util_Collections(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_java_util_Collections(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
char *strrchr(char const *, char);
const char *mybasename(const char *str) {
  const char *base = strrchr(str, '/');
  return base ? base + 1 : str;
}


x86 assembly (clang, -O0):
<mybasename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114a <mybasename+0x3a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1152 <mybasename+0x42>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mybasename>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @mybasename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strrchr(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
br label %13
11: ; preds = %1
%12 = load i8*, i8** %2
br label %13
13: ; preds = %11, %8
%14 = phi i8* [ %10, %8 ], [ %12, %11 ]
ret i8* %14
}

LLVM IR (-O2):
define i8* @mybasename(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = select i1 %3, i8* %0, i8* %4
ret i8* %5
}
/* Type definitions */
struct target_ops {
  int dummy;
};
struct regcache {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ noprocess();
void tdefault_prepare_to_store(struct target_ops *self, struct regcache *arg1) {
  noprocess();
}


x86 assembly (clang, -O0):
<tdefault_prepare_to_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <noprocess@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_prepare_to_store>:
xor    %eax,%eax
jmp    1030 <noprocess@plt>

LLVM IR (-O0):
%struct.target_ops = type { i32 }
%struct.regcache = type { i32 }
define void @tdefault_prepare_to_store(%struct.target_ops* %0, %struct.regcache* %1) {
%3 = alloca %struct.target_ops*
%4 = alloca %struct.regcache*
store %struct.target_ops* %0, %struct.target_ops** %3
store %struct.regcache* %1, %struct.regcache** %4
%5 = call i32 (...) @noprocess()
ret void
}

LLVM IR (-O2):
%struct.target_ops = type { i32 }
%struct.regcache = type { i32 }
define void @tdefault_prepare_to_store(%struct.target_ops* nocapture readnone %0, %struct.regcache* nocapture readnone %1) {
%3 = tail call i32 (...) @noprocess()
ret void
}