int alaw2linear(unsigned char a_val) {
  int t;
  int seg;
  a_val ^= 0x55;
  t = (a_val & (0xf)) << 4;
  seg = ((unsigned)a_val & (0x70)) >> (4);
  switch (seg) {
  case 0:
    t += 8;
    break;
  case 1:
    t += 0x108;
    break;
  default:
    t += 0x108;
    t <<= seg - 1;
  }
  return ((a_val & (0x80)) ? t : -t);
}


x86 assembly (clang, -O0):
<alaw2linear>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
xor    $0x55,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x70,%eax
shr    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     1150 <alaw2linear+0x50>
jmp    113f <alaw2linear+0x3f>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     115e <alaw2linear+0x5e>
jmp    116e <alaw2linear+0x6e>
mov    -0x8(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0x8(%rbp)
jmp    1187 <alaw2linear+0x87>
mov    -0x8(%rbp),%eax
add    $0x108,%eax
mov    %eax,-0x8(%rbp)
jmp    1187 <alaw2linear+0x87>
mov    -0x8(%rbp),%eax
add    $0x108,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     11a4 <alaw2linear+0xa4>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    11ac <alaw2linear+0xac>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alaw2linear>:
xor    $0x55,%dil
movzbl %dil,%ecx
mov    %ecx,%eax
shl    $0x4,%eax
movzbl %al,%edx
shr    $0x4,%ecx
and    $0x7,%ecx
cmp    $0x1,%ecx
je     1124 <alaw2linear+0x24>
test   %ecx,%ecx
jne    112c <alaw2linear+0x2c>
or     $0x8,%edx
jmp    1137 <alaw2linear+0x37>
or     $0x108,%edx
jmp    1137 <alaw2linear+0x37>
or     $0x108,%edx
add    $0xff,%cl
shl    %cl,%edx
mov    %edx,%eax
neg    %eax
test   $0x80,%dil
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @alaw2linear(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = xor i32 %6, 85
%8 = trunc i32 %7 to i8
store i8 %8, i8* %2
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = and i32 %10, 15
%12 = shl i32 %11, 4
store i32 %12, i32* %3
%13 = load i8, i8* %2
%14 = zext i8 %13 to i32
%15 = and i32 %14, 112
%16 = lshr i32 %15, 4
store i32 %16, i32* %4
%17 = load i32, i32* %4
switch i32 %17, label %24 [
i32 0, label %18
i32 1, label %21
]
18: ; preds = %1
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 8
store i32 %20, i32* %3
br label %31
21: ; preds = %1
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 264
store i32 %23, i32* %3
br label %31
24: ; preds = %1
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 264
store i32 %26, i32* %3
%27 = load i32, i32* %4
%28 = sub nsw i32 %27, 1
%29 = load i32, i32* %3
%30 = shl i32 %29, %28
store i32 %30, i32* %3
br label %31
31: ; preds = %24, %21, %18
%32 = load i8, i8* %2
%33 = zext i8 %32 to i32
%34 = and i32 %33, 128
%35 = icmp ne i32 %34, 0
br i1 %35, label %36, label %38
36: ; preds = %31
%37 = load i32, i32* %3
br label %41
38: ; preds = %31
%39 = load i32, i32* %3
%40 = sub nsw i32 0, %39
br label %41
41: ; preds = %38, %36
%42 = phi i32 [ %37, %36 ], [ %40, %38 ]
ret i32 %42
}

LLVM IR (-O2):
define i32 @alaw2linear(i8 zeroext %0) {
%2 = xor i8 %0, 85
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 4
%5 = and i32 %4, 240
%6 = lshr i32 %3, 4
%7 = and i32 %6, 7
switch i32 %7, label %12 [
i32 0, label %8
i32 1, label %10
]
8: ; preds = %1
%9 = or i32 %5, 8
br label %16
10: ; preds = %1
%11 = or i32 %5, 264
br label %16
12: ; preds = %1
%13 = or i32 %5, 264
%14 = add nsw i32 %7, -1
%15 = shl i32 %13, %14
br label %16
16: ; preds = %12, %10, %8
%17 = phi i32 [ %15, %12 ], [ %11, %10 ], [ %9, %8 ]
%18 = and i32 %3, 128
%19 = icmp eq i32 %18, 0
%20 = sub nsw i32 0, %17
%21 = select i1 %19, i32 %20, i32 %17
ret i32 %21
}