double BounceEaseOut(double p) {
  if (p < 4 / 11.0) {
    return (121 * p * p) / 16.0;
  } else if (p < 8 / 11.0) {
    return (363 / 40.0 * p * p) - (99 / 10.0 * p) + 17 / 5.0;
  } else if (p < 9 / 10.0) {
    return (4356 / 361.0 * p * p) - (35442 / 1805.0 * p) + 16061 / 1805.0;
  } else {
    return (54 / 5.0 * p * p) - (513 / 25.0 * p) + 268 / 25.0;
  }
}


x86 assembly (clang, -O0):
<BounceEaseOut>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1144 <BounceEaseOut+0x44>
movsd  0xf44(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  0xf2a(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1261 <BounceEaseOut+0x161>
movsd  0xebc(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    11ab <BounceEaseOut+0xab>
movsd  0xef9(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xedf(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xeab(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1261 <BounceEaseOut+0x161>
movsd  0xe5d(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1212 <BounceEaseOut+0x112>
movsd  0xe7a(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xe60(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe2c(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1261 <BounceEaseOut+0x161>
movsd  0xe0e(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xdf4(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xdc0(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<BounceEaseOut>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    112b <BounceEaseOut+0x2b>
movsd  0xf4a(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  0xf42(%rip),%xmm1
movapd %xmm1,%xmm0
ret
movsd  0xed5(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    115e <BounceEaseOut+0x5e>
movsd  0xf07(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  0xeff(%rip),%xmm0
addsd  %xmm1,%xmm0
addsd  0xefb(%rip),%xmm0
ret
movsd  0xeaa(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    1191 <BounceEaseOut+0x91>
movsd  0xebc(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  0xeb4(%rip),%xmm0
addsd  %xmm1,%xmm0
addsd  0xeb0(%rip),%xmm0
ret
movsd  0xe7f(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  0xe77(%rip),%xmm0
addsd  %xmm1,%xmm0
addsd  0xe73(%rip),%xmm0
ret

LLVM IR (-O0):
define double @BounceEaseOut(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0x3FD745D1745D1746
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load double, double* %3
%8 = fmul double 1.210000e+02, %7
%9 = load double, double* %3
%10 = fmul double %8, %9
%11 = fdiv double %10, 1.600000e+01
store double %11, double* %2
br label %45
12: ; preds = %1
%13 = load double, double* %3
%14 = fcmp olt double %13, 0x3FE745D1745D1746
br i1 %14, label %15, label %24
15: ; preds = %12
%16 = load double, double* %3
%17 = fmul double 0x4022266666666666, %16
%18 = load double, double* %3
%19 = load double, double* %3
%20 = fmul double 9.900000e+00, %19
%21 = fneg double %20
%22 = call double @llvm.fmuladd.f64(double %17, double %18, double %21)
%23 = fadd double %22, 3.400000e+00
store double %23, double* %2
br label %45
24: ; preds = %12
%25 = load double, double* %3
%26 = fcmp olt double %25, 9.000000e-01
br i1 %26, label %27, label %36
27: ; preds = %24
%28 = load double, double* %3
%29 = fmul double 0x40282209ED8FF4A7, %28
%30 = load double, double* %3
%31 = load double, double* %3
%32 = fmul double 0x4033A2AD506AA7A4, %31
%33 = fneg double %32
%34 = call double @llvm.fmuladd.f64(double %29, double %30, double %33)
%35 = fadd double %34, 0x4021CBCEA4CDEF44
store double %35, double* %2
br label %45
36: ; preds = %24
%37 = load double, double* %3
%38 = fmul double 1.080000e+01, %37
%39 = load double, double* %3
%40 = load double, double* %3
%41 = fmul double 2.052000e+01, %40
%42 = fneg double %41
%43 = call double @llvm.fmuladd.f64(double %38, double %39, double %42)
%44 = fadd double %43, 1.072000e+01
store double %44, double* %2
br label %45
45: ; preds = %36, %27, %15, %6
%46 = load double, double* %2
ret double %46
}

LLVM IR (-O2):
define double @BounceEaseOut(double %0) {
%2 = fcmp olt double %0, 0x3FD745D1745D1746
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = fmul double %0, 1.210000e+02
%5 = fmul double %4, %0
%6 = fmul double %5, 6.250000e-02
br label %26
7: ; preds = %1
%8 = fcmp olt double %0, 0x3FE745D1745D1746
br i1 %8, label %9, label %14
9: ; preds = %7
%10 = fmul double %0, 0x4022266666666666
%11 = fmul double %0, -9.900000e+00
%12 = tail call double @llvm.fmuladd.f64(double %10, double %0, double %11)
%13 = fadd double %12, 3.400000e+00
br label %26
14: ; preds = %7
%15 = fcmp olt double %0, 9.000000e-01
br i1 %15, label %16, label %21
16: ; preds = %14
%17 = fmul double %0, 0x40282209ED8FF4A7
%18 = fmul double %0, 0xC033A2AD506AA7A4
%19 = tail call double @llvm.fmuladd.f64(double %17, double %0, double %18)
%20 = fadd double %19, 0x4021CBCEA4CDEF44
br label %26
21: ; preds = %14
%22 = fmul double %0, 1.080000e+01
%23 = fmul double %0, -2.052000e+01
%24 = tail call double @llvm.fmuladd.f64(double %22, double %0, double %23)
%25 = fadd double %24, 1.072000e+01
br label %26
26: ; preds = %21, %16, %9, %3
%27 = phi double [ %6, %3 ], [ %13, %9 ], [ %20, %16 ], [ %25, %21 ]
ret double %27
}