xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void perror(const char *s) { printf("Error: %s\n", s); }


x86 assembly (clang, -O0):
<perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perror>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Error: %s\0A\00"
define void @perror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Error: %s\0A\00"
define void @perror(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int dowU2X(d)
int d;
{
  if (d == 0)
    d = 7;
  return (1 << (d - 1));
}


x86 assembly (clang, -O0):
<dowU2X>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1118 <dowU2X+0x18>
movl   $0x7,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dowU2X>:
lea    -0x1(%rdi),%ecx
mov    $0x1,%edx
shl    %cl,%edx
cmp    $0x1,%edi
mov    $0x40,%eax
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @dowU2X(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 7, i32* %2
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = shl i32 1, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @dowU2X(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = add nsw i32 %0, -1
%4 = shl nuw i32 1, %3
%5 = select i1 %2, i32 64, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ initDefaultCfg();
int /*<<< orphan*/ printCfg();
int /*<<< orphan*/ printf(char *);
scalar_t__ readconfig();
void input() {
  initDefaultCfg();
  if (readconfig())
    printf("Read configuration file failed. Use default config\n");
  printCfg();
  return;
}


x86 assembly (clang, -O0):
<input>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initDefaultCfg@plt>
mov    $0x0,%al
call   1060 <readconfig@plt>
cmp    $0x0,%rax
je     1168 <input+0x28>
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <printCfg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<input>:
push   %rax
xor    %eax,%eax
call   1050 <initDefaultCfg@plt>
xor    %eax,%eax
call   1060 <readconfig@plt>
test   %rax,%rax
je     1160 <input+0x20>
lea    0xea5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <printCfg@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"Read configuration file failed. Use default config\0A\00"
define void @input() {
%1 = call i32 (...) @initDefaultCfg()
%2 = call i64 (...) @readconfig()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = call i32 (...) @printCfg()
ret void
}

LLVM IR (-O2):
@str = [51 x i8] c"Read configuration file failed. Use default config\00"
define void @input() {
%1 = tail call i32 (...) @initDefaultCfg()
%2 = tail call i64 (...) @readconfig()
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = tail call i32 (...) @printCfg()
ret void
}
int perfect_match(int *s1, int *s2, int s1len) {
  int i;
  for (i = 0; i < s1len; i++) {
    if (s1[i] != s2[i])
      return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<perfect_match>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    115d <perfect_match+0x5d>
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x18(%rbp),%rcx
movslq -0x20(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
je     114a <perfect_match+0x4a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1164 <perfect_match+0x64>
jmp    114f <perfect_match+0x4f>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1116 <perfect_match+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<perfect_match>:
test   %edx,%edx
jle    1121 <perfect_match+0x21>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
mov    (%rdi,%rcx,4),%edx
cmp    (%rsi,%rcx,4),%edx
jne    1124 <perfect_match+0x24>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <perfect_match+0x10>
xor    %eax,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @perfect_match(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %27, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %30
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %6
%20 = load i32, i32* %8
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = load i32, i32* %22
%24 = icmp ne i32 %18, %23
br i1 %24, label %25, label %26
25: ; preds = %13
store i32 -1, i32* %4
br label %31
26: ; preds = %13
br label %27
27: ; preds = %26
%28 = load i32, i32* %8
%29 = add nsw i32 %28, 1
store i32 %29, i32* %8
br label %9
30: ; preds = %9
store i32 0, i32* %4
br label %31
31: ; preds = %30, %25
%32 = load i32, i32* %4
ret i32 %32
}

LLVM IR (-O2):
define i32 @perfect_match(i32* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %16, %6
br i1 %8, label %17, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %16, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = getelementptr inbounds i32, i32* %1, i64 %10
%14 = load i32, i32* %13
%15 = icmp eq i32 %12, %14
%16 = add nuw nsw i64 %10, 1
br i1 %15, label %7, label %17
17: ; preds = %9, %7, %3
%18 = phi i32 [ 0, %3 ], [ 0, %7 ], [ -1, %9 ]
ret i32 %18
}
extern unsigned int cpuid_edx(unsigned int op) {
  unsigned int eax, edx;
  __asm__("cpuid" : "=a"(eax), "=d"(edx) : "0"(op) : "bx", "cx");
  return edx;
}


x86 assembly (clang, -O0):
<cpuid_edx>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cpuid
mov    %eax,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_edx>:
push   %rbx
mov    %edi,%eax
cpuid
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cpuid_edx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call { i32, i32 } asm "cpuid", "={ax},={dx},0,~{bx},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 %5)
%7 = extractvalue { i32, i32 } %6, 0
%8 = extractvalue { i32, i32 } %6, 1
store i32 %7, i32* %3
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @cpuid_edx(i32 %0) {
%2 = tail call { i32, i32 } asm "cpuid", "={ax},={dx},0,~{bx},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
%3 = extractvalue { i32, i32 } %2, 1
ret i32 %3
}
void ___before_softstop() {}


x86 assembly (clang, -O0):
<___before_softstop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___before_softstop>:
ret

LLVM IR (-O0):
define void @___before_softstop() {
ret void
}

LLVM IR (-O2):
define void @___before_softstop() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_Item_Str(void *str) {
  if (str) {
    char *str_char_ptr = (char *)str;
    printf("%s ", str_char_ptr);
  }
}


x86 assembly (clang, -O0):
<print_Item_Str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113f <print_Item_Str+0x2f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_Item_Str>:
test   %rdi,%rdi
je     1124 <print_Item_Str+0x14>
mov    %rdi,%rsi
lea    0xee1(%rip),%rdi
jmp    1030 <printf@plt>
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s \00"
define void @print_Item_Str(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8*, i8** %2
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s \00"
define void @print_Item_Str(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
double fabs(double const);
int Util_equal(const double tar, const double x) {
  if (tar == 0 && x == 0)
    return 1;
  return fabs(x - tar) < 1.0e-20;
}


x86 assembly (clang, -O0):
<Util_equal>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    114a <Util_equal+0x4a>
jp     114a <Util_equal+0x4a>
movsd  -0x18(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    114a <Util_equal+0x4a>
jp     114a <Util_equal+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1176 <Util_equal+0x76>
movsd  -0x18(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movaps 0xeb5(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  0xe99(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Util_equal>:
xorpd  %xmm2,%xmm2
ucomisd %xmm2,%xmm0
jne    111a <Util_equal+0x1a>
jp     111a <Util_equal+0x1a>
mov    $0x1,%eax
ucomisd %xmm2,%xmm1
jne    111a <Util_equal+0x1a>
jp     111a <Util_equal+0x1a>
ret
subsd  %xmm0,%xmm1
andpd  0xeda(%rip),%xmm1
movsd  0xee2(%rip),%xmm0
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @Util_equal(double %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = fcmp oeq double %6, 0.000000e+00
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load double, double* %5
%10 = fcmp oeq double %9, 0.000000e+00
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 1, i32* %3
br label %19
12: ; preds = %8, %2
%13 = load double, double* %5
%14 = load double, double* %4
%15 = fsub double %13, %14
%16 = call double @llvm.fabs.f64(double %15)
%17 = fcmp olt double %16, 0x3BC79CA10C924223
%18 = zext i1 %17 to i32
store i32 %18, i32* %3
br label %19
19: ; preds = %12, %11
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @Util_equal(double %0, double %1) {
%3 = fcmp oeq double %0, 0.000000e+00
%4 = fcmp oeq double %1, 0.000000e+00
%5 = and i1 %3, %4
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = fsub double %1, %0
%8 = tail call double @llvm.fabs.f64(double %7)
%9 = fcmp olt double %8, 0x3BC79CA10C924223
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %2, %6
%12 = phi i32 [ %10, %6 ], [ 1, %2 ]
ret i32 %12
}
/* Variables and functions */
char *strchr(char const *, int);
int strlen(char const *);
const char *strchrnull(const char *s, int c) {
  const char *result = strchr(s, c);
  if (!result) {
    result = s + strlen(s);
  }
  return result;
}


x86 assembly (clang, -O0):
<strchrnull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    116b <strchrnull+0x4b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchrnull>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strchr@plt>
test   %rax,%rax
je     1130 <strchrnull+0x10>
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @strchrnull(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @strchr(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %17, label %11
11: ; preds = %2
%12 = load i8*, i8** %3
%13 = load i8*, i8** %3
%14 = call i32 @strlen(i8* %13)
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
store i8* %16, i8** %5
br label %17
17: ; preds = %11, %2
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @strchrnull(i8* %0, i32 %1) {
%3 = tail call i8* @strchr(i8* dereferenceable(1) %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 @strlen(i8* %0)
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
br label %9
9: ; preds = %5, %2
%10 = phi i8* [ %3, %2 ], [ %8, %5 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ grace(int);
int fn5(int i) {
  switch (i) {
  case 1:
    if (i == 5) {
      grace(1);
      goto done;
    } else
      grace(4);
  case 2:
    grace(9);
  }
done:;
}


x86 assembly (clang, -O0):
<fn5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1,%eax
je     1140 <fn5+0x30>
jmp    112f <fn5+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1168 <fn5+0x58>
jmp    1172 <fn5+0x62>
cmpl   $0x5,-0x8(%rbp)
jne    1159 <fn5+0x49>
mov    $0x1,%edi
call   1030 <grace@plt>
jmp    1177 <fn5+0x67>
mov    $0x4,%edi
call   1030 <grace@plt>
jmp    1168 <fn5+0x58>
mov    $0x9,%edi
call   1030 <grace@plt>
jmp    1177 <fn5+0x67>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn5>:
push   %rax
cmp    $0x2,%edi
je     1125 <fn5+0x15>
cmp    $0x1,%edi
jne    112f <fn5+0x1f>
mov    $0x4,%edi
call   1030 <grace@plt>
mov    $0x9,%edi
call   1030 <grace@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn5(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %15 [
i32 1, label %5
i32 2, label %13
]
5: ; preds = %1
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 5
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 @grace(i32 1)
br label %16
10: ; preds = %5
%11 = call i32 @grace(i32 4)
br label %12
12: ; preds = %10
br label %13
13: ; preds = %1, %12
%14 = call i32 @grace(i32 9)
br label %15
15: ; preds = %13, %1
br label %16
16: ; preds = %15, %8
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fn5(i32 %0) {
switch i32 %0, label %6 [
i32 1, label %2
i32 2, label %4
]
2: ; preds = %1
%3 = tail call i32 @grace(i32 4)
br label %4
4: ; preds = %1, %2
%5 = tail call i32 @grace(i32 9)
br label %6
6: ; preds = %1, %4
ret i32 undef
}
unsigned xrop3_221_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~D;
  stk1 = S | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_221_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_221_1_1>:
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %edi,%esi
not    %edi
shl    $0x8,%edi
not    %eax
and    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_221_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = xor i32 %22, -1
store i32 %23, i32* %9
%24 = load i32, i32* %6
%25 = load i32, i32* %9
%26 = or i32 %24, %25
store i32 %26, i32* %8
%27 = load i32, i32* %8
%28 = load i32, i32* %6
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = load i32, i32* %7
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %7
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_221_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = mul nuw nsw i32 %4, 257
%6 = xor i32 %3, -1
%7 = shl nsw i32 %6, 8
%8 = xor i32 %5, -1
%9 = and i32 %7, %8
%10 = or i8 %1, %0
%11 = zext i8 %10 to i32
%12 = or i32 %9, %11
ret i32 %12
}
int int_len(int n) {
  int l = 0;
  if (n < 0) {
    n = -n;
    l++;
  }
  do {
    l++;
  } while (n /= 10);
  return l;
}


x86 assembly (clang, -O0):
<int_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1129 <int_len+0x29>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <int_len+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jne    112e <int_len+0x2e>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_len>:
mov    %edi,%eax
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
shr    $0x1f,%eax
nopl   0x0(%rax)
add    $0x1,%eax
movslq %ecx,%rdx
imul   $0x66666667,%rdx,%rcx
mov    %rcx,%rsi
shr    $0x3f,%rsi
sar    $0x22,%rcx
add    %esi,%ecx
add    $0x9,%edx
cmp    $0x12,%edx
ja     1110 <int_len+0x10>
ret

LLVM IR (-O0):
define i32 @int_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 0, %7
store i32 %8, i32* %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %11
11: ; preds = %6, %1
br label %12
12: ; preds = %15, %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %15
15: ; preds = %12
%16 = load i32, i32* %2
%17 = sdiv i32 %16, 10
store i32 %17, i32* %2
%18 = icmp ne i32 %17, 0
br i1 %18, label %12, label %19
19: ; preds = %15
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @int_len(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%3 = lshr i32 %0, 31
br label %4
4: ; preds = %4, %1
%5 = phi i32 [ %2, %1 ], [ %8, %4 ]
%6 = phi i32 [ %3, %1 ], [ %7, %4 ]
%7 = add nuw nsw i32 %6, 1
%8 = sdiv i32 %5, 10
%9 = add i32 %5, 9
%10 = icmp ult i32 %9, 19
br i1 %10, label %11, label %4
11: ; preds = %4
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Main__main();
int main() {
  Main__main();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Main__main@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <Main__main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @Main__main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @Main__main()
ret i32 0
}
int main(int argc, char **argv) {
  int ret = 0;
  ;
  if (3 >= argc) {
    ;
    goto exit;
  };
  ;
exit:;
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x3,%eax
cmp    -0x8(%rbp),%eax
jl     112c <main+0x2c>
jmp    1131 <main+0x31>
jmp    1131 <main+0x31>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = icmp sge i32 3, %7
br i1 %8, label %9, label %10
9: ; preds = %2
br label %11
10: ; preds = %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %6
ret i32 %12
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ allMotorsOff();
int /*<<< orphan*/ clearEncoders();
void theNeedful() {
  clearEncoders();
  allMotorsOff();
}


x86 assembly (clang, -O0):
<theNeedful>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <clearEncoders@plt>
mov    $0x0,%al
call   1030 <allMotorsOff@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<theNeedful>:
push   %rax
xor    %eax,%eax
call   1040 <clearEncoders@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <allMotorsOff@plt>

LLVM IR (-O0):
define void @theNeedful() {
%1 = call i32 (...) @clearEncoders()
%2 = call i32 (...) @allMotorsOff()
ret void
}

LLVM IR (-O2):
define void @theNeedful() {
%1 = tail call i32 (...) @clearEncoders()
%2 = tail call i32 (...) @allMotorsOff()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_2();
int main() {
  test_2();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_2()
ret i32 0
}
void ohci_mem_cleanup(void) { return; }


x86 assembly (clang, -O0):
<ohci_mem_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ohci_mem_cleanup>:
ret

LLVM IR (-O0):
define void @ohci_mem_cleanup() {
ret void
}

LLVM IR (-O2):
define void @ohci_mem_cleanup() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t zig_subw_u32(uint32_t lhs, uint32_t rhs, uint32_t max) {
  if (lhs < rhs) {
    return max - rhs - lhs + 1;
  } else {
    return lhs - rhs;
  }
}


x86 assembly (clang, -O0):
<zig_subw_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    1137 <zig_subw_u32+0x37>
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
sub    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1143 <zig_subw_u32+0x43>
mov    -0x10(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zig_subw_u32>:
sub    %rdi,%rdx
sub    %rsi,%rdx
lea    0x1(%rdx),%rax
sub    %rsi,%rdi
cmovge %rdi,%rax
ret

LLVM IR (-O0):
define i64 @zig_subw_u32(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %3
%12 = load i64, i64* %7
%13 = load i64, i64* %6
%14 = sub nsw i64 %12, %13
%15 = load i64, i64* %5
%16 = sub nsw i64 %14, %15
%17 = add nsw i64 %16, 1
store i64 %17, i64* %4
br label %22
18: ; preds = %3
%19 = load i64, i64* %5
%20 = load i64, i64* %6
%21 = sub nsw i64 %19, %20
store i64 %21, i64* %4
br label %22
22: ; preds = %18, %11
%23 = load i64, i64* %4
ret i64 %23
}

LLVM IR (-O2):
define i64 @zig_subw_u32(i64 %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %0, %1
%5 = add i64 %0, %1
%6 = sub i64 1, %5
%7 = add i64 %6, %2
%8 = sub nsw i64 %0, %1
%9 = select i1 %4, i64 %7, i64 %8
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
void random_seed(unsigned seed) { srand(seed); }


x86 assembly (clang, -O0):
<random_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_seed>:
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @random_seed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @srand(i32 %3)
ret void
}

LLVM IR (-O2):
define void @random_seed(i32 %0) {
%2 = tail call i32 @srand(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ R(int);
void step2a() { R(2); }


x86 assembly (clang, -O0):
<step2a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <R@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<step2a>:
mov    $0x2,%edi
jmp    1030 <R@plt>

LLVM IR (-O0):
define void @step2a() {
%1 = call i32 @R(i32 2)
ret void
}

LLVM IR (-O2):
define void @step2a() {
%1 = tail call i32 @R(i32 2)
ret void
}
long ror(long value, int n) {
  __asm__("ror %%cl, %%eax" : "=a"(value) : "a"(value), "c"(n));
  return value;
}


x86 assembly (clang, -O0):
<ror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
ror    %cl,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ror>:
mov    %esi,%ecx
mov    %rdi,%rax
ror    %cl,%eax
ret

LLVM IR (-O0):
define i64 @ror(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = call i64 asm "ror %cl, %eax", "={ax},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i64 %5, i32 %6)
store i64 %7, i64* %3
%8 = load i64, i64* %3
ret i64 %8
}

LLVM IR (-O2):
define i64 @ror(i64 %0, i32 %1) {
%3 = tail call i64 asm "ror %cl, %eax", "={ax},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i64 %0, i32 %1)
ret i64 %3
}
/* Variables and functions */
float sinf(float);
float test_06(float x) { return sinf(x); }


x86 assembly (clang, -O0):
<test_06>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_06>:
jmp    1030 <sinf@plt>

LLVM IR (-O0):
define float @test_06(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sinf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @test_06(float %0) {
%2 = tail call float @sinf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(char const *);
scalar_t__ cJSON_malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *cJSON_strdup(const char *str) {
  assert(str);
  size_t len;
  char *copy;
  len = strlen(str) + 1;
  if (!(copy = (char *)cJSON_malloc(len)))
    return 0;
  memcpy(copy, str, len);
  return copy;
}


x86 assembly (clang, -O0):
<cJSON_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <cJSON_malloc@plt>
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
jne    118b <cJSON_strdup+0x4b>
movq   $0x0,-0x8(%rbp)
jmp    11a4 <cJSON_strdup+0x64>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1060 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cJSON_strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1050 <assert@plt>
mov    %r14,%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1040 <cJSON_malloc@plt>
test   %rax,%rax
je     117b <cJSON_strdup+0x3b>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1060 <memcpy@plt>
jmp    117d <cJSON_strdup+0x3d>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @cJSON_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @assert(i8* %6)
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = add nsw i32 %9, 1
%11 = sext i32 %10 to i64
store i64 %11, i64* %4
%12 = load i64, i64* %4
%13 = call i64 @cJSON_malloc(i64 %12)
%14 = inttoptr i64 %13 to i8*
store i8* %14, i8** %5
%15 = icmp ne i8* %14, null
br i1 %15, label %17, label %16
16: ; preds = %1
store i8* null, i8** %2
br label %23
17: ; preds = %1
%18 = load i8*, i8** %5
%19 = load i8*, i8** %3
%20 = load i64, i64* %4
%21 = call i32 @memcpy(i8* %18, i8* %19, i64 %20)
%22 = load i8*, i8** %5
store i8* %22, i8** %2
br label %23
23: ; preds = %17, %16
%24 = load i8*, i8** %2
ret i8* %24
}

LLVM IR (-O2):
define i8* @cJSON_strdup(i8* %0) {
%2 = tail call i32 @assert(i8* %0)
%3 = tail call i32 @strlen(i8* %0)
%4 = add nsw i32 %3, 1
%5 = sext i32 %4 to i64
%6 = tail call i64 @cJSON_malloc(i64 %5)
%7 = inttoptr i64 %6 to i8*
%8 = icmp eq i64 %6, 0
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = tail call i32 @memcpy(i8* %7, i8* %0, i64 %5)
br label %11
11: ; preds = %1, %9
%12 = phi i8* [ %7, %9 ], [ null, %1 ]
ret i8* %12
}
/* Variables and functions */
unsigned char rand();
void onion_random_generate(void *data, size_t size) {
  unsigned char *data_char = data;
  size_t i;
  for (i = 0; i < size; ++i) {
    data_char[i] = rand();
  }
}


x86 assembly (clang, -O0):
<onion_random_generate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1163 <onion_random_generate+0x53>
mov    $0x0,%al
call   1030 <rand@plt>
mov    %al,%dl
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1130 <onion_random_generate+0x20>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<onion_random_generate>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1144 <onion_random_generate+0x34>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <rand@plt>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <onion_random_generate+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @onion_random_generate(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
store i64 0, i64* %6
br label %8
8: ; preds = %17, %2
%9 = load i64, i64* %6
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %20
12: ; preds = %8
%13 = call zeroext i8 (...) @rand()
%14 = load i8*, i8** %5
%15 = load i64, i64* %6
%16 = getelementptr inbounds i8, i8* %14, i64 %15
store i8 %13, i8* %16
br label %17
17: ; preds = %12
%18 = load i64, i64* %6
%19 = add i64 %18, 1
store i64 %19, i64* %6
br label %8
20: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @onion_random_generate(i8* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %10, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %8, %4 ], [ 0, %2 ]
%6 = tail call zeroext i8 (...) @rand()
%7 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 %6, i8* %7
%8 = add nuw i64 %5, 1
%9 = icmp eq i64 %8, %1
br i1 %9, label %10, label %4
10: ; preds = %4, %2
ret void
}
int iAMDGetTempK10(int average) { return 0; }


x86 assembly (clang, -O0):
<iAMDGetTempK10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iAMDGetTempK10>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @iAMDGetTempK10(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @iAMDGetTempK10(i32 %0) {
ret i32 0
}
double __complex__ q(double __complex__ a, double __complex__ b) {}


x86 assembly (clang, -O0):
<q>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x30(%rbp)
movsd  %xmm3,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
pop    %rbp
ret

x86 assembly (clang, -O2):
<q>:
ret

LLVM IR (-O0):
define { double, double } @q(double %0, double %1, double %2, double %3) {
%5 = alloca { double, double }
%6 = alloca { double, double }
%7 = alloca { double, double }
%8 = getelementptr inbounds { double, double }, { double, double }* %6, i32 0, i32 0
store double %0, double* %8
%9 = getelementptr inbounds { double, double }, { double, double }* %6, i32 0, i32 1
store double %1, double* %9
%10 = getelementptr inbounds { double, double }, { double, double }* %7, i32 0, i32 0
store double %2, double* %10
%11 = getelementptr inbounds { double, double }, { double, double }* %7, i32 0, i32 1
store double %3, double* %11
%12 = load { double, double }, { double, double }* %5
ret { double, double } %12
}

LLVM IR (-O2):
define { double, double } @q(double %0, double %1, double %2, double %3) {
ret { double, double } undef
}
/* Variables and functions */
scalar_t__ islower(unsigned char);
unsigned char toupper(unsigned char c) {
  if (islower(c)) {
    c -= 'a' - 'A';
  }
  return c;
}


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     113b <toupper+0x2b>
movzbl -0x1(%rbp),%eax
sub    $0x20,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
movzbl %cl,%eax
cmove  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @toupper(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @islower(i8 zeroext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = sub nsw i32 %8, 32
%10 = trunc i32 %9 to i8
store i8 %10, i8* %2
br label %11
11: ; preds = %6, %1
%12 = load i8, i8* %2
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @toupper(i8 zeroext %0) {
%2 = tail call i64 @islower(i8 zeroext %0)
%3 = icmp eq i64 %2, 0
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %0, i8 %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void errorcheck(int val) {
  if (val < 0) {
    perror("Error while writing to sample fp");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<errorcheck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    114b <errorcheck+0x2b>
lea    0xec4(%rip),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorcheck>:
test   %edi,%edi
js     1125 <errorcheck+0x5>
ret
push   %rax
lea    0xed3(%rip),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"Error while writing to sample fp\00"
define void @errorcheck(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = call i32 @perror(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"Error while writing to sample fp\00"
define void @errorcheck(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @perror(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ htonl(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, void *, int);
uint32_t get32_msb(void *in) {
  uint32_t a;
  memcpy(&a, in, sizeof(a));
  return htonl(a);
}


x86 assembly (clang, -O0):
<get32_msb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1040 <memcpy@plt>
mov    -0xc(%rbp),%edi
call   1030 <htonl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get32_msb>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1040 <memcpy@plt>
mov    0x4(%rsp),%edi
call   1030 <htonl@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get32_msb(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i32* %3, i8* %4, i32 4)
%6 = load i32, i32* %3
%7 = call i32 @htonl(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @get32_msb(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i8* %0, i32 4)
%5 = load i32, i32* %2
%6 = call i32 @htonl(i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void pendfunc2(int x) { printf("in pendfunc2, x is %d\n", x); }


x86 assembly (clang, -O0):
<pendfunc2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pendfunc2>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"in pendfunc2, x is %d\0A\00"
define void @pendfunc2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"in pendfunc2, x is %d\0A\00"
define void @pendfunc2(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int fs_ext2_probe(int fd, long long offs) { return -1; }


x86 assembly (clang, -O0):
<fs_ext2_probe>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_ext2_probe>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fs_ext2_probe(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @fs_ext2_probe(i32 %0, i64 %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void cheese_value_destroy(void *value) { free(value); }


x86 assembly (clang, -O0):
<cheese_value_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cheese_value_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @cheese_value_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @cheese_value_destroy(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ log_oom_and_exit();
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *p;
  p = malloc(size);
  if (!p) {
    log_oom_and_exit();
  }
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114b <xmalloc+0x2b>
mov    $0x0,%al
call   1030 <log_oom_and_exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <xmalloc+0x15>
xor    %eax,%eax
call   1030 <log_oom_and_exit@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 (...) @log_oom_and_exit()
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @log_oom_and_exit()
br label %6
6: ; preds = %4, %1
ret i8* %2
}
int is_lowercase(char c) {
  if (c >= 'a' && c <= 'z')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_lowercase>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1130 <is_lowercase+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1130 <is_lowercase+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <is_lowercase+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_lowercase>:
add    $0x9f,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_lowercase(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_lowercase(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void RTMemEfAlloc(void) {}


x86 assembly (clang, -O0):
<RTMemEfAlloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemEfAlloc>:
ret

LLVM IR (-O0):
define void @RTMemEfAlloc() {
ret void
}

LLVM IR (-O2):
define void @RTMemEfAlloc() {
ret void
}
float conv_ui10_to_norm_float(unsigned ui10) { return (float)(ui10) / 1023.0; }


x86 assembly (clang, -O0):
<conv_ui10_to_norm_float>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee5(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv_ui10_to_norm_float>:
mov    %edi,%eax
cvtsi2ss %rax,%xmm0
divss  0xef1(%rip),%xmm0
ret

LLVM IR (-O0):
define float @conv_ui10_to_norm_float(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = uitofp i32 %3 to float
%5 = fpext float %4 to double
%6 = fdiv double %5, 1.023000e+03
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @conv_ui10_to_norm_float(i32 %0) {
%2 = uitofp i32 %0 to float
%3 = fdiv float %2, 1.023000e+03
ret float %3
}
int TestAccessProc1(path, mode) const char *path;
int mode;
{ return ((strstr(path, "testAccess1%.fil") == 0) ? -1 : 0); }


x86 assembly (clang, -O0):
<TestAccessProc1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed6(%rip),%rsi
call   1030 <strstr@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%rdx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestAccessProc1>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strstr@plt>
cmp    $0x1,%rax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"testAccess1%.fil\00"
define i32 @TestAccessProc1(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i8* @strstr(i8* %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%7 = icmp eq i8* %6, null
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -1, i32 0
ret i32 %9
}

LLVM IR (-O2):
@.str = [17 x i8] c"testAccess1%.fil\00"
define i32 @TestAccessProc1(i8* %0, i32 %1) {
%3 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i8* %3, null
%5 = sext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ or_hl();
void opcode_b6() { or_hl(); }


x86 assembly (clang, -O0):
<opcode_b6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <or_hl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_b6>:
xor    %eax,%eax
jmp    1030 <or_hl@plt>

LLVM IR (-O0):
define void @opcode_b6() {
%1 = call i32 (...) @or_hl()
ret void
}

LLVM IR (-O2):
define void @opcode_b6() {
%1 = tail call i32 (...) @or_hl()
ret void
}
/* Type definitions */
struct strmap_map {
  int dummy;
};

/* Variables and functions */
char *strmap_getOrDefault(struct strmap_map *, char *, int /*<<< orphan*/);
char *strmap_get(struct strmap_map *map, char *key) {
  return strmap_getOrDefault(map, key, 0);
}


x86 assembly (clang, -O0):
<strmap_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <strmap_getOrDefault@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strmap_get>:
xor    %edx,%edx
jmp    1030 <strmap_getOrDefault@plt>

LLVM IR (-O0):
%struct.strmap_map = type { i32 }
define i8* @strmap_get(%struct.strmap_map* %0, i8* %1) {
%3 = alloca %struct.strmap_map*
%4 = alloca i8*
store %struct.strmap_map* %0, %struct.strmap_map** %3
store i8* %1, i8** %4
%5 = load %struct.strmap_map*, %struct.strmap_map** %3
%6 = load i8*, i8** %4
%7 = call i8* @strmap_getOrDefault(%struct.strmap_map* %5, i8* %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
%struct.strmap_map = type { i32 }
define i8* @strmap_get(%struct.strmap_map* %0, i8* %1) {
%3 = tail call i8* @strmap_getOrDefault(%struct.strmap_map* %0, i8* %1, i32 0)
ret i8* %3
}
void foo394() {}


x86 assembly (clang, -O0):
<foo394>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo394>:
ret

LLVM IR (-O0):
define void @foo394() {
ret void
}

LLVM IR (-O2):
define void @foo394() {
ret void
}
void sig_handler(int signo) {}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_handler>:
ret

LLVM IR (-O0):
define void @sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sig_handler(i32 %0) {
ret void
}