xunge/DecIR huggingface dataset:
/* Variables and functions */
int labs(long);
long randm(int);
long expr_wpn_add_crtcl(long lev) { return (randm(labs(lev) / 20 + 1)); }


x86 assembly (clang, -O0):
<expr_wpn_add_crtcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <labs@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
add    $0x1,%edi
call   1040 <randm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_wpn_add_crtcl>:
push   %rax
call   1030 <labs@plt>
cltq
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
sar    $0x23,%rcx
shr    $0x3f,%rax
lea    (%rcx,%rax,1),%edi
add    $0x1,%edi
pop    %rax
jmp    1040 <randm@plt>

LLVM IR (-O0):
define i64 @expr_wpn_add_crtcl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @labs(i64 %3)
%5 = sdiv i32 %4, 20
%6 = add nsw i32 %5, 1
%7 = call i64 @randm(i32 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @expr_wpn_add_crtcl(i64 %0) {
%2 = tail call i32 @labs(i64 %0)
%3 = sdiv i32 %2, 20
%4 = add nsw i32 %3, 1
%5 = tail call i64 @randm(i32 %4)
ret i64 %5
}
void rotate(unsigned char *state0, unsigned char *state1, unsigned char *state2,
            unsigned char *state3) {
  unsigned char temp = *state0;
  *state0 = *state1;
  *state1 = *state2;
  *state2 = *state3;
  *state3 = temp;
}


x86 assembly (clang, -O0):
<rotate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x21(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x20(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x21(%rbp),%cl
mov    -0x20(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate>:
mov    (%rdi),%r8b
mov    (%rsi),%al
mov    %al,(%rdi)
mov    (%rdx),%al
mov    %al,(%rsi)
mov    (%rcx),%al
mov    %al,(%rdx)
mov    %r8b,(%rcx)
ret

LLVM IR (-O0):
define void @rotate(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
store i8 %11, i8* %9
%12 = load i8*, i8** %6
%13 = load i8, i8* %12
%14 = load i8*, i8** %5
store i8 %13, i8* %14
%15 = load i8*, i8** %7
%16 = load i8, i8* %15
%17 = load i8*, i8** %6
store i8 %16, i8* %17
%18 = load i8*, i8** %8
%19 = load i8, i8* %18
%20 = load i8*, i8** %7
store i8 %19, i8* %20
%21 = load i8, i8* %9
%22 = load i8*, i8** %8
store i8 %21, i8* %22
ret void
}

LLVM IR (-O2):
define void @rotate(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
%5 = load i8, i8* %0
%6 = load i8, i8* %1
store i8 %6, i8* %0
%7 = load i8, i8* %2
store i8 %7, i8* %1
%8 = load i8, i8* %3
store i8 %8, i8* %2
store i8 %5, i8* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) { printf("WIP\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"WIP\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [4 x i8] c"WIP\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret i32 0
}
double pathcon_nm3_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<pathcon_nm3_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm3_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @pathcon_nm3_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @pathcon_nm3_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ print_done_without_loop_and_condition();
int main(int argc, char *argv[]) {
  print_done_without_loop_and_condition();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <print_done_without_loop_and_condition@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print_done_without_loop_and_condition@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @print_done_without_loop_and_condition()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @print_done_without_loop_and_condition()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ lgen(char *, char *, int);
void cgldsa(int n) { lgen("%s\t$%c%d,%%rax", "movq", n); }


x86 assembly (clang, -O0):
<cgldsa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1030 <lgen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgldsa>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xeef(%rip),%rsi
jmp    1030 <lgen@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s\09$%c%d,%%rax\00"
@.str.1 = [5 x i8] c"movq\00"
define void @cgldsa(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @lgen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s\09$%c%d,%%rax\00"
@.str.1 = [5 x i8] c"movq\00"
define void @cgldsa(i32 %0) {
%2 = tail call i32 @lgen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
char *strncpy_truncate(char *dest, const char *src, size_t n) {
  memcpy(dest, src, n);
  dest[n - 1] = 0;
  return dest;
}


x86 assembly (clang, -O0):
<strncpy_truncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpy_truncate>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <memcpy@plt>
movb   $0x0,-0x1(%r14,%rbx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strncpy_truncate(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
%12 = load i64, i64* %6
%13 = sub i64 %12, 1
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @strncpy_truncate(i8* returned %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
%5 = add i64 %2, -1
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i8* %0
}
/* Variables and functions */
scalar_t__ pow(unsigned long, double);
scalar_t__ round(double);
unsigned long int inverseFractional_0545_Brightness(long unsigned int x) {
  return (unsigned long int)round(12.444452148 * (double)pow(x, 0.545));
}


x86 assembly (clang, -O0):
<inverseFractional_0545_Brightness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
movsd  0xed0(%rip),%xmm0
call   1030 <pow@plt>
cvtsi2sd %rax,%xmm1
movsd  0xeb6(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1040 <round@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverseFractional_0545_Brightness>:
push   %rax
movsd  0xed7(%rip),%xmm0
call   1030 <pow@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
mulsd  0xeca(%rip),%xmm0
pop    %rax
jmp    1040 <round@plt>

LLVM IR (-O0):
define i64 @inverseFractional_0545_Brightness(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @pow(i64 %3, double 5.450000e-01)
%5 = sitofp i64 %4 to double
%6 = fmul double 0x4028E38F3B60980A, %5
%7 = call i64 @round(double %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @inverseFractional_0545_Brightness(i64 %0) {
%2 = tail call i64 @pow(i64 %0, double 5.450000e-01)
%3 = sitofp i64 %2 to double
%4 = fmul double %3, 0x4028E38F3B60980A
%5 = tail call i64 @round(double %4)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
char **os_gpx_files(const char *dirname) { fatal("Not implemented"); }


x86 assembly (clang, -O0):
<os_gpx_files>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <fatal@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_gpx_files>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Not implemented\00"
define i8** @os_gpx_files(i8* %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @fatal(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%5 = load i8**, i8*** %2
ret i8** %5
}

LLVM IR (-O2):
@.str = [16 x i8] c"Not implemented\00"
define noalias i8** @os_gpx_files(i8* nocapture readnone %0) {
%2 = tail call i32 @fatal(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i8** undef
}
/* Variables and functions */
int /*<<< orphan*/ kprintf(char *, int);
void isrHandle25() { kprintf("ISR %d.\n", 25); }


x86 assembly (clang, -O0):
<isrHandle25>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x19,%esi
call   1030 <kprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isrHandle25>:
lea    0xee9(%rip),%rdi
mov    $0x19,%esi
jmp    1030 <kprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle25() {
%1 = call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 25)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle25() {
%1 = tail call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 25)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__36__IO__makeOutput();
void WaterPumpC__WaterPumpPower__makeOutput(void) {
  HplAtm128GeneralIOPinP__36__IO__makeOutput();
}


x86 assembly (clang, -O0):
<WaterPumpC__WaterPumpPower__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__36__IO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaterPumpC__WaterPumpPower__makeOutput>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__36__IO__makeOutput@plt>

LLVM IR (-O0):
define void @WaterPumpC__WaterPumpPower__makeOutput() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__36__IO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @WaterPumpC__WaterPumpPower__makeOutput() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__36__IO__makeOutput()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_NET_C not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"MBEDTLS_NET_C not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [27 x i8] c"MBEDTLS_NET_C not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
ret i32 0
}
float LFOtri(float step, float period) {
  if (step < period / 2.0f) {
    return 1.0f - 2.0f * (step / period);
  } else {
    return 2.0f * (step / period) - 1.0f;
  }
}


x86 assembly (clang, -O0):
<LFOtri>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
divss  %xmm2,%xmm0
ucomiss %xmm1,%xmm0
jbe    1151 <LFOtri+0x51>
movss  -0x8(%rbp),%xmm1
divss  -0xc(%rbp),%xmm1
addss  %xmm1,%xmm1
movss  0xec5(%rip),%xmm0
subss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1170 <LFOtri+0x70>
movss  -0x8(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
addss  %xmm0,%xmm0
movss  0xe9d(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<LFOtri>:
movaps %xmm0,%xmm2
divss  %xmm1,%xmm2
mulss  0xef1(%rip),%xmm1
addss  %xmm2,%xmm2
movss  0xee9(%rip),%xmm3
subss  %xmm2,%xmm3
addss  0xee1(%rip),%xmm2
cmpltss %xmm1,%xmm0
andps  %xmm0,%xmm3
andnps %xmm2,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @LFOtri(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fdiv float %7, 2.000000e+00
%9 = fcmp olt float %6, %8
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load float, float* %4
%12 = load float, float* %5
%13 = fdiv float %11, %12
%14 = call float @llvm.fmuladd.f32(float -2.000000e+00, float %13, float 1.000000e+00)
store float %14, float* %3
br label %20
15: ; preds = %2
%16 = load float, float* %4
%17 = load float, float* %5
%18 = fdiv float %16, %17
%19 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %18, float -1.000000e+00)
store float %19, float* %3
br label %20
20: ; preds = %15, %10
%21 = load float, float* %3
ret float %21
}

LLVM IR (-O2):
define float @LFOtri(float %0, float %1) {
%3 = fmul float %1, 5.000000e-01
%4 = fcmp ogt float %3, %0
%5 = fdiv float %0, %1
%6 = tail call float @llvm.fmuladd.f32(float %5, float -2.000000e+00, float 1.000000e+00)
%7 = tail call float @llvm.fmuladd.f32(float %5, float 2.000000e+00, float -1.000000e+00)
%8 = select i1 %4, float %6, float %7
ret float %8
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRSCALEWINDOWEXT_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 4, torev);
}


x86 assembly (clang, -O0):
<U_WMRSCALEWINDOWEXT_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x4,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRSCALEWINDOWEXT_swap>:
mov    %esi,%edx
mov    $0x4,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRSCALEWINDOWEXT_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 4, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRSCALEWINDOWEXT_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 4, i32 %1)
ret void
}
void exit_io_context(void) {}


x86 assembly (clang, -O0):
<exit_io_context>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_io_context>:
ret

LLVM IR (-O0):
define void @exit_io_context() {
ret void
}

LLVM IR (-O2):
define void @exit_io_context() {
ret void
}
double power(double n, int p) {
  double pow = 1;
  int i;
  for (i = 1; i <= p; i++)
    pow *= n;
  return pow;
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1149 <power+0x49>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1120 <power+0x20>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
test   %edi,%edi
jle    111b <power+0x1b>
lea    -0x1(%rdi),%ecx
mov    %edi,%eax
and    $0x7,%eax
cmp    $0x7,%ecx
jae    1124 <power+0x24>
movsd  0xee7(%rip),%xmm1
jmp    1155 <power+0x55>
movsd  0xedd(%rip),%xmm0
ret
and    $0xfffffff8,%edi
movsd  0xed1(%rip),%xmm1
nop
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
add    $0xfffffff8,%edi
jne    1130 <power+0x30>
test   %eax,%eax
je     1169 <power+0x69>
nopl   0x0(%rax)
mulsd  %xmm0,%xmm1
add    $0xffffffff,%eax
jne    1160 <power+0x60>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @power(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca double
%6 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
store double 1.000000e+00, double* %5
store i32 1, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load double, double* %3
%13 = load double, double* %5
%14 = fmul double %13, %12
store double %14, double* %5
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load double, double* %5
ret double %19
}

LLVM IR (-O2):
define double @power(double %0, i32 %1) {
%3 = icmp slt i32 %1, 1
br i1 %3, label %33, label %4
4: ; preds = %2
%5 = add i32 %1, -1
%6 = and i32 %1, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %23, label %8
8: ; preds = %4
%9 = and i32 %1, -8
br label %10
10: ; preds = %10, %8
%11 = phi double [ 1.000000e+00, %8 ], [ %20, %10 ]
%12 = phi i32 [ 0, %8 ], [ %21, %10 ]
%13 = fmul double %11, %0
%14 = fmul double %13, %0
%15 = fmul double %14, %0
%16 = fmul double %15, %0
%17 = fmul double %16, %0
%18 = fmul double %17, %0
%19 = fmul double %18, %0
%20 = fmul double %19, %0
%21 = add i32 %12, 8
%22 = icmp eq i32 %21, %9
br i1 %22, label %23, label %10
23: ; preds = %10, %4
%24 = phi double [ undef, %4 ], [ %20, %10 ]
%25 = phi double [ 1.000000e+00, %4 ], [ %20, %10 ]
%26 = icmp eq i32 %6, 0
br i1 %26, label %33, label %27
27: ; preds = %23, %27
%28 = phi double [ %30, %27 ], [ %25, %23 ]
%29 = phi i32 [ %31, %27 ], [ 0, %23 ]
%30 = fmul double %28, %0
%31 = add i32 %29, 1
%32 = icmp eq i32 %31, %6
br i1 %32, label %33, label %27
33: ; preds = %23, %27, %2
%34 = phi double [ 1.000000e+00, %2 ], [ %24, %23 ], [ %30, %27 ]
ret double %34
}
/* Variables and functions */
scalar_t__ isdigit(char);
int img_is_hex_digit(char c) {
  return isdigit(c) || ((c >= 'a') && (c <= 'f')) || ((c >= 'A') && (c <= 'F'));
}


x86 assembly (clang, -O0):
<img_is_hex_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    117d <img_is_hex_digit+0x6d>
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1158 <img_is_hex_digit+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x66,%ecx
mov    %al,-0x2(%rbp)
jle    117d <img_is_hex_digit+0x6d>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x41,%ecx
mov    %al,-0x3(%rbp)
jl     1177 <img_is_hex_digit+0x67>
movsbl -0x1(%rbp),%eax
cmp    $0x46,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<img_is_hex_digit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
setne  %al
and    $0xdf,%bl
add    $0xbf,%bl
cmp    $0x6,%bl
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @img_is_hex_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isdigit(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %24, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sge i32 %8, 97
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 102
br i1 %13, label %24, label %14
14: ; preds = %10, %6
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sge i32 %16, 65
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sle i32 %20, 70
br label %22
22: ; preds = %18, %14
%23 = phi i1 [ false, %14 ], [ %21, %18 ]
br label %24
24: ; preds = %22, %10, %1
%25 = phi i1 [ true, %10 ], [ true, %1 ], [ %23, %22 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @img_is_hex_digit(i8 signext %0) {
%2 = tail call i64 @isdigit(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
unsigned int fat_getClusterRecord12(unsigned char *buf, int type) {
  if (type) {
    return ((buf[1] << 4) + (buf[0] >> 4));
  } else {
    return (((buf[1] & 0x0F) << 8) + buf[0]);
  }
}


x86 assembly (clang, -O0):
<fat_getClusterRecord12>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1134 <fat_getClusterRecord12+0x34>
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
shl    $0x4,%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    114e <fat_getClusterRecord12+0x4e>
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
and    $0xf,%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat_getClusterRecord12>:
movzbl 0x1(%rdi),%ecx
test   %esi,%esi
je     1112 <fat_getClusterRecord12+0x12>
shl    $0x4,%ecx
mov    (%rdi),%al
shr    $0x4,%al
jmp    111a <fat_getClusterRecord12+0x1a>
and    $0xf,%ecx
shl    $0x8,%ecx
mov    (%rdi),%al
movzbl %al,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fat_getClusterRecord12(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 4
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i64 0
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = ashr i32 %17, 4
%19 = add nsw i32 %13, %18
store i32 %19, i32* %3
br label %32
20: ; preds = %2
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i64 1
%23 = load i8, i8* %22
%24 = zext i8 %23 to i32
%25 = and i32 %24, 15
%26 = shl i32 %25, 8
%27 = load i8*, i8** %4
%28 = getelementptr inbounds i8, i8* %27, i64 0
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = add nsw i32 %26, %30
store i32 %31, i32* %3
br label %32
32: ; preds = %20, %8
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @fat_getClusterRecord12(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
br i1 %3, label %11, label %6
6: ; preds = %2
%7 = zext i8 %5 to i32
%8 = shl nuw nsw i32 %7, 4
%9 = load i8, i8* %0
%10 = lshr i8 %9, 4
br label %16
11: ; preds = %2
%12 = and i8 %5, 15
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 8
%15 = load i8, i8* %0
br label %16
16: ; preds = %11, %6
%17 = phi i8 [ %15, %11 ], [ %10, %6 ]
%18 = phi i32 [ %14, %11 ], [ %8, %6 ]
%19 = zext i8 %17 to i32
%20 = or i32 %18, %19
ret i32 %20
}
void g_param_spec_double() {}


x86 assembly (clang, -O0):
<g_param_spec_double>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_double>:
ret

LLVM IR (-O0):
define void @g_param_spec_double() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_double() {
ret void
}
char *langDbgDevTms9929A() { return "TMS9929A"; }


x86 assembly (clang, -O0):
<langDbgDevTms9929A>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langDbgDevTms9929A>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"TMS9929A\00"
define i8* @langDbgDevTms9929A() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"TMS9929A\00"
define i8* @langDbgDevTms9929A() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
void free_matrix(int **matrix, int height) {
  int i;
  for (i = 0; i < height; ++i)
    free(matrix[i]);
  free(matrix);
}


x86 assembly (clang, -O0):
<free_matrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_matrix+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_matrix+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_matrix>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_matrix+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_matrix+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_matrix(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = bitcast i32* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32**, i32*** %3
%22 = bitcast i32** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @free_matrix(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = bitcast i32** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast i32** %0 to i8*
tail call void @free(i8* %14)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int symlink(const char *oldpath, const char *newpath) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<symlink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<symlink>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @symlink(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @symlink(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
void tick_do_periodic_broadcast(struct clock_event_device *d) {}


x86 assembly (clang, -O0):
<tick_do_periodic_broadcast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tick_do_periodic_broadcast>:
ret

LLVM IR (-O0):
%struct.clock_event_device = type opaque
define void @tick_do_periodic_broadcast(%struct.clock_event_device* %0) {
%2 = alloca %struct.clock_event_device*
store %struct.clock_event_device* %0, %struct.clock_event_device** %2
ret void
}

LLVM IR (-O2):
%struct.clock_event_device = type opaque
define void @tick_do_periodic_broadcast(%struct.clock_event_device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ coherent_ht_finalize(unsigned int);
int /*<<< orphan*/ coherent_ht_mainboard(unsigned int);
unsigned int detect_mp_capabilities(unsigned int);
int /*<<< orphan*/ enable_routing(int /*<<< orphan*/);
unsigned int setup_smp();
int setup_coherent_ht_domain(void) {
  unsigned cpus;
  int reset_needed = 0;
  enable_routing(0);
  cpus = setup_smp();
  cpus = detect_mp_capabilities(cpus);
  coherent_ht_finalize(cpus);
  coherent_ht_mainboard(cpus);
  return reset_needed;
}


x86 assembly (clang, -O0):
<setup_coherent_ht_domain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
xor    %edi,%edi
call   1030 <enable_routing@plt>
mov    $0x0,%al
call   1070 <setup_smp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <detect_mp_capabilities@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1060 <coherent_ht_finalize@plt>
mov    -0x4(%rbp),%edi
call   1050 <coherent_ht_mainboard@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_coherent_ht_domain>:
push   %rbx
xor    %edi,%edi
call   1030 <enable_routing@plt>
xor    %eax,%eax
call   1070 <setup_smp@plt>
mov    %eax,%edi
call   1040 <detect_mp_capabilities@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1060 <coherent_ht_finalize@plt>
mov    %ebx,%edi
call   1050 <coherent_ht_mainboard@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @setup_coherent_ht_domain() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
%3 = call i32 @enable_routing(i32 0)
%4 = call i32 (...) @setup_smp()
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = call i32 @detect_mp_capabilities(i32 %5)
store i32 %6, i32* %1
%7 = load i32, i32* %1
%8 = call i32 @coherent_ht_finalize(i32 %7)
%9 = load i32, i32* %1
%10 = call i32 @coherent_ht_mainboard(i32 %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @setup_coherent_ht_domain() {
%1 = tail call i32 @enable_routing(i32 0)
%2 = tail call i32 (...) @setup_smp()
%3 = tail call i32 @detect_mp_capabilities(i32 %2)
%4 = tail call i32 @coherent_ht_finalize(i32 %3)
%5 = tail call i32 @coherent_ht_mainboard(i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_BROADCAST;
int /*<<< orphan*/ setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/,
                              char *, int);
void set_socket_broadcast(int s) {
  int opt = 1;
  setsockopt(s, SOL_SOCKET, SO_BROADCAST, (char *)&opt, sizeof(int));
}


x86 assembly (clang, -O0):
<set_socket_broadcast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
lea    -0x8(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_socket_broadcast>:
push   %rax
movl   $0x1,0x4(%rsp)
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
mov    0x2eb7(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rax
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_BROADCAST = global i32 0
define void @set_socket_broadcast(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* @SOL_SOCKET
%6 = load i32, i32* @SO_BROADCAST
%7 = bitcast i32* %3 to i8*
%8 = call i32 @setsockopt(i32 %4, i32 %5, i32 %6, i8* %7, i32 4)
ret void
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_BROADCAST = global i32 0
define void @set_socket_broadcast(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 1, i32* %2
%4 = load i32, i32* @SOL_SOCKET
%5 = load i32, i32* @SO_BROADCAST
%6 = call i32 @setsockopt(i32 %0, i32 %4, i32 %5, i8* %3, i32 4)
ret void
}
int intGt(const void *i1, const void *i2) {
  return (*((int *)i1) > *((int *)i2));
  ;
}


x86 assembly (clang, -O0):
<intGt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intGt>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
setg   %al
ret

LLVM IR (-O0):
define i32 @intGt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp sgt i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @intGt(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ lprintf(char *, int);
int system(char *);
void start_gconf(void) {
  int ret;
  ret = system("gconftool-2 --spawn");
  if (ret)
    lprintf("failed to start gconftool-2: %d", ret);
}


x86 assembly (clang, -O0):
<start_gconf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <system@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1150 <start_gconf+0x30>
mov    -0x4(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1040 <lprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_gconf>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
test   %eax,%eax
je     1140 <start_gconf+0x20>
lea    0xedc(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <lprintf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [20 x i8] c"gconftool-2 --spawn\00"
@.str.1 = [32 x i8] c"failed to start gconftool-2: %d\00"
define void @start_gconf() {
%1 = alloca i32
%2 = call i32 @system(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32, i32* %1
%7 = call i32 @lprintf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"gconftool-2 --spawn\00"
@.str.1 = [32 x i8] c"failed to start gconftool-2: %d\00"
define void @start_gconf() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @lprintf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0), i32 %1)
br label %5
5: ; preds = %3, %0
ret void
}
int is_smp_system(void) { return 1; }


x86 assembly (clang, -O0):
<is_smp_system>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_smp_system>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_smp_system() {
ret i32 1
}

LLVM IR (-O2):
define i32 @is_smp_system() {
ret i32 1
}
/* Type definitions */
struct plugin {
  int dummy;
};
struct command {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ write_cmd(int, char **, struct command *, struct plugin *);
int main() {
  int argc = 0;
  char **argv = NULL;
  struct command *cmd = NULL;
  struct plugin *plugin = NULL;
  write_cmd(argc, argv, cmd, plugin);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <write_cmd@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <write_cmd@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.command = type { i32 }
%struct.plugin = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8**
%4 = alloca %struct.command*
%5 = alloca %struct.plugin*
store i32 0, i32* %1
store i32 0, i32* %2
store i8** null, i8*** %3
store %struct.command* null, %struct.command** %4
store %struct.plugin* null, %struct.plugin** %5
%6 = load i32, i32* %2
%7 = load i8**, i8*** %3
%8 = load %struct.command*, %struct.command** %4
%9 = load %struct.plugin*, %struct.plugin** %5
%10 = call i32 @write_cmd(i32 %6, i8** %7, %struct.command* %8, %struct.plugin* %9)
ret i32 0
}

LLVM IR (-O2):
%struct.command = type { i32 }
%struct.plugin = type { i32 }
define i32 @main() {
%1 = tail call i32 @write_cmd(i32 0, i8** null, %struct.command* null, %struct.plugin* null)
ret i32 0
}
int tab(char c) { return c == '\t'; }


x86 assembly (clang, -O0):
<tab>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tab>:
xor    %eax,%eax
cmp    $0x9,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @tab(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 9
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @tab(i8 signext %0) {
%2 = icmp eq i8 %0, 9
%3 = zext i1 %2 to i32
ret i32 %3
}
void spin(void) {}


x86 assembly (clang, -O0):
<spin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spin>:
ret

LLVM IR (-O0):
define void @spin() {
ret void
}

LLVM IR (-O2):
define void @spin() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Init_ApplePushClient();
void Init_applePush_extension() { Init_ApplePushClient(); }


x86 assembly (clang, -O0):
<Init_applePush_extension>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Init_ApplePushClient@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init_applePush_extension>:
xor    %eax,%eax
jmp    1030 <Init_ApplePushClient@plt>

LLVM IR (-O0):
define void @Init_applePush_extension() {
%1 = call i32 (...) @Init_ApplePushClient()
ret void
}

LLVM IR (-O2):
define void @Init_applePush_extension() {
%1 = tail call i32 (...) @Init_ApplePushClient()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g(int /*<<< orphan*/);
void f2() {
  int *ip = 0;
  ip = 0;
  g(0);
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x8(%rbp)
xor    %edi,%edi
call   1030 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
xor    %edi,%edi
jmp    1030 <g@plt>

LLVM IR (-O0):
define void @f2() {
%1 = alloca i32*
store i32* null, i32** %1
store i32* null, i32** %1
%2 = call i32 @g(i32 0)
ret void
}

LLVM IR (-O2):
define void @f2() {
%1 = tail call i32 @g(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x = 285;
  int y = 23;
  assert(x / y == 12);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x11d,-0x8(%rbp)
movl   $0x17,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0xc,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 285, i32* %2
store i32 23, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = sdiv i32 %4, %5
%7 = icmp eq i32 %6, 12
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ bar(char *, double, double, double, int);
int main(void) {
  char dummy[64];
  bar("eeee", 5.444567, 8.90765, 4.567789, 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xef2(%rip),%rdi
movsd  0xed2(%rip),%xmm0
movsd  0xed2(%rip),%xmm1
movsd  0xed2(%rip),%xmm2
mov    $0x5,%esi
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xf00(%rip),%rdi
movsd  0xee0(%rip),%xmm0
movsd  0xee0(%rip),%xmm1
movsd  0xee0(%rip),%xmm2
mov    $0x5,%esi
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"eeee\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [64 x i8]
store i32 0, i32* %1
%3 = call i32 @bar(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), double 0x4015C73C925785F9, double 8.907650e+00, double 0x4012456A7AC81D3B, i32 5)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"eeee\00"
define i32 @main() {
%1 = tail call i32 @bar(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), double 0x4015C73C925785F9, double 8.907650e+00, double 0x4012456A7AC81D3B, i32 5)
ret i32 0
}
/* Variables and functions */
void *calloc(size_t, size_t);
int bt_calloc(void **ptr, size_t num, size_t size) {
  *ptr = calloc(num, size);
  if (*ptr || !num)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<bt_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1154 <bt_calloc+0x44>
cmpq   $0x0,-0x18(%rbp)
jne    1160 <bt_calloc+0x50>
movl   $0x0,-0x4(%rbp)
jmp    1167 <bt_calloc+0x57>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bt_calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1030 <calloc@plt>
mov    %rax,(%r14)
test   %rax,%rax
sete   %al
test   %rbx,%rbx
setne  %cl
and    %al,%cl
movzbl %cl,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @bt_calloc(i8** %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i64
store i8** %0, i8*** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %6
%9 = load i64, i64* %7
%10 = call i8* @calloc(i64 %8, i64 %9)
%11 = load i8**, i8*** %5
store i8* %10, i8** %11
%12 = load i8**, i8*** %5
%13 = load i8*, i8** %12
%14 = icmp ne i8* %13, null
br i1 %14, label %18, label %15
15: ; preds = %3
%16 = load i64, i64* %6
%17 = icmp ne i64 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %15, %3
store i32 0, i32* %4
br label %20
19: ; preds = %15
store i32 1, i32* %4
br label %20
20: ; preds = %19, %18
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @bt_calloc(i8** nocapture writeonly %0, i64 %1, i64 %2) {
%4 = tail call i8* @calloc(i64 %1, i64 %2)
store i8* %4, i8** %0
%5 = icmp eq i8* %4, null
%6 = icmp ne i64 %1, 0
%7 = and i1 %6, %5
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int k, m;
  scanf("%d %d", &m, &k);
  int temp = m % k;
  printf("%d\n", temp);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0xc(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    %rsp,%rsi
lea    0x4(%rsp),%rdx
call   1040 <scanf@plt>
mov    (%rsp),%eax
cltd
idivl  0x4(%rsp)
lea    0xec2(%rip),%rdi
mov    %edx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %3, i32* %2)
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = srem i32 %6, %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %1)
%6 = load i32, i32* %2
%7 = load i32, i32* %1
%8 = srem i32 %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
scalar_t__ atanhl(long double);
int /*<<< orphan*/ link_failure_atanhl();
void test_atanhl(long double ld) {
  if (atanhl(ld) != atanhl(ld))
    link_failure_atanhl();
}


x86 assembly (clang, -O0):
<test_atanhl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <atanhl@plt>
mov    %rax,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <atanhl@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1163 <test_atanhl+0x43>
mov    $0x0,%al
call   1040 <link_failure_atanhl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_atanhl>:
push   %rbx
sub    $0x20,%rsp
fldt   0x30(%rsp)
fld    %st(0)
fstpt  0x14(%rsp)
fstpt  (%rsp)
call   1030 <atanhl@plt>
mov    %rax,%rbx
fldt   0x14(%rsp)
fstpt  (%rsp)
call   1030 <atanhl@plt>
cmp    %rax,%rbx
jne    1151 <test_atanhl+0x31>
add    $0x20,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
jmp    1040 <link_failure_atanhl@plt>

LLVM IR (-O0):
define void @test_atanhl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @atanhl(x86_fp80 %3)
%5 = load x86_fp80, x86_fp80* %2
%6 = call i64 @atanhl(x86_fp80 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_atanhl()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_atanhl(x86_fp80 %0) {
%2 = tail call i64 @atanhl(x86_fp80 %0)
%3 = tail call i64 @atanhl(x86_fp80 %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_atanhl()
br label %7
7: ; preds = %5, %1
ret void
}