#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void ADCIntEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ASSERT((ui32Base == 0x40038000) || (ui32Base == 0x40039000));
  ASSERT(ui32SequenceNum < 4);
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) = 1 << ui32SequenceNum;
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) |= 1 << ui32SequenceNum;
}


x86 assembly (clang, -O0):
<ADCIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40038000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <ADCIntEnable+0x2d>
cmpl   $0x40039000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x4,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntEnable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40038000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%ebx
setl   %dil
call   1030 <ASSERT@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
movslq %ebp,%rcx
mov    %eax,0xc(%rcx)
or     %eax,0x8(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ADCIntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 4
%16 = zext i1 %15 to i32
%17 = call i32 @ASSERT(i32 %16)
%18 = load i32, i32* %4
%19 = shl i32 1, %18
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 12
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %19, i32* %23
%24 = load i32, i32* %4
%25 = shl i32 1, %24
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 8
%28 = sext i32 %27 to i64
%29 = inttoptr i64 %28 to i32*
%30 = load volatile i32, i32* %29
%31 = or i32 %30, %25
store volatile i32 %31, i32* %29
ret void
}

LLVM IR (-O2):
define void @ADCIntEnable(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp slt i32 %1, 4
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = shl nuw i32 1, %1
%11 = add nsw i32 %0, 12
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %10, i32* %13
%14 = add nsw i32 %0, 8
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %10
store volatile i32 %18, i32* %16
ret void
}