#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
signed int fc8180_ppi_byteread(void *handle, unsigned short addr,
                               unsigned char *data) {
  unsigned int length = 1;
  unsigned char cmd = 0x40 | ((length & 0x0f0000) >> 16);
  OAL_OBTAIN_SEMAPHORE();
  (*(volatile unsigned char *)(0x00)) = addr;
  (*(volatile unsigned char *)(0x00)) = addr >> 4;
  (*(volatile unsigned char *)(0x00)) = addr >> 8;
  (*(volatile unsigned char *)(0x00)) = addr >> 12;
  (*(volatile unsigned char *)(0x00)) = cmd >> 4;
  (*(volatile unsigned char *)(0x00)) = cmd;
  (*(volatile unsigned char *)(0x00)) = length >> 12;
  (*(volatile unsigned char *)(0x00)) = length >> 8;
  (*(volatile unsigned char *)(0x00)) = length >> 4;
  (*(volatile unsigned char *)(0x00)) = length;
  *data = ((*(volatile unsigned char *)(0x00)) & 0x0f) << 4;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f);
  OAL_RELEASE_SEMAPHORE();
  return 0;
}


x86 assembly (clang, -O0):
<fc8180_ppi_byteread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
and    $0xf0000,%eax
shr    $0x10,%eax
or     $0x40,%eax
mov    %al,-0x1d(%rbp)
mov    $0x0,%al
call   1040 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0xa(%rbp),%ax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0x4,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0xc,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzbl -0x1d(%rbp),%eax
sar    $0x4,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1d(%rbp),%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
shr    $0xc,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
shr    $0x4,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%edx
and    $0xf,%edx
mov    -0x18(%rbp),%rax
movzbl (%rax),%ecx
or     %edx,%ecx
mov    %cl,(%rax)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8180_ppi_byteread>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %esi,%ebx
xor    %eax,%eax
call   1040 <OAL_OBTAIN_SEMAPHORE@plt>
mov    %bl,0x0
mov    %ebx,%eax
shr    $0x4,%eax
mov    %al,0x0
mov    %bh,0x0
shr    $0xc,%ebx
mov    %bl,0x0
movb   $0x4,0x0
04
movb   $0x40,0x0
40
movb   $0x0,0x0
movb   $0x0,0x0
movb   $0x0,0x0
movb   $0x1,0x0
01
mov    0x0,%al
shl    $0x4,%al
mov    0x0,%cl
and    $0xf,%cl
or     %al,%cl
mov    %cl,(%r14)
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fc8180_ppi_byteread(i8* %0, i16 zeroext %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i16 %1, i16* %5
store i8* %2, i8** %6
store i32 1, i32* %7
%9 = load i32, i32* %7
%10 = and i32 %9, 983040
%11 = lshr i32 %10, 16
%12 = or i32 64, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %8
%14 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%15 = load i16, i16* %5
%16 = trunc i16 %15 to i8
store volatile i8 %16, i8* null
%17 = load i16, i16* %5
%18 = zext i16 %17 to i32
%19 = ashr i32 %18, 4
%20 = trunc i32 %19 to i8
store volatile i8 %20, i8* null
%21 = load i16, i16* %5
%22 = zext i16 %21 to i32
%23 = ashr i32 %22, 8
%24 = trunc i32 %23 to i8
store volatile i8 %24, i8* null
%25 = load i16, i16* %5
%26 = zext i16 %25 to i32
%27 = ashr i32 %26, 12
%28 = trunc i32 %27 to i8
store volatile i8 %28, i8* null
%29 = load i8, i8* %8
%30 = zext i8 %29 to i32
%31 = ashr i32 %30, 4
%32 = trunc i32 %31 to i8
store volatile i8 %32, i8* null
%33 = load i8, i8* %8
store volatile i8 %33, i8* null
%34 = load i32, i32* %7
%35 = lshr i32 %34, 12
%36 = trunc i32 %35 to i8
store volatile i8 %36, i8* null
%37 = load i32, i32* %7
%38 = lshr i32 %37, 8
%39 = trunc i32 %38 to i8
store volatile i8 %39, i8* null
%40 = load i32, i32* %7
%41 = lshr i32 %40, 4
%42 = trunc i32 %41 to i8
store volatile i8 %42, i8* null
%43 = load i32, i32* %7
%44 = trunc i32 %43 to i8
store volatile i8 %44, i8* null
%45 = load volatile i8, i8* null
%46 = zext i8 %45 to i32
%47 = and i32 %46, 15
%48 = shl i32 %47, 4
%49 = trunc i32 %48 to i8
%50 = load i8*, i8** %6
store i8 %49, i8* %50
%51 = load volatile i8, i8* null
%52 = zext i8 %51 to i32
%53 = and i32 %52, 15
%54 = load i8*, i8** %6
%55 = load i8, i8* %54
%56 = zext i8 %55 to i32
%57 = or i32 %56, %53
%58 = trunc i32 %57 to i8
store i8 %58, i8* %54
%59 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8180_ppi_byteread(i8* nocapture readnone %0, i16 zeroext %1, i8* nocapture writeonly %2) {
%4 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%5 = trunc i16 %1 to i8
store volatile i8 %5, i8* null
%6 = lshr i16 %1, 4
%7 = trunc i16 %6 to i8
store volatile i8 %7, i8* null
%8 = lshr i16 %1, 8
%9 = trunc i16 %8 to i8
store volatile i8 %9, i8* null
%10 = lshr i16 %1, 12
%11 = trunc i16 %10 to i8
store volatile i8 %11, i8* null
store volatile i8 4, i8* null
store volatile i8 64, i8* null
store volatile i8 0, i8* null
store volatile i8 0, i8* null
store volatile i8 0, i8* null
store volatile i8 1, i8* null
%12 = load volatile i8, i8* null
%13 = shl i8 %12, 4
%14 = load volatile i8, i8* null
%15 = and i8 %14, 15
%16 = or i8 %15, %13
store i8 %16, i8* %2
%17 = tail call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 0
}