xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ __local_send_IPI_all(int);
void send_IPI_all(int vector) { __local_send_IPI_all(vector); }


x86 assembly (clang, -O0):
<send_IPI_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__local_send_IPI_all@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_IPI_all>:
jmp    1030 <__local_send_IPI_all@plt>

LLVM IR (-O0):
define void @send_IPI_all(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__local_send_IPI_all(i32 %3)
ret void
}

LLVM IR (-O2):
define void @send_IPI_all(i32 %0) {
%2 = tail call i32 @__local_send_IPI_all(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int NSIG;
int /*<<< orphan*/ __SIGDELSET(int /*<<< orphan*/ *, int);
int /*<<< orphan*/ errno;
int sigdelset(sigset_t *set, int signo) {
  if (signo <= 0 || signo >= NSIG) {
    errno = EINVAL;
    return -1;
  }
  __SIGDELSET(set, signo);
  return (0);
}


x86 assembly (clang, -O0):
<sigdelset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    113b <sigdelset+0x2b>
mov    -0x14(%rbp),%eax
mov    0x2e9d(%rip),%rcx
cmp    (%rcx),%eax
jl     1159 <sigdelset+0x49>
mov    0x2e96(%rip),%rax
mov    (%rax),%ecx
mov    0x2e95(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    116c <sigdelset+0x5c>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <__SIGDELSET@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigdelset>:
push   %rax
test   %esi,%esi
jle    1129 <sigdelset+0x19>
mov    0x2eb4(%rip),%rax
cmp    %esi,(%rax)
jle    1129 <sigdelset+0x19>
call   1030 <__SIGDELSET@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    0x2ea8(%rip),%rax
mov    (%rax),%eax
mov    0x2ea7(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@NSIG = global i32 0
@EINVAL = global i32 0
@errno = global i32 0
define i32 @sigdelset(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sle i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = load i32, i32* @NSIG
%11 = icmp sge i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8, %2
%13 = load i32, i32* @EINVAL
store i32 %13, i32* @errno
store i32 -1, i32* %3
br label %18
14: ; preds = %8
%15 = load i32*, i32** %4
%16 = load i32, i32* %5
%17 = call i32 @__SIGDELSET(i32* %15, i32 %16)
store i32 0, i32* %3
br label %18
18: ; preds = %14, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@NSIG = global i32 0
@EINVAL = global i32 0
@errno = global i32 0
define i32 @sigdelset(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = load i32, i32* @NSIG
%5 = icmp sgt i32 %4, %1
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = load i32, i32* @EINVAL
store i32 %8, i32* @errno
br label %11
9: ; preds = %2
%10 = tail call i32 @__SIGDELSET(i32* %0, i32 %1)
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ -1, %7 ], [ 0, %9 ]
ret i32 %12
}
int test_imm_80int16_mem(short *val) {
  return ((*val) & (0x80 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_80int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x80,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_80int16_mem>:
testb  $0x80,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_80int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 128
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_80int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 128
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void mr97311_setbrightness(struct usb_spca50x *spca50x) {}


x86 assembly (clang, -O0):
<mr97311_setbrightness>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mr97311_setbrightness>:
ret

LLVM IR (-O0):
%struct.usb_spca50x = type opaque
define void @mr97311_setbrightness(%struct.usb_spca50x* %0) {
%2 = alloca %struct.usb_spca50x*
store %struct.usb_spca50x* %0, %struct.usb_spca50x** %2
ret void
}

LLVM IR (-O2):
%struct.usb_spca50x = type opaque
define void @mr97311_setbrightness(%struct.usb_spca50x* nocapture %0) {
ret void
}
int isdigit(int x) {
  if (x <= '9' && x >= '0')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x39,-0x8(%rbp)
jg     1127 <isdigit+0x27>
cmpl   $0x30,-0x8(%rbp)
jl     1127 <isdigit+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <isdigit+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 57
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 48
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
long double sqrt(long double);
long double fun_sqrt(long double a) { return sqrt(a); }


x86 assembly (clang, -O0):
<fun_sqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <sqrt@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_sqrt>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fld    %st(0)
fsqrt
fldz
fxch   %st(2)
fucomi %st(2),%st
fstp   %st(2)
jb     112d <fun_sqrt+0x1d>
fstp   %st(1)
add    $0x18,%rsp
ret
fstp   %st(0)
fstpt  (%rsp)
call   1030 <sqrt@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @fun_sqrt(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @sqrt(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @fun_sqrt(x86_fp80 %0) {
%2 = tail call x86_fp80 @sqrt(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char *);
void print_alloc_status(const char *data_descr, int err) {
  printf("allocation check for %s... %s\n", data_descr,
         (err) ? "FAILED (see above for more info)" : "DONE");
}


x86 assembly (clang, -O0):
<print_alloc_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%ecx
lea    0xf13(%rip),%rdx
lea    0xeeb(%rip),%rax
cmp    $0x0,%ecx
cmovne %rax,%rdx
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_alloc_status>:
mov    %rdi,%rax
test   %esi,%esi
lea    0xf24(%rip),%rcx
lea    0xefc(%rip),%rdx
cmove  %rcx,%rdx
lea    0xed2(%rip),%rdi
mov    %rax,%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"allocation check for %s... %s\0A\00"
@.str.1 = [33 x i8] c"FAILED (see above for more info)\00"
@.str.2 = [5 x i8] c"DONE\00"
define void @print_alloc_status(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0)
%10 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"allocation check for %s... %s\0A\00"
@.str.1 = [33 x i8] c"FAILED (see above for more info)\00"
@.str.2 = [5 x i8] c"DONE\00"
define void @print_alloc_status(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_mvtipl(int);
void set_interrupts(void) { __builtin_mvtipl(3); }


x86 assembly (clang, -O0):
<set_interrupts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <__builtin_mvtipl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_interrupts>:
mov    $0x3,%edi
jmp    1030 <__builtin_mvtipl@plt>

LLVM IR (-O0):
define void @set_interrupts() {
%1 = call i32 @__builtin_mvtipl(i32 3)
ret void
}

LLVM IR (-O2):
define void @set_interrupts() {
%1 = tail call i32 @__builtin_mvtipl(i32 3)
ret void
}
/* Variables and functions */
int ArgNum();
int /*<<< orphan*/ GetFlag(int);
int /*<<< orphan*/ SetFlag(int, int /*<<< orphan*/);
void Act_CopyFF(void) {
  int a = ArgNum();
  int b = ArgNum();
  SetFlag(b, GetFlag(a));
}


x86 assembly (clang, -O0):
<Act_CopyFF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <ArgNum@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1050 <ArgNum@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <GetFlag@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1030 <SetFlag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Act_CopyFF>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <ArgNum@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <ArgNum@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <GetFlag@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <SetFlag@plt>

LLVM IR (-O0):
define void @Act_CopyFF() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @ArgNum()
store i32 %3, i32* %1
%4 = call i32 (...) @ArgNum()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* %1
%7 = call i32 @GetFlag(i32 %6)
%8 = call i32 @SetFlag(i32 %5, i32 %7)
ret void
}

LLVM IR (-O2):
define void @Act_CopyFF() {
%1 = tail call i32 (...) @ArgNum()
%2 = tail call i32 (...) @ArgNum()
%3 = tail call i32 @GetFlag(i32 %1)
%4 = tail call i32 @SetFlag(i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __mf_set_options(char *);
struct boo *malloc(int);
int main() {
  struct boo {
    int a;
  };
  int c;
  struct boo *b = malloc(sizeof(struct boo));
  __mf_set_options("-check-initialization");
  b->a = 0;
  c = b->a;
  (void)malloc(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
lea    0xebc(%rip),%rdi
call   1040 <__mf_set_options@plt>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <malloc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
lea    0xece(%rip),%rdi
call   1040 <__mf_set_options@plt>
xor    %edi,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.boo = type { i32 }
%struct.boo.0 = type opaque
@.str = [22 x i8] c"-check-initialization\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca %struct.boo*
store i32 0, i32* %1
%4 = call %struct.boo.0* @malloc(i32 4)
%5 = bitcast %struct.boo.0* %4 to %struct.boo*
store %struct.boo* %5, %struct.boo** %3
%6 = call i32 @__mf_set_options(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%7 = load %struct.boo*, %struct.boo** %3
%8 = getelementptr inbounds %struct.boo, %struct.boo* %7, i32 0, i32 0
store i32 0, i32* %8
%9 = load %struct.boo*, %struct.boo** %3
%10 = getelementptr inbounds %struct.boo, %struct.boo* %9, i32 0, i32 0
%11 = load i32, i32* %10
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = call %struct.boo.0* @malloc(i32 %12)
ret i32 0
}

LLVM IR (-O2):
%struct.boo.0 = type opaque
@.str = [22 x i8] c"-check-initialization\00"
define i32 @main() {
%1 = tail call %struct.boo.0* @malloc(i32 4)
%2 = tail call i32 @__mf_set_options(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%3 = tail call %struct.boo.0* @malloc(i32 0)
ret i32 0
}
int f_blt_mm2(float *a1, float *a2) { return !(__builtin_isless(*a1, *a2)); }


x86 assembly (clang, -O0):
<f_blt_mm2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_blt_mm2>:
movss  (%rsi),%xmm0
xor    %eax,%eax
ucomiss (%rdi),%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @f_blt_mm2(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = fcmp olt float %6, %8
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @f_blt_mm2(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = fcmp uge float %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int flteq(double f1, double f2) {
  double upperbnd, lowerbnd;
  upperbnd = f2 + (0.000002);
  lowerbnd = f2 - (0.000002);
  if ((f1 > upperbnd) || (f1 < lowerbnd))
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<flteq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  0xeea(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xed3(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
ja     115a <flteq+0x5a>
movsd  -0x10(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1166 <flteq+0x66>
movl   $0x0,-0x4(%rbp)
jmp    116d <flteq+0x6d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flteq>:
movsd  0xef8(%rip),%xmm2
addsd  %xmm1,%xmm2
ucomisd %xmm2,%xmm0
setbe  %al
addsd  0xeed(%rip),%xmm1
ucomisd %xmm0,%xmm1
setbe  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @flteq(double %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
%8 = load double, double* %5
%9 = fadd double %8, 2.000000e-06
store double %9, double* %6
%10 = load double, double* %5
%11 = fsub double %10, 2.000000e-06
store double %11, double* %7
%12 = load double, double* %4
%13 = load double, double* %6
%14 = fcmp ogt double %12, %13
br i1 %14, label %19, label %15
15: ; preds = %2
%16 = load double, double* %4
%17 = load double, double* %7
%18 = fcmp olt double %16, %17
br i1 %18, label %19, label %20
19: ; preds = %15, %2
store i32 0, i32* %3
br label %21
20: ; preds = %15
store i32 1, i32* %3
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @flteq(double %0, double %1) {
%3 = fadd double %1, 2.000000e-06
%4 = fcmp uge double %3, %0
%5 = fadd double %1, -2.000000e-06
%6 = fcmp ule double %5, %0
%7 = and i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
#define SIGALRM 129
#define SIGUSR1 128
int /*<<< orphan*/ alarm_interrupt();
int /*<<< orphan*/ ipi_interrupt();
void signal_handler(int signo, siginfo_t *info, void *context) {
  (void)info;
  (void)context;
  switch (signo) {
  case SIGALRM:
    alarm_interrupt();
    break;
  case SIGUSR1:
    ipi_interrupt();
    break;
  default:
    break;
  }
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
sub    $0x80,%eax
je     1168 <signal_handler+0x48>
jmp    1149 <signal_handler+0x29>
mov    -0x1c(%rbp),%eax
sub    $0x81,%eax
jne    1174 <signal_handler+0x54>
jmp    115c <signal_handler+0x3c>
mov    $0x0,%al
call   1030 <alarm_interrupt@plt>
jmp    1179 <signal_handler+0x59>
mov    $0x0,%al
call   1040 <ipi_interrupt@plt>
jmp    1179 <signal_handler+0x59>
jmp    1179 <signal_handler+0x59>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_handler>:
cmp    $0x80,%edi
je     1137 <signal_handler+0x17>
cmp    $0x81,%edi
jne    113e <signal_handler+0x1e>
xor    %eax,%eax
jmp    1030 <alarm_interrupt@plt>
xor    %eax,%eax
jmp    1040 <ipi_interrupt@plt>
ret

LLVM IR (-O0):
define void @signal_handler(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32*, i32** %5
%8 = load i8*, i8** %6
%9 = load i32, i32* %4
switch i32 %9, label %14 [
i32 129, label %10
i32 128, label %12
]
10: ; preds = %3
%11 = call i32 (...) @alarm_interrupt()
br label %15
12: ; preds = %3
%13 = call i32 (...) @ipi_interrupt()
br label %15
14: ; preds = %3
br label %15
15: ; preds = %14, %12, %10
ret void
}

LLVM IR (-O2):
define void @signal_handler(i32 %0, i32* nocapture readnone %1, i8* nocapture readnone %2) {
switch i32 %0, label %8 [
i32 129, label %4
i32 128, label %6
]
4: ; preds = %3
%5 = tail call i32 (...) @alarm_interrupt()
br label %8
6: ; preds = %3
%7 = tail call i32 (...) @ipi_interrupt()
br label %8
8: ; preds = %3, %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
scalar_t__ getuid();
int /*<<< orphan*/ stderr;
void msgheader(void) { fprintf(stderr, "[fakesyslog][%d] ", (int)getuid()); }


x86 assembly (clang, -O0):
<msgheader>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2eb1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getuid@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%edx
lea    0xeb9(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgheader>:
push   %rbx
mov    0x2eb8(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <getuid@plt>
lea    0xec8(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"[fakesyslog][%d] \00"
define void @msgheader() {
%1 = load i32, i32* @stderr
%2 = call i64 (...) @getuid()
%3 = trunc i64 %2 to i32
%4 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"[fakesyslog][%d] \00"
define void @msgheader() {
%1 = load i32, i32* @stderr
%2 = tail call i64 (...) @getuid()
%3 = trunc i64 %2 to i32
%4 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
int main(void) {
  int c = 0;
  typedef enum a b;
  enum a {
    d,
  };
  b a;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int test_imm_E2uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xE2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E2uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xe2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E2uint64_lowword_mem>:
testb  $0xe2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E2uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 226
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E2uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 226
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
void prI(char *str, int i) { printf("%s: %d\n", str, i); }


x86 assembly (clang, -O0):
<prI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prI>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %d\0A\00"
define void @prI(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %d\0A\00"
define void @prI(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
/* Variables and functions */
void *xmalloc(size_t);
void *polybench_alloc_data(unsigned long long int n, int elt_size) {
  size_t val = n;
  val *= elt_size;
  void *ret = xmalloc(val);
  return ret;
}


x86 assembly (clang, -O0):
<polybench_alloc_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movslq -0xc(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <xmalloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<polybench_alloc_data>:
movslq %esi,%rax
imul   %rax,%rdi
jmp    1030 <xmalloc@plt>

LLVM IR (-O0):
define i8* @polybench_alloc_data(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i64
%6 = alloca i8*
store i64 %0, i64* %3
store i32 %1, i32* %4
%7 = load i64, i64* %3
store i64 %7, i64* %5
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = load i64, i64* %5
%11 = mul i64 %10, %9
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = call i8* @xmalloc(i64 %12)
store i8* %13, i8** %6
%14 = load i8*, i8** %6
ret i8* %14
}

LLVM IR (-O2):
define i8* @polybench_alloc_data(i64 %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = mul i64 %3, %0
%5 = tail call i8* @xmalloc(i64 %4)
ret i8* %5
}
/* Type definitions */
struct inode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __mark_inode_dirty(struct inode *, int);
__attribute__((always_)) void mark_inode_dirty(struct inode *inode) {
  __mark_inode_dirty(inode, (1 | 2 | 4));
}


x86 assembly (clang, -O0):
<mark_inode_dirty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x7,%esi
call   1030 <__mark_inode_dirty@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mark_inode_dirty>:
mov    $0x7,%esi
jmp    1030 <__mark_inode_dirty@plt>

LLVM IR (-O0):
%struct.inode = type { i32 }
define void @mark_inode_dirty(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
%3 = load %struct.inode*, %struct.inode** %2
%4 = call i32 @__mark_inode_dirty(%struct.inode* %3, i32 7)
ret void
}

LLVM IR (-O2):
%struct.inode = type { i32 }
define void @mark_inode_dirty(%struct.inode* %0) {
%2 = tail call i32 @__mark_inode_dirty(%struct.inode* %0, i32 7)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
scalar_t__ pthread_create(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          void *(*)(void *), int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_detach(int /*<<< orphan*/);
int new_thread(void *(*fn)(void *)) {
  pthread_t pt;
  if (pthread_create(&pt, NULL, fn, NULL)) {
    perror("pthread_create");
    exit(EXIT_FAILURE);
  }
  pthread_detach(pt);
  return 0;
}


x86 assembly (clang, -O0):
<new_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    -0xc(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rsi
call   1040 <pthread_create@plt>
cmp    $0x0,%rax
je     1184 <new_thread+0x44>
lea    0xe8f(%rip),%rdi
call   1050 <perror@plt>
mov    0x2e63(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>
mov    -0xc(%rbp),%edi
call   1030 <pthread_detach@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_thread>:
push   %rax
mov    %rdi,%rdx
lea    0x4(%rsp),%rdi
xor    %esi,%esi
xor    %ecx,%ecx
call   1040 <pthread_create@plt>
test   %rax,%rax
jne    1164 <new_thread+0x24>
mov    0x4(%rsp),%edi
call   1030 <pthread_detach@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xe95(%rip),%rdi
call   1050 <perror@plt>
mov    0x2e69(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"pthread_create\00"
@EXIT_FAILURE = global i32 0
define i32 @new_thread(i8* (i8*)* %0) {
%2 = alloca i8* (i8*)*
%3 = alloca i32
store i8* (i8*)* %0, i8* (i8*)** %2
%4 = load i8* (i8*)*, i8* (i8*)** %2
%5 = call i64 @pthread_create(i32* %3, i32* null, i8* (i8*)* %4, i32* null)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %1
%12 = load i32, i32* %3
%13 = call i32 @pthread_detach(i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"pthread_create\00"
@EXIT_FAILURE = global i32 0
define i32 @new_thread(i8* (i8*)* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i64 @pthread_create(i32* %2, i32* null, i8* (i8*)* %0, i32* null)
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = call i32 @perror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
%11 = load i32, i32* %2
%12 = call i32 @pthread_detach(i32 %11)
ret i32 0
}
int force_exact(int x) { return (x + 1) & ~3; }


x86 assembly (clang, -O0):
<force_exact>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
and    $0xfffffffc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<force_exact>:
lea    0x1(%rdi),%eax
and    $0xfffffffc,%eax
ret

LLVM IR (-O0):
define i32 @force_exact(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = and i32 %4, -4
ret i32 %5
}

LLVM IR (-O2):
define i32 @force_exact(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = and i32 %2, -4
ret i32 %3
}
void ff_hevc_put_hevc_uni_w_qpel_h24_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_h24_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_h24_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_h24_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_h24_12_sse4() {
ret void
}
int test_imm_35uint32_reg(unsigned int val) {
  return ((val) & (0x35 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_35uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x35,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_35uint32_reg>:
test   $0x35,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_35uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 53
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_35uint32_reg(i32 %0) {
%2 = and i32 %0, 53
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
__attribute__((always_)) long IS_ERR(const void *ptr) {
  return __builtin_expect(!!(((unsigned long)ptr) >= (unsigned long)-4095), 0);
}


x86 assembly (clang, -O0):
<IS_ERR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffff001,%rax
setae  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR>:
xor    %eax,%eax
cmp    $0xfffffffffffff001,%rdi
setae  %al
ret

LLVM IR (-O0):
define i64 @IS_ERR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp uge i64 %4, -4095
%6 = xor i1 %5, true
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @IS_ERR(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 -4096 to i8*)
%3 = zext i1 %2 to i64
ret i64 %3
}
void idle_threads_init(unsigned int cpu) {}


x86 assembly (clang, -O0):
<idle_threads_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<idle_threads_init>:
ret

LLVM IR (-O0):
define void @idle_threads_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @idle_threads_init(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ compare();
int /*<<< orphan*/ read();
void noopt() {
  (void)read();
  (void)compare();
}


x86 assembly (clang, -O0):
<noopt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <read@plt>
mov    $0x0,%al
call   1040 <compare@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<noopt>:
push   %rax
xor    %eax,%eax
call   1030 <read@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <compare@plt>

LLVM IR (-O0):
define void @noopt() {
%1 = call i32 (...) @read()
%2 = call i32 (...) @compare()
ret void
}

LLVM IR (-O2):
define void @noopt() {
%1 = tail call i32 (...) @read()
%2 = tail call i32 (...) @compare()
ret void
}
int hc_DES_mem_rand8(unsigned char *data) { return 1; }


x86 assembly (clang, -O0):
<hc_DES_mem_rand8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hc_DES_mem_rand8>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @hc_DES_mem_rand8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @hc_DES_mem_rand8(i8* nocapture readnone %0) {
ret i32 1
}
__attribute__((__visibility__("default"))) const char *const
GetEmulatorVersion() {
  return "private build";
}


x86 assembly (clang, -O0):
<GetEmulatorVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetEmulatorVersion>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [14 x i8] c"private build\00"
define i8* @GetEmulatorVersion() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [14 x i8] c"private build\00"
define i8* @GetEmulatorVersion() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ do_two_times_Good(int);
void call_do_two_times_Good_FP() { do_two_times_Good(5); }


x86 assembly (clang, -O0):
<call_do_two_times_Good_FP>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <do_two_times_Good@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_do_two_times_Good_FP>:
mov    $0x5,%edi
jmp    1030 <do_two_times_Good@plt>

LLVM IR (-O0):
define void @call_do_two_times_Good_FP() {
%1 = call i32 @do_two_times_Good(i32 5)
ret void
}

LLVM IR (-O2):
define void @call_do_two_times_Good_FP() {
%1 = tail call i32 @do_two_times_Good(i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ a_0_55(int, char *);
void a_0_68(void) {
  { a_0_55(((((40)))), ") ?"); }
}


x86 assembly (clang, -O0):
<a_0_68>:
push   %rbp
mov    %rsp,%rbp
mov    $0x28,%edi
lea    0xee0(%rip),%rsi
call   1030 <a_0_55@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_0_68>:
lea    0xee9(%rip),%rsi
mov    $0x28,%edi
jmp    1030 <a_0_55@plt>

LLVM IR (-O0):
@.str = [4 x i8] c") ?\00"
define void @a_0_68() {
%1 = call i32 @a_0_55(i32 40, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c") ?\00"
define void @a_0_68() {
%1 = tail call i32 @a_0_55(i32 40, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double sqrt(double);
double vec3_mag(double *a) {
  return sqrt(a[0] * a[0] + a[1] * a[1] + a[2] * a[2]);
}


x86 assembly (clang, -O0):
<vec3_mag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_mag>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1141 <vec3_mag+0x31>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @vec3_mag(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
%24 = call double @sqrt(double %23)
ret double %24
}

LLVM IR (-O2):
define double @vec3_mag(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
%10 = tail call double @sqrt(double %9)
ret double %10
}
/* Variables and functions */
double gsw_gibbs(int, int, int, double, double, double);
double gsw_cp_t_exact(double sa, double t, double p) {
  int n0, n2;
  n0 = 0;
  n2 = 2;
  return (-(t + 273.15e0) * gsw_gibbs(n0, n2, n0, sa, t, p));
}


x86 assembly (clang, -O0):
<gsw_cp_t_exact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x2,-0x20(%rbp)
movsd  0xec3(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    -0x1c(%rbp),%edi
mov    -0x20(%rbp),%esi
mov    -0x1c(%rbp),%edx
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <gsw_gibbs@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsw_cp_t_exact>:
sub    $0x18,%rsp
movsd  0xee4(%rip),%xmm3
addsd  %xmm1,%xmm3
xorpd  0xee8(%rip),%xmm3
movapd %xmm3,(%rsp)
xor    %edi,%edi
mov    $0x2,%esi
xor    %edx,%edx
call   1030 <gsw_gibbs@plt>
mulsd  (%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @gsw_cp_t_exact(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca i32
%8 = alloca i32
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store i32 0, i32* %7
store i32 2, i32* %8
%9 = load double, double* %5
%10 = fadd double %9, 2.731500e+02
%11 = fneg double %10
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %7
%15 = load double, double* %4
%16 = load double, double* %5
%17 = load double, double* %6
%18 = call double @gsw_gibbs(i32 %12, i32 %13, i32 %14, double %15, double %16, double %17)
%19 = fmul double %11, %18
ret double %19
}

LLVM IR (-O2):
define double @gsw_cp_t_exact(double %0, double %1, double %2) {
%4 = fadd double %1, 2.731500e+02
%5 = fneg double %4
%6 = tail call double @gsw_gibbs(i32 0, i32 2, i32 0, double %0, double %1, double %2)
%7 = fmul double %6, %5
ret double %7
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t SNDH_ParseDecimal(char *chunk) {
  uint16_t value = 0;
  while (*chunk != 0) {
    value *= 10;
    value += (*chunk++) - '0';
  }
  return (value);
}


x86 assembly (clang, -O0):
<SNDH_ParseDecimal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1146 <SNDH_ParseDecimal+0x46>
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
sub    $0x30,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <SNDH_ParseDecimal+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SNDH_ParseDecimal>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <SNDH_ParseDecimal+0x28>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <SNDH_ParseDecimal+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @SNDH_ParseDecimal(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i32, i32* %3
%11 = mul nsw i32 %10, 10
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = sext i8 %14 to i32
%16 = sub nsw i32 %15, 48
%17 = load i32, i32* %3
%18 = add nsw i32 %17, %16
store i32 %18, i32* %3
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @SNDH_ParseDecimal(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %12, %4 ], [ 0, %1 ]
%7 = phi i8* [ %10, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = mul nsw i32 %6, 10
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = add i32 %9, -48
%12 = add i32 %11, %8
%13 = load i8, i8* %10
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %12, %4 ]
ret i32 %16
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
int checksum(int const *, size_t);
uint32_t crc_syndrome(const uint8_t *msg, size_t len) {
  uint32_t crc;
  uint32_t sum;
  crc = checksum(msg, len);
  sum = (msg[len - 3] << 16) | (msg[len - 2] << 8) | (msg[len - 1] << 0);
  return crc ^ sum;
}


x86 assembly (clang, -O0):
<crc_syndrome>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <checksum@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x3,%rcx
mov    (%rax,%rcx,4),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rdx
sub    $0x2,%rdx
mov    (%rcx,%rdx,4),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
mov    (%rcx,%rdx,4),%ecx
shl    $0x0,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
xor    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc_syndrome>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <checksum@plt>
mov    -0xc(%rbx,%r14,4),%ecx
mov    -0x8(%rbx,%r14,4),%edx
shl    $0x10,%ecx
shl    $0x8,%edx
or     %ecx,%edx
or     -0x4(%rbx,%r14,4),%edx
xor    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @crc_syndrome(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i64 %1, i64* %4
%7 = load i32*, i32** %3
%8 = load i64, i64* %4
%9 = call i32 @checksum(i32* %7, i64 %8)
store i32 %9, i32* %5
%10 = load i32*, i32** %3
%11 = load i64, i64* %4
%12 = sub i64 %11, 3
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = shl i32 %14, 16
%16 = load i32*, i32** %3
%17 = load i64, i64* %4
%18 = sub i64 %17, 2
%19 = getelementptr inbounds i32, i32* %16, i64 %18
%20 = load i32, i32* %19
%21 = shl i32 %20, 8
%22 = or i32 %15, %21
%23 = load i32*, i32** %3
%24 = load i64, i64* %4
%25 = sub i64 %24, 1
%26 = getelementptr inbounds i32, i32* %23, i64 %25
%27 = load i32, i32* %26
%28 = shl i32 %27, 0
%29 = or i32 %22, %28
store i32 %29, i32* %6
%30 = load i32, i32* %5
%31 = load i32, i32* %6
%32 = xor i32 %30, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @crc_syndrome(i32* %0, i64 %1) {
%3 = tail call i32 @checksum(i32* %0, i64 %1)
%4 = add i64 %1, -3
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = shl i32 %6, 16
%8 = add i64 %1, -2
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = shl i32 %10, 8
%12 = or i32 %11, %7
%13 = add i64 %1, -1
%14 = getelementptr inbounds i32, i32* %0, i64 %13
%15 = load i32, i32* %14
%16 = or i32 %12, %15
%17 = xor i32 %16, %3
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ change_to_rootdir();
int /*<<< orphan*/ close_stdfiles();
int /*<<< orphan*/ create_child_process();
int /*<<< orphan*/ create_new_session();
int /*<<< orphan*/ open_syslog_log();
void daemonise(void) {
  {};
  create_child_process();
  create_new_session();
  change_to_rootdir();
  open_syslog_log();
  close_stdfiles();
  {};
}


x86 assembly (clang, -O0):
<daemonise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <create_child_process@plt>
mov    $0x0,%al
call   1060 <create_new_session@plt>
mov    $0x0,%al
call   1030 <change_to_rootdir@plt>
mov    $0x0,%al
call   1040 <open_syslog_log@plt>
mov    $0x0,%al
call   1070 <close_stdfiles@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<daemonise>:
push   %rax
xor    %eax,%eax
call   1050 <create_child_process@plt>
xor    %eax,%eax
call   1060 <create_new_session@plt>
xor    %eax,%eax
call   1030 <change_to_rootdir@plt>
xor    %eax,%eax
call   1040 <open_syslog_log@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <close_stdfiles@plt>

LLVM IR (-O0):
define void @daemonise() {
%1 = call i32 (...) @create_child_process()
%2 = call i32 (...) @create_new_session()
%3 = call i32 (...) @change_to_rootdir()
%4 = call i32 (...) @open_syslog_log()
%5 = call i32 (...) @close_stdfiles()
ret void
}

LLVM IR (-O2):
define void @daemonise() {
%1 = tail call i32 (...) @create_child_process()
%2 = tail call i32 (...) @create_new_session()
%3 = tail call i32 (...) @change_to_rootdir()
%4 = tail call i32 (...) @open_syslog_log()
%5 = tail call i32 (...) @close_stdfiles()
ret void
}
void GPMCDevSizeSelect(unsigned int baseAddr, unsigned int csNum,
                       unsigned int devSize) {
  (*((volatile unsigned int *)(baseAddr + (0x60 + (csNum * (0x30)))))) &=
      ~(0x00003000u);
  (*((volatile unsigned int *)(baseAddr + (0x60 + (csNum * (0x30)))))) |=
      ((devSize << (0x0000000Cu)) & (0x00003000u));
}


x86 assembly (clang, -O0):
<GPMCDevSizeSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%ecx
add    $0x60,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffcfff,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%edx
shl    $0xc,%edx
and    $0x3000,%edx
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%ecx
add    $0x60,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCDevSizeSelect>:
lea    (%rsi,%rsi,2),%eax
shl    $0x4,%eax
add    %edi,%eax
add    $0x60,%eax
andl   $0xffffcfff,(%rax)
and    $0x3,%edx
shl    $0xc,%edx
or     %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPMCDevSizeSelect(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul i32 %8, 48
%10 = add i32 96, %9
%11 = add i32 %7, %10
%12 = zext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
%14 = load volatile i32, i32* %13
%15 = and i32 %14, -12289
store volatile i32 %15, i32* %13
%16 = load i32, i32* %6
%17 = shl i32 %16, 12
%18 = and i32 %17, 12288
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = mul i32 %20, 48
%22 = add i32 96, %21
%23 = add i32 %19, %22
%24 = zext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
%26 = load volatile i32, i32* %25
%27 = or i32 %26, %18
store volatile i32 %27, i32* %25
ret void
}

LLVM IR (-O2):
define void @GPMCDevSizeSelect(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %1, 48
%5 = add i32 %0, 96
%6 = add i32 %5, %4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -12289
store volatile i32 %10, i32* %8
%11 = shl i32 %2, 12
%12 = and i32 %11, 12288
%13 = load volatile i32, i32* %8
%14 = or i32 %13, %12
store volatile i32 %14, i32* %8
ret void
}