xunge/DecIR huggingface dataset:
int isoct(char c) {
  if (c >= '0' && c <= '7')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isoct>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <isoct+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x37,%eax
jg     1130 <isoct+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <isoct+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoct>:
and    $0xf8,%dil
xor    %eax,%eax
cmp    $0x30,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isoct(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 55
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @isoct(i8 signext %0) {
%2 = and i8 %0, -8
%3 = icmp eq i8 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
int(isascii)(int c) { return isascii(c); }


x86 assembly (clang, -O0):
<isascii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isascii@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isascii>:
ret

LLVM IR (-O0):
define i32 @isascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @isascii(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isascii(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void _check_memory(void *p) { assert(p != 0); }


x86 assembly (clang, -O0):
<_check_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_memory>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
mov    %eax,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @_check_memory(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret void
}

LLVM IR (-O2):
define void @_check_memory(i8* readnone %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}
void gtk_menu_get_type() {}


x86 assembly (clang, -O0):
<gtk_menu_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_menu_get_type>:
ret

LLVM IR (-O0):
define void @gtk_menu_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_menu_get_type() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int /*<<< orphan*/ feholdexcept(int /*<<< orphan*/ *);
int /*<<< orphan*/ fesetenv(int /*<<< orphan*/ *);
long double rintl(long double);
long double nearbyintl(long double x) {
  fenv_t fenv;
  long double res;
  feholdexcept(&fenv);
  res = rintl(x);
  fesetenv(&fenv);
  return (res);
}


x86 assembly (clang, -O0):
<nearbyintl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
lea    -0x14(%rbp),%rdi
mov    %rdi,-0x38(%rbp)
call   1040 <feholdexcept@plt>
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <rintl@plt>
mov    -0x38(%rbp),%rdi
fstpt  -0x30(%rbp)
call   1050 <fesetenv@plt>
fldt   -0x30(%rbp)
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nearbyintl>:
push   %rbx
sub    $0x20,%rsp
fldt   0x30(%rsp)
fstpt  0x10(%rsp)
lea    0x1c(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <feholdexcept@plt>
fldt   0x10(%rsp)
fstpt  (%rsp)
call   1030 <rintl@plt>
fstpt  0x10(%rsp)
mov    %rbx,%rdi
call   1050 <fesetenv@plt>
fldt   0x10(%rsp)
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define x86_fp80 @nearbyintl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca i32
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%5 = call i32 @feholdexcept(i32* %3)
%6 = load x86_fp80, x86_fp80* %2
%7 = call x86_fp80 @llvm.rint.f80(x86_fp80 %6)
store x86_fp80 %7, x86_fp80* %4
%8 = call i32 @fesetenv(i32* %3)
%9 = load x86_fp80, x86_fp80* %4
ret x86_fp80 %9
}

LLVM IR (-O2):
define x86_fp80 @nearbyintl(x86_fp80 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @feholdexcept(i32* %2)
%5 = call x86_fp80 @llvm.rint.f80(x86_fp80 %0)
%6 = call i32 @fesetenv(i32* %2)
ret x86_fp80 %5
}
void xxx(int argc) {
  int x;
#pragma omp for simd
  for (int i = 0; i < 10; ++i)
    argc = x;
}


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    112c <xxx+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <xxx+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
ret

LLVM IR (-O0):
define void @xxx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %5
5: ; preds = %10, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i32, i32* %3
store i32 %9, i32* %2
br label %10
10: ; preds = %8
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @xxx(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ radix_sort(int *, int);
void sort(int a[], int len) {
  if (len > 1)
    radix_sort(a, len);
}


x86 assembly (clang, -O0):
<sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    1135 <sort+0x25>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <radix_sort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort>:
cmp    $0x2,%esi
jl     111a <sort+0xa>
jmp    1030 <radix_sort@plt>
ret

LLVM IR (-O0):
define void @sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = load i32, i32* %4
%10 = call i32 @radix_sort(i32* %8, i32 %9)
br label %11
11: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @sort(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @radix_sort(i32* %0, i32 %1)
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int bar(int, int /*<<< orphan*/);
int foo(int /*<<< orphan*/, int);
int main(void) {
  if (foo(0, 1) != 3)
    abort();
  if (bar(1, 0) != 3)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
mov    $0x1,%esi
call   1050 <foo@plt>
cmp    $0x3,%eax
je     115b <main+0x2b>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <bar@plt>
cmp    $0x3,%eax
je     1177 <main+0x47>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1050 <foo@plt>
cmp    $0x3,%eax
jne    1157 <main+0x27>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <bar@plt>
cmp    $0x3,%eax
jne    1157 <main+0x27>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 0, i32 1)
%3 = icmp ne i32 %2, 3
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i32 @bar(i32 1, i32 0)
%8 = icmp ne i32 %7, 3
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 0, i32 1)
%2 = icmp eq i32 %1, 3
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 @bar(i32 1, i32 0)
%7 = icmp eq i32 %6, 3
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %5
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
int sysconf(int /*<<< orphan*/);
int get_num_cpus() { return sysconf(_SC_NPROCESSORS_ONLN); }


x86 assembly (clang, -O0):
<get_num_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_num_cpus>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sysconf@plt>

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @get_num_cpus() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = call i32 @sysconf(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @get_num_cpus() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i32 @sysconf(i32 %1)
ret i32 %2
}
void hyperlink_print_old() {}


x86 assembly (clang, -O0):
<hyperlink_print_old>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hyperlink_print_old>:
ret

LLVM IR (-O0):
define void @hyperlink_print_old() {
ret void
}

LLVM IR (-O2):
define void @hyperlink_print_old() {
ret void
}
int test_imm_71uint8_mem(unsigned char *val) {
  return ((*val) & (-0x71 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_71uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff8f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_71uint8_mem>:
testb  $0x8f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_71uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -113
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_71uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -113
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) { fprintf(stderr, "usage: tapdisk-client <sock>\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [30 x i8] c"usage: tapdisk-client <sock>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [30 x i8] c"usage: tapdisk-client <sock>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}
void XUnionRegion() {}


x86 assembly (clang, -O0):
<XUnionRegion>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XUnionRegion>:
ret

LLVM IR (-O0):
define void @XUnionRegion() {
ret void
}

LLVM IR (-O2):
define void @XUnionRegion() {
ret void
}
void imx6_pm_init(void) {}


x86 assembly (clang, -O0):
<imx6_pm_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imx6_pm_init>:
ret

LLVM IR (-O0):
define void @imx6_pm_init() {
ret void
}

LLVM IR (-O2):
define void @imx6_pm_init() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
char *get_inc_fname(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char *name;
  FILE *f = fopen("tmp.txt", "r");
  name = get_inc_fname(f);
  printf("%s\n", name);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    0xebb(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <get_inc_fname@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0xec9(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rdi
call   1040 <get_inc_fname@plt>
lea    0xeb7(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"tmp.txt\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32*
store i32 0, i32* %1
%4 = call i32* @fopen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %4, i32** %3
%5 = load i32*, i32** %3
%6 = call i8* @get_inc_fname(i32* %5)
store i8* %6, i8** %2
%7 = load i8*, i8** %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"tmp.txt\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i8* @get_inc_fname(i32* %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %2)
ret i32 0
}
int test_imm_E1int8_reg(signed char val) {
  return ((val) & (0xE1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E1int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xe1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E1int8_reg>:
test   $0xe1,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E1int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 225
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E1int8_reg(i8 signext %0) {
%2 = and i8 %0, -31
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int mdio_phy_id_is_c45(int phy_id) {
  return (phy_id & 0x8000) && !(phy_id & ~(0x8000 | 0x03e0 | 0x001f));
}


x86 assembly (clang, -O0):
<mdio_phy_id_is_c45>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x8000,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
je     1131 <mdio_phy_id_is_c45+0x31>
mov    -0x4(%rbp),%eax
and    $0xffff7c00,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdio_phy_id_is_c45>:
and    $0xfffffc00,%edi
xor    %eax,%eax
cmp    $0x8000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @mdio_phy_id_is_c45(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 32768
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = and i32 %7, -33792
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @mdio_phy_id_is_c45(i32 %0) {
%2 = and i32 %0, -1024
%3 = icmp eq i32 %2, 32768
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bitmap_n_bytes(size_t);
unsigned long *xzalloc(int /*<<< orphan*/);
unsigned long *bitmap_allocate(size_t n_bits) {
  return xzalloc(bitmap_n_bytes(n_bits));
}


x86 assembly (clang, -O0):
<bitmap_allocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <bitmap_n_bytes@plt>
mov    %eax,%edi
call   1030 <xzalloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_allocate>:
push   %rax
call   1040 <bitmap_n_bytes@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <xzalloc@plt>

LLVM IR (-O0):
define i64* @bitmap_allocate(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @bitmap_n_bytes(i64 %3)
%5 = call i64* @xzalloc(i32 %4)
ret i64* %5
}

LLVM IR (-O2):
define i64* @bitmap_allocate(i64 %0) {
%2 = tail call i32 @bitmap_n_bytes(i64 %0)
%3 = tail call i64* @xzalloc(i32 %2)
ret i64* %3
}
int test_imm_93uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x93 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_93uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x93,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_93uint64_highword_mem>:
testb  $0x93,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_93uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 147
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_93uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 631360192512
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
void win(void) {
  printf("Congratulations! Have a shell:\n");
  system("/bin/sh -i");
}


x86 assembly (clang, -O0):
<win>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
lea    0xee9(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<win>:
push   %rax
lea    0xee3(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1040 <system@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Congratulations! Have a shell:\0A\00"
@.str.1 = [11 x i8] c"/bin/sh -i\00"
define void @win() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [11 x i8] c"/bin/sh -i\00"
@str = [31 x i8] c"Congratulations! Have a shell:\00"
define void @win() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int getN(int x) {
  int mask = 0x1;
  for (int i = 0; i <= 8; i++) {
    if (x == mask) {
      return i;
    }
    mask <<= 1;
  }
  return -1;
}


x86 assembly (clang, -O0):
<getN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x8,-0x10(%rbp)
jg     114d <getN+0x4d>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1136 <getN+0x36>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <getN+0x54>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1115 <getN+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getN>:
xor    %eax,%eax
cmp    $0x1,%edi
je     112b <getN+0x2b>
mov    $0x1,%eax
xor    %ecx,%ecx
xchg   %ax,%ax
mov    %ecx,%edx
lea    0x1(%rdx),%ecx
cmp    $0x7,%edx
ja     1120 <getN+0x20>
add    %eax,%eax
cmp    %edi,%eax
jne    1110 <getN+0x10>
cmp    $0x8,%edx
mov    $0xffffffff,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @getN(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %1
%7 = load i32, i32* %5
%8 = icmp sle i32 %7, 8
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i32, i32* %5
store i32 %14, i32* %2
br label %22
15: ; preds = %9
%16 = load i32, i32* %4
%17 = shl i32 %16, 1
store i32 %17, i32* %4
br label %18
18: ; preds = %15
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
store i32 -1, i32* %2
br label %22
22: ; preds = %21, %13
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @getN(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ 1, %1 ]
%6 = shl i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %4, 8
%9 = xor i1 %8, true
%10 = icmp eq i32 %6, %0
%11 = select i1 %9, i1 true, i1 %10
br i1 %11, label %12, label %3
12: ; preds = %3
%13 = select i1 %8, i32 %7, i32 -1
br label %14
14: ; preds = %12, %1
%15 = phi i32 [ 0, %1 ], [ %13, %12 ]
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int _vsnwprintf(int /*<<< orphan*/ *, size_t, int /*<<< orphan*/ const *,
                int /*<<< orphan*/);
int vsnwprintf(wchar_t *buffer, size_t n, const wchar_t *format,
               va_list argptr) {
  return _vsnwprintf(buffer, n, format, argptr);
}


x86 assembly (clang, -O0):
<vsnwprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <_vsnwprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vsnwprintf>:
jmp    1030 <_vsnwprintf@plt>

LLVM IR (-O0):
define i32 @vsnwprintf(i32* %0, i64 %1, i32* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i64, i64* %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = call i32 @_vsnwprintf(i32* %9, i64 %10, i32* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @vsnwprintf(i32* %0, i64 %1, i32* %2, i32 %3) {
%5 = tail call i32 @_vsnwprintf(i32* %0, i64 %1, i32* %2, i32 %3)
ret i32 %5
}
void sigchild(int signo) {}


x86 assembly (clang, -O0):
<sigchild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigchild>:
ret

LLVM IR (-O0):
define void @sigchild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sigchild(i32 %0) {
ret void
}
/* Variables and functions */
int oauth_time_independent_equals_n(char const *, char const *, size_t, size_t);
int oauth_time_indepenent_equals_n(const char *a, const char *b, size_t len_a,
                                   size_t len_b) {
  return oauth_time_independent_equals_n(a, b, len_a, len_b);
}


x86 assembly (clang, -O0):
<oauth_time_indepenent_equals_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <oauth_time_independent_equals_n@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oauth_time_indepenent_equals_n>:
jmp    1030 <oauth_time_independent_equals_n@plt>

LLVM IR (-O0):
define i32 @oauth_time_indepenent_equals_n(i8* %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @oauth_time_independent_equals_n(i8* %9, i8* %10, i64 %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @oauth_time_indepenent_equals_n(i8* %0, i8* %1, i64 %2, i64 %3) {
%5 = tail call i32 @oauth_time_independent_equals_n(i8* %0, i8* %1, i64 %2, i64 %3)
ret i32 %5
}
/* Variables and functions */
unsigned long nibble_sort_word(unsigned long);
void nibble_sort_burton2(unsigned long *buf) {
  for (int i = 0; i < 1024; i++) {
    buf[i] = nibble_sort_word(buf[i]);
  }
}


x86 assembly (clang, -O0):
<nibble_sort_burton2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x400,-0xc(%rbp)
jge    115e <nibble_sort_burton2+0x4e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <nibble_sort_word@plt>
mov    %rax,%rdx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <nibble_sort_burton2+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nibble_sort_burton2>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rdi
call   1030 <nibble_sort_word@plt>
mov    %rax,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    $0x400,%rbx
jne    1120 <nibble_sort_burton2+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @nibble_sort_burton2(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1024
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i64*, i64** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i64, i64* %8, i64 %10
%12 = load i64, i64* %11
%13 = call i64 @nibble_sort_word(i64 %12)
%14 = load i64*, i64** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i64, i64* %14, i64 %16
store i64 %13, i64* %17
br label %18
18: ; preds = %7
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @nibble_sort_burton2(i64* nocapture %0) {
br label %3
2: ; preds = %3
ret void
3: ; preds = %1, %3
%4 = phi i64 [ 0, %1 ], [ %8, %3 ]
%5 = getelementptr inbounds i64, i64* %0, i64 %4
%6 = load i64, i64* %5
%7 = tail call i64 @nibble_sort_word(i64 %6)
store i64 %7, i64* %5
%8 = add nuw nsw i64 %4, 1
%9 = icmp eq i64 %8, 1024
br i1 %9, label %2, label %3
}
/* Type definitions */
struct sk_buff_head {
  int dummy;
};
typedef void sk_buff;

/* Variables and functions */
int /*<<< orphan*/ kfree_skb(void *);
void *skb_dequeue(struct sk_buff_head *);
void skb_queue_purge(struct sk_buff_head *list) {
  struct sk_buff *skb;
  while ((skb = skb_dequeue(list)) != ((void *)0))
    kfree_skb(skb);
}


x86 assembly (clang, -O0):
<skb_queue_purge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <skb_dequeue@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1151 <skb_queue_purge+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <kfree_skb@plt>
jmp    112c <skb_queue_purge+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skb_queue_purge>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1040 <skb_dequeue@plt>
test   %rax,%rax
je     1147 <skb_queue_purge+0x27>
mov    %rax,%rdi
call   1030 <kfree_skb@plt>
mov    %rbx,%rdi
jmp    1130 <skb_queue_purge+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.sk_buff_head = type { i32 }
%struct.sk_buff = type opaque
define void @skb_queue_purge(%struct.sk_buff_head* %0) {
%2 = alloca %struct.sk_buff_head*
%3 = alloca %struct.sk_buff*
store %struct.sk_buff_head* %0, %struct.sk_buff_head** %2
br label %4
4: ; preds = %9, %1
%5 = load %struct.sk_buff_head*, %struct.sk_buff_head** %2
%6 = call i8* @skb_dequeue(%struct.sk_buff_head* %5)
%7 = bitcast i8* %6 to %struct.sk_buff*
store %struct.sk_buff* %7, %struct.sk_buff** %3
%8 = icmp ne %struct.sk_buff* %7, null
br i1 %8, label %9, label %13
9: ; preds = %4
%10 = load %struct.sk_buff*, %struct.sk_buff** %3
%11 = bitcast %struct.sk_buff* %10 to i8*
%12 = call i32 @kfree_skb(i8* %11)
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
%struct.sk_buff_head = type { i32 }
define void @skb_queue_purge(%struct.sk_buff_head* %0) {
%2 = tail call i8* @skb_dequeue(%struct.sk_buff_head* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %9, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %2, %1 ]
%6 = tail call i32 @kfree_skb(i8* %5)
%7 = tail call i8* @skb_dequeue(%struct.sk_buff_head* %0)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %4
9: ; preds = %4, %1
ret void
}
unsigned char cast_ushort_uchar_fast(unsigned short int x) {
  return (unsigned char)x;
}


x86 assembly (clang, -O0):
<cast_ushort_uchar_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_ushort_uchar_fast>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @cast_ushort_uchar_fast(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = trunc i16 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @cast_ushort_uchar_fast(i16 zeroext %0) {
%2 = trunc i16 %0 to i8
ret i8 %2
}
/* Variables and functions */
double DBL_MIN;
double tinydbl_(double x) { return DBL_MIN; }


x86 assembly (clang, -O0):
<tinydbl_>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ed0(%rip),%rax
movsd  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tinydbl_>:
mov    0x2ed9(%rip),%rax
movsd  (%rax),%xmm0
ret

LLVM IR (-O0):
@DBL_MIN = global double 0.000000e+00
define double @tinydbl_(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* @DBL_MIN
ret double %3
}

LLVM IR (-O2):
@DBL_MIN = global double 0.000000e+00
define double @tinydbl_(double %0) {
%2 = load double, double* @DBL_MIN
ret double %2
}
/* Variables and functions */
int rand();
int randomizer() { return rand() % 1000000000; }


x86 assembly (clang, -O0):
<randomizer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x3b9aca00,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomizer>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x44b82fa1,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x3c,%rcx
add    %edx,%ecx
imul   $0x3b9aca00,%ecx,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @randomizer() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 1000000000
ret i32 %2
}

LLVM IR (-O2):
define i32 @randomizer() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 1000000000
ret i32 %2
}
int test_imm_29int32_mem(int *val) {
  return ((*val) & (0x29 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_29int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x29,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_29int32_mem>:
testb  $0x29,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_29int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 41
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_29int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 41
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int strange(int a, int b) { return (a == 0 || b == 0) ? 0 : a % b; }


x86 assembly (clang, -O0):
<strange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111e <strange+0x1e>
cmpl   $0x0,-0x8(%rbp)
jne    1128 <strange+0x28>
xor    %edx,%edx
mov    %edx,-0xc(%rbp)
jmp    1132 <strange+0x32>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strange>:
xor    %eax,%eax
test   %edi,%edi
je     1111 <strange+0x11>
test   %esi,%esi
je     1111 <strange+0x11>
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @strange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %2
br label %15
11: ; preds = %7
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
br label %15
15: ; preds = %11, %10
%16 = phi i32 [ 0, %10 ], [ %14, %11 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @strange(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = srem i32 %0, %1
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ 0, %2 ]
ret i32 %9
}
int main(void) {
  int i = 3;
  i = i + 1;
  i = i + 1;
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
ret i32 5
}
/* Variables and functions */
int /*<<< orphan*/ GB_Cartridge_Unload();
int /*<<< orphan*/ GB_PowerOff();
int /*<<< orphan*/ GB_SRAM_Save();
void GB_End(int save) {
  if (save)
    GB_SRAM_Save();
  GB_PowerOff();
  GB_Cartridge_Unload();
}


x86 assembly (clang, -O0):
<GB_End>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114c <GB_End+0x1c>
mov    $0x0,%al
call   1050 <GB_SRAM_Save@plt>
mov    $0x0,%al
call   1030 <GB_PowerOff@plt>
mov    $0x0,%al
call   1040 <GB_Cartridge_Unload@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GB_End>:
push   %rax
test   %edi,%edi
je     113c <GB_End+0xc>
xor    %eax,%eax
call   1050 <GB_SRAM_Save@plt>
xor    %eax,%eax
call   1030 <GB_PowerOff@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <GB_Cartridge_Unload@plt>

LLVM IR (-O0):
define void @GB_End(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @GB_SRAM_Save()
br label %7
7: ; preds = %5, %1
%8 = call i32 (...) @GB_PowerOff()
%9 = call i32 (...) @GB_Cartridge_Unload()
ret void
}

LLVM IR (-O2):
define void @GB_End(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @GB_SRAM_Save()
br label %5
5: ; preds = %3, %1
%6 = tail call i32 (...) @GB_PowerOff()
%7 = tail call i32 (...) @GB_Cartridge_Unload()
ret void
}
/* Variables and functions */
int GLUT_VISIBLE;
int /*<<< orphan*/ glutIdleFunc(int /*<<< orphan*/ *);
int /*<<< orphan*/ updateIdleFunc();
void visible(int vis) {
  if (vis == GLUT_VISIBLE)
    updateIdleFunc();
  else
    glutIdleFunc(NULL);
}


x86 assembly (clang, -O0):
<visible>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
jne    1149 <visible+0x29>
mov    $0x0,%al
call   1040 <updateIdleFunc@plt>
jmp    1152 <visible+0x32>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <glutIdleFunc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<visible>:
mov    0x2ec1(%rip),%rax
cmp    %edi,(%rax)
jne    1132 <visible+0x12>
xor    %eax,%eax
jmp    1040 <updateIdleFunc@plt>
xor    %edi,%edi
jmp    1030 <glutIdleFunc@plt>

LLVM IR (-O0):
@GLUT_VISIBLE = global i32 0
define void @visible(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @GLUT_VISIBLE
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @updateIdleFunc()
br label %10
8: ; preds = %1
%9 = call i32 @glutIdleFunc(i32* null)
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
@GLUT_VISIBLE = global i32 0
define void @visible(i32 %0) {
%2 = load i32, i32* @GLUT_VISIBLE
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @updateIdleFunc()
br label %8
6: ; preds = %1
%7 = tail call i32 @glutIdleFunc(i32* null)
br label %8
8: ; preds = %6, %4
ret void
}
int Cyc_peekc(struct Cyc___cycFILE *stream) {
  int c = ({ Cyc_fgetc(stream); });
  ({ Cyc_ungetc(c, stream); });
  return c;
}


x86 assembly (clang, -O0):
<Cyc_peekc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <Cyc_fgetc@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    $0x0,%al
call   1030 <Cyc_ungetc@plt>
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_peekc>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <Cyc_fgetc@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <Cyc_ungetc@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.Cyc___cycFILE = type opaque
define i32 @Cyc_peekc(%struct.Cyc___cycFILE* %0) {
%2 = alloca %struct.Cyc___cycFILE*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store %struct.Cyc___cycFILE* %0, %struct.Cyc___cycFILE** %2
%6 = load %struct.Cyc___cycFILE*, %struct.Cyc___cycFILE** %2
%7 = call i32 (%struct.Cyc___cycFILE*, ...) bitcast (i32 (...)* @Cyc_fgetc to i32 (%struct.Cyc___cycFILE*, ...)*)(%struct.Cyc___cycFILE* %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = load %struct.Cyc___cycFILE*, %struct.Cyc___cycFILE** %2
%11 = call i32 (i32, %struct.Cyc___cycFILE*, ...) bitcast (i32 (...)* @Cyc_ungetc to i32 (i32, %struct.Cyc___cycFILE*, ...)*)(i32 %9, %struct.Cyc___cycFILE* %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.Cyc___cycFILE = type opaque
define i32 @Cyc_peekc(%struct.Cyc___cycFILE* %0) {
%2 = tail call i32 (%struct.Cyc___cycFILE*, ...) bitcast (i32 (...)* @Cyc_fgetc to i32 (%struct.Cyc___cycFILE*, ...)*)(%struct.Cyc___cycFILE* %0)
%3 = tail call i32 (i32, %struct.Cyc___cycFILE*, ...) bitcast (i32 (...)* @Cyc_ungetc to i32 (i32, %struct.Cyc___cycFILE*, ...)*)(i32 %2, %struct.Cyc___cycFILE* %0)
ret i32 %2
}
/* Type definitions */
typedef int int8_t;

/* Variables and functions */
void quicksort_doHeavyWork(void) {
  for (int8_t __i = 0; __i < (100); __i++) {
    for (int8_t __j = 0; __j < (100); __j++) {
      __j *__j *__j;
    }
  }
}


x86 assembly (clang, -O0):
<quicksort_doHeavyWork>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    1147 <quicksort_doHeavyWork+0x47>
movl   $0x0,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jge    1134 <quicksort_doHeavyWork+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111c <quicksort_doHeavyWork+0x1c>
jmp    1139 <quicksort_doHeavyWork+0x39>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <quicksort_doHeavyWork+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort_doHeavyWork>:
ret

LLVM IR (-O0):
define void @quicksort_doHeavyWork() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %20, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %23
6: ; preds = %3
store i32 0, i32* %2
br label %7
7: ; preds = %16, %6
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 100
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = load i32, i32* %2
%12 = load i32, i32* %2
%13 = mul nsw i32 %11, %12
%14 = load i32, i32* %2
%15 = mul nsw i32 %13, %14
br label %16
16: ; preds = %10
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %7
19: ; preds = %7
br label %20
20: ; preds = %19
%21 = load i32, i32* %1
%22 = add nsw i32 %21, 1
store i32 %22, i32* %1
br label %3
23: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @quicksort_doHeavyWork() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int /*<<< orphan*/ functions(int);
int /*<<< orphan*/ stdout;
int main(int argc, char **argv) {
  fprintf(stdout, "%ld\n", functions(30));
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea3(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    $0x1e,%edi
call   1040 <functions@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%edx
lea    0xea8(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2eb8(%rip),%rax
mov    (%rax),%ebx
mov    $0x1e,%edi
call   1040 <functions@plt>
lea    0xec5(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* @stdout
%7 = call i32 @functions(i32 30)
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 1
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @functions(i32 30)
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ binunit_run_test_with_label(char *);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void main(int argc, char **argv) {
  binunit_run_test_with_label(argv[1]);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <binunit_run_test_with_label@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <binunit_run_test_with_label@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 1
%7 = load i8*, i8** %6
%8 = call i32 @binunit_run_test_with_label(i8* %7)
%9 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @binunit_run_test_with_label(i8* %4)
%6 = tail call i32 @exit(i32 0)
unreachable
}
__complex__ float __attribute__((no)) bar(__complex__ float x) {
  return foo(x);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movlpd %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  %xmm1,-0x18(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  -0x18(%rbp),%xmm0
mov    $0x1,%al
call   1030 <foo@plt>
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
mov    $0x1,%al
call   1030 <foo@plt>
cvtsi2ss %eax,%xmm1
xorps  %xmm0,%xmm0
movss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define <2 x float> @bar(<2 x float> %0) {
%2 = alloca { float, float }
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = bitcast { float, float }* %3 to <2 x float>*
store <2 x float> %0, <2 x float>* %5
%6 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%7 = load float, float* %6
%8 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
%9 = load float, float* %8
%10 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%11 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
store float %7, float* %10
store float %9, float* %11
%12 = bitcast { float, float }* %4 to <2 x float>*
%13 = load <2 x float>, <2 x float>* %12
%14 = call i32 (<2 x float>, ...) bitcast (i32 (...)* @foo to i32 (<2 x float>, ...)*)(<2 x float> %13)
%15 = sitofp i32 %14 to float
%16 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%17 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
store float %15, float* %16
store float 0.000000e+00, float* %17
%18 = bitcast { float, float }* %2 to <2 x float>*
%19 = load <2 x float>, <2 x float>* %18
ret <2 x float> %19
}

LLVM IR (-O2):
define <2 x float> @bar(<2 x float> %0) {
%2 = tail call i32 (<2 x float>, ...) bitcast (i32 (...)* @foo to i32 (<2 x float>, ...)*)(<2 x float> %0)
%3 = sitofp i32 %2 to float
%4 = insertelement <2 x float> <float poison, float 0.000000e+00>, float %3, i64 0
ret <2 x float> %4
}
int test_02(volatile unsigned char *x) { return *x == 0x80; }


x86 assembly (clang, -O0):
<test_02>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
movzbl %al,%eax
cmp    $0x80,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_02>:
mov    (%rdi),%cl
xor    %eax,%eax
cmp    $0x80,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @test_02(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load volatile i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp eq i32 %5, 128
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_02(i8* %0) {
%2 = load volatile i8, i8* %0
%3 = icmp eq i8 %2, -128
%4 = zext i1 %3 to i32
ret i32 %4
}