char *gamecp_name(int event) {
  static const char *fpga1_event_names[] = {
      "FPGA1_INT0_T7_INT",          "FPGA1_INT0_IRQ7I_N",
      "FPGA1_INT0_IRQ6I_N",         "FPGA1_INT0_IRQ4I_N",
      "FPGA1_INT0_IRQ3I_N",         "FPGA1_INT0_IRQ1I_N",
      "FPGA1_INT0_SSU_DCU_HW_NP_1", "FPGA1_INT0_RTC_INT",
      "FPGA1_INT0_IRQ2I_N",         "FPGA1_INT0_CP50M1_IN3_N",
      "FPGA1_INT0_CP50M1_IN2_N",    "FPGA1_INT0_CP50M1_IN1_N",
      "FPGA1_INT0_TIMER5_IRQ",      "FPGA1_INT0_TIMER4_IRQ",
      "FPGA1_INT0_TIMER0_IRQ",      "FPGA1_INT0_T0_IN",
      "FPGA1_INT0_L4_IN",           "FPGA1_INT0_L3_IN",
      "FPGA1_INT0_L2_IN",           "FPGA1_INT0_L1_IN",
      "FPGA1_INT0_L0_IN",           "FPGA1_INT0_PNIO_RES",
      "FPGA1_INT0_PNIO_RT",         "FPGA1_INT0_PNIO_IRT",
      "FPGA1_INT0_PNIO_SND_OUT",    "FPGA1_INT0_VME_PNIO_SND_OUT",
      "FPGA1_INT1_PCIX2_INTA_N",    "FPGA1_INT1_PCIX2_INTB_N",
      "FPGA1_INT1_PCIX2_INTC_N",    "FPGA1_INT1_PCIX2_INTD_N",
      "FPGA1_INT1_PCIX1_INTA_N",    "FPGA1_INT1_PCIX1_INTB_N",
      "FPGA1_INT1_PCIX1_INTC_N",    "FPGA1_INT1_PCIX1_INTD_N",
      "FPGA1_INT1_FPGA_RTC_INT",    "FPGA1_INT1_SSU_DCU_HW_NP_2",
      "FPGA1_INT1_PCI_MB3_N",       "FPGA1_INT1_PCI_MB2_N",
      "FPGA1_INT3_IRQ5I_N",         "FPGA1_INT3_ACFAILI_N",
      "FPGA1_INT3_BCLRI_N",         "FPGA1_INT3_SSU_DCU_HW_HP_2",
      "FPGA1_INT3_PCI_MB1_N",       "FPGA1_INT3_PCI_MB0_N",
      "FPGA1_INT4_SSU_DCU_HW_HP_1", "FPGA1_INT4_VME_OWN_T0_N",
      "FPGA1_INT4_VME_ABR_T0_N",    "FPGA1_INT4_T0_WATCHDOG",
  };
  enum GAMECP_INTERRUPT_REASONS {
    GAMECP_INTERRUPTS_RISING,
    GAMECP_INTERRUPTS_FALLING,
    GAMECP_INTERRUPTS_BOTH,
    GAMECP_INTERRUPTS_NONE,
  };
  const int size[] = {
      GAMECP_INTERRUPTS_RISING,
      GAMECP_INTERRUPTS_FALLING,
      GAMECP_INTERRUPTS_BOTH,
      GAMECP_INTERRUPTS_NONE,
  };
  return (char *)fpga1_event_names[event / (sizeof(size) / sizeof(size[0]))];
}


x86 assembly (clang, -O0):
<gamecp_name>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x1302(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0x12ff(%rip),%rax
mov    %rax,-0x18(%rbp)
movslq -0x4(%rbp),%rcx
shr    $0x2,%rcx
lea    0x2f04(%rip),%rax
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gamecp_name>:
movslq %edi,%rax
and    $0xfffffffffffffffc,%rax
lea    0xef2(%rip),%rcx
movslq (%rax,%rcx,1),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
@gamecp_name.fpga1_event_names = internal global [48 x i8*] [i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.4, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i32 0, i32 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.6, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.7, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.8, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.9, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.10, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.11, i32 0, i32 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.12, i32 0, i32 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.13, i32 0, i32 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.14, i32 0, i32 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.15, i32 0, i32 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.16, i32 0, i32 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.17, i32 0, i32 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.18, i32 0, i32 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.19, i32 0, i32 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.20, i32 0, i32 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.21, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.22, i32 0, i32 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.23, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.24, i32 0, i32 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.25, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.26, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.27, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.28, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.29, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.30, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.31, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.32, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.33, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.34, i32 0, i32 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.35, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.36, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.37, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.38, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.39, i32 0, i32 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.40, i32 0, i32 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.41, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.42, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.43, i32 0, i32 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.44, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.45, i32 0, i32 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.46, i32 0, i32 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.47, i32 0, i32 0)]
@.str = [18 x i8] c"FPGA1_INT0_T7_INT\00"
@.str.1 = [19 x i8] c"FPGA1_INT0_IRQ7I_N\00"
@.str.2 = [19 x i8] c"FPGA1_INT0_IRQ6I_N\00"
@.str.3 = [19 x i8] c"FPGA1_INT0_IRQ4I_N\00"
@.str.4 = [19 x i8] c"FPGA1_INT0_IRQ3I_N\00"
@.str.5 = [19 x i8] c"FPGA1_INT0_IRQ1I_N\00"
@.str.6 = [27 x i8] c"FPGA1_INT0_SSU_DCU_HW_NP_1\00"
@.str.7 = [19 x i8] c"FPGA1_INT0_RTC_INT\00"
@.str.8 = [19 x i8] c"FPGA1_INT0_IRQ2I_N\00"
@.str.9 = [24 x i8] c"FPGA1_INT0_CP50M1_IN3_N\00"
@.str.10 = [24 x i8] c"FPGA1_INT0_CP50M1_IN2_N\00"
@.str.11 = [24 x i8] c"FPGA1_INT0_CP50M1_IN1_N\00"
@.str.12 = [22 x i8] c"FPGA1_INT0_TIMER5_IRQ\00"
@.str.13 = [22 x i8] c"FPGA1_INT0_TIMER4_IRQ\00"
@.str.14 = [22 x i8] c"FPGA1_INT0_TIMER0_IRQ\00"
@.str.15 = [17 x i8] c"FPGA1_INT0_T0_IN\00"
@.str.16 = [17 x i8] c"FPGA1_INT0_L4_IN\00"
@.str.17 = [17 x i8] c"FPGA1_INT0_L3_IN\00"
@.str.18 = [17 x i8] c"FPGA1_INT0_L2_IN\00"
@.str.19 = [17 x i8] c"FPGA1_INT0_L1_IN\00"
@.str.20 = [17 x i8] c"FPGA1_INT0_L0_IN\00"
@.str.21 = [20 x i8] c"FPGA1_INT0_PNIO_RES\00"
@.str.22 = [19 x i8] c"FPGA1_INT0_PNIO_RT\00"
@.str.23 = [20 x i8] c"FPGA1_INT0_PNIO_IRT\00"
@.str.24 = [24 x i8] c"FPGA1_INT0_PNIO_SND_OUT\00"
@.str.25 = [28 x i8] c"FPGA1_INT0_VME_PNIO_SND_OUT\00"
@.str.26 = [24 x i8] c"FPGA1_INT1_PCIX2_INTA_N\00"
@.str.27 = [24 x i8] c"FPGA1_INT1_PCIX2_INTB_N\00"
@.str.28 = [24 x i8] c"FPGA1_INT1_PCIX2_INTC_N\00"
@.str.29 = [24 x i8] c"FPGA1_INT1_PCIX2_INTD_N\00"
@.str.30 = [24 x i8] c"FPGA1_INT1_PCIX1_INTA_N\00"
@.str.31 = [24 x i8] c"FPGA1_INT1_PCIX1_INTB_N\00"
@.str.32 = [24 x i8] c"FPGA1_INT1_PCIX1_INTC_N\00"
@.str.33 = [24 x i8] c"FPGA1_INT1_PCIX1_INTD_N\00"
@.str.34 = [24 x i8] c"FPGA1_INT1_FPGA_RTC_INT\00"
@.str.35 = [27 x i8] c"FPGA1_INT1_SSU_DCU_HW_NP_2\00"
@.str.36 = [21 x i8] c"FPGA1_INT1_PCI_MB3_N\00"
@.str.37 = [21 x i8] c"FPGA1_INT1_PCI_MB2_N\00"
@.str.38 = [19 x i8] c"FPGA1_INT3_IRQ5I_N\00"
@.str.39 = [21 x i8] c"FPGA1_INT3_ACFAILI_N\00"
@.str.40 = [19 x i8] c"FPGA1_INT3_BCLRI_N\00"
@.str.41 = [27 x i8] c"FPGA1_INT3_SSU_DCU_HW_HP_2\00"
@.str.42 = [21 x i8] c"FPGA1_INT3_PCI_MB1_N\00"
@.str.43 = [21 x i8] c"FPGA1_INT3_PCI_MB0_N\00"
@.str.44 = [27 x i8] c"FPGA1_INT4_SSU_DCU_HW_HP_1\00"
@.str.45 = [24 x i8] c"FPGA1_INT4_VME_OWN_T0_N\00"
@.str.46 = [24 x i8] c"FPGA1_INT4_VME_ABR_T0_N\00"
@.str.47 = [23 x i8] c"FPGA1_INT4_T0_WATCHDOG\00"
@__const.gamecp_name.size = [4 x i32] [i32 0, i32 1, i32 2, i32 3]
define i8* @gamecp_name(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i32]
store i32 %0, i32* %2
%4 = bitcast [4 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = udiv i64 %6, 4
%8 = getelementptr inbounds [48 x i8*], [48 x i8*]* @gamecp_name.fpga1_event_names, i64 0, i64 %7
%9 = load i8*, i8** %8
ret i8* %9
}

LLVM IR (-O2):
@reltable.gamecp_name = internal unnamed_addr constant [48 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([18 x i8]* @.str to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.1 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.2 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.3 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.4 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.5 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([27 x i8]* @.str.6 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.7 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.8 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.9 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.10 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.11 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([22 x i8]* @.str.12 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([22 x i8]* @.str.13 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([22 x i8]* @.str.14 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.15 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.16 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.17 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.18 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.19 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([17 x i8]* @.str.20 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([20 x i8]* @.str.21 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.22 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([20 x i8]* @.str.23 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.24 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([28 x i8]* @.str.25 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.26 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.27 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.28 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.29 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.30 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.31 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.32 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.33 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.34 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([27 x i8]* @.str.35 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([21 x i8]* @.str.36 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([21 x i8]* @.str.37 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.38 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([21 x i8]* @.str.39 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([19 x i8]* @.str.40 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([27 x i8]* @.str.41 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([21 x i8]* @.str.42 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([21 x i8]* @.str.43 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([27 x i8]* @.str.44 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.45 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([24 x i8]* @.str.46 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([23 x i8]* @.str.47 to i64), i64 ptrtoint ([48 x i32]* @reltable.gamecp_name to i64)) to i32)]
@.str = [18 x i8] c"FPGA1_INT0_T7_INT\00"
@.str.1 = [19 x i8] c"FPGA1_INT0_IRQ7I_N\00"
@.str.2 = [19 x i8] c"FPGA1_INT0_IRQ6I_N\00"
@.str.3 = [19 x i8] c"FPGA1_INT0_IRQ4I_N\00"
@.str.4 = [19 x i8] c"FPGA1_INT0_IRQ3I_N\00"
@.str.5 = [19 x i8] c"FPGA1_INT0_IRQ1I_N\00"
@.str.6 = [27 x i8] c"FPGA1_INT0_SSU_DCU_HW_NP_1\00"
@.str.7 = [19 x i8] c"FPGA1_INT0_RTC_INT\00"
@.str.8 = [19 x i8] c"FPGA1_INT0_IRQ2I_N\00"
@.str.9 = [24 x i8] c"FPGA1_INT0_CP50M1_IN3_N\00"
@.str.10 = [24 x i8] c"FPGA1_INT0_CP50M1_IN2_N\00"
@.str.11 = [24 x i8] c"FPGA1_INT0_CP50M1_IN1_N\00"
@.str.12 = [22 x i8] c"FPGA1_INT0_TIMER5_IRQ\00"
@.str.13 = [22 x i8] c"FPGA1_INT0_TIMER4_IRQ\00"
@.str.14 = [22 x i8] c"FPGA1_INT0_TIMER0_IRQ\00"
@.str.15 = [17 x i8] c"FPGA1_INT0_T0_IN\00"
@.str.16 = [17 x i8] c"FPGA1_INT0_L4_IN\00"
@.str.17 = [17 x i8] c"FPGA1_INT0_L3_IN\00"
@.str.18 = [17 x i8] c"FPGA1_INT0_L2_IN\00"
@.str.19 = [17 x i8] c"FPGA1_INT0_L1_IN\00"
@.str.20 = [17 x i8] c"FPGA1_INT0_L0_IN\00"
@.str.21 = [20 x i8] c"FPGA1_INT0_PNIO_RES\00"
@.str.22 = [19 x i8] c"FPGA1_INT0_PNIO_RT\00"
@.str.23 = [20 x i8] c"FPGA1_INT0_PNIO_IRT\00"
@.str.24 = [24 x i8] c"FPGA1_INT0_PNIO_SND_OUT\00"
@.str.25 = [28 x i8] c"FPGA1_INT0_VME_PNIO_SND_OUT\00"
@.str.26 = [24 x i8] c"FPGA1_INT1_PCIX2_INTA_N\00"
@.str.27 = [24 x i8] c"FPGA1_INT1_PCIX2_INTB_N\00"
@.str.28 = [24 x i8] c"FPGA1_INT1_PCIX2_INTC_N\00"
@.str.29 = [24 x i8] c"FPGA1_INT1_PCIX2_INTD_N\00"
@.str.30 = [24 x i8] c"FPGA1_INT1_PCIX1_INTA_N\00"
@.str.31 = [24 x i8] c"FPGA1_INT1_PCIX1_INTB_N\00"
@.str.32 = [24 x i8] c"FPGA1_INT1_PCIX1_INTC_N\00"
@.str.33 = [24 x i8] c"FPGA1_INT1_PCIX1_INTD_N\00"
@.str.34 = [24 x i8] c"FPGA1_INT1_FPGA_RTC_INT\00"
@.str.35 = [27 x i8] c"FPGA1_INT1_SSU_DCU_HW_NP_2\00"
@.str.36 = [21 x i8] c"FPGA1_INT1_PCI_MB3_N\00"
@.str.37 = [21 x i8] c"FPGA1_INT1_PCI_MB2_N\00"
@.str.38 = [19 x i8] c"FPGA1_INT3_IRQ5I_N\00"
@.str.39 = [21 x i8] c"FPGA1_INT3_ACFAILI_N\00"
@.str.40 = [19 x i8] c"FPGA1_INT3_BCLRI_N\00"
@.str.41 = [27 x i8] c"FPGA1_INT3_SSU_DCU_HW_HP_2\00"
@.str.42 = [21 x i8] c"FPGA1_INT3_PCI_MB1_N\00"
@.str.43 = [21 x i8] c"FPGA1_INT3_PCI_MB0_N\00"
@.str.44 = [27 x i8] c"FPGA1_INT4_SSU_DCU_HW_HP_1\00"
@.str.45 = [24 x i8] c"FPGA1_INT4_VME_OWN_T0_N\00"
@.str.46 = [24 x i8] c"FPGA1_INT4_VME_ABR_T0_N\00"
@.str.47 = [23 x i8] c"FPGA1_INT4_T0_WATCHDOG\00"
define i8* @gamecp_name(i32 %0) {
%2 = sext i32 %0 to i64
%3 = lshr i64 %2, 2
%4 = shl i64 %3, 2
%5 = call i8* @llvm.load.relative.i64(i8* bitcast ([48 x i32]* @reltable.gamecp_name to i8*), i64 %4)
ret i8* %5
}