void ConfigPins() {
  (*((volatile unsigned int *)(0x40048000 + 0x080))) |=
      (1 << 6) + (1 << 13) + (1 << 16);
  (*((volatile unsigned int *)(0x40044000 + 0x01c))) &= ~((1 << 1) + (1 << 0));
  (*((volatile unsigned int *)(0x40044000 + 0x078))) =
      (1 << 0) + (1 << 4) + (1 << 7);
  (*((volatile unsigned int *)(0x40044000 + 0x07c))) =
      (1 << 0) + (1 << 4) + (1 << 7);
  (*((volatile unsigned int *)(0x40044000 + 0x080))) =
      (1 << 0) + (1 << 4) + (1 << 7);
  (*((volatile unsigned int *)(0x50000000 + 0x8000))) |= 0x1fc;
  (*((volatile unsigned int *)(0x50000000 + 0x3ffc))) = 0;
  (*((volatile unsigned int *)(0x40044000 + 0x074))) = 2;
  (*((volatile unsigned int *)(0x40048000 + 0x238))) &= ~(1 << 4);
  (*((volatile unsigned int *)(0x4001c000 + 0x000))) = (11 << 8) + (1 << 0);
}


x86 assembly (clang, -O0):
<ConfigPins>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40048080,%eax
mov    (%rax),%ecx
or     $0x12040,%ecx
mov    $0x40048080,%eax
mov    %ecx,(%rax)
mov    $0x4004401c,%eax
mov    (%rax),%ecx
and    $0xfffffffc,%ecx
mov    $0x4004401c,%eax
mov    %ecx,(%rax)
mov    $0x40044078,%eax
movl   $0x91,(%rax)
mov    $0x4004407c,%eax
movl   $0x91,(%rax)
mov    $0x40044080,%eax
movl   $0x91,(%rax)
mov    $0x50008000,%eax
mov    (%rax),%ecx
or     $0x1fc,%ecx
mov    $0x50008000,%eax
mov    %ecx,(%rax)
mov    $0x50003ffc,%eax
movl   $0x0,(%rax)
mov    $0x40044074,%eax
movl   $0x2,(%rax)
mov    $0x40048238,%eax
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    $0x40048238,%eax
mov    %ecx,(%rax)
mov    $0x4001c000,%eax
movl   $0xb01,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConfigPins>:
orl    $0x12040,0x40048080
andl   $0xfffffffc,0x4004401c
fc
movl   $0x91,0x40044078
movl   $0x91,0x4004407c
movl   $0x91,0x40044080
orl    $0x1fc,0x50008000
movl   $0x0,0x50003ffc
movl   $0x2,0x40044074
andl   $0xffffffef,0x40048238
ef
movl   $0xb01,0x4001c000
ret

LLVM IR (-O0):
define void @ConfigPins() {
%1 = load volatile i32, i32* inttoptr (i64 1074036864 to i32*)
%2 = or i32 %1, 73792
store volatile i32 %2, i32* inttoptr (i64 1074036864 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1074020380 to i32*)
%4 = and i32 %3, -4
store volatile i32 %4, i32* inttoptr (i64 1074020380 to i32*)
store volatile i32 145, i32* inttoptr (i64 1074020472 to i32*)
store volatile i32 145, i32* inttoptr (i64 1074020476 to i32*)
store volatile i32 145, i32* inttoptr (i64 1074020480 to i32*)
%5 = load volatile i32, i32* inttoptr (i64 1342210048 to i32*)
%6 = or i32 %5, 508
store volatile i32 %6, i32* inttoptr (i64 1342210048 to i32*)
store volatile i32 0, i32* inttoptr (i64 1342193660 to i32*)
store volatile i32 2, i32* inttoptr (i64 1074020468 to i32*)
%7 = load volatile i32, i32* inttoptr (i64 1074037304 to i32*)
%8 = and i32 %7, -17
store volatile i32 %8, i32* inttoptr (i64 1074037304 to i32*)
store volatile i32 2817, i32* inttoptr (i64 1073856512 to i32*)
ret void
}

LLVM IR (-O2):
define void @ConfigPins() {
%1 = load volatile i32, i32* inttoptr (i64 1074036864 to i32*)
%2 = or i32 %1, 73792
store volatile i32 %2, i32* inttoptr (i64 1074036864 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1074020380 to i32*)
%4 = and i32 %3, -4
store volatile i32 %4, i32* inttoptr (i64 1074020380 to i32*)
store volatile i32 145, i32* inttoptr (i64 1074020472 to i32*)
store volatile i32 145, i32* inttoptr (i64 1074020476 to i32*)
store volatile i32 145, i32* inttoptr (i64 1074020480 to i32*)
%5 = load volatile i32, i32* inttoptr (i64 1342210048 to i32*)
%6 = or i32 %5, 508
store volatile i32 %6, i32* inttoptr (i64 1342210048 to i32*)
store volatile i32 0, i32* inttoptr (i64 1342193660 to i32*)
store volatile i32 2, i32* inttoptr (i64 1074020468 to i32*)
%7 = load volatile i32, i32* inttoptr (i64 1074037304 to i32*)
%8 = and i32 %7, -17
store volatile i32 %8, i32* inttoptr (i64 1074037304 to i32*)
store volatile i32 2817, i32* inttoptr (i64 1073856512 to i32*)
ret void
}