__attribute__((no, noclone)) unsigned __int128 t118_4mul(signed __int128 x) {
  signed __int128 y = (-33);
  unsigned __int128 r;
  if (__builtin_mul_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t118_4mul>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x128,%rsp
mov    %rdi,-0x50(%rbp)
mov    %rsi,-0x48(%rbp)
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x58(%rbp)
mov    %rax,-0x60(%rbp)
movq   $0xffffffffffffffff,-0x68(%rbp)
ff
movq   $0xffffffffffffffdf,-0x70(%rbp)
ff
mov    -0x60(%rbp),%rax
mov    %rax,-0x130(%rbp)
mov    -0x58(%rbp),%rax
mov    %rax,-0xe0(%rbp)
sar    $0x3f,%rax
mov    %rax,-0x120(%rbp)
mov    -0x70(%rbp),%r15
mov    -0x68(%rbp),%rcx
mov    %rcx,-0x128(%rbp)
sar    $0x3f,%rcx
mov    %rcx,-0xd8(%rbp)
mul    %r15
mov    %rax,%r8
mov    -0x120(%rbp),%rax
mov    %rdx,%rbx
mov    -0x128(%rbp),%rdx
mov    %r8,%rsi
add    %rbx,%rsi
mov    %rsi,-0x148(%rbp)
mov    %rbx,%rsi
adc    $0x0,%rsi
mul    %rdx
mov    %rax,%r12
mov    -0x130(%rbp),%rax
mov    %rdx,%r14
mov    -0x148(%rbp),%rdx
mov    %r12,%rdi
add    %rdx,%rdi
adc    %r14,%rsi
setb   %dl
movzbl %dl,%edx
add    %rsi,%r12
adc    %rdx,%r14
mul    %r15
mov    %rax,%rsi
mov    -0xe0(%rbp),%rax
mov    %rsi,-0x98(%rbp)
mov    %rdx,%rsi
mul    %r15
mov    %rax,%r11
mov    -0x130(%rbp),%rax
mov    %rdx,%r10
mov    -0x128(%rbp),%rdx
add    %rsi,%r11
adc    $0x0,%r10
mul    %rdx
mov    %rax,%r9
mov    -0xe0(%rbp),%rax
mov    %rdx,%rsi
mov    -0x128(%rbp),%rdx
add    %r11,%r9
mov    %r9,-0xb8(%rbp)
adc    %rsi,%r10
setb   %sil
movzbl %sil,%esi
mov    %esi,%r9d
mul    %rdx
mov    %rax,%rsi
mov    -0x130(%rbp),%rax
add    %r10,%rsi
adc    %r9,%rdx
mov    %r8,%r11
add    %rsi,%r11
adc    %rdx,%rdi
adc    $0x0,%r12
adc    $0x0,%r14
mul    %rcx
mov    %rax,%r9
mov    -0xe0(%rbp),%rax
mov    %r9,-0xc8(%rbp)
mov    %rdx,%r13
mov    %r13,-0xe8(%rbp)
mul    %rcx
mov    %rax,%rsi
mov    %rsi,%rcx
add    %r13,%rcx
mov    %rdx,%rax
adc    $0x0,%rax
mov    %r9,%r10
add    %rcx,%r10
mov    -0xd8(%rbp),%rcx
adc    %r13,%rax
setb   %r13b
movzbl %r13b,%r13d
add    %rax,%rsi
mov    -0x120(%rbp),%rax
adc    %r13,%rdx
add    %r11,%r9
adc    %rdi,%r10
adc    $0x0,%rsi
adc    $0x0,%rdx
add    %rsi,%r12
adc    %rdx,%r14
setb   %dl
movzbl %dl,%edx
mov    %rdx,-0x140(%rbp)
mul    %rcx
mov    %rax,%rdi
mov    -0x140(%rbp),%rax
mov    %rdx,%r11
mov    %rdi,%rsi
add    %r11,%rsi
mov    %r11,%rcx
adc    $0x0,%rcx
mov    %rdi,%rdx
add    %rsi,%rdx
adc    %r11,%rcx
setb   %sil
movzbl %sil,%esi
mov    %esi,%r13d
mov    %rdi,%rsi
add    %rcx,%rsi
mov    -0x120(%rbp),%rcx
adc    %r13,%r11
add    %r12,%rdi
adc    %r14,%rdx
mov    %rdx,-0x88(%rbp)
adc    %rax,%rsi
adc    $0x0,%r11
mov    %r15,%rax
mul    %rcx
mov    %rax,%r14
mov    -0x128(%rbp),%rax
mov    %r14,-0xa0(%rbp)
mov    %rdx,-0x138(%rbp)
mul    %rcx
mov    %rax,%r13
mov    -0xa0(%rbp),%rax
mov    %rdx,%r12
mov    -0x138(%rbp),%rdx
mov    %r13,%rcx
add    %rdx,%rcx
mov    %r12,%r14
adc    $0x0,%r14
add    %rcx,%rax
mov    -0x130(%rbp),%rcx
mov    %rax,-0x90(%rbp)
mov    -0x128(%rbp),%rax
adc    %rdx,%r14
setb   %dl
movzbl %dl,%edx
add    %r14,%r13
mov    -0x120(%rbp),%r14
adc    %rdx,%r12
mov    -0xd8(%rbp),%rdx
imul   %rax,%r14
mov    -0x120(%rbp),%rax
add    %r14,%rbx
mov    %rax,%r14
imul   %r15,%r14
add    %r14,%rbx
mov    %rbx,-0x118(%rbp)
imul   %rdx
mov    %rax,%r14
mov    -0xd8(%rbp),%rax
mov    %r14,-0xc0(%rbp)
mov    %rdx,%rbx
mov    -0x118(%rbp),%rdx
mov    %rbx,-0x108(%rbp)
add    %r14,%r8
adc    %rbx,%rdx
add    %r8,%r13
adc    %rdx,%r12
mul    %rcx
mov    %rax,%r15
mov    -0xd8(%rbp),%rax
mov    %rdx,%r8
mov    -0xe0(%rbp),%rdx
mov    %r15,%rbx
add    %r8,%rbx
mov    %rbx,-0x110(%rbp)
adc    $0x0,%r8
mov    %r8,-0x100(%rbp)
mul    %rdx
mov    %rax,%rbx
mov    -0x110(%rbp),%rax
mov    %rdx,%r8
mov    -0x108(%rbp),%rdx
mov    %rbx,%r14
add    %rax,%r14
mov    -0x100(%rbp),%rax
adc    %r8,%rax
mov    %rax,-0xf8(%rbp)
setb   %al
movzbl %al,%eax
mov    %rax,-0xf0(%rbp)
mov    -0xf8(%rbp),%rax
add    %rax,%rbx
mov    -0xf0(%rbp),%rax
adc    %rax,%r8
mov    -0xd8(%rbp),%rax
imul   %rax,%rcx
mov    -0xe8(%rbp),%rax
add    %rcx,%rax
mov    -0xe0(%rbp),%rcx
mov    %rax,-0xd0(%rbp)
mov    -0xd8(%rbp),%rax
imul   %rax,%rcx
mov    -0xd0(%rbp),%rax
add    %rcx,%rax
mov    -0xc8(%rbp),%rcx
mov    %rax,-0xb0(%rbp)
mov    -0xc0(%rbp),%rax
add    %rcx,%rax
mov    -0xb8(%rbp),%rcx
mov    %rax,-0xa8(%rbp)
mov    -0xb0(%rbp),%rax
adc    %rax,%rdx
mov    -0xa8(%rbp),%rax
add    %rax,%rbx
mov    -0xa0(%rbp),%rax
adc    %rdx,%r8
mov    -0x98(%rbp),%rdx
add    %rax,%r15
mov    -0x90(%rbp),%rax
adc    %rax,%r14
mov    -0x88(%rbp),%rax
adc    %r13,%rbx
adc    %r12,%r8
add    %r15,%rdi
adc    %r14,%rax
adc    %rbx,%rsi
adc    %r8,%r11
mov    %r10,%r8
sar    $0x3f,%r8
xor    %r8,%r11
xor    %r8,%rax
or     %r11,%rax
xor    %r8,%rsi
xor    %r8,%rdi
or     %rsi,%rdi
or     %rax,%rdi
mov    %r9d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%r8
xor    %r10,%r8
xor    %r9,%rax
or     %r8,%rax
or     %rdi,%rax
or     %rsi,%rax
setne  %al
mov    %rdx,-0x80(%rbp)
mov    %rcx,-0x78(%rbp)
test   $0x1,%al
jne    1574 <t118_4mul+0x464>
jmp    157b <t118_4mul+0x46b>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x80(%rbp),%rax
mov    -0x78(%rbp),%rcx
mov    %rcx,-0x38(%rbp)
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rdx
add    $0x128,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

x86 assembly (clang, -O2):
<t118_4mul>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x58,%rsp
mov    %rsi,%r10
mov    %rsi,%rbp
sar    $0x3f,%rbp
mov    $0xffffffffffffffdf,%rcx
mov    %rbp,%rax
mov    %rbp,0x40(%rsp)
mul    %rcx
mov    %rax,%rcx
mov    %rax,%r8
mov    %rax,0x38(%rsp)
add    %rdx,%rcx
adc    $0x0,%rdx
mov    %rdx,%rsi
mov    $0xffffffffffffffff,%rdx
mov    %rbp,%rax
mul    %rdx
mov    %rdx,%r9
mov    %rax,%r11
add    %rax,%rcx
mov    %rcx,%r14
mov    %rcx,0x30(%rsp)
adc    %rdx,%rsi
mov    %rdi,%rbx
mov    %rdi,0x18(%rsp)
setb   %al
movzbl %al,%eax
add    %r11,%rsi
mov    %rsi,%rbp
mov    %rsi,0x28(%rsp)
adc    %rdx,%rax
mov    %rax,%r12
mov    %rax,0x20(%rsp)
mov    %rdi,%rax
mov    $0xffffffffffffffdf,%rcx
mul    %rcx
mov    %rdx,%rdi
mov    %rax,0x50(%rsp)
mov    %r10,%rax
mul    %rcx
mov    %rdx,%rsi
mov    %rax,%rcx
add    %rdi,%rcx
adc    $0x0,%rsi
mov    %rbx,%rax
mov    $0xffffffffffffffff,%rdi
mul    %rdi
mov    %rdx,%rbx
add    %rax,%rcx
mov    %rax,%r13
mov    %rax,0x8(%rsp)
mov    %rcx,0x48(%rsp)
adc    %rdx,%rsi
setb   %cl
mov    %r10,%rax
mul    %rdi
add    %rax,%rsi
movzbl %cl,%r15d
adc    %rdx,%r15
add    %r8,%rsi
adc    %r14,%r15
adc    $0x0,%rbp
mov    %r12,%r14
adc    $0x0,%r14
mov    %rax,%rcx
add    %rbx,%rcx
mov    %rdx,%rdi
adc    $0x0,%rdi
add    %r13,%rcx
adc    %rbx,%rdi
setb   %r8b
add    %rax,%rdi
movzbl %r8b,%eax
adc    %rdx,%rax
mov    %rax,0x10(%rsp)
add    %r13,%rsi
adc    %rcx,%r15
mov    %rdi,%r8
adc    $0x0,%r8
adc    $0x0,%rax
add    %rbp,%r8
adc    %r14,%rax
setb   %bpl
mov    %r11,%r12
add    %r9,%r12
mov    %r9,%r13
adc    $0x0,%r13
add    %r11,%r12
adc    %r9,%r13
setb   %dl
add    %r11,%r13
movzbl %dl,%r14d
adc    %r9,%r14
add    %r11,%r8
adc    %rax,%r12
movzbl %bpl,%eax
adc    %rax,%r13
adc    $0x0,%r14
sub    0x18(%rsp),%rbx
sub    %r10,%rbx
mov    0x40(%rsp),%r9
mov    %r9,%rax
mov    $0xffffffffffffffff,%rdx
imul   %rdx
mov    %rax,%r11
mov    %rdx,%r10
mov    0x8(%rsp),%rbp
add    %rax,%rbp
adc    %rdx,%rbx
add    %rdi,%rbp
adc    0x10(%rsp),%rbx
mov    %r9,%rax
mov    $0xffffffffffffffdf,%rdx
imul   %rdx
add    %r11,%rax
adc    %r10,%rdx
add    0x28(%rsp),%rax
adc    0x20(%rsp),%rdx
mov    0x8(%rsp),%rdi
add    0x38(%rsp),%rdi
adc    0x30(%rsp),%rcx
adc    %rbp,%rax
adc    %rbx,%rdx
add    %r8,%rdi
mov    %rdi,%rbp
adc    %r12,%rcx
adc    %r13,%rax
adc    %r14,%rdx
mov    %r15,%rdi
sar    $0x3f,%rdi
xor    %rdi,%rdx
xor    %rdi,%rcx
or     %rdx,%rcx
xor    %rdi,%rax
xor    %rbp,%rdi
or     %rax,%rdi
or     %rcx,%rdi
mov    %esi,%eax
and    $0x1,%eax
neg    %rax
xor    %rax,%r15
xor    %rax,%rsi
or     %r15,%rsi
or     %rdi,%rsi
jne    1320 <t118_4mul+0x210>
test   %rax,%rax
jns    1327 <t118_4mul+0x217>
xor    %eax,%eax
call   1030 <bar@plt>
mov    0x50(%rsp),%rax
mov    0x48(%rsp),%rdx
add    $0x58,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define { i64, i64 } @t118_4mul(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = bitcast i128* %4 to { i64, i64 }*
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 0
store i64 %0, i64* %9
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 1
store i64 %1, i64* %10
%11 = load i128, i128* %4
store i128 %11, i128* %5
store i128 -33, i128* %6
%12 = load i128, i128* %5
%13 = load i128, i128* %6
%14 = sext i128 %12 to i129
%15 = sext i128 %13 to i129
%16 = call { i129, i1 } @llvm.smul.with.overflow.i129(i129 %14, i129 %15)
%17 = extractvalue { i129, i1 } %16, 1
%18 = extractvalue { i129, i1 } %16, 0
%19 = trunc i129 %18 to i128
%20 = zext i128 %19 to i129
%21 = icmp ne i129 %18, %20
%22 = or i1 %17, %21
store i128 %19, i128* %7
br i1 %22, label %23, label %25
23: ; preds = %2
%24 = call i32 (...) @bar()
br label %25
25: ; preds = %23, %2
%26 = load i128, i128* %7
store i128 %26, i128* %3
%27 = bitcast i128* %3 to { i64, i64 }*
%28 = load { i64, i64 }, { i64, i64 }* %27
ret { i64, i64 } %28
}

LLVM IR (-O2):
define { i64, i64 } @t118_4mul(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = sext i128 %6 to i129
%8 = tail call { i129, i1 } @llvm.smul.with.overflow.i129(i129 %7, i129 -33)
%9 = extractvalue { i129, i1 } %8, 1
%10 = extractvalue { i129, i1 } %8, 0
%11 = icmp slt i129 %10, 0
%12 = or i1 %9, %11
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = tail call i32 (...) @bar()
br label %15
15: ; preds = %13, %2
%16 = trunc i129 %10 to i64
%17 = lshr i129 %10, 64
%18 = trunc i129 %17 to i64
%19 = insertvalue { i64, i64 } poison, i64 %16, 0
%20 = insertvalue { i64, i64 } %19, i64 %18, 1
ret { i64, i64 } %20
}