int rlq_to_layout(int rlq, int prl, int raiddisks) {
  switch (prl) {
  case 0x00:
    return 0;
  case 0x01:
    return 0;
  case 0x04:
    switch (rlq) {
    case 0x01:
      return 0;
    default:
      return -1;
    }
  case 0x05:
    switch (rlq) {
    case 0x02:
      return 0;
    case 0x00:
      return 1;
    case 0x03:
      return 2;
    default:
      return -1;
    }
  case 0x06:
    switch (rlq) {
    case 0x02:
      return 9;
    case 0x01:
      return 8;
    case 0x03:
      return 10;
    default:
      return -1;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<rlq_to_layout>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x6,%rax
ja     123e <rlq_to_layout+0x13e>
mov    -0x18(%rbp),%rax
lea    0xed7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0x0,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
jne    1167 <rlq_to_layout+0x67>
jmp    115b <rlq_to_layout+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0xffffffff,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
test   %eax,%eax
je     11b4 <rlq_to_layout+0xb4>
jmp    1186 <rlq_to_layout+0x86>
mov    -0x1c(%rbp),%eax
sub    $0x2,%eax
je     11a8 <rlq_to_layout+0xa8>
jmp    1197 <rlq_to_layout+0x97>
mov    -0x1c(%rbp),%eax
sub    $0x3,%eax
je     11c0 <rlq_to_layout+0xc0>
jmp    11cc <rlq_to_layout+0xcc>
movl   $0x0,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0x1,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0x2,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0xffffffff,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
sub    $0x1,%eax
je     121a <rlq_to_layout+0x11a>
jmp    11ec <rlq_to_layout+0xec>
mov    -0x20(%rbp),%eax
sub    $0x2,%eax
je     120e <rlq_to_layout+0x10e>
jmp    11fd <rlq_to_layout+0xfd>
mov    -0x20(%rbp),%eax
sub    $0x3,%eax
je     1226 <rlq_to_layout+0x126>
jmp    1232 <rlq_to_layout+0x132>
movl   $0x9,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0x8,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0xa,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0xffffffff,-0x4(%rbp)
jmp    1245 <rlq_to_layout+0x145>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rlq_to_layout>:
cmp    $0x6,%esi
ja     111a <rlq_to_layout+0x1a>
xor    %eax,%eax
mov    %esi,%ecx
lea    0xef0(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
ret
mov    $0xffffffff,%eax
ret
xor    %eax,%eax
cmp    $0x1,%edi
setne  %al
neg    %eax
ret
mov    $0xffffffff,%eax
cmp    $0x4,%edi
jae    1119 <rlq_to_layout+0x19>
movslq %edi,%rax
lea    0xedd(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret
lea    -0x1(%rdi),%eax
add    $0x7,%edi
cmp    $0x3,%eax
mov    $0xffffffff,%eax
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @rlq_to_layout(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
switch i32 %8, label %27 [
i32 0, label %9
i32 1, label %10
i32 4, label %11
i32 5, label %15
i32 6, label %21
]
9: ; preds = %3
store i32 0, i32* %4
br label %28
10: ; preds = %3
store i32 0, i32* %4
br label %28
11: ; preds = %3
%12 = load i32, i32* %5
switch i32 %12, label %14 [
i32 1, label %13
]
13: ; preds = %11
store i32 0, i32* %4
br label %28
14: ; preds = %11
store i32 -1, i32* %4
br label %28
15: ; preds = %3
%16 = load i32, i32* %5
switch i32 %16, label %20 [
i32 2, label %17
i32 0, label %18
i32 3, label %19
]
17: ; preds = %15
store i32 0, i32* %4
br label %28
18: ; preds = %15
store i32 1, i32* %4
br label %28
19: ; preds = %15
store i32 2, i32* %4
br label %28
20: ; preds = %15
store i32 -1, i32* %4
br label %28
21: ; preds = %3
%22 = load i32, i32* %5
switch i32 %22, label %26 [
i32 2, label %23
i32 1, label %24
i32 3, label %25
]
23: ; preds = %21
store i32 9, i32* %4
br label %28
24: ; preds = %21
store i32 8, i32* %4
br label %28
25: ; preds = %21
store i32 10, i32* %4
br label %28
26: ; preds = %21
store i32 -1, i32* %4
br label %28
27: ; preds = %3
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %26, %25, %24, %23, %20, %19, %18, %17, %14, %13, %10, %9
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
@switch.table.rlq_to_layout = [4 x i32] [i32 1, i32 -1, i32 0, i32 2]
define i32 @rlq_to_layout(i32 %0, i32 %1, i32 %2) {
switch i32 %1, label %14 [
i32 0, label %19
i32 1, label %19
i32 4, label %4
i32 5, label %7
i32 6, label %9
]
4: ; preds = %3
%5 = icmp ne i32 %0, 1
%6 = sext i1 %5 to i32
br label %19
7: ; preds = %3
%8 = icmp ult i32 %0, 4
br i1 %8, label %15, label %19
9: ; preds = %3
%10 = add i32 %0, -1
%11 = icmp ult i32 %10, 3
%12 = add i32 %0, 7
%13 = select i1 %11, i32 %12, i32 -1
br label %19
14: ; preds = %3
br label %19
15: ; preds = %7
%16 = sext i32 %0 to i64
%17 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.rlq_to_layout, i64 0, i64 %16
%18 = load i32, i32* %17
br label %19
19: ; preds = %9, %7, %15, %4, %3, %3, %14
%20 = phi i32 [ -1, %14 ], [ 0, %3 ], [ 0, %3 ], [ %6, %4 ], [ %18, %15 ], [ -1, %7 ], [ %13, %9 ]
ret i32 %20
}