xunge/DecIR huggingface dataset:
int floatformat_always_valid(const struct floatformat *fmt, const void *from) {
  return 1;
}


x86 assembly (clang, -O0):
<floatformat_always_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatformat_always_valid>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.floatformat = type opaque
define i32 @floatformat_always_valid(%struct.floatformat* %0, i8* %1) {
%3 = alloca %struct.floatformat*
%4 = alloca i8*
store %struct.floatformat* %0, %struct.floatformat** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
%struct.floatformat = type opaque
define i32 @floatformat_always_valid(%struct.floatformat* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
unsigned long entryFunc();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ showImmediate(unsigned long);
int main(int argc, char *argv[]) {
  unsigned long retVal = entryFunc();
  showImmediate(retVal);
  printf("\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <entryFunc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <showImmediate@plt>
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <entryFunc@plt>
mov    %rax,%rdi
call   1040 <showImmediate@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i64
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i64 (...) @entryFunc()
store i64 %6, i64* %5
%7 = load i64, i64* %5
%8 = call i32 @showImmediate(i64 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @entryFunc()
%4 = tail call i32 @showImmediate(i64 %3)
%5 = tail call i32 @putchar(i32 10)
ret i32 0
}
void CFGMR3GetFirstChild(void) {}


x86 assembly (clang, -O0):
<CFGMR3GetFirstChild>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3GetFirstChild>:
ret

LLVM IR (-O0):
define void @CFGMR3GetFirstChild() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3GetFirstChild() {
ret void
}
void ft_get_values(char **data, char **original, char **answer) {
  *original = data[0];
  *answer = data[1];
}


x86 assembly (clang, -O0):
<ft_get_values>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_get_values>:
mov    (%rdi),%rax
mov    %rax,(%rsi)
mov    0x8(%rdi),%rax
mov    %rax,(%rdx)
ret

LLVM IR (-O0):
define void @ft_get_values(i8** %0, i8** %1, i8** %2) {
%4 = alloca i8**
%5 = alloca i8**
%6 = alloca i8**
store i8** %0, i8*** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
%10 = load i8**, i8*** %5
store i8* %9, i8** %10
%11 = load i8**, i8*** %4
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = load i8**, i8*** %6
store i8* %13, i8** %14
ret void
}

LLVM IR (-O2):
define void @ft_get_values(i8** nocapture %0, i8** nocapture writeonly %1, i8** nocapture writeonly %2) {
%4 = load i8*, i8** %0
store i8* %4, i8** %1
%5 = getelementptr inbounds i8*, i8** %0, i64 1
%6 = load i8*, i8** %5
store i8* %6, i8** %2
ret void
}
/* Type definitions */
struct colourSystem {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gamma_correct_gamut(struct colourSystem const *, double *);
void gamma_correct_rgb_gamut(const struct colourSystem *cs, double *r,
                             double *g, double *b) {
  gamma_correct_gamut(cs, r);
  gamma_correct_gamut(cs, g);
  gamma_correct_gamut(cs, b);
  return;
}


x86 assembly (clang, -O0):
<gamma_correct_rgb_gamut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <gamma_correct_gamut@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <gamma_correct_gamut@plt>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <gamma_correct_gamut@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gamma_correct_rgb_gamut>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rdi,%rbx
call   1030 <gamma_correct_gamut@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <gamma_correct_gamut@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <gamma_correct_gamut@plt>

LLVM IR (-O0):
%struct.colourSystem = type { i32 }
define void @gamma_correct_rgb_gamut(%struct.colourSystem* %0, double* %1, double* %2, double* %3) {
%5 = alloca %struct.colourSystem*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store %struct.colourSystem* %0, %struct.colourSystem** %5
store double* %1, double** %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load %struct.colourSystem*, %struct.colourSystem** %5
%10 = load double*, double** %6
%11 = call i32 @gamma_correct_gamut(%struct.colourSystem* %9, double* %10)
%12 = load %struct.colourSystem*, %struct.colourSystem** %5
%13 = load double*, double** %7
%14 = call i32 @gamma_correct_gamut(%struct.colourSystem* %12, double* %13)
%15 = load %struct.colourSystem*, %struct.colourSystem** %5
%16 = load double*, double** %8
%17 = call i32 @gamma_correct_gamut(%struct.colourSystem* %15, double* %16)
ret void
}

LLVM IR (-O2):
%struct.colourSystem = type { i32 }
define void @gamma_correct_rgb_gamut(%struct.colourSystem* %0, double* %1, double* %2, double* %3) {
%5 = tail call i32 @gamma_correct_gamut(%struct.colourSystem* %0, double* %1)
%6 = tail call i32 @gamma_correct_gamut(%struct.colourSystem* %0, double* %2)
%7 = tail call i32 @gamma_correct_gamut(%struct.colourSystem* %0, double* %3)
ret void
}
void conv(n, s) int n;
char *s;
{
  register i;
  *s++ = i = n / 91;
  *s = n - i * 91;
}


x86 assembly (clang, -O0):
<conv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x5b,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
imul   $0x5b,-0x14(%rbp),%ecx
sub    %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv>:
movslq %edi,%rax
imul   $0xffffffffb40b40b5,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x6,%ecx
add    %edx,%ecx
mov    %cl,(%rsi)
imul   $0xffffffa5,%ecx,%ecx
add    %eax,%ecx
mov    %cl,0x1(%rsi)
ret

LLVM IR (-O0):
define void @conv(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 91
store i32 %7, i32* %5
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %4
store i8 %8, i8* %9
%11 = load i32, i32* %3
%12 = load i32, i32* %5
%13 = mul nsw i32 %12, 91
%14 = sub nsw i32 %11, %13
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %4
store i8 %15, i8* %16
ret void
}

LLVM IR (-O2):
define void @conv(i32 %0, i8* nocapture writeonly %1) {
%3 = sdiv i32 %0, 91
%4 = trunc i32 %3 to i8
%5 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %4, i8* %1
%6 = mul nsw i32 %3, -91
%7 = add i32 %6, %0
%8 = trunc i32 %7 to i8
store i8 %8, i8* %5
ret void
}
int swapDoors(int chosenDoor, int revealedDoor, int *doors) {
  int newDoor = -1;
  do {
    ++newDoor;
  } while (newDoor == chosenDoor || newDoor == revealedDoor);
  return newDoor;
}


x86 assembly (clang, -O0):
<swapDoors>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0xffffffff,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    $0x1,%al
cmp    -0x4(%rbp),%ecx
mov    %al,-0x15(%rbp)
je     113b <swapDoors+0x3b>
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1115 <swapDoors+0x15>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapDoors>:
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nop
lea    (%rsi,%rax,1),%ecx
lea    (%rdi,%rax,1),%edx
add    $0xffffffff,%eax
cmp    $0x1,%edx
je     1110 <swapDoors+0x10>
cmp    $0x1,%ecx
je     1110 <swapDoors+0x10>
neg    %eax
ret

LLVM IR (-O0):
define i32 @swapDoors(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
store i32 -1, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = add nsw i32 %9, 1
store i32 %10, i32* %7
br label %11
11: ; preds = %8
%12 = load i32, i32* %7
%13 = load i32, i32* %4
%14 = icmp eq i32 %12, %13
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i32, i32* %7
%17 = load i32, i32* %5
%18 = icmp eq i32 %16, %17
br label %19
19: ; preds = %15, %11
%20 = phi i1 [ true, %11 ], [ %18, %15 ]
br i1 %20, label %8, label %21
21: ; preds = %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @swapDoors(i32 %0, i32 %1, i32* nocapture readnone %2) {
br label %4
4: ; preds = %4, %3
%5 = phi i32 [ -1, %3 ], [ %6, %4 ]
%6 = add nsw i32 %5, 1
%7 = icmp eq i32 %6, %0
%8 = icmp eq i32 %6, %1
%9 = or i1 %7, %8
br i1 %9, label %4, label %10
10: ; preds = %4
ret i32 %6
}
float valor_pagamento(float x, float y) {
  if (y == 0)
    return x;
  else
    return x + (x * 0.03) + x * (0.01 * y);
}


x86 assembly (clang, -O0):
<valor_pagamento>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    1134 <valor_pagamento+0x34>
jp     1134 <valor_pagamento+0x34>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1185 <valor_pagamento+0x85>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xeba(%rip),%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0xc(%rbp),%xmm2
cvtss2sd %xmm2,%xmm3
movsd  0xe90(%rip),%xmm2
mulsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<valor_pagamento>:
xorps  %xmm2,%xmm2
ucomiss %xmm2,%xmm1
jne    110b <valor_pagamento+0xb>
jp     110b <valor_pagamento+0xb>
ret
cvtss2sd %xmm0,%xmm0
movsd  0xee9(%rip),%xmm2
mulsd  %xmm0,%xmm2
addsd  %xmm0,%xmm2
cvtss2sd %xmm1,%xmm1
mulsd  0xedd(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  %xmm2,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @valor_pagamento(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %5
%7 = fcmp oeq float %6, 0.000000e+00
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %4
store float %9, float* %3
br label %23
10: ; preds = %2
%11 = load float, float* %4
%12 = fpext float %11 to double
%13 = load float, float* %4
%14 = fpext float %13 to double
%15 = call double @llvm.fmuladd.f64(double %14, double 3.000000e-02, double %12)
%16 = load float, float* %4
%17 = fpext float %16 to double
%18 = load float, float* %5
%19 = fpext float %18 to double
%20 = fmul double 1.000000e-02, %19
%21 = call double @llvm.fmuladd.f64(double %17, double %20, double %15)
%22 = fptrunc double %21 to float
store float %22, float* %3
br label %23
23: ; preds = %10, %8
%24 = load float, float* %3
ret float %24
}

LLVM IR (-O2):
define float @valor_pagamento(float %0, float %1) {
%3 = fcmp oeq float %1, 0.000000e+00
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = fpext float %0 to double
%6 = tail call double @llvm.fmuladd.f64(double %5, double 3.000000e-02, double %5)
%7 = fpext float %1 to double
%8 = fmul double %7, 1.000000e-02
%9 = tail call double @llvm.fmuladd.f64(double %5, double %8, double %6)
%10 = fptrunc double %9 to float
br label %11
11: ; preds = %2, %4
%12 = phi float [ %10, %4 ], [ %0, %2 ]
ret float %12
}
/* Variables and functions */
int /*<<< orphan*/ asfPrintError(char *, char *);
void check_return(int ret, char *msg) {
  if (ret != 0) {
    asfPrintError("%s\n", msg);
  }
}


x86 assembly (clang, -O0):
<check_return>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1139 <check_return+0x29>
mov    -0x10(%rbp),%rsi
lea    0xecc(%rip),%rdi
call   1030 <asfPrintError@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_return>:
test   %edi,%edi
je     1120 <check_return+0x10>
lea    0xee5(%rip),%rdi
jmp    1030 <asfPrintError@plt>
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @check_return(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @asfPrintError(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
br label %10
10: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @check_return(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @asfPrintError(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %6
6: ; preds = %4, %2
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
struct TYPE_3__ {
  int /*<<< orphan*/ member_0;
};
typedef TYPE_1__ mbstate_t;

/* Variables and functions */
size_t wcsrtombs(char *, int /*<<< orphan*/ const **, size_t, TYPE_1__ *);
size_t wcstombs(char *restrict s, const wchar_t *restrict wcs, size_t size) {
  mbstate_t ps = {0};
  return wcsrtombs(s, (const wchar_t **)&wcs, size, &ps);
}


x86 assembly (clang, -O0):
<wcstombs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <memset@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    -0x10(%rbp),%rsi
lea    -0x20(%rbp),%rcx
call   1030 <wcsrtombs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcstombs>:
sub    $0x18,%rsp
mov    %rsi,0x10(%rsp)
movl   $0x0,0x8(%rsp)
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rcx
call   1030 <wcsrtombs@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
define i64 @wcstombs(i8* noalias %0, i32* noalias %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i64
%7 = alloca %struct.TYPE_3__
store i8* %0, i8** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%8 = bitcast %struct.TYPE_3__* %7 to i8*
%9 = load i8*, i8** %4
%10 = load i64, i64* %6
%11 = call i64 @wcsrtombs(i8* %9, i32** %5, i64 %10, %struct.TYPE_3__* %7)
ret i64 %11
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
define i64 @wcstombs(i8* noalias %0, i32* noalias %1, i64 %2) {
%4 = alloca i32*
%5 = alloca %struct.TYPE_3__
store i32* %1, i32** %4
%6 = bitcast %struct.TYPE_3__* %5 to i8*
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i64 0, i32 0
store i32 0, i32* %7
%8 = call i64 @wcsrtombs(i8* %0, i32** %4, i64 %2, %struct.TYPE_3__* %5)
ret i64 %8
}
int trailingZeroes(int n) {
  if (n <= 0) {
    return 0;
  }
  int c = 0;
  int i = 5;
  while (i <= n) {
    c += n / i;
    i *= 5;
  }
  return c;
}


x86 assembly (clang, -O0):
<trailingZeroes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     111d <trailingZeroes+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1156 <trailingZeroes+0x56>
movl   $0x0,-0xc(%rbp)
movl   $0x5,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1150 <trailingZeroes+0x50>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
imul   $0x5,-0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    112b <trailingZeroes+0x2b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trailingZeroes>:
xor    %ecx,%ecx
cmp    $0x5,%edi
jl     111e <trailingZeroes+0x1e>
xor    %ecx,%ecx
mov    $0x5,%esi
xchg   %ax,%ax
mov    %edi,%eax
cltd
idiv   %esi
add    %eax,%ecx
lea    (%rsi,%rsi,4),%esi
cmp    %edi,%esi
jle    1110 <trailingZeroes+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @trailingZeroes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %24
9: ; preds = %1
store i32 0, i32* %4
store i32 5, i32* %5
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %5
%12 = load i32, i32* %3
%13 = icmp sle i32 %11, %12
br i1 %13, label %14, label %22
14: ; preds = %10
%15 = load i32, i32* %3
%16 = load i32, i32* %5
%17 = sdiv i32 %15, %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, %17
store i32 %19, i32* %4
%20 = load i32, i32* %5
%21 = mul nsw i32 %20, 5
store i32 %21, i32* %5
br label %10
22: ; preds = %10
%23 = load i32, i32* %4
store i32 %23, i32* %2
br label %24
24: ; preds = %22, %8
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @trailingZeroes(i32 %0) {
%2 = icmp slt i32 %0, 5
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 5, %1 ]
%5 = phi i32 [ %7, %3 ], [ 0, %1 ]
%6 = sdiv i32 %0, %4
%7 = add nsw i32 %6, %5
%8 = mul nsw i32 %4, 5
%9 = icmp sgt i32 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
double rpm_to_hz(double rpm) { return rpm / 60.0; }


x86 assembly (clang, -O0):
<rpm_to_hz>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpm_to_hz>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @rpm_to_hz(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 6.000000e+01
ret double %4
}

LLVM IR (-O2):
define double @rpm_to_hz(double %0) {
%2 = fdiv double %0, 6.000000e+01
ret double %2
}
/* Type definitions */
typedef size_t uint8_t;
typedef size_t uint64_t;

/* Variables and functions */
void store(uint8_t *result, const uint64_t value) {
  for (size_t i = 0; i < 8; ++i) {
    result[i] = (value >> (i * 8)) & 0xFF;
  }
}


x86 assembly (clang, -O0):
<store>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x8,-0x18(%rbp)
jae    1152 <store+0x52>
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
shl    $0x3,%rcx
shr    %cl,%rdx
and    $0xff,%rdx
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <store+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<store>:
mov    %rsi,%rax
movzbl %al,%ecx
mov    %rcx,(%rdi)
movzbl %ah,%ecx
mov    %rcx,0x8(%rdi)
mov    %eax,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %rcx,0x10(%rdi)
mov    %eax,%ecx
shr    $0x18,%ecx
mov    %rcx,0x18(%rdi)
mov    %rsi,%rcx
shr    $0x20,%rcx
movzbl %cl,%ecx
mov    %rcx,0x20(%rdi)
mov    %rsi,%rcx
shr    $0x28,%rcx
movzbl %cl,%ecx
mov    %rcx,0x28(%rdi)
mov    %rsi,%rcx
shr    $0x30,%rcx
movzbl %cl,%ecx
mov    %rcx,0x30(%rdi)
shr    $0x38,%rax
mov    %rax,0x38(%rdi)
ret

LLVM IR (-O0):
define void @store(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %18, %2
%7 = load i64, i64* %5
%8 = icmp ult i64 %7, 8
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i64, i64* %4
%11 = load i64, i64* %5
%12 = mul i64 %11, 8
%13 = lshr i64 %10, %12
%14 = and i64 %13, 255
%15 = load i64*, i64** %3
%16 = load i64, i64* %5
%17 = getelementptr inbounds i64, i64* %15, i64 %16
store i64 %14, i64* %17
br label %18
18: ; preds = %9
%19 = load i64, i64* %5
%20 = add i64 %19, 1
store i64 %20, i64* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @store(i64* nocapture writeonly %0, i64 %1) {
%3 = and i64 %1, 255
store i64 %3, i64* %0
%4 = lshr i64 %1, 8
%5 = and i64 %4, 255
%6 = getelementptr inbounds i64, i64* %0, i64 1
store i64 %5, i64* %6
%7 = lshr i64 %1, 16
%8 = and i64 %7, 255
%9 = getelementptr inbounds i64, i64* %0, i64 2
store i64 %8, i64* %9
%10 = lshr i64 %1, 24
%11 = and i64 %10, 255
%12 = getelementptr inbounds i64, i64* %0, i64 3
store i64 %11, i64* %12
%13 = lshr i64 %1, 32
%14 = and i64 %13, 255
%15 = getelementptr inbounds i64, i64* %0, i64 4
store i64 %14, i64* %15
%16 = lshr i64 %1, 40
%17 = and i64 %16, 255
%18 = getelementptr inbounds i64, i64* %0, i64 5
store i64 %17, i64* %18
%19 = lshr i64 %1, 48
%20 = and i64 %19, 255
%21 = getelementptr inbounds i64, i64* %0, i64 6
store i64 %20, i64* %21
%22 = lshr i64 %1, 56
%23 = getelementptr inbounds i64, i64* %0, i64 7
store i64 %22, i64* %23
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ EMLINK;
int /*<<< orphan*/ errno;
int _link(uint8_t *old, uint8_t *new) {
  errno = EMLINK;
  return -1;
}


x86 assembly (clang, -O0):
<_link>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2edd(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_link>:
mov    0x2ee9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EMLINK = global i32 0
@errno = global i32 0
define i32 @_link(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EMLINK
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EMLINK = global i32 0
@errno = global i32 0
define i32 @_link(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EMLINK
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int sqrt(int);
int isPrime(int num) {
  int i;
  for (i = 2; i <= sqrt(num); i++)
    if (!(num % i))
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sqrt@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jg     116c <isPrime+0x5c>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1159 <isPrime+0x49>
movl   $0x0,-0x4(%rbp)
jmp    1173 <isPrime+0x63>
jmp    115e <isPrime+0x4e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1122 <isPrime+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <sqrt@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0x2,%ecx
jl     1150 <isPrime+0x40>
mov    $0x1,%ebp
nopl   0x0(%rax,%rax,1)
add    $0x1,%ebp
mov    %ebx,%eax
cltd
idiv   %ebp
test   %edx,%edx
je     114e <isPrime+0x3e>
mov    %ebx,%edi
call   1030 <sqrt@plt>
cmp    %eax,%ebp
jl     1130 <isPrime+0x20>
mov    $0x1,%eax
jmp    1150 <isPrime+0x40>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @isPrime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = call i32 @sqrt(i32 %7)
%9 = icmp sle i32 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %10
store i32 0, i32* %2
br label %21
16: ; preds = %10
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @isPrime(i32 %0) {
%2 = tail call i32 @sqrt(i32 %0)
%3 = icmp slt i32 %2, 2
br i1 %3, label %12, label %8
4: ; preds = %8
%5 = add nuw nsw i32 %9, 1
%6 = tail call i32 @sqrt(i32 %0)
%7 = icmp slt i32 %9, %6
br i1 %7, label %8, label %12
8: ; preds = %1, %4
%9 = phi i32 [ %5, %4 ], [ 2, %1 ]
%10 = srem i32 %0, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %8, %4, %1
%13 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %8 ]
ret i32 %13
}
int cache_control(unsigned int command) {
  volatile unsigned int *p = (volatile unsigned int *)0x80000000;
  int i;
  for (i = 0; i < (32 * 1024); i += 32) {
    (void *)*p;
    p += (32 / sizeof(int));
  }
  return 0;
}


x86 assembly (clang, -O0):
<cache_control>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x80000000,%eax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x8000,-0x14(%rbp)
jge    1144 <cache_control+0x44>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rax
add    $0x20,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <cache_control+0x17>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_control>:
mov    $0x80000000,%eax
mov    $0xffffffe0,%ecx
nopw   0x0(%rax,%rax,1)
mov    (%rax),%edx
mov    0x20(%rax),%edx
mov    0x40(%rax),%edx
mov    0x60(%rax),%edx
mov    0x80(%rax),%edx
mov    0xa0(%rax),%edx
mov    0xc0(%rax),%edx
mov    0xe0(%rax),%edx
add    $0x100,%ecx
add    $0x100,%rax
cmp    $0x7fe0,%ecx
jb     1110 <cache_control+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cache_control(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 %0, i32* %2
store i32* inttoptr (i64 2147483648 to i32*), i32** %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 32768
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32*, i32** %3
%10 = load volatile i32, i32* %9
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i8*
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 8
store i32* %14, i32** %3
br label %15
15: ; preds = %8
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 32
store i32 %17, i32* %4
br label %5
18: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @cache_control(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %22, %2 ]
%4 = phi i32* [ inttoptr (i64 2147483648 to i32*), %1 ], [ %21, %2 ]
%5 = load volatile i32, i32* %4
%6 = getelementptr inbounds i32, i32* %4, i64 8
%7 = load volatile i32, i32* %6
%8 = getelementptr inbounds i32, i32* %4, i64 16
%9 = load volatile i32, i32* %8
%10 = getelementptr inbounds i32, i32* %4, i64 24
%11 = load volatile i32, i32* %10
%12 = getelementptr inbounds i32, i32* %4, i64 32
%13 = load volatile i32, i32* %12
%14 = getelementptr inbounds i32, i32* %4, i64 40
%15 = load volatile i32, i32* %14
%16 = getelementptr inbounds i32, i32* %4, i64 48
%17 = load volatile i32, i32* %16
%18 = getelementptr inbounds i32, i32* %4, i64 56
%19 = or i32 %3, 224
%20 = load volatile i32, i32* %18
%21 = getelementptr inbounds i32, i32* %4, i64 64
%22 = add nuw nsw i32 %3, 256
%23 = icmp ult i32 %19, 32736
br i1 %23, label %2, label %24
24: ; preds = %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_golang_empty_comments() {
  test_parser_verify_parse(test_parser_sourcefile("go", " //\n"), "go", "",
                           "//\n", 0);
}


x86 assembly (clang, -O0):
<test_golang_empty_comments>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed1(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xec0(%rip),%rdx
lea    0xeb6(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_golang_empty_comments>:
push   %rbx
lea    0xed8(%rip),%rbx
lea    0xed4(%rip),%rsi
mov    %rbx,%rdi
call   1030 <test_parser_sourcefile@plt>
lea    0xec9(%rip),%rdx
lea    0xebf(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
xor    %r8d,%r8d
pop    %rbx
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"go\00"
@.str.1 = [5 x i8] c" //\0A\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [4 x i8] c"//\0A\00"
define void @test_golang_empty_comments() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"go\00"
@.str.1 = [5 x i8] c" //\0A\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [4 x i8] c"//\0A\00"
define void @test_golang_empty_comments() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}
const char *Push_Definition(void) {
  return "struct Push {\n"
         "  void (*push)(var, var);\n"
         "  void (*pop)(var);\n"
         "  void (*push_at)(var, var, var);\n"
         "  void (*pop_at)(var, var);\n"
         "};\n";
}


x86 assembly (clang, -O0):
<Push_Definition>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Push_Definition>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [126 x i8] c"struct Push {\0A void (*push)(var, var);\0A void (*pop)(var);\0A void (*push_at)(var, var, var);\0A void (*pop_at)(var, var);\0A};\0A\00"
define i8* @Push_Definition() {
ret i8* getelementptr inbounds ([126 x i8], [126 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [126 x i8] c"struct Push {\0A void (*push)(var, var);\0A void (*pop)(var);\0A void (*push_at)(var, var, var);\0A void (*pop_at)(var, var);\0A};\0A\00"
define i8* @Push_Definition() {
ret i8* getelementptr inbounds ([126 x i8], [126 x i8]* @.str, i64 0, i64 0)
}
void opcode_inx(unsigned char *upper, unsigned char *lower) {
  unsigned short int temp = ((*upper << 8) | *lower);
  temp++;
  *upper = temp >> 8;
  *lower = temp & 0xFF;
}


x86 assembly (clang, -O0):
<opcode_inx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
or     %ecx,%eax
mov    %ax,-0x12(%rbp)
mov    -0x12(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x12(%rbp)
movzwl -0x12(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
movzwl -0x12(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_inx>:
movzbl (%rdi),%eax
shl    $0x8,%eax
movzbl (%rsi),%ecx
add    %ecx,%eax
add    $0x1,%eax
mov    %ah,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @opcode_inx(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i16
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 8
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = or i32 %9, %12
%14 = trunc i32 %13 to i16
store i16 %14, i16* %5
%15 = load i16, i16* %5
%16 = add i16 %15, 1
store i16 %16, i16* %5
%17 = load i16, i16* %5
%18 = zext i16 %17 to i32
%19 = ashr i32 %18, 8
%20 = trunc i32 %19 to i8
%21 = load i8*, i8** %3
store i8 %20, i8* %21
%22 = load i16, i16* %5
%23 = zext i16 %22 to i32
%24 = and i32 %23, 255
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %4
store i8 %25, i8* %26
ret void
}

LLVM IR (-O2):
define void @opcode_inx(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = shl nuw nsw i32 %4, 8
%6 = load i8, i8* %1
%7 = zext i8 %6 to i32
%8 = or i32 %5, %7
%9 = add nuw nsw i32 %8, 1
%10 = lshr i32 %9, 8
%11 = trunc i32 %10 to i8
store i8 %11, i8* %0
%12 = trunc i32 %9 to i8
store i8 %12, i8* %1
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t swap_int32(int32_t val) {
  val = ((val << 8) & 0xFF00FF00) | ((val >> 8) & 0xFF00FF);
  return (val << 16) | ((val >> 16) & 0xFFFF);
}


x86 assembly (clang, -O0):
<swap_int32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
and    $0xff00ff00,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00ff,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
and    $0xffff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_int32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swap_int32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = and i32 %4, -16711936
%6 = load i32, i32* %2
%7 = ashr i32 %6, 8
%8 = and i32 %7, 16711935
%9 = or i32 %5, %8
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = shl i32 %10, 16
%12 = load i32, i32* %2
%13 = ashr i32 %12, 16
%14 = and i32 %13, 65535
%15 = or i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @swap_int32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int uint64_t;
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
void ms2timeval(struct timeval *tv, uint64_t ms) {
  tv->tv_sec = ms / 1000;
  tv->tv_usec = (ms % 1000) * 1000;
}


x86 assembly (clang, -O0):
<ms2timeval>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
imul   $0x3e8,%edx,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ms2timeval>:
movslq %esi,%rax
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
mov    %ecx,(%rdi)
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
imul   $0x3e8,%eax,%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define void @ms2timeval(%struct.timeval* %0, i32 %1) {
%3 = alloca %struct.timeval*
%4 = alloca i32
store %struct.timeval* %0, %struct.timeval** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sdiv i32 %5, 1000
%7 = load %struct.timeval*, %struct.timeval** %3
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 0
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = srem i32 %9, 1000
%11 = mul nsw i32 %10, 1000
%12 = load %struct.timeval*, %struct.timeval** %3
%13 = getelementptr inbounds %struct.timeval, %struct.timeval* %12, i32 0, i32 1
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define void @ms2timeval(%struct.timeval* nocapture writeonly %0, i32 %1) {
%3 = sdiv i32 %1, 1000
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
store i32 %3, i32* %4
%5 = srem i32 %1, 1000
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
store i32 %6, i32* %7
ret void
}
int atomok(ch)
char ch;
{
  switch (ch) {
  case ' ':
  case '\t':
  case '\r':
  case '\n':
  case '(':
  case '[':
  case '"':
  case '<':
  case '>':
  case ';':
  case ':':
  case '@':
  case ',':
  case '.':
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<atomok>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xfffffff7,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x52,%eax
ja     1140 <atomok+0x40>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1147 <atomok+0x47>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomok>:
movsbl %dil,%ecx
add    $0xfffffff7,%ecx
cmp    $0x52,%ecx
ja     111f <atomok+0x1f>
xor    %eax,%eax
lea    0xeeb(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @atomok(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = trunc i32 %0 to i8
store i8 %4, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
switch i32 %6, label %8 [
i32 32, label %7
i32 9, label %7
i32 13, label %7
i32 10, label %7
i32 40, label %7
i32 91, label %7
i32 34, label %7
i32 60, label %7
i32 62, label %7
i32 59, label %7
i32 58, label %7
i32 64, label %7
i32 44, label %7
i32 46, label %7
]
7: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @atomok(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
switch i32 %3, label %4 [
i32 32, label %5
i32 9, label %5
i32 13, label %5
i32 10, label %5
i32 40, label %5
i32 91, label %5
i32 34, label %5
i32 60, label %5
i32 62, label %5
i32 59, label %5
i32 58, label %5
i32 64, label %5
i32 44, label %5
i32 46, label %5
]
4: ; preds = %1
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %4
%6 = phi i32 [ 1, %4 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %6
}
/* Type definitions */
struct suffix_mult {
  int dummy;
};

/* Variables and functions */
int xstrtoll_range_sfx(char const *, int, int, int, struct suffix_mult const *);
__attribute__((always_)) int xstrtoi_range_sfx(const char *str, int b, int l,
                                               int u,
                                               const struct suffix_mult *sfx) {
  return xstrtoll_range_sfx(str, b, l, u, sfx);
}


x86 assembly (clang, -O0):
<xstrtoi_range_sfx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%r8
call   1030 <xstrtoll_range_sfx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrtoi_range_sfx>:
jmp    1030 <xstrtoll_range_sfx@plt>

LLVM IR (-O0):
%struct.suffix_mult = type { i32 }
define i32 @xstrtoi_range_sfx(i8* %0, i32 %1, i32 %2, i32 %3, %struct.suffix_mult* %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.suffix_mult*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store %struct.suffix_mult* %4, %struct.suffix_mult** %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load %struct.suffix_mult*, %struct.suffix_mult** %10
%16 = call i32 @xstrtoll_range_sfx(i8* %11, i32 %12, i32 %13, i32 %14, %struct.suffix_mult* %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.suffix_mult = type { i32 }
define i32 @xstrtoi_range_sfx(i8* %0, i32 %1, i32 %2, i32 %3, %struct.suffix_mult* %4) {
%6 = tail call i32 @xstrtoll_range_sfx(i8* %0, i32 %1, i32 %2, i32 %3, %struct.suffix_mult* %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char);
void pr_argv(char *argv) {
  int i = 0;
  while (argv[i] != '\0') {
    printf("argv [ i = %d ] = %c;\n", i, argv[i]);
    i++;
  }
}


x86 assembly (clang, -O0):
<pr_argv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1161 <pr_argv+0x51>
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
lea    0xeb6(%rip),%rdi
movsbl (%rax,%rcx,1),%edx
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <pr_argv+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr_argv>:
push   %r15
push   %r14
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     114b <pr_argv+0x3b>
mov    %rdi,%r14
xor    %ebx,%ebx
lea    0xed9(%rip),%r15
nopw   0x0(%rax,%rax,1)
movsbl %al,%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
movzbl 0x1(%r14,%rbx,1),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <pr_argv+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [23 x i8] c"argv [ i = %d ] = %c;\0A\00"
define void @pr_argv(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = load i32, i32* %3
%14 = load i8*, i8** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %13, i8 signext %18)
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %4
22: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"argv [ i = %d ] = %c;\0A\00"
define void @pr_argv(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %9, %4 ], [ 0, %1 ]
%6 = phi i8 [ %11, %4 ], [ %2, %1 ]
%7 = trunc i64 %5 to i32
%8 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %7, i8 signext %6)
%9 = add nuw i64 %5, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ adler32_base(int /*<<< orphan*/, unsigned char const *,
                                int /*<<< orphan*/);
uint32_t isal_adler32(uint32_t init, const unsigned char *buf, uint64_t len) {
  return adler32_base(init, buf, len);
}


x86 assembly (clang, -O0):
<isal_adler32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <adler32_base@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isal_adler32>:
jmp    1030 <adler32_base@plt>

LLVM IR (-O0):
define i32 @isal_adler32(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @adler32_base(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @isal_adler32(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @adler32_base(i32 %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ClearLine();
int /*<<< orphan*/ GotoLc(int, int);
int /*<<< orphan*/ printf(char *, unsigned int);
void DisplayInfo(unsigned int nbmess) {
  GotoLc(1, 1);
  ClearLine();
  GotoLc(1, 1);
  printf("%u", nbmess);
}


x86 assembly (clang, -O0):
<DisplayInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%esi
mov    %esi,%edi
call   1050 <GotoLc@plt>
mov    $0x0,%al
call   1040 <ClearLine@plt>
mov    $0x1,%esi
mov    %esi,%edi
call   1050 <GotoLc@plt>
mov    -0x4(%rbp),%esi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisplayInfo>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
mov    $0x1,%esi
call   1050 <GotoLc@plt>
xor    %eax,%eax
call   1040 <ClearLine@plt>
mov    $0x1,%edi
mov    $0x1,%esi
call   1050 <GotoLc@plt>
lea    0xea1(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%u\00"
define void @DisplayInfo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @GotoLc(i32 1, i32 1)
%4 = call i32 (...) @ClearLine()
%5 = call i32 @GotoLc(i32 1, i32 1)
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%u\00"
define void @DisplayInfo(i32 %0) {
%2 = tail call i32 @GotoLc(i32 1, i32 1)
%3 = tail call i32 (...) @ClearLine()
%4 = tail call i32 @GotoLc(i32 1, i32 1)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int checkInput(char *buf, int len, int l) {
  int i;
  for (i = len; i < len + l; i++)
    if (buf[i] == '\n')
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<checkInput>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x14(%rbp),%ecx
add    -0x18(%rbp),%ecx
cmp    %ecx,%eax
jge    1159 <checkInput+0x59>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1146 <checkInput+0x46>
movl   $0x1,-0x4(%rbp)
jmp    1160 <checkInput+0x60>
jmp    114b <checkInput+0x4b>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1114 <checkInput+0x14>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkInput>:
xor    %eax,%eax
test   %edx,%edx
jle    111f <checkInput+0x1f>
add    %esi,%edx
movslq %esi,%rcx
movslq %edx,%rdx
xchg   %ax,%ax
cmpb   $0xa,(%rdi,%rcx,1)
je     1120 <checkInput+0x20>
add    $0x1,%rcx
cmp    %rdx,%rcx
jl     1110 <checkInput+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @checkInput(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
store i32 %9, i32* %8
br label %10
10: ; preds = %26, %3
%11 = load i32, i32* %8
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = add nsw i32 %12, %13
%15 = icmp slt i32 %11, %14
br i1 %15, label %16, label %29
16: ; preds = %10
%17 = load i8*, i8** %5
%18 = load i32, i32* %8
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %22, 10
br i1 %23, label %24, label %25
24: ; preds = %16
store i32 1, i32* %4
br label %30
25: ; preds = %16
br label %26
26: ; preds = %25
%27 = load i32, i32* %8
%28 = add nsw i32 %27, 1
store i32 %28, i32* %8
br label %10
29: ; preds = %10
store i32 0, i32* %4
br label %30
30: ; preds = %29, %24
%31 = load i32, i32* %4
ret i32 %31
}

LLVM IR (-O2):
define i32 @checkInput(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = add nsw i32 %2, %1
%7 = sext i32 %1 to i64
%8 = sext i32 %6 to i64
br label %11
9: ; preds = %11
%10 = icmp slt i64 %16, %8
br i1 %10, label %11, label %17
11: ; preds = %5, %9
%12 = phi i64 [ %7, %5 ], [ %16, %9 ]
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 10
%16 = add nsw i64 %12, 1
br i1 %15, label %17, label %9
17: ; preds = %11, %9, %3
%18 = phi i32 [ 0, %3 ], [ 0, %9 ], [ 1, %11 ]
ret i32 %18
}