xunge/DecIR huggingface dataset:
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int place;
};
struct TYPE_4__ {
  TYPE_1__ xcirculaterequest;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcirculaterequest_place(void *_p, int _v) {
  ((XEvent *)_p)->xcirculaterequest.place = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcirculaterequest_place>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcirculaterequest_place>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xcirculaterequest_place(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcirculaterequest_place(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void print_passwd_message(void) {
  puts("Password must have at least 8 digits lenght, 16 maximum.");
  puts("Must have at least two decimal numbers and at least two letters");
}


x86 assembly (clang, -O0):
<print_passwd_message>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xf12(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_passwd_message>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf15(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"Password must have at least 8 digits lenght, 16 maximum.\00"
@.str.1 = [64 x i8] c"Must have at least two decimal numbers and at least two letters\00"
define void @print_passwd_message() {
%1 = call i32 @puts(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [57 x i8] c"Password must have at least 8 digits lenght, 16 maximum.\00"
@.str.1 = [64 x i8] c"Must have at least two decimal numbers and at least two letters\00"
define void @print_passwd_message() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void IntProtectionEnable(void) {
  (*((volatile unsigned int *)((0x48200000) + (0x4c)))) = (0x00000001u);
}


x86 assembly (clang, -O0):
<IntProtectionEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4820004c,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntProtectionEnable>:
movl   $0x1,0x4820004c
ret

LLVM IR (-O0):
define void @IntProtectionEnable() {
store volatile i32 1, i32* inttoptr (i64 1210056780 to i32*)
ret void
}

LLVM IR (-O2):
define void @IntProtectionEnable() {
store volatile i32 1, i32* inttoptr (i64 1210056780 to i32*)
ret void
}
int rtl838x_dma_rx_base(int i) { return (0x9f00) + (i << 2); }


x86 assembly (clang, -O0):
<rtl838x_dma_rx_base>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
add    $0x9f00,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtl838x_dma_rx_base>:
lea    0x9f00(,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @rtl838x_dma_rx_base(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 2
%5 = add nsw i32 40704, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @rtl838x_dma_rx_base(i32 %0) {
%2 = shl i32 %0, 2
%3 = add nsw i32 %2, 40704
ret i32 %3
}
/* Variables and functions */
int sockConnectStart();
int start_dial(void) { return sockConnectStart(); }


x86 assembly (clang, -O0):
<start_dial>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sockConnectStart@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_dial>:
xor    %eax,%eax
jmp    1030 <sockConnectStart@plt>

LLVM IR (-O0):
define i32 @start_dial() {
%1 = call i32 (...) @sockConnectStart()
ret i32 %1
}

LLVM IR (-O2):
define i32 @start_dial() {
%1 = tail call i32 (...) @sockConnectStart()
ret i32 %1
}
int ps_palettesize(int size) {
  size = size;
  return 0;
}


x86 assembly (clang, -O0):
<ps_palettesize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_palettesize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ps_palettesize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ps_palettesize(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ eprintf(char *, char *, int, size_t);
void *malloc(size_t);
void *emalloc(size_t n) {
  void *p;
  p = malloc(n);
  if (p == NULL)
    eprintf("malloc of %u bytes failed:",
            "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
            "2022-01-22/02-19-57/repos/9fcc/check/refs/heads/master/src/"
            "check_error.c",
            64 - 2, n);
  return p;
}


x86 assembly (clang, -O0):
<emalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1160 <emalloc+0x40>
mov    -0x8(%rbp),%rcx
lea    0xeb1(%rip),%rdi
lea    0xec5(%rip),%rsi
mov    $0x3e,%edx
call   1040 <eprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114f <emalloc+0x2f>
lea    0xec5(%rip),%rdi
lea    0xed9(%rip),%rsi
mov    $0x3e,%edx
mov    %r14,%rcx
call   1040 <eprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [27 x i8] c"malloc of %u bytes failed:\00"
@.str.1 = [137 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/9fcc/check/refs/heads/master/src/check_error.c\00"
define i8* @emalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @eprintf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([137 x i8], [137 x i8]* @.str.1, i64 0, i64 0), i32 62, i64 %9)
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [27 x i8] c"malloc of %u bytes failed:\00"
@.str.1 = [137 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/9fcc/check/refs/heads/master/src/check_error.c\00"
define noalias i8* @emalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @eprintf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([137 x i8], [137 x i8]* @.str.1, i64 0, i64 0), i32 62, i64 %0)
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *random_bytes(int);
int random_int() {
  void *ptr = random_bytes(sizeof(int));
  int out = *(int *)ptr;
  free(ptr);
  return out;
}


x86 assembly (clang, -O0):
<random_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <random_bytes@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_int>:
push   %rbx
mov    $0x4,%edi
call   1040 <random_bytes@plt>
mov    (%rax),%ebx
mov    %rax,%rdi
call   1030 <free@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @random_int() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i8* @random_bytes(i32 4)
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %2
%7 = load i8*, i8** %1
%8 = call i32 @free(i8* %7)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @random_int() {
%1 = tail call i8* @random_bytes(i32 4)
%2 = bitcast i8* %1 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @free(i8* %1)
ret i32 %3
}
int isalph(char c) {
  return (c >= '?' && c <= '~') || (c >= '#' && c <= '&') || c == '!' ||
         c == '.' || c == ':';
}


x86 assembly (clang, -O0):
<isalph>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x3f,%eax
jl     1129 <isalph+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7e,%ecx
mov    %al,-0x2(%rbp)
jle    1179 <isalph+0x79>
movsbl -0x1(%rbp),%eax
cmp    $0x23,%eax
jl     1148 <isalph+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x26,%ecx
mov    %al,-0x2(%rbp)
jle    1179 <isalph+0x79>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x21,%ecx
mov    %al,-0x2(%rbp)
je     1179 <isalph+0x79>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2e,%ecx
mov    %al,-0x2(%rbp)
je     1179 <isalph+0x79>
movsbl -0x1(%rbp),%eax
cmp    $0x3a,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalph>:
lea    -0x3f(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x40,%cl
jb     112b <isalph+0x2b>
lea    -0x21(%rdi),%ecx
cmp    $0xe,%cl
jae    1122 <isalph+0x22>
movzbl %cl,%ecx
mov    $0x203d,%edx
bt     %ecx,%edx
jb     112b <isalph+0x2b>
xor    %eax,%eax
cmp    $0x3a,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isalph(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 63
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 126
br i1 %9, label %30, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 35
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 38
br i1 %17, label %30, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 33
br i1 %21, label %30, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 46
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 58
br label %30
30: ; preds = %26, %22, %18, %14, %6
%31 = phi i1 [ true, %22 ], [ true, %18 ], [ true, %14 ], [ true, %6 ], [ %29, %26 ]
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @isalph(i8 signext %0) {
%2 = add i8 %0, -63
%3 = icmp ult i8 %2, 64
br i1 %3, label %15, label %4
4: ; preds = %1
%5 = add i8 %0, -33
%6 = icmp ult i8 %5, 14
br i1 %6, label %10, label %7
7: ; preds = %10, %4
%8 = icmp eq i8 %0, 58
%9 = zext i1 %8 to i32
br label %15
10: ; preds = %4
%11 = zext i8 %5 to i16
%12 = lshr i16 8253, %11
%13 = and i16 %12, 1
%14 = icmp eq i16 %13, 0
br i1 %14, label %7, label %15
15: ; preds = %10, %1, %7
%16 = phi i32 [ %9, %7 ], [ 1, %1 ], [ 1, %10 ]
ret i32 %16
}
int drv_PICGraphic_GPO(const int num, const int val) {
  char __attribute__((unused)) cmd[3];
  cmd[0] = 'g';
  cmd[1] = val ? 's' : 'c';
  cmd[2] = num;
  return 0;
}


x86 assembly (clang, -O0):
<drv_PICGraphic_GPO>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movb   $0x67,-0xb(%rbp)
mov    -0x8(%rbp),%edx
mov    $0x63,%eax
mov    $0x73,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,-0xa(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x9(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_PICGraphic_GPO>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @drv_PICGraphic_GPO(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [3 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %5, i64 0, i64 0
store i8 103, i8* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 115, i32 99
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds [3 x i8], [3 x i8]* %5, i64 0, i64 1
store i8 %11, i8* %12
%13 = load i32, i32* %3
%14 = trunc i32 %13 to i8
%15 = getelementptr inbounds [3 x i8], [3 x i8]* %5, i64 0, i64 2
store i8 %14, i8* %15
ret i32 0
}

LLVM IR (-O2):
define i32 @drv_PICGraphic_GPO(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void A10(void) { printf("Test21\n"); }


x86 assembly (clang, -O0):
<A10>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<A10>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Test21\0A\00"
define void @A10() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"Test21\00"
define void @A10() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/);
void insert(int ch[], int *n) {
  srand(time(0));
  int index;
  for (index = 0; index < (*n); index++) {
    ch[index] = rand() % 128;
  }
}


x86 assembly (clang, -O0):
<insert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
jge    118c <insert+0x5c>
mov    $0x0,%al
call   1050 <rand@plt>
mov    $0x80,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1155 <insert+0x25>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
cmpl   $0x0,(%r15)
jle    1184 <insert+0x54>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <rand@plt>
lea    0x7f(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff80,%ecx
sub    %ecx,%eax
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
movslq (%r15),%rax
cmp    %rax,%rbx
jl     1160 <insert+0x30>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @insert(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = call i32 @time(i32 0)
%7 = call i32 @srand(i32 %6)
store i32 0, i32* %5
br label %8
8: ; preds = %20, %2
%9 = load i32, i32* %5
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %23
13: ; preds = %8
%14 = call i32 (...) @rand()
%15 = srem i32 %14, 128
%16 = load i32*, i32** %3
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
store i32 %15, i32* %19
br label %20
20: ; preds = %13
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @insert(i32* nocapture writeonly %0, i32* nocapture %1) {
%3 = tail call i32 @time(i32 0)
%4 = tail call i32 @srand(i32 %3)
%5 = load i32, i32* %1
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %2, %7
%8 = phi i64 [ %12, %7 ], [ 0, %2 ]
%9 = tail call i32 (...) @rand()
%10 = srem i32 %9, 128
%11 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 %10, i32* %11
%12 = add nuw nsw i64 %8, 1
%13 = load i32, i32* %1
%14 = sext i32 %13 to i64
%15 = icmp slt i64 %12, %14
br i1 %15, label %7, label %16
16: ; preds = %7, %2
ret void
}
float uns(float x) { return (x < 0 ? -x : x); }


x86 assembly (clang, -O0):
<uns>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1132 <uns+0x32>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    113c <uns+0x3c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<uns>:
movaps 0xef9(%rip),%xmm2
xorps  %xmm0,%xmm2
xorps  %xmm3,%xmm3
movaps %xmm0,%xmm1
cmpltss %xmm3,%xmm1
andps  %xmm1,%xmm2
andnps %xmm0,%xmm1
orps   %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @uns(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load float, float* %2
%7 = fneg float %6
br label %10
8: ; preds = %1
%9 = load float, float* %2
br label %10
10: ; preds = %8, %5
%11 = phi float [ %7, %5 ], [ %9, %8 ]
ret float %11
}

LLVM IR (-O2):
define float @uns(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %3, float %0
ret float %4
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_EXTENSION;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_EXTENSION_it;
X509_EXTENSION *X509_EXTENSION_new(void) {
  return (X509_EXTENSION *)ASN1_item_new(&X509_EXTENSION_it);
}


x86 assembly (clang, -O0):
<X509_EXTENSION_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_EXTENSION_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@X509_EXTENSION_it = global i32 0
define i32* @X509_EXTENSION_new() {
%1 = call i64 @ASN1_item_new(i32* @X509_EXTENSION_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@X509_EXTENSION_it = global i32 0
define i32* @X509_EXTENSION_new() {
%1 = tail call i64 @ASN1_item_new(i32* @X509_EXTENSION_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void foo(const char *s) { printf("in c routine foo, printing %s\n", s); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"in c routine foo, printing %s\0A\00"
define void @foo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"in c routine foo, printing %s\0A\00"
define void @foo(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void suspend_nvs_free(void) {}


x86 assembly (clang, -O0):
<suspend_nvs_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<suspend_nvs_free>:
ret

LLVM IR (-O0):
define void @suspend_nvs_free() {
ret void
}

LLVM IR (-O2):
define void @suspend_nvs_free() {
ret void
}
/* Variables and functions */
int signal_request();
int ltr_int_rl_wakeup() { return signal_request(); }


x86 assembly (clang, -O0):
<ltr_int_rl_wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <signal_request@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltr_int_rl_wakeup>:
xor    %eax,%eax
jmp    1030 <signal_request@plt>

LLVM IR (-O0):
define i32 @ltr_int_rl_wakeup() {
%1 = call i32 (...) @signal_request()
ret i32 %1
}

LLVM IR (-O2):
define i32 @ltr_int_rl_wakeup() {
%1 = tail call i32 (...) @signal_request()
ret i32 %1
}
/* Type definitions */
struct window {
  int dummy;
};
struct view {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ open_empty_buffer();
struct view *window_add_buffer(struct window *, int /*<<< orphan*/);
struct view *window_open_empty_buffer(struct window *w) {
  return window_add_buffer(w, open_empty_buffer());
}


x86 assembly (clang, -O0):
<window_open_empty_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <open_empty_buffer@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <window_add_buffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<window_open_empty_buffer>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <open_empty_buffer@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <window_add_buffer@plt>

LLVM IR (-O0):
%struct.view = type { i32 }
%struct.window = type { i32 }
define %struct.view* @window_open_empty_buffer(%struct.window* %0) {
%2 = alloca %struct.window*
store %struct.window* %0, %struct.window** %2
%3 = load %struct.window*, %struct.window** %2
%4 = call i32 (...) @open_empty_buffer()
%5 = call %struct.view* @window_add_buffer(%struct.window* %3, i32 %4)
ret %struct.view* %5
}

LLVM IR (-O2):
%struct.view = type { i32 }
%struct.window = type { i32 }
define %struct.view* @window_open_empty_buffer(%struct.window* %0) {
%2 = tail call i32 (...) @open_empty_buffer()
%3 = tail call %struct.view* @window_add_buffer(%struct.window* %0, i32 %2)
ret %struct.view* %3
}
void SPISSOutputConfig(unsigned long ulBase, unsigned long ulSSOutPut) {

  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) &= ~0x00000004;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) |= ulSSOutPut;
}


x86 assembly (clang, -O0):
<SPISSOutputConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
and    $0xfffffffffffffffb,%rcx
mov    %rcx,0x4(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPISSOutputConfig>:
andq   $0xfffffffffffffffb,0x4(%rdi)
or     %rsi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @SPISSOutputConfig(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 4
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -5
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 4
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @SPISSOutputConfig(i64 %0, i64 %1) {
%3 = add i64 %0, 4
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -5
store volatile i64 %6, i64* %4
%7 = load volatile i64, i64* %4
%8 = or i64 %7, %1
store volatile i64 %8, i64* %4
ret void
}
int sgIP_Hub_IPMaxMessageSize(unsigned long ipaddr) { return 1460; }


x86 assembly (clang, -O0):
<sgIP_Hub_IPMaxMessageSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x5b4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgIP_Hub_IPMaxMessageSize>:
mov    $0x5b4,%eax
ret

LLVM IR (-O0):
define i32 @sgIP_Hub_IPMaxMessageSize(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i32 1460
}

LLVM IR (-O2):
define i32 @sgIP_Hub_IPMaxMessageSize(i64 %0) {
ret i32 1460
}
/* Variables and functions */
int odd();
int odd1(void) { return odd(); }


x86 assembly (clang, -O0):
<odd1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <odd@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<odd1>:
xor    %eax,%eax
jmp    1030 <odd@plt>

LLVM IR (-O0):
define i32 @odd1() {
%1 = call i32 (...) @odd()
ret i32 %1
}

LLVM IR (-O2):
define i32 @odd1() {
%1 = tail call i32 (...) @odd()
ret i32 %1
}
double return_double(double d) { return d; }


x86 assembly (clang, -O0):
<return_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_double>:
ret

LLVM IR (-O0):
define double @return_double(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @return_double(double returned %0) {
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void lerArquivo(char string[]) { strcpy(string, "Ola mundo"); }


x86 assembly (clang, -O0):
<lerArquivo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerArquivo>:
lea    0xee9(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Ola mundo\00"
define void @lerArquivo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Ola mundo\00"
define void @lerArquivo(i8* %0) {
%2 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned int __inl(unsigned short port) {
  unsigned int _v;
  __asm__ __volatile__("in"
                       "l"
                       " %"
                       "w"
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "d"(port));
  return _v;
}


x86 assembly (clang, -O0):
<__inl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inl>:
mov    %edi,%edx
in     (%dx),%eax
ret

LLVM IR (-O0):
define i32 @__inl(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 asm sideeffect "inl ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @__inl(i16 zeroext %0) {
%2 = tail call i32 asm sideeffect "inl ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i32 %2
}
/* Variables and functions */
size_t pcomp_diffrle_bufsize(size_t input_size) { return 1 + 2 * input_size; }


x86 assembly (clang, -O0):
<pcomp_diffrle_bufsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcomp_diffrle_bufsize>:
lea    (%rdi,%rdi,1),%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @pcomp_diffrle_bufsize(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 2, %3
%5 = add i64 1, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @pcomp_diffrle_bufsize(i64 %0) {
%2 = shl i64 %0, 1
%3 = or i64 %2, 1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ eset(int);
int tcFputc(char, int);
int Mfputc(int nargs, int *args) {
  if (nargs < 2) {
    eset(21);
    return -1;
  }
  char c = (char)args[0];
  int unit = args[1];
  return tcFputc(c, unit);
}


x86 assembly (clang, -O0):
<Mfputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    114f <Mfputc+0x2f>
mov    $0x15,%edi
call   1030 <eset@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1173 <Mfputc+0x53>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x11(%rbp),%al
mov    -0x18(%rbp),%esi
movsbl %al,%edi
call   1040 <tcFputc@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mfputc>:
push   %rax
cmp    $0x1,%edi
jg     1137 <Mfputc+0x17>
mov    $0x15,%edi
call   1030 <eset@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret
movsbl (%rsi),%edi
mov    0x4(%rsi),%esi
pop    %rax
jmp    1040 <tcFputc@plt>

LLVM IR (-O0):
define i32 @Mfputc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8
%7 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 2
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @eset(i32 21)
store i32 -1, i32* %3
br label %23
12: ; preds = %2
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 0
%15 = load i32, i32* %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %6
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i64 1
%19 = load i32, i32* %18
store i32 %19, i32* %7
%20 = load i8, i8* %6
%21 = load i32, i32* %7
%22 = call i32 @tcFputc(i8 signext %20, i32 %21)
store i32 %22, i32* %3
br label %23
23: ; preds = %12, %10
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @Mfputc(i32 %0, i32* nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @eset(i32 21)
br label %12
6: ; preds = %2
%7 = load i32, i32* %1
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i32, i32* %1, i64 1
%10 = load i32, i32* %9
%11 = tail call i32 @tcFputc(i8 signext %8, i32 %10)
br label %12
12: ; preds = %6, %4
%13 = phi i32 [ -1, %4 ], [ %11, %6 ]
ret i32 %13
}
void mt_trace_SoftIRQ_end(int id) {}


x86 assembly (clang, -O0):
<mt_trace_SoftIRQ_end>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_trace_SoftIRQ_end>:
ret

LLVM IR (-O0):
define void @mt_trace_SoftIRQ_end(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @mt_trace_SoftIRQ_end(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bcm2835_gpio_fsel(int, int);
int /*<<< orphan*/ bcm2835_gpio_write(int, int /*<<< orphan*/);
scalar_t__ bcm2835_init();
int MMA8491Q_DisEnable() {
  if (bcm2835_init() == 0) {
    return 1;
  } else {
    bcm2835_gpio_fsel(25, 1);
    bcm2835_gpio_write(25, 0);
    return 0;
  }
}


x86 assembly (clang, -O0):
<MMA8491Q_DisEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <bcm2835_init@plt>
cmp    $0x0,%rax
jne    1155 <MMA8491Q_DisEnable+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1177 <MMA8491Q_DisEnable+0x47>
mov    $0x19,%edi
mov    $0x1,%esi
call   1040 <bcm2835_gpio_fsel@plt>
mov    $0x19,%edi
xor    %esi,%esi
call   1030 <bcm2835_gpio_write@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMA8491Q_DisEnable>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <bcm2835_init@plt>
test   %rax,%rax
je     115c <MMA8491Q_DisEnable+0x2c>
mov    $0x19,%edi
mov    $0x1,%esi
call   1040 <bcm2835_gpio_fsel@plt>
mov    $0x19,%edi
xor    %esi,%esi
call   1030 <bcm2835_gpio_write@plt>
jmp    1161 <MMA8491Q_DisEnable+0x31>
mov    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @MMA8491Q_DisEnable() {
%1 = alloca i32
%2 = call i64 (...) @bcm2835_init()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %8
5: ; preds = %0
%6 = call i32 @bcm2835_gpio_fsel(i32 25, i32 1)
%7 = call i32 @bcm2835_gpio_write(i32 25, i32 0)
store i32 0, i32* %1
br label %8
8: ; preds = %5, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @MMA8491Q_DisEnable() {
%1 = tail call i64 (...) @bcm2835_init()
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32 @bcm2835_gpio_fsel(i32 25, i32 1)
%5 = tail call i32 @bcm2835_gpio_write(i32 25, i32 0)
br label %6
6: ; preds = %0, %3
%7 = phi i32 [ 0, %3 ], [ 1, %0 ]
ret i32 %7
}
/* Variables and functions */
int RAND_MAX;
long rand();
int random_sleep_time() {
  long factor = RAND_MAX / 3;
  long random = rand();
  if (random < factor)
    return 0;
  else if (random > factor * 2)
    return 1;
  else
    return 2;
}


x86 assembly (clang, -O0):
<random_sleep_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cltq
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1154 <random_sleep_time+0x44>
movl   $0x0,-0x4(%rbp)
jmp    117c <random_sleep_time+0x6c>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x1,%rcx
cmp    %rcx,%rax
jle    1175 <random_sleep_time+0x65>
movl   $0x1,-0x4(%rbp)
jmp    117c <random_sleep_time+0x6c>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_sleep_time>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ece(%rip),%rax
movslq (%rax),%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
movslq %eax,%rbx
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
lea    (%rbx,%rbx,1),%rcx
xor    %edx,%edx
cmp    %rcx,%rax
setg   %dl
mov    $0x2,%ecx
sub    %edx,%ecx
cmp    %rbx,%rax
cmovl  %ebp,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @random_sleep_time() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = load i32, i32* @RAND_MAX
%5 = sdiv i32 %4, 3
%6 = sext i32 %5 to i64
store i64 %6, i64* %2
%7 = call i64 (...) @rand()
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = load i64, i64* %2
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 0, i32* %1
br label %19
12: ; preds = %0
%13 = load i64, i64* %3
%14 = load i64, i64* %2
%15 = mul nsw i64 %14, 2
%16 = icmp sgt i64 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 1, i32* %1
br label %19
18: ; preds = %12
store i32 2, i32* %1
br label %19
19: ; preds = %18, %17, %11
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @random_sleep_time() {
%1 = load i32, i32* @RAND_MAX
%2 = sdiv i32 %1, 3
%3 = sext i32 %2 to i64
%4 = tail call i64 (...) @rand()
%5 = icmp slt i64 %4, %3
%6 = shl nsw i64 %3, 1
%7 = icmp sgt i64 %4, %6
%8 = select i1 %7, i32 1, i32 2
%9 = select i1 %5, i32 0, i32 %8
ret i32 %9
}
/* Type definitions */
struct C {
  int dummy;
};

/* Variables and functions */
struct C *create_C(int);
int /*<<< orphan*/ free(struct C *);
int main2() {
  struct C *c = create_C(3);
  free(c);
  return 0;
}


x86 assembly (clang, -O0):
<main2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
call   1040 <create_C@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main2>:
push   %rax
mov    $0x3,%edi
call   1040 <create_C@plt>
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.C = type { i32 }
define i32 @main2() {
%1 = alloca %struct.C*
%2 = call %struct.C* @create_C(i32 3)
store %struct.C* %2, %struct.C** %1
%3 = load %struct.C*, %struct.C** %1
%4 = call i32 @free(%struct.C* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.C = type { i32 }
define i32 @main2() {
%1 = tail call %struct.C* @create_C(i32 3)
%2 = tail call i32 @free(%struct.C* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ write_break();
int /*<<< orphan*/ write_line(char *);
void html_indent(void) {
  write_break();
  write_line("<BLOCKQUOTE>");
}


x86 assembly (clang, -O0):
<html_indent>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <write_break@plt>
lea    0xece(%rip),%rdi
call   1040 <write_line@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<html_indent>:
push   %rax
xor    %eax,%eax
call   1030 <write_break@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <write_line@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"<BLOCKQUOTE>\00"
define void @html_indent() {
%1 = call i32 (...) @write_break()
%2 = call i32 @write_line(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"<BLOCKQUOTE>\00"
define void @html_indent() {
%1 = tail call i32 (...) @write_break()
%2 = tail call i32 @write_line(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
int mod(int a, int b) { return (a % b); }


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mod(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int bar();
void foo() { int a = bar(); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <bar@plt>
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @foo() {
%1 = alloca i32
%2 = call i32 (...) @bar()
store i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @foo() {
%1 = tail call i32 (...) @bar()
ret void
}
int umwandlung_funktion() {
  float f = 1.5;
  int i = (int)f;
  float a = 5;
  int b = 2;
  float ergebnis;
  ergebnis = a / (float)b;
  return ergebnis;
}


x86 assembly (clang, -O0):
<umwandlung_funktion>:
push   %rbp
mov    %rsp,%rbp
movss  0xef8(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movss  0xedf(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
cvtsi2ssl -0x10(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
cvttss2si -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umwandlung_funktion>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @umwandlung_funktion() {
%1 = alloca float
%2 = alloca i32
%3 = alloca float
%4 = alloca i32
%5 = alloca float
store float 1.500000e+00, float* %1
%6 = load float, float* %1
%7 = fptosi float %6 to i32
store i32 %7, i32* %2
store float 5.000000e+00, float* %3
store i32 2, i32* %4
%8 = load float, float* %3
%9 = load i32, i32* %4
%10 = sitofp i32 %9 to float
%11 = fdiv float %8, %10
store float %11, float* %5
%12 = load float, float* %5
%13 = fptosi float %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @umwandlung_funktion() {
ret i32 2
}
double tan(double x) { return 4; }


x86 assembly (clang, -O0):
<tan>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tan>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @tan(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 4.000000e+00
}

LLVM IR (-O2):
define double @tan(double %0) {
ret double 4.000000e+00
}
void ASRT_PrintPass(const char *testName) {}


x86 assembly (clang, -O0):
<ASRT_PrintPass>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASRT_PrintPass>:
ret

LLVM IR (-O0):
define void @ASRT_PrintPass(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ASRT_PrintPass(i8* nocapture %0) {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int send_event;
};
struct TYPE_4__ {
  TYPE_1__ xany;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xany_send_event(void *_p, int _v) {
  ((XEvent *)_p)->xany.send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xany_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xany_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xany_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xany_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int popcountl(unsigned long x) { return __builtin_popcountl(x); }


x86 assembly (clang, -O0):
<popcountl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcountl>:
mov    %rdi,%rax
shr    %rax
movabs $0x5555555555555555,%rcx
55 55 55
and    %rax,%rcx
sub    %rcx,%rdi
movabs $0x3333333333333333,%rax
33 33 33
mov    %rdi,%rcx
and    %rax,%rcx
shr    $0x2,%rdi
and    %rdi,%rax
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rax,%rcx
movabs $0xf0f0f0f0f0f0f0f,%rdx
0f 0f 0f
and    %rcx,%rdx
movabs $0x101010101010101,%rax
01 01 01
imul   %rdx,%rax
shr    $0x38,%rax
ret

LLVM IR (-O0):
define i32 @popcountl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @popcountl(i64 %0) {
%2 = tail call i64 @llvm.ctpop.i64(i64 %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_gid;
};
struct group {
  char *gr_name;
};

/* Variables and functions */
struct group *getgrgid(int /*<<< orphan*/);
int /*<<< orphan*/ stat(char *, struct stat *);
char *get_group_name(char *path) {
  struct stat buffer;
  stat(path, &buffer);
  struct group *gr = getgrgid(buffer.st_gid);
  return gr->gr_name;
}


x86 assembly (clang, -O0):
<get_group_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <stat@plt>
mov    -0x10(%rbp),%edi
call   1030 <getgrgid@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_group_name>:
push   %rax
mov    %rsp,%rsi
call   1040 <stat@plt>
mov    (%rsp),%edi
call   1030 <getgrgid@plt>
mov    (%rax),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
%struct.group = type { i8* }
define i8* @get_group_name(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
%4 = alloca %struct.group*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @stat(i8* %5, %struct.stat* %3)
%7 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call %struct.group* @getgrgid(i32 %8)
store %struct.group* %9, %struct.group** %4
%10 = load %struct.group*, %struct.group** %4
%11 = getelementptr inbounds %struct.group, %struct.group* %10, i32 0, i32 0
%12 = load i8*, i8** %11
ret i8* %12
}

LLVM IR (-O2):
%struct.stat = type { i32 }
%struct.group = type { i8* }
define i8* @get_group_name(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call %struct.group* @getgrgid(i32 %6)
%8 = getelementptr inbounds %struct.group, %struct.group* %7, i64 0, i32 0
%9 = load i8*, i8** %8
ret i8* %9
}
/* Variables and functions */
char const *strrchr(char const *, char);
const char *devpath_to_devname(const char *devpath) {
  return strrchr(devpath, '/') + 1;
}


x86 assembly (clang, -O0):
<devpath_to_devname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<devpath_to_devname>:
push   %rax
mov    $0x2f,%esi
call   1030 <strrchr@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @devpath_to_devname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strrchr(i8* %3, i8 signext 47)
%5 = getelementptr inbounds i8, i8* %4, i64 1
ret i8* %5
}

LLVM IR (-O2):
define i8* @devpath_to_devname(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = getelementptr inbounds i8, i8* %2, i64 1
ret i8* %3
}
/* Variables and functions */
double ArcSin(double);
double ArcCos(double arg) { return (1.57079632679489656 - ArcSin(arg)); }


x86 assembly (clang, -O0):
<ArcCos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ArcSin@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArcCos>:
push   %rax
call   1030 <ArcSin@plt>
movsd  0xee2(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @ArcCos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @ArcSin(double %3)
%5 = fsub double 0x3FF921FB54442D18, %4
ret double %5
}

LLVM IR (-O2):
define double @ArcCos(double %0) {
%2 = tail call double @ArcSin(double %0)
%3 = fsub double 0x3FF921FB54442D18, %2
ret double %3
}
/* Variables and functions */
scalar_t__ day(double);
double fmod(scalar_t__, int);
long week_day(double t) {
  double res = fmod(day(t) + 4, 7);
  if (res < 0)
    res += 7;
  return (long)res;
}


x86 assembly (clang, -O0):
<week_day>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <day@plt>
mov    %rax,%rdi
add    $0x4,%rdi
mov    $0x7,%esi
call   1030 <fmod@plt>
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    116d <week_day+0x4d>
movsd  0xe9d(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<week_day>:
push   %rax
call   1040 <day@plt>
lea    0x4(%rax),%rdi
mov    $0x7,%esi
call   1030 <fmod@plt>
movsd  0xec4(%rip),%xmm1
addsd  %xmm0,%xmm1
xorpd  %xmm2,%xmm2
movapd %xmm0,%xmm3
cmpltsd %xmm2,%xmm3
andpd  %xmm3,%xmm1
andnpd %xmm0,%xmm3
orpd   %xmm1,%xmm3
cvttsd2si %xmm3,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @week_day(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call i64 @day(double %4)
%6 = add nsw i64 %5, 4
%7 = call double @fmod(i64 %6, i32 7)
store double %7, double* %3
%8 = load double, double* %3
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load double, double* %3
%12 = fadd double %11, 7.000000e+00
store double %12, double* %3
br label %13
13: ; preds = %10, %1
%14 = load double, double* %3
%15 = fptosi double %14 to i64
ret i64 %15
}

LLVM IR (-O2):
define i64 @week_day(double %0) {
%2 = tail call i64 @day(double %0)
%3 = add nsw i64 %2, 4
%4 = tail call double @fmod(i64 %3, i32 7)
%5 = fcmp olt double %4, 0.000000e+00
%6 = fadd double %4, 7.000000e+00
%7 = select i1 %5, double %6, double %4
%8 = fptosi double %7 to i64
ret i64 %8
}
int trans_4_y(int x, int y) { return -y; }


x86 assembly (clang, -O0):
<trans_4_y>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trans_4_y>:
mov    %esi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @trans_4_y(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @trans_4_y(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %1
ret i32 %3
}