xunge/DecIR huggingface dataset:
int test_imm_DFint16_reg(short val) {
  return ((val) & (-0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff21,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFint16_reg>:
test   $0xff21,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -223
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DFint16_reg(i16 signext %0) {
%2 = and i16 %0, -223
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct fosphor {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fosphor_cl_release(struct fosphor *);
int /*<<< orphan*/ fosphor_gl_release(struct fosphor *);
int /*<<< orphan*/ free(struct fosphor *);
void fosphor_release(struct fosphor *self) {
  if (!self)
    return;
  fosphor_cl_release(self);
  fosphor_gl_release(self);
  free(self);
}


x86 assembly (clang, -O0):
<fosphor_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114c <fosphor_release+0x1c>
jmp    1167 <fosphor_release+0x37>
mov    -0x8(%rbp),%rdi
call   1040 <fosphor_cl_release@plt>
mov    -0x8(%rbp),%rdi
call   1050 <fosphor_gl_release@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fosphor_release>:
test   %rdi,%rdi
je     114f <fosphor_release+0x1f>
push   %rbx
mov    %rdi,%rbx
call   1040 <fosphor_cl_release@plt>
mov    %rbx,%rdi
call   1050 <fosphor_gl_release@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.fosphor = type { i32 }
define void @fosphor_release(%struct.fosphor* %0) {
%2 = alloca %struct.fosphor*
store %struct.fosphor* %0, %struct.fosphor** %2
%3 = load %struct.fosphor*, %struct.fosphor** %2
%4 = icmp ne %struct.fosphor* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %13
6: ; preds = %1
%7 = load %struct.fosphor*, %struct.fosphor** %2
%8 = call i32 @fosphor_cl_release(%struct.fosphor* %7)
%9 = load %struct.fosphor*, %struct.fosphor** %2
%10 = call i32 @fosphor_gl_release(%struct.fosphor* %9)
%11 = load %struct.fosphor*, %struct.fosphor** %2
%12 = call i32 @free(%struct.fosphor* %11)
br label %13
13: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.fosphor = type { i32 }
define void @fosphor_release(%struct.fosphor* %0) {
%2 = icmp eq %struct.fosphor* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @fosphor_cl_release(%struct.fosphor* %0)
%5 = tail call i32 @fosphor_gl_release(%struct.fosphor* %0)
%6 = tail call i32 @free(%struct.fosphor* %0)
br label %7
7: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help(void) {
  printf("NAME\n"
         "    ateball - The Command-line Magic 8 Ball!\n\n"
         "USAGE\n"
         "    ateball [-h | -e]\n\n"
         "OPTIONS\n"
         "    -h   Display this help information.\n"
         "    -e   Enable extended answers.\n\n");
  return;
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [164 x i8] c"NAME\0A ateball - The Command-line Magic 8 Ball!\0A\0AUSAGE\0A ateball [-h | -e]\0A\0AOPTIONS\0A -h Display this help information.\0A -e Enable extended answers.\0A\0A\00"
define void @help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [163 x i8] c"NAME\0A ateball - The Command-line Magic 8 Ball!\0A\0AUSAGE\0A ateball [-h | -e]\0A\0AOPTIONS\0A -h Display this help information.\0A -e Enable extended answers.\0A\00"
define void @help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([163 x i8], [163 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gpio_high(unsigned int, unsigned int);
int /*<<< orphan*/ gpio_low(unsigned int, unsigned int);
void gpio_set(unsigned port, unsigned bit, int value) {
  if (value)
    gpio_high(port, bit);
  else
    gpio_low(port, bit);
}


x86 assembly (clang, -O0):
<gpio_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114b <gpio_set+0x2b>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <gpio_high@plt>
jmp    1156 <gpio_set+0x36>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <gpio_low@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_set>:
test   %edx,%edx
je     1129 <gpio_set+0x9>
jmp    1040 <gpio_high@plt>
jmp    1030 <gpio_low@plt>

LLVM IR (-O0):
define void @gpio_set(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = call i32 @gpio_high(i32 %10, i32 %11)
br label %17
13: ; preds = %3
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = call i32 @gpio_low(i32 %14, i32 %15)
br label %17
17: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
define void @gpio_set(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @gpio_high(i32 %0, i32 %1)
br label %9
7: ; preds = %3
%8 = tail call i32 @gpio_low(i32 %0, i32 %1)
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
int /*<<< orphan*/ gen_comment();
int /*<<< orphan*/ match(char *);
int /*<<< orphan*/ newline();
int /*<<< orphan*/ output_string(char *);
needbrack(char *str) {
  if (!match(str)) {
    error("missing bracket");
    gen_comment();
    output_string(str);
    newline();
  }
}


x86 assembly (clang, -O0):
<needbrack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1060 <match@plt>
cmp    $0x0,%eax
jne    1191 <needbrack+0x41>
lea    0xe8b(%rip),%rdi
call   1070 <error@plt>
mov    $0x0,%al
call   1040 <gen_comment@plt>
mov    -0x10(%rbp),%rdi
call   1050 <output_string@plt>
mov    $0x0,%al
call   1030 <newline@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<needbrack>:
push   %rbx
mov    %rdi,%rbx
call   1060 <match@plt>
test   %eax,%eax
je     115f <needbrack+0xf>
pop    %rbx
ret
lea    0xe9a(%rip),%rdi
call   1070 <error@plt>
xor    %eax,%eax
call   1040 <gen_comment@plt>
mov    %rbx,%rdi
call   1050 <output_string@plt>
xor    %eax,%eax
call   1030 <newline@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"missing bracket\00"
define i32 @needbrack(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @match(i8* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = call i32 @error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%9 = call i32 (...) @gen_comment()
%10 = load i8*, i8** %3
%11 = call i32 @output_string(i8* %10)
%12 = call i32 (...) @newline()
br label %13
13: ; preds = %7, %1
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [16 x i8] c"missing bracket\00"
define i32 @needbrack(i8* %0) {
%2 = tail call i32 @match(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call i32 @error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @gen_comment()
%7 = tail call i32 @output_string(i8* %0)
%8 = tail call i32 (...) @newline()
br label %9
9: ; preds = %4, %1
ret i32 undef
}
/* Variables and functions */
char *interleave(char *, char *);
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char *s = interleave("clips", "aloe");
  printf("%s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    0xec9(%rip),%rsi
call   1040 <interleave@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1040 <interleave@plt>
lea    0xed0(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"clips\00"
@.str.1 = [5 x i8] c"aloe\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @interleave(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"clips\00"
@.str.1 = [5 x i8] c"aloe\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i8* @interleave(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %1)
ret i32 0
}
void ff_hevc_put_hevc_epel_hv4_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_hv4_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_hv4_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_hv4_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_hv4_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(unsigned char, unsigned char *);
void SensorGetReg_OV7660(unsigned char uAddr, unsigned short *uVal) {
  VIM_SIF_I2cReadByte((unsigned char)uAddr, (unsigned char *)uVal);
}


x86 assembly (clang, -O0):
<SensorGetReg_OV7660>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorGetReg_OV7660>:
jmp    1030 <VIM_SIF_I2cReadByte@plt>

LLVM IR (-O0):
define void @SensorGetReg_OV7660(i8 zeroext %0, i16* %1) {
%3 = alloca i8
%4 = alloca i16*
store i8 %0, i8* %3
store i16* %1, i16** %4
%5 = load i8, i8* %3
%6 = load i16*, i16** %4
%7 = bitcast i16* %6 to i8*
%8 = call i32 @VIM_SIF_I2cReadByte(i8 zeroext %5, i8* %7)
ret void
}

LLVM IR (-O2):
define void @SensorGetReg_OV7660(i8 zeroext %0, i16* %1) {
%3 = bitcast i16* %1 to i8*
%4 = tail call i32 @VIM_SIF_I2cReadByte(i8 zeroext %0, i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ r69se_atexit();
void se_atexit(void) { r69se_atexit(); }


x86 assembly (clang, -O0):
<se_atexit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <r69se_atexit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<se_atexit>:
xor    %eax,%eax
jmp    1030 <r69se_atexit@plt>

LLVM IR (-O0):
define void @se_atexit() {
%1 = call i32 (...) @r69se_atexit()
ret void
}

LLVM IR (-O2):
define void @se_atexit() {
%1 = tail call i32 (...) @r69se_atexit()
ret void
}
/* Variables and functions */
void *cc_malloc(size_t);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *cc_memdup(void const *memory, size_t size) {
  void *dupe = cc_malloc(size);
  memcpy(dupe, memory, size);
  return dupe;
}


x86 assembly (clang, -O0):
<cc_memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <cc_malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_memdup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <cc_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @cc_memdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i8* @cc_malloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i64 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @cc_memdup(i8* %0, i64 %1) {
%3 = tail call i8* @cc_malloc(i64 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
void *GetMemory(unsigned long);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, unsigned long);
void *GetClearedMemory(unsigned long size) {
  void *ptr;
  ptr = GetMemory(size);
  memset(ptr, 0, size);
  return ptr;
}


x86 assembly (clang, -O0):
<GetClearedMemory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetMemory@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetClearedMemory>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <GetMemory@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1040 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @GetClearedMemory(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @GetMemory(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i64, i64* %2
%8 = call i32 @memset(i8* %6, i32 0, i64 %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
define i8* @GetClearedMemory(i64 %0) {
%2 = tail call i8* @GetMemory(i64 %0)
%3 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ strspn(char const *, char *);
int strtol(char const *, char **, int);
int read_timezone(const char *tz) {
  int zone = -1;
  char *endptr;
  tz += strspn(tz, " ");
  zone = strtol(tz, &endptr, 10);
  if (tz == endptr)
    zone = -1;
  return zone;
}


x86 assembly (clang, -O0):
<read_timezone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec2(%rip),%rsi
call   1030 <strspn@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0xa,%edx
call   1040 <strtol@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    117d <read_timezone+0x5d>
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_timezone>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    0xed2(%rip),%rsi
call   1030 <strspn@plt>
movslq %eax,%rbx
add    %r14,%rbx
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0xa,%edx
call   1040 <strtol@plt>
cmp    (%rsp),%rbx
mov    $0xffffffff,%ecx
cmove  %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define i32 @read_timezone(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 -1, i32* %3
%5 = load i8*, i8** %2
%6 = call i32 @strspn(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %2
%8 = sext i32 %6 to i64
%9 = getelementptr inbounds i8, i8* %7, i64 %8
store i8* %9, i8** %2
%10 = load i8*, i8** %2
%11 = call i32 @strtol(i8* %10, i8** %4, i32 10)
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = load i8*, i8** %4
%14 = icmp eq i8* %12, %13
br i1 %14, label %15, label %16
15: ; preds = %1
store i32 -1, i32* %3
br label %16
16: ; preds = %15, %1
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
define i32 @read_timezone(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = tail call i32 @strspn(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = call i32 @strtol(i8* %6, i8** %2, i32 10)
%8 = load i8*, i8** %2
%9 = icmp eq i8* %6, %8
%10 = select i1 %9, i32 -1, i32 %7
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
char *dlerror();
void *dlsym(void *, char const *);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void *dlget(void *handle, const char *symbol) {
  void *fun = dlsym(handle, symbol);
  if (fun == 0) {
    fprintf(stderr, "%s\n", dlerror());
    exit(EXIT_FAILURE);
  }
  return fun;
}


x86 assembly (clang, -O0):
<dlget>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <dlsym@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    119f <dlget+0x5f>
mov    0x2e6d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1030 <dlerror@plt>
mov    -0x1c(%rbp),%edi
mov    %rax,%rdx
lea    0xe74(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e40(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlget>:
push   %rbx
call   1050 <dlsym@plt>
test   %rax,%rax
je     114d <dlget+0xd>
pop    %rbx
ret
mov    0x2e8c(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <dlerror@plt>
lea    0xe9c(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1040 <fprintf@plt>
mov    0x2e63(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @dlget(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i8* @dlsym(i8* %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i8* (...) @dlerror()
%14 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %13)
%15 = load i32, i32* @EXIT_FAILURE
%16 = call i32 @exit(i32 %15)
unreachable
17: ; preds = %2
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @dlget(i8* %0, i8* %1) {
%3 = tail call i8* @dlsym(i8* %0, i8* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i8* (...) @dlerror()
%8 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i32, i32* @EXIT_FAILURE
%10 = tail call i32 @exit(i32 %9)
unreachable
11: ; preds = %2
ret i8* %3
}
int pico_aodv_init(void) { return 0; }


x86 assembly (clang, -O0):
<pico_aodv_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pico_aodv_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pico_aodv_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pico_aodv_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __mem_free(void *);
int close(int fd) {
  __mem_free((void *)fd);
  return 0;
}


x86 assembly (clang, -O0):
<close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rdi
call   1030 <__mem_free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close>:
push   %rax
movslq %edi,%rdi
call   1030 <__mem_free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
%6 = call i32 @__mem_free(i8* %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @close(i32 %0) {
%2 = sext i32 %0 to i64
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 @__mem_free(i8* %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ITEM;

/* Variables and functions */
int asn1_item_flags_i2d(int /*<<< orphan*/ *, unsigned char **,
                        int /*<<< orphan*/ const *, int /*<<< orphan*/);
int ASN1_item_i2d(ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it) {
  return asn1_item_flags_i2d(val, out, it, 0);
}


x86 assembly (clang, -O0):
<ASN1_item_i2d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <asn1_item_flags_i2d@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_item_i2d>:
xor    %ecx,%ecx
jmp    1030 <asn1_item_flags_i2d@plt>

LLVM IR (-O0):
define i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i8**
%6 = alloca i32*
store i32* %0, i32** %4
store i8** %1, i8*** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i8**, i8*** %5
%9 = load i32*, i32** %6
%10 = call i32 @asn1_item_flags_i2d(i32* %7, i8** %8, i32* %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* %2) {
%4 = tail call i32 @asn1_item_flags_i2d(i32* %0, i8** %1, i32* %2, i32 0)
ret i32 %4
}
int GetNextKey(int key, int len) {
  int step = 1 << (len - 1);
  while (key & step) {
    step >>= 1;
  }
  return (key & (step - 1)) + step;
}


x86 assembly (clang, -O0):
<GetNextKey>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    $0x0,%eax
je     1137 <GetNextKey+0x37>
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111a <GetNextKey+0x1a>
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetNextKey>:
lea    -0x1(%rsi),%ecx
mov    $0x1,%eax
shl    %cl,%eax
nopw   0x0(%rax,%rax,1)
mov    %eax,%ecx
sar    %eax
test   %edi,%ecx
jne    1110 <GetNextKey+0x10>
lea    -0x1(%rcx),%eax
and    %edi,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @GetNextKey(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = shl i32 1, %7
store i32 %8, i32* %5
br label %9
9: ; preds = %14, %2
%10 = load i32, i32* %3
%11 = load i32, i32* %5
%12 = and i32 %10, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %9
%15 = load i32, i32* %5
%16 = ashr i32 %15, 1
store i32 %16, i32* %5
br label %9
17: ; preds = %9
%18 = load i32, i32* %3
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 1
%21 = and i32 %18, %20
%22 = load i32, i32* %5
%23 = add nsw i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @GetNextKey(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = shl nuw i32 1, %3
br label %5
5: ; preds = %5, %2
%6 = phi i32 [ %4, %2 ], [ %9, %5 ]
%7 = and i32 %6, %0
%8 = icmp eq i32 %7, 0
%9 = ashr i32 %6, 1
br i1 %8, label %10, label %5
10: ; preds = %5
%11 = add nsw i32 %6, -1
%12 = and i32 %11, %0
%13 = add nsw i32 %12, %6
ret i32 %13
}
unsigned int GetClipGroupEnd(struct anon$6 *ph, void *scene) {
  rt_clip_off(scene);
  return (unsigned int)0;
}


x86 assembly (clang, -O0):
<GetClipGroupEnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <rt_clip_off@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetClipGroupEnd>:
push   %rax
mov    %rsi,%rdi
xor    %eax,%eax
call   1030 <rt_clip_off@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%"struct.anon$6" = type opaque
define i32 @GetClipGroupEnd(%"struct.anon$6"* %0, i8* %1) {
%3 = alloca %"struct.anon$6"*
%4 = alloca i8*
store %"struct.anon$6"* %0, %"struct.anon$6"** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @rt_clip_off to i32 (i8*, ...)*)(i8* %5)
ret i32 0
}

LLVM IR (-O2):
%"struct.anon$6" = type opaque
define i32 @GetClipGroupEnd(%"struct.anon$6"* nocapture readnone %0, i8* %1) {
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @rt_clip_off to i32 (i8*, ...)*)(i8* %1)
ret i32 0
}
int mul40320(int x) {
  return (x > 87 ? 315 : "\x01\x05\a#\x03\x0f\x15i\t-?"[x >> 3]) << (x & 7);
}


x86 assembly (clang, -O0):
<mul40320>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x57,-0x4(%rbp)
jle    111e <mul40320+0x1e>
mov    $0x13b,%eax
mov    %eax,-0x8(%rbp)
jmp    1135 <mul40320+0x35>
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
movslq %eax,%rcx
lea    0xed2(%rip),%rax
movsbl (%rax,%rcx,1),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
and    $0x7,%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul40320>:
mov    %edi,%ecx
mov    $0x13b,%eax
cmp    $0x57,%edi
jg     111e <mul40320+0x1e>
mov    %ecx,%eax
sar    $0x3,%eax
cltq
lea    0xee6(%rip),%rdx
movsbl (%rax,%rdx,1),%eax
and    $0x7,%cl
shl    %cl,%eax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"\01\05\07#\03\0F\15i\09-?\00"
define i32 @mul40320(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 87
br i1 %4, label %5, label %6
5: ; preds = %1
br label %13
6: ; preds = %1
%7 = load i32, i32* %2
%8 = ashr i32 %7, 3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [12 x i8], [12 x i8]* @.str, i64 0, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
br label %13
13: ; preds = %6, %5
%14 = phi i32 [ 315, %5 ], [ %12, %6 ]
%15 = load i32, i32* %2
%16 = and i32 %15, 7
%17 = shl i32 %14, %16
ret i32 %17
}

LLVM IR (-O2):
@.str = [12 x i8] c"\01\05\07#\03\0F\15i\09-?\00"
define i32 @mul40320(i32 %0) {
%2 = icmp sgt i32 %0, 87
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = ashr i32 %0, 3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds [12 x i8], [12 x i8]* @.str, i64 0, i64 %5
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ 315, %1 ]
%11 = and i32 %0, 7
%12 = shl nsw i32 %10, %11
ret i32 %12
}
void impl(void) {}


x86 assembly (clang, -O0):
<impl>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<impl>:
ret

LLVM IR (-O0):
define void @impl() {
ret void
}

LLVM IR (-O2):
define void @impl() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srandom(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void dgx_seed_rng(void) {
  static int init = 0;
  if (!init) {
    srandom(time(NULL));
    init = 1;
  }
}


x86 assembly (clang, -O0):
<dgx_seed_rng>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f09(%rip)
jne    114b <dgx_seed_rng+0x2b>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
movl   $0x1,0x2ee9(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dgx_seed_rng>:
push   %rax
cmpb   $0x0,0x2f0c(%rip)
jne    113f <dgx_seed_rng+0x1f>
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
movb   $0x1,0x2ef5(%rip)
pop    %rax
ret

LLVM IR (-O0):
@dgx_seed_rng.init = internal global i32 0
define void @dgx_seed_rng() {
%1 = load i32, i32* @dgx_seed_rng.init
%2 = icmp ne i32 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = call i32 @time(i32* null)
%5 = call i32 @srandom(i32 %4)
store i32 1, i32* @dgx_seed_rng.init
br label %6
6: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@dgx_seed_rng.init = internal unnamed_addr global i1 false
define void @dgx_seed_rng() {
%1 = load i1, i1* @dgx_seed_rng.init
br i1 %1, label %5, label %2
2: ; preds = %0
%3 = tail call i32 @time(i32* null)
%4 = tail call i32 @srandom(i32 %3)
store i1 true, i1* @dgx_seed_rng.init
br label %5
5: ; preds = %2, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ panscan_calc_internal(int);
void panscan_calc(void) { panscan_calc_internal(1); }


x86 assembly (clang, -O0):
<panscan_calc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <panscan_calc_internal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<panscan_calc>:
mov    $0x1,%edi
jmp    1030 <panscan_calc_internal@plt>

LLVM IR (-O0):
define void @panscan_calc() {
%1 = call i32 @panscan_calc_internal(i32 1)
ret void
}

LLVM IR (-O2):
define void @panscan_calc() {
%1 = tail call i32 @panscan_calc_internal(i32 1)
ret void
}
/* Variables and functions */
int laguna_readb(int);
int __svgalib_laguna_incrtc(int i) {
  if (i > 0x1e)
    return 0;
  return laguna_readb(i * 4);
}


x86 assembly (clang, -O0):
<__svgalib_laguna_incrtc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1e,-0x8(%rbp)
jle    1131 <__svgalib_laguna_incrtc+0x21>
movl   $0x0,-0x4(%rbp)
jmp    113f <__svgalib_laguna_incrtc+0x2f>
mov    -0x8(%rbp),%edi
shl    $0x2,%edi
call   1030 <laguna_readb@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_laguna_incrtc>:
cmp    $0x1e,%edi
jle    1118 <__svgalib_laguna_incrtc+0x8>
xor    %eax,%eax
ret
shl    $0x2,%edi
jmp    1030 <laguna_readb@plt>

LLVM IR (-O0):
define i32 @__svgalib_laguna_incrtc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 30
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = mul nsw i32 %8, 4
%10 = call i32 @laguna_readb(i32 %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %7, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @__svgalib_laguna_incrtc(i32 %0) {
%2 = icmp sgt i32 %0, 30
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = shl nsw i32 %0, 2
%5 = tail call i32 @laguna_readb(i32 %4)
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xe9() {
  Assert_real((isxdigit(233) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              1170, ("isxdigit should be 0 for 0xe9"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xe9>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe9,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x492,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xe9>:
push   %rax
mov    $0xe9,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x492,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xe9\00"
define void @t_isxdigit_0xe9() {
%1 = call i64 @isxdigit(i32 233)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1170, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xe9\00"
define void @t_isxdigit_0xe9() {
%1 = tail call i64 @isxdigit(i32 233)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1170, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Error(char *, char *);
int W_CheckNumForName(char *);
int W_GetNumForName(char *name) {
  int i;
  i = W_CheckNumForName(name);
  if (i != -1)
    return i;
  Error("W_GetNumForName: %s not found!", name);
  return -1;
}


x86 assembly (clang, -O0):
<W_GetNumForName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <W_CheckNumForName@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     114d <W_GetNumForName+0x2d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <W_GetNumForName+0x44>
mov    -0x10(%rbp),%rsi
lea    0xea8(%rip),%rdi
call   1030 <Error@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<W_GetNumForName>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <W_CheckNumForName@plt>
mov    %eax,%ebp
cmp    $0xffffffff,%eax
jne    1141 <W_GetNumForName+0x21>
lea    0xec7(%rip),%rdi
mov    %rbx,%rsi
call   1030 <Error@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [31 x i8] c"W_GetNumForName: %s not found!\00"
define i32 @W_GetNumForName(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @W_CheckNumForName(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = call i32 @Error(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %12)
store i32 -1, i32* %2
br label %14
14: ; preds = %11, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [31 x i8] c"W_GetNumForName: %s not found!\00"
define i32 @W_GetNumForName(i8* %0) {
%2 = tail call i32 @W_CheckNumForName(i8* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @Error(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
ret i32 %2
}
int main() {
  char **res = malloc(sizeof(char *));
  *res = malloc(sizeof(char) * 6);
  strcpy(*res, "hello");
  printf("res: %s\n", *res);
  free(*res);
  free(res);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x8,%edi
call   1060 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    $0x6,%edi
call   1060 <malloc@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
lea    0xe81(%rip),%rsi
call   1040 <strcpy@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xe74(%rip),%rdi
mov    $0x0,%al
call   1050 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x6,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
movl   $0x6c6c6568,(%rax)
movw   $0x6f,0x4(%rax)
lea    0xeb5(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [9 x i8] c"res: %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8**
store i32 0, i32* %1
%3 = call i8* @malloc(i64 8)
%4 = bitcast i8* %3 to i8**
store i8** %4, i8*** %2
%5 = call i8* @malloc(i64 6)
%6 = load i8**, i8*** %2
store i8* %5, i8** %6
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = call i8* @strcpy(i8* %8, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %11)
%13 = load i8**, i8*** %2
%14 = load i8*, i8** %13
%15 = load i8**, i8*** %2
%16 = bitcast i8** %15 to i8*
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@.str.1 = [9 x i8] c"res: %s\0A\00"
define i32 @main() {
%1 = tail call dereferenceable_or_null(6) i8* @malloc(i64 6)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(6) %1, i8* align 1 dereferenceable(6) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 6, i1 false)
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %1)
tail call void @free(i8* %1)
ret i32 0
}
float _Complex div_float_cr(float _Complex a, float b) { return a / b; }


x86 assembly (clang, -O0):
<div_float_cr>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm0,-0x10(%rbp)
movss  %xmm1,-0x14(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  -0x14(%rbp),%xmm2
divss  %xmm2,%xmm1
divss  %xmm2,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_float_cr>:
shufps $0x0,%xmm1,%xmm1
divps  %xmm1,%xmm0
ret

LLVM IR (-O0):
define <2 x float> @div_float_cr(<2 x float> %0, float %1) {
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = alloca float
%6 = bitcast { float, float }* %4 to <2 x float>*
store <2 x float> %0, <2 x float>* %6
store float %1, float* %5
%7 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%8 = load float, float* %7
%9 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
%10 = load float, float* %9
%11 = load float, float* %5
%12 = fdiv float %8, %11
%13 = fdiv float %10, %11
%14 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%15 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
store float %12, float* %14
store float %13, float* %15
%16 = bitcast { float, float }* %3 to <2 x float>*
%17 = load <2 x float>, <2 x float>* %16
ret <2 x float> %17
}

LLVM IR (-O2):
define <2 x float> @div_float_cr(<2 x float> %0, float %1) {
%3 = insertelement <2 x float> poison, float %1, i64 0
%4 = shufflevector <2 x float> %3, <2 x float> poison, <2 x i32> zeroinitializer
%5 = fdiv <2 x float> %0, %4
ret <2 x float> %5
}
/* Variables and functions */
long double atand(long double);
long double atand_neg(long double x) { return -atand(x); }


x86 assembly (clang, -O0):
<atand_neg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <atand@plt>
fchs
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atand_neg>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1030 <atand@plt>
fchs
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @atand_neg(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @atand(x86_fp80 %3)
%5 = fneg x86_fp80 %4
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @atand_neg(x86_fp80 %0) {
%2 = tail call x86_fp80 @atand(x86_fp80 %0)
%3 = fneg x86_fp80 %2
ret x86_fp80 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Name-Limuyuan\n");
  printf("Address-http://limuyuan.tech/\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeea(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Name-Limuyuan\0A\00"
@.str.1 = [31 x i8] c"Address-http://limuyuan.tech/\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Name-Limuyuan\00"
@str.2 = [30 x i8] c"Address-http://limuyuan.tech/\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
unsigned long long FNV64(const unsigned char *s) {
  unsigned long long hval = 0xcbf29ce484222325ULL;
  while (*s) {
    hval ^= (unsigned long long)*s++;
    hval += (hval << 1) + (hval << 4) + (hval << 5) + (hval << 7) +
            (hval << 8) + (hval << 40);
  }
  return hval;
}


x86 assembly (clang, -O0):
<FNV64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xcbf29ce484222325,%rax
9c f2 cb
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1189 <FNV64+0x89>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    -0x10(%rbp),%rcx
shl    $0x4,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
shl    $0x5,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
shl    $0x7,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
shl    $0x8,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
shl    $0x28,%rcx
add    %rcx,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1116 <FNV64+0x16>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FNV64>:
movabs $0xcbf29ce484222325,%rsi
9c f2 cb
mov    (%rdi),%dl
test   %dl,%dl
je     1139 <FNV64+0x39>
add    $0x1,%rdi
movabs $0x100000001b3,%rcx
xchg   %ax,%ax
movzbl %dl,%eax
xor    %rsi,%rax
imul   %rcx,%rax
movzbl (%rdi),%edx
add    $0x1,%rdi
mov    %rax,%rsi
test   %dl,%dl
jne    1120 <FNV64+0x20>
ret
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @FNV64(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 -3750763034362895579, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %34
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = zext i8 %11 to i64
%13 = load i64, i64* %3
%14 = xor i64 %13, %12
store i64 %14, i64* %3
%15 = load i64, i64* %3
%16 = shl i64 %15, 1
%17 = load i64, i64* %3
%18 = shl i64 %17, 4
%19 = add i64 %16, %18
%20 = load i64, i64* %3
%21 = shl i64 %20, 5
%22 = add i64 %19, %21
%23 = load i64, i64* %3
%24 = shl i64 %23, 7
%25 = add i64 %22, %24
%26 = load i64, i64* %3
%27 = shl i64 %26, 8
%28 = add i64 %25, %27
%29 = load i64, i64* %3
%30 = shl i64 %29, 40
%31 = add i64 %28, %30
%32 = load i64, i64* %3
%33 = add i64 %32, %31
store i64 %33, i64* %3
br label %4
34: ; preds = %4
%35 = load i64, i64* %3
ret i64 %35
}

LLVM IR (-O2):
define i64 @FNV64(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ -3750763034362895579, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = zext i8 %5 to i64
%10 = xor i64 %6, %9
%11 = mul i64 %10, 1099511628211
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ -3750763034362895579, %1 ], [ %11, %4 ]
ret i64 %15
}
void drawHUDFrame(void) {}


x86 assembly (clang, -O0):
<drawHUDFrame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawHUDFrame>:
ret

LLVM IR (-O0):
define void @drawHUDFrame() {
ret void
}

LLVM IR (-O2):
define void @drawHUDFrame() {
ret void
}
unsigned intcat(unsigned x, unsigned y) {
  unsigned pow = 10;
  while (y >= pow) {
    pow *= 10;
  }
  return x * pow * y;
}


x86 assembly (clang, -O0):
<intcat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0xa,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jb     1129 <intcat+0x29>
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <intcat+0x11>
mov    -0x4(%rbp),%eax
imul   -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcat>:
mov    %esi,%eax
mov    $0xa,%ecx
cmp    $0xa,%esi
jb     1129 <intcat+0x29>
mov    $0xa,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
cmp    %eax,%ecx
jbe    1120 <intcat+0x20>
imul   %edi,%eax
imul   %ecx,%eax
ret

LLVM IR (-O0):
define i32 @intcat(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 10, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp uge i32 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, i32* %5
%12 = mul i32 %11, 10
store i32 %12, i32* %5
br label %6
13: ; preds = %6
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = mul i32 %14, %15
%17 = load i32, i32* %4
%18 = mul i32 %16, %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @intcat(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, 10
br i1 %3, label %8, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ 10, %2 ]
%6 = mul i32 %5, 10
%7 = icmp ugt i32 %6, %1
br i1 %7, label %8, label %4
8: ; preds = %4, %2
%9 = phi i32 [ 10, %2 ], [ %6, %4 ]
%10 = mul i32 %1, %0
%11 = mul i32 %10, %9
ret i32 %11
}
void destroy_pkg_mallocs(void) {}


x86 assembly (clang, -O0):
<destroy_pkg_mallocs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_pkg_mallocs>:
ret

LLVM IR (-O0):
define void @destroy_pkg_mallocs() {
ret void
}

LLVM IR (-O2):
define void @destroy_pkg_mallocs() {
ret void
}
int omap4_dpll_low_power_cascade_enter(void) { return 0; }


x86 assembly (clang, -O0):
<omap4_dpll_low_power_cascade_enter>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap4_dpll_low_power_cascade_enter>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @omap4_dpll_low_power_cascade_enter() {
ret i32 0
}

LLVM IR (-O2):
define i32 @omap4_dpll_low_power_cascade_enter() {
ret i32 0
}