xunge/DecIR huggingface dataset:
int main(void) {
  int x, y;
  for (int i = 0; i < 5; i++) {
    if (i == 5)
      continue;
    if (i == 4)
      break;
    i += 2;
  }
  while (x < 5) {
    if (x == 3)
      continue;
    x++;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x5,-0x10(%rbp)
jge    1151 <main+0x51>
cmpl   $0x5,-0x10(%rbp)
jne    112b <main+0x2b>
jmp    1143 <main+0x43>
cmpl   $0x4,-0x10(%rbp)
jne    113a <main+0x3a>
jmp    1151 <main+0x51>
mov    -0x10(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <main+0x12>
jmp    1156 <main+0x56>
cmpl   $0x5,-0x8(%rbp)
jge    117d <main+0x7d>
cmpl   $0x3,-0x8(%rbp)
jne    116f <main+0x6f>
jmp    1156 <main+0x56>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <main+0x56>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %4
br label %5
5: ; preds = %19, %0
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 5
br i1 %10, label %11, label %12
11: ; preds = %8
br label %19
12: ; preds = %8
%13 = load i32, i32* %4
%14 = icmp eq i32 %13, 4
br i1 %14, label %15, label %16
15: ; preds = %12
br label %22
16: ; preds = %12
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 2
store i32 %18, i32* %4
br label %19
19: ; preds = %16, %11
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %15, %5
br label %23
23: ; preds = %30, %29, %22
%24 = load i32, i32* %2
%25 = icmp slt i32 %24, 5
br i1 %25, label %26, label %33
26: ; preds = %23
%27 = load i32, i32* %2
%28 = icmp eq i32 %27, 3
br i1 %28, label %29, label %30
29: ; preds = %26
br label %23
30: ; preds = %26
%31 = load i32, i32* %2
%32 = add nsw i32 %31, 1
store i32 %32, i32* %2
br label %23
33: ; preds = %23
%34 = load i32, i32* %1
ret i32 %34
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x83() {
  Assert_real((isodigit(131) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              660, ("isodigit should be 0 for 0x83"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x83>:
push   %rbp
mov    %rsp,%rbp
mov    $0x83,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x294,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x83>:
push   %rax
mov    $0x83,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x294,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x83\00"
define void @t_isodigit_0x83() {
%1 = call i64 @isodigit(i32 131)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 660, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x83\00"
define void @t_isodigit_0x83() {
%1 = tail call i64 @isodigit(i32 131)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 660, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void NOP_Process(void) {}


x86 assembly (clang, -O0):
<NOP_Process>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOP_Process>:
ret

LLVM IR (-O0):
define void @NOP_Process() {
ret void
}

LLVM IR (-O2):
define void @NOP_Process() {
ret void
}
__int128_t quad_fetch_nand_seq_cst(__int128_t *ptr, __int128_t value) {
  return __atomic_fetch_nand(ptr, value, 5);
}


x86 assembly (clang, -O0):
<quad_fetch_nand_seq_cst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rdi,-0x28(%rbp)
mov    %rcx,-0x38(%rbp)
mov    %rax,-0x40(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x68(%rbp)
mov    %rax,-0x70(%rbp)
mov    -0x70(%rbp),%rsi
mov    -0x68(%rbp),%rdx
mov    $0x5,%ecx
call   1030 <__atomic_fetch_nand_16@plt>
mov    %rax,-0x80(%rbp)
mov    %rdx,-0x78(%rbp)
mov    -0x80(%rbp),%rax
mov    -0x78(%rbp),%rcx
mov    %rcx,-0x58(%rbp)
mov    %rax,-0x60(%rbp)
mov    -0x60(%rbp),%rax
mov    -0x58(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quad_fetch_nand_seq_cst>:
mov    $0x5,%ecx
jmp    1030 <__atomic_fetch_nand_16@plt>

LLVM IR (-O0):
define { i64, i64 } @quad_fetch_nand_seq_cst(i128* %0, i64 %1, i64 %2) {
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128*
%7 = alloca i128
%8 = alloca i128
%9 = alloca i128
%10 = alloca i128
%11 = alloca i128
%12 = bitcast i128* %5 to { i64, i64 }*
%13 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 0
store i64 %1, i64* %13
%14 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 1
store i64 %2, i64* %14
%15 = load i128, i128* %5
store i128* %0, i128** %6
store i128 %15, i128* %7
%16 = load i128*, i128** %6
%17 = load i128, i128* %7
store i128 %17, i128* %8
%18 = bitcast i128* %16 to i8*
%19 = load i128, i128* %8
store i128 %19, i128* %10
%20 = bitcast i128* %10 to { i64, i64 }*
%21 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 0
%22 = load i64, i64* %21
%23 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 1
%24 = load i64, i64* %23
%25 = call { i64, i64 } @__atomic_fetch_nand_16(i8* %18, i64 %22, i64 %24, i32 5)
%26 = bitcast i128* %11 to { i64, i64 }*
%27 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 0
%28 = extractvalue { i64, i64 } %25, 0
store i64 %28, i64* %27
%29 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 1
%30 = extractvalue { i64, i64 } %25, 1
store i64 %30, i64* %29
%31 = load i128, i128* %11
store i128 %31, i128* %9
%32 = load i128, i128* %9
store i128 %32, i128* %4
%33 = bitcast i128* %4 to { i64, i64 }*
%34 = load { i64, i64 }, { i64, i64 }* %33
ret { i64, i64 } %34
}

LLVM IR (-O2):
define { i64, i64 } @quad_fetch_nand_seq_cst(i128* %0, i64 %1, i64 %2) {
%4 = bitcast i128* %0 to i8*
%5 = tail call { i64, i64 } @__atomic_fetch_nand_16(i8* %4, i64 %1, i64 %2, i32 5)
ret { i64, i64 } %5
}
void foo566() {}


x86 assembly (clang, -O0):
<foo566>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo566>:
ret

LLVM IR (-O0):
define void @foo566() {
ret void
}

LLVM IR (-O2):
define void @foo566() {
ret void
}
/* Variables and functions */
scalar_t__ __floatdidf(long long);
float __floatdisf(long long a1) { (float)__floatdidf(a1); }


x86 assembly (clang, -O0):
<__floatdisf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <__floatdidf@plt>
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__floatdisf>:
jmp    1030 <__floatdidf@plt>

LLVM IR (-O0):
define float @__floatdisf(i64 %0) {
%2 = alloca float
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = call i64 @__floatdidf(i64 %4)
%6 = sitofp i64 %5 to float
%7 = load float, float* %2
ret float %7
}

LLVM IR (-O2):
define float @__floatdisf(i64 %0) {
%2 = tail call i64 @__floatdidf(i64 %0)
ret float undef
}
int test_imm_42int32_reg(int val) { return ((val) & (0x42 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_42int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x42,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_42int32_reg>:
test   $0x42,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_42int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 66
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_42int32_reg(i32 %0) {
%2 = and i32 %0, 66
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char lower(char c) { return ('A' <= c && c <= 'Z') ? c + 'a' - 'A' : c; }


x86 assembly (clang, -O0):
<lower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     113a <lower+0x3a>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jg     113a <lower+0x3a>
movsbl -0x1(%rbp),%eax
add    $0x61,%eax
sub    $0x41,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <lower+0x41>
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @lower(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 65, %4
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = add nsw i32 %12, 97
%14 = sub nsw i32 %13, 65
br label %18
15: ; preds = %6, %1
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
br label %18
18: ; preds = %15, %10
%19 = phi i32 [ %14, %10 ], [ %17, %15 ]
%20 = trunc i32 %19 to i8
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @lower(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Variables and functions */
scalar_t__ checkdim(int ***, int);
bool overlap(int rect[2][2][2]) {
  if (checkdim(rect, 0) && checkdim(rect, 1)) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<overlap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <checkdim@plt>
cmp    $0x0,%rax
je     1155 <overlap+0x45>
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1030 <checkdim@plt>
cmp    $0x0,%rax
je     1155 <overlap+0x45>
movl   $0x1,-0x4(%rbp)
jmp    115c <overlap+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<overlap>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %esi,%esi
call   1030 <checkdim@plt>
test   %rax,%rax
je     1139 <overlap+0x29>
mov    $0x1,%ebp
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <checkdim@plt>
test   %rax,%rax
jne    113b <overlap+0x2b>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @overlap([2 x [2 x i32]]* %0) {
%2 = alloca i32
%3 = alloca [2 x [2 x i32]]*
store [2 x [2 x i32]]* %0, [2 x [2 x i32]]** %3
%4 = load [2 x [2 x i32]]*, [2 x [2 x i32]]** %3
%5 = bitcast [2 x [2 x i32]]* %4 to i32***
%6 = call i64 @checkdim(i32*** %5, i32 0)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load [2 x [2 x i32]]*, [2 x [2 x i32]]** %3
%10 = bitcast [2 x [2 x i32]]* %9 to i32***
%11 = call i64 @checkdim(i32*** %10, i32 1)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 1, i32* %2
br label %15
14: ; preds = %8, %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @overlap([2 x [2 x i32]]* %0) {
%2 = bitcast [2 x [2 x i32]]* %0 to i32***
%3 = tail call i64 @checkdim(i32*** %2, i32 0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i64 @checkdim(i32*** %2, i32 1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %5, %1
br label %9
9: ; preds = %5, %8
%10 = phi i32 [ 0, %8 ], [ 1, %5 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void DisplayUsage(const char *progname) {
  fprintf(stderr,
          "Usage %s <snort log dir> [-a daq address space id (0-65535)] <snort "
          "log dir> [<file name> [<bpf>]]\n",
          progname);
}


x86 assembly (clang, -O0):
<DisplayUsage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisplayUsage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [100 x i8] c"Usage %s <snort log dir> [-a daq address space id (0-65535)] <snort log dir> [<file name> [<bpf>]]\0A\00"
define void @DisplayUsage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [100 x i8] c"Usage %s <snort log dir> [-a daq address space id (0-65535)] <snort log dir> [<file name> [<bpf>]]\0A\00"
define void @DisplayUsage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
double sqr(double x) { return x * x; }


x86 assembly (clang, -O0):
<sqr>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqr>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @sqr(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @sqr(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int random();
float randf(float scale) {
  return (float)(random() % 1000001) / 1000000.0f * scale;
}


x86 assembly (clang, -O0):
<randf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
mov    $0xf4241,%ecx
cltd
idiv   %ecx
cvtsi2ss %edx,%xmm0
movss  0xec8(%rip),%xmm1
divss  %xmm1,%xmm0
mulss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randf>:
push   %rax
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <random@plt>
cltq
imul   $0x431bda1d,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rcx
add    %edx,%ecx
imul   $0xf4241,%ecx,%ecx
sub    %ecx,%eax
cvtsi2ss %eax,%xmm1
divss  0xeb8(%rip),%xmm1
movss  0x4(%rsp),%xmm0
mulss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @randf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call i32 (...) @random()
%4 = srem i32 %3, 1000001
%5 = sitofp i32 %4 to float
%6 = fdiv float %5, 1.000000e+06
%7 = load float, float* %2
%8 = fmul float %6, %7
ret float %8
}

LLVM IR (-O2):
define float @randf(float %0) {
%2 = tail call i32 (...) @random()
%3 = srem i32 %2, 1000001
%4 = sitofp i32 %3 to float
%5 = fdiv float %4, 1.000000e+06
%6 = fmul float %5, %0
ret float %6
}
/* Variables and functions */
int strtol(char *, char **, int);
long get_port(char *str) {
  char *endptr;
  int port = strtol(str, &endptr, 10);
  if (!port || !endptr)
    port = 0;
  return port;
}


x86 assembly (clang, -O0):
<get_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1146 <get_port+0x36>
cmpq   $0x0,-0x10(%rbp)
jne    114d <get_port+0x3d>
movl   $0x0,-0x14(%rbp)
movslq -0x14(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_port>:
push   %rax
mov    %rsp,%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    (%rsp),%rcx
test   %rcx,%rcx
movslq %eax,%rdx
cmovne %rdx,%rcx
xor    %eax,%eax
test   %edx,%edx
cmovne %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @get_port(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strtol(i8* %5, i8** %3, i32 10)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %9, %1
store i32 0, i32* %4
br label %13
13: ; preds = %12, %9
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
ret i64 %15
}

LLVM IR (-O2):
define i64 @get_port(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = call i32 @strtol(i8* %0, i8** %2, i32 10)
%5 = icmp ne i32 %4, 0
%6 = load i8*, i8** %2
%7 = icmp ne i8* %6, null
%8 = select i1 %5, i1 %7, i1 false
%9 = sext i32 %4 to i64
%10 = select i1 %8, i64 %9, i64 0
ret i64 %10
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ stuffbit(int);
void stuffbyte(uint8_t c) {
  int i;
  for (i = 0; i < 8; i++) {
    stuffbit((c & 0x80) ? 1 : 0);
    c <<= 1;
  }
}


x86 assembly (clang, -O0):
<stuffbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x8,-0x8(%rbp)
jge    115e <stuffbyte+0x4e>
mov    -0x4(%rbp),%ecx
and    $0x80,%ecx
xor    %edi,%edi
mov    $0x1,%eax
cmp    $0x0,%ecx
cmovne %eax,%edi
call   1030 <stuffbit@plt>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <stuffbyte+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stuffbyte>:
push   %rbx
mov    %edi,%ebx
shr    $0x7,%edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
mov    %ebx,%edi
shr    $0x6,%edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
mov    %ebx,%edi
shr    $0x5,%edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
mov    %ebx,%edi
shr    $0x4,%edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
mov    %ebx,%edi
shr    $0x3,%edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
mov    %ebx,%edi
shr    $0x2,%edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
mov    %ebx,%edi
shr    %edi
and    $0x1,%edi
call   1030 <stuffbit@plt>
and    $0x1,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <stuffbit@plt>

LLVM IR (-O0):
define void @stuffbyte(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 8
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 128
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 1, i32 0
%13 = call i32 @stuffbit(i32 %12)
%14 = load i32, i32* %2
%15 = shl i32 %14, 1
store i32 %15, i32* %2
br label %16
16: ; preds = %7
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %4
19: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @stuffbyte(i32 %0) {
%2 = lshr i32 %0, 7
%3 = and i32 %2, 1
%4 = tail call i32 @stuffbit(i32 %3)
%5 = lshr i32 %0, 6
%6 = and i32 %5, 1
%7 = tail call i32 @stuffbit(i32 %6)
%8 = lshr i32 %0, 5
%9 = and i32 %8, 1
%10 = tail call i32 @stuffbit(i32 %9)
%11 = lshr i32 %0, 4
%12 = and i32 %11, 1
%13 = tail call i32 @stuffbit(i32 %12)
%14 = lshr i32 %0, 3
%15 = and i32 %14, 1
%16 = tail call i32 @stuffbit(i32 %15)
%17 = lshr i32 %0, 2
%18 = and i32 %17, 1
%19 = tail call i32 @stuffbit(i32 %18)
%20 = lshr i32 %0, 1
%21 = and i32 %20, 1
%22 = tail call i32 @stuffbit(i32 %21)
%23 = and i32 %0, 1
%24 = tail call i32 @stuffbit(i32 %23)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ matNd_getColumn(double *, double const *, int const, int);
void mat3d_getColumn(double result[3], const double m[9], const int col) {
  matNd_getColumn(result, m, col, 3);
}


x86 assembly (clang, -O0):
<mat3d_getColumn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x3,%ecx
call   1030 <matNd_getColumn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat3d_getColumn>:
mov    $0x3,%ecx
jmp    1030 <matNd_getColumn@plt>

LLVM IR (-O0):
define void @mat3d_getColumn(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = call i32 @matNd_getColumn(double* %7, double* %8, i32 %9, i32 3)
ret void
}

LLVM IR (-O2):
define void @mat3d_getColumn(double* %0, double* %1, i32 %2) {
%4 = tail call i32 @matNd_getColumn(double* %0, double* %1, i32 %2, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ configurePatchLrm();
int /*<<< orphan*/ enterCpePatchLrm();
void refreshPatchLrm(void) {
  enterCpePatchLrm();
  configurePatchLrm();
}


x86 assembly (clang, -O0):
<refreshPatchLrm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <enterCpePatchLrm@plt>
mov    $0x0,%al
call   1030 <configurePatchLrm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<refreshPatchLrm>:
push   %rax
xor    %eax,%eax
call   1040 <enterCpePatchLrm@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <configurePatchLrm@plt>

LLVM IR (-O0):
define void @refreshPatchLrm() {
%1 = call i32 (...) @enterCpePatchLrm()
%2 = call i32 (...) @configurePatchLrm()
ret void
}

LLVM IR (-O2):
define void @refreshPatchLrm() {
%1 = tail call i32 (...) @enterCpePatchLrm()
%2 = tail call i32 (...) @configurePatchLrm()
ret void
}
/* Variables and functions */
int isupper(unsigned char);
int chaz_ConfWriterC_sym_is_uppercase(const char *sym) {
  return isupper((unsigned char)sym[0]);
}


x86 assembly (clang, -O0):
<chaz_ConfWriterC_sym_is_uppercase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edi
call   1030 <isupper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_ConfWriterC_sym_is_uppercase>:
movzbl (%rdi),%edi
jmp    1030 <isupper@plt>

LLVM IR (-O0):
define i32 @chaz_ConfWriterC_sym_is_uppercase(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = call i32 @isupper(i8 zeroext %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @chaz_ConfWriterC_sym_is_uppercase(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call i32 @isupper(i8 zeroext %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ AsyncPowerManagerP__0__ResourceDefaultOwner__granted();
void ArbiterP__1__ResourceDefaultOwner__granted(void) {
  AsyncPowerManagerP__0__ResourceDefaultOwner__granted();
}


x86 assembly (clang, -O0):
<ArbiterP__1__ResourceDefaultOwner__granted>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AsyncPowerManagerP__0__ResourceDefaultOwner__granted@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArbiterP__1__ResourceDefaultOwner__granted>:
xor    %eax,%eax
jmp    1030 <AsyncPowerManagerP__0__ResourceDefaultOwner__granted@plt>

LLVM IR (-O0):
define void @ArbiterP__1__ResourceDefaultOwner__granted() {
%1 = call i32 (...) @AsyncPowerManagerP__0__ResourceDefaultOwner__granted()
ret void
}

LLVM IR (-O2):
define void @ArbiterP__1__ResourceDefaultOwner__granted() {
%1 = tail call i32 (...) @AsyncPowerManagerP__0__ResourceDefaultOwner__granted()
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;
typedef size_t uint16_t;

/* Variables and functions */
void set_uint32(uint8_t *buf, uint16_t pos, uint32_t b) {
  buf[pos] = (b >> 24) & 0xff;
  buf[pos + 1] = (b >> 16) & 0xff;
  buf[pos + 2] = (b >> 8) & 0xff;
  buf[pos + 3] = b & 0xff;
}


x86 assembly (clang, -O0):
<set_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edx
sar    $0x18,%edx
and    $0xff,%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
sar    $0x10,%edx
and    $0xff,%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %edx,0x4(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
sar    $0x8,%edx
and    $0xff,%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %edx,0x8(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
and    $0xff,%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %edx,0xc(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_uint32>:
push   %rbx
mov    %edx,%eax
movzbl %dh,%ebx
movzbl %dl,%ecx
shr    $0x18,%edx
mov    %edx,(%rdi,%rsi,4)
shr    $0x10,%eax
movzbl %al,%eax
mov    %eax,0x4(%rdi,%rsi,4)
mov    %ebx,0x8(%rdi,%rsi,4)
mov    %ecx,0xc(%rdi,%rsi,4)
pop    %rbx
ret

LLVM IR (-O0):
define void @set_uint32(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i32
store i32* %0, i32** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = ashr i32 %7, 24
%9 = and i32 %8, 255
%10 = load i32*, i32** %4
%11 = load i64, i64* %5
%12 = getelementptr inbounds i32, i32* %10, i64 %11
store i32 %9, i32* %12
%13 = load i32, i32* %6
%14 = ashr i32 %13, 16
%15 = and i32 %14, 255
%16 = load i32*, i32** %4
%17 = load i64, i64* %5
%18 = add i64 %17, 1
%19 = getelementptr inbounds i32, i32* %16, i64 %18
store i32 %15, i32* %19
%20 = load i32, i32* %6
%21 = ashr i32 %20, 8
%22 = and i32 %21, 255
%23 = load i32*, i32** %4
%24 = load i64, i64* %5
%25 = add i64 %24, 2
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
%27 = load i32, i32* %6
%28 = and i32 %27, 255
%29 = load i32*, i32** %4
%30 = load i64, i64* %5
%31 = add i64 %30, 3
%32 = getelementptr inbounds i32, i32* %29, i64 %31
store i32 %28, i32* %32
ret void
}

LLVM IR (-O2):
define void @set_uint32(i32* nocapture writeonly %0, i64 %1, i32 %2) {
%4 = lshr i32 %2, 24
%5 = getelementptr inbounds i32, i32* %0, i64 %1
store i32 %4, i32* %5
%6 = lshr i32 %2, 16
%7 = and i32 %6, 255
%8 = add i64 %1, 1
%9 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 %7, i32* %9
%10 = lshr i32 %2, 8
%11 = and i32 %10, 255
%12 = add i64 %1, 2
%13 = getelementptr inbounds i32, i32* %0, i64 %12
store i32 %11, i32* %13
%14 = and i32 %2, 255
%15 = add i64 %1, 3
%16 = getelementptr inbounds i32, i32* %0, i64 %15
store i32 %14, i32* %16
ret void
}
int test_imm_52int8_mem(signed char *val) {
  return ((*val) & (-0x52 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_52int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffae,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_52int8_mem>:
testb  $0xae,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_52int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -82
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_52int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -82
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int my_strlen(char *);
int init(char *base, int *nbr, int *j, int *i) {
  int len;
  len = my_strlen(base);
  *nbr = 0;
  *j = 0;
  *i = 1;
  return (len);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <my_strlen@plt>
mov    %eax,-0x24(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x20(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%rbx
call   1030 <my_strlen@plt>
movl   $0x0,(%rbx)
movl   $0x0,(%r15)
movl   $0x1,(%r14)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @init(i8* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%10 = load i8*, i8** %5
%11 = call i32 @my_strlen(i8* %10)
store i32 %11, i32* %9
%12 = load i32*, i32** %6
store i32 0, i32* %12
%13 = load i32*, i32** %7
store i32 0, i32* %13
%14 = load i32*, i32** %8
store i32 1, i32* %14
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
define i32 @init(i8* %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = tail call i32 @my_strlen(i8* %0)
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ strncat(char *, char const *, size_t);
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
char *pattern(char *buffer, size_t size, const char *dir, const char *sep,
              const char *file) {
  --size;
  buffer[size] = '\0';
  strncpy(buffer, dir, size);
  strncat(buffer, sep, size);
  strncat(buffer, file, size);
  return buffer;
}


x86 assembly (clang, -O0):
<pattern>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <strncat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <strncat@plt>
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pattern>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %r8,%r14
mov    %rcx,%r15
mov    %rdi,%rbx
movb   $0x0,-0x1(%rdi,%rsi,1)
lea    -0x1(%rsi),%r12
mov    %rdx,%rsi
mov    %r12,%rdx
call   1030 <strncpy@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r12,%rdx
call   1040 <strncat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r12,%rdx
call   1040 <strncat@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @pattern(i8* %0, i64 %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i64, i64* %7
%12 = add i64 %11, -1
store i64 %12, i64* %7
%13 = load i8*, i8** %6
%14 = load i64, i64* %7
%15 = getelementptr inbounds i8, i8* %13, i64 %14
store i8 0, i8* %15
%16 = load i8*, i8** %6
%17 = load i8*, i8** %8
%18 = load i64, i64* %7
%19 = call i32 @strncpy(i8* %16, i8* %17, i64 %18)
%20 = load i8*, i8** %6
%21 = load i8*, i8** %9
%22 = load i64, i64* %7
%23 = call i32 @strncat(i8* %20, i8* %21, i64 %22)
%24 = load i8*, i8** %6
%25 = load i8*, i8** %10
%26 = load i64, i64* %7
%27 = call i32 @strncat(i8* %24, i8* %25, i64 %26)
%28 = load i8*, i8** %6
ret i8* %28
}

LLVM IR (-O2):
define i8* @pattern(i8* returned %0, i64 %1, i8* %2, i8* %3, i8* %4) {
%6 = add i64 %1, -1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 0, i8* %7
%8 = tail call i32 @strncpy(i8* %0, i8* %2, i64 %6)
%9 = tail call i32 @strncat(i8* %0, i8* %3, i64 %6)
%10 = tail call i32 @strncat(i8* %0, i8* %4, i64 %6)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ FatalErrnoError(int, int, char *);
int close(int);
void Eclose(int s) { FatalErrnoError(close(s) == -1, 1, "close()"); }


x86 assembly (clang, -O0):
<Eclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x1,%esi
lea    0xeb6(%rip),%rdx
call   1040 <FatalErrnoError@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Eclose>:
push   %rax
call   1030 <close@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
lea    0xeca(%rip),%rdx
mov    $0x1,%esi
pop    %rax
jmp    1040 <FatalErrnoError@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"close()\00"
define void @Eclose(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
%5 = icmp eq i32 %4, -1
%6 = zext i1 %5 to i32
%7 = call i32 @FatalErrnoError(i32 %6, i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"close()\00"
define void @Eclose(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
%4 = zext i1 %3 to i32
%5 = tail call i32 @FatalErrnoError(i32 %4, i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
#define AF_INET 128
int /*<<< orphan*/ EAFNOSUPPORT;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
char const *inet_ntop4(void const *, char *, int /*<<< orphan*/);
const char *inet_ntop(int af, const void *src, char *dst, socklen_t size) {
  switch (af) {
  case AF_INET:
    return inet_ntop4(src, dst, size);
  default:
    __set_errno(EAFNOSUPPORT);
    return NULL;
  }
}


x86 assembly (clang, -O0):
<inet_ntop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x80,%eax
jne    1162 <inet_ntop+0x42>
jmp    1149 <inet_ntop+0x29>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1040 <inet_ntop4@plt>
mov    %rax,-0x8(%rbp)
jmp    1178 <inet_ntop+0x58>
mov    0x2e77(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_ntop>:
cmp    $0x80,%edi
jne    1135 <inet_ntop+0x15>
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1040 <inet_ntop4@plt>
push   %rax
mov    0x2ea3(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@EAFNOSUPPORT = global i32 0
define i8* @inet_ntop(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32, i32* %6
switch i32 %10, label %16 [
i32 128, label %11
]
11: ; preds = %4
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = call i8* @inet_ntop4(i8* %12, i8* %13, i32 %14)
store i8* %15, i8** %5
br label %19
16: ; preds = %4
%17 = load i32, i32* @EAFNOSUPPORT
%18 = call i32 @__set_errno(i32 %17)
store i8* null, i8** %5
br label %19
19: ; preds = %16, %11
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
@EAFNOSUPPORT = global i32 0
define i8* @inet_ntop(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %0, 128
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i8* @inet_ntop4(i8* %1, i8* %2, i32 %3)
br label %11
8: ; preds = %4
%9 = load i32, i32* @EAFNOSUPPORT
%10 = tail call i32 @__set_errno(i32 %9)
br label %11
11: ; preds = %8, %6
%12 = phi i8* [ %7, %6 ], [ null, %8 ]
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void vul(char *str) {
  char str2[10];
  strcpy(str2, str);
}


x86 assembly (clang, -O0):
<vul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x12(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vul>:
sub    $0x18,%rsp
mov    %rdi,%rsi
lea    0xe(%rsp),%rdi
call   1030 <strcpy@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @vul(i8* %0) {
%2 = alloca i8*
%3 = alloca [10 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @strcpy(i8* %4, i8* %5)
ret void
}

LLVM IR (-O2):
define void @vul(i8* %0) {
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* %0)
ret void
}
int get_signed_value(int value, int is_word) {
  if (is_word && (value & 0x8000) != 0) {
    return -(((~value) + 1) & 0xffff);
  } else if (!is_word && (value & 0x80) != 0) {
    return -(((~value) + 1) & 0xff);
  } else {
    return value;
  }
}


x86 assembly (clang, -O0):
<get_signed_value>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1140 <get_signed_value+0x40>
mov    -0x8(%rbp),%eax
and    $0x8000,%eax
cmp    $0x0,%eax
je     1140 <get_signed_value+0x40>
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
add    $0x1,%ecx
and    $0xffff,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    117c <get_signed_value+0x7c>
cmpl   $0x0,-0xc(%rbp)
jne    1176 <get_signed_value+0x76>
mov    -0x8(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1176 <get_signed_value+0x76>
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
add    $0x1,%ecx
and    $0xff,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    117c <get_signed_value+0x7c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_signed_value>:
mov    %edi,%eax
test   %esi,%esi
je     1117 <get_signed_value+0x17>
mov    %eax,%ecx
and    $0x8000,%ecx
je     1117 <get_signed_value+0x17>
neg    %eax
movzwl %ax,%eax
jmp    112a <get_signed_value+0x2a>
test   %esi,%esi
jne    112c <get_signed_value+0x2c>
mov    %eax,%ecx
and    $0x80,%ecx
je     112c <get_signed_value+0x2c>
neg    %eax
movzbl %al,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @get_signed_value(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %2
%9 = load i32, i32* %4
%10 = and i32 %9, 32768
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load i32, i32* %4
%14 = xor i32 %13, -1
%15 = add nsw i32 %14, 1
%16 = and i32 %15, 65535
%17 = sub nsw i32 0, %16
store i32 %17, i32* %3
br label %33
18: ; preds = %8, %2
%19 = load i32, i32* %5
%20 = icmp ne i32 %19, 0
br i1 %20, label %31, label %21
21: ; preds = %18
%22 = load i32, i32* %4
%23 = and i32 %22, 128
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %31
25: ; preds = %21
%26 = load i32, i32* %4
%27 = xor i32 %26, -1
%28 = add nsw i32 %27, 1
%29 = and i32 %28, 255
%30 = sub nsw i32 0, %29
store i32 %30, i32* %3
br label %33
31: ; preds = %21, %18
%32 = load i32, i32* %4
store i32 %32, i32* %3
br label %33
33: ; preds = %31, %25, %12
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @get_signed_value(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = and i32 %0, 32768
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = sub i32 0, %0
%9 = and i32 %8, 65535
%10 = sub nsw i32 0, %9
br label %19
11: ; preds = %2
%12 = and i32 %0, 128
%13 = icmp ne i32 %12, 0
%14 = and i1 %3, %13
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = sub i32 0, %0
%17 = and i32 %16, 255
%18 = sub nsw i32 0, %17
br label %19
19: ; preds = %11, %15, %7
%20 = phi i32 [ %10, %7 ], [ %18, %15 ], [ %0, %11 ]
ret i32 %20
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
size_t pidlen(pid_t pid) {
  size_t digits = 0;
  while (pid) {
    digits++;
    pid /= 10;
  }
  return digits;
}


x86 assembly (clang, -O0):
<pidlen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1138 <pidlen+0x38>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110f <pidlen+0xf>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pidlen>:
xor    %eax,%eax
test   %edi,%edi
je     1133 <pidlen+0x33>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%rax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <pidlen+0x10>
ret

LLVM IR (-O0):
define i64 @pidlen(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i64, i64* %3
%9 = add i64 %8, 1
store i64 %9, i64* %3
%10 = load i32, i32* %2
%11 = sdiv i32 %10, 10
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @pidlen(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add i64 %4, 1
%7 = sdiv i32 %5, 10
%8 = add i32 %5, 9
%9 = icmp ult i32 %8, 19
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i64 [ 0, %1 ], [ %6, %3 ]
ret i64 %11
}
double g(double x) { return 3 * x * x + 1; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed9(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
addsd  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define double @g(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 3.000000e+00, %3
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double %4, double %5, double 1.000000e+00)
ret double %6
}

LLVM IR (-O2):
define double @g(double %0) {
%2 = fmul double %0, 3.000000e+00
%3 = tail call double @llvm.fmuladd.f64(double %2, double %0, double 1.000000e+00)
ret double %3
}
signed long signedlong_ignoring_longint(signed long x, long int y) { return x; }


x86 assembly (clang, -O0):
<signedlong_ignoring_longint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlong_ignoring_longint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlong_ignoring_longint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlong_ignoring_longint(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Variables and functions */
int log(double);
float image_psnr(float mse) { return -10 * log(mse) / log(10.0); }


x86 assembly (clang, -O0):
<image_psnr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <log@plt>
imul   $0xfffffff6,%eax,%eax
mov    %eax,-0x8(%rbp)
movsd  0xec4(%rip),%xmm0
call   1030 <log@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<image_psnr>:
push   %rbx
cvtss2sd %xmm0,%xmm0
call   1030 <log@plt>
add    %eax,%eax
lea    (%rax,%rax,4),%ebx
neg    %ebx
movsd  0xed7(%rip),%xmm0
call   1030 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define float @image_psnr(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i32 @log(double %4)
%6 = mul nsw i32 -10, %5
%7 = call i32 @log(double 1.000000e+01)
%8 = sdiv i32 %6, %7
%9 = sitofp i32 %8 to float
ret float %9
}

LLVM IR (-O2):
define float @image_psnr(float %0) {
%2 = fpext float %0 to double
%3 = tail call i32 @log(double %2)
%4 = mul nsw i32 %3, -10
%5 = tail call i32 @log(double 1.000000e+01)
%6 = sdiv i32 %4, %5
%7 = sitofp i32 %6 to float
ret float %7
}
int test_imm_57int8_mem(signed char *val) {
  return ((*val) & (0x57 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_57int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x57,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_57int8_mem>:
testb  $0x57,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_57int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 87
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_57int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 87
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int rand();
char random_ch() { return rand() % 26 + 'A'; }


x86 assembly (clang, -O0):
<random_ch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x1a,%ecx
cltd
idiv   %ecx
add    $0x41,%edx
mov    %dl,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_ch>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x4ec4ec4f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x23,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%edx
lea    (%rdx,%rdx,4),%edx
add    %ecx,%edx
sub    %edx,%eax
add    $0x41,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @random_ch() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 26
%3 = add nsw i32 %2, 65
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @random_ch() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 26
%3 = trunc i32 %2 to i8
%4 = add nsw i8 %3, 65
ret i8 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateGPIORetentionEnable(void) {
  (*((volatile uint32_t *)(0x400FC010))) |= 0x00000100 | 0x40000000;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateGPIORetentionEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%ecx
or     $0x40000100,%ecx
mov    $0x400fc010,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateGPIORetentionEnable>:
orl    $0x40000100,0x400fc010
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateGPIORetentionEnable() {
%1 = load volatile i32, i32* inttoptr (i64 1074774032 to i32*)
%2 = or i32 %1, 1073742080
store volatile i32 %2, i32* inttoptr (i64 1074774032 to i32*)
%3 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateGPIORetentionEnable() {
%1 = load volatile i32, i32* inttoptr (i64 1074774032 to i32*)
%2 = or i32 %1, 1073742080
store volatile i32 %2, i32* inttoptr (i64 1074774032 to i32*)
%3 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}