xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, double, double, double);
void show(double *a) {
  printf("[%.2lf %.2lf %.2lf %.2lf]\n", a[0], a[1], a[2], a[3]);
}


x86 assembly (clang, -O0):
<show>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x18(%rax),%xmm3
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show>:
movsd  (%rdi),%xmm0
movsd  0x8(%rdi),%xmm1
movsd  0x10(%rdi),%xmm2
movsd  0x18(%rdi),%xmm3
lea    0xed6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"[%.2lf %.2lf %.2lf %.2lf]\0A\00"
define void @show(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 1
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 2
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 3
%14 = load double, double* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), double %5, double %8, double %11, double %14)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"[%.2lf %.2lf %.2lf %.2lf]\0A\00"
define void @show(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = getelementptr inbounds double, double* %0, i64 2
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %0, i64 3
%8 = load double, double* %7
%9 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), double %2, double %4, double %6, double %8)
ret void
}
extern unsigned long mul_32_32(const unsigned long arg1,
                               const unsigned long arg2) {
  int retval;
  asm volatile("mull %2; movl %%edx,%%eax"
               : "=a"(retval)
               : "0"(arg1), "g"(arg2)
               : "dx");
  return retval;
}


x86 assembly (clang, -O0):
<mul_32_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %rcx,-0x20(%rbp)
mull   -0x20(%rbp)
mov    %edx,%eax
mov    %eax,-0x14(%rbp)
movslq -0x14(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i64 @mul_32_32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i64 asm sideeffect "mull $2; movl %edx,%eax", "={ax},0,imr,~{dx},~{dirflag},~{fpsr},~{flags}"(i64 %6, i64 %7)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
ret i64 %11
}

LLVM IR (-O2):
/* Type definitions */
struct lstab {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct lstab *);
void lstab_destroy(struct lstab *lstab) { free(lstab); }


x86 assembly (clang, -O0):
<lstab_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lstab_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.lstab = type { i32 }
define void @lstab_destroy(%struct.lstab* %0) {
%2 = alloca %struct.lstab*
store %struct.lstab* %0, %struct.lstab** %2
%3 = load %struct.lstab*, %struct.lstab** %2
%4 = call i32 @free(%struct.lstab* %3)
ret void
}

LLVM IR (-O2):
%struct.lstab = type { i32 }
define void @lstab_destroy(%struct.lstab* nocapture %0) {
%2 = tail call i32 @free(%struct.lstab* %0)
ret void
}
/* Variables and functions */
char *make_an_rhs_func_name(int /*<<< orphan*/);
int /*<<< orphan*/ rul__net_get_cur_rule_index();
char *rul__gen_get_cur_rhs_func(void) {
  return (make_an_rhs_func_name(rul__net_get_cur_rule_index()));
}


x86 assembly (clang, -O0):
<rul__gen_get_cur_rhs_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rul__net_get_cur_rule_index@plt>
mov    %eax,%edi
call   1040 <make_an_rhs_func_name@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rul__gen_get_cur_rhs_func>:
push   %rax
xor    %eax,%eax
call   1030 <rul__net_get_cur_rule_index@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <make_an_rhs_func_name@plt>

LLVM IR (-O0):
define i8* @rul__gen_get_cur_rhs_func() {
%1 = call i32 (...) @rul__net_get_cur_rule_index()
%2 = call i8* @make_an_rhs_func_name(i32 %1)
ret i8* %2
}

LLVM IR (-O2):
define i8* @rul__gen_get_cur_rhs_func() {
%1 = tail call i32 (...) @rul__net_get_cur_rule_index()
%2 = tail call i8* @make_an_rhs_func_name(i32 %1)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ brc(int, char);
void vpa(int pn) { brc(pn, 'd'); }


x86 assembly (clang, -O0):
<vpa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x64,%esi
call   1030 <brc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpa>:
mov    $0x64,%esi
jmp    1030 <brc@plt>

LLVM IR (-O0):
define void @vpa(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @brc(i32 %3, i8 signext 100)
ret void
}

LLVM IR (-O2):
define void @vpa(i32 %0) {
%2 = tail call i32 @brc(i32 %0, i8 signext 100)
ret void
}
void irq_disable(void) { __asm__ volatile("cli"); }


x86 assembly (clang, -O0):
<irq_disable>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_disable>:
cli
ret

LLVM IR (-O0):
define void @irq_disable() {
ret void
}

LLVM IR (-O2):
define void @irq_disable() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
AX0AX1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((((signed char *)10000000)[x0]) <= (((signed char *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AX0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x989680,%eax
movsbl (%rax,%rcx,1),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jg     114c <AX0AX1+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    1153 <AX0AX1+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AX0AX1>:
movslq %edx,%rax
mov    0x989680(%rax),%dl
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx),%dl
setle  %al
ret

LLVM IR (-O0):
define i32 @AX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i32, i32* %10
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* inttoptr (i64 10000000 to i8*), i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = load i32, i32* %11
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %20, %25
br i1 %26, label %27, label %28
27: ; preds = %6
store i32 1, i32* %7
br label %29
28: ; preds = %6
store i32 0, i32* %7
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %7
ret i32 %30
}

LLVM IR (-O2):
define i32 @AX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8, i8* inttoptr (i64 10000000 to i8*), i64 %7
%9 = load i8, i8* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %10
%12 = load i8, i8* %11
%13 = icmp sle i8 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
int test1(int a, int b) { return (a ^ 2) == 2; }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x2,%eax
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @test1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = xor i32 %5, 2
%7 = icmp eq i32 %6, 2
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @test1(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, size_t);
void *needHugeMemResize(void *, size_t);
void *needHugeZeroedMemResize(void *vp, size_t oldSize, size_t newSize) {
  void *v;
  v = needHugeMemResize(vp, newSize);
  if (newSize > oldSize)
    memset(((char *)v) + oldSize, 0, newSize - oldSize);
  return v;
}


x86 assembly (clang, -O0):
<needHugeZeroedMemResize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <needHugeMemResize@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    116a <needHugeZeroedMemResize+0x4a>
mov    -0x20(%rbp),%rdi
add    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
sub    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<needHugeZeroedMemResize>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r15
mov    %rdx,%rsi
call   1040 <needHugeMemResize@plt>
mov    %rax,%r14
sub    %r15,%rbx
jbe    114b <needHugeZeroedMemResize+0x2b>
mov    %r14,%rdi
add    %r15,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @needHugeZeroedMemResize(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i8* @needHugeMemResize(i8* %8, i64 %9)
store i8* %10, i8** %7
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = icmp ugt i64 %11, %12
br i1 %13, label %14, label %22
14: ; preds = %3
%15 = load i8*, i8** %7
%16 = load i64, i64* %5
%17 = getelementptr inbounds i8, i8* %15, i64 %16
%18 = load i64, i64* %6
%19 = load i64, i64* %5
%20 = sub i64 %18, %19
%21 = call i32 @memset(i8* %17, i32 0, i64 %20)
br label %22
22: ; preds = %14, %3
%23 = load i8*, i8** %7
ret i8* %23
}

LLVM IR (-O2):
define i8* @needHugeZeroedMemResize(i8* %0, i64 %1, i64 %2) {
%4 = tail call i8* @needHugeMemResize(i8* %0, i64 %2)
%5 = icmp ugt i64 %2, %1
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = getelementptr inbounds i8, i8* %4, i64 %1
%8 = sub i64 %2, %1
%9 = tail call i32 @memset(i8* %7, i32 0, i64 %8)
br label %10
10: ; preds = %6, %3
ret i8* %4
}
void fd99(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  p01C:
    goto p01C;
    goto a;
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
a:;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd99>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd99+0x7>

x86 assembly (clang, -O2):
<fd99>:
jmp    1100 <fd99>

LLVM IR (-O0):
define void @fd99(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; preds = %18
br label %18
19: ; No predecessors!
%20 = load i32, i32* %2
%21 = zext i32 %20 to i64
br label %22
22: ; preds = %22, %19
br label %22
23: ; preds = %23
br label %23
24: ; No predecessors!
%25 = load i32, i32* %2
%26 = zext i32 %25 to i64
br label %27
27: ; preds = %27, %24
br label %27
28: ; No predecessors!
%29 = load i32, i32* %2
%30 = zext i32 %29 to i64
br label %31
31: ; preds = %31, %28
br label %31
32: ; preds = %32
br label %32
33: ; No predecessors!
%34 = load i32, i32* %2
%35 = zext i32 %34 to i64
br label %36
36: ; preds = %36, %33
br label %36
37: ; preds = %37
br label %37
38: ; No predecessors!
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
br label %41
41: ; preds = %41, %38
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd99(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void PWMSyncTimeBase(uint32_t ui32Base, uint32_t ui32GenBits) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  ASSERT(!(ui32GenBits & ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008)));
  (*((volatile uint32_t *)(ui32Base + 0x00000004))) = ui32GenBits;
}


x86 assembly (clang, -O0):
<PWMSyncTimeBase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <PWMSyncTimeBase+0x2d>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xfffffff0,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x4,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMSyncTimeBase>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x10,%ebx
setb   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x4(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @PWMSyncTimeBase(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073905664
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073909760
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = and i32 %14, -16
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
%19 = call i32 @ASSERT(i32 %18)
%20 = load i32, i32* %4
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 4
%23 = sext i32 %22 to i64
%24 = inttoptr i64 %23 to i32*
store volatile i32 %20, i32* %24
ret void
}

LLVM IR (-O2):
define void @PWMSyncTimeBase(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073905664
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp ult i32 %1, 16
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 4
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %1, i32* %12
ret void
}
short test_short_1(short a) { return -100; }


x86 assembly (clang, -O0):
<test_short_1>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0xff9c,%ax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_short_1>:
mov    $0xff9c,%ax
ret

LLVM IR (-O0):
define signext i16 @test_short_1(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret i16 -100
}

LLVM IR (-O2):
define signext i16 @test_short_1(i16 signext %0) {
ret i16 -100
}
/* Variables and functions */
int biscSendByte(int);
int biscWaitEvent(int eventCode) {
  if (eventCode < 0 || eventCode > 22)
    return -1;
  if (biscSendByte(158) == -1)
    return -1;
  if (biscSendByte(eventCode) == -1)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<biscWaitEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     112f <biscWaitEvent+0x1f>
cmpl   $0x16,-0x8(%rbp)
jle    113b <biscWaitEvent+0x2b>
movl   $0xffffffff,-0x4(%rbp)
jmp    117e <biscWaitEvent+0x6e>
mov    $0x9e,%edi
call   1030 <biscSendByte@plt>
cmp    $0xffffffff,%eax
jne    115a <biscWaitEvent+0x4a>
movl   $0xffffffff,-0x4(%rbp)
jmp    117e <biscWaitEvent+0x6e>
mov    -0x8(%rbp),%edi
call   1030 <biscSendByte@plt>
cmp    $0xffffffff,%eax
jne    1177 <biscWaitEvent+0x67>
movl   $0xffffffff,-0x4(%rbp)
jmp    117e <biscWaitEvent+0x6e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<biscWaitEvent>:
push   %rbp
push   %rbx
push   %rax
mov    $0xffffffff,%ebx
cmp    $0x16,%edi
ja     113f <biscWaitEvent+0x2f>
mov    %edi,%ebp
mov    $0x9e,%edi
call   1030 <biscSendByte@plt>
cmp    $0xffffffff,%eax
je     113f <biscWaitEvent+0x2f>
mov    %ebp,%edi
call   1030 <biscSendByte@plt>
xor    %ebx,%ebx
cmp    $0xffffffff,%eax
sete   %bl
neg    %ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @biscWaitEvent(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 22
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 -1, i32* %2
br label %20
10: ; preds = %6
%11 = call i32 @biscSendByte(i32 158)
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 -1, i32* %2
br label %20
14: ; preds = %10
%15 = load i32, i32* %3
%16 = call i32 @biscSendByte(i32 %15)
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 -1, i32* %2
br label %20
19: ; preds = %14
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %13, %9
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @biscWaitEvent(i32 %0) {
%2 = icmp ugt i32 %0, 22
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i32 @biscSendByte(i32 158)
%5 = icmp eq i32 %4, -1
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = tail call i32 @biscSendByte(i32 %0)
%8 = icmp eq i32 %7, -1
%9 = sext i1 %8 to i32
br label %10
10: ; preds = %6, %3, %1
%11 = phi i32 [ -1, %1 ], [ -1, %3 ], [ %9, %6 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, int *);
int readpid(char *pidpath) {
  FILE *fp;
  int ret = -1;
  fp = fopen(pidpath, "r");
  if (fp != NULL) {
    fscanf(fp, "%5d", &ret);
    fclose(fp);
  }
  return ret;
}


x86 assembly (clang, -O0):
<readpid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb2(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     117f <readpid+0x4f>
mov    -0x10(%rbp),%rdi
lea    0xe95(%rip),%rsi
lea    -0x14(%rbp),%rdx
call   1040 <fscanf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readpid>:
push   %rbx
sub    $0x10,%rsp
movl   $0xffffffff,0xc(%rsp)
ff
lea    0xebc(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     1173 <readpid+0x43>
mov    %rax,%rbx
lea    0xeaa(%rip),%rsi
lea    0xc(%rsp),%rdx
mov    %rax,%rdi
call   1040 <fscanf@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
mov    0xc(%rsp),%eax
jmp    1178 <readpid+0x48>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
@.str.1 = [4 x i8] c"%5d\00"
define i32 @readpid(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
%4 = alloca i32
store i8* %0, i8** %2
store i32 -1, i32* %4
%5 = load i8*, i8** %2
%6 = call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %3
%7 = load i32*, i32** %3
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %14
9: ; preds = %1
%10 = load i32*, i32** %3
%11 = call i32 @fscanf(i32* %10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %4)
%12 = load i32*, i32** %3
%13 = call i32 @fclose(i32* %12)
br label %14
14: ; preds = %9, %1
%15 = load i32, i32* %4
ret i32 %15
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
@.str.1 = [4 x i8] c"%5d\00"
define i32 @readpid(i8* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 -1, i32* %2
%4 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i32* %4, null
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%8 = call i32 @fclose(i32* %4)
%9 = load i32, i32* %2
br label %10
10: ; preds = %6, %1
%11 = phi i32 [ %9, %6 ], [ -1, %1 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ isdigit(char);
int util_checkdigit(char *str) {
  while (*str) {
    if (!isdigit(*str))
      return -1;
    str++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<util_checkdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115b <util_checkdigit+0x4b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    114a <util_checkdigit+0x3a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1162 <util_checkdigit+0x52>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <util_checkdigit+0xc>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_checkdigit>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
xor    %ebp,%ebp
test   %al,%al
je     114e <util_checkdigit+0x3e>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <isdigit@plt>
test   %eax,%eax
je     1149 <util_checkdigit+0x39>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <util_checkdigit+0x20>
jmp    114e <util_checkdigit+0x3e>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @util_checkdigit(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %14, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i32 @isdigit(i8 signext %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %8
store i32 -1, i32* %2
br label %18
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %4
17: ; preds = %4
store i32 0, i32* %2
br label %18
18: ; preds = %17, %13
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @util_checkdigit(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = tail call i32 @isdigit(i8 signext %8)
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %7, %4, %1
%14 = phi i32 [ 0, %1 ], [ 0, %4 ], [ -1, %7 ]
ret i32 %14
}
/* Variables and functions */
size_t ia32_disasm_size(unsigned char *, unsigned int);
size_t x86_size_disasm(unsigned char *buf, unsigned int buf_len) {
  if (!buf || !buf_len) {
    return (0);
  }
  return ia32_disasm_size(buf, buf_len);
}


x86 assembly (clang, -O0):
<x86_size_disasm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1134 <x86_size_disasm+0x24>
cmpl   $0x0,-0x14(%rbp)
jne    1141 <x86_size_disasm+0x31>
movq   $0x0,-0x8(%rbp)
jmp    1151 <x86_size_disasm+0x41>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <ia32_disasm_size@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86_size_disasm>:
test   %rdi,%rdi
je     111e <x86_size_disasm+0xe>
test   %esi,%esi
je     111e <x86_size_disasm+0xe>
jmp    1030 <ia32_disasm_size@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @x86_size_disasm(i8* %0, i32 %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %8, %2
store i64 0, i64* %3
br label %16
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i32, i32* %5
%15 = call i64 @ia32_disasm_size(i8* %13, i32 %14)
store i64 %15, i64* %3
br label %16
16: ; preds = %12, %11
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @x86_size_disasm(i8* %0, i32 %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i32 %1, 0
%5 = and i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i64 @ia32_disasm_size(i8* %0, i32 %1)
br label %8
8: ; preds = %2, %6
%9 = phi i64 [ %7, %6 ], [ 0, %2 ]
ret i64 %9
}
int main(void) {
  int a[2];
  (a + 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%4 = getelementptr inbounds i32, i32* %3, i64 3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
__attribute__((always_)) void trace_dump_stack(void) {}


x86 assembly (clang, -O0):
<trace_dump_stack>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_dump_stack>:
ret

LLVM IR (-O0):
define void @trace_dump_stack() {
ret void
}

LLVM IR (-O2):
define void @trace_dump_stack() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isprint(char);
int sprintf(char *, char *, unsigned char);
void string_escape_unicode(char c, char *replstr, int *replstr_len, int *op) {
  if (!isprint(c)) {
    *op = 2;
    *replstr_len = sprintf(replstr, "\\u00%02x", (unsigned char)c);
  }
}


x86 assembly (clang, -O0):
<string_escape_unicode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isprint@plt>
cmp    $0x0,%eax
jne    1172 <string_escape_unicode+0x52>
mov    -0x20(%rbp),%rax
movl   $0x2,(%rax)
mov    -0x10(%rbp),%rdi
lea    0xe9f(%rip),%rsi
movzbl -0x1(%rbp),%edx
call   1040 <sprintf@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_escape_unicode>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %edi,%ebp
call   1030 <isprint@plt>
test   %eax,%eax
jne    1157 <string_escape_unicode+0x37>
movl   $0x2,(%rbx)
movzbl %bpl,%edx
lea    0xeb4(%rip),%rsi
mov    %r15,%rdi
call   1040 <sprintf@plt>
mov    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"\\u00%02x\00"
define void @string_escape_unicode(i8 signext %0, i8* %1, i32* %2, i32* %3) {
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i32*
store i8 %0, i8* %5
store i8* %1, i8** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i8, i8* %5
%10 = call i32 @isprint(i8 signext %9)
%11 = icmp ne i32 %10, 0
br i1 %11, label %18, label %12
12: ; preds = %4
%13 = load i32*, i32** %8
store i32 2, i32* %13
%14 = load i8*, i8** %6
%15 = load i8, i8* %5
%16 = call i32 @sprintf(i8* %14, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 zeroext %15)
%17 = load i32*, i32** %7
store i32 %16, i32* %17
br label %18
18: ; preds = %12, %4
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"\\u00%02x\00"
define void @string_escape_unicode(i8 signext %0, i8* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = tail call i32 @isprint(i8 signext %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
store i32 2, i32* %3
%8 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 zeroext %0)
store i32 %8, i32* %2
br label %9
9: ; preds = %7, %4
ret void
}
void egCollidersDeInit(void) {}


x86 assembly (clang, -O0):
<egCollidersDeInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<egCollidersDeInit>:
ret

LLVM IR (-O0):
define void @egCollidersDeInit() {
ret void
}

LLVM IR (-O2):
define void @egCollidersDeInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MixerStatusHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void MixerStatusUpdated() { UAVObjUpdated(MixerStatusHandle()); }


x86 assembly (clang, -O0):
<MixerStatusUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <MixerStatusHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MixerStatusUpdated>:
push   %rax
xor    %eax,%eax
call   1040 <MixerStatusHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @MixerStatusUpdated() {
%1 = call i32 (...) @MixerStatusHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @MixerStatusUpdated() {
%1 = tail call i32 (...) @MixerStatusHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Type definitions */
struct tree_node {
  int dummy;
};

/* Variables and functions */
struct tree_node *rebuild_tree_aux(size_t, int *, size_t, int *,
                                   int /*<<< orphan*/, size_t,
                                   int /*<<< orphan*/, size_t);
struct tree_node *rebuild_tree(size_t io_sz, int in_order[io_sz], size_t po_sz,
                               int pre_order[po_sz]) {
  return rebuild_tree_aux(io_sz, in_order, po_sz, pre_order, 0, io_sz, 0,
                          po_sz);
}


x86 assembly (clang, -O0):
<rebuild_tree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%r9
mov    -0x18(%rbp),%rax
xor    %r8d,%r8d
movl   $0x0,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <rebuild_tree_aux@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rebuild_tree>:
push   %rax
xor    %r8d,%r8d
mov    %rdi,%r9
push   %rdx
push   $0x0
call   1030 <rebuild_tree_aux@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.tree_node = type { i32 }
define %struct.tree_node* @rebuild_tree(i64 %0, i32* %1, i64 %2, i32* %3) {
%5 = alloca i64
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
store i64 %0, i64* %5
store i32* %1, i32** %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = load i64, i64* %5
%10 = load i64, i64* %7
%11 = load i64, i64* %5
%12 = load i32*, i32** %6
%13 = load i64, i64* %7
%14 = load i32*, i32** %8
%15 = load i64, i64* %5
%16 = load i64, i64* %7
%17 = call %struct.tree_node* @rebuild_tree_aux(i64 %11, i32* %12, i64 %13, i32* %14, i32 0, i64 %15, i32 0, i64 %16)
ret %struct.tree_node* %17
}

LLVM IR (-O2):
%struct.tree_node = type { i32 }
define %struct.tree_node* @rebuild_tree(i64 %0, i32* %1, i64 %2, i32* %3) {
%5 = tail call %struct.tree_node* @rebuild_tree_aux(i64 %0, i32* %1, i64 %2, i32* %3, i32 0, i64 %0, i32 0, i64 %2)
ret %struct.tree_node* %5
}
int __ocl_convert_int_int(int src) { return (int)src; }


x86 assembly (clang, -O0):
<__ocl_convert_int_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_convert_int_int>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @__ocl_convert_int_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @__ocl_convert_int_int(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ my_putchar(char);
void my_putstr(char *str) {
  int i;
  i = 0;
  while (str[i] != '\0')
    my_putchar(str[i++]);
}


x86 assembly (clang, -O0):
<my_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1158 <my_putstr+0x48>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <my_putchar@plt>
jmp    1123 <my_putstr+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_putstr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <my_putstr+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <my_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <my_putstr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @my_putstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
%16 = sext i32 %14 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
%18 = load i8, i8* %17
%19 = call i32 @my_putchar(i8 signext %18)
br label %4
20: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @my_putstr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = add nuw i64 %5, 1
%8 = tail call i32 @my_putchar(i8 signext %6)
%9 = getelementptr inbounds i8, i8* %0, i64 %7
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
double Uglue(double, double, double);
double dPhi_dPhi_dPhi_Uglue(double Phi, double T, double mu) {
  return Uglue(Phi, T, mu);
}


x86 assembly (clang, -O0):
<dPhi_dPhi_dPhi_Uglue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <Uglue@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dPhi_dPhi_dPhi_Uglue>:
jmp    1030 <Uglue@plt>

LLVM IR (-O0):
define double @dPhi_dPhi_dPhi_Uglue(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @Uglue(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @dPhi_dPhi_dPhi_Uglue(double %0, double %1, double %2) {
%4 = tail call double @Uglue(double %0, double %1, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void test_echo(char *string) { printf("%s\n", string); }


x86 assembly (clang, -O0):
<test_echo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_echo>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @test_echo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @test_echo(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void _Noreturn i() { exit(0); }


x86 assembly (clang, -O0):
<i>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<i>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @i() {
unreachable
}

LLVM IR (-O2):
define void @i() {
tail call void @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ block_copy(int /*<<< orphan*/ *const,
                              int /*<<< orphan*/ *const, int const);
int /*<<< orphan*/ block_zero(int /*<<< orphan*/ *const);
int /*<<< orphan*/ mmx_idct(int /*<<< orphan*/ *const);
void mpeg2_idct_copy_mmx(int16_t *const block, uint8_t *const dest,
                         const int stride) {
  mmx_idct(block);
  block_copy(block, dest, stride);
  block_zero(block);
}


x86 assembly (clang, -O0):
<mpeg2_idct_copy_mmx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mmx_idct@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <block_copy@plt>
mov    -0x8(%rbp),%rdi
call   1050 <block_zero@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpeg2_idct_copy_mmx>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
call   1030 <mmx_idct@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1040 <block_copy@plt>
mov    %rbp,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <block_zero@plt>

LLVM IR (-O0):
define void @mpeg2_idct_copy_mmx(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = call i32 @mmx_idct(i32* %7)
%9 = load i32*, i32** %4
%10 = load i32*, i32** %5
%11 = load i32, i32* %6
%12 = call i32 @block_copy(i32* %9, i32* %10, i32 %11)
%13 = load i32*, i32** %4
%14 = call i32 @block_zero(i32* %13)
ret void
}

LLVM IR (-O2):
define void @mpeg2_idct_copy_mmx(i32* %0, i32* %1, i32 %2) {
%4 = tail call i32 @mmx_idct(i32* %0)
%5 = tail call i32 @block_copy(i32* %0, i32* %1, i32 %2)
%6 = tail call i32 @block_zero(i32* %0)
ret void
}
int finite(double x) {
  static const unsigned short mexp = 0x7f80;
  return ((*((short *)&x) & mexp) != mexp);
}


x86 assembly (clang, -O0):
<finite>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movswl -0x8(%rbp),%eax
and    $0x7f80,%eax
cmp    $0x7f80,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<finite>:
movq   %xmm0,%rcx
not    %ecx
xor    %eax,%eax
test   $0x7f80,%ecx
setne  %al
ret

LLVM IR (-O0):
@finite.mexp = internal constant i16 32640
define i32 @finite(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = bitcast double* %2 to i16*
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 32640
%7 = icmp ne i32 %6, 32640
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @finite(double %0) {
%2 = bitcast double %0 to i64
%3 = and i64 %2, 32640
%4 = icmp ne i64 %3, 32640
%5 = zext i1 %4 to i32
ret i32 %5
}
void vtime_account_system(struct task_struct *tsk) {}


x86 assembly (clang, -O0):
<vtime_account_system>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vtime_account_system>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @vtime_account_system(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @vtime_account_system(%struct.task_struct* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  double a = 456.23;
  int b = 100;
  b = (int)a;
  printf("%d\n", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movl   $0x64,-0x14(%rbp)
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1c8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca i32
store i32 0, i32* %1
store double 4.562300e+02, double* %2
store i32 100, i32* %3
%4 = load double, double* %2
%5 = fptosi double %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 456)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ wDateTimePush(char, int /*<<< orphan*/);
int /*<<< orphan*/ wStackPopDateTime();
void wBuiltinMonthName() { wDateTimePush('M', wStackPopDateTime()); }


x86 assembly (clang, -O0):
<wBuiltinMonthName>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <wStackPopDateTime@plt>
mov    %eax,%esi
mov    $0x4d,%edi
call   1030 <wDateTimePush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wBuiltinMonthName>:
push   %rax
xor    %eax,%eax
call   1040 <wStackPopDateTime@plt>
mov    $0x4d,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <wDateTimePush@plt>

LLVM IR (-O0):
define void @wBuiltinMonthName() {
%1 = call i32 (...) @wStackPopDateTime()
%2 = call i32 @wDateTimePush(i8 signext 77, i32 %1)
ret void
}

LLVM IR (-O2):
define void @wBuiltinMonthName() {
%1 = tail call i32 (...) @wStackPopDateTime()
%2 = tail call i32 @wDateTimePush(i8 signext 77, i32 %1)
ret void
}
void *UA_atomic_xchg(void *volatile *addr, void *newptr) {
  void *old = *addr;
  *addr = newptr;
  return old;
}


x86 assembly (clang, -O0):
<UA_atomic_xchg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UA_atomic_xchg>:
mov    (%rdi),%rax
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define i8* @UA_atomic_xchg(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8**, i8*** %3
%7 = load volatile i8*, i8** %6
store i8* %7, i8** %5
%8 = load i8*, i8** %4
%9 = load i8**, i8*** %3
store volatile i8* %8, i8** %9
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define i8* @UA_atomic_xchg(i8** %0, i8* %1) {
%3 = load volatile i8*, i8** %0
store volatile i8* %1, i8** %0
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ test9_0();
int /*<<< orphan*/ test9_1();
int /*<<< orphan*/ test9_2();
int /*<<< orphan*/ write(int, char *, int);
void test9() {
  write(1, "\nTEST 9: UNIX signales the second:\n\n",
        sizeof("\nTEST 9: UNIX signales the second:\n\n") - 1);
  test9_0();
  test9_1();
  test9_2();
}


x86 assembly (clang, -O0):
<test9>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xeb0(%rip),%rsi
mov    $0x24,%edx
call   1030 <write@plt>
mov    $0x0,%al
call   1060 <test9_0@plt>
mov    $0x0,%al
call   1040 <test9_1@plt>
mov    $0x0,%al
call   1050 <test9_2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test9>:
push   %rax
lea    0xeb8(%rip),%rsi
mov    $0x1,%edi
mov    $0x24,%edx
call   1030 <write@plt>
xor    %eax,%eax
call   1060 <test9_0@plt>
xor    %eax,%eax
call   1040 <test9_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <test9_2@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"\0ATEST 9: UNIX signales the second:\0A\0A\00"
define void @test9() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 36)
%2 = call i32 (...) @test9_0()
%3 = call i32 (...) @test9_1()
%4 = call i32 (...) @test9_2()
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"\0ATEST 9: UNIX signales the second:\0A\0A\00"
define void @test9() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 36)
%2 = tail call i32 (...) @test9_0()
%3 = tail call i32 (...) @test9_1()
%4 = tail call i32 (...) @test9_2()
ret void
}
int test_imm_7Dint64_lowword_reg(long long val) {
  return ((val) & (0x7D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Dint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x7d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Dint64_lowword_reg>:
test   $0x7d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Dint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 125
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_7Dint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 125
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int cpu_dump_cpuinfo(void) { return 0; }


x86 assembly (clang, -O0):
<cpu_dump_cpuinfo>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_dump_cpuinfo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cpu_dump_cpuinfo() {
ret i32 0
}

LLVM IR (-O2):
define i32 @cpu_dump_cpuinfo() {
ret i32 0
}
__attribute__((weak)) void midi_clock_pos_reset(void) {}


x86 assembly (clang, -O0):
<midi_clock_pos_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<midi_clock_pos_reset>:
ret

LLVM IR (-O0):
define weak void @midi_clock_pos_reset() {
ret void
}

LLVM IR (-O2):
define weak void @midi_clock_pos_reset() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void fprint_mul(FILE *stream) {
  fprintf(stream, "MUL   AB                        ");
}


x86 assembly (clang, -O0):
<fprint_mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_mul>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x20,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"MUL AB \00"
define void @fprint_mul(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"MUL AB \00"
define void @fprint_mul(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 32, i64 1, i32* %0)
ret void
}