xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ do_cmd_knowledge_notes();
int /*<<< orphan*/ screen_load();
int /*<<< orphan*/ screen_save();
void death_notes(void *unused, const char *title) {
  (void)unused;
  (void)title;
  screen_save();
  do_cmd_knowledge_notes();
  screen_load();
}


x86 assembly (clang, -O0):
<death_notes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <screen_save@plt>
mov    $0x0,%al
call   1030 <do_cmd_knowledge_notes@plt>
mov    $0x0,%al
call   1040 <screen_load@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<death_notes>:
push   %rax
xor    %eax,%eax
call   1050 <screen_save@plt>
xor    %eax,%eax
call   1030 <do_cmd_knowledge_notes@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <screen_load@plt>

LLVM IR (-O0):
define void @death_notes(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (...) @screen_save()
%8 = call i32 (...) @do_cmd_knowledge_notes()
%9 = call i32 (...) @screen_load()
ret void
}

LLVM IR (-O2):
define void @death_notes(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @screen_save()
%4 = tail call i32 (...) @do_cmd_knowledge_notes()
%5 = tail call i32 (...) @screen_load()
ret void
}
void ARGBRotate180() {}


x86 assembly (clang, -O0):
<ARGBRotate180>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBRotate180>:
ret

LLVM IR (-O0):
define void @ARGBRotate180() {
ret void
}

LLVM IR (-O2):
define void @ARGBRotate180() {
ret void
}
void auroraL2_flush_all(void) {}


x86 assembly (clang, -O0):
<auroraL2_flush_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<auroraL2_flush_all>:
ret

LLVM IR (-O0):
define void @auroraL2_flush_all() {
ret void
}

LLVM IR (-O2):
define void @auroraL2_flush_all() {
ret void
}
/* Variables and functions */
int tb_init_file(char *);
int tb_init(void) { return tb_init_file("/dev/tty"); }


x86 assembly (clang, -O0):
<tb_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <tb_init_file@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tb_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <tb_init_file@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"/dev/tty\00"
define i32 @tb_init() {
%1 = call i32 @tb_init_file(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [9 x i8] c"/dev/tty\00"
define i32 @tb_init() {
%1 = tail call i32 @tb_init_file(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
int isValidBackground(char *input) {
  int i = 0;
  for (i = 0; input[i] != '\0'; i++) {
    if (input[i] == '&')
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isValidBackground>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115f <isValidBackground+0x5f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x26,%eax
jne    114c <isValidBackground+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    1166 <isValidBackground+0x66>
jmp    1151 <isValidBackground+0x51>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1116 <isValidBackground+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isValidBackground>:
movzbl (%rdi),%eax
test   %al,%al
je     1111 <isValidBackground+0x11>
cmp    $0x26,%al
je     1114 <isValidBackground+0x14>
add    $0x1,%rdi
jmp    1100 <isValidBackground>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isValidBackground(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
store i32 0, i32* %4
br label %5
5: ; preds = %23, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 38
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %2
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %5
store i32 0, i32* %2
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @isValidBackground(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ %7, %6 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %9
i8 38, label %8
]
6: ; preds = %2
%7 = add nuw i64 %3, 1
br label %2
8: ; preds = %2
br label %9
9: ; preds = %2, %8
%10 = phi i32 [ 1, %8 ], [ 0, %2 ]
ret i32 %10
}
int uncompress2(unsigned char **buffer) {
  int _c;
  int num = 0;
  unsigned char *p = *buffer;
  do {
    _c = (int)((unsigned char)*p++);
    num <<= 7;
    num |= _c & 127;
    if (!num)
      break;
  } while (_c & 128);
  *buffer = p;
  return num;
}


x86 assembly (clang, -O0):
<uncompress2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x7,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0x7f,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1153 <uncompress2+0x53>
jmp    1169 <uncompress2+0x69>
jmp    1158 <uncompress2+0x58>
mov    -0xc(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    111a <uncompress2+0x1a>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uncompress2>:
mov    (%rdi),%rcx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rcx),%edx
add    $0x1,%rcx
mov    %eax,%esi
shl    $0x7,%esi
mov    %edx,%eax
and    $0x7f,%eax
or     %esi,%eax
je     112a <uncompress2+0x2a>
and    $0xffffff80,%edx
jne    1110 <uncompress2+0x10>
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @uncompress2(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i8** %0, i8*** %2
store i32 0, i32* %4
%6 = load i8**, i8*** %2
%7 = load i8*, i8** %6
store i8* %7, i8** %5
br label %8
8: ; preds = %23, %1
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %5
%11 = load i8, i8* %9
%12 = zext i8 %11 to i32
store i32 %12, i32* %3
%13 = load i32, i32* %4
%14 = shl i32 %13, 7
store i32 %14, i32* %4
%15 = load i32, i32* %3
%16 = and i32 %15, 127
%17 = load i32, i32* %4
%18 = or i32 %17, %16
store i32 %18, i32* %4
%19 = load i32, i32* %4
%20 = icmp ne i32 %19, 0
br i1 %20, label %22, label %21
21: ; preds = %8
br label %27
22: ; preds = %8
br label %23
23: ; preds = %22
%24 = load i32, i32* %3
%25 = and i32 %24, 128
%26 = icmp ne i32 %25, 0
br i1 %26, label %8, label %27
27: ; preds = %23, %21
%28 = load i8*, i8** %5
%29 = load i8**, i8*** %2
store i8* %28, i8** %29
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @uncompress2(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ 0, %1 ], [ %11, %3 ]
%5 = phi i8* [ %2, %1 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = zext i8 %7 to i32
%9 = shl i32 %4, 7
%10 = and i32 %8, 127
%11 = or i32 %10, %9
%12 = icmp eq i32 %11, 0
%13 = and i32 %8, 128
%14 = icmp eq i32 %13, 0
%15 = select i1 %12, i1 true, i1 %14
br i1 %15, label %16, label %3
16: ; preds = %3
store i8* %6, i8** %0
ret i32 %11
}
void system_graphics_shutdown(void) { return; }


x86 assembly (clang, -O0):
<system_graphics_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_graphics_shutdown>:
ret

LLVM IR (-O0):
define void @system_graphics_shutdown() {
ret void
}

LLVM IR (-O2):
define void @system_graphics_shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ diff(double *, double *, double *);
double mag(double *);
double dist(double v1[3], double v2[3]) {
  double diff_vector[3];
  diff(v1, v2, diff_vector);
  return mag(diff_vector);
}


x86 assembly (clang, -O0):
<dist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x30(%rbp),%rdx
call   1040 <diff@plt>
lea    -0x30(%rbp),%rdi
call   1030 <mag@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdx
call   1040 <diff@plt>
mov    %rbx,%rdi
call   1030 <mag@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @dist(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca [3 x double]
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = load double*, double** %4
%8 = getelementptr inbounds [3 x double], [3 x double]* %5, i64 0, i64 0
%9 = call i32 @diff(double* %6, double* %7, double* %8)
%10 = getelementptr inbounds [3 x double], [3 x double]* %5, i64 0, i64 0
%11 = call double @mag(double* %10)
ret double %11
}

LLVM IR (-O2):
define double @dist(double* %0, double* %1) {
%3 = alloca [3 x double]
%4 = bitcast [3 x double]* %3 to i8*
%5 = getelementptr inbounds [3 x double], [3 x double]* %3, i64 0, i64 0
%6 = call i32 @diff(double* %0, double* %1, double* %5)
%7 = call double @mag(double* %5)
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void plat_irq_dispatch(void *frame) { printf("interrupt incoming\n"); }


x86 assembly (clang, -O0):
<plat_irq_dispatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plat_irq_dispatch>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"interrupt incoming\0A\00"
define void @plat_irq_dispatch(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [19 x i8] c"interrupt incoming\00"
define void @plat_irq_dispatch(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret void
}
int test2(long long n) {
  if (n < 2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x2,-0x10(%rbp)
jge    111f <test2+0x1f>
movl   $0x1,-0x4(%rbp)
jmp    1126 <test2+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
xor    %eax,%eax
cmp    $0x2,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @test2(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp slt i64 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @test2(i64 %0) {
%2 = icmp slt i64 %0, 2
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ absolutelongx();
int /*<<< orphan*/ adc8(int /*<<< orphan*/);
int /*<<< orphan*/ readmem65816(int /*<<< orphan*/);
void adcLongx8(void) { adc8(readmem65816(absolutelongx())); }


x86 assembly (clang, -O0):
<adcLongx8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <absolutelongx@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
call   1030 <adc8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adcLongx8>:
push   %rax
xor    %eax,%eax
call   1040 <absolutelongx@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <adc8@plt>

LLVM IR (-O0):
define void @adcLongx8() {
%1 = call i32 (...) @absolutelongx()
%2 = call i32 @readmem65816(i32 %1)
%3 = call i32 @adc8(i32 %2)
ret void
}

LLVM IR (-O2):
define void @adcLongx8() {
%1 = tail call i32 (...) @absolutelongx()
%2 = tail call i32 @readmem65816(i32 %1)
%3 = tail call i32 @adc8(i32 %2)
ret void
}
/* Variables and functions */
int BIT(int);
int wpa_key_mgmt_sha256(int akm) { return !!(akm & (BIT(8) | BIT(7))); }


x86 assembly (clang, -O0):
<wpa_key_mgmt_sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x8,%edi
call   1030 <BIT@plt>
mov    %eax,-0xc(%rbp)
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    -0xc(%rbp),%ecx
mov    %eax,%edx
mov    -0x8(%rbp),%eax
or     %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_key_mgmt_sha256>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x8,%edi
call   1030 <BIT@plt>
mov    %eax,%ebp
mov    $0x7,%edi
call   1030 <BIT@plt>
or     %ebp,%eax
xor    %ecx,%ecx
test   %ebx,%eax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @BIT(i32 8)
%5 = call i32 @BIT(i32 7)
%6 = or i32 %4, %5
%7 = and i32 %3, %6
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = tail call i32 @BIT(i32 8)
%3 = tail call i32 @BIT(i32 7)
%4 = or i32 %3, %2
%5 = and i32 %4, %0
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
double pow(double, double);
float fe_melinv(float x___0) {
  double tmp;
  {
    tmp = pow(10.0, (double)x___0 / 2595.0);
    return ((float)(700.0 * ((double)((float)tmp) - 1.0)));
  }
}


x86 assembly (clang, -O0):
<fe_melinv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeea(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xed6(%rip),%xmm0
call   1030 <pow@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeaf(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xe9b(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fe_melinv>:
push   %rax
cvtss2sd %xmm0,%xmm1
divsd  0xee3(%rip),%xmm1
movsd  0xee3(%rip),%xmm0
call   1030 <pow@plt>
cvtsd2ss %xmm0,%xmm0
cvtss2sd %xmm0,%xmm0
addsd  0xed6(%rip),%xmm0
mulsd  0xed6(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fe_melinv(float %0) {
%2 = alloca float
%3 = alloca double
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fdiv double %5, 2.595000e+03
%7 = call double @pow(double 1.000000e+01, double %6)
store double %7, double* %3
%8 = load double, double* %3
%9 = fptrunc double %8 to float
%10 = fpext float %9 to double
%11 = fsub double %10, 1.000000e+00
%12 = fmul double 7.000000e+02, %11
%13 = fptrunc double %12 to float
ret float %13
}

LLVM IR (-O2):
define float @fe_melinv(float %0) {
%2 = fpext float %0 to double
%3 = fdiv double %2, 2.595000e+03
%4 = tail call double @pow(double 1.000000e+01, double %3)
%5 = fptrunc double %4 to float
%6 = fpext float %5 to double
%7 = fadd double %6, -1.000000e+00
%8 = fmul double %7, 7.000000e+02
%9 = fptrunc double %8 to float
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ _glio_delay(int);
void _glio_shmem_wait(long *addr, long value) {
  while (*(volatile long *)addr == value)
    _glio_delay(1000);
  return;
}


x86 assembly (clang, -O0):
<_glio_shmem_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
cmp    -0x10(%rbp),%rax
jne    1140 <_glio_shmem_wait+0x30>
mov    $0x3e8,%edi
call   1030 <_glio_delay@plt>
jmp    1120 <_glio_shmem_wait+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_glio_shmem_wait>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%rax
cmp    %rsi,%rax
jne    1142 <_glio_shmem_wait+0x32>
mov    %rsi,%r14
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    $0x3e8,%edi
call   1030 <_glio_delay@plt>
mov    (%rbx),%rax
cmp    %r14,%rax
je     1130 <_glio_shmem_wait+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @_glio_shmem_wait(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
br label %5
5: ; preds = %10, %2
%6 = load i64*, i64** %3
%7 = load volatile i64, i64* %6
%8 = load i64, i64* %4
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %5
%11 = call i32 @_glio_delay(i32 1000)
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @_glio_shmem_wait(i64* %0, i64 %1) {
%3 = load volatile i64, i64* %0
%4 = icmp eq i64 %3, %1
br i1 %4, label %5, label %9
5: ; preds = %2, %5
%6 = tail call i32 @_glio_delay(i32 1000)
%7 = load volatile i64, i64* %0
%8 = icmp eq i64 %7, %1
br i1 %8, label %5, label %9
9: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ AUTHORITY_KEYID;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ AUTHORITY_KEYID_it;
AUTHORITY_KEYID *AUTHORITY_KEYID_new(void) {
  return (AUTHORITY_KEYID *)ASN1_item_new(&AUTHORITY_KEYID_it);
}


x86 assembly (clang, -O0):
<AUTHORITY_KEYID_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AUTHORITY_KEYID_new>:
mov    0x2ed1(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@AUTHORITY_KEYID_it = global i32 0
define i32* @AUTHORITY_KEYID_new() {
%1 = call i64 @ASN1_item_new(i32* @AUTHORITY_KEYID_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@AUTHORITY_KEYID_it = global i32 0
define i32* @AUTHORITY_KEYID_new() {
%1 = tail call i64 @ASN1_item_new(i32* @AUTHORITY_KEYID_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
int test_imm_37int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x37 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_37int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x37,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_37int64_midword_mem>:
testb  $0x37,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_37int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 55
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_37int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 3604480
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void testClosureBFrV(void (*closure)(char, float), char a1, float a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureBFrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x9(%rbp),%cl
movss  -0x10(%rbp),%xmm0
movsbl %cl,%edi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureBFrV>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureBFrV(void (i8, float)* %0, i8 signext %1, float %2) {
%4 = alloca void (i8, float)*
%5 = alloca i8
%6 = alloca float
store void (i8, float)* %0, void (i8, float)** %4
store i8 %1, i8* %5
store float %2, float* %6
%7 = load void (i8, float)*, void (i8, float)** %4
%8 = load i8, i8* %5
%9 = load float, float* %6
ret void
}

LLVM IR (-O2):
define void @testClosureBFrV(void (i8, float)* nocapture %0, i8 signext %1, float %2) {
tail call void %0(i8 signext %1, float %2)
ret void
}
void foo787() {}


x86 assembly (clang, -O0):
<foo787>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo787>:
ret

LLVM IR (-O0):
define void @foo787() {
ret void
}

LLVM IR (-O2):
define void @foo787() {
ret void
}
int d_bgt_mr2(double *a1, double a2) { return !(__builtin_isgreater(*a1, a2)); }


x86 assembly (clang, -O0):
<d_bgt_mr2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd -0x10(%rbp),%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_bgt_mr2>:
movsd  (%rdi),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setbe  %al
ret

LLVM IR (-O0):
define i32 @d_bgt_mr2(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = load double, double* %4
%8 = fcmp ogt double %6, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @d_bgt_mr2(double* nocapture %0, double %1) {
%3 = load double, double* %0
%4 = fcmp ule double %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
scalar_t__ getfname(char *, char *, int);
int /*<<< orphan*/ showfile(char *);
int /*<<< orphan*/ strcpy(char *, char *);
void subfunc2(void) {
  char fname[256];
  strcpy(fname, "demos\\tui.c");
  if (getfname("File to browse:", fname, 50))
    showfile(fname);
}


x86 assembly (clang, -O0):
<subfunc2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xeb7(%rip),%rsi
call   1040 <strcpy@plt>
lea    -0x100(%rbp),%rsi
lea    0xeb0(%rip),%rdi
mov    $0x32,%edx
call   1050 <getfname@plt>
cmp    $0x0,%rax
je     117c <subfunc2+0x4c>
lea    -0x100(%rbp),%rdi
call   1030 <showfile@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subfunc2>:
push   %rbx
sub    $0x100,%rsp
lea    0xec1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <strcpy@plt>
lea    0xebb(%rip),%rdi
mov    %rbx,%rsi
mov    $0x32,%edx
call   1050 <getfname@plt>
test   %rax,%rax
je     116b <subfunc2+0x3b>
mov    %rsp,%rdi
call   1030 <showfile@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"demos\\tui.c\00"
@.str.1 = [16 x i8] c"File to browse:\00"
define void @subfunc2() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i64 @getfname(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %4, i32 50)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%9 = call i32 @showfile(i8* %8)
br label %10
10: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"demos\\tui.c\00"
@.str.1 = [16 x i8] c"File to browse:\00"
define void @subfunc2() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = call i64 @getfname(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %2, i32 50)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = call i32 @showfile(i8* %2)
br label %8
8: ; preds = %6, %0
ret void
}
void chx_spin_lock(struct chx_spinlock *lk) { (void)lk; }


x86 assembly (clang, -O0):
<chx_spin_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chx_spin_lock>:
ret

LLVM IR (-O0):
%struct.chx_spinlock = type opaque
define void @chx_spin_lock(%struct.chx_spinlock* %0) {
%2 = alloca %struct.chx_spinlock*
store %struct.chx_spinlock* %0, %struct.chx_spinlock** %2
%3 = load %struct.chx_spinlock*, %struct.chx_spinlock** %2
ret void
}

LLVM IR (-O2):
%struct.chx_spinlock = type opaque
define void @chx_spin_lock(%struct.chx_spinlock* nocapture %0) {
ret void
}
/* Variables and functions */
int call(int, int);
int main(int argc, char **argv) {
  int a = call(argc, argc + 1);
  return a == 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%esi
add    $0x1,%esi
call   1030 <call@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x1(%rdi),%esi
call   1030 <call@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 1
%10 = call i32 @call(i32 %7, i32 %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = add nsw i32 %0, 1
%4 = tail call i32 @call(i32 %0, i32 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t mp2vseq_get_aspect(const uint8_t *p_mp2vseq) {
  return (p_mp2vseq[7] >> 4);
}


x86 assembly (clang, -O0):
<mp2vseq_get_aspect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1c(%rax),%eax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vseq_get_aspect>:
mov    0x1c(%rdi),%eax
sar    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @mp2vseq_get_aspect(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 7
%5 = load i32, i32* %4
%6 = ashr i32 %5, 4
ret i32 %6
}

LLVM IR (-O2):
define i32 @mp2vseq_get_aspect(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 7
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
ret i32 %4
}
/* Type definitions */
struct imap4_message {
  int dummy;
};

/* Variables and functions */
struct imap4_message *_default_storage_first_message() {
  return NULL;
}


x86 assembly (clang, -O0):
<_default_storage_first_message>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_default_storage_first_message>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.imap4_message = type { i32 }
define %struct.imap4_message* @_default_storage_first_message() {
ret %struct.imap4_message* null
}

LLVM IR (-O2):
%struct.imap4_message = type { i32 }
define noalias %struct.imap4_message* @_default_storage_first_message() {
ret %struct.imap4_message* null
}
int test_imm_6Buint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x6B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Buint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x6b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Buint64_midword_mem>:
testb  $0x6b,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Buint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 107
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Buint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7012352
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
char *XBaseFontNameListOfFontSet() {}


x86 assembly (clang, -O0):
<XBaseFontNameListOfFontSet>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XBaseFontNameListOfFontSet>:
ret

LLVM IR (-O0):
define i8* @XBaseFontNameListOfFontSet() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define noalias i8* @XBaseFontNameListOfFontSet() {
ret i8* undef
}
/* Variables and functions */
int strlen(char *);
void stnline(char *str) {
  int length;
  length = strlen(str);
  str[length - 1] = '\0';
}


x86 assembly (clang, -O0):
<stnline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stnline>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @stnline(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
store i8 0, i8* %10
ret void
}

LLVM IR (-O2):
define void @stnline(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 0, i8* %5
ret void
}
int func1() { return 42; }


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @func1() {
ret i32 42
}

LLVM IR (-O2):
define i32 @func1() {
ret i32 42
}
void gtk_tree_model_iter_children() {}


x86 assembly (clang, -O0):
<gtk_tree_model_iter_children>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_iter_children>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_iter_children() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_iter_children() {
ret void
}
void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr,
                      unsigned long pfn) {}


x86 assembly (clang, -O0):
<flush_cache_page>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_cache_page>:
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define void @flush_cache_page(%struct.vm_area_struct* %0, i64 %1, i64 %2) {
%4 = alloca %struct.vm_area_struct*
%5 = alloca i64
%6 = alloca i64
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define void @flush_cache_page(%struct.vm_area_struct* nocapture %0, i64 %1, i64 %2) {
ret void
}
void GPIODMATriggerDisable(unsigned long ulPort, unsigned char ucPins) {
  ;
  (*((volatile unsigned long *)(ulPort + 0x00000534))) &= (~ucPins);
}


x86 assembly (clang, -O0):
<GPIODMATriggerDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x534(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x534(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIODMATriggerDisable>:
mov    %esi,%eax
not    %rax
and    %rax,0x534(%rdi)
ret

LLVM IR (-O0):
define void @GPIODMATriggerDisable(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = xor i32 %6, -1
%8 = sext i32 %7 to i64
%9 = load i64, i64* %3
%10 = add i64 %9, 1332
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}

LLVM IR (-O2):
define void @GPIODMATriggerDisable(i64 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i64
%4 = xor i64 %3, -1
%5 = add i64 %0, 1332
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = and i64 %7, %4
store volatile i64 %8, i64* %6
ret void
}
/* Type definitions */
struct nlmsghdr {
  int dummy;
};

/* Variables and functions */
int addattr_l(struct nlmsghdr *, int, int, int /*<<< orphan*/ *,
              int /*<<< orphan*/);
int addattr(struct nlmsghdr *n, int maxlen, int type) {
  return addattr_l(n, maxlen, type, NULL, 0);
}


x86 assembly (clang, -O0):
<addattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
call   1030 <addattr_l@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addattr>:
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <addattr_l@plt>

LLVM IR (-O0):
%struct.nlmsghdr = type { i32 }
define i32 @addattr(%struct.nlmsghdr* %0, i32 %1, i32 %2) {
%4 = alloca %struct.nlmsghdr*
%5 = alloca i32
%6 = alloca i32
store %struct.nlmsghdr* %0, %struct.nlmsghdr** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.nlmsghdr*, %struct.nlmsghdr** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @addattr_l(%struct.nlmsghdr* %7, i32 %8, i32 %9, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.nlmsghdr = type { i32 }
define i32 @addattr(%struct.nlmsghdr* %0, i32 %1, i32 %2) {
%4 = tail call i32 @addattr_l(%struct.nlmsghdr* %0, i32 %1, i32 %2, i32* null, i32 0)
ret i32 %4
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t randomInteger(const unsigned short *globalCount) {
  uint16_t retVal = 0;
  switch (*globalCount) {
  case 0:
    retVal = 0x0FF1;
    break;
  case 1:
    retVal = 0x0FE2;
    break;
  case 2:
    retVal = 0x0FD3;
    break;
  case 3:
    retVal = 0x0FC4;
    break;
  case 4:
    retVal = 0x0FB5;
    break;
  default:
    retVal = 0x0FF1;
    break;
  }
  return retVal;
}


x86 assembly (clang, -O0):
<randomInteger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
mov    %rax,-0x18(%rbp)
sub    $0x4,%rax
ja     1174 <randomInteger+0x74>
mov    -0x18(%rbp),%rax
lea    0xed1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xff1,-0xc(%rbp)
jmp    117b <randomInteger+0x7b>
movl   $0xfe2,-0xc(%rbp)
jmp    117b <randomInteger+0x7b>
movl   $0xfd3,-0xc(%rbp)
jmp    117b <randomInteger+0x7b>
movl   $0xfc4,-0xc(%rbp)
jmp    117b <randomInteger+0x7b>
movl   $0xfb5,-0xc(%rbp)
jmp    117b <randomInteger+0x7b>
movl   $0xff1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomInteger>:
movzwl (%rdi),%eax
add    $0xffffffff,%eax
movzwl %ax,%eax
mov    %eax,%ecx
shl    $0x4,%ecx
neg    %ecx
cmp    $0x4,%ax
lea    0xfe2(%rax,%rcx,1),%ecx
mov    $0xff1,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @randomInteger(i16* %0) {
%2 = alloca i16*
%3 = alloca i32
store i16* %0, i16** %2
store i32 0, i32* %3
%4 = load i16*, i16** %2
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
switch i32 %6, label %12 [
i32 0, label %7
i32 1, label %8
i32 2, label %9
i32 3, label %10
i32 4, label %11
]
7: ; preds = %1
store i32 4081, i32* %3
br label %13
8: ; preds = %1
store i32 4066, i32* %3
br label %13
9: ; preds = %1
store i32 4051, i32* %3
br label %13
10: ; preds = %1
store i32 4036, i32* %3
br label %13
11: ; preds = %1
store i32 4021, i32* %3
br label %13
12: ; preds = %1
store i32 4081, i32* %3
br label %13
13: ; preds = %12, %11, %10, %9, %8, %7
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @randomInteger(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = add i16 %2, -1
%4 = icmp ult i16 %3, 4
%5 = zext i16 %3 to i32
%6 = mul nsw i32 %5, -15
%7 = add nsw i32 %6, 4066
%8 = select i1 %4, i32 %7, i32 4081
ret i32 %8
}
void PGA_1_RestoreConfig(void) {}


x86 assembly (clang, -O0):
<PGA_1_RestoreConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PGA_1_RestoreConfig>:
ret

LLVM IR (-O0):
define void @PGA_1_RestoreConfig() {
ret void
}

LLVM IR (-O2):
define void @PGA_1_RestoreConfig() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
void cvt_u8BGR_u8BGR(const uint8_t *src, uint8_t *dest, int w) {
  memcpy(dest, src, w * 3);
}


x86 assembly (clang, -O0):
<cvt_u8BGR_u8BGR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
imul   $0x3,-0x14(%rbp),%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvt_u8BGR_u8BGR>:
mov    %rdi,%rax
lea    (%rdx,%rdx,2),%edx
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cvt_u8BGR_u8BGR(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = mul nsw i32 %9, 3
%11 = call i32 @memcpy(i32* %7, i32* %8, i32 %10)
ret void
}

LLVM IR (-O2):
define void @cvt_u8BGR_u8BGR(i32* %0, i32* %1, i32 %2) {
%4 = mul nsw i32 %2, 3
%5 = tail call i32 @memcpy(i32* %1, i32* %0, i32 %4)
ret void
}
double intpow(double base, int power) {
  register double answer;
  if (power < 0) {
    power = -power;
    base = 1 / base;
  }
  answer = 1.;
  while (power-- > 0)
    answer *= base;
  return (answer);
}


x86 assembly (clang, -O0):
<intpow>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1130 <intpow+0x30>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
movsd  0xeda(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xec8(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    1165 <intpow+0x65>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113d <intpow+0x3d>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<intpow>:
test   %edi,%edi
js     1110 <intpow+0x10>
jne    1122 <intpow+0x22>
movsd  0xef2(%rip),%xmm1
jmp    113c <intpow+0x3c>
neg    %edi
movsd  0xee6(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x1,%edi
movsd  0xed3(%rip),%xmm1
nopl   (%rax)
mulsd  %xmm0,%xmm1
add    $0xffffffff,%edi
cmp    $0x1,%edi
ja     1130 <intpow+0x30>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @intpow(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca double
store double %0, double* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
store i32 %10, i32* %4
%11 = load double, double* %3
%12 = fdiv double 1.000000e+00, %11
store double %12, double* %3
br label %13
13: ; preds = %8, %2
store double 1.000000e+00, double* %5
br label %14
14: ; preds = %18, %13
%15 = load i32, i32* %4
%16 = add nsw i32 %15, -1
store i32 %16, i32* %4
%17 = icmp sgt i32 %15, 0
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load double, double* %3
%20 = load double, double* %5
%21 = fmul double %20, %19
store double %21, double* %5
br label %14
22: ; preds = %14
%23 = load double, double* %5
ret double %23
}

LLVM IR (-O2):
define double @intpow(double %0, i32 %1) {
%3 = icmp slt i32 %1, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = sub nsw i32 0, %1
%6 = fdiv double 1.000000e+00, %0
br label %9
7: ; preds = %2
%8 = icmp eq i32 %1, 0
br i1 %8, label %18, label %9
9: ; preds = %4, %7
%10 = phi i32 [ %5, %4 ], [ %1, %7 ]
%11 = phi double [ %6, %4 ], [ %0, %7 ]
br label %12
12: ; preds = %9, %12
%13 = phi double [ %16, %12 ], [ 1.000000e+00, %9 ]
%14 = phi i32 [ %15, %12 ], [ %10, %9 ]
%15 = add nsw i32 %14, -1
%16 = fmul double %11, %13
%17 = icmp ugt i32 %14, 1
br i1 %17, label %12, label %18
18: ; preds = %12, %7
%19 = phi double [ 1.000000e+00, %7 ], [ %16, %12 ]
ret double %19
}
int len(double *list) {
  int i = 0;
  for (; list[i] != 0; i++)
    ;
  return i + 1;
}


x86 assembly (clang, -O0):
<len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1134 <len+0x34>
jp     1134 <len+0x34>
jmp    1147 <len+0x47>
jmp    1139 <len+0x39>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <len+0xf>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<len>:
xor    %eax,%eax
xorpd  %xmm0,%xmm0
cs nopw 0x0(%rax,%rax,1)
movsd  (%rdi,%rax,8),%xmm1
add    $0x1,%rax
ucomisd %xmm0,%xmm1
jne    1110 <len+0x10>
jp     1110 <len+0x10>
ret

LLVM IR (-O0):
define i32 @len(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load double*, double** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds double, double* %5, i64 %7
%9 = load double, double* %8
%10 = fcmp une double %9, 0.000000e+00
br i1 %10, label %11, label %15
11: ; preds = %4
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
ret i32 %17
}

LLVM IR (-O2):
define i32 @len(double* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds double, double* %0, i64 %3
%5 = load double, double* %4
%6 = fcmp une double %5, 0.000000e+00
%7 = add nuw i64 %3, 1
br i1 %6, label %2, label %8
8: ; preds = %2
%9 = trunc i64 %3 to i32
%10 = add nuw nsw i32 %9, 1
ret i32 %10
}
void __VERIFIER_assume(int p) {}


x86 assembly (clang, -O0):
<__VERIFIER_assume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_assume>:
ret

LLVM IR (-O0):
define void @__VERIFIER_assume(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @__VERIFIER_assume(i32 %0) {
ret void
}
/* Variables and functions */
float fabsf(float);
void abs_ff(float *ret, float f) {
  float r;
  r = fabsf(f);
  (*ret) = r;
}


x86 assembly (clang, -O0):
<abs_ff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movaps 0xee7(%rip),%xmm1
pand   %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_ff>:
andps  0xef9(%rip),%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @abs_ff(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
%5 = alloca float
store float* %0, float** %3
store float %1, float* %4
%6 = load float, float* %4
%7 = call float @llvm.fabs.f32(float %6)
store float %7, float* %5
%8 = load float, float* %5
%9 = load float*, float** %3
store float %8, float* %9
ret void
}

LLVM IR (-O2):
define void @abs_ff(float* nocapture writeonly %0, float %1) {
%3 = tail call float @llvm.fabs.f32(float %1)
store float %3, float* %0
ret void
}
int is_valleyview(unsigned short pciid) {
  return ((pciid) == 0x0f30 || (pciid) == 0x0f31 || (pciid) == 0x0f32 ||
          (pciid) == 0x0f33);
}


x86 assembly (clang, -O0):
<is_valleyview>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%ecx
mov    $0x1,%al
cmp    $0xf30,%ecx
mov    %al,-0x3(%rbp)
je     1159 <is_valleyview+0x59>
movzwl -0x2(%rbp),%ecx
mov    $0x1,%al
cmp    $0xf31,%ecx
mov    %al,-0x3(%rbp)
je     1159 <is_valleyview+0x59>
movzwl -0x2(%rbp),%ecx
mov    $0x1,%al
cmp    $0xf32,%ecx
mov    %al,-0x3(%rbp)
je     1159 <is_valleyview+0x59>
movzwl -0x2(%rbp),%eax
cmp    $0xf33,%eax
sete   %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valleyview>:
and    $0xfffffffc,%edi
xor    %eax,%eax
cmp    $0xf30,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_valleyview(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = icmp eq i32 %4, 3888
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = icmp eq i32 %8, 3889
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
%13 = icmp eq i32 %12, 3890
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i16, i16* %2
%16 = zext i16 %15 to i32
%17 = icmp eq i32 %16, 3891
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_valleyview(i16 zeroext %0) {
%2 = and i16 %0, -4
%3 = icmp eq i16 %2, 3888
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ gli_msgin_getchar(char *, int);
int /*<<< orphan*/ gli_streams_close_all();
int /*<<< orphan*/ putchar(char);
void glk_exit() {
  gli_msgin_getchar("Hit any key to exit.", 1);
  gli_streams_close_all();
  endwin();
  putchar('\n');
  exit(0);
}


x86 assembly (clang, -O0):
<glk_exit>:
push   %rbp
mov    %rsp,%rbp
lea    0xea5(%rip),%rdi
mov    $0x1,%esi
call   1040 <gli_msgin_getchar@plt>
mov    $0x0,%al
call   1070 <gli_streams_close_all@plt>
mov    $0x0,%al
call   1050 <endwin@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<glk_exit>:
push   %rax
lea    0xea8(%rip),%rdi
mov    $0x1,%esi
call   1040 <gli_msgin_getchar@plt>
xor    %eax,%eax
call   1070 <gli_streams_close_all@plt>
xor    %eax,%eax
call   1050 <endwin@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Hit any key to exit.\00"
define void @glk_exit() {
%1 = call i32 @gli_msgin_getchar(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = call i32 (...) @gli_streams_close_all()
%3 = call i32 (...) @endwin()
%4 = call i32 @putchar(i8 signext 10)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [21 x i8] c"Hit any key to exit.\00"
define void @glk_exit() {
%1 = tail call i32 @gli_msgin_getchar(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 (...) @gli_streams_close_all()
%3 = tail call i32 (...) @endwin()
%4 = tail call i32 @putchar(i8 signext 10)
%5 = tail call i32 @exit(i32 0)
unreachable
}