xunge/DecIR huggingface dataset:
double rust_dbg_extern_identity_double(double u) { return u; }


x86 assembly (clang, -O0):
<rust_dbg_extern_identity_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rust_dbg_extern_identity_double>:
ret

LLVM IR (-O0):
define double @rust_dbg_extern_identity_double(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @rust_dbg_extern_identity_double(double returned %0) {
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
char *strerror(int);
void print_errno_message(int errnum) {
  char const *s;
  s = strerror(errnum);
  fprintf(stderr, ": %s", s);
}


x86 assembly (clang, -O0):
<print_errno_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <strerror@plt>
mov    %rax,-0x10(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeb5(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_errno_message>:
push   %rax
call   1040 <strerror@plt>
mov    0x2eb3(%rip),%rcx
mov    (%rcx),%edi
lea    0xeca(%rip),%rsi
mov    %rax,%rdx
pop    %rax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [5 x i8] c": %s\00"
define void @print_errno_message(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @strerror(i32 %4)
store i8* %5, i8** %3
%6 = load i32, i32* @stderr
%7 = load i8*, i8** %3
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [5 x i8] c": %s\00"
define void @print_errno_message(i32 %0) {
%2 = tail call i8* @strerror(i32 %0)
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
/* Type definitions */
struct cmd_arg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ saveMibAll();
void cmdSaveConfig(int cmdType, struct cmd_arg *pCmdArg) { saveMibAll(); }


x86 assembly (clang, -O0):
<cmdSaveConfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <saveMibAll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdSaveConfig>:
xor    %eax,%eax
jmp    1030 <saveMibAll@plt>

LLVM IR (-O0):
%struct.cmd_arg = type { i32 }
define void @cmdSaveConfig(i32 %0, %struct.cmd_arg* %1) {
%3 = alloca i32
%4 = alloca %struct.cmd_arg*
store i32 %0, i32* %3
store %struct.cmd_arg* %1, %struct.cmd_arg** %4
%5 = call i32 (...) @saveMibAll()
ret void
}

LLVM IR (-O2):
%struct.cmd_arg = type { i32 }
define void @cmdSaveConfig(i32 %0, %struct.cmd_arg* nocapture readnone %1) {
%3 = tail call i32 (...) @saveMibAll()
ret void
}
/* Variables and functions */
int __arch_compare_and_swap(long volatile *, long, long);
int compare_and_swap(volatile long int *p, long int oldval, long int newval) {
  return __arch_compare_and_swap(p, oldval, newval);
}


x86 assembly (clang, -O0):
<compare_and_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__arch_compare_and_swap@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_and_swap>:
jmp    1030 <__arch_compare_and_swap@plt>

LLVM IR (-O0):
define i32 @compare_and_swap(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @__arch_compare_and_swap(i64* %7, i64 %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @compare_and_swap(i64* %0, i64 %1, i64 %2) {
%4 = tail call i32 @__arch_compare_and_swap(i64* %0, i64 %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x07() {
  Assert_real((isgraph(7) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              40, ("isgraph should be 0 for 0x07"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x07>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x28,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x07>:
push   %rax
mov    $0x7,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x28,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x07\00"
define void @t_isgraph_0x07() {
%1 = call i64 @isgraph(i32 7)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 40, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x07\00"
define void @t_isgraph_0x07() {
%1 = tail call i64 @isgraph(i32 7)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 40, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int isDigit(int ch) { return ((ch >= '0') && (ch <= '9')); }


x86 assembly (clang, -O0):
<isDigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isDigit+0x20>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isDigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isDigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isDigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ unit_error(char *, char const *, int);
void assert_false(int real, char const *caller, int line) {
  if (real != 0) {
    unit_error("%s:%d should be false", caller, line);
  }
}


x86 assembly (clang, -O0):
<assert_false>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113f <assert_false+0x2f>
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
lea    0xec6(%rip),%rdi
call   1030 <unit_error@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_false>:
test   %edi,%edi
je     1120 <assert_false+0x10>
lea    0xee5(%rip),%rdi
jmp    1030 <unit_error@plt>
ret

LLVM IR (-O0):
@.str = [22 x i8] c"%s:%d should be false\00"
define void @assert_false(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @unit_error(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %10, i32 %11)
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"%s:%d should be false\00"
define void @assert_false(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @unit_error(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
br label %7
7: ; preds = %5, %3
ret void
}
int test_imm_A9uint16_mem(unsigned short *val) {
  return ((*val) & (0xA9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A9uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xa9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A9uint16_mem>:
testb  $0xa9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A9uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 169
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A9uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 169
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
__attribute__((always_)) void flush_kernel_vmap_range(void *vaddr, int size) {}


x86 assembly (clang, -O0):
<flush_kernel_vmap_range>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_kernel_vmap_range>:
ret

LLVM IR (-O0):
define void @flush_kernel_vmap_range(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @flush_kernel_vmap_range(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int ddns3_sockio_close(int sock) {
  close(sock);
  return 0;
}


x86 assembly (clang, -O0):
<ddns3_sockio_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddns3_sockio_close>:
push   %rax
call   1030 <close@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ddns3_sockio_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @ddns3_sockio_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 0
}
/* Variables and functions */
int g(int);
void main() {
  int x;
  x = 0;
  x = 1;
  x = 2;
  x = g(g(x));
  x = 1;
  x = 2;
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <g@plt>
mov    %eax,%edi
call   1030 <g@plt>
mov    %eax,-0x4(%rbp)
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1030 <g@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <g@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %1
store i32 2, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @g(i32 %2)
%4 = call i32 @g(i32 %3)
store i32 %4, i32* %1
store i32 1, i32* %1
store i32 2, i32* %1
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @g(i32 2)
%2 = tail call i32 @g(i32 %1)
ret void
}
/* Variables and functions */
float __nv_acoshf(float);
float acoshf(float __a) { return __nv_acoshf(__a); }


x86 assembly (clang, -O0):
<acoshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__nv_acoshf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acoshf>:
jmp    1030 <__nv_acoshf@plt>

LLVM IR (-O0):
define float @acoshf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__nv_acoshf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @acoshf(float %0) {
%2 = tail call float @__nv_acoshf(float %0)
ret float %2
}
int cr_next_block_size(int size) {
  if (size > 511) {
    return 256;
  }
  if (size <= 256) {
    return size;
  }
  return size - (size >> 1);
}


x86 assembly (clang, -O0):
<cr_next_block_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1ff,-0x8(%rbp)
jle    1120 <cr_next_block_size+0x20>
movl   $0x100,-0x4(%rbp)
jmp    1146 <cr_next_block_size+0x46>
cmpl   $0x100,-0x8(%rbp)
jg     1138 <cr_next_block_size+0x38>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <cr_next_block_size+0x46>
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x1,%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cr_next_block_size>:
mov    $0x100,%eax
cmp    $0x1ff,%edi
jg     111d <cr_next_block_size+0x1d>
cmp    $0x101,%edi
jl     111b <cr_next_block_size+0x1b>
mov    %edi,%eax
shr    %eax
sub    %eax,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cr_next_block_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 511
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 256, i32* %2
br label %17
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 256
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %17
12: ; preds = %7
%13 = load i32, i32* %3
%14 = load i32, i32* %3
%15 = ashr i32 %14, 1
%16 = sub nsw i32 %13, %15
store i32 %16, i32* %2
br label %17
17: ; preds = %12, %10, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @cr_next_block_size(i32 %0) {
%2 = icmp sgt i32 %0, 511
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp slt i32 %0, 257
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = lshr i32 %0, 1
%7 = sub nuw nsw i32 %0, %6
br label %8
8: ; preds = %3, %1, %5
%9 = phi i32 [ %7, %5 ], [ 256, %1 ], [ %0, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void CAN_RX1_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<CAN_RX1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN_RX1_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @CAN_RX1_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @CAN_RX1_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, ...);
int main() {
  printf("%d\n", 12);
  printf("%d, %d, %d\n", (12 * (1)), (12 * (2)), (12 * (3)));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xee2(%rip),%rdi
mov    $0xc,%esi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
mov    $0xc,%esi
mov    $0x18,%edx
mov    $0x24,%ecx
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef0(%rip),%rdi
mov    $0xc,%esi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
mov    $0xc,%esi
mov    $0x18,%edx
mov    $0x24,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [12 x i8] c"%d, %d, %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 12)
%3 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 12, i32 24, i32 36)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [12 x i8] c"%d, %d, %d\0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 12)
%2 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 12, i32 24, i32 36)
ret i32 0
}
int matherr(struct exception *x __attribute__((unused))) { return 1; }


x86 assembly (clang, -O0):
<matherr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<matherr>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.exception = type opaque
define i32 @matherr(%struct.exception* %0) {
%2 = alloca %struct.exception*
store %struct.exception* %0, %struct.exception** %2
ret i32 1
}

LLVM IR (-O2):
%struct.exception = type opaque
define i32 @matherr(%struct.exception* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int htons(unsigned short);
int ntohs(unsigned short);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  unsigned short i = 0xABCD;
  printf("original is 0x%04X\n", i);
  printf("htons 0x%04X\n", htons(i));
  printf("ntohs 0x%04X\n", ntohs(i));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movw   $0xabcd,-0x6(%rbp)
movzwl -0x6(%rbp),%esi
lea    0xeb0(%rip),%rdi
call   1040 <printf@plt>
movzwl -0x6(%rbp),%edi
call   1030 <htons@plt>
mov    %eax,%esi
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
movzwl -0x6(%rbp),%edi
call   1050 <ntohs@plt>
mov    %eax,%esi
lea    0xea4(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
mov    $0xabcd,%esi
call   1040 <printf@plt>
mov    $0xabcd,%edi
call   1030 <htons@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0xabcd,%edi
call   1050 <ntohs@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"original is 0x%04X\0A\00"
@.str.1 = [14 x i8] c"htons 0x%04X\0A\00"
@.str.2 = [14 x i8] c"ntohs 0x%04X\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
store i32 0, i32* %1
store i16 -21555, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i16, i16* %2
%7 = call i32 @htons(i16 zeroext %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = load i16, i16* %2
%10 = call i32 @ntohs(i16 zeroext %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"original is 0x%04X\0A\00"
@.str.1 = [14 x i8] c"htons 0x%04X\0A\00"
@.str.2 = [14 x i8] c"ntohs 0x%04X\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 43981)
%2 = tail call i32 @htons(i16 zeroext -21555)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i32 %2)
%4 = tail call i32 @ntohs(i16 zeroext -21555)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 %4)
ret i32 0
}
void EC_KEY_print_fp(void) {}


x86 assembly (clang, -O0):
<EC_KEY_print_fp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_KEY_print_fp>:
ret

LLVM IR (-O0):
define void @EC_KEY_print_fp() {
ret void
}

LLVM IR (-O2):
define void @EC_KEY_print_fp() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print_usage(const char *name) {
  printf("Usage: %s PURE-FIRMWARE\n", name);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Usage: %s PURE-FIRMWARE\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Usage: %s PURE-FIRMWARE\0A\00"
define void @print_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void __attribute__((weak)) hash_rng_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<hash_rng_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_rng_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.hash_rng_isr = [13 x i8] c"hash_rng_isr\00"
define weak void @hash_rng_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.hash_rng_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.hash_rng_isr = [13 x i8] c"hash_rng_isr\00"
define weak void @hash_rng_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.hash_rng_isr, i64 0, i64 0))
ret void
}
/* Type definitions */
struct ringbuffer {
  int dummy;
};
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ drain_cached_bytes(struct ringbuffer *, int /*<<< orphan*/ *,
                              scalar_t__, int, int /*<<< orphan*/ *);
int32_t rb_write(int fd, struct ringbuffer *rb, int32_t size) {
  if (!rb || size <= 0) {
    return -1;
  }
  return drain_cached_bytes(rb, NULL, size, fd, NULL);
}


x86 assembly (clang, -O0):
<rb_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1139 <rb_write+0x29>
cmpq   $0x0,-0x20(%rbp)
jg     1146 <rb_write+0x36>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1162 <rb_write+0x52>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rdx
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%r8d
mov    %r8,%rsi
call   1030 <drain_cached_bytes@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_write>:
test   %rsi,%rsi
je     1129 <rb_write+0x19>
test   %rdx,%rdx
jle    1129 <rb_write+0x19>
mov    %edi,%ecx
mov    %rsi,%rdi
xor    %esi,%esi
xor    %r8d,%r8d
jmp    1030 <drain_cached_bytes@plt>
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
%struct.ringbuffer = type { i32 }
define i64 @rb_write(i32 %0, %struct.ringbuffer* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca %struct.ringbuffer*
%7 = alloca i64
store i32 %0, i32* %5
store %struct.ringbuffer* %1, %struct.ringbuffer** %6
store i64 %2, i64* %7
%8 = load %struct.ringbuffer*, %struct.ringbuffer** %6
%9 = icmp ne %struct.ringbuffer* %8, null
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i64, i64* %7
%12 = icmp sle i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10, %3
store i64 -1, i64* %4
br label %19
14: ; preds = %10
%15 = load %struct.ringbuffer*, %struct.ringbuffer** %6
%16 = load i64, i64* %7
%17 = load i32, i32* %5
%18 = call i64 @drain_cached_bytes(%struct.ringbuffer* %15, i32* null, i64 %16, i32 %17, i32* null)
store i64 %18, i64* %4
br label %19
19: ; preds = %14, %13
%20 = load i64, i64* %4
ret i64 %20
}

LLVM IR (-O2):
%struct.ringbuffer = type { i32 }
define i64 @rb_write(i32 %0, %struct.ringbuffer* %1, i64 %2) {
%4 = icmp eq %struct.ringbuffer* %1, null
%5 = icmp slt i64 %2, 1
%6 = or i1 %4, %5
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i64 @drain_cached_bytes(%struct.ringbuffer* %1, i32* null, i64 %2, i32 %0, i32* null)
br label %9
9: ; preds = %3, %7
%10 = phi i64 [ %8, %7 ], [ -1, %3 ]
ret i64 %10
}
/* Variables and functions */
int qtest();
int qtest_() {
  int ret = qtest();
  return (ret);
}


x86 assembly (clang, -O0):
<qtest_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <qtest@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qtest_>:
xor    %eax,%eax
jmp    1030 <qtest@plt>

LLVM IR (-O0):
define i32 @qtest_() {
%1 = alloca i32
%2 = call i32 (...) @qtest()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @qtest_() {
%1 = tail call i32 (...) @qtest()
ret i32 %1
}
const int *ARRAY() {
  static const int array[] = {0, 1, 2};
  return array;
}


x86 assembly (clang, -O0):
<ARRAY>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARRAY>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@ARRAY.array = internal constant [3 x i32] [i32 0, i32 1, i32 2]
define i32* @ARRAY() {
ret i32* getelementptr inbounds ([3 x i32], [3 x i32]* @ARRAY.array, i64 0, i64 0)
}

LLVM IR (-O2):
@ARRAY.array = internal constant [3 x i32] [i32 0, i32 1, i32 2]
define i32* @ARRAY() {
ret i32* getelementptr inbounds ([3 x i32], [3 x i32]* @ARRAY.array, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
uint64_t psector_ReadIeee802_15_4_MacId2(void) {
  uint64_t (*p_psector_ReadIeee802_15_4_MacId2)(void);
  p_psector_ReadIeee802_15_4_MacId2 = (uint64_t(*)(void))0x03005385U;
  return p_psector_ReadIeee802_15_4_MacId2();
}


x86 assembly (clang, -O0):
<psector_ReadIeee802_15_4_MacId2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3005385,%eax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psector_ReadIeee802_15_4_MacId2>:
mov    $0x3005385,%eax
jmp    *%rax

LLVM IR (-O0):
define i32 @psector_ReadIeee802_15_4_MacId2() {
%1 = alloca i32 ()*
store i32 ()* inttoptr (i64 50353029 to i32 ()*), i32 ()** %1
%2 = load i32 ()*, i32 ()** %1
%3 = call i32 %2()
ret i32 %3
}

LLVM IR (-O2):
define i32 @psector_ReadIeee802_15_4_MacId2() {
%1 = tail call i32 inttoptr (i64 50353029 to i32 ()*)()
ret i32 %1
}
void uDMAChannelSelectDefault(unsigned long ulDefPeriphs) {
  (*((volatile unsigned long *)(0x400FF500))) &= ~ulDefPeriphs;
}


x86 assembly (clang, -O0):
<uDMAChannelSelectDefault>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
mov    $0x400ff500,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x400ff500,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAChannelSelectDefault>:
not    %rdi
and    %rdi,0x400ff500
40
ret

LLVM IR (-O0):
define void @uDMAChannelSelectDefault(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, -1
%5 = load volatile i64, i64* inttoptr (i64 1074787584 to i64*)
%6 = and i64 %5, %4
store volatile i64 %6, i64* inttoptr (i64 1074787584 to i64*)
ret void
}

LLVM IR (-O2):
define void @uDMAChannelSelectDefault(i64 %0) {
%2 = xor i64 %0, -1
%3 = load volatile i64, i64* inttoptr (i64 1074787584 to i64*)
%4 = and i64 %3, %2
store volatile i64 %4, i64* inttoptr (i64 1074787584 to i64*)
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
int EXIT_SUCCESS;
int MakeSocket(scalar_t__ *);
int /*<<< orphan*/ RunServer(int);
int /*<<< orphan*/ printf(char *, int);
int main(int arc, char **argv) {
  uint16_t port = 0;
  int socketFD = MakeSocket(&port);
  printf("%d\n", (int)port);
  RunServer(socketFD);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
call   1040 <MakeSocket@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,%esi
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
mov    -0x1c(%rbp),%edi
call   1050 <RunServer@plt>
mov    0x2e65(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1040 <MakeSocket@plt>
mov    %eax,%ebx
mov    0x8(%rsp),%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
mov    %ebx,%edi
call   1050 <RunServer@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 0, i64* %6
%8 = call i32 @MakeSocket(i64* %6)
store i32 %8, i32* %7
%9 = load i64, i64* %6
%10 = trunc i64 %9 to i32
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %7
%13 = call i32 @RunServer(i32 %12)
%14 = load i32, i32* @EXIT_SUCCESS
ret i32 %14
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%5 = call i32 @MakeSocket(i64* %3)
%6 = load i64, i64* %3
%7 = trunc i64 %6 to i32
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = call i32 @RunServer(i32 %5)
%10 = load i32, i32* @EXIT_SUCCESS
ret i32 %10
}
/* Type definitions */
typedef int clockid_t;

/* Variables and functions */
clockid_t get_clockid(int fd) { return ((~(clockid_t)(fd) << 3) | 3); }


x86 assembly (clang, -O0):
<get_clockid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
shl    $0x3,%eax
or     $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_clockid>:
not    %edi
lea    0x3(,%rdi,8),%eax
ret

LLVM IR (-O0):
define i32 @get_clockid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = shl i32 %4, 3
%6 = or i32 %5, 3
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_clockid(i32 %0) {
%2 = xor i32 %0, -1
%3 = shl i32 %2, 3
%4 = or i32 %3, 3
ret i32 %4
}
int isfinite(x)
double x;
{ return (1); }


x86 assembly (clang, -O0):
<isfinite>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isfinite>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isfinite(double %0) {
%2 = alloca double
store double %0, double* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @isfinite(double %0) {
ret i32 1
}
void foo677() {}


x86 assembly (clang, -O0):
<foo677>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo677>:
ret

LLVM IR (-O0):
define void @foo677() {
ret void
}

LLVM IR (-O2):
define void @foo677() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ register_resar_function_list();
void resar_init() { register_resar_function_list(); }


x86 assembly (clang, -O0):
<resar_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <register_resar_function_list@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<resar_init>:
xor    %eax,%eax
jmp    1030 <register_resar_function_list@plt>

LLVM IR (-O0):
define void @resar_init() {
%1 = call i32 (...) @register_resar_function_list()
ret void
}

LLVM IR (-O2):
define void @resar_init() {
%1 = tail call i32 (...) @register_resar_function_list()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, int);
char *BN_options(void) {
  static int init = 0;
  static char data[16];
  if (!init) {
    init++;
    sprintf(data, "bn(%d,%d)", (int)sizeof(unsigned long) * 8,
            (int)sizeof(unsigned long) * 8);
  }
  return (data);
}


x86 assembly (clang, -O0):
<BN_options>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f25(%rip)
jne    114a <BN_options+0x3a>
mov    0x2f19(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f10(%rip)
lea    0x2f19(%rip),%rdi
lea    0xec2(%rip),%rsi
mov    $0x40,%ecx
mov    %ecx,%edx
call   1030 <sprintf@plt>
lea    0x2eff(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_options>:
push   %rax
cmpb   $0x0,0x2f28(%rip)
jne    113e <BN_options+0x2e>
movb   $0x1,0x2f1f(%rip)
lea    0x2f28(%rip),%rdi
lea    0xed1(%rip),%rsi
mov    $0x40,%edx
mov    $0x40,%ecx
call   1030 <sprintf@plt>
lea    0x2f0b(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
@BN_options.init = internal global i32 0
@BN_options.data = internal global [16 x i8] zeroinitializer
@.str = [10 x i8] c"bn(%d,%d)\00"
define i8* @BN_options() {
%1 = load i32, i32* @BN_options.init
%2 = icmp ne i32 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = load i32, i32* @BN_options.init
%5 = add nsw i32 %4, 1
store i32 %5, i32* @BN_options.init
%6 = call i32 @sprintf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @BN_options.data, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 64, i32 64)
br label %7
7: ; preds = %3, %0
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @BN_options.data, i64 0, i64 0)
}

LLVM IR (-O2):
@BN_options.init = internal unnamed_addr global i1 false
@BN_options.data = internal global [16 x i8] zeroinitializer
@.str = [10 x i8] c"bn(%d,%d)\00"
define i8* @BN_options() {
%1 = load i1, i1* @BN_options.init
br i1 %1, label %4, label %2
2: ; preds = %0
store i1 true, i1* @BN_options.init
%3 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @BN_options.data, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 64, i32 64)
br label %4
4: ; preds = %2, %0
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @BN_options.data, i64 0, i64 0)
}
int get_q(void) { return 10 / 10; }


x86 assembly (clang, -O0):
<get_q>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_q>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @get_q() {
ret i32 1
}

LLVM IR (-O2):
define i32 @get_q() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ e_tsx();
void e_tsx_accu() { e_tsx(); }


x86 assembly (clang, -O0):
<e_tsx_accu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <e_tsx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_tsx_accu>:
xor    %eax,%eax
jmp    1030 <e_tsx@plt>

LLVM IR (-O0):
define void @e_tsx_accu() {
%1 = call i32 (...) @e_tsx()
ret void
}

LLVM IR (-O2):
define void @e_tsx_accu() {
%1 = tail call i32 (...) @e_tsx()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void iptoa(char *s, int *p) {
  int val = *p;
  sprintf(s, "%d", val);
}


x86 assembly (clang, -O0):
<iptoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%edx
lea    0xec9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iptoa>:
mov    (%rsi),%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @iptoa(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = load i32, i32* %5
%10 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @iptoa(i8* nocapture writeonly %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Type definitions */
struct pdp10_memory {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ dmp_info(struct pdp10_memory *, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ read_raw_at(int /*<<< orphan*/ *, struct pdp10_memory *,
                               int);
void read_dmp(FILE *f, struct pdp10_memory *memory, int cpu_model) {
  printf("DMP format\n");
  read_raw_at(f, memory, 074);
  dmp_info(memory, cpu_model);
}


x86 assembly (clang, -O0):
<read_dmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3c,%edx
call   1040 <read_raw_at@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1050 <dmp_info@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_dmp>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
lea    0xebc(%rip),%rdi
call   1030 <puts@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    $0x3c,%edx
call   1040 <read_raw_at@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <dmp_info@plt>

LLVM IR (-O0):
%struct.pdp10_memory = type { i32 }
@.str = [12 x i8] c"DMP format\0A\00"
define void @read_dmp(i32* %0, %struct.pdp10_memory* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca %struct.pdp10_memory*
%6 = alloca i32
store i32* %0, i32** %4
store %struct.pdp10_memory* %1, %struct.pdp10_memory** %5
store i32 %2, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%8 = load i32*, i32** %4
%9 = load %struct.pdp10_memory*, %struct.pdp10_memory** %5
%10 = call i32 @read_raw_at(i32* %8, %struct.pdp10_memory* %9, i32 60)
%11 = load %struct.pdp10_memory*, %struct.pdp10_memory** %5
%12 = load i32, i32* %6
%13 = call i32 @dmp_info(%struct.pdp10_memory* %11, i32 %12)
ret void
}

LLVM IR (-O2):
%struct.pdp10_memory = type { i32 }
@str = [11 x i8] c"DMP format\00"
define void @read_dmp(i32* %0, %struct.pdp10_memory* %1, i32 %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @read_raw_at(i32* %0, %struct.pdp10_memory* %1, i32 60)
%6 = tail call i32 @dmp_info(%struct.pdp10_memory* %1, i32 %2)
ret void
}
int get_destinations(unsigned int *mypers) {
  int tmp[6];
  return (0);
}


x86 assembly (clang, -O0):
<get_destinations>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_destinations>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_destinations(i32* %0) {
%2 = alloca i32*
%3 = alloca [6 x i32]
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @get_destinations(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
scalar_t__ count_bits(unsigned char const);
unsigned int count_hash_bits(const unsigned char *hash, size_t bytes) {
  unsigned int i, c = 0;
  for (i = 0; i < bytes; i++) {
    c += count_bits(hash[i]);
  }
  return c;
}


x86 assembly (clang, -O0):
<count_hash_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jae    1165 <count_hash_bits+0x55>
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
movzbl (%rax,%rcx,1),%edi
call   1030 <count_bits@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%eax
add    %rcx,%rax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112e <count_hash_bits+0x1e>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_hash_bits>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %rsi,%rsi
je     1146 <count_hash_bits+0x36>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
movzbl (%r14,%rbx,1),%edi
call   1030 <count_bits@plt>
add    %eax,%ebp
add    $0x1,%ebx
cmp    %r15,%rbx
jb     1130 <count_hash_bits+0x20>
jmp    1148 <count_hash_bits+0x38>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @count_hash_bits(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
store i32 0, i32* %6
store i32 0, i32* %5
br label %7
7: ; preds = %23, %2
%8 = load i32, i32* %5
%9 = zext i32 %8 to i64
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %7
%13 = load i8*, i8** %3
%14 = load i32, i32* %5
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = call i64 @count_bits(i8 zeroext %17)
%19 = load i32, i32* %6
%20 = zext i32 %19 to i64
%21 = add nsw i64 %20, %18
%22 = trunc i64 %21 to i32
store i32 %22, i32* %6
br label %23
23: ; preds = %12
%24 = load i32, i32* %5
%25 = add i32 %24, 1
store i32 %25, i32* %5
br label %7
26: ; preds = %7
%27 = load i32, i32* %6
ret i32 %27
}

LLVM IR (-O2):
define i32 @count_hash_bits(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %13, %4 ], [ 0, %2 ]
%6 = phi i32 [ %11, %4 ], [ 0, %2 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %5
%8 = load i8, i8* %7
%9 = tail call i64 @count_bits(i8 zeroext %8)
%10 = trunc i64 %9 to i32
%11 = add i32 %6, %10
%12 = add nuw nsw i64 %5, 1
%13 = and i64 %12, 4294967295
%14 = icmp ult i64 %13, %1
br i1 %14, label %4, label %15
15: ; preds = %4, %2
%16 = phi i32 [ 0, %2 ], [ %11, %4 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr,
          "usage: fstest [-u uid] [-g gid1[,gid2[...]]] syscall args ...\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [63 x i8] c"usage: fstest [-u uid] [-g gid1[,gid2[...]]] syscall args ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [63 x i8] c"usage: fstest [-u uid] [-g gid1[,gid2[...]]] syscall args ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int trailingZeroes(int n) {
  int ret = 0;
  while (n) {
    ret += (n / 5);
    n /= 5;
  }
  return ret;
}


x86 assembly (clang, -O0):
<trailingZeroes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113c <trailingZeroes+0x3c>
mov    -0x4(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <trailingZeroes+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trailingZeroes>:
xor    %eax,%eax
test   %edi,%edi
je     1131 <trailingZeroes+0x31>
cs nopw 0x0(%rax,%rax,1)
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rdi
add    %edx,%edi
add    %edi,%eax
add    $0x4,%ecx
cmp    $0x8,%ecx
ja     1110 <trailingZeroes+0x10>
ret

LLVM IR (-O0):
define i32 @trailingZeroes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sdiv i32 %8, 5
%10 = load i32, i32* %3
%11 = add nsw i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 5
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @trailingZeroes(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = sdiv i32 %5, 5
%7 = add nsw i32 %4, %6
%8 = add i32 %5, 4
%9 = icmp ult i32 %8, 9
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
double Q_u(double Q_u_convection, double Q_u_gradp, double Q_u_time,
           double Q_u_viscous) {
  return Q_u_convection + Q_u_gradp + Q_u_time + Q_u_viscous;
}


x86 assembly (clang, -O0):
<Q_u>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
addsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_u>:
addsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
addsd  %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @Q_u(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = fadd double %9, %10
%12 = load double, double* %7
%13 = fadd double %11, %12
%14 = load double, double* %8
%15 = fadd double %13, %14
ret double %15
}

LLVM IR (-O2):
define double @Q_u(double %0, double %1, double %2, double %3) {
%5 = fadd double %0, %1
%6 = fadd double %5, %2
%7 = fadd double %6, %3
ret double %7
}
/* Variables and functions */
scalar_t__ approximately_zero(float);
float approximately_pin(float x) { return approximately_zero(x) ? 0 : x; }


x86 assembly (clang, -O0):
<approximately_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <approximately_zero@plt>
cmp    $0x0,%rax
je     113e <approximately_pin+0x2e>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1148 <approximately_pin+0x38>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<approximately_pin>:
push   %rax
movss  %xmm0,0x4(%rsp)
call   1030 <approximately_zero@plt>
movss  0x4(%rsp),%xmm0
test   %rax,%rax
je     112a <approximately_pin+0x1a>
xorps  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @approximately_pin(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @approximately_zero(float %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %9
7: ; preds = %1
%8 = load float, float* %2
br label %9
9: ; preds = %7, %6
%10 = phi float [ 0.000000e+00, %6 ], [ %8, %7 ]
ret float %10
}

LLVM IR (-O2):
define float @approximately_pin(float %0) {
%2 = tail call i64 @approximately_zero(float %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, float %0, float 0.000000e+00
ret float %4
}