xunge/DecIR huggingface dataset:
unsigned int mem_get_be16_as_int(const void *vmem) {
  unsigned int val;
  const unsigned char *mem = (const unsigned char *)vmem;
  val = mem[0] << 8;
  val |= mem[1];
  return val;
}


x86 assembly (clang, -O0):
<mem_get_be16_as_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
movzbl 0x1(%rax),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_get_be16_as_int>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @mem_get_be16_as_int(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 8
store i32 %10, i32* %3
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = load i32, i32* %3
%16 = or i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @mem_get_be16_as_int(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = or i32 %4, %7
ret i32 %8
}
unsigned xrop3_147_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T & D;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_147_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_147_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %eax,%edx
xor    %esi,%edx
or     %ecx,%edx
and    %esi,%edi
not    %edx
not    %eax
and    %esi,%eax
or     %edi,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_147_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %5
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %6
%26 = load i32, i32* %9
%27 = xor i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = and i32 %30, %31
%33 = load i32, i32* %8
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = or i32 %32, %36
%38 = load i32, i32* %7
%39 = load i32, i32* %6
%40 = xor i32 %39, -1
%41 = and i32 %38, %40
%42 = load i32, i32* %5
%43 = and i32 %41, %42
%44 = or i32 %37, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_147_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, %5
%8 = and i8 %1, %0
%9 = zext i8 %8 to i32
%10 = or i32 %7, %6
%11 = xor i32 %10, -1
%12 = xor i32 %4, -1
%13 = and i32 %12, %5
%14 = or i32 %13, %9
%15 = or i32 %14, %11
ret i32 %15
}
void fmStartTone(int channel, int pitch) {}


x86 assembly (clang, -O0):
<fmStartTone>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmStartTone>:
ret

LLVM IR (-O0):
define void @fmStartTone(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @fmStartTone(i32 %0, i32 %1) {
ret void
}
unsigned short mus_char_to_ulshort(const unsigned char *inp) {
  unsigned short o;
  unsigned char *outp;
  outp = (unsigned char *)&o;
  outp[0] = inp[1];
  outp[1] = inp[0];
  return (o);
}


x86 assembly (clang, -O0):
<mus_char_to_ulshort>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0xa(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
movzwl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mus_char_to_ulshort>:
movzwl (%rdi),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @mus_char_to_ulshort(i8* %0) {
%2 = alloca i8*
%3 = alloca i16
%4 = alloca i8*
store i8* %0, i8** %2
%5 = bitcast i16* %3 to i8*
store i8* %5, i8** %4
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i16, i16* %3
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @mus_char_to_ulshort(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = load i8, i8* %0
%5 = zext i8 %4 to i16
%6 = shl nuw i16 %5, 8
%7 = zext i8 %3 to i16
%8 = or i16 %6, %7
ret i16 %8
}
void foo351(int p) {}


x86 assembly (clang, -O0):
<foo351>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo351>:
ret

LLVM IR (-O0):
define void @foo351(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo351(i32 %0) {
ret void
}
/* Variables and functions */
int factorial(int);
void *factorial_thread(void *arg) {
  int x = (int)arg;
  x = factorial(x);
  return (void *)(x);
}


x86 assembly (clang, -O0):
<factorial_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <factorial@plt>
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<factorial_thread>:
push   %rax
call   1030 <factorial@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @factorial_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @factorial(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @factorial_thread(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @factorial(i32 %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}
/* Type definitions */
typedef int /*<<< orphan*/ nul;

/* Variables and functions */
int /*<<< orphan*/ kannotate_write(char *, int);
void gator_annotate_end(void) {
  char nul = 0;
  kannotate_write(&nul, sizeof(nul));
}


x86 assembly (clang, -O0):
<gator_annotate_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
lea    -0x1(%rbp),%rdi
mov    $0x1,%esi
call   1030 <kannotate_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gator_annotate_end>:
push   %rax
movb   $0x0,0x7(%rsp)
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
call   1030 <kannotate_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @gator_annotate_end() {
%1 = alloca i8
store i8 0, i8* %1
%2 = call i32 @kannotate_write(i8* %1, i32 1)
ret void
}

LLVM IR (-O2):
define void @gator_annotate_end() {
%1 = alloca i8
store i8 0, i8* %1
%2 = call i32 @kannotate_write(i8* %1, i32 1)
ret void
}
short int shortint_ignoring_unsignedshort(short int x, unsigned short y) {
  return x;
}


x86 assembly (clang, -O0):
<shortint_ignoring_unsignedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shortint_ignoring_unsignedshort>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @shortint_ignoring_unsignedshort(i16 signext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @shortint_ignoring_unsignedshort(i16 returned signext %0, i16 zeroext %1) {
ret i16 %0
}
void f(void) {
  {
    int a;
    unsigned int b;
    signed int c;
  }
  {
    long a;
    unsigned long b;
    signed long c;
  }
  {
    long int a;
    unsigned long int b;
    signed long int c;
  }
  {
    short a;
    unsigned short b;
    signed short c;
  }
  {
    short int a;
    unsigned short int b;
    signed short int c;
  }
  {
    float a;
    double b;
    long double c;
  }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i16
%11 = alloca i16
%12 = alloca i16
%13 = alloca i16
%14 = alloca i16
%15 = alloca i16
%16 = alloca float
%17 = alloca double
%18 = alloca x86_fp80
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_CLR_INT1_PIN() { clear_io_bit(0x43, 1); }


x86 assembly (clang, -O0):
<TOSH_CLR_INT1_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%edi
mov    $0x1,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_CLR_INT1_PIN>:
mov    $0x43,%edi
mov    $0x1,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_CLR_INT1_PIN() {
%1 = call i32 @clear_io_bit(i32 67, i32 1)
ret void
}

LLVM IR (-O2):
define void @TOSH_CLR_INT1_PIN() {
%1 = tail call i32 @clear_io_bit(i32 67, i32 1)
ret void
}
void build(int l, int r) {}


x86 assembly (clang, -O0):
<build>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<build>:
ret

LLVM IR (-O0):
define void @build(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @build(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ baseRuota(int, int);
int /*<<< orphan*/ braccioChiuso(int);
int /*<<< orphan*/ pinzaClose();
int /*<<< orphan*/ sleep(int);
void pwmInitialPosition() {
  pinzaClose();
  braccioChiuso(20);
  baseRuota(1, 90);
  sleep(1);
}


x86 assembly (clang, -O0):
<pwmInitialPosition>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <pinzaClose@plt>
mov    $0x14,%edi
call   1050 <braccioChiuso@plt>
mov    $0x1,%edi
mov    $0x5a,%esi
call   1030 <baseRuota@plt>
mov    $0x1,%edi
call   1060 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwmInitialPosition>:
push   %rax
xor    %eax,%eax
call   1040 <pinzaClose@plt>
mov    $0x14,%edi
call   1050 <braccioChiuso@plt>
mov    $0x1,%edi
mov    $0x5a,%esi
call   1030 <baseRuota@plt>
mov    $0x1,%edi
pop    %rax
jmp    1060 <sleep@plt>

LLVM IR (-O0):
define void @pwmInitialPosition() {
%1 = call i32 (...) @pinzaClose()
%2 = call i32 @braccioChiuso(i32 20)
%3 = call i32 @baseRuota(i32 1, i32 90)
%4 = call i32 @sleep(i32 1)
ret void
}

LLVM IR (-O2):
define void @pwmInitialPosition() {
%1 = tail call i32 (...) @pinzaClose()
%2 = tail call i32 @braccioChiuso(i32 20)
%3 = tail call i32 @baseRuota(i32 1, i32 90)
%4 = tail call i32 @sleep(i32 1)
ret void
}
void hal_system_init(void) {}


x86 assembly (clang, -O0):
<hal_system_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_system_init>:
ret

LLVM IR (-O0):
define void @hal_system_init() {
ret void
}

LLVM IR (-O2):
define void @hal_system_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x45() {
  Assert_real((isspace(69) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              350, ("isspace should be 0 for E"));
}


x86 assembly (clang, -O0):
<t_isspace_0x45>:
push   %rbp
mov    %rsp,%rbp
mov    $0x45,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x15e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x45>:
push   %rax
mov    $0x45,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x15e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for E\00"
define void @t_isspace_0x45() {
%1 = call i64 @isspace(i32 69)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 350, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for E\00"
define void @t_isspace_0x45() {
%1 = tail call i64 @isspace(i32 69)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 350, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
WAVE_ISR() {}


x86 assembly (clang, -O0):
<WAVE_ISR>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WAVE_ISR>:
ret

LLVM IR (-O0):
define i32 @WAVE_ISR() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @WAVE_ISR() {
ret i32 undef
}
/* Variables and functions */
double fmod(double, double);
double bound_radians(double angle) {
  double newAngle = fmod(angle, 3.14159265358979323846 * 2);
  if (newAngle < 0)
    newAngle = 3.14159265358979323846 * 2 + newAngle;
  return newAngle;
}


x86 assembly (clang, -O0):
<bound_radians>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
call   1030 <fmod@plt>
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1154 <bound_radians+0x44>
movsd  0xeb6(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bound_radians>:
push   %rax
movsd  0xee7(%rip),%xmm1
call   1030 <fmod@plt>
movsd  0xeda(%rip),%xmm3
addsd  %xmm0,%xmm3
xorpd  %xmm2,%xmm2
movapd %xmm0,%xmm1
cmpltsd %xmm2,%xmm1
andpd  %xmm1,%xmm3
andnpd %xmm0,%xmm1
orpd   %xmm3,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @bound_radians(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double @fmod(double %4, double 0x401921FB54442D18)
store double %5, double* %3
%6 = load double, double* %3
%7 = fcmp olt double %6, 0.000000e+00
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load double, double* %3
%10 = fadd double 0x401921FB54442D18, %9
store double %10, double* %3
br label %11
11: ; preds = %8, %1
%12 = load double, double* %3
ret double %12
}

LLVM IR (-O2):
define double @bound_radians(double %0) {
%2 = tail call double @fmod(double %0, double 0x401921FB54442D18)
%3 = fcmp olt double %2, 0.000000e+00
%4 = fadd double %2, 0x401921FB54442D18
%5 = select i1 %3, double %4, double %2
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ glEndList();
void EndList(void) { glEndList(); }


x86 assembly (clang, -O0):
<EndList>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glEndList@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EndList>:
xor    %eax,%eax
jmp    1030 <glEndList@plt>

LLVM IR (-O0):
define void @EndList() {
%1 = call i32 (...) @glEndList()
ret void
}

LLVM IR (-O2):
define void @EndList() {
%1 = tail call i32 (...) @glEndList()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int feof(int /*<<< orphan*/ *);
int smp_sio_is_endofstream(FILE *fp) {
  if (feof(fp) == 1)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<smp_sio_is_endofstream>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <feof@plt>
cmp    $0x1,%eax
jne    113a <smp_sio_is_endofstream+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <smp_sio_is_endofstream+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_sio_is_endofstream>:
push   %rax
call   1030 <feof@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @smp_sio_is_endofstream(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @feof(i32* %4)
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @smp_sio_is_endofstream(i32* nocapture %0) {
%2 = tail call i32 @feof(i32* %0)
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}
int fun1024() { return 1024; }


x86 assembly (clang, -O0):
<fun1024>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1024>:
mov    $0x400,%eax
ret

LLVM IR (-O0):
define i32 @fun1024() {
ret i32 1024
}

LLVM IR (-O2):
define i32 @fun1024() {
ret i32 1024
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
char *asctime_r(int /*<<< orphan*/, char *);
int /*<<< orphan*/ localtime_r(int /*<<< orphan*/ const *, struct tm *);
char *ctime_r(const time_t *clk, char *buf) {
  struct tm tm;
  return asctime_r(localtime_r(clk, &tm), buf);
}


x86 assembly (clang, -O0):
<ctime_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <localtime_r@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1040 <asctime_r@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctime_r>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
call   1030 <localtime_r@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1040 <asctime_r@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i8* @ctime_r(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca %struct.tm
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i32*, i32** %3
%7 = call i32 @localtime_r(i32* %6, %struct.tm* %5)
%8 = load i8*, i8** %4
%9 = call i8* @asctime_r(i32 %7, i8* %8)
ret i8* %9
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i8* @ctime_r(i32* %0, i8* %1) {
%3 = alloca %struct.tm
%4 = bitcast %struct.tm* %3 to i8*
%5 = call i32 @localtime_r(i32* %0, %struct.tm* %3)
%6 = call i8* @asctime_r(i32 %5, i8* %1)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ print_sum(int, int);
int main(int argc, char **argv) {
  int i;
  for (i = 0; i < 10; i++) {
    print_sum(i, i + 1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0xa,-0x14(%rbp)
jge    1153 <main+0x43>
mov    -0x14(%rbp),%edi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
call   1030 <print_sum@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <print_sum@plt>
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <print_sum@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <print_sum@plt>
mov    $0x3,%edi
mov    $0x4,%esi
call   1030 <print_sum@plt>
mov    $0x4,%edi
mov    $0x5,%esi
call   1030 <print_sum@plt>
mov    $0x5,%edi
mov    $0x6,%esi
call   1030 <print_sum@plt>
mov    $0x6,%edi
mov    $0x7,%esi
call   1030 <print_sum@plt>
mov    $0x7,%edi
mov    $0x8,%esi
call   1030 <print_sum@plt>
mov    $0x8,%edi
mov    $0x9,%esi
call   1030 <print_sum@plt>
mov    $0x9,%edi
mov    $0xa,%esi
call   1030 <print_sum@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 10
br i1 %9, label %10, label %18
10: ; preds = %7
%11 = load i32, i32* %6
%12 = load i32, i32* %6
%13 = add nsw i32 %12, 1
%14 = call i32 @print_sum(i32 %11, i32 %13)
br label %15
15: ; preds = %10
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @print_sum(i32 0, i32 1)
%4 = tail call i32 @print_sum(i32 1, i32 2)
%5 = tail call i32 @print_sum(i32 2, i32 3)
%6 = tail call i32 @print_sum(i32 3, i32 4)
%7 = tail call i32 @print_sum(i32 4, i32 5)
%8 = tail call i32 @print_sum(i32 5, i32 6)
%9 = tail call i32 @print_sum(i32 6, i32 7)
%10 = tail call i32 @print_sum(i32 7, i32 8)
%11 = tail call i32 @print_sum(i32 8, i32 9)
%12 = tail call i32 @print_sum(i32 9, i32 10)
ret i32 0
}
void recNULL() {}


x86 assembly (clang, -O0):
<recNULL>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recNULL>:
ret

LLVM IR (-O0):
define void @recNULL() {
ret void
}

LLVM IR (-O2):
define void @recNULL() {
ret void
}
int main() {
  int a, *b;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void PRCMLPDSEnter() {
  volatile unsigned long ulDelay;
  if (((*((volatile unsigned long *)(0x4402D000 + 0x00000C80))) & 0x00110000) ==
      0x00110000) {
    FlashDisable();
  }
  (*((volatile unsigned long *)(0x4402E168))) |= (1 << 9);
  (*((volatile unsigned long *)(0x4402F000 + 0x000000C0))) = 0x1;
  (*((volatile unsigned long *)(0x44025000 + 0x000000E4))) = 0x00000001;
  __asm("    nop\n"
        "    nop\n"
        "    nop\n"
        "    nop\n");
}


x86 assembly (clang, -O0):
<PRCMLPDSEnter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4402dc80,%eax
mov    (%rax),%rax
and    $0x110000,%rax
cmp    $0x110000,%rax
jne    1139 <PRCMLPDSEnter+0x29>
mov    $0x0,%al
call   1030 <FlashDisable@plt>
mov    $0x4402e168,%eax
mov    (%rax),%rcx
or     $0x200,%rcx
mov    $0x4402e168,%eax
mov    %rcx,(%rax)
mov    $0x4402f0c0,%eax
movq   $0x1,(%rax)
mov    $0x440250e4,%eax
movq   $0x1,(%rax)
nop
nop
nop
nop
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMLPDSEnter>:
push   %rax
mov    0x4402dc80,%rax
44
not    %eax
test   $0x110000,%eax
jne    1129 <PRCMLPDSEnter+0x19>
xor    %eax,%eax
call   1030 <FlashDisable@plt>
orq    $0x200,0x4402e168
movq   $0x1,0x4402f0c0
movq   $0x1,0x440250e4
nop
nop
nop
nop
pop    %rax
ret

LLVM IR (-O0):
define void @PRCMLPDSEnter() {
%1 = alloca i64
%2 = load volatile i64, i64* inttoptr (i64 1141038208 to i64*)
%3 = and i64 %2, 1114112
%4 = icmp eq i64 %3, 1114112
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 (...) @FlashDisable()
br label %7
7: ; preds = %5, %0
%8 = load volatile i64, i64* inttoptr (i64 1141039464 to i64*)
%9 = or i64 %8, 512
store volatile i64 %9, i64* inttoptr (i64 1141039464 to i64*)
store volatile i64 1, i64* inttoptr (i64 1141043392 to i64*)
store volatile i64 1, i64* inttoptr (i64 1141002468 to i64*)
ret void
}

LLVM IR (-O2):
define void @PRCMLPDSEnter() {
%1 = load volatile i64, i64* inttoptr (i64 1141038208 to i64*)
%2 = and i64 %1, 1114112
%3 = icmp eq i64 %2, 1114112
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 (...) @FlashDisable()
br label %6
6: ; preds = %4, %0
%7 = load volatile i64, i64* inttoptr (i64 1141039464 to i64*)
%8 = or i64 %7, 512
store volatile i64 %8, i64* inttoptr (i64 1141039464 to i64*)
store volatile i64 1, i64* inttoptr (i64 1141043392 to i64*)
store volatile i64 1, i64* inttoptr (i64 1141002468 to i64*)
tail call void asm sideeffect " nop\0A nop\0A nop\0A nop\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int add(int, int);
int main(int argc, const char *argv[]) { return add(12, 13); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xc,%edi
mov    $0xd,%esi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xc,%edi
mov    $0xd,%esi
jmp    1030 <add@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @add(i32 12, i32 13)
ret i32 %6
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @add(i32 12, i32 13)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ chmod(int /*<<< orphan*/, int);
int /*<<< orphan*/ getenv(char *);
int /*<<< orphan*/ system(int /*<<< orphan*/);
void pwn(void) {
  chmod(getenv("CHANKRO"), 00777);
  system(getenv("CHANKRO"));
}


x86 assembly (clang, -O0):
<pwn>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <getenv@plt>
mov    %eax,%edi
mov    $0x1ff,%esi
call   1050 <chmod@plt>
lea    0xead(%rip),%rdi
call   1030 <getenv@plt>
mov    %eax,%edi
call   1040 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwn>:
push   %rbx
lea    0xec8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <getenv@plt>
mov    %eax,%edi
mov    $0x1ff,%esi
call   1050 <chmod@plt>
mov    %rbx,%rdi
call   1030 <getenv@plt>
mov    %eax,%edi
pop    %rbx
jmp    1040 <system@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"CHANKRO\00"
define void @pwn() {
%1 = call i32 @getenv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @chmod(i32 %1, i32 511)
%3 = call i32 @getenv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @system(i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"CHANKRO\00"
define void @pwn() {
%1 = tail call i32 @getenv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @chmod(i32 %1, i32 511)
%3 = tail call i32 @getenv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @system(i32 %3)
ret void
}
int test_imm_E7uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xE7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E7uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xe7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E7uint64_highword_reg>:
movabs $0xe700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E7uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 231
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E7uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 992137445376
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void MyFunc(void) {
  static int si = 0;
  int j = 0;
  si++;
  j++;
  printf("si: %d, j: %d \n", si, j);
}


x86 assembly (clang, -O0):
<MyFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2f07(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2efe(%rip)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    0x2eef(%rip),%esi
mov    -0x4(%rbp),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MyFunc>:
mov    0x2f16(%rip),%esi
add    $0x1,%esi
mov    %esi,0x2f0d(%rip)
lea    0xeda(%rip),%rdi
mov    $0x1,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@MyFunc.si = internal global i32 0
@.str = [16 x i8] c"si: %d, j: %d \0A\00"
define void @MyFunc() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @MyFunc.si
%3 = add nsw i32 %2, 1
store i32 %3, i32* @MyFunc.si
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
%6 = load i32, i32* @MyFunc.si
%7 = load i32, i32* %1
%8 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@MyFunc.si = internal unnamed_addr global i32 0
@.str = [16 x i8] c"si: %d, j: %d \0A\00"
define void @MyFunc() {
%1 = load i32, i32* @MyFunc.si
%2 = add nsw i32 %1, 1
store i32 %2, i32* @MyFunc.si
%3 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2, i32 1)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *memset(void *, int, int);
void *alloc_repeated_string(size_t length, int s, int c, int t) {
  return memset(memset(memset(malloc(length), t, length), c, length - 1), s, 1);
}


x86 assembly (clang, -O0):
<alloc_repeated_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,%rdi
mov    -0x14(%rbp),%esi
mov    -0x8(%rbp),%rax
mov    %eax,%edx
call   1030 <memset@plt>
mov    %rax,%rdi
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
mov    %eax,%edx
call   1030 <memset@plt>
mov    %rax,%rdi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1030 <memset@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_repeated_string>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%r15d
mov    %esi,%r14d
mov    %rdi,%rbp
call   1040 <malloc@plt>
mov    %rax,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
add    $0xffffffff,%ebp
mov    %rax,%rdi
mov    %r15d,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rax,%rdi
mov    %r14d,%esi
mov    $0x1,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i8* @alloc_repeated_string(i64 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i64 %0, i64* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i64, i64* %5
%10 = call i8* @malloc(i64 %9)
%11 = load i32, i32* %8
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
%14 = call i8* @memset(i8* %10, i32 %11, i32 %13)
%15 = load i32, i32* %7
%16 = load i64, i64* %5
%17 = sub i64 %16, 1
%18 = trunc i64 %17 to i32
%19 = call i8* @memset(i8* %14, i32 %15, i32 %18)
%20 = load i32, i32* %6
%21 = call i8* @memset(i8* %19, i32 %20, i32 1)
ret i8* %21
}

LLVM IR (-O2):
define i8* @alloc_repeated_string(i64 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i8* @malloc(i64 %0)
%6 = trunc i64 %0 to i32
%7 = tail call i8* @memset(i8* %5, i32 %3, i32 %6)
%8 = add i32 %6, -1
%9 = tail call i8* @memset(i8* %7, i32 %2, i32 %8)
%10 = tail call i8* @memset(i8* %9, i32 %1, i32 1)
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ sesc_exit(int /*<<< orphan*/);
void sesc_terminate(void) { sesc_exit(0); }


x86 assembly (clang, -O0):
<sesc_terminate>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <sesc_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_terminate>:
xor    %edi,%edi
jmp    1030 <sesc_exit@plt>

LLVM IR (-O0):
define void @sesc_terminate() {
%1 = call i32 @sesc_exit(i32 0)
ret void
}

LLVM IR (-O2):
define void @sesc_terminate() {
%1 = tail call i32 @sesc_exit(i32 0)
ret void
}
int f9(int x, int y) { return x & ((1 << y) - 1); }


x86 assembly (clang, -O0):
<f9>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f9>:
mov    %esi,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f9(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = sub nsw i32 %7, 1
%9 = and i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f9(i32 %0, i32 %1) {
%3 = shl nsw i32 -1, %1
%4 = xor i32 %3, -1
%5 = and i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ UART_putnum(unsigned int, int, int /*<<< orphan*/);
void UART_puthex(unsigned int num) { UART_putnum(num, 16, 0); }


x86 assembly (clang, -O0):
<UART_puthex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x10,%esi
xor    %edx,%edx
call   1030 <UART_putnum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_puthex>:
mov    $0x10,%esi
xor    %edx,%edx
jmp    1030 <UART_putnum@plt>

LLVM IR (-O0):
define void @UART_puthex(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @UART_putnum(i32 %3, i32 16, i32 0)
ret void
}

LLVM IR (-O2):
define void @UART_puthex(i32 %0) {
%2 = tail call i32 @UART_putnum(i32 %0, i32 16, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BotImport_DebugPolygonDelete(int);
void BotImport_DebugLineDelete(int line) { BotImport_DebugPolygonDelete(line); }


x86 assembly (clang, -O0):
<BotImport_DebugLineDelete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <BotImport_DebugPolygonDelete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BotImport_DebugLineDelete>:
jmp    1030 <BotImport_DebugPolygonDelete@plt>

LLVM IR (-O0):
define void @BotImport_DebugLineDelete(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @BotImport_DebugPolygonDelete(i32 %3)
ret void
}

LLVM IR (-O2):
define void @BotImport_DebugLineDelete(i32 %0) {
%2 = tail call i32 @BotImport_DebugPolygonDelete(i32 %0)
ret void
}
/* Type definitions */
struct Node {
  int dummy;
};

/* Variables and functions */
int findHash(int, int);
int /*<<< orphan*/ insertNode(int, struct Node **);
void insertTable(int key, int buckets, struct Node **tablePtr) {
  int index = findHash(key, buckets);
  insertNode(key, &tablePtr[index]);
}


x86 assembly (clang, -O0):
<insertTable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <findHash@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rsi
call   1030 <insertNode@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insertTable>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %edi,%ebp
call   1040 <findHash@plt>
cltq
lea    (%rbx,%rax,8),%rsi
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <insertNode@plt>

LLVM IR (-O0):
%struct.Node = type { i32 }
define void @insertTable(i32 %0, i32 %1, %struct.Node** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.Node**
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.Node** %2, %struct.Node*** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call i32 @findHash(i32 %8, i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %4
%12 = load %struct.Node**, %struct.Node*** %6
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds %struct.Node*, %struct.Node** %12, i64 %14
%16 = call i32 @insertNode(i32 %11, %struct.Node** %15)
ret void
}

LLVM IR (-O2):
%struct.Node = type { i32 }
define void @insertTable(i32 %0, i32 %1, %struct.Node** %2) {
%4 = tail call i32 @findHash(i32 %0, i32 %1)
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds %struct.Node*, %struct.Node** %2, i64 %5
%7 = tail call i32 @insertNode(i32 %0, %struct.Node** %6)
ret void
}
int G_is_little_endian(void) {
  union {
    int testWord;
    char testByte[sizeof(int)];
  } endianTest;
  endianTest.testWord = 1;
  if (endianTest.testByte[0] == 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<G_is_little_endian>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
movsbl -0x8(%rbp),%eax
cmp    $0x1,%eax
jne    1124 <G_is_little_endian+0x24>
movl   $0x1,-0x4(%rbp)
jmp    112b <G_is_little_endian+0x2b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<G_is_little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define i32 @G_is_little_endian() {
%1 = alloca i32
%2 = alloca %union.anon
%3 = bitcast %union.anon* %2 to i32*
store i32 1, i32* %3
%4 = bitcast %union.anon* %2 to [4 x i8]*
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 1, i32* %1
br label %11
10: ; preds = %0
store i32 0, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @G_is_little_endian() {
ret i32 1
}
unsigned long xorshf96(void) {
  static unsigned long x = 123456789, y = 362436069, z = 521288629;
  unsigned long t;
  x ^= x << 16;
  x ^= x >> 5;
  x ^= x << 1;
  t = x;
  x = y;
  y = z;
  z = t ^ x ^ y;
  return z;
}


x86 assembly (clang, -O0):
<xorshf96>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
shl    $0x10,%rax
xor    0x2f0a(%rip),%rax
mov    %rax,0x2f03(%rip)
mov    0x2efc(%rip),%rax
shr    $0x5,%rax
xor    0x2ef1(%rip),%rax
mov    %rax,0x2eea(%rip)
mov    0x2ee3(%rip),%rax
shl    $0x1,%rax
xor    0x2ed8(%rip),%rax
mov    %rax,0x2ed1(%rip)
mov    0x2eca(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    0x2ec7(%rip),%rax
mov    %rax,0x2eb8(%rip)
mov    0x2ec1(%rip),%rax
mov    %rax,0x2eb2(%rip)
mov    -0x8(%rbp),%rax
xor    0x2e9f(%rip),%rax
xor    0x2ea0(%rip),%rax
mov    %rax,0x2ea1(%rip)
mov    0x2e9a(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xorshf96>:
mov    0x2f19(%rip),%rax
mov    %rax,%rcx
shl    $0x10,%rcx
xor    %rax,%rcx
mov    %rcx,%rax
shr    $0x5,%rax
xor    %rcx,%rax
lea    (%rax,%rax,1),%rcx
xor    %rax,%rcx
mov    0x2eff(%rip),%rdx
mov    %rdx,0x2ef0(%rip)
mov    0x2ef9(%rip),%rax
mov    %rax,0x2eea(%rip)
xor    %rdx,%rax
xor    %rcx,%rax
mov    %rax,0x2ee5(%rip)
ret

LLVM IR (-O0):
@xorshf96.x = internal global i64 123456789
@xorshf96.y = internal global i64 362436069
@xorshf96.z = internal global i64 521288629
define i64 @xorshf96() {
%1 = alloca i64
%2 = load i64, i64* @xorshf96.x
%3 = shl i64 %2, 16
%4 = load i64, i64* @xorshf96.x
%5 = xor i64 %4, %3
store i64 %5, i64* @xorshf96.x
%6 = load i64, i64* @xorshf96.x
%7 = lshr i64 %6, 5
%8 = load i64, i64* @xorshf96.x
%9 = xor i64 %8, %7
store i64 %9, i64* @xorshf96.x
%10 = load i64, i64* @xorshf96.x
%11 = shl i64 %10, 1
%12 = load i64, i64* @xorshf96.x
%13 = xor i64 %12, %11
store i64 %13, i64* @xorshf96.x
%14 = load i64, i64* @xorshf96.x
store i64 %14, i64* %1
%15 = load i64, i64* @xorshf96.y
store i64 %15, i64* @xorshf96.x
%16 = load i64, i64* @xorshf96.z
store i64 %16, i64* @xorshf96.y
%17 = load i64, i64* %1
%18 = load i64, i64* @xorshf96.x
%19 = xor i64 %17, %18
%20 = load i64, i64* @xorshf96.y
%21 = xor i64 %19, %20
store i64 %21, i64* @xorshf96.z
%22 = load i64, i64* @xorshf96.z
ret i64 %22
}

LLVM IR (-O2):
@xorshf96.x = internal unnamed_addr global i64 123456789
@xorshf96.y = internal unnamed_addr global i64 362436069
@xorshf96.z = internal unnamed_addr global i64 521288629
define i64 @xorshf96() {
%1 = load i64, i64* @xorshf96.x
%2 = shl i64 %1, 16
%3 = xor i64 %2, %1
%4 = lshr i64 %3, 5
%5 = xor i64 %4, %3
%6 = shl i64 %5, 1
%7 = xor i64 %6, %5
%8 = load i64, i64* @xorshf96.y
store i64 %8, i64* @xorshf96.x
%9 = load i64, i64* @xorshf96.z
store i64 %9, i64* @xorshf96.y
%10 = xor i64 %9, %8
%11 = xor i64 %10, %7
store i64 %11, i64* @xorshf96.z
ret i64 %11
}
unsigned long util_cpu_ctime(void) { return 0UL; }


x86 assembly (clang, -O0):
<util_cpu_ctime>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_cpu_ctime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @util_cpu_ctime() {
ret i64 0
}

LLVM IR (-O2):
define i64 @util_cpu_ctime() {
ret i64 0
}
int libextfs_version() { return 1; }


x86 assembly (clang, -O0):
<libextfs_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libextfs_version>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @libextfs_version() {
ret i32 1
}

LLVM IR (-O2):
define i32 @libextfs_version() {
ret i32 1
}
void fa71(void) {
P0A:
  goto P0A;
  ({
    a:
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    p01C:
      goto p01C;
      goto a;
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa71>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa71+0x4>

x86 assembly (clang, -O2):
<fa71>:
jmp    1100 <fa71>

LLVM IR (-O0):
define void @fa71() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %8
br label %10
10: ; preds = %10, %9
br label %10
11: ; preds = %11
br label %11
12: ; No predecessors!
br label %13
13: ; preds = %13, %12
br label %13
14: ; preds = %14
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa71() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
const char *selftest(void) { return (NULL); }


x86 assembly (clang, -O0):
<selftest>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<selftest>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @selftest() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @selftest() {
ret i8* null
}
int test_imm_6Fint8_mem(signed char *val) {
  return ((*val) & (-0x6F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Fint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff91,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Fint8_mem>:
testb  $0x91,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Fint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -111
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Fint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -111
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
long read_device_file_long(size_t, char *);
long get_brightness(size_t led_number) {
  return read_device_file_long(led_number, "brightness");
}


x86 assembly (clang, -O0):
<get_brightness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <read_device_file_long@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_brightness>:
lea    0xee9(%rip),%rsi
jmp    1030 <read_device_file_long@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"brightness\00"
define i64 @get_brightness(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @read_device_file_long(i64 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i64 %4
}

LLVM IR (-O2):
@.str = [11 x i8] c"brightness\00"
define i64 @get_brightness(i64 %0) {
%2 = tail call i64 @read_device_file_long(i64 %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i64 %2
}
unsigned short SSKeys() {
  unsigned short ss_keys = *((volatile short *)0x9ffcc00);
  if (ss_keys == 0xffff) {
    ss_keys = 0x0000;
  }
  return ss_keys;
}


x86 assembly (clang, -O0):
<SSKeys>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9ffcc00,%eax
mov    (%rax),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
cmp    $0xffff,%eax
jne    1125 <SSKeys+0x25>
movw   $0x0,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSKeys>:
movzwl 0x9ffcc00,%ecx
09
xor    %eax,%eax
cmp    $0xffff,%cx
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @SSKeys() {
%1 = alloca i16
%2 = load volatile i16, i16* inttoptr (i64 167758848 to i16*)
store i16 %2, i16* %1
%3 = load i16, i16* %1
%4 = zext i16 %3 to i32
%5 = icmp eq i32 %4, 65535
br i1 %5, label %6, label %7
6: ; preds = %0
store i16 0, i16* %1
br label %7
7: ; preds = %6, %0
%8 = load i16, i16* %1
ret i16 %8
}

LLVM IR (-O2):
define zeroext i16 @SSKeys() {
%1 = load volatile i16, i16* inttoptr (i64 167758848 to i16*)
%2 = icmp eq i16 %1, -1
%3 = select i1 %2, i16 0, i16 %1
ret i16 %3
}