xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int getParameter(unsigned int, int /*<<< orphan*/);
int /*<<< orphan*/ uart_puts(unsigned char *);
unsigned int wrapper_uart_write(unsigned int pc, unsigned int sp,
                                unsigned int spsr) {
  unsigned int addr = getParameter(sp, 0);
  uart_puts((unsigned char *)addr);
  return sp;
}


x86 assembly (clang, -O0):
<wrapper_uart_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%edi
xor    %esi,%esi
call   1030 <getParameter@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,%edi
call   1040 <uart_puts@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_uart_write>:
push   %rbx
mov    %esi,%ebx
mov    %esi,%edi
xor    %esi,%esi
call   1030 <getParameter@plt>
mov    %eax,%edi
call   1040 <uart_puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @wrapper_uart_write(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = call i32 @getParameter(i32 %8, i32 0)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i8*
%13 = call i32 @uart_puts(i8* %12)
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @wrapper_uart_write(i32 %0, i32 returned %1, i32 %2) {
%4 = tail call i32 @getParameter(i32 %1, i32 0)
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @uart_puts(i8* %6)
ret i32 %1
}
int getdents64(int fd, struct linux_dirent64 *de, int len) {
  int r;
  __asm__ __volatile__("\tint $0x80\n"
                       : "=a"(r)
                       : "a"(220), "b"(fd), "c"(de), "d"(len)
                       : "memory");
  return r;
}


x86 assembly (clang, -O0):
<getdents64>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0xc(%rbp),%ebx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%edx
mov    $0xdc,%eax
int    $0x80
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<getdents64>:
push   %rbx
mov    %rsi,%rcx
mov    %edi,%ebx
mov    $0xdc,%eax
int    $0x80
pop    %rbx
ret

LLVM IR (-O0):
%struct.linux_dirent64 = type opaque
define i32 @getdents64(i32 %0, %struct.linux_dirent64* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.linux_dirent64*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store %struct.linux_dirent64* %1, %struct.linux_dirent64** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load %struct.linux_dirent64*, %struct.linux_dirent64** %5
%10 = load i32, i32* %6
%11 = call i32 asm sideeffect "\09int $$0x80\0A", "={ax},{ax},{bx},{cx},{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 220, i32 %8, %struct.linux_dirent64* %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
%struct.linux_dirent64 = type opaque
define i32 @getdents64(i32 %0, %struct.linux_dirent64* %1, i32 %2) {
%4 = tail call i32 asm sideeffect "\09int $$0x80\0A", "={ax},{ax},{bx},{cx},{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 220, i32 %0, %struct.linux_dirent64* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
size_t __attribute__((pure)) strlen(const char *string) {
  const char *ret = string;
  while (*string++ != '\0')
    continue;
  return string - 1 - ret;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1130 <strlen+0x30>
jmp    1110 <strlen+0x10>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %5
br label %5
12: ; preds = %5
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 -1
%15 = load i8*, i8** %3
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
ret i64 %18
}

LLVM IR (-O2):
define i64 @strlen(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %4, %2 ]
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %3
%6 = icmp eq i8 %5, 0
br i1 %6, label %7, label %2
7: ; preds = %2
%8 = ptrtoint i8* %3 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
ret i64 %10
}
char *lou_version() {
  static char *version = "liblouis-2.5.2";
  return version;
}


x86 assembly (clang, -O0):
<lou_version>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lou_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@lou_version.version = internal global i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i32 0, i32 0)
@.str = [15 x i8] c"liblouis-2.5.2\00"
define i8* @lou_version() {
%1 = load i8*, i8** @lou_version.version
ret i8* %1
}

LLVM IR (-O2):
@.str = [15 x i8] c"liblouis-2.5.2\00"
define i8* @lou_version() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}
int get_bit_at_position(int number, int position) {
  int bit_at_position;
  bit_at_position = number & (1 << position);
  return bit_at_position == 0 ? 0 : 1;
}


x86 assembly (clang, -O0):
<get_bit_at_position>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bit_at_position>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @get_bit_at_position(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = shl i32 1, %7
%9 = and i32 %6, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 0, i32 1
ret i32 %13
}

LLVM IR (-O2):
define i32 @get_bit_at_position(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
char *strrchr(const char *p, int ch) {
  char *save;
  char c;
  c = ch;
  for (save = NULL;; ++p) {
    if (*p == c)
      save = (char *)p;
    if (*p == '\0')
      return (save);
  }
}


x86 assembly (clang, -O0):
<strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,-0x19(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x19(%rbp),%ecx
cmp    %ecx,%eax
jne    1134 <strrchr+0x34>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    114a <strrchr+0x4a>
mov    -0x18(%rbp),%rax
pop    %rbp
ret
jmp    114f <strrchr+0x4f>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1119 <strrchr+0x19>

x86 assembly (clang, -O2):
<strrchr>:
movsbl %sil,%ecx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
movsbl (%rdi),%edx
cmp    %edx,%ecx
cmove  %rdi,%rax
add    $0x1,%rdi
test   %edx,%edx
jne    1110 <strrchr+0x10>
ret

LLVM IR (-O0):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = trunc i32 %7 to i8
store i8 %8, i8* %6
store i8* null, i8** %5
br label %9
9: ; preds = %26, %2
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = load i8, i8* %6
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %12, %14
br i1 %15, label %16, label %18
16: ; preds = %9
%17 = load i8*, i8** %3
store i8* %17, i8** %5
br label %18
18: ; preds = %16, %9
%19 = load i8*, i8** %3
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %18
%24 = load i8*, i8** %5
ret i8* %24
25: ; preds = %18
br label %26
26: ; preds = %25
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %3
br label %9
}

LLVM IR (-O2):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = shl i32 %1, 24
%4 = ashr exact i32 %3, 24
br label %5
5: ; preds = %5, %2
%6 = phi i8* [ null, %2 ], [ %11, %5 ]
%7 = phi i8* [ %0, %2 ], [ %13, %5 ]
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %4, %9
%11 = select i1 %10, i8* %7, i8* %6
%12 = icmp eq i8 %8, 0
%13 = getelementptr inbounds i8, i8* %7, i64 1
br i1 %12, label %14, label %5
14: ; preds = %5
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ _shutdown_logging(int /*<<< orphan*/);
void shutdown_logging(void) { _shutdown_logging((0)); }


x86 assembly (clang, -O0):
<shutdown_logging>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <_shutdown_logging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdown_logging>:
xor    %edi,%edi
jmp    1030 <_shutdown_logging@plt>

LLVM IR (-O0):
define void @shutdown_logging() {
%1 = call i32 @_shutdown_logging(i32 0)
ret void
}

LLVM IR (-O2):
define void @shutdown_logging() {
%1 = tail call i32 @_shutdown_logging(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *);
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *p;
  if ((p = malloc(size)) == NULL)
    err(1, "malloc");
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1154 <xmalloc+0x34>
mov    $0x1,%edi
lea    0xeb1(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113f <xmalloc+0x1f>
lea    0xecb(%rip),%rsi
mov    $0x1,%edi
call   1030 <err@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"malloc\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @err(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
@.str = [7 x i8] c"malloc\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void Em_EEPROM_1_Stop(void) {}


x86 assembly (clang, -O0):
<Em_EEPROM_1_Stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Em_EEPROM_1_Stop>:
ret

LLVM IR (-O0):
define void @Em_EEPROM_1_Stop() {
ret void
}

LLVM IR (-O2):
define void @Em_EEPROM_1_Stop() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void gpio_status_free() {
  system("echo 4 > /sys/class/gpio/unexport");
  system("echo 1 > /sys/class/gpio/unexport");
}


x86 assembly (clang, -O0):
<gpio_status_free>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
lea    0xefb(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_status_free>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
lea    0xefe(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"echo 4 > /sys/class/gpio/unexport\00"
@.str.1 = [34 x i8] c"echo 1 > /sys/class/gpio/unexport\00"
define void @gpio_status_free() {
%1 = call i32 @system(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"echo 4 > /sys/class/gpio/unexport\00"
@.str.1 = [34 x i8] c"echo 1 > /sys/class/gpio/unexport\00"
define void @gpio_status_free() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: tinjpage [--sniper]\n"
                  "Test hwpoison injection on pages in various states\n"
                  "--mce-inject    Use mce-inject for injection\n"
                  "--sniper  Enable racy sniper tests (likely broken)\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [175 x i8] c"Usage: tinjpage [--sniper]\0ATest hwpoison injection on pages in various states\0A--mce-inject Use mce-inject for injection\0A--sniper Enable racy sniper tests (likely broken)\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([175 x i8], [175 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [175 x i8] c"Usage: tinjpage [--sniper]\0ATest hwpoison injection on pages in various states\0A--mce-inject Use mce-inject for injection\0A--sniper Enable racy sniper tests (likely broken)\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([175 x i8], [175 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct mloop_signal {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mloop_default();
int /*<<< orphan*/ mloop_exit(int /*<<< orphan*/);
void on_signal_event(struct mloop_signal *sig, int signo) {
  (void)sig;
  (void)signo;
  mloop_exit(mloop_default());
}


x86 assembly (clang, -O0):
<on_signal_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <mloop_default@plt>
mov    %eax,%edi
call   1040 <mloop_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_signal_event>:
push   %rax
xor    %eax,%eax
call   1030 <mloop_default@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <mloop_exit@plt>

LLVM IR (-O0):
%struct.mloop_signal = type { i32 }
define void @on_signal_event(%struct.mloop_signal* %0, i32 %1) {
%3 = alloca %struct.mloop_signal*
%4 = alloca i32
store %struct.mloop_signal* %0, %struct.mloop_signal** %3
store i32 %1, i32* %4
%5 = load %struct.mloop_signal*, %struct.mloop_signal** %3
%6 = load i32, i32* %4
%7 = call i32 (...) @mloop_default()
%8 = call i32 @mloop_exit(i32 %7)
ret void
}

LLVM IR (-O2):
%struct.mloop_signal = type { i32 }
define void @on_signal_event(%struct.mloop_signal* nocapture readnone %0, i32 %1) {
%3 = tail call i32 (...) @mloop_default()
%4 = tail call i32 @mloop_exit(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ performance_tests();
int main() {
  performance_tests();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <performance_tests@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <performance_tests@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @performance_tests()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @performance_tests()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int position;
};
typedef TYPE_1__ XIMPreeditCaretCallbackStruct;

/* Variables and functions */
void set_XIMPreeditCaretCallbackStruct_position(void *_p, int _v) {
  ((XIMPreeditCaretCallbackStruct *)_p)->position = (int)_v;
}


x86 assembly (clang, -O0):
<set_XIMPreeditCaretCallbackStruct_position>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XIMPreeditCaretCallbackStruct_position>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XIMPreeditCaretCallbackStruct_position(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XIMPreeditCaretCallbackStruct_position(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
unsigned long outl(unsigned long, int);
unsigned long outl_p(unsigned long val, int port) { return (outl(val, port)); }


x86 assembly (clang, -O0):
<outl_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <outl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outl_p>:
jmp    1030 <outl@plt>

LLVM IR (-O0):
define i64 @outl_p(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = call i64 @outl(i64 %5, i32 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @outl_p(i64 %0, i32 %1) {
%3 = tail call i64 @outl(i64 %0, i32 %1)
ret i64 %3
}
f(int i) { return !!i; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int readDevice(FILE *fpDeviceName) { return (fgetc(fpDeviceName)); }


x86 assembly (clang, -O0):
<readDevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readDevice>:
jmp    1030 <fgetc@plt>

LLVM IR (-O0):
define i32 @readDevice(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fgetc(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @readDevice(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ __analyzer_eval(int);
void test_3(int flag, unsigned int i) {
  if (!flag) {
    return;
  }
  __analyzer_eval(flag);
  if (i > 0) {
    __analyzer_eval(i > 0);
    __analyzer_eval(flag);
  } else {
    __analyzer_eval(i <= 0);
    __analyzer_eval(flag);
  }
  __analyzer_eval(flag);
}


x86 assembly (clang, -O0):
<test_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    112d <test_3+0x1d>
jmp    117e <test_3+0x6e>
mov    -0x4(%rbp),%edi
call   1030 <__analyzer_eval@plt>
cmpl   $0x0,-0x8(%rbp)
jbe    115d <test_3+0x4d>
cmpl   $0x0,-0x8(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
mov    -0x4(%rbp),%edi
call   1030 <__analyzer_eval@plt>
jmp    1176 <test_3+0x66>
cmpl   $0x0,-0x8(%rbp)
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
mov    -0x4(%rbp),%edi
call   1030 <__analyzer_eval@plt>
mov    -0x4(%rbp),%edi
call   1030 <__analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_3>:
test   %edi,%edi
je     1135 <test_3+0x25>
push   %rbx
mov    %edi,%ebx
call   1030 <__analyzer_eval@plt>
mov    $0x1,%edi
call   1030 <__analyzer_eval@plt>
mov    %ebx,%edi
call   1030 <__analyzer_eval@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <__analyzer_eval@plt>
ret

LLVM IR (-O0):
define void @test_3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
br label %30
8: ; preds = %2
%9 = load i32, i32* %3
%10 = call i32 @__analyzer_eval(i32 %9)
%11 = load i32, i32* %4
%12 = icmp ugt i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = load i32, i32* %4
%15 = icmp ugt i32 %14, 0
%16 = zext i1 %15 to i32
%17 = call i32 @__analyzer_eval(i32 %16)
%18 = load i32, i32* %3
%19 = call i32 @__analyzer_eval(i32 %18)
br label %27
20: ; preds = %8
%21 = load i32, i32* %4
%22 = icmp ule i32 %21, 0
%23 = zext i1 %22 to i32
%24 = call i32 @__analyzer_eval(i32 %23)
%25 = load i32, i32* %3
%26 = call i32 @__analyzer_eval(i32 %25)
br label %27
27: ; preds = %20, %13
%28 = load i32, i32* %3
%29 = call i32 @__analyzer_eval(i32 %28)
br label %30
30: ; preds = %27, %7
ret void
}

LLVM IR (-O2):
define void @test_3(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = tail call i32 @__analyzer_eval(i32 %0)
%6 = tail call i32 @__analyzer_eval(i32 1)
%7 = tail call i32 @__analyzer_eval(i32 %0)
%8 = tail call i32 @__analyzer_eval(i32 %0)
br label %9
9: ; preds = %2, %4
ret void
}
unsigned int reverse32bits(unsigned int x) {
  x = ((x >> 1) & 0x55555555u) | ((x & 0x55555555u) << 1);
  x = ((x >> 2) & 0x33333333u) | ((x & 0x33333333u) << 2);
  x = ((x >> 4) & 0x0f0f0f0fu) | ((x & 0x0f0f0f0fu) << 4);
  x = ((x >> 8) & 0x00ff00ffu) | ((x & 0x00ff00ffu) << 8);
  x = ((x >> 16) & 0xffffu) | ((x & 0xffffu) << 16);
  return x;
}


x86 assembly (clang, -O0):
<reverse32bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
and    $0x55555555,%eax
mov    -0x4(%rbp),%ecx
and    $0x55555555,%ecx
shl    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
and    $0x33333333,%eax
mov    -0x4(%rbp),%ecx
and    $0x33333333,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x4,%eax
and    $0xf0f0f0f,%eax
mov    -0x4(%rbp),%ecx
and    $0xf0f0f0f,%ecx
shl    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
and    $0xff00ff,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00ff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
and    $0xffff,%eax
mov    -0x4(%rbp),%ecx
and    $0xffff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse32bits>:
bswap  %edi
mov    %edi,%eax
and    $0xf0f0f0f,%eax
shl    $0x4,%eax
shr    $0x4,%edi
and    $0xf0f0f0f,%edi
or     %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
lea    (%rdi,%rax,4),%eax
mov    %eax,%ecx
and    $0x55555555,%ecx
shr    %eax
and    $0x55555555,%eax
lea    (%rax,%rcx,2),%eax
ret

LLVM IR (-O0):
define i32 @reverse32bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 1
%5 = and i32 %4, 1431655765
%6 = load i32, i32* %2
%7 = and i32 %6, 1431655765
%8 = shl i32 %7, 1
%9 = or i32 %5, %8
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = lshr i32 %10, 2
%12 = and i32 %11, 858993459
%13 = load i32, i32* %2
%14 = and i32 %13, 858993459
%15 = shl i32 %14, 2
%16 = or i32 %12, %15
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = lshr i32 %17, 4
%19 = and i32 %18, 252645135
%20 = load i32, i32* %2
%21 = and i32 %20, 252645135
%22 = shl i32 %21, 4
%23 = or i32 %19, %22
store i32 %23, i32* %2
%24 = load i32, i32* %2
%25 = lshr i32 %24, 8
%26 = and i32 %25, 16711935
%27 = load i32, i32* %2
%28 = and i32 %27, 16711935
%29 = shl i32 %28, 8
%30 = or i32 %26, %29
store i32 %30, i32* %2
%31 = load i32, i32* %2
%32 = lshr i32 %31, 16
%33 = and i32 %32, 65535
%34 = load i32, i32* %2
%35 = and i32 %34, 65535
%36 = shl i32 %35, 16
%37 = or i32 %33, %36
store i32 %37, i32* %2
%38 = load i32, i32* %2
ret i32 %38
}

LLVM IR (-O2):
define i32 @reverse32bits(i32 %0) {
%2 = tail call i32 @llvm.bitreverse.i32(i32 %0)
ret i32 %2
}
int test_imm_93int64_highword_reg(long long val) {
  return ((val >> 32) & (0x93 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_93int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x93,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_93int64_highword_reg>:
movabs $0x9300000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_93int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 147
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_93int64_highword_reg(i64 %0) {
%2 = and i64 %0, 631360192512
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ strcasecmp(char const *, char const *);
int equals(const char *a, const char *b) {
  return (strcasecmp(a, b) == 0) ? 1 : 0;
}


x86 assembly (clang, -O0):
<equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<equals>:
push   %rax
call   1030 <strcasecmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @equals(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcasecmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 1, i32 0
ret i32 %10
}

LLVM IR (-O2):
define i32 @equals(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strcasecmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
float sqrt(int /*<<< orphan*/);
__attribute__((unit(1))) float h(void) { return sqrt(0); }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <sqrt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
xor    %edi,%edi
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @h() {
%1 = call float @sqrt(i32 0)
ret float %1
}

LLVM IR (-O2):
define float @h() {
%1 = tail call float @sqrt(i32 0)
ret float %1
}
/* Variables and functions */
int /*<<< orphan*/ roadmap_help_show(char *);
void roadmap_help_street(void) { roadmap_help_show("street"); }


x86 assembly (clang, -O0):
<roadmap_help_street>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <roadmap_help_show@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_help_street>:
lea    0xee9(%rip),%rdi
jmp    1030 <roadmap_help_show@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"street\00"
define void @roadmap_help_street() {
%1 = call i32 @roadmap_help_show(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"street\00"
define void @roadmap_help_street() {
%1 = tail call i32 @roadmap_help_show(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool PluginPerformOp(char op, int a, int b, int *res) {
  switch (op) {
  case '^':
    *res = a ^ b;
    break;
  default:
    return false;
  }
  return true;
}


x86 assembly (clang, -O0):
<PluginPerformOp>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x5(%rbp),%al
sub    $0x5e,%al
jne    1135 <PluginPerformOp+0x35>
jmp    1124 <PluginPerformOp+0x24>
mov    -0xc(%rbp),%ecx
xor    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
jmp    1141 <PluginPerformOp+0x41>
movl   $0x0,-0x4(%rbp)
jmp    1148 <PluginPerformOp+0x48>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PluginPerformOp>:
xor    %eax,%eax
cmp    $0x5e,%dil
jne    1111 <PluginPerformOp+0x11>
xor    %esi,%edx
mov    %edx,(%rcx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @PluginPerformOp(i8 signext %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
store i8 %0, i8* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
%10 = load i8, i8* %6
%11 = sext i8 %10 to i32
switch i32 %11, label %17 [
i32 94, label %12
]
12: ; preds = %4
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = xor i32 %13, %14
%16 = load i32*, i32** %9
store i32 %15, i32* %16
br label %18
17: ; preds = %4
store i32 0, i32* %5
br label %19
18: ; preds = %12
store i32 1, i32* %5
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @PluginPerformOp(i8 signext %0, i32 %1, i32 %2, i32* nocapture writeonly %3) {
%5 = icmp eq i8 %0, 94
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = xor i32 %2, %1
store i32 %7, i32* %3
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ 1, %6 ], [ 0, %4 ]
ret i32 %9
}
int ld_blg_cr2(long double a1) { return !(__builtin_islessgreater(100, a1)); }


x86 assembly (clang, -O0):
<ld_blg_cr2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
flds   0xeed(%rip)
fucomip %st(1),%st
fstp   %st(0)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_blg_cr2>:
fldt   0x8(%rsp)
flds   0xef6(%rip)
xor    %eax,%eax
fucomip %st(1),%st
fstp   %st(0)
sete   %al
ret

LLVM IR (-O0):
define i32 @ld_blg_cr2(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp one x86_fp80 0xK4005C800000000000000, %3
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ld_blg_cr2(x86_fp80 %0) {
%2 = fcmp ueq x86_fp80 %0, 0xK4005C800000000000000
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void clear_bit(uint8_t *bitfield, int bit) {
  bitfield[bit / 8] &= ~(1 << (7 - (bit % 8)));
}


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    $0x7,%ecx
sub    %edx,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
lea    0x7(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
mov    %eax,%ecx
and    $0xfffffff8,%ecx
sub    %ecx,%esi
mov    $0x7,%cl
sub    %sil,%cl
mov    $0xfffffffe,%edx
rol    %cl,%edx
sar    $0x3,%eax
cltq
and    %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @clear_bit(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = srem i32 %5, 8
%7 = sub nsw i32 7, %6
%8 = shl i32 1, %7
%9 = xor i32 %8, -1
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = sdiv i32 %11, 8
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %10, i64 %13
%15 = load i32, i32* %14
%16 = and i32 %15, %9
store i32 %16, i32* %14
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32* nocapture %0, i32 %1) {
%3 = srem i32 %1, 8
%4 = sub nsw i32 7, %3
%5 = shl nuw nsw i32 1, %4
%6 = xor i32 %5, -1
%7 = sdiv i32 %1, 8
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = and i32 %10, %6
store i32 %11, i32* %9
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int x;
};
struct TYPE_4__ {
  TYPE_1__ xkey;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xkey_x(void *_p, int _v) { ((XEvent *)_p)->xkey.x = (int)_v; }


x86 assembly (clang, -O0):
<set_XEvent_xkey_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xkey_x>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xkey_x(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xkey_x(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
void die(const char *message) {
  perror(message);
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @die(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int check_ack();
int /*<<< orphan*/ write_cmd(int);
int stm_cmd(int cmd) {
  write_cmd(cmd);
  return check_ack();
}


x86 assembly (clang, -O0):
<stm_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <write_cmd@plt>
mov    $0x0,%al
call   1030 <check_ack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stm_cmd>:
push   %rax
call   1040 <write_cmd@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <check_ack@plt>

LLVM IR (-O0):
define i32 @stm_cmd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @write_cmd(i32 %3)
%5 = call i32 (...) @check_ack()
ret i32 %5
}

LLVM IR (-O2):
define i32 @stm_cmd(i32 %0) {
%2 = tail call i32 @write_cmd(i32 %0)
%3 = tail call i32 (...) @check_ack()
ret i32 %3
}
int ds9_frame(void *p) { return 0; }


x86 assembly (clang, -O0):
<ds9_frame>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds9_frame>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ds9_frame(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ds9_frame(i8* nocapture readnone %0) {
ret i32 0
}
void gtk_tree_path_free() {}


x86 assembly (clang, -O0):
<gtk_tree_path_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_path_free>:
ret

LLVM IR (-O0):
define void @gtk_tree_path_free() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_path_free() {
ret void
}
/* Variables and functions */
int byte_at(size_t, size_t, int /*<<< orphan*/);
int zero_at(size_t start, size_t len) { return byte_at(start, len, 0); }


x86 assembly (clang, -O0):
<zero_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <byte_at@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_at>:
xor    %edx,%edx
jmp    1030 <byte_at@plt>

LLVM IR (-O0):
define i32 @zero_at(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @byte_at(i64 %5, i64 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @zero_at(i64 %0, i64 %1) {
%3 = tail call i32 @byte_at(i64 %0, i64 %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int slk_clear();
int wrap_slk_clear(void) { return slk_clear(); }


x86 assembly (clang, -O0):
<wrap_slk_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <slk_clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_slk_clear>:
xor    %eax,%eax
jmp    1030 <slk_clear@plt>

LLVM IR (-O0):
define i32 @wrap_slk_clear() {
%1 = call i32 (...) @slk_clear()
ret i32 %1
}

LLVM IR (-O2):
define i32 @wrap_slk_clear() {
%1 = tail call i32 (...) @slk_clear()
ret i32 %1
}
/* Variables and functions */
int *malloc(uintptr_t);
bool *mallocBool(uintptr_t numBools) {
  bool *temp = NULL;
  temp = malloc(numBools * sizeof(bool));
  return temp;
}


x86 assembly (clang, -O0):
<mallocBool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocBool>:
shl    $0x2,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @mallocBool(i64 %0) {
%2 = alloca i64
%3 = alloca i32*
store i64 %0, i64* %2
store i32* null, i32** %3
%4 = load i64, i64* %2
%5 = mul i64 %4, 4
%6 = call i32* @malloc(i64 %5)
store i32* %6, i32** %3
%7 = load i32*, i32** %3
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @mallocBool(i64 %0) {
%2 = shl i64 %0, 2
%3 = tail call i32* @malloc(i64 %2)
ret i32* %3
}
/* Variables and functions */
scalar_t__ malloc(int);
void function_with_memory_allocation() {
  int i = 10000;
  int *p = (int *)malloc(sizeof(int) * i);
  for (; i >= 0; --i)
    *p = i;
}


x86 assembly (clang, -O0):
<function_with_memory_allocation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2710,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1153 <function_with_memory_allocation+0x43>
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1132 <function_with_memory_allocation+0x22>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_with_memory_allocation>:
push   %rax
mov    $0x9c40,%edi
call   1030 <malloc@plt>
mov    $0x2712,%ecx
mov    %ecx,%edx
lea    -0x6(%rdx),%ecx
add    $0xfffffffe,%edx
cmp    $0x4,%edx
jg     1120 <function_with_memory_allocation+0x10>
mov    %ecx,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @function_with_memory_allocation() {
%1 = alloca i32
%2 = alloca i32*
store i32 10000, i32* %1
%3 = load i32, i32* %1
%4 = sext i32 %3 to i64
%5 = mul i64 4, %4
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to i32*
store i32* %8, i32** %2
br label %9
9: ; preds = %15, %0
%10 = load i32, i32* %1
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = load i32, i32* %1
%14 = load i32*, i32** %2
store i32 %13, i32* %14
br label %15
15: ; preds = %12
%16 = load i32, i32* %1
%17 = add nsw i32 %16, -1
store i32 %17, i32* %1
br label %9
18: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @function_with_memory_allocation() {
%1 = tail call i64 @malloc(i32 40000)
br label %2
2: ; preds = %2, %0
%3 = phi i32 [ 10000, %0 ], [ %5, %2 ]
%4 = icmp sgt i32 %3, 4
%5 = add nsw i32 %3, -6
br i1 %4, label %2, label %6
6: ; preds = %2
%7 = add nsw i32 %3, -4
%8 = inttoptr i64 %1 to i32*
store i32 %7, i32* %8
ret void
}
int bissexto(int ano) {
  return (ano % 400 == 0) || (ano % 4 == 0 && ano % 100 != 0);
}


x86 assembly (clang, -O0):
<bissexto>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
je     1153 <bissexto+0x53>
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x6(%rbp)
jne    114d <bissexto+0x4d>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bissexto>:
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%eax
ror    $0x4,%eax
cmp    $0xa3d70b,%eax
jb     1121 <bissexto+0x21>
xor    %eax,%eax
test   $0x3,%dil
je     1127 <bissexto+0x27>
ret
mov    $0x1,%eax
ret
ror    $0x2,%ecx
xor    %eax,%eax
cmp    $0x28f5c29,%ecx
setae  %al
ret

LLVM IR (-O0):
define i32 @bissexto(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 400
%5 = icmp eq i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i32, i32* %2
%12 = srem i32 %11, 100
%13 = icmp ne i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ false, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ true, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @bissexto(i32 %0) {
%2 = srem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = and i32 %0, 3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 100
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 1, %1 ], [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
char *getDefaultDir();
int /*<<< orphan*/ sprintf(char *, char *, char *, char *, char *);
const char *getSettingsFileName() {
  static char fn[1024];
  sprintf(fn, "%s%s%s", getDefaultDir(), "/", "settings");
  return fn;
}


x86 assembly (clang, -O0):
<getSettingsFileName>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getDefaultDir@plt>
mov    %rax,%rdx
lea    0x2f0b(%rip),%rdi
lea    0xec4(%rip),%rsi
lea    0xec4(%rip),%rcx
lea    0xebf(%rip),%r8
call   1040 <sprintf@plt>
lea    0x2eea(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSettingsFileName>:
push   %rbx
xor    %eax,%eax
call   1030 <getDefaultDir@plt>
lea    0x2f11(%rip),%rbx
lea    0xeca(%rip),%rsi
lea    0xeca(%rip),%rcx
lea    0xec5(%rip),%r8
mov    %rbx,%rdi
mov    %rax,%rdx
call   1040 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@getSettingsFileName.fn = internal global [1024 x i8] zeroinitializer
@.str = [7 x i8] c"%s%s%s\00"
@.str.1 = [2 x i8] c"/\00"
@.str.2 = [9 x i8] c"settings\00"
define i8* @getSettingsFileName() {
%1 = call i8* (...) @getDefaultDir()
%2 = call i32 @sprintf(i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @getSettingsFileName.fn, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0))
ret i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @getSettingsFileName.fn, i64 0, i64 0)
}

LLVM IR (-O2):
@getSettingsFileName.fn = internal global [1024 x i8] zeroinitializer
@.str = [7 x i8] c"%s%s%s\00"
@.str.1 = [2 x i8] c"/\00"
@.str.2 = [9 x i8] c"settings\00"
define i8* @getSettingsFileName() {
%1 = tail call i8* (...) @getDefaultDir()
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([1024 x i8], [1024 x i8]* @getSettingsFileName.fn, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0))
ret i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @getSettingsFileName.fn, i64 0, i64 0)
}
void RSAPublicKey_dup(void) {}


x86 assembly (clang, -O0):
<RSAPublicKey_dup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSAPublicKey_dup>:
ret

LLVM IR (-O0):
define void @RSAPublicKey_dup() {
ret void
}

LLVM IR (-O2):
define void @RSAPublicKey_dup() {
ret void
}
/* Variables and functions */
double __infer_nondet_double();
double fabs(double x) { return __infer_nondet_double(); }


x86 assembly (clang, -O0):
<fabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabs>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_double@plt>

LLVM IR (-O0):
define double @fabs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call double (...) @__infer_nondet_double()
ret double %3
}

LLVM IR (-O2):
define double @fabs(double %0) {
%2 = tail call double (...) @__infer_nondet_double()
ret double %2
}
/* Variables and functions */
int siptlw(int c) {
  if (c >= 'A' && c <= 'Z') {
    return c + ('a' - 'A');
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<siptlw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     1129 <siptlw+0x29>
cmpl   $0x5a,-0x8(%rbp)
jg     1129 <siptlw+0x29>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <siptlw+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<siptlw>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @siptlw(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @siptlw(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
void hist_finish() {}


x86 assembly (clang, -O0):
<hist_finish>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hist_finish>:
ret

LLVM IR (-O0):
define void @hist_finish() {
ret void
}

LLVM IR (-O2):
define void @hist_finish() {
ret void
}