xunge/DecIR huggingface dataset:
int check_arg_type(const char *argv) {
  switch ((char)*argv) {
  case 'b':
  case 'c':
  case 'd':
  case 'p':
  case 'f':
  case 'l':
  case 's':
    return 1;
    break;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<check_arg_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
add    $0xffffff9e,%eax
sub    $0x3,%eax
jb     1167 <check_arg_type+0x67>
jmp    1123 <check_arg_type+0x23>
mov    -0x14(%rbp),%eax
sub    $0x66,%eax
je     1167 <check_arg_type+0x67>
jmp    1134 <check_arg_type+0x34>
mov    -0x14(%rbp),%eax
sub    $0x6c,%eax
je     1167 <check_arg_type+0x67>
jmp    1145 <check_arg_type+0x45>
mov    -0x14(%rbp),%eax
sub    $0x70,%eax
je     1167 <check_arg_type+0x67>
jmp    1156 <check_arg_type+0x56>
mov    -0x14(%rbp),%eax
sub    $0x73,%eax
jne    1173 <check_arg_type+0x73>
jmp    1167 <check_arg_type+0x67>
movl   $0x1,-0x4(%rbp)
jmp    117a <check_arg_type+0x7a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_arg_type>:
movsbl (%rdi),%ecx
add    $0xffffff9e,%ecx
cmp    $0x11,%ecx
ja     111b <check_arg_type+0x1b>
mov    $0x1,%eax
mov    $0x24417,%edx
bt     %ecx,%edx
jae    111b <check_arg_type+0x1b>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_arg_type(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
switch i32 %6, label %8 [
i32 98, label %7
i32 99, label %7
i32 100, label %7
i32 112, label %7
i32 102, label %7
i32 108, label %7
i32 115, label %7
]
7: ; preds = %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @check_arg_type(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
switch i32 %3, label %4 [
i32 98, label %5
i32 99, label %5
i32 100, label %5
i32 112, label %5
i32 102, label %5
i32 108, label %5
i32 115, label %5
]
4: ; preds = %1
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %4
%6 = phi i32 [ 0, %4 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
double __ieee754_acos(double);
double jacos(double x) { return __ieee754_acos(x); }


x86 assembly (clang, -O0):
<jacos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ieee754_acos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jacos>:
jmp    1030 <__ieee754_acos@plt>

LLVM IR (-O0):
define double @jacos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ieee754_acos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @jacos(double %0) {
%2 = tail call double @__ieee754_acos(double %0)
ret double %2
}
unsigned long test2(unsigned long w) {
  if ((w & 0xffff0000) == 0) {
    if (w == 0)
      w = 2;
  }
  return w;
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xffff0000,%rax
and    -0x8(%rbp),%rax
cmp    $0x0,%rax
jne    1138 <test2+0x38>
cmpq   $0x0,-0x8(%rbp)
jne    1133 <test2+0x33>
movq   $0x2,-0x8(%rbp)
jmp    1138 <test2+0x38>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
test   %rdi,%rdi
mov    $0x2,%eax
cmovne %rdi,%rax
ret

LLVM IR (-O0):
define i64 @test2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 4294901760
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i64, i64* %2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i64 2, i64* %2
br label %10
10: ; preds = %9, %6
br label %11
11: ; preds = %10, %1
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
define i64 @test2(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = select i1 %2, i64 2, i64 %0
ret i64 %3
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t get_4b6b_symbol(uint8_t const in_symbol) {
  static uint8_t s_symbols[16] = {0x15, 0x31, 0x32, 0x23, 0x34, 0x25,
                                  0x26, 0x16, 0x1A, 0x19, 0x2A, 0x0B,
                                  0x2C, 0x0D, 0x0E, 0x1C};
  return s_symbols[in_symbol];
}


x86 assembly (clang, -O0):
<get_4b6b_symbol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
lea    0x2f1e(%rip),%rax
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_4b6b_symbol>:
movslq %edi,%rax
lea    0xef6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
@get_4b6b_symbol.s_symbols = internal global [16 x i32] [i32 21, i32 49, i32 50, i32 35, i32 52, i32 37, i32 38, i32 22, i32 26, i32 25, i32 42, i32 11, i32 44, i32 13, i32 14, i32 28]
define i32 @get_4b6b_symbol(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [16 x i32], [16 x i32]* @get_4b6b_symbol.s_symbols, i64 0, i64 %4
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
@get_4b6b_symbol.s_symbols = internal unnamed_addr constant [16 x i32] [i32 21, i32 49, i32 50, i32 35, i32 52, i32 37, i32 38, i32 22, i32 26, i32 25, i32 42, i32 11, i32 44, i32 13, i32 14, i32 28]
define i32 @get_4b6b_symbol(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds [16 x i32], [16 x i32]* @get_4b6b_symbol.s_symbols, i64 0, i64 %2
%4 = load i32, i32* %3
ret i32 %4
}
int test_imm_C8uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xc8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8uint64_lowword_mem>:
testb  $0xc8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 200
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C8uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 200
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct ra_record {
  int dummy;
};

/* Variables and functions */
int merge_record(struct ra_record *, int, int);
int smallest_gap(struct ra_record *, int);
int reduce_blocks(struct ra_record *record, int count, int target) {
  while (count > target) {
    int tomerge;
    tomerge = smallest_gap(record, count);
    count = merge_record(record, count, tomerge);
  }
  return count;
}


x86 assembly (clang, -O0):
<reduce_blocks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1164 <reduce_blocks+0x44>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <smallest_gap@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <merge_record@plt>
mov    %eax,-0xc(%rbp)
jmp    1132 <reduce_blocks+0x12>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reduce_blocks>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
cmp    %edx,%esi
jle    114d <reduce_blocks+0x2d>
mov    %edx,%r14d
mov    %rdi,%rbp
mov    %rbp,%rdi
mov    %ebx,%esi
call   1030 <smallest_gap@plt>
mov    %rbp,%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1040 <merge_record@plt>
mov    %eax,%ebx
cmp    %r14d,%eax
jg     1130 <reduce_blocks+0x10>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.ra_record = type { i32 }
define i32 @reduce_blocks(%struct.ra_record* %0, i32 %1, i32 %2) {
%4 = alloca %struct.ra_record*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store %struct.ra_record* %0, %struct.ra_record** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %8
8: ; preds = %12, %3
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %20
12: ; preds = %8
%13 = load %struct.ra_record*, %struct.ra_record** %4
%14 = load i32, i32* %5
%15 = call i32 @smallest_gap(%struct.ra_record* %13, i32 %14)
store i32 %15, i32* %7
%16 = load %struct.ra_record*, %struct.ra_record** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = call i32 @merge_record(%struct.ra_record* %16, i32 %17, i32 %18)
store i32 %19, i32* %5
br label %8
20: ; preds = %8
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
%struct.ra_record = type { i32 }
define i32 @reduce_blocks(%struct.ra_record* %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, %2
br i1 %4, label %5, label %10
5: ; preds = %3, %5
%6 = phi i32 [ %8, %5 ], [ %1, %3 ]
%7 = tail call i32 @smallest_gap(%struct.ra_record* %0, i32 %6)
%8 = tail call i32 @merge_record(%struct.ra_record* %0, i32 %6, i32 %7)
%9 = icmp sgt i32 %8, %2
br i1 %9, label %5, label %10
10: ; preds = %5, %3
%11 = phi i32 [ %1, %3 ], [ %8, %5 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ z80_ed_45_retn();
void z80_ed_65_retn(void) { z80_ed_45_retn(); }


x86 assembly (clang, -O0):
<z80_ed_65_retn>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <z80_ed_45_retn@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<z80_ed_65_retn>:
xor    %eax,%eax
jmp    1030 <z80_ed_45_retn@plt>

LLVM IR (-O0):
define void @z80_ed_65_retn() {
%1 = call i32 (...) @z80_ed_45_retn()
ret void
}

LLVM IR (-O2):
define void @z80_ed_65_retn() {
%1 = tail call i32 (...) @z80_ed_45_retn()
ret void
}
void zero_poly(int poly[]) {
  int i;
  for (i = 0; i < (109 * 2); i++)
    poly[i] = 0;
}


x86 assembly (clang, -O0):
<zero_poly>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xda,-0xc(%rbp)
jge    1139 <zero_poly+0x39>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <zero_poly+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_poly>:
push   %rax
mov    $0x368,%edx
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @zero_poly(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 218
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 0, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @zero_poly(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to i8*
ret void
}
double min(const double a, const double b) {
  if (b < a)
    return b;
  return a;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <min+0x31>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113b <min+0x3b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
minsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @min(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %5
%7 = load double, double* %4
%8 = fcmp olt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %5
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %4
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @min(double %0, double %1) {
%3 = fcmp olt double %1, %0
%4 = select i1 %3, double %1, double %0
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ display_status(int);
int /*<<< orphan*/ printf(char *);
void boil(int *x) {
  *x = *x * *x;
  printf("In boil(), I got: ");
  display_status(*x);
}


x86 assembly (clang, -O0):
<boil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
imul   (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <display_status@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<boil>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%eax
imul   %eax,%eax
mov    %eax,(%rdi)
lea    0xece(%rip),%rdi
call   1040 <printf@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1030 <display_status@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"In boil(), I got: \00"
define void @boil(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = mul nsw i32 %4, %6
%8 = load i32*, i32** %2
store i32 %7, i32* %8
%9 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%10 = load i32*, i32** %2
%11 = load i32, i32* %10
%12 = call i32 @display_status(i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"In boil(), I got: \00"
define void @boil(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul nsw i32 %2, %2
store i32 %3, i32* %0
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %0
%6 = tail call i32 @display_status(i32 %5)
ret void
}
double OP_LessThan(double op1, double op2) { return op1 < op2; }


x86 assembly (clang, -O0):
<OP_LessThan>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP_LessThan>:
cmpltsd %xmm1,%xmm0
movsd  0xef3(%rip),%xmm1
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @OP_LessThan(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
%8 = zext i1 %7 to i32
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
define double @OP_LessThan(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = uitofp i1 %3 to double
ret double %4
}
/* Type definitions */
struct rfc822a {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rfc822_print_common(struct rfc822a const *,
                                       int /*<<< orphan*/, int /*<<< orphan*/,
                                       void (*)(char, void *),
                                       void (*)(char const *, void *), void *);
void rfc822_print(const struct rfc822a *rfcp, void (*print_func)(char, void *),
                  void (*print_separator)(const char *s, void *), void *ptr) {
  rfc822_print_common(rfcp, 0, 0, print_func, print_separator, ptr);
}


x86 assembly (clang, -O0):
<rfc822_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
xor    %edx,%edx
mov    %edx,%esi
call   1030 <rfc822_print_common@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfc822_print>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <rfc822_print_common@plt>

LLVM IR (-O0):
%struct.rfc822a = type { i32 }
define void @rfc822_print(%struct.rfc822a* %0, void (i8, i8*)* %1, void (i8*, i8*)* %2, i8* %3) {
%5 = alloca %struct.rfc822a*
%6 = alloca void (i8, i8*)*
%7 = alloca void (i8*, i8*)*
%8 = alloca i8*
store %struct.rfc822a* %0, %struct.rfc822a** %5
store void (i8, i8*)* %1, void (i8, i8*)** %6
store void (i8*, i8*)* %2, void (i8*, i8*)** %7
store i8* %3, i8** %8
%9 = load %struct.rfc822a*, %struct.rfc822a** %5
%10 = load void (i8, i8*)*, void (i8, i8*)** %6
%11 = load void (i8*, i8*)*, void (i8*, i8*)** %7
%12 = load i8*, i8** %8
%13 = call i32 @rfc822_print_common(%struct.rfc822a* %9, i32 0, i32 0, void (i8, i8*)* %10, void (i8*, i8*)* %11, i8* %12)
ret void
}

LLVM IR (-O2):
%struct.rfc822a = type { i32 }
define void @rfc822_print(%struct.rfc822a* %0, void (i8, i8*)* %1, void (i8*, i8*)* %2, i8* %3) {
%5 = tail call i32 @rfc822_print_common(%struct.rfc822a* %0, i32 0, i32 0, void (i8, i8*)* %1, void (i8*, i8*)* %2, i8* %3)
ret void
}
void check_rusage_thread(void) {}


x86 assembly (clang, -O0):
<check_rusage_thread>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_rusage_thread>:
ret

LLVM IR (-O0):
define void @check_rusage_thread() {
ret void
}

LLVM IR (-O2):
define void @check_rusage_thread() {
ret void
}
void RTCidrStrToIPv4(void) {}


x86 assembly (clang, -O0):
<RTCidrStrToIPv4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTCidrStrToIPv4>:
ret

LLVM IR (-O0):
define void @RTCidrStrToIPv4() {
ret void
}

LLVM IR (-O2):
define void @RTCidrStrToIPv4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Platform_Halt(int);
long long OPB_BoolToInt(char b) {
  long long _o_result;
  if (b) {
    _o_result = 1;
    return _o_result;
  } else {
    _o_result = 0;
    return _o_result;
  }
__retchk:
  Platform_Halt(-3);
  return 0;
  ;
}


x86 assembly (clang, -O0):
<OPB_BoolToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
cmpb   $0x0,-0x9(%rbp)
je     1129 <OPB_BoolToInt+0x29>
movq   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1139 <OPB_BoolToInt+0x39>
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPB_BoolToInt>:
xor    %eax,%eax
test   %dil,%dil
setne  %al
ret

LLVM IR (-O0):
define i64 @OPB_BoolToInt(i8 signext %0) {
%2 = alloca i64
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
store i64 1, i64* %4
%8 = load i64, i64* %4
store i64 %8, i64* %2
br label %13
9: ; preds = %1
store i64 0, i64* %4
%10 = load i64, i64* %4
store i64 %10, i64* %2
br label %13
11: ; No predecessors!
%12 = call i32 @Platform_Halt(i32 -3)
store i64 0, i64* %2
br label %13
13: ; preds = %11, %9, %7
%14 = load i64, i64* %2
ret i64 %14
}

LLVM IR (-O2):
define i64 @OPB_BoolToInt(i8 signext %0) {
%2 = icmp ne i8 %0, 0
%3 = zext i1 %2 to i64
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void decimalBinario(unsigned int num) {
  int resto;
  int cociente;
  cociente = num / 2;
  resto = num % 2;
  if (cociente > 1)
    decimalBinario(cociente);
  else
    printf("%d", cociente);
  printf("%d", resto);
}


x86 assembly (clang, -O0):
<decimalBinario>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    1154 <decimalBinario+0x34>
mov    -0xc(%rbp),%edi
call   1040 <decimalBinario@plt>
jmp    1163 <decimalBinario+0x43>
mov    -0xc(%rbp),%esi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decimalBinario>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%esi
shr    %esi
cmp    $0x4,%edi
jb     1135 <decimalBinario+0x15>
mov    %esi,%edi
call   1040 <decimalBinario@plt>
jmp    1141 <decimalBinario+0x21>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
and    $0x1,%ebx
lea    0xeb5(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @decimalBinario(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = udiv i32 %5, 2
store i32 %6, i32* %4
%7 = load i32, i32* %2
%8 = urem i32 %7, 2
store i32 %8, i32* %3
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 1
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i32, i32* %4
br label %16
13: ; preds = %1
%14 = load i32, i32* %4
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %14)
br label %16
16: ; preds = %13, %11
%17 = load i32, i32* %3
%18 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %17)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @decimalBinario(i32 %0) {
%2 = lshr i32 %0, 1
%3 = icmp ugt i32 %0, 3
br i1 %3, label %4, label %5
4: ; preds = %1
tail call void @decimalBinario(i32 %2)
br label %7
5: ; preds = %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
br label %7
7: ; preds = %5, %4
%8 = and i32 %0, 1
%9 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}
/* Variables and functions */
int soundInit();
int initialiseModule(void) { return soundInit(); }


x86 assembly (clang, -O0):
<initialiseModule>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <soundInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialiseModule>:
xor    %eax,%eax
jmp    1030 <soundInit@plt>

LLVM IR (-O0):
define i32 @initialiseModule() {
%1 = call i32 (...) @soundInit()
ret i32 %1
}

LLVM IR (-O2):
define i32 @initialiseModule() {
%1 = tail call i32 (...) @soundInit()
ret i32 %1
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
double uniform(void) { return ((double)rand()) / RAND_MAX; }


x86 assembly (clang, -O0):
<uniform>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
divsd  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<uniform>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
divsd  (%rax),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @uniform() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
ret double %4
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @uniform() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
ret double %4
}
int test_imm_AFint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xAF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AFint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xaf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AFint64_midword_mem>:
testb  $0xaf,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AFint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 175
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_AFint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 11468800
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
void fig04_11() {
  unsigned int x;
  for (x = 1; x <= 10; ++x) {
    if (x == 5) {
      break;
    }
    printf("%u ", x);
  }
  printf("\nBroke out of loop at x == %u\n", x);
}


x86 assembly (clang, -O0):
<fig04_11>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
ja     1155 <fig04_11+0x45>
cmpl   $0x5,-0x4(%rbp)
jne    1138 <fig04_11+0x28>
jmp    1155 <fig04_11+0x45>
mov    -0x4(%rbp),%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <fig04_11+0xf>
mov    -0x4(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fig04_11>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xeb1(%rip),%rdi
mov    $0x5,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%u \00"
@.str.1 = [31 x i8] c"\0ABroke out of loop at x == %u\0A\00"
define void @fig04_11() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %12, %0
%3 = load i32, i32* %1
%4 = icmp ule i32 %3, 10
br i1 %4, label %5, label %15
5: ; preds = %2
%6 = load i32, i32* %1
%7 = icmp eq i32 %6, 5
br i1 %7, label %8, label %9
8: ; preds = %5
br label %15
9: ; preds = %5
%10 = load i32, i32* %1
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %12
12: ; preds = %9
%13 = load i32, i32* %1
%14 = add i32 %13, 1
store i32 %14, i32* %1
br label %2
15: ; preds = %8, %2
%16 = load i32, i32* %1
%17 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i32 %16)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%u \00"
@.str.1 = [31 x i8] c"\0ABroke out of loop at x == %u\0A\00"
define void @fig04_11() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 2)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void foo(void *p, int x) {
  if (x > 0) {
    free(p);
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1132 <foo+0x22>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %esi,%esi
jle    1119 <foo+0x9>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @foo(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 @free(i8* %8)
br label %10
10: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @foo(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @free(i8* %0)
br label %6
6: ; preds = %4, %2
ret void
}
void cafebabe_constant_info_integer_deinit(
    struct cafebabe_constant_info_integer *i) {}


x86 assembly (clang, -O0):
<cafebabe_constant_info_integer_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cafebabe_constant_info_integer_deinit>:
ret

LLVM IR (-O0):
%struct.cafebabe_constant_info_integer = type opaque
define void @cafebabe_constant_info_integer_deinit(%struct.cafebabe_constant_info_integer* %0) {
%2 = alloca %struct.cafebabe_constant_info_integer*
store %struct.cafebabe_constant_info_integer* %0, %struct.cafebabe_constant_info_integer** %2
ret void
}

LLVM IR (-O2):
%struct.cafebabe_constant_info_integer = type opaque
define void @cafebabe_constant_info_integer_deinit(%struct.cafebabe_constant_info_integer* nocapture %0) {
ret void
}
/* Variables and functions */
double __ocml_nextafter_f64(double, double);
double nextafter(double x, double y) { return __ocml_nextafter_f64(x, y); }


x86 assembly (clang, -O0):
<nextafter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <__ocml_nextafter_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nextafter>:
jmp    1030 <__ocml_nextafter_f64@plt>

LLVM IR (-O0):
define double @nextafter(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @__ocml_nextafter_f64(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @nextafter(double %0, double %1) {
%3 = tail call double @__ocml_nextafter_f64(double %0, double %1)
ret double %3
}
unsigned long _pointer_hash(void *ptr) { return (long)ptr; }


x86 assembly (clang, -O0):
<_pointer_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pointer_hash>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @_pointer_hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
ret i64 %4
}

LLVM IR (-O2):
define i64 @_pointer_hash(i8* %0) {
%2 = ptrtoint i8* %0 to i64
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ FifoBuffer_fill_and_drain_test();
int /*<<< orphan*/ FifoBuffer_flush_test();
int /*<<< orphan*/ FifoBuffer_multiple_types_test();
int /*<<< orphan*/ FifoBuffer_overflow_test();
int /*<<< orphan*/ FifoBuffer_peek_test();
int /*<<< orphan*/ FifoBuffer_stress_test();
int /*<<< orphan*/ FifoBuffer_writeread_test();
int main() {
  FifoBuffer_writeread_test();
  FifoBuffer_overflow_test();
  FifoBuffer_multiple_types_test();
  FifoBuffer_fill_and_drain_test();
  FifoBuffer_stress_test();
  FifoBuffer_peek_test();
  FifoBuffer_flush_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <FifoBuffer_writeread_test@plt>
mov    $0x0,%al
call   1080 <FifoBuffer_overflow_test@plt>
mov    $0x0,%al
call   1070 <FifoBuffer_multiple_types_test@plt>
mov    $0x0,%al
call   1050 <FifoBuffer_fill_and_drain_test@plt>
mov    $0x0,%al
call   1090 <FifoBuffer_stress_test@plt>
mov    $0x0,%al
call   1060 <FifoBuffer_peek_test@plt>
mov    $0x0,%al
call   1030 <FifoBuffer_flush_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <FifoBuffer_writeread_test@plt>
xor    %eax,%eax
call   1080 <FifoBuffer_overflow_test@plt>
xor    %eax,%eax
call   1070 <FifoBuffer_multiple_types_test@plt>
xor    %eax,%eax
call   1050 <FifoBuffer_fill_and_drain_test@plt>
xor    %eax,%eax
call   1090 <FifoBuffer_stress_test@plt>
xor    %eax,%eax
call   1060 <FifoBuffer_peek_test@plt>
xor    %eax,%eax
call   1030 <FifoBuffer_flush_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @FifoBuffer_writeread_test()
%3 = call i32 (...) @FifoBuffer_overflow_test()
%4 = call i32 (...) @FifoBuffer_multiple_types_test()
%5 = call i32 (...) @FifoBuffer_fill_and_drain_test()
%6 = call i32 (...) @FifoBuffer_stress_test()
%7 = call i32 (...) @FifoBuffer_peek_test()
%8 = call i32 (...) @FifoBuffer_flush_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @FifoBuffer_writeread_test()
%2 = tail call i32 (...) @FifoBuffer_overflow_test()
%3 = tail call i32 (...) @FifoBuffer_multiple_types_test()
%4 = tail call i32 (...) @FifoBuffer_fill_and_drain_test()
%5 = tail call i32 (...) @FifoBuffer_stress_test()
%6 = tail call i32 (...) @FifoBuffer_peek_test()
%7 = tail call i32 (...) @FifoBuffer_flush_test()
ret i32 0
}
int pmm_location_to_block(unsigned int loc) { return loc / 4096; }


x86 assembly (clang, -O0):
<pmm_location_to_block>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmm_location_to_block>:
mov    %edi,%eax
shr    $0xc,%eax
ret

LLVM IR (-O0):
define i32 @pmm_location_to_block(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = udiv i32 %3, 4096
ret i32 %4
}

LLVM IR (-O2):
define i32 @pmm_location_to_block(i32 %0) {
%2 = lshr i32 %0, 12
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int foo(int);
int main() {
  if (foo(-0x7fffffff - 1) != -1)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x80000000,%edi
call   1040 <foo@plt>
cmp    $0xffffffff,%eax
je     1149 <main+0x29>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x80000000,%edi
call   1040 <foo@plt>
cmp    $0xffffffff,%eax
jne    1134 <main+0x14>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 -2147483648)
%3 = icmp ne i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 -2147483648)
%2 = icmp eq i32 %1, -1
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
double sched_clock();
double start_time() { return sched_clock(); }


x86 assembly (clang, -O0):
<start_time>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_clock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_time>:
xor    %eax,%eax
jmp    1030 <sched_clock@plt>

LLVM IR (-O0):
define double @start_time() {
%1 = call double (...) @sched_clock()
ret double %1
}

LLVM IR (-O2):
define double @start_time() {
%1 = tail call double (...) @sched_clock()
ret double %1
}
void test(int x) {
  int r = x < 0 ? -x : x;
  if (r == 0)
    (void)0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <test+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <test+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1139 <test+0x39>
jmp    1139 <test+0x39>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 0, %7
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11
br label %16
16: ; preds = %15, %11
ret void
}

LLVM IR (-O2):
define void @test(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *, int, char const *);
int /*<<< orphan*/ stderr;
void fatal_error(const char *expression, const char *file, int line,
                 const char *function) {
  fprintf(stderr,
          "Fatal assertion failure in function %s at %s:%d\nFailed test: %s\n",
          function, file, line, expression);
  abort();
}


x86 assembly (clang, -O0):
<fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    -0x8(%rbp),%r9
lea    0xea9(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<fatal_error>:
push   %rax
mov    %edx,%r8d
mov    %rsi,%rax
mov    %rdi,%r9
mov    0x2eaf(%rip),%rdx
mov    (%rdx),%edi
lea    0xec6(%rip),%rsi
mov    %rcx,%rdx
mov    %rax,%rcx
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [65 x i8] c"Fatal assertion failure in function %s at %s:%d\0AFailed test: %s\0A\00"
define void @fatal_error(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %8
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %5
%14 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i8* %10, i8* %11, i32 %12, i8* %13)
%15 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [65 x i8] c"Fatal assertion failure in function %s at %s:%d\0AFailed test: %s\0A\00"
define void @fatal_error(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %1, i32 %2, i8* %0)
%7 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
struct FluffRandom {
  int dummy;
};

/* Variables and functions */
int fluff_random_random(struct FluffRandom *);
int fluff_random_range(struct FluffRandom *self, int min, int max) {
  int diff = max - min;
  int choice;
  choice = (int)(fluff_random_random(self) * diff);
  return choice + min;
}


x86 assembly (clang, -O0):
<fluff_random_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fluff_random_random@plt>
imul   -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fluff_random_range>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
sub    %esi,%ebx
call   1030 <fluff_random_random@plt>
imul   %ebx,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.FluffRandom = type { i32 }
define i32 @fluff_random_range(%struct.FluffRandom* %0, i32 %1, i32 %2) {
%4 = alloca %struct.FluffRandom*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.FluffRandom* %0, %struct.FluffRandom** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = sub nsw i32 %9, %10
store i32 %11, i32* %7
%12 = load %struct.FluffRandom*, %struct.FluffRandom** %4
%13 = call i32 @fluff_random_random(%struct.FluffRandom* %12)
%14 = load i32, i32* %7
%15 = mul nsw i32 %13, %14
store i32 %15, i32* %8
%16 = load i32, i32* %8
%17 = load i32, i32* %5
%18 = add nsw i32 %16, %17
ret i32 %18
}

LLVM IR (-O2):
%struct.FluffRandom = type { i32 }
define i32 @fluff_random_range(%struct.FluffRandom* %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %2, %1
%5 = tail call i32 @fluff_random_random(%struct.FluffRandom* %0)
%6 = mul nsw i32 %5, %4
%7 = add nsw i32 %6, %1
ret i32 %7
}
void _debug_puts(const char *s) {}


x86 assembly (clang, -O0):
<_debug_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_debug_puts>:
ret

LLVM IR (-O0):
define void @_debug_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @_debug_puts(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int strncasecmp(char *, char *, int);
void strncasecmp_diff_length_6() {
  char *x = "aBDe";
  char *y = "abc";
  if (strncasecmp(x, y, 3) != 1)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strncasecmp_diff_length_6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xedb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%edx
call   1030 <strncasecmp@plt>
cmp    $0x1,%eax
je     1149 <strncasecmp_diff_length_6+0x39>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncasecmp_diff_length_6>:
ret

LLVM IR (-O0):
@.str = [5 x i8] c"aBDe\00"
@.str.1 = [4 x i8] c"abc\00"
define void @strncasecmp_diff_length_6() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strncasecmp(i8* %3, i8* %4, i32 3)
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i8, i8* null
br label %9
9: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
define void @strncasecmp_diff_length_6() {
ret void
}
void gencvt_l_s() {}


x86 assembly (clang, -O0):
<gencvt_l_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gencvt_l_s>:
ret

LLVM IR (-O0):
define void @gencvt_l_s() {
ret void
}

LLVM IR (-O2):
define void @gencvt_l_s() {
ret void
}
/* Variables and functions */
scalar_t__ errno;
int msync(void *addr, size_t length, int flags) {
  errno = 0;
  return 0;
}


x86 assembly (clang, -O0):
<msync>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eca(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msync>:
mov    0x2ed9(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
ret

LLVM IR (-O0):
@errno = global i64 0
define i32 @msync(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
store i64 0, i64* @errno
ret i32 0
}

LLVM IR (-O2):
@errno = global i64 0
define i32 @msync(i8* nocapture readnone %0, i64 %1, i32 %2) {
store i64 0, i64* @errno
ret i32 0
}
int test_imm_7Aint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x7A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Aint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x7a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Aint64_highword_mem>:
testb  $0x7a,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Aint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 122
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Aint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 523986010112
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int __gen_tempname(char *, int, int, int /*<<< orphan*/);
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int mkostemps(char *template, int suffixlen, int flags) {
  if (suffixlen < 0) {
    __set_errno(EINVAL);
    return -1;
  }
  return __gen_tempname(template, suffixlen, flags, 0);
}


x86 assembly (clang, -O0):
<mkostemps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1156 <mkostemps+0x36>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116a <mkostemps+0x4a>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
xor    %ecx,%ecx
call   1040 <__gen_tempname@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkostemps>:
test   %esi,%esi
js     112b <mkostemps+0xb>
xor    %ecx,%ecx
jmp    1040 <__gen_tempname@plt>
push   %rax
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @mkostemps(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i32, i32* @EINVAL
%12 = call i32 @__set_errno(i32 %11)
store i32 -1, i32* %4
br label %18
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = load i32, i32* %7
%17 = call i32 @__gen_tempname(i8* %14, i32 %15, i32 %16, i32 0)
store i32 %17, i32* %4
br label %18
18: ; preds = %13, %10
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @mkostemps(i8* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = load i32, i32* @EINVAL
%7 = tail call i32 @__set_errno(i32 %6)
br label %10
8: ; preds = %3
%9 = tail call i32 @__gen_tempname(i8* %0, i32 %1, i32 %2, i32 0)
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ -1, %5 ], [ %9, %8 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeEthernetMII(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000066, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeEthernetMII>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x66,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeEthernetMII>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x66,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeEthernetMII(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 102, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeEthernetMII(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 102, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int tr_subtree_usage() {
  fprintf(stderr, "Usage: treebest subtree <tree> <list>\n");
  return 1;
}


x86 assembly (clang, -O0):
<tr_subtree_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tr_subtree_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [39 x i8] c"Usage: treebest subtree <tree> <list>\0A\00"
define i32 @tr_subtree_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [39 x i8] c"Usage: treebest subtree <tree> <list>\0A\00"
define i32 @tr_subtree_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 1
}