xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void UnsafePrint2(char *string, int integer) {
COFLO_NOT_THREADSAFE:
  printf(string);
  printf("%d\n", integer);
}


x86 assembly (clang, -O0):
<UnsafePrint2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0xc(%rbp),%esi
lea    0xecc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnsafePrint2>:
push   %rbx
mov    %esi,%ebx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @UnsafePrint2(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %2
%6 = load i8*, i8** %3
%7 = call i32 (i8*, ...) @printf(i8* %6)
%8 = load i32, i32* %4
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @UnsafePrint2(i8* nocapture %0, i32 %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) %0)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xb5() {
  Assert_real((isalnum(181) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              910, ("isalnum should be 0 for 0xb5"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xb5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb5,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x38e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xb5>:
push   %rax
mov    $0xb5,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x38e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xb5\00"
define void @t_isalnum_0xb5() {
%1 = call i64 @isalnum(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xb5\00"
define void @t_isalnum_0xb5() {
%1 = tail call i64 @isalnum(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ log_info(char *);
int /*<<< orphan*/ terminate();
void sigalarm_handler(int sig) {
  log_info("timer expired ...");
  terminate();
  exit(0);
}


x86 assembly (clang, -O0):
<sigalarm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xebe(%rip),%rdi
call   1030 <log_info@plt>
mov    $0x0,%al
call   1040 <terminate@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<sigalarm_handler>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <log_info@plt>
xor    %eax,%eax
call   1040 <terminate@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"timer expired ...\00"
define void @sigalarm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @log_info(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @terminate()
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [18 x i8] c"timer expired ...\00"
define void @sigalarm_handler(i32 %0) {
%2 = tail call i32 @log_info(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @terminate()
%4 = tail call i32 @exit(i32 0)
unreachable
}
void swap(char **x, char **y) {
  char *t = *x;
  *x = *y;
  *y = t;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
mov    %rcx,(%rdi)
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
%5 = alloca i8*
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8* %7, i8** %5
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = load i8**, i8*** %3
store i8* %9, i8** %10
%11 = load i8*, i8** %5
%12 = load i8**, i8*** %4
store i8* %11, i8** %12
ret void
}

LLVM IR (-O2):
define void @swap(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
store i8* %4, i8** %0
store i8* %3, i8** %1
ret void
}
void mpi_set_arrays(void) {
  void mpi_set_arrays_multidimen(void);
  void mpi_set_arrays_perpoint_perline(void);
  mpi_set_arrays_perpoint_perline();
  mpi_set_arrays_multidimen();
}


x86 assembly (clang, -O0):
<mpi_set_arrays>:
push   %rbp
mov    %rsp,%rbp
call   1040 <mpi_set_arrays_perpoint_perline@plt>
call   1030 <mpi_set_arrays_multidimen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpi_set_arrays>:
push   %rax
call   1040 <mpi_set_arrays_perpoint_perline@plt>
pop    %rax
jmp    1030 <mpi_set_arrays_multidimen@plt>

LLVM IR (-O0):
define void @mpi_set_arrays() {
ret void
}

LLVM IR (-O2):
define void @mpi_set_arrays() {
tail call void @mpi_set_arrays_perpoint_perline()
tail call void @mpi_set_arrays_multidimen()
ret void
}
/* Type definitions */
struct utmpx {
  int dummy;
};
struct utmp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ memcpy(struct utmp *, struct utmpx const *, int);
void __getutmp(const struct utmpx *utmpx, struct utmp *utmp) {
  assert(sizeof(struct utmp) == sizeof(struct utmpx));
  memcpy(utmp, utmpx, sizeof(struct utmp));
}


x86 assembly (clang, -O0):
<__getutmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1040 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__getutmp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    $0x1,%edi
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x4,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
%struct.utmpx = type { i32 }
%struct.utmp = type { i32 }
define void @__getutmp(%struct.utmpx* %0, %struct.utmp* %1) {
%3 = alloca %struct.utmpx*
%4 = alloca %struct.utmp*
store %struct.utmpx* %0, %struct.utmpx** %3
store %struct.utmp* %1, %struct.utmp** %4
%5 = call i32 @assert(i32 1)
%6 = load %struct.utmp*, %struct.utmp** %4
%7 = load %struct.utmpx*, %struct.utmpx** %3
%8 = call i32 @memcpy(%struct.utmp* %6, %struct.utmpx* %7, i32 4)
ret void
}

LLVM IR (-O2):
%struct.utmpx = type { i32 }
%struct.utmp = type { i32 }
define void @__getutmp(%struct.utmpx* %0, %struct.utmp* %1) {
%3 = tail call i32 @assert(i32 1)
%4 = tail call i32 @memcpy(%struct.utmp* %1, %struct.utmpx* %0, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fork();
int getpid();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("my pid is %d\n", getpid());
  fork();
  fork();
  fork();
  printf("my pid is %d\n", getpid());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xe87(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xec1(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <fork@plt>
xor    %eax,%eax
call   1050 <fork@plt>
xor    %eax,%eax
call   1050 <fork@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"my pid is %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getpid()
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @fork()
%5 = call i32 (...) @fork()
%6 = call i32 (...) @fork()
%7 = call i32 (...) @getpid()
%8 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"my pid is %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @fork()
%4 = tail call i32 (...) @fork()
%5 = tail call i32 (...) @fork()
%6 = tail call i32 (...) @getpid()
%7 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
void glmMultVectorByScalar2f(float v[2], float a) {
  v[0] *= a;
  v[1] *= a;
}


x86 assembly (clang, -O0):
<glmMultVectorByScalar2f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  (%rax),%xmm0
movss  %xmm0,(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
movss  %xmm0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmMultVectorByScalar2f>:
movss  (%rdi),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
mulss  0x4(%rdi),%xmm0
movss  %xmm0,0x4(%rdi)
ret

LLVM IR (-O0):
define void @glmMultVectorByScalar2f(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
store float* %0, float** %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float*, float** %3
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = fmul float %8, %5
store float %9, float* %7
%10 = load float, float* %4
%11 = load float*, float** %3
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = fmul float %13, %10
store float %14, float* %12
ret void
}

LLVM IR (-O2):
define void @glmMultVectorByScalar2f(float* nocapture %0, float %1) {
%3 = load float, float* %0
%4 = fmul float %3, %1
store float %4, float* %0
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = fmul float %6, %1
store float %7, float* %5
ret void
}
void usbCableDetectInit(void) {}


x86 assembly (clang, -O0):
<usbCableDetectInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usbCableDetectInit>:
ret

LLVM IR (-O0):
define void @usbCableDetectInit() {
ret void
}

LLVM IR (-O2):
define void @usbCableDetectInit() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int rotr(int, int);
uint32_t gamma1(uint32_t x) { return rotr(x, 17) ^ rotr(x, 19) ^ (x >> 10); }


x86 assembly (clang, -O0):
<gamma1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x11,%esi
call   1030 <rotr@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x13,%esi
call   1030 <rotr@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
xor    %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0xa,%ecx
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gamma1>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x11,%esi
call   1030 <rotr@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    $0x13,%esi
call   1030 <rotr@plt>
sar    $0xa,%ebx
xor    %ebp,%ebx
xor    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @gamma1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @rotr(i32 %3, i32 17)
%5 = load i32, i32* %2
%6 = call i32 @rotr(i32 %5, i32 19)
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = ashr i32 %8, 10
%10 = xor i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @gamma1(i32 %0) {
%2 = tail call i32 @rotr(i32 %0, i32 17)
%3 = tail call i32 @rotr(i32 %0, i32 19)
%4 = ashr i32 %0, 10
%5 = xor i32 %2, %4
%6 = xor i32 %5, %3
ret i32 %6
}
int test_60_4(int *mem) { return __atomic_fetch_xor(mem + 4, 1, 4); }


x86 assembly (clang, -O0):
<test_60_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x10,%rcx
mov    %rcx,-0x20(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    0x10(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
xor    %esi,%edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    1153 <test_60_4+0x53>
jmp    112a <test_60_4+0x2a>
mov    -0x24(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_60_4>:
mov    0x10(%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%ecx
xor    $0x1,%ecx
lock cmpxchg %ecx,0x10(%rdi)
jne    1110 <test_60_4+0x10>
ret

LLVM IR (-O0):
define i32 @test_60_4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 4
store i32 1, i32* %3
%7 = load i32, i32* %3
%8 = atomicrmw xor i32* %6, i32 %7 acq_rel
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_60_4(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = atomicrmw xor i32* %2, i32 1 acq_rel
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ menu_principal(int *);
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int main() {
  int terminal;
  srand(time(NULL));
  terminal = rand() % 1000;
  menu_principal(&terminal);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1050 <menu_principal@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1050 <menu_principal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @time(i32* null)
%4 = call i32 @srand(i32 %3)
%5 = call i32 (...) @rand()
%6 = srem i32 %5, 1000
store i32 %6, i32* %2
%7 = call i32 @menu_principal(i32* %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i32* null)
%4 = tail call i32 @srand(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 1000
store i32 %6, i32* %1
%7 = call i32 @menu_principal(i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PWMupdate(int);
int /*<<< orphan*/ PotSetpoint(int);
void CoolingStart() {
  PotSetpoint(40);
  PWMupdate(20);
}


x86 assembly (clang, -O0):
<CoolingStart>:
push   %rbp
mov    %rsp,%rbp
mov    $0x28,%edi
call   1030 <PotSetpoint@plt>
mov    $0x14,%edi
call   1040 <PWMupdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CoolingStart>:
push   %rax
mov    $0x28,%edi
call   1030 <PotSetpoint@plt>
mov    $0x14,%edi
pop    %rax
jmp    1040 <PWMupdate@plt>

LLVM IR (-O0):
define void @CoolingStart() {
%1 = call i32 @PotSetpoint(i32 40)
%2 = call i32 @PWMupdate(i32 20)
ret void
}

LLVM IR (-O2):
define void @CoolingStart() {
%1 = tail call i32 @PotSetpoint(i32 40)
%2 = tail call i32 @PWMupdate(i32 20)
ret void
}
double linearphi2(double lp) { return 1; }


x86 assembly (clang, -O0):
<linearphi2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<linearphi2>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @linearphi2(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @linearphi2(double %0) {
ret double 1.000000e+00
}
double dbl_mul_sub(double a, double c) { return (a * a) - c; }


x86 assembly (clang, -O0):
<dbl_mul_sub>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbl_mul_sub>:
mulsd  %xmm0,%xmm0
subsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dbl_mul_sub(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fneg double %7
%9 = call double @llvm.fmuladd.f64(double %5, double %6, double %8)
ret double %9
}

LLVM IR (-O2):
define double @dbl_mul_sub(double %0, double %1) {
%3 = fneg double %1
%4 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %3)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ native_irq_enable();
void arch_local_irq_enable(void) { native_irq_enable(); }


x86 assembly (clang, -O0):
<arch_local_irq_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <native_irq_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_local_irq_enable>:
xor    %eax,%eax
jmp    1030 <native_irq_enable@plt>

LLVM IR (-O0):
define void @arch_local_irq_enable() {
%1 = call i32 (...) @native_irq_enable()
ret void
}

LLVM IR (-O2):
define void @arch_local_irq_enable() {
%1 = tail call i32 (...) @native_irq_enable()
ret void
}
void INT_Excep_ICU_IRQ8(void) {}


x86 assembly (clang, -O0):
<INT_Excep_ICU_IRQ8>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_ICU_IRQ8>:
ret

LLVM IR (-O0):
define void @INT_Excep_ICU_IRQ8() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_ICU_IRQ8() {
ret void
}
int pathconN_nm6_n_in(void) { return 1; }


x86 assembly (clang, -O0):
<pathconN_nm6_n_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm6_n_in>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pathconN_nm6_n_in() {
ret i32 1
}

LLVM IR (-O2):
define i32 @pathconN_nm6_n_in() {
ret i32 1
}
char *strchr(char *haystack, int needle) {
  while (*haystack != needle && *haystack) {
    haystack++;
  }
  if (*haystack != needle)
    return 0;
  return haystack;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    -0x14(%rbp),%ecx
mov    %al,-0x15(%rbp)
je     1130 <strchr+0x30>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1140 <strchr+0x40>
jmp    1151 <strchr+0x51>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchr+0xb>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
je     116e <strchr+0x6e>
movq   $0x0,-0x8(%rbp)
jmp    1176 <strchr+0x76>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
add    $0xffffffffffffffff,%rdi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl 0x1(%rdi),%ecx
add    $0x1,%rdi
test   %ecx,%ecx
je     1120 <strchr+0x20>
cmp    %esi,%ecx
jne    1110 <strchr+0x10>
xor    %eax,%eax
cmp    %esi,%ecx
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = icmp ne i32 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %6
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br label %17
17: ; preds = %12, %6
%18 = phi i1 [ false, %6 ], [ %16, %12 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %17
%23 = load i8*, i8** %4
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = load i32, i32* %5
%27 = icmp ne i32 %25, %26
br i1 %27, label %28, label %29
28: ; preds = %22
store i8* null, i8** %3
br label %31
29: ; preds = %22
%30 = load i8*, i8** %4
store i8* %30, i8** %3
br label %31
31: ; preds = %29, %28
%32 = load i8*, i8** %3
ret i8* %32
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, %1
%8 = icmp eq i8 %5, 0
%9 = or i1 %8, %7
%10 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %9, label %11, label %3
11: ; preds = %3
%12 = select i1 %7, i8* %4, i8* null
ret i8* %12
}
int cmp_gt(long arg1, long arg2) { return arg1 <= arg2; }


x86 assembly (clang, -O0):
<cmp_gt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setle  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_gt>:
xor    %eax,%eax
cmp    %rsi,%rdi
setle  %al
ret

LLVM IR (-O0):
define i32 @cmp_gt(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sle i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @cmp_gt(i64 %0, i64 %1) {
%3 = icmp sle i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void quadd_proc_deinit(void) {}


x86 assembly (clang, -O0):
<quadd_proc_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quadd_proc_deinit>:
ret

LLVM IR (-O0):
define void @quadd_proc_deinit() {
ret void
}

LLVM IR (-O2):
define void @quadd_proc_deinit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
int strncmp(char const *, char const *, int /*<<< orphan*/);
int str_starts_with(const char *prefix, const char *str) {
  int starts_with;
  starts_with = strncmp(prefix, str, strlen(prefix));
  return starts_with == 0;
}


x86 assembly (clang, -O0):
<str_starts_with>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_starts_with>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @str_starts_with(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @strncmp(i8* %6, i8* %7, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @str_starts_with(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
unsigned xrop3_35_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~D;
  stk2 = T & stk3;
  stk1 = S | stk2;
  stk1 = ~stk1;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_35_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_35_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %ecx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_35_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
%34 = load i32, i32* %6
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %7
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = load i32, i32* %6
%42 = and i32 %40, %41
%43 = or i32 %39, %42
%44 = load i32, i32* %5
%45 = load i32, i32* %7
%46 = and i32 %44, %45
%47 = or i32 %43, %46
ret i32 %47
}

LLVM IR (-O2):
define i32 @xrop3_35_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = or i32 %6, %4
%8 = xor i32 %7, -1
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
ret i32 %11
}
/* Type definitions */
struct UPnPService {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void AVRCP_ResponseSink_RenderingControl_SetMute(struct UPnPService *Service,
                                                 int ErrorCode, void *User) {
  printf("AVRCP_ Invoke Response: RenderingControl/SetMute[ErrorCode:%d]()\r\n",
         ErrorCode);
}


x86 assembly (clang, -O0):
<AVRCP_ResponseSink_RenderingControl_SetMute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AVRCP_ResponseSink_RenderingControl_SetMute>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.UPnPService = type { i32 }
@.str = [67 x i8] c"AVRCP_ Invoke Response: RenderingControl/SetMute[ErrorCode:%d]()\0D\0A\00"
define void @AVRCP_ResponseSink_RenderingControl_SetMute(%struct.UPnPService* %0, i32 %1, i8* %2) {
%4 = alloca %struct.UPnPService*
%5 = alloca i32
%6 = alloca i8*
store %struct.UPnPService* %0, %struct.UPnPService** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @printf(i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
%struct.UPnPService = type { i32 }
@.str = [67 x i8] c"AVRCP_ Invoke Response: RenderingControl/SetMute[ErrorCode:%d]()\0D\0A\00"
define void @AVRCP_ResponseSink_RenderingControl_SetMute(%struct.UPnPService* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint32_t;

/* Variables and functions */
uint32_t get_32(const uint32_t *p) { return *p; }


x86 assembly (clang, -O0):
<get_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_32(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Variables and functions */
scalar_t__ dreml(long double, long double);
int /*<<< orphan*/ link_failure_dreml();
void test_dreml(long double ld1, long double ld2) {
  if (dreml(ld1, ld2) != dreml(ld1, ld2))
    link_failure_dreml();
}


x86 assembly (clang, -O0):
<test_dreml>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <dreml@plt>
mov    %rax,-0x28(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <dreml@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
je     1175 <test_dreml+0x55>
mov    $0x0,%al
call   1030 <link_failure_dreml@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_dreml>:
push   %rbx
sub    $0x40,%rsp
fldt   0x50(%rsp)
fld    %st(0)
fstpt  0x34(%rsp)
fldt   0x60(%rsp)
fld    %st(0)
fstpt  0x28(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
call   1040 <dreml@plt>
mov    %rax,%rbx
fldt   0x28(%rsp)
fstpt  0x10(%rsp)
fldt   0x34(%rsp)
fstpt  (%rsp)
call   1040 <dreml@plt>
cmp    %rax,%rbx
jne    1167 <test_dreml+0x47>
add    $0x40,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
jmp    1030 <link_failure_dreml@plt>

LLVM IR (-O0):
define void @test_dreml(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @dreml(x86_fp80 %5, x86_fp80 %6)
%8 = load x86_fp80, x86_fp80* %3
%9 = load x86_fp80, x86_fp80* %4
%10 = call i64 @dreml(x86_fp80 %8, x86_fp80 %9)
%11 = icmp ne i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @link_failure_dreml()
br label %14
14: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @test_dreml(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @dreml(x86_fp80 %0, x86_fp80 %1)
%4 = tail call i64 @dreml(x86_fp80 %0, x86_fp80 %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @link_failure_dreml()
br label %8
8: ; preds = %6, %2
ret void
}
int fib_isxdigit(const char x) {
  if ((x >= '0' && x <= '9') || (x >= 'a' && x <= 'f') ||
      (x >= 'A' && x <= 'F'))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<fib_isxdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <fib_isxdigit+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1158 <fib_isxdigit+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     113e <fib_isxdigit+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jle    1158 <fib_isxdigit+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1164 <fib_isxdigit+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jg     1164 <fib_isxdigit+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <fib_isxdigit+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib_isxdigit>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%al
setb   %al
and    $0xdf,%dil
add    $0xbf,%dil
cmp    $0x6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @fib_isxdigit(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 102
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 65
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 70
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @fib_isxdigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
int timezone_set(const char *ifname, int ifindex, const char *timezone) {
  return 0;
}


x86 assembly (clang, -O0):
<timezone_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timezone_set>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @timezone_set(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @timezone_set(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
typedef int const uint8_t;

/* Variables and functions */
uint8_t linux_WEXITSTATUS(int const status) { return (status & 0xFF00) >> 8; }


x86 assembly (clang, -O0):
<linux_WEXITSTATUS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linux_WEXITSTATUS>:
mov    %edi,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @linux_WEXITSTATUS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
ret i32 %5
}

LLVM IR (-O2):
define i32 @linux_WEXITSTATUS(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 255
ret i32 %3
}
int test_imm_5Fint32_reg(int val) { return ((val) & (0x5F << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_5Fint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x5f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Fint32_reg>:
test   $0x5f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Fint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 95
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Fint32_reg(i32 %0) {
%2 = and i32 %0, 95
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2CRxFIFOFlush(uint32_t ui32Base) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000F04))) |= 0x40000000;
}


x86 assembly (clang, -O0):
<I2CRxFIFOFlush>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xf04,%eax
cltq
mov    (%rax),%ecx
or     $0x40000000,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CRxFIFOFlush>:
movslq %edi,%rax
orl    $0x40000000,0xf04(%rax)
ret

LLVM IR (-O0):
define void @I2CRxFIFOFlush(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 3844
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 1073741824
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @I2CRxFIFOFlush(i32 %0) {
%2 = add nsw i32 %0, 3844
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = or i32 %5, 1073741824
store volatile i32 %6, i32* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
FILE *AbreFicheiro(char *nome, char *mode) {
  FILE *f;
  f = fopen(nome, mode);
  if (f == NULL) {
    fprintf(stderr, "ERRO: Não foi possivel abrir o ficheiro %s!\n", nome);
    exit(-1);
  }
  return (f);
}


x86 assembly (clang, -O0):
<AbreFicheiro>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    117f <AbreFicheiro+0x4f>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xe90(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AbreFicheiro>:
push   %rbx
mov    %rdi,%rbx
call   1040 <fopen@plt>
test   %rax,%rax
je     1140 <AbreFicheiro+0x10>
pop    %rbx
ret
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"ERRO: N\C3\A3o foi possivel abrir o ficheiro %s!\0A\00"
define i32* @AbreFicheiro(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %6, i8* %7)
store i32* %8, i32** %5
%9 = load i32*, i32** %5
%10 = icmp eq i32* %9, null
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = load i8*, i8** %3
%14 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %13)
%15 = call i32 @exit(i32 -1)
unreachable
16: ; preds = %2
%17 = load i32*, i32** %5
ret i32* %17
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"ERRO: N\C3\A3o foi possivel abrir o ficheiro %s!\0A\00"
define noalias i32* @AbreFicheiro(i8* %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %0)
%8 = tail call i32 @exit(i32 -1)
unreachable
9: ; preds = %2
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ DecompileProgsDat(char *);
int main(int argc, char **argv) {
  if (argc > 1)
    DecompileProgsDat(argv[1]);
  else
    DecompileProgsDat("progs.dat");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1142 <main+0x32>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <DecompileProgsDat@plt>
jmp    114e <main+0x3e>
lea    0xeb7(%rip),%rdi
call   1030 <DecompileProgsDat@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     111c <main+0xc>
mov    0x8(%rsi),%rdi
jmp    1123 <main+0x13>
lea    0xedd(%rip),%rdi
call   1030 <DecompileProgsDat@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"progs.dat\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @DecompileProgsDat(i8* %11)
br label %15
13: ; preds = %2
%14 = call i32 @DecompileProgsDat(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [10 x i8] c"progs.dat\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
br label %7
7: ; preds = %2, %4
%8 = phi i8* [ %6, %4 ], [ getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), %2 ]
%9 = tail call i32 @DecompileProgsDat(i8* %8)
ret i32 0
}
/* Variables and functions */
scalar_t__ random();
double drnd() { return ((double)random() / (double)0x7fffffff); }


x86 assembly (clang, -O0):
<drnd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
cvtsi2sd %rax,%xmm0
movsd  0xed8(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<drnd>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
cvtsi2sd %rax,%xmm0
divsd  0xedb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @drnd() {
%1 = call i64 (...) @random()
%2 = sitofp i64 %1 to double
%3 = fdiv double %2, 0x41DFFFFFFFC00000
ret double %3
}

LLVM IR (-O2):
define double @drnd() {
%1 = tail call i64 (...) @random()
%2 = sitofp i64 %1 to double
%3 = fdiv double %2, 0x41DFFFFFFFC00000
ret double %3
}
int test_imm_38uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x38 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_38uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x38,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_38uint64_lowword_reg>:
test   $0x38,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_38uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 56
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_38uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 56
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int tun_open_common(char *, int /*<<< orphan*/);
int tap_open(char *dev) { return tun_open_common(dev, 0); }


x86 assembly (clang, -O0):
<tap_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <tun_open_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tap_open>:
xor    %esi,%esi
jmp    1030 <tun_open_common@plt>

LLVM IR (-O0):
define i32 @tap_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @tun_open_common(i8* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @tap_open(i8* %0) {
%2 = tail call i32 @tun_open_common(i8* %0, i32 0)
ret i32 %2
}
const char *ccnxControlAPIAbout_Name(void) { return "ccnxControlAPI"; }


x86 assembly (clang, -O0):
<ccnxControlAPIAbout_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnxControlAPIAbout_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [15 x i8] c"ccnxControlAPI\00"
define i8* @ccnxControlAPIAbout_Name() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [15 x i8] c"ccnxControlAPI\00"
define i8* @ccnxControlAPIAbout_Name() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}