#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int EAGAIN;
int EBUSY;
int EINTR;
int EINVAL;
int EWOULDBLOCK;
bool dspd_tmperr(int err) {
  if (err > 0)
    err *= -1;
  return err == -EAGAIN || err == -EWOULDBLOCK || err == -EINTR ||
         err == -EBUSY || err == -EINVAL;
}


x86 assembly (clang, -O0):
<dspd_tmperr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1118 <dspd_tmperr+0x18>
imul   $0xffffffff,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
xor    %edx,%edx
mov    0x2e94(%rip),%rax
sub    (%rax),%edx
mov    $0x1,%al
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
je     119a <dspd_tmperr+0x9a>
mov    -0x4(%rbp),%ecx
xor    %edx,%edx
mov    0x2ea1(%rip),%rax
sub    (%rax),%edx
mov    $0x1,%al
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
je     119a <dspd_tmperr+0x9a>
mov    -0x4(%rbp),%ecx
xor    %edx,%edx
mov    0x2e7e(%rip),%rax
sub    (%rax),%edx
mov    $0x1,%al
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
je     119a <dspd_tmperr+0x9a>
mov    -0x4(%rbp),%ecx
xor    %edx,%edx
mov    0x2e53(%rip),%rax
sub    (%rax),%edx
mov    $0x1,%al
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
je     119a <dspd_tmperr+0x9a>
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
mov    0x2e40(%rip),%rdx
sub    (%rdx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dspd_tmperr>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
mov    0x2eaa(%rip),%rcx
cmp    %eax,(%rcx)
sete   %cl
mov    0x2ec6(%rip),%rdx
cmp    %eax,(%rdx)
sete   %dl
or     %cl,%dl
mov    0x2eb0(%rip),%rcx
cmp    %eax,(%rcx)
sete   %dil
mov    0x2e93(%rip),%rsi
cmp    %eax,(%rsi)
sete   %cl
or     %dil,%cl
or     %dl,%cl
mov    0x2e8a(%rip),%rdx
cmp    %eax,(%rdx)
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
@EAGAIN = global i32 0
@EWOULDBLOCK = global i32 0
@EINTR = global i32 0
@EBUSY = global i32 0
@EINVAL = global i32 0
define i32 @dspd_tmperr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = mul nsw i32 %6, -1
store i32 %7, i32* %2
br label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = load i32, i32* @EAGAIN
%11 = sub nsw i32 0, %10
%12 = icmp eq i32 %9, %11
br i1 %12, label %33, label %13
13: ; preds = %8
%14 = load i32, i32* %2
%15 = load i32, i32* @EWOULDBLOCK
%16 = sub nsw i32 0, %15
%17 = icmp eq i32 %14, %16
br i1 %17, label %33, label %18
18: ; preds = %13
%19 = load i32, i32* %2
%20 = load i32, i32* @EINTR
%21 = sub nsw i32 0, %20
%22 = icmp eq i32 %19, %21
br i1 %22, label %33, label %23
23: ; preds = %18
%24 = load i32, i32* %2
%25 = load i32, i32* @EBUSY
%26 = sub nsw i32 0, %25
%27 = icmp eq i32 %24, %26
br i1 %27, label %33, label %28
28: ; preds = %23
%29 = load i32, i32* %2
%30 = load i32, i32* @EINVAL
%31 = sub nsw i32 0, %30
%32 = icmp eq i32 %29, %31
br label %33
33: ; preds = %28, %23, %18, %13, %8
%34 = phi i1 [ true, %23 ], [ true, %18 ], [ true, %13 ], [ true, %8 ], [ %32, %28 ]
%35 = zext i1 %34 to i32
ret i32 %35
}

LLVM IR (-O2):
@EAGAIN = global i32 0
@EWOULDBLOCK = global i32 0
@EINTR = global i32 0
@EBUSY = global i32 0
@EINVAL = global i32 0
define i32 @dspd_tmperr(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 false)
%3 = load i32, i32* @EAGAIN
%4 = icmp eq i32 %3, %2
%5 = load i32, i32* @EWOULDBLOCK
%6 = icmp eq i32 %5, %2
%7 = select i1 %4, i1 true, i1 %6
%8 = load i32, i32* @EINTR
%9 = icmp eq i32 %8, %2
%10 = select i1 %7, i1 true, i1 %9
%11 = load i32, i32* @EBUSY
%12 = icmp eq i32 %11, %2
%13 = select i1 %10, i1 true, i1 %12
%14 = load i32, i32* @EINVAL
%15 = icmp eq i32 %14, %2
%16 = select i1 %13, i1 true, i1 %15
%17 = zext i1 %16 to i32
ret i32 %17
}