xunge/DecIR huggingface dataset:
int main() {
  int a[3];
  int b[] = {1, 2, 3};
  int i, *p;
  for (i = 0; i < 3; i++) {
    a[i] = b[i];
  }
  p = a;
  *(p + 2) = 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0xeee(%rip),%rax
mov    %rax,-0x1c(%rbp)
mov    0xeec(%rip),%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x3,-0x20(%rbp)
jge    114e <main+0x4e>
movslq -0x20(%rbp),%rax
mov    -0x1c(%rbp,%rax,4),%ecx
movslq -0x20(%rbp),%rax
mov    %ecx,-0x10(%rbp,%rax,4)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1126 <main+0x26>
lea    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movl   $0x5,0x8(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.b = [3 x i32] [i32 1, i32 2, i32 3]
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
%3 = alloca [3 x i32]
%4 = alloca i32
%5 = alloca i32*
store i32 0, i32* %1
%6 = bitcast [3 x i32]* %3 to i8*
store i32 0, i32* %4
br label %7
7: ; preds = %18, %0
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 3
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 %12
%14 = load i32, i32* %13
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 %16
store i32 %14, i32* %17
br label %18
18: ; preds = %10
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %7
21: ; preds = %7
%22 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
store i32* %22, i32** %5
%23 = load i32*, i32** %5
%24 = getelementptr inbounds i32, i32* %23, i64 2
store i32 5, i32* %24
%25 = load i32, i32* %1
ret i32 %25
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
int irand(int from, int to) {
  return (int)(((double)rand() / RAND_MAX) * (to - from + 1) + from);
}


x86 assembly (clang, -O0):
<irand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eb7(%rip),%rax
divsd  (%rax),%xmm0
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
cvtsi2sd %eax,%xmm2
cvtsi2sdl -0x4(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irand>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ebe(%rip),%rax
divsd  (%rax),%xmm0
sub    %ebp,%ebx
add    $0x1,%ebx
cvtsi2sd %ebx,%xmm1
cvtsi2sd %ebp,%xmm2
mulsd  %xmm0,%xmm1
addsd  %xmm1,%xmm2
cvttsd2si %xmm2,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define i32 @irand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i64 (...) @rand()
%6 = sitofp i64 %5 to double
%7 = load double, double* @RAND_MAX
%8 = fdiv double %6, %7
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = sub nsw i32 %9, %10
%12 = add nsw i32 %11, 1
%13 = sitofp i32 %12 to double
%14 = load i32, i32* %3
%15 = sitofp i32 %14 to double
%16 = call double @llvm.fmuladd.f64(double %8, double %13, double %15)
%17 = fptosi double %16 to i32
ret i32 %17
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define i32 @irand(i32 %0, i32 %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to double
%5 = load double, double* @RAND_MAX
%6 = fdiv double %4, %5
%7 = sub i32 1, %0
%8 = add i32 %7, %1
%9 = sitofp i32 %8 to double
%10 = sitofp i32 %0 to double
%11 = tail call double @llvm.fmuladd.f64(double %6, double %9, double %10)
%12 = fptosi double %11 to i32
ret i32 %12
}
int timer0_interrupt_read(void) { return 2; }


x86 assembly (clang, -O0):
<timer0_interrupt_read>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer0_interrupt_read>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @timer0_interrupt_read() {
ret i32 2
}

LLVM IR (-O2):
define i32 @timer0_interrupt_read() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ err_msg(char *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int socket(int, int, int);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
int Socket(int family, int type, int protocol) {
  int fd;
  if ((fd = socket(family, type, protocol)) == -1) {
    err_msg("error opening socket: %s", strerror(errno));
    exit(EXIT_FAILURE);
  }
  return fd;
}


x86 assembly (clang, -O0):
<Socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1060 <socket@plt>
mov    %eax,-0x10(%rbp)
cmp    $0xffffffff,%eax
jne    1195 <Socket+0x55>
mov    0x2e6e(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %eax,%esi
lea    0xe7e(%rip),%rdi
call   1030 <err_msg@plt>
mov    0x2e4a(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Socket>:
push   %rax
call   1060 <socket@plt>
cmp    $0xffffffff,%eax
je     114d <Socket+0xd>
pop    %rcx
ret
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xe9e(%rip),%rdi
mov    %eax,%esi
call   1030 <err_msg@plt>
mov    0x2e68(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"error opening socket: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @Socket(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @socket(i32 %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %19
13: ; preds = %3
%14 = load i32, i32* @errno
%15 = call i32 @strerror(i32 %14)
%16 = call i32 @err_msg(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %15)
%17 = load i32, i32* @EXIT_FAILURE
%18 = call i32 @exit(i32 %17)
unreachable
19: ; preds = %3
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
@.str = [25 x i8] c"error opening socket: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @Socket(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @socket(i32 %0, i32 %1, i32 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* @errno
%8 = tail call i32 @strerror(i32 %7)
%9 = tail call i32 @err_msg(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = load i32, i32* @EXIT_FAILURE
%11 = tail call i32 @exit(i32 %10)
unreachable
12: ; preds = %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ handle_62(int /*<<< orphan*/);
int gen_62() {
  handle_62(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_62>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_62@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_62>:
push   %rax
xor    %edi,%edi
call   1030 <handle_62@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_62() {
%1 = call i32 @handle_62(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_62() {
%1 = tail call i32 @handle_62(i32 0)
ret i32 0
}
/* Variables and functions */
int iupacMatchLower(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ tolower(char);
int iupacMatch(char iupac, char dna) {
  return iupacMatchLower(tolower(iupac), tolower(dna));
}


x86 assembly (clang, -O0):
<iupacMatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <tolower@plt>
mov    %eax,-0x8(%rbp)
movsbl -0x2(%rbp),%edi
call   1030 <tolower@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1040 <iupacMatchLower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iupacMatch>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <tolower@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <tolower@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <iupacMatchLower@plt>

LLVM IR (-O0):
define i32 @iupacMatch(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = call i32 @tolower(i8 signext %5)
%7 = load i8, i8* %4
%8 = call i32 @tolower(i8 signext %7)
%9 = call i32 @iupacMatchLower(i32 %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @iupacMatch(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @tolower(i8 signext %0)
%4 = tail call i32 @tolower(i8 signext %1)
%5 = tail call i32 @iupacMatchLower(i32 %3, i32 %4)
ret i32 %5
}
/* Variables and functions */
size_t next_pow2(size_t n) {
  n--;
  for (size_t i = 1; i < 8 * sizeof n; i *= 2) {
    n |= i;
  }
  n++;
  return n;
}


x86 assembly (clang, -O0):
<next_pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
cmpq   $0x40,-0x10(%rbp)
jae    1144 <next_pow2+0x44>
mov    -0x10(%rbp),%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <next_pow2+0x1c>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_pow2>:
lea    -0x1(%rdi),%rax
or     $0x3f,%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @next_pow2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = add i64 %4, -1
store i64 %5, i64* %2
store i64 1, i64* %3
br label %6
6: ; preds = %13, %1
%7 = load i64, i64* %3
%8 = icmp ult i64 %7, 64
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i64, i64* %3
%11 = load i64, i64* %2
%12 = or i64 %11, %10
store i64 %12, i64* %2
br label %13
13: ; preds = %9
%14 = load i64, i64* %3
%15 = mul i64 %14, 2
store i64 %15, i64* %3
br label %6
16: ; preds = %6
%17 = load i64, i64* %2
%18 = add i64 %17, 1
store i64 %18, i64* %2
%19 = load i64, i64* %2
ret i64 %19
}

LLVM IR (-O2):
define i64 @next_pow2(i64 %0) {
%2 = add i64 %0, -1
%3 = or i64 %2, 63
%4 = add i64 %3, 1
ret i64 %4
}
void SteamAPI_ISteamHTMLSurface_SetSize(void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamHTMLSurface_SetSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamHTMLSurface_SetSize>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamHTMLSurface_SetSize = [35 x i8] c"SteamAPI_ISteamHTMLSurface_SetSize\00"
define void @SteamAPI_ISteamHTMLSurface_SetSize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__func__.SteamAPI_ISteamHTMLSurface_SetSize, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamHTMLSurface_SetSize = [35 x i8] c"SteamAPI_ISteamHTMLSurface_SetSize\00"
define void @SteamAPI_ISteamHTMLSurface_SetSize(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__func__.SteamAPI_ISteamHTMLSurface_SetSize, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void usage(void) { die("Usage: build bootsect system user [> image]"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <die@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <die@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"Usage: build bootsect system user [> image]\00"
define void @usage() {
%1 = call i32 @die(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"Usage: build bootsect system user [> image]\00"
define void @usage() {
%1 = tail call i32 @die(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}
int get_salt_size(void) { return 33; }


x86 assembly (clang, -O0):
<get_salt_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_salt_size>:
mov    $0x21,%eax
ret

LLVM IR (-O0):
define i32 @get_salt_size() {
ret i32 33
}

LLVM IR (-O2):
define i32 @get_salt_size() {
ret i32 33
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_source_set_name(void *s, const char *name) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_source_set_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_source_set_name>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_source_set_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_source_set_name(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_rintl();
scalar_t__ rintl(long double);
void test_rintl(long double ld) {
  if (rintl(ld) != rintl(ld))
    link_failure_rintl();
}


x86 assembly (clang, -O0):
<test_rintl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <rintl@plt>
mov    %rax,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <rintl@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1163 <test_rintl+0x43>
mov    $0x0,%al
call   1030 <link_failure_rintl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_rintl>:
push   %rbx
sub    $0x20,%rsp
fldt   0x30(%rsp)
fld    %st(0)
fstpt  0x14(%rsp)
fstpt  (%rsp)
call   1040 <rintl@plt>
mov    %rax,%rbx
fldt   0x14(%rsp)
fstpt  (%rsp)
call   1040 <rintl@plt>
cmp    %rax,%rbx
jne    1151 <test_rintl+0x31>
add    $0x20,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
jmp    1030 <link_failure_rintl@plt>

LLVM IR (-O0):
define void @test_rintl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @rintl(x86_fp80 %3)
%5 = load x86_fp80, x86_fp80* %2
%6 = call i64 @rintl(x86_fp80 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_rintl()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_rintl(x86_fp80 %0) {
%2 = tail call i64 @rintl(x86_fp80 %0)
%3 = tail call i64 @rintl(x86_fp80 %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_rintl()
br label %7
7: ; preds = %5, %1
ret void
}
/* Type definitions */
typedef scalar_t__ time_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
scalar_t__ time(int /*<<< orphan*/ *);
time_t get_current_time() {
  time_t current_time = time(NULL);
  if (current_time == ((time_t)-1)) {
    (void)fprintf(stderr, "Failure to compute the current time.");
    exit(EXIT_FAILURE);
  }
  return current_time;
}


x86 assembly (clang, -O0):
<get_current_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0xffffffffffffffff,-0x8(%rbp)
jne    1173 <get_current_time+0x43>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
lea    0xea0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_current_time>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
cmp    $0xffffffffffffffff,%rax
je     1140 <get_current_time+0x10>
pop    %rcx
ret
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e7c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [37 x i8] c"Failure to compute the current time.\00"
@EXIT_FAILURE = global i32 0
define i64 @get_current_time() {
%1 = alloca i64
%2 = call i64 @time(i32* null)
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = icmp eq i64 %3, -1
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
10: ; preds = %0
%11 = load i64, i64* %1
ret i64 %11
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [37 x i8] c"Failure to compute the current time.\00"
@EXIT_FAILURE = global i32 0
define i64 @get_current_time() {
%1 = tail call i64 @time(i32* null)
%2 = icmp eq i64 %1, -1
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %0
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(int, unsigned char *);
unsigned char CheckId_OM6802(void) {
  unsigned char temp1;
  VIM_SIF_I2cReadByte(0x00, &temp1);
  if (temp1 == 0xff) {
    return 1;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<CheckId_OM6802>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
lea    -0x2(%rbp),%rsi
call   1030 <VIM_SIF_I2cReadByte@plt>
movzbl -0x2(%rbp),%eax
cmp    $0xff,%eax
jne    113b <CheckId_OM6802+0x2b>
movb   $0x1,-0x1(%rbp)
jmp    113f <CheckId_OM6802+0x2f>
movb   $0x1,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckId_OM6802>:
push   %rax
lea    0x7(%rsp),%rsi
xor    %edi,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
mov    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @CheckId_OM6802() {
%1 = alloca i8
%2 = alloca i8
%3 = call i32 @VIM_SIF_I2cReadByte(i32 0, i8* %2)
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = icmp eq i32 %5, 255
br i1 %6, label %7, label %8
7: ; preds = %0
store i8 1, i8* %1
br label %9
8: ; preds = %0
store i8 1, i8* %1
br label %9
9: ; preds = %8, %7
%10 = load i8, i8* %1
ret i8 %10
}

LLVM IR (-O2):
define zeroext i8 @CheckId_OM6802() {
%1 = alloca i8
%2 = call i32 @VIM_SIF_I2cReadByte(i32 0, i8* %1)
ret i8 1
}
void migrate_page_copy_user_trace(struct page *newpage, struct page *page) {}


x86 assembly (clang, -O0):
<migrate_page_copy_user_trace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<migrate_page_copy_user_trace>:
ret

LLVM IR (-O0):
%struct.page = type opaque
define void @migrate_page_copy_user_trace(%struct.page* %0, %struct.page* %1) {
%3 = alloca %struct.page*
%4 = alloca %struct.page*
store %struct.page* %0, %struct.page** %3
store %struct.page* %1, %struct.page** %4
ret void
}

LLVM IR (-O2):
%struct.page = type opaque
define void @migrate_page_copy_user_trace(%struct.page* nocapture %0, %struct.page* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void showData(void *data) { printf("%d", *(int *)data); }


x86 assembly (clang, -O0):
<showData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showData>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @showData(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @showData(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
int do_275() { return 275; }


x86 assembly (clang, -O0):
<do_275>:
push   %rbp
mov    %rsp,%rbp
mov    $0x113,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_275>:
mov    $0x113,%eax
ret

LLVM IR (-O0):
define i32 @do_275() {
ret i32 275
}

LLVM IR (-O2):
define i32 @do_275() {
ret i32 275
}
void genceil_w_d() {}


x86 assembly (clang, -O0):
<genceil_w_d>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genceil_w_d>:
ret

LLVM IR (-O0):
define void @genceil_w_d() {
ret void
}

LLVM IR (-O2):
define void @genceil_w_d() {
ret void
}
/* Variables and functions */
double sla_dtt_(double *);
double slaDtt(double dju) { return sla_dtt_(&dju); }


x86 assembly (clang, -O0):
<slaDtt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <sla_dtt_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slaDtt>:
push   %rax
movsd  %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <sla_dtt_@plt>
pop    %rax
ret

LLVM IR (-O0):
define double @slaDtt(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call double @sla_dtt_(double* %2)
ret double %3
}

LLVM IR (-O2):
define double @slaDtt(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call double @sla_dtt_(double* %2)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ apbuart_test(int);
int /*<<< orphan*/ gptimer_test(int, int);
int /*<<< orphan*/ irqtest(int);
int /*<<< orphan*/ leon3_test(int, int, int /*<<< orphan*/);
base_test_tirq(int irq) {
  leon3_test(1, 0x80000200, 0);
  irqtest(0x80000200);
  gptimer_test(0x80000300, irq);
  apbuart_test(0x80000100);
}


x86 assembly (clang, -O0):
<base_test_tirq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x1,%edi
mov    $0x80000200,%esi
xor    %edx,%edx
call   1040 <leon3_test@plt>
mov    $0x80000200,%edi
call   1050 <irqtest@plt>
mov    -0x8(%rbp),%esi
mov    $0x80000300,%edi
call   1030 <gptimer_test@plt>
mov    $0x80000100,%edi
call   1060 <apbuart_test@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<base_test_tirq>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
mov    $0x80000200,%esi
xor    %edx,%edx
call   1040 <leon3_test@plt>
mov    $0x80000200,%edi
call   1050 <irqtest@plt>
mov    $0x80000300,%edi
mov    %ebx,%esi
call   1030 <gptimer_test@plt>
mov    $0x80000100,%edi
pop    %rbx
jmp    1060 <apbuart_test@plt>

LLVM IR (-O0):
define i32 @base_test_tirq(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @leon3_test(i32 1, i32 -2147483136, i32 0)
%5 = call i32 @irqtest(i32 -2147483136)
%6 = load i32, i32* %3
%7 = call i32 @gptimer_test(i32 -2147482880, i32 %6)
%8 = call i32 @apbuart_test(i32 -2147483392)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @base_test_tirq(i32 %0) {
%2 = tail call i32 @leon3_test(i32 1, i32 -2147483136, i32 0)
%3 = tail call i32 @irqtest(i32 -2147483136)
%4 = tail call i32 @gptimer_test(i32 -2147482880, i32 %0)
%5 = tail call i32 @apbuart_test(i32 -2147483392)
ret i32 undef
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __list_splice(struct list_head *, struct list_head *);
scalar_t__ list_empty(struct list_head *);
void list_splice(struct list_head *list, struct list_head *head) {
  if (list_empty(list))
    return;
  __list_splice(list, head);
}


x86 assembly (clang, -O0):
<list_splice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <list_empty@plt>
cmp    $0x0,%rax
je     1148 <list_splice+0x28>
jmp    1155 <list_splice+0x35>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__list_splice@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_splice>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <list_empty@plt>
test   %rax,%rax
je     113c <list_splice+0x1c>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <__list_splice@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_splice(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %3
%6 = call i64 @list_empty(%struct.list_head* %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
br label %13
9: ; preds = %2
%10 = load %struct.list_head*, %struct.list_head** %3
%11 = load %struct.list_head*, %struct.list_head** %4
%12 = call i32 @__list_splice(%struct.list_head* %10, %struct.list_head* %11)
br label %13
13: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_splice(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i64 @list_empty(%struct.list_head* %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @__list_splice(%struct.list_head* %0, %struct.list_head* %1)
br label %7
7: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ utest_control();
void utest_adts_heap(void) {
  utest_control();
  return;
}


x86 assembly (clang, -O0):
<utest_adts_heap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <utest_control@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utest_adts_heap>:
xor    %eax,%eax
jmp    1030 <utest_control@plt>

LLVM IR (-O0):
define void @utest_adts_heap() {
%1 = call i32 (...) @utest_control()
ret void
}

LLVM IR (-O2):
define void @utest_adts_heap() {
%1 = tail call i32 (...) @utest_control()
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int decode_Mode_A(int);
uint16_t decode_ID(uint16_t ID) {
  uint16_t ma = ((ID & 0x1F80) >> 1) | (ID & 0x3F);
  return decode_Mode_A(ma);
}


x86 assembly (clang, -O0):
<decode_ID>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f80,%eax
sar    $0x1,%eax
mov    -0x4(%rbp),%ecx
and    $0x3f,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <decode_Mode_A@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_ID>:
mov    %edi,%eax
shr    %eax
and    $0xfc0,%eax
and    $0x3f,%edi
or     %eax,%edi
jmp    1030 <decode_Mode_A@plt>

LLVM IR (-O0):
define i32 @decode_ID(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 8064
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = and i32 %7, 63
%9 = or i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = call i32 @decode_Mode_A(i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @decode_ID(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 4032
%4 = and i32 %0, 63
%5 = or i32 %3, %4
%6 = tail call i32 @decode_Mode_A(i32 %5)
ret i32 %6
}
/* Variables and functions */
unsigned long strtol(char const *, char **, int);
unsigned long strtoul(const char *nptr, char **endptr, int base) {
  return strtol(nptr, endptr, base);
}


x86 assembly (clang, -O0):
<strtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtol@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoul>:
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i64 @strtoul(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i64 @strtol(i8* %7, i8** %8, i32 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @strtoul(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i64 @strtol(i8* %0, i8** %1, i32 %2)
ret i64 %4
}
unsigned long buff_to_uint8(unsigned char const *buff, unsigned int *off) {
  unsigned long val;
  val = buff[*off + 0];
  *off += 1;
  return val;
}


x86 assembly (clang, -O0):
<buff_to_uint8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
add    $0x0,%ecx
mov    %ecx,%ecx
movzbl (%rax,%rcx,1),%eax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<buff_to_uint8>:
mov    (%rsi),%ecx
movzbl (%rdi,%rcx,1),%eax
add    $0x1,%ecx
mov    %ecx,(%rsi)
ret

LLVM IR (-O0):
define i64 @buff_to_uint8(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i64
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = add i32 %8, 0
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %6, i64 %10
%12 = load i8, i8* %11
%13 = zext i8 %12 to i64
store i64 %13, i64* %5
%14 = load i32*, i32** %4
%15 = load i32, i32* %14
%16 = add i32 %15, 1
store i32 %16, i32* %14
%17 = load i64, i64* %5
ret i64 %17
}

LLVM IR (-O2):
define i64 @buff_to_uint8(i8* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = add i32 %3, 1
store i32 %8, i32* %1
ret i64 %7
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
int alea(int min, int max) {
  int lgr;
  lgr = max - min + 1;
  return (int)((double)rand() / RAND_MAX * lgr + min);
}


x86 assembly (clang, -O0):
<alea>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eab(%rip),%rax
divsd  (%rax),%xmm0
cvtsi2sdl -0xc(%rbp),%xmm2
cvtsi2sdl -0x4(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alea>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
sub    %edi,%ebx
add    $0x1,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eb9(%rip),%rax
divsd  (%rax),%xmm0
cvtsi2sd %ebx,%xmm1
cvtsi2sd %ebp,%xmm2
mulsd  %xmm0,%xmm1
addsd  %xmm1,%xmm2
cvttsd2si %xmm2,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define i32 @alea(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
store i32 %9, i32* %5
%10 = call i64 (...) @rand()
%11 = sitofp i64 %10 to double
%12 = load double, double* @RAND_MAX
%13 = fdiv double %11, %12
%14 = load i32, i32* %5
%15 = sitofp i32 %14 to double
%16 = load i32, i32* %3
%17 = sitofp i32 %16 to double
%18 = call double @llvm.fmuladd.f64(double %13, double %15, double %17)
%19 = fptosi double %18 to i32
ret i32 %19
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define i32 @alea(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = tail call i64 (...) @rand()
%6 = sitofp i64 %5 to double
%7 = load double, double* @RAND_MAX
%8 = fdiv double %6, %7
%9 = sitofp i32 %4 to double
%10 = sitofp i32 %0 to double
%11 = tail call double @llvm.fmuladd.f64(double %8, double %9, double %10)
%12 = fptosi double %11 to i32
ret i32 %12
}
int main(int argc, char **argv) { asm("movl %eax, %eax"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %eax,%eax
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    %eax,%eax
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
tail call void asm sideeffect "movl %eax, %eax", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned long);
void setseedrng(unsigned long s) { srand(s); }


x86 assembly (clang, -O0):
<setseedrng>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setseedrng>:
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @setseedrng(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @srand(i64 %3)
ret void
}

LLVM IR (-O2):
define void @setseedrng(i64 %0) {
%2 = tail call i32 @srand(i64 %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void enc32le(void *dst, uint32_t x) {
  unsigned char *buf;
  buf = dst;
  buf[0] = (unsigned char)x;
  buf[1] = (unsigned char)(x >> 8);
  buf[2] = (unsigned char)(x >> 16);
  buf[3] = (unsigned char)(x >> 24);
}


x86 assembly (clang, -O0):
<enc32le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enc32le>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @enc32le(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
%11 = load i32, i32* %4
%12 = ashr i32 %11, 8
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i32, i32* %4
%17 = ashr i32 %16, 16
%18 = trunc i32 %17 to i8
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i64 2
store i8 %18, i8* %20
%21 = load i32, i32* %4
%22 = ashr i32 %21, 24
%23 = trunc i32 %22 to i8
%24 = load i8*, i8** %5
%25 = getelementptr inbounds i8, i8* %24, i64 3
store i8 %23, i8* %25
ret void
}

LLVM IR (-O2):
define void @enc32le(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
%4 = lshr i32 %1, 8
%5 = trunc i32 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i32 %1, 16
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i32 %1, 24
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AttitudeSimulatedHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void AttitudeSimulatedUpdated() { UAVObjUpdated(AttitudeSimulatedHandle()); }


x86 assembly (clang, -O0):
<AttitudeSimulatedUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AttitudeSimulatedHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AttitudeSimulatedUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <AttitudeSimulatedHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @AttitudeSimulatedUpdated() {
%1 = call i32 (...) @AttitudeSimulatedHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AttitudeSimulatedUpdated() {
%1 = tail call i32 (...) @AttitudeSimulatedHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int func2(int);
__attribute__((no, optimize(3))) int func1(int i) { return func2(i + 2); }


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x2,%edi
call   1030 <func2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
add    $0x2,%edi
jmp    1030 <func2@plt>

LLVM IR (-O0):
define i32 @func1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
%5 = call i32 @func2(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @func1(i32 %0) {
%2 = add nsw i32 %0, 2
%3 = tail call i32 @func2(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_session_id() {
  printf("NOT IMPLEMENTED:"
         "pa_session_id"
         "\n");
}


x86 assembly (clang, -O0):
<pa_session_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_session_id>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"NOT IMPLEMENTED:pa_session_id\0A\00"
define i32 @pa_session_id() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [30 x i8] c"NOT IMPLEMENTED:pa_session_id\00"
define i32 @pa_session_id() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
unsigned int **
_ZNSt12__niter_baseIPPiLb0EE3__bES1_(unsigned int **llvm_cbe___it) {
  unsigned int **llvm_cbe_retval;
  unsigned int **llvm_cbe___it_2e_addr;
  unsigned int **llvm_cbe_tmp;
  unsigned int **llvm_cbe_tmp__45;
  *(&llvm_cbe___it_2e_addr) = llvm_cbe___it;
  llvm_cbe_tmp = *(&llvm_cbe___it_2e_addr);
  *(&llvm_cbe_retval) = llvm_cbe_tmp;
  llvm_cbe_tmp__45 = *(&llvm_cbe_retval);
  return llvm_cbe_tmp__45;
}


x86 assembly (clang, -O0):
<_ZNSt12__niter_baseIPPiLb0EE3__bES1_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZNSt12__niter_baseIPPiLb0EE3__bES1_>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32** @_ZNSt12__niter_baseIPPiLb0EE3__bES1_(i32** %0) {
%2 = alloca i32**
%3 = alloca i32**
%4 = alloca i32**
%5 = alloca i32**
%6 = alloca i32**
store i32** %0, i32*** %2
%7 = load i32**, i32*** %2
store i32** %7, i32*** %4
%8 = load i32**, i32*** %4
store i32** %8, i32*** %5
%9 = load i32**, i32*** %5
store i32** %9, i32*** %3
%10 = load i32**, i32*** %3
store i32** %10, i32*** %6
%11 = load i32**, i32*** %6
ret i32** %11
}

LLVM IR (-O2):
define i32** @_ZNSt12__niter_baseIPPiLb0EE3__bES1_(i32** readnone returned %0) {
ret i32** %0
}
/* Variables and functions */
int clone(int (*)(void *), void *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ xerror(char *);
int xclone(int (*fn)(void *), int flags) {
  union {
    char stack[128 + 8 + 8];
    __int128 alignment;
  } clobbered;
  void *stack_top = clobbered.stack + sizeof clobbered.stack;
  int pid = clone(fn, stack_top, flags, NULL);
  if (pid <= 0)
    xerror("clone");
  return pid;
}


x86 assembly (clang, -O0):
<xclone>:
push   %rbp
mov    %rsp,%rbp
sub    $0xb0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0xa0(%rbp),%rax
add    $0x90,%rax
mov    %rax,-0xa8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xa8(%rbp),%rsi
mov    -0xc(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <clone@plt>
mov    %eax,-0xac(%rbp)
cmpl   $0x0,-0xac(%rbp)
jg     117c <xclone+0x5c>
lea    0xe89(%rip),%rdi
call   1040 <xerror@plt>
mov    -0xac(%rbp),%eax
add    $0xb0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xclone>:
push   %rbx
sub    $0x90,%rsp
mov    %esi,%edx
lea    0x90(%rsp),%rsi
xor    %ecx,%ecx
call   1030 <clone@plt>
mov    %eax,%ebx
test   %eax,%eax
jg     114b <xclone+0x2b>
lea    0xeba(%rip),%rdi
call   1040 <xerror@plt>
mov    %ebx,%eax
add    $0x90,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%union.anon = type { i128, [128 x i8] }
@.str = [6 x i8] c"clone\00"
define i32 @xclone(i32 (i8*)* %0, i32 %1) {
%3 = alloca i32 (i8*)*
%4 = alloca i32
%5 = alloca %union.anon
%6 = alloca i8*
%7 = alloca i32
store i32 (i8*)* %0, i32 (i8*)** %3
store i32 %1, i32* %4
%8 = bitcast %union.anon* %5 to [144 x i8]*
%9 = getelementptr inbounds [144 x i8], [144 x i8]* %8, i64 0, i64 0
%10 = getelementptr inbounds i8, i8* %9, i64 144
store i8* %10, i8** %6
%11 = load i32 (i8*)*, i32 (i8*)** %3
%12 = load i8*, i8** %6
%13 = load i32, i32* %4
%14 = call i32 @clone(i32 (i8*)* %11, i8* %12, i32 %13, i32* null)
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = icmp sle i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %2
%18 = call i32 @xerror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %17, %2
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
%union.anon = type { i128, [128 x i8] }
@.str = [6 x i8] c"clone\00"
define i32 @xclone(i32 (i8*)* %0, i32 %1) {
%3 = alloca %union.anon
%4 = bitcast %union.anon* %3 to i8*
%5 = getelementptr inbounds %union.anon, %union.anon* %3, i64 1
%6 = bitcast %union.anon* %5 to i8*
%7 = call i32 @clone(i32 (i8*)* %0, i8* %6, i32 %1, i32* null)
%8 = icmp slt i32 %7, 1
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @xerror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
ret i32 %7
}
void _glapi_check_table_not_null(const struct _glapi_table *table) {
  (void)table;
}


x86 assembly (clang, -O0):
<_glapi_check_table_not_null>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_glapi_check_table_not_null>:
ret

LLVM IR (-O0):
%struct._glapi_table = type opaque
define void @_glapi_check_table_not_null(%struct._glapi_table* %0) {
%2 = alloca %struct._glapi_table*
store %struct._glapi_table* %0, %struct._glapi_table** %2
%3 = load %struct._glapi_table*, %struct._glapi_table** %2
ret void
}

LLVM IR (-O2):
%struct._glapi_table = type opaque
define void @_glapi_check_table_not_null(%struct._glapi_table* nocapture %0) {
ret void
}
/* Type definitions */
struct boot_perfmon_binding {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void exit_msg(struct boot_perfmon_binding *b) { exit(0); }


x86 assembly (clang, -O0):
<exit_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<exit_msg>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
%struct.boot_perfmon_binding = type { i32 }
define void @exit_msg(%struct.boot_perfmon_binding* %0) {
%2 = alloca %struct.boot_perfmon_binding*
store %struct.boot_perfmon_binding* %0, %struct.boot_perfmon_binding** %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
%struct.boot_perfmon_binding = type { i32 }
define void @exit_msg(%struct.boot_perfmon_binding* nocapture readnone %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
int bar(void) {
  int i = 1, j = 1;
  if (13L && i) {
    i = 4;
  }
  if (0 || j) {
    j = 7;
  }
  return i + j;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1123 <bar+0x23>
movl   $0x4,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1134 <bar+0x34>
movl   $0x7,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0xb,%eax
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 4, i32* %1
br label %6
6: ; preds = %5, %0
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 7, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %1
%12 = load i32, i32* %2
%13 = add nsw i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @bar() {
ret i32 11
}
/* Variables and functions */
float pow(float, float);
float saturate(float);
float SrgbGammaToLinear(float flSrgbGammaValue) {
  float x = saturate(flSrgbGammaValue);
  return (x <= 0.04045f) ? (x / 12.92f) : (pow((x + 0.055f) / 1.055f, 2.4f));
}


x86 assembly (clang, -O0):
<SrgbGammaToLinear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <saturate@plt>
movss  %xmm0,-0x8(%rbp)
movss  0xebc(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jb     1169 <SrgbGammaToLinear+0x49>
movss  -0x8(%rbp),%xmm0
movss  0xeb5(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1194 <SrgbGammaToLinear+0x74>
movss  0xe9b(%rip),%xmm0
addss  -0x8(%rbp),%xmm0
movss  0xe8a(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xe7a(%rip),%xmm1
call   1030 <pow@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SrgbGammaToLinear>:
push   %rax
call   1040 <saturate@plt>
movss  0xed2(%rip),%xmm1
ucomiss %xmm0,%xmm1
jae    1151 <SrgbGammaToLinear+0x31>
addss  0xecd(%rip),%xmm0
divss  0xec9(%rip),%xmm0
movss  0xec5(%rip),%xmm1
pop    %rax
jmp    1030 <pow@plt>
divss  0xeab(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @SrgbGammaToLinear(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @saturate(float %4)
store float %5, float* %3
%6 = load float, float* %3
%7 = fcmp ole float %6, 0x3FA4B5DCC0000000
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load float, float* %3
%10 = fdiv float %9, 0x4029D70A40000000
br label %16
11: ; preds = %1
%12 = load float, float* %3
%13 = fadd float %12, 0x3FAC28F5C0000000
%14 = fdiv float %13, 0x3FF0E147A0000000
%15 = call float @pow(float %14, float 0x4003333340000000)
br label %16
16: ; preds = %11, %8
%17 = phi float [ %10, %8 ], [ %15, %11 ]
ret float %17
}

LLVM IR (-O2):
define float @SrgbGammaToLinear(float %0) {
%2 = tail call float @saturate(float %0)
%3 = fcmp ugt float %2, 0x3FA4B5DCC0000000
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = fdiv float %2, 0x4029D70A40000000
br label %10
6: ; preds = %1
%7 = fadd float %2, 0x3FAC28F5C0000000
%8 = fdiv float %7, 0x3FF0E147A0000000
%9 = tail call float @pow(float %8, float 0x4003333340000000)
br label %10
10: ; preds = %6, %4
%11 = phi float [ %5, %4 ], [ %9, %6 ]
ret float %11
}
void g_async_queue_timed_pop() {}


x86 assembly (clang, -O0):
<g_async_queue_timed_pop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_async_queue_timed_pop>:
ret

LLVM IR (-O0):
define void @g_async_queue_timed_pop() {
ret void
}

LLVM IR (-O2):
define void @g_async_queue_timed_pop() {
ret void
}