xunge/DecIR huggingface dataset:
unsigned int C_Utils_max_uint(const unsigned int item1,
                              const unsigned int item2) {
  return item1 > item2 ? item1 : item2;
}


x86 assembly (clang, -O0):
<C_Utils_max_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jbe    1121 <C_Utils_max_uint+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <C_Utils_max_uint+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Utils_max_uint>:
mov    %esi,%eax
cmp    %esi,%edi
cmova  %edi,%eax
ret

LLVM IR (-O0):
define i32 @C_Utils_max_uint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ugt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @C_Utils_max_uint(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *, char *);
void sj_onError(int error, char *errtext, char *lastchars) {
  printf("onError( %d, %s ) @ %s\n", error, errtext, lastchars);
}


x86 assembly (clang, -O0):
<sj_onError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sj_onError>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
lea    0xee1(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"onError( %d, %s ) @ %s\0A\00"
define void @sj_onError(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %7, i8* %8, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"onError( %d, %s ) @ %s\0A\00"
define void @sj_onError(i32 %0, i8* %1, i8* %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1, i8* %2)
ret void
}
int omap_ssi_config(struct omap_ssi_board_config *ssi_config) { return 0; }


x86 assembly (clang, -O0):
<omap_ssi_config>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_ssi_config>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.omap_ssi_board_config = type opaque
define i32 @omap_ssi_config(%struct.omap_ssi_board_config* %0) {
%2 = alloca %struct.omap_ssi_board_config*
store %struct.omap_ssi_board_config* %0, %struct.omap_ssi_board_config** %2
ret i32 0
}

LLVM IR (-O2):
%struct.omap_ssi_board_config = type opaque
define i32 @omap_ssi_config(%struct.omap_ssi_board_config* nocapture readnone %0) {
ret i32 0
}
void avio_flush() {}


x86 assembly (clang, -O0):
<avio_flush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_flush>:
ret

LLVM IR (-O0):
define void @avio_flush() {
ret void
}

LLVM IR (-O2):
define void @avio_flush() {
ret void
}
__attribute__((always_)) unsigned char inb(unsigned short port) {
  unsigned char ret;
  __asm__ __volatile__("inb %1, %0" : "=a"(ret) : "Nd"(port));
  return ret;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ echo_test(int, int, int);
void echo_test_1000K_10(void) { echo_test(0x00, 0x14, 10); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x14,%esi
mov    $0xa,%edx
call   1030 <echo_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %edi,%edi
mov    $0x14,%esi
mov    $0xa,%edx
jmp    1030 <echo_test@plt>

LLVM IR (-O0):
define void @echo_test_1000K_10() {
%1 = call i32 @echo_test(i32 0, i32 20, i32 10)
ret void
}

LLVM IR (-O2):
define void @echo_test_1000K_10() {
%1 = tail call i32 @echo_test(i32 0, i32 20, i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf(
      "usage: renamefat32compat [-d] [-r] <path>...\n"
      "Rename directories and files so that they are compatible with FAT32.\n"
      "	-d -- dry run, show what the program would do\n"
      "	-r -- recursively descend into directories\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [206 x i8] c"usage: renamefat32compat [-d] [-r] <path>...\0ARename directories and files so that they are compatible with FAT32.\0A\09-d -- dry run, show what the program would do\0A\09-r -- recursively descend into directories\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([206 x i8], [206 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [205 x i8] c"usage: renamefat32compat [-d] [-r] <path>...\0ARename directories and files so that they are compatible with FAT32.\0A\09-d -- dry run, show what the program would do\0A\09-r -- recursively descend into directories\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([205 x i8], [205 x i8]* @str, i64 0, i64 0))
ret void
}
void glutSpecialUpFunc(void (*func)(int key, int x, int y)) {}


x86 assembly (clang, -O0):
<glutSpecialUpFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutSpecialUpFunc>:
ret

LLVM IR (-O0):
define void @glutSpecialUpFunc(void (i32, i32, i32)* %0) {
%2 = alloca void (i32, i32, i32)*
store void (i32, i32, i32)* %0, void (i32, i32, i32)** %2
ret void
}

LLVM IR (-O2):
define void @glutSpecialUpFunc(void (i32, i32, i32)* nocapture %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef scalar_t__ int32_t;
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ dds_lookup(scalar_t__);
int16_t dds_offset(uint32_t phase_acc, int32_t phase_offset) {
  return dds_lookup(phase_acc + phase_offset);
}


x86 assembly (clang, -O0):
<dds_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
add    -0x10(%rbp),%rdi
call   1030 <dds_lookup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dds_offset>:
add    %rsi,%rdi
jmp    1030 <dds_lookup@plt>

LLVM IR (-O0):
define i32 @dds_offset(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
%8 = call i32 @dds_lookup(i64 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @dds_offset(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
%4 = tail call i32 @dds_lookup(i64 %3)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ getgid();
__attribute__((__weak__, __always___)) gid_t softboundmpx_getgid(void) {
  return getgid();
}


x86 assembly (clang, -O0):
<softboundmpx_getgid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getgid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_getgid>:
xor    %eax,%eax
jmp    1030 <getgid@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_getgid() {
%1 = call i32 (...) @getgid()
ret i32 %1
}

LLVM IR (-O2):
define weak i32 @softboundmpx_getgid() {
%1 = tail call i32 (...) @getgid()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void uart_close_dev(int fd) { close(fd); }


x86 assembly (clang, -O0):
<uart_close_dev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_close_dev>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @uart_close_dev(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @uart_close_dev(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t uint32min(uint32_t a, uint32_t b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<uint32min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <uint32min+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <uint32min+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint32min>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @uint32min(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @uint32min(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
void setcond(int val) {
  if (val == 1)
    ol("scf");
  else
    ol("and\ta");
}


x86 assembly (clang, -O0):
<setcond>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1136 <setcond+0x26>
lea    0xed4(%rip),%rdi
call   1030 <ol@plt>
jmp    1142 <setcond+0x32>
lea    0xec7(%rip),%rdi
call   1030 <ol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setcond>:
cmp    $0x1,%edi
lea    0xee6(%rip),%rax
lea    0xee3(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"scf\00"
@.str.1 = [6 x i8] c"and\09a\00"
define void @setcond(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @ol(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %1
%8 = call i32 @ol(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"scf\00"
@.str.1 = [6 x i8] c"and\09a\00"
define void @setcond(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @ol(i8* %3)
ret void
}
int test_imm_CCuint8_mem(unsigned char *val) {
  return ((*val) & (0xCC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CCuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xcc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CCuint8_mem>:
testb  $0xcc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CCuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 204
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_CCuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -52
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int in_addr_t;

/* Variables and functions */
int htonl(int);
in_addr_t prefixLengthToIpv4Netmask(int prefix_length) {
  in_addr_t mask = 0;
  if (prefix_length <= 0 || prefix_length > 32) {
    return 0;
  }
  mask = ~mask << (32 - prefix_length);
  mask = htonl(mask);
  return mask;
}


x86 assembly (clang, -O0):
<prefixLengthToIpv4Netmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1136 <prefixLengthToIpv4Netmask+0x26>
cmpl   $0x20,-0x8(%rbp)
jle    1142 <prefixLengthToIpv4Netmask+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1166 <prefixLengthToIpv4Netmask+0x56>
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <htonl@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prefixLengthToIpv4Netmask>:
lea    -0x21(%rdi),%eax
cmp    $0xffffffe0,%eax
jae    111b <prefixLengthToIpv4Netmask+0xb>
xor    %eax,%eax
ret
neg    %dil
mov    $0xffffffff,%eax
mov    %edi,%ecx
shl    %cl,%eax
mov    %eax,%edi
jmp    1030 <htonl@plt>

LLVM IR (-O0):
define i32 @prefixLengthToIpv4Netmask(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 32
br i1 %9, label %10, label %11
10: ; preds = %7, %1
store i32 0, i32* %2
br label %20
11: ; preds = %7
%12 = load i32, i32* %4
%13 = xor i32 %12, -1
%14 = load i32, i32* %3
%15 = sub nsw i32 32, %14
%16 = shl i32 %13, %15
store i32 %16, i32* %4
%17 = load i32, i32* %4
%18 = call i32 @htonl(i32 %17)
store i32 %18, i32* %4
%19 = load i32, i32* %4
store i32 %19, i32* %2
br label %20
20: ; preds = %11, %10
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @prefixLengthToIpv4Netmask(i32 %0) {
%2 = add i32 %0, -33
%3 = icmp ult i32 %2, -32
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = sub nuw nsw i32 32, %0
%6 = shl nsw i32 -1, %5
%7 = tail call i32 @htonl(i32 %6)
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
float obter_numero_uniforme();
float obter_numero_uniforme_continuo(float l_inf, float l_sup) {
  float u = obter_numero_uniforme();
  return l_inf + (l_sup - l_inf) * u;
}


x86 assembly (clang, -O0):
<obter_numero_uniforme_continuo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    $0x0,%al
call   1030 <obter_numero_uniforme@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<obter_numero_uniforme_continuo>:
push   %rax
movss  %xmm1,0x4(%rsp)
movss  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <obter_numero_uniforme@plt>
movss  (%rsp),%xmm1
movss  0x4(%rsp),%xmm2
subss  %xmm1,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @obter_numero_uniforme_continuo(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = call float (...) @obter_numero_uniforme()
store float %6, float* %5
%7 = load float, float* %3
%8 = load float, float* %4
%9 = load float, float* %3
%10 = fsub float %8, %9
%11 = load float, float* %5
%12 = call float @llvm.fmuladd.f32(float %10, float %11, float %7)
ret float %12
}

LLVM IR (-O2):
define float @obter_numero_uniforme_continuo(float %0, float %1) {
%3 = tail call float (...) @obter_numero_uniforme()
%4 = fsub float %1, %0
%5 = tail call float @llvm.fmuladd.f32(float %4, float %3, float %0)
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ dequeueList();
int /*<<< orphan*/ peekList();
int /*<<< orphan*/ reportError(char);
scalar_t__ strcmp(int /*<<< orphan*/, char *);
int ALPHABET() {
  if (strcmp(peekList(), "<alphabet>") != 0) {
    reportError('n');
    return 0;
  }
  dequeueList();
  dequeueList();
  return 1;
}


x86 assembly (clang, -O0):
<ALPHABET>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <peekList@plt>
mov    %eax,%edi
lea    0xea8(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
je     117d <ALPHABET+0x3d>
mov    $0x6e,%edi
call   1030 <reportError@plt>
movl   $0x0,-0x4(%rbp)
jmp    1192 <ALPHABET+0x52>
mov    $0x0,%al
call   1060 <dequeueList@plt>
mov    $0x0,%al
call   1060 <dequeueList@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ALPHABET>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <peekList@plt>
lea    0xeaf(%rip),%rsi
mov    %eax,%edi
call   1040 <strcmp@plt>
test   %rax,%rax
je     1169 <ALPHABET+0x29>
mov    $0x6e,%edi
call   1030 <reportError@plt>
jmp    117c <ALPHABET+0x3c>
xor    %eax,%eax
call   1060 <dequeueList@plt>
xor    %eax,%eax
call   1060 <dequeueList@plt>
mov    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"<alphabet>\00"
define i32 @ALPHABET() {
%1 = alloca i32
%2 = call i32 (...) @peekList()
%3 = call i64 @strcmp(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @reportError(i8 signext 110)
store i32 0, i32* %1
br label %10
7: ; preds = %0
%8 = call i32 (...) @dequeueList()
%9 = call i32 (...) @dequeueList()
store i32 1, i32* %1
br label %10
10: ; preds = %7, %5
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [11 x i8] c"<alphabet>\00"
define i32 @ALPHABET() {
%1 = tail call i32 (...) @peekList()
%2 = tail call i64 @strcmp(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @reportError(i8 signext 110)
br label %9
6: ; preds = %0
%7 = tail call i32 (...) @dequeueList()
%8 = tail call i32 (...) @dequeueList()
br label %9
9: ; preds = %6, %4
%10 = phi i32 [ 0, %4 ], [ 1, %6 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ DisableDefineStyleMacros();
int /*<<< orphan*/ EnableDefineStyleMacros();
int /*<<< orphan*/ MacDef(int);
int /*<<< orphan*/ NextTok();
void DoDefine(void) {
  DisableDefineStyleMacros();
  NextTok();
  EnableDefineStyleMacros();
  MacDef(1);
}


x86 assembly (clang, -O0):
<DoDefine>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <DisableDefineStyleMacros@plt>
mov    $0x0,%al
call   1030 <NextTok@plt>
mov    $0x0,%al
call   1060 <EnableDefineStyleMacros@plt>
mov    $0x1,%edi
call   1050 <MacDef@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoDefine>:
push   %rax
xor    %eax,%eax
call   1040 <DisableDefineStyleMacros@plt>
xor    %eax,%eax
call   1030 <NextTok@plt>
xor    %eax,%eax
call   1060 <EnableDefineStyleMacros@plt>
mov    $0x1,%edi
pop    %rax
jmp    1050 <MacDef@plt>

LLVM IR (-O0):
define void @DoDefine() {
%1 = call i32 (...) @DisableDefineStyleMacros()
%2 = call i32 (...) @NextTok()
%3 = call i32 (...) @EnableDefineStyleMacros()
%4 = call i32 @MacDef(i32 1)
ret void
}

LLVM IR (-O2):
define void @DoDefine() {
%1 = tail call i32 (...) @DisableDefineStyleMacros()
%2 = tail call i32 (...) @NextTok()
%3 = tail call i32 (...) @EnableDefineStyleMacros()
%4 = tail call i32 @MacDef(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_ext_device_manager_set_device_description() {
  printf("NOT IMPLEMENTED:"
         "pa_ext_device_manager_set_device_description"
         "\n");
}


x86 assembly (clang, -O0):
<pa_ext_device_manager_set_device_description>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_ext_device_manager_set_device_description>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"NOT IMPLEMENTED:pa_ext_device_manager_set_device_description\0A\00"
define i32 @pa_ext_device_manager_set_device_description() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [61 x i8] c"NOT IMPLEMENTED:pa_ext_device_manager_set_device_description\00"
define i32 @pa_ext_device_manager_set_device_description() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([61 x i8], [61 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void func5() {
  int i = 0;
  if (i > 5)
    bar();
}


x86 assembly (clang, -O0):
<func5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jle    1130 <func5+0x20>
mov    $0x0,%al
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func5>:
ret

LLVM IR (-O0):
define void @func5() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = icmp sgt i32 %2, 5
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @bar()
br label %6
6: ; preds = %4, %0
ret void
}

LLVM IR (-O2):
define void @func5() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
scalar_t__ islittleendian();
uint32_t htonl(uint32_t hostlong) {
  if (islittleendian())
    return ((hostlong & 0x000000FF) << 24) | ((hostlong & 0x0000FF00) << 8) |
           ((hostlong & 0x00FF0000) >> 8) | ((hostlong & 0xFF000000) >> 24);
  else
    return hostlong;
}


x86 assembly (clang, -O0):
<htonl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <islittleendian@plt>
cmp    $0x0,%rax
je     1169 <htonl+0x59>
mov    -0x8(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    116f <htonl+0x5f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htonl>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <islittleendian@plt>
test   %rax,%rax
mov    %ebx,%eax
bswap  %eax
cmove  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @htonl(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i64 (...) @islittleendian()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %22
6: ; preds = %1
%7 = load i32, i32* %3
%8 = and i32 %7, 255
%9 = shl i32 %8, 24
%10 = load i32, i32* %3
%11 = and i32 %10, 65280
%12 = shl i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %3
%15 = and i32 %14, 16711680
%16 = ashr i32 %15, 8
%17 = or i32 %13, %16
%18 = load i32, i32* %3
%19 = and i32 %18, -16777216
%20 = lshr i32 %19, 24
%21 = or i32 %17, %20
store i32 %21, i32* %2
br label %24
22: ; preds = %1
%23 = load i32, i32* %3
store i32 %23, i32* %2
br label %24
24: ; preds = %22, %6
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @htonl(i32 %0) {
%2 = tail call i64 (...) @islittleendian()
%3 = icmp eq i64 %2, 0
%4 = tail call i32 @llvm.bswap.i32(i32 %0)
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Variables and functions */
double __ocml_fma_f64(double, double, double);
double fma(double x, double y, double z) { return __ocml_fma_f64(x, y, z); }


x86 assembly (clang, -O0):
<fma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <__ocml_fma_f64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fma>:
jmp    1030 <__ocml_fma_f64@plt>

LLVM IR (-O0):
define double @fma(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @__ocml_fma_f64(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @fma(double %0, double %1, double %2) {
%4 = tail call double @__ocml_fma_f64(double %0, double %1, double %2)
ret double %4
}
/* Variables and functions */
double pow(double, int);
double piemathSquare(double a) { return pow(a, 2); }


x86 assembly (clang, -O0):
<piemathSquare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piemathSquare>:
mov    $0x2,%edi
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @piemathSquare(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @pow(double %3, i32 2)
ret double %4
}

LLVM IR (-O2):
define double @piemathSquare(double %0) {
%2 = tail call double @pow(double %0, i32 2)
ret double %2
}
/* Variables and functions */
int fibonnaci(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int variavel;
  int num;
  printf("Entre com o numero de vezes:");
  scanf("%d", &variavel);
  num = fibonnaci(variavel);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
lea    0xecb(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <fibonnaci@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed9(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <fibonnaci@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Entre com o numero de vezes:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = call i32 @fibonnaci(i32 %6)
store i32 %7, i32* %3
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"Entre com o numero de vezes:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @fibonnaci(i32 %5)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int getc(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
int Word(FILE *fp) {
  int i0;
  int i1;
  i0 = getc(stdin);
  i1 = getc(stdin);
  return i0 | i1 << 8;
}


x86 assembly (clang, -O0):
<Word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <getc@plt>
mov    %eax,-0xc(%rbp)
mov    0x2eb4(%rip),%rax
mov    (%rax),%edi
call   1030 <getc@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Word>:
push   %r14
push   %rbx
push   %rax
mov    0x2ecd(%rip),%r14
mov    (%r14),%edi
call   1030 <getc@plt>
mov    %eax,%ebx
mov    (%r14),%edi
call   1030 <getc@plt>
shl    $0x8,%eax
or     %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @Word(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32, i32* @stdin
%6 = call i32 @getc(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* @stdin
%8 = call i32 @getc(i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = shl i32 %10, 8
%12 = or i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @Word(i32* nocapture readnone %0) {
%2 = load i32, i32* @stdin
%3 = tail call i32 @getc(i32 %2)
%4 = load i32, i32* @stdin
%5 = tail call i32 @getc(i32 %4)
%6 = shl i32 %5, 8
%7 = or i32 %6, %3
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ XConfigureRequestEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XConfigureRequestEvent(void) {
  XConfigureRequestEvent *_p =
      (XConfigureRequestEvent *)malloc(sizeof(XConfigureRequestEvent));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XConfigureRequestEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XConfigureRequestEvent+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XConfigureRequestEvent>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XConfigureRequestEvent+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XConfigureRequestEvent() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XConfigureRequestEvent() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
void genc_ngle_d() {}


x86 assembly (clang, -O0):
<genc_ngle_d>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genc_ngle_d>:
ret

LLVM IR (-O0):
define void @genc_ngle_d() {
ret void
}

LLVM IR (-O2):
define void @genc_ngle_d() {
ret void
}
unsigned char bit_value(unsigned char x, unsigned char p) {
  return (x >> p) & 1;
}


x86 assembly (clang, -O0):
<bit_value>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_value>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%al
ret

LLVM IR (-O0):
define zeroext i8 @bit_value(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = ashr i32 %6, %8
%10 = and i32 %9, 1
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @bit_value(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = lshr i32 %3, %4
%6 = trunc i32 %5 to i8
%7 = and i8 %6, 1
ret i8 %7
}
void INT_Excep_DMAC_DMAC0I(void) {}


x86 assembly (clang, -O0):
<INT_Excep_DMAC_DMAC0I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_DMAC_DMAC0I>:
ret

LLVM IR (-O0):
define void @INT_Excep_DMAC_DMAC0I() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_DMAC_DMAC0I() {
ret void
}
/* Variables and functions */
int agile_string_hash(void const *);
int agile_string_hash2(const void *key) {
  int h1 = agile_string_hash(key);
  return h1 + 1;
}


x86 assembly (clang, -O0):
<agile_string_hash2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <agile_string_hash@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<agile_string_hash2>:
push   %rax
call   1030 <agile_string_hash@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @agile_string_hash2(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @agile_string_hash(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @agile_string_hash2(i8* %0) {
%2 = tail call i32 @agile_string_hash(i8* %0)
%3 = add nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int cparam(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc) {
  printf("Result is %d\n", cparam(argc - 3, 2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x3,%edi
mov    $0x2,%esi
call   1030 <cparam@plt>
mov    %eax,%esi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
add    $0xfffffffd,%edi
mov    $0x2,%esi
call   1030 <cparam@plt>
lea    0xecb(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Result is %d\0A\00"
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sub nsw i32 %4, 3
%6 = call i32 @cparam(i32 %5, i32 2)
%7 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Result is %d\0A\00"
define i32 @main(i32 %0) {
%2 = add nsw i32 %0, -3
%3 = tail call i32 @cparam(i32 %2, i32 2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
unsigned int __isSkipResetAddr(void *addr) {
  return !!(addr ==
            (void *)*((unsigned long *)*(unsigned long *)(0x000000000000c18u) +
                      (187)));
}


x86 assembly (clang, -O0):
<__isSkipResetAddr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xc18,%ecx
mov    (%rcx),%rcx
mov    0x5d8(%rcx),%rcx
cmp    %rcx,%rax
sete   %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__isSkipResetAddr>:
mov    0xc18,%rcx
xor    %eax,%eax
cmp    %rdi,0x5d8(%rcx)
sete   %al
ret

LLVM IR (-O0):
define i32 @__isSkipResetAddr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i64, i64* inttoptr (i64 3096 to i64*)
%5 = inttoptr i64 %4 to i64*
%6 = getelementptr inbounds i64, i64* %5, i64 187
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
%9 = icmp eq i8* %3, %8
%10 = xor i1 %9, true
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @__isSkipResetAddr(i8* readnone %0) {
%2 = load i64, i64* inttoptr (i64 3096 to i64*)
%3 = inttoptr i64 %2 to i64*
%4 = getelementptr inbounds i64, i64* %3, i64 187
%5 = load i64, i64* %4
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i8* %6, %0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ log1(char *);
int /*<<< orphan*/ sleep(int);
void nomem() {
  log1("alert: out of memory, sleeping...\n");
  sleep(10);
}


x86 assembly (clang, -O0):
<nomem>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <log1@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nomem>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <log1@plt>
mov    $0xa,%edi
pop    %rax
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"alert: out of memory, sleeping...\0A\00"
define void @nomem() {
%1 = call i32 @log1(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @sleep(i32 10)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"alert: out of memory, sleeping...\0A\00"
define void @nomem() {
%1 = tail call i32 @log1(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @sleep(i32 10)
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int stat(char const *, struct stat *);
int ___xstat(int __ver, const char *__filename, struct stat *__stat_buf) {
  return stat(__filename, __stat_buf);
}


x86 assembly (clang, -O0):
<___xstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <stat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___xstat>:
mov    %rsi,%rdi
mov    %rdx,%rsi
jmp    1030 <stat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @___xstat(i32 %0, i8* %1, %struct.stat* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca %struct.stat*
store i32 %0, i32* %4
store i8* %1, i8** %5
store %struct.stat* %2, %struct.stat** %6
%7 = load i8*, i8** %5
%8 = load %struct.stat*, %struct.stat** %6
%9 = call i32 @stat(i8* %7, %struct.stat* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @___xstat(i32 %0, i8* nocapture %1, %struct.stat* nocapture %2) {
%4 = tail call i32 @stat(i8* %1, %struct.stat* %2)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void generate_upc_psk_dummy(uint32_t *sn, char *psk) {
  strcpy(psk, "--------");
}


x86 assembly (clang, -O0):
<generate_upc_psk_dummy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_upc_psk_dummy>:
mov    %rsi,%rdi
lea    0xee6(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"--------\00"
define void @generate_upc_psk_dummy(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @strcpy(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"--------\00"
define void @generate_upc_psk_dummy(i32* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char lc(char);
scalar_t__ strlen(char *);
void lc_str(char *s) {
  for (int i = 0; i < (int)strlen(s); i++)
    s[i] = lc(s[i]);
}


x86 assembly (clang, -O0):
<lc_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jge    117c <lc_str+0x5c>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <lc@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <lc_str+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lc_str>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %eax,%eax
jle    1161 <lc_str+0x41>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%edi
call   1040 <lc@plt>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1140 <lc_str+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @lc_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %21, %1
%5 = load i32, i32* %3
%6 = load i8*, i8** %2
%7 = call i64 @strlen(i8* %6)
%8 = trunc i64 %7 to i32
%9 = icmp slt i32 %5, %8
br i1 %9, label %10, label %24
10: ; preds = %4
%11 = load i8*, i8** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call signext i8 @lc(i8 signext %15)
%17 = load i8*, i8** %2
%18 = load i32, i32* %3
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
br label %21
21: ; preds = %10
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %4
24: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @lc_str(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = trunc i64 %2 to i32
%4 = icmp sgt i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %6, %1
ret void
6: ; preds = %1, %6
%7 = phi i64 [ %11, %6 ], [ 0, %1 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call signext i8 @lc(i8 signext %9)
store i8 %10, i8* %8
%11 = add nuw nsw i64 %7, 1
%12 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%13 = shl i64 %12, 32
%14 = ashr exact i64 %13, 32
%15 = icmp slt i64 %11, %14
br i1 %15, label %6, label %5
}
long max_long(long a, long b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<max_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <max_long+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <max_long+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_long>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @max_long(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @max_long(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
unsigned int qConvertRgb16To32(unsigned short c) {
  return ((c << 3) & 0x00F8) | ((c << 5) & 0xFC00) | ((c << 8) & 0xF80000) |
         0xFF070307;
}


x86 assembly (clang, -O0):
<qConvertRgb16To32>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
shl    $0x3,%eax
and    $0xf8,%eax
movzwl -0x2(%rbp),%ecx
shl    $0x5,%ecx
and    $0xfc00,%ecx
or     %ecx,%eax
movzwl -0x2(%rbp),%ecx
shl    $0x8,%ecx
and    $0xf80000,%ecx
or     %ecx,%eax
or     $0xff070307,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qConvertRgb16To32>:
mov    %edi,%eax
and    $0x1f,%eax
mov    %edi,%ecx
shl    $0x5,%ecx
and    $0xfc00,%ecx
shl    $0x8,%edi
and    $0xf80000,%edi
lea    (%rcx,%rax,8),%eax
add    %edi,%eax
add    $0xff070307,%eax
ret

LLVM IR (-O0):
define i32 @qConvertRgb16To32(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = shl i32 %4, 3
%6 = and i32 %5, 248
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = shl i32 %8, 5
%10 = and i32 %9, 64512
%11 = or i32 %6, %10
%12 = load i16, i16* %2
%13 = zext i16 %12 to i32
%14 = shl i32 %13, 8
%15 = and i32 %14, 16252928
%16 = or i32 %11, %15
%17 = or i32 %16, -16317689
ret i32 %17
}

LLVM IR (-O2):
define i32 @qConvertRgb16To32(i16 zeroext %0) {
%2 = zext i16 %0 to i32
%3 = shl nuw nsw i32 %2, 3
%4 = and i32 %3, 248
%5 = shl nuw nsw i32 %2, 5
%6 = and i32 %5, 64512
%7 = shl nuw nsw i32 %2, 8
%8 = and i32 %7, 16252928
%9 = or i32 %6, %4
%10 = or i32 %9, %8
%11 = or i32 %10, -16317689
ret i32 %11
}
float f(int n) {
  if (n == 0 || n == 1)
    return 1;
  else if (n > 1)
    return f(n - 1) * n;
  return 1;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <f+0x1f>
cmpl   $0x1,-0x8(%rbp)
jne    1141 <f+0x31>
movss  0xec9(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    117b <f+0x6b>
cmpl   $0x1,-0x8(%rbp)
jle    1169 <f+0x59>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <f@plt>
cvtsi2ssl -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    117b <f+0x6b>
jmp    116e <f+0x5e>
movss  0xe8a(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbx
cmp    $0x1,%edi
jle    1130 <f+0x20>
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <f@plt>
movaps %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsi2ss %ebx,%xmm0
mulss  %xmm1,%xmm0
pop    %rbx
ret
movss  0xec8(%rip),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define float @f(i32 %0) {
%2 = alloca float
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store float 1.000000e+00, float* %2
br label %22
10: ; preds = %6
%11 = load i32, i32* %3
%12 = icmp sgt i32 %11, 1
br i1 %12, label %13, label %20
13: ; preds = %10
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 1
%16 = call float @f(i32 %15)
%17 = load i32, i32* %3
%18 = sitofp i32 %17 to float
%19 = fmul float %16, %18
store float %19, float* %2
br label %22
20: ; preds = %10
br label %21
21: ; preds = %20
store float 1.000000e+00, float* %2
br label %22
22: ; preds = %21, %13, %9
%23 = load float, float* %2
ret float %23
}

LLVM IR (-O2):
define float @f(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %5, label %3
3: ; preds = %1, %5
%4 = phi float [ %9, %5 ], [ 1.000000e+00, %1 ]
ret float %4
5: ; preds = %1
%6 = add nsw i32 %0, -1
%7 = tail call float @f(i32 %6)
%8 = sitofp i32 %0 to float
%9 = fmul float %7, %8
br label %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ cpu_nswap16p(int /*<<< orphan*/ *, int /*<<< orphan*/);
void cpu_to_le16p(uint16_t *outp, uint16_t in) { cpu_nswap16p(outp, in); }


x86 assembly (clang, -O0):
<cpu_to_le16p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <cpu_nswap16p@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_to_le16p>:
jmp    1030 <cpu_nswap16p@plt>

LLVM IR (-O0):
define void @cpu_to_le16p(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @cpu_nswap16p(i32* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @cpu_to_le16p(i32* %0, i32 %1) {
%3 = tail call i32 @cpu_nswap16p(i32* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ InitGlobalVariables();
int /*<<< orphan*/ InitMemory();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ run_test();
int main() {
  InitMemory();
  InitGlobalVariables();
  exit(run_test());
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <InitMemory@plt>
mov    $0x0,%al
call   1040 <InitGlobalVariables@plt>
mov    $0x0,%al
call   1030 <run_test@plt>
mov    %eax,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <InitMemory@plt>
xor    %eax,%eax
call   1040 <InitGlobalVariables@plt>
xor    %eax,%eax
call   1030 <run_test@plt>
mov    %eax,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @InitMemory()
%3 = call i32 (...) @InitGlobalVariables()
%4 = call i32 (...) @run_test()
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @InitMemory()
%2 = tail call i32 (...) @InitGlobalVariables()
%3 = tail call i32 (...) @run_test()
%4 = tail call i32 @exit(i32 %3)
unreachable
}