xunge/DecIR huggingface dataset:
/* Variables and functions */
int fail(int /*<<< orphan*/);
int sext_i16to32(int);
long long sext_i32to64(int);
int sext_i8to16(int);
int test_sext(void) {
  if (sext_i8to16(-4) != -4)
    return fail(0);
  if (sext_i16to32(-6) != -6)
    return fail(0);
  if (sext_i32to64(-6) != -6ll)
    return fail(0);
  return 0x1000000;
}


x86 assembly (clang, -O0):
<test_sext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xfffffffc,%edi
call   1040 <sext_i8to16@plt>
cmp    $0xfffffffc,%eax
je     116a <test_sext+0x2a>
xor    %edi,%edi
call   1030 <fail@plt>
mov    %eax,-0x4(%rbp)
jmp    11b6 <test_sext+0x76>
mov    $0xfffffffa,%edi
call   1060 <sext_i16to32@plt>
cmp    $0xfffffffa,%eax
je     118c <test_sext+0x4c>
xor    %edi,%edi
call   1030 <fail@plt>
mov    %eax,-0x4(%rbp)
jmp    11b6 <test_sext+0x76>
mov    $0xfffffffa,%edi
call   1050 <sext_i32to64@plt>
cmp    $0xfffffffffffffffa,%rax
je     11af <test_sext+0x6f>
xor    %edi,%edi
call   1030 <fail@plt>
mov    %eax,-0x4(%rbp)
jmp    11b6 <test_sext+0x76>
movl   $0x1000000,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sext>:
push   %rax
mov    $0xfffffffc,%edi
call   1040 <sext_i8to16@plt>
cmp    $0xfffffffc,%eax
jne    1176 <test_sext+0x36>
mov    $0xfffffffa,%edi
call   1060 <sext_i16to32@plt>
cmp    $0xfffffffa,%eax
jne    1176 <test_sext+0x36>
mov    $0xfffffffa,%edi
call   1050 <sext_i32to64@plt>
cmp    $0xfffffffffffffffa,%rax
jne    1176 <test_sext+0x36>
mov    $0x1000000,%eax
pop    %rcx
ret
xor    %edi,%edi
pop    %rax
jmp    1030 <fail@plt>

LLVM IR (-O0):
define i32 @test_sext() {
%1 = alloca i32
%2 = call i32 @sext_i8to16(i32 -4)
%3 = icmp ne i32 %2, -4
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @fail(i32 0)
store i32 %5, i32* %1
br label %17
6: ; preds = %0
%7 = call i32 @sext_i16to32(i32 -6)
%8 = icmp ne i32 %7, -6
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 @fail(i32 0)
store i32 %10, i32* %1
br label %17
11: ; preds = %6
%12 = call i64 @sext_i32to64(i32 -6)
%13 = icmp ne i64 %12, -6
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = call i32 @fail(i32 0)
store i32 %15, i32* %1
br label %17
16: ; preds = %11
store i32 16777216, i32* %1
br label %17
17: ; preds = %16, %14, %9, %4
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @test_sext() {
%1 = tail call i32 @sext_i8to16(i32 -4)
%2 = icmp eq i32 %1, -4
br i1 %2, label %3, label %9
3: ; preds = %0
%4 = tail call i32 @sext_i16to32(i32 -6)
%5 = icmp eq i32 %4, -6
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i64 @sext_i32to64(i32 -6)
%8 = icmp eq i64 %7, -6
br i1 %8, label %11, label %9
9: ; preds = %6, %3, %0
%10 = tail call i32 @fail(i32 0)
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ 16777216, %6 ], [ %10, %9 ]
ret i32 %12
}
void BIO_sock_cleanup(void) {}


x86 assembly (clang, -O0):
<BIO_sock_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_sock_cleanup>:
ret

LLVM IR (-O0):
define void @BIO_sock_cleanup() {
ret void
}

LLVM IR (-O2):
define void @BIO_sock_cleanup() {
ret void
}
RCU_DEF_INIT_FUNC(user_f3_init, param) {}


x86 assembly (clang, -O0):
<RCU_DEF_INIT_FUNC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCU_DEF_INIT_FUNC>:
ret

LLVM IR (-O0):
define i32 @RCU_DEF_INIT_FUNC(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @RCU_DEF_INIT_FUNC(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
float cosf(float);
float sinf(float);
void sincosf(float x, float *psin, float *pcos) {
  *psin = sinf(x);
  *pcos = cosf(x);
}


x86 assembly (clang, -O0):
<sincosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
call   1040 <cosf@plt>
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincosf>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movss  %xmm0,0x4(%rsp)
call   1030 <sinf@plt>
movss  %xmm0,(%rbx)
movss  0x4(%rsp),%xmm0
call   1040 <cosf@plt>
movss  %xmm0,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @sincosf(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = call float @sinf(float %7)
%9 = load float*, float** %5
store float %8, float* %9
%10 = load float, float* %4
%11 = call float @cosf(float %10)
%12 = load float*, float** %6
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @sincosf(float %0, float* nocapture writeonly %1, float* nocapture writeonly %2) {
%4 = tail call float @sinf(float %0)
store float %4, float* %1
%5 = tail call float @cosf(float %0)
store float %5, float* %2
ret void
}
const char *fpp_config_get_plugin_file_name(void) {
  return "libpepflashplayer.so";
}


x86 assembly (clang, -O0):
<fpp_config_get_plugin_file_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpp_config_get_plugin_file_name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [21 x i8] c"libpepflashplayer.so\00"
define i8* @fpp_config_get_plugin_file_name() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [21 x i8] c"libpepflashplayer.so\00"
define i8* @fpp_config_get_plugin_file_name() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}
int getSignBit(int num) {
  int j = num >> 31;
  if (j & 1) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<getSignBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     112b <getSignBit+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1132 <getSignBit+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSignBit>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @getSignBit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = ashr i32 %5, 31
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, 1
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @getSignBit(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
unsigned int odroid_xu_gpio_read_13() {
  unsigned int bank_offset = 0x0C20;
  unsigned int bit_index = 5;
  return (exynos_5410_gpio_read(bank_offset) >> bit_index) & 0x1;
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_read_13>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xc20,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exynos_5410_gpio_read@plt>
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_read_13>:
push   %rax
mov    $0xc20,%edi
call   1030 <exynos_5410_gpio_read@plt>
shr    $0x5,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @odroid_xu_gpio_read_13() {
%1 = alloca i32
%2 = alloca i32
store i32 3104, i32* %1
store i32 5, i32* %2
%3 = load i32, i32* %1
%4 = call i32 @exynos_5410_gpio_read(i32 %3)
%5 = load i32, i32* %2
%6 = lshr i32 %4, %5
%7 = and i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @odroid_xu_gpio_read_13() {
%1 = tail call i32 @exynos_5410_gpio_read(i32 3104)
%2 = lshr i32 %1, 5
%3 = and i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_cellids(char *);
void fgmvwrite_cellids_(char *cellids) { gmvwrite_cellids(cellids); }


x86 assembly (clang, -O0):
<fgmvwrite_cellids_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gmvwrite_cellids@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_cellids_>:
jmp    1030 <gmvwrite_cellids@plt>

LLVM IR (-O0):
define void @fgmvwrite_cellids_(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gmvwrite_cellids(i8* %3)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_cellids_(i8* %0) {
%2 = tail call i32 @gmvwrite_cellids(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_CONT;
int /*<<< orphan*/ ptrace(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ xibugger_wait(int /*<<< orphan*/);
void cmd_run(pid_t pid) {
  ptrace(PTRACE_CONT, pid, 0, 0);
  xibugger_wait(pid);
}


x86 assembly (clang, -O0):
<cmd_run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1040 <ptrace@plt>
mov    -0x4(%rbp),%edi
call   1030 <xibugger_wait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_run>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    %ebx,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1040 <ptrace@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <xibugger_wait@plt>

LLVM IR (-O0):
@PTRACE_CONT = global i32 0
define void @cmd_run(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @PTRACE_CONT
%4 = load i32, i32* %2
%5 = call i32 @ptrace(i32 %3, i32 %4, i32 0, i32 0)
%6 = load i32, i32* %2
%7 = call i32 @xibugger_wait(i32 %6)
ret void
}

LLVM IR (-O2):
@PTRACE_CONT = global i32 0
define void @cmd_run(i32 %0) {
%2 = load i32, i32* @PTRACE_CONT
%3 = tail call i32 @ptrace(i32 %2, i32 %0, i32 0, i32 0)
%4 = tail call i32 @xibugger_wait(i32 %0)
ret void
}
int quotient(int num1, int num2) { return (num1 + num2) / 2; }


x86 assembly (clang, -O0):
<quotient>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<quotient>:
lea    (%rdi,%rsi,1),%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @quotient(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = sdiv i32 %7, 2
ret i32 %8
}

LLVM IR (-O2):
define i32 @quotient(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = sdiv i32 %3, 2
ret i32 %4
}
int convert(char *str) {}


x86 assembly (clang, -O0):
<convert>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert>:
ret

LLVM IR (-O0):
define i32 @convert(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @convert(i8* nocapture readnone %0) {
ret i32 undef
}
int is_in(int tok, int *toks) {
  int *t;
  for (t = toks; *t; t++)
    if (*t == tok)
      return t - toks;
  return -1;
}


x86 assembly (clang, -O0):
<is_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpl   $0x0,(%rax)
je     115c <is_in+0x5c>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
cmp    -0x8(%rbp),%eax
jne    1146 <is_in+0x46>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
mov    %eax,-0x4(%rbp)
jmp    1163 <is_in+0x63>
jmp    114b <is_in+0x4b>
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
jmp    1113 <is_in+0x13>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in>:
mov    (%rsi),%edx
mov    $0xffffffff,%eax
test   %edx,%edx
je     1120 <is_in+0x20>
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edi,%edx
je     1121 <is_in+0x21>
mov    0x4(%rsi,%rcx,4),%edx
add    $0x1,%rcx
test   %edx,%edx
jne    1110 <is_in+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @is_in(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%7 = load i32*, i32** %5
store i32* %7, i32** %6
br label %8
8: ; preds = %26, %2
%9 = load i32*, i32** %6
%10 = load i32, i32* %9
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %29
12: ; preds = %8
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = load i32, i32* %4
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %25
17: ; preds = %12
%18 = load i32*, i32** %6
%19 = load i32*, i32** %5
%20 = ptrtoint i32* %18 to i64
%21 = ptrtoint i32* %19 to i64
%22 = sub i64 %20, %21
%23 = sdiv exact i64 %22, 4
%24 = trunc i64 %23 to i32
store i32 %24, i32* %3
br label %30
25: ; preds = %12
br label %26
26: ; preds = %25
%27 = load i32*, i32** %6
%28 = getelementptr inbounds i32, i32* %27, i32 1
store i32* %28, i32** %6
br label %8
29: ; preds = %8
store i32 -1, i32* %3
br label %30
30: ; preds = %29, %17
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @is_in(i32 %0, i32* %1) {
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %19, label %5
5: ; preds = %2, %15
%6 = phi i32 [ %17, %15 ], [ %3, %2 ]
%7 = phi i32* [ %16, %15 ], [ %1, %2 ]
%8 = icmp eq i32 %6, %0
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = ptrtoint i32* %7 to i64
%11 = ptrtoint i32* %1 to i64
%12 = sub i64 %10, %11
%13 = lshr exact i64 %12, 2
%14 = trunc i64 %13 to i32
br label %19
15: ; preds = %5
%16 = getelementptr inbounds i32, i32* %7, i64 1
%17 = load i32, i32* %16
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %5
19: ; preds = %15, %2, %9
%20 = phi i32 [ %14, %9 ], [ -1, %2 ], [ -1, %15 ]
ret i32 %20
}
/* Variables and functions */
int /*<<< orphan*/ __thumb_startup();
void __iar_program_start() { __thumb_startup(); }


x86 assembly (clang, -O0):
<__iar_program_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__thumb_startup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__iar_program_start>:
xor    %eax,%eax
jmp    1030 <__thumb_startup@plt>

LLVM IR (-O0):
define void @__iar_program_start() {
%1 = call i32 (...) @__thumb_startup()
ret void
}

LLVM IR (-O2):
define void @__iar_program_start() {
%1 = tail call i32 (...) @__thumb_startup()
ret void
}
int mode(int num, ...) { return 0; }


x86 assembly (clang, -O0):
<mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mode(i32 %0, ...) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @mode(i32 %0, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ tcp_scalable_unregister();
void module_unregister_fake(void) {
  if (0)
    tcp_scalable_unregister();
}


x86 assembly (clang, -O0):
<module_unregister_fake>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_unregister_fake>:
ret

LLVM IR (-O0):
define void @module_unregister_fake() {
ret void
}

LLVM IR (-O2):
define void @module_unregister_fake() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srandom(unsigned int);
void prandom_seed(unsigned int seed) { srandom(seed); }


x86 assembly (clang, -O0):
<prandom_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srandom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prandom_seed>:
jmp    1030 <srandom@plt>

LLVM IR (-O0):
define void @prandom_seed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @srandom(i32 %3)
ret void
}

LLVM IR (-O2):
define void @prandom_seed(i32 %0) {
%2 = tail call i32 @srandom(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RamRead32A(int, unsigned long *);
void IORead4times32A(unsigned long *Dat) {
  RamRead32A(0xD000, &Dat[0]);
  RamRead32A(0xD000, &Dat[1]);
  RamRead32A(0xD000, &Dat[2]);
  RamRead32A(0xD000, &Dat[3]);
}


x86 assembly (clang, -O0):
<IORead4times32A>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xd000,%edi
call   1030 <RamRead32A@plt>
mov    -0x8(%rbp),%rsi
add    $0x8,%rsi
mov    $0xd000,%edi
call   1030 <RamRead32A@plt>
mov    -0x8(%rbp),%rsi
add    $0x10,%rsi
mov    $0xd000,%edi
call   1030 <RamRead32A@plt>
mov    -0x8(%rbp),%rsi
add    $0x18,%rsi
mov    $0xd000,%edi
call   1030 <RamRead32A@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IORead4times32A>:
push   %rbx
mov    %rdi,%rbx
mov    $0xd000,%edi
mov    %rbx,%rsi
call   1030 <RamRead32A@plt>
lea    0x8(%rbx),%rsi
mov    $0xd000,%edi
call   1030 <RamRead32A@plt>
lea    0x10(%rbx),%rsi
mov    $0xd000,%edi
call   1030 <RamRead32A@plt>
add    $0x18,%rbx
mov    $0xd000,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <RamRead32A@plt>

LLVM IR (-O0):
define void @IORead4times32A(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = call i32 @RamRead32A(i32 53248, i64* %4)
%6 = load i64*, i64** %2
%7 = getelementptr inbounds i64, i64* %6, i64 1
%8 = call i32 @RamRead32A(i32 53248, i64* %7)
%9 = load i64*, i64** %2
%10 = getelementptr inbounds i64, i64* %9, i64 2
%11 = call i32 @RamRead32A(i32 53248, i64* %10)
%12 = load i64*, i64** %2
%13 = getelementptr inbounds i64, i64* %12, i64 3
%14 = call i32 @RamRead32A(i32 53248, i64* %13)
ret void
}

LLVM IR (-O2):
define void @IORead4times32A(i64* %0) {
%2 = tail call i32 @RamRead32A(i32 53248, i64* %0)
%3 = getelementptr inbounds i64, i64* %0, i64 1
%4 = tail call i32 @RamRead32A(i32 53248, i64* %3)
%5 = getelementptr inbounds i64, i64* %0, i64 2
%6 = tail call i32 @RamRead32A(i32 53248, i64* %5)
%7 = getelementptr inbounds i64, i64* %0, i64 3
%8 = tail call i32 @RamRead32A(i32 53248, i64* %7)
ret void
}
void foo(float *output) {
  int i = 0;
  for (i = 0; i < 32; i++)
    output[i] = 0.0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x20,-0xc(%rbp)
jge    113e <foo+0x3e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <foo+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xorps  %xmm0,%xmm0
movups %xmm0,0x70(%rdi)
movups %xmm0,0x60(%rdi)
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @foo(float* %0) {
%2 = alloca float*
%3 = alloca i32
store float* %0, float** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 32
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load float*, float** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds float, float* %8, i64 %10
store float 0.000000e+00, float* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo(float* nocapture writeonly %0) {
%2 = bitcast float* %0 to i8*
ret void
}
/* Type definitions */
struct plambda_program {
  int dummy;
};

/* Variables and functions */
int run_program_vectorially_at(int /*<<< orphan*/ *, struct plambda_program *,
                               float **, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *, int *, int /*<<< orphan*/,
                               int /*<<< orphan*/);
int eval_dim(struct plambda_program *p, float **val, int *pd) {
  int r = run_program_vectorially_at(NULL, p, val, NULL, NULL, pd, 0, 0);
  return r;
}


x86 assembly (clang, -O0):
<eval_dim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%r9
xor    %eax,%eax
mov    %eax,%r8d
xor    %eax,%eax
mov    %r8,%rdi
mov    %r8,%rcx
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
call   1030 <run_program_vectorially_at@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_dim>:
push   %rax
mov    %rdx,%r9
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
push   $0x0
push   $0x0
call   1030 <run_program_vectorially_at@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.plambda_program = type { i32 }
define i32 @eval_dim(%struct.plambda_program* %0, float** %1, i32* %2) {
%4 = alloca %struct.plambda_program*
%5 = alloca float**
%6 = alloca i32*
%7 = alloca i32
store %struct.plambda_program* %0, %struct.plambda_program** %4
store float** %1, float*** %5
store i32* %2, i32** %6
%8 = load %struct.plambda_program*, %struct.plambda_program** %4
%9 = load float**, float*** %5
%10 = load i32*, i32** %6
%11 = call i32 @run_program_vectorially_at(i32* null, %struct.plambda_program* %8, float** %9, i32* null, i32* null, i32* %10, i32 0, i32 0)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
%struct.plambda_program = type { i32 }
define i32 @eval_dim(%struct.plambda_program* %0, float** %1, i32* %2) {
%4 = tail call i32 @run_program_vectorially_at(i32* null, %struct.plambda_program* %0, float** %1, i32* null, i32* null, i32* %2, i32 0, i32 0)
ret i32 %4
}
void alignment_check() {
  __asm__ __volatile__("cli");
  SetTextColor(0x04 | 0x08, 0x00);
  kprintf("\nERROR: alignment_check\n");
  do {
    __asm__ __volatile__("cli  \n\t"
                         "hlt");
  } while (1 == 1);
}


x86 assembly (clang, -O0):
<alignment_check>:
push   %rbp
mov    %rsp,%rbp
cli
mov    $0xc,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <SetTextColor@plt>
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1040 <kprintf@plt>
cli
hlt
mov    $0x1,%al
test   $0x1,%al
jne    1141 <alignment_check+0x21>
jmp    1152 <alignment_check+0x32>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alignment_check>:
push   %rax
cli
mov    $0xc,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <SetTextColor@plt>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1040 <kprintf@plt>
xchg   %ax,%ax
cli
hlt
jmp    1140 <alignment_check+0x20>

LLVM IR (-O0):
@.str = [25 x i8] c"\0AERROR: alignment_check\0A\00"
define void @alignment_check() {
%1 = call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %4, %0
br label %4
4: ; preds = %3
br i1 true, label %3, label %5
5: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"\0AERROR: alignment_check\0A\00"
define void @alignment_check() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
tail call void asm sideeffect "cli \0A\09hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %3
}
void main() {
  int x;
L1:
  if (x) {
    goto L2;
  } else {
    goto L3;
  }
L2:
  if (x) {
    goto L1;
  } else {
    goto L3;
  }
L3:
  if (x) {
    goto L1;
  } else {
    goto L2;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,-0x4(%rbp)
je     1113 <main+0x13>
jmp    1118 <main+0x18>
jmp    112c <main+0x2c>
cmpl   $0x0,-0x4(%rbp)
je     1127 <main+0x27>
jmp    1104 <main+0x4>
jmp    112c <main+0x2c>
cmpl   $0x0,-0x4(%rbp)
je     113b <main+0x3b>
jmp    1104 <main+0x4>
jmp    1118 <main+0x18>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
br label %2
2: ; preds = %15, %10, %0
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
br label %7
6: ; preds = %2
br label %12
7: ; preds = %16, %5
%8 = load i32, i32* %1
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
br label %2
11: ; preds = %7
br label %12
12: ; preds = %11, %6
%13 = load i32, i32* %1
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
br label %2
16: ; preds = %12
br label %7
}

LLVM IR (-O2):
define void @main() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ plcvm_get_u8(int /*<<< orphan*/);
int /*<<< orphan*/ plcvm_pop();
int /*<<< orphan*/ plcvm_push(int /*<<< orphan*/);
void cb_ldm_u1_s(void) { plcvm_push(plcvm_get_u8(plcvm_pop())); }


x86 assembly (clang, -O0):
<cb_ldm_u1_s>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <plcvm_pop@plt>
mov    %eax,%edi
call   1040 <plcvm_get_u8@plt>
mov    %eax,%edi
call   1050 <plcvm_push@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_ldm_u1_s>:
push   %rax
xor    %eax,%eax
call   1030 <plcvm_pop@plt>
mov    %eax,%edi
call   1040 <plcvm_get_u8@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <plcvm_push@plt>

LLVM IR (-O0):
define void @cb_ldm_u1_s() {
%1 = call i32 (...) @plcvm_pop()
%2 = call i32 @plcvm_get_u8(i32 %1)
%3 = call i32 @plcvm_push(i32 %2)
ret void
}

LLVM IR (-O2):
define void @cb_ldm_u1_s() {
%1 = tail call i32 (...) @plcvm_pop()
%2 = tail call i32 @plcvm_get_u8(i32 %1)
%3 = tail call i32 @plcvm_push(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void sig_proc(int signo) { printf("sig proc...signo = %d\n", signo); }


x86 assembly (clang, -O0):
<sig_proc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_proc>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"sig proc...signo = %d\0A\00"
define void @sig_proc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"sig proc...signo = %d\0A\00"
define void @sig_proc(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int strcmp(void const *, void const *);
int str_cmp(const void *a, const void *b) { return strcmp(a, b); }


x86 assembly (clang, -O0):
<str_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_cmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @str_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @str_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void next4() {
  asm("#"
      "4");
}


x86 assembly (clang, -O0):
<next4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next4>:
ret

LLVM IR (-O0):
define void @next4() {
ret void
}

LLVM IR (-O2):
define void @next4() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
size_t quicly_encodev_capacity(int /*<<< orphan*/);
size_t quicly_retire_connection_id_frame_capacity(uint64_t sequence) {
  return 1 + quicly_encodev_capacity(sequence);
}


x86 assembly (clang, -O0):
<quicly_retire_connection_id_frame_capacity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <quicly_encodev_capacity@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicly_retire_connection_id_frame_capacity>:
push   %rax
call   1030 <quicly_encodev_capacity@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @quicly_retire_connection_id_frame_capacity(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @quicly_encodev_capacity(i32 %3)
%5 = add i64 1, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @quicly_retire_connection_id_frame_capacity(i32 %0) {
%2 = tail call i64 @quicly_encodev_capacity(i32 %0)
%3 = add i64 %2, 1
ret i64 %3
}
int logicalShift(int x, int n) {
  int y = (1 << 31) >> 31;
  int z = 31 + ~n + 1;
  return (x >> n) & (~((y << z) << 1));
}


x86 assembly (clang, -O0):
<logicalShift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
add    $0x1f,%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
shl    $0x1,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logicalShift>:
mov    %esi,%ecx
sar    %cl,%edi
mov    $0x1f,%dl
sub    %cl,%dl
mov    $0xfffffffe,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 -1, i32* %5
%7 = load i32, i32* %4
%8 = xor i32 %7, -1
%9 = add nsw i32 31, %8
%10 = add nsw i32 %9, 1
store i32 %10, i32* %6
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = ashr i32 %11, %12
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = shl i32 %14, %15
%17 = shl i32 %16, 1
%18 = xor i32 %17, -1
%19 = and i32 %13, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = sub i32 31, %1
%4 = ashr i32 %0, %1
%5 = shl i32 -2, %3
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
ret i32 %7
}
void g(int *z, int *y, int x) {
  if (x > 2) {
    g(z, y, x - 2);
    *y = *y * 3;
  } else
    *y = *z;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
jle    1152 <g+0x42>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
sub    $0x2,%edx
call   1030 <g@plt>
mov    -0x10(%rbp),%rax
imul   $0x3,(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    115e <g+0x4e>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbx
mov    %rsi,%rbx
cmp    $0x3,%edx
jl     112b <g+0x1b>
add    $0xfffffffe,%edx
mov    %rbx,%rsi
call   1030 <g@plt>
mov    (%rbx),%eax
lea    (%rax,%rax,2),%eax
jmp    112d <g+0x1d>
mov    (%rdi),%eax
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @g(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp sgt i32 %7, 2
br i1 %8, label %9, label %18
9: ; preds = %3
%10 = load i32*, i32** %4
%11 = load i32*, i32** %5
%12 = load i32, i32* %6
%13 = sub nsw i32 %12, 2
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = mul nsw i32 %15, 3
%17 = load i32*, i32** %5
store i32 %16, i32* %17
br label %22
18: ; preds = %3
%19 = load i32*, i32** %4
%20 = load i32, i32* %19
%21 = load i32*, i32** %5
store i32 %20, i32* %21
br label %22
22: ; preds = %18, %9
ret void
}

LLVM IR (-O2):
define void @g(i32* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 2
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = add nsw i32 %2, -2
tail call void @g(i32* %0, i32* %1, i32 %6)
%7 = load i32, i32* %1
%8 = mul nsw i32 %7, 3
br label %11
9: ; preds = %3
%10 = load i32, i32* %0
br label %11
11: ; preds = %9, %5
%12 = phi i32 [ %10, %9 ], [ %8, %5 ]
store i32 %12, i32* %1
ret void
}
int jac_chain_nm5_init(int *n_in, int *n_out, int *n_int, int *n_real) {
  if (n_in)
    *n_in = 2;
  if (n_out)
    *n_out = 2;
  if (n_int)
    *n_int = 0;
  if (n_real)
    *n_real = 0;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm5_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <jac_chain_nm5_init+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <jac_chain_nm5_init+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <jac_chain_nm5_init+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <jac_chain_nm5_init+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm5_init>:
test   %rdi,%rdi
je     110b <jac_chain_nm5_init+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <jac_chain_nm5_init+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <jac_chain_nm5_init+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <jac_chain_nm5_init+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm5_init(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm5_init(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int RSA2048_execute(int, char *);
int /*<<< orphan*/ printf(char *);
int RSA2048_Verify(int fd) {
  int ret;
  ret = RSA2048_execute(fd, "BF14C00000");
  if (ret != 0) {
    printf("ERR:RSA2048_Encrypt failed!\n");
    return 1;
  }
}


x86 assembly (clang, -O0):
<RSA2048_Verify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    0xecb(%rip),%rsi
call   1040 <RSA2048_execute@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115a <RSA2048_Verify+0x3a>
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA2048_Verify>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <RSA2048_execute@plt>
test   %eax,%eax
je     113d <RSA2048_Verify+0x1d>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"BF14C00000\00"
@.str.1 = [29 x i8] c"ERR:RSA2048_Encrypt failed!\0A\00"
define i32 @RSA2048_Verify(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @RSA2048_execute(i32 %5, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
store i32 1, i32* %2
br label %11
11: ; preds = %9, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [11 x i8] c"BF14C00000\00"
@str = [28 x i8] c"ERR:RSA2048_Encrypt failed!\00"
define i32 @RSA2048_Verify(i32 %0) {
%2 = tail call i32 @RSA2048_execute(i32 %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("usage: dnsresolve [@nameserver] [-t type] <domain>\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"usage: dnsresolve [@nameserver] [-t type] <domain>\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [51 x i8] c"usage: dnsresolve [@nameserver] [-t type] <domain>\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
ret void
}
void EC_POINT_set_affine_coordinates_GF2m(void) {}


x86 assembly (clang, -O0):
<EC_POINT_set_affine_coordinates_GF2m>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_POINT_set_affine_coordinates_GF2m>:
ret

LLVM IR (-O0):
define void @EC_POINT_set_affine_coordinates_GF2m() {
ret void
}

LLVM IR (-O2):
define void @EC_POINT_set_affine_coordinates_GF2m() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char const *, int);
char *bmp_filename(char *fn, int size) {
  const char _bmp_ending[5] = {0x2e, 0x62, 0x6d, 0x70, 0x00};
  char *newfile = (char *)malloc(size + 5);
  memcpy(newfile, fn, size);
  memcpy(&newfile[size], _bmp_ending, 5);
  return newfile;
}


x86 assembly (clang, -O0):
<bmp_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0x11(%rbp)
mov    0xec6(%rip),%al
mov    %al,-0xd(%rbp)
mov    -0xc(%rbp),%edi
add    $0x5,%edi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
lea    -0x11(%rbp),%rsi
mov    $0x5,%edx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmp_filename>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
mov    %rdi,%r14
movb   $0x0,0xc(%rsp)
movl   $0x706d622e,0x8(%rsp)
70
lea    0x5(%rbx),%edi
call   1040 <malloc@plt>
mov    %rax,%r15
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1030 <memcpy@plt>
movslq %ebx,%rdi
add    %r15,%rdi
lea    0x8(%rsp),%rsi
mov    $0x5,%edx
call   1030 <memcpy@plt>
mov    %r15,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@__const.bmp_filename._bmp_ending = [5 x i8] c".bmp\00"
define i8* @bmp_filename(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [5 x i8]
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = bitcast [5 x i8]* %5 to i8*
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 5
%10 = call i64 @malloc(i32 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %6
%12 = load i8*, i8** %6
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = call i32 @memcpy(i8* %12, i8* %13, i32 %14)
%16 = load i8*, i8** %6
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
%21 = call i32 @memcpy(i8* %19, i8* %20, i32 5)
%22 = load i8*, i8** %6
ret i8* %22
}

LLVM IR (-O2):
@__const.bmp_filename._bmp_ending = [5 x i8] c".bmp\00"
define i8* @bmp_filename(i8* %0, i32 %1) {
%3 = alloca [5 x i8]
%4 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
%5 = add nsw i32 %1, 5
%6 = tail call i64 @malloc(i32 %5)
%7 = inttoptr i64 %6 to i8*
%8 = tail call i32 @memcpy(i8* %7, i8* %0, i32 %1)
%9 = sext i32 %1 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = call i32 @memcpy(i8* %10, i8* %4, i32 5)
ret i8* %7
}
int ft_toupper(int c) {
  if (c >= 'a' && c <= 'z')
    c -= 'a' - 'A';
  return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1124 <ft_toupper+0x24>
cmpl   $0x7a,-0x4(%rbp)
jg     1124 <ft_toupper+0x24>
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 32
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %5, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
int lxc_caps_up(void) { return 0; }


x86 assembly (clang, -O0):
<lxc_caps_up>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lxc_caps_up>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lxc_caps_up() {
ret i32 0
}

LLVM IR (-O2):
define i32 @lxc_caps_up() {
ret i32 0
}
void BN_bntest_rand(void) {}


x86 assembly (clang, -O0):
<BN_bntest_rand>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_bntest_rand>:
ret

LLVM IR (-O0):
define void @BN_bntest_rand() {
ret void
}

LLVM IR (-O2):
define void @BN_bntest_rand() {
ret void
}
int intcompare(int *i, int *j) { return (*i - *j); }


x86 assembly (clang, -O0):
<intcompare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcompare>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intcompare(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @intcompare(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = sub nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_unsigned_long(unsigned long const k1,
                                            unsigned long const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_unsigned_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_unsigned_long>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_unsigned_long(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_unsigned_long(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void prefpo_(a, b, c, d) int *a, *b, *c, *d;
{ prefposition((long)*a, (long)*b, (long)*c, (long)*d); }


x86 assembly (clang, -O0):
<prefpo_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movslq (%rax),%rdi
mov    -0x10(%rbp),%rax
movslq (%rax),%rsi
mov    -0x18(%rbp),%rax
movslq (%rax),%rdx
mov    -0x20(%rbp),%rax
movslq (%rax),%rcx
mov    $0x0,%al
call   1030 <prefposition@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prefpo_>:
movslq (%rdi),%rdi
movslq (%rsi),%rsi
movslq (%rdx),%rdx
movslq (%rcx),%rcx
xor    %eax,%eax
jmp    1030 <prefposition@plt>

LLVM IR (-O0):
define void @prefpo_(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = sext i32 %10 to i64
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = sext i32 %13 to i64
%15 = load i32*, i32** %7
%16 = load i32, i32* %15
%17 = sext i32 %16 to i64
%18 = load i32*, i32** %8
%19 = load i32, i32* %18
%20 = sext i32 %19 to i64
%21 = call i32 (i64, i64, i64, i64, ...) bitcast (i32 (...)* @prefposition to i32 (i64, i64, i64, i64, ...)*)(i64 %11, i64 %14, i64 %17, i64 %20)
ret void
}

LLVM IR (-O2):
define void @prefpo_(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture %3) {
%5 = load i32, i32* %0
%6 = sext i32 %5 to i64
%7 = load i32, i32* %1
%8 = sext i32 %7 to i64
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = tail call i32 (i64, i64, i64, i64, ...) bitcast (i32 (...)* @prefposition to i32 (i64, i64, i64, i64, ...)*)(i64 %6, i64 %8, i64 %10, i64 %12)
ret void
}
void disable_kernel_spe(void) {}


x86 assembly (clang, -O0):
<disable_kernel_spe>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_kernel_spe>:
ret

LLVM IR (-O0):
define void @disable_kernel_spe() {
ret void
}

LLVM IR (-O2):
define void @disable_kernel_spe() {
ret void
}
/* Variables and functions */
int date_get_dayofyear();
int is_day_of_moon(void) { return date_get_dayofyear() % 2 == 1; }


x86 assembly (clang, -O0):
<is_day_of_moon>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <date_get_dayofyear@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_day_of_moon>:
push   %rax
xor    %eax,%eax
call   1030 <date_get_dayofyear@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_day_of_moon() {
%1 = call i32 (...) @date_get_dayofyear()
%2 = srem i32 %1, 2
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @is_day_of_moon() {
%1 = tail call i32 (...) @date_get_dayofyear()
%2 = srem i32 %1, 2
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}