xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ MCUSendCmdShockDetectionSensitivity(int);
void MCUSendCmdShockDetectionSensitivityM() {
  MCUSendCmdShockDetectionSensitivity(0x01);
}


x86 assembly (clang, -O0):
<MCUSendCmdShockDetectionSensitivityM>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <MCUSendCmdShockDetectionSensitivity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCUSendCmdShockDetectionSensitivityM>:
mov    $0x1,%edi
jmp    1030 <MCUSendCmdShockDetectionSensitivity@plt>

LLVM IR (-O0):
define void @MCUSendCmdShockDetectionSensitivityM() {
%1 = call i32 @MCUSendCmdShockDetectionSensitivity(i32 1)
ret void
}

LLVM IR (-O2):
define void @MCUSendCmdShockDetectionSensitivityM() {
%1 = tail call i32 @MCUSendCmdShockDetectionSensitivity(i32 1)
ret void
}
unsigned get_last(unsigned x, int n) {
  return (x << (8 * sizeof(int) - n)) >> (8 * sizeof(int) - n);
}


x86 assembly (clang, -O0):
<get_last>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
movslq -0x8(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
shl    %cl,%eax
movslq -0x8(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_last>:
mov    %esi,%ecx
mov    %edi,%eax
neg    %cl
shl    %cl,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @get_last(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = sub i64 32, %7
%9 = trunc i64 %8 to i32
%10 = shl i32 %5, %9
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = sub i64 32, %12
%14 = trunc i64 %13 to i32
%15 = lshr i32 %10, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_last(i32 %0, i32 %1) {
%3 = sub i32 32, %1
%4 = lshr i32 -1, %3
%5 = and i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ RSL_OnPlaylistLogicResult_SetTrackTotal(void *, char const *,
                                                           int, int);
void OnResult_UpdateItemCount(void *parserObject, const char *playlistUri,
                              void *userObject, int maxIndexNotKnown,
                              int itemCount) {
  RSL_OnPlaylistLogicResult_SetTrackTotal(userObject, playlistUri, itemCount,
                                          -1);
}


x86 assembly (clang, -O0):
<OnResult_UpdateItemCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%edx
mov    $0xffffffff,%ecx
call   1030 <RSL_OnPlaylistLogicResult_SetTrackTotal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OnResult_UpdateItemCount>:
mov    %rdx,%rdi
mov    %r8d,%edx
mov    $0xffffffff,%ecx
jmp    1030 <RSL_OnPlaylistLogicResult_SetTrackTotal@plt>

LLVM IR (-O0):
define void @OnResult_UpdateItemCount(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %8
%12 = load i8*, i8** %7
%13 = load i32, i32* %10
%14 = call i32 @RSL_OnPlaylistLogicResult_SetTrackTotal(i8* %11, i8* %12, i32 %13, i32 -1)
ret void
}

LLVM IR (-O2):
define void @OnResult_UpdateItemCount(i8* nocapture readnone %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @RSL_OnPlaylistLogicResult_SetTrackTotal(i8* %2, i8* %1, i32 %4, i32 -1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int write(int, char *, int);
int cwrite(int fd, char *buf, int n) {
  int nwrite;
  if ((nwrite = write(fd, buf, n)) < 0) {
    perror("Writing data");
    exit(1);
  }
  return nwrite;
}


x86 assembly (clang, -O0):
<cwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
mov    %eax,-0x18(%rbp)
cmp    $0x0,%eax
jge    1173 <cwrite+0x43>
lea    0xe9c(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cwrite>:
push   %rax
call   1030 <write@plt>
test   %eax,%eax
js     113c <cwrite+0xc>
pop    %rcx
ret
lea    0xebd(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Writing data\00"
define i32 @cwrite(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @write(i32 %8, i8* %9, i32 %10)
store i32 %11, i32* %7
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
@.str = [13 x i8] c"Writing data\00"
define i32 @cwrite(i32 %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %3
ret i32 %4
}
/* Variables and functions */
char *strstr(char const *, char *);
const char *find_std(const char *buf) {
  const char *p;
  p = strstr(buf, "namespace std");
  return p;
}


x86 assembly (clang, -O0):
<find_std>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_std>:
lea    0xee9(%rip),%rsi
jmp    1030 <strstr@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"namespace std\00"
define i8* @find_std(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strstr(i8* %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
@.str = [14 x i8] c"namespace std\00"
define i8* @find_std(i8* %0) {
%2 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
int do_407() { return 407; }


x86 assembly (clang, -O0):
<do_407>:
push   %rbp
mov    %rsp,%rbp
mov    $0x197,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_407>:
mov    $0x197,%eax
ret

LLVM IR (-O0):
define i32 @do_407() {
ret i32 407
}

LLVM IR (-O2):
define i32 @do_407() {
ret i32 407
}
void unw_init_local() {}


x86 assembly (clang, -O0):
<unw_init_local>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unw_init_local>:
ret

LLVM IR (-O0):
define void @unw_init_local() {
ret void
}

LLVM IR (-O2):
define void @unw_init_local() {
ret void
}
void ADCChannelDisable(unsigned long ulBase, unsigned long ulChannel) {
  unsigned long ulCh;
  ulCh = (ulChannel == 0x00000000)   ? 0x02
         : (ulChannel == 0x00000008) ? 0x04
         : (ulChannel == 0x00000010) ? 0x08
                                     : 0x10;
  (*((volatile unsigned long *)(ulBase + 0x000000B8))) &= ~ulCh;
}


x86 assembly (clang, -O0):
<ADCChannelDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1124 <ADCChannelDisable+0x24>
mov    $0x2,%eax
mov    %eax,-0x1c(%rbp)
jmp    115a <ADCChannelDisable+0x5a>
cmpq   $0x8,-0x10(%rbp)
jne    113c <ADCChannelDisable+0x3c>
mov    $0x4,%eax
mov    %eax,-0x20(%rbp)
jmp    1154 <ADCChannelDisable+0x54>
mov    -0x10(%rbp),%rdx
mov    $0x10,%eax
mov    $0x8,%ecx
cmp    $0x10,%rdx
cmove  %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0xb8(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0xb8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCChannelDisable>:
test   %rsi,%rsi
je     111a <ADCChannelDisable+0x1a>
cmp    $0x8,%rsi
jne    1129 <ADCChannelDisable+0x29>
mov    $0xfffffffffffffffb,%rax
and    %rax,0xb8(%rdi)
ret
mov    $0xfffffffffffffffd,%rax
and    %rax,0xb8(%rdi)
ret
xor    %eax,%eax
cmp    $0x10,%rsi
sete   %al
lea    -0x11(,%rax,8),%rax
ff
and    %rax,0xb8(%rdi)
ret

LLVM IR (-O0):
define void @ADCChannelDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
br label %20
9: ; preds = %2
%10 = load i64, i64* %4
%11 = icmp eq i64 %10, 8
br i1 %11, label %12, label %13
12: ; preds = %9
br label %18
13: ; preds = %9
%14 = load i64, i64* %4
%15 = icmp eq i64 %14, 16
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 8, i32 16
br label %18
18: ; preds = %13, %12
%19 = phi i32 [ 4, %12 ], [ %17, %13 ]
br label %20
20: ; preds = %18, %8
%21 = phi i32 [ 2, %8 ], [ %19, %18 ]
%22 = sext i32 %21 to i64
store i64 %22, i64* %5
%23 = load i64, i64* %5
%24 = xor i64 %23, -1
%25 = load i64, i64* %3
%26 = add i64 %25, 184
%27 = inttoptr i64 %26 to i64*
%28 = load volatile i64, i64* %27
%29 = and i64 %28, %24
store volatile i64 %29, i64* %27
ret void
}

LLVM IR (-O2):
define void @ADCChannelDisable(i64 %0, i64 %1) {
switch i64 %1, label %3 [
i64 0, label %7
i64 8, label %6
]
3: ; preds = %2
%4 = icmp eq i64 %1, 16
%5 = select i1 %4, i64 -9, i64 -17
br label %7
6: ; preds = %2
br label %7
7: ; preds = %2, %6, %3
%8 = phi i64 [ -3, %2 ], [ %5, %3 ], [ -5, %6 ]
%9 = add i64 %0, 184
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = and i64 %11, %8
store volatile i64 %12, i64* %10
ret void
}
int isLeadingWhitespace(char c) {
  switch (c) {
  case ' ':
  case '\t':
  case '\n':
  case ':':
  case ',':
  case '.':
  case ';':
  case '-':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isLeadingWhitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xfffffff7,%eax
sub    $0x2,%eax
jb     115b <isLeadingWhitespace+0x5b>
jmp    1122 <isLeadingWhitespace+0x22>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
je     115b <isLeadingWhitespace+0x5b>
jmp    1133 <isLeadingWhitespace+0x33>
mov    -0xc(%rbp),%eax
add    $0xffffffd4,%eax
sub    $0x3,%eax
jb     115b <isLeadingWhitespace+0x5b>
jmp    1147 <isLeadingWhitespace+0x47>
mov    -0xc(%rbp),%eax
add    $0xffffffc6,%eax
sub    $0x1,%eax
ja     1167 <isLeadingWhitespace+0x67>
jmp    115b <isLeadingWhitespace+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    116e <isLeadingWhitespace+0x6e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeadingWhitespace>:
cmp    $0x3b,%edi
ja     111d <isLeadingWhitespace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0xc00700100000600,%rdx
bt     %rcx,%rdx
jae    111d <isLeadingWhitespace+0x1d>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isLeadingWhitespace(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 32, label %6
i32 9, label %6
i32 10, label %6
i32 58, label %6
i32 44, label %6
i32 46, label %6
i32 59, label %6
i32 45, label %6
]
6: ; preds = %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @isLeadingWhitespace(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 32, label %4
i32 9, label %4
i32 10, label %4
i32 58, label %4
i32 44, label %4
i32 46, label %4
i32 59, label %4
i32 45, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
/* Variables and functions */
extern char *strncpy(char *dest, const char *src, int count) {
  __asm__("cld\n"
          "1:\tdecl %2\n\t"
          "js 2f\n\t"
          "lodsb\n\t"
          "stosb\n\t"
          "testb %%al,%%al\n\t"
          "jne 1b\n\t"
          "rep\n\t"
          "stosb\n"
          "2:" ::"S"(src),
          "D"(dest), "c"(count));
  return dest;
}


x86 assembly (clang, -O0):
<strncpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%ecx
cld
dec    %ecx
js     112f <strncpy+0x2f>
lods   %ds:(%rsi),%al
stos   %al,%es:(%rdi)
test   %al,%al
jne    111b <strncpy+0x1b>
rep stos %al,%es:(%rdi)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpy>:
mov    %edx,%ecx
cld
dec    %ecx
js     110f <strncpy+0xf>
lods   %ds:(%rsi),%al
stos   %al,%es:(%rdi)
test   %al,%al
jne    1103 <strncpy+0x3>
rep stos %al,%es:(%rdi)
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @strncpy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = load i8*, i8** %4
ret i8* %10
}

LLVM IR (-O2):
define i8* @strncpy(i8* returned %0, i8* %1, i32 %2) {
tail call void asm sideeffect "cld\0A1:\09decl $2\0A\09js 2f\0A\09lodsb\0A\09stosb\0A\09testb %al,%al\0A\09jne 1b\0A\09rep\0A\09stosb\0A2:", "{si},{di},{cx},~{dirflag},~{fpsr},~{flags}"(i8* %1, i8* %0, i32 %2)
ret i8* %0
}
int maior(int a, int b) {
  if (a > b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<maior>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1121 <maior+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <maior+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maior>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @maior(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @maior(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void mem_barrier(void) { __asm__ volatile("mfence" : : : "memory"); }


x86 assembly (clang, -O0):
<mem_barrier>:
push   %rbp
mov    %rsp,%rbp
mfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_barrier>:
mfence
ret

LLVM IR (-O0):
define void @mem_barrier() {
ret void
}

LLVM IR (-O2):
define void @mem_barrier() {
tail call void asm sideeffect "mfence", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memmove(char *, char const *, scalar_t__);
scalar_t__ strlen(char const *);
char *strmov(char *pDest, const char *pSrc) {
  memmove(pDest, pSrc, strlen(pSrc) + 1);
  return pDest;
}


x86 assembly (clang, -O0):
<strmov>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1040 <memmove@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strmov>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <memmove@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strmov(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i32 @memmove(i8* %5, i8* %6, i64 %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @strmov(i8* returned %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = add nsw i64 %3, 1
%5 = tail call i32 @memmove(i8* %0, i8* %1, i64 %4)
ret i8* %0
}
double atan(x)
double x;
{
  double atan2(), one = 1.0;
  return (atan2(x, one));
}


x86 assembly (clang, -O0):
<atan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <atan2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan>:
movsd  0xee8(%rip),%xmm1
jmp    1030 <atan2@plt>

LLVM IR (-O0):
define double @atan(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
store double 1.000000e+00, double* %3
%4 = load double, double* %2
%5 = load double, double* %3
%6 = call double @atan2(double %4, double %5)
ret double %6
}

LLVM IR (-O2):
define double @atan(double %0) {
%2 = tail call double @atan2(double %0, double 1.000000e+00)
ret double %2
}
int ueberweisung() {}


x86 assembly (clang, -O0):
<ueberweisung>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ueberweisung>:
ret

LLVM IR (-O0):
define i32 @ueberweisung() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @ueberweisung() {
ret i32 undef
}
/* Type definitions */
struct timespec {
  int tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ assertTrue(char *, int);
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
void test_realtime() {
  struct timespec tp;
  clock_gettime(CLOCK_REALTIME, &tp);
  assertTrue("tp.tv_sec > 1466688500", tp.tv_sec > 1466688500);
  ;
}


x86 assembly (clang, -O0):
<test_realtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
cmpl   $0x576be3f4,-0x8(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%esi
lea    0xeb0(%rip),%rdi
call   1040 <assertTrue@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_realtime>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
xor    %esi,%esi
cmpl   $0x576be3f5,(%rsp)
setge  %sil
lea    0xeba(%rip),%rdi
call   1040 <assertTrue@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
@.str = [23 x i8] c"tp.tv_sec > 1466688500\00"
define void @test_realtime() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_REALTIME
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 1466688500
%7 = zext i1 %6 to i32
%8 = call i32 @assertTrue(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
@.str = [23 x i8] c"tp.tv_sec > 1466688500\00"
define void @test_realtime() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_REALTIME
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = icmp sgt i32 %6, 1466688500
%8 = zext i1 %7 to i32
%9 = call i32 @assertTrue(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}
__attribute__((always_)) int hausy_is_high_pulse(unsigned long pulse) {
  return (pulse <= ((unsigned long)900 + 200) &&
          pulse >= ((unsigned long)900 - 200));
}


x86 assembly (clang, -O0):
<hausy_is_high_pulse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x44c,-0x8(%rbp)
mov    %al,-0x9(%rbp)
ja     1129 <hausy_is_high_pulse+0x29>
cmpq   $0x2bc,-0x8(%rbp)
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hausy_is_high_pulse>:
add    $0xfffffffffffffd44,%rdi
xor    %eax,%eax
cmp    $0x191,%rdi
setb   %al
ret

LLVM IR (-O0):
define i32 @hausy_is_high_pulse(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ule i64 %3, 1100
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp uge i64 %6, 700
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @hausy_is_high_pulse(i64 %0) {
%2 = add i64 %0, -700
%3 = icmp ult i64 %2, 401
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int sqlite3HashNoCase(char const *, int);
int strHash(const void *pKey, int nKey) {
  return sqlite3HashNoCase((const char *)pKey, nKey);
}


x86 assembly (clang, -O0):
<strHash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sqlite3HashNoCase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strHash>:
jmp    1030 <sqlite3HashNoCase@plt>

LLVM IR (-O0):
define i32 @strHash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sqlite3HashNoCase(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strHash(i8* %0, i32 %1) {
%3 = tail call i32 @sqlite3HashNoCase(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ pru_set_reg(int, unsigned char, unsigned int);
void PRURegSetStep(unsigned char pru_reg, unsigned int reg_value) {
  pru_set_reg(1, pru_reg, reg_value);
}


x86 assembly (clang, -O0):
<PRURegSetStep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%edx
mov    $0x1,%edi
movzbl %al,%esi
call   1030 <pru_set_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRURegSetStep>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <pru_set_reg@plt>

LLVM IR (-O0):
define void @PRURegSetStep(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
%7 = call i32 @pru_set_reg(i32 1, i8 zeroext %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @PRURegSetStep(i8 zeroext %0, i32 %1) {
%3 = tail call i32 @pru_set_reg(i32 1, i8 zeroext %0, i32 %1)
ret void
}
void twd_restore(void) {}


x86 assembly (clang, -O0):
<twd_restore>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twd_restore>:
ret

LLVM IR (-O0):
define void @twd_restore() {
ret void
}

LLVM IR (-O2):
define void @twd_restore() {
ret void
}
int test_imm_13int8_reg(signed char val) {
  return ((val) & (0x13 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_13int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x13,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_13int8_reg>:
test   $0x13,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_13int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 19
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_13int8_reg(i8 signext %0) {
%2 = and i8 %0, 19
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void f(int param) { int correct_linkage; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
ret void
}
f(int *a, int *b, int c) { return a && b || c; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     112a <f+0x2a>
mov    $0x1,%al
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x15(%rbp)
jne    1134 <f+0x34>
cmpl   $0x0,-0x14(%rbp)
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
test   %rdi,%rdi
setne  %al
test   %rsi,%rsi
setne  %cl
and    %al,%cl
test   %edx,%edx
setne  %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32*, i32** %5
%11 = icmp ne i32* %10, null
br i1 %11, label %15, label %12
12: ; preds = %9, %3
%13 = load i32, i32* %6
%14 = icmp ne i32 %13, 0
br label %15
15: ; preds = %12, %9
%16 = phi i1 [ true, %9 ], [ %14, %12 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @f(i32* readnone %0, i32* readnone %1, i32 %2) {
%4 = icmp ne i32* %0, null
%5 = icmp ne i32* %1, null
%6 = and i1 %4, %5
%7 = icmp ne i32 %2, 0
%8 = or i1 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void panic(char *str) { assert(0); }


x86 assembly (clang, -O0):
<panic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<panic>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @panic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @panic(i8* nocapture readnone %0) {
%2 = tail call i32 @assert(i32 0)
ret void
}
/* Variables and functions */
int abs(int);
void GetValAndDistance(int a, int initial, int bits, int *const val,
                       int *const distance) {
  const int mask = ~((1 << bits) - 1);
  *val = (initial & mask) | (initial >> (8 - bits));
  *distance = 2 * abs(a - *val);
}


x86 assembly (clang, -O0):
<GetValAndDistance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
and    -0x24(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x8,%ecx
sub    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    -0x28(%rbp),%ecx
or     %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rax
sub    (%rax),%edi
call   1030 <abs@plt>
mov    %eax,%ecx
shl    $0x1,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetValAndDistance>:
mov    %rcx,%r9
mov    %edx,%ecx
mov    %esi,%eax
shr    %cl,%eax
shl    %cl,%eax
mov    $0x8,%dl
sub    %cl,%dl
mov    %edx,%ecx
sar    %cl,%esi
or     %eax,%esi
mov    %esi,(%r9)
sub    %esi,%edi
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
add    %eax,%eax
mov    %eax,(%r8)
ret

LLVM IR (-O0):
define void @GetValAndDistance(i32 %0, i32 %1, i32 %2, i32* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%12 = load i32, i32* %8
%13 = shl i32 1, %12
%14 = sub nsw i32 %13, 1
%15 = xor i32 %14, -1
store i32 %15, i32* %11
%16 = load i32, i32* %7
%17 = load i32, i32* %11
%18 = and i32 %16, %17
%19 = load i32, i32* %7
%20 = load i32, i32* %8
%21 = sub nsw i32 8, %20
%22 = ashr i32 %19, %21
%23 = or i32 %18, %22
%24 = load i32*, i32** %9
store i32 %23, i32* %24
%25 = load i32, i32* %6
%26 = load i32*, i32** %9
%27 = load i32, i32* %26
%28 = sub nsw i32 %25, %27
%29 = call i32 @abs(i32 %28)
%30 = mul nsw i32 2, %29
%31 = load i32*, i32** %10
store i32 %30, i32* %31
ret void
}

LLVM IR (-O2):
define void @GetValAndDistance(i32 %0, i32 %1, i32 %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4) {
%6 = shl nsw i32 -1, %2
%7 = and i32 %6, %1
%8 = sub nsw i32 8, %2
%9 = ashr i32 %1, %8
%10 = or i32 %7, %9
store i32 %10, i32* %3
%11 = sub nsw i32 %0, %10
%12 = tail call i32 @llvm.abs.i32(i32 %11, i1 true)
%13 = shl nuw nsw i32 %12, 1
store i32 %13, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
void pause() { getchar(); }


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
xor    %eax,%eax
jmp    1030 <getchar@plt>

LLVM IR (-O0):
define void @pause() {
%1 = call i32 (...) @getchar()
ret void
}

LLVM IR (-O2):
define void @pause() {
%1 = tail call i32 (...) @getchar()
ret void
}
/* Variables and functions */
unsigned short rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int /*<<< orphan*/ usleep(unsigned short);
unsigned short int dodelay(unsigned short int maxmillisecs) {
  unsigned short int n = 0;
  srand(time(NULL));
  n = rand() % maxmillisecs;
  ++n;
  maxmillisecs = n;
  usleep(maxmillisecs * 1000);
  return maxmillisecs;
}


x86 assembly (clang, -O0):
<dodelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movw   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
movzwl %ax,%eax
movzwl -0x2(%rbp),%ecx
cltd
idiv   %ecx
mov    %dx,%ax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
imul   $0x3e8,%eax,%eax
movzwl %ax,%edi
call   1060 <usleep@plt>
movzwl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dodelay>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
xor    %edx,%edx
div    %bx
mov    %edx,%ebx
add    $0x1,%ebx
imul   $0x3e8,%ebx,%eax
movzwl %ax,%edi
call   1060 <usleep@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i16 @dodelay(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
store i16 0, i16* %3
%4 = call i32 @time(i32* null)
%5 = call i32 @srand(i32 %4)
%6 = call zeroext i16 (...) @rand()
%7 = zext i16 %6 to i32
%8 = load i16, i16* %2
%9 = zext i16 %8 to i32
%10 = srem i32 %7, %9
%11 = trunc i32 %10 to i16
store i16 %11, i16* %3
%12 = load i16, i16* %3
%13 = add i16 %12, 1
store i16 %13, i16* %3
%14 = load i16, i16* %3
store i16 %14, i16* %2
%15 = load i16, i16* %2
%16 = zext i16 %15 to i32
%17 = mul nsw i32 %16, 1000
%18 = trunc i32 %17 to i16
%19 = call i32 @usleep(i16 zeroext %18)
%20 = load i16, i16* %2
ret i16 %20
}

LLVM IR (-O2):
define zeroext i16 @dodelay(i16 zeroext %0) {
%2 = tail call i32 @time(i32* null)
%3 = tail call i32 @srand(i32 %2)
%4 = tail call zeroext i16 (...) @rand()
%5 = urem i16 %4, %0
%6 = add nuw i16 %5, 1
%7 = mul i16 %6, 1000
%8 = tail call i32 @usleep(i16 zeroext %7)
ret i16 %6
}
void gtk_toolbar_get_icon_size() {}


x86 assembly (clang, -O0):
<gtk_toolbar_get_icon_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_toolbar_get_icon_size>:
ret

LLVM IR (-O0):
define void @gtk_toolbar_get_icon_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_toolbar_get_icon_size() {
ret void
}
__attribute__((always_)) void
e820_mark_nosave_regions(unsigned long limit_pfn) {}


x86 assembly (clang, -O0):
<e820_mark_nosave_regions>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<e820_mark_nosave_regions>:
ret

LLVM IR (-O0):
define void @e820_mark_nosave_regions(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @e820_mark_nosave_regions(i64 %0) {
ret void
}
void f(int x, int y, int *z) {
  if (x > 5) {
    f(x - 2, y, z);
    *z = *z * x;
  } else
    *z = y;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x5,-0x4(%rbp)
jle    1153 <f+0x43>
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <f@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
imul   -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    115c <f+0x4c>
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
cmp    $0x6,%edi
jl     112f <f+0x1f>
mov    %edi,%ebx
lea    -0x2(%rbx),%edi
mov    %r14,%rdx
call   1030 <f@plt>
imul   (%r14),%ebx
mov    %ebx,%esi
mov    %esi,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @f(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 5
br i1 %8, label %9, label %19
9: ; preds = %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 2
%12 = load i32, i32* %5
%13 = load i32*, i32** %6
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = load i32, i32* %4
%17 = mul nsw i32 %15, %16
%18 = load i32*, i32** %6
store i32 %17, i32* %18
br label %22
19: ; preds = %3
%20 = load i32, i32* %5
%21 = load i32*, i32** %6
store i32 %20, i32* %21
br label %22
22: ; preds = %19, %9
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32 %1, i32* nocapture %2) {
%4 = icmp sgt i32 %0, 5
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = add nsw i32 %0, -2
tail call void @f(i32 %6, i32 %1, i32* %2)
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, %0
br label %9
9: ; preds = %3, %5
%10 = phi i32 [ %8, %5 ], [ %1, %3 ]
store i32 %10, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exact_square(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number;
  printf("Enter number:\n");
  scanf("%d", &number);
  exact_square(number);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
lea    0xebd(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xecb(%rip),%rdi
call   1030 <puts@plt>
lea    0xebc(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <exact_square@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Enter number:\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @exact_square(i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@str = [14 x i8] c"Enter number:\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @exact_square(i32 %5)
ret i32 0
}
int PDC_get_cursor_pos(row, col)
int *row;
int *col;
{}


x86 assembly (clang, -O0):
<PDC_get_cursor_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDC_get_cursor_pos>:
ret

LLVM IR (-O0):
define i32 @PDC_get_cursor_pos(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @PDC_get_cursor_pos(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 undef
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int helper(struct TreeNode *, int /*<<< orphan*/);
int sumNumbers(struct TreeNode *root) {
  if (!root)
    return 0;
  return helper(root, 0);
}


x86 assembly (clang, -O0):
<sumNumbers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <sumNumbers+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1141 <sumNumbers+0x31>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <helper@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumNumbers>:
test   %rdi,%rdi
je     111c <sumNumbers+0xc>
xor    %esi,%esi
jmp    1030 <helper@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32 @sumNumbers(%struct.TreeNode* %0) {
%2 = alloca i32
%3 = alloca %struct.TreeNode*
store %struct.TreeNode* %0, %struct.TreeNode** %3
%4 = load %struct.TreeNode*, %struct.TreeNode** %3
%5 = icmp ne %struct.TreeNode* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i32 0, i32* %2
br label %10
7: ; preds = %1
%8 = load %struct.TreeNode*, %struct.TreeNode** %3
%9 = call i32 @helper(%struct.TreeNode* %8, i32 0)
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32 @sumNumbers(%struct.TreeNode* %0) {
%2 = icmp eq %struct.TreeNode* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @helper(%struct.TreeNode* %0, i32 0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
int test_imm_ABint16_mem(short *val) {
  return ((*val) & (0xAB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ABint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xab,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ABint16_mem>:
testb  $0xab,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ABint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 171
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ABint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 171
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int gcd(int x, int y) {
  int a = (x > y) ? x : y;
  int b = (x > y) ? y : x;
  int c;
  for (;;) {
    if ((c = a % b) == 0) {
      return b;
    }
    a = b;
    b = c;
  }
  return 1;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <gcd+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    1127 <gcd+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1144 <gcd+0x44>
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    114a <gcd+0x4a>
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmp    $0x0,%edx
jne    1168 <gcd+0x68>
mov    -0x10(%rbp),%eax
pop    %rbp
ret
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1150 <gcd+0x50>

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%edx
cmp    %esi,%edi
mov    %esi,%ecx
cmovg  %edi,%ecx
cmovg  %esi,%edx
nopl   0x0(%rax)
mov    %ecx,%eax
mov    %edx,%ecx
cltd
idiv   %ecx
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* %3
br label %15
13: ; preds = %2
%14 = load i32, i32* %4
br label %15
15: ; preds = %13, %11
%16 = phi i32 [ %12, %11 ], [ %14, %13 ]
store i32 %16, i32* %5
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = icmp sgt i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load i32, i32* %4
br label %24
22: ; preds = %15
%23 = load i32, i32* %3
br label %24
24: ; preds = %22, %20
%25 = phi i32 [ %21, %20 ], [ %23, %22 ]
store i32 %25, i32* %6
br label %26
26: ; preds = %33, %24
%27 = load i32, i32* %5
%28 = load i32, i32* %6
%29 = srem i32 %27, %28
store i32 %29, i32* %7
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %33
31: ; preds = %26
%32 = load i32, i32* %6
ret i32 %32
33: ; preds = %26
%34 = load i32, i32* %6
store i32 %34, i32* %5
%35 = load i32, i32* %7
store i32 %35, i32* %6
br label %26
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
br label %6
6: ; preds = %6, %2
%7 = phi i32 [ %5, %2 ], [ %9, %6 ]
%8 = phi i32 [ %4, %2 ], [ %7, %6 ]
%9 = srem i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %6
11: ; preds = %6
ret i32 %7
}
int check_scale_factors(int other_w, int other_h, int this_w, int this_h) {
  return 2 * this_w >= other_w && 2 * this_h >= other_h &&
         this_w <= 16 * other_w && this_h <= 16 * other_h;
}


x86 assembly (clang, -O0):
<check_scale_factors>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
xor    %eax,%eax
cmp    -0x4(%rbp),%ecx
mov    %al,-0x11(%rbp)
jl     115f <check_scale_factors+0x5f>
mov    -0x10(%rbp),%ecx
shl    $0x1,%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0x11(%rbp)
jl     115f <check_scale_factors+0x5f>
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%edx
shl    $0x4,%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
jg     115f <check_scale_factors+0x5f>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
cmp    %ecx,%eax
setle  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_scale_factors>:
lea    (%rdx,%rdx,1),%eax
cmp    %edi,%eax
setge  %r8b
lea    (%rcx,%rcx,1),%eax
cmp    %esi,%eax
setge  %al
and    %r8b,%al
shl    $0x4,%edi
cmp    %edx,%edi
setge  %dl
shl    $0x4,%esi
cmp    %ecx,%esi
setge  %cl
and    %dl,%cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @check_scale_factors(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = mul nsw i32 2, %9
%11 = load i32, i32* %5
%12 = icmp sge i32 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %4
%14 = load i32, i32* %8
%15 = mul nsw i32 2, %14
%16 = load i32, i32* %6
%17 = icmp sge i32 %15, %16
br i1 %17, label %18, label %28
18: ; preds = %13
%19 = load i32, i32* %7
%20 = load i32, i32* %5
%21 = mul nsw i32 16, %20
%22 = icmp sle i32 %19, %21
br i1 %22, label %23, label %28
23: ; preds = %18
%24 = load i32, i32* %8
%25 = load i32, i32* %6
%26 = mul nsw i32 16, %25
%27 = icmp sle i32 %24, %26
br label %28
28: ; preds = %23, %18, %13, %4
%29 = phi i1 [ false, %18 ], [ false, %13 ], [ false, %4 ], [ %27, %23 ]
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @check_scale_factors(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl nsw i32 %2, 1
%6 = icmp sge i32 %5, %0
%7 = shl nsw i32 %3, 1
%8 = icmp sge i32 %7, %1
%9 = select i1 %6, i1 %8, i1 false
%10 = shl nsw i32 %0, 4
%11 = icmp sge i32 %10, %2
%12 = select i1 %9, i1 %11, i1 false
%13 = shl nsw i32 %1, 4
%14 = icmp sge i32 %13, %3
%15 = select i1 %12, i1 %14, i1 false
%16 = zext i1 %15 to i32
ret i32 %16
}
unsigned int sat_sub(unsigned int x, unsigned int y) {
  return x >= y ? x - y : 0;
}


x86 assembly (clang, -O0):
<sat_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jb     1124 <sat_sub+0x24>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112e <sat_sub+0x2e>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    112e <sat_sub+0x2e>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sat_sub>:
xor    %eax,%eax
sub    %esi,%edi
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @sat_sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp uge i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub i32 %9, %10
br label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %8
%14 = phi i32 [ %11, %8 ], [ 0, %12 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @sat_sub(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.usub.sat.i32(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
struct buf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bufput(struct buf *, char *, int);
void latex_prolog(struct buf *ob, void *opaque) {
  bufput(ob,
         "\\documentclass{article}\n"
         "\\usepackage{hyperref}\n"
         "\\usepackage{graphicx}\n"
         "\\begin{document}\n",
         sizeof "\\documentclass{article}\n"
                "\\usepackage{hyperref}\n"
                "\\usepackage{graphicx}\n"
                "\\begin{document}\n" -
             1);
}


x86 assembly (clang, -O0):
<latex_prolog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
mov    $0x55,%edx
call   1030 <bufput@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<latex_prolog>:
lea    0xee9(%rip),%rsi
mov    $0x55,%edx
jmp    1030 <bufput@plt>

LLVM IR (-O0):
%struct.buf = type { i32 }
@.str = [86 x i8] c"\\documentclass{article}\0A\\usepackage{hyperref}\0A\\usepackage{graphicx}\0A\\begin{document}\0A\00"
define void @latex_prolog(%struct.buf* %0, i8* %1) {
%3 = alloca %struct.buf*
%4 = alloca i8*
store %struct.buf* %0, %struct.buf** %3
store i8* %1, i8** %4
%5 = load %struct.buf*, %struct.buf** %3
%6 = call i32 @bufput(%struct.buf* %5, i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str, i64 0, i64 0), i32 85)
ret void
}

LLVM IR (-O2):
%struct.buf = type { i32 }
@.str = [86 x i8] c"\\documentclass{article}\0A\\usepackage{hyperref}\0A\\usepackage{graphicx}\0A\\begin{document}\0A\00"
define void @latex_prolog(%struct.buf* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @bufput(%struct.buf* %0, i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str, i64 0, i64 0), i32 85)
ret void
}