#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;
struct pci_dev {
  int dummy;
};

/* Variables and functions */
scalar_t__ enable_flash_nvidia_common(struct pci_dev *, char const *);
int pci_read_byte(struct pci_dev *, int);
int pci_read_word(struct pci_dev *, int);
int /*<<< orphan*/ rpci_write_byte(struct pci_dev *, int, int);
int /*<<< orphan*/ rpci_write_word(struct pci_dev *, int, int);
int enable_flash_mcp55(struct pci_dev *dev, const char *name) {
  uint8_t val;
  uint16_t wordval;
  val = pci_read_byte(dev, 0x88);
  val |= 0xff;
  rpci_write_byte(dev, 0x88, val);
  val = pci_read_byte(dev, 0x8c);
  val |= 0xff;
  rpci_write_byte(dev, 0x8c, val);
  wordval = pci_read_word(dev, 0x90);
  wordval |= 0x7fff;
  rpci_write_word(dev, 0x90, wordval);
  if (enable_flash_nvidia_common(dev, name))
    return 0x100;
  else
    return 0;
}


x86 assembly (clang, -O0):
<enable_flash_mcp55>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x88,%esi
call   1050 <pci_read_byte@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
or     $0xff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x1c(%rbp),%edx
mov    $0x88,%esi
call   1070 <rpci_write_byte@plt>
mov    -0x10(%rbp),%rdi
mov    $0x8c,%esi
call   1050 <pci_read_byte@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
or     $0xff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x1c(%rbp),%edx
mov    $0x8c,%esi
call   1070 <rpci_write_byte@plt>
mov    -0x10(%rbp),%rdi
mov    $0x90,%esi
call   1040 <pci_read_word@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
or     $0x7fff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%edx
mov    $0x90,%esi
call   1030 <rpci_write_word@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1060 <enable_flash_nvidia_common@plt>
cmp    $0x0,%rax
je     120a <enable_flash_mcp55+0xba>
movl   $0x100,-0x4(%rbp)
jmp    1211 <enable_flash_mcp55+0xc1>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_flash_mcp55>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x88,%esi
call   1050 <pci_read_byte@plt>
or     $0xff,%eax
mov    %rbx,%rdi
mov    $0x88,%esi
mov    %eax,%edx
call   1070 <rpci_write_byte@plt>
mov    %rbx,%rdi
mov    $0x8c,%esi
call   1050 <pci_read_byte@plt>
or     $0xff,%eax
mov    %rbx,%rdi
mov    $0x8c,%esi
mov    %eax,%edx
call   1070 <rpci_write_byte@plt>
mov    %rbx,%rdi
mov    $0x90,%esi
call   1040 <pci_read_word@plt>
or     $0x7fff,%eax
mov    %rbx,%rdi
mov    $0x90,%esi
mov    %eax,%edx
call   1030 <rpci_write_word@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1060 <enable_flash_nvidia_common@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
shl    $0x8,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
define i32 @enable_flash_mcp55(%struct.pci_dev* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.pci_dev*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store %struct.pci_dev* %0, %struct.pci_dev** %4
store i8* %1, i8** %5
%8 = load %struct.pci_dev*, %struct.pci_dev** %4
%9 = call i32 @pci_read_byte(%struct.pci_dev* %8, i32 136)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = or i32 %10, 255
store i32 %11, i32* %6
%12 = load %struct.pci_dev*, %struct.pci_dev** %4
%13 = load i32, i32* %6
%14 = call i32 @rpci_write_byte(%struct.pci_dev* %12, i32 136, i32 %13)
%15 = load %struct.pci_dev*, %struct.pci_dev** %4
%16 = call i32 @pci_read_byte(%struct.pci_dev* %15, i32 140)
store i32 %16, i32* %6
%17 = load i32, i32* %6
%18 = or i32 %17, 255
store i32 %18, i32* %6
%19 = load %struct.pci_dev*, %struct.pci_dev** %4
%20 = load i32, i32* %6
%21 = call i32 @rpci_write_byte(%struct.pci_dev* %19, i32 140, i32 %20)
%22 = load %struct.pci_dev*, %struct.pci_dev** %4
%23 = call i32 @pci_read_word(%struct.pci_dev* %22, i32 144)
store i32 %23, i32* %7
%24 = load i32, i32* %7
%25 = or i32 %24, 32767
store i32 %25, i32* %7
%26 = load %struct.pci_dev*, %struct.pci_dev** %4
%27 = load i32, i32* %7
%28 = call i32 @rpci_write_word(%struct.pci_dev* %26, i32 144, i32 %27)
%29 = load %struct.pci_dev*, %struct.pci_dev** %4
%30 = load i8*, i8** %5
%31 = call i64 @enable_flash_nvidia_common(%struct.pci_dev* %29, i8* %30)
%32 = icmp ne i64 %31, 0
br i1 %32, label %33, label %34
33: ; preds = %2
store i32 256, i32* %3
br label %35
34: ; preds = %2
store i32 0, i32* %3
br label %35
35: ; preds = %34, %33
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
define i32 @enable_flash_mcp55(%struct.pci_dev* %0, i8* %1) {
%3 = tail call i32 @pci_read_byte(%struct.pci_dev* %0, i32 136)
%4 = or i32 %3, 255
%5 = tail call i32 @rpci_write_byte(%struct.pci_dev* %0, i32 136, i32 %4)
%6 = tail call i32 @pci_read_byte(%struct.pci_dev* %0, i32 140)
%7 = or i32 %6, 255
%8 = tail call i32 @rpci_write_byte(%struct.pci_dev* %0, i32 140, i32 %7)
%9 = tail call i32 @pci_read_word(%struct.pci_dev* %0, i32 144)
%10 = or i32 %9, 32767
%11 = tail call i32 @rpci_write_word(%struct.pci_dev* %0, i32 144, i32 %10)
%12 = tail call i64 @enable_flash_nvidia_common(%struct.pci_dev* %0, i8* %1)
%13 = icmp eq i64 %12, 0
%14 = select i1 %13, i32 0, i32 256
ret i32 %14
}