xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ __printerr(int /*<<< orphan*/, char const *,
                              int /*<<< orphan*/);
int /*<<< orphan*/ exit(int);
void verrx(int exitcode, const char *fmt, va_list ap) {
  __printerr(0, fmt, ap);
  exit(exitcode);
}


x86 assembly (clang, -O0):
<verrx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %edi,%edi
call   1030 <__printerr@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<verrx>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <__printerr@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @verrx(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = call i32 @__printerr(i32 0, i8* %7, i32 %8)
%10 = load i32, i32* %4
%11 = call i32 @exit(i32 %10)
unreachable
}

LLVM IR (-O2):
define void @verrx(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @__printerr(i32 0, i8* %1, i32 %2)
%5 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
double random();
int /*<<< orphan*/ srandom(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
double random2() {
  srandom(time(NULL));
  return random();
}


x86 assembly (clang, -O0):
<random2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
mov    $0x0,%al
call   1050 <random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<random2>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srandom@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <random@plt>

LLVM IR (-O0):
define double @random2() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srandom(i32 %1)
%3 = call double (...) @random()
ret double %3
}

LLVM IR (-O2):
define double @random2() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srandom(i32 %1)
%3 = tail call double (...) @random()
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ do_epoll(int);
int /*<<< orphan*/ listen(int, int);
int socket_bind(char *, int);
int main(int argc, char *argv[]) {
  int listenfd;
  listenfd = socket_bind("127.0.0.1", 8787);
  listen(listenfd, 5);
  do_epoll(listenfd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
mov    $0x2253,%esi
call   1040 <socket_bind@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x5,%esi
call   1050 <listen@plt>
mov    -0x14(%rbp),%edi
call   1030 <do_epoll@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rdi
mov    $0x2253,%esi
call   1040 <socket_bind@plt>
mov    %eax,%ebx
mov    %eax,%edi
mov    $0x5,%esi
call   1050 <listen@plt>
mov    %ebx,%edi
call   1030 <do_epoll@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"127.0.0.1\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @socket_bind(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 8787)
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @listen(i32 %8, i32 5)
%10 = load i32, i32* %6
%11 = call i32 @do_epoll(i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"127.0.0.1\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @socket_bind(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 8787)
%4 = tail call i32 @listen(i32 %3, i32 5)
%5 = tail call i32 @do_epoll(i32 %3)
ret i32 0
}
/* Variables and functions */
int DE_Manipulate(char);
int DE_Add() { return (DE_Manipulate('a')); }


x86 assembly (clang, -O0):
<DE_Add>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
call   1030 <DE_Manipulate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DE_Add>:
mov    $0x61,%edi
jmp    1030 <DE_Manipulate@plt>

LLVM IR (-O0):
define i32 @DE_Add() {
%1 = call i32 @DE_Manipulate(i8 signext 97)
ret i32 %1
}

LLVM IR (-O2):
define i32 @DE_Add() {
%1 = tail call i32 @DE_Manipulate(i8 signext 97)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ seatest_run_test(char *, char *);
int /*<<< orphan*/ seatest_setup();
int /*<<< orphan*/ seatest_suite_setup();
int /*<<< orphan*/ seatest_suite_teardown();
int /*<<< orphan*/ seatest_teardown();
void seatest_test(char *fixture, char *test, void (*test_function)(void)) {
  seatest_suite_setup();
  seatest_setup();
  test_function();
  seatest_teardown();
  seatest_suite_teardown();
  seatest_run_test(fixture, test);
}


x86 assembly (clang, -O0):
<seatest_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <seatest_suite_setup@plt>
mov    $0x0,%al
call   1050 <seatest_setup@plt>
call   *-0x18(%rbp)
mov    $0x0,%al
call   1070 <seatest_teardown@plt>
mov    $0x0,%al
call   1060 <seatest_suite_teardown@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <seatest_run_test@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seatest_test>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %eax,%eax
call   1030 <seatest_suite_setup@plt>
xor    %eax,%eax
call   1050 <seatest_setup@plt>
call   *%rbx
xor    %eax,%eax
call   1070 <seatest_teardown@plt>
xor    %eax,%eax
call   1060 <seatest_suite_teardown@plt>
mov    %r15,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <seatest_run_test@plt>

LLVM IR (-O0):
define void @seatest_test(i8* %0, i8* %1, void ()* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca void ()*
store i8* %0, i8** %4
store i8* %1, i8** %5
store void ()* %2, void ()** %6
%7 = call i32 (...) @seatest_suite_setup()
%8 = call i32 (...) @seatest_setup()
%9 = load void ()*, void ()** %6
%10 = call i32 (...) @seatest_teardown()
%11 = call i32 (...) @seatest_suite_teardown()
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = call i32 @seatest_run_test(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @seatest_test(i8* %0, i8* %1, void ()* nocapture %2) {
%4 = tail call i32 (...) @seatest_suite_setup()
%5 = tail call i32 (...) @seatest_setup()
tail call void %2()
%6 = tail call i32 (...) @seatest_teardown()
%7 = tail call i32 (...) @seatest_suite_teardown()
%8 = tail call i32 @seatest_run_test(i8* %0, i8* %1)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int border_width;
};
typedef TYPE_1__ XWindowChanges;

/* Variables and functions */
void set_XWindowChanges_border_width(void *_p, int _v) {
  ((XWindowChanges *)_p)->border_width = (int)_v;
}


x86 assembly (clang, -O0):
<set_XWindowChanges_border_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XWindowChanges_border_width>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XWindowChanges_border_width(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XWindowChanges_border_width(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
unsigned char __VERIFIER_nondet_uchar() {
  unsigned char val;
  return val;
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_uchar>:
push   %rbp
mov    %rsp,%rbp
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_uchar>:
ret

LLVM IR (-O0):
define zeroext i8 @__VERIFIER_nondet_uchar() {
%1 = alloca i8
%2 = load i8, i8* %1
ret i8 %2
}

LLVM IR (-O2):
define zeroext i8 @__VERIFIER_nondet_uchar() {
ret i8 undef
}
void base() {}


x86 assembly (clang, -O0):
<base>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<base>:
ret

LLVM IR (-O0):
define void @base() {
ret void
}

LLVM IR (-O2):
define void @base() {
ret void
}
int bar2(int c) {
  if (c < 5)
    c++;
  else
    c--;
  return c << 1;
}


x86 assembly (clang, -O0):
<bar2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jge    111f <bar2+0x1f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1128 <bar2+0x28>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar2>:
lea    0x7fffffff(%rdi),%ecx
lea    0x1(%rdi),%eax
cmp    $0x5,%edi
cmovge %ecx,%eax
add    %eax,%eax
ret

LLVM IR (-O0):
define i32 @bar2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 5
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 1
store i32 %7, i32* %2
br label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %5
%12 = load i32, i32* %2
%13 = shl i32 %12, 1
ret i32 %13
}

LLVM IR (-O2):
define i32 @bar2(i32 %0) {
%2 = icmp slt i32 %0, 5
%3 = select i1 %2, i32 1, i32 2147483647
%4 = add i32 %3, %0
%5 = shl i32 %4, 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void timer1(void *ctx) {
  int i = (int)(long)ctx;
  printf("timer1, %d\n", i);
}


x86 assembly (clang, -O0):
<timer1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer1>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"timer1, %d\0A\00"
define void @timer1(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
%6 = trunc i64 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"timer1, %d\0A\00"
define void @timer1(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
char *LastChar(char *strpt) {
  char *c;
  c = strpt;
  while (*c != '\0')
    c++;
  return (--c);
}


x86 assembly (clang, -O0):
<LastChar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1131 <LastChar+0x31>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <LastChar+0x10>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LastChar>:
mov    %rdi,%rax
add    $0xfffffffffffffffe,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x2(%rax)
lea    0x1(%rax),%rax
jne    1110 <LastChar+0x10>
ret

LLVM IR (-O0):
define i8* @LastChar(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
br label %5
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 -1
store i8* %15, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @LastChar(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = getelementptr inbounds i8, i8* %3, i64 -1
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ddsFree(void *memory) { free(memory); }


x86 assembly (clang, -O0):
<ddsFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddsFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ddsFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ddsFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int network_init(void) { return 0; }


x86 assembly (clang, -O0):
<network_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<network_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @network_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @network_init() {
ret i32 0
}
void mod_idiot_is_dlclose_safe() {}


x86 assembly (clang, -O0):
<mod_idiot_is_dlclose_safe>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_idiot_is_dlclose_safe>:
ret

LLVM IR (-O0):
define void @mod_idiot_is_dlclose_safe() {
ret void
}

LLVM IR (-O2):
define void @mod_idiot_is_dlclose_safe() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int tm_mon;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct tm *);
struct tm *getLocalTime(int /*<<< orphan*/ *);
int getMonth() {
  struct tm *mytime;
  int month = 0;
  mytime = getLocalTime((time_t *)NULL);
  month = mytime->tm_mon;
  free(mytime);
  return month;
}


x86 assembly (clang, -O0):
<getMonth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <getLocalTime@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMonth>:
push   %rbx
xor    %edi,%edi
call   1040 <getLocalTime@plt>
mov    (%rax),%ebx
mov    %rax,%rdi
call   1030 <free@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @getMonth() {
%1 = alloca %struct.tm*
%2 = alloca i32
store i32 0, i32* %2
%3 = call %struct.tm* @getLocalTime(i32* null)
store %struct.tm* %3, %struct.tm** %1
%4 = load %struct.tm*, %struct.tm** %1
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i32 0, i32 0
%6 = load i32, i32* %5
store i32 %6, i32* %2
%7 = load %struct.tm*, %struct.tm** %1
%8 = call i32 @free(%struct.tm* %7)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @getMonth() {
%1 = tail call %struct.tm* @getLocalTime(i32* null)
%2 = getelementptr inbounds %struct.tm, %struct.tm* %1, i64 0, i32 0
%3 = load i32, i32* %2
%4 = tail call i32 @free(%struct.tm* %1)
ret i32 %3
}
unsigned xrop3_70_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T & D;
  stk2 = S | stk3;
  stk1 = D ^ stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_70_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_70_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
or     %esi,%eax
xor    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_70_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %5
%25 = and i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %5
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
ret i32 %32
}

LLVM IR (-O2):
define i32 @xrop3_70_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = or i32 %4, %5
%7 = xor i32 %6, 255
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ strncmp(char *, char *, int);
int is_http_response(char *data, int len) {
  if (len < (sizeof("HTTP") - 1))
    return 0;
  if (!strncmp(data, "HTTP", sizeof("HTTP") - 1))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_http_response>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movslq -0x14(%rbp),%rax
cmp    $0x4,%rax
jae    1139 <is_http_response+0x29>
movl   $0x0,-0x4(%rbp)
jmp    116a <is_http_response+0x5a>
mov    -0x10(%rbp),%rdi
lea    0xebc(%rip),%rsi
mov    $0x4,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
jne    1163 <is_http_response+0x53>
movl   $0x1,-0x4(%rbp)
jmp    116a <is_http_response+0x5a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_http_response>:
xor    %eax,%eax
cmp    $0x4,%esi
jb     1136 <is_http_response+0x26>
push   %rax
lea    0xee1(%rip),%rsi
mov    $0x4,%edx
call   1030 <strncmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"HTTP\00"
define i32 @is_http_response(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = sext i32 %6 to i64
%8 = icmp ult i64 %7, 4
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i32 @strncmp(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %10
store i32 1, i32* %3
br label %16
15: ; preds = %10
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [5 x i8] c"HTTP\00"
define i32 @is_http_response(i8* %0, i32 %1) {
%3 = icmp ult i32 %1, 4
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i32 @strncmp(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %2
%9 = phi i32 [ 0, %2 ], [ %7, %4 ]
ret i32 %9
}
void g_list_pop_allocator() {}


x86 assembly (clang, -O0):
<g_list_pop_allocator>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_list_pop_allocator>:
ret

LLVM IR (-O0):
define void @g_list_pop_allocator() {
ret void
}

LLVM IR (-O2):
define void @g_list_pop_allocator() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ boo();
int /*<<< orphan*/ echo(char *);
main() {
  echo("cau");
  boo();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <echo@plt>
mov    $0x0,%al
call   1040 <boo@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <echo@plt>
xor    %eax,%eax
call   1040 <boo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"cau\00"
define i32 @main() {
%1 = call i32 @echo(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @boo()
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"cau\00"
define i32 @main() {
%1 = tail call i32 @echo(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @boo()
ret i32 0
}
int test_imm_E3int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xE3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E3int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xe3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E3int64_midword_mem>:
testb  $0xe3,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E3int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 227
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E3int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 14876672
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ task_exit();
void user_proc_1(void) {
  while (1) {
    task_exit();
  }
}


x86 assembly (clang, -O0):
<user_proc_1>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <user_proc_1+0x9>
mov    $0x0,%al
call   1030 <task_exit@plt>
jmp    1119 <user_proc_1+0x9>

x86 assembly (clang, -O2):
<user_proc_1>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <task_exit@plt>
jmp    1120 <user_proc_1+0x10>

LLVM IR (-O0):
define void @user_proc_1() {
br label %1
1: ; preds = %0, %1
%2 = call i32 (...) @task_exit()
br label %1
}

LLVM IR (-O2):
define void @user_proc_1() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @task_exit()
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ prefposition(int, int);
void glutInitWindowPosition(int x, int y) { prefposition(x, y); }


x86 assembly (clang, -O0):
<glutInitWindowPosition>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <prefposition@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutInitWindowPosition>:
jmp    1030 <prefposition@plt>

LLVM IR (-O0):
define void @glutInitWindowPosition(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @prefposition(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @glutInitWindowPosition(i32 %0, i32 %1) {
%3 = tail call i32 @prefposition(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int floor(int);
int Mod(int g, int gg) {
  int yy;
  yy = g - gg * floor(g / gg);
  return yy;
}


x86 assembly (clang, -O0):
<Mod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,%edi
call   1030 <floor@plt>
mov    -0x14(%rbp),%ecx
mov    %eax,%edx
mov    -0x10(%rbp),%eax
imul   %edx,%ecx
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mod>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,%edi
call   1030 <floor@plt>
imul   %ebx,%eax
sub    %eax,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sdiv i32 %8, %9
%11 = call i32 @floor(i32 %10)
%12 = mul nsw i32 %7, %11
%13 = sub nsw i32 %6, %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @Mod(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
%4 = tail call i32 @floor(i32 %3)
%5 = mul nsw i32 %4, %1
%6 = sub nsw i32 %0, %5
ret i32 %6
}
int main() {
  int r = foo(0x7fffffff, 1);
  asm volatile("" : "+g"(r));
  r = bar(0x7fffffff, 1);
  asm volatile("" : "+g"(r));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x7fffffff,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1040 <foo@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x7fffffff,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <bar@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7fffffff,%edi
mov    $0x1,%esi
xor    %eax,%eax
call   1040 <foo@plt>
mov    %eax,0x4(%rsp)
mov    %eax,0x4(%rsp)
mov    $0x7fffffff,%edi
mov    $0x1,%esi
xor    %eax,%eax
call   1030 <bar@plt>
mov    %eax,0x4(%rsp)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i32, i32, ...) bitcast (i32 (...)* @foo to i32 (i32, i32, ...)*)(i32 2147483647, i32 1)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @bar to i32 (i32, i32, ...)*)(i32 2147483647, i32 1)
store i32 %5, i32* %2
%6 = load i32, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @foo to i32 (i32, i32, ...)*)(i32 2147483647, i32 1)
store i32 %3, i32* %1
%4 = call i32 (i32, i32, ...) bitcast (i32 (...)* @bar to i32 (i32, i32, ...)*)(i32 2147483647, i32 1)
store i32 %4, i32* %1
ret i32 0
}
/* Variables and functions */
void foo(int a, int b) {
  float f, g;
  float h = 1.0f;
  static int i = 42;
  char *keywords[] = {"bar", NULL};
  const double d = 2.0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  0xef6(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    0x2d22(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0x2d1f(%rip),%rax
mov    %rax,-0x28(%rbp)
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,-0x38(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
@foo.i = internal global i32 42
@.str = [4 x i8] c"bar\00"
@__const.foo.keywords = [2 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* null]
define void @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca [2 x i8*]
%9 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
store float 1.000000e+00, float* %7
%10 = bitcast [2 x i8*]* %8 to i8*
store double 2.000000e+00, double* %9
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1) {
ret void
}
void devpts_add_ref(struct inode *ptmx_inode) {}


x86 assembly (clang, -O0):
<devpts_add_ref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<devpts_add_ref>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @devpts_add_ref(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @devpts_add_ref(%struct.inode* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int /*<<< orphan*/ _exit(int);
int open(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int open_dev(const char *devname) {
  int fd = -1;
  fd = open(devname, O_RDWR);
  if (fd < 0) {
    perror("open_dev");
    _exit(-1);
  }
  return fd;
}


x86 assembly (clang, -O0):
<open_dev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e9a(%rip),%rax
mov    (%rax),%esi
call   1040 <open@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1178 <open_dev+0x48>
lea    0xe97(%rip),%rdi
call   1050 <perror@plt>
mov    $0xffffffff,%edi
call   1030 <_exit@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_dev>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
call   1040 <open@plt>
test   %eax,%eax
js     1145 <open_dev+0x15>
pop    %rcx
ret
lea    0xeb4(%rip),%rdi
call   1050 <perror@plt>
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@O_RDWR = global i32 0
@.str = [9 x i8] c"open_dev\00"
define i32 @open_dev(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 -1, i32* %3
%4 = load i8*, i8** %2
%5 = load i32, i32* @O_RDWR
%6 = call i32 @open(i8* %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @_exit(i32 -1)
unreachable
12: ; preds = %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@O_RDWR = global i32 0
@.str = [9 x i8] c"open_dev\00"
define i32 @open_dev(i8* nocapture %0) {
%2 = load i32, i32* @O_RDWR
%3 = tail call i32 @open(i8* %0, i32 %2)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = tail call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @_exit(i32 -1)
unreachable
8: ; preds = %1
ret i32 %3
}
int power_supply_create_triggers(struct power_supply *psy) { return 0; }


x86 assembly (clang, -O0):
<power_supply_create_triggers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<power_supply_create_triggers>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.power_supply = type opaque
define i32 @power_supply_create_triggers(%struct.power_supply* %0) {
%2 = alloca %struct.power_supply*
store %struct.power_supply* %0, %struct.power_supply** %2
ret i32 0
}

LLVM IR (-O2):
%struct.power_supply = type opaque
define i32 @power_supply_create_triggers(%struct.power_supply* nocapture readnone %0) {
ret i32 0
}
int aaip_set_acl_text(char *path, char *text, int flag) { return (0); }


x86 assembly (clang, -O0):
<aaip_set_acl_text>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aaip_set_acl_text>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @aaip_set_acl_text(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @aaip_set_acl_text(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
unsigned long READ_REG32(unsigned long);
unsigned long gfx_read_reg32(unsigned long offset) {
  unsigned long value;
  value = READ_REG32(offset);
  return value;
}


x86 assembly (clang, -O0):
<gfx_read_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <READ_REG32@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_read_reg32>:
jmp    1030 <READ_REG32@plt>

LLVM IR (-O0):
define i64 @gfx_read_reg32(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @READ_REG32(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @gfx_read_reg32(i64 %0) {
%2 = tail call i64 @READ_REG32(i64 %0)
ret i64 %2
}
/* Type definitions */
struct rq_asset_cds_spread {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rq_asset_cds_spread_free(struct rq_asset_cds_spread *);
void rq_asset_cds_spread_freefunc(void *asset_data) {
  rq_asset_cds_spread_free((struct rq_asset_cds_spread *)asset_data);
}


x86 assembly (clang, -O0):
<rq_asset_cds_spread_freefunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rq_asset_cds_spread_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rq_asset_cds_spread_freefunc>:
jmp    1030 <rq_asset_cds_spread_free@plt>

LLVM IR (-O0):
%struct.rq_asset_cds_spread = type { i32 }
define void @rq_asset_cds_spread_freefunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.rq_asset_cds_spread*
%5 = call i32 @rq_asset_cds_spread_free(%struct.rq_asset_cds_spread* %4)
ret void
}

LLVM IR (-O2):
%struct.rq_asset_cds_spread = type { i32 }
define void @rq_asset_cds_spread_freefunc(i8* %0) {
%2 = bitcast i8* %0 to %struct.rq_asset_cds_spread*
%3 = tail call i32 @rq_asset_cds_spread_free(%struct.rq_asset_cds_spread* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
scalar_t__ retNull();
int main() {
  if (retNull()) {
    putchar('F');
    putchar('A');
    putchar('I');
    putchar('L');
  } else {
    putchar('O');
    putchar('K');
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <retNull@plt>
cmp    $0x0,%rax
je     116d <main+0x4d>
mov    $0x46,%edi
call   1030 <putchar@plt>
mov    $0x41,%edi
call   1030 <putchar@plt>
mov    $0x49,%edi
call   1030 <putchar@plt>
mov    $0x4c,%edi
call   1030 <putchar@plt>
jmp    1181 <main+0x61>
mov    $0x4f,%edi
call   1030 <putchar@plt>
mov    $0x4b,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <retNull@plt>
test   %rax,%rax
je     1147 <main+0x27>
mov    $0x46,%edi
call   1030 <putchar@plt>
mov    $0x41,%edi
call   1030 <putchar@plt>
mov    $0x4c,%bl
mov    $0x49,%al
jmp    114b <main+0x2b>
mov    $0x4b,%bl
mov    $0x4f,%al
movzbl %al,%edi
call   1030 <putchar@plt>
movzbl %bl,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @retNull()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = call i32 @putchar(i8 signext 70)
%6 = call i32 @putchar(i8 signext 65)
%7 = call i32 @putchar(i8 signext 73)
%8 = call i32 @putchar(i8 signext 76)
br label %12
9: ; preds = %0
%10 = call i32 @putchar(i8 signext 79)
%11 = call i32 @putchar(i8 signext 75)
br label %12
12: ; preds = %9, %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @retNull()
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32 @putchar(i8 signext 70)
%5 = tail call i32 @putchar(i8 signext 65)
br label %6
6: ; preds = %0, %3
%7 = phi i8 [ 73, %3 ], [ 79, %0 ]
%8 = phi i8 [ 76, %3 ], [ 75, %0 ]
%9 = tail call i32 @putchar(i8 signext %7)
%10 = tail call i32 @putchar(i8 signext %8)
ret i32 0
}
void _Jv_booleanClass(void) {}


x86 assembly (clang, -O0):
<_Jv_booleanClass>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Jv_booleanClass>:
ret

LLVM IR (-O0):
define void @_Jv_booleanClass() {
ret void
}

LLVM IR (-O2):
define void @_Jv_booleanClass() {
ret void
}
__attribute__((always_)) int fls(int x) {
  int r;
  asm("bsrl %1,%0\n\t"
      "cmovzl %2,%0"
      : "=&r"(r)
      : "rm"(x), "rm"(-1));
  return r + 1;
}


x86 assembly (clang, -O0):
<fls>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
bsr    -0xc(%rbp),%eax
cmove  0xee8(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fls>:
mov    %edi,-0x4(%rsp)
bsr    -0x4(%rsp),%eax
cmove  0xef0(%rip),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fls(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 asm "bsrl $1,$0\0A\09cmovzl $2,$0", "=&r,rm,rm,~{dirflag},~{fpsr},~{flags}"(i32 %4, i32 -1)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @fls(i32 %0) {
%2 = tail call i32 asm "bsrl $1,$0\0A\09cmovzl $2,$0", "=&r,rm,rm,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 -1)
%3 = add nsw i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ xcb_window_t;
typedef int /*<<< orphan*/ xcb_get_property_cookie_t;
typedef int /*<<< orphan*/ xcb_connection_t;
typedef int /*<<< orphan*/ xcb_atom_t;

/* Variables and functions */
int /*<<< orphan*/ XCB_ATOM_WM_SIZE_HINTS;
int /*<<< orphan*/ xcb_get_property_unchecked(int /*<<< orphan*/ *,
                                              int /*<<< orphan*/,
                                              int /*<<< orphan*/,
                                              int /*<<< orphan*/,
                                              int /*<<< orphan*/, long, int);
xcb_get_property_cookie_t
xcb_icccm_get_wm_size_hints_unchecked(xcb_connection_t *c, xcb_window_t window,
                                      xcb_atom_t property) {
  return xcb_get_property_unchecked(c, 0, window, property,
                                    XCB_ATOM_WM_SIZE_HINTS, 0L, 18);
}


x86 assembly (clang, -O0):
<xcb_icccm_get_wm_size_hints_unchecked>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    0x2eb5(%rip),%rax
mov    (%rax),%r8d
xor    %esi,%esi
xor    %eax,%eax
mov    %eax,%r9d
movl   $0x12,(%rsp)
call   1030 <xcb_get_property_unchecked@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcb_icccm_get_wm_size_hints_unchecked>:
push   %rax
mov    %edx,%ecx
mov    %esi,%edx
mov    0x2ecc(%rip),%rax
mov    (%rax),%r8d
movl   $0x12,(%rsp)
xor    %esi,%esi
xor    %r9d,%r9d
call   1030 <xcb_get_property_unchecked@plt>
pop    %rcx
ret

LLVM IR (-O0):
@XCB_ATOM_WM_SIZE_HINTS = global i32 0
define i32 @xcb_icccm_get_wm_size_hints_unchecked(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* @XCB_ATOM_WM_SIZE_HINTS
%11 = call i32 @xcb_get_property_unchecked(i32* %7, i32 0, i32 %8, i32 %9, i32 %10, i64 0, i32 18)
ret i32 %11
}

LLVM IR (-O2):
@XCB_ATOM_WM_SIZE_HINTS = global i32 0
define i32 @xcb_icccm_get_wm_size_hints_unchecked(i32* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @XCB_ATOM_WM_SIZE_HINTS
%5 = tail call i32 @xcb_get_property_unchecked(i32* %0, i32 0, i32 %1, i32 %2, i32 %4, i64 0, i32 18)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ messErr(int);
void i2c_read(int id, int add, int off) { messErr(49); }


x86 assembly (clang, -O0):
<i2c_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x31,%edi
call   1030 <messErr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_read>:
mov    $0x31,%edi
jmp    1030 <messErr@plt>

LLVM IR (-O0):
define void @i2c_read(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @messErr(i32 49)
ret void
}

LLVM IR (-O2):
define void @i2c_read(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @messErr(i32 49)
ret void
}
unsigned hash_ipv4(unsigned result1, unsigned result2) {
  result1 = result1 * (result1 >> 23);
  result2 = result2 * (result2 >> 23);
  result1 ^= (result1 >> 16);
  result2 ^= (result2 >> 16);
  result1 += (result1 >> 13);
  result2 += (result2 >> 13);
  return result1 ^ result2;
}


x86 assembly (clang, -O0):
<hash_ipv4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x17,%ecx
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    $0x17,%ecx
imul   %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x10,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xd,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shr    $0xd,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_ipv4>:
mov    %edi,%eax
shr    $0x17,%eax
imul   %edi,%eax
mov    %esi,%ecx
shr    $0x17,%ecx
imul   %esi,%ecx
mov    %eax,%edx
shr    $0x10,%edx
xor    %eax,%edx
mov    %ecx,%esi
shr    $0x10,%esi
xor    %ecx,%esi
mov    %edx,%ecx
shr    $0xd,%ecx
add    %edx,%ecx
mov    %esi,%eax
shr    $0xd,%eax
add    %esi,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash_ipv4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = lshr i32 %6, 23
%8 = mul i32 %5, %7
store i32 %8, i32* %3
%9 = load i32, i32* %4
%10 = load i32, i32* %4
%11 = lshr i32 %10, 23
%12 = mul i32 %9, %11
store i32 %12, i32* %4
%13 = load i32, i32* %3
%14 = lshr i32 %13, 16
%15 = load i32, i32* %3
%16 = xor i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %4
%18 = lshr i32 %17, 16
%19 = load i32, i32* %4
%20 = xor i32 %19, %18
store i32 %20, i32* %4
%21 = load i32, i32* %3
%22 = lshr i32 %21, 13
%23 = load i32, i32* %3
%24 = add i32 %23, %22
store i32 %24, i32* %3
%25 = load i32, i32* %4
%26 = lshr i32 %25, 13
%27 = load i32, i32* %4
%28 = add i32 %27, %26
store i32 %28, i32* %4
%29 = load i32, i32* %3
%30 = load i32, i32* %4
%31 = xor i32 %29, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @hash_ipv4(i32 %0, i32 %1) {
%3 = lshr i32 %0, 23
%4 = mul i32 %3, %0
%5 = lshr i32 %1, 23
%6 = mul i32 %5, %1
%7 = lshr i32 %4, 16
%8 = xor i32 %7, %4
%9 = lshr i32 %6, 16
%10 = xor i32 %9, %6
%11 = lshr i32 %8, 13
%12 = add i32 %11, %8
%13 = lshr i32 %10, 13
%14 = add i32 %13, %10
%15 = xor i32 %14, %12
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void clear() { printf("\x1b[2J\x1b[H"); }


x86 assembly (clang, -O0):
<clear>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"\1B[2J\1B[H\00"
define void @clear() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"\1B[2J\1B[H\00"
define void @clear() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
size_t bc_utf8_skip_bom(const uint8_t *str, size_t len) {
  if (len < 3)
    return 0;
  if (str[0] == 0xef && str[1] == 0xbb && str[2] == 0xbf)
    return 3;
  return 0;
}


x86 assembly (clang, -O0):
<bc_utf8_skip_bom>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x3,-0x18(%rbp)
jae    1124 <bc_utf8_skip_bom+0x24>
movq   $0x0,-0x8(%rbp)
jmp    116b <bc_utf8_skip_bom+0x6b>
mov    -0x10(%rbp),%rax
cmpl   $0xef,(%rax)
jne    1163 <bc_utf8_skip_bom+0x63>
mov    -0x10(%rbp),%rax
cmpl   $0xbb,0x4(%rax)
jne    1163 <bc_utf8_skip_bom+0x63>
mov    -0x10(%rbp),%rax
cmpl   $0xbf,0x8(%rax)
jne    1163 <bc_utf8_skip_bom+0x63>
movq   $0x3,-0x8(%rbp)
jmp    116b <bc_utf8_skip_bom+0x6b>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bc_utf8_skip_bom>:
cmp    $0x3,%rsi
jb     1125 <bc_utf8_skip_bom+0x25>
cmpl   $0xef,(%rdi)
jne    1125 <bc_utf8_skip_bom+0x25>
cmpl   $0xbb,0x4(%rdi)
jne    1125 <bc_utf8_skip_bom+0x25>
mov    $0x3,%eax
cmpl   $0xbf,0x8(%rdi)
je     1127 <bc_utf8_skip_bom+0x27>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @bc_utf8_skip_bom(i32* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i32*
%5 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ult i64 %6, 3
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 0, i64* %3
br label %26
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 239
br i1 %13, label %14, label %25
14: ; preds = %9
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 1
%17 = load i32, i32* %16
%18 = icmp eq i32 %17, 187
br i1 %18, label %19, label %25
19: ; preds = %14
%20 = load i32*, i32** %4
%21 = getelementptr inbounds i32, i32* %20, i64 2
%22 = load i32, i32* %21
%23 = icmp eq i32 %22, 191
br i1 %23, label %24, label %25
24: ; preds = %19
store i64 3, i64* %3
br label %26
25: ; preds = %19, %14, %9
store i64 0, i64* %3
br label %26
26: ; preds = %25, %24, %8
%27 = load i64, i64* %3
ret i64 %27
}

LLVM IR (-O2):
define i64 @bc_utf8_skip_bom(i32* nocapture %0, i64 %1) {
%3 = icmp ult i64 %1, 3
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = load i32, i32* %0
%6 = icmp eq i32 %5, 239
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = getelementptr inbounds i32, i32* %0, i64 1
%9 = load i32, i32* %8
%10 = icmp eq i32 %9, 187
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = getelementptr inbounds i32, i32* %0, i64 2
%13 = load i32, i32* %12
%14 = icmp eq i32 %13, 191
br i1 %14, label %16, label %15
15: ; preds = %11, %7, %4
br label %16
16: ; preds = %11, %2, %15
%17 = phi i64 [ 0, %15 ], [ 0, %2 ], [ 3, %11 ]
ret i64 %17
}