xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t SIZE_MAX;
bool internal_add_overflows(size_t a, size_t b) {
  return a > SIZE_MAX - b ? true : false;
}


x86 assembly (clang, -O0):
<internal_add_overflows>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    0x2ec1(%rip),%rax
mov    (%rax),%rsi
sub    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %rsi,%rdx
cmova  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_add_overflows>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%rcx
sub    %rsi,%rcx
xor    %eax,%eax
cmp    %rdi,%rcx
setb   %al
ret

LLVM IR (-O0):
@SIZE_MAX = global i64 0
define i32 @internal_add_overflows(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* @SIZE_MAX
%7 = load i64, i64* %4
%8 = sub i64 %6, %7
%9 = icmp ugt i64 %5, %8
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 1, i32 0
ret i32 %11
}

LLVM IR (-O2):
@SIZE_MAX = global i64 0
define i32 @internal_add_overflows(i64 %0, i64 %1) {
%3 = load i64, i64* @SIZE_MAX
%4 = sub i64 %3, %1
%5 = icmp ult i64 %4, %0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
void get_pstring(void *from, char *to) {
  int len = *(unsigned char *)from;
  memcpy(to, (char *)from + 1, len);
  to[len] = 0;
}


x86 assembly (clang, -O0):
<get_pstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
add    $0x1,%rsi
mov    -0x14(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pstring>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
movzbl (%rdi),%ebx
lea    0x1(%rdi),%rsi
mov    %r14,%rdi
mov    %ebx,%edx
call   1030 <memcpy@plt>
movb   $0x0,(%r14,%rbx,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @get_pstring(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
store i32 %8, i32* %5
%9 = load i8*, i8** %4
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i32, i32* %5
%13 = call i32 @memcpy(i8* %9, i8* %11, i32 %12)
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 0, i8* %17
ret void
}

LLVM IR (-O2):
define void @get_pstring(i8* %0, i8* %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = tail call i32 @memcpy(i8* %1, i8* %5, i32 %4)
%7 = zext i8 %3 to i64
%8 = getelementptr inbounds i8, i8* %1, i64 %7
store i8 0, i8* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ timerHandler(char *, unsigned long, unsigned long);
void timer1Handler(void *string, unsigned long currentTime,
                   unsigned long scheduledTime) {
  timerHandler((char *)string, currentTime, scheduledTime);
}


x86 assembly (clang, -O0):
<timer1Handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <timerHandler@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer1Handler>:
jmp    1030 <timerHandler@plt>

LLVM IR (-O0):
define void @timer1Handler(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @timerHandler(i8* %7, i64 %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @timer1Handler(i8* %0, i64 %1, i64 %2) {
%4 = tail call i32 @timerHandler(i8* %0, i64 %1, i64 %2)
ret void
}
int isequal(char a, char b) {
  if (a == b)
    return 3;
  else
    return -3;
}


x86 assembly (clang, -O0):
<isequal>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
movsbl -0x5(%rbp),%eax
movsbl -0x6(%rbp),%ecx
cmp    %ecx,%eax
jne    112c <isequal+0x2c>
movl   $0x3,-0x4(%rbp)
jmp    1133 <isequal+0x33>
movl   $0xfffffffd,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isequal>:
cmp    %sil,%dil
mov    $0x3,%ecx
mov    $0xfffffffd,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isequal(i8 signext %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = load i8, i8* %5
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 3, i32* %3
br label %13
12: ; preds = %2
store i32 -3, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @isequal(i8 signext %0, i8 signext %1) {
%3 = icmp eq i8 %0, %1
%4 = select i1 %3, i32 3, i32 -3
ret i32 %4
}
int uniqueElement(int first, int last, int exeption) {
  return first == exeption ? last : first;
}


x86 assembly (clang, -O0):
<uniqueElement>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1124 <uniqueElement+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    112a <uniqueElement+0x2a>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uniqueElement>:
mov    %esi,%eax
cmp    %edx,%edi
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @uniqueElement(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
br label %14
12: ; preds = %3
%13 = load i32, i32* %4
br label %14
14: ; preds = %12, %10
%15 = phi i32 [ %11, %10 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @uniqueElement(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, %2
%5 = select i1 %4, i32 %1, i32 %0
ret i32 %5
}
/* Variables and functions */
void *fail_on_null(int /*<<< orphan*/);
int /*<<< orphan*/ realloc(char *, size_t);
void *xrealloc(char *p, size_t s) { return fail_on_null(realloc(p, s)); }


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %eax,%edi
call   1040 <fail_on_null@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rax
call   1030 <realloc@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <fail_on_null@plt>

LLVM IR (-O0):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @realloc(i8* %5, i64 %6)
%8 = call i8* @fail_on_null(i32 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = tail call i32 @realloc(i8* %0, i64 %1)
%4 = tail call i8* @fail_on_null(i32 %3)
ret i8* %4
}
void trs_print_init_msg(char *msg) {}


x86 assembly (clang, -O0):
<trs_print_init_msg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trs_print_init_msg>:
ret

LLVM IR (-O0):
define void @trs_print_init_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @trs_print_init_msg(i8* nocapture %0) {
ret void
}
void op0xEB(void) {}


x86 assembly (clang, -O0):
<op0xEB>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op0xEB>:
ret

LLVM IR (-O0):
define void @op0xEB() {
ret void
}

LLVM IR (-O2):
define void @op0xEB() {
ret void
}
/* Variables and functions */
unsigned long long __blsic_u64(unsigned long long);
unsigned long long test__blsic_u64(unsigned long long a) {
  return __blsic_u64(a);
}


x86 assembly (clang, -O0):
<test__blsic_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__blsic_u64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__blsic_u64>:
jmp    1030 <__blsic_u64@plt>

LLVM IR (-O0):
define i64 @test__blsic_u64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @__blsic_u64(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @test__blsic_u64(i64 %0) {
%2 = tail call i64 @__blsic_u64(i64 %0)
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ packer_uint32_hton(int /*<<< orphan*/);
uint32_t packer_uint32_ntoh(uint32_t value) {
  return packer_uint32_hton(value);
}


x86 assembly (clang, -O0):
<packer_uint32_ntoh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <packer_uint32_hton@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<packer_uint32_ntoh>:
jmp    1030 <packer_uint32_hton@plt>

LLVM IR (-O0):
define i32 @packer_uint32_ntoh(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @packer_uint32_hton(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @packer_uint32_ntoh(i32 %0) {
%2 = tail call i32 @packer_uint32_hton(i32 %0)
ret i32 %2
}
unsigned long FanChannelsGet(unsigned long ulBase) {
  ;
  return ((*((volatile unsigned long *)(ulBase + 0x00000FC0))) & 0x0000000F);
}


x86 assembly (clang, -O0):
<FanChannelsGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xfc0(%rax),%rax
and    $0xf,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FanChannelsGet>:
mov    0xfc0(%rdi),%rax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i64 @FanChannelsGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 4032
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 15
ret i64 %7
}

LLVM IR (-O2):
define i64 @FanChannelsGet(i64 %0) {
%2 = add i64 %0, 4032
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, 15
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ hash(char *);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char input[200] = {0};
  scanf("%s", input);
  printf("%ld", hash(input));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0xd0,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0xd0(%rbp),%rdi
xor    %esi,%esi
mov    $0xc8,%edx
call   1050 <memset@plt>
lea    -0xd0(%rbp),%rsi
lea    0xe8d(%rip),%rdi
call   1060 <scanf@plt>
lea    -0xd0(%rbp),%rdi
call   1030 <hash@plt>
mov    %eax,%esi
lea    0xe76(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0xd0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0xd0,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,0xb0(%rsp)
movaps %xmm0,0xa0(%rsp)
movaps %xmm0,0x90(%rsp)
movaps %xmm0,0x80(%rsp)
movaps %xmm0,0x70(%rsp)
movaps %xmm0,0x60(%rsp)
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
movq   $0x0,0xc0(%rsp)
lea    0xe6b(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    %rbx,%rdi
call   1030 <hash@plt>
lea    0xe54(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0xd0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%ld\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [200 x i8]
store i32 0, i32* %1
%3 = bitcast [200 x i8]* %2 to i8*
%4 = getelementptr inbounds [200 x i8], [200 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [200 x i8], [200 x i8]* %2, i64 0, i64 0
%7 = call i32 @hash(i8* %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%ld\00"
define i32 @main() {
%1 = alloca [200 x i8]
%2 = getelementptr inbounds [200 x i8], [200 x i8]* %1, i64 0, i64 0
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @hash(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr,
          "Usage: jfs_copyin <volumename> <srcfilename> <dstfilename>\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [60 x i8] c"Usage: jfs_copyin <volumename> <srcfilename> <dstfilename>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [60 x i8] c"Usage: jfs_copyin <volumename> <srcfilename> <dstfilename>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ AssertFailure(char *, int);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
unsigned long UARTParityModeGet(unsigned long ulBase) {
  {
    if (!(UARTBaseValid(ulBase))) {
      AssertFailure(
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/"
          "Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/"
          "uartlib.c",
          131);
    }
  };
  return ((*((volatile unsigned long *)(ulBase + 0x0000002C))) &
          (0x00000080 | 0x00000004 | 0x00000002));
}


x86 assembly (clang, -O0):
<UARTParityModeGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
cmp    $0x0,%eax
jne    114f <UARTParityModeGet+0x2f>
lea    0xebb(%rip),%rdi
mov    $0x83,%esi
call   1030 <AssertFailure@plt>
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rax
and    $0x86,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTParityModeGet>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
test   %eax,%eax
jne    113e <UARTParityModeGet+0x1e>
lea    0xecc(%rip),%rdi
mov    $0x83,%esi
call   1030 <AssertFailure@plt>
mov    0x2c(%rbx),%rax
and    $0x86,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [201 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/uartlib.c\00"
define i64 @UARTParityModeGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @UARTBaseValid(i64 %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @AssertFailure(i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0), i32 131)
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = add i64 %9, 44
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, 134
ret i64 %13
}

LLVM IR (-O2):
@.str = [201 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/uartlib.c\00"
define i64 @UARTParityModeGet(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @AssertFailure(i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0), i32 131)
br label %6
6: ; preds = %4, %1
%7 = add i64 %0, 44
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, 134
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
void clear_input(char *fullCommand) {
  fflush(stdin);
  fullCommand[0] = '\0';
}


x86 assembly (clang, -O0):
<clear_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_input>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
movb   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
define void @clear_input(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdin
%4 = call i32 @fflush(i32 %3)
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 0
store i8 0, i8* %6
ret void
}

LLVM IR (-O2):
@stdin = global i32 0
define void @clear_input(i8* nocapture writeonly %0) {
%2 = load i32, i32* @stdin
%3 = tail call i32 @fflush(i32 %2)
store i8 0, i8* %0
ret void
}
long long write_xattrs() { return ((long long)-1); }


x86 assembly (clang, -O0):
<write_xattrs>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_xattrs>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @write_xattrs() {
ret i64 -1
}

LLVM IR (-O2):
define i64 @write_xattrs() {
ret i64 -1
}
int test_imm_86uint16_mem(unsigned short *val) {
  return ((*val) & (0x86 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_86uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x86,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_86uint16_mem>:
testb  $0x86,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_86uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 134
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_86uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 134
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ console_tx_hex8(unsigned char);
void print_emerg_hex8(unsigned char value) { console_tx_hex8(value); }


x86 assembly (clang, -O0):
<print_emerg_hex8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <console_tx_hex8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_emerg_hex8>:
jmp    1030 <console_tx_hex8@plt>

LLVM IR (-O0):
define void @print_emerg_hex8(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @console_tx_hex8(i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @print_emerg_hex8(i8 zeroext %0) {
%2 = tail call i32 @console_tx_hex8(i8 zeroext %0)
ret void
}
int test_imm_C3uint16_reg(unsigned short val) {
  return ((val) & (0xC3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C3uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xc3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C3uint16_reg>:
test   $0xc3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C3uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 195
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C3uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 195
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main(void) {
  unsigned long totalsize = 80;
  unsigned long msize = 64;
  if (sizeof(long) != 4)
    exit(0);
  if (totalsize > (2147483647L * 2UL + 1) ||
      (msize != 0 && ((msize - 1) > (2147483647L * 2UL + 1))))
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x50,-0x10(%rbp)
movq   $0x40,-0x18(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store i64 80, i64* %2
store i64 64, i64* %3
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
double sqrt(int /*<<< orphan*/);
int /*<<< orphan*/ stdlib_strided_dvariancech(int /*<<< orphan*/ const,
                                              double const, double const *,
                                              int /*<<< orphan*/ const);
double stdlib_strided_dstdevch(const int64_t N, const double correction,
                               const double *X, const int64_t stride) {
  return sqrt(stdlib_strided_dvariancech(N, correction, X, stride));
}


x86 assembly (clang, -O0):
<stdlib_strided_dstdevch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <stdlib_strided_dvariancech@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_strided_dstdevch>:
push   %rax
call   1030 <stdlib_strided_dvariancech@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @stdlib_strided_dstdevch(i32 %0, double %1, double* %2, i32 %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca double*
%8 = alloca i32
store i32 %0, i32* %5
store double %1, double* %6
store double* %2, double** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load double, double* %6
%11 = load double*, double** %7
%12 = load i32, i32* %8
%13 = call i32 @stdlib_strided_dvariancech(i32 %9, double %10, double* %11, i32 %12)
%14 = call double @sqrt(i32 %13)
ret double %14
}

LLVM IR (-O2):
define double @stdlib_strided_dstdevch(i32 %0, double %1, double* %2, i32 %3) {
%5 = tail call i32 @stdlib_strided_dvariancech(i32 %0, double %1, double* %2, i32 %3)
%6 = tail call double @sqrt(i32 %5)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ hardening_trigger(int /*<<< orphan*/ *, int /*<<< orphan*/,
                                     int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello world!\n");
  hardening_trigger(NULL, 0, NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edx
xor    %esi,%esi
mov    %rdx,%rdi
call   1040 <hardening_trigger@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <hardening_trigger@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello world!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @hardening_trigger(i32* null, i32 0, i32* null)
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello world!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @hardening_trigger(i32* null, i32 0, i32* null)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void AC_FREE(void *p) {
  if (p)
    free(p);
}


x86 assembly (clang, -O0):
<AC_FREE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <AC_FREE+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AC_FREE>:
test   %rdi,%rdi
je     111a <AC_FREE+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @AC_FREE(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @AC_FREE(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
__attribute__((visibility("default"))) void *sd_bus_unref(void *bus) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_unref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_unref>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_unref(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_unref(i8* nocapture readnone %0) {
ret i8* null
}
void wifi_rsp_endpoint_set_transmit_size(
    const struct wifi_msg_endpoint_set_transmit_size_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_endpoint_set_transmit_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_endpoint_set_transmit_size>:
ret

LLVM IR (-O0):
%struct.wifi_msg_endpoint_set_transmit_size_rsp_t = type opaque
define void @wifi_rsp_endpoint_set_transmit_size(%struct.wifi_msg_endpoint_set_transmit_size_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_endpoint_set_transmit_size_rsp_t*
store %struct.wifi_msg_endpoint_set_transmit_size_rsp_t* %0, %struct.wifi_msg_endpoint_set_transmit_size_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_endpoint_set_transmit_size_rsp_t = type opaque
define void @wifi_rsp_endpoint_set_transmit_size(%struct.wifi_msg_endpoint_set_transmit_size_rsp_t* nocapture %0) {
ret void
}
/* Variables and functions */
int getpid();
int getppid();
int /*<<< orphan*/ printf(char *, int, ...);
int main(int argc, char **argv, char **envp) {
  int i;
  printf("mon id =%u mon pere id est %u\n", getpid(), getppid());
  while (1) {
    printf("<%u>", getppid());
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x20(%rbp)
mov    $0x0,%al
call   1050 <getppid@plt>
mov    -0x20(%rbp),%esi
mov    %eax,%edx
lea    0xe99(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getppid@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    116e <main+0x3e>

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <getppid@plt>
lea    0xeb8(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xec5(%rip),%rbx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <getppid@plt>
mov    %rbx,%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
jmp    1160 <main+0x30>

LLVM IR (-O0):
@.str = [31 x i8] c"mon id =%u mon pere id est %u\0A\00"
@.str.1 = [5 x i8] c"<%u>\00"
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
%8 = alloca i32
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%9 = call i32 (...) @getpid()
%10 = call i32 (...) @getppid()
%11 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
br label %12
12: ; preds = %3, %12
%13 = call i32 (...) @getppid()
%14 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %13)
br label %12
}

LLVM IR (-O2):
@.str = [31 x i8] c"mon id =%u mon pere id est %u\0A\00"
@.str.1 = [5 x i8] c"<%u>\00"
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 (...) @getpid()
%5 = tail call i32 (...) @getppid()
%6 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
br label %7
7: ; preds = %7, %3
%8 = tail call i32 (...) @getppid()
%9 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %8)
br label %7
}
/* Variables and functions */
int strlen(char *);
int verificaRua(char *rua) {
  int tamRua = strlen(rua);
  if (rua == NULL || tamRua == 0 || tamRua >= 80)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verificaRua>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1147 <verificaRua+0x37>
cmpl   $0x0,-0x14(%rbp)
je     1147 <verificaRua+0x37>
cmpl   $0x50,-0x14(%rbp)
jl     1153 <verificaRua+0x43>
movl   $0x0,-0x4(%rbp)
jmp    115a <verificaRua+0x4a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificaRua>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %rbx,%rbx
setne  %cl
test   %eax,%eax
setne  %dl
and    %cl,%dl
cmp    $0x50,%eax
setl   %al
and    %dl,%al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @verificaRua(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %4
%7 = load i8*, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %15, label %9
9: ; preds = %1
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, i32* %4
%14 = icmp sge i32 %13, 80
br i1 %14, label %15, label %16
15: ; preds = %12, %9, %1
store i32 0, i32* %2
br label %17
16: ; preds = %12
store i32 1, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @verificaRua(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp ne i8* %0, null
%4 = icmp ne i32 %2, 0
%5 = select i1 %3, i1 %4, i1 false
%6 = icmp slt i32 %2, 80
%7 = select i1 %5, i1 %6, i1 false
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, char *, char *);
int main(void) {
  char x[30];
  char y[30];
  printf("INPUT:");
  scanf("%s,%s", x, y);
  printf("x=%s,y=%s", x, y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x30(%rbp),%rsi
lea    -0x50(%rbp),%rdx
lea    0xebb(%rip),%rdi
call   1040 <scanf@plt>
lea    -0x30(%rbp),%rsi
lea    -0x50(%rbp),%rdx
lea    0xead(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x48,%rsp
lea    0xed2(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xecb(%rip),%rdi
lea    0x20(%rsp),%rbx
mov    %rsp,%r14
mov    %rbx,%rsi
mov    %r14,%rdx
call   1040 <scanf@plt>
lea    0xeb7(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x48,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"INPUT:\00"
@.str.1 = [6 x i8] c"%s,%s\00"
@.str.2 = [10 x i8] c"x=%s,y=%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [30 x i8]
%3 = alloca [30 x i8]
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%5 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%6 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%7 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %5, i8* %6)
%8 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%9 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* %8, i8* %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"INPUT:\00"
@.str.1 = [6 x i8] c"%s,%s\00"
@.str.2 = [10 x i8] c"x=%s,y=%s\00"
define i32 @main() {
%1 = alloca [30 x i8]
%2 = alloca [30 x i8]
%3 = getelementptr inbounds [30 x i8], [30 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %3, i8* %4)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* %3, i8* %4)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int int8_t;
typedef int /*<<< orphan*/ int64_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int f_scalar_stack_1(int32_t a, int64_t b, float c, double d, long double e,
                     uint8_t f, int8_t g, uint8_t h) {
  return g + h;
}


x86 assembly (clang, -O0):
<f_scalar_stack_1>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movsd  %xmm1,-0x18(%rbp)
fstpt  -0x30(%rbp)
mov    %edx,-0x34(%rbp)
mov    %ecx,-0x38(%rbp)
mov    %r8d,-0x3c(%rbp)
mov    -0x38(%rbp),%eax
add    -0x3c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_scalar_stack_1>:
lea    (%rcx,%r8,1),%eax
ret

LLVM IR (-O0):
define i32 @f_scalar_stack_1(i32 %0, i32 %1, float %2, double %3, x86_fp80 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca float
%12 = alloca double
%13 = alloca x86_fp80
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
store i32 %0, i32* %9
store i32 %1, i32* %10
store float %2, float* %11
store double %3, double* %12
store x86_fp80 %4, x86_fp80* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%17 = load i32, i32* %15
%18 = load i32, i32* %16
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @f_scalar_stack_1(i32 %0, i32 %1, float %2, double %3, x86_fp80 %4, i32 %5, i32 %6, i32 %7) {
%9 = add nsw i32 %7, %6
ret i32 %9
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
int timespec_sign(struct timespec a) {
  return a.tv_sec < 0 ? -1 : a.tv_sec || a.tv_nsec;
}


x86 assembly (clang, -O0):
<timespec_sign>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1124 <timespec_sign+0x24>
mov    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    114a <timespec_sign+0x4a>
mov    $0x1,%al
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x15(%rbp)
jne    113f <timespec_sign+0x3f>
cmpq   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_sign>:
xor    %ecx,%ecx
or     %rdi,%rsi
setne  %cl
test   %rdi,%rdi
mov    $0xffffffff,%eax
cmovns %ecx,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i32 @timespec_sign(i64 %0, i64 %1) {
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %3 to { i64, i64 }*
%5 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %4, i32 0, i32 0
store i64 %0, i64* %5
%6 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %4, i32 0, i32 1
store i64 %1, i64* %6
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%8 = load i64, i64* %7
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
br label %22
11: ; preds = %2
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%13 = load i64, i64* %12
%14 = icmp ne i64 %13, 0
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%17 = load i64, i64* %16
%18 = icmp ne i64 %17, 0
br label %19
19: ; preds = %15, %11
%20 = phi i1 [ true, %11 ], [ %18, %15 ]
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %19, %10
%23 = phi i32 [ -1, %10 ], [ %21, %19 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @timespec_sign(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, 0
%4 = icmp ne i64 %0, 0
%5 = icmp ne i64 %1, 0
%6 = select i1 %4, i1 true, i1 %5
%7 = zext i1 %6 to i32
%8 = select i1 %3, i32 -1, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *, char *);
int /*<<< orphan*/ stderr;
void Version() {
  fprintf(stderr, "This is xmlgen, version %s.%s\n%s\n", "0", "92",
          "by Florian Waas (flw@mx4.org)");
}


x86 assembly (clang, -O0):
<Version>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
lea    0xef7(%rip),%rdx
lea    0xef2(%rip),%rcx
lea    0xeee(%rip),%r8
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Version>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
lea    0xefb(%rip),%rdx
lea    0xef6(%rip),%rcx
lea    0xef2(%rip),%r8
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"This is xmlgen, version %s.%s\0A%s\0A\00"
@.str.1 = [2 x i8] c"0\00"
@.str.2 = [3 x i8] c"92\00"
@.str.3 = [30 x i8] c"by Florian Waas (flw@mx4.org)\00"
define void @Version() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"This is xmlgen, version %s.%s\0A%s\0A\00"
@.str.1 = [2 x i8] c"0\00"
@.str.2 = [3 x i8] c"92\00"
@.str.3 = [30 x i8] c"by Florian Waas (flw@mx4.org)\00"
define void @Version() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int SFD_CLOEXEC;
int SFD_NONBLOCK;
int /*<<< orphan*/ sigfillset(int /*<<< orphan*/ *);
int signalfd(int, int /*<<< orphan*/ *, int);
int create_signalfd() {
  sigset_t mask;
  sigfillset(&mask);
  return signalfd(-1, &mask, SFD_CLOEXEC | SFD_NONBLOCK);
}


x86 assembly (clang, -O0):
<create_signalfd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <sigfillset@plt>
mov    0x2eb8(%rip),%rax
mov    (%rax),%edx
mov    0x2e97(%rip),%rax
or     (%rax),%edx
mov    $0xffffffff,%edi
lea    -0x4(%rbp),%rsi
call   1030 <signalfd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_signalfd>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigfillset@plt>
mov    0x2eb7(%rip),%rax
mov    0x2e98(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    $0xffffffff,%edi
mov    %rbx,%rsi
call   1030 <signalfd@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SFD_CLOEXEC = global i32 0
@SFD_NONBLOCK = global i32 0
define i32 @create_signalfd() {
%1 = alloca i32
%2 = call i32 @sigfillset(i32* %1)
%3 = load i32, i32* @SFD_CLOEXEC
%4 = load i32, i32* @SFD_NONBLOCK
%5 = or i32 %3, %4
%6 = call i32 @signalfd(i32 -1, i32* %1, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
@SFD_CLOEXEC = global i32 0
@SFD_NONBLOCK = global i32 0
define i32 @create_signalfd() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigfillset(i32* %1)
%4 = load i32, i32* @SFD_CLOEXEC
%5 = load i32, i32* @SFD_NONBLOCK
%6 = or i32 %5, %4
%7 = call i32 @signalfd(i32 -1, i32* %1, i32 %6)
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
int _fread_u8(uint8_t *u8, FILE *fp) { return fread(u8, 1, 1, fp); }


x86 assembly (clang, -O0):
<_fread_u8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fread_u8>:
mov    %rsi,%rcx
mov    $0x1,%esi
mov    $0x1,%edx
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i32 @_fread_u8(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @fread(i32* %5, i32 1, i32 1, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @_fread_u8(i32* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fread(i32* %0, i32 1, i32 1, i32* %1)
ret i32 %3
}
void long2net(unsigned long int l, unsigned char **bufp) {
  *(*bufp + 3) = (unsigned char)l;
  l >>= 8;
  *(*bufp + 2) = (unsigned char)l;
  l >>= 8;
  *(*bufp + 1) = (unsigned char)l;
  l >>= 8;
  **bufp = (unsigned char)l;
  *bufp += 4;
}


x86 assembly (clang, -O0):
<long2net>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %cl,0x3(%rax)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %cl,0x2(%rax)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %cl,0x1(%rax)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<long2net>:
mov    %rdi,%rax
mov    (%rsi),%rcx
mov    %al,0x3(%rcx)
mov    (%rsi),%rcx
mov    %ah,0x2(%rcx)
mov    %rdi,%rcx
shr    $0x10,%rcx
mov    (%rsi),%rdx
mov    %cl,0x1(%rdx)
shr    $0x18,%rax
mov    (%rsi),%rcx
mov    %al,(%rcx)
addq   $0x4,(%rsi)
ret

LLVM IR (-O0):
define void @long2net(i64 %0, i8** %1) {
%3 = alloca i64
%4 = alloca i8**
store i64 %0, i64* %3
store i8** %1, i8*** %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i8
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8, i8* %8, i64 3
store i8 %6, i8* %9
%10 = load i64, i64* %3
%11 = lshr i64 %10, 8
store i64 %11, i64* %3
%12 = load i64, i64* %3
%13 = trunc i64 %12 to i8
%14 = load i8**, i8*** %4
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i64 2
store i8 %13, i8* %16
%17 = load i64, i64* %3
%18 = lshr i64 %17, 8
store i64 %18, i64* %3
%19 = load i64, i64* %3
%20 = trunc i64 %19 to i8
%21 = load i8**, i8*** %4
%22 = load i8*, i8** %21
%23 = getelementptr inbounds i8, i8* %22, i64 1
store i8 %20, i8* %23
%24 = load i64, i64* %3
%25 = lshr i64 %24, 8
store i64 %25, i64* %3
%26 = load i64, i64* %3
%27 = trunc i64 %26 to i8
%28 = load i8**, i8*** %4
%29 = load i8*, i8** %28
store i8 %27, i8* %29
%30 = load i8**, i8*** %4
%31 = load i8*, i8** %30
%32 = getelementptr inbounds i8, i8* %31, i64 4
store i8* %32, i8** %30
ret void
}

LLVM IR (-O2):
define void @long2net(i64 %0, i8** nocapture %1) {
%3 = trunc i64 %0 to i8
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i64 3
store i8 %3, i8* %5
%6 = lshr i64 %0, 8
%7 = trunc i64 %6 to i8
%8 = load i8*, i8** %1
%9 = getelementptr inbounds i8, i8* %8, i64 2
store i8 %7, i8* %9
%10 = lshr i64 %0, 16
%11 = trunc i64 %10 to i8
%12 = load i8*, i8** %1
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8 %11, i8* %13
%14 = lshr i64 %0, 24
%15 = trunc i64 %14 to i8
%16 = load i8*, i8** %1
store i8 %15, i8* %16
%17 = load i8*, i8** %1
%18 = getelementptr inbounds i8, i8* %17, i64 4
store i8* %18, i8** %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int i = 0, j = 0, k = 0;
  while (j < 20) {
    if (i == 0) {
      if (k == 5) {
        printf("1\n");
        goto label;
      }
    } else {
      printf("2\n");
    label:
      printf("3\n");
      j++;
    }
    j += 5;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x14,-0xc(%rbp)
jge    1197 <main+0x87>
cmpl   $0x0,-0x8(%rbp)
jne    1168 <main+0x58>
cmpl   $0x5,-0x10(%rbp)
jne    1163 <main+0x53>
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
jmp    1174 <main+0x64>
jmp    1189 <main+0x79>
lea    0xe94(%rip),%rdi
call   1030 <printf@plt>
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0xc(%rbp)
jmp    1134 <main+0x24>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"1\0A\00"
@.str.1 = [3 x i8] c"2\0A\00"
@.str.2 = [3 x i8] c"3\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %23, %0
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 20
br i1 %7, label %8, label %26
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 5
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %19
16: ; preds = %11
br label %23
17: ; preds = %8
%18 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %19
19: ; preds = %17, %14
%20 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 1
store i32 %22, i32* %3
br label %23
23: ; preds = %19, %16
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 5
store i32 %25, i32* %3
br label %5
26: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void nonblock(int fd) {}


x86 assembly (clang, -O0):
<nonblock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nonblock>:
ret

LLVM IR (-O0):
define void @nonblock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @nonblock(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2c_ev_handler();
void I2C1_EV_IRQHandler(void) { i2c_ev_handler(); }


x86 assembly (clang, -O0):
<I2C1_EV_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <i2c_ev_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C1_EV_IRQHandler>:
xor    %eax,%eax
jmp    1030 <i2c_ev_handler@plt>

LLVM IR (-O0):
define void @I2C1_EV_IRQHandler() {
%1 = call i32 (...) @i2c_ev_handler()
ret void
}

LLVM IR (-O2):
define void @I2C1_EV_IRQHandler() {
%1 = tail call i32 (...) @i2c_ev_handler()
ret void
}