xunge/DecIR huggingface dataset:
/* Type definitions */
struct dyString {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dyStringAppend(struct dyString *, char *);
void appendMimeTerminus(struct dyString *dy, char *boundary) {
  dyStringAppend(dy, "\r\n--");
  dyStringAppend(dy, boundary);
  dyStringAppend(dy, "--\r\n");
}


x86 assembly (clang, -O0):
<appendMimeTerminus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <dyStringAppend@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dyStringAppend@plt>
mov    -0x8(%rbp),%rdi
lea    0xebd(%rip),%rsi
call   1030 <dyStringAppend@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<appendMimeTerminus>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xedf(%rip),%rsi
call   1030 <dyStringAppend@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <dyStringAppend@plt>
lea    0xecd(%rip),%rsi
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <dyStringAppend@plt>

LLVM IR (-O0):
%struct.dyString = type { i32 }
@.str = [5 x i8] c"\0D\0A--\00"
@.str.1 = [5 x i8] c"--\0D\0A\00"
define void @appendMimeTerminus(%struct.dyString* %0, i8* %1) {
%3 = alloca %struct.dyString*
%4 = alloca i8*
store %struct.dyString* %0, %struct.dyString** %3
store i8* %1, i8** %4
%5 = load %struct.dyString*, %struct.dyString** %3
%6 = call i32 @dyStringAppend(%struct.dyString* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%7 = load %struct.dyString*, %struct.dyString** %3
%8 = load i8*, i8** %4
%9 = call i32 @dyStringAppend(%struct.dyString* %7, i8* %8)
%10 = load %struct.dyString*, %struct.dyString** %3
%11 = call i32 @dyStringAppend(%struct.dyString* %10, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.dyString = type { i32 }
@.str = [5 x i8] c"\0D\0A--\00"
@.str.1 = [5 x i8] c"--\0D\0A\00"
define void @appendMimeTerminus(%struct.dyString* %0, i8* %1) {
%3 = tail call i32 @dyStringAppend(%struct.dyString* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @dyStringAppend(%struct.dyString* %0, i8* %1)
%5 = tail call i32 @dyStringAppend(%struct.dyString* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
long InternTypeSize(int);
long NativeTypeSize(int type) {
  if (type == 2)
    return -1;
  else
    return InternTypeSize(type);
}


x86 assembly (clang, -O0):
<NativeTypeSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jne    1132 <NativeTypeSize+0x22>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    113e <NativeTypeSize+0x2e>
mov    -0xc(%rbp),%edi
call   1030 <InternTypeSize@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NativeTypeSize>:
cmp    $0x2,%edi
jne    111d <NativeTypeSize+0xd>
mov    $0xffffffffffffffff,%rax
ret
jmp    1030 <InternTypeSize@plt>

LLVM IR (-O0):
define i64 @NativeTypeSize(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 -1, i64* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i64 @InternTypeSize(i32 %8)
store i64 %9, i64* %2
br label %10
10: ; preds = %7, %6
%11 = load i64, i64* %2
ret i64 %11
}

LLVM IR (-O2):
define i64 @NativeTypeSize(i32 %0) {
%2 = icmp eq i32 %0, 2
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i64 @InternTypeSize(i32 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i64 [ %4, %3 ], [ -1, %1 ]
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ lookNarray(char *, unsigned int);
void lookinteger4array_(char *x, unsigned int *n) { lookNarray(x, (*n * 4)); }


x86 assembly (clang, -O0):
<lookinteger4array_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
shl    $0x2,%esi
call   1030 <lookNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookinteger4array_>:
mov    (%rsi),%esi
shl    $0x2,%esi
jmp    1030 <lookNarray@plt>

LLVM IR (-O0):
define void @lookinteger4array_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = mul i32 %7, 4
%9 = call i32 @lookNarray(i8* %5, i32 %8)
ret void
}

LLVM IR (-O2):
define void @lookinteger4array_(i8* %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = shl i32 %3, 2
%5 = tail call i32 @lookNarray(i8* %0, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _bitonic_merge_kernel4core(float *, float *);
int /*<<< orphan*/ _mm_loadu_ps(float *);
int /*<<< orphan*/ _mm_shuffle_ps(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ _mm_storeu_ps(float *, int /*<<< orphan*/);
void _bitonic_merge_kernel4(float *a, float *b) {
  __m128 mb;
  mb = _mm_loadu_ps(b);
  mb = _mm_shuffle_ps(mb, mb, 0x1b);
  _mm_storeu_ps(b, mb);
  _bitonic_merge_kernel4core(a, b);
}


x86 assembly (clang, -O0):
<_bitonic_merge_kernel4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <_mm_loadu_ps@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    $0x1b,%edx
call   1030 <_mm_shuffle_ps@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <_mm_storeu_ps@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1060 <_bitonic_merge_kernel4core@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_bitonic_merge_kernel4>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1050 <_mm_loadu_ps@plt>
mov    %eax,%edi
mov    %eax,%esi
mov    $0x1b,%edx
call   1030 <_mm_shuffle_ps@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <_mm_storeu_ps@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1060 <_bitonic_merge_kernel4core@plt>

LLVM IR (-O0):
define void @_bitonic_merge_kernel4(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca i32
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %4
%7 = call i32 @_mm_loadu_ps(float* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %5
%10 = call i32 @_mm_shuffle_ps(i32 %8, i32 %9, i32 27)
store i32 %10, i32* %5
%11 = load float*, float** %4
%12 = load i32, i32* %5
%13 = call i32 @_mm_storeu_ps(float* %11, i32 %12)
%14 = load float*, float** %3
%15 = load float*, float** %4
%16 = call i32 @_bitonic_merge_kernel4core(float* %14, float* %15)
ret void
}

LLVM IR (-O2):
define void @_bitonic_merge_kernel4(float* %0, float* %1) {
%3 = tail call i32 @_mm_loadu_ps(float* %1)
%4 = tail call i32 @_mm_shuffle_ps(i32 %3, i32 %3, i32 27)
%5 = tail call i32 @_mm_storeu_ps(float* %1, i32 %4)
%6 = tail call i32 @_bitonic_merge_kernel4core(float* %0, float* %1)
ret void
}
float signf(const float in_X) {
  float result = 0;
  result = (in_X < 0) ? -1 : result;
  result = (in_X > 0) ? 1 : result;
  return result;
}


x86 assembly (clang, -O0):
<signf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1130 <signf+0x30>
movss  0xeda(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <signf+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1167 <signf+0x67>
movss  0xea7(%rip),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1171 <signf+0x71>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<signf>:
xorps  %xmm1,%xmm1
movaps %xmm0,%xmm2
cmpltss %xmm1,%xmm2
movss  0xeed(%rip),%xmm3
andps  %xmm2,%xmm3
cmpltss %xmm0,%xmm1
movss  0xee1(%rip),%xmm0
andps  %xmm1,%xmm0
andnps %xmm3,%xmm1
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @signf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
store float 0.000000e+00, float* %3
%4 = load float, float* %2
%5 = fcmp olt float %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
br label %9
7: ; preds = %1
%8 = load float, float* %3
br label %9
9: ; preds = %7, %6
%10 = phi float [ -1.000000e+00, %6 ], [ %8, %7 ]
store float %10, float* %3
%11 = load float, float* %2
%12 = fcmp ogt float %11, 0.000000e+00
br i1 %12, label %13, label %14
13: ; preds = %9
br label %16
14: ; preds = %9
%15 = load float, float* %3
br label %16
16: ; preds = %14, %13
%17 = phi float [ 1.000000e+00, %13 ], [ %15, %14 ]
store float %17, float* %3
%18 = load float, float* %3
ret float %18
}

LLVM IR (-O2):
define float @signf(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = select i1 %2, float -1.000000e+00, float 0.000000e+00
%4 = fcmp ogt float %0, 0.000000e+00
%5 = select i1 %4, float 1.000000e+00, float %3
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
size_t strlen(char *);
char *sepol_stpcpy(char *dst, const char *src) {
  strcpy(dst, src);
  return &dst[strlen(dst)];
}


x86 assembly (clang, -O0):
<sepol_stpcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sepol_stpcpy>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strcpy@plt>
mov    %rbx,%rdi
call   1040 <strlen@plt>
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @sepol_stpcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
%11 = getelementptr inbounds i8, i8* %8, i64 %10
ret i8* %11
}

LLVM IR (-O2):
define i8* @sepol_stpcpy(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* %1)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%5 = getelementptr inbounds i8, i8* %0, i64 %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ f();
int main() {
  f();
  f();
  f();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    $0x0,%al
call   1030 <f@plt>
mov    $0x0,%al
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @f()
%3 = call i32 (...) @f()
%4 = call i32 (...) @f()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @f()
%2 = tail call i32 (...) @f()
%3 = tail call i32 (...) @f()
ret i32 0
}
char *strrchr(const char *str, int c) { return 0; }


x86 assembly (clang, -O0):
<strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strrchr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @strrchr(i8* nocapture readnone %0, i32 %1) {
ret i8* null
}
long asIEEE64BitWord(double val) {
  union {
    double input;
    long output;
  } data;
  data.input = val;
  return data.output;
}


x86 assembly (clang, -O0):
<asIEEE64BitWord>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asIEEE64BitWord>:
movq   %xmm0,%rax
ret

LLVM IR (-O0):
%union.anon = type { double }
define i64 @asIEEE64BitWord(double %0) {
%2 = alloca double
%3 = alloca %union.anon
store double %0, double* %2
%4 = load double, double* %2
%5 = bitcast %union.anon* %3 to double*
store double %4, double* %5
%6 = bitcast %union.anon* %3 to i64*
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @asIEEE64BitWord(double %0) {
%2 = bitcast double %0 to i64
ret i64 %2
}
int sign(long x) { return (x) ? ((x > 0) ? 1 : -1) : x; }


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1133 <sign+0x33>
mov    -0x8(%rbp),%rdx
mov    $0xffffffff,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovg  %ecx,%eax
cltq
mov    %rax,-0x10(%rbp)
jmp    113b <sign+0x3b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
xor    %ecx,%ecx
xor    %eax,%eax
test   %rdi,%rdi
setg   %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sign(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp sgt i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 -1
%10 = sext i32 %9 to i64
br label %13
11: ; preds = %1
%12 = load i64, i64* %2
br label %13
13: ; preds = %11, %5
%14 = phi i64 [ %10, %5 ], [ %12, %11 ]
%15 = trunc i64 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @sign(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = icmp sgt i64 %0, 0
%4 = select i1 %3, i32 1, i32 -1
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ IINCHIP_WRITE(int, int /*<<< orphan*/);
void ClearSubnet(void) {
  IINCHIP_WRITE((0x0000 + 0x0005) + 0, 0);
  IINCHIP_WRITE((0x0000 + 0x0005) + 1, 0);
  IINCHIP_WRITE((0x0000 + 0x0005) + 2, 0);
  IINCHIP_WRITE((0x0000 + 0x0005) + 3, 0);
}


x86 assembly (clang, -O0):
<ClearSubnet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
mov    $0x6,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
mov    $0x7,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
mov    $0x8,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearSubnet>:
push   %rax
mov    $0x5,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
mov    $0x6,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
mov    $0x7,%edi
xor    %esi,%esi
call   1030 <IINCHIP_WRITE@plt>
mov    $0x8,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <IINCHIP_WRITE@plt>

LLVM IR (-O0):
define void @ClearSubnet() {
%1 = call i32 @IINCHIP_WRITE(i32 5, i32 0)
%2 = call i32 @IINCHIP_WRITE(i32 6, i32 0)
%3 = call i32 @IINCHIP_WRITE(i32 7, i32 0)
%4 = call i32 @IINCHIP_WRITE(i32 8, i32 0)
ret void
}

LLVM IR (-O2):
define void @ClearSubnet() {
%1 = tail call i32 @IINCHIP_WRITE(i32 5, i32 0)
%2 = tail call i32 @IINCHIP_WRITE(i32 6, i32 0)
%3 = tail call i32 @IINCHIP_WRITE(i32 7, i32 0)
%4 = tail call i32 @IINCHIP_WRITE(i32 8, i32 0)
ret void
}
void ELMSyndromeFrgmtSet(unsigned int baseAddr, unsigned int synFrgmtId,
                         unsigned int synFrgmtVal) {
  if (synFrgmtId != (6)) {
    (*((volatile unsigned int *)(baseAddr + (0x400 + (synFrgmtId * 4))))) =
        (synFrgmtVal);
  } else {
    (*((volatile unsigned int *)(baseAddr + (0x400 + (synFrgmtId * 4))))) =
        (synFrgmtVal & (0x0000FFFFu));
  }
}


x86 assembly (clang, -O0):
<ELMSyndromeFrgmtSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x6,-0x8(%rbp)
je     1134 <ELMSyndromeFrgmtSet+0x34>
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
shl    $0x2,%edx
add    $0x400,%edx
add    %edx,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
jmp    1152 <ELMSyndromeFrgmtSet+0x52>
mov    -0xc(%rbp),%ecx
and    $0xffff,%ecx
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
shl    $0x2,%edx
add    $0x400,%edx
add    %edx,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ELMSyndromeFrgmtSet>:
cmp    $0x6,%esi
jne    1110 <ELMSyndromeFrgmtSet+0x10>
movzwl %dx,%edx
add    $0x418,%edi
jmp    1119 <ELMSyndromeFrgmtSet+0x19>
lea    (%rdi,%rsi,4),%edi
add    $0x400,%edi
mov    %edi,%eax
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @ELMSyndromeFrgmtSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 6
br i1 %8, label %9, label %18
9: ; preds = %3
%10 = load i32, i32* %6
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = mul i32 %12, 4
%14 = add i32 1024, %13
%15 = add i32 %11, %14
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
store volatile i32 %10, i32* %17
br label %28
18: ; preds = %3
%19 = load i32, i32* %6
%20 = and i32 %19, 65535
%21 = load i32, i32* %4
%22 = load i32, i32* %5
%23 = mul i32 %22, 4
%24 = add i32 1024, %23
%25 = add i32 %21, %24
%26 = zext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
store volatile i32 %20, i32* %27
br label %28
28: ; preds = %18, %9
ret void
}

LLVM IR (-O2):
define void @ELMSyndromeFrgmtSet(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 6
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = shl i32 %1, 2
%7 = add i32 %0, 1024
%8 = add i32 %7, %6
br label %12
9: ; preds = %3
%10 = and i32 %2, 65535
%11 = add i32 %0, 1048
br label %12
12: ; preds = %9, %5
%13 = phi i32 [ %11, %9 ], [ %8, %5 ]
%14 = phi i32 [ %10, %9 ], [ %2, %5 ]
%15 = zext i32 %13 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 %14, i32* %16
ret void
}
int mymin(int x, int y) {
  if (x < y) {
    return x;
  } else {
    return y;
  }
}


x86 assembly (clang, -O0):
<mymin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <mymin+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <mymin+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mymin>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @mymin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @mymin(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
unsigned short xml_encode_us_ascii(unsigned char c) {
  return (unsigned short)c;
}


x86 assembly (clang, -O0):
<xml_encode_us_ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xml_encode_us_ascii>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @xml_encode_us_ascii(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @xml_encode_us_ascii(i8 zeroext %0) {
%2 = zext i8 %0 to i16
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int x, y;
  scanf("%d %d", &x, &y);
  printf("%d", x < 0 ? (y < 0 ? 3 : 2) : (y < 0 ? 4 : 1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
jge    1168 <main+0x48>
mov    -0xc(%rbp),%edx
mov    $0x2,%eax
mov    $0x3,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
mov    %eax,-0x10(%rbp)
jmp    117e <main+0x5e>
mov    -0xc(%rbp),%edx
mov    $0x1,%eax
mov    $0x4,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xe7b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%eax
shr    $0x1f,%eax
cmpl   $0x0,0x4(%rsp)
lea    0x2(%rax),%ecx
lea    0x1(%rax,%rax,2),%esi
cmovs  %ecx,%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %0
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 3, i32 2
br label %17
12: ; preds = %0
%13 = load i32, i32* %3
%14 = icmp slt i32 %13, 0
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 4, i32 1
br label %17
17: ; preds = %12, %7
%18 = phi i32 [ %11, %7 ], [ %16, %12 ]
%19 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %18)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 0
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 0
%10 = select i1 %9, i32 3, i32 2
%11 = select i1 %9, i32 4, i32 1
%12 = select i1 %7, i32 %10, i32 %11
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %12)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ McuSleepC__McuPowerState__update();
void HplAtmRfa1TimerMacP__McuPowerState__update(void) {
  McuSleepC__McuPowerState__update();
}


x86 assembly (clang, -O0):
<HplAtmRfa1TimerMacP__McuPowerState__update>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <McuSleepC__McuPowerState__update@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplAtmRfa1TimerMacP__McuPowerState__update>:
xor    %eax,%eax
jmp    1030 <McuSleepC__McuPowerState__update@plt>

LLVM IR (-O0):
define void @HplAtmRfa1TimerMacP__McuPowerState__update() {
%1 = call i32 (...) @McuSleepC__McuPowerState__update()
ret void
}

LLVM IR (-O2):
define void @HplAtmRfa1TimerMacP__McuPowerState__update() {
%1 = tail call i32 (...) @McuSleepC__McuPowerState__update()
ret void
}
int examPassed(unsigned numericGrade) {
  int result, isValidGrade = 0;
  if (numericGrade >= 1 && numericGrade <= 7) {
    isValidGrade = 1;
  } else {
    isValidGrade = 0;
  }
  if (isValidGrade) {
    if (numericGrade <= 4) {
      result = 1;
    } else {
      result = 0;
    }
  } else {
    result = -1;
  }
  return result;
}


x86 assembly (clang, -O0):
<examPassed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0x4(%rbp)
jb     112e <examPassed+0x2e>
cmpl   $0x7,-0x4(%rbp)
ja     112e <examPassed+0x2e>
movl   $0x1,-0xc(%rbp)
jmp    1135 <examPassed+0x35>
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1161 <examPassed+0x61>
cmpl   $0x4,-0x4(%rbp)
ja     1155 <examPassed+0x55>
movl   $0x1,-0x8(%rbp)
jmp    115c <examPassed+0x5c>
movl   $0x0,-0x8(%rbp)
jmp    1168 <examPassed+0x68>
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<examPassed>:
lea    -0x1(%rdi),%eax
xor    %ecx,%ecx
cmp    $0x5,%edi
setb   %cl
cmp    $0x7,%eax
mov    $0xffffffff,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @examPassed(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = icmp uge i32 %5, 1
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp ule i32 %8, 7
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %4
br label %12
11: ; preds = %7, %1
store i32 0, i32* %4
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %4
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %21
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp ule i32 %16, 4
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 1, i32* %3
br label %20
19: ; preds = %15
store i32 0, i32* %3
br label %20
20: ; preds = %19, %18
br label %22
21: ; preds = %12
store i32 -1, i32* %3
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @examPassed(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 7
%4 = icmp ult i32 %0, 5
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 %5, i32 -1
ret i32 %6
}
__attribute__((returns_nonnull)) void *test_bad_returns_null(void) { return 0; }


x86 assembly (clang, -O0):
<test_bad_returns_null>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bad_returns_null>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @test_bad_returns_null() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @test_bad_returns_null() {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int print_int(int a) {
  printf("%d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<print_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @print_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @print_int(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void *malloc(size_t);
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *);
void *xmalloc(size_t size) {
  void *alloc = malloc(size);
  if (alloc == 0) {
    syslog(LOG_ERR, "out of memory (malloc)");
    exit(EXIT_FAILURE);
  }
  return alloc;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1177 <xmalloc+0x47>
mov    0x2e75(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <syslog@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rax
call   1030 <malloc@plt>
test   %rax,%rax
je     113d <xmalloc+0xd>
pop    %rcx
ret
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1040 <syslog@plt>
mov    0x2e87(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@LOG_ERR = global i32 0
@.str = [23 x i8] c"out of memory (malloc)\00"
@EXIT_FAILURE = global i32 0
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32, i32* @LOG_ERR
%10 = call i32 @syslog(i32 %9, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@LOG_ERR = global i32 0
@.str = [23 x i8] c"out of memory (malloc)\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i32, i32* @LOG_ERR
%6 = tail call i32 @syslog(i32 %5, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isdigit(int);
void t_isdigit_0x39() {
  Assert_real((isdigit(57)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              290, ("isdigit should be 1 for 9"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x39>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39,%edi
call   1030 <isdigit@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x122,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x39>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x122,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 1 for 9\00"
define void @t_isdigit_0x39() {
%1 = call i32 @isdigit(i32 57)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 290, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 1 for 9\00"
define void @t_isdigit_0x39() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 290, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
long mod_sum(long, long, long);
long mod_product(long num1, long num2, long mod) {
  long prod = 0;
  long i;
  for (i = 0; i < num1; i++) {
    prod = mod_sum(prod, num2, mod);
  }
  return prod;
}


x86 assembly (clang, -O0):
<mod_product>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    1168 <mod_product+0x58>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mod_sum@plt>
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    1134 <mod_product+0x24>
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_product>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
jle    1146 <mod_product+0x36>
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rax,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1030 <mod_sum@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <mod_product+0x20>
jmp    1148 <mod_product+0x38>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @mod_product(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
store i64 0, i64* %7
store i64 0, i64* %8
br label %9
9: ; preds = %18, %3
%10 = load i64, i64* %8
%11 = load i64, i64* %4
%12 = icmp slt i64 %10, %11
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i64, i64* %7
%15 = load i64, i64* %5
%16 = load i64, i64* %6
%17 = call i64 @mod_sum(i64 %14, i64 %15, i64 %16)
store i64 %17, i64* %7
br label %18
18: ; preds = %13
%19 = load i64, i64* %8
%20 = add nsw i64 %19, 1
store i64 %20, i64* %8
br label %9
21: ; preds = %9
%22 = load i64, i64* %7
ret i64 %22
}

LLVM IR (-O2):
define i64 @mod_product(i64 %0, i64 %1, i64 %2) {
%4 = icmp sgt i64 %0, 0
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i64 [ %9, %5 ], [ 0, %3 ]
%7 = phi i64 [ %8, %5 ], [ 0, %3 ]
%8 = tail call i64 @mod_sum(i64 %7, i64 %1, i64 %2)
%9 = add nuw nsw i64 %6, 1
%10 = icmp eq i64 %9, %0
br i1 %10, label %11, label %5
11: ; preds = %5, %3
%12 = phi i64 [ 0, %3 ], [ %8, %5 ]
ret i64 %12
}
void _infix_operator_div_i64_i64(signed long long lhs, signed long long rhs,
                                 signed long long *__rval_1) {
  *__rval_1 = lhs / rhs;
}


x86 assembly (clang, -O0):
<_infix_operator_div_i64_i64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_infix_operator_div_i64_i64>:
mov    %rdx,%rcx
mov    %rdi,%rax
mov    %rdi,%rdx
or     %rsi,%rdx
shr    $0x20,%rdx
je     111b <_infix_operator_div_i64_i64+0x1b>
cqto
idiv   %rsi
mov    %rax,(%rcx)
ret
xor    %edx,%edx
div    %esi
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @_infix_operator_div_i64_i64(i64 %0, i64 %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = sdiv i64 %7, %8
%10 = load i64*, i64** %6
store i64 %9, i64* %10
ret void
}

LLVM IR (-O2):
define void @_infix_operator_div_i64_i64(i64 %0, i64 %1, i64* nocapture writeonly %2) {
%4 = sdiv i64 %0, %1
store i64 %4, i64* %2
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int show_continuation_parameters(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(194, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<show_continuation_parameters>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xc2,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_continuation_parameters>:
mov    $0xc2,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @show_continuation_parameters() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 194, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @show_continuation_parameters() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 194, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
zero(area, size) char *area;
int size;
{
  int i;
  for (i = 0; i < size; i++)
    area[i] = '\0';
}


x86 assembly (clang, -O0):
<zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1138 <zero+0x38>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <zero+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero>:
test   %esi,%esi
jle    1122 <zero+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @zero(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %16, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 0, i8* %15
br label %16
16: ; preds = %11
%17 = load i32, i32* %6
%18 = add nsw i32 %17, 1
store i32 %18, i32* %6
br label %7
19: ; preds = %7
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @zero(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret i32 undef
}
void SSMR3GetGCUIntPtr(void) {}


x86 assembly (clang, -O0):
<SSMR3GetGCUIntPtr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSMR3GetGCUIntPtr>:
ret

LLVM IR (-O0):
define void @SSMR3GetGCUIntPtr() {
ret void
}

LLVM IR (-O2):
define void @SSMR3GetGCUIntPtr() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int fd_is_nonblock(int fd) {
  int flags = fcntl(fd, F_GETFL, 0);
  if (flags == -1) {
    return -1;
  }
  return !!(flags & O_NONBLOCK);
}


x86 assembly (clang, -O0):
<fd_is_nonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2eb3(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    1147 <fd_is_nonblock+0x37>
movl   $0xffffffff,-0x4(%rbp)
jmp    1165 <fd_is_nonblock+0x55>
mov    -0xc(%rbp),%eax
mov    0x2e97(%rip),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_is_nonblock>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    0x2ec0(%rip),%rcx
xor    %edx,%edx
test   %eax,(%rcx)
setne  %dl
cmp    $0xffffffff,%eax
cmovne %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @fd_is_nonblock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* @F_GETFL
%7 = call i32 @fcntl(i32 %5, i32 %6, i32 0)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %19
11: ; preds = %1
%12 = load i32, i32* %4
%13 = load i32, i32* @O_NONBLOCK
%14 = and i32 %12, %13
%15 = icmp ne i32 %14, 0
%16 = xor i1 %15, true
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @fd_is_nonblock(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 @fcntl(i32 %0, i32 %2, i32 0)
%4 = icmp eq i32 %3, -1
%5 = load i32, i32* @O_NONBLOCK
%6 = and i32 %5, %3
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
%9 = select i1 %4, i32 -1, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ configureBlePatch();
int /*<<< orphan*/ enterBleCpePatch();
int /*<<< orphan*/ enterBleSysPatch();
void applyBlePatch(void) {
  enterBleSysPatch();
  enterBleCpePatch();
  configureBlePatch();
}


x86 assembly (clang, -O0):
<applyBlePatch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <enterBleSysPatch@plt>
mov    $0x0,%al
call   1030 <enterBleCpePatch@plt>
mov    $0x0,%al
call   1050 <configureBlePatch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<applyBlePatch>:
push   %rax
xor    %eax,%eax
call   1040 <enterBleSysPatch@plt>
xor    %eax,%eax
call   1030 <enterBleCpePatch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <configureBlePatch@plt>

LLVM IR (-O0):
define void @applyBlePatch() {
%1 = call i32 (...) @enterBleSysPatch()
%2 = call i32 (...) @enterBleCpePatch()
%3 = call i32 (...) @configureBlePatch()
ret void
}

LLVM IR (-O2):
define void @applyBlePatch() {
%1 = tail call i32 (...) @enterBleSysPatch()
%2 = tail call i32 (...) @enterBleCpePatch()
%3 = tail call i32 (...) @configureBlePatch()
ret void
}
/* Variables and functions */
char getchar();
char next_notblank() {
  static char ch;
  while ((ch = getchar()) == ' ' || ch == '\n')
    ;
  return ch;
}


x86 assembly (clang, -O0):
<next_notblank>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
jmp    111d <next_notblank+0xd>
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,0x2eff(%rip)
movsbl %al,%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x1(%rbp)
je     114b <next_notblank+0x3b>
movsbl 0x2ee7(%rip),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
test   $0x1,%al
jne    115b <next_notblank+0x4b>
jmp    1160 <next_notblank+0x50>
jmp    111d <next_notblank+0xd>
movsbl 0x2ec2(%rip),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_notblank>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%al
je     1120 <next_notblank+0x10>
cmp    $0x20,%al
je     1120 <next_notblank+0x10>
pop    %rcx
ret

LLVM IR (-O0):
@next_notblank.ch = internal global i8 0
define signext i8 @next_notblank() {
br label %1
1: ; preds = %11, %0
%2 = call signext i8 (...) @getchar()
store i8 %2, i8* @next_notblank.ch
%3 = sext i8 %2 to i32
%4 = icmp eq i32 %3, 32
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i8, i8* @next_notblank.ch
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 10
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ true, %1 ], [ %8, %5 ]
br i1 %10, label %11, label %12
11: ; preds = %9
br label %1
12: ; preds = %9
%13 = load i8, i8* @next_notblank.ch
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @next_notblank() {
br label %1
1: ; preds = %3, %0
%2 = tail call signext i8 (...) @getchar()
switch i8 %2, label %4 [
i8 32, label %3
i8 10, label %3
]
3: ; preds = %1, %1
br label %1
4: ; preds = %1
ret i8 %2
}
int direction(int n) {
  static int hold;
  if (hold == n)
    return 0;
  if (hold > n) {
    hold = n;
    return -1;
  }
  hold = n;
  return 1;
}


x86 assembly (clang, -O0):
<direction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    0x2f17(%rip),%eax
cmp    -0x8(%rbp),%eax
jne    1122 <direction+0x22>
movl   $0x0,-0x4(%rbp)
jmp    1156 <direction+0x56>
mov    0x2efc(%rip),%eax
cmp    -0x8(%rbp),%eax
jle    1146 <direction+0x46>
mov    -0x8(%rbp),%eax
mov    %eax,0x2eea(%rip)
movl   $0xffffffff,-0x4(%rbp)
jmp    1156 <direction+0x56>
mov    -0x8(%rbp),%eax
mov    %eax,0x2ed5(%rip)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<direction>:
xor    %eax,%eax
cmp    %edi,0x2f1c(%rip)
je     111b <direction+0x1b>
setle  %al
mov    %edi,0x2f11(%rip)
movzbl %al,%eax
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
@direction.hold = internal global i32 0
define i32 @direction(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* @direction.hold
%5 = load i32, i32* %3
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* @direction.hold
%10 = load i32, i32* %3
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i32, i32* %3
store i32 %13, i32* @direction.hold
store i32 -1, i32* %2
br label %16
14: ; preds = %8
%15 = load i32, i32* %3
store i32 %15, i32* @direction.hold
store i32 1, i32* %2
br label %16
16: ; preds = %14, %12, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@direction.hold = internal unnamed_addr global i32 0
define i32 @direction(i32 %0) {
%2 = load i32, i32* @direction.hold
%3 = icmp eq i32 %2, %0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = icmp sgt i32 %2, %0
store i32 %0, i32* @direction.hold
%6 = select i1 %5, i32 -1, i32 1
br label %7
7: ; preds = %4, %1
%8 = phi i32 [ 0, %1 ], [ %6, %4 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ IO_put_low_byte_hex(int);
int /*<<< orphan*/ IO_put_string(char const *);
void put_argument2(const char pre[], int byte, const char post[]) {
  IO_put_string(pre);
  IO_put_low_byte_hex(byte);
  IO_put_string(post);
}


x86 assembly (clang, -O0):
<put_argument2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <IO_put_string@plt>
mov    -0xc(%rbp),%edi
call   1040 <IO_put_low_byte_hex@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IO_put_string@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_argument2>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%ebp
call   1030 <IO_put_string@plt>
mov    %ebp,%edi
call   1040 <IO_put_low_byte_hex@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <IO_put_string@plt>

LLVM IR (-O0):
define void @put_argument2(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = call i32 @IO_put_string(i8* %7)
%9 = load i32, i32* %5
%10 = call i32 @IO_put_low_byte_hex(i32 %9)
%11 = load i8*, i8** %6
%12 = call i32 @IO_put_string(i8* %11)
ret void
}

LLVM IR (-O2):
define void @put_argument2(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @IO_put_string(i8* %0)
%5 = tail call i32 @IO_put_low_byte_hex(i32 %1)
%6 = tail call i32 @IO_put_string(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void PrintNestedDependency(void) {
  fprintf(stderr, "Hello World Dependency of a Dependency!\n");
}


x86 assembly (clang, -O0):
<PrintNestedDependency>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintNestedDependency>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [41 x i8] c"Hello World Dependency of a Dependency!\0A\00"
define void @PrintNestedDependency() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [41 x i8] c"Hello World Dependency of a Dependency!\0A\00"
define void @PrintNestedDependency() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}
void test(int x) { test(x + 1); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1100 <test>

LLVM IR (-O0):
define void @test(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret void
}

LLVM IR (-O2):
define void @test(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int tolower(int);
__attribute__((__weak__, __always___)) int softboundmpx_tolower(int c) {
  return tolower(c);
}


x86 assembly (clang, -O0):
<softboundmpx_tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <tolower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_tolower>:
jmp    1030 <tolower@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @tolower(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define weak i32 @softboundmpx_tolower(i32 %0) {
%2 = tail call i32 @tolower(i32 %0)
ret i32 %2
}