xunge/DecIR huggingface dataset:
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
long syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
             int, int, unsigned long);
long perf_event_open(struct perf_event_attr *hwevent, pid_t pid, int cpu,
                     int groupfd, unsigned long flags) {
  return syscall(__NR_perf_event_open, hwevent, pid, cpu, groupfd, flags);
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i64 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load i32, i32* @__NR_perf_event_open
%12 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i64, i64* %10
%17 = call i64 @syscall(i32 %11, %struct.perf_event_attr* %12, i32 %13, i32 %14, i32 %15, i64 %16)
ret i64 %17
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i64 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @__NR_perf_event_open
%7 = tail call i64 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
ret i64 %7
}
__attribute__((always_)) struct dst_entry *skb_dst(const struct sk_buff *skb) {}


x86 assembly (clang, -O0):
<skb_dst>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skb_dst>:
ret

LLVM IR (-O0):
%struct.dst_entry = type opaque
%struct.sk_buff = type opaque
define %struct.dst_entry* @skb_dst(%struct.sk_buff* %0) {
%2 = alloca %struct.dst_entry*
%3 = alloca %struct.sk_buff*
store %struct.sk_buff* %0, %struct.sk_buff** %3
%4 = load %struct.dst_entry*, %struct.dst_entry** %2
ret %struct.dst_entry* %4
}

LLVM IR (-O2):
%struct.dst_entry = type opaque
%struct.sk_buff = type opaque
define noalias %struct.dst_entry* @skb_dst(%struct.sk_buff* nocapture readnone %0) {
ret %struct.dst_entry* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, float);
int main(void) {
  float x = 2.55;
  double polynomial = 3 * (x * x * x) - 5 * (x * x) + 6;
  printf("3x^3 - 5x^2 + 6 = %f, for x = %f\n", polynomial, x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movss  0xee5(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
mulss  -0x8(%rbp),%xmm2
movss  0xebb(%rip),%xmm1
mulss  %xmm2,%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
movss  0xe9e(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  0xe8a(%rip),%xmm1
addss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
lea    0xe7c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef4(%rip),%rdi
movsd  0xee0(%rip),%xmm0
movss  0xee0(%rip),%xmm1
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"3x^3 - 5x^2 + 6 = %f, for x = %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca double
store i32 0, i32* %1
store float 0x4004666660000000, float* %2
%4 = load float, float* %2
%5 = load float, float* %2
%6 = fmul float %4, %5
%7 = load float, float* %2
%8 = fmul float %6, %7
%9 = load float, float* %2
%10 = load float, float* %2
%11 = fmul float %9, %10
%12 = fmul float 5.000000e+00, %11
%13 = fneg float %12
%14 = call float @llvm.fmuladd.f32(float 3.000000e+00, float %8, float %13)
%15 = fadd float %14, 6.000000e+00
%16 = fpext float %15 to double
store double %16, double* %3
%17 = load double, double* %3
%18 = load float, float* %2
%19 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), double %17, float %18)
ret i32 0
}

LLVM IR (-O2):
@.str = [34 x i8] c"3x^3 - 5x^2 + 6 = %f, for x = %f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), double 0x40373B4BA0000000, float 0x4004666660000000)
ret i32 0
}
/* Variables and functions */
int inputInt();
int isPrimer(int);
int /*<<< orphan*/ printf(char *, int, char *);
int main() {
  int a = inputInt();
  int r = isPrimer(a);
  printf("%d%s\n", a, (r ? " is primer!" : " is not primer!"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <inputInt@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isPrimer@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%ecx
lea    0xeb1(%rip),%rdx
lea    0xe9e(%rip),%rax
cmp    $0x0,%ecx
cmovne %rax,%rdx
lea    0xe8a(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <inputInt@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1030 <isPrimer@plt>
test   %eax,%eax
lea    0xec8(%rip),%rax
lea    0xeb5(%rip),%rdx
cmove  %rax,%rdx
lea    0xea4(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d%s\0A\00"
@.str.1 = [12 x i8] c" is primer!\00"
@.str.2 = [16 x i8] c" is not primer!\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @inputInt()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @isPrimer(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0)
%12 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %7, i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d%s\0A\00"
@.str.1 = [12 x i8] c" is primer!\00"
@.str.2 = [16 x i8] c" is not primer!\00"
define i32 @main() {
%1 = tail call i32 (...) @inputInt()
%2 = tail call i32 @isPrimer(i32 %1)
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %4)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void mmio_reg_write(uintptr_t ptr, uint32_t val) {
  volatile uint32_t *reg = (volatile uint32_t *)ptr;
  *reg = val;
}


x86 assembly (clang, -O0):
<mmio_reg_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmio_reg_write>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @mmio_reg_write(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32*
store i64 %0, i64* %3
store i32 %1, i32* %4
%6 = load i64, i64* %3
%7 = inttoptr i64 %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = load i32*, i32** %5
store volatile i32 %8, i32* %9
ret void
}

LLVM IR (-O2):
define void @mmio_reg_write(i64 %0, i32 %1) {
%3 = inttoptr i64 %0 to i32*
store volatile i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __console_tx_hex32(unsigned int);
void print_err_hex32(unsigned int value) { __console_tx_hex32(value); }


x86 assembly (clang, -O0):
<print_err_hex32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__console_tx_hex32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_err_hex32>:
jmp    1030 <__console_tx_hex32@plt>

LLVM IR (-O0):
define void @print_err_hex32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__console_tx_hex32(i32 %3)
ret void
}

LLVM IR (-O2):
define void @print_err_hex32(i32 %0) {
%2 = tail call i32 @__console_tx_hex32(i32 %0)
ret void
}
/* Variables and functions */
scalar_t__ always(int);
void infinite_FN() {
  int z;
  for (int i = 0; always(i); i++) {
    z += i;
  }
}


x86 assembly (clang, -O0):
<infinite_FN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <always@plt>
cmp    $0x0,%rax
je     1148 <infinite_FN+0x38>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111f <infinite_FN+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<infinite_FN>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <always@plt>
add    $0x1,%ebx
test   %rax,%rax
jne    1120 <infinite_FN+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @infinite_FN() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = call i64 @always(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i32, i32* %2
%9 = load i32, i32* %1
%10 = add nsw i32 %9, %8
store i32 %10, i32* %1
br label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @infinite_FN() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = tail call i64 @always(i32 %2)
%4 = icmp eq i64 %3, 0
%5 = add nuw nsw i32 %2, 1
br i1 %4, label %6, label %1
6: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit_if_app_is_offline();
scalar_t__ malloc(unsigned int);
int /*<<< orphan*/ read(int /*<<< orphan*/, char *, unsigned int);
char *read_native_message() {
  char bInLen[4];
  read(0, bInLen, 4);
  exit_if_app_is_offline();
  unsigned int inLen = *(unsigned int *)bInLen;
  char *inMsg = (char *)malloc(inLen);
  read(0, inMsg, inLen);
  return inMsg;
}


x86 assembly (clang, -O0):
<read_native_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rsi
xor    %edi,%edi
mov    $0x4,%edx
call   1040 <read@plt>
mov    $0x0,%al
call   1030 <exit_if_app_is_offline@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edx
xor    %edi,%edi
call   1040 <read@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_native_message>:
push   %rbp
push   %rbx
push   %rax
lea    0x4(%rsp),%rsi
xor    %edi,%edi
mov    $0x4,%edx
call   1040 <read@plt>
xor    %eax,%eax
call   1030 <exit_if_app_is_offline@plt>
mov    0x4(%rsp),%ebp
mov    %ebp,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
mov    %rax,%rsi
mov    %ebp,%edx
call   1040 <read@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @read_native_message() {
%1 = alloca [4 x i8]
%2 = alloca i32
%3 = alloca i8*
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%5 = call i32 @read(i32 0, i8* %4, i32 4)
%6 = call i32 (...) @exit_if_app_is_offline()
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %3
%13 = load i8*, i8** %3
%14 = load i32, i32* %2
%15 = call i32 @read(i32 0, i8* %13, i32 %14)
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @read_native_message() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @read(i32 0, i8* %2, i32 4)
%4 = tail call i32 (...) @exit_if_app_is_offline()
%5 = load i32, i32* %1
%6 = tail call i64 @malloc(i32 %5)
%7 = inttoptr i64 %6 to i8*
%8 = tail call i32 @read(i32 0, i8* %7, i32 %5)
ret i8* %7
}
/* Variables and functions */
scalar_t__ sl_isdigit(int);
scalar_t__ sl_islower(int);
scalar_t__ sl_isupper(int);
int sl_isalnum(int c) {
  return sl_isdigit(c) || sl_isupper(c) || sl_islower(c);
}


x86 assembly (clang, -O0):
<sl_isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sl_isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1181 <sl_isalnum+0x51>
mov    -0x4(%rbp),%edi
call   1040 <sl_isupper@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1181 <sl_isalnum+0x51>
mov    -0x4(%rbp),%edi
call   1050 <sl_islower@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sl_isalnum>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1030 <sl_isdigit@plt>
mov    $0x1,%ebx
test   %rax,%rax
jne    115f <sl_isalnum+0x2f>
mov    %ebp,%edi
call   1040 <sl_isupper@plt>
test   %rax,%rax
jne    115f <sl_isalnum+0x2f>
mov    %ebp,%edi
call   1050 <sl_islower@plt>
xor    %ebx,%ebx
test   %rax,%rax
setne  %bl
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sl_isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @sl_isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @sl_isupper(i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = call i64 @sl_islower(i32 %11)
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @sl_isalnum(i32 %0) {
%2 = tail call i64 @sl_isdigit(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i64 @sl_isupper(i32 %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = tail call i64 @sl_islower(i32 %0)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %4 ], [ 1, %1 ], [ %10, %7 ]
ret i32 %12
}
void GpioPinMuxSetup(unsigned int offsetAddr, unsigned int padConfValue) {
  (*((volatile unsigned int *)((0x44E10000) + offsetAddr))) = (padConfValue);
}


x86 assembly (clang, -O0):
<GpioPinMuxSetup>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x44e10000,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GpioPinMuxSetup>:
add    $0x44e10000,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GpioPinMuxSetup(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 1155596288, %6
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @GpioPinMuxSetup(i32 %0, i32 %1) {
%3 = add i32 %0, 1155596288
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
int vmmouse_uses_kernel_driver(void) { return 0; }


x86 assembly (clang, -O0):
<vmmouse_uses_kernel_driver>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmmouse_uses_kernel_driver>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vmmouse_uses_kernel_driver() {
ret i32 0
}

LLVM IR (-O2):
define i32 @vmmouse_uses_kernel_driver() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ remove(char const *);
int slate_RemoveFile(const char *path) { return !remove(path); }


x86 assembly (clang, -O0):
<slate_RemoveFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <remove@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slate_RemoveFile>:
push   %rax
call   1030 <remove@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @slate_RemoveFile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @remove(i8* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @slate_RemoveFile(i8* nocapture %0) {
%2 = tail call i32 @remove(i8* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void foo(void) {
  const char *a = "<xml>"
                  "<data Parent=\"%d\" Name=\"%s\">"
                  "<Child Id=\"%d\"/>"
                  "</data>"
                  "</xml>";
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
@.str = [63 x i8] c"<xml><data Parent=\22%d\22 Name=\22%s\22><Child Id=\22%d\22/></data></xml>\00"
define void @foo() {
%1 = alloca i8*
store i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0), i8** %1
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void Error() {
  printf("sorry something bad append :\\ \n");
  exit(1);
}


x86 assembly (clang, -O0):
<Error>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<Error>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"sorry something bad append :\\ \0A\00"
define void @Error() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [31 x i8] c"sorry something bad append :\\ \00"
define void @Error() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ func4(int);
int func5(int f, int d) {
  int i = 0;
  char *random = "random";
  i = i + f;
  func4(i);
  return i;
}


x86 assembly (clang, -O0):
<func5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    0xed4(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <func4@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func5>:
push   %rbx
mov    %edi,%ebx
call   1030 <func4@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"random\00"
define i32 @func5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = call i32 @func4(i32 %10)
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @func5(i32 returned %0, i32 %1) {
%3 = tail call i32 @func4(i32 %0)
ret i32 %0
}
/* Variables and functions */
int printf(char *, char const *);
int printInfo(const char *message) {
  int ret = 0;
  ret = printf("INFO : %s", message);
  return ret;
}


x86 assembly (clang, -O0):
<printInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printInfo>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"INFO : %s\00"
define i32 @printInfo(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
@.str = [10 x i8] c"INFO : %s\00"
define i32 @printInfo(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xcd() {
  Assert_real((ispunct(205) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              1030, ("ispunct should be 0 for 0xcd"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xcd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xcd,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x406,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xcd>:
push   %rax
mov    $0xcd,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x406,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xcd\00"
define void @t_ispunct_0xcd() {
%1 = call i64 @ispunct(i32 205)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1030, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xcd\00"
define void @t_ispunct_0xcd() {
%1 = tail call i64 @ispunct(i32 205)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1030, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XFreeModifiermap() {
  printf("XFreeModifiermap called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XFreeModifiermap>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XFreeModifiermap>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"XFreeModifiermap called\0A\00"
define i32 @XFreeModifiermap() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [24 x i8] c"XFreeModifiermap called\00"
define i32 @XFreeModifiermap() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void gtk_tree_view_create_row_drag_icon() {}


x86 assembly (clang, -O0):
<gtk_tree_view_create_row_drag_icon>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_create_row_drag_icon>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_create_row_drag_icon() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_create_row_drag_icon() {
ret void
}
int g(int x) {
  if (x == 0)
    return 1;
  else
    return g(g(x - 1) - 1);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <g+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1149 <g+0x39>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <g@plt>
mov    %eax,%edi
sub    $0x1,%edi
call   1030 <g@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @g(i32 %9)
%11 = sub nsw i32 %10, 1
%12 = call i32 @g(i32 %11)
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
ret i32 1
}
/* Type definitions */
struct gmi_model {
  int dummy;
};
struct gmi_iter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct gmi_iter *);
void gmi_base_end(struct gmi_model *m, struct gmi_iter *i) {
  (void)m;
  free(i);
}


x86 assembly (clang, -O0):
<gmi_base_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gmi_base_end>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.gmi_model = type { i32 }
%struct.gmi_iter = type { i32 }
define void @gmi_base_end(%struct.gmi_model* %0, %struct.gmi_iter* %1) {
%3 = alloca %struct.gmi_model*
%4 = alloca %struct.gmi_iter*
store %struct.gmi_model* %0, %struct.gmi_model** %3
store %struct.gmi_iter* %1, %struct.gmi_iter** %4
%5 = load %struct.gmi_model*, %struct.gmi_model** %3
%6 = load %struct.gmi_iter*, %struct.gmi_iter** %4
%7 = call i32 @free(%struct.gmi_iter* %6)
ret void
}

LLVM IR (-O2):
%struct.gmi_model = type { i32 }
%struct.gmi_iter = type { i32 }
define void @gmi_base_end(%struct.gmi_model* nocapture readnone %0, %struct.gmi_iter* nocapture %1) {
%3 = tail call i32 @free(%struct.gmi_iter* %1)
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t SysCtlResetBehaviorGet(void) {
  return ((*((volatile unsigned long *)(0x400FE1D8))));
}


x86 assembly (clang, -O0):
<SysCtlResetBehaviorGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fe1d8,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlResetBehaviorGet>:
mov    0x400fe1d8,%rax
40
ret

LLVM IR (-O0):
define i64 @SysCtlResetBehaviorGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074782680 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @SysCtlResetBehaviorGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074782680 to i64*)
ret i64 %1
}
int test_imm_73int16_mem(short *val) {
  return ((*val) & (0x73 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_73int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x73,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_73int16_mem>:
testb  $0x73,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_73int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 115
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_73int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 115
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void freeWords(const int num, char **arr) {
  for (int i = 0; i < num; i++) {
    free(arr[i]);
  }
}


x86 assembly (clang, -O0):
<freeWords>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1151 <freeWords+0x41>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <freeWords+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeWords>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1142 <freeWords+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <freeWords+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @freeWords(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @free(i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @freeWords(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i32 @free(i8* %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
void *malloc(size_t size) { return (void *)0xdeadbeef; }


x86 assembly (clang, -O0):
<malloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xdeadbeef,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc>:
mov    $0xdeadbeef,%eax
ret

LLVM IR (-O0):
define i8* @malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i8* inttoptr (i64 3735928559 to i8*)
}

LLVM IR (-O2):
define i8* @malloc(i64 %0) {
ret i8* inttoptr (i64 3735928559 to i8*)
}
/* Variables and functions */
int _mx_strbeginswithany(char *, char **, char **, int /*<<< orphan*/);
int mx_strbeginswithany(char *str, char **starts, char **endptr) {
  return _mx_strbeginswithany(str, starts, endptr, 0);
}


x86 assembly (clang, -O0):
<mx_strbeginswithany>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <_mx_strbeginswithany@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mx_strbeginswithany>:
xor    %ecx,%ecx
jmp    1030 <_mx_strbeginswithany@plt>

LLVM IR (-O0):
define i32 @mx_strbeginswithany(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i8**, i8*** %6
%10 = call i32 @_mx_strbeginswithany(i8* %7, i8** %8, i8** %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @mx_strbeginswithany(i8* %0, i8** %1, i8** %2) {
%4 = tail call i32 @_mx_strbeginswithany(i8* %0, i8** %1, i8** %2, i32 0)
ret i32 %4
}
void fd162(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    p024A:
      goto p024A;
      goto a;
    a:
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd162>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd162+0x7>

x86 assembly (clang, -O2):
<fd162>:
jmp    1100 <fd162>

LLVM IR (-O0):
define void @fd162(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; No predecessors!
br label %32
32: ; preds = %32, %31
br label %32
33: ; No predecessors!
%34 = load i32, i32* %2
%35 = zext i32 %34 to i64
br label %36
36: ; preds = %36, %33
br label %36
37: ; preds = %37
br label %37
38: ; No predecessors!
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
br label %41
41: ; preds = %41, %38
br label %41
42: ; preds = %42
br label %42
43: ; No predecessors!
%44 = load i32, i32* %2
%45 = zext i32 %44 to i64
br label %46
46: ; preds = %46, %43
br label %46
47: ; preds = %47
br label %47
}

LLVM IR (-O2):
define void @fd162(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ task_deassert_flag(int, int);
void task_deassert_root(int id) { task_deassert_flag(id, (1 << 6)); }


x86 assembly (clang, -O0):
<task_deassert_root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x40,%esi
call   1030 <task_deassert_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_deassert_root>:
mov    $0x40,%esi
jmp    1030 <task_deassert_flag@plt>

LLVM IR (-O0):
define void @task_deassert_root(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @task_deassert_flag(i32 %3, i32 64)
ret void
}

LLVM IR (-O2):
define void @task_deassert_root(i32 %0) {
%2 = tail call i32 @task_deassert_flag(i32 %0, i32 64)
ret void
}
int strlen1(char *str) {
  int len = 0, i;
  for (i = 0; str[i] != '\0'; ++i)
    len++;
  return len;
}


x86 assembly (clang, -O0):
<strlen1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1142 <strlen1+0x42>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <strlen1+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen1>:
cmpb   $0x0,(%rdi)
je     111c <strlen1+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen1+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen1(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %5
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %13
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @strlen1(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %6, %4 ], [ 0, %1 ]
%6 = add nuw nsw i64 %5, 1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %10, label %4
10: ; preds = %4
%11 = trunc i64 %6 to i32
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ 0, %1 ], [ %11, %10 ]
ret i32 %13
}
void nand_select(void) {
  (*((volatile unsigned long *)0x4E000004)) &= ~(1 << 1);
}


x86 assembly (clang, -O0):
<nand_select>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4e000004,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffd,%rcx
mov    $0x4e000004,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_select>:
andq   $0xfffffffffffffffd,0x4e000004
4e fd
ret

LLVM IR (-O0):
define void @nand_select() {
%1 = load volatile i64, i64* inttoptr (i64 1308622852 to i64*)
%2 = and i64 %1, -3
store volatile i64 %2, i64* inttoptr (i64 1308622852 to i64*)
ret void
}

LLVM IR (-O2):
define void @nand_select() {
%1 = load volatile i64, i64* inttoptr (i64 1308622852 to i64*)
%2 = and i64 %1, -3
store volatile i64 %2, i64* inttoptr (i64 1308622852 to i64*)
ret void
}
int is_macmod_hmove(int x) {
  return (x == 0) || (x == 8) || (x == 4) || (x == 12) || (x == 2) ||
         (x == 6) || (x == 1) || (x == 9) || (x == 11);
}


x86 assembly (clang, -O0):
<is_macmod_hmove>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0x8,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0x4,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0xc,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0x2,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0x6,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1189 <is_macmod_hmove+0x89>
cmpl   $0xb,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_macmod_hmove>:
cmp    $0xd,%edi
jae    1114 <is_macmod_hmove+0x14>
mov    $0x1,%eax
mov    $0x1357,%ecx
bt     %edi,%ecx
jb     111c <is_macmod_hmove+0x1c>
xor    %eax,%eax
cmp    $0xb,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_macmod_hmove(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %29, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 8
br i1 %7, label %29, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 4
br i1 %10, label %29, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 12
br i1 %13, label %29, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 2
br i1 %16, label %29, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 6
br i1 %19, label %29, label %20
20: ; preds = %17
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 1
br i1 %22, label %29, label %23
23: ; preds = %20
%24 = load i32, i32* %2
%25 = icmp eq i32 %24, 9
br i1 %25, label %29, label %26
26: ; preds = %23
%27 = load i32, i32* %2
%28 = icmp eq i32 %27, 11
br label %29
29: ; preds = %26, %23, %20, %17, %14, %11, %8, %5, %1
%30 = phi i1 [ true, %23 ], [ true, %20 ], [ true, %17 ], [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %28, %26 ]
%31 = zext i1 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @is_macmod_hmove(i32 %0) {
%2 = icmp ult i32 %0, 13
br i1 %2, label %6, label %3
3: ; preds = %6, %1
%4 = icmp eq i32 %0, 11
%5 = zext i1 %4 to i32
br label %11
6: ; preds = %1
%7 = trunc i32 %0 to i16
%8 = lshr i16 4951, %7
%9 = and i16 %8, 1
%10 = icmp eq i16 %9, 0
br i1 %10, label %3, label %11
11: ; preds = %6, %3
%12 = phi i32 [ %5, %3 ], [ 1, %6 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_set1_pi8(char);
__m64 test_mm_set1_pi8(char a) { return _mm_set1_pi8(a); }


x86 assembly (clang, -O0):
<test_mm_set1_pi8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <_mm_set1_pi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_set1_pi8>:
jmp    1030 <_mm_set1_pi8@plt>

LLVM IR (-O0):
define i32 @test_mm_set1_pi8(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @_mm_set1_pi8(i8 signext %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_set1_pi8(i8 signext %0) {
%2 = tail call i32 @_mm_set1_pi8(i8 signext %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ stack_swap(int *, int *);
void sort2(int *x, int *y) {
  if (*x > *y)
    stack_swap(x, y);
}


x86 assembly (clang, -O0):
<sort2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
jle    113f <sort2+0x2f>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stack_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort2>:
mov    (%rdi),%eax
cmp    (%rsi),%eax
jle    111b <sort2+0xb>
jmp    1030 <stack_swap@plt>
ret

LLVM IR (-O0):
define void @sort2(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = icmp sgt i32 %6, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32*, i32** %3
%12 = load i32*, i32** %4
%13 = call i32 @stack_swap(i32* %11, i32* %12)
br label %14
14: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
define void @sort2(i32* %0, i32* %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp sgt i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @stack_swap(i32* %0, i32* %1)
br label %8
8: ; preds = %6, %2
ret void
}
extern int serverSupportsShapes(void) { return 0; }


x86 assembly (clang, -O0):
<serverSupportsShapes>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<serverSupportsShapes>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @serverSupportsShapes() {
ret i32 0
}

LLVM IR (-O2):
define i32 @serverSupportsShapes() {
ret i32 0
}
/* Type definitions */
struct queue {
  int dummy;
};

/* Variables and functions */
struct queue *queue_new(int, int);
struct queue *queue_new_ptr(int size) {
  return queue_new(size, sizeof(void *));
}


x86 assembly (clang, -O0):
<queue_new_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1030 <queue_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<queue_new_ptr>:
mov    $0x8,%esi
jmp    1030 <queue_new@plt>

LLVM IR (-O0):
%struct.queue = type { i32 }
define %struct.queue* @queue_new_ptr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.queue* @queue_new(i32 %3, i32 8)
ret %struct.queue* %4
}

LLVM IR (-O2):
%struct.queue = type { i32 }
define %struct.queue* @queue_new_ptr(i32 %0) {
%2 = tail call %struct.queue* @queue_new(i32 %0, i32 8)
ret %struct.queue* %2
}
int x40_process_syn(struct mypacket *packet) { return 0; }


x86 assembly (clang, -O0):
<x40_process_syn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x40_process_syn>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mypacket = type opaque
define i32 @x40_process_syn(%struct.mypacket* %0) {
%2 = alloca %struct.mypacket*
store %struct.mypacket* %0, %struct.mypacket** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mypacket = type opaque
define i32 @x40_process_syn(%struct.mypacket* nocapture readnone %0) {
ret i32 0
}
void WatchdogEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<WatchdogEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x1,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogEnable>:
orq    $0x1,0x8(%rdi)
ret

LLVM IR (-O0):
define void @WatchdogEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 1
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @WatchdogEnable(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 1
store volatile i64 %5, i64* %3
ret void
}