xunge/DecIR huggingface dataset:
void nrom_end_mapper() { return; }


x86 assembly (clang, -O0):
<nrom_end_mapper>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrom_end_mapper>:
ret

LLVM IR (-O0):
define void @nrom_end_mapper() {
ret void
}

LLVM IR (-O2):
define void @nrom_end_mapper() {
ret void
}
/* Variables and functions */
double mean(double, double, double);
int /*<<< orphan*/ printf(char *, double, double, double, double);
int main(int argc, char *argv[]) {
  double v1, v2, v3, m;
  v1 = 5.2;
  v2 = 7.9;
  v3 = 3.4;
  m = mean(v1, v2, v3);
  printf("The mean of %3.2f, %3.2f and %3.2f is %3.2f\n", v1, v2, v3, m);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  0xed2(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xebd(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xea8(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm2
call   1040 <mean@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm2
movsd  -0x30(%rbp),%xmm3
lea    0xe87(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xed7(%rip),%xmm0
movsd  0xed7(%rip),%xmm1
movsd  0xed7(%rip),%xmm2
call   1040 <mean@plt>
movaps %xmm0,%xmm3
lea    0xed0(%rip),%rdi
movsd  0xeb0(%rip),%xmm0
movsd  0xeb0(%rip),%xmm1
movsd  0xeb0(%rip),%xmm2
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"The mean of %3.2f, %3.2f and %3.2f is %3.2f\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store double 5.200000e+00, double* %6
store double 7.900000e+00, double* %7
store double 3.400000e+00, double* %8
%10 = load double, double* %6
%11 = load double, double* %7
%12 = load double, double* %8
%13 = call double @mean(double %10, double %11, double %12)
store double %13, double* %9
%14 = load double, double* %6
%15 = load double, double* %7
%16 = load double, double* %8
%17 = load double, double* %9
%18 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), double %14, double %15, double %16, double %17)
ret i32 0
}

LLVM IR (-O2):
@.str = [45 x i8] c"The mean of %3.2f, %3.2f and %3.2f is %3.2f\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call double @mean(double 5.200000e+00, double 7.900000e+00, double 3.400000e+00)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), double 5.200000e+00, double 7.900000e+00, double 3.400000e+00, double %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int daytime(char buf[]) {
  char *ctime();
  time_t now;
  (void)time(&now);
  sprintf(buf, "%s", ctime(&now));
}


x86 assembly (clang, -O0):
<daytime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
call   1040 <time@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x14(%rbp),%rdi
mov    $0x0,%al
call   1030 <ctime@plt>
mov    -0x20(%rbp),%rdi
mov    %rax,%rdx
lea    0xe9a(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<daytime>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1050 <time@plt>
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <ctime@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1030 <strcpy@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @daytime(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = call i32 @time(i32* %4)
%6 = load i8*, i8** %3
%7 = call i8* (i32*, ...) bitcast (i8* (...)* @ctime to i8* (i32*, ...)*)(i32* %4)
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @daytime(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @time(i32* %2)
%5 = call i8* (i32*, ...) bitcast (i8* (...)* @ctime to i8* (i32*, ...)*)(i32* %2)
%6 = call i8* @strcpy(i8* dereferenceable(1) %0, i8* dereferenceable(1) %5)
ret i32 undef
}
int digimax_sound_machine_channels(void) { return 1; }


x86 assembly (clang, -O0):
<digimax_sound_machine_channels>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digimax_sound_machine_channels>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @digimax_sound_machine_channels() {
ret i32 1
}

LLVM IR (-O2):
define i32 @digimax_sound_machine_channels() {
ret i32 1
}
void INT_Excep_IRQ14(void) {}


x86 assembly (clang, -O0):
<INT_Excep_IRQ14>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_IRQ14>:
ret

LLVM IR (-O0):
define void @INT_Excep_IRQ14() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_IRQ14() {
ret void
}
void sync_after_acquire(void) {}


x86 assembly (clang, -O0):
<sync_after_acquire>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_after_acquire>:
ret

LLVM IR (-O0):
define void @sync_after_acquire() {
ret void
}

LLVM IR (-O2):
define void @sync_after_acquire() {
ret void
}
/* Type definitions */
struct BX_Array {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BX_Array_Del(struct BX_Array *);
int /*<<< orphan*/ free(struct BX_Array **);
void _free_arrays(size_t n, struct BX_Array **arrays) {
  for (size_t i = 0; i < n; ++i)
    BX_Array_Del(arrays[i]);
  free(arrays);
}


x86 assembly (clang, -O0):
<_free_arrays>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1168 <_free_arrays+0x48>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1040 <BX_Array_Del@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1138 <_free_arrays+0x18>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_free_arrays>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
test   %rdi,%rdi
je     1152 <_free_arrays+0x32>
mov    %rdi,%r15
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rdi
call   1040 <BX_Array_Del@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <_free_arrays+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.BX_Array = type { i32 }
define void @_free_arrays(i64 %0, %struct.BX_Array** %1) {
%3 = alloca i64
%4 = alloca %struct.BX_Array**
%5 = alloca i64
store i64 %0, i64* %3
store %struct.BX_Array** %1, %struct.BX_Array*** %4
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %3
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load %struct.BX_Array**, %struct.BX_Array*** %4
%12 = load i64, i64* %5
%13 = getelementptr inbounds %struct.BX_Array*, %struct.BX_Array** %11, i64 %12
%14 = load %struct.BX_Array*, %struct.BX_Array** %13
%15 = call i32 @BX_Array_Del(%struct.BX_Array* %14)
br label %16
16: ; preds = %10
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
%20 = load %struct.BX_Array**, %struct.BX_Array*** %4
%21 = call i32 @free(%struct.BX_Array** %20)
ret void
}

LLVM IR (-O2):
%struct.BX_Array = type { i32 }
define void @_free_arrays(i64 %0, %struct.BX_Array** nocapture %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %6, %2
%5 = tail call i32 @free(%struct.BX_Array** %1)
ret void
6: ; preds = %2, %6
%7 = phi i64 [ %11, %6 ], [ 0, %2 ]
%8 = getelementptr inbounds %struct.BX_Array*, %struct.BX_Array** %1, i64 %7
%9 = load %struct.BX_Array*, %struct.BX_Array** %8
%10 = tail call i32 @BX_Array_Del(%struct.BX_Array* %9)
%11 = add nuw i64 %7, 1
%12 = icmp eq i64 %11, %0
br i1 %12, label %4, label %6
}
int brain_atari(void) {
  int value = 0;
  return value;
}


x86 assembly (clang, -O0):
<brain_atari>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<brain_atari>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @brain_atari() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @brain_atari() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void *func23(void *param) {
  usleep(1000000);
  return NULL;
}


x86 assembly (clang, -O0):
<func23>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xf4240,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func23>:
push   %rax
mov    $0xf4240,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @func23(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @usleep(i32 1000000)
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @func23(i8* nocapture readnone %0) {
%2 = tail call i32 @usleep(i32 1000000)
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fgetc(int /*<<< orphan*/ *);
int /*<<< orphan*/ fputc(int /*<<< orphan*/, int /*<<< orphan*/ *);
void echo_1(FILE *in, FILE *out) { fputc(fgetc(in), out); }


x86 assembly (clang, -O0):
<echo_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1040 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<echo_1>:
push   %rbx
mov    %rsi,%rbx
call   1030 <fgetc@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <fputc@plt>

LLVM IR (-O0):
define void @echo_1(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = call i32 @fgetc(i32* %5)
%7 = load i32*, i32** %4
%8 = call i32 @fputc(i32 %6, i32* %7)
ret void
}

LLVM IR (-O2):
define void @echo_1(i32* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fgetc(i32* %0)
%4 = tail call i32 @fputc(i32 %3, i32* %1)
ret void
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
int /*<<< orphan*/ delay(int);
int main() {
  (*(volatile uint32_t *)(0x4002C0C8UL)) = 0UL;
  (*(volatile uint32_t *)((0x20098000UL) + 0x020)) |= (1UL << 18);
  while (true) {
    (*(volatile uint32_t *)((0x20098000UL) + 0x034)) |= (1UL << 18);
    delay(1000);
    (*(volatile uint32_t *)((0x20098000UL) + 0x034)) &= ~(1UL << 18);
    delay(1000);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4002c0c8,%eax
movq   $0x0,(%rax)
mov    $0x20098020,%eax
mov    (%rax),%rcx
or     $0x40000,%rcx
mov    $0x20098020,%eax
mov    %rcx,(%rax)
mov    $0x20098034,%eax
mov    (%rax),%rcx
or     $0x40000,%rcx
mov    %rcx,-0x18(%rbp)
mov    $0x20098034,%eax
mov    %rcx,(%rax)
mov    $0x3e8,%edi
call   1030 <delay@plt>
mov    $0x20098034,%eax
mov    (%rax),%rcx
and    $0xfffffffffffbffff,%rcx
mov    %rcx,-0x10(%rbp)
mov    $0x20098034,%eax
mov    %rcx,(%rax)
mov    $0x3e8,%edi
call   1030 <delay@plt>
jmp    1142 <main+0x32>

x86 assembly (clang, -O2):
<main>:
push   %rax
movq   $0x0,0x4002c0c8
orq    $0x40000,0x20098020
nopl   0x0(%rax)
orq    $0x40000,0x20098034
mov    $0x3e8,%edi
call   1030 <delay@plt>
andq   $0xfffffffffffbffff,0x20098034
20 ff ff fb ff
mov    $0x3e8,%edi
call   1030 <delay@plt>
jmp    1130 <main+0x20>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
store volatile i64 0, i64* inttoptr (i64 1073922248 to i64*)
%2 = load volatile i64, i64* inttoptr (i64 537493536 to i64*)
%3 = or i64 %2, 262144
store volatile i64 %3, i64* inttoptr (i64 537493536 to i64*)
br label %4
4: ; preds = %0, %4
%5 = load volatile i64, i64* inttoptr (i64 537493556 to i64*)
%6 = or i64 %5, 262144
store volatile i64 %6, i64* inttoptr (i64 537493556 to i64*)
%7 = call i32 @delay(i32 1000)
%8 = load volatile i64, i64* inttoptr (i64 537493556 to i64*)
%9 = and i64 %8, -262145
store volatile i64 %9, i64* inttoptr (i64 537493556 to i64*)
%10 = call i32 @delay(i32 1000)
br label %4
}

LLVM IR (-O2):
define i32 @main() {
store volatile i64 0, i64* inttoptr (i64 1073922248 to i64*)
%1 = load volatile i64, i64* inttoptr (i64 537493536 to i64*)
%2 = or i64 %1, 262144
store volatile i64 %2, i64* inttoptr (i64 537493536 to i64*)
br label %3
3: ; preds = %0, %3
%4 = load volatile i64, i64* inttoptr (i64 537493556 to i64*)
%5 = or i64 %4, 262144
store volatile i64 %5, i64* inttoptr (i64 537493556 to i64*)
%6 = tail call i32 @delay(i32 1000)
%7 = load volatile i64, i64* inttoptr (i64 537493556 to i64*)
%8 = and i64 %7, -262145
store volatile i64 %8, i64* inttoptr (i64 537493556 to i64*)
%9 = tail call i32 @delay(i32 1000)
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ cpuid_count(int, int, int *, int *, int *, int *);
int /*<<< orphan*/ support_avx512();
int support_avx512_bf16() {
  int eax, ebx, ecx, edx;
  int ret = 0;
  if (!support_avx512())
    return 0;
  cpuid_count(7, 1, &eax, &ebx, &ecx, &edx);
  if ((eax & 32) == 32) {
    ret = 1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<support_avx512_bf16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x18(%rbp)
mov    $0x0,%al
call   1040 <support_avx512@plt>
cmp    $0x0,%eax
jne    114b <support_avx512_bf16+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    1186 <support_avx512_bf16+0x66>
mov    $0x7,%edi
mov    $0x1,%esi
lea    -0x8(%rbp),%rdx
lea    -0xc(%rbp),%rcx
lea    -0x10(%rbp),%r8
lea    -0x14(%rbp),%r9
call   1030 <cpuid_count@plt>
mov    -0x8(%rbp),%eax
and    $0x20,%eax
cmp    $0x20,%eax
jne    1180 <support_avx512_bf16+0x60>
movl   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<support_avx512_bf16>:
push   %rbx
sub    $0x10,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <support_avx512@plt>
test   %eax,%eax
je     115c <support_avx512_bf16+0x3c>
mov    %rsp,%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
lea    0x4(%rsp),%r9
mov    $0x7,%edi
mov    $0x1,%esi
call   1030 <cpuid_count@plt>
mov    (%rsp),%ebx
shr    $0x5,%ebx
and    $0x1,%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @support_avx512_bf16() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %6
%7 = call i32 (...) @support_avx512()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 0, i32* %1
br label %18
10: ; preds = %0
%11 = call i32 @cpuid_count(i32 7, i32 1, i32* %2, i32* %3, i32* %4, i32* %5)
%12 = load i32, i32* %2
%13 = and i32 %12, 32
%14 = icmp eq i32 %13, 32
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 1, i32* %6
br label %16
16: ; preds = %15, %10
%17 = load i32, i32* %6
store i32 %17, i32* %1
br label %18
18: ; preds = %16, %9
%19 = load i32, i32* %1
ret i32 %19
}

LLVM IR (-O2):
define i32 @support_avx512_bf16() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = tail call i32 (...) @support_avx512()
%10 = icmp eq i32 %9, 0
br i1 %10, label %16, label %11
11: ; preds = %0
%12 = call i32 @cpuid_count(i32 7, i32 1, i32* %1, i32* %2, i32* %3, i32* %4)
%13 = load i32, i32* %1
%14 = lshr i32 %13, 5
%15 = and i32 %14, 1
br label %16
16: ; preds = %0, %11
%17 = phi i32 [ %15, %11 ], [ 0, %0 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int getMemoryCorrectSize(const int value) {
  if (value > 0)
    return (value);
  else {
    fprintf(stderr, "Incorrect memory size value\n");
    exit(EXIT_FAILURE);
  }
  return (0);
}


x86 assembly (clang, -O0):
<getMemoryCorrectSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113e <getMemoryCorrectSize+0x1e>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xeb2(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<getMemoryCorrectSize>:
test   %edi,%edi
jle    1127 <getMemoryCorrectSize+0x7>
mov    %edi,%eax
ret
push   %rax
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [29 x i8] c"Incorrect memory size value\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @getMemoryCorrectSize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
ret i32 %6
7: ; preds = %1
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @EXIT_FAILURE
%11 = call i32 @exit(i32 %10)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [29 x i8] c"Incorrect memory size value\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @getMemoryCorrectSize(i32 returned %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %4
3: ; preds = %1
ret i32 %0
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ isspace(char);
char *str_space(char *str) {
  while (*str != '\0' && !isspace(*str)) {
    str++;
  }
  return str;
}


x86 assembly (clang, -O0):
<str_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1148 <str_space+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1158 <str_space+0x48>
jmp    1169 <str_space+0x59>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <str_space+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_space>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1138 <str_space+0x28>
nopw   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <isspace@plt>
test   %eax,%eax
jne    1138 <str_space+0x28>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <str_space+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @str_space(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %16, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i32 @isspace(i8 signext %10)
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
br label %14
14: ; preds = %8, %3
%15 = phi i1 [ false, %3 ], [ %13, %8 ]
br i1 %15, label %16, label %19
16: ; preds = %14
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %3
19: ; preds = %14
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
define i8* @str_space(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8 [ %11, %9 ], [ %2, %1 ]
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = tail call i32 @isspace(i8 signext %5)
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %4 ]
ret i8* %14
}
/* Variables and functions */
scalar_t__ sin(double);
float fdegsin(float v) { return (float)sin((double)(v * 0.01745329252f)); }


x86 assembly (clang, -O0):
<fdegsin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xedb(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <sin@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdegsin>:
push   %rax
mulss  0xee7(%rip),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <sin@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fdegsin(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x3F91DF46A0000000
%5 = fpext float %4 to double
%6 = call i64 @sin(double %5)
%7 = sitofp i64 %6 to float
ret float %7
}

LLVM IR (-O2):
define float @fdegsin(float %0) {
%2 = fmul float %0, 0x3F91DF46A0000000
%3 = fpext float %2 to double
%4 = tail call i64 @sin(double %3)
%5 = sitofp i64 %4 to float
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ handle_command();
void mainloop() {
  while (1)
    handle_command();
}


x86 assembly (clang, -O0):
<mainloop>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <mainloop+0x9>
mov    $0x0,%al
call   1030 <handle_command@plt>
jmp    1119 <mainloop+0x9>

x86 assembly (clang, -O2):
<mainloop>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <handle_command@plt>
jmp    1120 <mainloop+0x10>

LLVM IR (-O0):
define void @mainloop() {
br label %1
1: ; preds = %0, %1
%2 = call i32 (...) @handle_command()
br label %1
}

LLVM IR (-O2):
define void @mainloop() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @handle_command()
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_PRINTABLESTRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_PRINTABLESTRING_it;
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void ASN1_PRINTABLESTRING_free(ASN1_PRINTABLESTRING *a) {
  ASN1_item_free((ASN1_VALUE *)a, &ASN1_PRINTABLESTRING_it);
}


x86 assembly (clang, -O0):
<ASN1_PRINTABLESTRING_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_PRINTABLESTRING_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@ASN1_PRINTABLESTRING_it = global i32 0
define void @ASN1_PRINTABLESTRING_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @ASN1_PRINTABLESTRING_it)
ret void
}

LLVM IR (-O2):
@ASN1_PRINTABLESTRING_it = global i32 0
define void @ASN1_PRINTABLESTRING_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @ASN1_PRINTABLESTRING_it)
ret void
}
unsigned int elfinmsbu16(unsigned char *bp) {
  unsigned int v;
  (v = ((bp)[0] << 8) | (bp)[1]);
  return v;
}


x86 assembly (clang, -O0):
<elfinmsbu16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<elfinmsbu16>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @elfinmsbu16(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl i32 %7, 8
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = or i32 %8, %12
store i32 %13, i32* %3
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @elfinmsbu16(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = or i32 %4, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int get_height_feet(void) {
  int value = 0.0;
  printf("Please enter Height (x Foot): ");
  scanf("%d", &value);
  return value;
}


x86 assembly (clang, -O0):
<get_height_feet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_height_feet>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [31 x i8] c"Please enter Height (x Foot): \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @get_height_feet() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [31 x i8] c"Please enter Height (x Foot): \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @get_height_feet() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
ret i32 %5
}
/* Variables and functions */
int ft_atoi(char *);
int /*<<< orphan*/ ft_putnbr(int);
void ft_sub(char *num1, char *num2) {
  int i_num1;
  int i_num2;
  i_num1 = ft_atoi(num1);
  i_num2 = ft_atoi(num2);
  ft_putnbr(i_num1 - i_num2);
}


x86 assembly (clang, -O0):
<ft_sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <ft_atoi@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
sub    -0x18(%rbp),%edi
call   1030 <ft_putnbr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_sub>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <ft_atoi@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <ft_atoi@plt>
sub    %eax,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ft_putnbr@plt>

LLVM IR (-O0):
define void @ft_sub(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @ft_atoi(i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %4
%10 = call i32 @ft_atoi(i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sub nsw i32 %11, %12
%14 = call i32 @ft_putnbr(i32 %13)
ret void
}

LLVM IR (-O2):
define void @ft_sub(i8* %0, i8* %1) {
%3 = tail call i32 @ft_atoi(i8* %0)
%4 = tail call i32 @ft_atoi(i8* %1)
%5 = sub nsw i32 %3, %4
%6 = tail call i32 @ft_putnbr(i32 %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int fread_unlocked(unsigned char *, int, int, int /*<<< orphan*/ *);
int fgetc_unlocked(FILE *file) {
  unsigned char result;
  if (fread_unlocked(&result, 1, 1, file) != 1) {
    return EOF;
  }
  return result;
}


x86 assembly (clang, -O0):
<fgetc_unlocked>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x11(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fread_unlocked@plt>
cmp    $0x1,%eax
je     114a <fgetc_unlocked+0x3a>
mov    0x2ea8(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1151 <fgetc_unlocked+0x41>
movzbl -0x11(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetc_unlocked>:
push   %rax
mov    %rdi,%rcx
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fread_unlocked@plt>
cmp    $0x1,%eax
je     1138 <fgetc_unlocked+0x28>
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret
movzbl 0x7(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @fgetc_unlocked(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = call i32 @fread_unlocked(i8* %4, i32 1, i32 1, i32* %5)
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* @EOF
store i32 %9, i32* %2
br label %13
10: ; preds = %1
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
store i32 %12, i32* %2
br label %13
13: ; preds = %10, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @fgetc_unlocked(i32* nocapture %0) {
%2 = alloca i8
%3 = call i32 @fread_unlocked(i8* %2, i32 1, i32 1, i32* %0)
%4 = icmp eq i32 %3, 1
%5 = load i32, i32* @EOF
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = select i1 %4, i32 %7, i32 %5
ret i32 %8
}
double mod2pi(double angle) {
  while (angle < 0.0)
    angle = angle + 6.2831853072;
  while (angle >= 6.2831853072)
    angle = angle - 6.2831853072;
  return angle;
}


x86 assembly (clang, -O0):
<mod2pi>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    112e <mod2pi+0x2e>
movsd  0xee1(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1109 <mod2pi+0x9>
jmp    1133 <mod2pi+0x33>
movsd  -0x8(%rbp),%xmm0
movsd  0xec0(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1165 <mod2pi+0x65>
movsd  -0x8(%rbp),%xmm0
movsd  0xea9(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1133 <mod2pi+0x33>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod2pi>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    112a <mod2pi+0x2a>
movsd  0xeee(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
addsd  %xmm2,%xmm0
ucomisd %xmm0,%xmm1
ja     1120 <mod2pi+0x20>
ucomisd 0xece(%rip),%xmm0
jb     115a <mod2pi+0x5a>
movsd  0xecc(%rip),%xmm1
movsd  0xebc(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
addsd  %xmm1,%xmm0
ucomisd %xmm2,%xmm0
jae    1150 <mod2pi+0x50>
ret

LLVM IR (-O0):
define double @mod2pi(double %0) {
%2 = alloca double
store double %0, double* %2
br label %3
3: ; preds = %6, %1
%4 = load double, double* %2
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load double, double* %2
%8 = fadd double %7, 0x401921FB544486E0
store double %8, double* %2
br label %3
9: ; preds = %3
br label %10
10: ; preds = %13, %9
%11 = load double, double* %2
%12 = fcmp oge double %11, 0x401921FB544486E0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load double, double* %2
%15 = fsub double %14, 0x401921FB544486E0
store double %15, double* %2
br label %10
16: ; preds = %10
%17 = load double, double* %2
ret double %17
}

LLVM IR (-O2):
define double @mod2pi(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %6, %1
%4 = phi double [ %0, %1 ], [ %8, %6 ]
%5 = fcmp ult double %4, 0x401921FB544486E0
br i1 %5, label %14, label %10
6: ; preds = %1, %6
%7 = phi double [ %8, %6 ], [ %0, %1 ]
%8 = fadd double %7, 0x401921FB544486E0
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %6, label %3
10: ; preds = %3, %10
%11 = phi double [ %12, %10 ], [ %4, %3 ]
%12 = fadd double %11, 0xC01921FB544486E0
%13 = fcmp ult double %12, 0x401921FB544486E0
br i1 %13, label %14, label %10
14: ; preds = %10, %3
%15 = phi double [ %4, %3 ], [ %12, %10 ]
ret double %15
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
char *strtok(char *, char *);
int IsItem(char *s, char **t) {
  register char *item;
  item = strtok(s, " \t\n\v\r");
  if (strcmp(item, "ITEM:"))
    return (0);
  *t = strtok(NULL, " \t\n\v\r");
  return (1);
}


x86 assembly (clang, -O0):
<IsItem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec5(%rip),%rsi
call   1040 <strtok@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    0xeb7(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     116a <IsItem+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    118b <IsItem+0x6b>
xor    %eax,%eax
mov    %eax,%edi
lea    0xe8b(%rip),%rsi
call   1040 <strtok@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsItem>:
push   %rbx
mov    %rsi,%rbx
lea    0xed5(%rip),%rsi
call   1040 <strtok@plt>
lea    0xecf(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     114b <IsItem+0x2b>
pop    %rbx
ret
lea    0xeae(%rip),%rsi
xor    %edi,%edi
call   1040 <strtok@plt>
mov    %rax,(%rbx)
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c" \09\0A\0B\0D\00"
@.str.1 = [6 x i8] c"ITEM:\00"
define i32 @IsItem(i8* %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8*
store i8* %0, i8** %4
store i8** %1, i8*** %5
%7 = load i8*, i8** %4
%8 = call i8* @strtok(i8* %7, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = call i64 @strcmp(i8* %9, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 0, i32* %3
br label %16
13: ; preds = %2
%14 = call i8* @strtok(i8* null, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%15 = load i8**, i8*** %5
store i8* %14, i8** %15
store i32 1, i32* %3
br label %16
16: ; preds = %13, %12
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [6 x i8] c" \09\0A\0B\0D\00"
@.str.1 = [6 x i8] c"ITEM:\00"
define i32 @IsItem(i8* %0, i8** nocapture writeonly %1) {
%3 = tail call i8* @strtok(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = tail call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i8* @strtok(i8* null, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i8* %7, i8** %1
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %9
}
int __attribute__((no)) bar(int x) { return x + 3; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    0x3(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 3
ret i32 %4
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = add nsw i32 %0, 3
ret i32 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void uDMAChannelEnable(uint32_t ui32ChannelNum) {
  ASSERT((ui32ChannelNum & 0xffff) < 32);
  (*((volatile uint32_t *)(0x400FF028))) = 1 << (ui32ChannelNum & 0x1f);
}


x86 assembly (clang, -O0):
<uDMAChannelEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
cmp    $0x20,%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x400ff028,%eax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAChannelEnable>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   $0xffe0,%ebx
sete   %dil
call   1030 <ASSERT@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
mov    %eax,0x400ff028
pop    %rbx
ret

LLVM IR (-O0):
define void @uDMAChannelEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65535
%5 = icmp slt i32 %4, 32
%6 = zext i1 %5 to i32
%7 = call i32 @ASSERT(i32 %6)
%8 = load i32, i32* %2
%9 = and i32 %8, 31
%10 = shl i32 1, %9
store volatile i32 %10, i32* inttoptr (i64 1074786344 to i32*)
ret void
}

LLVM IR (-O2):
define void @uDMAChannelEnable(i32 %0) {
%2 = and i32 %0, 65504
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = and i32 %0, 31
%7 = shl nuw i32 1, %6
store volatile i32 %7, i32* inttoptr (i64 1074786344 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ command(char *);
void say_yes() { command("Y\n"); }


x86 assembly (clang, -O0):
<say_yes>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<say_yes>:
lea    0xee9(%rip),%rdi
jmp    1030 <command@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"Y\0A\00"
define void @say_yes() {
%1 = call i32 @command(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"Y\0A\00"
define void @say_yes() {
%1 = tail call i32 @command(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
void f_int_p1(int f) { return; }


x86 assembly (clang, -O0):
<f_int_p1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_int_p1>:
ret

LLVM IR (-O0):
define void @f_int_p1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @f_int_p1(i32 %0) {
ret void
}
int kiGetCameras(int deviceType) { return 1; }


x86 assembly (clang, -O0):
<kiGetCameras>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kiGetCameras>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @kiGetCameras(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @kiGetCameras(i32 %0) {
ret i32 1
}
/* Type definitions */
struct timeval {
  unsigned int tv_sec;
  unsigned int tv_usec;
};

/* Variables and functions */
int select(int /*<<< orphan*/, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
           int /*<<< orphan*/ *, struct timeval *);
int goo_sleep(unsigned int s, unsigned int ms) {
  struct timeval delay;
  delay.tv_sec = s;
  delay.tv_usec = ms * 1000;
  return select(0, NULL, NULL, NULL, &delay);
}


x86 assembly (clang, -O0):
<goo_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%ecx
lea    -0x10(%rbp),%r8
mov    %rcx,%rsi
mov    %rcx,%rdx
call   1030 <select@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goo_sleep>:
push   %rax
mov    %edi,(%rsp)
imul   $0x3e8,%esi,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <select@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @goo_sleep(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.timeval
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
store i32 %6, i32* %7
%8 = load i32, i32* %4
%9 = mul i32 %8, 1000
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %5)
ret i32 %11
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @goo_sleep(i32 %0, i32 %1) {
%3 = alloca %struct.timeval
%4 = bitcast %struct.timeval* %3 to i8*
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 0
store i32 %0, i32* %5
%6 = mul i32 %1, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 1
store i32 %6, i32* %7
%8 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %3)
ret i32 %8
}
int is_builtin_dir(const char name[]) {
  return name[0] == '.' &&
         (name[1] == '\0' || (name[1] == '.' && name[2] == '\0'));
}


x86 assembly (clang, -O0):
<is_builtin_dir>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x2e,%ecx
mov    %al,-0x9(%rbp)
jne    1166 <is_builtin_dir+0x66>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0xa(%rbp)
je     1160 <is_builtin_dir+0x60>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%ecx
xor    %eax,%eax
cmp    $0x2e,%ecx
mov    %al,-0xb(%rbp)
jne    115a <is_builtin_dir+0x5a>
mov    -0x8(%rbp),%rax
movsbl 0x2(%rax),%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_builtin_dir>:
xor    %eax,%eax
cmpb   $0x2e,(%rdi)
jne    111c <is_builtin_dir+0x1c>
mov    0x1(%rdi),%cl
test   %cl,%cl
je     111d <is_builtin_dir+0x1d>
cmp    $0x2e,%cl
jne    111c <is_builtin_dir+0x1c>
xor    %eax,%eax
cmpb   $0x0,0x2(%rdi)
sete   %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_builtin_dir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 46
br i1 %7, label %8, label %30
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 0
br i1 %13, label %28, label %14
14: ; preds = %8
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 1
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 46
br i1 %19, label %20, label %26
20: ; preds = %14
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i64 2
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 0
br label %26
26: ; preds = %20, %14
%27 = phi i1 [ false, %14 ], [ %25, %20 ]
br label %28
28: ; preds = %26, %8
%29 = phi i1 [ true, %8 ], [ %27, %26 ]
br label %30
30: ; preds = %28, %1
%31 = phi i1 [ false, %1 ], [ %29, %28 ]
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @is_builtin_dir(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 46
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
switch i8 %6, label %12 [
i8 0, label %13
i8 46, label %7
]
7: ; preds = %4
%8 = getelementptr inbounds i8, i8* %0, i64 2
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
%11 = zext i1 %10 to i32
br label %13
12: ; preds = %4
br label %13
13: ; preds = %4, %12, %7, %1
%14 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %11, %7 ], [ 0, %12 ]
ret i32 %14
}
void gf8mul_00000101(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm7, %xmm3\n"
                       "\tpxor    %xmm7, %xmm1\n"
                       "\tpxor    %xmm7, %xmm0\n"
                       "\tpxor    %xmm6, %xmm7\n"
                       "\tpxor    %xmm6, %xmm5\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm6, %xmm3\n"
                       "\tpxor    %xmm6, %xmm0\n"
                       "\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm5, %xmm7\n"
                       "\tpxor    %xmm4, %xmm6\n"
                       "\tpxor    %xmm3, %xmm5\n"
                       "\tpxor    %xmm2, %xmm4\n"
                       "\tpxor    %xmm1, %xmm3\n"
                       "\tpxor    %xmm0, %xmm2\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm3
pxor   %xmm7,%xmm1
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm6,%xmm5
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm3
pxor   %xmm6,%xmm0
pxor   %xmm7,%xmm6
pxor   %xmm5,%xmm7
pxor   %xmm4,%xmm6
pxor   %xmm3,%xmm5
pxor   %xmm2,%xmm4
pxor   %xmm1,%xmm3
pxor   %xmm0,%xmm2
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm3
pxor   %xmm7,%xmm1
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm6,%xmm5
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm3
pxor   %xmm6,%xmm0
pxor   %xmm7,%xmm6
pxor   %xmm5,%xmm7
pxor   %xmm4,%xmm6
pxor   %xmm3,%xmm5
pxor   %xmm2,%xmm4
pxor   %xmm1,%xmm3
pxor   %xmm0,%xmm2
ret

LLVM IR (-O0):
define void @gf8mul_00000101() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00000101() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm6\0A\09pxor %xmm7, %xmm3\0A\09pxor %xmm7, %xmm1\0A\09pxor %xmm7, %xmm0\0A\09pxor %xmm6, %xmm7\0A\09pxor %xmm6, %xmm5\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm6, %xmm3\0A\09pxor %xmm6, %xmm0\0A\09pxor %xmm7, %xmm6\0A\09pxor %xmm5, %xmm7\0A\09pxor %xmm4, %xmm6\0A\09pxor %xmm3, %xmm5\0A\09pxor %xmm2, %xmm4\0A\09pxor %xmm1, %xmm3\0A\09pxor %xmm0, %xmm2\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void set_per_cpu_data(void *ptr) {
  __asm__ volatile("movq	%0, %%fs:0" : : "r"(ptr) : "memory");
}


x86 assembly (clang, -O0):
<set_per_cpu_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%fs:0x0
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_per_cpu_data>:
mov    %rdi,%fs:0x0
ret

LLVM IR (-O0):
define void @set_per_cpu_data(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @set_per_cpu_data(i8* %0) {
tail call void asm sideeffect "movq\09$0, %fs:0", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ window;
};
typedef TYPE_1__ XKeyReleasedEvent;

/* Variables and functions */
unsigned long get_XKeyReleasedEvent_window(void *_p) {
  return (unsigned long)((XKeyReleasedEvent *)_p)->window;
}


x86 assembly (clang, -O0):
<get_XKeyReleasedEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyReleasedEvent_window>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XKeyReleasedEvent_window(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XKeyReleasedEvent_window(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}