xunge/DecIR huggingface dataset:
/* Variables and functions */
bool has_vec128_not_avx() { return false; }


x86 assembly (clang, -O0):
<has_vec128_not_avx>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_vec128_not_avx>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @has_vec128_not_avx() {
ret i32 0
}

LLVM IR (-O2):
define i32 @has_vec128_not_avx() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_wspaces(int spaces, const char *name) {
  for (int s = 0; s < spaces; s++)
    printf(" ");
  printf("\\- %s\n", name);
}


x86 assembly (clang, -O0):
<print_wspaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114e <print_wspaces+0x3e>
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <print_wspaces+0x16>
mov    -0x10(%rbp),%rsi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_wspaces>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
test   %edi,%edi
jle    113f <print_wspaces+0x1f>
mov    %edi,%ebp
nopl   0x0(%rax)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebp
jne    1130 <print_wspaces+0x10>
lea    0xeba(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
@.str.1 = [7 x i8] c"\\- %s\0A\00"
define void @print_wspaces(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %12, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
br label %6
15: ; preds = %6
%16 = load i8*, i8** %4
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %16)
ret void
}

LLVM IR (-O2):
@.str.1 = [7 x i8] c"\\- %s\0A\00"
define void @print_wspaces(i32 %0, i8* %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %6, %2
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret void
6: ; preds = %2, %6
%7 = phi i32 [ %9, %6 ], [ 0, %2 ]
%8 = tail call i32 @putchar(i32 32)
%9 = add nuw nsw i32 %7, 1
%10 = icmp eq i32 %9, %0
br i1 %10, label %4, label %6
}
void ff_hevc_put_hevc_bi_epel_h6_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_h6_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_h6_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_h6_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_h6_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_relocation();
int main() {
  test_relocation();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_relocation@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_relocation@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_relocation()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_relocation()
ret i32 0
}
int abs(int x) {
  if (x < 0)
    x = -x;
  return x;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1119 <abs+0x19>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
store i32 %7, i32* %2
br label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ mchelp(char *);
void mcshowhelp(char *pgmname) {
  mchelp(pgmname);
  exit(0);
}


x86 assembly (clang, -O0):
<mcshowhelp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mchelp@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<mcshowhelp>:
push   %rax
call   1030 <mchelp@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @mcshowhelp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @mchelp(i8* %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @mcshowhelp(i8* %0) {
%2 = tail call i32 @mchelp(i8* %0)
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x41() {
  Assert_real((isalnum(65)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              330, ("isalnum should be 1 for A"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x41>:
push   %rbp
mov    %rsp,%rbp
mov    $0x41,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x14a,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x41>:
push   %rax
mov    $0x41,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x14a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for A\00"
define void @t_isalnum_0x41() {
%1 = call i32 @isalnum(i32 65)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 330, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for A\00"
define void @t_isalnum_0x41() {
%1 = tail call i32 @isalnum(i32 65)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 330, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR6E_set(void) { return U_WMRCORENONE_set("U_WMR6E"); }


x86 assembly (clang, -O0):
<U_WMR6E_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR6E_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR6E\00"
define i8* @U_WMR6E_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR6E\00"
define i8* @U_WMR6E_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef union fc_sockaddr {
  int dummy;
} fc_sockaddr;
struct genlist {
  int dummy;
};
struct fc_sockaddr_list {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_back(struct genlist const *);
union fc_sockaddr *fc_sockaddr_list_back(const struct fc_sockaddr_list *tthis) {
  return (union fc_sockaddr *)genlist_back((const struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<fc_sockaddr_list_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_back@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_sockaddr_list_back>:
jmp    1030 <genlist_back@plt>

LLVM IR (-O0):
%union.fc_sockaddr = type { i32 }
%struct.fc_sockaddr_list = type { i32 }
%struct.genlist = type { i32 }
define %union.fc_sockaddr* @fc_sockaddr_list_back(%struct.fc_sockaddr_list* %0) {
%2 = alloca %struct.fc_sockaddr_list*
store %struct.fc_sockaddr_list* %0, %struct.fc_sockaddr_list** %2
%3 = load %struct.fc_sockaddr_list*, %struct.fc_sockaddr_list** %2
%4 = bitcast %struct.fc_sockaddr_list* %3 to %struct.genlist*
%5 = call i64 @genlist_back(%struct.genlist* %4)
%6 = inttoptr i64 %5 to %union.fc_sockaddr*
ret %union.fc_sockaddr* %6
}

LLVM IR (-O2):
%union.fc_sockaddr = type { i32 }
%struct.fc_sockaddr_list = type { i32 }
%struct.genlist = type { i32 }
define %union.fc_sockaddr* @fc_sockaddr_list_back(%struct.fc_sockaddr_list* %0) {
%2 = bitcast %struct.fc_sockaddr_list* %0 to %struct.genlist*
%3 = tail call i64 @genlist_back(%struct.genlist* %2)
%4 = inttoptr i64 %3 to %union.fc_sockaddr*
ret %union.fc_sockaddr* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glRasterPos3iv(int /*<<< orphan*/ *);
void RasterPos3iv(GLint v[3]) { glRasterPos3iv(v); }


x86 assembly (clang, -O0):
<RasterPos3iv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glRasterPos3iv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterPos3iv>:
jmp    1030 <glRasterPos3iv@plt>

LLVM IR (-O0):
define void @RasterPos3iv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glRasterPos3iv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @RasterPos3iv(i32* %0) {
%2 = tail call i32 @glRasterPos3iv(i32* %0)
ret void
}
void lckResourceHandleLockIdInstanceDestructor(void *instance) {}


x86 assembly (clang, -O0):
<lckResourceHandleLockIdInstanceDestructor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lckResourceHandleLockIdInstanceDestructor>:
ret

LLVM IR (-O0):
define void @lckResourceHandleLockIdInstanceDestructor(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @lckResourceHandleLockIdInstanceDestructor(i8* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int c;
  while ((c = (getchar() != EOF)) != 0) {
    printf("%d", c);
  }
  printf("%d", c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2eab(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1168 <main+0x48>
mov    -0x8(%rbp),%esi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
mov    -0x8(%rbp),%esi
lea    0xe8e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb6(%rip),%r14
cmp    (%r14),%rax
je     1159 <main+0x39>
lea    0xec2(%rip),%rbx
xchg   %ax,%ax
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%r14),%rax
jne    1140 <main+0x20>
lea    0xea0(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %9, %0
%4 = call i64 (...) @getchar()
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
%7 = zext i1 %6 to i32
store i32 %7, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %3
12: ; preds = %3
%13 = load i32, i32* %2
%14 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i64 (...) @getchar()
%2 = load i64, i64* @EOF
%3 = icmp eq i64 %1, %2
br i1 %3, label %9, label %4
4: ; preds = %0, %4
%5 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 1)
%6 = tail call i64 (...) @getchar()
%7 = load i64, i64* @EOF
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %4
9: ; preds = %4, %0
%10 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
void wifi_evt_tcpip_dns_configuration(
    const struct wifi_msg_tcpip_dns_configuration_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_tcpip_dns_configuration>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_tcpip_dns_configuration>:
ret

LLVM IR (-O0):
%struct.wifi_msg_tcpip_dns_configuration_evt_t = type opaque
define void @wifi_evt_tcpip_dns_configuration(%struct.wifi_msg_tcpip_dns_configuration_evt_t* %0) {
%2 = alloca %struct.wifi_msg_tcpip_dns_configuration_evt_t*
store %struct.wifi_msg_tcpip_dns_configuration_evt_t* %0, %struct.wifi_msg_tcpip_dns_configuration_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_tcpip_dns_configuration_evt_t = type opaque
define void @wifi_evt_tcpip_dns_configuration(%struct.wifi_msg_tcpip_dns_configuration_evt_t* nocapture %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void QEIVelocityEnable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000000))) |= 0x00000020;
}


x86 assembly (clang, -O0):
<QEIVelocityEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     $0x20,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIVelocityEnable>:
orq    $0x20,(%rdi)
ret

LLVM IR (-O0):
define void @QEIVelocityEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 0
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 32
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @QEIVelocityEnable(i64 %0) {
%2 = inttoptr i64 %0 to i64*
%3 = load volatile i64, i64* %2
%4 = or i64 %3, 32
store volatile i64 %4, i64* %2
ret void
}
int test_imm_D8uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xD8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D8uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xd8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D8uint64_highword_reg>:
movabs $0xd800000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D8uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 216
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D8uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 927712935936
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int has_char(char *s, char c) {
  int i;
  i = 0;
  while (*s) {
    if (*s == c)
      return (i);
    s++;
    i++;
  }
  return (-1);
}


x86 assembly (clang, -O0):
<has_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115a <has_char+0x5a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    1140 <has_char+0x40>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <has_char+0x61>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <has_char+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_char>:
mov    (%rdi),%dl
mov    $0xffffffff,%eax
test   %dl,%dl
je     1122 <has_char+0x22>
xor    %ecx,%ecx
nopl   (%rax)
cmp    %sil,%dl
je     1123 <has_char+0x23>
movzbl 0x1(%rdi,%rcx,1),%edx
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <has_char+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @has_char(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 0, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %25
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8, i8* %5
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %20
18: ; preds = %11
%19 = load i32, i32* %6
store i32 %19, i32* %3
br label %26
20: ; preds = %11
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
%23 = load i32, i32* %6
%24 = add nsw i32 %23, 1
store i32 %24, i32* %6
br label %7
25: ; preds = %7
store i32 -1, i32* %3
br label %26
26: ; preds = %25, %18
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @has_char(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %10
%6 = phi i8 [ %13, %10 ], [ %3, %2 ]
%7 = phi i32 [ %12, %10 ], [ 0, %2 ]
%8 = phi i8* [ %11, %10 ], [ %0, %2 ]
%9 = icmp eq i8 %6, %1
br i1 %9, label %15, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = add nuw nsw i32 %7, 1
%13 = load i8, i8* %11
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %10, %2
%16 = phi i32 [ -1, %2 ], [ -1, %10 ], [ %7, %5 ]
ret i32 %16
}
int microfs_decompressor_data_init_noop(
    struct microfs_sb_info *sbi, void *dd,
    struct microfs_decompressor_data *data) {
  (void)sbi;
  (void)dd;
  (void)data;
  return 0;
}


x86 assembly (clang, -O0):
<microfs_decompressor_data_init_noop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<microfs_decompressor_data_init_noop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.microfs_sb_info = type opaque
%struct.microfs_decompressor_data = type opaque
define i32 @microfs_decompressor_data_init_noop(%struct.microfs_sb_info* %0, i8* %1, %struct.microfs_decompressor_data* %2) {
%4 = alloca %struct.microfs_sb_info*
%5 = alloca i8*
%6 = alloca %struct.microfs_decompressor_data*
store %struct.microfs_sb_info* %0, %struct.microfs_sb_info** %4
store i8* %1, i8** %5
store %struct.microfs_decompressor_data* %2, %struct.microfs_decompressor_data** %6
%7 = load %struct.microfs_sb_info*, %struct.microfs_sb_info** %4
%8 = load i8*, i8** %5
%9 = load %struct.microfs_decompressor_data*, %struct.microfs_decompressor_data** %6
ret i32 0
}

LLVM IR (-O2):
%struct.microfs_sb_info = type opaque
%struct.microfs_decompressor_data = type opaque
define i32 @microfs_decompressor_data_init_noop(%struct.microfs_sb_info* nocapture readnone %0, i8* nocapture readnone %1, %struct.microfs_decompressor_data* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void enet_free(void *memory) { free(memory); }


x86 assembly (clang, -O0):
<enet_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enet_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @enet_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @enet_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
long money_mul(long x, long y) { return ((x * y) / 100); }


x86 assembly (clang, -O0):
<money_mul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    $0x64,%ecx
cqto
idiv   %rcx
pop    %rbp
ret

x86 assembly (clang, -O2):
<money_mul>:
imul   %rsi,%rdi
movabs $0xa3d70a3d70a3d70b,%rcx
0a d7 a3
mov    %rdi,%rax
imul   %rcx
lea    (%rdx,%rdi,1),%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x6,%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @money_mul(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = mul nsw i64 %5, %6
%8 = sdiv i64 %7, 100
ret i64 %8
}

LLVM IR (-O2):
define i64 @money_mul(i64 %0, i64 %1) {
%3 = mul nsw i64 %1, %0
%4 = sdiv i64 %3, 100
ret i64 %4
}
/* Variables and functions */
size_t bellIndex(int, int);
int getBell(int *bellTri, int row, int col) {
  size_t index = bellIndex(row, col);
  return bellTri[index];
}


x86 assembly (clang, -O0):
<getBell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <bellIndex@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBell>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
mov    %edx,%esi
call   1030 <bellIndex@plt>
mov    (%rbx,%rax,4),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getBell(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i64 @bellIndex(i32 %8, i32 %9)
store i64 %10, i64* %7
%11 = load i32*, i32** %4
%12 = load i64, i64* %7
%13 = getelementptr inbounds i32, i32* %11, i64 %12
%14 = load i32, i32* %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @getBell(i32* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i64 @bellIndex(i32 %1, i32 %2)
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ strcasecmp(char const *, char const *);
int is_keyword(const char *s, const char *k) {
  return s && k && !strcasecmp(s, k);
}


x86 assembly (clang, -O0):
<is_keyword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
je     1158 <is_keyword+0x48>
xor    %eax,%eax
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     1158 <is_keyword+0x48>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_keyword>:
xor    %eax,%eax
test   %rdi,%rdi
je     112f <is_keyword+0x1f>
test   %rsi,%rsi
je     112f <is_keyword+0x1f>
push   %rax
call   1030 <strcasecmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @is_keyword(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i8*, i8** %3
%12 = load i8*, i8** %4
%13 = call i32 @strcasecmp(i8* %11, i8* %12)
%14 = icmp ne i32 %13, 0
%15 = xor i1 %14, true
br label %16
16: ; preds = %10, %7, %2
%17 = phi i1 [ false, %7 ], [ false, %2 ], [ %15, %10 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_keyword(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 @strcasecmp(i8* %0, i8* %1)
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %2
%11 = phi i32 [ 0, %2 ], [ %9, %6 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ work(int, int);
void wrong6(int n) {
#pragma omp parallel
  {
#pragma omp single
    {
      work(n, 0);
#pragma omp barrier
      work(n, 1);
    }
  }
}


x86 assembly (clang, -O0):
<wrong6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <work@plt>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <work@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrong6>:
push   %rbx
mov    %edi,%ebx
xor    %esi,%esi
call   1030 <work@plt>
mov    %ebx,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1030 <work@plt>

LLVM IR (-O0):
define void @wrong6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @work(i32 %3, i32 0)
%5 = load i32, i32* %2
%6 = call i32 @work(i32 %5, i32 1)
ret void
}

LLVM IR (-O2):
define void @wrong6(i32 %0) {
%2 = tail call i32 @work(i32 %0, i32 0)
%3 = tail call i32 @work(i32 %0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bwui2a(int, int, char *);
void bwi2a(int num, char *bf) {
  if (num < 0) {
    num = -num;
    *bf++ = '-';
  }
  bwui2a(num, 10, bf);
}


x86 assembly (clang, -O0):
<bwi2a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1143 <bwi2a+0x33>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x2d,(%rax)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0xa,%esi
call   1030 <bwui2a@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwi2a>:
mov    %rsi,%rdx
test   %edi,%edi
js     1121 <bwi2a+0x11>
mov    $0xa,%esi
jmp    1030 <bwui2a@plt>
neg    %edi
movb   $0x2d,(%rdx)
add    $0x1,%rdx
mov    $0xa,%esi
jmp    1030 <bwui2a@plt>

LLVM IR (-O0):
define void @bwi2a(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, i32* %3
%9 = sub nsw i32 0, %8
store i32 %9, i32* %3
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
store i8 45, i8* %10
br label %12
12: ; preds = %7, %2
%13 = load i32, i32* %3
%14 = load i8*, i8** %4
%15 = call i32 @bwui2a(i32 %13, i32 10, i8* %14)
ret void
}

LLVM IR (-O2):
define void @bwi2a(i32 %0, i8* %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = sub nsw i32 0, %0
%6 = getelementptr inbounds i8, i8* %1, i64 1
store i8 45, i8* %1
br label %7
7: ; preds = %4, %2
%8 = phi i32 [ %5, %4 ], [ %0, %2 ]
%9 = phi i8* [ %6, %4 ], [ %1, %2 ]
%10 = tail call i32 @bwui2a(i32 %8, i32 10, i8* %9)
ret void
}
void sigusrhandler(int p) { return; }


x86 assembly (clang, -O0):
<sigusrhandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigusrhandler>:
ret

LLVM IR (-O0):
define void @sigusrhandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sigusrhandler(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fexpect(char *, int, int, char);
void t5() {
  char s[] = "xyz";
  *s = 65;
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/"
          "pointer.c",
          30, 65, *s);
  ;
}


x86 assembly (clang, -O0):
<t5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee2(%rip),%eax
mov    %eax,-0x4(%rbp)
movb   $0x41,-0x4(%rbp)
lea    0xed8(%rip),%rdi
mov    $0x1e,%esi
mov    $0x41,%edx
movsbl -0x4(%rbp),%ecx
call   1030 <fexpect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t5>:
lea    0xee9(%rip),%rdi
mov    $0x1e,%esi
mov    $0x41,%edx
mov    $0x41,%ecx
jmp    1030 <fexpect@plt>

LLVM IR (-O0):
@__const.t5.s = [4 x i8] c"xyz\00"
@.str = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/pointer.c\00"
define void @t5() {
%1 = alloca [4 x i8]
%2 = bitcast [4 x i8]* %1 to i8*
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
store i8 65, i8* %3
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%5 = load i8, i8* %4
%6 = call i32 @fexpect(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 30, i32 65, i8 signext %5)
ret void
}

LLVM IR (-O2):
@.str = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/pointer.c\00"
define void @t5() {
%1 = tail call i32 @fexpect(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 30, i32 65, i8 signext 65)
ret void
}
void strdupthem(void *string) {
  printf("%s:%d: %s ("
         "%p->\"%s\""
         ")\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/joshuapena/cmps012b-wm-w15/refs/heads/"
         "master/mackey/labs/lab9c-voidstar-generic/examples/stringproc.c",
         17, __func__, string, *(char **)string);
  ;
  char **chars = (char **)string;
  *chars = strdup(*chars);
}


x86 assembly (clang, -O0):
<strdupthem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%r8
mov    -0x8(%rbp),%rax
mov    (%rax),%r9
lea    0xec2(%rip),%rdi
lea    0xed1(%rip),%rsi
mov    $0x11,%edx
lea    0xf85(%rip),%rcx
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1040 <strdup@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdupthem>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%r9
lea    0xed2(%rip),%rdi
lea    0xee1(%rip),%rsi
lea    0xf9a(%rip),%rcx
mov    $0x11,%edx
mov    %rbx,%r8
xor    %eax,%eax
call   1030 <printf@plt>
mov    (%rbx),%rdi
call   1040 <strdup@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"%s:%d: %s (%p->\22%s\22)\0A\00"
@.str.1 = [192 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/joshuapena/cmps012b-wm-w15/refs/heads/master/mackey/labs/lab9c-voidstar-generic/examples/stringproc.c\00"
@__func__.strdupthem = [11 x i8] c"strdupthem\00"
define void @strdupthem(i8* %0) {
%2 = alloca i8*
%3 = alloca i8**
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([192 x i8], [192 x i8]* @.str.1, i64 0, i64 0), i32 17, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.strdupthem, i64 0, i64 0), i8* %4, i8* %7)
%9 = load i8*, i8** %2
%10 = bitcast i8* %9 to i8**
store i8** %10, i8*** %3
%11 = load i8**, i8*** %3
%12 = load i8*, i8** %11
%13 = call i8* @strdup(i8* %12)
%14 = load i8**, i8*** %3
store i8* %13, i8** %14
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"%s:%d: %s (%p->\22%s\22)\0A\00"
@.str.1 = [192 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/joshuapena/cmps012b-wm-w15/refs/heads/master/mackey/labs/lab9c-voidstar-generic/examples/stringproc.c\00"
@__func__.strdupthem = [11 x i8] c"strdupthem\00"
define void @strdupthem(i8* %0) {
%2 = bitcast i8* %0 to i8**
%3 = load i8*, i8** %2
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([192 x i8], [192 x i8]* @.str.1, i64 0, i64 0), i32 17, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.strdupthem, i64 0, i64 0), i8* %0, i8* %3)
%5 = load i8*, i8** %2
%6 = tail call i8* @strdup(i8* %5)
store i8* %6, i8** %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glMaterialiv(unsigned int, unsigned int, int *);
void Materialiv(unsigned int f, unsigned int p, int v[4]) {
  glMaterialiv(f, p, v);
}


x86 assembly (clang, -O0):
<Materialiv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <glMaterialiv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Materialiv>:
jmp    1030 <glMaterialiv@plt>

LLVM IR (-O0):
define void @Materialiv(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i32 @glMaterialiv(i32 %7, i32 %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @Materialiv(i32 %0, i32 %1, i32* %2) {
%4 = tail call i32 @glMaterialiv(i32 %0, i32 %1, i32* %2)
ret void
}
/* Type definitions */
struct ptr_list {
  int dummy;
};
struct basic_block_list {
  int dummy;
};
struct basic_block {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ replace_ptr_list_entry(struct ptr_list **,
                                          struct basic_block *,
                                          struct basic_block *, int);
void replace_bb_in_list(struct basic_block_list **list, struct basic_block *old,
                        struct basic_block *new, int count) {
  replace_ptr_list_entry((struct ptr_list **)list, old, new, count);
}


x86 assembly (clang, -O0):
<replace_bb_in_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <replace_ptr_list_entry@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<replace_bb_in_list>:
jmp    1030 <replace_ptr_list_entry@plt>

LLVM IR (-O0):
%struct.basic_block_list = type { i32 }
%struct.basic_block = type { i32 }
%struct.ptr_list = type { i32 }
define void @replace_bb_in_list(%struct.basic_block_list** %0, %struct.basic_block* %1, %struct.basic_block* %2, i32 %3) {
%5 = alloca %struct.basic_block_list**
%6 = alloca %struct.basic_block*
%7 = alloca %struct.basic_block*
%8 = alloca i32
store %struct.basic_block_list** %0, %struct.basic_block_list*** %5
store %struct.basic_block* %1, %struct.basic_block** %6
store %struct.basic_block* %2, %struct.basic_block** %7
store i32 %3, i32* %8
%9 = load %struct.basic_block_list**, %struct.basic_block_list*** %5
%10 = bitcast %struct.basic_block_list** %9 to %struct.ptr_list**
%11 = load %struct.basic_block*, %struct.basic_block** %6
%12 = load %struct.basic_block*, %struct.basic_block** %7
%13 = load i32, i32* %8
%14 = call i32 @replace_ptr_list_entry(%struct.ptr_list** %10, %struct.basic_block* %11, %struct.basic_block* %12, i32 %13)
ret void
}

LLVM IR (-O2):
%struct.basic_block_list = type { i32 }
%struct.basic_block = type { i32 }
%struct.ptr_list = type { i32 }
define void @replace_bb_in_list(%struct.basic_block_list** %0, %struct.basic_block* %1, %struct.basic_block* %2, i32 %3) {
%5 = bitcast %struct.basic_block_list** %0 to %struct.ptr_list**
%6 = tail call i32 @replace_ptr_list_entry(%struct.ptr_list** %5, %struct.basic_block* %1, %struct.basic_block* %2, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(int *, int, int, int /*<<< orphan*/ *);
void ler_arquivo(int *vetor1, FILE *fp) {
  fread(vetor1, sizeof(int), 50000, fp);
  return;
}


x86 assembly (clang, -O0):
<ler_arquivo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x4,%esi
mov    $0xc350,%edx
call   1030 <fread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ler_arquivo>:
mov    %rsi,%rcx
mov    $0x4,%esi
mov    $0xc350,%edx
jmp    1030 <fread@plt>

LLVM IR (-O0):
define void @ler_arquivo(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @fread(i32* %5, i32 4, i32 50000, i32* %6)
ret void
}

LLVM IR (-O2):
define void @ler_arquivo(i32* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fread(i32* %0, i32 4, i32 50000, i32* %1)
ret void
}
void vdb_os_init() {}


x86 assembly (clang, -O0):
<vdb_os_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdb_os_init>:
ret

LLVM IR (-O0):
define void @vdb_os_init() {
ret void
}

LLVM IR (-O2):
define void @vdb_os_init() {
ret void
}
/* Type definitions */
struct timeval {
  float tv_sec;
  int tv_usec;
};

/* Variables and functions */
float timeval_diff(const struct timeval *a, const struct timeval *b) {
  return (a->tv_sec - b->tv_sec) + (a->tv_usec - b->tv_usec) / 1e6;
}


x86 assembly (clang, -O0):
<timeval_diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
subss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x10(%rbp),%rcx
sub    0x4(%rcx),%eax
cvtsi2sd %eax,%xmm1
movsd  0xec6(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_diff>:
movss  (%rdi),%xmm0
subss  (%rsi),%xmm0
mov    0x4(%rdi),%eax
sub    0x4(%rsi),%eax
cvtsi2sd %eax,%xmm1
divsd  0xee6(%rip),%xmm1
cvtss2sd %xmm0,%xmm0
addsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timeval = type { float, i32 }
define float @timeval_diff(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %3
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%7 = load float, float* %6
%8 = load %struct.timeval*, %struct.timeval** %4
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 0
%10 = load float, float* %9
%11 = fsub float %7, %10
%12 = fpext float %11 to double
%13 = load %struct.timeval*, %struct.timeval** %3
%14 = getelementptr inbounds %struct.timeval, %struct.timeval* %13, i32 0, i32 1
%15 = load i32, i32* %14
%16 = load %struct.timeval*, %struct.timeval** %4
%17 = getelementptr inbounds %struct.timeval, %struct.timeval* %16, i32 0, i32 1
%18 = load i32, i32* %17
%19 = sub nsw i32 %15, %18
%20 = sitofp i32 %19 to double
%21 = fdiv double %20, 1.000000e+06
%22 = fadd double %12, %21
%23 = fptrunc double %22 to float
ret float %23
}

LLVM IR (-O2):
%struct.timeval = type { float, i32 }
define float @timeval_diff(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%4 = load float, float* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%6 = load float, float* %5
%7 = fsub float %4, %6
%8 = fpext float %7 to double
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%10 = load i32, i32* %9
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%12 = load i32, i32* %11
%13 = sub nsw i32 %10, %12
%14 = sitofp i32 %13 to double
%15 = fdiv double %14, 1.000000e+06
%16 = fadd double %15, %8
%17 = fptrunc double %16 to float
ret float %17
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void fmul_preg32_dword(int reg32) {
  put8(0xD8);
  put8(0x08 + reg32);
}


x86 assembly (clang, -O0):
<fmul_preg32_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xd8,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
add    $0x8,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmul_preg32_dword>:
push   %rbx
mov    %edi,%ebx
mov    $0xd8,%edi
call   1030 <put8@plt>
add    $0x8,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @fmul_preg32_dword(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @put8(i32 216)
%4 = load i32, i32* %2
%5 = add nsw i32 8, %4
%6 = call i32 @put8(i32 %5)
ret void
}

LLVM IR (-O2):
define void @fmul_preg32_dword(i32 %0) {
%2 = tail call i32 @put8(i32 216)
%3 = add nsw i32 %0, 8
%4 = tail call i32 @put8(i32 %3)
ret void
}
void INT_Excep_MTU4_TCIV4(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU4_TCIV4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU4_TCIV4>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU4_TCIV4() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU4_TCIV4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SmcConn;
typedef int /*<<< orphan*/ SmPointer;

/* Variables and functions */
void session_save_complete(SmcConn smc_conn, SmPointer client_data) {}


x86 assembly (clang, -O0):
<session_save_complete>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<session_save_complete>:
ret

LLVM IR (-O0):
define void @session_save_complete(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @session_save_complete(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ scan_uint_capped(char *, int /*<<< orphan*/ *, int, int);
uint32_t scan_uint_defcap(char *ss, uint32_t *valp) {
  return scan_uint_capped(ss, valp, 0x7ffffffe / 10, 0x7ffffffe % 10);
}


x86 assembly (clang, -O0):
<scan_uint_defcap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xccccccc,%edx
mov    $0x6,%ecx
call   1030 <scan_uint_capped@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_uint_defcap>:
mov    $0xccccccc,%edx
mov    $0x6,%ecx
jmp    1030 <scan_uint_capped@plt>

LLVM IR (-O0):
define i32 @scan_uint_defcap(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @scan_uint_capped(i8* %5, i32* %6, i32 214748364, i32 6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @scan_uint_defcap(i8* %0, i32* %1) {
%3 = tail call i32 @scan_uint_capped(i8* %0, i32* %1, i32 214748364, i32 6)
ret i32 %3
}
unsigned zigzagenc32(int x) { return x << 1 ^ x >> 31; }


x86 assembly (clang, -O0):
<zigzagenc32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1f,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zigzagenc32>:
lea    (%rdi,%rdi,1),%eax
sar    $0x1f,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @zigzagenc32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = load i32, i32* %2
%6 = ashr i32 %5, 31
%7 = xor i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @zigzagenc32(i32 %0) {
%2 = shl i32 %0, 1
%3 = ashr i32 %0, 31
%4 = xor i32 %2, %3
ret i32 %4
}
int validChar(char c) {
  if (c == '+' || c == '-' || c == '<' || c == '>' || c == '[' || c == ']' ||
      c == '.') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<validChar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     1165 <validChar+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
je     1165 <validChar+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x3c,%eax
je     1165 <validChar+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x3e,%eax
je     1165 <validChar+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x5b,%eax
je     1165 <validChar+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x5d,%eax
je     1165 <validChar+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x2e,%eax
jne    1171 <validChar+0x71>
movl   $0x1,-0x4(%rbp)
jmp    1178 <validChar+0x78>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validChar>:
add    $0xd5,%dil
cmp    $0x32,%dil
ja     1124 <validChar+0x24>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x50000000a000d,%rdx
bt     %rcx,%rdx
jae    1124 <validChar+0x24>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @validChar(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 43
br i1 %6, label %31, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 45
br i1 %10, label %31, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 60
br i1 %14, label %31, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 62
br i1 %18, label %31, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 91
br i1 %22, label %31, label %23
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 93
br i1 %26, label %31, label %27
27: ; preds = %23
%28 = load i8, i8* %3
%29 = sext i8 %28 to i32
%30 = icmp eq i32 %29, 46
br i1 %30, label %31, label %32
31: ; preds = %27, %23, %19, %15, %11, %7, %1
store i32 1, i32* %2
br label %33
32: ; preds = %27
store i32 0, i32* %2
br label %33
33: ; preds = %32, %31
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @validChar(i8 signext %0) {
switch i8 %0, label %2 [
i8 93, label %3
i8 91, label %3
i8 62, label %3
i8 60, label %3
i8 46, label %3
i8 45, label %3
i8 43, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
unsigned long mf_sec2ticks(float secs, int division, unsigned int tempo) {
  return (long)(((secs * 1000.0) / 4.0 * division) / tempo);
}


x86 assembly (clang, -O0):
<mf_sec2ticks>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee0(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xedc(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
mov    -0xc(%rbp),%eax
cvtsi2sd %rax,%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mf_sec2ticks>:
cvtss2sd %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsi2sd %edi,%xmm1
mov    %esi,%eax
cvtsi2sd %rax,%xmm2
mulsd  %xmm0,%xmm1
divsd  %xmm2,%xmm1
cvttsd2si %xmm1,%rax
ret

LLVM IR (-O0):
define i64 @mf_sec2ticks(float %0, i32 %1, i32 %2) {
%4 = alloca float
%5 = alloca i32
%6 = alloca i32
store float %0, float* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load float, float* %4
%8 = fpext float %7 to double
%9 = fmul double %8, 1.000000e+03
%10 = fdiv double %9, 4.000000e+00
%11 = load i32, i32* %5
%12 = sitofp i32 %11 to double
%13 = fmul double %10, %12
%14 = load i32, i32* %6
%15 = uitofp i32 %14 to double
%16 = fdiv double %13, %15
%17 = fptosi double %16 to i64
ret i64 %17
}

LLVM IR (-O2):
define i64 @mf_sec2ticks(float %0, i32 %1, i32 %2) {
%4 = fpext float %0 to double
%5 = fmul double %4, 1.000000e+03
%6 = fmul double %5, 2.500000e-01
%7 = sitofp i32 %1 to double
%8 = fmul double %6, %7
%9 = uitofp i32 %2 to double
%10 = fdiv double %8, %9
%11 = fptosi double %10 to i64
ret i64 %11
}