xunge/DecIR huggingface dataset:
void UART0_Port_Init() {
  (*((volatile unsigned long *)0x7F008000)) &=
      ~((0xf << (0 * 4)) + (0xf << (1 * 4)));
  (*((volatile unsigned long *)0x7F008000)) |=
      ((2 << (0 * 4)) + (2 << (1 * 4)));
}


x86 assembly (clang, -O0):
<UART0_Port_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f008000,%eax
mov    (%rax),%rcx
and    $0xffffffffffffff00,%rcx
mov    $0x7f008000,%eax
mov    %rcx,(%rax)
mov    $0x7f008000,%eax
mov    (%rax),%rcx
or     $0x22,%rcx
mov    $0x7f008000,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART0_Port_Init>:
andq   $0xffffffffffffff00,0x7f008000
orq    $0x22,0x7f008000
7f 22
ret

LLVM IR (-O0):
define void @UART0_Port_Init() {
%1 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%2 = and i64 %1, -256
store volatile i64 %2, i64* inttoptr (i64 2130739200 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%4 = or i64 %3, 34
store volatile i64 %4, i64* inttoptr (i64 2130739200 to i64*)
ret void
}

LLVM IR (-O2):
define void @UART0_Port_Init() {
%1 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%2 = and i64 %1, -256
store volatile i64 %2, i64* inttoptr (i64 2130739200 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%4 = or i64 %3, 34
store volatile i64 %4, i64* inttoptr (i64 2130739200 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int mcfioC_OpenWriteSequential(char *device, char *label, char *title,
                               char *comment, int numevts_pred, int *blkIds,
                               unsigned int nBlocks) {
  fprintf(stderr,
          "mcfioC_OpenWriteSequential: Not available in this library. \n");
  return -1;
}


x86 assembly (clang, -O0):
<mcfioC_OpenWriteSequential>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9,-0x30(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
lea    0xebd(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcfioC_OpenWriteSequential>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [61 x i8] c"mcfioC_OpenWriteSequential: Not available in this library. \0A\00"
define i32 @mcfioC_OpenWriteSequential(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i32* %5, i32 %6) {
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i32
%13 = alloca i32*
%14 = alloca i32
store i8* %0, i8** %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i32 %4, i32* %12
store i32* %5, i32** %13
store i32 %6, i32* %14
%15 = load i32, i32* @stderr
%16 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [61 x i8] c"mcfioC_OpenWriteSequential: Not available in this library. \0A\00"
define i32 @mcfioC_OpenWriteSequential(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i32 %4, i32* nocapture readnone %5, i32 %6) {
%8 = load i32, i32* @stderr
%9 = tail call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
void Host_Throttle() {}


x86 assembly (clang, -O0):
<Host_Throttle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Host_Throttle>:
ret

LLVM IR (-O0):
define void @Host_Throttle() {
ret void
}

LLVM IR (-O2):
define void @Host_Throttle() {
ret void
}
int minim(int minval, int precval, int newval) {
  int sum = precval + newval;
  if (minval > sum) {
    return sum;
  } else {
    return minval;
  }
}


x86 assembly (clang, -O0):
<minim>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x14(%rbp),%eax
jle    112d <minim+0x2d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1133 <minim+0x33>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minim>:
lea    (%rsi,%rdx,1),%eax
cmp    %edi,%eax
cmovge %edi,%eax
ret

LLVM IR (-O0):
define i32 @minim(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = add nsw i32 %9, %10
store i32 %11, i32* %8
%12 = load i32, i32* %5
%13 = load i32, i32* %8
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %19
17: ; preds = %3
%18 = load i32, i32* %5
store i32 %18, i32* %4
br label %19
19: ; preds = %17, %15
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @minim(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, %1
%5 = icmp slt i32 %4, %0
%6 = select i1 %5, i32 %4, i32 %0
ret i32 %6
}
void rnl_clear(void) {}


x86 assembly (clang, -O0):
<rnl_clear>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnl_clear>:
ret

LLVM IR (-O0):
define void @rnl_clear() {
ret void
}

LLVM IR (-O2):
define void @rnl_clear() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printk(char *, unsigned long);
void report_clock(unsigned long cpuid) { printk("Clock:        %u\n", cpuid); }


x86 assembly (clang, -O0):
<report_clock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_clock>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printk@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Clock: %u\0A\00"
define void @report_clock(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @printk(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64 %3)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Clock: %u\0A\00"
define void @report_clock(i64 %0) {
%2 = tail call i32 @printk(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64 %0)
ret void
}
/* Variables and functions */
int listen(int, int);
int simpleSocketListen(int socketId, int pendingLimit) {
  return listen(socketId, pendingLimit);
}


x86 assembly (clang, -O0):
<simpleSocketListen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <listen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simpleSocketListen>:
jmp    1030 <listen@plt>

LLVM IR (-O0):
define i32 @simpleSocketListen(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @listen(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @simpleSocketListen(i32 %0, i32 %1) {
%3 = tail call i32 @listen(i32 %0, i32 %1)
ret i32 %3
}
void g_date_is_last_of_month() {}


x86 assembly (clang, -O0):
<g_date_is_last_of_month>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_date_is_last_of_month>:
ret

LLVM IR (-O0):
define void @g_date_is_last_of_month() {
ret void
}

LLVM IR (-O2):
define void @g_date_is_last_of_month() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char const *);
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void err_msg(const char *msg) {
  fprintf(stderr, "%s: %s\n", strerror(errno), msg);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<err_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0xc(%rbp),%edi
mov    %rax,%rdx
mov    -0x8(%rbp),%rcx
lea    0xe99(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e5d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err_msg>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea3(%rip),%rax
mov    (%rax),%ebp
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeac(%rip),%rsi
mov    %ebp,%edi
mov    %rax,%rdx
mov    %rbx,%rcx
call   1030 <fprintf@plt>
mov    0x2e68(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define void @err_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* @errno
%5 = call i8* @strerror(i32 %4)
%6 = load i8*, i8** %2
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define void @err_msg(i8* %0) {
%2 = load i32, i32* @stderr
%3 = load i32, i32* @errno
%4 = tail call i8* @strerror(i32 %3)
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %0)
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exec_btr(int, int, int);
void test_btr(void) {
  int i;
  for (i = 0; i < 32; i++)
    exec_btr(0x21ad3d34, 0x12345678, i);
  for (i = 0; i < 32; i++)
    exec_btr(0x813f3421, 0x82345678, i);
}


x86 assembly (clang, -O0):
<test_btr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x20,-0x4(%rbp)
jge    1149 <test_btr+0x39>
mov    -0x4(%rbp),%edx
mov    $0x21ad3d34,%edi
mov    $0x12345678,%esi
call   1030 <exec_btr@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <test_btr+0xf>
movl   $0x0,-0x4(%rbp)
cmpl   $0x20,-0x4(%rbp)
jge    117a <test_btr+0x6a>
mov    -0x4(%rbp),%edx
mov    $0x813f3421,%edi
mov    $0x82345678,%esi
call   1030 <exec_btr@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1150 <test_btr+0x40>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_btr>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x21ad3d34,%edi
mov    $0x12345678,%esi
mov    %ebx,%edx
call   1030 <exec_btr@plt>
add    $0x1,%ebx
cmp    $0x20,%ebx
jne    1120 <test_btr+0x10>
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    $0x813f3421,%edi
mov    $0x82345678,%esi
mov    %ebx,%edx
call   1030 <exec_btr@plt>
add    $0x1,%ebx
cmp    $0x20,%ebx
jne    1140 <test_btr+0x30>
pop    %rbx
ret

LLVM IR (-O0):
define void @test_btr() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 32
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @exec_btr(i32 565001524, i32 305419896, i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
store i32 0, i32* %1
br label %12
12: ; preds = %18, %11
%13 = load i32, i32* %1
%14 = icmp slt i32 %13, 32
br i1 %14, label %15, label %21
15: ; preds = %12
%16 = load i32, i32* %1
%17 = call i32 @exec_btr(i32 -2126564319, i32 -2110499208, i32 %16)
br label %18
18: ; preds = %15
%19 = load i32, i32* %1
%20 = add nsw i32 %19, 1
store i32 %20, i32* %1
br label %12
21: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @test_btr() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @exec_btr(i32 565001524, i32 305419896, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 32
br i1 %5, label %6, label %1
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ 0, %1 ]
%8 = tail call i32 @exec_btr(i32 -2126564319, i32 -2110499208, i32 %7)
%9 = add nuw nsw i32 %7, 1
%10 = icmp eq i32 %9, 32
br i1 %10, label %11, label %6
11: ; preds = %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ init_addrs();
int /*<<< orphan*/ prefetch_for_read();
int /*<<< orphan*/ prefetch_for_write();
int main() {
  init_addrs();
  prefetch_for_read();
  prefetch_for_write();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <init_addrs@plt>
mov    $0x0,%al
call   1040 <prefetch_for_read@plt>
mov    $0x0,%al
call   1060 <prefetch_for_write@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <init_addrs@plt>
xor    %eax,%eax
call   1040 <prefetch_for_read@plt>
xor    %eax,%eax
call   1060 <prefetch_for_write@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init_addrs()
%3 = call i32 (...) @prefetch_for_read()
%4 = call i32 (...) @prefetch_for_write()
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init_addrs()
%2 = tail call i32 (...) @prefetch_for_read()
%3 = tail call i32 (...) @prefetch_for_write()
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int f(int);
int h(int x, int y) {
  if (x != y)
    if (f(x) == x + 10)
      abort();
  return 0;
}


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
je     115c <h+0x3c>
mov    -0x4(%rbp),%edi
call   1040 <f@plt>
mov    -0x4(%rbp),%ecx
add    $0xa,%ecx
cmp    %ecx,%eax
jne    1157 <h+0x37>
mov    $0x0,%al
call   1030 <abort@plt>
jmp    115c <h+0x3c>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
push   %rbx
cmp    %esi,%edi
je     1133 <h+0x13>
mov    %edi,%ebx
call   1040 <f@plt>
add    $0xa,%ebx
cmp    %ebx,%eax
je     1137 <h+0x17>
xor    %eax,%eax
pop    %rbx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @h(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i32, i32* %3
%10 = call i32 @f(i32 %9)
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 10
%13 = icmp eq i32 %10, %12
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %8
br label %17
17: ; preds = %16, %2
ret i32 0
}

LLVM IR (-O2):
define i32 @h(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = tail call i32 @f(i32 %0)
%6 = add nsw i32 %0, 10
%7 = icmp eq i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %4, %2
ret i32 0
}
void Irc_Disconnect_f(void) {}


x86 assembly (clang, -O0):
<Irc_Disconnect_f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Irc_Disconnect_f>:
ret

LLVM IR (-O0):
define void @Irc_Disconnect_f() {
ret void
}

LLVM IR (-O2):
define void @Irc_Disconnect_f() {
ret void
}
void foo104(int p) {}


x86 assembly (clang, -O0):
<foo104>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo104>:
ret

LLVM IR (-O0):
define void @foo104(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo104(i32 %0) {
ret void
}
/* Variables and functions */
unsigned int sqrt(unsigned int);
bool is_prime(unsigned num) {
  for (unsigned i = 2; i <= sqrt(num); i++)
    if (num % i == 0)
      return false;
  return true;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sqrt@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
ja     116d <is_prime+0x5d>
mov    -0x8(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
cmp    $0x0,%edx
jne    115a <is_prime+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1174 <is_prime+0x64>
jmp    115f <is_prime+0x4f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1122 <is_prime+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
call   1030 <sqrt@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0x2,%ecx
jb     1153 <is_prime+0x43>
mov    $0x2,%ebx
nopl   (%rax)
mov    %r14d,%eax
xor    %edx,%edx
div    %ebx
mov    %edx,%ebp
test   %edx,%edx
je     114c <is_prime+0x3c>
add    $0x1,%ebx
mov    %r14d,%edi
call   1030 <sqrt@plt>
cmp    %eax,%ebx
jbe    1130 <is_prime+0x20>
xor    %eax,%eax
test   %ebp,%ebp
setne  %al
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = call i32 @sqrt(i32 %7)
%9 = icmp ule i32 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = urem i32 %11, %12
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 0, i32* %2
br label %21
16: ; preds = %10
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = tail call i32 @sqrt(i32 %0)
%3 = icmp ult i32 %2, 2
br i1 %3, label %15, label %7
4: ; preds = %7
%5 = tail call i32 @sqrt(i32 %0)
%6 = icmp ugt i32 %11, %5
br i1 %6, label %12, label %7
7: ; preds = %1, %4
%8 = phi i32 [ %11, %4 ], [ 2, %1 ]
%9 = urem i32 %0, %8
%10 = icmp eq i32 %9, 0
%11 = add i32 %8, 1
br i1 %10, label %12, label %4
12: ; preds = %7, %4
%13 = xor i1 %10, true
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %12, %1
%16 = phi i32 [ 1, %1 ], [ %14, %12 ]
ret i32 %16
}
int testElementHasItem(const void *item, void *data) { return item == data; }


x86 assembly (clang, -O0):
<testElementHasItem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testElementHasItem>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @testElementHasItem(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp eq i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @testElementHasItem(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ call6j(unsigned long);
void call6i(unsigned int ui, unsigned long ul) {
  ui = ui;
  call6j(ul);
}


x86 assembly (clang, -O0):
<call6i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <call6j@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call6i>:
mov    %rsi,%rdi
jmp    1030 <call6j@plt>

LLVM IR (-O0):
define void @call6i(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
store i32 %5, i32* %3
%6 = load i64, i64* %4
%7 = call i32 @call6j(i64 %6)
ret void
}

LLVM IR (-O2):
define void @call6i(i32 %0, i64 %1) {
%3 = tail call i32 @call6j(i64 %1)
ret void
}
void NUMERICS_ERROR(const char *msg) {}


x86 assembly (clang, -O0):
<NUMERICS_ERROR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NUMERICS_ERROR>:
ret

LLVM IR (-O0):
define void @NUMERICS_ERROR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @NUMERICS_ERROR(i8* nocapture %0) {
ret void
}
int main() {
  int a;
  int b;
  int c;
  c;
  b = 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = load i32, i32* %3
store i32 5, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int rtc_write_datetime(const struct tm *tm) {
  (void)tm;
  return -1;
}


x86 assembly (clang, -O0):
<rtc_write_datetime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_write_datetime>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.tm = type opaque
define i32 @rtc_write_datetime(%struct.tm* %0) {
%2 = alloca %struct.tm*
store %struct.tm* %0, %struct.tm** %2
%3 = load %struct.tm*, %struct.tm** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.tm = type opaque
define i32 @rtc_write_datetime(%struct.tm* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void baz(int i) { printf("baz: %d\n", i); }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"baz: %d\0A\00"
define void @baz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"baz: %d\0A\00"
define void @baz(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
void *copy(void *e1) {
  int *cp = (int *)malloc(sizeof(int));
  *cp = *((int *)e1);
  return cp;
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    (%rbx),%ecx
mov    %ecx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @copy(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = call i8* @malloc(i64 4)
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i32*, i32** %3
store i32 %8, i32* %9
%10 = load i32*, i32** %3
%11 = bitcast i32* %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @copy(i8* nocapture %0) {
%2 = tail call dereferenceable_or_null(4) i8* @malloc(i64 4)
%3 = bitcast i8* %2 to i32*
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
store i32 %5, i32* %3
ret i8* %2
}
__attribute__((always_)) void x2apic_force_phys(void) {}


x86 assembly (clang, -O0):
<x2apic_force_phys>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x2apic_force_phys>:
ret

LLVM IR (-O0):
define void @x2apic_force_phys() {
ret void
}

LLVM IR (-O2):
define void @x2apic_force_phys() {
ret void
}
void dev_disable_lro(struct net_device *dev) {}


x86 assembly (clang, -O0):
<dev_disable_lro>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_disable_lro>:
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define void @dev_disable_lro(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret void
}

LLVM IR (-O2):
%struct.net_device = type opaque
define void @dev_disable_lro(%struct.net_device* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void ROM_GetSRAM0(uint32_t *address, uint32_t *size) {
  void (*p_ROM_GetSRAM0)(uint32_t * address, uint32_t * size);
  p_ROM_GetSRAM0 = (void (*)(uint32_t * address, uint32_t * size))0x03000e21U;
  p_ROM_GetSRAM0(address, size);
}


x86 assembly (clang, -O0):
<ROM_GetSRAM0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x3000e21,%eax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROM_GetSRAM0>:
mov    $0x3000e21,%eax
jmp    *%rax

LLVM IR (-O0):
define void @ROM_GetSRAM0(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca void (i32*, i32*)*
store i32* %0, i32** %3
store i32* %1, i32** %4
store void (i32*, i32*)* inttoptr (i64 50335265 to void (i32*, i32*)*), void (i32*, i32*)** %5
%6 = load void (i32*, i32*)*, void (i32*, i32*)** %5
%7 = load i32*, i32** %3
%8 = load i32*, i32** %4
ret void
}

LLVM IR (-O2):
define void @ROM_GetSRAM0(i32* %0, i32* %1) {
tail call void inttoptr (i64 50335265 to void (i32*, i32*)*)(i32* %0, i32* %1)
ret void
}
void GPIOPortP6_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<GPIOPortP6_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <GPIOPortP6_Handler+0x9>
jmp    1109 <GPIOPortP6_Handler+0x9>

x86 assembly (clang, -O2):
<GPIOPortP6_Handler>:
jmp    1100 <GPIOPortP6_Handler>

LLVM IR (-O0):
define void @GPIOPortP6_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @GPIOPortP6_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ IntDisable(int);
int /*<<< orphan*/ IntUnregister(int);
void EthernetIntUnregister(unsigned long ulBase) {
  ;
  IntDisable(58);
  IntUnregister(58);
}


x86 assembly (clang, -O0):
<EthernetIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3a,%edi
call   1030 <IntDisable@plt>
mov    $0x3a,%edi
call   1040 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EthernetIntUnregister>:
push   %rax
mov    $0x3a,%edi
call   1030 <IntDisable@plt>
mov    $0x3a,%edi
pop    %rax
jmp    1040 <IntUnregister@plt>

LLVM IR (-O0):
define void @EthernetIntUnregister(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 @IntDisable(i32 58)
%4 = call i32 @IntUnregister(i32 58)
ret void
}

LLVM IR (-O2):
define void @EthernetIntUnregister(i64 %0) {
%2 = tail call i32 @IntDisable(i32 58)
%3 = tail call i32 @IntUnregister(i32 58)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_typename();
int main(int argc, char *arg[]) { test_typename(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test_typename@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_typename@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @test_typename()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_typename()
ret i32 0
}
int test_imm_6Cint8_reg(signed char val) {
  return ((val) & (0x6C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Cint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x6c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Cint8_reg>:
test   $0x6c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Cint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 108
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Cint8_reg(i8 signext %0) {
%2 = and i8 %0, 108
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void xyz_new(void) { printf("v2 xyz\n"); }


x86 assembly (clang, -O0):
<xyz_new>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xyz_new>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"v2 xyz\0A\00"
define void @xyz_new() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"v2 xyz\00"
define void @xyz_new() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct server_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wait_children(struct server_ctx *, int /*<<< orphan*/);
void wait_all(struct server_ctx *ctx) { wait_children(ctx, 0); }


x86 assembly (clang, -O0):
<wait_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <wait_children@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_all>:
xor    %esi,%esi
jmp    1030 <wait_children@plt>

LLVM IR (-O0):
%struct.server_ctx = type { i32 }
define void @wait_all(%struct.server_ctx* %0) {
%2 = alloca %struct.server_ctx*
store %struct.server_ctx* %0, %struct.server_ctx** %2
%3 = load %struct.server_ctx*, %struct.server_ctx** %2
%4 = call i32 @wait_children(%struct.server_ctx* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.server_ctx = type { i32 }
define void @wait_all(%struct.server_ctx* %0) {
%2 = tail call i32 @wait_children(%struct.server_ctx* %0, i32 0)
ret void
}
/* Type definitions */
struct xcryptorADT {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
char *xc_f(struct xcryptorADT *xcryptor, char *out, char *R, char *K) {
  memcpy(out, R, 4);
  return out;
}


x86 assembly (clang, -O0):
<xc_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xc_f>:
push   %rbx
mov    %rsi,%rbx
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.xcryptorADT = type { i32 }
define i8* @xc_f(%struct.xcryptorADT* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.xcryptorADT*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.xcryptorADT* %0, %struct.xcryptorADT** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = call i32 @memcpy(i8* %9, i8* %10, i32 4)
%12 = load i8*, i8** %6
ret i8* %12
}

LLVM IR (-O2):
%struct.xcryptorADT = type { i32 }
define i8* @xc_f(%struct.xcryptorADT* nocapture readnone %0, i8* returned %1, i8* %2, i8* nocapture readnone %3) {
%5 = tail call i32 @memcpy(i8* %1, i8* %2, i32 4)
ret i8* %1
}
/* Variables and functions */
void *_emptyExtraDataConstructor(void *constructorData) {
  (void)constructorData;
  return NULL;
}


x86 assembly (clang, -O0):
<_emptyExtraDataConstructor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_emptyExtraDataConstructor>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @_emptyExtraDataConstructor(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @_emptyExtraDataConstructor(i8* nocapture readnone %0) {
ret i8* null
}
void close_getchr(void) {}


x86 assembly (clang, -O0):
<close_getchr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_getchr>:
ret

LLVM IR (-O0):
define void @close_getchr() {
ret void
}

LLVM IR (-O2):
define void @close_getchr() {
ret void
}
/* Variables and functions */
int fromRomanNonNull(char const *);
int fromRoman(const char *roman) {
  if (roman == NULL)
    return 0;
  return fromRomanNonNull(roman);
}


x86 assembly (clang, -O0):
<fromRoman>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <fromRoman+0x23>
movl   $0x0,-0x4(%rbp)
jmp    113f <fromRoman+0x2f>
mov    -0x10(%rbp),%rdi
call   1030 <fromRomanNonNull@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fromRoman>:
test   %rdi,%rdi
je     111a <fromRoman+0xa>
jmp    1030 <fromRomanNonNull@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fromRoman(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @fromRomanNonNull(i8* %8)
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @fromRoman(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @fromRomanNonNull(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ battery_state_service_unsudirribe();
void batteryModule_deinit() { battery_state_service_unsudirribe(); }


x86 assembly (clang, -O0):
<batteryModule_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <battery_state_service_unsudirribe@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<batteryModule_deinit>:
xor    %eax,%eax
jmp    1030 <battery_state_service_unsudirribe@plt>

LLVM IR (-O0):
define void @batteryModule_deinit() {
%1 = call i32 (...) @battery_state_service_unsudirribe()
ret void
}

LLVM IR (-O2):
define void @batteryModule_deinit() {
%1 = tail call i32 (...) @battery_state_service_unsudirribe()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int main(int argc, const char *argv[], const char *envp[]) {
  int i = 0;
  while (envp[i] != NULL)
    printf("%s\n", envp[i++]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     116b <main+0x5b>
mov    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x1c(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
jmp    1131 <main+0x21>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    (%rdx),%rsi
test   %rsi,%rsi
je     1144 <main+0x34>
mov    %rdx,%rbx
add    $0x8,%rbx
lea    0xed6(%rip),%r14
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1030 <printf@plt>
mov    (%rbx),%rsi
add    $0x8,%rbx
test   %rsi,%rsi
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
%8 = alloca i32
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
store i32 0, i32* %8
br label %9
9: ; preds = %16, %3
%10 = load i8**, i8*** %7
%11 = load i32, i32* %8
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8*, i8** %10, i64 %12
%14 = load i8*, i8** %13
%15 = icmp ne i8* %14, null
br i1 %15, label %16, label %24
16: ; preds = %9
%17 = load i8**, i8*** %7
%18 = load i32, i32* %8
%19 = add nsw i32 %18, 1
store i32 %19, i32* %8
%20 = sext i32 %18 to i64
%21 = getelementptr inbounds i8*, i8** %17, i64 %20
%22 = load i8*, i8** %21
%23 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %22)
br label %9
24: ; preds = %9
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture %2) {
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %9, %6 ], [ 0, %3 ]
%8 = phi i8* [ %12, %6 ], [ %4, %3 ]
%9 = add nuw i64 %7, 1
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%11 = getelementptr inbounds i8*, i8** %2, i64 %9
%12 = load i8*, i8** %11
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %6
14: ; preds = %6, %3
ret i32 0
}
void freeWeights(float **weights, int weightsRow) {
  int i;
  for (i = 0; i < weightsRow; i++)
    free(weights[i]);
  free(weights);
}


x86 assembly (clang, -O0):
<freeWeights>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <freeWeights+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <freeWeights+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeWeights>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <freeWeights+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <freeWeights+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeWeights(float** %0, i32 %1) {
%3 = alloca float**
%4 = alloca i32
%5 = alloca i32
store float** %0, float*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load float**, float*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds float*, float** %11, i64 %13
%15 = load float*, float** %14
%16 = bitcast float* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load float**, float*** %3
%22 = bitcast float** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @freeWeights(float** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds float*, float** %0, i64 %7
%9 = bitcast float** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast float** %0 to i8*
tail call void @free(i8* %14)
ret void
}
/* Variables and functions */
int strlen(char *);
void stripNewline(char *buffer) {
  int len = strlen(buffer);
  if (len > 0 && buffer[len - 1] == '\n')
    buffer[len - 1] = '\0';
}


x86 assembly (clang, -O0):
<stripNewline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    115d <stripNewline+0x4d>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    115d <stripNewline+0x4d>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stripNewline>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    112a <stripNewline+0x1a>
add    $0xffffffff,%eax
cmpb   $0xa,(%rbx,%rax,1)
jne    112a <stripNewline+0x1a>
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @stripNewline(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 10
br i1 %16, label %17, label %23
17: ; preds = %8
%18 = load i8*, i8** %2
%19 = load i32, i32* %3
%20 = sub nsw i32 %19, 1
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %18, i64 %21
store i8 0, i8* %22
br label %23
23: ; preds = %17, %8, %1
ret void
}

LLVM IR (-O2):
define void @stripNewline(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = add nsw i32 %2, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 10
br i1 %9, label %10, label %11
10: ; preds = %4
store i8 0, i8* %7
br label %11
11: ; preds = %10, %4, %1
ret void
}
/* Variables and functions */
int imax(int, int);
int main(int argc, char **argv) {
#pragma omp declare reduction(imax : int) identity((-2147483647 - 1))
  int k, v[100], m;
#pragma omp parallel for reduction(imax : m)
  for (k = 0; k < 100; k++) {
    m = imax(m, v[k]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1c0,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x64,-0x14(%rbp)
jge    1164 <main+0x54>
mov    -0x1b4(%rbp),%edi
movslq -0x14(%rbp),%rax
mov    -0x1b0(%rbp,%rax,4),%esi
call   1030 <imax@plt>
mov    %eax,-0x1b4(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1130 <main+0x20>
xor    %eax,%eax
add    $0x1c0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca [100 x i32]
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %9
9: ; preds = %19, %2
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 100
br i1 %11, label %12, label %22
12: ; preds = %9
%13 = load i32, i32* %8
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [100 x i32], [100 x i32]* %7, i64 0, i64 %15
%17 = load i32, i32* %16
%18 = call i32 @imax(i32 %13, i32 %17)
store i32 %18, i32* %8
br label %19
19: ; preds = %12
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %9
22: ; preds = %9
ret i32 0
}

LLVM IR (-O2):
/* Variables and functions */
int numerous_arguments(int, int, int, int, int, int, int, int, int, int, int,
                       int, int, int, int);
int main(void) {
  return numerous_arguments(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15) +
         numerous_arguments(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
mov    $0x5,%r8d
mov    $0x6,%r9d
movl   $0x7,(%rsp)
movl   $0x8,0x8(%rsp)
movl   $0x9,0x10(%rsp)
movl   $0xa,0x18(%rsp)
movl   $0xb,0x20(%rsp)
movl   $0xc,0x28(%rsp)
movl   $0xd,0x30(%rsp)
movl   $0xe,0x38(%rsp)
movl   $0xf,0x40(%rsp)
call   1030 <numerous_arguments@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%r9d
mov    %r9d,%edi
mov    %r9d,%esi
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
movl   $0x1,(%rsp)
movl   $0x1,0x8(%rsp)
movl   $0x1,0x10(%rsp)
movl   $0x1,0x18(%rsp)
movl   $0x1,0x20(%rsp)
movl   $0x1,0x28(%rsp)
movl   $0x1,0x30(%rsp)
movl   $0x1,0x38(%rsp)
movl   $0x1,0x40(%rsp)
call   1030 <numerous_arguments@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x8,%rsp
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
mov    $0x5,%r8d
mov    $0x6,%r9d
push   $0xf
push   $0xe
push   $0xd
push   $0xc
push   $0xb
push   $0xa
push   $0x9
push   $0x8
push   $0x7
call   1030 <numerous_arguments@plt>
add    $0x50,%rsp
mov    %eax,%ebx
sub    $0x8,%rsp
mov    $0x1,%edi
mov    $0x1,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
push   $0x1
push   $0x1
push   $0x1
push   $0x1
push   $0x1
push   $0x1
push   $0x1
push   $0x1
push   $0x1
call   1030 <numerous_arguments@plt>
add    $0x50,%rsp
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @numerous_arguments(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15)
%3 = call i32 @numerous_arguments(i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1)
%4 = add nsw i32 %2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @numerous_arguments(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15)
%2 = tail call i32 @numerous_arguments(i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1)
%3 = add nsw i32 %2, %1
ret i32 %3
}
void Sys_PlatformExit(void) {}


x86 assembly (clang, -O0):
<Sys_PlatformExit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_PlatformExit>:
ret

LLVM IR (-O0):
define void @Sys_PlatformExit() {
ret void
}

LLVM IR (-O2):
define void @Sys_PlatformExit() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ RSA;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ ASN1_ITEM_rptr(int /*<<< orphan*/);
int /*<<< orphan*/ *ASN1_item_d2i_bio(int /*<<< orphan*/, int /*<<< orphan*/ *,
                                      int /*<<< orphan*/ **);
int /*<<< orphan*/ RSAPrivateKey;
RSA *d2i_RSAPrivateKey_bio(BIO *bp, RSA **rsa) {
  return ASN1_item_d2i_bio(ASN1_ITEM_rptr(RSAPrivateKey), bp, rsa);
}


x86 assembly (clang, -O0):
<d2i_RSAPrivateKey_bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
call   1030 <ASN1_ITEM_rptr@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <ASN1_item_d2i_bio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_RSAPrivateKey_bio>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    0x2eb7(%rip),%rax
mov    (%rax),%edi
call   1030 <ASN1_ITEM_rptr@plt>
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <ASN1_item_d2i_bio@plt>

LLVM IR (-O0):
@RSAPrivateKey = global i32 0
define i32* @d2i_RSAPrivateKey_bio(i32* %0, i32** %1) {
%3 = alloca i32*
%4 = alloca i32**
store i32* %0, i32** %3
store i32** %1, i32*** %4
%5 = load i32, i32* @RSAPrivateKey
%6 = call i32 @ASN1_ITEM_rptr(i32 %5)
%7 = load i32*, i32** %3
%8 = load i32**, i32*** %4
%9 = call i32* @ASN1_item_d2i_bio(i32 %6, i32* %7, i32** %8)
ret i32* %9
}

LLVM IR (-O2):
@RSAPrivateKey = global i32 0
define i32* @d2i_RSAPrivateKey_bio(i32* %0, i32** %1) {
%3 = load i32, i32* @RSAPrivateKey
%4 = tail call i32 @ASN1_ITEM_rptr(i32 %3)
%5 = tail call i32* @ASN1_item_d2i_bio(i32 %4, i32* %0, i32** %1)
ret i32* %5
}