void atomic_increment(volatile unsigned *p) {
  unsigned val, success, delay;
  delay = get_core_id() + 1;
  do {
    val = _ll(p);
    unsigned i;
    for (i = 0; i < delay; ++i)
      __asm__ __volatile__("nop");
    success = _sc(p, val + 1);
  } while (!success);
}


x86 assembly (clang, -O0):
<atomic_increment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <get_core_id@plt>
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <_ll@plt>
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jae    1179 <atomic_increment+0x49>
nop
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    115e <atomic_increment+0x2e>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
add    $0x1,%esi
mov    $0x0,%al
call   1050 <_sc@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1149 <atomic_increment+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_increment>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <get_core_id@plt>
mov    %eax,%r14d
lea    0x1(%r14),%ebp
jmp    1163 <atomic_increment+0x33>
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
mov    %rbx,%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <_sc@plt>
test   %eax,%eax
jne    1188 <atomic_increment+0x58>
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <_ll@plt>
cmp    $0xffffffff,%r14d
je     1150 <atomic_increment+0x20>
mov    %ebp,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
nop
add    $0xffffffff,%ecx
jne    1180 <atomic_increment+0x50>
jmp    1150 <atomic_increment+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @atomic_increment(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %2
%7 = call i32 (...) @get_core_id()
%8 = add nsw i32 %7, 1
store i32 %8, i32* %5
br label %9
9: ; preds = %25, %1
%10 = load i32*, i32** %2
%11 = call i32 (i32*, ...) bitcast (i32 (...)* @_ll to i32 (i32*, ...)*)(i32* %10)
store i32 %11, i32* %3
store i32 0, i32* %6
br label %12
12: ; preds = %17, %9
%13 = load i32, i32* %6
%14 = load i32, i32* %5
%15 = icmp ult i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
br label %17
17: ; preds = %16
%18 = load i32, i32* %6
%19 = add i32 %18, 1
store i32 %19, i32* %6
br label %12
20: ; preds = %12
%21 = load i32*, i32** %2
%22 = load i32, i32* %3
%23 = add i32 %22, 1
%24 = call i32 (i32*, i32, ...) bitcast (i32 (...)* @_sc to i32 (i32*, i32, ...)*)(i32* %21, i32 %23)
store i32 %24, i32* %4
br label %25
25: ; preds = %20
%26 = load i32, i32* %4
%27 = icmp ne i32 %26, 0
%28 = xor i1 %27, true
br i1 %28, label %9, label %29
29: ; preds = %25
ret void
}

LLVM IR (-O2):
define void @atomic_increment(i32* %0) {
%2 = tail call i32 (...) @get_core_id()
%3 = icmp eq i32 %2, -1
br label %4
4: ; preds = %10, %1
%5 = tail call i32 (i32*, ...) bitcast (i32 (...)* @_ll to i32 (i32*, ...)*)(i32* %0)
br i1 %3, label %10, label %6
6: ; preds = %4, %6
%7 = phi i32 [ %8, %6 ], [ 0, %4 ]
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%8 = add nuw i32 %7, 1
%9 = icmp eq i32 %7, %2
br i1 %9, label %10, label %6
10: ; preds = %6, %4
%11 = add i32 %5, 1
%12 = tail call i32 (i32*, i32, ...) bitcast (i32 (...)* @_sc to i32 (i32*, i32, ...)*)(i32* %0, i32 %11)
%13 = icmp eq i32 %12, 0
br i1 %13, label %4, label %14
14: ; preds = %10
ret void
}