xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t strlen(char const *);
size_t rDB_size(const char *str) { return strlen(str) + 1; }


x86 assembly (clang, -O0):
<rDB_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rDB_size>:
push   %rax
call   1030 <strlen@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @rDB_size(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strlen(i8* %3)
%5 = add i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @rDB_size(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void missing_entry(char *entry) {
  printf("Info file missing entry \"%s\", exiting.\n", entry);
  exit(1);
}


x86 assembly (clang, -O0):
<missing_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<missing_entry>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Info file missing entry \22%s\22, exiting.\0A\00"
define void @missing_entry(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [40 x i8] c"Info file missing entry \22%s\22, exiting.\0A\00"
define void @missing_entry(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void buggy_os(void) {
  fprintf(stderr, "This OS is too bad.  Find another one!");
  exit(1);
}


x86 assembly (clang, -O0):
<buggy_os>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<buggy_os>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [39 x i8] c"This OS is too bad. Find another one!\00"
define void @buggy_os() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [39 x i8] c"This OS is too bad. Find another one!\00"
define void @buggy_os() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
unsigned char inb(int);
int /*<<< orphan*/ mouse_wait(int /*<<< orphan*/);
unsigned char mouse_read() {
  mouse_wait(0);
  return inb(0x60);
}


x86 assembly (clang, -O0):
<mouse_read>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <mouse_wait@plt>
mov    $0x60,%edi
call   1040 <inb@plt>
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mouse_read>:
push   %rax
xor    %edi,%edi
call   1030 <mouse_wait@plt>
mov    $0x60,%edi
pop    %rax
jmp    1040 <inb@plt>

LLVM IR (-O0):
define zeroext i8 @mouse_read() {
%1 = call i32 @mouse_wait(i32 0)
%2 = call zeroext i8 @inb(i32 96)
ret i8 %2
}

LLVM IR (-O2):
define zeroext i8 @mouse_read() {
%1 = tail call i32 @mouse_wait(i32 0)
%2 = tail call zeroext i8 @inb(i32 96)
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ barrier();
void smp_wmb(void) { barrier(); }


x86 assembly (clang, -O0):
<smp_wmb>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <barrier@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_wmb>:
xor    %eax,%eax
jmp    1030 <barrier@plt>

LLVM IR (-O0):
define void @smp_wmb() {
%1 = call i32 (...) @barrier()
ret void
}

LLVM IR (-O2):
define void @smp_wmb() {
%1 = tail call i32 (...) @barrier()
ret void
}
int compute_padding(int offset, int align) {
  return (offset % align == 0) ? 0 : align - offset % align;
}


x86 assembly (clang, -O0):
<compute_padding>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    1124 <compute_padding+0x24>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    1139 <compute_padding+0x39>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0x10(%rbp),%eax
sub    %edx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_padding>:
mov    %edi,%eax
cltd
idiv   %esi
sub    %edx,%esi
test   %edx,%edx
cmove  %edx,%esi
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @compute_padding(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
br label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
%15 = sub nsw i32 %11, %14
br label %16
16: ; preds = %10, %9
%17 = phi i32 [ 0, %9 ], [ %15, %10 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @compute_padding(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
%5 = sub nsw i32 %1, %3
%6 = select i1 %4, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ put64(unsigned long long);
int /*<<< orphan*/ put8(int);
void mov_memoffs32_eax(unsigned int *memoffs32) {
  put8(0xA3);
  put64((unsigned long long)memoffs32);
}


x86 assembly (clang, -O0):
<mov_memoffs32_eax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xa3,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%rdi
call   1040 <put64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_memoffs32_eax>:
push   %rbx
mov    %rdi,%rbx
mov    $0xa3,%edi
call   1030 <put8@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <put64@plt>

LLVM IR (-O0):
define void @mov_memoffs32_eax(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 @put8(i32 163)
%4 = load i32*, i32** %2
%5 = ptrtoint i32* %4 to i64
%6 = call i32 @put64(i64 %5)
ret void
}

LLVM IR (-O2):
define void @mov_memoffs32_eax(i32* %0) {
%2 = tail call i32 @put8(i32 163)
%3 = ptrtoint i32* %0 to i64
%4 = tail call i32 @put64(i64 %3)
ret void
}
/* Type definitions */
struct sock {
  int dummy;
};
struct cminisock {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_msk(struct sock *, struct cminisock *);
void msk_free_fields(struct sock *sk, struct cminisock *msk) {
  free_msk(sk, msk);
}


x86 assembly (clang, -O0):
<msk_free_fields>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <free_msk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msk_free_fields>:
jmp    1030 <free_msk@plt>

LLVM IR (-O0):
%struct.sock = type { i32 }
%struct.cminisock = type { i32 }
define void @msk_free_fields(%struct.sock* %0, %struct.cminisock* %1) {
%3 = alloca %struct.sock*
%4 = alloca %struct.cminisock*
store %struct.sock* %0, %struct.sock** %3
store %struct.cminisock* %1, %struct.cminisock** %4
%5 = load %struct.sock*, %struct.sock** %3
%6 = load %struct.cminisock*, %struct.cminisock** %4
%7 = call i32 @free_msk(%struct.sock* %5, %struct.cminisock* %6)
ret void
}

LLVM IR (-O2):
%struct.sock = type { i32 }
%struct.cminisock = type { i32 }
define void @msk_free_fields(%struct.sock* %0, %struct.cminisock* %1) {
%3 = tail call i32 @free_msk(%struct.sock* %0, %struct.cminisock* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print_expression(const char *expression) {
  printf("Your expression: '%s'\n\n", expression);
}


x86 assembly (clang, -O0):
<print_expression>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_expression>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Your expression: '%s'\0A\0A\00"
define void @print_expression(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Your expression: '%s'\0A\0A\00"
define void @print_expression(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void stripLF(char *const str) {
  int i = 0;
  while (str[i] != '\0')
    ++i;
  if (i == 0)
    return;
  str[i - 1] = 0;
}


x86 assembly (clang, -O0):
<stripLF>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <stripLF+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <stripLF+0xf>
cmpl   $0x0,-0xc(%rbp)
jne    1141 <stripLF+0x41>
jmp    1152 <stripLF+0x52>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stripLF>:
movabs $0xfffffffe00000000,%rax
ff ff ff
xor    %edx,%edx
movabs $0x100000000,%rcx
cs nopw 0x0(%rax,%rax,1)
add    %rcx,%rax
cmpb   $0x0,(%rdi,%rdx,1)
lea    0x1(%rdx),%rdx
jne    1120 <stripLF+0x20>
cmp    $0x1,%edx
je     113a <stripLF+0x3a>
sar    $0x20,%rax
movb   $0x0,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @stripLF(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %15
br label %25
19: ; preds = %15
%20 = load i8*, i8** %2
%21 = load i32, i32* %3
%22 = sub nsw i32 %21, 1
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %20, i64 %23
store i8 0, i8* %24
br label %25
25: ; preds = %19, %18
ret void
}

LLVM IR (-O2):
define void @stripLF(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %16, label %11
11: ; preds = %8
%12 = shl i64 %3, 32
%13 = add i64 %12, -4294967296
%14 = ashr exact i64 %13, 32
%15 = getelementptr inbounds i8, i8* %0, i64 %14
store i8 0, i8* %15
br label %16
16: ; preds = %8, %11
ret void
}
/* Variables and functions */
float sinh(float);
float f_sinh(float x) { return sinh(x); }


x86 assembly (clang, -O0):
<f_sinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_sinh>:
jmp    1030 <sinh@plt>

LLVM IR (-O0):
define float @f_sinh(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sinh(float %3)
ret float %4
}

LLVM IR (-O2):
define float @f_sinh(float %0) {
%2 = tail call float @sinh(float %0)
ret float %2
}
int wl1271_tx_ac_to_tid(int ac) {
  switch (ac) {
  case 0:
    return 0;
  case 1:
    return 2;
  case 2:
    return 4;
  case 3:
    return 6;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<wl1271_tx_ac_to_tid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     115c <wl1271_tx_ac_to_tid+0x5c>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1163 <wl1271_tx_ac_to_tid+0x63>
movl   $0x2,-0x4(%rbp)
jmp    1163 <wl1271_tx_ac_to_tid+0x63>
movl   $0x4,-0x4(%rbp)
jmp    1163 <wl1271_tx_ac_to_tid+0x63>
movl   $0x6,-0x4(%rbp)
jmp    1163 <wl1271_tx_ac_to_tid+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl1271_tx_ac_to_tid>:
lea    (%rdi,%rdi,1),%ecx
add    $0xfffffffe,%ecx
mov    %edi,%edx
add    $0xffffffff,%edx
add    $0x2,%ecx
xor    %eax,%eax
cmp    $0x3,%edx
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @wl1271_tx_ac_to_tid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i32 0, i32* %2
br label %10
6: ; preds = %1
store i32 2, i32* %2
br label %10
7: ; preds = %1
store i32 4, i32* %2
br label %10
8: ; preds = %1
store i32 6, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @wl1271_tx_ac_to_tid(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3
%4 = shl i32 %2, 1
%5 = add i32 %4, 2
%6 = select i1 %3, i32 %5, i32 0
ret i32 %6
}
unsigned xrop3_164_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = S | T;
  stk3 = ~stk3;
  stk2 = D | stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_164_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_164_0_0>:
shl    $0x8,%edi
lea    (%rdi,%rsi,1),%eax
shl    $0x8,%esi
not    %esi
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_164_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = load i32, i32* %7
%25 = or i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %10
%27 = xor i32 %26, -1
store i32 %27, i32* %10
%28 = load i32, i32* %5
%29 = load i32, i32* %10
%30 = or i32 %28, %29
store i32 %30, i32* %9
%31 = load i32, i32* %7
%32 = load i32, i32* %9
%33 = xor i32 %31, %32
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = xor i32 %34, -1
store i32 %35, i32* %8
%36 = load i32, i32* %8
ret i32 %36
}

LLVM IR (-O2):
define i32 @xrop3_164_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %4, %5
%8 = xor i32 %6, -1
%9 = and i32 %7, %8
ret i32 %9
}
float Vector3NormSquared(const float v[3]) {
  return v[0] * v[0] + v[1] * v[1] + v[2] * v[2];
}


x86 assembly (clang, -O0):
<Vector3NormSquared>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vector3NormSquared>:
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm0
mulss  %xmm0,%xmm0
mulss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  0x8(%rdi),%xmm0
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Vector3NormSquared(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = load float*, float** %2
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
%15 = fmul float %11, %14
%16 = call float @llvm.fmuladd.f32(float %5, float %8, float %15)
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 2
%19 = load float, float* %18
%20 = load float*, float** %2
%21 = getelementptr inbounds float, float* %20, i64 2
%22 = load float, float* %21
%23 = call float @llvm.fmuladd.f32(float %19, float %22, float %16)
ret float %23
}

LLVM IR (-O2):
define float @Vector3NormSquared(float* nocapture %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = fmul float %4, %4
%6 = tail call float @llvm.fmuladd.f32(float %2, float %2, float %5)
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = tail call float @llvm.fmuladd.f32(float %8, float %8, float %6)
ret float %9
}
/* Variables and functions */
float fasterlog2(float);
float fasterlog(float x) { return 0.69314718f * fasterlog2(x); }


x86 assembly (clang, -O0):
<fasterlog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <fasterlog2@plt>
movaps %xmm0,%xmm1
movss  0xece(%rip),%xmm0
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fasterlog>:
push   %rax
call   1030 <fasterlog2@plt>
mulss  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fasterlog(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @fasterlog2(float %3)
%5 = fmul float 0x3FE62E4300000000, %4
ret float %5
}

LLVM IR (-O2):
define float @fasterlog(float %0) {
%2 = tail call float @fasterlog2(float %0)
%3 = fmul float %2, 0x3FE62E4300000000
ret float %3
}
/* Variables and functions */
scalar_t__ strchr(char *, int);
int my_chkch(int ch) { return strchr("YyNn", ch) ? 1 : 0; }


x86 assembly (clang, -O0):
<my_chkch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <strchr@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_chkch>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"YyNn\00"
define i32 @my_chkch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @strchr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
ret i32 %7
}

LLVM IR (-O2):
@.str = [5 x i8] c"YyNn\00"
define i32 @my_chkch(i32 %0) {
%2 = tail call i64 @strchr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int open(char const *, int, int /*<<< orphan*/);
int xopen3(const char *pathname, int flags, mode_t mode) {
  int fd = open(pathname, flags, mode);
  if (fd < 0) {
    ;
  }
  return fd;
}


x86 assembly (clang, -O0):
<xopen3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <open@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1143 <xopen3+0x33>
jmp    1143 <xopen3+0x33>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xopen3>:
jmp    1030 <open@plt>

LLVM IR (-O0):
define i32 @xopen3(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @open(i8* %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %3
br label %15
15: ; preds = %14, %3
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @xopen3(i8* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @open(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
unsigned long gu2_get_cpu_register_base(void) {
  return gfx_pci_config_read(0x80000918);
}


x86 assembly (clang, -O0):
<gu2_get_cpu_register_base>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000918,%edi
call   1030 <gfx_pci_config_read@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gu2_get_cpu_register_base>:
mov    $0x80000918,%edi
jmp    1030 <gfx_pci_config_read@plt>

LLVM IR (-O0):
define i64 @gu2_get_cpu_register_base() {
%1 = call i64 @gfx_pci_config_read(i32 -2147481320)
ret i64 %1
}

LLVM IR (-O2):
define i64 @gu2_get_cpu_register_base() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147481320)
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ dxl_write_word(unsigned char, int, unsigned short);
void setMovingSpeed(unsigned char id, unsigned short speed) {
  dxl_write_word(id, (32), speed);
}


x86 assembly (clang, -O0):
<setMovingSpeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%al
mov    $0x20,%esi
movzbl %al,%edi
movzwl -0x4(%rbp),%edx
call   1030 <dxl_write_word@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setMovingSpeed>:
mov    %esi,%edx
mov    $0x20,%esi
jmp    1030 <dxl_write_word@plt>

LLVM IR (-O0):
define void @setMovingSpeed(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
%7 = call i32 @dxl_write_word(i8 zeroext %5, i32 32, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @setMovingSpeed(i8 zeroext %0, i16 zeroext %1) {
%3 = tail call i32 @dxl_write_word(i8 zeroext %0, i32 32, i16 zeroext %1)
ret void
}
void ARGBToUVJRow_AVX2() {}


x86 assembly (clang, -O0):
<ARGBToUVJRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToUVJRow_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBToUVJRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToUVJRow_AVX2() {
ret void
}
void machine_shutdown(void) { return; }


x86 assembly (clang, -O0):
<machine_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<machine_shutdown>:
ret

LLVM IR (-O0):
define void @machine_shutdown() {
ret void
}

LLVM IR (-O2):
define void @machine_shutdown() {
ret void
}
void init_value(int *p) { *p = 0x11223344; }


x86 assembly (clang, -O0):
<init_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x11223344,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_value>:
movl   $0x11223344,(%rdi)
ret

LLVM IR (-O0):
define void @init_value(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 287454020, i32* %3
ret void
}

LLVM IR (-O2):
define void @init_value(i32* nocapture writeonly %0) {
store i32 287454020, i32* %0
ret void
}
int x(double i) { return (i - 2.0) <= i; }


x86 assembly (clang, -O0):
<x>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xeea(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x>:
movsd  0xef8(%rip),%xmm1
addsd  %xmm0,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @x(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 2.000000e+00
%5 = load double, double* %2
%6 = fcmp ole double %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @x(double %0) {
%2 = fadd double %0, -2.000000e+00
%3 = fcmp ole double %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
int SDL_GetRevisionNumber(void) { return 7890; }


x86 assembly (clang, -O0):
<SDL_GetRevisionNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1ed2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_GetRevisionNumber>:
mov    $0x1ed2,%eax
ret

LLVM IR (-O0):
define i32 @SDL_GetRevisionNumber() {
ret i32 7890
}

LLVM IR (-O2):
define i32 @SDL_GetRevisionNumber() {
ret i32 7890
}
int primetester(int i) {
  int j, prime, c, r;
  prime = 1;
  for (j = 2; j < i && prime == 1; ++j) {
    if (i % j == 0) {
      prime = 0;
    }
  }
  if (prime == 1) {
    i = r;
    ++c;
    return i;
  }
}


x86 assembly (clang, -O0):
<primetester>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0x19(%rbp)
jge    1130 <primetester+0x30>
cmpl   $0x1,-0x10(%rbp)
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1140 <primetester+0x40>
jmp    116a <primetester+0x6a>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1157 <primetester+0x57>
movl   $0x0,-0x10(%rbp)
jmp    115c <primetester+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <primetester+0x15>
cmpl   $0x1,-0x10(%rbp)
jne    1189 <primetester+0x89>
mov    -0x18(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<primetester>:
ret

LLVM IR (-O0):
define i32 @primetester(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %5
store i32 2, i32* %4
br label %8
8: ; preds = %24, %1
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i32, i32* %5
%14 = icmp eq i32 %13, 1
br label %15
15: ; preds = %12, %8
%16 = phi i1 [ false, %8 ], [ %14, %12 ]
br i1 %16, label %17, label %27
17: ; preds = %15
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %17
store i32 0, i32* %5
br label %23
23: ; preds = %22, %17
br label %24
24: ; preds = %23
%25 = load i32, i32* %4
%26 = add nsw i32 %25, 1
store i32 %26, i32* %4
br label %8
27: ; preds = %15
%28 = load i32, i32* %5
%29 = icmp eq i32 %28, 1
br i1 %29, label %30, label %35
30: ; preds = %27
%31 = load i32, i32* %7
store i32 %31, i32* %3
%32 = load i32, i32* %6
%33 = add nsw i32 %32, 1
store i32 %33, i32* %6
%34 = load i32, i32* %3
store i32 %34, i32* %2
br label %35
35: ; preds = %30, %27
%36 = load i32, i32* %2
ret i32 %36
}

LLVM IR (-O2):
define i32 @primetester(i32 %0) {
ret i32 undef
}
/* Variables and functions */
void *__ioremap(unsigned long, unsigned long, int);
void *ioremap_nocache(unsigned long physaddr, unsigned long size) {
  return __ioremap(physaddr, size, 1);
}


x86 assembly (clang, -O0):
<ioremap_nocache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <__ioremap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioremap_nocache>:
mov    $0x1,%edx
jmp    1030 <__ioremap@plt>

LLVM IR (-O0):
define i8* @ioremap_nocache(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @__ioremap(i64 %5, i64 %6, i32 1)
ret i8* %7
}

LLVM IR (-O2):
define i8* @ioremap_nocache(i64 %0, i64 %1) {
%3 = tail call i8* @__ioremap(i64 %0, i64 %1, i32 1)
ret i8* %3
}
/* Variables and functions */
scalar_t__ M_PI;
int /*<<< orphan*/ fmod(double, scalar_t__);
void mips__sincos(int /*<<< orphan*/, double *, double *);
void mips_sincos(double x, double *sinx, double *cosx) {
  return mips__sincos(fmod(x, (M_PI + M_PI)), sinx, cosx);
}


x86 assembly (clang, -O0):
<mips_sincos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2ea7(%rip),%rax
mov    (%rax),%rdi
mov    0x2e9d(%rip),%rax
add    (%rax),%rdi
call   1030 <fmod@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <mips__sincos@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mips_sincos>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    0x2eb7(%rip),%rax
mov    (%rax),%rdi
add    %rdi,%rdi
call   1030 <fmod@plt>
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <mips__sincos@plt>

LLVM IR (-O0):
@M_PI = global i64 0
define void @mips_sincos(double %0, double* %1, double* %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca double*
store double %0, double* %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double, double* %4
%8 = load i64, i64* @M_PI
%9 = load i64, i64* @M_PI
%10 = add nsw i64 %8, %9
%11 = call i32 @fmod(double %7, i64 %10)
%12 = load double*, double** %5
%13 = load double*, double** %6
ret void
}

LLVM IR (-O2):
@M_PI = global i64 0
define void @mips_sincos(double %0, double* %1, double* %2) {
%4 = load i64, i64* @M_PI
%5 = shl nsw i64 %4, 1
%6 = tail call i32 @fmod(double %0, i64 %5)
tail call void @mips__sincos(i32 %6, double* %1, double* %2)
ret void
}
/* Variables and functions */
bool is_alphbet(char input) {
  if ((input >= 'a' && input <= 'z') || (input >= 'A' && input <= 'Z'))
    return true;
  return false;
}


x86 assembly (clang, -O0):
<is_alphbet>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1124 <is_alphbet+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    113e <is_alphbet+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     114a <is_alphbet+0x4a>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     114a <is_alphbet+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <is_alphbet+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_alphbet>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_alphbet(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %19, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %19, label %20
19: ; preds = %15, %7
store i32 1, i32* %2
br label %21
20: ; preds = %15, %11
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_alphbet(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char const *const, char *);
FILE *write_file(const char *const filename) {
  if (filename == NULL)
    return NULL;
  FILE *fp = fopen(filename, "w");
  if (fp == NULL)
    return NULL;
  return fp;
}


x86 assembly (clang, -O0):
<write_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <write_file+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1168 <write_file+0x58>
mov    -0x10(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1160 <write_file+0x50>
movq   $0x0,-0x8(%rbp)
jmp    1168 <write_file+0x58>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_file>:
test   %rdi,%rdi
je     1121 <write_file+0x11>
lea    0xee4(%rip),%rsi
jmp    1030 <fopen@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define i32* @write_file(i8* %0) {
%2 = alloca i32*
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i32* null, i32** %2
br label %16
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32* @fopen(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %10, i32** %4
%11 = load i32*, i32** %4
%12 = icmp eq i32* %11, null
br i1 %12, label %13, label %14
13: ; preds = %8
store i32* null, i32** %2
br label %16
14: ; preds = %8
%15 = load i32*, i32** %4
store i32* %15, i32** %2
br label %16
16: ; preds = %14, %13, %7
%17 = load i32*, i32** %2
ret i32* %17
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define noalias i32* @write_file(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %1, %3
%6 = phi i32* [ %4, %3 ], [ null, %1 ]
ret i32* %6
}
/* Variables and functions */
int /*<<< orphan*/ dir_constrcut();
int /*<<< orphan*/ plan_cap_action(int);
int plan_hour_check();
int /*<<< orphan*/ timer_hour_start(int (*)(void *));
int alert_timer_handler(void *data) {
  dir_constrcut();
  int ret = plan_hour_check();
  plan_cap_action(ret);
  timer_hour_start(alert_timer_handler);
  return 0;
}


x86 assembly (clang, -O0):
<alert_timer_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <dir_constrcut@plt>
mov    $0x0,%al
call   1060 <plan_hour_check@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <plan_cap_action@plt>
mov    0x2e6c(%rip),%rdi
call   1030 <timer_hour_start@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alert_timer_handler>:
push   %rax
xor    %eax,%eax
call   1040 <dir_constrcut@plt>
xor    %eax,%eax
call   1060 <plan_hour_check@plt>
mov    %eax,%edi
call   1050 <plan_cap_action@plt>
mov    0x2e7b(%rip),%rdi
call   1030 <timer_hour_start@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @alert_timer_handler(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 (...) @dir_constrcut()
%5 = call i32 (...) @plan_hour_check()
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @plan_cap_action(i32 %6)
%8 = call i32 @timer_hour_start(i32 (i8*)* @alert_timer_handler)
ret i32 0
}

LLVM IR (-O2):
define i32 @alert_timer_handler(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @dir_constrcut()
%3 = tail call i32 (...) @plan_hour_check()
%4 = tail call i32 @plan_cap_action(i32 %3)
%5 = tail call i32 @timer_hour_start(i32 (i8*)* @alert_timer_handler)
ret i32 0
}
int inner_weak(int a) { return 0; }


x86 assembly (clang, -O0):
<inner_weak>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inner_weak>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @inner_weak(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @inner_weak(i32 %0) {
ret i32 0
}
int minus_one(int v) {
  for (int i = 0; i < 3; i = i + 1)
    v = v + 1;
  for (int i = 3; i >= 0;) {
    i = i - 1;
    v = v - 1;
  }
  return v;
}


x86 assembly (clang, -O0):
<minus_one>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    112f <minus_one+0x2f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <minus_one+0xe>
movl   $0x3,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1157 <minus_one+0x57>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1136 <minus_one+0x36>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minus_one>:
lea    -0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @minus_one(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 3
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %5
14: ; preds = %5
store i32 3, i32* %4
br label %15
15: ; preds = %18, %14
%16 = load i32, i32* %4
%17 = icmp sge i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = load i32, i32* %4
%20 = sub nsw i32 %19, 1
store i32 %20, i32* %4
%21 = load i32, i32* %2
%22 = sub nsw i32 %21, 1
store i32 %22, i32* %2
br label %15
23: ; preds = %15
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @minus_one(i32 %0) {
%2 = add i32 %0, -1
ret i32 %2
}
void testLocNonLocSymbolRemainder(int a, int *b) {
  int c = ((int)b) % a;
  if (a == 1) {
    c += 1;
  }
}


x86 assembly (clang, -O0):
<testLocNonLocSymbolRemainder>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1129 <testLocNonLocSymbolRemainder+0x29>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testLocNonLocSymbolRemainder>:
ret

LLVM IR (-O0):
define void @testLocNonLocSymbolRemainder(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = ptrtoint i32* %6 to i32
%8 = load i32, i32* %3
%9 = srem i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
br label %15
15: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @testLocNonLocSymbolRemainder(i32 %0, i32* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void emdns_mem_free(void *data) { free(data); }


x86 assembly (clang, -O0):
<emdns_mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emdns_mem_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @emdns_mem_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @emdns_mem_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fileno(int /*<<< orphan*/ *);
int entrustash_fileno(FILE *f) { return fileno(f); }


x86 assembly (clang, -O0):
<entrustash_fileno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fileno@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entrustash_fileno>:
jmp    1030 <fileno@plt>

LLVM IR (-O0):
define i32 @entrustash_fileno(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fileno(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @entrustash_fileno(i32* nocapture %0) {
%2 = tail call i32 @fileno(i32* %0)
ret i32 %2
}
float wave_saw(float i) { return i; }


x86 assembly (clang, -O0):
<wave_saw>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<wave_saw>:
ret

LLVM IR (-O0):
define float @wave_saw(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @wave_saw(float returned %0) {
ret float %0
}
/* Variables and functions */
int /*<<< orphan*/ AltitudeHoldDesiredHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void AltitudeHoldDesiredUpdated() {
  UAVObjUpdated(AltitudeHoldDesiredHandle());
}


x86 assembly (clang, -O0):
<AltitudeHoldDesiredUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AltitudeHoldDesiredHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AltitudeHoldDesiredUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <AltitudeHoldDesiredHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @AltitudeHoldDesiredUpdated() {
%1 = call i32 (...) @AltitudeHoldDesiredHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AltitudeHoldDesiredUpdated() {
%1 = tail call i32 (...) @AltitudeHoldDesiredHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int divideByTen(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("after division: %d\n", divideByTen(200));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xc8,%edi
call   1030 <divideByTen@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc8,%edi
call   1030 <divideByTen@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"after division: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @divideByTen(i32 200)
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"after division: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @divideByTen(i32 200)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int S_IFREG;
int /*<<< orphan*/ mknod(char const *, int, int /*<<< orphan*/);
int main() {
  mknod("testfile1", S_IFREG | 0644, 0);
  mknod((const char *)-1, S_IFREG | 0644, 0);
  mknod("testfile1", -1, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%esi
or     $0x1a4,%esi
lea    0xecb(%rip),%rdi
xor    %edx,%edx
call   1030 <mknod@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
or     $0x1a4,%esi
mov    $0xffffffffffffffff,%rdi
xor    %edx,%edx
call   1030 <mknod@plt>
lea    0xea0(%rip),%rdi
mov    $0xffffffff,%esi
xor    %edx,%edx
call   1030 <mknod@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
mov    0x2ecc(%rip),%r15
mov    $0x1a4,%ebx
mov    (%r15),%esi
or     %ebx,%esi
lea    0xed3(%rip),%r14
mov    %r14,%rdi
xor    %edx,%edx
call   1030 <mknod@plt>
or     (%r15),%ebx
mov    $0xffffffffffffffff,%rdi
mov    %ebx,%esi
xor    %edx,%edx
call   1030 <mknod@plt>
mov    %r14,%rdi
mov    $0xffffffff,%esi
xor    %edx,%edx
call   1030 <mknod@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [10 x i8] c"testfile1\00"
@S_IFREG = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @S_IFREG
%3 = or i32 %2, 420
%4 = call i32 @mknod(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %3, i32 0)
%5 = load i32, i32* @S_IFREG
%6 = or i32 %5, 420
%7 = call i32 @mknod(i8* inttoptr (i64 -1 to i8*), i32 %6, i32 0)
%8 = call i32 @mknod(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 -1, i32 0)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"testfile1\00"
@S_IFREG = global i32 0
define i32 @main() {
%1 = load i32, i32* @S_IFREG
%2 = or i32 %1, 420
%3 = tail call i32 @mknod(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2, i32 0)
%4 = load i32, i32* @S_IFREG
%5 = or i32 %4, 420
%6 = tail call i32 @mknod(i8* inttoptr (i64 -1 to i8*), i32 %5, i32 0)
%7 = tail call i32 @mknod(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 -1, i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void msg_error_unknown_var(char *s) {
  printf("Error: I can't find %s (are you sure it's in the battlefield?).\n",
         s);
}


x86 assembly (clang, -O0):
<msg_error_unknown_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_error_unknown_var>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [65 x i8] c"Error: I can't find %s (are you sure it's in the battlefield?).\0A\00"
define void @msg_error_unknown_var(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [65 x i8] c"Error: I can't find %s (are you sure it's in the battlefield?).\0A\00"
define void @msg_error_unknown_var(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}