xunge/DecIR huggingface dataset:
char symbolToDraw(char condition, float avgTemp) {
  char symbolFunction5;
  if (condition == 's')
    symbolFunction5 = '@';
  else if (condition == 'c')
    symbolFunction5 = '~';
  else if (condition == 'p' && avgTemp <= 0)
    symbolFunction5 = '*';
  else
    symbolFunction5 = ';';
  return symbolFunction5;
}


x86 assembly (clang, -O0):
<symbolToDraw>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movss  %xmm0,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x73,%eax
jne    1125 <symbolToDraw+0x25>
movb   $0x40,-0x9(%rbp)
jmp    116c <symbolToDraw+0x6c>
movsbl -0x1(%rbp),%eax
cmp    $0x63,%eax
jne    113b <symbolToDraw+0x3b>
movb   $0x7e,-0x9(%rbp)
jmp    1167 <symbolToDraw+0x67>
movsbl -0x1(%rbp),%eax
cmp    $0x70,%eax
jne    115e <symbolToDraw+0x5e>
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jb     115e <symbolToDraw+0x5e>
movb   $0x2a,-0x9(%rbp)
jmp    1162 <symbolToDraw+0x62>
movb   $0x3b,-0x9(%rbp)
jmp    1167 <symbolToDraw+0x67>
jmp    116c <symbolToDraw+0x6c>
movsbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<symbolToDraw>:
cmp    $0x73,%dil
je     110f <symbolToDraw+0xf>
cmp    $0x63,%dil
jne    1112 <symbolToDraw+0x12>
mov    $0x7e,%al
ret
mov    $0x40,%al
ret
xorps  %xmm1,%xmm1
ucomiss %xmm0,%xmm1
mov    $0x2a,%eax
mov    $0x3b,%ecx
cmovb  %ecx,%eax
cmp    $0x70,%dil
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @symbolToDraw(i8 signext %0, float %1) {
%3 = alloca i8
%4 = alloca float
%5 = alloca i8
store i8 %0, i8* %3
store float %1, float* %4
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 115
br i1 %8, label %9, label %10
9: ; preds = %2
store i8 64, i8* %5
br label %26
10: ; preds = %2
%11 = load i8, i8* %3
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 99
br i1 %13, label %14, label %15
14: ; preds = %10
store i8 126, i8* %5
br label %25
15: ; preds = %10
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 112
br i1 %18, label %19, label %23
19: ; preds = %15
%20 = load float, float* %4
%21 = fcmp ole float %20, 0.000000e+00
br i1 %21, label %22, label %23
22: ; preds = %19
store i8 42, i8* %5
br label %24
23: ; preds = %19, %15
store i8 59, i8* %5
br label %24
24: ; preds = %23, %22
br label %25
25: ; preds = %24, %14
br label %26
26: ; preds = %25, %9
%27 = load i8, i8* %5
ret i8 %27
}

LLVM IR (-O2):
define signext i8 @symbolToDraw(i8 signext %0, float %1) {
switch i8 %0, label %4 [
i8 115, label %9
i8 99, label %3
]
3: ; preds = %2
br label %9
4: ; preds = %2
%5 = icmp eq i8 %0, 112
%6 = fcmp ole float %1, 0.000000e+00
%7 = and i1 %5, %6
%8 = select i1 %7, i8 42, i8 59
br label %9
9: ; preds = %4, %2, %3
%10 = phi i8 [ 126, %3 ], [ 64, %2 ], [ %8, %4 ]
ret i8 %10
}
void ECPKParameters_print(void) {}


x86 assembly (clang, -O0):
<ECPKParameters_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECPKParameters_print>:
ret

LLVM IR (-O0):
define void @ECPKParameters_print() {
ret void
}

LLVM IR (-O2):
define void @ECPKParameters_print() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool mp2vpicx_get_qscale(const uint8_t *p_mp2vpicx) {
  return !!(p_mp2vpicx[7] & 0x10);
}


x86 assembly (clang, -O0):
<mp2vpicx_get_qscale>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1c(%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vpicx_get_qscale>:
mov    0x1c(%rdi),%eax
shr    $0x4,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mp2vpicx_get_qscale(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 7
%5 = load i32, i32* %4
%6 = and i32 %5, 16
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @mp2vpicx_get_qscale(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 7
%3 = load i32, i32* %2
%4 = lshr i32 %3, 4
%5 = and i32 %4, 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ printf(char *, ...);
char *strtok(char *, char *);
void prtstr(char *string) {
  char *printable;
  printable = strtok(string, "\"");
  if (printable == NULL)
    printf("\n");
  else
    printf("%s", printable);
  free(string);
}


x86 assembly (clang, -O0):
<prtstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1050 <strtok@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116e <prtstr+0x3e>
lea    0xea0(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    1180 <prtstr+0x50>
mov    -0x10(%rbp),%rsi
lea    0xe8b(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prtstr>:
push   %rbx
mov    %rdi,%rbx
lea    0xeb5(%rip),%rsi
call   1060 <strtok@plt>
test   %rax,%rax
je     1168 <prtstr+0x28>
lea    0xea6(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1050 <printf@plt>
jmp    1172 <prtstr+0x32>
mov    $0xa,%edi
call   1040 <putchar@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\22\00"
@.str.1 = [2 x i8] c"\0A\00"
@.str.2 = [3 x i8] c"%s\00"
define void @prtstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strtok(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %13
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10, %8
%14 = load i8*, i8** %2
%15 = call i32 @free(i8* %14)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\22\00"
@.str.2 = [3 x i8] c"%s\00"
define void @prtstr(i8* %0) {
%2 = tail call i8* @strtok(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @putchar(i32 10)
br label %8
6: ; preds = %1
%7 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* %2)
br label %8
8: ; preds = %6, %4
%9 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int Camellia_set_key(const unsigned char *userKey, const int bits, void *key) {
  printf("Camellia_set_key stubbed\n");
  (void)&(userKey);
  (void)&(bits);
  (void)&(key);
  return 0;
}


x86 assembly (clang, -O0):
<Camellia_set_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Camellia_set_key>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Camellia_set_key stubbed\0A\00"
define i32 @Camellia_set_key(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Camellia_set_key stubbed\00"
define i32 @Camellia_set_key(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int dcr_read(int, unsigned int *);
int mvpstb_get_lbox_offset(unsigned int *offset) {
  return (dcr_read(0x140 + 0x3b, offset));
}


x86 assembly (clang, -O0):
<mvpstb_get_lbox_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x17b,%edi
call   1030 <dcr_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvpstb_get_lbox_offset>:
mov    %rdi,%rsi
mov    $0x17b,%edi
jmp    1030 <dcr_read@plt>

LLVM IR (-O0):
define i32 @mvpstb_get_lbox_offset(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @dcr_read(i32 379, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mvpstb_get_lbox_offset(i32* %0) {
%2 = tail call i32 @dcr_read(i32 379, i32* %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ u_int8_t;
struct in6_addr {
  scalar_t__ *s6_addr;
};

/* Variables and functions */
unsigned int in6_addr_hash(void *val) {
  u_int8_t *addr = ((struct in6_addr *)val)->s6_addr;
  unsigned int hash = 0;
  int i;
  for (i = 0; i < 16; i++) {
    hash += addr[i];
  }
  return (hash);
}


x86 assembly (clang, -O0):
<in6_addr_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x10,-0x18(%rbp)
jge    114e <in6_addr_hash+0x4e>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rcx
mov    -0x14(%rbp),%eax
add    %rcx,%rax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1121 <in6_addr_hash+0x21>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in6_addr_hash>:
mov    (%rdi),%rax
movups (%rax),%xmm0
movups 0x10(%rax),%xmm1
shufps $0x88,%xmm1,%xmm0
movups 0x20(%rax),%xmm1
movups 0x30(%rax),%xmm2
shufps $0x88,%xmm2,%xmm1
movups 0x70(%rax),%xmm2
movups 0x60(%rax),%xmm3
shufps $0x88,%xmm2,%xmm3
paddd  %xmm1,%xmm3
movups 0x50(%rax),%xmm1
movups 0x40(%rax),%xmm2
shufps $0x88,%xmm1,%xmm2
paddd  %xmm0,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xee,%xmm2,%xmm0
paddd  %xmm2,%xmm0
pshufd $0x55,%xmm0,%xmm1
paddd  %xmm0,%xmm1
movd   %xmm1,%eax
ret

LLVM IR (-O0):
%struct.in6_addr = type { i64* }
define i32 @in6_addr_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to %struct.in6_addr*
%8 = getelementptr inbounds %struct.in6_addr, %struct.in6_addr* %7, i32 0, i32 0
%9 = load i64*, i64** %8
store i64* %9, i64** %3
store i32 0, i32* %4
store i32 0, i32* %5
br label %10
10: ; preds = %23, %1
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 16
br i1 %12, label %13, label %26
13: ; preds = %10
%14 = load i64*, i64** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i64, i64* %14, i64 %16
%18 = load i64, i64* %17
%19 = load i32, i32* %4
%20 = zext i32 %19 to i64
%21 = add nsw i64 %20, %18
%22 = trunc i64 %21 to i32
store i32 %22, i32* %4
br label %23
23: ; preds = %13
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %10
26: ; preds = %10
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @in6_addr_hash(i8* nocapture %0) {
%2 = bitcast i8* %0 to <16 x i64>**
%3 = load <16 x i64>*, <16 x i64>** %2
%4 = load <16 x i64>, <16 x i64>* %3
%5 = trunc <16 x i64> %4 to <16 x i32>
%6 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %5)
ret i32 %6
}
void gtk_text_view_get_right_margin() {}


x86 assembly (clang, -O0):
<gtk_text_view_get_right_margin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_get_right_margin>:
ret

LLVM IR (-O0):
define void @gtk_text_view_get_right_margin() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_get_right_margin() {
ret void
}
void usb_qdss_free_req(struct usb_qdss_ch *ch) {}


x86 assembly (clang, -O0):
<usb_qdss_free_req>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_qdss_free_req>:
ret

LLVM IR (-O0):
%struct.usb_qdss_ch = type opaque
define void @usb_qdss_free_req(%struct.usb_qdss_ch* %0) {
%2 = alloca %struct.usb_qdss_ch*
store %struct.usb_qdss_ch* %0, %struct.usb_qdss_ch** %2
ret void
}

LLVM IR (-O2):
%struct.usb_qdss_ch = type opaque
define void @usb_qdss_free_req(%struct.usb_qdss_ch* nocapture %0) {
ret void
}
int compare(void *a, void *b) { return ((int)a) - ((int)b); }


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    %rdi,%rax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i32
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i32
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @compare(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = trunc i64 %3 to i32
%5 = ptrtoint i8* %1 to i64
%6 = trunc i64 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
int floatToInt24(float a) {
  int out = ((int)(a * 2147483648.0));
  return (out >> 8);
}


x86 assembly (clang, -O0):
<floatToInt24>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatToInt24>:
cvtss2sd %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
cvttsd2si %xmm0,%eax
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @floatToInt24(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fmul double %5, 0x41E0000000000000
%7 = fptosi double %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = ashr i32 %8, 8
ret i32 %9
}

LLVM IR (-O2):
define i32 @floatToInt24(float %0) {
%2 = fpext float %0 to double
%3 = fmul double %2, 0x41E0000000000000
%4 = fptosi double %3 to i32
%5 = ashr i32 %4, 8
ret i32 %5
}
int fun515() { return 515; }


x86 assembly (clang, -O0):
<fun515>:
push   %rbp
mov    %rsp,%rbp
mov    $0x203,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun515>:
mov    $0x203,%eax
ret

LLVM IR (-O0):
define i32 @fun515() {
ret i32 515
}

LLVM IR (-O2):
define i32 @fun515() {
ret i32 515
}
/* Variables and functions */
void *newState_0(void) { return NULL; }


x86 assembly (clang, -O0):
<newState_0>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<newState_0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @newState_0() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @newState_0() {
ret i8* null
}
double limit(double v, double min, double max) {
  if (v < min)
    return min;
  if (v > max)
    return max;
  return v;
}


x86 assembly (clang, -O0):
<limit>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1136 <limit+0x36>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    115f <limit+0x5f>
movsd  -0x10(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1155 <limit+0x55>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    115f <limit+0x5f>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<limit>:
minsd  %xmm0,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm3
andnpd %xmm2,%xmm3
andpd  %xmm1,%xmm0
orpd   %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @limit(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%8 = load double, double* %5
%9 = load double, double* %6
%10 = fcmp olt double %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load double, double* %6
store double %12, double* %4
br label %21
13: ; preds = %3
%14 = load double, double* %5
%15 = load double, double* %7
%16 = fcmp ogt double %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load double, double* %7
store double %18, double* %4
br label %21
19: ; preds = %13
%20 = load double, double* %5
store double %20, double* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load double, double* %4
ret double %22
}

LLVM IR (-O2):
define double @limit(double %0, double %1, double %2) {
%4 = fcmp olt double %0, %1
%5 = fcmp ogt double %0, %2
%6 = select i1 %5, double %2, double %0
%7 = select i1 %4, double %1, double %6
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ si475xAMRX_tune(unsigned short);
void si47xxAMRX_tune(int channel) {
  si475xAMRX_tune((unsigned short)(channel & 0xffff));
}


x86 assembly (clang, -O0):
<si47xxAMRX_tune>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
movzwl %ax,%edi
call   1030 <si475xAMRX_tune@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<si47xxAMRX_tune>:
movzwl %di,%edi
jmp    1030 <si475xAMRX_tune@plt>

LLVM IR (-O0):
define void @si47xxAMRX_tune(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65535
%5 = trunc i32 %4 to i16
%6 = call i32 @si475xAMRX_tune(i16 zeroext %5)
ret void
}

LLVM IR (-O2):
define void @si47xxAMRX_tune(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i32 @si475xAMRX_tune(i16 zeroext %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGHUP;
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIGKILL;
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void rc_disable_signal_handler() {
  signal(SIGINT, SIG_DFL);
  signal(SIGKILL, SIG_DFL);
  signal(SIGHUP, SIG_DFL);
  return;
}


x86 assembly (clang, -O0):
<rc_disable_signal_handler>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
mov    0x2e7e(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rc_disable_signal_handler>:
push   %rbx
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rbx
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%esi
pop    %rbx
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_DFL = global i32 0
@SIGKILL = global i32 0
@SIGHUP = global i32 0
define void @rc_disable_signal_handler() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_DFL
%3 = call i32 @signal(i32 %1, i32 %2)
%4 = load i32, i32* @SIGKILL
%5 = load i32, i32* @SIG_DFL
%6 = call i32 @signal(i32 %4, i32 %5)
%7 = load i32, i32* @SIGHUP
%8 = load i32, i32* @SIG_DFL
%9 = call i32 @signal(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_DFL = global i32 0
@SIGKILL = global i32 0
@SIGHUP = global i32 0
define void @rc_disable_signal_handler() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_DFL
%3 = tail call i32 @signal(i32 %1, i32 %2)
%4 = load i32, i32* @SIGKILL
%5 = load i32, i32* @SIG_DFL
%6 = tail call i32 @signal(i32 %4, i32 %5)
%7 = load i32, i32* @SIGHUP
%8 = load i32, i32* @SIG_DFL
%9 = tail call i32 @signal(i32 %7, i32 %8)
ret void
}
int test_imm_48int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x48 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_48int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x48,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_48int64_midword_mem>:
testb  $0x48,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_48int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 72
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_48int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 4718592
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
const char *Get_Brief(void) { return "Gettable or Settable"; }


x86 assembly (clang, -O0):
<Get_Brief>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Get_Brief>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Gettable or Settable\00"
define i8* @Get_Brief() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [21 x i8] c"Gettable or Settable\00"
define i8* @Get_Brief() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct qt_atom {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct qt_atom *);
void free_tkhd(struct qt_atom *self) { free(self); }


x86 assembly (clang, -O0):
<free_tkhd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_tkhd>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.qt_atom = type { i32 }
define void @free_tkhd(%struct.qt_atom* %0) {
%2 = alloca %struct.qt_atom*
store %struct.qt_atom* %0, %struct.qt_atom** %2
%3 = load %struct.qt_atom*, %struct.qt_atom** %2
%4 = call i32 @free(%struct.qt_atom* %3)
ret void
}

LLVM IR (-O2):
%struct.qt_atom = type { i32 }
define void @free_tkhd(%struct.qt_atom* nocapture %0) {
%2 = tail call i32 @free(%struct.qt_atom* %0)
ret void
}
/* Type definitions */
struct cec_msg {
  int len;
  int /*<<< orphan*/ *msg;
};
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
int /*<<< orphan*/ CEC_MSG_SET_SYSTEM_AUDIO_MODE;
void cec_msg_set_system_audio_mode(struct cec_msg *msg, __u8 sys_aud_status) {
  msg->len = 3;
  msg->msg[1] = CEC_MSG_SET_SYSTEM_AUDIO_MODE;
  msg->msg[2] = sys_aud_status;
}


x86 assembly (clang, -O0):
<cec_msg_set_system_audio_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x3,(%rax)
mov    0x2ecc(%rip),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cec_msg_set_system_audio_mode>:
movl   $0x3,(%rdi)
mov    0x2edb(%rip),%rax
mov    (%rax),%eax
mov    0x8(%rdi),%rcx
mov    %eax,0x4(%rcx)
mov    %esi,0x8(%rcx)
ret

LLVM IR (-O0):
%struct.cec_msg = type { i32, i32* }
@CEC_MSG_SET_SYSTEM_AUDIO_MODE = global i32 0
define void @cec_msg_set_system_audio_mode(%struct.cec_msg* %0, i32 %1) {
%3 = alloca %struct.cec_msg*
%4 = alloca i32
store %struct.cec_msg* %0, %struct.cec_msg** %3
store i32 %1, i32* %4
%5 = load %struct.cec_msg*, %struct.cec_msg** %3
%6 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %5, i32 0, i32 0
store i32 3, i32* %6
%7 = load i32, i32* @CEC_MSG_SET_SYSTEM_AUDIO_MODE
%8 = load %struct.cec_msg*, %struct.cec_msg** %3
%9 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %8, i32 0, i32 1
%10 = load i32*, i32** %9
%11 = getelementptr inbounds i32, i32* %10, i64 1
store i32 %7, i32* %11
%12 = load i32, i32* %4
%13 = load %struct.cec_msg*, %struct.cec_msg** %3
%14 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %13, i32 0, i32 1
%15 = load i32*, i32** %14
%16 = getelementptr inbounds i32, i32* %15, i64 2
store i32 %12, i32* %16
ret void
}

LLVM IR (-O2):
%struct.cec_msg = type { i32, i32* }
@CEC_MSG_SET_SYSTEM_AUDIO_MODE = global i32 0
define void @cec_msg_set_system_audio_mode(%struct.cec_msg* nocapture %0, i32 %1) {
%3 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %0, i64 0, i32 0
store i32 3, i32* %3
%4 = load i32, i32* @CEC_MSG_SET_SYSTEM_AUDIO_MODE
%5 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %0, i64 0, i32 1
%6 = load i32*, i32** %5
%7 = getelementptr inbounds i32, i32* %6, i64 1
store i32 %4, i32* %7
%8 = getelementptr inbounds i32, i32* %6, i64 2
store i32 %1, i32* %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int /*<<< orphan*/ ungetc(int, int /*<<< orphan*/ *);
int peek(FILE *f) {
  int c = fgetc(f);
  if (c >= 0)
    ungetc(c, f);
  return c;
}


x86 assembly (clang, -O0):
<peek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     114e <peek+0x2e>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   1040 <ungetc@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<peek>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <fgetc@plt>
mov    %eax,%ebp
test   %eax,%eax
js     113b <peek+0x1b>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1040 <ungetc@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @peek(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fgetc(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %3
%10 = load i32*, i32** %2
%11 = call i32 @ungetc(i32 %9, i32* %10)
br label %12
12: ; preds = %8, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @peek(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
%3 = icmp sgt i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @ungetc(i32 %2, i32* %0)
br label %6
6: ; preds = %4, %1
ret i32 %2
}
void port_io_write_byte(unsigned short port, unsigned char data) {
  __asm__("out %%al, %%dx" : : "a"(data), "d"(port));
}


x86 assembly (clang, -O0):
<port_io_write_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    -0x2(%rbp),%dx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_io_write_byte>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @port_io_write_byte(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @port_io_write_byte(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "out %al, %dx", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 %1, i16 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x17() {
  Assert_real((isbdigit(23) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              120, ("isbdigit should be 0 for 0x17"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x17>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x78,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x17>:
push   %rax
mov    $0x17,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x78,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x17\00"
define void @t_isbdigit_0x17() {
%1 = call i64 @isbdigit(i32 23)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 120, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x17\00"
define void @t_isbdigit_0x17() {
%1 = tail call i64 @isbdigit(i32 23)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 120, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void PGMHandlerPhysicalPageTempOff(void) {}


x86 assembly (clang, -O0):
<PGMHandlerPhysicalPageTempOff>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PGMHandlerPhysicalPageTempOff>:
ret

LLVM IR (-O0):
define void @PGMHandlerPhysicalPageTempOff() {
ret void
}

LLVM IR (-O2):
define void @PGMHandlerPhysicalPageTempOff() {
ret void
}
/* Variables and functions */
int a();
int b();
int d() { return a() + b(); }


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <a@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <b@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
push   %rbx
xor    %eax,%eax
call   1040 <a@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <b@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @d() {
%1 = call i32 (...) @a()
%2 = call i32 (...) @b()
%3 = add nsw i32 %1, %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @d() {
%1 = tail call i32 (...) @a()
%2 = tail call i32 (...) @b()
%3 = add nsw i32 %2, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ GL_LINES;
int /*<<< orphan*/ drawVertex2f(float, float);
int /*<<< orphan*/ glBegin(int /*<<< orphan*/);
int /*<<< orphan*/ glEnd();
void drawLine(float x1, float y1, float x2, float y2) {
  glBegin(GL_LINES);
  drawVertex2f(x1, y1);
  drawVertex2f(x2, y2);
  glEnd();
}


x86 assembly (clang, -O0):
<drawLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1050 <glBegin@plt>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <drawVertex2f@plt>
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
call   1030 <drawVertex2f@plt>
mov    $0x0,%al
call   1040 <glEnd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawLine>:
sub    $0x18,%rsp
movss  %xmm3,0x14(%rsp)
movss  %xmm2,0x10(%rsp)
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1050 <glBegin@plt>
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
call   1030 <drawVertex2f@plt>
movss  0x10(%rsp),%xmm0
movss  0x14(%rsp),%xmm1
call   1030 <drawVertex2f@plt>
xor    %eax,%eax
add    $0x18,%rsp
jmp    1040 <glEnd@plt>

LLVM IR (-O0):
@GL_LINES = global i32 0
define void @drawLine(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load i32, i32* @GL_LINES
%10 = call i32 @glBegin(i32 %9)
%11 = load float, float* %5
%12 = load float, float* %6
%13 = call i32 @drawVertex2f(float %11, float %12)
%14 = load float, float* %7
%15 = load float, float* %8
%16 = call i32 @drawVertex2f(float %14, float %15)
%17 = call i32 (...) @glEnd()
ret void
}

LLVM IR (-O2):
@GL_LINES = global i32 0
define void @drawLine(float %0, float %1, float %2, float %3) {
%5 = load i32, i32* @GL_LINES
%6 = tail call i32 @glBegin(i32 %5)
%7 = tail call i32 @drawVertex2f(float %0, float %1)
%8 = tail call i32 @drawVertex2f(float %2, float %3)
%9 = tail call i32 (...) @glEnd()
ret void
}
int Regexp__identifier_char(int c) {
  if ((c == '_') || (c == ':') || ((c >= 'A') && (c <= 'Z')) ||
      ((c >= 'a') && (c <= 'z')) || ((c >= '0') && (c <= '9')))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<Regexp__identifier_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5f,-0x8(%rbp)
je     1157 <Regexp__identifier_char+0x57>
cmpl   $0x3a,-0x8(%rbp)
je     1157 <Regexp__identifier_char+0x57>
cmpl   $0x41,-0x8(%rbp)
jl     112f <Regexp__identifier_char+0x2f>
cmpl   $0x5a,-0x8(%rbp)
jle    1157 <Regexp__identifier_char+0x57>
cmpl   $0x61,-0x8(%rbp)
jl     1143 <Regexp__identifier_char+0x43>
cmpl   $0x7a,-0x8(%rbp)
jle    1157 <Regexp__identifier_char+0x57>
cmpl   $0x30,-0x8(%rbp)
jl     1163 <Regexp__identifier_char+0x63>
cmpl   $0x39,-0x8(%rbp)
jg     1163 <Regexp__identifier_char+0x63>
movl   $0x1,-0x4(%rbp)
jmp    116a <Regexp__identifier_char+0x6a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Regexp__identifier_char>:
mov    $0x1,%eax
cmp    $0x3a,%edi
je     110f <Regexp__identifier_char+0xf>
cmp    $0x5f,%edi
jne    1110 <Regexp__identifier_char+0x10>
ret
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
add    $0xffffffd0,%edi
cmp    $0xa,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @Regexp__identifier_char(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 95
br i1 %5, label %27, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 58
br i1 %8, label %27, label %9
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 90
br i1 %14, label %27, label %15
15: ; preds = %12, %9
%16 = load i32, i32* %3
%17 = icmp sge i32 %16, 97
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i32, i32* %3
%20 = icmp sle i32 %19, 122
br i1 %20, label %27, label %21
21: ; preds = %18, %15
%22 = load i32, i32* %3
%23 = icmp sge i32 %22, 48
br i1 %23, label %24, label %28
24: ; preds = %21
%25 = load i32, i32* %3
%26 = icmp sle i32 %25, 57
br i1 %26, label %27, label %28
27: ; preds = %24, %18, %12, %6, %1
store i32 1, i32* %2
br label %29
28: ; preds = %24, %21
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @Regexp__identifier_char(i32 %0) {
switch i32 %0, label %2 [
i32 95, label %10
i32 58, label %10
]
2: ; preds = %1
%3 = and i32 %0, -33
%4 = add i32 %3, -65
%5 = icmp ult i32 %4, 26
%6 = add i32 %0, -48
%7 = icmp ult i32 %6, 10
%8 = or i1 %7, %5
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %2, %1, %1
%11 = phi i32 [ 1, %1 ], [ 1, %1 ], [ %9, %2 ]
ret i32 %11
}
int _gettimeofday_r(struct _reent *r, struct timeval *p, struct timezone *z) {
  return -1;
}


x86 assembly (clang, -O0):
<_gettimeofday_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gettimeofday_r>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct._reent = type opaque
%struct.timeval = type opaque
%struct.timezone = type opaque
define i32 @_gettimeofday_r(%struct._reent* %0, %struct.timeval* %1, %struct.timezone* %2) {
%4 = alloca %struct._reent*
%5 = alloca %struct.timeval*
%6 = alloca %struct.timezone*
store %struct._reent* %0, %struct._reent** %4
store %struct.timeval* %1, %struct.timeval** %5
store %struct.timezone* %2, %struct.timezone** %6
ret i32 -1
}

LLVM IR (-O2):
%struct._reent = type opaque
%struct.timeval = type opaque
%struct.timezone = type opaque
define i32 @_gettimeofday_r(%struct._reent* nocapture readnone %0, %struct.timeval* nocapture readnone %1, %struct.timezone* nocapture readnone %2) {
ret i32 -1
}
void NOP(void) { __asm__ __volatile__("NOP;"); }


x86 assembly (clang, -O0):
<NOP>:
push   %rbp
mov    %rsp,%rbp
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOP>:
nop
ret

LLVM IR (-O0):
define void @NOP() {
ret void
}

LLVM IR (-O2):
define void @NOP() {
tail call void asm sideeffect "NOP;", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ Machine_Check(int, char *);
void set_byte(int32_t id, int32_t addr, int32_t value) {
  Machine_Check(0x00000008 | 0x00000002, "gen_io registers are word wide");
}


x86 assembly (clang, -O0):
<set_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0xa,%edi
lea    0xed3(%rip),%rsi
call   1030 <Machine_Check@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_byte>:
lea    0xee9(%rip),%rsi
mov    $0xa,%edi
jmp    1030 <Machine_Check@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"gen_io registers are word wide\00"
define void @set_byte(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @Machine_Check(i32 10, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"gen_io registers are word wide\00"
define void @set_byte(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @Machine_Check(i32 10, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int SQLITE_OK;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int sqlite3_close(int /*<<< orphan*/ *);
char *sqlite3_errmsg(int /*<<< orphan*/ *);
void close_db(sqlite3 *db) {
  int rc = sqlite3_close(db);
  if (rc != SQLITE_OK) {
    printf("can't close the database:%s\n", sqlite3_errmsg(db));
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<close_db>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <sqlite3_close@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2e86(%rip),%rcx
cmp    (%rcx),%eax
je     1190 <close_db+0x50>
mov    -0x8(%rbp),%rdi
call   1040 <sqlite3_errmsg@plt>
mov    %rax,%rsi
lea    0xe83(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e4f(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_db>:
push   %rbx
mov    %rdi,%rbx
call   1050 <sqlite3_close@plt>
mov    0x2e98(%rip),%rcx
cmp    (%rcx),%eax
jne    1156 <close_db+0x16>
pop    %rbx
ret
mov    %rbx,%rdi
call   1040 <sqlite3_errmsg@plt>
lea    0xe9b(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    0x2e64(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@SQLITE_OK = global i32 0
@.str = [29 x i8] c"can't close the database:%s\0A\00"
@EXIT_FAILURE = global i32 0
define void @close_db(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @sqlite3_close(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* @SQLITE_OK
%8 = icmp ne i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %1
%10 = load i32*, i32** %2
%11 = call i8* @sqlite3_errmsg(i32* %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = load i32, i32* @EXIT_FAILURE
%14 = call i32 @exit(i32 %13)
unreachable
15: ; preds = %1
ret void
}

LLVM IR (-O2):
@SQLITE_OK = global i32 0
@.str = [29 x i8] c"can't close the database:%s\0A\00"
@EXIT_FAILURE = global i32 0
define void @close_db(i32* %0) {
%2 = tail call i32 @sqlite3_close(i32* %0)
%3 = load i32, i32* @SQLITE_OK
%4 = icmp eq i32 %2, %3
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = tail call i8* @sqlite3_errmsg(i32* %0)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *, char const *);
char *strerror(int);
int glob_errfunc(const char *epath, int errno) {
  printf("%d %s: %s\n", errno, strerror(errno), epath);
  return 0;
}


x86 assembly (clang, -O0):
<glob_errfunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <strerror@plt>
mov    -0x10(%rbp),%esi
mov    %rax,%rdx
mov    -0x8(%rbp),%rcx
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glob_errfunc>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    %esi,%edi
call   1040 <strerror@plt>
lea    0xec9(%rip),%rdi
mov    %ebx,%esi
mov    %rax,%rdx
mov    %r14,%rcx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%d %s: %s\0A\00"
define i32 @glob_errfunc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %4
%7 = call i8* @strerror(i32 %6)
%8 = load i8*, i8** %3
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %7, i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"%d %s: %s\0A\00"
define i32 @glob_errfunc(i8* %0, i32 %1) {
%3 = tail call i8* @strerror(i32 %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %3, i8* %0)
ret i32 0
}
int strleng(const char *str) {
  int i = 0;
  while (*(str + i))
    i++;
  return i;
}


x86 assembly (clang, -O0):
<strleng>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     112f <strleng+0x2f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strleng+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strleng>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <strleng+0x10>
ret

LLVM IR (-O0):
define i32 @strleng(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @strleng(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char const *, int);
void ft_putstr_fd(char const *s, int fd) {
  int i;
  i = 0;
  while (s[i])
    write(fd, &s[i++], 1);
}


x86 assembly (clang, -O0):
<ft_putstr_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     115e <ft_putstr_fd+0x4e>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x10(%rbp)
cltq
add    %rax,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
jmp    1126 <ft_putstr_fd+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr_fd>:
push   %rbp
push   %rbx
push   %rax
cmpb   $0x0,(%rdi)
je     1139 <ft_putstr_fd+0x29>
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   (%rax)
mov    %ebp,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmpb   $0x0,0x1(%rbx)
lea    0x1(%rbx),%rbx
jne    1120 <ft_putstr_fd+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ft_putstr_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i8*, i8** %3
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %21
13: ; preds = %6
%14 = load i32, i32* %4
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
%18 = sext i32 %16 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
%20 = call i32 @write(i32 %14, i8* %19, i32 1)
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ft_putstr_fd(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %8, %5 ], [ 0, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = add nuw i64 %6, 1
%9 = tail call i32 @write(i32 %1, i8* %7, i32 1)
%10 = getelementptr inbounds i8, i8* %0, i64 %8
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void core(int signal) { exit(signal); }


x86 assembly (clang, -O0):
<core>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<core>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define void @core(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @core(i32 %0) {
%2 = tail call i32 @exit(i32 %0)
unreachable
}
const char *Swap_Brief(void) { return "Swapable"; }


x86 assembly (clang, -O0):
<Swap_Brief>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Swap_Brief>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Swapable\00"
define i8* @Swap_Brief() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"Swapable\00"
define i8* @Swap_Brief() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef scalar_t__ off_t;

/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ memmove(char *, char const *, size_t const);
int memcopy_bytes(const char *in, char *out, const off_t in_offset,
                  const off_t out_offset, const size_t bytes) {
  memmove(out + (size_t)out_offset, in + (size_t)in_offset, bytes);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<memcopy_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
add    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
add    -0x18(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1030 <memmove@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcopy_bytes>:
push   %rax
lea    (%rsi,%rcx,1),%rax
lea    (%rdi,%rdx,1),%rsi
mov    %rax,%rdi
mov    %r8,%rdx
call   1030 <memmove@plt>
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @memcopy_bytes(i8* %0, i8* %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%11 = load i8*, i8** %7
%12 = load i64, i64* %9
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8*, i8** %6
%15 = load i64, i64* %8
%16 = getelementptr inbounds i8, i8* %14, i64 %15
%17 = load i64, i64* %10
%18 = call i32 @memmove(i8* %13, i8* %16, i64 %17)
%19 = load i32, i32* @EXIT_SUCCESS
ret i32 %19
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @memcopy_bytes(i8* %0, i8* %1, i64 %2, i64 %3, i64 %4) {
%6 = getelementptr inbounds i8, i8* %1, i64 %3
%7 = getelementptr inbounds i8, i8* %0, i64 %2
%8 = tail call i32 @memmove(i8* %6, i8* %7, i64 %4)
%9 = load i32, i32* @EXIT_SUCCESS
ret i32 %9
}