xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ halTimerClearAllInterrupts(int);
int /*<<< orphan*/ halTimerReset(int);
void irqTimerResetCounterAndInterrupt(void) {
  halTimerReset(0x49032000);
  halTimerClearAllInterrupts(0x49032000);
}


x86 assembly (clang, -O0):
<irqTimerResetCounterAndInterrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x49032000,%edi
call   1040 <halTimerReset@plt>
mov    $0x49032000,%edi
call   1030 <halTimerClearAllInterrupts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<irqTimerResetCounterAndInterrupt>:
push   %rax
mov    $0x49032000,%edi
call   1040 <halTimerReset@plt>
mov    $0x49032000,%edi
pop    %rax
jmp    1030 <halTimerClearAllInterrupts@plt>

LLVM IR (-O0):
define void @irqTimerResetCounterAndInterrupt() {
%1 = call i32 @halTimerReset(i32 1224941568)
%2 = call i32 @halTimerClearAllInterrupts(i32 1224941568)
ret void
}

LLVM IR (-O2):
define void @irqTimerResetCounterAndInterrupt() {
%1 = tail call i32 @halTimerReset(i32 1224941568)
%2 = tail call i32 @halTimerClearAllInterrupts(i32 1224941568)
ret void
}
int test_imm_72int32_mem(int *val) {
  return ((*val) & (0x72 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_72int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x72,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_72int32_mem>:
testb  $0x72,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_72int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 114
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_72int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 114
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ ESRCH;
int __kill(int, int, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int killpg(pid_t pgid, int sig) {
  if (pgid == 1) {
    errno = ESRCH;
    return (-1);
  }
  return (__kill(-pgid, sig, 0));
}


x86 assembly (clang, -O0):
<killpg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1146 <killpg+0x36>
mov    0x2ea1(%rip),%rax
mov    (%rax),%ecx
mov    0x2ea8(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1158 <killpg+0x48>
xor    %edi,%edi
sub    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <__kill@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<killpg>:
cmp    $0x1,%edi
jne    112d <killpg+0x1d>
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
mov    0x2ebb(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret
neg    %edi
xor    %edx,%edx
jmp    1030 <__kill@plt>

LLVM IR (-O0):
@ESRCH = global i32 0
@errno = global i32 0
define i32 @killpg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* @ESRCH
store i32 %9, i32* @errno
store i32 -1, i32* %3
br label %15
10: ; preds = %2
%11 = load i32, i32* %4
%12 = sub nsw i32 0, %11
%13 = load i32, i32* %5
%14 = call i32 @__kill(i32 %12, i32 %13, i32 0)
store i32 %14, i32* %3
br label %15
15: ; preds = %10, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@ESRCH = global i32 0
@errno = global i32 0
define i32 @killpg(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = load i32, i32* @ESRCH
store i32 %5, i32* @errno
br label %9
6: ; preds = %2
%7 = sub nsw i32 0, %0
%8 = tail call i32 @__kill(i32 %7, i32 %1, i32 0)
br label %9
9: ; preds = %6, %4
%10 = phi i32 [ -1, %4 ], [ %8, %6 ]
ret i32 %10
}
void doStuff_pointerToPointerToConstInt(int const **u) {}


x86 assembly (clang, -O0):
<doStuff_pointerToPointerToConstInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<doStuff_pointerToPointerToConstInt>:
ret

LLVM IR (-O0):
define void @doStuff_pointerToPointerToConstInt(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
ret void
}

LLVM IR (-O2):
define void @doStuff_pointerToPointerToConstInt(i32** nocapture %0) {
ret void
}
int real_while_constant() {
  int i = 0;
  int j = 3 * i;
  while (i < 30) {
    j = j + i;
    i++;
  }
  return j;
}


x86 assembly (clang, -O0):
<real_while_constant>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1e,-0x4(%rbp)
jge    1133 <real_while_constant+0x33>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1112 <real_while_constant+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<real_while_constant>:
mov    $0x1b3,%eax
ret

LLVM IR (-O0):
define i32 @real_while_constant() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %1
%4 = mul nsw i32 3, %3
store i32 %4, i32* %2
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 30
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = load i32, i32* %2
%10 = load i32, i32* %1
%11 = add nsw i32 %9, %10
store i32 %11, i32* %2
%12 = load i32, i32* %1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %1
br label %5
14: ; preds = %5
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @real_while_constant() {
ret i32 435
}
short int cast_char_short(char x) { return (short int)x; }


x86 assembly (clang, -O0):
<cast_char_short>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_char_short>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @cast_char_short(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define signext i16 @cast_char_short(i8 signext %0) {
%2 = sext i8 %0 to i16
ret i16 %2
}
/* Type definitions */
typedef scalar_t__ uint64_t;
struct timespec {
  unsigned long long tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_BOOTTIME;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
uint64_t nanos_since_boot() {
  struct timespec t;
  clock_gettime(CLOCK_BOOTTIME, &t);
  return t.tv_sec * 1000000000ULL + t.tv_nsec;
}


x86 assembly (clang, -O0):
<nanos_since_boot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,-0x10(%rbp),%rax
3b
add    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanos_since_boot>:
sub    $0x18,%rsp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,0x8(%rsp),%rax
9a 3b
add    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
@CLOCK_BOOTTIME = global i32 0
define i64 @nanos_since_boot() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_BOOTTIME
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%5 = load i64, i64* %4
%6 = mul i64 %5, 1000000000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%8 = load i64, i64* %7
%9 = add i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
@CLOCK_BOOTTIME = global i32 0
define i64 @nanos_since_boot() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_BOOTTIME
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = mul i64 %6, 1000000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i64, i64* %8
%10 = add i64 %7, %9
ret i64 %10
}
/* Variables and functions */
int j(int);
int i(int n) { return j(n); }


x86 assembly (clang, -O0):
<i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <j@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i>:
jmp    1030 <j@plt>

LLVM IR (-O0):
define i32 @i(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @j(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @i(i32 %0) {
%2 = tail call i32 @j(i32 %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(unsigned char *, char *, int);
int strlen(char *);
unsigned char *from_command_line_raw(char *arg1, int *data_size) {
  0;
  *data_size = strlen(arg1);
  unsigned char *data = (unsigned char *)malloc(*data_size);
  memcpy(data, arg1, *data_size);
  return data;
}


x86 assembly (clang, -O0):
<from_command_line_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_command_line_raw>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    %eax,(%r15)
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    (%r15),%edx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @from_command_line_raw(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i8*
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = load i32*, i32** %4
store i32 %7, i32* %8
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %5
%13 = load i8*, i8** %5
%14 = load i8*, i8** %3
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = call i32 @memcpy(i8* %13, i8* %14, i32 %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @from_command_line_raw(i8* %0, i32* nocapture %1) {
%3 = tail call i32 @strlen(i8* %0)
store i32 %3, i32* %1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = load i32, i32* %1
%7 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %6)
ret i8* %5
}
void EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
                     unsigned long ulMaxWait) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000014))) =
      (((ulConfig & 0x00000100) ? 0x80000000 : 0) |
       ((ulConfig & 0x00000800) ? 0x04000000 : 0) |
       ((ulConfig & 0x00000600) << 15));
  ulConfig &= ~0x0000FF00;
  ulConfig |= ulMaxWait << 8;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = ulConfig;
}


x86 assembly (clang, -O0):
<EPIConfigHB8Set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
and    $0x100,%rdx
xor    %eax,%eax
mov    $0x80000000,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    -0x10(%rbp),%rsi
and    $0x800,%rsi
xor    %ecx,%ecx
mov    $0x4000000,%edx
cmp    $0x0,%rsi
cmovne %edx,%ecx
or     %ecx,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
and    $0x600,%rax
shl    $0xf,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x14(%rax)
mov    -0x10(%rbp),%rax
and    $0xffffffffffff00ff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x8,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIConfigHB8Set>:
mov    %esi,%r8d
and    $0x100,%r8d
shl    $0x17,%r8
mov    %rsi,%rcx
shl    $0xf,%rcx
mov    %ecx,%eax
and    $0x4000000,%eax
or     %r8,%rax
and    $0x3000000,%ecx
or     %rax,%rcx
mov    %rcx,0x14(%rdi)
and    $0xffffffffffff00ff,%rsi
shl    $0x8,%rdx
or     %rsi,%rdx
mov    %rdx,0x10(%rdi)
ret

LLVM IR (-O0):
define void @EPIConfigHB8Set(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = and i64 %7, 256
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 -2147483648, i32 0
%12 = load i64, i64* %5
%13 = and i64 %12, 2048
%14 = icmp ne i64 %13, 0
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 67108864, i32 0
%17 = or i32 %11, %16
%18 = zext i32 %17 to i64
%19 = load i64, i64* %5
%20 = and i64 %19, 1536
%21 = shl i64 %20, 15
%22 = or i64 %18, %21
%23 = load i64, i64* %4
%24 = add i64 %23, 20
%25 = inttoptr i64 %24 to i64*
store volatile i64 %22, i64* %25
%26 = load i64, i64* %5
%27 = and i64 %26, -65281
store i64 %27, i64* %5
%28 = load i64, i64* %6
%29 = shl i64 %28, 8
%30 = load i64, i64* %5
%31 = or i64 %30, %29
store i64 %31, i64* %5
%32 = load i64, i64* %5
%33 = load i64, i64* %4
%34 = add i64 %33, 16
%35 = inttoptr i64 %34 to i64*
store volatile i64 %32, i64* %35
ret void
}

LLVM IR (-O2):
define void @EPIConfigHB8Set(i64 %0, i64 %1, i64 %2) {
%4 = shl i64 %1, 23
%5 = and i64 %4, 2147483648
%6 = shl i64 %1, 15
%7 = and i64 %6, 67108864
%8 = or i64 %5, %7
%9 = and i64 %6, 50331648
%10 = or i64 %8, %9
%11 = add i64 %0, 20
%12 = inttoptr i64 %11 to i64*
store volatile i64 %10, i64* %12
%13 = and i64 %1, -65281
%14 = shl i64 %2, 8
%15 = or i64 %14, %13
%16 = add i64 %0, 16
%17 = inttoptr i64 %16 to i64*
store volatile i64 %15, i64* %17
ret void
}
equal(a, b) char *a, *b;
{
  while (*a++ == *b)
    if (*b++ == 0)
      return (1);
  return (0);
}


x86 assembly (clang, -O0):
<equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    1159 <equal+0x59>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1154 <equal+0x54>
movl   $0x1,-0x4(%rbp)
jmp    1160 <equal+0x60>
jmp    110c <equal+0xc>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<equal>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rdi,%rcx,1),%edx
cmp    (%rsi,%rcx,1),%dl
jne    1126 <equal+0x26>
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <equal+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @equal(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = load i8*, i8** %5
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %10, %13
br i1 %14, label %15, label %23
15: ; preds = %6
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %5
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 1, i32* %3
br label %24
22: ; preds = %15
br label %6
23: ; preds = %6
store i32 0, i32* %3
br label %24
24: ; preds = %23, %21
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @equal(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %0, %2 ], [ %10, %9 ]
%5 = phi i8* [ %1, %2 ], [ %11, %9 ]
%6 = load i8, i8* %4
%7 = load i8, i8* %5
%8 = icmp eq i8 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = icmp eq i8 %6, 0
br i1 %12, label %13, label %3
13: ; preds = %3, %9
%14 = phi i32 [ 1, %9 ], [ 0, %3 ]
ret i32 %14
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TCSETS;
int ioctl(int, int /*<<< orphan*/, struct termios const *);
int /*<<< orphan*/ isatty(int);
int tcsetattr(int fd, int opt, const struct termios *termios_p) {
  (void)opt;
  if (!isatty(fd))
    return -1;
  return ioctl(fd, TCSETS, termios_p);
}


x86 assembly (clang, -O0):
<tcsetattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isatty@plt>
cmp    $0x0,%eax
jne    114f <tcsetattr+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1167 <tcsetattr+0x47>
mov    -0x8(%rbp),%edi
mov    0x2e87(%rip),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rdx
call   1040 <ioctl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcsetattr>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %edi,%ebp
call   1030 <isatty@plt>
test   %eax,%eax
je     114a <tcsetattr+0x2a>
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
mov    %ebp,%edi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ioctl@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
@TCSETS = global i32 0
define i32 @tcsetattr(i32 %0, i32 %1, %struct.termios* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca %struct.termios*
store i32 %0, i32* %5
store i32 %1, i32* %6
store %struct.termios* %2, %struct.termios** %7
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = call i32 @isatty(i32 %9)
%11 = icmp ne i32 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %3
store i32 -1, i32* %4
br label %18
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* @TCSETS
%16 = load %struct.termios*, %struct.termios** %7
%17 = call i32 @ioctl(i32 %14, i32 %15, %struct.termios* %16)
store i32 %17, i32* %4
br label %18
18: ; preds = %13, %12
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
%struct.termios = type { i32 }
@TCSETS = global i32 0
define i32 @tcsetattr(i32 %0, i32 %1, %struct.termios* %2) {
%4 = tail call i32 @isatty(i32 %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, i32* @TCSETS
%8 = tail call i32 @ioctl(i32 %0, i32 %7, %struct.termios* %2)
br label %9
9: ; preds = %3, %6
%10 = phi i32 [ %8, %6 ], [ -1, %3 ]
ret i32 %10
}
int FloatAsInt(float f) {
  union {
    int i;
    float f;
  } temp;
  temp.f = f;
  return temp.i;
}


x86 assembly (clang, -O0):
<FloatAsInt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FloatAsInt>:
movd   %xmm0,%eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define i32 @FloatAsInt(float %0) {
%2 = alloca float
%3 = alloca %union.anon
store float %0, float* %2
%4 = load float, float* %2
%5 = bitcast %union.anon* %3 to float*
store float %4, float* %5
%6 = bitcast %union.anon* %3 to i32*
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @FloatAsInt(float %0) {
%2 = bitcast float %0 to i32
ret i32 %2
}
/* Type definitions */
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int vga_get(struct pci_dev *, unsigned int, int /*<<< orphan*/);
int vga_get_uninterruptible(struct pci_dev *pdev, unsigned int rsrc) {
  return vga_get(pdev, rsrc, 0);
}


x86 assembly (clang, -O0):
<vga_get_uninterruptible>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <vga_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_get_uninterruptible>:
xor    %edx,%edx
jmp    1030 <vga_get@plt>

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
define i32 @vga_get_uninterruptible(%struct.pci_dev* %0, i32 %1) {
%3 = alloca %struct.pci_dev*
%4 = alloca i32
store %struct.pci_dev* %0, %struct.pci_dev** %3
store i32 %1, i32* %4
%5 = load %struct.pci_dev*, %struct.pci_dev** %3
%6 = load i32, i32* %4
%7 = call i32 @vga_get(%struct.pci_dev* %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
define i32 @vga_get_uninterruptible(%struct.pci_dev* %0, i32 %1) {
%3 = tail call i32 @vga_get(%struct.pci_dev* %0, i32 %1, i32 0)
ret i32 %3
}
/* Variables and functions */
long ndb_chk_mark(void *i_ptr_start, size_t i_size) { return 0; }


x86 assembly (clang, -O0):
<ndb_chk_mark>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndb_chk_mark>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @ndb_chk_mark(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @ndb_chk_mark(i8* nocapture readnone %0, i64 %1) {
ret i64 0
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t rotate(int32_t value, int32_t count) {
  if (count >= 0) {
    return (value << count) | (value >> (32 - count));
  } else {
    count = -count;
    return (value >> count) | (value << (32 - count));
  }
}


x86 assembly (clang, -O0):
<rotate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1135 <rotate+0x35>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    -0x8(%rbp),%edx
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <rotate+0x59>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    -0x8(%rbp),%edx
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate>:
mov    %edi,%eax
test   %esi,%esi
js     1116 <rotate+0x16>
mov    %eax,%edx
mov    %esi,%ecx
shl    %cl,%edx
neg    %sil
mov    %esi,%ecx
sar    %cl,%eax
or     %edx,%eax
ret
mov    %esi,%ecx
neg    %cl
mov    %eax,%edx
sar    %cl,%edx
mov    %esi,%ecx
shl    %cl,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @rotate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = shl i32 %9, %10
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sub nsw i32 32, %13
%15 = ashr i32 %12, %14
%16 = or i32 %11, %15
store i32 %16, i32* %3
br label %28
17: ; preds = %2
%18 = load i32, i32* %5
%19 = sub nsw i32 0, %18
store i32 %19, i32* %5
%20 = load i32, i32* %4
%21 = load i32, i32* %5
%22 = ashr i32 %20, %21
%23 = load i32, i32* %4
%24 = load i32, i32* %5
%25 = sub nsw i32 32, %24
%26 = shl i32 %23, %25
%27 = or i32 %22, %26
store i32 %27, i32* %3
br label %28
28: ; preds = %17, %8
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @rotate(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = shl i32 %0, %1
%6 = sub nsw i32 32, %1
%7 = ashr i32 %0, %6
%8 = or i32 %7, %5
br label %15
9: ; preds = %2
%10 = sub nsw i32 0, %1
%11 = ashr i32 %0, %10
%12 = add nsw i32 %1, 32
%13 = shl i32 %0, %12
%14 = or i32 %13, %11
br label %15
15: ; preds = %9, %4
%16 = phi i32 [ %8, %4 ], [ %14, %9 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ RST(int);
void RST00() { RST(0x00); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <RST@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %edi,%edi
jmp    1030 <RST@plt>

LLVM IR (-O0):
define void @RST00() {
%1 = call i32 @RST(i32 0)
ret void
}

LLVM IR (-O2):
define void @RST00() {
%1 = tail call i32 @RST(i32 0)
ret void
}
int ishorzwhite(int c) { return (c == 0x0020) || (c == 0x0009); }


x86 assembly (clang, -O0):
<ishorzwhite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <ishorzwhite+0x20>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishorzwhite>:
cmp    $0x20,%edi
sete   %al
cmp    $0x9,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ishorzwhite(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ishorzwhite(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = icmp eq i32 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ lua_error(char *);
void *malloc(size_t);
void *realloc(void *, size_t);
void *luaI_realloc(void *oldblock, unsigned long size) {
  void *block =
      oldblock ? realloc(oldblock, (size_t)size) : malloc((size_t)size);
  if (block == 0)
    lua_error("not enough memory");
  return block;
}


x86 assembly (clang, -O0):
<luaI_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1161 <luaI_realloc+0x31>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x20(%rbp)
jmp    116e <luaI_realloc+0x3e>
mov    -0x10(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    118d <luaI_realloc+0x5d>
lea    0xe78(%rip),%rdi
call   1050 <lua_error@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<luaI_realloc>:
push   %rbx
test   %rdi,%rdi
je     113d <luaI_realloc+0xd>
call   1040 <realloc@plt>
jmp    1145 <luaI_realloc+0x15>
mov    %rsi,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1159 <luaI_realloc+0x29>
lea    0xeac(%rip),%rdi
call   1050 <lua_error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"not enough memory\00"
define i8* @luaI_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i8* @realloc(i8* %9, i64 %10)
br label %15
12: ; preds = %2
%13 = load i64, i64* %4
%14 = call i8* @malloc(i64 %13)
br label %15
15: ; preds = %12, %8
%16 = phi i8* [ %11, %8 ], [ %14, %12 ]
store i8* %16, i8** %5
%17 = load i8*, i8** %5
%18 = icmp eq i8* %17, null
br i1 %18, label %19, label %21
19: ; preds = %15
%20 = call i32 @lua_error(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %21
21: ; preds = %19, %15
%22 = load i8*, i8** %5
ret i8* %22
}

LLVM IR (-O2):
@.str = [18 x i8] c"not enough memory\00"
define i8* @luaI_realloc(i8* %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i8* @realloc(i8* %0, i64 %1)
br label %8
6: ; preds = %2
%7 = tail call i8* @malloc(i64 %1)
br label %8
8: ; preds = %6, %4
%9 = phi i8* [ %5, %4 ], [ %7, %6 ]
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = tail call i32 @lua_error(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %8
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ memcmp(void const *, void const *, size_t);
bool cutils_cdar_DynamicArray_size_t_compare(const void *p1, const void *p2,
                                             size_t s) {
  return !memcmp(p1, p2, s);
}


x86 assembly (clang, -O0):
<cutils_cdar_DynamicArray_size_t_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cutils_cdar_DynamicArray_size_t_compare>:
push   %rax
call   1030 <bcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cutils_cdar_DynamicArray_size_t_compare(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcmp(i8* %7, i8* %8, i64 %9)
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @cutils_cdar_DynamicArray_size_t_compare(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @bcmp(i8* %0, i8* %1, i64 %2)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void microsleep(int usec) { usleep(usec); }


x86 assembly (clang, -O0):
<microsleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<microsleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @microsleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @microsleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret void
}
signed int ttyname_r(signed int __fd, char *__buf, unsigned long int __buflen) {
  signed int return_value___ttyname_r_chk$1;
  signed int return_value___ttyname_r_chk_warn$2;
  signed int return_value___ttyname_r_alias$3;
  return_value___ttyname_r_alias$3 = __ttyname_r_alias(__fd, __buf, __buflen);
  return return_value___ttyname_r_alias$3;
}


x86 assembly (clang, -O0):
<ttyname_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1030 <__ttyname_r_alias@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ttyname_r>:
xor    %eax,%eax
jmp    1030 <__ttyname_r_alias@plt>

LLVM IR (-O0):
define i32 @ttyname_r(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i32, i32* %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 (i32, i8*, i64, ...) bitcast (i32 (...)* @__ttyname_r_alias to i32 (i32, i8*, i64, ...)*)(i32 %10, i8* %11, i64 %12)
store i32 %13, i32* %9
%14 = load i32, i32* %9
ret i32 %14
}

LLVM IR (-O2):
define i32 @ttyname_r(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 (i32, i8*, i64, ...) bitcast (i32 (...)* @__ttyname_r_alias to i32 (i32, i8*, i64, ...)*)(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
int isFull(int *stack, int top) {
  if (top == 5 - 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isFull>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jne    1121 <isFull+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1128 <isFull+0x28>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isFull>:
xor    %eax,%eax
cmp    $0x4,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @isFull(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 4
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %10
9: ; preds = %2
store i32 0, i32* %3
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @isFull(i32* nocapture readnone %0, i32 %1) {
%3 = icmp eq i32 %1, 4
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ check(int /*<<< orphan*/, char const *);
void *malloc(size_t const);
void *int_new_array(const size_t N, const char *error_msg) {
  void *ptr;
  ptr = malloc(N * sizeof(int));
  check(ptr != NULL, error_msg);
  return ptr;
}


x86 assembly (clang, -O0):
<int_new_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
mov    -0x10(%rbp),%rsi
call   1040 <check@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_new_array>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
mov    %r14,%rsi
call   1040 <check@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @int_new_array(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%6 = load i64, i64* %3
%7 = mul i64 %6, 4
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = load i8*, i8** %4
%13 = call i32 @check(i32 %11, i8* %12)
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @int_new_array(i64 %0, i8* %1) {
%3 = shl i64 %0, 2
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp ne i8* %4, null
%6 = zext i1 %5 to i32
%7 = tail call i32 @check(i32 %6, i8* %1)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int accepted() { printf("Welcome to the admin console, trusted user!\n"); }


x86 assembly (clang, -O0):
<accepted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<accepted>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"Welcome to the admin console, trusted user!\0A\00"
define i32 @accepted() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [44 x i8] c"Welcome to the admin console, trusted user!\00"
define i32 @accepted() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x60() {
  Assert_real((isalnum(96) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              485, ("isalnum should be 0 for `"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x60>:
push   %rbp
mov    %rsp,%rbp
mov    $0x60,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1e5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x60>:
push   %rax
mov    $0x60,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1e5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for `\00"
define void @t_isalnum_0x60() {
%1 = call i64 @isalnum(i32 96)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 485, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for `\00"
define void @t_isalnum_0x60() {
%1 = tail call i64 @isalnum(i32 96)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 485, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
float invSqrt(float);
int /*<<< orphan*/ printf(char *, float);
int main() {
  float result = invSqrt(0.13428462910f);
  printf("Result: %f\n", result);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xed0(%rip),%xmm0
call   1040 <invSqrt@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movss  0xed7(%rip),%xmm0
call   1040 <invSqrt@plt>
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Result: %f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = call float @invSqrt(float 0x3FC1303D20000000)
store float %2, float* %1
%3 = load float, float* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Result: %f\0A\00"
define i32 @main() {
%1 = tail call float @invSqrt(float 0x3FC1303D20000000)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ stderr;
void plnerror(int p, char *s) {
  fprintf(stderr, "%i: %s\n", p, s);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<plnerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    0xeba(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<plnerror>:
push   %rax
mov    %rsi,%rcx
mov    %edi,%edx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%i: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @plnerror(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6, i8* %7)
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%i: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @plnerror(i32 %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1)
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @exit(i32 %5)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fputc(int, int /*<<< orphan*/ *);
int putc(int c, FILE *stream) { return fputc(c, stream); }


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define i32 @putc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @fputc(i32 %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @putc(i32 %0, i32* nocapture %1) {
%3 = tail call i32 @fputc(i32 %0, i32* %1)
ret i32 %3
}
int main(argc, argv)
int argc;
char **argv;
{ return top(-1) + top(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%edi
mov    $0x0,%al
call   1030 <top@plt>
mov    %eax,-0x14(%rbp)
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <top@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xffffffff,%edi
xor    %eax,%eax
call   1030 <top@plt>
mov    %eax,%ebx
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <top@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (i32, ...) bitcast (i32 (...)* @top to i32 (i32, ...)*)(i32 -1)
%7 = call i32 (i32, ...) bitcast (i32 (...)* @top to i32 (i32, ...)*)(i32 1)
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @top to i32 (i32, ...)*)(i32 -1)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @top to i32 (i32, ...)*)(i32 1)
%5 = add nsw i32 %4, %3
ret i32 %5
}
/* Variables and functions */
unsigned long WaitMouse268(unsigned long);
unsigned long waitmouse(unsigned long m) { return WaitMouse268(m); }


x86 assembly (clang, -O0):
<waitmouse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <WaitMouse268@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitmouse>:
jmp    1030 <WaitMouse268@plt>

LLVM IR (-O0):
define i64 @waitmouse(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @WaitMouse268(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @waitmouse(i64 %0) {
%2 = tail call i64 @WaitMouse268(i64 %0)
ret i64 %2
}
void foo307() {}


x86 assembly (clang, -O0):
<foo307>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo307>:
ret

LLVM IR (-O0):
define void @foo307() {
ret void
}

LLVM IR (-O2):
define void @foo307() {
ret void
}
double multiplikation(double zahl1, double zahl2) { return (zahl1 * zahl2); }


x86 assembly (clang, -O0):
<multiplikation>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiplikation>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @multiplikation(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @multiplikation(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ RC4_KEY;

/* Variables and functions */
int /*<<< orphan*/ RC4(int /*<<< orphan*/ *, int, unsigned char *,
                       unsigned char *);
uint64_t randomplease(RC4_KEY *rc4_key) {
  uint64_t b;
  uint64_t z = (uint64_t)0;
  RC4(rc4_key, 8, (unsigned char *)&z, (unsigned char *)&b);
  return b;
}


x86 assembly (clang, -O0):
<randomplease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rdx
lea    -0xc(%rbp),%rcx
mov    $0x8,%esi
call   1030 <RC4@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomplease>:
push   %rax
movl   $0x0,(%rsp)
mov    %rsp,%rdx
lea    0x4(%rsp),%rcx
mov    $0x8,%esi
call   1030 <RC4@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @randomplease(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %4
%5 = load i32*, i32** %2
%6 = bitcast i32* %4 to i8*
%7 = bitcast i32* %3 to i8*
%8 = call i32 @RC4(i32* %5, i32 8, i8* %6, i8* %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @randomplease(i32* %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%6 = call i32 @RC4(i32* %0, i32 8, i8* %5, i8* %4)
%7 = load i32, i32* %2
ret i32 %7
}
/* Variables and functions */
float dot3_c(float *, float *);
float dot3_neon_sfp(float v0[3], float v1[3]) { return dot3_c(v0, v1); }


x86 assembly (clang, -O0):
<dot3_neon_sfp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dot3_c@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot3_neon_sfp>:
jmp    1030 <dot3_c@plt>

LLVM IR (-O0):
define float @dot3_neon_sfp(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %4
%7 = call float @dot3_c(float* %5, float* %6)
ret float %7
}

LLVM IR (-O2):
define float @dot3_neon_sfp(float* %0, float* %1) {
%3 = tail call float @dot3_c(float* %0, float* %1)
ret float %3
}
void gtk_clipboard_wait_is_image_available() {}


x86 assembly (clang, -O0):
<gtk_clipboard_wait_is_image_available>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_clipboard_wait_is_image_available>:
ret

LLVM IR (-O0):
define void @gtk_clipboard_wait_is_image_available() {
ret void
}

LLVM IR (-O2):
define void @gtk_clipboard_wait_is_image_available() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigsuspend(int /*<<< orphan*/ *);
extern int sigpause(int mask) { return sigsuspend((sigset_t *)&mask); }


x86 assembly (clang, -O0):
<sigpause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <sigsuspend@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigpause>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <sigsuspend@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sigpause(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @sigsuspend(i32* %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @sigpause(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @sigsuspend(i32* %2)
ret i32 %3
}
signed long long f40(signed long long v_foo, signed long long *v_dest) {
  signed long long v_ashr = v_foo >> 36;
  *v_dest = v_ashr;
  signed long long v_shl = v_ashr << 2;
  signed long long v_and = v_shl & 2147483647;
  return v_and;
}


x86 assembly (clang, -O0):
<f40>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x24,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
shl    $0x2,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
and    $0x7fffffff,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f40>:
sar    $0x24,%rdi
mov    %rdi,(%rsi)
lea    0x0(,%rdi,4),%eax
and    $0x7ffffffc,%eax
ret

LLVM IR (-O0):
define i64 @f40(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %3
store i64* %1, i64** %4
%8 = load i64, i64* %3
%9 = ashr i64 %8, 36
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = load i64*, i64** %4
store i64 %10, i64* %11
%12 = load i64, i64* %5
%13 = shl i64 %12, 2
store i64 %13, i64* %6
%14 = load i64, i64* %6
%15 = and i64 %14, 2147483647
store i64 %15, i64* %7
%16 = load i64, i64* %7
ret i64 %16
}

LLVM IR (-O2):
define i64 @f40(i64 %0, i64* nocapture writeonly %1) {
%3 = ashr i64 %0, 36
store i64 %3, i64* %1
%4 = shl nsw i64 %3, 2
%5 = and i64 %4, 2147483644
ret i64 %5
}