xunge/DecIR huggingface dataset:
void caller_1_2_1_1_1_1_1() {}


x86 assembly (clang, -O0):
<caller_1_2_1_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_1_2_1_1_1_1_1>:
ret

LLVM IR (-O0):
define void @caller_1_2_1_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @caller_1_2_1_1_1_1_1() {
ret void
}
void uDMAChannel8_15SelectAltMapping(unsigned long ulAltPeriphs) {
  (*((volatile unsigned long *)(0x400FF514))) |= ulAltPeriphs;
}


x86 assembly (clang, -O0):
<uDMAChannel8_15SelectAltMapping>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x400ff514,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400ff514,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAChannel8_15SelectAltMapping>:
or     %rdi,0x400ff514
40
ret

LLVM IR (-O0):
define void @uDMAChannel8_15SelectAltMapping(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074787604 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074787604 to i64*)
ret void
}

LLVM IR (-O2):
define void @uDMAChannel8_15SelectAltMapping(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074787604 to i64*)
%3 = or i64 %2, %0
store volatile i64 %3, i64* inttoptr (i64 1074787604 to i64*)
ret void
}
/* Variables and functions */
long blong(unsigned char *);
long rnc_ulen(void *packed) {
  unsigned char *p = packed;
  if (blong(p) != 0x524E4301)
    return -1;
  return blong(p + 4);
}


x86 assembly (clang, -O0):
<rnc_ulen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <blong@plt>
cmp    $0x524e4301,%rax
je     1146 <rnc_ulen+0x36>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1157 <rnc_ulen+0x47>
mov    -0x18(%rbp),%rdi
add    $0x4,%rdi
call   1030 <blong@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnc_ulen>:
push   %rbx
mov    %rdi,%rbx
call   1030 <blong@plt>
cmp    $0x524e4301,%rax
jne    112e <rnc_ulen+0x1e>
add    $0x4,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <blong@plt>
mov    $0xffffffffffffffff,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @rnc_ulen(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = call i64 @blong(i8* %6)
%8 = icmp ne i64 %7, 1380860673
br i1 %8, label %9, label %10
9: ; preds = %1
store i64 -1, i64* %2
br label %14
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 4
%13 = call i64 @blong(i8* %12)
store i64 %13, i64* %2
br label %14
14: ; preds = %10, %9
%15 = load i64, i64* %2
ret i64 %15
}

LLVM IR (-O2):
define i64 @rnc_ulen(i8* %0) {
%2 = tail call i64 @blong(i8* %0)
%3 = icmp eq i64 %2, 1380860673
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 4
%6 = tail call i64 @blong(i8* %5)
br label %7
7: ; preds = %1, %4
%8 = phi i64 [ %6, %4 ], [ -1, %1 ]
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ EmitBrushes();
int /*<<< orphan*/ EmitPlanes();
int /*<<< orphan*/ Q2_UnparseEntities();
void EndBSPFile(void) {
  EmitBrushes();
  EmitPlanes();
  Q2_UnparseEntities();
}


x86 assembly (clang, -O0):
<EndBSPFile>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <EmitBrushes@plt>
mov    $0x0,%al
call   1030 <EmitPlanes@plt>
mov    $0x0,%al
call   1050 <Q2_UnparseEntities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EndBSPFile>:
push   %rax
xor    %eax,%eax
call   1040 <EmitBrushes@plt>
xor    %eax,%eax
call   1030 <EmitPlanes@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <Q2_UnparseEntities@plt>

LLVM IR (-O0):
define void @EndBSPFile() {
%1 = call i32 (...) @EmitBrushes()
%2 = call i32 (...) @EmitPlanes()
%3 = call i32 (...) @Q2_UnparseEntities()
ret void
}

LLVM IR (-O2):
define void @EndBSPFile() {
%1 = tail call i32 (...) @EmitBrushes()
%2 = tail call i32 (...) @EmitPlanes()
%3 = tail call i32 (...) @Q2_UnparseEntities()
ret void
}
/* Variables and functions */
int EOF;
int mps_lib_get_EOF(void) { return EOF; }


x86 assembly (clang, -O0):
<mps_lib_get_EOF>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mps_lib_get_EOF>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @mps_lib_get_EOF() {
%1 = load i32, i32* @EOF
ret i32 %1
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @mps_lib_get_EOF() {
%1 = load i32, i32* @EOF
ret i32 %1
}
/* Variables and functions */
int exact_square(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number;
  int square;
  scanf("%d", &number);
  square = exact_square(number);
  printf("%d\n", square);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <exact_square@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @exact_square(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @exact_square(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fdprintfdpoll();
int /*<<< orphan*/ taskprintall(int);
void cornet_debug(int fd) {
  taskprintall(fd);
  fdprintfdpoll();
}


x86 assembly (clang, -O0):
<cornet_debug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <taskprintall@plt>
mov    $0x0,%al
call   1030 <fdprintfdpoll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cornet_debug>:
push   %rax
call   1040 <taskprintall@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <fdprintfdpoll@plt>

LLVM IR (-O0):
define void @cornet_debug(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @taskprintall(i32 %3)
%5 = call i32 (...) @fdprintfdpoll()
ret void
}

LLVM IR (-O2):
define void @cornet_debug(i32 %0) {
%2 = tail call i32 @taskprintall(i32 %0)
%3 = tail call i32 (...) @fdprintfdpoll()
ret void
}
/* Variables and functions */
void *Mem_Alloc(int);
int Mem_Free(void *);
scalar_t__ Mem_Init(int);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  assert(Mem_Init(4096) == 0);
  void *ptr = Mem_Alloc(8);
  assert(ptr != NULL);
  ptr = NULL;
  assert(Mem_Free(ptr) == -1);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1000,%edi
call   1030 <Mem_Init@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    $0x8,%edi
call   1060 <Mem_Alloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <Mem_Free@plt>
cmp    $0xffffffff,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
xor    %edi,%edi
call   1070 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1000,%edi
call   1030 <Mem_Init@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1050 <assert@plt>
mov    $0x8,%edi
call   1060 <Mem_Alloc@plt>
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1050 <assert@plt>
xor    %edi,%edi
call   1040 <Mem_Free@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
call   1050 <assert@plt>
xor    %edi,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i64 @Mem_Init(i32 4096)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = call i8* @Mem_Alloc(i32 8)
store i8* %7, i8** %2
%8 = load i8*, i8** %2
%9 = icmp ne i8* %8, null
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
store i8* null, i8** %2
%12 = load i8*, i8** %2
%13 = call i32 @Mem_Free(i8* %12)
%14 = icmp eq i32 %13, -1
%15 = zext i1 %14 to i32
%16 = call i32 @assert(i32 %15)
%17 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @Mem_Init(i32 4096)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i8* @Mem_Alloc(i32 8)
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @Mem_Free(i8* null)
%10 = icmp eq i32 %9, -1
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 %11)
%13 = tail call i32 @exit(i32 0)
unreachable
}
void test_draw() {}


x86 assembly (clang, -O0):
<test_draw>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_draw>:
ret

LLVM IR (-O0):
define void @test_draw() {
ret void
}

LLVM IR (-O2):
define void @test_draw() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getmaxyx(int /*<<< orphan*/, int, int);
int /*<<< orphan*/ stdscr;
int space_big_enough_q() {
  int maxx = 0, maxy = 0;
  getmaxyx(stdscr, maxy, maxx);
  return ((maxy >= 12) && (maxx >= 48));
}


x86 assembly (clang, -O0):
<space_big_enough_q>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
call   1030 <getmaxyx@plt>
xor    %eax,%eax
cmpl   $0xc,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jl     1153 <space_big_enough_q+0x43>
cmpl   $0x30,-0x4(%rbp)
setge  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<space_big_enough_q>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <getmaxyx@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdscr = global i32 0
define i32 @space_big_enough_q() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* @stdscr
%4 = load i32, i32* %2
%5 = load i32, i32* %1
%6 = call i32 @getmaxyx(i32 %3, i32 %4, i32 %5)
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 12
br i1 %8, label %9, label %12
9: ; preds = %0
%10 = load i32, i32* %1
%11 = icmp sge i32 %10, 48
br label %12
12: ; preds = %9, %0
%13 = phi i1 [ false, %0 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
@stdscr = global i32 0
define i32 @space_big_enough_q() {
%1 = load i32, i32* @stdscr
%2 = tail call i32 @getmaxyx(i32 %1, i32 0, i32 0)
ret i32 0
}
int main() {
  int i;
  int res = 0;
  goto L1;
  for (i = 0; i < 10; i++) {
  L2:
    goto L3;
  L1:
    i = 0;
    goto L2;
  L3:
    res++;
  }
  return res;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
jmp    112b <main+0x2b>
cmpl   $0xa,-0x8(%rbp)
jge    114e <main+0x4e>
jmp    1126 <main+0x26>
jmp    1137 <main+0x37>
movl   $0x0,-0x8(%rbp)
jmp    1126 <main+0x26>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1117 <main+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
br label %10
4: ; No predecessors!
store i32 0, i32* %2
br label %5
5: ; preds = %14, %4
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %17
8: ; preds = %5
br label %9
9: ; preds = %10, %8
br label %11
10: ; preds = %0
store i32 0, i32* %2
br label %9
11: ; preds = %9
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %5
17: ; preds = %5
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
ret i32 10
}
void emit_type_definition_float64(
    struct processor_explicatory_state *process_state,
    struct modern_stream *stream, void *stream_state,
    struct modern_vfile *vfile, void *vfile_state) {}


x86 assembly (clang, -O0):
<emit_type_definition_float64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_type_definition_float64>:
ret

LLVM IR (-O0):
%struct.processor_explicatory_state = type opaque
%struct.modern_stream = type opaque
%struct.modern_vfile = type opaque
define void @emit_type_definition_float64(%struct.processor_explicatory_state* %0, %struct.modern_stream* %1, i8* %2, %struct.modern_vfile* %3, i8* %4) {
%6 = alloca %struct.processor_explicatory_state*
%7 = alloca %struct.modern_stream*
%8 = alloca i8*
%9 = alloca %struct.modern_vfile*
%10 = alloca i8*
store %struct.processor_explicatory_state* %0, %struct.processor_explicatory_state** %6
store %struct.modern_stream* %1, %struct.modern_stream** %7
store i8* %2, i8** %8
store %struct.modern_vfile* %3, %struct.modern_vfile** %9
store i8* %4, i8** %10
ret void
}

LLVM IR (-O2):
%struct.processor_explicatory_state = type opaque
%struct.modern_stream = type opaque
%struct.modern_vfile = type opaque
define void @emit_type_definition_float64(%struct.processor_explicatory_state* nocapture %0, %struct.modern_stream* nocapture %1, i8* nocapture %2, %struct.modern_vfile* nocapture %3, i8* nocapture %4) {
ret void
}
int isprint(int c) { return (c >= ' ' && c <= '~'); }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isprint+0x20>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
int MessageBox(void *handle, const char *text, const char *cap,
               unsigned int type) {
  (void)handle;
  (void)text;
  (void)cap;
  (void)type;
  return 0;
}


x86 assembly (clang, -O0):
<MessageBox>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MessageBox>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @MessageBox(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @MessageBox(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void OneWireIntClear(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x0000010C))) = ui32IntFlags;
}


x86 assembly (clang, -O0):
<OneWireIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<OneWireIntClear>:
mov    %rsi,0x10c(%rdi)
ret

LLVM IR (-O0):
define void @OneWireIntClear(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 268
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @OneWireIntClear(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 268
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
int h4(int x) { return x; }


x86 assembly (clang, -O0):
<h4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h4>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @h4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @h4(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigdelset(sigset_t *set, int signo) {
  ;
  return 0;
}


x86 assembly (clang, -O0):
<sigdelset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigdelset>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sigdelset(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @sigdelset(i32* nocapture readnone %0, i32 %1) {
ret i32 0
}
int atomic_inc_and_test_long(volatile long *var) {
  char ret;
  asm volatile("lock ;"
               " "
               "incl %0"
               "\n\t"
               "setz %1 \n\t"
               : "=m"(*var), "=qm"(ret)
               : "m"(*var)
               : "cc", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<atomic_inc_and_test_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
lock incl (%rax)
sete   -0x9(%rbp)
movsbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_inc_and_test_long>:
lock incl (%rdi)
sete   -0x1(%rsp)
movsbl -0x1(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @atomic_inc_and_test_long(i64* %0) {
%2 = alloca i64*
%3 = alloca i8
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = load i64*, i64** %2
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @atomic_inc_and_test_long(i64* %0) {
%2 = alloca i8
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ inc_addr(void *, int);
scalar_t__ shim_getcpu(unsigned int *, unsigned int *, void *);
int bad_getcpu(void *addr) {
  return (int)shim_getcpu((unsigned *)addr, (unsigned *)inc_addr(addr, 2),
                          (void *)inc_addr(addr, 2));
}


x86 assembly (clang, -O0):
<bad_getcpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    %rax,%rdx
call   1040 <shim_getcpu@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad_getcpu>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    %rax,%r14
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <shim_getcpu@plt>

LLVM IR (-O0):
define i32 @bad_getcpu(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i8*, i8** %2
%6 = call i64 @inc_addr(i8* %5, i32 2)
%7 = inttoptr i64 %6 to i32*
%8 = load i8*, i8** %2
%9 = call i64 @inc_addr(i8* %8, i32 2)
%10 = inttoptr i64 %9 to i8*
%11 = call i64 @shim_getcpu(i32* %4, i32* %7, i8* %10)
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @bad_getcpu(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i64 @inc_addr(i8* %0, i32 2)
%4 = inttoptr i64 %3 to i32*
%5 = tail call i64 @inc_addr(i8* %0, i32 2)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i64 @shim_getcpu(i32* %2, i32* %4, i8* %6)
%8 = trunc i64 %7 to i32
ret i32 %8
}
void INT_Excep_PERIB_INTB160(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB160>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB160>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB160() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB160() {
ret void
}
void prog_exec(char id, struct program_info *info) {}


x86 assembly (clang, -O0):
<prog_exec>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prog_exec>:
ret

LLVM IR (-O0):
%struct.program_info = type opaque
define void @prog_exec(i8 signext %0, %struct.program_info* %1) {
%3 = alloca i8
%4 = alloca %struct.program_info*
store i8 %0, i8* %3
store %struct.program_info* %1, %struct.program_info** %4
ret void
}

LLVM IR (-O2):
%struct.program_info = type opaque
define void @prog_exec(i8 signext %0, %struct.program_info* nocapture %1) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void TimerRTCEnable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x0000000C))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<TimerRTCEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
or     $0x10,%rcx
mov    %rcx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerRTCEnable>:
orq    $0x10,0xc(%rdi)
ret

LLVM IR (-O0):
define void @TimerRTCEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 12
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 16
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @TimerRTCEnable(i64 %0) {
%2 = add nsw i64 %0, 12
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 16
store volatile i64 %5, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char **);
void freeSomeArgs(char **args, int n) {
  char **a;
  a = args;
  while (n--)
    free(*a++);
  free(args);
}


x86 assembly (clang, -O0):
<freeSomeArgs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     1157 <freeSomeArgs+0x47>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%rdi
call   1030 <free@plt>
jmp    1127 <freeSomeArgs+0x17>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeSomeArgs>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
je     1142 <freeSomeArgs+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <freeSomeArgs+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeSomeArgs(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i8**
store i8** %0, i8*** %3
store i32 %1, i32* %4
%6 = load i8**, i8*** %3
store i8** %6, i8*** %5
br label %7
7: ; preds = %11, %2
%8 = load i32, i32* %4
%9 = add nsw i32 %8, -1
store i32 %9, i32* %4
%10 = icmp ne i32 %8, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i32 1
store i8** %13, i8*** %5
%14 = load i8*, i8** %12
%15 = bitcast i8* %14 to i8**
%16 = call i32 @free(i8** %15)
br label %7
17: ; preds = %7
%18 = load i8**, i8*** %3
%19 = call i32 @free(i8** %18)
ret void
}

LLVM IR (-O2):
define void @freeSomeArgs(i8** nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i8** [ %8, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = add nsw i32 %6, -1
%8 = getelementptr inbounds i8*, i8** %5, i64 1
%9 = bitcast i8** %5 to i8***
%10 = load i8**, i8*** %9
%11 = tail call i32 @free(i8** %10)
%12 = icmp eq i32 %7, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
%14 = tail call i32 @free(i8** %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_madd_pi16(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 __attribute__((no, unused)) test(__m64 s1, __m64 s2) {
  return _mm_madd_pi16(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_madd_pi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_madd_pi16@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_madd_pi16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_madd_pi16(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ BUG();
void cpuhvfs_notify_cluster_off(unsigned int cluster) { BUG(); }


x86 assembly (clang, -O0):
<cpuhvfs_notify_cluster_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <BUG@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuhvfs_notify_cluster_off>:
xor    %eax,%eax
jmp    1030 <BUG@plt>

LLVM IR (-O0):
define void @cpuhvfs_notify_cluster_off(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @BUG()
ret void
}

LLVM IR (-O2):
define void @cpuhvfs_notify_cluster_off(i32 %0) {
%2 = tail call i32 (...) @BUG()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int main(int argc, char *argv[]) {
  const char *whom = "world";
  if (argc > 1)
    whom = argv[1];
  printf("Hello %s\n", whom);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1147 <main+0x37>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     111c <main+0xc>
mov    0x8(%rsi),%rsi
jmp    1123 <main+0x13>
lea    0xedd(%rip),%rsi
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"world\00"
@.str.1 = [10 x i8] c"Hello %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
store i8* %12, i8** %6
br label %13
13: ; preds = %9, %2
%14 = load i8*, i8** %6
%15 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"world\00"
@.str.1 = [10 x i8] c"Hello %s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
br label %7
7: ; preds = %4, %2
%8 = phi i8* [ %6, %4 ], [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), %2 ]
%9 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %8)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeLEDSeq(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000004, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeLEDSeq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x4,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeLEDSeq>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x4,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeLEDSeq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 4, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeLEDSeq(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 4, i32 8)
ret void
}
void dlm_destroy_debugfs_subroot(struct dlm_ctxt *dlm) {}


x86 assembly (clang, -O0):
<dlm_destroy_debugfs_subroot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlm_destroy_debugfs_subroot>:
ret

LLVM IR (-O0):
%struct.dlm_ctxt = type opaque
define void @dlm_destroy_debugfs_subroot(%struct.dlm_ctxt* %0) {
%2 = alloca %struct.dlm_ctxt*
store %struct.dlm_ctxt* %0, %struct.dlm_ctxt** %2
ret void
}

LLVM IR (-O2):
%struct.dlm_ctxt = type opaque
define void @dlm_destroy_debugfs_subroot(%struct.dlm_ctxt* nocapture %0) {
ret void
}
int baz(int i) {
  volatile int v[4];
  int *p;
  v[i] = 6;
  p = (int *)&v[0];
  *p = 8;
  return v[i];
}


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movl   $0x6,-0x20(%rbp,%rax,4)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movl   $0x8,(%rax)
movslq -0x4(%rbp),%rax
mov    -0x20(%rbp,%rax,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
movslq %edi,%rax
movl   $0x6,-0x18(%rsp,%rax,4)
movl   $0x8,-0x18(%rsp)
mov    -0x18(%rsp,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @baz(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i32]
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %6
store volatile i32 6, i32* %7
%8 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
store i32* %8, i32** %4
%9 = load i32*, i32** %4
store i32 8, i32* %9
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %11
%13 = load volatile i32, i32* %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @baz(i32 %0) {
%2 = alloca [4 x i32]
%3 = bitcast [4 x i32]* %2 to i8*
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 %4
store volatile i32 6, i32* %5
%6 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
store i32 8, i32* %6
%7 = load volatile i32, i32* %5
ret i32 %7
}
float constrain(float value, const float minVal, const float maxVal) {
  return ((maxVal) < (((minVal) > (value) ? (minVal) : (value)))
              ? (maxVal)
              : (((minVal) > (value) ? (minVal) : (value))));
}


x86 assembly (clang, -O0):
<constrain>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    113b <constrain+0x3b>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    1145 <constrain+0x45>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0x14(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1167 <constrain+0x67>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
jmp    1199 <constrain+0x99>
movss  -0x8(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1185 <constrain+0x85>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
jmp    118f <constrain+0x8f>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<constrain>:
maxss  %xmm0,%xmm1
minss  %xmm1,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @constrain(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %6
%8 = load float, float* %5
%9 = load float, float* %4
%10 = fcmp ogt float %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load float, float* %5
br label %15
13: ; preds = %3
%14 = load float, float* %4
br label %15
15: ; preds = %13, %11
%16 = phi float [ %12, %11 ], [ %14, %13 ]
%17 = fcmp olt float %7, %16
br i1 %17, label %18, label %20
18: ; preds = %15
%19 = load float, float* %6
br label %30
20: ; preds = %15
%21 = load float, float* %5
%22 = load float, float* %4
%23 = fcmp ogt float %21, %22
br i1 %23, label %24, label %26
24: ; preds = %20
%25 = load float, float* %5
br label %28
26: ; preds = %20
%27 = load float, float* %4
br label %28
28: ; preds = %26, %24
%29 = phi float [ %25, %24 ], [ %27, %26 ]
br label %30
30: ; preds = %28, %18
%31 = phi float [ %19, %18 ], [ %29, %28 ]
ret float %31
}

LLVM IR (-O2):
define float @constrain(float %0, float %1, float %2) {
%4 = fcmp ogt float %1, %0
%5 = select i1 %4, float %1, float %0
%6 = fcmp ogt float %5, %2
%7 = select i1 %6, float %2, float %5
ret float %7
}
void LdL0(double x, double *y, double *z) {
  *y = 1.;
  *z = 0.;
}


x86 assembly (clang, -O0):
<LdL0>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  0xee3(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LdL0>:
movabs $0x3ff0000000000000,%rax
mov    %rax,(%rdi)
movq   $0x0,(%rsi)
ret

LLVM IR (-O0):
define void @LdL0(double %0, double* %1, double* %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca double*
store double %0, double* %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %5
store double 1.000000e+00, double* %7
%8 = load double*, double** %6
store double 0.000000e+00, double* %8
ret void
}

LLVM IR (-O2):
define void @LdL0(double %0, double* nocapture writeonly %1, double* nocapture writeonly %2) {
store double 1.000000e+00, double* %1
store double 0.000000e+00, double* %2
ret void
}
/* Variables and functions */
scalar_t__ tanh(double);
main() { return tanh(3.45) != 0; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
call   1030 <tanh@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xee7(%rip),%xmm0
call   1030 <tanh@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @tanh(double 3.450000e+00)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @tanh(double 3.450000e+00)
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
void RTThreadSleep(void) {}


x86 assembly (clang, -O0):
<RTThreadSleep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTThreadSleep>:
ret

LLVM IR (-O0):
define void @RTThreadSleep() {
ret void
}

LLVM IR (-O2):
define void @RTThreadSleep() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void USB_LP_CAN_RX0_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<USB_LP_CAN_RX0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_LP_CAN_RX0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @USB_LP_CAN_RX0_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @USB_LP_CAN_RX0_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
scalar_t__ is_digit(char);
scalar_t__ is_letter(char);
int is_vname_char(char c) { return is_digit(c) || is_letter(c) || c == '_'; }


x86 assembly (clang, -O0):
<is_vname_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <is_digit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1171 <is_vname_char+0x51>
movsbl -0x1(%rbp),%edi
call   1030 <is_letter@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1171 <is_vname_char+0x51>
movsbl -0x1(%rbp),%eax
cmp    $0x5f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_vname_char>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1040 <is_digit@plt>
mov    $0x1,%ebx
test   %rax,%rax
jne    114b <is_vname_char+0x2b>
movsbl %bpl,%edi
call   1030 <is_letter@plt>
test   %rax,%rax
jne    114b <is_vname_char+0x2b>
xor    %ebx,%ebx
cmp    $0x5f,%bpl
sete   %bl
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_vname_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @is_digit(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @is_letter(i8 signext %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 95
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_vname_char(i8 signext %0) {
%2 = tail call i64 @is_digit(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = tail call i64 @is_letter(i8 signext %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = icmp eq i8 %0, 95
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %7, %4, %1
%11 = phi i32 [ 1, %4 ], [ 1, %1 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void *t1(void *arg) {
  int x;
  x = 0;
  assert(x == 0);
}


x86 assembly (clang, -O0):
<t1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t1>:
mov    $0x1,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define i8* @t1(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
define noalias i8* @t1(i8* nocapture readnone %0) {
%2 = tail call i32 @assert(i32 1)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int a = 1;
  int b = 2;
  printf("a=%d, b=%d\n", ++a, ++b);
  printf("a=%d, b=%d\n", a++, b++);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x4(%rbp),%esi
add    $0x1,%esi
mov    %esi,-0x4(%rbp)
mov    -0x8(%rbp),%edx
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%edx
mov    %edx,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"a=%d, b=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
store i32 2, i32* %2
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %6)
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"a=%d, b=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 2, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 2, i32 3)
ret i32 0
}
struct NestedIterator *nestedIterCreate(struct NestedInteger **nestedList,
                                        int nestedListSize) {}


x86 assembly (clang, -O0):
<nestedIterCreate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nestedIterCreate>:
ret

LLVM IR (-O0):
%struct.NestedIterator = type opaque
%struct.NestedInteger = type opaque
define %struct.NestedIterator* @nestedIterCreate(%struct.NestedInteger** %0, i32 %1) {
%3 = alloca %struct.NestedIterator*
%4 = alloca %struct.NestedInteger**
%5 = alloca i32
store %struct.NestedInteger** %0, %struct.NestedInteger*** %4
store i32 %1, i32* %5
%6 = load %struct.NestedIterator*, %struct.NestedIterator** %3
ret %struct.NestedIterator* %6
}

LLVM IR (-O2):
%struct.NestedIterator = type opaque
%struct.NestedInteger = type opaque
define noalias %struct.NestedIterator* @nestedIterCreate(%struct.NestedInteger** nocapture readnone %0, i32 %1) {
ret %struct.NestedIterator* undef
}
/* Variables and functions */
int /*<<< orphan*/ japi_setslidesize(int, int);
void j_setslidesize(int arg0, int arg1) { japi_setslidesize(arg0, arg1); }


x86 assembly (clang, -O0):
<j_setslidesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <japi_setslidesize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_setslidesize>:
jmp    1030 <japi_setslidesize@plt>

LLVM IR (-O0):
define void @j_setslidesize(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @japi_setslidesize(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @j_setslidesize(i32 %0, i32 %1) {
%3 = tail call i32 @japi_setslidesize(i32 %0, i32 %1)
ret void
}
float test_cimagf(_Complex float x) { return __builtin_cimagf(x); }


x86 assembly (clang, -O0):
<test_cimagf>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_cimagf>:
shufps $0x55,%xmm0,%xmm0
ret

LLVM IR (-O0):
define float @test_cimagf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = bitcast { float, float }* %2 to <2 x float>*
store <2 x float> %0, <2 x float>* %3
%4 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%5 = load float, float* %4
%6 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
%7 = load float, float* %6
ret float %7
}

LLVM IR (-O2):
define float @test_cimagf(<2 x float> %0) {
%2 = extractelement <2 x float> %0, i64 1
ret float %2
}
int foo(int a, int *p) {
  int x = *p + 2;
  int y = *p - 1;
  int z = *p + 9;
  if (p)
    a = x + y + z;
  else
    a = x - y;
  return a;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x2,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
sub    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x9,%eax
mov    %eax,-0x1c(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114b <foo+0x4b>
mov    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <foo+0x54>
mov    -0x14(%rbp),%eax
sub    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    (%rsi),%eax
lea    (%rax,%rax,2),%eax
add    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = add nsw i32 %9, 2
store i32 %10, i32* %5
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = sub nsw i32 %12, 1
store i32 %13, i32* %6
%14 = load i32*, i32** %4
%15 = load i32, i32* %14
%16 = add nsw i32 %15, 9
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = icmp ne i32* %17, null
br i1 %18, label %19, label %25
19: ; preds = %2
%20 = load i32, i32* %5
%21 = load i32, i32* %6
%22 = add nsw i32 %20, %21
%23 = load i32, i32* %7
%24 = add nsw i32 %22, %23
store i32 %24, i32* %3
br label %29
25: ; preds = %2
%26 = load i32, i32* %5
%27 = load i32, i32* %6
%28 = sub nsw i32 %26, %27
store i32 %28, i32* %3
br label %29
29: ; preds = %25, %19
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = shl i32 %3, 1
%5 = add i32 %3, 10
%6 = add i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ alabel(char, char, char *);
int label(char *s) {
  (void)alabel('l', 'b', s);
  return 0;
}


x86 assembly (clang, -O0):
<label>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x6c,%edi
mov    $0x62,%esi
call   1030 <alabel@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<label>:
push   %rax
mov    %rdi,%rdx
mov    $0x6c,%edi
mov    $0x62,%esi
call   1030 <alabel@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @label(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @alabel(i8 signext 108, i8 signext 98, i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @label(i8* %0) {
%2 = tail call i32 @alabel(i8 signext 108, i8 signext 98, i8* %0)
ret i32 0
}