unsigned long long flip_B2(const unsigned long long P,
                           const unsigned long long O) {
  unsigned int outflank_h;
  unsigned long long flipped, outflank_v, outflank_d9;
  outflank_v = ((O | ~0x0202020202020000ULL) + 0x0000000000020000ULL) & P &
               0x0202020202000000ULL;
  flipped =
      (outflank_v - (unsigned int)(outflank_v != 0)) & 0x0002020202020000ULL;
  outflank_h = ((O & 0x00007c00u) + 0x00000400u) & P;
  flipped |= (outflank_h - (outflank_h >> 8)) & 0x00007c00u;
  outflank_d9 = ((O | ~0x8040201008040000ULL) + 0x0000000000040000ULL) & P &
                0x8040201008000000ULL;
  flipped |=
      (outflank_d9 - (unsigned int)(outflank_d9 != 0)) & 0x0040201008040000ULL;
  return flipped;
}


x86 assembly (clang, -O0):
<flip_B2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0xfdfdfdfdfdfdffff,%rax
fd fd fd
or     -0x10(%rbp),%rax
add    $0x20000,%rax
and    -0x8(%rbp),%rax
movabs $0x202020202000000,%rcx
02 02 02
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmpq   $0x0,-0x28(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,%ecx
sub    %rcx,%rax
movabs $0x2020202020000,%rcx
and    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7c00,%rax
add    $0x400,%rax
and    -0x8(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x14(%rbp),%ecx
shr    $0x8,%ecx
sub    %ecx,%eax
and    $0x7c00,%eax
mov    %eax,%eax
or     -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
movabs $0x7fbfdfeff7fbffff,%rax
df bf 7f
or     -0x10(%rbp),%rax
add    $0x40000,%rax
and    -0x8(%rbp),%rax
movabs $0x8040201008000000,%rcx
20 40 80
and    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
cmpq   $0x0,-0x30(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,%ecx
sub    %rcx,%rax
movabs $0x40201008040000,%rcx
and    %rcx,%rax
or     -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_B2>:
movabs $0x1fdfdfdfdfdffff,%rax
fd fd 01
or     %rsi,%rax
add    $0x20000,%rax
movabs $0x202020202000000,%rdx
02 02 02
and    %rdi,%rdx
and    %rax,%rdx
cmp    $0x1,%rdx
adc    $0xffffffffffffffff,%rdx
movabs $0x2020202020000,%rcx
and    %rdx,%rcx
movabs $0x7fbfdfeff7fbffff,%rax
df bf 7f
or     %rsi,%rax
mov    %esi,%edx
and    $0x7c00,%edx
add    $0x400,%edx
movabs $0x8040201008000000,%rsi
20 40 80
and    %rdi,%rsi
and    %edx,%edi
mov    %edi,%edx
shr    $0x8,%edx
sub    %edx,%edi
and    $0x7c00,%edi
add    $0x40000,%rax
and    %rax,%rsi
cmp    $0x1,%rsi
adc    $0xffffffffffffffff,%rsi
movabs $0x40201008040000,%rax
and    %rsi,%rax
or     %rcx,%rax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @flip_B2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = or i64 %9, -144680345676152833
%11 = add i64 %10, 131072
%12 = load i64, i64* %3
%13 = and i64 %11, %12
%14 = and i64 %13, 144680345676021760
store i64 %14, i64* %7
%15 = load i64, i64* %7
%16 = load i64, i64* %7
%17 = icmp ne i64 %16, 0
%18 = zext i1 %17 to i32
%19 = zext i32 %18 to i64
%20 = sub i64 %15, %19
%21 = and i64 %20, 565157600296960
store i64 %21, i64* %6
%22 = load i64, i64* %4
%23 = and i64 %22, 31744
%24 = add i64 %23, 1024
%25 = load i64, i64* %3
%26 = and i64 %24, %25
%27 = trunc i64 %26 to i32
store i32 %27, i32* %5
%28 = load i32, i32* %5
%29 = load i32, i32* %5
%30 = lshr i32 %29, 8
%31 = sub i32 %28, %30
%32 = and i32 %31, 31744
%33 = zext i32 %32 to i64
%34 = load i64, i64* %6
%35 = or i64 %34, %33
store i64 %35, i64* %6
%36 = load i64, i64* %4
%37 = or i64 %36, 9205322385119248383
%38 = add i64 %37, 262144
%39 = load i64, i64* %3
%40 = and i64 %38, %39
%41 = and i64 %40, -9205322385119510528
store i64 %41, i64* %8
%42 = load i64, i64* %8
%43 = load i64, i64* %8
%44 = icmp ne i64 %43, 0
%45 = zext i1 %44 to i32
%46 = zext i32 %45 to i64
%47 = sub i64 %42, %46
%48 = and i64 %47, 18049651735527424
%49 = load i64, i64* %6
%50 = or i64 %49, %48
store i64 %50, i64* %6
%51 = load i64, i64* %6
ret i64 %51
}

LLVM IR (-O2):
define i64 @flip_B2(i64 %0, i64 %1) {
%3 = or i64 %1, 143550030475558911
%4 = add i64 %3, 131072
%5 = and i64 %0, 144680345676021760
%6 = and i64 %5, %4
%7 = icmp ne i64 %6, 0
%8 = sext i1 %7 to i64
%9 = add nsw i64 %6, %8
%10 = and i64 %9, 565157600296960
%11 = and i64 %1, 31744
%12 = add nuw nsw i64 %11, 1024
%13 = and i64 %12, %0
%14 = trunc i64 %13 to i32
%15 = lshr exact i32 %14, 8
%16 = sub nsw i32 %14, %15
%17 = and i32 %16, 31744
%18 = zext i32 %17 to i64
%19 = or i64 %1, 9205322385119248383
%20 = add i64 %19, 262144
%21 = and i64 %0, -9205322385119510528
%22 = and i64 %21, %20
%23 = icmp ne i64 %22, 0
%24 = sext i1 %23 to i64
%25 = add i64 %22, %24
%26 = and i64 %25, 18049651735527424
%27 = or i64 %26, %10
%28 = or i64 %27, %18
ret i64 %28
}