xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ atoi(char *);
int kill(scalar_t__, int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  if (argc < 2) {
    return -1;
  }
  pid_t pid = (pid_t)atoi(argv[1]);
  if (pid) {
    return kill(pid, SIGTERM);
  }
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    114c <main+0x2c>
movl   $0xffffffff,-0x4(%rbp)
jmp    118b <main+0x6b>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
cltq
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1184 <main+0x64>
mov    -0x18(%rbp),%rdi
mov    0x2e73(%rip),%rax
mov    (%rax),%esi
call   1030 <kill@plt>
mov    %eax,-0x4(%rbp)
jmp    118b <main+0x6b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%eax
cmp    $0x2,%edi
jl     114f <main+0x2f>
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
test   %eax,%eax
je     114a <main+0x2a>
movslq %eax,%rdi
mov    0x2ea6(%rip),%rax
mov    (%rax),%esi
pop    %rax
jmp    1030 <kill@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGTERM = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %23
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = call i32 @atoi(i8* %13)
%15 = sext i32 %14 to i64
store i64 %15, i64* %6
%16 = load i64, i64* %6
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %10
%19 = load i64, i64* %6
%20 = load i32, i32* @SIGTERM
%21 = call i32 @kill(i64 %19, i32 %20)
store i32 %21, i32* %3
br label %23
22: ; preds = %10
store i32 1, i32* %3
br label %23
23: ; preds = %22, %18, %9
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
@SIGTERM = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
%8 = icmp eq i32 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = sext i32 %7 to i64
%11 = load i32, i32* @SIGTERM
%12 = tail call i32 @kill(i64 %10, i32 %11)
br label %13
13: ; preds = %9, %4, %2
%14 = phi i32 [ -1, %2 ], [ %12, %9 ], [ 1, %4 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ c2_pulse();
int /*<<< orphan*/ c2_recv(int);
int /*<<< orphan*/ c2_send(int, int);
int /*<<< orphan*/ gpio_input(int, int);
int /*<<< orphan*/ gpio_output(int, int);
uint8_t c2_addr_read(void) {
  c2_pulse();
  gpio_output(4, 13);
  c2_send(2, 2);
  gpio_input(4, 13);
  c2_pulse();
  return c2_recv(8);
}


x86 assembly (clang, -O0):
<c2_addr_read>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <c2_pulse@plt>
mov    $0x4,%edi
mov    $0xd,%esi
call   1060 <gpio_output@plt>
mov    $0x2,%esi
mov    %esi,%edi
call   1070 <c2_send@plt>
mov    $0x4,%edi
mov    $0xd,%esi
call   1040 <gpio_input@plt>
mov    $0x0,%al
call   1030 <c2_pulse@plt>
mov    $0x8,%edi
call   1050 <c2_recv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<c2_addr_read>:
push   %rax
xor    %eax,%eax
call   1030 <c2_pulse@plt>
mov    $0x4,%edi
mov    $0xd,%esi
call   1060 <gpio_output@plt>
mov    $0x2,%edi
mov    $0x2,%esi
call   1070 <c2_send@plt>
mov    $0x4,%edi
mov    $0xd,%esi
call   1040 <gpio_input@plt>
xor    %eax,%eax
call   1030 <c2_pulse@plt>
mov    $0x8,%edi
pop    %rax
jmp    1050 <c2_recv@plt>

LLVM IR (-O0):
define i32 @c2_addr_read() {
%1 = call i32 (...) @c2_pulse()
%2 = call i32 @gpio_output(i32 4, i32 13)
%3 = call i32 @c2_send(i32 2, i32 2)
%4 = call i32 @gpio_input(i32 4, i32 13)
%5 = call i32 (...) @c2_pulse()
%6 = call i32 @c2_recv(i32 8)
ret i32 %6
}

LLVM IR (-O2):
define i32 @c2_addr_read() {
%1 = tail call i32 (...) @c2_pulse()
%2 = tail call i32 @gpio_output(i32 4, i32 13)
%3 = tail call i32 @c2_send(i32 2, i32 2)
%4 = tail call i32 @gpio_input(i32 4, i32 13)
%5 = tail call i32 (...) @c2_pulse()
%6 = tail call i32 @c2_recv(i32 8)
ret i32 %6
}
int is_p1(int n) { return n % 3 == 0 || n % 5 == 0; }


x86 assembly (clang, -O0):
<is_p1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
je     1134 <is_p1+0x34>
mov    -0x4(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_p1>:
imul   $0xaaaaaaab,%edi,%eax
add    $0x2aaaaaaa,%eax
cmp    $0x55555555,%eax
jb     112a <is_p1+0x2a>
imul   $0xcccccccd,%edi,%ecx
add    $0x19999999,%ecx
xor    %eax,%eax
cmp    $0x33333333,%ecx
setb   %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_p1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 3
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 5
%9 = icmp eq i32 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_p1(i32 %0) {
%2 = srem i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = srem i32 %0, 5
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
__attribute__((always_)) __attribute__((flatten)) uint32_t
REG_UART_BASE(uint32_t i) {
  return (0x60000000 + (i * 0xf00));
}


x86 assembly (clang, -O0):
<REG_UART_BASE>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0xf00,-0x4(%rbp),%eax
add    $0x60000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<REG_UART_BASE>:
imul   $0xf00,%edi,%eax
add    $0x60000000,%eax
ret

LLVM IR (-O0):
define i32 @REG_UART_BASE(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 3840
%5 = add nsw i32 1610612736, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @REG_UART_BASE(i32 %0) {
%2 = mul nsw i32 %0, 3840
%3 = add nsw i32 %2, 1610612736
ret i32 %3
}
/* Variables and functions */
bool nrf51_errata_49(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_49>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_49>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_49() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_49() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
char *strcpy(char *, char *);
int main(void) {
  char *orig = "beast";
  char copy[40] = "Be the best that you can be.";
  char *ps;
  puts(orig);
  puts(copy);
  ps = strcpy(copy + 7, orig);
  puts(copy);
  puts(ps);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xebb(%rip),%rsi
mov    $0x28,%edx
call   1050 <memcpy@plt>
mov    -0x10(%rbp),%rdi
call   1040 <puts@plt>
lea    -0x40(%rbp),%rdi
call   1040 <puts@plt>
lea    -0x40(%rbp),%rdi
add    $0x7,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    %rax,-0x48(%rbp)
lea    -0x40(%rbp),%rdi
call   1040 <puts@plt>
mov    -0x48(%rbp),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x28,%rsp
movaps 0xf02(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xee6(%rip),%xmm0
movaps %xmm0,(%rsp)
movq   $0x0,0x20(%rsp)
lea    0xec2(%rip),%rdi
call   1030 <puts@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0x7(%rsp),%r14
movl   $0x73616562,0x7(%rsp)
73
movw   $0x74,0xb(%rsp)
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %r14,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"beast\00"
@__const.main.copy = [40 x i8] c"Be the best that you can be.\00\00\00\00\00\00\00\00\00\00\00\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca [40 x i8]
%4 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2
%5 = bitcast [40 x i8]* %3 to i8*
%6 = load i8*, i8** %2
%7 = call i32 @puts(i8* %6)
%8 = getelementptr inbounds [40 x i8], [40 x i8]* %3, i64 0, i64 0
%9 = call i32 @puts(i8* %8)
%10 = getelementptr inbounds [40 x i8], [40 x i8]* %3, i64 0, i64 0
%11 = getelementptr inbounds i8, i8* %10, i64 7
%12 = load i8*, i8** %2
%13 = call i8* @strcpy(i8* %11, i8* %12)
store i8* %13, i8** %4
%14 = getelementptr inbounds [40 x i8], [40 x i8]* %3, i64 0, i64 0
%15 = call i32 @puts(i8* %14)
%16 = load i8*, i8** %4
%17 = call i32 @puts(i8* %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"beast\00"
@__const.main.copy = [40 x i8] c"Be the best that you can be.\00\00\00\00\00\00\00\00\00\00\00\00"
define i32 @main() {
%1 = alloca [40 x i8]
%2 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @puts(i8* %2)
%5 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i64 0, i64 7
%6 = call i32 @puts(i8* %2)
%7 = call i32 @puts(i8* %5)
ret i32 0
}
int resto(int n, char *p) {
  int c = 0, resto = 0;
  while (c < n) {
    int a = p[c];
    resto = resto * 10 + a;
    p[c] = resto / 2;
    resto = resto % 2;
    c++;
  }
  return resto;
}


x86 assembly (clang, -O0):
<resto>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1172 <resto+0x72>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    %eax,-0x1c(%rbp)
imul   $0xa,-0x18(%rbp),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x18(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <resto+0x19>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<resto>:
test   %edi,%edi
jle    1138 <resto+0x38>
mov    %edi,%r8d
xor    %edx,%edx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movsbl (%rsi,%rdx,1),%edi
lea    (%rax,%rax,4),%eax
lea    (%rdi,%rax,2),%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
mov    %ecx,%edi
shr    %edi
mov    %dil,(%rsi,%rdx,1)
and    $0xfffffffe,%ecx
sub    %ecx,%eax
add    $0x1,%rdx
cmp    %rdx,%r8
jne    1110 <resto+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @resto(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %8
8: ; preds = %12, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %3
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %34
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
store i32 %18, i32* %7
%19 = load i32, i32* %6
%20 = mul nsw i32 %19, 10
%21 = load i32, i32* %7
%22 = add nsw i32 %20, %21
store i32 %22, i32* %6
%23 = load i32, i32* %6
%24 = sdiv i32 %23, 2
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %4
%27 = load i32, i32* %5
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i8, i8* %26, i64 %28
store i8 %25, i8* %29
%30 = load i32, i32* %6
%31 = srem i32 %30, 2
store i32 %31, i32* %6
%32 = load i32, i32* %5
%33 = add nsw i32 %32, 1
store i32 %33, i32* %5
br label %8
34: ; preds = %8
%35 = load i32, i32* %6
ret i32 %35
}

LLVM IR (-O2):
define i32 @resto(i32 %0, i8* nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %19
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %17, %6 ]
%8 = phi i32 [ 0, %4 ], [ %16, %6 ]
%9 = getelementptr inbounds i8, i8* %1, i64 %7
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = mul nsw i32 %8, 10
%13 = add nsw i32 %12, %11
%14 = sdiv i32 %13, 2
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = srem i32 %13, 2
%17 = add nuw nsw i64 %7, 1
%18 = icmp eq i64 %17, %5
br i1 %18, label %19, label %6
19: ; preds = %6, %2
%20 = phi i32 [ 0, %2 ], [ %16, %6 ]
ret i32 %20
}
void g_async_queue_length() {}


x86 assembly (clang, -O0):
<g_async_queue_length>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_async_queue_length>:
ret

LLVM IR (-O0):
define void @g_async_queue_length() {
ret void
}

LLVM IR (-O2):
define void @g_async_queue_length() {
ret void
}
/* Variables and functions */
scalar_t__ ceil(double);
scalar_t__ eq(double, double);
double rint(double);
int tolerant_ceil(double val) {
  double nearest = rint(val);
  if (eq(val, nearest))
    return ((int)nearest);
  else
    return ((int)ceil(val));
}


x86 assembly (clang, -O0):
<tolerant_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <rint@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
call   1050 <eq@plt>
cmp    $0x0,%rax
je     1172 <tolerant_ceil+0x42>
cvttsd2si -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <tolerant_ceil+0x4f>
movsd  -0x10(%rbp),%xmm0
call   1030 <ceil@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolerant_ceil>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <rint@plt>
movaps %xmm0,%xmm1
movsd  0x8(%rsp),%xmm0
movsd  %xmm1,0x10(%rsp)
call   1050 <eq@plt>
test   %rax,%rax
je     1163 <tolerant_ceil+0x33>
cvttsd2si 0x10(%rsp),%eax
add    $0x18,%rsp
ret
movsd  0x8(%rsp),%xmm0
call   1030 <ceil@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @tolerant_ceil(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = call double @llvm.rint.f64(double %5)
store double %6, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = call i64 @eq(double %7, double %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load double, double* %4
%13 = fptosi double %12 to i32
store i32 %13, i32* %2
br label %18
14: ; preds = %1
%15 = load double, double* %3
%16 = call i64 @ceil(double %15)
%17 = trunc i64 %16 to i32
store i32 %17, i32* %2
br label %18
18: ; preds = %14, %11
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @tolerant_ceil(double %0) {
%2 = tail call double @llvm.rint.f64(double %0)
%3 = tail call i64 @eq(double %0, double %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = fptosi double %2 to i32
br label %10
7: ; preds = %1
%8 = tail call i64 @ceil(double %0)
%9 = trunc i64 %8 to i32
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ LedsP__Leds__led1Toggle();
void BlinkC__Leds__led1Toggle(void) { LedsP__Leds__led1Toggle(); }


x86 assembly (clang, -O0):
<BlinkC__Leds__led1Toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LedsP__Leds__led1Toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<BlinkC__Leds__led1Toggle>:
xor    %eax,%eax
jmp    1030 <LedsP__Leds__led1Toggle@plt>

LLVM IR (-O0):
define void @BlinkC__Leds__led1Toggle() {
%1 = call i32 (...) @LedsP__Leds__led1Toggle()
ret void
}

LLVM IR (-O2):
define void @BlinkC__Leds__led1Toggle() {
%1 = tail call i32 (...) @LedsP__Leds__led1Toggle()
ret void
}
int compare_int(const void *ra, const void *rb) {
  return *(const int *)ra - *(const int *)rb;
}


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compare_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
void nop(unsigned n) {
  while (n--)
    __asm__ __volatile__("nop");
}


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1121 <nop+0x21>
nop
jmp    1107 <nop+0x7>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
test   %edi,%edi
je     1116 <nop+0x16>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
nop
add    $0xffffffff,%edi
jne    1110 <nop+0x10>
ret

LLVM IR (-O0):
define void @nop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @nop(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add i32 %4, -1
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %3
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
scalar_t__ C_isupper(int);
int C_tolower(int c) {
  { return C_isupper(c) ? (c - 'A' + 'a') : c; }
}


x86 assembly (clang, -O0):
<C_tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <C_isupper@plt>
cmp    $0x0,%rax
je     113e <C_tolower+0x2e>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <C_tolower+0x34>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <C_isupper@plt>
lea    0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @C_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @C_isupper(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 65
%9 = add nsw i32 %8, 97
br label %12
10: ; preds = %1
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %6
%13 = phi i32 [ %9, %6 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @C_tolower(i32 %0) {
%2 = tail call i64 @C_isupper(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
void SubTeacherTree(Schema, A, CompFunc) struct univStruct *Schema;
struct Teacher **A;
int (*CompFunc)();
{ TeacherTreeTreeRemove(Schema, A, CompFunc); }


x86 assembly (clang, -O0):
<SubTeacherTree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1030 <TeacherTreeTreeRemove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SubTeacherTree>:
xor    %eax,%eax
jmp    1030 <TeacherTreeTreeRemove@plt>

LLVM IR (-O0):
%struct.univStruct = type opaque
%struct.Teacher = type opaque
define void @SubTeacherTree(%struct.univStruct* %0, %struct.Teacher** %1, i32 (...)* %2) {
%4 = alloca %struct.univStruct*
%5 = alloca %struct.Teacher**
%6 = alloca i32 (...)*
store %struct.univStruct* %0, %struct.univStruct** %4
store %struct.Teacher** %1, %struct.Teacher*** %5
store i32 (...)* %2, i32 (...)** %6
%7 = load %struct.univStruct*, %struct.univStruct** %4
%8 = load %struct.Teacher**, %struct.Teacher*** %5
%9 = load i32 (...)*, i32 (...)** %6
%10 = call i32 (%struct.univStruct*, %struct.Teacher**, i32 (...)*, ...) bitcast (i32 (...)* @TeacherTreeTreeRemove to i32 (%struct.univStruct*, %struct.Teacher**, i32 (...)*, ...)*)(%struct.univStruct* %7, %struct.Teacher** %8, i32 (...)* %9)
ret void
}

LLVM IR (-O2):
%struct.univStruct = type opaque
%struct.Teacher = type opaque
define void @SubTeacherTree(%struct.univStruct* %0, %struct.Teacher** %1, i32 (...)* %2) {
%4 = tail call i32 (%struct.univStruct*, %struct.Teacher**, i32 (...)*, ...) bitcast (i32 (...)* @TeacherTreeTreeRemove to i32 (%struct.univStruct*, %struct.Teacher**, i32 (...)*, ...)*)(%struct.univStruct* %0, %struct.Teacher** %1, i32 (...)* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(int /*<<< orphan*/);
int do_quit(const char *inputfilename, int lineno, int argc,
            const char **argv) {
  die(0);
  return -1;
}


x86 assembly (clang, -O0):
<do_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
xor    %edi,%edi
call   1030 <die@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_quit>:
push   %rax
xor    %edi,%edi
call   1030 <die@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @do_quit(i8* %0, i32 %1, i32 %2, i8** %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8**
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8** %3, i8*** %8
%9 = call i32 @die(i32 0)
ret i32 -1
}

LLVM IR (-O2):
define i32 @do_quit(i8* nocapture readnone %0, i32 %1, i32 %2, i8** nocapture readnone %3) {
%5 = tail call i32 @die(i32 0)
ret i32 -1
}
void CAN2_RX1_IRQHandler() {}


x86 assembly (clang, -O0):
<CAN2_RX1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN2_RX1_IRQHandler>:
ret

LLVM IR (-O0):
define void @CAN2_RX1_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @CAN2_RX1_IRQHandler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void abort_impl(void) { abort(); }


x86 assembly (clang, -O0):
<abort_impl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<abort_impl>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @abort_impl() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @abort_impl() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ y_root;
};
typedef TYPE_1__ XKeyEvent;

/* Variables and functions */
int get_XKeyEvent_y_root(void *_p) { return (int)((XKeyEvent *)_p)->y_root; }


x86 assembly (clang, -O0):
<get_XKeyEvent_y_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyEvent_y_root>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XKeyEvent_y_root(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XKeyEvent_y_root(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int binChar(char ch) { return (ch == '0' || ch == '1'); }


x86 assembly (clang, -O0):
<binChar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
je     1129 <binChar+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x31,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<binChar>:
and    $0xfe,%dil
xor    %eax,%eax
cmp    $0x30,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @binChar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 48
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 49
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @binChar(i8 signext %0) {
%2 = and i8 %0, -2
%3 = icmp eq i8 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
int condition(int a, int b) {
  if (a == 42)
    return a;
  return b;
}


x86 assembly (clang, -O0):
<condition>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x2a,-0x8(%rbp)
jne    111f <condition+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1125 <condition+0x25>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<condition>:
mov    %esi,%eax
cmp    $0x2a,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @condition(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 42
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %5
store i32 %11, i32* %3
br label %12
12: ; preds = %10, %8
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @condition(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 42
%4 = select i1 %3, i32 42, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printk(char *);
void cleanup_module() { printk("clean_module\n"); }


x86 assembly (clang, -O0):
<cleanup_module>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printk@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup_module>:
lea    0xee9(%rip),%rdi
jmp    1030 <printk@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"clean_module\0A\00"
define void @cleanup_module() {
%1 = call i32 @printk(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"clean_module\0A\00"
define void @cleanup_module() {
%1 = tail call i32 @printk(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ key_t;

/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int semctl(int, int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/ *);
int semget(scalar_t__, int /*<<< orphan*/, int /*<<< orphan*/);
int semrm(key_t key, int id) {
  if (key) {
    id = semget(key, 0, 0);
    if (id == -1)
      return -1;
  }
  return semctl(id, 0, IPC_RMID, NULL);
}


x86 assembly (clang, -O0):
<semrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1165 <semrm+0x45>
mov    -0x10(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <semget@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1160 <semrm+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    117f <semrm+0x5f>
jmp    1165 <semrm+0x45>
mov    -0x14(%rbp),%edi
mov    0x2e71(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
xor    %eax,%eax
mov    %eax,%ecx
call   1040 <semctl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semrm>:
push   %rax
test   %rdi,%rdi
je     1136 <semrm+0x16>
xor    %esi,%esi
xor    %edx,%edx
call   1030 <semget@plt>
mov    %eax,%esi
cmp    $0xffffffff,%eax
je     114b <semrm+0x2b>
mov    0x2ea3(%rip),%rax
mov    (%rax),%edx
mov    %esi,%edi
xor    %esi,%esi
xor    %ecx,%ecx
pop    %rax
jmp    1040 <semctl@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@IPC_RMID = global i32 0
define i32 @semrm(i64 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i64, i64* %4
%10 = call i32 @semget(i64 %9, i32 0, i32 0)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 -1, i32* %3
br label %19
14: ; preds = %8
br label %15
15: ; preds = %14, %2
%16 = load i32, i32* %5
%17 = load i32, i32* @IPC_RMID
%18 = call i32 @semctl(i32 %16, i32 0, i32 %17, i32* null)
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %13
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define i32 @semrm(i64 %0, i32 %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @semget(i64 %0, i32 0, i32 0)
%6 = icmp eq i32 %5, -1
br i1 %6, label %11, label %7
7: ; preds = %4, %2
%8 = phi i32 [ %5, %4 ], [ %1, %2 ]
%9 = load i32, i32* @IPC_RMID
%10 = tail call i32 @semctl(i32 %8, i32 0, i32 %9, i32* null)
br label %11
11: ; preds = %4, %7
%12 = phi i32 [ %10, %7 ], [ -1, %4 ]
ret i32 %12
}
/* Variables and functions */
float powf(float, float);
float __glsl_exp2(float x) { return powf(2.0f, x); }


x86 assembly (clang, -O0):
<__glsl_exp2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm1
movss  0xed6(%rip),%xmm0
call   1030 <powf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glsl_exp2>:
jmp    1030 <exp2f@plt>

LLVM IR (-O0):
define float @__glsl_exp2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @powf(float 2.000000e+00, float %3)
ret float %4
}

LLVM IR (-O2):
define float @__glsl_exp2(float %0) {
%2 = tail call float @exp2f(float %0)
ret float %2
}
/* Variables and functions */
int new_rand();
int randValue(int x, int y) {
  if (y == 0) {
    return x;
  } else {
    int flex = 0;
    x -= y;
    y += y;
    flex = new_rand() % (y);
    x += flex;
    return x;
  }
}


x86 assembly (clang, -O0):
<randValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1133 <randValue+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116b <randValue+0x5b>
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <new_rand@plt>
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randValue>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
test   %esi,%esi
je     112b <randValue+0x1b>
mov    %esi,%ebp
sub    %esi,%ebx
add    %esi,%ebp
xor    %eax,%eax
call   1030 <new_rand@plt>
cltd
idiv   %ebp
add    %edx,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @randValue(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %25
11: ; preds = %2
store i32 0, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = sub nsw i32 %13, %12
store i32 %14, i32* %4
%15 = load i32, i32* %5
%16 = load i32, i32* %5
%17 = add nsw i32 %16, %15
store i32 %17, i32* %5
%18 = call i32 (...) @new_rand()
%19 = load i32, i32* %5
%20 = srem i32 %18, %19
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = load i32, i32* %4
%23 = add nsw i32 %22, %21
store i32 %23, i32* %4
%24 = load i32, i32* %4
store i32 %24, i32* %3
br label %25
25: ; preds = %11, %9
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @randValue(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = sub i32 %0, %1
%6 = shl nsw i32 %1, 1
%7 = tail call i32 (...) @new_rand()
%8 = srem i32 %7, %6
%9 = add nsw i32 %5, %8
br label %10
10: ; preds = %2, %4
%11 = phi i32 [ %9, %4 ], [ %0, %2 ]
ret i32 %11
}
void I420Psnr() {}


x86 assembly (clang, -O0):
<I420Psnr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I420Psnr>:
ret

LLVM IR (-O0):
define void @I420Psnr() {
ret void
}

LLVM IR (-O2):
define void @I420Psnr() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char const *);
void ModuleMessage(const char *ModuleName, const char *Message) {
  printf("%s : %s\n", ModuleName, Message);
}


x86 assembly (clang, -O0):
<ModuleMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ModuleMessage>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s : %s\0A\00"
define void @ModuleMessage(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s : %s\0A\00"
define void @ModuleMessage(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main(int argc, char const *argv[]) {
  int a, b;
  scanf("%d %d", &a, &b);
  printf("X = %d\n", a + b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
lea    -0x14(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x14(%rbp),%esi
add    -0x18(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%esi
add    0x4(%rsp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [8 x i8] c"X = %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %6, i32* %7)
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = add nsw i32 %9, %10
%12 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [8 x i8] c"X = %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %9, %8
%11 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
void main() {
  char *p = malloc(1);
  free(p);
  p = malloc(1);
  *p = 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x1,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 1)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @free(i8* %3)
%5 = call i8* @malloc(i32 1)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
store i8 1, i8* %6
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%2 = tail call i32 @free(i8* %1)
ret void
}
int int_cmp(const void *a, const void *b) { return *(int *)a - *(int *)b; }


x86 assembly (clang, -O0):
<int_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_cmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @int_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @int_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
unsigned long long rdmsr(int);
int /*<<< orphan*/ wrmsr(int, unsigned long long);
void apic_enable(void) { wrmsr(0x1b, rdmsr(0x1b) | (1ULL << 11)); }


x86 assembly (clang, -O0):
<apic_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1b,%edi
call   1030 <rdmsr@plt>
mov    %rax,%rsi
or     $0x800,%rsi
mov    $0x1b,%edi
call   1040 <wrmsr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<apic_enable>:
push   %rax
mov    $0x1b,%edi
call   1030 <rdmsr@plt>
or     $0x800,%rax
mov    $0x1b,%edi
mov    %rax,%rsi
pop    %rax
jmp    1040 <wrmsr@plt>

LLVM IR (-O0):
define void @apic_enable() {
%1 = call i64 @rdmsr(i32 27)
%2 = or i64 %1, 2048
%3 = call i32 @wrmsr(i32 27, i64 %2)
ret void
}

LLVM IR (-O2):
define void @apic_enable() {
%1 = tail call i64 @rdmsr(i32 27)
%2 = or i64 %1, 2048
%3 = tail call i32 @wrmsr(i32 27, i64 %2)
ret void
}
/* Variables and functions */
char *strchr(const char *s, int c) {
  while (*s != (char)c)
    if (*s++ == '\0') {
      return NULL;
    }
  return (char *)s;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x14(%rbp),%ecx
movsbl %cl,%ecx
cmp    %ecx,%eax
je     114d <strchr+0x4d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1148 <strchr+0x48>
movq   $0x0,-0x8(%rbp)
jmp    1155 <strchr+0x55>
jmp    110b <strchr+0xb>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
movsbl %sil,%ecx
nopw   0x0(%rax,%rax,1)
movsbl (%rax),%edx
cmp    %edx,%ecx
je     1121 <strchr+0x21>
add    $0x1,%rax
test   %dl,%dl
jne    1110 <strchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = trunc i32 %10 to i8
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %9, %12
br i1 %13, label %14, label %22
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %14
store i8* null, i8** %3
br label %24
21: ; preds = %14
br label %6
22: ; preds = %6
%23 = load i8*, i8** %4
store i8* %23, i8** %3
br label %24
24: ; preds = %22, %20
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
%3 = shl i32 %1, 24
%4 = ashr exact i32 %3, 24
br label %5
5: ; preds = %10, %2
%6 = phi i8* [ %0, %2 ], [ %11, %10 ]
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %4, %8
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = icmp eq i8 %7, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %10
%14 = phi i8* [ null, %10 ], [ %6, %5 ]
ret i8* %14
}
/* Variables and functions */
int /*<<< orphan*/ free(void **);
void free_contiguous_mem2(void **mem) {
  free(mem[0]);
  free(mem);
}


x86 assembly (clang, -O0):
<free_contiguous_mem2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_contiguous_mem2>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_contiguous_mem2(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 0
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i8**
%7 = call i32 @free(i8** %6)
%8 = load i8**, i8*** %2
%9 = call i32 @free(i8** %8)
ret void
}

LLVM IR (-O2):
define void @free_contiguous_mem2(i8** nocapture %0) {
%2 = bitcast i8** %0 to i8***
%3 = load i8**, i8*** %2
%4 = tail call i32 @free(i8** %3)
%5 = tail call i32 @free(i8** %0)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef scalar_t__ mqd_t;

/* Variables and functions */
int mq_timedsend(scalar_t__, char *, size_t, unsigned int, struct timespec *);
void test_mq_timedsend_prototype(void) {
  mqd_t mqdes;
  struct timespec timeout;
  char *msgp;
  int err;
  size_t msg_len;
  unsigned msg_prio;
  mqdes = 0;
  msgp = NULL;
  msg_len = 0;
  msg_prio = 0;
  err = mq_timedsend(mqdes, msgp, msg_len, msg_prio, &timeout);
  (void)err;
}


x86 assembly (clang, -O0):
<test_mq_timedsend_prototype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    -0x2c(%rbp),%ecx
lea    -0x10(%rbp),%r8
call   1030 <mq_timedsend@plt>
mov    %eax,-0x1c(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mq_timedsend_prototype>:
push   %rax
mov    %rsp,%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <mq_timedsend@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @test_mq_timedsend_prototype() {
%1 = alloca i64
%2 = alloca %struct.timespec
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i64 0, i64* %1
store i8* null, i8** %3
store i64 0, i64* %5
store i32 0, i32* %6
%7 = load i64, i64* %1
%8 = load i8*, i8** %3
%9 = load i64, i64* %5
%10 = load i32, i32* %6
%11 = call i32 @mq_timedsend(i64 %7, i8* %8, i64 %9, i32 %10, %struct.timespec* %2)
store i32 %11, i32* %4
%12 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @test_mq_timedsend_prototype() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = call i32 @mq_timedsend(i64 0, i8* null, i64 0, i32 0, %struct.timespec* %1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t gfsub(uint8_t a, uint8_t b) { return a ^ b; }


x86 assembly (clang, -O0):
<gfsub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfsub>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gfsub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @gfsub(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int /*<<< orphan*/,
                         int /*<<< orphan*/);
long ftell(int /*<<< orphan*/ *);
long filelength(FILE *fp) {
  long len;
  fseek(fp, 0, SEEK_END);
  len = ftell(fp);
  fseek(fp, 0, SEEK_SET);
  return len;
}


x86 assembly (clang, -O0):
<filelength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e80(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filelength>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eba(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %rbx,%rdi
call   1030 <ftell@plt>
mov    %rax,%r14
mov    0x2e8f(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @filelength(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* @SEEK_END
%6 = call i32 @fseek(i32* %4, i32 0, i32 %5)
%7 = load i32*, i32** %2
%8 = call i64 @ftell(i32* %7)
store i64 %8, i64* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* @SEEK_SET
%11 = call i32 @fseek(i32* %9, i32 0, i32 %10)
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @filelength(i32* nocapture %0) {
%2 = load i32, i32* @SEEK_END
%3 = tail call i32 @fseek(i32* %0, i32 0, i32 %2)
%4 = tail call i64 @ftell(i32* %0)
%5 = load i32, i32* @SEEK_SET
%6 = tail call i32 @fseek(i32* %0, i32 0, i32 %5)
ret i64 %4
}
void gtk_window_get_title() {}


x86 assembly (clang, -O0):
<gtk_window_get_title>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_window_get_title>:
ret

LLVM IR (-O0):
define void @gtk_window_get_title() {
ret void
}

LLVM IR (-O2):
define void @gtk_window_get_title() {
ret void
}
void pointer_free(void *ptr) {}


x86 assembly (clang, -O0):
<pointer_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer_free>:
ret

LLVM IR (-O0):
define void @pointer_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @pointer_free(i8* nocapture %0) {
ret void
}