xunge/DecIR huggingface dataset:
unsigned int f34(unsigned int x, long int y) {
  return (x >> y) | (x << ((-y) & (8 * 4 - 1)));
}


x86 assembly (clang, -O0):
<f34>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f34>:
mov    %rsi,%rcx
mov    %edi,%eax
ror    %cl,%eax
ret

LLVM IR (-O0):
define i32 @f34(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = trunc i64 %6 to i32
%8 = lshr i32 %5, %7
%9 = load i32, i32* %3
%10 = load i64, i64* %4
%11 = sub nsw i64 0, %10
%12 = and i64 %11, 31
%13 = trunc i64 %12 to i32
%14 = shl i32 %9, %13
%15 = or i32 %8, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f34(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = lshr i32 %0, %3
%5 = sub i32 0, %3
%6 = and i32 %5, 31
%7 = shl i32 %0, %6
%8 = or i32 %7, %4
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, int /*<<< orphan*/ *, int);
int /*<<< orphan*/ ntohl(int /*<<< orphan*/);
char *write_int32(char *buf, int32_t val) {
  int32_t tmp = ntohl(val);
  memcpy(buf, &tmp, 4);
  return buf + 4;
}


x86 assembly (clang, -O0):
<write_int32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <ntohl@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x4,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <ntohl@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x4,%rbx
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @write_int32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @ntohl(i32 %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = call i32 @memcpy(i8* %8, i32* %5, i32 4)
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 4
ret i8* %11
}

LLVM IR (-O2):
define i8* @write_int32(i8* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @ntohl(i32 %1)
store i32 %5, i32* %3
%6 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
%7 = getelementptr inbounds i8, i8* %0, i64 4
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ Example4();
int main() { Example4(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Example4@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <Example4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @Example4()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @Example4()
ret i32 0
}
/* Variables and functions */
int syscall(int, void *, size_t, unsigned int);
int missing_getrandom(void *buffer, size_t count, unsigned flags) {
  return syscall(318, buffer, count, flags);
}


x86 assembly (clang, -O0):
<missing_getrandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x13e,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<missing_getrandom>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x13e,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @missing_getrandom(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = call i32 @syscall(i32 318, i8* %7, i64 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @missing_getrandom(i8* %0, i64 %1, i32 %2) {
%4 = tail call i32 @syscall(i32 318, i8* %0, i64 %1, i32 %2)
ret i32 %4
}
int plus(int x, int y) {
  int res = x + y;
  x = y;
  return res;
}


x86 assembly (clang, -O0):
<plus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plus>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @plus(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %4
store i32 %9, i32* %3
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @plus(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int test_imm_72uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x72 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_72uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x72,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_72uint64_lowword_reg>:
test   $0x72,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_72uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 114
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_72uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 114
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ s2svp(float, float, float, float, float, float);
void s2svp_(float *x1, float *x2, float *y1, float *y2, float *z1, float *z2) {
  s2svp(*x1, *x2, *y1, *y2, *z1, *z2);
}


x86 assembly (clang, -O0):
<s2svp_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x20(%rbp),%rax
movss  (%rax),%xmm3
mov    -0x28(%rbp),%rax
movss  (%rax),%xmm4
mov    -0x30(%rbp),%rax
movss  (%rax),%xmm5
call   1030 <s2svp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2svp_>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
movss  (%rdx),%xmm2
movss  (%rcx),%xmm3
movss  (%r8),%xmm4
movss  (%r9),%xmm5
jmp    1030 <s2svp@plt>

LLVM IR (-O0):
define void @s2svp_(float* %0, float* %1, float* %2, float* %3, float* %4, float* %5) {
%7 = alloca float*
%8 = alloca float*
%9 = alloca float*
%10 = alloca float*
%11 = alloca float*
%12 = alloca float*
store float* %0, float** %7
store float* %1, float** %8
store float* %2, float** %9
store float* %3, float** %10
store float* %4, float** %11
store float* %5, float** %12
%13 = load float*, float** %7
%14 = load float, float* %13
%15 = load float*, float** %8
%16 = load float, float* %15
%17 = load float*, float** %9
%18 = load float, float* %17
%19 = load float*, float** %10
%20 = load float, float* %19
%21 = load float*, float** %11
%22 = load float, float* %21
%23 = load float*, float** %12
%24 = load float, float* %23
%25 = call i32 @s2svp(float %14, float %16, float %18, float %20, float %22, float %24)
ret void
}

LLVM IR (-O2):
define void @s2svp_(float* nocapture %0, float* nocapture %1, float* nocapture %2, float* nocapture %3, float* nocapture %4, float* nocapture %5) {
%7 = load float, float* %0
%8 = load float, float* %1
%9 = load float, float* %2
%10 = load float, float* %3
%11 = load float, float* %4
%12 = load float, float* %5
%13 = tail call i32 @s2svp(float %7, float %8, float %9, float %10, float %11, float %12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
char *getcwd(int /*<<< orphan*/, int /*<<< orphan*/);
main() {
  char *xpwd;
  xpwd = getcwd(0, 0);
  exit(xpwd == 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %esi,%esi
mov    %esi,%edi
call   1030 <getcwd@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <getcwd@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @getcwd(i32 0, i32 0)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8* @getcwd(i32 0, i32 0)
%2 = icmp eq i8* %1, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
size_t strlcat(char *, char const *, size_t);
size_t BUF_strlcat(char *dst, const char *src, size_t size) {
  return strlcat(dst, src, size);
}


x86 assembly (clang, -O0):
<BUF_strlcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strlcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BUF_strlcat>:
jmp    1030 <strlcat@plt>

LLVM IR (-O0):
define i64 @BUF_strlcat(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @strlcat(i8* %7, i8* %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @BUF_strlcat(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @strlcat(i8* %0, i8* %1, i64 %2)
ret i64 %4
}
unsigned symtox(unsigned lls) {
  if (lls <= 279) {
    return 0;
  }
  if (lls <= 283) {
    return 100;
  }
  return 200;
}


x86 assembly (clang, -O0):
<symtox>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x117,-0x8(%rbp)
ja     1120 <symtox+0x20>
movl   $0x0,-0x4(%rbp)
jmp    1140 <symtox+0x40>
cmpl   $0x11b,-0x8(%rbp)
ja     1139 <symtox+0x39>
movl   $0x64,-0x4(%rbp)
jmp    1140 <symtox+0x40>
movl   $0xc8,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<symtox>:
cmp    $0x11c,%edi
mov    $0x64,%eax
mov    $0xc8,%ecx
cmovb  %eax,%ecx
xor    %eax,%eax
cmp    $0x118,%edi
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @symtox(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ule i32 %4, 279
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp ule i32 %8, 283
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 100, i32* %2
br label %12
11: ; preds = %7
store i32 200, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @symtox(i32 %0) {
%2 = icmp ult i32 %0, 280
%3 = icmp ult i32 %0, 284
%4 = select i1 %3, i32 100, i32 200
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
/* Variables and functions */
scalar_t__ omp_target_alloc(int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void memleak_omp_target_alloc() {
  char *pChars = (char *)omp_target_alloc(2, 0);
  printf("pChars: %p", pChars);
}


x86 assembly (clang, -O0):
<memleak_omp_target_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
xor    %esi,%esi
call   1040 <omp_target_alloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memleak_omp_target_alloc>:
push   %rax
mov    $0x2,%edi
xor    %esi,%esi
call   1040 <omp_target_alloc@plt>
lea    0xecc(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"pChars: %p\00"
define void @memleak_omp_target_alloc() {
%1 = alloca i8*
%2 = call i64 @omp_target_alloc(i32 2, i32 0)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"pChars: %p\00"
define void @memleak_omp_target_alloc() {
%1 = tail call i64 @omp_target_alloc(i32 2, i32 0)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
/* Variables and functions */
int SIGWINCH;
int /*<<< orphan*/ exit_failure_with_help(char *);
int /*<<< orphan*/ exit_success(char *);
void sighandler(int signal) {
  if (signal == SIGWINCH) {
    exit_failure_with_help("resize not supported\n");
  } else {
    exit_success("bail out...\n");
  }
}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
jne    114e <sighandler+0x2e>
lea    0xebc(%rip),%rdi
call   1040 <exit_failure_with_help@plt>
jmp    115a <sighandler+0x3a>
lea    0xec1(%rip),%rdi
call   1030 <exit_success@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
mov    0x2ec1(%rip),%rax
cmp    %edi,(%rax)
jne    1137 <sighandler+0x17>
lea    0xece(%rip),%rdi
jmp    1040 <exit_failure_with_help@plt>
lea    0xed8(%rip),%rdi
jmp    1030 <exit_success@plt>

LLVM IR (-O0):
@SIGWINCH = global i32 0
@.str = [22 x i8] c"resize not supported\0A\00"
@.str.1 = [13 x i8] c"bail out...\0A\00"
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGWINCH
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @exit_failure_with_help(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %1
%9 = call i32 @exit_success(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
@SIGWINCH = global i32 0
@.str = [22 x i8] c"resize not supported\0A\00"
@.str.1 = [13 x i8] c"bail out...\0A\00"
define void @sighandler(i32 %0) {
%2 = load i32, i32* @SIGWINCH
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @exit_failure_with_help(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %1
%7 = tail call i32 @exit_success(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x3c() {
  Assert_real((iscntrl(60) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              305, ("iscntrl should be 0 for <"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x3c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x131,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x3c>:
push   %rax
mov    $0x3c,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x131,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for <\00"
define void @t_iscntrl_0x3c() {
%1 = call i64 @iscntrl(i32 60)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 305, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for <\00"
define void @t_iscntrl_0x3c() {
%1 = tail call i64 @iscntrl(i32 60)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 305, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
here:
  printf("\e[H\e[2J");
  goto here;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <printf@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [8 x i8] c"\1B[H\1B[2J\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %2, %0
%3 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %2
}

LLVM IR (-O2):
@.str = [8 x i8] c"\1B[H\1B[2J\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %1
}
void gdk_window_peek_children() {}


x86 assembly (clang, -O0):
<gdk_window_peek_children>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_window_peek_children>:
ret

LLVM IR (-O0):
define void @gdk_window_peek_children() {
ret void
}

LLVM IR (-O2):
define void @gdk_window_peek_children() {
ret void
}
/* Variables and functions */
char getchar();
char tolower(char);
char getAnswer(void) {
  char c;
  char result;
  c = getchar();
  result = tolower(c);
  while (c != '\n') {
    c = getchar();
  }
  return result;
}


x86 assembly (clang, -O0):
<getAnswer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <tolower@plt>
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
je     115a <getAnswer+0x3a>
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x1(%rbp)
jmp    113e <getAnswer+0x1e>
movsbl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getAnswer>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <getchar@plt>
movsbl %al,%ebp
mov    %ebp,%edi
call   1040 <tolower@plt>
mov    %eax,%ebx
cmp    $0xa,%bpl
je     114b <getAnswer+0x2b>
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%al
jne    1140 <getAnswer+0x20>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @getAnswer() {
%1 = alloca i8
%2 = alloca i8
%3 = call signext i8 (...) @getchar()
store i8 %3, i8* %1
%4 = load i8, i8* %1
%5 = call signext i8 @tolower(i8 signext %4)
store i8 %5, i8* %2
br label %6
6: ; preds = %10, %0
%7 = load i8, i8* %1
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 10
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = call signext i8 (...) @getchar()
store i8 %11, i8* %1
br label %6
12: ; preds = %6
%13 = load i8, i8* %2
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @getAnswer() {
%1 = tail call signext i8 (...) @getchar()
%2 = tail call signext i8 @tolower(i8 signext %1)
%3 = icmp eq i8 %1, 10
br i1 %3, label %7, label %4
4: ; preds = %0, %4
%5 = tail call signext i8 (...) @getchar()
%6 = icmp eq i8 %5, 10
br i1 %6, label %7, label %4
7: ; preds = %4, %0
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ sastantua(int);
int main() {
  sastantua(5);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <sastantua@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <sastantua@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @sastantua(i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @sastantua(i32 5)
ret i32 0
}
void sfe_ipv6_destroy_all_rules_for_dev(struct net_device *dev) { return; }


x86 assembly (clang, -O0):
<sfe_ipv6_destroy_all_rules_for_dev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfe_ipv6_destroy_all_rules_for_dev>:
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define void @sfe_ipv6_destroy_all_rules_for_dev(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret void
}

LLVM IR (-O2):
%struct.net_device = type opaque
define void @sfe_ipv6_destroy_all_rules_for_dev(%struct.net_device* nocapture %0) {
ret void
}
int mr97311_init(struct usb_spca50x *pcam) { return 0; }


x86 assembly (clang, -O0):
<mr97311_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mr97311_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.usb_spca50x = type opaque
define i32 @mr97311_init(%struct.usb_spca50x* %0) {
%2 = alloca %struct.usb_spca50x*
store %struct.usb_spca50x* %0, %struct.usb_spca50x** %2
ret i32 0
}

LLVM IR (-O2):
%struct.usb_spca50x = type opaque
define i32 @mr97311_init(%struct.usb_spca50x* nocapture readnone %0) {
ret i32 0
}
void I2STxEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = 0x00000001;
  (*((volatile unsigned long *)(ulBase + 0x00000C00))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<I2STxEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x1,0x10(%rax)
mov    -0x8(%rbp),%rax
mov    0xc00(%rax),%rcx
or     $0x1,%rcx
mov    %rcx,0xc00(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2STxEnable>:
movq   $0x1,0x10(%rdi)
orq    $0x1,0xc00(%rdi)
01
ret

LLVM IR (-O0):
define void @I2STxEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 16
%5 = inttoptr i64 %4 to i64*
store volatile i64 1, i64* %5
%6 = load i64, i64* %2
%7 = add i64 %6, 3072
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, 1
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2STxEnable(i64 %0) {
%2 = add i64 %0, 16
%3 = inttoptr i64 %2 to i64*
store volatile i64 1, i64* %3
%4 = add i64 %0, 3072
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 1
store volatile i64 %7, i64* %5
ret void
}
falFreeFontInfo() { return 0; }


x86 assembly (clang, -O0):
<falFreeFontInfo>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<falFreeFontInfo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @falFreeFontInfo() {
ret i32 0
}

LLVM IR (-O2):
define i32 @falFreeFontInfo() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct etherbone_memory_handlers {
  int dummy;
};

/* Variables and functions */
int etherbone_callback(struct etherbone_memory_handlers *, int /*<<< orphan*/ *,
                       size_t, size_t);
int etherbone_noerror_callback(struct etherbone_memory_handlers *mem,
                               uint8_t *buf, size_t buf_size, size_t recv_len) {
  int res = etherbone_callback(mem, buf, buf_size, recv_len);
  return res < 0 ? 0 : res;
}


x86 assembly (clang, -O0):
<etherbone_noerror_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <etherbone_callback@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    1154 <etherbone_noerror_callback+0x44>
xor    %eax,%eax
mov    %eax,-0x28(%rbp)
jmp    115a <etherbone_noerror_callback+0x4a>
mov    -0x24(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<etherbone_noerror_callback>:
push   %rax
call   1030 <etherbone_callback@plt>
xor    %ecx,%ecx
test   %eax,%eax
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.etherbone_memory_handlers = type { i32 }
define i32 @etherbone_noerror_callback(%struct.etherbone_memory_handlers* %0, i32* %1, i64 %2, i64 %3) {
%5 = alloca %struct.etherbone_memory_handlers*
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32
store %struct.etherbone_memory_handlers* %0, %struct.etherbone_memory_handlers** %5
store i32* %1, i32** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%10 = load %struct.etherbone_memory_handlers*, %struct.etherbone_memory_handlers** %5
%11 = load i32*, i32** %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = call i32 @etherbone_callback(%struct.etherbone_memory_handlers* %10, i32* %11, i64 %12, i64 %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %4
br label %20
18: ; preds = %4
%19 = load i32, i32* %9
br label %20
20: ; preds = %18, %17
%21 = phi i32 [ 0, %17 ], [ %19, %18 ]
ret i32 %21
}

LLVM IR (-O2):
%struct.etherbone_memory_handlers = type { i32 }
define i32 @etherbone_noerror_callback(%struct.etherbone_memory_handlers* %0, i32* %1, i64 %2, i64 %3) {
%5 = tail call i32 @etherbone_callback(%struct.etherbone_memory_handlers* %0, i32* %1, i64 %2, i64 %3)
%6 = icmp sgt i32 %5, 0
%7 = select i1 %6, i32 %5, i32 0
ret i32 %7
}
/* Variables and functions */
int ap_cmd_get_int(int, int, int *);
int ap_is_playing(int session, int *val) {
  return (ap_cmd_get_int(session, 0xcc0f, val));
}


x86 assembly (clang, -O0):
<ap_is_playing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0xcc0f,%esi
call   1030 <ap_cmd_get_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap_is_playing>:
mov    %rsi,%rdx
mov    $0xcc0f,%esi
jmp    1030 <ap_cmd_get_int@plt>

LLVM IR (-O0):
define i32 @ap_is_playing(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @ap_cmd_get_int(i32 %5, i32 52239, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ap_is_playing(i32 %0, i32* %1) {
%3 = tail call i32 @ap_cmd_get_int(i32 %0, i32 52239, i32* %1)
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int spi_write(int, int *, int);
int do_deep_powerdown(int fd) {
  uint8_t op = 0xB9;
  return spi_write(fd, &op, 1);
}


x86 assembly (clang, -O0):
<do_deep_powerdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xb9,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1030 <spi_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_deep_powerdown>:
push   %rax
movl   $0xb9,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <spi_write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @do_deep_powerdown(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 185, i32* %3
%4 = load i32, i32* %2
%5 = call i32 @spi_write(i32 %4, i32* %3, i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @do_deep_powerdown(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 185, i32* %2
%4 = call i32 @spi_write(i32 %0, i32* %2, i32 1)
ret i32 %4
}
const char *strip_prespace(const char *line) {
  while (*line == ' ')
    line++;
  return line;
}


x86 assembly (clang, -O0):
<strip_prespace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    1129 <strip_prespace+0x29>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <strip_prespace+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strip_prespace>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x20,0x1(%rax)
lea    0x1(%rax),%rax
je     1110 <strip_prespace+0x10>
ret

LLVM IR (-O0):
define i8* @strip_prespace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 32
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @strip_prespace(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ eset(int);
int getch_(int /*<<< orphan*/);
char kbhit();
char escKey() {
  if (kbhit() == '[') {
    getch_(0);
    int code = getch_(0);
    if (('A' <= code) && (code <= 'D'))
      return -code;
  }
  eset(99);
  return 0;
}


x86 assembly (clang, -O0):
<escKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <kbhit@plt>
movsbl %al,%eax
cmp    $0x5b,%eax
jne    1186 <escKey+0x56>
xor    %edi,%edi
call   1050 <getch_@plt>
xor    %edi,%edi
call   1050 <getch_@plt>
mov    %eax,-0x8(%rbp)
mov    $0x41,%eax
cmp    -0x8(%rbp),%eax
jg     1181 <escKey+0x51>
cmpl   $0x44,-0x8(%rbp)
jg     1181 <escKey+0x51>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %al,-0x1(%rbp)
jmp    1194 <escKey+0x64>
jmp    1186 <escKey+0x56>
mov    $0x63,%edi
call   1030 <eset@plt>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<escKey>:
push   %rax
xor    %eax,%eax
call   1040 <kbhit@plt>
cmp    $0x5b,%al
jne    1152 <escKey+0x22>
xor    %edi,%edi
call   1050 <getch_@plt>
xor    %edi,%edi
call   1050 <getch_@plt>
lea    -0x45(%rax),%ecx
cmp    $0xfffffffb,%ecx
ja     1160 <escKey+0x30>
mov    $0x63,%edi
call   1030 <eset@plt>
xor    %eax,%eax
pop    %rcx
ret
neg    %al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @escKey() {
%1 = alloca i8
%2 = alloca i32
%3 = call signext i8 (...) @kbhit()
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 91
br i1 %5, label %6, label %19
6: ; preds = %0
%7 = call i32 @getch_(i32 0)
%8 = call i32 @getch_(i32 0)
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = icmp sle i32 65, %9
br i1 %10, label %11, label %18
11: ; preds = %6
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 68
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* %2
%16 = sub nsw i32 0, %15
%17 = trunc i32 %16 to i8
store i8 %17, i8* %1
br label %21
18: ; preds = %11, %6
br label %19
19: ; preds = %18, %0
%20 = call i32 @eset(i32 99)
store i8 0, i8* %1
br label %21
21: ; preds = %19, %14
%22 = load i8, i8* %1
ret i8 %22
}

LLVM IR (-O2):
define signext i8 @escKey() {
%1 = tail call signext i8 (...) @kbhit()
%2 = icmp eq i8 %1, 91
br i1 %2, label %3, label %10
3: ; preds = %0
%4 = tail call i32 @getch_(i32 0)
%5 = tail call i32 @getch_(i32 0)
%6 = add i32 %5, -69
%7 = icmp ult i32 %6, -4
%8 = trunc i32 %5 to i8
%9 = sub i8 0, %8
br i1 %7, label %10, label %12
10: ; preds = %3, %0
%11 = tail call i32 @eset(i32 99)
br label %12
12: ; preds = %3, %10
%13 = phi i8 [ %9, %3 ], [ 0, %10 ]
ret i8 %13
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void print_spaces(int space_number) {
  while (space_number-- > 0)
    putchar(' ');
}


x86 assembly (clang, -O0):
<print_spaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    113e <print_spaces+0x2e>
mov    $0x20,%edi
call   1030 <putchar@plt>
jmp    111b <print_spaces+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_spaces>:
push   %rbx
test   %edi,%edi
jle    1132 <print_spaces+0x22>
mov    %edi,%ebx
add    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <print_spaces+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @print_spaces(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp sgt i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @putchar(i8 signext 32)
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @print_spaces(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 @putchar(i8 signext 32)
%7 = icmp ugt i32 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret void
}
int xiswhite(int c) { return (c > 0u) && (c <= 32u); }


x86 assembly (clang, -O0):
<xiswhite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jbe    1120 <xiswhite+0x20>
cmpl   $0x20,-0x4(%rbp)
setbe  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xiswhite>:
add    $0xffffffff,%edi
xor    %eax,%eax
cmp    $0x20,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xiswhite(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ugt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 32
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xiswhite(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 32
%4 = zext i1 %3 to i32
ret i32 %4
}
int descending(int a, int b) { return b - a; }


x86 assembly (clang, -O0):
<descending>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<descending>:
mov    %esi,%eax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @descending(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @descending(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int addd(double, double, double, double, int);
int subd(double x, double y, double min, double max, int needconst) {
  return addd(x, -y, min, max, needconst);
}


x86 assembly (clang, -O0):
<subd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
mov    %edi,-0x24(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
movsd  -0x18(%rbp),%xmm2
movsd  -0x20(%rbp),%xmm3
mov    -0x24(%rbp),%edi
call   1030 <addd@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subd>:
xorps  0xee9(%rip),%xmm1
jmp    1030 <addd@plt>

LLVM IR (-O0):
define i32 @subd(double %0, double %1, double %2, double %3, i32 %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca i32
store double %0, double* %6
store double %1, double* %7
store double %2, double* %8
store double %3, double* %9
store i32 %4, i32* %10
%11 = load double, double* %6
%12 = load double, double* %7
%13 = fneg double %12
%14 = load double, double* %8
%15 = load double, double* %9
%16 = load i32, i32* %10
%17 = call i32 @addd(double %11, double %13, double %14, double %15, i32 %16)
ret i32 %17
}

LLVM IR (-O2):
define i32 @subd(double %0, double %1, double %2, double %3, i32 %4) {
%6 = fneg double %1
%7 = tail call i32 @addd(double %0, double %6, double %2, double %3, i32 %4)
ret i32 %7
}
/* Type definitions */
struct typ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ remove_backlink(struct typ *, struct typ **);
void unset_typ(struct typ **loc) {
  assert(*loc != NULL);
  remove_backlink(*loc, loc);
  *loc = NULL;
}


x86 assembly (clang, -O0):
<unset_typ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <remove_backlink@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unset_typ>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
cmpq   $0x0,(%rbx)
setne  %dil
call   1030 <assert@plt>
mov    (%rbx),%rdi
mov    %rbx,%rsi
call   1040 <remove_backlink@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.typ = type { i32 }
define void @unset_typ(%struct.typ** %0) {
%2 = alloca %struct.typ**
store %struct.typ** %0, %struct.typ*** %2
%3 = load %struct.typ**, %struct.typ*** %2
%4 = load %struct.typ*, %struct.typ** %3
%5 = icmp ne %struct.typ* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load %struct.typ**, %struct.typ*** %2
%9 = load %struct.typ*, %struct.typ** %8
%10 = load %struct.typ**, %struct.typ*** %2
%11 = call i32 @remove_backlink(%struct.typ* %9, %struct.typ** %10)
%12 = load %struct.typ**, %struct.typ*** %2
store %struct.typ* null, %struct.typ** %12
ret void
}

LLVM IR (-O2):
%struct.typ = type { i32 }
define void @unset_typ(%struct.typ** %0) {
%2 = load %struct.typ*, %struct.typ** %0
%3 = icmp ne %struct.typ* %2, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = load %struct.typ*, %struct.typ** %0
%7 = tail call i32 @remove_backlink(%struct.typ* %6, %struct.typ** %0)
store %struct.typ* null, %struct.typ** %0
ret void
}
/* Variables and functions */
size_t lst_size(void *lst) {}


x86 assembly (clang, -O0):
<lst_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lst_size>:
ret

LLVM IR (-O0):
define i64 @lst_size(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i64, i64* %2
ret i64 %4
}

LLVM IR (-O2):
define i64 @lst_size(i8* nocapture readnone %0) {
ret i64 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void header_aux(FILE *fp) {}


x86 assembly (clang, -O0):
<header_aux>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<header_aux>:
ret

LLVM IR (-O0):
define void @header_aux(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @header_aux(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exibeMenuAnt(int);
int /*<<< orphan*/ printf(char *);
void menu3(int at) {
  exibeMenuAnt(at);
  printf("ATUAL: 3\n");
}


x86 assembly (clang, -O0):
<menu3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <exibeMenuAnt@plt>
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<menu3>:
push   %rax
call   1040 <exibeMenuAnt@plt>
lea    0xed3(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"ATUAL: 3\0A\00"
define void @menu3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exibeMenuAnt(i32 %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"ATUAL: 3\00"
define void @menu3(i32 %0) {
%2 = tail call i32 @exibeMenuAnt(i32 %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
void isr9() {
  __asm__ __volatile__("int $0x21");
  asm("hlt");
}


x86 assembly (clang, -O0):
<isr9>:
push   %rbp
mov    %rsp,%rbp
int    $0x21
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<isr9>:
int    $0x21
hlt
ret

LLVM IR (-O0):
define void @isr9() {
ret void
}

LLVM IR (-O2):
define void @isr9() {
tail call void asm sideeffect "int $$0x21", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printArray(int *, int);
int /*<<< orphan*/ radixSort(int *, int);
int /*<<< orphan*/ rand_seq3(int *, int);
int main() {
  int N = 1000000;
  int A[N];
  rand_seq3(A, N);
  printArray(A, N);
  radixSort(A, N);
  printArray(A, N);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0xf4240,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x20(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%esi
call   1040 <rand_seq3@plt>
mov    -0x20(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1050 <printArray@plt>
mov    -0x20(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1030 <radixSort@plt>
mov    -0x20(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1050 <printArray@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
xor    %eax,%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x3d0900,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xf4240,%esi
call   1040 <rand_seq3@plt>
mov    %rbx,%rdi
mov    $0xf4240,%esi
call   1050 <printArray@plt>
mov    %rbx,%rdi
mov    $0xf4240,%esi
call   1030 <radixSort@plt>
mov    %rbx,%rdi
mov    $0xf4240,%esi
call   1050 <printArray@plt>
xor    %eax,%eax
add    $0x3d0900,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
store i32 1000000, i32* %1
%4 = load i32, i32* %1
%5 = zext i32 %4 to i64
%6 = call i8* @llvm.stacksave()
store i8* %6, i8** %2
%7 = alloca i32, i64 %5
store i64 %5, i64* %3
%8 = load i32, i32* %1
%9 = call i32 @rand_seq3(i32* %7, i32 %8)
%10 = load i32, i32* %1
%11 = call i32 @printArray(i32* %7, i32 %10)
%12 = load i32, i32* %1
%13 = call i32 @radixSort(i32* %7, i32 %12)
%14 = load i32, i32* %1
%15 = call i32 @printArray(i32* %7, i32 %14)
%16 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [1000000 x i32]
%2 = getelementptr inbounds [1000000 x i32], [1000000 x i32]* %1, i64 0, i64 0
%3 = call i32 @rand_seq3(i32* %2, i32 1000000)
%4 = call i32 @printArray(i32* %2, i32 1000000)
%5 = call i32 @radixSort(i32* %2, i32 1000000)
%6 = call i32 @printArray(i32* %2, i32 1000000)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, double, double);
void getrusage_helper_printf(const char *message, double ru_stime,
                             double ru_utime) {
  printf("%s rusage: %.5f system, %.5f user\n", message, ru_stime, ru_utime);
}


x86 assembly (clang, -O0):
<getrusage_helper_printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getrusage_helper_printf>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"%s rusage: %.5f system, %.5f user\0A\00"
define void @getrusage_helper_printf(i8* %0, double %1, double %2) {
%4 = alloca i8*
%5 = alloca double
%6 = alloca double
store i8* %0, i8** %4
store double %1, double* %5
store double %2, double* %6
%7 = load i8*, i8** %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %7, double %8, double %9)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"%s rusage: %.5f system, %.5f user\0A\00"
define void @getrusage_helper_printf(i8* %0, double %1, double %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %0, double %1, double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SensorReg_RestoreConfig();
void SensorReg_Wakeup(void) { SensorReg_RestoreConfig(); }


x86 assembly (clang, -O0):
<SensorReg_Wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SensorReg_RestoreConfig@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorReg_Wakeup>:
xor    %eax,%eax
jmp    1030 <SensorReg_RestoreConfig@plt>

LLVM IR (-O0):
define void @SensorReg_Wakeup() {
%1 = call i32 (...) @SensorReg_RestoreConfig()
ret void
}

LLVM IR (-O2):
define void @SensorReg_Wakeup() {
%1 = tail call i32 (...) @SensorReg_RestoreConfig()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_source_get_time_accuracy(void *s, uint64_t *usec) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_source_get_time_accuracy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_source_get_time_accuracy>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_source_get_time_accuracy(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_source_get_time_accuracy(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
void gdk_window_attributes_type_get_type() {}


x86 assembly (clang, -O0):
<gdk_window_attributes_type_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_window_attributes_type_get_type>:
ret

LLVM IR (-O0):
define void @gdk_window_attributes_type_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_window_attributes_type_get_type() {
ret void
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_disable_blockprotect_generic(struct flashrom_flashctx *, int,
                                     int /*<<< orphan*/, int /*<<< orphan*/,
                                     int);
int spi_disable_blockprotect(struct flashrom_flashctx *flash) {
  return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
}


x86 assembly (clang, -O0):
<spi_disable_blockprotect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3c,%esi
xor    %ecx,%ecx
mov    $0xff,%r8d
mov    %ecx,%edx
call   1030 <spi_disable_blockprotect_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_disable_blockprotect>:
mov    $0x3c,%esi
xor    %edx,%edx
xor    %ecx,%ecx
mov    $0xff,%r8d
jmp    1030 <spi_disable_blockprotect_generic@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_disable_blockprotect(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @spi_disable_blockprotect_generic(%struct.flashrom_flashctx* %3, i32 60, i32 0, i32 0, i32 255)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_disable_blockprotect(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @spi_disable_blockprotect_generic(%struct.flashrom_flashctx* %0, i32 60, i32 0, i32 0, i32 255)
ret i32 %2
}