xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ send_ipi(int /*<<< orphan*/ *, int, int);
void apic_send_ipi_other(uint8_t *baseapic, uint16_t type) {
  uint32_t high = 0x00000000;
  uint32_t low = (3 << 18) | type;
  send_ipi(baseapic, high, low);
}


x86 assembly (clang, -O0):
<apic_send_ipi_other>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     $0xc0000,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <send_ipi@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<apic_send_ipi_other>:
mov    %esi,%edx
or     $0xc0000,%edx
xor    %esi,%esi
jmp    1030 <send_ipi@plt>

LLVM IR (-O0):
define void @apic_send_ipi_other(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %4
%8 = or i32 786432, %7
store i32 %8, i32* %6
%9 = load i32*, i32** %3
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @send_ipi(i32* %9, i32 %10, i32 %11)
ret void
}

LLVM IR (-O2):
define void @apic_send_ipi_other(i32* %0, i32 %1) {
%3 = or i32 %1, 786432
%4 = tail call i32 @send_ipi(i32* %0, i32 0, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ set;
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int /*<<< orphan*/ CPU_SET(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ CPU_ZERO(int /*<<< orphan*/ *);
int sched_setaffinity(int /*<<< orphan*/, int, int /*<<< orphan*/ *);
int sched_setaffinity_set_core(int core) {
  cpu_set_t set;
  CPU_ZERO(&set);
  CPU_SET(core, &set);
  return sched_setaffinity(0, sizeof(set), &set);
}


x86 assembly (clang, -O0):
<sched_setaffinity_set_core>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <CPU_ZERO@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1050 <CPU_SET@plt>
xor    %edi,%edi
mov    $0x4,%esi
lea    -0x8(%rbp),%rdx
call   1030 <sched_setaffinity@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_setaffinity_set_core>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <CPU_ZERO@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1050 <CPU_SET@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    %r14,%rdx
call   1030 <sched_setaffinity@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @sched_setaffinity_set_core(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @CPU_ZERO(i32* %3)
%5 = load i32, i32* %2
%6 = call i32 @CPU_SET(i32 %5, i32* %3)
%7 = call i32 @sched_setaffinity(i32 0, i32 4, i32* %3)
ret i32 %7
}

LLVM IR (-O2):
define i32 @sched_setaffinity_set_core(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @CPU_ZERO(i32* %2)
%5 = call i32 @CPU_SET(i32 %0, i32* %2)
%6 = call i32 @sched_setaffinity(i32 0, i32 4, i32* %2)
ret i32 %6
}
/* Variables and functions */
scalar_t__ is_tag_name(char const);
char *__skip_tag_name(const char *s) {
  while (is_tag_name(*s))
    s++;
  return (char *)s;
}


x86 assembly (clang, -O0):
<__skip_tag_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_tag_name@plt>
cmp    $0x0,%rax
je     1143 <__skip_tag_name+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <__skip_tag_name+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__skip_tag_name>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <is_tag_name@plt>
test   %rax,%rax
jne    1120 <__skip_tag_name+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @__skip_tag_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @is_tag_name(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @__skip_tag_name(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @is_tag_name(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
int compareChar(void *a, void *b) { return *((char *)a) - *((char *)b); }


x86 assembly (clang, -O0):
<compareChar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compareChar>:
movsbl (%rdi),%eax
movsbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compareChar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compareChar(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
int TKSPI_DelayUSec(int us) {}


x86 assembly (clang, -O0):
<TKSPI_DelayUSec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TKSPI_DelayUSec>:
ret

LLVM IR (-O0):
define i32 @TKSPI_DelayUSec(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @TKSPI_DelayUSec(i32 %0) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int npcname_db_final(void *key, void *data, va_list ap) { return 0; }


x86 assembly (clang, -O0):
<npcname_db_final>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<npcname_db_final>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @npcname_db_final(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @npcname_db_final(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ select(int /*<<< orphan*/, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *);
void iwait() { select(0, NULL, NULL, NULL, NULL); }


x86 assembly (clang, -O0):
<iwait>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%r8d
mov    %r8,%rsi
mov    %r8,%rdx
mov    %r8,%rcx
call   1030 <select@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iwait>:
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <select@plt>

LLVM IR (-O0):
define void @iwait() {
%1 = call i32 @select(i32 0, i32* null, i32* null, i32* null, i32* null)
ret void
}

LLVM IR (-O2):
define void @iwait() {
%1 = tail call i32 @select(i32 0, i32* null, i32* null, i32* null, i32* null)
ret void
}
void arith_assign(int a, int b) {
  int c = a;
  c += b;
  c -= b;
  c /= b;
  c *= b;
  c += b;
  c -= b;
  c /= b;
  c *= b;
}


x86 assembly (clang, -O0):
<arith_assign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arith_assign>:
ret

LLVM IR (-O0):
define void @arith_assign(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %8, %7
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, %10
store i32 %12, i32* %5
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sdiv i32 %14, %13
store i32 %15, i32* %5
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = mul nsw i32 %17, %16
store i32 %18, i32* %5
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = add nsw i32 %20, %19
store i32 %21, i32* %5
%22 = load i32, i32* %4
%23 = load i32, i32* %5
%24 = sub nsw i32 %23, %22
store i32 %24, i32* %5
%25 = load i32, i32* %4
%26 = load i32, i32* %5
%27 = sdiv i32 %26, %25
store i32 %27, i32* %5
%28 = load i32, i32* %4
%29 = load i32, i32* %5
%30 = mul nsw i32 %29, %28
store i32 %30, i32* %5
ret void
}

LLVM IR (-O2):
define void @arith_assign(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *);
int /*<<< orphan*/ stderr;
void printError(const char *errtype, const char *errmsg) {
  fprintf(stderr, "%s: %s\n", errtype, errmsg);
}


x86 assembly (clang, -O0):
<printError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printError>:
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
lea    0xeda(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @printError(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @printError(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
ctoec(c) int c;
{
  if (c >= 0x00 && c <= 0x1F)
    c = 0x0100 | (c + '@');
  return (c);
}


x86 assembly (clang, -O0):
<ctoec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1129 <ctoec+0x29>
cmpl   $0x1f,-0x4(%rbp)
jg     1129 <ctoec+0x29>
mov    -0x4(%rbp),%eax
add    $0x40,%eax
or     $0x100,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctoec>:
lea    0x40(%rdi),%eax
or     $0x100,%eax
cmp    $0x20,%edi
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ctoec(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 31
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 64
%11 = or i32 256, %10
store i32 %11, i32* %2
br label %12
12: ; preds = %8, %5, %1
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @ctoec(i32 %0) {
%2 = icmp ult i32 %0, 32
%3 = add nsw i32 %0, 64
%4 = or i32 %3, 256
%5 = select i1 %2, i32 %4, i32 %0
ret i32 %5
}
void openmm_take_steps(void *data, int nsteps) {}


x86 assembly (clang, -O0):
<openmm_take_steps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<openmm_take_steps>:
ret

LLVM IR (-O0):
define void @openmm_take_steps(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @openmm_take_steps(i8* nocapture %0, i32 %1) {
ret void
}
void close_file() {}


x86 assembly (clang, -O0):
<close_file>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_file>:
ret

LLVM IR (-O0):
define void @close_file() {
ret void
}

LLVM IR (-O2):
define void @close_file() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "usage: server [-p port]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [25 x i8] c"usage: server [-p port]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [25 x i8] c"usage: server [-p port]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int event_network_stop(void) { return 0; }


x86 assembly (clang, -O0):
<event_network_stop>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_network_stop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @event_network_stop() {
ret i32 0
}

LLVM IR (-O2):
define i32 @event_network_stop() {
ret i32 0
}
/* Variables and functions */
int strcmp(char const *, char const *);
int CompareStrcmp(const void *a, const void *b) {
  return strcmp(*(const char **)a, *(const char **)b);
}


x86 assembly (clang, -O0):
<CompareStrcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CompareStrcmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @CompareStrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @CompareStrcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
long double ffoo2(float *db1) { return *db1; }


x86 assembly (clang, -O0):
<ffoo2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
flds   (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffoo2>:
flds   (%rdi)
ret

LLVM IR (-O0):
define x86_fp80 @ffoo2(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = fpext float %4 to x86_fp80
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @ffoo2(float* nocapture %0) {
%2 = load float, float* %0
%3 = fpext float %2 to x86_fp80
ret x86_fp80 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ *fopen(char const *, char const *);
int /*<<< orphan*/ perror(char const *);
FILE *fopen_or_die(const char *path, const char *mode) {
  FILE *ret = fopen(path, mode);
  if (!ret) {
    perror(path);
    exit(EXIT_FAILURE);
  }
  return ret;
}


x86 assembly (clang, -O0):
<fopen_or_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1173 <fopen_or_die+0x43>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    0x2e74(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fopen_or_die>:
push   %rbx
mov    %rdi,%rbx
call   1030 <fopen@plt>
test   %rax,%rax
je     1140 <fopen_or_die+0x10>
pop    %rbx
ret
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define i32* @fopen_or_die(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %6, i8* %7)
store i32* %8, i32** %5
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %16, label %11
11: ; preds = %2
%12 = load i8*, i8** %3
%13 = call i32 @perror(i8* %12)
%14 = load i32, i32* @EXIT_FAILURE
%15 = call i32 @exit(i32 %14)
unreachable
16: ; preds = %2
%17 = load i32*, i32** %5
ret i32* %17
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define noalias i32* @fopen_or_die(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 @perror(i8* %0)
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %2
ret i32* %3
}
/* Variables and functions */
scalar_t__ isspace(char const);
char *utf8_next_char(char const *);
char const *next_token_index(char const *str) {
  do {
    str = utf8_next_char(str);
  } while (isspace(*str));
  return str;
}


x86 assembly (clang, -O0):
<next_token_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <utf8_next_char@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
jne    112c <next_token_index+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_token_index>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1040 <utf8_next_char@plt>
mov    %rax,%rbx
movsbl (%rax),%edi
call   1030 <isspace@plt>
test   %rax,%rax
jne    1130 <next_token_index+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @next_token_index(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %6, %1
%4 = load i8*, i8** %2
%5 = call i8* @utf8_next_char(i8* %4)
store i8* %5, i8** %2
br label %6
6: ; preds = %3
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = call i64 @isspace(i8 signext %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %3, label %11
11: ; preds = %6
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @next_token_index(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %4, %2 ]
%4 = tail call i8* @utf8_next_char(i8* %3)
%5 = load i8, i8* %4
%6 = tail call i64 @isspace(i8 signext %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %2
8: ; preds = %2
ret i8* %4
}
void __attribute__((no)) __attribute__((noclone)) * test1(void) {
  void *temp;
  temp = __builtin_return_address(0);
  return temp;
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    (%rsp),%rax
ret

LLVM IR (-O0):
define i8* @test1() {
%1 = alloca i8*
%2 = call i8* @llvm.returnaddress(i32 0)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @test1() {
%1 = tail call i8* @llvm.returnaddress(i32 0)
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ defdefine(char *, char *, char *);
char *strchr(char *, char);
void defmacro(char *macro) {
  char *p = strchr(macro, '=');
  if (p)
    *p++ = '\0';
  else
    p = "1";
  defdefine(macro, p, "command-line");
}


x86 assembly (clang, -O0):
<defmacro>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3d,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1160 <defmacro+0x40>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x0,(%rax)
jmp    116b <defmacro+0x4b>
lea    0xe99(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xe88(%rip),%rdx
call   1040 <defdefine@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defmacro>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3d,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     113f <defmacro+0x1f>
mov    %rax,%rsi
add    $0x1,%rsi
movb   $0x0,(%rax)
jmp    1146 <defmacro+0x26>
lea    0xeba(%rip),%rsi
lea    0xeb5(%rip),%rdx
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <defdefine@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"1\00"
@.str.1 = [13 x i8] c"command-line\00"
define void @defmacro(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i8 signext 61)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 0, i8* %9
br label %12
11: ; preds = %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %3
br label %12
12: ; preds = %11, %8
%13 = load i8*, i8** %2
%14 = load i8*, i8** %3
%15 = call i32 @defdefine(i8* %13, i8* %14, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"1\00"
@.str.1 = [13 x i8] c"command-line\00"
define void @defmacro(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 61)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %2, i64 1
store i8 0, i8* %2
br label %6
6: ; preds = %1, %4
%7 = phi i8* [ %5, %4 ], [ getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), %1 ]
%8 = tail call i32 @defdefine(i8* %0, i8* %7, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned long bit_check(register unsigned long value,
                        register unsigned long pos) {
  return (value & (1 << (pos)) ? 1 : 0);
}


x86 assembly (clang, -O0):
<bit_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
and    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_check>:
mov    %rsi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
xor    %eax,%eax
test   %rdi,%rcx
setne  %al
ret

LLVM IR (-O0):
define i64 @bit_check(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = trunc i64 %6 to i32
%8 = shl i32 1, %7
%9 = sext i32 %8 to i64
%10 = and i64 %5, %9
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 0
%14 = sext i32 %13 to i64
ret i64 %14
}

LLVM IR (-O2):
define i64 @bit_check(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl nuw i32 1, %3
%5 = sext i32 %4 to i64
%6 = and i64 %5, %0
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
ret i64 %8
}
/* Variables and functions */
char scotgetc();
int getccom(void) {
  int c;
  c = scotgetc();
  if (c != ';')
    return c;
  while (scotgetc() != '\n')
    ;
  return '\n';
}


x86 assembly (clang, -O0):
<getccom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <scotgetc@plt>
movsbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3b,-0x8(%rbp)
je     113a <getccom+0x2a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115e <getccom+0x4e>
jmp    113f <getccom+0x2f>
mov    $0x0,%al
call   1030 <scotgetc@plt>
movsbl %al,%eax
cmp    $0xa,%eax
je     1157 <getccom+0x47>
jmp    113f <getccom+0x2f>
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getccom>:
push   %rax
xor    %eax,%eax
call   1030 <scotgetc@plt>
cmp    $0x3b,%al
jne    1132 <getccom+0x22>
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <scotgetc@plt>
cmp    $0xa,%al
jne    1120 <getccom+0x10>
mov    $0xa,%eax
pop    %rcx
ret
movsbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getccom() {
%1 = alloca i32
%2 = alloca i32
%3 = call signext i8 (...) @scotgetc()
%4 = sext i8 %3 to i32
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 59
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i32, i32* %2
store i32 %8, i32* %1
br label %16
9: ; preds = %0
br label %10
10: ; preds = %14, %9
%11 = call signext i8 (...) @scotgetc()
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 10
br i1 %13, label %14, label %15
14: ; preds = %10
br label %10
15: ; preds = %10
store i32 10, i32* %1
br label %16
16: ; preds = %15, %7
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
define i32 @getccom() {
%1 = tail call signext i8 (...) @scotgetc()
%2 = icmp eq i8 %1, 59
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = sext i8 %1 to i32
br label %8
5: ; preds = %0, %5
%6 = tail call signext i8 (...) @scotgetc()
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %5
8: ; preds = %5, %3
%9 = phi i32 [ %4, %3 ], [ 10, %5 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char);
int main() {
  char string[6] = {'a', 'b', 'c', '\0', '\0', 'e'};
  printf("%c %c\n", string[0], string[5]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0xa(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x6(%rbp)
mov    -0xa(%rbp),%al
lea    0xec9(%rip),%rdi
movsbl %al,%esi
movsbl -0x5(%rbp),%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x61,%esi
mov    $0x65,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.string = [6 x i8] c"abc\00\00e"
@.str = [7 x i8] c"%c %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i8]
store i32 0, i32* %1
%3 = bitcast [6 x i8]* %2 to i8*
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%5 = load i8, i8* %4
%6 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 5
%7 = load i8, i8* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext %5, i8 signext %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%c %c\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext 97, i8 signext 101)
ret i32 0
}
int count_token(char *str, char delimiter) {
  int count = 0;
  while (*str != '\0')
    if (*str++ == delimiter)
      count++;
  return count;
}


x86 assembly (clang, -O0):
<count_token>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1151 <count_token+0x51>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    114c <count_token+0x4c>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1115 <count_token+0x15>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_token>:
mov    (%rdi),%cl
test   %cl,%cl
je     1126 <count_token+0x26>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
xor    %edx,%edx
cmp    %sil,%cl
sete   %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <count_token+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @count_token(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
store i32 0, i32* %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
%14 = load i8, i8* %12
%15 = sext i8 %14 to i32
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %15, %17
br i1 %18, label %19, label %22
19: ; preds = %11
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %22
22: ; preds = %19, %11
br label %6
23: ; preds = %6
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @count_token(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %12, %5 ], [ 0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = icmp eq i8 %6, %1
%11 = zext i1 %10 to i32
%12 = add nuw nsw i32 %7, %11
%13 = load i8, i8* %9
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %12, %5 ]
ret i32 %16
}
void ff_hevc_put_hevc_epel_hv24_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_hv24_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_hv24_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_hv24_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_hv24_12_sse4() {
ret void
}
unsigned long long GF_longmulX(unsigned long long v) {
  unsigned long long pmask;
  pmask = v & 0x8080808080808080;
  pmask = pmask >> 7;
  pmask = pmask * 0x1d;
  v = v << 1;
  v = v & 0xfefefefefefefefe;
  return v ^ pmask;
}


x86 assembly (clang, -O0):
<GF_longmulX>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x8080808080808080,%rax
80 80 80
and    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x7,%rax
mov    %rax,-0x10(%rbp)
imul   $0x1d,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x8(%rbp)
movabs $0xfefefefefefefefe,%rax
fe fe fe
and    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GF_longmulX>:
lea    (%rdi,%rdi,1),%rcx
shr    $0x7,%rdi
movabs $0x101010101010101,%rax
01 01 01
and    %rdi,%rax
lea    (%rax,%rax,8),%rdx
lea    (%rdx,%rdx,2),%rdx
add    %rax,%rdx
add    %rax,%rdx
movabs $0xfefefefefefefefe,%rax
fe fe fe
and    %rcx,%rax
xor    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @GF_longmulX(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, -9187201950435737472
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = lshr i64 %6, 7
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = mul i64 %8, 29
store i64 %9, i64* %3
%10 = load i64, i64* %2
%11 = shl i64 %10, 1
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = and i64 %12, -72340172838076674
store i64 %13, i64* %2
%14 = load i64, i64* %2
%15 = load i64, i64* %3
%16 = xor i64 %14, %15
ret i64 %16
}

LLVM IR (-O2):
define i64 @GF_longmulX(i64 %0) {
%2 = lshr i64 %0, 7
%3 = and i64 %2, 72340172838076673
%4 = mul nuw nsw i64 %3, 29
%5 = shl i64 %0, 1
%6 = and i64 %5, -72340172838076674
%7 = xor i64 %4, %6
ret i64 %7
}
int optparse_is_longopt(const char *arg) {
  return arg != 0 && arg[0] == '-' && arg[1] == '-' && arg[2] != '\0';
}


x86 assembly (clang, -O0):
<optparse_is_longopt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1154 <optparse_is_longopt+0x54>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x2d,%ecx
mov    %al,-0x9(%rbp)
jne    1154 <optparse_is_longopt+0x54>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%ecx
xor    %eax,%eax
cmp    $0x2d,%ecx
mov    %al,-0x9(%rbp)
jne    1154 <optparse_is_longopt+0x54>
mov    -0x8(%rbp),%rax
movsbl 0x2(%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<optparse_is_longopt>:
xor    %eax,%eax
test   %rdi,%rdi
je     111b <optparse_is_longopt+0x1b>
cmpb   $0x2d,(%rdi)
jne    111b <optparse_is_longopt+0x1b>
cmpb   $0x2d,0x1(%rdi)
jne    111b <optparse_is_longopt+0x1b>
xor    %eax,%eax
cmpb   $0x0,0x2(%rdi)
setne  %al
ret

LLVM IR (-O0):
define i32 @optparse_is_longopt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %23
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 45
br i1 %10, label %11, label %23
11: ; preds = %5
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 45
br i1 %16, label %17, label %23
17: ; preds = %11
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i64 2
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp ne i32 %21, 0
br label %23
23: ; preds = %17, %11, %5, %1
%24 = phi i1 [ false, %11 ], [ false, %5 ], [ false, %1 ], [ %22, %17 ]
%25 = zext i1 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @optparse_is_longopt(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 45
br i1 %5, label %6, label %15
6: ; preds = %3
%7 = getelementptr inbounds i8, i8* %0, i64 1
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 45
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = getelementptr inbounds i8, i8* %0, i64 2
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %10, %6, %3, %1
%16 = phi i32 [ 0, %6 ], [ 0, %3 ], [ 0, %1 ], [ %14, %10 ]
ret i32 %16
}
int fun1285() { return 1285; }


x86 assembly (clang, -O0):
<fun1285>:
push   %rbp
mov    %rsp,%rbp
mov    $0x505,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1285>:
mov    $0x505,%eax
ret

LLVM IR (-O0):
define i32 @fun1285() {
ret i32 1285
}

LLVM IR (-O2):
define i32 @fun1285() {
ret i32 1285
}
/* Variables and functions */
int /*<<< orphan*/ rol16addr(int /*<<< orphan*/);
int /*<<< orphan*/ zeropagex();
void rolZpx16(void) { rol16addr(zeropagex()); }


x86 assembly (clang, -O0):
<rolZpx16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <zeropagex@plt>
mov    %eax,%edi
call   1030 <rol16addr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rolZpx16>:
push   %rax
xor    %eax,%eax
call   1040 <zeropagex@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <rol16addr@plt>

LLVM IR (-O0):
define void @rolZpx16() {
%1 = call i32 (...) @zeropagex()
%2 = call i32 @rol16addr(i32 %1)
ret void
}

LLVM IR (-O2):
define void @rolZpx16() {
%1 = tail call i32 (...) @zeropagex()
%2 = tail call i32 @rol16addr(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
void aryt(int x) {
  int y, z;
  y = (x += 2);
  z = (x %= 3) + (x %= 4);
  printf("x = %d, y = %d, z = %d\n", x, y, z);
}


x86 assembly (clang, -O0):
<aryt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    -0x10(%rbp),%edx
mov    %eax,-0x4(%rbp)
add    %eax,%edx
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aryt>:
add    $0x2,%edi
movslq %edi,%rdx
imul   $0x55555556,%rdx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
lea    (%rax,%rax,2),%eax
mov    %edx,%esi
sub    %eax,%esi
lea    (%rsi,%rsi,1),%ecx
lea    0xec5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"x = %d, y = %d, z = %d\0A\00"
define void @aryt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 2
store i32 %6, i32* %2
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = srem i32 %7, 3
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = srem i32 %9, 4
store i32 %10, i32* %2
%11 = add nsw i32 %8, %10
store i32 %11, i32* %4
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %12, i32 %13, i32 %14)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"x = %d, y = %d, z = %d\0A\00"
define void @aryt(i32 %0) {
%2 = add nsw i32 %0, 2
%3 = srem i32 %2, 3
%4 = shl nsw i32 %3, 1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %2, i32 %4)
ret void
}
int test_imm_52int64_highword_reg(long long val) {
  return ((val >> 32) & (0x52 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_52int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x52,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_52int64_highword_reg>:
movabs $0x5200000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_52int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 82
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_52int64_highword_reg(i64 %0) {
%2 = and i64 %0, 352187318272
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct input {
  int dummy;
};

/* Variables and functions */
scalar_t__ input_text_size(struct input *);
int input_text_iszero(struct input *inp) { return (input_text_size(inp) == 0); }


x86 assembly (clang, -O0):
<input_text_iszero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <input_text_size@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_text_iszero>:
push   %rax
call   1030 <input_text_size@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.input = type { i32 }
define i32 @input_text_iszero(%struct.input* %0) {
%2 = alloca %struct.input*
store %struct.input* %0, %struct.input** %2
%3 = load %struct.input*, %struct.input** %2
%4 = call i64 @input_text_size(%struct.input* %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.input = type { i32 }
define i32 @input_text_iszero(%struct.input* %0) {
%2 = tail call i64 @input_text_size(%struct.input* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_C4uint16_mem(unsigned short *val) {
  return ((*val) & (-0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff3c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4uint16_mem>:
movzwl (%rdi),%eax
test   $0xff3c,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -196
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C4uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -196
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
__typeof__(vprintf(1, "")) test_vprintf_260(void) { return vprintf(1, ""); }


x86 assembly (clang, -O0):
<test_vprintf_260>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <vprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_vprintf_260>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <vprintf@plt>

LLVM IR (-O0):
%struct.__va_list_tag = type { i32, i32, i8*, i8* }
@.str = [1 x i8] zeroinitializer
define i32 @test_vprintf_260() {
%1 = call i32 @vprintf(i8* inttoptr (i64 1 to i8*), %struct.__va_list_tag* bitcast ([1 x i8]* @.str to %struct.__va_list_tag*))
ret i32 %1
}

LLVM IR (-O2):
%struct.__va_list_tag = type { i32, i32, i8*, i8* }
@.str = [1 x i8] zeroinitializer
define i32 @test_vprintf_260() {
%1 = tail call i32 @vprintf(i8* inttoptr (i64 1 to i8*), %struct.__va_list_tag* bitcast ([1 x i8]* @.str to %struct.__va_list_tag*))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ TimerList_Process();
void TimerScheduler_Process(void) { TimerList_Process(); }


x86 assembly (clang, -O0):
<TimerScheduler_Process>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TimerList_Process@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerScheduler_Process>:
xor    %eax,%eax
jmp    1030 <TimerList_Process@plt>

LLVM IR (-O0):
define void @TimerScheduler_Process() {
%1 = call i32 (...) @TimerList_Process()
ret void
}

LLVM IR (-O2):
define void @TimerScheduler_Process() {
%1 = tail call i32 (...) @TimerList_Process()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DebugPrintf(char *);
int /*<<< orphan*/ InfoNES_Cycle();
int /*<<< orphan*/ InfoNES_Fin();
int /*<<< orphan*/ InfoNES_Init();
int InfoNES_Menu();
void InfoNES_Main() {
  InfoNES_Init();
  DebugPrintf("NES Startup\n");
  while (1) {
    if (InfoNES_Menu() == -1)
      break;
    InfoNES_Cycle();
  }
  InfoNES_Fin();
}


x86 assembly (clang, -O0):
<InfoNES_Main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <InfoNES_Init@plt>
lea    0xe9e(%rip),%rdi
call   1060 <DebugPrintf@plt>
mov    $0x0,%al
call   1040 <InfoNES_Menu@plt>
cmp    $0xffffffff,%eax
jne    117c <InfoNES_Main+0x2c>
jmp    1188 <InfoNES_Main+0x38>
mov    $0x0,%al
call   1030 <InfoNES_Cycle@plt>
jmp    1167 <InfoNES_Main+0x17>
mov    $0x0,%al
call   1070 <InfoNES_Fin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InfoNES_Main>:
push   %rax
xor    %eax,%eax
call   1050 <InfoNES_Init@plt>
lea    0xea1(%rip),%rdi
call   1060 <DebugPrintf@plt>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1040 <InfoNES_Menu@plt>
cmp    $0xffffffff,%eax
je     1185 <InfoNES_Main+0x35>
xor    %eax,%eax
call   1030 <InfoNES_Cycle@plt>
jmp    1170 <InfoNES_Main+0x20>
xor    %eax,%eax
pop    %rcx
jmp    1070 <InfoNES_Fin@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"NES Startup\0A\00"
define void @InfoNES_Main() {
%1 = call i32 (...) @InfoNES_Init()
%2 = call i32 @DebugPrintf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %0, %7
%4 = call i32 (...) @InfoNES_Menu()
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %7
6: ; preds = %3
br label %9
7: ; preds = %3
%8 = call i32 (...) @InfoNES_Cycle()
br label %3
9: ; preds = %6
%10 = call i32 (...) @InfoNES_Fin()
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"NES Startup\0A\00"
define void @InfoNES_Main() {
%1 = tail call i32 (...) @InfoNES_Init()
%2 = tail call i32 @DebugPrintf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @InfoNES_Menu()
%4 = icmp eq i32 %3, -1
br i1 %4, label %9, label %5
5: ; preds = %0, %5
%6 = tail call i32 (...) @InfoNES_Cycle()
%7 = tail call i32 (...) @InfoNES_Menu()
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %5
9: ; preds = %5, %0
%10 = tail call i32 (...) @InfoNES_Fin()
ret void
}
/* Type definitions */
struct ifaddrs {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct ifaddrs *);
void freeifaddrs(struct ifaddrs *ifa) { free(ifa); }


x86 assembly (clang, -O0):
<freeifaddrs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeifaddrs>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.ifaddrs = type { i32 }
define void @freeifaddrs(%struct.ifaddrs* %0) {
%2 = alloca %struct.ifaddrs*
store %struct.ifaddrs* %0, %struct.ifaddrs** %2
%3 = load %struct.ifaddrs*, %struct.ifaddrs** %2
%4 = call i32 @free(%struct.ifaddrs* %3)
ret void
}

LLVM IR (-O2):
%struct.ifaddrs = type { i32 }
define void @freeifaddrs(%struct.ifaddrs* nocapture %0) {
%2 = tail call i32 @free(%struct.ifaddrs* %0)
ret void
}
float findAreaRectangle(float width, float length) {
  float area;
  area = length * width;
  return area;
}


x86 assembly (clang, -O0):
<findAreaRectangle>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<findAreaRectangle>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @findAreaRectangle(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %4
%7 = load float, float* %3
%8 = fmul float %6, %7
store float %8, float* %5
%9 = load float, float* %5
ret float %9
}

LLVM IR (-O2):
define float @findAreaRectangle(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
int time_hour(time_t t) { return (t / (1000 * 3600)) % 24; }


x86 assembly (clang, -O0):
<time_hour>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x36ee80,%ecx
cltd
idiv   %ecx
mov    $0x18,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_hour>:
movslq %edi,%rax
imul   $0x4a90be59,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x34,%rax
add    %ecx,%eax
imul   $0x2aab,%eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x12,%ecx
add    %edx,%ecx
shl    $0x3,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
cwtl
ret

LLVM IR (-O0):
define i32 @time_hour(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 3600000
%5 = srem i32 %4, 24
ret i32 %5
}

LLVM IR (-O2):
define i32 @time_hour(i32 %0) {
%2 = sdiv i32 %0, 3600000
%3 = trunc i32 %2 to i16
%4 = srem i16 %3, 24
%5 = sext i16 %4 to i32
ret i32 %5
}