xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ bar(int *);
int /*<<< orphan*/ free(int *);
void foo(int *x) {
  free(x);
  bar(x);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1040 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %rdi,%rbx
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <bar@plt>

LLVM IR (-O0):
define void @foo(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @free(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @bar(i32* %5)
ret void
}

LLVM IR (-O2):
define void @foo(i32* %0) {
%2 = tail call i32 @free(i32* %0)
%3 = tail call i32 @bar(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ make_int_mode(char *, unsigned int, int, char *, int);
void create_modes(void) {
  make_int_mode("HI", -1U, 2, "../../work/gcc/machmode.def", 182);
}


x86 assembly (clang, -O0):
<create_modes>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0xffffffff,%esi
mov    $0x2,%edx
lea    0xed7(%rip),%rcx
mov    $0xb6,%r8d
call   1030 <make_int_mode@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_modes>:
lea    0xee9(%rip),%rdi
lea    0xee5(%rip),%rcx
mov    $0xffffffff,%esi
mov    $0x2,%edx
mov    $0xb6,%r8d
jmp    1030 <make_int_mode@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"HI\00"
@.str.1 = [28 x i8] c"../../work/gcc/machmode.def\00"
define void @create_modes() {
%1 = call i32 @make_int_mode(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 -1, i32 2, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i32 182)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"HI\00"
@.str.1 = [28 x i8] c"../../work/gcc/machmode.def\00"
define void @create_modes() {
%1 = tail call i32 @make_int_mode(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 -1, i32 2, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i32 182)
ret void
}
int isPrime(int n) {
  int i = 2;
  for (i = 2; i < n; i++) {
    if (n % i == 0) {
      return 0;
    }
  }
  if (i == n) {
    return 1;
  }
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1150 <isPrime+0x50>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    113d <isPrime+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    1163 <isPrime+0x63>
jmp    1142 <isPrime+0x42>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <isPrime+0x15>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1163 <isPrime+0x63>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
mov    $0x1,%ecx
cmp    $0x3,%edi
jl     1120 <isPrime+0x20>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1123 <isPrime+0x23>
add    $0x1,%esi
cmp    %esi,%edi
jne    1110 <isPrime+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isPrime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
store i32 2, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %2
br label %24
15: ; preds = %9
br label %16
16: ; preds = %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
%21 = load i32, i32* %3
%22 = icmp eq i32 %20, %21
br i1 %22, label %23, label %24
23: ; preds = %19
store i32 1, i32* %2
br label %24
24: ; preds = %14, %23, %19
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @isPrime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 1, %3 ], [ 0, %5 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ rcc_printf(char *);
void emit_trap() { rcc_printf("  svc 3\n"); }


x86 assembly (clang, -O0):
<emit_trap>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rcc_printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_trap>:
lea    0xee9(%rip),%rdi
jmp    1030 <rcc_printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c" svc 3\0A\00"
define void @emit_trap() {
%1 = call i32 @rcc_printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c" svc 3\0A\00"
define void @emit_trap() {
%1 = tail call i32 @rcc_printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
void changeval(int *a) { *a = 3; }


x86 assembly (clang, -O0):
<changeval>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x3,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<changeval>:
movl   $0x3,(%rdi)
ret

LLVM IR (-O0):
define void @changeval(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 3, i32* %3
ret void
}

LLVM IR (-O2):
define void @changeval(i32* nocapture writeonly %0) {
store i32 3, i32* %0
ret void
}
/* Variables and functions */
scalar_t__ portWrite(char *);
int TemmaabortSlew() {
  if (portWrite("PS") < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<TemmaabortSlew>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <portWrite@plt>
cmp    $0x0,%rax
jge    113a <TemmaabortSlew+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1141 <TemmaabortSlew+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TemmaabortSlew>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <portWrite@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"PS\00"
define i32 @TemmaabortSlew() {
%1 = alloca i32
%2 = call i64 @portWrite(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 -1, i32* %1
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
@.str = [3 x i8] c"PS\00"
define i32 @TemmaabortSlew() {
%1 = tail call i64 @portWrite(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = ashr i64 %1, 63
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int mach64_ext_inb(int, void *);
uint16_t mach64_ext_inw(uint16_t port, void *p) {
  uint16_t ret;
  switch (port) {
  default:
    ret = mach64_ext_inb(port, p);
    ret |= (mach64_ext_inb(port + 1, p) << 8);
    break;
  };
  return ret;
}


x86 assembly (clang, -O0):
<mach64_ext_inw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <mach64_ext_inb@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    -0x10(%rbp),%rsi
call   1030 <mach64_ext_inb@plt>
shl    $0x8,%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mach64_ext_inw>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
call   1030 <mach64_ext_inb@plt>
mov    %eax,%r14d
add    $0x1,%ebp
mov    %ebp,%edi
mov    %rbx,%rsi
call   1030 <mach64_ext_inb@plt>
shl    $0x8,%eax
or     %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mach64_ext_inw(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
switch i32 %6, label %7 [
]
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = call i32 @mach64_ext_inb(i32 %8, i8* %9)
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
%13 = load i8*, i8** %4
%14 = call i32 @mach64_ext_inb(i32 %12, i8* %13)
%15 = shl i32 %14, 8
%16 = load i32, i32* %5
%17 = or i32 %16, %15
store i32 %17, i32* %5
br label %18
18: ; preds = %7
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @mach64_ext_inw(i32 %0, i8* %1) {
%3 = tail call i32 @mach64_ext_inb(i32 %0, i8* %1)
%4 = add nsw i32 %0, 1
%5 = tail call i32 @mach64_ext_inb(i32 %4, i8* %1)
%6 = shl i32 %5, 8
%7 = or i32 %6, %3
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ core7_swap(char *, int);
void U_EMRSETWINDOWORGEX_swap(char *record, int torev) {
  core7_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_EMRSETWINDOWORGEX_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core7_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETWINDOWORGEX_swap>:
jmp    1030 <core7_swap@plt>

LLVM IR (-O0):
define void @U_EMRSETWINDOWORGEX_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core7_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_EMRSETWINDOWORGEX_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core7_swap(i8* %0, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_CIPHER_CTX;

/* Variables and functions */
int /*<<< orphan*/ EVP_CIPHER_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ tr_free(int /*<<< orphan*/ *);
void openssl_evp_cipher_context_free(EVP_CIPHER_CTX *handle) {
  if (handle == NULL)
    return;
  EVP_CIPHER_CTX_cleanup(handle);
  tr_free(handle);
}


x86 assembly (clang, -O0):
<openssl_evp_cipher_context_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <openssl_evp_cipher_context_free+0x1c>
jmp    114e <openssl_evp_cipher_context_free+0x2e>
mov    -0x8(%rbp),%rdi
call   1040 <EVP_CIPHER_CTX_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1030 <tr_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openssl_evp_cipher_context_free>:
test   %rdi,%rdi
je     1137 <openssl_evp_cipher_context_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <EVP_CIPHER_CTX_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <tr_free@plt>
ret

LLVM IR (-O0):
define void @openssl_evp_cipher_context_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = call i32 @EVP_CIPHER_CTX_cleanup(i32* %7)
%9 = load i32*, i32** %2
%10 = call i32 @tr_free(i32* %9)
br label %11
11: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @openssl_evp_cipher_context_free(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @EVP_CIPHER_CTX_cleanup(i32* %0)
%5 = tail call i32 @tr_free(i32* %0)
br label %6
6: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ leave(int /*<<< orphan*/);
void choke(int n __attribute__((__unused__))) { leave(0); }


x86 assembly (clang, -O0):
<choke>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <leave@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<choke>:
xor    %edi,%edi
jmp    1030 <leave@plt>

LLVM IR (-O0):
define void @choke(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @leave(i32 0)
ret void
}

LLVM IR (-O2):
define void @choke(i32 %0) {
%2 = tail call i32 @leave(i32 0)
ret void
}
void INT_Excep_TPU11_TCI11V(void) {}


x86 assembly (clang, -O0):
<INT_Excep_TPU11_TCI11V>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_TPU11_TCI11V>:
ret

LLVM IR (-O0):
define void @INT_Excep_TPU11_TCI11V() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_TPU11_TCI11V() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
const uint32_t rotl32(uint32_t n, uint8_t bits) {
  return ((n << bits) | (n >> (32 - bits)));
}


x86 assembly (clang, -O0):
<rotl32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl32>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotl32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 32, %9
%11 = ashr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotl32(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = ashr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
unsigned long sign_extend(x, len)
unsigned int x, len;
{ return (int)(x >> (len - 1) ? (-1 << len) | x : x); }


x86 assembly (clang, -O0):
<sign_extend>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
shr    %cl,%eax
cmp    $0x0,%eax
je     1133 <sign_extend+0x33>
mov    -0x8(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1139 <sign_extend+0x39>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign_extend>:
lea    -0x1(%rsi),%ecx
mov    %edi,%eax
shr    %cl,%eax
mov    $0xffffffff,%edx
mov    %esi,%ecx
shl    %cl,%edx
test   %eax,%eax
cmove  %eax,%edx
or     %edi,%edx
movslq %edx,%rax
ret

LLVM IR (-O0):
define i64 @sign_extend(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub i32 %6, 1
%8 = lshr i32 %5, %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i32, i32* %4
%12 = shl i32 -1, %11
%13 = load i32, i32* %3
%14 = or i32 %12, %13
br label %17
15: ; preds = %2
%16 = load i32, i32* %3
br label %17
17: ; preds = %15, %10
%18 = phi i32 [ %14, %10 ], [ %16, %15 ]
%19 = sext i32 %18 to i64
ret i64 %19
}

LLVM IR (-O2):
define i64 @sign_extend(i32 %0, i32 %1) {
%3 = add i32 %1, -1
%4 = lshr i32 %0, %3
%5 = icmp eq i32 %4, 0
%6 = shl nsw i32 -1, %1
%7 = select i1 %5, i32 0, i32 %6
%8 = or i32 %7, %0
%9 = sext i32 %8 to i64
ret i64 %9
}
unsigned xrop3_247_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_247_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_247_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_247_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_247_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = xor i32 %4, -1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int towlower(int const);
int utf8tolower(const int c) {
  assert(c >= 0);
  return towlower(c);
}


x86 assembly (clang, -O0):
<utf8tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%edi
call   1040 <towlower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8tolower>:
push   %rbx
mov    %edi,%ebx
not    %edi
shr    $0x1f,%edi
call   1030 <assert@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <towlower@plt>

LLVM IR (-O0):
define i32 @utf8tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @towlower(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @utf8tolower(i32 %0) {
%2 = xor i32 %0, -1
%3 = lshr i32 %2, 31
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @towlower(i32 %0)
ret i32 %5
}
/* Variables and functions */
scalar_t__ isalpha(int);
scalar_t__ isdigit(int);
int isalnum(int c) { return isalpha(c) || isdigit(c); }


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <isalnum+0x37>
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
push   %rbx
mov    %edi,%ebx
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isalnum+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isalpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isdigit(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isalnum(i32 %0) {
%2 = tail call i64 @isalpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isdigit(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
char *calloc(int, int);
int /*<<< orphan*/ hypre_OutOfMemory(int);
char *hypre_CAlloc(int count, int elt_size) {
  char *ptr;
  int size = count * elt_size;
  if (size > 0) {
    ptr = calloc(count, elt_size);
    if (ptr == NULL) {
      hypre_OutOfMemory(size);
    }
  } else {
    ptr = NULL;
  }
  return ptr;
}


x86 assembly (clang, -O0):
<hypre_CAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    1169 <hypre_CAlloc+0x49>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1164 <hypre_CAlloc+0x44>
mov    -0x14(%rbp),%edi
call   1040 <hypre_OutOfMemory@plt>
jmp    1171 <hypre_CAlloc+0x51>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hypre_CAlloc>:
push   %rbx
mov    %esi,%ebx
imul   %edi,%ebx
test   %ebx,%ebx
jle    113d <hypre_CAlloc+0x1d>
call   1030 <calloc@plt>
test   %rax,%rax
je     1136 <hypre_CAlloc+0x16>
pop    %rbx
ret
mov    %ebx,%edi
call   1040 <hypre_OutOfMemory@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @hypre_CAlloc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = mul nsw i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %2
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = call i8* @calloc(i32 %13, i32 %14)
store i8* %15, i8** %5
%16 = load i8*, i8** %5
%17 = icmp eq i8* %16, null
br i1 %17, label %18, label %21
18: ; preds = %12
%19 = load i32, i32* %6
%20 = call i32 @hypre_OutOfMemory(i32 %19)
br label %21
21: ; preds = %18, %12
br label %23
22: ; preds = %2
store i8* null, i8** %5
br label %23
23: ; preds = %22, %21
%24 = load i8*, i8** %5
ret i8* %24
}

LLVM IR (-O2):
define noalias i8* @hypre_CAlloc(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = tail call i8* @calloc(i32 %0, i32 %1)
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @hypre_OutOfMemory(i32 %3)
br label %10
10: ; preds = %2, %5, %8
%11 = phi i8* [ null, %8 ], [ %6, %5 ], [ null, %2 ]
ret i8* %11
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int errno;
int pthread_mutex_init(int /*<<< orphan*/ *, void *);
int tosMutex_init(pthread_mutex_t *mx) {
  int res = 0;
  res = pthread_mutex_init(mx, ((void *)0));
  if (res) {
    errno = res;
    res = -1;
  }
  return res;
}


x86 assembly (clang, -O0):
<tosMutex_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <pthread_mutex_init@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1150 <tosMutex_init+0x40>
mov    -0xc(%rbp),%ecx
mov    0x2e99(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tosMutex_init>:
push   %rbx
xor    %ebx,%ebx
xor    %esi,%esi
call   1030 <pthread_mutex_init@plt>
test   %eax,%eax
je     112c <tosMutex_init+0x1c>
mov    0x2ebb(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @tosMutex_init(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 @pthread_mutex_init(i32* %4, i8* null)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %3
store i32 %9, i32* @errno
store i32 -1, i32* %3
br label %10
10: ; preds = %8, %1
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @tosMutex_init(i32* %0) {
%2 = tail call i32 @pthread_mutex_init(i32* %0, i8* null)
%3 = icmp eq i32 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %1
store i32 %2, i32* @errno
br label %5
5: ; preds = %4, %1
%6 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ vdmpolyline(int, int *);
void vdmline(int startx, int starty, int sizex, int sizey) {
  int points[4];
  points[0] = startx;
  points[1] = starty;
  points[2] = sizex;
  points[3] = sizey;
  vdmpolyline(2, points);
}


x86 assembly (clang, -O0):
<vdmline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
lea    -0x20(%rbp),%rsi
mov    $0x2,%edi
call   1030 <vdmpolyline@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdmline>:
sub    $0x18,%rsp
mov    %edi,(%rsp)
mov    %esi,0x4(%rsp)
mov    %edx,0x8(%rsp)
mov    %ecx,0xc(%rsp)
mov    %rsp,%rsi
mov    $0x2,%edi
call   1030 <vdmpolyline@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @vdmline(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca [4 x i32]
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = getelementptr inbounds [4 x i32], [4 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %6
%13 = getelementptr inbounds [4 x i32], [4 x i32]* %9, i64 0, i64 1
store i32 %12, i32* %13
%14 = load i32, i32* %7
%15 = getelementptr inbounds [4 x i32], [4 x i32]* %9, i64 0, i64 2
store i32 %14, i32* %15
%16 = load i32, i32* %8
%17 = getelementptr inbounds [4 x i32], [4 x i32]* %9, i64 0, i64 3
store i32 %16, i32* %17
%18 = getelementptr inbounds [4 x i32], [4 x i32]* %9, i64 0, i64 0
%19 = call i32 @vdmpolyline(i32 2, i32* %18)
ret void
}

LLVM IR (-O2):
define void @vdmline(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca [4 x i32]
%6 = bitcast [4 x i32]* %5 to i8*
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
store i32 %0, i32* %7
%8 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 1
store i32 %1, i32* %8
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 2
store i32 %2, i32* %9
%10 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 3
store i32 %3, i32* %10
%11 = call i32 @vdmpolyline(i32 2, i32* %7)
ret void
}
/* Variables and functions */
double sqrt(double);
double F(double x, double y) { return sqrt(x); }


x86 assembly (clang, -O0):
<F>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     111f <F+0xf>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @F(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @sqrt(double %5)
ret double %6
}

LLVM IR (-O2):
define double @F(double %0, double %1) {
%3 = tail call double @sqrt(double %0)
ret double %3
}
int isleap(int year) {
  if (year % 100 == 0 && year % 400 == 0)
    return 1;
  else if (year % 100 != 0 && year % 4 == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isleap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113b <isleap+0x3b>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113b <isleap+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    117b <isleap+0x7b>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     116f <isleap+0x6f>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    116f <isleap+0x6f>
movl   $0x1,-0x4(%rbp)
jmp    117b <isleap+0x7b>
jmp    1174 <isleap+0x74>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isleap>:
movslq %edi,%rcx
imul   $0x51eb851f,%rcx,%rdx
mov    %rdx,%rax
sar    $0x25,%rax
mov    %rdx,%rsi
shr    $0x3f,%rsi
add    %esi,%eax
imul   $0x64,%eax,%r8d
mov    %ecx,%eax
sub    %r8d,%eax
sar    $0x27,%rdx
add    %esi,%edx
imul   $0x190,%edx,%edx
sub    %edx,%ecx
or     %eax,%ecx
je     1147 <isleap+0x47>
test   %eax,%eax
setne  %al
test   $0x3,%dil
sete   %cl
and    %al,%cl
movzbl %cl,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isleap(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 400
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %23
12: ; preds = %7, %1
%13 = load i32, i32* %3
%14 = srem i32 %13, 100
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i32, i32* %3
%18 = srem i32 %17, 4
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %2
br label %23
21: ; preds = %16, %12
br label %22
22: ; preds = %21
store i32 0, i32* %2
br label %23
23: ; preds = %22, %20, %11
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @isleap(i32 %0) {
%2 = srem i32 %0, 100
%3 = srem i32 %0, 400
%4 = or i32 %2, %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = icmp ne i32 %2, 0
%8 = and i32 %0, 3
%9 = icmp eq i32 %8, 0
%10 = and i1 %7, %9
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %6, %1
%13 = phi i32 [ 1, %1 ], [ %11, %6 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ syscall_read(int /*<<< orphan*/, char *, int);
void read() {
  char c;
  syscall_read(0, &c, 1);
}


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <syscall_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
push   %rax
lea    0x7(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1030 <syscall_read@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @read() {
%1 = alloca i8
%2 = call i32 @syscall_read(i32 0, i8* %1, i32 1)
ret void
}

LLVM IR (-O2):
define void @read() {
%1 = alloca i8
%2 = call i32 @syscall_read(i32 0, i8* %1, i32 1)
ret void
}
/* Type definitions */
struct map {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ *map_lookup(struct map const *, void const *);
bool map_contains(const struct map *__restrict map, const void *key) {
  return map_lookup(map, key) != NULL;
}


x86 assembly (clang, -O0):
<map_contains>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <map_lookup@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_contains>:
push   %rax
call   1030 <map_lookup@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.map = type { i32 }
define i32 @map_contains(%struct.map* noalias %0, i8* %1) {
%3 = alloca %struct.map*
%4 = alloca i8*
store %struct.map* %0, %struct.map** %3
store i8* %1, i8** %4
%5 = load %struct.map*, %struct.map** %3
%6 = load i8*, i8** %4
%7 = call i32* @map_lookup(%struct.map* %5, i8* %6)
%8 = icmp ne i32* %7, null
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.map = type { i32 }
define i32 @map_contains(%struct.map* noalias %0, i8* %1) {
%3 = tail call i32* @map_lookup(%struct.map* %0, i8* %1)
%4 = icmp ne i32* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ itemDisplayInv();
void input_inv(void) { itemDisplayInv(); }


x86 assembly (clang, -O0):
<input_inv>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <itemDisplayInv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_inv>:
xor    %eax,%eax
jmp    1030 <itemDisplayInv@plt>

LLVM IR (-O0):
define void @input_inv() {
%1 = call i32 (...) @itemDisplayInv()
ret void
}

LLVM IR (-O2):
define void @input_inv() {
%1 = tail call i32 (...) @itemDisplayInv()
ret void
}
void testClosureBBBrV(void (*closure)(char, char, char), char a1, char a2,
                      char a3) {
  (*closure)(a1, a2, a3);
}


x86 assembly (clang, -O0):
<testClosureBBBrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %rdi,-0x8(%rbp)
mov    %dl,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x9(%rbp),%dl
mov    -0xa(%rbp),%cl
movsbl %dl,%edi
movsbl %cl,%esi
movsbl -0xb(%rbp),%edx
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureBBBrV>:
mov    %rdi,%rax
mov    %esi,%edi
mov    %edx,%esi
mov    %ecx,%edx
jmp    *%rax

LLVM IR (-O0):
define void @testClosureBBBrV(void (i8, i8, i8)* %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = alloca void (i8, i8, i8)*
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store void (i8, i8, i8)* %0, void (i8, i8, i8)** %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load void (i8, i8, i8)*, void (i8, i8, i8)** %5
%10 = load i8, i8* %6
%11 = load i8, i8* %7
%12 = load i8, i8* %8
ret void
}

LLVM IR (-O2):
define void @testClosureBBBrV(void (i8, i8, i8)* nocapture %0, i8 signext %1, i8 signext %2, i8 signext %3) {
tail call void %0(i8 signext %1, i8 signext %2, i8 signext %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TDETraderParse_error(char const *);
void kiotradererror(const char *s) { TDETraderParse_error(s); }


x86 assembly (clang, -O0):
<kiotradererror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <TDETraderParse_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kiotradererror>:
jmp    1030 <TDETraderParse_error@plt>

LLVM IR (-O0):
define void @kiotradererror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @TDETraderParse_error(i8* %3)
ret void
}

LLVM IR (-O2):
define void @kiotradererror(i8* %0) {
%2 = tail call i32 @TDETraderParse_error(i8* %0)
ret void
}
/* Variables and functions */
int SubEvt_id(void *);
int /*<<< orphan*/ SubEvt_setId(void *, int);
int SubEvt_setDataError(void *my) {
  SubEvt_setId(my, SubEvt_id(my) | 0x80000000UL);
}


x86 assembly (clang, -O0):
<SubEvt_setDataError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <SubEvt_id@plt>
mov    -0x18(%rbp),%rdi
cltq
movabs $0x80000000,%rcx
or     %rcx,%rax
mov    %eax,%esi
call   1030 <SubEvt_setId@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SubEvt_setDataError>:
push   %rbx
mov    %rdi,%rbx
call   1040 <SubEvt_id@plt>
or     $0x80000000,%eax
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <SubEvt_setId@plt>

LLVM IR (-O0):
define i32 @SubEvt_setDataError(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @SubEvt_id(i8* %5)
%7 = sext i32 %6 to i64
%8 = or i64 %7, 2147483648
%9 = trunc i64 %8 to i32
%10 = call i32 @SubEvt_setId(i8* %4, i32 %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @SubEvt_setDataError(i8* %0) {
%2 = tail call i32 @SubEvt_id(i8* %0)
%3 = or i32 %2, -2147483648
%4 = tail call i32 @SubEvt_setId(i8* %0, i32 %3)
ret i32 undef
}
int ept_is_present_gpte(unsigned long pte) { return pte & 7; }


x86 assembly (clang, -O0):
<ept_is_present_gpte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x7,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ept_is_present_gpte>:
mov    %rdi,%rax
and    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @ept_is_present_gpte(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 7
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @ept_is_present_gpte(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = and i32 %2, 7
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ loop1(int, int);
int /*<<< orphan*/ loop2(int, int);
int /*<<< orphan*/ loop3(int, int);
int /*<<< orphan*/ loop4(int, int);
int main(void) {
  int n = 100;
  int sum = 0;
  loop1(sum, n);
  loop2(sum, n);
  loop3(sum, n);
  loop4(sum, n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x64,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1060 <loop1@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <loop2@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1050 <loop3@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <loop4@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x64,%esi
call   1060 <loop1@plt>
xor    %edi,%edi
mov    $0x64,%esi
call   1040 <loop2@plt>
xor    %edi,%edi
mov    $0x64,%esi
call   1050 <loop3@plt>
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <loop4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 100, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
%6 = call i32 @loop1(i32 %4, i32 %5)
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = call i32 @loop2(i32 %7, i32 %8)
%10 = load i32, i32* %3
%11 = load i32, i32* %2
%12 = call i32 @loop3(i32 %10, i32 %11)
%13 = load i32, i32* %3
%14 = load i32, i32* %2
%15 = call i32 @loop4(i32 %13, i32 %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @loop1(i32 0, i32 100)
%2 = tail call i32 @loop2(i32 0, i32 100)
%3 = tail call i32 @loop3(i32 0, i32 100)
%4 = tail call i32 @loop4(i32 0, i32 100)
ret i32 0
}
int(constant_test_bit)(int nr, unsigned long const volatile *addr) {
  unsigned long const volatile *mem_3;
  {
    mem_3 = addr + (nr >> 5);
    return (((1UL << (nr & 31)) & (unsigned long)(*mem_3)) != 0UL);
  }
}


x86 assembly (clang, -O0):
<constant_test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
sar    $0x5,%ecx
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%rcx
and    %rcx,%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constant_test_bit>:
mov    %edi,%eax
sar    $0x5,%eax
cltq
mov    (%rsi,%rax,8),%rcx
xor    %eax,%eax
bt     %edi,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @constant_test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = ashr i32 %7, 5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i64, i64* %6, i64 %9
store i64* %10, i64** %5
%11 = load i32, i32* %3
%12 = and i32 %11, 31
%13 = zext i32 %12 to i64
%14 = shl i64 1, %13
%15 = load i64*, i64** %5
%16 = load volatile i64, i64* %15
%17 = and i64 %14, %16
%18 = icmp ne i64 %17, 0
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @constant_test_bit(i32 %0, i64* %1) {
%3 = ashr i32 %0, 5
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = and i32 %0, 31
%7 = zext i32 %6 to i64
%8 = shl nuw nsw i64 1, %7
%9 = load volatile i64, i64* %5
%10 = and i64 %9, %8
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}
double dblmax(double a, double b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<dblmax>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112d <dblmax+0x2d>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <dblmax+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dblmax>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dblmax(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @dblmax(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
int numa_node_id(void) { return ((void)(0), 0); }


x86 assembly (clang, -O0):
<numa_node_id>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numa_node_id>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @numa_node_id() {
ret i32 0
}

LLVM IR (-O2):
define i32 @numa_node_id() {
ret i32 0
}
void encodeDmaStore(void) {}


x86 assembly (clang, -O0):
<encodeDmaStore>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodeDmaStore>:
ret

LLVM IR (-O0):
define void @encodeDmaStore() {
ret void
}

LLVM IR (-O2):
define void @encodeDmaStore() {
ret void
}
int UnusedStack() { return 0; }


x86 assembly (clang, -O0):
<UnusedStack>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnusedStack>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @UnusedStack() {
ret i32 0
}

LLVM IR (-O2):
define i32 @UnusedStack() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putc(char const);
void puts(const char *s) {
  for (; *s != '\0'; ++s) {
    putc(*s);
  }
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1149 <puts+0x39>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <putc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <puts+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %12, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i32 @putc(i8 signext %10)
br label %12
12: ; preds = %8
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
br label %3
15: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @putc(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t dtls_uint8_to_int(const unsigned char *field) {
  return (uint8_t)field[0];
}


x86 assembly (clang, -O0):
<dtls_uint8_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtls_uint8_to_int>:
movzbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @dtls_uint8_to_int(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @dtls_uint8_to_int(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
ret i32 %3
}
void __attribute__((weak)) adc3_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<adc3_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adc3_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.adc3_isr = [9 x i8] c"adc3_isr\00"
define weak void @adc3_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.adc3_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.adc3_isr = [9 x i8] c"adc3_isr\00"
define weak void @adc3_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.adc3_isr, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ parse_args(int, char **);
main(int argc, char *argv[]) {
  parse_args(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <parse_args@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <parse_args@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @parse_args(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @parse_args(i32 %0, i8** %1)
ret i32 0
}
void INT_Excep_PERIB_INTB148(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB148>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB148>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB148() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB148() {
ret void
}