xunge/DecIR huggingface dataset:
/* Variables and functions */
int tolower(int);
int ascii_tolower(int c) { return tolower(c); }


x86 assembly (clang, -O0):
<ascii_tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <tolower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascii_tolower>:
jmp    1030 <tolower@plt>

LLVM IR (-O0):
define i32 @ascii_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @tolower(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ascii_tolower(i32 %0) {
%2 = tail call i32 @tolower(i32 %0)
ret i32 %2
}
int ft_isspace(char c) {
  if (c == ' ')
    return (1);
  else if (c == '\t')
    return (1);
  else if (c == '\n')
    return (1);
  else if (c == '\v')
    return (1);
  else if (c == '\f')
    return (1);
  else if (c == '\r')
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
jne    1123 <ft_isspace+0x23>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <ft_isspace+0xa7>
movsbl -0x5(%rbp),%eax
cmp    $0x9,%eax
jne    113c <ft_isspace+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <ft_isspace+0xa7>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
jne    1155 <ft_isspace+0x55>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <ft_isspace+0xa7>
movsbl -0x5(%rbp),%eax
cmp    $0xb,%eax
jne    116e <ft_isspace+0x6e>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <ft_isspace+0xa7>
movsbl -0x5(%rbp),%eax
cmp    $0xc,%eax
jne    1187 <ft_isspace+0x87>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <ft_isspace+0xa7>
movsbl -0x5(%rbp),%eax
cmp    $0xd,%eax
jne    11a0 <ft_isspace+0xa0>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <ft_isspace+0xa7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isspace>:
mov    $0x1,%eax
lea    -0x9(%rdi),%ecx
cmp    $0x5,%cl
jae    110e <ft_isspace+0xe>
ret
cmp    $0x20,%dil
je     110d <ft_isspace+0xd>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_isspace(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 32
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %34
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 9
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %34
13: ; preds = %8
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 10
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %2
br label %34
18: ; preds = %13
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 11
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %2
br label %34
23: ; preds = %18
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 12
br i1 %26, label %27, label %28
27: ; preds = %23
store i32 1, i32* %2
br label %34
28: ; preds = %23
%29 = load i8, i8* %3
%30 = sext i8 %29 to i32
%31 = icmp eq i32 %30, 13
br i1 %31, label %32, label %33
32: ; preds = %28
store i32 1, i32* %2
br label %34
33: ; preds = %28
store i32 0, i32* %2
br label %34
34: ; preds = %33, %32, %27, %22, %17, %12, %7
%35 = load i32, i32* %2
ret i32 %35
}

LLVM IR (-O2):
define i32 @ft_isspace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %3
i8 9, label %3
i8 10, label %3
i8 11, label %3
i8 12, label %3
i8 13, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
int main() {
  int x;
  x = 0;
  x += 1;
  if (x != 1)
    return 1;
  x -= 1;
  if (x != 0)
    return 1;
  x |= 3;
  if (x != 3)
    return 1;
  x &= 2;
  if (x != 2)
    return 1;
  x *= 2;
  if (x != 4)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1131 <main+0x31>
movl   $0x1,-0x4(%rbp)
jmp    11b4 <main+0xb4>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1150 <main+0x50>
movl   $0x1,-0x4(%rbp)
jmp    11b4 <main+0xb4>
mov    -0x8(%rbp),%eax
or     $0x3,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
je     116f <main+0x6f>
movl   $0x1,-0x4(%rbp)
jmp    11b4 <main+0xb4>
mov    -0x8(%rbp),%eax
and    $0x2,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     118e <main+0x8e>
movl   $0x1,-0x4(%rbp)
jmp    11b4 <main+0xb4>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x4,-0x8(%rbp)
je     11ad <main+0xad>
movl   $0x1,-0x4(%rbp)
jmp    11b4 <main+0xb4>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %1
br label %33
8: ; preds = %0
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 1, i32* %1
br label %33
14: ; preds = %8
%15 = load i32, i32* %2
%16 = or i32 %15, 3
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = icmp ne i32 %17, 3
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 1, i32* %1
br label %33
20: ; preds = %14
%21 = load i32, i32* %2
%22 = and i32 %21, 2
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = icmp ne i32 %23, 2
br i1 %24, label %25, label %26
25: ; preds = %20
store i32 1, i32* %1
br label %33
26: ; preds = %20
%27 = load i32, i32* %2
%28 = mul nsw i32 %27, 2
store i32 %28, i32* %2
%29 = load i32, i32* %2
%30 = icmp ne i32 %29, 4
br i1 %30, label %31, label %32
31: ; preds = %26
store i32 1, i32* %1
br label %33
32: ; preds = %26
store i32 0, i32* %1
br label %33
33: ; preds = %32, %31, %25, %19, %13, %7
%34 = load i32, i32* %1
ret i32 %34
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int difference(int num1, int num2) {
  return (num1 > num2) ? num1 - num2 : num2 - num1;
}


x86 assembly (clang, -O0):
<difference>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1124 <difference+0x24>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112d <difference+0x2d>
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<difference>:
mov    %edi,%eax
sub    %esi,%eax
neg    %eax
sub    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @difference(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %9, %10
br label %16
12: ; preds = %2
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = sub nsw i32 %13, %14
br label %16
16: ; preds = %12, %8
%17 = phi i32 [ %11, %8 ], [ %15, %12 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @difference(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = sub nsw i32 %0, %1
%5 = sub nsw i32 %1, %0
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, int, int);
const char *cJSON_Version(void) {
  static char version[15];
  sprintf(version, "%i.%i.%i", 1, 5, 7);
  return version;
}


x86 assembly (clang, -O0):
<cJSON_Version>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f0e(%rip),%rdi
lea    0xede(%rip),%rsi
mov    $0x1,%edx
mov    $0x5,%ecx
mov    $0x7,%r8d
call   1030 <sprintf@plt>
lea    0x2eeb(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cJSON_Version>:
push   %rbx
lea    0x2f11(%rip),%rbx
lea    0xee1(%rip),%rsi
mov    %rbx,%rdi
mov    $0x1,%edx
mov    $0x5,%ecx
mov    $0x7,%r8d
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@cJSON_Version.version = internal global [15 x i8] zeroinitializer
@.str = [9 x i8] c"%i.%i.%i\00"
define i8* @cJSON_Version() {
%1 = call i32 @sprintf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i32 5, i32 7)
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0)
}

LLVM IR (-O2):
@cJSON_Version.version = internal global [15 x i8] zeroinitializer
@.str = [9 x i8] c"%i.%i.%i\00"
define i8* @cJSON_Version() {
%1 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i32 5, i32 7)
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0)
}
/* Variables and functions */
void ft_strclr(char *s) {
  size_t i;
  i = 0;
  while (s[i]) {
    s[i] = '\0';
    i++;
  }
}


x86 assembly (clang, -O0):
<ft_strclr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     113f <ft_strclr+0x3f>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <ft_strclr+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strclr>:
cmpb   $0x0,(%rdi)
je     111d <ft_strclr+0x1d>
add    $0x1,%rdi
nopl   0x0(%rax)
movb   $0x0,-0x1(%rdi)
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <ft_strclr+0x10>
ret

LLVM IR (-O0):
define void @ft_strclr(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %4
%11 = load i8*, i8** %2
%12 = load i64, i64* %3
%13 = getelementptr inbounds i8, i8* %11, i64 %12
store i8 0, i8* %13
%14 = load i64, i64* %3
%15 = add i64 %14, 1
store i64 %15, i64* %3
br label %4
16: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ft_strclr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %0, %1 ]
%6 = phi i64 [ %7, %4 ], [ 0, %1 ]
store i8 0, i8* %5
%7 = add i64 %6, 1
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sort(int *, int /*<<< orphan*/, int);
void quick_sort(int *p, int n) { sort(p, 0, n); }


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <sort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <sort@plt>

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @sort(i32* %5, i32 0, i32 %6)
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1) {
%3 = tail call i32 @sort(i32* %0, i32 0, i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int *getArrayAddress(int size, char shared) {
  return (int *)malloc(sizeof(int) * size);
}


x86 assembly (clang, -O0):
<getArrayAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getArrayAddress>:
shl    $0x2,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @getArrayAddress(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = mul i64 4, %6
%8 = trunc i64 %7 to i32
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i32*
ret i32* %10
}

LLVM IR (-O2):
define i32* @getArrayAddress(i32 %0, i8 signext %1) {
%3 = shl i32 %0, 2
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ podesihardver();
int /*<<< orphan*/ podesihardverpwm();
int main(int argc, char **argv) {
  podesihardver();
  podesihardverpwm();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <podesihardver@plt>
mov    $0x0,%al
call   1030 <podesihardverpwm@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <podesihardver@plt>
xor    %eax,%eax
call   1030 <podesihardverpwm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @podesihardver()
%7 = call i32 (...) @podesihardverpwm()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @podesihardver()
%4 = tail call i32 (...) @podesihardverpwm()
ret i32 0
}
void BoolTests(void) {}


x86 assembly (clang, -O0):
<BoolTests>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BoolTests>:
ret

LLVM IR (-O0):
define void @BoolTests() {
ret void
}

LLVM IR (-O2):
define void @BoolTests() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ init_cpu();
int si_reset(int argc, char *argv[]) {
  init_cpu();
  return (0);
}


x86 assembly (clang, -O0):
<si_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <init_cpu@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<si_reset>:
push   %rax
xor    %eax,%eax
call   1030 <init_cpu@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @si_reset(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @init_cpu()
ret i32 0
}

LLVM IR (-O2):
define i32 @si_reset(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @init_cpu()
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t rtp2435r_get_count(uint8_t *header) {
  return (header[2] << 8 | header[3]) >> 2;
}


x86 assembly (clang, -O0):
<rtp2435r_get_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
sar    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtp2435r_get_count>:
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     0xc(%rdi),%eax
sar    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @rtp2435r_get_count(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 3
%9 = load i32, i32* %8
%10 = or i32 %6, %9
%11 = ashr i32 %10, 2
ret i32 %11
}

LLVM IR (-O2):
define i32 @rtp2435r_get_count(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = getelementptr inbounds i32, i32* %0, i64 3
%6 = load i32, i32* %5
%7 = or i32 %4, %6
%8 = ashr i32 %7, 2
ret i32 %8
}
/* Type definitions */
typedef int u_int;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
u_int if_nametoindex(const char *ifname) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<if_nametoindex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<if_nametoindex>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @if_nametoindex(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @if_nametoindex(i8* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i32 -1
}
/* Variables and functions */
double bisection(int, int, double, int);
int /*<<< orphan*/ printf(char *, double);
int main(void) {
  printf("%g\n", bisection(-10, 10, 0.001, 100000));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xfffffff6,%edi
mov    $0xa,%esi
movsd  0xebf(%rip),%xmm0
mov    $0x186a0,%edx
call   1030 <bisection@plt>
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xed7(%rip),%xmm0
mov    $0xfffffff6,%edi
mov    $0xa,%esi
mov    $0x186a0,%edx
call   1030 <bisection@plt>
lea    0xec4(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%g\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call double @bisection(i32 -10, i32 10, double 1.000000e-03, i32 100000)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%g\0A\00"
define i32 @main() {
%1 = tail call double @bisection(i32 -10, i32 10, double 1.000000e-03, i32 100000)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %1)
ret i32 0
}
void asn1_enc_save(void) {}


x86 assembly (clang, -O0):
<asn1_enc_save>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asn1_enc_save>:
ret

LLVM IR (-O0):
define void @asn1_enc_save() {
ret void
}

LLVM IR (-O2):
define void @asn1_enc_save() {
ret void
}
int IsValidCell(int msize, int row, int col) {
  if (row < 0 || col < 0 || row >= msize || col >= msize)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<IsValidCell>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1139 <IsValidCell+0x39>
cmpl   $0x0,-0x10(%rbp)
jl     1139 <IsValidCell+0x39>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1139 <IsValidCell+0x39>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1145 <IsValidCell+0x45>
movl   $0x0,-0x4(%rbp)
jmp    114c <IsValidCell+0x4c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsValidCell>:
mov    %edx,%eax
or     %esi,%eax
setns  %al
cmp    %edi,%esi
setl   %cl
and    %al,%cl
cmp    %edi,%edx
setl   %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @IsValidCell(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 0
br i1 %9, label %21, label %10
10: ; preds = %3
%11 = load i32, i32* %7
%12 = icmp slt i32 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %10
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %21, label %17
17: ; preds = %13
%18 = load i32, i32* %7
%19 = load i32, i32* %5
%20 = icmp sge i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %17, %13, %10, %3
store i32 0, i32* %4
br label %23
22: ; preds = %17
store i32 1, i32* %4
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @IsValidCell(i32 %0, i32 %1, i32 %2) {
%4 = or i32 %2, %1
%5 = icmp sgt i32 %4, -1
%6 = icmp slt i32 %1, %0
%7 = and i1 %6, %5
%8 = icmp slt i32 %2, %0
%9 = and i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
void function_declaration_after(void) {}


x86 assembly (clang, -O0):
<function_declaration_after>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_declaration_after>:
ret

LLVM IR (-O0):
define void @function_declaration_after() {
ret void
}

LLVM IR (-O2):
define void @function_declaration_after() {
ret void
}
void XScreenNumberOfScreen() {}


x86 assembly (clang, -O0):
<XScreenNumberOfScreen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XScreenNumberOfScreen>:
ret

LLVM IR (-O0):
define void @XScreenNumberOfScreen() {
ret void
}

LLVM IR (-O2):
define void @XScreenNumberOfScreen() {
ret void
}
void snSilentLogCallback(const char *format, ...) {}


x86 assembly (clang, -O0):
<snSilentLogCallback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<snSilentLogCallback>:
ret

LLVM IR (-O0):
define void @snSilentLogCallback(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @snSilentLogCallback(i8* nocapture %0, ...) {
ret void
}
void G_ClearStatistics(void) {}


x86 assembly (clang, -O0):
<G_ClearStatistics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<G_ClearStatistics>:
ret

LLVM IR (-O0):
define void @G_ClearStatistics() {
ret void
}

LLVM IR (-O2):
define void @G_ClearStatistics() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_message_get_realtime_usec(void *m, uint64_t *usec) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_message_get_realtime_usec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_get_realtime_usec>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_message_get_realtime_usec(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_message_get_realtime_usec(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/);
void *swt_idle(void *data) { pthread_exit(0); }


x86 assembly (clang, -O0):
<swt_idle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swt_idle>:
xor    %edi,%edi
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define i8* @swt_idle(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @pthread_exit(i32 0)
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @swt_idle(i8* nocapture readnone %0) {
%2 = tail call i32 @pthread_exit(i32 0)
ret i8* undef
}
/* Variables and functions */
int func10();
int func11();
int func12() { return func10() + func11(); }


x86 assembly (clang, -O0):
<func12>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <func10@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <func11@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func12>:
push   %rbx
xor    %eax,%eax
call   1040 <func10@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <func11@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @func12() {
%1 = call i32 (...) @func10()
%2 = call i32 (...) @func11()
%3 = add nsw i32 %1, %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @func12() {
%1 = tail call i32 (...) @func10()
%2 = tail call i32 (...) @func11()
%3 = add nsw i32 %2, %1
ret i32 %3
}
float timedez(float x, float y, float x2, float y2, float x3, float y3, float J,
              float Delta) {
  return J * (y * (x2 + x3) - x * (y2 + y3));
}


x86 assembly (clang, -O0):
<timedez>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  %xmm6,-0x1c(%rbp)
movss  %xmm7,-0x20(%rbp)
movss  -0x1c(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm3
addss  -0x14(%rbp),%xmm3
movss  -0x4(%rbp),%xmm2
movss  -0x10(%rbp),%xmm4
addss  -0x18(%rbp),%xmm4
mulss  %xmm4,%xmm2
movd   %xmm2,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm2
mulss  %xmm3,%xmm1
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<timedez>:
addss  %xmm4,%xmm2
addss  %xmm5,%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm1,%xmm2
subss  %xmm3,%xmm2
mulss  %xmm6,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @timedez(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7) {
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
%13 = alloca float
%14 = alloca float
%15 = alloca float
%16 = alloca float
store float %0, float* %9
store float %1, float* %10
store float %2, float* %11
store float %3, float* %12
store float %4, float* %13
store float %5, float* %14
store float %6, float* %15
store float %7, float* %16
%17 = load float, float* %15
%18 = load float, float* %10
%19 = load float, float* %11
%20 = load float, float* %13
%21 = fadd float %19, %20
%22 = load float, float* %9
%23 = load float, float* %12
%24 = load float, float* %14
%25 = fadd float %23, %24
%26 = fmul float %22, %25
%27 = fneg float %26
%28 = call float @llvm.fmuladd.f32(float %18, float %21, float %27)
%29 = fmul float %17, %28
ret float %29
}

LLVM IR (-O2):
define float @timedez(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7) {
%9 = fadd float %2, %4
%10 = fadd float %3, %5
%11 = fneg float %10
%12 = fmul float %11, %0
%13 = tail call float @llvm.fmuladd.f32(float %1, float %9, float %12)
%14 = fmul float %13, %6
ret float %14
}
int find(int u, int r[10]) { return r[u]; }


x86 assembly (clang, -O0):
<find>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find>:
movslq %edi,%rax
mov    (%rsi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @find(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @find(i32 %0, i32* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = getelementptr inbounds i32, i32* %1, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
float rad(float deg) { return 3.14159265359f / 180.0f * deg; }


x86 assembly (clang, -O0):
<rad>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rad>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @rad(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 0x3F91DF46A0000000, %3
ret float %4
}

LLVM IR (-O2):
define float @rad(float %0) {
%2 = fmul float %0, 0x3F91DF46A0000000
ret float %2
}
/* Variables and functions */
int divide_and_round_up(int, int);
int round_up(int x, int y) { return divide_and_round_up(x, y) * y; }


x86 assembly (clang, -O0):
<round_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <divide_and_round_up@plt>
imul   -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up>:
push   %rbx
mov    %esi,%ebx
call   1030 <divide_and_round_up@plt>
imul   %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @round_up(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @divide_and_round_up(i32 %5, i32 %6)
%8 = load i32, i32* %4
%9 = mul nsw i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @round_up(i32 %0, i32 %1) {
%3 = tail call i32 @divide_and_round_up(i32 %0, i32 %1)
%4 = mul nsw i32 %3, %1
ret i32 %4
}
void fldcw_exns(void) { asm(" pushw $0x037E ; fldcw (%esp) ; addl $2, %esp"); }


x86 assembly (clang, -O0):
<fldcw_exns>:
push   %rbp
mov    %rsp,%rbp
pushw  $0x37e
fldcw  (%esp)
add    $0x2,%esp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fldcw_exns>:
pushw  $0x37e
fldcw  (%esp)
add    $0x2,%esp
ret

LLVM IR (-O0):
define void @fldcw_exns() {
ret void
}

LLVM IR (-O2):
define void @fldcw_exns() {
tail call void asm sideeffect " pushw $$0x037E ; fldcw (%esp) ; addl $$2, %esp", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
pr(fmt, cnt, s, p) char *fmt, *s, *p;
{ printk(fmt, cnt, cnt == 1 ? s : p); }


x86 assembly (clang, -O0):
<pr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x2c(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    114c <pr+0x3c>
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
jmp    1154 <pr+0x44>
mov    -0x28(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x2c(%rbp),%esi
mov    -0x38(%rbp),%rdi
mov    -0x40(%rbp),%rdx
mov    $0x0,%al
call   1030 <printk@plt>
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr>:
cmp    $0x1,%esi
cmovne %rcx,%rdx
xor    %eax,%eax
jmp    1030 <printk@plt>

LLVM IR (-O0):
define i32 @pr(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %4
%15 = load i8*, i8** %8
br label %18
16: ; preds = %4
%17 = load i8*, i8** %9
br label %18
18: ; preds = %16, %14
%19 = phi i8* [ %15, %14 ], [ %17, %16 ]
%20 = call i32 (i8*, i32, i8*, ...) bitcast (i32 (...)* @printk to i32 (i8*, i32, i8*, ...)*)(i8* %10, i32 %11, i8* %19)
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @pr(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = icmp eq i32 %1, 1
%6 = select i1 %5, i8* %2, i8* %3
%7 = tail call i32 (i8*, i32, i8*, ...) bitcast (i32 (...)* @printk to i32 (i8*, i32, i8*, ...)*)(i8* %0, i32 %1, i8* %6)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ addrange(char, char);
void addranges_w(void) {
  addrange('0', '9');
  addrange('A', 'Z');
  addrange('_', '_');
  addrange('a', 'z');
}


x86 assembly (clang, -O0):
<addranges_w>:
push   %rbp
mov    %rsp,%rbp
mov    $0x30,%edi
mov    $0x39,%esi
call   1030 <addrange@plt>
mov    $0x41,%edi
mov    $0x5a,%esi
call   1030 <addrange@plt>
mov    $0x5f,%esi
mov    %esi,%edi
call   1030 <addrange@plt>
mov    $0x61,%edi
mov    $0x7a,%esi
call   1030 <addrange@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<addranges_w>:
push   %rax
mov    $0x30,%edi
mov    $0x39,%esi
call   1030 <addrange@plt>
mov    $0x41,%edi
mov    $0x5a,%esi
call   1030 <addrange@plt>
mov    $0x5f,%edi
mov    $0x5f,%esi
call   1030 <addrange@plt>
mov    $0x61,%edi
mov    $0x7a,%esi
pop    %rax
jmp    1030 <addrange@plt>

LLVM IR (-O0):
define void @addranges_w() {
%1 = call i32 @addrange(i8 signext 48, i8 signext 57)
%2 = call i32 @addrange(i8 signext 65, i8 signext 90)
%3 = call i32 @addrange(i8 signext 95, i8 signext 95)
%4 = call i32 @addrange(i8 signext 97, i8 signext 122)
ret void
}

LLVM IR (-O2):
define void @addranges_w() {
%1 = tail call i32 @addrange(i8 signext 48, i8 signext 57)
%2 = tail call i32 @addrange(i8 signext 65, i8 signext 90)
%3 = tail call i32 @addrange(i8 signext 95, i8 signext 95)
%4 = tail call i32 @addrange(i8 signext 97, i8 signext 122)
ret void
}
int pci_base_address_is_memory_space(unsigned int attr) {
  return (attr & 0x01) == 0x00;
}


x86 assembly (clang, -O0):
<pci_base_address_is_memory_space>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_base_address_is_memory_space>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pci_base_address_is_memory_space(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @pci_base_address_is_memory_space(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() {
  printf("hello, "
         "world"
         "\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"hello, world\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"hello, world\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mod3_say(void) { printf("mod3: Hello World\n"); }


x86 assembly (clang, -O0):
<mod3_say>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod3_say>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"mod3: Hello World\0A\00"
define void @mod3_say() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c"mod3: Hello World\00"
define void @mod3_say() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_DFuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xdf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFuint64_midword_reg>:
test   $0xdf0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 223
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DFuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14614528
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ test();
void dotest() { test(); }


x86 assembly (clang, -O0):
<dotest>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dotest>:
xor    %eax,%eax
jmp    1030 <test@plt>

LLVM IR (-O0):
define void @dotest() {
%1 = call i32 (...) @test()
ret void
}

LLVM IR (-O2):
define void @dotest() {
%1 = tail call i32 (...) @test()
ret void
}
/* Variables and functions */
char const *strong_s1();
const char *sibcall_strong_s1(void) { return strong_s1(); }


x86 assembly (clang, -O0):
<sibcall_strong_s1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <strong_s1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sibcall_strong_s1>:
xor    %eax,%eax
jmp    1030 <strong_s1@plt>

LLVM IR (-O0):
define i8* @sibcall_strong_s1() {
%1 = call i8* (...) @strong_s1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @sibcall_strong_s1() {
%1 = tail call i8* (...) @strong_s1()
ret i8* %1
}
/* Type definitions */
struct rtattr {
  int dummy;
};
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
__u32 rta_getattr_u32(const struct rtattr *rta) {
  return *(__u32 *)((
      void *)(((char *)(rta)) +
              ((((sizeof(struct rtattr)) + 4 - 1) & ~(4 - 1)) + (0))));
}


x86 assembly (clang, -O0):
<rta_getattr_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rta_getattr_u32>:
mov    0x4(%rdi),%eax
ret

LLVM IR (-O0):
%struct.rtattr = type { i32 }
define i32 @rta_getattr_u32(%struct.rtattr* %0) {
%2 = alloca %struct.rtattr*
store %struct.rtattr* %0, %struct.rtattr** %2
%3 = load %struct.rtattr*, %struct.rtattr** %2
%4 = bitcast %struct.rtattr* %3 to i8*
%5 = getelementptr inbounds i8, i8* %4, i64 4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.rtattr = type { i32 }
define i32 @rta_getattr_u32(%struct.rtattr* nocapture %0) {
%2 = getelementptr inbounds %struct.rtattr, %struct.rtattr* %0, i64 1, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ func();
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello from prog1.c\n");
  func();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Hello from prog1.c\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (...) @func()
ret i32 0
}

LLVM IR (-O2):
@str = [19 x i8] c"Hello from prog1.c\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @func()
ret i32 0
}
int test_imm_5Fint64_lowword_mem(long long *val) {
  return ((*val) & (0x5F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Fint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x5f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Fint64_lowword_mem>:
testb  $0x5f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Fint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 95
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Fint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 95
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int lib() { return 1; }


x86 assembly (clang, -O0):
<lib>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @lib() {
ret i32 1
}

LLVM IR (-O2):
define i32 @lib() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x53() {
  Assert_real((ispunct(83) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              420, ("ispunct should be 0 for S"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x53>:
push   %rbp
mov    %rsp,%rbp
mov    $0x53,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1a4,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x53>:
push   %rax
mov    $0x53,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1a4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 0 for S\00"
define void @t_ispunct_0x53() {
%1 = call i64 @ispunct(i32 83)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 0 for S\00"
define void @t_ispunct_0x53() {
%1 = tail call i64 @ispunct(i32 83)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void ADC4_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<ADC4_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC4_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @ADC4_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @ADC4_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *svz_malloc(size_t);
void *svz_calloc(size_t size) {
  void *ptr = svz_malloc(size);
  memset(ptr, 0, size);
  return ptr;
}


x86 assembly (clang, -O0):
<svz_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <svz_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<svz_calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <svz_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @svz_calloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @svz_malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i64, i64* %2
%8 = call i32 @memset(i8* %6, i32 0, i64 %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
define i8* @svz_calloc(i64 %0) {
%2 = tail call i8* @svz_malloc(i64 %0)
%3 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char const *, char const);
unsigned int estDirection(const char touche) {
  static const char basedirectionPossible[] = "zZsSqQdD";
  return strchr(basedirectionPossible, touche) != NULL;
}


x86 assembly (clang, -O0):
<estDirection>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<estDirection>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@estDirection.basedirectionPossible = internal constant [9 x i8] c"zZsSqQdD\00"
define i32 @estDirection(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32* @strchr(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @estDirection.basedirectionPossible, i64 0, i64 0), i8 signext %3)
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@estDirection.basedirectionPossible = internal constant [9 x i8] c"zZsSqQdD\00"
define i32 @estDirection(i8 signext %0) {
%2 = tail call i32* @strchr(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @estDirection.basedirectionPossible, i64 0, i64 0), i8 signext %0)
%3 = icmp ne i32* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
void handle_hardfault(void) { return; }


x86 assembly (clang, -O0):
<handle_hardfault>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_hardfault>:
ret

LLVM IR (-O0):
define void @handle_hardfault() {
ret void
}

LLVM IR (-O2):
define void @handle_hardfault() {
ret void
}
int do_643() { return 643; }


x86 assembly (clang, -O0):
<do_643>:
push   %rbp
mov    %rsp,%rbp
mov    $0x283,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_643>:
mov    $0x283,%eax
ret

LLVM IR (-O0):
define i32 @do_643() {
ret i32 643
}

LLVM IR (-O2):
define i32 @do_643() {
ret i32 643
}
/* Variables and functions */
int g(int);
int f(int x) { return g(x + 2); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x2,%edi
call   1030 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
add    $0x2,%edi
jmp    1030 <g@plt>

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
%5 = call i32 @g(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 2
%3 = tail call i32 @g(i32 %2)
ret i32 %3
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct list *);
void list_free(struct list *l) {
  if (l)
    free(l);
}


x86 assembly (clang, -O0):
<list_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <list_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_free>:
test   %rdi,%rdi
je     111a <list_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_free(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
%3 = load %struct.list*, %struct.list** %2
%4 = icmp ne %struct.list* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.list*, %struct.list** %2
%7 = call i32 @free(%struct.list* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_free(%struct.list* %0) {
%2 = icmp eq %struct.list* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.list* %0)
br label %5
5: ; preds = %3, %1
ret void
}