xunge/DecIR huggingface dataset:
int test_imm_6Dint32_reg(int val) { return ((val) & (0x6D << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_6Dint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x6d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Dint32_reg>:
test   $0x6d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Dint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 109
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_6Dint32_reg(i32 %0) {
%2 = and i32 %0, 109
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void b43legacy_rfkill_alloc(struct b43legacy_wldev *dev) {}


x86 assembly (clang, -O0):
<b43legacy_rfkill_alloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<b43legacy_rfkill_alloc>:
ret

LLVM IR (-O0):
%struct.b43legacy_wldev = type opaque
define void @b43legacy_rfkill_alloc(%struct.b43legacy_wldev* %0) {
%2 = alloca %struct.b43legacy_wldev*
store %struct.b43legacy_wldev* %0, %struct.b43legacy_wldev** %2
ret void
}

LLVM IR (-O2):
%struct.b43legacy_wldev = type opaque
define void @b43legacy_rfkill_alloc(%struct.b43legacy_wldev* nocapture %0) {
ret void
}
int test_imm_F9uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xF9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F9uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xf9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F9uint64_lowword_mem>:
testb  $0xf9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F9uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 249
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F9uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 249
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct cec_msg {
  int /*<<< orphan*/ *msg;
};
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
void cec_ops_set_audio_rate(const struct cec_msg *msg, __u8 *audio_rate) {
  *audio_rate = msg->msg[2];
}


x86 assembly (clang, -O0):
<cec_ops_set_audio_rate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x8(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cec_ops_set_audio_rate>:
mov    (%rdi),%rax
mov    0x8(%rax),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
%struct.cec_msg = type { i32* }
define void @cec_ops_set_audio_rate(%struct.cec_msg* %0, i32* %1) {
%3 = alloca %struct.cec_msg*
%4 = alloca i32*
store %struct.cec_msg* %0, %struct.cec_msg** %3
store i32* %1, i32** %4
%5 = load %struct.cec_msg*, %struct.cec_msg** %3
%6 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %5, i32 0, i32 0
%7 = load i32*, i32** %6
%8 = getelementptr inbounds i32, i32* %7, i64 2
%9 = load i32, i32* %8
%10 = load i32*, i32** %4
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
%struct.cec_msg = type { i32* }
define void @cec_ops_set_audio_rate(%struct.cec_msg* nocapture %0, i32* nocapture writeonly %1) {
%3 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %0, i64 0, i32 0
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 2
%6 = load i32, i32* %5
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
int snprintf(char *, int, char *, int, char *);
int fill_response_header_string(int status, char *reason, char *buf, int size) {
  int c = snprintf(buf, size, "HTTP/1.1 %d %s\r\nConnection: close\r\n\r\n",
                   status, reason);
  return c;
}


x86 assembly (clang, -O0):
<fill_response_header_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%r8
lea    0xec5(%rip),%rdx
call   1030 <snprintf@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_response_header_string>:
mov    %rdx,%rax
mov    %rsi,%r8
mov    %edi,%r9d
lea    0xee0(%rip),%rdx
mov    %rax,%rdi
mov    %ecx,%esi
mov    %r9d,%ecx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"HTTP/1.1 %d %s\0D\0AConnection: close\0D\0A\0D\0A\00"
define i32 @fill_response_header_string(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %7
%11 = load i32, i32* %8
%12 = load i32, i32* %5
%13 = load i8*, i8** %6
%14 = call i32 @snprintf(i8* %10, i32 %11, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %12, i8* %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
@.str = [38 x i8] c"HTTP/1.1 %d %s\0D\0AConnection: close\0D\0A\0D\0A\00"
define i32 @fill_response_header_string(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @snprintf(i8* %2, i32 %3, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fibonacci_term(int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main() {
  printf("fibonacci %ld", fibonacci_term(100));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x64,%edi
call   1040 <fibonacci_term@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
call   1040 <fibonacci_term@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"fibonacci %ld\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @fibonacci_term(i32 100)
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"fibonacci %ld\00"
define i32 @main() {
%1 = tail call i32 @fibonacci_term(i32 100)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void test(void) {
  do {
    do {
      volatile double a = 1.5, b;
      b = __builtin_rint(a);
    } while (0);
    do {
      volatile float a = 1.5, b;
      b = __builtin_rintf(a);
    } while (0);
    do {
      volatile long double a = 1.5, b;
      b = __builtin_rintl(a);
    } while (0);
  } while (0);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
jmp    113d <test+0xd>
movsd  0xebb(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <rint@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    115e <test+0x2e>
movss  0xea2(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
call   1050 <rintf@plt>
movss  %xmm0,-0x18(%rbp)
jmp    117f <test+0x4f>
flds   0xe83(%rip)
fstpt  -0x30(%rbp)
fldt   -0x30(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <rintl@plt>
fstpt  -0x40(%rbp)
jmp    119d <test+0x6d>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
sub    $0x38,%rsp
movabs $0x3ff8000000000000,%rax
mov    %rax,0x10(%rsp)
movsd  0x10(%rsp),%xmm0
call   1030 <rint@plt>
movsd  %xmm0,0x20(%rsp)
movl   $0x3fc00000,0x10(%rsp)
3f
movss  0x10(%rsp),%xmm0
call   1050 <rintf@plt>
movss  %xmm0,0x20(%rsp)
flds   0xe8d(%rip)
fstpt  0x10(%rsp)
fldt   0x10(%rsp)
fstpt  (%rsp)
call   1040 <rintl@plt>
fstpt  0x20(%rsp)
add    $0x38,%rsp
ret

LLVM IR (-O0):
define void @test() {
%1 = alloca double
%2 = alloca double
%3 = alloca float
%4 = alloca float
%5 = alloca x86_fp80
%6 = alloca x86_fp80
br label %7
7: ; preds = %0
br label %8
8: ; preds = %7
store volatile double 1.500000e+00, double* %1
%9 = load volatile double, double* %1
%10 = call double @llvm.rint.f64(double %9)
store volatile double %10, double* %2
br label %11
11: ; preds = %8
br label %12
12: ; preds = %11
store volatile float 1.500000e+00, float* %3
%13 = load volatile float, float* %3
%14 = call float @llvm.rint.f32(float %13)
store volatile float %14, float* %4
br label %15
15: ; preds = %12
br label %16
16: ; preds = %15
store volatile x86_fp80 0xK3FFFC000000000000000, x86_fp80* %5
%17 = load volatile x86_fp80, x86_fp80* %5
%18 = call x86_fp80 @llvm.rint.f80(x86_fp80 %17)
store volatile x86_fp80 %18, x86_fp80* %6
br label %19
19: ; preds = %16
br label %20
20: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @test() {
%1 = alloca double
%2 = alloca double
%3 = alloca float
%4 = alloca float
%5 = alloca x86_fp80
%6 = alloca x86_fp80
%7 = bitcast double* %1 to i8*
store volatile double 1.500000e+00, double* %1
%8 = bitcast double* %2 to i8*
%9 = load volatile double, double* %1
%10 = tail call double @llvm.rint.f64(double %9)
store volatile double %10, double* %2
%11 = bitcast float* %3 to i8*
store volatile float 1.500000e+00, float* %3
%12 = bitcast float* %4 to i8*
%13 = load volatile float, float* %3
%14 = tail call float @llvm.rint.f32(float %13)
store volatile float %14, float* %4
%15 = bitcast x86_fp80* %5 to i8*
store volatile x86_fp80 0xK3FFFC000000000000000, x86_fp80* %5
%16 = bitcast x86_fp80* %6 to i8*
%17 = load volatile x86_fp80, x86_fp80* %5
%18 = tail call x86_fp80 @llvm.rint.f80(x86_fp80 %17)
store volatile x86_fp80 %18, x86_fp80* %6
ret void
}
int prodotto_n(int a, int b) {
  int prodotto = a * b;
  return prodotto;
}


x86 assembly (clang, -O0):
<prodotto_n>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prodotto_n>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @prodotto_n(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @prodotto_n(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
int cmp_gt(int a, int b) { return a > b; }


x86 assembly (clang, -O0):
<cmp_gt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_gt>:
xor    %eax,%eax
cmp    %esi,%edi
setg   %al
ret

LLVM IR (-O0):
define i32 @cmp_gt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @cmp_gt(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int EXIT_FAILURE;
int EXIT_SUCCESS;
int /*<<< orphan*/ test_fail(char *);
int /*<<< orphan*/ test_pass(char *);
int test_calc_index_blocks(void) {
  if (0) {
    test_fail("Unit Test Part 1");
    return EXIT_FAILURE;
  } else {
    test_pass("Unit Test Part 1");
  }
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<test_calc_index_blocks>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <test_pass@plt>
mov    0x2eb9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_calc_index_blocks>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <test_pass@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Unit Test Part 1\00"
@EXIT_SUCCESS = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @test_calc_index_blocks() {
%1 = call i32 @test_pass(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}

LLVM IR (-O2):
@.str = [17 x i8] c"Unit Test Part 1\00"
@EXIT_SUCCESS = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @test_calc_index_blocks() {
%1 = tail call i32 @test_pass(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned int *, int);
void setU4(unsigned char *p, unsigned int u) { memcpy(p, &u, 4); }


x86 assembly (clang, -O0):
<setU4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setU4>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @setU4(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @memcpy(i8* %5, i32* %4, i32 4)
ret void
}

LLVM IR (-O2):
define void @setU4(i8* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
char *strrchr(char *, char);
void linux_find_basename(char *filename, char *basename) {
  char *basename_p = strrchr(filename, '/') + 1;
  int basename_length = strrchr(filename, '.') - basename_p;
  strncpy(basename, basename_p, basename_length);
}


x86 assembly (clang, -O0):
<linux_find_basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
mov    -0x18(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<linux_find_basename>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1040 <strrchr@plt>
lea    0x1(%rax),%r15
mov    %rbx,%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
sub    %r15d,%eax
mov    %r14,%rdi
mov    %r15,%rsi
mov    %eax,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define void @linux_find_basename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i8* @strrchr(i8* %7, i8 signext 47)
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %9, i8** %5
%10 = load i8*, i8** %3
%11 = call i8* @strrchr(i8* %10, i8 signext 46)
%12 = load i8*, i8** %5
%13 = ptrtoint i8* %11 to i64
%14 = ptrtoint i8* %12 to i64
%15 = sub i64 %13, %14
%16 = trunc i64 %15 to i32
store i32 %16, i32* %6
%17 = load i8*, i8** %4
%18 = load i8*, i8** %5
%19 = load i32, i32* %6
%20 = call i32 @strncpy(i8* %17, i8* %18, i32 %19)
ret void
}

LLVM IR (-O2):
define void @linux_find_basename(i8* %0, i8* %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
%6 = ptrtoint i8* %5 to i64
%7 = ptrtoint i8* %4 to i64
%8 = sub i64 %6, %7
%9 = trunc i64 %8 to i32
%10 = tail call i32 @strncpy(i8* %1, i8* %4, i32 %9)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct wl_resource {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ wl_resource_post_event(struct wl_resource *,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/);
void wl_keyboard_send_keymap(struct wl_resource *resource_, uint32_t format,
                             int32_t fd, uint32_t size) {
  wl_resource_post_event(resource_, 0, format, fd, size);
}


x86 assembly (clang, -O0):
<wl_keyboard_send_keymap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
xor    %esi,%esi
call   1030 <wl_resource_post_event@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_keyboard_send_keymap>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <wl_resource_post_event@plt>

LLVM IR (-O0):
%struct.wl_resource = type { i32 }
define void @wl_keyboard_send_keymap(%struct.wl_resource* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %struct.wl_resource*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.wl_resource* %0, %struct.wl_resource** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load %struct.wl_resource*, %struct.wl_resource** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @wl_resource_post_event(%struct.wl_resource* %9, i32 0, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
%struct.wl_resource = type { i32 }
define void @wl_keyboard_send_keymap(%struct.wl_resource* %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @wl_resource_post_event(%struct.wl_resource* %0, i32 0, i32 %1, i32 %2, i32 %3)
ret void
}
void RTUtf16ToLatin1ExTag(void) {}


x86 assembly (clang, -O0):
<RTUtf16ToLatin1ExTag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTUtf16ToLatin1ExTag>:
ret

LLVM IR (-O0):
define void @RTUtf16ToLatin1ExTag() {
ret void
}

LLVM IR (-O2):
define void @RTUtf16ToLatin1ExTag() {
ret void
}
char test_44_0(char *mem) { return __atomic_fetch_sub(mem + 0, 1, 4); }


x86 assembly (clang, -O0):
<test_44_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%al
neg    %al
lock xadd %al,(%rcx)
mov    %al,-0xa(%rbp)
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_44_0>:
mov    $0xff,%al
lock xadd %al,(%rdi)
ret

LLVM IR (-O0):
define signext i8 @test_44_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 0
store i8 1, i8* %3
%7 = load i8, i8* %3
%8 = atomicrmw sub i8* %6, i8 %7 acq_rel
store i8 %8, i8* %4
%9 = load i8, i8* %4
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @test_44_0(i8* nocapture %0) {
%2 = atomicrmw sub i8* %0, i8 1 acq_rel
ret i8 %2
}
void tex_disp_bar(double perct) {}


x86 assembly (clang, -O0):
<tex_disp_bar>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tex_disp_bar>:
ret

LLVM IR (-O0):
define void @tex_disp_bar(double %0) {
%2 = alloca double
store double %0, double* %2
ret void
}

LLVM IR (-O2):
define void @tex_disp_bar(double %0) {
ret void
}
void check_memory_gf_gconf_c(void) {}


x86 assembly (clang, -O0):
<check_memory_gf_gconf_c>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_memory_gf_gconf_c>:
ret

LLVM IR (-O0):
define void @check_memory_gf_gconf_c() {
ret void
}

LLVM IR (-O2):
define void @check_memory_gf_gconf_c() {
ret void
}
int is_romley(int vend, int prod) {
  if ((vend == 0x000157) && ((prod >= 0x0048) && (prod <= 0x005e)))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_romley>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x157,-0x8(%rbp)
jne    1137 <is_romley+0x37>
cmpl   $0x48,-0xc(%rbp)
jl     1137 <is_romley+0x37>
cmpl   $0x5e,-0xc(%rbp)
jg     1137 <is_romley+0x37>
movl   $0x1,-0x4(%rbp)
jmp    113e <is_romley+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_romley>:
cmp    $0x157,%edi
sete   %al
add    $0xffffffb8,%esi
cmp    $0x17,%esi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_romley(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 343
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 72
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %5
%13 = icmp sle i32 %12, 94
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %3
br label %16
15: ; preds = %11, %8, %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @is_romley(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 343
%4 = add i32 %1, -72
%5 = icmp ult i32 %4, 23
%6 = and i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
__attribute__((always_)) const struct exception_table_entry *
search_module_extables(unsigned long addr) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<search_module_extables>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_module_extables>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.exception_table_entry = type opaque
define %struct.exception_table_entry* @search_module_extables(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret %struct.exception_table_entry* null
}

LLVM IR (-O2):
%struct.exception_table_entry = type opaque
define noalias %struct.exception_table_entry* @search_module_extables(i64 %0) {
ret %struct.exception_table_entry* null
}
int is_native_utf8(void) { return 1; }


x86 assembly (clang, -O0):
<is_native_utf8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_native_utf8>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_native_utf8() {
ret i32 1
}

LLVM IR (-O2):
define i32 @is_native_utf8() {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ base58_encode_check(int /*<<< orphan*/ *, int, char *, int);
int /*<<< orphan*/ wallet_get_address_raw(int /*<<< orphan*/ const *,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/ *);
void wallet_get_address(const uint8_t *pub_key, uint8_t version, char *addr,
                        int addrsize) {
  uint8_t raw[21];
  wallet_get_address_raw(pub_key, version, raw);
  base58_encode_check(raw, 21, addr, addrsize);
}


x86 assembly (clang, -O0):
<wallet_get_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    -0x70(%rbp),%rdx
call   1030 <wallet_get_address_raw@plt>
lea    -0x70(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x15,%esi
call   1040 <base58_encode_check@plt>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wallet_get_address>:
push   %rbp
push   %r14
push   %rbx
sub    $0x60,%rsp
mov    %ecx,%ebp
mov    %rdx,%rbx
mov    %rsp,%r14
mov    %r14,%rdx
call   1030 <wallet_get_address_raw@plt>
mov    %r14,%rdi
mov    $0x15,%esi
mov    %rbx,%rdx
mov    %ebp,%ecx
call   1040 <base58_encode_check@plt>
add    $0x60,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @wallet_get_address(i32* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca [21 x i32]
store i32* %0, i32** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i32*, i32** %5
%11 = load i32, i32* %6
%12 = getelementptr inbounds [21 x i32], [21 x i32]* %9, i64 0, i64 0
%13 = call i32 @wallet_get_address_raw(i32* %10, i32 %11, i32* %12)
%14 = getelementptr inbounds [21 x i32], [21 x i32]* %9, i64 0, i64 0
%15 = load i8*, i8** %7
%16 = load i32, i32* %8
%17 = call i32 @base58_encode_check(i32* %14, i32 21, i8* %15, i32 %16)
ret void
}

LLVM IR (-O2):
define void @wallet_get_address(i32* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca [21 x i32]
%6 = bitcast [21 x i32]* %5 to i8*
%7 = getelementptr inbounds [21 x i32], [21 x i32]* %5, i64 0, i64 0
%8 = call i32 @wallet_get_address_raw(i32* %0, i32 %1, i32* %7)
%9 = call i32 @base58_encode_check(i32* %7, i32 21, i8* %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a, b;
  a = 5;
  b = 6;
  a += 5;
  a -= 5;
  a *= 5;
  a %= 2;
  printf("%d", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x5,%eax
mov    %eax,-0x8(%rbp)
imul   $0x5,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
store i32 6, i32* %3
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 5
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 5
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = mul nsw i32 %8, 5
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = srem i32 %10, 2
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 0
}
/* Type definitions */
struct cli_def {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cli_print(struct cli_def *, char *);
int idle_timeout(struct cli_def *cli) {
  cli_print(cli, "Custom idle timeout");
  return -2;
}


x86 assembly (clang, -O0):
<idle_timeout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <cli_print@plt>
mov    $0xfffffffe,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idle_timeout>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <cli_print@plt>
mov    $0xfffffffe,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.cli_def = type { i32 }
@.str = [20 x i8] c"Custom idle timeout\00"
define i32 @idle_timeout(%struct.cli_def* %0) {
%2 = alloca %struct.cli_def*
store %struct.cli_def* %0, %struct.cli_def** %2
%3 = load %struct.cli_def*, %struct.cli_def** %2
%4 = call i32 @cli_print(%struct.cli_def* %3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i32 -2
}

LLVM IR (-O2):
%struct.cli_def = type { i32 }
@.str = [20 x i8] c"Custom idle timeout\00"
define i32 @idle_timeout(%struct.cli_def* %0) {
%2 = tail call i32 @cli_print(%struct.cli_def* %0, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i32 -2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ *stdin;
int /*<<< orphan*/ *stdout;
int closeIODevice(FILE *fpDeviceName) {
  int iResult;
  if ((fpDeviceName == stdout) || (fpDeviceName == stdin)) {
    fflush(fpDeviceName);
    iResult = EOF;
  } else {
    iResult = fclose(fpDeviceName);
  }
  return iResult;
}


x86 assembly (clang, -O0):
<closeIODevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2e99(%rip),%rcx
cmp    (%rcx),%rax
je     1154 <closeIODevice+0x34>
mov    -0x8(%rbp),%rax
mov    0x2e9d(%rip),%rcx
cmp    (%rcx),%rax
jne    116e <closeIODevice+0x4e>
mov    -0x8(%rbp),%rdi
call   1040 <fflush@plt>
mov    0x2e7c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
jmp    117a <closeIODevice+0x5a>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<closeIODevice>:
push   %rax
mov    0x2ea8(%rip),%rax
cmp    %rdi,(%rax)
je     113f <closeIODevice+0x1f>
mov    0x2eb4(%rip),%rax
cmp    %rdi,(%rax)
je     113f <closeIODevice+0x1f>
pop    %rax
jmp    1030 <fclose@plt>
call   1040 <fflush@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32* null
@stdin = global i32* null
@EOF = global i32 0
define i32 @closeIODevice(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32*, i32** @stdout
%6 = icmp eq i32* %4, %5
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i32*, i32** %2
%9 = load i32*, i32** @stdin
%10 = icmp eq i32* %8, %9
br i1 %10, label %11, label %15
11: ; preds = %7, %1
%12 = load i32*, i32** %2
%13 = call i32 @fflush(i32* %12)
%14 = load i32, i32* @EOF
store i32 %14, i32* %3
br label %18
15: ; preds = %7
%16 = load i32*, i32** %2
%17 = call i32 @fclose(i32* %16)
store i32 %17, i32* %3
br label %18
18: ; preds = %15, %11
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@stdout = global i32* null
@stdin = global i32* null
@EOF = global i32 0
define i32 @closeIODevice(i32* nocapture %0) {
%2 = load i32*, i32** @stdout
%3 = icmp eq i32* %2, %0
%4 = load i32*, i32** @stdin
%5 = icmp eq i32* %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = tail call i32 @fflush(i32* %0)
%9 = load i32, i32* @EOF
br label %12
10: ; preds = %1
%11 = tail call i32 @fclose(i32* %0)
br label %12
12: ; preds = %10, %7
%13 = phi i32 [ %9, %7 ], [ %11, %10 ]
ret i32 %13
}
void fn0000000140001938() { return; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @fn0000000140001938() {
ret void
}

LLVM IR (-O2):
define void @fn0000000140001938() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int powercap_sysfs_zone_exists(char *, int /*<<< orphan*/ *, int);
int rapl_sysfs_pkg_exists(uint32_t zone) {
  return powercap_sysfs_zone_exists("intel-rapl", &zone, 1);
}


x86 assembly (clang, -O0):
<rapl_sysfs_pkg_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x1,%edx
call   1030 <powercap_sysfs_zone_exists@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rapl_sysfs_pkg_exists>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0xee4(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <powercap_sysfs_zone_exists@plt>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"intel-rapl\00"
define i32 @rapl_sysfs_pkg_exists(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @powercap_sysfs_zone_exists(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32* %2, i32 1)
ret i32 %3
}

LLVM IR (-O2):
@.str = [11 x i8] c"intel-rapl\00"
define i32 @rapl_sysfs_pkg_exists(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @powercap_sysfs_zone_exists(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32* %2, i32 1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ translate_C1(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ translate_T(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void translate_C(FILE *src, FILE *out) {
  translate_T(src, out);
  translate_C1(src, out);
}


x86 assembly (clang, -O0):
<translate_C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <translate_T@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <translate_C1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<translate_C>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <translate_T@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <translate_C1@plt>

LLVM IR (-O0):
define void @translate_C(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @translate_T(i32* %5, i32* %6)
%8 = load i32*, i32** %3
%9 = load i32*, i32** %4
%10 = call i32 @translate_C1(i32* %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @translate_C(i32* %0, i32* %1) {
%3 = tail call i32 @translate_T(i32* %0, i32* %1)
%4 = tail call i32 @translate_C1(i32* %0, i32* %1)
ret void
}
/* Variables and functions */
int alignof(int /*<<< orphan*/);
int /*<<< orphan*/ intmax_t;
size_t osrndsz(const size_t siz) {
  return (siz + alignof(intmax_t) - 1) & ~(alignof(intmax_t) - 1);
}


x86 assembly (clang, -O0):
<osrndsz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1030 <alignof@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
sub    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
call   1030 <alignof@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
sub    $0x1,%ecx
xor    $0xffffffff,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osrndsz>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ec2(%rip),%r14
mov    (%r14),%edi
call   1030 <alignof@plt>
cltq
add    %rax,%rbx
add    $0xffffffffffffffff,%rbx
mov    (%r14),%edi
call   1030 <alignof@plt>
neg    %eax
cltq
and    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@intmax_t = global i32 0
define i64 @osrndsz(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i32, i32* @intmax_t
%5 = call i32 @alignof(i32 %4)
%6 = sext i32 %5 to i64
%7 = add i64 %3, %6
%8 = sub i64 %7, 1
%9 = load i32, i32* @intmax_t
%10 = call i32 @alignof(i32 %9)
%11 = sub nsw i32 %10, 1
%12 = xor i32 %11, -1
%13 = sext i32 %12 to i64
%14 = and i64 %8, %13
ret i64 %14
}

LLVM IR (-O2):
@intmax_t = global i32 0
define i64 @osrndsz(i64 %0) {
%2 = load i32, i32* @intmax_t
%3 = tail call i32 @alignof(i32 %2)
%4 = sext i32 %3 to i64
%5 = add i64 %0, -1
%6 = add i64 %5, %4
%7 = load i32, i32* @intmax_t
%8 = tail call i32 @alignof(i32 %7)
%9 = sub i32 0, %8
%10 = sext i32 %9 to i64
%11 = and i64 %6, %10
ret i64 %11
}
void ptrace_sandbox_permit_close(struct pt_sandbox *p_sandbox) {
  (void)p_sandbox;
}


x86 assembly (clang, -O0):
<ptrace_sandbox_permit_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_sandbox_permit_close>:
ret

LLVM IR (-O0):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_close(%struct.pt_sandbox* %0) {
%2 = alloca %struct.pt_sandbox*
store %struct.pt_sandbox* %0, %struct.pt_sandbox** %2
%3 = load %struct.pt_sandbox*, %struct.pt_sandbox** %2
ret void
}

LLVM IR (-O2):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_close(%struct.pt_sandbox* nocapture %0) {
ret void
}
const int omp_get_num_procs() { return 1; }


x86 assembly (clang, -O0):
<omp_get_num_procs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omp_get_num_procs>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @omp_get_num_procs() {
ret i32 1
}

LLVM IR (-O2):
define i32 @omp_get_num_procs() {
ret i32 1
}
/* Variables and functions */
int GetInt(unsigned char const *);
int GetNativeInt(const unsigned char *foo) { return GetInt(foo); }


x86 assembly (clang, -O0):
<GetNativeInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetInt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetNativeInt>:
jmp    1030 <GetInt@plt>

LLVM IR (-O0):
define i32 @GetNativeInt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @GetInt(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @GetNativeInt(i8* %0) {
%2 = tail call i32 @GetInt(i8* %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ isspace(unsigned int);
char *skipb(const char *s) {
  for (; isspace((unsigned)*s); s++)
    ;
  if (*s == '\0')
    return NULL;
  return (char *)s;
}


x86 assembly (clang, -O0):
<skipb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1148 <skipb+0x38>
jmp    1137 <skipb+0x27>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <skipb+0xc>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1165 <skipb+0x55>
movq   $0x0,-0x8(%rbp)
jmp    116d <skipb+0x5d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipb>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <skipb+0x10>
xor    %eax,%eax
cmpb   $0x0,(%rbx)
cmovne %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skipb(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = call i64 @isspace(i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
br label %11
11: ; preds = %10
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
br label %4
14: ; preds = %4
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i8* null, i8** %2
br label %22
20: ; preds = %14
%21 = load i8*, i8** %3
store i8* %21, i8** %2
br label %22
22: ; preds = %20, %19
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @skipb(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %8, %2 ]
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = tail call i64 @isspace(i32 %5)
%7 = icmp eq i64 %6, 0
%8 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %7, label %9, label %2
9: ; preds = %2
%10 = load i8, i8* %3
%11 = icmp eq i8 %10, 0
%12 = select i1 %11, i8* null, i8* %3
ret i8* %12
}
/* Type definitions */
struct _varint {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct _varint *);
void VARINT_free(struct _varint *p_varint) { free(p_varint); }


x86 assembly (clang, -O0):
<VARINT_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VARINT_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct._varint = type { i32 }
define void @VARINT_free(%struct._varint* %0) {
%2 = alloca %struct._varint*
store %struct._varint* %0, %struct._varint** %2
%3 = load %struct._varint*, %struct._varint** %2
%4 = call i32 @free(%struct._varint* %3)
ret void
}

LLVM IR (-O2):
%struct._varint = type { i32 }
define void @VARINT_free(%struct._varint* nocapture %0) {
%2 = tail call i32 @free(%struct._varint* %0)
ret void
}
int main(void) {
  int x;
  int y;
  if (x)
    if (y)
      x = 4711;
    else
      x = 42;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1137 <main+0x37>
cmpl   $0x0,-0xc(%rbp)
je     112b <main+0x2b>
movl   $0x1267,-0x8(%rbp)
jmp    1132 <main+0x32>
movl   $0x2a,-0x8(%rbp)
jmp    1137 <main+0x37>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %0
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 4711, i32* %2
br label %11
10: ; preds = %6
store i32 42, i32* %2
br label %11
11: ; preds = %10, %9
br label %12
12: ; preds = %11, %0
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int test_ais_14(void) {
  fprintf(stderr, "test_ais_14() failed: Not Written\n");
  return 0;
}


x86 assembly (clang, -O0):
<test_ais_14>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ais_14>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [35 x i8] c"test_ais_14() failed: Not Written\0A\00"
define i32 @test_ais_14() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [35 x i8] c"test_ais_14() failed: Not Written\0A\00"
define i32 @test_ais_14() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void LedsP$Led1$toggle(void) { NoPinC$0$GeneralIO$toggle(); }


x86 assembly (clang, -O0):
<LedsP$Led1$toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NoPinC$0$GeneralIO$toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP$Led1$toggle>:
xor    %eax,%eax
jmp    1030 <NoPinC$0$GeneralIO$toggle@plt>

LLVM IR (-O0):
define void @"LedsP$Led1$toggle"() {
%1 = call i32 (...) @"NoPinC$0$GeneralIO$toggle"()
ret void
}

LLVM IR (-O2):
define void @"LedsP$Led1$toggle"() {
%1 = tail call i32 (...) @"NoPinC$0$GeneralIO$toggle"()
ret void
}
void *f11(void *arg) { return arg; }


x86 assembly (clang, -O0):
<f11>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f11>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @f11(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @f11(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int posix_memalign(void **, size_t, size_t);
int bt_memalign_alloc(void **ptr, size_t alignment, size_t size) {
  int ret_code;
  ret_code = posix_memalign(ptr, alignment, size);
  if (*ptr || !size)
    return 0;
  return ret_code;
}


x86 assembly (clang, -O0):
<bt_memalign_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <posix_memalign@plt>
mov    %eax,-0x24(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1151 <bt_memalign_alloc+0x41>
cmpq   $0x0,-0x20(%rbp)
jne    115d <bt_memalign_alloc+0x4d>
movl   $0x0,-0x4(%rbp)
jmp    1163 <bt_memalign_alloc+0x53>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bt_memalign_alloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <posix_memalign@plt>
xor    %ecx,%ecx
cmpq   $0x0,(%rbx)
cmovne %ecx,%eax
test   %r14,%r14
cmove  %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @bt_memalign_alloc(i8** %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32
store i8** %0, i8*** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i8**, i8*** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = call i32 @posix_memalign(i8** %9, i64 %10, i64 %11)
store i32 %12, i32* %8
%13 = load i8**, i8*** %5
%14 = load i8*, i8** %13
%15 = icmp ne i8* %14, null
br i1 %15, label %19, label %16
16: ; preds = %3
%17 = load i64, i64* %7
%18 = icmp ne i64 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %16, %3
store i32 0, i32* %4
br label %22
20: ; preds = %16
%21 = load i32, i32* %8
store i32 %21, i32* %4
br label %22
22: ; preds = %20, %19
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @bt_memalign_alloc(i8** %0, i64 %1, i64 %2) {
%4 = tail call i32 @posix_memalign(i8** %0, i64 %1, i64 %2)
%5 = load i8*, i8** %0
%6 = icmp eq i8* %5, null
%7 = icmp ne i64 %2, 0
%8 = and i1 %7, %6
%9 = select i1 %8, i32 %4, i32 0
ret i32 %9
}
int hello3if(int a, int b, int c) {
  if (a < 0)
    a = -a;
  if (b < 0)
    b = -b;
  if (c == 3)
    c++;
  return a + b + c;
}


x86 assembly (clang, -O0):
<hello3if>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111f <hello3if+0x1f>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1131 <hello3if+0x31>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3,-0xc(%rbp)
jne    1144 <hello3if+0x44>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello3if>:
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
mov    %esi,%eax
neg    %eax
cmovs  %esi,%eax
cmp    $0x3,%edx
mov    $0x4,%esi
cmovne %edx,%esi
add    %ecx,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @hello3if(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %4
%11 = sub nsw i32 0, %10
store i32 %11, i32* %4
br label %12
12: ; preds = %9, %3
%13 = load i32, i32* %5
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %5
%17 = sub nsw i32 0, %16
store i32 %17, i32* %5
br label %18
18: ; preds = %15, %12
%19 = load i32, i32* %6
%20 = icmp eq i32 %19, 3
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 1
store i32 %23, i32* %6
br label %24
24: ; preds = %21, %18
%25 = load i32, i32* %4
%26 = load i32, i32* %5
%27 = add nsw i32 %25, %26
%28 = load i32, i32* %6
%29 = add nsw i32 %27, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @hello3if(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%5 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%6 = icmp eq i32 %2, 3
%7 = select i1 %6, i32 4, i32 %2
%8 = add nuw nsw i32 %5, %4
%9 = add nsw i32 %8, %7
ret i32 %9
}
double Kelvin(double Temp) { return Temp + 273.15; }


x86 assembly (clang, -O0):
<Kelvin>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kelvin>:
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Kelvin(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 2.731500e+02
ret double %4
}

LLVM IR (-O2):
define double @Kelvin(double %0) {
%2 = fadd double %0, 2.731500e+02
ret double %2
}