xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, int *);
int /*<<< orphan*/ strncpy(char *, char *, int);
int parse_hex(char *line, int bytes) {
  char snum[200];
  int num;
  strncpy(snum, line, bytes);
  snum[bytes] = '\0';
  sscanf(snum, "%X", &num);
  return num;
}


x86 assembly (clang, -O0):
<parse_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0xf0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0xe0(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <strncpy@plt>
movslq -0xc(%rbp),%rax
movb   $0x0,-0xe0(%rbp,%rax,1)
lea    -0xe0(%rbp),%rdi
lea    0xea1(%rip),%rsi
lea    -0xe4(%rbp),%rdx
call   1040 <sscanf@plt>
mov    -0xe4(%rbp),%eax
add    $0xf0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_hex>:
push   %r14
push   %rbx
sub    $0xd8,%rsp
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0x10(%rsp),%r14
mov    %r14,%rdi
mov    %ebx,%edx
call   1030 <strncpy@plt>
movslq %ebx,%rax
movb   $0x0,0x10(%rsp,%rax,1)
lea    0xeb3(%rip),%rsi
lea    0xc(%rsp),%rdx
mov    %r14,%rdi
call   1040 <sscanf@plt>
mov    0xc(%rsp),%eax
add    $0xd8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%X\00"
define i32 @parse_hex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [200 x i8]
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @strncpy(i8* %7, i8* %8, i32 %9)
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 %12
store i8 0, i8* %13
%14 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%15 = call i32 @sscanf(i8* %14, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
%16 = load i32, i32* %6
ret i32 %16
}

LLVM IR (-O2):
@.str = [3 x i8] c"%X\00"
define i32 @parse_hex(i8* %0, i32 %1) {
%3 = alloca [200 x i8]
%4 = alloca i32
%5 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%6 = bitcast i32* %4 to i8*
%7 = call i32 @strncpy(i8* %5, i8* %0, i32 %1)
%8 = sext i32 %1 to i64
%9 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 %8
store i8 0, i8* %9
%10 = call i32 @sscanf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %4)
%11 = load i32, i32* %4
ret i32 %11
}
int test_imm_61uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x61 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_61uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x61,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_61uint64_highword_reg>:
movabs $0x6100000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_61uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 97
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_61uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 416611827712
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct stat {
  long st_size;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fileno(int /*<<< orphan*/ *);
scalar_t__ fstat(int /*<<< orphan*/, struct stat *);
long filesize(FILE *fp) {
  struct stat buf;
  if (!fp)
    return -1;
  if (fstat(fileno(fp), &buf))
    return -1;
  return buf.st_size;
}


x86 assembly (clang, -O0):
<filesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <filesize+0x24>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1177 <filesize+0x57>
mov    -0x10(%rbp),%rdi
call   1030 <fileno@plt>
mov    %eax,%edi
lea    -0x18(%rbp),%rsi
call   1040 <fstat@plt>
cmp    $0x0,%rax
je     116f <filesize+0x4f>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1177 <filesize+0x57>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesize>:
push   %rbx
sub    $0x10,%rsp
mov    $0xffffffffffffffff,%rbx
test   %rdi,%rdi
je     114c <filesize+0x2c>
call   1030 <fileno@plt>
lea    0x8(%rsp),%rsi
mov    %eax,%edi
call   1040 <fstat@plt>
test   %rax,%rax
jne    114c <filesize+0x2c>
mov    0x8(%rsp),%rbx
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i64 @filesize(i32* %0) {
%2 = alloca i64
%3 = alloca i32*
%4 = alloca %struct.stat
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i64 -1, i64* %2
br label %17
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = call i32 @fileno(i32* %9)
%11 = call i64 @fstat(i32 %10, %struct.stat* %4)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
store i64 -1, i64* %2
br label %17
14: ; preds = %8
%15 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%16 = load i64, i64* %15
store i64 %16, i64* %2
br label %17
17: ; preds = %14, %13, %7
%18 = load i64, i64* %2
ret i64 %18
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i64 @filesize(i32* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = icmp eq i32* %0, null
br i1 %4, label %12, label %5
5: ; preds = %1
%6 = tail call i32 @fileno(i32* %0)
%7 = call i64 @fstat(i32 %6, %struct.stat* %2)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%11 = load i64, i64* %10
br label %12
12: ; preds = %5, %1, %9
%13 = phi i64 [ %11, %9 ], [ -1, %1 ], [ -1, %5 ]
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ DrawBMP228();
void drawbmp() { DrawBMP228(); }


x86 assembly (clang, -O0):
<drawbmp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DrawBMP228@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawbmp>:
xor    %eax,%eax
jmp    1030 <DrawBMP228@plt>

LLVM IR (-O0):
define void @drawbmp() {
%1 = call i32 (...) @DrawBMP228()
ret void
}

LLVM IR (-O2):
define void @drawbmp() {
%1 = tail call i32 (...) @DrawBMP228()
ret void
}
void ptr_swap(void *a, void *b) {
  void **aa = a, **bb = b, *tmp;
  tmp = *bb;
  *bb = *aa;
  *aa = tmp;
}


x86 assembly (clang, -O0):
<ptr_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_swap>:
mov    (%rsi),%rax
mov    (%rdi),%rcx
mov    %rcx,(%rsi)
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @ptr_swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i8**
store i8** %9, i8*** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
store i8** %11, i8*** %6
%12 = load i8**, i8*** %6
%13 = load i8*, i8** %12
store i8* %13, i8** %7
%14 = load i8**, i8*** %5
%15 = load i8*, i8** %14
%16 = load i8**, i8*** %6
store i8* %15, i8** %16
%17 = load i8*, i8** %7
%18 = load i8**, i8*** %5
store i8* %17, i8** %18
ret void
}

LLVM IR (-O2):
define void @ptr_swap(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %4
store i8* %5, i8** %3
ret void
}
/* Type definitions */
struct robust_list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __NR_get_robust_list;
long syscall(int /*<<< orphan*/, int, struct robust_list_head **, size_t *);
long __get_robust_list(int pid, struct robust_list_head **lhp, size_t *len) {
  return syscall(__NR_get_robust_list, pid, lhp, len);
}


x86 assembly (clang, -O0):
<__get_robust_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_robust_list>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.robust_list_head = type { i32 }
@__NR_get_robust_list = global i32 0
define i64 @__get_robust_list(i32 %0, %struct.robust_list_head** %1, i64* %2) {
%4 = alloca i32
%5 = alloca %struct.robust_list_head**
%6 = alloca i64*
store i32 %0, i32* %4
store %struct.robust_list_head** %1, %struct.robust_list_head*** %5
store i64* %2, i64** %6
%7 = load i32, i32* @__NR_get_robust_list
%8 = load i32, i32* %4
%9 = load %struct.robust_list_head**, %struct.robust_list_head*** %5
%10 = load i64*, i64** %6
%11 = call i64 @syscall(i32 %7, i32 %8, %struct.robust_list_head** %9, i64* %10)
ret i64 %11
}

LLVM IR (-O2):
%struct.robust_list_head = type { i32 }
@__NR_get_robust_list = global i32 0
define i64 @__get_robust_list(i32 %0, %struct.robust_list_head** %1, i64* %2) {
%4 = load i32, i32* @__NR_get_robust_list
%5 = tail call i64 @syscall(i32 %4, i32 %0, %struct.robust_list_head** %1, i64* %2)
ret i64 %5
}
double vlength(double *v) {
  return sqrt(((v[0]) * (v[0])) + ((v[1]) * (v[1])) + ((v[2]) * (v[2])));
}


x86 assembly (clang, -O0):
<vlength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlength>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1141 <vlength+0x31>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @vlength(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
%24 = call double @sqrt(double %23)
ret double %24
}

LLVM IR (-O2):
define double @vlength(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
%10 = tail call double @sqrt(double %9)
ret double %10
}
__attribute__((no)) int eee() {
  int ans;
  asm("eee_label: .globl eee_label");
  ans = fff() + 1;
  asm("eee_label2: .globl eee_label2");
  return ans;
}


x86 assembly (clang, -O0):
<eee>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp

x86 assembly (clang, -O2):
<eee>:
push   %rax

LLVM IR (-O0):
define i32 @eee() {
%1 = alloca i32
%2 = call i32 (...) @fff()
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @eee() {
tail call void asm sideeffect "eee_label: .globl eee_label", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (...) @fff()
%2 = add nsw i32 %1, 1
tail call void asm sideeffect "eee_label2: .globl eee_label2", "~{dirflag},~{fpsr},~{flags}"()
ret i32 %2
}
int __rot13_char(int ch) {
  int b;
  return ((b = 64 ^ ch & 223) && b < 27 ? ch & 96 | (b + 12) % 26 + 1 : ch);
}


x86 assembly (clang, -O0):
<__rot13_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xdf,%eax
xor    $0x40,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     114f <__rot13_char+0x4f>
cmpl   $0x1b,-0x8(%rbp)
jge    114f <__rot13_char+0x4f>
mov    -0x4(%rbp),%eax
and    $0x60,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xc,%eax
mov    $0x1a,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
add    $0x1,%edx
or     %edx,%eax
mov    %eax,-0xc(%rbp)
jmp    1155 <__rot13_char+0x55>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__rot13_char>:
mov    %edi,%eax
mov    %edi,%ecx
and    $0xdf,%ecx
xor    $0x40,%ecx
lea    -0x1(%rcx),%edx
cmp    $0x19,%edx
ja     1137 <__rot13_char+0x37>
and    $0x60,%eax
add    $0xc,%cl
movzbl %cl,%ecx
imul   $0x4f,%ecx,%edx
shr    $0xb,%edx
lea    (%rdx,%rdx,4),%esi
lea    (%rsi,%rsi,4),%esi
add    %edx,%esi
sub    %sil,%cl
add    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__rot13_char(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 223
%6 = xor i32 64, %5
store i32 %6, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 27
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %2
%13 = and i32 %12, 96
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 12
%16 = srem i32 %15, 26
%17 = add nsw i32 %16, 1
%18 = or i32 %13, %17
br label %21
19: ; preds = %8, %1
%20 = load i32, i32* %2
br label %21
21: ; preds = %19, %11
%22 = phi i32 [ %18, %11 ], [ %20, %19 ]
ret i32 %22
}

LLVM IR (-O2):
define i32 @__rot13_char(i32 %0) {
%2 = and i32 %0, 223
%3 = xor i32 %2, 64
%4 = add nsw i32 %3, -1
%5 = icmp ult i32 %4, 26
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = and i32 %0, 96
%8 = trunc i32 %3 to i8
%9 = add nuw nsw i8 %8, 12
%10 = urem i8 %9, 26
%11 = add nuw nsw i8 %10, 1
%12 = zext i8 %11 to i32
%13 = or i32 %7, %12
br label %14
14: ; preds = %1, %6
%15 = phi i32 [ %13, %6 ], [ %0, %1 ]
ret i32 %15
}
unsigned int sqr(unsigned int item, void *data) {
  item = item * item;
  return 0;
}


x86 assembly (clang, -O0):
<sqr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sqr(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = mul i32 %5, %6
store i32 %7, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @sqr(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_memory_alloc();
int main(void) {
  test_memory_alloc();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_memory_alloc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_memory_alloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_memory_alloc()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_memory_alloc()
ret i32 0
}
void __attribute__((no)) HEX00_jsonInit(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @HEX00_jsonInit() {
ret void
}

LLVM IR (-O2):
define void @HEX00_jsonInit() {
ret void
}
void misra_5_2_function_hides_var_31y(void) {}


x86 assembly (clang, -O0):
<misra_5_2_function_hides_var_31y>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<misra_5_2_function_hides_var_31y>:
ret

LLVM IR (-O0):
define void @misra_5_2_function_hides_var_31y() {
ret void
}

LLVM IR (-O2):
define void @misra_5_2_function_hides_var_31y() {
ret void
}
/* Variables and functions */
int send(int, void *, int, int /*<<< orphan*/);
int strlen(char *);
int idrnet_send(int sockfd, char *data) {
  int len = strlen(data);
  return send(sockfd, (void *)data, len, 0);
}


x86 assembly (clang, -O0):
<idrnet_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1040 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idrnet_send>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <send@plt>

LLVM IR (-O0):
define i32 @idrnet_send(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = call i32 @send(i32 %8, i8* %9, i32 %10, i32 0)
ret i32 %11
}

LLVM IR (-O2):
define i32 @idrnet_send(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @send(i32 %0, i8* %1, i32 %3, i32 0)
ret i32 %4
}
/* Variables and functions */
int PATH_MAX;
int /*<<< orphan*/ sprintf(char *, char *, char const *);
int test_file(char *);
int lv_exists(const char *lv) {
  char dev[PATH_MAX];
  sprintf(dev, "/dev/store/%s", lv);
  return test_file(dev);
}


x86 assembly (clang, -O0):
<lv_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x20(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xe9d(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x20(%rbp),%rdi
call   1030 <test_file@plt>
mov    -0x10(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lv_exists>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
push   %rax
mov    %rdi,%rdx
mov    0x2ec0(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
lea    0xeb6(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <test_file@plt>
lea    -0x8(%rbp),%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@PATH_MAX = global i32 0
@.str = [14 x i8] c"/dev/store/%s\00"
define i32 @lv_exists(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i32, i32* @PATH_MAX
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = alloca i8, i64 %6
store i64 %6, i64* %4
%9 = load i8*, i8** %2
%10 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = call i32 @test_file(i8* %8)
%12 = load i8*, i8** %3
ret i32 %11
}

LLVM IR (-O2):
@PATH_MAX = global i32 0
@.str = [14 x i8] c"/dev/store/%s\00"
define i32 @lv_exists(i8* %0) {
%2 = load i32, i32* @PATH_MAX
%3 = zext i32 %2 to i64
%4 = alloca i8, i64 %3
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
%6 = call i32 @test_file(i8* %4)
ret i32 %6
}
/* Variables and functions */
int __flsll(long);
__attribute__((always_)) int __flsl(long value) { return __flsll(value); }


x86 assembly (clang, -O0):
<__flsl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__flsll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__flsl>:
jmp    1030 <__flsll@plt>

LLVM IR (-O0):
define i32 @__flsl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @__flsll(i64 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__flsl(i64 %0) {
%2 = tail call i32 @__flsll(i64 %0)
ret i32 %2
}
int page_cow_file(struct page *oldpage, struct page *newpage) { return 0; }


x86 assembly (clang, -O0):
<page_cow_file>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<page_cow_file>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.page = type opaque
define i32 @page_cow_file(%struct.page* %0, %struct.page* %1) {
%3 = alloca %struct.page*
%4 = alloca %struct.page*
store %struct.page* %0, %struct.page** %3
store %struct.page* %1, %struct.page** %4
ret i32 0
}

LLVM IR (-O2):
%struct.page = type opaque
define i32 @page_cow_file(%struct.page* nocapture readnone %0, %struct.page* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int);
void sprint_num(char *s, int i) {
  snprintf(s, 3, "%d", i);
  s[3] = '\0';
}


x86 assembly (clang, -O0):
<sprint_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x3,%esi
lea    0xece(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x8(%rbp),%rax
movb   $0x0,0x3(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_num>:
push   %rbx
mov    %esi,%ecx
mov    %rdi,%rbx
lea    0xee3(%rip),%rdx
mov    $0x3,%esi
call   1030 <snprintf@plt>
movb   $0x0,0x3(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @sprint_num(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @snprintf(i8* %5, i32 3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 3
store i8 0, i8* %9
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @sprint_num(i8* %0, i32 %1) {
%3 = tail call i32 @snprintf(i8* %0, i32 3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
%4 = getelementptr inbounds i8, i8* %0, i64 3
store i8 0, i8* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ saa7114_read_reg(int, unsigned char *);
int /*<<< orphan*/ saa7114_write_reg(int, unsigned char);
int saa7114_set_decoder_vbi_enable(int enable) {
  unsigned char data;
  saa7114_read_reg(0x86, &data);
  if (enable)
    data |= 0x80;
  else
    data &= ~0x80;
  saa7114_write_reg(0x86, data);
  return 0;
}


x86 assembly (clang, -O0):
<saa7114_set_decoder_vbi_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x86,%edi
lea    -0x5(%rbp),%rsi
call   1040 <saa7114_read_reg@plt>
cmpl   $0x0,-0x4(%rbp)
je     1154 <saa7114_set_decoder_vbi_enable+0x34>
movzbl -0x5(%rbp),%eax
or     $0x80,%eax
mov    %al,-0x5(%rbp)
jmp    1160 <saa7114_set_decoder_vbi_enable+0x40>
movzbl -0x5(%rbp),%eax
and    $0xffffff7f,%eax
mov    %al,-0x5(%rbp)
mov    $0x86,%edi
movzbl -0x5(%rbp),%esi
call   1030 <saa7114_write_reg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<saa7114_set_decoder_vbi_enable>:
push   %rbx
sub    $0x10,%rsp
test   %edi,%edi
setne  %bl
lea    0xf(%rsp),%rsi
mov    $0x86,%edi
call   1040 <saa7114_read_reg@plt>
mov    0xf(%rsp),%al
and    $0x7f,%al
shl    $0x7,%bl
or     %al,%bl
mov    %bl,0xf(%rsp)
movzbl %bl,%esi
mov    $0x86,%edi
call   1030 <saa7114_write_reg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @saa7114_set_decoder_vbi_enable(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = call i32 @saa7114_read_reg(i32 134, i8* %3)
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = or i32 %9, 128
%11 = trunc i32 %10 to i8
store i8 %11, i8* %3
br label %17
12: ; preds = %1
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = and i32 %14, -129
%16 = trunc i32 %15 to i8
store i8 %16, i8* %3
br label %17
17: ; preds = %12, %7
%18 = load i8, i8* %3
%19 = call i32 @saa7114_write_reg(i32 134, i8 zeroext %18)
ret i32 0
}

LLVM IR (-O2):
define i32 @saa7114_set_decoder_vbi_enable(i32 %0) {
%2 = alloca i8
%3 = call i32 @saa7114_read_reg(i32 134, i8* %2)
%4 = icmp eq i32 %0, 0
%5 = load i8, i8* %2
%6 = and i8 %5, 127
%7 = select i1 %4, i8 0, i8 -128
%8 = or i8 %6, %7
store i8 %8, i8* %2
%9 = call i32 @saa7114_write_reg(i32 134, i8 zeroext %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, unsigned int, long, unsigned long,
                          long long, unsigned long long);
int main() {
  int a = 12345;
  unsigned b = 123456;
  long c = 1234567;
  unsigned long d = 12345678;
  long long e = 1234567891011;
  unsigned long long f = 123456789101112;
  printf("int a = %d\n"
         "unsigned b = %u\n"
         "long c = %ld\n"
         "unsigned long d = %lu\n"
         "long long e = %lld\n"
         "unsigned long long f = %llu\n",
         a, b, c, d, e, f);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3039,-0x8(%rbp)
movl   $0x1e240,-0xc(%rbp)
movq   $0x12d687,-0x18(%rbp)
movq   $0xbc614e,-0x20(%rbp)
movabs $0x11f71fb0843,%rax
mov    %rax,-0x28(%rbp)
movabs $0x7048860f3a38,%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    -0x30(%rbp),%rax
lea    0xe8a(%rip),%rdi
mov    %rax,(%rsp)
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movabs $0x7048860f3a38,%rax
mov    %rax,(%rsp)
lea    0xeda(%rip),%rdi
movabs $0x11f71fb0843,%r9
mov    $0x12d687,%ecx
mov    $0xbc614e,%r8d
mov    $0x3039,%esi
mov    $0x1e240,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [110 x i8] c"int a = %d\0Aunsigned b = %u\0Along c = %ld\0Aunsigned long d = %lu\0Along long e = %lld\0Aunsigned long long f = %llu\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i32 0, i32* %1
store i32 12345, i32* %2
store i32 123456, i32* %3
store i64 1234567, i64* %4
store i64 12345678, i64* %5
store i64 1234567891011, i64* %6
store i64 123456789101112, i64* %7
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = load i64, i64* %4
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = call i32 @printf(i8* getelementptr inbounds ([110 x i8], [110 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9, i64 %10, i64 %11, i64 %12, i64 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [110 x i8] c"int a = %d\0Aunsigned b = %u\0Along c = %ld\0Aunsigned long d = %lu\0Along long e = %lld\0Aunsigned long long f = %llu\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([110 x i8], [110 x i8]* @.str, i64 0, i64 0), i32 12345, i32 123456, i64 1234567, i64 12345678, i64 1234567891011, i64 123456789101112)
ret i32 0
}
int test_imm_1Auint32_mem(unsigned int *val) {
  return ((*val) & (0x1A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Auint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x1a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Auint32_mem>:
testb  $0x1a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Auint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 26
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Auint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 26
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int ioctl(int, int, void *);
int real_ioctl(int fd, int request, void *arg) {
  return ioctl(fd, request, arg);
}


x86 assembly (clang, -O0):
<real_ioctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<real_ioctl>:
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
define i32 @real_ioctl(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @ioctl(i32 %7, i32 %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @real_ioctl(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @ioctl(i32 %0, i32 %1, i8* %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ merge(unsigned char *, unsigned int, unsigned int);
void sortm(unsigned char *buf, unsigned n) {
  if (n < 2)
    return;
  unsigned nl = n / 2 + n % 2;
  unsigned nr = n - nl;
  sortm(buf, nl);
  sortm(buf + nl, nr);
  merge(buf, nl, nr);
}


x86 assembly (clang, -O0):
<sortm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jae    113e <sortm+0x1e>
jmp    1185 <sortm+0x65>
mov    -0xc(%rbp),%eax
shr    $0x1,%eax
mov    -0xc(%rbp),%ecx
and    $0x1,%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <sortm@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%eax
add    %rax,%rdi
mov    -0x14(%rbp),%esi
call   1030 <sortm@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortm>:
cmp    $0x1,%esi
ja     1126 <sortm+0x6>
ret
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%eax
shr    %eax
mov    %esi,%ebx
and    $0x1,%ebx
add    %eax,%ebx
sub    %ebx,%ebp
mov    %ebx,%esi
call   1030 <sortm@plt>
lea    (%rbx,%r14,1),%rdi
mov    %ebp,%esi
call   1030 <sortm@plt>
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <merge@plt>

LLVM IR (-O0):
define void @sortm(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = icmp ult i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %2
br label %30
10: ; preds = %2
%11 = load i32, i32* %4
%12 = udiv i32 %11, 2
%13 = load i32, i32* %4
%14 = urem i32 %13, 2
%15 = add i32 %12, %14
store i32 %15, i32* %5
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = sub i32 %16, %17
store i32 %18, i32* %6
%19 = load i8*, i8** %3
%20 = load i32, i32* %5
%21 = load i8*, i8** %3
%22 = load i32, i32* %5
%23 = zext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i32, i32* %6
%26 = load i8*, i8** %3
%27 = load i32, i32* %5
%28 = load i32, i32* %6
%29 = call i32 @merge(i8* %26, i32 %27, i32 %28)
br label %30
30: ; preds = %10, %9
ret void
}

LLVM IR (-O2):
define void @sortm(i8* %0, i32 %1) {
%3 = icmp ult i32 %1, 2
br i1 %3, label %4, label %5
4: ; preds = %2, %5
ret void
5: ; preds = %2
%6 = lshr i32 %1, 1
%7 = and i32 %1, 1
%8 = add nuw i32 %6, %7
%9 = sub i32 %1, %8
tail call void @sortm(i8* %0, i32 %8)
%10 = zext i32 %8 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
tail call void @sortm(i8* %11, i32 %9)
%12 = tail call i32 @merge(i8* %0, i32 %8, i32 %9)
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ SIGKILL;
int kill(int, int /*<<< orphan*/);
extern int sys_kill(int pid) { return kill(pid, SIGKILL); }


x86 assembly (clang, -O0):
<sys_kill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_kill>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <kill@plt>

LLVM IR (-O0):
@SIGKILL = global i32 0
define i32 @sys_kill(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGKILL
%5 = call i32 @kill(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@SIGKILL = global i32 0
define i32 @sys_kill(i32 %0) {
%2 = load i32, i32* @SIGKILL
%3 = tail call i32 @kill(i32 %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _buffer_check_size(char **, size_t *, char **);
int _buffer_delta_byte(char **buffer, size_t *allocated, char **cursor,
                       char delta) {
  if (!_buffer_check_size(buffer, allocated, cursor)) {
    return 0;
  }
  **cursor += delta;
  return 1;
}


x86 assembly (clang, -O0):
<_buffer_delta_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %cl,%al
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %al,-0x21(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <_buffer_check_size@plt>
cmp    $0x0,%eax
jne    114f <_buffer_delta_byte+0x3f>
movl   $0x0,-0x4(%rbp)
jmp    1168 <_buffer_delta_byte+0x58>
movsbl -0x21(%rbp),%edx
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_buffer_delta_byte>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
call   1030 <_buffer_check_size@plt>
test   %eax,%eax
je     112e <_buffer_delta_byte+0x1e>
mov    (%rbx),%rax
add    %bpl,(%rax)
mov    $0x1,%eax
jmp    1130 <_buffer_delta_byte+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_buffer_delta_byte(i8** %0, i64* %1, i8** %2, i8 signext %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i64*
%8 = alloca i8**
%9 = alloca i8
store i8** %0, i8*** %6
store i64* %1, i64** %7
store i8** %2, i8*** %8
store i8 %3, i8* %9
%10 = load i8**, i8*** %6
%11 = load i64*, i64** %7
%12 = load i8**, i8*** %8
%13 = call i32 @_buffer_check_size(i8** %10, i64* %11, i8** %12)
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %4
store i32 0, i32* %5
br label %25
16: ; preds = %4
%17 = load i8, i8* %9
%18 = sext i8 %17 to i32
%19 = load i8**, i8*** %8
%20 = load i8*, i8** %19
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = add nsw i32 %22, %18
%24 = trunc i32 %23 to i8
store i8 %24, i8* %20
store i32 1, i32* %5
br label %25
25: ; preds = %16, %15
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @_buffer_delta_byte(i8** %0, i64* %1, i8** %2, i8 signext %3) {
%5 = tail call i32 @_buffer_check_size(i8** %0, i64* %1, i8** %2)
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = add i8 %9, %3
store i8 %10, i8* %8
br label %11
11: ; preds = %4, %7
%12 = phi i32 [ 1, %7 ], [ 0, %4 ]
ret i32 %12
}
/* Variables and functions */
int f138(int *);
int f139(int *p) { return f138(p); }


x86 assembly (clang, -O0):
<f139>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f138@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f139>:
jmp    1030 <f138@plt>

LLVM IR (-O0):
define i32 @f139(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f138(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f139(i32* %0) {
%2 = tail call i32 @f138(i32* %0)
ret i32 %2
}
short is_base64(const char c) {
  if ((c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z') ||
      (c >= '0' && c <= '9') || c == '+' || c == '/' || c == '=')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_base64>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x3(%rbp)
movsbl -0x3(%rbp),%eax
cmp    $0x41,%eax
jl     1124 <is_base64+0x24>
movsbl -0x3(%rbp),%eax
cmp    $0x5a,%eax
jle    117f <is_base64+0x7f>
movsbl -0x3(%rbp),%eax
cmp    $0x61,%eax
jl     113e <is_base64+0x3e>
movsbl -0x3(%rbp),%eax
cmp    $0x7a,%eax
jle    117f <is_base64+0x7f>
movsbl -0x3(%rbp),%eax
cmp    $0x30,%eax
jl     1158 <is_base64+0x58>
movsbl -0x3(%rbp),%eax
cmp    $0x39,%eax
jle    117f <is_base64+0x7f>
movsbl -0x3(%rbp),%eax
cmp    $0x2b,%eax
je     117f <is_base64+0x7f>
movsbl -0x3(%rbp),%eax
cmp    $0x2f,%eax
je     117f <is_base64+0x7f>
movsbl -0x3(%rbp),%eax
cmp    $0x3d,%eax
jne    118a <is_base64+0x8a>
movw   $0x1,-0x2(%rbp)
jmp    1190 <is_base64+0x90>
movw   $0x0,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_base64>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
lea    -0x2f(%rdi),%ecx
cmp    $0xb,%cl
setb   %cl
or     %al,%cl
cmp    $0x3d,%dil
sete   %al
cmp    $0x2b,%dil
sete   %dl
or     %al,%dl
or     %cl,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define signext i16 @is_base64(i8 signext %0) {
%2 = alloca i16
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %39, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 122
br i1 %18, label %39, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 48
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 57
br i1 %26, label %39, label %27
27: ; preds = %23, %19
%28 = load i8, i8* %3
%29 = sext i8 %28 to i32
%30 = icmp eq i32 %29, 43
br i1 %30, label %39, label %31
31: ; preds = %27
%32 = load i8, i8* %3
%33 = sext i8 %32 to i32
%34 = icmp eq i32 %33, 47
br i1 %34, label %39, label %35
35: ; preds = %31
%36 = load i8, i8* %3
%37 = sext i8 %36 to i32
%38 = icmp eq i32 %37, 61
br i1 %38, label %39, label %40
39: ; preds = %35, %31, %27, %23, %15, %7
store i16 1, i16* %2
br label %41
40: ; preds = %35
store i16 0, i16* %2
br label %41
41: ; preds = %40, %39
%42 = load i16, i16* %2
ret i16 %42
}

LLVM IR (-O2):
define signext i16 @is_base64(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -47
%6 = icmp ult i8 %5, 11
%7 = or i1 %6, %4
%8 = icmp eq i8 %0, 61
%9 = icmp eq i8 %0, 43
%10 = or i1 %8, %9
%11 = or i1 %10, %7
%12 = zext i1 %11 to i16
ret i16 %12
}
unsigned g(unsigned x, unsigned y) { return ~x & (y | x); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x8(%rbp),%ecx
or     -0x4(%rbp),%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %edi,%eax
not    %eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = xor i32 %5, -1
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = or i32 %7, %8
%10 = and i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1) {
%3 = xor i32 %0, -1
%4 = and i32 %3, %1
ret i32 %4
}
int avearge(int x, int y, int z) {
  int av;
  av = (x + y + z) / 3;
  return av;
}


x86 assembly (clang, -O0):
<avearge>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<avearge>:
add    %esi,%edi
add    %edx,%edi
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @avearge(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = add nsw i32 %8, %9
%11 = load i32, i32* %6
%12 = add nsw i32 %10, %11
%13 = sdiv i32 %12, 3
store i32 %13, i32* %7
%14 = load i32, i32* %7
ret i32 %14
}

LLVM IR (-O2):
define i32 @avearge(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
%6 = sdiv i32 %5, 3
ret i32 %6
}
/* Type definitions */
struct leaf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ leaf_last(struct leaf *, int /*<<< orphan*/ *,
                             int /*<<< orphan*/ *, void **, unsigned long *);
void *leaf_address_end(struct leaf *leaf) {
  void *address;
  unsigned long size;
  leaf_last(leaf, NULL, NULL, &address, &size);
  return address + size;
}


x86 assembly (clang, -O0):
<leaf_address_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%edx
lea    -0x10(%rbp),%rcx
lea    -0x18(%rbp),%r8
mov    %rdx,%rsi
call   1030 <leaf_last@plt>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<leaf_address_end>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rcx
lea    0x8(%rsp),%r8
xor    %esi,%esi
xor    %edx,%edx
call   1030 <leaf_last@plt>
mov    0x10(%rsp),%rax
add    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.leaf = type { i32 }
define i8* @leaf_address_end(%struct.leaf* %0) {
%2 = alloca %struct.leaf*
%3 = alloca i8*
%4 = alloca i64
store %struct.leaf* %0, %struct.leaf** %2
%5 = load %struct.leaf*, %struct.leaf** %2
%6 = call i32 @leaf_last(%struct.leaf* %5, i32* null, i32* null, i8** %3, i64* %4)
%7 = load i8*, i8** %3
%8 = load i64, i64* %4
%9 = getelementptr i8, i8* %7, i64 %8
ret i8* %9
}

LLVM IR (-O2):
%struct.leaf = type { i32 }
define i8* @leaf_address_end(%struct.leaf* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = bitcast i8** %2 to i8*
%5 = bitcast i64* %3 to i8*
%6 = call i32 @leaf_last(%struct.leaf* %0, i32* null, i32* null, i8** %2, i64* %3)
%7 = load i8*, i8** %2
%8 = load i64, i64* %3
%9 = getelementptr i8, i8* %7, i64 %8
ret i8* %9
}
void RTAvloHCPhysRemoveBestFit(void) {}


x86 assembly (clang, -O0):
<RTAvloHCPhysRemoveBestFit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvloHCPhysRemoveBestFit>:
ret

LLVM IR (-O0):
define void @RTAvloHCPhysRemoveBestFit() {
ret void
}

LLVM IR (-O2):
define void @RTAvloHCPhysRemoveBestFit() {
ret void
}
unsigned long long unsignedlonglong_ignoring_longlong(unsigned long long x,
                                                      long long y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlonglong_ignoring_longlong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlonglong_ignoring_longlong>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlonglong_ignoring_longlong(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlonglong_ignoring_longlong(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void __configure_tx_address(uint32_t addr) {
  uint32_t prefix0 = (*(volatile uint32_t *)(0x524 + (0x40001000)));
  prefix0 &= 0xFFFFFF00;
  prefix0 |= (addr >> 24);
  uint32_t base0 = addr << 8;
  (*(volatile uint32_t *)(0x51C + (0x40001000))) = base0;
  (*(volatile uint32_t *)(0x524 + (0x40001000))) = prefix0;
  (*(volatile uint32_t *)(0x52C + (0x40001000))) = 0;
}


x86 assembly (clang, -O0):
<__configure_tx_address>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x40001524,%eax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffffff00,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x4000151c,%eax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0x40001524,%eax
mov    %ecx,(%rax)
mov    $0x4000152c,%eax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__configure_tx_address>:
mov    $0xffffff00,%eax
and    0x40001524,%eax
mov    %edi,%ecx
sar    $0x18,%ecx
or     %eax,%ecx
shl    $0x8,%edi
mov    %edi,0x4000151c
mov    %ecx,0x40001524
movl   $0x0,0x4000152c
ret

LLVM IR (-O0):
define void @__configure_tx_address(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load volatile i32, i32* inttoptr (i64 1073747236 to i32*)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, -256
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = ashr i32 %8, 24
%10 = load i32, i32* %3
%11 = or i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = shl i32 %12, 8
store i32 %13, i32* %4
%14 = load i32, i32* %4
store volatile i32 %14, i32* inttoptr (i64 1073747228 to i32*)
%15 = load i32, i32* %3
store volatile i32 %15, i32* inttoptr (i64 1073747236 to i32*)
store volatile i32 0, i32* inttoptr (i64 1073747244 to i32*)
ret void
}

LLVM IR (-O2):
define void @__configure_tx_address(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 1073747236 to i32*)
%3 = and i32 %2, -256
%4 = ashr i32 %0, 24
%5 = or i32 %3, %4
%6 = shl i32 %0, 8
store volatile i32 %6, i32* inttoptr (i64 1073747228 to i32*)
store volatile i32 %5, i32* inttoptr (i64 1073747236 to i32*)
store volatile i32 0, i32* inttoptr (i64 1073747244 to i32*)
ret void
}
int uff_ask_exempt(int idx) { return 1; }


x86 assembly (clang, -O0):
<uff_ask_exempt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uff_ask_exempt>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @uff_ask_exempt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @uff_ask_exempt(i32 %0) {
ret i32 1
}
int HT_Compare(const void *Key1, const void *Key2) {
  return (int)*(const unsigned *)Key1 - (int)*(const unsigned *)Key2;
}


x86 assembly (clang, -O0):
<HT_Compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HT_Compare>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @HT_Compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @HT_Compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}