xunge/DecIR huggingface dataset:
unsigned long LPCStatusGet(unsigned long ulBase, unsigned long *pulCount,
                           unsigned long *pulPoolSize) {
  unsigned long ulStatus;
  ;
  ulStatus = (*((volatile unsigned long *)(ulBase + 0x00000004)));
  if (pulCount) {
    *pulCount = (((ulStatus & 0x00700000) >> 20) + 1);
  }
  if (pulPoolSize) {
    *pulPoolSize = (((ulStatus & 0x00070000) >> 16) * 256);
  }
  return (ulStatus);
}


x86 assembly (clang, -O0):
<LPCStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1141 <LPCStatusGet+0x41>
mov    -0x20(%rbp),%rcx
and    $0x700000,%rcx
shr    $0x14,%rcx
add    $0x1,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1166 <LPCStatusGet+0x66>
mov    -0x20(%rbp),%rcx
and    $0x70000,%rcx
shr    $0x10,%rcx
shl    $0x8,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCStatusGet>:
mov    0x4(%rdi),%rax
test   %rsi,%rsi
je     1118 <LPCStatusGet+0x18>
mov    %eax,%ecx
shr    $0x14,%ecx
and    $0x7,%ecx
add    $0x1,%rcx
mov    %rcx,(%rsi)
test   %rdx,%rdx
je     112d <LPCStatusGet+0x2d>
mov    %rax,%rcx
shr    $0x8,%rcx
and    $0x700,%ecx
mov    %rcx,(%rdx)
ret

LLVM IR (-O0):
define i64 @LPCStatusGet(i64 %0, i64* %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%8 = load i64, i64* %4
%9 = add i64 %8, 4
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
store i64 %11, i64* %7
%12 = load i64*, i64** %5
%13 = icmp ne i64* %12, null
br i1 %13, label %14, label %20
14: ; preds = %3
%15 = load i64, i64* %7
%16 = and i64 %15, 7340032
%17 = lshr i64 %16, 20
%18 = add i64 %17, 1
%19 = load i64*, i64** %5
store i64 %18, i64* %19
br label %20
20: ; preds = %14, %3
%21 = load i64*, i64** %6
%22 = icmp ne i64* %21, null
br i1 %22, label %23, label %29
23: ; preds = %20
%24 = load i64, i64* %7
%25 = and i64 %24, 458752
%26 = lshr i64 %25, 16
%27 = mul i64 %26, 256
%28 = load i64*, i64** %6
store i64 %27, i64* %28
br label %29
29: ; preds = %23, %20
%30 = load i64, i64* %7
ret i64 %30
}

LLVM IR (-O2):
define i64 @LPCStatusGet(i64 %0, i64* writeonly %1, i64* writeonly %2) {
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = icmp eq i64* %1, null
br i1 %7, label %12, label %8
8: ; preds = %3
%9 = lshr i64 %6, 20
%10 = and i64 %9, 7
%11 = add nuw nsw i64 %10, 1
store i64 %11, i64* %1
br label %12
12: ; preds = %8, %3
%13 = icmp eq i64* %2, null
br i1 %13, label %17, label %14
14: ; preds = %12
%15 = lshr i64 %6, 8
%16 = and i64 %15, 1792
store i64 %16, i64* %2
br label %17
17: ; preds = %14, %12
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ SYS_dup2;
int syscall_2(int /*<<< orphan*/, int, int);
int dup2(int oldfd, int newfd) { return syscall_2(SYS_dup2, oldfd, newfd); }


x86 assembly (clang, -O0):
<dup2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <syscall_2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup2>:
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall_2@plt>

LLVM IR (-O0):
@SYS_dup2 = global i32 0
define i32 @dup2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @SYS_dup2
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @syscall_2(i32 %5, i32 %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@SYS_dup2 = global i32 0
define i32 @dup2(i32 %0, i32 %1) {
%3 = load i32, i32* @SYS_dup2
%4 = tail call i32 @syscall_2(i32 %3, i32 %0, i32 %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ memset(double *, int /*<<< orphan*/, int);
void doubles_mat44_identity(double out[16]) {
  memset(out, 0, 16 * sizeof(double));
  out[0] = 1;
  out[5] = 1;
  out[10] = 1;
  out[15] = 1;
}


x86 assembly (clang, -O0):
<doubles_mat44_identity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x80,%edx
call   1030 <memset@plt>
mov    -0x8(%rbp),%rax
movsd  0xec8(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0xeb8(%rip),%xmm0
movsd  %xmm0,0x28(%rax)
mov    -0x8(%rbp),%rax
movsd  0xea7(%rip),%xmm0
movsd  %xmm0,0x50(%rax)
mov    -0x8(%rbp),%rax
movsd  0xe96(%rip),%xmm0
movsd  %xmm0,0x78(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubles_mat44_identity>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x80,%edx
call   1030 <memset@plt>
movabs $0x3ff0000000000000,%rax
mov    %rax,(%rbx)
mov    %rax,0x28(%rbx)
mov    %rax,0x50(%rbx)
mov    %rax,0x78(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @doubles_mat44_identity(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @memset(double* %3, i32 0, i32 128)
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 0
store double 1.000000e+00, double* %6
%7 = load double*, double** %2
%8 = getelementptr inbounds double, double* %7, i64 5
store double 1.000000e+00, double* %8
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 10
store double 1.000000e+00, double* %10
%11 = load double*, double** %2
%12 = getelementptr inbounds double, double* %11, i64 15
store double 1.000000e+00, double* %12
ret void
}

LLVM IR (-O2):
define void @doubles_mat44_identity(double* %0) {
%2 = tail call i32 @memset(double* %0, i32 0, i32 128)
store double 1.000000e+00, double* %0
%3 = getelementptr inbounds double, double* %0, i64 5
store double 1.000000e+00, double* %3
%4 = getelementptr inbounds double, double* %0, i64 10
store double 1.000000e+00, double* %4
%5 = getelementptr inbounds double, double* %0, i64 15
store double 1.000000e+00, double* %5
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ SysCtlDelay(int);
void LCDClockReset(uint32_t ui32Base, uint32_t ui32Clocks) {
  ;

  ;
  (*((volatile uint32_t *)(0x44050000 + 0x70))) = ui32Clocks;
  SysCtlDelay(10);
  (*((volatile uint32_t *)(0x44050000 + 0x70))) = 0x00000000;
  SysCtlDelay(10);
}


x86 assembly (clang, -O0):
<LCDClockReset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x44050070,%eax
mov    %ecx,(%rax)
mov    $0xa,%edi
call   1030 <SysCtlDelay@plt>
mov    $0x44050070,%eax
movl   $0x0,(%rax)
mov    $0xa,%edi
call   1030 <SysCtlDelay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDClockReset>:
push   %rax
mov    %esi,0x44050070
mov    $0xa,%edi
call   1030 <SysCtlDelay@plt>
movl   $0x0,0x44050070
mov    $0xa,%edi
pop    %rax
jmp    1030 <SysCtlDelay@plt>

LLVM IR (-O0):
define void @LCDClockReset(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
store volatile i32 %5, i32* inttoptr (i64 1141178480 to i32*)
%6 = call i32 @SysCtlDelay(i32 10)
store volatile i32 0, i32* inttoptr (i64 1141178480 to i32*)
%7 = call i32 @SysCtlDelay(i32 10)
ret void
}

LLVM IR (-O2):
define void @LCDClockReset(i32 %0, i32 %1) {
store volatile i32 %1, i32* inttoptr (i64 1141178480 to i32*)
%3 = tail call i32 @SysCtlDelay(i32 10)
store volatile i32 0, i32* inttoptr (i64 1141178480 to i32*)
%4 = tail call i32 @SysCtlDelay(i32 10)
ret void
}
long double test_powl(long double x, long double y) {
  return __builtin_powl(x, y);
}


x86 assembly (clang, -O0):
<test_powl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <powl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_powl>:
jmp    1030 <powl@plt>

LLVM IR (-O0):
define x86_fp80 @test_powl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call x86_fp80 @powl(x86_fp80 %5, x86_fp80 %6)
ret x86_fp80 %7
}

LLVM IR (-O2):
define x86_fp80 @test_powl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call x86_fp80 @powl(x86_fp80 %0, x86_fp80 %1)
ret x86_fp80 %3
}
void reb_integrator_ias15_synchronize(struct reb_simulation *r) {}


x86 assembly (clang, -O0):
<reb_integrator_ias15_synchronize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reb_integrator_ias15_synchronize>:
ret

LLVM IR (-O0):
%struct.reb_simulation = type opaque
define void @reb_integrator_ias15_synchronize(%struct.reb_simulation* %0) {
%2 = alloca %struct.reb_simulation*
store %struct.reb_simulation* %0, %struct.reb_simulation** %2
ret void
}

LLVM IR (-O2):
%struct.reb_simulation = type opaque
define void @reb_integrator_ias15_synchronize(%struct.reb_simulation* nocapture %0) {
ret void
}
/* Variables and functions */
size_t TF_max(size_t a, size_t b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<TF_max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1127 <TF_max+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <TF_max+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TF_max>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmova  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @TF_max(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ugt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @TF_max(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
int instrsize(unsigned int oparg) {
  return oparg <= 0xff ? 1 : oparg <= 0xffff ? 2 : oparg <= 0xffffff ? 3 : 4;
}


x86 assembly (clang, -O0):
<instrsize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xff,-0x4(%rbp)
ja     1121 <instrsize+0x21>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    115a <instrsize+0x5a>
cmpl   $0xffff,-0x4(%rbp)
ja     113b <instrsize+0x3b>
mov    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1154 <instrsize+0x54>
mov    -0x4(%rbp),%edx
mov    $0x4,%eax
mov    $0x3,%ecx
cmp    $0xffffff,%edx
cmovbe %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<instrsize>:
mov    $0x1,%eax
cmp    $0x100,%edi
jb     1128 <instrsize+0x28>
mov    $0x2,%eax
cmp    $0x10000,%edi
jb     1128 <instrsize+0x28>
cmp    $0x1000000,%edi
mov    $0x4,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @instrsize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ule i32 %3, 255
br i1 %4, label %5, label %6
5: ; preds = %1
br label %17
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp ule i32 %7, 65535
br i1 %8, label %9, label %10
9: ; preds = %6
br label %15
10: ; preds = %6
%11 = load i32, i32* %2
%12 = icmp ule i32 %11, 16777215
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 3, i32 4
br label %15
15: ; preds = %10, %9
%16 = phi i32 [ 2, %9 ], [ %14, %10 ]
br label %17
17: ; preds = %15, %5
%18 = phi i32 [ 1, %5 ], [ %16, %15 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @instrsize(i32 %0) {
%2 = icmp ult i32 %0, 256
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 65536
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 16777216
%7 = select i1 %6, i32 3, i32 4
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 1, %1 ], [ %7, %5 ], [ 2, %3 ]
ret i32 %9
}
void tcp_syn(struct Ferret *ferret, struct NetFrame *frame) {
  ferret = (ferret);
  frame = (frame);
}


x86 assembly (clang, -O0):
<tcp_syn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_syn>:
ret

LLVM IR (-O0):
%struct.Ferret = type opaque
%struct.NetFrame = type opaque
define void @tcp_syn(%struct.Ferret* %0, %struct.NetFrame* %1) {
%3 = alloca %struct.Ferret*
%4 = alloca %struct.NetFrame*
store %struct.Ferret* %0, %struct.Ferret** %3
store %struct.NetFrame* %1, %struct.NetFrame** %4
%5 = load %struct.Ferret*, %struct.Ferret** %3
store %struct.Ferret* %5, %struct.Ferret** %3
%6 = load %struct.NetFrame*, %struct.NetFrame** %4
store %struct.NetFrame* %6, %struct.NetFrame** %4
ret void
}

LLVM IR (-O2):
%struct.Ferret = type opaque
%struct.NetFrame = type opaque
define void @tcp_syn(%struct.Ferret* nocapture %0, %struct.NetFrame* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void easycharts_output_home_link(void) {
  printf("<br><p>For more information, visit the <a "
         "href=\"http://objectplanet.com/easycharts\" target=_new>Easycharts "
         "Home Page.</a>");
}


x86 assembly (clang, -O0):
<easycharts_output_home_link>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<easycharts_output_home_link>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [122 x i8] c"<br><p>For more information, visit the <a href=\22http://objectplanet.com/easycharts\22 target=_new>Easycharts Home Page.</a>\00"
define void @easycharts_output_home_link() {
%1 = call i32 @printf(i8* getelementptr inbounds ([122 x i8], [122 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [122 x i8] c"<br><p>For more information, visit the <a href=\22http://objectplanet.com/easycharts\22 target=_new>Easycharts Home Page.</a>\00"
define void @easycharts_output_home_link() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([122 x i8], [122 x i8]* @.str, i64 0, i64 0))
ret void
}
float FloatLimit(float input, float lower_limit, float upper_limit) {
  if (input < lower_limit)
    return lower_limit;
  else if (input > upper_limit)
    return upper_limit;
  else
    return input;
}


x86 assembly (clang, -O0):
<FloatLimit>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <FloatLimit+0x35>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <FloatLimit+0x5d>
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1153 <FloatLimit+0x53>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <FloatLimit+0x5d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FloatLimit>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @FloatLimit(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = load float, float* %6
%10 = fcmp olt float %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load float, float* %6
store float %12, float* %4
br label %21
13: ; preds = %3
%14 = load float, float* %5
%15 = load float, float* %7
%16 = fcmp ogt float %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load float, float* %7
store float %18, float* %4
br label %21
19: ; preds = %13
%20 = load float, float* %5
store float %20, float* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load float, float* %4
ret float %22
}

LLVM IR (-O2):
define float @FloatLimit(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ waitms(int);
int /*<<< orphan*/ write(int, unsigned char *, int);
void serialWrite(int fd, unsigned char _byte) {
  unsigned char c[1];
  c[0] = _byte;
  write(fd, c, 1);
  waitms(10);
  return;
}


x86 assembly (clang, -O0):
<serialWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0x6(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x6(%rbp),%rsi
mov    $0x1,%edx
call   1040 <write@plt>
mov    $0xa,%edi
call   1030 <waitms@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialWrite>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1040 <write@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <waitms@plt>

LLVM IR (-O0):
define void @serialWrite(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca [1 x i8]
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
store i8 %6, i8* %7
%8 = load i32, i32* %3
%9 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
%10 = call i32 @write(i32 %8, i8* %9, i32 1)
%11 = call i32 @waitms(i32 10)
ret void
}

LLVM IR (-O2):
define void @serialWrite(i32 %0, i8 zeroext %1) {
%3 = alloca [1 x i8]
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = call i32 @write(i32 %0, i8* %4, i32 1)
%6 = tail call i32 @waitms(i32 10)
ret void
}
void zeroStringArr(char **stringArr, int numElements) {
  int i = 0;
  for (i; i < numElements; i++) {
    *(stringArr + i) = (char *)0;
  }
}


x86 assembly (clang, -O0):
<zeroStringArr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <zeroStringArr+0x3c>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <zeroStringArr+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zeroStringArr>:
test   %esi,%esi
jle    1126 <zeroStringArr+0x16>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @zeroStringArr(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %5
br label %7
7: ; preds = %16, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i8**, i8*** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
store i8* null, i8** %15
br label %16
16: ; preds = %11
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %7
19: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @zeroStringArr(i8** nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast i8** %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 3
br label %8
8: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef unsigned char const int32_t;

/* Variables and functions */
int32_t read_s24le(const char *buf) {
  const unsigned char *b = (const unsigned char *)buf;
  return b[0] | (b[1] << 8) | (((const signed char *)buf)[2] << 16);
}


x86 assembly (clang, -O0):
<read_s24le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_s24le>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @read_s24le(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = or i32 %8, %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 2
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = shl i32 %18, 16
%20 = or i32 %14, %19
%21 = trunc i32 %20 to i8
ret i8 %21
}

LLVM IR (-O2):
define zeroext i8 @read_s24le(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
/* Variables and functions */
int mt_genrand64_int64();
double mt_genrand64_real1(void) {
  return (mt_genrand64_int64() >> 11) * (1.0 / 9007199254740991.0);
}


x86 assembly (clang, -O0):
<mt_genrand64_real1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mt_genrand64_int64@plt>
sar    $0xb,%eax
cvtsi2sd %eax,%xmm0
movsd  0xed6(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_genrand64_real1>:
push   %rax
xor    %eax,%eax
call   1030 <mt_genrand64_int64@plt>
sar    $0xb,%eax
cvtsi2sd %eax,%xmm0
mulsd  0xed9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @mt_genrand64_real1() {
%1 = call i32 (...) @mt_genrand64_int64()
%2 = ashr i32 %1, 11
%3 = sitofp i32 %2 to double
%4 = fmul double %3, 0x3CA0000000000001
ret double %4
}

LLVM IR (-O2):
define double @mt_genrand64_real1() {
%1 = tail call i32 (...) @mt_genrand64_int64()
%2 = ashr i32 %1, 11
%3 = sitofp i32 %2 to double
%4 = fmul double %3, 0x3CA0000000000001
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ RDP(char *);
int /*<<< orphan*/ RDP_E(char *);
void uc6_rdphalf_1() {
  RDP("uc6:rdphalf_1\n");
  RDP_E("uc6:rdphalf_1\n");
}


x86 assembly (clang, -O0):
<uc6_rdphalf_1>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <RDP@plt>
lea    0xec9(%rip),%rdi
call   1030 <RDP_E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uc6_rdphalf_1>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
call   1040 <RDP@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <RDP_E@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"uc6:rdphalf_1\0A\00"
define void @uc6_rdphalf_1() {
%1 = call i32 @RDP(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @RDP_E(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"uc6:rdphalf_1\0A\00"
define void @uc6_rdphalf_1() {
%1 = tail call i32 @RDP(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @RDP_E(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
void reverse(int *data, int n) {
  int *lo = &data[0], *hi = &data[n];
  for (; lo < hi; ++lo, --hi) {
    int tmp = *lo;
    *lo = *hi;
    *hi = tmp;
  }
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    116f <reverse+0x6f>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x24(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0xfffffffffffffffc,%rax
mov    %rax,-0x20(%rbp)
jmp    1126 <reverse+0x26>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
test   %esi,%esi
jle    112a <reverse+0x2a>
mov    %esi,%eax
lea    (%rdi,%rax,4),%rax
add    $0xfffffffffffffffc,%rax
xchg   %ax,%ax
mov    (%rdi),%ecx
mov    0x4(%rax),%edx
mov    %edx,(%rdi)
mov    %ecx,0x4(%rax)
add    $0x4,%rdi
lea    -0x4(%rax),%rcx
cmp    %rax,%rdi
mov    %rcx,%rax
jb     1110 <reverse+0x10>
ret

LLVM IR (-O0):
define void @reverse(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32* %9, i32** %5
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
store i32* %13, i32** %6
br label %14
14: ; preds = %26, %2
%15 = load i32*, i32** %5
%16 = load i32*, i32** %6
%17 = icmp ult i32* %15, %16
br i1 %17, label %18, label %31
18: ; preds = %14
%19 = load i32*, i32** %5
%20 = load i32, i32* %19
store i32 %20, i32* %7
%21 = load i32*, i32** %6
%22 = load i32, i32* %21
%23 = load i32*, i32** %5
store i32 %22, i32* %23
%24 = load i32, i32* %7
%25 = load i32*, i32** %6
store i32 %24, i32* %25
br label %26
26: ; preds = %18
%27 = load i32*, i32** %5
%28 = getelementptr inbounds i32, i32* %27, i32 1
store i32* %28, i32** %5
%29 = load i32*, i32** %6
%30 = getelementptr inbounds i32, i32* %29, i32 -1
store i32* %30, i32** %6
br label %14
31: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @reverse(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
br label %7
7: ; preds = %4, %7
%8 = phi i32* [ %12, %7 ], [ %0, %4 ]
%9 = phi i32* [ %13, %7 ], [ %6, %4 ]
%10 = load i32, i32* %8
%11 = load i32, i32* %9
store i32 %11, i32* %8
store i32 %10, i32* %9
%12 = getelementptr inbounds i32, i32* %8, i64 1
%13 = getelementptr inbounds i32, i32* %9, i64 -1
%14 = icmp ult i32* %12, %13
br i1 %14, label %7, label %15
15: ; preds = %7, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ServeSpacerTable(void) {
  printf("<table border=\"0\" cellspacing=\"0\" cellpadding=\"0\" "
         "width=\"760\"\n");
  printf("<tr><td align=\"center\">&nbsp;</td></tr>\n");
  printf("</table>\n");
}


x86 assembly (clang, -O0):
<ServeSpacerTable>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf18(%rip),%rdi
call   1030 <printf@plt>
lea    0xf35(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ServeSpacerTable>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1a(%rip),%rdi
call   1030 <puts@plt>
lea    0xf36(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [63 x i8] c"<table border=\220\22 cellspacing=\220\22 cellpadding=\220\22 width=\22760\22\0A\00"
@.str.1 = [41 x i8] c"<tr><td align=\22center\22>&nbsp;</td></tr>\0A\00"
@.str.2 = [10 x i8] c"</table>\0A\00"
define void @ServeSpacerTable() {
%1 = call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [62 x i8] c"<table border=\220\22 cellspacing=\220\22 cellpadding=\220\22 width=\22760\22\00"
@str.3 = [40 x i8] c"<tr><td align=\22center\22>&nbsp;</td></tr>\00"
@str.4 = [9 x i8] c"</table>\00"
define void @ServeSpacerTable() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([62 x i8], [62 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ applicationRelease();
int /*<<< orphan*/ exit(int);
void exitWithError(int errorCode) {
  applicationRelease();
  exit(errorCode);
}


x86 assembly (clang, -O0):
<exitWithError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <applicationRelease@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exitWithError>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <applicationRelease@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @exitWithError(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @applicationRelease()
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
define void @exitWithError(i32 %0) {
%2 = tail call i32 (...) @applicationRelease()
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
double rd(void) { return (double)rand() / RAND_MAX * 20 - 10; }


x86 assembly (clang, -O0):
<rd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
divsd  (%rax),%xmm0
movsd  0xecd(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec9(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rd>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
divsd  (%rax),%xmm0
mulsd  0xed0(%rip),%xmm0
addsd  0xed0(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @rd() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = call double @llvm.fmuladd.f64(double %4, double 2.000000e+01, double -1.000000e+01)
ret double %5
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @rd() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = tail call double @llvm.fmuladd.f64(double %4, double 2.000000e+01, double -1.000000e+01)
ret double %5
}
/* Variables and functions */
float HUGE_VAL;
float minus_infinity(void) { return -HUGE_VAL; }


x86 assembly (clang, -O0):
<minus_infinity>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
movss  (%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<minus_infinity>:
mov    0x2ee1(%rip),%rax
movss  (%rax),%xmm0
xorps  0xeee(%rip),%xmm0
ret

LLVM IR (-O0):
@HUGE_VAL = global float 0.000000e+00
define float @minus_infinity() {
%1 = load float, float* @HUGE_VAL
%2 = fneg float %1
ret float %2
}

LLVM IR (-O2):
@HUGE_VAL = global float 0.000000e+00
define float @minus_infinity() {
%1 = load float, float* @HUGE_VAL
%2 = fneg float %1
ret float %2
}
int xmlUCSIsMiscellaneousMathematicalSymbolsA(int code) {
  return (((code >= 0x27C0) && (code <= 0x27EF)));
}


x86 assembly (clang, -O0):
<xmlUCSIsMiscellaneousMathematicalSymbolsA>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x27c0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsMiscellaneousMathematicalSymbolsA+0x26>
cmpl   $0x27ef,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsMiscellaneousMathematicalSymbolsA>:
add    $0xffffd840,%edi
xor    %eax,%eax
cmp    $0x30,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsMiscellaneousMathematicalSymbolsA(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 10176
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 10223
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsMiscellaneousMathematicalSymbolsA(i32 %0) {
%2 = add i32 %0, -10176
%3 = icmp ult i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
void buf_set_uint32_le(void *buf, unsigned long addr, unsigned long val) {
  unsigned char *tmp = (unsigned char *)buf + addr;
  tmp[0] = val & 0xff;
  tmp[1] = (val >> 8) & 0xff;
  tmp[2] = (val >> 16) & 0xff;
  tmp[3] = (val >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<buf_set_uint32_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
shr    $0x8,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x18(%rbp),%rax
shr    $0x10,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x18(%rbp),%rax
shr    $0x18,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_set_uint32_le>:
mov    %edx,(%rdi,%rsi,1)
ret

LLVM IR (-O0):
define void @buf_set_uint32_le(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i64, i64* %5
%10 = getelementptr inbounds i8, i8* %8, i64 %9
store i8* %10, i8** %7
%11 = load i64, i64* %6
%12 = and i64 %11, 255
%13 = trunc i64 %12 to i8
%14 = load i8*, i8** %7
%15 = getelementptr inbounds i8, i8* %14, i64 0
store i8 %13, i8* %15
%16 = load i64, i64* %6
%17 = lshr i64 %16, 8
%18 = and i64 %17, 255
%19 = trunc i64 %18 to i8
%20 = load i8*, i8** %7
%21 = getelementptr inbounds i8, i8* %20, i64 1
store i8 %19, i8* %21
%22 = load i64, i64* %6
%23 = lshr i64 %22, 16
%24 = and i64 %23, 255
%25 = trunc i64 %24 to i8
%26 = load i8*, i8** %7
%27 = getelementptr inbounds i8, i8* %26, i64 2
store i8 %25, i8* %27
%28 = load i64, i64* %6
%29 = lshr i64 %28, 24
%30 = and i64 %29, 255
%31 = trunc i64 %30 to i8
%32 = load i8*, i8** %7
%33 = getelementptr inbounds i8, i8* %32, i64 3
store i8 %31, i8* %33
ret void
}

LLVM IR (-O2):
define void @buf_set_uint32_le(i8* nocapture writeonly %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i8, i8* %0, i64 %1
%5 = trunc i64 %2 to i8
store i8 %5, i8* %4
%6 = lshr i64 %2, 8
%7 = trunc i64 %6 to i8
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %8
%9 = lshr i64 %2, 16
%10 = trunc i64 %9 to i8
%11 = getelementptr inbounds i8, i8* %4, i64 2
store i8 %10, i8* %11
%12 = lshr i64 %2, 24
%13 = trunc i64 %12 to i8
%14 = getelementptr inbounds i8, i8* %4, i64 3
store i8 %13, i8* %14
ret void
}
int getromanv(char c) {
  int s = 0;
  switch (c) {
  case 'I':
    s = 1;
    break;
  case 'V':
    s = 5;
    break;
  case 'X':
    s = 10;
    break;
  case 'L':
    s = 50;
    break;
  case 'C':
    s = 100;
    break;
  case '\0':
    s = 0;
    break;
  }
  return s;
}


x86 assembly (clang, -O0):
<getromanv>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     11b6 <getromanv+0xb6>
jmp    1125 <getromanv+0x25>
mov    -0xc(%rbp),%eax
sub    $0x43,%eax
je     11aa <getromanv+0xaa>
jmp    1136 <getromanv+0x36>
mov    -0xc(%rbp),%eax
sub    $0x49,%eax
je     117a <getromanv+0x7a>
jmp    1147 <getromanv+0x47>
mov    -0xc(%rbp),%eax
sub    $0x4c,%eax
je     119e <getromanv+0x9e>
jmp    1158 <getromanv+0x58>
mov    -0xc(%rbp),%eax
sub    $0x56,%eax
je     1186 <getromanv+0x86>
jmp    1169 <getromanv+0x69>
mov    -0xc(%rbp),%eax
sub    $0x58,%eax
je     1192 <getromanv+0x92>
jmp    11bd <getromanv+0xbd>
movl   $0x1,-0x8(%rbp)
jmp    11bd <getromanv+0xbd>
movl   $0x5,-0x8(%rbp)
jmp    11bd <getromanv+0xbd>
movl   $0xa,-0x8(%rbp)
jmp    11bd <getromanv+0xbd>
movl   $0x32,-0x8(%rbp)
jmp    11bd <getromanv+0xbd>
movl   $0x64,-0x8(%rbp)
jmp    11bd <getromanv+0xbd>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getromanv>:
xor    %eax,%eax
add    $0xffffffbd,%edi
cmp    $0x15,%edi
ja     111f <getromanv+0x1f>
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x64,%eax
ret
mov    $0x1,%eax
ret
mov    $0x32,%eax
ret
mov    $0x5,%eax
ret
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @getromanv(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
switch i32 %5, label %12 [
i32 73, label %6
i32 86, label %7
i32 88, label %8
i32 76, label %9
i32 67, label %10
i32 0, label %11
]
6: ; preds = %1
store i32 1, i32* %3
br label %12
7: ; preds = %1
store i32 5, i32* %3
br label %12
8: ; preds = %1
store i32 10, i32* %3
br label %12
9: ; preds = %1
store i32 50, i32* %3
br label %12
10: ; preds = %1
store i32 100, i32* %3
br label %12
11: ; preds = %1
store i32 0, i32* %3
br label %12
12: ; preds = %1, %11, %10, %9, %8, %7, %6
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @getromanv(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %8 [
i32 73, label %3
i32 86, label %4
i32 88, label %5
i32 76, label %6
i32 67, label %7
]
3: ; preds = %1
br label %8
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6, %5, %4, %3
%9 = phi i32 [ 100, %7 ], [ 50, %6 ], [ 10, %5 ], [ 5, %4 ], [ 1, %3 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int atoi(char const *);
scalar_t__ table_fetch(int);
int main(int argc, char *argv[]) {
  int inputValue = 0;
  if (argc > 1) {
    inputValue = atoi((char const *)argv[1]);
  }
  return (int)table_fetch(inputValue);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1157 <main+0x37>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <table_fetch@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    %edi,%eax
xor    %edi,%edi
cmp    $0x2,%eax
jl     1139 <main+0x19>
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
add    $0x8,%rsp
jmp    1030 <table_fetch@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
store i32 %13, i32* %6
br label %14
14: ; preds = %9, %2
%15 = load i32, i32* %6
%16 = call i64 @table_fetch(i32 %15)
%17 = trunc i64 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
br label %8
8: ; preds = %4, %2
%9 = phi i32 [ %7, %4 ], [ 0, %2 ]
%10 = tail call i64 @table_fetch(i32 %9)
%11 = trunc i64 %10 to i32
ret i32 %11
}
void g_strtod() {}


x86 assembly (clang, -O0):
<g_strtod>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_strtod>:
ret

LLVM IR (-O0):
define void @g_strtod() {
ret void
}

LLVM IR (-O2):
define void @g_strtod() {
ret void
}
void personality_adb_unbind_config(struct usb_configuration *c) {}


x86 assembly (clang, -O0):
<personality_adb_unbind_config>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<personality_adb_unbind_config>:
ret

LLVM IR (-O0):
%struct.usb_configuration = type opaque
define void @personality_adb_unbind_config(%struct.usb_configuration* %0) {
%2 = alloca %struct.usb_configuration*
store %struct.usb_configuration* %0, %struct.usb_configuration** %2
ret void
}

LLVM IR (-O2):
%struct.usb_configuration = type opaque
define void @personality_adb_unbind_config(%struct.usb_configuration* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int const);
int /*<<< orphan*/ set_tracing_enable(char *, int);
void __attribute__((noreturn)) eventstat_exit(const int status) {
  set_tracing_enable("0\n", false);
  exit(status);
}


x86 assembly (clang, -O0):
<eventstat_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
xor    %esi,%esi
call   1030 <set_tracing_enable@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<eventstat_exit>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
xor    %esi,%esi
call   1030 <set_tracing_enable@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"0\0A\00"
define void @eventstat_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @set_tracing_enable(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
@.str = [3 x i8] c"0\0A\00"
define void @eventstat_exit(i32 %0) {
%2 = tail call i32 @set_tracing_enable(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
float powf(float, float);
float slider2contrast(float slider) { return 0.005f * powf(slider, 1.1f); }


x86 assembly (clang, -O0):
<slider2contrast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeda(%rip),%xmm1
call   1030 <powf@plt>
movaps %xmm0,%xmm1
movss  0xec6(%rip),%xmm0
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slider2contrast>:
push   %rax
movss  0xee7(%rip),%xmm1
call   1030 <powf@plt>
mulss  0xede(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @slider2contrast(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @powf(float %3, float 0x3FF19999A0000000)
%5 = fmul float 0x3F747AE140000000, %4
ret float %5
}

LLVM IR (-O2):
define float @slider2contrast(float %0) {
%2 = tail call float @powf(float %0, float 0x3FF19999A0000000)
%3 = fmul float %2, 0x3F747AE140000000
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ echo();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ nl();
int /*<<< orphan*/ nocrmode();
int /*<<< orphan*/ refresh();
end_disp() {
  nocrmode();
  echo();
  nl();
  refresh();
  endwin();
}


x86 assembly (clang, -O0):
<end_disp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <nocrmode@plt>
mov    $0x0,%al
call   1030 <echo@plt>
mov    $0x0,%al
call   1040 <nl@plt>
mov    $0x0,%al
call   1060 <refresh@plt>
mov    $0x0,%al
call   1070 <endwin@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_disp>:
push   %rax
xor    %eax,%eax
call   1050 <nocrmode@plt>
xor    %eax,%eax
call   1030 <echo@plt>
xor    %eax,%eax
call   1040 <nl@plt>
xor    %eax,%eax
call   1060 <refresh@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <endwin@plt>

LLVM IR (-O0):
define i32 @end_disp() {
%1 = alloca i32
%2 = call i32 (...) @nocrmode()
%3 = call i32 (...) @echo()
%4 = call i32 (...) @nl()
%5 = call i32 (...) @refresh()
%6 = call i32 (...) @endwin()
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @end_disp() {
%1 = tail call i32 (...) @nocrmode()
%2 = tail call i32 (...) @echo()
%3 = tail call i32 (...) @nl()
%4 = tail call i32 (...) @refresh()
%5 = tail call i32 (...) @endwin()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
__attribute__((__weak__, __always___)) void
softboundcets_srand(unsigned int seed) {
  srand(seed);
}


x86 assembly (clang, -O0):
<softboundcets_srand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_srand>:
jmp    1030 <srand@plt>

LLVM IR (-O0):
define weak void @softboundcets_srand(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @srand(i32 %3)
ret void
}

LLVM IR (-O2):
define weak void @softboundcets_srand(i32 %0) {
%2 = tail call i32 @srand(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_block_try();
int /*<<< orphan*/ test_err_mutex();
int /*<<< orphan*/ test_init_mutex();
int /*<<< orphan*/ test_mutex();
int /*<<< orphan*/ test_rec_mutex();
int /*<<< orphan*/ write(int, char *, int);
void test1() {
  write(1, "\nTEST 1: mutex test:\n\n",
        sizeof("\nTEST 1: mutex test:\n\n") - 1);
  test_init_mutex();
  test_mutex();
  test_rec_mutex();
  test_err_mutex();
  test_block_try();
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xe90(%rip),%rsi
mov    $0x16,%edx
call   1030 <write@plt>
mov    $0x0,%al
call   1050 <test_init_mutex@plt>
mov    $0x0,%al
call   1080 <test_mutex@plt>
mov    $0x0,%al
call   1040 <test_rec_mutex@plt>
mov    $0x0,%al
call   1070 <test_err_mutex@plt>
mov    $0x0,%al
call   1060 <test_block_try@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
push   %rax
lea    0xe98(%rip),%rsi
mov    $0x1,%edi
mov    $0x16,%edx
call   1030 <write@plt>
xor    %eax,%eax
call   1050 <test_init_mutex@plt>
xor    %eax,%eax
call   1080 <test_mutex@plt>
xor    %eax,%eax
call   1040 <test_rec_mutex@plt>
xor    %eax,%eax
call   1070 <test_err_mutex@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <test_block_try@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"\0ATEST 1: mutex test:\0A\0A\00"
define void @test1() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 22)
%2 = call i32 (...) @test_init_mutex()
%3 = call i32 (...) @test_mutex()
%4 = call i32 (...) @test_rec_mutex()
%5 = call i32 (...) @test_err_mutex()
%6 = call i32 (...) @test_block_try()
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"\0ATEST 1: mutex test:\0A\0A\00"
define void @test1() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 22)
%2 = tail call i32 (...) @test_init_mutex()
%3 = tail call i32 (...) @test_mutex()
%4 = tail call i32 (...) @test_rec_mutex()
%5 = tail call i32 (...) @test_err_mutex()
%6 = tail call i32 (...) @test_block_try()
ret void
}
int test_imm_11uint16_reg(unsigned short val) {
  return ((val) & (-0x11 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_11uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffffef,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_11uint16_reg>:
test   $0xffef,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_11uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -17
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_11uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -17
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}