xunge/DecIR huggingface dataset:
void *new_double() {
  double *p = (double *)malloc(10 * sizeof(double));
  p[0] = 41;
  p[1] = 42;
  p[2] = 43;
  return p;
}


x86 assembly (clang, -O0):
<new_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x50,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xede(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0xec6(%rip),%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0xead(%rip),%xmm0
movsd  %xmm0,0x10(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_double>:
push   %rax
mov    $0x50,%edi
call   1030 <malloc@plt>
movaps 0xede(%rip),%xmm0
movups %xmm0,(%rax)
movabs $0x4045800000000000,%rcx
80 45 40
mov    %rcx,0x10(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i8* @new_double() {
%1 = alloca double*
%2 = call i8* @malloc(i64 80)
%3 = bitcast i8* %2 to double*
store double* %3, double** %1
%4 = load double*, double** %1
%5 = getelementptr inbounds double, double* %4, i64 0
store double 4.100000e+01, double* %5
%6 = load double*, double** %1
%7 = getelementptr inbounds double, double* %6, i64 1
store double 4.200000e+01, double* %7
%8 = load double*, double** %1
%9 = getelementptr inbounds double, double* %8, i64 2
store double 4.300000e+01, double* %9
%10 = load double*, double** %1
%11 = bitcast double* %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @new_double() {
%1 = tail call dereferenceable_or_null(80) i8* @malloc(i64 80)
%2 = bitcast i8* %1 to double*
%3 = bitcast i8* %1 to <2 x double>*
store <2 x double> <double 4.100000e+01, double 4.200000e+01>, <2 x double>* %3
%4 = getelementptr inbounds double, double* %2, i64 2
store double 4.300000e+01, double* %4
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
long double __ieee754_log10l(long double x) {
  fputs("__ieee754_log10l not implemented\n", stderr);
  __set_errno(ENOSYS);
  return 0.0;
}


x86 assembly (clang, -O0):
<__ieee754_log10l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
lea    0xec2(%rip),%rdi
call   1040 <fputs@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
fldz
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ieee754_log10l>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
fldz
pop    %rax
ret

LLVM IR (-O0):
@.str = [34 x i8] c"__ieee754_log10l not implemented\0A\00"
@stderr = global i32 0
@ENOSYS = global i32 0
define x86_fp80 @__ieee754_log10l(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fputs(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret x86_fp80 0xK00000000000000000000
}

LLVM IR (-O2):
@.str = [34 x i8] c"__ieee754_log10l not implemented\0A\00"
@stderr = global i32 0
@ENOSYS = global i32 0
define x86_fp80 @__ieee754_log10l(x86_fp80 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @ENOSYS
%5 = tail call i32 @__set_errno(i32 %4)
ret x86_fp80 0xK00000000000000000000
}
/* Type definitions */
struct p9_fid {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ p9l_xattrget(struct p9_fid *, char *, int /*<<< orphan*/ *,
                                char *, size_t);
ssize_t p9l_xattrlist(struct p9_fid *cwd, char *path, char *buf, size_t count) {
  return p9l_xattrget(cwd, path, NULL, buf, count);
}


x86 assembly (clang, -O0):
<p9l_xattrlist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
xor    %eax,%eax
mov    %eax,%edx
call   1030 <p9l_xattrget@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p9l_xattrlist>:
mov    %rcx,%r8
mov    %rdx,%rcx
xor    %edx,%edx
jmp    1030 <p9l_xattrget@plt>

LLVM IR (-O0):
%struct.p9_fid = type { i32 }
define i32 @p9l_xattrlist(%struct.p9_fid* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca %struct.p9_fid*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
store %struct.p9_fid* %0, %struct.p9_fid** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load %struct.p9_fid*, %struct.p9_fid** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i64, i64* %8
%13 = call i32 @p9l_xattrget(%struct.p9_fid* %9, i8* %10, i32* null, i8* %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.p9_fid = type { i32 }
define i32 @p9l_xattrlist(%struct.p9_fid* %0, i8* %1, i8* %2, i64 %3) {
%5 = tail call i32 @p9l_xattrget(%struct.p9_fid* %0, i8* %1, i32* null, i8* %2, i64 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char const *);
void err(const char *msg) {
  printf(msg);
  printf("------- End QuickSort -------\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printf@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err>:
push   %rax
call   1040 <printf@plt>
lea    0xec3(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"------- End QuickSort -------\0A\00"
@EXIT_FAILURE = global i32 0
define void @err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@str = [30 x i8] c"------- End QuickSort -------\00"
define void @err(i8* nocapture %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int f2(unsigned z) {
  int y = z + 3;
  return y / 2;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    %edi,%eax
add    $0x3,%eax
shr    $0x1f,%eax
add    %edi,%eax
add    $0x3,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add i32 %4, 3
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 2
ret i32 %7
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
%2 = add i32 %0, 3
%3 = sdiv i32 %2, 2
ret i32 %3
}
/* Variables and functions */
scalar_t__ Alea();
double log(scalar_t__);
double Exponentielle(double lambda) { return -log(1 - Alea()) / lambda; }


x86 assembly (clang, -O0):
<Exponentielle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <Alea@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1040 <log@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
divsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Exponentielle>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <Alea@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1040 <log@plt>
xorpd  0xebe(%rip),%xmm0
divsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @Exponentielle(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i64 (...) @Alea()
%4 = sub nsw i64 1, %3
%5 = call double @log(i64 %4)
%6 = fneg double %5
%7 = load double, double* %2
%8 = fdiv double %6, %7
ret double %8
}

LLVM IR (-O2):
define double @Exponentielle(double %0) {
%2 = tail call i64 (...) @Alea()
%3 = sub nsw i64 1, %2
%4 = tail call double @log(i64 %3)
%5 = fneg double %4
%6 = fdiv double %5, %0
ret double %6
}
void rop3_42_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T & S;
  stk2 = ~stk2;
  stk1 = *D & stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_42_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_42_0_0>:
and    %edx,%esi
not    %sil
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_42_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = and i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8, i8* %8
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %8
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = and i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = load i8*, i8** %4
store i8 %26, i8* %27
ret void
}

LLVM IR (-O2):
define void @rop3_42_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = and i8 %2, %1
%5 = xor i8 %4, -1
%6 = load i8, i8* %0
%7 = and i8 %6, %5
store i8 %7, i8* %0
ret void
}
/* Variables and functions */
int rand();
char generateRandomTCPFlags() { return rand() % 255; }


x86 assembly (clang, -O0):
<generateRandomTCPFlags>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %dl,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateRandomTCPFlags>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
movslq %eax,%rcx
imul   $0xffffffff80808081,%rcx,%rax
shr    $0x20,%rax
add    %ecx,%eax
mov    %eax,%edx
shr    $0x1f,%edx
shr    $0x7,%eax
add    %edx,%eax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @generateRandomTCPFlags() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 255
%3 = trunc i32 %2 to i8
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @generateRandomTCPFlags() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 255
%3 = trunc i32 %2 to i8
ret i8 %3
}
/* Type definitions */
struct cmdline_args_params {
  int dummy;
};
struct cmdline_args_info {
  int dummy;
};

/* Variables and functions */
int cmdline_args_internal(int, char **, struct cmdline_args_info *,
                          struct cmdline_args_params *, int /*<<< orphan*/);
int cmdline_args_ext(int argc, char **argv, struct cmdline_args_info *args_info,
                     struct cmdline_args_params *params) {
  int result;
  result = cmdline_args_internal(argc, argv, args_info, params, 0);
  return result;
}


x86 assembly (clang, -O0):
<cmdline_args_ext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <cmdline_args_internal@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdline_args_ext>:
xor    %r8d,%r8d
jmp    1030 <cmdline_args_internal@plt>

LLVM IR (-O0):
%struct.cmdline_args_info = type { i32 }
%struct.cmdline_args_params = type { i32 }
define i32 @cmdline_args_ext(i32 %0, i8** %1, %struct.cmdline_args_info* %2, %struct.cmdline_args_params* %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca %struct.cmdline_args_info*
%8 = alloca %struct.cmdline_args_params*
%9 = alloca i32
store i32 %0, i32* %5
store i8** %1, i8*** %6
store %struct.cmdline_args_info* %2, %struct.cmdline_args_info** %7
store %struct.cmdline_args_params* %3, %struct.cmdline_args_params** %8
%10 = load i32, i32* %5
%11 = load i8**, i8*** %6
%12 = load %struct.cmdline_args_info*, %struct.cmdline_args_info** %7
%13 = load %struct.cmdline_args_params*, %struct.cmdline_args_params** %8
%14 = call i32 @cmdline_args_internal(i32 %10, i8** %11, %struct.cmdline_args_info* %12, %struct.cmdline_args_params* %13, i32 0)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
%struct.cmdline_args_info = type { i32 }
%struct.cmdline_args_params = type { i32 }
define i32 @cmdline_args_ext(i32 %0, i8** %1, %struct.cmdline_args_info* %2, %struct.cmdline_args_params* %3) {
%5 = tail call i32 @cmdline_args_internal(i32 %0, i8** %1, %struct.cmdline_args_info* %2, %struct.cmdline_args_params* %3, i32 0)
ret i32 %5
}
/* Variables and functions */
int f388(int *);
int f389(int *p) { return f388(p); }


x86 assembly (clang, -O0):
<f389>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f388@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f389>:
jmp    1030 <f388@plt>

LLVM IR (-O0):
define i32 @f389(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f388(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f389(i32* %0) {
%2 = tail call i32 @f388(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int iso_px_ino_xinfo_func(void *data, int flag) {
  if (flag == 1) {
    free(data);
  }
  return 1;
}


x86 assembly (clang, -O0):
<iso_px_ino_xinfo_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1132 <iso_px_ino_xinfo_func+0x22>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso_px_ino_xinfo_func>:
cmp    $0x1,%esi
jne    111f <iso_px_ino_xinfo_func+0xf>
push   %rax
call   1030 <free@plt>
add    $0x8,%rsp
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @iso_px_ino_xinfo_func(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 @free(i8* %8)
br label %10
10: ; preds = %7, %2
ret i32 1
}

LLVM IR (-O2):
define i32 @iso_px_ino_xinfo_func(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @free(i8* %0)
br label %6
6: ; preds = %4, %2
ret i32 1
}
void ELMModeSet(unsigned int baseAddr, unsigned int mode,
                unsigned int sectorNum) {
  if (mode == (0)) {
    (*((volatile unsigned int *)(baseAddr + (0x80)))) = (mode);
  } else {
    (*((volatile unsigned int *)(baseAddr + (0x80)))) = (mode << sectorNum);
  }
}


x86 assembly (clang, -O0):
<ELMModeSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112b <ELMModeSet+0x2b>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x80,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
jmp    1141 <ELMModeSet+0x41>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x80,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ELMModeSet>:
mov    %edx,%ecx
mov    %esi,%eax
shl    %cl,%eax
test   %esi,%esi
cmove  %esi,%eax
sub    $0xffffff80,%edi
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @ELMModeSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = add i32 %11, 128
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 %10, i32* %14
br label %23
15: ; preds = %3
%16 = load i32, i32* %5
%17 = load i32, i32* %6
%18 = shl i32 %16, %17
%19 = load i32, i32* %4
%20 = add i32 %19, 128
%21 = zext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 %18, i32* %22
br label %23
23: ; preds = %15, %9
ret void
}

LLVM IR (-O2):
define void @ELMModeSet(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = shl i32 %1, %2
%6 = select i1 %4, i32 0, i32 %5
%7 = add i32 %0, 128
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %6, i32* %9
ret void
}
const char *pathconN_nm9_name_in(int i) {
  switch (i) {
  case 0:
    return "i0";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<pathconN_nm9_name_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
test   %eax,%eax
jne    1127 <pathconN_nm9_name_in+0x27>
jmp    1117 <pathconN_nm9_name_in+0x17>
lea    0xee2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <pathconN_nm9_name_in+0x2f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm9_name_in>:
xor    %eax,%eax
test   %edi,%edi
lea    0xef5(%rip),%rcx
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"i0\00"
define i8* @pathconN_nm9_name_in(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 0, label %5
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %7
6: ; preds = %1
store i8* null, i8** %2
br label %7
7: ; preds = %6, %5
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"i0\00"
define i8* @pathconN_nm9_name_in(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* null
ret i8* %3
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int fstat(int, struct stat *);
__attribute__((__weak__, __always___)) int
softboundcets_fstat(int filedes, struct stat *buff) {
  return fstat(filedes, buff);
}


x86 assembly (clang, -O0):
<softboundcets_fstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fstat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_fstat>:
jmp    1030 <fstat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define weak i32 @softboundcets_fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i32, i32* %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @fstat(i32 %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define weak i32 @softboundcets_fstat(i32 %0, %struct.stat* %1) {
%3 = tail call i32 @fstat(i32 %0, %struct.stat* %1)
ret i32 %3
}
/* Type definitions */
struct sembuf {
  int sem_num;
  int sem_op;
  int /*<<< orphan*/ sem_flg;
};

/* Variables and functions */
int /*<<< orphan*/ SEM_UNDO;
scalar_t__ semop(int, struct sembuf *, int);
bool qsem_enter(int semid, int semno) {
  struct sembuf sbuf;
  sbuf.sem_num = semno;
  sbuf.sem_op = -1;
  sbuf.sem_flg = SEM_UNDO;
  if (semop(semid, &sbuf, 1) != 0)
    return false;
  return true;
}


x86 assembly (clang, -O0):
<qsem_enter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
movl   $0xffffffff,-0x14(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
cmp    $0x0,%rax
je     115e <qsem_enter+0x4e>
movl   $0x0,-0x4(%rbp)
jmp    1165 <qsem_enter+0x55>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsem_enter>:
sub    $0x18,%rsp
mov    %esi,0x8(%rsp)
movl   $0xffffffff,0xc(%rsp)
ff
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x10(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sembuf = type { i32, i32, i32 }
@SEM_UNDO = global i32 0
define i32 @qsem_enter(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.sembuf
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 0
store i32 %7, i32* %8
%9 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 1
store i32 -1, i32* %9
%10 = load i32, i32* @SEM_UNDO
%11 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 2
store i32 %10, i32* %11
%12 = load i32, i32* %4
%13 = call i64 @semop(i32 %12, %struct.sembuf* %6, i32 1)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 0, i32* %3
br label %17
16: ; preds = %2
store i32 1, i32* %3
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
%struct.sembuf = type { i32, i32, i32 }
@SEM_UNDO = global i32 0
define i32 @qsem_enter(i32 %0, i32 %1) {
%3 = alloca %struct.sembuf
%4 = bitcast %struct.sembuf* %3 to i8*
%5 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 0
store i32 %1, i32* %5
%6 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 1
store i32 -1, i32* %6
%7 = load i32, i32* @SEM_UNDO
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 2
store i32 %7, i32* %8
%9 = call i64 @semop(i32 %0, %struct.sembuf* %3, i32 1)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Type definitions */
struct Node {
  int dummy;
};

/* Variables and functions */
struct Node *make_node();
struct Node *cache_init() {
  return make_node();
}


x86 assembly (clang, -O0):
<cache_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <make_node@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_init>:
xor    %eax,%eax
jmp    1030 <make_node@plt>

LLVM IR (-O0):
%struct.Node = type { i32 }
define %struct.Node* @cache_init() {
%1 = call %struct.Node* (...) @make_node()
ret %struct.Node* %1
}

LLVM IR (-O2):
%struct.Node = type { i32 }
define %struct.Node* @cache_init() {
%1 = tail call %struct.Node* (...) @make_node()
ret %struct.Node* %1
}
void INT_Excep_BSC_BUSERR(void) {}


x86 assembly (clang, -O0):
<INT_Excep_BSC_BUSERR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_BSC_BUSERR>:
ret

LLVM IR (-O0):
define void @INT_Excep_BSC_BUSERR() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_BSC_BUSERR() {
ret void
}
void board_init(void) {
  unsigned int i;
  for (i = 0; i < 41; ++i)
    (*(volatile unsigned int *)(0x8c0001c8 + i * 4)) = 0x0A;
  (*(volatile unsigned int *)(0x8c000274)) = 0x0A;
  (*(volatile unsigned int *)(0x8c000284)) = 0x0A;
  (*(volatile unsigned int *)(0x8c000288)) = 0x0A;
}


x86 assembly (clang, -O0):
<board_init>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x29,-0x4(%rbp)
jae    1136 <board_init+0x36>
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
add    $0x8c0001c8,%eax
mov    %eax,%eax
movl   $0xa,(%rax)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <board_init+0xb>
mov    $0x8c000274,%eax
movl   $0xa,(%rax)
mov    $0x8c000284,%eax
movl   $0xa,(%rax)
mov    $0x8c000288,%eax
movl   $0xa,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_init>:
mov    $0x28,%ecx
mov    $0x8c0001d4,%eax
mov    $0x8c0001d4,%edx
nop
movl   $0xa,-0xc(%rdx)
test   %rcx,%rcx
je     113a <board_init+0x3a>
movl   $0xa,-0x8(%rdx)
movl   $0xa,-0x4(%rdx)
movl   $0xa,(%rdx)
add    $0x10,%rdx
add    $0xfffffffffffffffc,%rcx
jmp    1110 <board_init+0x10>
movl   $0xa,0xa0(%rax)
movl   $0xa,0xb0(%rax)
movl   $0xa,0xb4(%rax)
ret

LLVM IR (-O0):
define void @board_init() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %11, %0
%3 = load i32, i32* %1
%4 = icmp ult i32 %3, 41
br i1 %4, label %5, label %14
5: ; preds = %2
%6 = load i32, i32* %1
%7 = mul i32 %6, 4
%8 = add i32 -1946156600, %7
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 10, i32* %10
br label %11
11: ; preds = %5
%12 = load i32, i32* %1
%13 = add i32 %12, 1
store i32 %13, i32* %1
br label %2
14: ; preds = %2
store volatile i32 10, i32* inttoptr (i64 2348810868 to i32*)
store volatile i32 10, i32* inttoptr (i64 2348810884 to i32*)
store volatile i32 10, i32* inttoptr (i64 2348810888 to i32*)
ret void
}

LLVM IR (-O2):
define void @board_init() {
br label %1
1: ; preds = %8, %0
%2 = phi i64 [ 0, %0 ], [ %18, %8 ]
%3 = shl i64 %2, 2
%4 = add nuw nsw i64 %3, 2348810696
%5 = inttoptr i64 %4 to i32*
store volatile i32 10, i32* %5
%6 = or i64 %2, 1
%7 = icmp eq i64 %6, 41
br i1 %7, label %19, label %8
8: ; preds = %1
%9 = shl i64 %6, 2
%10 = add nuw nsw i64 %9, 2348810696
%11 = inttoptr i64 %10 to i32*
store volatile i32 10, i32* %11
%12 = shl i64 %2, 2
%13 = add i64 %12, 2348810704
%14 = inttoptr i64 %13 to i32*
store volatile i32 10, i32* %14
%15 = shl i64 %2, 2
%16 = add i64 %15, 2348810708
%17 = inttoptr i64 %16 to i32*
store volatile i32 10, i32* %17
%18 = add nuw nsw i64 %2, 4
br label %1
19: ; preds = %1
store volatile i32 10, i32* inttoptr (i64 2348810868 to i32*)
store volatile i32 10, i32* inttoptr (i64 2348810884 to i32*)
store volatile i32 10, i32* inttoptr (i64 2348810888 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SA1DirectIndirectLong(int);
int /*<<< orphan*/ STA16(int /*<<< orphan*/, int);
void Op87M0(void) { STA16(SA1DirectIndirectLong(2), 0xFFFFFF); }


x86 assembly (clang, -O0):
<Op87M0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <SA1DirectIndirectLong@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
call   1040 <STA16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op87M0>:
push   %rax
mov    $0x2,%edi
call   1030 <SA1DirectIndirectLong@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
pop    %rax
jmp    1040 <STA16@plt>

LLVM IR (-O0):
define void @Op87M0() {
%1 = call i32 @SA1DirectIndirectLong(i32 2)
%2 = call i32 @STA16(i32 %1, i32 16777215)
ret void
}

LLVM IR (-O2):
define void @Op87M0() {
%1 = tail call i32 @SA1DirectIndirectLong(i32 2)
%2 = tail call i32 @STA16(i32 %1, i32 16777215)
ret void
}
int *find_middle(int *a, int n) { return a + (n / 2); }


x86 assembly (clang, -O0):
<find_middle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_middle>:
mov    %esi,%eax
shr    $0x1f,%eax
add    %esi,%eax
sar    %eax
cltq
lea    (%rdi,%rax,4),%rax
ret

LLVM IR (-O0):
define i32* @find_middle(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sdiv i32 %6, 2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
ret i32* %9
}

LLVM IR (-O2):
define i32* @find_middle(i32* readnone %0, i32 %1) {
%3 = sdiv i32 %1, 2
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
ret i32* %5
}
void ff_hevc_put_hevc_bi_qpel_v16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v16_12_sse4() {
ret void
}
void __DELETE_org_apache_harmony_luni_platform_Endianness(void *me,
                                                          void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_org_apache_harmony_luni_platform_Endianness>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_org_apache_harmony_luni_platform_Endianness>:
ret

LLVM IR (-O0):
define void @__DELETE_org_apache_harmony_luni_platform_Endianness(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_org_apache_harmony_luni_platform_Endianness(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
bool is_white_space(char c) {
  bool result = false;
  if ((c == '\t') || (c == '\n') || (c == ' ')) {
    result = true;
  }
  return result;
}


x86 assembly (clang, -O0):
<is_white_space>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
je     1138 <is_white_space+0x38>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
je     1138 <is_white_space+0x38>
movsbl -0x1(%rbp),%eax
cmp    $0x20,%eax
jne    113f <is_white_space+0x3f>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_white_space>:
xor    %eax,%eax
cmp    $0x20,%dil
ja     1121 <is_white_space+0x21>
movzbl %dil,%ecx
movabs $0x100000600,%rdx
bt     %rcx,%rdx
jae    1121 <is_white_space+0x21>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_white_space(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 9
br i1 %6, label %15, label %7
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 10
br i1 %10, label %15, label %11
11: ; preds = %7
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 32
br i1 %14, label %15, label %16
15: ; preds = %11, %7, %1
store i32 1, i32* %3
br label %16
16: ; preds = %15, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @is_white_space(i8 signext %0) {
switch i8 %0, label %3 [
i8 32, label %2
i8 10, label %2
i8 9, label %2
]
2: ; preds = %1, %1, %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ 1, %2 ], [ 0, %1 ]
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ WIFILIB_genDerotTable();
int /*<<< orphan*/ WIFILIB_genTwiddleFactors();
int /*<<< orphan*/ vitdec_profile_init();
void app_wifirx6m_setup() {
  WIFILIB_genDerotTable();
  WIFILIB_genTwiddleFactors();
  vitdec_profile_init();
}


x86 assembly (clang, -O0):
<app_wifirx6m_setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WIFILIB_genDerotTable@plt>
mov    $0x0,%al
call   1040 <WIFILIB_genTwiddleFactors@plt>
mov    $0x0,%al
call   1050 <vitdec_profile_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<app_wifirx6m_setup>:
push   %rax
xor    %eax,%eax
call   1030 <WIFILIB_genDerotTable@plt>
xor    %eax,%eax
call   1040 <WIFILIB_genTwiddleFactors@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <vitdec_profile_init@plt>

LLVM IR (-O0):
define void @app_wifirx6m_setup() {
%1 = call i32 (...) @WIFILIB_genDerotTable()
%2 = call i32 (...) @WIFILIB_genTwiddleFactors()
%3 = call i32 (...) @vitdec_profile_init()
ret void
}

LLVM IR (-O2):
define void @app_wifirx6m_setup() {
%1 = tail call i32 (...) @WIFILIB_genDerotTable()
%2 = tail call i32 (...) @WIFILIB_genTwiddleFactors()
%3 = tail call i32 (...) @vitdec_profile_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ client_process(int);
int server_accept(int);
void server_single_request(int accept_fd) {
  int fd;
  fd = server_accept(accept_fd);
  client_process(fd);
  return;
}


x86 assembly (clang, -O0):
<server_single_request>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <server_accept@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <client_process@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<server_single_request>:
push   %rax
call   1040 <server_accept@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <client_process@plt>

LLVM IR (-O0):
define void @server_single_request(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @server_accept(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @client_process(i32 %6)
ret void
}

LLVM IR (-O2):
define void @server_single_request(i32 %0) {
%2 = tail call i32 @server_accept(i32 %0)
%3 = tail call i32 @client_process(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Platform_Halt(int);
char OPB_IntToBool(long long i) {
  char _o_result;
  if (i == 0) {
    _o_result = 0;
    return _o_result;
  } else {
    _o_result = 1;
    return _o_result;
  }
__retchk:
  Platform_Halt(-3);
  return 0;
  ;
}


x86 assembly (clang, -O0):
<OPB_IntToBool>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1122 <OPB_IntToBool+0x22>
movb   $0x0,-0x11(%rbp)
mov    -0x11(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    112c <OPB_IntToBool+0x2c>
movb   $0x1,-0x11(%rbp)
mov    -0x11(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPB_IntToBool>:
test   %rdi,%rdi
setne  %al
ret

LLVM IR (-O0):
define signext i8 @OPB_IntToBool(i64 %0) {
%2 = alloca i8
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
store i8 0, i8* %4
%8 = load i8, i8* %4
store i8 %8, i8* %2
br label %13
9: ; preds = %1
store i8 1, i8* %4
%10 = load i8, i8* %4
store i8 %10, i8* %2
br label %13
11: ; No predecessors!
%12 = call i32 @Platform_Halt(i32 -3)
store i8 0, i8* %2
br label %13
13: ; preds = %11, %9, %7
%14 = load i8, i8* %2
ret i8 %14
}

LLVM IR (-O2):
define signext i8 @OPB_IntToBool(i64 %0) {
%2 = icmp ne i64 %0, 0
%3 = zext i1 %2 to i8
ret i8 %3
}
void grad1(int hash, float *gx) {
  int h = hash & 15;
  *gx = 1.0f + (h & 7);
  if (h & 8)
    *gx = -*gx;
}


x86 assembly (clang, -O0):
<grad1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0x7,%eax
cvtsi2ss %eax,%xmm1
movss  0xeda(%rip),%xmm0
addss  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x14(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     115e <grad1+0x5e>
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<grad1>:
mov    %edi,%eax
and    $0x7,%eax
cvtsi2ss %eax,%xmm0
addss  0xeef(%rip),%xmm0
test   $0x8,%dil
je     111e <grad1+0x1e>
xorps  0xef2(%rip),%xmm0
movss  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @grad1(i32 %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca i32
store i32 %0, i32* %3
store float* %1, float** %4
%6 = load i32, i32* %3
%7 = and i32 %6, 15
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = and i32 %8, 7
%10 = sitofp i32 %9 to float
%11 = fadd float 1.000000e+00, %10
%12 = load float*, float** %4
store float %11, float* %12
%13 = load i32, i32* %5
%14 = and i32 %13, 8
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %2
%17 = load float*, float** %4
%18 = load float, float* %17
%19 = fneg float %18
%20 = load float*, float** %4
store float %19, float* %20
br label %21
21: ; preds = %16, %2
ret void
}

LLVM IR (-O2):
define void @grad1(i32 %0, float* nocapture writeonly %1) {
%3 = and i32 %0, 7
%4 = sitofp i32 %3 to float
%5 = fadd float %4, 1.000000e+00
%6 = and i32 %0, 8
%7 = icmp eq i32 %6, 0
%8 = fneg float %5
%9 = select i1 %7, float %5, float %8
store float %9, float* %1
ret void
}
/* Type definitions */
struct csv_tokenizer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct csv_tokenizer *);
void free_tokenizer(struct csv_tokenizer *restrict tokenizer) {
  free(tokenizer);
}


x86 assembly (clang, -O0):
<free_tokenizer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_tokenizer>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.csv_tokenizer = type { i32 }
define void @free_tokenizer(%struct.csv_tokenizer* noalias %0) {
%2 = alloca %struct.csv_tokenizer*
store %struct.csv_tokenizer* %0, %struct.csv_tokenizer** %2
%3 = load %struct.csv_tokenizer*, %struct.csv_tokenizer** %2
%4 = call i32 @free(%struct.csv_tokenizer* %3)
ret void
}

LLVM IR (-O2):
%struct.csv_tokenizer = type { i32 }
define void @free_tokenizer(%struct.csv_tokenizer* noalias nocapture %0) {
%2 = tail call i32 @free(%struct.csv_tokenizer* %0)
ret void
}
/* Type definitions */
struct TagDBdata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct TagDBdata *);
void TagDBFree(struct TagDBdata *ptr) {
  if (ptr == NULL)
    return;
  free(ptr);
}


x86 assembly (clang, -O0):
<TagDBFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <TagDBFree+0x1c>
jmp    1135 <TagDBFree+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TagDBFree>:
test   %rdi,%rdi
je     111a <TagDBFree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.TagDBdata = type { i32 }
define void @TagDBFree(%struct.TagDBdata* %0) {
%2 = alloca %struct.TagDBdata*
store %struct.TagDBdata* %0, %struct.TagDBdata** %2
%3 = load %struct.TagDBdata*, %struct.TagDBdata** %2
%4 = icmp eq %struct.TagDBdata* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load %struct.TagDBdata*, %struct.TagDBdata** %2
%8 = call i32 @free(%struct.TagDBdata* %7)
br label %9
9: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.TagDBdata = type { i32 }
define void @TagDBFree(%struct.TagDBdata* %0) {
%2 = icmp eq %struct.TagDBdata* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.TagDBdata* %0)
br label %5
5: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
unsigned long FanChannelsGet(unsigned long ulBase) {
  DEBUG_ASSERT(ulBase == 0x40084000);
  return ((*((volatile unsigned long *)(ulBase + 0x00000FC0))) & 0x0000000F);
}


x86 assembly (clang, -O0):
<FanChannelsGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x40084000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0xfc0(%rax),%rax
and    $0xf,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FanChannelsGet>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x40084000,%rbx
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    0xfc0(%rbx),%rax
and    $0xf,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @FanChannelsGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 1074282496
%5 = zext i1 %4 to i32
%6 = call i32 @DEBUG_ASSERT(i32 %5)
%7 = load i64, i64* %2
%8 = add i64 %7, 4032
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, 15
ret i64 %11
}

LLVM IR (-O2):
define i64 @FanChannelsGet(i64 %0) {
%2 = icmp eq i64 %0, 1074282496
%3 = zext i1 %2 to i32
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = add i64 %0, 4032
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = and i64 %7, 15
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ glp_lib_fault(char *, char *, char *, int);
void glp_lib_insist(char *expr, char *file, int line) {
  glp_lib_fault("Assertion failed: %s; file %s; line %d", expr, file, line);
}


x86 assembly (clang, -O0):
<glp_lib_insist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xecb(%rip),%rdi
call   1030 <glp_lib_fault@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glp_lib_insist>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee1(%rip),%rdi
jmp    1030 <glp_lib_fault@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"Assertion failed: %s; file %s; line %d\00"
define void @glp_lib_insist(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @glp_lib_fault(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [39 x i8] c"Assertion failed: %s; file %s; line %d\00"
define void @glp_lib_insist(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @glp_lib_fault(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gc_collect();
void *malloc(size_t);
int /*<<< orphan*/ oom();
int /*<<< orphan*/ push_heap_ptr(void *);
void *gc_alloc(size_t size) {
  gc_collect();
  void *p = malloc(size);
  if (!p)
    oom();
  push_heap_ptr(p);
  do {
  } while (0);
  return p;
}


x86 assembly (clang, -O0):
<gc_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <gc_collect@plt>
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1172 <gc_alloc+0x32>
mov    $0x0,%al
call   1030 <oom@plt>
mov    -0x10(%rbp),%rdi
call   1060 <push_heap_ptr@plt>
jmp    1180 <gc_alloc+0x40>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gc_alloc>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <gc_collect@plt>
mov    %rbx,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1162 <gc_alloc+0x22>
xor    %eax,%eax
call   1030 <oom@plt>
mov    %rbx,%rdi
call   1060 <push_heap_ptr@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @gc_alloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = call i32 (...) @gc_collect()
%5 = load i64, i64* %2
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = call i32 (...) @oom()
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %3
%13 = call i32 @push_heap_ptr(i8* %12)
br label %14
14: ; preds = %11
br label %15
15: ; preds = %14
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @gc_alloc(i64 %0) {
%2 = tail call i32 (...) @gc_collect()
%3 = tail call i8* @malloc(i64 %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (...) @oom()
br label %7
7: ; preds = %5, %1
%8 = tail call i32 @push_heap_ptr(i8* %3)
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ rdReg(int, int /*<<< orphan*/ *);
uint32_t ons_get_hw_table_size() {
  uint32_t val;
  rdReg(0x4b000010, &val);
  return val;
}


x86 assembly (clang, -O0):
<ons_get_hw_table_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4b000010,%edi
lea    -0x4(%rbp),%rsi
call   1030 <rdReg@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ons_get_hw_table_size>:
push   %rax
lea    0x4(%rsp),%rsi
mov    $0x4b000010,%edi
call   1030 <rdReg@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ons_get_hw_table_size() {
%1 = alloca i32
%2 = call i32 @rdReg(i32 1258291216, i32* %1)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @ons_get_hw_table_size() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @rdReg(i32 1258291216, i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}
/* Variables and functions */
char *Info_ValueForKey(char *, char *);
char *UI_GetBotInfoByNumber(int);
char *UI_GetBotNameByNumber(int num) {
  char *info = UI_GetBotInfoByNumber(num);
  if (info)
    return Info_ValueForKey(info, "name");
  return "";
}


x86 assembly (clang, -O0):
<UI_GetBotNameByNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <UI_GetBotInfoByNumber@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115b <UI_GetBotNameByNumber+0x3b>
mov    -0x18(%rbp),%rdi
lea    0xeb3(%rip),%rsi
call   1030 <Info_ValueForKey@plt>
mov    %rax,-0x8(%rbp)
jmp    1166 <UI_GetBotNameByNumber+0x46>
lea    0xea2(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_GetBotNameByNumber>:
push   %rax
call   1040 <UI_GetBotInfoByNumber@plt>
test   %rax,%rax
je     113b <UI_GetBotNameByNumber+0x1b>
lea    0xece(%rip),%rsi
mov    %rax,%rdi
pop    %rax
jmp    1030 <Info_ValueForKey@plt>
lea    0xec2(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"name\00"
@.str.1 = [1 x i8] zeroinitializer
define i8* @UI_GetBotNameByNumber(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i8* @UI_GetBotInfoByNumber(i32 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = call i8* @Info_ValueForKey(i8* %10, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i8* %11, i8** %2
br label %13
12: ; preds = %1
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %13
13: ; preds = %12, %9
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
@.str = [5 x i8] c"name\00"
@.str.1 = [1 x i8] zeroinitializer
define i8* @UI_GetBotNameByNumber(i32 %0) {
%2 = tail call i8* @UI_GetBotInfoByNumber(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i8* @Info_ValueForKey(i8* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
%7 = phi i8* [ %5, %4 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), %1 ]
ret i8* %7
}
void fadump_cleanup(void) {}


x86 assembly (clang, -O0):
<fadump_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fadump_cleanup>:
ret

LLVM IR (-O0):
define void @fadump_cleanup() {
ret void
}

LLVM IR (-O2):
define void @fadump_cleanup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void lexer_test() { printf("Lexer test!\n"); }


x86 assembly (clang, -O0):
<lexer_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lexer_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Lexer test!\0A\00"
define void @lexer_test() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"Lexer test!\00"
define void @lexer_test() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}