xunge/DecIR huggingface dataset:
/* Type definitions */
struct type_def_cell {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void type_def_cell_copy_val(struct type_def_cell *self, void *src, void *dest) {
  assert(0);
}


x86 assembly (clang, -O0):
<type_def_cell_copy_val>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_def_cell_copy_val>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
%struct.type_def_cell = type { i32 }
define void @type_def_cell_copy_val(%struct.type_def_cell* %0, i8* %1, i8* %2) {
%4 = alloca %struct.type_def_cell*
%5 = alloca i8*
%6 = alloca i8*
store %struct.type_def_cell* %0, %struct.type_def_cell** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
%struct.type_def_cell = type { i32 }
define void @type_def_cell_copy_val(%struct.type_def_cell* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32 @assert(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_210() {
  Assert_real((isqrt(210) == 14),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1055, ("Integer square root of 210 should be 14"));
}


x86 assembly (clang, -O0):
<t_sqrt_210>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd2,%edi
call   1030 <isqrt@plt>
cmp    $0xe,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x41f,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_210>:
push   %rax
mov    $0xd2,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xe,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x41f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 210 should be 14\00"
define void @t_sqrt_210() {
%1 = call i32 @isqrt(i32 210)
%2 = icmp eq i32 %1, 14
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1055, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 210 should be 14\00"
define void @t_sqrt_210() {
%1 = tail call i32 @isqrt(i32 210)
%2 = icmp eq i32 %1, 14
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1055, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int *init_numb(int *v) {
  int i = 0;
  for (i = 0; i < 10; i++)
    v[i] = i;
  return v;
}


x86 assembly (clang, -O0):
<init_numb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    113c <init_numb+0x3c>
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <init_numb+0x16>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_numb>:
mov    %rdi,%rax
movaps 0xef6(%rip),%xmm0
movups %xmm0,(%rdi)
movaps 0xefc(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movabs $0x900000008,%rcx
mov    %rcx,0x20(%rdi)
ret

LLVM IR (-O0):
define i32* @init_numb(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
store i32 %8, i32* %12
br label %13
13: ; preds = %7
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32*, i32** %2
ret i32* %17
}

LLVM IR (-O2):
define i32* @init_numb(i32* returned writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32>* %2
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = bitcast i32* %3 to <4 x i32>*
store <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32>* %4
%5 = getelementptr inbounds i32, i32* %0, i64 8
store i32 8, i32* %5
%6 = getelementptr inbounds i32, i32* %0, i64 9
store i32 9, i32* %6
ret i32* %0
}
void glPauseTransformFeedback(void) { return; }


x86 assembly (clang, -O0):
<glPauseTransformFeedback>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glPauseTransformFeedback>:
ret

LLVM IR (-O0):
define void @glPauseTransformFeedback() {
ret void
}

LLVM IR (-O2):
define void @glPauseTransformFeedback() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lgen2(char *, int, int);
void cgcase(int v, int l) { lgen2(".long\t%d,%c%d", v, l); }


x86 assembly (clang, -O0):
<cgcase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <lgen2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgcase>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <lgen2@plt>

LLVM IR (-O0):
@.str = [14 x i8] c".long\09%d,%c%d\00"
define void @cgcase(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @lgen2(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c".long\09%d,%c%d\00"
define void @cgcase(i32 %0, i32 %1) {
%3 = tail call i32 @lgen2(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret void
}
/* Variables and functions */
unsigned char readMem8(unsigned short);
unsigned short readMem16(unsigned short addr) {
  unsigned char lo = readMem8(addr + 0);
  unsigned char hi = readMem8(addr + 1);
  return lo | (hi << 8);
}


x86 assembly (clang, -O0):
<readMem16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x0,%eax
movzwl %ax,%edi
call   1030 <readMem8@plt>
mov    %al,-0x3(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x1,%eax
movzwl %ax,%edi
call   1030 <readMem8@plt>
mov    %al,-0x4(%rbp)
movzbl -0x3(%rbp),%eax
movzbl -0x4(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readMem16>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <readMem8@plt>
mov    %eax,%ebp
add    $0x1,%ebx
movzwl %bx,%edi
call   1030 <readMem8@plt>
movzbl %bpl,%ecx
movzbl %al,%eax
shl    $0x8,%eax
or     %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i16 @readMem16(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
%4 = alloca i8
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = zext i16 %5 to i32
%7 = add nsw i32 %6, 0
%8 = trunc i32 %7 to i16
%9 = call zeroext i8 @readMem8(i16 zeroext %8)
store i8 %9, i8* %3
%10 = load i16, i16* %2
%11 = zext i16 %10 to i32
%12 = add nsw i32 %11, 1
%13 = trunc i32 %12 to i16
%14 = call zeroext i8 @readMem8(i16 zeroext %13)
store i8 %14, i8* %4
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = or i32 %16, %19
%21 = trunc i32 %20 to i16
ret i16 %21
}

LLVM IR (-O2):
define zeroext i16 @readMem16(i16 zeroext %0) {
%2 = tail call zeroext i8 @readMem8(i16 zeroext %0)
%3 = add i16 %0, 1
%4 = tail call zeroext i8 @readMem8(i16 zeroext %3)
%5 = zext i8 %2 to i16
%6 = zext i8 %4 to i16
%7 = shl nuw i16 %6, 8
%8 = or i16 %7, %5
ret i16 %8
}
/* Variables and functions */
int con_printf(char *, char *);
int con_puts(char *str) { return con_printf("%s\n", str); }


x86 assembly (clang, -O0):
<con_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <con_printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<con_puts>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <con_printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @con_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @con_printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @con_puts(i8* %0) {
%2 = tail call i32 @con_printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
/* Variables and functions */
int do_u_strncase_equal(char const *, char const *, size_t, int /*<<< orphan*/);
int u_strncase_equal(const char *a, const char *b, size_t len) {
  return do_u_strncase_equal(a, b, len, 0);
}


x86 assembly (clang, -O0):
<u_strncase_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <do_u_strncase_equal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_strncase_equal>:
xor    %ecx,%ecx
jmp    1030 <do_u_strncase_equal@plt>

LLVM IR (-O0):
define i32 @u_strncase_equal(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @do_u_strncase_equal(i8* %7, i8* %8, i64 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @u_strncase_equal(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @do_u_strncase_equal(i8* %0, i8* %1, i64 %2, i32 0)
ret i32 %4
}
/* Variables and functions */
int ReadConfigReg(unsigned int);
int /*<<< orphan*/ SetConfigReg(unsigned int, int);
int /*<<< orphan*/ printf(char *, int);
void SetConfigBit(unsigned int ConfigAddr, int BitPos, int BitValue) {
  int Register = ReadConfigReg(ConfigAddr);
  if (0)
    printf("RMW Read: %0x...\n", Register);
  if (BitValue) {
    Register = Register | (1 << BitPos);
  } else {
    Register = Register & ~(1 << BitPos);
  }
  if (0)
    printf("RMW Write: %0x...\n", Register);
  SetConfigReg(ConfigAddr, Register);
}


x86 assembly (clang, -O0):
<SetConfigBit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ReadConfigReg@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115f <SetConfigBit+0x3f>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
jmp    1176 <SetConfigBit+0x56>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <SetConfigReg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetConfigBit>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <ReadConfigReg@plt>
mov    %eax,%esi
bts    %ebp,%esi
btr    %ebp,%eax
test   %r14d,%r14d
cmove  %eax,%esi
mov    %ebx,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <SetConfigReg@plt>

LLVM IR (-O0):
define void @SetConfigBit(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = call i32 @ReadConfigReg(i32 %8)
store i32 %9, i32* %7
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %3
%13 = load i32, i32* %7
%14 = load i32, i32* %5
%15 = shl i32 1, %14
%16 = or i32 %13, %15
store i32 %16, i32* %7
br label %23
17: ; preds = %3
%18 = load i32, i32* %7
%19 = load i32, i32* %5
%20 = shl i32 1, %19
%21 = xor i32 %20, -1
%22 = and i32 %18, %21
store i32 %22, i32* %7
br label %23
23: ; preds = %17, %12
%24 = load i32, i32* %4
%25 = load i32, i32* %7
%26 = call i32 @SetConfigReg(i32 %24, i32 %25)
ret void
}

LLVM IR (-O2):
define void @SetConfigBit(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @ReadConfigReg(i32 %0)
%5 = icmp eq i32 %2, 0
%6 = shl nuw i32 1, %1
%7 = or i32 %4, %6
%8 = xor i32 %6, -1
%9 = and i32 %4, %8
%10 = select i1 %5, i32 %9, i32 %7
%11 = tail call i32 @SetConfigReg(i32 %0, i32 %10)
ret void
}
I0AX1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if (22 <= (((unsigned short *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<I0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0x10(%rbp),%rcx
mov    $0xa98ac7,%eax
movzwl (%rax,%rcx,2),%ecx
mov    $0x16,%eax
cmp    %ecx,%eax
jg     1145 <I0AX1+0x45>
movl   $0x1,-0x4(%rbp)
jmp    114c <I0AX1+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I0AX1>:
movslq %ecx,%rcx
xor    %eax,%eax
cmpw   $0x16,0xa98ac7(%rcx,%rcx,1)
setae  %al
ret

LLVM IR (-O0):
define i32 @I0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i32, i32* %11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %17
%19 = load i16, i16* %18
%20 = zext i16 %19 to i32
%21 = icmp sle i32 22, %20
br i1 %21, label %22, label %23
22: ; preds = %6
store i32 1, i32* %7
br label %24
23: ; preds = %6
store i32 0, i32* %7
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %7
ret i32 %25
}

LLVM IR (-O2):
define i32 @I0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %7
%9 = load i16, i16* %8
%10 = icmp ugt i16 %9, 21
%11 = zext i1 %10 to i32
ret i32 %11
}
void unsigned_char_shl_signed_char_unsigned_int(unsigned char *LHS,
                                                unsigned int RHS) {
  (*LHS) <<= RHS;
}


x86 assembly (clang, -O0):
<unsigned_char_shl_signed_char_unsigned_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
shl    %cl,%edx
mov    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_char_shl_signed_char_unsigned_int>:
mov    %esi,%ecx
movzbl (%rdi),%eax
shl    %cl,%eax
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @unsigned_char_shl_signed_char_unsigned_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl i32 %8, %5
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
ret void
}

LLVM IR (-O2):
define void @unsigned_char_shl_signed_char_unsigned_int(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = shl i32 %4, %1
%6 = trunc i32 %5 to i8
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ c();
void b(void) { c(); }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <c@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
xor    %eax,%eax
jmp    1030 <c@plt>

LLVM IR (-O0):
define void @b() {
%1 = call i32 (...) @c()
ret void
}

LLVM IR (-O2):
define void @b() {
%1 = tail call i32 (...) @c()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void output_delimiters(char delimiter, int column_count) {
  while (column_count--)
    printf("%c", delimiter);
}


x86 assembly (clang, -O0):
<output_delimiters>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     114a <output_delimiters+0x3a>
lea    0xec4(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <printf@plt>
jmp    1121 <output_delimiters+0x11>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_delimiters>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
je     113f <output_delimiters+0x2f>
mov    %esi,%ebx
movsbl %dil,%ebp
lea    0xedb(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
jne    1130 <output_delimiters+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @output_delimiters(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i8, i8* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %10)
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @output_delimiters(i8 signext %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = add nsw i32 %5, -1
%7 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %0)
%8 = icmp eq i32 %6, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nocc_pinternal(char *, char *, int);
void *occampi_bool_hook(int);
void *occampi_booltrue_hook(void *zero) {
  if (zero) {
    nocc_pinternal(("occampi_booltrue_hook(): got a non-null value!"),
                   "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                   "outputs/2022-01-22/02-19-57/repos/concurrency/nocc/refs/"
                   "heads/master/frontend/occampi_lit.c",
                   527);
  }
  return occampi_bool_hook(1);
}


x86 assembly (clang, -O0):
<occampi_booltrue_hook>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114f <occampi_booltrue_hook+0x2f>
lea    0xec2(%rip),%rdi
lea    0xeea(%rip),%rsi
mov    $0x20f,%edx
call   1040 <nocc_pinternal@plt>
mov    $0x1,%edi
call   1030 <occampi_bool_hook@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<occampi_booltrue_hook>:
test   %rdi,%rdi
je     1142 <occampi_booltrue_hook+0x22>
push   %rax
lea    0xed3(%rip),%rdi
lea    0xefb(%rip),%rsi
mov    $0x20f,%edx
call   1040 <nocc_pinternal@plt>
add    $0x8,%rsp
mov    $0x1,%edi
jmp    1030 <occampi_bool_hook@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"occampi_booltrue_hook(): got a non-null value!\00"
@.str.1 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/concurrency/nocc/refs/heads/master/frontend/occampi_lit.c\00"
define i8* @occampi_booltrue_hook(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @nocc_pinternal(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.1, i64 0, i64 0), i32 527)
br label %7
7: ; preds = %5, %1
%8 = call i8* @occampi_bool_hook(i32 1)
ret i8* %8
}

LLVM IR (-O2):
@.str = [47 x i8] c"occampi_booltrue_hook(): got a non-null value!\00"
@.str.1 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/concurrency/nocc/refs/heads/master/frontend/occampi_lit.c\00"
define i8* @occampi_booltrue_hook(i8* readnone %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @nocc_pinternal(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.1, i64 0, i64 0), i32 527)
br label %5
5: ; preds = %3, %1
%6 = tail call i8* @occampi_bool_hook(i32 1)
ret i8* %6
}
int test_imm_4Cint64_midword_reg(long long val) {
  return ((val >> 16) & (0x4C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Cint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x4c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Cint64_midword_reg>:
test   $0x4c0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Cint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 76
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Cint64_midword_reg(i64 %0) {
%2 = and i64 %0, 4980736
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int getaline(char *, int);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ reverse(char *, int);
int main(void) {
  int len;
  char line[10000];
  while ((len = getaline(line, 10000)) > 0) {
    reverse(line, len);
    printf("%s", line);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x2720,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x2720(%rbp),%rdi
mov    $0x2710,%esi
call   1040 <getaline@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    1186 <main+0x56>
lea    -0x2720(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1030 <reverse@plt>
lea    -0x2720(%rbp),%rsi
lea    0xe84(%rip),%rdi
call   1050 <printf@plt>
jmp    1142 <main+0x12>
xor    %eax,%eax
add    $0x2720,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x2718,%rsp
mov    %rsp,%rdi
mov    $0x2710,%esi
call   1040 <getaline@plt>
test   %eax,%eax
jle    1186 <main+0x56>
mov    %rsp,%rbx
lea    0xeab(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <reverse@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1050 <printf@plt>
mov    %rbx,%rdi
mov    $0x2710,%esi
call   1040 <getaline@plt>
test   %eax,%eax
jg     1160 <main+0x30>
xor    %eax,%eax
add    $0x2718,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [10000 x i8]
store i32 0, i32* %1
br label %4
4: ; preds = %8, %0
%5 = getelementptr inbounds [10000 x i8], [10000 x i8]* %3, i64 0, i64 0
%6 = call i32 @getaline(i8* %5, i32 10000)
store i32 %6, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = getelementptr inbounds [10000 x i8], [10000 x i8]* %3, i64 0, i64 0
%10 = load i32, i32* %2
%11 = call i32 @reverse(i8* %9, i32 %10)
%12 = getelementptr inbounds [10000 x i8], [10000 x i8]* %3, i64 0, i64 0
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %12)
br label %4
14: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [10000 x i8]
%2 = getelementptr inbounds [10000 x i8], [10000 x i8]* %1, i64 0, i64 0
%3 = call i32 @getaline(i8* %2, i32 10000)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %0, %5
%6 = phi i32 [ %9, %5 ], [ %3, %0 ]
%7 = call i32 @reverse(i8* %2, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%9 = call i32 @getaline(i8* %2, i32 10000)
%10 = icmp sgt i32 %9, 0
br i1 %10, label %5, label %11
11: ; preds = %5, %0
ret i32 0
}
/* Variables and functions */
int usage();
int invalid_input(int n) {
  int v = n;
  if (n < 16)
    return usage();
  while (!((unsigned)v & (unsigned)1))
    v >>= 1;
  if (v != 1)
    return usage();
  return 0;
}


x86 assembly (clang, -O0):
<invalid_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x10,-0x8(%rbp)
jge    113a <invalid_input+0x2a>
mov    $0x0,%al
call   1030 <usage@plt>
mov    %eax,-0x4(%rbp)
jmp    1188 <invalid_input+0x78>
jmp    113f <invalid_input+0x2f>
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    115a <invalid_input+0x4a>
jmp    1168 <invalid_input+0x58>
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113f <invalid_input+0x2f>
cmpl   $0x1,-0xc(%rbp)
je     1181 <invalid_input+0x71>
mov    $0x0,%al
call   1030 <usage@plt>
mov    %eax,-0x4(%rbp)
jmp    1188 <invalid_input+0x78>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalid_input>:
cmp    $0x10,%edi
jl     1130 <invalid_input+0x20>
cs nopw 0x0(%rax,%rax,1)
nop
mov    %edi,%eax
sar    %edi
test   $0x1,%al
je     1120 <invalid_input+0x10>
cmp    $0x1,%eax
jne    1130 <invalid_input+0x20>
xor    %eax,%eax
ret
xor    %eax,%eax
jmp    1030 <usage@plt>

LLVM IR (-O0):
define i32 @invalid_input(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
store i32 %5, i32* %4
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 16
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @usage()
store i32 %9, i32* %2
br label %25
10: ; preds = %1
br label %11
11: ; preds = %16, %10
%12 = load i32, i32* %4
%13 = and i32 %12, 1
%14 = icmp ne i32 %13, 0
%15 = xor i1 %14, true
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i32, i32* %4
%18 = ashr i32 %17, 1
store i32 %18, i32* %4
br label %11
19: ; preds = %11
%20 = load i32, i32* %4
%21 = icmp ne i32 %20, 1
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = call i32 (...) @usage()
store i32 %23, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %22, %8
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @invalid_input(i32 %0) {
%2 = icmp slt i32 %0, 16
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
%7 = ashr i32 %4, 1
br i1 %6, label %3, label %8
8: ; preds = %3
%9 = icmp eq i32 %4, 1
br i1 %9, label %12, label %10
10: ; preds = %8, %1
%11 = tail call i32 (...) @usage()
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ 0, %8 ], [ %11, %10 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void fatal_error(char *s) {
  fprintf(stderr, "%s", s);
  exit(1);
}


x86 assembly (clang, -O0):
<fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal_error>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @fatal_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @fatal_error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ execv(char *, char **);
int /*<<< orphan*/ exit(int);
int main(void) {
  char *av[1];
  av[0] = NULL;
  execv("/usr/local/vocp/bin/pwcheck.pl", av);
  exit(254);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
lea    -0x10(%rbp),%rsi
lea    0xebe(%rip),%rdi
call   1040 <execv@plt>
mov    $0xfe,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
movq   $0x0,(%rsp)
lea    0xed0(%rip),%rdi
mov    %rsp,%rsi
call   1040 <execv@plt>
mov    $0xfe,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"/usr/local/vocp/bin/pwcheck.pl\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [1 x i8*]
store i32 0, i32* %1
%3 = getelementptr inbounds [1 x i8*], [1 x i8*]* %2, i64 0, i64 0
store i8* null, i8** %3
%4 = getelementptr inbounds [1 x i8*], [1 x i8*]* %2, i64 0, i64 0
%5 = call i32 @execv(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8** %4)
%6 = call i32 @exit(i32 254)
unreachable
}

LLVM IR (-O2):
@.str = [31 x i8] c"/usr/local/vocp/bin/pwcheck.pl\00"
define i32 @main() {
%1 = alloca [1 x i8*]
%2 = bitcast [1 x i8*]* %1 to i8*
%3 = getelementptr inbounds [1 x i8*], [1 x i8*]* %1, i64 0, i64 0
store i8* null, i8** %3
%4 = call i32 @execv(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8** %3)
%5 = call i32 @exit(i32 254)
unreachable
}
void m(double x) {}


x86 assembly (clang, -O0):
<m>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<m>:
ret

LLVM IR (-O0):
define void @m(double %0) {
%2 = alloca double
store double %0, double* %2
ret void
}

LLVM IR (-O2):
define void @m(double %0) {
ret void
}
int isParam(char *param) {
  return param == (char *)0 || param == (char *)-1 ? 0 : 1;
}


x86 assembly (clang, -O0):
<isParam>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1129 <isParam+0x29>
mov    $0xffffffffffffffff,%rax
cmp    %rax,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%dl
mov    $0x1,%eax
xor    %ecx,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isParam>:
add    $0x1,%rdi
xor    %eax,%eax
cmp    $0x2,%rdi
setae  %al
ret

LLVM IR (-O0):
define i32 @isParam(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = icmp eq i8* %6, inttoptr (i64 -1 to i8*)
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 0, i32 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @isParam(i8* readnone %0) {
%2 = icmp ne i8* %0, null
%3 = icmp ne i8* %0, inttoptr (i64 -1 to i8*)
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
struct ql_adapter {
  int dummy;
};

/* Variables and functions */
int ql_idc_wait(struct ql_adapter *);
int ql_mb_set_port_cfg(struct ql_adapter *);
int /*<<< orphan*/ rtnl_lock();
int /*<<< orphan*/ rtnl_unlock();
int ql_set_port_cfg(struct ql_adapter *qdev) {
  int status;
  rtnl_lock();
  status = ql_mb_set_port_cfg(qdev);
  rtnl_unlock();
  if (status)
    return status;
  status = ql_idc_wait(qdev);
  return status;
}


x86 assembly (clang, -O0):
<ql_set_port_cfg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rtnl_lock@plt>
mov    -0x10(%rbp),%rdi
call   1040 <ql_mb_set_port_cfg@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1060 <rtnl_unlock@plt>
cmpl   $0x0,-0x14(%rbp)
je     117b <ql_set_port_cfg+0x3b>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    118d <ql_set_port_cfg+0x4d>
mov    -0x10(%rbp),%rdi
call   1050 <ql_idc_wait@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ql_set_port_cfg>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <rtnl_lock@plt>
mov    %rbx,%rdi
call   1040 <ql_mb_set_port_cfg@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1060 <rtnl_unlock@plt>
test   %ebp,%ebp
je     116b <ql_set_port_cfg+0x2b>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <ql_idc_wait@plt>

LLVM IR (-O0):
%struct.ql_adapter = type { i32 }
define i32 @ql_set_port_cfg(%struct.ql_adapter* %0) {
%2 = alloca i32
%3 = alloca %struct.ql_adapter*
%4 = alloca i32
store %struct.ql_adapter* %0, %struct.ql_adapter** %3
%5 = call i32 (...) @rtnl_lock()
%6 = load %struct.ql_adapter*, %struct.ql_adapter** %3
%7 = call i32 @ql_mb_set_port_cfg(%struct.ql_adapter* %6)
store i32 %7, i32* %4
%8 = call i32 (...) @rtnl_unlock()
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i32, i32* %4
store i32 %12, i32* %2
br label %17
13: ; preds = %1
%14 = load %struct.ql_adapter*, %struct.ql_adapter** %3
%15 = call i32 @ql_idc_wait(%struct.ql_adapter* %14)
store i32 %15, i32* %4
%16 = load i32, i32* %4
store i32 %16, i32* %2
br label %17
17: ; preds = %13, %11
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
%struct.ql_adapter = type { i32 }
define i32 @ql_set_port_cfg(%struct.ql_adapter* %0) {
%2 = tail call i32 (...) @rtnl_lock()
%3 = tail call i32 @ql_mb_set_port_cfg(%struct.ql_adapter* %0)
%4 = tail call i32 (...) @rtnl_unlock()
%5 = icmp eq i32 %3, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @ql_idc_wait(%struct.ql_adapter* %0)
br label %8
8: ; preds = %1, %6
%9 = phi i32 [ %7, %6 ], [ %3, %1 ]
ret i32 %9
}
unsigned char clower(c)
register int c;
{ return (unsigned char)((((c) <= 0177) && isupper(c)) ? tolower(c) : c); }


x86 assembly (clang, -O0):
<clower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x7f,-0x4(%rbp)
jg     1156 <clower+0x36>
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%eax
je     1156 <clower+0x36>
mov    -0x4(%rbp),%edi
call   1030 <tolower@plt>
mov    %eax,-0x8(%rbp)
jmp    115c <clower+0x3c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clower>:
push   %rbx
mov    %edi,%ebx
cmp    $0x7f,%edi
jg     113c <clower+0x1c>
mov    %ebx,%edi
call   1040 <isupper@plt>
test   %eax,%eax
je     113c <clower+0x1c>
mov    %ebx,%edi
call   1030 <tolower@plt>
mov    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @clower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 127
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @isupper(i32 %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i32, i32* %2
%11 = call i32 @tolower(i32 %10)
br label %14
12: ; preds = %5, %1
%13 = load i32, i32* %2
br label %14
14: ; preds = %12, %9
%15 = phi i32 [ %11, %9 ], [ %13, %12 ]
%16 = trunc i32 %15 to i8
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @clower(i32 %0) {
%2 = icmp slt i32 %0, 128
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = tail call i32 @isupper(i32 %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @tolower(i32 %0)
br label %8
8: ; preds = %1, %3, %6
%9 = phi i32 [ %7, %6 ], [ %0, %3 ], [ %0, %1 ]
%10 = trunc i32 %9 to i8
ret i8 %10
}
unsigned xrop3_5_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D | T;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_5_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_5_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
not    %esi
shl    $0x8,%esi
not    %eax
and    %esi,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_5_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %7
%23 = or i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = xor i32 %24, -1
store i32 %25, i32* %8
%26 = load i32, i32* %8
%27 = load i32, i32* %6
%28 = xor i32 %27, -1
%29 = and i32 %26, %28
%30 = load i32, i32* %5
%31 = load i32, i32* %6
%32 = and i32 %30, %31
%33 = or i32 %29, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_5_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = xor i32 %5, -1
%7 = shl nsw i32 %6, 8
%8 = xor i32 %4, -1
%9 = and i32 %7, %8
%10 = or i32 %9, %3
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int);
char assert(char exp, const char *func, int line) {
  if (exp != 1) {
    printf("** %s ** : Assertion failed in test.c line %d\n", func, line);
  }
  return exp;
}


x86 assembly (clang, -O0):
<assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x1,%eax
je     1145 <assert+0x35>
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
movsbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert>:
push   %rbx
mov    %edi,%ebx
cmp    $0x1,%bl
je     1124 <assert+0x14>
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"** %s ** : Assertion failed in test.c line %d\0A\00"
define signext i8 @assert(i8 signext %0, i8* %1, i32 %2) {
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i32
store i8 %0, i8* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %11, i32 %12)
br label %14
14: ; preds = %10, %3
%15 = load i8, i8* %4
ret i8 %15
}

LLVM IR (-O2):
@.str = [47 x i8] c"** %s ** : Assertion failed in test.c line %d\0A\00"
define signext i8 @assert(i8 returned signext %0, i8* %1, i32 %2) {
%4 = icmp eq i8 %0, 1
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
br label %7
7: ; preds = %5, %3
ret i8 %0
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRINVERTREGION_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 1, torev);
}


x86 assembly (clang, -O0):
<U_WMRINVERTREGION_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRINVERTREGION_swap>:
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRINVERTREGION_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 1, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRINVERTREGION_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 1, i32 %1)
ret void
}
int is_space(char __ch) {
  if (__ch == ' ' || __ch == '\n' || __ch == '\t' || __ch == '\r') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_space>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
je     113e <is_space+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
je     113e <is_space+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x9,%eax
je     113e <is_space+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0xd,%eax
jne    114a <is_space+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <is_space+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_space>:
cmp    $0x20,%dil
ja     1120 <is_space+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100002600,%rdx
bt     %rcx,%rdx
jae    1120 <is_space+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_space(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 32
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 10
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 13
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i32 1, i32* %2
br label %21
20: ; preds = %15
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_space(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %3
i8 13, label %3
i8 10, label %3
i8 9, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
void kbase_rk_dvfs_term(struct kbase_device *kbdev) {}


x86 assembly (clang, -O0):
<kbase_rk_dvfs_term>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kbase_rk_dvfs_term>:
ret

LLVM IR (-O0):
%struct.kbase_device = type opaque
define void @kbase_rk_dvfs_term(%struct.kbase_device* %0) {
%2 = alloca %struct.kbase_device*
store %struct.kbase_device* %0, %struct.kbase_device** %2
ret void
}

LLVM IR (-O2):
%struct.kbase_device = type opaque
define void @kbase_rk_dvfs_term(%struct.kbase_device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ echo_nl(char const *);
int /*<<< orphan*/ printf(char *);
int echo(const char *str) {
  echo_nl(str);
  printf("\n");
  return (0);
}


x86 assembly (clang, -O0):
<echo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <echo_nl@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<echo>:
push   %rax
call   1040 <echo_nl@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @echo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @echo_nl(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @echo(i8* %0) {
%2 = tail call i32 @echo_nl(i8* %0)
%3 = tail call i32 @putchar(i32 10)
ret i32 0
}
unsigned long int ulmax(unsigned long int x, unsigned long int y) {
  if (x > y) {
    return x;
  }
  return y;
}


x86 assembly (clang, -O0):
<ulmax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1127 <ulmax+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <ulmax+0x2f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulmax>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmova  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ulmax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = load i64, i64* %5
%8 = icmp ugt i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i64, i64* %4
store i64 %10, i64* %3
br label %13
11: ; preds = %2
%12 = load i64, i64* %5
store i64 %12, i64* %3
br label %13
13: ; preds = %11, %9
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @ulmax(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int f357(int *);
int f358(int *p) { return f357(p); }


x86 assembly (clang, -O0):
<f358>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f357@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f358>:
jmp    1030 <f357@plt>

LLVM IR (-O0):
define i32 @f358(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f357(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f358(i32* %0) {
%2 = tail call i32 @f357(i32* %0)
ret i32 %2
}