xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint64_t Bits_maxBits64(uint32_t bitCount) {
  do {
  } while (0);
  return (((uint64_t)1) << bitCount) - 1;
}


x86 assembly (clang, -O0):
<Bits_maxBits64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    110c <Bits_maxBits64+0xc>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bits_maxBits64>:
mov    %edi,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @Bits_maxBits64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
%5 = load i32, i32* %2
%6 = shl i32 1, %5
%7 = sub nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @Bits_maxBits64(i32 %0) {
%2 = shl nsw i32 -1, %0
%3 = xor i32 %2, -1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void __thread_yield(void) { (void)sched_yield(); }


x86 assembly (clang, -O0):
<__thread_yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__thread_yield>:
xor    %eax,%eax
jmp    1030 <sched_yield@plt>

LLVM IR (-O0):
define void @__thread_yield() {
%1 = call i32 (...) @sched_yield()
ret void
}

LLVM IR (-O2):
define void @__thread_yield() {
%1 = tail call i32 (...) @sched_yield()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int int32_t;

/* Variables and functions */
int _pbcV_encode32(int, int /*<<< orphan*/ *);
int _pbcV_zigzag32(int32_t n, uint8_t buffer[10]) {
  n = (n << 1) ^ (n >> 31);
  return _pbcV_encode32(n, buffer);
}


x86 assembly (clang, -O0):
<_pbcV_zigzag32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1f,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <_pbcV_encode32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pbcV_zigzag32>:
lea    (%rdi,%rdi,1),%eax
sar    $0x1f,%edi
xor    %eax,%edi
jmp    1030 <_pbcV_encode32@plt>

LLVM IR (-O0):
define i32 @_pbcV_zigzag32(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 1
%7 = load i32, i32* %3
%8 = ashr i32 %7, 31
%9 = xor i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = load i32*, i32** %4
%12 = call i32 @_pbcV_encode32(i32 %10, i32* %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @_pbcV_zigzag32(i32 %0, i32* %1) {
%3 = shl i32 %0, 1
%4 = ashr i32 %0, 31
%5 = xor i32 %3, %4
%6 = tail call i32 @_pbcV_encode32(i32 %5, i32* %1)
ret i32 %6
}
void sched_autogroup_fork(struct signal_struct *sig) {}


x86 assembly (clang, -O0):
<sched_autogroup_fork>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_autogroup_fork>:
ret

LLVM IR (-O0):
%struct.signal_struct = type opaque
define void @sched_autogroup_fork(%struct.signal_struct* %0) {
%2 = alloca %struct.signal_struct*
store %struct.signal_struct* %0, %struct.signal_struct** %2
ret void
}

LLVM IR (-O2):
%struct.signal_struct = type opaque
define void @sched_autogroup_fork(%struct.signal_struct* nocapture %0) {
ret void
}
/* Type definitions */
struct cache_queue_policy_ {
  int dummy;
};
struct cache_policy_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ destroy_cache_queue_policy(struct cache_queue_policy_ *);
void destroy_cache_fifo_policy(struct cache_policy_ *policy) {
  struct cache_queue_policy_ *queue_policy;
  (void)0;
  queue_policy = (struct cache_queue_policy_ *)policy;
  destroy_cache_queue_policy(queue_policy);
  (void)0;
}


x86 assembly (clang, -O0):
<destroy_cache_fifo_policy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <destroy_cache_queue_policy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_cache_fifo_policy>:
jmp    1030 <destroy_cache_queue_policy@plt>

LLVM IR (-O0):
%struct.cache_policy_ = type { i32 }
%struct.cache_queue_policy_ = type { i32 }
define void @destroy_cache_fifo_policy(%struct.cache_policy_* %0) {
%2 = alloca %struct.cache_policy_*
%3 = alloca %struct.cache_queue_policy_*
store %struct.cache_policy_* %0, %struct.cache_policy_** %2
%4 = load %struct.cache_policy_*, %struct.cache_policy_** %2
%5 = bitcast %struct.cache_policy_* %4 to %struct.cache_queue_policy_*
store %struct.cache_queue_policy_* %5, %struct.cache_queue_policy_** %3
%6 = load %struct.cache_queue_policy_*, %struct.cache_queue_policy_** %3
%7 = call i32 @destroy_cache_queue_policy(%struct.cache_queue_policy_* %6)
ret void
}

LLVM IR (-O2):
%struct.cache_policy_ = type { i32 }
%struct.cache_queue_policy_ = type { i32 }
define void @destroy_cache_fifo_policy(%struct.cache_policy_* %0) {
%2 = bitcast %struct.cache_policy_* %0 to %struct.cache_queue_policy_*
%3 = tail call i32 @destroy_cache_queue_policy(%struct.cache_queue_policy_* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void signal_handler(int sig, siginfo_t *si, void *unused) {
  fprintf(stderr, "This is the signal handler of the user\n");
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_handler>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [40 x i8] c"This is the signal handler of the user\0A\00"
define void @signal_handler(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [40 x i8] c"This is the signal handler of the user\0A\00"
define void @signal_handler(i32 %0, i32* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}
void reportError(void *p) {}


x86 assembly (clang, -O0):
<reportError>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reportError>:
ret

LLVM IR (-O0):
define void @reportError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @reportError(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void print0(size_t count) {
  int i;
  for (i = 0; i < count; i++) {
    fprintf(stderr, "0");
  }
  fprintf(stderr, "\n");
}


x86 assembly (clang, -O0):
<print0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1154 <print0+0x44>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
lea    0xebf(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <print0+0x13>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9e(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print0>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1141 <print0+0x31>
mov    %rdi,%rbx
mov    0x2ebc(%rip),%r15
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15),%edi
mov    %r14,%rsi
call   1030 <fprintf@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <print0+0x20>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
lea    0xeb1(%rip),%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [2 x i8] c"0\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print0(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = load i64, i64* %2
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i32, i32* @stderr
%11 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* @stderr
%17 = call i32 @fprintf(i32 %16, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [2 x i8] c"0\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print0(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %7, %3 ], [ 0, %1 ]
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = add nuw i64 %4, 1
%8 = icmp eq i64 %7, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = load i32, i32* @stderr
%11 = tail call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int __original_creat64(char const *, int, int /*<<< orphan*/);
int /*<<< orphan*/ lic_fadv_dont(int);
int creat64(const char *pathname, int flags, mode_t mode) {
  int ret = -1;
  ret = __original_creat64(pathname, flags, mode);
  if (ret != -1)
    lic_fadv_dont(ret);
  return ret;
}


x86 assembly (clang, -O0):
<creat64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0xffffffff,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <__original_creat64@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     115d <creat64+0x3d>
mov    -0x14(%rbp),%edi
call   1030 <lic_fadv_dont@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<creat64>:
push   %rbx
call   1040 <__original_creat64@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
je     1134 <creat64+0x14>
mov    %ebx,%edi
call   1030 <lic_fadv_dont@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @creat64(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 -1, i32* %7
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @__original_creat64(i8* %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp ne i32 %12, -1
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* %7
%16 = call i32 @lic_fadv_dont(i32 %15)
br label %17
17: ; preds = %14, %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @creat64(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @__original_creat64(i8* %0, i32 %1, i32 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @lic_fadv_dont(i32 %4)
br label %8
8: ; preds = %6, %3
ret i32 %4
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
void tic(struct timeval *timer) { gettimeofday(timer, NULL); }


x86 assembly (clang, -O0):
<tic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tic>:
xor    %esi,%esi
jmp    1030 <gettimeofday@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define void @tic(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = call i32 @gettimeofday(%struct.timeval* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define void @tic(%struct.timeval* nocapture %0) {
%2 = tail call i32 @gettimeofday(%struct.timeval* %0, i32* null)
ret void
}
/* Variables and functions */
void *calloc(size_t, int);
void *hashids_alloc_f(size_t size) { return calloc(size, 1); }


x86 assembly (clang, -O0):
<hashids_alloc_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashids_alloc_f>:
mov    $0x1,%esi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @hashids_alloc_f(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @calloc(i64 %3, i32 1)
ret i8* %4
}

LLVM IR (-O2):
define i8* @hashids_alloc_f(i64 %0) {
%2 = tail call i8* @calloc(i64 %0, i32 1)
ret i8* %2
}
int fibo(int n) {
  if (n == 0 || n == 1)
    return 1;
  return fibo(n - 1) + fibo(n - 2);
}


x86 assembly (clang, -O0):
<fibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <fibo+0x1f>
cmpl   $0x1,-0x8(%rbp)
jne    113b <fibo+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115e <fibo+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibo@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jb     1145 <fibo+0x35>
mov    %edi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%edi
call   1030 <fibo@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1130 <fibo+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fibo(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @fibo(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fibo(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibo(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
void interrupt_ignore() {}


x86 assembly (clang, -O0):
<interrupt_ignore>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_ignore>:
ret

LLVM IR (-O0):
define void @interrupt_ignore() {
ret void
}

LLVM IR (-O2):
define void @interrupt_ignore() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCD_WriteChar(unsigned short);
void print_word(unsigned short int data) {
  LCD_WriteChar('0' + ((data & 0xF000) >> 12));
  LCD_WriteChar('0' + ((data & 0x0F00) >> 8));
  LCD_WriteChar('0' + ((data & 0x00F0) >> 4));
  LCD_WriteChar('0' + (data & 0x000F));
}


x86 assembly (clang, -O0):
<print_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xf000,%eax
sar    $0xc,%eax
add    $0x30,%eax
movzwl %ax,%edi
call   1030 <LCD_WriteChar@plt>
movzwl -0x2(%rbp),%eax
and    $0xf00,%eax
sar    $0x8,%eax
add    $0x30,%eax
movzwl %ax,%edi
call   1030 <LCD_WriteChar@plt>
movzwl -0x2(%rbp),%eax
and    $0xf0,%eax
sar    $0x4,%eax
add    $0x30,%eax
movzwl %ax,%edi
call   1030 <LCD_WriteChar@plt>
movzwl -0x2(%rbp),%eax
and    $0xf,%eax
add    $0x30,%eax
movzwl %ax,%edi
call   1030 <LCD_WriteChar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_word>:
push   %rbx
mov    %edi,%ebx
shr    $0xc,%edi
or     $0x30,%edi
call   1030 <LCD_WriteChar@plt>
mov    %ebx,%edi
shr    $0x8,%edi
and    $0xf,%edi
or     $0x30,%edi
call   1030 <LCD_WriteChar@plt>
mov    %ebx,%edi
shr    $0x4,%edi
and    $0xf,%edi
or     $0x30,%edi
call   1030 <LCD_WriteChar@plt>
and    $0xf,%ebx
or     $0x30,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <LCD_WriteChar@plt>

LLVM IR (-O0):
define void @print_word(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 61440
%6 = ashr i32 %5, 12
%7 = add nsw i32 48, %6
%8 = trunc i32 %7 to i16
%9 = call i32 @LCD_WriteChar(i16 zeroext %8)
%10 = load i16, i16* %2
%11 = zext i16 %10 to i32
%12 = and i32 %11, 3840
%13 = ashr i32 %12, 8
%14 = add nsw i32 48, %13
%15 = trunc i32 %14 to i16
%16 = call i32 @LCD_WriteChar(i16 zeroext %15)
%17 = load i16, i16* %2
%18 = zext i16 %17 to i32
%19 = and i32 %18, 240
%20 = ashr i32 %19, 4
%21 = add nsw i32 48, %20
%22 = trunc i32 %21 to i16
%23 = call i32 @LCD_WriteChar(i16 zeroext %22)
%24 = load i16, i16* %2
%25 = zext i16 %24 to i32
%26 = and i32 %25, 15
%27 = add nsw i32 48, %26
%28 = trunc i32 %27 to i16
%29 = call i32 @LCD_WriteChar(i16 zeroext %28)
ret void
}

LLVM IR (-O2):
define void @print_word(i16 zeroext %0) {
%2 = lshr i16 %0, 12
%3 = or i16 %2, 48
%4 = tail call i32 @LCD_WriteChar(i16 zeroext %3)
%5 = lshr i16 %0, 8
%6 = and i16 %5, 15
%7 = or i16 %6, 48
%8 = tail call i32 @LCD_WriteChar(i16 zeroext %7)
%9 = lshr i16 %0, 4
%10 = and i16 %9, 15
%11 = or i16 %10, 48
%12 = tail call i32 @LCD_WriteChar(i16 zeroext %11)
%13 = and i16 %0, 15
%14 = or i16 %13, 48
%15 = tail call i32 @LCD_WriteChar(i16 zeroext %14)
ret void
}
trim(str) char *str;
{
  register char *cp;
  cp = str;
  while (*cp)
    cp++;
  while (*--cp == ' ')
    ;
  cp++;
  *cp++ = '\n';
  *cp++ = 0;
}


x86 assembly (clang, -O0):
<trim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     112e <trim+0x2e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1110 <trim+0x10>
jmp    1133 <trim+0x33>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
movsbl -0x1(%rax),%eax
cmp    $0x20,%eax
jne    1154 <trim+0x54>
jmp    1133 <trim+0x33>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0xa,(%rax)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0x0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim>:
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1100 <trim>
nopl   0x0(%rax)
cmpb   $0x20,-0x2(%rdi)
lea    -0x1(%rdi),%rdi
je     1110 <trim+0x10>
movw   $0xa,(%rdi)
ret

LLVM IR (-O0):
define i32 @trim(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
br label %6
6: ; preds = %10, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
br label %6
13: ; preds = %6
br label %14
14: ; preds = %20, %13
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 -1
store i8* %16, i8** %4
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 32
br i1 %19, label %20, label %21
20: ; preds = %14
br label %14
21: ; preds = %14
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
%24 = load i8*, i8** %4
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %4
store i8 10, i8* %24
%26 = load i8*, i8** %4
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %4
store i8 0, i8* %26
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @trim(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2, %7
%8 = phi i8* [ %9, %7 ], [ %3, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 -1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 32
br i1 %11, label %7, label %12
12: ; preds = %7
%13 = getelementptr inbounds i8, i8* %8, i64 1
store i8 10, i8* %8
store i8 0, i8* %13
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t s500_readl(uint32_t *addr) {
  uint32_t val = 0;
  val = *addr;
  return val;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @s500_readl(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @s500_readl(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
int f3() {
  return (struct s8 { int i; }){0}.i;
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.s8 = type { i32 }
define i32 @f3() {
%1 = alloca %struct.s8
%2 = getelementptr inbounds %struct.s8, %struct.s8* %1, i32 0, i32 0
store i32 0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @f3() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int z1 = 15;
  int *p1;
  int **p2;
  int ***p3;
  p1 = &z1;
  p2 = &p1;
  p3 = &p2;
  printf("*p1 = %d\n", *p1);
  printf("**p2 = %d\n", **p2);
  printf("***p3 = %d\n", ***p3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xf,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
lea    -0x28(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
mov    -0x28(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%esi
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x30(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%esi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xf,%esi
call   1030 <printf@plt>
lea    0xee1(%rip),%rdi
mov    $0xf,%esi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
mov    $0xf,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"*p1 = %d\0A\00"
@.str.1 = [11 x i8] c"**p2 = %d\0A\00"
@.str.2 = [12 x i8] c"***p3 = %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32**
%9 = alloca i32***
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 15, i32* %6
store i32* %6, i32** %7
store i32** %7, i32*** %8
store i32*** %8, i32**** %9
%10 = load i32*, i32** %7
%11 = load i32, i32* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i32**, i32*** %8
%14 = load i32*, i32** %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %15)
%17 = load i32***, i32**** %9
%18 = load i32**, i32*** %17
%19 = load i32*, i32** %18
%20 = load i32, i32* %19
%21 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %20)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"*p1 = %d\0A\00"
@.str.1 = [11 x i8] c"**p2 = %d\0A\00"
@.str.2 = [12 x i8] c"***p3 = %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 15)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 15)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 15)
ret i32 0
}
int mvalue(int N) {
  int mval;
  if (N <= 10) {
    mval = N;
  } else if (N > 10 && N <= 20) {
    mval = 10;
  } else if (N > 20 && N <= 200) {
    mval = 15;
  } else if (N > 200) {
    mval = 20;
  }
  return mval;
}


x86 assembly (clang, -O0):
<mvalue>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jg     111c <mvalue+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1182 <mvalue+0x82>
cmpl   $0xa,-0x4(%rbp)
jle    113c <mvalue+0x3c>
cmpl   $0x14,-0x4(%rbp)
jg     113c <mvalue+0x3c>
movl   $0xa,-0x8(%rbp)
jmp    117d <mvalue+0x7d>
cmpl   $0x14,-0x4(%rbp)
jle    115f <mvalue+0x5f>
cmpl   $0xc8,-0x4(%rbp)
jg     115f <mvalue+0x5f>
movl   $0xf,-0x8(%rbp)
jmp    1178 <mvalue+0x78>
cmpl   $0xc8,-0x4(%rbp)
jle    1173 <mvalue+0x73>
movl   $0x14,-0x8(%rbp)
jmp    1178 <mvalue+0x78>
jmp    117d <mvalue+0x7d>
jmp    1182 <mvalue+0x82>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvalue>:
cmp    $0xb,%edi
jge    1108 <mvalue+0x8>
mov    %edi,%eax
ret
mov    $0xa,%eax
cmp    $0x15,%edi
jb     1123 <mvalue+0x23>
xor    %eax,%eax
cmp    $0xc9,%edi
setae  %al
lea    (%rax,%rax,4),%eax
add    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @mvalue(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 10
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %2
store i32 %7, i32* %3
br label %29
8: ; preds = %1
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 10
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 20
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 10, i32* %3
br label %28
15: ; preds = %11, %8
%16 = load i32, i32* %2
%17 = icmp sgt i32 %16, 20
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32, i32* %2
%20 = icmp sle i32 %19, 200
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 15, i32* %3
br label %27
22: ; preds = %18, %15
%23 = load i32, i32* %2
%24 = icmp sgt i32 %23, 200
br i1 %24, label %25, label %26
25: ; preds = %22
store i32 20, i32* %3
br label %26
26: ; preds = %25, %22
br label %27
27: ; preds = %26, %21
br label %28
28: ; preds = %27, %14
br label %29
29: ; preds = %28, %6
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @mvalue(i32 %0) {
%2 = icmp slt i32 %0, 11
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 21
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 201
%7 = select i1 %6, i32 15, i32 20
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ %0, %1 ], [ 10, %3 ], [ %7, %5 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x30() {
  Assert_real((isprint(48)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              245, ("isprint should be 1 for 0"));
}


x86 assembly (clang, -O0):
<t_isprint_0x30>:
push   %rbp
mov    %rsp,%rbp
mov    $0x30,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xf5,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x30>:
push   %rax
mov    $0x30,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0xf5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for 0\00"
define void @t_isprint_0x30() {
%1 = call i32 @isprint(i32 48)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 245, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for 0\00"
define void @t_isprint_0x30() {
%1 = tail call i32 @isprint(i32 48)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 245, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int atoi(char *);
int main(int argc, char **argv) { return atoi(argv[0]) + 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <atoi@plt>
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    (%rsi),%rdi
call   1030 <atoi@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 0
%8 = load i8*, i8** %7
%9 = call i32 @atoi(i8* %8)
%10 = add nsw i32 %9, 1
ret i32 %10
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @atoi(i8* %3)
%5 = add nsw i32 %4, 1
ret i32 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t double_bits16(uint32_t x) {
  x = ((x & 0xff00ff00) << 8) | (x & 0x00ff00ff);
  x = ((x & 0xf0f0f0f0) << 4) | (x & 0x0f0f0f0f);
  x = ((x & 0xcccccccc) << 2) | (x & 0x33333333);
  x = ((x & 0xaaaaaaaa) << 1) | (x & 0x55555555);
  return x | (x << 1);
}


x86 assembly (clang, -O0):
<double_bits16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00ff00,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00ff,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf0f0f0f0,%eax
shl    $0x4,%eax
mov    -0x4(%rbp),%ecx
and    $0xf0f0f0f,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xcccccccc,%eax
shl    $0x2,%eax
mov    -0x4(%rbp),%ecx
and    $0x33333333,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xaaaaaaaa,%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%ecx
and    $0x55555555,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_bits16>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
and    $0xff00ff,%eax
mov    %eax,%ecx
shl    $0x4,%ecx
or     %eax,%ecx
and    $0xf0f0f0f,%ecx
lea    0x0(,%rcx,4),%eax
or     %ecx,%eax
and    $0x33333333,%eax
lea    (%rax,%rax,1),%ecx
or     %eax,%ecx
and    $0x55555555,%ecx
lea    (%rcx,%rcx,2),%eax
ret

LLVM IR (-O0):
define i32 @double_bits16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -16711936
%5 = shl i32 %4, 8
%6 = load i32, i32* %2
%7 = and i32 %6, 16711935
%8 = or i32 %5, %7
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = and i32 %9, -252645136
%11 = shl i32 %10, 4
%12 = load i32, i32* %2
%13 = and i32 %12, 252645135
%14 = or i32 %11, %13
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = and i32 %15, -858993460
%17 = shl i32 %16, 2
%18 = load i32, i32* %2
%19 = and i32 %18, 858993459
%20 = or i32 %17, %19
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = and i32 %21, -1431655766
%23 = shl i32 %22, 1
%24 = load i32, i32* %2
%25 = and i32 %24, 1431655765
%26 = or i32 %23, %25
store i32 %26, i32* %2
%27 = load i32, i32* %2
%28 = load i32, i32* %2
%29 = shl i32 %28, 1
%30 = or i32 %27, %29
ret i32 %30
}

LLVM IR (-O2):
define i32 @double_bits16(i32 %0) {
%2 = shl i32 %0, 8
%3 = and i32 %2, 16711680
%4 = and i32 %0, 16711935
%5 = or i32 %3, %4
%6 = shl nuw nsw i32 %5, 4
%7 = and i32 %6, 251662080
%8 = and i32 %5, 983055
%9 = or i32 %7, %8
%10 = shl nuw nsw i32 %9, 2
%11 = and i32 %10, 808464432
%12 = and i32 %9, 50529027
%13 = or i32 %11, %12
%14 = shl nuw nsw i32 %13, 1
%15 = and i32 %14, 1145324612
%16 = and i32 %13, 286331153
%17 = or i32 %15, %16
%18 = mul nuw i32 %17, 3
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
int errno;
scalar_t__ waitpid(int, int *, int /*<<< orphan*/);
void chld_handler(int x) {
  int status, serrno;
  (void)x;
  serrno = errno;
  while (waitpid(-1, &status, WNOHANG) > 0)
    ;
  errno = serrno;
}


x86 assembly (clang, -O0):
<chld_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
lea    -0x8(%rbp),%rsi
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jle    114d <chld_handler+0x3d>
jmp    1127 <chld_handler+0x17>
mov    -0xc(%rbp),%ecx
mov    0x2e81(%rip),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chld_handler>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    0x2eba(%rip),%r14
mov    (%r14),%r15d
mov    0x2ec0(%rip),%rbp
lea    0x4(%rsp),%rbx
nopl   (%rax)
mov    0x0(%rbp),%edx
mov    $0xffffffff,%edi
mov    %rbx,%rsi
call   1030 <waitpid@plt>
test   %rax,%rax
jg     1130 <chld_handler+0x20>
mov    %r15d,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
@WNOHANG = global i32 0
define void @chld_handler(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* @errno
store i32 %6, i32* %4
br label %7
7: ; preds = %11, %1
%8 = load i32, i32* @WNOHANG
%9 = call i64 @waitpid(i32 -1, i32* %3, i32 %8)
%10 = icmp sgt i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
%13 = load i32, i32* %4
store i32 %13, i32* @errno
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@WNOHANG = global i32 0
define void @chld_handler(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @errno
br label %5
5: ; preds = %5, %1
%6 = load i32, i32* @WNOHANG
%7 = call i64 @waitpid(i32 -1, i32* %2, i32 %6)
%8 = icmp sgt i64 %7, 0
br i1 %8, label %5, label %9
9: ; preds = %5
store i32 %4, i32* @errno
ret void
}
/* Type definitions */
struct timer_list {
  int dummy;
};

/* Variables and functions */
int del_timer(struct timer_list *);
int del_timer_sync(struct timer_list *timer) { return del_timer(timer); }


x86 assembly (clang, -O0):
<del_timer_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <del_timer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_timer_sync>:
jmp    1030 <del_timer@plt>

LLVM IR (-O0):
%struct.timer_list = type { i32 }
define i32 @del_timer_sync(%struct.timer_list* %0) {
%2 = alloca %struct.timer_list*
store %struct.timer_list* %0, %struct.timer_list** %2
%3 = load %struct.timer_list*, %struct.timer_list** %2
%4 = call i32 @del_timer(%struct.timer_list* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.timer_list = type { i32 }
define i32 @del_timer_sync(%struct.timer_list* %0) {
%2 = tail call i32 @del_timer(%struct.timer_list* %0)
ret i32 %2
}
/* Variables and functions */
int strlen(char *);
int /*<<< orphan*/ toupper(char);
char *str_to_upper(char *string) {
  int len = strlen(string);
  char *s = string;
  while (len--) {
    char a = *string;
    *string++ = toupper(a);
  }
  return s;
}


x86 assembly (clang, -O0):
<str_to_upper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     117e <str_to_upper+0x5e>
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
movsbl -0x19(%rbp),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    1140 <str_to_upper+0x20>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_to_upper>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
call   1040 <strlen@plt>
test   %eax,%eax
je     1157 <str_to_upper+0x37>
mov    %eax,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1030 <toupper@plt>
mov    %al,(%r15,%rbx,1)
add    $0x1,%rbx
cmp    %ebx,%r14d
jne    1140 <str_to_upper+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @str_to_upper(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %3
%8 = load i8*, i8** %2
store i8* %8, i8** %4
br label %9
9: ; preds = %13, %1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, -1
store i32 %11, i32* %3
%12 = icmp ne i32 %10, 0
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
store i8 %15, i8* %5
%16 = load i8, i8* %5
%17 = call i32 @toupper(i8 signext %16)
%18 = trunc i32 %17 to i8
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
store i8 %18, i8* %19
br label %9
21: ; preds = %9
%22 = load i8*, i8** %4
ret i8* %22
}

LLVM IR (-O2):
define i8* @str_to_upper(i8* returned %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %11, %4 ], [ %0, %1 ]
%6 = phi i32 [ %7, %4 ], [ %2, %1 ]
%7 = add nsw i32 %6, -1
%8 = load i8, i8* %5
%9 = tail call i32 @toupper(i8 signext %8)
%10 = trunc i32 %9 to i8
%11 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %10, i8* %5
%12 = icmp eq i32 %7, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
ret i8* %0
}
/* Variables and functions */
int o_socket(int, int, int);
int f_socket(int domain, int type, int protocol) {
  return o_socket(domain, type, protocol);
}


x86 assembly (clang, -O0):
<f_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <o_socket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_socket>:
jmp    1030 <o_socket@plt>

LLVM IR (-O0):
define i32 @f_socket(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @o_socket(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @f_socket(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @o_socket(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
int af_sectors(int blocksize, int blocknumbers) {
  int af_size;
  af_size = blocksize * blocknumbers;
  af_size = (af_size + 511) / 512;
  af_size *= 512;
  return af_size;
}


x86 assembly (clang, -O0):
<af_sectors>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1ff,%eax
mov    $0x200,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x9,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<af_sectors>:
imul   %esi,%edi
lea    0x1ff(%rdi),%ecx
lea    0x3fe(%rdi),%eax
test   %ecx,%ecx
cmovns %ecx,%eax
and    $0xfffffe00,%eax
ret

LLVM IR (-O0):
define i32 @af_sectors(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 511
%11 = sdiv i32 %10, 512
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = mul nsw i32 %12, 512
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @af_sectors(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = add nsw i32 %3, 511
%5 = sdiv i32 %4, 512
%6 = shl nsw i32 %5, 9
ret i32 %6
}
void vpostOSDEnable(void) {
  *((volatile unsigned int *)((0xB0008000 + 0x00))) =
      (*((volatile unsigned int *)((0xB0008000 + 0x00)))) | (1 << 2);
}


x86 assembly (clang, -O0):
<vpostOSDEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0008000,%eax
mov    (%rax),%ecx
or     $0x4,%ecx
mov    $0xb0008000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpostOSDEnable>:
mov    $0xb0008000,%eax
orl    $0x4,(%rax)
ret

LLVM IR (-O0):
define void @vpostOSDEnable() {
%1 = load volatile i32, i32* inttoptr (i64 2952822784 to i32*)
%2 = or i32 %1, 4
store volatile i32 %2, i32* inttoptr (i64 2952822784 to i32*)
ret void
}

LLVM IR (-O2):
define void @vpostOSDEnable() {
%1 = load volatile i32, i32* inttoptr (i64 2952822784 to i32*)
%2 = or i32 %1, 4
store volatile i32 %2, i32* inttoptr (i64 2952822784 to i32*)
ret void
}
int f2(int x) { return ~(1U << x); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    %edi,%ecx
mov    $0xfffffffe,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 1, %3
%5 = xor i32 %4, -1
ret i32 %5
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
%2 = shl nuw i32 1, %0
%3 = xor i32 %2, -1
ret i32 %3
}
/* Type definitions */
struct event_base {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ AMCPrintf(char *);
int /*<<< orphan*/ _addDummyEvent(struct event_base *);
int /*<<< orphan*/ event_base_dispatch(struct event_base *);
void *_threadEventBaseDispatch(void *arg) {
  struct event_base *base = (struct event_base *)arg;
  _addDummyEvent(base);
  event_base_dispatch(base);
  AMCPrintf("ERROR: event dispatch ends!!!");
  return ((void *)0);
}


x86 assembly (clang, -O0):
<_threadEventBaseDispatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <_addDummyEvent@plt>
mov    -0x10(%rbp),%rdi
call   1050 <event_base_dispatch@plt>
lea    0xea3(%rip),%rdi
call   1040 <AMCPrintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_threadEventBaseDispatch>:
push   %rbx
mov    %rdi,%rbx
call   1030 <_addDummyEvent@plt>
mov    %rbx,%rdi
call   1050 <event_base_dispatch@plt>
lea    0xeb8(%rip),%rdi
call   1040 <AMCPrintf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.event_base = type { i32 }
@.str = [30 x i8] c"ERROR: event dispatch ends!!!\00"
define i8* @_threadEventBaseDispatch(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.event_base*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.event_base*
store %struct.event_base* %5, %struct.event_base** %3
%6 = load %struct.event_base*, %struct.event_base** %3
%7 = call i32 @_addDummyEvent(%struct.event_base* %6)
%8 = load %struct.event_base*, %struct.event_base** %3
%9 = call i32 @event_base_dispatch(%struct.event_base* %8)
%10 = call i32 @AMCPrintf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
@.str = [30 x i8] c"ERROR: event dispatch ends!!!\00"
define noalias i8* @_threadEventBaseDispatch(i8* %0) {
%2 = bitcast i8* %0 to %struct.event_base*
%3 = tail call i32 @_addDummyEvent(%struct.event_base* %2)
%4 = tail call i32 @event_base_dispatch(%struct.event_base* %2)
%5 = tail call i32 @AMCPrintf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int /*<<< orphan*/ f(int, int);
int main() {
  int i = __VERIFIER_nondet_int();
  int x = __VERIFIER_nondet_int();
  if (i >= 0 && x >= 0) {
    f(i, x);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1162 <main+0x42>
cmpl   $0x0,-0xc(%rbp)
jl     1162 <main+0x42>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
test   %ebx,%ebx
js     1142 <main+0x22>
test   %eax,%eax
js     1142 <main+0x22>
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %0
%9 = load i32, i32* %3
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = call i32 @f(i32 %12, i32 %13)
br label %15
15: ; preds = %11, %8, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = icmp sgt i32 %1, -1
%4 = icmp sgt i32 %2, -1
%5 = select i1 %3, i1 %4, i1 false
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = tail call i32 @f(i32 %1, i32 %2)
br label %8
8: ; preds = %6, %0
ret i32 0
}
/* Type definitions */
typedef scalar_t__ int8_t;

/* Variables and functions */
void clear_mbuf(int8_t *buf) {
  int i;
  for (i = 0; i < 1024; i++)
    buf[i] = 0;
}


x86 assembly (clang, -O0):
<clear_mbuf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x400,-0xc(%rbp)
jge    113a <clear_mbuf+0x3a>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <clear_mbuf+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_mbuf>:
push   %rax
mov    $0x2000,%edx
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @clear_mbuf(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1024
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i64*, i64** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i64, i64* %8, i64 %10
store i64 0, i64* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @clear_mbuf(i64* nocapture writeonly %0) {
%2 = bitcast i64* %0 to i8*
ret void
}