xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ THAtomicCompareAndSwap(int volatile *, int, int);
int THAtomicAdd(int volatile *a, int value) {
  int oldvalue;
  do {
    oldvalue = *a;
  } while (!THAtomicCompareAndSwap(a, oldvalue, (oldvalue + value)));
  return oldvalue;
}


x86 assembly (clang, -O0):
<THAtomicAdd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0x10(%rbp),%edx
add    -0xc(%rbp),%edx
call   1030 <THAtomicCompareAndSwap@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    111f <THAtomicAdd+0xf>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<THAtomicAdd>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%r15
nopl   0x0(%rax,%rax,1)
mov    (%r15),%ebx
lea    (%rbx,%r14,1),%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <THAtomicCompareAndSwap@plt>
test   %eax,%eax
je     1120 <THAtomicAdd+0x10>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @THAtomicAdd(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32*, i32** %3
%8 = load volatile i32, i32* %7
store i32 %8, i32* %5
br label %9
9: ; preds = %6
%10 = load i32*, i32** %3
%11 = load i32, i32* %5
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
%15 = call i32 @THAtomicCompareAndSwap(i32* %10, i32 %11, i32 %14)
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
br i1 %17, label %6, label %18
18: ; preds = %9
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @THAtomicAdd(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = load volatile i32, i32* %0
%5 = add nsw i32 %4, %1
%6 = tail call i32 @THAtomicCompareAndSwap(i32* %0, i32 %4, i32 %5)
%7 = icmp eq i32 %6, 0
br i1 %7, label %3, label %8
8: ; preds = %3
ret i32 %4
}
void handle_61(int sig) {}


x86 assembly (clang, -O0):
<handle_61>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_61>:
ret

LLVM IR (-O0):
define void @handle_61(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_61(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void mycb() {
  printf("cb\n");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<mycb>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mycb>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"cb\0A\00"
@stdout = global i32 0
define void @mycb() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@str = [3 x i8] c"cb\00"
define void @mycb() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
/* Type definitions */
struct vm_tod_timer {
  int dummy;
};

/* Variables and functions */
long long vm_timing_get_cur_elapsed_mics(struct vm_tod_timer *);
int vm_timing_has_reached_mics(struct vm_tod_timer *timer, long long mics) {
  long long elapsed = vm_timing_get_cur_elapsed_mics(timer);
  return (elapsed >= mics);
}


x86 assembly (clang, -O0):
<vm_timing_has_reached_mics>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vm_timing_get_cur_elapsed_mics@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
setge  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vm_timing_has_reached_mics>:
push   %rbx
mov    %rsi,%rbx
call   1030 <vm_timing_get_cur_elapsed_mics@plt>
xor    %ecx,%ecx
cmp    %rbx,%rax
setge  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vm_tod_timer = type { i32 }
define i32 @vm_timing_has_reached_mics(%struct.vm_tod_timer* %0, i64 %1) {
%3 = alloca %struct.vm_tod_timer*
%4 = alloca i64
%5 = alloca i64
store %struct.vm_tod_timer* %0, %struct.vm_tod_timer** %3
store i64 %1, i64* %4
%6 = load %struct.vm_tod_timer*, %struct.vm_tod_timer** %3
%7 = call i64 @vm_timing_get_cur_elapsed_mics(%struct.vm_tod_timer* %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = icmp sge i64 %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
%struct.vm_tod_timer = type { i32 }
define i32 @vm_timing_has_reached_mics(%struct.vm_tod_timer* %0, i64 %1) {
%3 = tail call i64 @vm_timing_get_cur_elapsed_mics(%struct.vm_tod_timer* %0)
%4 = icmp sge i64 %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
void XrmStringToQuarkList() {}


x86 assembly (clang, -O0):
<XrmStringToQuarkList>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XrmStringToQuarkList>:
ret

LLVM IR (-O0):
define void @XrmStringToQuarkList() {
ret void
}

LLVM IR (-O2):
define void @XrmStringToQuarkList() {
ret void
}
/* Variables and functions */
unsigned int read4FromEco(unsigned char *);
void conv4FromEcoToX86(unsigned char *p) {
  unsigned int data;
  data = read4FromEco(p);
  *(unsigned int *)p = data;
}


x86 assembly (clang, -O0):
<conv4FromEcoToX86>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <read4FromEco@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv4FromEcoToX86>:
push   %rbx
mov    %rdi,%rbx
call   1030 <read4FromEco@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @conv4FromEcoToX86(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @read4FromEco(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
define void @conv4FromEcoToX86(i8* %0) {
%2 = tail call i32 @read4FromEco(i8* %0)
%3 = bitcast i8* %0 to i32*
store i32 %2, i32* %3
ret void
}
int test_imm_98uint8_mem(unsigned char *val) {
  return ((*val) & (-0x98 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_98uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_98uint8_mem>:
testb  $0x68,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_98uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -152
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_98uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 104
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void waitpid(int pid) { asm volatile("int $0x30" ::"a"(5), "b"(pid)); }


x86 assembly (clang, -O0):
<waitpid>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%ebx
mov    $0x5,%eax
int    $0x30
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitpid>:
push   %rbx
mov    %edi,%ebx
mov    $0x5,%eax
int    $0x30
pop    %rbx
ret

LLVM IR (-O0):
define void @waitpid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @waitpid(i32 %0) {
tail call void asm sideeffect "int $$0x30", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 5, i32 %0)
ret void
}
/* Type definitions */
struct ln_equ_posn {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ln_get_lunar_equ_coords_prec(double, struct ln_equ_posn *,
                                                int /*<<< orphan*/);
void ln_get_lunar_equ_coords(double JD, struct ln_equ_posn *position) {
  ln_get_lunar_equ_coords_prec(JD, position, 0);
}


x86 assembly (clang, -O0):
<ln_get_lunar_equ_coords>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <ln_get_lunar_equ_coords_prec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ln_get_lunar_equ_coords>:
xor    %esi,%esi
jmp    1030 <ln_get_lunar_equ_coords_prec@plt>

LLVM IR (-O0):
%struct.ln_equ_posn = type { i32 }
define void @ln_get_lunar_equ_coords(double %0, %struct.ln_equ_posn* %1) {
%3 = alloca double
%4 = alloca %struct.ln_equ_posn*
store double %0, double* %3
store %struct.ln_equ_posn* %1, %struct.ln_equ_posn** %4
%5 = load double, double* %3
%6 = load %struct.ln_equ_posn*, %struct.ln_equ_posn** %4
%7 = call i32 @ln_get_lunar_equ_coords_prec(double %5, %struct.ln_equ_posn* %6, i32 0)
ret void
}

LLVM IR (-O2):
%struct.ln_equ_posn = type { i32 }
define void @ln_get_lunar_equ_coords(double %0, %struct.ln_equ_posn* %1) {
%3 = tail call i32 @ln_get_lunar_equ_coords_prec(double %0, %struct.ln_equ_posn* %1, i32 0)
ret void
}
long long bit45() { return 0x0000200000000000LL; }


x86 assembly (clang, -O0):
<bit45>:
push   %rbp
mov    %rsp,%rbp
movabs $0x200000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit45>:
movabs $0x200000000000,%rax
ret

LLVM IR (-O0):
define i64 @bit45() {
ret i64 35184372088832
}

LLVM IR (-O2):
define i64 @bit45() {
ret i64 35184372088832
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void WatchdogReloadSet(uint32_t ui32Base, uint32_t ui32LoadVal) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000000))) = ui32LoadVal;
}


x86 assembly (clang, -O0):
<WatchdogReloadSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogReloadSet>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @WatchdogReloadSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 0
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @WatchdogReloadSet(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
/* Variables and functions */
int strncmp(char *, char *, int);
void strncmp_diff_length_3() {
  char *x = "123";
  char *y = "12345";
  if (strncmp(x, y, 5) != -1)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strncmp_diff_length_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x5,%edx
call   1030 <strncmp@plt>
cmp    $0xffffffff,%eax
je     1149 <strncmp_diff_length_3+0x39>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_diff_length_3>:
lea    0xee9(%rip),%rdi
lea    0xee6(%rip),%rsi
mov    $0x5,%edx
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"12345\00"
define void @strncmp_diff_length_3() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strncmp(i8* %3, i8* %4, i32 5)
%6 = icmp ne i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i8, i8* null
br label %9
9: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"12345\00"
define void @strncmp_diff_length_3() {
%1 = tail call i32 @strncmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 5)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool errata_103(void) {
  if (*(uint32_t *)0x10000130ul == 0xAul) {
    if (*(uint32_t *)0x10000134ul == 0x0ul) {
      return true;
    }
  }
  return false;
}


x86 assembly (clang, -O0):
<errata_103>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10000130,%eax
movslq (%rax),%rax
cmp    $0xa,%rax
jne    1139 <errata_103+0x39>
mov    $0x10000134,%eax
movslq (%rax),%rax
cmp    $0x0,%rax
jne    1134 <errata_103+0x34>
movl   $0x1,-0x4(%rbp)
jmp    1140 <errata_103+0x40>
jmp    1139 <errata_103+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<errata_103>:
cmpl   $0xa,0x10000130
0a
jne    1114 <errata_103+0x14>
cmpl   $0x0,0x10000134
je     1117 <errata_103+0x17>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @errata_103() {
%1 = alloca i32
%2 = load i32, i32* inttoptr (i64 268435760 to i32*)
%3 = sext i32 %2 to i64
%4 = icmp eq i64 %3, 10
br i1 %4, label %5, label %11
5: ; preds = %0
%6 = load i32, i32* inttoptr (i64 268435764 to i32*)
%7 = sext i32 %6 to i64
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
store i32 1, i32* %1
br label %12
10: ; preds = %5
br label %11
11: ; preds = %10, %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @errata_103() {
%1 = load i32, i32* inttoptr (i64 268435760 to i32*)
%2 = icmp eq i32 %1, 10
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = load i32, i32* inttoptr (i64 268435764 to i32*)
%5 = icmp eq i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %3, %0
br label %7
7: ; preds = %3, %6
%8 = phi i32 [ 0, %6 ], [ 1, %3 ]
ret i32 %8
}
int test_imm_5Cint16_reg(short val) {
  return ((val) & (-0x5C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Cint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffa4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Cint16_reg>:
test   $0xffa4,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Cint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -92
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Cint16_reg(i16 signext %0) {
%2 = and i16 %0, -92
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ diminuto_fd_write(int, void const *, size_t);
ssize_t diminuto_ipc_stream_write(int fd, const void *buffer, size_t size) {
  return diminuto_fd_write(fd, buffer, size);
}


x86 assembly (clang, -O0):
<diminuto_ipc_stream_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <diminuto_fd_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipc_stream_write>:
jmp    1030 <diminuto_fd_write@plt>

LLVM IR (-O0):
define i32 @diminuto_ipc_stream_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @diminuto_fd_write(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @diminuto_ipc_stream_write(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @diminuto_fd_write(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
unsigned long reverse_byte_order(unsigned long value) {
  return ((value << 24) | ((value & 0xFF00) << 8) | ((value >> 8) & 0xFF00) |
          (value >> 24));
}


x86 assembly (clang, -O0):
<reverse_byte_order>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x18,%rax
mov    -0x8(%rbp),%rcx
and    $0xff00,%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
shr    $0x8,%rcx
and    $0xff00,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
shr    $0x18,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_byte_order>:
mov    %rdi,%rax
shl    $0x18,%rax
mov    %edi,%ecx
shl    $0x8,%ecx
and    $0xff0000,%ecx
or     %rax,%rcx
mov    %rdi,%rax
shr    $0x8,%rax
and    $0xff00,%eax
or     %rcx,%rax
shr    $0x18,%rdi
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @reverse_byte_order(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 24
%5 = load i64, i64* %2
%6 = and i64 %5, 65280
%7 = shl i64 %6, 8
%8 = or i64 %4, %7
%9 = load i64, i64* %2
%10 = lshr i64 %9, 8
%11 = and i64 %10, 65280
%12 = or i64 %8, %11
%13 = load i64, i64* %2
%14 = lshr i64 %13, 24
%15 = or i64 %12, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @reverse_byte_order(i64 %0) {
%2 = shl i64 %0, 24
%3 = shl i64 %0, 8
%4 = and i64 %3, 16711680
%5 = or i64 %4, %2
%6 = lshr i64 %0, 8
%7 = and i64 %6, 65280
%8 = or i64 %5, %7
%9 = lshr i64 %0, 24
%10 = or i64 %8, %9
ret i64 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void print_int16(int16_t n) { printf("%hd", n); }


x86 assembly (clang, -O0):
<print_int16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int16>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%hd\00"
define void @print_int16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%hd\00"
define void @print_int16(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
struct a_struct {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void encode_json_aln(FILE *fp, const struct a_struct *aln_p, long q_offset,
                     long l_offset, int first) {}


x86 assembly (clang, -O0):
<encode_json_aln>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_json_aln>:
ret

LLVM IR (-O0):
%struct.a_struct = type { i32 }
define void @encode_json_aln(i32* %0, %struct.a_struct* %1, i64 %2, i64 %3, i32 %4) {
%6 = alloca i32*
%7 = alloca %struct.a_struct*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i32
store i32* %0, i32** %6
store %struct.a_struct* %1, %struct.a_struct** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i32 %4, i32* %10
ret void
}

LLVM IR (-O2):
%struct.a_struct = type { i32 }
define void @encode_json_aln(i32* nocapture %0, %struct.a_struct* nocapture %1, i64 %2, i64 %3, i32 %4) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
size_t wcsnlen(const wchar_t *s, size_t maxlen) {
  size_t len;
  for (len = 0; len < maxlen; len++, s++) {
    if (!*s)
      break;
  }
  return (len);
}


x86 assembly (clang, -O0):
<wcsnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1156 <wcsnlen+0x56>
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
jne    1134 <wcsnlen+0x34>
jmp    1156 <wcsnlen+0x56>
jmp    1139 <wcsnlen+0x39>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
jmp    1114 <wcsnlen+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcsnlen>:
xor    %eax,%eax
test   %rsi,%rsi
je     1122 <wcsnlen+0x22>
nopw   0x0(%rax,%rax,1)
cmpl   $0x0,(%rdi,%rax,4)
je     1122 <wcsnlen+0x22>
add    $0x1,%rax
cmp    %rax,%rsi
jne    1110 <wcsnlen+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @wcsnlen(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %10
br label %21
15: ; preds = %10
br label %16
16: ; preds = %15
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
%19 = load i32*, i32** %3
%20 = getelementptr inbounds i32, i32* %19, i32 1
store i32* %20, i32** %3
br label %6
21: ; preds = %14, %6
%22 = load i64, i64* %5
ret i64 %22
}

LLVM IR (-O2):
define i64 @wcsnlen(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %9
%5 = phi i64 [ %10, %9 ], [ 0, %2 ]
%6 = phi i32* [ %11, %9 ], [ %0, %2 ]
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = add nuw i64 %5, 1
%11 = getelementptr inbounds i32, i32* %6, i64 1
%12 = icmp eq i64 %10, %1
br i1 %12, label %13, label %4
13: ; preds = %9, %4, %2
%14 = phi i64 [ 0, %2 ], [ %5, %4 ], [ %1, %9 ]
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ step_hash(int);
signed char func_1(void) {
  unsigned l_2 = 0xAC204E2DL;
  step_hash(1);
  return l_2;
}


x86 assembly (clang, -O0):
<func_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xac204e2d,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <step_hash@plt>
mov    -0x4(%rbp),%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_1>:
push   %rax
mov    $0x1,%edi
call   1030 <step_hash@plt>
mov    $0x2d,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @func_1() {
%1 = alloca i32
store i32 -1407168979, i32* %1
%2 = call i32 @step_hash(i32 1)
%3 = load i32, i32* %1
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @func_1() {
%1 = tail call i32 @step_hash(i32 1)
ret i8 45
}
/* Variables and functions */
int PROT_READ;
int PROT_WRITE;
int /*<<< orphan*/ getpagesize();
int mprotect(void *, int /*<<< orphan*/, int);
int unhide_guard_page(void *page_ptr) {
  return mprotect(page_ptr, getpagesize(), PROT_READ | PROT_WRITE);
}


x86 assembly (clang, -O0):
<unhide_guard_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getpagesize@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
mov    0x2e87(%rip),%rax
or     (%rax),%edx
call   1030 <mprotect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unhide_guard_page>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <getpagesize@plt>
mov    0x2ec6(%rip),%rcx
mov    0x2e9f(%rip),%rdx
mov    (%rdx),%edx
or     (%rcx),%edx
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <mprotect@plt>

LLVM IR (-O0):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
define i32 @unhide_guard_page(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (...) @getpagesize()
%5 = load i32, i32* @PROT_READ
%6 = load i32, i32* @PROT_WRITE
%7 = or i32 %5, %6
%8 = call i32 @mprotect(i8* %3, i32 %4, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
define i32 @unhide_guard_page(i8* %0) {
%2 = tail call i32 (...) @getpagesize()
%3 = load i32, i32* @PROT_READ
%4 = load i32, i32* @PROT_WRITE
%5 = or i32 %4, %3
%6 = tail call i32 @mprotect(i8* %0, i32 %2, i32 %5)
ret i32 %6
}
int is_minibaum_available(int order) {
  if (sizeof(unsigned long long int) != 8 || sizeof(unsigned int) != 4) {
    return 0;
  }
  if (order > 62) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_minibaum_available>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x3e,-0x8(%rbp)
jle    111d <is_minibaum_available+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1124 <is_minibaum_available+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_minibaum_available>:
xor    %eax,%eax
cmp    $0x3f,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @is_minibaum_available(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 62
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @is_minibaum_available(i32 %0) {
%2 = icmp slt i32 %0, 63
%3 = zext i1 %2 to i32
ret i32 %3
}
int execute_system_command(s)
char *s;
{
  int stat;
  stat = system(s);
  return (stat);
}


x86 assembly (clang, -O0):
<execute_system_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <system@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_system_command>:
xor    %eax,%eax
jmp    1030 <system@plt>

LLVM IR (-O0):
define i32 @execute_system_command(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @system to i32 (i8*, ...)*)(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @execute_system_command(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @system to i32 (i8*, ...)*)(i8* %0)
ret i32 %2
}
int leap(int yr) { return !(yr % 4) && ((yr % 100) || !(yr % 400)); }


x86 assembly (clang, -O0):
<leap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1155 <leap+0x55>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x6(%rbp)
jne    114f <leap+0x4f>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
xor    $0xff,%al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leap>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <leap+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%edx
ror    $0x2,%edx
mov    $0x1,%eax
cmp    $0x28f5c28,%edx
ja     1108 <leap+0x8>
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @leap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp ne i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = srem i32 %11, 400
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
br label %15
15: ; preds = %10, %6
%16 = phi i1 [ true, %6 ], [ %14, %10 ]
br label %17
17: ; preds = %15, %1
%18 = phi i1 [ false, %1 ], [ %16, %15 ]
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @leap(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *, int *, int *);
int main(void) {
  int a, b, c, d;
  scanf("%d %d %d %d", &a, &b, &c, &d);
  printf("%d\n", a + b + c + d - 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
add    -0x10(%rbp),%esi
add    -0x14(%rbp),%esi
sub    $0x3,%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xed5(%rip),%rdi
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
call   1040 <scanf@plt>
mov    0x14(%rsp),%eax
add    0x10(%rsp),%eax
mov    0x8(%rsp),%ecx
add    0xc(%rsp),%eax
lea    (%rcx,%rax,1),%esi
add    $0xfffffffd,%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%d %d %d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3, i32* %4, i32* %5)
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %4
%11 = add nsw i32 %9, %10
%12 = load i32, i32* %5
%13 = add nsw i32 %11, %12
%14 = sub nsw i32 %13, 3
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d %d %d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = add i32 %10, -3
%15 = add i32 %14, %11
%16 = add i32 %15, %12
%17 = add i32 %16, %13
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %17)
ret i32 0
}
double sin(x)
double x;
{
  double sincos();
  if (x < 0.0)
    return sincos(x, -x, 1);
  else
    return sincos(x, x, 0);
}


x86 assembly (clang, -O0):
<sin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1162 <sin+0x52>
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mov    $0x1,%edi
mov    $0x2,%al
call   1030 <sincos@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    117a <sin+0x6a>
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
xor    %edi,%edi
mov    $0x2,%al
call   1030 <sincos@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    1132 <sin+0x22>
movapd 0xede(%rip),%xmm1
xorpd  %xmm0,%xmm1
mov    $0x1,%edi
mov    $0x2,%al
jmp    1030 <sincos@plt>
movapd %xmm0,%xmm1
xor    %edi,%edi
mov    $0x2,%al
jmp    1030 <sincos@plt>

LLVM IR (-O0):
define double @sin(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double, double* %3
%8 = load double, double* %3
%9 = fneg double %8
%10 = call double (double, double, i32, ...) bitcast (double (...)* @sincos to double (double, double, i32, ...)*)(double %7, double %9, i32 1)
store double %10, double* %2
br label %15
11: ; preds = %1
%12 = load double, double* %3
%13 = load double, double* %3
%14 = call double (double, double, i32, ...) bitcast (double (...)* @sincos to double (double, double, i32, ...)*)(double %12, double %13, i32 0)
store double %14, double* %2
br label %15
15: ; preds = %11, %6
%16 = load double, double* %2
ret double %16
}

LLVM IR (-O2):
define double @sin(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = fneg double %0
%5 = tail call double (double, double, i32, ...) bitcast (double (...)* @sincos to double (double, double, i32, ...)*)(double %0, double %4, i32 1)
br label %8
6: ; preds = %1
%7 = tail call double (double, double, i32, ...) bitcast (double (...)* @sincos to double (double, double, i32, ...)*)(double %0, double %0, i32 0)
br label %8
8: ; preds = %6, %3
%9 = phi double [ %5, %3 ], [ %7, %6 ]
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ printf2(char *, int);
void GenPrintNumLabel(int label) { printf2("$L%d", label); }


x86 assembly (clang, -O0):
<GenPrintNumLabel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenPrintNumLabel>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf2@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"$L%d\00"
define void @GenPrintNumLabel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf2(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"$L%d\00"
define void @GenPrintNumLabel(i32 %0) {
%2 = tail call i32 @printf2(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main() { printf("\n\n Hello World !!\n\n "); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0A\0A Hello World !!\0A\0A \00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"\0A\0A Hello World !!\0A\0A \00"
define void @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct fb_var_screeninfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ FBIOPUT_VSCREENINFO;
scalar_t__ ioctl(int, int /*<<< orphan*/, struct fb_var_screeninfo *);
int /*<<< orphan*/ print_strerror_and_exit(char *);
void tfbm_set_var_screen_info(int fh, struct fb_var_screeninfo *var) {
  if (ioctl(fh, FBIOPUT_VSCREENINFO, var)) {
    print_strerror_and_exit("ioctl FBIOPUT_VSCREENINFO");
  }
}


x86 assembly (clang, -O0):
<tfbm_set_var_screen_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1040 <ioctl@plt>
cmp    $0x0,%rax
je     115a <tfbm_set_var_screen_info+0x3a>
lea    0xeab(%rip),%rdi
call   1030 <print_strerror_and_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tfbm_set_var_screen_info>:
push   %rax
mov    %rsi,%rdx
mov    0x2ebd(%rip),%rax
mov    (%rax),%esi
call   1040 <ioctl@plt>
test   %rax,%rax
je     1144 <tfbm_set_var_screen_info+0x24>
lea    0xec2(%rip),%rdi
pop    %rax
jmp    1030 <print_strerror_and_exit@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.fb_var_screeninfo = type { i32 }
@FBIOPUT_VSCREENINFO = global i32 0
@.str = [26 x i8] c"ioctl FBIOPUT_VSCREENINFO\00"
define void @tfbm_set_var_screen_info(i32 %0, %struct.fb_var_screeninfo* %1) {
%3 = alloca i32
%4 = alloca %struct.fb_var_screeninfo*
store i32 %0, i32* %3
store %struct.fb_var_screeninfo* %1, %struct.fb_var_screeninfo** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @FBIOPUT_VSCREENINFO
%7 = load %struct.fb_var_screeninfo*, %struct.fb_var_screeninfo** %4
%8 = call i64 @ioctl(i32 %5, i32 %6, %struct.fb_var_screeninfo* %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @print_strerror_and_exit(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.fb_var_screeninfo = type { i32 }
@FBIOPUT_VSCREENINFO = global i32 0
@.str = [26 x i8] c"ioctl FBIOPUT_VSCREENINFO\00"
define void @tfbm_set_var_screen_info(i32 %0, %struct.fb_var_screeninfo* %1) {
%3 = load i32, i32* @FBIOPUT_VSCREENINFO
%4 = tail call i64 @ioctl(i32 %0, i32 %3, %struct.fb_var_screeninfo* %1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @print_strerror_and_exit(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret void
}
unsigned long SPIIntFlagGet(unsigned long ulBase) {

  ;
  return ((*((volatile unsigned long *)(ulBase + 0x00000008))));
}


x86 assembly (clang, -O0):
<SPIIntFlagGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIIntFlagGet>:
mov    0x8(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @SPIIntFlagGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @SPIIntFlagGet(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
ret i64 %4
}
void processa3(int w[]) {}


x86 assembly (clang, -O0):
<processa3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<processa3>:
ret

LLVM IR (-O0):
define void @processa3(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @processa3(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TelosbSensorReadingC__Boot__booted();
void RealMainP__Boot__booted(void) { TelosbSensorReadingC__Boot__booted(); }


x86 assembly (clang, -O0):
<RealMainP__Boot__booted>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TelosbSensorReadingC__Boot__booted@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RealMainP__Boot__booted>:
xor    %eax,%eax
jmp    1030 <TelosbSensorReadingC__Boot__booted@plt>

LLVM IR (-O0):
define void @RealMainP__Boot__booted() {
%1 = call i32 (...) @TelosbSensorReadingC__Boot__booted()
ret void
}

LLVM IR (-O2):
define void @RealMainP__Boot__booted() {
%1 = tail call i32 (...) @TelosbSensorReadingC__Boot__booted()
ret void
}
long oc(int unit) {
  if (unit == 1)
    return (1);
  else if (unit == 2)
    return (1024);
  else if (unit == 3)
    return (1024 * 1024);
  else if (unit == 4)
    return (1024 * 1024 * 1024);
  else
    return (0);
}


x86 assembly (clang, -O0):
<oc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    111e <oc+0x1e>
movq   $0x1,-0x8(%rbp)
jmp    116b <oc+0x6b>
cmpl   $0x2,-0xc(%rbp)
jne    1135 <oc+0x35>
movq   $0x400,-0x8(%rbp)
jmp    116b <oc+0x6b>
cmpl   $0x3,-0xc(%rbp)
jne    114c <oc+0x4c>
movq   $0x100000,-0x8(%rbp)
jmp    116b <oc+0x6b>
cmpl   $0x4,-0xc(%rbp)
jne    1163 <oc+0x63>
movq   $0x40000000,-0x8(%rbp)
40
jmp    116b <oc+0x6b>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oc>:
add    $0xffffffff,%edi
cmp    $0x3,%edi
ja     1117 <oc+0x17>
movslq %edi,%rax
lea    0xeee(%rip),%rcx
mov    (%rcx,%rax,8),%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @oc(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1024, i64* %2
br label %20
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 3
br i1 %13, label %14, label %15
14: ; preds = %11
store i64 1048576, i64* %2
br label %20
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 4
br i1 %17, label %18, label %19
18: ; preds = %15
store i64 1073741824, i64* %2
br label %20
19: ; preds = %15
store i64 0, i64* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
@switch.table.oc = [4 x i64] [i64 1, i64 1024, i64 1048576, i64 1073741824]
define i64 @oc(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [4 x i64], [4 x i64]* @switch.table.oc, i64 0, i64 %5
%7 = load i64, i64* %6
br label %8
8: ; preds = %1, %4
%9 = phi i64 [ %7, %4 ], [ 0, %1 ]
ret i64 %9
}
/* Variables and functions */
void *malloc(size_t);
void *lisp_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<lisp_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lisp_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @lisp_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @lisp_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
extern float float_to_float(float x) { return x + 1; }


x86 assembly (clang, -O0):
<float_to_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_to_float>:
addss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @float_to_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fadd float %3, 1.000000e+00
ret float %4
}

LLVM IR (-O2):
define float @float_to_float(float %0) {
%2 = fadd float %0, 1.000000e+00
ret float %2
}
int lex_isatom(int ch) { return ch == ':'; }


x86 assembly (clang, -O0):
<lex_isatom>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x3a,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lex_isatom>:
xor    %eax,%eax
cmp    $0x3a,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @lex_isatom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 58
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @lex_isatom(i32 %0) {
%2 = icmp eq i32 %0, 58
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ handle_PROF(int /*<<< orphan*/);
int gen_PROF() {
  handle_PROF(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_PROF>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_PROF@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_PROF>:
push   %rax
xor    %edi,%edi
call   1030 <handle_PROF@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_PROF() {
%1 = call i32 @handle_PROF(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_PROF() {
%1 = tail call i32 @handle_PROF(i32 0)
ret i32 0
}
/* Variables and functions */
double cos(double);
double g(double x) {
  double temp = cos(x);
  return temp * temp;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cos@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rax
call   1030 <cos@plt>
mulsd  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @g(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double @cos(double %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = load double, double* %3
%8 = fmul double %6, %7
ret double %8
}

LLVM IR (-O2):
define double @g(double %0) {
%2 = tail call double @cos(double %0)
%3 = fmul double %2, %2
ret double %3
}
void steal_weapon(struct battle_char *origin, struct battle_char *target) {}


x86 assembly (clang, -O0):
<steal_weapon>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<steal_weapon>:
ret

LLVM IR (-O0):
%struct.battle_char = type opaque
define void @steal_weapon(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = alloca %struct.battle_char*
%4 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %3
store %struct.battle_char* %1, %struct.battle_char** %4
ret void
}

LLVM IR (-O2):
%struct.battle_char = type opaque
define void @steal_weapon(%struct.battle_char* nocapture %0, %struct.battle_char* nocapture %1) {
ret void
}
char colonne_de_indice(int i) { return i + 'a'; }


x86 assembly (clang, -O0):
<colonne_de_indice>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x61,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<colonne_de_indice>:
lea    0x61(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @colonne_de_indice(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 97
%5 = trunc i32 %4 to i8
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @colonne_de_indice(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = add i8 %2, 97
ret i8 %3
}
int Vec_FltSortCompare1(float *pp1, float *pp2) {
  if (*pp1 < *pp2)
    return -1;
  if (*pp1 > *pp2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<Vec_FltSortCompare1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm0
ucomiss %xmm1,%xmm0
jbe    1131 <Vec_FltSortCompare1+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    1159 <Vec_FltSortCompare1+0x59>
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
ucomiss (%rax),%xmm0
jbe    1152 <Vec_FltSortCompare1+0x52>
movl   $0x1,-0x4(%rbp)
jmp    1159 <Vec_FltSortCompare1+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vec_FltSortCompare1>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
xor    %ecx,%ecx
ucomiss %xmm1,%xmm0
seta   %cl
ucomiss %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Vec_FltSortCompare1(float* %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
%6 = load float*, float** %4
%7 = load float, float* %6
%8 = load float*, float** %5
%9 = load float, float* %8
%10 = fcmp olt float %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %20
12: ; preds = %2
%13 = load float*, float** %4
%14 = load float, float* %13
%15 = load float*, float** %5
%16 = load float, float* %15
%17 = fcmp ogt float %14, %16
br i1 %17, label %18, label %19
18: ; preds = %12
store i32 1, i32* %3
br label %20
19: ; preds = %12
store i32 0, i32* %3
br label %20
20: ; preds = %19, %18, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @Vec_FltSortCompare1(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = fcmp olt float %3, %4
%6 = fcmp ogt float %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
void null_input_free(void *data) { (void)data; }


x86 assembly (clang, -O0):
<null_input_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_input_free>:
ret

LLVM IR (-O0):
define void @null_input_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @null_input_free(i8* nocapture %0) {
ret void
}