#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel,
                    void (*pfnHandler)(void)) {
  unsigned long ulIntNo;
  ulIntNo = (ulChannel == 0x00000000)   ? 30
            : (ulChannel == 0x00000008) ? 31
            : (ulChannel == 0x00000010) ? 32
                                        : 33;
  IntRegister(ulIntNo, pfnHandler);
  IntEnable(ulIntNo);
}


x86 assembly (clang, -O0):
<ADCIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114c <ADCIntRegister+0x2c>
mov    $0x1e,%eax
mov    %eax,-0x24(%rbp)
jmp    1182 <ADCIntRegister+0x62>
cmpq   $0x8,-0x10(%rbp)
jne    1164 <ADCIntRegister+0x44>
mov    $0x1f,%eax
mov    %eax,-0x28(%rbp)
jmp    117c <ADCIntRegister+0x5c>
mov    -0x10(%rbp),%rdx
mov    $0x21,%eax
mov    $0x20,%ecx
cmp    $0x10,%rdx
cmove  %ecx,%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cltq
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x20(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntRegister>:
push   %rbx
test   %rsi,%rsi
je     1133 <ADCIntRegister+0x13>
cmp    $0x8,%rsi
jne    113a <ADCIntRegister+0x1a>
mov    $0x1f,%ebx
jmp    1147 <ADCIntRegister+0x27>
mov    $0x1e,%ebx
jmp    1147 <ADCIntRegister+0x27>
xor    %ebx,%ebx
cmp    $0x10,%rsi
sete   %bl
xor    $0x21,%rbx
mov    %rbx,%rdi
mov    %rdx,%rsi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @ADCIntRegister(i64 %0, i64 %1, void ()* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca void ()*
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store void ()* %2, void ()** %6
%8 = load i64, i64* %5
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
br label %22
11: ; preds = %3
%12 = load i64, i64* %5
%13 = icmp eq i64 %12, 8
br i1 %13, label %14, label %15
14: ; preds = %11
br label %20
15: ; preds = %11
%16 = load i64, i64* %5
%17 = icmp eq i64 %16, 16
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 32, i32 33
br label %20
20: ; preds = %15, %14
%21 = phi i32 [ 31, %14 ], [ %19, %15 ]
br label %22
22: ; preds = %20, %10
%23 = phi i32 [ 30, %10 ], [ %21, %20 ]
%24 = sext i32 %23 to i64
store i64 %24, i64* %7
%25 = load i64, i64* %7
%26 = load void ()*, void ()** %6
%27 = bitcast void ()* %26 to void (...)*
%28 = call i32 @IntRegister(i64 %25, void (...)* %27)
%29 = load i64, i64* %7
%30 = call i32 @IntEnable(i64 %29)
ret void
}

LLVM IR (-O2):
define void @ADCIntRegister(i64 %0, i64 %1, void ()* %2) {
switch i64 %1, label %4 [
i64 0, label %8
i64 8, label %7
]
4: ; preds = %3
%5 = icmp eq i64 %1, 16
%6 = select i1 %5, i64 32, i64 33
br label %8
7: ; preds = %3
br label %8
8: ; preds = %3, %7, %4
%9 = phi i64 [ 30, %3 ], [ %6, %4 ], [ 31, %7 ]
%10 = bitcast void ()* %2 to void (...)*
%11 = tail call i32 @IntRegister(i64 %9, void (...)* %10)
%12 = tail call i32 @IntEnable(i64 %9)
ret void
}