xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage_message(const char *prog_name) {
  fprintf(stderr, "Usage: %s -i rand|pent \n", prog_name);
}


x86 assembly (clang, -O0):
<usage_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage_message>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [25 x i8] c"Usage: %s -i rand|pent \0A\00"
define void @usage_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [25 x i8] c"Usage: %s -i rand|pent \0A\00"
define void @usage_message(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
long IS_ERR_OR_NULL(const void *ptr) {
  return !ptr || ((unsigned long)ptr) >= (unsigned long)-524;
}


x86 assembly (clang, -O0):
<IS_ERR_OR_NULL>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1128 <IS_ERR_OR_NULL+0x28>
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffffdf4,%rax
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR_OR_NULL>:
test   %rdi,%rdi
sete   %al
cmp    $0xfffffffffffffdf4,%rdi
setae  %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i64 @IS_ERR_OR_NULL(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = ptrtoint i8* %6 to i64
%8 = icmp uge i64 %7, -524
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ true, %1 ], [ %8, %5 ]
%11 = zext i1 %10 to i32
%12 = sext i32 %11 to i64
ret i64 %12
}

LLVM IR (-O2):
define i64 @IS_ERR_OR_NULL(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = icmp ugt i8* %0, inttoptr (i64 -525 to i8*)
%4 = or i1 %2, %3
%5 = zext i1 %4 to i64
ret i64 %5
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long time_of_day() {
  struct timeval tp;
  gettimeofday(&tp, NULL);
  return tp.tv_sec * 1000 + tp.tv_usec / 1000;
}


x86 assembly (clang, -O0):
<time_of_day>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_of_day>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0x3e8,%rax,%rcx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i64 @time_of_day() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i64 @time_of_day() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
%11 = sext i32 %10 to i64
ret i64 %11
}
void bzero(void *buf, long n) {
  long i;
  for (i = 0; i < n; i++)
    ((char *)buf)[i] = 0;
}


x86 assembly (clang, -O0):
<bzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    113f <bzero+0x3f>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <bzero+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bzero>:
test   %rsi,%rsi
jle    1124 <bzero+0x14>
push   %rax
mov    %rsi,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @bzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %14, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
store i8 0, i8* %13
br label %14
14: ; preds = %10
%15 = load i64, i64* %5
%16 = add nsw i64 %15, 1
store i64 %16, i64* %5
br label %6
17: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @bzero(i8* nocapture writeonly %0, i64 %1) {
%3 = icmp sgt i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %2
br label %5
5: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ text;

/* Variables and functions */
int /*<<< orphan*/ SHA1(char *, size_t, unsigned char *);
int create_hash(char *text, unsigned char hash[]) {
  size_t len = sizeof(text);
  SHA1(text, len, hash);
}


x86 assembly (clang, -O0):
<create_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x8,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <SHA1@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_hash>:
mov    %rsi,%rdx
mov    $0x8,%esi
jmp    1030 <SHA1@plt>

LLVM IR (-O0):
define i32 @create_hash(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 8, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %6
%9 = load i8*, i8** %5
%10 = call i32 @SHA1(i8* %7, i64 %8, i8* %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @create_hash(i8* %0, i8* %1) {
%3 = tail call i32 @SHA1(i8* %0, i64 8, i8* %1)
ret i32 undef
}
/* Variables and functions */
int epoll_create1(int /*<<< orphan*/);
__attribute__((always_)) int epoll_create(int size) { return epoll_create1(0); }


x86 assembly (clang, -O0):
<epoll_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <epoll_create1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epoll_create>:
xor    %edi,%edi
jmp    1030 <epoll_create1@plt>

LLVM IR (-O0):
define i32 @epoll_create(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @epoll_create1(i32 0)
ret i32 %3
}

LLVM IR (-O2):
define i32 @epoll_create(i32 %0) {
%2 = tail call i32 @epoll_create1(i32 0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ sqrt(int);
int find_r(int n) {
  for (int r = (int)(sqrt(n) + .1); r > 1; r--) {
    if (n % r == 0)
      return r;
  }
  return 1;
}


x86 assembly (clang, -O0):
<find_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sqrt@plt>
cvtsi2sd %rax,%xmm0
movsd  0xed0(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    1173 <find_r+0x63>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1160 <find_r+0x50>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117a <find_r+0x6a>
jmp    1165 <find_r+0x55>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <find_r+0x2b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_r>:
push   %rbx
mov    %edi,%ebx
call   1030 <sqrt@plt>
cvtsi2sd %rax,%xmm0
addsd  0xedb(%rip),%xmm0
cvttsd2si %xmm0,%esi
mov    $0x1,%ecx
cmp    $0x2,%esi
jl     1157 <find_r+0x47>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1155 <find_r+0x45>
lea    -0x1(%rsi),%eax
cmp    $0x2,%esi
mov    %eax,%esi
jg     1140 <find_r+0x30>
jmp    1157 <find_r+0x47>
mov    %esi,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @find_r(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i64 @sqrt(i32 %5)
%7 = sitofp i64 %6 to double
%8 = fadd double %7, 1.000000e-01
%9 = fptosi double %8 to i32
store i32 %9, i32* %4
br label %10
10: ; preds = %21, %1
%11 = load i32, i32* %4
%12 = icmp sgt i32 %11, 1
br i1 %12, label %13, label %24
13: ; preds = %10
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = srem i32 %14, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %13
%19 = load i32, i32* %4
store i32 %19, i32* %2
br label %25
20: ; preds = %13
br label %21
21: ; preds = %20
%22 = load i32, i32* %4
%23 = add nsw i32 %22, -1
store i32 %23, i32* %4
br label %10
24: ; preds = %10
store i32 1, i32* %2
br label %25
25: ; preds = %24, %18
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @find_r(i32 %0) {
%2 = tail call i64 @sqrt(i32 %0)
%3 = sitofp i64 %2 to double
%4 = fadd double %3, 1.000000e-01
%5 = fptosi double %4 to i32
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %14
7: ; preds = %1, %11
%8 = phi i32 [ %12, %11 ], [ %5, %1 ]
%9 = srem i32 %0, %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %7
%12 = add nsw i32 %8, -1
%13 = icmp sgt i32 %8, 2
br i1 %13, label %7, label %14
14: ; preds = %11, %7, %1
%15 = phi i32 [ 1, %1 ], [ %8, %7 ], [ 1, %11 ]
ret i32 %15
}
__attribute__((noipa)) int f5(int x) {
  return __builtin_clz(x) == sizeof(int) * 8 - 1;
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bsr    %eax,%eax
xor    $0x1f,%eax
cltq
cmp    $0x1f,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
xor    %eax,%eax
cmp    $0x1,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @f5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.ctlz.i32(i32 %3, i1 true)
%5 = sext i32 %4 to i64
%6 = icmp eq i64 %5, 31
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @f5(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ADD_REALLOC(long long, long long);
int /*<<< orphan*/ assert(void *);
void *realloc(void *, long long);
void *zzrealloc(void *p, long long x, long long y) {
  void *r = realloc(p, y);
  assert(r);
  ADD_REALLOC(x, y);
  return r;
}


x86 assembly (clang, -O0):
<zzrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <ADD_REALLOC@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zzrealloc>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdx,%rsi
call   1050 <realloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <assert@plt>
mov    %r14,%rdi
mov    %r15,%rsi
call   1030 <ADD_REALLOC@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @zzrealloc(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i8* @realloc(i8* %8, i64 %9)
store i8* %10, i8** %7
%11 = load i8*, i8** %7
%12 = call i32 @assert(i8* %11)
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = call i32 @ADD_REALLOC(i64 %13, i64 %14)
%16 = load i8*, i8** %7
ret i8* %16
}

LLVM IR (-O2):
define i8* @zzrealloc(i8* nocapture %0, i64 %1, i64 %2) {
%4 = tail call i8* @realloc(i8* %0, i64 %2)
%5 = tail call i32 @assert(i8* %4)
%6 = tail call i32 @ADD_REALLOC(i64 %1, i64 %2)
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ XIconSize;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XIconSize(void *_p) {
  if (_p == NULL)
    abort();
  free((XIconSize *)_p);
}


x86 assembly (clang, -O0):
<free_XIconSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XIconSize+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XIconSize>:
test   %rdi,%rdi
je     112a <free_XIconSize+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XIconSize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XIconSize(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ resources_set_int(char *, int);
int /*<<< orphan*/ ui_update_menus();
void set_true_drive_emulation_mode(int on) {
  resources_set_int("DriveTrueEmulation", on);
  ui_update_menus();
}


x86 assembly (clang, -O0):
<set_true_drive_emulation_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <resources_set_int@plt>
mov    $0x0,%al
call   1040 <ui_update_menus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_true_drive_emulation_mode>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <resources_set_int@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <ui_update_menus@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"DriveTrueEmulation\00"
define void @set_true_drive_emulation_mode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @resources_set_int(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 (...) @ui_update_menus()
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"DriveTrueEmulation\00"
define void @set_true_drive_emulation_mode(i32 %0) {
%2 = tail call i32 @resources_set_int(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 (...) @ui_update_menus()
ret void
}
/* Type definitions */
struct graph {
  int dummy;
};

/* Variables and functions */
double dist_tax(struct graph const *, long, long);
double sim_dtax(const struct graph *g, long x, long y) {
  return (1.0 - dist_tax(g, x, y));
}


x86 assembly (clang, -O0):
<sim_dtax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <dist_tax@plt>
movaps %xmm0,%xmm1
movsd  0xec0(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sim_dtax>:
push   %rax
call   1030 <dist_tax@plt>
movsd  0xee2(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.graph = type { i32 }
define double @sim_dtax(%struct.graph* %0, i64 %1, i64 %2) {
%4 = alloca %struct.graph*
%5 = alloca i64
%6 = alloca i64
store %struct.graph* %0, %struct.graph** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load %struct.graph*, %struct.graph** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call double @dist_tax(%struct.graph* %7, i64 %8, i64 %9)
%11 = fsub double 1.000000e+00, %10
ret double %11
}

LLVM IR (-O2):
%struct.graph = type { i32 }
define double @sim_dtax(%struct.graph* %0, i64 %1, i64 %2) {
%4 = tail call double @dist_tax(%struct.graph* %0, i64 %1, i64 %2)
%5 = fsub double 1.000000e+00, %4
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ record_linux_param_description(char *, char *, char *);
void module_param_desc_max_increment(void) {
  record_linux_param_description(
      "tcp_cubic.c", "max_increment",
      "Limit on increment allowed during binary search");
}


x86 assembly (clang, -O0):
<module_param_desc_max_increment>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
lea    0xef1(%rip),%rdx
call   1030 <record_linux_param_description@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_param_desc_max_increment>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
lea    0xef5(%rip),%rdx
jmp    1030 <record_linux_param_description@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"tcp_cubic.c\00"
@.str.1 = [14 x i8] c"max_increment\00"
@.str.2 = [48 x i8] c"Limit on increment allowed during binary search\00"
define void @module_param_desc_max_increment() {
%1 = call i32 @record_linux_param_description(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"tcp_cubic.c\00"
@.str.1 = [14 x i8] c"max_increment\00"
@.str.2 = [48 x i8] c"Limit on increment allowed during binary search\00"
define void @module_param_desc_max_increment() {
%1 = tail call i32 @record_linux_param_description(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.2, i64 0, i64 0))
ret void
}
double RDTSC(void) {
  unsigned long long x;
  __asm__ volatile(".byte 0x0f, 0x31" : "=A"(x));
  return (double)x;
}


x86 assembly (clang, -O0):
<RDTSC>:
push   %rbp
mov    %rsp,%rbp
rdtsc
mov    %rax,-0x8(%rbp)
movaps 0xeef(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xeee(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<RDTSC>:
rdtsc
movq   %rax,%xmm1
punpckldq 0xef1(%rip),%xmm1
subpd  0xef9(%rip),%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @RDTSC() {
%1 = alloca i64
%2 = call i64 asm sideeffect ".byte 0x0f, 0x31", "=A,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = uitofp i64 %3 to double
ret double %4
}

LLVM IR (-O2):
define double @RDTSC() {
%1 = tail call i64 asm sideeffect ".byte 0x0f, 0x31", "=A,~{dirflag},~{fpsr},~{flags}"()
%2 = uitofp i64 %1 to double
ret double %2
}
unsigned short inw(unsigned short p) {
  unsigned short v;
  asm volatile("inw %1,%0" : "=a"(v) : "d"(p));
  return v;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw $1,$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw $1,$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
int native_runtime_onload(void *addr, int action) {
  int (*cb)(int);
  *(void **)&(cb) = addr;
  return (cb(action));
}


x86 assembly (clang, -O0):
<native_runtime_onload>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%edi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_runtime_onload>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define i32 @native_runtime_onload(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32 (i32)*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i32 (i32)** %5 to i8**
store i8* %6, i8** %7
%8 = load i32 (i32)*, i32 (i32)** %5
%9 = load i32, i32* %4
%10 = call i32 %8(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @native_runtime_onload(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32 (i32)*
%4 = tail call i32 %3(i32 %1)
ret i32 %4
}
/* Variables and functions */
unsigned int crc32(unsigned int, unsigned char const *, unsigned int);
unsigned int f_crc32__(unsigned int *crc, const unsigned char *buf,
                       unsigned int *len) {
  return crc32(*crc, buf, *len);
}


x86 assembly (clang, -O0):
<f_crc32__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
call   1030 <crc32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_crc32__>:
mov    (%rdi),%edi
mov    (%rdx),%edx
jmp    1030 <crc32@plt>

LLVM IR (-O0):
define i32 @f_crc32__(i32* %0, i8* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32*
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = call i32 @crc32(i32 %8, i8* %9, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @f_crc32__(i32* nocapture %0, i8* %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %2
%6 = tail call i32 @crc32(i32 %4, i8* %1, i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, unsigned short);
void outw(int port, unsigned short val) {
  outb(port, val >> 8);
  outb(port + 1, val);
}


x86 assembly (clang, -O0):
<outw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%edi
movzwl -0x6(%rbp),%eax
sar    $0x8,%eax
movzwl %ax,%esi
call   1030 <outb@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
movzwl -0x6(%rbp),%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
shr    $0x8,%esi
call   1030 <outb@plt>
add    $0x1,%ebp
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @outw(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i32, i32* %3
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = ashr i32 %7, 8
%9 = trunc i32 %8 to i16
%10 = call i32 @outb(i32 %5, i16 zeroext %9)
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
%13 = load i16, i16* %4
%14 = call i32 @outb(i32 %12, i16 zeroext %13)
ret void
}

LLVM IR (-O2):
define void @outw(i32 %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = tail call i32 @outb(i32 %0, i16 zeroext %3)
%5 = add nsw i32 %0, 1
%6 = tail call i32 @outb(i32 %5, i16 zeroext %1)
ret void
}
int isLeapYear(int year) {
  int isLeap = 0;
  if (year % 4 == 0) {
    if (year % 400 == 0) {
      isLeap = 1;
    } else if (year % 100 != 0) {
      isLeap = 1;
    }
  }
  return isLeap;
}


x86 assembly (clang, -O0):
<isLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1167 <isLeapYear+0x67>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1142 <isLeapYear+0x42>
movl   $0x1,-0x8(%rbp)
jmp    1162 <isLeapYear+0x62>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     115d <isLeapYear+0x5d>
movl   $0x1,-0x8(%rbp)
jmp    1162 <isLeapYear+0x62>
jmp    1167 <isLeapYear+0x67>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeapYear>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <isLeapYear+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%eax
ror    $0x4,%eax
cmp    $0xa3d70b,%eax
jb     1130 <isLeapYear+0x30>
ror    $0x2,%ecx
xor    %eax,%eax
cmp    $0x28f5c29,%ecx
setae  %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isLeapYear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %1
%8 = load i32, i32* %2
%9 = srem i32 %8, 400
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %3
br label %18
12: ; preds = %7
%13 = load i32, i32* %2
%14 = srem i32 %13, 100
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 1, i32* %3
br label %17
17: ; preds = %16, %12
br label %18
18: ; preds = %17, %11
br label %19
19: ; preds = %18, %1
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @isLeapYear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 400
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = srem i32 %0, 100
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ config_exit();
void ledtriggerd_exit(void) {
  config_exit();
  cleanup();
}


x86 assembly (clang, -O0):
<ledtriggerd_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <config_exit@plt>
mov    $0x0,%al
call   1030 <cleanup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ledtriggerd_exit>:
push   %rax
xor    %eax,%eax
call   1040 <config_exit@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <cleanup@plt>

LLVM IR (-O0):
define void @ledtriggerd_exit() {
%1 = call i32 (...) @config_exit()
%2 = call i32 (...) @cleanup()
ret void
}

LLVM IR (-O2):
define void @ledtriggerd_exit() {
%1 = tail call i32 (...) @config_exit()
%2 = tail call i32 (...) @cleanup()
ret void
}
void vtime_init_idle(struct task_struct *tsk, int cpu) {}


x86 assembly (clang, -O0):
<vtime_init_idle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vtime_init_idle>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @vtime_init_idle(%struct.task_struct* %0, i32 %1) {
%3 = alloca %struct.task_struct*
%4 = alloca i32
store %struct.task_struct* %0, %struct.task_struct** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @vtime_init_idle(%struct.task_struct* nocapture %0, i32 %1) {
ret void
}
char *plugin_info(void) { return "PrintAzimuth/Elevation V1.0"; }


x86 assembly (clang, -O0):
<plugin_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [28 x i8] c"PrintAzimuth/Elevation V1.0\00"
define i8* @plugin_info() {
ret i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [28 x i8] c"PrintAzimuth/Elevation V1.0\00"
define i8* @plugin_info() {
ret i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ hctl_updateCoders();
void updateCoders(void) { hctl_updateCoders(); }


x86 assembly (clang, -O0):
<updateCoders>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hctl_updateCoders@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateCoders>:
xor    %eax,%eax
jmp    1030 <hctl_updateCoders@plt>

LLVM IR (-O0):
define void @updateCoders() {
%1 = call i32 (...) @hctl_updateCoders()
ret void
}

LLVM IR (-O2):
define void @updateCoders() {
%1 = tail call i32 (...) @hctl_updateCoders()
ret void
}
int CanVertexBeTranslatedY(int a, int N) {
  if (a < -N)
    return -1;
  if (a >= 2 * N)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<CanVertexBeTranslatedY>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
sub    -0xc(%rbp),%ecx
cmp    %ecx,%eax
jge    1126 <CanVertexBeTranslatedY+0x26>
movl   $0xffffffff,-0x4(%rbp)
jmp    114a <CanVertexBeTranslatedY+0x4a>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
cmp    %ecx,%eax
jl     1143 <CanVertexBeTranslatedY+0x43>
movl   $0x1,-0x4(%rbp)
jmp    114a <CanVertexBeTranslatedY+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CanVertexBeTranslatedY>:
mov    %esi,%eax
neg    %eax
add    %esi,%esi
xor    %ecx,%ecx
cmp    %edi,%esi
setle  %cl
cmp    %edi,%eax
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @CanVertexBeTranslatedY(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = sub nsw i32 0, %7
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %18
11: ; preds = %2
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = mul nsw i32 2, %13
%15 = icmp sge i32 %12, %14
br i1 %15, label %16, label %17
16: ; preds = %11
store i32 1, i32* %3
br label %18
17: ; preds = %11
store i32 0, i32* %3
br label %18
18: ; preds = %17, %16, %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @CanVertexBeTranslatedY(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %1
%4 = icmp sgt i32 %3, %0
%5 = shl nsw i32 %1, 1
%6 = icmp sle i32 %5, %0
%7 = zext i1 %6 to i32
%8 = select i1 %4, i32 -1, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x55() {
  Assert_real((ispunct(85) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              430, ("ispunct should be 0 for U"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x55>:
push   %rbp
mov    %rsp,%rbp
mov    $0x55,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1ae,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x55>:
push   %rax
mov    $0x55,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1ae,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 0 for U\00"
define void @t_ispunct_0x55() {
%1 = call i64 @ispunct(i32 85)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 430, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 0 for U\00"
define void @t_ispunct_0x55() {
%1 = tail call i64 @ispunct(i32 85)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 430, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_08uint8_mem(unsigned char *val) {
  return ((*val) & (-0x08 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_08uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xfffffff8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_08uint8_mem>:
cmpb   $0x8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_08uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -8
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_08uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp ult i8 %2, 8
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void genbeq_idle() {}


x86 assembly (clang, -O0):
<genbeq_idle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbeq_idle>:
ret

LLVM IR (-O0):
define void @genbeq_idle() {
ret void
}

LLVM IR (-O2):
define void @genbeq_idle() {
ret void
}
void ecleaz(xi) register unsigned short *xi;
{
  register int i;
  for (i = 0; i < (6 + 3); i++)
    *xi++ = 0;
}


x86 assembly (clang, -O0):
<ecleaz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x9,-0xc(%rbp)
jge    113b <ecleaz+0x3b>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x2,%rcx
mov    %rcx,-0x8(%rbp)
movw   $0x0,(%rax)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <ecleaz+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecleaz>:
xorps  %xmm0,%xmm0
movups %xmm0,(%rdi)
movw   $0x0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @ecleaz(i16* %0) {
%2 = alloca i16*
%3 = alloca i32
store i16* %0, i16** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 9
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i16*, i16** %2
%9 = getelementptr inbounds i16, i16* %8, i32 1
store i16* %9, i16** %2
store i16 0, i16* %8
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ecleaz(i16* nocapture writeonly %0) {
%2 = bitcast i16* %0 to i8*
ret void
}
void newstyle2(int a, int b) { ; }


x86 assembly (clang, -O0):
<newstyle2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<newstyle2>:
ret

LLVM IR (-O0):
define void @newstyle2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @newstyle2(i32 %0, i32 %1) {
ret void
}
long long bit42() { return 0x0000040000000000LL; }


x86 assembly (clang, -O0):
<bit42>:
push   %rbp
mov    %rsp,%rbp
movabs $0x40000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit42>:
movabs $0x40000000000,%rax
ret

LLVM IR (-O0):
define i64 @bit42() {
ret i64 4398046511104
}

LLVM IR (-O2):
define i64 @bit42() {
ret i64 4398046511104
}
/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int puts(const char *s) {
  while (*s != '\0')
    fputc(*s++, stdout);
  fputc('\n', stdout);
  return 0;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1153 <puts+0x43>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    0x2e9c(%rip),%rcx
mov    (%rcx),%esi
movsbl %al,%edi
call   1030 <fputc@plt>
jmp    111c <puts+0xc>
mov    0x2e86(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1030 <fputc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1146 <puts+0x36>
mov    %rdi,%rbx
add    $0x1,%rbx
mov    0x2eb8(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r14),%esi
movsbl %al,%edi
call   1030 <fputc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <puts+0x20>
mov    0x2e93(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1030 <fputc@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdout = global i32 0
define i32 @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = load i32, i32* @stdout
%13 = call i32 @fputc(i8 signext %11, i32 %12)
br label %3
14: ; preds = %3
%15 = load i32, i32* @stdout
%16 = call i32 @fputc(i8 signext 10, i32 %15)
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i32, i32* @stdout
%9 = tail call i32 @fputc(i8 signext %5, i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
%13 = load i32, i32* @stdout
%14 = tail call i32 @fputc(i8 signext 10, i32 %13)
ret i32 0
}
void do_html() {}


x86 assembly (clang, -O0):
<do_html>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_html>:
ret

LLVM IR (-O0):
define void @do_html() {
ret void
}

LLVM IR (-O2):
define void @do_html() {
ret void
}
void Ctypes_hook_wr_ten_u8s(void) {}


x86 assembly (clang, -O0):
<Ctypes_hook_wr_ten_u8s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ctypes_hook_wr_ten_u8s>:
ret

LLVM IR (-O0):
define void @Ctypes_hook_wr_ten_u8s() {
ret void
}

LLVM IR (-O2):
define void @Ctypes_hook_wr_ten_u8s() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ determinerPositionCaverne(unsigned int const);
int /*<<< orphan*/ genererContenuCaverne(unsigned int const);
int /*<<< orphan*/ placerCaverne(unsigned int const);
void genererCaverne(const unsigned int indexSalle) {
  determinerPositionCaverne(indexSalle);
  placerCaverne(indexSalle);
  genererContenuCaverne(indexSalle);
}


x86 assembly (clang, -O0):
<genererCaverne>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <determinerPositionCaverne@plt>
mov    -0x4(%rbp),%edi
call   1050 <placerCaverne@plt>
mov    -0x4(%rbp),%edi
call   1040 <genererContenuCaverne@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genererCaverne>:
push   %rbx
mov    %edi,%ebx
call   1030 <determinerPositionCaverne@plt>
mov    %ebx,%edi
call   1050 <placerCaverne@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <genererContenuCaverne@plt>

LLVM IR (-O0):
define void @genererCaverne(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @determinerPositionCaverne(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @placerCaverne(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @genererContenuCaverne(i32 %7)
ret void
}

LLVM IR (-O2):
define void @genererCaverne(i32 %0) {
%2 = tail call i32 @determinerPositionCaverne(i32 %0)
%3 = tail call i32 @placerCaverne(i32 %0)
%4 = tail call i32 @genererContenuCaverne(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int rpmvercmp(char *, char *);
int main(int argc, char **argv) {
  int r = rpmvercmp(argv[1], argv[2]);
  printf("Result: %i\n", r);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1040 <rpmvercmp@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
call   1040 <rpmvercmp@plt>
lea    0xecb(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Result: %i\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = load i8**, i8*** %4
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = load i8**, i8*** %4
%10 = getelementptr inbounds i8*, i8** %9, i64 2
%11 = load i8*, i8** %10
%12 = call i32 @rpmvercmp(i8* %8, i8* %11)
store i32 %12, i32* %5
%13 = load i32, i32* %5
%14 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Result: %i\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8*, i8** %1, i64 2
%6 = load i8*, i8** %5
%7 = tail call i32 @rpmvercmp(i8* %4, i8* %6)
%8 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(void const *);
void *bee_tree_generate_key_default(const void *data) {
  assert(data);
  return (void *)data;
}


x86 assembly (clang, -O0):
<bee_tree_generate_key_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bee_tree_generate_key_default>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @bee_tree_generate_key_default(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @assert(i8* %3)
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @bee_tree_generate_key_default(i8* returned %0) {
%2 = tail call i32 @assert(i8* %0)
ret i8* %0
}
/* Variables and functions */
float random();
int with_probability(float p) { return random() < p * 0x7FFFFFFF; }


x86 assembly (clang, -O0):
<with_probability>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
movaps %xmm0,%xmm1
movss  0xed1(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<with_probability>:
push   %rax
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <random@plt>
movss  0x4(%rsp),%xmm1
mulss  0xed4(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @with_probability(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call float (...) @random()
%4 = load float, float* %2
%5 = fmul float %4, 0x41E0000000000000
%6 = fcmp olt float %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @with_probability(float %0) {
%2 = tail call float (...) @random()
%3 = fmul float %0, 0x41E0000000000000
%4 = fcmp olt float %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *, int);
void checkResults(char *string, int rc) {
  if (rc) {
    printf("Error on : %s, rc=%d", string, rc);
    exit(0);
  }
  return;
}


x86 assembly (clang, -O0):
<checkResults>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1153 <checkResults+0x33>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkResults>:
mov    %esi,%edx
test   %esi,%esi
jne    1127 <checkResults+0x7>
ret
push   %rax
mov    %rdi,%rsi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Error on : %s, rc=%d\00"
define void @checkResults(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
%11 = call i32 @exit(i32 0)
unreachable
12: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Error on : %s, rc=%d\00"
define void @checkResults(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %2
ret void
}
int test_imm_7Dint8_reg(signed char val) {
  return ((val) & (0x7D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Dint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x7d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Dint8_reg>:
test   $0x7d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Dint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 125
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Dint8_reg(i8 signext %0) {
%2 = and i8 %0, 125
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}