xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ GLUT_BITMAP_9_BY_15;
int /*<<< orphan*/ glColor3f(double, double, double);
int /*<<< orphan*/ glRasterPos2i(int, int);
int /*<<< orphan*/ glutBitmapString(int /*<<< orphan*/, char *);
void draw_text(int x, int y, char *s) {
  glColor3f(0.0, 0.0, 0.0);
  glRasterPos2i(x * 30, y * 30);
  glutBitmapString(GLUT_BITMAP_9_BY_15, s);
}


x86 assembly (clang, -O0):
<draw_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
xorps  %xmm2,%xmm2
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <glColor3f@plt>
imul   $0x1e,-0x4(%rbp),%edi
imul   $0x1e,-0x8(%rbp),%esi
call   1040 <glRasterPos2i@plt>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
call   1050 <glutBitmapString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_text>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %esi,%ebp
mov    %edi,%ebx
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
call   1030 <glColor3f@plt>
mov    %ebx,%edi
shl    $0x5,%edi
sub    %ebx,%edi
sub    %ebx,%edi
mov    %ebp,%esi
shl    $0x5,%esi
sub    %ebp,%esi
sub    %ebp,%esi
call   1040 <glRasterPos2i@plt>
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <glutBitmapString@plt>

LLVM IR (-O0):
@GLUT_BITMAP_9_BY_15 = global i32 0
define void @draw_text(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = call i32 @glColor3f(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%8 = load i32, i32* %4
%9 = mul nsw i32 %8, 30
%10 = load i32, i32* %5
%11 = mul nsw i32 %10, 30
%12 = call i32 @glRasterPos2i(i32 %9, i32 %11)
%13 = load i32, i32* @GLUT_BITMAP_9_BY_15
%14 = load i8*, i8** %6
%15 = call i32 @glutBitmapString(i32 %13, i8* %14)
ret void
}

LLVM IR (-O2):
@GLUT_BITMAP_9_BY_15 = global i32 0
define void @draw_text(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @glColor3f(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%5 = mul nsw i32 %0, 30
%6 = mul nsw i32 %1, 30
%7 = tail call i32 @glRasterPos2i(i32 %5, i32 %6)
%8 = load i32, i32* @GLUT_BITMAP_9_BY_15
%9 = tail call i32 @glutBitmapString(i32 %8, i8* %2)
ret void
}
int compare_prefix(const char *a, const char *b, int len) {
  int i;
  for (i = 0; i < len; i++) {
    if (a[i] != b[i])
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<compare_prefix>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    1161 <compare_prefix+0x61>
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x18(%rbp),%rcx
movslq -0x20(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
je     114e <compare_prefix+0x4e>
movl   $0x0,-0x4(%rbp)
jmp    1168 <compare_prefix+0x68>
jmp    1153 <compare_prefix+0x53>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1116 <compare_prefix+0x16>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_prefix>:
mov    $0x1,%eax
test   %edx,%edx
jle    1122 <compare_prefix+0x22>
mov    %edx,%r8d
xor    %edx,%edx
xchg   %ax,%ax
movzbl (%rdi,%rdx,1),%ecx
cmp    (%rsi,%rdx,1),%cl
jne    1123 <compare_prefix+0x23>
add    $0x1,%rdx
cmp    %rdx,%r8
jne    1110 <compare_prefix+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @compare_prefix(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %29, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %32
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8*, i8** %6
%21 = load i32, i32* %8
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp ne i32 %19, %25
br i1 %26, label %27, label %28
27: ; preds = %13
store i32 0, i32* %4
br label %33
28: ; preds = %13
br label %29
29: ; preds = %28
%30 = load i32, i32* %8
%31 = add nsw i32 %30, 1
store i32 %31, i32* %8
br label %9
32: ; preds = %9
store i32 1, i32* %4
br label %33
33: ; preds = %32, %27
%34 = load i32, i32* %4
ret i32 %34
}

LLVM IR (-O2):
define i32 @compare_prefix(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %16, %6
br i1 %8, label %17, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %16, %7 ]
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = getelementptr inbounds i8, i8* %1, i64 %10
%14 = load i8, i8* %13
%15 = icmp eq i8 %12, %14
%16 = add nuw nsw i64 %10, 1
br i1 %15, label %7, label %17
17: ; preds = %9, %7, %3
%18 = phi i32 [ 1, %3 ], [ 1, %7 ], [ 0, %9 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgxor(void) { gen("xor\tax,cx"); }


x86 assembly (clang, -O0):
<cgxor>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgxor>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"xor\09ax,cx\00"
define void @cgxor() {
%1 = call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"xor\09ax,cx\00"
define void @cgxor() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
int getFontel(unsigned char *bitmapData, int spanLength, int i, int j) {
  return bitmapData[i * spanLength + j / 8] & (1 << (j & 7)) ? 255 : 0;
}


x86 assembly (clang, -O0):
<getFontel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%ecx
imul   -0xc(%rbp),%ecx
mov    -0x14(%rbp),%eax
mov    $0x8,%esi
cltd
idiv   %esi
mov    %eax,%edx
mov    -0x20(%rbp),%rax
add    %edx,%ecx
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%edx
mov    -0x14(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    %eax,%edx
xor    %eax,%eax
mov    $0xff,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFontel>:
imul   %edx,%esi
lea    0x7(%rcx),%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x3,%eax
add    %esi,%eax
cltq
movzbl (%rdi,%rax,1),%eax
and    $0x7,%cl
movzbl %cl,%ecx
xor    %edx,%edx
bt     %ecx,%eax
mov    $0xff,%eax
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @getFontel(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %8
%14 = sdiv i32 %13, 8
%15 = add nsw i32 %12, %14
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %9, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = load i32, i32* %8
%21 = and i32 %20, 7
%22 = shl i32 1, %21
%23 = and i32 %19, %22
%24 = icmp ne i32 %23, 0
%25 = zext i1 %24 to i64
%26 = select i1 %24, i32 255, i32 0
ret i32 %26
}

LLVM IR (-O2):
define i32 @getFontel(i8* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = mul nsw i32 %2, %1
%6 = sdiv i32 %3, 8
%7 = add nsw i32 %6, %5
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = and i32 %3, 7
%13 = shl nuw nsw i32 1, %12
%14 = and i32 %13, %11
%15 = icmp eq i32 %14, 0
%16 = select i1 %15, i32 0, i32 255
ret i32 %16
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int dopr(char *, size_t, char const *, int /*<<< orphan*/);
int mat_vsnprintf(char *str, size_t count, const char *fmt, va_list args) {
  return dopr(str, count, fmt, args);
}


x86 assembly (clang, -O0):
<mat_vsnprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <dopr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_vsnprintf>:
jmp    1030 <dopr@plt>

LLVM IR (-O0):
define i32 @mat_vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 @dopr(i8* %9, i64 %10, i8* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @mat_vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = tail call i32 @dopr(i8* %0, i64 %1, i8* %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ CANBaseValid(unsigned long);
int CANRegRead(unsigned long);
int /*<<< orphan*/ CANRegWrite(unsigned long, int);
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
void CANDisable(unsigned long ulBase) {
  DEBUG_ASSERT(CANBaseValid(ulBase));
  CANRegWrite(ulBase + 0x00000000,
              CANRegRead(ulBase + 0x00000000) | 0x00000001);
}


x86 assembly (clang, -O0):
<CANDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <CANBaseValid@plt>
mov    %eax,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
add    $0x0,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x0,%rdi
call   1040 <CANRegRead@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
or     $0x1,%esi
call   1030 <CANRegWrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANDisable>:
push   %rbx
mov    %rdi,%rbx
call   1060 <CANBaseValid@plt>
mov    %eax,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    %rbx,%rdi
call   1040 <CANRegRead@plt>
or     $0x1,%eax
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <CANRegWrite@plt>

LLVM IR (-O0):
define void @CANDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @CANBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 0
%8 = load i64, i64* %2
%9 = add i64 %8, 0
%10 = call i32 @CANRegRead(i64 %9)
%11 = or i32 %10, 1
%12 = call i32 @CANRegWrite(i64 %7, i32 %11)
ret void
}

LLVM IR (-O2):
define void @CANDisable(i64 %0) {
%2 = tail call i32 @CANBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = tail call i32 @CANRegRead(i64 %0)
%5 = or i32 %4, 1
%6 = tail call i32 @CANRegWrite(i64 %0, i32 %5)
ret void
}
/* Variables and functions */
int maximalRectangle(char **, int, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  char *x[] = {"1"};
  printf("%d\n", maximalRectangle(x, 1, 1));
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ce2(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <maximalRectangle@plt>
mov    %eax,%esi
lea    0xeaf(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rax
mov    %rax,(%rsp)
mov    %rsp,%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <maximalRectangle@plt>
lea    0xebd(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"1\00"
@__const.main.x = [1 x i8*] [i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0)]
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [1 x i8*]
store i32 0, i32* %1
%3 = bitcast [1 x i8*]* %2 to i8*
%4 = getelementptr inbounds [1 x i8*], [1 x i8*]* %2, i64 0, i64 0
%5 = call i32 @maximalRectangle(i8** %4, i32 1, i32 1)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"1\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [1 x i8*]
%2 = bitcast [1 x i8*]* %1 to i8*
%3 = bitcast [1 x i8*]* %1 to i64*
store i64 ptrtoint ([2 x i8]* @.str to i64), i64* %3
%4 = getelementptr inbounds [1 x i8*], [1 x i8*]* %1, i64 0, i64 0
%5 = call i32 @maximalRectangle(i8** %4, i32 1, i32 1)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRDC_get(void) { return U_WMRCORENONE_get("U_WMRDC"); }


x86 assembly (clang, -O0):
<U_WMRDC_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRDC_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRDC\00"
define i32 @U_WMRDC_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRDC\00"
define i32 @U_WMRDC_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void cw1200_debug_txed_agg(struct cw1200_common *priv) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.cw1200_common = type opaque
define void @cw1200_debug_txed_agg(%struct.cw1200_common* %0) {
%2 = alloca %struct.cw1200_common*
store %struct.cw1200_common* %0, %struct.cw1200_common** %2
ret void
}

LLVM IR (-O2):
%struct.cw1200_common = type opaque
define void @cw1200_debug_txed_agg(%struct.cw1200_common* nocapture %0) {
ret void
}
void H210ToARGB() {}


x86 assembly (clang, -O0):
<H210ToARGB>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H210ToARGB>:
ret

LLVM IR (-O0):
define void @H210ToARGB() {
ret void
}

LLVM IR (-O2):
define void @H210ToARGB() {
ret void
}
__attribute__((no, constructor(400))) int bar() { return 123; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0x7b,%eax
ret

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 400, void ()* bitcast (i32 ()* @bar to void ()*), i8* null }]
define i32 @bar() {
ret i32 123
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 400, void ()* bitcast (i32 ()* @bar to void ()*), i8* null }]
define i32 @bar() {
ret i32 123
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int __syscall_nanosleep(struct timespec const *, struct timespec *);
int __libc_nanosleep(const struct timespec *req, struct timespec *rem) {
  if (1)
    return __syscall_nanosleep(req, rem);
}


x86 assembly (clang, -O0):
<__libc_nanosleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__syscall_nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_nanosleep>:
jmp    1030 <__syscall_nanosleep@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @__libc_nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = call i32 @__syscall_nanosleep(%struct.timespec* %5, %struct.timespec* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @__libc_nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i32 @__syscall_nanosleep(%struct.timespec* %0, %struct.timespec* %1)
ret i32 %3
}
int getMachineByteOrder() {
  static int endian_check = 1;
  return *((char *)&endian_check);
}


x86 assembly (clang, -O0):
<getMachineByteOrder>:
push   %rbp
mov    %rsp,%rbp
movsbl 0x2f15(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMachineByteOrder>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@getMachineByteOrder.endian_check = internal global i32 1
define i32 @getMachineByteOrder() {
%1 = load i8, i8* bitcast (i32* @getMachineByteOrder.endian_check to i8*)
%2 = sext i8 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @getMachineByteOrder() {
ret i32 1
}
void snd_mainloop() { return; }


x86 assembly (clang, -O0):
<snd_mainloop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_mainloop>:
ret

LLVM IR (-O0):
define void @snd_mainloop() {
ret void
}

LLVM IR (-O2):
define void @snd_mainloop() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("This is exec2\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"This is exec2\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"This is exec2\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
int execlp(const char *file, const char *arg0, ...) {
  fprintf(stderr, "ERROR: execlp is unsupported!\n");
  fprintf(stderr, "Tried to execute '%s' with arg0 '%s'\n", file, arg0);
  abort();
}


x86 assembly (clang, -O0):
<execlp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    0xec0(%rip),%rsi
mov    $0x0,%al
call   1040 <fprintf@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xec0(%rip),%rsi
mov    $0x0,%al
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<execlp>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
mov    0x2eae(%rip),%r15
mov    (%r15),%edi
lea    0xec4(%rip),%rsi
xor    %eax,%eax
call   1040 <fprintf@plt>
mov    (%r15),%edi
lea    0xed2(%rip),%rsi
mov    %rbx,%rdx
mov    %r14,%rcx
xor    %eax,%eax
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"ERROR: execlp is unsupported!\0A\00"
@.str.1 = [38 x i8] c"Tried to execute '%s' with arg0 '%s'\0A\00"
define i32 @execlp(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 (i32, i8*, ...) @fprintf(i32 %7, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0), i8* %8, i8* %9)
%11 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"ERROR: execlp is unsupported!\0A\00"
@.str.1 = [38 x i8] c"Tried to execute '%s' with arg0 '%s'\0A\00"
define i32 @execlp(i8* %0, i8* %1, ...) {
%3 = load i32, i32* @stderr
%4 = tail call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = tail call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0), i8* %0, i8* %1)
%7 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ iaxc_shutdown();
void killem(void) {
  iaxc_shutdown();
  return;
}


x86 assembly (clang, -O0):
<killem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <iaxc_shutdown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<killem>:
xor    %eax,%eax
jmp    1030 <iaxc_shutdown@plt>

LLVM IR (-O0):
define void @killem() {
%1 = call i32 (...) @iaxc_shutdown()
ret void
}

LLVM IR (-O2):
define void @killem() {
%1 = tail call i32 (...) @iaxc_shutdown()
ret void
}
char base64_decode_value(char value) {
  static const char decoding[] = {
      62, -1, -1, -1, 63, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, -1,
      -1, -1, -2, -1, -1, -1, 0,  1,  2,  3,  4,  5,  6,  7,  8,  9,
      10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
      -1, -1, -1, -1, -1, -1, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
      36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51};
  static const char decoding_size = sizeof(decoding);
  int codepos = (signed char)value;
  codepos -= 43;
  if (codepos < 0 || codepos > decoding_size)
    return -1;
  return decoding[codepos];
}


x86 assembly (clang, -O0):
<base64_decode_value>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x2b,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     112e <base64_decode_value+0x2e>
cmpl   $0x50,-0x8(%rbp)
jle    1137 <base64_decode_value+0x37>
movb   $0xff,-0x1(%rbp)
jmp    1148 <base64_decode_value+0x48>
movslq -0x8(%rbp),%rcx
lea    0xebe(%rip),%rax
mov    (%rax,%rcx,1),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_decode_value>:
lea    -0x7c(%rdi),%ecx
mov    $0xff,%al
cmp    $0xaf,%cl
jb     1119 <base64_decode_value+0x19>
movzbl %dil,%eax
lea    0xeeb(%rip),%rcx
mov    -0x2b(%rax,%rcx,1),%al
ret

LLVM IR (-O0):
@base64_decode_value.decoding = internal constant [80 x i8] c">\FF\FF\FF?456789:;<=\FF\FF\FF\FE\FF\FF\FF\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\10\11\12\13\14\15\16\17\18\19\FF\FF\FF\FF\FF\FF\1A\1B\1C\1D\1E\1F !\22#$%&'()*+,-./0123"
@base64_decode_value.decoding_size = internal constant i8 80
define signext i8 @base64_decode_value(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 43
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp slt i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, i32* %4
%13 = icmp sgt i32 %12, 80
br i1 %13, label %14, label %15
14: ; preds = %11, %1
store i8 -1, i8* %2
br label %20
15: ; preds = %11
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds [80 x i8], [80 x i8]* @base64_decode_value.decoding, i64 0, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %2
br label %20
20: ; preds = %15, %14
%21 = load i8, i8* %2
ret i8 %21
}

LLVM IR (-O2):
@base64_decode_value.decoding = internal unnamed_addr constant [80 x i8] c">\FF\FF\FF?456789:;<=\FF\FF\FF\FE\FF\FF\FF\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\10\11\12\13\14\15\16\17\18\19\FF\FF\FF\FF\FF\FF\1A\1B\1C\1D\1E\1F !\22#$%&'()*+,-./0123"
define signext i8 @base64_decode_value(i8 signext %0) {
%2 = add i8 %0, -124
%3 = icmp ult i8 %2, -81
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = zext i8 %0 to i64
%6 = add nsw i64 %5, -43
%7 = getelementptr inbounds [80 x i8], [80 x i8]* @base64_decode_value.decoding, i64 0, i64 %6
%8 = load i8, i8* %7
br label %9
9: ; preds = %1, %4
%10 = phi i8 [ %8, %4 ], [ -1, %1 ]
ret i8 %10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x67() {
  Assert_real((isgraph(103)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              520, ("isgraph should be 1 for g"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x67>:
push   %rbp
mov    %rsp,%rbp
mov    $0x67,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x208,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x67>:
push   %rax
mov    $0x67,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x208,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for g\00"
define void @t_isgraph_0x67() {
%1 = call i32 @isgraph(i32 103)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 520, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for g\00"
define void @t_isgraph_0x67() {
%1 = tail call i32 @isgraph(i32 103)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 520, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int MarsagliaXORV(int);
int MarsagliaXOR(int *seed) {
  int x = MarsagliaXORV(*seed);
  *seed = x;
  return x & 0x7FFFFFFF;
}


x86 assembly (clang, -O0):
<MarsagliaXOR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <MarsagliaXORV@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
and    $0x7fffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MarsagliaXOR>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <MarsagliaXORV@plt>
mov    %eax,(%rbx)
and    $0x7fffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @MarsagliaXOR(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = call i32 @MarsagliaXORV(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = load i32*, i32** %2
store i32 %7, i32* %8
%9 = load i32, i32* %3
%10 = and i32 %9, 2147483647
ret i32 %10
}

LLVM IR (-O2):
define i32 @MarsagliaXOR(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @MarsagliaXORV(i32 %2)
store i32 %3, i32* %0
%4 = and i32 %3, 2147483647
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ r1(int /*<<< orphan*/);
int /*<<< orphan*/ r2(int /*<<< orphan*/);
int /*<<< orphan*/ r3(int /*<<< orphan*/);
int /*<<< orphan*/ r4(int /*<<< orphan*/);
int /*<<< orphan*/ r5(int /*<<< orphan*/);
int /*<<< orphan*/ w1(int /*<<< orphan*/);
int /*<<< orphan*/ w2(int /*<<< orphan*/);
int /*<<< orphan*/ w3(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  w1(0);
__CPROVER_ASYNC_1:
  w2(0);
__CPROVER_ASYNC_2:
  w3(0);
__CPROVER_ASYNC_3:
  r1(0);
__CPROVER_ASYNC_4:
  r2(0);
__CPROVER_ASYNC_5:
  r3(0);
__CPROVER_ASYNC_6:
  r4(0);
__CPROVER_ASYNC_7:
  r5(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1050 <w1@plt>
xor    %edi,%edi
call   1090 <w2@plt>
xor    %edi,%edi
call   1060 <w3@plt>
xor    %edi,%edi
call   10a0 <r1@plt>
xor    %edi,%edi
call   1070 <r2@plt>
xor    %edi,%edi
call   1030 <r3@plt>
xor    %edi,%edi
call   1080 <r4@plt>
xor    %edi,%edi
call   1040 <r5@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1050 <w1@plt>
xor    %edi,%edi
call   1090 <w2@plt>
xor    %edi,%edi
call   1060 <w3@plt>
xor    %edi,%edi
call   10a0 <r1@plt>
xor    %edi,%edi
call   1070 <r2@plt>
xor    %edi,%edi
call   1030 <r3@plt>
xor    %edi,%edi
call   1080 <r4@plt>
xor    %edi,%edi
call   1040 <r5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 @w1(i32 0)
br label %4
4: ; preds = %2
%5 = call i32 @w2(i32 0)
br label %6
6: ; preds = %4
%7 = call i32 @w3(i32 0)
br label %8
8: ; preds = %6
%9 = call i32 @r1(i32 0)
br label %10
10: ; preds = %8
%11 = call i32 @r2(i32 0)
br label %12
12: ; preds = %10
%13 = call i32 @r3(i32 0)
br label %14
14: ; preds = %12
%15 = call i32 @r4(i32 0)
br label %16
16: ; preds = %14
%17 = call i32 @r5(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @w1(i32 0)
%2 = tail call i32 @w2(i32 0)
%3 = tail call i32 @w3(i32 0)
%4 = tail call i32 @r1(i32 0)
%5 = tail call i32 @r2(i32 0)
%6 = tail call i32 @r3(i32 0)
%7 = tail call i32 @r4(i32 0)
%8 = tail call i32 @r5(i32 0)
ret i32 0
}
/* Variables and functions */
int millasleep(int);
int decasleep(int ds) { return millasleep(ds * 100); }


x86 assembly (clang, -O0):
<decasleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x64,-0x4(%rbp),%edi
call   1030 <millasleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decasleep>:
imul   $0x64,%edi,%edi
jmp    1030 <millasleep@plt>

LLVM IR (-O0):
define i32 @decasleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 100
%5 = call i32 @millasleep(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @decasleep(i32 %0) {
%2 = mul nsw i32 %0, 100
%3 = tail call i32 @millasleep(i32 %2)
ret i32 %3
}
void writel(unsigned int val, void *addr) {
  *(volatile unsigned int *)addr = val;
}


x86 assembly (clang, -O0):
<writel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writel>:
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @writel(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store volatile i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @writel(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i32*
store volatile i32 %0, i32* %3
ret void
}
int qcs_min_float(float a, float b) { return a > b ? b : a; }


x86 assembly (clang, -O0):
<qcs_min_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    112c <qcs_min_float+0x2c>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <qcs_min_float+0x36>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcs_min_float>:
minss  %xmm0,%xmm1
cvttss2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @qcs_min_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %4
br label %12
10: ; preds = %2
%11 = load float, float* %3
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
%14 = fptosi float %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @qcs_min_float(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = select i1 %3, float %1, float %0
%5 = fptosi float %4 to i32
ret i32 %5
}
void register_handler_proc(unsigned int irq, struct irqaction *action) {}


x86 assembly (clang, -O0):
<register_handler_proc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_handler_proc>:
ret

LLVM IR (-O0):
%struct.irqaction = type opaque
define void @register_handler_proc(i32 %0, %struct.irqaction* %1) {
%3 = alloca i32
%4 = alloca %struct.irqaction*
store i32 %0, i32* %3
store %struct.irqaction* %1, %struct.irqaction** %4
ret void
}

LLVM IR (-O2):
%struct.irqaction = type opaque
define void @register_handler_proc(i32 %0, %struct.irqaction* nocapture %1) {
ret void
}
/* Type definitions */
struct rds_encoder {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct rds_encoder *);
int /*<<< orphan*/ rds_close_serial(struct rds_encoder *);
int rds_exit(struct rds_encoder *enc) {
  rds_close_serial(enc);
  free(enc);
  return 0;
}


x86 assembly (clang, -O0):
<rds_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <rds_close_serial@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rds_exit>:
push   %rbx
mov    %rdi,%rbx
call   1040 <rds_close_serial@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.rds_encoder = type { i32 }
define i32 @rds_exit(%struct.rds_encoder* %0) {
%2 = alloca %struct.rds_encoder*
store %struct.rds_encoder* %0, %struct.rds_encoder** %2
%3 = load %struct.rds_encoder*, %struct.rds_encoder** %2
%4 = call i32 @rds_close_serial(%struct.rds_encoder* %3)
%5 = load %struct.rds_encoder*, %struct.rds_encoder** %2
%6 = call i32 @free(%struct.rds_encoder* %5)
ret i32 0
}

LLVM IR (-O2):
%struct.rds_encoder = type { i32 }
define i32 @rds_exit(%struct.rds_encoder* %0) {
%2 = tail call i32 @rds_close_serial(%struct.rds_encoder* %0)
%3 = tail call i32 @free(%struct.rds_encoder* %0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ localtime_r(int /*<<< orphan*/ *, struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void _fattmnow(struct tm *tm) {
  time_t t;
  t = time(NULL);
  localtime_r(&t, tm);
}


x86 assembly (clang, -O0):
<_fattmnow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
call   1030 <localtime_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fattmnow>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
mov    %rbx,%rsi
call   1030 <localtime_r@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define void @_fattmnow(%struct.tm* %0) {
%2 = alloca %struct.tm*
%3 = alloca i32
store %struct.tm* %0, %struct.tm** %2
%4 = call i32 @time(i32* null)
store i32 %4, i32* %3
%5 = load %struct.tm*, %struct.tm** %2
%6 = call i32 @localtime_r(i32* %3, %struct.tm* %5)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define void @_fattmnow(%struct.tm* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = tail call i32 @time(i32* null)
store i32 %4, i32* %2
%5 = call i32 @localtime_r(i32* %2, %struct.tm* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int tm_year;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int get_curr_year() {
  time_t now = time(NULL);
  struct tm *timeinfo = localtime(&now);
  return 1900 + timeinfo->tm_year;
}


x86 assembly (clang, -O0):
<get_curr_year>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x76c,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_curr_year>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
mov    $0x76c,%ecx
add    (%rax),%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @get_curr_year() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = getelementptr inbounds %struct.tm, %struct.tm* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = add nsw i32 1900, %7
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @get_curr_year() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 0
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1900
ret i32 %7
}
int snd_pcm_hw_constraint_list(struct snd_pcm_runtime *run, int var1, int var2,
                               void *ptr) {
  return 0;
}


x86 assembly (clang, -O0):
<snd_pcm_hw_constraint_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_pcm_hw_constraint_list>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.snd_pcm_runtime = type opaque
define i32 @snd_pcm_hw_constraint_list(%struct.snd_pcm_runtime* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.snd_pcm_runtime*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store %struct.snd_pcm_runtime* %0, %struct.snd_pcm_runtime** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
ret i32 0
}

LLVM IR (-O2):
%struct.snd_pcm_runtime = type opaque
define i32 @snd_pcm_hw_constraint_list(%struct.snd_pcm_runtime* nocapture readnone %0, i32 %1, i32 %2, i8* nocapture readnone %3) {
ret i32 0
}
void rotr(int *a, int *b, int *c) {
  int temp;
  temp = *a;
  *a = *c;
  *c = *b;
  *b = temp;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rdi),%eax
mov    (%rdx),%ecx
mov    %ecx,(%rdi)
mov    (%rsi),%ecx
mov    %ecx,(%rdx)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
store i32 %9, i32* %7
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = load i32*, i32** %4
store i32 %11, i32* %12
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = load i32*, i32** %6
store i32 %14, i32* %15
%16 = load i32, i32* %7
%17 = load i32*, i32** %5
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %2
store i32 %5, i32* %0
%6 = load i32, i32* %1
store i32 %6, i32* %2
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void not_reg32(unsigned long reg32) {
  put8(0xF7);
  put8(0xD0 + reg32);
}


x86 assembly (clang, -O0):
<not_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xf7,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%rax
add    $0xd0,%rax
mov    %eax,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<not_reg32>:
push   %rbx
mov    %rdi,%rbx
mov    $0xf7,%edi
call   1030 <put8@plt>
add    $0xd0,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @not_reg32(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 @put8(i32 247)
%4 = load i64, i64* %2
%5 = add i64 208, %4
%6 = trunc i64 %5 to i32
%7 = call i32 @put8(i32 %6)
ret void
}

LLVM IR (-O2):
define void @not_reg32(i64 %0) {
%2 = tail call i32 @put8(i32 247)
%3 = trunc i64 %0 to i32
%4 = add i32 %3, 208
%5 = tail call i32 @put8(i32 %4)
ret void
}
int compar_double(const void *a, const void *b, void *param) {
  return ((int)((((*(double *)(a)) - (*(double *)(b))) > 0.0) -
                (((*(double *)(a)) - (*(double *)(b))) < 0.0)));
}


x86 assembly (clang, -O0):
<compar_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
subsd  (%rax),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x8(%rbp),%rcx
movsd  (%rcx),%xmm1
mov    -0x10(%rbp),%rcx
subsd  (%rcx),%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compar_double>:
movsd  (%rdi),%xmm0
subsd  (%rsi),%xmm0
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compar_double(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to double*
%9 = load double, double* %8
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to double*
%12 = load double, double* %11
%13 = fsub double %9, %12
%14 = fcmp ogt double %13, 0.000000e+00
%15 = zext i1 %14 to i32
%16 = load i8*, i8** %4
%17 = bitcast i8* %16 to double*
%18 = load double, double* %17
%19 = load i8*, i8** %5
%20 = bitcast i8* %19 to double*
%21 = load double, double* %20
%22 = fsub double %18, %21
%23 = fcmp olt double %22, 0.000000e+00
%24 = zext i1 %23 to i32
%25 = sub nsw i32 %15, %24
ret i32 %25
}

LLVM IR (-O2):
define i32 @compar_double(i8* nocapture %0, i8* nocapture %1, i8* nocapture readnone %2) {
%4 = bitcast i8* %0 to double*
%5 = load double, double* %4
%6 = bitcast i8* %1 to double*
%7 = load double, double* %6
%8 = fsub double %5, %7
%9 = fcmp ogt double %8, 0.000000e+00
%10 = zext i1 %9 to i32
%11 = fcmp olt double %8, 0.000000e+00
%12 = sext i1 %11 to i32
%13 = add nsw i32 %12, %10
ret i32 %13
}
/* Type definitions */
typedef unsigned int uint8_t;

/* Variables and functions */
unsigned int mget1(const uint8_t *data) { return data[0]; }


x86 assembly (clang, -O0):
<mget1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mget1>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @mget1(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @mget1(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, int);
void printInt(char name, int x) { printf("数据%c的值为%d \n", name, x); }


x86 assembly (clang, -O0):
<printInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%edx
lea    0xed2(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printInt>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"\E6\95\B0\E6\8D\AE%c\E7\9A\84\E5\80\BC\E4\B8\BA%d \0A\00"
define void @printInt(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8 signext %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"\E6\95\B0\E6\8D\AE%c\E7\9A\84\E5\80\BC\E4\B8\BA%d \0A\00"
define void @printInt(i8 signext %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8 signext %0, i32 %1)
ret void
}
unsigned xrop3_172_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D ^ S;
  stk2 = T & stk3;
  stk1 = S ^ stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_172_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_172_0_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
mov    %ecx,%eax
xor    $0xff,%eax
and    %edx,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_172_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %6
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %7
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
ret i32 %32
}

LLVM IR (-O2):
define i32 @xrop3_172_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, 255
%8 = and i32 %6, %7
%9 = xor i32 %8, %4
ret i32 %9
}
void foo7() {
  switch (0) { foo7(); }
}


x86 assembly (clang, -O0):
<foo7>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo7>:
ret

LLVM IR (-O0):
define void @foo7() {
ret void
}

LLVM IR (-O2):
define void @foo7() {
ret void
}