int conv(char deck) {
  switch (deck) {
  case '2':
    return 2;
  case '3':
    return 3;
  case '4':
    return 4;
  case '5':
    return 5;
  case '6':
    return 6;
  case '7':
    return 7;
  case '8':
    return 8;
  case '9':
    return 9;
  case 'T':
    return 10;
  case 'J':
    return 11;
  case 'Q':
    return 12;
  case 'K':
    return 13;
  case 'A':
    return 14;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<conv>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffce,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x22,%eax
ja     11d0 <conv+0xd0>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x2,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x3,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x4,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x5,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x6,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x7,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x8,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x9,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0xa,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0xb,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0xc,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0xd,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0xe,-0x4(%rbp)
jmp    11d7 <conv+0xd7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv>:
add    $0xffffffce,%edi
cmp    $0x22,%edi
ja     1147 <conv+0x47>
mov    $0x2,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x3,%eax
ret
mov    $0x4,%eax
ret
mov    $0x5,%eax
ret
mov    $0x6,%eax
ret
mov    $0x7,%eax
ret
mov    $0x8,%eax
ret
mov    $0x9,%eax
ret
xor    %eax,%eax
ret
mov    $0xe,%eax
ret
mov    $0xb,%eax
ret
mov    $0xd,%eax
ret
mov    $0xc,%eax
ret
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @conv(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %19 [
i32 50, label %6
i32 51, label %7
i32 52, label %8
i32 53, label %9
i32 54, label %10
i32 55, label %11
i32 56, label %12
i32 57, label %13
i32 84, label %14
i32 74, label %15
i32 81, label %16
i32 75, label %17
i32 65, label %18
]
6: ; preds = %1
store i32 2, i32* %2
br label %20
7: ; preds = %1
store i32 3, i32* %2
br label %20
8: ; preds = %1
store i32 4, i32* %2
br label %20
9: ; preds = %1
store i32 5, i32* %2
br label %20
10: ; preds = %1
store i32 6, i32* %2
br label %20
11: ; preds = %1
store i32 7, i32* %2
br label %20
12: ; preds = %1
store i32 8, i32* %2
br label %20
13: ; preds = %1
store i32 9, i32* %2
br label %20
14: ; preds = %1
store i32 10, i32* %2
br label %20
15: ; preds = %1
store i32 11, i32* %2
br label %20
16: ; preds = %1
store i32 12, i32* %2
br label %20
17: ; preds = %1
store i32 13, i32* %2
br label %20
18: ; preds = %1
store i32 14, i32* %2
br label %20
19: ; preds = %1
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @conv(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %15 [
i32 50, label %16
i32 51, label %3
i32 52, label %4
i32 53, label %5
i32 54, label %6
i32 55, label %7
i32 56, label %8
i32 57, label %9
i32 84, label %10
i32 74, label %11
i32 81, label %12
i32 75, label %13
i32 65, label %14
]
3: ; preds = %1
br label %16
4: ; preds = %1
br label %16
5: ; preds = %1
br label %16
6: ; preds = %1
br label %16
7: ; preds = %1
br label %16
8: ; preds = %1
br label %16
9: ; preds = %1
br label %16
10: ; preds = %1
br label %16
11: ; preds = %1
br label %16
12: ; preds = %1
br label %16
13: ; preds = %1
br label %16
14: ; preds = %1
br label %16
15: ; preds = %1
br label %16
16: ; preds = %1, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5, %4, %3
%17 = phi i32 [ 0, %15 ], [ 14, %14 ], [ 13, %13 ], [ 12, %12 ], [ 11, %11 ], [ 10, %10 ], [ 9, %9 ], [ 8, %8 ], [ 7, %7 ], [ 6, %6 ], [ 5, %5 ], [ 4, %4 ], [ 3, %3 ], [ 2, %1 ]
ret i32 %17
}