xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int swap(int len, char arr[]) {
  if (len < 0)
    return 0;
  printf("%c", arr[len]);
  return swap(len - 1, arr);
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1145 <swap+0x25>
movl   $0x0,-0x4(%rbp)
jmp    116f <swap+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
lea    0xeac(%rip),%rdi
movsbl (%rax,%rcx,1),%esi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0x10(%rbp),%rsi
call   1040 <swap@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
js     1143 <swap+0x33>
mov    %rsi,%r15
mov    %edi,%ebx
lea    0xedb(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
movsbl (%r15,%rbx,1),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffffffffffff,%rbx
jb     1130 <swap+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @swap(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %20
9: ; preds = %2
%10 = load i8*, i8** %5
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %14)
%16 = load i32, i32* %4
%17 = sub nsw i32 %16, 1
%18 = load i8*, i8** %5
%19 = call i32 @swap(i32 %17, i8* %18)
store i32 %19, i32* %3
br label %20
20: ; preds = %9, %8
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @swap(i32 %0, i8* nocapture %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %1, i64 %7
%9 = load i8, i8* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %9)
%11 = add nsw i64 %7, -1
%12 = icmp eq i64 %7, 0
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret i32 0
}
void RTUuidToStr(void) {}


x86 assembly (clang, -O0):
<RTUuidToStr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTUuidToStr>:
ret

LLVM IR (-O0):
define void @RTUuidToStr() {
ret void
}

LLVM IR (-O2):
define void @RTUuidToStr() {
ret void
}
syslog_ERROR() {}


x86 assembly (clang, -O0):
<syslog_ERROR>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syslog_ERROR>:
ret

LLVM IR (-O0):
define i32 @syslog_ERROR() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @syslog_ERROR() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void stereopan_unload_signal(void *signal) { free(signal); }


x86 assembly (clang, -O0):
<stereopan_unload_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stereopan_unload_signal>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @stereopan_unload_signal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @stereopan_unload_signal(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ exp2l(long double);
int /*<<< orphan*/ link_failure_exp2l();
void test_exp2l(long double ld) {
  if (exp2l(ld) != exp2l(ld))
    link_failure_exp2l();
}


x86 assembly (clang, -O0):
<test_exp2l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <exp2l@plt>
mov    %rax,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <exp2l@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1163 <test_exp2l+0x43>
mov    $0x0,%al
call   1040 <link_failure_exp2l@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_exp2l>:
push   %rbx
sub    $0x20,%rsp
fldt   0x30(%rsp)
fld    %st(0)
fstpt  0x14(%rsp)
fstpt  (%rsp)
call   1030 <exp2l@plt>
mov    %rax,%rbx
fldt   0x14(%rsp)
fstpt  (%rsp)
call   1030 <exp2l@plt>
cmp    %rax,%rbx
jne    1151 <test_exp2l+0x31>
add    $0x20,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
jmp    1040 <link_failure_exp2l@plt>

LLVM IR (-O0):
define void @test_exp2l(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @exp2l(x86_fp80 %3)
%5 = load x86_fp80, x86_fp80* %2
%6 = call i64 @exp2l(x86_fp80 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_exp2l()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_exp2l(x86_fp80 %0) {
%2 = tail call i64 @exp2l(x86_fp80 %0)
%3 = tail call i64 @exp2l(x86_fp80 %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_exp2l()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int from_gps(int);
int accum_status(void) { return (from_gps(0x82)); }


x86 assembly (clang, -O0):
<accum_status>:
push   %rbp
mov    %rsp,%rbp
mov    $0x82,%edi
call   1030 <from_gps@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<accum_status>:
mov    $0x82,%edi
jmp    1030 <from_gps@plt>

LLVM IR (-O0):
define i32 @accum_status() {
%1 = call i32 @from_gps(i32 130)
ret i32 %1
}

LLVM IR (-O2):
define i32 @accum_status() {
%1 = tail call i32 @from_gps(i32 130)
ret i32 %1
}
void QUARK_Bit_Set(unsigned char *set, int number, int value) {
  set += number / 8;
  if (value)
    *set |= 1 << (7 - (number % 8));
  else
    *set &= ~(1 << (7 - (number % 8)));
}


x86 assembly (clang, -O0):
<QUARK_Bit_Set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     115c <QUARK_Bit_Set+0x5c>
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    $0x7,%ecx
sub    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
or     %edx,%ecx
mov    %cl,(%rax)
jmp    1183 <QUARK_Bit_Set+0x83>
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    $0x7,%ecx
sub    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
and    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<QUARK_Bit_Set>:
lea    0x7(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
mov    %eax,%r8d
and    $0xfffffff8,%eax
sub    %eax,%esi
mov    $0x7,%cl
sub    %sil,%cl
mov    $0x1,%esi
shl    %cl,%esi
sar    $0x3,%r8d
movslq %r8d,%r8
mov    (%rdi,%r8,1),%cl
mov    %esi,%eax
not    %al
and    %cl,%al
or     %sil,%cl
test   %edx,%edx
movzbl %cl,%ecx
movzbl %al,%eax
cmovne %ecx,%eax
mov    %al,(%rdi,%r8,1)
ret

LLVM IR (-O0):
define void @QUARK_Bit_Set(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = sdiv i32 %7, 8
%9 = load i8*, i8** %4
%10 = sext i32 %8 to i64
%11 = getelementptr inbounds i8, i8* %9, i64 %10
store i8* %11, i8** %4
%12 = load i32, i32* %6
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %24
14: ; preds = %3
%15 = load i32, i32* %5
%16 = srem i32 %15, 8
%17 = sub nsw i32 7, %16
%18 = shl i32 1, %17
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = or i32 %21, %18
%23 = trunc i32 %22 to i8
store i8 %23, i8* %19
br label %35
24: ; preds = %3
%25 = load i32, i32* %5
%26 = srem i32 %25, 8
%27 = sub nsw i32 7, %26
%28 = shl i32 1, %27
%29 = xor i32 %28, -1
%30 = load i8*, i8** %4
%31 = load i8, i8* %30
%32 = zext i8 %31 to i32
%33 = and i32 %32, %29
%34 = trunc i32 %33 to i8
store i8 %34, i8* %30
br label %35
35: ; preds = %24, %14
ret void
}

LLVM IR (-O2):
define void @QUARK_Bit_Set(i8* nocapture %0, i32 %1, i32 %2) {
%4 = sdiv i32 %1, 8
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = icmp eq i32 %2, 0
%8 = srem i32 %1, 8
%9 = sub nsw i32 7, %8
%10 = shl nuw nsw i32 1, %9
%11 = load i8, i8* %6
%12 = trunc i32 %10 to i8
%13 = xor i8 %12, -1
%14 = and i8 %11, %13
%15 = or i8 %11, %12
%16 = select i1 %7, i8 %14, i8 %15
store i8 %16, i8* %6
ret void
}
int bar(int y) { return y + 1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
int main(void) {
  int i;
  unsigned char in[128], out[128];
  check_vect();
  for (i = 0; i < 128; i++) {
    in[i] = i;
    out[i] = 255;
    __asm__ volatile("");
  }
  foo(in, out);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x80,-0x8(%rbp)
jge    1177 <main+0x57>
mov    -0x8(%rbp),%eax
mov    %al,%cl
movslq -0x8(%rbp),%rax
mov    %cl,-0x90(%rbp,%rax,1)
movslq -0x8(%rbp),%rax
movb   $0xff,-0x110(%rbp,%rax,1)
ff
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1140 <main+0x20>
lea    -0x90(%rbp),%rdi
lea    -0x110(%rbp),%rsi
mov    $0x0,%al
call   1040 <foo@plt>
xor    %eax,%eax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x100,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <check_vect@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %bl,0x80(%rsp,%rbx,1)
movb   $0xff,(%rsp,%rbx,1)
add    $0x1,%rbx
cmp    $0x80,%rbx
jne    1140 <main+0x20>
lea    0x80(%rsp),%rdi
mov    %rsp,%rsi
xor    %eax,%eax
call   1040 <foo@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [128 x i8]
%4 = alloca [128 x i8]
store i32 0, i32* %1
%5 = call i32 (...) @check_vect()
store i32 0, i32* %2
br label %6
6: ; preds = %18, %0
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 128
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %2
%11 = trunc i32 %10 to i8
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 %13
store i8 %11, i8* %14
%15 = load i32, i32* %2
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 %16
store i8 -1, i8* %17
br label %18
18: ; preds = %9
%19 = load i32, i32* %2
%20 = add nsw i32 %19, 1
store i32 %20, i32* %2
br label %6
21: ; preds = %6
%22 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%23 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%24 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @foo to i32 (i8*, i8*, ...)*)(i8* %22, i8* %23)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [128 x i8]
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%5 = tail call i32 (...) @check_vect()
br label %6
6: ; preds = %0, %6
%7 = phi i64 [ 0, %0 ], [ %11, %6 ]
%8 = trunc i64 %7 to i8
%9 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 %7
store i8 %8, i8* %9
%10 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 %7
store i8 -1, i8* %10
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, 128
br i1 %12, label %13, label %6
13: ; preds = %6
%14 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @foo to i32 (i8*, i8*, ...)*)(i8* %3, i8* %4)
ret i32 0
}
/* Variables and functions */
char *RINDEX(char *, char);
scalar_t__ strcmp(char *, char *);
int is_header(char *name) {
  char *p = RINDEX(name, '.');
  return strcmp(p, ".h") == 0;
}


x86 assembly (clang, -O0):
<is_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <RINDEX@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb7(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_header>:
push   %rax
mov    $0x2e,%esi
call   1040 <RINDEX@plt>
lea    0xece(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c".h\00"
define i32 @is_header(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @RINDEX(i8* %4, i8 signext 46)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i64 @strcmp(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@.str = [3 x i8] c".h\00"
define i32 @is_header(i8* %0) {
%2 = tail call i8* @RINDEX(i8* %0, i8 signext 46)
%3 = tail call i64 @strcmp(i8* %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn(
        "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
        "2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/"
        "genfiles/remove_labels.c",
        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [154 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/remove_labels.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([154 x i8], [154 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [154 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/remove_labels.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([154 x i8], [154 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ radixSort(int *, int);
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int main() {
  int testValues[100000], i;
  srand(time(NULL));
  for (i = 0; i < 100000; i++)
    testValues[i] = rand();
  radixSort(testValues, 100000);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x61aa0,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1050 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
movl   $0x0,-0x61a94(%rbp)
cmpl   $0x186a0,-0x61a94(%rbp)
jge    11a7 <main+0x67>
mov    $0x0,%al
call   1060 <rand@plt>
mov    %eax,%ecx
movslq -0x61a94(%rbp),%rax
mov    %ecx,-0x61a90(%rbp,%rax,4)
mov    -0x61a94(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x61a94(%rbp)
jmp    116c <main+0x2c>
lea    -0x61a90(%rbp),%rdi
mov    $0x186a0,%esi
call   1040 <radixSort@plt>
xor    %eax,%eax
add    $0x61aa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x61a80,%rsp
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1060 <rand@plt>
mov    %eax,(%rsp,%rbx,4)
add    $0x1,%rbx
cmp    $0x186a0,%rbx
jne    1160 <main+0x20>
mov    %rsp,%rdi
mov    $0x186a0,%esi
call   1040 <radixSort@plt>
xor    %eax,%eax
add    $0x61a80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [100000 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @time(i32* null)
%5 = call i32 @srand(i32 %4)
store i32 0, i32* %3
br label %6
6: ; preds = %14, %0
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 100000
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = call i32 (...) @rand()
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [100000 x i32], [100000 x i32]* %2, i64 0, i64 %12
store i32 %10, i32* %13
br label %14
14: ; preds = %9
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %6
17: ; preds = %6
%18 = getelementptr inbounds [100000 x i32], [100000 x i32]* %2, i64 0, i64 0
%19 = call i32 @radixSort(i32* %18, i32 100000)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [100000 x i32]
%2 = bitcast [100000 x i32]* %1 to i8*
%3 = tail call i32 @time(i32* null)
%4 = tail call i32 @srand(i32 %3)
br label %5
5: ; preds = %0, %5
%6 = phi i64 [ 0, %0 ], [ %9, %5 ]
%7 = tail call i32 (...) @rand()
%8 = getelementptr inbounds [100000 x i32], [100000 x i32]* %1, i64 0, i64 %6
store i32 %7, i32* %8
%9 = add nuw nsw i64 %6, 1
%10 = icmp eq i64 %9, 100000
br i1 %10, label %11, label %5
11: ; preds = %5
%12 = getelementptr inbounds [100000 x i32], [100000 x i32]* %1, i64 0, i64 0
%13 = call i32 @radixSort(i32* %12, i32 100000)
ret i32 0
}
/* Type definitions */
typedef int uint_fast32_t;

/* Variables and functions */
bool softfloat_isSigNaNF32UI(uint_fast32_t ui) {
  return ((ui >> 22 & 0x1FF) == 0x1FE) && (ui & 0x003FFFFF);
}


x86 assembly (clang, -O0):
<softfloat_isSigNaNF32UI>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x16,%ecx
and    $0x1ff,%ecx
xor    %eax,%eax
cmp    $0x1fe,%ecx
mov    %al,-0x5(%rbp)
jne    1135 <softfloat_isSigNaNF32UI+0x35>
mov    -0x4(%rbp),%eax
and    $0x3fffff,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<softfloat_isSigNaNF32UI>:
mov    %edi,%eax
and    $0x7fc00000,%eax
cmp    $0x7f800000,%eax
sete   %al
test   $0x3fffff,%edi
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @softfloat_isSigNaNF32UI(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 22
%5 = and i32 %4, 511
%6 = icmp eq i32 %5, 510
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %2
%9 = and i32 %8, 4194303
%10 = icmp ne i32 %9, 0
br label %11
11: ; preds = %7, %1
%12 = phi i1 [ false, %1 ], [ %10, %7 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @softfloat_isSigNaNF32UI(i32 %0) {
%2 = and i32 %0, 2143289344
%3 = icmp eq i32 %2, 2139095040
%4 = and i32 %0, 4194303
%5 = icmp ne i32 %4, 0
%6 = and i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ rgph_u64_xxh64s_data32(int /*<<< orphan*/ const *, size_t,
                                          uintptr_t);
uint64_t rgph_u64_xxh64s_u32a(const uint32_t *key, size_t len, uintptr_t seed) {
  return rgph_u64_xxh64s_data32(key, len, seed);
}


x86 assembly (clang, -O0):
<rgph_u64_xxh64s_u32a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <rgph_u64_xxh64s_data32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u64_xxh64s_u32a>:
jmp    1030 <rgph_u64_xxh64s_data32@plt>

LLVM IR (-O0):
define i32 @rgph_u64_xxh64s_u32a(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @rgph_u64_xxh64s_data32(i32* %7, i64 %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @rgph_u64_xxh64s_u32a(i32* %0, i64 %1, i64 %2) {
%4 = tail call i32 @rgph_u64_xxh64s_data32(i32* %0, i64 %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
int log(int /*<<< orphan*/);
int /*<<< orphan*/ rand_norm();
double sample_exp(void) { return -log(rand_norm()) - 1; }


x86 assembly (clang, -O0):
<sample_exp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand_norm@plt>
mov    %eax,%edi
call   1040 <log@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
sub    $0x1,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample_exp>:
push   %rax
xor    %eax,%eax
call   1030 <rand_norm@plt>
mov    %eax,%edi
call   1040 <log@plt>
not    %eax
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sample_exp() {
%1 = call i32 (...) @rand_norm()
%2 = call i32 @log(i32 %1)
%3 = sub nsw i32 0, %2
%4 = sub nsw i32 %3, 1
%5 = sitofp i32 %4 to double
ret double %5
}

LLVM IR (-O2):
define double @sample_exp() {
%1 = tail call i32 (...) @rand_norm()
%2 = tail call i32 @log(i32 %1)
%3 = xor i32 %2, -1
%4 = sitofp i32 %3 to double
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpngt_pd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmpngt_pd(__m128d __a, __m128d __b) {
  return _mm_cmpngt_pd(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpngt_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpngt_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpngt_pd>:
jmp    1030 <_mm_cmpngt_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpngt_pd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpngt_pd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpngt_pd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpngt_pd(i32 %0, i32 %1)
ret i32 %3
}
int num_points_for_cell(int celltype) {
  int npts = 0;
  switch (celltype) {
  case 1:
    npts = 1;
    break;
  case 3:
    npts = 2;
    break;
  case 5:
    npts = 3;
    break;
  case 9:
    npts = 4;
    break;
  case 8:
    npts = 4;
    break;
  case 10:
    npts = 4;
    break;
  case 12:
    npts = 8;
    break;
  case 11:
    npts = 8;
    break;
  case 13:
    npts = 6;
    break;
  case 14:
    npts = 5;
    break;
  }
  return npts;
}


x86 assembly (clang, -O0):
<num_points_for_cell>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0xd,%eax
ja     11aa <num_points_for_cell+0xaa>
mov    -0x10(%rbp),%rax
lea    0xed2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x2,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x3,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x4,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x4,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x4,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x8,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x8,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x6,-0x8(%rbp)
jmp    11aa <num_points_for_cell+0xaa>
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_points_for_cell>:
add    $0xffffffff,%edi
xor    %eax,%eax
cmp    $0xd,%edi
ja     1117 <num_points_for_cell+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @num_points_for_cell(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %15 [
i32 1, label %5
i32 3, label %6
i32 5, label %7
i32 9, label %8
i32 8, label %9
i32 10, label %10
i32 12, label %11
i32 11, label %12
i32 13, label %13
i32 14, label %14
]
5: ; preds = %1
store i32 1, i32* %3
br label %15
6: ; preds = %1
store i32 2, i32* %3
br label %15
7: ; preds = %1
store i32 3, i32* %3
br label %15
8: ; preds = %1
store i32 4, i32* %3
br label %15
9: ; preds = %1
store i32 4, i32* %3
br label %15
10: ; preds = %1
store i32 4, i32* %3
br label %15
11: ; preds = %1
store i32 8, i32* %3
br label %15
12: ; preds = %1
store i32 8, i32* %3
br label %15
13: ; preds = %1
store i32 6, i32* %3
br label %15
14: ; preds = %1
store i32 5, i32* %3
br label %15
15: ; preds = %1, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@switch.table.num_points_for_cell = [14 x i32] [i32 1, i32 0, i32 2, i32 0, i32 3, i32 0, i32 0, i32 4, i32 4, i32 4, i32 8, i32 8, i32 6, i32 5]
define i32 @num_points_for_cell(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 14
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [14 x i32], [14 x i32]* @switch.table.num_points_for_cell, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
long SLEEP(sec)
long *sec;
{ return (sleep(*sec)); }


x86 assembly (clang, -O0):
<SLEEP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    $0x0,%al
call   1030 <sleep@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SLEEP>:
push   %rax
mov    (%rdi),%rdi
xor    %eax,%eax
call   1030 <sleep@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @SLEEP(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = call i32 (i64, ...) bitcast (i32 (...)* @sleep to i32 (i64, ...)*)(i64 %4)
%6 = sext i32 %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @SLEEP(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = tail call i32 (i64, ...) bitcast (i32 (...)* @sleep to i32 (i64, ...)*)(i64 %2)
%4 = sext i32 %3 to i64
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
int /*<<< orphan*/ XCloseDisplay(int /*<<< orphan*/ *);
int /*<<< orphan*/ *XOpenDisplay(int /*<<< orphan*/ *);
int /*<<< orphan*/ puts(char *);
int main(int argc, char **argv) {
  Display *display;
  display = XOpenDisplay(NULL);
  if (display) {
    puts("OK");
    XCloseDisplay(display);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <XOpenDisplay@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1173 <main+0x43>
lea    0xe9b(%rip),%rdi
call   1030 <puts@plt>
mov    -0x18(%rbp),%rdi
call   1050 <XCloseDisplay@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %edi,%edi
call   1040 <XOpenDisplay@plt>
test   %rax,%rax
je     1154 <main+0x24>
mov    %rax,%rbx
lea    0xeb9(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1050 <XCloseDisplay@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"OK\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32* @XOpenDisplay(i32* null)
store i32* %7, i32** %6
%8 = load i32*, i32** %6
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = call i32 @puts(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%12 = load i32*, i32** %6
%13 = call i32 @XCloseDisplay(i32* %12)
br label %14
14: ; preds = %10, %2
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"OK\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* @XOpenDisplay(i32* null)
%4 = icmp eq i32* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @XCloseDisplay(i32* %3)
br label %8
8: ; preds = %5, %2
ret i32 0
}
/* Type definitions */
struct dirent {
  int *d_name;
};

/* Variables and functions */
int doselect(const struct dirent *d) {
  int c = d->d_name[0];
  if ((c == 't' || c == 'c' || c == 'd') && d->d_name[1] == 'f')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<doselect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x74,-0x14(%rbp)
je     1132 <doselect+0x32>
cmpl   $0x63,-0x14(%rbp)
je     1132 <doselect+0x32>
cmpl   $0x64,-0x14(%rbp)
jne    114f <doselect+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmpl   $0x66,0x4(%rax)
jne    114f <doselect+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1156 <doselect+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doselect>:
mov    (%rdi),%rcx
mov    (%rcx),%eax
add    $0xffffff9d,%eax
cmp    $0x11,%eax
ja     1122 <doselect+0x22>
mov    $0x20003,%edx
bt     %eax,%edx
jae    1122 <doselect+0x22>
mov    $0x1,%eax
cmpl   $0x66,0x4(%rcx)
je     1124 <doselect+0x24>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dirent = type { i32* }
define i32 @doselect(%struct.dirent* %0) {
%2 = alloca i32
%3 = alloca %struct.dirent*
%4 = alloca i32
store %struct.dirent* %0, %struct.dirent** %3
%5 = load %struct.dirent*, %struct.dirent** %3
%6 = getelementptr inbounds %struct.dirent, %struct.dirent* %5, i32 0, i32 0
%7 = load i32*, i32** %6
%8 = getelementptr inbounds i32, i32* %7, i64 0
%9 = load i32, i32* %8
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 116
br i1 %11, label %18, label %12
12: ; preds = %1
%13 = load i32, i32* %4
%14 = icmp eq i32 %13, 99
br i1 %14, label %18, label %15
15: ; preds = %12
%16 = load i32, i32* %4
%17 = icmp eq i32 %16, 100
br i1 %17, label %18, label %26
18: ; preds = %15, %12, %1
%19 = load %struct.dirent*, %struct.dirent** %3
%20 = getelementptr inbounds %struct.dirent, %struct.dirent* %19, i32 0, i32 0
%21 = load i32*, i32** %20
%22 = getelementptr inbounds i32, i32* %21, i64 1
%23 = load i32, i32* %22
%24 = icmp eq i32 %23, 102
br i1 %24, label %25, label %26
25: ; preds = %18
store i32 1, i32* %2
br label %27
26: ; preds = %18, %15
store i32 0, i32* %2
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
%struct.dirent = type { i32* }
define i32 @doselect(%struct.dirent* nocapture %0) {
%2 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 116, label %5
i32 100, label %5
i32 99, label %5
]
5: ; preds = %1, %1, %1
%6 = getelementptr inbounds i32, i32* %3, i64 1
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 102
br i1 %8, label %10, label %9
9: ; preds = %1, %5
br label %10
10: ; preds = %5, %9
%11 = phi i32 [ 0, %9 ], [ 1, %5 ]
ret i32 %11
}
/* Type definitions */
typedef int time_t;
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/);
time_t millis() {
  struct timeval tv;
  gettimeofday(&tv, 0);
  return (tv.tv_sec * 1000) + (tv.tv_usec / 1000);
}


x86 assembly (clang, -O0):
<millis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<millis>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,(%rsp),%ecx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @millis() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @millis() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ Delay_ms(int);
void Move_Delay() { Delay_ms(500); }


x86 assembly (clang, -O0):
<Move_Delay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f4,%edi
call   1030 <Delay_ms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Move_Delay>:
mov    $0x1f4,%edi
jmp    1030 <Delay_ms@plt>

LLVM IR (-O0):
define void @Move_Delay() {
%1 = call i32 @Delay_ms(i32 500)
ret void
}

LLVM IR (-O2):
define void @Move_Delay() {
%1 = tail call i32 @Delay_ms(i32 500)
ret void
}
int get_hexchar_value(int c) {
  int nibble = c & 0x0f;
  if ((c >= '0') && (c <= '9')) {
    return nibble;
  }
  return nibble + 9;
}


x86 assembly (clang, -O0):
<get_hexchar_value>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xf,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     112f <get_hexchar_value+0x2f>
cmpl   $0x39,-0x8(%rbp)
jg     112f <get_hexchar_value+0x2f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1138 <get_hexchar_value+0x38>
mov    -0xc(%rbp),%eax
add    $0x9,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_hexchar_value>:
mov    %edi,%ecx
and    $0xf,%ecx
add    $0xffffffd0,%edi
lea    0x9(%rcx),%eax
cmp    $0xa,%edi
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @get_hexchar_value(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = and i32 %5, 15
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 48
br i1 %8, label %9, label %14
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 57
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = load i32, i32* %4
store i32 %13, i32* %2
br label %17
14: ; preds = %9, %1
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 9
store i32 %16, i32* %2
br label %17
17: ; preds = %14, %12
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @get_hexchar_value(i32 %0) {
%2 = and i32 %0, 15
%3 = add i32 %0, -48
%4 = icmp ult i32 %3, 10
%5 = add nuw nsw i32 %2, 9
%6 = select i1 %4, i32 %2, i32 %5
ret i32 %6
}
int is_letter(char a) {
  if (a >= 'a' && a <= 'z') {
    return 1;
  }
  if (a >= 'A' && a <= 'Z') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1130 <is_letter+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1130 <is_letter+0x30>
movl   $0x1,-0x4(%rbp)
jmp    115d <is_letter+0x5d>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1156 <is_letter+0x56>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1156 <is_letter+0x56>
movl   $0x1,-0x4(%rbp)
jmp    115d <is_letter+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_letter>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_letter(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %22
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 65
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 90
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %2
br label %22
21: ; preds = %16, %12
store i32 0, i32* %2
br label %22
22: ; preds = %21, %20, %11
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @is_letter(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
char *mem2str(char *mem, int len) {
  char *str = malloc(len + 1);
  memcpy(str, mem, len);
  str[len] = '\0';
  return str;
}


x86 assembly (clang, -O0):
<mem2str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem2str>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1030 <memcpy@plt>
movslq %r15d,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @mem2str(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i8* @malloc(i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i8*, i8** %3
%11 = load i32, i32* %4
%12 = call i32 @memcpy(i8* %9, i8* %10, i32 %11)
%13 = load i8*, i8** %5
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @mem2str(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 @memcpy(i8* %4, i8* %0, i32 %1)
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %4, i64 %6
store i8 0, i8* %7
ret i8* %4
}
unsigned get_kb_bl_level(unsigned per256) { return per256 * 4 / 256; }


x86 assembly (clang, -O0):
<get_kb_bl_level>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
shr    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_kb_bl_level>:
mov    %edi,%eax
shr    $0x6,%eax
and    $0xffffff,%eax
ret

LLVM IR (-O0):
define i32 @get_kb_bl_level(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 4
%5 = udiv i32 %4, 256
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_kb_bl_level(i32 %0) {
%2 = lshr i32 %0, 6
%3 = and i32 %2, 16777215
ret i32 %3
}
int stb_not_crap(int best, int dist) {
  return ((best > 2 && dist <= 0x00100) || (best > 5 && dist <= 0x04000) ||
          (best > 7 && dist <= 0x80000));
}


x86 assembly (clang, -O0):
<stb_not_crap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    1126 <stb_not_crap+0x26>
mov    $0x1,%al
cmpl   $0x100,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jle    1164 <stb_not_crap+0x64>
cmpl   $0x5,-0x4(%rbp)
jle    1142 <stb_not_crap+0x42>
mov    $0x1,%al
cmpl   $0x4000,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jle    1164 <stb_not_crap+0x64>
xor    %eax,%eax
cmpl   $0x7,-0x4(%rbp)
mov    %al,-0xa(%rbp)
jle    115e <stb_not_crap+0x5e>
cmpl   $0x80000,-0x8(%rbp)
setle  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb_not_crap>:
mov    $0x1,%eax
cmp    $0x3,%edi
jl     1113 <stb_not_crap+0x13>
cmp    $0x101,%esi
jge    1113 <stb_not_crap+0x13>
ret
cmp    $0x6,%edi
jl     1120 <stb_not_crap+0x20>
cmp    $0x4001,%esi
jl     1112 <stb_not_crap+0x12>
cmp    $0x8,%edi
setge  %al
cmp    $0x80001,%esi
setl   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @stb_not_crap(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp sle i32 %8, 256
br i1 %9, label %24, label %10
10: ; preds = %7, %2
%11 = load i32, i32* %3
%12 = icmp sgt i32 %11, 5
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = icmp sle i32 %14, 16384
br i1 %15, label %24, label %16
16: ; preds = %13, %10
%17 = load i32, i32* %3
%18 = icmp sgt i32 %17, 7
br i1 %18, label %19, label %22
19: ; preds = %16
%20 = load i32, i32* %4
%21 = icmp sle i32 %20, 524288
br label %22
22: ; preds = %19, %16
%23 = phi i1 [ false, %16 ], [ %21, %19 ]
br label %24
24: ; preds = %22, %13, %7
%25 = phi i1 [ true, %13 ], [ true, %7 ], [ %23, %22 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @stb_not_crap(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 2
%4 = icmp slt i32 %1, 257
%5 = and i1 %3, %4
br i1 %5, label %15, label %6
6: ; preds = %2
%7 = icmp sgt i32 %0, 5
%8 = icmp slt i32 %1, 16385
%9 = and i1 %7, %8
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = icmp sgt i32 %0, 7
%12 = icmp slt i32 %1, 524289
%13 = and i1 %11, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %6, %2, %10
%16 = phi i32 [ %14, %10 ], [ 1, %2 ], [ 1, %6 ]
ret i32 %16
}
unsigned long int unsignedlongint_ignoring_unsignedchar(unsigned long int x,
                                                        unsigned char y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlongint_ignoring_unsignedchar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlongint_ignoring_unsignedchar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlongint_ignoring_unsignedchar(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlongint_ignoring_unsignedchar(i64 returned %0, i8 zeroext %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ seq_utils_clamp(scalar_t__, int /*<<< orphan*/, int);
scalar_t__ song_get_scene_sync();
int /*<<< orphan*/ song_set_scene_sync(int /*<<< orphan*/);
void seq_ctrl_adjust_scene_sync(int change) {
  song_set_scene_sync(seq_utils_clamp(song_get_scene_sync() + change, 0, 1));
}


x86 assembly (clang, -O0):
<seq_ctrl_adjust_scene_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <song_get_scene_sync@plt>
mov    %rax,%rdi
movslq -0x4(%rbp),%rax
add    %rax,%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1040 <seq_utils_clamp@plt>
mov    %eax,%edi
call   1050 <song_set_scene_sync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seq_ctrl_adjust_scene_sync>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <song_get_scene_sync@plt>
movslq %ebx,%rdi
add    %rax,%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1040 <seq_utils_clamp@plt>
mov    %eax,%edi
pop    %rbx
jmp    1050 <song_set_scene_sync@plt>

LLVM IR (-O0):
define void @seq_ctrl_adjust_scene_sync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 (...) @song_get_scene_sync()
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = add nsw i64 %3, %5
%7 = call i32 @seq_utils_clamp(i64 %6, i32 0, i32 1)
%8 = call i32 @song_set_scene_sync(i32 %7)
ret void
}

LLVM IR (-O2):
define void @seq_ctrl_adjust_scene_sync(i32 %0) {
%2 = tail call i64 (...) @song_get_scene_sync()
%3 = sext i32 %0 to i64
%4 = add nsw i64 %2, %3
%5 = tail call i32 @seq_utils_clamp(i64 %4, i32 0, i32 1)
%6 = tail call i32 @song_set_scene_sync(i32 %5)
ret void
}
int test_imm_CEint32_mem(int *val) {
  return ((*val) & (0xCE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CEint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xce,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CEint32_mem>:
testb  $0xce,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CEint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 206
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CEint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 206
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int nvidia_mcp_gpio_set(int, int);
int nvidia_mcp_gpio0_raise(void) { return nvidia_mcp_gpio_set(0x00, 1); }


x86 assembly (clang, -O0):
<nvidia_mcp_gpio0_raise>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <nvidia_mcp_gpio_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvidia_mcp_gpio0_raise>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <nvidia_mcp_gpio_set@plt>

LLVM IR (-O0):
define i32 @nvidia_mcp_gpio0_raise() {
%1 = call i32 @nvidia_mcp_gpio_set(i32 0, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @nvidia_mcp_gpio0_raise() {
%1 = tail call i32 @nvidia_mcp_gpio_set(i32 0, i32 1)
ret i32 %1
}