#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int DM_in_8(unsigned short, unsigned char *);
int /*<<< orphan*/ OS_disable_interrupts(unsigned long *);
int /*<<< orphan*/ OS_enable_interrupts(unsigned long);
scalar_t__ PL_lpc_base_address();
int lpc_read_reg(unsigned int reg, unsigned long *p_value) {
  int err;
  unsigned long ie;
  unsigned long value;
  unsigned char temp8;
  unsigned int k;
  if (!p_value)
    return 0x1000;
  OS_disable_interrupts(&ie);
  value = 0;
  for (k = 0; k < 4; k++) {
    err = DM_in_8((unsigned short)(PL_lpc_base_address() + reg + k), &temp8);
    if (err) {
      OS_enable_interrupts(ie);
      return err;
    }
    value |= (temp8 << (k * 8));
  }
  OS_enable_interrupts(ie);
  *p_value = value;
  return 0;
}


x86 assembly (clang, -O0):
<lpc_read_reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1166 <lpc_read_reg+0x26>
movl   $0x1000,-0x4(%rbp)
jmp    1207 <lpc_read_reg+0xc7>
lea    -0x20(%rbp),%rdi
call   1050 <OS_disable_interrupts@plt>
movq   $0x0,-0x28(%rbp)
movl   $0x0,-0x30(%rbp)
cmpl   $0x4,-0x30(%rbp)
jae    11ec <lpc_read_reg+0xac>
mov    $0x0,%al
call   1060 <PL_lpc_base_address@plt>
mov    -0x8(%rbp),%ecx
add    %rcx,%rax
mov    -0x30(%rbp),%ecx
add    %rcx,%rax
lea    -0x29(%rbp),%rsi
movzwl %ax,%edi
call   1030 <DM_in_8@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     11c8 <lpc_read_reg+0x88>
mov    -0x20(%rbp),%rdi
call   1040 <OS_enable_interrupts@plt>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1207 <lpc_read_reg+0xc7>
movzbl -0x29(%rbp),%eax
mov    -0x30(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
cltq
or     -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x30(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x30(%rbp)
jmp    117e <lpc_read_reg+0x3e>
mov    -0x20(%rbp),%rdi
call   1040 <OS_enable_interrupts@plt>
mov    -0x28(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lpc_read_reg>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x18,%rsp
test   %rsi,%rsi
je     120b <lpc_read_reg+0xcb>
mov    %rsi,%r14
mov    %edi,%ebx
lea    0x8(%rsp),%rdi
call   1050 <OS_disable_interrupts@plt>
xor    %eax,%eax
call   1060 <PL_lpc_base_address@plt>
add    %ebx,%eax
movzwl %ax,%edi
lea    0x7(%rsp),%rsi
call   1030 <DM_in_8@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    11fd <lpc_read_reg+0xbd>
mov    %ebx,%r12d
movzbl 0x7(%rsp),%r15d
xor    %eax,%eax
call   1060 <PL_lpc_base_address@plt>
add    %r12d,%eax
add    $0x1,%eax
movzwl %ax,%edi
lea    0x7(%rsp),%rsi
call   1030 <DM_in_8@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    11fd <lpc_read_reg+0xbd>
movzbl 0x7(%rsp),%r13d
xor    %eax,%eax
call   1060 <PL_lpc_base_address@plt>
add    %r12d,%eax
add    $0x2,%eax
movzwl %ax,%edi
lea    0x7(%rsp),%rsi
call   1030 <DM_in_8@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    11fd <lpc_read_reg+0xbd>
movzbl 0x7(%rsp),%eax
mov    %rax,0x10(%rsp)
xor    %ebx,%ebx
xor    %eax,%eax
call   1060 <PL_lpc_base_address@plt>
add    %r12d,%eax
add    $0x3,%eax
movzwl %ax,%edi
lea    0x7(%rsp),%rsi
call   1030 <DM_in_8@plt>
mov    %eax,%ebp
test   %eax,%eax
je     1221 <lpc_read_reg+0xe1>
mov    0x8(%rsp),%rdi
call   1040 <OS_enable_interrupts@plt>
mov    %ebp,%ebx
jmp    1210 <lpc_read_reg+0xd0>
mov    $0x1000,%ebx
mov    %ebx,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret
shl    $0x8,%r13
or     %r15,%r13
mov    0x10(%rsp),%rcx
shl    $0x10,%rcx
or     %r13,%rcx
movzbl 0x7(%rsp),%eax
shl    $0x18,%eax
movslq %eax,%rbp
or     %rcx,%rbp
mov    0x8(%rsp),%rdi
call   1040 <OS_enable_interrupts@plt>
mov    %rbp,(%r14)
jmp    1210 <lpc_read_reg+0xd0>

LLVM IR (-O0):
define i32 @lpc_read_reg(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
%9 = alloca i8
%10 = alloca i32
store i32 %0, i32* %4
store i64* %1, i64** %5
%11 = load i64*, i64** %5
%12 = icmp ne i64* %11, null
br i1 %12, label %14, label %13
13: ; preds = %2
store i32 4096, i32* %3
br label %52
14: ; preds = %2
%15 = call i32 @OS_disable_interrupts(i64* %7)
store i64 0, i64* %8
store i32 0, i32* %10
br label %16
16: ; preds = %44, %14
%17 = load i32, i32* %10
%18 = icmp ult i32 %17, 4
br i1 %18, label %19, label %47
19: ; preds = %16
%20 = call i64 (...) @PL_lpc_base_address()
%21 = load i32, i32* %4
%22 = zext i32 %21 to i64
%23 = add nsw i64 %20, %22
%24 = load i32, i32* %10
%25 = zext i32 %24 to i64
%26 = add nsw i64 %23, %25
%27 = trunc i64 %26 to i16
%28 = call i32 @DM_in_8(i16 zeroext %27, i8* %9)
store i32 %28, i32* %6
%29 = load i32, i32* %6
%30 = icmp ne i32 %29, 0
br i1 %30, label %31, label %35
31: ; preds = %19
%32 = load i64, i64* %7
%33 = call i32 @OS_enable_interrupts(i64 %32)
%34 = load i32, i32* %6
store i32 %34, i32* %3
br label %52
35: ; preds = %19
%36 = load i8, i8* %9
%37 = zext i8 %36 to i32
%38 = load i32, i32* %10
%39 = mul i32 %38, 8
%40 = shl i32 %37, %39
%41 = sext i32 %40 to i64
%42 = load i64, i64* %8
%43 = or i64 %42, %41
store i64 %43, i64* %8
br label %44
44: ; preds = %35
%45 = load i32, i32* %10
%46 = add i32 %45, 1
store i32 %46, i32* %10
br label %16
47: ; preds = %16
%48 = load i64, i64* %7
%49 = call i32 @OS_enable_interrupts(i64 %48)
%50 = load i64, i64* %8
%51 = load i64*, i64** %5
store i64 %50, i64* %51
store i32 0, i32* %3
br label %52
52: ; preds = %47, %31, %13
%53 = load i32, i32* %3
ret i32 %53
}

LLVM IR (-O2):
define i32 @lpc_read_reg(i32 %0, i64* writeonly %1) {
%3 = alloca i64
%4 = alloca i8
%5 = bitcast i64* %3 to i8*
%6 = icmp eq i64* %1, null
br i1 %6, label %58, label %7
7: ; preds = %2
%8 = call i32 @OS_disable_interrupts(i64* %3)
%9 = zext i32 %0 to i64
%10 = call i64 (...) @PL_lpc_base_address()
%11 = add i64 %10, %9
%12 = trunc i64 %11 to i16
%13 = call i32 @DM_in_8(i16 zeroext %12, i8* %4)
%14 = icmp eq i32 %13, 0
br i1 %14, label %19, label %15
15: ; preds = %35, %27, %19, %7
%16 = phi i32 [ %13, %7 ], [ %25, %19 ], [ %33, %27 ], [ %41, %35 ]
%17 = load i64, i64* %3
%18 = call i32 @OS_enable_interrupts(i64 %17)
br label %58
19: ; preds = %7
%20 = load i8, i8* %4
%21 = call i64 (...) @PL_lpc_base_address()
%22 = add nuw nsw i64 %9, 1
%23 = add i64 %22, %21
%24 = trunc i64 %23 to i16
%25 = call i32 @DM_in_8(i16 zeroext %24, i8* %4)
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %15
27: ; preds = %19
%28 = load i8, i8* %4
%29 = call i64 (...) @PL_lpc_base_address()
%30 = add nuw nsw i64 %9, 2
%31 = add i64 %30, %29
%32 = trunc i64 %31 to i16
%33 = call i32 @DM_in_8(i16 zeroext %32, i8* %4)
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %15
35: ; preds = %27
%36 = load i8, i8* %4
%37 = call i64 (...) @PL_lpc_base_address()
%38 = add nuw nsw i64 %9, 3
%39 = add i64 %38, %37
%40 = trunc i64 %39 to i16
%41 = call i32 @DM_in_8(i16 zeroext %40, i8* %4)
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %15
43: ; preds = %35
%44 = zext i8 %28 to i64
%45 = shl nuw nsw i64 %44, 8
%46 = zext i8 %20 to i64
%47 = or i64 %45, %46
%48 = zext i8 %36 to i64
%49 = shl nuw nsw i64 %48, 16
%50 = or i64 %47, %49
%51 = load i8, i8* %4
%52 = zext i8 %51 to i32
%53 = shl nuw i32 %52, 24
%54 = sext i32 %53 to i64
%55 = or i64 %50, %54
%56 = load i64, i64* %3
%57 = call i32 @OS_enable_interrupts(i64 %56)
store i64 %55, i64* %1
br label %58
58: ; preds = %2, %43, %15
%59 = phi i32 [ %16, %15 ], [ 0, %43 ], [ 4096, %2 ]
ret i32 %59
}