unsigned char flip_bits(unsigned char cc) {
  static int init = 0;
  static unsigned char ct[256];
  if (!init) {
    unsigned _i, _j;
    for (_i = 0; _i < 256; _i++) {
      ct[_i] = 0;
      for (_j = 0; _j < 8; _j++) {
        if (_i & (1 << _j)) {
          ct[_i] |= (128 >> _j);
        }
      }
    }
    init = 1;
  }
  return ct[cc];
}


x86 assembly (clang, -O0):
<flip_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpl   $0x0,0x2f1f(%rip)
jne    11be <flip_bits+0xbe>
movl   $0x0,-0x8(%rbp)
cmpl   $0x100,-0x8(%rbp)
jae    11b4 <flip_bits+0xb4>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
lea    0x2f09(%rip),%rax
movb   $0x0,(%rax,%rcx,1)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jae    11a1 <flip_bits+0xa1>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     118e <flip_bits+0x8e>
mov    -0xc(%rbp),%ecx
mov    $0x80,%edx
sar    %cl,%edx
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
lea    0x2ec4(%rip),%rax
movzbl (%rax,%rcx,1),%eax
or     %edx,%eax
mov    %al,%dl
lea    0x2eb5(%rip),%rax
mov    %dl,(%rax,%rcx,1)
jmp    1193 <flip_bits+0x93>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1142 <flip_bits+0x42>
jmp    11a6 <flip_bits+0xa6>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111e <flip_bits+0x1e>
movl   $0x1,0x2e72(%rip)
movzbl -0x1(%rbp),%eax
mov    %eax,%ecx
lea    0x2e75(%rip),%rax
movzbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_bits>:
cmpb   $0x0,0x2f29(%rip)
jne    11ad <flip_bits+0xad>
movdqa 0xeeb(%rip),%xmm0
xor    %eax,%eax
movdqa 0xef1(%rip),%xmm1
movdqa 0xef9(%rip),%xmm2
movdqa 0xf01(%rip),%xmm3
lea    0x2f0a(%rip),%rcx
movdqa 0xf02(%rip),%xmm4
xchg   %ax,%ax
movdqa %xmm0,%xmm5
psrlw  $0x4,%xmm5
pand   %xmm1,%xmm5
movdqa %xmm0,%xmm6
pand   %xmm1,%xmm6
psllw  $0x4,%xmm6
por    %xmm5,%xmm6
movdqa %xmm6,%xmm5
psrlw  $0x2,%xmm5
pand   %xmm2,%xmm5
pand   %xmm2,%xmm6
psllw  $0x2,%xmm6
por    %xmm5,%xmm6
movdqa %xmm6,%xmm5
psrlw  $0x1,%xmm5
pand   %xmm3,%xmm5
pand   %xmm3,%xmm6
paddb  %xmm6,%xmm6
por    %xmm5,%xmm6
movdqa %xmm6,(%rax,%rcx,1)
add    $0x10,%rax
paddb  %xmm4,%xmm0
cmp    $0x100,%rax
jne    1140 <flip_bits+0x40>
movb   $0x1,0x2e83(%rip)
movzbl %dil,%eax
lea    0x2e88(%rip),%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
@flip_bits.init = internal global i32 0
@flip_bits.ct = internal global [256 x i8] zeroinitializer
define zeroext i8 @flip_bits(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
%5 = load i32, i32* @flip_bits.init
%6 = icmp ne i32 %5, 0
br i1 %6, label %43, label %7
7: ; preds = %1
store i32 0, i32* %3
br label %8
8: ; preds = %39, %7
%9 = load i32, i32* %3
%10 = icmp ult i32 %9, 256
br i1 %10, label %11, label %42
11: ; preds = %8
%12 = load i32, i32* %3
%13 = zext i32 %12 to i64
%14 = getelementptr inbounds [256 x i8], [256 x i8]* @flip_bits.ct, i64 0, i64 %13
store i8 0, i8* %14
store i32 0, i32* %4
br label %15
15: ; preds = %35, %11
%16 = load i32, i32* %4
%17 = icmp ult i32 %16, 8
br i1 %17, label %18, label %38
18: ; preds = %15
%19 = load i32, i32* %3
%20 = load i32, i32* %4
%21 = shl i32 1, %20
%22 = and i32 %19, %21
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %34
24: ; preds = %18
%25 = load i32, i32* %4
%26 = ashr i32 128, %25
%27 = load i32, i32* %3
%28 = zext i32 %27 to i64
%29 = getelementptr inbounds [256 x i8], [256 x i8]* @flip_bits.ct, i64 0, i64 %28
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = or i32 %31, %26
%33 = trunc i32 %32 to i8
store i8 %33, i8* %29
br label %34
34: ; preds = %24, %18
br label %35
35: ; preds = %34
%36 = load i32, i32* %4
%37 = add i32 %36, 1
store i32 %37, i32* %4
br label %15
38: ; preds = %15
br label %39
39: ; preds = %38
%40 = load i32, i32* %3
%41 = add i32 %40, 1
store i32 %41, i32* %3
br label %8
42: ; preds = %8
store i32 1, i32* @flip_bits.init
br label %43
43: ; preds = %42, %1
%44 = load i8, i8* %2
%45 = zext i8 %44 to i64
%46 = getelementptr inbounds [256 x i8], [256 x i8]* @flip_bits.ct, i64 0, i64 %45
%47 = load i8, i8* %46
ret i8 %47
}

LLVM IR (-O2):
@flip_bits.init = internal unnamed_addr global i1 false
@flip_bits.ct = internal unnamed_addr global [256 x i8] zeroinitializer
define zeroext i8 @flip_bits(i8 zeroext %0) {
%2 = load i1, i1* @flip_bits.init
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %9, %3 ], [ 0, %1 ]
%5 = phi <16 x i8> [ %10, %3 ], [ <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, %1 ]
%6 = getelementptr inbounds [256 x i8], [256 x i8]* @flip_bits.ct, i64 0, i64 %4
%7 = call <16 x i8> @llvm.bitreverse.v16i8(<16 x i8> %5)
%8 = bitcast i8* %6 to <16 x i8>*
store <16 x i8> %7, <16 x i8>* %8
%9 = add nuw i64 %4, 16
%10 = add <16 x i8> %5, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
%11 = icmp eq i64 %9, 256
br i1 %11, label %12, label %3
12: ; preds = %3
store i1 true, i1* @flip_bits.init
br label %13
13: ; preds = %12, %1
%14 = zext i8 %0 to i64
%15 = getelementptr inbounds [256 x i8], [256 x i8]* @flip_bits.ct, i64 0, i64 %14
%16 = load i8, i8* %15
ret i8 %16
}