xunge/DecIR huggingface dataset:
/* Variables and functions */
int compute_checksum(unsigned char *img) {
  int i;
  short s = 0;
  for (i = 0; i < 0x3dfffc; i++)
    s += img[i];
  return s;
}


x86 assembly (clang, -O0):
<compute_checksum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movw   $0x0,-0xe(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3dfffc,-0xc(%rbp)
jge    1146 <compute_checksum+0x46>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%ecx
movswl -0xe(%rbp),%eax
add    %ecx,%eax
mov    %ax,-0xe(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <compute_checksum+0x15>
movswl -0xe(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_checksum>:
xor    %eax,%eax
mov    $0x3,%ecx
nopw   0x0(%rax,%rax,1)
movzbl -0x3(%rdi,%rcx,1),%edx
add    %eax,%edx
movzbl -0x2(%rdi,%rcx,1),%eax
add    %edx,%eax
movzbl -0x1(%rdi,%rcx,1),%edx
add    %eax,%edx
movzbl (%rdi,%rcx,1),%eax
add    %edx,%eax
cwtl
add    $0x4,%rcx
cmp    $0x3dffff,%rcx
jne    1110 <compute_checksum+0x10>
ret

LLVM IR (-O0):
define i32 @compute_checksum(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i16
store i8* %0, i8** %2
store i16 0, i16* %4
store i32 0, i32* %3
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 4063228
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = load i16, i16* %4
%16 = sext i16 %15 to i32
%17 = add nsw i32 %16, %14
%18 = trunc i32 %17 to i16
store i16 %18, i16* %4
br label %19
19: ; preds = %8
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %5
22: ; preds = %5
%23 = load i16, i16* %4
%24 = sext i16 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @compute_checksum(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %24, %2 ]
%4 = phi i32 [ 0, %1 ], [ %26, %2 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = add nsw i32 %4, %7
%9 = or i64 %3, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = add nsw i32 %8, %12
%14 = or i64 %3, 2
%15 = getelementptr inbounds i8, i8* %0, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = add nsw i32 %13, %17
%19 = or i64 %3, 3
%20 = getelementptr inbounds i8, i8* %0, i64 %19
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = add nsw i32 %18, %22
%24 = add nuw nsw i64 %3, 4
%25 = shl i32 %23, 16
%26 = ashr exact i32 %25, 16
%27 = icmp eq i64 %24, 4063228
br i1 %27, label %28, label %2
28: ; preds = %2
ret i32 %26
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ rprintf(char *);
void serverDied(void) {
  rprintf("Server died!\n");
  exit(1);
}


x86 assembly (clang, -O0):
<serverDied>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <rprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<serverDied>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <rprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Server died!\0A\00"
define void @serverDied() {
%1 = call i32 @rprintf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [14 x i8] c"Server died!\0A\00"
define void @serverDied() {
%1 = tail call i32 @rprintf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ gpio_clr_bits(int /*<<< orphan*/);
int /*<<< orphan*/ gpio_set_bits(int /*<<< orphan*/);
void gpio_write_bits(uint32_t value) {
  gpio_clr_bits(~value);
  gpio_set_bits(value);
}


x86 assembly (clang, -O0):
<gpio_write_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    $0xffffffff,%edi
call   1030 <gpio_clr_bits@plt>
mov    -0x4(%rbp),%edi
call   1040 <gpio_set_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_write_bits>:
push   %rbx
mov    %edi,%ebx
not    %edi
call   1030 <gpio_clr_bits@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <gpio_set_bits@plt>

LLVM IR (-O0):
define void @gpio_write_bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = call i32 @gpio_clr_bits(i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @gpio_set_bits(i32 %6)
ret void
}

LLVM IR (-O2):
define void @gpio_write_bits(i32 %0) {
%2 = xor i32 %0, -1
%3 = tail call i32 @gpio_clr_bits(i32 %2)
%4 = tail call i32 @gpio_set_bits(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int _doscan(int /*<<< orphan*/ *, char const *, int /*<<< orphan*/);
int vfscanf(FILE *fp, const char *fmt, va_list ap) {
  return (_doscan(fp, fmt, ap));
}


x86 assembly (clang, -O0):
<vfscanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <_doscan@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfscanf>:
jmp    1030 <_doscan@plt>

LLVM IR (-O0):
define i32 @vfscanf(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @_doscan(i32* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @vfscanf(i32* %0, i8* %1, i32 %2) {
%4 = tail call i32 @_doscan(i32* %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
int /*<<< orphan*/ reply(char *, int);
void send_buffer(char *buf, int size) {
  char *send_buf;
  send_buf = (char *)malloc(size + 1);
  send_buf[0] = 'b';
  memcpy(send_buf + 1, buf, size);
  reply(send_buf, size + 1);
  free(send_buf);
}


x86 assembly (clang, -O0):
<send_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1060 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x62,(%rax)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1050 <memcpy@plt>
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
add    $0x1,%esi
call   1040 <reply@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_buffer>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    0x1(%rbx),%r15d
mov    %r15d,%edi
call   1060 <malloc@plt>
mov    %rax,%rbp
movb   $0x62,(%rax)
lea    0x1(%rax),%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1050 <memcpy@plt>
mov    %rbp,%rdi
mov    %r15d,%esi
call   1040 <reply@plt>
mov    %rbp,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @send_buffer(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 98, i8* %11
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = call i32 @memcpy(i8* %13, i8* %14, i32 %15)
%17 = load i8*, i8** %5
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
%20 = call i32 @reply(i8* %17, i32 %19)
%21 = load i8*, i8** %5
%22 = call i32 @free(i8* %21)
ret void
}

LLVM IR (-O2):
define void @send_buffer(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
store i8 98, i8* %5
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = tail call i32 @memcpy(i8* %6, i8* %0, i32 %1)
%8 = tail call i32 @reply(i8* %5, i32 %3)
%9 = tail call i32 @free(i8* %5)
ret void
}
/* Type definitions */
struct b6_list {
  int dummy;
};
struct b6_dref {
  int dummy;
};

/* Variables and functions */
struct b6_dref *b6_list_add(int /*<<< orphan*/, struct b6_dref *);
int /*<<< orphan*/ b6_list_tail(struct b6_list *);
struct b6_dref *b6_list_add_last(struct b6_list *list, struct b6_dref *dref) {
  return b6_list_add(b6_list_tail(list), dref);
}


x86 assembly (clang, -O0):
<b6_list_add_last>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <b6_list_tail@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1040 <b6_list_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b6_list_add_last>:
push   %rbx
mov    %rsi,%rbx
call   1030 <b6_list_tail@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <b6_list_add@plt>

LLVM IR (-O0):
%struct.b6_list = type { i32 }
%struct.b6_dref = type { i32 }
define %struct.b6_dref* @b6_list_add_last(%struct.b6_list* %0, %struct.b6_dref* %1) {
%3 = alloca %struct.b6_list*
%4 = alloca %struct.b6_dref*
store %struct.b6_list* %0, %struct.b6_list** %3
store %struct.b6_dref* %1, %struct.b6_dref** %4
%5 = load %struct.b6_list*, %struct.b6_list** %3
%6 = call i32 @b6_list_tail(%struct.b6_list* %5)
%7 = load %struct.b6_dref*, %struct.b6_dref** %4
%8 = call %struct.b6_dref* @b6_list_add(i32 %6, %struct.b6_dref* %7)
ret %struct.b6_dref* %8
}

LLVM IR (-O2):
%struct.b6_list = type { i32 }
%struct.b6_dref = type { i32 }
define %struct.b6_dref* @b6_list_add_last(%struct.b6_list* %0, %struct.b6_dref* %1) {
%3 = tail call i32 @b6_list_tail(%struct.b6_list* %0)
%4 = tail call %struct.b6_dref* @b6_list_add(i32 %3, %struct.b6_dref* %1)
ret %struct.b6_dref* %4
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t MaxBlockSigops(uint64_t nBlockSize) {
  return ((nBlockSize - 1) / 1000000 + 1) * 1000000 / 50;
}


x86 assembly (clang, -O0):
<MaxBlockSigops>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
add    $0x1,%eax
imul   $0xf4240,%eax,%eax
mov    $0x32,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<MaxBlockSigops>:
add    $0xffffffff,%edi
movslq %edi,%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x32,%rax
add    %ecx,%eax
imul   $0xf4240,%eax,%eax
add    $0xf4240,%eax
cltq
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x24,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @MaxBlockSigops(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
%5 = sdiv i32 %4, 1000000
%6 = add nsw i32 %5, 1
%7 = mul nsw i32 %6, 1000000
%8 = sdiv i32 %7, 50
ret i32 %8
}

LLVM IR (-O2):
define i32 @MaxBlockSigops(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = srem i32 %2, 1000000
%4 = add i32 %0, 999999
%5 = sub i32 %4, %3
%6 = sdiv i32 %5, 50
ret i32 %6
}
int trigger_size(const struct tm *current, const struct log_tm *old,
                 unsigned long max_file_size, unsigned long filesize) {
  return (filesize >= max_file_size);
}


x86 assembly (clang, -O0):
<trigger_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trigger_size>:
xor    %eax,%eax
cmp    %rdx,%rcx
setae  %al
ret

LLVM IR (-O0):
%struct.tm = type opaque
%struct.log_tm = type opaque
define i32 @trigger_size(%struct.tm* %0, %struct.log_tm* %1, i64 %2, i64 %3) {
%5 = alloca %struct.tm*
%6 = alloca %struct.log_tm*
%7 = alloca i64
%8 = alloca i64
store %struct.tm* %0, %struct.tm** %5
store %struct.log_tm* %1, %struct.log_tm** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %8
%10 = load i64, i64* %7
%11 = icmp uge i64 %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
%struct.tm = type opaque
%struct.log_tm = type opaque
define i32 @trigger_size(%struct.tm* nocapture readnone %0, %struct.log_tm* nocapture readnone %1, i64 %2, i64 %3) {
%5 = icmp uge i64 %3, %2
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ daemonize();
int /*<<< orphan*/ tcpclient();
int /*<<< orphan*/ terminate();
int main(int argc, char *argv[]) {
  daemonize();
  tcpclient();
  terminate();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <daemonize@plt>
mov    $0x0,%al
call   1050 <tcpclient@plt>
mov    $0x0,%al
call   1040 <terminate@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <daemonize@plt>
xor    %eax,%eax
call   1050 <tcpclient@plt>
xor    %eax,%eax
call   1040 <terminate@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @daemonize()
%7 = call i32 (...) @tcpclient()
%8 = call i32 (...) @terminate()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @daemonize()
%4 = tail call i32 (...) @tcpclient()
%5 = tail call i32 (...) @terminate()
ret i32 0
}
void class_device_add(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<class_device_add>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<class_device_add>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.class_device_add = [17 x i8] c"class_device_add\00"
define void @class_device_add() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.class_device_add, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.class_device_add = [17 x i8] c"class_device_add\00"
define void @class_device_add() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.class_device_add, i64 0, i64 0))
ret void
}
/* Type definitions */
struct stack_st_OPENSSL_CSTRING {
  int dummy;
};
typedef int /*<<< orphan*/ OPENSSL_STACK;

/* Variables and functions */
int OPENSSL_sk_find_ex(int /*<<< orphan*/ *, void const *);
int sk_OPENSSL_CSTRING_find_ex(struct stack_st_OPENSSL_CSTRING *sk,
                               const char *ptr) {
  return OPENSSL_sk_find_ex((OPENSSL_STACK *)sk, (const void *)ptr);
}


x86 assembly (clang, -O0):
<sk_OPENSSL_CSTRING_find_ex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <OPENSSL_sk_find_ex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_OPENSSL_CSTRING_find_ex>:
jmp    1030 <OPENSSL_sk_find_ex@plt>

LLVM IR (-O0):
%struct.stack_st_OPENSSL_CSTRING = type { i32 }
define i32 @sk_OPENSSL_CSTRING_find_ex(%struct.stack_st_OPENSSL_CSTRING* %0, i8* %1) {
%3 = alloca %struct.stack_st_OPENSSL_CSTRING*
%4 = alloca i8*
store %struct.stack_st_OPENSSL_CSTRING* %0, %struct.stack_st_OPENSSL_CSTRING** %3
store i8* %1, i8** %4
%5 = load %struct.stack_st_OPENSSL_CSTRING*, %struct.stack_st_OPENSSL_CSTRING** %3
%6 = bitcast %struct.stack_st_OPENSSL_CSTRING* %5 to i32*
%7 = load i8*, i8** %4
%8 = call i32 @OPENSSL_sk_find_ex(i32* %6, i8* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.stack_st_OPENSSL_CSTRING = type { i32 }
define i32 @sk_OPENSSL_CSTRING_find_ex(%struct.stack_st_OPENSSL_CSTRING* %0, i8* %1) {
%3 = getelementptr %struct.stack_st_OPENSSL_CSTRING, %struct.stack_st_OPENSSL_CSTRING* %0, i64 0, i32 0
%4 = tail call i32 @OPENSSL_sk_find_ex(i32* %3, i8* %1)
ret i32 %4
}
void null(int i, const char *a, ...) {
  if (a)
    (void)0;
}


x86 assembly (clang, -O0):
<null>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     111b <null+0x1b>
jmp    111b <null+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<null>:
ret

LLVM IR (-O0):
define void @null(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
br label %8
8: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @null(i32 %0, i8* nocapture %1, ...) {
ret void
}
long long gcd(long long a, long long b) {
  if (a == 0)
    return 0;
  return gcd(b % a, a);
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1138 <gcd+0x28>
movq   $0x0,-0x8(%rbp)
jmp    1152 <gcd+0x42>
mov    -0x18(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <gcd@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
test   %rdi,%rdi
je     1132 <gcd+0x32>
mov    %rsi,%rax
jmp    1120 <gcd+0x20>
nopw   0x0(%rax,%rax,1)
cqto
idiv   %rdi
mov    %rdi,%rax
mov    %rdx,%rdi
test   %rdx,%rdx
je     1132 <gcd+0x32>
mov    %rax,%rcx
or     %rdi,%rcx
shr    $0x20,%rcx
jne    1110 <gcd+0x10>
xor    %edx,%edx
div    %edi
jmp    1115 <gcd+0x15>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @gcd(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 0, i64* %3
br label %15
9: ; preds = %2
%10 = load i64, i64* %5
%11 = load i64, i64* %4
%12 = srem i64 %10, %11
%13 = load i64, i64* %4
%14 = call i64 @gcd(i64 %12, i64 %13)
store i64 %14, i64* %3
br label %15
15: ; preds = %9, %8
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @gcd(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %6, %4 ], [ %1, %2 ]
%6 = phi i64 [ %7, %4 ], [ %0, %2 ]
%7 = srem i64 %5, %6
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ my_putchar(char);
int /*<<< orphan*/ my_putstr2(char *);
void error_general(char *str, int error) {
  if (error == -1) {
    my_putstr2("Error on : ");
    my_putstr2(str);
    my_putchar('\n');
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<error_general>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    1172 <error_general+0x42>
lea    0xeb0(%rip),%rdi
call   1040 <my_putstr2@plt>
mov    -0x8(%rbp),%rdi
call   1040 <my_putstr2@plt>
mov    $0xa,%edi
call   1030 <my_putchar@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_general>:
cmp    $0xffffffff,%esi
je     1136 <error_general+0x6>
ret
push   %rbx
mov    %rdi,%rbx
lea    0xebf(%rip),%rdi
call   1040 <my_putstr2@plt>
mov    %rbx,%rdi
call   1040 <my_putstr2@plt>
mov    $0xa,%edi
call   1030 <my_putchar@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Error on : \00"
define void @error_general(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = call i32 @my_putstr2(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %3
%10 = call i32 @my_putstr2(i8* %9)
%11 = call i32 @my_putchar(i8 signext 10)
%12 = call i32 @exit(i32 -1)
unreachable
13: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"Error on : \00"
define void @error_general(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, -1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = tail call i32 @my_putstr2(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @my_putstr2(i8* %0)
%7 = tail call i32 @my_putchar(i8 signext 10)
%8 = tail call i32 @exit(i32 -1)
unreachable
9: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UI_DEV_DESTROY;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/);
void uinput_destroy(int fd) {
  ioctl(fd, UI_DEV_DESTROY);
  close(fd);
}


x86 assembly (clang, -O0):
<uinput_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb3(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uinput_destroy>:
push   %rbx
mov    %edi,%ebx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>

LLVM IR (-O0):
@UI_DEV_DESTROY = global i32 0
define void @uinput_destroy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @UI_DEV_DESTROY
%5 = call i32 @ioctl(i32 %3, i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
ret void
}

LLVM IR (-O2):
@UI_DEV_DESTROY = global i32 0
define void @uinput_destroy(i32 %0) {
%2 = load i32, i32* @UI_DEV_DESTROY
%3 = tail call i32 @ioctl(i32 %0, i32 %2)
%4 = tail call i32 @close(i32 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
void bigendian_to_u16(uint16_t *dst, uint8_t *src) {
  *dst = (((uint16_t)src[0]) << 8) | (uint16_t)src[1];
}


x86 assembly (clang, -O0):
<bigendian_to_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %eax,%ecx
shl    $0x8,%ecx
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bigendian_to_u16>:
mov    (%rsi),%eax
shl    $0x8,%eax
or     0x8(%rsi),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @bigendian_to_u16(i32* %0, i64* %1) {
%3 = alloca i32*
%4 = alloca i64*
store i32* %0, i32** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = getelementptr inbounds i64, i64* %5, i64 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = shl i32 %8, 8
%10 = load i64*, i64** %4
%11 = getelementptr inbounds i64, i64* %10, i64 1
%12 = load i64, i64* %11
%13 = trunc i64 %12 to i32
%14 = or i32 %9, %13
%15 = load i32*, i32** %3
store i32 %14, i32* %15
ret void
}

LLVM IR (-O2):
define void @bigendian_to_u16(i32* nocapture writeonly %0, i64* nocapture %1) {
%3 = load i64, i64* %1
%4 = trunc i64 %3 to i32
%5 = shl i32 %4, 8
%6 = getelementptr inbounds i64, i64* %1, i64 1
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = or i32 %5, %8
store i32 %9, i32* %0
ret void
}
/* Type definitions */
union bpf_attr {
  int /*<<< orphan*/ pathname;
};
typedef int /*<<< orphan*/ attr;

/* Variables and functions */
int /*<<< orphan*/ BPF_OBJ_GET;
int /*<<< orphan*/ __NR_bpf;
int /*<<< orphan*/ ptr_to_u64(void *);
int syscall(int /*<<< orphan*/, int /*<<< orphan*/, union bpf_attr *, int);
int bpf_obj_get(const char *pathname) {
  union bpf_attr attr = {
      .pathname = ptr_to_u64((void *)pathname),
  };
  return syscall(__NR_bpf, BPF_OBJ_GET, &attr, sizeof(attr));
}


x86 assembly (clang, -O0):
<bpf_obj_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ptr_to_u64@plt>
mov    %eax,-0x10(%rbp)
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
lea    -0x10(%rbp),%rdx
mov    $0x4,%ecx
call   1040 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_obj_get>:
push   %rax
call   1030 <ptr_to_u64@plt>
mov    %eax,(%rsp)
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
mov    %rsp,%rdx
mov    $0x4,%ecx
call   1040 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
%union.bpf_attr = type { i32 }
@__NR_bpf = global i32 0
@BPF_OBJ_GET = global i32 0
define i32 @bpf_obj_get(i8* %0) {
%2 = alloca i8*
%3 = alloca %union.bpf_attr
store i8* %0, i8** %2
%4 = bitcast %union.bpf_attr* %3 to i32*
%5 = load i8*, i8** %2
%6 = call i32 @ptr_to_u64(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* @__NR_bpf
%8 = load i32, i32* @BPF_OBJ_GET
%9 = call i32 @syscall(i32 %7, i32 %8, %union.bpf_attr* %3, i32 4)
ret i32 %9
}

LLVM IR (-O2):
%union.bpf_attr = type { i32 }
@__NR_bpf = global i32 0
@BPF_OBJ_GET = global i32 0
define i32 @bpf_obj_get(i8* %0) {
%2 = alloca %union.bpf_attr
%3 = bitcast %union.bpf_attr* %2 to i8*
%4 = getelementptr inbounds %union.bpf_attr, %union.bpf_attr* %2, i64 0, i32 0
%5 = tail call i32 @ptr_to_u64(i8* %0)
store i32 %5, i32* %4
%6 = load i32, i32* @__NR_bpf
%7 = load i32, i32* @BPF_OBJ_GET
%8 = call i32 @syscall(i32 %6, i32 %7, %union.bpf_attr* %2, i32 4)
ret i32 %8
}
double square(const double x) { return x * x; }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @square(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @square(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_move_sink_input_by_name() {
  printf("NOT IMPLEMENTED:"
         "pa_context_move_sink_input_by_name"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_move_sink_input_by_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_move_sink_input_by_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"NOT IMPLEMENTED:pa_context_move_sink_input_by_name\0A\00"
define i32 @pa_context_move_sink_input_by_name() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [51 x i8] c"NOT IMPLEMENTED:pa_context_move_sink_input_by_name\00"
define i32 @pa_context_move_sink_input_by_name() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int counter2() {
  static int i;
  return i++;
}


x86 assembly (clang, -O0):
<counter2>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0f(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<counter2>:
mov    0x2f1e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f15(%rip)
ret

LLVM IR (-O0):
@counter2.i = internal global i32 0
define i32 @counter2() {
%1 = load i32, i32* @counter2.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @counter2.i
ret i32 %1
}

LLVM IR (-O2):
@counter2.i = internal unnamed_addr global i32 0
define i32 @counter2() {
%1 = load i32, i32* @counter2.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @counter2.i
ret i32 %1
}
void loadAllDefaults() {}


x86 assembly (clang, -O0):
<loadAllDefaults>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadAllDefaults>:
ret

LLVM IR (-O0):
define void @loadAllDefaults() {
ret void
}

LLVM IR (-O2):
define void @loadAllDefaults() {
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t piece_max32(int32_t a, int32_t b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<piece_max32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <piece_max32+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <piece_max32+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<piece_max32>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @piece_max32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @piece_max32(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int endmntent(FILE *filep) {
  if (filep) {
    fclose(filep);
  }
  return 1;
}


x86 assembly (clang, -O0):
<endmntent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <endmntent+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endmntent>:
test   %rdi,%rdi
je     111f <endmntent+0xf>
push   %rax
call   1030 <fclose@plt>
add    $0x8,%rsp
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @endmntent(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = call i32 @fclose(i32* %6)
br label %8
8: ; preds = %5, %1
ret i32 1
}

LLVM IR (-O2):
define i32 @endmntent(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @fclose(i32* %0)
br label %5
5: ; preds = %3, %1
ret i32 1
}
void f1(void) {
#pragma omp flush
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
ret

LLVM IR (-O0):
define void @f1() {
ret void
}

LLVM IR (-O2):
define void @f1() {
ret void
}
/* Variables and functions */
unsigned short dxl_read_word(unsigned char, int);
unsigned short getGoalPosition(unsigned char id) {
  return dxl_read_word(id, (30));
}


x86 assembly (clang, -O0):
<getGoalPosition>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1e,%esi
movzbl -0x1(%rbp),%edi
call   1030 <dxl_read_word@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getGoalPosition>:
mov    $0x1e,%esi
jmp    1030 <dxl_read_word@plt>

LLVM IR (-O0):
define zeroext i16 @getGoalPosition(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i16 @dxl_read_word(i8 zeroext %3, i32 30)
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @getGoalPosition(i8 zeroext %0) {
%2 = tail call zeroext i16 @dxl_read_word(i8 zeroext %0, i32 30)
ret i16 %2
}
void signed_char_add_signed_char_signed_int(signed char *LHS, signed int RHS) {
  (*LHS) += RHS;
}


x86 assembly (clang, -O0):
<signed_char_add_signed_char_signed_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_char_add_signed_char_signed_int>:
add    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @signed_char_add_signed_char_signed_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = add nsw i32 %8, %5
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
ret void
}

LLVM IR (-O2):
define void @signed_char_add_signed_char_signed_int(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = trunc i32 %1 to i8
%5 = add i8 %3, %4
store i8 %5, i8* %0
ret void
}
/* Variables and functions */
scalar_t__ roundl(long double);
long long int llroundl(long double x) { return (long long int)roundl(x); }


x86 assembly (clang, -O0):
<llroundl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <roundl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<llroundl>:
jmp    1030 <roundl@plt>

LLVM IR (-O0):
define i64 @llroundl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @roundl(x86_fp80 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @llroundl(x86_fp80 %0) {
%2 = tail call i64 @roundl(x86_fp80 %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  (void)fprintf(stderr, "usage: tee [-ai] [file ...]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [29 x i8] c"usage: tee [-ai] [file ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [29 x i8] c"usage: tee [-ai] [file ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
__attribute__((visibility("default"))) void *sd_bus_track_get_bus(void *track) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_track_get_bus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_track_get_bus>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_track_get_bus(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_track_get_bus(i8* nocapture readnone %0) {
ret i8* null
}
unsigned long hash(unsigned char *s) {
  unsigned long accu = 0;
  while (*s) {
    accu = (((accu) << 4) + ((accu) >> 28) + (*s++));
  }
  return accu;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114e <hash+0x4e>
mov    -0x10(%rbp),%rax
shl    $0x4,%rax
mov    -0x10(%rbp),%rcx
shr    $0x1c,%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1130 <hash+0x30>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rax,%rdx
shl    $0x4,%rdx
shr    $0x1c,%rax
add    %rdx,%rax
movzbl %cl,%ecx
add    %rcx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i64, i64* %3
%10 = shl i64 %9, 4
%11 = load i64, i64* %3
%12 = lshr i64 %11, 28
%13 = add i64 %10, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %2
%16 = load i8, i8* %14
%17 = zext i8 %16 to i64
%18 = add i64 %13, %17
store i64 %18, i64* %3
br label %4
19: ; preds = %4
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %14, %4 ], [ %2, %1 ]
%6 = phi i64 [ %13, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = shl i64 %6, 4
%9 = lshr i64 %6, 28
%10 = add i64 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = zext i8 %5 to i64
%13 = add i64 %10, %12
%14 = load i8, i8* %11
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4, %1
%17 = phi i64 [ 0, %1 ], [ %13, %4 ]
ret i64 %17
}
/* Variables and functions */
scalar_t__ errno;
void clear_socketerror() { errno = 0; }


x86 assembly (clang, -O0):
<clear_socketerror>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_socketerror>:
mov    0x2ed9(%rip),%rax
movq   $0x0,(%rax)
ret

LLVM IR (-O0):
@errno = global i64 0
define void @clear_socketerror() {
store i64 0, i64* @errno
ret void
}

LLVM IR (-O2):
@errno = global i64 0
define void @clear_socketerror() {
store i64 0, i64* @errno
ret void
}
int USER_CheckParameter(const char *parameter) { return (!(1 == 1)); }


x86 assembly (clang, -O0):
<USER_CheckParameter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<USER_CheckParameter>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @USER_CheckParameter(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @USER_CheckParameter(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct can_frame {
  int *data;
};

/* Variables and functions */
size_t sdo_get_segment_size(const struct can_frame *frame) {
  int n = (frame->data[0] >> 1) & 7;
  return 7 - n;
}


x86 assembly (clang, -O0):
<sdo_get_segment_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
sar    $0x1,%eax
and    $0x7,%eax
mov    %eax,-0xc(%rbp)
mov    $0x7,%eax
sub    -0xc(%rbp),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdo_get_segment_size>:
mov    (%rdi),%rax
mov    (%rax),%eax
shr    %eax
not    %eax
and    $0x7,%eax
ret

LLVM IR (-O0):
%struct.can_frame = type { i32* }
define i64 @sdo_get_segment_size(%struct.can_frame* %0) {
%2 = alloca %struct.can_frame*
%3 = alloca i32
store %struct.can_frame* %0, %struct.can_frame** %2
%4 = load %struct.can_frame*, %struct.can_frame** %2
%5 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %4, i32 0, i32 0
%6 = load i32*, i32** %5
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = ashr i32 %8, 1
%10 = and i32 %9, 7
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = sub nsw i32 7, %11
%13 = sext i32 %12 to i64
ret i64 %13
}

LLVM IR (-O2):
%struct.can_frame = type { i32* }
define i64 @sdo_get_segment_size(%struct.can_frame* nocapture %0) {
%2 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %0, i64 0, i32 0
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = lshr i32 %4, 1
%6 = and i32 %5, 7
%7 = xor i32 %6, 7
%8 = zext i32 %7 to i64
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf(char *, char const *);
int /*<<< orphan*/ stress_check_capability(int /*<<< orphan*/);
int stress_rawpkt_supported(const char *name) {
  if (!stress_check_capability((0))) {
    pr_inf("%s stressor will be skipped, "
           "need to be running with CAP_NET_RAW "
           "rights for this stressor\n",
           name);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<stress_rawpkt_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <stress_check_capability@plt>
cmp    $0x0,%eax
jne    1158 <stress_rawpkt_supported+0x38>
mov    -0x10(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <pr_inf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <stress_rawpkt_supported+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_rawpkt_supported>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
xor    %edi,%edi
call   1030 <stress_check_capability@plt>
test   %eax,%eax
jne    1147 <stress_rawpkt_supported+0x27>
lea    0xec6(%rip),%rdi
mov    %rbx,%rsi
call   1040 <pr_inf@plt>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [91 x i8] c"%s stressor will be skipped, need to be running with CAP_NET_RAW rights for this stressor\0A\00"
define i32 @stress_rawpkt_supported(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @stress_check_capability(i32 0)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i32 @pr_inf(i8* getelementptr inbounds ([91 x i8], [91 x i8]* @.str, i64 0, i64 0), i8* %7)
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [91 x i8] c"%s stressor will be skipped, need to be running with CAP_NET_RAW rights for this stressor\0A\00"
define i32 @stress_rawpkt_supported(i8* %0) {
%2 = tail call i32 @stress_check_capability(i32 0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_inf(i8* getelementptr inbounds ([91 x i8], [91 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ pmmap_memset(int /*<<< orphan*/);
void pmmap_mark_all_unused() { pmmap_memset(0); }


x86 assembly (clang, -O0):
<pmmap_mark_all_unused>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <pmmap_memset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmmap_mark_all_unused>:
xor    %edi,%edi
jmp    1030 <pmmap_memset@plt>

LLVM IR (-O0):
define void @pmmap_mark_all_unused() {
%1 = call i32 @pmmap_memset(i32 0)
ret void
}

LLVM IR (-O2):
define void @pmmap_mark_all_unused() {
%1 = tail call i32 @pmmap_memset(i32 0)
ret void
}
int calcTempC(unsigned int measADC) { return ((measADC * 10) / 19); }


x86 assembly (clang, -O0):
<calcTempC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0xa,-0x4(%rbp),%eax
mov    $0x13,%ecx
xor    %edx,%edx
div    %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcTempC>:
add    %edi,%edi
lea    (%rdi,%rdi,4),%eax
mov    $0xaf286bcb,%ecx
imul   %rax,%rcx
shr    $0x20,%rcx
sub    %ecx,%eax
shr    %eax
add    %ecx,%eax
shr    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @calcTempC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 10
%5 = udiv i32 %4, 19
ret i32 %5
}

LLVM IR (-O2):
define i32 @calcTempC(i32 %0) {
%2 = mul i32 %0, 10
%3 = udiv i32 %2, 19
ret i32 %3
}
/* Variables and functions */
int rand();
void ler(int arr[], int n) {
  int i;
  for (i = 0; i < n; i++) {
    arr[i] = rand() % n;
  }
}


x86 assembly (clang, -O0):
<ler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1156 <ler+0x46>
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <ler+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ler>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %esi,%esi
jle    1148 <ler+0x38>
mov    %esi,%r15d
mov    %rdi,%r14
mov    %esi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %r15d
mov    %edx,(%r14,%rbp,4)
add    $0x1,%rbp
cmp    %rbp,%rbx
jne    1130 <ler+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @ler(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = load i32*, i32** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
store i32 %13, i32* %17
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ler(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, %1
%10 = getelementptr inbounds i32, i32* %0, i64 %7
store i32 %9, i32* %10
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
void rop3_122_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~*D;
  stk3 = S | stk4;
  stk2 = T & stk3;
  stk1 = *D ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_122_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xe(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_122_0_0>:
mov    (%rdi),%al
mov    %eax,%ecx
not    %cl
or     %sil,%cl
and    %dl,%cl
xor    %al,%cl
mov    %cl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_122_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = xor i32 %13, -1
%15 = trunc i32 %14 to i8
store i8 %15, i8* %10
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = load i8, i8* %10
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %9
%22 = load i8, i8* %6
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8*, i8** %4
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = load i8, i8* %8
%32 = zext i8 %31 to i32
%33 = xor i32 %30, %32
%34 = trunc i32 %33 to i8
store i8 %34, i8* %7
%35 = load i8, i8* %7
%36 = load i8*, i8** %4
store i8 %35, i8* %36
ret void
}

LLVM IR (-O2):
define void @rop3_122_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, -1
%6 = or i8 %5, %1
%7 = and i8 %6, %2
%8 = xor i8 %7, %4
store i8 %8, i8* %0
ret void
}
void Hal_hook_wr_sgnbfield_bita(void) {}


x86 assembly (clang, -O0):
<Hal_hook_wr_sgnbfield_bita>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hal_hook_wr_sgnbfield_bita>:
ret

LLVM IR (-O0):
define void @Hal_hook_wr_sgnbfield_bita() {
ret void
}

LLVM IR (-O2):
define void @Hal_hook_wr_sgnbfield_bita() {
ret void
}