#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int get_cputype(int);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
int /*<<< orphan*/ support_avx();
int get_coretype(void) {
  int family, exfamily, model, exmodel, vendor;
  if (!have_cpuid())
    return 1;
  family = get_cputype(4);
  exfamily = get_cputype(1);
  model = get_cputype(5);
  exmodel = get_cputype(2);
  vendor = get_vendor();
  if (vendor == 1) {
    switch (family) {
    case 4:
      return 1;
    case 5:
      return 2;
    case 6:
      switch (exmodel) {
      case 0:
        switch (model) {
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
          return 3;
        case 7:
          return 4;
        case 8:
        case 10:
        case 11:
          return 5;
        case 9:
        case 13:
        case 14:
          return 8;
        case 15:
          return 14;
        }
        break;
      case 1:
        switch (model) {
        case 6:
          return 14;
        case 7:
          return 15;
        case 10:
        case 11:
        case 14:
        case 15:
          return 17;
        case 12:
          return 18;
        case 13:
          return 16;
        }
        break;
      case 2:
        switch (model) {
        case 5:
          return 17;
        case 10:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
          return 17;
        case 13:
          if (support_avx())
            return 20;
          else
            return 17;
        case 14:
        case 15:
          return 17;
        }
        break;
      case 3:
        switch (model) {
        case 10:
        case 14:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 13:
          if (support_avx())
            return 24;
          else
            return 17;
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        case 12:
        case 13:
          return 17;
        }
        break;
      case 5:
        switch (model) {
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 5:
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
          if (support_avx())
            return 24;
          else
            return 17;
        case 12:
          return 17;
        }
        break;
      case 8:
        if (model == 14)
          return 24;
      }
      break;
    case 15:
      if (model <= 0x2)
        return 6;
      else
        return 7;
    }
  }
  if (vendor == 3) {
    if (family <= 0x5)
      return 1;
    if (family <= 0xe)
      return 9;
    if (family == 0xf) {
      if ((exfamily == 0) || (exfamily == 2))
        return 10;
      else if (exfamily == 5)
        return 21;
      else if (exfamily == 6) {
        switch (model) {
        case 1:
          if (support_avx())
            return 22;
          else
            return 11;
        case 2:
        case 3:
          if (support_avx())
            return 23;
          else
            return 11;
        case 0:
          switch (exmodel) {
          case 1:
            if (support_avx())
              return 23;
            else
              return 11;
          case 3:
            if (support_avx())
              return 25;
            else
              return 11;
          case 6:
            if (support_avx())
              return 26;
            else
              return 11;
          }
          break;
        }
      } else
        return 11;
    }
  }
  if (vendor == 6) {
    switch (family) {
    case 0x6:
      return 19;
      break;
    }
    return 12;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_coretype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    $0x0,%al
call   1060 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1164 <get_coretype+0x24>
movl   $0x1,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0xc(%rbp)
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    15d5 <get_coretype+0x495>
mov    -0x8(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0xb,%eax
ja     15d0 <get_coretype+0x490>
mov    -0x20(%rbp),%rax
lea    0xe34(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x2,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    -0x14(%rbp),%eax
mov    %rax,-0x28(%rbp)
sub    $0x8,%rax
ja     15a9 <get_coretype+0x469>
mov    -0x28(%rbp),%rax
lea    0xe27(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%eax
mov    %rax,-0x30(%rbp)
sub    $0xf,%rax
ja     1273 <get_coretype+0x133>
mov    -0x30(%rbp),%rax
lea    0xee6(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x4,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x5,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x8,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xe,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
mov    -0x10(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x38(%rbp)
sub    $0x9,%eax
ja     12dd <get_coretype+0x19d>
mov    -0x38(%rbp),%rax
lea    0xe54(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xf,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x12,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x10,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0xa,%eax
ja     137f <get_coretype+0x23f>
mov    -0x40(%rbp),%rax
lea    0xdbe(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1333 <get_coretype+0x1f3>
movl   $0x14,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1367 <get_coretype+0x227>
movl   $0x14,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
mov    -0x10(%rbp),%eax
add    $0xfffffff6,%eax
mov    %eax,%ecx
mov    %rcx,-0x48(%rbp)
sub    $0x5,%eax
ja     1425 <get_coretype+0x2e5>
mov    -0x48(%rbp),%rax
lea    0xd04(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     13c9 <get_coretype+0x289>
movl   $0x14,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     13f1 <get_coretype+0x2b1>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1419 <get_coretype+0x2d9>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x50(%rbp)
sub    $0xa,%eax
ja     14d7 <get_coretype+0x397>
mov    -0x50(%rbp),%rax
lea    0xc32(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     146f <get_coretype+0x32f>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1497 <get_coretype+0x357>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     14bf <get_coretype+0x37f>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x58(%rbp)
sub    $0x9,%eax
ja     1589 <get_coretype+0x449>
mov    -0x58(%rbp),%rax
lea    0xb58(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1521 <get_coretype+0x3e1>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1549 <get_coretype+0x409>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1571 <get_coretype+0x431>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x11,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
cmpl   $0xe,-0x10(%rbp)
jne    15a4 <get_coretype+0x464>
movl   $0x18,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15a9 <get_coretype+0x469>
jmp    15d0 <get_coretype+0x490>
cmpl   $0x2,-0x10(%rbp)
jg     15c4 <get_coretype+0x484>
movl   $0x6,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x7,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    15d5 <get_coretype+0x495>
cmpl   $0x3,-0x18(%rbp)
jne    17b5 <get_coretype+0x675>
cmpl   $0x5,-0x8(%rbp)
jg     15f5 <get_coretype+0x4b5>
movl   $0x1,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
cmpl   $0xe,-0x8(%rbp)
jg     160b <get_coretype+0x4cb>
movl   $0x9,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
cmpl   $0xf,-0x8(%rbp)
jne    17b0 <get_coretype+0x670>
cmpl   $0x0,-0xc(%rbp)
je     1629 <get_coretype+0x4e9>
cmpl   $0x2,-0xc(%rbp)
jne    1635 <get_coretype+0x4f5>
movl   $0xa,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
cmpl   $0x5,-0xc(%rbp)
jne    164b <get_coretype+0x50b>
movl   $0x15,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
cmpl   $0x6,-0xc(%rbp)
jne    1795 <get_coretype+0x655>
mov    -0x10(%rbp),%eax
mov    %eax,-0x5c(%rbp)
test   %eax,%eax
je     16dd <get_coretype+0x59d>
jmp    1668 <get_coretype+0x528>
mov    -0x5c(%rbp),%eax
sub    $0x1,%eax
je     168d <get_coretype+0x54d>
jmp    1679 <get_coretype+0x539>
mov    -0x5c(%rbp),%eax
add    $0xfffffffe,%eax
sub    $0x2,%eax
jb     16b5 <get_coretype+0x575>
jmp    1790 <get_coretype+0x650>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     16a9 <get_coretype+0x569>
movl   $0x16,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xb,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     16d1 <get_coretype+0x591>
movl   $0x17,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xb,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    -0x14(%rbp),%eax
mov    %eax,-0x60(%rbp)
sub    $0x1,%eax
je     1713 <get_coretype+0x5d3>
jmp    16f1 <get_coretype+0x5b1>
mov    -0x60(%rbp),%eax
sub    $0x3,%eax
je     173b <get_coretype+0x5fb>
jmp    1702 <get_coretype+0x5c2>
mov    -0x60(%rbp),%eax
sub    $0x6,%eax
je     1763 <get_coretype+0x623>
jmp    178b <get_coretype+0x64b>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     172f <get_coretype+0x5ef>
movl   $0x17,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xb,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1757 <get_coretype+0x617>
movl   $0x19,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xb,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     177f <get_coretype+0x63f>
movl   $0x1a,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xb,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    1790 <get_coretype+0x650>
jmp    17a1 <get_coretype+0x661>
movl   $0xb,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
jmp    17a6 <get_coretype+0x666>
jmp    17ab <get_coretype+0x66b>
jmp    17b0 <get_coretype+0x670>
jmp    17b5 <get_coretype+0x675>
cmpl   $0x6,-0x18(%rbp)
jne    17e8 <get_coretype+0x6a8>
mov    -0x8(%rbp),%eax
sub    $0x6,%eax
jne    17dc <get_coretype+0x69c>
jmp    17d0 <get_coretype+0x690>
movl   $0x13,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0xc,-0x4(%rbp)
jmp    17ef <get_coretype+0x6af>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coretype>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1060 <have_cpuid@plt>
test   %eax,%eax
je     11c9 <get_coretype+0x89>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebx
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebp
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r14d
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r15d
xor    %eax,%eax
call   1040 <get_vendor@plt>
cmp    $0x6,%eax
je     11d3 <get_coretype+0x93>
cmp    $0x3,%eax
je     11e8 <get_coretype+0xa8>
cmp    $0x1,%eax
jne    13ae <get_coretype+0x26e>
add    $0xfffffffc,%ebx
cmp    $0xb,%ebx
ja     13ae <get_coretype+0x26e>
mov    $0x1,%eax
lea    0xe4a(%rip),%rcx
movslq (%rcx,%rbx,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x2,%eax
jmp    13b0 <get_coretype+0x270>
mov    $0x1,%eax
jmp    13b0 <get_coretype+0x270>
cmp    $0x6,%ebx
mov    $0x13,%ecx
mov    $0xc,%eax
cmove  %ecx,%eax
jmp    13b0 <get_coretype+0x270>
mov    $0x1,%eax
cmp    $0x6,%ebx
jl     13b0 <get_coretype+0x270>
mov    $0x9,%eax
cmp    $0xf,%ebx
jb     13b0 <get_coretype+0x270>
jne    13ae <get_coretype+0x26e>
test   $0xfffffffd,%ebp
je     12ac <get_coretype+0x16c>
cmp    $0x5,%ebp
je     12b6 <get_coretype+0x176>
cmp    $0x6,%ebp
jne    12c0 <get_coretype+0x180>
lea    -0x2(%r14),%eax
cmp    $0x2,%eax
jb     13d2 <get_coretype+0x292>
test   %r14d,%r14d
je     13bb <get_coretype+0x27b>
mov    $0x0,%eax
cmp    $0x1,%r14d
jne    13b0 <get_coretype+0x270>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x16,%eax
cmove  %ecx,%eax
jmp    13b0 <get_coretype+0x270>
cmp    $0x8,%r15d
ja     13ae <get_coretype+0x26e>
mov    %r15d,%eax
lea    0xdb4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0x10,%r14d
jae    13ae <get_coretype+0x26e>
movslq %r14d,%rax
lea    0xe27(%rip),%rcx
jmp    12e2 <get_coretype+0x1a2>
xor    %eax,%eax
cmp    $0x3,%r14d
setl   %al
xor    $0x7,%eax
jmp    13b0 <get_coretype+0x270>
mov    $0xa,%eax
jmp    13b0 <get_coretype+0x270>
mov    $0x15,%eax
jmp    13b0 <get_coretype+0x270>
mov    $0xb,%eax
jmp    13b0 <get_coretype+0x270>
add    $0xfffffffa,%r14d
cmp    $0xa,%r14d
jae    13ae <get_coretype+0x26e>
movslq %r14d,%rax
lea    0xe1e(%rip),%rcx
mov    (%rcx,%rax,4),%eax
jmp    13b0 <get_coretype+0x270>
cmp    $0xf,%r14d
ja     13ae <get_coretype+0x26e>
mov    $0x11,%eax
mov    $0xd020,%ecx
bt     %r14d,%ecx
jb     13b0 <get_coretype+0x270>
cmp    $0xa,%r14d
je     1337 <get_coretype+0x1f7>
cmp    $0xd,%r14d
je     1337 <get_coretype+0x1f7>
jmp    13ae <get_coretype+0x26e>
add    $0xfffffff6,%r14d
cmp    $0x5,%r14d
ja     13ae <get_coretype+0x26e>
lea    0xd7a(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
xor    %eax,%eax
call   1050 <support_avx@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,2),%eax
add    $0x11,%eax
jmp    13b0 <get_coretype+0x270>
add    $0xfffffffb,%r14d
cmp    $0xa,%r14d
ja     13ae <get_coretype+0x26e>
mov    $0x11,%eax
lea    0xd19(%rip),%rcx
movslq (%rcx,%r14,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
add    $0xfffffffb,%r14d
cmp    $0x9,%r14d
ja     13ae <get_coretype+0x26e>
mov    $0x11,%eax
lea    0xcd2(%rip),%rcx
movslq (%rcx,%r14,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0x11,%ecx
mov    $0x18,%eax
cmove  %ecx,%eax
jmp    13b0 <get_coretype+0x270>
mov    $0x18,%eax
cmp    $0xe,%r14d
je     13b0 <get_coretype+0x270>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret
cmp    $0x6,%r15d
je     13ea <get_coretype+0x2aa>
cmp    $0x3,%r15d
je     1402 <get_coretype+0x2c2>
mov    $0x0,%eax
cmp    $0x1,%r15d
jne    13b0 <get_coretype+0x270>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x17,%eax
cmove  %ecx,%eax
jmp    13b0 <get_coretype+0x270>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x1a,%eax
cmove  %ecx,%eax
jmp    13b0 <get_coretype+0x270>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x19,%eax
cmove  %ecx,%eax
jmp    13b0 <get_coretype+0x270>

LLVM IR (-O0):
define i32 @get_coretype() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = call i32 (...) @have_cpuid()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 1, i32* %1
br label %196
10: ; preds = %0
%11 = call i32 @get_cputype(i32 4)
store i32 %11, i32* %2
%12 = call i32 @get_cputype(i32 1)
store i32 %12, i32* %3
%13 = call i32 @get_cputype(i32 5)
store i32 %13, i32* %4
%14 = call i32 @get_cputype(i32 2)
store i32 %14, i32* %5
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = load i32, i32* %6
%17 = icmp eq i32 %16, 1
br i1 %17, label %18, label %124
18: ; preds = %10
%19 = load i32, i32* %2
switch i32 %19, label %123 [
i32 4, label %20
i32 5, label %21
i32 6, label %22
i32 15, label %118
]
20: ; preds = %18
store i32 1, i32* %1
br label %196
21: ; preds = %18
store i32 2, i32* %1
br label %196
22: ; preds = %18
%23 = load i32, i32* %5
switch i32 %23, label %117 [
i32 0, label %24
i32 1, label %32
i32 2, label %40
i32 3, label %56
i32 4, label %74
i32 5, label %93
i32 8, label %112
]
24: ; preds = %22
%25 = load i32, i32* %4
switch i32 %25, label %31 [
i32 0, label %26
i32 1, label %26
i32 2, label %26
i32 3, label %26
i32 4, label %26
i32 5, label %26
i32 6, label %26
i32 7, label %27
i32 8, label %28
i32 10, label %28
i32 11, label %28
i32 9, label %29
i32 13, label %29
i32 14, label %29
i32 15, label %30
]
26: ; preds = %24, %24, %24, %24, %24, %24, %24
store i32 3, i32* %1
br label %196
27: ; preds = %24
store i32 4, i32* %1
br label %196
28: ; preds = %24, %24, %24
store i32 5, i32* %1
br label %196
29: ; preds = %24, %24, %24
store i32 8, i32* %1
br label %196
30: ; preds = %24
store i32 14, i32* %1
br label %196
31: ; preds = %24
br label %117
32: ; preds = %22
%33 = load i32, i32* %4
switch i32 %33, label %39 [
i32 6, label %34
i32 7, label %35
i32 10, label %36
i32 11, label %36
i32 14, label %36
i32 15, label %36
i32 12, label %37
i32 13, label %38
]
34: ; preds = %32
store i32 14, i32* %1
br label %196
35: ; preds = %32
store i32 15, i32* %1
br label %196
36: ; preds = %32, %32, %32, %32
store i32 17, i32* %1
br label %196
37: ; preds = %32
store i32 18, i32* %1
br label %196
38: ; preds = %32
store i32 16, i32* %1
br label %196
39: ; preds = %32
br label %117
40: ; preds = %22
%41 = load i32, i32* %4
switch i32 %41, label %55 [
i32 5, label %42
i32 10, label %43
i32 12, label %48
i32 13, label %49
i32 14, label %54
i32 15, label %54
]
42: ; preds = %40
store i32 17, i32* %1
br label %196
43: ; preds = %40
%44 = call i32 (...) @support_avx()
%45 = icmp ne i32 %44, 0
br i1 %45, label %46, label %47
46: ; preds = %43
store i32 20, i32* %1
br label %196
47: ; preds = %43
store i32 17, i32* %1
br label %196
48: ; preds = %40
store i32 17, i32* %1
br label %196
49: ; preds = %40
%50 = call i32 (...) @support_avx()
%51 = icmp ne i32 %50, 0
br i1 %51, label %52, label %53
52: ; preds = %49
store i32 20, i32* %1
br label %196
53: ; preds = %49
store i32 17, i32* %1
br label %196
54: ; preds = %40, %40
store i32 17, i32* %1
br label %196
55: ; preds = %40
br label %117
56: ; preds = %22
%57 = load i32, i32* %4
switch i32 %57, label %73 [
i32 10, label %58
i32 14, label %58
i32 12, label %63
i32 15, label %63
i32 13, label %68
]
58: ; preds = %56, %56
%59 = call i32 (...) @support_avx()
%60 = icmp ne i32 %59, 0
br i1 %60, label %61, label %62
61: ; preds = %58
store i32 20, i32* %1
br label %196
62: ; preds = %58
store i32 17, i32* %1
br label %196
63: ; preds = %56, %56
%64 = call i32 (...) @support_avx()
%65 = icmp ne i32 %64, 0
br i1 %65, label %66, label %67
66: ; preds = %63
store i32 24, i32* %1
br label %196
67: ; preds = %63
store i32 17, i32* %1
br label %196
68: ; preds = %56
%69 = call i32 (...) @support_avx()
%70 = icmp ne i32 %69, 0
br i1 %70, label %71, label %72
71: ; preds = %68
store i32 24, i32* %1
br label %196
72: ; preds = %68
store i32 17, i32* %1
br label %196
73: ; preds = %56
br label %117
74: ; preds = %22
%75 = load i32, i32* %4
switch i32 %75, label %92 [
i32 5, label %76
i32 6, label %76
i32 7, label %81
i32 15, label %81
i32 14, label %86
i32 12, label %91
i32 13, label %91
]
76: ; preds = %74, %74
%77 = call i32 (...) @support_avx()
%78 = icmp ne i32 %77, 0
br i1 %78, label %79, label %80
79: ; preds = %76
store i32 24, i32* %1
br label %196
80: ; preds = %76
store i32 17, i32* %1
br label %196
81: ; preds = %74, %74
%82 = call i32 (...) @support_avx()
%83 = icmp ne i32 %82, 0
br i1 %83, label %84, label %85
84: ; preds = %81
store i32 24, i32* %1
br label %196
85: ; preds = %81
store i32 17, i32* %1
br label %196
86: ; preds = %74
%87 = call i32 (...) @support_avx()
%88 = icmp ne i32 %87, 0
br i1 %88, label %89, label %90
89: ; preds = %86
store i32 24, i32* %1
br label %196
90: ; preds = %86
store i32 17, i32* %1
br label %196
91: ; preds = %74, %74
store i32 17, i32* %1
br label %196
92: ; preds = %74
br label %117
93: ; preds = %22
%94 = load i32, i32* %4
switch i32 %94, label %111 [
i32 6, label %95
i32 5, label %100
i32 14, label %100
i32 7, label %105
i32 12, label %110
]
95: ; preds = %93
%96 = call i32 (...) @support_avx()
%97 = icmp ne i32 %96, 0
br i1 %97, label %98, label %99
98: ; preds = %95
store i32 24, i32* %1
br label %196
99: ; preds = %95
store i32 17, i32* %1
br label %196
100: ; preds = %93, %93
%101 = call i32 (...) @support_avx()
%102 = icmp ne i32 %101, 0
br i1 %102, label %103, label %104
103: ; preds = %100
store i32 24, i32* %1
br label %196
104: ; preds = %100
store i32 17, i32* %1
br label %196
105: ; preds = %93
%106 = call i32 (...) @support_avx()
%107 = icmp ne i32 %106, 0
br i1 %107, label %108, label %109
108: ; preds = %105
store i32 24, i32* %1
br label %196
109: ; preds = %105
store i32 17, i32* %1
br label %196
110: ; preds = %93
store i32 17, i32* %1
br label %196
111: ; preds = %93
br label %117
112: ; preds = %22
%113 = load i32, i32* %4
%114 = icmp eq i32 %113, 14
br i1 %114, label %115, label %116
115: ; preds = %112
store i32 24, i32* %1
br label %196
116: ; preds = %112
br label %117
117: ; preds = %116, %22, %111, %92, %73, %55, %39, %31
br label %123
118: ; preds = %18
%119 = load i32, i32* %4
%120 = icmp sle i32 %119, 2
br i1 %120, label %121, label %122
121: ; preds = %118
store i32 6, i32* %1
br label %196
122: ; preds = %118
store i32 7, i32* %1
br label %196
123: ; preds = %18, %117
br label %124
124: ; preds = %123, %10
%125 = load i32, i32* %6
%126 = icmp eq i32 %125, 3
br i1 %126, label %127, label %188
127: ; preds = %124
%128 = load i32, i32* %2
%129 = icmp sle i32 %128, 5
br i1 %129, label %130, label %131
130: ; preds = %127
store i32 1, i32* %1
br label %196
131: ; preds = %127
%132 = load i32, i32* %2
%133 = icmp sle i32 %132, 14
br i1 %133, label %134, label %135
134: ; preds = %131
store i32 9, i32* %1
br label %196
135: ; preds = %131
%136 = load i32, i32* %2
%137 = icmp eq i32 %136, 15
br i1 %137, label %138, label %187
138: ; preds = %135
%139 = load i32, i32* %3
%140 = icmp eq i32 %139, 0
br i1 %140, label %144, label %141
141: ; preds = %138
%142 = load i32, i32* %3
%143 = icmp eq i32 %142, 2
br i1 %143, label %144, label %145
144: ; preds = %141, %138
store i32 10, i32* %1
br label %196
145: ; preds = %141
%146 = load i32, i32* %3
%147 = icmp eq i32 %146, 5
br i1 %147, label %148, label %149
148: ; preds = %145
store i32 21, i32* %1
br label %196
149: ; preds = %145
%150 = load i32, i32* %3
%151 = icmp eq i32 %150, 6
br i1 %151, label %152, label %183
152: ; preds = %149
%153 = load i32, i32* %4
switch i32 %153, label %182 [
i32 1, label %154
i32 2, label %159
i32 3, label %159
i32 0, label %164
]
154: ; preds = %152
%155 = call i32 (...) @support_avx()
%156 = icmp ne i32 %155, 0
br i1 %156, label %157, label %158
157: ; preds = %154
store i32 22, i32* %1
br label %196
158: ; preds = %154
store i32 11, i32* %1
br label %196
159: ; preds = %152, %152
%160 = call i32 (...) @support_avx()
%161 = icmp ne i32 %160, 0
br i1 %161, label %162, label %163
162: ; preds = %159
store i32 23, i32* %1
br label %196
163: ; preds = %159
store i32 11, i32* %1
br label %196
164: ; preds = %152
%165 = load i32, i32* %5
switch i32 %165, label %181 [
i32 1, label %166
i32 3, label %171
i32 6, label %176
]
166: ; preds = %164
%167 = call i32 (...) @support_avx()
%168 = icmp ne i32 %167, 0
br i1 %168, label %169, label %170
169: ; preds = %166
store i32 23, i32* %1
br label %196
170: ; preds = %166
store i32 11, i32* %1
br label %196
171: ; preds = %164
%172 = call i32 (...) @support_avx()
%173 = icmp ne i32 %172, 0
br i1 %173, label %174, label %175
174: ; preds = %171
store i32 25, i32* %1
br label %196
175: ; preds = %171
store i32 11, i32* %1
br label %196
176: ; preds = %164
%177 = call i32 (...) @support_avx()
%178 = icmp ne i32 %177, 0
br i1 %178, label %179, label %180
179: ; preds = %176
store i32 26, i32* %1
br label %196
180: ; preds = %176
store i32 11, i32* %1
br label %196
181: ; preds = %164
br label %182
182: ; preds = %152, %181
br label %184
183: ; preds = %149
store i32 11, i32* %1
br label %196
184: ; preds = %182
br label %185
185: ; preds = %184
br label %186
186: ; preds = %185
br label %187
187: ; preds = %186, %135
br label %188
188: ; preds = %187, %124
%189 = load i32, i32* %6
%190 = icmp eq i32 %189, 6
br i1 %190, label %191, label %195
191: ; preds = %188
%192 = load i32, i32* %2
switch i32 %192, label %194 [
i32 6, label %193
]
193: ; preds = %191
store i32 19, i32* %1
br label %196
194: ; preds = %191
store i32 12, i32* %1
br label %196
195: ; preds = %188
store i32 0, i32* %1
br label %196
196: ; preds = %195, %194, %193, %183, %180, %179, %175, %174, %170, %169, %163, %162, %158, %157, %148, %144, %134, %130, %122, %121, %115, %110, %109, %108, %104, %103, %99, %98, %91, %90, %89, %85, %84, %80, %79, %72, %71, %67, %66, %62, %61, %54, %53, %52, %48, %47, %46, %42, %38, %37, %36, %35, %34, %30, %29, %28, %27, %26, %21, %20, %9
%197 = load i32, i32* %1
ret i32 %197
}

LLVM IR (-O2):
@switch.table.get_coretype = [16 x i32] [i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 4, i32 5, i32 8, i32 5, i32 5, i32 0, i32 8, i32 8, i32 14]
@switch.table.get_coretype.1 = [10 x i32] [i32 14, i32 15, i32 0, i32 0, i32 17, i32 17, i32 18, i32 16, i32 17, i32 17]
define i32 @get_coretype() {
%1 = tail call i32 (...) @have_cpuid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %115, label %3
3: ; preds = %0
%4 = tail call i32 @get_cputype(i32 4)
%5 = tail call i32 @get_cputype(i32 1)
%6 = tail call i32 @get_cputype(i32 5)
%7 = tail call i32 @get_cputype(i32 2)
%8 = tail call i32 (...) @get_vendor()
switch i32 %8, label %115 [
i32 1, label %9
i32 3, label %71
i32 6, label %104
]
9: ; preds = %3
switch i32 %4, label %70 [
i32 4, label %115
i32 5, label %10
i32 6, label %11
i32 15, label %67
]
10: ; preds = %9
br label %115
11: ; preds = %9
switch i32 %7, label %70 [
i32 0, label %12
i32 1, label %14
i32 2, label %17
i32 3, label %26
i32 4, label %39
i32 5, label %52
i32 8, label %65
]
12: ; preds = %11
%13 = icmp ult i32 %6, 16
br i1 %13, label %107, label %70
14: ; preds = %11
%15 = add i32 %6, -6
%16 = icmp ult i32 %15, 10
br i1 %16, label %111, label %70
17: ; preds = %11
switch i32 %6, label %70 [
i32 5, label %115
i32 10, label %18
i32 12, label %115
i32 13, label %22
i32 14, label %115
i32 15, label %115
]
18: ; preds = %17
%19 = tail call i32 (...) @support_avx()
%20 = icmp eq i32 %19, 0
%21 = select i1 %20, i32 17, i32 20
br label %115
22: ; preds = %17
%23 = tail call i32 (...) @support_avx()
%24 = icmp eq i32 %23, 0
%25 = select i1 %24, i32 17, i32 20
br label %115
26: ; preds = %11
switch i32 %6, label %70 [
i32 10, label %27
i32 14, label %27
i32 12, label %31
i32 15, label %31
i32 13, label %35
]
27: ; preds = %26, %26
%28 = tail call i32 (...) @support_avx()
%29 = icmp eq i32 %28, 0
%30 = select i1 %29, i32 17, i32 20
br label %115
31: ; preds = %26, %26
%32 = tail call i32 (...) @support_avx()
%33 = icmp eq i32 %32, 0
%34 = select i1 %33, i32 17, i32 24
br label %115
35: ; preds = %26
%36 = tail call i32 (...) @support_avx()
%37 = icmp eq i32 %36, 0
%38 = select i1 %37, i32 17, i32 24
br label %115
39: ; preds = %11
switch i32 %6, label %70 [
i32 5, label %40
i32 6, label %40
i32 7, label %44
i32 15, label %44
i32 14, label %48
i32 12, label %115
i32 13, label %115
]
40: ; preds = %39, %39
%41 = tail call i32 (...) @support_avx()
%42 = icmp eq i32 %41, 0
%43 = select i1 %42, i32 17, i32 24
br label %115
44: ; preds = %39, %39
%45 = tail call i32 (...) @support_avx()
%46 = icmp eq i32 %45, 0
%47 = select i1 %46, i32 17, i32 24
br label %115
48: ; preds = %39
%49 = tail call i32 (...) @support_avx()
%50 = icmp eq i32 %49, 0
%51 = select i1 %50, i32 17, i32 24
br label %115
52: ; preds = %11
switch i32 %6, label %70 [
i32 6, label %53
i32 5, label %57
i32 14, label %57
i32 7, label %61
i32 12, label %115
]
53: ; preds = %52
%54 = tail call i32 (...) @support_avx()
%55 = icmp eq i32 %54, 0
%56 = select i1 %55, i32 17, i32 24
br label %115
57: ; preds = %52, %52
%58 = tail call i32 (...) @support_avx()
%59 = icmp eq i32 %58, 0
%60 = select i1 %59, i32 17, i32 24
br label %115
61: ; preds = %52
%62 = tail call i32 (...) @support_avx()
%63 = icmp eq i32 %62, 0
%64 = select i1 %63, i32 17, i32 24
br label %115
65: ; preds = %11
%66 = icmp eq i32 %6, 14
br i1 %66, label %115, label %70
67: ; preds = %9
%68 = icmp slt i32 %6, 3
%69 = select i1 %68, i32 6, i32 7
br label %115
70: ; preds = %14, %12, %9, %65, %52, %39, %26, %17, %11
br label %115
71: ; preds = %3
%72 = icmp slt i32 %4, 6
br i1 %72, label %115, label %73
73: ; preds = %71
%74 = icmp ult i32 %4, 15
br i1 %74, label %115, label %75
75: ; preds = %73
%76 = icmp eq i32 %4, 15
br i1 %76, label %77, label %115
77: ; preds = %75
%78 = and i32 %5, -3
%79 = icmp eq i32 %78, 0
br i1 %79, label %115, label %80
80: ; preds = %77
switch i32 %5, label %103 [
i32 5, label %115
i32 6, label %81
]
81: ; preds = %80
switch i32 %6, label %115 [
i32 1, label %82
i32 2, label %86
i32 3, label %86
i32 0, label %90
]
82: ; preds = %81
%83 = tail call i32 (...) @support_avx()
%84 = icmp eq i32 %83, 0
%85 = select i1 %84, i32 11, i32 22
br label %115
86: ; preds = %81, %81
%87 = tail call i32 (...) @support_avx()
%88 = icmp eq i32 %87, 0
%89 = select i1 %88, i32 11, i32 23
br label %115
90: ; preds = %81
switch i32 %7, label %115 [
i32 1, label %91
i32 3, label %95
i32 6, label %99
]
91: ; preds = %90
%92 = tail call i32 (...) @support_avx()
%93 = icmp eq i32 %92, 0
%94 = select i1 %93, i32 11, i32 23
br label %115
95: ; preds = %90
%96 = tail call i32 (...) @support_avx()
%97 = icmp eq i32 %96, 0
%98 = select i1 %97, i32 11, i32 25
br label %115
99: ; preds = %90
%100 = tail call i32 (...) @support_avx()
%101 = icmp eq i32 %100, 0
%102 = select i1 %101, i32 11, i32 26
br label %115
103: ; preds = %80
br label %115
104: ; preds = %3
%105 = icmp eq i32 %4, 6
%106 = select i1 %105, i32 19, i32 12
br label %115
107: ; preds = %12
%108 = sext i32 %6 to i64
%109 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.get_coretype, i64 0, i64 %108
%110 = load i32, i32* %109
br label %115
111: ; preds = %14
%112 = sext i32 %15 to i64
%113 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.get_coretype.1, i64 0, i64 %112
%114 = load i32, i32* %113
br label %115
115: ; preds = %111, %107, %90, %81, %75, %70, %3, %104, %99, %95, %91, %86, %82, %80, %77, %73, %71, %67, %65, %52, %61, %57, %53, %39, %39, %48, %44, %40, %35, %31, %27, %17, %17, %22, %17, %18, %17, %9, %0, %103, %10
%116 = phi i32 [ 11, %103 ], [ 2, %10 ], [ 1, %0 ], [ 1, %9 ], [ 17, %17 ], [ %21, %18 ], [ 17, %17 ], [ %25, %22 ], [ 17, %17 ], [ 17, %17 ], [ %30, %27 ], [ %34, %31 ], [ %38, %35 ], [ %43, %40 ], [ %47, %44 ], [ %51, %48 ], [ 17, %39 ], [ 17, %39 ], [ %56, %53 ], [ %60, %57 ], [ %64, %61 ], [ 17, %52 ], [ 24, %65 ], [ %69, %67 ], [ 1, %71 ], [ 9, %73 ], [ 10, %77 ], [ 21, %80 ], [ %85, %82 ], [ %89, %86 ], [ %94, %91 ], [ %98, %95 ], [ %102, %99 ], [ %106, %104 ], [ 0, %3 ], [ 0, %70 ], [ 0, %75 ], [ 0, %81 ], [ 0, %90 ], [ %110, %107 ], [ %114, %111 ]
ret i32 %116
}