#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
long xen_get_cpuid(int);
int running_on_sim(void) {
  int i;
  long cpuid[6];
  for (i = 0; i < 5; ++i)
    cpuid[i] = xen_get_cpuid(i);
  if ((cpuid[0] & 0xff) != 'H')
    return 0;
  if ((cpuid[3] & 0xff) != 0x4)
    return 0;
  if (((cpuid[3] >> 8) & 0xff) != 0x0)
    return 0;
  if (((cpuid[3] >> 16) & 0xff) != 0x0)
    return 0;
  if (((cpuid[3] >> 24) & 0x7) != 0x7)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<running_on_sim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    114b <running_on_sim+0x3b>
mov    -0x8(%rbp),%edi
call   1030 <xen_get_cpuid@plt>
mov    %rax,%rcx
movslq -0x8(%rbp),%rax
mov    %rcx,-0x40(%rbp,%rax,8)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111f <running_on_sim+0xf>
mov    -0x40(%rbp),%rax
and    $0xff,%rax
cmp    $0x48,%rax
je     116b <running_on_sim+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    11fc <running_on_sim+0xec>
mov    -0x28(%rbp),%rax
and    $0xff,%rax
cmp    $0x4,%rax
je     118b <running_on_sim+0x7b>
movl   $0x0,-0x4(%rbp)
jmp    11fc <running_on_sim+0xec>
mov    -0x28(%rbp),%rax
sar    $0x8,%rax
and    $0xff,%rax
cmp    $0x0,%rax
je     11af <running_on_sim+0x9f>
movl   $0x0,-0x4(%rbp)
jmp    11fc <running_on_sim+0xec>
mov    -0x28(%rbp),%rax
sar    $0x10,%rax
and    $0xff,%rax
cmp    $0x0,%rax
je     11d3 <running_on_sim+0xc3>
movl   $0x0,-0x4(%rbp)
jmp    11fc <running_on_sim+0xec>
mov    -0x28(%rbp),%rax
sar    $0x18,%rax
and    $0x7,%rax
cmp    $0x7,%rax
je     11f5 <running_on_sim+0xe5>
movl   $0x0,-0x4(%rbp)
jmp    11fc <running_on_sim+0xec>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<running_on_sim>:
push   %r14
push   %rbx
push   %rax
xor    %edi,%edi
call   1030 <xen_get_cpuid@plt>
mov    %rax,%r14
mov    $0x1,%edi
call   1030 <xen_get_cpuid@plt>
mov    $0x2,%edi
call   1030 <xen_get_cpuid@plt>
mov    $0x3,%edi
call   1030 <xen_get_cpuid@plt>
mov    %rax,%rbx
mov    $0x4,%edi
call   1030 <xen_get_cpuid@plt>
movzbl %r14b,%eax
xor    $0x48,%rax
mov    %ebx,%ecx
and    $0xffffff,%ecx
xor    $0x4,%rcx
or     %rax,%rcx
not    %ebx
and    $0x7000000,%ebx
xor    %eax,%eax
or     %rcx,%rbx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @running_on_sim() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [6 x i64]
store i32 0, i32* %2
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i64 @xen_get_cpuid(i32 %8)
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [6 x i64], [6 x i64]* %3, i64 0, i64 %11
store i64 %9, i64* %12
br label %13
13: ; preds = %7
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %4
16: ; preds = %4
%17 = getelementptr inbounds [6 x i64], [6 x i64]* %3, i64 0, i64 0
%18 = load i64, i64* %17
%19 = and i64 %18, 255
%20 = icmp ne i64 %19, 72
br i1 %20, label %21, label %22
21: ; preds = %16
store i32 0, i32* %1
br label %50
22: ; preds = %16
%23 = getelementptr inbounds [6 x i64], [6 x i64]* %3, i64 0, i64 3
%24 = load i64, i64* %23
%25 = and i64 %24, 255
%26 = icmp ne i64 %25, 4
br i1 %26, label %27, label %28
27: ; preds = %22
store i32 0, i32* %1
br label %50
28: ; preds = %22
%29 = getelementptr inbounds [6 x i64], [6 x i64]* %3, i64 0, i64 3
%30 = load i64, i64* %29
%31 = ashr i64 %30, 8
%32 = and i64 %31, 255
%33 = icmp ne i64 %32, 0
br i1 %33, label %34, label %35
34: ; preds = %28
store i32 0, i32* %1
br label %50
35: ; preds = %28
%36 = getelementptr inbounds [6 x i64], [6 x i64]* %3, i64 0, i64 3
%37 = load i64, i64* %36
%38 = ashr i64 %37, 16
%39 = and i64 %38, 255
%40 = icmp ne i64 %39, 0
br i1 %40, label %41, label %42
41: ; preds = %35
store i32 0, i32* %1
br label %50
42: ; preds = %35
%43 = getelementptr inbounds [6 x i64], [6 x i64]* %3, i64 0, i64 3
%44 = load i64, i64* %43
%45 = ashr i64 %44, 24
%46 = and i64 %45, 7
%47 = icmp ne i64 %46, 7
br i1 %47, label %48, label %49
48: ; preds = %42
store i32 0, i32* %1
br label %50
49: ; preds = %42
store i32 1, i32* %1
br label %50
50: ; preds = %49, %48, %41, %34, %27, %21
%51 = load i32, i32* %1
ret i32 %51
}

LLVM IR (-O2):
define i32 @running_on_sim() {
%1 = tail call i64 @xen_get_cpuid(i32 0)
%2 = tail call i64 @xen_get_cpuid(i32 1)
%3 = tail call i64 @xen_get_cpuid(i32 2)
%4 = tail call i64 @xen_get_cpuid(i32 3)
%5 = tail call i64 @xen_get_cpuid(i32 4)
%6 = and i64 %1, 255
%7 = icmp eq i64 %6, 72
%8 = and i64 %4, 16777215
%9 = icmp eq i64 %8, 4
%10 = select i1 %7, i1 %9, i1 false
%11 = and i64 %4, 117440512
%12 = icmp eq i64 %11, 117440512
%13 = select i1 %10, i1 %12, i1 false
%14 = zext i1 %13 to i32
ret i32 %14
}