xunge/DecIR huggingface dataset:
/* Variables and functions */
double log10(double);
double log2(double x) { return log10(x) / log10(2.0); }


x86 assembly (clang, -O0):
<log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log10@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xecc(%rip),%xmm0
call   1030 <log10@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2>:
push   %rax
call   1030 <log10@plt>
divsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @log2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log10(double %3)
%5 = call double @log10(double 2.000000e+00)
%6 = fdiv double %4, %5
ret double %6
}

LLVM IR (-O2):
define double @log2(double %0) {
%2 = tail call double @log10(double %0)
%3 = fdiv double %2, 0x3FD34413509F79FF
ret double %3
}
int os_apm_init(void) { return -1; }


x86 assembly (clang, -O0):
<os_apm_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_apm_init>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @os_apm_init() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @os_apm_init() {
ret i32 -1
}
/* Type definitions */
struct ohash {
  int dummy;
};

/* Variables and functions */
unsigned int ohash_qlookupi(struct ohash *, char const *, char const **);
unsigned int ohash_qlookup(struct ohash *h, const char *s) {
  const char *e = NULL;
  return ohash_qlookupi(h, s, &e);
}


x86 assembly (clang, -O0):
<ohash_qlookup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <ohash_qlookupi@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ohash_qlookup>:
push   %rax
movq   $0x0,(%rsp)
mov    %rsp,%rdx
call   1030 <ohash_qlookupi@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.ohash = type { i32 }
define i32 @ohash_qlookup(%struct.ohash* %0, i8* %1) {
%3 = alloca %struct.ohash*
%4 = alloca i8*
%5 = alloca i8*
store %struct.ohash* %0, %struct.ohash** %3
store i8* %1, i8** %4
store i8* null, i8** %5
%6 = load %struct.ohash*, %struct.ohash** %3
%7 = load i8*, i8** %4
%8 = call i32 @ohash_qlookupi(%struct.ohash* %6, i8* %7, i8** %5)
ret i32 %8
}

LLVM IR (-O2):
%struct.ohash = type { i32 }
define i32 @ohash_qlookup(%struct.ohash* %0, i8* %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
store i8* null, i8** %3
%5 = call i32 @ohash_qlookupi(%struct.ohash* %0, i8* %1, i8** %3)
ret i32 %5
}
int c040(void) { return 0; }


x86 assembly (clang, -O0):
<c040>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c040>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c040() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c040() {
ret i32 0
}
/* Variables and functions */
int popNumber();
int /*<<< orphan*/ pushNumber(int);
void basBitwiseXor() {
  int a, b;
  a = popNumber();
  b = popNumber();
  pushNumber(a ^ b);
}


x86 assembly (clang, -O0):
<basBitwiseXor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <popNumber@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <popNumber@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
xor    -0x8(%rbp),%edi
call   1030 <pushNumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basBitwiseXor>:
push   %rbx
xor    %eax,%eax
call   1040 <popNumber@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <popNumber@plt>
xor    %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <pushNumber@plt>

LLVM IR (-O0):
define void @basBitwiseXor() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @popNumber()
store i32 %3, i32* %1
%4 = call i32 (...) @popNumber()
store i32 %4, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = xor i32 %5, %6
%8 = call i32 @pushNumber(i32 %7)
ret void
}

LLVM IR (-O2):
define void @basBitwiseXor() {
%1 = tail call i32 (...) @popNumber()
%2 = tail call i32 (...) @popNumber()
%3 = xor i32 %2, %1
%4 = tail call i32 @pushNumber(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setLeftDtMotors(int);
int /*<<< orphan*/ setRightDtMotors(int);
void setDtMotors(int power) {
  setLeftDtMotors(power);
  setRightDtMotors(power);
}


x86 assembly (clang, -O0):
<setDtMotors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <setLeftDtMotors@plt>
mov    -0x4(%rbp),%edi
call   1030 <setRightDtMotors@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDtMotors>:
push   %rbx
mov    %edi,%ebx
call   1040 <setLeftDtMotors@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <setRightDtMotors@plt>

LLVM IR (-O0):
define void @setDtMotors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @setLeftDtMotors(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @setRightDtMotors(i32 %5)
ret void
}

LLVM IR (-O2):
define void @setDtMotors(i32 %0) {
%2 = tail call i32 @setLeftDtMotors(i32 %0)
%3 = tail call i32 @setRightDtMotors(i32 %0)
ret void
}
int test_imm_F3int64_midword_reg(long long val) {
  return ((val >> 16) & (0xF3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F3int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xf3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F3int64_midword_reg>:
test   $0xf30000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F3int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 243
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F3int64_midword_reg(i64 %0) {
%2 = and i64 %0, 15925248
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void main(void) {
  int x[10];
  int y;
  y = x;
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    -0x30(%rbp),%rax
mov    %eax,-0x34(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca [10 x i32]
%2 = alloca i32
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = ptrtoint i32* %3 to i32
store i32 %4, i32* %2
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_llrint();
scalar_t__ llrint(double);
void test_llrint(double d) {
  if (llrint(d) != llrint(d))
    link_failure_llrint();
}


x86 assembly (clang, -O0):
<test_llrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <llrint@plt>
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <llrint@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_llrint+0x3c>
mov    $0x0,%al
call   1040 <link_failure_llrint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_llrint>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <llrint@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1030 <llrint@plt>
cmp    %rax,%rbx
jne    1149 <test_llrint+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_llrint@plt>

LLVM IR (-O0):
define void @test_llrint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @llrint(double %3)
%5 = load double, double* %2
%6 = call i64 @llrint(double %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_llrint()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_llrint(double %0) {
%2 = tail call i64 @llrint(double %0)
%3 = tail call i64 @llrint(double %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_llrint()
br label %7
7: ; preds = %5, %1
ret void
}
void swapch(char *arr, char a, char b) {
  char tmp;
  tmp = arr[a];
  arr[a] = arr[b];
  arr[b] = tmp;
}


x86 assembly (clang, -O0):
<swapch>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movsbq -0x9(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rax
movsbq -0xa(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movsbq -0x9(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xb(%rbp),%dl
mov    -0x8(%rbp),%rax
movsbq -0xa(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapch>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%sil
movslq %edx,%rdx
mov    (%rdi,%rdx,1),%cl
mov    %cl,(%rdi,%rax,1)
mov    %sil,(%rdi,%rdx,1)
ret

LLVM IR (-O0):
define void @swapch(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
%9 = load i8, i8* %5
%10 = sext i8 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
store i8 %12, i8* %7
%13 = load i8*, i8** %4
%14 = load i8, i8* %6
%15 = sext i8 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = load i8*, i8** %4
%19 = load i8, i8* %5
%20 = sext i8 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
%22 = load i8, i8* %7
%23 = load i8*, i8** %4
%24 = load i8, i8* %6
%25 = sext i8 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 %22, i8* %26
ret void
}

LLVM IR (-O2):
define void @swapch(i8* nocapture %0, i8 signext %1, i8 signext %2) {
%4 = sext i8 %1 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = sext i8 %2 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
store i8 %9, i8* %5
store i8 %6, i8* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cpc_key_press(int);
int /*<<< orphan*/ cpc_key_unpress(int);
void Joy_Gamma_Fire1(int value) {
  if (value) {
    cpc_key_press(0x74);
  } else {
    cpc_key_unpress(0x74);
  };
}


x86 assembly (clang, -O0):
<Joy_Gamma_Fire1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1144 <Joy_Gamma_Fire1+0x24>
mov    $0x74,%edi
call   1030 <cpc_key_press@plt>
jmp    114e <Joy_Gamma_Fire1+0x2e>
mov    $0x74,%edi
call   1040 <cpc_key_unpress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Joy_Gamma_Fire1>:
test   %edi,%edi
je     112e <Joy_Gamma_Fire1+0xe>
mov    $0x74,%edi
jmp    1030 <cpc_key_press@plt>
mov    $0x74,%edi
jmp    1040 <cpc_key_unpress@plt>

LLVM IR (-O0):
define void @Joy_Gamma_Fire1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @cpc_key_press(i32 116)
br label %9
7: ; preds = %1
%8 = call i32 @cpc_key_unpress(i32 116)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @Joy_Gamma_Fire1(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @cpc_key_press(i32 116)
br label %7
5: ; preds = %1
%6 = tail call i32 @cpc_key_unpress(i32 116)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ has_box_on(char);
int is_walkable(char ch) { return ch != '#' && !has_box_on(ch); }


x86 assembly (clang, -O0):
<is_walkable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x23,%ecx
mov    %al,-0x2(%rbp)
je     1144 <is_walkable+0x34>
movsbl -0x1(%rbp),%edi
call   1030 <has_box_on@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_walkable>:
xor    %eax,%eax
cmp    $0x23,%dil
je     112f <is_walkable+0x1f>
push   %rax
movsbl %dil,%edi
call   1030 <has_box_on@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @is_walkable(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp ne i32 %4, 35
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i32 @has_box_on(i8 signext %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_walkable(i8 signext %0) {
%2 = icmp eq i8 %0, 35
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @has_box_on(i8 signext %0)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void __u32_set(void *cc, void *k, void *v, bool n) {
  *(uint32_t *)v = *(uint32_t *)cc;
}


x86 assembly (clang, -O0):
<__u32_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__u32_set>:
mov    (%rdi),%eax
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define void @__u32_set(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = load i8*, i8** %7
%13 = bitcast i8* %12 to i32*
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @__u32_set(i8* nocapture %0, i8* nocapture readnone %1, i8* nocapture writeonly %2, i32 %3) {
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = bitcast i8* %2 to i32*
store i32 %6, i32* %7
ret void
}
char *strcomment(char *s) {
  char *p;
  for (p = s; *p != '\0'; p++) {
    if (*p == '#') {
      *p = '\0';
      break;
    }
  }
  return s;
}


x86 assembly (clang, -O0):
<strcomment>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1152 <strcomment+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x23,%eax
jne    113c <strcomment+0x3c>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
jmp    1152 <strcomment+0x52>
jmp    1141 <strcomment+0x41>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strcomment+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcomment>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
movzbl (%rcx),%edx
test   %dl,%dl
je     1125 <strcomment+0x25>
cmp    $0x23,%dl
je     1122 <strcomment+0x22>
add    $0x1,%rcx
jmp    1110 <strcomment+0x10>
movb   $0x0,(%rcx)
ret

LLVM IR (-O0):
define i8* @strcomment(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %18, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 35
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i8*, i8** %3
store i8 0, i8* %16
br label %21
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %5
21: ; preds = %15, %5
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @strcomment(i8* returned %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 35, label %5
]
5: ; preds = %2
store i8 0, i8* %3
br label %8
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2, %5
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void macscp1_3() { puts("macscp1_3"); }


x86 assembly (clang, -O0):
<macscp1_3>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<macscp1_3>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"macscp1_3\00"
define void @macscp1_3() {
%1 = call i32 @puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"macscp1_3\00"
define void @macscp1_3() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int fact(int);
int npr(int n, int r) { return (fact(n) / fact(n - r)); }


x86 assembly (clang, -O0):
<npr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fact@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <fact@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<npr>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <fact@plt>
mov    %eax,%r14d
sub    %ebx,%ebp
mov    %ebp,%edi
call   1030 <fact@plt>
mov    %eax,%ecx
mov    %r14d,%eax
cltd
idiv   %ecx
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @npr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @fact(i32 %5)
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = sub nsw i32 %7, %8
%10 = call i32 @fact(i32 %9)
%11 = sdiv i32 %6, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @npr(i32 %0, i32 %1) {
%3 = tail call i32 @fact(i32 %0)
%4 = sub nsw i32 %0, %1
%5 = tail call i32 @fact(i32 %4)
%6 = sdiv i32 %3, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ ioctl(int, int, int /*<<< orphan*/ *);
int tca_overlay_disable(int fb_dev_fd) {
  ioctl(fb_dev_fd, 60, NULL);
  return 0;
}


x86 assembly (clang, -O0):
<tca_overlay_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x3c,%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <ioctl@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tca_overlay_disable>:
push   %rax
mov    $0x3c,%esi
xor    %edx,%edx
call   1030 <ioctl@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tca_overlay_disable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ioctl(i32 %3, i32 60, i32* null)
ret i32 0
}

LLVM IR (-O2):
define i32 @tca_overlay_disable(i32 %0) {
%2 = tail call i32 @ioctl(i32 %0, i32 60, i32* null)
ret i32 0
}
int is_correct_length(char *isbn_number) {
  int position_counter = 0;
  while (isbn_number[position_counter] != '\0') {
    position_counter++;
  }
  if (position_counter < 17 || position_counter > 17) {
    return -1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_correct_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <is_correct_length+0x32>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <is_correct_length+0xf>
cmpl   $0x11,-0x14(%rbp)
jl     1146 <is_correct_length+0x46>
cmpl   $0x11,-0x14(%rbp)
jle    1152 <is_correct_length+0x52>
movl   $0xffffffff,-0x4(%rbp)
jmp    1159 <is_correct_length+0x59>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_correct_length>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpb   $0x0,(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <is_correct_length+0x10>
xor    %ecx,%ecx
cmp    $0x12,%eax
sete   %cl
lea    (%rcx,%rcx,1),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @is_correct_length(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %5
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = load i32, i32* %4
%18 = icmp slt i32 %17, 17
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = load i32, i32* %4
%21 = icmp sgt i32 %20, 17
br i1 %21, label %22, label %23
22: ; preds = %19, %16
store i32 -1, i32* %2
br label %24
23: ; preds = %19
store i32 1, i32* %2
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_correct_length(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
%10 = icmp eq i32 %9, 17
%11 = select i1 %10, i32 1, i32 -1
ret i32 %11
}
/* Variables and functions */
void *__coverity_alloc__(int);
int /*<<< orphan*/ __coverity_mark_as_afm_allocated__(void *, char *);
void *H5Fopen(const char *name, unsigned flags, void *fapl_id) {
  void *id = __coverity_alloc__(10);
  __coverity_mark_as_afm_allocated__(id, "H5Fclose");
  return id;
}


x86 assembly (clang, -O0):
<H5Fopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    0xeb4(%rip),%rsi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H5Fopen>:
push   %rbx
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    %rax,%rdi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"H5Fclose\00"
define i8* @H5Fopen(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = call i8* @__coverity_alloc__(i32 10)
store i8* %8, i8** %7
%9 = load i8*, i8** %7
%10 = call i32 @__coverity_mark_as_afm_allocated__(i8* %9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%11 = load i8*, i8** %7
ret i8* %11
}

LLVM IR (-O2):
@.str = [9 x i8] c"H5Fclose\00"
define i8* @H5Fopen(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i8* @__coverity_alloc__(i32 10)
%5 = tail call i32 @__coverity_mark_as_afm_allocated__(i8* %4, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_i2c_gy30_lignt();
int iotbus_i2c_test() {
  printf("iotbus_i2c_test\n");
  test_i2c_gy30_lignt();
  return 0;
}


x86 assembly (clang, -O0):
<iotbus_i2c_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <test_i2c_gy30_lignt@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iotbus_i2c_test>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <test_i2c_gy30_lignt@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"iotbus_i2c_test\0A\00"
define i32 @iotbus_i2c_test() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @test_i2c_gy30_lignt()
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"iotbus_i2c_test\00"
define i32 @iotbus_i2c_test() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @test_i2c_gy30_lignt()
ret i32 0
}
int comp(const void *elem1, const void *elem2) {
  int f, s;
  f = *((int *)elem1);
  s = *((int *)elem2);
  if (f > s)
    return 1;
  if (f < s)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jle    1136 <comp+0x36>
movl   $0x1,-0x4(%rbp)
jmp    1155 <comp+0x55>
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    114e <comp+0x4e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <comp+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setl   %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
store i32 %13, i32* %7
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %24
18: ; preds = %2
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = icmp slt i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 -1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp slt i32 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
scalar_t__ _ttime_number(char **, int *);
int _ttime_minut(char **p, time_t *time) {
  time_t res;
  if (_ttime_number(p, &res) != 0 || res >= 60)
    return 1;
  *time += res * 60;
  return 0;
}


x86 assembly (clang, -O0):
<_ttime_minut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x1c(%rbp),%rsi
call   1030 <_ttime_number@plt>
cmp    $0x0,%rax
jne    1141 <_ttime_minut+0x31>
cmpl   $0x3c,-0x1c(%rbp)
jl     114d <_ttime_minut+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1160 <_ttime_minut+0x50>
imul   $0x3c,-0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ttime_minut>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0xc(%rsp),%rsi
call   1030 <_ttime_number@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
jne    113f <_ttime_minut+0x2f>
mov    0xc(%rsp),%ecx
cmp    $0x3b,%ecx
jg     113f <_ttime_minut+0x2f>
imul   $0x3c,%ecx,%eax
add    %eax,(%rbx)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_ttime_minut(i8** %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
%6 = alloca i32
store i8** %0, i8*** %4
store i32* %1, i32** %5
%7 = load i8**, i8*** %4
%8 = call i64 @_ttime_number(i8** %7, i32* %6)
%9 = icmp ne i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i32, i32* %6
%12 = icmp sge i32 %11, 60
br i1 %12, label %13, label %14
13: ; preds = %10, %2
store i32 1, i32* %3
br label %20
14: ; preds = %10
%15 = load i32, i32* %6
%16 = mul nsw i32 %15, 60
%17 = load i32*, i32** %5
%18 = load i32, i32* %17
%19 = add nsw i32 %18, %16
store i32 %19, i32* %17
store i32 0, i32* %3
br label %20
20: ; preds = %14, %13
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @_ttime_minut(i8** %0, i32* nocapture %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i64 @_ttime_number(i8** %0, i32* %3)
%6 = icmp ne i64 %5, 0
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 59
%9 = select i1 %6, i1 true, i1 %8
br i1 %9, label %14, label %10
10: ; preds = %2
%11 = mul nsw i32 %7, 60
%12 = load i32, i32* %1
%13 = add nsw i32 %12, %11
store i32 %13, i32* %1
br label %14
14: ; preds = %2, %10
%15 = phi i32 [ 0, %10 ], [ 1, %2 ]
ret i32 %15
}
/* Variables and functions */
float const atan2f(float, float);
float thinplate_color_pos(float L, float a, float b) {
  const float pi = 3.14153f;
  const float h = atan2f(b, a) + pi;
  const int sector = 4.0f * h / (2.0f * pi);
  return 256.0 * sector + L;
}


x86 assembly (clang, -O0):
<thinplate_color_pos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  0xee1(%rip),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <atan2f@plt>
movss  0xec5(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  0xeb0(%rip),%xmm0
mulss  -0x14(%rbp),%xmm0
movss  0xe9f(%rip),%xmm1
divss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x18(%rbp)
cvtsi2sdl -0x18(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xe76(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thinplate_color_pos>:
push   %rax
movss  %xmm0,0x4(%rsp)
movaps %xmm2,%xmm0
call   1030 <atan2f@plt>
addss  0xed9(%rip),%xmm0
mulss  0xed5(%rip),%xmm0
divss  0xed1(%rip),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2pd %xmm0,%xmm0
mulsd  0xec9(%rip),%xmm0
movss  0x4(%rsp),%xmm1
cvtss2sd %xmm1,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @thinplate_color_pos(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca i32
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
store float 0x400921DA80000000, float* %7
%10 = load float, float* %6
%11 = load float, float* %5
%12 = call float @atan2f(float %10, float %11)
%13 = fadd float %12, 0x400921DA80000000
store float %13, float* %8
%14 = load float, float* %8
%15 = fmul float 4.000000e+00, %14
%16 = fdiv float %15, 0x401921DA80000000
%17 = fptosi float %16 to i32
store i32 %17, i32* %9
%18 = load i32, i32* %9
%19 = sitofp i32 %18 to double
%20 = load float, float* %4
%21 = fpext float %20 to double
%22 = call double @llvm.fmuladd.f64(double 2.560000e+02, double %19, double %21)
%23 = fptrunc double %22 to float
ret float %23
}

LLVM IR (-O2):
define float @thinplate_color_pos(float %0, float %1, float %2) {
%4 = tail call float @atan2f(float %2, float %1)
%5 = fadd float %4, 0x400921DA80000000
%6 = fmul float %5, 4.000000e+00
%7 = fdiv float %6, 0x401921DA80000000
%8 = fptosi float %7 to i32
%9 = sitofp i32 %8 to double
%10 = fpext float %0 to double
%11 = tail call double @llvm.fmuladd.f64(double %9, double 2.560000e+02, double %10)
%12 = fptrunc double %11 to float
ret float %12
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char, int);
int /*<<< orphan*/ stderr;
void g(int x) { fprintf(stderr, "%c%d\n", 'g', x); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%ecx
lea    0xed2(%rip),%rsi
mov    $0x67,%edx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %edi,%ecx
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
lea    0xede(%rip),%rsi
mov    $0x67,%edx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [6 x i8] c"%c%d\0A\00"
define void @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 signext 103, i32 %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [6 x i8] c"%c%d\0A\00"
define void @g(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 signext 103, i32 %0)
ret void
}
/* Variables and functions */
int _create_DMA_buff(unsigned long *virtual_addr, unsigned long *physical_addr,
                     size_t length) {
  int temp;
  size_t contig_length;
  void *v_addr;
  return 1;
}


x86 assembly (clang, -O0):
<_create_DMA_buff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_create_DMA_buff>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_create_DMA_buff(i64* %0, i64* %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i64
%9 = alloca i8*
store i64* %0, i64** %4
store i64* %1, i64** %5
store i64 %2, i64* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @_create_DMA_buff(i64* nocapture readnone %0, i64* nocapture readnone %1, i64 %2) {
ret i32 1
}
void vec3_negate(float *dst) {
  dst[0] = -dst[0];
  dst[1] = -dst[1];
  dst[2] = -dst[2];
}


x86 assembly (clang, -O0):
<vec3_negate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_negate>:
movaps 0xef9(%rip),%xmm0
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm2
movss  0x8(%rdi),%xmm3
xorps  %xmm0,%xmm1
movss  %xmm1,(%rdi)
xorps  %xmm0,%xmm2
movss  %xmm2,0x4(%rdi)
xorps  %xmm0,%xmm3
movss  %xmm3,0x8(%rdi)
ret

LLVM IR (-O0):
define void @vec3_negate(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = fneg float %5
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 0
store float %6, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = fneg float %11
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float*, float** %2
%16 = getelementptr inbounds float, float* %15, i64 2
%17 = load float, float* %16
%18 = fneg float %17
%19 = load float*, float** %2
%20 = getelementptr inbounds float, float* %19, i64 2
store float %18, float* %20
ret void
}

LLVM IR (-O2):
define void @vec3_negate(float* nocapture %0) {
%2 = load float, float* %0
%3 = fneg float %2
store float %3, float* %0
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = fneg float %5
store float %6, float* %4
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = fneg float %8
store float %9, float* %7
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
long ftell(int /*<<< orphan*/ *);
off_t ftello(FILE *stream) {
  long pos;
  pos = ftell(stream);
  return (off_t)pos;
}


x86 assembly (clang, -O0):
<ftello>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftello>:
jmp    1030 <ftell@plt>

LLVM IR (-O0):
define i32 @ftello(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i64 @ftell(i32* %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @ftello(i32* nocapture %0) {
%2 = tail call i64 @ftell(i32* %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
unsigned char setBit(int, unsigned char, int);
unsigned char cmd_negateBit(int workonbit, unsigned char workingbyte) {
  printf("Neuer Wert des Bits %d: %d\n", workonbit,
         !((workingbyte >> workonbit) & 1));
  return setBit(workonbit, workingbyte, !((workingbyte >> workonbit) & 1));
}


x86 assembly (clang, -O0):
<cmd_negateBit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%esi
movzbl -0x5(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edx
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
mov    -0x5(%rbp),%al
movzbl -0x5(%rbp),%edx
mov    -0x4(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    $0x1,%ecx
cmp    $0x0,%ecx
setne  %cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%edx
movzbl %al,%esi
call   1040 <setBit@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_negateBit>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
mov    %esi,%ebx
not    %ebx
mov    %ebp,%ecx
shr    %cl,%ebx
and    $0x1,%ebx
lea    0xec5(%rip),%rdi
mov    %ebp,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
mov    %ebp,%edi
mov    %r14d,%esi
mov    %ebx,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <setBit@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Neuer Wert des Bits %d: %d\0A\00"
define zeroext i8 @cmd_negateBit(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
%8 = load i32, i32* %3
%9 = ashr i32 %7, %8
%10 = and i32 %9, 1
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %13)
%15 = load i32, i32* %3
%16 = load i8, i8* %4
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = load i32, i32* %3
%20 = ashr i32 %18, %19
%21 = and i32 %20, 1
%22 = icmp ne i32 %21, 0
%23 = xor i1 %22, true
%24 = zext i1 %23 to i32
%25 = call zeroext i8 @setBit(i32 %15, i8 zeroext %16, i32 %24)
ret i8 %25
}

LLVM IR (-O2):
@.str = [28 x i8] c"Neuer Wert des Bits %d: %d\0A\00"
define zeroext i8 @cmd_negateBit(i32 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = xor i32 %3, -1
%5 = lshr i32 %4, %0
%6 = and i32 %5, 1
%7 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %6)
%8 = tail call zeroext i8 @setBit(i32 %0, i8 zeroext %1, i32 %6)
ret i8 %8
}
struct internal_ibv_dev *ibv_device_to_internal(struct ibv_device *dev) {
  return (struct internal_ibv_dev *)dev;
}


x86 assembly (clang, -O0):
<ibv_device_to_internal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ibv_device_to_internal>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.internal_ibv_dev = type opaque
%struct.ibv_device = type opaque
define %struct.internal_ibv_dev* @ibv_device_to_internal(%struct.ibv_device* %0) {
%2 = alloca %struct.ibv_device*
store %struct.ibv_device* %0, %struct.ibv_device** %2
%3 = load %struct.ibv_device*, %struct.ibv_device** %2
%4 = bitcast %struct.ibv_device* %3 to %struct.internal_ibv_dev*
ret %struct.internal_ibv_dev* %4
}

LLVM IR (-O2):
%struct.internal_ibv_dev = type opaque
%struct.ibv_device = type opaque
define %struct.internal_ibv_dev* @ibv_device_to_internal(%struct.ibv_device* readnone %0) {
%2 = bitcast %struct.ibv_device* %0 to %struct.internal_ibv_dev*
ret %struct.internal_ibv_dev* %2
}
int xmlUCSIsLinearBSyllabary(int code) {
  return (((code >= 0x10000) && (code <= 0x1007F)));
}


x86 assembly (clang, -O0):
<xmlUCSIsLinearBSyllabary>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x10000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsLinearBSyllabary+0x26>
cmpl   $0x1007f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsLinearBSyllabary>:
and    $0xffffff80,%edi
xor    %eax,%eax
cmp    $0x10000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsLinearBSyllabary(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65536
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 65663
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsLinearBSyllabary(i32 %0) {
%2 = and i32 %0, -128
%3 = icmp eq i32 %2, 65536
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128Timer1P__Timer__start();
void Atm128TimerInitC__0__Timer__start(void) {
  HplAtm128Timer1P__Timer__start();
}


x86 assembly (clang, -O0):
<Atm128TimerInitC__0__Timer__start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128Timer1P__Timer__start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Atm128TimerInitC__0__Timer__start>:
xor    %eax,%eax
jmp    1030 <HplAtm128Timer1P__Timer__start@plt>

LLVM IR (-O0):
define void @Atm128TimerInitC__0__Timer__start() {
%1 = call i32 (...) @HplAtm128Timer1P__Timer__start()
ret void
}

LLVM IR (-O2):
define void @Atm128TimerInitC__0__Timer__start() {
%1 = tail call i32 (...) @HplAtm128Timer1P__Timer__start()
ret void
}
int func(void) {
  int n = 3;
  int m = 5;
  n < m;
  return 0;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func() {
%1 = alloca i32
%2 = alloca i32
store i32 3, i32* %1
store i32 5, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = icmp slt i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 0
}

LLVM IR (-O2):
define i32 @func() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void fisError(char *msg) {
  printf("%s\n", msg);
  exit(1);
}


x86 assembly (clang, -O0):
<fisError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fisError>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @fisError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @fisError(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
long __syscall3(long num, long arg1, long arg2, long arg3) {
  unsigned long result;
  asm volatile("syscall"
               : "=a"(result)
               : "a"(num), "D"(arg1), "S"(arg2), "d"(arg3)
               : "memory", "rcx", "r11");
  return result;
}


x86 assembly (clang, -O0):
<__syscall3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
syscall
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__syscall3>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
syscall
ret

LLVM IR (-O0):
define i64 @__syscall3(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},~{memory},~{rcx},~{r11},~{dirflag},~{fpsr},~{flags}"(i64 %10, i64 %11, i64 %12, i64 %13)
store i64 %14, i64* %9
%15 = load i64, i64* %9
ret i64 %15
}

LLVM IR (-O2):
define i64 @__syscall3(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},~{memory},~{rcx},~{r11},~{dirflag},~{fpsr},~{flags}"(i64 %0, i64 %1, i64 %2, i64 %3)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ drawVRect(int);
int /*<<< orphan*/ glColor3f(int, int, int);
void drawBlackVRect(int pos) {
  glColor3f(0, 0, 0);
  drawVRect(pos);
  glColor3f(1, 1, 1);
}


x86 assembly (clang, -O0):
<drawBlackVRect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edx,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <glColor3f@plt>
mov    -0x4(%rbp),%edi
call   1040 <drawVRect@plt>
mov    $0x1,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <glColor3f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawBlackVRect>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <glColor3f@plt>
mov    %ebx,%edi
call   1040 <drawVRect@plt>
mov    $0x1,%edi
mov    $0x1,%esi
mov    $0x1,%edx
pop    %rbx
jmp    1030 <glColor3f@plt>

LLVM IR (-O0):
define void @drawBlackVRect(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @glColor3f(i32 0, i32 0, i32 0)
%4 = load i32, i32* %2
%5 = call i32 @drawVRect(i32 %4)
%6 = call i32 @glColor3f(i32 1, i32 1, i32 1)
ret void
}

LLVM IR (-O2):
define void @drawBlackVRect(i32 %0) {
%2 = tail call i32 @glColor3f(i32 0, i32 0, i32 0)
%3 = tail call i32 @drawVRect(i32 %0)
%4 = tail call i32 @glColor3f(i32 1, i32 1, i32 1)
ret void
}
void foo486(int p) {}


x86 assembly (clang, -O0):
<foo486>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo486>:
ret

LLVM IR (-O0):
define void @foo486(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo486(i32 %0) {
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, unsigned int, unsigned int, unsigned int);
int main(void) {
  unsigned int num1 = 0xAF;
  unsigned int num2 = num1 & 0x07;
  unsigned int num3 = (num1 >> 4) & 0x07;
  printf("num1:%#x num2:%#x num3:%#x\n", num1, num2, num3);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xaf,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
and    $0x7,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xaf,%esi
mov    $0x7,%edx
mov    $0x2,%ecx
call   1030 <printf@plt>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"num1:%#x num2:%#x num3:%#x\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 175, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, 7
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = lshr i32 %7, 4
%9 = and i32 %8, 7
store i32 %9, i32* %4
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11, i32 %12)
%14 = load i32, i32* @EXIT_SUCCESS
ret i32 %14
}

LLVM IR (-O2):
@.str = [28 x i8] c"num1:%#x num2:%#x num3:%#x\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 175, i32 7, i32 2)
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}