#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
void transfer_RGB888_to_BGR565(unsigned char *(*output), unsigned char *input) {
  uint16_t r, g, b;
  uint16_t r_s, g_s, b_s;
  r = *input++;
  g = *input++;
  b = *input;
  r_s = (r & 0x01) << 7;
  r_s |= (r & 0x02) << 5;
  r_s |= (r & 0x04) << 3;
  r_s |= (r & 0x08) << 1;
  r_s |= (r & 0x10) >> 1;
  r_s |= (r & 0x20) >> 3;
  r_s |= (r & 0x40) >> 5;
  r_s |= (r & 0x80) >> 7;
  g_s = (g & 0x01) << 7;
  g_s |= (g & 0x02) << 5;
  g_s |= (g & 0x04) << 3;
  g_s |= (g & 0x08) << 1;
  g_s |= (g & 0x10) >> 1;
  g_s |= (g & 0x20) >> 3;
  g_s |= (g & 0x40) >> 5;
  g_s |= (g & 0x80) >> 7;
  b_s = (b & 0x01) << 7;
  b_s |= (b & 0x02) << 5;
  b_s |= (b & 0x04) << 3;
  b_s |= (b & 0x08) << 1;
  b_s |= (b & 0x10) >> 1;
  b_s |= (b & 0x20) >> 3;
  b_s |= (b & 0x40) >> 5;
  b_s |= (b & 0x80) >> 7;
  *(uint16_t *)(*output) =
      ((b_s & 0xf8) << 8) + ((g_s & 0xfc) << 3) + ((r_s & 0xf8) >> 3);
  (*output) += 2;
}


x86 assembly (clang, -O0):
<transfer_RGB888_to_BGR565>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%eax
and    $0x1,%eax
shl    $0x7,%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x2,%eax
shl    $0x5,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x4,%eax
shl    $0x3,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x8,%eax
shl    $0x1,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x10,%eax
sar    $0x1,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x20,%eax
sar    $0x3,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x40,%eax
sar    $0x5,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
and    $0x80,%eax
sar    $0x7,%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
and    $0x1,%eax
shl    $0x7,%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x2,%eax
shl    $0x5,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x4,%eax
shl    $0x3,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x8,%eax
shl    $0x1,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x10,%eax
sar    $0x1,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x20,%eax
sar    $0x3,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x40,%eax
sar    $0x5,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
and    $0x80,%eax
sar    $0x7,%eax
or     -0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x1,%eax
shl    $0x7,%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x2,%eax
shl    $0x5,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x4,%eax
shl    $0x3,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x8,%eax
shl    $0x1,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x10,%eax
sar    $0x1,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x20,%eax
sar    $0x3,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x40,%eax
sar    $0x5,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x80,%eax
sar    $0x7,%eax
or     -0x28(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%ecx
and    $0xf8,%ecx
shl    $0x8,%ecx
mov    -0x24(%rbp),%eax
and    $0xfc,%eax
shl    $0x3,%eax
add    %eax,%ecx
mov    -0x20(%rbp),%eax
and    $0xf8,%eax
sar    $0x3,%eax
add    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x2,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<transfer_RGB888_to_BGR565>:
mov    (%rsi),%al
mov    0x1(%rsi),%cl
mov    0x2(%rsi),%dl
rol    $0x4,%al
mov    %eax,%esi
and    $0x33,%sil
shl    $0x2,%sil
shr    $0x2,%al
and    $0x33,%al
or     %sil,%al
mov    %eax,%esi
and    $0x54,%sil
add    %sil,%sil
shr    %al
and    $0x50,%al
or     %sil,%al
rol    $0x4,%cl
mov    %ecx,%esi
and    $0x33,%sil
shl    $0x2,%sil
shr    $0x2,%cl
and    $0x33,%cl
or     %sil,%cl
mov    %ecx,%esi
and    $0x54,%sil
add    %sil,%sil
shr    %cl
and    $0x54,%cl
or     %sil,%cl
rol    $0x4,%dl
mov    %edx,%esi
and    $0x33,%sil
shl    $0x2,%sil
shr    $0x2,%dl
and    $0x33,%dl
or     %sil,%dl
mov    %edx,%esi
and    $0x54,%sil
add    %sil,%sil
shr    %dl
and    $0x50,%dl
or     %sil,%dl
movzbl %dl,%edx
shl    $0x8,%edx
movzbl %cl,%ecx
lea    (%rdx,%rcx,8),%ecx
shr    $0x3,%al
movzbl %al,%eax
or     %ecx,%eax
mov    (%rdi),%rcx
mov    %eax,(%rcx)
add    $0x2,%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define void @transfer_RGB888_to_BGR565(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8** %0, i8*** %3
store i8* %1, i8** %4
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
%13 = load i8, i8* %11
%14 = zext i8 %13 to i32
store i32 %14, i32* %5
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = zext i8 %17 to i32
store i32 %18, i32* %6
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = and i32 %22, 1
%24 = shl i32 %23, 7
store i32 %24, i32* %8
%25 = load i32, i32* %5
%26 = and i32 %25, 2
%27 = shl i32 %26, 5
%28 = load i32, i32* %8
%29 = or i32 %28, %27
store i32 %29, i32* %8
%30 = load i32, i32* %5
%31 = and i32 %30, 4
%32 = shl i32 %31, 3
%33 = load i32, i32* %8
%34 = or i32 %33, %32
store i32 %34, i32* %8
%35 = load i32, i32* %5
%36 = and i32 %35, 8
%37 = shl i32 %36, 1
%38 = load i32, i32* %8
%39 = or i32 %38, %37
store i32 %39, i32* %8
%40 = load i32, i32* %5
%41 = and i32 %40, 16
%42 = ashr i32 %41, 1
%43 = load i32, i32* %8
%44 = or i32 %43, %42
store i32 %44, i32* %8
%45 = load i32, i32* %5
%46 = and i32 %45, 32
%47 = ashr i32 %46, 3
%48 = load i32, i32* %8
%49 = or i32 %48, %47
store i32 %49, i32* %8
%50 = load i32, i32* %5
%51 = and i32 %50, 64
%52 = ashr i32 %51, 5
%53 = load i32, i32* %8
%54 = or i32 %53, %52
store i32 %54, i32* %8
%55 = load i32, i32* %5
%56 = and i32 %55, 128
%57 = ashr i32 %56, 7
%58 = load i32, i32* %8
%59 = or i32 %58, %57
store i32 %59, i32* %8
%60 = load i32, i32* %6
%61 = and i32 %60, 1
%62 = shl i32 %61, 7
store i32 %62, i32* %9
%63 = load i32, i32* %6
%64 = and i32 %63, 2
%65 = shl i32 %64, 5
%66 = load i32, i32* %9
%67 = or i32 %66, %65
store i32 %67, i32* %9
%68 = load i32, i32* %6
%69 = and i32 %68, 4
%70 = shl i32 %69, 3
%71 = load i32, i32* %9
%72 = or i32 %71, %70
store i32 %72, i32* %9
%73 = load i32, i32* %6
%74 = and i32 %73, 8
%75 = shl i32 %74, 1
%76 = load i32, i32* %9
%77 = or i32 %76, %75
store i32 %77, i32* %9
%78 = load i32, i32* %6
%79 = and i32 %78, 16
%80 = ashr i32 %79, 1
%81 = load i32, i32* %9
%82 = or i32 %81, %80
store i32 %82, i32* %9
%83 = load i32, i32* %6
%84 = and i32 %83, 32
%85 = ashr i32 %84, 3
%86 = load i32, i32* %9
%87 = or i32 %86, %85
store i32 %87, i32* %9
%88 = load i32, i32* %6
%89 = and i32 %88, 64
%90 = ashr i32 %89, 5
%91 = load i32, i32* %9
%92 = or i32 %91, %90
store i32 %92, i32* %9
%93 = load i32, i32* %6
%94 = and i32 %93, 128
%95 = ashr i32 %94, 7
%96 = load i32, i32* %9
%97 = or i32 %96, %95
store i32 %97, i32* %9
%98 = load i32, i32* %7
%99 = and i32 %98, 1
%100 = shl i32 %99, 7
store i32 %100, i32* %10
%101 = load i32, i32* %7
%102 = and i32 %101, 2
%103 = shl i32 %102, 5
%104 = load i32, i32* %10
%105 = or i32 %104, %103
store i32 %105, i32* %10
%106 = load i32, i32* %7
%107 = and i32 %106, 4
%108 = shl i32 %107, 3
%109 = load i32, i32* %10
%110 = or i32 %109, %108
store i32 %110, i32* %10
%111 = load i32, i32* %7
%112 = and i32 %111, 8
%113 = shl i32 %112, 1
%114 = load i32, i32* %10
%115 = or i32 %114, %113
store i32 %115, i32* %10
%116 = load i32, i32* %7
%117 = and i32 %116, 16
%118 = ashr i32 %117, 1
%119 = load i32, i32* %10
%120 = or i32 %119, %118
store i32 %120, i32* %10
%121 = load i32, i32* %7
%122 = and i32 %121, 32
%123 = ashr i32 %122, 3
%124 = load i32, i32* %10
%125 = or i32 %124, %123
store i32 %125, i32* %10
%126 = load i32, i32* %7
%127 = and i32 %126, 64
%128 = ashr i32 %127, 5
%129 = load i32, i32* %10
%130 = or i32 %129, %128
store i32 %130, i32* %10
%131 = load i32, i32* %7
%132 = and i32 %131, 128
%133 = ashr i32 %132, 7
%134 = load i32, i32* %10
%135 = or i32 %134, %133
store i32 %135, i32* %10
%136 = load i32, i32* %10
%137 = and i32 %136, 248
%138 = shl i32 %137, 8
%139 = load i32, i32* %9
%140 = and i32 %139, 252
%141 = shl i32 %140, 3
%142 = add nsw i32 %138, %141
%143 = load i32, i32* %8
%144 = and i32 %143, 248
%145 = ashr i32 %144, 3
%146 = add nsw i32 %142, %145
%147 = load i8**, i8*** %3
%148 = load i8*, i8** %147
%149 = bitcast i8* %148 to i32*
store i32 %146, i32* %149
%150 = load i8**, i8*** %3
%151 = load i8*, i8** %150
%152 = getelementptr inbounds i8, i8* %151, i64 2
store i8* %152, i8** %150
ret void
}

LLVM IR (-O2):
define void @transfer_RGB888_to_BGR565(i8** nocapture %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %1, i64 1
%4 = load i8, i8* %1
%5 = getelementptr inbounds i8, i8* %1, i64 2
%6 = load i8, i8* %3
%7 = load i8, i8* %5
%8 = tail call i8 @llvm.bitreverse.i8(i8 %4)
%9 = tail call i8 @llvm.bitreverse.i8(i8 %6)
%10 = tail call i8 @llvm.bitreverse.i8(i8 %7)
%11 = and i8 %10, -8
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = and i8 %9, -4
%15 = zext i8 %14 to i32
%16 = shl nuw nsw i32 %15, 3
%17 = or i32 %13, %16
%18 = lshr i8 %8, 3
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = bitcast i8** %0 to i32**
%22 = load i32*, i32** %21
store i32 %20, i32* %22
%23 = bitcast i32* %22 to i8*
%24 = getelementptr inbounds i8, i8* %23, i64 2
store i8* %24, i8** %0
ret void
}