xunge/DecIR huggingface dataset:
void chcp(char name1[100], char name2[100]) {
  char *f1 = name1, *f2 = name2;
  while (*f2) {
    *f1 = *f2;
    *f1++;
    *f2++;
  }
  *f1 = *f2;
}


x86 assembly (clang, -O0):
<chcp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpb   $0x0,(%rax)
je     1152 <chcp+0x52>
mov    -0x20(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111c <chcp+0x1c>
mov    -0x20(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chcp>:
mov    (%rsi),%al
test   %al,%al
je     1121 <chcp+0x21>
add    $0x1,%rsi
nopw   0x0(%rax,%rax,1)
mov    %al,(%rdi)
add    $0x1,%rdi
movzbl (%rsi),%eax
add    $0x1,%rsi
test   %al,%al
jne    1110 <chcp+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @chcp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
br label %9
9: ; preds = %13, %2
%10 = load i8*, i8** %6
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %23
13: ; preds = %9
%14 = load i8*, i8** %6
%15 = load i8, i8* %14
%16 = load i8*, i8** %5
store i8 %15, i8* %16
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %5
%19 = load i8, i8* %17
%20 = load i8*, i8** %6
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %6
%22 = load i8, i8* %20
br label %9
23: ; preds = %9
%24 = load i8*, i8** %6
%25 = load i8, i8* %24
%26 = load i8*, i8** %5
store i8 %25, i8* %26
ret void
}

LLVM IR (-O2):
define void @chcp(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
store i8 %6, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %9, %5 ]
store i8 0, i8* %14
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *hf_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<hf_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hf_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @hf_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @hf_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ _sysSoftReset();
extern void arch_reset(char mode) { _sysSoftReset(); }


x86 assembly (clang, -O0):
<arch_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <_sysSoftReset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_reset>:
xor    %eax,%eax
jmp    1030 <_sysSoftReset@plt>

LLVM IR (-O0):
define void @arch_reset(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 (...) @_sysSoftReset()
ret void
}

LLVM IR (-O2):
define void @arch_reset(i8 signext %0) {
%2 = tail call i32 (...) @_sysSoftReset()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void abc(void) { printf("        func1-abc\n"); }


x86 assembly (clang, -O0):
<abc>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<abc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c" func1-abc\0A\00"
define void @abc() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c" func1-abc\00"
define void @abc() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret void
}
int main() {
  short one = 1;
  char *cp = (char *)&one;
  if (*cp == 0)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movw   $0x1,-0x6(%rbp)
lea    -0x6(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1135 <main+0x35>
movl   $0x1,-0x4(%rbp)
jmp    113c <main+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
%3 = alloca i8*
store i32 0, i32* %1
store i16 1, i16* %2
%4 = bitcast i16* %2 to i8*
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 1, i32* %1
br label %11
10: ; preds = %0
store i32 0, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
double *vector(nl, nh)
int nl, nh;
{
  double *v;
  v = (double *)malloc((unsigned)(nh - nl + 1) * sizeof(double));
  if (!v)
    nrerror("Allocation failure in vector().\n");
  return (v - nl);
}


x86 assembly (clang, -O0):
<vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
mov    %eax,%edi
shl    $0x3,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1161 <vector+0x41>
lea    0xea6(%rip),%rdi
mov    $0x0,%al
call   1030 <nrerror@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
sub    %edi,%esi
lea    0x1(%rsi),%edi
shl    $0x3,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1149 <vector+0x29>
lea    0xebe(%rip),%rdi
xor    %eax,%eax
call   1030 <nrerror@plt>
movslq %ebp,%rax
shl    $0x3,%rax
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [33 x i8] c"Allocation failure in vector().\0A\00"
define double* @vector(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = zext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = call i8* @malloc(i64 %11)
%13 = bitcast i8* %12 to double*
store double* %13, double** %5
%14 = load double*, double** %5
%15 = icmp ne double* %14, null
br i1 %15, label %18, label %16
16: ; preds = %2
%17 = call i32 (i8*, ...) bitcast (i32 (...)* @nrerror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %18
18: ; preds = %16, %2
%19 = load double*, double** %5
%20 = load i32, i32* %3
%21 = sext i32 %20 to i64
%22 = sub i64 0, %21
%23 = getelementptr inbounds double, double* %19, i64 %22
ret double* %23
}

LLVM IR (-O2):
@.str = [33 x i8] c"Allocation failure in vector().\0A\00"
define double* @vector(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = zext i32 %4 to i64
%6 = shl nuw nsw i64 %5, 3
%7 = tail call i8* @malloc(i64 %6)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = tail call i32 (i8*, ...) bitcast (i32 (...)* @nrerror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = bitcast i8* %7 to double*
%13 = sext i32 %0 to i64
%14 = sub nsw i64 0, %13
%15 = getelementptr inbounds double, double* %12, i64 %14
ret double* %15
}
void no_return() {}


x86 assembly (clang, -O0):
<no_return>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_return>:
ret

LLVM IR (-O0):
define void @no_return() {
ret void
}

LLVM IR (-O2):
define void @no_return() {
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR91_set(void) { return U_WMRCORENONE_set("U_WMR91"); }


x86 assembly (clang, -O0):
<U_WMR91_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR91_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR91\00"
define i8* @U_WMR91_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR91\00"
define i8* @U_WMR91_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
adr0reg1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((*((signed char *)10000000)) <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adr0reg1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0x989680,%eax
movsbl (%rax),%eax
movsbl -0x6(%rbp),%ecx
cmp    %ecx,%eax
jg     113e <adr0reg1+0x3e>
movl   $0x1,-0x4(%rbp)
jmp    1145 <adr0reg1+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0reg1>:
movsbl 0x989680,%ecx
movsbl %sil,%edx
xor    %eax,%eax
cmp    %ecx,%edx
setge  %al
ret

LLVM IR (-O0):
define i32 @adr0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8, i8* inttoptr (i64 10000000 to i8*)
%17 = sext i8 %16 to i32
%18 = load i8, i8* %9
%19 = sext i8 %18 to i32
%20 = icmp sle i32 %17, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @adr0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = load i8, i8* inttoptr (i64 10000000 to i8*)
%8 = sext i8 %7 to i32
%9 = shl i32 %1, 24
%10 = ashr exact i32 %9, 24
%11 = icmp sge i32 %10, %8
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ demo_art(char *, char *, int);
int find_int_arg(int, char **, char *, int /*<<< orphan*/);
void run_art(int argc, char **argv) {
  int cam_index = find_int_arg(argc, argv, "-c", 0);
  char *cfg = argv[2];
  char *weights = argv[3];
  demo_art(cfg, weights, cam_index);
}


x86 assembly (clang, -O0):
<run_art>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    0xec3(%rip),%rdx
xor    %ecx,%ecx
call   1040 <find_int_arg@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <demo_art@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_art>:
push   %rbx
mov    %rsi,%rbx
lea    0xed5(%rip),%rdx
xor    %ecx,%ecx
call   1040 <find_int_arg@plt>
mov    0x10(%rbx),%rdi
mov    0x18(%rbx),%rsi
mov    %eax,%edx
pop    %rbx
jmp    1030 <demo_art@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"-c\00"
define void @run_art(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%8 = load i32, i32* %3
%9 = load i8**, i8*** %4
%10 = call i32 @find_int_arg(i32 %8, i8** %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
store i32 %10, i32* %5
%11 = load i8**, i8*** %4
%12 = getelementptr inbounds i8*, i8** %11, i64 2
%13 = load i8*, i8** %12
store i8* %13, i8** %6
%14 = load i8**, i8*** %4
%15 = getelementptr inbounds i8*, i8** %14, i64 3
%16 = load i8*, i8** %15
store i8* %16, i8** %7
%17 = load i8*, i8** %6
%18 = load i8*, i8** %7
%19 = load i32, i32* %5
%20 = call i32 @demo_art(i8* %17, i8* %18, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"-c\00"
define void @run_art(i32 %0, i8** %1) {
%3 = tail call i32 @find_int_arg(i32 %0, i8** %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
%4 = getelementptr inbounds i8*, i8** %1, i64 2
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8*, i8** %1, i64 3
%7 = load i8*, i8** %6
%8 = tail call i32 @demo_art(i8* %5, i8* %7, i32 %3)
ret void
}
int intCmp(const void *i1, const void *i2) {
  return (*((int *)i1) - *((int *)i2));
}


x86 assembly (clang, -O0):
<intCmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intCmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intCmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @intCmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fu_Fnwrite(int /*<<< orphan*/ *, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
int fu_Fwrite(FILE *stream, const char *buffer) {
  return fu_Fnwrite(stream, buffer, strlen(buffer));
}


x86 assembly (clang, -O0):
<fu_Fwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <fu_Fnwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fu_Fwrite>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fu_Fnwrite@plt>

LLVM IR (-O0):
define i32 @fu_Fwrite(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @fu_Fnwrite(i32* %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @fu_Fwrite(i32* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @fu_Fnwrite(i32* %0, i8* %1, i32 %3)
ret i32 %4
}
int main() {
  int arg1 = 40;
  int arg2 = 2;
  int quot = 0;
  __asm__("idivl %%ebx, %%eax;" : "=a"(quot) : "a"(arg1), "d"(0), "b"(arg2));
  return quot;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
movl   $0x0,-0xc(%rbp)
movl   $0x28,-0x10(%rbp)
movl   $0x2,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x14(%rbp),%ebx
xor    %edx,%edx
idiv   %ebx
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x28,%eax
xor    %edx,%edx
mov    $0x2,%ebx
idiv   %ebx
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 40, i32* %2
store i32 2, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 asm "idivl %ebx, %eax;", "={ax},{ax},{dx},{bx},~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 0, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 asm "idivl %ebx, %eax;", "={ax},{ax},{dx},{bx},~{dirflag},~{fpsr},~{flags}"(i32 40, i32 0, i32 2)
ret i32 %1
}
/* Variables and functions */
int *anIntPlease();
int /*<<< orphan*/ assert(int);
int t4() {
  int x, y, z;
  int *a = anIntPlease();
  x = y;
  *a = 3;
  assert(x == y);
  assert(a == &z);
  return 0;
}


x86 assembly (clang, -O0):
<t4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1030 <anIntPlease@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x3,(%rax)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
lea    -0xc(%rbp),%rax
cmp    %rax,-0x18(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t4>:
push   %rax
xor    %eax,%eax
call   1030 <anIntPlease@plt>
movl   $0x3,(%rax)
xor    %edi,%edi
call   1040 <assert@plt>
xor    %edi,%edi
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @t4() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = call i32* (...) @anIntPlease()
store i32* %5, i32** %4
%6 = load i32, i32* %2
store i32 %6, i32* %1
%7 = load i32*, i32** %4
store i32 3, i32* %7
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = icmp eq i32 %8, %9
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32*, i32** %4
%14 = icmp eq i32* %13, %3
%15 = zext i1 %14 to i32
%16 = call i32 @assert(i32 %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @t4() {
%1 = tail call i32* (...) @anIntPlease()
store i32 3, i32* %1
%2 = tail call i32 @assert(i32 0)
%3 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ set_spreg_cell(int);
void init_stack() { set_spreg_cell(4096 - 1); }


x86 assembly (clang, -O0):
<init_stack>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfff,%edi
call   1030 <set_spreg_cell@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_stack>:
mov    $0xfff,%edi
jmp    1030 <set_spreg_cell@plt>

LLVM IR (-O0):
define void @init_stack() {
%1 = call i32 @set_spreg_cell(i32 4095)
ret void
}

LLVM IR (-O2):
define void @init_stack() {
%1 = tail call i32 @set_spreg_cell(i32 4095)
ret void
}
void ff_hevc_put_hevc_uni_w_qpel_hv8_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_hv8_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_hv8_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_hv8_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_hv8_8_sse4() {
ret void
}
void gtk_rc_get_style() {}


x86 assembly (clang, -O0):
<gtk_rc_get_style>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_rc_get_style>:
ret

LLVM IR (-O0):
define void @gtk_rc_get_style() {
ret void
}

LLVM IR (-O2):
define void @gtk_rc_get_style() {
ret void
}
long int fib2(int n) {
  if ((n == 1) || (n == 2)) {
    return 1;
  }
  long int fna = 1;
  long int fnb = 1;
  long int fnc;
  n--;
  while (n > 1) {
    fnc = fnb + fna;
    fna = fnb;
    fnb = fnc;
    n--;
  }
  return fnc;
}


x86 assembly (clang, -O0):
<fib2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     111b <fib2+0x1b>
cmpl   $0x2,-0xc(%rbp)
jne    1128 <fib2+0x28>
movq   $0x1,-0x8(%rbp)
jmp    117d <fib2+0x7d>
movq   $0x1,-0x18(%rbp)
movq   $0x1,-0x20(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    1175 <fib2+0x75>
mov    -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1141 <fib2+0x41>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib2>:
lea    -0x1(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x2,%ecx
jb     1134 <fib2+0x34>
cmp    $0x3,%edi
jl     1134 <fib2+0x34>
add    $0x1,%edi
mov    $0x1,%eax
mov    $0x1,%ecx
nop
mov    %rax,%rdx
mov    %rcx,%rax
add    %rdx,%rax
add    $0xffffffff,%edi
mov    %rdx,%rcx
cmp    $0x3,%edi
ja     1120 <fib2+0x20>
ret

LLVM IR (-O0):
define i64 @fib2(i32 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 2
br i1 %11, label %12, label %13
12: ; preds = %9, %1
store i64 1, i64* %2
br label %29
13: ; preds = %9
store i64 1, i64* %4
store i64 1, i64* %5
%14 = load i32, i32* %3
%15 = add nsw i32 %14, -1
store i32 %15, i32* %3
br label %16
16: ; preds = %19, %13
%17 = load i32, i32* %3
%18 = icmp sgt i32 %17, 1
br i1 %18, label %19, label %27
19: ; preds = %16
%20 = load i64, i64* %5
%21 = load i64, i64* %4
%22 = add nsw i64 %20, %21
store i64 %22, i64* %6
%23 = load i64, i64* %5
store i64 %23, i64* %4
%24 = load i64, i64* %6
store i64 %24, i64* %5
%25 = load i32, i32* %3
%26 = add nsw i32 %25, -1
store i32 %26, i32* %3
br label %16
27: ; preds = %16
%28 = load i64, i64* %6
store i64 %28, i64* %2
br label %29
29: ; preds = %27, %12
%30 = load i64, i64* %2
ret i64 %30
}

LLVM IR (-O2):
define i64 @fib2(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 2
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = icmp sgt i32 %0, 2
br i1 %5, label %6, label %13
6: ; preds = %4, %6
%7 = phi i64 [ %11, %6 ], [ 1, %4 ]
%8 = phi i64 [ %7, %6 ], [ 1, %4 ]
%9 = phi i32 [ %10, %6 ], [ %0, %4 ]
%10 = add nsw i32 %9, -1
%11 = add nsw i64 %7, %8
%12 = icmp ugt i32 %9, 3
br i1 %12, label %6, label %13
13: ; preds = %6, %4, %1
%14 = phi i64 [ 1, %1 ], [ undef, %4 ], [ %11, %6 ]
ret i64 %14
}
int sched_affinity_check(struct affinity *a, int mask) { return 1; }


x86 assembly (clang, -O0):
<sched_affinity_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_affinity_check>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.affinity = type opaque
define i32 @sched_affinity_check(%struct.affinity* %0, i32 %1) {
%3 = alloca %struct.affinity*
%4 = alloca i32
store %struct.affinity* %0, %struct.affinity** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
%struct.affinity = type opaque
define i32 @sched_affinity_check(%struct.affinity* nocapture readnone %0, i32 %1) {
ret i32 1
}
void sigpipe_handler(int sig) {}


x86 assembly (clang, -O0):
<sigpipe_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigpipe_handler>:
ret

LLVM IR (-O0):
define void @sigpipe_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sigpipe_handler(i32 %0) {
ret void
}
/* Type definitions */
struct battle_char {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_status(struct battle_char *, int);
scalar_t__ get_random(int /*<<< orphan*/, int);
scalar_t__ mod6(struct battle_char *, struct battle_char *, int);
void silence_song(struct battle_char *origin, struct battle_char *target) {
  if (get_random(0, 100) < mod6(origin, target, 180)) {
    add_status(target, 12);
  }
}


x86 assembly (clang, -O0):
<silence_song>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xb4,%edx
call   1040 <mod6@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jge    1180 <silence_song+0x50>
mov    -0x10(%rbp),%rdi
mov    $0xc,%esi
call   1050 <add_status@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<silence_song>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    $0xb4,%edx
call   1040 <mod6@plt>
cmp    %rax,%rbx
jge    1171 <silence_song+0x41>
mov    %r14,%rdi
mov    $0xc,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <add_status@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.battle_char = type { i32 }
define void @silence_song(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = alloca %struct.battle_char*
%4 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %3
store %struct.battle_char* %1, %struct.battle_char** %4
%5 = call i64 @get_random(i32 0, i32 100)
%6 = load %struct.battle_char*, %struct.battle_char** %3
%7 = load %struct.battle_char*, %struct.battle_char** %4
%8 = call i64 @mod6(%struct.battle_char* %6, %struct.battle_char* %7, i32 180)
%9 = icmp slt i64 %5, %8
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load %struct.battle_char*, %struct.battle_char** %4
%12 = call i32 @add_status(%struct.battle_char* %11, i32 12)
br label %13
13: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.battle_char = type { i32 }
define void @silence_song(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = tail call i64 @get_random(i32 0, i32 100)
%4 = tail call i64 @mod6(%struct.battle_char* %0, %struct.battle_char* %1, i32 180)
%5 = icmp slt i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @add_status(%struct.battle_char* %1, i32 12)
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void clear_row() {
  printf("%c[2K", 27);
  printf("\r");
}


x86 assembly (clang, -O0):
<clear_row>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1b,%esi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_row>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x1b,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0xd,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%c[2K\00"
@.str.1 = [2 x i8] c"\0D\00"
define void @clear_row() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 27)
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%c[2K\00"
define void @clear_row() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 27)
%2 = tail call i32 @putchar(i32 13)
ret void
}
/* Variables and functions */
int ___get_netmask(int);
int ___ip_switch(int);
int zget_ip_max(int ip, int masklen) {
  int nip = ___ip_switch(ip);
  int mask = ___get_netmask(masklen);
  return ___ip_switch((nip | (~mask)) - 1);
}


x86 assembly (clang, -O0):
<zget_ip_max>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <___ip_switch@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <___get_netmask@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
or     %eax,%edi
sub    $0x1,%edi
call   1030 <___ip_switch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zget_ip_max>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <___ip_switch@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <___get_netmask@plt>
not    %eax
or     %eax,%ebp
add    $0xffffffff,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <___ip_switch@plt>

LLVM IR (-O0):
define i32 @zget_ip_max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = call i32 @___ip_switch(i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = call i32 @___get_netmask(i32 %9)
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = xor i32 %12, -1
%14 = or i32 %11, %13
%15 = sub nsw i32 %14, 1
%16 = call i32 @___ip_switch(i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @zget_ip_max(i32 %0, i32 %1) {
%3 = tail call i32 @___ip_switch(i32 %0)
%4 = tail call i32 @___get_netmask(i32 %1)
%5 = xor i32 %4, -1
%6 = or i32 %3, %5
%7 = add nsw i32 %6, -1
%8 = tail call i32 @___ip_switch(i32 %7)
ret i32 %8
}
int checkWaterSensor() {
  int waterSensorStatus = 0;
  return waterSensorStatus;
}


x86 assembly (clang, -O0):
<checkWaterSensor>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkWaterSensor>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @checkWaterSensor() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @checkWaterSensor() {
ret i32 0
}
/* Variables and functions */
int snprintf(char *, size_t, char *);
int any_snprint(char *str, size_t size, void *priv) {
  return snprintf(str, size, " ");
}


x86 assembly (clang, -O0):
<any_snprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xecd(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<any_snprint>:
lea    0xee9(%rip),%rdx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define i32 @any_snprint(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i32 @snprintf(i8* %7, i64 %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 %9
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
define i32 @any_snprint(i8* nocapture writeonly %0, i64 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @snprintf(i8* %0, i64 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}
int t4_ocqp_supported(void) { return 1; }


x86 assembly (clang, -O0):
<t4_ocqp_supported>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t4_ocqp_supported>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @t4_ocqp_supported() {
ret i32 1
}

LLVM IR (-O2):
define i32 @t4_ocqp_supported() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ iscntrl(int);
void t_iscntrl_0x0a() {
  Assert_real((iscntrl(10)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              55, ("iscntrl should be 1 for 0x0a"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x0a>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <iscntrl@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x37,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x0a>:
push   %rax
mov    $0xa,%edi
call   1030 <iscntrl@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x37,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x0a\00"
define void @t_iscntrl_0x0a() {
%1 = call i32 @iscntrl(i32 10)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 55, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x0a\00"
define void @t_iscntrl_0x0a() {
%1 = tail call i32 @iscntrl(i32 10)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 55, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int randint(maxval)
int maxval;
{
  register long randval;
  randval = rnd();
  return ((int)(randval % maxval) + 1);
}


x86 assembly (clang, -O0):
<randint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rnd@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
cqto
idiv   %rcx
mov    %edx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randint>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rnd@plt>
movslq %eax,%rcx
movslq %ebx,%rsi
mov    %rcx,%rdx
or     %rsi,%rdx
shr    $0x20,%rdx
je     1139 <randint+0x29>
mov    %rcx,%rax
cqto
idiv   %rsi
mov    %rdx,%rax
jmp    113f <randint+0x2f>
xor    %edx,%edx
div    %ebx
mov    %edx,%eax
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randint(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = call i32 (...) @rnd()
%5 = sext i32 %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = srem i64 %6, %8
%10 = trunc i64 %9 to i32
%11 = add nsw i32 %10, 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @randint(i32 %0) {
%2 = tail call i32 (...) @rnd()
%3 = sext i32 %2 to i64
%4 = sext i32 %0 to i64
%5 = srem i64 %3, %4
%6 = trunc i64 %5 to i32
%7 = add nsw i32 %6, 1
ret i32 %7
}
/* Type definitions */
struct virtual_item {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ reiserfs_warning(char *);
int errcatch_part_size(struct virtual_item *vi, int first, int count) {
  reiserfs_warning("green-16009: Invalid item type observed, run fsck ASAP\n");
  return 0;
}


x86 assembly (clang, -O0):
<errcatch_part_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
lea    0xed7(%rip),%rdi
call   1030 <reiserfs_warning@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errcatch_part_size>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <reiserfs_warning@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.virtual_item = type { i32 }
@.str = [56 x i8] c"green-16009: Invalid item type observed, run fsck ASAP\0A\00"
define i32 @errcatch_part_size(%struct.virtual_item* %0, i32 %1, i32 %2) {
%4 = alloca %struct.virtual_item*
%5 = alloca i32
%6 = alloca i32
store %struct.virtual_item* %0, %struct.virtual_item** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @reiserfs_warning(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.virtual_item = type { i32 }
@.str = [56 x i8] c"green-16009: Invalid item type observed, run fsck ASAP\0A\00"
define i32 @errcatch_part_size(%struct.virtual_item* nocapture readnone %0, i32 %1, i32 %2) {
%4 = tail call i32 @reiserfs_warning(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int getpid();
int MFprocId() { return (getpid()); }


x86 assembly (clang, -O0):
<MFprocId>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFprocId>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i32 @MFprocId() {
%1 = call i32 (...) @getpid()
ret i32 %1
}

LLVM IR (-O2):
define i32 @MFprocId() {
%1 = tail call i32 (...) @getpid()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_wfd_cfg_intent_usage(void) {
  printf("Usage : wfd_cfg_intent [IntentValue]\n");
  printf("If IntentValue parameter is provided, 'set' is performed otherwise "
         "'get' is performed.\n");
  return;
}


x86 assembly (clang, -O0):
<print_wfd_cfg_intent_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeff(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_wfd_cfg_intent_usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf01(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"Usage : wfd_cfg_intent [IntentValue]\0A\00"
@.str.1 = [88 x i8] c"If IntentValue parameter is provided, 'set' is performed otherwise 'get' is performed.\0A\00"
define void @print_wfd_cfg_intent_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [37 x i8] c"Usage : wfd_cfg_intent [IntentValue]\00"
@str.2 = [87 x i8] c"If IntentValue parameter is provided, 'set' is performed otherwise 'get' is performed.\00"
define void @print_wfd_cfg_intent_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([87 x i8], [87 x i8]* @str.2, i64 0, i64 0))
ret void
}
int int_compare(void *n1, void *n2) {
  if (*(int *)n1 == *(int *)n2)
    return 0;
  else if (*(int *)n1 < *(int *)n2)
    return -1;
  else
    return 1;
}


x86 assembly (clang, -O0):
<int_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jne    112a <int_compare+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    114f <int_compare+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jge    1148 <int_compare+0x48>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <int_compare+0x4f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_compare>:
mov    (%rdi),%eax
xor    %ecx,%ecx
xor    %edx,%edx
cmp    (%rsi),%eax
setge  %dl
lea    -0x1(%rdx,%rdx,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @int_compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = icmp eq i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %24
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = bitcast i8* %15 to i32*
%17 = load i32, i32* %16
%18 = load i8*, i8** %5
%19 = bitcast i8* %18 to i32*
%20 = load i32, i32* %19
%21 = icmp slt i32 %17, %20
br i1 %21, label %22, label %23
22: ; preds = %14
store i32 -1, i32* %3
br label %24
23: ; preds = %14
store i32 1, i32* %3
br label %24
24: ; preds = %23, %22, %13
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @int_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp eq i32 %4, %6
%8 = icmp slt i32 %4, %6
%9 = select i1 %8, i32 -1, i32 1
%10 = select i1 %7, i32 0, i32 %9
ret i32 %10
}
void XRegisterIMInstantiateCallback() {}


x86 assembly (clang, -O0):
<XRegisterIMInstantiateCallback>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XRegisterIMInstantiateCallback>:
ret

LLVM IR (-O0):
define void @XRegisterIMInstantiateCallback() {
ret void
}

LLVM IR (-O2):
define void @XRegisterIMInstantiateCallback() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int fun(char s[]) {
  int i = 1;
  char *c = &i;
  if (*c) {
    printf("Little\n");
  } else
    printf("Big End\n");
  printf("Im in Fun\n");
  printf("%s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <fun+0x3b>
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1159 <fun+0x49>
lea    0xeb6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xeb1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xeaa(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee0(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Little\0A\00"
@.str.1 = [9 x i8] c"Big End\0A\00"
@.str.2 = [11 x i8] c"Im in Fun\0A\00"
@.str.3 = [4 x i8] c"%s\0A\00"
define i32 @fun(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 1, i32* %3
%5 = bitcast i32* %3 to i8*
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %13
11: ; preds = %1
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %9
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%15 = load i8*, i8** %2
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8* %15)
ret i32 0
}

LLVM IR (-O2):
@str = [7 x i8] c"Little\00"
@str.4 = [10 x i8] c"Im in Fun\00"
define i32 @fun(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str.4, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret i32 0
}
void clock_t_to_jiffies(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<clock_t_to_jiffies>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_t_to_jiffies>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.clock_t_to_jiffies = [19 x i8] c"clock_t_to_jiffies\00"
define void @clock_t_to_jiffies() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @__func__.clock_t_to_jiffies, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.clock_t_to_jiffies = [19 x i8] c"clock_t_to_jiffies\00"
define void @clock_t_to_jiffies() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @__func__.clock_t_to_jiffies, i64 0, i64 0))
ret void
}
/* Variables and functions */
int usleep(unsigned int);
int hdr_usleep(unsigned int useconds) { return usleep(useconds); }


x86 assembly (clang, -O0):
<hdr_usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdr_usleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define i32 @hdr_usleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @hdr_usleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret i32 %2
}
/* Variables and functions */
unsigned int f08(unsigned int);
unsigned int f09(unsigned int a) { return f08(f08(a)); }


x86 assembly (clang, -O0):
<f09>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f08@plt>
mov    %eax,%edi
call   1030 <f08@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f09>:
push   %rax
call   1030 <f08@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <f08@plt>

LLVM IR (-O0):
define i32 @f09(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f08(i32 %3)
%5 = call i32 @f08(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @f09(i32 %0) {
%2 = tail call i32 @f08(i32 %0)
%3 = tail call i32 @f08(i32 %2)
ret i32 %3
}
/* Type definitions */
struct cli_assembler_decompile_result {
  int dummy;
};
struct cli_assembler {
  int dummy;
};

/* Variables and functions */
int cli_assembler_implementation_decompile(
    struct cli_assembler *, char const *, size_t,
    struct cli_assembler_decompile_result *);
int cli_assembler_decompile(struct cli_assembler *assembler,
                            const char *bytecode, size_t bytecode_size,
                            struct cli_assembler_decompile_result *result) {
  return cli_assembler_implementation_decompile(assembler, bytecode,
                                                bytecode_size, result);
}


x86 assembly (clang, -O0):
<cli_assembler_decompile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <cli_assembler_implementation_decompile@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_assembler_decompile>:
jmp    1030 <cli_assembler_implementation_decompile@plt>

LLVM IR (-O0):
%struct.cli_assembler = type { i32 }
%struct.cli_assembler_decompile_result = type { i32 }
define i32 @cli_assembler_decompile(%struct.cli_assembler* %0, i8* %1, i64 %2, %struct.cli_assembler_decompile_result* %3) {
%5 = alloca %struct.cli_assembler*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca %struct.cli_assembler_decompile_result*
store %struct.cli_assembler* %0, %struct.cli_assembler** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store %struct.cli_assembler_decompile_result* %3, %struct.cli_assembler_decompile_result** %8
%9 = load %struct.cli_assembler*, %struct.cli_assembler** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load %struct.cli_assembler_decompile_result*, %struct.cli_assembler_decompile_result** %8
%13 = call i32 @cli_assembler_implementation_decompile(%struct.cli_assembler* %9, i8* %10, i64 %11, %struct.cli_assembler_decompile_result* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.cli_assembler = type { i32 }
%struct.cli_assembler_decompile_result = type { i32 }
define i32 @cli_assembler_decompile(%struct.cli_assembler* %0, i8* %1, i64 %2, %struct.cli_assembler_decompile_result* %3) {
%5 = tail call i32 @cli_assembler_implementation_decompile(%struct.cli_assembler* %0, i8* %1, i64 %2, %struct.cli_assembler_decompile_result* %3)
ret i32 %5
}
unsigned long _ulong(unsigned long x) { return x; }


x86 assembly (clang, -O0):
<_ulong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ulong>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @_ulong(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @_ulong(i64 returned %0) {
ret i64 %0
}