xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ lt_fatal(char *, int, char *);
scalar_t__ malloc(size_t);
void *xmalloc(size_t num) {
  void *p = (void *)malloc(num);
  if (!p)
    lt_fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
             "2022-01-22/02-19-57/repos/ikdekker/stage/refs/heads/master/lib/"
             "cpputest-3.8/.libs/lt-CppUTestExtTests.c",
             314, "memory exhausted");
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115c <xmalloc+0x3c>
lea    0xeb5(%rip),%rdi
mov    $0x13a,%esi
lea    0xf51(%rip),%rdx
call   1030 <lt_fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1146 <xmalloc+0x26>
lea    0xecb(%rip),%rdi
lea    0xf6c(%rip),%rdx
mov    $0x13a,%esi
call   1030 <lt_fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/ikdekker/stage/refs/heads/master/lib/cpputest-3.8/.libs/lt-CppUTestExtTests.c\00"
@.str.1 = [17 x i8] c"memory exhausted\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @malloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = call i32 @lt_fatal(i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 314, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/ikdekker/stage/refs/heads/master/lib/cpputest-3.8/.libs/lt-CppUTestExtTests.c\00"
@.str.1 = [17 x i8] c"memory exhausted\00"
define i8* @xmalloc(i64 %0) {
%2 = tail call i64 @malloc(i64 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @lt_fatal(i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 314, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = inttoptr i64 %2 to i8*
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int main() {
  int x = 12;
  float y = 1.07;
  float z = 1.0;
  printf("x = [%d]\n", x);
  printf("y = [%4.4f]\n", y);
  printf("z = [%4.4f]\n", z);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xc,-0x8(%rbp)
movss  0xed6(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  0xec5(%rip),%xmm0
movss  %xmm0,-0x10(%rbp)
cvtsi2ssl -0x8(%rbp),%xmm0
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
movss  -0xc(%rbp),%xmm0
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
movss  -0x10(%rbp),%xmm0
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef4(%rip),%rdi
movss  0xee0(%rip),%xmm0
call   1030 <printf@plt>
lea    0xeea(%rip),%rdi
movss  0xed0(%rip),%xmm0
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
movss  0xec0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"x = [%d]\0A\00"
@.str.1 = [13 x i8] c"y = [%4.4f]\0A\00"
@.str.2 = [13 x i8] c"z = [%4.4f]\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca float
%4 = alloca float
store i32 0, i32* %1
store i32 12, i32* %2
store float 0x3FF11EB860000000, float* %3
store float 1.000000e+00, float* %4
%5 = load i32, i32* %2
%6 = sitofp i32 %5 to float
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), float %6)
%8 = load float, float* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), float %8)
%10 = load float, float* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0), float %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"x = [%d]\0A\00"
@.str.1 = [13 x i8] c"y = [%4.4f]\0A\00"
@.str.2 = [13 x i8] c"z = [%4.4f]\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), float 1.200000e+01)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), float 0x3FF11EB860000000)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0), float 1.000000e+00)
ret i32 0
}
__typeof__(tolower((void *)1)) test_tolower_75(void) {
  return tolower((void *)1);
}


x86 assembly (clang, -O0):
<test_tolower_75>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
mov    %eax,%edi
call   1030 <tolower@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_tolower_75>:
mov    $0x1,%edi
jmp    1030 <tolower@plt>

LLVM IR (-O0):
define i32 @test_tolower_75() {
%1 = call i32 @tolower(i32 ptrtoint (i8* inttoptr (i64 1 to i8*) to i32))
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_tolower_75() {
%1 = tail call i32 @tolower(i32 1)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ CODEBLOCK_MODE_STRINGS;

/* Variables and functions */
int /*<<< orphan*/ print_enum(char *, char const **, int);
void print_codeblock_mode() {
  static const char *CODEBLOCK_MODE_STRINGS[] = {
      "Single quantizer",
      "Multiple quantizers ",
  };
  print_enum(
      "codeblock_mode", CODEBLOCK_MODE_STRINGS,
      (sizeof(CODEBLOCK_MODE_STRINGS) / sizeof((CODEBLOCK_MODE_STRINGS)[0])));
}


x86 assembly (clang, -O0):
<print_codeblock_mode>:
push   %rbp
mov    %rsp,%rbp
lea    0xf0b(%rip),%rdi
lea    0x2f0e(%rip),%rsi
mov    $0x2,%edx
call   1030 <print_enum@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_codeblock_mode>:
lea    0xf0f(%rip),%rdi
lea    0x2f12(%rip),%rsi
mov    $0x2,%edx
jmp    1030 <print_enum@plt>

LLVM IR (-O0):
@print_codeblock_mode.CODEBLOCK_MODE_STRINGS = internal global [2 x i8*] [i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i32 0, i32 0)]
@.str = [17 x i8] c"Single quantizer\00"
@.str.1 = [21 x i8] c"Multiple quantizers \00"
@.str.2 = [15 x i8] c"codeblock_mode\00"
define void @print_codeblock_mode() {
%1 = call i32 @print_enum(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @print_codeblock_mode.CODEBLOCK_MODE_STRINGS, i64 0, i64 0), i32 2)
ret void
}

LLVM IR (-O2):
@print_codeblock_mode.CODEBLOCK_MODE_STRINGS = internal global [2 x i8*] [i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i32 0, i32 0)]
@.str = [17 x i8] c"Single quantizer\00"
@.str.1 = [21 x i8] c"Multiple quantizers \00"
@.str.2 = [15 x i8] c"codeblock_mode\00"
define void @print_codeblock_mode() {
%1 = tail call i32 @print_enum(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @print_codeblock_mode.CODEBLOCK_MODE_STRINGS, i64 0, i64 0), i32 2)
ret void
}
void view_saveValuesToFile(void) {}


x86 assembly (clang, -O0):
<view_saveValuesToFile>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<view_saveValuesToFile>:
ret

LLVM IR (-O0):
define void @view_saveValuesToFile() {
ret void
}

LLVM IR (-O2):
define void @view_saveValuesToFile() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_REQ_INFO;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_REQ_INFO_it;
int i2d_X509_REQ_INFO(X509_REQ_INFO *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &X509_REQ_INFO_it);
}


x86 assembly (clang, -O0):
<i2d_X509_REQ_INFO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb9(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_X509_REQ_INFO>:
mov    0x2ed1(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@X509_REQ_INFO_it = global i32 0
define i32 @i2d_X509_REQ_INFO(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @X509_REQ_INFO_it)
ret i32 %7
}

LLVM IR (-O2):
@X509_REQ_INFO_it = global i32 0
define i32 @i2d_X509_REQ_INFO(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @X509_REQ_INFO_it)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ glutWireTetrahedron();
void drawWireTetrahedron(void) { glutWireTetrahedron(); }


x86 assembly (clang, -O0):
<drawWireTetrahedron>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glutWireTetrahedron@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawWireTetrahedron>:
xor    %eax,%eax
jmp    1030 <glutWireTetrahedron@plt>

LLVM IR (-O0):
define void @drawWireTetrahedron() {
%1 = call i32 (...) @glutWireTetrahedron()
ret void
}

LLVM IR (-O2):
define void @drawWireTetrahedron() {
%1 = tail call i32 (...) @glutWireTetrahedron()
ret void
}
adr0adrreg1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if ((*((double *)10000000)) <= (p1[1111111 / 4]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adr0adrreg1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    $0x989680,%eax
movsd  (%rax),%xmm1
mov    -0x30(%rbp),%rax
movsd  0x21e888(%rax),%xmm0
ucomisd %xmm1,%xmm0
jb     1147 <adr0adrreg1+0x47>
movl   $0x1,-0x4(%rbp)
jmp    114e <adr0adrreg1+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0adrreg1>:
movsd  0x21e888(%rcx),%xmm0
xor    %eax,%eax
ucomisd 0x989680,%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @adr0adrreg1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double, double* inttoptr (i64 10000000 to double*)
%15 = load double*, double** %13
%16 = getelementptr inbounds double, double* %15, i64 277777
%17 = load double, double* %16
%18 = fcmp ole double %14, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @adr0adrreg1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture %5) {
%7 = load double, double* inttoptr (i64 10000000 to double*)
%8 = getelementptr inbounds double, double* %5, i64 277777
%9 = load double, double* %8
%10 = fcmp ole double %7, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int atoi(char *);
char *prefix(char *, char *);
int pix(char *s, char *p) {
  char *idx = prefix(s, p);
  if (!idx)
    return -1;
  int r = atoi(idx) - 1;
  if (r < 0)
    r = 0;
  if (r > 19)
    r = 19;
  return r;
}


x86 assembly (clang, -O0):
<pix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <prefix@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1158 <pix+0x38>
movl   $0xffffffff,-0x4(%rbp)
jmp    118f <pix+0x6f>
mov    -0x20(%rbp),%rdi
call   1040 <atoi@plt>
sub    $0x1,%eax
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    1178 <pix+0x58>
movl   $0x0,-0x24(%rbp)
cmpl   $0x13,-0x24(%rbp)
jle    1189 <pix+0x69>
movl   $0x13,-0x24(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pix>:
push   %rax
call   1030 <prefix@plt>
test   %rax,%rax
je     114d <pix+0x2d>
mov    %rax,%rdi
call   1040 <atoi@plt>
test   %eax,%eax
mov    $0x1,%ecx
cmovg  %eax,%ecx
cmp    $0x14,%ecx
mov    $0x14,%eax
cmovb  %ecx,%eax
add    $0xffffffff,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pix(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = call i8* @prefix(i8* %8, i8* %9)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = icmp ne i8* %11, null
br i1 %12, label %14, label %13
13: ; preds = %2
store i32 -1, i32* %3
br label %27
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = call i32 @atoi(i8* %15)
%17 = sub nsw i32 %16, 1
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = icmp slt i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %14
store i32 0, i32* %7
br label %21
21: ; preds = %20, %14
%22 = load i32, i32* %7
%23 = icmp sgt i32 %22, 19
br i1 %23, label %24, label %25
24: ; preds = %21
store i32 19, i32* %7
br label %25
25: ; preds = %24, %21
%26 = load i32, i32* %7
store i32 %26, i32* %3
br label %27
27: ; preds = %25, %13
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @pix(i8* %0, i8* %1) {
%3 = tail call i8* @prefix(i8* %0, i8* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %12, label %5
5: ; preds = %2
%6 = tail call i32 @atoi(i8* %3)
%7 = icmp sgt i32 %6, 1
%8 = select i1 %7, i32 %6, i32 1
%9 = icmp ult i32 %8, 20
%10 = select i1 %9, i32 %8, i32 20
%11 = add nsw i32 %10, -1
br label %12
12: ; preds = %2, %5
%13 = phi i32 [ %11, %5 ], [ -1, %2 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ sesc_fast_sim_begin();
void sesc_fast_sim_begin_() { sesc_fast_sim_begin(); }


x86 assembly (clang, -O0):
<sesc_fast_sim_begin_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sesc_fast_sim_begin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_fast_sim_begin_>:
xor    %eax,%eax
jmp    1030 <sesc_fast_sim_begin@plt>

LLVM IR (-O0):
define void @sesc_fast_sim_begin_() {
%1 = call i32 (...) @sesc_fast_sim_begin()
ret void
}

LLVM IR (-O2):
define void @sesc_fast_sim_begin_() {
%1 = tail call i32 (...) @sesc_fast_sim_begin()
ret void
}
/* Variables and functions */
int O_ACCMODE;
int S_IRUSR;
int S_IWUSR;
int __gen_tempname(char *, int /*<<< orphan*/, int, int, int);
int mkostemps64(char *template, int suffixlen, int flags) {
  flags -= flags & O_ACCMODE;
  return __gen_tempname(template, 0, flags, suffixlen, S_IRUSR | S_IWUSR);
}


x86 assembly (clang, -O0):
<mkostemps64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    0x2ec4(%rip),%rax
and    (%rax),%ecx
mov    -0x10(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    0x2e89(%rip),%rax
mov    (%rax),%r8d
mov    0x2e8f(%rip),%rax
or     (%rax),%r8d
xor    %esi,%esi
call   1030 <__gen_tempname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkostemps64>:
mov    %esi,%ecx
mov    0x2ed7(%rip),%rax
mov    (%rax),%eax
not    %eax
and    %eax,%edx
mov    0x2eaa(%rip),%rax
mov    0x2eb3(%rip),%rsi
mov    (%rsi),%r8d
or     (%rax),%r8d
xor    %esi,%esi
jmp    1030 <__gen_tempname@plt>

LLVM IR (-O0):
@O_ACCMODE = global i32 0
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
define i32 @mkostemps64(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* @O_ACCMODE
%9 = and i32 %7, %8
%10 = load i32, i32* %6
%11 = sub nsw i32 %10, %9
store i32 %11, i32* %6
%12 = load i8*, i8** %4
%13 = load i32, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* @S_IRUSR
%16 = load i32, i32* @S_IWUSR
%17 = or i32 %15, %16
%18 = call i32 @__gen_tempname(i8* %12, i32 0, i32 %13, i32 %14, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
@O_ACCMODE = global i32 0
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
define i32 @mkostemps64(i8* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @O_ACCMODE
%5 = xor i32 %4, -1
%6 = and i32 %5, %2
%7 = load i32, i32* @S_IRUSR
%8 = load i32, i32* @S_IWUSR
%9 = or i32 %8, %7
%10 = tail call i32 @__gen_tempname(i8* %0, i32 0, i32 %6, i32 %1, i32 %9)
ret i32 %10
}
void g_arith_hypot_s64(void *s, void *d, void *o) {}


x86 assembly (clang, -O0):
<g_arith_hypot_s64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_arith_hypot_s64>:
ret

LLVM IR (-O0):
define void @g_arith_hypot_s64(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @g_arith_hypot_s64(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
unsigned xrop3_45_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~D;
  stk2 = S | stk3;
  stk1 = T ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_45_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_45_1_1>:
mov    %esi,%eax
or     %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
or     %esi,%eax
xor    $0xffffff00,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_45_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = xor i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %7
%44 = and i32 %42, %43
%45 = or i32 %41, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_45_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = or i8 %1, %0
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = or i32 %8, %4
%10 = xor i32 %9, -256
ret i32 %10
}
double rint(double x) {
  __asm__("frndint" : "+t"(x));
  return x;
}


x86 assembly (clang, -O0):
<rint>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
fldl   -0x10(%rbp)
frndint
fstpl  -0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rint>:
movsd  %xmm0,-0x8(%rsp)
fldl   -0x8(%rsp)
frndint
fstpl  -0x10(%rsp)
movsd  -0x10(%rsp),%xmm0
ret

LLVM IR (-O0):
define double @rint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double asm "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(double %3)
store double %4, double* %2
%5 = load double, double* %2
ret double %5
}

LLVM IR (-O2):
define double @rint(double %0) {
%2 = tail call double asm "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(double %0)
ret double %2
}
void SPICSDisable(unsigned long ulBase) {
  (*((volatile unsigned long *)(ulBase + 0x0000012C))) &= ~0x00100000;
}


x86 assembly (clang, -O0):
<SPICSDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x12c(%rax),%rcx
and    $0xffffffffffefffff,%rcx
mov    %rcx,0x12c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPICSDisable>:
andq   $0xffffffffffefffff,0x12c(%rdi)
ff ff ef ff
ret

LLVM IR (-O0):
define void @SPICSDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 300
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -1048577
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @SPICSDisable(i64 %0) {
%2 = add i64 %0, 300
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, -1048577
store volatile i64 %5, i64* %3
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strncpy(char *, char const *, unsigned int);
char *dupstrn(const char *s, unsigned int n) {
  char *r;
  r = malloc(sizeof(char) * (n + 1));
  if (r == NULL)
    return NULL;
  strncpy(r, s, n);
  *(r + n) = '\0';
  return r;
}


x86 assembly (clang, -O0):
<dupstrn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    115e <dupstrn+0x3e>
movq   $0x0,-0x8(%rbp)
jmp    1181 <dupstrn+0x61>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x20(%rbp),%rax
mov    -0x14(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dupstrn>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%r15
lea    0x1(%r14),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1151 <dupstrn+0x31>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14d,%edx
call   1030 <strncpy@plt>
mov    %r14d,%eax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @dupstrn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = add i32 %7, 1
%9 = zext i32 %8 to i64
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i8* @malloc(i32 %11)
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = icmp eq i8* %13, null
br i1 %14, label %15, label %16
15: ; preds = %2
store i8* null, i8** %3
br label %26
16: ; preds = %2
%17 = load i8*, i8** %6
%18 = load i8*, i8** %4
%19 = load i32, i32* %5
%20 = call i32 @strncpy(i8* %17, i8* %18, i32 %19)
%21 = load i8*, i8** %6
%22 = load i32, i32* %5
%23 = zext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 0, i8* %24
%25 = load i8*, i8** %6
store i8* %25, i8** %3
br label %26
26: ; preds = %16, %15
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @dupstrn(i8* %0, i32 %1) {
%3 = add i32 %1, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @strncpy(i8* %4, i8* %0, i32 %1)
%8 = zext i32 %1 to i64
%9 = getelementptr inbounds i8, i8* %4, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %2, %6
ret i8* %4
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
scalar_t__ rozofs_get_service_port_export_master_eproto();
uint16_t rozofs_get_service_port_export_slave_eproto(int idx) {
  return rozofs_get_service_port_export_master_eproto() + idx;
}


x86 assembly (clang, -O0):
<rozofs_get_service_port_export_slave_eproto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rozofs_get_service_port_export_master_eproto@plt>
movslq -0x4(%rbp),%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rozofs_get_service_port_export_slave_eproto>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rozofs_get_service_port_export_master_eproto@plt>
movslq %ebx,%rcx
add    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @rozofs_get_service_port_export_slave_eproto(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 (...) @rozofs_get_service_port_export_master_eproto()
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = add nsw i64 %3, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @rozofs_get_service_port_export_slave_eproto(i32 %0) {
%2 = tail call i64 (...) @rozofs_get_service_port_export_master_eproto()
%3 = sext i32 %0 to i64
%4 = add nsw i64 %2, %3
ret i64 %4
}
void ff_hevc_h_loop_filter_luma_12_ssse3() {}


x86 assembly (clang, -O0):
<ff_hevc_h_loop_filter_luma_12_ssse3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_h_loop_filter_luma_12_ssse3>:
ret

LLVM IR (-O0):
define void @ff_hevc_h_loop_filter_luma_12_ssse3() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_h_loop_filter_luma_12_ssse3() {
ret void
}
/* Type definitions */
typedef int mode_t;

/* Variables and functions */
int /*<<< orphan*/ anvil_syslog(int /*<<< orphan*/, char *);
mode_t umask(mode_t cmask) {
  anvil_syslog(0, "umask - NOT IMPLEMENTED\n");
  return -1;
}


x86 assembly (clang, -O0):
<umask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
lea    0xedc(%rip),%rsi
call   1030 <anvil_syslog@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umask>:
push   %rax
lea    0xee8(%rip),%rsi
xor    %edi,%edi
call   1030 <anvil_syslog@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"umask - NOT IMPLEMENTED\0A\00"
define i32 @umask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @anvil_syslog(i32 0, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [25 x i8] c"umask - NOT IMPLEMENTED\0A\00"
define i32 @umask(i32 %0) {
%2 = tail call i32 @anvil_syslog(i32 0, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
int soma3(int a, int b, int c) { return a + b + c; }


x86 assembly (clang, -O0):
<soma3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soma3>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @soma3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @soma3(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
ret i32 %5
}
int main(void) {
  int counter = 0;
  while (counter < 5) {
    counter++;
    int counter2 = 10;
    while (counter2 > 0) {
      counter2--;
    }
  }
  while (counter < 10) {
    counter++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1149 <main+0x49>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movl   $0xa,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1144 <main+0x44>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    112c <main+0x2c>
jmp    1112 <main+0x12>
jmp    114e <main+0x4e>
cmpl   $0xa,-0x8(%rbp)
jge    1166 <main+0x66>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    114e <main+0x4e>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %16, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
store i32 10, i32* %3
br label %10
10: ; preds = %13, %7
%11 = load i32, i32* %3
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %3
%15 = add nsw i32 %14, -1
store i32 %15, i32* %3
br label %10
16: ; preds = %10
br label %4
17: ; preds = %4
br label %18
18: ; preds = %21, %17
%19 = load i32, i32* %2
%20 = icmp slt i32 %19, 10
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %2
%23 = add nsw i32 %22, 1
store i32 %23, i32* %2
br label %18
24: ; preds = %18
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ abort_to_main_loop(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
void do_command(void) {
  char buffer[128];
  if (fgets(buffer, 128, stdin) == NULL)
    abort_to_main_loop(-1);
  else
    exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<do_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
lea    -0x80(%rbp),%rdi
mov    0x2ea2(%rip),%rax
mov    (%rax),%edx
mov    $0x80,%esi
call   1030 <fgets@plt>
cmp    $0x0,%rax
jne    116b <do_command+0x3b>
mov    $0xffffffff,%edi
call   1040 <abort_to_main_loop@plt>
jmp    1179 <do_command+0x49>
mov    0x2e66(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_command>:
sub    $0x88,%rsp
mov    0x2eaa(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rdi
mov    $0x80,%esi
call   1030 <fgets@plt>
test   %rax,%rax
jne    1164 <do_command+0x34>
mov    $0xffffffff,%edi
call   1040 <abort_to_main_loop@plt>
add    $0x88,%rsp
ret
mov    0x2e6d(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stdin = global i32 0
@EXIT_SUCCESS = global i32 0
define void @do_command() {
%1 = alloca [128 x i8]
%2 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i32* @fgets(i8* %2, i32 128, i32 %3)
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @abort_to_main_loop(i32 -1)
br label %11
8: ; preds = %0
%9 = load i32, i32* @EXIT_SUCCESS
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %6
ret void
}

LLVM IR (-O2):
@stdin = global i32 0
@EXIT_SUCCESS = global i32 0
define void @do_command() {
%1 = alloca [128 x i8]
%2 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i32* @fgets(i8* %2, i32 128, i32 %3)
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @abort_to_main_loop(i32 -1)
ret void
8: ; preds = %0
%9 = load i32, i32* @EXIT_SUCCESS
%10 = call i32 @exit(i32 %9)
unreachable
}
/* Type definitions */
typedef int __u16;

/* Variables and functions */
int cec_has_audiosystem(__u16 log_addr_mask) {
  return log_addr_mask & (1 << 5);
}


x86 assembly (clang, -O0):
<cec_has_audiosystem>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cec_has_audiosystem>:
mov    %edi,%eax
and    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @cec_has_audiosystem(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 32
ret i32 %4
}

LLVM IR (-O2):
define i32 @cec_has_audiosystem(i32 %0) {
%2 = and i32 %0, 32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printArrayList(int *A, int length) {
  int i;
  for (i = 0; i < length; i++) {
    printf("%d, ", A[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<printArrayList>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <printArrayList+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printArrayList+0x16>
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printArrayList>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <printArrayList+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <printArrayList+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%d, \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printArrayList(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d, \00"
define void @printArrayList(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
double fabs(double);
int /*<<< orphan*/ printf(char *);
void compare(double A, double B) {
  double eps = 0.000001;
  if ((fabs(A - B)) <= eps) {
    printf("True");
  } else {
    printf("False");
  }
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xee6(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movaps 0xec0(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     1164 <compare+0x54>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
jmp    1170 <compare+0x60>
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
subsd  %xmm1,%xmm0
andpd  0xee4(%rip),%xmm0
movsd  0xeec(%rip),%xmm1
ucomisd %xmm0,%xmm1
lea    0xeee(%rip),%rax
lea    0xee2(%rip),%rdi
cmovb  %rax,%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"True\00"
@.str.1 = [6 x i8] c"False\00"
define void @compare(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
store double 0x3EB0C6F7A0B5ED8D, double* %5
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fsub double %6, %7
%9 = call double @llvm.fabs.f64(double %8)
%10 = load double, double* %5
%11 = fcmp ole double %9, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %16
14: ; preds = %2
%15 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
br label %16
16: ; preds = %14, %12
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"True\00"
@.str.1 = [6 x i8] c"False\00"
define void @compare(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call double @llvm.fabs.f64(double %3)
%5 = fcmp ugt double %4, 0x3EB0C6F7A0B5ED8D
%6 = select i1 %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
%7 = tail call i32 @printf(i8* dereferenceable(1) %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_is_negative(int n) {
  if (n >= 0) {
    ft_putchar('P');
  } else {
    ft_putchar('N');
  }
}


x86 assembly (clang, -O0):
<ft_is_negative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1134 <ft_is_negative+0x24>
mov    $0x50,%edi
call   1030 <ft_putchar@plt>
jmp    113e <ft_is_negative+0x2e>
mov    $0x4e,%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_is_negative>:
not    %edi
shr    $0x1f,%edi
add    %edi,%edi
add    $0x4e,%edi
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_is_negative(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @ft_putchar(i8 signext 80)
br label %9
7: ; preds = %1
%8 = call i32 @ft_putchar(i8 signext 78)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @ft_is_negative(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i8 80, i8 78
%4 = tail call i32 @ft_putchar(i8 signext %3)
ret void
}
extern void do_irq_begin(void) {}


x86 assembly (clang, -O0):
<do_irq_begin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_irq_begin>:
ret

LLVM IR (-O0):
define void @do_irq_begin() {
ret void
}

LLVM IR (-O2):
define void @do_irq_begin() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ msgqueue_sendstring(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, int, int, int);
void SetPen(int r, int g, int b, int w) {
  static char buffer[56];
  sprintf(buffer, "4 %d %d %d %d", r, g, b, w);
  msgqueue_sendstring(buffer);
  return;
}


x86 assembly (clang, -O0):
<SetPen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%r8d
mov    -0x10(%rbp),%r9d
lea    0x2ef7(%rip),%rdi
lea    0xeb0(%rip),%rsi
call   1040 <sprintf@plt>
lea    0x2ee4(%rip),%rdi
call   1030 <msgqueue_sendstring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetPen>:
push   %rbx
mov    %ecx,%r9d
mov    %edx,%r8d
mov    %esi,%ecx
mov    %edi,%edx
lea    0x2f0e(%rip),%rbx
lea    0xec7(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <msgqueue_sendstring@plt>

LLVM IR (-O0):
@SetPen.buffer = internal global [56 x i8] zeroinitializer
@.str = [14 x i8] c"4 %d %d %d %d\00"
define void @SetPen(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @sprintf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @SetPen.buffer, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10, i32 %11, i32 %12)
%14 = call i32 @msgqueue_sendstring(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @SetPen.buffer, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@SetPen.buffer = internal global [56 x i8] zeroinitializer
@.str = [14 x i8] c"4 %d %d %d %d\00"
define void @SetPen(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @SetPen.buffer, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3)
%6 = tail call i32 @msgqueue_sendstring(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @SetPen.buffer, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_isinf(double);
int /*<<< orphan*/ my_isnan(double);
int is_positive(double x) {
  double eps = 1e-15;
  if (x >= eps && !my_isinf(x) && !my_isnan(x))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_positive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jb     117c <is_positive+0x5c>
movsd  -0x10(%rbp),%xmm0
call   1040 <my_isinf@plt>
cmp    $0x0,%eax
jne    117c <is_positive+0x5c>
movsd  -0x10(%rbp),%xmm0
call   1030 <my_isnan@plt>
cmp    $0x0,%eax
jne    117c <is_positive+0x5c>
movl   $0x1,-0x4(%rbp)
jmp    1183 <is_positive+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_positive>:
push   %rax
ucomisd 0xed7(%rip),%xmm0
jb     114c <is_positive+0x2c>
movsd  %xmm0,(%rsp)
movsd  (%rsp),%xmm0
call   1040 <my_isinf@plt>
movsd  (%rsp),%xmm0
test   %eax,%eax
jne    114c <is_positive+0x2c>
call   1030 <my_isnan@plt>
test   %eax,%eax
je     1150 <is_positive+0x30>
xor    %eax,%eax
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_positive(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double 1.000000e-15, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp oge double %5, %6
br i1 %7, label %8, label %17
8: ; preds = %1
%9 = load double, double* %3
%10 = call i32 @my_isinf(double %9)
%11 = icmp ne i32 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %8
%13 = load double, double* %3
%14 = call i32 @my_isnan(double %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %12
store i32 1, i32* %2
br label %18
17: ; preds = %12, %8, %1
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @is_positive(double %0) {
%2 = fcmp ult double %0, 1.000000e-15
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call i32 @my_isinf(double %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @my_isnan(double %0)
%8 = icmp eq i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %6, %3, %1
br label %10
10: ; preds = %6, %9
%11 = phi i32 [ 0, %9 ], [ 1, %6 ]
ret i32 %11
}
/* Variables and functions */
bool is_operator(const char ch) {
  return ch == '+' || ch == '-' || ch == '/' || ch == '*';
}


x86 assembly (clang, -O0):
<is_operator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_operator+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2d,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_operator+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2f,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_operator+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x2a,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_operator>:
cmp    $0x2f,%dil
ja     1120 <is_operator+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0xa80000000000,%rdx
bt     %rcx,%rdx
jae    1120 <is_operator+0x20>
ret
xor    %eax,%eax
cmp    $0x2a,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_operator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 43
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 45
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 47
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 42
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_operator(i8 signext %0) {
switch i8 %0, label %2 [
i8 47, label %5
i8 45, label %5
i8 43, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 42
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Type definitions */
struct lutType {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct lutType *);
void lut_release(struct lutType *lut) { free(lut); }


x86 assembly (clang, -O0):
<lut_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lut_release>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.lutType = type { i32 }
define void @lut_release(%struct.lutType* %0) {
%2 = alloca %struct.lutType*
store %struct.lutType* %0, %struct.lutType** %2
%3 = load %struct.lutType*, %struct.lutType** %2
%4 = call i32 @free(%struct.lutType* %3)
ret void
}

LLVM IR (-O2):
%struct.lutType = type { i32 }
define void @lut_release(%struct.lutType* nocapture %0) {
%2 = tail call i32 @free(%struct.lutType* %0)
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ ioctl_set_msg(int);
int main(int argc, char **argv) {
  ioctl_set_msg(10);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xa,%edi
call   1030 <ioctl_set_msg@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <ioctl_set_msg@plt>
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @ioctl_set_msg(i32 10)
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @ioctl_set_msg(i32 10)
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}