xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ event_dispatch();
int /*<<< orphan*/ pubsubclient_free();
int /*<<< orphan*/ pubsubclient_init(char const *, int, char const *,
                                     void (*)(char *, void *),
                                     void (*)(int, void *), void *);
int pubsubclient_main(const char *source_address, int source_port,
                      const char *path,
                      void (*message_cb)(char *data, void *arg),
                      void (*error_cb)(int status_code, void *arg),
                      void *cbarg) {
  pubsubclient_init(source_address, source_port, path, message_cb, error_cb,
                    cbarg);
  event_dispatch();
  pubsubclient_free();
  return 0;
}


x86 assembly (clang, -O0):
<pubsubclient_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
call   1030 <pubsubclient_init@plt>
mov    $0x0,%al
call   1050 <event_dispatch@plt>
mov    $0x0,%al
call   1040 <pubsubclient_free@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pubsubclient_main>:
push   %rax
call   1030 <pubsubclient_init@plt>
xor    %eax,%eax
call   1050 <event_dispatch@plt>
xor    %eax,%eax
call   1040 <pubsubclient_free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pubsubclient_main(i8* %0, i32 %1, i8* %2, void (i8*, i8*)* %3, void (i32, i8*)* %4, i8* %5) {
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca void (i8*, i8*)*
%11 = alloca void (i32, i8*)*
%12 = alloca i8*
store i8* %0, i8** %7
store i32 %1, i32* %8
store i8* %2, i8** %9
store void (i8*, i8*)* %3, void (i8*, i8*)** %10
store void (i32, i8*)* %4, void (i32, i8*)** %11
store i8* %5, i8** %12
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = load i8*, i8** %9
%16 = load void (i8*, i8*)*, void (i8*, i8*)** %10
%17 = load void (i32, i8*)*, void (i32, i8*)** %11
%18 = load i8*, i8** %12
%19 = call i32 @pubsubclient_init(i8* %13, i32 %14, i8* %15, void (i8*, i8*)* %16, void (i32, i8*)* %17, i8* %18)
%20 = call i32 (...) @event_dispatch()
%21 = call i32 (...) @pubsubclient_free()
ret i32 0
}

LLVM IR (-O2):
define i32 @pubsubclient_main(i8* %0, i32 %1, i8* %2, void (i8*, i8*)* %3, void (i32, i8*)* %4, i8* %5) {
%7 = tail call i32 @pubsubclient_init(i8* %0, i32 %1, i8* %2, void (i8*, i8*)* %3, void (i32, i8*)* %4, i8* %5)
%8 = tail call i32 (...) @event_dispatch()
%9 = tail call i32 (...) @pubsubclient_free()
ret i32 0
}
int num_upto(int num) {
  int ret = 1;
  while (ret <= num)
    ret *= 10;
  return ret;
}


x86 assembly (clang, -O0):
<num_upto>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1126 <num_upto+0x26>
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110e <num_upto+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_upto>:
mov    $0x1,%eax
test   %edi,%edi
jle    1119 <num_upto+0x19>
nopl   0x0(%rax)
add    %eax,%eax
lea    (%rax,%rax,4),%eax
cmp    %edi,%eax
jle    1110 <num_upto+0x10>
ret

LLVM IR (-O0):
define i32 @num_upto(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 10
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @num_upto(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %7, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ 1, %1 ]
%5 = mul nsw i32 %4, 10
%6 = icmp sgt i32 %5, %0
br i1 %6, label %7, label %3
7: ; preds = %3, %1
%8 = phi i32 [ 1, %1 ], [ %5, %3 ]
ret i32 %8
}
void tiny(void) { return; }


x86 assembly (clang, -O0):
<tiny>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tiny>:
ret

LLVM IR (-O0):
define void @tiny() {
ret void
}

LLVM IR (-O2):
define void @tiny() {
ret void
}
/* Variables and functions */
int __ttyslot(void) { return (0); }


x86 assembly (clang, -O0):
<__ttyslot>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ttyslot>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__ttyslot() {
ret i32 0
}

LLVM IR (-O2):
define i32 @__ttyslot() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main(void) {
  int a, b;
  puts("Enter two integers> ");
  scanf("%d%d", &a, &b);
  a = b / 2;
  b = 25 - a;
  printf("a = %d\nb = %d\n", a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <puts@plt>
lea    0xec3(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1050 <scanf@plt>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    $0x19,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xe95(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
lea    0xed1(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1050 <scanf@plt>
mov    (%rsp),%eax
mov    %eax,%esi
shr    $0x1f,%esi
add    %eax,%esi
sar    %esi
mov    %esi,0x4(%rsp)
mov    $0x19,%edx
sub    %esi,%edx
mov    %edx,(%rsp)
lea    0xea8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Enter two integers> \00"
@.str.1 = [5 x i8] c"%d%d\00"
@.str.2 = [15 x i8] c"a = %d\0Ab = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @puts(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %2, i32* %3)
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 2
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = sub nsw i32 25, %8
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"Enter two integers> \00"
@.str.1 = [5 x i8] c"%d%d\00"
@.str.2 = [15 x i8] c"a = %d\0Ab = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %1, i32* %2)
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 2
store i32 %8, i32* %1
%9 = sub nsw i32 25, %8
store i32 %9, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i32 %8, i32 %9)
ret i32 0
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t AONIOCDriveStrengthGet(uint32_t ui32DriveLevel) {

  ;
  return ((*((volatile unsigned long *)(0x40094000 + ui32DriveLevel))));
}


x86 assembly (clang, -O0):
<AONIOCDriveStrengthGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40094000,%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AONIOCDriveStrengthGet>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0x40094000(%rax),%rax
ret

LLVM IR (-O0):
define i64 @AONIOCDriveStrengthGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 1074348032, %3
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @AONIOCDriveStrengthGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 1074348032
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ SIGABRT;
int /*<<< orphan*/ raise(int /*<<< orphan*/);
int main(int argc, char *argv[]) { raise(SIGABRT); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGABRT = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* @SIGABRT
%6 = call i32 @raise(i32 %5)
ret i32 0
}

LLVM IR (-O2):
@SIGABRT = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @SIGABRT
%4 = tail call i32 @raise(i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_ATanF_init(void) {
  _hmt_register_covercase("HMM_ATanF", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_ATanF_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee8(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_ATanF_init>:
lea    0xee9(%rip),%rdi
lea    0xeec(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"HMM_ATanF\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_ATanF_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"HMM_ATanF\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_ATanF_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MicrowaveOven_DefineOven();
int /*<<< orphan*/ MicrowaveOven_TestSequence1();
void MicrowaveOven_execute_initialization() {
  MicrowaveOven_DefineOven();
  MicrowaveOven_TestSequence1();
}


x86 assembly (clang, -O0):
<MicrowaveOven_execute_initialization>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <MicrowaveOven_DefineOven@plt>
mov    $0x0,%al
call   1030 <MicrowaveOven_TestSequence1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MicrowaveOven_execute_initialization>:
push   %rax
xor    %eax,%eax
call   1040 <MicrowaveOven_DefineOven@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <MicrowaveOven_TestSequence1@plt>

LLVM IR (-O0):
define void @MicrowaveOven_execute_initialization() {
%1 = call i32 (...) @MicrowaveOven_DefineOven()
%2 = call i32 (...) @MicrowaveOven_TestSequence1()
ret void
}

LLVM IR (-O2):
define void @MicrowaveOven_execute_initialization() {
%1 = tail call i32 (...) @MicrowaveOven_DefineOven()
%2 = tail call i32 (...) @MicrowaveOven_TestSequence1()
ret void
}
__attribute__((__unused__)) unsigned long long
psnip_builtin_subcll(unsigned long long x, unsigned long long y,
                     unsigned long long ci, unsigned long long *co) {
  unsigned long long r = x - y;
  *co = x < y;
  if (ci) {
    r--;
    if (r == 0)
      *co = 1;
  }
  return r;
}


x86 assembly (clang, -O0):
<psnip_builtin_subcll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setb   %al
and    $0x1,%al
movzbl %al,%eax
movslq %eax,%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     116c <psnip_builtin_subcll+0x6c>
mov    -0x28(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    1167 <psnip_builtin_subcll+0x67>
mov    -0x20(%rbp),%rax
movq   $0x1,(%rax)
jmp    116c <psnip_builtin_subcll+0x6c>
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<psnip_builtin_subcll>:
mov    %rdi,%rax
xor    %edi,%edi
sub    %rsi,%rax
setb   %dil
mov    %rdi,(%rcx)
test   %rdx,%rdx
je     111a <psnip_builtin_subcll+0x1a>
add    $0xffffffffffffffff,%rax
je     111b <psnip_builtin_subcll+0x1b>
ret
movq   $0x1,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @psnip_builtin_subcll(i64 %0, i64 %1, i64 %2, i64* %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64*
%9 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64* %3, i64** %8
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = sub i64 %10, %11
store i64 %12, i64* %9
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp ult i64 %13, %14
%16 = zext i1 %15 to i32
%17 = sext i32 %16 to i64
%18 = load i64*, i64** %8
store i64 %17, i64* %18
%19 = load i64, i64* %7
%20 = icmp ne i64 %19, 0
br i1 %20, label %21, label %29
21: ; preds = %4
%22 = load i64, i64* %9
%23 = add i64 %22, -1
store i64 %23, i64* %9
%24 = load i64, i64* %9
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %21
%27 = load i64*, i64** %8
store i64 1, i64* %27
br label %28
28: ; preds = %26, %21
br label %29
29: ; preds = %28, %4
%30 = load i64, i64* %9
ret i64 %30
}

LLVM IR (-O2):
define i64 @psnip_builtin_subcll(i64 %0, i64 %1, i64 %2, i64* nocapture writeonly %3) {
%5 = sub i64 %0, %1
%6 = icmp ult i64 %0, %1
%7 = zext i1 %6 to i64
store i64 %7, i64* %3
%8 = icmp eq i64 %2, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = add i64 %5, -1
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
store i64 1, i64* %3
br label %13
13: ; preds = %9, %12, %4
%14 = phi i64 [ 0, %12 ], [ %10, %9 ], [ %5, %4 ]
ret i64 %14
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int sas7bdat_signature_is_recognized(uint32_t signature) {
  return (signature == 0xF7F7F7F7 || signature == 0xF6F6F6F6 ||
          signature == 0xFFFFFC00 || signature == 0xFFFFFBFE ||
          (signature & 0xFFFFFFF8) == 0xFFFFFFF8);
}


x86 assembly (clang, -O0):
<sas7bdat_signature_is_recognized>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xf7f7f7f7,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115e <sas7bdat_signature_is_recognized+0x5e>
mov    $0x1,%al
cmpl   $0xf6f6f6f6,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115e <sas7bdat_signature_is_recognized+0x5e>
mov    $0x1,%al
cmpl   $0xfffffc00,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115e <sas7bdat_signature_is_recognized+0x5e>
mov    $0x1,%al
cmpl   $0xfffffbfe,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115e <sas7bdat_signature_is_recognized+0x5e>
mov    -0x4(%rbp),%eax
and    $0xfffffff8,%eax
cmp    $0xfffffff8,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sas7bdat_signature_is_recognized>:
mov    $0x1,%eax
cmp    $0xfffffbfd,%edi
jg     111e <sas7bdat_signature_is_recognized+0x1e>
cmp    $0xf6f6f6f6,%edi
je     111d <sas7bdat_signature_is_recognized+0x1d>
cmp    $0xf7f7f7f7,%edi
jne    112e <sas7bdat_signature_is_recognized+0x2e>
ret
cmp    $0xfffffbfe,%edi
je     111d <sas7bdat_signature_is_recognized+0x1d>
cmp    $0xfffffc00,%edi
je     111d <sas7bdat_signature_is_recognized+0x1d>
xor    %eax,%eax
cmp    $0xfffffff8,%edi
setae  %al
ret

LLVM IR (-O0):
define i32 @sas7bdat_signature_is_recognized(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -134744073
br i1 %4, label %18, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, -151587082
br i1 %7, label %18, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, -1024
br i1 %10, label %18, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, -1026
br i1 %13, label %18, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = and i32 %15, -8
%17 = icmp eq i32 %16, -8
br label %18
18: ; preds = %14, %11, %8, %5, %1
%19 = phi i1 [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @sas7bdat_signature_is_recognized(i32 %0) {
switch i32 %0, label %2 [
i32 -1024, label %5
i32 -1026, label %5
i32 -134744073, label %5
i32 -151587082, label %5
]
2: ; preds = %1
%3 = icmp ugt i32 %0, -9
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void rte_prefetch1(const volatile void *p) {
  __asm__ volatile("prefetcht1 %[p]" : : [p] "m"(*(const volatile char *)p));
}


x86 assembly (clang, -O0):
<rte_prefetch1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
prefetcht1 (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_prefetch1>:
prefetcht1 (%rdi)
ret

LLVM IR (-O0):
define void @rte_prefetch1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @rte_prefetch1(i8* %0) {
tail call void asm sideeffect "prefetcht1 $0", "*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0)
ret void
}
void dummy(int *x, int y) {}


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
ret

LLVM IR (-O0):
define void @dummy(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @dummy(i32* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int is_prime(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int num, i;
  scanf("%d", &num);
  i = is_prime(num);
  printf("%d", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <is_prime@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
call   1040 <is_prime@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @is_prime(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @is_prime(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
char *b64dec_shortdesc(void) { return "decode Base64 encoded data"; }


x86 assembly (clang, -O0):
<b64dec_shortdesc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b64dec_shortdesc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [27 x i8] c"decode Base64 encoded data\00"
define i8* @b64dec_shortdesc() {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [27 x i8] c"decode Base64 encoded data\00"
define i8* @b64dec_shortdesc() {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int touch(char *);
int createFile(char *path) { return touch(path); }


x86 assembly (clang, -O0):
<createFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <touch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createFile>:
jmp    1030 <touch@plt>

LLVM IR (-O0):
define i32 @createFile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @touch(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @createFile(i8* %0) {
%2 = tail call i32 @touch(i8* %0)
ret i32 %2
}
void foo775() {}


x86 assembly (clang, -O0):
<foo775>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo775>:
ret

LLVM IR (-O0):
define void @foo775() {
ret void
}

LLVM IR (-O2):
define void @foo775() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/ *, char const *,
                            int /*<<< orphan*/);
void __msg(FILE *out, const char *prefix, const char *format, va_list v) {
  fprintf(out, "[UFBlit] %s: ", prefix);
  vfprintf(out, format, v);
  fprintf(out, "\n");
}


x86 assembly (clang, -O0):
<__msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xeba(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <vfprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xea6(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__msg>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %rdx,%rbx
mov    %rsi,%rdx
mov    %rdi,%rbp
lea    0xeb9(%rip),%rsi
xor    %eax,%eax
call   1040 <fprintf@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1050 <vfprintf@plt>
mov    $0xa,%edi
mov    %rbp,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"[UFBlit] %s: \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @__msg(i32* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i32* %0, i32** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %6
%11 = call i32 (i32*, i8*, ...) @fprintf(i32* %9, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %10)
%12 = load i32*, i32** %5
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = call i32 @vfprintf(i32* %12, i8* %13, i32 %14)
%16 = load i32*, i32** %5
%17 = call i32 (i32*, i8*, ...) @fprintf(i32* %16, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"[UFBlit] %s: \00"
define void @__msg(i32* nocapture %0, i8* %1, i8* nocapture %2, i32 %3) {
%5 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %1)
%6 = tail call i32 @vfprintf(i32* %0, i8* %2, i32 %3)
%7 = tail call i32 @fputc(i32 10, i32* %0)
ret void
}
int addDigits(int num) {
  int newSum = 0;
  while (num >= 10) {
    newSum = 0;
    while (num) {
      newSum += num % 10;
      num /= 10;
    }
    num = newSum;
  }
  return num;
}


x86 assembly (clang, -O0):
<addDigits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jl     1158 <addDigits+0x58>
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114d <addDigits+0x4d>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%edx
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    111f <addDigits+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <addDigits+0xe>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addDigits>:
cmp    $0xa,%edi
jl     114c <addDigits+0x4c>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
movslq %edi,%rdx
imul   $0x66666667,%rdx,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
sar    $0x22,%rdi
add    %eax,%edi
lea    (%rdi,%rdi,1),%eax
lea    (%rax,%rax,4),%eax
mov    %edx,%esi
sub    %eax,%esi
mov    %ecx,%eax
add    %esi,%eax
add    $0x9,%edx
mov    %eax,%ecx
cmp    $0x13,%edx
jae    1110 <addDigits+0x10>
mov    $0x0,%ecx
mov    %eax,%edi
cmp    $0xa,%eax
jge    1110 <addDigits+0x10>
ret
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @addDigits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, 10
br i1 %6, label %7, label %20
7: ; preds = %4
store i32 0, i32* %3
br label %8
8: ; preds = %11, %7
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, i32* %2
%13 = srem i32 %12, 10
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %2
%17 = sdiv i32 %16, 10
store i32 %17, i32* %2
br label %8
18: ; preds = %8
%19 = load i32, i32* %3
store i32 %19, i32* %2
br label %4
20: ; preds = %4
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @addDigits(i32 %0) {
%2 = icmp sgt i32 %0, 9
br i1 %2, label %5, label %16
3: ; preds = %5
%4 = icmp sgt i32 %9, 9
br i1 %4, label %13, label %16
5: ; preds = %1, %13
%6 = phi i32 [ %14, %13 ], [ 0, %1 ]
%7 = phi i32 [ %15, %13 ], [ %0, %1 ]
%8 = srem i32 %7, 10
%9 = add nsw i32 %6, %8
%10 = sdiv i32 %7, 10
%11 = add i32 %7, 9
%12 = icmp ult i32 %11, 19
br i1 %12, label %3, label %13
13: ; preds = %5, %3
%14 = phi i32 [ %9, %5 ], [ 0, %3 ]
%15 = phi i32 [ %10, %5 ], [ %9, %3 ]
br label %5
16: ; preds = %3, %1
%17 = phi i32 [ %0, %1 ], [ %9, %3 ]
ret i32 %17
}
int liftMapOffset(int offset) { return offset / 10; }


x86 assembly (clang, -O0):
<liftMapOffset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<liftMapOffset>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @liftMapOffset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 10
ret i32 %4
}

LLVM IR (-O2):
define i32 @liftMapOffset(i32 %0) {
%2 = sdiv i32 %0, 10
ret i32 %2
}
int foo(int i) { return 2 * i; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
__attribute__((always_)) void *pcpu_lpage_remapped(void *kaddr) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<pcpu_lpage_remapped>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcpu_lpage_remapped>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @pcpu_lpage_remapped(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @pcpu_lpage_remapped(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int goo(int *);
int foo1() {
  int i;
  return goo(&i);
}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <goo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <goo@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @foo1() {
%1 = alloca i32
%2 = call i32 @goo(i32* %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @foo1() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @goo(i32* %1)
ret i32 %3
}
void wcs_setAli(ncoord, nelem, first) int ncoord, nelem;
int *first;
{
  int v0, *vp;
  v0 = *first;
  for (vp = first + nelem; vp < first + ncoord * nelem; vp += nelem) {
    *vp = v0;
  }
}


x86 assembly (clang, -O0):
<wcs_setAli>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    -0x4(%rbp),%edx
imul   -0x8(%rbp),%edx
movslq %edx,%rdx
shl    $0x2,%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
jae    116f <wcs_setAli+0x6f>
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
jmp    112a <wcs_setAli+0x2a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcs_setAli>:
imul   %esi,%edi
cmp    %esi,%edi
jle    112a <wcs_setAli+0x2a>
mov    (%rdx),%eax
movslq %esi,%rcx
movslq %edi,%rsi
lea    (%rdx,%rsi,4),%rsi
lea    (%rdx,%rcx,4),%rdx
shl    $0x2,%rcx
nopl   0x0(%rax,%rax,1)
mov    %eax,(%rdx)
add    %rcx,%rdx
cmp    %rsi,%rdx
jb     1120 <wcs_setAli+0x20>
ret

LLVM IR (-O0):
define void @wcs_setAli(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%9 = load i32*, i32** %6
%10 = load i32, i32* %9
store i32 %10, i32* %7
%11 = load i32*, i32** %6
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32* %14, i32** %8
br label %15
15: ; preds = %27, %3
%16 = load i32*, i32** %8
%17 = load i32*, i32** %6
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = mul nsw i32 %18, %19
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %17, i64 %21
%23 = icmp ult i32* %16, %22
br i1 %23, label %24, label %32
24: ; preds = %15
%25 = load i32, i32* %7
%26 = load i32*, i32** %8
store i32 %25, i32* %26
br label %27
27: ; preds = %24
%28 = load i32, i32* %5
%29 = load i32*, i32** %8
%30 = sext i32 %28 to i64
%31 = getelementptr inbounds i32, i32* %29, i64 %30
store i32* %31, i32** %8
br label %15
32: ; preds = %15
ret void
}

LLVM IR (-O2):
define void @wcs_setAli(i32 %0, i32 %1, i32* %2) {
%4 = load i32, i32* %2
%5 = sext i32 %1 to i64
%6 = mul nsw i32 %1, %0
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %2, i64 %7
%9 = icmp sgt i32 %6, %1
br i1 %9, label %10, label %16
10: ; preds = %3
%11 = getelementptr inbounds i32, i32* %2, i64 %5
br label %12
12: ; preds = %10, %12
%13 = phi i32* [ %14, %12 ], [ %11, %10 ]
store i32 %4, i32* %13
%14 = getelementptr inbounds i32, i32* %13, i64 %5
%15 = icmp ult i32* %14, %8
br i1 %15, label %12, label %16
16: ; preds = %12, %3
ret void
}
const char *zlibVersion() { return "1.2.5"; }


x86 assembly (clang, -O0):
<zlibVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlibVersion>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1.2.5\00"
define i8* @zlibVersion() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.2.5\00"
define i8* @zlibVersion() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
scalar_t__ __bound_delete_region(void *);
int /*<<< orphan*/ bound_error(char *);
int /*<<< orphan*/ libc_free(void *);
void __bound_free(void *ptr, const void *caller) {
  if (ptr == NULL)
    return;
  if (__bound_delete_region(ptr) != 0)
    bound_error("freeing invalid region");
  libc_free(ptr);
}


x86 assembly (clang, -O0):
<__bound_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1150 <__bound_free+0x20>
jmp    1178 <__bound_free+0x48>
mov    -0x8(%rbp),%rdi
call   1050 <__bound_delete_region@plt>
cmp    $0x0,%rax
je     116f <__bound_free+0x3f>
lea    0xe96(%rip),%rdi
call   1030 <bound_error@plt>
mov    -0x8(%rbp),%rdi
call   1040 <libc_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__bound_free>:
test   %rdi,%rdi
je     1158 <__bound_free+0x28>
push   %rbx
mov    %rdi,%rbx
call   1050 <__bound_delete_region@plt>
test   %rax,%rax
je     114f <__bound_free+0x1f>
lea    0xeb6(%rip),%rdi
call   1030 <bound_error@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <libc_free@plt>
ret

LLVM IR (-O0):
@.str = [23 x i8] c"freeing invalid region\00"
define void @__bound_free(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
br label %17
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = call i64 @__bound_delete_region(i8* %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 @bound_error(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %12, %8
%15 = load i8*, i8** %3
%16 = call i32 @libc_free(i8* %15)
br label %17
17: ; preds = %14, %7
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"freeing invalid region\00"
define void @__bound_free(i8* %0, i8* nocapture readnone %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = tail call i64 @__bound_delete_region(i8* %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @bound_error(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %4
%10 = tail call i32 @libc_free(i8* %0)
br label %11
11: ; preds = %2, %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tommy_hashlin_init(void *);
int /*<<< orphan*/ tommy_list_init(void *);
void init_hash_table(void *ht, void *ll) {
  tommy_hashlin_init(ht);
  tommy_list_init(ll);
}


x86 assembly (clang, -O0):
<init_hash_table>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <tommy_hashlin_init@plt>
mov    -0x10(%rbp),%rdi
call   1040 <tommy_list_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_hash_table>:
push   %rbx
mov    %rsi,%rbx
call   1030 <tommy_hashlin_init@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <tommy_list_init@plt>

LLVM IR (-O0):
define void @init_hash_table(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @tommy_hashlin_init(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @tommy_list_init(i8* %7)
ret void
}

LLVM IR (-O2):
define void @init_hash_table(i8* %0, i8* %1) {
%3 = tail call i32 @tommy_hashlin_init(i8* %0)
%4 = tail call i32 @tommy_list_init(i8* %1)
ret void
}
int deQueue() { return -1; }


x86 assembly (clang, -O0):
<deQueue>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deQueue>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @deQueue() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @deQueue() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void _exception_stub(void) {
  printf("exception stub\n");
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<_exception_stub>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
jmp    1120 <_exception_stub+0x10>

x86 assembly (clang, -O2):
<_exception_stub>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
jmp    1120 <_exception_stub+0x10>

LLVM IR (-O0):
@.str = [16 x i8] c"exception stub\0A\00"
define void @_exception_stub() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %2, %0
br label %2
}

LLVM IR (-O2):
@str = [15 x i8] c"exception stub\00"
define void @_exception_stub() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
br label %2
2: ; preds = %2, %0
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ golib_main(int, char **);
int main(int argc, char **argv) { golib_main(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <golib_main@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <golib_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @golib_main(i32 %5, i8** %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @golib_main(i32 %0, i8** %1)
ret i32 0
}
char itoc(int i) { return '0' + i; }


x86 assembly (clang, -O0):
<itoc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoc>:
lea    0x30(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @itoc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 48, %3
%5 = trunc i32 %4 to i8
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @itoc(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = add i8 %2, 48
ret i8 %3
}
void n_condNone(struct _WsbmCond *cond) { ; }


x86 assembly (clang, -O0):
<n_condNone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<n_condNone>:
ret

LLVM IR (-O0):
%struct._WsbmCond = type opaque
define void @n_condNone(%struct._WsbmCond* %0) {
%2 = alloca %struct._WsbmCond*
store %struct._WsbmCond* %0, %struct._WsbmCond** %2
ret void
}

LLVM IR (-O2):
%struct._WsbmCond = type opaque
define void @n_condNone(%struct._WsbmCond* nocapture %0) {
ret void
}
unsigned count_digits(unsigned long long value) {
  if (value == 0) {
    return 1;
  }
  int count = 0;
  while (value != 0) {
    value /= 10;
    count++;
  }
  return count;
}


x86 assembly (clang, -O0):
<count_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <count_digits+0x1f>
movl   $0x1,-0x4(%rbp)
jmp    1157 <count_digits+0x57>
movl   $0x0,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1151 <count_digits+0x51>
mov    -0x10(%rbp),%rax
mov    $0xa,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <count_digits+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_digits>:
test   %rdi,%rdi
je     1139 <count_digits+0x39>
xor    %ecx,%ecx
movabs $0xcccccccccccccccd,%rsi
cc cc cc
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
mul    %rsi
shr    $0x3,%rdx
add    $0x1,%ecx
cmp    $0x9,%rdi
mov    %rdx,%rdi
ja     1120 <count_digits+0x20>
mov    %ecx,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @count_digits(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %19
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %12, %8
%10 = load i64, i64* %3
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %9
%13 = load i64, i64* %3
%14 = udiv i64 %13, 10
store i64 %14, i64* %3
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
br label %9
17: ; preds = %9
%18 = load i32, i32* %4
store i32 %18, i32* %2
br label %19
19: ; preds = %17, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @count_digits(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = udiv i64 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i64 %5, 10
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
void swi_enable(void) {}


x86 assembly (clang, -O0):
<swi_enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swi_enable>:
ret

LLVM IR (-O0):
define void @swi_enable() {
ret void
}

LLVM IR (-O2):
define void @swi_enable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_int();
int /*<<< orphan*/ test_string();
int main() {
  test_int();
  test_string();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_int@plt>
mov    $0x0,%al
call   1030 <test_string@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_int@plt>
xor    %eax,%eax
call   1030 <test_string@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_int()
%3 = call i32 (...) @test_string()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_int()
%2 = tail call i32 (...) @test_string()
ret i32 0
}
OP(dd, a8) {
  illegal_1();
  op_a8();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_a8@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_a8@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_a8()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_a8()
ret i32 undef
}
unsigned int _c2ui(const char *c) {
  unsigned int *rtn = (unsigned int *)c;
  return *rtn;
}


x86 assembly (clang, -O0):
<_c2ui>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_c2ui>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @_c2ui(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @_c2ui(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int uid_t;

/* Variables and functions */
uid_t getgid(void) { return 5001; }


x86 assembly (clang, -O0):
<getgid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1389,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgid>:
mov    $0x1389,%eax
ret

LLVM IR (-O0):
define i32 @getgid() {
ret i32 5001
}

LLVM IR (-O2):
define i32 @getgid() {
ret i32 5001
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
scalar_t__ bme_bf_addr(int /*<<< orphan*/ volatile *, int /*<<< orphan*/,
                       int /*<<< orphan*/);
volatile uint16_t *bme_bitfield16(volatile uint16_t *ptr, uint8_t bit,
                                  uint8_t width) {
  return (volatile uint16_t *)(bme_bf_addr(ptr, bit, width));
}


x86 assembly (clang, -O0):
<bme_bitfield16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <bme_bf_addr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bme_bitfield16>:
jmp    1030 <bme_bf_addr@plt>

LLVM IR (-O0):
define i32* @bme_bitfield16(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i64 @bme_bf_addr(i32* %7, i32 %8, i32 %9)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
define i32* @bme_bitfield16(i32* %0, i32 %1, i32 %2) {
%4 = tail call i64 @bme_bf_addr(i32* %0, i32 %1, i32 %2)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
char *pigfx_strcpy(char *pDest, const char *pSrc) {
  char *p = pDest;
  while (*pSrc) {
    *p++ = *pSrc++;
  }
  *p = '\0';
  return pDest;
}


x86 assembly (clang, -O0):
<pigfx_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <pigfx_strcpy+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1114 <pigfx_strcpy+0x14>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pigfx_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
mov    %rdi,%rdx
test   %cl,%cl
je     1131 <pigfx_strcpy+0x31>
add    $0x1,%rsi
mov    %rax,%rdx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %cl,(%rdx)
add    $0x1,%rdx
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <pigfx_strcpy+0x20>
movb   $0x0,(%rdx)
ret

LLVM IR (-O0):
define i8* @pigfx_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
store i8 %14, i8* %15
br label %7
17: ; preds = %7
%18 = load i8*, i8** %5
store i8 0, i8* %18
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @pigfx_strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i8* %0
}
/* Type definitions */
struct S {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ foo(struct S *);
void __attribute__((no)) bar(struct S *p) { foo(p); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <foo@plt>

LLVM IR (-O0):
%struct.S = type { i32 }
define void @bar(%struct.S* %0) {
%2 = alloca %struct.S*
store %struct.S* %0, %struct.S** %2
%3 = load %struct.S*, %struct.S** %2
%4 = call i32 @foo(%struct.S* %3)
ret void
}

LLVM IR (-O2):
%struct.S = type { i32 }
define void @bar(%struct.S* %0) {
%2 = tail call i32 @foo(%struct.S* %0)
ret void
}