xunge/DecIR huggingface dataset:
void timeStart() {}


x86 assembly (clang, -O0):
<timeStart>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeStart>:
ret

LLVM IR (-O0):
define void @timeStart() {
ret void
}

LLVM IR (-O2):
define void @timeStart() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __SLIC_fun_local_irq_disable_call();
int /*<<< orphan*/ __SLIC_fun_local_irq_disable_entry();
int /*<<< orphan*/ __SLIC_fun_local_irq_disable_exit();
int /*<<< orphan*/ __SLIC_fun_local_irq_disable_return();
void __SLIC_local_irq_disable(void) {
  {
    __SLIC_fun_local_irq_disable_call();
    __SLIC_fun_local_irq_disable_entry();
    ;
    __SLIC_fun_local_irq_disable_exit();
    __SLIC_fun_local_irq_disable_return();
    return;
  }
}


x86 assembly (clang, -O0):
<__SLIC_local_irq_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <__SLIC_fun_local_irq_disable_call@plt>
mov    $0x0,%al
call   1060 <__SLIC_fun_local_irq_disable_entry@plt>
mov    $0x0,%al
call   1030 <__SLIC_fun_local_irq_disable_exit@plt>
mov    $0x0,%al
call   1040 <__SLIC_fun_local_irq_disable_return@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__SLIC_local_irq_disable>:
push   %rax
xor    %eax,%eax
call   1050 <__SLIC_fun_local_irq_disable_call@plt>
xor    %eax,%eax
call   1060 <__SLIC_fun_local_irq_disable_entry@plt>
xor    %eax,%eax
call   1030 <__SLIC_fun_local_irq_disable_exit@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <__SLIC_fun_local_irq_disable_return@plt>

LLVM IR (-O0):
define void @__SLIC_local_irq_disable() {
%1 = call i32 (...) @__SLIC_fun_local_irq_disable_call()
%2 = call i32 (...) @__SLIC_fun_local_irq_disable_entry()
%3 = call i32 (...) @__SLIC_fun_local_irq_disable_exit()
%4 = call i32 (...) @__SLIC_fun_local_irq_disable_return()
ret void
}

LLVM IR (-O2):
define void @__SLIC_local_irq_disable() {
%1 = tail call i32 (...) @__SLIC_fun_local_irq_disable_call()
%2 = tail call i32 (...) @__SLIC_fun_local_irq_disable_entry()
%3 = tail call i32 (...) @__SLIC_fun_local_irq_disable_exit()
%4 = tail call i32 (...) @__SLIC_fun_local_irq_disable_return()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SYS_eventfd;
int syscall(int /*<<< orphan*/, int, int);
int eventfd(int count, int flags) { return syscall(SYS_eventfd, count, flags); }


x86 assembly (clang, -O0):
<eventfd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eventfd>:
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_eventfd = global i32 0
define i32 @eventfd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @SYS_eventfd
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @syscall(i32 %5, i32 %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@SYS_eventfd = global i32 0
define i32 @eventfd(i32 %0, i32 %1) {
%3 = load i32, i32* @SYS_eventfd
%4 = tail call i32 @syscall(i32 %3, i32 %0, i32 %1)
ret i32 %4
}
/* Variables and functions */
char const *findJsonBeginningParams(char const *, int /*<<< orphan*/, int *,
                                    int *);
int /*<<< orphan*/ strlen(char const *);
const char *findJsonBeginning(const char *data) {
  int inString = 0;
  int pos = 0;
  return findJsonBeginningParams(data, strlen(data), &inString, &pos);
}


x86 assembly (clang, -O0):
<findJsonBeginning>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
call   1030 <findJsonBeginningParams@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findJsonBeginning>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movl   $0x0,0xc(%rsp)
movl   $0x0,0x8(%rsp)
call   1040 <strlen@plt>
lea    0xc(%rsp),%rdx
lea    0x8(%rsp),%rcx
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <findJsonBeginningParams@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @findJsonBeginning(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = load i8*, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
%8 = call i8* @findJsonBeginningParams(i8* %5, i32 %7, i32* %3, i32* %4)
ret i8* %8
}

LLVM IR (-O2):
define i8* @findJsonBeginning(i8* %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%6 = tail call i32 @strlen(i8* %0)
%7 = call i8* @findJsonBeginningParams(i8* %0, i32 %6, i32* %2, i32* %3)
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ t();
int g(double b, double c) {
  t();
  return (int)(b + c);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    $0x0,%al
call   1030 <t@plt>
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <t@plt>
movsd  0x8(%rsp),%xmm0
addsd  0x10(%rsp),%xmm0
cvttsd2si %xmm0,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @g(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = call i32 (...) @t()
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fadd double %6, %7
%9 = fptosi double %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @g(double %0, double %1) {
%3 = tail call i32 (...) @t()
%4 = fadd double %0, %1
%5 = fptosi double %4 to i32
ret i32 %5
}
/* Variables and functions */
scalar_t__ getcodi(int *, double *);
int /*<<< orphan*/ warp(int, int, double);
void dowarp(int fl) {
  int c;
  double d;
  if (getcodi(&c, &d))
    return;
  warp(fl, c, d);
}


x86 assembly (clang, -O0):
<dowarp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <getcodi@plt>
cmp    $0x0,%rax
je     1147 <dowarp+0x27>
jmp    1157 <dowarp+0x37>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
movsd  -0x10(%rbp),%xmm0
call   1040 <warp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dowarp>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0x4(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <getcodi@plt>
test   %rax,%rax
jne    114c <dowarp+0x2c>
mov    0x4(%rsp),%esi
movsd  0x8(%rsp),%xmm0
mov    %ebx,%edi
call   1040 <warp@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @dowarp(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %2
%5 = call i64 @getcodi(i32* %3, double* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %13
8: ; preds = %1
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = load double, double* %4
%12 = call i32 @warp(i32 %9, i32 %10, double %11)
br label %13
13: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @dowarp(i32 %0) {
%2 = alloca i32
%3 = alloca double
%4 = bitcast i32* %2 to i8*
%5 = bitcast double* %3 to i8*
%6 = call i64 @getcodi(i32* %2, double* %3)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = load double, double* %3
%11 = call i32 @warp(i32 %0, i32 %9, double %10)
br label %12
12: ; preds = %1, %8
ret void
}
/* Type definitions */
typedef size_t uint8_t;

/* Variables and functions */
uint8_t longzero(uint8_t num[], uint8_t len) {
  uint8_t i;
  for (i = 0; i < len; i++) {
    if (num[i] > 0)
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<longzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1158 <longzero+0x58>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
jbe    1142 <longzero+0x42>
movq   $0x0,-0x8(%rbp)
jmp    1160 <longzero+0x60>
jmp    1147 <longzero+0x47>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <longzero+0x14>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longzero>:
mov    $0x1,%eax
test   %rsi,%rsi
je     1120 <longzero+0x20>
xor    %ecx,%ecx
nopl   0x0(%rax)
cmpq   $0x0,(%rdi,%rcx,8)
jne    1121 <longzero+0x21>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <longzero+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @longzero(i64* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %19, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i64*, i64** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i64, i64* %12, i64 %13
%15 = load i64, i64* %14
%16 = icmp ugt i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %11
store i64 0, i64* %3
br label %23
18: ; preds = %11
br label %19
19: ; preds = %18
%20 = load i64, i64* %6
%21 = add i64 %20, 1
store i64 %21, i64* %6
br label %7
22: ; preds = %7
store i64 1, i64* %3
br label %23
23: ; preds = %22, %17
%24 = load i64, i64* %3
ret i64 %24
}

LLVM IR (-O2):
define i64 @longzero(i64* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %6
4: ; preds = %6
%5 = icmp eq i64 %11, %1
br i1 %5, label %12, label %6
6: ; preds = %2, %4
%7 = phi i64 [ %11, %4 ], [ 0, %2 ]
%8 = getelementptr inbounds i64, i64* %0, i64 %7
%9 = load i64, i64* %8
%10 = icmp eq i64 %9, 0
%11 = add nuw i64 %7, 1
br i1 %10, label %4, label %12
12: ; preds = %6, %4, %2
%13 = phi i64 [ 1, %2 ], [ 1, %4 ], [ 0, %6 ]
ret i64 %13
}
float dot4_neon_hfp(float v0[4], float v1[4]) {}


x86 assembly (clang, -O0):
<dot4_neon_hfp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot4_neon_hfp>:
ret

LLVM IR (-O0):
define float @dot4_neon_hfp(float* %0, float* %1) {
%3 = alloca float
%4 = alloca float*
%5 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @dot4_neon_hfp(float* nocapture readnone %0, float* nocapture readnone %1) {
ret float undef
}
int after_equal(char *c) {
  int i = 0;
  for (; c[i] != '\0' && c[i] != '='; i++)
    ;
  return ++i;
}


x86 assembly (clang, -O0):
<after_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xd(%rbp)
je     113e <after_equal+0x3e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x3d,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    114e <after_equal+0x4e>
jmp    1161 <after_equal+0x61>
jmp    1153 <after_equal+0x53>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <after_equal+0xf>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<after_equal>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1123 <after_equal+0x23>
cmp    $0x3d,%cl
je     1123 <after_equal+0x23>
add    $0x1,%rax
jmp    1110 <after_equal+0x10>
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @after_equal(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %23, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 61
br label %20
20: ; preds = %12, %4
%21 = phi i1 [ false, %4 ], [ %19, %12 ]
br i1 %21, label %22, label %26
22: ; preds = %20
br label %23
23: ; preds = %22
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 1
store i32 %25, i32* %3
br label %4
26: ; preds = %20
%27 = load i32, i32* %3
%28 = add nsw i32 %27, 1
store i32 %28, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @after_equal(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ %7, %6 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %8
i8 61, label %8
]
6: ; preds = %2
%7 = add nuw i64 %3, 1
br label %2
8: ; preds = %2, %2
%9 = trunc i64 %3 to i32
%10 = add nuw nsw i32 %9, 1
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ core7_print(char *, char *, char *, char const *);
void U_EMROFFSETCLIPRGN_print(const char *contents) {
  core7_print("U_EMROFFSETCLIPRGN", "ptl:", "", contents);
}


x86 assembly (clang, -O0):
<U_EMROFFSETCLIPRGN_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    0xed9(%rip),%rdi
lea    0xee5(%rip),%rsi
lea    0xee2(%rip),%rdx
call   1030 <core7_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMROFFSETCLIPRGN_print>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
lea    0xef2(%rip),%rsi
lea    0xeef(%rip),%rdx
jmp    1030 <core7_print@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"U_EMROFFSETCLIPRGN\00"
@.str.1 = [5 x i8] c"ptl:\00"
@.str.2 = [1 x i8] zeroinitializer
define void @U_EMROFFSETCLIPRGN_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core7_print(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"U_EMROFFSETCLIPRGN\00"
@.str.1 = [5 x i8] c"ptl:\00"
@.str.2 = [1 x i8] zeroinitializer
define void @U_EMROFFSETCLIPRGN_print(i8* %0) {
%2 = tail call i32 @core7_print(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* %0)
ret void
}
void init_HRTime() {}


x86 assembly (clang, -O0):
<init_HRTime>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_HRTime>:
ret

LLVM IR (-O0):
define void @init_HRTime() {
ret void
}

LLVM IR (-O2):
define void @init_HRTime() {
ret void
}
void sti(void) { __asm__("sti"); }


x86 assembly (clang, -O0):
<sti>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<sti>:
sti
ret

LLVM IR (-O0):
define void @sti() {
ret void
}

LLVM IR (-O2):
define void @sti() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
char *_dns_skip_qname(char const *);
const char *_dns_skip_questions(uint16_t qdcount, const char *p) {
  uint16_t i;
  for (i = 0; i < qdcount; i++) {
    p = _dns_skip_qname(p);
    p += sizeof(uint16_t);
    p += sizeof(uint16_t);
  }
  return p;
}


x86 assembly (clang, -O0):
<_dns_skip_questions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    116c <_dns_skip_questions+0x5c>
mov    -0x10(%rbp),%rdi
call   1030 <_dns_skip_qname@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <_dns_skip_questions+0x18>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dns_skip_questions>:
push   %rbx
mov    %rsi,%rax
test   %rdi,%rdi
jle    1132 <_dns_skip_questions+0x22>
mov    %rdi,%rbx
nopl   0x0(%rax)
mov    %rax,%rdi
call   1030 <_dns_skip_qname@plt>
add    $0x10,%rax
add    $0xffffffffffffffff,%rbx
jne    1120 <_dns_skip_questions+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i8* @_dns_skip_questions(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i64
store i64 %0, i64* %3
store i8* %1, i8** %4
store i64 0, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %3
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = call i8* @_dns_skip_qname(i8* %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i64 8
store i8* %14, i8** %4
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i64 8
store i8* %16, i8** %4
br label %17
17: ; preds = %10
%18 = load i64, i64* %5
%19 = add nsw i64 %18, 1
store i64 %19, i64* %5
br label %6
20: ; preds = %6
%21 = load i8*, i8** %4
ret i8* %21
}

LLVM IR (-O2):
define i8* @_dns_skip_questions(i64 %0, i8* %1) {
%3 = icmp sgt i64 %0, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = phi i8* [ %8, %4 ], [ %1, %2 ]
%7 = tail call i8* @_dns_skip_qname(i8* %6)
%8 = getelementptr inbounds i8, i8* %7, i64 16
%9 = add nuw nsw i64 %5, 1
%10 = icmp eq i64 %9, %0
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = phi i8* [ %1, %2 ], [ %8, %4 ]
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void wellcome() {
  printf("   ________                __    __                               \n "
         "  \\______ \\____________  |  | _|  | _______ _______            \n  "
         "  |    |  \\_  __ \\__  \\ |  |/ /  |/ /\\__  \\_   __ \\       \n   "
         " |    `   \\  | \\// __ \\|    <|    <  / __ \\|  | \\/        \n   "
         "/_______  /__|  (____  /__|_ \\__|_ \\(____  /__|              \n    "
         "     \\/           \\/     \\/    \\/     \\/     Web Server  \n\n");
}


x86 assembly (clang, -O0):
<wellcome>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wellcome>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [384 x i8] c" ________ __ __ \0A \\______ \\____________ | | _| | _______ _______ \0A | | \\_ __ \\__ \\ | |/ / |/ /\\__ \\_ __ \\ \0A | ` \\ | \\// __ \\| <| < / __ \\| | \\/ \0A /_______ /__| (____ /__|_ \\__|_ \\(____ /__| \0A \\/ \\/ \\/ \\/ \\/ Web Server \0A\0A\00"
define void @wellcome() {
%1 = call i32 @printf(i8* getelementptr inbounds ([384 x i8], [384 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [383 x i8] c" ________ __ __ \0A \\______ \\____________ | | _| | _______ _______ \0A | | \\_ __ \\__ \\ | |/ / |/ /\\__ \\_ __ \\ \0A | ` \\ | \\// __ \\| <| < / __ \\| | \\/ \0A /_______ /__| (____ /__|_ \\__|_ \\(____ /__| \0A \\/ \\/ \\/ \\/ \\/ Web Server \0A\00"
define void @wellcome() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([383 x i8], [383 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MODULE_ERR(char *);
int /*<<< orphan*/ cleanup(int /*<<< orphan*/);
void STRINSERT(char *S1, char *S2, short P) {
  MODULE_ERR("STRINSERT not supported yet");
  cleanup(0);
  return;
}


x86 assembly (clang, -O0):
<STRINSERT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
lea    0xec2(%rip),%rdi
call   1040 <MODULE_ERR@plt>
xor    %edi,%edi
call   1030 <cleanup@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STRINSERT>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <MODULE_ERR@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <cleanup@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"STRINSERT not supported yet\00"
define void @STRINSERT(i8* %0, i8* %1, i16 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i16
store i8* %0, i8** %4
store i8* %1, i8** %5
store i16 %2, i16* %6
%7 = call i32 @MODULE_ERR(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @cleanup(i32 0)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"STRINSERT not supported yet\00"
define void @STRINSERT(i8* nocapture readnone %0, i8* nocapture readnone %1, i16 signext %2) {
%4 = tail call i32 @MODULE_ERR(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @cleanup(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print_call_without_return_value(const char *symbol_name) {
  printf("    cutest_mock.%s.func(", symbol_name);
}


x86 assembly (clang, -O0):
<print_call_without_return_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_call_without_return_value>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [25 x i8] c" cutest_mock.%s.func(\00"
define void @print_call_without_return_value(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c" cutest_mock.%s.func(\00"
define void @print_call_without_return_value(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void I_NoAppServicesLobbyChangeTeam(const char *team) {}


x86 assembly (clang, -O0):
<I_NoAppServicesLobbyChangeTeam>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_NoAppServicesLobbyChangeTeam>:
ret

LLVM IR (-O0):
define void @I_NoAppServicesLobbyChangeTeam(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @I_NoAppServicesLobbyChangeTeam(i8* nocapture %0) {
ret void
}
float clamp_float(float a) {
  if (a > 1.)
    return 1.;
  else if (a < 0)
    return 0;
  else
    return a;
}


x86 assembly (clang, -O0):
<clamp_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1136 <clamp_float+0x36>
movss  0xedc(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115a <clamp_float+0x5a>
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1150 <clamp_float+0x50>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115a <clamp_float+0x5a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp_float>:
xorps  %xmm2,%xmm2
maxss  %xmm0,%xmm2
movss  0xef1(%rip),%xmm3
movaps %xmm3,%xmm1
cmpltss %xmm0,%xmm1
movaps %xmm1,%xmm0
andnps %xmm2,%xmm0
andps  %xmm3,%xmm1
orps   %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @clamp_float(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = fcmp ogt double %5, 1.000000e+00
br i1 %6, label %7, label %8
7: ; preds = %1
store float 1.000000e+00, float* %2
br label %14
8: ; preds = %1
%9 = load float, float* %3
%10 = fcmp olt float %9, 0.000000e+00
br i1 %10, label %11, label %12
11: ; preds = %8
store float 0.000000e+00, float* %2
br label %14
12: ; preds = %8
%13 = load float, float* %3
store float %13, float* %2
br label %14
14: ; preds = %12, %11, %7
%15 = load float, float* %2
ret float %15
}

LLVM IR (-O2):
define float @clamp_float(float %0) {
%2 = fcmp ogt float %0, 1.000000e+00
%3 = fcmp olt float %0, 0.000000e+00
%4 = select i1 %3, float 0.000000e+00, float %0
%5 = select i1 %2, float 1.000000e+00, float %4
ret float %5
}
int test_imm_D4uint16_reg(unsigned short val) {
  return ((val) & (-0xD4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D4uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff2c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D4uint16_reg>:
test   $0xff2c,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D4uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -212
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D4uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -212
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void check_keys_pressed(float x, float y, int state) {}


x86 assembly (clang, -O0):
<check_keys_pressed>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_keys_pressed>:
ret

LLVM IR (-O0):
define void @check_keys_pressed(float %0, float %1, i32 %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca i32
store float %0, float* %4
store float %1, float* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @check_keys_pressed(float %0, float %1, i32 %2) {
ret void
}
int test_imm_38int16_mem(short *val) {
  return ((*val) & (0x38 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_38int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x38,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_38int16_mem>:
testb  $0x38,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_38int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 56
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_38int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 56
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_32int16_reg(short val) {
  return ((val) & (-0x32 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_32int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffce,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_32int16_reg>:
test   $0xffce,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_32int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -50
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_32int16_reg(i16 signext %0) {
%2 = and i16 %0, -50
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
float sqrt(float const);
float glmComputeVectorLength3f(const float v[3]) {
  return sqrt(v[0] * v[0] + v[1] * v[1] + v[2] * v[2]);
}


x86 assembly (clang, -O0):
<glmComputeVectorLength3f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmComputeVectorLength3f>:
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm0
mulss  %xmm0,%xmm0
mulss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  0x8(%rdi),%xmm0
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     113f <glmComputeVectorLength3f+0x2f>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @glmComputeVectorLength3f(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = load float*, float** %2
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
%15 = fmul float %11, %14
%16 = call float @llvm.fmuladd.f32(float %5, float %8, float %15)
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 2
%19 = load float, float* %18
%20 = load float*, float** %2
%21 = getelementptr inbounds float, float* %20, i64 2
%22 = load float, float* %21
%23 = call float @llvm.fmuladd.f32(float %19, float %22, float %16)
%24 = call float @sqrt(float %23)
ret float %24
}

LLVM IR (-O2):
define float @glmComputeVectorLength3f(float* nocapture %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = fmul float %4, %4
%6 = tail call float @llvm.fmuladd.f32(float %2, float %2, float %5)
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = tail call float @llvm.fmuladd.f32(float %8, float %8, float %6)
%10 = tail call float @sqrt(float %9)
ret float %10
}
unsigned long get_uart_base(void) { return 0; }


x86 assembly (clang, -O0):
<get_uart_base>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_uart_base>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @get_uart_base() {
ret i64 0
}

LLVM IR (-O2):
define i64 @get_uart_base() {
ret i64 0
}
int posneg(int num) {
  if (num > 0)
    return (1);
  else if (num < 0)
    return (-1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<posneg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    111d <posneg+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    113a <posneg+0x3a>
cmpl   $0x0,-0x8(%rbp)
jge    1133 <posneg+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    113a <posneg+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posneg>:
mov    %edi,%ecx
sar    $0x1f,%ecx
test   %edi,%edi
mov    $0x1,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @posneg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @posneg(i32 %0) {
%2 = ashr i32 %0, 31
%3 = icmp slt i32 %0, 1
%4 = select i1 %3, i32 %2, i32 1
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void USBHostResume(uint32_t ui32Base, bool bStart) {
  ;
  if (bStart) {
    (*((volatile unsigned char *)(ui32Base + 0x00000001))) |= 0x00000004;
  } else {
    (*((volatile unsigned char *)(ui32Base + 0x00000001))) &= ~0x00000004;
  }
}


x86 assembly (clang, -O0):
<USBHostResume>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     112a <USBHostResume+0x2a>
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
movzbl %cl,%ecx
or     $0x4,%ecx
mov    %cl,0x1(%rax)
jmp    113a <USBHostResume+0x3a>
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
movzbl %cl,%ecx
and    $0xfffffffb,%ecx
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostResume>:
test   %esi,%esi
setne  %al
mov    0x1(%rdi),%cl
and    $0xfb,%cl
shl    $0x2,%al
or     %cl,%al
mov    %al,0x1(%rdi)
ret

LLVM IR (-O0):
define void @USBHostResume(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 1
%10 = inttoptr i64 %9 to i8*
%11 = load volatile i8, i8* %10
%12 = zext i8 %11 to i32
%13 = or i32 %12, 4
%14 = trunc i32 %13 to i8
store volatile i8 %14, i8* %10
br label %23
15: ; preds = %2
%16 = load i64, i64* %3
%17 = add nsw i64 %16, 1
%18 = inttoptr i64 %17 to i8*
%19 = load volatile i8, i8* %18
%20 = zext i8 %19 to i32
%21 = and i32 %20, -5
%22 = trunc i32 %21 to i8
store volatile i8 %22, i8* %18
br label %23
23: ; preds = %15, %7
ret void
}

LLVM IR (-O2):
define void @USBHostResume(i64 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add nsw i64 %0, 1
%5 = inttoptr i64 %4 to i8*
%6 = load volatile i8, i8* %5
%7 = and i8 %6, -5
%8 = select i1 %3, i8 0, i8 4
%9 = or i8 %7, %8
store volatile i8 %9, i8* %5
ret void
}
/* Variables and functions */
unsigned long native_read_cr4();
__attribute__((always_)) unsigned long native_read_cr4_safe(void) {
  unsigned long val;
  val = native_read_cr4();
  return val;
}


x86 assembly (clang, -O0):
<native_read_cr4_safe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <native_read_cr4@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_read_cr4_safe>:
xor    %eax,%eax
jmp    1030 <native_read_cr4@plt>

LLVM IR (-O0):
define i64 @native_read_cr4_safe() {
%1 = alloca i64
%2 = call i64 (...) @native_read_cr4()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @native_read_cr4_safe() {
%1 = tail call i64 (...) @native_read_cr4()
ret i64 %1
}
int is_big_endian(void) {
  short int word = 0x0001;
  char *byte = (char *)&word;
  return (byte[0] ? 0 : 1);
}


x86 assembly (clang, -O0):
<is_big_endian>:
push   %rbp
mov    %rsp,%rbp
movw   $0x1,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_big_endian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_big_endian() {
%1 = alloca i16
%2 = alloca i8*
store i16 1, i16* %1
%3 = bitcast i16* %1 to i8*
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 0, i32 1
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_big_endian() {
ret i32 0
}
unsigned int out(int h, int l, int a) { return (0); }


x86 assembly (clang, -O0):
<out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<out>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @out(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @out(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
extern int func9(void) { return 9; }


x86 assembly (clang, -O0):
<func9>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func9>:
mov    $0x9,%eax
ret

LLVM IR (-O0):
define i32 @func9() {
ret i32 9
}

LLVM IR (-O2):
define i32 @func9() {
ret i32 9
}
/* Variables and functions */
int /*<<< orphan*/ meUtilityDcacheWritebackInvalidateAll();
scalar_t__ meUtilityIsME();
int /*<<< orphan*/ sceKernelDelayThread(int /*<<< orphan*/);
void YabThreadYield(void) {
  if (meUtilityIsME()) {
    meUtilityDcacheWritebackInvalidateAll();
  } else {
    sceKernelDelayThread(0);
  }
}


x86 assembly (clang, -O0):
<YabThreadYield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <meUtilityIsME@plt>
cmp    $0x0,%rax
je     1151 <YabThreadYield+0x21>
mov    $0x0,%al
call   1030 <meUtilityDcacheWritebackInvalidateAll@plt>
jmp    1158 <YabThreadYield+0x28>
xor    %edi,%edi
call   1050 <sceKernelDelayThread@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<YabThreadYield>:
push   %rax
xor    %eax,%eax
call   1040 <meUtilityIsME@plt>
test   %rax,%rax
je     1145 <YabThreadYield+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1030 <meUtilityDcacheWritebackInvalidateAll@plt>
xor    %edi,%edi
pop    %rax
jmp    1050 <sceKernelDelayThread@plt>

LLVM IR (-O0):
define void @YabThreadYield() {
%1 = call i64 (...) @meUtilityIsME()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @meUtilityDcacheWritebackInvalidateAll()
br label %7
5: ; preds = %0
%6 = call i32 @sceKernelDelayThread(i32 0)
br label %7
7: ; preds = %5, %3
ret void
}

LLVM IR (-O2):
define void @YabThreadYield() {
%1 = tail call i64 (...) @meUtilityIsME()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @meUtilityDcacheWritebackInvalidateAll()
br label %7
5: ; preds = %0
%6 = tail call i32 @sceKernelDelayThread(i32 0)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRSETWINDOWORG_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 2, torev);
}


x86 assembly (clang, -O0):
<U_WMRSETWINDOWORG_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x2,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRSETWINDOWORG_swap>:
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRSETWINDOWORG_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 2, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRSETWINDOWORG_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 2, i32 %1)
ret void
}
void f161(void) {
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  ({
    a:
      ({ 0; });
      ({ 0; });
      goto a;
      0;
  });
  0;
}


x86 assembly (clang, -O0):
<f161>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
jmp    1119 <f161+0x19>

x86 assembly (clang, -O2):
<f161>:
jmp    1100 <f161>

LLVM IR (-O0):
define void @f161() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
%7 = load i32, i32* %1
store i32 0, i32* %2
%8 = load i32, i32* %2
store i32 0, i32* %3
%9 = load i32, i32* %3
br label %10
10: ; preds = %10, %0
store i32 0, i32* %4
%11 = load i32, i32* %4
store i32 0, i32* %5
%12 = load i32, i32* %5
br label %10
}

LLVM IR (-O2):
define void @f161() {
br label %1
1: ; preds = %1, %0
br label %1
}
int dmp_cm_edit_config(void) { return 0; }


x86 assembly (clang, -O0):
<dmp_cm_edit_config>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmp_cm_edit_config>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dmp_cm_edit_config() {
ret i32 0
}

LLVM IR (-O2):
define i32 @dmp_cm_edit_config() {
ret i32 0
}
void outer_inv_all(void) {}


x86 assembly (clang, -O0):
<outer_inv_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outer_inv_all>:
ret

LLVM IR (-O0):
define void @outer_inv_all() {
ret void
}

LLVM IR (-O2):
define void @outer_inv_all() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ digi_init();
int app_main() {
  int ii;
  unsigned int led = 8;
  digi_init();
  while (1) {
    (*(volatile unsigned int *)((0x3FF0000 + 0x5008)) = (~led));
    led = led >> 1;
    if (!led)
      led = 8;
    for (ii = 0; ii < 100000; ii++)
      ;
  }
}


x86 assembly (clang, -O0):
<app_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x8,-0x8(%rbp)
mov    $0x0,%al
call   1030 <digi_init@plt>
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
mov    $0x3ff5008,%eax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    114d <app_main+0x3d>
movl   $0x8,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x186a0,-0x4(%rbp)
jge    1174 <app_main+0x64>
jmp    1166 <app_main+0x56>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <app_main+0x44>
jmp    1126 <app_main+0x16>

x86 assembly (clang, -O2):
<app_main>:
push   %rax
xor    %eax,%eax
call   1030 <digi_init@plt>
mov    $0x8,%eax
mov    $0x8,%edx
mov    %edx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
shr    %ecx
cmp    $0x2,%edx
not    %edx
mov    %edx,0x3ff5008
cmovb  %eax,%ecx
mov    %ecx,%edx
jmp    1130 <app_main+0x20>

LLVM IR (-O0):
define i32 @app_main() {
%1 = alloca i32
%2 = alloca i32
store i32 8, i32* %2
%3 = call i32 (...) @digi_init()
br label %4
4: ; preds = %0, %20
%5 = load i32, i32* %2
%6 = xor i32 %5, -1
store volatile i32 %6, i32* inttoptr (i64 67063816 to i32*)
%7 = load i32, i32* %2
%8 = lshr i32 %7, 1
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %4
store i32 8, i32* %2
br label %12
12: ; preds = %11, %4
store i32 0, i32* %1
br label %13
13: ; preds = %17, %12
%14 = load i32, i32* %1
%15 = icmp slt i32 %14, 100000
br i1 %15, label %16, label %20
16: ; preds = %13
br label %17
17: ; preds = %16
%18 = load i32, i32* %1
%19 = add nsw i32 %18, 1
store i32 %19, i32* %1
br label %13
20: ; preds = %13
br label %4
}

LLVM IR (-O2):
define i32 @app_main() {
%1 = tail call i32 (...) @digi_init()
br label %2
2: ; preds = %2, %0
%3 = phi i32 [ 8, %0 ], [ %7, %2 ]
%4 = xor i32 %3, -1
store volatile i32 %4, i32* inttoptr (i64 67063816 to i32*)
%5 = icmp ult i32 %3, 2
%6 = lshr i32 %3, 1
%7 = select i1 %5, i32 8, i32 %6
br label %2
}
int FC(int row, int col) {
  register int row2 = row % 2;
  register int col2 = col % 2;
  if (row2 == 0 && col2 == 0)
    return 0;
  else if (row2 == 1 && col2 == 1)
    return 2;
  else
    return 1;
}


x86 assembly (clang, -O0):
<FC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1146 <FC+0x46>
cmpl   $0x0,-0x14(%rbp)
jne    1146 <FC+0x46>
movl   $0x0,-0x4(%rbp)
jmp    116d <FC+0x6d>
cmpl   $0x1,-0x10(%rbp)
jne    1166 <FC+0x66>
cmpl   $0x1,-0x14(%rbp)
jne    1166 <FC+0x66>
movl   $0x2,-0x4(%rbp)
jmp    116d <FC+0x6d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FC>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
and    $0xfffffffe,%eax
sub    %eax,%edi
mov    %esi,%eax
shr    $0x1f,%eax
add    %esi,%eax
and    $0xfffffffe,%eax
sub    %eax,%esi
mov    %edi,%eax
xor    $0x1,%eax
mov    %esi,%ecx
xor    $0x1,%ecx
xor    %edx,%edx
or     %eax,%ecx
sete   %dl
add    $0x1,%edx
xor    %eax,%eax
or     %edi,%esi
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @FC(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = load i32, i32* %4
%9 = srem i32 %8, 2
store i32 %9, i32* %6
%10 = load i32, i32* %5
%11 = srem i32 %10, 2
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %2
%15 = load i32, i32* %7
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 0, i32* %3
br label %26
18: ; preds = %14, %2
%19 = load i32, i32* %6
%20 = icmp eq i32 %19, 1
br i1 %20, label %21, label %25
21: ; preds = %18
%22 = load i32, i32* %7
%23 = icmp eq i32 %22, 1
br i1 %23, label %24, label %25
24: ; preds = %21
store i32 2, i32* %3
br label %26
25: ; preds = %21, %18
store i32 1, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @FC(i32 %0, i32 %1) {
%3 = srem i32 %0, 2
%4 = srem i32 %1, 2
%5 = or i32 %4, %3
%6 = icmp eq i32 %5, 0
%7 = icmp eq i32 %3, 1
%8 = icmp eq i32 %4, 1
%9 = and i1 %7, %8
%10 = select i1 %9, i32 2, i32 1
%11 = select i1 %6, i32 0, i32 %10
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
unsigned int aarch64_banked_spsr_index(unsigned int el) {
  static const unsigned int map[4] = {
      [1] = 1,
      [2] = 6,
      [3] = 7,
  };
  assert(el >= 1 && el <= 3);
  return map[el];
}


x86 assembly (clang, -O0):
<aarch64_banked_spsr_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jb     1134 <aarch64_banked_spsr_index+0x24>
cmpl   $0x3,-0x4(%rbp)
setbe  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
lea    0xeb3(%rip),%rax
mov    (%rax,%rcx,4),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aarch64_banked_spsr_index>:
push   %rbx
mov    %edi,%ebx
lea    -0x1(%rbx),%eax
xor    %edi,%edi
cmp    $0x3,%eax
setb   %dil
call   1030 <assert@plt>
mov    %ebx,%eax
lea    0xed3(%rip),%rcx
mov    (%rcx,%rax,4),%eax
pop    %rbx
ret

LLVM IR (-O0):
@aarch64_banked_spsr_index.map = internal constant [4 x i32] [i32 0, i32 1, i32 6, i32 7]
define i32 @aarch64_banked_spsr_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp uge i32 %3, 1
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 3
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i32, i32* %2
%13 = zext i32 %12 to i64
%14 = getelementptr inbounds [4 x i32], [4 x i32]* @aarch64_banked_spsr_index.map, i64 0, i64 %13
%15 = load i32, i32* %14
ret i32 %15
}

LLVM IR (-O2):
@aarch64_banked_spsr_index.map = internal unnamed_addr constant [4 x i32] [i32 0, i32 1, i32 6, i32 7]
define i32 @aarch64_banked_spsr_index(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = zext i32 %0 to i64
%7 = getelementptr inbounds [4 x i32], [4 x i32]* @aarch64_banked_spsr_index.map, i64 0, i64 %6
%8 = load i32, i32* %7
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void KIFPrintTailer(FILE *Stream) {
  fprintf(Stream, ";-----------------------------------------------------------"
                  "-------------------\n");
}


x86 assembly (clang, -O0):
<KIFPrintTailer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KIFPrintTailer>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x50,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [81 x i8] c";------------------------------------------------------------------------------\0A\00"
define void @KIFPrintTailer(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [81 x i8] c";------------------------------------------------------------------------------\0A\00"
define void @KIFPrintTailer(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0), i64 80, i64 1, i32* %0)
ret void
}
void quadd_proc_init(struct quadd_ctx *context) {}


x86 assembly (clang, -O0):
<quadd_proc_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quadd_proc_init>:
ret

LLVM IR (-O0):
%struct.quadd_ctx = type opaque
define void @quadd_proc_init(%struct.quadd_ctx* %0) {
%2 = alloca %struct.quadd_ctx*
store %struct.quadd_ctx* %0, %struct.quadd_ctx** %2
ret void
}

LLVM IR (-O2):
%struct.quadd_ctx = type opaque
define void @quadd_proc_init(%struct.quadd_ctx* nocapture %0) {
ret void
}