xunge/DecIR huggingface dataset:
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ display();
int main(void) {
  display();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <display@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <display@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @display()
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @display()
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ util_daemonize_self();
int /*<<< orphan*/ util_init_rand();
void posixint() {
  util_daemonize_self();
  util_init_rand();
}


x86 assembly (clang, -O0):
<posixint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <util_daemonize_self@plt>
mov    $0x0,%al
call   1040 <util_init_rand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<posixint>:
push   %rax
xor    %eax,%eax
call   1030 <util_daemonize_self@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <util_init_rand@plt>

LLVM IR (-O0):
define void @posixint() {
%1 = call i32 (...) @util_daemonize_self()
%2 = call i32 (...) @util_init_rand()
ret void
}

LLVM IR (-O2):
define void @posixint() {
%1 = tail call i32 (...) @util_daemonize_self()
%2 = tail call i32 (...) @util_init_rand()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__1__GeneralIO__clr();
void CC2420ControlP__CSN__clr(void) { Msp430GpioC__1__GeneralIO__clr(); }


x86 assembly (clang, -O0):
<CC2420ControlP__CSN__clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__1__GeneralIO__clr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420ControlP__CSN__clr>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__1__GeneralIO__clr@plt>

LLVM IR (-O0):
define void @CC2420ControlP__CSN__clr() {
%1 = call i32 (...) @Msp430GpioC__1__GeneralIO__clr()
ret void
}

LLVM IR (-O2):
define void @CC2420ControlP__CSN__clr() {
%1 = tail call i32 (...) @Msp430GpioC__1__GeneralIO__clr()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vrp_keep();
void f3(int s, int b) {
  if (s >> 3 == -2) {
    s += 17;
    b = (b & 1) + 1;
    b = b << s;
    if (b == 2)
      vrp_keep();
    if (b == 512)
      vrp_keep();
  }
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
cmp    $0xfffffffe,%eax
jne    1177 <f3+0x67>
mov    -0x4(%rbp),%eax
add    $0x11,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    115e <f3+0x4e>
mov    $0x0,%al
call   1030 <vrp_keep@plt>
cmpl   $0x200,-0x8(%rbp)
jne    1172 <f3+0x62>
mov    $0x0,%al
call   1030 <vrp_keep@plt>
jmp    1177 <f3+0x67>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
mov    %edi,%eax
and    $0xfffffff8,%eax
cmp    $0xfffffff0,%eax
jne    113c <f3+0x2c>
and    $0x1,%esi
add    $0x1,%esi
add    $0x11,%dil
mov    %edi,%ecx
shl    %cl,%esi
cmp    $0x200,%esi
je     1135 <f3+0x25>
cmp    $0x2,%esi
jne    113c <f3+0x2c>
xor    %eax,%eax
jmp    1030 <vrp_keep@plt>
ret

LLVM IR (-O0):
define void @f3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 3
%7 = icmp eq i32 %6, -2
br i1 %7, label %8, label %27
8: ; preds = %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 17
store i32 %10, i32* %3
%11 = load i32, i32* %4
%12 = and i32 %11, 1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %4
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = shl i32 %14, %15
store i32 %16, i32* %4
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 2
br i1 %18, label %19, label %21
19: ; preds = %8
%20 = call i32 (...) @vrp_keep()
br label %21
21: ; preds = %19, %8
%22 = load i32, i32* %4
%23 = icmp eq i32 %22, 512
br i1 %23, label %24, label %26
24: ; preds = %21
%25 = call i32 (...) @vrp_keep()
br label %26
26: ; preds = %24, %21
br label %27
27: ; preds = %26, %2
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0, i32 %1) {
%3 = and i32 %0, -8
%4 = icmp eq i32 %3, -16
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = add nsw i32 %0, 17
%7 = and i32 %1, 1
%8 = add nuw nsw i32 %7, 1
%9 = shl nuw nsw i32 %8, %6
switch i32 %9, label %12 [
i32 2, label %10
i32 512, label %10
]
10: ; preds = %5, %5
%11 = tail call i32 (...) @vrp_keep()
br label %12
12: ; preds = %10, %5, %2
ret void
}
/* Type definitions */
struct options {
  int dummy;
};

/* Variables and functions */
int do_solve(struct options const *, int /*<<< orphan*/);
int cmd_examine(const struct options *opt) { return do_solve(opt, 0); }


x86 assembly (clang, -O0):
<cmd_examine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <do_solve@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_examine>:
xor    %esi,%esi
jmp    1030 <do_solve@plt>

LLVM IR (-O0):
%struct.options = type { i32 }
define i32 @cmd_examine(%struct.options* %0) {
%2 = alloca %struct.options*
store %struct.options* %0, %struct.options** %2
%3 = load %struct.options*, %struct.options** %2
%4 = call i32 @do_solve(%struct.options* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.options = type { i32 }
define i32 @cmd_examine(%struct.options* %0) {
%2 = tail call i32 @do_solve(%struct.options* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ pic_read_config();
int /*<<< orphan*/ stk500v2_cleanup();
int /*<<< orphan*/ stk500v2_failed();
int /*<<< orphan*/ stk500v2_ok();
void stk500v2_enter_progmode_isp(void) {
  ;
  stk500v2_cleanup();
  if (pic_read_config() == 0) {
    stk500v2_ok();
    return;
  }
  stk500v2_failed();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <stk500v2_cleanup@plt>
mov    $0x0,%al
call   1030 <pic_read_config@plt>
cmp    $0x0,%rax
jne    1168 <stk500v2_enter_progmode_isp+0x28>
mov    $0x0,%al
call   1040 <stk500v2_ok@plt>
jmp    116f <stk500v2_enter_progmode_isp+0x2f>
mov    $0x0,%al
call   1050 <stk500v2_failed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1060 <stk500v2_cleanup@plt>
xor    %eax,%eax
call   1030 <pic_read_config@plt>
test   %rax,%rax
je     115c <stk500v2_enter_progmode_isp+0x1c>
xor    %eax,%eax
pop    %rcx
jmp    1050 <stk500v2_failed@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <stk500v2_ok@plt>

LLVM IR (-O0):
define void @stk500v2_enter_progmode_isp() {
%1 = call i32 (...) @stk500v2_cleanup()
%2 = call i64 (...) @pic_read_config()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @stk500v2_ok()
br label %8
6: ; preds = %0
%7 = call i32 (...) @stk500v2_failed()
br label %8
8: ; preds = %6, %4
ret void
}

LLVM IR (-O2):
define void @stk500v2_enter_progmode_isp() {
%1 = tail call i32 (...) @stk500v2_cleanup()
%2 = tail call i64 (...) @pic_read_config()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 (...) @stk500v2_ok()
br label %8
6: ; preds = %0
%7 = tail call i32 (...) @stk500v2_failed()
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
void *realloc(void *, unsigned int);
void *c_realloc(void *ptr, unsigned int size) { return realloc(ptr, size); }


x86 assembly (clang, -O0):
<c_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @c_realloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @realloc(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @c_realloc(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printPrivate(char *);
void isStillLocked(void) { printPrivate("That is locked.\n"); }


x86 assembly (clang, -O0):
<isStillLocked>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printPrivate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isStillLocked>:
lea    0xee9(%rip),%rdi
jmp    1030 <printPrivate@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"That is locked.\0A\00"
define void @isStillLocked() {
%1 = call i32 @printPrivate(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"That is locked.\0A\00"
define void @isStillLocked() {
%1 = tail call i32 @printPrivate(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ testequal(int, int);
int main() {
  testequal(8529, 79);
  testequal(85299258, 31);
  testequal(5634, 57);
  testequal(1111111111, 71);
  testequal(987654321, 30);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2151,%edi
mov    $0x4f,%esi
call   1030 <testequal@plt>
mov    $0x515903a,%edi
mov    $0x1f,%esi
call   1030 <testequal@plt>
mov    $0x1602,%edi
mov    $0x39,%esi
call   1030 <testequal@plt>
mov    $0x423a35c7,%edi
mov    $0x47,%esi
call   1030 <testequal@plt>
mov    $0x3ade68b1,%edi
mov    $0x1e,%esi
call   1030 <testequal@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2151,%edi
mov    $0x4f,%esi
call   1030 <testequal@plt>
mov    $0x515903a,%edi
mov    $0x1f,%esi
call   1030 <testequal@plt>
mov    $0x1602,%edi
mov    $0x39,%esi
call   1030 <testequal@plt>
mov    $0x423a35c7,%edi
mov    $0x47,%esi
call   1030 <testequal@plt>
mov    $0x3ade68b1,%edi
mov    $0x1e,%esi
call   1030 <testequal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @testequal(i32 8529, i32 79)
%3 = call i32 @testequal(i32 85299258, i32 31)
%4 = call i32 @testequal(i32 5634, i32 57)
%5 = call i32 @testequal(i32 1111111111, i32 71)
%6 = call i32 @testequal(i32 987654321, i32 30)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @testequal(i32 8529, i32 79)
%2 = tail call i32 @testequal(i32 85299258, i32 31)
%3 = tail call i32 @testequal(i32 5634, i32 57)
%4 = tail call i32 @testequal(i32 1111111111, i32 71)
%5 = tail call i32 @testequal(i32 987654321, i32 30)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgcalswtch(void) { gen("jmp\tswitch"); }


x86 assembly (clang, -O0):
<cgcalswtch>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgcalswtch>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"jmp\09switch\00"
define void @cgcalswtch() {
%1 = call i32 @gen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"jmp\09switch\00"
define void @cgcalswtch() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
void RandomFunc(unsigned long input[1], unsigned long output[1]) {
  unsigned long state[1];
  unsigned long local2;
  unsigned long local1;
  {
    state[0UL] = input[0UL] + 0xffffffffff660b45UL;
    local1 = 0UL;
    while (local1 < 0UL) {
      local2 = 0UL;
      while (local2 < 0UL) {
        local2 += 2UL;
      }
      local1 += 2UL;
    }
    output[0UL] = (state[0UL] - 146565199UL) + 0xfd76d96b99e243c4UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0xffffffffff660b45,%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jae    1165 <RandomFunc+0x65>
movq   $0x0,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jae    1154 <RandomFunc+0x54>
mov    -0x20(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x20(%rbp)
jmp    1138 <RandomFunc+0x38>
mov    -0x28(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x28(%rbp)
jmp    1125 <RandomFunc+0x25>
mov    -0x18(%rbp),%rcx
sub    $0x8bc684f,%rcx
movabs $0xfd76d96b99e243c4,%rax
d9 76 fd
add    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movabs $0xfd76d96b908be6ba,%rax
d9 76 fd
add    (%rdi),%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca [1 x i64]
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %3
store i64* %1, i64** %4
%8 = load i64*, i64** %3
%9 = getelementptr inbounds i64, i64* %8, i64 0
%10 = load i64, i64* %9
%11 = add i64 %10, -10089659
%12 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
store i64 %11, i64* %12
store i64 0, i64* %7
br label %13
13: ; preds = %23, %2
%14 = load i64, i64* %7
%15 = icmp ult i64 %14, 0
br i1 %15, label %16, label %26
16: ; preds = %13
store i64 0, i64* %6
br label %17
17: ; preds = %20, %16
%18 = load i64, i64* %6
%19 = icmp ult i64 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %17
%21 = load i64, i64* %6
%22 = add i64 %21, 2
store i64 %22, i64* %6
br label %17
23: ; preds = %17
%24 = load i64, i64* %7
%25 = add i64 %24, 2
store i64 %25, i64* %7
br label %13
26: ; preds = %13
%27 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%28 = load i64, i64* %27
%29 = sub i64 %28, 146565199
%30 = add i64 %29, -182719678695455804
%31 = load i64*, i64** %4
%32 = getelementptr inbounds i64, i64* %31, i64 0
store i64 %30, i64* %32
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i64* nocapture %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* %0
%4 = add i64 %3, -182719678852110662
store i64 %4, i64* %1
ret void
}
/* Variables and functions */
int close(int);
int do_close(int fd) { return close(fd); }


x86 assembly (clang, -O0):
<do_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @do_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @do_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
int main() {
  int a = 19;
  return *&a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x13,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x13,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 19, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 19
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_enter_exit_4ba(struct flashrom_flashctx *, int);
int spi_exit_4ba(struct flashrom_flashctx *flash) {
  return spi_enter_exit_4ba(flash, false);
}


x86 assembly (clang, -O0):
<spi_exit_4ba>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <spi_enter_exit_4ba@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_exit_4ba>:
xor    %esi,%esi
jmp    1030 <spi_enter_exit_4ba@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_exit_4ba(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @spi_enter_exit_4ba(%struct.flashrom_flashctx* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_exit_4ba(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @spi_enter_exit_4ba(%struct.flashrom_flashctx* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void deallocate(void *p) {
  if (p) {
    free(p);
  }
}


x86 assembly (clang, -O0):
<deallocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <deallocate+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deallocate>:
test   %rdi,%rdi
je     111a <deallocate+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @deallocate(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @deallocate(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ nsec_to_usec(unsigned long);
int /*<<< orphan*/ tv_add_usec(struct timeval *, int /*<<< orphan*/);
void tv_add_nsec(struct timeval *tv, unsigned long nsec) {
  tv_add_usec(tv, nsec_to_usec(nsec));
}


x86 assembly (clang, -O0):
<tv_add_nsec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <nsec_to_usec@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1040 <tv_add_usec@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tv_add_nsec>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <nsec_to_usec@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <tv_add_usec@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define void @tv_add_nsec(%struct.timeval* %0, i64 %1) {
%3 = alloca %struct.timeval*
%4 = alloca i64
store %struct.timeval* %0, %struct.timeval** %3
store i64 %1, i64* %4
%5 = load %struct.timeval*, %struct.timeval** %3
%6 = load i64, i64* %4
%7 = call i32 @nsec_to_usec(i64 %6)
%8 = call i32 @tv_add_usec(%struct.timeval* %5, i32 %7)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define void @tv_add_nsec(%struct.timeval* %0, i64 %1) {
%3 = tail call i32 @nsec_to_usec(i64 %1)
%4 = tail call i32 @tv_add_usec(%struct.timeval* %0, i32 %3)
ret void
}
int g(b) { int a = b; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
store i32 %5, i32* %4
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ curs_set(int);
int /*<<< orphan*/ echo();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ nocbreak();
void destroy_graphics(void) {
  nocbreak();
  echo();
  curs_set(1);
  endwin();
}


x86 assembly (clang, -O0):
<destroy_graphics>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <nocbreak@plt>
mov    $0x0,%al
call   1030 <echo@plt>
mov    $0x1,%edi
call   1060 <curs_set@plt>
mov    $0x0,%al
call   1040 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_graphics>:
push   %rax
xor    %eax,%eax
call   1050 <nocbreak@plt>
xor    %eax,%eax
call   1030 <echo@plt>
mov    $0x1,%edi
call   1060 <curs_set@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <endwin@plt>

LLVM IR (-O0):
define void @destroy_graphics() {
%1 = call i32 (...) @nocbreak()
%2 = call i32 (...) @echo()
%3 = call i32 @curs_set(i32 1)
%4 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @destroy_graphics() {
%1 = tail call i32 (...) @nocbreak()
%2 = tail call i32 (...) @echo()
%3 = tail call i32 @curs_set(i32 1)
%4 = tail call i32 (...) @endwin()
ret void
}
/* Variables and functions */
size_t base64_encoded_size(size_t size) {
  return ((size + (3 - (size % 3))) / 3) * 4;
}


x86 assembly (clang, -O0):
<base64_encoded_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
mov    -0x10(%rbp),%rax
mov    $0x3,%ecx
sub    %rdx,%rcx
add    %rcx,%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
shl    $0x2,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_encoded_size>:
movabs $0xaaaaaaaaaaaaaaab,%rcx
aa aa aa
mov    %rdi,%rax
mul    %rcx
shr    %rdx
lea    (%rdx,%rdx,2),%rdx
mov    %rdi,%rax
sub    %rdx,%rax
xor    $0x3,%rax
add    %rdi,%rax
mul    %rcx
lea    (%rdx,%rdx,1),%rax
and    $0xfffffffffffffffc,%rax
ret

LLVM IR (-O0):
define i64 @base64_encoded_size(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = urem i64 %4, 3
%6 = sub i64 3, %5
%7 = add i64 %3, %6
%8 = udiv i64 %7, 3
%9 = mul i64 %8, 4
ret i64 %9
}

LLVM IR (-O2):
define i64 @base64_encoded_size(i64 %0) {
%2 = urem i64 %0, 3
%3 = xor i64 %2, 3
%4 = add i64 %3, %0
%5 = udiv i64 %4, 3
%6 = shl i64 %5, 2
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ first_frame();
int main() {
  first_frame();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <first_frame@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <first_frame@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @first_frame()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @first_frame()
ret i32 0
}
float Calc_InterpolateFrom3Floats(float value0, float value1, float fraction) {
  return value0 + fraction * (value1 - value0);
}


x86 assembly (clang, -O0):
<Calc_InterpolateFrom3Floats>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Calc_InterpolateFrom3Floats>:
subss  %xmm0,%xmm1
mulss  %xmm2,%xmm1
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Calc_InterpolateFrom3Floats(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = load float, float* %5
%10 = load float, float* %4
%11 = fsub float %9, %10
%12 = call float @llvm.fmuladd.f32(float %8, float %11, float %7)
ret float %12
}

LLVM IR (-O2):
define float @Calc_InterpolateFrom3Floats(float %0, float %1, float %2) {
%4 = fsub float %1, %0
%5 = tail call float @llvm.fmuladd.f32(float %2, float %4, float %0)
ret float %5
}
scrnextdw(f, n) int f, n;
{
  nextwind(0, 1);
  forwpage(f, n);
  prevwind(0, 1);
}


x86 assembly (clang, -O0):
<scrnextdw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1040 <nextwind@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <forwpage@plt>
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1050 <prevwind@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scrnextdw>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
mov    $0x1,%esi
xor    %eax,%eax
call   1040 <nextwind@plt>
mov    %ebp,%edi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <forwpage@plt>
xor    %edi,%edi
mov    $0x1,%esi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <prevwind@plt>

LLVM IR (-O0):
define i32 @scrnextdw(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (i32, i32, ...) bitcast (i32 (...)* @nextwind to i32 (i32, i32, ...)*)(i32 0, i32 1)
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 (i32, i32, ...) bitcast (i32 (...)* @forwpage to i32 (i32, i32, ...)*)(i32 %7, i32 %8)
%10 = call i32 (i32, i32, ...) bitcast (i32 (...)* @prevwind to i32 (i32, i32, ...)*)(i32 0, i32 1)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @scrnextdw(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @nextwind to i32 (i32, i32, ...)*)(i32 0, i32 1)
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @forwpage to i32 (i32, i32, ...)*)(i32 %0, i32 %1)
%5 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @prevwind to i32 (i32, i32, ...)*)(i32 0, i32 1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ str_printf(char *, int *, char *, long);
void write_long(char *out, int *written, void *ld) {
  str_printf(out, written, "%ld", (long)ld);
}


x86 assembly (clang, -O0):
<write_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
lea    0xec9(%rip),%rdx
call   1030 <str_printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_long>:
mov    %rdx,%rcx
lea    0xee6(%rip),%rdx
jmp    1030 <str_printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%ld\00"
define void @write_long(i8* %0, i32* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i8*
store i8* %0, i8** %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32*, i32** %5
%9 = load i8*, i8** %6
%10 = ptrtoint i8* %9 to i64
%11 = call i32 @str_printf(i8* %7, i32* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %10)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%ld\00"
define void @write_long(i8* %0, i32* %1, i8* %2) {
%4 = ptrtoint i8* %2 to i64
%5 = tail call i32 @str_printf(i8* %0, i32* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ StateImplP__State__toIdle(unsigned int);
void UniqueSendP__State__toIdle(void) { StateImplP__State__toIdle(2U); }


x86 assembly (clang, -O0):
<UniqueSendP__State__toIdle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <StateImplP__State__toIdle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UniqueSendP__State__toIdle>:
mov    $0x2,%edi
jmp    1030 <StateImplP__State__toIdle@plt>

LLVM IR (-O0):
define void @UniqueSendP__State__toIdle() {
%1 = call i32 @StateImplP__State__toIdle(i32 2)
ret void
}

LLVM IR (-O2):
define void @UniqueSendP__State__toIdle() {
%1 = tail call i32 @StateImplP__State__toIdle(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F(char *);
int /*<<< orphan*/ print(short);
int /*<<< orphan*/ print_P(int /*<<< orphan*/);
void print_g_translate(short x, short y) {
  print_P(F("<g transform='translate("));
  print(x);
  print(' ');
  print(y);
  print_P(F(")'>\n"));
}


x86 assembly (clang, -O0):
<print_g_translate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <F@plt>
mov    %eax,%edi
call   1050 <print_P@plt>
movswl -0x2(%rbp),%edi
call   1040 <print@plt>
mov    $0x20,%edi
call   1040 <print@plt>
movswl -0x4(%rbp),%edi
call   1040 <print@plt>
lea    0xe9d(%rip),%rdi
call   1030 <F@plt>
mov    %eax,%edi
call   1050 <print_P@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_g_translate>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xec2(%rip),%rdi
call   1030 <F@plt>
mov    %eax,%edi
call   1050 <print_P@plt>
mov    %ebp,%edi
call   1040 <print@plt>
mov    $0x20,%edi
call   1040 <print@plt>
mov    %ebx,%edi
call   1040 <print@plt>
lea    0xeb0(%rip),%rdi
call   1030 <F@plt>
mov    %eax,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <print_P@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"<g transform='translate(\00"
@.str.1 = [5 x i8] c")'>\0A\00"
define void @print_g_translate(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = call i32 @F(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @print_P(i32 %5)
%7 = load i16, i16* %3
%8 = call i32 @print(i16 signext %7)
%9 = call i32 @print(i16 signext 32)
%10 = load i16, i16* %4
%11 = call i32 @print(i16 signext %10)
%12 = call i32 @F(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%13 = call i32 @print_P(i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"<g transform='translate(\00"
@.str.1 = [5 x i8] c")'>\0A\00"
define void @print_g_translate(i16 signext %0, i16 signext %1) {
%3 = tail call i32 @F(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @print_P(i32 %3)
%5 = tail call i32 @print(i16 signext %0)
%6 = tail call i32 @print(i16 signext 32)
%7 = tail call i32 @print(i16 signext %1)
%8 = tail call i32 @F(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%9 = tail call i32 @print_P(i32 %8)
ret void
}
float __ocl_convert_float_float(float src) { return (float)src; }


x86 assembly (clang, -O0):
<__ocl_convert_float_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_convert_float_float>:
ret

LLVM IR (-O0):
define float @__ocl_convert_float_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @__ocl_convert_float_float(float returned %0) {
ret float %0
}
long double atan2l(long double y, long double x) {
  long double res = 0.0L;
  asm volatile("fpatan" : "=t"(res) : "u"(y), "0"(x) : "st(1)");
  return res;
}


x86 assembly (clang, -O0):
<atan2l>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldz
fstpt  -0x30(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fpatan
fstpt  -0x30(%rbp)
fldt   -0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan2l>:
fldt   0x8(%rsp)
fldt   0x18(%rsp)
fpatan
ret

LLVM IR (-O0):
define x86_fp80 @atan2l(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
store x86_fp80 0xK00000000000000000000, x86_fp80* %5
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80, x86_fp80* %4
%8 = call x86_fp80 asm sideeffect "fpatan", "={st},{st(1)},0,~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %6, x86_fp80 %7)
store x86_fp80 %8, x86_fp80* %5
%9 = load x86_fp80, x86_fp80* %5
ret x86_fp80 %9
}

LLVM IR (-O2):
define x86_fp80 @atan2l(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call x86_fp80 asm sideeffect "fpatan", "={st},{st(1)},0,~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0, x86_fp80 %1)
ret x86_fp80 %3
}
unsigned long m2b(unsigned long mem) { return mem / 0x200; }


x86 assembly (clang, -O0):
<m2b>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x9,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2b>:
mov    %rdi,%rax
shr    $0x9,%rax
ret

LLVM IR (-O0):
define i64 @m2b(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = udiv i64 %3, 512
ret i64 %4
}

LLVM IR (-O2):
define i64 @m2b(i64 %0) {
%2 = lshr i64 %0, 9
ret i64 %2
}
/* Variables and functions */
int even(int);
int odd(int x) {
  if (x == 0)
    return 0;
  else
    return even(x - 1);
}


x86 assembly (clang, -O0):
<odd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <odd+0x21>
movl   $0x0,-0x4(%rbp)
jmp    113f <odd+0x2f>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <even@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odd>:
test   %edi,%edi
je     111c <odd+0xc>
add    $0xffffffff,%edi
jmp    1030 <even@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @odd(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @even(i32 %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %7, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @odd(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @even(i32 %4)
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
void *untag(uintptr_t tag) { return (void *)(tag & ~3); }


x86 assembly (clang, -O0):
<untag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffffc,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<untag>:
mov    %rdi,%rax
and    $0xfffffffffffffffc,%rax
ret

LLVM IR (-O0):
define i8* @untag(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, -4
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @untag(i64 %0) {
%2 = and i64 %0, -4
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ op_to_ea(char *, int);
void i_eor_ea(void) { op_to_ea("xor", 1); }


x86 assembly (clang, -O0):
<i_eor_ea>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <op_to_ea@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_eor_ea>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <op_to_ea@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"xor\00"
define void @i_eor_ea() {
%1 = call i32 @op_to_ea(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"xor\00"
define void @i_eor_ea() {
%1 = tail call i32 @op_to_ea(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Type definitions */
struct Node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ abort();
struct Node *addLeft(struct Node *);
int /*<<< orphan*/ assert(int);
struct Node *create();
int getNbOfNodes(struct Node *);
int main() {
  struct Node *mytree = create();
  struct Node *child = addLeft(mytree);
  struct Node *child2 = addLeft(child);
  int c = getNbOfNodes(child2);
  assert(c == 1);
  abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <create@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <addLeft@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <addLeft@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1070 <getNbOfNodes@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x1,-0x24(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <assert@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <create@plt>
mov    %rax,%rdi
call   1040 <addLeft@plt>
mov    %rax,%rdi
call   1040 <addLeft@plt>
mov    %rax,%rdi
call   1070 <getNbOfNodes@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
call   1060 <assert@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
%struct.Node = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.Node*
%3 = alloca %struct.Node*
%4 = alloca %struct.Node*
%5 = alloca i32
store i32 0, i32* %1
%6 = call %struct.Node* (...) @create()
store %struct.Node* %6, %struct.Node** %2
%7 = load %struct.Node*, %struct.Node** %2
%8 = call %struct.Node* @addLeft(%struct.Node* %7)
store %struct.Node* %8, %struct.Node** %3
%9 = load %struct.Node*, %struct.Node** %3
%10 = call %struct.Node* @addLeft(%struct.Node* %9)
store %struct.Node* %10, %struct.Node** %4
%11 = load %struct.Node*, %struct.Node** %4
%12 = call i32 @getNbOfNodes(%struct.Node* %11)
store i32 %12, i32* %5
%13 = load i32, i32* %5
%14 = icmp eq i32 %13, 1
%15 = zext i1 %14 to i32
%16 = call i32 @assert(i32 %15)
%17 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
%struct.Node = type { i32 }
define i32 @main() {
%1 = tail call %struct.Node* (...) @create()
%2 = tail call %struct.Node* @addLeft(%struct.Node* %1)
%3 = tail call %struct.Node* @addLeft(%struct.Node* %2)
%4 = tail call i32 @getNbOfNodes(%struct.Node* %3)
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 (...) @abort()
unreachable
}
flush_map() {}


x86 assembly (clang, -O0):
<flush_map>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_map>:
ret

LLVM IR (-O0):
define i32 @flush_map() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @flush_map() {
ret i32 undef
}
unsigned long hash1(const char *rawKey) {
  const unsigned char *s = (const unsigned char *)rawKey;
  unsigned long hash = 0;
  do {
    hash = *s + (hash << 6) + (hash << 16) - hash;
  } while (*++s);
  return hash;
}


x86 assembly (clang, -O0):
<hash1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    -0x18(%rbp),%rcx
shl    $0x6,%rcx
add    %rcx,%rax
mov    -0x18(%rbp),%rcx
shl    $0x10,%rcx
add    %rcx,%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,0x1(%rax)
jne    1118 <hash1+0x18>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash1>:
mov    (%rdi),%cl
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movzbl %cl,%ecx
imul   $0x1003f,%rax,%rax
add    %rcx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash1+0x10>
ret

LLVM IR (-O0):
define i64 @hash1(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i64 0, i64* %4
br label %6
6: ; preds = %18, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i64
%10 = load i64, i64* %4
%11 = shl i64 %10, 6
%12 = add i64 %9, %11
%13 = load i64, i64* %4
%14 = shl i64 %13, 16
%15 = add i64 %12, %14
%16 = load i64, i64* %4
%17 = sub i64 %15, %16
store i64 %17, i64* %4
br label %18
18: ; preds = %6
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
%21 = load i8, i8* %20
%22 = icmp ne i8 %21, 0
br i1 %22, label %6, label %23
23: ; preds = %18
%24 = load i64, i64* %4
ret i64 %24
}

LLVM IR (-O2):
define i64 @hash1(i8* nocapture %0) {
%2 = load i8, i8* %0
br label %3
3: ; preds = %3, %1
%4 = phi i8 [ %2, %1 ], [ %11, %3 ]
%5 = phi i8* [ %0, %1 ], [ %10, %3 ]
%6 = phi i64 [ 0, %1 ], [ %9, %3 ]
%7 = zext i8 %4 to i64
%8 = mul i64 %6, 65599
%9 = add i64 %8, %7
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %3
13: ; preds = %3
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ stdout;
void countdown(int sig) {
  static int num = 10;
  printf("%d..\n", num--);
  fflush(stdout);
  if (num < 0) {
    printf("DONE!\n");
    exit(0);
  }
}


x86 assembly (clang, -O0):
<countdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ef7(%rip),%esi
mov    %esi,%eax
add    $0xffffffff,%eax
mov    %eax,0x2eec(%rip)
lea    0xead(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
cmpl   $0x0,0x2ec9(%rip)
jge    118a <countdown+0x5a>
lea    0xe8a(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<countdown>:
push   %rax
mov    0x2ef9(%rip),%esi
lea    -0x1(%rsi),%eax
mov    %eax,0x2ef0(%rip)
lea    0xea9(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
cmpl   $0x0,0x2ecd(%rip)
js     1177 <countdown+0x37>
pop    %rax
ret
lea    0xe88(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@countdown.num = internal global i32 10
@.str = [6 x i8] c"%d..\0A\00"
@stdout = global i32 0
@.str.1 = [7 x i8] c"DONE!\0A\00"
define void @countdown(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @countdown.num
%4 = add nsw i32 %3, -1
store i32 %4, i32* @countdown.num
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
%6 = load i32, i32* @stdout
%7 = call i32 @fflush(i32 %6)
%8 = load i32, i32* @countdown.num
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%12 = call i32 @exit(i32 0)
unreachable
13: ; preds = %1
ret void
}

LLVM IR (-O2):
@countdown.num = internal unnamed_addr global i32 10
@.str = [6 x i8] c"%d..\0A\00"
@stdout = global i32 0
@str = [6 x i8] c"DONE!\00"
define void @countdown(i32 %0) {
%2 = load i32, i32* @countdown.num
%3 = add nsw i32 %2, -1
store i32 %3, i32* @countdown.num
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2)
%5 = load i32, i32* @stdout
%6 = tail call i32 @fflush(i32 %5)
%7 = load i32, i32* @countdown.num
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%11 = tail call i32 @exit(i32 0)
unreachable
12: ; preds = %1
ret void
}
/* Variables and functions */
int EPOLLIN;
int EPOLLOUT;
int EPOLLRDHUP;
int /*<<< orphan*/ kore_platform_event_schedule(int, int, int /*<<< orphan*/,
                                                void *);
void kore_platform_event_level_all(int fd, void *c) {
  kore_platform_event_schedule(fd, EPOLLIN | EPOLLOUT | EPOLLRDHUP, 0, c);
}


x86 assembly (clang, -O0):
<kore_platform_event_level_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
mov    0x2ea6(%rip),%rax
or     (%rax),%esi
mov    0x2e95(%rip),%rax
or     (%rax),%esi
mov    -0x10(%rbp),%rcx
xor    %edx,%edx
call   1030 <kore_platform_event_schedule@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kore_platform_event_level_all>:
mov    %rsi,%rcx
mov    0x2ece(%rip),%rax
mov    0x2eb7(%rip),%rdx
mov    (%rdx),%esi
or     (%rax),%esi
mov    0x2ea4(%rip),%rax
or     (%rax),%esi
xor    %edx,%edx
jmp    1030 <kore_platform_event_schedule@plt>

LLVM IR (-O0):
@EPOLLIN = global i32 0
@EPOLLOUT = global i32 0
@EPOLLRDHUP = global i32 0
define void @kore_platform_event_level_all(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @EPOLLIN
%7 = load i32, i32* @EPOLLOUT
%8 = or i32 %6, %7
%9 = load i32, i32* @EPOLLRDHUP
%10 = or i32 %8, %9
%11 = load i8*, i8** %4
%12 = call i32 @kore_platform_event_schedule(i32 %5, i32 %10, i32 0, i8* %11)
ret void
}

LLVM IR (-O2):
@EPOLLIN = global i32 0
@EPOLLOUT = global i32 0
@EPOLLRDHUP = global i32 0
define void @kore_platform_event_level_all(i32 %0, i8* %1) {
%3 = load i32, i32* @EPOLLIN
%4 = load i32, i32* @EPOLLOUT
%5 = or i32 %4, %3
%6 = load i32, i32* @EPOLLRDHUP
%7 = or i32 %5, %6
%8 = tail call i32 @kore_platform_event_schedule(i32 %0, i32 %7, i32 0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ events_IO_cleanup();
int /*<<< orphan*/ events_timer_cleanup();
void events_cleanup(void) {
  events_timer_cleanup();
  events_IO_cleanup();
}


x86 assembly (clang, -O0):
<events_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <events_timer_cleanup@plt>
mov    $0x0,%al
call   1040 <events_IO_cleanup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<events_cleanup>:
push   %rax
xor    %eax,%eax
call   1030 <events_timer_cleanup@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <events_IO_cleanup@plt>

LLVM IR (-O0):
define void @events_cleanup() {
%1 = call i32 (...) @events_timer_cleanup()
%2 = call i32 (...) @events_IO_cleanup()
ret void
}

LLVM IR (-O2):
define void @events_cleanup() {
%1 = tail call i32 (...) @events_timer_cleanup()
%2 = tail call i32 (...) @events_IO_cleanup()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void badusage(void) {
  fprintf(
      stderr,
      "Usage: fsaswapcoords [-op d/s] [-silent] [-v] [filename1 filename2]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<badusage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<badusage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [69 x i8] c"Usage: fsaswapcoords [-op d/s] [-silent] [-v] [filename1 filename2]\0A\00"
define void @badusage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [69 x i8] c"Usage: fsaswapcoords [-op d/s] [-silent] [-v] [filename1 filename2]\0A\00"
define void @badusage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void PWM1Generator0_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PWM1Generator0_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PWM1Generator0_Handler+0x9>
jmp    1109 <PWM1Generator0_Handler+0x9>

x86 assembly (clang, -O2):
<PWM1Generator0_Handler>:
jmp    1100 <PWM1Generator0_Handler>

LLVM IR (-O0):
define void @PWM1Generator0_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PWM1Generator0_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}