int alaw2linear(a_val)
unsigned char a_val;
{
  int t;
  int seg;
  a_val ^= 0x55;
  t = (a_val & (0xf)) << 4;
  seg = ((unsigned)a_val & (0x70)) >> (4);
  switch (seg) {
  case 0:
    t += 8;
    break;
  case 1:
    t += 0x108;
    break;
  default:
    t += 0x108;
    t <<= seg - 1;
  }
  return ((a_val & (0x80)) ? t : -t);
}


x86 assembly (clang, -O0):
<alaw2linear>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
xor    $0x55,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x70,%eax
shr    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     1150 <alaw2linear+0x50>
jmp    113f <alaw2linear+0x3f>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     115e <alaw2linear+0x5e>
jmp    116e <alaw2linear+0x6e>
mov    -0x8(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0x8(%rbp)
jmp    1187 <alaw2linear+0x87>
mov    -0x8(%rbp),%eax
add    $0x108,%eax
mov    %eax,-0x8(%rbp)
jmp    1187 <alaw2linear+0x87>
mov    -0x8(%rbp),%eax
add    $0x108,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     11a4 <alaw2linear+0xa4>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    11ac <alaw2linear+0xac>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alaw2linear>:
movzbl %dil,%ecx
xor    $0x55,%ecx
mov    %ecx,%eax
shl    $0x4,%eax
movzbl %al,%edx
shr    $0x4,%ecx
and    $0x7,%ecx
cmp    $0x1,%ecx
je     1123 <alaw2linear+0x23>
test   %ecx,%ecx
jne    112b <alaw2linear+0x2b>
or     $0x8,%edx
jmp    1136 <alaw2linear+0x36>
or     $0x108,%edx
jmp    1136 <alaw2linear+0x36>
or     $0x108,%edx
add    $0xff,%cl
shl    %cl,%edx
mov    %edx,%eax
neg    %eax
test   $0x80,%dil
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @alaw2linear(i32 %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
%5 = trunc i32 %0 to i8
store i8 %5, i8* %2
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = xor i32 %7, 85
%9 = trunc i32 %8 to i8
store i8 %9, i8* %2
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = and i32 %11, 15
%13 = shl i32 %12, 4
store i32 %13, i32* %3
%14 = load i8, i8* %2
%15 = zext i8 %14 to i32
%16 = and i32 %15, 112
%17 = lshr i32 %16, 4
store i32 %17, i32* %4
%18 = load i32, i32* %4
switch i32 %18, label %25 [
i32 0, label %19
i32 1, label %22
]
19: ; preds = %1
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 8
store i32 %21, i32* %3
br label %32
22: ; preds = %1
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 264
store i32 %24, i32* %3
br label %32
25: ; preds = %1
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 264
store i32 %27, i32* %3
%28 = load i32, i32* %4
%29 = sub nsw i32 %28, 1
%30 = load i32, i32* %3
%31 = shl i32 %30, %29
store i32 %31, i32* %3
br label %32
32: ; preds = %25, %22, %19
%33 = load i8, i8* %2
%34 = zext i8 %33 to i32
%35 = and i32 %34, 128
%36 = icmp ne i32 %35, 0
br i1 %36, label %37, label %39
37: ; preds = %32
%38 = load i32, i32* %3
br label %42
39: ; preds = %32
%40 = load i32, i32* %3
%41 = sub nsw i32 0, %40
br label %42
42: ; preds = %39, %37
%43 = phi i32 [ %38, %37 ], [ %41, %39 ]
ret i32 %43
}

LLVM IR (-O2):
define i32 @alaw2linear(i32 %0) {
%2 = and i32 %0, 255
%3 = xor i32 %2, 85
%4 = shl nuw nsw i32 %3, 4
%5 = and i32 %4, 240
%6 = lshr i32 %3, 4
%7 = and i32 %6, 7
switch i32 %7, label %12 [
i32 0, label %8
i32 1, label %10
]
8: ; preds = %1
%9 = or i32 %5, 8
br label %16
10: ; preds = %1
%11 = or i32 %5, 264
br label %16
12: ; preds = %1
%13 = or i32 %5, 264
%14 = add nsw i32 %7, -1
%15 = shl i32 %13, %14
br label %16
16: ; preds = %12, %10, %8
%17 = phi i32 [ %15, %12 ], [ %11, %10 ], [ %9, %8 ]
%18 = and i32 %0, 128
%19 = icmp eq i32 %18, 0
%20 = sub nsw i32 0, %17
%21 = select i1 %19, i32 %20, i32 %17
ret i32 %21
}