xunge/DecIR huggingface dataset:
void f_empty_goto_loop_multiple_semicolon_first() {
f_empty_goto_loop_multiple_semicolon_first_label_1:;
  goto f_empty_goto_loop_multiple_semicolon_first_label_2;
f_empty_goto_loop_multiple_semicolon_first_label_2:
  goto f_empty_goto_loop_multiple_semicolon_first_label_1;
}


x86 assembly (clang, -O0):
<f_empty_goto_loop_multiple_semicolon_first>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <f_empty_goto_loop_multiple_semicolon_first+0x9>
jmp    110e <f_empty_goto_loop_multiple_semicolon_first+0xe>
jmp    1109 <f_empty_goto_loop_multiple_semicolon_first+0x9>

x86 assembly (clang, -O2):
<f_empty_goto_loop_multiple_semicolon_first>:
jmp    1100 <f_empty_goto_loop_multiple_semicolon_first>

LLVM IR (-O0):
define void @f_empty_goto_loop_multiple_semicolon_first() {
br label %1
1: ; preds = %2, %0
br label %2
2: ; preds = %1
br label %1
}

LLVM IR (-O2):
define void @f_empty_goto_loop_multiple_semicolon_first() {
br label %1
1: ; preds = %1, %0
br label %1
}
int test_imm_1Duint16_mem(unsigned short *val) {
  return ((*val) & (-0x1D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Duint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffffe3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Duint16_mem>:
movzwl (%rdi),%eax
test   $0xffe3,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Duint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -29
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Duint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -29
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned char isLeapYear(unsigned short year) {
  return year % 4 == 0 && year % 100 != 0 || year % 400 == 0;
}


x86 assembly (clang, -O0):
<isLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113a <isLeapYear+0x3a>
movzwl -0x2(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x3(%rbp)
jne    114f <isLeapYear+0x4f>
movzwl -0x2(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeapYear>:
test   $0x3,%dil
jne    1123 <isLeapYear+0x23>
mov    %edi,%eax
shr    $0x2,%eax
imul   $0x147b,%eax,%eax
shr    $0x11,%eax
imul   $0x64,%eax,%eax
mov    %edi,%ecx
sub    %eax,%ecx
mov    $0x1,%al
test   %cx,%cx
je     1123 <isLeapYear+0x23>
ret
imul   $0x5c29,%edi,%eax
ror    $0x4,%ax
movzwl %ax,%eax
cmp    $0xa4,%eax
setb   %al
ret

LLVM IR (-O0):
define zeroext i8 @isLeapYear(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i16, i16* %2
%9 = zext i16 %8 to i32
%10 = srem i32 %9, 100
%11 = icmp ne i32 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %7, %1
%13 = load i16, i16* %2
%14 = zext i16 %13 to i32
%15 = srem i32 %14, 400
%16 = icmp eq i32 %15, 0
br label %17
17: ; preds = %12, %7
%18 = phi i1 [ true, %7 ], [ %16, %12 ]
%19 = zext i1 %18 to i32
%20 = trunc i32 %19 to i8
ret i8 %20
}

LLVM IR (-O2):
define zeroext i8 @isLeapYear(i16 zeroext %0) {
%2 = and i16 %0, 3
%3 = icmp ne i16 %2, 0
%4 = urem i16 %0, 100
%5 = icmp eq i16 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = urem i16 %0, 400
%9 = icmp eq i16 %8, 0
%10 = zext i1 %9 to i8
br label %11
11: ; preds = %1, %7
%12 = phi i8 [ %10, %7 ], [ 1, %1 ]
ret i8 %12
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void foo(int n) {
  while (n--) {
    bar();
    bar();
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1142 <foo+0x32>
mov    $0x0,%al
call   1030 <bar@plt>
mov    $0x0,%al
call   1030 <bar@plt>
jmp    111b <foo+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
test   %edi,%edi
je     1133 <foo+0x23>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
call   1030 <bar@plt>
add    $0xffffffff,%ebx
jne    1120 <foo+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = call i32 (...) @bar()
%9 = call i32 (...) @bar()
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 (...) @bar()
%7 = tail call i32 (...) @bar()
%8 = icmp eq i32 %5, 0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
int ifunc1(int a, int b) { return a + b + 1; }


x86 assembly (clang, -O0):
<ifunc1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ifunc1>:
lea    (%rdi,%rsi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ifunc1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = add nsw i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @ifunc1(i32 %0, i32 %1) {
%3 = add i32 %0, 1
%4 = add i32 %3, %1
ret i32 %4
}
/* Type definitions */
struct char_queue {
  int dummy;
};

/* Variables and functions */
scalar_t__ char_queue_size(struct char_queue *);
bool char_queue_is_empty(struct char_queue *queue) {
  return char_queue_size(queue) == 0;
}


x86 assembly (clang, -O0):
<char_queue_is_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <char_queue_size@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_queue_is_empty>:
push   %rax
call   1030 <char_queue_size@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.char_queue = type { i32 }
define i32 @char_queue_is_empty(%struct.char_queue* %0) {
%2 = alloca %struct.char_queue*
store %struct.char_queue* %0, %struct.char_queue** %2
%3 = load %struct.char_queue*, %struct.char_queue** %2
%4 = call i64 @char_queue_size(%struct.char_queue* %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.char_queue = type { i32 }
define i32 @char_queue_is_empty(%struct.char_queue* %0) {
%2 = tail call i64 @char_queue_size(%struct.char_queue* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void I400ToI420() {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @I400ToI420() {
ret void
}

LLVM IR (-O2):
define void @I400ToI420() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int terminate_ui(void) {
  endwin();
  return 1;
}


x86 assembly (clang, -O0):
<terminate_ui>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminate_ui>:
push   %rax
xor    %eax,%eax
call   1030 <endwin@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @terminate_ui() {
%1 = call i32 (...) @endwin()
ret i32 1
}

LLVM IR (-O2):
define i32 @terminate_ui() {
%1 = tail call i32 (...) @endwin()
ret i32 1
}
int Dif_Validate(const unsigned char *pDiskImage,
                 const unsigned long DiskImageSize) {
  return (1 == 0);
}


x86 assembly (clang, -O0):
<Dif_Validate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dif_Validate>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Dif_Validate(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @Dif_Validate(i8* nocapture readnone %0, i64 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void updateCount(int val, int *count) {
  if ((val > 2) && (val < 7))
    (*count)++;
  if (val == 10)
    (*count)--;
  printf("current count: %i\n", *count);
}


x86 assembly (clang, -O0):
<updateCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    113e <updateCount+0x2e>
cmpl   $0x7,-0x4(%rbp)
jge    113e <updateCount+0x2e>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
cmpl   $0xa,-0x4(%rbp)
jne    1153 <updateCount+0x43>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateCount>:
lea    -0x3(%rdi),%eax
cmp    $0x3,%eax
ja     111f <updateCount+0xf>
mov    (%rsi),%eax
add    $0x1,%eax
jmp    1129 <updateCount+0x19>
mov    (%rsi),%eax
cmp    $0xa,%edi
jne    112b <updateCount+0x1b>
add    $0xffffffff,%eax
mov    %eax,(%rsi)
lea    0xece(%rip),%rdi
mov    %eax,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"current count: %i\0A\00"
define void @updateCount(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 7
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %11
br label %14
14: ; preds = %10, %7, %2
%15 = load i32, i32* %3
%16 = icmp eq i32 %15, 10
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32*, i32** %4
%19 = load i32, i32* %18
%20 = add nsw i32 %19, -1
store i32 %20, i32* %18
br label %21
21: ; preds = %17, %14
%22 = load i32*, i32** %4
%23 = load i32, i32* %22
%24 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %23)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"current count: %i\0A\00"
define void @updateCount(i32 %0, i32* nocapture %1) {
%3 = add i32 %0, -3
%4 = icmp ult i32 %3, 4
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* %1
%7 = add nsw i32 %6, 1
br label %13
8: ; preds = %2
%9 = icmp eq i32 %0, 10
%10 = load i32, i32* %1
br i1 %9, label %11, label %15
11: ; preds = %8
%12 = add nsw i32 %10, -1
br label %13
13: ; preds = %11, %5
%14 = phi i32 [ %7, %5 ], [ %12, %11 ]
store i32 %14, i32* %1
br label %15
15: ; preds = %13, %8
%16 = phi i32 [ %10, %8 ], [ %14, %13 ]
%17 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %16)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ chk_err(char *);
void chkparam() {
  if ((4 != 2) && (4 != 4))
    chk_err("chkparam: Width parameter is illegal.");
  if ((4 == 2) && (0x1EDC6F41L & 0xFFFF0000L))
    chk_err("chkparam: Poly parameter is too wide.");
  if ((1 != 0) && (1 != 1))
    chk_err("chkparam: Reverse parameter is not boolean.");
}


x86 assembly (clang, -O0):
<chkparam>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chkparam>:
ret

LLVM IR (-O0):
define void @chkparam() {
ret void
}

LLVM IR (-O2):
define void @chkparam() {
ret void
}
void fd186(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  a:
    goto a;
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd186>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd186+0x7>

x86 assembly (clang, -O2):
<fd186>:
jmp    1100 <fd186>

LLVM IR (-O0):
define void @fd186(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; preds = %32
br label %32
33: ; No predecessors!
%34 = load i32, i32* %2
%35 = zext i32 %34 to i64
br label %36
36: ; preds = %36, %33
br label %36
37: ; preds = %37
br label %37
38: ; No predecessors!
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
br label %41
41: ; preds = %41, %38
br label %41
42: ; preds = %42
br label %42
43: ; No predecessors!
%44 = load i32, i32* %2
%45 = zext i32 %44 to i64
br label %46
46: ; preds = %46, %43
br label %46
47: ; preds = %47
br label %47
}

LLVM IR (-O2):
define void @fd186(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int cosine_taylor(double);
double secant_taylor(double radians) { return 1 / cosine_taylor(radians); }


x86 assembly (clang, -O0):
<secant_taylor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cosine_taylor@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<secant_taylor>:
push   %rax
call   1030 <cosine_taylor@plt>
lea    0x1(%rax),%ecx
xor    %edx,%edx
cmp    $0x3,%ecx
cmovb  %eax,%edx
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @secant_taylor(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @cosine_taylor(double %3)
%5 = sdiv i32 1, %4
%6 = sitofp i32 %5 to double
ret double %6
}

LLVM IR (-O2):
define double @secant_taylor(double %0) {
%2 = tail call i32 @cosine_taylor(double %0)
%3 = add i32 %2, 1
%4 = icmp ult i32 %3, 3
%5 = select i1 %4, i32 %2, i32 0
%6 = sitofp i32 %5 to double
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ SEEK_CUR;
int /*<<< orphan*/ SEEK_SET;
long lseek(int const, long, int /*<<< orphan*/);
void savepos(const int fd, long set_pos, long save_pos) {
  save_pos = lseek(fd, 0, SEEK_CUR);
  lseek(fd, set_pos, SEEK_SET);
}


x86 assembly (clang, -O0):
<savepos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
call   1030 <lseek@plt>
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    0x2e8e(%rip),%rax
mov    (%rax),%edx
call   1030 <lseek@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<savepos>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1030 <lseek@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <lseek@plt>

LLVM IR (-O0):
@SEEK_CUR = global i32 0
@SEEK_SET = global i32 0
define void @savepos(i32 %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i32, i32* @SEEK_CUR
%9 = call i64 @lseek(i32 %7, i64 0, i32 %8)
store i64 %9, i64* %6
%10 = load i32, i32* %4
%11 = load i64, i64* %5
%12 = load i32, i32* @SEEK_SET
%13 = call i64 @lseek(i32 %10, i64 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@SEEK_CUR = global i32 0
@SEEK_SET = global i32 0
define void @savepos(i32 %0, i64 %1, i64 %2) {
%4 = load i32, i32* @SEEK_CUR
%5 = tail call i64 @lseek(i32 %0, i64 0, i32 %4)
%6 = load i32, i32* @SEEK_SET
%7 = tail call i64 @lseek(i32 %0, i64 %1, i32 %6)
ret void
}
int rl_insert_close(count, invoking_key)
int count, invoking_key;
{ return (rl_insert(count, invoking_key)); }


x86 assembly (clang, -O0):
<rl_insert_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x0,%al
call   1030 <rl_insert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rl_insert_close>:
xor    %eax,%eax
jmp    1030 <rl_insert@plt>

LLVM IR (-O0):
define i32 @rl_insert_close(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_insert to i32 (i32, i32, ...)*)(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @rl_insert_close(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_insert to i32 (i32, i32, ...)*)(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ emit_addimm(int, int, int);
int /*<<< orphan*/ emit_cmovne_reg(int, int);
int /*<<< orphan*/ emit_cmp(int, int);
int /*<<< orphan*/ emit_orimm(int, int, int);
void emit_cmpeq(int s1, int s2, int sr, int temp) {
  assert(temp >= 0);
  emit_orimm(sr, 1, sr);
  emit_addimm(sr, -1, temp);
  emit_cmp(s1, s2);
  emit_cmovne_reg(temp, sr);
}


x86 assembly (clang, -O0):
<emit_cmpeq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1070 <emit_orimm@plt>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%edx
mov    $0xffffffff,%esi
call   1050 <emit_addimm@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <emit_cmp@plt>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1060 <emit_cmovne_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_cmpeq>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%r15d
mov    %ecx,%edi
not    %edi
shr    $0x1f,%edi
call   1040 <assert@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    %ebx,%edx
call   1070 <emit_orimm@plt>
mov    %ebx,%edi
mov    $0xffffffff,%esi
mov    %ebp,%edx
call   1050 <emit_addimm@plt>
mov    %r15d,%edi
mov    %r14d,%esi
call   1030 <emit_cmp@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1060 <emit_cmovne_reg@plt>

LLVM IR (-O0):
define void @emit_cmpeq(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp sge i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %7
%14 = load i32, i32* %7
%15 = call i32 @emit_orimm(i32 %13, i32 1, i32 %14)
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = call i32 @emit_addimm(i32 %16, i32 -1, i32 %17)
%19 = load i32, i32* %5
%20 = load i32, i32* %6
%21 = call i32 @emit_cmp(i32 %19, i32 %20)
%22 = load i32, i32* %8
%23 = load i32, i32* %7
%24 = call i32 @emit_cmovne_reg(i32 %22, i32 %23)
ret void
}

LLVM IR (-O2):
define void @emit_cmpeq(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = xor i32 %3, -1
%6 = lshr i32 %5, 31
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 @emit_orimm(i32 %2, i32 1, i32 %2)
%9 = tail call i32 @emit_addimm(i32 %2, i32 -1, i32 %3)
%10 = tail call i32 @emit_cmp(i32 %0, i32 %1)
%11 = tail call i32 @emit_cmovne_reg(i32 %3, i32 %2)
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *strdup(const char *s) {
  int l = strlen(s);
  char *r = malloc(l + 1);
  strcpy(r, s);
  return r;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
%9 = call i8* @malloc(i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = load i8*, i8** %2
%12 = call i32 @strcpy(i8* %10, i8* %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
__attribute__((no, noclone, used)) void _ITM_WU8() { asm(""); }


x86 assembly (clang, -O0):
<_ITM_WU8>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ITM_WU8>:
ret

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void ()* @_ITM_WU8 to i8*)], section "llvm.metadata"
define void @_ITM_WU8() {
ret void
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void ()* @_ITM_WU8 to i8*)], section "llvm.metadata"
define void @_ITM_WU8() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FreeDope(int, char const **);
int ResultD(int);
int SplitList(char *, int *, char const ***);
int picolCommandListLength(int argc, char **argv, void *pd) {
  int c = 0;
  const char **v = 0;
  int err = SplitList(argv[1], &c, &v);
  FreeDope(c, v);
  return ResultD(c);
}


x86 assembly (clang, -O0):
<picolCommandListLength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    -0x1c(%rbp),%rsi
lea    -0x28(%rbp),%rdx
call   1030 <SplitList@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x1c(%rbp),%edi
mov    -0x28(%rbp),%rsi
call   1050 <FreeDope@plt>
mov    -0x1c(%rbp),%edi
call   1040 <ResultD@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<picolCommandListLength>:
sub    $0x18,%rsp
movl   $0x0,0xc(%rsp)
movq   $0x0,0x10(%rsp)
mov    0x8(%rsi),%rdi
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
call   1030 <SplitList@plt>
mov    0xc(%rsp),%edi
mov    0x10(%rsp),%rsi
call   1050 <FreeDope@plt>
mov    0xc(%rsp),%edi
call   1040 <ResultD@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @picolCommandListLength(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8**
%9 = alloca i32
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
store i32 0, i32* %7
store i8** null, i8*** %8
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @SplitList(i8* %12, i32* %7, i8*** %8)
store i32 %13, i32* %9
%14 = load i32, i32* %7
%15 = load i8**, i8*** %8
%16 = call i32 @FreeDope(i32 %14, i8** %15)
%17 = load i32, i32* %7
%18 = call i32 @ResultD(i32 %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @picolCommandListLength(i32 %0, i8** nocapture %1, i8* nocapture readnone %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = bitcast i32* %4 to i8*
store i32 0, i32* %4
%7 = bitcast i8*** %5 to i8*
store i8** null, i8*** %5
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = call i32 @SplitList(i8* %9, i32* %4, i8*** %5)
%11 = load i32, i32* %4
%12 = load i8**, i8*** %5
%13 = call i32 @FreeDope(i32 %11, i8** %12)
%14 = load i32, i32* %4
%15 = call i32 @ResultD(i32 %14)
ret i32 %15
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
void cutoff_filename(char *path, uint32_t len) {
  while (path[len] != '/')
    --len;
  path[len] = 0;
}


x86 assembly (clang, -O0):
<cutoff_filename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2f,%eax
je     1132 <cutoff_filename+0x32>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <cutoff_filename+0xc>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cutoff_filename>:
lea    (%rsi,%rdi,1),%rax
add    $0x1,%rax
nopl   0x0(%rax,%rax,1)
cmpb   $0x2f,-0x1(%rax)
lea    -0x1(%rax),%rax
jne    1110 <cutoff_filename+0x10>
movb   $0x0,(%rax)
ret

LLVM IR (-O0):
define void @cutoff_filename(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
br label %5
5: ; preds = %12, %2
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = getelementptr inbounds i8, i8* %6, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 47
br i1 %11, label %12, label %15
12: ; preds = %5
%13 = load i64, i64* %4
%14 = add i64 %13, -1
store i64 %14, i64* %4
br label %5
15: ; preds = %5
%16 = load i8*, i8** %3
%17 = load i64, i64* %4
%18 = getelementptr inbounds i8, i8* %16, i64 %17
store i8 0, i8* %18
ret void
}

LLVM IR (-O2):
define void @cutoff_filename(i8* nocapture %0, i64 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %1, %2 ], [ %8, %3 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 47
%8 = add i64 %4, -1
br i1 %7, label %9, label %3
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 0, i8* %10
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntEnable(int /*<<< orphan*/);
int /*<<< orphan*/ IntRegister(int /*<<< orphan*/, void (*)());
int /*<<< orphan*/ _PWMGenIntNumberGet(int /*<<< orphan*/, int /*<<< orphan*/);
void PWMGenIntRegister(uint32_t ui32Base, uint32_t ui32Gen,
                       void (*pfnIntHandler)(void)) {
  uint32_t ui32Int;
  ;
  ;
  ui32Int = _PWMGenIntNumberGet(ui32Base, ui32Gen);
  ;
  IntRegister(ui32Int, pfnIntHandler);
  IntEnable(ui32Int);
}


x86 assembly (clang, -O0):
<PWMGenIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <_PWMGenIntNumberGet@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1050 <IntRegister@plt>
mov    -0x14(%rbp),%edi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntRegister>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
call   1040 <_PWMGenIntNumberGet@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
call   1050 <IntRegister@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @PWMGenIntRegister(i32 %0, i32 %1, void ()* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca void ()*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store void ()* %2, void ()** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call i32 @_PWMGenIntNumberGet(i32 %8, i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = load void ()*, void ()** %6
%13 = bitcast void ()* %12 to void (...)*
%14 = call i32 @IntRegister(i32 %11, void (...)* %13)
%15 = load i32, i32* %7
%16 = call i32 @IntEnable(i32 %15)
ret void
}

LLVM IR (-O2):
define void @PWMGenIntRegister(i32 %0, i32 %1, void ()* %2) {
%4 = tail call i32 @_PWMGenIntNumberGet(i32 %0, i32 %1)
%5 = bitcast void ()* %2 to void (...)*
%6 = tail call i32 @IntRegister(i32 %4, void (...)* %5)
%7 = tail call i32 @IntEnable(i32 %4)
ret void
}
/* Variables and functions */
scalar_t__ SIG_ERR;
int /*<<< orphan*/ err(int, char *, char const *, int);
scalar_t__ signal(int, void (*)(int));
void setsig_fatal_gen(int sig, void (*handler)(int), int nocld,
                      const char *what) {
  if (signal(sig, handler) == SIG_ERR)
    err(71, "%s signal handler for %d", what, sig);
}


x86 assembly (clang, -O0):
<setsig_fatal_gen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <signal@plt>
mov    0x2e97(%rip),%rcx
cmp    (%rcx),%rax
jne    116a <setsig_fatal_gen+0x4a>
mov    -0x20(%rbp),%rdx
mov    -0x4(%rbp),%ecx
mov    $0x47,%edi
lea    0xe9b(%rip),%rsi
call   1040 <err@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setsig_fatal_gen>:
push   %rbp
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %edi,%ebp
call   1030 <signal@plt>
mov    0x2eac(%rip),%rcx
cmp    (%rcx),%rax
jne    1155 <setsig_fatal_gen+0x35>
lea    0xec0(%rip),%rsi
mov    $0x47,%edi
mov    %rbx,%rdx
mov    %ebp,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <err@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@SIG_ERR = global i64 0
@.str = [25 x i8] c"%s signal handler for %d\00"
define void @setsig_fatal_gen(i32 %0, void (i32)* %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca void (i32)*
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store void (i32)* %1, void (i32)** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load void (i32)*, void (i32)** %6
%11 = call i64 @signal(i32 %9, void (i32)* %10)
%12 = load i64, i64* @SIG_ERR
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %18
14: ; preds = %4
%15 = load i8*, i8** %8
%16 = load i32, i32* %5
%17 = call i32 @err(i32 71, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %15, i32 %16)
br label %18
18: ; preds = %14, %4
ret void
}

LLVM IR (-O2):
@SIG_ERR = global i64 0
@.str = [25 x i8] c"%s signal handler for %d\00"
define void @setsig_fatal_gen(i32 %0, void (i32)* %1, i32 %2, i8* %3) {
%5 = tail call i64 @signal(i32 %0, void (i32)* %1)
%6 = load i64, i64* @SIG_ERR
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = tail call i32 @err(i32 71, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3, i32 %0)
br label %10
10: ; preds = %8, %4
ret void
}
char *eisa_vendor(unsigned v) {
  static char s[4];
  s[0] = ((v >> 10) & 0x1f) + 'A' - 1;
  s[1] = ((v >> 5) & 0x1f) + 'A' - 1;
  s[2] = (v & 0x1f) + 'A' - 1;
  s[3] = 0;
  return s;
}


x86 assembly (clang, -O0):
<eisa_vendor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xa,%eax
and    $0x1f,%eax
add    $0x41,%eax
sub    $0x1,%eax
mov    %al,0x2f05(%rip)
mov    -0x4(%rbp),%eax
shr    $0x5,%eax
and    $0x1f,%eax
add    $0x41,%eax
sub    $0x1,%eax
mov    %al,0x2ef1(%rip)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
add    $0x41,%eax
sub    $0x1,%eax
mov    %al,0x2ee0(%rip)
movb   $0x0,0x2eda(%rip)
lea    0x2ed0(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eisa_vendor>:
mov    %edi,%eax
shr    $0xa,%eax
and    $0x1f,%al
or     $0x40,%al
mov    %al,0x2f12(%rip)
lea    0x2f0b(%rip),%rax
mov    %edi,%ecx
shr    $0x5,%ecx
and    $0x1f,%cl
or     $0x40,%cl
mov    %cl,0x2efb(%rip)
and    $0x1f,%dil
or     $0x40,%dil
mov    %dil,0x2eed(%rip)
movb   $0x0,0x2ee7(%rip)
ret

LLVM IR (-O0):
@eisa_vendor.s = internal global [4 x i8] zeroinitializer
define i8* @eisa_vendor(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 10
%5 = and i32 %4, 31
%6 = add i32 %5, 65
%7 = sub i32 %6, 1
%8 = trunc i32 %7 to i8
store i8 %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 0)
%9 = load i32, i32* %2
%10 = lshr i32 %9, 5
%11 = and i32 %10, 31
%12 = add i32 %11, 65
%13 = sub i32 %12, 1
%14 = trunc i32 %13 to i8
store i8 %14, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 1)
%15 = load i32, i32* %2
%16 = and i32 %15, 31
%17 = add i32 %16, 65
%18 = sub i32 %17, 1
%19 = trunc i32 %18 to i8
store i8 %19, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 2)
store i8 0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 3)
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 0)
}

LLVM IR (-O2):
@eisa_vendor.s = internal global [4 x i8] zeroinitializer
define i8* @eisa_vendor(i32 %0) {
%2 = lshr i32 %0, 10
%3 = trunc i32 %2 to i8
%4 = and i8 %3, 31
%5 = or i8 %4, 64
store i8 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 0)
%6 = lshr i32 %0, 5
%7 = trunc i32 %6 to i8
%8 = and i8 %7, 31
%9 = or i8 %8, 64
store i8 %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 1)
%10 = trunc i32 %0 to i8
%11 = and i8 %10, 31
%12 = or i8 %11, 64
store i8 %12, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 2)
store i8 0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 3)
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @eisa_vendor.s, i64 0, i64 0)
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int EAGAIN;
int errno;
int read(int, char *, int);
int tcmu_read_config(int fd, char *buf, int count) {
  ssize_t len;
  int save = errno;
  do {
    len = read(fd, buf, count);
  } while (errno == EAGAIN);
  errno = save;
  return len;
}


x86 assembly (clang, -O0):
<tcmu_read_config>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb7(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <read@plt>
mov    %eax,-0x18(%rbp)
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
mov    0x2e80(%rip),%rcx
cmp    (%rcx),%eax
je     112e <tcmu_read_config+0x1e>
mov    -0x1c(%rbp),%ecx
mov    0x2e7e(%rip),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcmu_read_config>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb6(%rip),%r15
mov    (%r15),%r12d
mov    0x2e9c(%rip),%r13
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1030 <read@plt>
mov    (%r15),%ecx
cmp    0x0(%r13),%ecx
je     1140 <tcmu_read_config+0x30>
mov    %r12d,(%r15)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
@EAGAIN = global i32 0
define i32 @tcmu_read_config(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%9 = load i32, i32* @errno
store i32 %9, i32* %8
br label %10
10: ; preds = %15, %3
%11 = load i32, i32* %4
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
%14 = call i32 @read(i32 %11, i8* %12, i32 %13)
store i32 %14, i32* %7
br label %15
15: ; preds = %10
%16 = load i32, i32* @errno
%17 = load i32, i32* @EAGAIN
%18 = icmp eq i32 %16, %17
br i1 %18, label %10, label %19
19: ; preds = %15
%20 = load i32, i32* %8
store i32 %20, i32* @errno
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
@errno = global i32 0
@EAGAIN = global i32 0
define i32 @tcmu_read_config(i32 %0, i8* nocapture %1, i32 %2) {
%4 = load i32, i32* @errno
br label %5
5: ; preds = %5, %3
%6 = tail call i32 @read(i32 %0, i8* %1, i32 %2)
%7 = load i32, i32* @errno
%8 = load i32, i32* @EAGAIN
%9 = icmp eq i32 %7, %8
br i1 %9, label %5, label %10
10: ; preds = %5
store i32 %4, i32* @errno
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ swscanf(int /*<<< orphan*/ *, int /*<<< orphan*/ *, ...);
void uninitvar_swscanf(void) {
  wchar_t *s;
  wchar_t *format1, *format2;
  int i;
  (void)swscanf(s, format1);
  (void)swscanf(s, format2, &i);
}


x86 assembly (clang, -O0):
<uninitvar_swscanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <swscanf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
mov    $0x0,%al
call   1030 <swscanf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_swscanf>:
push   %rax
xor    %eax,%eax
call   1030 <swscanf@plt>
lea    0x4(%rsp),%rdx
xor    %eax,%eax
call   1030 <swscanf@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @uninitvar_swscanf() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = call i32 (i32*, i32*, ...) @swscanf(i32* %5, i32* %6)
%8 = load i32*, i32** %1
%9 = load i32*, i32** %3
%10 = call i32 (i32*, i32*, ...) @swscanf(i32* %8, i32* %9, i32* %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_swscanf() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i32*, i32*, ...) @swscanf(i32* undef, i32* undef)
%4 = call i32 (i32*, i32*, ...) @swscanf(i32* undef, i32* undef, i32* %1)
ret void
}
int get_short_size() {
  unsigned short c = ~0;
  int i = 0;
  do {
    ++i;
    c ^= 1;
    c >>= 1;
  } while (c);
  return i;
}


x86 assembly (clang, -O0):
<get_short_size>:
push   %rbp
mov    %rsp,%rbp
movw   $0xffff,-0x2(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movzwl -0x2(%rbp),%eax
xor    $0x1,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x1,%eax
mov    %ax,-0x2(%rbp)
cmpw   $0x0,-0x2(%rbp)
jne    1111 <get_short_size+0x11>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_short_size>:
mov    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @get_short_size() {
%1 = alloca i16
%2 = alloca i32
store i16 -1, i16* %1
store i32 0, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = load i16, i16* %1
%7 = zext i16 %6 to i32
%8 = xor i32 %7, 1
%9 = trunc i32 %8 to i16
store i16 %9, i16* %1
%10 = load i16, i16* %1
%11 = zext i16 %10 to i32
%12 = ashr i32 %11, 1
%13 = trunc i32 %12 to i16
store i16 %13, i16* %1
br label %14
14: ; preds = %3
%15 = load i16, i16* %1
%16 = icmp ne i16 %15, 0
br i1 %16, label %3, label %17
17: ; preds = %14
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @get_short_size() {
ret i32 16
}
int menor(int x, int y) { return ((x < y) ? x : y); }


x86 assembly (clang, -O0):
<menor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <menor+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <menor+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<menor>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @menor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @menor(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void ppu_2C02_powerup(struct _2C02 *ppu) { (void)ppu; }


x86 assembly (clang, -O0):
<ppu_2C02_powerup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ppu_2C02_powerup>:
ret

LLVM IR (-O0):
%struct._2C02 = type opaque
define void @ppu_2C02_powerup(%struct._2C02* %0) {
%2 = alloca %struct._2C02*
store %struct._2C02* %0, %struct._2C02** %2
%3 = load %struct._2C02*, %struct._2C02** %2
ret void
}

LLVM IR (-O2):
%struct._2C02 = type opaque
define void @ppu_2C02_powerup(%struct._2C02* nocapture %0) {
ret void
}
int test_imm_67uint16_mem(unsigned short *val) {
  return ((*val) & (-0x67 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_67uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff99,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_67uint16_mem>:
movzwl (%rdi),%eax
test   $0xff99,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_67uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -103
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_67uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -103
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ check_vect();
int /*<<< orphan*/ main1(int, int, int);
int main(void) {
  check_vect();
  main1(100, 100, 1);
  main1(0, 15, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
mov    $0x64,%esi
mov    $0x1,%edx
mov    %esi,%edi
call   1040 <main1@plt>
xor    %edx,%edx
mov    $0xf,%esi
mov    %edx,%edi
call   1040 <main1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <check_vect@plt>
mov    $0x64,%edi
mov    $0x64,%esi
mov    $0x1,%edx
call   1040 <main1@plt>
xor    %edi,%edi
mov    $0xf,%esi
xor    %edx,%edx
call   1040 <main1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @check_vect()
%3 = call i32 @main1(i32 100, i32 100, i32 1)
%4 = call i32 @main1(i32 0, i32 15, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @check_vect()
%2 = tail call i32 @main1(i32 100, i32 100, i32 1)
%3 = tail call i32 @main1(i32 0, i32 15, i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ j64_true_encode(char *, int);
int /*<<< orphan*/ memset(char *, char, int);
scalar_t__ strcmp(char *, char *);
int test_true_encode_2(void) {
  char buf[2 + 1];
  memset(buf, '\0', sizeof(buf));
  j64_true_encode(buf, 2);
  return strcmp(buf, "tr") == 0;
}


x86 assembly (clang, -O0):
<test_true_encode_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x3(%rbp),%rdi
xor    %esi,%esi
mov    $0x3,%edx
call   1040 <memset@plt>
lea    -0x3(%rbp),%rdi
mov    $0x2,%esi
call   1030 <j64_true_encode@plt>
lea    -0x3(%rbp),%rdi
lea    0xe9f(%rip),%rsi
call   1050 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_true_encode_2>:
push   %rbx
sub    $0x10,%rsp
lea    0xd(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x3,%edx
call   1040 <memset@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <j64_true_encode@plt>
lea    0xea3(%rip),%rsi
mov    %rbx,%rdi
call   1050 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"tr\00"
define i32 @test_true_encode_2() {
%1 = alloca [3 x i8]
%2 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
%3 = call i32 @memset(i8* %2, i8 signext 0, i32 3)
%4 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
%5 = call i32 @j64_true_encode(i8* %4, i32 2)
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
%7 = call i64 @strcmp(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"tr\00"
define i32 @test_true_encode_2() {
%1 = alloca [3 x i8]
%2 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
%3 = call i32 @memset(i8* %2, i8 signext 0, i32 3)
%4 = call i32 @j64_true_encode(i8* %2, i32 2)
%5 = call i64 @strcmp(i8* %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
int test_imm_A6uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xa6,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6uint64_highword_mem>:
testb  $0xa6,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 166
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A6uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 712964571136
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}