xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int arr[] = {6, 7, 8, 9, 10};
  int *ptr = arr;
  *(ptr++) += 123;
  printf("%d, %d\n", *ptr, *(++ptr));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed5(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x28(%rbp)
mov    (%rax),%ecx
add    $0x7b,%ecx
mov    %ecx,(%rax)
mov    -0x28(%rbp),%rax
mov    (%rax),%esi
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x28(%rbp)
mov    0x4(%rax),%edx
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x7,%esi
mov    $0x8,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.arr = [5 x i32] [i32 6, i32 7, i32 8, i32 9, i32 10]
@.str = [8 x i8] c"%d, %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca i32*
store i32 0, i32* %1
%4 = bitcast [5 x i32]* %2 to i8*
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i32 1
store i32* %7, i32** %3
%8 = load i32, i32* %6
%9 = add nsw i32 %8, 123
store i32 %9, i32* %6
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %3
%14 = load i32, i32* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%d, %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 7, i32 8)
ret i32 0
}
int foo2() {}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
ret

LLVM IR (-O0):
define i32 @foo2() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @foo2() {
ret i32 undef
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ const UINT16_MAX;
uint32_t __stdfix_sat_ur(const uint32_t x) {
  if (x > UINT16_MAX)
    return (UINT16_MAX);
  return (x);
}


x86 assembly (clang, -O0):
<__stdfix_sat_ur>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ecd(%rip),%rcx
cmp    (%rcx),%rax
jle    112f <__stdfix_sat_ur+0x2f>
mov    0x2ebd(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1137 <__stdfix_sat_ur+0x37>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_sat_ur>:
mov    %rdi,%rax
sar    $0x3f,%rax
and    %rdi,%rax
ret

LLVM IR (-O0):
@UINT16_MAX = constant i64 0
define i64 @__stdfix_sat_ur(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = load i64, i64* @UINT16_MAX
%6 = icmp sgt i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i64, i64* @UINT16_MAX
store i64 %8, i64* %2
br label %11
9: ; preds = %1
%10 = load i64, i64* %3
store i64 %10, i64* %2
br label %11
11: ; preds = %9, %7
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
@UINT16_MAX = constant i64 0
define i64 @__stdfix_sat_ur(i64 %0) {
%2 = icmp slt i64 %0, 0
%3 = select i1 %2, i64 %0, i64 0
ret i64 %3
}
/* Variables and functions */
bool IsOperator(char ch) { return (ch >= '%' && ch <= '/') || ch == '^'; }


x86 assembly (clang, -O0):
<IsOperator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x25,%eax
jl     1129 <IsOperator+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2f,%ecx
mov    %al,-0x2(%rbp)
jle    1136 <IsOperator+0x36>
movsbl -0x1(%rbp),%eax
cmp    $0x5e,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsOperator>:
lea    -0x25(%rdi),%eax
cmp    $0xb,%al
setb   %al
cmp    $0x5e,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @IsOperator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 37
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 47
br i1 %9, label %14, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 94
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @IsOperator(i8 signext %0) {
%2 = add i8 %0, -37
%3 = icmp ult i8 %2, 11
%4 = icmp eq i8 %0, 94
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
float FloatNAN(void) {
  static long l_nanFloat = 0x7fffffff;
  static float *f_nanFloat = (float *)&l_nanFloat;
  return *f_nanFloat;
}


x86 assembly (clang, -O0):
<FloatNAN>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1d(%rip),%rax
movss  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FloatNAN>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
@FloatNAN.l_nanFloat = internal global i64 2147483647
@FloatNAN.f_nanFloat = internal global float* bitcast (i64* @FloatNAN.l_nanFloat to float*)
define float @FloatNAN() {
%1 = load float*, float** @FloatNAN.f_nanFloat
%2 = load float, float* %1
ret float %2
}

LLVM IR (-O2):
define float @FloatNAN() {
ret float 0x7FFFFFFFE0000000
}
int is_intel_pt_event(struct perf_event *event) { return 0; }


x86 assembly (clang, -O0):
<is_intel_pt_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_intel_pt_event>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.perf_event = type opaque
define i32 @is_intel_pt_event(%struct.perf_event* %0) {
%2 = alloca %struct.perf_event*
store %struct.perf_event* %0, %struct.perf_event** %2
ret i32 0
}

LLVM IR (-O2):
%struct.perf_event = type opaque
define i32 @is_intel_pt_event(%struct.perf_event* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ main();
void start(void) { main(); }


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <main@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
xor    %eax,%eax
jmp    1030 <main@plt>

LLVM IR (-O0):
define void @start() {
%1 = call i32 (...) @main()
ret void
}

LLVM IR (-O2):
define void @start() {
%1 = tail call i32 (...) @main()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void min_caml_debug(void *fv, int n) { printf("[%d]\n", n); }


x86 assembly (clang, -O0):
<min_caml_debug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_caml_debug>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"[%d]\0A\00"
define void @min_caml_debug(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"[%d]\0A\00"
define void @min_caml_debug(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int isupper(int ch) { return ch >= 0x41 && ch <= 0x5A; }


x86 assembly (clang, -O0):
<isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isupper+0x20>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
int x12_process_syn(struct mypacket *packet) { return 0; }


x86 assembly (clang, -O0):
<x12_process_syn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x12_process_syn>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mypacket = type opaque
define i32 @x12_process_syn(%struct.mypacket* %0) {
%2 = alloca %struct.mypacket*
store %struct.mypacket* %0, %struct.mypacket** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mypacket = type opaque
define i32 @x12_process_syn(%struct.mypacket* nocapture readnone %0) {
ret i32 0
}
void MCHP_Eint_EmptyFunc(void) {}


x86 assembly (clang, -O0):
<MCHP_Eint_EmptyFunc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCHP_Eint_EmptyFunc>:
ret

LLVM IR (-O0):
define void @MCHP_Eint_EmptyFunc() {
ret void
}

LLVM IR (-O2):
define void @MCHP_Eint_EmptyFunc() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, char *);
void function_time(char *time) {
  write("json-task.json", "\"real-duration-hours\":\"%s\" ", time);
}


x86 assembly (clang, -O0):
<function_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_time>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [28 x i8] c"\22real-duration-hours\22:\22%s\22 \00"
define void @function_time(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [28 x i8] c"\22real-duration-hours\22:\22%s\22 \00"
define void @function_time(i8* %0) {
%2 = tail call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
struct ctrl_iface_dbus_priv *
wpa_supplicant_dbus_ctrl_iface_init(struct wpa_global *global) {
  return (struct ctrl_iface_dbus_priv *)1;
}


x86 assembly (clang, -O0):
<wpa_supplicant_dbus_ctrl_iface_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_supplicant_dbus_ctrl_iface_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.ctrl_iface_dbus_priv = type opaque
%struct.wpa_global = type opaque
define %struct.ctrl_iface_dbus_priv* @wpa_supplicant_dbus_ctrl_iface_init(%struct.wpa_global* %0) {
%2 = alloca %struct.wpa_global*
store %struct.wpa_global* %0, %struct.wpa_global** %2
ret %struct.ctrl_iface_dbus_priv* inttoptr (i64 1 to %struct.ctrl_iface_dbus_priv*)
}

LLVM IR (-O2):
%struct.ctrl_iface_dbus_priv = type opaque
%struct.wpa_global = type opaque
define %struct.ctrl_iface_dbus_priv* @wpa_supplicant_dbus_ctrl_iface_init(%struct.wpa_global* nocapture readnone %0) {
ret %struct.ctrl_iface_dbus_priv* inttoptr (i64 1 to %struct.ctrl_iface_dbus_priv*)
}
/* Variables and functions */
int /*<<< orphan*/ core1_swap(char *, int);
void U_EMRPOLYLINE_swap(char *record, int torev) { core1_swap(record, torev); }


x86 assembly (clang, -O0):
<U_EMRPOLYLINE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core1_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRPOLYLINE_swap>:
jmp    1030 <core1_swap@plt>

LLVM IR (-O0):
define void @U_EMRPOLYLINE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core1_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_EMRPOLYLINE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core1_swap(i8* %0, i32 %1)
ret void
}
int setlogin(name) const char *name;
{ return 0; }


x86 assembly (clang, -O0):
<setlogin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setlogin>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @setlogin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @setlogin(i8* nocapture readnone %0) {
ret i32 0
}
void rotr(int *a, int *b, int *c) {
  int help = *c;
  *c = *b;
  *b = *a;
  *a = help;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rdx),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdx)
mov    (%rdi),%ecx
mov    %ecx,(%rsi)
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %6
%9 = load i32, i32* %8
store i32 %9, i32* %7
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = load i32*, i32** %6
store i32 %11, i32* %12
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = load i32*, i32** %5
store i32 %14, i32* %15
%16 = load i32, i32* %7
%17 = load i32*, i32** %4
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = load i32, i32* %1
store i32 %5, i32* %2
%6 = load i32, i32* %0
store i32 %6, i32* %1
store i32 %4, i32* %0
ret void
}
/* Variables and functions */
int rand();
void foo(float a) {
  float b;
  int i;
  b = ((float)(rand() % 65536)) / ((float)(rand() % 65536));
  for (i = 0; i < b; i++)
    a += b;
  b = a;
  return;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x10000,%ecx
cltd
idiv   %ecx
cvtsi2ss %edx,%xmm0
movss  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0x10(%rbp),%xmm0
mov    $0x10000,%ecx
cltd
idiv   %ecx
cvtsi2ss %edx,%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cvtsi2ssl -0xc(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    118d <foo+0x7d>
movss  -0x8(%rbp),%xmm0
addss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    115d <foo+0x4d>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rand@plt>

LLVM IR (-O0):
define void @foo(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32
store float %0, float* %2
%5 = call i32 (...) @rand()
%6 = srem i32 %5, 65536
%7 = sitofp i32 %6 to float
%8 = call i32 (...) @rand()
%9 = srem i32 %8, 65536
%10 = sitofp i32 %9 to float
%11 = fdiv float %7, %10
store float %11, float* %3
store i32 0, i32* %4
br label %12
12: ; preds = %21, %1
%13 = load i32, i32* %4
%14 = sitofp i32 %13 to float
%15 = load float, float* %3
%16 = fcmp olt float %14, %15
br i1 %16, label %17, label %24
17: ; preds = %12
%18 = load float, float* %3
%19 = load float, float* %2
%20 = fadd float %19, %18
store float %20, float* %2
br label %21
21: ; preds = %17
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %12
24: ; preds = %12
%25 = load float, float* %2
store float %25, float* %3
ret void
}

LLVM IR (-O2):
define void @foo(float %0) {
%2 = tail call i32 (...) @rand()
%3 = tail call i32 (...) @rand()
ret void
}
/* Variables and functions */
int i2c_smbus_write_word_data(int, int, int);
int radxaI2CWriteReg16(int fd, int reg, int data) {
  return i2c_smbus_write_word_data(fd, reg, data);
}


x86 assembly (clang, -O0):
<radxaI2CWriteReg16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <i2c_smbus_write_word_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radxaI2CWriteReg16>:
jmp    1030 <i2c_smbus_write_word_data@plt>

LLVM IR (-O0):
define i32 @radxaI2CWriteReg16(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @i2c_smbus_write_word_data(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @radxaI2CWriteReg16(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @i2c_smbus_write_word_data(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
int fun486() { return 486; }


x86 assembly (clang, -O0):
<fun486>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun486>:
mov    $0x1e6,%eax
ret

LLVM IR (-O0):
define i32 @fun486() {
ret i32 486
}

LLVM IR (-O2):
define i32 @fun486() {
ret i32 486
}
/* Variables and functions */
int fork();
int /*<<< orphan*/ printf(char *, ...);
int main() {
  printf("pid %d\n", fork());
  printf("hello world\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <fork@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xeb9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"pid %d\0A\00"
@.str.1 = [13 x i8] c"hello world\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fork()
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"pid %d\0A\00"
@str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = tail call i32 (...) @fork()
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int _ptrcmp(const void *a, const void *b) { return a != b; }


x86 assembly (clang, -O0):
<_ptrcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ptrcmp>:
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i32 @_ptrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ne i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @_ptrcmp(i8* readnone %0, i8* readnone %1) {
%3 = icmp ne i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i = 1;
  while (i <= 5) {
    printf("%d^2 = %d\n", i, ((i++) * (i++)));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jg     115d <main+0x4d>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    %edx,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x8(%rbp)
imul   %eax,%edx
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
mov    $0xc,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
mov    $0x1e,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%d^2 = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 5
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
%12 = mul nsw i32 %8, %10
%13 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %12)
br label %3
14: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"%d^2 = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 1, i32 2)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 3, i32 12)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 5, i32 30)
ret i32 0
}
char *TagType(char tag[0x4]) {
  char rev[0x4] = {tag[0x3], tag[0x2], tag[0x1], tag[0x0]};
  return rev;
}


x86 assembly (clang, -O0):
<TagType>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x3(%rax),%al
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%al
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%al
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x9(%rbp)
lea    -0xc(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TagType>:
lea    -0x4(%rsp),%rax
ret

LLVM IR (-O0):
define i8* @TagType(i8* %0) {
%2 = alloca i8*
%3 = alloca [4 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 3
%7 = load i8, i8* %6
store i8 %7, i8* %4
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 2
%11 = load i8, i8* %10
store i8 %11, i8* %8
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = load i8, i8* %14
store i8 %15, i8* %12
%16 = getelementptr inbounds i8, i8* %12, i64 1
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i64 0
%19 = load i8, i8* %18
store i8 %19, i8* %16
%20 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
ret i8* %20
}

LLVM IR (-O2):
define noalias i8* @TagType(i8* nocapture %0) {
%2 = alloca [4 x i8]
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
ret i8* %3
}
int test_imm_53uint8_mem(unsigned char *val) {
  return ((*val) & (-0x53 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_53uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffad,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_53uint8_mem>:
testb  $0xad,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_53uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -83
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_53uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -83
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void XtGetSelectionValue() {}


x86 assembly (clang, -O0):
<XtGetSelectionValue>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtGetSelectionValue>:
ret

LLVM IR (-O0):
define void @XtGetSelectionValue() {
ret void
}

LLVM IR (-O2):
define void @XtGetSelectionValue() {
ret void
}
unsigned int assemble_3(x)
unsigned int x;
{ return (((x & 1) << 2) | ((x & 6) >> 1)) & 7; }


x86 assembly (clang, -O0):
<assemble_3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
shl    $0x2,%eax
mov    -0x4(%rbp),%ecx
and    $0x6,%ecx
shr    $0x1,%ecx
or     %ecx,%eax
and    $0x7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<assemble_3>:
mov    %edi,%eax
and    $0x1,%eax
shr    %edi
and    $0x3,%edi
lea    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @assemble_3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = shl i32 %4, 2
%6 = load i32, i32* %2
%7 = and i32 %6, 6
%8 = lshr i32 %7, 1
%9 = or i32 %5, %8
%10 = and i32 %9, 7
ret i32 %10
}

LLVM IR (-O2):
define i32 @assemble_3(i32 %0) {
%2 = shl i32 %0, 2
%3 = and i32 %2, 4
%4 = lshr i32 %0, 1
%5 = and i32 %4, 3
%6 = or i32 %3, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ ep93xx_devcfg_set_clear(unsigned int, int);
void ep93xx_devcfg_set_bits(unsigned int bits) {
  ep93xx_devcfg_set_clear(bits, 0x00);
}


x86 assembly (clang, -O0):
<ep93xx_devcfg_set_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <ep93xx_devcfg_set_clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ep93xx_devcfg_set_bits>:
xor    %esi,%esi
jmp    1030 <ep93xx_devcfg_set_clear@plt>

LLVM IR (-O0):
define void @ep93xx_devcfg_set_bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ep93xx_devcfg_set_clear(i32 %3, i32 0)
ret void
}

LLVM IR (-O2):
define void @ep93xx_devcfg_set_bits(i32 %0) {
%2 = tail call i32 @ep93xx_devcfg_set_clear(i32 %0, i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ext4_bmap_is_bit_set(int /*<<< orphan*/ *,
                                        int /*<<< orphan*/);
bool ext4_bmap_is_bit_clr(uint8_t *bmap, uint32_t bit) {
  return !ext4_bmap_is_bit_set(bmap, bit);
}


x86 assembly (clang, -O0):
<ext4_bmap_is_bit_clr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ext4_bmap_is_bit_set@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext4_bmap_is_bit_clr>:
push   %rax
call   1030 <ext4_bmap_is_bit_set@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ext4_bmap_is_bit_clr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @ext4_bmap_is_bit_set(i32* %5, i32 %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ext4_bmap_is_bit_clr(i32* %0, i32 %1) {
%3 = tail call i32 @ext4_bmap_is_bit_set(i32* %0, i32 %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ cs_log_txt(char *, char *);
void gsms_unavail(void) {
  cs_log_txt("gbox/sms", "INFO: GSMS feature disabled by conf");
}


x86 assembly (clang, -O0):
<gsms_unavail>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <cs_log_txt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsms_unavail>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
jmp    1030 <cs_log_txt@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"gbox/sms\00"
@.str.1 = [36 x i8] c"INFO: GSMS feature disabled by conf\00"
define void @gsms_unavail() {
%1 = call i32 @cs_log_txt(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"gbox/sms\00"
@.str.1 = [36 x i8] c"INFO: GSMS feature disabled by conf\00"
define void @gsms_unavail() {
%1 = tail call i32 @cs_log_txt(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int i2c_smbus_read_byte(int);
int hummingboardI2CRead(int fd) { return i2c_smbus_read_byte(fd); }


x86 assembly (clang, -O0):
<hummingboardI2CRead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <i2c_smbus_read_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hummingboardI2CRead>:
jmp    1030 <i2c_smbus_read_byte@plt>

LLVM IR (-O0):
define i32 @hummingboardI2CRead(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @i2c_smbus_read_byte(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @hummingboardI2CRead(i32 %0) {
%2 = tail call i32 @i2c_smbus_read_byte(i32 %0)
ret i32 %2
}
char *gets(char *__str) {
  char *return_value___gets_chk$1;
  char *return_value___gets_warn$2;
  return_value___gets_warn$2 = __gets_warn(__str);
  return return_value___gets_warn$2;
}


x86 assembly (clang, -O0):
<gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <__gets_warn@plt>
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gets>:
push   %rax
xor    %eax,%eax
call   1030 <__gets_warn@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @gets(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @__gets_warn to i32 (i8*, ...)*)(i8* %5)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %4
%9 = load i8*, i8** %4
ret i8* %9
}

LLVM IR (-O2):
define i8* @gets(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @__gets_warn to i32 (i8*, ...)*)(i8* %0)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ send_err;

/* Variables and functions */
unsigned int htonl(int);
int send_safe(int, unsigned int *, int);
int response_errno(int sock, int err_num) {
  unsigned send_err = htonl(-err_num);
  return send_safe(sock, &send_err, sizeof(send_err));
}


x86 assembly (clang, -O0):
<response_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
sub    -0x8(%rbp),%edi
call   1030 <htonl@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1040 <send_safe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<response_errno>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
neg    %esi
mov    %esi,%edi
call   1030 <htonl@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %ebx,%edi
mov    $0x4,%edx
call   1040 <send_safe@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @response_errno(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 0, %6
%8 = call i32 @htonl(i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = call i32 @send_safe(i32 %9, i32* %5, i32 4)
ret i32 %10
}

LLVM IR (-O2):
define i32 @response_errno(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = sub nsw i32 0, %1
%6 = tail call i32 @htonl(i32 %5)
store i32 %6, i32* %3
%7 = call i32 @send_safe(i32 %0, i32* %3, i32 4)
ret i32 %7
}
int elv_register_queue(struct request_queue *q) {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<elv_register_queue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<elv_register_queue>:
ret

LLVM IR (-O0):
%struct.request_queue = type opaque
define i32 @elv_register_queue(%struct.request_queue* %0) {
%2 = alloca %struct.request_queue*
%3 = alloca i32
store %struct.request_queue* %0, %struct.request_queue** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.request_queue = type opaque
define i32 @elv_register_queue(%struct.request_queue* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int64_t sky_timestamp_shift(int64_t value) {
  int64_t usec = value % 1000000;
  int64_t sec = (value / 1000000);
  return (sec << 20) + usec;
}


x86 assembly (clang, -O0):
<sky_timestamp_shift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x14,%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sky_timestamp_shift>:
movslq %edi,%rcx
imul   $0x431bde83,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rax
add    %edx,%eax
imul   $0xf4240,%eax,%edx
sub    %edx,%ecx
shl    $0x14,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sky_timestamp_shift(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = srem i32 %5, 1000000
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 1000000
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = shl i32 %9, 20
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @sky_timestamp_shift(i32 %0) {
%2 = srem i32 %0, 1000000
%3 = sdiv i32 %0, 1000000
%4 = shl i32 %3, 20
%5 = add nsw i32 %4, %2
ret i32 %5
}
/* Variables and functions */
scalar_t__ set_begin(void *);
scalar_t__ set_end(void *);
int set_empty(void *S) { return (set_begin(S) == set_end(S)); }


x86 assembly (clang, -O0):
<set_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <set_begin@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <set_end@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_empty>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <set_begin@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <set_end@plt>
xor    %ecx,%ecx
cmp    %rax,%r14
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @set_empty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @set_begin(i8* %3)
%5 = load i8*, i8** %2
%6 = call i64 @set_end(i8* %5)
%7 = icmp eq i64 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @set_empty(i8* %0) {
%2 = tail call i64 @set_begin(i8* %0)
%3 = tail call i64 @set_end(i8* %0)
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
int re_match(bufp, string, length, start, regs)
struct re_pattern_buffer *bufp;
const char *string;
int length, start;
struct re_registers *regs;
{
  return re_search_stub(bufp, string, length, start, 0, length, regs, 1);
}


x86 assembly (clang, -O0):
<re_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    -0x14(%rbp),%r9d
mov    -0x20(%rbp),%rax
xor    %r8d,%r8d
mov    %rax,(%rsp)
movl   $0x1,0x8(%rsp)
mov    $0x0,%al
call   1030 <re_search_stub@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<re_match>:
push   %rax
mov    %r8,%r10
xor    %r8d,%r8d
mov    %edx,%r9d
xor    %eax,%eax
push   $0x1
push   %r10
call   1030 <re_search_stub@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, %struct.re_registers* %4) {
%6 = alloca %struct.re_pattern_buffer*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.re_registers*
store %struct.re_pattern_buffer* %0, %struct.re_pattern_buffer** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store %struct.re_registers* %4, %struct.re_registers** %10
%11 = load %struct.re_pattern_buffer*, %struct.re_pattern_buffer** %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %8
%16 = load %struct.re_registers*, %struct.re_registers** %10
%17 = call i32 (%struct.re_pattern_buffer*, i8*, i32, i32, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_search_stub to i32 (%struct.re_pattern_buffer*, i8*, i32, i32, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %11, i8* %12, i32 %13, i32 %14, i32 0, i32 %15, %struct.re_registers* %16, i32 1)
ret i32 %17
}

LLVM IR (-O2):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, %struct.re_registers* %4) {
%6 = tail call i32 (%struct.re_pattern_buffer*, i8*, i32, i32, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_search_stub to i32 (%struct.re_pattern_buffer*, i8*, i32, i32, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, i32 0, i32 %2, %struct.re_registers* %4, i32 1)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ outstr(char *);
int /*<<< orphan*/ tab();
void ot(char *ptr) {
  tab();
  outstr(ptr);
}


x86 assembly (clang, -O0):
<ot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <tab@plt>
mov    -0x8(%rbp),%rdi
call   1030 <outstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ot>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <tab@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <outstr@plt>

LLVM IR (-O0):
define void @ot(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @tab()
%4 = load i8*, i8** %2
%5 = call i32 @outstr(i8* %4)
ret void
}

LLVM IR (-O2):
define void @ot(i8* %0) {
%2 = tail call i32 (...) @tab()
%3 = tail call i32 @outstr(i8* %0)
ret void
}
void handle_46(sig) int sig;
{}


x86 assembly (clang, -O0):
<handle_46>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_46>:
ret

LLVM IR (-O0):
define void @handle_46(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_46(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int safe_atou(char const *, unsigned int *);
int safe_atou32(const char *s, uint32_t *ret_u) {
  do {
    switch (0) {
    case 0:
    case !!(sizeof(uint32_t) == sizeof(unsigned int)):;
    }
  } while (false);
  return safe_atou(s, (unsigned int *)ret_u);
}


x86 assembly (clang, -O0):
<safe_atou32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
jmp    1125 <safe_atou32+0x15>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <safe_atou@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_atou32>:
jmp    1030 <safe_atou@plt>

LLVM IR (-O0):
define i32 @safe_atou32(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
br label %5
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i8*, i8** %3
%8 = load i32*, i32** %4
%9 = call i32 @safe_atou(i8* %7, i32* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @safe_atou32(i8* %0, i32* %1) {
%3 = tail call i32 @safe_atou(i8* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ f(int);
int main() {
  if (f((1 << (sizeof(int) * 8 - 2))))
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x40000000,%edi
call   1040 <f@plt>
cmp    $0x0,%rax
je     114a <main+0x2a>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x40000000,%edi
call   1040 <f@plt>
test   %rax,%rax
jne    1134 <main+0x14>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @f(i32 1073741824)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @f(i32 1073741824)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
unsigned char BitReverse(unsigned char x) {
  int i;
  unsigned char Temp = 0;
  for (i = 0;; i++) {
    if (x & 0x80)
      Temp |= 0x80;
    if (i == 7)
      break;
    x <<= 1;
    Temp >>= 1;
  }
  return Temp;
}


x86 assembly (clang, -O0):
<BitReverse>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movb   $0x0,-0x9(%rbp)
movl   $0x0,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1133 <BitReverse+0x33>
movzbl -0x9(%rbp),%eax
or     $0x80,%eax
mov    %al,-0x9(%rbp)
cmpl   $0x7,-0x8(%rbp)
jne    1142 <BitReverse+0x42>
jmp    1164 <BitReverse+0x64>
movzbl -0x1(%rbp),%eax
shl    $0x1,%eax
mov    %al,-0x1(%rbp)
movzbl -0x9(%rbp),%eax
sar    $0x1,%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <BitReverse+0x15>
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BitReverse>:
rol    $0x4,%dil
mov    %edi,%eax
and    $0x33,%al
shl    $0x2,%al
shr    $0x2,%dil
and    $0x33,%dil
or     %dil,%al
mov    %eax,%ecx
and    $0x55,%cl
add    %cl,%cl
shr    %al
and    $0x55,%al
or     %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @BitReverse(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i8
store i8 %0, i8* %2
store i8 0, i8* %4
store i32 0, i32* %3
br label %5
5: ; preds = %28, %1
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = and i32 %7, 128
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %5
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = or i32 %12, 128
%14 = trunc i32 %13 to i8
store i8 %14, i8* %4
br label %15
15: ; preds = %10, %5
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 7
br i1 %17, label %18, label %19
18: ; preds = %15
br label %31
19: ; preds = %15
%20 = load i8, i8* %2
%21 = zext i8 %20 to i32
%22 = shl i32 %21, 1
%23 = trunc i32 %22 to i8
store i8 %23, i8* %2
%24 = load i8, i8* %4
%25 = zext i8 %24 to i32
%26 = ashr i32 %25, 1
%27 = trunc i32 %26 to i8
store i8 %27, i8* %4
br label %28
28: ; preds = %19
%29 = load i32, i32* %3
%30 = add nsw i32 %29, 1
store i32 %30, i32* %3
br label %5
31: ; preds = %18
%32 = load i8, i8* %4
ret i8 %32
}

LLVM IR (-O2):
define zeroext i8 @BitReverse(i8 zeroext %0) {
%2 = call i8 @llvm.bitreverse.i8(i8 %0)
ret i8 %2
}
/* Variables and functions */
int DoVprintf(char *, int);
int /*<<< orphan*/ Fail(char *, int, int);
int strlen(char *);
void DoNumTest(char *formatstr, int param, char *checkstr) {
  int ret;
  ret = DoVprintf(formatstr, param);
  if (ret != strlen(checkstr)) {
    Fail("Expected vprintf to return %d, got %d.\n", strlen(checkstr), ret);
  }
}


x86 assembly (clang, -O0):
<DoNumTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <DoVprintf@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%eax
cmp    %ecx,%eax
je     1188 <DoNumTest+0x58>
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%esi
mov    -0x1c(%rbp),%edx
lea    0xe7d(%rip),%rdi
call   1050 <Fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoNumTest>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
call   1040 <DoVprintf@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <strlen@plt>
cmp    %eax,%ebp
jne    1150 <DoNumTest+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
call   1030 <strlen@plt>
lea    0xea1(%rip),%rdi
mov    %eax,%esi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <Fail@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Expected vprintf to return %d, got %d.\0A\00"
define void @DoNumTest(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = call i32 @DoVprintf(i8* %8, i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = load i8*, i8** %6
%13 = call i32 @strlen(i8* %12)
%14 = icmp ne i32 %11, %13
br i1 %14, label %15, label %20
15: ; preds = %3
%16 = load i8*, i8** %6
%17 = call i32 @strlen(i8* %16)
%18 = load i32, i32* %7
%19 = call i32 @Fail(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %17, i32 %18)
br label %20
20: ; preds = %15, %3
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c"Expected vprintf to return %d, got %d.\0A\00"
define void @DoNumTest(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @DoVprintf(i8* %0, i32 %1)
%5 = tail call i32 @strlen(i8* %2)
%6 = icmp eq i32 %4, %5
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = tail call i32 @strlen(i8* %2)
%9 = tail call i32 @Fail(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %4)
br label %10
10: ; preds = %7, %3
ret void
}