xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
int /*<<< orphan*/ system(char *);
void erlExec(char *file) {
  char *exec = (char *)malloc(256 * sizeof(char));
  strcpy(exec, "erlc ");
  strcat(exec, file);
  system(exec);
}


x86 assembly (clang, -O0):
<erlExec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x100,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xe9b(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1060 <strcat@plt>
mov    -0x10(%rbp),%rdi
call   1040 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erlExec>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x100,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
lea    0xea5(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1060 <strcat@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <system@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"erlc \00"
define void @erlExec(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 @malloc(i32 256)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strcpy(i8* %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcat(i8* %8, i8* %9)
%11 = load i8*, i8** %3
%12 = call i32 @system(i8* %11)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"erlc \00"
define void @erlExec(i8* %0) {
%2 = tail call i64 @malloc(i32 256)
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @strcat(i8* %3, i8* %0)
%6 = tail call i32 @system(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print_help(const char *prg) {
  printf("Usage: %s -g <correct.rom.dat> -b <corrupt.rom.dat> "
         "-x <xml>\n",
         prg);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"Usage: %s -g <correct.rom.dat> -b <corrupt.rom.dat> -x <xml>\0A\00"
define void @print_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [62 x i8] c"Usage: %s -g <correct.rom.dat> -b <corrupt.rom.dat> -x <xml>\0A\00"
define void @print_help(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_BIGNUM_C and/or MBEDTLS_ENTROPY_C and/or "
         "MBEDTLS_SHA256_C and/or MBEDTLS_MD_C and/or "
         "MBEDTLS_PK_PARSE_C and/or MBEDTLS_FS_IO and/or "
         "MBEDTLS_CTR_DRBG_C not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [173 x i8] c"MBEDTLS_BIGNUM_C and/or MBEDTLS_ENTROPY_C and/or MBEDTLS_SHA256_C and/or MBEDTLS_MD_C and/or MBEDTLS_PK_PARSE_C and/or MBEDTLS_FS_IO and/or MBEDTLS_CTR_DRBG_C not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([173 x i8], [173 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [172 x i8] c"MBEDTLS_BIGNUM_C and/or MBEDTLS_ENTROPY_C and/or MBEDTLS_SHA256_C and/or MBEDTLS_MD_C and/or MBEDTLS_PK_PARSE_C and/or MBEDTLS_FS_IO and/or MBEDTLS_CTR_DRBG_C not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([172 x i8], [172 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
the_shell() { system("/bin/sh"); }


x86 assembly (clang, -O0):
<the_shell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <system@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<the_shell>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"/bin/sh\00"
define i32 @the_shell() {
%1 = alloca i32
%2 = call i32 @system(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [8 x i8] c"/bin/sh\00"
define i32 @the_shell() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
double ceil(double);
double floor(double);
double su_rint(double x) { return x >= 0. ? floor(x + .5) : ceil(x - .5); }


x86 assembly (clang, -O0):
<su_rint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     115b <su_rint+0x3b>
movsd  0xeb9(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1040 <floor@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    1176 <su_rint+0x56>
movsd  -0x8(%rbp),%xmm0
movsd  0xe98(%rip),%xmm1
subsd  %xmm1,%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<su_rint>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jae    1137 <su_rint+0x17>
addsd  0xed6(%rip),%xmm0
jmp    1030 <ceil@plt>
addsd  0xec1(%rip),%xmm0
jmp    1040 <floor@plt>

LLVM IR (-O0):
define double @su_rint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0.000000e+00
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load double, double* %2
%7 = fadd double %6, 5.000000e-01
%8 = call double @llvm.floor.f64(double %7)
br label %13
9: ; preds = %1
%10 = load double, double* %2
%11 = fsub double %10, 5.000000e-01
%12 = call double @llvm.ceil.f64(double %11)
br label %13
13: ; preds = %9, %5
%14 = phi double [ %8, %5 ], [ %12, %9 ]
ret double %14
}

LLVM IR (-O2):
define double @su_rint(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = fadd double %0, 5.000000e-01
%5 = tail call double @llvm.floor.f64(double %4)
br label %9
6: ; preds = %1
%7 = fadd double %0, -5.000000e-01
%8 = tail call double @llvm.ceil.f64(double %7)
br label %9
9: ; preds = %6, %3
%10 = phi double [ %5, %3 ], [ %8, %6 ]
ret double %10
}
void foo192() {}


x86 assembly (clang, -O0):
<foo192>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo192>:
ret

LLVM IR (-O0):
define void @foo192() {
ret void
}

LLVM IR (-O2):
define void @foo192() {
ret void
}
int sc_is_blank(unsigned char element) {
  if (' ' == element || '\t' == element || '\r' == element || '\n' == element)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<sc_is_blank>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%ecx
mov    $0x20,%eax
cmp    %ecx,%eax
je     114e <sc_is_blank+0x4e>
movzbl -0x5(%rbp),%ecx
mov    $0x9,%eax
cmp    %ecx,%eax
je     114e <sc_is_blank+0x4e>
movzbl -0x5(%rbp),%ecx
mov    $0xd,%eax
cmp    %ecx,%eax
je     114e <sc_is_blank+0x4e>
movzbl -0x5(%rbp),%ecx
mov    $0xa,%eax
cmp    %ecx,%eax
jne    115a <sc_is_blank+0x5a>
movl   $0x1,-0x4(%rbp)
jmp    1161 <sc_is_blank+0x61>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sc_is_blank>:
cmp    $0x20,%dil
ja     111e <sc_is_blank+0x1e>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002600,%rdx
bt     %rcx,%rdx
jae    111e <sc_is_blank+0x1e>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sc_is_blank(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp eq i32 32, %5
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp eq i32 9, %9
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = icmp eq i32 13, %13
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp eq i32 10, %17
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i32 1, i32* %2
br label %21
20: ; preds = %15
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @sc_is_blank(i8 zeroext %0) {
switch i8 %0, label %2 [
i8 32, label %3
i8 13, label %3
i8 10, label %3
i8 9, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
int main() {
  int a = 6;
  int b = 6;
  for (a = 0; a < 6; ++a) {
    for (b = 0; b < 6; ++b) {
    }
  }
  if (!(a == 6 && b == 6)) {
  ERROR:
    goto ERROR;
  }
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x6,-0x8(%rbp)
jge    1161 <main+0x61>
movl   $0x0,-0xc(%rbp)
cmpl   $0x6,-0xc(%rbp)
jge    114e <main+0x4e>
jmp    1140 <main+0x40>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1131 <main+0x31>
jmp    1153 <main+0x53>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1120 <main+0x20>
cmpl   $0x6,-0x8(%rbp)
jne    1175 <main+0x75>
cmpl   $0x6,-0xc(%rbp)
je     117f <main+0x7f>
jmp    117a <main+0x7a>
jmp    117a <main+0x7a>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 6, i32* %2
store i32 6, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %16, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 6
br i1 %6, label %7, label %19
7: ; preds = %4
store i32 0, i32* %3
br label %8
8: ; preds = %12, %7
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 6
br i1 %10, label %11, label %15
11: ; preds = %8
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %8
15: ; preds = %8
br label %16
16: ; preds = %15
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %2
%21 = icmp eq i32 %20, 6
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %3
%24 = icmp eq i32 %23, 6
br i1 %24, label %27, label %25
25: ; preds = %22, %19
br label %26
26: ; preds = %26, %25
br label %26
27: ; preds = %22
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
void *ptr_align(const void *p, size_t alignment) {
  void const *p0 = p;
  void const *p1 = p0 + alignment - 1;
  return (void *)(p1 - (size_t)p1 % alignment);
}


x86 assembly (clang, -O0):
<ptr_align>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    -0x28(%rbp),%rax
xor    %ecx,%ecx
sub    %rdx,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_align>:
lea    (%rdi,%rsi,1),%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     111e <ptr_align+0x1e>
mov    %rcx,%rax
xor    %edx,%edx
div    %rsi
jmp    1124 <ptr_align+0x24>
mov    %ecx,%eax
xor    %edx,%edx
div    %esi
sub    %rdx,%rcx
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i8* @ptr_align(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i64, i64* %4
%10 = getelementptr i8, i8* %8, i64 %9
%11 = getelementptr i8, i8* %10, i64 -1
store i8* %11, i8** %6
%12 = load i8*, i8** %6
%13 = load i8*, i8** %6
%14 = ptrtoint i8* %13 to i64
%15 = load i64, i64* %4
%16 = urem i64 %14, %15
%17 = sub i64 0, %16
%18 = getelementptr i8, i8* %12, i64 %17
ret i8* %18
}

LLVM IR (-O2):
define i8* @ptr_align(i8* %0, i64 %1) {
%3 = getelementptr i8, i8* %0, i64 %1
%4 = getelementptr i8, i8* %3, i64 -1
%5 = ptrtoint i8* %4 to i64
%6 = urem i64 %5, %1
%7 = sub i64 0, %6
%8 = getelementptr i8, i8* %4, i64 %7
ret i8* %8
}
/* Variables and functions */
int close(int);
int errno;
int __sulong_posix_close(int fd) {
  {
    int native_errno = errno;
    int result = close(fd);
    if (result == (int)-1) {
      result = (int)(long)-errno;
    }
    errno = native_errno;
    return result;
  }
}


x86 assembly (clang, -O0):
<__sulong_posix_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    114c <__sulong_posix_close+0x3c>
xor    %eax,%eax
mov    0x2e9b(%rip),%rcx
sub    (%rcx),%eax
cltq
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    0x2e8a(%rip),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sulong_posix_close>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <close@plt>
xor    %ecx,%ecx
sub    (%rbx),%ecx
cmp    $0xffffffff,%eax
cmove  %ecx,%eax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @__sulong_posix_close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* @errno
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %15
10: ; preds = %1
%11 = load i32, i32* @errno
%12 = sub nsw i32 0, %11
%13 = sext i32 %12 to i64
%14 = trunc i64 %13 to i32
store i32 %14, i32* %4
br label %15
15: ; preds = %10, %1
%16 = load i32, i32* %3
store i32 %16, i32* @errno
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @__sulong_posix_close(i32 %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @close(i32 %0)
%4 = icmp eq i32 %3, -1
%5 = load i32, i32* @errno
%6 = sub nsw i32 0, %5
%7 = select i1 %4, i32 %6, i32 %3
store i32 %2, i32* @errno
ret i32 %7
}
unsigned long long int gcd(int a, int b) {
  if (b == 0)
    return a;
  else
    return (gcd(b, a % b));
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1135 <gcd+0x25>
movslq -0xc(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114a <gcd+0x3a>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111f <gcd+0x1f>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
movslq %ecx,%rax
ret
mov    %eax,%ecx
movslq %ecx,%rax
ret

LLVM IR (-O0):
define i64 @gcd(i32 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
store i64 %10, i64* %3
br label %17
11: ; preds = %2
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = srem i32 %13, %14
%16 = call i64 @gcd(i32 %12, i32 %15)
store i64 %16, i64* %3
br label %17
17: ; preds = %11, %8
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %7
4: ; preds = %7, %2
%5 = phi i32 [ %0, %2 ], [ %8, %7 ]
%6 = sext i32 %5 to i64
ret i64 %6
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %1, %2 ]
%9 = phi i32 [ %8, %7 ], [ %0, %2 ]
%10 = srem i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %4, label %7
}
/* Variables and functions */
scalar_t__ strstr(char const *, char *);
int str_index_of(const char *a, char *b) {
  char *offset = (char *)strstr(a, b);
  return offset - a;
}


x86 assembly (clang, -O0):
<str_index_of>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_index_of>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strstr@plt>
sub    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @str_index_of(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i64 @strstr(i8* %6, i8* %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = ptrtoint i8* %10 to i64
%13 = ptrtoint i8* %11 to i64
%14 = sub i64 %12, %13
%15 = trunc i64 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @str_index_of(i8* %0, i8* %1) {
%3 = tail call i64 @strstr(i8* %0, i8* %1)
%4 = ptrtoint i8* %0 to i64
%5 = sub i64 %3, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}
void WriteRelays(struct scdTraffic *traffic, struct gpiTrans *gpiTrans,
                 int size) {}


x86 assembly (clang, -O0):
<WriteRelays>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteRelays>:
ret

LLVM IR (-O0):
%struct.scdTraffic = type opaque
%struct.gpiTrans = type opaque
define void @WriteRelays(%struct.scdTraffic* %0, %struct.gpiTrans* %1, i32 %2) {
%4 = alloca %struct.scdTraffic*
%5 = alloca %struct.gpiTrans*
%6 = alloca i32
store %struct.scdTraffic* %0, %struct.scdTraffic** %4
store %struct.gpiTrans* %1, %struct.gpiTrans** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.scdTraffic = type opaque
%struct.gpiTrans = type opaque
define void @WriteRelays(%struct.scdTraffic* nocapture %0, %struct.gpiTrans* nocapture %1, i32 %2) {
ret void
}
unsigned int getConfigSoftwareRevision(void) { return 1; }


x86 assembly (clang, -O0):
<getConfigSoftwareRevision>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getConfigSoftwareRevision>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @getConfigSoftwareRevision() {
ret i32 1
}

LLVM IR (-O2):
define i32 @getConfigSoftwareRevision() {
ret i32 1
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
uint32_t rotateR_fun_uint32_t(uint32_t x, int32_t i) {
  if ((i %= 32) == 0)
    return x;
  return (x << (32 - i)) | (x >> i);
}


x86 assembly (clang, -O0):
<rotateR_fun_uint32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
cmp    $0x0,%edx
jne    112c <rotateR_fun_uint32_t+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1148 <rotateR_fun_uint32_t+0x48>
mov    -0x8(%rbp),%eax
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotateR_fun_uint32_t>:
lea    0x1f(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
and    $0xffffffe0,%eax
sub    %eax,%esi
mov    %esi,%ecx
neg    %cl
mov    %edi,%edx
shl    %cl,%edx
mov    %edi,%eax
mov    %esi,%ecx
sar    %cl,%eax
or     %edx,%eax
test   %esi,%esi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotateR_fun_uint32_t(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = srem i32 %6, 32
store i32 %7, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %20
11: ; preds = %2
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sub nsw i32 32, %13
%15 = shl i32 %12, %14
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = ashr i32 %16, %17
%19 = or i32 %15, %18
store i32 %19, i32* %3
br label %20
20: ; preds = %11, %9
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @rotateR_fun_uint32_t(i32 %0, i32 %1) {
%3 = srem i32 %1, 32
%4 = icmp eq i32 %3, 0
%5 = sub nsw i32 32, %3
%6 = shl i32 %0, %5
%7 = ashr i32 %0, %3
%8 = or i32 %6, %7
%9 = select i1 %4, i32 %0, i32 %8
ret i32 %9
}
/* Type definitions */
struct cec_msg {
  int len;
  int *msg;
};
typedef int __u8;

/* Variables and functions */
void cec_ops_vendor_remote_button_down(const struct cec_msg *msg, __u8 *size,
                                       const __u8 **rc_code) {
  *size = msg->len - 2;
  if (*size > 14)
    *size = 14;
  *rc_code = msg->msg + 2;
}


x86 assembly (clang, -O0):
<cec_ops_vendor_remote_button_down>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x2,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
cmpl   $0xe,(%rax)
jle    1136 <cec_ops_vendor_remote_button_down+0x36>
mov    -0x10(%rbp),%rax
movl   $0xe,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
add    $0x8,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cec_ops_vendor_remote_button_down>:
mov    (%rdi),%eax
lea    -0x2(%rax),%ecx
cmp    $0x11,%eax
mov    $0xe,%eax
cmovl  %ecx,%eax
mov    %eax,(%rsi)
mov    0x8(%rdi),%rax
add    $0x8,%rax
mov    %rax,(%rdx)
ret

LLVM IR (-O0):
%struct.cec_msg = type { i32, i32* }
define void @cec_ops_vendor_remote_button_down(%struct.cec_msg* %0, i32* %1, i32** %2) {
%4 = alloca %struct.cec_msg*
%5 = alloca i32*
%6 = alloca i32**
store %struct.cec_msg* %0, %struct.cec_msg** %4
store i32* %1, i32** %5
store i32** %2, i32*** %6
%7 = load %struct.cec_msg*, %struct.cec_msg** %4
%8 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %7, i32 0, i32 0
%9 = load i32, i32* %8
%10 = sub nsw i32 %9, 2
%11 = load i32*, i32** %5
store i32 %10, i32* %11
%12 = load i32*, i32** %5
%13 = load i32, i32* %12
%14 = icmp sgt i32 %13, 14
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32*, i32** %5
store i32 14, i32* %16
br label %17
17: ; preds = %15, %3
%18 = load %struct.cec_msg*, %struct.cec_msg** %4
%19 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %18, i32 0, i32 1
%20 = load i32*, i32** %19
%21 = getelementptr inbounds i32, i32* %20, i64 2
%22 = load i32**, i32*** %6
store i32* %21, i32** %22
ret void
}

LLVM IR (-O2):
%struct.cec_msg = type { i32, i32* }
define void @cec_ops_vendor_remote_button_down(%struct.cec_msg* nocapture %0, i32* nocapture writeonly %1, i32** nocapture writeonly %2) {
%4 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = add nsw i32 %5, -2
%7 = icmp sgt i32 %5, 16
%8 = select i1 %7, i32 14, i32 %6
store i32 %8, i32* %1
%9 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %0, i64 0, i32 1
%10 = load i32*, i32** %9
%11 = getelementptr inbounds i32, i32* %10, i64 2
store i32* %11, i32** %2
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void a52_set_crc(uint8_t *p_a52, uint16_t i_crc) {
  p_a52[2] = i_crc >> 8;
  p_a52[3] = i_crc & 0xff;
}


x86 assembly (clang, -O0):
<a52_set_crc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a52_set_crc>:
movzbl %sil,%eax
sar    $0x8,%esi
mov    %esi,0x8(%rdi)
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @a52_set_crc(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = and i32 %9, 255
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 3
store i32 %10, i32* %12
ret void
}

LLVM IR (-O2):
define void @a52_set_crc(i32* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 8
%4 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %3, i32* %4
%5 = and i32 %1, 255
%6 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %5, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void printValue(int *pointer, int size) {
  for (int i = 0; i < size; i++) {
    printf("p[%d] = %d\n", i, *(pointer + i));
  }
}


x86 assembly (clang, -O0):
<printValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <printValue+0x4a>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printValue+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printValue>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <printValue+0x37>
mov    %rdi,%r14
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <printValue+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"p[%d] = %d\0A\00"
define void @printValue(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %16)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"p[%d] = %d\0A\00"
define void @printValue(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %13, %7 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = trunc i64 %8 to i32
%12 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %10)
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %7
}
/* Variables and functions */
int is_digit(char *);
size_t strlen(char *);
char toupper(char);
int is_namber(char *str) {
  size_t len = strlen(str);
  if (len > 5)
    return 0;
  else if (toupper(str[len - 1]) == 'H') {
    return 1;
  } else
    return 0;
  return is_digit(str);
}


x86 assembly (clang, -O0):
<is_namber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x5,-0x18(%rbp)
jbe    1150 <is_namber+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1184 <is_namber+0x64>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <toupper@plt>
movsbl %al,%eax
cmp    $0x48,%eax
jne    117d <is_namber+0x5d>
movl   $0x1,-0x4(%rbp)
jmp    1184 <is_namber+0x64>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_namber>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x5,%rcx
ja     1148 <is_namber+0x28>
movsbl -0x1(%rcx,%rbx,1),%edi
call   1030 <toupper@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x48,%cl
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_namber(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %4
%7 = load i64, i64* %4
%8 = icmp ugt i64 %7, 5
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %21
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = load i64, i64* %4
%13 = sub i64 %12, 1
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call signext i8 @toupper(i8 signext %15)
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 72
br i1 %18, label %19, label %20
19: ; preds = %10
store i32 1, i32* %2
br label %21
20: ; preds = %10
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19, %9
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_namber(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = icmp ugt i64 %2, 5
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = add nsw i64 %2, -1
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = tail call signext i8 @toupper(i8 signext %7)
%9 = icmp eq i8 %8, 72
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %12
}
float normalize_heading_float(float n) {
  while (n <= -180.0)
    n += 360.0;
  while (n > 180.0)
    n -= 360.0;
  return n;
}


x86 assembly (clang, -O0):
<normalize_heading_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
ucomisd %xmm1,%xmm0
jb     1147 <normalize_heading_float+0x47>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xedb(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1109 <normalize_heading_float+0x9>
jmp    114c <normalize_heading_float+0x4c>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeab(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    118a <normalize_heading_float+0x8a>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xe98(%rip),%xmm1
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    114c <normalize_heading_float+0x4c>
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalize_heading_float>:
movss  0xef8(%rip),%xmm1
ucomiss %xmm0,%xmm1
jb     1129 <normalize_heading_float+0x29>
movss  0xeef(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
nop
addss  %xmm2,%xmm0
ucomiss %xmm0,%xmm1
jae    1120 <normalize_heading_float+0x20>
ucomiss 0xed8(%rip),%xmm0
jbe    1159 <normalize_heading_float+0x59>
movss  0xed2(%rip),%xmm1
movss  0xec6(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
addss  %xmm1,%xmm0
ucomiss %xmm2,%xmm0
ja     1150 <normalize_heading_float+0x50>
ret

LLVM IR (-O0):
define float @normalize_heading_float(float %0) {
%2 = alloca float
store float %0, float* %2
br label %3
3: ; preds = %7, %1
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fcmp ole double %5, -1.800000e+02
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = load float, float* %2
%9 = fpext float %8 to double
%10 = fadd double %9, 3.600000e+02
%11 = fptrunc double %10 to float
store float %11, float* %2
br label %3
12: ; preds = %3
br label %13
13: ; preds = %17, %12
%14 = load float, float* %2
%15 = fpext float %14 to double
%16 = fcmp ogt double %15, 1.800000e+02
br i1 %16, label %17, label %22
17: ; preds = %13
%18 = load float, float* %2
%19 = fpext float %18 to double
%20 = fsub double %19, 3.600000e+02
%21 = fptrunc double %20 to float
store float %21, float* %2
br label %13
22: ; preds = %13
%23 = load float, float* %2
ret float %23
}

LLVM IR (-O2):
define float @normalize_heading_float(float %0) {
%2 = fcmp ugt float %0, -1.800000e+02
br i1 %2, label %3, label %6
3: ; preds = %6, %1
%4 = phi float [ %0, %1 ], [ %8, %6 ]
%5 = fcmp ogt float %4, 1.800000e+02
br i1 %5, label %10, label %14
6: ; preds = %1, %6
%7 = phi float [ %8, %6 ], [ %0, %1 ]
%8 = fadd float %7, 3.600000e+02
%9 = fcmp ugt float %8, -1.800000e+02
br i1 %9, label %3, label %6
10: ; preds = %3, %10
%11 = phi float [ %12, %10 ], [ %4, %3 ]
%12 = fadd float %11, -3.600000e+02
%13 = fcmp ogt float %12, 1.800000e+02
br i1 %13, label %10, label %14
14: ; preds = %10, %3
%15 = phi float [ %4, %3 ], [ %12, %10 ]
ret float %15
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void USBModeConfig(uint32_t ui32Base, uint32_t ui32Mode) {
  ASSERT(ui32Base == 0x40050000);
  (*((volatile uint32_t *)(ui32Base + 0x0000041C))) = ui32Mode;
}


x86 assembly (clang, -O0):
<USBModeConfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x40050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x41c,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBModeConfig>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x40050000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x41c(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @USBModeConfig(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1074069504
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1052
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %9, i32* %13
ret void
}

LLVM IR (-O2):
define void @USBModeConfig(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1074069504
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = add nsw i32 %0, 1052
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %1, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void vt100_erase_down(void) {
  printf("\x1b[J");
  fflush(stdout);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\1B[J\00"
@stdout = global i32 0
define void @vt100_erase_down() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\1B[J\00"
@stdout = global i32 0
define void @vt100_erase_down() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
int execve(const char *filename, char *const argv[], char *const envp[]) {
  UNSUPPORTED(__FUNCTION__);
  return -1;
}


x86 assembly (clang, -O0):
<execve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <UNSUPPORTED@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execve>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %eax,%eax
call   1030 <UNSUPPORTED@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__FUNCTION__.execve = [7 x i8] c"execve\00"
define i32 @execve(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @UNSUPPORTED to i32 (i8*, ...)*)(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.execve, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@__FUNCTION__.execve = [7 x i8] c"execve\00"
define i32 @execve(i8* nocapture readnone %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @UNSUPPORTED to i32 (i8*, ...)*)(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.execve, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int getpid();
int sw_getAppID() {
  int pid = getpid();
  return pid;
}


x86 assembly (clang, -O0):
<sw_getAppID>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sw_getAppID>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i32 @sw_getAppID() {
%1 = alloca i32
%2 = call i32 (...) @getpid()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @sw_getAppID() {
%1 = tail call i32 (...) @getpid()
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct sha256 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sha256_update(struct sha256 *, void const *,
                                 int /*<<< orphan*/);
int SHA256_Update(struct sha256 *s, const void *m, uint32_t len) {
  sha256_update(s, m, len);
  return 1;
}


x86 assembly (clang, -O0):
<SHA256_Update>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <sha256_update@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA256_Update>:
push   %rax
call   1030 <sha256_update@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sha256 = type { i32 }
define i32 @SHA256_Update(%struct.sha256* %0, i8* %1, i32 %2) {
%4 = alloca %struct.sha256*
%5 = alloca i8*
%6 = alloca i32
store %struct.sha256* %0, %struct.sha256** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.sha256*, %struct.sha256** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @sha256_update(%struct.sha256* %7, i8* %8, i32 %9)
ret i32 1
}

LLVM IR (-O2):
%struct.sha256 = type { i32 }
define i32 @SHA256_Update(%struct.sha256* %0, i8* %1, i32 %2) {
%4 = tail call i32 @sha256_update(%struct.sha256* %0, i8* %1, i32 %2)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ gethostid();
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main(void) {
  printf("hostid=%ld\n", gethostid());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <gethostid@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <gethostid@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hostid=%ld\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @gethostid()
%3 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"hostid=%ld\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @gethostid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ example3();
int main() {
  example3();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <example3@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <example3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @example3()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @example3()
ret i32 0
}
int rotate_left(unsigned int num, unsigned int count) {
  count = count % 32;
  return (num << count) | (num >> (32 - count));
}


x86 assembly (clang, -O0):
<rotate_left>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate_left>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rotate_left(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = urem i32 %5, 32
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = shl i32 %7, %8
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = sub i32 32, %11
%13 = lshr i32 %10, %12
%14 = or i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @rotate_left(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 %1)
ret i32 %3
}
int security_unix_stream_connect(struct socket *sock, struct socket *other,
                                 struct sock *newsk) {
  return 0;
}


x86 assembly (clang, -O0):
<security_unix_stream_connect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_unix_stream_connect>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.socket = type opaque
%struct.sock = type opaque
define i32 @security_unix_stream_connect(%struct.socket* %0, %struct.socket* %1, %struct.sock* %2) {
%4 = alloca %struct.socket*
%5 = alloca %struct.socket*
%6 = alloca %struct.sock*
store %struct.socket* %0, %struct.socket** %4
store %struct.socket* %1, %struct.socket** %5
store %struct.sock* %2, %struct.sock** %6
ret i32 0
}

LLVM IR (-O2):
%struct.socket = type opaque
%struct.sock = type opaque
define i32 @security_unix_stream_connect(%struct.socket* nocapture readnone %0, %struct.socket* nocapture readnone %1, %struct.sock* nocapture readnone %2) {
ret i32 0
}
int scsi_status_is_good(int status) {
  status &= 0xfe;
  return ((status == 0x00) || (status == 0x10) || (status == 0x14) ||
          (status == 0x22));
}


x86 assembly (clang, -O0):
<scsi_status_is_good>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfe,%eax
mov    %eax,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1149 <scsi_status_is_good+0x49>
mov    $0x1,%al
cmpl   $0x10,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1149 <scsi_status_is_good+0x49>
mov    $0x1,%al
cmpl   $0x14,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1149 <scsi_status_is_good+0x49>
cmpl   $0x22,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scsi_status_is_good>:
mov    %edi,%eax
and    $0xfe,%eax
test   $0xee,%dil
sete   %cl
cmp    $0x14,%eax
sete   %dl
or     %cl,%dl
cmp    $0x22,%eax
sete   %al
or     %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @scsi_status_is_good(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 254
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 0
br i1 %6, label %16, label %7
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 16
br i1 %9, label %16, label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, 20
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp eq i32 %14, 34
br label %16
16: ; preds = %13, %10, %7, %1
%17 = phi i1 [ true, %10 ], [ true, %7 ], [ true, %1 ], [ %15, %13 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @scsi_status_is_good(i32 %0) {
%2 = and i32 %0, 254
%3 = and i32 %0, 238
%4 = icmp eq i32 %3, 0
%5 = icmp eq i32 %2, 20
%6 = or i1 %4, %5
%7 = icmp eq i32 %2, 34
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
double randomReal(double low, double high) {
  double d;
  d = (double)rand() / ((double)RAND_MAX + 1);
  return (low + d * (high - low));
}


x86 assembly (clang, -O0):
<randomReal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eb3(%rip),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xebe(%rip),%xmm2
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
subsd  -0x8(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomReal>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm2
mov    0x2eb5(%rip),%rax
xorps  %xmm1,%xmm1
cvtsi2sdq (%rax),%xmm1
addsd  0xebd(%rip),%xmm1
divsd  %xmm1,%xmm2
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
subsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @randomReal(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = call i64 (...) @rand()
%7 = sitofp i64 %6 to double
%8 = load i64, i64* @RAND_MAX
%9 = sitofp i64 %8 to double
%10 = fadd double %9, 1.000000e+00
%11 = fdiv double %7, %10
store double %11, double* %5
%12 = load double, double* %3
%13 = load double, double* %5
%14 = load double, double* %4
%15 = load double, double* %3
%16 = fsub double %14, %15
%17 = call double @llvm.fmuladd.f64(double %13, double %16, double %12)
ret double %17
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @randomReal(double %0, double %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to double
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fadd double %6, 1.000000e+00
%8 = fdiv double %4, %7
%9 = fsub double %1, %0
%10 = tail call double @llvm.fmuladd.f64(double %8, double %9, double %0)
ret double %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_creds_get_audit_login_uid(void *c, uid_t *uid) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_creds_get_audit_login_uid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_creds_get_audit_login_uid>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_creds_get_audit_login_uid(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_creds_get_audit_login_uid(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}