xunge/DecIR huggingface dataset:
unsigned int f57(unsigned int x, int y) {
  return (x << (8 * sizeof(unsigned int) - y)) ^ (x >> y);
}


x86 assembly (clang, -O0):
<f57>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
movslq -0x8(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f57>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f57(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = sub i64 32, %7
%9 = trunc i64 %8 to i32
%10 = shl i32 %5, %9
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = lshr i32 %11, %12
%14 = xor i32 %10, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f57(i32 %0, i32 %1) {
%3 = sub i32 32, %1
%4 = shl i32 %0, %3
%5 = lshr i32 %0, %1
%6 = xor i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int strcmp(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
int verify_password(char *password) {
  int authenticated;
  int xxx;
  char buffer[8];
  authenticated = strcmp(password, "1234567");
  strcpy(buffer, password);
  return authenticated;
}


x86 assembly (clang, -O0):
<verify_password>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <strcmp@plt>
mov    %eax,-0xc(%rbp)
lea    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verify_password>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xed3(%rip),%rsi
call   1040 <strcmp@plt>
mov    %eax,%ebp
mov    %rsp,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"1234567\00"
define i32 @verify_password(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca [8 x i8]
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @strcmp(i8* %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
store i32 %7, i32* %3
%8 = getelementptr inbounds [8 x i8], [8 x i8]* %5, i64 0, i64 0
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@.str = [8 x i8] c"1234567\00"
define i32 @verify_password(i8* %0) {
%2 = alloca [8 x i8]
%3 = getelementptr inbounds [8 x i8], [8 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(8) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @strcpy(i8* %3, i8* %0)
ret i32 %4
}
int glmMinIndex3d(double a, double b, double c, int i1, int i2, int i3) {
  if (a < b) {
    if (a < c)
      return i1;
    else
      return i3;
  } else {
    if (b < c)
      return i2;
    else
      return i3;
  }
}


x86 assembly (clang, -O0):
<glmMinIndex3d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
mov    %edi,-0x24(%rbp)
mov    %esi,-0x28(%rbp)
mov    %edx,-0x2c(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    115a <glmMinIndex3d+0x5a>
movsd  -0x10(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    114f <glmMinIndex3d+0x4f>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <glmMinIndex3d+0x7f>
mov    -0x2c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <glmMinIndex3d+0x7f>
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1179 <glmMinIndex3d+0x79>
mov    -0x28(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <glmMinIndex3d+0x7f>
mov    -0x2c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmMinIndex3d>:
ucomisd %xmm0,%xmm2
cmovbe %edx,%edi
ucomisd %xmm1,%xmm2
mov    %esi,%eax
cmovbe %edx,%eax
ucomisd %xmm0,%xmm1
cmova  %edi,%eax
ret

LLVM IR (-O0):
define i32 @glmMinIndex3d(double %0, double %1, double %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store double %0, double* %8
store double %1, double* %9
store double %2, double* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
%14 = load double, double* %8
%15 = load double, double* %9
%16 = fcmp olt double %14, %15
br i1 %16, label %17, label %25
17: ; preds = %6
%18 = load double, double* %8
%19 = load double, double* %10
%20 = fcmp olt double %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = load i32, i32* %11
store i32 %22, i32* %7
br label %33
23: ; preds = %17
%24 = load i32, i32* %13
store i32 %24, i32* %7
br label %33
25: ; preds = %6
%26 = load double, double* %9
%27 = load double, double* %10
%28 = fcmp olt double %26, %27
br i1 %28, label %29, label %31
29: ; preds = %25
%30 = load i32, i32* %12
store i32 %30, i32* %7
br label %33
31: ; preds = %25
%32 = load i32, i32* %13
store i32 %32, i32* %7
br label %33
33: ; preds = %31, %29, %23, %21
%34 = load i32, i32* %7
ret i32 %34
}

LLVM IR (-O2):
define i32 @glmMinIndex3d(double %0, double %1, double %2, i32 %3, i32 %4, i32 %5) {
%7 = fcmp olt double %0, %1
%8 = fcmp olt double %0, %2
%9 = select i1 %8, i32 %3, i32 %5
%10 = fcmp olt double %1, %2
%11 = select i1 %10, i32 %4, i32 %5
%12 = select i1 %7, i32 %9, i32 %11
ret i32 %12
}
void halt() {
loop:
  __asm__ __volatile__("hlt");
  goto loop;
}


x86 assembly (clang, -O0):
<halt>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <halt+0x9>
hlt
jmp    1109 <halt+0x9>

x86 assembly (clang, -O2):
<halt>:
hlt
jmp    1100 <halt>

LLVM IR (-O0):
define void @halt() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @halt() {
br label %1
1: ; preds = %1, %0
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
unsigned ZSTD_maxCLevel(void) { return 20; }


x86 assembly (clang, -O0):
<ZSTD_maxCLevel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_maxCLevel>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @ZSTD_maxCLevel() {
ret i32 20
}

LLVM IR (-O2):
define i32 @ZSTD_maxCLevel() {
ret i32 20
}
/* Variables and functions */
int /*<<< orphan*/ inmidi_pitchbend(int, int, int);
int libpd_pitchbend(int channel, int value) {
  if (channel < 0)
    return -1;
  if (value < -8192 || value > 8191)
    return -1;
  inmidi_pitchbend((channel >> 4), (channel & 0x0f), value + 8192);
  return 0;
}


x86 assembly (clang, -O0):
<libpd_pitchbend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1134 <libpd_pitchbend+0x24>
movl   $0xffffffff,-0x4(%rbp)
jmp    117b <libpd_pitchbend+0x6b>
cmpl   $0xffffe000,-0xc(%rbp)
jl     114e <libpd_pitchbend+0x3e>
cmpl   $0x1fff,-0xc(%rbp)
jle    115a <libpd_pitchbend+0x4a>
movl   $0xffffffff,-0x4(%rbp)
jmp    117b <libpd_pitchbend+0x6b>
mov    -0x8(%rbp),%edi
sar    $0x4,%edi
mov    -0x8(%rbp),%esi
and    $0xf,%esi
mov    -0xc(%rbp),%edx
add    $0x2000,%edx
call   1030 <inmidi_pitchbend@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libpd_pitchbend>:
mov    $0xffffffff,%eax
test   %edi,%edi
js     1143 <libpd_pitchbend+0x33>
mov    %esi,%edx
lea    -0x2000(%rdx),%ecx
cmp    $0xffffc000,%ecx
jb     1143 <libpd_pitchbend+0x33>
push   %rax
mov    %edi,%esi
shr    $0x4,%edi
and    $0xf,%esi
add    $0x2000,%edx
call   1030 <inmidi_pitchbend@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @libpd_pitchbend(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 -1, i32* %3
br label %24
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp slt i32 %10, -8192
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, i32* %5
%14 = icmp sgt i32 %13, 8191
br i1 %14, label %15, label %16
15: ; preds = %12, %9
store i32 -1, i32* %3
br label %24
16: ; preds = %12
%17 = load i32, i32* %4
%18 = ashr i32 %17, 4
%19 = load i32, i32* %4
%20 = and i32 %19, 15
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 8192
%23 = call i32 @inmidi_pitchbend(i32 %18, i32 %20, i32 %22)
store i32 0, i32* %3
br label %24
24: ; preds = %16, %15, %8
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @libpd_pitchbend(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = add i32 %1, -8192
%5 = icmp ult i32 %4, -16384
%6 = or i1 %3, %5
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = lshr i32 %0, 4
%9 = and i32 %0, 15
%10 = add nsw i32 %1, 8192
%11 = tail call i32 @inmidi_pitchbend(i32 %8, i32 %9, i32 %10)
br label %12
12: ; preds = %2, %7
%13 = phi i32 [ 0, %7 ], [ -1, %2 ]
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
struct _info {
  int dummy;
};

/* Variables and functions */
int scan_infos(struct _info const *, int /*<<< orphan*/, int);
int noautoadd(const struct _info *lst, uid_t id) {
  return scan_infos(lst, id, 0x0020);
}


x86 assembly (clang, -O0):
<noautoadd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x20,%edx
call   1030 <scan_infos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<noautoadd>:
mov    $0x20,%edx
jmp    1030 <scan_infos@plt>

LLVM IR (-O0):
%struct._info = type { i32 }
define i32 @noautoadd(%struct._info* %0, i32 %1) {
%3 = alloca %struct._info*
%4 = alloca i32
store %struct._info* %0, %struct._info** %3
store i32 %1, i32* %4
%5 = load %struct._info*, %struct._info** %3
%6 = load i32, i32* %4
%7 = call i32 @scan_infos(%struct._info* %5, i32 %6, i32 32)
ret i32 %7
}

LLVM IR (-O2):
%struct._info = type { i32 }
define i32 @noautoadd(%struct._info* %0, i32 %1) {
%3 = tail call i32 @scan_infos(%struct._info* %0, i32 %1, i32 32)
ret i32 %3
}
void RandomFunc(unsigned short input[1], unsigned short output[1]) {
  unsigned short state[1];
  unsigned short local1;
  {
    state[0UL] = (input[0UL] & 914778474UL) << (unsigned short)7;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[0UL] &= state[local1];
      state[local1] ^= state[0UL];
      local1++;
    }
    output[0UL] = state[0UL] ^ (unsigned short)47985;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
and    $0x3686696a,%rax
shl    $0x7,%rax
mov    %ax,-0x12(%rbp)
movw   $0x0,-0x14(%rbp)
movzwl -0x14(%rbp),%eax
cmp    $0x1,%rax
jae    116d <RandomFunc+0x6d>
movzwl -0x14(%rbp),%eax
movzwl -0x12(%rbp,%rax,2),%ecx
movzwl -0x12(%rbp),%eax
and    %ecx,%eax
mov    %ax,-0x12(%rbp)
movzwl -0x12(%rbp),%edx
movzwl -0x14(%rbp),%eax
movzwl -0x12(%rbp,%rax,2),%ecx
xor    %edx,%ecx
mov    %cx,-0x12(%rbp,%rax,2)
mov    -0x14(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x14(%rbp)
jmp    1127 <RandomFunc+0x27>
movzwl -0x12(%rbp),%eax
xor    $0xbb71,%eax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movw   $0xbb71,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca [1 x i16]
%6 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i64 0
%9 = load i16, i16* %8
%10 = zext i16 %9 to i64
%11 = and i64 %10, 914778474
%12 = shl i64 %11, 7
%13 = trunc i64 %12 to i16
%14 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
store i16 %13, i16* %14
store i16 0, i16* %6
br label %15
15: ; preds = %19, %2
%16 = load i16, i16* %6
%17 = zext i16 %16 to i64
%18 = icmp ult i64 %17, 1
br i1 %18, label %19, label %42
19: ; preds = %15
%20 = load i16, i16* %6
%21 = zext i16 %20 to i64
%22 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 %21
%23 = load i16, i16* %22
%24 = zext i16 %23 to i32
%25 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%26 = load i16, i16* %25
%27 = zext i16 %26 to i32
%28 = and i32 %27, %24
%29 = trunc i32 %28 to i16
store i16 %29, i16* %25
%30 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%31 = load i16, i16* %30
%32 = zext i16 %31 to i32
%33 = load i16, i16* %6
%34 = zext i16 %33 to i64
%35 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 %34
%36 = load i16, i16* %35
%37 = zext i16 %36 to i32
%38 = xor i32 %37, %32
%39 = trunc i32 %38 to i16
store i16 %39, i16* %35
%40 = load i16, i16* %6
%41 = add i16 %40, 1
store i16 %41, i16* %6
br label %15
42: ; preds = %15
%43 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%44 = load i16, i16* %43
%45 = zext i16 %44 to i32
%46 = xor i32 %45, 47985
%47 = trunc i32 %46 to i16
%48 = load i16*, i16** %4
%49 = getelementptr inbounds i16, i16* %48, i64 0
store i16 %47, i16* %49
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i16* nocapture %0, i16* nocapture writeonly %1) {
store i16 -17551, i16* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SendInterrupt(int, int, int, int);
void ScuSendDrawEnd(void) { SendInterrupt(0x4D, 0x2, 0x2000, 0x00002000); }


x86 assembly (clang, -O0):
<ScuSendDrawEnd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4d,%edi
mov    $0x2,%esi
mov    $0x2000,%ecx
mov    %ecx,%edx
call   1030 <SendInterrupt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScuSendDrawEnd>:
mov    $0x4d,%edi
mov    $0x2,%esi
mov    $0x2000,%edx
mov    $0x2000,%ecx
jmp    1030 <SendInterrupt@plt>

LLVM IR (-O0):
define void @ScuSendDrawEnd() {
%1 = call i32 @SendInterrupt(i32 77, i32 2, i32 8192, i32 8192)
ret void
}

LLVM IR (-O2):
define void @ScuSendDrawEnd() {
%1 = tail call i32 @SendInterrupt(i32 77, i32 2, i32 8192, i32 8192)
ret void
}
int not_annotated_inc_h_2(int i) { return ++i; }


x86 assembly (clang, -O0):
<not_annotated_inc_h_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<not_annotated_inc_h_2>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @not_annotated_inc_h_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @not_annotated_inc_h_2(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
void freeDigit(int *value) {}


x86 assembly (clang, -O0):
<freeDigit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeDigit>:
ret

LLVM IR (-O0):
define void @freeDigit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @freeDigit(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int CRYPTO_mem_debug_pop(void) { return 0; }


x86 assembly (clang, -O0):
<CRYPTO_mem_debug_pop>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_mem_debug_pop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @CRYPTO_mem_debug_pop() {
ret i32 0
}

LLVM IR (-O2):
define i32 @CRYPTO_mem_debug_pop() {
ret i32 0
}
void triggerGenDelete(struct LSD_SceneNodeInst const *inst, void *instData) {}


x86 assembly (clang, -O0):
<triggerGenDelete>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<triggerGenDelete>:
ret

LLVM IR (-O0):
%struct.LSD_SceneNodeInst = type opaque
define void @triggerGenDelete(%struct.LSD_SceneNodeInst* %0, i8* %1) {
%3 = alloca %struct.LSD_SceneNodeInst*
%4 = alloca i8*
store %struct.LSD_SceneNodeInst* %0, %struct.LSD_SceneNodeInst** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.LSD_SceneNodeInst = type opaque
define void @triggerGenDelete(%struct.LSD_SceneNodeInst* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
char *hdate_string(int, int const, int const, int /*<<< orphan*/);
char *hdate_get_hebrew_month_string(int const month, int const short_form) {
  return hdate_string(3, month, short_form, 0);
}


x86 assembly (clang, -O0):
<hdate_get_hebrew_month_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x3,%edi
xor    %ecx,%ecx
call   1030 <hdate_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdate_get_hebrew_month_string>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x3,%edi
xor    %ecx,%ecx
jmp    1030 <hdate_string@plt>

LLVM IR (-O0):
define i8* @hdate_get_hebrew_month_string(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i8* @hdate_string(i32 3, i32 %5, i32 %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @hdate_get_hebrew_month_string(i32 %0, i32 %1) {
%3 = tail call i8* @hdate_string(i32 3, i32 %0, i32 %1, i32 0)
ret i8* %3
}
/* Type definitions */
struct DSHashMap {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ds_hashmap_put_int(struct DSHashMap *, int /*<<< orphan*/,
                                      void *);
void ds_puti(struct DSHashMap *hash, int32_t key, void *data) {
  ds_hashmap_put_int(hash, key, data);
}


x86 assembly (clang, -O0):
<ds_puti>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <ds_hashmap_put_int@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds_puti>:
jmp    1030 <ds_hashmap_put_int@plt>

LLVM IR (-O0):
%struct.DSHashMap = type { i32 }
define void @ds_puti(%struct.DSHashMap* %0, i32 %1, i8* %2) {
%4 = alloca %struct.DSHashMap*
%5 = alloca i32
%6 = alloca i8*
store %struct.DSHashMap* %0, %struct.DSHashMap** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.DSHashMap*, %struct.DSHashMap** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @ds_hashmap_put_int(%struct.DSHashMap* %7, i32 %8, i8* %9)
ret void
}

LLVM IR (-O2):
%struct.DSHashMap = type { i32 }
define void @ds_puti(%struct.DSHashMap* %0, i32 %1, i8* %2) {
%4 = tail call i32 @ds_hashmap_put_int(%struct.DSHashMap* %0, i32 %1, i8* %2)
ret void
}
const char *db_create_users_table_sql(void) {
  static const char *query =
      "CREATE TABLE users ("
      "    id         INTEGER     NOT NULL AUTO_INCREMENT,"
      "    user_name  VARCHAR(30) NOT NULL UNIQUE,"
      "    first_name VARCHAR(30) NOT NULL,"
      "    last_name  VARCHAR(30) NOT NULL,"
      "    password   VARCHAR(30)          DEFAULT NULL,"
      "    enabled    BOOLEAN              DEFAULT FALSE,"
      "    created    TIMESTAMP   NOT NULL DEFAULT CURRENT_TIMESTAMP,"
      "  CONSTRAINT users_pk"
      "    PRIMARY KEY (id)"
      ");";
  return query;
}


x86 assembly (clang, -O0):
<db_create_users_table_sql>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_create_users_table_sql>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@db_create_users_table_sql.query = internal global i8* getelementptr inbounds ([391 x i8], [391 x i8]* @.str, i32 0, i32 0)
@.str = [391 x i8] c"CREATE TABLE users ( id INTEGER NOT NULL AUTO_INCREMENT, user_name VARCHAR(30) NOT NULL UNIQUE, first_name VARCHAR(30) NOT NULL, last_name VARCHAR(30) NOT NULL, password VARCHAR(30) DEFAULT NULL, enabled BOOLEAN DEFAULT FALSE, created TIMESTAMP NOT NULL DEFAULT CURRENT_TIMESTAMP, CONSTRAINT users_pk PRIMARY KEY (id));\00"
define i8* @db_create_users_table_sql() {
%1 = load i8*, i8** @db_create_users_table_sql.query
ret i8* %1
}

LLVM IR (-O2):
@.str = [391 x i8] c"CREATE TABLE users ( id INTEGER NOT NULL AUTO_INCREMENT, user_name VARCHAR(30) NOT NULL UNIQUE, first_name VARCHAR(30) NOT NULL, last_name VARCHAR(30) NOT NULL, password VARCHAR(30) DEFAULT NULL, enabled BOOLEAN DEFAULT FALSE, created TIMESTAMP NOT NULL DEFAULT CURRENT_TIMESTAMP, CONSTRAINT users_pk PRIMARY KEY (id));\00"
define i8* @db_create_users_table_sql() {
ret i8* getelementptr inbounds ([391 x i8], [391 x i8]* @.str, i64 0, i64 0)
}
__attribute__((section(".after_vectors"))) void M0_SVC_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<M0_SVC_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <M0_SVC_Handler+0x9>
jmp    1109 <M0_SVC_Handler+0x9>

x86 assembly (clang, -O2):
<M0_SVC_Handler>:
jmp    1100 <M0_SVC_Handler>

LLVM IR (-O0):
define void @M0_SVC_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @M0_SVC_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
char *basename(char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *pg) {
  fprintf(stderr, "Usage: %s word_to_crypt\n", basename(pg));
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <basename@plt>
mov    -0xc(%rbp),%edi
mov    %rax,%rdx
lea    0xeb2(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2eb8(%rip),%rax
mov    (%rax),%ebx
call   1040 <basename@plt>
lea    0xeca(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [25 x i8] c"Usage: %s word_to_crypt\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i8* @basename(i8* %4)
%6 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [25 x i8] c"Usage: %s word_to_crypt\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i8* @basename(i8* %0)
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
void foo_1_2_2_2_2_1_2_2_2() {}


x86 assembly (clang, -O0):
<foo_1_2_2_2_2_1_2_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_2_2_2_2_1_2_2_2>:
ret

LLVM IR (-O0):
define void @foo_1_2_2_2_2_1_2_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_2_2_2_2_1_2_2_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void grpcsharp_slice_buffer_slice_count() {
  fprintf(stderr, "Should never reach here");
  abort();
}


x86 assembly (clang, -O0):
<grpcsharp_slice_buffer_slice_count>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<grpcsharp_slice_buffer_slice_count>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_slice_buffer_slice_count() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_slice_buffer_slice_count() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
void use_cpu_is_builtins(unsigned int *p) { p[0] = 0; }


x86 assembly (clang, -O0):
<use_cpu_is_builtins>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_cpu_is_builtins>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @use_cpu_is_builtins(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 0, i32* %4
ret void
}

LLVM IR (-O2):
define void @use_cpu_is_builtins(i32* nocapture writeonly %0) {
store i32 0, i32* %0
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SSIDataPut(uint32_t ui32Base, uint32_t ui32Data) {
  ;

  ;
  while (!((*((volatile uint32_t *)(ui32Base + 0x0000000C))) & 0x00000002)) {
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) = ui32Data;
}


x86 assembly (clang, -O0):
<SSIDataPut>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    112c <SSIDataPut+0x2c>
jmp    1131 <SSIDataPut+0x31>
jmp    110a <SSIDataPut+0xa>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDataPut>:
movslq %edi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
testl  $0x2,0xc(%rax)
je     1110 <SSIDataPut+0x10>
mov    %esi,0x8(%rax)
ret

LLVM IR (-O0):
define void @SSIDataPut(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %14, %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 12
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, 2
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %15
14: ; preds = %5
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 8
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
store volatile i32 %16, i32* %20
ret void
}

LLVM IR (-O2):
define void @SSIDataPut(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 12
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
br label %6
6: ; preds = %6, %2
%7 = load volatile i32, i32* %5
%8 = and i32 %7, 2
%9 = icmp eq i32 %8, 0
br i1 %9, label %6, label %10
10: ; preds = %6
%11 = add nsw i32 %0, 8
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %1, i32* %13
ret void
}
int countSetBits(long long int n) {
  long long int count = 0;
  while (n) {
    count += n & 1;
    n >>= 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<countSetBits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113c <countSetBits+0x3c>
mov    -0x8(%rbp),%rax
and    $0x1,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <countSetBits+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countSetBits>:
xor    %eax,%eax
test   %rdi,%rdi
je     1124 <countSetBits+0x24>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %rdx,%rax
sar    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <countSetBits+0x10>
ret

LLVM IR (-O0):
define i32 @countSetBits(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i64, i64* %2
%9 = and i64 %8, 1
%10 = load i64, i64* %3
%11 = add nsw i64 %10, %9
store i64 %11, i64* %3
%12 = load i64, i64* %2
%13 = ashr i64 %12, 1
store i64 %13, i64* %2
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @countSetBits(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %7, %3 ], [ 0, %1 ]
%5 = phi i64 [ %8, %3 ], [ %0, %1 ]
%6 = and i64 %5, 1
%7 = add nuw nsw i64 %4, %6
%8 = ashr i64 %5, 1
%9 = icmp ult i64 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = trunc i64 %7 to i32
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ 0, %1 ], [ %11, %10 ]
ret i32 %13
}
unsigned short bitreverse2(unsigned short i) {
  return ((i & 0x3333) << 2) | ((i & 0xCCCC) >> 2);
}


x86 assembly (clang, -O0):
<bitreverse2>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0x3333,%eax
shl    $0x2,%eax
movzwl -0x2(%rbp),%ecx
and    $0xcccc,%ecx
sar    $0x2,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitreverse2>:
mov    %edi,%eax
and    $0xf333,%eax
shr    $0x2,%edi
and    $0x3333,%edi
lea    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define zeroext i16 @bitreverse2(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 13107
%6 = shl i32 %5, 2
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = and i32 %8, 52428
%10 = ashr i32 %9, 2
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define zeroext i16 @bitreverse2(i16 zeroext %0) {
%2 = shl i16 %0, 2
%3 = and i16 %2, -13108
%4 = lshr i16 %0, 2
%5 = and i16 %4, 13107
%6 = or i16 %3, %5
ret i16 %6
}
int config_csr_alignment_read(void) { return 32; }


x86 assembly (clang, -O0):
<config_csr_alignment_read>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_csr_alignment_read>:
mov    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @config_csr_alignment_read() {
ret i32 32
}

LLVM IR (-O2):
define i32 @config_csr_alignment_read() {
ret i32 32
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ xxprintf(char *);
int main(int argc, char **argv) {
  printf("Hello world\n");
  xxprintf("Hello world\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
lea    0xebe(%rip),%rdi
call   1030 <xxprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <xxprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @xxprintf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello world\0A\00"
@str = [12 x i8] c"Hello world\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @xxprintf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int bfin_read_SYSCR();
int /*<<< orphan*/ bfin_write_SYSCR(int);
void bfin_coreb_start(void) { bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020); }


x86 assembly (clang, -O0):
<bfin_coreb_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bfin_read_SYSCR@plt>
mov    %eax,%edi
and    $0xffffffdf,%edi
call   1040 <bfin_write_SYSCR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bfin_coreb_start>:
push   %rax
xor    %eax,%eax
call   1030 <bfin_read_SYSCR@plt>
and    $0xffffffdf,%eax
mov    %eax,%edi
pop    %rax
jmp    1040 <bfin_write_SYSCR@plt>

LLVM IR (-O0):
define void @bfin_coreb_start() {
%1 = call i32 (...) @bfin_read_SYSCR()
%2 = and i32 %1, -33
%3 = call i32 @bfin_write_SYSCR(i32 %2)
ret void
}

LLVM IR (-O2):
define void @bfin_coreb_start() {
%1 = tail call i32 (...) @bfin_read_SYSCR()
%2 = and i32 %1, -33
%3 = tail call i32 @bfin_write_SYSCR(i32 %2)
ret void
}
/* Variables and functions */
double log10(int);
int isPowerOfThree(int n) {
  double x = log10(n) / log10(3);
  return x == (double)((int)x);
}


x86 assembly (clang, -O0):
<isPowerOfThree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <log10@plt>
movsd  %xmm0,-0x18(%rbp)
mov    $0x3,%edi
call   1030 <log10@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPowerOfThree>:
sub    $0x18,%rsp
call   1030 <log10@plt>
movapd %xmm0,(%rsp)
mov    $0x3,%edi
call   1030 <log10@plt>
movapd (%rsp),%xmm1
divsd  %xmm0,%xmm1
cvttpd2dq %xmm1,%xmm0
cvtdq2pd %xmm0,%xmm0
cmpeqsd %xmm1,%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @isPowerOfThree(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call double @log10(i32 %4)
%6 = call double @log10(i32 3)
%7 = fdiv double %5, %6
store double %7, double* %3
%8 = load double, double* %3
%9 = load double, double* %3
%10 = fptosi double %9 to i32
%11 = sitofp i32 %10 to double
%12 = fcmp oeq double %8, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @isPowerOfThree(i32 %0) {
%2 = tail call double @log10(i32 %0)
%3 = tail call double @log10(i32 3)
%4 = fdiv double %2, %3
%5 = fptosi double %4 to i32
%6 = sitofp i32 %5 to double
%7 = fcmp oeq double %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int anetSetBlock(char *, int, int /*<<< orphan*/);
int anetBlock(char *err, int fd) { return anetSetBlock(err, fd, 0); }


x86 assembly (clang, -O0):
<anetBlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <anetSetBlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<anetBlock>:
xor    %edx,%edx
jmp    1030 <anetSetBlock@plt>

LLVM IR (-O0):
define i32 @anetBlock(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @anetSetBlock(i8* %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @anetBlock(i8* %0, i32 %1) {
%3 = tail call i32 @anetSetBlock(i8* %0, i32 %1, i32 0)
ret i32 %3
}
int test_imm_94int64_lowword_mem(long long *val) {
  return ((*val) & (0x94 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_94int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x94,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_94int64_lowword_mem>:
testb  $0x94,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_94int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 148
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_94int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 148
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;
struct timespec {
  int tv_nsec;
  int /*<<< orphan*/ member_1;
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
struct timespec cycles32_to_timespec(uint32_t cycles, uint32_t mult,
                                     uint32_t shift) {
  struct timespec ts = {0, 0};
  ts.tv_nsec = ((uint64_t)cycles * mult) >> shift;
  return ts;
}


x86 assembly (clang, -O0):
<cycles32_to_timespec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x14(%rbp)
mov    %esi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ecx
imul   %ecx,%eax
mov    -0x1c(%rbp),%cl
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%edx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cycles32_to_timespec>:
mov    %edx,%ecx
mov    %edi,%eax
imul   %esi,%eax
sar    %cl,%eax
xor    %edx,%edx
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32, i32 }
define { i64, i32 } @cycles32_to_timespec(i32 %0, i32 %1, i32 %2) {
%4 = alloca %struct.timespec
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca { i64, i32 }
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = bitcast %struct.timespec* %4 to i8*
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %7
%14 = ashr i32 %12, %13
%15 = getelementptr inbounds %struct.timespec, %struct.timespec* %4, i32 0, i32 0
store i32 %14, i32* %15
%16 = bitcast { i64, i32 }* %8 to i8*
%17 = bitcast %struct.timespec* %4 to i8*
%18 = load { i64, i32 }, { i64, i32 }* %8
ret { i64, i32 } %18
}

LLVM IR (-O2):
define { i64, i32 } @cycles32_to_timespec(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %1, %0
%5 = ashr i32 %4, %2
%6 = zext i32 %5 to i64
%7 = insertvalue { i64, i32 } poison, i64 %6, 0
%8 = insertvalue { i64, i32 } %7, i32 0, 1
ret { i64, i32 } %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
__attribute__((no)) int foo(int a, int b) {
  printf("%d:%d\n", a, b);
  return a + b;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xee2(%rip),%rdi
mov    %ebp,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d:%d\0A\00"
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d:%d\0A\00"
define i32 @foo(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%4 = add nsw i32 %1, %0
ret i32 %4
}
int count_number_of_bits(unsigned int mask) {
  int count = 0;
  while (mask) {
    count++;
    mask &= (mask - 1);
  }
  return count;
}


x86 assembly (clang, -O0):
<count_number_of_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <count_number_of_bits+0x32>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <count_number_of_bits+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_number_of_bits>:
xor    %eax,%eax
test   %edi,%edi
je     111c <count_number_of_bits+0x1c>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%eax
lea    -0x1(%rdi),%ecx
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <count_number_of_bits+0x10>
ret

LLVM IR (-O0):
define i32 @count_number_of_bits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = sub i32 %10, 1
%12 = load i32, i32* %2
%13 = and i32 %12, %11
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @count_number_of_bits(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = add i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %11
}
long unsigned int pack_grid4_power(char *grid4, int power) {
  long unsigned int m;
  m = (179 - 10 * grid4[0] - grid4[2]) * 180 + 10 * grid4[1] + grid4[3];
  m = m * 128 + power + 64;
  return m;
}


x86 assembly (clang, -O0):
<pack_grid4_power>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
imul   $0xa,%eax,%ecx
mov    $0xb3,%eax
sub    %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
sub    %ecx,%eax
imul   $0xb4,%eax,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x1(%rcx),%ecx
imul   $0xa,%ecx,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x3(%rcx),%ecx
add    %ecx,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x7,%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
add    $0x40,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pack_grid4_power>:
movsbq (%rdi),%rax
add    %rax,%rax
lea    (%rax,%rax,4),%rax
movsbq 0x2(%rdi),%rcx
add    %rax,%rcx
neg    %rcx
imul   $0xb4,%rcx,%rax
movsbq 0x1(%rdi),%rcx
lea    (%rcx,%rcx,4),%rcx
movsbq 0x3(%rdi),%rdx
lea    (%rdx,%rcx,2),%rcx
add    %rax,%rcx
shl    $0x7,%rcx
movslq %esi,%rax
add    %rcx,%rax
add    $0x3eee40,%rax
ret

LLVM IR (-O0):
define i64 @pack_grid4_power(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = mul nsw i32 10, %9
%11 = sub nsw i32 179, %10
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = sub nsw i32 %11, %15
%17 = mul nsw i32 %16, 180
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 1
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = mul nsw i32 10, %21
%23 = add nsw i32 %17, %22
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i64 3
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = add nsw i32 %23, %27
%29 = sext i32 %28 to i64
store i64 %29, i64* %5
%30 = load i64, i64* %5
%31 = mul i64 %30, 128
%32 = load i32, i32* %4
%33 = sext i32 %32 to i64
%34 = add i64 %31, %33
%35 = add i64 %34, 64
store i64 %35, i64* %5
%36 = load i64, i64* %5
ret i64 %36
}

LLVM IR (-O2):
define i64 @pack_grid4_power(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i64
%5 = mul nsw i64 %4, -10
%6 = add nsw i64 %5, 179
%7 = getelementptr inbounds i8, i8* %0, i64 2
%8 = load i8, i8* %7
%9 = sext i8 %8 to i64
%10 = sub nsw i64 %6, %9
%11 = mul nsw i64 %10, 180
%12 = getelementptr inbounds i8, i8* %0, i64 1
%13 = load i8, i8* %12
%14 = sext i8 %13 to i64
%15 = mul nsw i64 %14, 10
%16 = getelementptr inbounds i8, i8* %0, i64 3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i64
%19 = add nsw i64 %15, %18
%20 = add nsw i64 %19, %11
%21 = shl nsw i64 %20, 7
%22 = sext i32 %1 to i64
%23 = add nsw i64 %22, 64
%24 = add i64 %23, %21
ret i64 %24
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void err(char *s) {
  perror(s);
  exit(1);
}


x86 assembly (clang, -O0):
<err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @err(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
XAddHosts() {}


x86 assembly (clang, -O0):
<XAddHosts>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XAddHosts>:
ret

LLVM IR (-O0):
define i32 @XAddHosts() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XAddHosts() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ output_header(int);
void output_version(void) { output_header(0x00); }


x86 assembly (clang, -O0):
<output_version>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <output_header@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_version>:
xor    %edi,%edi
jmp    1030 <output_header@plt>

LLVM IR (-O0):
define void @output_version() {
%1 = call i32 @output_header(i32 0)
ret void
}

LLVM IR (-O2):
define void @output_version() {
%1 = tail call i32 @output_header(i32 0)
ret void
}
/* Type definitions */
typedef int u_int8_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
u_int8_t usage(char *bin) {
  fprintf(stderr, "Usage: %s --port port\n", bin);
  return -1;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"Usage: %s --port port\0A\00"
define i32 @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 -1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"Usage: %s --port port\0A\00"
define i32 @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 -1
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int asuint64(double);
int issignaling_d(double x) {
  uint64_t ix = asuint64(x);
  if (!1)
    return (ix & 0x7ff8000000000000) == 0x7ff8000000000000;
  return 2 * (ix ^ 0x0008000000000000) > 2 * 0x7ff8000000000000ULL;
}


x86 assembly (clang, -O0):
<issignaling_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <asuint64@plt>
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
movabs $0x8000000000000,%rcx
xor    %rcx,%rax
shl    $0x1,%rax
movabs $0xfff0000000000000,%rcx
cmp    %rcx,%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<issignaling_d>:
push   %rax
call   1030 <asuint64@plt>
cltq
add    %rax,%rax
movabs $0x10000000000000,%rcx
xor    %rax,%rcx
movabs $0xfff0000000000000,%rdx
xor    %eax,%eax
cmp    %rdx,%rcx
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @issignaling_d(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = call i32 @asuint64(double %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = xor i64 %7, 2251799813685248
%9 = mul nsw i64 2, %8
%10 = icmp ugt i64 %9, -4503599627370496
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @issignaling_d(double %0) {
%2 = tail call i32 @asuint64(double %0)
%3 = sext i32 %2 to i64
%4 = shl nsw i64 %3, 1
%5 = xor i64 %4, 4503599627370496
%6 = icmp ugt i64 %5, -4503599627370496
%7 = zext i1 %6 to i32
ret i32 %7
}