#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned char reg_read_8(void *);
int /*<<< orphan*/ reg_write_8(unsigned char, void *);
void ls1c_spi_set_mode(void *spi_base, unsigned char cpol, unsigned char cpha) {
  unsigned char val = 0;
  val = reg_read_8(spi_base + (0));
  val &= (~(0x01 << (3)));
  val |= (cpol << (3));
  val &= (~(0x01 << (2)));
  val |= (cpha << (2));
  reg_write_8(val, spi_base + (0));
  return;
}


x86 assembly (clang, -O0):
<ls1c_spi_set_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movb   $0x0,-0xb(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <reg_read_8@plt>
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
and    $0xfffffff7,%eax
mov    %al,-0xb(%rbp)
movzbl -0x9(%rbp),%ecx
shl    $0x3,%ecx
movzbl -0xb(%rbp),%eax
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
and    $0xfffffffb,%eax
mov    %al,-0xb(%rbp)
movzbl -0xa(%rbp),%ecx
shl    $0x2,%ecx
movzbl -0xb(%rbp),%eax
or     %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    -0x8(%rbp),%rsi
movzbl %al,%edi
call   1040 <reg_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls1c_spi_set_mode>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%ebp
mov    %rdi,%r14
call   1030 <reg_read_8@plt>
and    $0xf3,%al
shl    $0x3,%bpl
shl    $0x2,%bl
or     %bpl,%bl
or     %al,%bl
movzbl %bl,%edi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <reg_write_8@plt>

LLVM IR (-O0):
define void @ls1c_spi_set_mode(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
store i8 0, i8* %7
%8 = load i8*, i8** %4
%9 = getelementptr i8, i8* %8, i64 0
%10 = call zeroext i8 @reg_read_8(i8* %9)
store i8 %10, i8* %7
%11 = load i8, i8* %7
%12 = zext i8 %11 to i32
%13 = and i32 %12, -9
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 3
%18 = load i8, i8* %7
%19 = zext i8 %18 to i32
%20 = or i32 %19, %17
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = and i32 %23, -5
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %6
%27 = zext i8 %26 to i32
%28 = shl i32 %27, 2
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = or i32 %30, %28
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = load i8*, i8** %4
%35 = getelementptr i8, i8* %34, i64 0
%36 = call i32 @reg_write_8(i8 zeroext %33, i8* %35)
ret void
}

LLVM IR (-O2):
define void @ls1c_spi_set_mode(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = tail call zeroext i8 @reg_read_8(i8* %0)
%5 = and i8 %4, -13
%6 = shl i8 %1, 3
%7 = shl i8 %2, 2
%8 = or i8 %7, %6
%9 = or i8 %8, %5
%10 = tail call i32 @reg_write_8(i8 zeroext %9, i8* %0)
ret void
}