double xatan(double s) {
  double t, u;
  int q = 0;
  if (s < 0) {
    s = -s;
    q = 2;
  }
  if (s > 1) {
    s = 1.0 / s;
    q |= 1;
  }
  t = s * s;
  u = -1.88796008463073496563746e-05;
  u = u * t + (0.000209850076645816976906797);
  u = u * t + (-0.00110611831486672482563471);
  u = u * t + (0.00370026744188713119232403);
  u = u * t + (-0.00889896195887655491740809);
  u = u * t + (0.016599329773529201970117);
  u = u * t + (-0.0254517624932312641616861);
  u = u * t + (0.0337852580001353069993897);
  u = u * t + (-0.0407629191276836500001934);
  u = u * t + (0.0466667150077840625632675);
  u = u * t + (-0.0523674852303482457616113);
  u = u * t + (0.0587666392926673580854313);
  u = u * t + (-0.0666573579361080525984562);
  u = u * t + (0.0769219538311769618355029);
  u = u * t + (-0.090908995008245008229153);
  u = u * t + (0.111111105648261418443745);
  u = u * t + (-0.14285714266771329383765);
  u = u * t + (0.199999999996591265594148);
  u = u * t + (-0.333333333333311110369124);
  t = s + s * (t * u);
  if ((q & 1) != 0)
    t = 1.570796326794896557998982 - t;
  if ((q & 2) != 0)
    t = -t;
  return t;
}


x86 assembly (clang, -O0):
<xatan>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movl   $0x0,-0x1c(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1146 <xatan+0x46>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movl   $0x2,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xead(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1178 <xatan+0x78>
movsd  0xe9b(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
mov    -0x1c(%rbp),%eax
or     $0x1,%eax
mov    %eax,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xf09(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xebf(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe98(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe71(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe4a(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe23(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xdfc(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xdd5(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xdae(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xd87(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xd60(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xd39(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xd12(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xceb(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xcc4(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xc9d(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xc76(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xc4f(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
mulsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1404 <xatan+0x304>
movsd  0xca6(%rip),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1434 <xatan+0x334>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<xatan>:
movapd 0xef8(%rip),%xmm2
movapd %xmm0,%xmm1
xorpd  %xmm2,%xmm1
xorpd  %xmm3,%xmm3
movapd %xmm0,%xmm5
cmpltsd %xmm3,%xmm5
andpd  %xmm5,%xmm1
andnpd %xmm0,%xmm5
orpd   %xmm1,%xmm5
movsd  0xedf(%rip),%xmm4
ucomisd %xmm4,%xmm5
movapd %xmm4,%xmm1
divsd  %xmm5,%xmm1
cmpltsd %xmm5,%xmm4
andpd  %xmm4,%xmm1
andnpd %xmm5,%xmm4
orpd   %xmm1,%xmm4
movapd %xmm4,%xmm5
mulsd  %xmm4,%xmm5
movsd  0xeba(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xeb6(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xeb2(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xeae(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xeaa(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xea6(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xea2(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe9e(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe9a(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe96(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe92(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe8e(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe8a(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe86(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe82(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe7e(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe7a(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe76(%rip),%xmm1
mulsd  %xmm5,%xmm1
addsd  0xe72(%rip),%xmm1
mulsd  %xmm5,%xmm1
mulsd  %xmm4,%xmm1
addsd  %xmm4,%xmm1
ja     124f <xatan+0x14f>
ucomisd %xmm0,%xmm3
ja     1265 <xatan+0x165>
movapd %xmm1,%xmm0
ret
movsd  0xe59(%rip),%xmm4
subsd  %xmm1,%xmm4
movapd %xmm4,%xmm1
ucomisd %xmm0,%xmm3
jbe    124a <xatan+0x14a>
xorpd  %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @xatan(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %2
store i32 0, i32* %5
%6 = load double, double* %2
%7 = fcmp olt double %6, 0.000000e+00
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load double, double* %2
%10 = fneg double %9
store double %10, double* %2
store i32 2, i32* %5
br label %11
11: ; preds = %8, %1
%12 = load double, double* %2
%13 = fcmp ogt double %12, 1.000000e+00
br i1 %13, label %14, label %19
14: ; preds = %11
%15 = load double, double* %2
%16 = fdiv double 1.000000e+00, %15
store double %16, double* %2
%17 = load i32, i32* %5
%18 = or i32 %17, 1
store i32 %18, i32* %5
br label %19
19: ; preds = %14, %11
%20 = load double, double* %2
%21 = load double, double* %2
%22 = fmul double %20, %21
store double %22, double* %3
store double 0xBEF3CBF44A88555F, double* %4
%23 = load double, double* %4
%24 = load double, double* %3
%25 = call double @llvm.fmuladd.f64(double %23, double %24, double 0x3F2B81666EB938AF)
store double %25, double* %4
%26 = load double, double* %4
%27 = load double, double* %3
%28 = call double @llvm.fmuladd.f64(double %26, double %27, double 0xBF521F657F3915DA)
store double %28, double* %4
%29 = load double, double* %4
%30 = load double, double* %3
%31 = call double @llvm.fmuladd.f64(double %29, double %30, double 0x3F6E5005F4C78C20)
store double %31, double* %4
%32 = load double, double* %4
%33 = load double, double* %3
%34 = call double @llvm.fmuladd.f64(double %32, double %33, double 0xBF82399E74A75E56)
store double %34, double* %4
%35 = load double, double* %4
%36 = load double, double* %3
%37 = call double @llvm.fmuladd.f64(double %35, double %36, double 0x3F90FF6A2A0D2286)
store double %37, double* %4
%38 = load double, double* %4
%39 = load double, double* %3
%40 = call double @llvm.fmuladd.f64(double %38, double %39, double 0xBF9A1006DE22CDAC)
store double %40, double* %4
%41 = load double, double* %4
%42 = load double, double* %3
%43 = call double @llvm.fmuladd.f64(double %41, double %42, double 0x3FA14C4D24651F2E)
store double %43, double* %4
%44 = load double, double* %4
%45 = load double, double* %3
%46 = call double @llvm.fmuladd.f64(double %44, double %45, double 0xBFA4DEE09915F638)
store double %46, double* %4
%47 = load double, double* %4
%48 = load double, double* %3
%49 = call double @llvm.fmuladd.f64(double %47, double %48, double 0x3FA7E4B31D8A55AE)
store double %49, double* %4
%50 = load double, double* %4
%51 = load double, double* %3
%52 = call double @llvm.fmuladd.f64(double %50, double %51, double 0xBFAACFE938E04FCA)
store double %52, double* %4
%53 = load double, double* %4
%54 = load double, double* %3
%55 = call double @llvm.fmuladd.f64(double %53, double %54, double 0x3FAE16A933B73622)
store double %55, double* %4
%56 = load double, double* %4
%57 = load double, double* %3
%58 = call double @llvm.fmuladd.f64(double %56, double %57, double 0xBFB11074E45F93E0)
store double %58, double* %4
%59 = load double, double* %4
%60 = load double, double* %3
%61 = call double @llvm.fmuladd.f64(double %59, double %60, double 0x3FB3B1283C0CA0B1)
store double %61, double* %4
%62 = load double, double* %4
%63 = load double, double* %3
%64 = call double @llvm.fmuladd.f64(double %62, double %63, double 0xBFB745CFD878FEE8)
store double %64, double* %4
%65 = load double, double* %4
%66 = load double, double* %3
%67 = call double @llvm.fmuladd.f64(double %65, double %66, double 0x3FBC71C704FB4F9F)
store double %67, double* %4
%68 = load double, double* %4
%69 = load double, double* %3
%70 = call double @llvm.fmuladd.f64(double %68, double %69, double 0xBFC2492491E100BB)
store double %70, double* %4
%71 = load double, double* %4
%72 = load double, double* %3
%73 = call double @llvm.fmuladd.f64(double %71, double %72, double 0x3FC999999997B9DD)
store double %73, double* %4
%74 = load double, double* %4
%75 = load double, double* %3
%76 = call double @llvm.fmuladd.f64(double %74, double %75, double 0xBFD55555555553C5)
store double %76, double* %4
%77 = load double, double* %2
%78 = load double, double* %2
%79 = load double, double* %3
%80 = load double, double* %4
%81 = fmul double %79, %80
%82 = call double @llvm.fmuladd.f64(double %78, double %81, double %77)
store double %82, double* %3
%83 = load i32, i32* %5
%84 = and i32 %83, 1
%85 = icmp ne i32 %84, 0
br i1 %85, label %86, label %89
86: ; preds = %19
%87 = load double, double* %3
%88 = fsub double 0x3FF921FB54442D18, %87
store double %88, double* %3
br label %89
89: ; preds = %86, %19
%90 = load i32, i32* %5
%91 = and i32 %90, 2
%92 = icmp ne i32 %91, 0
br i1 %92, label %93, label %96
93: ; preds = %89
%94 = load double, double* %3
%95 = fneg double %94
store double %95, double* %3
br label %96
96: ; preds = %93, %89
%97 = load double, double* %3
ret double %97
}

LLVM IR (-O2):
define double @xatan(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %3, double %0
%5 = fcmp ogt double %4, 1.000000e+00
%6 = fdiv double 1.000000e+00, %4
%7 = select i1 %5, double %6, double %4
%8 = fmul double %7, %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double 0xBEF3CBF44A88555F, double 0x3F2B81666EB938AF)
%10 = tail call double @llvm.fmuladd.f64(double %9, double %8, double 0xBF521F657F3915DA)
%11 = tail call double @llvm.fmuladd.f64(double %10, double %8, double 0x3F6E5005F4C78C20)
%12 = tail call double @llvm.fmuladd.f64(double %11, double %8, double 0xBF82399E74A75E56)
%13 = tail call double @llvm.fmuladd.f64(double %12, double %8, double 0x3F90FF6A2A0D2286)
%14 = tail call double @llvm.fmuladd.f64(double %13, double %8, double 0xBF9A1006DE22CDAC)
%15 = tail call double @llvm.fmuladd.f64(double %14, double %8, double 0x3FA14C4D24651F2E)
%16 = tail call double @llvm.fmuladd.f64(double %15, double %8, double 0xBFA4DEE09915F638)
%17 = tail call double @llvm.fmuladd.f64(double %16, double %8, double 0x3FA7E4B31D8A55AE)
%18 = tail call double @llvm.fmuladd.f64(double %17, double %8, double 0xBFAACFE938E04FCA)
%19 = tail call double @llvm.fmuladd.f64(double %18, double %8, double 0x3FAE16A933B73622)
%20 = tail call double @llvm.fmuladd.f64(double %19, double %8, double 0xBFB11074E45F93E0)
%21 = tail call double @llvm.fmuladd.f64(double %20, double %8, double 0x3FB3B1283C0CA0B1)
%22 = tail call double @llvm.fmuladd.f64(double %21, double %8, double 0xBFB745CFD878FEE8)
%23 = tail call double @llvm.fmuladd.f64(double %22, double %8, double 0x3FBC71C704FB4F9F)
%24 = tail call double @llvm.fmuladd.f64(double %23, double %8, double 0xBFC2492491E100BB)
%25 = tail call double @llvm.fmuladd.f64(double %24, double %8, double 0x3FC999999997B9DD)
%26 = tail call double @llvm.fmuladd.f64(double %25, double %8, double 0xBFD55555555553C5)
%27 = fmul double %8, %26
%28 = tail call double @llvm.fmuladd.f64(double %7, double %27, double %7)
%29 = fsub double 0x3FF921FB54442D18, %28
%30 = select i1 %5, double %29, double %28
%31 = fneg double %30
%32 = select i1 %2, double %31, double %30
ret double %32
}