xunge/DecIR huggingface dataset:
void window_game_bottom_toolbar_emptysub() {}


x86 assembly (clang, -O0):
<window_game_bottom_toolbar_emptysub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<window_game_bottom_toolbar_emptysub>:
ret

LLVM IR (-O0):
define void @window_game_bottom_toolbar_emptysub() {
ret void
}

LLVM IR (-O2):
define void @window_game_bottom_toolbar_emptysub() {
ret void
}
/* Variables and functions */
size_t net_recv_timed(int, void *, size_t, int);
extern size_t net_recv(int fd, void *buf, size_t size) {
  return net_recv_timed(fd, buf, size, 4000);
}


x86 assembly (clang, -O0):
<net_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0xfa0,%ecx
call   1030 <net_recv_timed@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_recv>:
mov    $0xfa0,%ecx
jmp    1030 <net_recv_timed@plt>

LLVM IR (-O0):
define i64 @net_recv(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @net_recv_timed(i32 %7, i8* %8, i64 %9, i32 4000)
ret i64 %10
}

LLVM IR (-O2):
define i64 @net_recv(i32 %0, i8* %1, i64 %2) {
%4 = tail call i64 @net_recv_timed(i32 %0, i8* %1, i64 %2, i32 4000)
ret i64 %4
}
/* Variables and functions */
void putc(int c) {
  int t;
  ((volatile unsigned char *)0x400003f8)[0] = c;
  t = 0x10000;
  while (t--)
    ;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    $0x400003f8,%eax
mov    %cl,(%rax)
movl   $0x10000,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     1133 <putc+0x33>
jmp    111a <putc+0x1a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
mov    %dil,0x400003f8
40
ret

LLVM IR (-O0):
define void @putc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = trunc i32 %4 to i8
store volatile i8 %5, i8* inttoptr (i64 1073742840 to i8*)
store i32 65536, i32* %3
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, -1
store i32 %8, i32* %3
%9 = icmp ne i32 %7, 0
br i1 %9, label %10, label %11
10: ; preds = %6
br label %6
11: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @putc(i32 %0) {
%2 = trunc i32 %0 to i8
store volatile i8 %2, i8* inttoptr (i64 1073742840 to i8*)
ret void
}
void sendlogoff(void) {}


x86 assembly (clang, -O0):
<sendlogoff>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendlogoff>:
ret

LLVM IR (-O0):
define void @sendlogoff() {
ret void
}

LLVM IR (-O2):
define void @sendlogoff() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ heaperr();
void *realloc(void *, size_t);
void *rllct(void *a, size_t n) {
  if ((a = realloc(a, n)) == 0)
    heaperr();
  return a;
}


x86 assembly (clang, -O0):
<rllct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    1152 <rllct+0x32>
mov    $0x0,%al
call   1030 <heaperr@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rllct>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <rllct+0x15>
xor    %eax,%eax
call   1030 <heaperr@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @rllct(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
store i8* %7, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 (...) @heaperr()
br label %11
11: ; preds = %9, %2
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define noalias i8* @rllct(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @heaperr()
br label %7
7: ; preds = %5, %2
ret i8* %3
}
int Operand_bt4_encode(unsigned int *valp) {
  int error;
  error = (*valp & ~(0x3 << 2)) != 0;
  *valp = *valp >> 2;
  return error;
}


x86 assembly (clang, -O0):
<Operand_bt4_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xfffffff3,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
shr    $0x2,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_bt4_encode>:
mov    (%rdi),%ecx
xor    %eax,%eax
test   $0xfffffff3,%ecx
setne  %al
shr    $0x2,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define i32 @Operand_bt4_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = and i32 %5, -13
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* %9
%11 = lshr i32 %10, 2
%12 = load i32*, i32** %2
store i32 %11, i32* %12
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @Operand_bt4_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, -13
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
%6 = lshr i32 %2, 2
store i32 %6, i32* %0
ret i32 %5
}
/* Variables and functions */
int getchar();
int /*<<< orphan*/ putchar(char);
int main() {
  int c = getchar();
  if (c == 'A')
    putchar('X');
  else
    putchar('Y');
  putchar('\n');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jne    1152 <main+0x32>
mov    $0x58,%edi
call   1030 <putchar@plt>
jmp    115c <main+0x3c>
mov    $0x59,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
xor    %edi,%edi
cmp    $0x41,%eax
sete   %dil
xor    $0x59,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @getchar()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 65
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @putchar(i8 signext 88)
br label %10
8: ; preds = %0
%9 = call i32 @putchar(i8 signext 89)
br label %10
10: ; preds = %8, %6
%11 = call i32 @putchar(i8 signext 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = icmp eq i32 %1, 65
%3 = select i1 %2, i8 88, i8 89
%4 = tail call i32 @putchar(i8 signext %3)
%5 = tail call i32 @putchar(i8 signext 10)
ret i32 0
}
int count_leap_year(int y) {
  y -= 1;
  return y / 4 - y / 100 + y / 400;
}


x86 assembly (clang, -O0):
<count_leap_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_leap_year>:
lea    -0x1(%rdi),%eax
lea    0x2(%rdi),%ecx
test   %eax,%eax
cmovns %eax,%ecx
sar    $0x2,%ecx
cltq
imul   $0xffffffffae147ae1,%rax,%rdx
mov    %rdx,%rsi
shr    $0x3f,%rsi
sar    $0x25,%rdx
add    %esi,%edx
add    %ecx,%edx
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x27,%rax
add    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @count_leap_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 4
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 100
%9 = sub nsw i32 %6, %8
%10 = load i32, i32* %2
%11 = sdiv i32 %10, 400
%12 = add nsw i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @count_leap_year(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = sdiv i32 %2, 4
%4 = sdiv i32 %2, -100
%5 = add nsw i32 %4, %3
%6 = sdiv i32 %2, 400
%7 = add nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(int /*<<< orphan*/, int);
void printchar(char **str, int c) {
  if (str) {
    **str = (char)c;
    ++(*str);
  } else {
    (void)uart_putc(0, c);
  }
}


x86 assembly (clang, -O0):
<printchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114b <printchar+0x3b>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    1155 <printchar+0x45>
mov    -0xc(%rbp),%esi
xor    %edi,%edi
call   1030 <uart_putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printchar>:
test   %rdi,%rdi
je     1120 <printchar+0x10>
mov    (%rdi),%rax
mov    %sil,(%rax)
addq   $0x1,(%rdi)
ret
xor    %edi,%edi
jmp    1030 <uart_putc@plt>

LLVM IR (-O0):
define void @printchar(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = icmp ne i8** %5, null
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %4
%9 = trunc i32 %8 to i8
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
store i8 %9, i8* %11
%12 = load i8**, i8*** %3
%13 = load i8*, i8** %12
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %12
br label %18
15: ; preds = %2
%16 = load i32, i32* %4
%17 = call i32 @uart_putc(i32 0, i32 %16)
br label %18
18: ; preds = %15, %7
ret void
}

LLVM IR (-O2):
define void @printchar(i8** %0, i32 %1) {
%3 = icmp eq i8** %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = trunc i32 %1 to i8
%6 = load i8*, i8** %0
store i8 %5, i8* %6
%7 = load i8*, i8** %0
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8* %8, i8** %0
br label %11
9: ; preds = %2
%10 = tail call i32 @uart_putc(i32 0, i32 %1)
br label %11
11: ; preds = %9, %4
ret void
}
unsigned long HibernateLowBatGet(void) {
  return ((*((volatile unsigned long *)(0x400FC010))) &
          (0x00006000 | 0x000000A0));
}


x86 assembly (clang, -O0):
<HibernateLowBatGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%rax
and    $0x60a0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateLowBatGet>:
mov    0x400fc010,%rax
40
and    $0x60a0,%eax
ret

LLVM IR (-O0):
define i64 @HibernateLowBatGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = and i64 %1, 24736
ret i64 %2
}

LLVM IR (-O2):
define i64 @HibernateLowBatGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = and i64 %1, 24736
ret i64 %2
}
double PairConstraintDistance(int nOn1, int nOff1, int nOn2, int nOff2) {
  double f1 = nOn1 / (double)(nOn1 + nOff1);
  double f2 = nOn2 / (double)(nOn2 + nOff2);
  return (f1 + f2 - 2.0 * f1 * f2);
}


x86 assembly (clang, -O0):
<PairConstraintDistance>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm0
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm1
addsd  -0x20(%rbp),%xmm1
movsd  0xeae(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<PairConstraintDistance>:
movd   %edx,%xmm0
movd   %edi,%xmm1
punpckldq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm0
movd   %ecx,%xmm2
movd   %esi,%xmm3
punpckldq %xmm2,%xmm3
paddd  %xmm1,%xmm3
cvtdq2pd %xmm3,%xmm1
divpd  %xmm1,%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
movapd %xmm0,%xmm2
addsd  %xmm1,%xmm2
mulsd  0xec0(%rip),%xmm0
mulsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @PairConstraintDistance(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca double
%10 = alloca double
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* %5
%12 = sitofp i32 %11 to double
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = add nsw i32 %13, %14
%16 = sitofp i32 %15 to double
%17 = fdiv double %12, %16
store double %17, double* %9
%18 = load i32, i32* %7
%19 = sitofp i32 %18 to double
%20 = load i32, i32* %7
%21 = load i32, i32* %8
%22 = add nsw i32 %20, %21
%23 = sitofp i32 %22 to double
%24 = fdiv double %19, %23
store double %24, double* %10
%25 = load double, double* %9
%26 = load double, double* %10
%27 = fadd double %25, %26
%28 = load double, double* %9
%29 = fmul double 2.000000e+00, %28
%30 = load double, double* %10
%31 = fneg double %29
%32 = call double @llvm.fmuladd.f64(double %31, double %30, double %27)
ret double %32
}

LLVM IR (-O2):
define double @PairConstraintDistance(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = insertelement <2 x i32> poison, i32 %0, i64 0
%6 = insertelement <2 x i32> %5, i32 %2, i64 1
%7 = sitofp <2 x i32> %6 to <2 x double>
%8 = insertelement <2 x i32> poison, i32 %1, i64 0
%9 = insertelement <2 x i32> %8, i32 %3, i64 1
%10 = add nsw <2 x i32> %9, %6
%11 = sitofp <2 x i32> %10 to <2 x double>
%12 = fdiv <2 x double> %7, %11
%13 = extractelement <2 x double> %12, i64 0
%14 = extractelement <2 x double> %12, i64 1
%15 = fadd double %13, %14
%16 = fmul double %13, -2.000000e+00
%17 = tail call double @llvm.fmuladd.f64(double %16, double %14, double %15)
ret double %17
}
/* Variables and functions */
double M_PI;
double el_area(double semiMajor, double semiMinor) {
  return M_PI * semiMajor * semiMinor;
}


x86 assembly (clang, -O0):
<el_area>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    0x2ed3(%rip),%rax
movsd  (%rax),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<el_area>:
mov    0x2ee1(%rip),%rax
mulsd  (%rax),%xmm0
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
define double @el_area(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* @M_PI
%6 = load double, double* %3
%7 = fmul double %5, %6
%8 = load double, double* %4
%9 = fmul double %7, %8
ret double %9
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
define double @el_area(double %0, double %1) {
%3 = load double, double* @M_PI
%4 = fmul double %3, %0
%5 = fmul double %4, %1
ret double %5
}
void PWM_device_channel_stop(unsigned int channel) {}


x86 assembly (clang, -O0):
<PWM_device_channel_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM_device_channel_stop>:
ret

LLVM IR (-O0):
define void @PWM_device_channel_stop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @PWM_device_channel_stop(i32 %0) {
ret void
}
/* Variables and functions */
int ft_isalpha(int);
int ft_isdigit(int);
int ft_isalnum(int c) {
  if (ft_isalpha(c) == 1 || ft_isdigit(c) == 1)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <ft_isalpha@plt>
cmp    $0x1,%eax
je     114d <ft_isalnum+0x2d>
mov    -0x8(%rbp),%edi
call   1030 <ft_isdigit@plt>
cmp    $0x1,%eax
jne    1159 <ft_isalnum+0x39>
movl   $0x1,-0x4(%rbp)
jmp    1160 <ft_isalnum+0x40>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
push   %rbx
mov    %edi,%ebx
call   1040 <ft_isalpha@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0x1,%ecx
je     1145 <ft_isalnum+0x25>
mov    %ebx,%edi
call   1030 <ft_isdigit@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @ft_isalpha(i32 %4)
%6 = icmp eq i32 %5, 1
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @ft_isdigit(i32 %8)
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %13
12: ; preds = %7
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = tail call i32 @ft_isalpha(i32 %0)
%3 = icmp eq i32 %2, 1
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @ft_isdigit(i32 %0)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int any_odd_one(unsigned int x) {
  x = x & 0xAAAAAAAA;
  return x != 0;
}


x86 assembly (clang, -O0):
<any_odd_one>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xaaaaaaaa,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<any_odd_one>:
xor    %eax,%eax
test   $0xaaaaaaaa,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @any_odd_one(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -1431655766
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @any_odd_one(i32 %0) {
%2 = and i32 %0, -1431655766
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_bit(int nr, const volatile unsigned long *addr) {
  return 1UL & (addr[((nr) / (4 * 8))] >> (nr & ((4 * 8) - 1)));
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rax
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
mov    %edi,%ecx
lea    0x1f(%rcx),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x5,%eax
cltq
mov    (%rsi,%rax,8),%rax
and    $0x1f,%cl
shr    %cl,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 32
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i64, i64* %5, i64 %8
%10 = load volatile i64, i64* %9
%11 = load i32, i32* %3
%12 = and i32 %11, 31
%13 = zext i32 %12 to i64
%14 = lshr i64 %10, %13
%15 = and i64 1, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = sdiv i32 %0, 32
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = load volatile i64, i64* %5
%7 = and i32 %0, 31
%8 = zext i32 %7 to i64
%9 = lshr i64 %6, %8
%10 = trunc i64 %9 to i32
%11 = and i32 %10, 1
ret i32 %11
}
move(x, y) int x, y;
{ printf("move(%d,%d)\n", x, y); }


x86 assembly (clang, -O0):
<move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"move(%d,%d)\0A\00"
define i32 @move(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@.str = [13 x i8] c"move(%d,%d)\0A\00"
define i32 @move(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ std_err(char *);
usage() {
  std_err("Usage:  cp f1 f2;  or  cp f1 ... fn d2\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <std_err@plt>
mov    $0xffffffff,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <std_err@plt>
mov    $0xffffffff,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Usage: cp f1 f2; or cp f1 ... fn d2\0A\00"
define i32 @usage() {
%1 = call i32 @std_err(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@.str = [40 x i8] c"Usage: cp f1 f2; or cp f1 ... fn d2\0A\00"
define i32 @usage() {
%1 = tail call i32 @std_err(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
scalar_t__ pow(float, int);
float sqrtf(scalar_t__);
float findNorm(float *vec) {
  return sqrtf(pow(vec[0], 2) + pow(vec[1], 2) + pow(vec[2], 2));
}


x86 assembly (clang, -O0):
<findNorm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    $0x2,%edi
call   1040 <pow@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    $0x2,%edi
call   1040 <pow@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    $0x2,%edi
call   1040 <pow@plt>
mov    -0x10(%rbp),%rdi
add    %rax,%rdi
call   1030 <sqrtf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findNorm>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
movss  (%rdi),%xmm0
mov    $0x2,%edi
call   1040 <pow@plt>
mov    %rax,%rbx
movss  0x4(%r14),%xmm0
mov    $0x2,%edi
call   1040 <pow@plt>
add    %rax,%rbx
movss  0x8(%r14),%xmm0
mov    $0x2,%edi
call   1040 <pow@plt>
add    %rax,%rbx
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @findNorm(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = call i64 @pow(float %5, i32 2)
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 1
%9 = load float, float* %8
%10 = call i64 @pow(float %9, i32 2)
%11 = add nsw i64 %6, %10
%12 = load float*, float** %2
%13 = getelementptr inbounds float, float* %12, i64 2
%14 = load float, float* %13
%15 = call i64 @pow(float %14, i32 2)
%16 = add nsw i64 %11, %15
%17 = call float @sqrtf(i64 %16)
ret float %17
}

LLVM IR (-O2):
define float @findNorm(float* nocapture %0) {
%2 = load float, float* %0
%3 = tail call i64 @pow(float %2, i32 2)
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = tail call i64 @pow(float %5, i32 2)
%7 = add nsw i64 %6, %3
%8 = getelementptr inbounds float, float* %0, i64 2
%9 = load float, float* %8
%10 = tail call i64 @pow(float %9, i32 2)
%11 = add nsw i64 %7, %10
%12 = tail call float @sqrtf(i64 %11)
ret float %12
}
void gdb_b() {}


x86 assembly (clang, -O0):
<gdb_b>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdb_b>:
ret

LLVM IR (-O0):
define void @gdb_b() {
ret void
}

LLVM IR (-O2):
define void @gdb_b() {
ret void
}
/* Variables and functions */
int dlclose(void *);
int Exynos_OSAL_dlclose(void *handle) { return dlclose(handle); }


x86 assembly (clang, -O0):
<Exynos_OSAL_dlclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dlclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Exynos_OSAL_dlclose>:
jmp    1030 <dlclose@plt>

LLVM IR (-O0):
define i32 @Exynos_OSAL_dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dlclose(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @Exynos_OSAL_dlclose(i8* %0) {
%2 = tail call i32 @dlclose(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() {
  printf("Hello World!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void cvmx_wqe_set_port(struct cvmx_wqe *work, int port) {}


x86 assembly (clang, -O0):
<cvmx_wqe_set_port>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_wqe_set_port>:
ret

LLVM IR (-O0):
%struct.cvmx_wqe = type opaque
define void @cvmx_wqe_set_port(%struct.cvmx_wqe* %0, i32 %1) {
%3 = alloca %struct.cvmx_wqe*
%4 = alloca i32
store %struct.cvmx_wqe* %0, %struct.cvmx_wqe** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.cvmx_wqe = type opaque
define void @cvmx_wqe_set_port(%struct.cvmx_wqe* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int fgetc(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
int simple_read(void) { return fgetc(stdin); }


x86 assembly (clang, -O0):
<simple_read>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <fgetc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_read>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fgetc@plt>

LLVM IR (-O0):
@stdin = global i32 0
define i32 @simple_read() {
%1 = load i32, i32* @stdin
%2 = call i32 @fgetc(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @simple_read() {
%1 = load i32, i32* @stdin
%2 = tail call i32 @fgetc(i32 %1)
ret i32 %2
}
void XtChangeManagedSet() {}


x86 assembly (clang, -O0):
<XtChangeManagedSet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtChangeManagedSet>:
ret

LLVM IR (-O0):
define void @XtChangeManagedSet() {
ret void
}

LLVM IR (-O2):
define void @XtChangeManagedSet() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ finish_func();
void _gfks_call_finish() { finish_func(); }


x86 assembly (clang, -O0):
<_gfks_call_finish>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <finish_func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gfks_call_finish>:
xor    %eax,%eax
jmp    1030 <finish_func@plt>

LLVM IR (-O0):
define void @_gfks_call_finish() {
%1 = call i32 (...) @finish_func()
ret void
}

LLVM IR (-O2):
define void @_gfks_call_finish() {
%1 = tail call i32 (...) @finish_func()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ emit_addimm(int, int, int);
int /*<<< orphan*/ emit_cmovle_reg(int, int);
int /*<<< orphan*/ emit_cmp(int, int);
int /*<<< orphan*/ emit_orimm(int, int, int);
void emit_cmpgt(int s1, int s2, int sr, int temp) {
  assert(temp >= 0);
  emit_orimm(sr, 1, sr);
  emit_addimm(sr, -1, temp);
  emit_cmp(s2, s1);
  emit_cmovle_reg(temp, sr);
}


x86 assembly (clang, -O0):
<emit_cmpgt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1070 <emit_orimm@plt>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%edx
mov    $0xffffffff,%esi
call   1060 <emit_addimm@plt>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <emit_cmp@plt>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <emit_cmovle_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_cmpgt>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%r15d
mov    %ecx,%edi
not    %edi
shr    $0x1f,%edi
call   1050 <assert@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    %ebx,%edx
call   1070 <emit_orimm@plt>
mov    %ebx,%edi
mov    $0xffffffff,%esi
mov    %ebp,%edx
call   1060 <emit_addimm@plt>
mov    %r14d,%edi
mov    %r15d,%esi
call   1030 <emit_cmp@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <emit_cmovle_reg@plt>

LLVM IR (-O0):
define void @emit_cmpgt(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp sge i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %7
%14 = load i32, i32* %7
%15 = call i32 @emit_orimm(i32 %13, i32 1, i32 %14)
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = call i32 @emit_addimm(i32 %16, i32 -1, i32 %17)
%19 = load i32, i32* %6
%20 = load i32, i32* %5
%21 = call i32 @emit_cmp(i32 %19, i32 %20)
%22 = load i32, i32* %8
%23 = load i32, i32* %7
%24 = call i32 @emit_cmovle_reg(i32 %22, i32 %23)
ret void
}

LLVM IR (-O2):
define void @emit_cmpgt(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = xor i32 %3, -1
%6 = lshr i32 %5, 31
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 @emit_orimm(i32 %2, i32 1, i32 %2)
%9 = tail call i32 @emit_addimm(i32 %2, i32 -1, i32 %3)
%10 = tail call i32 @emit_cmp(i32 %1, i32 %0)
%11 = tail call i32 @emit_cmovle_reg(i32 %3, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ __infer_nondet_int();
wint_t putwchar(wchar_t c) { return __infer_nondet_int(); }


x86 assembly (clang, -O0):
<putwchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putwchar>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @putwchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @__infer_nondet_int()
ret i32 %3
}

LLVM IR (-O2):
define i32 @putwchar(i32 %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
ret i32 %2
}
/* Variables and functions */
float fOpIntersectionChamfer(float, float, float);
float fOpDifferenceChamfer(float a, float b, float r) {
  return fOpIntersectionChamfer(a, -b, r);
}


x86 assembly (clang, -O0):
<fOpDifferenceChamfer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <fOpIntersectionChamfer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fOpDifferenceChamfer>:
xorps  0xee9(%rip),%xmm1
jmp    1030 <fOpIntersectionChamfer@plt>

LLVM IR (-O0):
define float @fOpDifferenceChamfer(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fneg float %8
%10 = load float, float* %6
%11 = call float @fOpIntersectionChamfer(float %7, float %9, float %10)
ret float %11
}

LLVM IR (-O2):
define float @fOpDifferenceChamfer(float %0, float %1, float %2) {
%4 = fneg float %1
%5 = tail call float @fOpIntersectionChamfer(float %0, float %4, float %2)
ret float %5
}
void db5500_prcmu_early_init(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @db5500_prcmu_early_init() {
ret void
}

LLVM IR (-O2):
define void @db5500_prcmu_early_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _irc_queue_init(int);
int client(int, int, char *, int, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
           int /*<<< orphan*/ *);
int irc_dcc(int sid, char *addr, int port) {
  _irc_queue_init(-1);
  return client(sid, 2, addr, port, NULL, NULL, NULL);
}


x86 assembly (clang, -O0):
<irc_dcc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%edi
call   1030 <_irc_queue_init@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x2,%esi
xor    %eax,%eax
mov    %eax,%r9d
mov    %r9,%r8
movq   $0x0,(%rsp)
call   1040 <client@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_dcc>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %edi,%ebp
mov    $0xffffffff,%edi
call   1030 <_irc_queue_init@plt>
movq   $0x0,(%rsp)
mov    %ebp,%edi
mov    $0x2,%esi
mov    %rbx,%rdx
mov    %r14d,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1040 <client@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @irc_dcc(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 @_irc_queue_init(i32 -1)
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @client(i32 %8, i32 2, i8* %9, i32 %10, i32* null, i32* null, i32* null)
ret i32 %11
}

LLVM IR (-O2):
define i32 @irc_dcc(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @_irc_queue_init(i32 -1)
%5 = tail call i32 @client(i32 %0, i32 2, i8* %1, i32 %2, i32* null, i32* null, i32* null)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ foo();
void test5(int e) {
  if ((e >> (32 - 1)) & 64)
    foo();
}


x86 assembly (clang, -O0):
<test5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     1134 <test5+0x24>
mov    $0x0,%al
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test5>:
test   %edi,%edi
js     1115 <test5+0x5>
ret
xor    %eax,%eax
jmp    1030 <foo@plt>

LLVM IR (-O0):
define void @test5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 31
%5 = and i32 %4, 64
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @foo()
br label %9
9: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @test5(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @foo()
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getcwd(char *, int);
int /*<<< orphan*/ puts(char *);
void printPath() {
  char path[200];
  getcwd(path, 200);
  puts(path);
}


x86 assembly (clang, -O0):
<printPath>:
push   %rbp
mov    %rsp,%rbp
sub    $0xd0,%rsp
lea    -0xd0(%rbp),%rdi
mov    $0xc8,%esi
call   1040 <getcwd@plt>
lea    -0xd0(%rbp),%rdi
call   1030 <puts@plt>
add    $0xd0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printPath>:
push   %rbx
sub    $0xd0,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xc8,%esi
call   1040 <getcwd@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
add    $0xd0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @printPath() {
%1 = alloca [200 x i8]
%2 = getelementptr inbounds [200 x i8], [200 x i8]* %1, i64 0, i64 0
%3 = call i32 @getcwd(i8* %2, i32 200)
%4 = getelementptr inbounds [200 x i8], [200 x i8]* %1, i64 0, i64 0
%5 = call i32 @puts(i8* %4)
ret void
}

LLVM IR (-O2):
define void @printPath() {
%1 = alloca [200 x i8]
%2 = getelementptr inbounds [200 x i8], [200 x i8]* %1, i64 0, i64 0
%3 = call i32 @getcwd(i8* %2, i32 200)
%4 = call i32 @puts(i8* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;
struct ts_nit {
  int dummy;
};

/* Variables and functions */
int ts_nit_add_frequency_list_descriptor(struct ts_nit *, int /*<<< orphan*/,
                                         int /*<<< orphan*/, int,
                                         int /*<<< orphan*/ *,
                                         int /*<<< orphan*/);
int ts_nit_add_frequency_list_descriptor_satellite(struct ts_nit *nit,
                                                   uint16_t ts_id,
                                                   uint16_t org_net_id,
                                                   uint32_t *freqs,
                                                   uint8_t num_freqs) {
  return ts_nit_add_frequency_list_descriptor(nit, ts_id, org_net_id, 1, freqs,
                                              num_freqs);
}


x86 assembly (clang, -O0):
<ts_nit_add_frequency_list_descriptor_satellite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    $0x1,%ecx
call   1030 <ts_nit_add_frequency_list_descriptor@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_nit_add_frequency_list_descriptor_satellite>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    $0x1,%ecx
jmp    1030 <ts_nit_add_frequency_list_descriptor@plt>

LLVM IR (-O0):
%struct.ts_nit = type { i32 }
define i32 @ts_nit_add_frequency_list_descriptor_satellite(%struct.ts_nit* %0, i32 %1, i32 %2, i32* %3, i32 %4) {
%6 = alloca %struct.ts_nit*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32
store %struct.ts_nit* %0, %struct.ts_nit** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store i32 %4, i32* %10
%11 = load %struct.ts_nit*, %struct.ts_nit** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32*, i32** %9
%15 = load i32, i32* %10
%16 = call i32 @ts_nit_add_frequency_list_descriptor(%struct.ts_nit* %11, i32 %12, i32 %13, i32 1, i32* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.ts_nit = type { i32 }
define i32 @ts_nit_add_frequency_list_descriptor_satellite(%struct.ts_nit* %0, i32 %1, i32 %2, i32* %3, i32 %4) {
%6 = tail call i32 @ts_nit_add_frequency_list_descriptor(%struct.ts_nit* %0, i32 %1, i32 %2, i32 1, i32* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void printString(char *s) { printf("%s\n", s); }


x86 assembly (clang, -O0):
<printString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printString>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @printString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @printString(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __io_putchar(int /*<<< orphan*/);
size_t _write(int handle, const unsigned char *buffer, size_t size) {
  int data_idx;
  for (data_idx = 0; data_idx < size; data_idx++) {
    __io_putchar(*buffer++);
  }
  return size;
}


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    115d <_write+0x4d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%edi
call   1030 <__io_putchar@plt>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    112a <_write+0x1a>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
test   %rdx,%rdx
je     1143 <_write+0x33>
mov    %rsi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%r14,%rbx,1),%edi
call   1030 <__io_putchar@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <_write+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i32 0, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = sext i32 %9 to i64
%11 = load i64, i64* %6
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %22
13: ; preds = %8
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
%16 = load i8, i8* %14
%17 = zext i8 %16 to i32
%18 = call i32 @__io_putchar(i32 %17)
br label %19
19: ; preds = %13
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
%23 = load i64, i64* %6
ret i64 %23
}

LLVM IR (-O2):
define i64 @_write(i32 %0, i8* nocapture %1, i64 returned %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %14, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %12, %5 ], [ 0, %3 ]
%7 = phi i8* [ %8, %5 ], [ %1, %3 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %7
%10 = zext i8 %9 to i32
%11 = tail call i32 @__io_putchar(i32 %10)
%12 = add nuw i64 %6, 1
%13 = icmp eq i64 %12, %2
br i1 %13, label %14, label %5
14: ; preds = %5, %3
ret i64 %2
}
/* Type definitions */
struct Z {
  int dummy;
};
struct S {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ h3(struct Z *);
void f3(struct S *s) { h3((struct Z *)s); }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <h3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
jmp    1030 <h3@plt>

LLVM IR (-O0):
%struct.S = type { i32 }
%struct.Z = type { i32 }
define void @f3(%struct.S* %0) {
%2 = alloca %struct.S*
store %struct.S* %0, %struct.S** %2
%3 = load %struct.S*, %struct.S** %2
%4 = bitcast %struct.S* %3 to %struct.Z*
%5 = call i32 @h3(%struct.Z* %4)
ret void
}

LLVM IR (-O2):
%struct.S = type { i32 }
%struct.Z = type { i32 }
define void @f3(%struct.S* %0) {
%2 = bitcast %struct.S* %0 to %struct.Z*
%3 = tail call i32 @h3(%struct.Z* %2)
ret void
}
/* Variables and functions */
int foo2b();
int foo1b(void) { return foo2b(); }


x86 assembly (clang, -O0):
<foo1b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo2b@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1b>:
xor    %eax,%eax
jmp    1030 <foo2b@plt>

LLVM IR (-O0):
define i32 @foo1b() {
%1 = call i32 (...) @foo2b()
ret i32 %1
}

LLVM IR (-O2):
define i32 @foo1b() {
%1 = tail call i32 (...) @foo2b()
ret i32 %1
}
float deadband(float value, float deadband) {
  if (value >= -deadband && value <= deadband) {
    return 0;
  }
  return value;
}


x86 assembly (clang, -O0):
<deadband>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
ucomiss %xmm1,%xmm0
jb     114e <deadband+0x4e>
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     114e <deadband+0x4e>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1158 <deadband+0x58>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<deadband>:
movaps %xmm0,%xmm2
cmpnless %xmm1,%xmm2
xorps  0xef1(%rip),%xmm1
andps  %xmm0,%xmm2
cmpnless %xmm0,%xmm1
andps  %xmm1,%xmm0
andnps %xmm2,%xmm1
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @deadband(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fneg float %7
%9 = fcmp oge float %6, %8
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load float, float* %4
%12 = load float, float* %5
%13 = fcmp ole float %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store float 0.000000e+00, float* %3
br label %17
15: ; preds = %10, %2
%16 = load float, float* %4
store float %16, float* %3
br label %17
17: ; preds = %15, %14
%18 = load float, float* %3
ret float %18
}

LLVM IR (-O2):
define float @deadband(float %0, float %1) {
%3 = fneg float %1
%4 = fcmp ugt float %3, %0
%5 = fcmp ugt float %0, %1
%6 = or i1 %4, %5
%7 = select i1 %6, float %0, float 0.000000e+00
ret float %7
}
/* Variables and functions */
double GetHumRatioFromVapPres(double, double);
double GetSatVapPres(double);
double GetHumRatioFromTDewPoint(double TDewPoint, double Pressure) {
  double VapPres;
  VapPres = GetSatVapPres(TDewPoint);
  return GetHumRatioFromVapPres(VapPres, Pressure);
}


x86 assembly (clang, -O0):
<GetHumRatioFromTDewPoint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <GetSatVapPres@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <GetHumRatioFromVapPres@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetHumRatioFromTDewPoint>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <GetSatVapPres@plt>
movsd  (%rsp),%xmm1
pop    %rax
jmp    1040 <GetHumRatioFromVapPres@plt>

LLVM IR (-O0):
define double @GetHumRatioFromTDewPoint(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = call double @GetSatVapPres(double %6)
store double %7, double* %5
%8 = load double, double* %5
%9 = load double, double* %4
%10 = call double @GetHumRatioFromVapPres(double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @GetHumRatioFromTDewPoint(double %0, double %1) {
%3 = tail call double @GetSatVapPres(double %0)
%4 = tail call double @GetHumRatioFromVapPres(double %3, double %1)
ret double %4
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t csum_fold(uint32_t sum) {
  sum = (sum & 0xffff) + (sum >> 16);
  sum = (sum & 0xffff) + (sum >> 16);
  return (uint16_t)sum;
}


x86 assembly (clang, -O0):
<csum_fold>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<csum_fold>:
movzwl %di,%eax
sar    $0x10,%edi
add    %edi,%eax
movzwl %ax,%ecx
sar    $0x10,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @csum_fold(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65535
%5 = load i32, i32* %2
%6 = ashr i32 %5, 16
%7 = add nsw i32 %4, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = and i32 %8, 65535
%10 = load i32, i32* %2
%11 = ashr i32 %10, 16
%12 = add nsw i32 %9, %11
store i32 %12, i32* %2
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @csum_fold(i32 %0) {
%2 = and i32 %0, 65535
%3 = ashr i32 %0, 16
%4 = add nsw i32 %2, %3
%5 = and i32 %4, 65535
%6 = ashr i32 %4, 16
%7 = add nsw i32 %5, %6
ret i32 %7
}