xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/ *);
int get_int_line(FILE *in_file) {
  char line[6];
  fgets(line, sizeof line, in_file);
  return atoi(line);
}


x86 assembly (clang, -O0):
<get_int_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xe(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x6,%esi
call   1030 <fgets@plt>
lea    -0xe(%rbp),%rdi
call   1040 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_int_line>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rdx
lea    0xa(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x6,%esi
call   1030 <fgets@plt>
mov    %rbx,%rdi
call   1040 <atoi@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_int_line(i32* %0) {
%2 = alloca i32*
%3 = alloca [6 x i8]
store i32* %0, i32** %2
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
%5 = load i32*, i32** %2
%6 = call i32 @fgets(i8* %4, i32 6, i32* %5)
%7 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
%8 = call i32 @atoi(i8* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_int_line(i32* nocapture %0) {
%2 = alloca [6 x i8]
%3 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%4 = call i32 @fgets(i8* %3, i32 6, i32* %0)
%5 = call i32 @atoi(i8* %3)
ret i32 %5
}
/* Variables and functions */
scalar_t__ numeric(unsigned char const *, int const, int /*<<< orphan*/, int,
                   int, int *, int *, char *);
int n1__8(const unsigned char *data, const int data_len, int *p_err_no,
          int *p_err_posn, char err_msg[50]) {
  return data_len >= 1 && data_len <= 8 &&
         numeric(data, data_len, 0, 1, 8, p_err_no, p_err_posn, err_msg);
}


x86 assembly (clang, -O0):
<n1__8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0xc(%rbp)
mov    %al,-0x29(%rbp)
jl     1181 <n1__8+0x71>
xor    %eax,%eax
cmpl   $0x8,-0xc(%rbp)
mov    %al,-0x29(%rbp)
jg     1181 <n1__8+0x71>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%r9
mov    -0x20(%rbp),%r10
mov    -0x28(%rbp),%rax
xor    %edx,%edx
mov    $0x1,%ecx
mov    $0x8,%r8d
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <numeric@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x29(%rbp)
mov    -0x29(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<n1__8>:
mov    %rcx,%r10
lea    -0x1(%rsi),%ecx
xor    %eax,%eax
cmp    $0x7,%ecx
ja     114d <n1__8+0x3d>
push   %rax
mov    %r8,%r11
mov    %rdx,%r9
xor    %edx,%edx
mov    $0x1,%ecx
mov    $0x8,%r8d
push   %r11
push   %r10
call   1030 <numeric@plt>
add    $0x10,%rsp
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @n1__8(i8* %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i8*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i8* %4, i8** %10
%11 = load i32, i32* %7
%12 = icmp sge i32 %11, 1
br i1 %12, label %13, label %24
13: ; preds = %5
%14 = load i32, i32* %7
%15 = icmp sle i32 %14, 8
br i1 %15, label %16, label %24
16: ; preds = %13
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = load i32*, i32** %8
%20 = load i32*, i32** %9
%21 = load i8*, i8** %10
%22 = call i64 @numeric(i8* %17, i32 %18, i32 0, i32 1, i32 8, i32* %19, i32* %20, i8* %21)
%23 = icmp ne i64 %22, 0
br label %24
24: ; preds = %16, %13, %5
%25 = phi i1 [ false, %13 ], [ false, %5 ], [ %23, %16 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @n1__8(i8* %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = add i32 %1, -1
%7 = icmp ult i32 %6, 8
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @numeric(i8* %0, i32 %1, i32 0, i32 1, i32 8, i32* %2, i32* %3, i8* %4)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ 0, %5 ], [ %11, %8 ]
ret i32 %13
}
int sign(int b) {
  if (b > 0) {
    return 1;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    111d <sign+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <sign+0x24>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
xor    %eax,%eax
test   %edi,%edi
setg   %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sign(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @sign(i32 %0) {
%2 = icmp slt i32 %0, 1
%3 = select i1 %2, i32 -1, i32 1
ret i32 %3
}
int igual(int *l1, int *l2) {
  int j;
  for (j = 0; j < 4; j++)
    if (l1[j] != l2[j])
      return (0);
  return (1);
}


x86 assembly (clang, -O0):
<igual>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x4,-0x1c(%rbp)
jge    1158 <igual+0x58>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x18(%rbp),%rcx
movslq -0x1c(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
je     1145 <igual+0x45>
movl   $0x0,-0x4(%rbp)
jmp    115f <igual+0x5f>
jmp    114a <igual+0x4a>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1113 <igual+0x13>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<igual>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
jne    1123 <igual+0x23>
mov    0x4(%rdi),%ecx
cmp    0x4(%rsi),%ecx
jne    1123 <igual+0x23>
mov    0x8(%rdi),%ecx
cmp    0x8(%rsi),%ecx
jne    1123 <igual+0x23>
mov    0xc(%rdi),%ecx
xor    %eax,%eax
cmp    0xc(%rsi),%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @igual(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 0, i32* %6
br label %7
7: ; preds = %24, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 4
br i1 %9, label %10, label %27
10: ; preds = %7
%11 = load i32*, i32** %4
%12 = load i32, i32* %6
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = load i32*, i32** %5
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
%20 = load i32, i32* %19
%21 = icmp ne i32 %15, %20
br i1 %21, label %22, label %23
22: ; preds = %10
store i32 0, i32* %3
br label %28
23: ; preds = %10
br label %24
24: ; preds = %23
%25 = load i32, i32* %6
%26 = add nsw i32 %25, 1
store i32 %26, i32* %6
br label %7
27: ; preds = %7
store i32 1, i32* %3
br label %28
28: ; preds = %27, %22
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @igual(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %25
6: ; preds = %2
%7 = getelementptr inbounds i32, i32* %0, i64 1
%8 = load i32, i32* %7
%9 = getelementptr inbounds i32, i32* %1, i64 1
%10 = load i32, i32* %9
%11 = icmp eq i32 %8, %10
br i1 %11, label %12, label %25
12: ; preds = %6
%13 = getelementptr inbounds i32, i32* %0, i64 2
%14 = load i32, i32* %13
%15 = getelementptr inbounds i32, i32* %1, i64 2
%16 = load i32, i32* %15
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %25
18: ; preds = %12
%19 = getelementptr inbounds i32, i32* %0, i64 3
%20 = load i32, i32* %19
%21 = getelementptr inbounds i32, i32* %1, i64 3
%22 = load i32, i32* %21
%23 = icmp eq i32 %20, %22
%24 = zext i1 %23 to i32
br label %25
25: ; preds = %18, %12, %6, %2
%26 = phi i32 [ 0, %2 ], [ 0, %6 ], [ 0, %12 ], [ %24, %18 ]
ret i32 %26
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
unsigned int __VERIFIER_nondet_uint();
unsigned int mp_add(unsigned int, unsigned int);
int main() {
  unsigned int a, b, r;
  a = __VERIFIER_nondet_uint();
  b = __VERIFIER_nondet_uint();
  r = mp_add(a, b);
  __VERIFIER_assert(r == a + b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <__VERIFIER_nondet_uint@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <__VERIFIER_nondet_uint@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <mp_add@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    -0xc(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <__VERIFIER_assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <__VERIFIER_nondet_uint@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <__VERIFIER_nondet_uint@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <mp_add@plt>
add    %ebx,%ebp
xor    %edi,%edi
cmp    %ebp,%eax
sete   %dil
call   1040 <__VERIFIER_assert@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_uint()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_uint()
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = call i32 @mp_add(i32 %7, i32 %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = add i32 %11, %12
%14 = icmp eq i32 %10, %13
%15 = zext i1 %14 to i32
%16 = call i32 @__VERIFIER_assert(i32 %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_uint()
%2 = tail call i32 (...) @__VERIFIER_nondet_uint()
%3 = tail call i32 @mp_add(i32 %1, i32 %2)
%4 = add i32 %2, %1
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @__VERIFIER_assert(i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ccvt_yuyv(int, int, unsigned char const *, unsigned char *,
                             int);
void ccvt_yuyv_rgb32(int width, int height, const void *src, void *dst) {
  ccvt_yuyv(width, height, (const unsigned char *)src, (unsigned char *)dst, 3);
}


x86 assembly (clang, -O0):
<ccvt_yuyv_rgb32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x3,%r8d
call   1030 <ccvt_yuyv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccvt_yuyv_rgb32>:
mov    $0x3,%r8d
jmp    1030 <ccvt_yuyv@plt>

LLVM IR (-O0):
define void @ccvt_yuyv_rgb32(i32 %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @ccvt_yuyv(i32 %9, i32 %10, i8* %11, i8* %12, i32 3)
ret void
}

LLVM IR (-O2):
define void @ccvt_yuyv_rgb32(i32 %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i32 @ccvt_yuyv(i32 %0, i32 %1, i8* %2, i8* %3, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
int *malloc(int);
void f6() {
  int *p = malloc(10);
  if (!p)
    return;
  else
    free(p);
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1146 <f6+0x26>
jmp    114f <f6+0x2f>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
push   %rax
mov    $0xa,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1139 <f6+0x19>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @f6() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 10)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = icmp ne i32* %3, null
br i1 %4, label %6, label %5
5: ; preds = %0
br label %9
6: ; preds = %0
%7 = load i32*, i32** %1
%8 = call i32 @free(i32* %7)
br label %9
9: ; preds = %5, %6
ret void
}

LLVM IR (-O2):
define void @f6() {
%1 = tail call i32* @malloc(i32 10)
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @free(i32* %1)
br label %5
5: ; preds = %0, %3
ret void
}
int g(unsigned a, unsigned b) {
  a %= b;
  return a < b;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
xor    %edx,%edx
div    %ecx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = urem i32 %6, %5
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1) {
ret i32 1
}
int test_imm_3Dint8_reg(signed char val) {
  return ((val) & (0x3D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Dint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x3d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Dint8_reg>:
test   $0x3d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Dint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 61
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Dint8_reg(i8 signext %0) {
%2 = and i8 %0, 61
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int print_a_message(const char *msg) {
  printf("A STRING: %s\n ", msg);
  return 0;
}


x86 assembly (clang, -O0):
<print_a_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_a_message>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"A STRING: %s\0A \00"
define i32 @print_a_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"A STRING: %s\0A \00"
define i32 @print_a_message(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
void pic_disable_interrupts(void) {}


x86 assembly (clang, -O0):
<pic_disable_interrupts>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_disable_interrupts>:
ret

LLVM IR (-O0):
define void @pic_disable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @pic_disable_interrupts() {
ret void
}
/* Variables and functions */
int rom_present(char *);
int s3_phoenix_vision864_available(void) {
  return rom_present(L"roms/video/s3/86c864p.bin");
}


x86 assembly (clang, -O0):
<s3_phoenix_vision864_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3_phoenix_vision864_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [26 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 47, i32 56, i32 54, i32 99, i32 56, i32 54, i32 52, i32 112, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_phoenix_vision864_available() {
%1 = call i32 @rom_present(i8* bitcast ([26 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [26 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 47, i32 56, i32 54, i32 99, i32 56, i32 54, i32 52, i32 112, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_phoenix_vision864_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([26 x i32]* @.str to i8*))
ret i32 %1
}
int cycle_is_check_spr_crunch(unsigned int flags) {
  return (flags & 0x0e000000) == 0x08000000;
}


x86 assembly (clang, -O0):
<cycle_is_check_spr_crunch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xe000000,%eax
cmp    $0x8000000,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cycle_is_check_spr_crunch>:
and    $0xe000000,%edi
xor    %eax,%eax
cmp    $0x8000000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @cycle_is_check_spr_crunch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 234881024
%5 = icmp eq i32 %4, 134217728
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @cycle_is_check_spr_crunch(i32 %0) {
%2 = and i32 %0, 234881024
%3 = icmp eq i32 %2, 134217728
%4 = zext i1 %3 to i32
ret i32 %4
}
void USBHostEndpointDataAck(unsigned long ulBase, unsigned long ulEndpoint) {
  ;

  ;
  if (ulEndpoint == 0x00000000) {
    (*((volatile unsigned char *)(ulBase + 0x00000102))) &= ~0x00000001;
  } else {
    (*((volatile unsigned char *)(ulBase + 0x00000116 +
                                  (ulEndpoint - 0x10)))) &= ~(0x00000001);
  }
}


x86 assembly (clang, -O0):
<USBHostEndpointDataAck>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1132 <USBHostEndpointDataAck+0x32>
mov    -0x8(%rbp),%rax
mov    0x102(%rax),%cl
movzbl %cl,%ecx
and    $0xfffffffe,%ecx
mov    %cl,0x102(%rax)
jmp    1151 <USBHostEndpointDataAck+0x51>
mov    -0x8(%rbp),%rax
add    $0x116,%rax
mov    -0x10(%rbp),%rcx
sub    $0x10,%rcx
add    %rcx,%rax
mov    (%rax),%cl
movzbl %cl,%ecx
and    $0xfffffffe,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostEndpointDataAck>:
lea    0x102(%rdi),%rax
test   %rsi,%rsi
lea    0x106(%rdi,%rsi,1),%rcx
cmove  %rax,%rcx
andb   $0xfe,(%rcx)
ret

LLVM IR (-O0):
define void @USBHostEndpointDataAck(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i64, i64* %3
%9 = add i64 %8, 258
%10 = inttoptr i64 %9 to i8*
%11 = load volatile i8, i8* %10
%12 = zext i8 %11 to i32
%13 = and i32 %12, -2
%14 = trunc i32 %13 to i8
store volatile i8 %14, i8* %10
br label %26
15: ; preds = %2
%16 = load i64, i64* %3
%17 = add i64 %16, 278
%18 = load i64, i64* %4
%19 = sub i64 %18, 16
%20 = add i64 %17, %19
%21 = inttoptr i64 %20 to i8*
%22 = load volatile i8, i8* %21
%23 = zext i8 %22 to i32
%24 = and i32 %23, -2
%25 = trunc i32 %24 to i8
store volatile i8 %25, i8* %21
br label %26
26: ; preds = %15, %7
ret void
}

LLVM IR (-O2):
define void @USBHostEndpointDataAck(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
%4 = add i64 %0, 262
%5 = add i64 %4, %1
%6 = add i64 %0, 258
%7 = select i1 %3, i64 %6, i64 %5
%8 = inttoptr i64 %7 to i8*
%9 = load volatile i8, i8* %8
%10 = and i8 %9, -2
store volatile i8 %10, i8* %8
ret void
}
/* Type definitions */
struct vector {
  int dummy;
};
struct matrix {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat_rotate_copy(struct vector *, struct matrix const *,
                                   struct vector *);
void mat_rotate(struct vector *v, const struct matrix *m) {
  mat_rotate_copy(v, m, v);
}


x86 assembly (clang, -O0):
<mat_rotate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdx
call   1030 <mat_rotate_copy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_rotate>:
mov    %rdi,%rdx
jmp    1030 <mat_rotate_copy@plt>

LLVM IR (-O0):
%struct.vector = type { i32 }
%struct.matrix = type { i32 }
define void @mat_rotate(%struct.vector* %0, %struct.matrix* %1) {
%3 = alloca %struct.vector*
%4 = alloca %struct.matrix*
store %struct.vector* %0, %struct.vector** %3
store %struct.matrix* %1, %struct.matrix** %4
%5 = load %struct.vector*, %struct.vector** %3
%6 = load %struct.matrix*, %struct.matrix** %4
%7 = load %struct.vector*, %struct.vector** %3
%8 = call i32 @mat_rotate_copy(%struct.vector* %5, %struct.matrix* %6, %struct.vector* %7)
ret void
}

LLVM IR (-O2):
%struct.vector = type { i32 }
%struct.matrix = type { i32 }
define void @mat_rotate(%struct.vector* %0, %struct.matrix* %1) {
%3 = tail call i32 @mat_rotate_copy(%struct.vector* %0, %struct.matrix* %1, %struct.vector* %0)
ret void
}
void glmGenerateIdentityQuaterniond(double q[4]) {
  q[0] = 1;
  q[1] = 0;
  q[2] = 0;
  q[3] = 0;
}


x86 assembly (clang, -O0):
<glmGenerateIdentityQuaterniond>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x10(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmGenerateIdentityQuaterniond>:
movabs $0x3ff0000000000000,%rax
mov    %rax,(%rdi)
xorps  %xmm0,%xmm0
movups %xmm0,0x8(%rdi)
movq   $0x0,0x18(%rdi)
ret

LLVM IR (-O0):
define void @glmGenerateIdentityQuaterniond(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
store double 1.000000e+00, double* %4
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 1
store double 0.000000e+00, double* %6
%7 = load double*, double** %2
%8 = getelementptr inbounds double, double* %7, i64 2
store double 0.000000e+00, double* %8
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 3
store double 0.000000e+00, double* %10
ret void
}

LLVM IR (-O2):
define void @glmGenerateIdentityQuaterniond(double* nocapture writeonly %0) {
store double 1.000000e+00, double* %0
%2 = getelementptr inbounds double, double* %0, i64 1
%3 = bitcast double* %2 to i8*
ret void
}
/* Type definitions */
struct timespec {
  unsigned int tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, struct timespec *);
unsigned sleep(unsigned seconds) {
  struct timespec rqtp;
  struct timespec rmtp;
  rqtp.tv_sec = seconds;
  rqtp.tv_nsec = 0;
  nanosleep(&rqtp, &rmtp);
  return rmtp.tv_sec;
}


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
movq   $0x0,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1030 <nanosleep@plt>
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
sub    $0x28,%rsp
mov    %edi,0x8(%rsp)
movq   $0x0,0x10(%rsp)
lea    0x8(%rsp),%rdi
lea    0x18(%rsp),%rsi
call   1030 <nanosleep@plt>
mov    0x18(%rsp),%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define i32 @sleep(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 0, i64* %7
%8 = call i32 @nanosleep(%struct.timespec* %3, %struct.timespec* %4)
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %4, i32 0, i32 0
%10 = load i32, i32* %9
ret i32 %10
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define i32 @sleep(i32 %0) {
%2 = alloca %struct.timespec
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %2 to i8*
%5 = bitcast %struct.timespec* %3 to i8*
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %0, i32* %6
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 0, i64* %7
%8 = call i32 @nanosleep(%struct.timespec* %2, %struct.timespec* %3)
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i64 0, i32 0
%10 = load i32, i32* %9
ret i32 %10
}
void update_pending(struct state *os, struct state *ns) {}


x86 assembly (clang, -O0):
<update_pending>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_pending>:
ret

LLVM IR (-O0):
%struct.state = type opaque
define void @update_pending(%struct.state* %0, %struct.state* %1) {
%3 = alloca %struct.state*
%4 = alloca %struct.state*
store %struct.state* %0, %struct.state** %3
store %struct.state* %1, %struct.state** %4
ret void
}

LLVM IR (-O2):
%struct.state = type opaque
define void @update_pending(%struct.state* nocapture %0, %struct.state* nocapture %1) {
ret void
}
int cpu_state_build(struct cpu_state_struct *cpuss, void *(*start)(void *),
                    void *args, void *stack, void (*end)()) {
  return 0;
}


x86 assembly (clang, -O0):
<cpu_state_build>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_state_build>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cpu_state_struct = type opaque
define i32 @cpu_state_build(%struct.cpu_state_struct* %0, i8* (i8*)* %1, i8* %2, i8* %3, void (...)* %4) {
%6 = alloca %struct.cpu_state_struct*
%7 = alloca i8* (i8*)*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca void (...)*
store %struct.cpu_state_struct* %0, %struct.cpu_state_struct** %6
store i8* (i8*)* %1, i8* (i8*)** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store void (...)* %4, void (...)** %10
ret i32 0
}

LLVM IR (-O2):
%struct.cpu_state_struct = type opaque
define i32 @cpu_state_build(%struct.cpu_state_struct* nocapture readnone %0, i8* (i8*)* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, void (...)* nocapture readnone %4) {
ret i32 0
}
/* Variables and functions */
int *qux();
int f7(int x) {
  int *p = 0;
  if (0 == x)
    p = qux();
  if (0 == x)
    *p = 1;
  return x;
}


x86 assembly (clang, -O0):
<f7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1139 <f7+0x29>
mov    $0x0,%al
call   1030 <qux@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    114e <f7+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7>:
push   %rbx
mov    %edi,%ebx
test   %edi,%edi
jne    1124 <f7+0x14>
xor    %eax,%eax
call   1030 <qux@plt>
movl   $0x1,(%rax)
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @f7(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
store i32* null, i32** %3
%4 = load i32, i32* %2
%5 = icmp eq i32 0, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32* (...) @qux()
store i32* %7, i32** %3
br label %8
8: ; preds = %6, %1
%9 = load i32, i32* %2
%10 = icmp eq i32 0, %9
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = load i32*, i32** %3
store i32 1, i32* %12
br label %13
13: ; preds = %11, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @f7(i32 returned %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32* (...) @qux()
store i32 1, i32* %4
br label %5
5: ; preds = %1, %3
ret i32 %0
}
int chr_isdigit(const char c) { return (c >= '0') && (c <= '9'); }


x86 assembly (clang, -O0):
<chr_isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <chr_isdigit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chr_isdigit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @chr_isdigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @chr_isdigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int quittask1(void) {
  int endtask1;
  printf("\nWould you like to run again? Type 0 for no or 1 for yes: ");
  scanf("%d", &endtask1);
  return endtask1;
}


x86 assembly (clang, -O0):
<quittask1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xf00(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quittask1>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xf07(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [59 x i8] c"\0AWould you like to run again? Type 0 for no or 1 for yes: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @quittask1() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [59 x i8] c"\0AWould you like to run again? Type 0 for no or 1 for yes: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @quittask1() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
int main() {
  char a;
  char b;
  char c;
  a = 0xff;
  b = '\x02';
  c = (a * b) >> 1;
  printf("%X\n", (int)c);
  printf("%X\n", (unsigned int)c);
  printf("%X\n", (unsigned char)c);
  printf("%X\n", (unsigned int)(unsigned char)c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0xff,-0x1(%rbp)
movb   $0x2,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
imul   %ecx,%eax
sar    $0x1,%eax
mov    %al,-0x3(%rbp)
movsbl -0x3(%rbp),%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
movsbl -0x3(%rbp),%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
movzbl -0x3(%rbp),%esi
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
movzbl -0x3(%rbp),%esi
lea    0xe94(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xff,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xff,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%X\0A\00"
define i32 @main() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i8
store i8 -1, i8* %1
store i8 2, i8* %2
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = mul nsw i32 %5, %7
%9 = ashr i32 %8, 1
%10 = trunc i32 %9 to i8
store i8 %10, i8* %3
%11 = load i8, i8* %3
%12 = sext i8 %11 to i32
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %18)
%20 = load i8, i8* %3
%21 = zext i8 %20 to i32
%22 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %21)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%X\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 255)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 255)
ret i32 0
}
void fill_buffer() {}


x86 assembly (clang, -O0):
<fill_buffer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_buffer>:
ret

LLVM IR (-O0):
define void @fill_buffer() {
ret void
}

LLVM IR (-O2):
define void @fill_buffer() {
ret void
}
void hdmi4_cec_uninit(struct hdmi_core_data *core) {}


x86 assembly (clang, -O0):
<hdmi4_cec_uninit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdmi4_cec_uninit>:
ret

LLVM IR (-O0):
%struct.hdmi_core_data = type opaque
define void @hdmi4_cec_uninit(%struct.hdmi_core_data* %0) {
%2 = alloca %struct.hdmi_core_data*
store %struct.hdmi_core_data* %0, %struct.hdmi_core_data** %2
ret void
}

LLVM IR (-O2):
%struct.hdmi_core_data = type opaque
define void @hdmi4_cec_uninit(%struct.hdmi_core_data* nocapture %0) {
ret void
}
int test_imm_5Euint32_reg(unsigned int val) {
  return ((val) & (0x5E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Euint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x5e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Euint32_reg>:
test   $0x5e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Euint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 94
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Euint32_reg(i32 %0) {
%2 = and i32 %0, 94
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
void *__builtin_memmove(void *, void const *, size_t);
void *memmove(void *dest, void const *src, size_t cnt) {
  return __builtin_memmove(dest, src, cnt);
}


x86 assembly (clang, -O0):
<memmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memmove@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove>:
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define i8* @memmove(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @memmove(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %2, i1 false)
ret i8* %0
}
/* Variables and functions */
void *dlopen(char *, int);
void *xGetSharedLibrary(char *path, int mode) { return dlopen(path, mode); }


x86 assembly (clang, -O0):
<xGetSharedLibrary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <dlopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xGetSharedLibrary>:
jmp    1030 <dlopen@plt>

LLVM IR (-O0):
define i8* @xGetSharedLibrary(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @dlopen(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @xGetSharedLibrary(i8* %0, i32 %1) {
%3 = tail call i8* @dlopen(i8* %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ syscall(int, int, int /*<<< orphan*/);
int setpri(int pri) {
  syscall(3, pri, 0);
  return (1);
}


x86 assembly (clang, -O0):
<setpri>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x3,%edi
xor    %edx,%edx
call   1030 <syscall@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setpri>:
push   %rax
mov    %edi,%esi
mov    $0x3,%edi
xor    %edx,%edx
call   1030 <syscall@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @setpri(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @syscall(i32 3, i32 %3, i32 0)
ret i32 1
}

LLVM IR (-O2):
define i32 @setpri(i32 %0) {
%2 = tail call i32 @syscall(i32 3, i32 %0, i32 0)
ret i32 1
}
/* Variables and functions */
int scanf(char *, int *);
main() {
  int a, b;
  a = 0;
  b = 0;
  b = scanf("%d", &a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xed3(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1030 <scanf@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xee0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1030 <scanf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
store i32 %3, i32* %2
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ UI_button_irq_handler();
int UI_get_missed_irqs();
int /*<<< orphan*/ assert(int);
void when_one_irq_and_no_handler_then_missed_irq_counter_one() {
  UI_button_irq_handler();
  assert(UI_get_missed_irqs() == 1);
}


x86 assembly (clang, -O0):
<when_one_irq_and_no_handler_then_missed_irq_counter_one>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <UI_button_irq_handler@plt>
mov    $0x0,%al
call   1050 <UI_get_missed_irqs@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<when_one_irq_and_no_handler_then_missed_irq_counter_one>:
push   %rax
xor    %eax,%eax
call   1030 <UI_button_irq_handler@plt>
xor    %eax,%eax
call   1050 <UI_get_missed_irqs@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @when_one_irq_and_no_handler_then_missed_irq_counter_one() {
%1 = call i32 (...) @UI_button_irq_handler()
%2 = call i32 (...) @UI_get_missed_irqs()
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
%5 = call i32 @assert(i32 %4)
ret void
}

LLVM IR (-O2):
define void @when_one_irq_and_no_handler_then_missed_irq_counter_one() {
%1 = tail call i32 (...) @UI_button_irq_handler()
%2 = tail call i32 (...) @UI_get_missed_irqs()
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret void
}
void kill_the_proc() { return; }


x86 assembly (clang, -O0):
<kill_the_proc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill_the_proc>:
ret

LLVM IR (-O0):
define void @kill_the_proc() {
ret void
}

LLVM IR (-O2):
define void @kill_the_proc() {
ret void
}
void wifi_evt_hardware_change_notification(
    const struct wifi_msg_hardware_change_notification_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_hardware_change_notification>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_hardware_change_notification>:
ret

LLVM IR (-O0):
%struct.wifi_msg_hardware_change_notification_evt_t = type opaque
define void @wifi_evt_hardware_change_notification(%struct.wifi_msg_hardware_change_notification_evt_t* %0) {
%2 = alloca %struct.wifi_msg_hardware_change_notification_evt_t*
store %struct.wifi_msg_hardware_change_notification_evt_t* %0, %struct.wifi_msg_hardware_change_notification_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_hardware_change_notification_evt_t = type opaque
define void @wifi_evt_hardware_change_notification(%struct.wifi_msg_hardware_change_notification_evt_t* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int morph25519_eparity(const uint8_t *edwards_x) { return edwards_x[0] & 1; }


x86 assembly (clang, -O0):
<morph25519_eparity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<morph25519_eparity>:
mov    (%rdi),%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @morph25519_eparity(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = and i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @morph25519_eparity(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t translateint16_t(uint16_t in) {
  uint16_t r;
  uint8_t *i;
  i = (uint8_t *)&in;
  r = (i[1] << 8) + i[0];
  return r;
}


x86 assembly (clang, -O0):
<translateint16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translateint16_t>:
ret

LLVM IR (-O0):
define i32 @translateint16_t(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %2
store i32* %2, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %6
%8 = shl i32 %7, 8
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i64 0
%11 = load i32, i32* %10
%12 = add nsw i32 %8, %11
store i32 %12, i32* %3
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @translateint16_t(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
void printUsageGeneral(char *pgmName) {
  fprintf(stderr, "Usage: %s %s\n", pgmName, "<command> <opt args> <path>");
}


x86 assembly (clang, -O0):
<printUsageGeneral>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
lea    0xed7(%rip),%rcx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printUsageGeneral>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
lea    0xee4(%rip),%rcx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [14 x i8] c"Usage: %s %s\0A\00"
@.str.1 = [28 x i8] c"<command> <opt args> <path>\00"
define void @printUsageGeneral(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %4, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [14 x i8] c"Usage: %s %s\0A\00"
@.str.1 = [28 x i8] c"<command> <opt args> <path>\00"
define void @printUsageGeneral(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *iso_dirid(char const *, int, int);
char *iso_1_dirid(const char *src, int relaxed) {
  return iso_dirid(src, 8, relaxed);
}


x86 assembly (clang, -O0):
<iso_1_dirid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x8,%esi
call   1030 <iso_dirid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso_1_dirid>:
mov    %esi,%edx
mov    $0x8,%esi
jmp    1030 <iso_dirid@plt>

LLVM IR (-O0):
define i8* @iso_1_dirid(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @iso_dirid(i8* %5, i32 8, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @iso_1_dirid(i8* %0, i32 %1) {
%3 = tail call i8* @iso_dirid(i8* %0, i32 8, i32 %1)
ret i8* %3
}
int test_imm_6Auint16_mem(unsigned short *val) {
  return ((*val) & (-0x6A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Auint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff96,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Auint16_mem>:
movzwl (%rdi),%eax
test   $0xff96,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Auint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -106
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Auint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -106
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void gtk_notebook_get_menu_label_text() {}


x86 assembly (clang, -O0):
<gtk_notebook_get_menu_label_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_notebook_get_menu_label_text>:
ret

LLVM IR (-O0):
define void @gtk_notebook_get_menu_label_text() {
ret void
}

LLVM IR (-O2):
define void @gtk_notebook_get_menu_label_text() {
ret void
}