xunge/DecIR huggingface dataset:
/* Type definitions */
struct sockaddr_in6 {
  int dummy;
};
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int sa_family;
};

/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
size_t __attribute__((unused)) SALEN(struct sockaddr *sa) {
  switch (sa->sa_family) {
  case AF_INET:
    return (sizeof(struct sockaddr_in));
  case AF_INET6:
    return (sizeof(struct sockaddr_in6));
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<SALEN>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
sub    $0x80,%eax
je     1141 <SALEN+0x41>
jmp    1121 <SALEN+0x21>
mov    -0x14(%rbp),%eax
sub    $0x81,%eax
jne    114e <SALEN+0x4e>
jmp    1134 <SALEN+0x34>
movq   $0x4,-0x8(%rbp)
jmp    1156 <SALEN+0x56>
movq   $0x4,-0x8(%rbp)
jmp    1156 <SALEN+0x56>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SALEN>:
mov    (%rdi),%ecx
and    $0xfffffffe,%ecx
xor    %eax,%eax
cmp    $0x80,%ecx
sete   %al
shl    $0x2,%rax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i64 @SALEN(%struct.sockaddr* %0) {
%2 = alloca i64
%3 = alloca %struct.sockaddr*
store %struct.sockaddr* %0, %struct.sockaddr** %3
%4 = load %struct.sockaddr*, %struct.sockaddr** %3
%5 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %4, i32 0, i32 0
%6 = load i32, i32* %5
switch i32 %6, label %9 [
i32 129, label %7
i32 128, label %8
]
7: ; preds = %1
store i64 4, i64* %2
br label %10
8: ; preds = %1
store i64 4, i64* %2
br label %10
9: ; preds = %1
store i64 0, i64* %2
br label %10
10: ; preds = %9, %8, %7
%11 = load i64, i64* %2
ret i64 %11
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i64 @SALEN(%struct.sockaddr* nocapture %0) {
%2 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = and i32 %3, -2
%5 = icmp eq i32 %4, 128
%6 = select i1 %5, i64 4, i64 0
ret i64 %6
}
void v9fs_put_acl(struct posix_acl *dacl, struct posix_acl *acl) {}


x86 assembly (clang, -O0):
<v9fs_put_acl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<v9fs_put_acl>:
ret

LLVM IR (-O0):
%struct.posix_acl = type opaque
define void @v9fs_put_acl(%struct.posix_acl* %0, %struct.posix_acl* %1) {
%3 = alloca %struct.posix_acl*
%4 = alloca %struct.posix_acl*
store %struct.posix_acl* %0, %struct.posix_acl** %3
store %struct.posix_acl* %1, %struct.posix_acl** %4
ret void
}

LLVM IR (-O2):
%struct.posix_acl = type opaque
define void @v9fs_put_acl(%struct.posix_acl* nocapture %0, %struct.posix_acl* nocapture %1) {
ret void
}
void foo64() {}


x86 assembly (clang, -O0):
<foo64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo64>:
ret

LLVM IR (-O0):
define void @foo64() {
ret void
}

LLVM IR (-O2):
define void @foo64() {
ret void
}
/* Type definitions */
struct timeval {
  double tv_sec;
  double tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double current_time_with_ms() {
  struct timeval tim;
  gettimeofday(&tim, NULL);
  return tim.tv_sec + (tim.tv_usec / 1000000.0);
}


x86 assembly (clang, -O0):
<current_time_with_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  0xec9(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<current_time_with_ms>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movsd  0x10(%rsp),%xmm0
divsd  0xed2(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, double }
define double @current_time_with_ms() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load double, double* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%6 = load double, double* %5
%7 = fdiv double %6, 1.000000e+06
%8 = fadd double %4, %7
ret double %8
}

LLVM IR (-O2):
%struct.timeval = type { double, double }
define double @current_time_with_ms() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%7 = load double, double* %6
%8 = fdiv double %7, 1.000000e+06
%9 = fadd double %5, %8
ret double %9
}
/* Variables and functions */
float sqrt(float);
float modulo(float x, float y, float z) { return sqrt(x * x + y * y + z * z); }


x86 assembly (clang, -O0):
<modulo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modulo>:
mulss  %xmm1,%xmm1
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
mulss  %xmm2,%xmm2
addss  %xmm0,%xmm2
xorps  %xmm0,%xmm0
ucomiss %xmm0,%xmm2
jb     1134 <modulo+0x24>
xorps  %xmm0,%xmm0
sqrtss %xmm2,%xmm0
ret
movaps %xmm2,%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @modulo(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %4
%9 = load float, float* %5
%10 = load float, float* %5
%11 = fmul float %9, %10
%12 = call float @llvm.fmuladd.f32(float %7, float %8, float %11)
%13 = load float, float* %6
%14 = load float, float* %6
%15 = call float @llvm.fmuladd.f32(float %13, float %14, float %12)
%16 = call float @sqrt(float %15)
ret float %16
}

LLVM IR (-O2):
define float @modulo(float %0, float %1, float %2) {
%4 = fmul float %1, %1
%5 = tail call float @llvm.fmuladd.f32(float %0, float %0, float %4)
%6 = tail call float @llvm.fmuladd.f32(float %2, float %2, float %5)
%7 = tail call float @sqrt(float %6)
ret float %7
}
unsigned char setBit(int workonbit, unsigned char workingbyte, int newvalue) {
  unsigned char mask = !(newvalue & 1) << workonbit;
  mask = ~mask;
  workingbyte &= mask;
  return workingbyte | newvalue << workonbit;
}


x86 assembly (clang, -O0):
<setBit>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    -0x4(%rbp),%ecx
shl    %cl,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%ecx
movzbl -0x5(%rbp),%eax
and    %ecx,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
mov    -0xc(%rbp),%edx
mov    -0x4(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setBit>:
mov    %edi,%ecx
mov    %edx,%eax
not    %eax
and    $0x1,%eax
shl    %cl,%eax
not    %al
and    %sil,%al
shl    %cl,%edx
or     %dl,%al
ret

LLVM IR (-O0):
define zeroext i8 @setBit(i32 %0, i8 zeroext %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i32
%7 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
%13 = load i32, i32* %4
%14 = shl i32 %12, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %7
%16 = load i8, i8* %7
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %7
%20 = load i8, i8* %7
%21 = zext i8 %20 to i32
%22 = load i8, i8* %5
%23 = zext i8 %22 to i32
%24 = and i32 %23, %21
%25 = trunc i32 %24 to i8
store i8 %25, i8* %5
%26 = load i8, i8* %5
%27 = zext i8 %26 to i32
%28 = load i32, i32* %6
%29 = load i32, i32* %4
%30 = shl i32 %28, %29
%31 = or i32 %27, %30
%32 = trunc i32 %31 to i8
ret i8 %32
}

LLVM IR (-O2):
define zeroext i8 @setBit(i32 %0, i8 zeroext %1, i32 %2) {
%4 = and i32 %2, 1
%5 = xor i32 %4, 1
%6 = shl i32 %5, %0
%7 = trunc i32 %6 to i8
%8 = xor i8 %7, -1
%9 = and i8 %8, %1
%10 = shl i32 %2, %0
%11 = trunc i32 %10 to i8
%12 = or i8 %9, %11
ret i8 %12
}
void hwInit() {}


x86 assembly (clang, -O0):
<hwInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hwInit>:
ret

LLVM IR (-O0):
define void @hwInit() {
ret void
}

LLVM IR (-O2):
define void @hwInit() {
ret void
}
void argv_free(char **argv) {
  if (argv) {
    if (*argv)
      free(*argv);
    free(argv);
  }
}


x86 assembly (clang, -O0):
<argv_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114a <argv_free+0x3a>
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1141 <argv_free+0x31>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<argv_free>:
test   %rdi,%rdi
je     112f <argv_free+0x1f>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1126 <argv_free+0x16>
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @argv_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = icmp ne i8** %3, null
br i1 %4, label %5, label %15
5: ; preds = %1
%6 = load i8**, i8*** %2
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
br label %12
12: ; preds = %9, %5
%13 = load i8**, i8*** %2
%14 = bitcast i8** %13 to i8*
br label %15
15: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
define void @argv_free(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %3
tail call void @free(i8* %4)
br label %7
7: ; preds = %6, %3
%8 = bitcast i8** %0 to i8*
tail call void @free(i8* %8)
br label %9
9: ; preds = %7, %1
ret void
}
/* Variables and functions */
int putchar(char);
int ndk_putchar(char _ch) { return putchar(_ch); }


x86 assembly (clang, -O0):
<ndk_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndk_putchar>:
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define i32 @ndk_putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @putchar(i8 signext %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ndk_putchar(i8 signext %0) {
%2 = tail call i32 @putchar(i8 signext %0)
ret i32 %2
}
void addition_afp(struct addition_options_afp *options, int *in0, int *in1,
                  int *out0) {
  *out0 = (*in0 >> 1) + (*in1 >> 1);
}


x86 assembly (clang, -O0):
<addition_afp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
sar    $0x1,%ecx
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
sar    $0x1,%eax
add    %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addition_afp>:
mov    (%rsi),%eax
sar    %eax
mov    (%rdx),%edx
sar    %edx
add    %eax,%edx
mov    %edx,(%rcx)
ret

LLVM IR (-O0):
%struct.addition_options_afp = type opaque
define void @addition_afp(%struct.addition_options_afp* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca %struct.addition_options_afp*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store %struct.addition_options_afp* %0, %struct.addition_options_afp** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %6
%10 = load i32, i32* %9
%11 = ashr i32 %10, 1
%12 = load i32*, i32** %7
%13 = load i32, i32* %12
%14 = ashr i32 %13, 1
%15 = add nsw i32 %11, %14
%16 = load i32*, i32** %8
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
%struct.addition_options_afp = type opaque
define void @addition_afp(%struct.addition_options_afp* nocapture readnone %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture writeonly %3) {
%5 = load i32, i32* %1
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = ashr i32 %7, 1
%9 = add nsw i32 %8, %6
store i32 %9, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void Derived2_copy(void *this, void *other) {
  printf("Derived2"
         "::copy()\n");
}


x86 assembly (clang, -O0):
<Derived2_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Derived2_copy>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Derived2::copy()\0A\00"
define void @Derived2_copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"Derived2::copy()\00"
define void @Derived2_copy(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __free_cf(void *);
void *CFBridgingRelease(void *item) { __free_cf(item); }


x86 assembly (clang, -O0):
<CFBridgingRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <__free_cf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFBridgingRelease>:
jmp    1030 <__free_cf@plt>

LLVM IR (-O0):
define i8* @CFBridgingRelease(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @__free_cf(i8* %4)
%6 = load i8*, i8** %2
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @CFBridgingRelease(i8* %0) {
%2 = tail call i32 @__free_cf(i8* %0)
ret i8* undef
}
void ff_hevc_put_hevc_bi_w_epel_v8_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_v8_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_v8_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_v8_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_v8_12_sse4() {
ret void
}
int contains(char s[], char c) {
  int i;
  for (i = 0; s[i] != '\0'; i++)
    if (s[i] == c)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<contains>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1161 <contains+0x61>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    114e <contains+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1168 <contains+0x68>
jmp    1153 <contains+0x53>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <contains+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<contains>:
mov    (%rdi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1120 <contains+0x20>
add    $0x1,%rdi
nopl   0x0(%rax)
cmp    %sil,%cl
je     1121 <contains+0x21>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <contains+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @contains(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 0, i32* %6
br label %7
7: ; preds = %27, %2
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %30
15: ; preds = %7
%16 = load i8*, i8** %4
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i8, i8* %5
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %21, %23
br i1 %24, label %25, label %26
25: ; preds = %15
store i32 1, i32* %3
br label %31
26: ; preds = %15
br label %27
27: ; preds = %26
%28 = load i32, i32* %6
%29 = add nsw i32 %28, 1
store i32 %29, i32* %6
br label %7
30: ; preds = %7
store i32 0, i32* %3
br label %31
31: ; preds = %30, %25
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @contains(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %9
5: ; preds = %9
%6 = getelementptr inbounds i8, i8* %0, i64 %13
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %2, %5
%10 = phi i64 [ %13, %5 ], [ 0, %2 ]
%11 = phi i8 [ %7, %5 ], [ %3, %2 ]
%12 = icmp eq i8 %11, %1
%13 = add nuw i64 %10, 1
br i1 %12, label %14, label %5
14: ; preds = %9, %5, %2
%15 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %9 ]
ret i32 %15
}
/* Variables and functions */
size_t strlen(char *);
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
size_t strxfrm(char *s1, const char *s2, size_t n) {
  if (s2 != NULL) {
    strncpy(s1, s2, n);
  }
  return strlen(s1);
}


x86 assembly (clang, -O0):
<strxfrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1150 <strxfrm+0x30>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strxfrm>:
push   %rbx
mov    %rdi,%rbx
test   %rsi,%rsi
je     1131 <strxfrm+0x11>
mov    %rbx,%rdi
call   1030 <strncpy@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <strlen@plt>

LLVM IR (-O0):
define i64 @strxfrm(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @strncpy(i8* %10, i8* %11, i64 %12)
br label %14
14: ; preds = %9, %3
%15 = load i8*, i8** %4
%16 = call i64 @strlen(i8* %15)
ret i64 %16
}

LLVM IR (-O2):
define i64 @strxfrm(i8* %0, i8* %1, i64 %2) {
%4 = icmp eq i8* %1, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @strncpy(i8* %0, i8* %1, i64 %2)
br label %7
7: ; preds = %5, %3
%8 = tail call i64 @strlen(i8* dereferenceable(1) %0)
ret i64 %8
}
int srl(int register2, int number) { return register2 >> number; }


x86 assembly (clang, -O0):
<srl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<srl>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @srl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @srl(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
ret i32 %3
}
int main() { float x = 5.0f / 0.0f; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca float
store float 0x7FF0000000000000, float* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LibTomFree(void *);
void montgomery_deinit(void *a) { LibTomFree(a); }


x86 assembly (clang, -O0):
<montgomery_deinit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <LibTomFree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<montgomery_deinit>:
jmp    1030 <LibTomFree@plt>

LLVM IR (-O0):
define void @montgomery_deinit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @LibTomFree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @montgomery_deinit(i8* %0) {
%2 = tail call i32 @LibTomFree(i8* %0)
ret void
}
void next2() {
  asm("#"
      "2");
}


x86 assembly (clang, -O0):
<next2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next2>:
ret

LLVM IR (-O0):
define void @next2() {
ret void
}

LLVM IR (-O2):
define void @next2() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main() { printf("\nhello world\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"\0Ahello world\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"\0Ahello world\00"
define void @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(double *, double const *, int);
int __double_clone_array(const double *p, double *q, int elements) {
  memcpy(q, p, elements * sizeof(double));
  return 0;
}


x86 assembly (clang, -O0):
<__double_clone_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0x14(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__double_clone_array>:
push   %rax
mov    %rdi,%rax
shl    $0x3,%edx
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <memcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__double_clone_array(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %5
%8 = load double*, double** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = trunc i64 %11 to i32
%13 = call i32 @memcpy(double* %7, double* %8, i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @__double_clone_array(double* %0, double* %1, i32 %2) {
%4 = shl i32 %2, 3
%5 = tail call i32 @memcpy(double* %1, double* %0, i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ tv_event();
void keybdrv_update(void) { tv_event(); }


x86 assembly (clang, -O0):
<keybdrv_update>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tv_event@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<keybdrv_update>:
xor    %eax,%eax
jmp    1030 <tv_event@plt>

LLVM IR (-O0):
define void @keybdrv_update() {
%1 = call i32 (...) @tv_event()
ret void
}

LLVM IR (-O2):
define void @keybdrv_update() {
%1 = tail call i32 (...) @tv_event()
ret void
}
int wt(int v[25]) {
  int i, t = 0;
  for (i = 0; i < 25; i++) {
    t = t + v[i];
  }
  return (t);
}


x86 assembly (clang, -O0):
<wt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x19,-0xc(%rbp)
jge    113f <wt+0x3f>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <wt+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wt>:
movdqu 0x44(%rdi),%xmm0
movdqu 0x54(%rdi),%xmm1
movdqu 0x4(%rdi),%xmm2
movdqu 0x14(%rdi),%xmm3
paddd  %xmm2,%xmm3
movdqu 0x24(%rdi),%xmm2
paddd  %xmm0,%xmm2
movdqu 0x34(%rdi),%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%ecx
pshufd $0xee,%xmm3,%xmm0
paddd  %xmm3,%xmm0
pshufd $0x55,%xmm0,%xmm1
paddd  %xmm0,%xmm1
movd   %xmm1,%eax
add    %ecx,%eax
add    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @wt(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 25
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32*, i32** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = add nsw i32 %9, %14
store i32 %15, i32* %4
br label %16
16: ; preds = %8
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @wt(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = bitcast i32* %3 to <8 x i32>*
%5 = load <8 x i32>, <8 x i32>* %4
%6 = getelementptr inbounds i32, i32* %0, i64 9
%7 = bitcast i32* %6 to <16 x i32>*
%8 = load <16 x i32>, <16 x i32>* %7
%9 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %8)
%10 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %5)
%11 = add nsw i32 %9, %10
%12 = add nsw i32 %11, %2
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ get_soft_tv();
int main(void) {
  get_soft_tv();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <get_soft_tv@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <get_soft_tv@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @get_soft_tv()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @get_soft_tv()
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t make_vga_color(int fg, int bg) {
  return (uint8_t)fg | (uint8_t)bg << 4;
}


x86 assembly (clang, -O0):
<make_vga_color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x4,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_vga_color>:
mov    %esi,%eax
shl    $0x4,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @make_vga_color(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 4
%8 = or i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @make_vga_color(i32 %0, i32 %1) {
%3 = shl i32 %1, 4
%4 = or i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int LOG_CONS;
int /*<<< orphan*/ LOG_DAEMON;
int LOG_NDELAY;
int LOG_PID;
int /*<<< orphan*/ openlog(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ zprintf(int, char *, char *);
void log_init(char *module, char *version) {
  openlog(module, LOG_PID | LOG_NDELAY | LOG_CONS, LOG_DAEMON);
  zprintf(4, "%s started\n", version);
  return;
}


x86 assembly (clang, -O0):
<log_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    0x2e7c(%rip),%rax
or     (%rax),%esi
mov    0x2e83(%rip),%rax
or     (%rax),%esi
mov    0x2e92(%rip),%rax
mov    (%rax),%edx
call   1040 <openlog@plt>
mov    -0x10(%rbp),%rdx
mov    $0x4,%edi
lea    0xe93(%rip),%rsi
call   1030 <zprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_init>:
push   %rbx
mov    %rsi,%rbx
mov    0x2ead(%rip),%rax
mov    0x2e8e(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    0x2e93(%rip),%rax
or     (%rax),%esi
mov    0x2ea2(%rip),%rax
mov    (%rax),%edx
call   1040 <openlog@plt>
lea    0xeac(%rip),%rsi
mov    $0x4,%edi
mov    %rbx,%rdx
pop    %rbx
jmp    1030 <zprintf@plt>

LLVM IR (-O0):
@LOG_PID = global i32 0
@LOG_NDELAY = global i32 0
@LOG_CONS = global i32 0
@LOG_DAEMON = global i32 0
@.str = [12 x i8] c"%s started\0A\00"
define void @log_init(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @LOG_PID
%7 = load i32, i32* @LOG_NDELAY
%8 = or i32 %6, %7
%9 = load i32, i32* @LOG_CONS
%10 = or i32 %8, %9
%11 = load i32, i32* @LOG_DAEMON
%12 = call i32 @openlog(i8* %5, i32 %10, i32 %11)
%13 = load i8*, i8** %4
%14 = call i32 @zprintf(i32 4, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %13)
ret void
}

LLVM IR (-O2):
@LOG_PID = global i32 0
@LOG_NDELAY = global i32 0
@LOG_CONS = global i32 0
@LOG_DAEMON = global i32 0
@.str = [12 x i8] c"%s started\0A\00"
define void @log_init(i8* %0, i8* %1) {
%3 = load i32, i32* @LOG_PID
%4 = load i32, i32* @LOG_NDELAY
%5 = or i32 %4, %3
%6 = load i32, i32* @LOG_CONS
%7 = or i32 %5, %6
%8 = load i32, i32* @LOG_DAEMON
%9 = tail call i32 @openlog(i8* %0, i32 %7, i32 %8)
%10 = tail call i32 @zprintf(i32 4, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int n;
  n = atoi(argv[1]);
  for (n = n - 1; n > 0; n--) {
    printf("%d\n", n);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    1176 <main+0x56>
mov    -0x14(%rbp),%esi
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    114f <main+0x2f>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
cmp    $0x2,%eax
jl     1153 <main+0x33>
mov    %eax,%ebx
add    $0x1,%ebx
lea    0xec2(%rip),%r14
xchg   %ax,%ax
lea    -0x2(%rbx),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
cmp    $0x2,%ebx
ja     1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i32 @atoi(i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = sub nsw i32 %11, 1
store i32 %12, i32* %6
br label %13
13: ; preds = %19, %2
%14 = load i32, i32* %6
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %13
%17 = load i32, i32* %6
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %17)
br label %19
19: ; preds = %16
%20 = load i32, i32* %6
%21 = add nsw i32 %20, -1
store i32 %21, i32* %6
br label %13
22: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %2, %7
%8 = phi i32 [ %9, %7 ], [ %5, %2 ]
%9 = add nsw i32 %8, -1
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = icmp ugt i32 %8, 2
br i1 %11, label %7, label %12
12: ; preds = %7, %2
ret i32 0
}
/* Variables and functions */
char *strdup(char const *);
char *_crop_sentence(const char *header_value) {
  return strdup(header_value + 7);
}


x86 assembly (clang, -O0):
<_crop_sentence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x7,%rdi
call   1030 <strdup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_crop_sentence>:
add    $0x7,%rdi
jmp    1030 <strdup@plt>

LLVM IR (-O0):
define i8* @_crop_sentence(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 7
%5 = call i8* @strdup(i8* %4)
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @_crop_sentence(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 7
%3 = tail call i8* @strdup(i8* %2)
ret i8* %3
}
void M_ApplyPlatformDefaults(void) {}


x86 assembly (clang, -O0):
<M_ApplyPlatformDefaults>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M_ApplyPlatformDefaults>:
ret

LLVM IR (-O0):
define void @M_ApplyPlatformDefaults() {
ret void
}

LLVM IR (-O2):
define void @M_ApplyPlatformDefaults() {
ret void
}
long long reg_reverse_2(long long dummy __attribute__((unused)), long long x) {
  return __builtin_bswap64(x);
}


x86 assembly (clang, -O0):
<reg_reverse_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
bswap  %rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_reverse_2>:
mov    %rsi,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @reg_reverse_2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i64 @llvm.bswap.i64(i64 %5)
ret i64 %6
}

LLVM IR (-O2):
define i64 @reg_reverse_2(i64 %0, i64 %1) {
%3 = tail call i64 @llvm.bswap.i64(i64 %1)
ret i64 %3
}
int min(int a, int b, int c) {
  if (a <= b && a <= c)
    return a;
  if (b <= a && b <= c)
    return b;
  else
    return c;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1130 <min+0x30>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1130 <min+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <min+0x59>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1153 <min+0x53>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1153 <min+0x53>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <min+0x59>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
cmp    %edx,%esi
mov    %esi,%ecx
cmovg  %edx,%ecx
cmp    %edi,%esi
cmovg  %edx,%ecx
cmp    %edx,%edi
mov    %edi,%eax
cmovg  %ecx,%eax
cmp    %esi,%edi
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %29
17: ; preds = %11, %3
%18 = load i32, i32* %6
%19 = load i32, i32* %5
%20 = icmp sle i32 %18, %19
br i1 %20, label %21, label %27
21: ; preds = %17
%22 = load i32, i32* %6
%23 = load i32, i32* %7
%24 = icmp sle i32 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21
%26 = load i32, i32* %6
store i32 %26, i32* %4
br label %29
27: ; preds = %21, %17
%28 = load i32, i32* %7
store i32 %28, i32* %4
br label %29
29: ; preds = %27, %25, %15
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = or i1 %4, %5
%7 = icmp sgt i32 %1, %0
%8 = icmp sgt i32 %1, %2
%9 = or i1 %7, %8
%10 = select i1 %9, i32 %2, i32 %1
%11 = select i1 %6, i32 %10, i32 %0
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ print_time();
int main() {
  print_time();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <print_time@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print_time@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @print_time()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @print_time()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ compute(int);
int example_pop(int *array, int array_size) {
  compute(10);
  return 0;
}


x86 assembly (clang, -O0):
<example_pop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xa,%edi
call   1030 <compute@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<example_pop>:
push   %rax
mov    $0xa,%edi
call   1030 <compute@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @example_pop(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = call i32 @compute(i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @example_pop(i32* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @compute(i32 10)
ret i32 0
}
/* Variables and functions */
int link(char const *, char const *);
int _link(const char *target, const char *path) { return link(target, path); }


x86 assembly (clang, -O0):
<_link>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <link@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_link>:
jmp    1030 <link@plt>

LLVM IR (-O0):
define i32 @_link(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @link(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @_link(i8* %0, i8* %1) {
%3 = tail call i32 @link(i8* %0, i8* %1)
ret i32 %3
}
int Mepg2FrameRateDeno_(unsigned char code) {
  switch (code & 0x0f) {
  case 1:
    return 1001;
  case 2:
    return 1;
  case 3:
    return 1;
  case 4:
    return 1001;
  case 5:
    return 1;
  case 6:
    return 1;
  case 7:
    return 1001;
  case 8:
    return 1;
  default:
    return 1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<Mepg2FrameRateDeno_>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
and    $0xf,%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7,%eax
ja     1197 <Mepg2FrameRateDeno_+0x97>
mov    -0x10(%rbp),%rax
lea    0xed2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3e9,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x1,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x1,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x3e9,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x1,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x1,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x3e9,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x1,-0x4(%rbp)
jmp    119e <Mepg2FrameRateDeno_+0x9e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mepg2FrameRateDeno_>:
and    $0xf,%edi
add    $0xffffffff,%edi
mov    $0x1,%eax
cmp    $0x7,%edi
ja     111d <Mepg2FrameRateDeno_+0x1d>
movslq %edi,%rax
lea    0xee6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @Mepg2FrameRateDeno_(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 15
switch i32 %6, label %15 [
i32 1, label %7
i32 2, label %8
i32 3, label %9
i32 4, label %10
i32 5, label %11
i32 6, label %12
i32 7, label %13
i32 8, label %14
]
7: ; preds = %1
store i32 1001, i32* %2
br label %16
8: ; preds = %1
store i32 1, i32* %2
br label %16
9: ; preds = %1
store i32 1, i32* %2
br label %16
10: ; preds = %1
store i32 1001, i32* %2
br label %16
11: ; preds = %1
store i32 1, i32* %2
br label %16
12: ; preds = %1
store i32 1, i32* %2
br label %16
13: ; preds = %1
store i32 1001, i32* %2
br label %16
14: ; preds = %1
store i32 1, i32* %2
br label %16
15: ; preds = %1
store i32 1, i32* %2
br label %16
16: ; preds = %15, %14, %13, %12, %11, %10, %9, %8, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@switch.table.Mepg2FrameRateDeno_ = [8 x i32] [i32 1001, i32 1, i32 1, i32 1001, i32 1, i32 1, i32 1001, i32 1]
define i32 @Mepg2FrameRateDeno_(i8 zeroext %0) {
%2 = and i8 %0, 15
%3 = zext i8 %2 to i32
%4 = add nsw i32 %3, -1
%5 = icmp ult i32 %4, 8
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = sext i32 %4 to i64
%8 = getelementptr inbounds [8 x i32], [8 x i32]* @switch.table.Mepg2FrameRateDeno_, i64 0, i64 %7
%9 = load i32, i32* %8
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %9, %6 ], [ 1, %1 ]
ret i32 %11
}
f(a) { return 1 << a; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 1, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = shl nuw i32 1, %0
ret i32 %2
}
double expo(int a) {
  double x = 1;
  while (a--) {
    x *= 10;
  }
  return x;
}


x86 assembly (clang, -O0):
<expo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  0xef1(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     113f <expo+0x3f>
movsd  0xed8(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1114 <expo+0x14>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<expo>:
test   %edi,%edi
je     1134 <expo+0x34>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
je     113d <expo+0x3d>
xor    %edx,%edx
movsd  0xee8(%rip),%xmm0
movsd  0xee8(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x1,%edx
cmp    %edx,%ecx
jne    1120 <expo+0x20>
sub    %edx,%edi
cmp    $0x7,%eax
jae    114a <expo+0x4a>
jmp    1185 <expo+0x85>
movsd  0xec4(%rip),%xmm0
ret
movsd  0xebb(%rip),%xmm0
cmp    $0x7,%eax
jb     1185 <expo+0x85>
movsd  0xeb6(%rip),%xmm1
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
add    $0xfffffff8,%edi
jne    1160 <expo+0x60>
ret

LLVM IR (-O0):
define double @expo(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
store double 1.000000e+00, double* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = add nsw i32 %5, -1
store i32 %6, i32* %2
%7 = icmp ne i32 %5, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load double, double* %3
%10 = fmul double %9, 1.000000e+01
store double %10, double* %3
br label %4
11: ; preds = %4
%12 = load double, double* %3
ret double %12
}

LLVM IR (-O2):
define double @expo(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %33, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp eq i32 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %3, %7
%8 = phi double [ %12, %7 ], [ 1.000000e+00, %3 ]
%9 = phi i32 [ %11, %7 ], [ %0, %3 ]
%10 = phi i32 [ %13, %7 ], [ 0, %3 ]
%11 = add nsw i32 %9, -1
%12 = fmul double %8, 1.000000e+01
%13 = add i32 %10, 1
%14 = icmp eq i32 %13, %5
br i1 %14, label %15, label %7
15: ; preds = %7, %3
%16 = phi double [ undef, %3 ], [ %12, %7 ]
%17 = phi double [ 1.000000e+00, %3 ], [ %12, %7 ]
%18 = phi i32 [ %0, %3 ], [ %11, %7 ]
%19 = icmp ult i32 %4, 7
br i1 %19, label %33, label %20
20: ; preds = %15, %20
%21 = phi double [ %31, %20 ], [ %17, %15 ]
%22 = phi i32 [ %30, %20 ], [ %18, %15 ]
%23 = fmul double %21, 1.000000e+01
%24 = fmul double %23, 1.000000e+01
%25 = fmul double %24, 1.000000e+01
%26 = fmul double %25, 1.000000e+01
%27 = fmul double %26, 1.000000e+01
%28 = fmul double %27, 1.000000e+01
%29 = fmul double %28, 1.000000e+01
%30 = add nsw i32 %22, -8
%31 = fmul double %29, 1.000000e+01
%32 = icmp eq i32 %30, 0
br i1 %32, label %33, label %20
33: ; preds = %15, %20, %1
%34 = phi double [ 1.000000e+00, %1 ], [ %16, %15 ], [ %31, %20 ]
ret double %34
}
/* Type definitions */
struct RPC_Node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _showNodes(struct RPC_Node *, int /*<<< orphan*/);
void showNodes(struct RPC_Node *node) { _showNodes(node, 0); }


x86 assembly (clang, -O0):
<showNodes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <_showNodes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showNodes>:
xor    %esi,%esi
jmp    1030 <_showNodes@plt>

LLVM IR (-O0):
%struct.RPC_Node = type { i32 }
define void @showNodes(%struct.RPC_Node* %0) {
%2 = alloca %struct.RPC_Node*
store %struct.RPC_Node* %0, %struct.RPC_Node** %2
%3 = load %struct.RPC_Node*, %struct.RPC_Node** %2
%4 = call i32 @_showNodes(%struct.RPC_Node* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.RPC_Node = type { i32 }
define void @showNodes(%struct.RPC_Node* %0) {
%2 = tail call i32 @_showNodes(%struct.RPC_Node* %0, i32 0)
ret void
}
int do_400() { return 400; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x190,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x190,%eax
ret

LLVM IR (-O0):
define i32 @do_400() {
ret i32 400
}

LLVM IR (-O2):
define i32 @do_400() {
ret i32 400
}
void index2pair(int index, int n_motifs, int *i12) {
  int i1, i2;
  i2 = index % n_motifs;
  i1 = (index - i2) / n_motifs + 1;
  i12[0] = i1;
  i12[1] = i2;
}


x86 assembly (clang, -O0):
<index2pair>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x18(%rbp),%eax
cltd
idivl  -0x8(%rbp)
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<index2pair>:
mov    %rdx,%rcx
mov    %edi,%eax
cltd
idiv   %esi
add    $0x1,%eax
mov    %eax,(%rcx)
mov    %edx,0x4(%rcx)
ret

LLVM IR (-O0):
define void @index2pair(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = srem i32 %9, %10
store i32 %11, i32* %8
%12 = load i32, i32* %4
%13 = load i32, i32* %8
%14 = sub nsw i32 %12, %13
%15 = load i32, i32* %5
%16 = sdiv i32 %14, %15
%17 = add nsw i32 %16, 1
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = load i32*, i32** %6
%20 = getelementptr inbounds i32, i32* %19, i64 0
store i32 %18, i32* %20
%21 = load i32, i32* %8
%22 = load i32*, i32** %6
%23 = getelementptr inbounds i32, i32* %22, i64 1
store i32 %21, i32* %23
ret void
}

LLVM IR (-O2):
define void @index2pair(i32 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = srem i32 %0, %1
%5 = sdiv i32 %0, %1
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = getelementptr inbounds i32, i32* %2, i64 1
store i32 %4, i32* %7
ret void
}