xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
void debug_putc(unsigned char wert) { printf("%c", wert); }


x86 assembly (clang, -O0):
<debug_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rdi
movzbl -0x1(%rbp),%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_putc>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @debug_putc(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @debug_putc(i8 zeroext %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, double, double, double, double);
void print_row(char s[], double value_8, double machine, double abs_error,
               double rel_error) {
  printf("%s \t %1.8f \t %1.5f \t %1.8f \t %1.8f \n", s, value_8, machine,
         abs_error, rel_error);
}


x86 assembly (clang, -O0):
<print_row>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  %xmm3,-0x28(%rbp)
mov    -0x8(%rbp),%rsi
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm2
movsd  -0x28(%rbp),%xmm3
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_row>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"%s \09 %1.8f \09 %1.5f \09 %1.8f \09 %1.8f \0A\00"
define void @print_row(i8* %0, double %1, double %2, double %3, double %4) {
%6 = alloca i8*
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store i8* %0, i8** %6
store double %1, double* %7
store double %2, double* %8
store double %3, double* %9
store double %4, double* %10
%11 = load i8*, i8** %6
%12 = load double, double* %7
%13 = load double, double* %8
%14 = load double, double* %9
%15 = load double, double* %10
%16 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %11, double %12, double %13, double %14, double %15)
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"%s \09 %1.8f \09 %1.5f \09 %1.8f \09 %1.8f \0A\00"
define void @print_row(i8* %0, double %1, double %2, double %3, double %4) {
%6 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %0, double %1, double %2, double %3, double %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DATA_newconn();
int /*<<< orphan*/ LibraryHeader(char *, char *);
int /*<<< orphan*/ STARTUP_newconn();
LIBRARY_newconn() {
  LibraryHeader("newconn", "Sat Feb  1 10:41:05 2014 ");
  DATA_newconn();
  STARTUP_newconn();
}


x86 assembly (clang, -O0):
<LIBRARY_newconn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    0xec2(%rip),%rsi
call   1030 <LibraryHeader@plt>
mov    $0x0,%al
call   1050 <DATA_newconn@plt>
mov    $0x0,%al
call   1040 <STARTUP_newconn@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LIBRARY_newconn>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0xec9(%rip),%rsi
call   1030 <LibraryHeader@plt>
xor    %eax,%eax
call   1050 <DATA_newconn@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <STARTUP_newconn@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"newconn\00"
@.str.1 = [26 x i8] c"Sat Feb 1 10:41:05 2014 \00"
define i32 @LIBRARY_newconn() {
%1 = alloca i32
%2 = call i32 @LibraryHeader(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @DATA_newconn()
%4 = call i32 (...) @STARTUP_newconn()
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@.str = [8 x i8] c"newconn\00"
@.str.1 = [26 x i8] c"Sat Feb 1 10:41:05 2014 \00"
define i32 @LIBRARY_newconn() {
%1 = tail call i32 @LibraryHeader(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 (...) @DATA_newconn()
%3 = tail call i32 (...) @STARTUP_newconn()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ ClearSCK();
int /*<<< orphan*/ GetCHK();
int /*<<< orphan*/ SetMOSI();
int /*<<< orphan*/ SetRST();
int /*<<< orphan*/ deactivate();
int /*<<< orphan*/ waitmillisec(int);
int activate() {
  deactivate();
  ClearSCK();
  SetMOSI();
  SetRST();
  waitmillisec(12);
  if (!GetCHK())
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<activate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1080 <deactivate@plt>
mov    $0x0,%al
call   1030 <ClearSCK@plt>
mov    $0x0,%al
call   1040 <SetMOSI@plt>
mov    $0x0,%al
call   1060 <SetRST@plt>
mov    $0xc,%edi
call   1070 <waitmillisec@plt>
mov    $0x0,%al
call   1050 <GetCHK@plt>
cmp    $0x0,%eax
jne    11aa <activate+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    11b1 <activate+0x51>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<activate>:
push   %rax
xor    %eax,%eax
call   1080 <deactivate@plt>
xor    %eax,%eax
call   1030 <ClearSCK@plt>
xor    %eax,%eax
call   1040 <SetMOSI@plt>
xor    %eax,%eax
call   1060 <SetRST@plt>
mov    $0xc,%edi
call   1070 <waitmillisec@plt>
xor    %eax,%eax
call   1050 <GetCHK@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @activate() {
%1 = alloca i32
%2 = call i32 (...) @deactivate()
%3 = call i32 (...) @ClearSCK()
%4 = call i32 (...) @SetMOSI()
%5 = call i32 (...) @SetRST()
%6 = call i32 @waitmillisec(i32 12)
%7 = call i32 (...) @GetCHK()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 0, i32* %1
br label %11
10: ; preds = %0
store i32 1, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @activate() {
%1 = tail call i32 (...) @deactivate()
%2 = tail call i32 (...) @ClearSCK()
%3 = tail call i32 (...) @SetMOSI()
%4 = tail call i32 (...) @SetRST()
%5 = tail call i32 @waitmillisec(i32 12)
%6 = tail call i32 (...) @GetCHK()
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ sb_printString(char const *, int, int);
int /*<<< orphan*/ sb_writeToBuffer(char const *, int, int);
void sb_printStringAndWriteToBuffer(char const s[], int x, int y) {
  sb_printString(s, x, y);
  sb_writeToBuffer(s, x, y);
}


x86 assembly (clang, -O0):
<sb_printStringAndWriteToBuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <sb_printString@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <sb_writeToBuffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_printStringAndWriteToBuffer>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <sb_printString@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <sb_writeToBuffer@plt>

LLVM IR (-O0):
define void @sb_printStringAndWriteToBuffer(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @sb_printString(i8* %7, i32 %8, i32 %9)
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = call i32 @sb_writeToBuffer(i8* %11, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @sb_printStringAndWriteToBuffer(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @sb_printString(i8* %0, i32 %1, i32 %2)
%5 = tail call i32 @sb_writeToBuffer(i8* %0, i32 %1, i32 %2)
ret void
}
void RTSemEventMultiWait(void) {}


x86 assembly (clang, -O0):
<RTSemEventMultiWait>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSemEventMultiWait>:
ret

LLVM IR (-O0):
define void @RTSemEventMultiWait() {
ret void
}

LLVM IR (-O2):
define void @RTSemEventMultiWait() {
ret void
}
/* Type definitions */
struct game_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ curs_set(int /*<<< orphan*/);
int /*<<< orphan*/ erase();
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ keypad(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ noecho();
int /*<<< orphan*/ raw();
int /*<<< orphan*/ refresh();
int /*<<< orphan*/ stdscr;
int /*<<< orphan*/ timeout(int /*<<< orphan*/);
void game_reload(struct game_state *state) {
  initscr();
  raw();
  timeout(0);
  noecho();
  curs_set(0);
  keypad(stdscr, TRUE);
  erase();
  refresh();
}


x86 assembly (clang, -O0):
<game_reload>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <initscr@plt>
mov    $0x0,%al
call   1050 <raw@plt>
xor    %edi,%edi
call   1070 <timeout@plt>
mov    $0x0,%al
call   1090 <noecho@plt>
xor    %edi,%edi
call   10a0 <curs_set@plt>
mov    0x2e32(%rip),%rax
mov    (%rax),%edi
mov    0x2e21(%rip),%rax
mov    (%rax),%esi
call   1030 <keypad@plt>
mov    $0x0,%al
call   1060 <erase@plt>
mov    $0x0,%al
call   1080 <refresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<game_reload>:
push   %rax
xor    %eax,%eax
call   1040 <initscr@plt>
xor    %eax,%eax
call   1050 <raw@plt>
xor    %edi,%edi
call   1070 <timeout@plt>
xor    %eax,%eax
call   1090 <noecho@plt>
xor    %edi,%edi
call   10a0 <curs_set@plt>
mov    0x2e3d(%rip),%rax
mov    (%rax),%edi
mov    0x2e2c(%rip),%rax
mov    (%rax),%esi
call   1030 <keypad@plt>
xor    %eax,%eax
call   1060 <erase@plt>
xor    %eax,%eax
pop    %rcx
jmp    1080 <refresh@plt>

LLVM IR (-O0):
%struct.game_state = type { i32 }
@stdscr = global i32 0
@TRUE = global i32 0
define void @game_reload(%struct.game_state* %0) {
%2 = alloca %struct.game_state*
store %struct.game_state* %0, %struct.game_state** %2
%3 = call i32 (...) @initscr()
%4 = call i32 (...) @raw()
%5 = call i32 @timeout(i32 0)
%6 = call i32 (...) @noecho()
%7 = call i32 @curs_set(i32 0)
%8 = load i32, i32* @stdscr
%9 = load i32, i32* @TRUE
%10 = call i32 @keypad(i32 %8, i32 %9)
%11 = call i32 (...) @erase()
%12 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
%struct.game_state = type { i32 }
@stdscr = global i32 0
@TRUE = global i32 0
define void @game_reload(%struct.game_state* nocapture readnone %0) {
%2 = tail call i32 (...) @initscr()
%3 = tail call i32 (...) @raw()
%4 = tail call i32 @timeout(i32 0)
%5 = tail call i32 (...) @noecho()
%6 = tail call i32 @curs_set(i32 0)
%7 = load i32, i32* @stdscr
%8 = load i32, i32* @TRUE
%9 = tail call i32 @keypad(i32 %7, i32 %8)
%10 = tail call i32 (...) @erase()
%11 = tail call i32 (...) @refresh()
ret void
}
void kegi_pce_init() {}


x86 assembly (clang, -O0):
<kegi_pce_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kegi_pce_init>:
ret

LLVM IR (-O0):
define void @kegi_pce_init() {
ret void
}

LLVM IR (-O2):
define void @kegi_pce_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __emit_expression_range(int /*<<< orphan*/, int);
void test_conditional_operators(int flag, int on_true, int on_false) {
  __emit_expression_range(0, flag ? on_true : on_false);
}


x86 assembly (clang, -O0):
<test_conditional_operators>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1136 <test_conditional_operators+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    113c <test_conditional_operators+0x2c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_conditional_operators>:
test   %edi,%edi
cmove  %edx,%esi
xor    %edi,%edi
jmp    1030 <__emit_expression_range@plt>

LLVM IR (-O0):
define void @test_conditional_operators(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = load i32, i32* %5
br label %13
11: ; preds = %3
%12 = load i32, i32* %6
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
%15 = call i32 @__emit_expression_range(i32 0, i32 %14)
ret void
}

LLVM IR (-O2):
define void @test_conditional_operators(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i32 %2, i32 %1
%6 = tail call i32 @__emit_expression_range(i32 0, i32 %5)
ret void
}
int test_00(char *x, char *y) { return *x & *y ? -40 : 60; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
and    %eax,%edx
mov    $0x3c,%eax
mov    $0xffffffd8,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    (%rsi),%al
test   %al,(%rdi)
mov    $0x3c,%ecx
mov    $0xffffffd8,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_00(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = and i32 %7, %10
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 -40, i32 60
ret i32 %14
}

LLVM IR (-O2):
define i32 @test_00(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = and i8 %4, %3
%6 = icmp eq i8 %5, 0
%7 = select i1 %6, i32 60, i32 -40
ret i32 %7
}
/* Variables and functions */
scalar_t__ cset82(unsigned char const *, int const, int /*<<< orphan*/, int,
                  int, int *, int *, char *);
int x1__70(const unsigned char *data, const int data_len, int *p_err_no,
           int *p_err_posn, char err_msg[50]) {
  return data_len >= 1 && data_len <= 70 &&
         cset82(data, data_len, 0, 1, 70, p_err_no, p_err_posn, err_msg);
}


x86 assembly (clang, -O0):
<x1__70>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0xc(%rbp)
mov    %al,-0x29(%rbp)
jl     1181 <x1__70+0x71>
xor    %eax,%eax
cmpl   $0x46,-0xc(%rbp)
mov    %al,-0x29(%rbp)
jg     1181 <x1__70+0x71>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%r9
mov    -0x20(%rbp),%r10
mov    -0x28(%rbp),%rax
xor    %edx,%edx
mov    $0x1,%ecx
mov    $0x46,%r8d
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <cset82@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x29(%rbp)
mov    -0x29(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x1__70>:
mov    %rcx,%r10
lea    -0x1(%rsi),%ecx
xor    %eax,%eax
cmp    $0x45,%ecx
ja     114d <x1__70+0x3d>
push   %rax
mov    %r8,%r11
mov    %rdx,%r9
xor    %edx,%edx
mov    $0x1,%ecx
mov    $0x46,%r8d
push   %r11
push   %r10
call   1030 <cset82@plt>
add    $0x10,%rsp
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @x1__70(i8* %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i8*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i8* %4, i8** %10
%11 = load i32, i32* %7
%12 = icmp sge i32 %11, 1
br i1 %12, label %13, label %24
13: ; preds = %5
%14 = load i32, i32* %7
%15 = icmp sle i32 %14, 70
br i1 %15, label %16, label %24
16: ; preds = %13
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = load i32*, i32** %8
%20 = load i32*, i32** %9
%21 = load i8*, i8** %10
%22 = call i64 @cset82(i8* %17, i32 %18, i32 0, i32 1, i32 70, i32* %19, i32* %20, i8* %21)
%23 = icmp ne i64 %22, 0
br label %24
24: ; preds = %16, %13, %5
%25 = phi i1 [ false, %13 ], [ false, %5 ], [ %23, %16 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @x1__70(i8* %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = add i32 %1, -1
%7 = icmp ult i32 %6, 70
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @cset82(i8* %0, i32 %1, i32 0, i32 1, i32 70, i32* %2, i32* %3, i8* %4)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ 0, %5 ], [ %11, %8 ]
ret i32 %13
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int length;
  void *data;
};
typedef TYPE_1__ ASN1_STRING;

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ASN1_STRING_set0(ASN1_STRING *str, void *data, int len) {
  free(str->data);
  str->data = data;
  str->length = len;
}


x86 assembly (clang, -O0):
<ASN1_STRING_set0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_STRING_set0>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    0x8(%rdi),%rdi
call   1030 <free@plt>
mov    %rbx,0x8(%rbp)
mov    %r14d,0x0(%rbp)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i8* }
define void @ASN1_STRING_set0(%struct.TYPE_3__* %0, i8* %1, i32 %2) {
%4 = alloca %struct.TYPE_3__*
%5 = alloca i8*
%6 = alloca i32
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%8 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %7, i32 0, i32 1
%9 = load i8*, i8** %8
%10 = call i32 @free(i8* %9)
%11 = load i8*, i8** %5
%12 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%13 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %12, i32 0, i32 1
store i8* %11, i8** %13
%14 = load i32, i32* %6
%15 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%16 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %15, i32 0, i32 0
store i32 %14, i32* %16
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32, i8* }
define void @ASN1_STRING_set0(%struct.TYPE_3__* nocapture %0, i8* %1, i32 %2) {
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 1
%5 = load i8*, i8** %4
%6 = tail call i32 @free(i8* %5)
store i8* %1, i8** %4
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
store i32 %2, i32* %7
ret void
}
/* Type definitions */
struct snode {
  int dummy;
};

/* Variables and functions */
int is_empty(struct snode *top) {
  if (top == NULL) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <is_empty+0x1f>
movl   $0x1,-0x4(%rbp)
jmp    1126 <is_empty+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_empty>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.snode = type { i32 }
define i32 @is_empty(%struct.snode* %0) {
%2 = alloca i32
%3 = alloca %struct.snode*
store %struct.snode* %0, %struct.snode** %3
%4 = load %struct.snode*, %struct.snode** %3
%5 = icmp eq %struct.snode* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
%struct.snode = type { i32 }
define i32 @is_empty(%struct.snode* readnone %0) {
%2 = icmp eq %struct.snode* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
void f42(void) {
a:
  ({
    ({ 0; });
    goto a;
    ({ 0; });
    0;
  });
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  0;
}


x86 assembly (clang, -O0):
<f42>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    1104 <f42+0x4>

x86 assembly (clang, -O2):
<f42>:
jmp    1100 <f42>

LLVM IR (-O0):
define void @f42() {
%1 = alloca i32
%2 = alloca i32
br label %3
3: ; preds = %3, %0
store i32 0, i32* %1
%4 = load i32, i32* %1
br label %3
}

LLVM IR (-O2):
define void @f42() {
br label %1
1: ; preds = %1, %0
br label %1
}
int test_imm_7Euint16_reg(unsigned short val) {
  return ((val) & (0x7E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Euint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x7e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Euint16_reg>:
test   $0x7e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Euint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 126
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Euint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 126
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void to_upper(char *str) {
  while (*str != '\0') {
    if (*str >= 'a' && *str <= 'z') {
      *str -= 32;
    }
    ++str;
  }
}


x86 assembly (clang, -O0):
<to_upper>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1155 <to_upper+0x55>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x61,%eax
jl     1144 <to_upper+0x44>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7a,%eax
jg     1144 <to_upper+0x44>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
sub    $0x20,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <to_upper+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_upper>:
mov    (%rdi),%al
test   %al,%al
je     112a <to_upper+0x2a>
add    $0x1,%rdi
jmp    111b <to_upper+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <to_upper+0x2a>
lea    -0x61(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <to_upper+0x10>
add    $0xe0,%al
mov    %al,-0x1(%rdi)
jmp    1110 <to_upper+0x10>
ret

LLVM IR (-O0):
define void @to_upper(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %24, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %27
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp sge i32 %11, 97
br i1 %12, label %13, label %24
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 122
br i1 %17, label %18, label %24
18: ; preds = %13
%19 = load i8*, i8** %2
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = sub nsw i32 %21, 32
%23 = trunc i32 %22 to i8
store i8 %23, i8* %19
br label %24
24: ; preds = %18, %13, %8
%25 = load i8*, i8** %2
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %2
br label %3
27: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @to_upper(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -97
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nsw i8 %5, -32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret void
}
/* Type definitions */
struct cmd_arg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ showMACFiltering();
void cmdShowMacFiltering(int cmdType, struct cmd_arg *pCmdArg) {
  showMACFiltering();
}


x86 assembly (clang, -O0):
<cmdShowMacFiltering>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <showMACFiltering@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdShowMacFiltering>:
xor    %eax,%eax
jmp    1030 <showMACFiltering@plt>

LLVM IR (-O0):
%struct.cmd_arg = type { i32 }
define void @cmdShowMacFiltering(i32 %0, %struct.cmd_arg* %1) {
%3 = alloca i32
%4 = alloca %struct.cmd_arg*
store i32 %0, i32* %3
store %struct.cmd_arg* %1, %struct.cmd_arg** %4
%5 = call i32 (...) @showMACFiltering()
ret void
}

LLVM IR (-O2):
%struct.cmd_arg = type { i32 }
define void @cmdShowMacFiltering(i32 %0, %struct.cmd_arg* nocapture readnone %1) {
%3 = tail call i32 (...) @showMACFiltering()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ERR_load_crypto_strings();
int /*<<< orphan*/ OpenSSL_add_all_ciphers();
int /*<<< orphan*/ OpenSSL_add_all_digests();
int tnt_openssl_init() {
  OpenSSL_add_all_digests();
  OpenSSL_add_all_ciphers();
  ERR_load_crypto_strings();
  return 0;
}


x86 assembly (clang, -O0):
<tnt_openssl_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OpenSSL_add_all_digests@plt>
mov    $0x0,%al
call   1040 <OpenSSL_add_all_ciphers@plt>
mov    $0x0,%al
call   1050 <ERR_load_crypto_strings@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tnt_openssl_init>:
push   %rax
xor    %eax,%eax
call   1030 <OpenSSL_add_all_digests@plt>
xor    %eax,%eax
call   1040 <OpenSSL_add_all_ciphers@plt>
xor    %eax,%eax
call   1050 <ERR_load_crypto_strings@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tnt_openssl_init() {
%1 = call i32 (...) @OpenSSL_add_all_digests()
%2 = call i32 (...) @OpenSSL_add_all_ciphers()
%3 = call i32 (...) @ERR_load_crypto_strings()
ret i32 0
}

LLVM IR (-O2):
define i32 @tnt_openssl_init() {
%1 = tail call i32 (...) @OpenSSL_add_all_digests()
%2 = tail call i32 (...) @OpenSSL_add_all_ciphers()
%3 = tail call i32 (...) @ERR_load_crypto_strings()
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t TextureCache_SizeToBPP(uint8_t size) {
  switch (size) {
  case 0:
    return 4;
  case 1:
    return 8;
  case 2:
    return 16;
  default:
    return 32;
  }
}


x86 assembly (clang, -O0):
<TextureCache_SizeToBPP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     113c <TextureCache_SizeToBPP+0x3c>
jmp    111a <TextureCache_SizeToBPP+0x1a>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
je     1148 <TextureCache_SizeToBPP+0x48>
jmp    112b <TextureCache_SizeToBPP+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1154 <TextureCache_SizeToBPP+0x54>
jmp    1160 <TextureCache_SizeToBPP+0x60>
movl   $0x4,-0x4(%rbp)
jmp    1167 <TextureCache_SizeToBPP+0x67>
movl   $0x8,-0x4(%rbp)
jmp    1167 <TextureCache_SizeToBPP+0x67>
movl   $0x10,-0x4(%rbp)
jmp    1167 <TextureCache_SizeToBPP+0x67>
movl   $0x20,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TextureCache_SizeToBPP>:
mov    $0x20,%eax
cmp    $0x2,%edi
ja     1117 <TextureCache_SizeToBPP+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @TextureCache_SizeToBPP(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
]
5: ; preds = %1
store i32 4, i32* %2
br label %9
6: ; preds = %1
store i32 8, i32* %2
br label %9
7: ; preds = %1
store i32 16, i32* %2
br label %9
8: ; preds = %1
store i32 32, i32* %2
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@switch.table.TextureCache_SizeToBPP = [3 x i32] [i32 4, i32 8, i32 16]
define i32 @TextureCache_SizeToBPP(i32 %0) {
%2 = icmp ult i32 %0, 3
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [3 x i32], [3 x i32]* @switch.table.TextureCache_SizeToBPP, i64 0, i64 %4
%6 = load i32, i32* %5
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 32, %1 ]
ret i32 %8
}
/* Type definitions */
typedef int GLdouble;

/* Variables and functions */
GLdouble dot3(GLdouble p[3], GLdouble q[3]) {
  return p[0] * q[0] + p[1] * q[1] + p[2] * q[2];
}


x86 assembly (clang, -O0):
<dot3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
imul   (%rcx),%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
mov    -0x10(%rbp),%rdx
imul   0x4(%rdx),%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
mov    -0x10(%rbp),%rdx
imul   0x8(%rdx),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot3>:
mov    (%rsi),%eax
imul   (%rdi),%eax
mov    0x4(%rsi),%ecx
imul   0x4(%rdi),%ecx
add    %eax,%ecx
mov    0x8(%rsi),%eax
imul   0x8(%rdi),%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @dot3(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = mul nsw i32 %7, %10
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32, i32* %13
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 1
%17 = load i32, i32* %16
%18 = mul nsw i32 %14, %17
%19 = add nsw i32 %11, %18
%20 = load i32*, i32** %3
%21 = getelementptr inbounds i32, i32* %20, i64 2
%22 = load i32, i32* %21
%23 = load i32*, i32** %4
%24 = getelementptr inbounds i32, i32* %23, i64 2
%25 = load i32, i32* %24
%26 = mul nsw i32 %22, %25
%27 = add nsw i32 %19, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @dot3(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %3
%6 = getelementptr inbounds i32, i32* %0, i64 1
%7 = load i32, i32* %6
%8 = getelementptr inbounds i32, i32* %1, i64 1
%9 = load i32, i32* %8
%10 = mul nsw i32 %9, %7
%11 = add nsw i32 %10, %5
%12 = getelementptr inbounds i32, i32* %0, i64 2
%13 = load i32, i32* %12
%14 = getelementptr inbounds i32, i32* %1, i64 2
%15 = load i32, i32* %14
%16 = mul nsw i32 %15, %13
%17 = add nsw i32 %11, %16
ret i32 %17
}
/* Type definitions */
struct ifreq {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ munmap(struct ifreq *, int);
void __if_freereq(struct ifreq *ifreqs, int num_ifs) {
  munmap(ifreqs, num_ifs * sizeof(struct ifreq));
}


x86 assembly (clang, -O0):
<__if_freereq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%esi
call   1030 <munmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__if_freereq>:
shl    $0x2,%esi
jmp    1030 <munmap@plt>

LLVM IR (-O0):
%struct.ifreq = type { i32 }
define void @__if_freereq(%struct.ifreq* %0, i32 %1) {
%3 = alloca %struct.ifreq*
%4 = alloca i32
store %struct.ifreq* %0, %struct.ifreq** %3
store i32 %1, i32* %4
%5 = load %struct.ifreq*, %struct.ifreq** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 4
%9 = trunc i64 %8 to i32
%10 = call i32 @munmap(%struct.ifreq* %5, i32 %9)
ret void
}

LLVM IR (-O2):
%struct.ifreq = type { i32 }
define void @__if_freereq(%struct.ifreq* %0, i32 %1) {
%3 = shl i32 %1, 2
%4 = tail call i32 @munmap(%struct.ifreq* %0, i32 %3)
ret void
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t bswap64(uint64_t x) {
  asm("bswapl %%eax; bswapl %%edx; xchg %%eax, %%edx" : "=A"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<bswap64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bswap  %eax
bswap  %edx
xchg   %eax,%edx
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap64>:
mov    %rdi,%rax
bswap  %eax
bswap  %edx
xchg   %eax,%edx
ret

LLVM IR (-O0):
define i8* @bswap64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "bswapl %eax; bswapl %edx; xchg %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @bswap64(i8* readnone %0) {
%2 = tail call i8* asm "bswapl %eax; bswapl %edx; xchg %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int run(void *arg) {
  printf("hello world of c11 threads.\n");
  return 0;
}


x86 assembly (clang, -O0):
<run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"hello world of c11 threads.\0A\00"
define i32 @run(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [28 x i8] c"hello world of c11 threads.\00"
define i32 @run(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("Infon Editor-Server v0.1 (2007-06-10)"
         "\n"
         "Usage: editor-server [options]\n"
         "Options:\n"
         "  -w <width>        Sets the width of the map (default: 40)\n"
         "  -h <height>       Sets the height of the map (default: 30)\n"
         "  -o <outputfile>   Sets the name of the output file (default: "
         "\"testmap.lua\")\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [278 x i8] c"Infon Editor-Server v0.1 (2007-06-10)\0AUsage: editor-server [options]\0AOptions:\0A -w <width> Sets the width of the map (default: 40)\0A -h <height> Sets the height of the map (default: 30)\0A -o <outputfile> Sets the name of the output file (default: \22testmap.lua\22)\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([278 x i8], [278 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [277 x i8] c"Infon Editor-Server v0.1 (2007-06-10)\0AUsage: editor-server [options]\0AOptions:\0A -w <width> Sets the width of the map (default: 40)\0A -h <height> Sets the height of the map (default: 30)\0A -o <outputfile> Sets the name of the output file (default: \22testmap.lua\22)\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([277 x i8], [277 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ getllr(long long, long long);
long getlr(long min, long max) {
  return (long)getllr((long long)min, (long long)max);
}


x86 assembly (clang, -O0):
<getlr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <getllr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getlr>:
jmp    1030 <getllr@plt>

LLVM IR (-O0):
define i64 @getlr(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @getllr(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @getlr(i64 %0, i64 %1) {
%3 = tail call i64 @getllr(i64 %0, i64 %1)
ret i64 %3
}
/* Variables and functions */
unsigned short csum_fold(int /*<<< orphan*/);
int /*<<< orphan*/ csum_partial(unsigned char *, int, int /*<<< orphan*/);
unsigned short ip_compute_csum(unsigned char *buff, int len) {
  return csum_fold(csum_partial(buff, len, 0));
}


x86 assembly (clang, -O0):
<ip_compute_csum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <csum_partial@plt>
mov    %eax,%edi
call   1040 <csum_fold@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_compute_csum>:
push   %rax
xor    %edx,%edx
call   1030 <csum_partial@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <csum_fold@plt>

LLVM IR (-O0):
define zeroext i16 @ip_compute_csum(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @csum_partial(i8* %5, i32 %6, i32 0)
%8 = call zeroext i16 @csum_fold(i32 %7)
ret i16 %8
}

LLVM IR (-O2):
define zeroext i16 @ip_compute_csum(i8* %0, i32 %1) {
%3 = tail call i32 @csum_partial(i8* %0, i32 %1, i32 0)
%4 = tail call zeroext i16 @csum_fold(i32 %3)
ret i16 %4
}
void add_shift(long *a, long e, int n) {
  int i;
  n--;
  for (i = 0; i < n; i++) {
    a[i] = a[i + 1];
  }
  a[n] = e;
}


x86 assembly (clang, -O0):
<add_shift>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1156 <add_shift+0x56>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rdx
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111f <add_shift+0x1f>
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_shift>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
lea    -0x1(%rdx),%ebp
cmp    $0x2,%edx
jl     1134 <add_shift+0x24>
lea    0x8(%rbx),%rsi
mov    %ebp,%edx
shl    $0x3,%rdx
mov    %rbx,%rdi
call   1030 <memmove@plt>
movslq %ebp,%rax
mov    %r14,(%rbx,%rax,8)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @add_shift(i64* %0, i64 %1, i32 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
store i64* %0, i64** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = add nsw i32 %8, -1
store i32 %9, i32* %6
store i32 0, i32* %7
br label %10
10: ; preds = %25, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %28
14: ; preds = %10
%15 = load i64*, i64** %4
%16 = load i32, i32* %7
%17 = add nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i64, i64* %15, i64 %18
%20 = load i64, i64* %19
%21 = load i64*, i64** %4
%22 = load i32, i32* %7
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i64, i64* %21, i64 %23
store i64 %20, i64* %24
br label %25
25: ; preds = %14
%26 = load i32, i32* %7
%27 = add nsw i32 %26, 1
store i32 %27, i32* %7
br label %10
28: ; preds = %10
%29 = load i64, i64* %5
%30 = load i64*, i64** %4
%31 = load i32, i32* %6
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds i64, i64* %30, i64 %32
store i64 %29, i64* %33
ret void
}

LLVM IR (-O2):
define void @add_shift(i64* nocapture %0, i64 %1, i32 %2) {
%4 = add i32 %2, -1
%5 = icmp sgt i32 %2, 1
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = bitcast i64* %0 to i8*
%8 = getelementptr i64, i64* %0, i64 1
%9 = bitcast i64* %8 to i8*
%10 = zext i32 %4 to i64
%11 = shl nuw nsw i64 %10, 3
br label %12
12: ; preds = %6, %3
%13 = sext i32 %4 to i64
%14 = getelementptr inbounds i64, i64* %0, i64 %13
store i64 %1, i64* %14
ret void
}
void drawwig(char *buf) { (void)buf; }


x86 assembly (clang, -O0):
<drawwig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawwig>:
ret

LLVM IR (-O0):
define void @drawwig(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @drawwig(i8* nocapture %0) {
ret void
}
void module_fini() {}


x86 assembly (clang, -O0):
<module_fini>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_fini>:
ret

LLVM IR (-O0):
define void @module_fini() {
ret void
}

LLVM IR (-O2):
define void @module_fini() {
ret void
}
/* Type definitions */
struct sembuf {
  int dummy;
};

/* Variables and functions */
int semop(int, struct sembuf *, int);
int applySemaphoreOperation(int semaphoreId, struct sembuf *operations) {
  int result;
  result = semop(semaphoreId, operations, 1);
  return result;
}


x86 assembly (clang, -O0):
<applySemaphoreOperation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<applySemaphoreOperation>:
mov    $0x1,%edx
jmp    1030 <semop@plt>

LLVM IR (-O0):
%struct.sembuf = type { i32 }
define i32 @applySemaphoreOperation(i32 %0, %struct.sembuf* %1) {
%3 = alloca i32
%4 = alloca %struct.sembuf*
%5 = alloca i32
store i32 %0, i32* %3
store %struct.sembuf* %1, %struct.sembuf** %4
%6 = load i32, i32* %3
%7 = load %struct.sembuf*, %struct.sembuf** %4
%8 = call i32 @semop(i32 %6, %struct.sembuf* %7, i32 1)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
%struct.sembuf = type { i32 }
define i32 @applySemaphoreOperation(i32 %0, %struct.sembuf* %1) {
%3 = tail call i32 @semop(i32 %0, %struct.sembuf* %1, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void exit_example_bad() {
  int *p = NULL;
  if (p) {
    exit(1);
  }
  *p = 42;
}


x86 assembly (clang, -O0):
<exit_example_bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1135 <exit_example_bad+0x25>
mov    $0x1,%edi
call   1030 <exit@plt>
mov    -0x8(%rbp),%rax
movl   $0x2a,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @exit_example_bad() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
%3 = icmp ne i32* %2, null
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @exit(i32 1)
unreachable
6: ; preds = %0
%7 = load i32*, i32** %1
store i32 42, i32* %7
ret void
}

LLVM IR (-O2):
void V(sid) int sid;
{ semcall(sid, 1); }


x86 assembly (clang, -O0):
<V>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <semcall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<V>:
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <semcall@plt>

LLVM IR (-O0):
define void @V(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, i32, ...) bitcast (i32 (...)* @semcall to i32 (i32, i32, ...)*)(i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @V(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @semcall to i32 (i32, i32, ...)*)(i32 %0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
int sstrncpy(char *dst, const char *src, size_t dst_size) {
  strncpy(dst, src, dst_size - 1);
  dst[dst_size - 1] = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<sstrncpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
sub    $0x1,%rdx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sstrncpy>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rdx
call   1030 <strncpy@plt>
movb   $0x0,-0x1(%rbx,%r14,1)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @sstrncpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = sub i64 %9, 1
%11 = call i32 @strncpy(i8* %7, i8* %8, i64 %10)
%12 = load i8*, i8** %4
%13 = load i64, i64* %6
%14 = sub i64 %13, 1
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 0, i8* %15
ret i32 0
}

LLVM IR (-O2):
define i32 @sstrncpy(i8* %0, i8* %1, i64 %2) {
%4 = add i64 %2, -1
%5 = tail call i32 @strncpy(i8* %0, i8* %1, i64 %4)
%6 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 0, i8* %6
ret i32 0
}
void set_byte(char *addr, char value) { *addr = value; }


x86 assembly (clang, -O0):
<set_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_byte>:
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @set_byte(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8*, i8** %3
store i8 %5, i8* %6
ret void
}

LLVM IR (-O2):
define void @set_byte(i8* nocapture writeonly %0, i8 signext %1) {
store i8 %1, i8* %0
ret void
}
/* Variables and functions */
unsigned long pci_read_config32(int, int);
int /*<<< orphan*/ pci_write_config32(int, int, unsigned long);
void set_bios_reset(void) {
  unsigned long htic;
  htic = pci_read_config32(
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x7) << 8)),
      0x6c);
  htic &= ~(1 << 5);
  pci_write_config32(
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x7) << 8)),
      0x6c, htic);
}


x86 assembly (clang, -O0):
<set_bios_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xc000,%edi
mov    $0x6c,%esi
call   1030 <pci_read_config32@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffffffffffffffdf,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0xc000,%edi
mov    $0x6c,%esi
call   1040 <pci_write_config32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bios_reset>:
push   %rax
mov    $0xc000,%edi
mov    $0x6c,%esi
call   1030 <pci_read_config32@plt>
and    $0xffffffffffffffdf,%rax
mov    $0xc000,%edi
mov    $0x6c,%esi
mov    %rax,%rdx
pop    %rax
jmp    1040 <pci_write_config32@plt>

LLVM IR (-O0):
define void @set_bios_reset() {
%1 = alloca i64
%2 = call i64 @pci_read_config32(i32 49152, i32 108)
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = and i64 %3, -33
store i64 %4, i64* %1
%5 = load i64, i64* %1
%6 = call i32 @pci_write_config32(i32 49152, i32 108, i64 %5)
ret void
}

LLVM IR (-O2):
define void @set_bios_reset() {
%1 = tail call i64 @pci_read_config32(i32 49152, i32 108)
%2 = and i64 %1, -33
%3 = tail call i32 @pci_write_config32(i32 49152, i32 108, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_Mico8(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_Mico8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_Mico8>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_Mico8() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_Mico8() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}