xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ access_uint(void *, unsigned int);
void *alloc_uint(unsigned int);
void nowarn_alloc_access_anti_range_uint(unsigned n1, unsigned n2) {
  if (n1 == 3)
    n1 = 4;
  void *p = alloc_uint(n1);
  if (n2 == 7)
    n2 = 8;
  access_uint(p, n2);
}


x86 assembly (clang, -O0):
<nowarn_alloc_access_anti_range_uint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x3,-0x4(%rbp)
jne    113f <nowarn_alloc_access_anti_range_uint+0x1f>
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloc_uint@plt>
mov    %rax,-0x10(%rbp)
cmpl   $0x7,-0x8(%rbp)
jne    115c <nowarn_alloc_access_anti_range_uint+0x3c>
movl   $0x8,-0x8(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1040 <access_uint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nowarn_alloc_access_anti_range_uint>:
push   %rbx
mov    %esi,%ebx
cmp    $0x3,%edi
mov    $0x4,%eax
cmove  %eax,%edi
call   1030 <alloc_uint@plt>
cmp    $0x7,%ebx
mov    $0x8,%esi
cmovne %ebx,%esi
mov    %rax,%rdi
pop    %rbx
jmp    1040 <access_uint@plt>

LLVM IR (-O0):
define void @nowarn_alloc_access_anti_range_uint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 3
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 4, i32* %3
br label %9
9: ; preds = %8, %2
%10 = load i32, i32* %3
%11 = call i8* @alloc_uint(i32 %10)
store i8* %11, i8** %5
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 7
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 8, i32* %4
br label %15
15: ; preds = %14, %9
%16 = load i8*, i8** %5
%17 = load i32, i32* %4
%18 = call i32 @access_uint(i8* %16, i32 %17)
ret void
}

LLVM IR (-O2):
define void @nowarn_alloc_access_anti_range_uint(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 3
%4 = select i1 %3, i32 4, i32 %0
%5 = tail call i8* @alloc_uint(i32 %4)
%6 = icmp eq i32 %1, 7
%7 = select i1 %6, i32 8, i32 %1
%8 = tail call i32 @access_uint(i8* %5, i32 %7)
ret void
}
/* Type definitions */
struct drm_mm_node {
  int dummy;
};

/* Variables and functions */
struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *,
                                             unsigned long, unsigned int, int);
struct drm_mm_node *drm_mm_get_block_atomic(struct drm_mm_node *parent,
                                            unsigned long size,
                                            unsigned alignment) {
  return drm_mm_get_block_generic(parent, size, alignment, 1);
}


x86 assembly (clang, -O0):
<drm_mm_get_block_atomic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x1,%ecx
call   1030 <drm_mm_get_block_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_mm_get_block_atomic>:
mov    $0x1,%ecx
jmp    1030 <drm_mm_get_block_generic@plt>

LLVM IR (-O0):
%struct.drm_mm_node = type { i32 }
define %struct.drm_mm_node* @drm_mm_get_block_atomic(%struct.drm_mm_node* %0, i64 %1, i32 %2) {
%4 = alloca %struct.drm_mm_node*
%5 = alloca i64
%6 = alloca i32
store %struct.drm_mm_node* %0, %struct.drm_mm_node** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load %struct.drm_mm_node*, %struct.drm_mm_node** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = call %struct.drm_mm_node* @drm_mm_get_block_generic(%struct.drm_mm_node* %7, i64 %8, i32 %9, i32 1)
ret %struct.drm_mm_node* %10
}

LLVM IR (-O2):
%struct.drm_mm_node = type { i32 }
define %struct.drm_mm_node* @drm_mm_get_block_atomic(%struct.drm_mm_node* %0, i64 %1, i32 %2) {
%4 = tail call %struct.drm_mm_node* @drm_mm_get_block_generic(%struct.drm_mm_node* %0, i64 %1, i32 %2, i32 1)
ret %struct.drm_mm_node* %4
}
void pinmux_show_setting(struct seq_file *s,
                         const struct pinctrl_setting *setting) {}


x86 assembly (clang, -O0):
<pinmux_show_setting>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pinmux_show_setting>:
ret

LLVM IR (-O0):
%struct.seq_file = type opaque
%struct.pinctrl_setting = type opaque
define void @pinmux_show_setting(%struct.seq_file* %0, %struct.pinctrl_setting* %1) {
%3 = alloca %struct.seq_file*
%4 = alloca %struct.pinctrl_setting*
store %struct.seq_file* %0, %struct.seq_file** %3
store %struct.pinctrl_setting* %1, %struct.pinctrl_setting** %4
ret void
}

LLVM IR (-O2):
%struct.seq_file = type opaque
%struct.pinctrl_setting = type opaque
define void @pinmux_show_setting(%struct.seq_file* nocapture %0, %struct.pinctrl_setting* nocapture %1) {
ret void
}
/* Variables and functions */
bool nrf51_errata_42(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_42>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_42>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_42() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_42() {
ret i32 0
}
/* Variables and functions */
int htmly_detect_tag(char *, char *);
int htmly_detect_tags(char *line) { return htmly_detect_tag(line, "tag"); }


x86 assembly (clang, -O0):
<htmly_detect_tags>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <htmly_detect_tag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htmly_detect_tags>:
lea    0xee9(%rip),%rsi
jmp    1030 <htmly_detect_tag@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"tag\00"
define i32 @htmly_detect_tags(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @htmly_detect_tag(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [4 x i8] c"tag\00"
define i32 @htmly_detect_tags(i8* %0) {
%2 = tail call i32 @htmly_detect_tag(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ OPM_err(int);
void OPS_err(int n) { OPM_err(n); }


x86 assembly (clang, -O0):
<OPS_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <OPM_err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPS_err>:
jmp    1030 <OPM_err@plt>

LLVM IR (-O0):
define void @OPS_err(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @OPM_err(i32 %3)
ret void
}

LLVM IR (-O2):
define void @OPS_err(i32 %0) {
%2 = tail call i32 @OPM_err(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("this version of this program only works on mbed OS\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [52 x i8] c"this version of this program only works on mbed OS\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [51 x i8] c"this version of this program only works on mbed OS\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ fread(void *, int, size_t, int /*<<< orphan*/ *);
int readbuf(void *ptr, int size, FILE *fp) {
  return (int)fread(ptr, 1, (size_t)size, fp);
}


x86 assembly (clang, -O0):
<readbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readbuf>:
mov    %rdx,%rcx
movslq %esi,%rdx
mov    $0x1,%esi
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i32 @readbuf(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = load i32*, i32** %6
%11 = call i64 @fread(i8* %7, i32 1, i64 %9, i32* %10)
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @readbuf(i8* nocapture %0, i32 %1, i32* nocapture %2) {
%4 = sext i32 %1 to i64
%5 = tail call i64 @fread(i8* %0, i32 1, i64 %4, i32* %2)
%6 = trunc i64 %5 to i32
ret i32 %6
}
void av_log_get_flags() {}


x86 assembly (clang, -O0):
<av_log_get_flags>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_log_get_flags>:
ret

LLVM IR (-O0):
define void @av_log_get_flags() {
ret void
}

LLVM IR (-O2):
define void @av_log_get_flags() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_pzs(int);
int /*<<< orphan*/ wait(int, int /*<<< orphan*/);
void da(void) {
  set_pzs(8);
  wait(2, 0);
}


x86 assembly (clang, -O0):
<da>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
call   1030 <set_pzs@plt>
mov    $0x2,%edi
xor    %esi,%esi
call   1040 <wait@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<da>:
push   %rax
mov    $0x8,%edi
call   1030 <set_pzs@plt>
mov    $0x2,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <wait@plt>

LLVM IR (-O0):
define void @da() {
%1 = call i32 @set_pzs(i32 8)
%2 = call i32 @wait(i32 2, i32 0)
ret void
}

LLVM IR (-O2):
define void @da() {
%1 = tail call i32 @set_pzs(i32 8)
%2 = tail call i32 @wait(i32 2, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2c_OLED_send_char(char const);
void i2c_OLED_send_string(const char *string) {
  while (*string) {
    i2c_OLED_send_char(*string);
    string++;
  }
}


x86 assembly (clang, -O0):
<i2c_OLED_send_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <i2c_OLED_send_string+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <i2c_OLED_send_char@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <i2c_OLED_send_string+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_OLED_send_string>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <i2c_OLED_send_string+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <i2c_OLED_send_char@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <i2c_OLED_send_string+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @i2c_OLED_send_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i32 @i2c_OLED_send_char(i8 signext %9)
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @i2c_OLED_send_string(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @i2c_OLED_send_char(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
void DBGFR3MemRead(void) {}


x86 assembly (clang, -O0):
<DBGFR3MemRead>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3MemRead>:
ret

LLVM IR (-O0):
define void @DBGFR3MemRead() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3MemRead() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int i;
  for (i = 0; i < 10; i++) {
    printf("Hello World!!");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    114a <main+0x3a>
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World!!\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello World!!\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%10 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ luaI_syntaxerror(char *);
void luaY_error(char *s) { luaI_syntaxerror(s); }


x86 assembly (clang, -O0):
<luaY_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <luaI_syntaxerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<luaY_error>:
jmp    1030 <luaI_syntaxerror@plt>

LLVM IR (-O0):
define void @luaY_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @luaI_syntaxerror(i8* %3)
ret void
}

LLVM IR (-O2):
define void @luaY_error(i8* %0) {
%2 = tail call i32 @luaI_syntaxerror(i8* %0)
ret void
}
/* Variables and functions */
double RAND_MAX;
double rand();
float rand_float(void) { return (float)(1.0 * rand() / RAND_MAX); }


x86 assembly (clang, -O0):
<rand_float>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
movaps %xmm0,%xmm1
movsd  0xeda(%rip),%xmm0
mulsd  %xmm1,%xmm0
mov    0x2eb7(%rip),%rax
divsd  (%rax),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_float>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
mov    0x2ec9(%rip),%rax
divsd  (%rax),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define float @rand_float() {
%1 = call double (...) @rand()
%2 = fmul double 1.000000e+00, %1
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = fptrunc double %4 to float
ret float %5
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define float @rand_float() {
%1 = tail call double (...) @rand()
%2 = load double, double* @RAND_MAX
%3 = fdiv double %1, %2
%4 = fptrunc double %3 to float
ret float %4
}
long long dfn_rll(void) { return 4; }


x86 assembly (clang, -O0):
<dfn_rll>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfn_rll>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @dfn_rll() {
ret i64 4
}

LLVM IR (-O2):
define i64 @dfn_rll() {
ret i64 4
}
/* Type definitions */
struct complexf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ complexf_power(struct complexf const *);
float sqrtf(int /*<<< orphan*/);
float complexf_magnitude(const struct complexf *x) {
  return sqrtf(complexf_power(x));
}


x86 assembly (clang, -O0):
<complexf_magnitude>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <complexf_power@plt>
mov    %eax,%edi
call   1040 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<complexf_magnitude>:
push   %rax
call   1030 <complexf_power@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrtf@plt>

LLVM IR (-O0):
%struct.complexf = type { i32 }
define float @complexf_magnitude(%struct.complexf* %0) {
%2 = alloca %struct.complexf*
store %struct.complexf* %0, %struct.complexf** %2
%3 = load %struct.complexf*, %struct.complexf** %2
%4 = call i32 @complexf_power(%struct.complexf* %3)
%5 = call float @sqrtf(i32 %4)
ret float %5
}

LLVM IR (-O2):
%struct.complexf = type { i32 }
define float @complexf_magnitude(%struct.complexf* %0) {
%2 = tail call i32 @complexf_power(%struct.complexf* %0)
%3 = tail call float @sqrtf(i32 %2)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0x95() {
  Assert_real((isascii(149) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              750, ("isascii should be 0 for 0x95"));
}


x86 assembly (clang, -O0):
<t_isascii_0x95>:
push   %rbp
mov    %rsp,%rbp
mov    $0x95,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2ee,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x95>:
push   %rax
mov    $0x95,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2ee,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x95\00"
define void @t_isascii_0x95() {
%1 = call i64 @isascii(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x95\00"
define void @t_isascii_0x95() {
%1 = tail call i64 @isascii(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int fibo(int);
int /*<<< orphan*/ printf(char *, int, int, int);
int main() {
  int n;
  n = 45;
  printf("fibo(%d) = %d%c", n, fibo(n), 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2d,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <fibo@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xeb0(%rip),%rdi
mov    $0xa,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2d,%edi
call   1040 <fibo@plt>
lea    0xece(%rip),%rdi
mov    $0x2d,%esi
mov    %eax,%edx
mov    $0xa,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"fibo(%d) = %d%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 45, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fibo(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5, i32 10)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"fibo(%d) = %d%c\00"
define i32 @main() {
%1 = tail call i32 @fibo(i32 45)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 45, i32 %1, i32 10)
ret i32 0
}
void two_cycle(array, ind0, ind1) int array[], ind0, ind1;
{
  int temp;
  temp = array[ind0];
  array[ind0] = array[ind1];
  array[ind1] = temp;
  return;
}


x86 assembly (clang, -O0):
<two_cycle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<two_cycle>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @two_cycle(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @two_cycle(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ deputy_fail_mayreturn(char *, char const *, char const *,
                                         int, char const *);
void CNotSelected(int what, const char *text, const char *file, int line,
                  const char *func) {
  if ((what)) {
    deputy_fail_mayreturn("check that union field is not selected", text, file,
                          line, func);
  }
}


x86 assembly (clang, -O0):
<CNotSelected>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114f <CNotSelected+0x3f>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
lea    0xeb6(%rip),%rdi
call   1030 <deputy_fail_mayreturn@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CNotSelected>:
test   %edi,%edi
je     1120 <CNotSelected+0x10>
lea    0xee5(%rip),%rdi
jmp    1030 <deputy_fail_mayreturn@plt>
ret

LLVM IR (-O0):
@.str = [39 x i8] c"check that union field is not selected\00"
define void @CNotSelected(i32 %0, i8* %1, i8* %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8*
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %5
%14 = load i8*, i8** %7
%15 = load i8*, i8** %8
%16 = load i32, i32* %9
%17 = load i8*, i8** %10
%18 = call i32 @deputy_fail_mayreturn(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %14, i8* %15, i32 %16, i8* %17)
br label %19
19: ; preds = %13, %5
ret void
}

LLVM IR (-O2):
@.str = [39 x i8] c"check that union field is not selected\00"
define void @CNotSelected(i32 %0, i8* %1, i8* %2, i32 %3, i8* %4) {
%6 = icmp eq i32 %0, 0
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = tail call i32 @deputy_fail_mayreturn(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2, i32 %3, i8* %4)
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
char *strstr(char *, char *);
char toupper(char);
char *header_formatname(char *name) {
  char *ptr = name - 1;
  do {
    ptr++;
    *ptr = toupper(*ptr);
  } while ((ptr = strstr(ptr, "-")));
  return name;
}


x86 assembly (clang, -O0):
<header_formatname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rdi
lea    0xe9d(%rip),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1138 <header_formatname+0x18>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<header_formatname>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
lea    -0x1(%rdi),%rbx
nopl   0x0(%rax)
lea    0x1(%rbx),%r15
movsbl 0x1(%rbx),%edi
call   1030 <toupper@plt>
mov    %al,0x1(%rbx)
mov    %r15,%rdi
mov    $0x2d,%esi
call   1040 <strchr@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1130 <header_formatname+0x10>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [2 x i8] c"-\00"
define i8* @header_formatname(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 -1
store i8* %5, i8** %3
br label %6
6: ; preds = %13, %1
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call signext i8 @toupper(i8 signext %10)
%12 = load i8*, i8** %3
store i8 %11, i8* %12
br label %13
13: ; preds = %6
%14 = load i8*, i8** %3
%15 = call i8* @strstr(i8* %14, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %15, i8** %3
%16 = icmp ne i8* %15, null
br i1 %16, label %6, label %17
17: ; preds = %13
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @header_formatname(i8* returned %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 -1
br label %3
3: ; preds = %3, %1
%4 = phi i8* [ %2, %1 ], [ %8, %3 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %5
%7 = tail call signext i8 @toupper(i8 signext %6)
store i8 %7, i8* %5
%8 = tail call i8* @strchr(i8* %5, i32 45)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
int execute_fchmod() { return 0; }


x86 assembly (clang, -O0):
<execute_fchmod>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_fchmod>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_fchmod() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_fchmod() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
short *malloc(int);
int /*<<< orphan*/ puts(char *);
short *makeItem(short interface) {
  short *temp = malloc(sizeof(short));
  if (temp == NULL) {
    puts("error allocating memory");
    exit(-1);
  }
  *temp = interface;
  return temp;
}


x86 assembly (clang, -O0):
<makeItem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x2,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116e <makeItem+0x3e>
lea    0xea1(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x2(%rbp),%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeItem>:
push   %rbx
mov    %edi,%ebx
mov    $0x2,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1147 <makeItem+0x17>
mov    %bx,(%rax)
pop    %rbx
ret
lea    0xeb2(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"error allocating memory\00"
define i16* @makeItem(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16*
store i16 %0, i16* %2
%4 = call i16* @malloc(i32 2)
store i16* %4, i16** %3
%5 = load i16*, i16** %3
%6 = icmp eq i16* %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = call i32 @puts(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 -1)
unreachable
10: ; preds = %1
%11 = load i16, i16* %2
%12 = load i16*, i16** %3
store i16 %11, i16* %12
%13 = load i16*, i16** %3
ret i16* %13
}

LLVM IR (-O2):
@.str = [24 x i8] c"error allocating memory\00"
define noalias i16* @makeItem(i16 signext %0) {
%2 = tail call i16* @malloc(i32 2)
%3 = icmp eq i16* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 -1)
unreachable
7: ; preds = %1
store i16 %0, i16* %2
ret i16* %2
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(int);
void mov_preg32pimm32_reg32(int reg1, unsigned long imm32, int reg2) {
  put8(0x89);
  put8(0x80 | reg1 | (reg2 << 3));
  put32(imm32);
}


x86 assembly (clang, -O0):
<mov_preg32pimm32_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x89,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
or     $0x80,%edi
mov    -0x14(%rbp),%eax
shl    $0x3,%eax
or     %eax,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rdi
call   1040 <put32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_preg32pimm32_reg32>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %rsi,%r14
mov    %edi,%ebp
mov    $0x89,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %ebp,%ebx
or     $0x80,%ebx
mov    %ebx,%edi
call   1030 <put8@plt>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @mov_preg32pimm32_reg32(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = call i32 @put8(i32 137)
%8 = load i32, i32* %4
%9 = or i32 128, %8
%10 = load i32, i32* %6
%11 = shl i32 %10, 3
%12 = or i32 %9, %11
%13 = call i32 @put8(i32 %12)
%14 = load i64, i64* %5
%15 = call i32 @put32(i64 %14)
ret void
}

LLVM IR (-O2):
define void @mov_preg32pimm32_reg32(i32 %0, i64 %1, i32 %2) {
%4 = tail call i32 @put8(i32 137)
%5 = shl i32 %2, 3
%6 = or i32 %5, %0
%7 = or i32 %6, 128
%8 = tail call i32 @put8(i32 %7)
%9 = tail call i32 @put32(i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ wig_table_free();
void fwig_table_free_() { wig_table_free(); }


x86 assembly (clang, -O0):
<fwig_table_free_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <wig_table_free@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwig_table_free_>:
xor    %eax,%eax
jmp    1030 <wig_table_free@plt>

LLVM IR (-O0):
define void @fwig_table_free_() {
%1 = call i32 (...) @wig_table_free()
ret void
}

LLVM IR (-O2):
define void @fwig_table_free_() {
%1 = tail call i32 (...) @wig_table_free()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
void reg32_clear_bits(volatile uint32_t *reg, uint32_t value) {
  *reg &= ~(value);
}


x86 assembly (clang, -O0):
<reg32_clear_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg32_clear_bits>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
not    %eax
and    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @reg32_clear_bits(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = xor i32 %5, -1
%7 = load i32*, i32** %3
%8 = load volatile i32, i32* %7
%9 = and i32 %8, %6
store volatile i32 %9, i32* %7
ret void
}

LLVM IR (-O2):
define void @reg32_clear_bits(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = xor i32 %4, -1
%6 = load volatile i32, i32* %0
%7 = and i32 %6, %5
store volatile i32 %7, i32* %0
ret void
}
void CC112x_IsrEvent1(void) {}


x86 assembly (clang, -O0):
<CC112x_IsrEvent1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC112x_IsrEvent1>:
ret

LLVM IR (-O0):
define void @CC112x_IsrEvent1() {
ret void
}

LLVM IR (-O2):
define void @CC112x_IsrEvent1() {
ret void
}
/* Variables and functions */
float ANTweenTimingFunctionQuintIn(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionQuintIn(float time, float duration) {
  return ANTweenTimingFunctionQuintIn(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionQuintIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionQuintIn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionQuintIn>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionQuintIn@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionQuintIn(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionQuintIn(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionQuintIn(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionQuintIn(float %0, i32 0, i32 1, float %1)
ret float %3
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, struct timespec *);
void eat_cpu(int n) {
  struct timespec req, rem;
  req.tv_sec = 0;
  req.tv_nsec = n;
  nanosleep(&req, &rem);
}


x86 assembly (clang, -O0):
<eat_cpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eat_cpu>:
sub    $0x28,%rsp
movq   $0x0,0x10(%rsp)
mov    %edi,0x8(%rsp)
lea    0x8(%rsp),%rdi
lea    0x18(%rsp),%rsi
call   1030 <nanosleep@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define void @eat_cpu(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
store i32 %0, i32* %2
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 0, i64* %5
%6 = load i32, i32* %2
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %6, i32* %7
%8 = call i32 @nanosleep(%struct.timespec* %3, %struct.timespec* %4)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define void @eat_cpu(i32 %0) {
%2 = alloca %struct.timespec
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %2 to i8*
%5 = bitcast %struct.timespec* %3 to i8*
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 0, i64* %6
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %0, i32* %7
%8 = call i32 @nanosleep(%struct.timespec* %2, %struct.timespec* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int sumCountMirror(int, int);
int main() {
  int number = 0;
  printf("Type a number:\n");
  scanf("%d", &number);
  int result = sumCountMirror(number, 10);
  printf("\nThe sum of the printed sequence is %d. \n", result);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xebc(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x4(%rbp),%edi
mov    $0xa,%esi
call   1030 <sumCountMirror@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe9c(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
lea    0xea4(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1060 <scanf@plt>
mov    0x4(%rsp),%edi
mov    $0xa,%esi
call   1040 <sumCountMirror@plt>
lea    0xe88(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Type a number:\0A\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [42 x i8] c"\0AThe sum of the printed sequence is %d. \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @sumCountMirror(i32 %5, i32 10)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.2, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [42 x i8] c"\0AThe sum of the printed sequence is %d. \0A\00"
@str = [15 x i8] c"Type a number:\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @sumCountMirror(i32 %5, i32 10)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Type definitions */
struct rlimit {
  int rlim_cur;
};

/* Variables and functions */
int /*<<< orphan*/ RLIMIT_NOFILE;
int /*<<< orphan*/ getrlimit(int /*<<< orphan*/, struct rlimit *);
int getdtablesize() {
  struct rlimit rl;
  getrlimit(RLIMIT_NOFILE, &rl);
  return rl.rlim_cur;
}


x86 assembly (clang, -O0):
<getdtablesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <getrlimit@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getdtablesize>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <getrlimit@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.rlimit = type { i32 }
@RLIMIT_NOFILE = global i32 0
define i32 @getdtablesize() {
%1 = alloca %struct.rlimit
%2 = load i32, i32* @RLIMIT_NOFILE
%3 = call i32 @getrlimit(i32 %2, %struct.rlimit* %1)
%4 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %1, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.rlimit = type { i32 }
@RLIMIT_NOFILE = global i32 0
define i32 @getdtablesize() {
%1 = alloca %struct.rlimit
%2 = bitcast %struct.rlimit* %1 to i8*
%3 = load i32, i32* @RLIMIT_NOFILE
%4 = call i32 @getrlimit(i32 %3, %struct.rlimit* %1)
%5 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %1, i64 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}
void ieee80211_debugfs_key_add_mgmt_default(
    struct ieee80211_sub_if_data *sdata) {}


x86 assembly (clang, -O0):
<ieee80211_debugfs_key_add_mgmt_default>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_debugfs_key_add_mgmt_default>:
ret

LLVM IR (-O0):
%struct.ieee80211_sub_if_data = type opaque
define void @ieee80211_debugfs_key_add_mgmt_default(%struct.ieee80211_sub_if_data* %0) {
%2 = alloca %struct.ieee80211_sub_if_data*
store %struct.ieee80211_sub_if_data* %0, %struct.ieee80211_sub_if_data** %2
ret void
}

LLVM IR (-O2):
%struct.ieee80211_sub_if_data = type opaque
define void @ieee80211_debugfs_key_add_mgmt_default(%struct.ieee80211_sub_if_data* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trap_R_RegisterShaderNoMip(char *);
void UI_TeamOrdersMenu_Cache(void) {
  trap_R_RegisterShaderNoMip("menu/art/addbotframe");
  trap_R_RegisterShaderNoMip("menu/art/back_0");
  trap_R_RegisterShaderNoMip("menu/art/back_1");
}


x86 assembly (clang, -O0):
<UI_TeamOrdersMenu_Cache>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xeee(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef2(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_TeamOrdersMenu_Cache>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef1(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef5(%rip),%rdi
pop    %rax
jmp    1030 <trap_R_RegisterShaderNoMip@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"menu/art/addbotframe\00"
@.str.1 = [16 x i8] c"menu/art/back_0\00"
@.str.2 = [16 x i8] c"menu/art/back_1\00"
define void @UI_TeamOrdersMenu_Cache() {
%1 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"menu/art/addbotframe\00"
@.str.1 = [16 x i8] c"menu/art/back_0\00"
@.str.2 = [16 x i8] c"menu/art/back_1\00"
define void @UI_TeamOrdersMenu_Cache() {
%1 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err_message(char *, char *, int, int);
void spar_err(int i, int j) {
  err_message("spar_put", "invalid indices %d, %d\n", i, j);
}


x86 assembly (clang, -O0):
<spar_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xed5(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1030 <err_message@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spar_err>:
mov    %esi,%ecx
mov    %edi,%edx
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
jmp    1030 <err_message@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"spar_put\00"
@.str.1 = [24 x i8] c"invalid indices %d, %d\0A\00"
define void @spar_err(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @err_message(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"spar_put\00"
@.str.1 = [24 x i8] c"invalid indices %d, %d\0A\00"
define void @spar_err(i32 %0, i32 %1) {
%3 = tail call i32 @err_message(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 %0, i32 %1)
ret void
}
/* Type definitions */
typedef int c;

/* Variables and functions */
scalar_t__ sl_islower(int);
int sl_toupper(int c) { return sl_islower(c) ? (c) - 'a' + 'A' : c; }


x86 assembly (clang, -O0):
<sl_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sl_islower@plt>
cmp    $0x0,%rax
je     113e <sl_toupper+0x2e>
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <sl_toupper+0x34>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sl_toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <sl_islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sl_toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @sl_islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 97
%9 = add nsw i32 %8, 65
br label %12
10: ; preds = %1
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %6
%13 = phi i32 [ %9, %6 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @sl_toupper(i32 %0) {
%2 = tail call i64 @sl_islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
void zzclose_stream() {}


x86 assembly (clang, -O0):
<zzclose_stream>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zzclose_stream>:
ret

LLVM IR (-O0):
define void @zzclose_stream() {
ret void
}

LLVM IR (-O2):
define void @zzclose_stream() {
ret void
}
void writeChar(unsigned char **pptr, char c) {
  **pptr = c;
  (*pptr)++;
}


x86 assembly (clang, -O0):
<writeChar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeChar>:
mov    (%rdi),%rax
mov    %sil,(%rax)
addq   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @writeChar(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
store i8** %0, i8*** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8 %5, i8* %7
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %8
ret void
}

LLVM IR (-O2):
define void @writeChar(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
store i8 %1, i8* %3
%4 = load i8*, i8** %0
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cJSON_free(void *);
void cJSON_Free(void *p) { cJSON_free(p); }


x86 assembly (clang, -O0):
<cJSON_Free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cJSON_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cJSON_Free>:
jmp    1030 <cJSON_free@plt>

LLVM IR (-O0):
define void @cJSON_Free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @cJSON_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @cJSON_Free(i8* %0) {
%2 = tail call i32 @cJSON_free(i8* %0)
ret void
}