xunge/DecIR huggingface dataset:
int main() {
  const char *volatile s1 = "1234";
  const char *volatile s2 = "98765";
  const char *volatile s3 = "12";
  const char *volatile s4 = "9";
  bar(s1, s2);
  bar(s3, s4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xed4(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xecf(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    0xec7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    $0x0,%al
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
lea    0xee5(%rip),%rax
mov    %rax,0x20(%rsp)
lea    0xede(%rip),%rax
mov    %rax,0x18(%rsp)
lea    0xed8(%rip),%rax
mov    %rax,0x10(%rsp)
lea    0xecf(%rip),%rax
mov    %rax,0x8(%rsp)
mov    0x20(%rsp),%rdi
mov    0x18(%rsp),%rsi
xor    %eax,%eax
call   1030 <bar@plt>
mov    0x10(%rsp),%rdi
mov    0x8(%rsp),%rsi
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"1234\00"
@.str.1 = [6 x i8] c"98765\00"
@.str.2 = [3 x i8] c"12\00"
@.str.3 = [2 x i8] c"9\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i32 0, i32* %1
store volatile i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
store volatile i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %3
store volatile i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8** %4
store volatile i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i8** %5
%6 = load volatile i8*, i8** %2
%7 = load volatile i8*, i8** %3
%8 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @bar to i32 (i8*, i8*, ...)*)(i8* %6, i8* %7)
%9 = load volatile i8*, i8** %4
%10 = load volatile i8*, i8** %5
%11 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @bar to i32 (i8*, i8*, ...)*)(i8* %9, i8* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"1234\00"
@.str.1 = [6 x i8] c"98765\00"
@.str.2 = [3 x i8] c"12\00"
@.str.3 = [2 x i8] c"9\00"
define i32 @main() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = bitcast i8** %1 to i8*
store volatile i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %1
%6 = bitcast i8** %2 to i8*
store volatile i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%7 = bitcast i8** %3 to i8*
store volatile i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8** %3
%8 = bitcast i8** %4 to i8*
store volatile i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i8** %4
%9 = load volatile i8*, i8** %1
%10 = load volatile i8*, i8** %2
%11 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @bar to i32 (i8*, i8*, ...)*)(i8* %9, i8* %10)
%12 = load volatile i8*, i8** %3
%13 = load volatile i8*, i8** %4
%14 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @bar to i32 (i8*, i8*, ...)*)(i8* %12, i8* %13)
ret i32 0
}
int main() {
  unsigned long ptr = 0;
  unsigned long out = 0;
  __asm__("lea %1, %0" : "=r"(out) : "m"(ptr));
  return &ptr == (unsigned long *)out;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
lea    -0x10(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movq   $0x0,-0x8(%rsp)
lea    -0x8(%rsp),%rcx
lea    -0x8(%rsp),%rdx
xor    %eax,%eax
cmp    %rcx,%rdx
sete   %al
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
store i64 0, i64* %3
%4 = call i64 asm "lea $1, $0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %2)
store i64 %4, i64* %3
%5 = load i64, i64* %3
%6 = inttoptr i64 %5 to i64*
%7 = icmp eq i64* %2, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
store i64 0, i64* %1
%3 = call i64 asm "lea $1, $0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1)
%4 = inttoptr i64 %3 to i64*
%5 = icmp eq i64* %1, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int pathcon_nm10_n_out(void) { return 2; }


x86 assembly (clang, -O0):
<pathcon_nm10_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm10_n_out>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm10_n_out() {
ret i32 2
}

LLVM IR (-O2):
define i32 @pathcon_nm10_n_out() {
ret i32 2
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long window;
};
typedef TYPE_1__ XReparentEvent;

/* Variables and functions */
void set_XReparentEvent_window(void *_p, unsigned long _v) {
  ((XReparentEvent *)_p)->window = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XReparentEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XReparentEvent_window>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XReparentEvent_window(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XReparentEvent_window(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ problem1();
int /*<<< orphan*/ problem2();
int /*<<< orphan*/ problem3();
int main() {
  problem1();
  problem2();
  problem3();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <problem1@plt>
mov    $0x0,%al
call   1030 <problem2@plt>
mov    $0x0,%al
call   1050 <problem3@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <problem1@plt>
xor    %eax,%eax
call   1030 <problem2@plt>
xor    %eax,%eax
call   1050 <problem3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @problem1()
%3 = call i32 (...) @problem2()
%4 = call i32 (...) @problem3()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @problem1()
%2 = tail call i32 (...) @problem2()
%3 = tail call i32 (...) @problem3()
ret i32 0
}
/* Variables and functions */
int psync_sql_statement(char *);
int /*<<< orphan*/ psync_sql_unlock();
int psync_sql_commit_transaction() {
  int code = psync_sql_statement("COMMIT");
  psync_sql_unlock();
  return code;
}


x86 assembly (clang, -O0):
<psync_sql_commit_transaction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <psync_sql_statement@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <psync_sql_unlock@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psync_sql_commit_transaction>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1040 <psync_sql_statement@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <psync_sql_unlock@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"COMMIT\00"
define i32 @psync_sql_commit_transaction() {
%1 = alloca i32
%2 = call i32 @psync_sql_statement(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = call i32 (...) @psync_sql_unlock()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [7 x i8] c"COMMIT\00"
define i32 @psync_sql_commit_transaction() {
%1 = tail call i32 @psync_sql_statement(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @psync_sql_unlock()
ret i32 %1
}
/* Variables and functions */
int fcntl(int, int, int);
extern int _swift_Glibc_fcntl(int fd, int cmd, int value) {
  return fcntl(fd, cmd, value);
}


x86 assembly (clang, -O0):
<_swift_Glibc_fcntl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_swift_Glibc_fcntl>:
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
define i32 @_swift_Glibc_fcntl(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @fcntl(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @_swift_Glibc_fcntl(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @fcntl(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
int fround(int x) {
  return (x >= 0) ? ((x + 16384 / 2) / 16384) : ((x - 16384 / 2) / 16384);
}


x86 assembly (clang, -O0):
<fround>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1129 <fround+0x29>
mov    -0x4(%rbp),%eax
add    $0x2000,%eax
mov    $0x4000,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    113c <fround+0x3c>
mov    -0x4(%rbp),%eax
sub    $0x2000,%eax
mov    $0x4000,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fround>:
mov    %edi,%eax
not    %eax
shr    $0x11,%eax
and    $0x4000,%eax
lea    (%rax,%rdi,1),%ecx
add    $0xffffe000,%ecx
add    %edi,%eax
add    $0x1fff,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0xe,%eax
ret

LLVM IR (-O0):
define i32 @fround(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 8192
%8 = sdiv i32 %7, 16384
br label %13
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 8192
%12 = sdiv i32 %11, 16384
br label %13
13: ; preds = %9, %5
%14 = phi i32 [ %8, %5 ], [ %12, %9 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @fround(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i32 8192, i32 -8192
%4 = add nsw i32 %3, %0
%5 = sdiv i32 %4, 16384
ret i32 %5
}
/* Variables and functions */
char *get_argument_str(char *);
char *get_comment() {
  char *result = "";
  result = get_argument_str("comment");
  return result;
}


x86 assembly (clang, -O0):
<get_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee8(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <get_argument_str@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_comment>:
lea    0xee9(%rip),%rdi
jmp    1030 <get_argument_str@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [8 x i8] c"comment\00"
define i8* @get_comment() {
%1 = alloca i8*
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = call i8* @get_argument_str(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
@.str.1 = [8 x i8] c"comment\00"
define i8* @get_comment() {
%1 = tail call i8* @get_argument_str(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ terminal_clear_line();
void terminal_action_ctrl_c(int c, void (*process_line)(char *line)) {
  terminal_clear_line();
}


x86 assembly (clang, -O0):
<terminal_action_ctrl_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <terminal_clear_line@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminal_action_ctrl_c>:
xor    %eax,%eax
jmp    1030 <terminal_clear_line@plt>

LLVM IR (-O0):
define void @terminal_action_ctrl_c(i32 %0, void (i8*)* %1) {
%3 = alloca i32
%4 = alloca void (i8*)*
store i32 %0, i32* %3
store void (i8*)* %1, void (i8*)** %4
%5 = call i32 (...) @terminal_clear_line()
ret void
}

LLVM IR (-O2):
define void @terminal_action_ctrl_c(i32 %0, void (i8*)* nocapture readnone %1) {
%3 = tail call i32 (...) @terminal_clear_line()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_PKEY;
typedef int /*<<< orphan*/ BIO;
typedef int /*<<< orphan*/ ASN1_PCTX;

/* Variables and functions */
int print_gost_94(int /*<<< orphan*/ *, int /*<<< orphan*/ const *, int,
                  int /*<<< orphan*/ *, int);
int priv_print_gost94(BIO *out, const EVP_PKEY *pkey, int indent,
                      ASN1_PCTX *pctx) {
  return print_gost_94(out, pkey, indent, pctx, 2);
}


x86 assembly (clang, -O0):
<priv_print_gost94>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    $0x2,%r8d
call   1030 <print_gost_94@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<priv_print_gost94>:
mov    $0x2,%r8d
jmp    1030 <print_gost_94@plt>

LLVM IR (-O0):
define i32 @priv_print_gost94(i32* %0, i32* %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = load i32*, i32** %8
%13 = call i32 @print_gost_94(i32* %9, i32* %10, i32 %11, i32* %12, i32 2)
ret i32 %13
}

LLVM IR (-O2):
define i32 @priv_print_gost94(i32* %0, i32* %1, i32 %2, i32* %3) {
%5 = tail call i32 @print_gost_94(i32* %0, i32* %1, i32 %2, i32* %3, i32 2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void pit_version(char *argv[]) { printf("pit version %s\n", "0.1.0"); }


x86 assembly (clang, -O0):
<pit_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
lea    0xee6(%rip),%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pit_version>:
lea    0xee9(%rip),%rdi
lea    0xef2(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"pit version %s\0A\00"
@.str.1 = [6 x i8] c"0.1.0\00"
define void @pit_version(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"pit version %s\0A\00"
@.str.1 = [6 x i8] c"0.1.0\00"
define void @pit_version(i8** nocapture readnone %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int endswith(char *s, char *suffix) { return 0; }


x86 assembly (clang, -O0):
<endswith>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<endswith>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @endswith(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @endswith(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
const char *mz_version(void) { return "9.1.10"; }


x86 assembly (clang, -O0):
<mz_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mz_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"9.1.10\00"
define i8* @mz_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"9.1.10\00"
define i8* @mz_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ a();
int /*<<< orphan*/ r();
void warn_lock2(void) {
  a();
  r();
  a();
}


x86 assembly (clang, -O0):
<warn_lock2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <a@plt>
mov    $0x0,%al
call   1030 <r@plt>
mov    $0x0,%al
call   1040 <a@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<warn_lock2>:
push   %rax
xor    %eax,%eax
call   1040 <a@plt>
xor    %eax,%eax
call   1030 <r@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <a@plt>

LLVM IR (-O0):
define void @warn_lock2() {
%1 = call i32 (...) @a()
%2 = call i32 (...) @r()
%3 = call i32 (...) @a()
ret void
}

LLVM IR (-O2):
define void @warn_lock2() {
%1 = tail call i32 (...) @a()
%2 = tail call i32 (...) @r()
%3 = tail call i32 (...) @a()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x, y;
  x = y;
  x %= 10;
  assert(x != -1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %2
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = srem i32 %4, 10
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = icmp ne i32 %6, -1
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ pid_registers_defaults();
int /*<<< orphan*/ pwm_registers_defaults();
int /*<<< orphan*/ registers_write_byte(int, int);
void registers_defaults(void) {
  registers_write_byte(0x20, 0x10);
  pwm_registers_defaults();
  pid_registers_defaults();
}


x86 assembly (clang, -O0):
<registers_defaults>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
mov    $0x10,%esi
call   1050 <registers_write_byte@plt>
mov    $0x0,%al
call   1040 <pwm_registers_defaults@plt>
mov    $0x0,%al
call   1030 <pid_registers_defaults@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<registers_defaults>:
push   %rax
mov    $0x20,%edi
mov    $0x10,%esi
call   1050 <registers_write_byte@plt>
xor    %eax,%eax
call   1040 <pwm_registers_defaults@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <pid_registers_defaults@plt>

LLVM IR (-O0):
define void @registers_defaults() {
%1 = call i32 @registers_write_byte(i32 32, i32 16)
%2 = call i32 (...) @pwm_registers_defaults()
%3 = call i32 (...) @pid_registers_defaults()
ret void
}

LLVM IR (-O2):
define void @registers_defaults() {
%1 = tail call i32 @registers_write_byte(i32 32, i32 16)
%2 = tail call i32 (...) @pwm_registers_defaults()
%3 = tail call i32 (...) @pid_registers_defaults()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x68() {
  Assert_real((isalnum(104)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              525, ("isalnum should be 1 for h"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x68>:
push   %rbp
mov    %rsp,%rbp
mov    $0x68,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x20d,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x68>:
push   %rax
mov    $0x68,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x20d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for h\00"
define void @t_isalnum_0x68() {
%1 = call i32 @isalnum(i32 104)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 525, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for h\00"
define void @t_isalnum_0x68() {
%1 = tail call i32 @isalnum(i32 104)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 525, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void st_node_null(void *v) {}


x86 assembly (clang, -O0):
<st_node_null>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_node_null>:
ret

LLVM IR (-O0):
define void @st_node_null(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @st_node_null(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test18_Atmega328p_reset__E();
void test18_TestImporExport_pollen__reset__E() { test18_Atmega328p_reset__E(); }


x86 assembly (clang, -O0):
<test18_TestImporExport_pollen__reset__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test18_Atmega328p_reset__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test18_TestImporExport_pollen__reset__E>:
xor    %eax,%eax
jmp    1030 <test18_Atmega328p_reset__E@plt>

LLVM IR (-O0):
define void @test18_TestImporExport_pollen__reset__E() {
%1 = call i32 (...) @test18_Atmega328p_reset__E()
ret void
}

LLVM IR (-O2):
define void @test18_TestImporExport_pollen__reset__E() {
%1 = tail call i32 (...) @test18_Atmega328p_reset__E()
ret void
}
void initialize_string(char *name) { name[0] = '\0'; }


x86 assembly (clang, -O0):
<initialize_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_string>:
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @initialize_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
store i8 0, i8* %4
ret void
}

LLVM IR (-O2):
define void @initialize_string(i8* nocapture writeonly %0) {
store i8 0, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int fcntl(int, int, long);
int /*<<< orphan*/ perror(char *);
int std_fcntl(int fd, int cmd, long arg) {
  int ret;
  if ((ret = fcntl(fd, cmd, arg)) == -1) {
    perror("fcntl");
    exit(1);
  }
  return ret;
}


x86 assembly (clang, -O0):
<std_fcntl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <fcntl@plt>
mov    %eax,-0x14(%rbp)
cmp    $0xffffffff,%eax
jne    1173 <std_fcntl+0x43>
lea    0xe9c(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<std_fcntl>:
push   %rax
call   1030 <fcntl@plt>
cmp    $0xffffffff,%eax
je     113d <std_fcntl+0xd>
pop    %rcx
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"fcntl\00"
define i32 @std_fcntl(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i64, i64* %6
%11 = call i32 @fcntl(i32 %8, i32 %9, i64 %10)
store i32 %11, i32* %7
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
@.str = [6 x i8] c"fcntl\00"
define i32 @std_fcntl(i32 %0, i32 %1, i64 %2) {
%4 = tail call i32 @fcntl(i32 %0, i32 %1, i64 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ CMAC_CTX;

/* Variables and functions */
int /*<<< orphan*/ CMAC_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ OPENSSL_free(int /*<<< orphan*/ *);
void CMAC_CTX_free(CMAC_CTX *ctx) {
  if (!ctx)
    return;
  CMAC_CTX_cleanup(ctx);
  OPENSSL_free(ctx);
}


x86 assembly (clang, -O0):
<CMAC_CTX_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <CMAC_CTX_free+0x1c>
jmp    114e <CMAC_CTX_free+0x2e>
mov    -0x8(%rbp),%rdi
call   1030 <CMAC_CTX_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1040 <OPENSSL_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMAC_CTX_free>:
test   %rdi,%rdi
je     1137 <CMAC_CTX_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1030 <CMAC_CTX_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <OPENSSL_free@plt>
ret

LLVM IR (-O0):
define void @CMAC_CTX_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = call i32 @CMAC_CTX_cleanup(i32* %7)
%9 = load i32*, i32** %2
%10 = call i32 @OPENSSL_free(i32* %9)
br label %11
11: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @CMAC_CTX_free(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @CMAC_CTX_cleanup(i32* %0)
%5 = tail call i32 @OPENSSL_free(i32* %0)
br label %6
6: ; preds = %1, %3
ret void
}
int qsys(x)
char *x;
{
  system(x + 1);
  cmdh();
  return 0;
}


x86 assembly (clang, -O0):
<qsys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
mov    $0x0,%al
call   1030 <system@plt>
mov    $0x0,%al
call   1040 <cmdh@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsys>:
push   %rax
add    $0x1,%rdi
xor    %eax,%eax
call   1030 <system@plt>
xor    %eax,%eax
call   1040 <cmdh@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @qsys(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @system to i32 (i8*, ...)*)(i8* %4)
%6 = call i32 (...) @cmdh()
ret i32 0
}

LLVM IR (-O2):
define i32 @qsys(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @system to i32 (i8*, ...)*)(i8* %2)
%4 = tail call i32 (...) @cmdh()
ret i32 0
}
/* Variables and functions */
int test_unpriv_remount(int, int, int /*<<< orphan*/);
bool test_unpriv_remount_simple(int mount_flags) {
  return test_unpriv_remount(mount_flags, mount_flags, 0);
}


x86 assembly (clang, -O0):
<test_unpriv_remount_simple>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
xor    %edx,%edx
call   1030 <test_unpriv_remount@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_unpriv_remount_simple>:
mov    %edi,%esi
xor    %edx,%edx
jmp    1030 <test_unpriv_remount@plt>

LLVM IR (-O0):
define i32 @test_unpriv_remount_simple(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @test_unpriv_remount(i32 %3, i32 %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
define i32 @test_unpriv_remount_simple(i32 %0) {
%2 = tail call i32 @test_unpriv_remount(i32 %0, i32 %0, i32 0)
ret i32 %2
}
void dummy(int signum) {}


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
ret

LLVM IR (-O0):
define void @dummy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @dummy(i32 %0) {
ret void
}
int intLt(const void *i1, const void *i2) {
  return (*((int *)i1) < *((int *)i2));
  ;
}


x86 assembly (clang, -O0):
<intLt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intLt>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
setl   %al
ret

LLVM IR (-O0):
define i32 @intLt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp slt i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @intLt(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
scalar_t__ alpha(char);
scalar_t__ isdigit(char);
int alphanum(char c) { return (alpha(c) || isdigit(c)); }


x86 assembly (clang, -O0):
<alphanum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <alpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    115c <alphanum+0x3c>
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alphanum>:
push   %rbx
mov    %edi,%ebx
call   1040 <alpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <alphanum+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @alphanum(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @alpha(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @isdigit(i8 signext %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @alphanum(i8 signext %0) {
%2 = tail call i64 @alpha(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isdigit(i8 signext %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int letter(ch)
char ch;
{ return (('a' <= ch && ch <= 'z') || ('A' <= ch && ch <= 'Z')); }


x86 assembly (clang, -O0):
<letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     112d <letter+0x2d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    1156 <letter+0x56>
movsbl -0x1(%rbp),%edx
xor    %eax,%eax
mov    $0x41,%ecx
cmp    %edx,%ecx
mov    %al,-0x3(%rbp)
jg     1150 <letter+0x50>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<letter>:
and    $0xffffffdf,%edi
shl    $0x18,%edi
add    $0xbfffffff,%edi
xor    %eax,%eax
cmp    $0x1affffff,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @letter(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sle i32 97, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %21, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp sle i32 65, %13
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br label %19
19: ; preds = %15, %11
%20 = phi i1 [ false, %11 ], [ %18, %15 ]
br label %21
21: ; preds = %19, %7
%22 = phi i1 [ true, %7 ], [ %20, %19 ]
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @letter(i32 %0) {
%2 = shl i32 %0, 24
%3 = and i32 %2, -553648128
%4 = add i32 %3, -1073741825
%5 = icmp ult i32 %4, 452984831
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct terminal {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ move_cursor(struct terminal *, int /*<<< orphan*/, int);
void bs(struct terminal *term, void *arg) { move_cursor(term, 0, -1); }


x86 assembly (clang, -O0):
<bs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1030 <move_cursor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bs>:
xor    %esi,%esi
mov    $0xffffffff,%edx
jmp    1030 <move_cursor@plt>

LLVM IR (-O0):
%struct.terminal = type { i32 }
define void @bs(%struct.terminal* %0, i8* %1) {
%3 = alloca %struct.terminal*
%4 = alloca i8*
store %struct.terminal* %0, %struct.terminal** %3
store i8* %1, i8** %4
%5 = load %struct.terminal*, %struct.terminal** %3
%6 = call i32 @move_cursor(%struct.terminal* %5, i32 0, i32 -1)
ret void
}

LLVM IR (-O2):
%struct.terminal = type { i32 }
define void @bs(%struct.terminal* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @move_cursor(%struct.terminal* %0, i32 0, i32 -1)
ret void
}
void instruc_15() {}


x86 assembly (clang, -O0):
<instruc_15>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruc_15>:
ret

LLVM IR (-O0):
define void @instruc_15() {
ret void
}

LLVM IR (-O2):
define void @instruc_15() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
uint8_t add8(uint8_t v1, uint8_t v2) { return v1 + v2; }


x86 assembly (clang, -O0):
<add8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add8>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i64 @add8(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @add8(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
ret i64 %3
}
void gendiv_s() {}


x86 assembly (clang, -O0):
<gendiv_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gendiv_s>:
ret

LLVM IR (-O0):
define void @gendiv_s() {
ret void
}

LLVM IR (-O2):
define void @gendiv_s() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(int *, int /*<<< orphan*/, int);
void clr11(int *x) { memset(x, 0, 11); }


x86 assembly (clang, -O0):
<clr11>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0xb,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clr11>:
xor    %esi,%esi
mov    $0xb,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @clr11(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @memset(i32* %3, i32 0, i32 11)
ret void
}

LLVM IR (-O2):
define void @clr11(i32* %0) {
%2 = tail call i32 @memset(i32* %0, i32 0, i32 11)
ret void
}
void ILibWebClient_OnSendOK(void *socketModule, void *user) {}


x86 assembly (clang, -O0):
<ILibWebClient_OnSendOK>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ILibWebClient_OnSendOK>:
ret

LLVM IR (-O0):
define void @ILibWebClient_OnSendOK(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @ILibWebClient_OnSendOK(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void mm_free(void *ptr) {}


x86 assembly (clang, -O0):
<mm_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_free>:
ret

LLVM IR (-O0):
define void @mm_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @mm_free(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDERR_FILENO;
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ close(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ log_trace(char *);
int setsid();
int /*<<< orphan*/ umask(int /*<<< orphan*/);
void daemonize() {
  if (0) {
    log_trace("ENTERING: daemonize");
  }
  umask(0);
  int sid = setsid();
  if (sid < 0) {
    exit(0);
  }
  close(STDIN_FILENO);
  close(STDOUT_FILENO);
  close(STDERR_FILENO);
  if (0) {
    log_trace("LEAVING: daemonize");
  }
}


x86 assembly (clang, -O0):
<daemonize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1050 <umask@plt>
mov    $0x0,%al
call   1040 <setsid@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    116a <daemonize+0x2a>
xor    %edi,%edi
call   1060 <exit@plt>
mov    0x2e5f(%rip),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    0x2e71(%rip),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    0x2e4b(%rip),%rax
mov    (%rax),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<daemonize>:
push   %rax
xor    %edi,%edi
call   1050 <umask@plt>
xor    %eax,%eax
call   1040 <setsid@plt>
test   %eax,%eax
js     117e <daemonize+0x3e>
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    0x2e62(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1030 <close@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
@STDOUT_FILENO = global i32 0
@STDERR_FILENO = global i32 0
define void @daemonize() {
%1 = alloca i32
%2 = call i32 @umask(i32 0)
%3 = call i32 (...) @setsid()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @exit(i32 0)
unreachable
8: ; preds = %0
%9 = load i32, i32* @STDIN_FILENO
%10 = call i32 @close(i32 %9)
%11 = load i32, i32* @STDOUT_FILENO
%12 = call i32 @close(i32 %11)
%13 = load i32, i32* @STDERR_FILENO
%14 = call i32 @close(i32 %13)
ret void
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
@STDOUT_FILENO = global i32 0
@STDERR_FILENO = global i32 0
define void @daemonize() {
%1 = tail call i32 @umask(i32 0)
%2 = tail call i32 (...) @setsid()
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @exit(i32 0)
unreachable
6: ; preds = %0
%7 = load i32, i32* @STDIN_FILENO
%8 = tail call i32 @close(i32 %7)
%9 = load i32, i32* @STDOUT_FILENO
%10 = tail call i32 @close(i32 %9)
%11 = load i32, i32* @STDERR_FILENO
%12 = tail call i32 @close(i32 %11)
ret void
}
/* Type definitions */
struct timex {
  int dummy;
};

/* Variables and functions */
int syscall(int, struct timex *);
int adjtimex(struct timex *tx) { return syscall(124, tx); }


x86 assembly (clang, -O0):
<adjtimex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x7c,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adjtimex>:
mov    %rdi,%rsi
mov    $0x7c,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.timex = type { i32 }
define i32 @adjtimex(%struct.timex* %0) {
%2 = alloca %struct.timex*
store %struct.timex* %0, %struct.timex** %2
%3 = load %struct.timex*, %struct.timex** %2
%4 = call i32 @syscall(i32 124, %struct.timex* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.timex = type { i32 }
define i32 @adjtimex(%struct.timex* %0) {
%2 = tail call i32 @syscall(i32 124, %struct.timex* %0)
ret i32 %2
}
/* Variables and functions */
size_t str_len(const char *p) {
  size_t n = 0;
  while (*p++)
    n++;
  return n;
}


x86 assembly (clang, -O0):
<str_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1139 <str_len+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <str_len+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_len>:
cmpb   $0x0,(%rdi)
je     111f <str_len+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <str_len+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @str_len(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @str_len(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i64 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %8, %4 ]
ret i64 %12
}
int bar(struct sty *u) {
  bar(u);
  return 0;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1100 <bar>

LLVM IR (-O0):
%struct.sty = type opaque
define i32 @bar(%struct.sty* %0) {
%2 = alloca %struct.sty*
store %struct.sty* %0, %struct.sty** %2
%3 = load %struct.sty*, %struct.sty** %2
%4 = call i32 @bar(%struct.sty* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.sty = type opaque
define i32 @bar(%struct.sty* nocapture readnone %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
int ptrcmp(void *a, void *b) {
  if (a < b)
    return -1;
  else if (a > b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<ptrcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1126 <ptrcmp+0x26>
movl   $0xffffffff,-0x4(%rbp)
jmp    1147 <ptrcmp+0x47>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1140 <ptrcmp+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1147 <ptrcmp+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrcmp>:
xor    %ecx,%ecx
cmp    %rsi,%rdi
seta   %cl
mov    $0xffffffff,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ptrcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = icmp ult i8* %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = icmp ugt i8* %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 1, i32* %3
br label %16
15: ; preds = %10
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @ptrcmp(i8* readnone %0, i8* readnone %1) {
%3 = icmp ult i8* %0, %1
%4 = icmp ugt i8* %0, %1
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 -1, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ ReadIOchip(int);
void ReadIOchannel(int channel_no) {
  int chip_no;
  chip_no = (channel_no - 1) / 8;
  ReadIOchip(chip_no);
}


x86 assembly (clang, -O0):
<ReadIOchannel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <ReadIOchip@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadIOchannel>:
lea    -0x1(%rdi),%eax
add    $0x6,%edi
test   %eax,%eax
cmovns %eax,%edi
sar    $0x3,%edi
jmp    1030 <ReadIOchip@plt>

LLVM IR (-O0):
define void @ReadIOchannel(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = sdiv i32 %5, 8
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @ReadIOchip(i32 %7)
ret void
}

LLVM IR (-O2):
define void @ReadIOchannel(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = sdiv i32 %2, 8
%4 = tail call i32 @ReadIOchip(i32 %3)
ret void
}
int test_imm_FFuint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xFF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FFuint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xff,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FFuint64_lowword_reg>:
test   %dil,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FFuint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 255
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_FFuint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 255
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __set_64bit(unsigned long long *, unsigned int,
                               unsigned int);
void __set_64bit_constant(unsigned long long *ptr, unsigned long long value) {
  __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value) >> 32ULL));
}


x86 assembly (clang, -O0):
<__set_64bit_constant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %eax,%esi
mov    -0x10(%rbp),%rax
shr    $0x20,%rax
mov    %eax,%edx
call   1030 <__set_64bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__set_64bit_constant>:
mov    %rsi,%rdx
shr    $0x20,%rdx
jmp    1030 <__set_64bit@plt>

LLVM IR (-O0):
define void @__set_64bit_constant(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64*, i64** %3
%6 = load i64, i64* %4
%7 = trunc i64 %6 to i32
%8 = load i64, i64* %4
%9 = lshr i64 %8, 32
%10 = trunc i64 %9 to i32
%11 = call i32 @__set_64bit(i64* %5, i32 %7, i32 %10)
ret void
}

LLVM IR (-O2):
define void @__set_64bit_constant(i64* %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = lshr i64 %1, 32
%5 = trunc i64 %4 to i32
%6 = tail call i32 @__set_64bit(i64* %0, i32 %3, i32 %5)
ret void
}