xunge/DecIR huggingface dataset:
/* Variables and functions */
char *pen_malloc(scalar_t__);
char *strcpy(char *, char *);
scalar_t__ strlen(char *);
char *pen_strdup(char *p) {
  char *q = pen_malloc(strlen(p) + 1);
  return strcpy(q, p);
}


x86 assembly (clang, -O0):
<pen_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <pen_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pen_strdup>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <pen_malloc@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
define i8* @pen_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @pen_malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i8* @strcpy(i8* %8, i8* %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @pen_strdup(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @pen_malloc(i64 %3)
%5 = tail call i8* @strcpy(i8* dereferenceable(1) %4, i8* dereferenceable(1) %0)
ret i8* %4
}
/* Variables and functions */
void *malloc(size_t);
void *realloc(void *, size_t);
int /*<<< orphan*/ xdie(size_t);
void *xrealloc(void *ptr, size_t size) {
  void *p;
  p = ptr ? realloc(ptr, size) : malloc(size);
  if (!p)
    xdie(size);
  ;
  return p;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1161 <xrealloc+0x31>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x20(%rbp)
jmp    116e <xrealloc+0x3e>
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    118a <xrealloc+0x5a>
mov    -0x10(%rbp),%rdi
call   1030 <xdie@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
test   %rdi,%rdi
je     1146 <xrealloc+0x16>
mov    %r14,%rsi
call   1050 <realloc@plt>
jmp    114e <xrealloc+0x1e>
mov    %r14,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    115e <xrealloc+0x2e>
mov    %r14,%rdi
call   1030 <xdie@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i8* @realloc(i8* %9, i64 %10)
br label %15
12: ; preds = %2
%13 = load i64, i64* %4
%14 = call i8* @malloc(i64 %13)
br label %15
15: ; preds = %12, %8
%16 = phi i8* [ %11, %8 ], [ %14, %12 ]
store i8* %16, i8** %5
%17 = load i8*, i8** %5
%18 = icmp ne i8* %17, null
br i1 %18, label %22, label %19
19: ; preds = %15
%20 = load i64, i64* %4
%21 = call i32 @xdie(i64 %20)
br label %22
22: ; preds = %19, %15
%23 = load i8*, i8** %5
ret i8* %23
}

LLVM IR (-O2):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i8* @realloc(i8* %0, i64 %1)
br label %8
6: ; preds = %2
%7 = tail call i8* @malloc(i64 %1)
br label %8
8: ; preds = %6, %4
%9 = phi i8* [ %5, %4 ], [ %7, %6 ]
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = tail call i32 @xdie(i64 %1)
br label %13
13: ; preds = %11, %8
ret i8* %9
}
void INI_Rename_SocketServerCtx() { ; }


x86 assembly (clang, -O0):
<INI_Rename_SocketServerCtx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INI_Rename_SocketServerCtx>:
ret

LLVM IR (-O0):
define void @INI_Rename_SocketServerCtx() {
ret void
}

LLVM IR (-O2):
define void @INI_Rename_SocketServerCtx() {
ret void
}
void EthernetIntClear(unsigned long ulBase, unsigned long ulIntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) = ulIntFlags;
}


x86 assembly (clang, -O0):
<EthernetIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EthernetIntClear>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @EthernetIntClear(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 0
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @EthernetIntClear(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
void wpas_p2p_update_channel_list(struct wpa_supplicant *wpa_s) {}


x86 assembly (clang, -O0):
<wpas_p2p_update_channel_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_p2p_update_channel_list>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define void @wpas_p2p_update_channel_list(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define void @wpas_p2p_update_channel_list(%struct.wpa_supplicant* nocapture %0) {
ret void
}
int share__getopt(argc, argv, optstring)
int argc;
char *const *argv;
const char *optstring;
{
  return share___getopt_internal(argc, argv, optstring,
                                 (const struct share__option *)0, (int *)0, 0);
}


x86 assembly (clang, -O0):
<share__getopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
mov    %r8,%rcx
mov    $0x0,%al
call   1030 <share___getopt_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<share__getopt>:
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
xor    %eax,%eax
jmp    1030 <share___getopt_internal@plt>

LLVM IR (-O0):
%struct.share__option = type opaque
define i32 @share__getopt(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load i8*, i8** %6
%10 = call i32 (i32, i8**, i8*, %struct.share__option*, i32*, i32, ...) bitcast (i32 (...)* @share___getopt_internal to i32 (i32, i8**, i8*, %struct.share__option*, i32*, i32, ...)*)(i32 %7, i8** %8, i8* %9, %struct.share__option* null, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.share__option = type opaque
define i32 @share__getopt(i32 %0, i8** %1, i8* %2) {
%4 = tail call i32 (i32, i8**, i8*, %struct.share__option*, i32*, i32, ...) bitcast (i32 (...)* @share___getopt_internal to i32 (i32, i8**, i8*, %struct.share__option*, i32*, i32, ...)*)(i32 %0, i8** %1, i8* %2, %struct.share__option* null, i32* null, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ hz_assert_strncpy_err(char *, char *, int);
void test_utils_strncpy_overflow(void) {
  char buf[10] = "AAAAAAAAA";
  hz_assert_strncpy_err(buf, "LONG LONG LONG STRING", 10);
}


x86 assembly (clang, -O0):
<test_utils_strncpy_overflow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0xa(%rbp)
mov    0xede(%rip),%ax
mov    %ax,-0x2(%rbp)
lea    -0xa(%rbp),%rdi
lea    0xed1(%rip),%rsi
mov    $0xa,%edx
call   1030 <hz_assert_strncpy_err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_utils_strncpy_overflow>:
sub    $0x18,%rsp
movabs $0x4141414141414141,%rax
41 41 41
mov    %rax,0x8(%rsp)
movw   $0x41,0x10(%rsp)
lea    0xed9(%rip),%rsi
lea    0x8(%rsp),%rdi
mov    $0xa,%edx
call   1030 <hz_assert_strncpy_err@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.test_utils_strncpy_overflow.buf = [10 x i8] c"AAAAAAAAA\00"
@.str = [22 x i8] c"LONG LONG LONG STRING\00"
define void @test_utils_strncpy_overflow() {
%1 = alloca [10 x i8]
%2 = bitcast [10 x i8]* %1 to i8*
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%4 = call i32 @hz_assert_strncpy_err(i8* %3, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 10)
ret void
}

LLVM IR (-O2):
@__const.test_utils_strncpy_overflow.buf = [10 x i8] c"AAAAAAAAA\00"
@.str = [22 x i8] c"LONG LONG LONG STRING\00"
define void @test_utils_strncpy_overflow() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = call i32 @hz_assert_strncpy_err(i8* %2, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 10)
ret void
}
void PECIDomainConfigGet(unsigned long ulBase, unsigned long ulDomain,
                         unsigned long *pulHigh, unsigned long *pulLow) {
  unsigned long ulTemp;
  ;
  ;
  ;
  ;
  ulTemp =
      (*((volatile unsigned long *)(ulBase + 0x00000010 + (ulDomain * 4))));
  *pulHigh = ((ulTemp && 0xFFFF0000) >> 16);
  *pulLow = ((ulTemp && 0x0000FFFF) >> 0);
}


x86 assembly (clang, -O0):
<PECIDomainConfigGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rax
mov    -0x10(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x28(%rbp)
mov    %al,-0x29(%rbp)
je     1148 <PECIDomainConfigGet+0x48>
mov    $0x1,%al
mov    %al,-0x29(%rbp)
jmp    1148 <PECIDomainConfigGet+0x48>
mov    -0x29(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
sar    $0x10,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
cmpq   $0x0,-0x28(%rbp)
mov    %al,-0x2a(%rbp)
je     1177 <PECIDomainConfigGet+0x77>
mov    $0x1,%al
mov    %al,-0x2a(%rbp)
jmp    1177 <PECIDomainConfigGet+0x77>
mov    -0x2a(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
sar    $0x0,%eax
movslq %eax,%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIDomainConfigGet>:
xor    %eax,%eax
cmpq   $0x0,0x10(%rdi,%rsi,4)
setne  %al
movq   $0x0,(%rdx)
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @PECIDomainConfigGet(i64 %0, i64 %1, i64* %2, i64* %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64*
%8 = alloca i64*
%9 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64* %2, i64** %7
store i64* %3, i64** %8
%10 = load i64, i64* %5
%11 = add i64 %10, 16
%12 = load i64, i64* %6
%13 = mul i64 %12, 4
%14 = add i64 %11, %13
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
store i64 %16, i64* %9
%17 = load i64, i64* %9
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %4
br label %20
20: ; preds = %19, %4
%21 = phi i1 [ false, %4 ], [ true, %19 ]
%22 = zext i1 %21 to i32
%23 = ashr i32 %22, 16
%24 = sext i32 %23 to i64
%25 = load i64*, i64** %7
store i64 %24, i64* %25
%26 = load i64, i64* %9
%27 = icmp ne i64 %26, 0
br i1 %27, label %28, label %29
28: ; preds = %20
br label %29
29: ; preds = %28, %20
%30 = phi i1 [ false, %20 ], [ true, %28 ]
%31 = zext i1 %30 to i32
%32 = ashr i32 %31, 0
%33 = sext i32 %32 to i64
%34 = load i64*, i64** %8
store i64 %33, i64* %34
ret void
}

LLVM IR (-O2):
define void @PECIDomainConfigGet(i64 %0, i64 %1, i64* nocapture writeonly %2, i64* nocapture writeonly %3) {
%5 = add i64 %0, 16
%6 = shl i64 %1, 2
%7 = add i64 %5, %6
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = icmp ne i64 %9, 0
store i64 0, i64* %2
%11 = zext i1 %10 to i64
store i64 %11, i64* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_adds_pu16(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test40(__m64 a, __m64 b) { return _mm_adds_pu16(a, b); }


x86 assembly (clang, -O0):
<test40>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_adds_pu16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test40>:
jmp    1030 <_mm_adds_pu16@plt>

LLVM IR (-O0):
define i32 @test40(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_adds_pu16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test40(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_adds_pu16(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t divide(uint64_t x, uint64_t y) {
  int quotient = 0;
  while (x >= y) {
    x -= y;
    quotient++;
  }
  return quotient;
}


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jl     113e <divide+0x3e>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <divide+0x13>
movslq -0x14(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
xor    %eax,%eax
cmp    %rsi,%rdi
jl     111c <divide+0x1c>
nopw   0x0(%rax,%rax,1)
sub    %rsi,%rdi
add    $0x1,%rax
cmp    %rsi,%rdi
jge    1110 <divide+0x10>
ret

LLVM IR (-O0):
define i64 @divide(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %3
store i64 %1, i64* %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = icmp sge i64 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i64, i64* %4
%12 = load i64, i64* %3
%13 = sub nsw i64 %12, %11
store i64 %13, i64* %3
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
ret i64 %18
}

LLVM IR (-O2):
define i64 @divide(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
br i1 %3, label %12, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %8, %4 ], [ 0, %2 ]
%6 = phi i64 [ %7, %4 ], [ %0, %2 ]
%7 = sub nsw i64 %6, %1
%8 = add nuw nsw i32 %5, 1
%9 = icmp slt i64 %7, %1
br i1 %9, label %10, label %4
10: ; preds = %4
%11 = zext i32 %8 to i64
br label %12
12: ; preds = %10, %2
%13 = phi i64 [ 0, %2 ], [ %11, %10 ]
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ unique_print_header_sumary(int);
int /*<<< orphan*/ unique_print_simple_header();
void unique_print_header(int width) {
  unique_print_header_sumary(width);
  unique_print_simple_header();
}


x86 assembly (clang, -O0):
<unique_print_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <unique_print_header_sumary@plt>
mov    $0x0,%al
call   1030 <unique_print_simple_header@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unique_print_header>:
push   %rax
call   1040 <unique_print_header_sumary@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <unique_print_simple_header@plt>

LLVM IR (-O0):
define void @unique_print_header(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @unique_print_header_sumary(i32 %3)
%5 = call i32 (...) @unique_print_simple_header()
ret void
}

LLVM IR (-O2):
define void @unique_print_header(i32 %0) {
%2 = tail call i32 @unique_print_header_sumary(i32 %0)
%3 = tail call i32 (...) @unique_print_simple_header()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void putc_wrap(char c, int wrap, int *len) {
  if (wrap && *len >= wrap) {
    putchar('\n');
    *len = 0;
  }
  putchar(c);
  (*len)++;
}


x86 assembly (clang, -O0):
<putc_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1152 <putc_wrap+0x42>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
cmp    -0x8(%rbp),%eax
jl     1152 <putc_wrap+0x42>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc_wrap>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %edi,%ebp
test   %esi,%esi
je     1130 <putc_wrap+0x20>
cmp    %esi,(%rbx)
jl     1130 <putc_wrap+0x20>
mov    $0xa,%edi
call   1030 <putchar@plt>
movl   $0x0,(%rbx)
movsbl %bpl,%edi
call   1030 <putchar@plt>
addl   $0x1,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @putc_wrap(i8 signext %0, i32 %1, i32* %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32*
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = load i32, i32* %5
%13 = icmp sge i32 %11, %12
br i1 %13, label %14, label %17
14: ; preds = %9
%15 = call i32 @putchar(i8 signext 10)
%16 = load i32*, i32** %6
store i32 0, i32* %16
br label %17
17: ; preds = %14, %9, %3
%18 = load i8, i8* %4
%19 = call i32 @putchar(i8 signext %18)
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = add nsw i32 %21, 1
store i32 %22, i32* %20
ret void
}

LLVM IR (-O2):
define void @putc_wrap(i8 signext %0, i32 %1, i32* nocapture %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, %1
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 @putchar(i8 signext 10)
store i32 0, i32* %2
br label %10
10: ; preds = %8, %5, %3
%11 = tail call i32 @putchar(i8 signext %0)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
ret void
}
int syscall_info_flash(int sect, int *info) {
  return (*(int (**)())0x8c0000b8)(sect, info, 0, 0);
}


x86 assembly (clang, -O0):
<syscall_info_flash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x8c0000b8,%eax
mov    (%rax),%r8
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
xor    %ecx,%ecx
mov    %ecx,%edx
mov    $0x0,%al
call   *%r8
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall_info_flash>:
mov    $0x8c0000b8,%eax
mov    (%rax),%r8
xor    %edx,%edx
xor    %ecx,%ecx
xor    %eax,%eax
jmp    *%r8

LLVM IR (-O0):
define i32 @syscall_info_flash(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32 (...)*, i32 (...)** inttoptr (i64 2348810424 to i32 (...)**)
%6 = load i32, i32* %3
%7 = load i32*, i32** %4
%8 = bitcast i32 (...)* %5 to i32 (i32, i32*, i32, i32, ...)*
%9 = call i32 (i32, i32*, i32, i32, ...) %8(i32 %6, i32* %7, i32 0, i32 0)
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscall_info_flash(i32 %0, i32* %1) {
%3 = load i32 (i32, i32*, i32, i32, ...)*, i32 (i32, i32*, i32, i32, ...)** inttoptr (i64 2348810424 to i32 (i32, i32*, i32, i32, ...)**)
%4 = tail call i32 (i32, i32*, i32, i32, ...) %3(i32 %0, i32* %1, i32 0, i32 0)
ret i32 %4
}
int main(void) {
  int a;
  int b;
  int c;
  for (a = 22; a < 50; a++) {
    for (b = 23; b < 50; b += 5) {
      for (c = a; c < 100; c++) {
      }
    }
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x16,-0x8(%rbp)
cmpl   $0x32,-0x8(%rbp)
jge    1176 <main+0x76>
movl   $0x17,-0xc(%rbp)
cmpl   $0x32,-0xc(%rbp)
jge    1163 <main+0x63>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x64,-0x10(%rbp)
jge    1150 <main+0x50>
jmp    1142 <main+0x42>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1133 <main+0x33>
jmp    1155 <main+0x55>
mov    -0xc(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <main+0x23>
jmp    1168 <main+0x68>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 22, i32* %2
br label %5
5: ; preds = %26, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 50
br i1 %7, label %8, label %29
8: ; preds = %5
store i32 23, i32* %3
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 50
br i1 %11, label %12, label %25
12: ; preds = %9
%13 = load i32, i32* %2
store i32 %13, i32* %4
br label %14
14: ; preds = %18, %12
%15 = load i32, i32* %4
%16 = icmp slt i32 %15, 100
br i1 %16, label %17, label %21
17: ; preds = %14
br label %18
18: ; preds = %17
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %14
21: ; preds = %14
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 5
store i32 %24, i32* %3
br label %9
25: ; preds = %9
br label %26
26: ; preds = %25
%27 = load i32, i32* %2
%28 = add nsw i32 %27, 1
store i32 %28, i32* %2
br label %5
29: ; preds = %5
%30 = load i32, i32* %1
ret i32 %30
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void EVP_cleanup(void) {}


x86 assembly (clang, -O0):
<EVP_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_cleanup>:
ret

LLVM IR (-O0):
define void @EVP_cleanup() {
ret void
}

LLVM IR (-O2):
define void @EVP_cleanup() {
ret void
}
int main() {
  int a[5];
  int len = 0;
  _Bool c = nondet_bool();
  int i;
  while (c) {
    if (len == 4)
      len = 0;
    a[len] = 0;
    len++;
  }
  assert(len == 5);
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x24(%rbp)
mov    $0x0,%al
call   1040 <nondet_bool@plt>
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
mov    %al,-0x25(%rbp)
testb  $0x1,-0x25(%rbp)
je     117d <main+0x5d>
cmpl   $0x4,-0x24(%rbp)
jne    1163 <main+0x43>
movl   $0x0,-0x24(%rbp)
movslq -0x24(%rbp),%rax
movl   $0x0,-0x20(%rbp,%rax,4)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1148 <main+0x28>
cmpl   $0x5,-0x24(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    $0x1,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <nondet_bool@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
%6 = call i32 (...) @nondet_bool()
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i8
store i8 %8, i8* %4
br label %9
9: ; preds = %16, %0
%10 = load i8, i8* %4
%11 = trunc i8 %10 to i1
br i1 %11, label %12, label %22
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, 4
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 0, i32* %3
br label %16
16: ; preds = %15, %12
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 %18
store i32 0, i32* %19
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %9
22: ; preds = %9
%23 = load i32, i32* %3
%24 = icmp eq i32 %23, 5
%25 = zext i1 %24 to i32
%26 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %25)
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @nondet_bool()
%2 = icmp eq i32 %1, 0
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
ret i32 1
}
/* Variables and functions */
int maxArea(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int height[5] = {1, 1, 2, 3, 4};
  printf("%d\n", maxArea(height, 5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec5(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1040 <maxArea@plt>
mov    %eax,%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xee6(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xecb(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
call   1040 <maxArea@plt>
lea    0xec7(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.height = [5 x i32] [i32 1, i32 1, i32 2, i32 3, i32 4]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
store i32 0, i32* %1
%3 = bitcast [5 x i32]* %2 to i8*
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%5 = call i32 @maxArea(i32* %4, i32 5)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.height = [5 x i32] [i32 1, i32 1, i32 2, i32 3, i32 4]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @maxArea(i32* %3, i32 5)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cstartup_bss();
int /*<<< orphan*/ cstartup_rwdata();
void cstartup(void) {
  cstartup_rwdata();
  cstartup_bss();
}


x86 assembly (clang, -O0):
<cstartup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cstartup_rwdata@plt>
mov    $0x0,%al
call   1040 <cstartup_bss@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstartup>:
push   %rax
xor    %eax,%eax
call   1030 <cstartup_rwdata@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <cstartup_bss@plt>

LLVM IR (-O0):
define void @cstartup() {
%1 = call i32 (...) @cstartup_rwdata()
%2 = call i32 (...) @cstartup_bss()
ret void
}

LLVM IR (-O2):
define void @cstartup() {
%1 = tail call i32 (...) @cstartup_rwdata()
%2 = tail call i32 (...) @cstartup_bss()
ret void
}
int batadv_bla_tx(struct batadv_priv *bat_priv, struct sk_buff *skb,
                  short vid) {
  return 0;
}


x86 assembly (clang, -O0):
<batadv_bla_tx>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<batadv_bla_tx>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.batadv_priv = type opaque
%struct.sk_buff = type opaque
define i32 @batadv_bla_tx(%struct.batadv_priv* %0, %struct.sk_buff* %1, i16 signext %2) {
%4 = alloca %struct.batadv_priv*
%5 = alloca %struct.sk_buff*
%6 = alloca i16
store %struct.batadv_priv* %0, %struct.batadv_priv** %4
store %struct.sk_buff* %1, %struct.sk_buff** %5
store i16 %2, i16* %6
ret i32 0
}

LLVM IR (-O2):
%struct.batadv_priv = type opaque
%struct.sk_buff = type opaque
define i32 @batadv_bla_tx(%struct.batadv_priv* nocapture readnone %0, %struct.sk_buff* nocapture readnone %1, i16 signext %2) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ digitalWriteSerialArray(int, int /*<<< orphan*/ *, int);
void digitalWriteSerial(int fd, uint8_t data) {
  digitalWriteSerialArray(fd, &data, 1);
}


x86 assembly (clang, -O0):
<digitalWriteSerial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1030 <digitalWriteSerialArray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<digitalWriteSerial>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <digitalWriteSerialArray@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @digitalWriteSerial(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @digitalWriteSerialArray(i32 %5, i32* %4, i32 1)
ret void
}

LLVM IR (-O2):
define void @digitalWriteSerial(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @digitalWriteSerialArray(i32 %0, i32* %3, i32 1)
ret void
}
int do_031() { return 31; }


x86 assembly (clang, -O0):
<do_031>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_031>:
mov    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @do_031() {
ret i32 31
}

LLVM IR (-O2):
define i32 @do_031() {
ret i32 31
}
/* Variables and functions */
int /*<<< orphan*/ flashfsClearBuffer();
int /*<<< orphan*/ flashfsSetTailAddress(int /*<<< orphan*/);
int /*<<< orphan*/ m25p16_eraseCompletely();
void flashfsEraseCompletely() {
  m25p16_eraseCompletely();
  flashfsClearBuffer();
  flashfsSetTailAddress(0);
}


x86 assembly (clang, -O0):
<flashfsEraseCompletely>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <m25p16_eraseCompletely@plt>
mov    $0x0,%al
call   1030 <flashfsClearBuffer@plt>
xor    %edi,%edi
call   1040 <flashfsSetTailAddress@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashfsEraseCompletely>:
push   %rax
xor    %eax,%eax
call   1050 <m25p16_eraseCompletely@plt>
xor    %eax,%eax
call   1030 <flashfsClearBuffer@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <flashfsSetTailAddress@plt>

LLVM IR (-O0):
define void @flashfsEraseCompletely() {
%1 = call i32 (...) @m25p16_eraseCompletely()
%2 = call i32 (...) @flashfsClearBuffer()
%3 = call i32 @flashfsSetTailAddress(i32 0)
ret void
}

LLVM IR (-O2):
define void @flashfsEraseCompletely() {
%1 = tail call i32 (...) @m25p16_eraseCompletely()
%2 = tail call i32 (...) @flashfsClearBuffer()
%3 = tail call i32 @flashfsSetTailAddress(i32 0)
ret void
}
void usDelay(int d) {
  unsigned int i;
  for (i = 1; i <= d; i++) {
    asm("");
  }
}


x86 assembly (clang, -O0):
<usDelay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
ja     1128 <usDelay+0x28>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <usDelay+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usDelay>:
test   %edi,%edi
je     1117 <usDelay+0x17>
mov    $0x1,%eax
nopl   0x0(%rax)
add    $0x1,%eax
cmp    %edi,%eax
jbe    1110 <usDelay+0x10>
ret

LLVM IR (-O0):
define void @usDelay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp ule i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @usDelay(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ 1, %1 ]
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
%5 = add i32 %4, 1
%6 = icmp ugt i32 %5, %0
br i1 %6, label %7, label %3
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x2a() {
  Assert_real((isdigit(42) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              215, ("isdigit should be 0 for *"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x2a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xd7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x2a>:
push   %rax
mov    $0x2a,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xd7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for *\00"
define void @t_isdigit_0x2a() {
%1 = call i64 @isdigit(i32 42)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 215, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for *\00"
define void @t_isdigit_0x2a() {
%1 = tail call i64 @isdigit(i32 42)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 215, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t shift(uint64_t i, int sh) {
  int left;
  left = sh < 0;
  if (left)
    sh = -sh;
  if (sh > 64)
    return 0;
  else {
    if (left)
      return i << sh;
    else
      return i >> sh;
  }
}


x86 assembly (clang, -O0):
<shift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     112b <shift+0x2b>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x40,-0xc(%rbp)
jle    1141 <shift+0x41>
movl   $0x0,-0x4(%rbp)
jmp    1166 <shift+0x66>
cmpl   $0x0,-0x10(%rbp)
je     115b <shift+0x5b>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <shift+0x66>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift>:
mov    %esi,%ecx
neg    %ecx
cmovs  %esi,%ecx
xor    %eax,%eax
cmp    $0x40,%ecx
jg     111a <shift+0x1a>
test   %esi,%esi
js     1116 <shift+0x16>
sar    %cl,%edi
jmp    1118 <shift+0x18>
shl    %cl,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @shift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 0
%9 = zext i1 %8 to i32
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %5
%14 = sub nsw i32 0, %13
store i32 %14, i32* %5
br label %15
15: ; preds = %12, %2
%16 = load i32, i32* %5
%17 = icmp sgt i32 %16, 64
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 0, i32* %3
br label %30
19: ; preds = %15
%20 = load i32, i32* %6
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %26
22: ; preds = %19
%23 = load i32, i32* %4
%24 = load i32, i32* %5
%25 = shl i32 %23, %24
store i32 %25, i32* %3
br label %30
26: ; preds = %19
%27 = load i32, i32* %4
%28 = load i32, i32* %5
%29 = ashr i32 %27, %28
store i32 %29, i32* %3
br label %30
30: ; preds = %26, %22, %18
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @shift(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 0
%4 = sub nsw i32 0, %1
%5 = select i1 %3, i32 %4, i32 %1
%6 = icmp sgt i32 %5, 64
br i1 %6, label %12, label %7
7: ; preds = %2
br i1 %3, label %8, label %10
8: ; preds = %7
%9 = shl i32 %0, %5
br label %12
10: ; preds = %7
%11 = ashr i32 %0, %5
br label %12
12: ; preds = %2, %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ], [ 0, %2 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ i2c_ack_toggle(int);
char i2c_data_read();
int i2c_not_rcv_ack();
int /*<<< orphan*/ i2c_trx_pend();
int /*<<< orphan*/ i2c_trx_resume();
int i2c_receive_data(int ack, char *ch) {
  i2c_ack_toggle(ack);
  i2c_trx_resume();
  while (!i2c_trx_pend())
    ;
  *ch = i2c_data_read();
  return i2c_not_rcv_ack();
}


x86 assembly (clang, -O0):
<i2c_receive_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1070 <i2c_ack_toggle@plt>
mov    $0x0,%al
call   1050 <i2c_trx_resume@plt>
mov    $0x0,%al
call   1030 <i2c_trx_pend@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    118a <i2c_receive_data+0x3a>
jmp    118f <i2c_receive_data+0x3f>
jmp    116e <i2c_receive_data+0x1e>
mov    $0x0,%al
call   1040 <i2c_data_read@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    $0x0,%al
call   1060 <i2c_not_rcv_ack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_receive_data>:
push   %rbx
mov    %rsi,%rbx
call   1070 <i2c_ack_toggle@plt>
xor    %eax,%eax
call   1050 <i2c_trx_resume@plt>
xor    %eax,%eax
call   1030 <i2c_trx_pend@plt>
test   %eax,%eax
je     1160 <i2c_receive_data+0x10>
xor    %eax,%eax
call   1040 <i2c_data_read@plt>
mov    %al,(%rbx)
xor    %eax,%eax
pop    %rbx
jmp    1060 <i2c_not_rcv_ack@plt>

LLVM IR (-O0):
define i32 @i2c_receive_data(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @i2c_ack_toggle(i32 %5)
%7 = call i32 (...) @i2c_trx_resume()
br label %8
8: ; preds = %12, %2
%9 = call i32 (...) @i2c_trx_pend()
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br i1 %11, label %12, label %13
12: ; preds = %8
br label %8
13: ; preds = %8
%14 = call signext i8 (...) @i2c_data_read()
%15 = load i8*, i8** %4
store i8 %14, i8* %15
%16 = call i32 (...) @i2c_not_rcv_ack()
ret i32 %16
}

LLVM IR (-O2):
define i32 @i2c_receive_data(i32 %0, i8* nocapture writeonly %1) {
%3 = tail call i32 @i2c_ack_toggle(i32 %0)
%4 = tail call i32 (...) @i2c_trx_resume()
br label %5
5: ; preds = %5, %2
%6 = tail call i32 (...) @i2c_trx_pend()
%7 = icmp eq i32 %6, 0
br i1 %7, label %5, label %8
8: ; preds = %5
%9 = tail call signext i8 (...) @i2c_data_read()
store i8 %9, i8* %1
%10 = tail call i32 (...) @i2c_not_rcv_ack()
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mktime(struct tm *);
int /*<<< orphan*/ strptime(char const *, char *, struct tm *);
time_t strtotime(const char *s) {
  struct tm mytm;
  time_t t;
  strptime(s, "%d/%m/%Y %H:%M:%S", &mytm);
  t = mktime(&mytm);
  return t;
}


x86 assembly (clang, -O0):
<strtotime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1040 <strptime@plt>
lea    -0x10(%rbp),%rdi
call   1030 <mktime@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtotime>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rsi
lea    0x8(%rsp),%rbx
mov    %rbx,%rdx
call   1040 <strptime@plt>
mov    %rbx,%rdi
call   1030 <mktime@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [18 x i8] c"%d/%m/%Y %H:%M:%S\00"
define i32 @strtotime(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.tm
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strptime(i8* %5, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), %struct.tm* %3)
%7 = call i32 @mktime(%struct.tm* %3)
store i32 %7, i32* %4
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [18 x i8] c"%d/%m/%Y %H:%M:%S\00"
define i32 @strtotime(i8* %0) {
%2 = alloca %struct.tm
%3 = bitcast %struct.tm* %2 to i8*
%4 = call i32 @strptime(i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), %struct.tm* %2)
%5 = call i32 @mktime(%struct.tm* %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _Send1(unsigned char);
void LCD_X_Write01(unsigned char c) { _Send1(c); }


x86 assembly (clang, -O0):
<LCD_X_Write01>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <_Send1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_X_Write01>:
jmp    1030 <_Send1@plt>

LLVM IR (-O0):
define void @LCD_X_Write01(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @_Send1(i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @LCD_X_Write01(i8 zeroext %0) {
%2 = tail call i32 @_Send1(i8 zeroext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gl_setpalettecolors(int /*<<< orphan*/, int, void *);
void gl_setpalette(void *p) { gl_setpalettecolors(0, 256, p); }


x86 assembly (clang, -O0):
<gl_setpalette>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
xor    %edi,%edi
mov    $0x100,%esi
call   1030 <gl_setpalettecolors@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_setpalette>:
mov    %rdi,%rdx
xor    %edi,%edi
mov    $0x100,%esi
jmp    1030 <gl_setpalettecolors@plt>

LLVM IR (-O0):
define void @gl_setpalette(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gl_setpalettecolors(i32 0, i32 256, i8* %3)
ret void
}

LLVM IR (-O2):
define void @gl_setpalette(i8* %0) {
%2 = tail call i32 @gl_setpalettecolors(i32 0, i32 256, i8* %0)
ret void
}
int fun926() { return 926; }


x86 assembly (clang, -O0):
<fun926>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun926>:
mov    $0x39e,%eax
ret

LLVM IR (-O0):
define i32 @fun926() {
ret i32 926
}

LLVM IR (-O2):
define i32 @fun926() {
ret i32 926
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int const);
int main() {
  extern const int a;
  printf("%d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@a = external constant i32
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @a
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@a = external constant i32
define i32 @main() {
%1 = load i32, i32* @a
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int do_904() { return 904; }


x86 assembly (clang, -O0):
<do_904>:
push   %rbp
mov    %rsp,%rbp
mov    $0x388,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_904>:
mov    $0x388,%eax
ret

LLVM IR (-O0):
define i32 @do_904() {
ret i32 904
}

LLVM IR (-O2):
define i32 @do_904() {
ret i32 904
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memset(int *, int, int);
void pes_set_headerlength(uint8_t *p_pes, uint8_t i_length) {
  p_pes[6] = 0x80;
  p_pes[7] = 0x0;
  p_pes[8] = i_length;
  if (i_length > 0)
    memset(&p_pes[9], 0xff, i_length);
}


x86 assembly (clang, -O0):
<pes_set_headerlength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x80,0x18(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x1c(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x20(%rax)
cmpl   $0x0,-0xc(%rbp)
jle    115e <pes_set_headerlength+0x4e>
mov    -0x8(%rbp),%rdi
add    $0x24,%rdi
mov    -0xc(%rbp),%edx
mov    $0xff,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pes_set_headerlength>:
movq   $0x80,0x18(%rdi)
mov    %esi,0x20(%rdi)
test   %esi,%esi
jle    112f <pes_set_headerlength+0x1f>
mov    %esi,%edx
add    $0x24,%rdi
mov    $0xff,%esi
jmp    1030 <memset@plt>
ret

LLVM IR (-O0):
define void @pes_set_headerlength(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 6
store i32 128, i32* %6
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 7
store i32 0, i32* %8
%9 = load i32, i32* %4
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 8
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %2
%15 = load i32*, i32** %3
%16 = getelementptr inbounds i32, i32* %15, i64 9
%17 = load i32, i32* %4
%18 = call i32 @memset(i32* %16, i32 255, i32 %17)
br label %19
19: ; preds = %14, %2
ret void
}

LLVM IR (-O2):
define void @pes_set_headerlength(i32* %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 6
store i32 128, i32* %3
%4 = getelementptr inbounds i32, i32* %0, i64 7
store i32 0, i32* %4
%5 = getelementptr inbounds i32, i32* %0, i64 8
store i32 %1, i32* %5
%6 = icmp sgt i32 %1, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = getelementptr inbounds i32, i32* %0, i64 9
%9 = tail call i32 @memset(i32* %8, i32 255, i32 %1)
br label %10
10: ; preds = %7, %2
ret void
}
void msg_print(s) char *s;
{ printf("%s", s); }


x86 assembly (clang, -O0):
<msg_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_print>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @msg_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @msg_print(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int get_dologinterp_in(int degentable, int whichfun) {
  int whichinterp1, whichinterp2, loginterp;
  int qi;
  loginterp = 0;
  return (loginterp);
}


x86 assembly (clang, -O0):
<get_dologinterp_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_dologinterp_in>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_dologinterp_in(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %7
%9 = load i32, i32* %7
ret i32 %9
}

LLVM IR (-O2):
define i32 @get_dologinterp_in(i32 %0, i32 %1) {
ret i32 0
}