xunge/DecIR huggingface dataset:
/* Type definitions */
typedef size_t uint64_t;
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t contains0_rec_(uint64_t len, int64_t *arr, uint64_t i) {
  if (i >= len) {
    return 0;
  } else if (arr[i] == 0) {
    return 1;
  } else {
    return contains0_rec_(len, arr, i + 1);
  }
}


x86 assembly (clang, -O0):
<contains0_rec_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jb     113f <contains0_rec_+0x2f>
movq   $0x0,-0x8(%rbp)
jmp    1178 <contains0_rec_+0x68>
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
jne    115f <contains0_rec_+0x4f>
movq   $0x1,-0x8(%rbp)
jmp    1178 <contains0_rec_+0x68>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
add    $0x1,%rdx
call   1030 <contains0_rec_@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<contains0_rec_>:
xor    %eax,%eax
cmp    %rdi,%rdx
jae    1120 <contains0_rec_+0x20>
nopw   0x0(%rax,%rax,1)
cmpq   $0x0,(%rsi,%rdx,8)
je     1121 <contains0_rec_+0x21>
add    $0x1,%rdx
cmp    %rdx,%rdi
jne    1110 <contains0_rec_+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @contains0_rec_(i64 %0, i64* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %5
store i64* %1, i64** %6
store i64 %2, i64* %7
%8 = load i64, i64* %7
%9 = load i64, i64* %5
%10 = icmp uge i64 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
store i64 0, i64* %4
br label %25
12: ; preds = %3
%13 = load i64*, i64** %6
%14 = load i64, i64* %7
%15 = getelementptr inbounds i64, i64* %13, i64 %14
%16 = load i64, i64* %15
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %12
store i64 1, i64* %4
br label %25
19: ; preds = %12
%20 = load i64, i64* %5
%21 = load i64*, i64** %6
%22 = load i64, i64* %7
%23 = add i64 %22, 1
%24 = call i64 @contains0_rec_(i64 %20, i64* %21, i64 %23)
store i64 %24, i64* %4
br label %25
25: ; preds = %19, %18, %11
%26 = load i64, i64* %4
ret i64 %26
}

LLVM IR (-O2):
define i64 @contains0_rec_(i64 %0, i64* nocapture %1, i64 %2) {
%4 = icmp ult i64 %2, %0
br i1 %4, label %7, label %13
5: ; preds = %7
%6 = icmp eq i64 %12, %0
br i1 %6, label %13, label %7
7: ; preds = %3, %5
%8 = phi i64 [ %12, %5 ], [ %2, %3 ]
%9 = getelementptr inbounds i64, i64* %1, i64 %8
%10 = load i64, i64* %9
%11 = icmp eq i64 %10, 0
%12 = add i64 %8, 1
br i1 %11, label %13, label %5
13: ; preds = %5, %7, %3
%14 = phi i64 [ 0, %3 ], [ 1, %7 ], [ 0, %5 ]
ret i64 %14
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
uint8_t zig_subw_u8(uint8_t lhs, uint8_t rhs, uint8_t max) {
  if (lhs < rhs) {
    return max - rhs - lhs + 1;
  } else {
    return lhs - rhs;
  }
}


x86 assembly (clang, -O0):
<zig_subw_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    1137 <zig_subw_u8+0x37>
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
sub    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1143 <zig_subw_u8+0x43>
mov    -0x10(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zig_subw_u8>:
sub    %rdi,%rdx
sub    %rsi,%rdx
lea    0x1(%rdx),%rax
sub    %rsi,%rdi
cmovge %rdi,%rax
ret

LLVM IR (-O0):
define i64 @zig_subw_u8(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %3
%12 = load i64, i64* %7
%13 = load i64, i64* %6
%14 = sub nsw i64 %12, %13
%15 = load i64, i64* %5
%16 = sub nsw i64 %14, %15
%17 = add nsw i64 %16, 1
store i64 %17, i64* %4
br label %22
18: ; preds = %3
%19 = load i64, i64* %5
%20 = load i64, i64* %6
%21 = sub nsw i64 %19, %20
store i64 %21, i64* %4
br label %22
22: ; preds = %18, %11
%23 = load i64, i64* %4
ret i64 %23
}

LLVM IR (-O2):
define i64 @zig_subw_u8(i64 %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %0, %1
%5 = add i64 %0, %1
%6 = sub i64 1, %5
%7 = add i64 %6, %2
%8 = sub nsw i64 %0, %1
%9 = select i1 %4, i64 %7, i64 %8
ret i64 %9
}
void FaultISR(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<FaultISR>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <FaultISR+0x9>
jmp    1109 <FaultISR+0x9>

x86 assembly (clang, -O2):
<FaultISR>:
jmp    1100 <FaultISR>

LLVM IR (-O0):
define void @FaultISR() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @FaultISR() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int isPermutation(char *, char *);
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  if (argc > 2) {
    return (isPermutation(argv[1], argv[2]));
  }
  printf("Not enougth arguments\n");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jle    115d <main+0x3d>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1040 <isPermutation@plt>
mov    %eax,-0x4(%rbp)
jmp    1170 <main+0x50>
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x3,%edi
jl     1134 <main+0x14>
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
pop    %rax
jmp    1040 <isPermutation@plt>
lea    0xec5(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Not enougth arguments\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 2
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 2
%14 = load i8*, i8** %13
%15 = call i32 @isPermutation(i8* %11, i8* %14)
store i32 %15, i32* %3
br label %18
16: ; preds = %2
%17 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %3
br label %18
18: ; preds = %16, %8
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@str = [22 x i8] c"Not enougth arguments\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 2
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8*, i8** %1, i64 2
%8 = load i8*, i8** %7
%9 = tail call i32 @isPermutation(i8* %6, i8* %8)
br label %12
10: ; preds = %2
%11 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
br label %12
12: ; preds = %10, %4
%13 = phi i32 [ %9, %4 ], [ 1, %10 ]
ret i32 %13
}
int test_imm_BAint64_highword_reg(long long val) {
  return ((val >> 32) & (0xBA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BAint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xba,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BAint64_highword_reg>:
movabs $0xba00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BAint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 186
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BAint64_highword_reg(i64 %0) {
%2 = and i64 %0, 798863917056
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ENOMEM;
int /*<<< orphan*/ errno;
int sys_open(const char *name, int flags, int mode) {
  errno = ENOMEM;
  return -1;
}


x86 assembly (clang, -O0):
<sys_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_open>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOMEM = global i32 0
@errno = global i32 0
define i32 @sys_open(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENOMEM
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOMEM = global i32 0
@errno = global i32 0
define i32 @sys_open(i8* nocapture readnone %0, i32 %1, i32 %2) {
%4 = load i32, i32* @ENOMEM
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
scalar_t__ isdigit(unsigned char);
int numeric(unsigned char x) {
  if (isdigit(x))
    return x - '0';
  return x - 97 + 10;
}


x86 assembly (clang, -O0):
<numeric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     1140 <numeric+0x30>
movzbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    114d <numeric+0x3d>
movzbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeric>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
lea    -0x30(%rbx),%ecx
add    $0xffffffa9,%ebx
test   %rax,%rax
cmovne %ecx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @numeric(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isdigit(i8 zeroext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = sub nsw i32 %9, 48
store i32 %10, i32* %2
br label %16
11: ; preds = %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = sub nsw i32 %13, 97
%15 = add nsw i32 %14, 10
store i32 %15, i32* %2
br label %16
16: ; preds = %11, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @numeric(i8 zeroext %0) {
%2 = tail call i64 @isdigit(i8 zeroext %0)
%3 = icmp eq i64 %2, 0
%4 = zext i8 %0 to i32
%5 = select i1 %3, i32 -87, i32 -48
%6 = add nsw i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ done(int /*<<< orphan*/);
int /*<<< orphan*/ statistics();
over() {
  statistics();
  done(0);
}


x86 assembly (clang, -O0):
<over>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <statistics@plt>
xor    %edi,%edi
call   1030 <done@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<over>:
push   %rax
xor    %eax,%eax
call   1040 <statistics@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <done@plt>

LLVM IR (-O0):
define i32 @over() {
%1 = alloca i32
%2 = call i32 (...) @statistics()
%3 = call i32 @done(i32 0)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @over() {
%1 = tail call i32 (...) @statistics()
%2 = tail call i32 @done(i32 0)
ret i32 undef
}
/* Type definitions */
typedef int time_t;
struct stat {
  int st_mtime;
};

/* Variables and functions */
int stat(char const *, struct stat *);
time_t Sys_FS_FileMTime(const char *filename) {
  struct stat buffer;
  int status;
  status = stat(filename, &buffer);
  if (status) {
    return -1;
  }
  return buffer.st_mtime;
}


x86 assembly (clang, -O0):
<Sys_FS_FileMTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1142 <Sys_FS_FileMTime+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    1148 <Sys_FS_FileMTime+0x38>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_FS_FileMTime>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
neg    %eax
sbb    %eax,%eax
or     (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @Sys_FS_FileMTime(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @stat(i8* %6, %struct.stat* %4)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %14
11: ; preds = %1
%12 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%13 = load i32, i32* %12
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @Sys_FS_FileMTime(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i32 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i32, i32* %6
%8 = select i1 %5, i32 %7, i32 -1
ret i32 %8
}
void g_dataset_foreach() {}


x86 assembly (clang, -O0):
<g_dataset_foreach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_dataset_foreach>:
ret

LLVM IR (-O0):
define void @g_dataset_foreach() {
ret void
}

LLVM IR (-O2):
define void @g_dataset_foreach() {
ret void
}
/* Variables and functions */
int func(int *, int *);
int /*<<< orphan*/ printf(char *, int);
int array(int argc, char **argv) {
  int foo[10];
  int bar[5];
  foo[7] = 137;
  bar[2] = 3;
  int x = func(foo, bar);
  printf("x=%d", x);
  return 0;
}


x86 assembly (clang, -O0):
<array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x89,-0x24(%rbp)
movl   $0x3,-0x58(%rbp)
lea    -0x40(%rbp),%rdi
lea    -0x60(%rbp),%rsi
call   1040 <func@plt>
mov    %eax,-0x64(%rbp)
mov    -0x64(%rbp),%esi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<array>:
sub    $0x48,%rsp
movl   $0x89,0x3c(%rsp)
movl   $0x3,0x8(%rsp)
lea    0x20(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <func@plt>
lea    0xeb8(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x48,%rsp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"x=%d\00"
define i32 @array(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [10 x i32]
%6 = alloca [5 x i32]
%7 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%8 = getelementptr inbounds [10 x i32], [10 x i32]* %5, i64 0, i64 7
store i32 137, i32* %8
%9 = getelementptr inbounds [5 x i32], [5 x i32]* %6, i64 0, i64 2
store i32 3, i32* %9
%10 = getelementptr inbounds [10 x i32], [10 x i32]* %5, i64 0, i64 0
%11 = getelementptr inbounds [5 x i32], [5 x i32]* %6, i64 0, i64 0
%12 = call i32 @func(i32* %10, i32* %11)
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"x=%d\00"
define i32 @array(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [10 x i32]
%4 = alloca [5 x i32]
%5 = bitcast [10 x i32]* %3 to i8*
%6 = bitcast [5 x i32]* %4 to i8*
%7 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 7
store i32 137, i32* %7
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %4, i64 0, i64 2
store i32 3, i32* %8
%9 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 0
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %4, i64 0, i64 0
%11 = call i32 @func(i32* %9, i32* %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %11)
ret i32 0
}
void ADC3_IRQHandler(void) {}


x86 assembly (clang, -O0):
<ADC3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC3_IRQHandler>:
ret

LLVM IR (-O0):
define void @ADC3_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @ADC3_IRQHandler() {
ret void
}
/* Type definitions */
struct pcibx_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pcibx_write(struct pcibx_device *, int, int);
int /*<<< orphan*/ prsendinfo(char *);
void pcibx_cmd_aux5(struct pcibx_device *dev, int on) {
  if (on) {
    prsendinfo("Aux 5V ON");
    pcibx_write(dev, 0x65, 0);
  } else {
    prsendinfo("Aux 5V OFF");
    pcibx_write(dev, 0x65, 1);
  }
}


x86 assembly (clang, -O0):
<pcibx_cmd_aux5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115a <pcibx_cmd_aux5+0x3a>
lea    0xec0(%rip),%rdi
call   1040 <prsendinfo@plt>
mov    -0x8(%rbp),%rdi
mov    $0x65,%esi
xor    %edx,%edx
call   1030 <pcibx_write@plt>
jmp    1179 <pcibx_cmd_aux5+0x59>
lea    0xea9(%rip),%rdi
call   1040 <prsendinfo@plt>
mov    -0x8(%rbp),%rdi
mov    $0x65,%esi
mov    $0x1,%edx
call   1030 <pcibx_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcibx_cmd_aux5>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
test   %esi,%esi
sete   %bpl
lea    0xed5(%rip),%rax
lea    0xec4(%rip),%rdi
cmove  %rax,%rdi
call   1040 <prsendinfo@plt>
mov    %rbx,%rdi
mov    $0x65,%esi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <pcibx_write@plt>

LLVM IR (-O0):
%struct.pcibx_device = type { i32 }
@.str = [10 x i8] c"Aux 5V ON\00"
@.str.1 = [11 x i8] c"Aux 5V OFF\00"
define void @pcibx_cmd_aux5(%struct.pcibx_device* %0, i32 %1) {
%3 = alloca %struct.pcibx_device*
%4 = alloca i32
store %struct.pcibx_device* %0, %struct.pcibx_device** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = call i32 @prsendinfo(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%9 = load %struct.pcibx_device*, %struct.pcibx_device** %3
%10 = call i32 @pcibx_write(%struct.pcibx_device* %9, i32 101, i32 0)
br label %15
11: ; preds = %2
%12 = call i32 @prsendinfo(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%13 = load %struct.pcibx_device*, %struct.pcibx_device** %3
%14 = call i32 @pcibx_write(%struct.pcibx_device* %13, i32 101, i32 1)
br label %15
15: ; preds = %11, %7
ret void
}

LLVM IR (-O2):
%struct.pcibx_device = type { i32 }
@.str = [10 x i8] c"Aux 5V ON\00"
@.str.1 = [11 x i8] c"Aux 5V OFF\00"
define void @pcibx_cmd_aux5(%struct.pcibx_device* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
%5 = zext i1 %3 to i32
%6 = tail call i32 @prsendinfo(i8* %4)
%7 = tail call i32 @pcibx_write(%struct.pcibx_device* %0, i32 101, i32 %5)
ret void
}
/* Type definitions */
struct mempool {
  int dummy;
};

/* Variables and functions */
void *mp_alloc_fast_noalign(struct mempool *, unsigned int);
void *mp_alloc_noalign(struct mempool *pool, unsigned size) {
  return mp_alloc_fast_noalign(pool, size);
}


x86 assembly (clang, -O0):
<mp_alloc_noalign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <mp_alloc_fast_noalign@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_alloc_noalign>:
jmp    1030 <mp_alloc_fast_noalign@plt>

LLVM IR (-O0):
%struct.mempool = type { i32 }
define i8* @mp_alloc_noalign(%struct.mempool* %0, i32 %1) {
%3 = alloca %struct.mempool*
%4 = alloca i32
store %struct.mempool* %0, %struct.mempool** %3
store i32 %1, i32* %4
%5 = load %struct.mempool*, %struct.mempool** %3
%6 = load i32, i32* %4
%7 = call i8* @mp_alloc_fast_noalign(%struct.mempool* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
%struct.mempool = type { i32 }
define i8* @mp_alloc_noalign(%struct.mempool* %0, i32 %1) {
%3 = tail call i8* @mp_alloc_fast_noalign(%struct.mempool* %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ log_print(char *);
int /*<<< orphan*/ system(char *);
void SSH_start(unsigned char x) {
  if (x) {
    log_print("SSH daemon starting ...\n");
    system("service ssh start");
  } else {
    log_print("SSH daemon stopping ...\n");
    system("service ssh stop");
  }
}


x86 assembly (clang, -O0):
<SSH_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1155 <SSH_start+0x35>
lea    0xec1(%rip),%rdi
call   1040 <log_print@plt>
lea    0xece(%rip),%rdi
call   1030 <system@plt>
jmp    116d <SSH_start+0x4d>
lea    0xecf(%rip),%rdi
call   1040 <log_print@plt>
lea    0xedc(%rip),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSH_start>:
push   %rbx
test   %edi,%edi
lea    0xf01(%rip),%rax
lea    0xecf(%rip),%rdi
cmove  %rax,%rdi
lea    0xf08(%rip),%rax
lea    0xed6(%rip),%rbx
cmove  %rax,%rbx
call   1040 <log_print@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"SSH daemon starting ...\0A\00"
@.str.1 = [18 x i8] c"service ssh start\00"
@.str.2 = [25 x i8] c"SSH daemon stopping ...\0A\00"
@.str.3 = [17 x i8] c"service ssh stop\00"
define void @SSH_start(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = call i32 @log_print(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @system(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
br label %11
8: ; preds = %1
%9 = call i32 @log_print(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%10 = call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.3, i64 0, i64 0))
br label %11
11: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"SSH daemon starting ...\0A\00"
@.str.1 = [18 x i8] c"service ssh start\00"
@.str.2 = [25 x i8] c"SSH daemon stopping ...\0A\00"
@.str.3 = [17 x i8] c"service ssh stop\00"
define void @SSH_start(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
%4 = select i1 %2, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i32 @log_print(i8* %3)
%6 = tail call i32 @system(i8* %4)
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRB3_set(void) { return U_WMRCORENONE_set("U_WMRB3"); }


x86 assembly (clang, -O0):
<U_WMRB3_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRB3_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRB3\00"
define i8* @U_WMRB3_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRB3\00"
define i8* @U_WMRB3_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int f(int *a) {
  int t = *a;
  unsigned *b = (unsigned *)a;
  int *c = (int *)b;
  return *c + t;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    (%rdi),%eax
add    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i32*, i32** %2
store i32* %8, i32** %4
%9 = load i32*, i32** %4
store i32* %9, i32** %5
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = load i32, i32* %3
%13 = add nsw i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @f(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl nsw i32 %2, 1
ret i32 %3
}
void DH_new_method(void) {}


x86 assembly (clang, -O0):
<DH_new_method>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DH_new_method>:
ret

LLVM IR (-O0):
define void @DH_new_method() {
ret void
}

LLVM IR (-O2):
define void @DH_new_method() {
ret void
}
double mat_norm_squared_d3(const double a[3]) {
  return a[0] * a[0] + a[1] * a[1] + a[2] * a[2];
}


x86 assembly (clang, -O0):
<mat_norm_squared_d3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_norm_squared_d3>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @mat_norm_squared_d3(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
ret double %23
}

LLVM IR (-O2):
define double @mat_norm_squared_d3(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
ret double %9
}
/* Variables and functions */
int SIGINT;
int scalanative_libc_sigint() { return SIGINT; }


x86 assembly (clang, -O0):
<scalanative_libc_sigint>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalanative_libc_sigint>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SIGINT = global i32 0
define i32 @scalanative_libc_sigint() {
%1 = load i32, i32* @SIGINT
ret i32 %1
}

LLVM IR (-O2):
@SIGINT = global i32 0
define i32 @scalanative_libc_sigint() {
%1 = load i32, i32* @SIGINT
ret i32 %1
}
void rop3_204_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  *D = (S & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_204_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_204_1_0>:
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_204_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %5
%8 = zext i8 %7 to i32
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = xor i32 %10, -1
%12 = and i32 %8, %11
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = and i32 %15, %17
%19 = or i32 %12, %18
%20 = trunc i32 %19 to i8
%21 = load i8*, i8** %4
store i8 %20, i8* %21
ret void
}

LLVM IR (-O2):
define void @rop3_204_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %1
store i8 %5, i8* %0
ret void
}
int test_imm_C8uint32_reg(unsigned int val) {
  return ((val) & (0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xc8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8uint32_reg>:
test   $0xc8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 200
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_C8uint32_reg(i32 %0) {
%2 = and i32 %0, 200
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void SSMR3PutU16(void) {}


x86 assembly (clang, -O0):
<SSMR3PutU16>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSMR3PutU16>:
ret

LLVM IR (-O0):
define void @SSMR3PutU16() {
ret void
}

LLVM IR (-O2):
define void @SSMR3PutU16() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cpc_key_press(int);
int /*<<< orphan*/ cpc_key_unpress(int);
void Joy_Opqa_Right(int value) {
  if (value) {
    cpc_key_press(0x33);
  } else {
    cpc_key_unpress(0x33);
  };
}


x86 assembly (clang, -O0):
<Joy_Opqa_Right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1144 <Joy_Opqa_Right+0x24>
mov    $0x33,%edi
call   1030 <cpc_key_press@plt>
jmp    114e <Joy_Opqa_Right+0x2e>
mov    $0x33,%edi
call   1040 <cpc_key_unpress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Joy_Opqa_Right>:
test   %edi,%edi
je     112e <Joy_Opqa_Right+0xe>
mov    $0x33,%edi
jmp    1030 <cpc_key_press@plt>
mov    $0x33,%edi
jmp    1040 <cpc_key_unpress@plt>

LLVM IR (-O0):
define void @Joy_Opqa_Right(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @cpc_key_press(i32 51)
br label %9
7: ; preds = %1
%8 = call i32 @cpc_key_unpress(i32 51)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @Joy_Opqa_Right(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @cpc_key_press(i32 51)
br label %7
5: ; preds = %1
%6 = tail call i32 @cpc_key_unpress(i32 51)
br label %7
7: ; preds = %5, %3
ret void
}
int test_imm_ADuint32_reg(unsigned int val) {
  return ((val) & (0xAD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ADuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xad,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ADuint32_reg>:
test   $0xad,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ADuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 173
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_ADuint32_reg(i32 %0) {
%2 = and i32 %0, 173
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int get_index(int v, int n, int *arr) {
  for (int i = 0; i < v; i++) {
    if (arr[i] == v) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<get_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1153 <get_index+0x53>
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x8(%rbp),%eax
jne    1140 <get_index+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <get_index+0x5a>
jmp    1145 <get_index+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <get_index+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_index>:
mov    $0xffffffff,%eax
test   %edi,%edi
jle    111e <get_index+0x1e>
mov    %edi,%ecx
xor    %esi,%esi
nopl   (%rax)
cmp    %ecx,(%rdx,%rsi,4)
je     111f <get_index+0x1f>
add    $0x1,%rsi
cmp    %rsi,%rcx
jne    1110 <get_index+0x10>
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @get_index(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %5
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %7
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %5
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @get_index(i32 %0, i32 %1, i32* nocapture %2) {
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %0 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %2, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int owen_issupportdevice(char *device) {
  printf("Test device: %s\n", device);
  return 0;
}


x86 assembly (clang, -O0):
<owen_issupportdevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<owen_issupportdevice>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Test device: %s\0A\00"
define i32 @owen_issupportdevice(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Test device: %s\0A\00"
define i32 @owen_issupportdevice(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
unsigned int ick_setbitcount(unsigned int x) {
  register unsigned int r = 0;
  while (x) {
    if (x & 1)
      r++;
    x >>= 1;
  }
  return r;
}


x86 assembly (clang, -O0):
<ick_setbitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <ick_setbitcount+0x3e>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1130 <ick_setbitcount+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <ick_setbitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ick_setbitcount>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <ick_setbitcount+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <ick_setbitcount+0x10>
ret

LLVM IR (-O0):
define i32 @ick_setbitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i32, i32* %2
%16 = lshr i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @ick_setbitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
/* Variables and functions */
unsigned long ntohs(unsigned short);
unsigned long anp_sys_ntohs(unsigned short s) { return ntohs(s); }


x86 assembly (clang, -O0):
<anp_sys_ntohs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<anp_sys_ntohs>:
jmp    1030 <ntohs@plt>

LLVM IR (-O0):
define i64 @anp_sys_ntohs(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call i64 @ntohs(i16 zeroext %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @anp_sys_ntohs(i16 zeroext %0) {
%2 = tail call i64 @ntohs(i16 zeroext %0)
ret i64 %2
}
extern int memcmp(const void *cs, const void *ct, int count) {
  register int __res __asm__("ax");
  __asm__("cld\n\t"
          "repe\n\t"
          "cmpsb\n\t"
          "je 1f\n\t"
          "movl $1,%%eax\n\t"
          "jl 1f\n\t"
          "negl %%eax\n"
          "1:"
          : "=a"(__res)
          : "0"(0), "D"(cs), "S"(ct), "c"(count));
  return __res;
}


x86 assembly (clang, -O0):
<memcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%ecx
xor    %eax,%eax
cld
repz cmpsb %es:(%rdi),%ds:(%rsi)
je     1132 <memcmp+0x32>
mov    $0x1,%eax
jl     1132 <memcmp+0x32>
neg    %eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcmp>:
mov    %edx,%ecx
xor    %eax,%eax
cld
repz cmpsb %es:(%rdi),%ds:(%rsi)
je     1112 <memcmp+0x12>
mov    $0x1,%eax
jl     1112 <memcmp+0x12>
neg    %eax
ret

LLVM IR (-O0):
define i32 @memcmp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 asm "cld\0A\09repe\0A\09cmpsb\0A\09je 1f\0A\09movl $$1,%eax\0A\09jl 1f\0A\09negl %eax\0A1:", "={ax},0,{di},{si},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0, i8* %8, i8* %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @memcmp(i8* readnone %0, i8* readnone %1, i32 %2) {
%4 = tail call i32 asm "cld\0A\09repe\0A\09cmpsb\0A\09je 1f\0A\09movl $$1,%eax\0A\09jl 1f\0A\09negl %eax\0A1:", "={ax},0,{di},{si},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0, i8* %0, i8* %1, i32 %2)
ret i32 %4
}
void fn2(short *s, long *l) {}


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
ret

LLVM IR (-O0):
define void @fn2(i16* %0, i64* %1) {
%3 = alloca i16*
%4 = alloca i64*
store i16* %0, i16** %3
store i64* %1, i64** %4
ret void
}

LLVM IR (-O2):
define void @fn2(i16* nocapture %0, i64* nocapture %1) {
ret void
}
BOOST_AUTO_TEST_CASE(arcsech) { TESTCASE1(arcsech, 1, 0); }


x86 assembly (clang, -O0):
<BOOST_AUTO_TEST_CASE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x1,%esi
xor    %edx,%edx
mov    $0x0,%al
call   1030 <TESTCASE1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BOOST_AUTO_TEST_CASE>:
mov    $0x1,%esi
xor    %edx,%edx
xor    %eax,%eax
jmp    1030 <TESTCASE1@plt>

LLVM IR (-O0):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE1 to i32 (i32, i32, i32, ...)*)(i32 %4, i32 1, i32 0)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE1 to i32 (i32, i32, i32, ...)*)(i32 %0, i32 1, i32 0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, int);
void print_error(char *s, int lineno) {
  char str[256];
  sprintf(str, "%s (line %d)", s, lineno);
  perror(str);
  return;
}


x86 assembly (clang, -O0):
<print_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xeb9(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x110(%rbp),%rdi
call   1030 <perror@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_error>:
push   %rbx
sub    $0x100,%rsp
mov    %esi,%ecx
mov    %rdi,%rdx
lea    0xecc(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <perror@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"%s (line %d)\00"
define void @print_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %7, i32 %8)
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%11 = call i32 @perror(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"%s (line %d)\00"
define void @print_error(i8* %0, i32 %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%6 = call i32 @perror(i8* %4)
ret void
}
/* Variables and functions */
int ad_read_26();
int ts_calibrate_read() {
  int ret = -1;
  while (ret < 0) {
    ret = ad_read_26();
  }
  return ret;
}


x86 assembly (clang, -O0):
<ts_calibrate_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1138 <ts_calibrate_read+0x28>
mov    $0x0,%al
call   1030 <ad_read_26@plt>
mov    %eax,-0x4(%rbp)
jmp    111f <ts_calibrate_read+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_calibrate_read>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <ad_read_26@plt>
test   %eax,%eax
js     1120 <ts_calibrate_read+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ts_calibrate_read() {
%1 = alloca i32
store i32 -1, i32* %1
br label %2
2: ; preds = %5, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = call i32 (...) @ad_read_26()
store i32 %6, i32* %1
br label %2
7: ; preds = %2
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @ts_calibrate_read() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @ad_read_26()
%3 = icmp slt i32 %2, 0
br i1 %3, label %1, label %4
4: ; preds = %1
ret i32 %2
}
void iop13xx_msi_init(void) { return; }


x86 assembly (clang, -O0):
<iop13xx_msi_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iop13xx_msi_init>:
ret

LLVM IR (-O0):
define void @iop13xx_msi_init() {
ret void
}

LLVM IR (-O2):
define void @iop13xx_msi_init() {
ret void
}
regx0indreg1_set(r0, r1, x0, x1, p0, p1) char r0, r1;
char *p0, *p1;
{ (p0[x0]) = (*p1); }


x86 assembly (clang, -O0):
<regx0indreg1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%dl
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0indreg1_set>:
mov    (%r9),%al
movslq %edx,%rcx
mov    %al,(%r8,%rcx,1)
ret

LLVM IR (-O0):
define i32 @regx0indreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %13
%17 = load i8, i8* %16
%18 = load i8*, i8** %12
%19 = load i32, i32* %10
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @regx0indreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture writeonly %4, i8* nocapture %5) {
%7 = load i8, i8* %5
%8 = sext i32 %2 to i64
%9 = getelementptr inbounds i8, i8* %4, i64 %8
store i8 %7, i8* %9
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint8_t is_little_endian() {
  uint16_t temp = 0xaabb;
  return (*((uint8_t *)&temp) == 0xaa) ? 0 : 1;
}


x86 assembly (clang, -O0):
<is_little_endian>:
push   %rbp
mov    %rsp,%rbp
movl   $0xaabb,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0xaa,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_little_endian() {
%1 = alloca i32
store i32 43707, i32* %1
%2 = load i32, i32* %1
%3 = icmp eq i32 %2, 170
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_little_endian() {
ret i32 1
}