#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned char fr_chip_read(unsigned long);
void fr_wait_toggle_bit(unsigned long address) {
  unsigned char a, b;
  do {
    a = fr_chip_read(address);
    b = fr_chip_read(address);
    if (a == b) {
      a = fr_chip_read(address);
      b = fr_chip_read(address);
    }
  } while (a != b);
}


x86 assembly (clang, -O0):
<fr_wait_toggle_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fr_chip_read@plt>
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fr_chip_read@plt>
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
cmp    %ecx,%eax
jne    115c <fr_wait_toggle_bit+0x4c>
mov    -0x8(%rbp),%rdi
call   1030 <fr_chip_read@plt>
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fr_chip_read@plt>
mov    %al,-0xa(%rbp)
jmp    1161 <fr_wait_toggle_bit+0x51>
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
cmp    %ecx,%eax
jne    111c <fr_wait_toggle_bit+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fr_wait_toggle_bit>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
jmp    1124 <fr_wait_toggle_bit+0x14>
nopl   0x0(%rax)
cmp    %al,%bl
je     114e <fr_wait_toggle_bit+0x3e>
mov    %r14,%rdi
call   1030 <fr_chip_read@plt>
mov    %eax,%ebx
mov    %r14,%rdi
call   1030 <fr_chip_read@plt>
cmp    %al,%bl
jne    1120 <fr_wait_toggle_bit+0x10>
mov    %r14,%rdi
call   1030 <fr_chip_read@plt>
mov    %eax,%ebx
mov    %r14,%rdi
call   1030 <fr_chip_read@plt>
jmp    1120 <fr_wait_toggle_bit+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @fr_wait_toggle_bit(i64 %0) {
%2 = alloca i64
%3 = alloca i8
%4 = alloca i8
store i64 %0, i64* %2
br label %5
5: ; preds = %21, %1
%6 = load i64, i64* %2
%7 = call zeroext i8 @fr_chip_read(i64 %6)
store i8 %7, i8* %3
%8 = load i64, i64* %2
%9 = call zeroext i8 @fr_chip_read(i64 %8)
store i8 %9, i8* %4
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = load i8, i8* %4
%13 = zext i8 %12 to i32
%14 = icmp eq i32 %11, %13
br i1 %14, label %15, label %20
15: ; preds = %5
%16 = load i64, i64* %2
%17 = call zeroext i8 @fr_chip_read(i64 %16)
store i8 %17, i8* %3
%18 = load i64, i64* %2
%19 = call zeroext i8 @fr_chip_read(i64 %18)
store i8 %19, i8* %4
br label %20
20: ; preds = %15, %5
br label %21
21: ; preds = %20
%22 = load i8, i8* %3
%23 = zext i8 %22 to i32
%24 = load i8, i8* %4
%25 = zext i8 %24 to i32
%26 = icmp ne i32 %23, %25
br i1 %26, label %5, label %27
27: ; preds = %21
ret void
}

LLVM IR (-O2):
define void @fr_wait_toggle_bit(i64 %0) {
br label %2
2: ; preds = %9, %1
%3 = tail call zeroext i8 @fr_chip_read(i64 %0)
%4 = tail call zeroext i8 @fr_chip_read(i64 %0)
%5 = icmp eq i8 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call zeroext i8 @fr_chip_read(i64 %0)
%8 = tail call zeroext i8 @fr_chip_read(i64 %0)
br label %9
9: ; preds = %2, %6
%10 = phi i8 [ %7, %6 ], [ %3, %2 ]
%11 = phi i8 [ %8, %6 ], [ %4, %2 ]
%12 = icmp eq i8 %10, %11
br i1 %12, label %13, label %2
13: ; preds = %9
ret void
}