void CRC_Init_8(unsigned char ucCRC_Table[]) {
  unsigned char c, c_mb, c7_4, c7_2, c7_3, c5_4, c_lb, c1_0a, c1_0, c2_0, c2a,
      c2, c3;
  unsigned short i;
  for (i = 0; i < 256; i++) {
    c7_2 = (unsigned char)(i << 2);
    c7_3 = (unsigned char)(c7_2 << 1);
    c7_4 = (unsigned char)(c7_3 << 1);
    c5_4 = (unsigned char)(i >> 2);
    c_mb = (unsigned char)((i & 0xf0) >> 4);
    c1_0a = (unsigned char)(c_mb & 0x03);
    c3 = (unsigned char)(c1_0a << 3);
    c2a = (unsigned char)((c1_0a << 2) & 0x04);
    c2 = (unsigned char)((c1_0a << 1) & 0x04);
    c2_0 = (unsigned char)(c_mb >> 1);
    c1_0 = (unsigned char)(c2_0 >> 1);
    c_lb = (unsigned char)(i & 0x0f);
    c = (unsigned char)((c_lb ^ c1_0a ^ c2_0 ^ c1_0 ^ c7_2 ^ c7_3 ^ c3 ^ c2a ^
                         c2) &
                        0x0f);
    c |= (c7_2 ^ c7_3 ^ c7_4 ^ c5_4) & 0xf0;
    ucCRC_Table[i] = c;
  }
}


x86 assembly (clang, -O0):
<CRC_Init_8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movw   $0x0,-0x18(%rbp)
movzwl -0x18(%rbp),%eax
cmp    $0x100,%eax
jge    121e <CRC_Init_8+0x11e>
movzwl -0x18(%rbp),%eax
shl    $0x2,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
shl    $0x1,%eax
mov    %al,-0xb(%rbp)
movzwl -0x18(%rbp),%eax
sar    $0x2,%eax
mov    %al,-0xe(%rbp)
movzwl -0x18(%rbp),%eax
and    $0xf0,%eax
sar    $0x4,%eax
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
and    $0x3,%eax
mov    %al,-0x10(%rbp)
movzbl -0x10(%rbp),%eax
shl    $0x3,%eax
mov    %al,-0x15(%rbp)
movzbl -0x10(%rbp),%eax
shl    $0x2,%eax
and    $0x4,%eax
mov    %al,-0x13(%rbp)
movzbl -0x10(%rbp),%eax
shl    $0x1,%eax
and    $0x4,%eax
mov    %al,-0x14(%rbp)
movzbl -0xa(%rbp),%eax
sar    $0x1,%eax
mov    %al,-0x12(%rbp)
movzbl -0x12(%rbp),%eax
sar    $0x1,%eax
mov    %al,-0x11(%rbp)
movzwl -0x18(%rbp),%eax
and    $0xf,%eax
mov    %al,-0xf(%rbp)
movzbl -0xf(%rbp),%eax
movzbl -0x10(%rbp),%ecx
xor    %ecx,%eax
movzbl -0x12(%rbp),%ecx
xor    %ecx,%eax
movzbl -0x11(%rbp),%ecx
xor    %ecx,%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
movzbl -0xd(%rbp),%ecx
xor    %ecx,%eax
movzbl -0x15(%rbp),%ecx
xor    %ecx,%eax
movzbl -0x13(%rbp),%ecx
xor    %ecx,%eax
movzbl -0x14(%rbp),%ecx
xor    %ecx,%eax
and    $0xf,%eax
mov    %al,-0x9(%rbp)
movzbl -0xc(%rbp),%ecx
movzbl -0xd(%rbp),%eax
xor    %eax,%ecx
movzbl -0xb(%rbp),%eax
xor    %eax,%ecx
movzbl -0xe(%rbp),%eax
xor    %eax,%ecx
and    $0xf0,%ecx
movzbl -0x9(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%dl
mov    -0x8(%rbp),%rax
movzwl -0x18(%rbp),%ecx
mov    %dl,(%rax,%rcx,1)
mov    -0x18(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x18(%rbp)
jmp    110e <CRC_Init_8+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRC_Init_8>:
movdqa 0xef7(%rip),%xmm14
movdqa 0xefe(%rip),%xmm13
movdqa 0xf06(%rip),%xmm0
movdqa 0xf0e(%rip),%xmm2
movdqa 0xf16(%rip),%xmm4
movdqa 0xf1e(%rip),%xmm5
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movdqa %xmm5,-0x28(%rsp)
movdqa %xmm4,-0x48(%rsp)
movdqa %xmm2,-0x18(%rsp)
movdqa %xmm0,-0x38(%rsp)
movdqa %xmm2,%xmm0
pslld  $0x2,%xmm0
movdqa -0x38(%rsp),%xmm1
pslld  $0x2,%xmm1
movdqa %xmm5,%xmm4
pslld  $0x2,%xmm4
movdqa -0x48(%rsp),%xmm6
pslld  $0x2,%xmm6
movdqa -0x18(%rsp),%xmm10
pslld  $0x3,%xmm10
pxor   %xmm0,%xmm10
movdqa -0x38(%rsp),%xmm2
pslld  $0x3,%xmm2
pxor   %xmm1,%xmm2
movdqa -0x28(%rsp),%xmm5
pslld  $0x3,%xmm5
pxor   %xmm4,%xmm5
movdqa -0x48(%rsp),%xmm4
pslld  $0x3,%xmm4
pxor   %xmm6,%xmm4
movdqa %xmm13,%xmm1
psrlw  $0x2,%xmm1
movdqa %xmm14,%xmm0
psrlw  $0x2,%xmm0
movdqa %xmm13,%xmm11
psrlw  $0x4,%xmm11
movdqa %xmm14,%xmm6
psrlw  $0x4,%xmm6
movdqa %xmm6,%xmm9
movdqa 0xe7a(%rip),%xmm8
pand   %xmm8,%xmm9
movdqa %xmm14,%xmm12
psrlw  $0x5,%xmm12
movdqa %xmm13,%xmm15
psrlw  $0x5,%xmm15
movdqa %xmm13,%xmm7
psrlw  $0x6,%xmm7
pxor   %xmm15,%xmm7
movdqa %xmm14,%xmm15
psrlw  $0x6,%xmm15
pxor   %xmm12,%xmm15
movdqa %xmm14,%xmm12
movdqa 0xe43(%rip),%xmm3
pand   %xmm3,%xmm12
pxor   %xmm15,%xmm12
movdqa %xmm11,%xmm15
pand   %xmm8,%xmm15
psllw  $0x3,%xmm6
psllw  $0x3,%xmm11
pxor   %xmm9,%xmm12
movdqa %xmm13,%xmm8
pand   %xmm3,%xmm8
pxor   %xmm7,%xmm8
movdqa %xmm6,%xmm9
punpcklwd %xmm6,%xmm6
pxor   %xmm15,%xmm8
movdqa %xmm12,%xmm7
punpcklwd %xmm7,%xmm7
pxor   %xmm10,%xmm6
pxor   %xmm7,%xmm6
movdqa %xmm11,%xmm7
punpckhwd %xmm7,%xmm7
punpcklwd %xmm11,%xmm11
punpckhwd %xmm9,%xmm9
punpckhwd %xmm12,%xmm12
pxor   %xmm2,%xmm9
pxor   %xmm12,%xmm9
movdqa %xmm8,%xmm12
punpcklwd %xmm12,%xmm12
pxor   %xmm5,%xmm11
pxor   %xmm12,%xmm11
movdqa %xmm14,%xmm12
psrlw  $0x3,%xmm12
punpckhwd %xmm8,%xmm8
pxor   %xmm4,%xmm7
pxor   %xmm8,%xmm7
movdqa 0xda8(%rip),%xmm8
pand   %xmm8,%xmm6
pxor   %xmm0,%xmm12
movdqa 0xd66(%rip),%xmm3
pand   %xmm3,%xmm12
movdqa %xmm12,%xmm15
punpcklwd %xmm15,%xmm15
pxor   %xmm6,%xmm15
movdqa %xmm13,%xmm6
psrlw  $0x3,%xmm6
pand   %xmm8,%xmm9
pand   %xmm8,%xmm11
pxor   %xmm1,%xmm6
pand   %xmm3,%xmm6
punpckhwd %xmm12,%xmm12
pxor   %xmm9,%xmm12
movdqa %xmm6,%xmm9
punpcklwd %xmm9,%xmm9
pxor   %xmm11,%xmm9
pand   %xmm8,%xmm7
punpckhwd %xmm6,%xmm6
pxor   %xmm7,%xmm6
movdqa -0x48(%rsp),%xmm7
pslld  $0x4,%xmm7
pxor   %xmm4,%xmm7
movdqa -0x28(%rsp),%xmm4
pslld  $0x4,%xmm4
pxor   %xmm5,%xmm4
movdqa -0x38(%rsp),%xmm5
pslld  $0x4,%xmm5
pxor   %xmm2,%xmm5
movdqa -0x18(%rsp),%xmm8
pslld  $0x4,%xmm8
pxor   %xmm10,%xmm8
movdqa %xmm1,%xmm2
punpckhwd %xmm2,%xmm2
pxor   %xmm7,%xmm2
punpcklwd %xmm1,%xmm1
pxor   %xmm4,%xmm1
movdqa %xmm0,%xmm3
punpckhwd %xmm3,%xmm3
pxor   %xmm5,%xmm3
movdqa -0x28(%rsp),%xmm5
punpcklwd %xmm0,%xmm0
pxor   %xmm8,%xmm0
movdqa 0xcda(%rip),%xmm7
pand   %xmm7,%xmm2
por    %xmm6,%xmm2
movdqa -0x48(%rsp),%xmm4
pand   %xmm7,%xmm1
por    %xmm9,%xmm1
pand   %xmm7,%xmm3
por    %xmm12,%xmm3
pand   %xmm7,%xmm0
por    %xmm15,%xmm0
movdqa 0xcb9(%rip),%xmm6
pand   %xmm6,%xmm2
pand   %xmm6,%xmm1
packuswb %xmm2,%xmm1
pand   %xmm6,%xmm3
pand   %xmm6,%xmm0
packuswb %xmm3,%xmm0
movdqa -0x18(%rsp),%xmm2
packuswb %xmm0,%xmm1
movdqu %xmm1,(%rdi,%rax,1)
movdqa -0x38(%rsp),%xmm0
add    $0x10,%rax
movdqa 0xc90(%rip),%xmm1
paddd  %xmm1,%xmm5
paddd  %xmm1,%xmm4
paddd  %xmm1,%xmm2
paddd  %xmm1,%xmm0
movdqa 0xc88(%rip),%xmm1
paddw  %xmm1,%xmm13
paddw  %xmm1,%xmm14
cmp    $0x100,%rax
jne    1140 <CRC_Init_8+0x40>
ret

LLVM IR (-O0):
define void @CRC_Init_8(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
%11 = alloca i8
%12 = alloca i8
%13 = alloca i8
%14 = alloca i8
%15 = alloca i8
%16 = alloca i16
store i8* %0, i8** %2
store i16 0, i16* %16
br label %17
17: ; preds = %122, %1
%18 = load i16, i16* %16
%19 = zext i16 %18 to i32
%20 = icmp slt i32 %19, 256
br i1 %20, label %21, label %125
21: ; preds = %17
%22 = load i16, i16* %16
%23 = zext i16 %22 to i32
%24 = shl i32 %23, 2
%25 = trunc i32 %24 to i8
store i8 %25, i8* %6
%26 = load i8, i8* %6
%27 = zext i8 %26 to i32
%28 = shl i32 %27, 1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = shl i32 %31, 1
%33 = trunc i32 %32 to i8
store i8 %33, i8* %5
%34 = load i16, i16* %16
%35 = zext i16 %34 to i32
%36 = ashr i32 %35, 2
%37 = trunc i32 %36 to i8
store i8 %37, i8* %8
%38 = load i16, i16* %16
%39 = zext i16 %38 to i32
%40 = and i32 %39, 240
%41 = ashr i32 %40, 4
%42 = trunc i32 %41 to i8
store i8 %42, i8* %4
%43 = load i8, i8* %4
%44 = zext i8 %43 to i32
%45 = and i32 %44, 3
%46 = trunc i32 %45 to i8
store i8 %46, i8* %10
%47 = load i8, i8* %10
%48 = zext i8 %47 to i32
%49 = shl i32 %48, 3
%50 = trunc i32 %49 to i8
store i8 %50, i8* %15
%51 = load i8, i8* %10
%52 = zext i8 %51 to i32
%53 = shl i32 %52, 2
%54 = and i32 %53, 4
%55 = trunc i32 %54 to i8
store i8 %55, i8* %13
%56 = load i8, i8* %10
%57 = zext i8 %56 to i32
%58 = shl i32 %57, 1
%59 = and i32 %58, 4
%60 = trunc i32 %59 to i8
store i8 %60, i8* %14
%61 = load i8, i8* %4
%62 = zext i8 %61 to i32
%63 = ashr i32 %62, 1
%64 = trunc i32 %63 to i8
store i8 %64, i8* %12
%65 = load i8, i8* %12
%66 = zext i8 %65 to i32
%67 = ashr i32 %66, 1
%68 = trunc i32 %67 to i8
store i8 %68, i8* %11
%69 = load i16, i16* %16
%70 = zext i16 %69 to i32
%71 = and i32 %70, 15
%72 = trunc i32 %71 to i8
store i8 %72, i8* %9
%73 = load i8, i8* %9
%74 = zext i8 %73 to i32
%75 = load i8, i8* %10
%76 = zext i8 %75 to i32
%77 = xor i32 %74, %76
%78 = load i8, i8* %12
%79 = zext i8 %78 to i32
%80 = xor i32 %77, %79
%81 = load i8, i8* %11
%82 = zext i8 %81 to i32
%83 = xor i32 %80, %82
%84 = load i8, i8* %6
%85 = zext i8 %84 to i32
%86 = xor i32 %83, %85
%87 = load i8, i8* %7
%88 = zext i8 %87 to i32
%89 = xor i32 %86, %88
%90 = load i8, i8* %15
%91 = zext i8 %90 to i32
%92 = xor i32 %89, %91
%93 = load i8, i8* %13
%94 = zext i8 %93 to i32
%95 = xor i32 %92, %94
%96 = load i8, i8* %14
%97 = zext i8 %96 to i32
%98 = xor i32 %95, %97
%99 = and i32 %98, 15
%100 = trunc i32 %99 to i8
store i8 %100, i8* %3
%101 = load i8, i8* %6
%102 = zext i8 %101 to i32
%103 = load i8, i8* %7
%104 = zext i8 %103 to i32
%105 = xor i32 %102, %104
%106 = load i8, i8* %5
%107 = zext i8 %106 to i32
%108 = xor i32 %105, %107
%109 = load i8, i8* %8
%110 = zext i8 %109 to i32
%111 = xor i32 %108, %110
%112 = and i32 %111, 240
%113 = load i8, i8* %3
%114 = zext i8 %113 to i32
%115 = or i32 %114, %112
%116 = trunc i32 %115 to i8
store i8 %116, i8* %3
%117 = load i8, i8* %3
%118 = load i8*, i8** %2
%119 = load i16, i16* %16
%120 = zext i16 %119 to i64
%121 = getelementptr inbounds i8, i8* %118, i64 %120
store i8 %117, i8* %121
br label %122
122: ; preds = %21
%123 = load i16, i16* %16
%124 = add i16 %123, 1
store i16 %124, i16* %16
br label %17
125: ; preds = %17
ret void
}

LLVM IR (-O2):
define void @CRC_Init_8(i8* nocapture writeonly %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %39, %2 ]
%4 = phi <16 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>, %1 ], [ %40, %2 ]
%5 = phi <16 x i16> [ <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, %1 ], [ %41, %2 ]
%6 = shl nuw nsw <16 x i32> %4, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
%7 = shl nuw nsw <16 x i32> %4, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
%8 = shl nuw nsw <16 x i32> %4, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
%9 = lshr <16 x i16> %5, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
%10 = lshr <16 x i16> %5, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
%11 = and <16 x i16> %10, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
%12 = shl nuw nsw <16 x i16> %10, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
%13 = zext <16 x i16> %12 to <16 x i32>
%14 = shl nuw nsw <16 x i16> %10, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
%15 = shl nuw nsw <16 x i16> %10, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
%16 = lshr <16 x i16> %5, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
%17 = lshr <16 x i16> %5, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
%18 = and <16 x i16> %5, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
%19 = xor <16 x i16> %16, %18
%20 = xor <16 x i16> %19, %17
%21 = xor <16 x i16> %20, %11
%22 = zext <16 x i16> %21 to <16 x i32>
%23 = xor <16 x i32> %7, %6
%24 = xor <16 x i32> %23, %13
%25 = xor <16 x i32> %24, %22
%26 = and <16 x i32> %25, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
%27 = xor <16 x i16> %15, %14
%28 = and <16 x i16> %27, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
%29 = zext <16 x i16> %28 to <16 x i32>
%30 = xor <16 x i32> %26, %29
%31 = xor <16 x i32> %23, %8
%32 = zext <16 x i16> %9 to <16 x i32>
%33 = xor <16 x i32> %31, %32
%34 = and <16 x i32> %33, <i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240, i32 240>
%35 = or <16 x i32> %30, %34
%36 = trunc <16 x i32> %35 to <16 x i8>
%37 = getelementptr inbounds i8, i8* %0, i64 %3
%38 = bitcast i8* %37 to <16 x i8>*
store <16 x i8> %36, <16 x i8>* %38
%39 = add nuw i64 %3, 16
%40 = add <16 x i32> %4, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
%41 = add <16 x i16> %5, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
%42 = icmp eq i64 %39, 256
br i1 %42, label %43, label %2
43: ; preds = %2
ret void
}