int function6(short int a, double b, double c, long double d, double e,
              long double f, float g, long double h, long int i, short int j) {
  return a + b + c + d + e + f + g + h + i + j;
}


x86 assembly (clang, -O0):
<function6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dx,%ax
mov    %di,%cx
fldt   0x30(%rbp)
fldt   0x20(%rbp)
fldt   0x10(%rbp)
mov    %cx,-0x2(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
fstpt  -0x30(%rbp)
movsd  %xmm2,-0x38(%rbp)
fstpt  -0x50(%rbp)
movss  %xmm3,-0x54(%rbp)
fstpt  -0x70(%rbp)
mov    %rsi,-0x78(%rbp)
mov    %ax,-0x7a(%rbp)
movswl -0x2(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  -0x10(%rbp),%xmm1
addsd  %xmm1,%xmm0
movsd  -0x18(%rbp),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x98(%rbp)
ff
fldl   -0x98(%rbp)
fldt   -0x30(%rbp)
faddp  %st,%st(1)
fldl   -0x38(%rbp)
faddp  %st,%st(1)
fldt   -0x50(%rbp)
faddp  %st,%st(1)
flds   -0x54(%rbp)
faddp  %st,%st(1)
fldt   -0x70(%rbp)
faddp  %st,%st(1)
mov    -0x78(%rbp),%rax
mov    %rax,-0x88(%rbp)
fildll -0x88(%rbp)
faddp  %st,%st(1)
movswl -0x7a(%rbp),%eax
mov    %eax,-0x8c(%rbp)
fildl  -0x8c(%rbp)
faddp  %st,%st(1)
fnstcw -0x9a(%rbp)
movzwl -0x9a(%rbp),%eax
or     $0xc00,%eax
mov    %ax,-0x9c(%rbp)
fldcw  -0x9c(%rbp)
fistpl -0x80(%rbp)
fldcw  -0x9a(%rbp)
mov    -0x80(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function6>:
fldt   0x8(%rsp)
cvtsi2sd %edi,%xmm4
addsd  %xmm0,%xmm4
addsd  %xmm1,%xmm4
movsd  %xmm4,-0x18(%rsp)
faddl  -0x18(%rsp)
fldt   0x18(%rsp)
movsd  %xmm2,-0x10(%rsp)
fxch   %st(1)
faddl  -0x10(%rsp)
faddp  %st,%st(1)
movss  %xmm3,-0x20(%rsp)
fadds  -0x20(%rsp)
fldt   0x28(%rsp)
faddp  %st,%st(1)
mov    %rsi,-0x8(%rsp)
fildll -0x8(%rsp)
faddp  %st,%st(1)
mov    %dx,-0x22(%rsp)
fiadds -0x22(%rsp)
fnstcw -0x26(%rsp)
movzwl -0x26(%rsp),%eax
or     $0xc00,%eax
mov    %ax,-0x24(%rsp)
fldcw  -0x24(%rsp)
fistpl -0x1c(%rsp)
fldcw  -0x26(%rsp)
mov    -0x1c(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @function6(i16 signext %0, double %1, double %2, x86_fp80 %3, double %4, x86_fp80 %5, float %6, x86_fp80 %7, i64 %8, i16 signext %9) {
%11 = alloca i16
%12 = alloca double
%13 = alloca double
%14 = alloca x86_fp80
%15 = alloca double
%16 = alloca x86_fp80
%17 = alloca float
%18 = alloca x86_fp80
%19 = alloca i64
%20 = alloca i16
store i16 %0, i16* %11
store double %1, double* %12
store double %2, double* %13
store x86_fp80 %3, x86_fp80* %14
store double %4, double* %15
store x86_fp80 %5, x86_fp80* %16
store float %6, float* %17
store x86_fp80 %7, x86_fp80* %18
store i64 %8, i64* %19
store i16 %9, i16* %20
%21 = load i16, i16* %11
%22 = sext i16 %21 to i32
%23 = sitofp i32 %22 to double
%24 = load double, double* %12
%25 = fadd double %23, %24
%26 = load double, double* %13
%27 = fadd double %25, %26
%28 = fpext double %27 to x86_fp80
%29 = load x86_fp80, x86_fp80* %14
%30 = fadd x86_fp80 %28, %29
%31 = load double, double* %15
%32 = fpext double %31 to x86_fp80
%33 = fadd x86_fp80 %30, %32
%34 = load x86_fp80, x86_fp80* %16
%35 = fadd x86_fp80 %33, %34
%36 = load float, float* %17
%37 = fpext float %36 to x86_fp80
%38 = fadd x86_fp80 %35, %37
%39 = load x86_fp80, x86_fp80* %18
%40 = fadd x86_fp80 %38, %39
%41 = load i64, i64* %19
%42 = sitofp i64 %41 to x86_fp80
%43 = fadd x86_fp80 %40, %42
%44 = load i16, i16* %20
%45 = sext i16 %44 to i32
%46 = sitofp i32 %45 to x86_fp80
%47 = fadd x86_fp80 %43, %46
%48 = fptosi x86_fp80 %47 to i32
ret i32 %48
}

LLVM IR (-O2):
define i32 @function6(i16 signext %0, double %1, double %2, x86_fp80 %3, double %4, x86_fp80 %5, float %6, x86_fp80 %7, i64 %8, i16 signext %9) {
%11 = sitofp i16 %0 to double
%12 = fadd double %11, %1
%13 = fadd double %12, %2
%14 = fpext double %13 to x86_fp80
%15 = fadd x86_fp80 %14, %3
%16 = fpext double %4 to x86_fp80
%17 = fadd x86_fp80 %15, %16
%18 = fadd x86_fp80 %17, %5
%19 = fpext float %6 to x86_fp80
%20 = fadd x86_fp80 %18, %19
%21 = fadd x86_fp80 %20, %7
%22 = sitofp i64 %8 to x86_fp80
%23 = fadd x86_fp80 %21, %22
%24 = sitofp i16 %9 to x86_fp80
%25 = fadd x86_fp80 %23, %24
%26 = fptosi x86_fp80 %25 to i32
ret i32 %26
}