xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ _s2priv_funab(float (*)(float *, float *), int, int, float,
                                 float, float, float, int, int, int, double,
                                 double);
void s2funyz(float (*fyz)(float *, float *), int ny, int nz, float ymin,
             float ymax, float zmin, float zmax, int ctl) {
  _s2priv_funab(fyz, ny, nz, ymin, ymax, zmin, zmax, 1, 2, ctl, 0.0, -1.0);
}


x86 assembly (clang, -O0):
<s2funyz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movss  %xmm1,-0x18(%rbp)
movss  %xmm2,-0x1c(%rbp)
movss  %xmm3,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
movss  -0x14(%rbp),%xmm0
movss  -0x18(%rbp),%xmm1
movss  -0x1c(%rbp),%xmm2
movss  -0x20(%rbp),%xmm3
mov    -0x24(%rbp),%r9d
mov    $0x1,%ecx
mov    $0x2,%r8d
xorps  %xmm4,%xmm4
movsd  0xe8f(%rip),%xmm5
call   1030 <_s2priv_funab@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2funyz>:
mov    %ecx,%r9d
movsd  0xee5(%rip),%xmm5
xorps  %xmm4,%xmm4
mov    $0x1,%ecx
mov    $0x2,%r8d
jmp    1030 <_s2priv_funab@plt>

LLVM IR (-O0):
define void @s2funyz(float (float*, float*)* %0, i32 %1, i32 %2, float %3, float %4, float %5, float %6, i32 %7) {
%9 = alloca float (float*, float*)*
%10 = alloca i32
%11 = alloca i32
%12 = alloca float
%13 = alloca float
%14 = alloca float
%15 = alloca float
%16 = alloca i32
store float (float*, float*)* %0, float (float*, float*)** %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store float %3, float* %12
store float %4, float* %13
store float %5, float* %14
store float %6, float* %15
store i32 %7, i32* %16
%17 = load float (float*, float*)*, float (float*, float*)** %9
%18 = load i32, i32* %10
%19 = load i32, i32* %11
%20 = load float, float* %12
%21 = load float, float* %13
%22 = load float, float* %14
%23 = load float, float* %15
%24 = load i32, i32* %16
%25 = call i32 @_s2priv_funab(float (float*, float*)* %17, i32 %18, i32 %19, float %20, float %21, float %22, float %23, i32 1, i32 2, i32 %24, double 0.000000e+00, double -1.000000e+00)
ret void
}

LLVM IR (-O2):
define void @s2funyz(float (float*, float*)* %0, i32 %1, i32 %2, float %3, float %4, float %5, float %6, i32 %7) {
%9 = tail call i32 @_s2priv_funab(float (float*, float*)* %0, i32 %1, i32 %2, float %3, float %4, float %5, float %6, i32 1, i32 2, i32 %7, double 0.000000e+00, double -1.000000e+00)
ret void
}
void write32bit(data) long data;
{
  eputc((char)((data >> 24) & 0xff));
  eputc((char)((data >> 16) & 0xff));
  eputc((char)((data >> 8) & 0xff));
  eputc((char)(data & 0xff));
}


x86 assembly (clang, -O0):
<write32bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x18,%rax
and    $0xff,%rax
movsbl %al,%edi
mov    $0x0,%al
call   1030 <eputc@plt>
mov    -0x8(%rbp),%rax
sar    $0x10,%rax
and    $0xff,%rax
movsbl %al,%edi
mov    $0x0,%al
call   1030 <eputc@plt>
mov    -0x8(%rbp),%rax
sar    $0x8,%rax
and    $0xff,%rax
movsbl %al,%edi
mov    $0x0,%al
call   1030 <eputc@plt>
mov    -0x8(%rbp),%rax
and    $0xff,%rax
movsbl %al,%edi
mov    $0x0,%al
call   1030 <eputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write32bit>:
push   %rbx
mov    %rdi,%rbx
sar    $0x18,%edi
xor    %eax,%eax
call   1030 <eputc@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movsbl %al,%edi
xor    %eax,%eax
call   1030 <eputc@plt>
mov    %ebx,%eax
shr    $0x8,%eax
movsbl %al,%edi
xor    %eax,%eax
call   1030 <eputc@plt>
movsbl %bl,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <eputc@plt>

LLVM IR (-O0):
define void @write32bit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 24
%5 = and i64 %4, 255
%6 = trunc i64 %5 to i8
%7 = sext i8 %6 to i32
%8 = call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %7)
%9 = load i64, i64* %2
%10 = ashr i64 %9, 16
%11 = and i64 %10, 255
%12 = trunc i64 %11 to i8
%13 = sext i8 %12 to i32
%14 = call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %13)
%15 = load i64, i64* %2
%16 = ashr i64 %15, 8
%17 = and i64 %16, 255
%18 = trunc i64 %17 to i8
%19 = sext i8 %18 to i32
%20 = call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %19)
%21 = load i64, i64* %2
%22 = and i64 %21, 255
%23 = trunc i64 %22 to i8
%24 = sext i8 %23 to i32
%25 = call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %24)
ret void
}

LLVM IR (-O2):
define void @write32bit(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = ashr i32 %2, 24
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %3)
%5 = shl i32 %2, 8
%6 = ashr i32 %5, 24
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %6)
%8 = shl i32 %2, 16
%9 = ashr i32 %8, 24
%10 = tail call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %9)
%11 = shl i32 %2, 24
%12 = ashr exact i32 %11, 24
%13 = tail call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %12)
ret void
}
int test_imm_49uint16_reg(unsigned short val) {
  return ((val) & (0x49 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_49uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x49,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_49uint16_reg>:
test   $0x49,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_49uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 73
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_49uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 73
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
char const *getenv(char *);
const char *ldpreload_get() { return getenv("LD_PRELOAD"); }


x86 assembly (clang, -O0):
<ldpreload_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <getenv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldpreload_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <getenv@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"LD_PRELOAD\00"
define i8* @ldpreload_get() {
%1 = call i8* @getenv(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [11 x i8] c"LD_PRELOAD\00"
define i8* @ldpreload_get() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void message(const char *in) { printf("%s\n", in); }


x86 assembly (clang, -O0):
<message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<message>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @message(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void SysCtlC28Enable(void) {
  unsigned long ulMWRAllow;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  (*((volatile unsigned long *)(0x400FB860))) &= ~0x00000001;
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
}


x86 assembly (clang, -O0):
<SysCtlC28Enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    $0x400fb860,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    $0x400fb860,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlC28Enable>:
mov    0x400fb980,%rax
40
mov    $0xa5a5a5a5,%ecx
mov    %rcx,0x400fb980
40
andq   $0xfffffffffffffffe,0x400fb860
40 fe
mov    %rax,0x400fb980
40
ret

LLVM IR (-O0):
define void @SysCtlC28Enable() {
%1 = alloca i64
%2 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %2, i64* %1
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 1074772064 to i64*)
%4 = and i64 %3, -2
store volatile i64 %4, i64* inttoptr (i64 1074772064 to i64*)
%5 = load i64, i64* %1
store volatile i64 %5, i64* inttoptr (i64 1074772352 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlC28Enable() {
%1 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%2 = load volatile i64, i64* inttoptr (i64 1074772064 to i64*)
%3 = and i64 %2, -2
store volatile i64 %3, i64* inttoptr (i64 1074772064 to i64*)
store volatile i64 %1, i64* inttoptr (i64 1074772352 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
char *getprogname();
int /*<<< orphan*/ stderr;
void usage(void) {
  (void)fprintf(
      stderr,
      "Usage: %s [-a] [-l] [-Pprinter] [-w maxwait] [user ...] [job ...]\n",
      getprogname());
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getprogname@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rdx
lea    0xea8(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <getprogname@plt>
lea    0xeb8(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [67 x i8] c"Usage: %s [-a] [-l] [-Pprinter] [-w maxwait] [user ...] [job ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i8* (...) @getprogname()
%3 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [67 x i8] c"Usage: %s [-a] [-l] [-Pprinter] [-w maxwait] [user ...] [job ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i8* (...) @getprogname()
%3 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
size_t msgu_string_size(void const *);
size_t msgu_string_size_frag(const void *str) { return msgu_string_size(str); }


x86 assembly (clang, -O0):
<msgu_string_size_frag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <msgu_string_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgu_string_size_frag>:
jmp    1030 <msgu_string_size@plt>

LLVM IR (-O0):
define i64 @msgu_string_size_frag(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @msgu_string_size(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @msgu_string_size_frag(i8* %0) {
%2 = tail call i64 @msgu_string_size(i8* %0)
ret i64 %2
}
void SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete(void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete = [61 x i8] c"SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete\00"
define void @SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([61 x i8], [61 x i8]* @__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete = [61 x i8] c"SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete\00"
define void @SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([61 x i8], [61 x i8]* @__func__.SteamAPI_ISteamMatchmakingRulesResponse_RulesRefreshComplete, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
size_t strlen(const char *str) {
  size_t result = 0;
  while (*(str++)) {
    result++;
  }
  return result;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1139 <strlen+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i64 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %8, %4 ]
ret i64 %12
}
void outb(unsigned short port, unsigned char val) {
  asm volatile("outb %0, %1" : : "a"(val), "Nd"(port));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    -0x2(%rbp),%dx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb $0, $1", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %1, i16 %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void MPURegionSet(uint32_t ui32Region, uint32_t ui32Addr, uint32_t ui32Flags) {
  ;

  ;
  (*((volatile unsigned long *)(0xE000ED9C))) =
      ui32Addr | ui32Region | 0x00000010;
  (*((volatile unsigned long *)(0xE000EDA0))) =
      ((ui32Flags & ~(0x00380000 | 0x00020000)) | 0x00040000 | 0x00010000);
}


x86 assembly (clang, -O0):
<MPURegionSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
or     -0x4(%rbp),%eax
or     $0x10,%eax
movslq %eax,%rcx
mov    $0xe000ed9c,%eax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xffc5ffff,%eax
or     $0x40000,%eax
or     $0x10000,%eax
movslq %eax,%rcx
mov    $0xe000eda0,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPURegionSet>:
or     %esi,%edi
or     $0x10,%edi
movslq %edi,%rax
mov    $0xe000ed9c,%ecx
mov    %rax,(%rcx)
and    $0xffc0ffff,%edx
or     $0x50000,%edx
movslq %edx,%rax
mov    %rax,0x4(%rcx)
ret

LLVM IR (-O0):
define void @MPURegionSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = or i32 %7, %8
%10 = or i32 %9, 16
%11 = sext i32 %10 to i64
store volatile i64 %11, i64* inttoptr (i64 3758157212 to i64*)
%12 = load i32, i32* %6
%13 = and i32 %12, -3801089
%14 = or i32 %13, 262144
%15 = or i32 %14, 65536
%16 = sext i32 %15 to i64
store volatile i64 %16, i64* inttoptr (i64 3758157216 to i64*)
ret void
}

LLVM IR (-O2):
define void @MPURegionSet(i32 %0, i32 %1, i32 %2) {
%4 = or i32 %0, %1
%5 = or i32 %4, 16
%6 = sext i32 %5 to i64
store volatile i64 %6, i64* inttoptr (i64 3758157212 to i64*)
%7 = and i32 %2, -4128769
%8 = or i32 %7, 327680
%9 = sext i32 %8 to i64
store volatile i64 %9, i64* inttoptr (i64 3758157216 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ osInitISRStacks();
int /*<<< orphan*/ osInitSystemStack();
int /*<<< orphan*/ osInitTaskStacks();
void osInitStacks(void) {

  osInitSystemStack();
  osInitTaskStacks();
  osInitISRStacks();
}


x86 assembly (clang, -O0):
<osInitStacks>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <osInitSystemStack@plt>
mov    $0x0,%al
call   1050 <osInitTaskStacks@plt>
mov    $0x0,%al
call   1030 <osInitISRStacks@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<osInitStacks>:
push   %rax
xor    %eax,%eax
call   1040 <osInitSystemStack@plt>
xor    %eax,%eax
call   1050 <osInitTaskStacks@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <osInitISRStacks@plt>

LLVM IR (-O0):
define void @osInitStacks() {
%1 = call i32 (...) @osInitSystemStack()
%2 = call i32 (...) @osInitTaskStacks()
%3 = call i32 (...) @osInitISRStacks()
ret void
}

LLVM IR (-O2):
define void @osInitStacks() {
%1 = tail call i32 (...) @osInitSystemStack()
%2 = tail call i32 (...) @osInitTaskStacks()
%3 = tail call i32 (...) @osInitISRStacks()
ret void
}
/* Type definitions */
struct fdp1_context {
  int dummy;
};

/* Variables and functions */
scalar_t__ fdp1_run_progressive_frames(struct fdp1_context *);
int fdp1_progressive(struct fdp1_context *fdp1) {
  unsigned int fail = 0;
  fail += fdp1_run_progressive_frames(fdp1);
  return fail;
}


x86 assembly (clang, -O0):
<fdp1_progressive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fdp1_run_progressive_frames@plt>
mov    %rax,%rcx
mov    -0xc(%rbp),%eax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdp1_progressive>:
jmp    1030 <fdp1_run_progressive_frames@plt>

LLVM IR (-O0):
%struct.fdp1_context = type { i32 }
define i32 @fdp1_progressive(%struct.fdp1_context* %0) {
%2 = alloca %struct.fdp1_context*
%3 = alloca i32
store %struct.fdp1_context* %0, %struct.fdp1_context** %2
store i32 0, i32* %3
%4 = load %struct.fdp1_context*, %struct.fdp1_context** %2
%5 = call i64 @fdp1_run_progressive_frames(%struct.fdp1_context* %4)
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = add nsw i64 %7, %5
%9 = trunc i64 %8 to i32
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
%struct.fdp1_context = type { i32 }
define i32 @fdp1_progressive(%struct.fdp1_context* %0) {
%2 = tail call i64 @fdp1_run_progressive_frames(%struct.fdp1_context* %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ notify_pvcall(char *);
int pvSetPortName(char byBoardNum, char *szPortName) {
  notify_pvcall("f");
  return (0);
}


x86 assembly (clang, -O0):
<pvSetPortName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed7(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvSetPortName>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define i32 @pvSetPortName(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define i32 @pvSetPortName(i8 signext %0, i8* nocapture readnone %1) {
%3 = tail call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
OP(fd, d4) {
  illegal_1();
  op_d4();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_d4@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_d4@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_d4()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_d4()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Bot_ScriptParseAllCharacters();
void Bot_ScriptLoad(void) {
  Bot_ScriptParseAllCharacters();
  return;
}


x86 assembly (clang, -O0):
<Bot_ScriptLoad>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Bot_ScriptParseAllCharacters@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bot_ScriptLoad>:
xor    %eax,%eax
jmp    1030 <Bot_ScriptParseAllCharacters@plt>

LLVM IR (-O0):
define void @Bot_ScriptLoad() {
%1 = call i32 (...) @Bot_ScriptParseAllCharacters()
ret void
}

LLVM IR (-O2):
define void @Bot_ScriptLoad() {
%1 = tail call i32 (...) @Bot_ScriptParseAllCharacters()
ret void
}
void SNetDistribPack(void *src, ...) {}


x86 assembly (clang, -O0):
<SNetDistribPack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SNetDistribPack>:
ret

LLVM IR (-O0):
define void @SNetDistribPack(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @SNetDistribPack(i8* nocapture %0, ...) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ android_memory_barrier();
extern __attribute__((always_)) void
android_atomic_release_store(int32_t value, volatile int32_t *ptr) {
  android_memory_barrier();
  *ptr = value;
}


x86 assembly (clang, -O0):
<android_atomic_release_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <android_memory_barrier@plt>
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_atomic_release_store>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <android_memory_barrier@plt>
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @android_atomic_release_store(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = call i32 (...) @android_memory_barrier()
%6 = load i32, i32* %3
%7 = load i32*, i32** %4
store volatile i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @android_atomic_release_store(i32 %0, i32* %1) {
%3 = tail call i32 (...) @android_memory_barrier()
store volatile i32 %0, i32* %1
ret void
}
int PDMCCompare4(P, PDMCQStruct)
struct Teacher **P;
struct ProfWithNameStruct *PDMCQStruct;
{
  if ((AccessTeacherMsc(P) & 4) == 0)
    return (-1);
  return (0);
}


x86 assembly (clang, -O0):
<PDMCCompare4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <AccessTeacherMsc@plt>
and    $0x4,%eax
cmp    $0x0,%eax
jne    1143 <PDMCCompare4+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    114a <PDMCCompare4+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMCCompare4>:
push   %rax
xor    %eax,%eax
call   1030 <AccessTeacherMsc@plt>
shr    $0x2,%eax
and    $0x1,%eax
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.Teacher = type opaque
%struct.ProfWithNameStruct = type opaque
define i32 @PDMCCompare4(%struct.Teacher** %0, %struct.ProfWithNameStruct* %1) {
%3 = alloca i32
%4 = alloca %struct.Teacher**
%5 = alloca %struct.ProfWithNameStruct*
store %struct.Teacher** %0, %struct.Teacher*** %4
store %struct.ProfWithNameStruct* %1, %struct.ProfWithNameStruct** %5
%6 = load %struct.Teacher**, %struct.Teacher*** %4
%7 = call i32 (%struct.Teacher**, ...) bitcast (i32 (...)* @AccessTeacherMsc to i32 (%struct.Teacher**, ...)*)(%struct.Teacher** %6)
%8 = and i32 %7, 4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.Teacher = type opaque
%struct.ProfWithNameStruct = type opaque
define i32 @PDMCCompare4(%struct.Teacher** %0, %struct.ProfWithNameStruct* nocapture readnone %1) {
%3 = tail call i32 (%struct.Teacher**, ...) bitcast (i32 (...)* @AccessTeacherMsc to i32 (%struct.Teacher**, ...)*)(%struct.Teacher** %0)
%4 = lshr i32 %3, 2
%5 = and i32 %4, 1
%6 = add nsw i32 %5, -1
ret i32 %6
}
/* Type definitions */
struct timeval {
  unsigned long long tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
unsigned long long timeval_to_usec(struct timeval *val) {
  unsigned long long ret = val->tv_usec;
  ret += (unsigned long long)val->tv_sec * 1000000ULL;
  return ret;
}


x86 assembly (clang, -O0):
<timeval_to_usec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   $0xf4240,0x8(%rax),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_to_usec>:
imul   $0xf4240,0x8(%rdi),%rax
add    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i64 @timeval_to_usec(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
%3 = alloca i64
store %struct.timeval* %0, %struct.timeval** %2
%4 = load %struct.timeval*, %struct.timeval** %2
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i32 0, i32 0
%6 = load i64, i64* %5
store i64 %6, i64* %3
%7 = load %struct.timeval*, %struct.timeval** %2
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 1
%9 = load i64, i64* %8
%10 = mul i64 %9, 1000000
%11 = load i64, i64* %3
%12 = add i64 %11, %10
store i64 %12, i64* %3
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i64 @timeval_to_usec(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%5 = load i64, i64* %4
%6 = mul i64 %5, 1000000
%7 = add i64 %6, %3
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void *malloc(size_t);
int /*<<< orphan*/ printf(char *);
extern void *mem_alloc(size_t nbytes, const char *file, int line) {
  assert(nbytes > 0);
  void *ptr;
  ptr = malloc(nbytes);
  if (!ptr) {
    printf("Memory was not allocated. Exiting...\n");
    exit(EXIT_FAILURE);
  }
  return ptr;
}


x86 assembly (clang, -O0):
<mem_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x8(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1197 <mem_alloc+0x57>
lea    0xe7c(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e50(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_alloc>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1050 <malloc@plt>
test   %rax,%rax
je     1161 <mem_alloc+0x21>
pop    %rbx
ret
lea    0xe98(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"Memory was not allocated. Exiting...\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @mem_alloc(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i64, i64* %4
%9 = icmp ugt i64 %8, 0
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i64, i64* %4
%13 = call i8* @malloc(i64 %12)
store i8* %13, i8** %7
%14 = load i8*, i8** %7
%15 = icmp ne i8* %14, null
br i1 %15, label %20, label %16
16: ; preds = %3
%17 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%18 = load i32, i32* @EXIT_FAILURE
%19 = call i32 @exit(i32 %18)
unreachable
20: ; preds = %3
%21 = load i8*, i8** %7
ret i8* %21
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@str = [37 x i8] c"Memory was not allocated. Exiting...\00"
define noalias i8* @mem_alloc(i64 %0, i8* nocapture readnone %1, i32 %2) {
%4 = icmp ne i64 %0, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i8* @malloc(i64 %0)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = tail call i32 @exit(i32 %11)
unreachable
13: ; preds = %3
ret i8* %7
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef scalar_t__ const int32_t;

/* Variables and functions */
int32_t uint8p_comparator(const void *pl, const void *pr) {
  return *(const uint8_t *)pl - *(const uint8_t *)pr;
}


x86 assembly (clang, -O0):
<uint8p_comparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint8p_comparator>:
mov    (%rdi),%rax
sub    (%rsi),%rax
ret

LLVM IR (-O0):
define i64 @uint8p_comparator(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
%11 = sub nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @uint8p_comparator(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = sub nsw i64 %4, %6
ret i64 %7
}
/* Type definitions */
struct stat {
  scalar_t__ st_size;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
int filesize(const char *fname) {
  struct stat st;
  if (stat(fname, &st) == 0)
    return (int)st.st_size;
  return 0;
}


x86 assembly (clang, -O0):
<filesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    113f <filesize+0x2f>
mov    -0x18(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    1146 <filesize+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesize>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
jne    1126 <filesize+0x16>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i32 @filesize(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
store i32 %11, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i32 @filesize(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = select i1 %5, i32 %8, i32 0
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int kill(pid_t pid, int sig) {
  (void)pid;
  (void)sig;
  puts("kill: not implemented");
  return -1;
}


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xedb(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"kill: not implemented\00"
define i32 @kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @puts(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [22 x i8] c"kill: not implemented\00"
define i32 @kill(i32 %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int pow(float, int);
float fl(float x) { return 6 * (pow(x, 2)) + (1 / x); }


x86 assembly (clang, -O0):
<fl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
imul   $0x6,%eax,%eax
cvtsi2ss %eax,%xmm0
movss  0xec5(%rip),%xmm1
divss  -0x4(%rbp),%xmm1
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fl>:
push   %rax
movss  %xmm0,0x4(%rsp)
mov    $0x2,%edi
call   1030 <pow@plt>
add    %eax,%eax
lea    (%rax,%rax,2),%eax
cvtsi2ss %eax,%xmm1
movss  0xece(%rip),%xmm0
divss  0x4(%rsp),%xmm0
addss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fl(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @pow(float %3, i32 2)
%5 = mul nsw i32 6, %4
%6 = sitofp i32 %5 to float
%7 = load float, float* %2
%8 = fdiv float 1.000000e+00, %7
%9 = fadd float %6, %8
ret float %9
}

LLVM IR (-O2):
define float @fl(float %0) {
%2 = tail call i32 @pow(float %0, i32 2)
%3 = mul nsw i32 %2, 6
%4 = sitofp i32 %3 to float
%5 = fdiv float 1.000000e+00, %0
%6 = fadd float %5, %4
ret float %6
}
/* Type definitions */
typedef int /*<<< orphan*/ des_block;
typedef int /*<<< orphan*/ caddr_t;
typedef int /*<<< orphan*/ bool_t;
typedef int /*<<< orphan*/ XDR;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ xdr_opaque(int /*<<< orphan*/ *, int /*<<< orphan*/, int);
bool_t xdr_des_block(XDR *xdrs, des_block *blkp) {
  assert(xdrs != NULL);
  assert(blkp != NULL);
  return (xdr_opaque(xdrs, (caddr_t)blkp, sizeof(des_block)));
}


x86 assembly (clang, -O0):
<xdr_des_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %eax,%esi
mov    $0x4,%edx
call   1040 <xdr_opaque@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_des_block>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
mov    $0x4,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <xdr_opaque@plt>

LLVM IR (-O0):
define i32 @xdr_des_block(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32*, i32** %4
%10 = icmp ne i32* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32*, i32** %3
%14 = load i32*, i32** %4
%15 = ptrtoint i32* %14 to i32
%16 = call i32 @xdr_opaque(i32* %13, i32 %15, i32 4)
ret i32 %16
}

LLVM IR (-O2):
define i32 @xdr_des_block(i32* %0, i32* %1) {
%3 = icmp ne i32* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp ne i32* %1, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = ptrtoint i32* %1 to i64
%10 = trunc i64 %9 to i32
%11 = tail call i32 @xdr_opaque(i32* %0, i32 %10, i32 4)
ret i32 %11
}
/* Variables and functions */
scalar_t__ get_whole_seconds(double const);
long get_fractional_nanoseconds(const double seconds) {
  const double whole_secs = (double)get_whole_seconds(seconds);
  const double fractional_part = seconds - whole_secs;
  return (long)(fractional_part * 1000000000);
}


x86 assembly (clang, -O0):
<get_fractional_nanoseconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <get_whole_seconds@plt>
cvtsi2sd %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeb8(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
cvttsd2si %xmm0,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fractional_nanoseconds>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <get_whole_seconds@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
movsd  (%rsp),%xmm1
subsd  %xmm0,%xmm1
mulsd  0xecc(%rip),%xmm1
cvttsd2si %xmm1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @get_fractional_nanoseconds(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = call i64 @get_whole_seconds(double %5)
%7 = sitofp i64 %6 to double
store double %7, double* %3
%8 = load double, double* %2
%9 = load double, double* %3
%10 = fsub double %8, %9
store double %10, double* %4
%11 = load double, double* %4
%12 = fmul double %11, 1.000000e+09
%13 = fptosi double %12 to i64
ret i64 %13
}

LLVM IR (-O2):
define i64 @get_fractional_nanoseconds(double %0) {
%2 = tail call i64 @get_whole_seconds(double %0)
%3 = sitofp i64 %2 to double
%4 = fsub double %0, %3
%5 = fmul double %4, 1.000000e+09
%6 = fptosi double %5 to i64
ret i64 %6
}
/* Variables and functions */
int partition(int *, int, int);
void qsort(int a[], int low, int high) {
  if (low < high) {
    int pivoc_loc = partition(a, low, high);
    qsort(a, low, pivoc_loc - 1);
    qsort(a, pivoc_loc + 1, high);
  }
}


x86 assembly (clang, -O0):
<qsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <qsort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <qsort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <qsort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <qsort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <qsort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <qsort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @qsort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @qsort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @qsort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Type definitions */
typedef int uint64_t;
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int board_ticks();
int _gettimeofday(struct timeval *tv, void *tzvp) {
  uint64_t t = board_ticks();
  tv->tv_sec = t / 1000000;
  tv->tv_usec = (t % 1000000);
  return 0;
}


x86 assembly (clang, -O0):
<_gettimeofday>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <board_ticks@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
mov    %edx,0x4(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gettimeofday>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <board_ticks@plt>
cltq
imul   $0x431bde83,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rcx
add    %edx,%ecx
mov    %ecx,(%rbx)
imul   $0xf4240,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,0x4(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @_gettimeofday(%struct.timeval* %0, i8* %1) {
%3 = alloca %struct.timeval*
%4 = alloca i8*
%5 = alloca i32
store %struct.timeval* %0, %struct.timeval** %3
store i8* %1, i8** %4
%6 = call i32 (...) @board_ticks()
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = sdiv i32 %7, 1000000
%9 = load %struct.timeval*, %struct.timeval** %3
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %9, i32 0, i32 0
store i32 %8, i32* %10
%11 = load i32, i32* %5
%12 = srem i32 %11, 1000000
%13 = load %struct.timeval*, %struct.timeval** %3
%14 = getelementptr inbounds %struct.timeval, %struct.timeval* %13, i32 0, i32 1
store i32 %12, i32* %14
ret i32 0
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @_gettimeofday(%struct.timeval* nocapture writeonly %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @board_ticks()
%4 = sdiv i32 %3, 1000000
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
store i32 %4, i32* %5
%6 = srem i32 %3, 1000000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
store i32 %6, i32* %7
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ spcf_read_command_line(int, char **);
int /*<<< orphan*/ spcf_read_config();
int /*<<< orphan*/ spcf_read_xresources();
void check_params(int argc, char *argv[]) {
  spcf_read_config();
  spcf_read_xresources();
  spcf_read_command_line(argc, argv);
}


x86 assembly (clang, -O0):
<check_params>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <spcf_read_config@plt>
mov    $0x0,%al
call   1050 <spcf_read_xresources@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <spcf_read_command_line@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_params>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <spcf_read_config@plt>
xor    %eax,%eax
call   1050 <spcf_read_xresources@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <spcf_read_command_line@plt>

LLVM IR (-O0):
define void @check_params(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @spcf_read_config()
%6 = call i32 (...) @spcf_read_xresources()
%7 = load i32, i32* %3
%8 = load i8**, i8*** %4
%9 = call i32 @spcf_read_command_line(i32 %7, i8** %8)
ret void
}

LLVM IR (-O2):
define void @check_params(i32 %0, i8** %1) {
%3 = tail call i32 (...) @spcf_read_config()
%4 = tail call i32 (...) @spcf_read_xresources()
%5 = tail call i32 @spcf_read_command_line(i32 %0, i8** %1)
ret void
}
/* Variables and functions */
size_t default_secondary_hash(size_t pos) { return pos % 97 + 1; }


x86 assembly (clang, -O0):
<default_secondary_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x61,%ecx
xor    %edx,%edx
div    %rcx
mov    %rdx,%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_secondary_hash>:
movabs $0x51d07eae2f8151d1,%rcx
7e d0 51
mov    %rdi,%rax
mul    %rcx
mov    %rdi,%rax
sub    %rdx,%rax
shr    %rax
add    %rdx,%rax
shr    $0x6,%rax
imul   $0x61,%rax,%rax
neg    %rax
add    %rdi,%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @default_secondary_hash(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = urem i64 %3, 97
%5 = add i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @default_secondary_hash(i64 %0) {
%2 = urem i64 %0, 97
%3 = add nuw nsw i64 %2, 1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void report_fatal_error(char *placeholder) { printf("%s\n", placeholder); }


x86 assembly (clang, -O0):
<report_fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_fatal_error>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @report_fatal_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @report_fatal_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}