#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
int /*<<< orphan*/ support_avx();
int cpu_detect() {
  int eax, ebx, ecx, edx;
  int vendor, family, extend_family, model, extend_model;
  if (!have_cpuid())
    return 0;
  vendor = get_vendor();
  cpuid(1, &eax, &ebx, &ecx, &edx);
  extend_family = ((((eax) >> (20)) & (0xff)));
  extend_model = ((((eax) >> (16)) & (0x0f)));
  family = ((((eax) >> (8)) & (0x0f)));
  model = ((((eax) >> (4)) & (0x0f)));
  if (vendor == 1) {
    switch (family) {
    case 0x6:
      switch (extend_model) {
      case 2:
        switch (model) {
        case 10:
        case 13:
          if (support_avx()) {
            return 1;
          } else {
            return 0;
          }
        }
        break;
      case 3:
        switch (model) {
        case 10:
        case 14:
          if (support_avx()) {
            return 1;
          } else {
            return 0;
          }
        case 12:
        case 15:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        case 13:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        case 7:
        case 15:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        }
        break;
      case 5:
        switch (model) {
        case 6:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        }
        break;
      }
      break;
    }
  } else if (vendor == 2) {
    switch (family) {
    case 0xf:
      switch (extend_family) {
      case 6:
        switch (model) {
        case 1:
          if (support_avx())
            return 0;
          else
            return 0;
        case 2:
          if (support_avx())
            return 0;
          else
            return 0;
        case 0:
          if (support_avx())
            return 0;
          else
            return 0;
        }
      }
      break;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<cpu_detect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    $0x0,%al
call   1060 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1164 <cpu_detect+0x24>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
mov    $0x0,%al
call   1030 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
mov    $0x1,%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1050 <cpuid@plt>
mov    -0x8(%rbp),%eax
sar    $0x14,%eax
and    $0xff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x10,%eax
and    $0xf,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
and    $0xf,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x4,%eax
and    $0xf,%eax
mov    %eax,-0x24(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    13cc <cpu_detect+0x28c>
mov    -0x1c(%rbp),%eax
sub    $0x6,%eax
jne    13c7 <cpu_detect+0x287>
jmp    11d5 <cpu_detect+0x95>
mov    -0x28(%rbp),%eax
add    $0xfffffffe,%eax
mov    %eax,%ecx
mov    %rcx,-0x30(%rbp)
sub    $0x3,%eax
ja     13c2 <cpu_detect+0x282>
mov    -0x30(%rbp),%rax
lea    0xe0b(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x24(%rbp),%eax
mov    %eax,-0x34(%rbp)
sub    $0xa,%eax
je     1223 <cpu_detect+0xe3>
jmp    1212 <cpu_detect+0xd2>
mov    -0x34(%rbp),%eax
sub    $0xd,%eax
jne    124b <cpu_detect+0x10b>
jmp    1223 <cpu_detect+0xe3>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     123f <cpu_detect+0xff>
movl   $0x1,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
jmp    13c2 <cpu_detect+0x282>
mov    -0x24(%rbp),%eax
add    $0xfffffff6,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0x5,%eax
ja     12f1 <cpu_detect+0x1b1>
mov    -0x40(%rbp),%rax
lea    0xda0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1295 <cpu_detect+0x155>
movl   $0x1,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     12bd <cpu_detect+0x17d>
movl   $0x2,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     12e5 <cpu_detect+0x1a5>
movl   $0x2,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
jmp    13c2 <cpu_detect+0x282>
mov    -0x24(%rbp),%eax
mov    %eax,-0x44(%rbp)
add    $0xfffffffb,%eax
sub    $0x2,%eax
jb     132f <cpu_detect+0x1ef>
jmp    130d <cpu_detect+0x1cd>
mov    -0x44(%rbp),%eax
sub    $0x7,%eax
je     1357 <cpu_detect+0x217>
jmp    131e <cpu_detect+0x1de>
mov    -0x44(%rbp),%eax
sub    $0xf,%eax
je     1357 <cpu_detect+0x217>
jmp    137f <cpu_detect+0x23f>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     134b <cpu_detect+0x20b>
movl   $0x2,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1373 <cpu_detect+0x233>
movl   $0x2,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
jmp    13c2 <cpu_detect+0x282>
mov    -0x24(%rbp),%eax
sub    $0x6,%eax
jne    13bd <cpu_detect+0x27d>
jmp    1395 <cpu_detect+0x255>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     13b1 <cpu_detect+0x271>
movl   $0x2,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
jmp    13c2 <cpu_detect+0x282>
jmp    13c7 <cpu_detect+0x287>
jmp    14b9 <cpu_detect+0x379>
cmpl   $0x2,-0x18(%rbp)
jne    14b4 <cpu_detect+0x374>
mov    -0x1c(%rbp),%eax
sub    $0xf,%eax
jne    14af <cpu_detect+0x36f>
jmp    13e7 <cpu_detect+0x2a7>
mov    -0x20(%rbp),%eax
sub    $0x6,%eax
jne    14aa <cpu_detect+0x36a>
jmp    13f8 <cpu_detect+0x2b8>
mov    -0x24(%rbp),%eax
mov    %eax,-0x48(%rbp)
test   %eax,%eax
je     147d <cpu_detect+0x33d>
jmp    140b <cpu_detect+0x2cb>
mov    -0x48(%rbp),%eax
sub    $0x1,%eax
je     142d <cpu_detect+0x2ed>
jmp    141c <cpu_detect+0x2dc>
mov    -0x48(%rbp),%eax
sub    $0x2,%eax
je     1455 <cpu_detect+0x315>
jmp    14a5 <cpu_detect+0x365>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1449 <cpu_detect+0x309>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1471 <cpu_detect+0x331>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1499 <cpu_detect+0x359>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
movl   $0x0,-0x4(%rbp)
jmp    14c0 <cpu_detect+0x380>
jmp    14aa <cpu_detect+0x36a>
jmp    14af <cpu_detect+0x36f>
jmp    14b4 <cpu_detect+0x374>
jmp    14b9 <cpu_detect+0x379>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_detect>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1060 <have_cpuid@plt>
test   %eax,%eax
je     1255 <cpu_detect+0x115>
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <get_vendor@plt>
mov    %eax,%ebp
lea    0x8(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    $0x1,%edi
call   1050 <cpuid@plt>
mov    0x8(%rsp),%ecx
mov    %ecx,%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    %ecx,%eax
shr    $0x4,%eax
and    $0xf,%eax
cmp    $0x1,%ebp
jne    11d3 <cpu_detect+0x93>
cmp    $0x6,%edx
jne    1255 <cpu_detect+0x115>
shr    $0x10,%ecx
and    $0xf,%ecx
add    $0xfffffffe,%ecx
cmp    $0x3,%ecx
ja     1255 <cpu_detect+0x115>
lea    0xe45(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
cmp    $0xd,%eax
je     121c <cpu_detect+0xdc>
cmp    $0xa,%eax
je     121c <cpu_detect+0xdc>
jmp    1255 <cpu_detect+0x115>
cmp    $0x2,%ebp
jne    1255 <cpu_detect+0x115>
cmp    $0xf,%edx
jne    1255 <cpu_detect+0x115>
and    $0xff00000,%ecx
cmp    $0x600000,%ecx
jne    1255 <cpu_detect+0x115>
test   %eax,%eax
je     11f9 <cpu_detect+0xb9>
cmp    $0x2,%eax
je     11f9 <cpu_detect+0xb9>
cmp    $0x1,%eax
jne    1255 <cpu_detect+0x115>
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <support_avx@plt>
jmp    1255 <cpu_detect+0x115>
add    $0xfffffff6,%eax
cmp    $0x5,%eax
ja     1255 <cpu_detect+0x115>
lea    0xdfd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
jmp    1255 <cpu_detect+0x115>
lea    -0x5(%rax),%ecx
cmp    $0x2,%ecx
jb     1245 <cpu_detect+0x105>
cmp    $0x7,%eax
je     1245 <cpu_detect+0x105>
cmp    $0xf,%eax
je     1245 <cpu_detect+0x105>
jmp    1255 <cpu_detect+0x115>
cmp    $0x6,%eax
jne    1255 <cpu_detect+0x115>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
add    %ebx,%ebx
mov    %ebx,%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @cpu_detect() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = call i32 (...) @have_cpuid()
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %0
store i32 0, i32* %1
br label %113
14: ; preds = %0
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = call i32 @cpuid(i32 1, i32* %2, i32* %3, i32* %4, i32* %5)
%17 = load i32, i32* %2
%18 = ashr i32 %17, 20
%19 = and i32 %18, 255
store i32 %19, i32* %8
%20 = load i32, i32* %2
%21 = ashr i32 %20, 16
%22 = and i32 %21, 15
store i32 %22, i32* %10
%23 = load i32, i32* %2
%24 = ashr i32 %23, 8
%25 = and i32 %24, 15
store i32 %25, i32* %7
%26 = load i32, i32* %2
%27 = ashr i32 %26, 4
%28 = and i32 %27, 15
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = icmp eq i32 %29, 1
br i1 %30, label %31, label %84
31: ; preds = %14
%32 = load i32, i32* %7
switch i32 %32, label %83 [
i32 6, label %33
]
33: ; preds = %31
%34 = load i32, i32* %10
switch i32 %34, label %82 [
i32 2, label %35
i32 3, label %43
i32 4, label %61
i32 5, label %74
]
35: ; preds = %33
%36 = load i32, i32* %9
switch i32 %36, label %42 [
i32 10, label %37
i32 13, label %37
]
37: ; preds = %35, %35
%38 = call i32 (...) @support_avx()
%39 = icmp ne i32 %38, 0
br i1 %39, label %40, label %41
40: ; preds = %37
store i32 1, i32* %1
br label %113
41: ; preds = %37
store i32 0, i32* %1
br label %113
42: ; preds = %35
br label %82
43: ; preds = %33
%44 = load i32, i32* %9
switch i32 %44, label %60 [
i32 10, label %45
i32 14, label %45
i32 12, label %50
i32 15, label %50
i32 13, label %55
]
45: ; preds = %43, %43
%46 = call i32 (...) @support_avx()
%47 = icmp ne i32 %46, 0
br i1 %47, label %48, label %49
48: ; preds = %45
store i32 1, i32* %1
br label %113
49: ; preds = %45
store i32 0, i32* %1
br label %113
50: ; preds = %43, %43
%51 = call i32 (...) @support_avx()
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %54
53: ; preds = %50
store i32 2, i32* %1
br label %113
54: ; preds = %50
store i32 0, i32* %1
br label %113
55: ; preds = %43
%56 = call i32 (...) @support_avx()
%57 = icmp ne i32 %56, 0
br i1 %57, label %58, label %59
58: ; preds = %55
store i32 2, i32* %1
br label %113
59: ; preds = %55
store i32 0, i32* %1
br label %113
60: ; preds = %43
br label %82
61: ; preds = %33
%62 = load i32, i32* %9
switch i32 %62, label %73 [
i32 5, label %63
i32 6, label %63
i32 7, label %68
i32 15, label %68
]
63: ; preds = %61, %61
%64 = call i32 (...) @support_avx()
%65 = icmp ne i32 %64, 0
br i1 %65, label %66, label %67
66: ; preds = %63
store i32 2, i32* %1
br label %113
67: ; preds = %63
store i32 0, i32* %1
br label %113
68: ; preds = %61, %61
%69 = call i32 (...) @support_avx()
%70 = icmp ne i32 %69, 0
br i1 %70, label %71, label %72
71: ; preds = %68
store i32 2, i32* %1
br label %113
72: ; preds = %68
store i32 0, i32* %1
br label %113
73: ; preds = %61
br label %82
74: ; preds = %33
%75 = load i32, i32* %9
switch i32 %75, label %81 [
i32 6, label %76
]
76: ; preds = %74
%77 = call i32 (...) @support_avx()
%78 = icmp ne i32 %77, 0
br i1 %78, label %79, label %80
79: ; preds = %76
store i32 2, i32* %1
br label %113
80: ; preds = %76
store i32 0, i32* %1
br label %113
81: ; preds = %74
br label %82
82: ; preds = %33, %81, %73, %60, %42
br label %83
83: ; preds = %31, %82
br label %112
84: ; preds = %14
%85 = load i32, i32* %6
%86 = icmp eq i32 %85, 2
br i1 %86, label %87, label %111
87: ; preds = %84
%88 = load i32, i32* %7
switch i32 %88, label %110 [
i32 15, label %89
]
89: ; preds = %87
%90 = load i32, i32* %8
switch i32 %90, label %109 [
i32 6, label %91
]
91: ; preds = %89
%92 = load i32, i32* %9
switch i32 %92, label %108 [
i32 1, label %93
i32 2, label %98
i32 0, label %103
]
93: ; preds = %91
%94 = call i32 (...) @support_avx()
%95 = icmp ne i32 %94, 0
br i1 %95, label %96, label %97
96: ; preds = %93
store i32 0, i32* %1
br label %113
97: ; preds = %93
store i32 0, i32* %1
br label %113
98: ; preds = %91
%99 = call i32 (...) @support_avx()
%100 = icmp ne i32 %99, 0
br i1 %100, label %101, label %102
101: ; preds = %98
store i32 0, i32* %1
br label %113
102: ; preds = %98
store i32 0, i32* %1
br label %113
103: ; preds = %91
%104 = call i32 (...) @support_avx()
%105 = icmp ne i32 %104, 0
br i1 %105, label %106, label %107
106: ; preds = %103
store i32 0, i32* %1
br label %113
107: ; preds = %103
store i32 0, i32* %1
br label %113
108: ; preds = %91
br label %109
109: ; preds = %108, %89
br label %110
110: ; preds = %87, %109
br label %111
111: ; preds = %110, %84
br label %112
112: ; preds = %111, %83
store i32 0, i32* %1
br label %113
113: ; preds = %112, %107, %106, %102, %101, %97, %96, %80, %79, %72, %71, %67, %66, %59, %58, %54, %53, %49, %48, %41, %40, %13
%114 = load i32, i32* %1
ret i32 %114
}

LLVM IR (-O2):
define i32 @cpu_detect() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = tail call i32 (...) @have_cpuid()
%10 = icmp eq i32 %9, 0
br i1 %10, label %72, label %11
11: ; preds = %0
%12 = tail call i32 (...) @get_vendor()
%13 = call i32 @cpuid(i32 1, i32* %1, i32* %2, i32* %3, i32* %4)
%14 = load i32, i32* %1
%15 = lshr i32 %14, 16
%16 = and i32 %15, 15
%17 = lshr i32 %14, 8
%18 = and i32 %17, 15
%19 = lshr i32 %14, 4
%20 = and i32 %19, 15
%21 = icmp eq i32 %12, 1
br i1 %21, label %22, label %58
22: ; preds = %11
%23 = icmp eq i32 %18, 6
br i1 %23, label %24, label %72
24: ; preds = %22
switch i32 %16, label %72 [
i32 2, label %25
i32 3, label %30
i32 4, label %43
i32 5, label %52
]
25: ; preds = %24
switch i32 %20, label %72 [
i32 10, label %26
i32 13, label %26
]
26: ; preds = %25, %25
%27 = call i32 (...) @support_avx()
%28 = icmp ne i32 %27, 0
%29 = zext i1 %28 to i32
br label %72
30: ; preds = %24
switch i32 %20, label %72 [
i32 10, label %31
i32 14, label %31
i32 12, label %35
i32 15, label %35
i32 13, label %39
]
31: ; preds = %30, %30
%32 = call i32 (...) @support_avx()
%33 = icmp ne i32 %32, 0
%34 = zext i1 %33 to i32
br label %72
35: ; preds = %30, %30
%36 = call i32 (...) @support_avx()
%37 = icmp eq i32 %36, 0
%38 = select i1 %37, i32 0, i32 2
br label %72
39: ; preds = %30
%40 = call i32 (...) @support_avx()
%41 = icmp eq i32 %40, 0
%42 = select i1 %41, i32 0, i32 2
br label %72
43: ; preds = %24
switch i32 %20, label %72 [
i32 5, label %44
i32 6, label %44
i32 7, label %48
i32 15, label %48
]
44: ; preds = %43, %43
%45 = call i32 (...) @support_avx()
%46 = icmp eq i32 %45, 0
%47 = select i1 %46, i32 0, i32 2
br label %72
48: ; preds = %43, %43
%49 = call i32 (...) @support_avx()
%50 = icmp eq i32 %49, 0
%51 = select i1 %50, i32 0, i32 2
br label %72
52: ; preds = %24
%53 = icmp eq i32 %20, 6
br i1 %53, label %54, label %72
54: ; preds = %52
%55 = call i32 (...) @support_avx()
%56 = icmp eq i32 %55, 0
%57 = select i1 %56, i32 0, i32 2
br label %72
58: ; preds = %11
%59 = icmp eq i32 %12, 2
%60 = icmp eq i32 %18, 15
%61 = select i1 %59, i1 %60, i1 false
%62 = and i32 %14, 267386880
%63 = icmp eq i32 %62, 6291456
%64 = select i1 %61, i1 %63, i1 false
br i1 %64, label %65, label %72
65: ; preds = %58
switch i32 %20, label %72 [
i32 1, label %66
i32 2, label %68
i32 0, label %70
]
66: ; preds = %65
%67 = call i32 (...) @support_avx()
br label %72
68: ; preds = %65
%69 = call i32 (...) @support_avx()
br label %72
70: ; preds = %65
%71 = call i32 (...) @support_avx()
br label %72
72: ; preds = %24, %25, %30, %43, %52, %22, %65, %58, %70, %68, %66, %54, %48, %44, %39, %35, %31, %26, %0
%73 = phi i32 [ 0, %0 ], [ %29, %26 ], [ %34, %31 ], [ %38, %35 ], [ %42, %39 ], [ %47, %44 ], [ %51, %48 ], [ %57, %54 ], [ 0, %66 ], [ 0, %68 ], [ 0, %70 ], [ 0, %58 ], [ 0, %65 ], [ 0, %22 ], [ 0, %52 ], [ 0, %43 ], [ 0, %30 ], [ 0, %25 ], [ 0, %24 ]
ret i32 %73
}