xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int const uint64_t;

/* Variables and functions */
uint64_t checksum_marker(const uint64_t *src) {
  return src[0] ^ src[1] ^ src[2] ^ src[3] ^ src[4] ^ src[5] ^ src[6];
}


x86 assembly (clang, -O0):
<checksum_marker>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
xor    0x4(%rcx),%eax
mov    -0x8(%rbp),%rcx
xor    0x8(%rcx),%eax
mov    -0x8(%rbp),%rcx
xor    0xc(%rcx),%eax
mov    -0x8(%rbp),%rcx
xor    0x10(%rcx),%eax
mov    -0x8(%rbp),%rcx
xor    0x14(%rcx),%eax
mov    -0x8(%rbp),%rcx
xor    0x18(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checksum_marker>:
movdqu (%rdi),%xmm0
pshufd $0xee,%xmm0,%xmm1
pxor   %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
pxor   %xmm1,%xmm0
movd   %xmm0,%eax
xor    0x10(%rdi),%eax
xor    0x14(%rdi),%eax
xor    0x18(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @checksum_marker(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = load i32, i32* %7
%9 = xor i32 %5, %8
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 2
%12 = load i32, i32* %11
%13 = xor i32 %9, %12
%14 = load i32*, i32** %2
%15 = getelementptr inbounds i32, i32* %14, i64 3
%16 = load i32, i32* %15
%17 = xor i32 %13, %16
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i64 4
%20 = load i32, i32* %19
%21 = xor i32 %17, %20
%22 = load i32*, i32** %2
%23 = getelementptr inbounds i32, i32* %22, i64 5
%24 = load i32, i32* %23
%25 = xor i32 %21, %24
%26 = load i32*, i32** %2
%27 = getelementptr inbounds i32, i32* %26, i64 6
%28 = load i32, i32* %27
%29 = xor i32 %25, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @checksum_marker(i32* nocapture %0) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2
%4 = getelementptr inbounds i32, i32* %0, i64 4
%5 = load i32, i32* %4
%6 = getelementptr inbounds i32, i32* %0, i64 5
%7 = load i32, i32* %6
%8 = getelementptr inbounds i32, i32* %0, i64 6
%9 = load i32, i32* %8
%10 = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %3)
%11 = xor i32 %10, %5
%12 = xor i32 %11, %7
%13 = xor i32 %12, %9
ret i32 %13
}
/* Variables and functions */
float cosf(float);
float __ocl_half_cos_float(float src) { return cosf(src); }


x86 assembly (clang, -O0):
<__ocl_half_cos_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <cosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_half_cos_float>:
jmp    1030 <cosf@plt>

LLVM IR (-O0):
define float @__ocl_half_cos_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @cosf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @__ocl_half_cos_float(float %0) {
%2 = tail call float @cosf(float %0)
ret float %2
}
void save_regs() { __asm volatile("" ::: "r8"); }


x86 assembly (clang, -O0):
<save_regs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_regs>:
ret

LLVM IR (-O0):
define void @save_regs() {
ret void
}

LLVM IR (-O2):
define void @save_regs() {
tail call void asm sideeffect "", "~{r8},~{dirflag},~{fpsr},~{flags}"()
ret void
}
void check_impl_specific(int *num_tests, int *num_errors) {}


x86 assembly (clang, -O0):
<check_impl_specific>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_impl_specific>:
ret

LLVM IR (-O0):
define void @check_impl_specific(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @check_impl_specific(i32* nocapture %0, i32* nocapture %1) {
ret void
}
int dbl(int x) { return 2 * x; }


x86 assembly (clang, -O0):
<dbl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbl>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @dbl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @dbl(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Type definitions */
struct target {
  int dummy;
};

/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ snprintf(char *, int, char *);
char *dump_sys_getgid16(int depth, struct target *target) {
  char *param_str = malloc(5);
  snprintf(param_str, 5, "void");
  return param_str;
}


x86 assembly (clang, -O0):
<dump_sys_getgid16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x5,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x5,%esi
lea    0xeb3(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_sys_getgid16>:
push   %rbx
mov    $0x5,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rdx
mov    %rax,%rdi
mov    $0x5,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.target = type { i32 }
@.str = [5 x i8] c"void\00"
define i8* @dump_sys_getgid16(i32 %0, %struct.target* %1) {
%3 = alloca i32
%4 = alloca %struct.target*
%5 = alloca i8*
store i32 %0, i32* %3
store %struct.target* %1, %struct.target** %4
%6 = call i8* @malloc(i32 5)
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = call i32 @snprintf(i8* %7, i32 5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %5
ret i8* %9
}

LLVM IR (-O2):
%struct.target = type { i32 }
@.str = [5 x i8] c"void\00"
define i8* @dump_sys_getgid16(i32 %0, %struct.target* nocapture readnone %1) {
%3 = tail call dereferenceable_or_null(5) i8* @malloc(i32 5)
%4 = tail call i32 @snprintf(i8* %3, i32 5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
void *ptr(int a) { return 3; }


x86 assembly (clang, -O0):
<ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i8* @ptr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* inttoptr (i64 3 to i8*)
}

LLVM IR (-O2):
define i8* @ptr(i32 %0) {
ret i8* inttoptr (i64 3 to i8*)
}
/* Variables and functions */
int /*<<< orphan*/ core3_print(char *, char *, char const *);
void U_EMRSETSTRETCHBLTMODE_print(const char *contents) {
  core3_print("U_EMRSETSTRETCHBLTMODE", "iMode:", contents);
}


x86 assembly (clang, -O0):
<U_EMRSETSTRETCHBLTMODE_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee9(%rip),%rsi
call   1030 <core3_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETSTRETCHBLTMODE_print>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xef6(%rip),%rsi
jmp    1030 <core3_print@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"U_EMRSETSTRETCHBLTMODE\00"
@.str.1 = [7 x i8] c"iMode:\00"
define void @U_EMRSETSTRETCHBLTMODE_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core3_print(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"U_EMRSETSTRETCHBLTMODE\00"
@.str.1 = [7 x i8] c"iMode:\00"
define void @U_EMRSETSTRETCHBLTMODE_print(i8* %0) {
%2 = tail call i32 @core3_print(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct vector {
  int dummy;
};

/* Variables and functions */
struct vector *vector_init_size(int);
struct vector *vector_create() {
  return vector_init_size(8);
}


x86 assembly (clang, -O0):
<vector_create>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
call   1030 <vector_init_size@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_create>:
mov    $0x8,%edi
jmp    1030 <vector_init_size@plt>

LLVM IR (-O0):
%struct.vector = type { i32 }
define %struct.vector* @vector_create() {
%1 = call %struct.vector* @vector_init_size(i32 8)
ret %struct.vector* %1
}

LLVM IR (-O2):
%struct.vector = type { i32 }
define %struct.vector* @vector_create() {
%1 = tail call %struct.vector* @vector_init_size(i32 8)
ret %struct.vector* %1
}
int pow2(int exp) {
  int x = 1;
  if (exp < 0)
    return 0;
  while (exp--)
    x *= 2;
  return x;
}


x86 assembly (clang, -O0):
<pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1124 <pow2+0x24>
movl   $0x0,-0x4(%rbp)
jmp    1151 <pow2+0x51>
jmp    1129 <pow2+0x29>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     114b <pow2+0x4b>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <pow2+0x29>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow2>:
test   %edi,%edi
js     111a <pow2+0x1a>
je     111d <pow2+0x1d>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    1123 <pow2+0x23>
mov    $0x1,%eax
jmp    1138 <pow2+0x38>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
nopl   0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <pow2+0x30>
test   %ecx,%ecx
je     1147 <pow2+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <pow2+0x40>
ret

LLVM IR (-O0):
define i32 @pow2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %18
8: ; preds = %1
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, -1
store i32 %11, i32* %3
%12 = icmp ne i32 %10, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %4
%15 = mul nsw i32 %14, 2
store i32 %15, i32* %4
br label %9
16: ; preds = %9
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %18
18: ; preds = %16, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @pow2(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %27, label %3
3: ; preds = %1
%4 = icmp eq i32 %0, 0
br i1 %4, label %27, label %5
5: ; preds = %3
%6 = add i32 %0, -1
%7 = and i32 %0, 7
%8 = icmp ult i32 %6, 7
br i1 %8, label %17, label %9
9: ; preds = %5
%10 = and i32 %0, -8
br label %11
11: ; preds = %11, %9
%12 = phi i32 [ 1, %9 ], [ %14, %11 ]
%13 = phi i32 [ 0, %9 ], [ %15, %11 ]
%14 = shl i32 %12, 8
%15 = add i32 %13, 8
%16 = icmp eq i32 %15, %10
br i1 %16, label %17, label %11
17: ; preds = %11, %5
%18 = phi i32 [ undef, %5 ], [ %14, %11 ]
%19 = phi i32 [ 1, %5 ], [ %14, %11 ]
%20 = icmp eq i32 %7, 0
br i1 %20, label %27, label %21
21: ; preds = %17, %21
%22 = phi i32 [ %24, %21 ], [ %19, %17 ]
%23 = phi i32 [ %25, %21 ], [ 0, %17 ]
%24 = shl nsw i32 %22, 1
%25 = add i32 %23, 1
%26 = icmp eq i32 %25, %7
br i1 %26, label %27, label %21
27: ; preds = %17, %21, %3, %1
%28 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %18, %17 ], [ %24, %21 ]
ret i32 %28
}
/* Variables and functions */
unsigned short inw(unsigned int);
unsigned short nsp32_read2(unsigned int base, unsigned int index) {
  return inw(base + index);
}


x86 assembly (clang, -O0):
<nsp32_read2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    -0x8(%rbp),%edi
call   1030 <inw@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsp32_read2>:
add    %esi,%edi
jmp    1030 <inw@plt>

LLVM IR (-O0):
define zeroext i16 @nsp32_read2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add i32 %5, %6
%8 = call zeroext i16 @inw(i32 %7)
ret i16 %8
}

LLVM IR (-O2):
define zeroext i16 @nsp32_read2(i32 %0, i32 %1) {
%3 = add i32 %1, %0
%4 = tail call zeroext i16 @inw(i32 %3)
ret i16 %4
}
AX0AX1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{ (((int *)10000000)[x0]) = (((int *)11111111)[x1]); }


x86 assembly (clang, -O0):
<AX0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
movslq -0x14(%rbp),%rcx
mov    $0xa98ac7,%eax
mov    (%rax,%rcx,4),%edx
movslq -0x10(%rbp),%rcx
mov    $0x989680,%eax
mov    %edx,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AX0AX1>:
movslq %ecx,%rax
mov    0xa98ac7(,%rax,4),%eax
movslq %edx,%rcx
mov    %eax,0x989680(,%rcx,4)
ret

LLVM IR (-O0):
define i32 @AX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* %11
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %15
%17 = load i32, i32* %16
%18 = load i32, i32* %10
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* inttoptr (i64 10000000 to i32*), i64 %19
store i32 %17, i32* %20
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @AX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture readnone %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %7
%9 = load i32, i32* %8
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds i32, i32* inttoptr (i64 10000000 to i32*), i64 %10
store i32 %9, i32* %11
ret i32 undef
}
void g_error_new() {}


x86 assembly (clang, -O0):
<g_error_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_error_new>:
ret

LLVM IR (-O0):
define void @g_error_new() {
ret void
}

LLVM IR (-O2):
define void @g_error_new() {
ret void
}
signed short y_in_laby(signed short y) { return y + 4; }


x86 assembly (clang, -O0):
<y_in_laby>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x4,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<y_in_laby>:
lea    0x4(%rdi),%eax
ret

LLVM IR (-O0):
define signext i16 @y_in_laby(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = add nsw i32 %4, 4
%6 = trunc i32 %5 to i16
ret i16 %6
}

LLVM IR (-O2):
define signext i16 @y_in_laby(i16 signext %0) {
%2 = add i16 %0, 4
ret i16 %2
}
/* Variables and functions */
int exact_square(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  printf("%d", exact_square(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    %eax,%esi
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
call   1040 <exact_square@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @exact_square(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @exact_square(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
int countToEol(const char *pRead) {
  const char *pStart = pRead;
  while (*pRead && *pRead != '\n' && *pRead != '\r') {
    pRead++;
  }
  return pRead - pStart;
}


x86 assembly (clang, -O0):
<countToEol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     114a <countToEol+0x4a>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0xa,%ecx
mov    %al,-0x11(%rbp)
je     114a <countToEol+0x4a>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xd,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115a <countToEol+0x5a>
jmp    116b <countToEol+0x6b>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <countToEol+0x10>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countToEol>:
xor    %eax,%eax
mov    $0x2401,%ecx
jmp    1114 <countToEol+0x14>
nopl   0x0(%rax)
add    $0x1,%rax
movzbl (%rdi,%rax,1),%edx
cmp    $0xd,%rdx
ja     1110 <countToEol+0x10>
bt     %rdx,%rcx
jae    1110 <countToEol+0x10>
ret

LLVM IR (-O0):
define i32 @countToEol(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %22, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 10
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = load i8*, i8** %2
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 13
br label %20
20: ; preds = %15, %10, %5
%21 = phi i1 [ false, %10 ], [ false, %5 ], [ %19, %15 ]
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i8*, i8** %2
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %2
br label %5
25: ; preds = %20
%26 = load i8*, i8** %2
%27 = load i8*, i8** %3
%28 = ptrtoint i8* %26 to i64
%29 = ptrtoint i8* %27 to i64
%30 = sub i64 %28, %29
%31 = trunc i64 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @countToEol(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %7
i8 10, label %7
i8 13, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2, %2
%8 = ptrtoint i8* %3 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i32
ret i32 %11
}
int compare(const void *datum1, const void *datum2) {
  long a = (long)datum1;
  long b = (long)datum2;
  if (a < b)
    return -1;
  if (a > b)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jge    1136 <compare+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1157 <compare+0x57>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jle    1150 <compare+0x50>
movl   $0x1,-0x4(%rbp)
jmp    1157 <compare+0x57>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
xor    %ecx,%ecx
cmp    %rsi,%rdi
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = ptrtoint i8* %8 to i64
store i64 %9, i64* %6
%10 = load i8*, i8** %5
%11 = ptrtoint i8* %10 to i64
store i64 %11, i64* %7
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = icmp slt i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 -1, i32* %3
br label %22
16: ; preds = %2
%17 = load i64, i64* %6
%18 = load i64, i64* %7
%19 = icmp sgt i64 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %3
br label %22
21: ; preds = %16
store i32 0, i32* %3
br label %22
22: ; preds = %21, %20, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @compare(i8* readnone %0, i8* readnone %1) {
%3 = icmp slt i8* %0, %1
%4 = icmp sgt i8* %0, %1
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 -1, i32 %5
ret i32 %6
}
int getnum(char *s) {
  int a;
  char c;
  a = 0;
  while ((c = *s++) >= '0' && c <= '9') {
    a = a * 10 + c - '0';
  }
  return (a);
}


x86 assembly (clang, -O0):
<getnum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    %al,-0xd(%rbp)
movsbl %al,%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0xe(%rbp)
jl     1141 <getnum+0x41>
movsbl -0xd(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
test   $0x1,%al
jne    1151 <getnum+0x51>
jmp    1166 <getnum+0x66>
imul   $0xa,-0xc(%rbp),%eax
movsbl -0xd(%rbp),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <getnum+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getnum>:
mov    (%rdi),%cl
lea    -0x30(%rcx),%edx
xor    %eax,%eax
cmp    $0x9,%dl
ja     113b <getnum+0x3b>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
lea    -0x30(%rcx),%edx
add    $0x1,%rdi
cmp    $0xa,%dl
jb     1120 <getnum+0x20>
ret

LLVM IR (-O0):
define i32 @getnum(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
store i8 %8, i8* %4
%9 = sext i8 %8 to i32
%10 = icmp sge i32 %9, 48
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = load i8, i8* %4
%13 = sext i8 %12 to i32
%14 = icmp sle i32 %13, 57
br label %15
15: ; preds = %11, %5
%16 = phi i1 [ false, %5 ], [ %14, %11 ]
br i1 %16, label %17, label %24
17: ; preds = %15
%18 = load i32, i32* %3
%19 = mul nsw i32 %18, 10
%20 = load i8, i8* %4
%21 = sext i8 %20 to i32
%22 = add nsw i32 %19, %21
%23 = sub nsw i32 %22, 48
store i32 %23, i32* %3
br label %5
24: ; preds = %15
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @getnum(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i8* [ %10, %5 ], [ %0, %1 ]
%8 = phi i32 [ %13, %5 ], [ 0, %1 ]
%9 = zext i8 %6 to i32
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = mul nsw i32 %8, 10
%12 = add i32 %11, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %10
%15 = add i8 %14, -48
%16 = icmp ult i8 %15, 10
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
/* Variables and functions */
int bar(int);
int foo(void) { return bar(42); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%edi
call   1030 <bar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x2a,%edi
jmp    1030 <bar@plt>

LLVM IR (-O0):
define i32 @foo() {
%1 = call i32 @bar(i32 42)
ret i32 %1
}

LLVM IR (-O2):
define i32 @foo() {
%1 = tail call i32 @bar(i32 42)
ret i32 %1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool tsaf_has_pcr(const uint8_t *p_ts) { return !!(p_ts[5] & 0x10); }


x86 assembly (clang, -O0):
<tsaf_has_pcr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tsaf_has_pcr>:
mov    0x14(%rdi),%eax
shr    $0x4,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @tsaf_has_pcr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = and i32 %5, 16
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @tsaf_has_pcr(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = lshr i32 %3, 4
%5 = and i32 %4, 1
ret i32 %5
}
int test_imm_97int8_mem(signed char *val) {
  return ((*val) & (-0x97 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_97int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff69,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_97int8_mem>:
movsbl (%rdi),%eax
test   $0xffffff69,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_97int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -151
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_97int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -151
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
int f(int x, int y) {
  if (x != 0 && x != 1)
    return -2;
  else
    return !x;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112a <f+0x2a>
cmpl   $0x1,-0x8(%rbp)
je     112a <f+0x2a>
movl   $0xfffffffe,-0x4(%rbp)
jmp    113b <f+0x3b>
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %ecx,%ecx
test   %edi,%edi
sete   %cl
cmp    $0x2,%edi
mov    $0xfffffffe,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 -2, i32* %3
br label %17
12: ; preds = %8, %2
%13 = load i32, i32* %4
%14 = icmp ne i32 %13, 0
%15 = xor i1 %14, true
%16 = zext i1 %15 to i32
store i32 %16, i32* %3
br label %17
17: ; preds = %12, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, 2
%4 = icmp eq i32 %0, 0
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 %5, i32 -2
ret i32 %6
}
unsigned int getMPdkLen() { return 64; }


x86 assembly (clang, -O0):
<getMPdkLen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMPdkLen>:
mov    $0x40,%eax
ret

LLVM IR (-O0):
define i32 @getMPdkLen() {
ret i32 64
}

LLVM IR (-O2):
define i32 @getMPdkLen() {
ret i32 64
}
/* Type definitions */
struct sf_lut {
  int dummy;
};

/* Variables and functions */
int EINVAL;
int interpolate_scalingfactor(struct sf_lut *sf_lut, int row_entry, int pc) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<interpolate_scalingfactor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ec9(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpolate_scalingfactor>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.sf_lut = type { i32 }
@EINVAL = global i32 0
define i32 @interpolate_scalingfactor(%struct.sf_lut* %0, i32 %1, i32 %2) {
%4 = alloca %struct.sf_lut*
%5 = alloca i32
%6 = alloca i32
store %struct.sf_lut* %0, %struct.sf_lut** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
%struct.sf_lut = type { i32 }
@EINVAL = global i32 0
define i32 @interpolate_scalingfactor(%struct.sf_lut* nocapture readnone %0, i32 %1, i32 %2) {
%4 = load i32, i32* @EINVAL
%5 = sub nsw i32 0, %4
ret i32 %5
}
int get_flash_params_count(void) { return 110; }


x86 assembly (clang, -O0):
<get_flash_params_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_flash_params_count>:
mov    $0x6e,%eax
ret

LLVM IR (-O0):
define i32 @get_flash_params_count() {
ret i32 110
}

LLVM IR (-O2):
define i32 @get_flash_params_count() {
ret i32 110
}
/* Variables and functions */
int add(int, int);
int main(void) { return add(42, 42); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2a,%esi
mov    %esi,%edi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%edi
mov    $0x2a,%esi
jmp    1030 <add@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @add(i32 42, i32 42)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @add(i32 42, i32 42)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int arquivo_existe(char *arquivo) {
  FILE *fp;
  fp = fopen(arquivo, "r");
  if (fp == NULL) {
    return (0);
  }
  fclose(fp);
  return (1);
}


x86 assembly (clang, -O0):
<arquivo_existe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1157 <arquivo_existe+0x37>
movl   $0x0,-0x4(%rbp)
jmp    1167 <arquivo_existe+0x47>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arquivo_existe>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1141 <arquivo_existe+0x21>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32 @arquivo_existe(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %4
%7 = load i32*, i32** %4
%8 = icmp eq i32* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %13
10: ; preds = %1
%11 = load i32*, i32** %4
%12 = call i32 @fclose(i32* %11)
store i32 1, i32* %2
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define i32 @arquivo_existe(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fclose(i32* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
int _lseek(int fd, int whence, int off) { return -1; }


x86 assembly (clang, -O0):
<_lseek>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_lseek>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_lseek(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @_lseek(i32 %0, i32 %1, i32 %2) {
ret i32 -1
}
int test_imm_94uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x94 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_94uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x94,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_94uint64_lowword_reg>:
test   $0x94,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_94uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 148
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_94uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 148
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool dmc_unrar_unicode_utf16_is_surrogate(uint16_t code) {
  return (code >= 0xD800) && (code <= 0xDFFF);
}


x86 assembly (clang, -O0):
<dmc_unrar_unicode_utf16_is_surrogate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xd800,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <dmc_unrar_unicode_utf16_is_surrogate+0x26>
cmpl   $0xdfff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmc_unrar_unicode_utf16_is_surrogate>:
and    $0xfffff800,%edi
xor    %eax,%eax
cmp    $0xd800,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @dmc_unrar_unicode_utf16_is_surrogate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 55296
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57343
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @dmc_unrar_unicode_utf16_is_surrogate(i32 %0) {
%2 = and i32 %0, -2048
%3 = icmp eq i32 %2, 55296
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct proctal {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ proctal_implementation_pause(struct proctal *);
void proctal_pause(struct proctal *p) { proctal_implementation_pause(p); }


x86 assembly (clang, -O0):
<proctal_pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <proctal_implementation_pause@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<proctal_pause>:
jmp    1030 <proctal_implementation_pause@plt>

LLVM IR (-O0):
%struct.proctal = type { i32 }
define void @proctal_pause(%struct.proctal* %0) {
%2 = alloca %struct.proctal*
store %struct.proctal* %0, %struct.proctal** %2
%3 = load %struct.proctal*, %struct.proctal** %2
%4 = call i32 @proctal_implementation_pause(%struct.proctal* %3)
ret void
}

LLVM IR (-O2):
%struct.proctal = type { i32 }
define void @proctal_pause(%struct.proctal* %0) {
%2 = tail call i32 @proctal_implementation_pause(%struct.proctal* %0)
ret void
}
char motor_get_protect_mask(char count) {
  switch (count) {
  case 1:
    return 0b00000001;
  case 2:
    return 0b00000011;
  case 3:
    return 0b00000111;
  case 4:
    return 0b00001111;
  case 5:
    return 0b00011111;
  case 6:
    return 0b00111111;
  case 7:
    return 0b01111111;
  case 8:
    return 0b11111111;
  }
  return 0;
}


x86 assembly (clang, -O0):
<motor_get_protect_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7,%eax
ja     117c <motor_get_protect_mask+0x7c>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x1,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0x3,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0x7,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0xf,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0x1f,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0x3f,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0x7f,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0xff,-0x1(%rbp)
jmp    1180 <motor_get_protect_mask+0x80>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<motor_get_protect_mask>:
lea    -0x8(,%rdi,8),%ecx
mov    %edi,%edx
add    $0xffffffff,%edx
movabs $0xff7f3f1f0f070301,%rax
3f 7f ff
shr    %cl,%rax
xor    %ecx,%ecx
cmp    $0x8,%edx
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @motor_get_protect_mask(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %14 [
i32 1, label %6
i32 2, label %7
i32 3, label %8
i32 4, label %9
i32 5, label %10
i32 6, label %11
i32 7, label %12
i32 8, label %13
]
6: ; preds = %1
store i8 1, i8* %2
br label %15
7: ; preds = %1
store i8 3, i8* %2
br label %15
8: ; preds = %1
store i8 7, i8* %2
br label %15
9: ; preds = %1
store i8 15, i8* %2
br label %15
10: ; preds = %1
store i8 31, i8* %2
br label %15
11: ; preds = %1
store i8 63, i8* %2
br label %15
12: ; preds = %1
store i8 127, i8* %2
br label %15
13: ; preds = %1
store i8 -1, i8* %2
br label %15
14: ; preds = %1
store i8 0, i8* %2
br label %15
15: ; preds = %14, %13, %12, %11, %10, %9, %8, %7, %6
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @motor_get_protect_mask(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -1
%4 = icmp ult i32 %3, 8
%5 = zext i32 %3 to i64
%6 = shl nuw nsw i64 %5, 3
%7 = lshr i64 -36240869367020799, %6
%8 = trunc i64 %7 to i8
%9 = select i1 %4, i8 %8, i8 0
ret i8 %9
}
/* Variables and functions */
double randu53();
double oct_randu(void) { return randu53(); }


x86 assembly (clang, -O0):
<oct_randu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <randu53@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<oct_randu>:
xor    %eax,%eax
jmp    1030 <randu53@plt>

LLVM IR (-O0):
define double @oct_randu() {
%1 = call double (...) @randu53()
ret double %1
}

LLVM IR (-O2):
define double @oct_randu() {
%1 = tail call double (...) @randu53()
ret double %1
}
/* Variables and functions */
scalar_t__ COND_VS();
int /*<<< orphan*/ EA_A7_PI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_svs_8_pi7(void) {
  m68ki_write_8(EA_A7_PI_8(), COND_VS() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_svs_8_pi7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_VS@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_svs_8_pi7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_VS@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_svs_8_pi7() {
%1 = call i32 (...) @EA_A7_PI_8()
%2 = call i64 (...) @COND_VS()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_svs_8_pi7() {
%1 = tail call i32 (...) @EA_A7_PI_8()
%2 = tail call i64 (...) @COND_VS()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void _usage(void) {
  fprintf(stderr, "Usage: cerebrod [OPTIONS]\n"
                  "-h    --help          Output Help\n"
                  "-v    --version       Output Version\n");
  fprintf(
      stderr,
      "-c    --config_file   Specify alternate config file\n"
      "-d    --debug         Turn on debugging and run daemon in foreground\n");
  exit(0);
}


x86 assembly (clang, -O0):
<_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xf19(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<_usage>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf23(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [98 x i8] c"Usage: cerebrod [OPTIONS]\0A-h --help Output Help\0A-v --version Output Version\0A\00"
@.str.1 = [122 x i8] c"-c --config_file Specify alternate config file\0A-d --debug Turn on debugging and run daemon in foreground\0A\00"
define void @_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([122 x i8], [122 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [98 x i8] c"Usage: cerebrod [OPTIONS]\0A-h --help Output Help\0A-v --version Output Version\0A\00"
@.str.1 = [122 x i8] c"-c --config_file Specify alternate config file\0A-d --debug Turn on debugging and run daemon in foreground\0A\00"
define void @_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([122 x i8], [122 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 0)
unreachable
}
int smb1357_get_charging_status(void) { return 0; }


x86 assembly (clang, -O0):
<smb1357_get_charging_status>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smb1357_get_charging_status>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @smb1357_get_charging_status() {
ret i32 0
}

LLVM IR (-O2):
define i32 @smb1357_get_charging_status() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("%%%\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%%%\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%%%\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int rand();
int randDado(int x) {
  int n;
  do {
    n = (rand() % 6) + 1;
  } while (n == 7 - x);
  return n;
}


x86 assembly (clang, -O0):
<randDado>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x6,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x7,%ecx
sub    -0x4(%rbp),%ecx
cmp    %ecx,%eax
je     111b <randDado+0xb>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randDado>:
push   %rbx
mov    $0x7,%ebx
sub    %edi,%ebx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x2aaaaaab,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,2),%ecx
neg    %ecx
add    %ecx,%eax
add    $0x1,%eax
cmp    %ebx,%eax
je     1120 <randDado+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randDado(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %8, %1
%5 = call i32 (...) @rand()
%6 = srem i32 %5, 6
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
br label %8
8: ; preds = %4
%9 = load i32, i32* %3
%10 = load i32, i32* %2
%11 = sub nsw i32 7, %10
%12 = icmp eq i32 %9, %11
br i1 %12, label %4, label %13
13: ; preds = %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @randDado(i32 %0) {
%2 = sub nsw i32 7, %0
br label %3
3: ; preds = %3, %1
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, 6
%6 = add nsw i32 %5, 1
%7 = icmp eq i32 %6, %2
br i1 %7, label %3, label %8
8: ; preds = %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ rtv_EnableTSIF();
void rtvMTV23x_EnableStreamOut(void) {
  ((void)0);
  rtv_EnableTSIF();
  ((void)0);
}


x86 assembly (clang, -O0):
<rtvMTV23x_EnableStreamOut>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rtv_EnableTSIF@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtvMTV23x_EnableStreamOut>:
xor    %eax,%eax
jmp    1030 <rtv_EnableTSIF@plt>

LLVM IR (-O0):
define void @rtvMTV23x_EnableStreamOut() {
%1 = call i32 (...) @rtv_EnableTSIF()
ret void
}

LLVM IR (-O2):
define void @rtvMTV23x_EnableStreamOut() {
%1 = tail call i32 (...) @rtv_EnableTSIF()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *calloc(int, size_t const);
int /*<<< orphan*/ printf(char *, int, size_t const);
void *checkedCallocOne(const size_t size) {
  void *retVal = calloc(1, size);
  if (retVal == NULL) {
    printf("calloc failed nmemb %u size %zu\n", 1, size);
    abort();
  }
  return retVal;
}


x86 assembly (clang, -O0):
<checkedCallocOne>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1050 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1175 <checkedCallocOne+0x45>
mov    -0x8(%rbp),%rdx
lea    0xe9c(%rip),%rdi
mov    $0x1,%esi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkedCallocOne>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%edi
mov    %rbx,%rsi
call   1050 <calloc@plt>
test   %rax,%rax
je     1148 <checkedCallocOne+0x18>
pop    %rbx
ret
lea    0xeb1(%rip),%rdi
mov    $0x1,%esi
mov    %rbx,%rdx
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"calloc failed nmemb %u size %zu\0A\00"
define i8* @checkedCallocOne(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @calloc(i32 1, i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 1, i64 %9)
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [33 x i8] c"calloc failed nmemb %u size %zu\0A\00"
define i8* @checkedCallocOne(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 1, i64 %0)
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %1
ret i8* %2
}