#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int highest_bit_index(uint64_t bits) {
  int position;
  int shift;
  position = (bits > 0xFFFFFFFF) << 5;
  bits >>= position;
  shift = (bits > 0xFFFF) << 4;
  bits >>= shift;
  position |= shift;
  shift = (bits > 0xFF) << 3;
  bits >>= shift;
  position |= shift;
  shift = (bits > 0xF) << 2;
  bits >>= shift;
  position |= shift;
  shift = (bits > 0x3) << 1;
  bits >>= shift;
  position |= shift;
  position |= (bits >> 1);
  return position;
}


x86 assembly (clang, -O0):
<highest_bit_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%eax
shl    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0xffff,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xff,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
shl    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xf,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
shl    $0x2,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<highest_bit_index>:
xor    %eax,%eax
cmp    $0x10000,%edi
setge  %al
shl    $0x4,%eax
mov    %eax,%ecx
sar    %cl,%edi
xor    %edx,%edx
cmp    $0x100,%edi
setge  %dl
lea    0x0(,%rdx,8),%ecx
sar    %cl,%edi
xor    %esi,%esi
cmp    $0x10,%edi
setge  %sil
lea    0x0(,%rsi,4),%ecx
sar    %cl,%edi
lea    (%rax,%rdx,8),%eax
xor    %edx,%edx
cmp    $0x4,%edi
setge  %dl
lea    (%rdx,%rdx,1),%ecx
sar    %cl,%edi
lea    (%rax,%rsi,4),%eax
lea    (%rax,%rdx,2),%eax
sar    %edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @highest_bit_index(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, -1
%7 = zext i1 %6 to i32
%8 = shl i32 %7, 5
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = load i32, i32* %2
%11 = ashr i32 %10, %9
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = icmp sgt i32 %12, 65535
%14 = zext i1 %13 to i32
%15 = shl i32 %14, 4
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = load i32, i32* %2
%18 = ashr i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %4
%20 = load i32, i32* %3
%21 = or i32 %20, %19
store i32 %21, i32* %3
%22 = load i32, i32* %2
%23 = icmp sgt i32 %22, 255
%24 = zext i1 %23 to i32
%25 = shl i32 %24, 3
store i32 %25, i32* %4
%26 = load i32, i32* %4
%27 = load i32, i32* %2
%28 = ashr i32 %27, %26
store i32 %28, i32* %2
%29 = load i32, i32* %4
%30 = load i32, i32* %3
%31 = or i32 %30, %29
store i32 %31, i32* %3
%32 = load i32, i32* %2
%33 = icmp sgt i32 %32, 15
%34 = zext i1 %33 to i32
%35 = shl i32 %34, 2
store i32 %35, i32* %4
%36 = load i32, i32* %4
%37 = load i32, i32* %2
%38 = ashr i32 %37, %36
store i32 %38, i32* %2
%39 = load i32, i32* %4
%40 = load i32, i32* %3
%41 = or i32 %40, %39
store i32 %41, i32* %3
%42 = load i32, i32* %2
%43 = icmp sgt i32 %42, 3
%44 = zext i1 %43 to i32
%45 = shl i32 %44, 1
store i32 %45, i32* %4
%46 = load i32, i32* %4
%47 = load i32, i32* %2
%48 = ashr i32 %47, %46
store i32 %48, i32* %2
%49 = load i32, i32* %4
%50 = load i32, i32* %3
%51 = or i32 %50, %49
store i32 %51, i32* %3
%52 = load i32, i32* %2
%53 = ashr i32 %52, 1
%54 = load i32, i32* %3
%55 = or i32 %54, %53
store i32 %55, i32* %3
%56 = load i32, i32* %3
ret i32 %56
}

LLVM IR (-O2):
define i32 @highest_bit_index(i32 %0) {
%2 = icmp sgt i32 %0, 65535
%3 = select i1 %2, i32 16, i32 0
%4 = ashr i32 %0, %3
%5 = icmp sgt i32 %4, 255
%6 = select i1 %5, i32 8, i32 0
%7 = ashr i32 %4, %6
%8 = or i32 %6, %3
%9 = icmp sgt i32 %7, 15
%10 = select i1 %9, i32 4, i32 0
%11 = ashr i32 %7, %10
%12 = or i32 %8, %10
%13 = icmp sgt i32 %11, 3
%14 = select i1 %13, i32 2, i32 0
%15 = ashr i32 %11, %14
%16 = or i32 %12, %14
%17 = ashr i32 %15, 1
%18 = or i32 %16, %17
ret i32 %18
}