xunge/DecIR huggingface dataset:
double read_PCSL16Number(char *p) {
  unsigned long o32;
  o32 = 256 * (unsigned long)((unsigned char *)p)[0] +
        (unsigned long)((unsigned char *)p)[1];
  return (double)o32 / 652.800;
}


x86 assembly (clang, -O0):
<read_PCSL16Number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
shl    $0x30,%rax
bswap  %rax
mov    %rax,-0x10(%rbp)
movaps 0xeef(%rip),%xmm1
movq   -0x10(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xeee(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xeb7(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_PCSL16Number>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
cvtsi2sd %eax,%xmm0
divsd  0xeec(%rip),%xmm0
ret

LLVM IR (-O0):
define double @read_PCSL16Number(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = mul i64 256, %7
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i64
%13 = add i64 %8, %12
store i64 %13, i64* %3
%14 = load i64, i64* %3
%15 = uitofp i64 %14 to double
%16 = fdiv double %15, 6.528000e+02
ret double %16
}

LLVM IR (-O2):
define double @read_PCSL16Number(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = shl nuw nsw i64 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = or i64 %4, %7
%9 = uitofp i64 %8 to double
%10 = fdiv double %9, 6.528000e+02
ret double %10
}
void foo480(int p) {}


x86 assembly (clang, -O0):
<foo480>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo480>:
ret

LLVM IR (-O0):
define void @foo480(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo480(i32 %0) {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XMapEvent;

/* Variables and functions */
void set_XMapEvent_serial(void *_p, unsigned long _v) {
  ((XMapEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XMapEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XMapEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XMapEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XMapEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430TimerCapComP__7__Compare__default__fired();
void Msp430TimerCapComP__7__Compare__fired(void) {
  Msp430TimerCapComP__7__Compare__default__fired();
}


x86 assembly (clang, -O0):
<Msp430TimerCapComP__7__Compare__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430TimerCapComP__7__Compare__default__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430TimerCapComP__7__Compare__fired>:
xor    %eax,%eax
jmp    1030 <Msp430TimerCapComP__7__Compare__default__fired@plt>

LLVM IR (-O0):
define void @Msp430TimerCapComP__7__Compare__fired() {
%1 = call i32 (...) @Msp430TimerCapComP__7__Compare__default__fired()
ret void
}

LLVM IR (-O2):
define void @Msp430TimerCapComP__7__Compare__fired() {
%1 = tail call i32 (...) @Msp430TimerCapComP__7__Compare__default__fired()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ move(int, int);
void conio_gotoxy(int x, int y) { move(y - 1, x - 1); }


x86 assembly (clang, -O0):
<conio_gotoxy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0x4(%rbp),%esi
sub    $0x1,%esi
call   1030 <move@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conio_gotoxy>:
lea    -0x1(%rsi),%eax
lea    -0x1(%rdi),%esi
mov    %eax,%edi
jmp    1030 <move@plt>

LLVM IR (-O0):
define void @conio_gotoxy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sub nsw i32 %5, 1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = call i32 @move(i32 %6, i32 %8)
ret void
}

LLVM IR (-O2):
define void @conio_gotoxy(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @move(i32 %3, i32 %4)
ret void
}
unsigned long task_stack_page(void) {
  unsigned long r;
  asm volatile("movq %%rsp, %0\n" : "=r"(r)::);
  return r;
}


x86 assembly (clang, -O0):
<task_stack_page>:
push   %rbp
mov    %rsp,%rbp
mov    %rsp,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_stack_page>:
mov    %rsp,%rax
ret

LLVM IR (-O0):
define i64 @task_stack_page() {
%1 = alloca i64
%2 = call i64 asm sideeffect "movq %rsp, $0\0A", "=r,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @task_stack_page() {
%1 = tail call i64 asm sideeffect "movq %rsp, $0\0A", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
unsigned int SCE_Math_NextPowerOfTwo(unsigned int n) {
  n--;
  n |= n >> 1;
  n |= n >> 2;
  n |= n >> 4;
  n |= n >> 8;
  n |= n >> 16;
  return n + 1;
}


x86 assembly (clang, -O0):
<SCE_Math_NextPowerOfTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCE_Math_NextPowerOfTwo>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
shr    %ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
shr    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
shr    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SCE_Math_NextPowerOfTwo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = lshr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = lshr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = lshr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = lshr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = lshr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = add i32 %25, 1
ret i32 %26
}

LLVM IR (-O2):
define i32 @SCE_Math_NextPowerOfTwo(i32 %0) {
%2 = add i32 %0, -1
%3 = lshr i32 %2, 1
%4 = or i32 %3, %2
%5 = lshr i32 %4, 2
%6 = or i32 %5, %4
%7 = lshr i32 %6, 4
%8 = or i32 %7, %6
%9 = lshr i32 %8, 8
%10 = or i32 %9, %8
%11 = lshr i32 %10, 16
%12 = or i32 %11, %10
%13 = add i32 %12, 1
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void ptask_syserror(char *f, char *msg) {
  fprintf(stderr, "%s: ", f);
  fprintf(stderr, "%s \n", msg);
  exit(-1);
}


x86 assembly (clang, -O0):
<ptask_syserror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xebc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xea8(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<ptask_syserror>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%rdx
mov    0x2eaf(%rip),%r14
mov    (%r14),%edi
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xebb(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [5 x i8] c"%s: \00"
@.str.1 = [5 x i8] c"%s \0A\00"
define void @ptask_syserror(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %4
%10 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %9)
%11 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [5 x i8] c"%s: \00"
@.str.1 = [5 x i8] c"%s \0A\00"
define void @ptask_syserror(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%7 = tail call i32 @exit(i32 -1)
unreachable
}
long long int f3(long long int x) {
  return (x << 5) | (long long int)((unsigned long long int)x >> 59);
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x5,%rax
mov    -0x8(%rbp),%rcx
shr    $0x3b,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
mov    %rdi,%rax
rol    $0x5,%rax
ret

LLVM IR (-O0):
define i64 @f3(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 5
%5 = load i64, i64* %2
%6 = lshr i64 %5, 59
%7 = or i64 %4, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @f3(i64 %0) {
%2 = tail call i64 @llvm.fshl.i64(i64 %0, i64 %0, i64 5)
ret i64 %2
}
void TimerForcedOC3Configure(unsigned long ulBase,
                             unsigned long ulForcedAction) {
  unsigned long ulTempccmr2 = 0;

  ;

  ;
  ulTempccmr2 = (*((volatile unsigned long *)(ulBase + 0x0000001C)));
  ulTempccmr2 &= ~0x00000070;
  ulTempccmr2 |= ulForcedAction;
  (*((volatile unsigned long *)(ulBase + 0x0000001C))) = ulTempccmr2;
}


x86 assembly (clang, -O0):
<TimerForcedOC3Configure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1c(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0xffffffffffffff8f,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x1c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerForcedOC3Configure>:
mov    0x1c(%rdi),%rax
and    $0xffffffffffffff8f,%rax
or     %rsi,%rax
mov    %rax,0x1c(%rdi)
ret

LLVM IR (-O0):
define void @TimerForcedOC3Configure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %5
%6 = load i64, i64* %3
%7 = add i64 %6, 28
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = and i64 %10, -113
store i64 %11, i64* %5
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = or i64 %13, %12
store i64 %14, i64* %5
%15 = load i64, i64* %5
%16 = load i64, i64* %3
%17 = add i64 %16, 28
%18 = inttoptr i64 %17 to i64*
store volatile i64 %15, i64* %18
ret void
}

LLVM IR (-O2):
define void @TimerForcedOC3Configure(i64 %0, i64 %1) {
%3 = add i64 %0, 28
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -113
%7 = or i64 %6, %1
store volatile i64 %7, i64* %4
ret void
}
void gtk_toggle_tool_button_set_active() {}


x86 assembly (clang, -O0):
<gtk_toggle_tool_button_set_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_toggle_tool_button_set_active>:
ret

LLVM IR (-O0):
define void @gtk_toggle_tool_button_set_active() {
ret void
}

LLVM IR (-O2):
define void @gtk_toggle_tool_button_set_active() {
ret void
}
int fib(int num) {
  if (num <= 1) {
    return 1;
  } else {
    return fib(num - 1) + fib(num - 2);
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fib+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fib(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long current_time() {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return tv.tv_sec * 1000 + tv.tv_usec / 1000;
}


x86 assembly (clang, -O0):
<current_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<current_time>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0x3e8,%rax,%rcx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i64 @current_time() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i64 @current_time() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
%11 = sext i32 %10 to i64
ret i64 %11
}
/* Variables and functions */
scalar_t__ isdigit(int);
scalar_t__ isupper(int);
int hextoi(int c) {
  return isdigit(c) ? (c - '0')
                    : (isupper(c) ? (c - 'A' + 10) : (c - 'a' + 10));
}


x86 assembly (clang, -O0):
<hextoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     114b <hextoi+0x2b>
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    1180 <hextoi+0x60>
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
je     116e <hextoi+0x4e>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
jmp    117a <hextoi+0x5a>
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hextoi>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0xffffffd0,%eax
test   %rcx,%rcx
jne    114d <hextoi+0x2d>
mov    %ebx,%edi
call   1040 <isupper@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
shl    $0x5,%eax
add    $0xffffffa9,%eax
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hextoi(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 48
br label %23
9: ; preds = %1
%10 = load i32, i32* %2
%11 = call i64 @isupper(i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 65
%16 = add nsw i32 %15, 10
br label %21
17: ; preds = %9
%18 = load i32, i32* %2
%19 = sub nsw i32 %18, 97
%20 = add nsw i32 %19, 10
br label %21
21: ; preds = %17, %13
%22 = phi i32 [ %16, %13 ], [ %20, %17 ]
br label %23
23: ; preds = %21, %6
%24 = phi i32 [ %8, %6 ], [ %22, %21 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @hextoi(i32 %0) {
%2 = tail call i64 @isdigit(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isupper(i32 %0)
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 -87, i32 -55
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ -48, %1 ], [ %7, %4 ]
%10 = add nsw i32 %9, %0
ret i32 %10
}
int exemplo2(int i) { return i * 2; }


x86 assembly (clang, -O0):
<exemplo2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exemplo2>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @exemplo2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @exemplo2(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
int mdp4_dsi_video_pipe_commit(int cndx, int wait) { return 0; }


x86 assembly (clang, -O0):
<mdp4_dsi_video_pipe_commit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_dsi_video_pipe_commit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mdp4_dsi_video_pipe_commit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @mdp4_dsi_video_pipe_commit(i32 %0, i32 %1) {
ret i32 0
}
int any(c, s)
register int c;
register char *s;
{
  while (*s)
    if (*s++ == c)
      return (1);
  return (0);
}


x86 assembly (clang, -O0):
<any>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1144 <any+0x44>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    -0x8(%rbp),%eax
jne    113f <any+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    114b <any+0x4b>
jmp    110b <any+0xb>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<any>:
movsbl (%rsi),%eax
test   %eax,%eax
je     1115 <any+0x15>
add    $0x1,%rsi
cmp    %edi,%eax
jne    1100 <any>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @any(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = load i32, i32* %4
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %10
store i32 1, i32* %3
br label %20
18: ; preds = %10
br label %6
19: ; preds = %6
store i32 0, i32* %3
br label %20
20: ; preds = %19, %17
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @any(i32 %0, i8* nocapture %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %1, %2 ], [ %8, %7 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = sext i8 %5 to i32
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %3
11: ; preds = %3, %7
%12 = phi i32 [ 1, %7 ], [ 0, %3 ]
ret i32 %12
}
int deterministic_status(void) { return 1; }


x86 assembly (clang, -O0):
<deterministic_status>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deterministic_status>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @deterministic_status() {
ret i32 1
}

LLVM IR (-O2):
define i32 @deterministic_status() {
ret i32 1
}
int security_socket_create(int family, int type, int protocol) { return 0; }


x86 assembly (clang, -O0):
<security_socket_create>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_socket_create>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @security_socket_create(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @security_socket_create(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
bool nrf51_errata_40(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_40>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_40>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_40() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_40() {
ret i32 0
}
/* Variables and functions */
int process_move_internal(char **, int /*<<< orphan*/, int /*<<< orphan*/);
int process_above(char **x) { return process_move_internal(x, 0, 0); }


x86 assembly (clang, -O0):
<process_above>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <process_move_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_above>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <process_move_internal@plt>

LLVM IR (-O0):
define i32 @process_above(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @process_move_internal(i8** %3, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @process_above(i8** %0) {
%2 = tail call i32 @process_move_internal(i8** %0, i32 0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ m68ki_push_32(unsigned int);
unsigned int m68ki_read_imm_32();
void m68k_op_pea_32_al(void) {
  unsigned int ea = m68ki_read_imm_32();
  m68ki_push_32(ea);
}


x86 assembly (clang, -O0):
<m68k_op_pea_32_al>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <m68ki_read_imm_32@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <m68ki_push_32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_pea_32_al>:
push   %rax
xor    %eax,%eax
call   1040 <m68ki_read_imm_32@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <m68ki_push_32@plt>

LLVM IR (-O0):
define void @m68k_op_pea_32_al() {
%1 = alloca i32
%2 = call i32 (...) @m68ki_read_imm_32()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @m68ki_push_32(i32 %3)
ret void
}

LLVM IR (-O2):
define void @m68k_op_pea_32_al() {
%1 = tail call i32 (...) @m68ki_read_imm_32()
%2 = tail call i32 @m68ki_push_32(i32 %1)
ret void
}
int dcmple(double a, double b) { return a <= b; }


x86 assembly (clang, -O0):
<dcmple>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcmple>:
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @dcmple(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ole double %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @dcmple(double %0, double %1) {
%3 = fcmp ole double %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
int main() {
  usleep(5000000);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4c4b40,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4c4b40,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @usleep(i32 5000000)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @usleep(i32 5000000)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
int alock_check_xrender(Display *display) {
  (void)display;
  return 0;
}


x86 assembly (clang, -O0):
<alock_check_xrender>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alock_check_xrender>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @alock_check_xrender(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @alock_check_xrender(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ftest1(void) { printf("ftest1\n"); }


x86 assembly (clang, -O0):
<ftest1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftest1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"ftest1\0A\00"
define void @ftest1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"ftest1\00"
define void @ftest1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double funcAngCor_alpha0_4plus_0plus_15097_L4(double *, double *);
double sin(double);
double fitAngDist_alpha0_4plus_0plus_15097_L4(double *x, double *par) {
  double result;
  result = funcAngCor_alpha0_4plus_0plus_15097_L4(x, &par[0]) *
           sin(x[0] * 0.0174533);
  return result;
}


x86 assembly (clang, -O0):
<fitAngDist_alpha0_4plus_0plus_15097_L4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <funcAngCor_alpha0_4plus_0plus_15097_L4@plt>
movsd  %xmm0,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xeb2(%rip),%xmm0
mulsd  (%rax),%xmm0
call   1040 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fitAngDist_alpha0_4plus_0plus_15097_L4>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1030 <funcAngCor_alpha0_4plus_0plus_15097_L4@plt>
movsd  %xmm0,0x8(%rsp)
movsd  (%rbx),%xmm0
mulsd  0xec1(%rip),%xmm0
call   1040 <sin@plt>
mulsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @fitAngDist_alpha0_4plus_0plus_15097_L4(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = call double @funcAngCor_alpha0_4plus_0plus_15097_L4(double* %6, double* %8)
%10 = load double*, double** %3
%11 = getelementptr inbounds double, double* %10, i64 0
%12 = load double, double* %11
%13 = fmul double %12, 1.745330e-02
%14 = call double @sin(double %13)
%15 = fmul double %9, %14
store double %15, double* %5
%16 = load double, double* %5
ret double %16
}

LLVM IR (-O2):
define double @fitAngDist_alpha0_4plus_0plus_15097_L4(double* %0, double* %1) {
%3 = tail call double @funcAngCor_alpha0_4plus_0plus_15097_L4(double* %0, double* %1)
%4 = load double, double* %0
%5 = fmul double %4, 1.745330e-02
%6 = tail call double @sin(double %5)
%7 = fmul double %3, %6
ret double %7
}
/* Variables and functions */
void loadServerConfig(const char *filename) {
  if (filename != NULL) {
  }
}


x86 assembly (clang, -O0):
<loadServerConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1118 <loadServerConfig+0x18>
jmp    1118 <loadServerConfig+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadServerConfig>:
ret

LLVM IR (-O0):
define void @loadServerConfig(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @loadServerConfig(i8* nocapture %0) {
ret void
}
char *cmddisplay(s, cx)
char *s;
int cx;
{
  static char buf[80];
  if ((int)strlen(s) > 70) {
    sprintf(buf, "%.64s...", s);
    s = buf;
  }
  return (s);
}


x86 assembly (clang, -O0):
<cmddisplay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x46,%eax
jle    1165 <cmddisplay+0x45>
mov    -0x8(%rbp),%rdx
lea    0x2ef4(%rip),%rdi
lea    0xead(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
lea    0x2edf(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmddisplay>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <strlen@plt>
cmp    $0x47,%eax
jl     114f <cmddisplay+0x2f>
lea    0x2f08(%rip),%r14
lea    0xec1(%rip),%rsi
mov    %r14,%rdi
mov    %rbx,%rdx
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@cmddisplay.buf = internal global [80 x i8] zeroinitializer
@.str = [9 x i8] c"%.64s...\00"
define i8* @cmddisplay(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i64 @strlen(i8* %5)
%7 = trunc i64 %6 to i32
%8 = icmp sgt i32 %7, 70
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = call i32 (i8*, i8*, ...) @sprintf(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @cmddisplay.buf, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %10)
store i8* getelementptr inbounds ([80 x i8], [80 x i8]* @cmddisplay.buf, i64 0, i64 0), i8** %3
br label %12
12: ; preds = %9, %2
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@cmddisplay.buf = internal global [80 x i8] zeroinitializer
@.str = [9 x i8] c"%.64s...\00"
define i8* @cmddisplay(i8* %0, i32 %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = trunc i64 %3 to i32
%5 = icmp sgt i32 %4, 70
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (i8*, i8*, ...) @sprintf(i8* dereferenceable(1) getelementptr inbounds ([80 x i8], [80 x i8]* @cmddisplay.buf, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %8
8: ; preds = %6, %2
%9 = phi i8* [ getelementptr inbounds ([80 x i8], [80 x i8]* @cmddisplay.buf, i64 0, i64 0), %6 ], [ %0, %2 ]
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void my_free1(void *p) { free(p); }


x86 assembly (clang, -O0):
<my_free1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_free1>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @my_free1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @my_free1(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
double Dist2(x1, y1, z1, x2, y2, z2)
double x1, y1, z1, x2, y2, z2;
{
  double dx, dy, dz;
  dx = x1 - x2;
  dy = y1 - y2;
  dz = z1 - z2;
  return (dx * dx + dy * dy + dz * dz);
}


x86 assembly (clang, -O0):
<Dist2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  %xmm5,-0x30(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x30(%rbp),%xmm0
movsd  %xmm0,-0x48(%rbp)
movsd  -0x38(%rbp),%xmm1
movsd  -0x38(%rbp),%xmm2
movsd  -0x40(%rbp),%xmm0
mulsd  -0x40(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x48(%rbp),%xmm0
movsd  -0x48(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dist2>:
subsd  %xmm3,%xmm0
subsd  %xmm4,%xmm1
subsd  %xmm5,%xmm2
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @Dist2(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
%13 = alloca double
%14 = alloca double
%15 = alloca double
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
%16 = load double, double* %7
%17 = load double, double* %10
%18 = fsub double %16, %17
store double %18, double* %13
%19 = load double, double* %8
%20 = load double, double* %11
%21 = fsub double %19, %20
store double %21, double* %14
%22 = load double, double* %9
%23 = load double, double* %12
%24 = fsub double %22, %23
store double %24, double* %15
%25 = load double, double* %13
%26 = load double, double* %13
%27 = load double, double* %14
%28 = load double, double* %14
%29 = fmul double %27, %28
%30 = call double @llvm.fmuladd.f64(double %25, double %26, double %29)
%31 = load double, double* %15
%32 = load double, double* %15
%33 = call double @llvm.fmuladd.f64(double %31, double %32, double %30)
ret double %33
}

LLVM IR (-O2):
define double @Dist2(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = fsub double %0, %3
%8 = fsub double %1, %4
%9 = fsub double %2, %5
%10 = fmul double %8, %8
%11 = tail call double @llvm.fmuladd.f64(double %7, double %7, double %10)
%12 = tail call double @llvm.fmuladd.f64(double %9, double %9, double %11)
ret double %12
}
void *Parrot_dlsym(void *handle, const char *symbol) { return 0; }


x86 assembly (clang, -O0):
<Parrot_dlsym>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Parrot_dlsym>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @Parrot_dlsym(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @Parrot_dlsym(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ display_update(int, int /*<<< orphan*/);
void lcd_clear() {
  display_update(0x01, 0);
  return;
}


x86 assembly (clang, -O0):
<lcd_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <display_update@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_clear>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <display_update@plt>

LLVM IR (-O0):
define void @lcd_clear() {
%1 = call i32 @display_update(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @lcd_clear() {
%1 = tail call i32 @display_update(i32 1, i32 0)
ret void
}
void VDP_FillVRAM(unsigned int begin, unsigned int size, unsigned char value) {
  begin;
  size;
  value;
}


x86 assembly (clang, -O0):
<VDP_FillVRAM>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<VDP_FillVRAM>:
ret

LLVM IR (-O0):
define void @VDP_FillVRAM(i32 %0, i32 %1, i8 zeroext %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i8, i8* %6
ret void
}

LLVM IR (-O2):
define void @VDP_FillVRAM(i32 %0, i32 %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setFrequencies(int, int);
int /*<<< orphan*/ usleep(int);
void forceFrequencies(int cpuFrequency, int gpuFrequency) {
  setFrequencies(cpuFrequency, gpuFrequency);
  usleep(100 * 1000);
  setFrequencies(cpuFrequency, gpuFrequency);
  usleep(100 * 1000);
  setFrequencies(cpuFrequency, gpuFrequency);
}


x86 assembly (clang, -O0):
<forceFrequencies>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <setFrequencies@plt>
mov    $0x186a0,%edi
call   1040 <usleep@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <setFrequencies@plt>
mov    $0x186a0,%edi
call   1040 <usleep@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <setFrequencies@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forceFrequencies>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <setFrequencies@plt>
mov    $0x186a0,%edi
call   1040 <usleep@plt>
mov    %ebp,%edi
mov    %ebx,%esi
call   1030 <setFrequencies@plt>
mov    $0x186a0,%edi
call   1040 <usleep@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <setFrequencies@plt>

LLVM IR (-O0):
define void @forceFrequencies(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @setFrequencies(i32 %5, i32 %6)
%8 = call i32 @usleep(i32 100000)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @setFrequencies(i32 %9, i32 %10)
%12 = call i32 @usleep(i32 100000)
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = call i32 @setFrequencies(i32 %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @forceFrequencies(i32 %0, i32 %1) {
%3 = tail call i32 @setFrequencies(i32 %0, i32 %1)
%4 = tail call i32 @usleep(i32 100000)
%5 = tail call i32 @setFrequencies(i32 %0, i32 %1)
%6 = tail call i32 @usleep(i32 100000)
%7 = tail call i32 @setFrequencies(i32 %0, i32 %1)
ret void
}
void syscall_invalid() {
  printf("\n%[Invalid syscall! System halted!%]", 12);
  while (1) {
    __asm__ __volatile__("cli \n"
                         "hlt \n");
  }
}


x86 assembly (clang, -O0):
<syscall_invalid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0xc,%esi
mov    $0x0,%al
call   1030 <printf@plt>
cli
hlt
jmp    1127 <syscall_invalid+0x17>

x86 assembly (clang, -O2):
<syscall_invalid>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xc,%esi
xor    %eax,%eax
call   1030 <printf@plt>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
cli
hlt
jmp    1130 <syscall_invalid+0x20>

LLVM IR (-O0):
@.str = [37 x i8] c"\0A%[Invalid syscall! System halted!%]\00"
define void @syscall_invalid() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 12)
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [37 x i8] c"\0A%[Invalid syscall! System halted!%]\00"
define void @syscall_invalid() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 12)
br label %2
2: ; preds = %0, %2
tail call void asm sideeffect "cli \0Ahlt \0A", "~{dirflag},~{fpsr},~{flags}"()
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ show_greeting();
int /*<<< orphan*/ show_list();
int main() {
  show_greeting();
  show_list();
  char *p = malloc(10);
  free(p);
  printf("hello \n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <show_greeting@plt>
mov    $0x0,%al
call   1040 <show_list@plt>
mov    $0xa,%edi
call   1070 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
lea    0xe75(%rip),%rdi
call   1060 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <show_greeting@plt>
xor    %eax,%eax
call   1040 <show_list@plt>
mov    $0xa,%edi
call   1070 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
lea    0xe88(%rip),%rdi
call   1050 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"hello \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i32 (...) @show_greeting()
%4 = call i32 (...) @show_list()
%5 = call i8* @malloc(i32 10)
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [7 x i8] c"hello \00"
define i32 @main() {
%1 = tail call i32 (...) @show_greeting()
%2 = tail call i32 (...) @show_list()
%3 = tail call dereferenceable_or_null(10) i8* @malloc(i32 10)
%4 = tail call i32 @free(i8* %3)
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void RTAvlroIOPortRangeGet(void) {}


x86 assembly (clang, -O0):
<RTAvlroIOPortRangeGet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlroIOPortRangeGet>:
ret

LLVM IR (-O0):
define void @RTAvlroIOPortRangeGet() {
ret void
}

LLVM IR (-O2):
define void @RTAvlroIOPortRangeGet() {
ret void
}
int get_id_inter(int a, int b) {
  int i, j;
  i = a > b ? a : b;
  j = a > b ? b : a;
  return j + i * (i + 1) / 2;
}


x86 assembly (clang, -O0):
<get_id_inter>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <get_id_inter+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <get_id_inter+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1144 <get_id_inter+0x44>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    114a <get_id_inter+0x4a>
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_id_inter>:
cmp    %esi,%edi
mov    %esi,%eax
cmovg  %edi,%eax
cmovg  %esi,%edi
lea    0x1(%rax),%ecx
imul   %eax,%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @get_id_inter(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* %4
br label %14
14: ; preds = %12, %10
%15 = phi i32 [ %11, %10 ], [ %13, %12 ]
store i32 %15, i32* %5
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = icmp sgt i32 %16, %17
br i1 %18, label %19, label %21
19: ; preds = %14
%20 = load i32, i32* %4
br label %23
21: ; preds = %14
%22 = load i32, i32* %3
br label %23
23: ; preds = %21, %19
%24 = phi i32 [ %20, %19 ], [ %22, %21 ]
store i32 %24, i32* %6
%25 = load i32, i32* %6
%26 = load i32, i32* %5
%27 = load i32, i32* %5
%28 = add nsw i32 %27, 1
%29 = mul nsw i32 %26, %28
%30 = sdiv i32 %29, 2
%31 = add nsw i32 %25, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @get_id_inter(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = add nsw i32 %4, 1
%7 = mul nsw i32 %6, %4
%8 = sdiv i32 %7, 2
%9 = add nsw i32 %8, %5
ret i32 %9
}
/* Variables and functions */
float sqrt(int);
float sq_diagonal_sperimeter(float semiperimeter) {
  float square_root_2 = sqrt(2);
  float diagonal = (semiperimeter / 2) * square_root_2;
  return diagonal;
}


x86 assembly (clang, -O0):
<sq_diagonal_sperimeter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <sqrt@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xec7(%rip),%xmm1
divss  %xmm1,%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq_diagonal_sperimeter>:
push   %rax
movss  %xmm0,0x4(%rsp)
mov    $0x2,%edi
call   1030 <sqrt@plt>
movss  0x4(%rsp),%xmm1
mulss  0xed1(%rip),%xmm1
mulss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @sq_diagonal_sperimeter(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
store float %0, float* %2
%5 = call float @sqrt(i32 2)
store float %5, float* %3
%6 = load float, float* %2
%7 = fdiv float %6, 2.000000e+00
%8 = load float, float* %3
%9 = fmul float %7, %8
store float %9, float* %4
%10 = load float, float* %4
ret float %10
}

LLVM IR (-O2):
define float @sq_diagonal_sperimeter(float %0) {
%2 = tail call float @sqrt(i32 2)
%3 = fmul float %0, 5.000000e-01
%4 = fmul float %3, %2
ret float %4
}