#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ bputc(char *, size_t *, size_t, char);
void fmt_chr(char *buf, size_t *pos, size_t max, char c, int width, int flags) {
  int npad = 0;
  if (width > 0)
    npad = width - 1;
  if (npad < 0)
    npad = 0;
  if (npad && ((flags & 0004) == 0))
    while (npad-- > 0)
      bputc(buf, pos, max, ' ');
  bputc(buf, pos, max, c);
  if (npad && (flags & 0004))
    while (npad-- > 0)
      bputc(buf, pos, max, ' ');
}


x86 assembly (clang, -O0):
<fmt_chr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %cl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movl   $0x0,-0x28(%rbp)
cmpl   $0x0,-0x20(%rbp)
jle    114b <fmt_chr+0x3b>
mov    -0x20(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
jge    115c <fmt_chr+0x4c>
movl   $0x0,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
je     11ae <fmt_chr+0x9e>
mov    -0x24(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
jne    11ae <fmt_chr+0x9e>
jmp    117a <fmt_chr+0x6a>
mov    -0x28(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x28(%rbp)
cmp    $0x0,%eax
jle    11a9 <fmt_chr+0x99>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x20,%ecx
call   1030 <bputc@plt>
jmp    117a <fmt_chr+0x6a>
jmp    11ae <fmt_chr+0x9e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
movsbl -0x19(%rbp),%ecx
call   1030 <bputc@plt>
cmpl   $0x0,-0x28(%rbp)
je     1215 <fmt_chr+0x105>
mov    -0x24(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     1215 <fmt_chr+0x105>
jmp    11e1 <fmt_chr+0xd1>
mov    -0x28(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x28(%rbp)
cmp    $0x0,%eax
jle    1210 <fmt_chr+0x100>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x20,%ecx
call   1030 <bputc@plt>
jmp    11e1 <fmt_chr+0xd1>
jmp    1215 <fmt_chr+0x105>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_chr>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %r9d,%r13d
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
and    $0x4,%r13d
xor    %ebp,%ebp
test   %r8d,%r8d
jle    117a <fmt_chr+0x6a>
mov    %r8d,%r12d
add    $0xffffffff,%r12d
je     117a <fmt_chr+0x6a>
test   %r13d,%r13d
jne    1177 <fmt_chr+0x67>
mov    %ecx,0x4(%rsp)
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
mov    $0x20,%ecx
call   1030 <bputc@plt>
add    $0xffffffff,%r12d
jne    1150 <fmt_chr+0x40>
xor    %r13d,%r13d
mov    $0xffffffff,%ebp
mov    0x4(%rsp),%ecx
jmp    117a <fmt_chr+0x6a>
mov    %r12d,%ebp
movsbl %cl,%ecx
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1030 <bputc@plt>
test   %r13d,%r13d
je     11bb <fmt_chr+0xab>
test   %ebp,%ebp
jle    11bb <fmt_chr+0xab>
add    $0x1,%ebp
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
mov    $0x20,%ecx
call   1030 <bputc@plt>
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     11a0 <fmt_chr+0x90>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @fmt_chr(i8* %0, i64* %1, i64 %2, i8 signext %3, i32 %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i64*
%9 = alloca i64
%10 = alloca i8
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i8* %0, i8** %7
store i64* %1, i64** %8
store i64 %2, i64* %9
store i8 %3, i8* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
store i32 0, i32* %13
%14 = load i32, i32* %11
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %6
%17 = load i32, i32* %11
%18 = sub nsw i32 %17, 1
store i32 %18, i32* %13
br label %19
19: ; preds = %16, %6
%20 = load i32, i32* %13
%21 = icmp slt i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %19
store i32 0, i32* %13
br label %23
23: ; preds = %22, %19
%24 = load i32, i32* %13
%25 = icmp ne i32 %24, 0
br i1 %25, label %26, label %41
26: ; preds = %23
%27 = load i32, i32* %12
%28 = and i32 %27, 4
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %41
30: ; preds = %26
br label %31
31: ; preds = %35, %30
%32 = load i32, i32* %13
%33 = add nsw i32 %32, -1
store i32 %33, i32* %13
%34 = icmp sgt i32 %32, 0
br i1 %34, label %35, label %40
35: ; preds = %31
%36 = load i8*, i8** %7
%37 = load i64*, i64** %8
%38 = load i64, i64* %9
%39 = call i32 @bputc(i8* %36, i64* %37, i64 %38, i8 signext 32)
br label %31
40: ; preds = %31
br label %41
41: ; preds = %40, %26, %23
%42 = load i8*, i8** %7
%43 = load i64*, i64** %8
%44 = load i64, i64* %9
%45 = load i8, i8* %10
%46 = call i32 @bputc(i8* %42, i64* %43, i64 %44, i8 signext %45)
%47 = load i32, i32* %13
%48 = icmp ne i32 %47, 0
br i1 %48, label %49, label %64
49: ; preds = %41
%50 = load i32, i32* %12
%51 = and i32 %50, 4
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %64
53: ; preds = %49
br label %54
54: ; preds = %58, %53
%55 = load i32, i32* %13
%56 = add nsw i32 %55, -1
store i32 %56, i32* %13
%57 = icmp sgt i32 %55, 0
br i1 %57, label %58, label %63
58: ; preds = %54
%59 = load i8*, i8** %7
%60 = load i64*, i64** %8
%61 = load i64, i64* %9
%62 = call i32 @bputc(i8* %59, i64* %60, i64 %61, i8 signext 32)
br label %54
63: ; preds = %54
br label %64
64: ; preds = %63, %49, %41
ret void
}

LLVM IR (-O2):
define void @fmt_chr(i8* %0, i64* %1, i64 %2, i8 signext %3, i32 %4, i32 %5) {
%7 = icmp slt i32 %4, 1
%8 = add nsw i32 %4, -1
%9 = icmp eq i32 %8, 0
%10 = select i1 %7, i1 true, i1 %9
%11 = and i32 %5, 4
br i1 %10, label %21, label %12
12: ; preds = %6
%13 = icmp eq i32 %11, 0
br i1 %13, label %14, label %21
14: ; preds = %12
%15 = add nsw i32 %4, -2
br label %16
16: ; preds = %14, %16
%17 = phi i32 [ %19, %16 ], [ %15, %14 ]
%18 = tail call i32 @bputc(i8* %0, i64* %1, i64 %2, i8 signext 32)
%19 = add nsw i32 %17, -1
%20 = icmp eq i32 %17, 0
br i1 %20, label %21, label %16
21: ; preds = %16, %6, %12
%22 = phi i32 [ %11, %12 ], [ %11, %6 ], [ 0, %16 ]
%23 = phi i32 [ %8, %12 ], [ 0, %6 ], [ -1, %16 ]
%24 = tail call i32 @bputc(i8* %0, i64* %1, i64 %2, i8 signext %3)
%25 = icmp ne i32 %22, 0
%26 = icmp sgt i32 %23, 0
%27 = and i1 %25, %26
br i1 %27, label %28, label %33
28: ; preds = %21, %28
%29 = phi i32 [ %30, %28 ], [ %23, %21 ]
%30 = add nsw i32 %29, -1
%31 = tail call i32 @bputc(i8* %0, i64* %1, i64 %2, i8 signext 32)
%32 = icmp ugt i32 %29, 1
br i1 %32, label %28, label %33
33: ; preds = %28, %21
ret void
}