xunge/DecIR huggingface dataset:
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *strmalloc(const char *value) {
  char *result = 0;
  if (value != 0) {
    result = malloc(strlen(value) + 1);
    if (result != 0)
      strcpy(result, value);
  }
  return result;
}


x86 assembly (clang, -O0):
<strmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1185 <strmalloc+0x55>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1180 <strmalloc+0x50>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
jmp    1185 <strmalloc+0x55>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strmalloc>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115f <strmalloc+0x2f>
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
test   %rax,%rax
je     115f <strmalloc+0x2f>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    1161 <strmalloc+0x31>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strmalloc(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %18
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i64 @strlen(i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %17
13: ; preds = %6
%14 = load i8*, i8** %3
%15 = load i8*, i8** %2
%16 = call i32 @strcpy(i8* %14, i8* %15)
br label %17
17: ; preds = %13, %6
br label %18
18: ; preds = %17, %1
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @strmalloc(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @malloc(i64 %5)
%7 = icmp eq i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %10
10: ; preds = %3, %8, %1
%11 = phi i8* [ %6, %8 ], [ null, %3 ], [ null, %1 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ preload_seq(int);
void main(void) { preload_seq(443); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1bb,%edi
call   1030 <preload_seq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1bb,%edi
jmp    1030 <preload_seq@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @preload_seq(i32 443)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @preload_seq(i32 443)
ret void
}
/* Variables and functions */
int uart0_putc(int);
int cc3_uart0_putchar(int c) { return uart0_putc(c); }


x86 assembly (clang, -O0):
<cc3_uart0_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <uart0_putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc3_uart0_putchar>:
jmp    1030 <uart0_putc@plt>

LLVM IR (-O0):
define i32 @cc3_uart0_putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @uart0_putc(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cc3_uart0_putchar(i32 %0) {
%2 = tail call i32 @uart0_putc(i32 %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ malloc(size_t);
float *alloc_fvec(long first, long last) {
  float *v;
  v = (float *)malloc((size_t)((last - first + 1 + 0) * sizeof(float)));
  return v - first + 0;
}


x86 assembly (clang, -O0):
<alloc_fvec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x0,%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_fvec>:
push   %rbx
mov    %rdi,%rbx
sub    %rdi,%rsi
lea    0x4(,%rsi,4),%rdi
call   1030 <malloc@plt>
shl    $0x2,%rbx
sub    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define float* @alloc_fvec(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca float*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 0
%11 = mul i64 %10, 4
%12 = call i64 @malloc(i64 %11)
%13 = inttoptr i64 %12 to float*
store float* %13, float** %5
%14 = load float*, float** %5
%15 = load i64, i64* %3
%16 = sub i64 0, %15
%17 = getelementptr inbounds float, float* %14, i64 %16
%18 = getelementptr inbounds float, float* %17, i64 0
ret float* %18
}

LLVM IR (-O2):
define float* @alloc_fvec(i64 %0, i64 %1) {
%3 = sub nsw i64 %1, %0
%4 = shl i64 %3, 2
%5 = add i64 %4, 4
%6 = tail call i64 @malloc(i64 %5)
%7 = inttoptr i64 %6 to float*
%8 = sub i64 0, %0
%9 = getelementptr inbounds float, float* %7, i64 %8
ret float* %9
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ foo(int /*<<< orphan*/);
int main() {
  if (foo(0) == 0)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <foo@plt>
cmp    $0x0,%rax
jne    1147 <main+0x27>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <foo@plt>
test   %rax,%rax
je     1131 <main+0x11>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @foo(i32 0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @foo(i32 0)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usage();
char *peek_param(int argc, char *argv[]) {
  if (argc == 0) {
    usage();
  }
  return argv[0];
}


x86 assembly (clang, -O0):
<peek_param>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1130 <peek_param+0x20>
mov    $0x0,%al
call   1030 <usage@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<peek_param>:
push   %rbx
mov    %rsi,%rbx
test   %edi,%edi
jne    111f <peek_param+0xf>
xor    %eax,%eax
call   1030 <usage@plt>
mov    (%rbx),%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @peek_param(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 (...) @usage()
br label %9
9: ; preds = %7, %2
%10 = load i8**, i8*** %4
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
ret i8* %12
}

LLVM IR (-O2):
define i8* @peek_param(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @usage()
br label %6
6: ; preds = %4, %2
%7 = load i8*, i8** %1
ret i8* %7
}
int init_sd() { return 0; }


x86 assembly (clang, -O0):
<init_sd>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_sd>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @init_sd() {
ret i32 0
}

LLVM IR (-O2):
define i32 @init_sd() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gpio_set_ce(int);
int /*<<< orphan*/ timer_wait_us(int);
void nrf_tx_payload(void) {
  gpio_set_ce(1);
  timer_wait_us(12);
  gpio_set_ce(0);
}


x86 assembly (clang, -O0):
<nrf_tx_payload>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <gpio_set_ce@plt>
mov    $0xc,%edi
call   1040 <timer_wait_us@plt>
xor    %edi,%edi
call   1030 <gpio_set_ce@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_tx_payload>:
push   %rax
mov    $0x1,%edi
call   1030 <gpio_set_ce@plt>
mov    $0xc,%edi
call   1040 <timer_wait_us@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <gpio_set_ce@plt>

LLVM IR (-O0):
define void @nrf_tx_payload() {
%1 = call i32 @gpio_set_ce(i32 1)
%2 = call i32 @timer_wait_us(i32 12)
%3 = call i32 @gpio_set_ce(i32 0)
ret void
}

LLVM IR (-O2):
define void @nrf_tx_payload() {
%1 = tail call i32 @gpio_set_ce(i32 1)
%2 = tail call i32 @timer_wait_us(i32 12)
%3 = tail call i32 @gpio_set_ce(i32 0)
ret void
}
int c085(void) { return 0; }


x86 assembly (clang, -O0):
<c085>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c085>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c085() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c085() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cdoWarning(char *);
int gridFromNCfile(const char *gridfile) {
  int gridID = -1;
  cdoWarning("netCDF support not compiled in!");
  return (gridID);
}


x86 assembly (clang, -O0):
<gridFromNCfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <cdoWarning@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gridFromNCfile>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <cdoWarning@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"netCDF support not compiled in!\00"
define i32 @gridFromNCfile(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 -1, i32* %3
%4 = call i32 @cdoWarning(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
@.str = [32 x i8] c"netCDF support not compiled in!\00"
define i32 @gridFromNCfile(i8* nocapture readnone %0) {
%2 = tail call i32 @cdoWarning(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int anetTcpGenericConnect(char *, char *, int, int);
int catAnetTcpNonBlockConnect(char *err, char *addr, int port) {
  return anetTcpGenericConnect(err, addr, port, 1);
}


x86 assembly (clang, -O0):
<catAnetTcpNonBlockConnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x1,%ecx
call   1030 <anetTcpGenericConnect@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catAnetTcpNonBlockConnect>:
mov    $0x1,%ecx
jmp    1030 <anetTcpGenericConnect@plt>

LLVM IR (-O0):
define i32 @catAnetTcpNonBlockConnect(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @anetTcpGenericConnect(i8* %7, i8* %8, i32 %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
define i32 @catAnetTcpNonBlockConnect(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @anetTcpGenericConnect(i8* %0, i8* %1, i32 %2, i32 1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bcm2835_pwm_set_data(unsigned int, unsigned int);
int pwm_setlevel(unsigned int pwm_channel, unsigned int range) {
  bcm2835_pwm_set_data(pwm_channel, range);
  return 0;
}


x86 assembly (clang, -O0):
<pwm_setlevel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <bcm2835_pwm_set_data@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwm_setlevel>:
push   %rax
call   1030 <bcm2835_pwm_set_data@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pwm_setlevel(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @bcm2835_pwm_set_data(i32 %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @pwm_setlevel(i32 %0, i32 %1) {
%3 = tail call i32 @bcm2835_pwm_set_data(i32 %0, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ legacy_intr_init_hook();
void voyager_intr_init_hook(void) { legacy_intr_init_hook(); }


x86 assembly (clang, -O0):
<voyager_intr_init_hook>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <legacy_intr_init_hook@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<voyager_intr_init_hook>:
xor    %eax,%eax
jmp    1030 <legacy_intr_init_hook@plt>

LLVM IR (-O0):
define void @voyager_intr_init_hook() {
%1 = call i32 (...) @legacy_intr_init_hook()
ret void
}

LLVM IR (-O2):
define void @voyager_intr_init_hook() {
%1 = tail call i32 (...) @legacy_intr_init_hook()
ret void
}
/* Type definitions */
struct RNAduplex_args_info {
  int dummy;
};

/* Variables and functions */
int RNAduplex_cmdline_parser2(int, char **, struct RNAduplex_args_info *,
                              int /*<<< orphan*/, int, int);
int RNAduplex_cmdline_parser(int argc, char **argv,
                             struct RNAduplex_args_info *args_info) {
  return RNAduplex_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<RNAduplex_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <RNAduplex_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAduplex_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <RNAduplex_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.RNAduplex_args_info = type { i32 }
define i32 @RNAduplex_cmdline_parser(i32 %0, i8** %1, %struct.RNAduplex_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.RNAduplex_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.RNAduplex_args_info* %2, %struct.RNAduplex_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.RNAduplex_args_info*, %struct.RNAduplex_args_info** %6
%10 = call i32 @RNAduplex_cmdline_parser2(i32 %7, i8** %8, %struct.RNAduplex_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.RNAduplex_args_info = type { i32 }
define i32 @RNAduplex_cmdline_parser(i32 %0, i8** %1, %struct.RNAduplex_args_info* %2) {
%4 = tail call i32 @RNAduplex_cmdline_parser2(i32 %0, i8** %1, %struct.RNAduplex_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bubble_sort(int, int *);
int /*<<< orphan*/ fill_array(int, int *);
int /*<<< orphan*/ free(int *);
int *malloc(int);
int /*<<< orphan*/ print_array(int, int *);
int main() {
  int *input_array;
  int array_size = 20;
  input_array = malloc(array_size * sizeof(int));
  fill_array(array_size, input_array);
  print_array(array_size, input_array);
  bubble_sort(array_size, input_array);
  print_array(array_size, input_array);
  free(input_array);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x14,-0x14(%rbp)
movslq -0x14(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1060 <fill_array@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <print_array@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1070 <bubble_sort@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <print_array@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x50,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    $0x14,%edi
mov    %rax,%rsi
call   1060 <fill_array@plt>
mov    $0x14,%edi
mov    %rbx,%rsi
call   1040 <print_array@plt>
mov    $0x14,%edi
mov    %rbx,%rsi
call   1070 <bubble_sort@plt>
mov    $0x14,%edi
mov    %rbx,%rsi
call   1040 <print_array@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
store i32 20, i32* %3
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 4
%7 = trunc i64 %6 to i32
%8 = call i32* @malloc(i32 %7)
store i32* %8, i32** %2
%9 = load i32, i32* %3
%10 = load i32*, i32** %2
%11 = call i32 @fill_array(i32 %9, i32* %10)
%12 = load i32, i32* %3
%13 = load i32*, i32** %2
%14 = call i32 @print_array(i32 %12, i32* %13)
%15 = load i32, i32* %3
%16 = load i32*, i32** %2
%17 = call i32 @bubble_sort(i32 %15, i32* %16)
%18 = load i32, i32* %3
%19 = load i32*, i32** %2
%20 = call i32 @print_array(i32 %18, i32* %19)
%21 = load i32*, i32** %2
%22 = call i32 @free(i32* %21)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 80)
%2 = tail call i32 @fill_array(i32 20, i32* %1)
%3 = tail call i32 @print_array(i32 20, i32* %1)
%4 = tail call i32 @bubble_sort(i32 20, i32* %1)
%5 = tail call i32 @print_array(i32 20, i32* %1)
%6 = tail call i32 @free(i32* %1)
ret i32 0
}
unsigned long SysCtlGetNmiFlagStatus() {
  return (*((volatile unsigned long *)(0x400FBA00 + 0x00000004)));
}


x86 assembly (clang, -O0):
<SysCtlGetNmiFlagStatus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fba04,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlGetNmiFlagStatus>:
mov    0x400fba04,%rax
40
ret

LLVM IR (-O0):
define i64 @SysCtlGetNmiFlagStatus() {
%1 = load volatile i64, i64* inttoptr (i64 1074772484 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @SysCtlGetNmiFlagStatus() {
%1 = load volatile i64, i64* inttoptr (i64 1074772484 to i64*)
ret i64 %1
}
galign(t) int t;
{ return (t); }


x86 assembly (clang, -O0):
<galign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<galign>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @galign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @galign(i32 returned %0) {
ret i32 %0
}
int test_imm_FDint64_midword_reg(long long val) {
  return ((val >> 16) & (0xFD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FDint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xfd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FDint64_midword_reg>:
test   $0xfd0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FDint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 253
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FDint64_midword_reg(i64 %0) {
%2 = and i64 %0, 16580608
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ ASN1_UTCTIME;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_UTCTIME_adj(int /*<<< orphan*/ *, int /*<<< orphan*/,
                                     int /*<<< orphan*/, int /*<<< orphan*/);
ASN1_UTCTIME *ASN1_UTCTIME_set(ASN1_UTCTIME *s, time_t t) {
  return (ASN1_UTCTIME_adj(s, t, 0, 0));
}


x86 assembly (clang, -O0):
<ASN1_UTCTIME_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <ASN1_UTCTIME_adj@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_UTCTIME_set>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <ASN1_UTCTIME_adj@plt>

LLVM IR (-O0):
define i32* @ASN1_UTCTIME_set(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32* @ASN1_UTCTIME_adj(i32* %5, i32 %6, i32 0, i32 0)
ret i32* %7
}

LLVM IR (-O2):
define i32* @ASN1_UTCTIME_set(i32* %0, i32 %1) {
%3 = tail call i32* @ASN1_UTCTIME_adj(i32* %0, i32 %1, i32 0, i32 0)
ret i32* %3
}
void dereference(int *p) { *p; }


x86 assembly (clang, -O0):
<dereference>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dereference>:
ret

LLVM IR (-O0):
define void @dereference(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @dereference(i32* nocapture %0) {
ret void
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=600 REPO_URL= REVISION=r4p1-01rel0 "
         "CHANGED_REVISION=r4p1-01rel0 CHANGE_DATE=r4p1-01rel0 BUILD=release "
         "TARGET_PLATFORM= MALI_PLATFORM= KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [340 x i8] c"malidrv: API_VERSION=600 REPO_URL= REVISION=r4p1-01rel0 CHANGED_REVISION=r4p1-01rel0 CHANGE_DATE=r4p1-01rel0 BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([340 x i8], [340 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [340 x i8] c"malidrv: API_VERSION=600 REPO_URL= REVISION=r4p1-01rel0 CHANGED_REVISION=r4p1-01rel0 CHANGE_DATE=r4p1-01rel0 BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([340 x i8], [340 x i8]* @.str, i64 0, i64 0)
}
AX0AR1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((((signed char *)10000000)[x0]) <= (p1[1111111 / 4]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AX0AR1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x989680,%eax
movsbl (%rax,%rcx,1),%eax
mov    -0x20(%rbp),%rcx
movsbl 0x43d11(%rcx),%ecx
cmp    %ecx,%eax
jg     114a <AX0AR1+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <AX0AR1+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AX0AR1>:
movslq %edx,%rax
mov    0x989680(%rax),%cl
xor    %eax,%eax
cmp    0x43d11(%r9),%cl
setle  %al
ret

LLVM IR (-O0):
define i32 @AX0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i32, i32* %10
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* inttoptr (i64 10000000 to i8*), i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = load i8*, i8** %13
%22 = getelementptr inbounds i8, i8* %21, i64 277777
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %20, %24
br i1 %25, label %26, label %27
26: ; preds = %6
store i32 1, i32* %7
br label %28
27: ; preds = %6
store i32 0, i32* %7
br label %28
28: ; preds = %27, %26
%29 = load i32, i32* %7
ret i32 %29
}

LLVM IR (-O2):
define i32 @AX0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8, i8* inttoptr (i64 10000000 to i8*), i64 %7
%9 = load i8, i8* %8
%10 = getelementptr inbounds i8, i8* %5, i64 277777
%11 = load i8, i8* %10
%12 = icmp sle i8 %9, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ assert(void *);
int /*<<< orphan*/ free(void *);
void xt_core_bit_destroy(void *bit_object) {
  assert(bit_object);
  free(bit_object);
}


x86 assembly (clang, -O0):
<xt_core_bit_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xt_core_bit_destroy>:
push   %rbx
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @xt_core_bit_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @assert(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @xt_core_bit_destroy(i8* %0) {
%2 = tail call i32 @assert(i8* %0)
%3 = tail call i32 @free(i8* %0)
ret void
}
int execute_get_mempolicy() { return 0; }


x86 assembly (clang, -O0):
<execute_get_mempolicy>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_get_mempolicy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_get_mempolicy() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_get_mempolicy() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cio_seek(int);
int /*<<< orphan*/ cio_skip(int);
int cio_tell();
int /*<<< orphan*/ cio_write(int, int);
void jp2_write_jp() {
  int len, lenp;
  lenp = cio_tell();
  cio_skip(4);
  cio_write(0x6a502020, 4);
  cio_write(0x0d0a870a, 4);
  len = cio_tell() - lenp;
  cio_seek(lenp);
  cio_write(len, 4);
  cio_seek(lenp + len);
}


x86 assembly (clang, -O0):
<jp2_write_jp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <cio_tell@plt>
mov    %eax,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <cio_skip@plt>
mov    $0x6a502020,%edi
mov    $0x4,%esi
call   1050 <cio_write@plt>
mov    $0xd0a870a,%edi
mov    $0x4,%esi
call   1050 <cio_write@plt>
mov    $0x0,%al
call   1060 <cio_tell@plt>
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <cio_seek@plt>
mov    -0x4(%rbp),%edi
mov    $0x4,%esi
call   1050 <cio_write@plt>
mov    -0x8(%rbp),%edi
add    -0x4(%rbp),%edi
call   1040 <cio_seek@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jp2_write_jp>:
push   %rbp
push   %r14
push   %rbx
xor    %eax,%eax
call   1060 <cio_tell@plt>
mov    %eax,%r14d
mov    $0x4,%edi
call   1030 <cio_skip@plt>
mov    $0x6a502020,%edi
mov    $0x4,%esi
call   1050 <cio_write@plt>
mov    $0xd0a870a,%edi
mov    $0x4,%esi
call   1050 <cio_write@plt>
xor    %eax,%eax
call   1060 <cio_tell@plt>
mov    %eax,%ebx
mov    %eax,%ebp
sub    %r14d,%ebp
mov    %r14d,%edi
call   1040 <cio_seek@plt>
mov    %ebp,%edi
mov    $0x4,%esi
call   1050 <cio_write@plt>
mov    %ebx,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <cio_seek@plt>

LLVM IR (-O0):
define void @jp2_write_jp() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @cio_tell()
store i32 %3, i32* %2
%4 = call i32 @cio_skip(i32 4)
%5 = call i32 @cio_write(i32 1783636000, i32 4)
%6 = call i32 @cio_write(i32 218793738, i32 4)
%7 = call i32 (...) @cio_tell()
%8 = load i32, i32* %2
%9 = sub nsw i32 %7, %8
store i32 %9, i32* %1
%10 = load i32, i32* %2
%11 = call i32 @cio_seek(i32 %10)
%12 = load i32, i32* %1
%13 = call i32 @cio_write(i32 %12, i32 4)
%14 = load i32, i32* %2
%15 = load i32, i32* %1
%16 = add nsw i32 %14, %15
%17 = call i32 @cio_seek(i32 %16)
ret void
}

LLVM IR (-O2):
define void @jp2_write_jp() {
%1 = tail call i32 (...) @cio_tell()
%2 = tail call i32 @cio_skip(i32 4)
%3 = tail call i32 @cio_write(i32 1783636000, i32 4)
%4 = tail call i32 @cio_write(i32 218793738, i32 4)
%5 = tail call i32 (...) @cio_tell()
%6 = sub nsw i32 %5, %1
%7 = tail call i32 @cio_seek(i32 %1)
%8 = tail call i32 @cio_write(i32 %6, i32 4)
%9 = tail call i32 @cio_seek(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _IO(unsigned char, int);
unsigned long ioctl(int, int /*<<< orphan*/);
unsigned long get_env_vars(int fd_spec) { return ioctl(fd_spec, _IO('u', 10)); }


x86 assembly (clang, -O0):
<get_env_vars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x75,%edi
mov    $0xa,%esi
call   1030 <_IO@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1040 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_env_vars>:
push   %rbx
mov    %edi,%ebx
mov    $0x75,%edi
mov    $0xa,%esi
call   1030 <_IO@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1040 <ioctl@plt>

LLVM IR (-O0):
define i64 @get_env_vars(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_IO(i8 zeroext 117, i32 10)
%5 = call i64 @ioctl(i32 %3, i32 %4)
ret i64 %5
}

LLVM IR (-O2):
define i64 @get_env_vars(i32 %0) {
%2 = tail call i32 @_IO(i8 zeroext 117, i32 10)
%3 = tail call i64 @ioctl(i32 %0, i32 %2)
ret i64 %3
}
/* Variables and functions */
float kaiser(unsigned int, unsigned int, float);
int /*<<< orphan*/ printf(char *, unsigned int, float);
int main() {
  unsigned int n = 21;
  float beta = 7.0f;
  unsigned int k;
  float wk;
  for (k = 0; k < n; k++) {
    wk = kaiser(k, n, beta);
    printf("w(%3u) = %12.8f;\n", k + 1, wk);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x15,-0x8(%rbp)
movss  0xec2(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1190 <main+0x70>
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%esi
movss  -0xc(%rbp),%xmm0
call   1030 <kaiser@plt>
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%esi
add    $0x1,%esi
movss  -0x14(%rbp),%xmm0
lea    0xe87(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114a <main+0x2a>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%ebx
lea    0xed4(%rip),%r14
lea    -0x1(%rbx),%edi
mov    $0x15,%esi
movss  0xec0(%rip),%xmm0
call   1030 <kaiser@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
add    $0x1,%ebx
cmp    $0x16,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [18 x i8] c"w(%3u) = %12.8f;\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca float
%4 = alloca i32
%5 = alloca float
store i32 0, i32* %1
store i32 21, i32* %2
store float 7.000000e+00, float* %3
store i32 0, i32* %4
br label %6
6: ; preds = %19, %0
%7 = load i32, i32* %4
%8 = load i32, i32* %2
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i32, i32* %4
%12 = load i32, i32* %2
%13 = load float, float* %3
%14 = call float @kaiser(i32 %11, i32 %12, float %13)
store float %14, float* %5
%15 = load i32, i32* %4
%16 = add i32 %15, 1
%17 = load float, float* %5
%18 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %16, float %17)
br label %19
19: ; preds = %10
%20 = load i32, i32* %4
%21 = add i32 %20, 1
store i32 %21, i32* %4
br label %6
22: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"w(%3u) = %12.8f;\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call float @kaiser(i32 %2, i32 21, float 7.000000e+00)
%4 = add nuw nsw i32 %2, 1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %4, float %3)
%6 = icmp eq i32 %4, 21
br i1 %6, label %7, label %1
7: ; preds = %1
ret i32 0
}
void fc_stacktrace(int skip_count) {}


x86 assembly (clang, -O0):
<fc_stacktrace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_stacktrace>:
ret

LLVM IR (-O0):
define void @fc_stacktrace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @fc_stacktrace(i32 %0) {
ret void
}
int mdp4_dsi_video_splash_done(void) { return 0; }


x86 assembly (clang, -O0):
<mdp4_dsi_video_splash_done>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_dsi_video_splash_done>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mdp4_dsi_video_splash_done() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mdp4_dsi_video_splash_done() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t rfcomm_event_can_send_now_get_rfcomm_cid(const uint8_t *event) {
  return little_endian_read_16(event, 2);
}


x86 assembly (clang, -O0):
<rfcomm_event_can_send_now_get_rfcomm_cid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfcomm_event_can_send_now_get_rfcomm_cid>:
mov    $0x2,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @rfcomm_event_can_send_now_get_rfcomm_cid(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 2)
ret i32 %4
}

LLVM IR (-O2):
define i32 @rfcomm_event_can_send_now_get_rfcomm_cid(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 2)
ret i32 %2
}
/* Variables and functions */
int values_not_equal_display_error(unsigned long long const,
                                   unsigned long long const);
int check_not_value(const unsigned long long value,
                    const unsigned long long check_value_data) {
  return values_not_equal_display_error(value, check_value_data);
}


x86 assembly (clang, -O0):
<check_not_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <values_not_equal_display_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_not_value>:
jmp    1030 <values_not_equal_display_error@plt>

LLVM IR (-O0):
define i32 @check_not_value(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @values_not_equal_display_error(i64 %5, i64 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @check_not_value(i64 %0, i64 %1) {
%3 = tail call i32 @values_not_equal_display_error(i64 %0, i64 %1)
ret i32 %3
}
unsigned int read_UInt8Number(char *p) {
  unsigned int rv;
  rv = (unsigned int)((unsigned char *)p)[0];
  return rv;
}


x86 assembly (clang, -O0):
<read_UInt8Number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_UInt8Number>:
movzbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_UInt8Number(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @read_UInt8Number(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
ret i32 %3
}
void EVM5515_wait(unsigned long delay) {
  volatile unsigned long i;
  for (i = 0; i < delay; i++) {
  };
}


x86 assembly (clang, -O0):
<EVM5515_wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1134 <EVM5515_wait+0x34>
jmp    1123 <EVM5515_wait+0x23>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <EVM5515_wait+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVM5515_wait>:
movq   $0x0,-0x8(%rsp)
nopl   0x0(%rax)
mov    -0x8(%rsp),%rax
cmp    %rdi,%rax
jae    1122 <EVM5515_wait+0x22>
addq   $0x1,-0x8(%rsp)
jmp    1110 <EVM5515_wait+0x10>
ret

LLVM IR (-O0):
define void @EVM5515_wait(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store volatile i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load volatile i64, i64* %3
%6 = load i64, i64* %2
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load volatile i64, i64* %3
%11 = add i64 %10, 1
store volatile i64 %11, i64* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @EVM5515_wait(i64 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
store volatile i64 0, i64* %2
%4 = load volatile i64, i64* %2
%5 = icmp ult i64 %4, %0
br i1 %5, label %6, label %11
6: ; preds = %1, %6
%7 = load volatile i64, i64* %2
%8 = add i64 %7, 1
store volatile i64 %8, i64* %2
%9 = load volatile i64, i64* %2
%10 = icmp ult i64 %9, %0
br i1 %10, label %6, label %11
11: ; preds = %6, %1
ret void
}
const char *skip_to(const char *str, char ch) {
  while (*str != ch && *str != 0)
    str++;
  if (*str)
    str++;
  return str;
}


x86 assembly (clang, -O0):
<skip_to>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
movsbl -0x9(%rbp),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0xa(%rbp)
je     1136 <skip_to+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
test   $0x1,%al
jne    1146 <skip_to+0x46>
jmp    1157 <skip_to+0x57>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110e <skip_to+0xe>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1170 <skip_to+0x70>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_to>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
cmp    %sil,%cl
je     1121 <skip_to+0x21>
test   %cl,%cl
jne    1110 <skip_to+0x10>
cmp    $0x1,%cl
sbb    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i8* @skip_to(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
br label %5
5: ; preds = %19, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8, i8* %4
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %8, %10
br i1 %11, label %12, label %17
12: ; preds = %5
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br label %17
17: ; preds = %12, %5
%18 = phi i1 [ false, %5 ], [ %16, %12 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
br label %5
22: ; preds = %17
%23 = load i8*, i8** %3
%24 = load i8, i8* %23
%25 = icmp ne i8 %24, 0
br i1 %25, label %26, label %29
26: ; preds = %22
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %3
br label %29
29: ; preds = %26, %22
%30 = load i8*, i8** %3
ret i8* %30
}

LLVM IR (-O2):
define i8* @skip_to(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %9, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, %1
%7 = icmp eq i8 %5, 0
%8 = or i1 %6, %7
%9 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %8, label %10, label %3
10: ; preds = %3
%11 = xor i1 %7, true
%12 = zext i1 %11 to i64
%13 = getelementptr i8, i8* %4, i64 %12
ret i8* %13
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void Cyc_dump_end() {
  ({
    puts("%%HEVEA \\begin{latexonly}\n\\end{list}\\smallskip\n%%HEVEA "
         "\\end{latexonly}\n%%HEVEA \\begin{rawhtml}</dl>\\end{rawhtml}");
  });
}


x86 assembly (clang, -O0):
<Cyc_dump_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <puts@plt>
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_dump_end>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [113 x i8] c"%%HEVEA \\begin{latexonly}\0A\\end{list}\\smallskip\0A%%HEVEA \\end{latexonly}\0A%%HEVEA \\begin{rawhtml}</dl>\\end{rawhtml}\00"
define void @Cyc_dump_end() {
%1 = alloca i32
%2 = call i32 @puts(i8* getelementptr inbounds ([113 x i8], [113 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret void
}

LLVM IR (-O2):
@.str = [113 x i8] c"%%HEVEA \\begin{latexonly}\0A\\end{list}\\smallskip\0A%%HEVEA \\end{latexonly}\0A%%HEVEA \\begin{rawhtml}</dl>\\end{rawhtml}\00"
define void @Cyc_dump_end() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([113 x i8], [113 x i8]* @.str, i64 0, i64 0))
ret void
}
int cmp(const void *ptr1, const void *ptr2) {
  if (*(int *)ptr1 == *(int *)ptr2) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jne    112a <cmp+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <cmp+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = icmp eq i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp eq i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
unsigned long long foo(unsigned long long x) { return x + 0x12345600000000ULL; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x12345600000000,%rax
add    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movabs $0x12345600000000,%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @foo(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 5124093552623616
ret i64 %4
}

LLVM IR (-O2):
define i64 @foo(i64 %0) {
%2 = add i64 %0, 5124093552623616
ret i64 %2
}
/* Variables and functions */
unsigned long xorshf96();
unsigned long random(void) { return xorshf96(); }


x86 assembly (clang, -O0):
<random>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <xorshf96@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<random>:
xor    %eax,%eax
jmp    1030 <xorshf96@plt>

LLVM IR (-O0):
define i64 @random() {
%1 = call i64 (...) @xorshf96()
ret i64 %1
}

LLVM IR (-O2):
define i64 @random() {
%1 = tail call i64 (...) @xorshf96()
ret i64 %1
}
/* Variables and functions */
scalar_t__ isdigit(char);
scalar_t__ isxdigit(char);
int toupper(char);
int char_digit(char c) {
  if (isdigit(c))
    return c - '0';
  if (isxdigit(c))
    return 10 + toupper(c) - 'A';
  return -1;
}


x86 assembly (clang, -O0):
<char_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     1160 <char_digit+0x30>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1191 <char_digit+0x61>
movsbl -0x5(%rbp),%edi
call   1050 <isxdigit@plt>
cmp    $0x0,%rax
je     118a <char_digit+0x5a>
movsbl -0x5(%rbp),%edi
call   1040 <toupper@plt>
add    $0xa,%eax
sub    $0x41,%eax
mov    %eax,-0x4(%rbp)
jmp    1191 <char_digit+0x61>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_digit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
je     1145 <char_digit+0x15>
movsbl %bl,%eax
add    $0xffffffd0,%eax
pop    %rbx
ret
movsbl %bl,%ebx
mov    %ebx,%edi
call   1050 <isxdigit@plt>
test   %rax,%rax
je     1160 <char_digit+0x30>
mov    %ebx,%edi
call   1040 <toupper@plt>
add    $0xffffffc9,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @char_digit(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isdigit(i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 48
store i32 %10, i32* %2
br label %21
11: ; preds = %1
%12 = load i8, i8* %3
%13 = call i64 @isxdigit(i8 signext %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8, i8* %3
%17 = call i32 @toupper(i8 signext %16)
%18 = add nsw i32 10, %17
%19 = sub nsw i32 %18, 65
store i32 %19, i32* %2
br label %21
20: ; preds = %11
store i32 -1, i32* %2
br label %21
21: ; preds = %20, %15, %7
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @char_digit(i8 signext %0) {
%2 = tail call i64 @isdigit(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = sext i8 %0 to i32
%6 = add nsw i32 %5, -48
br label %13
7: ; preds = %1
%8 = tail call i64 @isxdigit(i8 signext %0)
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = tail call i32 @toupper(i8 signext %0)
%12 = add nsw i32 %11, -55
br label %13
13: ; preds = %7, %10, %4
%14 = phi i32 [ %6, %4 ], [ %12, %10 ], [ -1, %7 ]
ret i32 %14
}
FSIGNAL(sig, func) int *sig, *func;
{ return ((long)signal(*sig, func)); }


x86 assembly (clang, -O0):
<FSIGNAL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <signal@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FSIGNAL>:
mov    (%rdi),%edi
xor    %eax,%eax
jmp    1030 <signal@plt>

LLVM IR (-O0):
define i32 @FSIGNAL(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @signal to i32 (i32, i32*, ...)*)(i32 %6, i32* %7)
%9 = sext i32 %8 to i64
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @FSIGNAL(i32* nocapture %0, i32* %1) {
%3 = load i32, i32* %0
%4 = tail call i32 (i32, i32*, ...) bitcast (i32 (...)* @signal to i32 (i32, i32*, ...)*)(i32 %3, i32* %1)
ret i32 %4
}