xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ malloc(int);
char *char2cstring(char c) {
  char *str = (char *)malloc(sizeof(char) * 2);
  str[0] = c;
  str[1] = '\0';
  return str;
}


x86 assembly (clang, -O0):
<char2cstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
movb   $0x0,0x1(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char2cstring>:
push   %rbx
mov    %edi,%ebx
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    %bl,(%rax)
movb   $0x0,0x1(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @char2cstring(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8*
store i8 %0, i8* %2
%4 = call i64 @malloc(i32 2)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8, i8* %2
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 %6, i8* %8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
store i8 0, i8* %10
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @char2cstring(i8 signext %0) {
%2 = tail call i64 @malloc(i32 2)
%3 = inttoptr i64 %2 to i8*
store i8 %0, i8* %3
%4 = getelementptr inbounds i8, i8* %3, i64 1
store i8 0, i8* %4
ret i8* %3
}
char util4BitToHexchar(const int n) {
  if (n < 10)
    return ('0' + n);
  if (n < 16)
    return ('A' - 10 + n);
  return ('\0');
}


x86 assembly (clang, -O0):
<util4BitToHexchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    111f <util4BitToHexchar+0x1f>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    113b <util4BitToHexchar+0x3b>
cmpl   $0x10,-0x8(%rbp)
jge    1137 <util4BitToHexchar+0x37>
mov    -0x8(%rbp),%eax
add    $0x37,%eax
mov    %al,-0x1(%rbp)
jmp    113b <util4BitToHexchar+0x3b>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util4BitToHexchar>:
mov    %edi,%eax
cmp    $0x9,%edi
jg     110a <util4BitToHexchar+0xa>
add    $0x30,%al
ret
cmp    $0xf,%eax
ja     1112 <util4BitToHexchar+0x12>
add    $0x37,%al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @util4BitToHexchar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 48, %7
%9 = trunc i32 %8 to i8
store i8 %9, i8* %2
br label %18
10: ; preds = %1
%11 = load i32, i32* %3
%12 = icmp slt i32 %11, 16
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, i32* %3
%15 = add nsw i32 55, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %18
17: ; preds = %10
store i8 0, i8* %2
br label %18
18: ; preds = %17, %13, %6
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @util4BitToHexchar(i32 %0) {
%2 = icmp slt i32 %0, 10
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = trunc i32 %0 to i8
%5 = add i8 %4, 48
br label %11
6: ; preds = %1
%7 = icmp ult i32 %0, 16
br i1 %7, label %8, label %11
8: ; preds = %6
%9 = trunc i32 %0 to i8
%10 = add nuw nsw i8 %9, 55
br label %11
11: ; preds = %6, %8, %3
%12 = phi i8 [ %5, %3 ], [ %10, %8 ], [ 0, %6 ]
ret i8 %12
}
/* Variables and functions */
scalar_t__ isalnum(char);
int lenAlphaNumChars(char *str) {
  int result = 0;
  char *pStr = str;
  for (; (*pStr != '\0'); pStr++)
    result += isalnum(*pStr);
  return result;
}


x86 assembly (clang, -O0):
<lenAlphaNumChars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1165 <lenAlphaNumChars+0x55>
mov    -0x18(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isalnum@plt>
mov    %rax,%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    112b <lenAlphaNumChars+0x1b>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lenAlphaNumChars>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1147 <lenAlphaNumChars+0x37>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <isalnum@plt>
add    %eax,%ebp
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <lenAlphaNumChars+0x20>
jmp    1149 <lenAlphaNumChars+0x39>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @lenAlphaNumChars(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
br label %6
6: ; preds = %19, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = call i64 @isalnum(i8 signext %13)
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = add nsw i64 %16, %14
%18 = trunc i64 %17 to i32
store i32 %18, i32* %3
br label %19
19: ; preds = %11
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %6
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @lenAlphaNumChars(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %11, %4 ], [ %0, %1 ]
%7 = phi i32 [ %10, %4 ], [ 0, %1 ]
%8 = tail call i64 @isalnum(i8 signext %5)
%9 = trunc i64 %8 to i32
%10 = add i32 %7, %9
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %15
}
void endian_swap64bit(unsigned long long *x) {
  *x = (*x >> 56) | ((*x << 40) & 0x00FF000000000000ULL) |
       ((*x << 24) & 0x0000FF0000000000ULL) |
       ((*x << 8) & 0x000000FF00000000ULL) | ((*x >> 8) & 0x00000000FF000000) |
       ((*x >> 24) & 0x0000000000FF0000) | ((*x >> 40) & 0x000000000000FF00) |
       (*x << 56);
}


x86 assembly (clang, -O0):
<endian_swap64bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
shr    $0x38,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x28,%rax
movabs $0xff000000000000,%rdx
and    %rdx,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x18,%rax
movabs $0xff0000000000,%rdx
and    %rdx,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x8,%rax
movabs $0xff00000000,%rdx
and    %rdx,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shr    $0x8,%rax
movabs $0xff000000,%rdx
and    %rdx,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shr    $0x18,%rax
and    $0xff0000,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shr    $0x28,%rax
and    $0xff00,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x38,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<endian_swap64bit>:
mov    (%rdi),%rax
bswap  %rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @endian_swap64bit(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 56
%6 = load i64*, i64** %2
%7 = load i64, i64* %6
%8 = shl i64 %7, 40
%9 = and i64 %8, 71776119061217280
%10 = or i64 %5, %9
%11 = load i64*, i64** %2
%12 = load i64, i64* %11
%13 = shl i64 %12, 24
%14 = and i64 %13, 280375465082880
%15 = or i64 %10, %14
%16 = load i64*, i64** %2
%17 = load i64, i64* %16
%18 = shl i64 %17, 8
%19 = and i64 %18, 1095216660480
%20 = or i64 %15, %19
%21 = load i64*, i64** %2
%22 = load i64, i64* %21
%23 = lshr i64 %22, 8
%24 = and i64 %23, 4278190080
%25 = or i64 %20, %24
%26 = load i64*, i64** %2
%27 = load i64, i64* %26
%28 = lshr i64 %27, 24
%29 = and i64 %28, 16711680
%30 = or i64 %25, %29
%31 = load i64*, i64** %2
%32 = load i64, i64* %31
%33 = lshr i64 %32, 40
%34 = and i64 %33, 65280
%35 = or i64 %30, %34
%36 = load i64*, i64** %2
%37 = load i64, i64* %36
%38 = shl i64 %37, 56
%39 = or i64 %35, %38
%40 = load i64*, i64** %2
store i64 %39, i64* %40
ret void
}

LLVM IR (-O2):
define void @endian_swap64bit(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = tail call i64 @llvm.bswap.i64(i64 %2)
store i64 %3, i64* %0
ret void
}
void gdk_error_trap_pop() {}


x86 assembly (clang, -O0):
<gdk_error_trap_pop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_error_trap_pop>:
ret

LLVM IR (-O0):
define void @gdk_error_trap_pop() {
ret void
}

LLVM IR (-O2):
define void @gdk_error_trap_pop() {
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t WatchdogValueGet(void) {
  return ((*((volatile unsigned long *)(0x40080000 + 0x00000004))));
}


x86 assembly (clang, -O0):
<WatchdogValueGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40080004,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogValueGet>:
mov    0x40080004,%rax
40
ret

LLVM IR (-O0):
define i64 @WatchdogValueGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074266116 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @WatchdogValueGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074266116 to i64*)
ret i64 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_source_get_io_events(void *s, uint32_t *events) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_source_get_io_events>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_source_get_io_events>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_source_get_io_events(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_source_get_io_events(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void hdr_yield() { sched_yield(); }


x86 assembly (clang, -O0):
<hdr_yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdr_yield>:
xor    %eax,%eax
jmp    1030 <sched_yield@plt>

LLVM IR (-O0):
define void @hdr_yield() {
%1 = call i32 (...) @sched_yield()
ret void
}

LLVM IR (-O2):
define void @hdr_yield() {
%1 = tail call i32 (...) @sched_yield()
ret void
}
void PutImage(unsigned x, unsigned y, unsigned w, unsigned h, char *image) {
  unsigned size, psize;
  size = x * 65536 + y;
  psize = w * 65536 + h;
  __asm__ __volatile__("int $0x40" ::"a"(7), "b"(image), "c"(psize), "d"(size));
}


x86 assembly (clang, -O0):
<PutImage>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x10,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x10,%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x20(%rbp),%rbx
mov    -0x28(%rbp),%ecx
mov    -0x24(%rbp),%edx
mov    $0x7,%eax
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<PutImage>:
push   %rbx
mov    %r8,%rbx
shl    $0x10,%edi
add    %edi,%esi
shl    $0x10,%edx
add    %edx,%ecx
mov    $0x7,%eax
mov    %esi,%edx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @PutImage(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%13 = load i32, i32* %6
%14 = mul i32 %13, 65536
%15 = load i32, i32* %7
%16 = add i32 %14, %15
store i32 %16, i32* %11
%17 = load i32, i32* %8
%18 = mul i32 %17, 65536
%19 = load i32, i32* %9
%20 = add i32 %18, %19
store i32 %20, i32* %12
%21 = load i8*, i8** %10
%22 = load i32, i32* %12
%23 = load i32, i32* %11
ret void
}

LLVM IR (-O2):
define void @PutImage(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = shl i32 %0, 16
%7 = add i32 %6, %1
%8 = shl i32 %2, 16
%9 = add i32 %8, %3
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32 7, i8* %4, i32 %9, i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(unsigned char *, int /*<<< orphan*/, int);
char *unsigned_char_endianness(void) {
  unsigned char arr[sizeof(unsigned char)];
  if (sizeof(unsigned char) == 1) {
    return NULL;
  }
  memset(arr, 0, sizeof arr);
  arr[0] = 1;
  if (*((unsigned char *)arr) == 1) {
    return "little-endian";
  }
  memset(arr, 0, sizeof arr);
  arr[sizeof arr - 1] = 1;
  if (*((unsigned char *)arr) == 1) {
    return "big-endian";
  }
  return NULL;
}


x86 assembly (clang, -O0):
<unsigned_char_endianness>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_char_endianness>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @unsigned_char_endianness() {
%1 = alloca [1 x i8]
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @unsigned_char_endianness() {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ setenv(char *, char *, int);
void CSUB(int *i, float *r) {
  if (*i == 257 && *r == 1.0)
    setenv("MOSTF90CALL", "CSUB", 1);
}


x86 assembly (clang, -O0):
<CSUB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x101,(%rax)
jne    116c <CSUB+0x5c>
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xebc(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    116c <CSUB+0x5c>
jp     116c <CSUB+0x5c>
lea    0xead(%rip),%rdi
lea    0xeb2(%rip),%rsi
mov    $0x1,%edx
call   1030 <setenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CSUB>:
cmpl   $0x101,(%rdi)
jne    113f <CSUB+0x2f>
movss  (%rsi),%xmm0
ucomiss 0xedd(%rip),%xmm0
jne    113f <CSUB+0x2f>
jp     113f <CSUB+0x2f>
lea    0xed6(%rip),%rdi
lea    0xedb(%rip),%rsi
mov    $0x1,%edx
jmp    1030 <setenv@plt>
ret

LLVM IR (-O0):
@.str = [12 x i8] c"MOSTF90CALL\00"
@.str.1 = [5 x i8] c"CSUB\00"
define void @CSUB(i32* %0, float* %1) {
%3 = alloca i32*
%4 = alloca float*
store i32* %0, i32** %3
store float* %1, float** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 257
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load float*, float** %4
%10 = load float, float* %9
%11 = fpext float %10 to double
%12 = fcmp oeq double %11, 1.000000e+00
br i1 %12, label %13, label %15
13: ; preds = %8
%14 = call i32 @setenv(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 1)
br label %15
15: ; preds = %13, %8, %2
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"MOSTF90CALL\00"
@.str.1 = [5 x i8] c"CSUB\00"
define void @CSUB(i32* nocapture %0, float* nocapture %1) {
%3 = load i32, i32* %0
%4 = icmp eq i32 %3, 257
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = load float, float* %1
%7 = fcmp oeq float %6, 1.000000e+00
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @setenv(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 1)
br label %10
10: ; preds = %8, %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void destroy_server(int servfd) { close(servfd); }


x86 assembly (clang, -O0):
<destroy_server>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_server>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @destroy_server(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @destroy_server(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
float fabsolut(float x) {
  if (x < 0) {
    x = -x;
  }
  return x;
}


x86 assembly (clang, -O0):
<fabsolut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    112d <fabsolut+0x2d>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabsolut>:
movaps 0xef9(%rip),%xmm2
xorps  %xmm0,%xmm2
xorps  %xmm3,%xmm3
movaps %xmm0,%xmm1
cmpltss %xmm3,%xmm1
andps  %xmm1,%xmm2
andnps %xmm0,%xmm1
orps   %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fabsolut(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load float, float* %2
%7 = fneg float %6
store float %7, float* %2
br label %8
8: ; preds = %5, %1
%9 = load float, float* %2
ret float %9
}

LLVM IR (-O2):
define float @fabsolut(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %3, float %0
ret float %4
}
void path_004_expected_3(int a, int b) {
  if (a) {
    return;
  }
  if (b) {
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1119 <path_004_expected_3+0x19>
jmp    1128 <path_004_expected_3+0x28>
cmpl   $0x0,-0x8(%rbp)
je     1128 <path_004_expected_3+0x28>
jmp    1128 <path_004_expected_3+0x28>
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @path_004_expected_3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
br label %12
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
br label %12
12: ; preds = %7, %11, %8
ret void
}

LLVM IR (-O2):
define void @path_004_expected_3(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
struct type {
  int dummy;
};
struct expression {
  int dummy;
};

/* Variables and functions */
struct type const *type_get_or_create(int /*<<< orphan*/);
int /*<<< orphan*/ type_new_array_type(struct type const *,
                                       struct expression const *);
const struct type *
type_get_array_type(const struct type *values,
                    const struct expression *const_expr_array_size) {
  return type_get_or_create(type_new_array_type(values, const_expr_array_size));
}


x86 assembly (clang, -O0):
<type_get_array_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <type_new_array_type@plt>
mov    %eax,%edi
call   1030 <type_get_or_create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_get_array_type>:
push   %rax
call   1040 <type_new_array_type@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <type_get_or_create@plt>

LLVM IR (-O0):
%struct.type = type { i32 }
%struct.expression = type { i32 }
define %struct.type* @type_get_array_type(%struct.type* %0, %struct.expression* %1) {
%3 = alloca %struct.type*
%4 = alloca %struct.expression*
store %struct.type* %0, %struct.type** %3
store %struct.expression* %1, %struct.expression** %4
%5 = load %struct.type*, %struct.type** %3
%6 = load %struct.expression*, %struct.expression** %4
%7 = call i32 @type_new_array_type(%struct.type* %5, %struct.expression* %6)
%8 = call %struct.type* @type_get_or_create(i32 %7)
ret %struct.type* %8
}

LLVM IR (-O2):
%struct.type = type { i32 }
%struct.expression = type { i32 }
define %struct.type* @type_get_array_type(%struct.type* %0, %struct.expression* %1) {
%3 = tail call i32 @type_new_array_type(%struct.type* %0, %struct.expression* %1)
%4 = tail call %struct.type* @type_get_or_create(i32 %3)
ret %struct.type* %4
}
char *dummy_dcgettext(const char *domainname, const char *msgid, int category) {
  return (char *)(msgid);
}


x86 assembly (clang, -O0):
<dummy_dcgettext>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_dcgettext>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @dummy_dcgettext(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
ret i8* %7
}

LLVM IR (-O2):
define i8* @dummy_dcgettext(i8* nocapture readnone %0, i8* readnone returned %1, i32 %2) {
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printk(char *);
void int_auto_return(void) { printk("Unexpected interrupt happened."); }


x86 assembly (clang, -O0):
<int_auto_return>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printk@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_auto_return>:
lea    0xee9(%rip),%rdi
jmp    1030 <printk@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Unexpected interrupt happened.\00"
define void @int_auto_return() {
%1 = call i32 @printk(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"Unexpected interrupt happened.\00"
define void @int_auto_return() {
%1 = tail call i32 @printk(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int64_t;
struct tree {
  int dummy;
};

/* Variables and functions */
void null_counter(struct tree *tp, void *key, size_t prefixlen, void *arg,
                  u_int64_t cnt) {}


x86 assembly (clang, -O0):
<null_counter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_counter>:
ret

LLVM IR (-O0):
%struct.tree = type { i32 }
define void @null_counter(%struct.tree* %0, i8* %1, i64 %2, i8* %3, i32 %4) {
%6 = alloca %struct.tree*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i32
store %struct.tree* %0, %struct.tree** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
ret void
}

LLVM IR (-O2):
%struct.tree = type { i32 }
define void @null_counter(%struct.tree* nocapture %0, i8* nocapture %1, i64 %2, i8* nocapture %3, i32 %4) {
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *duplicate(const char *s) {
  char *t = malloc((strlen(s) + 1) * sizeof(char));
  if (!t)
    return NULL;
  strcpy(t, s);
  return t;
}


x86 assembly (clang, -O0):
<duplicate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1171 <duplicate+0x41>
movq   $0x0,-0x8(%rbp)
jmp    1186 <duplicate+0x56>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<duplicate>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1157 <duplicate+0x27>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @duplicate(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
%9 = mul i64 %8, 1
%10 = trunc i64 %9 to i32
%11 = call i8* @malloc(i32 %10)
store i8* %11, i8** %4
%12 = load i8*, i8** %4
%13 = icmp ne i8* %12, null
br i1 %13, label %15, label %14
14: ; preds = %1
store i8* null, i8** %2
br label %20
15: ; preds = %1
%16 = load i8*, i8** %4
%17 = load i8*, i8** %3
%18 = call i32 @strcpy(i8* %16, i8* %17)
%19 = load i8*, i8** %4
store i8* %19, i8** %2
br label %20
20: ; preds = %15, %14
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define i8* @duplicate(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %4, i8* %0)
br label %8
8: ; preds = %1, %6
ret i8* %4
}
unsigned long append_0(unsigned long prefix) { return (prefix + (1L << 16)); }


x86 assembly (clang, -O0):
<append_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<append_0>:
lea    0x10000(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @append_0(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 65536
ret i64 %4
}

LLVM IR (-O2):
define i64 @append_0(i64 %0) {
%2 = add i64 %0, 65536
ret i64 %2
}
int ft_isascii(int c) {
  if (c > -1 && c <= 127)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jle    1127 <ft_isascii+0x27>
cmpl   $0x7f,-0x8(%rbp)
jg     1127 <ft_isascii+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <ft_isascii+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isascii>:
xor    %eax,%eax
cmp    $0x80,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isascii(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 127
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ft_isascii(i32 %0) {
%2 = icmp ult i32 %0, 128
%3 = zext i1 %2 to i32
ret i32 %3
}
int cmp_integers(const void *e1, const void *e2) {
  int *n1, *n2;
  n1 = (int *)e1;
  n2 = (int *)e2;
  return *n1 - *n2;
}


x86 assembly (clang, -O0):
<cmp_integers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_integers>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmp_integers(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @cmp_integers(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
unsigned char **allocate_bitmap(int, int);
int /*<<< orphan*/ assign_bitmap(unsigned char **, unsigned char **, int, int);
unsigned char **copy_bitmap(unsigned char **src, int w, int h) {
  unsigned char **result = allocate_bitmap(w, h);
  assign_bitmap(result, src, w, h);
  return result;
}


x86 assembly (clang, -O0):
<copy_bitmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <allocate_bitmap@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <assign_bitmap@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_bitmap>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r15d
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%edi
mov    %edx,%esi
call   1030 <allocate_bitmap@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
mov    %r15d,%ecx
call   1040 <assign_bitmap@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8** @copy_bitmap(i8** %0, i32 %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i8** @allocate_bitmap(i32 %8, i32 %9)
store i8** %10, i8*** %7
%11 = load i8**, i8*** %7
%12 = load i8**, i8*** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @assign_bitmap(i8** %11, i8** %12, i32 %13, i32 %14)
%16 = load i8**, i8*** %7
ret i8** %16
}

LLVM IR (-O2):
define i8** @copy_bitmap(i8** %0, i32 %1, i32 %2) {
%4 = tail call i8** @allocate_bitmap(i32 %1, i32 %2)
%5 = tail call i32 @assign_bitmap(i8** %4, i8** %0, i32 %1, i32 %2)
ret i8** %4
}
/* Variables and functions */
int power(int, int);
int cifra(int n, int mesto, int dolzina) {
  return (n % (power(10, mesto))) / power(10, mesto - 1);
}


x86 assembly (clang, -O0):
<cifra>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%esi
mov    $0xa,%edi
call   1030 <power@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
mov    $0xa,%edi
call   1030 <power@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cltd
idiv   %ecx
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cifra>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0xa,%edi
call   1030 <power@plt>
mov    %eax,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
mov    %edx,%ebp
add    $0xffffffff,%ebx
mov    $0xa,%edi
mov    %ebx,%esi
call   1030 <power@plt>
mov    %eax,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @cifra(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @power(i32 10, i32 %8)
%10 = srem i32 %7, %9
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = call i32 @power(i32 10, i32 %12)
%14 = sdiv i32 %10, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @cifra(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @power(i32 10, i32 %1)
%5 = srem i32 %0, %4
%6 = add nsw i32 %1, -1
%7 = tail call i32 @power(i32 10, i32 %6)
%8 = sdiv i32 %5, %7
ret i32 %8
}
t_fp(n, s, si) int n;
char *s, *si;
{ n, s, si; }


x86 assembly (clang, -O0):
<t_fp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_fp>:
ret

LLVM IR (-O0):
define i32 @t_fp(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @t_fp(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 undef
}
/* Variables and functions */
char volatile *__attribute__((no)) foo(unsigned i) {
  char volatile buffer[10];
  char volatile *k = i ? &buffer[i] : NULL;
  return k;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1126 <foo+0x26>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
lea    -0xe(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
jmp    1131 <foo+0x31>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
jmp    1131 <foo+0x31>
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
test   %edi,%edi
mov    %edi,%ecx
lea    -0xa(%rsp,%rcx,1),%rcx
cmovne %rcx,%rax
ret

LLVM IR (-O0):
define i8* @foo(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i8]
%4 = alloca i8*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 %9
br label %12
11: ; preds = %1
br label %12
12: ; preds = %11, %7
%13 = phi i8* [ %10, %7 ], [ null, %11 ]
store i8* %13, i8** %4
%14 = load i8*, i8** %4
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @foo(i32 %0) {
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = icmp eq i32 %0, 0
%5 = zext i32 %0 to i64
%6 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 %5
%7 = select i1 %4, i8* null, i8* %6
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ ENC4_DriverIRQHandler();
__attribute__((weak)) void ENC4_IRQHandler(void) { ENC4_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<ENC4_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ENC4_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ENC4_IRQHandler>:
xor    %eax,%eax
jmp    1030 <ENC4_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @ENC4_IRQHandler() {
%1 = call i32 (...) @ENC4_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @ENC4_IRQHandler() {
%1 = tail call i32 (...) @ENC4_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_atoi() {
  printf("NOT IMPLEMENTED:"
         "pa_atoi"
         "\n");
}


x86 assembly (clang, -O0):
<pa_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_atoi>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"NOT IMPLEMENTED:pa_atoi\0A\00"
define i32 @pa_atoi() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [24 x i8] c"NOT IMPLEMENTED:pa_atoi\00"
define i32 @pa_atoi() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void call_me_from_thumb(void) {}


x86 assembly (clang, -O0):
<call_me_from_thumb>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_me_from_thumb>:
ret

LLVM IR (-O0):
define void @call_me_from_thumb() {
ret void
}

LLVM IR (-O2):
define void @call_me_from_thumb() {
ret void
}
int cr_has_byte_in_string(char byte, char *arg) {
  int c;
  c = -1;
  while (0 != c) {
    c = (int)*arg++;
    if ((char)c == byte) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<cr_has_byte_in_string>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xffffffff,-0x14(%rbp)
xor    %eax,%eax
cmp    -0x14(%rbp),%eax
je     1158 <cr_has_byte_in_string+0x58>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
movsbl %al,%eax
movsbl -0x5(%rbp),%ecx
cmp    %ecx,%eax
jne    1153 <cr_has_byte_in_string+0x53>
movl   $0x1,-0x4(%rbp)
jmp    115f <cr_has_byte_in_string+0x5f>
jmp    1115 <cr_has_byte_in_string+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cr_has_byte_in_string>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
test   %eax,%eax
je     1126 <cr_has_byte_in_string+0x26>
movsbl (%rsi),%eax
add    $0x1,%rsi
cmp    %dil,%al
jne    1110 <cr_has_byte_in_string+0x10>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cr_has_byte_in_string(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i32
store i8 %0, i8* %4
store i8* %1, i8** %5
store i32 -1, i32* %6
br label %7
7: ; preds = %22, %2
%8 = load i32, i32* %6
%9 = icmp ne i32 0, %8
br i1 %9, label %10, label %23
10: ; preds = %7
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = trunc i32 %15 to i8
%17 = sext i8 %16 to i32
%18 = load i8, i8* %4
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %17, %19
br i1 %20, label %21, label %22
21: ; preds = %10
store i32 1, i32* %3
br label %24
22: ; preds = %10
br label %7
23: ; preds = %7
store i32 0, i32* %3
br label %24
24: ; preds = %23, %21
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @cr_has_byte_in_string(i8 signext %0, i8* nocapture %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %1, %2 ], [ %8, %7 ]
%5 = phi i32 [ -1, %2 ], [ %10, %7 ]
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = load i8, i8* %4
%10 = sext i8 %9 to i32
%11 = icmp eq i8 %9, %0
br i1 %11, label %12, label %3
12: ; preds = %3, %7
%13 = phi i32 [ 1, %7 ], [ 0, %3 ]
ret i32 %13
}
int fn2(void) {
  if (4)
    return 1;
  else if (4)
    return 2;
  if (10)
    return 3;
  else if (10)
    return 4;
}


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fn2() {
ret i32 1
}

LLVM IR (-O2):
define i32 @fn2() {
ret i32 1
}
unsigned long PWMGenFaultStatus(unsigned long ulBase, unsigned long ulGen,
                                unsigned long ulGroup) {
  ;
  ;
  ;
  ;
  if (ulGroup == 0) {
    return ((*((volatile unsigned long *)(((ulBase) + 0x00000800 +
                                           ((ulGen)-0x00000040) * 2) +
                                          0x00000004))));
  } else {
    return ((*((volatile unsigned long *)(((ulBase) + 0x00000800 +
                                           ((ulGen)-0x00000040) * 2) +
                                          0x00000008))));
  }
}


x86 assembly (clang, -O0):
<PWMGenFaultStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1141 <PWMGenFaultStatus+0x41>
mov    -0x10(%rbp),%rax
add    $0x800,%rax
mov    -0x18(%rbp),%rcx
sub    $0x40,%rcx
shl    $0x1,%rcx
add    %rcx,%rax
mov    0x4(%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1162 <PWMGenFaultStatus+0x62>
mov    -0x10(%rbp),%rax
add    $0x800,%rax
mov    -0x18(%rbp),%rcx
sub    $0x40,%rcx
shl    $0x1,%rcx
add    %rcx,%rax
mov    0x8(%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenFaultStatus>:
xor    %eax,%eax
test   %rdx,%rdx
setne  %al
lea    (%rdi,%rax,4),%rax
mov    0x784(%rax,%rsi,2),%rax
ret

LLVM IR (-O0):
define i64 @PWMGenFaultStatus(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load i64, i64* %5
%12 = add i64 %11, 2048
%13 = load i64, i64* %6
%14 = sub i64 %13, 64
%15 = mul i64 %14, 2
%16 = add i64 %12, %15
%17 = add i64 %16, 4
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
store i64 %19, i64* %4
br label %30
20: ; preds = %3
%21 = load i64, i64* %5
%22 = add i64 %21, 2048
%23 = load i64, i64* %6
%24 = sub i64 %23, 64
%25 = mul i64 %24, 2
%26 = add i64 %22, %25
%27 = add i64 %26, 8
%28 = inttoptr i64 %27 to i64*
%29 = load volatile i64, i64* %28
store i64 %29, i64* %4
br label %30
30: ; preds = %20, %10
%31 = load i64, i64* %4
ret i64 %31
}

LLVM IR (-O2):
define i64 @PWMGenFaultStatus(i64 %0, i64 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
%5 = shl i64 %1, 1
%6 = select i1 %4, i64 1924, i64 1928
%7 = add i64 %6, %0
%8 = add i64 %7, %5
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
ret i64 %10
}
void MSP430TimerM$TimerB$overflow(void) {
  TimerM$AlarmTimer$overflow();
  MSP430DCOCalibM$Timer32khz$overflow();
}


x86 assembly (clang, -O0):
<MSP430TimerM$TimerB$overflow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TimerM$AlarmTimer$overflow@plt>
mov    $0x0,%al
call   1040 <MSP430DCOCalibM$Timer32khz$overflow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSP430TimerM$TimerB$overflow>:
push   %rax
xor    %eax,%eax
call   1030 <TimerM$AlarmTimer$overflow@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <MSP430DCOCalibM$Timer32khz$overflow@plt>

LLVM IR (-O0):
define void @"MSP430TimerM$TimerB$overflow"() {
%1 = call i32 (...) @"TimerM$AlarmTimer$overflow"()
%2 = call i32 (...) @"MSP430DCOCalibM$Timer32khz$overflow"()
ret void
}

LLVM IR (-O2):
define void @"MSP430TimerM$TimerB$overflow"() {
%1 = tail call i32 (...) @"TimerM$AlarmTimer$overflow"()
%2 = tail call i32 (...) @"MSP430DCOCalibM$Timer32khz$overflow"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STFlash_sendByte(int);
int /*<<< orphan*/ STchip_deselect();
int /*<<< orphan*/ STchip_select();
void STFlash_WriteDisable(void) {
  STchip_select();
  STFlash_sendByte(0x04);
  STchip_deselect();
}


x86 assembly (clang, -O0):
<STFlash_WriteDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <STchip_select@plt>
mov    $0x4,%edi
call   1050 <STFlash_sendByte@plt>
mov    $0x0,%al
call   1040 <STchip_deselect@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<STFlash_WriteDisable>:
push   %rax
xor    %eax,%eax
call   1030 <STchip_select@plt>
mov    $0x4,%edi
call   1050 <STFlash_sendByte@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <STchip_deselect@plt>

LLVM IR (-O0):
define void @STFlash_WriteDisable() {
%1 = call i32 (...) @STchip_select()
%2 = call i32 @STFlash_sendByte(i32 4)
%3 = call i32 (...) @STchip_deselect()
ret void
}

LLVM IR (-O2):
define void @STFlash_WriteDisable() {
%1 = tail call i32 (...) @STchip_select()
%2 = tail call i32 @STFlash_sendByte(i32 4)
%3 = tail call i32 (...) @STchip_deselect()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int);
void f12(void) {
  int k;
  int *parray[3];
  typedef int *arr[3];
  arr b;
  parray[0] = &k;
  b[0] = parray[0];
  *(parray[0]) = 'd';
  putchar(*(b[0]));
}


x86 assembly (clang, -O0):
<f12>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    -0x4(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x20(%rbp),%rax
movl   $0x64,(%rax)
mov    -0x40(%rbp),%rax
mov    (%rax),%edi
call   1030 <putchar@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f12>:
mov    $0x64,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @f12() {
%1 = alloca i32
%2 = alloca [3 x i32*]
%3 = alloca [3 x i32*]
%4 = getelementptr inbounds [3 x i32*], [3 x i32*]* %2, i64 0, i64 0
store i32* %1, i32** %4
%5 = getelementptr inbounds [3 x i32*], [3 x i32*]* %2, i64 0, i64 0
%6 = load i32*, i32** %5
%7 = getelementptr inbounds [3 x i32*], [3 x i32*]* %3, i64 0, i64 0
store i32* %6, i32** %7
%8 = getelementptr inbounds [3 x i32*], [3 x i32*]* %2, i64 0, i64 0
%9 = load i32*, i32** %8
store i32 100, i32* %9
%10 = getelementptr inbounds [3 x i32*], [3 x i32*]* %3, i64 0, i64 0
%11 = load i32*, i32** %10
%12 = load i32, i32* %11
%13 = call i32 @putchar(i32 %12)
ret void
}

LLVM IR (-O2):
define void @f12() {
%1 = tail call i32 @putchar(i32 100)
ret void
}
void hanging_pawns_test(void **state) {}


x86 assembly (clang, -O0):
<hanging_pawns_test>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hanging_pawns_test>:
ret

LLVM IR (-O0):
define void @hanging_pawns_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret void
}

LLVM IR (-O2):
define void @hanging_pawns_test(i8** nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ oqaF(char *);
void oqaF2(char *x) { oqaF(x); }


x86 assembly (clang, -O0):
<oqaF2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <oqaF@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oqaF2>:
jmp    1030 <oqaF@plt>

LLVM IR (-O0):
define void @oqaF2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @oqaF(i8* %3)
ret void
}

LLVM IR (-O2):
define void @oqaF2(i8* %0) {
%2 = tail call i32 @oqaF(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PrintErrorCode();
int dxl_read_byte(int, int);
int getID(int ID) {
  ID = dxl_read_byte(ID, 3);
  PrintErrorCode();
  return ID;
}


x86 assembly (clang, -O0):
<getID>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x3,%esi
call   1040 <dxl_read_byte@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <PrintErrorCode@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getID>:
push   %rbx
mov    $0x3,%esi
call   1040 <dxl_read_byte@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <PrintErrorCode@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getID(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @dxl_read_byte(i32 %3, i32 3)
store i32 %4, i32* %2
%5 = call i32 (...) @PrintErrorCode()
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @getID(i32 %0) {
%2 = tail call i32 @dxl_read_byte(i32 %0, i32 3)
%3 = tail call i32 (...) @PrintErrorCode()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void fchs(void) {
  put8(0xD9);
  put8(0xE0);
}


x86 assembly (clang, -O0):
<fchs>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd9,%edi
call   1030 <put8@plt>
mov    $0xe0,%edi
call   1030 <put8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchs>:
push   %rax
mov    $0xd9,%edi
call   1030 <put8@plt>
mov    $0xe0,%edi
pop    %rax
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @fchs() {
%1 = call i32 @put8(i32 217)
%2 = call i32 @put8(i32 224)
ret void
}

LLVM IR (-O2):
define void @fchs() {
%1 = tail call i32 @put8(i32 217)
%2 = tail call i32 @put8(i32 224)
ret void
}
int glutCreateMenu(void (*func)(int)) { return 0; }


x86 assembly (clang, -O0):
<glutCreateMenu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutCreateMenu>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @glutCreateMenu(void (i32)* %0) {
%2 = alloca void (i32)*
store void (i32)* %0, void (i32)** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @glutCreateMenu(void (i32)* nocapture readnone %0) {
ret i32 0
}