xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, long);
void char_count() {
  long nc;
  nc = 0;
  while (getchar() != EOF)
    ++nc;
  printf("%ld\n", nc);
}


x86 assembly (clang, -O0):
<char_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2eaa(%rip),%rcx
cmp    (%rcx),%rax
je     1158 <char_count+0x38>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1130 <char_count+0x10>
mov    -0x8(%rbp),%rsi
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_count>:
push   %r14
push   %rbx
push   %rax
mov    $0xffffffffffffffff,%rbx
mov    0x2eb6(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
add    $0x1,%rbx
cmp    (%r14),%rax
jne    1140 <char_count+0x20>
lea    0xea9(%rip),%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@EOF = global i64 0
@.str = [5 x i8] c"%ld\0A\00"
define void @char_count() {
%1 = alloca i64
store i64 0, i64* %1
br label %2
2: ; preds = %6, %0
%3 = call i64 (...) @getchar()
%4 = load i64, i64* @EOF
%5 = icmp ne i64 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i64, i64* %1
%8 = add nsw i64 %7, 1
store i64 %8, i64* %1
br label %2
9: ; preds = %2
%10 = load i64, i64* %1
%11 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %10)
ret void
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [5 x i8] c"%ld\0A\00"
define void @char_count() {
br label %1
1: ; preds = %1, %0
%2 = phi i64 [ 0, %0 ], [ %6, %1 ]
%3 = tail call i64 (...) @getchar()
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
%6 = add nuw nsw i64 %2, 1
br i1 %5, label %7, label %1
7: ; preds = %1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %2)
ret void
}
int f(int xx, int yy) { return 0; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int myc();
int main() { return myc(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <myc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <myc@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @myc()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @myc()
ret i32 %1
}
int sequenRecur(int *array, int now, int size, int target) {
  if (array[now] == target)
    return now;
  if (size == now - 1)
    return -1;
  return sequenRecur(array, now + 1, size, target);
}


x86 assembly (clang, -O0):
<sequenRecur>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x1c(%rbp),%eax
jne    1144 <sequenRecur+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1179 <sequenRecur+0x69>
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jne    1161 <sequenRecur+0x51>
movl   $0xffffffff,-0x4(%rbp)
jmp    1179 <sequenRecur+0x69>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
call   1030 <sequenRecur@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequenRecur>:
mov    %esi,%eax
movslq %esi,%rsi
cmp    %ecx,(%rdi,%rsi,4)
je     1132 <sequenRecur+0x32>
add    $0x1,%edx
lea    (%rdi,%rsi,4),%rsi
add    $0x4,%rsi
cs nopw 0x0(%rax,%rax,1)
nop
cmp    %eax,%edx
je     1133 <sequenRecur+0x33>
add    $0x1,%eax
lea    0x4(%rsi),%rdi
cmp    %ecx,(%rsi)
mov    %rdi,%rsi
jne    1120 <sequenRecur+0x20>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sequenRecur(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = load i32, i32* %9
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %4
%18 = load i32, i32* %7
store i32 %18, i32* %5
br label %32
19: ; preds = %4
%20 = load i32, i32* %8
%21 = load i32, i32* %7
%22 = sub nsw i32 %21, 1
%23 = icmp eq i32 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %19
store i32 -1, i32* %5
br label %32
25: ; preds = %19
%26 = load i32*, i32** %6
%27 = load i32, i32* %7
%28 = add nsw i32 %27, 1
%29 = load i32, i32* %8
%30 = load i32, i32* %9
%31 = call i32 @sequenRecur(i32* %26, i32 %28, i32 %29, i32 %30)
store i32 %31, i32* %5
br label %32
32: ; preds = %25, %24, %17
%33 = load i32, i32* %5
ret i32 %33
}

LLVM IR (-O2):
define i32 @sequenRecur(i32* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, %3
br i1 %8, label %21, label %9
9: ; preds = %4, %14
%10 = phi i64 [ %15, %14 ], [ %5, %4 ]
%11 = trunc i64 %10 to i32
%12 = add i32 %11, -1
%13 = icmp eq i32 %12, %2
br i1 %13, label %21, label %14
14: ; preds = %9
%15 = add nsw i64 %10, 1
%16 = getelementptr inbounds i32, i32* %0, i64 %15
%17 = load i32, i32* %16
%18 = icmp eq i32 %17, %3
br i1 %18, label %19, label %9
19: ; preds = %14
%20 = trunc i64 %15 to i32
br label %21
21: ; preds = %9, %19, %4
%22 = phi i32 [ %1, %4 ], [ %20, %19 ], [ -1, %9 ]
ret i32 %22
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int SIGINT;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void sig_INT(int signo) {
  if (signo == SIGINT) {
    exit(EXIT_SUCCESS);
  }
}


x86 assembly (clang, -O0):
<sig_INT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    113b <sig_INT+0x2b>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_INT>:
push   %rax
mov    0x2ed0(%rip),%rax
cmp    %edi,(%rax)
je     111e <sig_INT+0xe>
pop    %rax
ret
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@EXIT_SUCCESS = global i32 0
define void @sig_INT(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@EXIT_SUCCESS = global i32 0
define void @sig_INT(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = load i32, i32* @EXIT_SUCCESS
%6 = tail call i32 @exit(i32 %5)
unreachable
7: ; preds = %1
ret void
}
void link_error1() {}


x86 assembly (clang, -O0):
<link_error1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<link_error1>:
ret

LLVM IR (-O0):
define void @link_error1() {
ret void
}

LLVM IR (-O2):
define void @link_error1() {
ret void
}
void acpi_gic_init(void) {}


x86 assembly (clang, -O0):
<acpi_gic_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_gic_init>:
ret

LLVM IR (-O0):
define void @acpi_gic_init() {
ret void
}

LLVM IR (-O2):
define void @acpi_gic_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fun4();
int main(void) {
  fun4();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <fun4@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <fun4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fun4()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fun4()
ret i32 0
}
void reverse_str(char *s, int begin, int end) {
  char t;
  while (begin < end) {
    t = s[begin];
    s[begin++] = s[end];
    s[end--] = t;
  }
}


x86 assembly (clang, -O0):
<reverse_str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1165 <reverse_str+0x65>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%esi
add    $0x1,%esi
mov    %esi,-0xc(%rbp)
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x11(%rbp),%dl
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    %ecx,%esi
add    $0xffffffff,%esi
mov    %esi,-0x10(%rbp)
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
jmp    110e <reverse_str+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_str>:
cmp    %edx,%esi
jge    1131 <reverse_str+0x31>
movslq %esi,%rax
movslq %edx,%rcx
add    $0x1,%rax
xchg   %ax,%ax
movzbl -0x1(%rdi,%rax,1),%esi
movzbl (%rdi,%rcx,1),%edx
mov    %dl,-0x1(%rdi,%rax,1)
mov    %sil,(%rdi,%rcx,1)
add    $0xffffffffffffffff,%rcx
lea    0x1(%rax),%rdx
cmp    %rcx,%rax
mov    %rdx,%rax
jl     1110 <reverse_str+0x10>
ret

LLVM IR (-O0):
define void @reverse_str(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %8
8: ; preds = %12, %3
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %34
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
store i8 %17, i8* %7
%18 = load i8*, i8** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = load i8*, i8** %4
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
%26 = sext i32 %24 to i64
%27 = getelementptr inbounds i8, i8* %23, i64 %26
store i8 %22, i8* %27
%28 = load i8, i8* %7
%29 = load i8*, i8** %4
%30 = load i32, i32* %6
%31 = add nsw i32 %30, -1
store i32 %31, i32* %6
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds i8, i8* %29, i64 %32
store i8 %28, i8* %33
br label %8
34: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @reverse_str(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %18
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = sext i32 %2 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ %7, %5 ], [ %16, %8 ]
%10 = phi i64 [ %6, %5 ], [ %15, %8 ]
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = getelementptr inbounds i8, i8* %0, i64 %9
%14 = load i8, i8* %13
%15 = add nsw i64 %10, 1
store i8 %14, i8* %11
%16 = add nsw i64 %9, -1
store i8 %12, i8* %13
%17 = icmp slt i64 %15, %16
br i1 %17, label %8, label %18
18: ; preds = %8, %3
ret void
}
void X509_CERT_PAIR_free(void) {}


x86 assembly (clang, -O0):
<X509_CERT_PAIR_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_CERT_PAIR_free>:
ret

LLVM IR (-O0):
define void @X509_CERT_PAIR_free() {
ret void
}

LLVM IR (-O2):
define void @X509_CERT_PAIR_free() {
ret void
}
unsigned long rho_ruby_create_object_with_id(unsigned long klass,
                                             const char *szID) {
  return 0;
}


x86 assembly (clang, -O0):
<rho_ruby_create_object_with_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rho_ruby_create_object_with_id>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @rho_ruby_create_object_with_id(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
ret i64 0
}

LLVM IR (-O2):
define i64 @rho_ruby_create_object_with_id(i64 %0, i8* nocapture readnone %1) {
ret i64 0
}
/* Variables and functions */
int multipRec(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("5 x 10: %d", multipRec(5, 7));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
mov    $0x7,%esi
call   1040 <multipRec@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x7,%esi
call   1040 <multipRec@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"5 x 10: %d\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @multipRec(i32 5, i32 7)
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"5 x 10: %d\00"
define i32 @main() {
%1 = tail call i32 @multipRec(i32 5, i32 7)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
struct winsize {
  int ws_col;
};

/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ TIOCGWINSZ;
int /*<<< orphan*/ ioctl(int /*<<< orphan*/, int /*<<< orphan*/,
                         struct winsize *);
int console_width() {
  static int width;
  struct winsize w;
  if (width > 0)
    return width;
  ioctl(STDOUT_FILENO, TIOCGWINSZ, &w);
  width = w.ws_col;
  return width;
}


x86 assembly (clang, -O0):
<console_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,0x2f0d(%rip)
jle    1133 <console_width+0x23>
mov    0x2f01(%rip),%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <console_width+0x50>
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    0x2e8d(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
mov    -0x8(%rbp),%eax
mov    %eax,0x2ed5(%rip)
mov    0x2ecf(%rip),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_width>:
push   %rax
mov    0x2f15(%rip),%eax
test   %eax,%eax
jle    111d <console_width+0xd>
pop    %rcx
ret
mov    0x2ecc(%rip),%rax
mov    (%rax),%edi
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
mov    %rsp,%rdx
call   1030 <ioctl@plt>
mov    (%rsp),%eax
mov    %eax,0x2eec(%rip)
pop    %rcx
ret

LLVM IR (-O0):
%struct.winsize = type { i32 }
@console_width.width = internal global i32 0
@STDOUT_FILENO = global i32 0
@TIOCGWINSZ = global i32 0
define i32 @console_width() {
%1 = alloca i32
%2 = alloca %struct.winsize
%3 = load i32, i32* @console_width.width
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i32, i32* @console_width.width
store i32 %6, i32* %1
br label %14
7: ; preds = %0
%8 = load i32, i32* @STDOUT_FILENO
%9 = load i32, i32* @TIOCGWINSZ
%10 = call i32 @ioctl(i32 %8, i32 %9, %struct.winsize* %2)
%11 = getelementptr inbounds %struct.winsize, %struct.winsize* %2, i32 0, i32 0
%12 = load i32, i32* %11
store i32 %12, i32* @console_width.width
%13 = load i32, i32* @console_width.width
store i32 %13, i32* %1
br label %14
14: ; preds = %7, %5
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
%struct.winsize = type { i32 }
@console_width.width = internal unnamed_addr global i32 0
@STDOUT_FILENO = global i32 0
@TIOCGWINSZ = global i32 0
define i32 @console_width() {
%1 = alloca %struct.winsize
%2 = bitcast %struct.winsize* %1 to i8*
%3 = load i32, i32* @console_width.width
%4 = icmp sgt i32 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %0
%6 = load i32, i32* @STDOUT_FILENO
%7 = load i32, i32* @TIOCGWINSZ
%8 = call i32 @ioctl(i32 %6, i32 %7, %struct.winsize* %1)
%9 = getelementptr inbounds %struct.winsize, %struct.winsize* %1, i64 0, i32 0
%10 = load i32, i32* %9
store i32 %10, i32* @console_width.width
br label %11
11: ; preds = %0, %5
%12 = phi i32 [ %10, %5 ], [ %3, %0 ]
ret i32 %12
}
void *VMM_ERR_PTR(long error) {
  if (0 < (-error) && (-error) < 4095)
    return (void *)(-error);
  return (void *)0;
}


x86 assembly (clang, -O0):
<VMM_ERR_PTR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%ecx
sub    -0x10(%rbp),%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jge    113c <VMM_ERR_PTR+0x3c>
xor    %eax,%eax
sub    -0x10(%rbp),%rax
cmp    $0xfff,%rax
jge    113c <VMM_ERR_PTR+0x3c>
xor    %eax,%eax
sub    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1144 <VMM_ERR_PTR+0x44>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMM_ERR_PTR>:
mov    %rdi,%rcx
neg    %rcx
xor    %eax,%eax
cmp    $0xfffffffffffff002,%rdi
cmovae %rcx,%rax
ret

LLVM IR (-O0):
define i8* @VMM_ERR_PTR(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = sub nsw i64 0, %4
%6 = icmp slt i64 0, %5
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i64, i64* %3
%9 = sub nsw i64 0, %8
%10 = icmp slt i64 %9, 4095
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i64, i64* %3
%13 = sub nsw i64 0, %12
%14 = inttoptr i64 %13 to i8*
store i8* %14, i8** %2
br label %16
15: ; preds = %7, %1
store i8* null, i8** %2
br label %16
16: ; preds = %15, %11
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
define i8* @VMM_ERR_PTR(i64 %0) {
%2 = sub nsw i64 0, %0
%3 = icmp ugt i64 %0, -4095
%4 = inttoptr i64 %2 to i8*
%5 = select i1 %3, i8* %4, i8* null
ret i8* %5
}
int DRV_GPIO_SET(unsigned char ucGroup, unsigned char ucPin,
                 unsigned char ucValue) {
  return 0;
}


x86 assembly (clang, -O0):
<DRV_GPIO_SET>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DRV_GPIO_SET>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DRV_GPIO_SET(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @DRV_GPIO_SET(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x76() {
  Assert_real((isalpha(118)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              595, ("isalpha should be 1 for v"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x76>:
push   %rbp
mov    %rsp,%rbp
mov    $0x76,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x253,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x76>:
push   %rax
mov    $0x76,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x253,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for v\00"
define void @t_isalpha_0x76() {
%1 = call i32 @isalpha(i32 118)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 595, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for v\00"
define void @t_isalpha_0x76() {
%1 = tail call i32 @isalpha(i32 118)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 595, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int ft_putnum(char *ch) {
  int num;
  num = 0;
  while (*ch) {
    num = num * 10;
    num = num + (*ch - '0');
    ch++;
  }
  return (num);
}


x86 assembly (clang, -O0):
<ft_putnum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <ft_putnum+0x46>
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <ft_putnum+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnum>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <ft_putnum+0x28>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
lea    (%rax,%rax,4),%eax
movsbl %cl,%ecx
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <ft_putnum+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_putnum(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 10
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 48
%16 = add nsw i32 %11, %15
store i32 %16, i32* %3
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @ft_putnum(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 10
%9 = sext i8 %5 to i32
%10 = add i32 %8, -48
%11 = add i32 %10, %9
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %16
}
long arch_iscall(long xt) { return (*(long *)xt & 0xff000000) == 0xeb000000; }


x86 assembly (clang, -O0):
<arch_iscall>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
movabs $0xff000000,%rax
and    (%rcx),%rax
mov    $0xeb000000,%ecx
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_iscall>:
movzbl 0x3(%rdi),%ecx
shl    $0x18,%ecx
xor    %eax,%eax
cmp    $0xeb000000,%ecx
sete   %al
ret

LLVM IR (-O0):
define i64 @arch_iscall(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i64*
%5 = load i64, i64* %4
%6 = and i64 %5, 4278190080
%7 = icmp eq i64 %6, 3942645760
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @arch_iscall(i64 %0) {
%2 = inttoptr i64 %0 to i64*
%3 = load i64, i64* %2
%4 = and i64 %3, 4278190080
%5 = icmp eq i64 %4, 3942645760
%6 = zext i1 %5 to i64
ret i64 %6
}
/* Variables and functions */
float hgetascender();
float hgetascender_() { return (hgetascender()); }


x86 assembly (clang, -O0):
<hgetascender_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hgetascender@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hgetascender_>:
xor    %eax,%eax
jmp    1030 <hgetascender@plt>

LLVM IR (-O0):
define float @hgetascender_() {
%1 = call float (...) @hgetascender()
ret float %1
}

LLVM IR (-O2):
define float @hgetascender_() {
%1 = tail call float (...) @hgetascender()
ret float %1
}
/* Variables and functions */
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
int /*<<< orphan*/ odroid_xu_pin_lookup(unsigned int, unsigned int *,
                                        unsigned int *);
void odroid_xu_gpio_write(unsigned int pin_index, unsigned int data) {
  unsigned int bank_offset, bit_index;
  odroid_xu_pin_lookup(pin_index, &bank_offset, &bit_index);
  exynos_5410_gpio_write_mask(bank_offset, ((data & 1U) << bit_index),
                              (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <odroid_xu_pin_lookup@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
and    $0x1,%esi
mov    -0x10(%rbp),%ecx
shl    %cl,%esi
mov    -0x10(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1040 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_write>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1030 <odroid_xu_pin_lookup@plt>
mov    0xc(%rsp),%edi
and    $0x1,%ebx
mov    0x8(%rsp),%cl
shl    %cl,%ebx
mov    $0x1,%edx
shl    %cl,%edx
mov    %ebx,%esi
call   1040 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @odroid_xu_gpio_write(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = call i32 @odroid_xu_pin_lookup(i32 %7, i32* %5, i32* %6)
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = load i32, i32* %6
%13 = shl i32 %11, %12
%14 = load i32, i32* %6
%15 = shl i32 1, %14
%16 = call i32 @exynos_5410_gpio_write_mask(i32 %9, i32 %13, i32 %15)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_write(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @odroid_xu_pin_lookup(i32 %0, i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = and i32 %1, 1
%10 = load i32, i32* %4
%11 = shl nuw i32 %9, %10
%12 = shl nuw i32 1, %10
%13 = call i32 @exynos_5410_gpio_write_mask(i32 %8, i32 %11, i32 %12)
ret void
}
int cuantos_x_canje(int c) {
  if (c < 1)
    return 0;
  switch (c) {
  case 0:
    return 0;
  case 1:
    return 4;
  case 2:
    return 7;
  case 3:
    return 10;
  default:
    return (c - 1) * 5;
  }
}


x86 assembly (clang, -O0):
<cuantos_x_canje>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jge    111d <cuantos_x_canje+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    117e <cuantos_x_canje+0x7e>
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     1172 <cuantos_x_canje+0x72>
mov    -0x10(%rbp),%rax
lea    0xec7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    117e <cuantos_x_canje+0x7e>
movl   $0x4,-0x4(%rbp)
jmp    117e <cuantos_x_canje+0x7e>
movl   $0x7,-0x4(%rbp)
jmp    117e <cuantos_x_canje+0x7e>
movl   $0xa,-0x4(%rbp)
jmp    117e <cuantos_x_canje+0x7e>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
imul   $0x5,%eax,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cuantos_x_canje>:
test   %edi,%edi
jle    1113 <cuantos_x_canje+0x13>
lea    -0x1(%rdi),%eax
cmp    $0x3,%eax
jae    1116 <cuantos_x_canje+0x16>
lea    (%rax,%rax,2),%eax
add    $0x4,%eax
ret
xor    %eax,%eax
ret
lea    (%rdi,%rdi,4),%eax
add    $0xfffffffb,%eax
ret

LLVM IR (-O0):
define i32 @cuantos_x_canje(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %17
7: ; preds = %1
%8 = load i32, i32* %3
switch i32 %8, label %13 [
i32 0, label %9
i32 1, label %10
i32 2, label %11
i32 3, label %12
]
9: ; preds = %7
store i32 0, i32* %2
br label %17
10: ; preds = %7
store i32 4, i32* %2
br label %17
11: ; preds = %7
store i32 7, i32* %2
br label %17
12: ; preds = %7
store i32 10, i32* %2
br label %17
13: ; preds = %7
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 1
%16 = mul nsw i32 %15, 5
store i32 %16, i32* %2
br label %17
17: ; preds = %13, %12, %11, %10, %9, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @cuantos_x_canje(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = icmp ult i32 %4, 3
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = mul i32 %0, 5
%8 = add i32 %7, -5
br label %12
9: ; preds = %3
%10 = mul i32 %4, 3
%11 = add i32 %10, 4
br label %12
12: ; preds = %9, %1, %6
%13 = phi i32 [ %8, %6 ], [ 0, %1 ], [ %11, %9 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int ASDF = 3;
  printf("%d\n", ASDF);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 3, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int _unhamming84(int /*<<< orphan*/ const);
int _line_packet_number(const uint8_t line[45]) {
  return ((_unhamming84(line[4]) << 1) | (_unhamming84(line[3]) >> 3));
}


x86 assembly (clang, -O0):
<_line_packet_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%edi
call   1030 <_unhamming84@plt>
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%edi
call   1030 <_unhamming84@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sar    $0x3,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_line_packet_number>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x10(%rdi),%edi
call   1030 <_unhamming84@plt>
mov    %eax,%ebp
add    %eax,%ebp
mov    0xc(%rbx),%edi
call   1030 <_unhamming84@plt>
sar    $0x3,%eax
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_line_packet_number(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
%6 = call i32 @_unhamming84(i32 %5)
%7 = shl i32 %6, 1
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 3
%10 = load i32, i32* %9
%11 = call i32 @_unhamming84(i32 %10)
%12 = ashr i32 %11, 3
%13 = or i32 %7, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @_line_packet_number(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = tail call i32 @_unhamming84(i32 %3)
%5 = shl i32 %4, 1
%6 = getelementptr inbounds i32, i32* %0, i64 3
%7 = load i32, i32* %6
%8 = tail call i32 @_unhamming84(i32 %7)
%9 = ashr i32 %8, 3
%10 = or i32 %9, %5
ret i32 %10
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool OSC_IsHPOSCEnabledWithHfDerivedLfClock(void) {
  bool enabled = false;
  uint16_t regVal = (*((volatile unsigned short *)(0x400CA000 + 0x00000000)));
  if (((regVal & 0x0000000C) == 0x00000004) &&
      ((regVal & 0x00004000) == 0x00004000)) {
    enabled = true;
  }
  return (enabled);
}


x86 assembly (clang, -O0):
<OSC_IsHPOSCEnabledWithHfDerivedLfClock>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x400ca000,%eax
mov    (%rax),%ax
movzwl %ax,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xc,%eax
cmp    $0x4,%eax
jne    1142 <OSC_IsHPOSCEnabledWithHfDerivedLfClock+0x42>
mov    -0x8(%rbp),%eax
and    $0x4000,%eax
cmp    $0x4000,%eax
jne    1142 <OSC_IsHPOSCEnabledWithHfDerivedLfClock+0x42>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSC_IsHPOSCEnabledWithHfDerivedLfClock>:
movzwl 0x400ca000,%ecx
40
and    $0x400c,%ecx
xor    %eax,%eax
cmp    $0x4004,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @OSC_IsHPOSCEnabledWithHfDerivedLfClock() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load volatile i16, i16* inttoptr (i64 1074569216 to i16*)
%4 = zext i16 %3 to i32
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, 12
%7 = icmp eq i32 %6, 4
br i1 %7, label %8, label %13
8: ; preds = %0
%9 = load i32, i32* %2
%10 = and i32 %9, 16384
%11 = icmp eq i32 %10, 16384
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %1
br label %13
13: ; preds = %12, %8, %0
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @OSC_IsHPOSCEnabledWithHfDerivedLfClock() {
%1 = load volatile i16, i16* inttoptr (i64 1074569216 to i16*)
%2 = and i16 %1, 16396
%3 = icmp eq i16 %2, 16388
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ SPI_Out(int);
int /*<<< orphan*/ waitmillisec(int);
void programming() {
  SPI_Out(0xAC);
  SPI_Out(0x53);
  SPI_Out(0x00);
  waitmillisec(9);
}


x86 assembly (clang, -O0):
<programming>:
push   %rbp
mov    %rsp,%rbp
mov    $0xac,%edi
call   1030 <SPI_Out@plt>
mov    $0x53,%edi
call   1030 <SPI_Out@plt>
xor    %edi,%edi
call   1030 <SPI_Out@plt>
mov    $0x9,%edi
call   1040 <waitmillisec@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<programming>:
push   %rax
mov    $0xac,%edi
call   1030 <SPI_Out@plt>
mov    $0x53,%edi
call   1030 <SPI_Out@plt>
xor    %edi,%edi
call   1030 <SPI_Out@plt>
mov    $0x9,%edi
pop    %rax
jmp    1040 <waitmillisec@plt>

LLVM IR (-O0):
define void @programming() {
%1 = call i32 @SPI_Out(i32 172)
%2 = call i32 @SPI_Out(i32 83)
%3 = call i32 @SPI_Out(i32 0)
%4 = call i32 @waitmillisec(i32 9)
ret void
}

LLVM IR (-O2):
define void @programming() {
%1 = tail call i32 @SPI_Out(i32 172)
%2 = tail call i32 @SPI_Out(i32 83)
%3 = tail call i32 @SPI_Out(i32 0)
%4 = tail call i32 @waitmillisec(i32 9)
ret void
}
/* Variables and functions */
int syscall(int, int, char const *, int, char const *, unsigned int);
int renameat2(int oldfd, const char *oldname, int newfd, const char *newname,
              unsigned flags) {
  return syscall(316, oldfd, oldname, newfd, newname, flags);
}


x86 assembly (clang, -O0):
<renameat2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
mov    $0x13c,%edi
call   1030 <syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<renameat2>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x13c,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @renameat2(i32 %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i8*, i8** %9
%15 = load i32, i32* %10
%16 = call i32 @syscall(i32 316, i32 %11, i8* %12, i32 %13, i8* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @renameat2(i32 %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = tail call i32 @syscall(i32 316, i32 %0, i8* %1, i32 %2, i8* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
void memcpy_overlapping_src_dst() {
  char big_buf[1000];
  char *ptr_1 = &big_buf[0];
  char *ptr_2 = &big_buf[400];
  memcpy(ptr_1, ptr_2, 500);
}


x86 assembly (clang, -O0):
<memcpy_overlapping_src_dst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x400,%rsp
lea    -0x3f0(%rbp),%rax
mov    %rax,-0x3f8(%rbp)
lea    -0x3f0(%rbp),%rax
add    $0x190,%rax
mov    %rax,-0x400(%rbp)
mov    -0x3f8(%rbp),%rdi
mov    -0x400(%rbp),%rsi
mov    $0x1f4,%edx
call   1030 <memcpy@plt>
add    $0x400,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_overlapping_src_dst>:
sub    $0x3e8,%rsp
lea    0x190(%rsp),%rsi
mov    %rsp,%rdi
mov    $0x1f4,%edx
call   1030 <memcpy@plt>
add    $0x3e8,%rsp
ret

LLVM IR (-O0):
define void @memcpy_overlapping_src_dst() {
%1 = alloca [1000 x i8]
%2 = alloca i8*
%3 = alloca i8*
%4 = getelementptr inbounds [1000 x i8], [1000 x i8]* %1, i64 0, i64 0
store i8* %4, i8** %2
%5 = getelementptr inbounds [1000 x i8], [1000 x i8]* %1, i64 0, i64 400
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = call i32 @memcpy(i8* %6, i8* %7, i32 500)
ret void
}

LLVM IR (-O2):
define void @memcpy_overlapping_src_dst() {
%1 = alloca [1000 x i8]
%2 = getelementptr inbounds [1000 x i8], [1000 x i8]* %1, i64 0, i64 0
%3 = getelementptr inbounds [1000 x i8], [1000 x i8]* %1, i64 0, i64 400
%4 = call i32 @memcpy(i8* %2, i8* %3, i32 500)
ret void
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
ssize_t sparsetable_group_num(ssize_t i) { return i / 48; }


x86 assembly (clang, -O0):
<sparsetable_group_num>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x30,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<sparsetable_group_num>:
movslq %edi,%rax
imul   $0x2aaaaaab,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x23,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sparsetable_group_num(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 48
ret i32 %4
}

LLVM IR (-O2):
define i32 @sparsetable_group_num(i32 %0) {
%2 = sdiv i32 %0, 48
ret i32 %2
}
/* Variables and functions */
char *malloc(int);
char *memcpy(char *, char *, int);
int /*<<< orphan*/ printf(char *, char *);
void test_memery_err() {
  char *s = "hello";
  printf("%s\n", s);
  s = malloc(sizeof(char) * 5);
  s = memcpy(s, "aello", 6);
  printf("%s\n", s);
}


x86 assembly (clang, -O0):
<test_memery_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe9e(%rip),%rsi
mov    $0x6,%edx
call   1040 <memcpy@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xe81(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_memery_err>:
push   %rbx
lea    0xece(%rip),%rbx
lea    0xec1(%rip),%rsi
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1050 <malloc@plt>
lea    0xeb2(%rip),%rsi
mov    %rax,%rdi
mov    $0x6,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@.str.2 = [6 x i8] c"aello\00"
define void @test_memery_err() {
%1 = alloca i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%4 = call i8* @malloc(i32 5)
store i8* %4, i8** %1
%5 = load i8*, i8** %1
%6 = call i8* @memcpy(i8* %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i32 6)
store i8* %6, i8** %1
%7 = load i8*, i8** %1
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@.str.2 = [6 x i8] c"aello\00"
define void @test_memery_err() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call dereferenceable_or_null(5) i8* @malloc(i32 5)
%3 = tail call i8* @memcpy(i8* %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i32 6)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_mmap();
int main() {
  test_mmap();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_mmap@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_mmap@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_mmap()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_mmap()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ esm_set_identity(float *);
float *safe_malloc(int, char *, int);
float *esmCreate() {
  float *M = safe_malloc(
      sizeof(float) * 16,
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/kristov/vroom/refs/heads/master/common/esm.c",
      350);
  esm_set_identity(M);
  return M;
}


x86 assembly (clang, -O0):
<esmCreate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x40,%edi
lea    0xecc(%rip),%rsi
mov    $0x15e,%edx
call   1030 <safe_malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <esm_set_identity@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<esmCreate>:
push   %rbx
lea    0xed8(%rip),%rsi
mov    $0x40,%edi
mov    $0x15e,%edx
call   1030 <safe_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <esm_set_identity@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [135 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/kristov/vroom/refs/heads/master/common/esm.c\00"
define float* @esmCreate() {
%1 = alloca float*
%2 = call float* @safe_malloc(i32 64, i8* getelementptr inbounds ([135 x i8], [135 x i8]* @.str, i64 0, i64 0), i32 350)
store float* %2, float** %1
%3 = load float*, float** %1
%4 = call i32 @esm_set_identity(float* %3)
%5 = load float*, float** %1
ret float* %5
}

LLVM IR (-O2):
@.str = [135 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/kristov/vroom/refs/heads/master/common/esm.c\00"
define float* @esmCreate() {
%1 = tail call float* @safe_malloc(i32 64, i8* getelementptr inbounds ([135 x i8], [135 x i8]* @.str, i64 0, i64 0), i32 350)
%2 = tail call i32 @esm_set_identity(float* %1)
ret float* %1
}
/* Variables and functions */
unsigned short updcrc(int, unsigned char *, unsigned int);
unsigned short calcCRC(unsigned char *buf, unsigned bsize) {
  return updcrc(0x0, (unsigned char *)buf, bsize);
}


x86 assembly (clang, -O0):
<calcCRC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
xor    %edi,%edi
call   1030 <updcrc@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcCRC>:
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <updcrc@plt>

LLVM IR (-O0):
define zeroext i16 @calcCRC(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call zeroext i16 @updcrc(i32 0, i8* %5, i32 %6)
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @calcCRC(i8* %0, i32 %1) {
%3 = tail call zeroext i16 @updcrc(i32 0, i8* %0, i32 %1)
ret i16 %3
}
/* Variables and functions */
int /*<<< orphan*/ DATA_simconn();
int /*<<< orphan*/ LibraryHeader(char *, char *);
int /*<<< orphan*/ STARTUP_simconn();
LIBRARY_simconn() {
  LibraryHeader("simconn", "Sat Feb  1 10:41:07 2014 ");
  DATA_simconn();
  STARTUP_simconn();
}


x86 assembly (clang, -O0):
<LIBRARY_simconn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    0xec2(%rip),%rsi
call   1030 <LibraryHeader@plt>
mov    $0x0,%al
call   1040 <DATA_simconn@plt>
mov    $0x0,%al
call   1050 <STARTUP_simconn@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LIBRARY_simconn>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0xec9(%rip),%rsi
call   1030 <LibraryHeader@plt>
xor    %eax,%eax
call   1040 <DATA_simconn@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <STARTUP_simconn@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"simconn\00"
@.str.1 = [26 x i8] c"Sat Feb 1 10:41:07 2014 \00"
define i32 @LIBRARY_simconn() {
%1 = alloca i32
%2 = call i32 @LibraryHeader(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @DATA_simconn()
%4 = call i32 (...) @STARTUP_simconn()
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@.str = [8 x i8] c"simconn\00"
@.str.1 = [26 x i8] c"Sat Feb 1 10:41:07 2014 \00"
define i32 @LIBRARY_simconn() {
%1 = tail call i32 @LibraryHeader(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 (...) @DATA_simconn()
%3 = tail call i32 (...) @STARTUP_simconn()
ret i32 undef
}
void flush_dcache_mmap_lock(struct address_space *mapping) {}


x86 assembly (clang, -O0):
<flush_dcache_mmap_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_dcache_mmap_lock>:
ret

LLVM IR (-O0):
%struct.address_space = type opaque
define void @flush_dcache_mmap_lock(%struct.address_space* %0) {
%2 = alloca %struct.address_space*
store %struct.address_space* %0, %struct.address_space** %2
ret void
}

LLVM IR (-O2):
%struct.address_space = type opaque
define void @flush_dcache_mmap_lock(%struct.address_space* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) { printf("tool2 ...\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"tool2 ...\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [10 x i8] c"tool2 ...\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret i32 0
}