xunge/DecIR huggingface dataset:
/* Type definitions */
struct timespec {
  double tv_sec;
  double tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ assert(int);
scalar_t__ clock_gettime(int /*<<< orphan*/, struct timespec *);
double monotonic_time() {
  struct timespec timespec;
  assert(clock_gettime(CLOCK_MONOTONIC, &timespec) == 0);
  return timespec.tv_sec + (timespec.tv_nsec / 1.0e9);
}


x86 assembly (clang, -O0):
<monotonic_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  0xea3(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<monotonic_time>:
sub    $0x18,%rsp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1040 <assert@plt>
movsd  0x10(%rsp),%xmm0
divsd  0xead(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { double, double }
@CLOCK_MONOTONIC = global i32 0
define double @monotonic_time() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_MONOTONIC
%3 = call i64 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%8 = load double, double* %7
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%10 = load double, double* %9
%11 = fdiv double %10, 1.000000e+09
%12 = fadd double %8, %11
ret double %12
}

LLVM IR (-O2):
%struct.timespec = type { double, double }
@CLOCK_MONOTONIC = global i32 0
define double @monotonic_time() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i64 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%9 = load double, double* %8
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%11 = load double, double* %10
%12 = fdiv double %11, 1.000000e+09
%13 = fadd double %9, %12
ret double %13
}
/* Variables and functions */
int sh_vector_compare(void const *, void const *);
int sh_stack_compare(const void *s, const void *s2) {
  return sh_vector_compare(s, s2);
}


x86 assembly (clang, -O0):
<sh_stack_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <sh_vector_compare@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sh_stack_compare>:
jmp    1030 <sh_vector_compare@plt>

LLVM IR (-O0):
define i32 @sh_stack_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @sh_vector_compare(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @sh_stack_compare(i8* %0, i8* %1) {
%3 = tail call i32 @sh_vector_compare(i8* %0, i8* %1)
ret i32 %3
}
void test9_helper(void) {}


x86 assembly (clang, -O0):
<test9_helper>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test9_helper>:
ret

LLVM IR (-O0):
define void @test9_helper() {
ret void
}

LLVM IR (-O2):
define void @test9_helper() {
ret void
}
void __cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx,
             unsigned int *edx) {
  asm volatile("cpuid"
               : "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
               : "0"(*eax), "2"(*ecx));
}


x86 assembly (clang, -O0):
<__cpuid>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%r8
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
mov    (%rcx),%ecx
cpuid
mov    %eax,%r9d
mov    -0x38(%rbp),%rax
mov    %ecx,%esi
mov    -0x30(%rbp),%rcx
mov    %r9d,(%r8)
mov    %ebx,(%rdi)
mov    %esi,(%rcx)
mov    %edx,(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cpuid>:
push   %rbx
mov    %rcx,%r8
mov    %rdx,%r9
mov    (%rdi),%eax
mov    (%rdx),%ecx
cpuid
mov    %eax,(%rdi)
mov    %ebx,(%rsi)
mov    %ecx,(%r9)
mov    %edx,(%r8)
pop    %rbx
ret

LLVM IR (-O0):
define void @__cpuid(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = load i32*, i32** %7
%16 = load i32, i32* %15
%17 = call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %14, i32 %16)
%18 = extractvalue { i32, i32, i32, i32 } %17, 0
%19 = extractvalue { i32, i32, i32, i32 } %17, 1
%20 = extractvalue { i32, i32, i32, i32 } %17, 2
%21 = extractvalue { i32, i32, i32, i32 } %17, 3
store i32 %18, i32* %9
store i32 %19, i32* %10
store i32 %20, i32* %11
store i32 %21, i32* %12
ret void
}

LLVM IR (-O2):
define void @__cpuid(i32* nocapture %0, i32* nocapture writeonly %1, i32* nocapture %2, i32* nocapture writeonly %3) {
%5 = load i32, i32* %0
%6 = load i32, i32* %2
%7 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 %6)
%8 = extractvalue { i32, i32, i32, i32 } %7, 0
%9 = extractvalue { i32, i32, i32, i32 } %7, 1
%10 = extractvalue { i32, i32, i32, i32 } %7, 2
%11 = extractvalue { i32, i32, i32, i32 } %7, 3
store i32 %8, i32* %0
store i32 %9, i32* %1
store i32 %10, i32* %2
store i32 %11, i32* %3
ret void
}
void genadd_s() {}


x86 assembly (clang, -O0):
<genadd_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genadd_s>:
ret

LLVM IR (-O0):
define void @genadd_s() {
ret void
}

LLVM IR (-O2):
define void @genadd_s() {
ret void
}
int mc_xtea_declen(int len) { return len; }


x86 assembly (clang, -O0):
<mc_xtea_declen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_xtea_declen>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mc_xtea_declen(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @mc_xtea_declen(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ matmul4_c(float *, float *, float *);
void matmul4_neon(float m0[16], float m1[16], float d[16]) {
  matmul4_c(m0, m1, d);
}


x86 assembly (clang, -O0):
<matmul4_neon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <matmul4_c@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matmul4_neon>:
jmp    1030 <matmul4_c@plt>

LLVM IR (-O0):
define void @matmul4_neon(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float*, float** %5
%9 = load float*, float** %6
%10 = call i32 @matmul4_c(float* %7, float* %8, float* %9)
ret void
}

LLVM IR (-O2):
define void @matmul4_neon(float* %0, float* %1, float* %2) {
%4 = tail call i32 @matmul4_c(float* %0, float* %1, float* %2)
ret void
}
/* Variables and functions */
float fmodf(float, float);
float CC3PositiveCyclic(float value, float period) {
  float modVal = (fmodf((value), (period)));
  return (modVal < 0.0) ? (modVal + period) : modVal;
}


x86 assembly (clang, -O0):
<CC3PositiveCyclic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <fmodf@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    1160 <CC3PositiveCyclic+0x50>
movss  -0xc(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    116a <CC3PositiveCyclic+0x5a>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC3PositiveCyclic>:
sub    $0x18,%rsp
movaps %xmm1,(%rsp)
call   1030 <fmodf@plt>
xorps  %xmm1,%xmm1
movaps %xmm0,%xmm2
cmpltss %xmm1,%xmm2
movaps (%rsp),%xmm3
andps  %xmm2,%xmm3
movss  0xec9(%rip),%xmm1
andnps %xmm1,%xmm2
orps   %xmm3,%xmm2
addss  %xmm2,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define float @CC3PositiveCyclic(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = call float @fmodf(float %6, float %7)
store float %8, float* %5
%9 = load float, float* %5
%10 = fpext float %9 to double
%11 = fcmp olt double %10, 0.000000e+00
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load float, float* %5
%14 = load float, float* %4
%15 = fadd float %13, %14
br label %18
16: ; preds = %2
%17 = load float, float* %5
br label %18
18: ; preds = %16, %12
%19 = phi float [ %15, %12 ], [ %17, %16 ]
ret float %19
}

LLVM IR (-O2):
define float @CC3PositiveCyclic(float %0, float %1) {
%3 = tail call float @fmodf(float %0, float %1)
%4 = fcmp olt float %3, 0.000000e+00
%5 = select i1 %4, float %1, float -0.000000e+00
%6 = fadd float %3, %5
ret float %6
}
/* Variables and functions */
char *ioc_conv(int, int, char *, unsigned int);
char *ioc_ito26(unsigned int n) {
  return (ioc_conv(26, 1, "zabcdefghijklmnopqrstuvwxy", n));
}


x86 assembly (clang, -O0):
<ioc_ito26>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1a,%edi
mov    $0x1,%esi
lea    0xed1(%rip),%rdx
call   1030 <ioc_conv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioc_ito26>:
mov    %edi,%ecx
lea    0xee7(%rip),%rdx
mov    $0x1a,%edi
mov    $0x1,%esi
jmp    1030 <ioc_conv@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"zabcdefghijklmnopqrstuvwxy\00"
define i8* @ioc_ito26(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @ioc_conv(i32 26, i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [27 x i8] c"zabcdefghijklmnopqrstuvwxy\00"
define i8* @ioc_ito26(i32 %0) {
%2 = tail call i8* @ioc_conv(i32 26, i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
unsigned int f65(unsigned int x, int y) {
  return (x << y) + (x >> (8 * 4 - y));
}


x86 assembly (clang, -O0):
<f65>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f65>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f65(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 32, %9
%11 = lshr i32 %8, %10
%12 = add i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @f65(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = lshr i32 %0, %4
%6 = add i32 %5, %3
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ ASN1_TIME;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_TIME_adj(int /*<<< orphan*/ *, int /*<<< orphan*/,
                                  int /*<<< orphan*/, int /*<<< orphan*/);
ASN1_TIME *ASN1_TIME_set(ASN1_TIME *s, time_t t) {
  return (ASN1_TIME_adj(s, t, 0, 0));
}


x86 assembly (clang, -O0):
<ASN1_TIME_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <ASN1_TIME_adj@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_TIME_set>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <ASN1_TIME_adj@plt>

LLVM IR (-O0):
define i32* @ASN1_TIME_set(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32* @ASN1_TIME_adj(i32* %5, i32 %6, i32 0, i32 0)
ret i32* %7
}

LLVM IR (-O2):
define i32* @ASN1_TIME_set(i32* %0, i32 %1) {
%3 = tail call i32* @ASN1_TIME_adj(i32* %0, i32 %1, i32 0, i32 0)
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ outw_local(unsigned short, int);
__attribute__((always_)) void outw(unsigned short value, int port) {
  outw_local(value, port);
}


x86 assembly (clang, -O0):
<outw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x2(%rbp),%ax
mov    -0x8(%rbp),%esi
movzwl %ax,%edi
call   1030 <outw_local@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw>:
jmp    1030 <outw_local@plt>

LLVM IR (-O0):
define void @outw(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = load i32, i32* %4
%7 = call i32 @outw_local(i16 zeroext %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @outw(i16 zeroext %0, i32 %1) {
%3 = tail call i32 @outw_local(i16 zeroext %0, i32 %1)
ret void
}
void fd24(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  p01A:
    goto p01A;
    goto a;
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
a : {
  typedef int(*f)[n];
P02A:
  goto P02A;
  {
    typedef int(*g)[n];
  P024A:
    goto P024A;
    0;
  };
P02B:
  goto P02B;
  {
    typedef int(*h)[n];
  P025A:
    goto P025A;
    0;
  };
P02C:
  goto P02C;
  ;
  typedef int(*i)[n];
P026A:
  goto P026A;
  0;
};
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd24>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd24+0x7>

x86 assembly (clang, -O2):
<fd24>:
jmp    1100 <fd24>

LLVM IR (-O0):
define void @fd24(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; preds = %8
br label %8
9: ; No predecessors!
%10 = load i32, i32* %2
%11 = zext i32 %10 to i64
br label %12
12: ; preds = %12, %9
br label %12
13: ; preds = %13
br label %13
14: ; No predecessors!
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
br label %17
17: ; preds = %17, %14
br label %17
18: ; preds = %18
br label %18
19: ; No predecessors!
%20 = load i32, i32* %2
%21 = zext i32 %20 to i64
br label %22
22: ; preds = %22, %19
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd24(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
main() {
  if ("hi")
    ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%al
test   $0x1,%al
jne    111a <main+0x1a>
jmp    111f <main+0x1f>
jmp    111f <main+0x1f>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"hi\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br i1 true, label %2, label %3
2: ; preds = %0
br label %3
3: ; preds = %2, %0
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
int /*<<< orphan*/ pmu_set_active_clk(int, int, int, int);
int /*<<< orphan*/ pmu_set_adc_period(int);
int /*<<< orphan*/ pmu_set_sar_override(int);
int /*<<< orphan*/ pmu_set_sleep_clk(int, int, int, int);
void pmu_set_clk_init() {
  pmu_set_active_clk(0xA, 0x1, 0x10, 0x2);
  pmu_set_sleep_clk(0xF, 0x0, 0x1, 0x1);
  mbus_remote_register_write(0x6, 0x05,
                             ((0 << 13) | (0 << 12) | (1 << 11) | (0 << 10) |
                              (0 << 9) | (0 << 8) | (0 << 7) | (0x45)));
  delay(100);
  pmu_set_sar_override(0x4D);
  pmu_set_adc_period(1);
}


x86 assembly (clang, -O0):
<pmu_set_clk_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
mov    $0x1,%esi
mov    $0x10,%edx
mov    $0x2,%ecx
call   1040 <pmu_set_active_clk@plt>
mov    $0xf,%edi
xor    %esi,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <pmu_set_sleep_clk@plt>
mov    $0x6,%edi
mov    $0x5,%esi
mov    $0x845,%edx
call   1060 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1050 <delay@plt>
mov    $0x4d,%edi
call   1070 <pmu_set_sar_override@plt>
mov    $0x1,%edi
call   1080 <pmu_set_adc_period@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_set_clk_init>:
push   %rax
mov    $0xa,%edi
mov    $0x1,%esi
mov    $0x10,%edx
mov    $0x2,%ecx
call   1040 <pmu_set_active_clk@plt>
mov    $0xf,%edi
xor    %esi,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1030 <pmu_set_sleep_clk@plt>
mov    $0x6,%edi
mov    $0x5,%esi
mov    $0x845,%edx
call   1060 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1050 <delay@plt>
mov    $0x4d,%edi
call   1070 <pmu_set_sar_override@plt>
mov    $0x1,%edi
pop    %rax
jmp    1080 <pmu_set_adc_period@plt>

LLVM IR (-O0):
define void @pmu_set_clk_init() {
%1 = call i32 @pmu_set_active_clk(i32 10, i32 1, i32 16, i32 2)
%2 = call i32 @pmu_set_sleep_clk(i32 15, i32 0, i32 1, i32 1)
%3 = call i32 @mbus_remote_register_write(i32 6, i32 5, i32 2117)
%4 = call i32 @delay(i32 100)
%5 = call i32 @pmu_set_sar_override(i32 77)
%6 = call i32 @pmu_set_adc_period(i32 1)
ret void
}

LLVM IR (-O2):
define void @pmu_set_clk_init() {
%1 = tail call i32 @pmu_set_active_clk(i32 10, i32 1, i32 16, i32 2)
%2 = tail call i32 @pmu_set_sleep_clk(i32 15, i32 0, i32 1, i32 1)
%3 = tail call i32 @mbus_remote_register_write(i32 6, i32 5, i32 2117)
%4 = tail call i32 @delay(i32 100)
%5 = tail call i32 @pmu_set_sar_override(i32 77)
%6 = tail call i32 @pmu_set_adc_period(i32 1)
ret void
}
int all_positive(int *arr, int size) {
  int i;
  for (i = 0; i < size; i++) {
    if (arr[i] < 0)
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<all_positive>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    114f <all_positive+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jge    113c <all_positive+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1156 <all_positive+0x56>
jmp    1141 <all_positive+0x41>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <all_positive+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_positive>:
mov    $0x1,%eax
test   %esi,%esi
jle    111f <all_positive+0x1f>
mov    %esi,%ecx
xor    %edx,%edx
nopl   (%rax)
cmpl   $0x0,(%rdi,%rdx,4)
js     1120 <all_positive+0x20>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <all_positive+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @all_positive(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = icmp slt i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %11
store i32 0, i32* %3
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %7
23: ; preds = %7
store i32 1, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @all_positive(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %13, %5
br i1 %7, label %14, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %13, %6 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = icmp slt i32 %11, 0
%13 = add nuw nsw i64 %9, 1
br i1 %12, label %14, label %6
14: ; preds = %8, %6, %2
%15 = phi i32 [ 1, %2 ], [ 1, %6 ], [ 0, %8 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ PAGE_RemoveAllObjects();
int /*<<< orphan*/ PAGE_SetModal(int /*<<< orphan*/);
int /*<<< orphan*/ _show_page();
void PAGE_TrimInit(int page) {
  (void)page;
  PAGE_SetModal(0);
  PAGE_RemoveAllObjects();
  _show_page();
}


x86 assembly (clang, -O0):
<PAGE_TrimInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1050 <PAGE_SetModal@plt>
mov    $0x0,%al
call   1030 <PAGE_RemoveAllObjects@plt>
mov    $0x0,%al
call   1040 <_show_page@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PAGE_TrimInit>:
push   %rax
xor    %edi,%edi
call   1050 <PAGE_SetModal@plt>
xor    %eax,%eax
call   1030 <PAGE_RemoveAllObjects@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <_show_page@plt>

LLVM IR (-O0):
define void @PAGE_TrimInit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @PAGE_SetModal(i32 0)
%5 = call i32 (...) @PAGE_RemoveAllObjects()
%6 = call i32 (...) @_show_page()
ret void
}

LLVM IR (-O2):
define void @PAGE_TrimInit(i32 %0) {
%2 = tail call i32 @PAGE_SetModal(i32 0)
%3 = tail call i32 (...) @PAGE_RemoveAllObjects()
%4 = tail call i32 (...) @_show_page()
ret void
}
void gtk_settings_set_property_value() {}


x86 assembly (clang, -O0):
<gtk_settings_set_property_value>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_settings_set_property_value>:
ret

LLVM IR (-O0):
define void @gtk_settings_set_property_value() {
ret void
}

LLVM IR (-O2):
define void @gtk_settings_set_property_value() {
ret void
}
int test_imm_12int8_mem(signed char *val) {
  return ((*val) & (-0x12 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_12int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffee,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_12int8_mem>:
testb  $0xee,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_12int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -18
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_12int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -18
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ everror(char *);
int /*<<< orphan*/ usage();
void usageError(void) {
  usage();
  everror("Bad usage");
}


x86 assembly (clang, -O0):
<usageError>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <usage@plt>
lea    0xece(%rip),%rdi
call   1040 <everror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usageError>:
push   %rax
xor    %eax,%eax
call   1030 <usage@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <everror@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Bad usage\00"
define void @usageError() {
%1 = call i32 (...) @usage()
%2 = call i32 @everror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Bad usage\00"
define void @usageError() {
%1 = tail call i32 (...) @usage()
%2 = tail call i32 @everror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int8_t;
typedef int u_int32_t;

/* Variables and functions */
u_int8_t TwoFish__b(u_int32_t x, int n) {
  n &= 3;
  while (n-- > 0)
    x >>= 8;
  return (u_int8_t)x;
}


x86 assembly (clang, -O0):
<TwoFish__b>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
jle    1135 <TwoFish__b+0x35>
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
jmp    1113 <TwoFish__b+0x13>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TwoFish__b>:
mov    %edi,%eax
and    $0x3,%esi
je     111d <TwoFish__b+0x1d>
cmp    $0x2,%esi
jb     111e <TwoFish__b+0x1e>
mov    %eax,%ecx
sar    $0x10,%ecx
add    $0xfffffffd,%esi
sar    $0x18,%eax
cmp    $0xfffffffe,%esi
cmovae %ecx,%eax
ret
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @TwoFish__b(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 3
store i32 %6, i32* %4
br label %7
7: ; preds = %11, %2
%8 = load i32, i32* %4
%9 = add nsw i32 %8, -1
store i32 %9, i32* %4
%10 = icmp sgt i32 %8, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = ashr i32 %12, 8
store i32 %13, i32* %3
br label %7
14: ; preds = %7
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @TwoFish__b(i32 %0, i32 %1) {
%3 = and i32 %1, 3
%4 = icmp eq i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2
%6 = ashr i32 %0, 8
%7 = icmp ugt i32 %3, 1
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = ashr i32 %0, 16
%10 = add nsw i32 %3, -3
%11 = icmp ult i32 %10, -2
%12 = ashr i32 %0, 24
%13 = select i1 %11, i32 %12, i32 %9
br label %14
14: ; preds = %8, %5, %2
%15 = phi i32 [ %0, %2 ], [ %6, %5 ], [ %13, %8 ]
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int pthread_attr_getstacksize(const pthread_attr_t *attr, size_t *stacksize) {
  return 1;
}


x86 assembly (clang, -O0):
<pthread_attr_getstacksize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_getstacksize>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pthread_attr_getstacksize(i32* %0, i64* %1) {
%3 = alloca i32*
%4 = alloca i64*
store i32* %0, i32** %3
store i64* %1, i64** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @pthread_attr_getstacksize(i32* nocapture readnone %0, i64* nocapture readnone %1) {
ret i32 1
}
void rtw_netif_wake_queue(void *pnetdev) {}


x86 assembly (clang, -O0):
<rtw_netif_wake_queue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtw_netif_wake_queue>:
ret

LLVM IR (-O0):
define void @rtw_netif_wake_queue(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @rtw_netif_wake_queue(i8* nocapture %0) {
ret void
}
int hybris_check_android_shared_cond(int cond_addr) {
  if ((cond_addr <= 0xFFFF) && (cond_addr & 0x0001))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<hybris_check_android_shared_cond>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffff,-0x8(%rbp)
jg     112f <hybris_check_android_shared_cond+0x2f>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     112f <hybris_check_android_shared_cond+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1136 <hybris_check_android_shared_cond+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hybris_check_android_shared_cond>:
cmp    $0x10000,%edi
setl   %al
and    %al,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @hybris_check_android_shared_cond(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 65535
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = and i32 %7, 1
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
store i32 1, i32* %2
br label %12
11: ; preds = %6, %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @hybris_check_android_shared_cond(i32 %0) {
%2 = icmp slt i32 %0, 65536
%3 = and i32 %0, 1
%4 = icmp ne i32 %3, 0
%5 = and i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void usage() {
  fputs("usage: npipe [-h host] [-p port] [-f] [-V] [-v]\n", stderr);
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"usage: npipe [-h host] [-p port] [-f] [-V] [-v]\0A\00"
@stderr = global i32 0
@EXIT_SUCCESS = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EXIT_SUCCESS
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@.str = [49 x i8] c"usage: npipe [-h host] [-p port] [-f] [-V] [-v]\0A\00"
@stderr = global i32 0
@EXIT_SUCCESS = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EXIT_SUCCESS
%4 = tail call i32 @exit(i32 %3)
unreachable
}
int efunc3() { return 3; }


x86 assembly (clang, -O0):
<efunc3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<efunc3>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @efunc3() {
ret i32 3
}

LLVM IR (-O2):
define i32 @efunc3() {
ret i32 3
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
size_t varint_calc_size(uint64_t value) {
  if (value < 0xFD)
    return 1;
  else if (value <= 0xFFFF)
    return 3;
  else if (value <= 0xFFFFFFFF)
    return 5;
  return 9;
}


x86 assembly (clang, -O0):
<varint_calc_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0xfd,-0xc(%rbp)
jge    1121 <varint_calc_size+0x21>
movq   $0x1,-0x8(%rbp)
jmp    1164 <varint_calc_size+0x64>
cmpl   $0xffff,-0xc(%rbp)
jg     113b <varint_calc_size+0x3b>
movq   $0x3,-0x8(%rbp)
jmp    1164 <varint_calc_size+0x64>
cmpl   $0xffffffff,-0xc(%rbp)
ja     1152 <varint_calc_size+0x52>
movq   $0x5,-0x8(%rbp)
jmp    1164 <varint_calc_size+0x64>
jmp    1157 <varint_calc_size+0x57>
jmp    115c <varint_calc_size+0x5c>
movq   $0x9,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<varint_calc_size>:
xor    %eax,%eax
cmp    $0x10000,%edi
setge  %al
cmp    $0xfd,%edi
lea    0x3(%rax,%rax,1),%rcx
mov    $0x1,%eax
cmovge %rcx,%rax
ret

LLVM IR (-O0):
define i64 @varint_calc_size(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 253
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %18
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 65535
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 3, i64* %2
br label %18
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp ule i32 %12, -1
br i1 %13, label %14, label %15
14: ; preds = %11
store i64 5, i64* %2
br label %18
15: ; preds = %11
br label %16
16: ; preds = %15
br label %17
17: ; preds = %16
store i64 9, i64* %2
br label %18
18: ; preds = %17, %14, %10, %6
%19 = load i64, i64* %2
ret i64 %19
}

LLVM IR (-O2):
define i64 @varint_calc_size(i32 %0) {
%2 = icmp slt i32 %0, 253
%3 = icmp slt i32 %0, 65536
%4 = select i1 %3, i64 3, i64 5
%5 = select i1 %2, i64 1, i64 %4
ret i64 %5
}
unsigned int f68(unsigned int x, int y __attribute__((unused))) {
  return (x << (8 * 4 - 1)) + (x >> 1);
}


x86 assembly (clang, -O0):
<f68>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1f,%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f68>:
mov    %edi,%eax
ror    %eax
ret

LLVM IR (-O0):
define i32 @f68(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 31
%7 = load i32, i32* %3
%8 = lshr i32 %7, 1
%9 = add i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f68(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 31)
ret i32 %3
}
int test_imm_1Buint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x1b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint64_midword_reg>:
test   $0x1b0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 27
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Buint64_midword_reg(i64 %0) {
%2 = and i64 %0, 1769472
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ fdiml(long double, long double);
int /*<<< orphan*/ link_failure_fdiml();
void test_fdiml(long double ld1, long double ld2) {
  if (fdiml(ld1, ld2) != fdiml(ld1, ld2))
    link_failure_fdiml();
}


x86 assembly (clang, -O0):
<test_fdiml>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <fdiml@plt>
mov    %rax,-0x28(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <fdiml@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
je     1175 <test_fdiml+0x55>
mov    $0x0,%al
call   1040 <link_failure_fdiml@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fdiml>:
push   %rbx
sub    $0x40,%rsp
fldt   0x50(%rsp)
fld    %st(0)
fstpt  0x34(%rsp)
fldt   0x60(%rsp)
fld    %st(0)
fstpt  0x28(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
call   1030 <fdiml@plt>
mov    %rax,%rbx
fldt   0x28(%rsp)
fstpt  0x10(%rsp)
fldt   0x34(%rsp)
fstpt  (%rsp)
call   1030 <fdiml@plt>
cmp    %rax,%rbx
jne    1167 <test_fdiml+0x47>
add    $0x40,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
jmp    1040 <link_failure_fdiml@plt>

LLVM IR (-O0):
define void @test_fdiml(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @fdiml(x86_fp80 %5, x86_fp80 %6)
%8 = load x86_fp80, x86_fp80* %3
%9 = load x86_fp80, x86_fp80* %4
%10 = call i64 @fdiml(x86_fp80 %8, x86_fp80 %9)
%11 = icmp ne i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @link_failure_fdiml()
br label %14
14: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @test_fdiml(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @fdiml(x86_fp80 %0, x86_fp80 %1)
%4 = tail call i64 @fdiml(x86_fp80 %0, x86_fp80 %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @link_failure_fdiml()
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int block_read_write(unsigned long long, unsigned int, void *,
                     int /*<<< orphan*/);
int block_write(unsigned long long offset, unsigned int len, const void *buf) {
  return block_read_write(offset, len, (void *)buf, 0);
}


x86 assembly (clang, -O0):
<block_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <block_read_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<block_write>:
xor    %ecx,%ecx
jmp    1030 <block_read_write@plt>

LLVM IR (-O0):
define i32 @block_write(i64 %0, i32 %1, i8* %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i8*
store i64 %0, i64* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i64, i64* %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @block_read_write(i64 %7, i32 %8, i8* %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @block_write(i64 %0, i32 %1, i8* %2) {
%4 = tail call i32 @block_read_write(i64 %0, i32 %1, i8* %2, i32 0)
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int width;
};
typedef TYPE_1__ XImage;

/* Variables and functions */
void set_XImage_width(void *_p, int _v) { ((XImage *)_p)->width = (int)_v; }


x86 assembly (clang, -O0):
<set_XImage_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XImage_width>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XImage_width(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XImage_width(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ grub_sh_init();
void grub_init_all(void) { grub_sh_init(); }


x86 assembly (clang, -O0):
<grub_init_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <grub_sh_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<grub_init_all>:
xor    %eax,%eax
jmp    1030 <grub_sh_init@plt>

LLVM IR (-O0):
define void @grub_init_all() {
%1 = call i32 (...) @grub_sh_init()
ret void
}

LLVM IR (-O2):
define void @grub_init_all() {
%1 = tail call i32 (...) @grub_sh_init()
ret void
}
void init_ramdisk() {
  __asm__("mov %%ds,%%bx\n\t"
          "mov %%es,%%dx\n\t"
          "mov $0x10,%%ax\n\t"
          "mov %%ax,%%es\n\t"
          "mov %%ax,%%ds\n\t"
          "cld\n\t"
          "rep\n\t"
          "movsl\n\t"
          "mov %%dx,%%es\n\t"
          "mov %%bx,%%ds\n\t" ::"c"(500 * 1024 / 4),
          "D"((unsigned char *)0x100000), "S"((unsigned char *)0x19000));
}


x86 assembly (clang, -O0):
<init_ramdisk>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f400,%ecx
mov    $0x100000,%edi
mov    $0x19000,%esi
mov    %ds,%bx
mov    %es,%dx
mov    $0x10,%ax
mov    %eax,%es
mov    %eax,%ds
cld
rep movsl %ds:(%rsi),%es:(%rdi)
mov    %edx,%es
mov    %ebx,%ds
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_ramdisk>:
mov    $0x100000,%edi
mov    $0x19000,%esi
mov    $0x1f400,%ecx
mov    %ds,%bx
mov    %es,%dx
mov    $0x10,%ax
mov    %eax,%es
mov    %eax,%ds
cld
rep movsl %ds:(%rsi),%es:(%rdi)
mov    %edx,%es
mov    %ebx,%ds
ret

LLVM IR (-O0):
define void @init_ramdisk() {
ret void
}

LLVM IR (-O2):
define void @init_ramdisk() {
tail call void asm sideeffect "mov %ds,%bx\0A\09mov %es,%dx\0A\09mov $$0x10,%ax\0A\09mov %ax,%es\0A\09mov %ax,%ds\0A\09cld\0A\09rep\0A\09movsl\0A\09mov %dx,%es\0A\09mov %bx,%ds\0A\09", "{cx},{di},{si},~{dirflag},~{fpsr},~{flags}"(i32 128000, i8* inttoptr (i64 1048576 to i8*), i8* inttoptr (i64 102400 to i8*))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int, int);
void set_tail(void *ptr, int alloc_size) {
  ;
  char *tail;
  tail = ((char *)ptr) + alloc_size - (4);
  memset(tail, (0xCD), (4));
  ;
}


x86 assembly (clang, -O0):
<set_tail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
add    $0xfffffffffffffffc,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0xcd,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_tail>:
movslq %esi,%rax
add    %rax,%rdi
add    $0xfffffffffffffffc,%rdi
mov    $0xcd,%esi
mov    $0x4,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @set_tail(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = getelementptr inbounds i8, i8* %9, i64 -4
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = call i32 @memset(i8* %11, i32 205, i32 4)
ret void
}

LLVM IR (-O2):
define void @set_tail(i8* %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = getelementptr inbounds i8, i8* %4, i64 -4
%6 = tail call i32 @memset(i8* %5, i32 205, i32 4)
ret void
}
void f3(int *x) {
  for (int j = 0; j < 8; ++j)
    x[j] += 1;
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    1138 <f3+0x38>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
add    $0x1,%edx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <f3+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
pcmpeqd %xmm0,%xmm0
movdqu (%rdi),%xmm1
movdqu 0x10(%rdi),%xmm2
psubd  %xmm0,%xmm1
movdqu %xmm1,(%rdi)
psubd  %xmm0,%xmm2
movdqu %xmm2,0x10(%rdi)
ret

LLVM IR (-O0):
define void @f3(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 8
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %11
br label %14
14: ; preds = %7
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @f3(i32* nocapture %0) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2
%4 = add nsw <4 x i32> %3, <i32 1, i32 1, i32 1, i32 1>
%5 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> %4, <4 x i32>* %5
%6 = getelementptr inbounds i32, i32* %0, i64 4
%7 = bitcast i32* %6 to <4 x i32>*
%8 = load <4 x i32>, <4 x i32>* %7
%9 = add nsw <4 x i32> %8, <i32 1, i32 1, i32 1, i32 1>
%10 = bitcast i32* %6 to <4 x i32>*
store <4 x i32> %9, <4 x i32>* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TrimAnglesSettingsHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void TrimAnglesSettingsRequestUpdate() {
  UAVObjRequestUpdate(TrimAnglesSettingsHandle());
}


x86 assembly (clang, -O0):
<TrimAnglesSettingsRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TrimAnglesSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TrimAnglesSettingsRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <TrimAnglesSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @TrimAnglesSettingsRequestUpdate() {
%1 = call i32 (...) @TrimAnglesSettingsHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @TrimAnglesSettingsRequestUpdate() {
%1 = tail call i32 (...) @TrimAnglesSettingsHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void message(char *str) { fprintf(stderr, str); }


x86 assembly (clang, -O0):
<message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<message>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @message(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void shFree(void *vptr) { free(vptr); }


x86 assembly (clang, -O0):
<shFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @shFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @shFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lex_error();
int operator(void) {
  lex_error();
  return 0;
}


x86 assembly (clang, -O0):
<operator>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lex_error@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<operator>:
push   %rax
xor    %eax,%eax
call   1030 <lex_error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @operator() {
%1 = call i32 (...) @lex_error()
ret i32 0
}

LLVM IR (-O2):
define i32 @operator() {
%1 = tail call i32 (...) @lex_error()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ hang();
int /*<<< orphan*/ uart_strln(char *);
void c_data_abort() {
  uart_strln("Exception: data abort");
  hang();
}


x86 assembly (clang, -O0):
<c_data_abort>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <uart_strln@plt>
mov    $0x0,%al
call   1040 <hang@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_data_abort>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <uart_strln@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <hang@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Exception: data abort\00"
define void @c_data_abort() {
%1 = call i32 @uart_strln(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @hang()
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"Exception: data abort\00"
define void @c_data_abort() {
%1 = tail call i32 @uart_strln(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @hang()
ret void
}