xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int env_length(char **env) {
  unsigned int i = 0;
  while (env[i++] != NULL)
    ;
  return i - 1;
}


x86 assembly (clang, -O0):
<env_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
mov    %ecx,%ecx
cmpq   $0x0,(%rax,%rcx,8)
je     1130 <env_length+0x30>
jmp    110f <env_length+0xf>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<env_length>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpq   $0x0,(%rdi,%rax,8)
jne    1110 <env_length+0x10>
ret

LLVM IR (-O0):
define i32 @env_length(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = add i32 %6, 1
store i32 %7, i32* %3
%8 = zext i32 %6 to i64
%9 = getelementptr inbounds i8*, i8** %5, i64 %8
%10 = load i8*, i8** %9
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %13
12: ; preds = %4
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
%15 = sub i32 %14, 1
ret i32 %15
}

LLVM IR (-O2):
define i32 @env_length(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %4, %2 ]
%4 = add i32 %3, 1
%5 = zext i32 %3 to i64
%6 = getelementptr inbounds i8*, i8** %0, i64 %5
%7 = load i8*, i8** %6
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %2
9: ; preds = %2
ret i32 %3
}
void OnErrorCB0(const char *connectionID, const char *message, int length) {}


x86 assembly (clang, -O0):
<OnErrorCB0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<OnErrorCB0>:
ret

LLVM IR (-O0):
define void @OnErrorCB0(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @OnErrorCB0(i8* nocapture %0, i8* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_instr(int);
void eval_sub(void) { write_instr(0x16); }


x86 assembly (clang, -O0):
<eval_sub>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%edi
call   1030 <write_instr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_sub>:
mov    $0x16,%edi
jmp    1030 <write_instr@plt>

LLVM IR (-O0):
define void @eval_sub() {
%1 = call i32 @write_instr(i32 22)
ret void
}

LLVM IR (-O2):
define void @eval_sub() {
%1 = tail call i32 @write_instr(i32 22)
ret void
}
/* Variables and functions */
scalar_t__ recv(int, char *, int, int /*<<< orphan*/);
char socreadByte(int sockfd) {
  char ch;
  if (!sockfd)
    return 0;
  if (recv(sockfd, &ch, sizeof(char), 0) > 0)
    return ch;
  return 0;
}


x86 assembly (clang, -O0):
<socreadByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112e <socreadByte+0x1e>
movb   $0x0,-0x1(%rbp)
jmp    115a <socreadByte+0x4a>
mov    -0x8(%rbp),%edi
lea    -0x9(%rbp),%rsi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
cmp    $0x0,%rax
jle    1156 <socreadByte+0x46>
mov    -0x9(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    115a <socreadByte+0x4a>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socreadByte>:
push   %rbx
sub    $0x10,%rsp
xor    %ebx,%ebx
test   %edi,%edi
je     1139 <socreadByte+0x29>
lea    0xf(%rsp),%rsi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
test   %rax,%rax
movzbl 0xf(%rsp),%eax
cmovle %ebx,%eax
mov    %eax,%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @socreadByte(i32 %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i8 0, i8* %2
br label %15
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i64 @recv(i32 %9, i8* %4, i32 1, i32 0)
%11 = icmp sgt i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i8, i8* %4
store i8 %13, i8* %2
br label %15
14: ; preds = %8
store i8 0, i8* %2
br label %15
15: ; preds = %14, %12, %7
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @socreadByte(i32 %0) {
%2 = alloca i8
%3 = icmp eq i32 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = call i64 @recv(i32 %0, i8* %2, i32 1, i32 0)
%6 = icmp sgt i64 %5, 0
%7 = load i8, i8* %2
%8 = select i1 %6, i8 %7, i8 0
br label %9
9: ; preds = %4, %1
%10 = phi i8 [ 0, %1 ], [ %8, %4 ]
ret i8 %10
}
unsigned long totalhigh_pages(void) { return 0UL; }


x86 assembly (clang, -O0):
<totalhigh_pages>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<totalhigh_pages>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @totalhigh_pages() {
ret i64 0
}

LLVM IR (-O2):
define i64 @totalhigh_pages() {
ret i64 0
}
void OnMessageCB0(const char *connectionID, int isbinary, const char *data,
                  int length) {}


x86 assembly (clang, -O0):
<OnMessageCB0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<OnMessageCB0>:
ret

LLVM IR (-O0):
define void @OnMessageCB0(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @OnMessageCB0(i8* nocapture %0, i32 %1, i8* nocapture %2, i32 %3) {
ret void
}
/* Type definitions */
typedef int u_int32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
void print_address(FILE *stream, u_int32_t offset) {
  fprintf(stream, "0x%08x", offset);
}


x86 assembly (clang, -O0):
<print_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_address>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"0x%08x\00"
define void @print_address(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"0x%08x\00"
define void @print_address(i32* nocapture %0, i32 %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int isdecl(int tok) {
  switch (tok) {
  case 58:
  case 77:
  case 83:
  case 69:
  case 86:
  case 62:
  case 78:
  case 90:
  case 89:
  case 61:
  case 80:
  case 75:
  case 76:
  case 70:
  case 66:
  case 81:
  case 88:
  case 84:
  case 87:
  case 68:
  case 57:
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isdecl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffc7,%eax
sub    $0x2,%eax
jb     11a7 <isdecl+0xa7>
jmp    111e <isdecl+0x1e>
mov    -0xc(%rbp),%eax
add    $0xffffffc3,%eax
sub    $0x2,%eax
jb     11a7 <isdecl+0xa7>
jmp    1132 <isdecl+0x32>
mov    -0xc(%rbp),%eax
sub    $0x42,%eax
je     11a7 <isdecl+0xa7>
jmp    1143 <isdecl+0x43>
mov    -0xc(%rbp),%eax
add    $0xffffffbc,%eax
sub    $0x3,%eax
jb     11a7 <isdecl+0xa7>
jmp    1157 <isdecl+0x57>
mov    -0xc(%rbp),%eax
add    $0xffffffb5,%eax
sub    $0x4,%eax
jb     11a7 <isdecl+0xa7>
jmp    116b <isdecl+0x6b>
mov    -0xc(%rbp),%eax
add    $0xffffffb0,%eax
sub    $0x2,%eax
jb     11a7 <isdecl+0xa7>
jmp    117f <isdecl+0x7f>
mov    -0xc(%rbp),%eax
add    $0xffffffad,%eax
sub    $0x2,%eax
jb     11a7 <isdecl+0xa7>
jmp    1193 <isdecl+0x93>
mov    -0xc(%rbp),%eax
add    $0xffffffaa,%eax
sub    $0x4,%eax
ja     11b3 <isdecl+0xb3>
jmp    11a7 <isdecl+0xa7>
movl   $0x1,-0x4(%rbp)
jmp    11ba <isdecl+0xba>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdecl>:
add    $0xffffffc7,%edi
xor    %eax,%eax
cmp    $0x21,%edi
ja     1117 <isdecl+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @isdecl(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 58, label %5
i32 77, label %5
i32 83, label %5
i32 69, label %5
i32 86, label %5
i32 62, label %5
i32 78, label %5
i32 90, label %5
i32 89, label %5
i32 61, label %5
i32 80, label %5
i32 75, label %5
i32 76, label %5
i32 70, label %5
i32 66, label %5
i32 81, label %5
i32 88, label %5
i32 84, label %5
i32 87, label %5
i32 68, label %5
i32 57, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
@switch.table.isdecl = [34 x i32] [i32 1, i32 1, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 0, i32 1, i32 1, i32 0, i32 1, i32 1, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1]
define i32 @isdecl(i32 %0) {
%2 = add i32 %0, -57
%3 = icmp ult i32 %2, 34
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [34 x i32], [34 x i32]* @switch.table.isdecl, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
char *readTag(char **pointerToText) {
  char tag[20] = "";
  char *text = *pointerToText;
  int i = 0;
  while (*text != '>') {
    text[i] = *text;
    i++;
    text++;
  }
  return tag;
}


x86 assembly (clang, -O0):
<readTag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x14,%edx
call   1030 <memset@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
mov    -0x28(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x3e,%eax
je     1179 <readTag+0x69>
mov    -0x28(%rbp),%rax
mov    (%rax),%dl
mov    -0x28(%rbp),%rax
movslq -0x2c(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x2c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    113e <readTag+0x2e>
lea    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readTag>:
mov    (%rdi),%rax
mov    (%rax),%cl
cmp    $0x3e,%cl
je     1121 <readTag+0x21>
xor    %edx,%edx
nopl   0x0(%rax)
mov    %cl,(%rax,%rdx,2)
movzbl 0x1(%rax,%rdx,1),%ecx
add    $0x1,%rdx
cmp    $0x3e,%cl
jne    1110 <readTag+0x10>
lea    -0x18(%rsp),%rax
ret

LLVM IR (-O0):
define i8* @readTag(i8** %0) {
%2 = alloca i8**
%3 = alloca [20 x i8]
%4 = alloca i8*
%5 = alloca i32
store i8** %0, i8*** %2
%6 = bitcast [20 x i8]* %3 to i8*
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
store i8* %8, i8** %4
store i32 0, i32* %5
br label %9
9: ; preds = %14, %1
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 62
br i1 %13, label %14, label %25
14: ; preds = %9
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = load i8*, i8** %4
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %9
25: ; preds = %9
%26 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
ret i8* %26
}

LLVM IR (-O2):
define noalias i8* @readTag(i8** nocapture %0) {
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%4 = load i8*, i8** %0
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 62
br i1 %6, label %16, label %7
7: ; preds = %1, %7
%8 = phi i64 [ %12, %7 ], [ 0, %1 ]
%9 = phi i8 [ %14, %7 ], [ %5, %1 ]
%10 = phi i8* [ %13, %7 ], [ %4, %1 ]
%11 = getelementptr inbounds i8, i8* %10, i64 %8
store i8 %9, i8* %11
%12 = add nuw i64 %8, 1
%13 = getelementptr inbounds i8, i8* %10, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 62
br i1 %15, label %16, label %7
16: ; preds = %7, %1
ret i8* %3
}
const char *check_leading_barchar(const char *str) {
  register const char *p = str;
  while (*p == ' ')
    p++;
  return *p == '|' ? p + 1 : (char *)0;
}


x86 assembly (clang, -O0):
<check_leading_barchar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    1131 <check_leading_barchar+0x31>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <check_leading_barchar+0x10>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7c,%eax
jne    1152 <check_leading_barchar+0x52>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    115d <check_leading_barchar+0x5d>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    115d <check_leading_barchar+0x5d>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_leading_barchar>:
movzbl (%rdi),%ecx
add    $0x1,%rdi
cmp    $0x20,%cl
je     1100 <check_leading_barchar>
xor    %eax,%eax
cmp    $0x7c,%cl
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i8* @check_leading_barchar(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
br label %5
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 124
br i1 %17, label %18, label %21
18: ; preds = %13
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i64 1
br label %22
21: ; preds = %13
br label %22
22: ; preds = %21, %18
%23 = phi i8* [ %20, %18 ], [ null, %21 ]
ret i8* %23
}

LLVM IR (-O2):
define i8* @check_leading_barchar(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
%8 = icmp eq i8 %4, 124
%9 = select i1 %8, i8* %6, i8* null
ret i8* %9
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t combine_addr(uint64_t addr, int is_4dw) {
  return is_4dw ? (addr >> 32) | (addr << 32) : addr;
}


x86 assembly (clang, -O0):
<combine_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1134 <combine_addr+0x34>
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    113a <combine_addr+0x3a>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<combine_addr>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @combine_addr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i32, i32* %3
%9 = ashr i32 %8, 32
%10 = load i32, i32* %3
%11 = shl i32 %10, 32
%12 = or i32 %9, %11
br label %15
13: ; preds = %2
%14 = load i32, i32* %3
br label %15
15: ; preds = %13, %7
%16 = phi i32 [ %12, %7 ], [ %14, %13 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @combine_addr(i32 returned %0, i32 %1) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
int /*<<< orphan*/ wait(int /*<<< orphan*/);
int /*<<< orphan*/ write(int, char *, int);
int main(int argc, char *argv[]) {
  if (fork() == 0) {
    write(1, "child\n", 6);
  } else {
    wait(0);
    write(1, "parent\n", 7);
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1060 <fork@plt>
cmp    $0x0,%rax
jne    1182 <main+0x42>
mov    $0x1,%edi
lea    0xe8d(%rip),%rsi
mov    $0x6,%edx
call   1030 <write@plt>
jmp    119f <main+0x5f>
xor    %edi,%edi
call   1050 <wait@plt>
mov    $0x1,%edi
lea    0xe72(%rip),%rsi
mov    $0x7,%edx
call   1030 <write@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <fork@plt>
test   %rax,%rax
jne    115b <main+0x1b>
lea    0xeac(%rip),%rsi
mov    $0x6,%edx
jmp    116e <main+0x2e>
xor    %edi,%edi
call   1050 <wait@plt>
lea    0xe9e(%rip),%rsi
mov    $0x7,%edx
mov    $0x1,%edi
call   1030 <write@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"child\0A\00"
@.str.1 = [8 x i8] c"parent\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @fork()
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
br label %13
10: ; preds = %2
%11 = call i32 @wait(i32 0)
%12 = call i32 @write(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 7)
br label %13
13: ; preds = %10, %8
%14 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [7 x i8] c"child\0A\00"
@.str.1 = [8 x i8] c"parent\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @fork()
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @wait(i32 0)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 7, %5 ], [ 6, %2 ]
%9 = phi i8* [ getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), %5 ], [ getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), %2 ]
%10 = tail call i32 @write(i32 1, i8* %9, i32 %8)
%11 = tail call i32 @exit(i32 0)
unreachable
}
const char *zlibVersion(void) { return "1.1.4"; }


x86 assembly (clang, -O0):
<zlibVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlibVersion>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1.1.4\00"
define i8* @zlibVersion() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.1.4\00"
define i8* @zlibVersion() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
void INT_Excep_PERIA_INTA233(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIA_INTA233>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIA_INTA233>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIA_INTA233() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIA_INTA233() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _kill(int, int);
void _exit(int status) {
  _kill(status, -1);
  while (1) {
  }
}


x86 assembly (clang, -O0):
<_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xffffffff,%esi
call   1030 <_kill@plt>
jmp    1128 <_exit+0x18>

x86 assembly (clang, -O2):
<_exit>:
push   %rax
mov    $0xffffffff,%esi
call   1030 <_kill@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <_exit+0x10>

LLVM IR (-O0):
define void @_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_kill(i32 %3, i32 -1)
br label %5
5: ; preds = %1, %5
br label %5
}

LLVM IR (-O2):
define void @_exit(i32 %0) {
%2 = tail call i32 @_kill(i32 %0, i32 -1)
br label %3
3: ; preds = %1, %3
br label %3
}
__attribute__((no, noclone)) void baz(void) { asm volatile("" : : : "memory"); }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
ret

LLVM IR (-O0):
define void @baz() {
ret void
}

LLVM IR (-O2):
define void @baz() {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};

/* Variables and functions */
char *itm_epname4(struct sockaddr const *);
char *itm_ntop(int af, const struct sockaddr *remote) {
  return itm_epname4(remote);
}


x86 assembly (clang, -O0):
<itm_ntop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <itm_epname4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itm_ntop>:
mov    %rsi,%rdi
jmp    1030 <itm_epname4@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i8* @itm_ntop(i32 %0, %struct.sockaddr* %1) {
%3 = alloca i32
%4 = alloca %struct.sockaddr*
store i32 %0, i32* %3
store %struct.sockaddr* %1, %struct.sockaddr** %4
%5 = load %struct.sockaddr*, %struct.sockaddr** %4
%6 = call i8* @itm_epname4(%struct.sockaddr* %5)
ret i8* %6
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i8* @itm_ntop(i32 %0, %struct.sockaddr* %1) {
%3 = tail call i8* @itm_epname4(%struct.sockaddr* %1)
ret i8* %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t reverseBits(uint32_t n) {
  int i;
  uint32_t res = 0;
  for (i = 0; i < 32; i++) {
    res <<= 1;
    res |= n & 0x1;
    n >>= 1;
  }
  return res;
}


x86 assembly (clang, -O0):
<reverseBits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jge    114b <reverseBits+0x4b>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <reverseBits+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverseBits>:
xor    %eax,%eax
mov    $0x20,%ecx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
shl    $0x2,%edx
lea    (%rdx,%rax,8),%eax
mov    %edi,%edx
and    $0x2,%edx
or     %eax,%edx
mov    %edi,%eax
shr    $0x2,%eax
and    $0x1,%eax
or     %edx,%eax
mov    %edi,%edx
shr    $0x3,%edx
and    $0x1,%edx
lea    (%rdx,%rax,2),%eax
sar    $0x4,%edi
add    $0xfffffffc,%ecx
jne    1110 <reverseBits+0x10>
ret

LLVM IR (-O0):
define i32 @reverseBits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 32
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32, i32* %4
%10 = shl i32 %9, 1
store i32 %10, i32* %4
%11 = load i32, i32* %2
%12 = and i32 %11, 1
%13 = load i32, i32* %4
%14 = or i32 %13, %12
store i32 %14, i32* %4
%15 = load i32, i32* %2
%16 = ashr i32 %15, 1
store i32 %16, i32* %2
br label %17
17: ; preds = %8
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %5
20: ; preds = %5
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @reverseBits(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %18, %2 ]
%4 = phi i32 [ 0, %1 ], [ %20, %2 ]
%5 = phi i32 [ %0, %1 ], [ %19, %2 ]
%6 = shl i32 %3, 3
%7 = shl i32 %5, 2
%8 = and i32 %7, 4
%9 = or i32 %6, %8
%10 = and i32 %5, 2
%11 = or i32 %9, %10
%12 = lshr i32 %5, 2
%13 = and i32 %12, 1
%14 = or i32 %11, %13
%15 = lshr i32 %5, 3
%16 = shl i32 %14, 1
%17 = and i32 %15, 1
%18 = or i32 %16, %17
%19 = ashr i32 %5, 4
%20 = add nuw nsw i32 %4, 4
%21 = icmp eq i32 %20, 32
br i1 %21, label %22, label %2
22: ; preds = %2
ret i32 %18
}
char *null_explain_error(int error_code) {
  return "Null cipher has nothing to explain.";
}


x86 assembly (clang, -O0):
<null_explain_error>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_explain_error>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Null cipher has nothing to explain.\00"
define i8* @null_explain_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [36 x i8] c"Null cipher has nothing to explain.\00"
define i8* @null_explain_error(i32 %0) {
ret i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0)
}
void emvpn_ipconf(struct emvpn_socket *sck, void *data, int len) {}


x86 assembly (clang, -O0):
<emvpn_ipconf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<emvpn_ipconf>:
ret

LLVM IR (-O0):
%struct.emvpn_socket = type opaque
define void @emvpn_ipconf(%struct.emvpn_socket* %0, i8* %1, i32 %2) {
%4 = alloca %struct.emvpn_socket*
%5 = alloca i8*
%6 = alloca i32
store %struct.emvpn_socket* %0, %struct.emvpn_socket** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.emvpn_socket = type opaque
define void @emvpn_ipconf(%struct.emvpn_socket* nocapture %0, i8* nocapture %1, i32 %2) {
ret void
}
void display_conf_warnings_txt(void) {}


x86 assembly (clang, -O0):
<display_conf_warnings_txt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_conf_warnings_txt>:
ret

LLVM IR (-O0):
define void @display_conf_warnings_txt() {
ret void
}

LLVM IR (-O2):
define void @display_conf_warnings_txt() {
ret void
}
/* Variables and functions */
int mcfioC_NTupleVar(int, int, int, char *);
int mcfio_ntuplevar_(int *stream, int *ntupleid, int *ivar, char *version,
                     int ll) {
  int ivarF;
  ivarF = (*ivar) - 1;
  return mcfioC_NTupleVar(*stream, *ntupleid, ivarF, version);
}


x86 assembly (clang, -O0):
<mcfio_ntuplevar_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
sub    $0x1,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x28(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1030 <mcfioC_NTupleVar@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcfio_ntuplevar_>:
mov    (%rdx),%edx
add    $0xffffffff,%edx
mov    (%rdi),%edi
mov    (%rsi),%esi
jmp    1030 <mcfioC_NTupleVar@plt>

LLVM IR (-O0):
define i32 @mcfio_ntuplevar_(i32* %0, i32* %1, i32* %2, i8* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%12 = load i32*, i32** %8
%13 = load i32, i32* %12
%14 = sub nsw i32 %13, 1
store i32 %14, i32* %11
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = load i32*, i32** %7
%18 = load i32, i32* %17
%19 = load i32, i32* %11
%20 = load i8*, i8** %9
%21 = call i32 @mcfioC_NTupleVar(i32 %16, i32 %18, i32 %19, i8* %20)
ret i32 %21
}

LLVM IR (-O2):
define i32 @mcfio_ntuplevar_(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2, i8* %3, i32 %4) {
%6 = load i32, i32* %2
%7 = add nsw i32 %6, -1
%8 = load i32, i32* %0
%9 = load i32, i32* %1
%10 = tail call i32 @mcfioC_NTupleVar(i32 %8, i32 %9, i32 %7, i8* %3)
ret i32 %10
}
int *initializeArray(int *array, int n) {
  int i = 0;
  for (i = 0; i < n; i++) {
    array[i] = -1;
  }
  return array;
}


x86 assembly (clang, -O0):
<initializeArray>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1142 <initializeArray+0x42>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movl   $0xffffffff,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1119 <initializeArray+0x19>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializeArray>:
push   %rbx
mov    %rdi,%rbx
test   %esi,%esi
jle    112b <initializeArray+0x1b>
mov    %esi,%edx
shl    $0x2,%rdx
mov    %rbx,%rdi
mov    $0xff,%esi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32* @initializeArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 -1, i32* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
%19 = load i32*, i32** %3
ret i32* %19
}

LLVM IR (-O2):
define i32* @initializeArray(i32* returned writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast i32* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 2
br label %8
8: ; preds = %4, %2
ret i32* %0
}
int *shmget(int zone) {
  switch (zone) {
  case 0:
    break;
  }
}


x86 assembly (clang, -O0):
<shmget>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
test   %eax,%eax
jne    111c <shmget+0x1c>
jmp    1117 <shmget+0x17>
jmp    111c <shmget+0x1c>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmget>:
ret

LLVM IR (-O0):
define i32* @shmget(i32 %0) {
%2 = alloca i32*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 0, label %5
]
5: ; preds = %1
br label %6
6: ; preds = %1, %5
%7 = load i32*, i32** %2
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @shmget(i32 %0) {
ret i32* undef
}
/* Type definitions */
typedef int /*<<< orphan*/ asn1_ps_func;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ BIO_C_GET_PREFIX;
int asn1_bio_get_ex(int /*<<< orphan*/ *, int /*<<< orphan*/,
                    int /*<<< orphan*/ **, int /*<<< orphan*/ **);
int BIO_asn1_get_prefix(BIO *b, asn1_ps_func **pprefix,
                        asn1_ps_func **pprefix_free) {
  return asn1_bio_get_ex(b, BIO_C_GET_PREFIX, pprefix, pprefix_free);
}


x86 assembly (clang, -O0):
<BIO_asn1_get_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <asn1_bio_get_ex@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_asn1_get_prefix>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
jmp    1030 <asn1_bio_get_ex@plt>

LLVM IR (-O0):
@BIO_C_GET_PREFIX = global i32 0
define i32 @BIO_asn1_get_prefix(i32* %0, i32** %1, i32** %2) {
%4 = alloca i32*
%5 = alloca i32**
%6 = alloca i32**
store i32* %0, i32** %4
store i32** %1, i32*** %5
store i32** %2, i32*** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* @BIO_C_GET_PREFIX
%9 = load i32**, i32*** %5
%10 = load i32**, i32*** %6
%11 = call i32 @asn1_bio_get_ex(i32* %7, i32 %8, i32** %9, i32** %10)
ret i32 %11
}

LLVM IR (-O2):
@BIO_C_GET_PREFIX = global i32 0
define i32 @BIO_asn1_get_prefix(i32* %0, i32** %1, i32** %2) {
%4 = load i32, i32* @BIO_C_GET_PREFIX
%5 = tail call i32 @asn1_bio_get_ex(i32* %0, i32 %4, i32** %1, i32** %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ MN_DrTextB(char *, int, int);
void DrawSkillMenu(void) { MN_DrTextB("CHOOSE SKILL LEVEL:", 74, 16); }


x86 assembly (clang, -O0):
<DrawSkillMenu>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x4a,%esi
mov    $0x10,%edx
call   1030 <MN_DrTextB@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DrawSkillMenu>:
lea    0xee9(%rip),%rdi
mov    $0x4a,%esi
mov    $0x10,%edx
jmp    1030 <MN_DrTextB@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"CHOOSE SKILL LEVEL:\00"
define void @DrawSkillMenu() {
%1 = call i32 @MN_DrTextB(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 74, i32 16)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"CHOOSE SKILL LEVEL:\00"
define void @DrawSkillMenu() {
%1 = tail call i32 @MN_DrTextB(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 74, i32 16)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ print_reverse(char *);
int /*<<< orphan*/ stdin;
int strlen(char *);
int main() {
  char str[20];
  fgets(str, 20, stdin);
  str[strlen(str) - 1] = '\0';
  print_reverse(str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x20(%rbp),%rdi
mov    0x2e9e(%rip),%rax
mov    (%rax),%edx
mov    $0x14,%esi
call   1040 <fgets@plt>
lea    -0x20(%rbp),%rdi
call   1030 <strlen@plt>
sub    $0x1,%eax
cltq
movb   $0x0,-0x20(%rbp,%rax,1)
lea    -0x20(%rbp),%rdi
call   1050 <print_reverse@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0x2eac(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x14,%esi
call   1040 <fgets@plt>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
mov    %rbx,%rdi
call   1050 <print_reverse@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca [20 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @stdin
%5 = call i32 @fgets(i8* %3, i32 20, i32 %4)
%6 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%7 = call i32 @strlen(i8* %6)
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 %9
store i8 0, i8* %10
%11 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%12 = call i32 @print_reverse(i8* %11)
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @main() {
%1 = alloca [20 x i8]
%2 = getelementptr inbounds [20 x i8], [20 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i32 @fgets(i8* %2, i32 20, i32 %3)
%5 = call i32 @strlen(i8* %2)
%6 = add nsw i32 %5, -1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [20 x i8], [20 x i8]* %1, i64 0, i64 %7
store i8 0, i8* %8
%9 = call i32 @print_reverse(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
gneg() { ol("neg.l\t%d0"); }


x86 assembly (clang, -O0):
<gneg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ol@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gneg>:
lea    0xee9(%rip),%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"neg.l\09%d0\00"
define i32 @gneg() {
%1 = alloca i32
%2 = call i32 @ol(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [10 x i8] c"neg.l\09%d0\00"
define i32 @gneg() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
void doexaf(void) { ol("ex\taf,af"); }


x86 assembly (clang, -O0):
<doexaf>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <ol@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doexaf>:
lea    0xee9(%rip),%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"ex\09af,af\00"
define void @doexaf() {
%1 = call i32 @ol(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"ex\09af,af\00"
define void @doexaf() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
void array_delete(char *arr[], size_t begin, size_t del_amount) {
  size_t j = begin + del_amount;
  while ((arr[begin++] = arr[j++]) != NULL)
    ;
}


x86 assembly (clang, -O0):
<array_delete>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    (%rax,%rcx,8),%rax
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rdx
mov    %rdx,%rsi
add    $0x1,%rsi
mov    %rsi,-0x10(%rbp)
mov    %rax,(%rcx,%rdx,8)
cmp    $0x0,%rax
je     1159 <array_delete+0x59>
jmp    111c <array_delete+0x1c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_delete>:
add    %rsi,%rdx
lea    (%rdi,%rsi,8),%rax
lea    (%rdi,%rdx,8),%rcx
nopl   0x0(%rax,%rax,1)
mov    (%rcx),%rdx
mov    %rdx,(%rax)
add    $0x8,%rax
add    $0x8,%rcx
test   %rdx,%rdx
jne    1110 <array_delete+0x10>
ret

LLVM IR (-O0):
define void @array_delete(i8** %0, i64 %1, i64 %2) {
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i8** %0, i8*** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = add i64 %8, %9
store i64 %10, i64* %7
br label %11
11: ; preds = %22, %3
%12 = load i8**, i8*** %4
%13 = load i64, i64* %7
%14 = add i64 %13, 1
store i64 %14, i64* %7
%15 = getelementptr inbounds i8*, i8** %12, i64 %13
%16 = load i8*, i8** %15
%17 = load i8**, i8*** %4
%18 = load i64, i64* %5
%19 = add i64 %18, 1
store i64 %19, i64* %5
%20 = getelementptr inbounds i8*, i8** %17, i64 %18
store i8* %16, i8** %20
%21 = icmp ne i8* %16, null
br i1 %21, label %22, label %23
22: ; preds = %11
br label %11
23: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @array_delete(i8** nocapture %0, i64 %1, i64 %2) {
%4 = add i64 %2, %1
br label %5
5: ; preds = %5, %3
%6 = phi i64 [ %1, %3 ], [ %11, %5 ]
%7 = phi i64 [ %4, %3 ], [ %8, %5 ]
%8 = add i64 %7, 1
%9 = getelementptr inbounds i8*, i8** %0, i64 %7
%10 = load i8*, i8** %9
%11 = add i64 %6, 1
%12 = getelementptr inbounds i8*, i8** %0, i64 %6
store i8* %10, i8** %12
%13 = icmp eq i8* %10, null
br i1 %13, label %14, label %5
14: ; preds = %5
ret void
}
const char *ls_cost_nm4_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<ls_cost_nm4_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <ls_cost_nm4_name_out+0x2b>
jmp    111a <ls_cost_nm4_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <ls_cost_nm4_name_out+0x3b>
jmp    114b <ls_cost_nm4_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <ls_cost_nm4_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <ls_cost_nm4_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm4_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @ls_cost_nm4_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @ls_cost_nm4_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x53() {
  Assert_real((isbdigit(83) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              420, ("isbdigit should be 0 for S"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x53>:
push   %rbp
mov    %rsp,%rbp
mov    $0x53,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1a4,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x53>:
push   %rax
mov    $0x53,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x1a4,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for S\00"
define void @t_isbdigit_0x53() {
%1 = call i64 @isbdigit(i32 83)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for S\00"
define void @t_isbdigit_0x53() {
%1 = tail call i64 @isbdigit(i32 83)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned clear_pre(unsigned nr, unsigned short n) { return nr << n >> n; }


x86 assembly (clang, -O0):
<clear_pre>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
movzwl -0x6(%rbp),%ecx
shl    %cl,%eax
movzwl -0x6(%rbp),%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_pre>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @clear_pre(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i32, i32* %3
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = shl i32 %5, %7
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = lshr i32 %8, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @clear_pre(i32 %0, i16 zeroext %1) {
%3 = zext i16 %1 to i32
%4 = lshr i32 -1, %3
%5 = and i32 %4, %0
ret i32 %5
}
int popcount3(unsigned *lista, int len) {
  int i, result = 0;
  unsigned x;
  for (i = 0; i < len; i++) {
    x = lista[i];
    asm("\n"
        "ini3:                      \n\t"
        "shr %[x]           \n\t"
        "adc $0,%[r]        \n\t"
        "test %[x],%[x]     \n\t"
        "jnz ini3           \n\t"
        : [r] "+r"(result)
        : [x] "r"(x));
  }
  return result;
}


x86 assembly (clang, -O0):
<popcount3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1157 <ini3+0x1e>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ecx

x86 assembly (clang, -O2):
<popcount3>:
test   %esi,%esi
jle    1126 <ini3+0x13>
mov    %esi,%ecx
xor    %edx,%edx
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
mov    (%rdi,%rdx,4),%esi

LLVM IR (-O0):
define i32 @popcount3(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %6
store i32 0, i32* %5
br label %8
8: ; preds = %21, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i32*, i32** %3
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
store i32 %17, i32* %7
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = call i32 asm "\0Aini3: \0A\09shr $1 \0A\09adc $$0,$0 \0A\09test $1,$1 \0A\09jnz ini3 \0A\09", "=r,r,0,~{dirflag},~{fpsr},~{flags}"(i32 %19, i32 %18)
store i32 %20, i32* %6
br label %21
21: ; preds = %12
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %8
24: ; preds = %8
%25 = load i32, i32* %6
ret i32 %25
}

LLVM IR (-O2):
define i32 @popcount3(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = phi i32 [ 0, %4 ], [ %11, %6 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %7
%10 = load i32, i32* %9
%11 = tail call i32 asm "\0Aini3: \0A\09shr $1 \0A\09adc $$0,$0 \0A\09test $1,$1 \0A\09jnz ini3 \0A\09", "=r,r,0,~{dirflag},~{fpsr},~{flags}"(i32 %10, i32 %8)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
%15 = phi i32 [ 0, %2 ], [ %11, %6 ]
ret i32 %15
}
/* Type definitions */
struct statvfs64 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __fstatvfs64(int fd, struct statvfs64 *buf) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__fstatvfs64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fstatvfs64>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.statvfs64 = type { i32 }
@ENOSYS = global i32 0
define i32 @__fstatvfs64(i32 %0, %struct.statvfs64* %1) {
%3 = alloca i32
%4 = alloca %struct.statvfs64*
store i32 %0, i32* %3
store %struct.statvfs64* %1, %struct.statvfs64** %4
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret i32 -1
}

LLVM IR (-O2):
%struct.statvfs64 = type { i32 }
@ENOSYS = global i32 0
define i32 @__fstatvfs64(i32 %0, %struct.statvfs64* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
%4 = tail call i32 @__set_errno(i32 %3)
ret i32 -1
}