xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ FixSampleRate(char *);
int main(int argc, char *argv[]) {
  for (int i = 1; i < argc; i++) {
    FixSampleRate(argv[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1158 <main+0x48>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <FixSampleRate@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%edi
jl     1142 <main+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14,%rbx,8),%rdi
call   1030 <FixSampleRate@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %18, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @FixSampleRate(i8* %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %7
21: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %7
6: ; preds = %7, %2
ret i32 0
7: ; preds = %4, %7
%8 = phi i64 [ 1, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i32 @FixSampleRate(i8* %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
int /*<<< orphan*/ na_list_nodes();
bool list_command(void) {
  na_list_nodes();
  return true;
}


x86 assembly (clang, -O0):
<list_command>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <na_list_nodes@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_command>:
push   %rax
xor    %eax,%eax
call   1030 <na_list_nodes@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @list_command() {
%1 = call i32 (...) @na_list_nodes()
ret i32 1
}

LLVM IR (-O2):
define i32 @list_command() {
%1 = tail call i32 (...) @na_list_nodes()
ret i32 1
}
void ft_strclr(char *src) {
  int i;
  i = 0;
  if (src) {
    while (src[i]) {
      src[i] = 0;
      i++;
    }
  }
}


x86 assembly (clang, -O0):
<ft_strclr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1150 <ft_strclr+0x50>
jmp    111f <ft_strclr+0x1f>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     114b <ft_strclr+0x4b>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <ft_strclr+0x1f>
jmp    1150 <ft_strclr+0x50>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strclr>:
test   %rdi,%rdi
je     111d <ft_strclr+0x1d>
cmpb   $0x0,(%rdi)
je     111d <ft_strclr+0x1d>
add    $0x1,%rdi
xchg   %ax,%ax
movb   $0x0,-0x1(%rdi)
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <ft_strclr+0x10>
ret

LLVM IR (-O0):
define void @ft_strclr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %22
6: ; preds = %1
br label %7
7: ; preds = %14, %6
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %21
14: ; preds = %7
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 0, i8* %18
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %7
21: ; preds = %7
br label %22
22: ; preds = %21, %1
ret void
}

LLVM IR (-O2):
define void @ft_strclr(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %9, %6 ], [ 0, %3 ]
%8 = phi i8* [ %10, %6 ], [ %0, %3 ]
store i8 0, i8* %8
%9 = add nuw nsw i64 %7, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %6
13: ; preds = %6, %3, %1
ret void
}
void sh_bios_vbr_init(void) {}


x86 assembly (clang, -O0):
<sh_bios_vbr_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sh_bios_vbr_init>:
ret

LLVM IR (-O0):
define void @sh_bios_vbr_init() {
ret void
}

LLVM IR (-O2):
define void @sh_bios_vbr_init() {
ret void
}
long long unsigned int mul16(long long unsigned int value) {
  return value << 4;
}


x86 assembly (clang, -O0):
<mul16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x4,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul16>:
mov    %rdi,%rax
shl    $0x4,%rax
ret

LLVM IR (-O0):
define i64 @mul16(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 4
ret i64 %4
}

LLVM IR (-O2):
define i64 @mul16(i64 %0) {
%2 = shl i64 %0, 4
ret i64 %2
}
void cprop_test4(int *data) {
  int j = 12345;
  if (data[0])
    data[1] = 1 + j - 1234;
  else
    data[2] = 123 - j + 10;
}


x86 assembly (clang, -O0):
<cprop_test4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x3039,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
je     1134 <cprop_test4+0x34>
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
sub    $0x4d2,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
jmp    1146 <cprop_test4+0x46>
mov    $0x7b,%ecx
sub    -0xc(%rbp),%ecx
add    $0xa,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cprop_test4>:
xor    %eax,%eax
cmpl   $0x0,(%rdi)
sete   %al
mov    $0xffffd04c,%ecx
mov    $0x2b68,%edx
cmove  %ecx,%edx
mov    %edx,0x4(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @cprop_test4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 12345, i32* %3
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i32, i32* %3
%10 = add nsw i32 1, %9
%11 = sub nsw i32 %10, 1234
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 1
store i32 %11, i32* %13
br label %20
14: ; preds = %1
%15 = load i32, i32* %3
%16 = sub nsw i32 123, %15
%17 = add nsw i32 %16, 10
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i64 2
store i32 %17, i32* %19
br label %20
20: ; preds = %14, %8
ret void
}

LLVM IR (-O2):
define void @cprop_test4(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i64 2, i64 1
%5 = select i1 %3, i32 -12212, i32 11112
%6 = getelementptr inbounds i32, i32* %0, i64 %4
store i32 %5, i32* %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
long int sizeofFragment() {
  return 9 * sizeof(uint64_t) + 2 * sizeof(int64_t) + 1 * sizeof(float) +
         1 * sizeof(char);
}


x86 assembly (clang, -O0):
<sizeofFragment>:
push   %rbp
mov    %rsp,%rbp
mov    $0x31,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeofFragment>:
mov    $0x31,%eax
ret

LLVM IR (-O0):
define i64 @sizeofFragment() {
ret i64 49
}

LLVM IR (-O2):
define i64 @sizeofFragment() {
ret i64 49
}
int test_imm_E9uint8_reg(unsigned char val) {
  return ((val) & (0xE9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E9uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xe9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E9uint8_reg>:
test   $0xe9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E9uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 233
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E9uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -23
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int checkCPU() {
  union w {
    int a;
    char b;
  } c;
  c.a = 1;
  return (c.b == 1);
}


x86 assembly (clang, -O0):
<checkCPU>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
movsbl -0x8(%rbp),%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkCPU>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.w = type { i32 }
define i32 @checkCPU() {
%1 = alloca %union.w
%2 = bitcast %union.w* %1 to i32*
store i32 1, i32* %2
%3 = bitcast %union.w* %1 to i8*
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @checkCPU() {
ret i32 1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  long tv_sec;
};
struct itimerval {
  TYPE_1__ it_value;
};

/* Variables and functions */
void _set_itimerval_value_tvsec(struct itimerval *timer, long tv_sec) {
  timer->it_value.tv_sec = tv_sec;
}


x86 assembly (clang, -O0):
<_set_itimerval_value_tvsec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_set_itimerval_value_tvsec>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.itimerval = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
define void @_set_itimerval_value_tvsec(%struct.itimerval* %0, i64 %1) {
%3 = alloca %struct.itimerval*
%4 = alloca i64
store %struct.itimerval* %0, %struct.itimerval** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load %struct.itimerval*, %struct.itimerval** %3
%7 = getelementptr inbounds %struct.itimerval, %struct.itimerval* %6, i32 0, i32 0
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
%struct.itimerval = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
define void @_set_itimerval_value_tvsec(%struct.itimerval* nocapture writeonly %0, i64 %1) {
%3 = getelementptr inbounds %struct.itimerval, %struct.itimerval* %0, i64 0, i32 0, i32 0
store i64 %1, i64* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ magic_index_aux(int *, size_t, int /*<<< orphan*/, size_t);
ssize_t magic_index(int arr[], size_t arr_sz) {
  return magic_index_aux(arr, arr_sz, 0, arr_sz - 1);
}


x86 assembly (clang, -O0):
<magic_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
xor    %edx,%edx
call   1030 <magic_index_aux@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magic_index>:
lea    -0x1(%rsi),%rcx
xor    %edx,%edx
jmp    1030 <magic_index_aux@plt>

LLVM IR (-O0):
define i32 @magic_index(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = load i64, i64* %4
%8 = sub i64 %7, 1
%9 = call i32 @magic_index_aux(i32* %5, i64 %6, i32 0, i64 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @magic_index(i32* %0, i64 %1) {
%3 = add i64 %1, -1
%4 = tail call i32 @magic_index_aux(i32* %0, i64 %1, i32 0, i64 %3)
ret i32 %4
}
/* Type definitions */
struct iovec {
  int dummy;
};
struct io_uring_sqe {
  int dummy;
};
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ io_uring_prep_rw(int, struct io_uring_sqe *, int,
                                    struct iovec *, unsigned int,
                                    int /*<<< orphan*/);
void io_uring_prep_readv(struct io_uring_sqe *sqe, int fd, struct iovec *iovecs,
                         unsigned nr_vecs, off_t offset) {
  io_uring_prep_rw(1, sqe, fd, iovecs, nr_vecs, offset);
}


x86 assembly (clang, -O0):
<io_uring_prep_readv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x20(%rbp),%r9d
mov    $0x1,%edi
call   1030 <io_uring_prep_rw@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_uring_prep_readv>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <io_uring_prep_rw@plt>

LLVM IR (-O0):
%struct.io_uring_sqe = type { i32 }
%struct.iovec = type { i32 }
define void @io_uring_prep_readv(%struct.io_uring_sqe* %0, i32 %1, %struct.iovec* %2, i32 %3, i32 %4) {
%6 = alloca %struct.io_uring_sqe*
%7 = alloca i32
%8 = alloca %struct.iovec*
%9 = alloca i32
%10 = alloca i32
store %struct.io_uring_sqe* %0, %struct.io_uring_sqe** %6
store i32 %1, i32* %7
store %struct.iovec* %2, %struct.iovec** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.io_uring_sqe*, %struct.io_uring_sqe** %6
%12 = load i32, i32* %7
%13 = load %struct.iovec*, %struct.iovec** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @io_uring_prep_rw(i32 1, %struct.io_uring_sqe* %11, i32 %12, %struct.iovec* %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
%struct.io_uring_sqe = type { i32 }
%struct.iovec = type { i32 }
define void @io_uring_prep_readv(%struct.io_uring_sqe* %0, i32 %1, %struct.iovec* %2, i32 %3, i32 %4) {
%6 = tail call i32 @io_uring_prep_rw(i32 1, %struct.io_uring_sqe* %0, i32 %1, %struct.iovec* %2, i32 %3, i32 %4)
ret void
}
void g_thread_init_with_errorcheck_mutexes() {}


x86 assembly (clang, -O0):
<g_thread_init_with_errorcheck_mutexes>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_thread_init_with_errorcheck_mutexes>:
ret

LLVM IR (-O0):
define void @g_thread_init_with_errorcheck_mutexes() {
ret void
}

LLVM IR (-O2):
define void @g_thread_init_with_errorcheck_mutexes() {
ret void
}
long t5(long a, long b) {
  printf("%s: a: %ld\n", __func__, a);
  printf("%s: b: %ld\n", __func__, b);
  return a + b;
}


x86 assembly (clang, -O0):
<t5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed5(%rip),%rdi
lea    0xeda(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdx
lea    0xecb(%rip),%rdi
lea    0xec1(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t5>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0xede(%rip),%rdi
lea    0xee3(%rip),%r15
mov    %r15,%rsi
mov    %r14,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed2(%rip),%rdi
mov    %r15,%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
add    %r14,%rbx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%s: a: %ld\0A\00"
@__func__.t5 = [3 x i8] c"t5\00"
@.str.1 = [12 x i8] c"%s: b: %ld\0A\00"
define i64 @t5(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @__func__.t5, i64 0, i64 0), i64 %5)
%7 = load i64, i64* %4
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @__func__.t5, i64 0, i64 0), i64 %7)
%9 = load i64, i64* %3
%10 = load i64, i64* %4
%11 = add nsw i64 %9, %10
ret i64 %11
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s: a: %ld\0A\00"
@__func__.t5 = [3 x i8] c"t5\00"
@.str.1 = [12 x i8] c"%s: b: %ld\0A\00"
define i64 @t5(i64 %0, i64 %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @__func__.t5, i64 0, i64 0), i64 %0)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @__func__.t5, i64 0, i64 0), i64 %1)
%5 = add nsw i64 %1, %0
ret i64 %5
}
/* Variables and functions */
size_t strnlen(const char *str, size_t size) {
  size_t i = 0;
  while (*str++ != 0 && size-- > 0)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x19(%rbp)
je     114d <strnlen+0x4d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
cmp    $0x0,%rax
seta   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    115d <strnlen+0x5d>
jmp    116e <strnlen+0x6e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strnlen+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen>:
xor    %eax,%eax
cmpb   $0x0,(%rdi)
je     1133 <strnlen+0x33>
test   %rsi,%rsi
je     1133 <strnlen+0x33>
add    $0xffffffffffffffff,%rsi
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
je     1133 <strnlen+0x33>
cmp    %rcx,%rsi
mov    %rax,%rcx
jne    1120 <strnlen+0x20>
ret

LLVM IR (-O0):
define i64 @strnlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %6
%13 = load i64, i64* %4
%14 = add i64 %13, -1
store i64 %14, i64* %4
%15 = icmp ugt i64 %13, 0
br label %16
16: ; preds = %12, %6
%17 = phi i1 [ false, %6 ], [ %15, %12 ]
br i1 %17, label %18, label %21
18: ; preds = %16
%19 = load i64, i64* %5
%20 = add i64 %19, 1
store i64 %20, i64* %5
br label %6
21: ; preds = %16
%22 = load i64, i64* %5
ret i64 %22
}

LLVM IR (-O2):
define i64 @strnlen(i8* nocapture %0, i64 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
%5 = icmp eq i64 %1, 0
%6 = or i1 %4, %5
br i1 %6, label %18, label %7
7: ; preds = %2, %7
%8 = phi i64 [ %13, %7 ], [ 0, %2 ]
%9 = phi i64 [ %12, %7 ], [ %1, %2 ]
%10 = phi i8* [ %11, %7 ], [ %0, %2 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = add i64 %9, -1
%13 = add nuw i64 %8, 1
%14 = load i8, i8* %11
%15 = icmp eq i8 %14, 0
%16 = icmp eq i64 %12, 0
%17 = select i1 %15, i1 true, i1 %16
br i1 %17, label %18, label %7
18: ; preds = %7, %2
%19 = phi i64 [ 0, %2 ], [ %13, %7 ]
ret i64 %19
}
/* Variables and functions */
int /*<<< orphan*/ position();
int main() {
  position();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <position@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <position@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @position()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @position()
ret i32 0
}
int setuid(int id) { return 0; }


x86 assembly (clang, -O0):
<setuid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @setuid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @setuid(i32 %0) {
ret i32 0
}
/* Variables and functions */
int count_bits(int const);
int bitcount_compar(const void *A, const void *B) {
  const int *a = A;
  const int *b = B;
  return count_bits(*a) - count_bits(*b);
}


x86 assembly (clang, -O0):
<bitcount_compar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
call   1030 <count_bits@plt>
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%edi
call   1030 <count_bits@plt>
mov    %eax,%ecx
mov    -0x24(%rbp),%eax
sub    %ecx,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount_compar>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    (%rdi),%edi
call   1030 <count_bits@plt>
mov    %eax,%ebp
mov    (%rbx),%edi
call   1030 <count_bits@plt>
sub    %eax,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bitcount_compar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = call i32 @count_bits(i32 %12)
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = call i32 @count_bits(i32 %15)
%17 = sub nsw i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @bitcount_compar(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = tail call i32 @count_bits(i32 %5)
%7 = load i32, i32* %4
%8 = tail call i32 @count_bits(i32 %7)
%9 = sub nsw i32 %6, %8
ret i32 %9
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_write_cmd(struct flashrom_flashctx *, int, int, unsigned int,
                  int /*<<< orphan*/ *, int /*<<< orphan*/, int);
int spi_block_erase_21(struct flashrom_flashctx *flash, unsigned int addr,
                       unsigned int blocklen) {
  return spi_write_cmd(flash, 0x21, true, addr, NULL, 0, 10 * 1000);
}


x86 assembly (clang, -O0):
<spi_block_erase_21>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x21,%esi
mov    $0x1,%edx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
movl   $0x2710,(%rsp)
call   1030 <spi_write_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_block_erase_21>:
push   %rax
mov    %esi,%ecx
movl   $0x2710,(%rsp)
mov    $0x21,%esi
mov    $0x1,%edx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <spi_write_cmd@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_block_erase_21(%struct.flashrom_flashctx* %0, i32 %1, i32 %2) {
%4 = alloca %struct.flashrom_flashctx*
%5 = alloca i32
%6 = alloca i32
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %4
%8 = load i32, i32* %5
%9 = call i32 @spi_write_cmd(%struct.flashrom_flashctx* %7, i32 33, i32 1, i32 %8, i32* null, i32 0, i32 10000)
ret i32 %9
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_block_erase_21(%struct.flashrom_flashctx* %0, i32 %1, i32 %2) {
%4 = tail call i32 @spi_write_cmd(%struct.flashrom_flashctx* %0, i32 33, i32 1, i32 %1, i32* null, i32 0, i32 10000)
ret i32 %4
}
int ary_cb_cmplong(const void *a, const void *b) {
  long x = *(const long *)a, y = *(const long *)b;
  return x > y ? 1 : x < y ? -1 : 0;
}


x86 assembly (clang, -O0):
<ary_cb_cmplong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jle    113d <ary_cb_cmplong+0x3d>
mov    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1155 <ary_cb_cmplong+0x55>
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rsi
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    %rsi,%rdx
cmovl  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ary_cb_cmplong>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    %rcx,%rax
setl   %dl
neg    %edx
cmp    %rcx,%rax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @ary_cb_cmplong(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
store i64 %9, i64* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %6
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i64, i64* %5
%19 = load i64, i64* %6
%20 = icmp slt i64 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @ary_cb_cmplong(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = icmp slt i64 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
int ccnl_lrpc_fieldlen(unsigned long val) {
  if (val < 253)
    return 1;
  if (val <= 0x0ffff)
    return 3;
  if (val <= 0xffffffffL)
    return 5;
  return 9;
}


x86 assembly (clang, -O0):
<ccnl_lrpc_fieldlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0xfd,-0x10(%rbp)
jae    1122 <ccnl_lrpc_fieldlen+0x22>
movl   $0x1,-0x4(%rbp)
jmp    115e <ccnl_lrpc_fieldlen+0x5e>
cmpq   $0xffff,-0x10(%rbp)
ja     113c <ccnl_lrpc_fieldlen+0x3c>
movl   $0x3,-0x4(%rbp)
jmp    115e <ccnl_lrpc_fieldlen+0x5e>
mov    $0xffffffff,%eax
cmp    %rax,-0x10(%rbp)
ja     1157 <ccnl_lrpc_fieldlen+0x57>
movl   $0x5,-0x4(%rbp)
jmp    115e <ccnl_lrpc_fieldlen+0x5e>
movl   $0x9,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnl_lrpc_fieldlen>:
mov    $0x1,%eax
cmp    $0xfd,%rdi
jb     112c <ccnl_lrpc_fieldlen+0x2c>
mov    $0x3,%eax
cmp    $0x10000,%rdi
jb     112c <ccnl_lrpc_fieldlen+0x2c>
xor    %eax,%eax
shr    $0x20,%rdi
setne  %al
lea    0x5(,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @ccnl_lrpc_fieldlen(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ult i64 %4, 253
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %16
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp ule i64 %8, 65535
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 3, i32* %2
br label %16
11: ; preds = %7
%12 = load i64, i64* %3
%13 = icmp ule i64 %12, 4294967295
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 5, i32* %2
br label %16
15: ; preds = %11
store i32 9, i32* %2
br label %16
16: ; preds = %15, %14, %10, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @ccnl_lrpc_fieldlen(i64 %0) {
%2 = icmp ult i64 %0, 253
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 65536
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i64 %0, 4294967296
%7 = select i1 %6, i32 5, i32 9
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 1, %1 ], [ 3, %3 ], [ %7, %5 ]
ret i32 %9
}
void nand_cmd(unsigned char cmd) {
  volatile int i;
  (*(volatile unsigned char *)0x4E000008) = cmd;
  for (i = 0; i < 10; i++)
    ;
}


x86 assembly (clang, -O0):
<nand_cmd>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%cl
mov    $0x4e000008,%eax
mov    %cl,(%rax)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    $0xa,%eax
jge    113a <nand_cmd+0x3a>
jmp    112c <nand_cmd+0x2c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111b <nand_cmd+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_cmd>:
mov    %dil,0x4e000008
4e
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x9,%eax
jg     112e <nand_cmd+0x2e>
nopl   0x0(%rax)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0xa,%eax
jl     1120 <nand_cmd+0x20>
ret

LLVM IR (-O0):
define void @nand_cmd(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
store volatile i8 %4, i8* inttoptr (i64 1308622856 to i8*)
store volatile i32 0, i32* %3
br label %5
5: ; preds = %9, %1
%6 = load volatile i32, i32* %3
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %12
8: ; preds = %5
br label %9
9: ; preds = %8
%10 = load volatile i32, i32* %3
%11 = add nsw i32 %10, 1
store volatile i32 %11, i32* %3
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @nand_cmd(i8 zeroext %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store volatile i8 %0, i8* inttoptr (i64 1308622856 to i8*)
store volatile i32 0, i32* %2
%4 = load volatile i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %11
6: ; preds = %1, %6
%7 = load volatile i32, i32* %2
%8 = add nsw i32 %7, 1
store volatile i32 %8, i32* %2
%9 = load volatile i32, i32* %2
%10 = icmp slt i32 %9, 10
br i1 %10, label %6, label %11
11: ; preds = %6, %1
ret void
}
/* Variables and functions */
int strcmp(char const *, char const *);
int compare_string_ptrs_(const void **_a, const void **_b) {
  return strcmp((const char *)*_a, (const char *)*_b);
}


x86 assembly (clang, -O0):
<compare_string_ptrs_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_string_ptrs_>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare_string_ptrs_(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = call i32 @strcmp(i8* %6, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @compare_string_ptrs_(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
%5 = tail call i32 @strcmp(i8* dereferenceable(1) %3, i8* dereferenceable(1) %4)
ret i32 %5
}
/* Variables and functions */
int inportb(int);
void keyboard_init() {
  while (inportb(0x64) & 1)
    inportb(0x60);
}


x86 assembly (clang, -O0):
<keyboard_init>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <keyboard_init+0x9>
mov    $0x64,%edi
call   1030 <inportb@plt>
and    $0x1,%eax
cmp    $0x0,%eax
je     113e <keyboard_init+0x2e>
mov    $0x60,%edi
call   1030 <inportb@plt>
jmp    1119 <keyboard_init+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyboard_init>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x64,%edi
call   1030 <inportb@plt>
test   $0x1,%al
je     113a <keyboard_init+0x2a>
mov    $0x60,%edi
call   1030 <inportb@plt>
jmp    1120 <keyboard_init+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @keyboard_init() {
br label %1
1: ; preds = %5, %0
%2 = call i32 @inportb(i32 100)
%3 = and i32 %2, 1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @inportb(i32 96)
br label %1
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @keyboard_init() {
%1 = tail call i32 @inportb(i32 100)
%2 = and i32 %1, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %0, %4
%5 = tail call i32 @inportb(i32 96)
%6 = tail call i32 @inportb(i32 100)
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %0
ret void
}
int fibonacci(int zahl) {
  if (zahl == 1 || zahl == 2) {
    return 1;
  }
  return fibonacci(zahl - 1) + fibonacci(zahl - 2);
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     112f <fibonacci+0x1f>
cmpl   $0x2,-0x8(%rbp)
jne    113b <fibonacci+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115e <fibonacci+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
add    $0xffffffff,%ebp
mov    $0x1,%ebx
cmp    $0x2,%ebp
jb     1144 <fibonacci+0x34>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebp,%edi
call   1030 <fibonacci@plt>
add    %eax,%ebx
add    $0xfffffffe,%ebp
cmp    $0x1,%ebp
ja     1130 <fibonacci+0x20>
add    $0x1,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fibonacci(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @fibonacci(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 2
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %11, %4 ], [ %2, %1 ]
%6 = phi i32 [ %9, %4 ], [ %0, %1 ]
%7 = phi i32 [ %10, %4 ], [ 0, %1 ]
%8 = tail call i32 @fibonacci(i32 %5)
%9 = add nsw i32 %6, -2
%10 = add nsw i32 %8, %7
%11 = add i32 %6, -3
%12 = icmp ult i32 %11, 2
br i1 %12, label %13, label %4
13: ; preds = %4
%14 = add i32 %10, 1
br label %15
15: ; preds = %13, %1
%16 = phi i32 [ 1, %1 ], [ %14, %13 ]
ret i32 %16
}
void LPCCOMxIntEnable(unsigned long ulBase, unsigned long ulIntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000120))) |= ulIntFlags;
}


x86 assembly (clang, -O0):
<LPCCOMxIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x120(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x120(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCCOMxIntEnable>:
or     %rsi,0x120(%rdi)
ret

LLVM IR (-O0):
define void @LPCCOMxIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 288
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @LPCCOMxIntEnable(i64 %0, i64 %1) {
%3 = add i64 %0, 288
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = or i64 %5, %1
store volatile i64 %6, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void print_help(void) {
  printf("Usage: infile < stats column# \n");
  printf("   input is file of numbers\n");
  printf("   output is mean, stndev\n");
  printf("column# is column want stats of, count from 1\n");
  exit(0);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee9(%rip),%rdi
call   1030 <printf@plt>
lea    0xefa(%rip),%rdi
call   1030 <printf@plt>
lea    0xf09(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_help>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeeb(%rip),%rdi
call   1030 <puts@plt>
lea    0xefb(%rip),%rdi
call   1030 <puts@plt>
lea    0xf09(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Usage: infile < stats column# \0A\00"
@.str.1 = [29 x i8] c" input is file of numbers\0A\00"
@.str.2 = [27 x i8] c" output is mean, stndev\0A\00"
@.str.3 = [47 x i8] c"column# is column want stats of, count from 1\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [31 x i8] c"Usage: infile < stats column# \00"
@str.4 = [28 x i8] c" input is file of numbers\00"
@str.5 = [26 x i8] c" output is mean, stndev\00"
@str.6 = [46 x i8] c"column# is column want stats of, count from 1\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([46 x i8], [46 x i8]* @str.6, i64 0, i64 0))
%5 = tail call i32 @exit(i32 0)
unreachable
}
int wildmat(text, p) const char *text;
const char *p;
{
  if (p[0] == '*' && p[1] == '\0')
    return 1;
  return DoMatch(text, p) == 1;
}


x86 assembly (clang, -O0):
<wildmat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2a,%eax
jne    114d <wildmat+0x3d>
mov    -0x18(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x0,%eax
jne    114d <wildmat+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    116a <wildmat+0x5a>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x0,%al
call   1030 <DoMatch@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wildmat>:
push   %rax
cmpb   $0x2a,(%rsi)
jne    111c <wildmat+0xc>
cmpb   $0x0,0x1(%rsi)
je     112f <wildmat+0x1f>
xor    %eax,%eax
call   1030 <DoMatch@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
sete   %al
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wildmat(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 42
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %11
store i32 1, i32* %3
br label %24
18: ; preds = %11, %2
%19 = load i8*, i8** %4
%20 = load i8*, i8** %5
%21 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @DoMatch to i32 (i8*, i8*, ...)*)(i8* %19, i8* %20)
%22 = icmp eq i32 %21, 1
%23 = zext i1 %22 to i32
store i32 %23, i32* %3
br label %24
24: ; preds = %18, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @wildmat(i8* %0, i8* %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 42
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %1, i64 1
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %5, %2
%10 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @DoMatch to i32 (i8*, i8*, ...)*)(i8* %0, i8* %1)
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %5, %9
%14 = phi i32 [ %12, %9 ], [ 1, %5 ]
ret i32 %14
}
float sqf(float f) { return f * f; }


x86 assembly (clang, -O0):
<sqf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqf>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @sqf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @sqf(float %0) {
%2 = fmul float %0, %0
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sig_int(int signo) { printf("\ninterrupt\n %% "); }


x86 assembly (clang, -O0):
<sig_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_int>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"\0Ainterrupt\0A %% \00"
define void @sig_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"\0Ainterrupt\0A %% \00"
define void @sig_int(i32 %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf) {
  return 0;
}


x86 assembly (clang, -O0):
<exynos_register_thermal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exynos_register_thermal>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.thermal_sensor_conf = type opaque
define i32 @exynos_register_thermal(%struct.thermal_sensor_conf* %0) {
%2 = alloca %struct.thermal_sensor_conf*
store %struct.thermal_sensor_conf* %0, %struct.thermal_sensor_conf** %2
ret i32 0
}

LLVM IR (-O2):
%struct.thermal_sensor_conf = type opaque
define i32 @exynos_register_thermal(%struct.thermal_sensor_conf* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int read(int, unsigned char **, int);
int i2c_read(int fd, unsigned char *read_data) {
  int ret = 0;
  ret = read(fd, &read_data, 1);
  if (ret == -1)
    perror("I2C: Failed to read |");
  if (ret == 0)
    perror("I2C: End of FILE |");
  return (ret);
}


x86 assembly (clang, -O0):
<i2c_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1160 <i2c_read+0x40>
lea    0xea5(%rip),%rdi
call   1040 <perror@plt>
cmpl   $0x0,-0x14(%rbp)
jne    1176 <i2c_read+0x56>
lea    0xea5(%rip),%rdi
call   1040 <perror@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_read>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,0x8(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
je     114c <i2c_read+0x2c>
test   %ebx,%ebx
je     1155 <i2c_read+0x35>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret
lea    0xead(%rip),%rdi
jmp    115c <i2c_read+0x3c>
lea    0xeba(%rip),%rdi
call   1040 <perror@plt>
jmp    1144 <i2c_read+0x24>

LLVM IR (-O0):
@.str = [22 x i8] c"I2C: Failed to read |\00"
@.str.1 = [19 x i8] c"I2C: End of FILE |\00"
define i32 @i2c_read(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = load i32, i32* %3
%7 = call i32 @read(i32 %6, i8** %4, i32 1)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @perror(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
%13 = load i32, i32* %5
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %12
%16 = call i32 @perror(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0))
br label %17
17: ; preds = %15, %12
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
@.str = [22 x i8] c"I2C: Failed to read |\00"
@.str.1 = [19 x i8] c"I2C: End of FILE |\00"
define i32 @i2c_read(i32 %0, i8* %1) {
%3 = alloca i8*
store i8* %1, i8** %3
%4 = call i32 @read(i32 %0, i8** %3, i32 1)
switch i32 %4, label %9 [
i32 -1, label %6
i32 0, label %5
]
5: ; preds = %2
br label %6
6: ; preds = %2, %5
%7 = phi i8* [ getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), %5 ], [ getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), %2 ]
%8 = tail call i32 @perror(i8* %7)
br label %9
9: ; preds = %6, %2
ret i32 %4
}
void rop3_127_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T & S;
  stk1 = *D & stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_127_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_127_1_1>:
mov    (%rdi),%al
mov    %edx,%ecx
or     %sil,%cl
not    %cl
and    %al,%sil
or     %cl,%sil
and    %dl,%al
or     %sil,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_127_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = and i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8, i8* %6
%33 = zext i8 %32 to i32
%34 = xor i32 %33, -1
%35 = and i32 %31, %34
%36 = load i8*, i8** %4
%37 = load i8, i8* %36
%38 = zext i8 %37 to i32
%39 = load i8, i8* %5
%40 = zext i8 %39 to i32
%41 = and i32 %38, %40
%42 = or i32 %35, %41
%43 = load i8*, i8** %4
%44 = load i8, i8* %43
%45 = zext i8 %44 to i32
%46 = load i8, i8* %6
%47 = zext i8 %46 to i32
%48 = and i32 %45, %47
%49 = or i32 %42, %48
%50 = trunc i32 %49 to i8
%51 = load i8*, i8** %4
store i8 %50, i8* %51
ret void
}

LLVM IR (-O2):
define void @rop3_127_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = xor i8 %5, -1
%7 = and i8 %4, %1
%8 = or i8 %7, %6
%9 = and i8 %4, %2
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}