xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(unsigned char *);
void stbi_image_free(unsigned char *retval_from_stbi_load) {
  free(retval_from_stbi_load);
}


x86 assembly (clang, -O0):
<stbi_image_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi_image_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @stbi_image_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @stbi_image_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int test_imm_0Fint8_reg(signed char val) {
  return ((val) & (0x0F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Fint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Fint8_reg>:
test   $0xf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Fint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 15
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Fint8_reg(i8 signext %0) {
%2 = and i8 %0, 15
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
const char *loader_GPF_get_type(void) { return "GEMINI"; }


x86 assembly (clang, -O0):
<loader_GPF_get_type>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loader_GPF_get_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"GEMINI\00"
define i8* @loader_GPF_get_type() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"GEMINI\00"
define i8* @loader_GPF_get_type() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
void ccf(void) { ol("ccf"); }


x86 assembly (clang, -O0):
<ccf>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <ol@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccf>:
lea    0xee9(%rip),%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"ccf\00"
define void @ccf() {
%1 = call i32 @ol(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"ccf\00"
define void @ccf() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
void exynos_enable_idle_clock_down(unsigned int cluster) {}


x86 assembly (clang, -O0):
<exynos_enable_idle_clock_down>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<exynos_enable_idle_clock_down>:
ret

LLVM IR (-O0):
define void @exynos_enable_idle_clock_down(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @exynos_enable_idle_clock_down(i32 %0) {
ret void
}
double julian_centuries_to_julian_day(double tm) {
  return tm * 36525.0 + 2451545.0;
}


x86 assembly (clang, -O0):
<julian_centuries_to_julian_day>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<julian_centuries_to_julian_day>:
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @julian_centuries_to_julian_day(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fmuladd.f64(double %3, double 3.652500e+04, double 0x4142B42C80000000)
ret double %4
}

LLVM IR (-O2):
define double @julian_centuries_to_julian_day(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double 3.652500e+04, double 0x4142B42C80000000)
ret double %2
}
int getppid(int pid) {}


x86 assembly (clang, -O0):
<getppid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getppid>:
ret

LLVM IR (-O0):
define i32 @getppid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @getppid(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
void printFloat(double f) { printf("%f", f); }


x86 assembly (clang, -O0):
<printFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printFloat>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define void @printFloat(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define void @printFloat(double %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(int);
int /*<<< orphan*/ printf(char *);
int main() {
  int err = 0;
  error(err);
  printf("This is"
         "ver 0");
  error(err);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <error@plt>
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <error@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <error@plt>
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"This isver 0\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @error(i32 %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = call i32 @error(i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"This isver 0\00"
define i32 @main() {
%1 = tail call i32 @error(i32 0)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @error(i32 0)
ret i32 0
}
/* Variables and functions */
char *getenv(char *);
int /*<<< orphan*/ printf(char *, ...);
int mypwd() {
  printf("in fun");
  printf("%s\n", getenv("PWD"));
}


x86 assembly (clang, -O0):
<mypwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xece(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rsi
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mypwd>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1050 <printf@plt>
lea    0xec1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"in fun\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@.str.2 = [4 x i8] c"PWD\00"
define i32 @mypwd() {
%1 = alloca i32
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = call i8* @getenv(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %3)
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@.str = [7 x i8] c"in fun\00"
@.str.2 = [4 x i8] c"PWD\00"
define i32 @mypwd() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i8* @getenv(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) %2)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ goodbye();
int /*<<< orphan*/ hello();
int main(int argc, char *argv[]) {
  hello();
  goodbye();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <hello@plt>
mov    $0x0,%al
call   1040 <goodbye@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <hello@plt>
xor    %eax,%eax
call   1040 <goodbye@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @hello()
%7 = call i32 (...) @goodbye()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @hello()
%4 = tail call i32 (...) @goodbye()
ret i32 0
}
/* Type definitions */
typedef scalar_t__ int16_t;

/* Variables and functions */
int16_t add_int16_t(int16_t a, int16_t b) { return a + b; }


x86 assembly (clang, -O0):
<add_int16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_int16_t>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i64 @add_int16_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @add_int16_t(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
ret i64 %3
}
int findMul(int n) {
  int f = 1;
  n /= 10;
  while (n) {
    f *= 10;
    n /= 10;
  }
  return f;
}


x86 assembly (clang, -O0):
<findMul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1140 <findMul+0x40>
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    111c <findMul+0x1c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findMul>:
lea    0x9(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x13,%ecx
jb     1147 <findMul+0x47>
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
lea    (%rcx,%rdx,1),%edi
add    %eax,%eax
lea    (%rax,%rax,4),%eax
add    %edx,%ecx
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1120 <findMul+0x20>
ret

LLVM IR (-O0):
define i32 @findMul(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 10
store i32 %5, i32* %2
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32, i32* %3
%11 = mul nsw i32 %10, 10
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 10
store i32 %13, i32* %2
br label %6
14: ; preds = %6
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @findMul(i32 %0) {
%2 = add i32 %0, 9
%3 = icmp ult i32 %2, 19
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 1, %1 ]
%6 = phi i32 [ %7, %4 ], [ %0, %1 ]
%7 = sdiv i32 %6, 10
%8 = mul nsw i32 %5, 10
%9 = add nsw i32 %7, 9
%10 = icmp ult i32 %9, 19
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 1, %1 ], [ %8, %4 ]
ret i32 %12
}
void foo(void) { __atomic_thread_fence(5); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mfence
ret

LLVM IR (-O0):
define void @foo() {
fence seq_cst
ret void
}

LLVM IR (-O2):
define void @foo() {
fence seq_cst
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
void spaceballRotateCB(int x, int y, int z) {
  printf("spaceballRotateCB: rotations are X %d, Y %d, Z %d\n", x, y, z);
}


x86 assembly (clang, -O0):
<spaceballRotateCB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spaceballRotateCB>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"spaceballRotateCB: rotations are X %d, Y %d, Z %d\0A\00"
define void @spaceballRotateCB(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [51 x i8] c"spaceballRotateCB: rotations are X %d, Y %d, Z %d\0A\00"
define void @spaceballRotateCB(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCD_command(int);
void LCD_auto_write_start() { LCD_command(0xB0); }


x86 assembly (clang, -O0):
<LCD_auto_write_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0,%edi
call   1030 <LCD_command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_auto_write_start>:
mov    $0xb0,%edi
jmp    1030 <LCD_command@plt>

LLVM IR (-O0):
define void @LCD_auto_write_start() {
%1 = call i32 @LCD_command(i32 176)
ret void
}

LLVM IR (-O2):
define void @LCD_auto_write_start() {
%1 = tail call i32 @LCD_command(i32 176)
ret void
}
void *_hzdptr_set(void volatile *ptr_, void *hzd_) {
  void *volatile *ptr = (void *volatile *)ptr_;
  void *volatile *hzd = (void *volatile *)hzd_;
  void *val = *ptr;
  *hzd = val;
  return val;
}


x86 assembly (clang, -O0):
<_hzdptr_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hzdptr_set>:
mov    (%rdi),%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define i8* @_hzdptr_set(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i8**
store i8** %9, i8*** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
store i8** %11, i8*** %6
%12 = load i8**, i8*** %5
%13 = load volatile i8*, i8** %12
store i8* %13, i8** %7
%14 = load i8*, i8** %7
%15 = load i8**, i8*** %6
store volatile i8* %14, i8** %15
%16 = load i8*, i8** %7
ret i8* %16
}

LLVM IR (-O2):
define i8* @_hzdptr_set(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load volatile i8*, i8** %3
store volatile i8* %5, i8** %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x;
  int y;
  if (!(x == y && x >= 0))
    return 0;
  while (x > 0) {
    x--;
    y--;
  }
  assert(y >= 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1135 <main+0x25>
cmpl   $0x0,-0x8(%rbp)
jge    1141 <main+0x31>
movl   $0x0,-0x4(%rbp)
jmp    117f <main+0x6f>
jmp    1146 <main+0x36>
cmpl   $0x0,-0x8(%rbp)
jle    1167 <main+0x57>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1146 <main+0x36>
cmpl   $0x0,-0xc(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i32, i32* %2
%9 = icmp sge i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %7, %0
store i32 0, i32* %1
br label %25
11: ; preds = %7
br label %12
12: ; preds = %15, %11
%13 = load i32, i32* %2
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %12
%16 = load i32, i32* %2
%17 = add nsw i32 %16, -1
store i32 %17, i32* %2
%18 = load i32, i32* %3
%19 = add nsw i32 %18, -1
store i32 %19, i32* %3
br label %12
20: ; preds = %12
%21 = load i32, i32* %3
%22 = icmp sge i32 %21, 0
%23 = zext i1 %22 to i32
%24 = call i32 @assert(i32 %23)
store i32 0, i32* %1
br label %25
25: ; preds = %20, %10
%26 = load i32, i32* %1
ret i32 %26
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;
typedef int int64_t;

/* Variables and functions */
uint32_t bitScan_fun_int64_t(int64_t x) {
  uint32_t r = 0;
  int64_t s = (x & 0x8000000000000000ll);
  if (x == 0)
    return 63;
  while ((int64_t)((x <<= 1) & 0x8000000000000000ll) == s)
    ++r;
  return r;
}


x86 assembly (clang, -O0):
<bitScan_fun_int64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0x8(%rbp),%rax
movabs $0x8000000000000000,%rcx
and    %rcx,%rax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1138 <bitScan_fun_int64_t+0x38>
movl   $0x3f,-0x4(%rbp)
jmp    1172 <bitScan_fun_int64_t+0x72>
jmp    113d <bitScan_fun_int64_t+0x3d>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
cltq
movabs $0x8000000000000000,%rcx
and    %rcx,%rax
cmp    -0x10(%rbp),%eax
jne    116c <bitScan_fun_int64_t+0x6c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113d <bitScan_fun_int64_t+0x3d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitScan_fun_int64_t>:
mov    $0x3f,%eax
ret

LLVM IR (-O0):
define i32 @bitScan_fun_int64_t(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = and i64 %7, -9223372036854775808
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %1
store i32 63, i32* %2
br label %27
13: ; preds = %1
br label %14
14: ; preds = %22, %13
%15 = load i32, i32* %3
%16 = shl i32 %15, 1
store i32 %16, i32* %3
%17 = sext i32 %16 to i64
%18 = and i64 %17, -9223372036854775808
%19 = trunc i64 %18 to i32
%20 = load i32, i32* %5
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %25
22: ; preds = %14
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %14
25: ; preds = %14
%26 = load i32, i32* %4
store i32 %26, i32* %2
br label %27
27: ; preds = %25, %12
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @bitScan_fun_int64_t(i32 %0) {
%2 = icmp eq i32 %0, 0
ret i32 63
}
void cleanup(s) int s;
{
  move(23, 0);
  refresh();
  endwin();
  exit(1);
}


x86 assembly (clang, -O0):
<cleanup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x17,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1060 <move@plt>
mov    $0x0,%al
call   1030 <refresh@plt>
mov    $0x0,%al
call   1040 <endwin@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<cleanup>:
push   %rax
mov    $0x17,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1060 <move@plt>
xor    %eax,%eax
call   1030 <refresh@plt>
xor    %eax,%eax
call   1040 <endwin@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @cleanup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i32, i32, ...) bitcast (i32 (...)* @move to i32 (i32, i32, ...)*)(i32 23, i32 0)
%4 = call i32 (...) @refresh()
%5 = call i32 (...) @endwin()
unreachable
}

LLVM IR (-O2):
define void @cleanup(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @move to i32 (i32, i32, ...)*)(i32 23, i32 0)
%3 = tail call i32 (...) @refresh()
%4 = tail call i32 (...) @endwin()
tail call void @exit(i32 1)
unreachable
}
/* Variables and functions */
scalar_t__ arc4random();
int floorf(double);
int random_float(double max) {
  return floorf(((double)arc4random() / 0x100000000) * max);
}


x86 assembly (clang, -O0):
<random_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <arc4random@plt>
cvtsi2sd %rax,%xmm0
movsd  0xebf(%rip),%xmm1
divsd  %xmm1,%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1040 <floorf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_float>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <arc4random@plt>
cvtsi2sd %rax,%xmm1
mulsd  0xec6(%rip),%xmm1
movsd  (%rsp),%xmm0
mulsd  %xmm1,%xmm0
pop    %rax
jmp    1040 <floorf@plt>

LLVM IR (-O0):
define i32 @random_float(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i64 (...) @arc4random()
%4 = sitofp i64 %3 to double
%5 = fdiv double %4, 0x41F0000000000000
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = call i32 @floorf(double %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @random_float(double %0) {
%2 = tail call i64 (...) @arc4random()
%3 = sitofp i64 %2 to double
%4 = fmul double %3, 0x3DF0000000000000
%5 = fmul double %4, %0
%6 = tail call i32 @floorf(double %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int, int);
int /*<<< orphan*/ test_failure();
bool _expect_int_eq(int expected, int actual, const char *message) {
  if (expected == actual)
    return true;
  test_failure();
  printf(" \x1b[1;31mFAILED:\x1b[m %s\n  %d vs. %d\n", message, expected,
         actual);
  return false;
}


x86 assembly (clang, -O0):
<_expect_int_eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    114a <_expect_int_eq+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    116e <_expect_int_eq+0x4e>
mov    $0x0,%al
call   1040 <test_failure@plt>
mov    -0x18(%rbp),%rsi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_expect_int_eq>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r15d
cmp    %esi,%edi
je     1155 <_expect_int_eq+0x35>
mov    %rdx,%r14
mov    %esi,%ebp
mov    %edi,%ebx
xor    %r15d,%r15d
xor    %eax,%eax
call   1040 <test_failure@plt>
lea    0xeb7(%rip),%rdi
mov    %r14,%rsi
mov    %ebx,%edx
mov    %ebp,%ecx
call   1030 <printf@plt>
mov    %r15d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [35 x i8] c" \1B[1;31mFAILED:\1B[m %s\0A %d vs. %d\0A\00"
define i32 @_expect_int_eq(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 1, i32* %4
br label %18
12: ; preds = %3
%13 = call i32 (...) @test_failure()
%14 = load i8*, i8** %7
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %14, i32 %15, i32 %16)
store i32 0, i32* %4
br label %18
18: ; preds = %12, %11
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
@.str = [35 x i8] c" \1B[1;31mFAILED:\1B[m %s\0A %d vs. %d\0A\00"
define i32 @_expect_int_eq(i32 %0, i32 %1, i8* %2) {
%4 = icmp eq i32 %0, %1
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = tail call i32 (...) @test_failure()
%7 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %2, i32 %0, i32 %1)
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ 0, %5 ], [ 1, %3 ]
ret i32 %9
}
void view_popANumber(void) {}


x86 assembly (clang, -O0):
<view_popANumber>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<view_popANumber>:
ret

LLVM IR (-O0):
define void @view_popANumber() {
ret void
}

LLVM IR (-O2):
define void @view_popANumber() {
ret void
}
/* Variables and functions */
double pow(int, int);
int squid_tside(int projection, int k, double cdelt, double *tside) {
  *tside = 90.0 / (cdelt * pow(2, k));
  return (0);
}


x86 assembly (clang, -O0):
<squid_tside>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x2,%edi
call   1030 <pow@plt>
movsd  -0x20(%rbp),%xmm1
mulsd  %xmm0,%xmm1
movsd  0xeb1(%rip),%xmm0
divsd  %xmm1,%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<squid_tside>:
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%rbx
movsd  %xmm0,0x8(%rsp)
mov    $0x2,%edi
call   1030 <pow@plt>
mulsd  0x8(%rsp),%xmm0
movsd  0xeca(%rip),%xmm1
divsd  %xmm0,%xmm1
movsd  %xmm1,(%rbx)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @squid_tside(i32 %0, i32 %1, double %2, double* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca double
%8 = alloca double*
store i32 %0, i32* %5
store i32 %1, i32* %6
store double %2, double* %7
store double* %3, double** %8
%9 = load double, double* %7
%10 = load i32, i32* %6
%11 = call double @pow(i32 2, i32 %10)
%12 = fmul double %9, %11
%13 = fdiv double 9.000000e+01, %12
%14 = load double*, double** %8
store double %13, double* %14
ret i32 0
}

LLVM IR (-O2):
define i32 @squid_tside(i32 %0, i32 %1, double %2, double* nocapture writeonly %3) {
%5 = tail call double @pow(i32 2, i32 %1)
%6 = fmul double %5, %2
%7 = fdiv double 9.000000e+01, %6
store double %7, double* %3
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void ip_set_ttl(uint8_t *p_ip, uint8_t ttl) { p_ip[8] = ttl; }


x86 assembly (clang, -O0):
<ip_set_ttl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_set_ttl>:
mov    %esi,0x20(%rdi)
ret

LLVM IR (-O0):
define void @ip_set_ttl(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 8
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @ip_set_ttl(i32* nocapture writeonly %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 8
store i32 %1, i32* %3
ret void
}
void suspend_device_irqs(void) {}


x86 assembly (clang, -O0):
<suspend_device_irqs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<suspend_device_irqs>:
ret

LLVM IR (-O0):
define void @suspend_device_irqs() {
ret void
}

LLVM IR (-O2):
define void @suspend_device_irqs() {
ret void
}
double KMtoCM(double KM) { return KM * 100000; }


x86 assembly (clang, -O0):
<KMtoCM>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<KMtoCM>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @KMtoCM(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.000000e+05
ret double %4
}

LLVM IR (-O2):
define double @KMtoCM(double %0) {
%2 = fmul double %0, 1.000000e+05
ret double %2
}
float fprime(float x) { return 3 * x * x - 0.33 * x; }


x86 assembly (clang, -O0):
<fprime>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef7(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed0(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprime>:
movss  0xef8(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
cvtss2sd %xmm0,%xmm0
mulsd  0xeec(%rip),%xmm0
cvtss2sd %xmm1,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @fprime(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 3.000000e+00, %3
%5 = load float, float* %2
%6 = fmul float %4, %5
%7 = fpext float %6 to double
%8 = load float, float* %2
%9 = fpext float %8 to double
%10 = call double @llvm.fmuladd.f64(double -3.300000e-01, double %9, double %7)
%11 = fptrunc double %10 to float
ret float %11
}

LLVM IR (-O2):
define float @fprime(float %0) {
%2 = fmul float %0, 3.000000e+00
%3 = fmul float %2, %0
%4 = fpext float %3 to double
%5 = fpext float %0 to double
%6 = tail call double @llvm.fmuladd.f64(double %5, double -3.300000e-01, double %4)
%7 = fptrunc double %6 to float
ret float %7
}
/* Variables and functions */
long evalbor();
scalar_t__ test(char *);
long evalland() {
  long val;
  for (val = evalbor(); test("&&");) {
    if (!evalbor() != 0)
      val = 0;
  }
  return (val);
}


x86 assembly (clang, -O0):
<evalland>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <evalbor@plt>
mov    %rax,-0x8(%rbp)
lea    0xec6(%rip),%rdi
call   1040 <test@plt>
cmp    $0x0,%rax
je     1174 <evalland+0x54>
mov    $0x0,%al
call   1030 <evalbor@plt>
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
je     116f <evalland+0x4f>
movq   $0x0,-0x8(%rbp)
jmp    1133 <evalland+0x13>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evalland>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <evalbor@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rdi
call   1040 <test@plt>
test   %rax,%rax
je     116b <evalland+0x4b>
lea    0xeba(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <evalbor@plt>
test   %rax,%rax
cmove  %rax,%rbx
mov    %r14,%rdi
call   1040 <test@plt>
test   %rax,%rax
jne    1150 <evalland+0x30>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"&&\00"
define i64 @evalland() {
%1 = alloca i64
%2 = call i64 (...) @evalbor()
store i64 %2, i64* %1
br label %3
3: ; preds = %13, %0
%4 = call i64 @test(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = call i64 (...) @evalbor()
%8 = icmp ne i64 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %6
store i64 0, i64* %1
br label %13
13: ; preds = %12, %6
br label %3
14: ; preds = %3
%15 = load i64, i64* %1
ret i64 %15
}

LLVM IR (-O2):
@.str = [3 x i8] c"&&\00"
define i64 @evalland() {
%1 = tail call i64 (...) @evalbor()
%2 = tail call i64 @test(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %0, %4
%5 = phi i64 [ %8, %4 ], [ %1, %0 ]
%6 = tail call i64 (...) @evalbor()
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, i64 0, i64 %5
%9 = tail call i64 @test(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %0
%12 = phi i64 [ %1, %0 ], [ %8, %4 ]
ret i64 %12
}
/* Type definitions */
struct itimerval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ITIMER_REAL;
scalar_t__ getitimer(int /*<<< orphan*/, struct itimerval *);
int main(void) {
  struct itimerval blah;
  if (getitimer(ITIMER_REAL, &blah) < 0)
    return 111;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <getitimer@plt>
cmp    $0x0,%rax
jge    1147 <main+0x37>
movl   $0x6f,-0x4(%rbp)
jmp    114e <main+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <getitimer@plt>
sar    $0x3f,%rax
and    $0x6f,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.itimerval = type { i32 }
@ITIMER_REAL = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.itimerval
store i32 0, i32* %1
%3 = load i32, i32* @ITIMER_REAL
%4 = call i64 @getitimer(i32 %3, %struct.itimerval* %2)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 111, i32* %1
br label %8
7: ; preds = %0
store i32 0, i32* %1
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
%struct.itimerval = type { i32 }
@ITIMER_REAL = global i32 0
define i32 @main() {
%1 = alloca %struct.itimerval
%2 = bitcast %struct.itimerval* %1 to i8*
%3 = load i32, i32* @ITIMER_REAL
%4 = call i64 @getitimer(i32 %3, %struct.itimerval* %1)
%5 = icmp slt i64 %4, 0
%6 = select i1 %5, i32 111, i32 0
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ft_memdel(void **ap) {
  if (*ap) {
    free(*ap);
    *ap = NULL;
  }
}


x86 assembly (clang, -O0):
<ft_memdel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1141 <ft_memdel+0x31>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_memdel>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1128 <ft_memdel+0x18>
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_memdel(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = call i32 @free(i8* %8)
%10 = load i8**, i8*** %2
store i8* null, i8** %10
br label %11
11: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @ft_memdel(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int tst_get_free_pids_(void (*)());
int tst_get_free_pids(void (*cleanup_fn)(void)) {
  return tst_get_free_pids_(cleanup_fn);
}


x86 assembly (clang, -O0):
<tst_get_free_pids>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <tst_get_free_pids_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tst_get_free_pids>:
jmp    1030 <tst_get_free_pids_@plt>

LLVM IR (-O0):
define i32 @tst_get_free_pids(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @tst_get_free_pids_(void (...)* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @tst_get_free_pids(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @tst_get_free_pids_(void (...)* %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ReInit();
int /*<<< orphan*/ exit(int);
void Key(unsigned char key, int x, int y) {
  switch (key) {
  case 27:
    exit(1);
  case 32:
    ReInit();
    break;
  }
}


x86 assembly (clang, -O0):
<Key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movzbl -0x1(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x1b,%eax
je     115a <Key+0x3a>
jmp    1149 <Key+0x29>
mov    -0x10(%rbp),%eax
sub    $0x20,%eax
je     1164 <Key+0x44>
jmp    116b <Key+0x4b>
mov    $0x1,%edi
call   1040 <exit@plt>
mov    $0x0,%al
call   1030 <ReInit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Key>:
cmp    $0x20,%dil
je     112d <Key+0xd>
cmp    $0x1b,%dil
je     1134 <Key+0x14>
ret
xor    %eax,%eax
jmp    1030 <ReInit@plt>
push   %rax
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @Key(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
switch i32 %8, label %13 [
i32 27, label %9
i32 32, label %11
]
9: ; preds = %3
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %3
%12 = call i32 (...) @ReInit()
br label %13
13: ; preds = %3, %11
ret void
}

LLVM IR (-O2):
define void @Key(i8 zeroext %0, i32 %1, i32 %2) {
switch i8 %0, label %8 [
i8 27, label %4
i8 32, label %6
]
4: ; preds = %3
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %3
%7 = tail call i32 (...) @ReInit()
br label %8
8: ; preds = %3, %6
ret void
}
void path_007_expected_6(int a, int b, int c) {
  if (a) {
  }
  if (b) {
    return;
  }
  if (c) {
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111c <path_007_expected_6+0x1c>
jmp    111c <path_007_expected_6+0x1c>
cmpl   $0x0,-0x8(%rbp)
je     112b <path_007_expected_6+0x2b>
jmp    113a <path_007_expected_6+0x3a>
cmpl   $0x0,-0xc(%rbp)
je     113a <path_007_expected_6+0x3a>
jmp    113a <path_007_expected_6+0x3a>
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @path_007_expected_6(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %3
br label %10
10: ; preds = %9, %3
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
br label %18
14: ; preds = %10
%15 = load i32, i32* %6
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
br label %18
18: ; preds = %13, %17, %14
ret void
}

LLVM IR (-O2):
define void @path_007_expected_6(i32 %0, i32 %1, i32 %2) {
ret void
}
__attribute__((weak)) void PWM_IrqHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<PWM_IrqHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PWM_IrqHandler+0x9>
jmp    1109 <PWM_IrqHandler+0x9>

x86 assembly (clang, -O2):
<PWM_IrqHandler>:
jmp    1100 <PWM_IrqHandler>

LLVM IR (-O0):
define weak void @PWM_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @PWM_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ memmove(char *, char *, int);
int strlen(char const *);
char *strstr(char *, char const *);
void removeSubstring(char *s, const char *toremove) {
  s = strstr(s, toremove);
  memmove(s, s + strlen(toremove), 1 + strlen(s + strlen(toremove)));
}


x86 assembly (clang, -O0):
<removeSubstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strstr@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x30(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
cltq
add    %rax,%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
add    $0x1,%edx
call   1040 <memmove@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<removeSubstring>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
call   1050 <strstr@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <strlen@plt>
movslq %eax,%r15
add    %r14,%r15
mov    %rbx,%rdi
call   1030 <strlen@plt>
movslq %eax,%rdi
add    %r14,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%edx
mov    %r14,%rdi
mov    %r15,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <memmove@plt>

LLVM IR (-O0):
define void @removeSubstring(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i32 @strlen(i8* %10)
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8*, i8** %3
%15 = load i8*, i8** %4
%16 = call i32 @strlen(i8* %15)
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = call i32 @strlen(i8* %18)
%20 = add nsw i32 1, %19
%21 = call i32 @memmove(i8* %8, i8* %13, i32 %20)
ret void
}

LLVM IR (-O2):
define void @removeSubstring(i8* %0, i8* %1) {
%3 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = tail call i32 @strlen(i8* %1)
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %3, i64 %5
%7 = tail call i32 @strlen(i8* %1)
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %3, i64 %8
%10 = tail call i32 @strlen(i8* %9)
%11 = add nsw i32 %10, 1
%12 = tail call i32 @memmove(i8* %3, i8* %6, i32 %11)
ret void
}
void __VERIFIER_atomic_CAS(volatile unsigned *v, unsigned e, unsigned u,
                           unsigned *r) {
  if (*v == e) {
    *v = u, *r = 1;
  } else {
    *r = 0;
  }
}


x86 assembly (clang, -O0):
<__VERIFIER_atomic_CAS>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1139 <__VERIFIER_atomic_CAS+0x39>
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
jmp    1143 <__VERIFIER_atomic_CAS+0x43>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_atomic_CAS>:
mov    (%rdi),%eax
xor    %r8d,%r8d
cmp    %esi,%eax
jne    1111 <__VERIFIER_atomic_CAS+0x11>
mov    %edx,(%rdi)
mov    $0x1,%r8d
mov    %r8d,(%rcx)
ret

LLVM IR (-O0):
define void @__VERIFIER_atomic_CAS(i32* %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load volatile i32, i32* %9
%11 = load i32, i32* %6
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %4
%14 = load i32, i32* %7
%15 = load i32*, i32** %5
store volatile i32 %14, i32* %15
%16 = load i32*, i32** %8
store i32 1, i32* %16
br label %19
17: ; preds = %4
%18 = load i32*, i32** %8
store i32 0, i32* %18
br label %19
19: ; preds = %17, %13
ret void
}

LLVM IR (-O2):
define void @__VERIFIER_atomic_CAS(i32* %0, i32 %1, i32 %2, i32* nocapture writeonly %3) {
%5 = load volatile i32, i32* %0
%6 = icmp eq i32 %5, %1
br i1 %6, label %7, label %8
7: ; preds = %4
store volatile i32 %2, i32* %0
br label %8
8: ; preds = %4, %7
%9 = phi i32 [ 1, %7 ], [ 0, %4 ]
store i32 %9, i32* %3
ret void
}
int xnew_is_new(double xnew, double x0, double x1, double x2) {
  return ((xnew > x0) && (xnew != x1) && (xnew < x2));
}


x86 assembly (clang, -O0):
<xnew_is_new>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
ucomisd -0x10(%rbp),%xmm0
mov    %al,-0x21(%rbp)
jbe    1161 <xnew_is_new+0x61>
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
ucomisd -0x18(%rbp),%xmm0
mov    %al,-0x21(%rbp)
jne    114d <xnew_is_new+0x4d>
jp     114d <xnew_is_new+0x4d>
jmp    1161 <xnew_is_new+0x61>
movsd  -0x8(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xnew_is_new>:
ucomisd %xmm1,%xmm0
seta   %al
ucomisd %xmm2,%xmm0
setp   %cl
setne  %dl
or     %cl,%dl
and    %al,%dl
ucomisd %xmm0,%xmm3
seta   %al
and    %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @xnew_is_new(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = fcmp ogt double %9, %10
br i1 %11, label %12, label %20
12: ; preds = %4
%13 = load double, double* %5
%14 = load double, double* %7
%15 = fcmp une double %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load double, double* %5
%18 = load double, double* %8
%19 = fcmp olt double %17, %18
br label %20
20: ; preds = %16, %12, %4
%21 = phi i1 [ false, %12 ], [ false, %4 ], [ %19, %16 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @xnew_is_new(double %0, double %1, double %2, double %3) {
%5 = fcmp ogt double %0, %1
%6 = fcmp une double %0, %2
%7 = and i1 %5, %6
%8 = fcmp olt double %0, %3
%9 = and i1 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int PnameDef();
PviewNameDef() {
  int b = -1;
  ;
  b = PnameDef();
  return (b);
}


x86 assembly (clang, -O0):
<PviewNameDef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x0,%al
call   1030 <PnameDef@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PviewNameDef>:
xor    %eax,%eax
jmp    1030 <PnameDef@plt>

LLVM IR (-O0):
define i32 @PviewNameDef() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 (...) @PnameDef()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @PviewNameDef() {
%1 = tail call i32 (...) @PnameDef()
ret i32 %1
}
int readInt(int *n) {
  int volatile *IO = (int *)(0x3c000000 + 3 * 0x00000020);
  int status, value;
  value = *IO;
  status = *(IO + 1);
  if (status == 0) {
    *n = value;
  }
  return status;
}


x86 assembly (clang, -O0):
<readInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x3c000060,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1137 <readInt+0x37>
mov    -0x18(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readInt>:
mov    0x3c000060,%ecx
mov    0x3c000064,%eax
test   %eax,%eax
je     1113 <readInt+0x13>
ret
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define i32 @readInt(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %2
store i32* inttoptr (i64 1006633056 to i32*), i32** %3
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load volatile i32, i32* %9
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load i32, i32* %5
%15 = load i32*, i32** %2
store i32 %14, i32* %15
br label %16
16: ; preds = %13, %1
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @readInt(i32* nocapture writeonly %0) {
%2 = load volatile i32, i32* inttoptr (i64 1006633056 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1006633060 to i32*)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 %2, i32* %0
br label %6
6: ; preds = %5, %1
ret i32 %3
}
int net_cleanup() { return 0; }


x86 assembly (clang, -O0):
<net_cleanup>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_cleanup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @net_cleanup() {
ret i32 0
}

LLVM IR (-O2):
define i32 @net_cleanup() {
ret i32 0
}