xunge/DecIR huggingface dataset:
int is_wspc(char c) { return c <= 32 && c > 0; }


x86 assembly (clang, -O0):
<is_wspc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
jg     1129 <is_wspc+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x0,%eax
setg   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_wspc>:
add    $0xff,%dil
xor    %eax,%eax
cmp    $0x20,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_wspc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 %4, 32
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sgt i32 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_wspc(i8 signext %0) {
%2 = add i8 %0, -1
%3 = icmp ult i8 %2, 32
%4 = zext i1 %3 to i32
ret i32 %4
}
void *box_int(int x) {
  int *ret = malloc(sizeof(*ret));
  assert(ret);
  *ret = x;
  return ret;
}


x86 assembly (clang, -O0):
<box_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<box_int>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %eax,%eax
call   1030 <assert@plt>
mov    %ebp,(%rbx)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @box_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i8* @malloc(i64 4)
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 (i32*, ...) bitcast (i32 (...)* @assert to i32 (i32*, ...)*)(i32* %6)
%8 = load i32, i32* %2
%9 = load i32*, i32** %3
store i32 %8, i32* %9
%10 = load i32*, i32** %3
%11 = bitcast i32* %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define i8* @box_int(i32 %0) {
%2 = tail call dereferenceable_or_null(4) i8* @malloc(i64 4)
%3 = bitcast i8* %2 to i32*
%4 = tail call i32 (i32*, ...) bitcast (i32 (...)* @assert to i32 (i32*, ...)*)(i32* %3)
store i32 %0, i32* %3
ret i8* %2
}
void record_spr_defaults(void) {}


x86 assembly (clang, -O0):
<record_spr_defaults>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<record_spr_defaults>:
ret

LLVM IR (-O0):
define void @record_spr_defaults() {
ret void
}

LLVM IR (-O2):
define void @record_spr_defaults() {
ret void
}
int test_imm_15uint8_mem(unsigned char *val) {
  return ((*val) & (-0x15 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_15uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffeb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_15uint8_mem>:
testb  $0xeb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_15uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -21
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_15uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -21
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_encode_text();
int run_tests_encoding() {
  printf("\nRunning encoding tests\n");
  test_encode_text();
  printf("All encoding tests completed\n");
  return 1;
}


x86 assembly (clang, -O0):
<run_tests_encoding>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <test_encode_text@plt>
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_tests_encoding>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <test_encode_text@plt>
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"\0ARunning encoding tests\0A\00"
@.str.1 = [30 x i8] c"All encoding tests completed\0A\00"
define i32 @run_tests_encoding() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @test_encode_text()
%3 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [24 x i8] c"\0ARunning encoding tests\00"
@str.2 = [29 x i8] c"All encoding tests completed\00"
define i32 @run_tests_encoding() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @test_encode_text()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str.2, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int syscall3(int, int, int);
int kill(int pid, int signo) { return syscall3(37, pid, signo); }


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x25,%edi
call   1030 <syscall3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x25,%edi
jmp    1030 <syscall3@plt>

LLVM IR (-O0):
define i32 @kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @syscall3(i32 37, i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @kill(i32 %0, i32 %1) {
%3 = tail call i32 @syscall3(i32 37, i32 %0, i32 %1)
ret i32 %3
}
void free_int_matrix(int **m) {
  free(*m);
  free(m);
  return;
}


x86 assembly (clang, -O0):
<free_int_matrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_int_matrix>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_int_matrix(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
%4 = load i32*, i32** %3
%5 = bitcast i32* %4 to i8*
%6 = load i32**, i32*** %2
%7 = bitcast i32** %6 to i8*
ret void
}

LLVM IR (-O2):
define void @free_int_matrix(i32** nocapture %0) {
%2 = bitcast i32** %0 to i8**
%3 = load i8*, i8** %2
tail call void @free(i8* %3)
%4 = bitcast i32** %0 to i8*
tail call void @free(i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("schedule quantum [prog 1 [args] [: prog 2 [args] [: ... ]]]\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [61 x i8] c"schedule quantum [prog 1 [args] [: prog 2 [args] [: ... ]]]\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@str = [60 x i8] c"schedule quantum [prog 1 [args] [: prog 2 [args] [: ... ]]]\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([60 x i8], [60 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int _write(int, void *, unsigned int);
int write(int handle, void *buffer, unsigned int count) {
  return _write(handle, buffer, count);
}


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
jmp    1030 <_write@plt>

LLVM IR (-O0):
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @_write(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @_write(i32 %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int EOF;
int getbyte();
int getbit(void) {
  int ch;
  while (1) {
    ch = getbyte();
    if (ch == EOF)
      return (EOF);
    if (ch == '0' || ch == '1')
      break;
  }
  return (ch);
}


x86 assembly (clang, -O0):
<getbit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getbyte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2ebc(%rip),%rcx
cmp    (%rcx),%eax
jne    1145 <getbit+0x35>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1169 <getbit+0x59>
cmpl   $0x30,-0x8(%rbp)
je     1159 <getbit+0x49>
cmpl   $0x31,-0x8(%rbp)
jne    115e <getbit+0x4e>
jmp    1163 <getbit+0x53>
jmp    1118 <getbit+0x8>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getbit>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getbyte@plt>
cmp    (%rbx),%eax
je     1135 <getbit+0x25>
mov    %eax,%ecx
and    $0xfffffffe,%ecx
cmp    $0x30,%ecx
jne    1120 <getbit+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @getbit() {
%1 = alloca i32
%2 = alloca i32
br label %3
3: ; preds = %0, %17
%4 = call i32 (...) @getbyte()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* @EOF
%7 = icmp eq i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = load i32, i32* @EOF
store i32 %9, i32* %1
br label %20
10: ; preds = %3
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, 48
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp eq i32 %14, 49
br i1 %15, label %16, label %17
16: ; preds = %13, %10
br label %18
17: ; preds = %13
br label %3
18: ; preds = %16
%19 = load i32, i32* %2
store i32 %19, i32* %1
br label %20
20: ; preds = %18, %8
%21 = load i32, i32* %1
ret i32 %21
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @getbit() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @getbyte()
%3 = load i32, i32* @EOF
%4 = icmp eq i32 %2, %3
%5 = and i32 %2, -2
%6 = icmp eq i32 %5, 48
%7 = or i1 %4, %6
br i1 %7, label %8, label %1
8: ; preds = %1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ FNM_PERIOD;
int fnmatch(char const *, char const *, int /*<<< orphan*/);
int c_fnmatch(const char *pat, const char *str) {
  return fnmatch(pat, str, FNM_PERIOD);
}


x86 assembly (clang, -O0):
<c_fnmatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
call   1030 <fnmatch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_fnmatch>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
jmp    1030 <fnmatch@plt>

LLVM IR (-O0):
@FNM_PERIOD = global i32 0
define i32 @c_fnmatch(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @FNM_PERIOD
%8 = call i32 @fnmatch(i8* %5, i8* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@FNM_PERIOD = global i32 0
define i32 @c_fnmatch(i8* %0, i8* %1) {
%3 = load i32, i32* @FNM_PERIOD
%4 = tail call i32 @fnmatch(i8* %0, i8* %1, i32 %3)
ret i32 %4
}
/* Type definitions */
struct stat {
  scalar_t__ st_size;
};

/* Variables and functions */
scalar_t__ stat(char *, struct stat *);
unsigned long files_size(char *filename) {
  struct stat buf;
  if (stat(filename, &buf) < 0) {
    return 0;
  }
  return (unsigned long)buf.st_size;
}


x86 assembly (clang, -O0):
<files_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jge    1140 <files_size+0x30>
movq   $0x0,-0x8(%rbp)
jmp    1148 <files_size+0x38>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<files_size>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
js     1124 <files_size+0x14>
mov    (%rsp),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i64 @files_size(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 0, i64* %2
br label %12
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i64, i64* %10
store i64 %11, i64* %2
br label %12
12: ; preds = %9, %8
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i64 @files_size(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp slt i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = select i1 %5, i64 0, i64 %7
ret i64 %8
}
int test_imm_C1uint8_reg(unsigned char val) {
  return ((val) & (-0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff3f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1uint8_reg>:
test   $0x3f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -193
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C1uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 63
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *strdup(const char *s) {
  char *d = (char *)malloc(strlen(s) + 1);
  if (d)
    strcpy(d, s);
  return d;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <strdup+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <strdup+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
br label %15
15: ; preds = %11, %1
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ _vwarn(char const *, int /*<<< orphan*/);
void vwarn(const char *fmt, va_list ap) { _vwarn(fmt, ap); }


x86 assembly (clang, -O0):
<vwarn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_vwarn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwarn>:
jmp    1030 <_vwarn@plt>

LLVM IR (-O0):
define void @vwarn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @_vwarn(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @vwarn(i8* %0, i32 %1) {
%3 = tail call i32 @_vwarn(i8* %0, i32 %1)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
bool UARTBusy(uint32_t ui32Base) {
  ASSERT(_UARTBaseValid(ui32Base));
  return (((*((volatile uint32_t *)(ui32Base + 0x00000018))) & 0x00000008)
              ? true
              : false);
}


x86 assembly (clang, -O0):
<UARTBusy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x18,%eax
cltq
mov    (%rax),%edx
and    $0x8,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTBusy>:
push   %rbx
mov    %edi,%ebx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rax
mov    0x18(%rax),%eax
shr    $0x3,%eax
and    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @UARTBusy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_UARTBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 24
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, 8
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
ret i32 %14
}

LLVM IR (-O2):
define i32 @UARTBusy(i32 %0) {
%2 = tail call i32 @_UARTBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 24
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = lshr i32 %7, 3
%9 = and i32 %8, 1
ret i32 %9
}
/* Variables and functions */
size_t _aligned_capacity(size_t length) {
  size_t size = 1;
  while (length) {
    length >>= 1;
    size <<= 1;
  }
  return size > 16 ? size : 16;
}


x86 assembly (clang, -O0):
<_aligned_capacity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <_aligned_capacity+0x38>
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <_aligned_capacity+0x10>
cmpq   $0x10,-0x10(%rbp)
jbe    1150 <_aligned_capacity+0x50>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    115e <_aligned_capacity+0x5e>
mov    $0x10,%eax
mov    %rax,-0x18(%rbp)
jmp    115e <_aligned_capacity+0x5e>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_aligned_capacity>:
test   %rdi,%rdi
je     112d <_aligned_capacity+0x2d>
mov    $0x1,%ecx
mov    %rdi,%rax
nopl   (%rax)
shr    %rax
add    %rcx,%rcx
cmp    $0x1,%rdi
mov    %rax,%rdi
ja     1110 <_aligned_capacity+0x10>
cmp    $0x11,%rcx
mov    $0x10,%eax
cmovae %rcx,%rax
ret
mov    $0x10,%eax
ret

LLVM IR (-O0):
define i64 @_aligned_capacity(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 1, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i64, i64* %2
%9 = lshr i64 %8, 1
store i64 %9, i64* %2
%10 = load i64, i64* %3
%11 = shl i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
%14 = icmp ugt i64 %13, 16
br i1 %14, label %15, label %17
15: ; preds = %12
%16 = load i64, i64* %3
br label %18
17: ; preds = %12
br label %18
18: ; preds = %17, %15
%19 = phi i64 [ %16, %15 ], [ 16, %17 ]
ret i64 %19
}

LLVM IR (-O2):
define i64 @_aligned_capacity(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %7, %3 ], [ 1, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i64 %5, 1
%7 = shl i64 %4, 1
%8 = icmp ult i64 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3
%10 = icmp ugt i64 %7, 16
%11 = select i1 %10, i64 %7, i64 16
br label %12
12: ; preds = %9, %1
%13 = phi i64 [ 16, %1 ], [ %11, %9 ]
ret i64 %13
}
char *ffi_reinterpret_string(void *result) { return (char *)result; }


x86 assembly (clang, -O0):
<ffi_reinterpret_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_reinterpret_string>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @ffi_reinterpret_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @ffi_reinterpret_string(i8* readnone returned %0) {
ret i8* %0
}
void access_cleanup(void) {
  {}
}


x86 assembly (clang, -O0):
<access_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<access_cleanup>:
ret

LLVM IR (-O0):
define void @access_cleanup() {
ret void
}

LLVM IR (-O2):
define void @access_cleanup() {
ret void
}
/* Type definitions */
typedef int nmaskbits;

/* Variables and functions */
unsigned long *malloc(int);
unsigned long *alloc_bitmap(int nmaskbits) {
  return malloc(
      (((nmaskbits) + ((8 * sizeof(long))) - 1) / ((8 * sizeof(long)))) *
      sizeof(long));
}


x86 assembly (clang, -O0):
<alloc_bitmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
add    $0x40,%rax
sub    $0x1,%rax
shr    $0x6,%rax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_bitmap>:
movslq %edi,%rdi
add    $0x3f,%rdi
shr    $0x3,%rdi
and    $0xfffffff8,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i64* @alloc_bitmap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = add i64 %4, 64
%6 = sub i64 %5, 1
%7 = udiv i64 %6, 64
%8 = mul i64 %7, 8
%9 = trunc i64 %8 to i32
%10 = call i64* @malloc(i32 %9)
ret i64* %10
}

LLVM IR (-O2):
define noalias i64* @alloc_bitmap(i32 %0) {
%2 = sext i32 %0 to i64
%3 = add nsw i64 %2, 63
%4 = lshr i64 %3, 3
%5 = trunc i64 %4 to i32
%6 = and i32 %5, -8
%7 = tail call i64* @malloc(i32 %6)
ret i64* %7
}
/* Variables and functions */
char *CONF_get_string(void *, char *, char *);
char *conf_lhash_get_string(void *db, char *section, char *value) {
  return CONF_get_string(db, section, value);
}


x86 assembly (clang, -O0):
<conf_lhash_get_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <CONF_get_string@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conf_lhash_get_string>:
jmp    1030 <CONF_get_string@plt>

LLVM IR (-O0):
define i8* @conf_lhash_get_string(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i8* @CONF_get_string(i8* %7, i8* %8, i8* %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @conf_lhash_get_string(i8* %0, i8* %1, i8* %2) {
%4 = tail call i8* @CONF_get_string(i8* %0, i8* %1, i8* %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
void Thread_exit() { pthread_exit(NULL); }


x86 assembly (clang, -O0):
<Thread_exit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <pthread_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Thread_exit>:
xor    %edi,%edi
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define void @Thread_exit() {
%1 = call i32 @pthread_exit(i32* null)
ret void
}

LLVM IR (-O2):
define void @Thread_exit() {
%1 = tail call i32 @pthread_exit(i32* null)
ret void
}
/* Variables and functions */
float glmLength3f(float *);
int /*<<< orphan*/ glmSub3fv(float *, float const *, float const *);
float glmDistance3f(const float p0[3], const float p1[3]) {
  float v[3];
  glmSub3fv(v, p0, p1);
  return glmLength3f(v);
}


x86 assembly (clang, -O0):
<glmDistance3f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x1c(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <glmSub3fv@plt>
lea    -0x1c(%rbp),%rdi
call   1030 <glmLength3f@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmDistance3f>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0x4(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <glmSub3fv@plt>
mov    %rbx,%rdi
call   1030 <glmLength3f@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @glmDistance3f(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca [3 x float]
store float* %0, float** %3
store float* %1, float** %4
%6 = getelementptr inbounds [3 x float], [3 x float]* %5, i64 0, i64 0
%7 = load float*, float** %3
%8 = load float*, float** %4
%9 = call i32 @glmSub3fv(float* %6, float* %7, float* %8)
%10 = getelementptr inbounds [3 x float], [3 x float]* %5, i64 0, i64 0
%11 = call float @glmLength3f(float* %10)
ret float %11
}

LLVM IR (-O2):
define float @glmDistance3f(float* %0, float* %1) {
%3 = alloca [3 x float]
%4 = bitcast [3 x float]* %3 to i8*
%5 = getelementptr inbounds [3 x float], [3 x float]* %3, i64 0, i64 0
%6 = call i32 @glmSub3fv(float* %5, float* %0, float* %1)
%7 = call float @glmLength3f(float* %5)
ret float %7
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
long stamp() {
  struct timespec tv;
  long _stamp;
  clock_gettime(CLOCK_MONOTONIC, &tv);
  _stamp = tv.tv_sec * 1000 * 1000 * 1000 + tv.tv_nsec;
  return _stamp;
}


x86 assembly (clang, -O0):
<stamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3e8,-0x8(%rbp),%eax
imul   $0x3e8,%eax,%eax
imul   $0x3e8,%eax,%eax
add    -0x4(%rbp),%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stamp>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,(%rsp),%eax
movslq 0x4(%rsp),%rcx
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define i64 @stamp() {
%1 = alloca %struct.timespec
%2 = alloca i64
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%6 = load i32, i32* %5
%7 = mul nsw i32 %6, 1000
%8 = mul nsw i32 %7, 1000
%9 = mul nsw i32 %8, 1000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%11 = load i32, i32* %10
%12 = add nsw i32 %9, %11
%13 = sext i32 %12 to i64
store i64 %13, i64* %2
%14 = load i64, i64* %2
ret i64 %14
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define i64 @stamp() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = mul i32 %6, 1000000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = add nsw i32 %7, %9
%11 = sext i32 %10 to i64
ret i64 %11
}
void gtk_text_buffer_get_text() {}


x86 assembly (clang, -O0):
<gtk_text_buffer_get_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_buffer_get_text>:
ret

LLVM IR (-O0):
define void @gtk_text_buffer_get_text() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_buffer_get_text() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lcd_cls(int);
int /*<<< orphan*/ lcd_cs(int);
int /*<<< orphan*/ lcd_setNormalReverse(int);
int /*<<< orphan*/ pause();
int /*<<< orphan*/ splash_puts(int, int, char *);
void splash_win(void) {
  lcd_cs(1);
  lcd_setNormalReverse(1);
  lcd_cls(0x00);
  splash_puts(4, 3, "YOU WIN");
  lcd_cs(0);
  pause();
}


x86 assembly (clang, -O0):
<splash_win>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <lcd_cs@plt>
mov    $0x1,%edi
call   1030 <lcd_setNormalReverse@plt>
xor    %edi,%edi
call   1070 <lcd_cls@plt>
mov    $0x4,%edi
mov    $0x3,%esi
lea    0xe80(%rip),%rdx
call   1060 <splash_puts@plt>
xor    %edi,%edi
call   1040 <lcd_cs@plt>
mov    $0x0,%al
call   1050 <pause@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<splash_win>:
push   %rax
mov    $0x1,%edi
call   1040 <lcd_cs@plt>
mov    $0x1,%edi
call   1030 <lcd_setNormalReverse@plt>
xor    %edi,%edi
call   1070 <lcd_cls@plt>
lea    0xe8d(%rip),%rdx
mov    $0x4,%edi
mov    $0x3,%esi
call   1060 <splash_puts@plt>
xor    %edi,%edi
call   1040 <lcd_cs@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <pause@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"YOU WIN\00"
define void @splash_win() {
%1 = call i32 @lcd_cs(i32 1)
%2 = call i32 @lcd_setNormalReverse(i32 1)
%3 = call i32 @lcd_cls(i32 0)
%4 = call i32 @splash_puts(i32 4, i32 3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @lcd_cs(i32 0)
%6 = call i32 (...) @pause()
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"YOU WIN\00"
define void @splash_win() {
%1 = tail call i32 @lcd_cs(i32 1)
%2 = tail call i32 @lcd_setNormalReverse(i32 1)
%3 = tail call i32 @lcd_cls(i32 0)
%4 = tail call i32 @splash_puts(i32 4, i32 3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @lcd_cs(i32 0)
%6 = tail call i32 (...) @pause()
ret void
}
void event_x_reserved(p) char p;
{
  char msg[200];
  sprintf(msg, "Ignoring reserved character %c", p);
  event_warning(msg);
}


x86 assembly (clang, -O0):
<event_x_reserved>:
push   %rbp
mov    %rsp,%rbp
sub    $0xd0,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    -0xd0(%rbp),%rdi
movsbl -0x1(%rbp),%edx
lea    0xebd(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
lea    -0xd0(%rbp),%rdi
mov    $0x0,%al
call   1030 <event_warning@plt>
add    $0xd0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_x_reserved>:
push   %rbx
sub    $0xd0,%rsp
movsbl %dil,%edx
lea    0xecd(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <event_warning@plt>
add    $0xd0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [31 x i8] c"Ignoring reserved character %c\00"
define void @event_x_reserved(i32 %0) {
%2 = alloca i8
%3 = alloca [200 x i8]
%4 = trunc i32 %0 to i8
store i8 %4, i8* %2
%5 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = call i32 (i8*, i8*, ...) @sprintf(i8* %5, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @event_warning to i32 (i8*, ...)*)(i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"Ignoring reserved character %c\00"
define void @event_x_reserved(i32 %0) {
%2 = alloca [200 x i8]
%3 = getelementptr inbounds [200 x i8], [200 x i8]* %2, i64 0, i64 0
%4 = shl i32 %0, 24
%5 = ashr exact i32 %4, 24
%6 = call i32 (i8*, i8*, ...) @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @event_warning to i32 (i8*, ...)*)(i8* %3)
ret void
}
/* Variables and functions */
double modf(float, double *);
float modff(float x, float *iptr) {
  double y, result;
  result = modf(x, &y);
  *iptr = (float)y;
  return (float)result;
}


x86 assembly (clang, -O0):
<modff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
lea    -0x18(%rbp),%rdi
call   1030 <modf@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movsd  -0x20(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modff>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rdi
call   1030 <modf@plt>
movsd  0x8(%rsp),%xmm1
cvtsd2ss %xmm1,%xmm1
movss  %xmm1,(%rbx)
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @modff(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
%5 = alloca double
%6 = alloca double
store float %0, float* %3
store float* %1, float** %4
%7 = load float, float* %3
%8 = call double @modf(float %7, double* %5)
store double %8, double* %6
%9 = load double, double* %5
%10 = fptrunc double %9 to float
%11 = load float*, float** %4
store float %10, float* %11
%12 = load double, double* %6
%13 = fptrunc double %12 to float
ret float %13
}

LLVM IR (-O2):
define float @modff(float %0, float* nocapture writeonly %1) {
%3 = alloca double
%4 = bitcast double* %3 to i8*
%5 = call double @modf(float %0, double* %3)
%6 = load double, double* %3
%7 = fptrunc double %6 to float
store float %7, float* %1
%8 = fptrunc double %5 to float
ret float %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void _mp_free(void *pointer) { free(pointer); }


x86 assembly (clang, -O0):
<_mp_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mp_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @_mp_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @_mp_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int syscall(int, struct timespec const *, struct timespec *);
int sched_wait_interval_ex(const struct timespec *rqtp, struct timespec *rmtp) {
  return syscall(306, rqtp, rmtp);
}


x86 assembly (clang, -O0):
<sched_wait_interval_ex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x132,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_wait_interval_ex>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x132,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @sched_wait_interval_ex(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = call i32 @syscall(i32 306, %struct.timespec* %5, %struct.timespec* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @sched_wait_interval_ex(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i32 @syscall(i32 306, %struct.timespec* %0, %struct.timespec* %1)
ret i32 %3
}
int unhex(unsigned char c) {
  if (c < '@')
    return c - '0';
  return (c & 0x0f) + 9;
}


x86 assembly (clang, -O0):
<unhex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x40,%eax
jge    1126 <unhex+0x26>
movzbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1133 <unhex+0x33>
movzbl -0x5(%rbp),%eax
and    $0xf,%eax
add    $0x9,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unhex>:
lea    -0x30(%rdi),%ecx
mov    %edi,%eax
and    $0xf,%eax
add    $0x9,%eax
cmp    $0x40,%dil
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @unhex(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp slt i32 %5, 64
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = sub nsw i32 %9, 48
store i32 %10, i32* %2
br label %16
11: ; preds = %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = and i32 %13, 15
%15 = add nsw i32 %14, 9
store i32 %15, i32* %2
br label %16
16: ; preds = %11, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @unhex(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = icmp ult i8 %0, 64
%4 = add nsw i32 %2, -48
%5 = and i32 %2, 15
%6 = add nuw nsw i32 %5, 9
%7 = select i1 %3, i32 %4, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ cursor(int, int);
void cursors(void) { cursor(1, 24); }


x86 assembly (clang, -O0):
<cursors>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x18,%esi
call   1030 <cursor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cursors>:
mov    $0x1,%edi
mov    $0x18,%esi
jmp    1030 <cursor@plt>

LLVM IR (-O0):
define void @cursors() {
%1 = call i32 @cursor(i32 1, i32 24)
ret void
}

LLVM IR (-O2):
define void @cursors() {
%1 = tail call i32 @cursor(i32 1, i32 24)
ret void
}
void bu_compile_car(args) struct conscell *args;
{
  int n = bu_compile_arg_list(args);
  if (n != 1)
    goto er;
  EMIT1ATM("CAR");
  EMITEND();
  return;
er:
  cerror("car: wrong # of args", args);
}


x86 assembly (clang, -O0):
<bu_compile_car>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <bu_compile_arg_list@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     1169 <bu_compile_car+0x29>
jmp    1183 <bu_compile_car+0x43>
lea    0xe90(%rip),%rdi
mov    $0x0,%al
call   1050 <EMIT1ATM@plt>
mov    $0x0,%al
call   1030 <EMITEND@plt>
jmp    1195 <bu_compile_car+0x55>
mov    -0x8(%rbp),%rsi
lea    0xe76(%rip),%rdi
mov    $0x0,%al
call   1060 <cerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bu_compile_car>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <bu_compile_arg_list@plt>
cmp    $0x1,%eax
jne    1166 <bu_compile_car+0x26>
lea    0xea9(%rip),%rdi
xor    %eax,%eax
call   1050 <EMIT1ATM@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <EMITEND@plt>
lea    0xe97(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1060 <cerror@plt>

LLVM IR (-O0):
%struct.conscell = type opaque
@.str = [4 x i8] c"CAR\00"
@.str.1 = [21 x i8] c"car: wrong # of args\00"
define void @bu_compile_car(%struct.conscell* %0) {
%2 = alloca %struct.conscell*
%3 = alloca i32
store %struct.conscell* %0, %struct.conscell** %2
%4 = load %struct.conscell*, %struct.conscell** %2
%5 = call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
br label %12
9: ; preds = %1
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @EMITEND()
br label %15
12: ; preds = %8
%13 = load %struct.conscell*, %struct.conscell** %2
%14 = call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %13)
br label %15
15: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
%struct.conscell = type opaque
@.str = [4 x i8] c"CAR\00"
@.str.1 = [21 x i8] c"car: wrong # of args\00"
define void @bu_compile_car(%struct.conscell* %0) {
%2 = tail call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %0)
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @EMITEND()
br label %9
7: ; preds = %1
%8 = tail call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %0)
br label %9
9: ; preds = %7, %4
ret void
}
/* Variables and functions */
float logf(scalar_t__);
scalar_t__ sqrtf(float);
float asinhf(float x) { return logf(x + sqrtf(x * x + 1.f)); }


x86 assembly (clang, -O0):
<asinhf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xeb3(%rip),%xmm1
addss  %xmm1,%xmm0
call   1040 <sqrtf@plt>
movss  -0x8(%rbp),%xmm0
cvtsi2ss %rax,%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%rdi
call   1030 <logf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asinhf>:
push   %rax
movss  %xmm0,0x4(%rsp)
mulss  %xmm0,%xmm0
addss  0xecd(%rip),%xmm0
call   1040 <sqrtf@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
addss  0x4(%rsp),%xmm0
cvttss2si %xmm0,%rdi
pop    %rax
jmp    1030 <logf@plt>

LLVM IR (-O0):
define float @asinhf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = load float, float* %2
%6 = call float @llvm.fmuladd.f32(float %4, float %5, float 1.000000e+00)
%7 = call i64 @sqrtf(float %6)
%8 = sitofp i64 %7 to float
%9 = fadd float %3, %8
%10 = fptosi float %9 to i64
%11 = call float @logf(i64 %10)
ret float %11
}

LLVM IR (-O2):
define float @asinhf(float %0) {
%2 = tail call float @llvm.fmuladd.f32(float %0, float %0, float 1.000000e+00)
%3 = tail call i64 @sqrtf(float %2)
%4 = sitofp i64 %3 to float
%5 = fadd float %4, %0
%6 = fptosi float %5 to i64
%7 = tail call float @logf(i64 %6)
ret float %7
}
/* Variables and functions */
scalar_t__ dq_count_impl();
bool is_dq_empty_impl() { return dq_count_impl() == 0; }


x86 assembly (clang, -O0):
<is_dq_empty_impl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dq_count_impl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dq_empty_impl>:
push   %rax
xor    %eax,%eax
call   1030 <dq_count_impl@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_dq_empty_impl() {
%1 = call i64 (...) @dq_count_impl()
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @is_dq_empty_impl() {
%1 = tail call i64 (...) @dq_count_impl()
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
void g_type_default_interface_unref() {}


x86 assembly (clang, -O0):
<g_type_default_interface_unref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_type_default_interface_unref>:
ret

LLVM IR (-O0):
define void @g_type_default_interface_unref() {
ret void
}

LLVM IR (-O2):
define void @g_type_default_interface_unref() {
ret void
}
void __attribute__((always_)) mck_global_irq_disable() {}


x86 assembly (clang, -O0):
<mck_global_irq_disable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mck_global_irq_disable>:
ret

LLVM IR (-O0):
define void @mck_global_irq_disable() {
ret void
}

LLVM IR (-O2):
define void @mck_global_irq_disable() {
ret void
}
float vdot(float ax, float ay, float az, float bx, float by, float bz) {
  return ax * bx + ay * by + az * bz;
}


x86 assembly (clang, -O0):
<vdot>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
movss  -0x8(%rbp),%xmm0
mulss  -0x14(%rbp),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
movss  -0x18(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdot>:
mulss  %xmm4,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
mulss  %xmm5,%xmm2
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @vdot(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %7
%14 = load float, float* %10
%15 = load float, float* %8
%16 = load float, float* %11
%17 = fmul float %15, %16
%18 = call float @llvm.fmuladd.f32(float %13, float %14, float %17)
%19 = load float, float* %9
%20 = load float, float* %12
%21 = call float @llvm.fmuladd.f32(float %19, float %20, float %18)
ret float %21
}

LLVM IR (-O2):
define float @vdot(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fmul float %1, %4
%8 = tail call float @llvm.fmuladd.f32(float %0, float %3, float %7)
%9 = tail call float @llvm.fmuladd.f32(float %2, float %5, float %8)
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ parse_multiplicative_expression();
int /*<<< orphan*/ parse_unary_expression();
void accept_multiplicative_expression() {
  parse_unary_expression();
  parse_multiplicative_expression();
}


x86 assembly (clang, -O0):
<accept_multiplicative_expression>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <parse_unary_expression@plt>
mov    $0x0,%al
call   1030 <parse_multiplicative_expression@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<accept_multiplicative_expression>:
push   %rax
xor    %eax,%eax
call   1040 <parse_unary_expression@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <parse_multiplicative_expression@plt>

LLVM IR (-O0):
define void @accept_multiplicative_expression() {
%1 = call i32 (...) @parse_unary_expression()
%2 = call i32 (...) @parse_multiplicative_expression()
ret void
}

LLVM IR (-O2):
define void @accept_multiplicative_expression() {
%1 = tail call i32 (...) @parse_unary_expression()
%2 = tail call i32 (...) @parse_multiplicative_expression()
ret void
}