xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ f1(int, char *);
int main() {
  f1(1, "abc");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
lea    0xed5(%rip),%rsi
call   1030 <f1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x1,%edi
call   1030 <f1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @f1(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
define i32 @main() {
%1 = tail call i32 @f1(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x86() {
  Assert_real((isalnum(134) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              675, ("isalnum should be 0 for 0x86"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x86>:
push   %rbp
mov    %rsp,%rbp
mov    $0x86,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2a3,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x86>:
push   %rax
mov    $0x86,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2a3,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x86\00"
define void @t_isalnum_0x86() {
%1 = call i64 @isalnum(i32 134)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 675, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x86\00"
define void @t_isalnum_0x86() {
%1 = tail call i64 @isalnum(i32 134)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 675, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *p_dgettext(char const *, char const *);
int /*<<< orphan*/ setup();
char *g_libintl_dgettext(const char *domainname, const char *msgid) {
  setup();
  return p_dgettext(domainname, msgid);
}


x86 assembly (clang, -O0):
<g_libintl_dgettext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <setup@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <p_dgettext@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_libintl_dgettext>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <setup@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <p_dgettext@plt>

LLVM IR (-O0):
define i8* @g_libintl_dgettext(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 (...) @setup()
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i8* @p_dgettext(i8* %6, i8* %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @g_libintl_dgettext(i8* %0, i8* %1) {
%3 = tail call i32 (...) @setup()
%4 = tail call i8* @p_dgettext(i8* %0, i8* %1)
ret i8* %4
}
void swap(int *a, int i, int j) {
  int temp = *(a + i);
  *(a + i) = *(a + j);
  *(a + j) = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
int test_imm_23uint8_mem(unsigned char *val) {
  return ((*val) & (0x23 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_23uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x23,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_23uint8_mem>:
testb  $0x23,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_23uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 35
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_23uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 35
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
double f4_sum_pre_int_int_int_int_int_int_double(int v0, int v1, int v2, int v3,
                                                 int v4, int v5, double v) {
  return (double)v0 + (double)v1 + (double)v2 + (double)v3 + (double)v4 +
         (double)v5 + ((double)(v));
}


x86 assembly (clang, -O0):
<f4_sum_pre_int_int_int_int_int_int_double>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0x14(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0x18(%rbp),%xmm1
addsd  %xmm1,%xmm0
addsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_sum_pre_int_int_int_int_int_int_double>:
cvtsi2sd %edi,%xmm1
cvtsi2sd %esi,%xmm2
cvtsi2sd %edx,%xmm3
addsd  %xmm1,%xmm2
addsd  %xmm2,%xmm3
xorps  %xmm1,%xmm1
cvtsi2sd %ecx,%xmm1
addsd  %xmm3,%xmm1
xorps  %xmm2,%xmm2
cvtsi2sd %r8d,%xmm2
addsd  %xmm1,%xmm2
xorps  %xmm1,%xmm1
cvtsi2sd %r9d,%xmm1
addsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f4_sum_pre_int_int_int_int_int_int_double(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, double %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca double
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store double %6, double* %14
%15 = load i32, i32* %8
%16 = sitofp i32 %15 to double
%17 = load i32, i32* %9
%18 = sitofp i32 %17 to double
%19 = fadd double %16, %18
%20 = load i32, i32* %10
%21 = sitofp i32 %20 to double
%22 = fadd double %19, %21
%23 = load i32, i32* %11
%24 = sitofp i32 %23 to double
%25 = fadd double %22, %24
%26 = load i32, i32* %12
%27 = sitofp i32 %26 to double
%28 = fadd double %25, %27
%29 = load i32, i32* %13
%30 = sitofp i32 %29 to double
%31 = fadd double %28, %30
%32 = load double, double* %14
%33 = fadd double %31, %32
ret double %33
}

LLVM IR (-O2):
define double @f4_sum_pre_int_int_int_int_int_int_double(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, double %6) {
%8 = sitofp i32 %0 to double
%9 = sitofp i32 %1 to double
%10 = fadd double %8, %9
%11 = sitofp i32 %2 to double
%12 = fadd double %10, %11
%13 = sitofp i32 %3 to double
%14 = fadd double %12, %13
%15 = sitofp i32 %4 to double
%16 = fadd double %14, %15
%17 = sitofp i32 %5 to double
%18 = fadd double %16, %17
%19 = fadd double %18, %6
ret double %19
}
unsigned char uartGetc(void) {
  while (1) {
    if ((*(volatile unsigned int *)(0x7F005010)) & 1)
      break;
  }
  return (*(volatile unsigned int *)(0x7F005024));
}


x86 assembly (clang, -O0):
<uartGetc>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <uartGetc+0x9>
mov    $0x7f005010,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1121 <uartGetc+0x21>
jmp    1126 <uartGetc+0x26>
jmp    1109 <uartGetc+0x9>
mov    $0x7f005024,%eax
mov    (%rax),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uartGetc>:
testl  $0x1,0x7f005010
je     1100 <uartGetc>
mov    0x7f005024,%eax
ret

LLVM IR (-O0):
define zeroext i8 @uartGetc() {
br label %1
1: ; preds = %0, %6
%2 = load volatile i32, i32* inttoptr (i64 2130726928 to i32*)
%3 = and i32 %2, 1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %7
6: ; preds = %1
br label %1
7: ; preds = %5
%8 = load volatile i32, i32* inttoptr (i64 2130726948 to i32*)
%9 = trunc i32 %8 to i8
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @uartGetc() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* inttoptr (i64 2130726928 to i32*)
%3 = and i32 %2, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 2130726948 to i32*)
%7 = trunc i32 %6 to i8
ret i8 %7
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
intptr_t list_offset(struct list_head *left, struct list_head *right) {
  return (char *)right - (char *)left;
}


x86 assembly (clang, -O0):
<list_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_offset>:
mov    %rsi,%rax
sub    %rdi,%rax
ret

LLVM IR (-O0):
%struct.list_head = type { i32 }
define i64 @list_offset(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %4
%6 = bitcast %struct.list_head* %5 to i8*
%7 = load %struct.list_head*, %struct.list_head** %3
%8 = bitcast %struct.list_head* %7 to i8*
%9 = ptrtoint i8* %6 to i64
%10 = ptrtoint i8* %8 to i64
%11 = sub i64 %9, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define i64 @list_offset(%struct.list_head* %0, %struct.list_head* %1) {
%3 = ptrtoint %struct.list_head* %1 to i64
%4 = ptrtoint %struct.list_head* %0 to i64
%5 = sub i64 %3, %4
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void l_idx2name(int index, char *name) {
  switch (index) {
  case 0:
    strcpy(name, "CP");
    break;
  case 3:
    strcpy(name, "IFL");
    break;
  default:
    strcpy(name, "UN");
  }
}


x86 assembly (clang, -O0):
<l_idx2name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
test   %eax,%eax
je     1143 <l_idx2name+0x33>
jmp    1132 <l_idx2name+0x22>
mov    -0x14(%rbp),%eax
sub    $0x3,%eax
je     1158 <l_idx2name+0x48>
jmp    116d <l_idx2name+0x5d>
mov    -0x10(%rbp),%rdi
lea    0xeb2(%rip),%rsi
call   1030 <strcpy@plt>
jmp    117d <l_idx2name+0x6d>
mov    -0x10(%rbp),%rdi
lea    0xea0(%rip),%rsi
call   1030 <strcpy@plt>
jmp    117d <l_idx2name+0x6d>
mov    -0x10(%rbp),%rdi
lea    0xe8f(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l_idx2name>:
mov    %rsi,%rax
cmp    $0x3,%edi
lea    0xee6(%rip),%rcx
lea    0xee3(%rip),%rdx
cmove  %rcx,%rdx
test   %edi,%edi
lea    0xecf(%rip),%rsi
cmovne %rdx,%rsi
mov    %rax,%rdi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"CP\00"
@.str.1 = [4 x i8] c"IFL\00"
@.str.2 = [3 x i8] c"UN\00"
define void @l_idx2name(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
switch i32 %5, label %12 [
i32 0, label %6
i32 3, label %9
]
6: ; preds = %2
%7 = load i8*, i8** %4
%8 = call i32 @strcpy(i8* %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %15
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = call i32 @strcpy(i8* %10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
br label %15
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = call i32 @strcpy(i8* %13, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
br label %15
15: ; preds = %12, %9, %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"CP\00"
@.str.1 = [4 x i8] c"IFL\00"
@.str.2 = [3 x i8] c"UN\00"
define void @l_idx2name(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 3
%4 = select i1 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0)
%5 = icmp eq i32 %0, 0
%6 = select i1 %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4
%7 = tail call i32 @strcpy(i8* %1, i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
p() { abort(); }


x86 assembly (clang, -O0):
<p>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<p>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @p() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define i32 @p() {
%1 = tail call i32 (...) @abort()
unreachable
}
void check_tcp_syn_cookie(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<check_tcp_syn_cookie>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_tcp_syn_cookie>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.check_tcp_syn_cookie = [21 x i8] c"check_tcp_syn_cookie\00"
define void @check_tcp_syn_cookie() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.check_tcp_syn_cookie, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.check_tcp_syn_cookie = [21 x i8] c"check_tcp_syn_cookie\00"
define void @check_tcp_syn_cookie() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.check_tcp_syn_cookie, i64 0, i64 0))
ret void
}
/* Variables and functions */
size_t round_up(size_t n, size_t div) {
  size_t mask = div - 1;
  return (n + mask) & ~mask;
}


x86 assembly (clang, -O0):
<round_up>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    -0x18(%rbp),%rax
mov    -0x18(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up>:
lea    (%rdi,%rsi,1),%rax
add    $0xffffffffffffffff,%rax
neg    %rsi
and    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @round_up(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
store i64 %7, i64* %5
%8 = load i64, i64* %3
%9 = load i64, i64* %5
%10 = add i64 %8, %9
%11 = load i64, i64* %5
%12 = xor i64 %11, -1
%13 = and i64 %10, %12
ret i64 %13
}

LLVM IR (-O2):
define i64 @round_up(i64 %0, i64 %1) {
%3 = add i64 %0, -1
%4 = add i64 %3, %1
%5 = sub i64 0, %1
%6 = and i64 %4, %5
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ emit_andimm(int, int, int);
void do_rhash(int rs, int rh) { emit_andimm(rs, 0x1f0, rh); }


x86 assembly (clang, -O0):
<do_rhash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x1f0,%esi
call   1030 <emit_andimm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_rhash>:
mov    %esi,%edx
mov    $0x1f0,%esi
jmp    1030 <emit_andimm@plt>

LLVM IR (-O0):
define void @do_rhash(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @emit_andimm(i32 %5, i32 496, i32 %6)
ret void
}

LLVM IR (-O2):
define void @do_rhash(i32 %0, i32 %1) {
%3 = tail call i32 @emit_andimm(i32 %0, i32 496, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ left_motor(int);
int /*<<< orphan*/ right_motor(int);
void move(int speed) {
  left_motor(speed);
  right_motor(speed);
}


x86 assembly (clang, -O0):
<move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <left_motor@plt>
mov    -0x4(%rbp),%edi
call   1040 <right_motor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move>:
push   %rbx
mov    %edi,%ebx
call   1030 <left_motor@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <right_motor@plt>

LLVM IR (-O0):
define void @move(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @left_motor(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @right_motor(i32 %5)
ret void
}

LLVM IR (-O2):
define void @move(i32 %0) {
%2 = tail call i32 @left_motor(i32 %0)
%3 = tail call i32 @right_motor(i32 %0)
ret void
}
/* Variables and functions */
char *mem_alloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *mem_strdup(char *str) {
  char *s;
  s = mem_alloc(strlen(str) + 1);
  if (s != NULL)
    strcpy(s, str);
  return (s);
}


x86 assembly (clang, -O0):
<mem_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <mem_alloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <mem_strdup+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <mem_alloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <mem_strdup+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @mem_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @mem_alloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
br label %14
14: ; preds = %10, %1
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @mem_strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @mem_alloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %4, i8* %0)
br label %8
8: ; preds = %6, %1
ret i8* %4
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int /*<<< orphan*/ bubbleSort(int *, int);
int main() {
  int *numbers;
  int array_size = __VERIFIER_nondet_int();
  bubbleSort(numbers, array_size);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <bubbleSort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,%esi
call   1030 <bubbleSort@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %3
%5 = load i32*, i32** %2
%6 = load i32, i32* %3
%7 = call i32 @bubbleSort(i32* %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 @bubbleSort(i32* undef, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ MADV_SEQUENTIAL;
int madvise(void *, size_t, int /*<<< orphan*/);
size_t pageAlignLen(void *, size_t);
void *pageAlignStart(void *);
int sasMsyncSequential(void *startAddr, size_t size) {
  void *alignAddr = pageAlignStart(startAddr);
  size_t alignSize = pageAlignLen(startAddr, size);
  return madvise(alignAddr, alignSize, MADV_SEQUENTIAL);
}


x86 assembly (clang, -O0):
<sasMsyncSequential>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pageAlignStart@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <pageAlignLen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    0x2e6b(%rip),%rax
mov    (%rax),%edx
call   1050 <madvise@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sasMsyncSequential>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <pageAlignStart@plt>
mov    %rax,%r15
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <pageAlignLen@plt>
mov    0x2e83(%rip),%rcx
mov    (%rcx),%edx
mov    %r15,%rdi
mov    %rax,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <madvise@plt>

LLVM IR (-O0):
@MADV_SEQUENTIAL = global i32 0
define i32 @sasMsyncSequential(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
%8 = call i8* @pageAlignStart(i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i64 @pageAlignLen(i8* %9, i64 %10)
store i64 %11, i64* %6
%12 = load i8*, i8** %5
%13 = load i64, i64* %6
%14 = load i32, i32* @MADV_SEQUENTIAL
%15 = call i32 @madvise(i8* %12, i64 %13, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
@MADV_SEQUENTIAL = global i32 0
define i32 @sasMsyncSequential(i8* %0, i64 %1) {
%3 = tail call i8* @pageAlignStart(i8* %0)
%4 = tail call i64 @pageAlignLen(i8* %0, i64 %1)
%5 = load i32, i32* @MADV_SEQUENTIAL
%6 = tail call i32 @madvise(i8* %3, i64 %4, i32 %5)
ret i32 %6
}
int check(int *p, int n) {
  for (int i = 1; i < n; i++)
    if ((*(p + i)) != (*p))
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1154 <check+0x54>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
je     1141 <check+0x41>
movl   $0x0,-0x4(%rbp)
jmp    115b <check+0x5b>
jmp    1146 <check+0x46>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <check+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
mov    $0x1,%eax
cmp    $0x2,%esi
jl     1139 <check+0x39>
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    %ecx,0x4(%rdi)
jne    1139 <check+0x39>
mov    %esi,%edx
mov    $0x2,%eax
nopw   0x0(%rax,%rax,1)
mov    %rax,%rsi
cmp    %rax,%rdx
je     1131 <check+0x31>
lea    0x1(%rsi),%rax
cmp    %ecx,(%rdi,%rsi,4)
je     1120 <check+0x20>
xor    %eax,%eax
cmp    %rdx,%rsi
setae  %al
ret

LLVM IR (-O0):
define i32 @check(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 1, i32* %6
br label %7
7: ; preds = %22, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %25
11: ; preds = %7
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = load i32*, i32** %4
%18 = load i32, i32* %17
%19 = icmp ne i32 %16, %18
br i1 %19, label %20, label %21
20: ; preds = %11
store i32 0, i32* %3
br label %26
21: ; preds = %11
br label %22
22: ; preds = %21
%23 = load i32, i32* %6
%24 = add nsw i32 %23, 1
store i32 %24, i32* %6
br label %7
25: ; preds = %7
store i32 1, i32* %3
br label %26
26: ; preds = %25, %20
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @check(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %22
4: ; preds = %2
%5 = load i32, i32* %0
%6 = zext i32 %1 to i64
%7 = zext i32 %1 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 1
%9 = load i32, i32* %8
%10 = icmp eq i32 %9, %5
br i1 %10, label %11, label %22
11: ; preds = %4, %14
%12 = phi i64 [ %18, %14 ], [ 2, %4 ]
%13 = icmp eq i64 %12, %7
br i1 %13, label %19, label %14
14: ; preds = %11
%15 = getelementptr inbounds i32, i32* %0, i64 %12
%16 = load i32, i32* %15
%17 = icmp eq i32 %16, %5
%18 = add nuw nsw i64 %12, 1
br i1 %17, label %11, label %19
19: ; preds = %11, %14
%20 = icmp uge i64 %12, %6
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %19, %4, %2
%23 = phi i32 [ 1, %2 ], [ 0, %4 ], [ %21, %19 ]
ret i32 %23
}
unsigned int pack_rgba(int r, int g, int b, int a) {
  return (unsigned int)r | ((unsigned int)g << 8) | ((unsigned int)b << 16) |
         ((unsigned int)a << 24);
}


x86 assembly (clang, -O0):
<pack_rgba>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pack_rgba>:
mov    %ecx,%eax
shl    $0x8,%esi
or     %edi,%esi
shl    $0x10,%edx
shl    $0x18,%eax
or     %edx,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @pack_rgba(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = shl i32 %10, 8
%12 = or i32 %9, %11
%13 = load i32, i32* %7
%14 = shl i32 %13, 16
%15 = or i32 %12, %14
%16 = load i32, i32* %8
%17 = shl i32 %16, 24
%18 = or i32 %15, %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @pack_rgba(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 8
%6 = or i32 %5, %0
%7 = shl i32 %2, 16
%8 = or i32 %6, %7
%9 = shl i32 %3, 24
%10 = or i32 %8, %9
ret i32 %10
}
/* Variables and functions */
double remquo(double, double, int *);
double remainder(double x, double y) {
  int q;
  return remquo(x, y, &q);
}


x86 assembly (clang, -O0):
<remainder>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    -0x14(%rbp),%rdi
call   1030 <remquo@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remainder>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <remquo@plt>
pop    %rax
ret

LLVM IR (-O0):
define double @remainder(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = call double @remquo(double %6, double %7, i32* %5)
ret double %8
}

LLVM IR (-O2):
define double @remainder(double %0, double %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call double @remquo(double %0, double %1, i32* %3)
ret double %5
}
double chdtrc(df, x)
double df, x;
{
  if ((x < 0.0) || (df < 1.0)) {
    mtherr("chdtrc", 1);
    return (0.0);
  }
  return (igamc(df / 2.0, x / 2.0));
}


x86 assembly (clang, -O0):
<chdtrc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x18(%rbp),%xmm0
ja     1153 <chdtrc+0x33>
movsd  0xeb8(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1173 <chdtrc+0x53>
lea    0xeb6(%rip),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1040 <mtherr@plt>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11a5 <chdtrc+0x85>
movsd  -0x10(%rbp),%xmm0
movsd  0xe88(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  0xe77(%rip),%xmm2
divsd  %xmm2,%xmm1
mov    $0x2,%al
call   1030 <igamc@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chdtrc>:
push   %rax
movsd  0xed7(%rip),%xmm2
ucomisd %xmm0,%xmm2
ja     1159 <chdtrc+0x39>
xorpd  %xmm2,%xmm2
ucomisd %xmm1,%xmm2
ja     1159 <chdtrc+0x39>
movsd  0xec7(%rip),%xmm2
mulsd  %xmm2,%xmm0
mulsd  %xmm2,%xmm1
mov    $0x2,%al
call   1030 <igamc@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret
lea    0xeb0(%rip),%rdi
mov    $0x1,%esi
xor    %eax,%eax
call   1040 <mtherr@plt>
xorpd  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"chdtrc\00"
define double @chdtrc(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %5
%7 = fcmp olt double %6, 0.000000e+00
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load double, double* %4
%10 = fcmp olt double %9, 1.000000e+00
br i1 %10, label %11, label %13
11: ; preds = %8, %2
%12 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @mtherr to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 1)
store double 0.000000e+00, double* %3
br label %20
13: ; preds = %8
%14 = load double, double* %4
%15 = fdiv double %14, 2.000000e+00
%16 = load double, double* %5
%17 = fdiv double %16, 2.000000e+00
%18 = call i32 (double, double, ...) bitcast (i32 (...)* @igamc to i32 (double, double, ...)*)(double %15, double %17)
%19 = sitofp i32 %18 to double
store double %19, double* %3
br label %20
20: ; preds = %13, %11
%21 = load double, double* %3
ret double %21
}

LLVM IR (-O2):
@.str = [7 x i8] c"chdtrc\00"
define double @chdtrc(double %0, double %1) {
%3 = fcmp olt double %1, 0.000000e+00
%4 = fcmp olt double %0, 1.000000e+00
%5 = or i1 %4, %3
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @mtherr to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 1)
br label %13
8: ; preds = %2
%9 = fmul double %0, 5.000000e-01
%10 = fmul double %1, 5.000000e-01
%11 = tail call i32 (double, double, ...) bitcast (i32 (...)* @igamc to i32 (double, double, ...)*)(double %9, double %10)
%12 = sitofp i32 %11 to double
br label %13
13: ; preds = %8, %6
%14 = phi double [ 0.000000e+00, %6 ], [ %12, %8 ]
ret double %14
}
/* Type definitions */
struct activity {
  int dummy;
};

/* Variables and functions */
int get_fan_nr();
int wrap_get_fan_nr(struct activity *a) {
  int n;
  if ((n = get_fan_nr()) > 4096)
    return 4096;
  else
    return n;
}


x86 assembly (clang, -O0):
<wrap_get_fan_nr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <get_fan_nr@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x1000,%eax
jle    113d <wrap_get_fan_nr+0x2d>
movl   $0x1000,-0x4(%rbp)
jmp    1143 <wrap_get_fan_nr+0x33>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_get_fan_nr>:
push   %rax
xor    %eax,%eax
call   1030 <get_fan_nr@plt>
cmp    $0x1000,%eax
mov    $0x1000,%ecx
cmovge %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.activity = type { i32 }
define i32 @wrap_get_fan_nr(%struct.activity* %0) {
%2 = alloca i32
%3 = alloca %struct.activity*
%4 = alloca i32
store %struct.activity* %0, %struct.activity** %3
%5 = call i32 (...) @get_fan_nr()
store i32 %5, i32* %4
%6 = icmp sgt i32 %5, 4096
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 4096, i32* %2
br label %10
8: ; preds = %1
%9 = load i32, i32* %4
store i32 %9, i32* %2
br label %10
10: ; preds = %8, %7
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.activity = type { i32 }
define i32 @wrap_get_fan_nr(%struct.activity* nocapture readnone %0) {
%2 = tail call i32 (...) @get_fan_nr()
%3 = icmp slt i32 %2, 4096
%4 = select i1 %3, i32 %2, i32 4096
ret i32 %4
}
/* Type definitions */
struct page {
  int dummy;
};

/* Variables and functions */
int __lock_page_killable(struct page *);
int /*<<< orphan*/ trylock_page(struct page *);
__attribute__((always_)) int lock_page_killable(struct page *page) {
  do {
    do {
    } while (0);
  } while (0);
  if (!trylock_page(page))
    return __lock_page_killable(page);
  return 0;
}


x86 assembly (clang, -O0):
<lock_page_killable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
jmp    1131 <lock_page_killable+0x11>
jmp    1136 <lock_page_killable+0x16>
jmp    113b <lock_page_killable+0x1b>
mov    -0x10(%rbp),%rdi
call   1040 <trylock_page@plt>
cmp    $0x0,%eax
jne    115e <lock_page_killable+0x3e>
mov    -0x10(%rbp),%rdi
call   1030 <__lock_page_killable@plt>
mov    %eax,-0x4(%rbp)
jmp    1165 <lock_page_killable+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_page_killable>:
push   %rbx
mov    %rdi,%rbx
call   1040 <trylock_page@plt>
test   %eax,%eax
je     1131 <lock_page_killable+0x11>
xor    %eax,%eax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <__lock_page_killable@plt>

LLVM IR (-O0):
%struct.page = type { i32 }
define i32 @lock_page_killable(%struct.page* %0) {
%2 = alloca i32
%3 = alloca %struct.page*
store %struct.page* %0, %struct.page** %3
br label %4
4: ; preds = %1
br label %5
5: ; preds = %4
br label %6
6: ; preds = %5
br label %7
7: ; preds = %6
%8 = load %struct.page*, %struct.page** %3
%9 = call i32 @trylock_page(%struct.page* %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %7
%12 = load %struct.page*, %struct.page** %3
%13 = call i32 @__lock_page_killable(%struct.page* %12)
store i32 %13, i32* %2
br label %15
14: ; preds = %7
store i32 0, i32* %2
br label %15
15: ; preds = %14, %11
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.page = type { i32 }
define i32 @lock_page_killable(%struct.page* %0) {
%2 = tail call i32 @trylock_page(%struct.page* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @__lock_page_killable(%struct.page* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
struct lframe {
  int dummy;
};
struct lemon {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ machine_del_pause(struct lemon *, struct lframe *);
void lemon_machine_del_pause(struct lemon *lemon, struct lframe *frame) {
  machine_del_pause(lemon, frame);
}


x86 assembly (clang, -O0):
<lemon_machine_del_pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <machine_del_pause@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lemon_machine_del_pause>:
jmp    1030 <machine_del_pause@plt>

LLVM IR (-O0):
%struct.lemon = type { i32 }
%struct.lframe = type { i32 }
define void @lemon_machine_del_pause(%struct.lemon* %0, %struct.lframe* %1) {
%3 = alloca %struct.lemon*
%4 = alloca %struct.lframe*
store %struct.lemon* %0, %struct.lemon** %3
store %struct.lframe* %1, %struct.lframe** %4
%5 = load %struct.lemon*, %struct.lemon** %3
%6 = load %struct.lframe*, %struct.lframe** %4
%7 = call i32 @machine_del_pause(%struct.lemon* %5, %struct.lframe* %6)
ret void
}

LLVM IR (-O2):
%struct.lemon = type { i32 }
%struct.lframe = type { i32 }
define void @lemon_machine_del_pause(%struct.lemon* %0, %struct.lframe* %1) {
%3 = tail call i32 @machine_del_pause(%struct.lemon* %0, %struct.lframe* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ doubler(int *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int orig = 12;
  printf("orig: %d\n", orig);
  doubler(&orig);
  printf("orig: %d\n", orig);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xc,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
lea    -0x8(%rbp),%rdi
call   1040 <doubler@plt>
mov    -0x8(%rbp),%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0xc,0xc(%rsp)
lea    0xecc(%rip),%rbx
mov    %rbx,%rdi
mov    $0xc,%esi
call   1030 <printf@plt>
lea    0xc(%rsp),%rdi
call   1040 <doubler@plt>
mov    0xc(%rsp),%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"orig: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 12, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @doubler(i32* %2)
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"orig: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 12, i32* %1
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 12)
%4 = call i32 @doubler(i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Type definitions */
struct dns_packet {
  int dummy;
};

/* Variables and functions */
unsigned short dns_rr_len(unsigned short, struct dns_packet *);
unsigned short dns_rr_skip(unsigned short src, struct dns_packet *P) {
  return src + dns_rr_len(src, P);
}


x86 assembly (clang, -O0):
<dns_rr_skip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x2(%rbp),%ax
mov    -0x10(%rbp),%rsi
movzwl %ax,%edi
call   1030 <dns_rr_len@plt>
mov    %ax,%cx
mov    -0x14(%rbp),%eax
movzwl %cx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_rr_skip>:
push   %rbx
mov    %edi,%ebx
call   1030 <dns_rr_len@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.dns_packet = type { i32 }
define zeroext i16 @dns_rr_skip(i16 zeroext %0, %struct.dns_packet* %1) {
%3 = alloca i16
%4 = alloca %struct.dns_packet*
store i16 %0, i16* %3
store %struct.dns_packet* %1, %struct.dns_packet** %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i16, i16* %3
%8 = load %struct.dns_packet*, %struct.dns_packet** %4
%9 = call zeroext i16 @dns_rr_len(i16 zeroext %7, %struct.dns_packet* %8)
%10 = zext i16 %9 to i32
%11 = add nsw i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
%struct.dns_packet = type { i32 }
define zeroext i16 @dns_rr_skip(i16 zeroext %0, %struct.dns_packet* %1) {
%3 = tail call zeroext i16 @dns_rr_len(i16 zeroext %0, %struct.dns_packet* %1)
%4 = add i16 %3, %0
ret i16 %4
}
unsigned int lcm(unsigned int x, unsigned int y) {
  unsigned int m = x, n = y, o;
  while ((o = m % n)) {
    m = n;
    n = o;
  }
  return (x / n) * y;
}


x86 assembly (clang, -O0):
<lcm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    %edx,%edx
divl   -0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmp    $0x0,%edx
je     113b <lcm+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <lcm+0x16>
mov    -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0x10(%rbp)
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcm>:
mov    %esi,%edx
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ecx,%eax
mov    %edx,%ecx
xor    %edx,%edx
div    %ecx
test   %edx,%edx
jne    1110 <lcm+0x10>
mov    %edi,%eax
xor    %edx,%edx
div    %ecx
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @lcm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
store i32 %8, i32* %5
%9 = load i32, i32* %4
store i32 %9, i32* %6
br label %10
10: ; preds = %15, %2
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = urem i32 %11, %12
store i32 %13, i32* %7
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i32, i32* %6
store i32 %16, i32* %5
%17 = load i32, i32* %7
store i32 %17, i32* %6
br label %10
18: ; preds = %10
%19 = load i32, i32* %3
%20 = load i32, i32* %6
%21 = udiv i32 %19, %20
%22 = load i32, i32* %4
%23 = mul i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @lcm(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %1, %2 ], [ %6, %3 ]
%5 = phi i32 [ %0, %2 ], [ %4, %3 ]
%6 = urem i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = udiv i32 %0, %4
%10 = mul i32 %9, %1
ret i32 %10
}
void INTS(unsigned char on) {
  if (on) {
    asm("sti");
  } else {
    asm("cli");
  }
}


x86 assembly (clang, -O0):
<INTS>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     111a <INTS+0x1a>
sti
jmp    111b <INTS+0x1b>
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<INTS>:
test   %edi,%edi
je     1106 <INTS+0x6>
sti
ret
cli
ret

LLVM IR (-O0):
define void @INTS(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @INTS(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %4, label %3
3: ; preds = %1
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
br label %5
4: ; preds = %1
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
br label %5
5: ; preds = %4, %3
ret void
}
void PROXY_POLICY_free(void) {}


x86 assembly (clang, -O0):
<PROXY_POLICY_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PROXY_POLICY_free>:
ret

LLVM IR (-O0):
define void @PROXY_POLICY_free() {
ret void
}

LLVM IR (-O2):
define void @PROXY_POLICY_free() {
ret void
}
/* Variables and functions */
int mult(int, int);
int mst_random(int seed) {
  int tmp;
  int tmp___0;
  {
    tmp___0 = mult(seed, 31415821);
    tmp = tmp___0 + 1;
    return (tmp);
  }
}


x86 assembly (clang, -O0):
<mst_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1df5e0d,%esi
call   1030 <mult@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mst_random>:
push   %rax
mov    $0x1df5e0d,%esi
call   1030 <mult@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mst_random(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @mult(i32 %5, i32 31415821)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @mst_random(i32 %0) {
%2 = tail call i32 @mult(i32 %0, i32 31415821)
%3 = add nsw i32 %2, 1
ret i32 %3
}
unsigned short _rc2_ror(unsigned short input, int places) {
  unsigned short temp, i;
  for (i = 0; i < places; i++) {
    temp = input & 0x1;
    input = input >> 1;
    if (temp) {
      input = input + 0x8000;
    }
  }
  return input;
}


x86 assembly (clang, -O0):
<_rc2_ror>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movw   $0x0,-0xc(%rbp)
movzwl -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1165 <_rc2_ror+0x65>
movzwl -0x2(%rbp),%eax
and    $0x1,%eax
mov    %ax,-0xa(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x1,%eax
mov    %ax,-0x2(%rbp)
cmpw   $0x0,-0xa(%rbp)
je     114f <_rc2_ror+0x4f>
movzwl -0x2(%rbp),%eax
add    $0x8000,%eax
mov    %ax,-0x2(%rbp)
jmp    1154 <_rc2_ror+0x54>
mov    -0xc(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xc(%rbp)
jmp    1114 <_rc2_ror+0x14>
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rc2_ror>:
mov    %edi,%eax
test   %esi,%esi
jle    111d <_rc2_ror+0x1d>
mov    $0x1,%cx
nopw   0x0(%rax,%rax,1)
ror    %ax
movzwl %cx,%edx
add    $0x1,%ecx
cmp    %esi,%edx
jl     1110 <_rc2_ror+0x10>
ret

LLVM IR (-O0):
define zeroext i16 @_rc2_ror(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
%5 = alloca i16
%6 = alloca i16
store i16 %0, i16* %3
store i32 %1, i32* %4
store i16 0, i16* %6
br label %7
7: ; preds = %29, %2
%8 = load i16, i16* %6
%9 = zext i16 %8 to i32
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %32
12: ; preds = %7
%13 = load i16, i16* %3
%14 = zext i16 %13 to i32
%15 = and i32 %14, 1
%16 = trunc i32 %15 to i16
store i16 %16, i16* %5
%17 = load i16, i16* %3
%18 = zext i16 %17 to i32
%19 = ashr i32 %18, 1
%20 = trunc i32 %19 to i16
store i16 %20, i16* %3
%21 = load i16, i16* %5
%22 = icmp ne i16 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %12
%24 = load i16, i16* %3
%25 = zext i16 %24 to i32
%26 = add nsw i32 %25, 32768
%27 = trunc i32 %26 to i16
store i16 %27, i16* %3
br label %28
28: ; preds = %23, %12
br label %29
29: ; preds = %28
%30 = load i16, i16* %6
%31 = add i16 %30, 1
store i16 %31, i16* %6
br label %7
32: ; preds = %7
%33 = load i16, i16* %3
ret i16 %33
}

LLVM IR (-O2):
define zeroext i16 @_rc2_ror(i16 zeroext %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i16 [ %8, %4 ], [ 0, %2 ]
%6 = phi i16 [ %7, %4 ], [ %0, %2 ]
%7 = tail call i16 @llvm.fshl.i16(i16 %6, i16 %6, i16 15)
%8 = add i16 %5, 1
%9 = zext i16 %8 to i32
%10 = icmp slt i32 %9, %1
br i1 %10, label %4, label %11
11: ; preds = %4, %2
%12 = phi i16 [ %0, %2 ], [ %7, %4 ]
ret i16 %12
}