xunge/DecIR huggingface dataset:
void gdk_drawable_get_type() {}


x86 assembly (clang, -O0):
<gdk_drawable_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_drawable_get_type>:
ret

LLVM IR (-O0):
define void @gdk_drawable_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_drawable_get_type() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int open(const char *path, int mode) {
  (void)path;
  (void)mode;
  errno = EINVAL;
  return -1;
}


x86 assembly (clang, -O0):
<open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec5(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @open(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @EINVAL
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @open(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @EINVAL
store i32 %3, i32* @errno
ret i32 -1
}
/* Type definitions */
struct msghdr {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ __socketcall(int, unsigned long *);
ssize_t __libc_recvmsg(int sockfd, struct msghdr *msg, int flags) {
  unsigned long args[3];
  args[0] = sockfd;
  args[1] = (unsigned long)msg;
  args[2] = flags;
  return (__socketcall(17, args));
}


x86 assembly (clang, -O0):
<__libc_recvmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movslq -0x14(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x30(%rbp),%rsi
mov    $0x11,%edi
call   1030 <__socketcall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_recvmsg>:
sub    $0x18,%rsp
movslq %edi,%rax
mov    %rax,(%rsp)
mov    %rsi,0x8(%rsp)
movslq %edx,%rax
mov    %rax,0x10(%rsp)
mov    %rsp,%rsi
mov    $0x11,%edi
call   1030 <__socketcall@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.msghdr = type { i32 }
define i32 @__libc_recvmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msghdr*
%6 = alloca i32
%7 = alloca [3 x i64]
store i32 %0, i32* %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [3 x i64], [3 x i64]* %7, i64 0, i64 0
store i64 %9, i64* %10
%11 = load %struct.msghdr*, %struct.msghdr** %5
%12 = ptrtoint %struct.msghdr* %11 to i64
%13 = getelementptr inbounds [3 x i64], [3 x i64]* %7, i64 0, i64 1
store i64 %12, i64* %13
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [3 x i64], [3 x i64]* %7, i64 0, i64 2
store i64 %15, i64* %16
%17 = getelementptr inbounds [3 x i64], [3 x i64]* %7, i64 0, i64 0
%18 = call i32 @__socketcall(i32 17, i64* %17)
ret i32 %18
}

LLVM IR (-O2):
%struct.msghdr = type { i32 }
define i32 @__libc_recvmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca [3 x i64]
%5 = bitcast [3 x i64]* %4 to i8*
%6 = sext i32 %0 to i64
%7 = getelementptr inbounds [3 x i64], [3 x i64]* %4, i64 0, i64 0
store i64 %6, i64* %7
%8 = ptrtoint %struct.msghdr* %1 to i64
%9 = getelementptr inbounds [3 x i64], [3 x i64]* %4, i64 0, i64 1
store i64 %8, i64* %9
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds [3 x i64], [3 x i64]* %4, i64 0, i64 2
store i64 %10, i64* %11
%12 = call i32 @__socketcall(i32 17, i64* %7)
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ nsc_assert(int);
void sched_prio(void) {
  nsc_assert(0 && "This function is unimplemented.");
  ;
}


x86 assembly (clang, -O0):
<sched_prio>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_prio>:
xor    %edi,%edi
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
define void @sched_prio() {
%1 = call i32 @nsc_assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @sched_prio() {
%1 = tail call i32 @nsc_assert(i32 0)
ret void
}
int test_imm_5Buint16_mem(unsigned short *val) {
  return ((*val) & (0x5B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Buint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Buint16_mem>:
testb  $0x5b,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Buint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 91
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Buint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 91
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int picked5() { return 0; }


x86 assembly (clang, -O0):
<picked5>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<picked5>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @picked5() {
ret i32 0
}

LLVM IR (-O2):
define i32 @picked5() {
ret i32 0
}
void termop_unhandled(struct ansiseq *s) {
  tnc_log_log(
      7, 3, -1,
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c",
      201, __func__, "unrecognized:");
  ansiseq_dump(s);
}


x86 assembly (clang, -O0):
<termop_unhandled>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x7,%edi
mov    $0x3,%esi
mov    $0xffffffff,%edx
lea    0xebe(%rip),%rcx
mov    $0xc9,%r8d
lea    0xf37(%rip),%r9
lea    0xf41(%rip),%rax
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <tnc_log_log@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <ansiseq_dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<termop_unhandled>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xf68(%rip),%rax
mov    %rax,(%rsp)
lea    0xec6(%rip),%rcx
lea    0xf45(%rip),%r9
mov    $0x7,%edi
mov    $0x3,%esi
mov    $0xffffffff,%edx
mov    $0xc9,%r8d
xor    %eax,%eax
call   1030 <tnc_log_log@plt>
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <ansiseq_dump@plt>

LLVM IR (-O0):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_unhandled = [17 x i8] c"termop_unhandled\00"
@.str.1 = [14 x i8] c"unrecognized:\00"
define void @termop_unhandled(%struct.ansiseq* %0) {
%2 = alloca %struct.ansiseq*
store %struct.ansiseq* %0, %struct.ansiseq** %2
%3 = call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 3, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 201, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.termop_unhandled, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%4 = load %struct.ansiseq*, %struct.ansiseq** %2
%5 = call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %4)
ret void
}

LLVM IR (-O2):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_unhandled = [17 x i8] c"termop_unhandled\00"
@.str.1 = [14 x i8] c"unrecognized:\00"
define void @termop_unhandled(%struct.ansiseq* %0) {
%2 = tail call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 3, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 201, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.termop_unhandled, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %0)
ret void
}
void pass(void) {}


x86 assembly (clang, -O0):
<pass>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass>:
ret

LLVM IR (-O0):
define void @pass() {
ret void
}

LLVM IR (-O2):
define void @pass() {
ret void
}
int test_imm_9Euint8_mem(unsigned char *val) {
  return ((*val) & (-0x9E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Euint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff62,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Euint8_mem>:
testb  $0x62,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Euint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -158
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Euint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 98
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void setst(short unsigned int bits, char *chars) {}


x86 assembly (clang, -O0):
<setst>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setst>:
ret

LLVM IR (-O0):
define void @setst(i16 zeroext %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
store i16 %0, i16* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @setst(i16 zeroext %0, i8* nocapture %1) {
ret void
}
void clean(int box[5][5]) {
  int i, j;
  for (i = 0; i < 5; i++)
    for (j = 0; j < 5; j++)
      box[i][j] = 0;
}


x86 assembly (clang, -O0):
<clean>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    1165 <clean+0x65>
movl   $0x0,-0x10(%rbp)
cmpl   $0x5,-0x10(%rbp)
jge    1152 <clean+0x52>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
imul   $0x14,%rcx,%rcx
add    %rcx,%rax
movslq -0x10(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1120 <clean+0x20>
jmp    1157 <clean+0x57>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <clean+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clean>:
xorps  %xmm0,%xmm0
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
movl   $0x0,0x60(%rdi)
ret

LLVM IR (-O0):
define void @clean([5 x i32]* %0) {
%2 = alloca [5 x i32]*
%3 = alloca i32
%4 = alloca i32
store [5 x i32]* %0, [5 x i32]** %2
store i32 0, i32* %3
br label %5
5: ; preds = %24, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %27
8: ; preds = %5
store i32 0, i32* %4
br label %9
9: ; preds = %20, %8
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 5
br i1 %11, label %12, label %23
12: ; preds = %9
%13 = load [5 x i32]*, [5 x i32]** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [5 x i32], [5 x i32]* %13, i64 %15
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds [5 x i32], [5 x i32]* %16, i64 0, i64 %18
store i32 0, i32* %19
br label %20
20: ; preds = %12
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %9
23: ; preds = %9
br label %24
24: ; preds = %23
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %5
27: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @clean([5 x i32]* nocapture writeonly %0) {
%2 = bitcast [5 x i32]* %0 to i8*
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, double, ...);
char *dtostrf(double val, signed char width, unsigned char prec, char *sout) {
  __asm(".global _printf_float");
  char fmt[20];
  sprintf(fmt, "%%%d.%df", width, prec);
  sprintf(sout, fmt, val);
  return sout;
}


x86 assembly (clang, -O0):
<dtostrf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %sil,%al
mov    %dil,%cl
movsd  %xmm0,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
movsbl -0x9(%rbp),%eax
cvtsi2sd %eax,%xmm0
movzbl -0xa(%rbp),%edx
lea    0xebc(%rip),%rsi
mov    $0x1,%al
call   1030 <sprintf@plt>
mov    -0x18(%rbp),%rdi
lea    -0x30(%rbp),%rsi
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%al
call   1030 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtostrf>:
push   %r14
push   %rbx
sub    $0x28,%rsp
mov    %rdx,%rbx
mov    %esi,%edx
movsd  %xmm0,0x8(%rsp)
xorps  %xmm0,%xmm0
cvtsi2sd %edi,%xmm0
lea    0xed0(%rip),%rsi
lea    0x10(%rsp),%r14
mov    %r14,%rdi
mov    $0x1,%al
call   1030 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
movsd  0x8(%rsp),%xmm0
mov    $0x1,%al
call   1030 <sprintf@plt>
mov    %rbx,%rax
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%%%d.%df\00"
define i8* @dtostrf(double %0, i8 signext %1, i8 zeroext %2, i8* %3) {
%5 = alloca double
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8*
%9 = alloca [20 x i8]
store double %0, double* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8* %3, i8** %8
%10 = getelementptr inbounds [20 x i8], [20 x i8]* %9, i64 0, i64 0
%11 = load i8, i8* %6
%12 = sitofp i8 %11 to double
%13 = load i8, i8* %7
%14 = zext i8 %13 to i32
%15 = call i32 (i8*, i8*, double, ...) @sprintf(i8* %10, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), double %12, i32 %14)
%16 = load i8*, i8** %8
%17 = getelementptr inbounds [20 x i8], [20 x i8]* %9, i64 0, i64 0
%18 = load double, double* %5
%19 = call i32 (i8*, i8*, double, ...) @sprintf(i8* %16, i8* %17, double %18)
%20 = load i8*, i8** %8
ret i8* %20
}

LLVM IR (-O2):
@.str = [9 x i8] c"%%%d.%df\00"
define i8* @dtostrf(double %0, i8 signext %1, i8 zeroext %2, i8* returned writeonly %3) {
%5 = alloca [20 x i8]
tail call void asm sideeffect ".global _printf_float", "~{dirflag},~{fpsr},~{flags}"()
%6 = getelementptr inbounds [20 x i8], [20 x i8]* %5, i64 0, i64 0
%7 = sitofp i8 %1 to double
%8 = zext i8 %2 to i32
%9 = call i32 (i8*, i8*, double, ...) @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), double %7, i32 %8)
%10 = call i32 (i8*, i8*, double, ...) @sprintf(i8* dereferenceable(1) %3, i8* %6, double %0)
ret i8* %3
}
void cdrbtr(ibuf, iword, ibitlc, iwidth, next) int *iword, *ibitlc, *iwidth;
unsigned ibuf[], *next;
{ cdrupk(ibuf, iword, ibitlc, iwidth, next); }


x86 assembly (clang, -O0):
<cdrbtr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    $0x0,%al
call   1030 <cdrupk@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdrbtr>:
xor    %eax,%eax
jmp    1030 <cdrupk@plt>

LLVM IR (-O0):
define void @cdrbtr(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32*, i32** %6
%12 = load i32*, i32** %7
%13 = load i32*, i32** %8
%14 = load i32*, i32** %9
%15 = load i32*, i32** %10
%16 = call i32 (i32*, i32*, i32*, i32*, i32*, ...) bitcast (i32 (...)* @cdrupk to i32 (i32*, i32*, i32*, i32*, i32*, ...)*)(i32* %11, i32* %12, i32* %13, i32* %14, i32* %15)
ret void
}

LLVM IR (-O2):
define void @cdrbtr(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = tail call i32 (i32*, i32*, i32*, i32*, i32*, ...) bitcast (i32 (...)* @cdrupk to i32 (i32*, i32*, i32*, i32*, i32*, ...)*)(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4)
ret void
}
int picolcd_init_lcd(struct picolcd_data *data, struct hid_report *report) {
  return 0;
}


x86 assembly (clang, -O0):
<picolcd_init_lcd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<picolcd_init_lcd>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.picolcd_data = type opaque
%struct.hid_report = type opaque
define i32 @picolcd_init_lcd(%struct.picolcd_data* %0, %struct.hid_report* %1) {
%3 = alloca %struct.picolcd_data*
%4 = alloca %struct.hid_report*
store %struct.picolcd_data* %0, %struct.picolcd_data** %3
store %struct.hid_report* %1, %struct.hid_report** %4
ret i32 0
}

LLVM IR (-O2):
%struct.picolcd_data = type opaque
%struct.hid_report = type opaque
define i32 @picolcd_init_lcd(%struct.picolcd_data* nocapture readnone %0, %struct.hid_report* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int qhypercall(int, long *, long *, long *);
int qhyper_nop(void) {
  long ebx, ecx, edx;
  return qhypercall(1, &ebx, &ecx, &edx);
}


x86 assembly (clang, -O0):
<qhyper_nop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x1,%edi
lea    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdx
lea    -0x18(%rbp),%rcx
call   1030 <qhypercall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qhyper_nop>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rdx
mov    %rsp,%rcx
mov    $0x1,%edi
call   1030 <qhypercall@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @qhyper_nop() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = call i32 @qhypercall(i32 1, i64* %1, i64* %2, i64* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @qhyper_nop() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = bitcast i64* %1 to i8*
%5 = bitcast i64* %2 to i8*
%6 = bitcast i64* %3 to i8*
%7 = call i32 @qhypercall(i32 1, i64* %1, i64* %2, i64* %3)
ret i32 %7
}
void RTLockValidatorReadLockGetCount(void) {}


x86 assembly (clang, -O0):
<RTLockValidatorReadLockGetCount>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLockValidatorReadLockGetCount>:
ret

LLVM IR (-O0):
define void @RTLockValidatorReadLockGetCount() {
ret void
}

LLVM IR (-O2):
define void @RTLockValidatorReadLockGetCount() {
ret void
}
/* Variables and functions */
int write(int, char *, int);
int putchar(int c) {
  char s = (char)c;
  return write(1, &s, 1);
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x5(%rbp)
mov    $0x1,%edx
lea    -0x5(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = trunc i32 %4 to i8
store i8 %5, i8* %3
%6 = call i32 @write(i32 1, i8* %3, i32 1)
ret i32 %6
}

LLVM IR (-O2):
define i32 @putchar(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = call i32 @write(i32 1, i8* %2, i32 1)
ret i32 %4
}
/* Variables and functions */
const char *np(const char *str) {
  if (str) {
    return str;
  } else {
    return "[NULL]";
  }
}


x86 assembly (clang, -O0):
<np>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1120 <np+0x20>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112b <np+0x2b>
lea    0xed9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<np>:
test   %rdi,%rdi
lea    0xef6(%rip),%rax
cmovne %rdi,%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"[NULL]\00"
define i8* @np(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i8*, i8** %3
store i8* %7, i8** %2
br label %9
8: ; preds = %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %2
br label %9
9: ; preds = %8, %6
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@.str = [7 x i8] c"[NULL]\00"
define i8* @np(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = select i1 %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0
ret i8* %3
}
int file_msg_recv(struct msg *pmsg) {}


x86 assembly (clang, -O0):
<file_msg_recv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_msg_recv>:
ret

LLVM IR (-O0):
%struct.msg = type opaque
define i32 @file_msg_recv(%struct.msg* %0) {
%2 = alloca i32
%3 = alloca %struct.msg*
store %struct.msg* %0, %struct.msg** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
%struct.msg = type opaque
define i32 @file_msg_recv(%struct.msg* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ITEM;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_item_d2i_ex(int /*<<< orphan*/ **,
                                     unsigned char const **, long,
                                     int /*<<< orphan*/ const *,
                                     int /*<<< orphan*/ *,
                                     int /*<<< orphan*/ *);
ASN1_VALUE *ASN1_item_d2i(ASN1_VALUE **pval, const unsigned char **in, long len,
                          const ASN1_ITEM *it) {
  return ASN1_item_d2i_ex(pval, in, len, it, NULL, NULL);
}


x86 assembly (clang, -O0):
<ASN1_item_d2i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r9d
mov    %r9,%r8
call   1030 <ASN1_item_d2i_ex@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_item_d2i>:
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <ASN1_item_d2i_ex@plt>

LLVM IR (-O0):
define i32* @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* %3) {
%5 = alloca i32**
%6 = alloca i8**
%7 = alloca i64
%8 = alloca i32*
store i32** %0, i32*** %5
store i8** %1, i8*** %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = load i32**, i32*** %5
%10 = load i8**, i8*** %6
%11 = load i64, i64* %7
%12 = load i32*, i32** %8
%13 = call i32* @ASN1_item_d2i_ex(i32** %9, i8** %10, i64 %11, i32* %12, i32* null, i32* null)
ret i32* %13
}

LLVM IR (-O2):
define i32* @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* %3) {
%5 = tail call i32* @ASN1_item_d2i_ex(i32** %0, i8** %1, i64 %2, i32* %3, i32* null, i32* null)
ret i32* %5
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void mpga_set_mode(uint8_t *p_mpga, uint8_t i_mode) {
  p_mpga[3] &= ~0xc0;
  p_mpga[3] |= i_mode << 6;
}


x86 assembly (clang, -O0):
<mpga_set_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
and    $0xffffff3f,%ecx
mov    %ecx,0xc(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x6,%ecx
mov    -0x8(%rbp),%rax
or     0xc(%rax),%ecx
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpga_set_mode>:
mov    $0xffffff3f,%eax
and    0xc(%rdi),%eax
shl    $0x6,%esi
or     %eax,%esi
mov    %esi,0xc(%rdi)
ret

LLVM IR (-O0):
define void @mpga_set_mode(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 3
%7 = load i32, i32* %6
%8 = and i32 %7, -193
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = shl i32 %9, 6
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 3
%13 = load i32, i32* %12
%14 = or i32 %13, %10
store i32 %14, i32* %12
ret void
}

LLVM IR (-O2):
define void @mpga_set_mode(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 3
%4 = load i32, i32* %3
%5 = and i32 %4, -193
%6 = shl i32 %1, 6
%7 = or i32 %5, %6
store i32 %7, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atmel_atmega8_PB5_makeOutput__E();
int /*<<< orphan*/ pollen_hardware_Led_off__E();
void pollen_hardware_Led_targetInit__I() {
  pollen_hardware_Led_off__E();
  atmel_atmega8_PB5_makeOutput__E();
}


x86 assembly (clang, -O0):
<pollen_hardware_Led_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pollen_hardware_Led_off__E@plt>
mov    $0x0,%al
call   1040 <atmel_atmega8_PB5_makeOutput__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_hardware_Led_targetInit__I>:
push   %rax
xor    %eax,%eax
call   1030 <pollen_hardware_Led_off__E@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <atmel_atmega8_PB5_makeOutput__E@plt>

LLVM IR (-O0):
define void @pollen_hardware_Led_targetInit__I() {
%1 = call i32 (...) @pollen_hardware_Led_off__E()
%2 = call i32 (...) @atmel_atmega8_PB5_makeOutput__E()
ret void
}

LLVM IR (-O2):
define void @pollen_hardware_Led_targetInit__I() {
%1 = tail call i32 (...) @pollen_hardware_Led_off__E()
%2 = tail call i32 (...) @atmel_atmega8_PB5_makeOutput__E()
ret void
}
void BlendPlaneRow_AVX2() {}


x86 assembly (clang, -O0):
<BlendPlaneRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BlendPlaneRow_AVX2>:
ret

LLVM IR (-O0):
define void @BlendPlaneRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @BlendPlaneRow_AVX2() {
ret void
}
void _Z5__GWNv(void) { return; }


x86 assembly (clang, -O0):
<_Z5__GWNv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Z5__GWNv>:
ret

LLVM IR (-O0):
define void @_Z5__GWNv() {
ret void
}

LLVM IR (-O2):
define void @_Z5__GWNv() {
ret void
}
int do_345() { return 345; }


x86 assembly (clang, -O0):
<do_345>:
push   %rbp
mov    %rsp,%rbp
mov    $0x159,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_345>:
mov    $0x159,%eax
ret

LLVM IR (-O0):
define i32 @do_345() {
ret i32 345
}

LLVM IR (-O2):
define i32 @do_345() {
ret i32 345
}
int tabpos(int col, int tabstops[]) {
  if (col > 100)
    return 1;
  else
    return tabstops[col];
}


x86 assembly (clang, -O0):
<tabpos>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x64,-0x8(%rbp)
jle    1121 <tabpos+0x21>
movl   $0x1,-0x4(%rbp)
jmp    112f <tabpos+0x2f>
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tabpos>:
mov    $0x1,%eax
cmp    $0x64,%edi
jg     1110 <tabpos+0x10>
movslq %edi,%rax
mov    (%rsi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @tabpos(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 100
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %15
9: ; preds = %2
%10 = load i32*, i32** %5
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
store i32 %14, i32* %3
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @tabpos(i32 %0, i32* nocapture %1) {
%3 = icmp sgt i32 %0, 100
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = sext i32 %0 to i64
%6 = getelementptr inbounds i32, i32* %1, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 1, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char const *);
void log_info(const char *caller, const char *message) {
  printf("%s: %s\n", caller, message);
}


x86 assembly (clang, -O0):
<log_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_info>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
define void @log_info(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
define void @log_info(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
/* Variables and functions */
scalar_t__ GLeeInit();
int /*<<< orphan*/ pglEndVertexShaderEXT();
void _Lazy_glEndVertexShaderEXT(void) {
  if (GLeeInit())
    pglEndVertexShaderEXT();
}


x86 assembly (clang, -O0):
<_Lazy_glEndVertexShaderEXT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GLeeInit@plt>
cmp    $0x0,%rax
je     113c <_Lazy_glEndVertexShaderEXT+0x1c>
mov    $0x0,%al
call   1040 <pglEndVertexShaderEXT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Lazy_glEndVertexShaderEXT>:
push   %rax
xor    %eax,%eax
call   1030 <GLeeInit@plt>
test   %rax,%rax
je     1135 <_Lazy_glEndVertexShaderEXT+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1040 <pglEndVertexShaderEXT@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @_Lazy_glEndVertexShaderEXT() {
%1 = call i64 (...) @GLeeInit()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @pglEndVertexShaderEXT()
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @_Lazy_glEndVertexShaderEXT() {
%1 = tail call i64 (...) @GLeeInit()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @pglEndVertexShaderEXT()
br label %5
5: ; preds = %3, %0
ret void
}
void g_param_spec_steal_qdata() {}


x86 assembly (clang, -O0):
<g_param_spec_steal_qdata>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_steal_qdata>:
ret

LLVM IR (-O0):
define void @g_param_spec_steal_qdata() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_steal_qdata() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ call();
void opcode_cd() { call(); }


x86 assembly (clang, -O0):
<opcode_cd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_cd>:
xor    %eax,%eax
jmp    1030 <call@plt>

LLVM IR (-O0):
define void @opcode_cd() {
%1 = call i32 (...) @call()
ret void
}

LLVM IR (-O2):
define void @opcode_cd() {
%1 = tail call i32 (...) @call()
ret void
}
void freeNames(char **names, int count) {
  while (--count >= 0) {
    free(names[count]);
  }
  free(names);
}


x86 assembly (clang, -O0):
<freeNames>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jl     1147 <freeNames+0x37>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
jmp    111f <freeNames+0xf>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeNames>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %esi,%esi
jle    1146 <freeNames+0x36>
mov    %esi,%ebx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x2(%rbx),%eax
mov    (%r14,%rax,8),%rdi
call   1030 <free@plt>
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1130 <freeNames+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeNames(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8**, i8*** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8*, i8** %10, i64 %12
%14 = load i8*, i8** %13
br label %5
15: ; preds = %5
%16 = load i8**, i8*** %3
%17 = bitcast i8** %16 to i8*
ret void
}

LLVM IR (-O2):
define void @freeNames(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = and i64 %8, 4294967295
%10 = getelementptr inbounds i8*, i8** %0, i64 %9
%11 = load i8*, i8** %10
tail call void @free(i8* %11)
%12 = icmp ugt i64 %7, 1
br i1 %12, label %6, label %13
13: ; preds = %6, %2
%14 = bitcast i8** %0 to i8*
tail call void @free(i8* %14)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ IO_get_byte();
int /*<<< orphan*/ put_argument2(char *, int /*<<< orphan*/, char *);
int am_indirect_x(void) {
  put_argument2(" ($", IO_get_byte(), ", x)");
  return 2;
}


x86 assembly (clang, -O0):
<am_indirect_x>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <IO_get_byte@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
lea    0xec9(%rip),%rdx
call   1040 <put_argument2@plt>
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<am_indirect_x>:
push   %rax
xor    %eax,%eax
call   1030 <IO_get_byte@plt>
lea    0xed1(%rip),%rdi
lea    0xece(%rip),%rdx
mov    %eax,%esi
call   1040 <put_argument2@plt>
mov    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c" ($\00"
@.str.1 = [5 x i8] c", x)\00"
define i32 @am_indirect_x() {
%1 = call i32 (...) @IO_get_byte()
%2 = call i32 @put_argument2(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 2
}

LLVM IR (-O2):
@.str = [4 x i8] c" ($\00"
@.str.1 = [5 x i8] c", x)\00"
define i32 @am_indirect_x() {
%1 = tail call i32 (...) @IO_get_byte()
%2 = tail call i32 @put_argument2(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 2
}
int is_EOC(const unsigned int cluster) { return (cluster == 0xFFFFFFFF); }


x86 assembly (clang, -O0):
<is_EOC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_EOC>:
xor    %eax,%eax
cmp    $0xffffffff,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_EOC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -1
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_EOC(i32 %0) {
%2 = icmp eq i32 %0, -1
%3 = zext i1 %2 to i32
ret i32 %3
}
void arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) {}


x86 assembly (clang, -O0):
<arch_dup_mmap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_dup_mmap>:
ret

LLVM IR (-O0):
%struct.mm_struct = type opaque
define void @arch_dup_mmap(%struct.mm_struct* %0, %struct.mm_struct* %1) {
%3 = alloca %struct.mm_struct*
%4 = alloca %struct.mm_struct*
store %struct.mm_struct* %0, %struct.mm_struct** %3
store %struct.mm_struct* %1, %struct.mm_struct** %4
ret void
}

LLVM IR (-O2):
%struct.mm_struct = type opaque
define void @arch_dup_mmap(%struct.mm_struct* nocapture %0, %struct.mm_struct* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void freopen_version() {
  puts("@"
       "(#)"
       "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
       "2022-01-22/02-19-57/repos/PawelNabe/EOS/refs/heads/master/SRC/freopen.c"
       " "
       "Sat Jan 22 08:19:10 2022"
       " compiled: "
       "Mar 15 2022"
       " "
       "22:46:48");
}


x86 assembly (clang, -O0):
<freopen_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<freopen_version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [196 x i8] c"@(#)/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/PawelNabe/EOS/refs/heads/master/SRC/freopen.c Sat Jan 22 08:19:10 2022 compiled: Mar 15 2022 22:46:48\00"
define void @freopen_version() {
%1 = call i32 @puts(i8* getelementptr inbounds ([196 x i8], [196 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [196 x i8] c"@(#)/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/PawelNabe/EOS/refs/heads/master/SRC/freopen.c Sat Jan 22 08:19:10 2022 compiled: Mar 15 2022 22:46:48\00"
define void @freopen_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([196 x i8], [196 x i8]* @.str, i64 0, i64 0))
ret void
}
int sum1(int x, int y) {
  int z;
  z = x + y;
  return (z);
}


x86 assembly (clang, -O0):
<sum1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum1>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @sum1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @sum1(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void ios_delay(void) { usleep(500); }


x86 assembly (clang, -O0):
<ios_delay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f4,%edi
call   1030 <usleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ios_delay>:
mov    $0x1f4,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @ios_delay() {
%1 = call i32 @usleep(i32 500)
ret void
}

LLVM IR (-O2):
define void @ios_delay() {
%1 = tail call i32 @usleep(i32 500)
ret void
}
void ScaleColsUp2_SSE2() {}


x86 assembly (clang, -O0):
<ScaleColsUp2_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleColsUp2_SSE2>:
ret

LLVM IR (-O0):
define void @ScaleColsUp2_SSE2() {
ret void
}

LLVM IR (-O2):
define void @ScaleColsUp2_SSE2() {
ret void
}
SORU_2_PROTOTYPE() {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<SORU_2_PROTOTYPE>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <SORU_2_PROTOTYPE+0x9>
jmp    1109 <SORU_2_PROTOTYPE+0x9>

x86 assembly (clang, -O2):
<SORU_2_PROTOTYPE>:
jmp    1100 <SORU_2_PROTOTYPE>

LLVM IR (-O0):
define i32 @SORU_2_PROTOTYPE() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define i32 @SORU_2_PROTOTYPE() {
br label %1
1: ; preds = %0, %1
br label %1
}
void gtk_rc_property_parse_color() {}


x86 assembly (clang, -O0):
<gtk_rc_property_parse_color>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_rc_property_parse_color>:
ret

LLVM IR (-O0):
define void @gtk_rc_property_parse_color() {
ret void
}

LLVM IR (-O2):
define void @gtk_rc_property_parse_color() {
ret void
}
void CRYPTO_set_dynlock_create_callback(void) {}


x86 assembly (clang, -O0):
<CRYPTO_set_dynlock_create_callback>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_set_dynlock_create_callback>:
ret

LLVM IR (-O0):
define void @CRYPTO_set_dynlock_create_callback() {
ret void
}

LLVM IR (-O2):
define void @CRYPTO_set_dynlock_create_callback() {
ret void
}
void SPI_MAX7221_DisableTxInt(void) {}


x86 assembly (clang, -O0):
<SPI_MAX7221_DisableTxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_MAX7221_DisableTxInt>:
ret

LLVM IR (-O0):
define void @SPI_MAX7221_DisableTxInt() {
ret void
}

LLVM IR (-O2):
define void @SPI_MAX7221_DisableTxInt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CallBack1(int, void *);
int /*<<< orphan*/ CheckRunningInMainThread(char *);
void WatchCursor(void) {
  if (!CheckRunningInMainThread("WatchCursor"))
    return;
  CallBack1(33, (void *)2);
}


x86 assembly (clang, -O0):
<WatchCursor>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <CheckRunningInMainThread@plt>
cmp    $0x0,%eax
jne    113e <WatchCursor+0x1e>
jmp    114d <WatchCursor+0x2d>
mov    $0x21,%edi
mov    $0x2,%esi
call   1030 <CallBack1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchCursor>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <CheckRunningInMainThread@plt>
test   %eax,%eax
je     1141 <WatchCursor+0x21>
mov    $0x2,%esi
mov    $0x21,%edi
pop    %rax
jmp    1030 <CallBack1@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"WatchCursor\00"
define void @WatchCursor() {
%1 = call i32 @CheckRunningInMainThread(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = icmp ne i32 %1, 0
br i1 %2, label %4, label %3
3: ; preds = %0
br label %6
4: ; preds = %0
%5 = call i32 @CallBack1(i32 33, i8* inttoptr (i64 2 to i8*))
br label %6
6: ; preds = %4, %3
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"WatchCursor\00"
define void @WatchCursor() {
%1 = tail call i32 @CheckRunningInMainThread(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @CallBack1(i32 33, i8* inttoptr (i64 2 to i8*))
br label %5
5: ; preds = %0, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
void __blast_assert(void) {
ERROR:
  __VERIFIER_error();
}


x86 assembly (clang, -O0):
<__blast_assert>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <__blast_assert+0x9>
mov    $0x0,%al
call   1030 <__VERIFIER_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__blast_assert>:
xor    %eax,%eax
jmp    1030 <__VERIFIER_error@plt>

LLVM IR (-O0):
define void @__blast_assert() {
br label %1
1: ; preds = %0
%2 = call i32 (...) @__VERIFIER_error()
ret void
}

LLVM IR (-O2):
define void @__blast_assert() {
%1 = tail call i32 (...) @__VERIFIER_error()
ret void
}
void ff_hevc_put_hevc_uni_w_epel_v48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_v48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_v48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_v48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_v48_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
void *run(void *arg) {
  char *name = (char *)arg;
  int i;
  for (i = 0; i < 500000; i++) {
    printf("This is the %s thread\n", name);
  }
  pthread_exit(NULL);
}


x86 assembly (clang, -O0):
<run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x7a120,-0x1c(%rbp)
jge    1166 <run+0x46>
mov    -0x18(%rbp),%rsi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    113b <run+0x1b>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    $0x7a120,%ebp
lea    0xecd(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
add    $0xffffffff,%ebp
jne    1140 <run+0x20>
xor    %edi,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"This is the %s thread\0A\00"
define i8* @run(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
store i8* %6, i8** %4
store i32 0, i32* %5
br label %7
7: ; preds = %13, %1
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 500000
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i8*, i8** %4
%12 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %7
16: ; preds = %7
%17 = call i32 @pthread_exit(i32* null)
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
@.str = [23 x i8] c"This is the %s thread\0A\00"
define noalias i8* @run(i8* %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ 0, %1 ], [ %5, %2 ]
%4 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = add nuw nsw i32 %3, 1
%6 = icmp eq i32 %5, 500000
br i1 %6, label %7, label %2
7: ; preds = %2
%8 = tail call i32 @pthread_exit(i32* null)
ret i8* undef
}
void ff_hevc_put_hevc_uni_w_epel_h64_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h64_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h64_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h64_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h64_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float, float);
void foo(int i, float f) { printf("%d %f\n", f, f); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rdi
movaps %xmm0,%xmm1
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%d %f\0A\00"
define void @foo(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float, float* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), float %5, float %6)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %f\0A\00"
define void @foo(i32 %0, float %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), float %1, float %1)
ret void
}