#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned int **_ZNSt12__miter_baseIPPiLb0EE3__bES1_(unsigned int **);
unsigned int **_ZSt14__copy_move_a2ILb0EPPiS1_ET1_T0_S3_S2_(unsigned int **,
                                                            unsigned int **,
                                                            unsigned int **);
unsigned int **_ZSt4copyIPPiS1_ET0_T_S3_S2_(unsigned int **llvm_cbe___first,
                                            unsigned int **llvm_cbe___last,
                                            unsigned int **llvm_cbe___result) {
  unsigned int **llvm_cbe_retval;
  unsigned int **llvm_cbe___first_2e_addr;
  unsigned int **llvm_cbe___last_2e_addr;
  unsigned int **llvm_cbe___result_2e_addr;
  unsigned int **llvm_cbe_tmp;
  unsigned int **llvm_cbe_call;
  unsigned int **llvm_cbe_tmp1;
  unsigned int **llvm_cbe_call2;
  unsigned int **llvm_cbe_tmp3;
  unsigned int **llvm_cbe_call4;
  unsigned int **llvm_cbe_tmp__41;
  *(&llvm_cbe___first_2e_addr) = llvm_cbe___first;
  *(&llvm_cbe___last_2e_addr) = llvm_cbe___last;
  *(&llvm_cbe___result_2e_addr) = llvm_cbe___result;
  llvm_cbe_tmp = *(&llvm_cbe___first_2e_addr);
  llvm_cbe_call = _ZNSt12__miter_baseIPPiLb0EE3__bES1_(llvm_cbe_tmp);
  llvm_cbe_tmp1 = *(&llvm_cbe___last_2e_addr);
  llvm_cbe_call2 = _ZNSt12__miter_baseIPPiLb0EE3__bES1_(llvm_cbe_tmp1);
  llvm_cbe_tmp3 = *(&llvm_cbe___result_2e_addr);
  llvm_cbe_call4 = _ZSt14__copy_move_a2ILb0EPPiS1_ET1_T0_S3_S2_(
      llvm_cbe_call, llvm_cbe_call2, llvm_cbe_tmp3);
  *(&llvm_cbe_retval) = llvm_cbe_call4;
  llvm_cbe_tmp__41 = *(&llvm_cbe_retval);
  return llvm_cbe_tmp__41;
}


x86 assembly (clang, -O0):
<_ZSt4copyIPPiS1_ET0_T_S3_S2_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rdi
call   1040 <_ZNSt12__miter_baseIPPiLb0EE3__bES1_@plt>
mov    %rax,-0x48(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x50(%rbp),%rdi
call   1040 <_ZNSt12__miter_baseIPPiLb0EE3__bES1_@plt>
mov    %rax,-0x58(%rbp)
mov    -0x38(%rbp),%rax
mov    %rax,-0x60(%rbp)
mov    -0x48(%rbp),%rdi
mov    -0x58(%rbp),%rsi
mov    -0x60(%rbp),%rdx
call   1030 <_ZSt14__copy_move_a2ILb0EPPiS1_ET1_T0_S3_S2_@plt>
mov    %rax,-0x68(%rbp)
mov    -0x68(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x70(%rbp)
mov    -0x70(%rbp),%rax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZSt4copyIPPiS1_ET0_T_S3_S2_>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
call   1040 <_ZNSt12__miter_baseIPPiLb0EE3__bES1_@plt>
mov    %rax,%rbx
mov    %r15,%rdi
call   1040 <_ZNSt12__miter_baseIPPiLb0EE3__bES1_@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <_ZSt14__copy_move_a2ILb0EPPiS1_ET1_T0_S3_S2_@plt>

LLVM IR (-O0):
define i32** @_ZSt4copyIPPiS1_ET0_T_S3_S2_(i32** %0, i32** %1, i32** %2) {
%4 = alloca i32**
%5 = alloca i32**
%6 = alloca i32**
%7 = alloca i32**
%8 = alloca i32**
%9 = alloca i32**
%10 = alloca i32**
%11 = alloca i32**
%12 = alloca i32**
%13 = alloca i32**
%14 = alloca i32**
%15 = alloca i32**
%16 = alloca i32**
%17 = alloca i32**
store i32** %0, i32*** %4
store i32** %1, i32*** %5
store i32** %2, i32*** %6
%18 = load i32**, i32*** %4
store i32** %18, i32*** %8
%19 = load i32**, i32*** %5
store i32** %19, i32*** %9
%20 = load i32**, i32*** %6
store i32** %20, i32*** %10
%21 = load i32**, i32*** %8
store i32** %21, i32*** %11
%22 = load i32**, i32*** %11
%23 = call i32** @_ZNSt12__miter_baseIPPiLb0EE3__bES1_(i32** %22)
store i32** %23, i32*** %12
%24 = load i32**, i32*** %9
store i32** %24, i32*** %13
%25 = load i32**, i32*** %13
%26 = call i32** @_ZNSt12__miter_baseIPPiLb0EE3__bES1_(i32** %25)
store i32** %26, i32*** %14
%27 = load i32**, i32*** %10
store i32** %27, i32*** %15
%28 = load i32**, i32*** %12
%29 = load i32**, i32*** %14
%30 = load i32**, i32*** %15
%31 = call i32** @_ZSt14__copy_move_a2ILb0EPPiS1_ET1_T0_S3_S2_(i32** %28, i32** %29, i32** %30)
store i32** %31, i32*** %16
%32 = load i32**, i32*** %16
store i32** %32, i32*** %7
%33 = load i32**, i32*** %7
store i32** %33, i32*** %17
%34 = load i32**, i32*** %17
ret i32** %34
}

LLVM IR (-O2):
define i32** @_ZSt4copyIPPiS1_ET0_T_S3_S2_(i32** %0, i32** %1, i32** %2) {
%4 = tail call i32** @_ZNSt12__miter_baseIPPiLb0EE3__bES1_(i32** %0)
%5 = tail call i32** @_ZNSt12__miter_baseIPPiLb0EE3__bES1_(i32** %1)
%6 = tail call i32** @_ZSt14__copy_move_a2ILb0EPPiS1_ET1_T0_S3_S2_(i32** %4, i32** %5, i32** %2)
ret i32** %6
}