int least_significant_bit_u64(unsigned long long int arg) {
  int lsb_bit_ix = 32;
  int delta_shift_size = 16;
  int iteration;
  for (iteration = 0; iteration < 6; iteration++) {
    if (arg << (63 - lsb_bit_ix) == 0)
      lsb_bit_ix += delta_shift_size;
    else if (arg << (63 - lsb_bit_ix) == 0x8000000000000000ULL)
      break;
    else
      lsb_bit_ix -= delta_shift_size;
    delta_shift_size = (delta_shift_size + 1) >> 1;
  }
  return lsb_bit_ix;
}


x86 assembly (clang, -O0):
<least_significant_bit_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x20,-0xc(%rbp)
movl   $0x10,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x6,-0x14(%rbp)
jge    11a3 <least_significant_bit_u64+0xa3>
mov    -0x8(%rbp),%rax
mov    $0x3f,%ecx
sub    -0xc(%rbp),%ecx
mov    %ecx,%ecx
shl    %cl,%rax
cmp    $0x0,%rax
jne    1150 <least_significant_bit_u64+0x50>
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1189 <least_significant_bit_u64+0x89>
mov    -0x8(%rbp),%rax
mov    $0x3f,%ecx
sub    -0xc(%rbp),%ecx
mov    %ecx,%ecx
shl    %cl,%rax
movabs $0x8000000000000000,%rcx
cmp    %rcx,%rax
jne    1179 <least_significant_bit_u64+0x79>
jmp    11a3 <least_significant_bit_u64+0xa3>
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    1189 <least_significant_bit_u64+0x89>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
sar    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111d <least_significant_bit_u64+0x1d>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<least_significant_bit_u64>:
mov    %rdi,%rcx
shl    $0x1f,%rcx
movabs $0x8000000000000000,%rdx
cmp    %rdx,%rcx
je     1143 <least_significant_bit_u64+0x43>
mov    $0x30,%eax
test   %rcx,%rcx
je     1125 <least_significant_bit_u64+0x25>
mov    $0x10,%eax
mov    %eax,%ecx
xor    $0x3f,%cl
mov    %rdi,%rsi
shl    %cl,%rsi
cmp    %rdx,%rsi
je     11c4 <least_significant_bit_u64+0xc4>
test   %rsi,%rsi
jne    1149 <least_significant_bit_u64+0x49>
or     $0x8,%eax
jmp    114c <least_significant_bit_u64+0x4c>
mov    $0x20,%eax
ret
add    $0xfffffff8,%eax
mov    $0x3f,%cl
sub    %al,%cl
mov    %rdi,%rsi
shl    %cl,%rsi
cmp    %rdx,%rsi
je     11c4 <least_significant_bit_u64+0xc4>
mov    $0x4,%ecx
test   %rsi,%rsi
je     116a <least_significant_bit_u64+0x6a>
mov    $0xfffffffc,%ecx
add    %ecx,%eax
mov    $0x3f,%cl
sub    %al,%cl
mov    %rdi,%rsi
shl    %cl,%rsi
cmp    %rdx,%rsi
je     11c4 <least_significant_bit_u64+0xc4>
mov    $0x2,%ecx
test   %rsi,%rsi
je     118a <least_significant_bit_u64+0x8a>
mov    $0xfffffffe,%ecx
add    %ecx,%eax
mov    $0x3f,%cl
sub    %al,%cl
mov    %rdi,%rsi
shl    %cl,%rsi
cmp    %rdx,%rsi
je     11c4 <least_significant_bit_u64+0xc4>
mov    $0x1,%ecx
test   %rsi,%rsi
je     11aa <least_significant_bit_u64+0xaa>
mov    $0xffffffff,%ecx
add    %ecx,%eax
mov    $0x3f,%cl
sub    %al,%cl
shl    %cl,%rdi
cmp    %rdx,%rdi
je     11c4 <least_significant_bit_u64+0xc4>
test   %rdi,%rdi
jne    11c1 <least_significant_bit_u64+0xc1>
add    $0x1,%eax
ret
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @least_significant_bit_u64(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i64 %0, i64* %2
store i32 32, i32* %3
store i32 16, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %37, %1
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 6
br i1 %8, label %9, label %40
9: ; preds = %6
%10 = load i64, i64* %2
%11 = load i32, i32* %3
%12 = sub nsw i32 63, %11
%13 = zext i32 %12 to i64
%14 = shl i64 %10, %13
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %9
%17 = load i32, i32* %4
%18 = load i32, i32* %3
%19 = add nsw i32 %18, %17
store i32 %19, i32* %3
br label %33
20: ; preds = %9
%21 = load i64, i64* %2
%22 = load i32, i32* %3
%23 = sub nsw i32 63, %22
%24 = zext i32 %23 to i64
%25 = shl i64 %21, %24
%26 = icmp eq i64 %25, -9223372036854775808
br i1 %26, label %27, label %28
27: ; preds = %20
br label %40
28: ; preds = %20
%29 = load i32, i32* %4
%30 = load i32, i32* %3
%31 = sub nsw i32 %30, %29
store i32 %31, i32* %3
br label %32
32: ; preds = %28
br label %33
33: ; preds = %32, %16
%34 = load i32, i32* %4
%35 = add nsw i32 %34, 1
%36 = ashr i32 %35, 1
store i32 %36, i32* %4
br label %37
37: ; preds = %33
%38 = load i32, i32* %5
%39 = add nsw i32 %38, 1
store i32 %39, i32* %5
br label %6
40: ; preds = %27, %6
%41 = load i32, i32* %3
ret i32 %41
}

LLVM IR (-O2):
define i32 @least_significant_bit_u64(i64 %0) {
%2 = shl i64 %0, 31
switch i64 %2, label %3 [
i64 0, label %4
i64 -9223372036854775808, label %43
]
3: ; preds = %1
br label %4
4: ; preds = %1, %3
%5 = phi i32 [ 16, %3 ], [ 48, %1 ]
%6 = xor i32 %5, 63
%7 = zext i32 %6 to i64
%8 = shl i64 %0, %7
switch i64 %8, label %11 [
i64 0, label %9
i64 -9223372036854775808, label %43
]
9: ; preds = %4
%10 = or i32 %5, 8
br label %13
11: ; preds = %4
%12 = add nsw i32 %5, -8
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
%15 = sub nsw i32 63, %14
%16 = zext i32 %15 to i64
%17 = shl i64 %0, %16
switch i64 %17, label %18 [
i64 0, label %19
i64 -9223372036854775808, label %43
]
18: ; preds = %13
br label %19
19: ; preds = %13, %18
%20 = phi i32 [ -4, %18 ], [ 4, %13 ]
%21 = add nsw i32 %14, %20
%22 = sub nsw i32 63, %21
%23 = zext i32 %22 to i64
%24 = shl i64 %0, %23
switch i64 %24, label %25 [
i64 0, label %26
i64 -9223372036854775808, label %43
]
25: ; preds = %19
br label %26
26: ; preds = %19, %25
%27 = phi i32 [ -2, %25 ], [ 2, %19 ]
%28 = add nsw i32 %21, %27
%29 = sub nsw i32 63, %28
%30 = zext i32 %29 to i64
%31 = shl i64 %0, %30
switch i64 %31, label %32 [
i64 0, label %33
i64 -9223372036854775808, label %43
]
32: ; preds = %26
br label %33
33: ; preds = %26, %32
%34 = phi i32 [ -1, %32 ], [ 1, %26 ]
%35 = add nsw i32 %28, %34
%36 = sub nsw i32 63, %35
%37 = zext i32 %36 to i64
%38 = shl i64 %0, %37
switch i64 %38, label %41 [
i64 0, label %39
i64 -9223372036854775808, label %43
]
39: ; preds = %33
%40 = add nsw i32 %35, 1
br label %43
41: ; preds = %33
%42 = add nsw i32 %35, -1
br label %43
43: ; preds = %39, %41, %33, %26, %19, %13, %4, %1
%44 = phi i32 [ 32, %1 ], [ %5, %4 ], [ %14, %13 ], [ %21, %19 ], [ %28, %26 ], [ %35, %33 ], [ %40, %39 ], [ %42, %41 ]
ret i32 %44
}