xunge/DecIR huggingface dataset:
/* Variables and functions */
double ceil(double);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, double *);
int main(void) {
  double x;
  double c;
  printf("x: ");
  scanf("%lf", &x);
  c = ceil(x);
  printf("c = %lf\n", c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xeb0(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1050 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
lea    0xe90(%rip),%rdi
mov    $0x1,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xebe(%rip),%rdi
mov    %rsp,%rsi
call   1050 <scanf@plt>
movsd  (%rsp),%xmm0
call   1030 <ceil@plt>
lea    0xea9(%rip),%rdi
mov    $0x1,%al
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"x: \00"
@.str.1 = [4 x i8] c"%lf\00"
@.str.2 = [9 x i8] c"c = %lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%6 = load double, double* %2
%7 = call double @llvm.ceil.f64(double %6)
store double %7, double* %3
%8 = load double, double* %3
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), double %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"x: \00"
@.str.1 = [4 x i8] c"%lf\00"
@.str.2 = [9 x i8] c"c = %lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %1)
%5 = load double, double* %1
%6 = call double @llvm.ceil.f64(double %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), double %6)
ret i32 0
}
/* Variables and functions */
scalar_t__ msgsnd(int, void const *, size_t, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int write_msg(int msqid, const void *msgp, size_t msgsz, long msgtyp) {
  *(long *)msgp = msgtyp;
  if (msgsnd(msqid, msgp, msgsz - sizeof(long), 0) < 0) {
    perror("[-] msgsnd");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<write_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
sub    $0x8,%rdx
xor    %ecx,%ecx
call   1030 <msgsnd@plt>
cmp    $0x0,%rax
jge    117a <write_msg+0x5a>
lea    0xe97(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1181 <write_msg+0x61>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_msg>:
push   %rbx
mov    %rcx,(%rsi)
add    $0xfffffffffffffff8,%rdx
xor    %ebx,%ebx
xor    %ecx,%ecx
call   1030 <msgsnd@plt>
test   %rax,%rax
js     113a <write_msg+0x1a>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xebf(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%ebx
jmp    1136 <write_msg+0x16>

LLVM IR (-O0):
@.str = [11 x i8] c"[-] msgsnd\00"
define i32 @write_msg(i32 %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
store i32 %0, i32* %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
%10 = load i64, i64* %9
%11 = load i8*, i8** %7
%12 = bitcast i8* %11 to i64*
store i64 %10, i64* %12
%13 = load i32, i32* %6
%14 = load i8*, i8** %7
%15 = load i64, i64* %8
%16 = sub i64 %15, 8
%17 = call i64 @msgsnd(i32 %13, i8* %14, i64 %16, i32 0)
%18 = icmp slt i64 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %4
%20 = call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %5
br label %22
21: ; preds = %4
store i32 0, i32* %5
br label %22
22: ; preds = %21, %19
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
@.str = [11 x i8] c"[-] msgsnd\00"
define i32 @write_msg(i32 %0, i8* %1, i64 %2, i64 %3) {
%5 = bitcast i8* %1 to i64*
store i64 %3, i64* %5
%6 = add i64 %2, -8
%7 = tail call i64 @msgsnd(i32 %0, i8* %1, i64 %6, i32 0)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = tail call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %4, %9
%12 = phi i32 [ -1, %9 ], [ 0, %4 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __chmod(const char *file, mode_t mode) {
  if (file == NULL) {
    __set_errno(EINVAL);
    return -1;
  }
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__chmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <__chmod+0x34>
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1159 <__chmod+0x49>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__chmod>:
push   %rax
test   %rdi,%rdi
jne    111f <__chmod+0xf>
mov    0x2ebb(%rip),%rax
jmp    1126 <__chmod+0x16>
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @__chmod(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @EINVAL
%10 = call i32 @__set_errno(i32 %9)
store i32 -1, i32* %3
br label %14
11: ; preds = %2
%12 = load i32, i32* @ENOSYS
%13 = call i32 @__set_errno(i32 %12)
store i32 -1, i32* %3
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @__chmod(i8* readnone %0, i32 %1) {
%3 = icmp eq i8* %0, null
%4 = load i32, i32* @EINVAL
%5 = load i32, i32* @ENOSYS
%6 = select i1 %3, i32 %4, i32 %5
%7 = tail call i32 @__set_errno(i32 %6)
ret i32 -1
}
/* Variables and functions */
unsigned char dio_get(unsigned char);
void DIOGetStep(unsigned char pin, unsigned char *value) {
  *value = dio_get(pin);
}


x86 assembly (clang, -O0):
<DIOGetStep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <dio_get@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DIOGetStep>:
push   %rbx
mov    %rsi,%rbx
call   1030 <dio_get@plt>
mov    %al,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @DIOGetStep(i8 zeroext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8, i8* %3
%6 = call zeroext i8 @dio_get(i8 zeroext %5)
%7 = load i8*, i8** %4
store i8 %6, i8* %7
ret void
}

LLVM IR (-O2):
define void @DIOGetStep(i8 zeroext %0, i8* nocapture writeonly %1) {
%3 = tail call zeroext i8 @dio_get(i8 zeroext %0)
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(void *);
void *print_hello(void *id) { pthread_exit(id); }


x86 assembly (clang, -O0):
<print_hello>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hello>:
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define i8* @print_hello(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @pthread_exit(i8* %4)
%6 = load i8*, i8** %2
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @print_hello(i8* %0) {
%2 = tail call i32 @pthread_exit(i8* %0)
ret i8* undef
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int64_t;
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int /*<<< orphan*/ *bitvector_resize(int /*<<< orphan*/ *, int /*<<< orphan*/,
                                     int /*<<< orphan*/, int);
u_int32_t *bitvector_new(u_int64_t n, int initzero) {
  return bitvector_resize(NULL, 0, n, initzero);
}


x86 assembly (clang, -O0):
<bitvector_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
call   1030 <bitvector_resize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitvector_new>:
mov    %esi,%ecx
mov    %edi,%edx
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <bitvector_resize@plt>

LLVM IR (-O0):
define i32* @bitvector_new(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32* @bitvector_resize(i32* null, i32 0, i32 %5, i32 %6)
ret i32* %7
}

LLVM IR (-O2):
define i32* @bitvector_new(i32 %0, i32 %1) {
%3 = tail call i32* @bitvector_resize(i32* null, i32 0, i32 %0, i32 %1)
ret i32* %3
}
void zylonite_pxa300_init(void) {
  if (cpu_is_pxa300() || cpu_is_pxa310())
    panic("%s: PXA300/PXA310 not supported\n", __func__);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <cpu_is_pxa300@plt>
cmp    $0x0,%eax
jne    1154 <zylonite_pxa300_init+0x24>
mov    $0x0,%al
call   1040 <cpu_is_pxa310@plt>
cmp    $0x0,%eax
je     1169 <zylonite_pxa300_init+0x39>
lea    0xea5(%rip),%rdi
lea    0xebf(%rip),%rsi
mov    $0x0,%al
call   1030 <panic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1050 <cpu_is_pxa300@plt>
test   %eax,%eax
jne    1147 <zylonite_pxa300_init+0x17>
xor    %eax,%eax
call   1040 <cpu_is_pxa310@plt>
test   %eax,%eax
je     115d <zylonite_pxa300_init+0x2d>
lea    0xeb2(%rip),%rdi
lea    0xecc(%rip),%rsi
xor    %eax,%eax
pop    %rcx
jmp    1030 <panic@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"%s: PXA300/PXA310 not supported\0A\00"
@__func__.zylonite_pxa300_init = [21 x i8] c"zylonite_pxa300_init\00"
define void @zylonite_pxa300_init() {
%1 = call i32 (...) @cpu_is_pxa300()
%2 = icmp ne i32 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = call i32 (...) @cpu_is_pxa310()
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3, %0
%7 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @panic to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.zylonite_pxa300_init, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"%s: PXA300/PXA310 not supported\0A\00"
@__func__.zylonite_pxa300_init = [21 x i8] c"zylonite_pxa300_init\00"
define void @zylonite_pxa300_init() {
%1 = tail call i32 (...) @cpu_is_pxa300()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 (...) @cpu_is_pxa310()
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3, %0
%7 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @panic to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.zylonite_pxa300_init, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void TimerPrescaleMatchSet(uint32_t ui32Base, uint32_t ui32Timer,
                           uint32_t ui32Value) {
  ;

  ;
  ;
  if (ui32Timer & 0x000000ff) {
    (*((volatile uint32_t *)(ui32Base + 0x00000040))) = ui32Value;
  }
  if (ui32Timer & 0x0000ff00) {
    (*((volatile uint32_t *)(ui32Base + 0x00000044))) = ui32Value;
  }
}


x86 assembly (clang, -O0):
<TimerPrescaleMatchSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
cmp    $0x0,%eax
je     112b <TimerPrescaleMatchSet+0x2b>
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x40,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
and    $0xff00,%eax
cmp    $0x0,%eax
je     1149 <TimerPrescaleMatchSet+0x49>
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x44,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerPrescaleMatchSet>:
movslq %edi,%rax
test   %sil,%sil
je     110b <TimerPrescaleMatchSet+0xb>
mov    %edx,0x40(%rax)
test   $0xff00,%esi
je     1116 <TimerPrescaleMatchSet+0x16>
mov    %edx,0x44(%rax)
ret

LLVM IR (-O0):
define void @TimerPrescaleMatchSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = and i32 %7, 255
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %3
%11 = load i32, i32* %6
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 64
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
store volatile i32 %11, i32* %15
br label %16
16: ; preds = %10, %3
%17 = load i32, i32* %5
%18 = and i32 %17, 65280
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %26
20: ; preds = %16
%21 = load i32, i32* %6
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 68
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
store volatile i32 %21, i32* %25
br label %26
26: ; preds = %20, %16
ret void
}

LLVM IR (-O2):
define void @TimerPrescaleMatchSet(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, 255
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = add nsw i32 %0, 64
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %2, i32* %9
br label %10
10: ; preds = %6, %3
%11 = and i32 %1, 65280
%12 = icmp eq i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %10
%14 = add nsw i32 %0, 68
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 %2, i32* %16
br label %17
17: ; preds = %13, %10
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cvtpi16_ps(int /*<<< orphan*/);
__m128 test_mm_cvtpi16_ps(__m64 a) { return _mm_cvtpi16_ps(a); }


x86 assembly (clang, -O0):
<test_mm_cvtpi16_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtpi16_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cvtpi16_ps>:
jmp    1030 <_mm_cvtpi16_ps@plt>

LLVM IR (-O0):
define i32 @test_mm_cvtpi16_ps(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvtpi16_ps(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_cvtpi16_ps(i32 %0) {
%2 = tail call i32 @_mm_cvtpi16_ps(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ foo(int /*<<< orphan*/);
__attribute__((no, noclone)) unsigned long f2(unsigned long x,
                                              unsigned long y) {
  unsigned long r = x - y;
  if (r <= x)
    foo(0);
  return r;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
ja     1141 <f2+0x31>
xor    %edi,%edi
call   1030 <foo@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
push   %rbx
mov    %rdi,%rbx
sub    %rsi,%rbx
jb     1120 <f2+0x10>
xor    %edi,%edi
call   1030 <foo@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @f2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = sub i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = load i64, i64* %3
%11 = icmp ule i64 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @foo(i32 0)
br label %14
14: ; preds = %12, %2
%15 = load i64, i64* %5
ret i64 %15
}

LLVM IR (-O2):
define i64 @f2(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @foo(i32 0)
br label %6
6: ; preds = %4, %2
%7 = sub i64 %0, %1
ret i64 %7
}
int par(int num) {
  int r;
  if (num % 2 == 0)
    r = 1;
  else
    r = 0;
  return r;
}


x86 assembly (clang, -O0):
<par>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <par+0x27>
movl   $0x1,-0x8(%rbp)
jmp    112e <par+0x2e>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<par>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @par(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %3
br label %9
8: ; preds = %1
store i32 0, i32* %3
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @par(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
double func(double x, double y, double z) {
  if (x > 0)
    x -= .32;
  else
    x += .32;
  return (x * x + y * y + z * z) - .1;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1140 <func+0x40>
movsd  -0x8(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1152 <func+0x52>
movsd  0xeb8(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe80(%rip),%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xorpd  %xmm3,%xmm3
xor    %eax,%eax
ucomisd %xmm3,%xmm0
seta   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm2,%xmm0
addsd  0xedb(%rip),%xmm0
ret

LLVM IR (-O0):
define double @func(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load double, double* %4
%11 = fsub double %10, 3.200000e-01
store double %11, double* %4
br label %15
12: ; preds = %3
%13 = load double, double* %4
%14 = fadd double %13, 3.200000e-01
store double %14, double* %4
br label %15
15: ; preds = %12, %9
%16 = load double, double* %4
%17 = load double, double* %4
%18 = load double, double* %5
%19 = load double, double* %5
%20 = fmul double %18, %19
%21 = call double @llvm.fmuladd.f64(double %16, double %17, double %20)
%22 = load double, double* %6
%23 = load double, double* %6
%24 = call double @llvm.fmuladd.f64(double %22, double %23, double %21)
%25 = fsub double %24, 1.000000e-01
ret double %25
}

LLVM IR (-O2):
define double @func(double %0, double %1, double %2) {
%4 = fcmp ogt double %0, 0.000000e+00
%5 = select i1 %4, double -3.200000e-01, double 3.200000e-01
%6 = fadd double %5, %0
%7 = fmul double %1, %1
%8 = tail call double @llvm.fmuladd.f64(double %6, double %6, double %7)
%9 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %8)
%10 = fadd double %9, -1.000000e-01
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int n;
  int k;
  int i;
  i = 0;
  int flag;
  if (!(n > 0 && n < 10))
    return 0;
  while (i < n) {
    i++;
    if (flag)
      k += 4000;
    else
      k += 2000;
  }
  assert(k > n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    113a <main+0x2a>
cmpl   $0xa,-0x8(%rbp)
jl     1146 <main+0x36>
movl   $0x0,-0x4(%rbp)
jmp    11a4 <main+0x94>
jmp    114b <main+0x3b>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    118a <main+0x7a>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     117a <main+0x6a>
mov    -0xc(%rbp),%eax
add    $0xfa0,%eax
mov    %eax,-0xc(%rbp)
jmp    1185 <main+0x75>
mov    -0xc(%rbp),%eax
add    $0x7d0,%eax
mov    %eax,-0xc(%rbp)
jmp    114b <main+0x3b>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %4
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = load i32, i32* %2
%10 = icmp slt i32 %9, 10
br i1 %10, label %12, label %11
11: ; preds = %8, %0
store i32 0, i32* %1
br label %35
12: ; preds = %8
br label %13
13: ; preds = %28, %12
%14 = load i32, i32* %4
%15 = load i32, i32* %2
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %29
17: ; preds = %13
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
%20 = load i32, i32* %5
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %17
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 4000
store i32 %24, i32* %3
br label %28
25: ; preds = %17
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 2000
store i32 %27, i32* %3
br label %28
28: ; preds = %25, %22
br label %13
29: ; preds = %13
%30 = load i32, i32* %3
%31 = load i32, i32* %2
%32 = icmp sgt i32 %30, %31
%33 = zext i1 %32 to i32
%34 = call i32 @assert(i32 %33)
store i32 0, i32* %1
br label %35
35: ; preds = %29, %11
%36 = load i32, i32* %1
ret i32 %36
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void haswell_set_bclk(struct azx *chip) { return; }


x86 assembly (clang, -O0):
<haswell_set_bclk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<haswell_set_bclk>:
ret

LLVM IR (-O0):
%struct.azx = type opaque
define void @haswell_set_bclk(%struct.azx* %0) {
%2 = alloca %struct.azx*
store %struct.azx* %0, %struct.azx** %2
ret void
}

LLVM IR (-O2):
%struct.azx = type opaque
define void @haswell_set_bclk(%struct.azx* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, unsigned char const,
                           char const *);
void midnam_print_cc_cb(const char *fnname, const unsigned char chn,
                        const unsigned char cc, const unsigned char flags,
                        void *arg) {
  FILE *fp = (FILE *)arg;
  fprintf(fp, "      <Control Type=\"7bit\" Number=\"%d\" Name=\"%s\"/>\n", cc,
          fnname);
}


x86 assembly (clang, -O0):
<midnam_print_cc_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %rdi,-0x8(%rbp)
mov    %dl,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %al,-0xb(%rbp)
mov    %r8,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0xa(%rbp),%al
mov    -0x8(%rbp),%rcx
lea    0xeb6(%rip),%rsi
movzbl %al,%edx
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<midnam_print_cc_cb>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rsi
mov    %r8,%rdi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [52 x i8] c" <Control Type=\227bit\22 Number=\22%d\22 Name=\22%s\22/>\0A\00"
define void @midnam_print_cc_cb(i8* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8*
%11 = alloca i32*
store i8* %0, i8** %6
store i8 %1, i8* %7
store i8 %2, i8* %8
store i8 %3, i8* %9
store i8* %4, i8** %10
%12 = load i8*, i8** %10
%13 = bitcast i8* %12 to i32*
store i32* %13, i32** %11
%14 = load i32*, i32** %11
%15 = load i8, i8* %8
%16 = load i8*, i8** %6
%17 = call i32 @fprintf(i32* %14, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0), i8 zeroext %15, i8* %16)
ret void
}

LLVM IR (-O2):
@.str = [52 x i8] c" <Control Type=\227bit\22 Number=\22%d\22 Name=\22%s\22/>\0A\00"
define void @midnam_print_cc_cb(i8* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8* nocapture %4) {
%6 = bitcast i8* %4 to i32*
%7 = tail call i32 @fprintf(i32* %6, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0), i8 zeroext %2, i8* %0)
ret void
}
void ade7854_remove_trigger(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<ade7854_remove_trigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7854_remove_trigger>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @ade7854_remove_trigger(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @ade7854_remove_trigger(%struct.iio_dev* nocapture %0) {
ret void
}
/* Variables and functions */
bool isAlphabetic(char c) {
  if ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z'))
    return true;
  else
    return false;
}


x86 assembly (clang, -O0):
<isAlphabetic>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1124 <isAlphabetic+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    113e <isAlphabetic+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     114a <isAlphabetic+0x4a>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     114a <isAlphabetic+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <isAlphabetic+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isAlphabetic>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isAlphabetic(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %19, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %19, label %20
19: ; preds = %15, %7
store i32 1, i32* %2
br label %21
20: ; preds = %15, %11
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @isAlphabetic(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
int soma(int num1, int num2) { return num1 + num2; }


x86 assembly (clang, -O0):
<soma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soma>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @soma(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @soma(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
double ceil(double);
double floor(double);
double rint(double x) { return (x >= 0.0) ? floor(x + 0.5) : ceil(x - 0.5); }


x86 assembly (clang, -O0):
<rint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     115b <rint+0x3b>
movsd  0xeb9(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1040 <floor@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    1176 <rint+0x56>
movsd  -0x8(%rbp),%xmm0
movsd  0xe98(%rip),%xmm1
subsd  %xmm1,%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rint>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jae    1137 <rint+0x17>
addsd  0xed6(%rip),%xmm0
jmp    1030 <ceil@plt>
addsd  0xec1(%rip),%xmm0
jmp    1040 <floor@plt>

LLVM IR (-O0):
define double @rint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0.000000e+00
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load double, double* %2
%7 = fadd double %6, 5.000000e-01
%8 = call double @llvm.floor.f64(double %7)
br label %13
9: ; preds = %1
%10 = load double, double* %2
%11 = fsub double %10, 5.000000e-01
%12 = call double @llvm.ceil.f64(double %11)
br label %13
13: ; preds = %9, %5
%14 = phi double [ %8, %5 ], [ %12, %9 ]
ret double %14
}

LLVM IR (-O2):
define double @rint(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = fadd double %0, 5.000000e-01
%5 = tail call double @llvm.floor.f64(double %4)
br label %9
6: ; preds = %1
%7 = fadd double %0, -5.000000e-01
%8 = tail call double @llvm.ceil.f64(double %7)
br label %9
9: ; preds = %6, %3
%10 = phi double [ %5, %3 ], [ %8, %6 ]
ret double %10
}
int nls_op_mod(int a, int b) { return a % b; }


x86 assembly (clang, -O0):
<nls_op_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nls_op_mod>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @nls_op_mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @nls_op_mod(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
unsigned char gf4_mul_3(unsigned char a) {
  unsigned char msk = (a - 2) >> 1;
  return (msk & (a * 3)) | ((~msk) & (a - 1));
}


x86 assembly (clang, -O0):
<gf4_mul_3>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sub    $0x2,%eax
sar    $0x1,%eax
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
movzbl -0x1(%rbp),%ecx
imul   $0x3,%ecx,%ecx
and    %ecx,%eax
movzbl -0x2(%rbp),%ecx
xor    $0xffffffff,%ecx
movzbl -0x1(%rbp),%edx
sub    $0x1,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf4_mul_3>:
lea    0x1fe(%rdi),%ecx
shr    %ecx
lea    (%rdi,%rdi,2),%eax
lea    -0x1(%rdi),%edx
xor    %edx,%eax
and    %ecx,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @gf4_mul_3(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = sub nsw i32 %5, 2
%7 = ashr i32 %6, 1
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = load i8, i8* %2
%12 = zext i8 %11 to i32
%13 = mul nsw i32 %12, 3
%14 = and i32 %10, %13
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = load i8, i8* %2
%19 = zext i8 %18 to i32
%20 = sub nsw i32 %19, 1
%21 = and i32 %17, %20
%22 = or i32 %14, %21
%23 = trunc i32 %22 to i8
ret i8 %23
}

LLVM IR (-O2):
define zeroext i8 @gf4_mul_3(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = add nuw nsw i32 %2, 510
%4 = lshr i32 %3, 1
%5 = mul nuw nsw i32 %2, 3
%6 = and i32 %4, %5
%7 = xor i32 %4, -1
%8 = add nuw nsw i32 %2, 255
%9 = and i32 %8, %7
%10 = or i32 %6, %9
%11 = trunc i32 %10 to i8
ret i8 %11
}
/* Variables and functions */
int mystery2(char *);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, char *);
int main(void) {
  char string[80];
  printf("Enter a string: ");
  scanf("%s", string);
  printf("%d\n", mystery2(string));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x60(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1050 <scanf@plt>
lea    -0x60(%rbp),%rdi
call   1040 <mystery2@plt>
mov    %eax,%esi
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x50,%rsp
lea    0xec4(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    %rbx,%rdi
call   1040 <mystery2@plt>
lea    0xeb0(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Enter a string: \00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [80 x i8]
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%7 = call i32 @mystery2(i8* %6)
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Enter a string: \00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [80 x i8]
%2 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%5 = call i32 @mystery2(i8* %2)
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int cnt0(char *, char const *);
int /*<<< orphan*/ free(char *);
char *strdup(char const *);
int cnt(const char *s0, const char *del) {
  char *s;
  int c;
  s = strdup(s0);
  c = cnt0(s, del);
  free(s);
  return c;
}


x86 assembly (clang, -O0):
<cnt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strdup@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <cnt0@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnt>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
call   1050 <strdup@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <cnt0@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @cnt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i8* @strdup(i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i8*, i8** %4
%11 = call i32 @cnt0(i8* %9, i8* %10)
store i32 %11, i32* %6
%12 = load i8*, i8** %5
%13 = call i32 @free(i8* %12)
%14 = load i32, i32* %6
ret i32 %14
}

LLVM IR (-O2):
define i32 @cnt(i8* nocapture %0, i8* %1) {
%3 = tail call i8* @strdup(i8* %0)
%4 = tail call i32 @cnt0(i8* %3, i8* %1)
%5 = tail call i32 @free(i8* %3)
ret i32 %4
}
void spi_select(volatile unsigned int *base, unsigned int val) {
  *(base + 2) = val;
}


x86 assembly (clang, -O0):
<spi_select>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_select>:
mov    %esi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @spi_select(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 2
store volatile i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @spi_select(i32* %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 2
store volatile i32 %1, i32* %3
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t cttk_s32_sign(int32_t x) {
  uint32_t q;
  q = (uint32_t)x;
  return -(int32_t)(q >> 31) | (int32_t)(-q >> 31);
}


x86 assembly (clang, -O0):
<cttk_s32_sign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sar    $0x1f,%ecx
xor    %eax,%eax
sub    %ecx,%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
sar    $0x1f,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cttk_s32_sign>:
mov    %edi,%ecx
shr    $0x1f,%ecx
test   %edi,%edi
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cttk_s32_sign(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = ashr i32 %5, 31
%7 = sub nsw i32 0, %6
%8 = load i32, i32* %3
%9 = sub nsw i32 0, %8
%10 = ashr i32 %9, 31
%11 = or i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cttk_s32_sign(i32 %0) {
%2 = lshr i32 %0, 31
%3 = icmp sgt i32 %0, 0
%4 = select i1 %3, i32 -1, i32 %2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ OS_TaskRegister();
void task_14(void) {
  OS_TaskRegister();
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<task_14>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OS_TaskRegister@plt>
jmp    111b <task_14+0xb>

x86 assembly (clang, -O2):
<task_14>:
push   %rax
xor    %eax,%eax
call   1030 <OS_TaskRegister@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <task_14+0x10>

LLVM IR (-O0):
define void @task_14() {
%1 = call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @task_14() {
%1 = tail call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}
void cvmx_pko_shutdown(void) {}


x86 assembly (clang, -O0):
<cvmx_pko_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_pko_shutdown>:
ret

LLVM IR (-O0):
define void @cvmx_pko_shutdown() {
ret void
}

LLVM IR (-O2):
define void @cvmx_pko_shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello");
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int rename(char const *, char const *);
int fu_Rename(const char *from, const char *to) { return rename(from, to); }


x86 assembly (clang, -O0):
<fu_Rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fu_Rename>:
jmp    1030 <rename@plt>

LLVM IR (-O0):
define i32 @fu_Rename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @rename(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fu_Rename(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @rename(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
struct shmid_ds {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SHM_LOCK;
int /*<<< orphan*/ errExit(char *);
int shmctl(int const, int /*<<< orphan*/, struct shmid_ds *);
void lock_shm(const int shm_id) {
  struct shmid_ds shm_desc;
  if (shmctl(shm_id, SHM_LOCK, &shm_desc) == -1)
    errExit("shmctl()failed\n");
}


x86 assembly (clang, -O0):
<lock_shm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1040 <shmctl@plt>
cmp    $0xffffffff,%eax
jne    1155 <lock_shm+0x35>
lea    0xeb0(%rip),%rdi
call   1030 <errExit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_shm>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
mov    %rsp,%rdx
call   1040 <shmctl@plt>
cmp    $0xffffffff,%eax
je     1139 <lock_shm+0x19>
pop    %rax
ret
lea    0xec0(%rip),%rdi
call   1030 <errExit@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@SHM_LOCK = global i32 0
@.str = [16 x i8] c"shmctl()failed\0A\00"
define void @lock_shm(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.shmid_ds
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @SHM_LOCK
%6 = call i32 @shmctl(i32 %4, i32 %5, %struct.shmid_ds* %3)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @errExit(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@SHM_LOCK = global i32 0
@.str = [16 x i8] c"shmctl()failed\0A\00"
define void @lock_shm(i32 %0) {
%2 = alloca %struct.shmid_ds
%3 = bitcast %struct.shmid_ds* %2 to i8*
%4 = load i32, i32* @SHM_LOCK
%5 = call i32 @shmctl(i32 %0, i32 %4, %struct.shmid_ds* %2)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @errExit(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bsW(int, unsigned int);
void bsPutUInt32(unsigned int u) {
  bsW(8, (u >> 24) & 0xffL);
  bsW(8, (u >> 16) & 0xffL);
  bsW(8, (u >> 8) & 0xffL);
  bsW(8, u & 0xffL);
}


x86 assembly (clang, -O0):
<bsPutUInt32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x18,%eax
mov    %eax,%eax
and    $0xff,%rax
mov    %eax,%esi
mov    $0x8,%edi
call   1030 <bsW@plt>
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
mov    %eax,%eax
and    $0xff,%rax
mov    %eax,%esi
mov    $0x8,%edi
call   1030 <bsW@plt>
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %eax,%eax
and    $0xff,%rax
mov    %eax,%esi
mov    $0x8,%edi
call   1030 <bsW@plt>
mov    -0x4(%rbp),%eax
and    $0xff,%rax
mov    %eax,%esi
mov    $0x8,%edi
call   1030 <bsW@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bsPutUInt32>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
shr    $0x18,%eax
mov    $0x8,%edi
mov    %eax,%esi
call   1030 <bsW@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%esi
mov    $0x8,%edi
call   1030 <bsW@plt>
movzbl %bh,%esi
mov    $0x8,%edi
call   1030 <bsW@plt>
movzbl %bl,%esi
mov    $0x8,%edi
pop    %rbx
jmp    1030 <bsW@plt>

LLVM IR (-O0):
define void @bsPutUInt32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 24
%5 = zext i32 %4 to i64
%6 = and i64 %5, 255
%7 = trunc i64 %6 to i32
%8 = call i32 @bsW(i32 8, i32 %7)
%9 = load i32, i32* %2
%10 = lshr i32 %9, 16
%11 = zext i32 %10 to i64
%12 = and i64 %11, 255
%13 = trunc i64 %12 to i32
%14 = call i32 @bsW(i32 8, i32 %13)
%15 = load i32, i32* %2
%16 = lshr i32 %15, 8
%17 = zext i32 %16 to i64
%18 = and i64 %17, 255
%19 = trunc i64 %18 to i32
%20 = call i32 @bsW(i32 8, i32 %19)
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
%23 = and i64 %22, 255
%24 = trunc i64 %23 to i32
%25 = call i32 @bsW(i32 8, i32 %24)
ret void
}

LLVM IR (-O2):
define void @bsPutUInt32(i32 %0) {
%2 = lshr i32 %0, 24
%3 = tail call i32 @bsW(i32 8, i32 %2)
%4 = lshr i32 %0, 16
%5 = and i32 %4, 255
%6 = tail call i32 @bsW(i32 8, i32 %5)
%7 = lshr i32 %0, 8
%8 = and i32 %7, 255
%9 = tail call i32 @bsW(i32 8, i32 %8)
%10 = and i32 %0, 255
%11 = tail call i32 @bsW(i32 8, i32 %10)
ret void
}
/* Variables and functions */
bool IsLowerLimitSwitchOpen(void) { return false; }


x86 assembly (clang, -O0):
<IsLowerLimitSwitchOpen>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsLowerLimitSwitchOpen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @IsLowerLimitSwitchOpen() {
ret i32 0
}

LLVM IR (-O2):
define i32 @IsLowerLimitSwitchOpen() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EnableHDCP(int);
void HDMITX_TrunOnHDCP(void) { EnableHDCP(1); }


x86 assembly (clang, -O0):
<HDMITX_TrunOnHDCP>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <EnableHDCP@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HDMITX_TrunOnHDCP>:
mov    $0x1,%edi
jmp    1030 <EnableHDCP@plt>

LLVM IR (-O0):
define void @HDMITX_TrunOnHDCP() {
%1 = call i32 @EnableHDCP(i32 1)
ret void
}

LLVM IR (-O2):
define void @HDMITX_TrunOnHDCP() {
%1 = tail call i32 @EnableHDCP(i32 1)
ret void
}
int utos4(unsigned int value) {
  return (value & 0x80000000) ? -(signed)(value ^ 0xffffffff) - 1 : value;
}


x86 assembly (clang, -O0):
<utos4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     112d <utos4+0x2d>
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
xor    %eax,%eax
sub    %ecx,%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1133 <utos4+0x33>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utos4>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @utos4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -2147483648
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = xor i32 %7, -1
%9 = sub nsw i32 0, %8
%10 = sub nsw i32 %9, 1
br label %13
11: ; preds = %1
%12 = load i32, i32* %2
br label %13
13: ; preds = %11, %6
%14 = phi i32 [ %10, %6 ], [ %12, %11 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @utos4(i32 returned %0) {
ret i32 %0
}