xunge/DecIR huggingface dataset:
void ldbs_poke4(unsigned char *dest, unsigned long val) {
  dest[0] = (unsigned char)(val & 0xFF);
  dest[1] = (unsigned char)((val >> 8) & 0xFF);
  dest[2] = (unsigned char)((val >> 16) & 0xFF);
  dest[3] = (unsigned char)((val >> 24) & 0xFF);
}


x86 assembly (clang, -O0):
<ldbs_poke4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
shr    $0x8,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
shr    $0x10,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%rax
shr    $0x18,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldbs_poke4>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @ldbs_poke4(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 255
%7 = trunc i64 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i64, i64* %4
%11 = lshr i64 %10, 8
%12 = and i64 %11, 255
%13 = trunc i64 %12 to i8
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i64, i64* %4
%17 = lshr i64 %16, 16
%18 = and i64 %17, 255
%19 = trunc i64 %18 to i8
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 2
store i8 %19, i8* %21
%22 = load i64, i64* %4
%23 = lshr i64 %22, 24
%24 = and i64 %23, 255
%25 = trunc i64 %24 to i8
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i64 3
store i8 %25, i8* %27
ret void
}

LLVM IR (-O2):
define void @ldbs_poke4(i8* nocapture writeonly %0, i64 %1) {
%3 = trunc i64 %1 to i8
store i8 %3, i8* %0
%4 = lshr i64 %1, 8
%5 = trunc i64 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i64 %1, 16
%8 = trunc i64 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i64 %1, 24
%11 = trunc i64 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
int simple_function() { return 42; }


x86 assembly (clang, -O0):
<simple_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_function>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @simple_function() {
ret i32 42
}

LLVM IR (-O2):
define i32 @simple_function() {
ret i32 42
}
/* Variables and functions */
float gb_exp(float);
float gb_exp2(float x) {
  return gb_exp(0.693147180559945309417232121458176568f * x);
}


x86 assembly (clang, -O0):
<gb_exp2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xedb(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
call   1030 <gb_exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gb_exp2>:
mulss  0xee8(%rip),%xmm0
jmp    1030 <gb_exp@plt>

LLVM IR (-O0):
define float @gb_exp2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 0x3FE62E4300000000, %3
%5 = call float @gb_exp(float %4)
ret float %5
}

LLVM IR (-O2):
define float @gb_exp2(float %0) {
%2 = fmul float %0, 0x3FE62E4300000000
%3 = tail call float @gb_exp(float %2)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ output_bit(int);
void output_number(int num, int bits) {
  while (bits > 0) {
    output_bit(num & (1 << (bits - 1)));
    bits--;
  }
}


x86 assembly (clang, -O0):
<output_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    114d <output_number+0x3d>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    %eax,%edi
call   1030 <output_bit@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    111e <output_number+0xe>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_number>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    1139 <output_number+0x29>
mov    %esi,%ebx
mov    %edi,%ebp
add    $0x1,%ebx
xchg   %ax,%ax
lea    -0x2(%rbx),%ecx
mov    $0x1,%edi
shl    %cl,%edi
and    %ebp,%edi
call   1030 <output_bit@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <output_number+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @output_number(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %8, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = shl i32 1, %11
%13 = and i32 %9, %12
%14 = call i32 @output_bit(i32 %13)
%15 = load i32, i32* %4
%16 = add nsw i32 %15, -1
store i32 %16, i32* %4
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @output_number(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = add nsw i32 %5, -1
%7 = shl nuw i32 1, %6
%8 = and i32 %7, %0
%9 = tail call i32 @output_bit(i32 %8)
%10 = icmp ugt i32 %5, 1
br i1 %10, label %4, label %11
11: ; preds = %4, %2
ret void
}
/* Variables and functions */
char *strchr(char *, char);
void replacechars(char *str, char from, char to) {
  while ((str = strchr(str, from)))
    *str = to;
}


x86 assembly (clang, -O0):
<replacechars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
je     1150 <replacechars+0x40>
mov    -0xa(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
jmp    1127 <replacechars+0x17>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<replacechars>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
call   1030 <strchr@plt>
test   %rax,%rax
je     1141 <replacechars+0x31>
movsbl %bpl,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
mov    %bl,(%rax)
mov    %rax,%rdi
mov    %ebp,%esi
call   1030 <strchr@plt>
test   %rax,%rax
jne    1130 <replacechars+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @replacechars(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
br label %7
7: ; preds = %12, %3
%8 = load i8*, i8** %4
%9 = load i8, i8* %5
%10 = call i8* @strchr(i8* %8, i8 signext %9)
store i8* %10, i8** %4
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i8, i8* %6
%14 = load i8*, i8** %4
store i8 %13, i8* %14
br label %7
15: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @replacechars(i8* %0, i8 signext %1, i8 signext %2) {
%4 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %10, label %6
6: ; preds = %3, %6
%7 = phi i8* [ %8, %6 ], [ %4, %3 ]
store i8 %2, i8* %7
%8 = tail call i8* @strchr(i8* dereferenceable(1) %7, i8 signext %1)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %6
10: ; preds = %6, %3
ret void
}
/* Variables and functions */
int values_equal_display_error(void const *, void *);
int check_value(const void *value, void *check_value_data) {
  return values_equal_display_error(value, check_value_data);
}


x86 assembly (clang, -O0):
<check_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <values_equal_display_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_value>:
jmp    1030 <values_equal_display_error@plt>

LLVM IR (-O0):
define i32 @check_value(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @values_equal_display_error(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @check_value(i8* %0, i8* %1) {
%3 = tail call i32 @values_equal_display_error(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
void *calloc(int, int);
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ memcpy(void *, void *, size_t);
void *mem_double(void *ptr, size_t size) {
  void *newptr;
  newptr = calloc(2 * size, 1);
  if (newptr == NULL) {
    return NULL;
  }
  memcpy(newptr, ptr, size);
  free(ptr);
  return newptr;
}


x86 assembly (clang, -O0):
<mem_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x1,%rax
mov    %eax,%edi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1170 <mem_double+0x40>
movq   $0x0,-0x8(%rbp)
jmp    1192 <mem_double+0x62>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1050 <memcpy@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_double>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
lea    (%rsi,%rsi,1),%edi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1166 <mem_double+0x36>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1050 <memcpy@plt>
mov    %r14,%rdi
call   1030 <free@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @mem_double(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = mul i64 2, %7
%9 = trunc i64 %8 to i32
%10 = call i8* @calloc(i32 %9, i32 1)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %2
store i8* null, i8** %3
br label %22
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = load i8*, i8** %4
%17 = load i64, i64* %5
%18 = call i32 @memcpy(i8* %15, i8* %16, i64 %17)
%19 = load i8*, i8** %4
%20 = call i32 @free(i8* %19)
%21 = load i8*, i8** %6
store i8* %21, i8** %3
br label %22
22: ; preds = %14, %13
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @mem_double(i8* %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl i32 %3, 1
%5 = tail call i8* @calloc(i32 %4, i32 1)
%6 = icmp eq i8* %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %1)
%9 = tail call i32 @free(i8* %0)
br label %10
10: ; preds = %2, %7
ret i8* %5
}
/* Type definitions */
struct vec4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec4_ceil(float *, float *);
__attribute__((always_)) struct vec4 *psvec4_ceil(struct vec4 *result,
                                                  struct vec4 *a) {
  vec4_ceil((float *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec4_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec4_ceil@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4_ceil>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4_ceil@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_ceil(%struct.vec4* %0, %struct.vec4* %1) {
%3 = alloca %struct.vec4*
%4 = alloca %struct.vec4*
store %struct.vec4* %0, %struct.vec4** %3
store %struct.vec4* %1, %struct.vec4** %4
%5 = load %struct.vec4*, %struct.vec4** %3
%6 = bitcast %struct.vec4* %5 to float*
%7 = load %struct.vec4*, %struct.vec4** %4
%8 = bitcast %struct.vec4* %7 to float*
%9 = call i32 @vec4_ceil(float* %6, float* %8)
%10 = load %struct.vec4*, %struct.vec4** %3
ret %struct.vec4* %10
}

LLVM IR (-O2):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_ceil(%struct.vec4* returned %0, %struct.vec4* %1) {
%3 = bitcast %struct.vec4* %0 to float*
%4 = bitcast %struct.vec4* %1 to float*
%5 = tail call i32 @vec4_ceil(float* %3, float* %4)
ret %struct.vec4* %0
}
/* Variables and functions */
int initial_set();
int /*<<< orphan*/ make_lattice();
int /*<<< orphan*/ make_nn_gathers();
int /*<<< orphan*/ setup_layout();
int setup() {
  int prompt;
  prompt = initial_set();
  setup_layout();
  make_lattice();
  make_nn_gathers();
  return prompt;
}


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <initial_set@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <setup_layout@plt>
mov    $0x0,%al
call   1060 <make_lattice@plt>
mov    $0x0,%al
call   1030 <make_nn_gathers@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
push   %rbx
xor    %eax,%eax
call   1050 <initial_set@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <setup_layout@plt>
xor    %eax,%eax
call   1060 <make_lattice@plt>
xor    %eax,%eax
call   1030 <make_nn_gathers@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @setup() {
%1 = alloca i32
%2 = call i32 (...) @initial_set()
store i32 %2, i32* %1
%3 = call i32 (...) @setup_layout()
%4 = call i32 (...) @make_lattice()
%5 = call i32 (...) @make_nn_gathers()
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @setup() {
%1 = tail call i32 (...) @initial_set()
%2 = tail call i32 (...) @setup_layout()
%3 = tail call i32 (...) @make_lattice()
%4 = tail call i32 (...) @make_nn_gathers()
ret i32 %1
}
double GLDegrees(double radians) { return (radians * 180 / 3.1415926535); }


x86 assembly (clang, -O0):
<GLDegrees>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLDegrees>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @GLDegrees(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.800000e+02
%5 = fdiv double %4, 0x400921FB54411744
ret double %5
}

LLVM IR (-O2):
define double @GLDegrees(double %0) {
%2 = fmul double %0, 1.800000e+02
%3 = fdiv double %2, 0x400921FB54411744
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ cl_int;

/* Variables and functions */
void set_error(cl_int *errcode_ret, cl_int error) {
  if (errcode_ret != NULL)
    *errcode_ret = error;
}


x86 assembly (clang, -O0):
<set_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     111f <set_error+0x1f>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_error>:
test   %rdi,%rdi
je     1107 <set_error+0x7>
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @set_error(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = load i32*, i32** %3
store i32 %8, i32* %9
br label %10
10: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @set_error(i32* writeonly %0, i32 %1) {
%3 = icmp eq i32* %0, null
br i1 %3, label %5, label %4
4: ; preds = %2
store i32 %1, i32* %0
br label %5
5: ; preds = %4, %2
ret void
}
/* Type definitions */
struct intset {
  int dummy;
};
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int intset_assign_array(struct intset *, int /*<<< orphan*/ const *, size_t,
                        int);
int /*<<< orphan*/ intset_get_vals(struct intset const *,
                                   int /*<<< orphan*/ const **, size_t *);
int intset_assign_copy(struct intset *s, const struct intset *src) {
  const int64_t *vals;
  size_t n;
  intset_get_vals(src, &vals, &n);
  return intset_assign_array(s, vals, n, 1);
}


x86 assembly (clang, -O0):
<intset_assign_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1040 <intset_get_vals@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <intset_assign_array@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intset_assign_copy>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rax
mov    %rdi,%rbx
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
mov    %rax,%rdi
call   1040 <intset_get_vals@plt>
mov    0x8(%rsp),%rsi
mov    (%rsp),%rdx
mov    %rbx,%rdi
mov    $0x1,%ecx
call   1030 <intset_assign_array@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.intset = type { i32 }
define i32 @intset_assign_copy(%struct.intset* %0, %struct.intset* %1) {
%3 = alloca %struct.intset*
%4 = alloca %struct.intset*
%5 = alloca i32*
%6 = alloca i64
store %struct.intset* %0, %struct.intset** %3
store %struct.intset* %1, %struct.intset** %4
%7 = load %struct.intset*, %struct.intset** %4
%8 = call i32 @intset_get_vals(%struct.intset* %7, i32** %5, i64* %6)
%9 = load %struct.intset*, %struct.intset** %3
%10 = load i32*, i32** %5
%11 = load i64, i64* %6
%12 = call i32 @intset_assign_array(%struct.intset* %9, i32* %10, i64 %11, i32 1)
ret i32 %12
}

LLVM IR (-O2):
%struct.intset = type { i32 }
define i32 @intset_assign_copy(%struct.intset* %0, %struct.intset* %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = bitcast i32** %3 to i8*
%6 = bitcast i64* %4 to i8*
%7 = call i32 @intset_get_vals(%struct.intset* %1, i32** %3, i64* %4)
%8 = load i32*, i32** %3
%9 = load i64, i64* %4
%10 = call i32 @intset_assign_array(%struct.intset* %0, i32* %8, i64 %9, i32 1)
ret i32 %10
}
/* Variables and functions */
int RSA_padding_add_PKCS1_OAEP_mgf1(unsigned char *, int, unsigned char const *,
                                    int, unsigned char const *, int,
                                    int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int RSA_padding_add_PKCS1_OAEP(unsigned char *to, int tlen,
                               const unsigned char *from, int flen,
                               const unsigned char *param, int plen) {
  return RSA_padding_add_PKCS1_OAEP_mgf1(to, tlen, from, flen, param, plen,
                                         NULL, NULL);
}


x86 assembly (clang, -O0):
<RSA_padding_add_PKCS1_OAEP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
mov    -0x2c(%rbp),%r9d
xor    %eax,%eax
movq   $0x0,(%rsp)
movq   $0x0,0x8(%rsp)
call   1030 <RSA_padding_add_PKCS1_OAEP_mgf1@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_padding_add_PKCS1_OAEP>:
sub    $0x18,%rsp
xorps  %xmm0,%xmm0
movups %xmm0,(%rsp)
call   1030 <RSA_padding_add_PKCS1_OAEP_mgf1@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @RSA_padding_add_PKCS1_OAEP(i8* %0, i32 %1, i8* %2, i32 %3, i8* %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i32
store i8* %0, i8** %7
store i32 %1, i32* %8
store i8* %2, i8** %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i32 %5, i32* %12
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = load i8*, i8** %9
%16 = load i32, i32* %10
%17 = load i8*, i8** %11
%18 = load i32, i32* %12
%19 = call i32 @RSA_padding_add_PKCS1_OAEP_mgf1(i8* %13, i32 %14, i8* %15, i32 %16, i8* %17, i32 %18, i32* null, i32* null)
ret i32 %19
}

LLVM IR (-O2):
define i32 @RSA_padding_add_PKCS1_OAEP(i8* %0, i32 %1, i8* %2, i32 %3, i8* %4, i32 %5) {
%7 = tail call i32 @RSA_padding_add_PKCS1_OAEP_mgf1(i8* %0, i32 %1, i8* %2, i32 %3, i8* %4, i32 %5, i32* null, i32* null)
ret i32 %7
}
long signed int f5(long signed int arg) { return arg; }


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @f5(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @f5(i64 returned %0) {
ret i64 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ create_crunched_output(char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ init();
int /*<<< orphan*/ process_UnicodeData_input(int /*<<< orphan*/ *);
int crunch_UnicodeData(char *name, FILE *in, FILE *out) {
  init();
  process_UnicodeData_input(in);
  create_crunched_output(name, out);
  return 0;
}


x86 assembly (clang, -O0):
<crunch_UnicodeData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1040 <init@plt>
mov    -0x10(%rbp),%rdi
call   1050 <process_UnicodeData_input@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <create_crunched_output@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crunch_UnicodeData>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
xor    %eax,%eax
call   1040 <init@plt>
mov    %rbx,%rdi
call   1050 <process_UnicodeData_input@plt>
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <create_crunched_output@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @crunch_UnicodeData(i8* %0, i32* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = call i32 (...) @init()
%8 = load i32*, i32** %5
%9 = call i32 @process_UnicodeData_input(i32* %8)
%10 = load i8*, i8** %4
%11 = load i32*, i32** %6
%12 = call i32 @create_crunched_output(i8* %10, i32* %11)
ret i32 0
}

LLVM IR (-O2):
define i32 @crunch_UnicodeData(i8* %0, i32* %1, i32* %2) {
%4 = tail call i32 (...) @init()
%5 = tail call i32 @process_UnicodeData_input(i32* %1)
%6 = tail call i32 @create_crunched_output(i8* %0, i32* %2)
ret i32 0
}
unsigned int LZ4S_GetCheckBits_FromXXH(unsigned int xxh) {
  return (xxh >> 8) & 0xff;
}


x86 assembly (clang, -O0):
<LZ4S_GetCheckBits_FromXXH>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4S_GetCheckBits_FromXXH>:
mov    %edi,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @LZ4S_GetCheckBits_FromXXH(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 8
%5 = and i32 %4, 255
ret i32 %5
}

LLVM IR (-O2):
define i32 @LZ4S_GetCheckBits_FromXXH(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 255
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _MM_SHUFFLE(int /*<<< orphan*/, int /*<<< orphan*/, int,
                               int /*<<< orphan*/);
int /*<<< orphan*/ _mm_shuffle_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_unpacklo_epi64(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i k_packs_epi64(__m128i a, __m128i b) {
  __m128i buf0 = _mm_shuffle_epi32(a, _MM_SHUFFLE(0, 0, 2, 0));
  __m128i buf1 = _mm_shuffle_epi32(b, _MM_SHUFFLE(0, 0, 2, 0));
  return _mm_unpacklo_epi64(buf0, buf1);
}


x86 assembly (clang, -O0):
<k_packs_epi64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
xor    %ecx,%ecx
mov    $0x2,%edx
mov    %ecx,%edi
mov    %ecx,%esi
call   1030 <_MM_SHUFFLE@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%esi
call   1040 <_mm_shuffle_epi32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
xor    %ecx,%ecx
mov    $0x2,%edx
mov    %ecx,%edi
mov    %ecx,%esi
call   1030 <_MM_SHUFFLE@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
call   1040 <_mm_shuffle_epi32@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1050 <_mm_unpacklo_epi64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_packs_epi64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
xor    %esi,%esi
mov    $0x2,%edx
xor    %ecx,%ecx
call   1030 <_MM_SHUFFLE@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1040 <_mm_shuffle_epi32@plt>
mov    %eax,%ebp
xor    %edi,%edi
xor    %esi,%esi
mov    $0x2,%edx
xor    %ecx,%ecx
call   1030 <_MM_SHUFFLE@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1040 <_mm_shuffle_epi32@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <_mm_unpacklo_epi64@plt>

LLVM IR (-O0):
define i32 @k_packs_epi64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = call i32 @_MM_SHUFFLE(i32 0, i32 0, i32 2, i32 0)
%9 = call i32 @_mm_shuffle_epi32(i32 %7, i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = call i32 @_MM_SHUFFLE(i32 0, i32 0, i32 2, i32 0)
%12 = call i32 @_mm_shuffle_epi32(i32 %10, i32 %11)
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @_mm_unpacklo_epi64(i32 %13, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @k_packs_epi64(i32 %0, i32 %1) {
%3 = tail call i32 @_MM_SHUFFLE(i32 0, i32 0, i32 2, i32 0)
%4 = tail call i32 @_mm_shuffle_epi32(i32 %0, i32 %3)
%5 = tail call i32 @_MM_SHUFFLE(i32 0, i32 0, i32 2, i32 0)
%6 = tail call i32 @_mm_shuffle_epi32(i32 %1, i32 %5)
%7 = tail call i32 @_mm_unpacklo_epi64(i32 %4, i32 %6)
ret i32 %7
}
int execute_poll() { return 0; }


x86 assembly (clang, -O0):
<execute_poll>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_poll>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_poll() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_poll() {
ret i32 0
}
void zera_string(char *palavra, int tamanho) {
  int indice;
  for (indice = 0; indice < tamanho; indice++)
    *(palavra + indice) = '\0';
}


x86 assembly (clang, -O0):
<zera_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1138 <zera_string+0x38>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <zera_string+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zera_string>:
test   %esi,%esi
jle    1122 <zera_string+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @zera_string(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @zera_string(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ the_horror();
int main() {
  printf("Corrective solutions aren't working. We might have to upgrade.\n");
  the_horror();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <the_horror@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <the_horror@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [64 x i8] c"Corrective solutions aren't working. We might have to upgrade.\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @the_horror()
ret i32 0
}

LLVM IR (-O2):
@str = [63 x i8] c"Corrective solutions aren't working. We might have to upgrade.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([63 x i8], [63 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @the_horror()
ret i32 0
}
int test_imm_89uint8_mem(unsigned char *val) {
  return ((*val) & (-0x89 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_89uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff77,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_89uint8_mem>:
testb  $0x77,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_89uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -137
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_89uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 119
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
double random_double();
long flip(double prob) {
  double pos = random_double();
  if (pos < prob)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<flip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <random_double@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    114a <flip+0x3a>
movq   $0x1,-0x8(%rbp)
jmp    1152 <flip+0x42>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <random_double@plt>
xor    %eax,%eax
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i64 @flip(double %0) {
%2 = alloca i64
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = call double (...) @random_double()
store double %5, double* %4
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fcmp olt double %6, %7
br i1 %8, label %9, label %10
9: ; preds = %1
store i64 1, i64* %2
br label %11
10: ; preds = %1
store i64 0, i64* %2
br label %11
11: ; preds = %10, %9
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
define i64 @flip(double %0) {
%2 = tail call double (...) @random_double()
%3 = fcmp olt double %2, %0
%4 = zext i1 %3 to i64
ret i64 %4
}
/* Variables and functions */
int serial_in();
int /*<<< orphan*/ serial_in_ready();
int serial_read() {
  while (!serial_in_ready())
    ;
  return serial_in();
}


x86 assembly (clang, -O0):
<serial_read>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <serial_read+0x9>
mov    $0x0,%al
call   1030 <serial_in_ready@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1145 <serial_read+0x25>
jmp    114a <serial_read+0x2a>
jmp    1129 <serial_read+0x9>
mov    $0x0,%al
call   1040 <serial_in@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_read>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <serial_in_ready@plt>
test   %eax,%eax
je     1130 <serial_read+0x10>
xor    %eax,%eax
pop    %rcx
jmp    1040 <serial_in@plt>

LLVM IR (-O0):
define i32 @serial_read() {
br label %1
1: ; preds = %5, %0
%2 = call i32 (...) @serial_in_ready()
%3 = icmp ne i32 %2, 0
%4 = xor i1 %3, true
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
%7 = call i32 (...) @serial_in()
ret i32 %7
}

LLVM IR (-O2):
define i32 @serial_read() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @serial_in_ready()
%3 = icmp eq i32 %2, 0
br i1 %3, label %1, label %4
4: ; preds = %1
%5 = tail call i32 (...) @serial_in()
ret i32 %5
}
void avio_wl64() {}


x86 assembly (clang, -O0):
<avio_wl64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_wl64>:
ret

LLVM IR (-O0):
define void @avio_wl64() {
ret void
}

LLVM IR (-O2):
define void @avio_wl64() {
ret void
}
/* Type definitions */
struct wpa_ctrl {
  int dummy;
};

/* Variables and functions */
int wpa_ctrl_command(struct wpa_ctrl *, char *);
int wpa_cli_cmd_status(struct wpa_ctrl *ctrl, int argc, char *argv[]) {
  return wpa_ctrl_command(ctrl, "STATUS");
}


x86 assembly (clang, -O0):
<wpa_cli_cmd_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <wpa_ctrl_command@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_cli_cmd_status>:
lea    0xee9(%rip),%rsi
jmp    1030 <wpa_ctrl_command@plt>

LLVM IR (-O0):
%struct.wpa_ctrl = type { i32 }
@.str = [7 x i8] c"STATUS\00"
define i32 @wpa_cli_cmd_status(%struct.wpa_ctrl* %0, i32 %1, i8** %2) {
%4 = alloca %struct.wpa_ctrl*
%5 = alloca i32
%6 = alloca i8**
store %struct.wpa_ctrl* %0, %struct.wpa_ctrl** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load %struct.wpa_ctrl*, %struct.wpa_ctrl** %4
%8 = call i32 @wpa_ctrl_command(%struct.wpa_ctrl* %7, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 %8
}

LLVM IR (-O2):
%struct.wpa_ctrl = type { i32 }
@.str = [7 x i8] c"STATUS\00"
define i32 @wpa_cli_cmd_status(%struct.wpa_ctrl* %0, i32 %1, i8** nocapture readnone %2) {
%4 = tail call i32 @wpa_ctrl_command(%struct.wpa_ctrl* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}
void PECIDomainEnable(unsigned long ulBase, unsigned long ulDomain) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) |= (1 << ulDomain);
}


x86 assembly (clang, -O0):
<PECIDomainEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIDomainEnable>:
mov    %rsi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
cltq
or     %rax,(%rdi)
ret

LLVM IR (-O0):
define void @PECIDomainEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 1, %6
%8 = sext i32 %7 to i64
%9 = load i64, i64* %3
%10 = add i64 %9, 0
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}

LLVM IR (-O2):
define void @PECIDomainEnable(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl nuw i32 1, %3
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %0 to i64*
%7 = load volatile i64, i64* %6
%8 = or i64 %7, %5
store volatile i64 %8, i64* %6
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long above;
};
typedef TYPE_1__ XConfigureEvent;

/* Variables and functions */
void set_XConfigureEvent_above(void *_p, unsigned long _v) {
  ((XConfigureEvent *)_p)->above = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XConfigureEvent_above>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XConfigureEvent_above>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XConfigureEvent_above(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XConfigureEvent_above(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct clause_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_clear(struct genlist *);
void clause_list_clear(struct clause_list *tthis) {
  genlist_clear((struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<clause_list_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clause_list_clear>:
jmp    1030 <genlist_clear@plt>

LLVM IR (-O0):
%struct.clause_list = type { i32 }
%struct.genlist = type { i32 }
define void @clause_list_clear(%struct.clause_list* %0) {
%2 = alloca %struct.clause_list*
store %struct.clause_list* %0, %struct.clause_list** %2
%3 = load %struct.clause_list*, %struct.clause_list** %2
%4 = bitcast %struct.clause_list* %3 to %struct.genlist*
%5 = call i32 @genlist_clear(%struct.genlist* %4)
ret void
}

LLVM IR (-O2):
%struct.clause_list = type { i32 }
%struct.genlist = type { i32 }
define void @clause_list_clear(%struct.clause_list* %0) {
%2 = bitcast %struct.clause_list* %0 to %struct.genlist*
%3 = tail call i32 @genlist_clear(%struct.genlist* %2)
ret void
}
/* Variables and functions */
void *calloc(int, size_t);
void *my_zeroing_malloc(size_t howmuch) { return calloc(1, howmuch); }


x86 assembly (clang, -O0):
<my_zeroing_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_zeroing_malloc>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @my_zeroing_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @calloc(i32 1, i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @my_zeroing_malloc(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
ret i8* %2
}
void RTTestSubV(void) {}


x86 assembly (clang, -O0):
<RTTestSubV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTestSubV>:
ret

LLVM IR (-O0):
define void @RTTestSubV() {
ret void
}

LLVM IR (-O2):
define void @RTTestSubV() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ crc_update(int /*<<< orphan*/, int /*<<< orphan*/);
uint8_t crc_calc(uint8_t *data, int len) {
  uint8_t crc = 0;
  int i;
  for (i = 0; i < len; i++)
    crc = crc_update(crc, data[i]);
  return crc;
}


x86 assembly (clang, -O0):
<crc_calc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115d <crc_calc+0x4d>
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
call   1030 <crc_update@plt>
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <crc_calc+0x1d>
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc_calc>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1146 <crc_calc+0x36>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    (%r14,%rbx,4),%esi
mov    %eax,%edi
call   1030 <crc_update@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <crc_calc+0x20>
jmp    1148 <crc_calc+0x38>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @crc_calc(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32, i32* %5
%13 = load i32*, i32** %3
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = call i32 @crc_update(i32 %12, i32 %17)
store i32 %18, i32* %5
br label %19
19: ; preds = %11
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @crc_calc(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = phi i32 [ 0, %4 ], [ %11, %6 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %7
%10 = load i32, i32* %9
%11 = tail call i32 @crc_update(i32 %8, i32 %10)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
%15 = phi i32 [ 0, %2 ], [ %11, %6 ]
ret i32 %15
}
/* Type definitions */
struct timeval {
  int dummy;
};
struct rusage {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ RUSAGE_SELF;
int /*<<< orphan*/ get_cputime_from_rusage(struct rusage *, struct timeval *);
int /*<<< orphan*/ getrusage(int /*<<< orphan*/, struct rusage *);
void start_timer(struct timeval *tv_for_recording_start_time) {
  struct rusage temp_rusage;
  getrusage(RUSAGE_SELF, &temp_rusage);
  get_cputime_from_rusage(&temp_rusage, tv_for_recording_start_time);
}


x86 assembly (clang, -O0):
<start_timer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1040 <getrusage@plt>
mov    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdi
call   1030 <get_cputime_from_rusage@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_timer>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%r14
mov    %r14,%rsi
call   1040 <getrusage@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <get_cputime_from_rusage@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
%struct.rusage = type { i32 }
@RUSAGE_SELF = global i32 0
define void @start_timer(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
%3 = alloca %struct.rusage
store %struct.timeval* %0, %struct.timeval** %2
%4 = load i32, i32* @RUSAGE_SELF
%5 = call i32 @getrusage(i32 %4, %struct.rusage* %3)
%6 = load %struct.timeval*, %struct.timeval** %2
%7 = call i32 @get_cputime_from_rusage(%struct.rusage* %3, %struct.timeval* %6)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
%struct.rusage = type { i32 }
@RUSAGE_SELF = global i32 0
define void @start_timer(%struct.timeval* %0) {
%2 = alloca %struct.rusage
%3 = bitcast %struct.rusage* %2 to i8*
%4 = load i32, i32* @RUSAGE_SELF
%5 = call i32 @getrusage(i32 %4, %struct.rusage* %2)
%6 = call i32 @get_cputime_from_rusage(%struct.rusage* %2, %struct.timeval* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_proplist_update() {
  printf("NOT IMPLEMENTED:"
         "pa_proplist_update"
         "\n");
}


x86 assembly (clang, -O0):
<pa_proplist_update>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_proplist_update>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_proplist_update\0A\00"
define i32 @pa_proplist_update() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_proplist_update\00"
define i32 @pa_proplist_update() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
double sqrt(double);
double square(double);
double x_intercept(double r) { return (sqrt(square(r) - (square(r) / 4.0))); }


x86 assembly (clang, -O0):
<x_intercept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <square@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <square@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
movsd  0xeaa(%rip),%xmm2
divsd  %xmm2,%xmm1
subsd  %xmm1,%xmm0
call   1040 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_intercept>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <square@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <square@plt>
mulsd  0xeb8(%rip),%xmm0
addsd  0x10(%rsp),%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1161 <x_intercept+0x41>
sqrtsd %xmm0,%xmm0
add    $0x18,%rsp
ret
add    $0x18,%rsp
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @x_intercept(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @square(double %3)
%5 = load double, double* %2
%6 = call double @square(double %5)
%7 = fdiv double %6, 4.000000e+00
%8 = fsub double %4, %7
%9 = call double @sqrt(double %8)
ret double %9
}

LLVM IR (-O2):
define double @x_intercept(double %0) {
%2 = tail call double @square(double %0)
%3 = tail call double @square(double %0)
%4 = fmul double %3, 2.500000e-01
%5 = fsub double %2, %4
%6 = tail call double @sqrt(double %5)
ret double %6
}
void test_five(int x, int y, int z) {
#pragma omp target teams distribute simd collapse(2)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      for (int i = 0; i < z; i++)
        ;
}


x86 assembly (clang, -O0):
<test_five>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    117f <test_five+0x7f>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    116c <test_five+0x6c>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <test_five+0x59>
jmp    114b <test_five+0x4b>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113a <test_five+0x3a>
jmp    115e <test_five+0x5e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <test_five+0x27>
jmp    1171 <test_five+0x71>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <test_five+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_five>:
ret

LLVM IR (-O0):
define void @test_five(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %10
10: ; preds = %33, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %4
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %36
14: ; preds = %10
store i32 0, i32* %8
br label %15
15: ; preds = %29, %14
%16 = load i32, i32* %8
%17 = load i32, i32* %5
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %32
19: ; preds = %15
store i32 0, i32* %9
br label %20
20: ; preds = %25, %19
%21 = load i32, i32* %9
%22 = load i32, i32* %6
%23 = icmp slt i32 %21, %22
br i1 %23, label %24, label %28
24: ; preds = %20
br label %25
25: ; preds = %24
%26 = load i32, i32* %9
%27 = add nsw i32 %26, 1
store i32 %27, i32* %9
br label %20
28: ; preds = %20
br label %29
29: ; preds = %28
%30 = load i32, i32* %8
%31 = add nsw i32 %30, 1
store i32 %31, i32* %8
br label %15
32: ; preds = %15
br label %33
33: ; preds = %32
%34 = load i32, i32* %7
%35 = add nsw i32 %34, 1
store i32 %35, i32* %7
br label %10
36: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @test_five(i32 %0, i32 %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *dlsym(void *handle, const char *symbol) { abort(); }


x86 assembly (clang, -O0):
<dlsym>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<dlsym>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @dlsym(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define noalias i8* @dlsym(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @abort()
unreachable
}