#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig) {
  ASSERT(ui32Base == 0x44030000);
  ASSERT((ui32CRCConfig & 0x00000000) || (ui32CRCConfig & 0x00004000) ||
         (ui32CRCConfig & 0x00006000) || (ui32CRCConfig & 0x00001000) ||
         (ui32CRCConfig & 0x00000000) || (ui32CRCConfig & 0x00000200) ||
         (ui32CRCConfig & 0x00000100) || (ui32CRCConfig & 0x00000080) ||
         (ui32CRCConfig & 0x00000020) || (ui32CRCConfig & 0x00000010) ||
         (ui32CRCConfig & 0x00000000) || (ui32CRCConfig & 0x00000001) ||
         (ui32CRCConfig & 0x00000002) || (ui32CRCConfig & 0x00000003) ||
         (ui32CRCConfig & 0x00000008));
  (*((volatile uint32_t *)(ui32Base + 0x00000400))) = ui32CRCConfig;
}


x86 assembly (clang, -O0):
<CRCConfigSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x44030000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
and    $0x0,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x4000,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x6000,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x1000,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x0,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x200,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x100,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x80,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x20,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x10,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x0,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x1,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x2,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%ecx
and    $0x3,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    126b <CRCConfigSet+0x15b>
mov    -0x8(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x400,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRCConfigSet>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x44030000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0x73bb,%ebx
setne  %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x400(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @CRCConfigSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141047296
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = and i32 %9, 0
%11 = icmp ne i32 %10, 0
br i1 %11, label %68, label %12
12: ; preds = %2
%13 = load i32, i32* %4
%14 = and i32 %13, 16384
%15 = icmp ne i32 %14, 0
br i1 %15, label %68, label %16
16: ; preds = %12
%17 = load i32, i32* %4
%18 = and i32 %17, 24576
%19 = icmp ne i32 %18, 0
br i1 %19, label %68, label %20
20: ; preds = %16
%21 = load i32, i32* %4
%22 = and i32 %21, 4096
%23 = icmp ne i32 %22, 0
br i1 %23, label %68, label %24
24: ; preds = %20
%25 = load i32, i32* %4
%26 = and i32 %25, 0
%27 = icmp ne i32 %26, 0
br i1 %27, label %68, label %28
28: ; preds = %24
%29 = load i32, i32* %4
%30 = and i32 %29, 512
%31 = icmp ne i32 %30, 0
br i1 %31, label %68, label %32
32: ; preds = %28
%33 = load i32, i32* %4
%34 = and i32 %33, 256
%35 = icmp ne i32 %34, 0
br i1 %35, label %68, label %36
36: ; preds = %32
%37 = load i32, i32* %4
%38 = and i32 %37, 128
%39 = icmp ne i32 %38, 0
br i1 %39, label %68, label %40
40: ; preds = %36
%41 = load i32, i32* %4
%42 = and i32 %41, 32
%43 = icmp ne i32 %42, 0
br i1 %43, label %68, label %44
44: ; preds = %40
%45 = load i32, i32* %4
%46 = and i32 %45, 16
%47 = icmp ne i32 %46, 0
br i1 %47, label %68, label %48
48: ; preds = %44
%49 = load i32, i32* %4
%50 = and i32 %49, 0
%51 = icmp ne i32 %50, 0
br i1 %51, label %68, label %52
52: ; preds = %48
%53 = load i32, i32* %4
%54 = and i32 %53, 1
%55 = icmp ne i32 %54, 0
br i1 %55, label %68, label %56
56: ; preds = %52
%57 = load i32, i32* %4
%58 = and i32 %57, 2
%59 = icmp ne i32 %58, 0
br i1 %59, label %68, label %60
60: ; preds = %56
%61 = load i32, i32* %4
%62 = and i32 %61, 3
%63 = icmp ne i32 %62, 0
br i1 %63, label %68, label %64
64: ; preds = %60
%65 = load i32, i32* %4
%66 = and i32 %65, 8
%67 = icmp ne i32 %66, 0
br label %68
68: ; preds = %64, %60, %56, %52, %48, %44, %40, %36, %32, %28, %24, %20, %16, %12, %2
%69 = phi i1 [ true, %60 ], [ true, %56 ], [ true, %52 ], [ true, %48 ], [ true, %44 ], [ true, %40 ], [ true, %36 ], [ true, %32 ], [ true, %28 ], [ true, %24 ], [ true, %20 ], [ true, %16 ], [ true, %12 ], [ true, %2 ], [ %67, %64 ]
%70 = zext i1 %69 to i32
%71 = call i32 @ASSERT(i32 %70)
%72 = load i32, i32* %4
%73 = load i32, i32* %3
%74 = add nsw i32 %73, 1024
%75 = sext i32 %74 to i64
%76 = inttoptr i64 %75 to i32*
store volatile i32 %72, i32* %76
ret void
}

LLVM IR (-O2):
define void @CRCConfigSet(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1141047296
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = and i32 %1, 29627
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 1024
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %1, i32* %12
ret void
}