xunge/DecIR huggingface dataset:
/* Variables and functions */
long UARTCharGetNonBlocking(int);
unsigned char UartReceiveByte(unsigned char *data) {
  signed long result;
  result = UARTCharGetNonBlocking(0x4000C000);
  if (result != -1) {
    *data = (unsigned char)result;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<UartReceiveByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x4000c000,%edi
call   1030 <UARTCharGetNonBlocking@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0xffffffffffffffff,-0x18(%rbp)
je     114a <UartReceiveByte+0x3a>
mov    -0x18(%rbp),%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movb   $0x1,-0x1(%rbp)
jmp    114e <UartReceiveByte+0x3e>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UartReceiveByte>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4000c000,%edi
call   1030 <UARTCharGetNonBlocking@plt>
cmp    $0xffffffffffffffff,%rax
je     112a <UartReceiveByte+0x1a>
mov    %al,(%rbx)
mov    $0x1,%al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @UartReceiveByte(i8* %0) {
%2 = alloca i8
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = call i64 @UARTCharGetNonBlocking(i32 1073790976)
store i64 %5, i64* %4
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, -1
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i64, i64* %4
%10 = trunc i64 %9 to i8
%11 = load i8*, i8** %3
store i8 %10, i8* %11
store i8 1, i8* %2
br label %13
12: ; preds = %1
store i8 0, i8* %2
br label %13
13: ; preds = %12, %8
%14 = load i8, i8* %2
ret i8 %14
}

LLVM IR (-O2):
define zeroext i8 @UartReceiveByte(i8* nocapture writeonly %0) {
%2 = tail call i64 @UARTCharGetNonBlocking(i32 1073790976)
%3 = icmp eq i64 %2, -1
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = trunc i64 %2 to i8
store i8 %5, i8* %0
br label %6
6: ; preds = %1, %4
%7 = phi i8 [ 1, %4 ], [ 0, %1 ]
ret i8 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void dump(float *input) {
  int i;
  for (i = 0; i < 32 * (32 + 2) * 32; ++i) {
    printf("%f\n", input[i]);
  }
}


x86 assembly (clang, -O0):
<dump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8800,-0xc(%rbp)
jge    1157 <dump+0x47>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <dump+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
xor    %ebx,%ebx
lea    0xedf(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movss  (%r15,%rbx,4),%xmm0
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    $0x8800,%rbx
jne    1130 <dump+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%f\0A\00"
define void @dump(float* %0) {
%2 = alloca float*
%3 = alloca i32
store float* %0, float** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 34816
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load float*, float** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds float, float* %8, i64 %10
%12 = load float, float* %11
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float %12)
br label %14
14: ; preds = %7
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define void @dump(float* nocapture %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds float, float* %0, i64 %3
%5 = load float, float* %4
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float %5)
%7 = add nuw nsw i64 %3, 1
%8 = icmp eq i64 %7, 34816
br i1 %8, label %9, label %2
9: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void border_print(void) {
  printf("==================================================================="
         "=============\n");
}


x86 assembly (clang, -O0):
<border_print>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<border_print>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [82 x i8] c"================================================================================\0A\00"
define void @border_print() {
%1 = call i32 @printf(i8* getelementptr inbounds ([82 x i8], [82 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [81 x i8] c"================================================================================\00"
define void @border_print() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([81 x i8], [81 x i8]* @str, i64 0, i64 0))
ret void
}
long strlen(const char *str) {
  const char *start = str;
  while (*str)
    str++;
  return str - start;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     112e <strlen+0x2e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %9, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
br label %5
12: ; preds = %5
%13 = load i8*, i8** %2
%14 = load i8*, i8** %3
%15 = ptrtoint i8* %13 to i64
%16 = ptrtoint i8* %14 to i64
%17 = sub i64 %15, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @strlen(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = ptrtoint i8* %3 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
ret i64 %10
}
void pmksa_cache_clear_current(struct wpa_sm *sm) {}


x86 assembly (clang, -O0):
<pmksa_cache_clear_current>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmksa_cache_clear_current>:
ret

LLVM IR (-O0):
%struct.wpa_sm = type opaque
define void @pmksa_cache_clear_current(%struct.wpa_sm* %0) {
%2 = alloca %struct.wpa_sm*
store %struct.wpa_sm* %0, %struct.wpa_sm** %2
ret void
}

LLVM IR (-O2):
%struct.wpa_sm = type opaque
define void @pmksa_cache_clear_current(%struct.wpa_sm* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("Hello, World.");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello, World.\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello, World.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
long long return_ll(int ll0, long long ll1, int ll2) { return ll0 + ll1 + ll2; }


x86 assembly (clang, -O0):
<return_ll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movslq -0x4(%rbp),%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_ll>:
movslq %edi,%rcx
add    %rsi,%rcx
movslq %edx,%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @return_ll(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = load i64, i64* %5
%10 = add nsw i64 %8, %9
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = add nsw i64 %10, %12
ret i64 %13
}

LLVM IR (-O2):
define i64 @return_ll(i32 %0, i64 %1, i32 %2) {
%4 = sext i32 %0 to i64
%5 = add nsw i64 %4, %1
%6 = sext i32 %2 to i64
%7 = add nsw i64 %5, %6
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, double);
int handler_result_svg(double dx, double dy, double dz, double f) {
  printf("%f,%f ", dx, dy);
}


x86 assembly (clang, -O0):
<handler_result_svg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  %xmm3,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler_result_svg>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%f,%f \00"
define i32 @handler_result_svg(double %0, double %1, double %2, double %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double %0, double* %6
store double %1, double* %7
store double %2, double* %8
store double %3, double* %9
%10 = load double, double* %6
%11 = load double, double* %7
%12 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), double %10, double %11)
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
@.str = [7 x i8] c"%f,%f \00"
define i32 @handler_result_svg(double %0, double %1, double %2, double %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), double %0, double %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ SQLITE_OK;
int /*<<< orphan*/ sqlite3_errstr(int /*<<< orphan*/);
int strcmp(int /*<<< orphan*/, char *);
int main(void) { return strcmp(sqlite3_errstr(SQLITE_OK), "not an error"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
call   1040 <sqlite3_errstr@plt>
mov    %eax,%edi
lea    0xeba(%rip),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1040 <sqlite3_errstr@plt>
lea    0xeca(%rip),%rsi
mov    %eax,%edi
pop    %rax
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
@SQLITE_OK = global i32 0
@.str = [13 x i8] c"not an error\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @SQLITE_OK
%3 = call i32 @sqlite3_errstr(i32 %2)
%4 = call i32 @strcmp(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@SQLITE_OK = global i32 0
@.str = [13 x i8] c"not an error\00"
define i32 @main() {
%1 = load i32, i32* @SQLITE_OK
%2 = tail call i32 @sqlite3_errstr(i32 %1)
%3 = tail call i32 @strcmp(i32 %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
void _infix_operator_mod_u64_u64(unsigned long long lhs, unsigned long long rhs,
                                 unsigned long long *__rval_1) {
  *__rval_1 = lhs % rhs;
}


x86 assembly (clang, -O0):
<_infix_operator_mod_u64_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rdx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_infix_operator_mod_u64_u64>:
mov    %rdx,%rcx
mov    %rdi,%rax
mov    %rdi,%rdx
or     %rsi,%rdx
shr    $0x20,%rdx
je     111b <_infix_operator_mod_u64_u64+0x1b>
xor    %edx,%edx
div    %rsi
mov    %rdx,(%rcx)
ret
xor    %edx,%edx
div    %esi
mov    %rdx,(%rcx)
ret

LLVM IR (-O0):
define void @_infix_operator_mod_u64_u64(i64 %0, i64 %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = urem i64 %7, %8
%10 = load i64*, i64** %6
store i64 %9, i64* %10
ret void
}

LLVM IR (-O2):
define void @_infix_operator_mod_u64_u64(i64 %0, i64 %1, i64* nocapture writeonly %2) {
%4 = urem i64 %0, %1
store i64 %4, i64* %2
ret void
}
void mod_random_is_dlclose_safe() {}


x86 assembly (clang, -O0):
<mod_random_is_dlclose_safe>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_random_is_dlclose_safe>:
ret

LLVM IR (-O0):
define void @mod_random_is_dlclose_safe() {
ret void
}

LLVM IR (-O2):
define void @mod_random_is_dlclose_safe() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel,
                      uint32_t ui32RxLevel) {
  ;

  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000034))) = ui32TxLevel | ui32RxLevel;
}


x86 assembly (clang, -O0):
<UARTFIFOLevelSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
or     -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x34,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTFIFOLevelSet>:
or     %edx,%esi
movslq %edi,%rax
mov    %esi,0x34(%rax)
ret

LLVM IR (-O0):
define void @UARTFIFOLevelSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = or i32 %7, %8
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 52
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %9, i32* %13
ret void
}

LLVM IR (-O2):
define void @UARTFIFOLevelSet(i32 %0, i32 %1, i32 %2) {
%4 = or i32 %2, %1
%5 = add nsw i32 %0, 52
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
store volatile i32 %4, i32* %7
ret void
}
int is_skippable(char c, char *skips) {
  for (; *skips; ++skips)
    if (c == *skips)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_skippable>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1150 <is_skippable+0x50>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    113a <is_skippable+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1157 <is_skippable+0x57>
jmp    113f <is_skippable+0x3f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110e <is_skippable+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_skippable>:
mov    (%rsi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1120 <is_skippable+0x20>
add    $0x1,%rsi
nopl   0x0(%rax)
cmp    %dil,%cl
je     1121 <is_skippable+0x21>
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <is_skippable+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_skippable(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
store i8 %0, i8* %4
store i8* %1, i8** %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %12, %15
br i1 %16, label %17, label %18
17: ; preds = %10
store i32 1, i32* %3
br label %23
18: ; preds = %10
br label %19
19: ; preds = %18
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %5
br label %6
22: ; preds = %6
store i32 0, i32* %3
br label %23
23: ; preds = %22, %17
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_skippable(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %8
5: ; preds = %8
%6 = load i8, i8* %12
%7 = icmp eq i8 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %2, %5
%9 = phi i8 [ %6, %5 ], [ %3, %2 ]
%10 = phi i8* [ %12, %5 ], [ %1, %2 ]
%11 = icmp eq i8 %9, %0
%12 = getelementptr inbounds i8, i8* %10, i64 1
br i1 %11, label %13, label %5
13: ; preds = %8, %5, %2
%14 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %8 ]
ret i32 %14
}
void foo271(int p) {}


x86 assembly (clang, -O0):
<foo271>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo271>:
ret

LLVM IR (-O0):
define void @foo271(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo271(i32 %0) {
ret void
}
void GC_free(void *p) { return; }


x86 assembly (clang, -O0):
<GC_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GC_free>:
ret

LLVM IR (-O0):
define void @GC_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @GC_free(i8* nocapture %0) {
ret void
}
int z_sys_current_irq_key_get(void) { return 0; }


x86 assembly (clang, -O0):
<z_sys_current_irq_key_get>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<z_sys_current_irq_key_get>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @z_sys_current_irq_key_get() {
ret i32 0
}

LLVM IR (-O2):
define i32 @z_sys_current_irq_key_get() {
ret i32 0
}
/* Type definitions */
struct Chabu_Data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ handleReads(struct Chabu_Data *);
int /*<<< orphan*/ handleWrites(struct Chabu_Data *);
void Chabu_HandleNetwork(struct Chabu_Data *chabu) {
  handleReads(chabu);
  handleWrites(chabu);
}


x86 assembly (clang, -O0):
<Chabu_HandleNetwork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <handleReads@plt>
mov    -0x8(%rbp),%rdi
call   1040 <handleWrites@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Chabu_HandleNetwork>:
push   %rbx
mov    %rdi,%rbx
call   1030 <handleReads@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <handleWrites@plt>

LLVM IR (-O0):
%struct.Chabu_Data = type { i32 }
define void @Chabu_HandleNetwork(%struct.Chabu_Data* %0) {
%2 = alloca %struct.Chabu_Data*
store %struct.Chabu_Data* %0, %struct.Chabu_Data** %2
%3 = load %struct.Chabu_Data*, %struct.Chabu_Data** %2
%4 = call i32 @handleReads(%struct.Chabu_Data* %3)
%5 = load %struct.Chabu_Data*, %struct.Chabu_Data** %2
%6 = call i32 @handleWrites(%struct.Chabu_Data* %5)
ret void
}

LLVM IR (-O2):
%struct.Chabu_Data = type { i32 }
define void @Chabu_HandleNetwork(%struct.Chabu_Data* %0) {
%2 = tail call i32 @handleReads(%struct.Chabu_Data* %0)
%3 = tail call i32 @handleWrites(%struct.Chabu_Data* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_surfvars_endsvar();
void fgmvwrite_surfvars_endsvar_() { gmvwrite_surfvars_endsvar(); }


x86 assembly (clang, -O0):
<fgmvwrite_surfvars_endsvar_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gmvwrite_surfvars_endsvar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_surfvars_endsvar_>:
xor    %eax,%eax
jmp    1030 <gmvwrite_surfvars_endsvar@plt>

LLVM IR (-O0):
define void @fgmvwrite_surfvars_endsvar_() {
%1 = call i32 (...) @gmvwrite_surfvars_endsvar()
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_surfvars_endsvar_() {
%1 = tail call i32 (...) @gmvwrite_surfvars_endsvar()
ret void
}
/* Type definitions */
struct isal_zstream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ isal_deflate_body_base(struct isal_zstream *);
void isal_deflate_body(struct isal_zstream *stream) {
  isal_deflate_body_base(stream);
}


x86 assembly (clang, -O0):
<isal_deflate_body>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <isal_deflate_body_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isal_deflate_body>:
jmp    1030 <isal_deflate_body_base@plt>

LLVM IR (-O0):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_body(%struct.isal_zstream* %0) {
%2 = alloca %struct.isal_zstream*
store %struct.isal_zstream* %0, %struct.isal_zstream** %2
%3 = load %struct.isal_zstream*, %struct.isal_zstream** %2
%4 = call i32 @isal_deflate_body_base(%struct.isal_zstream* %3)
ret void
}

LLVM IR (-O2):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_body(%struct.isal_zstream* %0) {
%2 = tail call i32 @isal_deflate_body_base(%struct.isal_zstream* %0)
ret void
}
void ThreadClearInterrupt() {}


x86 assembly (clang, -O0):
<ThreadClearInterrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ThreadClearInterrupt>:
ret

LLVM IR (-O0):
define void @ThreadClearInterrupt() {
ret void
}

LLVM IR (-O2):
define void @ThreadClearInterrupt() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int standard_diagonal_homotopy(int a, int b) {
  int fail;
  double *c;
  fail = _ada_use_c2phc(165, &a, &b, c);
  return fail;
}


x86 assembly (clang, -O0):
<standard_diagonal_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x18(%rbp),%rcx
mov    $0xa5,%edi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<standard_diagonal_homotopy>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
mov    $0xa5,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @standard_diagonal_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load double*, double** %6
%8 = call i32 @_ada_use_c2phc(i32 165, i32* %3, i32* %4, double* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @standard_diagonal_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @_ada_use_c2phc(i32 165, i32* %3, i32* %4, double* undef)
ret i32 %5
}
/* Type definitions */
typedef size_t uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void SetPaletteBG(uint8_t entry, uint16_t colour) {
  ((volatile uint16_t *)(0x5000000))[entry] = colour;
}


x86 assembly (clang, -O0):
<SetPaletteBG>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rcx
mov    $0x5000000,%eax
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetPaletteBG>:
mov    %esi,0x5000000(,%rdi,4)
ret

LLVM IR (-O0):
define void @SetPaletteBG(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i64, i64* %3
%7 = getelementptr inbounds i32, i32* inttoptr (i64 83886080 to i32*), i64 %6
store volatile i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @SetPaletteBG(i64 %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* inttoptr (i64 83886080 to i32*), i64 %0
store volatile i32 %1, i32* %3
ret void
}
void _native_LED_RED_ON(void) {}


x86 assembly (clang, -O0):
<_native_LED_RED_ON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_native_LED_RED_ON>:
ret

LLVM IR (-O0):
define void @_native_LED_RED_ON() {
ret void
}

LLVM IR (-O2):
define void @_native_LED_RED_ON() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
char *asctime(struct tm *);
struct tm *localtime(int /*<<< orphan*/ *);
int strlen(char *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
char *logtime() {
  struct tm *thetime;
  time_t utime;
  char *string;
  utime = time(NULL);
  thetime = localtime(&utime);
  string = asctime(thetime);
  string[strlen(string) - 1] = 0;
  return string;
}


x86 assembly (clang, -O0):
<logtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1060 <time@plt>
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <asctime@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logtime>:
push   %rbx
sub    $0x10,%rsp
xor    %edi,%edi
call   1060 <time@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1030 <localtime@plt>
mov    %rax,%rdi
call   1050 <asctime@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i8* @logtime() {
%1 = alloca %struct.tm*
%2 = alloca i32
%3 = alloca i8*
%4 = call i32 @time(i32* null)
store i32 %4, i32* %2
%5 = call %struct.tm* @localtime(i32* %2)
store %struct.tm* %5, %struct.tm** %1
%6 = load %struct.tm*, %struct.tm** %1
%7 = call i8* @asctime(%struct.tm* %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %3
%10 = call i32 @strlen(i8* %9)
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %8, i64 %12
store i8 0, i8* %13
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i8* @logtime() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
%5 = call i8* @asctime(%struct.tm* %4)
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, -1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
store i8 0, i8* %9
ret i8* %5
}
void task_testcancel(void) {}


x86 assembly (clang, -O0):
<task_testcancel>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_testcancel>:
ret

LLVM IR (-O0):
define void @task_testcancel() {
ret void
}

LLVM IR (-O2):
define void @task_testcancel() {
ret void
}
/* Variables and functions */
int inportb(int);
int getDebugChar(void) {
  while (!(inportb(0x3f8 + 5) & 0x01))
    ;
  return inportb(0x3f8);
}


x86 assembly (clang, -O0):
<getDebugChar>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <getDebugChar+0x9>
mov    $0x3fd,%edi
call   1030 <inportb@plt>
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    113b <getDebugChar+0x2b>
jmp    1140 <getDebugChar+0x30>
jmp    1119 <getDebugChar+0x9>
mov    $0x3f8,%edi
call   1030 <inportb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getDebugChar>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x3fd,%edi
call   1030 <inportb@plt>
test   $0x1,%al
je     1120 <getDebugChar+0x10>
mov    $0x3f8,%edi
pop    %rax
jmp    1030 <inportb@plt>

LLVM IR (-O0):
define i32 @getDebugChar() {
br label %1
1: ; preds = %6, %0
%2 = call i32 @inportb(i32 1021)
%3 = and i32 %2, 1
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
br i1 %5, label %6, label %7
6: ; preds = %1
br label %1
7: ; preds = %1
%8 = call i32 @inportb(i32 1016)
ret i32 %8
}

LLVM IR (-O2):
define i32 @getDebugChar() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @inportb(i32 1021)
%3 = and i32 %2, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = tail call i32 @inportb(i32 1016)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void slog(char *message) { fprintf(stdout, message); }


x86 assembly (clang, -O0):
<slog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slog>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @slog(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @slog(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
ret void
}
void ten(int *x) { (*x) = 0; }


x86 assembly (clang, -O0):
<ten>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ten>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @ten(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 0, i32* %3
ret void
}

LLVM IR (-O2):
define void @ten(i32* nocapture writeonly %0) {
store i32 0, i32* %0
ret void
}
/* Variables and functions */
int fb_hMakeColor(int, unsigned int, unsigned int, unsigned int, unsigned int);
unsigned int fb_hFixColor(int bpp, unsigned int color) {
  return fb_hMakeColor(bpp, color, (color >> 16) & 0xFF, (color >> 8) & 0xFF,
                       color & 0xFF) &
         ((int)((1LL << ((bpp) << 3)) - 1));
}


x86 assembly (clang, -O0):
<fb_hFixColor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
shr    $0x10,%edx
and    $0xff,%edx
mov    -0x8(%rbp),%ecx
shr    $0x8,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%r8d
and    $0xff,%r8d
call   1030 <fb_hMakeColor@plt>
mov    -0x4(%rbp),%ecx
shl    $0x3,%ecx
mov    %ecx,%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
sub    $0x1,%rcx
and    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_hFixColor>:
push   %rbx
mov    %esi,%eax
mov    %edi,%ebx
mov    %esi,%ecx
shr    $0x10,%ecx
movzbl %cl,%edx
movzbl %ah,%ecx
movzbl %al,%r8d
call   1030 <fb_hMakeColor@plt>
shl    $0x3,%ebx
mov    $0xffffffffffffffff,%rdx
mov    %ebx,%ecx
shl    %cl,%rdx
not    %edx
and    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fb_hFixColor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = lshr i32 %7, 16
%9 = and i32 %8, 255
%10 = load i32, i32* %4
%11 = lshr i32 %10, 8
%12 = and i32 %11, 255
%13 = load i32, i32* %4
%14 = and i32 %13, 255
%15 = call i32 @fb_hMakeColor(i32 %5, i32 %6, i32 %9, i32 %12, i32 %14)
%16 = load i32, i32* %3
%17 = shl i32 %16, 3
%18 = zext i32 %17 to i64
%19 = shl i64 1, %18
%20 = sub nsw i64 %19, 1
%21 = trunc i64 %20 to i32
%22 = and i32 %15, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @fb_hFixColor(i32 %0, i32 %1) {
%3 = lshr i32 %1, 16
%4 = and i32 %3, 255
%5 = lshr i32 %1, 8
%6 = and i32 %5, 255
%7 = and i32 %1, 255
%8 = tail call i32 @fb_hMakeColor(i32 %0, i32 %1, i32 %4, i32 %6, i32 %7)
%9 = shl i32 %0, 3
%10 = zext i32 %9 to i64
%11 = shl nsw i64 -1, %10
%12 = trunc i64 %11 to i32
%13 = xor i32 %12, -1
%14 = and i32 %8, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("undefined\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"undefined\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [10 x i8] c"undefined\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int Operand_ar8_decode(unsigned int *valp __attribute__((__unused__))) {
  return 0;
}


x86 assembly (clang, -O0):
<Operand_ar8_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_ar8_decode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_ar8_decode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_ar8_decode(i32* nocapture readnone %0) {
ret i32 0
}
cpu_opt(indic) {
  switch (indic) {
  case 'i':
    return 1;
  case 'f':
    return 2;
  case 'm':
    return 4;
  case 'c':
    return 8;
  default:
    serror("illegal cpu option %c", indic);
    return 0;
  }
}


x86 assembly (clang, -O0):
<cpu_opt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff9d,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0xa,%eax
ja     1174 <cpu_opt+0x64>
mov    -0x10(%rbp),%rax
lea    0xec5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    118c <cpu_opt+0x7c>
movl   $0x2,-0x4(%rbp)
jmp    118c <cpu_opt+0x7c>
movl   $0x4,-0x4(%rbp)
jmp    118c <cpu_opt+0x7c>
movl   $0x8,-0x4(%rbp)
jmp    118c <cpu_opt+0x7c>
mov    -0x8(%rbp),%esi
lea    0xeae(%rip),%rdi
mov    $0x0,%al
call   1030 <serror@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_opt>:
push   %rbx
mov    %edi,%esi
lea    -0x63(%rsi),%eax
cmp    $0xa,%eax
ja     1137 <cpu_opt+0x27>
mov    $0x1,%ebx
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x8,%ebx
jmp    1155 <cpu_opt+0x45>
lea    0xeee(%rip),%rdi
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <serror@plt>
jmp    1155 <cpu_opt+0x45>
mov    $0x2,%ebx
jmp    1155 <cpu_opt+0x45>
mov    $0x4,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"illegal cpu option %c\00"
define i32 @cpu_opt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 105, label %5
i32 102, label %6
i32 109, label %7
i32 99, label %8
]
5: ; preds = %1
store i32 1, i32* %2
br label %12
6: ; preds = %1
store i32 2, i32* %2
br label %12
7: ; preds = %1
store i32 4, i32* %2
br label %12
8: ; preds = %1
store i32 8, i32* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* %3
%11 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @serror to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %10)
store i32 0, i32* %2
br label %12
12: ; preds = %9, %8, %7, %6, %5
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [22 x i8] c"illegal cpu option %c\00"
define i32 @cpu_opt(i32 %0) {
switch i32 %0, label %5 [
i32 105, label %7
i32 102, label %2
i32 109, label %3
i32 99, label %4
]
2: ; preds = %1
br label %7
3: ; preds = %1
br label %7
4: ; preds = %1
br label %7
5: ; preds = %1
%6 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @serror to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %7
7: ; preds = %1, %5, %4, %3, %2
%8 = phi i32 [ 0, %5 ], [ 8, %4 ], [ 4, %3 ], [ 2, %2 ], [ 1, %1 ]
ret i32 %8
}
void resetStr(char *str) {
  int i = 0;
  for (i = 0; i < 15; i++) {
    str[i] = '\0';
  }
}


x86 assembly (clang, -O0):
<resetStr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xf,-0xc(%rbp)
jge    113a <resetStr+0x3a>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <resetStr+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<resetStr>:
movq   $0x0,0x7(%rdi)
movq   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @resetStr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 15
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8 0, i8* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @resetStr(i8* nocapture writeonly %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ orgfx_wait(int);
void orgfx_set_alpha(unsigned int alpha) {
  orgfx_wait(1);
  *((volatile unsigned int *)((0xB8000000 + 0x08))) = alpha;
}


x86 assembly (clang, -O0):
<orgfx_set_alpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <orgfx_wait@plt>
mov    -0x4(%rbp),%ecx
mov    $0xb8000008,%eax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<orgfx_set_alpha>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
call   1030 <orgfx_wait@plt>
mov    $0xb8000008,%eax
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @orgfx_set_alpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @orgfx_wait(i32 1)
%4 = load i32, i32* %2
store volatile i32 %4, i32* inttoptr (i64 3087007752 to i32*)
ret void
}

LLVM IR (-O2):
define void @orgfx_set_alpha(i32 %0) {
%2 = tail call i32 @orgfx_wait(i32 1)
store volatile i32 %0, i32* inttoptr (i64 3087007752 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printk(char *);
int *dlclose(void *h) {
  printk("Write dlclose()\n");
  return 0;
}


x86 assembly (clang, -O0):
<dlclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printk@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlclose>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printk@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Write dlclose()\0A\00"
define i32* @dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printk(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32* null
}

LLVM IR (-O2):
@.str = [17 x i8] c"Write dlclose()\0A\00"
define noalias i32* @dlclose(i8* nocapture readnone %0) {
%2 = tail call i32 @printk(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32* null
}
/* Variables and functions */
int /*<<< orphan*/ osw_abort();
int /*<<< orphan*/ printf(char *, char const *);
void barf(const char *msg) {
  printf("barf: %s\n", msg);
  osw_abort();
}


x86 assembly (clang, -O0):
<barf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <osw_abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<barf>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <osw_abort@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"barf: %s\0A\00"
define void @barf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (...) @osw_abort()
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"barf: %s\0A\00"
define void @barf(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 (...) @osw_abort()
ret void
}
/* Variables and functions */
int node_data_unlock(int const);
int tree_deref(const int id) { return node_data_unlock(id); }


x86 assembly (clang, -O0):
<tree_deref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <node_data_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tree_deref>:
jmp    1030 <node_data_unlock@plt>

LLVM IR (-O0):
define i32 @tree_deref(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @node_data_unlock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @tree_deref(i32 %0) {
%2 = tail call i32 @node_data_unlock(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void use() {
  fprintf(stderr, "\nThis program must not be used from a shell or script\n");
  fprintf(stderr, "It's called only at compile time\n\n");
}


x86 assembly (clang, -O0):
<use>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xefe(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<use>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf08(%rip),%rsi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [55 x i8] c"\0AThis program must not be used from a shell or script\0A\00"
@.str.1 = [35 x i8] c"It's called only at compile time\0A\0A\00"
define void @use() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [55 x i8] c"\0AThis program must not be used from a shell or script\0A\00"
@.str.1 = [35 x i8] c"It's called only at compile time\0A\0A\00"
define void @use() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_setr_pi32(int, int);
__m64 test_mm_setr_pi32(int a, int b) { return _mm_setr_pi32(a, b); }


x86 assembly (clang, -O0):
<test_mm_setr_pi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_setr_pi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_setr_pi32>:
jmp    1030 <_mm_setr_pi32@plt>

LLVM IR (-O0):
define i32 @test_mm_setr_pi32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_setr_pi32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_setr_pi32(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_setr_pi32(i32 %0, i32 %1)
ret i32 %3
}
int bitmap_test(void *p, unsigned long long b) {
  unsigned char *ptr = p;
  return (ptr[b / 8] >> (b & 7)) & 1;
}


x86 assembly (clang, -O0):
<bitmap_test>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x3,%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x10(%rbp),%rcx
and    $0x7,%rcx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_test>:
mov    %rsi,%rcx
mov    %rsi,%rax
shr    $0x3,%rax
movzbl (%rdi,%rax,1),%eax
and    $0x7,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bitmap_test(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = load i64, i64* %4
%9 = udiv i64 %8, 8
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i64, i64* %4
%14 = and i64 %13, 7
%15 = trunc i64 %14 to i32
%16 = ashr i32 %12, %15
%17 = and i32 %16, 1
ret i32 %17
}

LLVM IR (-O2):
define i32 @bitmap_test(i8* nocapture %0, i64 %1) {
%3 = lshr i64 %1, 3
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = trunc i64 %1 to i32
%8 = and i32 %7, 7
%9 = lshr i32 %6, %8
%10 = and i32 %9, 1
ret i32 %10
}
void count() {}


x86 assembly (clang, -O0):
<count>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count>:
ret

LLVM IR (-O0):
define void @count() {
ret void
}

LLVM IR (-O2):
define void @count() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xeb() {
  Assert_real((islower(235) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1180, ("islower should be 0 for 0xeb"));
}


x86 assembly (clang, -O0):
<t_islower_0xeb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xeb,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x49c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xeb>:
push   %rax
mov    $0xeb,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x49c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xeb\00"
define void @t_islower_0xeb() {
%1 = call i64 @islower(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xeb\00"
define void @t_islower_0xeb() {
%1 = tail call i64 @islower(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printPrivate(char *);
void cannotBeUnlocked(void) { printPrivate("That cannot be unlocked.\n"); }


x86 assembly (clang, -O0):
<cannotBeUnlocked>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printPrivate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cannotBeUnlocked>:
lea    0xee9(%rip),%rdi
jmp    1030 <printPrivate@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"That cannot be unlocked.\0A\00"
define void @cannotBeUnlocked() {
%1 = call i32 @printPrivate(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"That cannot be unlocked.\0A\00"
define void @cannotBeUnlocked() {
%1 = tail call i32 @printPrivate(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}
char *file_without_drive_letter(char *zIn) { return zIn; }


x86 assembly (clang, -O0):
<file_without_drive_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_without_drive_letter>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @file_without_drive_letter(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @file_without_drive_letter(i8* readnone returned %0) {
ret i8* %0
}