xunge/DecIR huggingface dataset:
/* Variables and functions */
int check_verbose();
int dbg_isverbose(void) { return (check_verbose()); }


x86 assembly (clang, -O0):
<dbg_isverbose>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <check_verbose@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_isverbose>:
xor    %eax,%eax
jmp    1030 <check_verbose@plt>

LLVM IR (-O0):
define i32 @dbg_isverbose() {
%1 = call i32 (...) @check_verbose()
ret i32 %1
}

LLVM IR (-O2):
define i32 @dbg_isverbose() {
%1 = tail call i32 (...) @check_verbose()
ret i32 %1
}
int FindDefault(Device)
char *Device;
{
  int status;
  int DevNumber;
  status = ((-65 - 1) & (~0x10000));
  return (status);
}


x86 assembly (clang, -O0):
<FindDefault>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0xfffeffbe,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FindDefault>:
mov    $0xfffeffbe,%eax
ret

LLVM IR (-O0):
define i32 @FindDefault(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 -65602, i32* %3
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @FindDefault(i8* nocapture readnone %0) {
ret i32 -65602
}
int multi_line_if_conditional(int a, int b, int c) {
  if (a && b && c)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<multi_line_if_conditional>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1137 <multi_line_if_conditional+0x37>
cmpl   $0x0,-0xc(%rbp)
je     1137 <multi_line_if_conditional+0x37>
cmpl   $0x0,-0x10(%rbp)
je     1137 <multi_line_if_conditional+0x37>
movl   $0x0,-0x4(%rbp)
jmp    113e <multi_line_if_conditional+0x3e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multi_line_if_conditional>:
test   %edi,%edi
sete   %al
test   %esi,%esi
sete   %cl
or     %al,%cl
test   %edx,%edx
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @multi_line_if_conditional(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, i32* %7
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 0, i32* %4
br label %18
17: ; preds = %13, %10, %3
store i32 1, i32* %4
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @multi_line_if_conditional(i32 %0, i32 %1, i32 %2) {
%4 = icmp ne i32 %0, 0
%5 = icmp ne i32 %1, 0
%6 = and i1 %4, %5
%7 = icmp ne i32 %2, 0
%8 = and i1 %6, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *, double *);
int main() {
  double a, b;
  double media;
  scanf("%lf %lf", &a, &b);
  media = (a * 3.5 + b * 7.5) / (3.5 + 7.5);
  printf("MEDIA = %.5f\n", media);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xee2(%rip),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
movsd  0xec0(%rip),%xmm1
mulsd  -0x18(%rbp),%xmm1
movsd  0xeab(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe93(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xeed(%rip),%rdi
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1040 <scanf@plt>
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
mulsd  0xeb2(%rip),%xmm1
mulsd  0xeb2(%rip),%xmm0
addsd  %xmm1,%xmm0
divsd  0xeae(%rip),%xmm0
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%lf %lf\00"
@.str.1 = [14 x i8] c"MEDIA = %.5f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca double
store i32 0, i32* %1
%5 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double* %2, double* %3)
%6 = load double, double* %2
%7 = load double, double* %3
%8 = fmul double %7, 7.500000e+00
%9 = call double @llvm.fmuladd.f64(double %6, double 3.500000e+00, double %8)
%10 = fdiv double %9, 1.100000e+01
store double %10, double* %4
%11 = load double, double* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), double %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%lf %lf\00"
@.str.1 = [14 x i8] c"MEDIA = %.5f\0A\00"
define i32 @main() {
%1 = alloca double
%2 = alloca double
%3 = bitcast double* %1 to i8*
%4 = bitcast double* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double* %1, double* %2)
%6 = load double, double* %1
%7 = load double, double* %2
%8 = fmul double %7, 7.500000e+00
%9 = call double @llvm.fmuladd.f64(double %6, double 3.500000e+00, double %8)
%10 = fdiv double %9, 1.100000e+01
%11 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), double %10)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ int_fast16_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_EQUALS_int_fast16_t(int_fast16_t const k1,
                                           int_fast16_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_EQUALS_int_fast16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_EQUALS_int_fast16_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_EQUALS_int_fast16_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_EQUALS_int_fast16_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int video_get_type();
int video_is_ega_vga(void) { return (video_get_type() == 2); }


x86 assembly (clang, -O0):
<video_is_ega_vga>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <video_get_type@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<video_is_ega_vga>:
push   %rax
xor    %eax,%eax
call   1030 <video_get_type@plt>
xor    %ecx,%ecx
cmp    $0x2,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @video_is_ega_vga() {
%1 = call i32 (...) @video_get_type()
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @video_is_ega_vga() {
%1 = tail call i32 (...) @video_get_type()
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
scalar_t__ is_prime(long);
int /*<<< orphan*/ printf(char *, long);
int main() {
  long sum = 17, i;
  for (i = 11; i < 2e6; i += 2)
    if (is_prime(i))
      sum += i;
  printf("%ld\n", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x11,-0x10(%rbp)
movq   $0xb,-0x18(%rbp)
cvtsi2sdq -0x18(%rbp),%xmm1
movsd  0xeb3(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    118c <main+0x6c>
mov    -0x18(%rbp),%rdi
call   1040 <is_prime@plt>
cmp    $0x0,%rax
je     1176 <main+0x56>
mov    -0x18(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    117b <main+0x5b>
mov    -0x18(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x18(%rbp)
jmp    113f <main+0x1f>
mov    -0x10(%rbp),%rsi
lea    0xe71(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x11,%r14d
mov    $0x9,%ebx
nop
add    $0x2,%rbx
mov    %rbx,%rdi
call   1040 <is_prime@plt>
test   %rax,%rax
cmovne %rbx,%rax
add    %rax,%r14
cmp    $0x1e847e,%rbx
jb     1130 <main+0x10>
lea    0xeaa(%rip),%rdi
mov    %r14,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store i64 17, i64* %2
store i64 11, i64* %3
br label %4
4: ; preds = %17, %0
%5 = load i64, i64* %3
%6 = sitofp i64 %5 to double
%7 = fcmp olt double %6, 2.000000e+06
br i1 %7, label %8, label %20
8: ; preds = %4
%9 = load i64, i64* %3
%10 = call i64 @is_prime(i64 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = load i64, i64* %3
%14 = load i64, i64* %2
%15 = add nsw i64 %14, %13
store i64 %15, i64* %2
br label %16
16: ; preds = %12, %8
br label %17
17: ; preds = %16
%18 = load i64, i64* %3
%19 = add nsw i64 %18, 2
store i64 %19, i64* %3
br label %4
20: ; preds = %4
%21 = load i64, i64* %2
%22 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %21)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i64 [ 11, %0 ], [ %8, %1 ]
%3 = phi i64 [ 17, %0 ], [ %7, %1 ]
%4 = tail call i64 @is_prime(i64 %2)
%5 = icmp eq i64 %4, 0
%6 = select i1 %5, i64 0, i64 %2
%7 = add nuw nsw i64 %6, %3
%8 = add nuw nsw i64 %2, 2
%9 = icmp ult i64 %2, 1999998
br i1 %9, label %1, label %10
10: ; preds = %1
%11 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %7)
ret i32 0
}
/* Variables and functions */
int STC31xx_ReadByte8(int);
int STC31xx_WriteByte8(int, int);
int STC31xx_AlarmStop(void) {
  int res;
  res = STC31xx_ReadByte8(0x00);
  res = STC31xx_WriteByte8(0x00, (res & ~0x08));
  if (res != 0)
    return (res);
  return (0);
}


x86 assembly (clang, -O0):
<STC31xx_AlarmStop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <STC31xx_ReadByte8@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
and    $0xfffffff7,%esi
xor    %edi,%edi
call   1040 <STC31xx_WriteByte8@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1157 <STC31xx_AlarmStop+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115e <STC31xx_AlarmStop+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STC31xx_AlarmStop>:
push   %rax
xor    %edi,%edi
call   1030 <STC31xx_ReadByte8@plt>
and    $0xfffffff7,%eax
xor    %edi,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <STC31xx_WriteByte8@plt>

LLVM IR (-O0):
define i32 @STC31xx_AlarmStop() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @STC31xx_ReadByte8(i32 0)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, -9
%6 = call i32 @STC31xx_WriteByte8(i32 0, i32 %5)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = load i32, i32* %2
store i32 %10, i32* %1
br label %12
11: ; preds = %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @STC31xx_AlarmStop() {
%1 = tail call i32 @STC31xx_ReadByte8(i32 0)
%2 = and i32 %1, -9
%3 = tail call i32 @STC31xx_WriteByte8(i32 0, i32 %2)
ret i32 %3
}
int quest_search_mobid_sub(const void *a, const void *b) {
  int key = *(int *)a;
  int value = *(int *)b;
  return (key > value) ? 1 : (key < value) ? -1 : 0;
}


x86 assembly (clang, -O0):
<quest_search_mobid_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jle    1137 <quest_search_mobid_sub+0x37>
mov    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    114c <quest_search_mobid_sub+0x4c>
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quest_search_mobid_sub>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setl   %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @quest_search_mobid_sub(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = icmp slt i32 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @quest_search_mobid_sub(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp slt i32 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
int alpha(void) { return 20; }


x86 assembly (clang, -O0):
<alpha>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alpha>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @alpha() {
ret i32 20
}

LLVM IR (-O2):
define i32 @alpha() {
ret i32 20
}
/* Type definitions */
struct perf_event_attr {
  int context_switch;
};

/* Variables and functions */
int /*<<< orphan*/ SYS_perf_event_open;
int /*<<< orphan*/ syscall(int /*<<< orphan*/, struct perf_event_attr *,
                           int /*<<< orphan*/, int, int, int /*<<< orphan*/);
int main(void) {
  struct perf_event_attr attr = {
      .context_switch = 1,
  };
  syscall(SYS_perf_event_open, &attr, 0, -1, -1, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
xor    %r9d,%r9d
mov    $0xffffffff,%r8d
mov    %r9d,%edx
mov    %r8d,%ecx
call   1030 <syscall@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x1,(%rsp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
xor    %edx,%edx
mov    $0xffffffff,%ecx
mov    $0xffffffff,%r8d
xor    %r9d,%r9d
call   1030 <syscall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__const.main.attr = %struct.perf_event_attr { i32 1 }
@SYS_perf_event_open = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.perf_event_attr
store i32 0, i32* %1
%3 = bitcast %struct.perf_event_attr* %2 to i8*
%4 = load i32, i32* @SYS_perf_event_open
%5 = call i32 @syscall(i32 %4, %struct.perf_event_attr* %2, i32 0, i32 -1, i32 -1, i32 0)
ret i32 0
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@SYS_perf_event_open = global i32 0
define i32 @main() {
%1 = alloca %struct.perf_event_attr
%2 = bitcast %struct.perf_event_attr* %1 to i8*
%3 = getelementptr inbounds %struct.perf_event_attr, %struct.perf_event_attr* %1, i64 0, i32 0
store i32 1, i32* %3
%4 = load i32, i32* @SYS_perf_event_open
%5 = call i32 @syscall(i32 %4, %struct.perf_event_attr* %1, i32 0, i32 -1, i32 -1, i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *stdin;
FILE *c_stdin(void) { return stdin; }


x86 assembly (clang, -O0):
<c_stdin>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_stdin>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@stdin = global i32* null
define i32* @c_stdin() {
%1 = load i32*, i32** @stdin
ret i32* %1
}

LLVM IR (-O2):
@stdin = global i32* null
define i32* @c_stdin() {
%1 = load i32*, i32** @stdin
ret i32* %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void gslpolyfit(double *x, double *y0, int n, int d, double *c0) {
  printf("\n\n\a*** Support for Gnu Scientic Library required but not "
         "available! ***\n\n"
         "*** Contact author. ***\n\n");
  exit(10);
}


x86 assembly (clang, -O0):
<gslpolyfit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    $0xa,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<gslpolyfit>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xa,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [99 x i8] c"\0A\0A\07*** Support for Gnu Scientic Library required but not available! ***\0A\0A*** Contact author. ***\0A\0A\00"
define void @gslpolyfit(double* %0, double* %1, i32 %2, i32 %3, double* %4) {
%6 = alloca double*
%7 = alloca double*
%8 = alloca i32
%9 = alloca i32
%10 = alloca double*
store double* %0, double** %6
store double* %1, double** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store double* %4, double** %10
%11 = call i32 @printf(i8* getelementptr inbounds ([99 x i8], [99 x i8]* @.str, i64 0, i64 0))
%12 = call i32 @exit(i32 10)
unreachable
}

LLVM IR (-O2):
@str = [98 x i8] c"\0A\0A\07*** Support for Gnu Scientic Library required but not available! ***\0A\0A*** Contact author. ***\0A\00"
define void @gslpolyfit(double* nocapture readnone %0, double* nocapture readnone %1, i32 %2, i32 %3, double* nocapture readnone %4) {
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([98 x i8], [98 x i8]* @str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 10)
unreachable
}
int get_freq_correct(peak) { return 44100 / peak; }


x86 assembly (clang, -O0):
<get_freq_correct>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xac44,%eax
cltd
idivl  -0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_freq_correct>:
mov    $0xac44,%eax
xor    %edx,%edx
idiv   %edi
ret

LLVM IR (-O0):
define i32 @get_freq_correct(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 44100, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_freq_correct(i32 %0) {
%2 = sdiv i32 44100, %0
ret i32 %2
}
void gdk_visual_get_best() {}


x86 assembly (clang, -O0):
<gdk_visual_get_best>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_visual_get_best>:
ret

LLVM IR (-O0):
define void @gdk_visual_get_best() {
ret void
}

LLVM IR (-O2):
define void @gdk_visual_get_best() {
ret void
}
/* Variables and functions */
scalar_t__ lc_MONETARY();
int Ada_lc_MONETARY() {
  int jresult;
  int result;
  result = (int)lc_MONETARY();
  jresult = result;
  return jresult;
}


x86 assembly (clang, -O0):
<Ada_lc_MONETARY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <lc_MONETARY@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ada_lc_MONETARY>:
xor    %eax,%eax
jmp    1030 <lc_MONETARY@plt>

LLVM IR (-O0):
define i32 @Ada_lc_MONETARY() {
%1 = alloca i32
%2 = alloca i32
%3 = call i64 (...) @lc_MONETARY()
%4 = trunc i64 %3 to i32
store i32 %4, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %1
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @Ada_lc_MONETARY() {
%1 = tail call i64 (...) @lc_MONETARY()
%2 = trunc i64 %1 to i32
ret i32 %2
}
long __TBB_machine_fetchadd4(volatile void *ptr, long addend) {
  long result;
  __asm__ __volatile__("lock\nxadd %0,%1"
                       : "=r"(result), "=m"(*(volatile int *)ptr)
                       : "0"(addend), "m"(*(volatile int *)ptr)
                       : "memory");
  return result;
}


x86 assembly (clang, -O0):
<__TBB_machine_fetchadd4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
lock xadd %rax,(%rcx)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__TBB_machine_fetchadd4>:
mov    %rsi,%rax
lock xadd %rax,(%rdi)
ret

LLVM IR (-O0):
define i64 @__TBB_machine_fetchadd4(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
%8 = load i64, i64* %4
%9 = load i8*, i8** %3
%10 = bitcast i8* %9 to i32*
%11 = call i64 asm sideeffect "lock\0Axadd $0,$1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %7, i64 %8, i32* elementtype(i32) %10)
store i64 %11, i64* %5
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @__TBB_machine_fetchadd4(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i64 asm sideeffect "lock\0Axadd $0,$1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %3, i64 %1, i32* elementtype(i32) %3)
ret i64 %4
}
void gdk_visual_get_best_type() {}


x86 assembly (clang, -O0):
<gdk_visual_get_best_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_visual_get_best_type>:
ret

LLVM IR (-O0):
define void @gdk_visual_get_best_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_visual_get_best_type() {
ret void
}
/* Variables and functions */
void *memalign(size_t, size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
int /*<<< orphan*/ printf(char *, int);
void *wipememalign(size_t blocksize, size_t count) {
  void *mem = memalign(blocksize, count);
  if (mem != NULL) {
    memset(mem, 0, count);
  } else {
    printf("wipememalign() failed to allocate %d bytes\n", (int)count);
  }
  return mem;
}


x86 assembly (clang, -O0):
<wipememalign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <memalign@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1170 <wipememalign+0x40>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
jmp    1182 <wipememalign+0x52>
mov    -0x10(%rbp),%rax
mov    %eax,%esi
lea    0xe83(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wipememalign>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1050 <memalign@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1153 <wipememalign+0x23>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1040 <memset@plt>
jmp    1162 <wipememalign+0x32>
lea    0xea6(%rip),%rdi
mov    %r14d,%esi
call   1030 <printf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [44 x i8] c"wipememalign() failed to allocate %d bytes\0A\00"
define i8* @wipememalign(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @memalign(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = load i64, i64* %4
%14 = call i32 @memset(i8* %12, i32 0, i64 %13)
br label %19
15: ; preds = %2
%16 = load i64, i64* %4
%17 = trunc i64 %16 to i32
%18 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %17)
br label %19
19: ; preds = %15, %11
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
@.str = [44 x i8] c"wipememalign() failed to allocate %d bytes\0A\00"
define i8* @wipememalign(i64 %0, i64 %1) {
%3 = tail call i8* @memalign(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memset(i8* %3, i32 0, i64 %1)
br label %10
7: ; preds = %2
%8 = trunc i64 %1 to i32
%9 = tail call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %10
10: ; preds = %7, %5
ret i8* %3
}
/* Variables and functions */
scalar_t__ isnormal(float);
int __ocl_isnormal_float(float src) { return isnormal(src) ? 1 : 0; }


x86 assembly (clang, -O0):
<__ocl_isnormal_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isnormal@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_isnormal_float>:
push   %rax
call   1030 <isnormal@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__ocl_isnormal_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @isnormal(float %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
ret i32 %7
}

LLVM IR (-O2):
define i32 @__ocl_isnormal_float(float %0) {
%2 = tail call i64 @isnormal(float %0)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void foo_1_1_2_2_1_1_2_2_1() {}


x86 assembly (clang, -O0):
<foo_1_1_2_2_1_1_2_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_2_2_1_1_2_2_1>:
ret

LLVM IR (-O0):
define void @foo_1_1_2_2_1_1_2_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_2_2_1_1_2_2_1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ftor_reactor();
int /*<<< orphan*/ ftor_reactor_init();
int /*<<< orphan*/ ftor_start_server();
int /*<<< orphan*/ rsa_cleanup();
int /*<<< orphan*/ set_signals();
int main() {
  set_signals();
  ftor_reactor_init();
  ftor_start_server();
  ftor_reactor();
  rsa_cleanup();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <set_signals@plt>
mov    $0x0,%al
call   1030 <ftor_reactor_init@plt>
mov    $0x0,%al
call   1070 <ftor_start_server@plt>
mov    $0x0,%al
call   1050 <ftor_reactor@plt>
mov    $0x0,%al
call   1040 <rsa_cleanup@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <set_signals@plt>
xor    %eax,%eax
call   1030 <ftor_reactor_init@plt>
xor    %eax,%eax
call   1070 <ftor_start_server@plt>
xor    %eax,%eax
call   1050 <ftor_reactor@plt>
xor    %eax,%eax
call   1040 <rsa_cleanup@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @set_signals()
%3 = call i32 (...) @ftor_reactor_init()
%4 = call i32 (...) @ftor_start_server()
%5 = call i32 (...) @ftor_reactor()
%6 = call i32 (...) @rsa_cleanup()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @set_signals()
%2 = tail call i32 (...) @ftor_reactor_init()
%3 = tail call i32 (...) @ftor_start_server()
%4 = tail call i32 (...) @ftor_reactor()
%5 = tail call i32 (...) @rsa_cleanup()
ret i32 0
}
int tdefault_stopped_by_hw_breakpoint(struct target_ops *self) { return 0; }


x86 assembly (clang, -O0):
<tdefault_stopped_by_hw_breakpoint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_stopped_by_hw_breakpoint>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
define i32 @tdefault_stopped_by_hw_breakpoint(%struct.target_ops* %0) {
%2 = alloca %struct.target_ops*
store %struct.target_ops* %0, %struct.target_ops** %2
ret i32 0
}

LLVM IR (-O2):
%struct.target_ops = type opaque
define i32 @tdefault_stopped_by_hw_breakpoint(%struct.target_ops* nocapture readnone %0) {
ret i32 0
}
int isdigit(int c) { return !!((c >= '0') && (c <= '9')); }


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isdigit+0x20>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = xor i1 %9, true
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *, int, char const *);
int /*<<< orphan*/ stderr;
void __fail(const char *file, const char *func, int line, const char *msg) {
  fprintf(stderr, "Assertion failed at %s:%s:%d: %s\n", file, func, line, msg);
  exit(1);
}


x86 assembly (clang, -O0):
<__fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
lea    0xea9(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<__fail>:
push   %rax
mov    %rcx,%r9
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"Assertion failed at %s:%s:%d: %s\0A\00"
define void @__fail(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %5
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %10, i8* %11, i32 %12, i8* %13)
%15 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"Assertion failed at %s:%s:%d: %s\0A\00"
define void @__fail(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i32 %2, i8* %3)
%7 = tail call i32 @exit(i32 1)
unreachable
}
void _arguments_error_check(void) {}


x86 assembly (clang, -O0):
<_arguments_error_check>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_arguments_error_check>:
ret

LLVM IR (-O0):
define void @_arguments_error_check() {
ret void
}

LLVM IR (-O2):
define void @_arguments_error_check() {
ret void
}
void asm_cprint(char chr, char attr, int times, char disppage) {
  asm volatile("movb $0x09,%%ah ; int $0x10"
               : "+a"(chr)
               : "b"(attr + (disppage << 8)), "c"(times));
}


x86 assembly (clang, -O0):
<asm_cprint>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %cl,%al
mov    %sil,%cl
mov    %dil,%sil
mov    %sil,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %edx,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x9(%rbp),%al
movsbl -0xa(%rbp),%ebx
movsbl -0x11(%rbp),%ecx
shl    $0x8,%ecx
add    %ecx,%ebx
mov    -0x10(%rbp),%ecx
mov    $0x9,%ah
int    $0x10
mov    %al,-0x9(%rbp)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm_cprint>:
push   %rbx
mov    %edi,%eax
shl    $0x8,%ecx
lea    (%rcx,%rsi,1),%ebx
mov    %edx,%ecx
mov    $0x9,%ah
int    $0x10
pop    %rbx
ret

LLVM IR (-O0):
define void @asm_cprint(i8 signext %0, i8 signext %1, i32 %2, i8 signext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i32
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i32 %2, i32* %7
store i8 %3, i8* %8
%9 = load i8, i8* %5
%10 = load i8, i8* %6
%11 = sext i8 %10 to i32
%12 = load i8, i8* %8
%13 = sext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = add nsw i32 %11, %14
%16 = load i32, i32* %7
%17 = call i8 asm sideeffect "movb $$0x09,%ah ; int $$0x10", "={ax},{bx},{cx},0,~{dirflag},~{fpsr},~{flags}"(i32 %15, i32 %16, i8 %9)
store i8 %17, i8* %5
ret void
}

LLVM IR (-O2):
define void @asm_cprint(i8 signext %0, i8 signext %1, i32 %2, i8 signext %3) {
%5 = sext i8 %1 to i32
%6 = sext i8 %3 to i32
%7 = shl nsw i32 %6, 8
%8 = add nsw i32 %7, %5
%9 = tail call i8 asm sideeffect "movb $$0x09,%ah ; int $$0x10", "={ax},{bx},{cx},0,~{dirflag},~{fpsr},~{flags}"(i32 %8, i32 %2, i8 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint64_t;

/* Variables and functions */
void to_bytes(uint8_t *c, uint64_t v) {
  int shift = 32;
  for (int i = 0; i < 5; i++) {
    c[i] = (uint8_t)(v >> shift);
    shift += 8;
  }
}


x86 assembly (clang, -O0):
<to_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x20,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x5,-0x14(%rbp)
jge    1151 <to_bytes+0x51>
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
sar    %cl,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <to_bytes+0x19>
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_bytes>:
ret

LLVM IR (-O0):
define void @to_bytes(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
store i32 32, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 5
br i1 %9, label %10, label %24
10: ; preds = %7
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = ashr i32 %11, %12
%14 = sext i32 %13 to i64
%15 = load i64*, i64** %3
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i64, i64* %15, i64 %17
store i64 %14, i64* %18
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 8
store i32 %20, i32* %5
br label %21
21: ; preds = %10
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 1
store i32 %23, i32* %6
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @to_bytes(i64* nocapture writeonly %0, i32 %1) {
ret void
}
int isFullCQ(int *front, int *rear) {
  if ((*front == 0 && *rear == 5 - 1) || (*front == *rear + 1))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isFullCQ>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
jne    1126 <isFullCQ+0x26>
mov    -0x18(%rbp),%rax
cmpl   $0x4,(%rax)
je     113d <isFullCQ+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%ecx
add    $0x1,%ecx
cmp    %ecx,%eax
jne    1149 <isFullCQ+0x49>
movl   $0x1,-0x4(%rbp)
jmp    1150 <isFullCQ+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isFullCQ>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,%edx
xor    $0x4,%edx
or     %eax,%edx
sete   %dl
add    $0x1,%ecx
cmp    %ecx,%eax
sete   %al
or     %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @isFullCQ(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, 4
br i1 %12, label %20, label %13
13: ; preds = %9, %2
%14 = load i32*, i32** %4
%15 = load i32, i32* %14
%16 = load i32*, i32** %5
%17 = load i32, i32* %16
%18 = add nsw i32 %17, 1
%19 = icmp eq i32 %15, %18
br i1 %19, label %20, label %21
20: ; preds = %13, %9
store i32 1, i32* %3
br label %22
21: ; preds = %13
store i32 0, i32* %3
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @isFullCQ(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = icmp eq i32 %3, 0
%5 = load i32, i32* %1
%6 = icmp eq i32 %5, 4
%7 = select i1 %4, i1 %6, i1 false
%8 = add nsw i32 %5, 1
%9 = icmp eq i32 %3, %8
%10 = select i1 %7, i1 true, i1 %9
%11 = zext i1 %10 to i32
ret i32 %11
}
void RTDbgAsRelease(void) {}


x86 assembly (clang, -O0):
<RTDbgAsRelease>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgAsRelease>:
ret

LLVM IR (-O0):
define void @RTDbgAsRelease() {
ret void
}

LLVM IR (-O2):
define void @RTDbgAsRelease() {
ret void
}
unsigned xrop3_35_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~D;
  stk2 = T & stk3;
  stk1 = S | stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_35_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_35_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
shl    $0x8,%esi
or     %esi,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_35_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_35_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %4, %6
%8 = xor i32 %7, -1
ret i32 %8
}
void asm_b_r(unsigned long *f, unsigned long i) {
  asm("btrq  %1, %0 \n" : : "m"(*f), "r"(i));
}


x86 assembly (clang, -O0):
<asm_b_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
btr    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm_b_r>:
btr    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @asm_b_r(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64*, i64** %3
%6 = load i64, i64* %4
ret void
}

LLVM IR (-O2):
define void @asm_b_r(i64* %0, i64 %1) {
tail call void asm sideeffect "btrq $1, $0 \0A", "*m,r,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %0, i64 %1)
ret void
}
/* Type definitions */
struct si_sm_data {
  int dummy;
};

/* Variables and functions */
int read_status(struct si_sm_data *);
int kcs_detect(struct si_sm_data *kcs) {
  if (read_status(kcs) == 0xff)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<kcs_detect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <read_status@plt>
cmp    $0xff,%eax
jne    113c <kcs_detect+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    1143 <kcs_detect+0x33>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kcs_detect>:
push   %rax
call   1030 <read_status@plt>
xor    %ecx,%ecx
cmp    $0xff,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.si_sm_data = type { i32 }
define i32 @kcs_detect(%struct.si_sm_data* %0) {
%2 = alloca i32
%3 = alloca %struct.si_sm_data*
store %struct.si_sm_data* %0, %struct.si_sm_data** %3
%4 = load %struct.si_sm_data*, %struct.si_sm_data** %3
%5 = call i32 @read_status(%struct.si_sm_data* %4)
%6 = icmp eq i32 %5, 255
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
%struct.si_sm_data = type { i32 }
define i32 @kcs_detect(%struct.si_sm_data* %0) {
%2 = tail call i32 @read_status(%struct.si_sm_data* %0)
%3 = icmp eq i32 %2, 255
%4 = zext i1 %3 to i32
ret i32 %4
}
char *mswin_specific_winver() { return (""); }


x86 assembly (clang, -O0):
<mswin_specific_winver>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mswin_specific_winver>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @mswin_specific_winver() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @mswin_specific_winver() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int u_int;
typedef int u_char;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ die_file_eof(int /*<<< orphan*/ *);
int fread(int *, int, int, int /*<<< orphan*/ *);
u_int read_u16l(FILE *fp) {
  u_char b[2];
  if (fread(b, 2, 1, fp) != 1)
    die_file_eof(fp);
  return b[0] + (b[1] << 8);
}


x86 assembly (clang, -O0):
<read_u16l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x2,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
cmp    $0x1,%eax
je     1155 <read_u16l+0x35>
mov    -0x8(%rbp),%rdi
call   1040 <die_file_eof@plt>
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_u16l>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fread@plt>
cmp    $0x1,%eax
je     114c <read_u16l+0x2c>
mov    %rbx,%rdi
call   1040 <die_file_eof@plt>
mov    0xc(%rsp),%eax
shl    $0x8,%eax
add    0x8(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @read_u16l(i32* %0) {
%2 = alloca i32*
%3 = alloca [2 x i32]
store i32* %0, i32** %2
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
%5 = load i32*, i32** %2
%6 = call i32 @fread(i32* %4, i32 2, i32 1, i32* %5)
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32*, i32** %2
%10 = call i32 @die_file_eof(i32* %9)
br label %11
11: ; preds = %8, %1
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
%13 = load i32, i32* %12
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 1
%15 = load i32, i32* %14
%16 = shl i32 %15, 8
%17 = add nsw i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @read_u16l(i32* %0) {
%2 = alloca [2 x i32]
%3 = bitcast [2 x i32]* %2 to i8*
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%5 = call i32 @fread(i32* %4, i32 2, i32 1, i32* %0)
%6 = icmp eq i32 %5, 1
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @die_file_eof(i32* %0)
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %4
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
%12 = load i32, i32* %11
%13 = shl i32 %12, 8
%14 = add nsw i32 %13, %10
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ delayUsBusy(int);
int /*<<< orphan*/ onewire_read_bit(int);
void ds18b20_wait_convertion(int pin) {
  while (!onewire_read_bit(pin)) {
  }
  delayUsBusy(480);
}


x86 assembly (clang, -O0):
<ds18b20_wait_convertion>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <onewire_read_bit@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1148 <ds18b20_wait_convertion+0x28>
jmp    114d <ds18b20_wait_convertion+0x2d>
jmp    112b <ds18b20_wait_convertion+0xb>
mov    $0x1e0,%edi
call   1030 <delayUsBusy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds18b20_wait_convertion>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1040 <onewire_read_bit@plt>
test   %eax,%eax
je     1130 <ds18b20_wait_convertion+0x10>
mov    $0x1e0,%edi
pop    %rbx
jmp    1030 <delayUsBusy@plt>

LLVM IR (-O0):
define void @ds18b20_wait_convertion(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load i32, i32* %2
%5 = call i32 @onewire_read_bit(i32 %4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = call i32 @delayUsBusy(i32 480)
ret void
}

LLVM IR (-O2):
define void @ds18b20_wait_convertion(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @onewire_read_bit(i32 %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
%6 = tail call i32 @delayUsBusy(i32 480)
ret void
}
int f(int b) { return b + 5; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x5(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 5
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 5
ret i32 %2
}
/* Variables and functions */
int close(int);
int fild_Close(int fd) { return close(fd); }


x86 assembly (clang, -O0):
<fild_Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fild_Close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @fild_Close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fild_Close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}