xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("test main begin\n");
  int a = 1;
  int b = 0;
  int c = a / b;
  printf("test main end\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x10(%rbp)
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"test main begin\0A\00"
@.str.1 = [15 x i8] c"test main end\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %2
store i32 0, i32* %3
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = sdiv i32 %6, %7
store i32 %8, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"test main begin\00"
@str.2 = [14 x i8] c"test main end\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ getPT_sync();
int /*<<< orphan*/ putCMD(int /*<<< orphan*/);
int /*<<< orphan*/ putPT_BLK(char *, int);
int /*<<< orphan*/ putPT_flash();
int _dos_put_console(char c) {
  putCMD(0);
  getPT_sync();
  putPT_BLK(&c, 1);
  putPT_flash();
  return 0;
}


x86 assembly (clang, -O0):
<_dos_put_console>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %edi,%edi
call   1040 <putCMD@plt>
mov    $0x0,%al
call   1050 <getPT_sync@plt>
lea    -0x1(%rbp),%rdi
mov    $0x1,%esi
call   1030 <putPT_BLK@plt>
mov    $0x0,%al
call   1060 <putPT_flash@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dos_put_console>:
push   %rax
mov    %dil,0x7(%rsp)
xor    %edi,%edi
call   1040 <putCMD@plt>
xor    %eax,%eax
call   1050 <getPT_sync@plt>
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
call   1030 <putPT_BLK@plt>
xor    %eax,%eax
call   1060 <putPT_flash@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_dos_put_console(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @putCMD(i32 0)
%4 = call i32 (...) @getPT_sync()
%5 = call i32 @putPT_BLK(i8* %2, i32 1)
%6 = call i32 (...) @putPT_flash()
ret i32 0
}

LLVM IR (-O2):
define i32 @_dos_put_console(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = tail call i32 @putCMD(i32 0)
%4 = tail call i32 (...) @getPT_sync()
%5 = call i32 @putPT_BLK(i8* %2, i32 1)
%6 = call i32 (...) @putPT_flash()
ret i32 0
}
void buzzer_init(void) { (*(volatile unsigned long *)0xE02000A0) |= 1 << 0; }


x86 assembly (clang, -O0):
<buzzer_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe02000a0,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0xe02000a0,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<buzzer_init>:
mov    $0xe02000a0,%eax
orq    $0x1,(%rax)
ret

LLVM IR (-O0):
define void @buzzer_init() {
%1 = load volatile i64, i64* inttoptr (i64 3760193696 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 3760193696 to i64*)
ret void
}

LLVM IR (-O2):
define void @buzzer_init() {
%1 = load volatile i64, i64* inttoptr (i64 3760193696 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 3760193696 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Cffempty();
extern void ftadef_(void) {
  ;
  Cffempty();
  return;
}


x86 assembly (clang, -O0):
<ftadef_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Cffempty@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftadef_>:
xor    %eax,%eax
jmp    1030 <Cffempty@plt>

LLVM IR (-O0):
define void @ftadef_() {
%1 = call i32 (...) @Cffempty()
ret void
}

LLVM IR (-O2):
define void @ftadef_() {
%1 = tail call i32 (...) @Cffempty()
ret void
}
void z_errmsg(void) {}


x86 assembly (clang, -O0):
<z_errmsg>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<z_errmsg>:
ret

LLVM IR (-O0):
define void @z_errmsg() {
ret void
}

LLVM IR (-O2):
define void @z_errmsg() {
ret void
}
void gui_brightness_show(int percent, int timeout) {
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<gui_brightness_show>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
jmp    110f <gui_brightness_show+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_brightness_show>:
ret

LLVM IR (-O0):
define void @gui_brightness_show(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %2
br label %6
6: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @gui_brightness_show(i32 %0, i32 %1) {
ret void
}
void ARGBToRAWRow_Any_SSSE3() {}


x86 assembly (clang, -O0):
<ARGBToRAWRow_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToRAWRow_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @ARGBToRAWRow_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @ARGBToRAWRow_Any_SSSE3() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;

/* Variables and functions */
int /*<<< orphan*/ NID_sha256;
int jksengine_digests_init(int /*<<< orphan*/ *, int /*<<< orphan*/);
int jksengine_sha256_init(EVP_MD_CTX *ctx) {
  ;
  return (jksengine_digests_init(ctx, NID_sha256));
}


x86 assembly (clang, -O0):
<jksengine_sha256_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
call   1030 <jksengine_digests_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jksengine_sha256_init>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <jksengine_digests_init@plt>

LLVM IR (-O0):
@NID_sha256 = global i32 0
define i32 @jksengine_sha256_init(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* @NID_sha256
%5 = call i32 @jksengine_digests_init(i32* %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@NID_sha256 = global i32 0
define i32 @jksengine_sha256_init(i32* %0) {
%2 = load i32, i32* @NID_sha256
%3 = tail call i32 @jksengine_digests_init(i32* %0, i32 %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
__attribute__((weak)) uint32_t readTimer() { return 0; }


x86 assembly (clang, -O0):
<readTimer>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readTimer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define weak i32 @readTimer() {
ret i32 0
}

LLVM IR (-O2):
define weak i32 @readTimer() {
ret i32 0
}
/* Variables and functions */
void S_ClearSoundBuffer(void) {}


x86 assembly (clang, -O0):
<S_ClearSoundBuffer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<S_ClearSoundBuffer>:
ret

LLVM IR (-O0):
define void @S_ClearSoundBuffer() {
ret void
}

LLVM IR (-O2):
define void @S_ClearSoundBuffer() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(long);
void unix_hal_sleep_msec(int miliseconds) { usleep(1000L * miliseconds); }


x86 assembly (clang, -O0):
<unix_hal_sleep_msec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
imul   $0x3e8,%rax,%rdi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unix_hal_sleep_msec>:
movslq %edi,%rax
imul   $0x3e8,%rax,%rdi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @unix_hal_sleep_msec(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = mul nsw i64 1000, %4
%6 = call i32 @usleep(i64 %5)
ret void
}

LLVM IR (-O2):
define void @unix_hal_sleep_msec(i32 %0) {
%2 = sext i32 %0 to i64
%3 = mul nsw i64 %2, 1000
%4 = tail call i32 @usleep(i64 %3)
ret void
}
void ADC_escribeTxRAM() {
  *((volatile unsigned short *)(0x10000000 + 0x00B0)) = 0x00;
  *((volatile unsigned short *)(0x10000000 + 0x00B4)) = 0x9F9F;
  *((volatile unsigned short *)(0x10000000 + 0x00B4)) = 0x0000;
  *((volatile unsigned short *)(0x10000000 + 0x00B4)) = 0x0000;
}


x86 assembly (clang, -O0):
<ADC_escribeTxRAM>:
push   %rbp
mov    %rsp,%rbp
mov    $0x100000b0,%eax
movw   $0x0,(%rax)
mov    $0x100000b4,%eax
movw   $0x9f9f,(%rax)
mov    $0x100000b4,%eax
movw   $0x0,(%rax)
mov    $0x100000b4,%eax
movw   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_escribeTxRAM>:
movw   $0x0,0x100000b0
movw   $0x9f9f,0x100000b4
10 9f 9f
movw   $0x0,0x100000b4
movw   $0x0,0x100000b4
ret

LLVM IR (-O0):
define void @ADC_escribeTxRAM() {
store volatile i16 0, i16* inttoptr (i64 268435632 to i16*)
store volatile i16 -24673, i16* inttoptr (i64 268435636 to i16*)
store volatile i16 0, i16* inttoptr (i64 268435636 to i16*)
store volatile i16 0, i16* inttoptr (i64 268435636 to i16*)
ret void
}

LLVM IR (-O2):
define void @ADC_escribeTxRAM() {
store volatile i16 0, i16* inttoptr (i64 268435632 to i16*)
store volatile i16 -24673, i16* inttoptr (i64 268435636 to i16*)
store volatile i16 0, i16* inttoptr (i64 268435636 to i16*)
store volatile i16 0, i16* inttoptr (i64 268435636 to i16*)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ tod_to_timeval(unsigned long long, struct timespec *);
void stck_to_timespec(unsigned long long stck, struct timespec *ts) {
  tod_to_timeval(stck - 0x7d91048bca000000ULL, ts);
}


x86 assembly (clang, -O0):
<stck_to_timespec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movabs $0x7d91048bca000000,%rax
04 91 7d
sub    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <tod_to_timeval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stck_to_timespec>:
movabs $0x826efb7436000000,%rax
fb 6e 82
add    %rax,%rdi
jmp    1030 <tod_to_timeval@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @stck_to_timespec(i64 %0, %struct.timespec* %1) {
%3 = alloca i64
%4 = alloca %struct.timespec*
store i64 %0, i64* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i64, i64* %3
%6 = sub i64 %5, 9048018124800000000
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = call i32 @tod_to_timeval(i64 %6, %struct.timespec* %7)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @stck_to_timespec(i64 %0, %struct.timespec* %1) {
%3 = add i64 %0, -9048018124800000000
%4 = tail call i32 @tod_to_timeval(i64 %3, %struct.timespec* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *, int);
void lprintf_file_and_line(FILE *f, const char *file, int line) {
  fprintf(f, "%s(%d): ", file, line);
}


x86 assembly (clang, -O0):
<lprintf_file_and_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xecb(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lprintf_file_and_line>:
mov    %edx,%ecx
mov    %rsi,%rdx
lea    0xee4(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s(%d): \00"
define void @lprintf_file_and_line(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s(%d): \00"
define void @lprintf_file_and_line(i32* nocapture %0, i8* %1, i32 %2) {
%4 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int fesetenv(const fenv_t *envp) { return -1; }


x86 assembly (clang, -O0):
<fesetenv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fesetenv>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fesetenv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @fesetenv(i32* nocapture readnone %0) {
ret i32 -1
}
/* Type definitions */
struct page {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __free_page(struct page *);
void pte_free(struct page *pte) { __free_page(pte); }


x86 assembly (clang, -O0):
<pte_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__free_page@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pte_free>:
jmp    1030 <__free_page@plt>

LLVM IR (-O0):
%struct.page = type { i32 }
define void @pte_free(%struct.page* %0) {
%2 = alloca %struct.page*
store %struct.page* %0, %struct.page** %2
%3 = load %struct.page*, %struct.page** %2
%4 = call i32 @__free_page(%struct.page* %3)
ret void
}

LLVM IR (-O2):
%struct.page = type { i32 }
define void @pte_free(%struct.page* %0) {
%2 = tail call i32 @__free_page(%struct.page* %0)
ret void
}
int isoperator(char c) {
  if (c == '^' || c == '*' || c == '/' || c == '+' || c == '-') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isoperator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x5e,%eax
je     114b <isoperator+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2a,%eax
je     114b <isoperator+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2f,%eax
je     114b <isoperator+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     114b <isoperator+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
jne    1157 <isoperator+0x57>
movl   $0x1,-0x4(%rbp)
jmp    115e <isoperator+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoperator>:
add    $0xd6,%dil
cmp    $0x34,%dil
ja     1124 <isoperator+0x24>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x1000000000002b,%rdx
bt     %rcx,%rdx
jae    1124 <isoperator+0x24>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isoperator(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 94
br i1 %6, label %23, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 42
br i1 %10, label %23, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 47
br i1 %14, label %23, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 43
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 45
br i1 %22, label %23, label %24
23: ; preds = %19, %15, %11, %7, %1
store i32 1, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @isoperator(i8 signext %0) {
switch i8 %0, label %2 [
i8 94, label %3
i8 47, label %3
i8 45, label %3
i8 43, label %3
i8 42, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
void WitTim_lc898122(unsigned short UsWitTim) {
  unsigned long UlLopIdx, UlWitCyc;
  UlWitCyc = (unsigned long)((float)UsWitTim / 0.00004166F / (float)12);
  for (UlLopIdx = 0; UlLopIdx < UlWitCyc; UlLopIdx++) {
    ;
  }
}


x86 assembly (clang, -O0):
<WitTim_lc898122>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  0xee5(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xedd(%rip),%xmm1
divss  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttss2si %xmm1,%rax
mov    %rax,%rdx
sar    $0x3f,%rdx
movss  0xec6(%rip),%xmm1
subss  %xmm1,%xmm0
cvttss2si %xmm0,%rcx
and    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1181 <WitTim_lc898122+0x81>
jmp    1170 <WitTim_lc898122+0x70>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    115d <WitTim_lc898122+0x5d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WitTim_lc898122>:
ret

LLVM IR (-O0):
define void @WitTim_lc898122(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i64
%4 = alloca i64
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = uitofp i16 %5 to float
%7 = fdiv float %6, 0x3F05D782C0000000
%8 = fdiv float %7, 1.200000e+01
%9 = fptoui float %8 to i64
store i64 %9, i64* %4
store i64 0, i64* %3
br label %10
10: ; preds = %15, %1
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %18
14: ; preds = %10
br label %15
15: ; preds = %14
%16 = load i64, i64* %3
%17 = add i64 %16, 1
store i64 %17, i64* %3
br label %10
18: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @WitTim_lc898122(i16 zeroext %0) {
ret void
}
/* Variables and functions */
bool nrf53_errata_71(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_71>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_71>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_71() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_71() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ system(char *);
int rp_app_exit(void) {
  fprintf(stderr, "Stopping VNA server.\n");
  system("/opt/redpitaya/www/apps/vna/stop.sh");
  return 0;
}


x86 assembly (clang, -O0):
<rp_app_exit>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
lea    0xed6(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rp_app_exit>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
lea    0xed9(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"Stopping VNA server.\0A\00"
@.str.1 = [36 x i8] c"/opt/redpitaya/www/apps/vna/stop.sh\00"
define i32 @rp_app_exit() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"Stopping VNA server.\0A\00"
@.str.1 = [36 x i8] c"/opt/redpitaya/www/apps/vna/stop.sh\00"
define i32 @rp_app_exit() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @system(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int MinNumb(int a, int b) {
  int min1;
  if (a > b)
    min1 = b;
  if (a < b)
    min1 = a;
  if (a == b)
    min1 = a;
  return min1;
}


x86 assembly (clang, -O0):
<MinNumb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    111c <MinNumb+0x1c>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    112e <MinNumb+0x2e>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1140 <MinNumb+0x40>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MinNumb>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @MinNumb(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %5
br label %11
11: ; preds = %9, %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %3
store i32 %16, i32* %5
br label %17
17: ; preds = %15, %11
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = load i32, i32* %3
store i32 %22, i32* %5
br label %23
23: ; preds = %21, %17
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @MinNumb(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
int f(int n, int x, int stride) {
  int a, x1, x2, x3;
  a = x * stride;
  if (n > 64) {
    x1 = x + 3;
    a += x1 * stride;
    x2 = x1 + 3;
    a += x2 * stride;
    x3 = x2 + 3;
    a += x3 * stride;
  }
  return a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x40,-0x4(%rbp)
jle    1163 <f+0x63>
mov    -0x8(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x18(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    (%rsi,%rsi,2),%ecx
add    $0x12,%ecx
imul   %edx,%ecx
imul   %esi,%edx
xor    %eax,%eax
cmp    $0x41,%edi
cmovge %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = mul nsw i32 %11, %12
store i32 %13, i32* %7
%14 = load i32, i32* %4
%15 = icmp sgt i32 %14, 64
br i1 %15, label %16, label %38
16: ; preds = %3
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 3
store i32 %18, i32* %8
%19 = load i32, i32* %8
%20 = load i32, i32* %6
%21 = mul nsw i32 %19, %20
%22 = load i32, i32* %7
%23 = add nsw i32 %22, %21
store i32 %23, i32* %7
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 3
store i32 %25, i32* %9
%26 = load i32, i32* %9
%27 = load i32, i32* %6
%28 = mul nsw i32 %26, %27
%29 = load i32, i32* %7
%30 = add nsw i32 %29, %28
store i32 %30, i32* %7
%31 = load i32, i32* %9
%32 = add nsw i32 %31, 3
store i32 %32, i32* %10
%33 = load i32, i32* %10
%34 = load i32, i32* %6
%35 = mul nsw i32 %33, %34
%36 = load i32, i32* %7
%37 = add nsw i32 %36, %35
store i32 %37, i32* %7
br label %38
38: ; preds = %16, %3
%39 = load i32, i32* %7
ret i32 %39
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
%5 = icmp sgt i32 %0, 64
%6 = mul i32 %1, 3
%7 = add i32 %6, 18
%8 = mul i32 %7, %2
%9 = select i1 %5, i32 %8, i32 0
%10 = add i32 %4, %9
ret i32 %10
}
void sigusr1_handler(__attribute__((unused)) int num) {}


x86 assembly (clang, -O0):
<sigusr1_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigusr1_handler>:
ret

LLVM IR (-O0):
define void @sigusr1_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sigusr1_handler(i32 %0) {
ret void
}
/* Variables and functions */
char *deen_leaf_path(char const *, char *);
char *deen_index_path(const char *root_dir) {
  return deen_leaf_path(root_dir, "deen.idx.sqllite3");
}


x86 assembly (clang, -O0):
<deen_index_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <deen_leaf_path@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deen_index_path>:
lea    0xee9(%rip),%rsi
jmp    1030 <deen_leaf_path@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"deen.idx.sqllite3\00"
define i8* @deen_index_path(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @deen_leaf_path(i8* %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [18 x i8] c"deen.idx.sqllite3\00"
define i8* @deen_index_path(i8* %0) {
%2 = tail call i8* @deen_leaf_path(i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
void vec2_set(float v[2], float x, float y) {
  v[0] = x;
  v[1] = y;
}


x86 assembly (clang, -O0):
<vec2_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec2_set>:
movss  %xmm0,(%rdi)
movss  %xmm1,0x4(%rdi)
ret

LLVM IR (-O0):
define void @vec2_set(float* %0, float %1, float %2) {
%4 = alloca float*
%5 = alloca float
%6 = alloca float
store float* %0, float** %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
store float %7, float* %9
%10 = load float, float* %6
%11 = load float*, float** %4
%12 = getelementptr inbounds float, float* %11, i64 1
store float %10, float* %12
ret void
}

LLVM IR (-O2):
define void @vec2_set(float* nocapture writeonly %0, float %1, float %2) {
store float %1, float* %0
%4 = getelementptr inbounds float, float* %0, i64 1
store float %2, float* %4
ret void
}
unsigned xrop3_112_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk2 = ~stk2;
  stk1 = T & stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_112_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_112_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_112_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = and i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_112_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -1
%8 = and i32 %6, %7
%9 = or i32 %8, %3
ret i32 %9
}
int main(int argc, char *argv[]) {
  int testprogram[1] = {0x20210005};
  printf(testprogram[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed4(%rip),%eax
mov    %eax,-0x14(%rbp)
movslq -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.testprogram = [1 x i32] [i32 539033605]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [1 x i32]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [1 x i32]* %6 to i8*
%8 = getelementptr inbounds [1 x i32], [1 x i32]* %6, i64 0, i64 1
%9 = load i32, i32* %8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i8*
%12 = call i32 (i8*, ...) @printf(i8* %11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) poison)
ret i32 0
}
unsigned ShrTest15(unsigned A, unsigned C1, unsigned C2) {
  return (A << C1) >> C2;
}


x86 assembly (clang, -O0):
<ShrTest15>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0xc(%rbp),%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShrTest15>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
mov    %edx,%ecx
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ShrTest15(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = shl i32 %7, %8
%10 = load i32, i32* %6
%11 = lshr i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @ShrTest15(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %0, %1
%5 = lshr i32 %4, %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ DrawGLScene();
void specialKeyPressed(int key, int x, int y) {
  (void)x;
  (void)y;
  (void)key;
  DrawGLScene();
}


x86 assembly (clang, -O0):
<specialKeyPressed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x0,%al
call   1030 <DrawGLScene@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<specialKeyPressed>:
xor    %eax,%eax
jmp    1030 <DrawGLScene@plt>

LLVM IR (-O0):
define void @specialKeyPressed(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = call i32 (...) @DrawGLScene()
ret void
}

LLVM IR (-O2):
define void @specialKeyPressed(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @DrawGLScene()
ret void
}
OP(ed, e8) { illegal_2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <illegal_2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_2()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void help(const char *prog) {
  printf("usage: %s [options]\n", prog);
  printf("       -h              this text\n"
         "       -f              don't daemonize\n"
         "       -b baudrate     set baudrate (default 115200)\n"
         "       -d serial       set serial device (default /dev/ttyS0)\n"
         "       -i interval     set 1-wire reading interval (in seconds, "
         "default 60)\n"
         "       -w watchdog_ch  watchdog channel\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xedc(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"usage: %s [options]\0A\00"
@.str.1 = [304 x i8] c" -h this text\0A -f don't daemonize\0A -b baudrate set baudrate (default 115200)\0A -d serial set serial device (default /dev/ttyS0)\0A -i interval set 1-wire reading interval (in seconds, default 60)\0A -w watchdog_ch watchdog channel\0A\00"
define void @help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([304 x i8], [304 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"usage: %s [options]\0A\00"
@str = [303 x i8] c" -h this text\0A -f don't daemonize\0A -b baudrate set baudrate (default 115200)\0A -d serial set serial device (default /dev/ttyS0)\0A -i interval set 1-wire reading interval (in seconds, default 60)\0A -w watchdog_ch watchdog channel\00"
define void @help(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([303 x i8], [303 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SOCK_STREAM;
int serversock(int /*<<< orphan*/, int, int);
int serverTCPsock(int portN, int qlen) {
  return serversock(SOCK_STREAM, portN, qlen);
}


x86 assembly (clang, -O0):
<serverTCPsock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <serversock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serverTCPsock>:
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
jmp    1030 <serversock@plt>

LLVM IR (-O0):
@SOCK_STREAM = global i32 0
define i32 @serverTCPsock(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @SOCK_STREAM
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @serversock(i32 %5, i32 %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@SOCK_STREAM = global i32 0
define i32 @serverTCPsock(i32 %0, i32 %1) {
%3 = load i32, i32* @SOCK_STREAM
%4 = tail call i32 @serversock(i32 %3, i32 %0, i32 %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int, unsigned int, unsigned int);
int /*<<< orphan*/ scanf(char *, unsigned int *);
int main() {
  unsigned int a = 0;
  unsigned int b = 0;
  scanf("%x", &a);
  scanf("%x", &b);
  printf("%x & %x = %x\n", a, b, a & b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    0xebc(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
lea    0xeac(%rip),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x0,0xc(%rsp)
movl   $0x0,0x8(%rsp)
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
mov    0x8(%rsp),%edx
mov    %edx,%ecx
and    %esi,%ecx
lea    0xe9a(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%x\00"
@.str.1 = [14 x i8] c"%x & %x = %x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = and i32 %8, %9
%11 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i32 %6, i32 %7, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%x\00"
@.str.1 = [14 x i8] c"%x & %x = %x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = and i32 %8, %7
%10 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32 %8, i32 %9)
ret i32 0
}
/* Variables and functions */
int innetgr(char *, char *, char *, int /*<<< orphan*/ *);
int match_innetgr(char *group, char *name) {
  if (innetgr(group, name, NULL, NULL) == 1)
    return 1;
  if (innetgr(group, NULL, name, NULL) == 1)
    return 2;
  return 0;
}


x86 assembly (clang, -O0):
<match_innetgr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rdx
call   1030 <innetgr@plt>
cmp    $0x1,%eax
jne    1149 <match_innetgr+0x39>
movl   $0x1,-0x4(%rbp)
jmp    1179 <match_innetgr+0x69>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rsi
call   1030 <innetgr@plt>
cmp    $0x1,%eax
jne    1172 <match_innetgr+0x62>
movl   $0x2,-0x4(%rbp)
jmp    1179 <match_innetgr+0x69>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_innetgr>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <innetgr@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0x1,%ecx
je     114a <match_innetgr+0x3a>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
xor    %ecx,%ecx
call   1030 <innetgr@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
sete   %al
add    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @match_innetgr(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i32 @innetgr(i8* %6, i8* %7, i8* null, i32* null)
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %18
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = call i32 @innetgr(i8* %12, i8* null, i8* %13, i32* null)
%15 = icmp eq i32 %14, 1
br i1 %15, label %16, label %17
16: ; preds = %11
store i32 2, i32* %3
br label %18
17: ; preds = %11
store i32 0, i32* %3
br label %18
18: ; preds = %17, %16, %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @match_innetgr(i8* %0, i8* %1) {
%3 = tail call i32 @innetgr(i8* %0, i8* %1, i8* null, i32* null)
%4 = icmp eq i32 %3, 1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @innetgr(i8* %0, i8* null, i8* %1, i32* null)
%7 = icmp eq i32 %6, 1
%8 = select i1 %7, i32 2, i32 0
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
void virtio_init(void) {}


x86 assembly (clang, -O0):
<virtio_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<virtio_init>:
ret

LLVM IR (-O0):
define void @virtio_init() {
ret void
}

LLVM IR (-O2):
define void @virtio_init() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XEvent;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ do_KeyPress(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void do_KeyRelease(FILE *out_f, XEvent *eventp) { do_KeyPress(out_f, eventp); }


x86 assembly (clang, -O0):
<do_KeyRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <do_KeyPress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_KeyRelease>:
jmp    1030 <do_KeyPress@plt>

LLVM IR (-O0):
define void @do_KeyRelease(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @do_KeyPress(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @do_KeyRelease(i32* %0, i32* %1) {
%3 = tail call i32 @do_KeyPress(i32* %0, i32* %1)
ret void
}
int sSumas_rec(int v, int n) {
  if (v == 0)
    return 0;
  else if (v == 1)
    return n;
  else
    return sSumas_rec(--v, n) + n;
}


x86 assembly (clang, -O0):
<sSumas_rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1134 <sSumas_rec+0x24>
movl   $0x0,-0x4(%rbp)
jmp    1160 <sSumas_rec+0x50>
cmpl   $0x1,-0x8(%rbp)
jne    1149 <sSumas_rec+0x39>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <sSumas_rec+0x50>
mov    -0x8(%rbp),%edi
add    $0xffffffff,%edi
mov    %edi,-0x8(%rbp)
mov    -0xc(%rbp),%esi
call   1030 <sSumas_rec@plt>
add    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sSumas_rec>:
mov    %esi,%eax
xor    %ecx,%ecx
test   %edi,%edi
je     111e <sSumas_rec+0x1e>
nopl   0x0(%rax,%rax,1)
cmp    $0x1,%edi
je     1120 <sSumas_rec+0x20>
add    $0xffffffff,%edi
add    %eax,%ecx
test   %edi,%edi
jne    1110 <sSumas_rec+0x10>
mov    %edi,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sSumas_rec(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %21
9: ; preds = %2
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = load i32, i32* %5
store i32 %13, i32* %3
br label %21
14: ; preds = %9
%15 = load i32, i32* %4
%16 = add nsw i32 %15, -1
store i32 %16, i32* %4
%17 = load i32, i32* %5
%18 = call i32 @sSumas_rec(i32 %16, i32 %17)
%19 = load i32, i32* %5
%20 = add nsw i32 %18, %19
store i32 %20, i32* %3
br label %21
21: ; preds = %14, %12, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @sSumas_rec(i32 %0, i32 %1) {
br label %3
3: ; preds = %6, %2
%4 = phi i32 [ 0, %2 ], [ %8, %6 ]
%5 = phi i32 [ %0, %2 ], [ %7, %6 ]
switch i32 %5, label %6 [
i32 0, label %9
i32 1, label %10
]
6: ; preds = %3
%7 = add nsw i32 %5, -1
%8 = add nsw i32 %4, %1
br label %3
9: ; preds = %3
br label %10
10: ; preds = %3, %9
%11 = phi i32 [ %5, %9 ], [ %1, %3 ]
%12 = add nsw i32 %11, %4
ret i32 %12
}
int main(void) { return (0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ _append_buf(char *, int);
int klogctl(int, char *, int);
void drain_dmesg(void) {
  char buf[1024 * 1024 + 1];
  int sz = klogctl(4, buf, sizeof(buf) - 1);
  if (sz > 0) {
    buf[sz] = 0;
    _append_buf(buf, sz);
  }
}


x86 assembly (clang, -O0):
<drain_dmesg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100020,%rsp
lea    -0x100010(%rbp),%rsi
mov    $0x4,%edi
mov    $0x100000,%edx
call   1030 <klogctl@plt>
mov    %eax,-0x100014(%rbp)
cmpl   $0x0,-0x100014(%rbp)
jle    1175 <drain_dmesg+0x55>
movslq -0x100014(%rbp),%rax
movb   $0x0,-0x100010(%rbp,%rax,1)
lea    -0x100010(%rbp),%rdi
mov    -0x100014(%rbp),%esi
call   1040 <_append_buf@plt>
add    $0x100020,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drain_dmesg>:
sub    $0x100008,%rsp
mov    %rsp,%rsi
mov    $0x4,%edi
mov    $0x100000,%edx
call   1030 <klogctl@plt>
test   %eax,%eax
jle    114d <drain_dmesg+0x2d>
mov    %eax,%ecx
movb   $0x0,(%rsp,%rcx,1)
mov    %rsp,%rdi
mov    %eax,%esi
call   1040 <_append_buf@plt>
add    $0x100008,%rsp
ret

LLVM IR (-O0):
define void @drain_dmesg() {
%1 = alloca [1048577 x i8]
%2 = alloca i32
%3 = getelementptr inbounds [1048577 x i8], [1048577 x i8]* %1, i64 0, i64 0
%4 = call i32 @klogctl(i32 4, i8* %3, i32 1048576)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %0
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [1048577 x i8], [1048577 x i8]* %1, i64 0, i64 %9
store i8 0, i8* %10
%11 = getelementptr inbounds [1048577 x i8], [1048577 x i8]* %1, i64 0, i64 0
%12 = load i32, i32* %2
%13 = call i32 @_append_buf(i8* %11, i32 %12)
br label %14
14: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
define void @drain_dmesg() {
%1 = alloca [1048577 x i8]
%2 = getelementptr inbounds [1048577 x i8], [1048577 x i8]* %1, i64 0, i64 0
%3 = call i32 @klogctl(i32 4, i8* %2, i32 1048576)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %0
%6 = zext i32 %3 to i64
%7 = getelementptr inbounds [1048577 x i8], [1048577 x i8]* %1, i64 0, i64 %6
store i8 0, i8* %7
%8 = call i32 @_append_buf(i8* %2, i32 %3)
br label %9
9: ; preds = %5, %0
ret void
}
unsigned int x86_readtsc(void) {
  unsigned int tsc;
  __asm__ __volatile__("rdtsc\n\t" : "=a"(tsc) :);
  return tsc;
}


x86 assembly (clang, -O0):
<x86_readtsc>:
push   %rbp
mov    %rsp,%rbp
rdtsc
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86_readtsc>:
rdtsc
ret

LLVM IR (-O0):
define i32 @x86_readtsc() {
%1 = alloca i32
%2 = call i32 asm sideeffect "rdtsc\0A\09", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @x86_readtsc() {
%1 = tail call i32 asm sideeffect "rdtsc\0A\09", "={ax},~{dirflag},~{fpsr},~{flags}"()
ret i32 %1
}
void __exec(char *cmd, void *env) {}


x86 assembly (clang, -O0):
<__exec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__exec>:
ret

LLVM IR (-O0):
define void @__exec(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__exec(i8* nocapture %0, i8* nocapture %1) {
ret void
}
int pth_pth_uctx_save(void *p1) {}


x86 assembly (clang, -O0):
<pth_pth_uctx_save>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pth_pth_uctx_save>:
ret

LLVM IR (-O0):
define i32 @pth_pth_uctx_save(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @pth_pth_uctx_save(i8* nocapture readnone %0) {
ret i32 undef
}