xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void GiveInstructions(void) {
  printf("This program displays a calendar for a full\n");
  printf("year. The year must not be before 1900 and.\n");
  printf("no more than 2000 if you input two digits\n");
}


x86 assembly (clang, -O0):
<GiveInstructions>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf06(%rip),%rdi
call   1030 <printf@plt>
lea    0xf27(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GiveInstructions>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf08(%rip),%rdi
call   1030 <puts@plt>
lea    0xf28(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"This program displays a calendar for a full\0A\00"
@.str.1 = [45 x i8] c"year. The year must not be before 1900 and.\0A\00"
@.str.2 = [43 x i8] c"no more than 2000 if you input two digits\0A\00"
define void @GiveInstructions() {
%1 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [44 x i8] c"This program displays a calendar for a full\00"
@str.3 = [44 x i8] c"year. The year must not be before 1900 and.\00"
@str.4 = [42 x i8] c"no more than 2000 if you input two digits\00"
define void @GiveInstructions() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ write(int, unsigned int *, int);
int write_float4(int f, float x) {
  float y;
  unsigned int *iptr = (unsigned int *)&y, temp;
  y = (float)x;
  temp = ((*iptr & 0xff000000) >> 24 | (*iptr & 0x00ff0000) >> 8 |
          (*iptr & 0x0000ff00) << 8 | (*iptr & 0x000000ff) << 24);
  return write(f, &temp, 4) > 0;
}


x86 assembly (clang, -O0):
<write_float4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
and    $0xff000000,%eax
shr    $0x18,%eax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%ecx
and    $0xff0000,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x1c(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
cmp    $0x0,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_float4>:
push   %rax
movd   %xmm0,%eax
bswap  %eax
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
xor    %ecx,%ecx
test   %rax,%rax
setg   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_float4(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %3
store float %1, float* %4
%8 = bitcast float* %5 to i32*
store i32* %8, i32** %6
%9 = load float, float* %4
store float %9, float* %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = and i32 %11, -16777216
%13 = lshr i32 %12, 24
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = and i32 %15, 16711680
%17 = lshr i32 %16, 8
%18 = or i32 %13, %17
%19 = load i32*, i32** %6
%20 = load i32, i32* %19
%21 = and i32 %20, 65280
%22 = shl i32 %21, 8
%23 = or i32 %18, %22
%24 = load i32*, i32** %6
%25 = load i32, i32* %24
%26 = and i32 %25, 255
%27 = shl i32 %26, 24
%28 = or i32 %23, %27
store i32 %28, i32* %7
%29 = load i32, i32* %3
%30 = call i64 @write(i32 %29, i32* %7, i32 4)
%31 = icmp sgt i64 %30, 0
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @write_float4(i32 %0, float %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = bitcast float %1 to i32
%6 = tail call i32 @llvm.bswap.i32(i32 %5)
store i32 %6, i32* %3
%7 = call i64 @write(i32 %0, i32* %3, i32 4)
%8 = icmp sgt i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
void XkbQueryExtension() {}


x86 assembly (clang, -O0):
<XkbQueryExtension>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbQueryExtension>:
ret

LLVM IR (-O0):
define void @XkbQueryExtension() {
ret void
}

LLVM IR (-O2):
define void @XkbQueryExtension() {
ret void
}
unsigned int TimerCalcMilliseconds(unsigned int h, unsigned int m,
                                   unsigned int s) {
  return h * 3600000 + m * 60000 + s * 1000;
}


x86 assembly (clang, -O0):
<TimerCalcMilliseconds>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
imul   $0x36ee80,-0x4(%rbp),%eax
imul   $0xea60,-0x8(%rbp),%ecx
add    %ecx,%eax
imul   $0x3e8,-0xc(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerCalcMilliseconds>:
imul   $0x36ee80,%edi,%eax
imul   $0xea60,%esi,%ecx
add    %eax,%ecx
imul   $0x3e8,%edx,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @TimerCalcMilliseconds(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = mul i32 %7, 3600000
%9 = load i32, i32* %5
%10 = mul i32 %9, 60000
%11 = add i32 %8, %10
%12 = load i32, i32* %6
%13 = mul i32 %12, 1000
%14 = add i32 %11, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @TimerCalcMilliseconds(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %0, 3600000
%5 = mul i32 %1, 60000
%6 = add i32 %5, %4
%7 = mul i32 %2, 1000
%8 = add i32 %6, %7
ret i32 %8
}
int test_imm_52uint8_mem(unsigned char *val) {
  return ((*val) & (0x52 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_52uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x52,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_52uint8_mem>:
testb  $0x52,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_52uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 82
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_52uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 82
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void proc_call_4(int p0, int p1, int p2, int p3) {}


x86 assembly (clang, -O0):
<proc_call_4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_call_4>:
ret

LLVM IR (-O0):
define void @proc_call_4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @proc_call_4(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
int calculateMaxLength(int length) {
  const int chunksize = 64;
  int d = (length + 8) / chunksize;
  int o = (length + 8) % chunksize;
  if (0 == o) {
    return d * chunksize;
  }
  return (d + 1) * chunksize;
}


x86 assembly (clang, -O0):
<calculateMaxLength>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x40,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x8,%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x8,%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
cmp    -0x14(%rbp),%eax
jne    1149 <calculateMaxLength+0x49>
mov    -0x10(%rbp),%eax
shl    $0x6,%eax
mov    %eax,-0x4(%rbp)
jmp    1155 <calculateMaxLength+0x55>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
shl    $0x6,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculateMaxLength>:
lea    0x8(%rdi),%ecx
lea    0x47(%rdi),%edx
test   %ecx,%ecx
cmovns %ecx,%edx
and    $0xffffffc0,%edx
lea    0x40(%rdx),%eax
test   $0x3f,%cl
cmove  %edx,%eax
ret

LLVM IR (-O0):
define i32 @calculateMaxLength(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 64, i32* %4
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 8
%9 = sdiv i32 %8, 64
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 8
%12 = srem i32 %11, 64
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = icmp eq i32 0, %13
br i1 %14, label %15, label %18
15: ; preds = %1
%16 = load i32, i32* %5
%17 = mul nsw i32 %16, 64
store i32 %17, i32* %2
br label %22
18: ; preds = %1
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
%21 = mul nsw i32 %20, 64
store i32 %21, i32* %2
br label %22
22: ; preds = %18, %15
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @calculateMaxLength(i32 %0) {
%2 = add nsw i32 %0, 8
%3 = sdiv i32 %2, 64
%4 = and i32 %2, 63
%5 = icmp eq i32 %4, 0
%6 = shl nsw i32 %3, 6
%7 = add i32 %6, 64
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
__attribute__((always_)) struct module *
__module_text_address(unsigned long addr) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<__module_text_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__module_text_address>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.module = type opaque
define %struct.module* @__module_text_address(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret %struct.module* null
}

LLVM IR (-O2):
%struct.module = type opaque
define noalias %struct.module* @__module_text_address(i64 %0) {
ret %struct.module* null
}
/* Variables and functions */
char *memcpy(int /*<<< orphan*/, char const *, unsigned int);
int strlen(char const *);
int /*<<< orphan*/ xmalloc(unsigned int);
char *xstrdup(const char *S) {
  if (S) {
    unsigned Len = strlen(S) + 1;
    return memcpy(xmalloc(Len), S, Len);
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1175 <xstrdup+0x45>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <xmalloc@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <memcpy@plt>
mov    %rax,-0x8(%rbp)
jmp    117d <xstrdup+0x4d>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
test   %rdi,%rdi
je     115c <xstrdup+0x2c>
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <strlen@plt>
lea    0x1(%rax),%ebp
mov    %ebp,%edi
call   1040 <xmalloc@plt>
mov    %eax,%edi
mov    %rbx,%rsi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <memcpy@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = add nsw i32 %9, 1
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = call i32 @xmalloc(i32 %11)
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = call i8* @memcpy(i32 %12, i8* %13, i32 %14)
store i8* %15, i8** %2
br label %17
16: ; preds = %1
store i8* null, i8** %2
br label %17
17: ; preds = %16, %7
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = add nsw i32 %4, 1
%6 = tail call i32 @xmalloc(i32 %5)
%7 = tail call i8* @memcpy(i32 %6, i8* %0, i32 %5)
br label %8
8: ; preds = %1, %3
%9 = phi i8* [ %7, %3 ], [ null, %1 ]
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ getline(char **, size_t *, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
char *getInput() {
  char *lineInput = NULL;
  size_t bufferSize = 64;
  getline(&lineInput, &bufferSize, stdin);
  return lineInput;
}


x86 assembly (clang, -O0):
<getInput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x40,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edx
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <getline@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInput>:
sub    $0x18,%rsp
movq   $0x0,0x8(%rsp)
movq   $0x40,0x10(%rsp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <getline@plt>
mov    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@stdin = global i32 0
define i8* @getInput() {
%1 = alloca i8*
%2 = alloca i64
store i8* null, i8** %1
store i64 64, i64* %2
%3 = load i32, i32* @stdin
%4 = call i32 @getline(i8** %1, i64* %2, i32 %3)
%5 = load i8*, i8** %1
ret i8* %5
}

LLVM IR (-O2):
@stdin = global i32 0
define i8* @getInput() {
%1 = alloca i8*
%2 = alloca i64
%3 = bitcast i8** %1 to i8*
store i8* null, i8** %1
%4 = bitcast i64* %2 to i8*
store i64 64, i64* %2
%5 = load i32, i32* @stdin
%6 = call i32 @getline(i8** %1, i64* %2, i32 %5)
%7 = load i8*, i8** %1
ret i8* %7
}
/* Variables and functions */
int f194(int *);
int f195(int *p) { return f194(p); }


x86 assembly (clang, -O0):
<f195>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f194@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f195>:
jmp    1030 <f194@plt>

LLVM IR (-O0):
define i32 @f195(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f194(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f195(i32* %0) {
%2 = tail call i32 @f194(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ InitSD();
int Nand_Init();
int sdmmc_sdcard_init() {
  InitSD();
  return Nand_Init();
}


x86 assembly (clang, -O0):
<sdmmc_sdcard_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <InitSD@plt>
mov    $0x0,%al
call   1040 <Nand_Init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdmmc_sdcard_init>:
push   %rax
xor    %eax,%eax
call   1030 <InitSD@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <Nand_Init@plt>

LLVM IR (-O0):
define i32 @sdmmc_sdcard_init() {
%1 = call i32 (...) @InitSD()
%2 = call i32 (...) @Nand_Init()
ret i32 %2
}

LLVM IR (-O2):
define i32 @sdmmc_sdcard_init() {
%1 = tail call i32 (...) @InitSD()
%2 = tail call i32 (...) @Nand_Init()
ret i32 %2
}
int cdm_db_select(const char *dbname) {}


x86 assembly (clang, -O0):
<cdm_db_select>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdm_db_select>:
ret

LLVM IR (-O0):
define i32 @cdm_db_select(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @cdm_db_select(i8* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
char *sstore_nadd(void **, char const *, int /*<<< orphan*/);
char *sstore_add(void **ctxp, const char *str) {
  return sstore_nadd(ctxp, str, 0);
}


x86 assembly (clang, -O0):
<sstore_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <sstore_nadd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sstore_add>:
xor    %edx,%edx
jmp    1030 <sstore_nadd@plt>

LLVM IR (-O0):
define i8* @sstore_add(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %4
%7 = call i8* @sstore_nadd(i8** %5, i8* %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @sstore_add(i8** %0, i8* %1) {
%3 = tail call i8* @sstore_nadd(i8** %0, i8* %1, i32 0)
ret i8* %3
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t rgb565(uint8_t r, uint8_t g, uint8_t b) {
  return ((((uint16_t)r + 4) >> 3) << 11) | ((((uint16_t)g + 2) >> 2) << 5) |
         ((((uint16_t)b + 4) >> 3) << 0);
}


x86 assembly (clang, -O0):
<rgb565>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%eax
sar    $0x3,%eax
shl    $0xb,%eax
mov    -0x10(%rbp),%rcx
add    $0x2,%ecx
sar    $0x2,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
mov    -0x18(%rbp),%rcx
add    $0x4,%ecx
sar    $0x3,%ecx
shl    $0x0,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb565>:
shl    $0x8,%edi
lea    0x400(%rdi),%ecx
and    $0xfffff800,%ecx
lea    0x10(,%rsi,8),%esi
and    $0xffffffe0,%esi
lea    0x4(%rdx),%eax
sar    $0x3,%eax
or     %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @rgb565(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = add nsw i32 %8, 4
%10 = ashr i32 %9, 3
%11 = shl i32 %10, 11
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
%14 = add nsw i32 %13, 2
%15 = ashr i32 %14, 2
%16 = shl i32 %15, 5
%17 = or i32 %11, %16
%18 = load i64, i64* %6
%19 = trunc i64 %18 to i32
%20 = add nsw i32 %19, 4
%21 = ashr i32 %20, 3
%22 = shl i32 %21, 0
%23 = or i32 %17, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @rgb565(i64 %0, i64 %1, i64 %2) {
%4 = trunc i64 %0 to i32
%5 = shl i32 %4, 8
%6 = add i32 %5, 1024
%7 = and i32 %6, -2048
%8 = trunc i64 %1 to i32
%9 = shl i32 %8, 3
%10 = add i32 %9, 16
%11 = and i32 %10, -32
%12 = or i32 %11, %7
%13 = trunc i64 %2 to i32
%14 = add nsw i32 %13, 4
%15 = ashr i32 %14, 3
%16 = or i32 %12, %15
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ DecodeEaD_xxxxdddxssmmmrrr();
int /*<<< orphan*/ DoBinOpAdd(int /*<<< orphan*/);
void DoCodeAddEaR(void) { DoBinOpAdd(DecodeEaD_xxxxdddxssmmmrrr()); }


x86 assembly (clang, -O0):
<DoCodeAddEaR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <DecodeEaD_xxxxdddxssmmmrrr@plt>
mov    %eax,%edi
call   1030 <DoBinOpAdd@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoCodeAddEaR>:
push   %rax
xor    %eax,%eax
call   1040 <DecodeEaD_xxxxdddxssmmmrrr@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <DoBinOpAdd@plt>

LLVM IR (-O0):
define void @DoCodeAddEaR() {
%1 = call i32 (...) @DecodeEaD_xxxxdddxssmmmrrr()
%2 = call i32 @DoBinOpAdd(i32 %1)
ret void
}

LLVM IR (-O2):
define void @DoCodeAddEaR() {
%1 = tail call i32 (...) @DecodeEaD_xxxxdddxssmmmrrr()
%2 = tail call i32 @DoBinOpAdd(i32 %1)
ret void
}
/* Type definitions */
typedef unsigned long uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base, uint8_t *pui8Data) {
  ;
  if ((*((volatile unsigned long *)(ui32Base + 0x00000F08))) & 0x00010000) {
    return (0);
  } else {
    *pui8Data = (*((volatile unsigned long *)(ui32Base + 0x00000F00)));
    return (1);
  }
}


x86 assembly (clang, -O0):
<I2CFIFODataGetNonBlocking>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xf08,%eax
cltq
mov    (%rax),%rax
and    $0x10000,%rax
cmp    $0x0,%rax
je     1134 <I2CFIFODataGetNonBlocking+0x34>
movl   $0x0,-0x4(%rbp)
jmp    114f <I2CFIFODataGetNonBlocking+0x4f>
mov    -0x8(%rbp),%eax
add    $0xf00,%eax
cltq
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CFIFODataGetNonBlocking>:
movslq %edi,%rcx
xor    %eax,%eax
testq  $0x10000,0xf08(%rcx)
jne    1121 <I2CFIFODataGetNonBlocking+0x21>
mov    0xf00(%rcx),%rax
mov    %rax,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @I2CFIFODataGetNonBlocking(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64*
store i32 %0, i32* %4
store i64* %1, i64** %5
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 3848
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, 65536
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %21
14: ; preds = %2
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 3840
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = load i64*, i64** %5
store i64 %19, i64* %20
store i32 1, i32* %3
br label %21
21: ; preds = %14, %13
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @I2CFIFODataGetNonBlocking(i32 %0, i64* nocapture writeonly %1) {
%3 = add nsw i32 %0, 3848
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 65536
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = add nsw i32 %0, 3840
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
store i64 %13, i64* %1
br label %14
14: ; preds = %2, %9
%15 = phi i32 [ 1, %9 ], [ 0, %2 ]
ret i32 %15
}
void foo() {
  char b;
  char *p;
  b = *p;
  *p = b;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca i8
%2 = alloca i8*
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
store i8 %4, i8* %1
%5 = load i8, i8* %1
%6 = load i8*, i8** %2
store i8 %5, i8* %6
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
/* Variables and functions */
const char *CmdProc_SkipChars(const char *buf) {
  if (buf == NULL) {
    return NULL;
  }
  while ((buf[0] != 0) && (buf[0] != ' ')) {
    ++buf;
  }
  return buf;
}


x86 assembly (clang, -O0):
<CmdProc_SkipChars>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1120 <CmdProc_SkipChars+0x20>
movq   $0x0,-0x8(%rbp)
jmp    1173 <CmdProc_SkipChars+0x73>
jmp    1125 <CmdProc_SkipChars+0x25>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     114a <CmdProc_SkipChars+0x4a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115a <CmdProc_SkipChars+0x5a>
jmp    116b <CmdProc_SkipChars+0x6b>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1125 <CmdProc_SkipChars+0x25>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CmdProc_SkipChars>:
test   %rdi,%rdi
je     111a <CmdProc_SkipChars+0x1a>
mov    %rdi,%rax
testb  $0xdf,(%rax)
je     1119 <CmdProc_SkipChars+0x19>
nopl   (%rax)
add    $0x1,%rax
testb  $0xdf,(%rax)
jne    1110 <CmdProc_SkipChars+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @CmdProc_SkipChars(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i8* null, i8** %2
br label %27
7: ; preds = %1
br label %8
8: ; preds = %22, %7
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 0
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 32
br label %20
20: ; preds = %14, %8
%21 = phi i1 [ false, %8 ], [ %19, %14 ]
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %3
br label %8
25: ; preds = %20
%26 = load i8*, i8** %3
store i8* %26, i8** %2
br label %27
27: ; preds = %25, %6
%28 = load i8*, i8** %2
ret i8* %28
}

LLVM IR (-O2):
define i8* @CmdProc_SkipChars(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1, %6
%4 = phi i8* [ %7, %6 ], [ %0, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %8
i8 32, label %8
]
6: ; preds = %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
8: ; preds = %3, %3, %1
%9 = phi i8* [ null, %1 ], [ %4, %3 ], [ %4, %3 ]
ret i8* %9
}
unsigned int DMTimerIntStatusGet(unsigned int baseAdd) {
  return ((*((volatile unsigned int *)(baseAdd + (0x28)))));
}


x86 assembly (clang, -O0):
<DMTimerIntStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x28,%eax
mov    %eax,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerIntStatusGet>:
add    $0x28,%edi
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @DMTimerIntStatusGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 40
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @DMTimerIntStatusGet(i32 %0) {
%2 = add i32 %0, 40
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int EXIT_SUCCESS;
int main(void) {
  (void)EXIT_FAILURE;
  (void)EXIT_SUCCESS;
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @EXIT_FAILURE
%3 = load i32, i32* @EXIT_SUCCESS
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @EXIT_SUCCESS
ret i32 %1
}
/* Variables and functions */
scalar_t__ calloc(long, int);
scalar_t__ malloc(long);
int /*<<< orphan*/ perror(char *);
long *svd_longArray(long size, char empty, char *name) {
  long *a;
  if (empty)
    a = (long *)calloc(size, sizeof(long));
  else
    a = (long *)malloc(size * sizeof(long));
  if (!a) {
    perror(name);
  }
  return a;
}


x86 assembly (clang, -O0):
<svd_longArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rdx,-0x18(%rbp)
cmpb   $0x0,-0x9(%rbp)
je     1167 <svd_longArray+0x37>
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x20(%rbp)
jmp    1178 <svd_longArray+0x48>
mov    -0x8(%rbp),%rdi
shl    $0x3,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    118c <svd_longArray+0x5c>
mov    -0x18(%rbp),%rdi
call   1050 <perror@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<svd_longArray>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
test   %sil,%sil
je     1148 <svd_longArray+0x18>
mov    $0x8,%esi
call   1030 <calloc@plt>
jmp    1151 <svd_longArray+0x21>
shl    $0x3,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1164 <svd_longArray+0x34>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    %r14,%rdi
call   1050 <perror@plt>
jmp    1159 <svd_longArray+0x29>

LLVM IR (-O0):
define i64* @svd_longArray(i64 %0, i8 signext %1, i8* %2) {
%4 = alloca i64
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i64*
store i64 %0, i64* %4
store i8 %1, i8* %5
store i8* %2, i8** %6
%8 = load i8, i8* %5
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i64, i64* %4
%12 = call i64 @calloc(i64 %11, i32 8)
%13 = inttoptr i64 %12 to i64*
store i64* %13, i64** %7
br label %19
14: ; preds = %3
%15 = load i64, i64* %4
%16 = mul i64 %15, 8
%17 = call i64 @malloc(i64 %16)
%18 = inttoptr i64 %17 to i64*
store i64* %18, i64** %7
br label %19
19: ; preds = %14, %10
%20 = load i64*, i64** %7
%21 = icmp ne i64* %20, null
br i1 %21, label %25, label %22
22: ; preds = %19
%23 = load i8*, i8** %6
%24 = call i32 @perror(i8* %23)
br label %25
25: ; preds = %22, %19
%26 = load i64*, i64** %7
ret i64* %26
}

LLVM IR (-O2):
define i64* @svd_longArray(i64 %0, i8 signext %1, i8* nocapture %2) {
%4 = icmp eq i8 %1, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i64 @calloc(i64 %0, i32 8)
br label %10
7: ; preds = %3
%8 = shl i64 %0, 3
%9 = tail call i64 @malloc(i64 %8)
br label %10
10: ; preds = %7, %5
%11 = phi i64 [ %6, %5 ], [ %9, %7 ]
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = tail call i32 @perror(i8* %2)
br label %15
15: ; preds = %13, %10
%16 = inttoptr i64 %11 to i64*
ret i64* %16
}
void XKeycodeToKeysym() {}


x86 assembly (clang, -O0):
<XKeycodeToKeysym>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XKeycodeToKeysym>:
ret

LLVM IR (-O0):
define void @XKeycodeToKeysym() {
ret void
}

LLVM IR (-O2):
define void @XKeycodeToKeysym() {
ret void
}
void put_short_le(char *cp, short int sval) {
  *cp++ = sval & 0xff;
  *cp++ = (sval >> 8) & 0xff;
}


x86 assembly (clang, -O0):
<put_short_le>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movswl -0xa(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
movswl -0xa(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_short_le>:
mov    %si,(%rdi)
ret

LLVM IR (-O0):
define void @put_short_le(i8* %0, i16 signext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = sext i16 %5 to i32
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = load i16, i16* %4
%12 = sext i16 %11 to i32
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
store i8 %15, i8* %16
ret void
}

LLVM IR (-O2):
define void @put_short_le(i8* nocapture writeonly %0, i16 signext %1) {
%3 = trunc i16 %1 to i8
%4 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %3, i8* %0
%5 = lshr i16 %1, 8
%6 = trunc i16 %5 to i8
store i8 %6, i8* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void err_out(const char *reason) {
  fprintf(stderr, "Error: %s.\n", reason);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<err_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err_out>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [12 x i8] c"Error: %s.\0A\00"
@EXIT_FAILURE = global i32 0
define void @err_out(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [12 x i8] c"Error: %s.\0A\00"
@EXIT_FAILURE = global i32 0
define void @err_out(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Type definitions */
struct heap {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ minheap_heapify(struct heap *);
int /*<<< orphan*/ minheap_sort(struct heap *);
void heap_sort_desc(struct heap *h) {
  minheap_heapify(h);
  minheap_sort(h);
}


x86 assembly (clang, -O0):
<heap_sort_desc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <minheap_heapify@plt>
mov    -0x8(%rbp),%rdi
call   1040 <minheap_sort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_sort_desc>:
push   %rbx
mov    %rdi,%rbx
call   1030 <minheap_heapify@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <minheap_sort@plt>

LLVM IR (-O0):
%struct.heap = type { i32 }
define void @heap_sort_desc(%struct.heap* %0) {
%2 = alloca %struct.heap*
store %struct.heap* %0, %struct.heap** %2
%3 = load %struct.heap*, %struct.heap** %2
%4 = call i32 @minheap_heapify(%struct.heap* %3)
%5 = load %struct.heap*, %struct.heap** %2
%6 = call i32 @minheap_sort(%struct.heap* %5)
ret void
}

LLVM IR (-O2):
%struct.heap = type { i32 }
define void @heap_sort_desc(%struct.heap* %0) {
%2 = tail call i32 @minheap_heapify(%struct.heap* %0)
%3 = tail call i32 @minheap_sort(%struct.heap* %0)
ret void
}
int is_correct_length(char *command) {
  int command_length = 0;
  while (command[command_length] != '\0') {
    command_length++;
  }
  if (command_length < 14 || command_length > 14) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_correct_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <is_correct_length+0x32>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <is_correct_length+0xf>
cmpl   $0xe,-0x14(%rbp)
jl     1146 <is_correct_length+0x46>
cmpl   $0xe,-0x14(%rbp)
jle    1152 <is_correct_length+0x52>
movl   $0xffffffff,-0x4(%rbp)
jmp    1159 <is_correct_length+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_correct_length>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpb   $0x0,(%rdi,%rcx,1)
lea    0x1(%rcx),%rcx
jne    1110 <is_correct_length+0x10>
xor    %eax,%eax
cmp    $0xf,%ecx
setne  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @is_correct_length(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %5
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = load i32, i32* %4
%18 = icmp slt i32 %17, 14
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = load i32, i32* %4
%21 = icmp sgt i32 %20, 14
br i1 %21, label %22, label %23
22: ; preds = %19, %16
store i32 -1, i32* %2
br label %24
23: ; preds = %19
store i32 0, i32* %2
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_correct_length(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
%10 = icmp ne i32 %9, 14
%11 = sext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ default_isr();
__attribute__((weak)) void DMA_Handler() { default_isr(); }


x86 assembly (clang, -O0):
<DMA_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_isr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA_Handler>:
xor    %eax,%eax
jmp    1030 <default_isr@plt>

LLVM IR (-O0):
define weak void @DMA_Handler() {
%1 = call i32 (...) @default_isr()
ret void
}

LLVM IR (-O2):
define weak void @DMA_Handler() {
%1 = tail call i32 (...) @default_isr()
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void regwrite32(uint32_t addr, uint32_t data) {
  *(volatile uint32_t *)addr = data;
}


x86 assembly (clang, -O0):
<regwrite32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<regwrite32>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @regwrite32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}

LLVM IR (-O2):
define void @regwrite32(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
/* Variables and functions */
unsigned int __get_cpsr();
int /*<<< orphan*/ __set_cpsr(unsigned int);
unsigned IRQ_enable(void) {
  unsigned _cpsr_val;
  _cpsr_val = __get_cpsr();
  __set_cpsr(_cpsr_val & ~0x00000080);
  return _cpsr_val;
}


x86 assembly (clang, -O0):
<IRQ_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <__get_cpsr@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
and    $0xffffff7f,%edi
call   1030 <__set_cpsr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IRQ_enable>:
push   %rbx
xor    %eax,%eax
call   1040 <__get_cpsr@plt>
mov    %eax,%ebx
mov    %eax,%edi
and    $0xffffff7f,%edi
call   1030 <__set_cpsr@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @IRQ_enable() {
%1 = alloca i32
%2 = call i32 (...) @__get_cpsr()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = and i32 %3, -129
%5 = call i32 @__set_cpsr(i32 %4)
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @IRQ_enable() {
%1 = tail call i32 (...) @__get_cpsr()
%2 = and i32 %1, -129
%3 = tail call i32 @__set_cpsr(i32 %2)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ srand(int const);
int const time(int /*<<< orphan*/ *);
void random_seed(const int useseed, const int seed) {
  if (useseed == 1) {
    srand(seed);
  } else {
    srand(time(NULL));
  }
}


x86 assembly (clang, -O0):
<random_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1145 <random_seed+0x25>
mov    -0x8(%rbp),%edi
call   1030 <srand@plt>
jmp    1155 <random_seed+0x35>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_seed>:
cmp    $0x1,%edi
je     1133 <random_seed+0x13>
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%esi
add    $0x8,%rsp
mov    %esi,%edi
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @random_seed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = call i32 @srand(i32 %8)
br label %13
10: ; preds = %2
%11 = call i32 @time(i32* null)
%12 = call i32 @srand(i32 %11)
br label %13
13: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
define void @random_seed(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @time(i32* null)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ %1, %2 ]
%8 = tail call i32 @srand(i32 %7)
ret void
}
__typeof__(memset(1, 1, "")) test_memset_126(void) { return memset(1, 1, ""); }


x86 assembly (clang, -O0):
<test_memset_126>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x1,%esi
lea    0xedb(%rip),%rdx
call   1030 <memset@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_memset_126>:
lea    0xee9(%rip),%rdx
mov    $0x1,%edi
mov    $0x1,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @test_memset_126() {
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @test_memset_126() {
tail call void @llvm.memset.p0i8.i64(i8* align 1 inttoptr (i64 1 to i8*), i8 1, i64 ptrtoint ([1 x i8]* @.str to i64), i1 false)
ret i8* inttoptr (i64 1 to i8*)
}
/* Variables and functions */
int /*<<< orphan*/ output_timing();
void problem_output() { output_timing(); }


x86 assembly (clang, -O0):
<problem_output>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <output_timing@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<problem_output>:
xor    %eax,%eax
jmp    1030 <output_timing@plt>

LLVM IR (-O0):
define void @problem_output() {
%1 = call i32 (...) @output_timing()
ret void
}

LLVM IR (-O2):
define void @problem_output() {
%1 = tail call i32 (...) @output_timing()
ret void
}
void test47_Dispatcher_targetInit__I() {}


x86 assembly (clang, -O0):
<test47_Dispatcher_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test47_Dispatcher_targetInit__I>:
ret

LLVM IR (-O0):
define void @test47_Dispatcher_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test47_Dispatcher_targetInit__I() {
ret void
}
unsigned xrop3_210_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = D & stk3;
  stk1 = T ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_210_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_210_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
not    %ecx
xor    %edi,%eax
xor    $0xff,%eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_210_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = xor i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_210_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -1
%8 = xor i32 %6, %3
%9 = xor i32 %8, 255
%10 = and i32 %9, %7
%11 = or i32 %10, %3
ret i32 %11
}
/* Variables and functions */
bool nrf91_errata_17(void) { return false; }


x86 assembly (clang, -O0):
<nrf91_errata_17>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf91_errata_17>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf91_errata_17() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf91_errata_17() {
ret i32 0
}
int execute_mremap() { return 0; }


x86 assembly (clang, -O0):
<execute_mremap>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_mremap>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_mremap() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_mremap() {
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_write_quaddobl_Laurent_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(561, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_write_quaddobl_Laurent_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x231,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_write_quaddobl_Laurent_system>:
mov    $0x231,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @syscon_write_quaddobl_Laurent_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 561, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_write_quaddobl_Laurent_system() {
%1 = tail call i32 @_ada_use_c2phc(i32 561, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ fact64_tail2(int /*<<< orphan*/, int);
int64_t fact64_tail(int64_t n) { return fact64_tail2(n, 1); }


x86 assembly (clang, -O0):
<fact64_tail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <fact64_tail2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact64_tail>:
mov    $0x1,%esi
jmp    1030 <fact64_tail2@plt>

LLVM IR (-O0):
define i32 @fact64_tail(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fact64_tail2(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fact64_tail(i32 %0) {
%2 = tail call i32 @fact64_tail2(i32 %0, i32 1)
ret i32 %2
}
float f() { return (float)1.5; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f() {
ret float 1.500000e+00
}

LLVM IR (-O2):
define float @f() {
ret float 1.500000e+00
}