xunge/DecIR huggingface dataset:
signed long long f25(signed long long v_foo) {
  signed long long v_and = v_foo & 14;
  signed long long v_parta = v_and << 3;
  signed long long v_partb = ((unsigned long long)v_and) >> 61;
  signed long long v_rotl = v_parta | v_partb;
  return v_rotl;
}


x86 assembly (clang, -O0):
<f25>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xe,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x3d,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
or     -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f25>:
lea    0x0(,%rdi,8),%eax
and    $0x70,%eax
ret

LLVM IR (-O0):
define i64 @f25(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %2
%7 = load i64, i64* %2
%8 = and i64 %7, 14
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = shl i64 %9, 3
store i64 %10, i64* %4
%11 = load i64, i64* %3
%12 = lshr i64 %11, 61
store i64 %12, i64* %5
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = or i64 %13, %14
store i64 %15, i64* %6
%16 = load i64, i64* %6
ret i64 %16
}

LLVM IR (-O2):
define i64 @f25(i64 %0) {
%2 = shl i64 %0, 3
%3 = and i64 %2, 112
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ notify_pvcall(char *);
int pvSetBandwidth(char byBoardNum, char byBandwidth) {
  notify_pvcall("f");
  return (0);
}


x86 assembly (clang, -O0):
<pvSetBandwidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
lea    0xed5(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvSetBandwidth>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define i32 @pvSetBandwidth(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define i32 @pvSetBandwidth(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_info(char const *);
void console_init(void) {
  static const char console_test[] = "\r\n\r\nLinuxBIOS-"
                                     "1.1.0"
                                     ".0Fallback"
                                     " "
                                     "Mon Jun 9 18:15:20 MDT 2003"
                                     " starting...\r\n";
  print_info(console_test);
}


x86 assembly (clang, -O0):
<console_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print_info@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <print_info@plt>

LLVM IR (-O0):
@console_init.console_test = internal constant [72 x i8] c"\0D\0A\0D\0ALinuxBIOS-1.1.0.0Fallback Mon Jun 9 18:15:20 MDT 2003 starting...\0D\0A\00"
define void @console_init() {
%1 = call i32 @print_info(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @console_init.console_test, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@console_init.console_test = internal constant [72 x i8] c"\0D\0A\0D\0ALinuxBIOS-1.1.0.0Fallback Mon Jun 9 18:15:20 MDT 2003 starting...\0D\0A\00"
define void @console_init() {
%1 = tail call i32 @print_info(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @console_init.console_test, i64 0, i64 0))
ret void
}
int stress_drop_capabilities(const char *name) {
  (void)name;
  return 0;
}


x86 assembly (clang, -O0):
<stress_drop_capabilities>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_drop_capabilities>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stress_drop_capabilities(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @stress_drop_capabilities(i8* nocapture readnone %0) {
ret i32 0
}
int jac_chain_nm6_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 2;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 38;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm6_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <jac_chain_nm6_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <jac_chain_nm6_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <jac_chain_nm6_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <jac_chain_nm6_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x26,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm6_work>:
test   %rdi,%rdi
je     110b <jac_chain_nm6_work+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <jac_chain_nm6_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <jac_chain_nm6_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <jac_chain_nm6_work+0x2c>
movl   $0x26,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm6_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 38, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm6_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 38, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
int test_imm_0Eint32_mem(int *val) {
  return ((*val) & (0x0E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Eint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Eint32_mem>:
testb  $0xe,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Eint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 14
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Eint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 14
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void CfgDepBase_MBR_SET_OBJ(bb, ss, vv) int *bb, ss, vv;
{
  int r, b;
  CfgDepBase_SRC_HIH_EQL_SET_OBJ(&b, &r, ss, vv);
  *bb = b;
}


x86 assembly (clang, -O0):
<CfgDepBase_MBR_SET_OBJ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    -0x18(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0x0,%al
call   1030 <CfgDepBase_SRC_HIH_EQL_SET_OBJ@plt>
mov    -0x18(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CfgDepBase_MBR_SET_OBJ>:
push   %rbx
sub    $0x10,%rsp
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rbx
lea    0x8(%rsp),%rdi
lea    0xc(%rsp),%rsi
xor    %eax,%eax
call   1030 <CfgDepBase_SRC_HIH_EQL_SET_OBJ@plt>
mov    0x8(%rsp),%eax
mov    %eax,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @CfgDepBase_MBR_SET_OBJ(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @CfgDepBase_SRC_HIH_EQL_SET_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %8, i32* %7, i32 %9, i32 %10)
%12 = load i32, i32* %8
%13 = load i32*, i32** %4
store i32 %12, i32* %13
ret void
}

LLVM IR (-O2):
define void @CfgDepBase_MBR_SET_OBJ(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = bitcast i32* %4 to i8*
%7 = bitcast i32* %5 to i8*
%8 = call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @CfgDepBase_SRC_HIH_EQL_SET_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %5, i32* %4, i32 %1, i32 %2)
%9 = load i32, i32* %5
store i32 %9, i32* %0
ret void
}
unsigned long long read_mxcsr(void) {
  unsigned long long mxcsr;
  asm volatile("stmxcsr %0" : "=m"(mxcsr));
  return mxcsr;
}


x86 assembly (clang, -O0):
<read_mxcsr>:
push   %rbp
mov    %rsp,%rbp
stmxcsr -0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_mxcsr>:
stmxcsr -0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i64 @read_mxcsr() {
%1 = alloca i64
%2 = load i64, i64* %1
ret i64 %2
}

LLVM IR (-O2):
define i64 @read_mxcsr() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = load i64, i64* %1
ret i64 %3
}
int execute_rt_sigqueueinfo() { return 0; }


x86 assembly (clang, -O0):
<execute_rt_sigqueueinfo>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_rt_sigqueueinfo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_rt_sigqueueinfo() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_rt_sigqueueinfo() {
ret i32 0
}
__attribute__((always_)) void set_io_start_time_ns(struct request *req) {}


x86 assembly (clang, -O0):
<set_io_start_time_ns>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_io_start_time_ns>:
ret

LLVM IR (-O0):
%struct.request = type opaque
define void @set_io_start_time_ns(%struct.request* %0) {
%2 = alloca %struct.request*
store %struct.request* %0, %struct.request** %2
ret void
}

LLVM IR (-O2):
%struct.request = type opaque
define void @set_io_start_time_ns(%struct.request* nocapture %0) {
ret void
}
void ff_hevc_put_hevc_uni_w_epel_h16_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h16_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h16_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h16_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h16_8_sse4() {
ret void
}
extern double testit() { return __builtin_pow(0.11, 1.0e38); }


x86 assembly (clang, -O0):
<testit>:
push   %rbp
mov    %rsp,%rbp
movsd  0xee4(%rip),%xmm0
movsd  0xee4(%rip),%xmm1
call   1030 <pow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testit>:
movsd  0xee8(%rip),%xmm0
movsd  0xee8(%rip),%xmm1
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @testit() {
%1 = call double @pow(double 1.100000e-01, double 0x47D2CED32A16A1B1)
ret double %1
}

LLVM IR (-O2):
define double @testit() {
%1 = tail call double @pow(double 1.100000e-01, double 0x47D2CED32A16A1B1)
ret double %1
}
/* Variables and functions */
int /*<<< orphan*/ PrintErrorCode();
int dxl_read_byte(int, int);
int getPressentTemperature(int Id) {
  int CurrentTemp;
  CurrentTemp = dxl_read_byte(Id, 43);
  PrintErrorCode();
  return CurrentTemp;
}


x86 assembly (clang, -O0):
<getPressentTemperature>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2b,%esi
call   1040 <dxl_read_byte@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <PrintErrorCode@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPressentTemperature>:
push   %rbx
mov    $0x2b,%esi
call   1040 <dxl_read_byte@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <PrintErrorCode@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getPressentTemperature(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @dxl_read_byte(i32 %4, i32 43)
store i32 %5, i32* %3
%6 = call i32 (...) @PrintErrorCode()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @getPressentTemperature(i32 %0) {
%2 = tail call i32 @dxl_read_byte(i32 %0, i32 43)
%3 = tail call i32 (...) @PrintErrorCode()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *, char *);
int main() {
  int sth;
  char sthc;
  printf("          Created by:\n");
  scanf("%d%c", &sth, &sthc);
  printf("\n\n\n          *         *    *****    *    *    ***\n"
         "          **       **    *        *    *    *  *\n"
         "          * *     * *    *        *    *    *   *\n"
         "          *  *   *  *    *        ******    *    *\n"
         "          *   * *   *    *        *    *    *   *\n"
         "          *    *    *    *        *    *    *  *\n"
         "          *         *    *****    *    *    ***\n\n\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0x9(%rbp),%rdx
call   1040 <scanf@plt>
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
lea    0x4(%rsp),%rsi
lea    0x3(%rsp),%rdx
call   1040 <scanf@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c" Created by:\0A\00"
@.str.1 = [5 x i8] c"%d%c\00"
@.str.2 = [351 x i8] c"\0A\0A\0A * * ***** * * ***\0A ** ** * * * * *\0A * * * * * * * * *\0A * * * * * ****** * *\0A * * * * * * * * *\0A * * * * * * * *\0A * * ***** * * ***\0A\0A\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %2, i8* %3)
%6 = call i32 @printf(i8* getelementptr inbounds ([351 x i8], [351 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [5 x i8] c"%d%c\00"
@str = [22 x i8] c" Created by:\00"
@str.3 = [350 x i8] c"\0A\0A\0A * * ***** * * ***\0A ** ** * * * * *\0A * * * * * * * * *\0A * * * * * ****** * *\0A * * * * * * * * *\0A * * * * * * * *\0A * * ***** * * ***\0A\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = bitcast i32* %1 to i8*
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %1, i8* %2)
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([350 x i8], [350 x i8]* @str.3, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int memcmp(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *, size_t);
int u8_strncmp(const u_int32_t *s1, const u_int32_t *s2, size_t length) {
  return memcmp(s1, s2, length * sizeof(u_int32_t));
}


x86 assembly (clang, -O0):
<u8_strncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
shl    $0x2,%rdx
call   1030 <memcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8_strncmp>:
shl    $0x2,%rdx
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define i32 @u8_strncmp(i32* %0, i32* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i64, i64* %6
%10 = mul i64 %9, 4
%11 = call i32 @memcmp(i32* %7, i32* %8, i64 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @u8_strncmp(i32* nocapture %0, i32* nocapture %1, i64 %2) {
%4 = shl i64 %2, 2
%5 = tail call i32 @memcmp(i32* %0, i32* %1, i64 %4)
ret i32 %5
}
/* Variables and functions */
char *strrchr(char const *, int);
char *rindex(const char *s, int c) { return strrchr(s, c); }


x86 assembly (clang, -O0):
<rindex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strrchr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rindex>:
jmp    1030 <strrchr@plt>

LLVM IR (-O0):
define i8* @rindex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @strrchr(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @rindex(i8* %0, i32 %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ __free_cf(void *);
void CGGradientRelease(void *item) { __free_cf(item); }


x86 assembly (clang, -O0):
<CGGradientRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__free_cf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CGGradientRelease>:
jmp    1030 <__free_cf@plt>

LLVM IR (-O0):
define void @CGGradientRelease(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__free_cf(i8* %3)
ret void
}

LLVM IR (-O2):
define void @CGGradientRelease(i8* %0) {
%2 = tail call i32 @__free_cf(i8* %0)
ret void
}
/* Type definitions */
struct Cyc_List_List {
  int dummy;
};

/* Variables and functions */
void *Cyc_AssnDef_aggr(int, unsigned int, struct Cyc_List_List *, void *);
void *Cyc_AssnDef_union_aggr(unsigned tag, struct Cyc_List_List *ts, void *tp) {
  void *_T0;
  _T0 = Cyc_AssnDef_aggr(1, tag, ts, tp);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_AssnDef_union_aggr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1,%edi
call   1030 <Cyc_AssnDef_aggr@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_AssnDef_union_aggr>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <Cyc_AssnDef_aggr@plt>

LLVM IR (-O0):
%struct.Cyc_List_List = type { i32 }
define i8* @Cyc_AssnDef_union_aggr(i32 %0, %struct.Cyc_List_List* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.Cyc_List_List*
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %4
store %struct.Cyc_List_List* %1, %struct.Cyc_List_List** %5
store i8* %2, i8** %6
%8 = load i32, i32* %4
%9 = load %struct.Cyc_List_List*, %struct.Cyc_List_List** %5
%10 = load i8*, i8** %6
%11 = call i8* @Cyc_AssnDef_aggr(i32 1, i32 %8, %struct.Cyc_List_List* %9, i8* %10)
store i8* %11, i8** %7
%12 = load i8*, i8** %7
ret i8* %12
}

LLVM IR (-O2):
%struct.Cyc_List_List = type { i32 }
define i8* @Cyc_AssnDef_union_aggr(i32 %0, %struct.Cyc_List_List* %1, i8* %2) {
%4 = tail call i8* @Cyc_AssnDef_aggr(i32 1, i32 %0, %struct.Cyc_List_List* %1, i8* %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ unlink(char *);
void leave(void) {
  unlink("/tmp/"
         "opend"
         ".socket");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<leave>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <unlink@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<leave>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <unlink@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"/tmp/opend.socket\00"
@EXIT_SUCCESS = global i32 0
define void @leave() {
%1 = call i32 @unlink(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@.str = [18 x i8] c"/tmp/opend.socket\00"
@EXIT_SUCCESS = global i32 0
define void @leave() {
%1 = tail call i32 @unlink(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int io_con_vout(char const *, int /*<<< orphan*/);
int con_vout(char const *fmt, va_list ap) { return io_con_vout(fmt, ap); }


x86 assembly (clang, -O0):
<con_vout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <io_con_vout@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<con_vout>:
jmp    1030 <io_con_vout@plt>

LLVM IR (-O0):
define i32 @con_vout(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @io_con_vout(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @con_vout(i8* %0, i32 %1) {
%3 = tail call i32 @io_con_vout(i8* %0, i32 %1)
ret i32 %3
}
int test_imm_B2uint8_reg(unsigned char val) {
  return ((val) & (0xB2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B2uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xb2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B2uint8_reg>:
test   $0xb2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B2uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 178
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B2uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -78
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  printf("%d\n", n * n);
  printf("%d\n", n * n * n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
imul   -0x8(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
imul   -0x8(%rbp),%esi
imul   -0x8(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
imul   %esi,%esi
lea    0xebf(%rip),%rbx
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    0xc(%rsp),%eax
mov    %eax,%esi
imul   %eax,%esi
imul   %eax,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = mul nsw i32 %8, %9
%11 = load i32, i32* %2
%12 = mul nsw i32 %10, %11
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %1
%8 = mul nsw i32 %7, %7
%9 = mul nsw i32 %8, %7
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void grecs_grecs_free(void *ptr) { free((char *)ptr); }


x86 assembly (clang, -O0):
<grecs_grecs_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grecs_grecs_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @grecs_grecs_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @grecs_grecs_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int fun640() { return 640; }


x86 assembly (clang, -O0):
<fun640>:
push   %rbp
mov    %rsp,%rbp
mov    $0x280,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun640>:
mov    $0x280,%eax
ret

LLVM IR (-O0):
define i32 @fun640() {
ret i32 640
}

LLVM IR (-O2):
define i32 @fun640() {
ret i32 640
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("hi\n");
  main();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
call   1040 <main@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <puts@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [4 x i8] c"hi\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @main()
ret i32 0
}

LLVM IR (-O2):
@str = [3 x i8] c"hi\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
br label %1
}
int test_imm_0Fuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x0F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Fuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Fuint64_highword_mem>:
testb  $0xf,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Fuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 15
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Fuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 64424509440
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMRE2_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMRE2_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRE2_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMRE2_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRE2_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int pthread_mutex_timedlock(pthread_mutex_t *__restrict __mutex,
                            __const struct timespec *__restrict __abstime) {
  return 0;
}


x86 assembly (clang, -O0):
<pthread_mutex_timedlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_mutex_timedlock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @pthread_mutex_timedlock(i32* noalias %0, %struct.timespec* noalias %1) {
%3 = alloca i32*
%4 = alloca %struct.timespec*
store i32* %0, i32** %3
store %struct.timespec* %1, %struct.timespec** %4
ret i32 0
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @pthread_mutex_timedlock(i32* noalias nocapture readnone %0, %struct.timespec* noalias nocapture readnone %1) {
ret i32 0
}
void f(x) int x;
{}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
ret void
}
int Arith_div(int x, int y) {
  if (-5 / 2 == -2 && (x < 0) != (y < 0) && x % y != 0)
    return x / y - 1;
  else
    return x / y;
}


x86 assembly (clang, -O0):
<Arith_div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0xc(%rbp)
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
je     114d <Arith_div+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     114d <Arith_div+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1157 <Arith_div+0x57>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Arith_div>:
mov    %esi,%eax
xor    %edi,%eax
js     110c <Arith_div+0xc>
mov    %edi,%eax
cltd
idiv   %esi
ret
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1106 <Arith_div+0x6>
mov    %edi,%eax
cltd
idiv   %esi
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Arith_div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
%11 = zext i1 %10 to i32
%12 = icmp ne i32 %8, %11
br i1 %12, label %13, label %23
13: ; preds = %2
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = srem i32 %14, %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %13
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = sdiv i32 %19, %20
%22 = sub nsw i32 %21, 1
store i32 %22, i32* %3
br label %27
23: ; preds = %13, %2
%24 = load i32, i32* %4
%25 = load i32, i32* %5
%26 = sdiv i32 %24, %25
store i32 %26, i32* %3
br label %27
27: ; preds = %23, %18
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @Arith_div(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = icmp sgt i32 %3, -1
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = srem i32 %0, %1
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %5
%9 = sdiv i32 %0, %1
%10 = add nsw i32 %9, -1
br label %13
11: ; preds = %5, %2
%12 = sdiv i32 %0, %1
br label %13
13: ; preds = %11, %8
%14 = phi i32 [ %10, %8 ], [ %12, %11 ]
ret i32 %14
}
__attribute__((no)) void inner(void) {
  __asm__ __volatile__("movq $0x101, %%rax\n"
                       "movq $0x102, %%rbx\n"
                       "movq $0x103, %%rcx\n"
                       "movq $0x104, %%rdx\n"
                       "movq $0x105, %%rsi\n"
                       "movq $0x106, %%rdi\n"
                       "movq $0x107, %%r8\n"
                       "movq $0x108, %%r9\n"
                       "movq $0x109, %%r10\n"
                       "movq $0x10a, %%r11\n"
                       "movq $0x10b, %%r12\n"
                       "movq $0x10c, %%r13\n"
                       "movq $0x10d, %%r14\n"
                       "movq $0x10e, %%r15\n"
                       "movq $0x10f, %%rsp\n"
                       "movq $0x1234, (%%rax)\n"
                       "ud2"
                       :
                       :
                       : "memory", "%rax", "%rbx", "%rcx", "%rdx", "%rsi",
                         "%rdi", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13",
                         "%r14", "%r15");
}


x86 assembly (clang, -O0):
<inner>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    $0x101,%rax
mov    $0x102,%rbx
mov    $0x103,%rcx
mov    $0x104,%rdx
mov    $0x105,%rsi
mov    $0x106,%rdi
mov    $0x107,%r8
mov    $0x108,%r9
mov    $0x109,%r10
mov    $0x10a,%r11
mov    $0x10b,%r12
mov    $0x10c,%r13
mov    $0x10d,%r14
mov    $0x10e,%r15
mov    $0x10f,%rsp
movq   $0x1234,(%rax)
ud2
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

x86 assembly (clang, -O2):
<inner>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    $0x101,%rax
mov    $0x102,%rbx
mov    $0x103,%rcx
mov    $0x104,%rdx
mov    $0x105,%rsi
mov    $0x106,%rdi
mov    $0x107,%r8
mov    $0x108,%r9
mov    $0x109,%r10
mov    $0x10a,%r11
mov    $0x10b,%r12
mov    $0x10c,%r13
mov    $0x10d,%r14
mov    $0x10e,%r15
mov    $0x10f,%rsp
movq   $0x1234,(%rax)
ud2
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @inner() {
ret void
}

LLVM IR (-O2):
define void @inner() {
tail call void asm sideeffect "movq $$0x101, %rax\0Amovq $$0x102, %rbx\0Amovq $$0x103, %rcx\0Amovq $$0x104, %rdx\0Amovq $$0x105, %rsi\0Amovq $$0x106, %rdi\0Amovq $$0x107, %r8\0Amovq $$0x108, %r9\0Amovq $$0x109, %r10\0Amovq $$0x10a, %r11\0Amovq $$0x10b, %r12\0Amovq $$0x10c, %r13\0Amovq $$0x10d, %r14\0Amovq $$0x10e, %r15\0Amovq $$0x10f, %rsp\0Amovq $$0x1234, (%rax)\0Aud2", "~{memory},~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"()
ret void
}
int drm_debugfs_create_files(const struct drm_info_list *files, int count,
                             struct dentry *root, struct drm_minor *minor) {
  return 0;
}


x86 assembly (clang, -O0):
<drm_debugfs_create_files>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_debugfs_create_files>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.drm_info_list = type opaque
%struct.dentry = type opaque
%struct.drm_minor = type opaque
define i32 @drm_debugfs_create_files(%struct.drm_info_list* %0, i32 %1, %struct.dentry* %2, %struct.drm_minor* %3) {
%5 = alloca %struct.drm_info_list*
%6 = alloca i32
%7 = alloca %struct.dentry*
%8 = alloca %struct.drm_minor*
store %struct.drm_info_list* %0, %struct.drm_info_list** %5
store i32 %1, i32* %6
store %struct.dentry* %2, %struct.dentry** %7
store %struct.drm_minor* %3, %struct.drm_minor** %8
ret i32 0
}

LLVM IR (-O2):
%struct.drm_info_list = type opaque
%struct.dentry = type opaque
%struct.drm_minor = type opaque
define i32 @drm_debugfs_create_files(%struct.drm_info_list* nocapture readnone %0, i32 %1, %struct.dentry* nocapture readnone %2, %struct.drm_minor* nocapture readnone %3) {
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_write_next_solution(int *k, int n, int m, double *sol) {
  int b[2], fail;
  b[0] = n;
  b[1] = m;
  fail = _ada_use_c2phc4c(136, k, b, sol, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_write_next_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x88,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_write_next_solution>:
push   %rax
mov    %rdi,%rax
mov    %esi,(%rsp)
mov    %edx,0x4(%rsp)
mov    %rsp,%rdx
mov    $0x88,%edi
mov    %rax,%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_write_next_solution(i32* %0, i32 %1, i32 %2, double* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca double*
%9 = alloca [2 x i32]
%10 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store double* %3, double** %8
%11 = load i32, i32* %6
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %11, i32* %12
%13 = load i32, i32* %7
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %13, i32* %14
%15 = load i32*, i32** %5
%16 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%17 = load double*, double** %8
%18 = call i32 @_ada_use_c2phc4c(i32 136, i32* %15, i32* %16, double* %17, i32 0)
store i32 %18, i32* %10
%19 = load i32, i32* %10
ret i32 %19
}

LLVM IR (-O2):
define i32 @solcon_write_next_solution(i32* %0, i32 %1, i32 %2, double* %3) {
%5 = alloca [2 x i32]
%6 = bitcast [2 x i32]* %5 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 0
store i32 %1, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 1
store i32 %2, i32* %8
%9 = call i32 @_ada_use_c2phc4c(i32 136, i32* %0, i32* %7, double* %3, i32 0)
ret i32 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int, int);
void i830_debug_xyminus1(char *result, int len, int reg, uint32_t val,
                         uint32_t devid) {
  snprintf(result, len, "%d, %d", (val & 0xffff) + 1,
           ((val & 0xffff0000) >> 16) + 1);
}


x86 assembly (clang, -O0):
<i830_debug_xyminus1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%ecx
and    $0xffff,%ecx
add    $0x1,%ecx
mov    -0x14(%rbp),%r8d
and    $0xffff0000,%r8d
shr    $0x10,%r8d
add    $0x1,%r8d
lea    0xeaa(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i830_debug_xyminus1>:
movzwl %cx,%eax
add    $0x1,%eax
shr    $0x10,%ecx
lea    0x1(%rcx),%r8d
lea    0xedc(%rip),%rdx
mov    %eax,%ecx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%d, %d\00"
define void @i830_debug_xyminus1(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %9
%14 = and i32 %13, 65535
%15 = add nsw i32 %14, 1
%16 = load i32, i32* %9
%17 = and i32 %16, -65536
%18 = lshr i32 %17, 16
%19 = add i32 %18, 1
%20 = call i32 @snprintf(i8* %11, i32 %12, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %15, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d, %d\00"
define void @i830_debug_xyminus1(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = and i32 %3, 65535
%7 = add nuw nsw i32 %6, 1
%8 = lshr i32 %3, 16
%9 = add nuw nsw i32 %8, 1
%10 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %9)
ret void
}
void *vlib_stats_push_heap(void *unused) { return 0; }


x86 assembly (clang, -O0):
<vlib_stats_push_heap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlib_stats_push_heap>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @vlib_stats_push_heap(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @vlib_stats_push_heap(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ memset(float *, int, int);
void finn_vec3_one(float *vec) { memset(vec, 1, sizeof(float) * 3); }


x86 assembly (clang, -O0):
<finn_vec3_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
mov    $0xc,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<finn_vec3_one>:
mov    $0x1,%esi
mov    $0xc,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @finn_vec3_one(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @memset(float* %3, i32 1, i32 12)
ret void
}

LLVM IR (-O2):
define void @finn_vec3_one(float* %0) {
%2 = tail call i32 @memset(float* %0, i32 1, i32 12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_241() {
  Assert_real((isqrt(241) == 15),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1210, ("Integer square root of 241 should be 15"));
}


x86 assembly (clang, -O0):
<t_sqrt_241>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf1,%edi
call   1030 <isqrt@plt>
cmp    $0xf,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x4ba,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_241>:
push   %rax
mov    $0xf1,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xf,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x4ba,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 241 should be 15\00"
define void @t_sqrt_241() {
%1 = call i32 @isqrt(i32 241)
%2 = icmp eq i32 %1, 15
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 241 should be 15\00"
define void @t_sqrt_241() {
%1 = tail call i32 @isqrt(i32 241)
%2 = icmp eq i32 %1, 15
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int do_475() { return 475; }


x86 assembly (clang, -O0):
<do_475>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1db,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_475>:
mov    $0x1db,%eax
ret

LLVM IR (-O0):
define i32 @do_475() {
ret i32 475
}

LLVM IR (-O2):
define i32 @do_475() {
ret i32 475
}
void PRCMSRAMRetentionDisable(unsigned long ulSramColSel,
                              unsigned long ulFlags) {
  if (ulFlags & 0x00000002) {
    (*((volatile unsigned long *)(0x4402D000 + 0x0000001C))) &=
        ~(ulSramColSel & 0xF);
  }
}


x86 assembly (clang, -O0):
<PRCMSRAMRetentionDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     113d <PRCMSRAMRetentionDisable+0x3d>
mov    -0x8(%rbp),%rax
and    $0xf,%rax
xor    $0xffffffffffffffff,%rax
mov    $0x4402d01c,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x4402d01c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMSRAMRetentionDisable>:
test   $0x2,%sil
je     1114 <PRCMSRAMRetentionDisable+0x14>
not    %edi
or     $0xfffffffffffffff0,%rdi
and    %rdi,0x4402d01c
44
ret

LLVM IR (-O0):
define void @PRCMSRAMRetentionDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 2
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i64, i64* %3
%10 = and i64 %9, 15
%11 = xor i64 %10, -1
%12 = load volatile i64, i64* inttoptr (i64 1141035036 to i64*)
%13 = and i64 %12, %11
store volatile i64 %13, i64* inttoptr (i64 1141035036 to i64*)
br label %14
14: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
define void @PRCMSRAMRetentionDisable(i64 %0, i64 %1) {
%3 = and i64 %1, 2
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = and i64 %0, 15
%7 = xor i64 %6, -1
%8 = load volatile i64, i64* inttoptr (i64 1141035036 to i64*)
%9 = and i64 %8, %7
store volatile i64 %9, i64* inttoptr (i64 1141035036 to i64*)
br label %10
10: ; preds = %5, %2
ret void
}
void at91sam926x_lowlevel_init(struct at91sam926x_lowlevel_cfg *cfg) {}


x86 assembly (clang, -O0):
<at91sam926x_lowlevel_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<at91sam926x_lowlevel_init>:
ret

LLVM IR (-O0):
%struct.at91sam926x_lowlevel_cfg = type opaque
define void @at91sam926x_lowlevel_init(%struct.at91sam926x_lowlevel_cfg* %0) {
%2 = alloca %struct.at91sam926x_lowlevel_cfg*
store %struct.at91sam926x_lowlevel_cfg* %0, %struct.at91sam926x_lowlevel_cfg** %2
ret void
}

LLVM IR (-O2):
%struct.at91sam926x_lowlevel_cfg = type opaque
define void @at91sam926x_lowlevel_init(%struct.at91sam926x_lowlevel_cfg* nocapture %0) {
ret void
}