xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ITEM;

/* Variables and functions */
int /*<<< orphan*/ ossl_asn1_item_embed_free(int /*<<< orphan*/ **,
                                             int /*<<< orphan*/ const *,
                                             int /*<<< orphan*/);
void ASN1_item_ex_free(ASN1_VALUE **pval, const ASN1_ITEM *it) {
  ossl_asn1_item_embed_free(pval, it, 0);
}


x86 assembly (clang, -O0):
<ASN1_item_ex_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <ossl_asn1_item_embed_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_item_ex_free>:
xor    %edx,%edx
jmp    1030 <ossl_asn1_item_embed_free@plt>

LLVM IR (-O0):
define void @ASN1_item_ex_free(i32** %0, i32* %1) {
%3 = alloca i32**
%4 = alloca i32*
store i32** %0, i32*** %3
store i32* %1, i32** %4
%5 = load i32**, i32*** %3
%6 = load i32*, i32** %4
%7 = call i32 @ossl_asn1_item_embed_free(i32** %5, i32* %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @ASN1_item_ex_free(i32** %0, i32* %1) {
%3 = tail call i32 @ossl_asn1_item_embed_free(i32** %0, i32* %1, i32 0)
ret void
}
/* Variables and functions */
double lua_check_number(int, char *);
int /*<<< orphan*/ lua_pushnumber(double);
void math_abs(void) {
  double d = lua_check_number(1, "abs");
  if (d < 0)
    d = -d;
  lua_pushnumber(d);
}


x86 assembly (clang, -O0):
<math_abs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
lea    0xecc(%rip),%rsi
call   1030 <lua_check_number@plt>
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    116d <math_abs+0x4d>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <lua_pushnumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_abs>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x1,%edi
call   1030 <lua_check_number@plt>
movapd 0xec6(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm3,%xmm3
movapd %xmm0,%xmm1
cmpltsd %xmm3,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
pop    %rax
jmp    1040 <lua_pushnumber@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"abs\00"
define void @math_abs() {
%1 = alloca double
%2 = call double @lua_check_number(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store double %2, double* %1
%3 = load double, double* %1
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load double, double* %1
%7 = fneg double %6
store double %7, double* %1
br label %8
8: ; preds = %5, %0
%9 = load double, double* %1
%10 = call i32 @lua_pushnumber(double %9)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"abs\00"
define void @math_abs() {
%1 = tail call double @lua_check_number(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = fcmp olt double %1, 0.000000e+00
%3 = fneg double %1
%4 = select i1 %2, double %3, double %1
%5 = tail call i32 @lua_pushnumber(double %4)
ret void
}
const char *mz_version(void) { return "9.1.12"; }


x86 assembly (clang, -O0):
<mz_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mz_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"9.1.12\00"
define i8* @mz_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"9.1.12\00"
define i8* @mz_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct wl_resource {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_resource_post_event(struct wl_resource *,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/);
void wl_callback_send_done(struct wl_resource *resource_,
                           uint32_t callback_data) {
  wl_resource_post_event(resource_, 0, callback_data);
}


x86 assembly (clang, -O0):
<wl_callback_send_done>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <wl_resource_post_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_callback_send_done>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <wl_resource_post_event@plt>

LLVM IR (-O0):
%struct.wl_resource = type { i32 }
define void @wl_callback_send_done(%struct.wl_resource* %0, i32 %1) {
%3 = alloca %struct.wl_resource*
%4 = alloca i32
store %struct.wl_resource* %0, %struct.wl_resource** %3
store i32 %1, i32* %4
%5 = load %struct.wl_resource*, %struct.wl_resource** %3
%6 = load i32, i32* %4
%7 = call i32 @wl_resource_post_event(%struct.wl_resource* %5, i32 0, i32 %6)
ret void
}

LLVM IR (-O2):
%struct.wl_resource = type { i32 }
define void @wl_callback_send_done(%struct.wl_resource* %0, i32 %1) {
%3 = tail call i32 @wl_resource_post_event(%struct.wl_resource* %0, i32 0, i32 %1)
ret void
}
char c_ascii_toupper(char c) {
  return c >= 'a' && c <= 'z' ? c + ('A' - 'a') : c;
}


x86 assembly (clang, -O0):
<c_ascii_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1133 <c_ascii_toupper+0x33>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     1133 <c_ascii_toupper+0x33>
movsbl -0x1(%rbp),%eax
add    $0xffffffe0,%eax
mov    %eax,-0x8(%rbp)
jmp    113a <c_ascii_toupper+0x3a>
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_ascii_toupper>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @c_ascii_toupper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = add nsw i32 %12, -32
br label %17
14: ; preds = %6, %1
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
br label %17
17: ; preds = %14, %10
%18 = phi i32 [ %13, %10 ], [ %16, %14 ]
%19 = trunc i32 %18 to i8
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @c_ascii_toupper(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
void UI_method_set_reader(void) {}


x86 assembly (clang, -O0):
<UI_method_set_reader>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_method_set_reader>:
ret

LLVM IR (-O0):
define void @UI_method_set_reader() {
ret void
}

LLVM IR (-O2):
define void @UI_method_set_reader() {
ret void
}
int divTwoPower(int n, int m) { return n >> m; }


x86 assembly (clang, -O0):
<divTwoPower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divTwoPower>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @divTwoPower(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @divTwoPower(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void die(const char *name) {
  printf("die: %s\n", name);
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"die: %s\0A\00"
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [9 x i8] c"die: %s\0A\00"
define void @die(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
char *get_buf() {
  static int num = 0;
  static char buf[10][1024];
  return buf[num = (num + 1) % 10];
}


x86 assembly (clang, -O0):
<get_buf>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f26(%rip),%eax
add    $0x1,%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,0x2f15(%rip)
movslq %edx,%rcx
lea    0x2f1b(%rip),%rax
shl    $0xa,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_buf>:
mov    0x2f2a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
imul   $0x66666667,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
add    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2efc(%rip)
shl    $0xa,%rcx
lea    0x2f01(%rip),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
@get_buf.num = internal global i32 0
@get_buf.buf = internal global [10 x [1024 x i8]] zeroinitializer
define i8* @get_buf() {
%1 = load i32, i32* @get_buf.num
%2 = add nsw i32 %1, 1
%3 = srem i32 %2, 10
store i32 %3, i32* @get_buf.num
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [10 x [1024 x i8]], [10 x [1024 x i8]]* @get_buf.buf, i64 0, i64 %4
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
ret i8* %6
}

LLVM IR (-O2):
@get_buf.num = internal unnamed_addr global i32 0
@get_buf.buf = internal global [10 x [1024 x i8]] zeroinitializer
define i8* @get_buf() {
%1 = load i32, i32* @get_buf.num
%2 = add nsw i32 %1, 1
%3 = srem i32 %2, 10
store i32 %3, i32* @get_buf.num
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds [10 x [1024 x i8]], [10 x [1024 x i8]]* @get_buf.buf, i64 0, i64 %4, i64 0
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int fifo(int8_t **page_table, int num_pages, int prev_page, int fifo_frm,
         int num_frames, int clock) {
  return -1;
}


x86 assembly (clang, -O0):
<fifo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifo>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fifo(i32** %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32**
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32** %0, i32*** %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
ret i32 -1
}

LLVM IR (-O2):
define i32 @fifo(i32** nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
ret i32 -1
}
double f3(int i, float f, double d) { return i + f + d; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
cvtsi2ss %edi,%xmm2
addss  %xmm0,%xmm2
xorps  %xmm0,%xmm0
cvtss2sd %xmm2,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f3(i32 %0, float %1, double %2) {
%4 = alloca i32
%5 = alloca float
%6 = alloca double
store i32 %0, i32* %4
store float %1, float* %5
store double %2, double* %6
%7 = load i32, i32* %4
%8 = sitofp i32 %7 to float
%9 = load float, float* %5
%10 = fadd float %8, %9
%11 = fpext float %10 to double
%12 = load double, double* %6
%13 = fadd double %11, %12
ret double %13
}

LLVM IR (-O2):
define double @f3(i32 %0, float %1, double %2) {
%4 = sitofp i32 %0 to float
%5 = fadd float %4, %1
%6 = fpext float %5 to double
%7 = fadd double %6, %2
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ my_round_robin_switch_context();
void my_round_robin_Q_end(int pSenal) { my_round_robin_switch_context(); }


x86 assembly (clang, -O0):
<my_round_robin_Q_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <my_round_robin_switch_context@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_round_robin_Q_end>:
xor    %eax,%eax
jmp    1030 <my_round_robin_switch_context@plt>

LLVM IR (-O0):
define void @my_round_robin_Q_end(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @my_round_robin_switch_context()
ret void
}

LLVM IR (-O2):
define void @my_round_robin_Q_end(i32 %0) {
%2 = tail call i32 (...) @my_round_robin_switch_context()
ret void
}
int nisserver_add(const char *ifname, const int ifindex,
                  const char *addrPlain) {
  return 0;
}


x86 assembly (clang, -O0):
<nisserver_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nisserver_add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nisserver_add(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @nisserver_add(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
ret i32 0
}
int cuddComputeFloorLog2(unsigned int value) {
  int floorLog = 0;
  while (value > 1) {
    floorLog++;
    value >>= 1;
  }
  return (floorLog);
}


x86 assembly (clang, -O0):
<cuddComputeFloorLog2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jbe    112f <cuddComputeFloorLog2+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <cuddComputeFloorLog2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cuddComputeFloorLog2>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <cuddComputeFloorLog2+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
shr    %ecx
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <cuddComputeFloorLog2+0x10>
ret

LLVM IR (-O0):
define i32 @cuddComputeFloorLog2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = lshr i32 %10, 1
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @cuddComputeFloorLog2(i32 %0) {
%2 = icmp ugt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = lshr i32 %5, 1
%8 = icmp ugt i32 %5, 3
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %10
}
unsigned int adreno_ringbuffer_dec_wrapped(unsigned int val,
                                           unsigned int size) {
  return (val + size - sizeof(unsigned int)) % size;
}


x86 assembly (clang, -O0):
<adreno_ringbuffer_dec_wrapped>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,%eax
sub    $0x4,%rax
mov    -0x8(%rbp),%ecx
xor    %edx,%edx
div    %rcx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adreno_ringbuffer_dec_wrapped>:
mov    %edi,%eax
add    %esi,%eax
add    $0xfffffffffffffffc,%rax
mov    %esi,%ecx
mov    %rax,%rdx
shr    $0x20,%rdx
je     111c <adreno_ringbuffer_dec_wrapped+0x1c>
xor    %edx,%edx
div    %rcx
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @adreno_ringbuffer_dec_wrapped(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add i32 %5, %6
%8 = zext i32 %7 to i64
%9 = sub i64 %8, 4
%10 = load i32, i32* %4
%11 = zext i32 %10 to i64
%12 = urem i64 %9, %11
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @adreno_ringbuffer_dec_wrapped(i32 %0, i32 %1) {
%3 = add i32 %1, %0
%4 = zext i32 %3 to i64
%5 = add nsw i64 %4, -4
%6 = zext i32 %1 to i64
%7 = urem i64 %5, %6
%8 = trunc i64 %7 to i32
ret i32 %8
}
unsigned char Get7Bits(unsigned char *in, int start) {
  unsigned int word;
  word = in[start / 8] << 8;
  word |= in[start / 8 + 1];
  word >>= 15 - (start % 8 + 7);
  return word & 0xFE;
}


x86 assembly (clang, -O0):
<Get7Bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%eax
shl    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
add    $0x1,%ecx
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
add    $0x7,%edx
mov    $0xf,%ecx
sub    %edx,%ecx
mov    -0x10(%rbp),%eax
shr    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0xfe,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Get7Bits>:
lea    0x7(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
mov    %ecx,%eax
sar    $0x3,%eax
cltq
movzwl (%rdi,%rax,1),%eax
shl    $0x10,%eax
bswap  %eax
and    $0xfffffff8,%ecx
sub    %ecx,%esi
mov    $0x8,%cl
sub    %sil,%cl
shr    %cl,%eax
and    $0xfe,%al
ret

LLVM IR (-O0):
define zeroext i8 @Get7Bits(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sdiv i32 %7, 8
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
store i32 %13, i32* %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sdiv i32 %15, 8
%17 = add nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %14, i64 %18
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i32, i32* %5
%23 = or i32 %22, %21
store i32 %23, i32* %5
%24 = load i32, i32* %4
%25 = srem i32 %24, 8
%26 = add nsw i32 %25, 7
%27 = sub nsw i32 15, %26
%28 = load i32, i32* %5
%29 = lshr i32 %28, %27
store i32 %29, i32* %5
%30 = load i32, i32* %5
%31 = and i32 %30, 254
%32 = trunc i32 %31 to i8
ret i8 %32
}

LLVM IR (-O2):
define zeroext i8 @Get7Bits(i8* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 8
%9 = add nsw i32 %3, 1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = or i32 %8, %13
%15 = srem i32 %1, 8
%16 = sub nsw i32 8, %15
%17 = lshr i32 %14, %16
%18 = trunc i32 %17 to i8
%19 = and i8 %18, -2
ret i8 %19
}
unsigned long SysCtlSRAMSizeGet(void) {
  return ((((*((volatile unsigned long *)(0x400FE008))) & 0xFFFF0000) >> 8) +
          0x100);
}


x86 assembly (clang, -O0):
<SysCtlSRAMSizeGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fe008,%eax
mov    (%rax),%rax
movabs $0xffff0000,%rcx
and    %rcx,%rax
shr    $0x8,%rax
add    $0x100,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlSRAMSizeGet>:
mov    0x400fe008,%rax
40
shr    $0x8,%rax
and    $0xffff00,%eax
add    $0x100,%rax
ret

LLVM IR (-O0):
define i64 @SysCtlSRAMSizeGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074782216 to i64*)
%2 = and i64 %1, 4294901760
%3 = lshr i64 %2, 8
%4 = add i64 %3, 256
ret i64 %4
}

LLVM IR (-O2):
define i64 @SysCtlSRAMSizeGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074782216 to i64*)
%2 = lshr i64 %1, 8
%3 = and i64 %2, 16776960
%4 = add nuw nsw i64 %3, 256
ret i64 %4
}
/* Variables and functions */
int strtol(char const *, char **, int);
int parse_int_or_char(const char *str) {
  char *endptr;
  int result = strtol(str, &endptr, 10);
  if (str == endptr)
    return *str;
  else
    return result;
}


x86 assembly (clang, -O0):
<parse_int_or_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    114e <parse_int_or_char+0x3e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <parse_int_or_char+0x44>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_int_or_char>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
cmp    %rbx,0x8(%rsp)
jne    1131 <parse_int_or_char+0x21>
movsbl (%rbx),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @parse_int_or_char(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strtol(i8* %6, i8** %4, i32 10)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = icmp eq i8* %8, %9
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
store i32 %14, i32* %2
br label %17
15: ; preds = %1
%16 = load i32, i32* %5
store i32 %16, i32* %2
br label %17
17: ; preds = %15, %11
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @parse_int_or_char(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = call i32 @strtol(i8* %0, i8** %2, i32 10)
%5 = load i8*, i8** %2
%6 = icmp eq i8* %5, %0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8, i8* %0
%9 = sext i8 %8 to i32
br label %10
10: ; preds = %1, %7
%11 = phi i32 [ %9, %7 ], [ %4, %1 ]
ret i32 %11
}
/* Variables and functions */
int cr4_get_overflow_flag_status();
__attribute__((always_)) int cr4_is_cycle_counter_overflowed(void) {
  return (cr4_get_overflow_flag_status() & 0x80000000) ? 1 : 0;
}


x86 assembly (clang, -O0):
<cr4_is_cycle_counter_overflowed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cr4_get_overflow_flag_status@plt>
mov    %eax,%edx
and    $0x80000000,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cr4_is_cycle_counter_overflowed>:
push   %rax
xor    %eax,%eax
call   1030 <cr4_get_overflow_flag_status@plt>
shr    $0x1f,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cr4_is_cycle_counter_overflowed() {
%1 = call i32 (...) @cr4_get_overflow_flag_status()
%2 = and i32 %1, -2147483648
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 1, i32 0
ret i32 %5
}

LLVM IR (-O2):
define i32 @cr4_is_cycle_counter_overflowed() {
%1 = tail call i32 (...) @cr4_get_overflow_flag_status()
%2 = lshr i32 %1, 31
ret i32 %2
}
/* Variables and functions */
int exp(int);
double gumbel(double x, double mi, double beta) {
  double z = (x - mi) / beta;
  return (1 / beta) * exp(-1 * (z + exp(-z)));
}


x86 assembly (clang, -O0):
<gumbel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
divsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xec5(%rip),%xmm0
divsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x20(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
movsd  -0x30(%rbp),%xmm1
cvtsi2sd %eax,%xmm0
addsd  %xmm0,%xmm1
movsd  0xe6f(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
movsd  -0x28(%rbp),%xmm0
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gumbel>:
sub    $0x28,%rsp
subsd  %xmm1,%xmm0
divsd  %xmm2,%xmm0
movapd %xmm0,0x10(%rsp)
movsd  0xed6(%rip),%xmm1
divsd  %xmm2,%xmm1
movsd  %xmm1,0x8(%rsp)
movapd %xmm0,%xmm1
xorpd  0xed0(%rip),%xmm1
cvttsd2si %xmm1,%edi
call   1030 <exp@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
addsd  0x10(%rsp),%xmm0
xorpd  0xeb2(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mulsd  0x8(%rsp),%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @gumbel(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
%9 = load double, double* %5
%10 = fsub double %8, %9
%11 = load double, double* %6
%12 = fdiv double %10, %11
store double %12, double* %7
%13 = load double, double* %6
%14 = fdiv double 1.000000e+00, %13
%15 = load double, double* %7
%16 = load double, double* %7
%17 = fneg double %16
%18 = fptosi double %17 to i32
%19 = call i32 @exp(i32 %18)
%20 = sitofp i32 %19 to double
%21 = fadd double %15, %20
%22 = fmul double -1.000000e+00, %21
%23 = fptosi double %22 to i32
%24 = call i32 @exp(i32 %23)
%25 = sitofp i32 %24 to double
%26 = fmul double %14, %25
ret double %26
}

LLVM IR (-O2):
define double @gumbel(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = fdiv double %4, %2
%6 = fdiv double 1.000000e+00, %2
%7 = fneg double %5
%8 = fptosi double %7 to i32
%9 = tail call i32 @exp(i32 %8)
%10 = sitofp i32 %9 to double
%11 = fadd double %5, %10
%12 = fneg double %11
%13 = fptosi double %12 to i32
%14 = tail call i32 @exp(i32 %13)
%15 = sitofp i32 %14 to double
%16 = fmul double %6, %15
ret double %16
}
/* Variables and functions */
int /*<<< orphan*/ say_hello();
int main(int argc, char **argv) { say_hello(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <say_hello@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <say_hello@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @say_hello()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @say_hello()
ret i32 0
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ INIT_LIST_HEAD(struct list_head *);
int /*<<< orphan*/ list_replace(struct list_head *, struct list_head *);
void list_replace_init(struct list_head *old, struct list_head *new_one) {
  list_replace(old, new_one);
  INIT_LIST_HEAD(old);
}


x86 assembly (clang, -O0):
<list_replace_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <list_replace@plt>
mov    -0x8(%rbp),%rdi
call   1030 <INIT_LIST_HEAD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_replace_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <list_replace@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <INIT_LIST_HEAD@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_replace_init(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %3
%6 = load %struct.list_head*, %struct.list_head** %4
%7 = call i32 @list_replace(%struct.list_head* %5, %struct.list_head* %6)
%8 = load %struct.list_head*, %struct.list_head** %3
%9 = call i32 @INIT_LIST_HEAD(%struct.list_head* %8)
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_replace_init(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i32 @list_replace(%struct.list_head* %0, %struct.list_head* %1)
%4 = tail call i32 @INIT_LIST_HEAD(%struct.list_head* %0)
ret void
}
int foo(int a, int b) { return (a & !a) | (b & !b); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmpl   $0x0,-0x4(%rbp)
setne  %cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
cmpl   $0x0,-0x8(%rbp)
setne  %dl
xor    $0xff,%dl
and    $0x1,%dl
movzbl %dl,%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %ecx,%ecx
test   %edi,%edi
sete   %cl
and    %edi,%ecx
xor    %eax,%eax
test   %esi,%esi
sete   %al
and    %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = and i32 %5, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = and i32 %11, %15
%17 = or i32 %10, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = zext i1 %3 to i32
%5 = and i32 %4, %0
%6 = icmp eq i32 %1, 0
%7 = zext i1 %6 to i32
%8 = and i32 %7, %1
%9 = or i32 %8, %5
ret i32 %9
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int dll_fstat(int, struct stat *);
int __wrap___fxstat(int ver, int fd, struct stat *buf) {
  return dll_fstat(fd, buf);
}


x86 assembly (clang, -O0):
<__wrap___fxstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <dll_fstat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap___fxstat>:
mov    %esi,%edi
mov    %rdx,%rsi
jmp    1030 <dll_fstat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @__wrap___fxstat(i32 %0, i32 %1, %struct.stat* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.stat*
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.stat* %2, %struct.stat** %6
%7 = load i32, i32* %5
%8 = load %struct.stat*, %struct.stat** %6
%9 = call i32 @dll_fstat(i32 %7, %struct.stat* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @__wrap___fxstat(i32 %0, i32 %1, %struct.stat* %2) {
%4 = tail call i32 @dll_fstat(i32 %1, %struct.stat* %2)
ret i32 %4
}
int test_imm_15int64_lowword_reg(long long val) {
  return ((val) & (0x15 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_15int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x15,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_15int64_lowword_reg>:
test   $0x15,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_15int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 21
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_15int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 21
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int ret_1(void) { return 1; }


x86 assembly (clang, -O0):
<ret_1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ret_1>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ret_1() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ret_1() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Free_All_Buffers();
void _il_Rotate_Image_End() { Free_All_Buffers(); }


x86 assembly (clang, -O0):
<_il_Rotate_Image_End>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Free_All_Buffers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_il_Rotate_Image_End>:
xor    %eax,%eax
jmp    1030 <Free_All_Buffers@plt>

LLVM IR (-O0):
define void @_il_Rotate_Image_End() {
%1 = call i32 (...) @Free_All_Buffers()
ret void
}

LLVM IR (-O2):
define void @_il_Rotate_Image_End() {
%1 = tail call i32 (...) @Free_All_Buffers()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/, char, int /*<<< orphan*/);
void cfbf_print_version(void) {
  printf("CFBF Brainfuck Interpreter Version: %c.%c.%c\n", '0', '1', '0');
}


x86 assembly (clang, -O0):
<cfbf_print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x30,%ecx
mov    $0x31,%edx
mov    %ecx,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfbf_print_version>:
lea    0xee9(%rip),%rdi
mov    $0x30,%esi
mov    $0x31,%edx
mov    $0x30,%ecx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"CFBF Brainfuck Interpreter Version: %c.%c.%c\0A\00"
define void @cfbf_print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 48, i8 signext 49, i32 48)
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"CFBF Brainfuck Interpreter Version: %c.%c.%c\0A\00"
define void @cfbf_print_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 48, i8 signext 49, i32 48)
ret void
}
void memcpy_1(char *source, char *target) {
  char *src = source;
  char *tgt = target;
  while (*src != '\0') {
    *tgt++ = *src++;
  }
}


x86 assembly (clang, -O0):
<memcpy_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1153 <memcpy_1+0x53>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
jmp    111c <memcpy_1+0x1c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_1>:
mov    (%rdi),%al
test   %al,%al
je     1120 <memcpy_1+0x20>
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
mov    %al,(%rsi,%rcx,1)
movzbl 0x1(%rdi,%rcx,1),%eax
add    $0x1,%rcx
test   %al,%al
jne    1110 <memcpy_1+0x10>
ret

LLVM IR (-O0):
define void @memcpy_1(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
br label %9
9: ; preds = %14, %2
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i8, i8* %15
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %6
store i8 %17, i8* %18
br label %9
20: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @memcpy_1(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret void
}
g1() {}


x86 assembly (clang, -O0):
<g1>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g1>:
ret

LLVM IR (-O0):
define i32 @g1() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @g1() {
ret i32 undef
}
void my_unlink(char *filename) {}


x86 assembly (clang, -O0):
<my_unlink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_unlink>:
ret

LLVM IR (-O0):
define void @my_unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @my_unlink(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int w5100_read_byte(int);
unsigned w5100_readRMSR() { return w5100_read_byte(0x001A); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x1a,%edi
call   1030 <w5100_read_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x1a,%edi
jmp    1030 <w5100_read_byte@plt>

LLVM IR (-O0):
define i32 @w5100_readRMSR() {
%1 = call i32 @w5100_read_byte(i32 26)
ret i32 %1
}

LLVM IR (-O2):
define i32 @w5100_readRMSR() {
%1 = tail call i32 @w5100_read_byte(i32 26)
ret i32 %1
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ FAIL(char *);
int /*<<< orphan*/ PASS(char *);
scalar_t__ ok();
int main() {
  if (ok())
    PASS("upward-dylib-init-order");
  else
    FAIL("upward-dylib-init-order");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ok@plt>
cmp    $0x0,%rax
je     1161 <main+0x31>
lea    0xea9(%rip),%rdi
call   1040 <PASS@plt>
jmp    116d <main+0x3d>
lea    0xe98(%rip),%rdi
call   1050 <FAIL@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <ok@plt>
lea    0xec1(%rip),%rdi
test   %rax,%rax
je     114b <main+0x1b>
call   1040 <PASS@plt>
jmp    1150 <main+0x20>
call   1050 <FAIL@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"upward-dylib-init-order\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @ok()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @PASS(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = call i32 @FAIL(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* @EXIT_SUCCESS
ret i32 %9
}

LLVM IR (-O2):
@.str = [24 x i8] c"upward-dylib-init-order\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i64 (...) @ok()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @PASS(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %0
%6 = tail call i32 @FAIL(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %3
%8 = load i32, i32* @EXIT_SUCCESS
ret i32 %8
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
int __asctoe64(char const *, unsigned short *);
long double strtold(const char *s, char **se) {
  int lenldstr;
  union {
    unsigned short int us[6];
    long double ld;
  } xx = {{0}};
  lenldstr = __asctoe64(s, xx.us);
  if (se)
    *se = (char *)s + lenldstr;
  return xx.ld;
}


x86 assembly (clang, -O0):
<strtold>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed9(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed6(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x30(%rbp),%rsi
call   1030 <__asctoe64@plt>
mov    %eax,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1163 <strtold+0x53>
mov    -0x8(%rbp),%rcx
movslq -0x14(%rbp),%rax
add    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
fldt   -0x30(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtold>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
xorps  %xmm0,%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
call   1030 <__asctoe64@plt>
test   %r14,%r14
je     1139 <strtold+0x29>
cltq
add    %rax,%rbx
mov    %rbx,(%r14)
fldt   (%rsp)
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%union.anon = type { x86_fp80 }
@__const.strtold.xx = { [6 x i16], [4 x i8] } { [6 x i16] zeroinitializer, [4 x i8] undef }
define x86_fp80 @strtold(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i32
%6 = alloca %union.anon
store i8* %0, i8** %3
store i8** %1, i8*** %4
%7 = bitcast %union.anon* %6 to i8*
%8 = load i8*, i8** %3
%9 = bitcast %union.anon* %6 to [6 x i16]*
%10 = getelementptr inbounds [6 x i16], [6 x i16]* %9, i64 0, i64 0
%11 = call i32 @__asctoe64(i8* %8, i16* %10)
store i32 %11, i32* %5
%12 = load i8**, i8*** %4
%13 = icmp ne i8** %12, null
br i1 %13, label %14, label %20
14: ; preds = %2
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8**, i8*** %4
store i8* %18, i8** %19
br label %20
20: ; preds = %14, %2
%21 = bitcast %union.anon* %6 to x86_fp80*
%22 = load x86_fp80, x86_fp80* %21
ret x86_fp80 %22
}

LLVM IR (-O2):
%union.anon = type { x86_fp80 }
define x86_fp80 @strtold(i8* %0, i8** writeonly %1) {
%3 = alloca %union.anon
%4 = bitcast %union.anon* %3 to i8*
%5 = bitcast %union.anon* %3 to i16*
%6 = call i32 @__asctoe64(i8* %0, i16* %5)
%7 = icmp eq i8** %1, null
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = sext i32 %6 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
store i8* %10, i8** %1
br label %11
11: ; preds = %8, %2
%12 = getelementptr inbounds %union.anon, %union.anon* %3, i64 0, i32 0
%13 = load x86_fp80, x86_fp80* %12
ret x86_fp80 %13
}
int tribus(int version, int a, int b, int c) {
  int RetVal;
  RetVal = c;
  if (version < 10) {
    RetVal = a;
  }
  if ((version >= 10) && (version <= 26)) {
    RetVal = b;
  }
  return RetVal;
}


x86 assembly (clang, -O0):
<tribus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1126 <tribus+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0xa,-0x4(%rbp)
jl     1140 <tribus+0x40>
cmpl   $0x1a,-0x4(%rbp)
jg     1140 <tribus+0x40>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tribus>:
mov    %esi,%eax
cmp    $0xa,%edi
cmovge %ecx,%eax
add    $0xfffffff6,%edi
cmp    $0x11,%edi
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define i32 @tribus(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %8
store i32 %10, i32* %9
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 10
br i1 %12, label %13, label %15
13: ; preds = %4
%14 = load i32, i32* %6
store i32 %14, i32* %9
br label %15
15: ; preds = %13, %4
%16 = load i32, i32* %5
%17 = icmp sge i32 %16, 10
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = load i32, i32* %5
%20 = icmp sle i32 %19, 26
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32, i32* %7
store i32 %22, i32* %9
br label %23
23: ; preds = %21, %18, %15
%24 = load i32, i32* %9
ret i32 %24
}

LLVM IR (-O2):
define i32 @tribus(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp slt i32 %0, 10
%6 = select i1 %5, i32 %1, i32 %3
%7 = add i32 %0, -10
%8 = icmp ult i32 %7, 17
%9 = select i1 %8, i32 %2, i32 %6
ret i32 %9
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int y;
};
typedef TYPE_1__ XWindowChanges;

/* Variables and functions */
void set_XWindowChanges_y(void *_p, int _v) {
  ((XWindowChanges *)_p)->y = (int)_v;
}


x86 assembly (clang, -O0):
<set_XWindowChanges_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XWindowChanges_y>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XWindowChanges_y(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XWindowChanges_y(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Type definitions */
typedef int __m128i;

/* Variables and functions */
__m128i Maj(__m128i b, __m128i c, __m128i d) {
  return (b & c) ^ (b & d) ^ (c & d);
}


x86 assembly (clang, -O0):
<Maj>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
and    -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Maj>:
mov    %edx,%eax
xor    %esi,%eax
and    %edi,%eax
and    %esi,%edx
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @Maj(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = and i32 %7, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %6
%12 = and i32 %10, %11
%13 = xor i32 %9, %12
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
%17 = xor i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @Maj(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %2, %1
%5 = and i32 %4, %0
%6 = and i32 %2, %1
%7 = xor i32 %5, %6
ret i32 %7
}
/* Type definitions */
struct virtual_item {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BUG();
int sd_check_left(struct virtual_item *vi, int free, int start_skip,
                  int end_skip) {
  if (start_skip || end_skip)
    BUG();
  return -1;
}


x86 assembly (clang, -O0):
<sd_check_left>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1139 <sd_check_left+0x29>
cmpl   $0x0,-0x14(%rbp)
je     1140 <sd_check_left+0x30>
mov    $0x0,%al
call   1030 <BUG@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_check_left>:
or     %ecx,%edx
je     1120 <sd_check_left+0x10>
push   %rax
xor    %eax,%eax
call   1030 <BUG@plt>
add    $0x8,%rsp
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.virtual_item = type { i32 }
define i32 @sd_check_left(%struct.virtual_item* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %struct.virtual_item*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.virtual_item* %0, %struct.virtual_item** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = icmp ne i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i32, i32* %8
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11, %4
%15 = call i32 (...) @BUG()
br label %16
16: ; preds = %14, %11
ret i32 -1
}

LLVM IR (-O2):
%struct.virtual_item = type { i32 }
define i32 @sd_check_left(%struct.virtual_item* nocapture readnone %0, i32 %1, i32 %2, i32 %3) {
%5 = or i32 %3, %2
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 (...) @BUG()
br label %9
9: ; preds = %4, %7
ret i32 -1
}