#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ Exit(char *, char, char);
int Are_Compatible(char *statea, char *stateb) {
  char a, b;
  a = statea[0];
  b = stateb[0];
  switch (a) {
  case 'A': {
    switch (b) {
    case 'A':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'R': {
    switch (b) {
    case 'R':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'N': {
    switch (b) {
    case 'N':
    case 'B':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'B': {
    switch (b) {
    case 'N':
    case 'B':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'D': {
    switch (b) {
    case 'D':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'C': {
    switch (b) {
    case 'C':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'Q': {
    switch (b) {
    case 'Q':
    case 'Z':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'Z': {
    switch (b) {
    case 'Q':
    case 'Z':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'E': {
    switch (b) {
    case 'E':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'G': {
    switch (b) {
    case 'G':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'H': {
    switch (b) {
    case 'H':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'I': {
    switch (b) {
    case 'I':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'L': {
    switch (b) {
    case 'L':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'K': {
    switch (b) {
    case 'K':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'M': {
    switch (b) {
    case 'M':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'F': {
    switch (b) {
    case 'F':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'P': {
    switch (b) {
    case 'P':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'S': {
    switch (b) {
    case 'S':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'T': {
    switch (b) {
    case 'T':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'W': {
    switch (b) {
    case 'W':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'Y': {
    switch (b) {
    case 'Y':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'V': {
    switch (b) {
    case 'V':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  case 'X': {
    switch (b) {
    case 'A':
    case 'R':
    case 'N':
    case 'B':
    case 'D':
    case 'C':
    case 'Q':
    case 'Z':
    case 'E':
    case 'G':
    case 'H':
    case 'I':
    case 'L':
    case 'K':
    case 'M':
    case 'F':
    case 'P':
    case 'S':
    case 'T':
    case 'W':
    case 'Y':
    case 'V':
    case 'X': {
      break;
    }
    default:
      return 0;
    }
    break;
  }
  default: {
    Exit((char *)"Please check that characters `%c` and `%c` correspond to "
                 "existing amino-acids.",
         a, b);
  }
  }
  return 1;
}


x86 assembly (clang, -O0):
<Are_Compatible>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x1a(%rbp)
movsbl -0x19(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x28(%rbp)
sub    $0x19,%eax
ja     16f1 <Are_Compatible+0x5e1>
mov    -0x28(%rbp),%rax
lea    0xeaa(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x2c(%rbp)
sub    $0x41,%eax
je     1185 <Are_Compatible+0x75>
jmp    1174 <Are_Compatible+0x64>
mov    -0x2c(%rbp),%eax
sub    $0x58,%eax
jne    118a <Are_Compatible+0x7a>
jmp    1185 <Are_Compatible+0x75>
jmp    1196 <Are_Compatible+0x86>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x30(%rbp)
sub    $0x52,%eax
je     11c1 <Are_Compatible+0xb1>
jmp    11b0 <Are_Compatible+0xa0>
mov    -0x30(%rbp),%eax
sub    $0x58,%eax
jne    11c6 <Are_Compatible+0xb6>
jmp    11c1 <Are_Compatible+0xb1>
jmp    11d2 <Are_Compatible+0xc2>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x34(%rbp)
sub    $0x42,%eax
je     120e <Are_Compatible+0xfe>
jmp    11ec <Are_Compatible+0xdc>
mov    -0x34(%rbp),%eax
sub    $0x4e,%eax
je     120e <Are_Compatible+0xfe>
jmp    11fd <Are_Compatible+0xed>
mov    -0x34(%rbp),%eax
sub    $0x58,%eax
jne    1213 <Are_Compatible+0x103>
jmp    120e <Are_Compatible+0xfe>
jmp    121f <Are_Compatible+0x10f>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x38(%rbp)
sub    $0x42,%eax
je     125b <Are_Compatible+0x14b>
jmp    1239 <Are_Compatible+0x129>
mov    -0x38(%rbp),%eax
sub    $0x4e,%eax
je     125b <Are_Compatible+0x14b>
jmp    124a <Are_Compatible+0x13a>
mov    -0x38(%rbp),%eax
sub    $0x58,%eax
jne    1260 <Are_Compatible+0x150>
jmp    125b <Are_Compatible+0x14b>
jmp    126c <Are_Compatible+0x15c>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x3c(%rbp)
sub    $0x44,%eax
je     1297 <Are_Compatible+0x187>
jmp    1286 <Are_Compatible+0x176>
mov    -0x3c(%rbp),%eax
sub    $0x58,%eax
jne    129c <Are_Compatible+0x18c>
jmp    1297 <Are_Compatible+0x187>
jmp    12a8 <Are_Compatible+0x198>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x40(%rbp)
sub    $0x43,%eax
je     12d3 <Are_Compatible+0x1c3>
jmp    12c2 <Are_Compatible+0x1b2>
mov    -0x40(%rbp),%eax
sub    $0x58,%eax
jne    12d8 <Are_Compatible+0x1c8>
jmp    12d3 <Are_Compatible+0x1c3>
jmp    12e4 <Are_Compatible+0x1d4>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x44(%rbp)
sub    $0x51,%eax
je     1320 <Are_Compatible+0x210>
jmp    12fe <Are_Compatible+0x1ee>
mov    -0x44(%rbp),%eax
sub    $0x58,%eax
je     1320 <Are_Compatible+0x210>
jmp    130f <Are_Compatible+0x1ff>
mov    -0x44(%rbp),%eax
sub    $0x5a,%eax
jne    1325 <Are_Compatible+0x215>
jmp    1320 <Are_Compatible+0x210>
jmp    1331 <Are_Compatible+0x221>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x48(%rbp)
sub    $0x51,%eax
je     136d <Are_Compatible+0x25d>
jmp    134b <Are_Compatible+0x23b>
mov    -0x48(%rbp),%eax
sub    $0x58,%eax
je     136d <Are_Compatible+0x25d>
jmp    135c <Are_Compatible+0x24c>
mov    -0x48(%rbp),%eax
sub    $0x5a,%eax
jne    1372 <Are_Compatible+0x262>
jmp    136d <Are_Compatible+0x25d>
jmp    137e <Are_Compatible+0x26e>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x4c(%rbp)
sub    $0x45,%eax
je     13a9 <Are_Compatible+0x299>
jmp    1398 <Are_Compatible+0x288>
mov    -0x4c(%rbp),%eax
sub    $0x58,%eax
jne    13ae <Are_Compatible+0x29e>
jmp    13a9 <Are_Compatible+0x299>
jmp    13ba <Are_Compatible+0x2aa>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x50(%rbp)
sub    $0x47,%eax
je     13e5 <Are_Compatible+0x2d5>
jmp    13d4 <Are_Compatible+0x2c4>
mov    -0x50(%rbp),%eax
sub    $0x58,%eax
jne    13ea <Are_Compatible+0x2da>
jmp    13e5 <Are_Compatible+0x2d5>
jmp    13f6 <Are_Compatible+0x2e6>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
or     $0x10,%eax
sub    $0x58,%eax
je     1410 <Are_Compatible+0x300>
jmp    1415 <Are_Compatible+0x305>
jmp    1421 <Are_Compatible+0x311>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x54(%rbp)
sub    $0x49,%eax
je     144c <Are_Compatible+0x33c>
jmp    143b <Are_Compatible+0x32b>
mov    -0x54(%rbp),%eax
sub    $0x58,%eax
jne    1451 <Are_Compatible+0x341>
jmp    144c <Are_Compatible+0x33c>
jmp    145d <Are_Compatible+0x34d>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x58(%rbp)
sub    $0x4c,%eax
je     1488 <Are_Compatible+0x378>
jmp    1477 <Are_Compatible+0x367>
mov    -0x58(%rbp),%eax
sub    $0x58,%eax
jne    148d <Are_Compatible+0x37d>
jmp    1488 <Are_Compatible+0x378>
jmp    1499 <Are_Compatible+0x389>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x5c(%rbp)
sub    $0x4b,%eax
je     14c4 <Are_Compatible+0x3b4>
jmp    14b3 <Are_Compatible+0x3a3>
mov    -0x5c(%rbp),%eax
sub    $0x58,%eax
jne    14c9 <Are_Compatible+0x3b9>
jmp    14c4 <Are_Compatible+0x3b4>
jmp    14d5 <Are_Compatible+0x3c5>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x60(%rbp)
sub    $0x4d,%eax
je     1500 <Are_Compatible+0x3f0>
jmp    14ef <Are_Compatible+0x3df>
mov    -0x60(%rbp),%eax
sub    $0x58,%eax
jne    1505 <Are_Compatible+0x3f5>
jmp    1500 <Are_Compatible+0x3f0>
jmp    1511 <Are_Compatible+0x401>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x64(%rbp)
sub    $0x46,%eax
je     153c <Are_Compatible+0x42c>
jmp    152b <Are_Compatible+0x41b>
mov    -0x64(%rbp),%eax
sub    $0x58,%eax
jne    1541 <Are_Compatible+0x431>
jmp    153c <Are_Compatible+0x42c>
jmp    154d <Are_Compatible+0x43d>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
or     $0x8,%eax
sub    $0x58,%eax
je     1567 <Are_Compatible+0x457>
jmp    156c <Are_Compatible+0x45c>
jmp    1578 <Are_Compatible+0x468>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x68(%rbp)
sub    $0x53,%eax
je     15a3 <Are_Compatible+0x493>
jmp    1592 <Are_Compatible+0x482>
mov    -0x68(%rbp),%eax
sub    $0x58,%eax
jne    15a8 <Are_Compatible+0x498>
jmp    15a3 <Are_Compatible+0x493>
jmp    15b4 <Are_Compatible+0x4a4>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x6c(%rbp)
sub    $0x54,%eax
je     15df <Are_Compatible+0x4cf>
jmp    15ce <Are_Compatible+0x4be>
mov    -0x6c(%rbp),%eax
sub    $0x58,%eax
jne    15e4 <Are_Compatible+0x4d4>
jmp    15df <Are_Compatible+0x4cf>
jmp    15f0 <Are_Compatible+0x4e0>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
add    $0xffffffa9,%eax
sub    $0x1,%eax
ja     160f <Are_Compatible+0x4ff>
jmp    160a <Are_Compatible+0x4fa>
jmp    161b <Are_Compatible+0x50b>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
add    $0xffffffa8,%eax
sub    $0x1,%eax
ja     163a <Are_Compatible+0x52a>
jmp    1635 <Are_Compatible+0x525>
jmp    1646 <Are_Compatible+0x536>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x70(%rbp)
sub    $0x56,%eax
je     1671 <Are_Compatible+0x561>
jmp    1660 <Are_Compatible+0x550>
mov    -0x70(%rbp),%eax
sub    $0x58,%eax
jne    1676 <Are_Compatible+0x566>
jmp    1671 <Are_Compatible+0x561>
jmp    1682 <Are_Compatible+0x572>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
movsbl -0x1a(%rbp),%eax
mov    %eax,-0x74(%rbp)
add    $0xffffffbf,%eax
sub    $0x9,%eax
jb     16db <Are_Compatible+0x5cb>
jmp    169f <Are_Compatible+0x58f>
mov    -0x74(%rbp),%eax
add    $0xffffffb5,%eax
sub    $0x4,%eax
jb     16db <Are_Compatible+0x5cb>
jmp    16b3 <Are_Compatible+0x5a3>
mov    -0x74(%rbp),%eax
add    $0xffffffb0,%eax
sub    $0x5,%eax
jb     16db <Are_Compatible+0x5cb>
jmp    16c7 <Are_Compatible+0x5b7>
mov    -0x74(%rbp),%eax
add    $0xffffffaa,%eax
sub    $0x4,%eax
ja     16e0 <Are_Compatible+0x5d0>
jmp    16db <Are_Compatible+0x5cb>
jmp    16ec <Are_Compatible+0x5dc>
movl   $0x0,-0x4(%rbp)
jmp    170e <Are_Compatible+0x5fe>
jmp    1707 <Are_Compatible+0x5f7>
mov    -0x19(%rbp),%al
lea    0x96d(%rip),%rdi
movsbl %al,%esi
movsbl -0x1a(%rbp),%edx
call   1030 <Exit@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Are_Compatible>:
push   %rax
movsbl (%rdi),%eax
movsbl (%rsi),%edx
lea    -0x41(%rax),%ecx
cmp    $0x19,%ecx
ja     1189 <Are_Compatible+0x79>
lea    0xeda(%rip),%rsi
movslq (%rsi,%rcx,4),%rcx
add    %rsi,%rcx
jmp    *%rcx
add    $0xffffffbe,%edx
cmp    $0x17,%edx
jae    11fe <Are_Compatible+0xee>
mov    $0x401001,%eax
jmp    11ea <Are_Compatible+0xda>
add    $0xffffffaf,%edx
cmp    $0xa,%edx
jae    11fe <Are_Compatible+0xee>
mov    $0x281,%eax
jmp    11ea <Are_Compatible+0xda>
cmp    $0x41,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x43,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x44,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x45,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x46,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x47,%dl
jmp    11c6 <Are_Compatible+0xb6>
and    $0xef,%dl
cmp    $0x48,%dl
sete   %al
jmp    1200 <Are_Compatible+0xf0>
cmp    $0x49,%dl
jmp    11c6 <Are_Compatible+0xb6>
movsbl %al,%esi
lea    0xed5(%rip),%rdi
call   1030 <Exit@plt>
jmp    11fa <Are_Compatible+0xea>
cmp    $0x4b,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x4c,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x4d,%dl
jmp    11c6 <Are_Compatible+0xb6>
and    $0xf7,%dl
cmp    $0x50,%dl
sete   %al
jmp    1200 <Are_Compatible+0xf0>
cmp    $0x52,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x53,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x54,%dl
jmp    11c6 <Are_Compatible+0xb6>
cmp    $0x56,%dl
sete   %cl
cmp    $0x58,%dl
sete   %al
or     %cl,%al
jmp    1200 <Are_Compatible+0xf0>
add    $0xffffffa9,%edx
cmp    $0x2,%edx
jae    11fe <Are_Compatible+0xee>
jmp    11fa <Are_Compatible+0xea>
add    $0xffffffbf,%edx
cmp    $0x1a,%edx
jae    11fe <Are_Compatible+0xee>
mov    $0x3efbdff,%eax
bt     %edx,%eax
setb   %al
jmp    1200 <Are_Compatible+0xf0>
and    $0xfe,%dl
cmp    $0x58,%dl
jne    11fe <Are_Compatible+0xee>
mov    $0x1,%al
jmp    1200 <Are_Compatible+0xf0>
xor    %eax,%eax
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [79 x i8] c"Please check that characters `%c` and `%c` correspond to existing amino-acids.\00"
define i32 @Are_Compatible(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
store i8 %10, i8* %6
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
store i8 %13, i8* %7
%14 = load i8, i8* %6
%15 = sext i8 %14 to i32
switch i32 %15, label %154 [
i32 65, label %16
i32 82, label %22
i32 78, label %28
i32 66, label %34
i32 68, label %40
i32 67, label %46
i32 81, label %52
i32 90, label %58
i32 69, label %64
i32 71, label %70
i32 72, label %76
i32 73, label %82
i32 76, label %88
i32 75, label %94
i32 77, label %100
i32 70, label %106
i32 80, label %112
i32 83, label %118
i32 84, label %124
i32 87, label %130
i32 89, label %136
i32 86, label %142
i32 88, label %148
]
16: ; preds = %2
%17 = load i8, i8* %7
%18 = sext i8 %17 to i32
switch i32 %18, label %20 [
i32 65, label %19
i32 88, label %19
]
19: ; preds = %16, %16
br label %21
20: ; preds = %16
store i32 0, i32* %3
br label %159
21: ; preds = %19
br label %158
22: ; preds = %2
%23 = load i8, i8* %7
%24 = sext i8 %23 to i32
switch i32 %24, label %26 [
i32 82, label %25
i32 88, label %25
]
25: ; preds = %22, %22
br label %27
26: ; preds = %22
store i32 0, i32* %3
br label %159
27: ; preds = %25
br label %158
28: ; preds = %2
%29 = load i8, i8* %7
%30 = sext i8 %29 to i32
switch i32 %30, label %32 [
i32 78, label %31
i32 66, label %31
i32 88, label %31
]
31: ; preds = %28, %28, %28
br label %33
32: ; preds = %28
store i32 0, i32* %3
br label %159
33: ; preds = %31
br label %158
34: ; preds = %2
%35 = load i8, i8* %7
%36 = sext i8 %35 to i32
switch i32 %36, label %38 [
i32 78, label %37
i32 66, label %37
i32 88, label %37
]
37: ; preds = %34, %34, %34
br label %39
38: ; preds = %34
store i32 0, i32* %3
br label %159
39: ; preds = %37
br label %158
40: ; preds = %2
%41 = load i8, i8* %7
%42 = sext i8 %41 to i32
switch i32 %42, label %44 [
i32 68, label %43
i32 88, label %43
]
43: ; preds = %40, %40
br label %45
44: ; preds = %40
store i32 0, i32* %3
br label %159
45: ; preds = %43
br label %158
46: ; preds = %2
%47 = load i8, i8* %7
%48 = sext i8 %47 to i32
switch i32 %48, label %50 [
i32 67, label %49
i32 88, label %49
]
49: ; preds = %46, %46
br label %51
50: ; preds = %46
store i32 0, i32* %3
br label %159
51: ; preds = %49
br label %158
52: ; preds = %2
%53 = load i8, i8* %7
%54 = sext i8 %53 to i32
switch i32 %54, label %56 [
i32 81, label %55
i32 90, label %55
i32 88, label %55
]
55: ; preds = %52, %52, %52
br label %57
56: ; preds = %52
store i32 0, i32* %3
br label %159
57: ; preds = %55
br label %158
58: ; preds = %2
%59 = load i8, i8* %7
%60 = sext i8 %59 to i32
switch i32 %60, label %62 [
i32 81, label %61
i32 90, label %61
i32 88, label %61
]
61: ; preds = %58, %58, %58
br label %63
62: ; preds = %58
store i32 0, i32* %3
br label %159
63: ; preds = %61
br label %158
64: ; preds = %2
%65 = load i8, i8* %7
%66 = sext i8 %65 to i32
switch i32 %66, label %68 [
i32 69, label %67
i32 88, label %67
]
67: ; preds = %64, %64
br label %69
68: ; preds = %64
store i32 0, i32* %3
br label %159
69: ; preds = %67
br label %158
70: ; preds = %2
%71 = load i8, i8* %7
%72 = sext i8 %71 to i32
switch i32 %72, label %74 [
i32 71, label %73
i32 88, label %73
]
73: ; preds = %70, %70
br label %75
74: ; preds = %70
store i32 0, i32* %3
br label %159
75: ; preds = %73
br label %158
76: ; preds = %2
%77 = load i8, i8* %7
%78 = sext i8 %77 to i32
switch i32 %78, label %80 [
i32 72, label %79
i32 88, label %79
]
79: ; preds = %76, %76
br label %81
80: ; preds = %76
store i32 0, i32* %3
br label %159
81: ; preds = %79
br label %158
82: ; preds = %2
%83 = load i8, i8* %7
%84 = sext i8 %83 to i32
switch i32 %84, label %86 [
i32 73, label %85
i32 88, label %85
]
85: ; preds = %82, %82
br label %87
86: ; preds = %82
store i32 0, i32* %3
br label %159
87: ; preds = %85
br label %158
88: ; preds = %2
%89 = load i8, i8* %7
%90 = sext i8 %89 to i32
switch i32 %90, label %92 [
i32 76, label %91
i32 88, label %91
]
91: ; preds = %88, %88
br label %93
92: ; preds = %88
store i32 0, i32* %3
br label %159
93: ; preds = %91
br label %158
94: ; preds = %2
%95 = load i8, i8* %7
%96 = sext i8 %95 to i32
switch i32 %96, label %98 [
i32 75, label %97
i32 88, label %97
]
97: ; preds = %94, %94
br label %99
98: ; preds = %94
store i32 0, i32* %3
br label %159
99: ; preds = %97
br label %158
100: ; preds = %2
%101 = load i8, i8* %7
%102 = sext i8 %101 to i32
switch i32 %102, label %104 [
i32 77, label %103
i32 88, label %103
]
103: ; preds = %100, %100
br label %105
104: ; preds = %100
store i32 0, i32* %3
br label %159
105: ; preds = %103
br label %158
106: ; preds = %2
%107 = load i8, i8* %7
%108 = sext i8 %107 to i32
switch i32 %108, label %110 [
i32 70, label %109
i32 88, label %109
]
109: ; preds = %106, %106
br label %111
110: ; preds = %106
store i32 0, i32* %3
br label %159
111: ; preds = %109
br label %158
112: ; preds = %2
%113 = load i8, i8* %7
%114 = sext i8 %113 to i32
switch i32 %114, label %116 [
i32 80, label %115
i32 88, label %115
]
115: ; preds = %112, %112
br label %117
116: ; preds = %112
store i32 0, i32* %3
br label %159
117: ; preds = %115
br label %158
118: ; preds = %2
%119 = load i8, i8* %7
%120 = sext i8 %119 to i32
switch i32 %120, label %122 [
i32 83, label %121
i32 88, label %121
]
121: ; preds = %118, %118
br label %123
122: ; preds = %118
store i32 0, i32* %3
br label %159
123: ; preds = %121
br label %158
124: ; preds = %2
%125 = load i8, i8* %7
%126 = sext i8 %125 to i32
switch i32 %126, label %128 [
i32 84, label %127
i32 88, label %127
]
127: ; preds = %124, %124
br label %129
128: ; preds = %124
store i32 0, i32* %3
br label %159
129: ; preds = %127
br label %158
130: ; preds = %2
%131 = load i8, i8* %7
%132 = sext i8 %131 to i32
switch i32 %132, label %134 [
i32 87, label %133
i32 88, label %133
]
133: ; preds = %130, %130
br label %135
134: ; preds = %130
store i32 0, i32* %3
br label %159
135: ; preds = %133
br label %158
136: ; preds = %2
%137 = load i8, i8* %7
%138 = sext i8 %137 to i32
switch i32 %138, label %140 [
i32 89, label %139
i32 88, label %139
]
139: ; preds = %136, %136
br label %141
140: ; preds = %136
store i32 0, i32* %3
br label %159
141: ; preds = %139
br label %158
142: ; preds = %2
%143 = load i8, i8* %7
%144 = sext i8 %143 to i32
switch i32 %144, label %146 [
i32 86, label %145
i32 88, label %145
]
145: ; preds = %142, %142
br label %147
146: ; preds = %142
store i32 0, i32* %3
br label %159
147: ; preds = %145
br label %158
148: ; preds = %2
%149 = load i8, i8* %7
%150 = sext i8 %149 to i32
switch i32 %150, label %152 [
i32 65, label %151
i32 82, label %151
i32 78, label %151
i32 66, label %151
i32 68, label %151
i32 67, label %151
i32 81, label %151
i32 90, label %151
i32 69, label %151
i32 71, label %151
i32 72, label %151
i32 73, label %151
i32 76, label %151
i32 75, label %151
i32 77, label %151
i32 70, label %151
i32 80, label %151
i32 83, label %151
i32 84, label %151
i32 87, label %151
i32 89, label %151
i32 86, label %151
i32 88, label %151
]
151: ; preds = %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148, %148
br label %153
152: ; preds = %148
store i32 0, i32* %3
br label %159
153: ; preds = %151
br label %158
154: ; preds = %2
%155 = load i8, i8* %6
%156 = load i8, i8* %7
%157 = call i32 @Exit(i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0), i8 signext %155, i8 signext %156)
br label %158
158: ; preds = %154, %153, %147, %141, %135, %129, %123, %117, %111, %105, %99, %93, %87, %81, %75, %69, %63, %57, %51, %45, %39, %33, %27, %21
store i32 1, i32* %3
br label %159
159: ; preds = %158, %152, %146, %140, %134, %128, %122, %116, %110, %104, %98, %92, %86, %80, %74, %68, %62, %56, %50, %44, %38, %32, %26, %20
%160 = load i32, i32* %3
ret i32 %160
}

LLVM IR (-O2):
@.str = [79 x i8] c"Please check that characters `%c` and `%c` correspond to existing amino-acids.\00"
define i32 @Are_Compatible(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = sext i8 %3 to i32
switch i32 %5, label %95 [
i32 65, label %6
i32 82, label %10
i32 78, label %14
i32 66, label %18
i32 68, label %22
i32 67, label %26
i32 81, label %30
i32 90, label %34
i32 69, label %38
i32 71, label %42
i32 72, label %46
i32 73, label %49
i32 76, label %53
i32 75, label %57
i32 77, label %61
i32 70, label %65
i32 80, label %69
i32 83, label %72
i32 84, label %76
i32 87, label %80
i32 89, label %84
i32 86, label %87
i32 88, label %91
]
6: ; preds = %2
%7 = icmp eq i8 %4, 65
%8 = icmp eq i8 %4, 88
%9 = or i1 %7, %8
br label %123
10: ; preds = %2
%11 = icmp eq i8 %4, 82
%12 = icmp eq i8 %4, 88
%13 = or i1 %11, %12
br label %123
14: ; preds = %2
%15 = sext i8 %4 to i32
%16 = add nsw i32 %15, -66
%17 = icmp ult i32 %16, 23
br i1 %17, label %98, label %123
18: ; preds = %2
%19 = sext i8 %4 to i32
%20 = add nsw i32 %19, -66
%21 = icmp ult i32 %20, 23
br i1 %21, label %103, label %123
22: ; preds = %2
%23 = icmp eq i8 %4, 68
%24 = icmp eq i8 %4, 88
%25 = or i1 %23, %24
br label %123
26: ; preds = %2
%27 = icmp eq i8 %4, 67
%28 = icmp eq i8 %4, 88
%29 = or i1 %27, %28
br label %123
30: ; preds = %2
%31 = sext i8 %4 to i32
%32 = add nsw i32 %31, -81
%33 = icmp ult i32 %32, 10
br i1 %33, label %108, label %123
34: ; preds = %2
%35 = sext i8 %4 to i32
%36 = add nsw i32 %35, -81
%37 = icmp ult i32 %36, 10
br i1 %37, label %113, label %123
38: ; preds = %2
%39 = icmp eq i8 %4, 69
%40 = icmp eq i8 %4, 88
%41 = or i1 %39, %40
br label %123
42: ; preds = %2
%43 = icmp eq i8 %4, 71
%44 = icmp eq i8 %4, 88
%45 = or i1 %43, %44
br label %123
46: ; preds = %2
%47 = and i8 %4, -17
%48 = icmp eq i8 %47, 72
br label %123
49: ; preds = %2
%50 = icmp eq i8 %4, 73
%51 = icmp eq i8 %4, 88
%52 = or i1 %50, %51
br label %123
53: ; preds = %2
%54 = icmp eq i8 %4, 76
%55 = icmp eq i8 %4, 88
%56 = or i1 %54, %55
br label %123
57: ; preds = %2
%58 = icmp eq i8 %4, 75
%59 = icmp eq i8 %4, 88
%60 = or i1 %58, %59
br label %123
61: ; preds = %2
%62 = icmp eq i8 %4, 77
%63 = icmp eq i8 %4, 88
%64 = or i1 %62, %63
br label %123
65: ; preds = %2
%66 = icmp eq i8 %4, 70
%67 = icmp eq i8 %4, 88
%68 = or i1 %66, %67
br label %123
69: ; preds = %2
%70 = and i8 %4, -9
%71 = icmp eq i8 %70, 80
br label %123
72: ; preds = %2
%73 = icmp eq i8 %4, 83
%74 = icmp eq i8 %4, 88
%75 = or i1 %73, %74
br label %123
76: ; preds = %2
%77 = icmp eq i8 %4, 84
%78 = icmp eq i8 %4, 88
%79 = or i1 %77, %78
br label %123
80: ; preds = %2
%81 = sext i8 %4 to i32
%82 = add nsw i32 %81, -87
%83 = icmp ult i32 %82, 2
br i1 %83, label %97, label %123
84: ; preds = %2
%85 = and i8 %4, -2
%86 = icmp eq i8 %85, 88
br i1 %86, label %97, label %123
87: ; preds = %2
%88 = icmp eq i8 %4, 86
%89 = icmp eq i8 %4, 88
%90 = or i1 %88, %89
br label %123
91: ; preds = %2
%92 = sext i8 %4 to i32
%93 = add nsw i32 %92, -65
%94 = icmp ult i32 %93, 26
br i1 %94, label %118, label %123
95: ; preds = %2
%96 = tail call i32 @Exit(i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0), i8 signext %3, i8 signext %4)
br label %97
97: ; preds = %84, %80, %95
br label %123
98: ; preds = %14
%99 = trunc i32 %16 to i23
%100 = lshr i23 -4190207, %99
%101 = and i23 %100, 1
%102 = icmp ne i23 %101, 0
br label %123
103: ; preds = %18
%104 = trunc i32 %20 to i23
%105 = lshr i23 -4190207, %104
%106 = and i23 %105, 1
%107 = icmp ne i23 %106, 0
br label %123
108: ; preds = %30
%109 = trunc i32 %32 to i10
%110 = lshr i10 -383, %109
%111 = and i10 %110, 1
%112 = icmp ne i10 %111, 0
br label %123
113: ; preds = %34
%114 = trunc i32 %36 to i10
%115 = lshr i10 -383, %114
%116 = and i10 %115, 1
%117 = icmp ne i10 %116, 0
br label %123
118: ; preds = %91
%119 = trunc i32 %93 to i26
%120 = lshr i26 -1065473, %119
%121 = and i26 %120, 1
%122 = icmp ne i26 %121, 0
br label %123
123: ; preds = %118, %91, %113, %34, %108, %30, %103, %18, %98, %14, %87, %84, %80, %76, %72, %69, %65, %61, %57, %53, %49, %46, %42, %38, %26, %22, %10, %6, %97
%124 = phi i1 [ true, %97 ], [ %9, %6 ], [ %13, %10 ], [ false, %14 ], [ false, %18 ], [ %25, %22 ], [ %29, %26 ], [ false, %30 ], [ false, %34 ], [ %41, %38 ], [ %45, %42 ], [ %48, %46 ], [ %52, %49 ], [ %56, %53 ], [ %60, %57 ], [ %64, %61 ], [ %68, %65 ], [ %71, %69 ], [ %75, %72 ], [ %79, %76 ], [ false, %80 ], [ false, %84 ], [ %90, %87 ], [ false, %91 ], [ %102, %98 ], [ %107, %103 ], [ %112, %108 ], [ %117, %113 ], [ %122, %118 ]
%125 = zext i1 %124 to i32
ret i32 %125
}