xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ roadmap_screen_record_move(int, int);
int /*<<< orphan*/ roadmap_screen_repaint_fast();
void roadmap_screen_move(int dx, int dy) {
  roadmap_screen_record_move(dx, dy);
  roadmap_screen_repaint_fast();
}


x86 assembly (clang, -O0):
<roadmap_screen_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <roadmap_screen_record_move@plt>
mov    $0x0,%al
call   1040 <roadmap_screen_repaint_fast@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_screen_move>:
push   %rax
call   1030 <roadmap_screen_record_move@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <roadmap_screen_repaint_fast@plt>

LLVM IR (-O0):
define void @roadmap_screen_move(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @roadmap_screen_record_move(i32 %5, i32 %6)
%8 = call i32 (...) @roadmap_screen_repaint_fast()
ret void
}

LLVM IR (-O2):
define void @roadmap_screen_move(i32 %0, i32 %1) {
%3 = tail call i32 @roadmap_screen_record_move(i32 %0, i32 %1)
%4 = tail call i32 (...) @roadmap_screen_repaint_fast()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void shared(void) { printf("shared_1!\n"); }


x86 assembly (clang, -O0):
<shared>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shared>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"shared_1!\0A\00"
define void @shared() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [10 x i8] c"shared_1!\00"
define void @shared() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("\aStartled by the sudden sound, Sally shouted,\n");
  printf("\"By the Great Pumpkin, what is that!\"\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xefd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0a(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"\07Startled by the sudden sound, Sally shouted,\0A\00"
@.str.1 = [39 x i8] c"\22By the Great Pumpkin, what is that!\22\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [46 x i8] c"\07Startled by the sudden sound, Sally shouted,\00"
@str.2 = [38 x i8] c"\22By the Great Pumpkin, what is that!\22\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([46 x i8], [46 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
scalar_t__ test__bswapsi2(int, int);
int main() {
  if (test__bswapsi2(0x12345678, 0x78563412))
    return 1;
  if (test__bswapsi2(0x00000001, 0x01000000))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x12345678,%edi
mov    $0x78563412,%esi
call   1030 <test__bswapsi2@plt>
cmp    $0x0,%rax
je     1144 <main+0x34>
movl   $0x1,-0x4(%rbp)
jmp    1170 <main+0x60>
mov    $0x1,%edi
mov    $0x1000000,%esi
call   1030 <test__bswapsi2@plt>
cmp    $0x0,%rax
je     1169 <main+0x59>
movl   $0x1,-0x4(%rbp)
jmp    1170 <main+0x60>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x12345678,%edi
mov    $0x78563412,%esi
call   1030 <test__bswapsi2@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     112f <main+0x1f>
pop    %rcx
ret
mov    $0x1,%edi
mov    $0x1000000,%esi
call   1030 <test__bswapsi2@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @test__bswapsi2(i32 305419896, i32 2018915346)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %10
5: ; preds = %0
%6 = call i64 @test__bswapsi2(i32 1, i32 16777216)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %5
store i32 1, i32* %1
br label %10
9: ; preds = %5
store i32 0, i32* %1
br label %10
10: ; preds = %9, %8, %4
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @test__bswapsi2(i32 305419896, i32 2018915346)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i64 @test__bswapsi2(i32 1, i32 16777216)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 1, %0 ], [ %6, %3 ]
ret i32 %8
}
int is_ident_first(char x) {
  return (('A' <= x && x <= 'Z') || ('a' <= x && x <= 'z') || x == '_' ||
          x == '$');
}


x86 assembly (clang, -O0):
<is_ident_first>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     112d <is_ident_first+0x2d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    116f <is_ident_first+0x6f>
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1150 <is_ident_first+0x50>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    116f <is_ident_first+0x6f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5f,%ecx
mov    %al,-0x2(%rbp)
je     116f <is_ident_first+0x6f>
movsbl -0x1(%rbp),%eax
cmp    $0x24,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ident_first>:
lea    -0x41(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x1a,%cl
jb     1124 <is_ident_first+0x24>
cmp    $0x5f,%dil
je     1124 <is_ident_first+0x24>
lea    -0x61(%rdi),%ecx
cmp    $0x1a,%cl
jb     1124 <is_ident_first+0x24>
xor    %eax,%eax
cmp    $0x24,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_ident_first(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 65, %4
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %26, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 97, %12
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 122
br i1 %17, label %26, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 95
br i1 %21, label %26, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 36
br label %26
26: ; preds = %22, %18, %14, %6
%27 = phi i1 [ true, %18 ], [ true, %14 ], [ true, %6 ], [ %25, %22 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @is_ident_first(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = add i8 %0, -97
%6 = icmp ult i8 %5, 26
%7 = icmp eq i8 %0, 95
%8 = or i1 %7, %6
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = icmp eq i8 %0, 36
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %4, %1, %9
%13 = phi i32 [ %11, %9 ], [ 1, %1 ], [ 1, %4 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ invalidate_bsp_tree();
void kill_bsp_tree() { invalidate_bsp_tree(); }


x86 assembly (clang, -O0):
<kill_bsp_tree>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <invalidate_bsp_tree@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill_bsp_tree>:
xor    %eax,%eax
jmp    1030 <invalidate_bsp_tree@plt>

LLVM IR (-O0):
define void @kill_bsp_tree() {
%1 = call i32 (...) @invalidate_bsp_tree()
ret void
}

LLVM IR (-O2):
define void @kill_bsp_tree() {
%1 = tail call i32 (...) @invalidate_bsp_tree()
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int ___UDFDescriptor(uint8_t *data, uint16_t *TagID) {
  *TagID = ((uint16_t)data[0] | ((uint16_t)data[(0) + 1] << 8));
  return 0;
}


x86 assembly (clang, -O0):
<___UDFDescriptor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<___UDFDescriptor>:
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     (%rdi),%eax
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @___UDFDescriptor(i64* %0, i32* %1) {
%3 = alloca i64*
%4 = alloca i32*
store i64* %0, i64** %3
store i32* %1, i32** %4
%5 = load i64*, i64** %3
%6 = getelementptr inbounds i64, i64* %5, i64 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = load i64*, i64** %3
%10 = getelementptr inbounds i64, i64* %9, i64 1
%11 = load i64, i64* %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 8
%14 = or i32 %8, %13
%15 = load i32*, i32** %4
store i32 %14, i32* %15
ret i32 0
}

LLVM IR (-O2):
define i32 @___UDFDescriptor(i64* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i64, i64* %0
%4 = trunc i64 %3 to i32
%5 = getelementptr inbounds i64, i64* %0, i64 1
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 8
%9 = or i32 %8, %4
store i32 %9, i32* %1
ret i32 0
}
/* Variables and functions */
int strlen(char *);
int main(int argc, char *argv[]) {
  char *my_ptr = argv[0];
  int i = strlen(my_ptr);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    (%rsi),%rdi
call   1030 <strlen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = call i32 @strlen(i8* %10)
store i32 %11, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @strlen(i8* %3)
ret i32 0
}
subseq(c, a, b) {
  extern peekc;
  if (!peekc)
    peekc = xread();
  if (peekc != c)
    return (a);
  peekc = 0;
  return (b);
}


x86 assembly (clang, -O0):
<subseq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2eb8(%rip),%rax
cmpl   $0x0,(%rax)
jne    1143 <subseq+0x33>
mov    $0x0,%al
call   1030 <xread@plt>
mov    %eax,%ecx
mov    0x2e9f(%rip),%rax
mov    %ecx,(%rax)
mov    0x2e96(%rip),%rax
mov    (%rax),%eax
cmp    -0x8(%rbp),%eax
je     1160 <subseq+0x50>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1173 <subseq+0x63>
mov    0x2e79(%rip),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subseq>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    0x2ebb(%rip),%r15
mov    (%r15),%eax
test   %eax,%eax
je     1147 <subseq+0x37>
cmp    %ebx,%eax
jne    113a <subseq+0x2a>
movl   $0x0,(%r15)
mov    %r14d,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret
xor    %eax,%eax
call   1030 <xread@plt>
mov    %eax,(%r15)
cmp    %ebx,%eax
je     1130 <subseq+0x20>
jmp    113a <subseq+0x2a>

LLVM IR (-O0):
@peekc = external global i32
define i32 @subseq(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* @peekc
%9 = icmp ne i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %3
%11 = call i32 (...) @xread()
store i32 %11, i32* @peekc
br label %12
12: ; preds = %10, %3
%13 = load i32, i32* @peekc
%14 = load i32, i32* %5
%15 = icmp ne i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %6
store i32 %17, i32* %4
br label %20
18: ; preds = %12
store i32 0, i32* @peekc
%19 = load i32, i32* %7
store i32 %19, i32* %4
br label %20
20: ; preds = %18, %16
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
@peekc = external global i32
define i32 @subseq(i32 %0, i32 %1, i32 %2) {
%4 = load i32, i32* @peekc
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @xread()
store i32 %7, i32* @peekc
br label %8
8: ; preds = %6, %3
%9 = phi i32 [ %7, %6 ], [ %4, %3 ]
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 0, i32* @peekc
br label %12
12: ; preds = %8, %11
%13 = phi i32 [ %2, %11 ], [ %1, %8 ]
ret i32 %13
}
/* Variables and functions */
scalar_t__ sqrt(int);
int bulbSwitch(int n) { return (int)sqrt(n); }


x86 assembly (clang, -O0):
<bulbSwitch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bulbSwitch>:
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define i32 @bulbSwitch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @sqrt(i32 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @bulbSwitch(i32 %0) {
%2 = tail call i64 @sqrt(i32 %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
scalar_t__ _f_checknameprim(char *, int);
unsigned char _f_checkname(char *name, char *ext) {
  if (_f_checknameprim(name, 8)) {
    return 1;
  }
  if (_f_checknameprim(ext, 3)) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<_f_checkname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x8,%esi
call   1030 <_f_checknameprim@plt>
cmp    $0x0,%rax
je     1141 <_f_checkname+0x31>
movb   $0x1,-0x1(%rbp)
jmp    1166 <_f_checkname+0x56>
mov    -0x18(%rbp),%rdi
mov    $0x3,%esi
call   1030 <_f_checknameprim@plt>
cmp    $0x0,%rax
je     1162 <_f_checkname+0x52>
movb   $0x1,-0x1(%rbp)
jmp    1166 <_f_checkname+0x56>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_f_checkname>:
push   %rbx
mov    %rsi,%rbx
mov    $0x8,%esi
call   1030 <_f_checknameprim@plt>
mov    %rax,%rcx
mov    $0x1,%al
test   %rcx,%rcx
je     112a <_f_checkname+0x1a>
pop    %rbx
ret
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <_f_checknameprim@plt>
test   %rax,%rax
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @_f_checkname(i8* %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = call i64 @_f_checknameprim(i8* %6, i32 8)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i8 1, i8* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %5
%12 = call i64 @_f_checknameprim(i8* %11, i32 3)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i8 1, i8* %3
br label %16
15: ; preds = %10
store i8 0, i8* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i8, i8* %3
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @_f_checkname(i8* %0, i8* %1) {
%3 = tail call i64 @_f_checknameprim(i8* %0, i32 8)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @_f_checknameprim(i8* %1, i32 3)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i8
br label %9
9: ; preds = %5, %2
%10 = phi i8 [ 1, %2 ], [ %8, %5 ]
ret i8 %10
}
/* Variables and functions */
long long PAPI_get_virt_cyc();
void papif_get_virt_cyc(long long *virt_cyc) {
  *virt_cyc = PAPI_get_virt_cyc();
}


x86 assembly (clang, -O0):
<papif_get_virt_cyc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <PAPI_get_virt_cyc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_get_virt_cyc>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <PAPI_get_virt_cyc@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_get_virt_cyc(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = call i64 (...) @PAPI_get_virt_cyc()
%4 = load i64*, i64** %2
store i64 %3, i64* %4
ret void
}

LLVM IR (-O2):
define void @papif_get_virt_cyc(i64* nocapture writeonly %0) {
%2 = tail call i64 (...) @PAPI_get_virt_cyc()
store i64 %2, i64* %0
ret void
}
/* Variables and functions */
char char_to_code(char);
char code_to_char(char);
char merge(char *s, char data) {
  char new;
  new = char_to_code(*s) | char_to_code(data);
  if (new & 0x80) {
    return data;
  }
  return code_to_char(new);
}


x86 assembly (clang, -O0):
<merge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1040 <char_to_code@plt>
movsbl %al,%eax
mov    %eax,-0x18(%rbp)
movsbl -0x11(%rbp),%edi
call   1040 <char_to_code@plt>
mov    %al,%cl
mov    -0x18(%rbp),%eax
movsbl %cl,%ecx
or     %ecx,%eax
mov    %al,-0x12(%rbp)
movsbl -0x12(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1177 <merge+0x57>
mov    -0x11(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1183 <merge+0x63>
movsbl -0x12(%rbp),%edi
call   1030 <code_to_char@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
movsbl (%rdi),%edi
call   1040 <char_to_code@plt>
mov    %eax,%ebx
mov    %ebp,%edi
call   1040 <char_to_code@plt>
or     %bl,%al
js     1148 <merge+0x28>
movsbl %al,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <code_to_char@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @merge(i8* %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = call signext i8 @char_to_code(i8 signext %8)
%10 = sext i8 %9 to i32
%11 = load i8, i8* %5
%12 = call signext i8 @char_to_code(i8 signext %11)
%13 = sext i8 %12 to i32
%14 = or i32 %10, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %6
%16 = load i8, i8* %6
%17 = sext i8 %16 to i32
%18 = and i32 %17, 128
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = load i8, i8* %5
store i8 %21, i8* %3
br label %25
22: ; preds = %2
%23 = load i8, i8* %6
%24 = call signext i8 @code_to_char(i8 signext %23)
store i8 %24, i8* %3
br label %25
25: ; preds = %22, %20
%26 = load i8, i8* %3
ret i8 %26
}

LLVM IR (-O2):
define signext i8 @merge(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = tail call signext i8 @char_to_code(i8 signext %3)
%5 = tail call signext i8 @char_to_code(i8 signext %1)
%6 = or i8 %5, %4
%7 = icmp sgt i8 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call signext i8 @code_to_char(i8 signext %6)
br label %10
10: ; preds = %2, %8
%11 = phi i8 [ %9, %8 ], [ %1, %2 ]
ret i8 %11
}
/* Variables and functions */
int matchBody(char *, char *, int);
int matchNoCase(char *sorig, char *p) { return matchBody(sorig, p, 1); }


x86 assembly (clang, -O0):
<matchNoCase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <matchBody@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matchNoCase>:
mov    $0x1,%edx
jmp    1030 <matchBody@plt>

LLVM IR (-O0):
define i32 @matchNoCase(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @matchBody(i8* %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @matchNoCase(i8* %0, i8* %1) {
%3 = tail call i32 @matchBody(i8* %0, i8* %1, i32 1)
ret i32 %3
}
void strip_newline(char *s) {
  while (*s != '\0') {
    if (*s == '\r' || *s == '\n') {
      *s = '\0';
    }
    s++;
  }
}


x86 assembly (clang, -O0):
<strip_newline>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1150 <strip_newline+0x50>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xd,%eax
je     1138 <strip_newline+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    113f <strip_newline+0x3f>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <strip_newline+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strip_newline>:
jmp    1117 <strip_newline+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x0,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0xa,%al
je     1110 <strip_newline+0x10>
cmp    $0xd,%al
je     1110 <strip_newline+0x10>
test   %al,%al
jne    1113 <strip_newline+0x13>
ret

LLVM IR (-O0):
define void @strip_newline(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %20, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 13
br i1 %12, label %18, label %13
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 10
br i1 %17, label %18, label %20
18: ; preds = %13, %8
%19 = load i8*, i8** %2
store i8 0, i8* %19
br label %20
20: ; preds = %18, %13
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %2
br label %3
23: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @strip_newline(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 13, label %5
i8 10, label %5
]
5: ; preds = %2, %2
store i8 0, i8* %3
br label %6
6: ; preds = %2, %5
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret void
}
int aps_shutdown(void) { return 0; }


x86 assembly (clang, -O0):
<aps_shutdown>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aps_shutdown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @aps_shutdown() {
ret i32 0
}

LLVM IR (-O2):
define i32 @aps_shutdown() {
ret i32 0
}
void gtk_tree_store_new() {}


x86 assembly (clang, -O0):
<gtk_tree_store_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_store_new>:
ret

LLVM IR (-O0):
define void @gtk_tree_store_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_store_new() {
ret void
}
/* Type definitions */
typedef scalar_t__ cl_mem;
typedef int /*<<< orphan*/ cl_int;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, int, unsigned int *);
cl_int clRetainMemObject(cl_mem memobj) {
  unsigned int sys_args[1];
  sys_args[0] = (unsigned int)memobj;
  return (cl_int)syscall(325, 1018, sys_args);
}


x86 assembly (clang, -O0):
<clRetainMemObject>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdx
mov    $0x145,%edi
mov    $0x3fa,%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clRetainMemObject>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdx
mov    $0x145,%edi
mov    $0x3fa,%esi
call   1030 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @clRetainMemObject(i64 %0) {
%2 = alloca i64
%3 = alloca [1 x i32]
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
%6 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
store i32 %5, i32* %6
%7 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
%8 = call i32 @syscall(i32 325, i32 1018, i32* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @clRetainMemObject(i64 %0) {
%2 = alloca [1 x i32]
%3 = bitcast [1 x i32]* %2 to i8*
%4 = trunc i64 %0 to i32
%5 = getelementptr inbounds [1 x i32], [1 x i32]* %2, i64 0, i64 0
store i32 %4, i32* %5
%6 = call i32 @syscall(i32 325, i32 1018, i32* %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ hfuzz_trace_pc_internal(uintptr_t);
__attribute__((__target__("sse4.2,popcnt"))) void hfuzz_trace_pc(uintptr_t pc) {
  hfuzz_trace_pc_internal(pc);
}


x86 assembly (clang, -O0):
<hfuzz_trace_pc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hfuzz_trace_pc_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfuzz_trace_pc>:
jmp    1030 <hfuzz_trace_pc_internal@plt>

LLVM IR (-O0):
define void @hfuzz_trace_pc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @hfuzz_trace_pc_internal(i64 %3)
ret void
}

LLVM IR (-O2):
define void @hfuzz_trace_pc(i64 %0) {
%2 = tail call i32 @hfuzz_trace_pc_internal(i64 %0)
ret void
}
/* Variables and functions */
int rename(char *, char *);
void tm_c_rename_(char *oldname, char *newname, int *status) {
  *status = rename(oldname, newname);
  return;
}


x86 assembly (clang, -O0):
<tm_c_rename_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rename@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tm_c_rename_>:
push   %rbx
mov    %rdx,%rbx
call   1030 <rename@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @tm_c_rename_(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @rename(i8* %7, i8* %8)
%10 = load i32*, i32** %6
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @tm_c_rename_(i8* nocapture %0, i8* nocapture %1, i32* nocapture writeonly %2) {
%4 = tail call i32 @rename(i8* %0, i8* %1)
store i32 %4, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_abs();
int /*<<< orphan*/ e_sty();
int /*<<< orphan*/ e_writeback();
void e_sty_abs() {
  e_abs();
  e_sty();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_sty_abs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <e_abs@plt>
mov    $0x0,%al
call   1040 <e_sty@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_sty_abs>:
push   %rax
xor    %eax,%eax
call   1050 <e_abs@plt>
xor    %eax,%eax
call   1040 <e_sty@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_sty_abs() {
%1 = call i32 (...) @e_abs()
%2 = call i32 (...) @e_sty()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_sty_abs() {
%1 = tail call i32 (...) @e_abs()
%2 = tail call i32 (...) @e_sty()
%3 = tail call i32 (...) @e_writeback()
ret void
}
int is_dead_consonant(unsigned int i) {
  return (i >= 0x10000 && i <= 0x10000 + 0x7f);
}


x86 assembly (clang, -O0):
<is_dead_consonant>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x10000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jb     1126 <is_dead_consonant+0x26>
cmpl   $0x1007f,-0x4(%rbp)
setbe  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dead_consonant>:
and    $0xffffff80,%edi
xor    %eax,%eax
cmp    $0x10000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_dead_consonant(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp uge i32 %3, 65536
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 65663
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_dead_consonant(i32 %0) {
%2 = and i32 %0, -128
%3 = icmp eq i32 %2, 65536
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ run_init();
void kernel_main(void) { run_init(); }


x86 assembly (clang, -O0):
<kernel_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <run_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_main>:
xor    %eax,%eax
jmp    1030 <run_init@plt>

LLVM IR (-O0):
define void @kernel_main() {
%1 = call i32 (...) @run_init()
ret void
}

LLVM IR (-O2):
define void @kernel_main() {
%1 = tail call i32 (...) @run_init()
ret void
}
/* Type definitions */
struct RNAplfold_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
RNAplfold_cmdline_parser_release(struct RNAplfold_args_info *);
void RNAplfold_cmdline_parser_free(struct RNAplfold_args_info *args_info) {
  RNAplfold_cmdline_parser_release(args_info);
}


x86 assembly (clang, -O0):
<RNAplfold_cmdline_parser_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RNAplfold_cmdline_parser_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAplfold_cmdline_parser_free>:
jmp    1030 <RNAplfold_cmdline_parser_release@plt>

LLVM IR (-O0):
%struct.RNAplfold_args_info = type { i32 }
define void @RNAplfold_cmdline_parser_free(%struct.RNAplfold_args_info* %0) {
%2 = alloca %struct.RNAplfold_args_info*
store %struct.RNAplfold_args_info* %0, %struct.RNAplfold_args_info** %2
%3 = load %struct.RNAplfold_args_info*, %struct.RNAplfold_args_info** %2
%4 = call i32 @RNAplfold_cmdline_parser_release(%struct.RNAplfold_args_info* %3)
ret void
}

LLVM IR (-O2):
%struct.RNAplfold_args_info = type { i32 }
define void @RNAplfold_cmdline_parser_free(%struct.RNAplfold_args_info* %0) {
%2 = tail call i32 @RNAplfold_cmdline_parser_release(%struct.RNAplfold_args_info* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ run_php_prog_ssl(int /*<<< orphan*/ *, int);
int tcp_sock_read(int sock) {
  run_php_prog_ssl(NULL, sock);
  close(sock);
  exit(0);
}


x86 assembly (clang, -O0):
<tcp_sock_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %eax,%eax
mov    %eax,%edi
call   1040 <run_php_prog_ssl@plt>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<tcp_sock_read>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
mov    %ebx,%esi
call   1040 <run_php_prog_ssl@plt>
mov    %ebx,%edi
call   1030 <close@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @tcp_sock_read(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @run_php_prog_ssl(i32* null, i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @close(i32 %5)
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @tcp_sock_read(i32 %0) {
%2 = tail call i32 @run_php_prog_ssl(i32* null, i32 %0)
%3 = tail call i32 @close(i32 %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
int HelpItem1(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem1() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem1() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PTRACE_GETREGS;
int errno;
scalar_t__ ptrace(int /*<<< orphan*/, long, int /*<<< orphan*/,
                  unsigned long *);
int ptrace_getregs(long pid, unsigned long *regs_out) {
  if (ptrace(PTRACE_GETREGS, pid, 0, regs_out) < 0)
    return -errno;
  return 0;
}


x86 assembly (clang, -O0):
<ptrace_getregs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
xor    %edx,%edx
call   1030 <ptrace@plt>
cmp    $0x0,%rax
jge    1155 <ptrace_getregs+0x45>
xor    %eax,%eax
mov    0x2e8d(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <ptrace_getregs+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_getregs>:
push   %rbx
mov    %rsi,%rcx
mov    %rdi,%rsi
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
xor    %ebx,%ebx
xor    %edx,%edx
call   1030 <ptrace@plt>
mov    0x2ea8(%rip),%rcx
sub    (%rcx),%ebx
sar    $0x3f,%rax
and    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@PTRACE_GETREGS = global i32 0
@errno = global i32 0
define i32 @ptrace_getregs(i64 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64*
store i64 %0, i64* %4
store i64* %1, i64** %5
%6 = load i32, i32* @PTRACE_GETREGS
%7 = load i64, i64* %4
%8 = load i64*, i64** %5
%9 = call i64 @ptrace(i32 %6, i64 %7, i32 0, i64* %8)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* @errno
%13 = sub nsw i32 0, %12
store i32 %13, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %11
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@PTRACE_GETREGS = global i32 0
@errno = global i32 0
define i32 @ptrace_getregs(i64 %0, i64* %1) {
%3 = load i32, i32* @PTRACE_GETREGS
%4 = tail call i64 @ptrace(i32 %3, i64 %0, i32 0, i64* %1)
%5 = icmp slt i64 %4, 0
%6 = load i32, i32* @errno
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 0
ret i32 %8
}
/* Variables and functions */
int SEEK_CUR;
int ws_get_SEEK_CUR() { return SEEK_CUR; }


x86 assembly (clang, -O0):
<ws_get_SEEK_CUR>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ws_get_SEEK_CUR>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SEEK_CUR = global i32 0
define i32 @ws_get_SEEK_CUR() {
%1 = load i32, i32* @SEEK_CUR
ret i32 %1
}

LLVM IR (-O2):
@SEEK_CUR = global i32 0
define i32 @ws_get_SEEK_CUR() {
%1 = load i32, i32* @SEEK_CUR
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ pr_info(char *, int);
int sci_get_chip_id();
int soc_id_is_sc8735v1(void) {
  pr_info("chip id is %x\n", sci_get_chip_id());
  return ((sci_get_chip_id() & (0xFFFFFFFF)) == ((0x8300a001) & (0xFFFFFFFF)));
}


x86 assembly (clang, -O0):
<soc_id_is_sc8735v1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <sci_get_chip_id@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <pr_info@plt>
mov    $0x0,%al
call   1040 <sci_get_chip_id@plt>
and    $0xffffffff,%eax
cmp    $0x8300a001,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soc_id_is_sc8735v1>:
push   %rax
xor    %eax,%eax
call   1040 <sci_get_chip_id@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <pr_info@plt>
xor    %eax,%eax
call   1040 <sci_get_chip_id@plt>
xor    %ecx,%ecx
cmp    $0x8300a001,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"chip id is %x\0A\00"
define i32 @soc_id_is_sc8735v1() {
%1 = call i32 (...) @sci_get_chip_id()
%2 = call i32 @pr_info(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @sci_get_chip_id()
%4 = and i32 %3, -1
%5 = icmp eq i32 %4, -2097111039
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [15 x i8] c"chip id is %x\0A\00"
define i32 @soc_id_is_sc8735v1() {
%1 = tail call i32 (...) @sci_get_chip_id()
%2 = tail call i32 @pr_info(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @sci_get_chip_id()
%4 = icmp eq i32 %3, -2097111039
%5 = zext i1 %4 to i32
ret i32 %5
}
void trap_stopCamera(int camNum) {}


x86 assembly (clang, -O0):
<trap_stopCamera>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trap_stopCamera>:
ret

LLVM IR (-O0):
define void @trap_stopCamera(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @trap_stopCamera(i32 %0) {
ret void
}
/* Variables and functions */
int ioctl(int, int, int);
int ivshmem_send(int fd, int ivshmem_cmd, int destination_vm) {
  int rv;
  rv = ioctl(fd, ivshmem_cmd, destination_vm);
}


x86 assembly (clang, -O0):
<ivshmem_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <ioctl@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivshmem_send>:
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
define i32 @ivshmem_send(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = call i32 @ioctl(i32 %9, i32 %10, i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @ivshmem_send(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @ioctl(i32 %0, i32 %1, i32 %2)
ret i32 undef
}
/* Variables and functions */
char *strcpy(char *dst, const char *src) {
  size_t i;
  for (i = 0; src[i]; ++i) {
    dst[i] = src[i];
  }
  dst[i] = 0;
  return dst;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     114d <strcpy+0x4d>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strcpy+0x14>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%dl
xor    %ecx,%ecx
test   %dl,%dl
je     1120 <strcpy+0x20>
nopl   0x0(%rax,%rax,1)
mov    %dl,(%rax,%rcx,1)
movzbl 0x1(%rsi,%rcx,1),%edx
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
movb   $0x0,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
store i64 0, i64* %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i8, i8* %7, i64 %8
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %23
12: ; preds = %6
%13 = load i8*, i8** %4
%14 = load i64, i64* %5
%15 = getelementptr inbounds i8, i8* %13, i64 %14
%16 = load i8, i8* %15
%17 = load i8*, i8** %3
%18 = load i64, i64* %5
%19 = getelementptr inbounds i8, i8* %17, i64 %18
store i8 %16, i8* %19
br label %20
20: ; preds = %12
%21 = load i64, i64* %5
%22 = add i64 %21, 1
store i64 %22, i64* %5
br label %6
23: ; preds = %6
%24 = load i8*, i8** %3
%25 = load i64, i64* %5
%26 = getelementptr inbounds i8, i8* %24, i64 %25
store i8 0, i8* %26
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i64 [ %9, %5 ], [ 0, %2 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 %6, i8* %8
%9 = add i64 %7, 1
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i64 [ 0, %2 ], [ %9, %5 ]
%15 = getelementptr inbounds i8, i8* %0, i64 %14
store i8 0, i8* %15
ret i8* %0
}
void websils_json_abi_0() {}


x86 assembly (clang, -O0):
<websils_json_abi_0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<websils_json_abi_0>:
ret

LLVM IR (-O0):
define void @websils_json_abi_0() {
ret void
}

LLVM IR (-O2):
define void @websils_json_abi_0() {
ret void
}
/* Variables and functions */
unsigned int vp8_sub_pixel_variance16x16_c(unsigned char const *, int, int, int,
                                           unsigned char const *, int,
                                           unsigned int *);
unsigned int vp8_variance_halfpixvar16x16_hv_c(const unsigned char *src_ptr,
                                               int source_stride,
                                               const unsigned char *ref_ptr,
                                               int recon_stride,
                                               unsigned int *sse) {
  return vp8_sub_pixel_variance16x16_c(src_ptr, source_stride, 4, 4, ref_ptr,
                                       recon_stride, sse);
}


x86 assembly (clang, -O0):
<vp8_variance_halfpixvar16x16_hv_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    -0x28(%rbp),%rax
mov    $0x4,%ecx
mov    %ecx,%edx
mov    %rax,(%rsp)
call   1030 <vp8_sub_pixel_variance16x16_c@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vp8_variance_halfpixvar16x16_hv_c>:
push   %rax
mov    %ecx,%r9d
mov    %rdx,%rax
mov    %r8,(%rsp)
mov    $0x4,%edx
mov    $0x4,%ecx
mov    %rax,%r8
call   1030 <vp8_sub_pixel_variance16x16_c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @vp8_variance_halfpixvar16x16_hv_c(i8* %0, i32 %1, i8* %2, i32 %3, i32* %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32* %4, i32** %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32*, i32** %10
%16 = call i32 @vp8_sub_pixel_variance16x16_c(i8* %11, i32 %12, i32 4, i32 4, i8* %13, i32 %14, i32* %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @vp8_variance_halfpixvar16x16_hv_c(i8* %0, i32 %1, i8* %2, i32 %3, i32* %4) {
%6 = tail call i32 @vp8_sub_pixel_variance16x16_c(i8* %0, i32 %1, i32 4, i32 4, i8* %2, i32 %3, i32* %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
scalar_t__ read_file(char *, char *);
int print_file(char *filename) {
  char buf[4];
  if (read_file(filename, buf) < 0) {
    return -1;
  }
  puts(buf);
  return 0;
}


x86 assembly (clang, -O0):
<print_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <read_file@plt>
cmp    $0x0,%rax
jge    114f <print_file+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <print_file+0x3f>
lea    -0x14(%rbp),%rdi
call   1030 <puts@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_file>:
push   %rax
lea    0x4(%rsp),%rsi
call   1040 <read_file@plt>
test   %rax,%rax
js     113e <print_file+0x1e>
lea    0x4(%rsp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @print_file(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [4 x i8]
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%7 = call i64 @read_file(i8* %5, i8* %6)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %13
10: ; preds = %1
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%12 = call i32 @puts(i8* %11)
store i32 0, i32* %2
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @print_file(i8* %0) {
%2 = alloca [4 x i8]
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%4 = call i64 @read_file(i8* %0, i8* %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @puts(i8* %3)
br label %8
8: ; preds = %1, %6
%9 = phi i32 [ 0, %6 ], [ -1, %1 ]
ret i32 %9
}
/* Variables and functions */
double cos(double);
double double_cos(double val) { return cos(val); }


x86 assembly (clang, -O0):
<double_cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_cos>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define double @double_cos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @cos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @double_cos(double %0) {
%2 = tail call double @cos(double %0)
ret double %2
}
/* Variables and functions */
int rand();
int card_value_prng() { return rand() % 13; }


x86 assembly (clang, -O0):
<card_value_prng>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0xd,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<card_value_prng>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x4ec4ec4f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%edx
lea    (%rcx,%rdx,4),%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @card_value_prng() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 13
ret i32 %2
}

LLVM IR (-O2):
define i32 @card_value_prng() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 13
ret i32 %2
}
short int cast_uint_short(unsigned int x) { return (short int)x; }


x86 assembly (clang, -O0):
<cast_uint_short>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_uint_short>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @cast_uint_short(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define signext i16 @cast_uint_short(i32 %0) {
%2 = trunc i32 %0 to i16
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int charToBoardColumn(char);
void invalidCharConvertedToInvalidColumnIndex(void) {
  assert(charToBoardColumn('?') == -1);
}


x86 assembly (clang, -O0):
<invalidCharConvertedToInvalidColumnIndex>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f,%edi
call   1040 <charToBoardColumn@plt>
cmp    $0xffffffff,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalidCharConvertedToInvalidColumnIndex>:
push   %rax
mov    $0x3f,%edi
call   1040 <charToBoardColumn@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @invalidCharConvertedToInvalidColumnIndex() {
%1 = call i32 @charToBoardColumn(i8 signext 63)
%2 = icmp eq i32 %1, -1
%3 = zext i1 %2 to i32
%4 = call i32 @assert(i32 %3)
ret void
}

LLVM IR (-O2):
define void @invalidCharConvertedToInvalidColumnIndex() {
%1 = tail call i32 @charToBoardColumn(i8 signext 63)
%2 = icmp eq i32 %1, -1
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}