int lpfc_is_LC_HBA(unsigned short device) {
  if ((device == 0xf0a5) || (device == 0xf098) || (device == 0xf0a1) ||
      (device == 0xf0d5) || (device == 0xf0d1) || (device == 0xf0e5) ||
      (device == 0xf0e1) || (device == 0xf015) || (device == 0xf011) ||
      (device == 0xf095))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<lpfc_is_LC_HBA>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
cmp    $0xf0a5,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf098,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf0a1,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf0d5,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf0d1,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf0e5,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf0e1,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf015,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf011,%eax
je     11a1 <lpfc_is_LC_HBA+0xa1>
movzwl -0x6(%rbp),%eax
cmp    $0xf095,%eax
jne    11ad <lpfc_is_LC_HBA+0xad>
movl   $0x1,-0x4(%rbp)
jmp    11b4 <lpfc_is_LC_HBA+0xb4>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lpfc_is_LC_HBA>:
mov    $0x1,%eax
movswl %di,%ecx
cmp    $0xfffff0d4,%ecx
jg     1130 <lpfc_is_LC_HBA+0x30>
lea    0xf6b(%rdi),%ecx
cmp    $0x3c,%cx
ja     114c <lpfc_is_LC_HBA+0x4c>
movzwl %cx,%ecx
movabs $0x1000000000011009,%rdx
bt     %rcx,%rdx
jae    114c <lpfc_is_LC_HBA+0x4c>
ret
add    $0xf2b,%edi
cmp    $0x10,%di
ja     115f <lpfc_is_LC_HBA+0x5f>
movzwl %di,%ecx
mov    $0x11001,%edx
bt     %rcx,%rdx
jb     112f <lpfc_is_LC_HBA+0x2f>
jmp    115f <lpfc_is_LC_HBA+0x5f>
movzwl %di,%ecx
cmp    $0xf011,%ecx
je     112f <lpfc_is_LC_HBA+0x2f>
cmp    $0xf015,%ecx
je     112f <lpfc_is_LC_HBA+0x2f>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lpfc_is_LC_HBA(i16 zeroext %0) {
%2 = alloca i32
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = icmp eq i32 %5, 61605
br i1 %6, label %43, label %7
7: ; preds = %1
%8 = load i16, i16* %3
%9 = zext i16 %8 to i32
%10 = icmp eq i32 %9, 61592
br i1 %10, label %43, label %11
11: ; preds = %7
%12 = load i16, i16* %3
%13 = zext i16 %12 to i32
%14 = icmp eq i32 %13, 61601
br i1 %14, label %43, label %15
15: ; preds = %11
%16 = load i16, i16* %3
%17 = zext i16 %16 to i32
%18 = icmp eq i32 %17, 61653
br i1 %18, label %43, label %19
19: ; preds = %15
%20 = load i16, i16* %3
%21 = zext i16 %20 to i32
%22 = icmp eq i32 %21, 61649
br i1 %22, label %43, label %23
23: ; preds = %19
%24 = load i16, i16* %3
%25 = zext i16 %24 to i32
%26 = icmp eq i32 %25, 61669
br i1 %26, label %43, label %27
27: ; preds = %23
%28 = load i16, i16* %3
%29 = zext i16 %28 to i32
%30 = icmp eq i32 %29, 61665
br i1 %30, label %43, label %31
31: ; preds = %27
%32 = load i16, i16* %3
%33 = zext i16 %32 to i32
%34 = icmp eq i32 %33, 61461
br i1 %34, label %43, label %35
35: ; preds = %31
%36 = load i16, i16* %3
%37 = zext i16 %36 to i32
%38 = icmp eq i32 %37, 61457
br i1 %38, label %43, label %39
39: ; preds = %35
%40 = load i16, i16* %3
%41 = zext i16 %40 to i32
%42 = icmp eq i32 %41, 61589
br i1 %42, label %43, label %44
43: ; preds = %39, %35, %31, %27, %23, %19, %15, %11, %7, %1
store i32 1, i32* %2
br label %45
44: ; preds = %39
store i32 0, i32* %2
br label %45
45: ; preds = %44, %43
%46 = load i32, i32* %2
ret i32 %46
}

LLVM IR (-O2):
define i32 @lpfc_is_LC_HBA(i16 zeroext %0) {
switch i16 %0, label %2 [
i16 -3867, label %3
i16 -3871, label %3
i16 -3883, label %3
i16 -3887, label %3
i16 -3931, label %3
i16 -3935, label %3
i16 -3944, label %3
i16 -3947, label %3
i16 -4075, label %3
i16 -4079, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}