xunge/DecIR huggingface dataset:
double SuperLU_timer_() {
  double dclock();
  return (dclock());
}


x86 assembly (clang, -O0):
<SuperLU_timer_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dclock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SuperLU_timer_>:
xor    %eax,%eax
jmp    1030 <dclock@plt>

LLVM IR (-O0):
define double @SuperLU_timer_() {
%1 = call double (...) @dclock()
ret double %1
}

LLVM IR (-O2):
define double @SuperLU_timer_() {
%1 = tail call double (...) @dclock()
ret double %1
}
/* Variables and functions */
int /*<<< orphan*/ PrintAdjMat(int **, int, int);
int /*<<< orphan*/ free_int_2d(int ***);
int /*<<< orphan*/ malloc_int_2d(int ***, int, int);
int main() {
  int **mat = NULL;
  malloc_int_2d(&mat, 3, 3);
  PrintAdjMat(mat, 3, 3);
  free_int_2d(&mat);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x3,%edx
mov    %edx,%esi
call   1050 <malloc_int_2d@plt>
mov    -0x8(%rbp),%rdi
mov    $0x3,%edx
mov    %edx,%esi
call   1030 <PrintAdjMat@plt>
lea    -0x8(%rbp),%rdi
call   1040 <free_int_2d@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x3,%esi
mov    $0x3,%edx
call   1050 <malloc_int_2d@plt>
mov    0x8(%rsp),%rdi
mov    $0x3,%esi
mov    $0x3,%edx
call   1030 <PrintAdjMat@plt>
mov    %rbx,%rdi
call   1040 <free_int_2d@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32**
store i32** null, i32*** %1
%2 = call i32 @malloc_int_2d(i32*** %1, i32 3, i32 3)
%3 = load i32**, i32*** %1
%4 = call i32 @PrintAdjMat(i32** %3, i32 3, i32 3)
%5 = call i32 @free_int_2d(i32*** %1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32**
%2 = bitcast i32*** %1 to i8*
store i32** null, i32*** %1
%3 = call i32 @malloc_int_2d(i32*** %1, i32 3, i32 3)
%4 = load i32**, i32*** %1
%5 = call i32 @PrintAdjMat(i32** %4, i32 3, i32 3)
%6 = call i32 @free_int_2d(i32*** %1)
ret i32 0
}
/* Variables and functions */
bool nrf52_errata_70(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_70>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_70>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_70() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_70() {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ dma_do(int, scalar_t__, int);
void vdp_dma_vram(uint32_t from, uint16_t to, uint16_t len) {
  dma_do(from, len,
         ((0x4000 + (((uint32_t)to) & 0x3FFF)) << 16) +
             ((((uint32_t)to) >> 14) | 0x80));
}


x86 assembly (clang, -O0):
<vdp_dma_vram>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rax
mov    %eax,%edx
and    $0x3fff,%edx
add    $0x4000,%edx
shl    $0x10,%edx
mov    -0x10(%rbp),%rax
sar    $0xe,%eax
or     $0x80,%eax
add    %eax,%edx
call   1030 <dma_do@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdp_dma_vram>:
mov    %esi,%eax
shl    $0x10,%eax
and    $0x3fff0000,%eax
sar    $0xe,%esi
or     $0x80,%esi
add    %esi,%eax
add    $0x40000000,%eax
mov    %rdx,%rsi
mov    %eax,%edx
jmp    1030 <dma_do@plt>

LLVM IR (-O0):
define void @vdp_dma_vram(i32 %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = trunc i64 %9 to i32
%11 = and i32 %10, 16383
%12 = add nsw i32 16384, %11
%13 = shl i32 %12, 16
%14 = load i64, i64* %5
%15 = trunc i64 %14 to i32
%16 = ashr i32 %15, 14
%17 = or i32 %16, 128
%18 = add nsw i32 %13, %17
%19 = call i32 @dma_do(i32 %7, i64 %8, i32 %18)
ret void
}

LLVM IR (-O2):
define void @vdp_dma_vram(i32 %0, i64 %1, i64 %2) {
%4 = trunc i64 %1 to i32
%5 = shl i32 %4, 16
%6 = and i32 %5, 1073676288
%7 = or i32 %6, 1073741824
%8 = ashr i32 %4, 14
%9 = or i32 %8, 128
%10 = add nsw i32 %7, %9
%11 = tail call i32 @dma_do(i32 %0, i64 %2, i32 %10)
ret void
}
/* Variables and functions */
double _get_elapsed_time();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, double);
int /*<<< orphan*/ stderr;
void _print_elapsed_time() {
  double sec = _get_elapsed_time() / 1000000.0;
  fprintf(stderr, "Elapsed time sec: %.5f\n", sec);
}


x86 assembly (clang, -O0):
<_print_elapsed_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <_get_elapsed_time@plt>
movsd  0xec9(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
movsd  -0x8(%rbp),%xmm0
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_print_elapsed_time>:
push   %rax
xor    %eax,%eax
call   1040 <_get_elapsed_time@plt>
divsd  0xed0(%rip),%xmm0
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    0xec8(%rip),%rsi
pop    %rax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Elapsed time sec: %.5f\0A\00"
define void @_print_elapsed_time() {
%1 = alloca double
%2 = call double (...) @_get_elapsed_time()
%3 = fdiv double %2, 1.000000e+06
store double %3, double* %1
%4 = load i32, i32* @stderr
%5 = load double, double* %1
%6 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), double %5)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Elapsed time sec: %.5f\0A\00"
define void @_print_elapsed_time() {
%1 = tail call double (...) @_get_elapsed_time()
%2 = fdiv double %1, 1.000000e+06
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), double %2)
ret void
}
void gtk_icon_factory_remove_default() {}


x86 assembly (clang, -O0):
<gtk_icon_factory_remove_default>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_factory_remove_default>:
ret

LLVM IR (-O0):
define void @gtk_icon_factory_remove_default() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_factory_remove_default() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  char *a, b;
  printf("%d", (b != (a == "Hello World")));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsbl -0x9(%rbp),%eax
lea    0xee0(%rip),%rcx
cmp    %rcx,-0x8(%rbp)
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%esi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [12 x i8] c"Hello World\00"
define i32 @main() {
%1 = alloca i8*
%2 = alloca i8
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = load i8*, i8** %1
%6 = icmp eq i8* %5, getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0)
%7 = zext i1 %6 to i32
%8 = icmp ne i32 %4, %7
%9 = zext i1 %8 to i32
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
void dashes(length) {
  int i;
  for (i = 0; i <= length; i++) {
    printf("-");
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<dashes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     114a <dashes+0x3a>
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <dashes+0x12>
lea    0xeb1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dashes>:
push   %rbx
test   %edi,%edi
js     112f <dashes+0x1f>
mov    %edi,%ebx
add    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x2d,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <dashes+0x10>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"-\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @dashes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @dashes(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @putchar(i32 45)
%6 = add nuw i32 %4, 1
%7 = icmp eq i32 %4, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
%9 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int do_it(char const *, int,
          int (*)(char const *, struct stat64 const *, int, struct FTW *), int,
          int);
int nftw64(const char *path,
           int (*fcb)(const char *, const struct stat64 *, int, struct FTW *),
           int descriptors, int flags) {
  return do_it(path, 1, fcb, descriptors, flags);
}


x86 assembly (clang, -O0):
<nftw64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    $0x1,%esi
call   1030 <do_it@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nftw64>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <do_it@plt>

LLVM IR (-O0):
%struct.stat64 = type opaque
%struct.FTW = type opaque
%struct.stat64.0 = type opaque
%struct.FTW.1 = type opaque
define i32 @nftw64(i8* %0, i32 (i8*, %struct.stat64*, i32, %struct.FTW*)* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32 (i8*, %struct.stat64*, i32, %struct.FTW*)*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 (i8*, %struct.stat64*, i32, %struct.FTW*)* %1, i32 (i8*, %struct.stat64*, i32, %struct.FTW*)** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32 (i8*, %struct.stat64*, i32, %struct.FTW*)*, i32 (i8*, %struct.stat64*, i32, %struct.FTW*)** %6
%11 = bitcast i32 (i8*, %struct.stat64*, i32, %struct.FTW*)* %10 to i32 (i8*, %struct.stat64.0*, i32, %struct.FTW.1*)*
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @do_it(i8* %9, i32 1, i32 (i8*, %struct.stat64.0*, i32, %struct.FTW.1*)* %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
%struct.stat64 = type opaque
%struct.FTW = type opaque
%struct.stat64.0 = type opaque
%struct.FTW.1 = type opaque
define i32 @nftw64(i8* %0, i32 (i8*, %struct.stat64*, i32, %struct.FTW*)* %1, i32 %2, i32 %3) {
%5 = bitcast i32 (i8*, %struct.stat64*, i32, %struct.FTW*)* %1 to i32 (i8*, %struct.stat64.0*, i32, %struct.FTW.1*)*
%6 = tail call i32 @do_it(i8* %0, i32 1, i32 (i8*, %struct.stat64.0*, i32, %struct.FTW.1*)* %5, i32 %2, i32 %3)
ret i32 %6
}
int axp_set_peklong(int pek) {
  int ret = 0;
  return ret;
}


x86 assembly (clang, -O0):
<axp_set_peklong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<axp_set_peklong>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @axp_set_peklong(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @axp_set_peklong(i32 %0) {
ret i32 0
}
void gtk_tree_model_sort_iter_is_valid() {}


x86 assembly (clang, -O0):
<gtk_tree_model_sort_iter_is_valid>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_sort_iter_is_valid>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_sort_iter_is_valid() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_sort_iter_is_valid() {
ret void
}
int log2overhead(int first_term, int num_terms) { return 0; }


x86 assembly (clang, -O0):
<log2overhead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2overhead>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @log2overhead(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @log2overhead(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ K_set_wall_clock_state(int);
int /*<<< orphan*/ atomic(int);
void set_wall_clock_state(int state) {
  atomic(1);
  K_set_wall_clock_state(state);
  atomic(0);
}


x86 assembly (clang, -O0):
<set_wall_clock_state>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <atomic@plt>
mov    -0x4(%rbp),%edi
call   1030 <K_set_wall_clock_state@plt>
xor    %edi,%edi
call   1040 <atomic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_wall_clock_state>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
call   1040 <atomic@plt>
mov    %ebx,%edi
call   1030 <K_set_wall_clock_state@plt>
xor    %edi,%edi
pop    %rbx
jmp    1040 <atomic@plt>

LLVM IR (-O0):
define void @set_wall_clock_state(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @atomic(i32 1)
%4 = load i32, i32* %2
%5 = call i32 @K_set_wall_clock_state(i32 %4)
%6 = call i32 @atomic(i32 0)
ret void
}

LLVM IR (-O2):
define void @set_wall_clock_state(i32 %0) {
%2 = tail call i32 @atomic(i32 1)
%3 = tail call i32 @K_set_wall_clock_state(i32 %0)
%4 = tail call i32 @atomic(i32 0)
ret void
}
/* Variables and functions */
double log10(double);
double flux_to_absmag(double flux) { return -2.511886 * log10(flux); }


x86 assembly (clang, -O0):
<flux_to_absmag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log10@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flux_to_absmag>:
push   %rax
call   1030 <log10@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @flux_to_absmag(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log10(double %3)
%5 = fmul double 0xC0041857AFEA3DF7, %4
ret double %5
}

LLVM IR (-O2):
define double @flux_to_absmag(double %0) {
%2 = tail call double @log10(double %0)
%3 = fmul double %2, 0xC0041857AFEA3DF7
ret double %3
}
void MPI_Scan() {}


x86 assembly (clang, -O0):
<MPI_Scan>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPI_Scan>:
ret

LLVM IR (-O0):
define void @MPI_Scan() {
ret void
}

LLVM IR (-O2):
define void @MPI_Scan() {
ret void
}
void my_memset(void *src, int value, int size) {
  char *src_c;
  int i;
  src_c = (char *)src;
  i = 0;
  while (i < size) {
    src_c[i] = value;
    i++;
  }
}


x86 assembly (clang, -O0):
<my_memset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1147 <my_memset+0x47>
mov    -0xc(%rbp),%eax
mov    %al,%dl
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111d <my_memset+0x1d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_memset>:
test   %edx,%edx
jle    1120 <my_memset+0x10>
push   %rax
mov    %edx,%edx
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @my_memset(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i8*, i8** %4
store i8* %9, i8** %7
store i32 0, i32* %8
br label %10
10: ; preds = %14, %3
%11 = load i32, i32* %8
%12 = load i32, i32* %6
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %23
14: ; preds = %10
%15 = load i32, i32* %5
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %7
%18 = load i32, i32* %8
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
%21 = load i32, i32* %8
%22 = add nsw i32 %21, 1
store i32 %22, i32* %8
br label %10
23: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @my_memset(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = trunc i32 %1 to i8
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %5, %3
ret void
}
/* Variables and functions */
int NLA_HDRLEN;
int nla_attr_size(int payload) { return NLA_HDRLEN + payload; }


x86 assembly (clang, -O0):
<nla_attr_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_attr_size>:
mov    %edi,%eax
mov    0x2ed7(%rip),%rcx
add    (%rcx),%eax
ret

LLVM IR (-O0):
@NLA_HDRLEN = global i32 0
define i32 @nla_attr_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @NLA_HDRLEN
%4 = load i32, i32* %2
%5 = add nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
@NLA_HDRLEN = global i32 0
define i32 @nla_attr_size(i32 %0) {
%2 = load i32, i32* @NLA_HDRLEN
%3 = add nsw i32 %2, %0
ret i32 %3
}
__attribute__((always_)) int thread_create(void *p1) {
  int ret;
  asm volatile("int $0x80" : "=a"(ret) : "0"(6), "c"(p1));
  return ret;
}


x86 assembly (clang, -O0):
<thread_create>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x6,%eax
int    $0x80
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_create>:
mov    %rdi,%rcx
mov    $0x6,%eax
int    $0x80
ret

LLVM IR (-O0):
define i32 @thread_create(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 asm sideeffect "int $$0x80", "={ax},0,{cx},~{dirflag},~{fpsr},~{flags}"(i32 6, i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @thread_create(i8* %0) {
%2 = tail call i32 asm sideeffect "int $$0x80", "={ax},0,{cx},~{dirflag},~{fpsr},~{flags}"(i32 6, i8* %0)
ret i32 %2
}
void debug_msg(const char *str) {}


x86 assembly (clang, -O0):
<debug_msg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_msg>:
ret

LLVM IR (-O0):
define void @debug_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @debug_msg(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int test(void *ptr) {
  free(ptr);
  free(ptr);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rbx
mov    %rdi,%rbx
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define i32 @test(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
%6 = load i8*, i8** %3
%7 = call i32 @free(i8* %6)
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @test(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
%3 = tail call i32 @free(i8* %0)
ret i32 undef
}
int signals_install_handlers(void) { return 0; }


x86 assembly (clang, -O0):
<signals_install_handlers>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signals_install_handlers>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @signals_install_handlers() {
ret i32 0
}

LLVM IR (-O2):
define i32 @signals_install_handlers() {
ret i32 0
}
/* Variables and functions */
int atoi(char *);
int partition(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int sum = atoi(argv[1]);
  int largestNumber = 100;
  printf("%d\n", partition(sum, largestNumber));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x14(%rbp)
movl   $0x64,-0x18(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1030 <partition@plt>
mov    %eax,%esi
lea    0xe8f(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
mov    $0x64,%esi
call   1030 <partition@plt>
lea    0xeb3(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @atoi(i8* %10)
store i32 %11, i32* %6
store i32 100, i32* %7
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = call i32 @partition(i32 %12, i32 %13)
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = tail call i32 @partition(i32 %5, i32 100)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
char const *somejunk(char);
__attribute__((no)) const char *ihaveareffunc2(char opt) {
  return somejunk(opt + 2);
}


x86 assembly (clang, -O0):
<ihaveareffunc2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x2,%eax
movsbl %al,%edi
call   1030 <somejunk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ihaveareffunc2>:
add    $0x2,%dil
movsbl %dil,%edi
jmp    1030 <somejunk@plt>

LLVM IR (-O0):
define i8* @ihaveareffunc2(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = add nsw i32 %4, 2
%6 = trunc i32 %5 to i8
%7 = call i8* @somejunk(i8 signext %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @ihaveareffunc2(i8 signext %0) {
%2 = add i8 %0, 2
%3 = tail call i8* @somejunk(i8 signext %2)
ret i8* %3
}
int main() {
  int a = 3;
  int b = a = 4;
  return (a + b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0x4,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
store i32 4, i32* %2
store i32 4, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 8
}
/* Type definitions */
struct hashtable {
  int dummy;
};

/* Variables and functions */
void *ht_find_raw(struct hashtable *, void *);
void *ht_find_raw_def(struct hashtable *ht, void *key, void *def_value) {
  void *res = ht_find_raw(ht, key);
  return res ? res : def_value;
}


x86 assembly (clang, -O0):
<ht_find_raw_def>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ht_find_raw@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     114d <ht_find_raw_def+0x3d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    1155 <ht_find_raw_def+0x45>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ht_find_raw_def>:
push   %rbx
mov    %rdx,%rbx
call   1030 <ht_find_raw@plt>
test   %rax,%rax
cmove  %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.hashtable = type { i32 }
define i8* @ht_find_raw_def(%struct.hashtable* %0, i8* %1, i8* %2) {
%4 = alloca %struct.hashtable*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store %struct.hashtable* %0, %struct.hashtable** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load %struct.hashtable*, %struct.hashtable** %4
%9 = load i8*, i8** %5
%10 = call i8* @ht_find_raw(%struct.hashtable* %8, i8* %9)
store i8* %10, i8** %7
%11 = load i8*, i8** %7
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i8*, i8** %7
br label %17
15: ; preds = %3
%16 = load i8*, i8** %6
br label %17
17: ; preds = %15, %13
%18 = phi i8* [ %14, %13 ], [ %16, %15 ]
ret i8* %18
}

LLVM IR (-O2):
%struct.hashtable = type { i32 }
define i8* @ht_find_raw_def(%struct.hashtable* %0, i8* %1, i8* readnone %2) {
%4 = tail call i8* @ht_find_raw(%struct.hashtable* %0, i8* %1)
%5 = icmp eq i8* %4, null
%6 = select i1 %5, i8* %2, i8* %4
ret i8* %6
}
void arch_decomp_setup() {
  *((volatile unsigned long *)(0xc0030000 + 0x0c)) = 0x80808080;
  *((volatile unsigned long *)(0xc0030000 + 0x00)) = 0x36363636;
  *((volatile unsigned long *)(0xc0030000 + 0x04)) = 0;
  *((volatile unsigned long *)(0xc0030000 + 0x0c)) = 0x03030303;
  *((volatile unsigned long *)(0xc0030000 + 0x04)) = 0x0;
  *((volatile unsigned long *)(0xc0030000 + 0x08)) = 0x01010101;
  *((volatile unsigned long *)(0xc0030000 + 0x04)) = 0x40404040;
}


x86 assembly (clang, -O0):
<arch_decomp_setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc003000c,%eax
mov    $0x80808080,%ecx
mov    %rcx,(%rax)
mov    $0xc0030000,%eax
movq   $0x36363636,(%rax)
mov    $0xc0030004,%eax
movq   $0x0,(%rax)
mov    $0xc003000c,%eax
movq   $0x3030303,(%rax)
mov    $0xc0030004,%eax
movq   $0x0,(%rax)
mov    $0xc0030008,%eax
movq   $0x1010101,(%rax)
mov    $0xc0030004,%eax
movq   $0x40404040,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_decomp_setup>:
mov    $0xc0030004,%eax
lea    -0x3f827f84(%rax),%rcx
mov    %rcx,0x8(%rax)
movq   $0x36363636,-0x4(%rax)
36
movq   $0x0,(%rax)
movq   $0x3030303,0x8(%rax)
03
movq   $0x0,(%rax)
movq   $0x1010101,0x4(%rax)
01
movq   $0x40404040,(%rax)
ret

LLVM IR (-O0):
define void @arch_decomp_setup() {
store volatile i64 2155905152, i64* inttoptr (i64 3221422092 to i64*)
store volatile i64 909522486, i64* inttoptr (i64 3221422080 to i64*)
store volatile i64 0, i64* inttoptr (i64 3221422084 to i64*)
store volatile i64 50529027, i64* inttoptr (i64 3221422092 to i64*)
store volatile i64 0, i64* inttoptr (i64 3221422084 to i64*)
store volatile i64 16843009, i64* inttoptr (i64 3221422088 to i64*)
store volatile i64 1077952576, i64* inttoptr (i64 3221422084 to i64*)
ret void
}

LLVM IR (-O2):
define void @arch_decomp_setup() {
store volatile i64 2155905152, i64* inttoptr (i64 3221422092 to i64*)
store volatile i64 909522486, i64* inttoptr (i64 3221422080 to i64*)
store volatile i64 0, i64* inttoptr (i64 3221422084 to i64*)
store volatile i64 50529027, i64* inttoptr (i64 3221422092 to i64*)
store volatile i64 0, i64* inttoptr (i64 3221422084 to i64*)
store volatile i64 16843009, i64* inttoptr (i64 3221422088 to i64*)
store volatile i64 1077952576, i64* inttoptr (i64 3221422084 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void t13(char a) { free(&a); }


x86 assembly (clang, -O0):
<t13>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    -0x1(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t13>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rdi
call   1030 <free@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @t13(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @free(i8* %2)
ret void
}

LLVM IR (-O2):
define void @t13(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xc2() {
  Assert_real((isdigit(194) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              975, ("isdigit should be 0 for 0xc2"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xc2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc2,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3cf,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xc2>:
push   %rax
mov    $0xc2,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3cf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xc2\00"
define void @t_isdigit_0xc2() {
%1 = call i64 @isdigit(i32 194)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 975, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xc2\00"
define void @t_isdigit_0xc2() {
%1 = tail call i64 @isdigit(i32 194)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 975, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
double FakeNoise(int len, double args[]) { return 1.0; }


x86 assembly (clang, -O0):
<FakeNoise>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  0xeed(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FakeNoise>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @FakeNoise(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
store i32 %0, i32* %3
store double* %1, double** %4
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @FakeNoise(i32 %0, double* nocapture readnone %1) {
ret double 1.000000e+00
}
int fb_ConsoleWidth(int cols, int rows) { return 0; }


x86 assembly (clang, -O0):
<fb_ConsoleWidth>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_ConsoleWidth>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fb_ConsoleWidth(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fb_ConsoleWidth(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void platform_usleep(int usec) { usleep(usec); }


x86 assembly (clang, -O0):
<platform_usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_usleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @platform_usleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @platform_usleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret void
}
unsigned redupe_gf_sub(unsigned x, unsigned y) { return x ^ y; }


x86 assembly (clang, -O0):
<redupe_gf_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<redupe_gf_sub>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @redupe_gf_sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @redupe_gf_sub(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
char *strcpy(char *dest, const char *src) {
  char *ret = dest;
  while ((*dest++ = *src++)) {
  };
  return ret;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1143 <strcpy+0x43>
jmp    1114 <strcpy+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
store i8 %10, i8* %11
%13 = icmp ne i8 %10, 0
br i1 %13, label %14, label %15
14: ; preds = %7
br label %7
15: ; preds = %7
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void show_email_addresses(char *email) {
  printf("show_email_addresses %s", email);
  return;
}


x86 assembly (clang, -O0):
<show_email_addresses>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_email_addresses>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"show_email_addresses %s\00"
define void @show_email_addresses(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"show_email_addresses %s\00"
define void @show_email_addresses(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int foo(int a) {
  int b = 1;
  return a + b;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
char *getDataStr(void) {
  char *str = "Hello";
  return str;
}


x86 assembly (clang, -O0):
<getDataStr>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getDataStr>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"Hello\00"
define i8* @getDataStr() {
%1 = alloca i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
@.str = [6 x i8] c"Hello\00"
define i8* @getDataStr() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct devinfo_head {
  int dummy;
};
struct dev_head {
  int dummy;
};

/* Variables and functions */
int devtag_usb_scan(struct dev_head *, struct devinfo_head const *);
int devtag_dev_scan(struct dev_head *result, const struct devinfo_head *sel) {
  return devtag_usb_scan(result, sel);
}


x86 assembly (clang, -O0):
<devtag_dev_scan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <devtag_usb_scan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<devtag_dev_scan>:
jmp    1030 <devtag_usb_scan@plt>

LLVM IR (-O0):
%struct.dev_head = type { i32 }
%struct.devinfo_head = type { i32 }
define i32 @devtag_dev_scan(%struct.dev_head* %0, %struct.devinfo_head* %1) {
%3 = alloca %struct.dev_head*
%4 = alloca %struct.devinfo_head*
store %struct.dev_head* %0, %struct.dev_head** %3
store %struct.devinfo_head* %1, %struct.devinfo_head** %4
%5 = load %struct.dev_head*, %struct.dev_head** %3
%6 = load %struct.devinfo_head*, %struct.devinfo_head** %4
%7 = call i32 @devtag_usb_scan(%struct.dev_head* %5, %struct.devinfo_head* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.dev_head = type { i32 }
%struct.devinfo_head = type { i32 }
define i32 @devtag_dev_scan(%struct.dev_head* %0, %struct.devinfo_head* %1) {
%3 = tail call i32 @devtag_usb_scan(%struct.dev_head* %0, %struct.devinfo_head* %1)
ret i32 %3
}
void INT_Excep_PERIA_INTA254(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIA_INTA254>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIA_INTA254>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIA_INTA254() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIA_INTA254() {
ret void
}
void McASPRxFrameSyncCfg(unsigned int baseAddr, unsigned int fsMode,
                         unsigned int fsWidth, unsigned int fsSetting) {
  (*((volatile unsigned int *)(baseAddr + (0x6C)))) =
      ((fsMode << (0x00000007u)) | fsWidth | fsSetting);
}


x86 assembly (clang, -O0):
<McASPRxFrameSyncCfg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
shl    $0x7,%ecx
or     -0xc(%rbp),%ecx
or     -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x6c,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPRxFrameSyncCfg>:
shl    $0x7,%esi
or     %ecx,%edx
or     %esi,%edx
add    $0x6c,%edi
mov    %edx,(%rdi)
ret

LLVM IR (-O0):
define void @McASPRxFrameSyncCfg(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = shl i32 %9, 7
%11 = load i32, i32* %7
%12 = or i32 %10, %11
%13 = load i32, i32* %8
%14 = or i32 %12, %13
%15 = load i32, i32* %5
%16 = add i32 %15, 108
%17 = zext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
store volatile i32 %14, i32* %18
ret void
}

LLVM IR (-O2):
define void @McASPRxFrameSyncCfg(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 7
%6 = or i32 %5, %2
%7 = or i32 %6, %3
%8 = add i32 %0, 108
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %7, i32* %10
ret void
}
/* Type definitions */
struct ringbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rbuf_align(struct ringbuf *, int, char, int /*<<< orphan*/,
                              char const *);
void rbuf_alignr(struct ringbuf *r, int w, char pad, const char *s) {
  rbuf_align(r, w, pad, 0, s);
}


x86 assembly (clang, -O0):
<rbuf_alignr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0xd(%rbp),%al
mov    -0x18(%rbp),%r8
xor    %ecx,%ecx
movsbl %al,%edx
call   1030 <rbuf_align@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rbuf_alignr>:
mov    %rcx,%r8
xor    %ecx,%ecx
jmp    1030 <rbuf_align@plt>

LLVM IR (-O0):
%struct.ringbuf = type { i32 }
define void @rbuf_alignr(%struct.ringbuf* %0, i32 %1, i8 signext %2, i8* %3) {
%5 = alloca %struct.ringbuf*
%6 = alloca i32
%7 = alloca i8
%8 = alloca i8*
store %struct.ringbuf* %0, %struct.ringbuf** %5
store i32 %1, i32* %6
store i8 %2, i8* %7
store i8* %3, i8** %8
%9 = load %struct.ringbuf*, %struct.ringbuf** %5
%10 = load i32, i32* %6
%11 = load i8, i8* %7
%12 = load i8*, i8** %8
%13 = call i32 @rbuf_align(%struct.ringbuf* %9, i32 %10, i8 signext %11, i32 0, i8* %12)
ret void
}

LLVM IR (-O2):
%struct.ringbuf = type { i32 }
define void @rbuf_alignr(%struct.ringbuf* %0, i32 %1, i8 signext %2, i8* %3) {
%5 = tail call i32 @rbuf_align(%struct.ringbuf* %0, i32 %1, i8 signext %2, i32 0, i8* %3)
ret void
}
int test_imm_BCint64_highword_reg(long long val) {
  return ((val >> 32) & (0xBC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BCint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xbc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BCint64_highword_reg>:
movabs $0xbc00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BCint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 188
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BCint64_highword_reg(i64 %0) {
%2 = and i64 %0, 807453851648
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_typescript_comments() {
  test_parser_verify_parse(test_parser_sourcefile("typescript", " //comment"),
                           "typescript", "", "//comment", 0);
}


x86 assembly (clang, -O0):
<test_typescript_comments>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed9(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xece(%rip),%rdx
lea    0xebe(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_typescript_comments>:
push   %rbx
lea    0xed8(%rip),%rbx
lea    0xedc(%rip),%rsi
mov    %rbx,%rdi
call   1030 <test_parser_sourcefile@plt>
lea    0xed7(%rip),%rdx
lea    0xec7(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
xor    %r8d,%r8d
pop    %rbx
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"typescript\00"
@.str.1 = [11 x i8] c" //comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [10 x i8] c"//comment\00"
define void @test_typescript_comments() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"typescript\00"
@.str.1 = [11 x i8] c" //comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [10 x i8] c"//comment\00"
define void @test_typescript_comments() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}
int foo(int size) {
  int a[size];
  a[size - 10] = 42;
  return a[size - 10] + size;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    0xf(,%rcx,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
sub    $0xa,%ecx
movslq %ecx,%rcx
movl   $0x2a,(%rax,%rcx,4)
mov    -0x4(%rbp),%ecx
sub    $0xa,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
add    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0x2a(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = alloca i32, i64 %6
store i64 %6, i64* %4
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 10
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
store i32 42, i32* %12
%13 = load i32, i32* %2
%14 = sub nsw i32 %13, 10
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %8, i64 %15
%17 = load i32, i32* %16
%18 = load i32, i32* %2
%19 = add nsw i32 %17, %18
%20 = load i8*, i8** %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = add nsw i32 %0, 42
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ ftell(int /*<<< orphan*/ *);
off_t stdio_tell(void *data) {
  FILE *f = (FILE *)data;
  return ftell(f);
}


x86 assembly (clang, -O0):
<stdio_tell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ftell@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdio_tell>:
jmp    1030 <ftell@plt>

LLVM IR (-O0):
define i32 @stdio_tell(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 @ftell(i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @stdio_tell(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @ftell(i32* %2)
ret i32 %3
}
void g_queue_insert_sorted() {}


x86 assembly (clang, -O0):
<g_queue_insert_sorted>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_queue_insert_sorted>:
ret

LLVM IR (-O0):
define void @g_queue_insert_sorted() {
ret void
}

LLVM IR (-O2):
define void @g_queue_insert_sorted() {
ret void
}