#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t fnv_64a_64(uint64_t oid, uint64_t hval) {
  hval ^= oid & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 8 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 16 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 24 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 32 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 40 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 48 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  hval ^= oid >> 56 & 0xff;
  hval *= ((uint64_t)0x100000001b3ULL);
  return hval;
}


x86 assembly (clang, -O0):
<fnv_64a_64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x28,%ecx
sar    %cl,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x30,%ecx
sar    %cl,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x38,%ecx
sar    %cl,%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x1b3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fnv_64a_64>:
ret

LLVM IR (-O0):
define i32 @fnv_64a_64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32, i32* %4
%8 = xor i32 %7, %6
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = mul nsw i32 %9, 435
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = ashr i32 %11, 8
%13 = and i32 %12, 255
%14 = load i32, i32* %4
%15 = xor i32 %14, %13
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = mul nsw i32 %16, 435
store i32 %17, i32* %4
%18 = load i32, i32* %3
%19 = ashr i32 %18, 16
%20 = and i32 %19, 255
%21 = load i32, i32* %4
%22 = xor i32 %21, %20
store i32 %22, i32* %4
%23 = load i32, i32* %4
%24 = mul nsw i32 %23, 435
store i32 %24, i32* %4
%25 = load i32, i32* %3
%26 = ashr i32 %25, 24
%27 = and i32 %26, 255
%28 = load i32, i32* %4
%29 = xor i32 %28, %27
store i32 %29, i32* %4
%30 = load i32, i32* %4
%31 = mul nsw i32 %30, 435
store i32 %31, i32* %4
%32 = load i32, i32* %3
%33 = ashr i32 %32, 32
%34 = and i32 %33, 255
%35 = load i32, i32* %4
%36 = xor i32 %35, %34
store i32 %36, i32* %4
%37 = load i32, i32* %4
%38 = mul nsw i32 %37, 435
store i32 %38, i32* %4
%39 = load i32, i32* %3
%40 = ashr i32 %39, 40
%41 = and i32 %40, 255
%42 = load i32, i32* %4
%43 = xor i32 %42, %41
store i32 %43, i32* %4
%44 = load i32, i32* %4
%45 = mul nsw i32 %44, 435
store i32 %45, i32* %4
%46 = load i32, i32* %3
%47 = ashr i32 %46, 48
%48 = and i32 %47, 255
%49 = load i32, i32* %4
%50 = xor i32 %49, %48
store i32 %50, i32* %4
%51 = load i32, i32* %4
%52 = mul nsw i32 %51, 435
store i32 %52, i32* %4
%53 = load i32, i32* %3
%54 = ashr i32 %53, 56
%55 = and i32 %54, 255
%56 = load i32, i32* %4
%57 = xor i32 %56, %55
store i32 %57, i32* %4
%58 = load i32, i32* %4
%59 = mul nsw i32 %58, 435
store i32 %59, i32* %4
%60 = load i32, i32* %4
ret i32 %60
}

LLVM IR (-O2):
define i32 @fnv_64a_64(i32 %0, i32 %1) {
ret i32 poison
}