xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ munmap(unsigned long, unsigned long);
void sys_free_virtual_addr(int *pDev, unsigned long virtual_ptr,
                           unsigned long mem_size) {
  close(*pDev);
  munmap(virtual_ptr, mem_size);
}


x86 assembly (clang, -O0):
<sys_free_virtual_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <munmap@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_free_virtual_addr>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
mov    (%rdi),%edi
call   1030 <close@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <munmap@plt>

LLVM IR (-O0):
define void @sys_free_virtual_addr(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = call i32 @close(i32 %8)
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = call i32 @munmap(i64 %10, i64 %11)
ret void
}

LLVM IR (-O2):
define void @sys_free_virtual_addr(i32* nocapture %0, i64 %1, i64 %2) {
%4 = load i32, i32* %0
%5 = tail call i32 @close(i32 %4)
%6 = tail call i32 @munmap(i64 %1, i64 %2)
ret void
}
int test_imm_8Fint16_reg(short val) {
  return ((val) & (0x8F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Fint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x8f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Fint16_reg>:
test   $0x8f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Fint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 143
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Fint16_reg(i16 signext %0) {
%2 = and i16 %0, 143
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ ndm_endian_betoh64(int /*<<< orphan*/ const);
uint64_t ndm_endian_htobe64(const uint64_t x) { return ndm_endian_betoh64(x); }


x86 assembly (clang, -O0):
<ndm_endian_htobe64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ndm_endian_betoh64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndm_endian_htobe64>:
jmp    1030 <ndm_endian_betoh64@plt>

LLVM IR (-O0):
define i32 @ndm_endian_htobe64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ndm_endian_betoh64(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ndm_endian_htobe64(i32 %0) {
%2 = tail call i32 @ndm_endian_betoh64(i32 %0)
ret i32 %2
}
int main() {
  char out = 0x55;
  __asm__("movb $0xFF, %%al; cmpb $0x02, %%al; setc %%al" : "=a"(out));
  return out;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0x55,-0x5(%rbp)
mov    $0xff,%al
cmp    $0x2,%al
setb   %al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xff,%al
cmp    $0x2,%al
setb   %al
movsbl %al,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 85, i8* %2
%3 = call i8 asm "movb $$0xFF, %al; cmpb $$0x02, %al; setc %al", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8 asm "movb $$0xFF, %al; cmpb $$0x02, %al; setc %al", "={ax},~{dirflag},~{fpsr},~{flags}"()
%2 = sext i8 %1 to i32
ret i32 %2
}
/* Type definitions */
struct str {
  int dummy;
};

/* Variables and functions */
char *amf_decode_str(char *, struct str *);
char *amf_decode_nameval(char *data, struct str *name, struct str *val) {
  char *p = data;
  p = amf_decode_str(data, name);
  p++;
  p = amf_decode_str(data, val);
  return p;
}


x86 assembly (clang, -O0):
<amf_decode_nameval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <amf_decode_str@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <amf_decode_str@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<amf_decode_nameval>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <amf_decode_str@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <amf_decode_str@plt>

LLVM IR (-O0):
%struct.str = type { i32 }
define i8* @amf_decode_nameval(i8* %0, %struct.str* %1, %struct.str* %2) {
%4 = alloca i8*
%5 = alloca %struct.str*
%6 = alloca %struct.str*
%7 = alloca i8*
store i8* %0, i8** %4
store %struct.str* %1, %struct.str** %5
store %struct.str* %2, %struct.str** %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
%9 = load i8*, i8** %4
%10 = load %struct.str*, %struct.str** %5
%11 = call i8* @amf_decode_str(i8* %9, %struct.str* %10)
store i8* %11, i8** %7
%12 = load i8*, i8** %7
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %7
%14 = load i8*, i8** %4
%15 = load %struct.str*, %struct.str** %6
%16 = call i8* @amf_decode_str(i8* %14, %struct.str* %15)
store i8* %16, i8** %7
%17 = load i8*, i8** %7
ret i8* %17
}

LLVM IR (-O2):
%struct.str = type { i32 }
define i8* @amf_decode_nameval(i8* %0, %struct.str* %1, %struct.str* %2) {
%4 = tail call i8* @amf_decode_str(i8* %0, %struct.str* %1)
%5 = tail call i8* @amf_decode_str(i8* %0, %struct.str* %2)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void csperf_config_display_short_help() {
  printf("Usage: csperf [-s|-c host] [options]\n");
  printf("Try csperf -h for more information\n");
}


x86 assembly (clang, -O0):
<csperf_config_display_short_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeff(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<csperf_config_display_short_help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf01(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"Usage: csperf [-s|-c host] [options]\0A\00"
@.str.1 = [36 x i8] c"Try csperf -h for more information\0A\00"
define void @csperf_config_display_short_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [37 x i8] c"Usage: csperf [-s|-c host] [options]\00"
@str.2 = [35 x i8] c"Try csperf -h for more information\00"
define void @csperf_config_display_short_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.2, i64 0, i64 0))
ret void
}
void put_misc_cg(struct misc_cg *cg) {}


x86 assembly (clang, -O0):
<put_misc_cg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_misc_cg>:
ret

LLVM IR (-O0):
%struct.misc_cg = type opaque
define void @put_misc_cg(%struct.misc_cg* %0) {
%2 = alloca %struct.misc_cg*
store %struct.misc_cg* %0, %struct.misc_cg** %2
ret void
}

LLVM IR (-O2):
%struct.misc_cg = type opaque
define void @put_misc_cg(%struct.misc_cg* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pcap_clo_register();
int /*<<< orphan*/ zakuta_clo_register();
int zk_clo_init() {
  zakuta_clo_register();
  pcap_clo_register();
  return 0;
}


x86 assembly (clang, -O0):
<zk_clo_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <zakuta_clo_register@plt>
mov    $0x0,%al
call   1030 <pcap_clo_register@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zk_clo_init>:
push   %rax
xor    %eax,%eax
call   1040 <zakuta_clo_register@plt>
xor    %eax,%eax
call   1030 <pcap_clo_register@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @zk_clo_init() {
%1 = call i32 (...) @zakuta_clo_register()
%2 = call i32 (...) @pcap_clo_register()
ret i32 0
}

LLVM IR (-O2):
define i32 @zk_clo_init() {
%1 = tail call i32 (...) @zakuta_clo_register()
%2 = tail call i32 (...) @pcap_clo_register()
ret i32 0
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISDIR(int /*<<< orphan*/);
int /*<<< orphan*/ stat(char *, struct stat *);
int is_dir(char *path) {
  struct stat s;
  stat(path, &s);
  return S_ISDIR(s.st_mode);
}


x86 assembly (clang, -O0):
<is_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <stat@plt>
mov    -0x10(%rbp),%edi
call   1030 <S_ISDIR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dir>:
push   %rax
mov    %rsp,%rsi
call   1040 <stat@plt>
mov    (%rsp),%edi
pop    %rax
jmp    1030 <S_ISDIR@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @is_dir(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @stat(i8* %4, %struct.stat* %3)
%6 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%7 = load i32, i32* %6
%8 = call i32 @S_ISDIR(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @is_dir(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @S_ISDIR(i32 %6)
ret i32 %7
}
void mp_squh_use_in1fft(int n, int radix, double inoutfft[], int out[],
                        int nfft, int ip[], double w[]) {
  void rdft(int n, int isgn, double *a, int *ip, double *w);
  void mp_mul_csqu(int nfft, double dinout[]);
  void mp_mul_d2i(int n, int radix, int nfft, double din[], int out[]);
  mp_mul_csqu(nfft, inoutfft);
  rdft(nfft, -1, &inoutfft[1], ip, w);
  mp_mul_d2i(n, radix, nfft, inoutfft, out);
}


x86 assembly (clang, -O0):
<mp_squh_use_in1fft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x1c(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <mp_mul_csqu@plt>
mov    -0x1c(%rbp),%edi
mov    -0x10(%rbp),%rdx
add    $0x8,%rdx
mov    -0x28(%rbp),%rcx
mov    0x10(%rbp),%r8
mov    $0xffffffff,%esi
call   1040 <rdft@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x1c(%rbp),%edx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
call   1050 <mp_mul_d2i@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_squh_use_in1fft>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %r9,%r15
mov    %r8d,%ebp
mov    %rcx,(%rsp)
mov    %rdx,%rbx
mov    %esi,%r12d
mov    %edi,%r13d
mov    0x40(%rsp),%r14
mov    %r8d,%edi
mov    %rdx,%rsi
call   1030 <mp_mul_csqu@plt>
lea    0x8(%rbx),%rdx
mov    %ebp,%edi
mov    $0xffffffff,%esi
mov    %r15,%rcx
mov    %r14,%r8
call   1040 <rdft@plt>
mov    %r13d,%edi
mov    %r12d,%esi
mov    %ebp,%edx
mov    %rbx,%rcx
mov    (%rsp),%r8
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <mp_mul_d2i@plt>

LLVM IR (-O0):
define void @mp_squh_use_in1fft(i32 %0, i32 %1, double* %2, i32* %3, i32 %4, i32* %5, double* %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca double*
%11 = alloca i32*
%12 = alloca i32
%13 = alloca i32*
%14 = alloca double*
store i32 %0, i32* %8
store i32 %1, i32* %9
store double* %2, double** %10
store i32* %3, i32** %11
store i32 %4, i32* %12
store i32* %5, i32** %13
store double* %6, double** %14
%15 = load i32, i32* %12
%16 = load double*, double** %10
%17 = load i32, i32* %12
%18 = load double*, double** %10
%19 = getelementptr inbounds double, double* %18, i64 1
%20 = load i32*, i32** %13
%21 = load double*, double** %14
%22 = load i32, i32* %8
%23 = load i32, i32* %9
%24 = load i32, i32* %12
%25 = load double*, double** %10
%26 = load i32*, i32** %11
ret void
}

LLVM IR (-O2):
define void @mp_squh_use_in1fft(i32 %0, i32 %1, double* %2, i32* %3, i32 %4, i32* %5, double* %6) {
tail call void @mp_mul_csqu(i32 %4, double* %2)
%8 = getelementptr inbounds double, double* %2, i64 1
tail call void @rdft(i32 %4, i32 -1, double* %8, i32* %5, double* %6)
tail call void @mp_mul_d2i(i32 %0, i32 %1, i32 %4, double* %2, i32* %3)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ strcpy(char *, char *);
void howdy_1(void) {
  char *string;
  string = (char *)malloc(80);
  if (string == (char *)NULL) {
    puts("Not enough memory");
  }
  strcpy(string, "Howdy! Howdy! Hi!");
  printf("%s\n", string);
}


x86 assembly (clang, -O0):
<howdy_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x50,%edi
call   1060 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    116d <howdy_1+0x2d>
lea    0xe98(%rip),%rdi
call   1040 <puts@plt>
mov    -0x8(%rbp),%rdi
lea    0xe9a(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rsi
lea    0xe9c(%rip),%rdi
call   1050 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<howdy_1>:
push   %rbx
mov    $0x50,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    115f <howdy_1+0x1f>
lea    0xea6(%rip),%rdi
call   1040 <puts@plt>
lea    0xeac(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcpy@plt>
lea    0xeaf(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1050 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Not enough memory\00"
@.str.1 = [18 x i8] c"Howdy! Howdy! Hi!\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define void @howdy_1() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 80)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @puts(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %0
%9 = load i8*, i8** %1
%10 = call i32 @strcpy(i8* %9, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%11 = load i8*, i8** %1
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %11)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Not enough memory\00"
@.str.1 = [18 x i8] c"Howdy! Howdy! Hi!\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define void @howdy_1() {
%1 = tail call i64 @malloc(i32 80)
%2 = inttoptr i64 %1 to i8*
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = tail call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %2)
ret void
}
int ordinary_hello(void) { return 10; }


x86 assembly (clang, -O0):
<ordinary_hello>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ordinary_hello>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @ordinary_hello() {
ret i32 10
}

LLVM IR (-O2):
define i32 @ordinary_hello() {
ret i32 10
}
void EUSCIA2_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<EUSCIA2_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <EUSCIA2_IRQHandler+0x9>
jmp    1109 <EUSCIA2_IRQHandler+0x9>

x86 assembly (clang, -O2):
<EUSCIA2_IRQHandler>:
jmp    1100 <EUSCIA2_IRQHandler>

LLVM IR (-O0):
define void @EUSCIA2_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @EUSCIA2_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void event_fatal_error(s) char *s;
{
  event_error(s);
  exit(1);
}


x86 assembly (clang, -O0):
<event_fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <event_error@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<event_fatal_error>:
push   %rax
xor    %eax,%eax
call   1030 <event_error@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @event_fatal_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @event_error to i32 (i8*, ...)*)(i8* %3)
unreachable
}

LLVM IR (-O2):
define void @event_fatal_error(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @event_error to i32 (i8*, ...)*)(i8* %0)
tail call void @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ vsscanf(char *, char *, int /*<<< orphan*/);
void uninivar_vsscanf(void) {
  char *s;
  char *format;
  va_list arg;
  (void)vsscanf(s, format, arg);
}


x86 assembly (clang, -O0):
<uninivar_vsscanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <vsscanf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninivar_vsscanf>:
jmp    1030 <vsscanf@plt>

LLVM IR (-O0):
define void @uninivar_vsscanf() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i32
%4 = load i8*, i8** %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = call i32 @vsscanf(i8* %4, i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @uninivar_vsscanf() {
%1 = tail call i32 @vsscanf(i8* undef, i8* undef, i32 undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void __attribute__((constructor)) init(void) { write(1, "0", 1); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edx
lea    0xee0(%rip),%rsi
mov    %edx,%edi
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"0\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"0\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
void g_thread_error_quark() {}


x86 assembly (clang, -O0):
<g_thread_error_quark>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_thread_error_quark>:
ret

LLVM IR (-O0):
define void @g_thread_error_quark() {
ret void
}

LLVM IR (-O2):
define void @g_thread_error_quark() {
ret void
}
char *str_strip_lead_end_space(str)
char *str;
{ return str_strip_lead_space(str_strip_end_space(str)); }


x86 assembly (clang, -O0):
<str_strip_lead_end_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <str_strip_end_space@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1030 <str_strip_lead_space@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_strip_lead_end_space>:
push   %rax
xor    %eax,%eax
call   1040 <str_strip_end_space@plt>
mov    %eax,%edi
xor    %eax,%eax
call   1030 <str_strip_lead_space@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @str_strip_lead_end_space(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @str_strip_end_space to i32 (i8*, ...)*)(i8* %3)
%5 = call i32 (i32, ...) bitcast (i32 (...)* @str_strip_lead_space to i32 (i32, ...)*)(i32 %4)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
define i8* @str_strip_lead_end_space(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @str_strip_end_space to i32 (i8*, ...)*)(i8* %0)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @str_strip_lead_space to i32 (i32, ...)*)(i32 %2)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void testblock(void *ptr, size_t width) {
  char *arr_realloced = ptr;
  for (size_t i = 0; i < width; i++) {
    printf("%c", arr_realloced[i]);
  }
  return;
}


x86 assembly (clang, -O0):
<testblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1167 <testblock+0x57>
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
lea    0xeb3(%rip),%rdi
movsbl (%rax,%rcx,1),%esi
call   1030 <printf@plt>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1130 <testblock+0x20>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testblock>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     1146 <testblock+0x36>
mov    %rsi,%r12
mov    %rdi,%r14
xor    %ebx,%ebx
lea    0xed4(%rip),%r15
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%esi
mov    %r15,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <testblock+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @testblock(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
store i64 0, i64* %6
br label %8
8: ; preds = %18, %2
%9 = load i64, i64* %6
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = load i64, i64* %6
%15 = getelementptr inbounds i8, i8* %13, i64 %14
%16 = load i8, i8* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %16)
br label %18
18: ; preds = %12
%19 = load i64, i64* %6
%20 = add i64 %19, 1
store i64 %20, i64* %6
br label %8
21: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @testblock(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %10, %5 ], [ 0, %2 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %8)
%10 = add nuw i64 %6, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %4, label %5
}
int hash(int id) { return id % 10; }


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 10
ret i32 %4
}

LLVM IR (-O2):
define i32 @hash(i32 %0) {
%2 = srem i32 %0, 10
ret i32 %2
}
int calc_bytes_per_sample_f32_mono(int channel_count) { return sizeof(float); }


x86 assembly (clang, -O0):
<calc_bytes_per_sample_f32_mono>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_bytes_per_sample_f32_mono>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @calc_bytes_per_sample_f32_mono(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 4
}

LLVM IR (-O2):
define i32 @calc_bytes_per_sample_f32_mono(i32 %0) {
ret i32 4
}
/* Variables and functions */
int incr(int);
int main() {
  int a = 2;
  a = (1 + 2) + incr(a + 1);
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1030 <incr@plt>
add    $0x3,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1030 <incr@plt>
add    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = call i32 @incr(i32 %4)
%6 = add nsw i32 3, %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @incr(i32 3)
%2 = add nsw i32 %1, 3
ret i32 %2
}
int debug_rcu_head_queue(struct rcu_head *head) { return 0; }


x86 assembly (clang, -O0):
<debug_rcu_head_queue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_rcu_head_queue>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.rcu_head = type opaque
define i32 @debug_rcu_head_queue(%struct.rcu_head* %0) {
%2 = alloca %struct.rcu_head*
store %struct.rcu_head* %0, %struct.rcu_head** %2
ret i32 0
}

LLVM IR (-O2):
%struct.rcu_head = type opaque
define i32 @debug_rcu_head_queue(%struct.rcu_head* nocapture readnone %0) {
ret i32 0
}
void ff_hevc_put_hevc_uni_w_qpel_v12_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v12_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v12_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v12_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v12_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dbg_break();
void gdb_arch_get_register(void) { dbg_break(); }


x86 assembly (clang, -O0):
<gdb_arch_get_register>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dbg_break@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdb_arch_get_register>:
xor    %eax,%eax
jmp    1030 <dbg_break@plt>

LLVM IR (-O0):
define void @gdb_arch_get_register() {
%1 = call i32 (...) @dbg_break()
ret void
}

LLVM IR (-O2):
define void @gdb_arch_get_register() {
%1 = tail call i32 (...) @dbg_break()
ret void
}
/* Variables and functions */
int random();
char generate_channel() {
  char c = 0;
  c = (random() % 14) + 1;
  return c;
}


x86 assembly (clang, -O0):
<generate_channel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
mov    $0xe,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %dl,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_channel>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
movslq %eax,%rcx
imul   $0xffffffff92492493,%rcx,%rdx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%eax
shr    $0x1f,%eax
shr    $0x3,%edx
add    %eax,%edx
mov    %edx,%esi
shl    $0x4,%esi
mov    %edx,%eax
sub    %esi,%eax
add    %edx,%eax
add    %ecx,%eax
add    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @generate_channel() {
%1 = alloca i8
store i8 0, i8* %1
%2 = call i32 (...) @random()
%3 = srem i32 %2, 14
%4 = add nsw i32 %3, 1
%5 = trunc i32 %4 to i8
store i8 %5, i8* %1
%6 = load i8, i8* %1
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @generate_channel() {
%1 = tail call i32 (...) @random()
%2 = srem i32 %1, 14
%3 = trunc i32 %2 to i8
%4 = add nsw i8 %3, 1
ret i8 %4
}
void map(char *s, char (*f)(char)) {
  while (*s != '\0') {
    *s = f(*s);
    s++;
  }
}


x86 assembly (clang, -O0):
<map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1146 <map+0x46>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%edi
call   *%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <map+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1134 <map+0x34>
mov    %rsi,%r14
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%edi
call   *%r14
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <map+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @map(i8* %0, i8 (i8)* %1) {
%3 = alloca i8*
%4 = alloca i8 (i8)*
store i8* %0, i8** %3
store i8 (i8)* %1, i8 (i8)** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8 (i8)*, i8 (i8)** %4
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = call signext i8 %11(i8 signext %13)
%15 = load i8*, i8** %3
store i8 %14, i8* %15
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %5
18: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @map(i8* nocapture %0, i8 (i8)* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %10, %5 ], [ %3, %2 ]
%7 = phi i8* [ %9, %5 ], [ %0, %2 ]
%8 = tail call signext i8 %1(i8 signext %6)
store i8 %8, i8* %7
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %2
ret void
}
/* Variables and functions */
char ardser(char *);
int /*<<< orphan*/ printf(char *, char);
int main() {
  while (1) {
    char serd = ardser("-b 9600 -p /dev/ttyACM0 -r");
    printf("datafrom serial: ", serd);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <ardser@plt>
mov    %al,-0x5(%rbp)
lea    0xed6(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
jmp    112f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%r14
lea    0xee9(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %r14,%rdi
call   1040 <ardser@plt>
movsbl %al,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
jmp    1140 <main+0x20>

LLVM IR (-O0):
@.str = [27 x i8] c"-b 9600 -p /dev/ttyACM0 -r\00"
@.str.1 = [18 x i8] c"datafrom serial: \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %0, %3
%4 = call signext i8 @ardser(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i8 signext %5)
br label %3
}

LLVM IR (-O2):
@.str = [27 x i8] c"-b 9600 -p /dev/ttyACM0 -r\00"
@.str.1 = [18 x i8] c"datafrom serial: \00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call signext i8 @ardser(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i8 signext %2)
br label %1
}
int test_imm_D3int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0xD3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D3int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0xd3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D3int64_highword_mem>:
testb  $0xd3,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D3int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 211
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D3int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 906238099456
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int true_action(const char *fileName, struct stat *statbuf, void *userData,
                int depth) {
  return ((int)1);
}


x86 assembly (clang, -O0):
<true_action>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<true_action>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.stat = type opaque
define i32 @true_action(i8* %0, %struct.stat* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca %struct.stat*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store %struct.stat* %1, %struct.stat** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
ret i32 1
}

LLVM IR (-O2):
%struct.stat = type opaque
define i32 @true_action(i8* nocapture readnone %0, %struct.stat* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
ret i32 1
}
void rop3_236_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D & T;
  stk1 = S | stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_236_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_236_1_0>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_236_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = and i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = xor i32 %25, -1
%27 = and i32 %23, %26
%28 = load i8*, i8** %4
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = and i32 %30, %32
%34 = or i32 %27, %33
%35 = trunc i32 %34 to i8
%36 = load i8*, i8** %4
store i8 %35, i8* %36
ret void
}

LLVM IR (-O2):
define void @rop3_236_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %5, %4
store i8 %6, i8* %0
ret void
}
void pnpbios_proc_exit(void) { ; }


x86 assembly (clang, -O0):
<pnpbios_proc_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pnpbios_proc_exit>:
ret

LLVM IR (-O0):
define void @pnpbios_proc_exit() {
ret void
}

LLVM IR (-O2):
define void @pnpbios_proc_exit() {
ret void
}
extern void timer_acknowledge(void) {
  *(volatile unsigned char *)(0 + 0x37) = 0x80;
}


x86 assembly (clang, -O0):
<timer_acknowledge>:
push   %rbp
mov    %rsp,%rbp
mov    $0x37,%eax
movb   $0x80,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_acknowledge>:
movb   $0x80,0x37
80
ret

LLVM IR (-O0):
define void @timer_acknowledge() {
store volatile i8 -128, i8* inttoptr (i64 55 to i8*)
ret void
}

LLVM IR (-O2):
define void @timer_acknowledge() {
store volatile i8 -128, i8* inttoptr (i64 55 to i8*)
ret void
}
void __clear_bit(int nr, volatile unsigned long *addr) {
  unsigned long mask = (1UL << ((nr) % (8 * 8)));
  unsigned long *p = ((unsigned long *)addr) + ((nr) / (8 * 8));
  *p &= ~mask;
}


x86 assembly (clang, -O0):
<__clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
mov    -0x20(%rbp),%rax
and    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__clear_bit>:
mov    %edi,%ecx
lea    0x3f(%rcx),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x6,%eax
mov    $0xfffffffffffffffe,%rdx
rol    %cl,%rdx
cltq
and    %rdx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
define void @__clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = srem i32 %7, 64
%9 = zext i32 %8 to i64
%10 = shl i64 1, %9
store i64 %10, i64* %5
%11 = load i64*, i64** %4
%12 = load i32, i32* %3
%13 = sdiv i32 %12, 64
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %11, i64 %14
store i64* %15, i64** %6
%16 = load i64, i64* %5
%17 = xor i64 %16, -1
%18 = load i64*, i64** %6
%19 = load i64, i64* %18
%20 = and i64 %19, %17
store i64 %20, i64* %18
ret void
}

LLVM IR (-O2):
define void @__clear_bit(i32 %0, i64* nocapture %1) {
%3 = srem i32 %0, 64
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = sdiv i32 %0, 64
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = xor i64 %5, -1
%10 = load i64, i64* %8
%11 = and i64 %10, %9
store i64 %11, i64* %8
ret void
}
char *strrchr(register const char *s, int c) {
  register const char *p;
  p = 0;
  do {
    if (*s == (char)c) {
      p = s;
    }
  } while (*s++);
  return (char *)p;
}


x86 assembly (clang, -O0):
<strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0xc(%rbp),%ecx
movsbl %cl,%ecx
cmp    %ecx,%eax
jne    1130 <strrchr+0x30>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1135 <strrchr+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
jne    1113 <strrchr+0x13>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strrchr>:
movsbl %sil,%ecx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
movsbl (%rdi),%edx
cmp    %edx,%ecx
cmove  %rdi,%rax
add    $0x1,%rdi
test   %edx,%edx
jne    1110 <strrchr+0x10>
ret

LLVM IR (-O0):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8* null, i8** %5
br label %6
6: ; preds = %17, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %4
%11 = trunc i32 %10 to i8
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %9, %12
br i1 %13, label %14, label %16
14: ; preds = %6
%15 = load i8*, i8** %3
store i8* %15, i8** %5
br label %16
16: ; preds = %14, %6
br label %17
17: ; preds = %16
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
%20 = load i8, i8* %18
%21 = icmp ne i8 %20, 0
br i1 %21, label %6, label %22
22: ; preds = %17
%23 = load i8*, i8** %5
ret i8* %23
}

LLVM IR (-O2):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = shl i32 %1, 24
%4 = ashr exact i32 %3, 24
br label %5
5: ; preds = %5, %2
%6 = phi i8* [ %0, %2 ], [ %12, %5 ]
%7 = phi i8* [ null, %2 ], [ %11, %5 ]
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %4, %9
%11 = select i1 %10, i8* %6, i8* %7
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = icmp eq i8 %8, 0
br i1 %13, label %14, label %5
14: ; preds = %5
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ free_all_privatekey();
int /*<<< orphan*/ free_all_publickey();
int /*<<< orphan*/ generate_key();
int main(int argc, char *argv[]) {
  generate_key();
  free_all_publickey();
  free_all_privatekey();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <generate_key@plt>
mov    $0x0,%al
call   1030 <free_all_publickey@plt>
mov    $0x0,%al
call   1040 <free_all_privatekey@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <generate_key@plt>
xor    %eax,%eax
call   1030 <free_all_publickey@plt>
xor    %eax,%eax
call   1040 <free_all_privatekey@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @generate_key()
%7 = call i32 (...) @free_all_publickey()
%8 = call i32 (...) @free_all_privatekey()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @generate_key()
%4 = tail call i32 (...) @free_all_publickey()
%5 = tail call i32 (...) @free_all_privatekey()
ret i32 0
}
int scmp(char *s1, char *s2) {
  while (*s1 != '\0' && *s1 == *s2) {
    s1++;
    s2++;
  }
  return (*s1 - *s2);
}


x86 assembly (clang, -O0):
<scmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     1137 <scmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <scmp+0x47>
jmp    1164 <scmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <scmp+0xc>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scmp>:
mov    (%rdi),%al
test   %al,%al
je     1123 <scmp+0x23>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
cmp    (%rsi),%al
jne    1125 <scmp+0x25>
add    $0x1,%rsi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <scmp+0x10>
xor    %eax,%eax
movsbl %al,%eax
movsbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @scmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br label %18
18: ; preds = %10, %5
%19 = phi i1 [ false, %5 ], [ %17, %10 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = sext i8 %27 to i32
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = sext i8 %30 to i32
%32 = sub nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @scmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %14, %11 ], [ %3, %2 ]
%7 = phi i8* [ %13, %11 ], [ %1, %2 ]
%8 = phi i8* [ %12, %11 ], [ %0, %2 ]
%9 = load i8, i8* %7
%10 = icmp eq i8 %6, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %11, %2
%17 = phi i8* [ %1, %2 ], [ %13, %11 ], [ %7, %5 ]
%18 = phi i8 [ 0, %2 ], [ 0, %11 ], [ %6, %5 ]
%19 = sext i8 %18 to i32
%20 = load i8, i8* %17
%21 = sext i8 %20 to i32
%22 = sub nsw i32 %19, %21
ret i32 %22
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
double default_rnd() { return ((double)rand()) / ((double)RAND_MAX + 1.0); }


x86 assembly (clang, -O0):
<default_rnd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xecc(%rip),%xmm2
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_rnd>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
cvtsi2sdq (%rax),%xmm1
addsd  0xecf(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @default_rnd() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double %2, %5
ret double %6
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @default_rnd() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double %2, %5
ret double %6
}
float my_cos1(float x) { return 1.0f - x * x * 0.5f; }


x86 assembly (clang, -O0):
<my_cos1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xed8(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed0(%rip),%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_cos1>:
mulss  %xmm0,%xmm0
mulss  0xef4(%rip),%xmm0
addss  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define float @my_cos1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = fneg float %5
%7 = call float @llvm.fmuladd.f32(float %6, float 5.000000e-01, float 1.000000e+00)
ret float %7
}

LLVM IR (-O2):
define float @my_cos1(float %0) {
%2 = fneg float %0
%3 = fmul float %2, %0
%4 = tail call float @llvm.fmuladd.f32(float %3, float 5.000000e-01, float 1.000000e+00)
ret float %4
}
/* Variables and functions */
int ENOSYS;
int proc_set_frequency(unsigned int cpu, unsigned long target_frequency) {
  return -ENOSYS;
}


x86 assembly (clang, -O0):
<proc_set_frequency>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ed4(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_set_frequency>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @proc_set_frequency(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* @ENOSYS
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @proc_set_frequency(i32 %0, i64 %1) {
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
ret i32 %4
}