xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ cppUngetc(int const);
int /*<<< orphan*/ skipToMatch(char *);
int skipToNonWhite();
void skipBraces(void) {
  const int c = skipToNonWhite();
  if (c == '{')
    skipToMatch("{}");
  else
    cppUngetc(c);
}


x86 assembly (clang, -O0):
<skipBraces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <skipToNonWhite@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x7b,-0x4(%rbp)
jne    115d <skipBraces+0x2d>
lea    0xead(%rip),%rdi
call   1040 <skipToMatch@plt>
jmp    1165 <skipBraces+0x35>
mov    -0x4(%rbp),%edi
call   1050 <cppUngetc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipBraces>:
push   %rax
xor    %eax,%eax
call   1030 <skipToNonWhite@plt>
cmp    $0x7b,%eax
jne    114a <skipBraces+0x1a>
lea    0xebc(%rip),%rdi
pop    %rax
jmp    1040 <skipToMatch@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <cppUngetc@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"{}\00"
define void @skipBraces() {
%1 = alloca i32
%2 = call i32 (...) @skipToNonWhite()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 123
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @skipToMatch(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %10
7: ; preds = %0
%8 = load i32, i32* %1
%9 = call i32 @cppUngetc(i32 %8)
br label %10
10: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"{}\00"
define void @skipBraces() {
%1 = tail call i32 (...) @skipToNonWhite()
%2 = icmp eq i32 %1, 123
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @skipToMatch(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %0
%6 = tail call i32 @cppUngetc(i32 %1)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
float ANTweenTimingFunctionQuadInOut(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionQuadInOut(float time, float duration) {
  return ANTweenTimingFunctionQuadInOut(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionQuadInOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionQuadInOut@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionQuadInOut>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionQuadInOut@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionQuadInOut(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionQuadInOut(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionQuadInOut(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionQuadInOut(float %0, i32 0, i32 1, float %1)
ret float %3
}
int rand_r(unsigned int *seedp) {
  *seedp = (unsigned int)(*seedp * 16546134871 + 513585871) % (204814687);
  return (int)(*seedp) >> 1;
}


x86 assembly (clang, -O0):
<rand_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
movabs $0x3da39fb57,%rcx
imul   %rcx,%rax
add    $0x1e9cb2cf,%rax
mov    $0xc35395f,%ecx
xor    %edx,%edx
div    %ecx
mov    -0x8(%rbp),%rax
mov    %edx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
sar    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_r>:
imul   $0xda39fb57,(%rdi),%eax
add    $0x1e9cb2cf,%eax
mov    $0xa7c297d5,%ecx
imul   %rax,%rcx
shr    $0x3b,%rcx
imul   $0xc35395f,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,(%rdi)
shr    %eax
ret

LLVM IR (-O0):
define i32 @rand_r(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = zext i32 %4 to i64
%6 = mul nsw i64 %5, 16546134871
%7 = add nsw i64 %6, 513585871
%8 = trunc i64 %7 to i32
%9 = urem i32 %8, 204814687
%10 = load i32*, i32** %2
store i32 %9, i32* %10
%11 = load i32*, i32** %2
%12 = load i32, i32* %11
%13 = ashr i32 %12, 1
ret i32 %13
}

LLVM IR (-O2):
define i32 @rand_r(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul i32 %2, -633734313
%4 = add i32 %3, 513585871
%5 = urem i32 %4, 204814687
store i32 %5, i32* %0
%6 = lshr i32 %5, 1
ret i32 %6
}
char test_37_0(char *mem) { return __atomic_add_fetch(mem + 4, 1, 4); }


x86 assembly (clang, -O0):
<test_37_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,%al
lock xadd %al,0x4(%rdx)
add    %cl,%al
mov    %al,-0xa(%rbp)
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_37_0>:
mov    $0x1,%al
lock xadd %al,0x4(%rdi)
add    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @test_37_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 4
store i8 1, i8* %3
%7 = load i8, i8* %3
%8 = atomicrmw add i8* %6, i8 %7 acq_rel
%9 = add i8 %8, %7
store i8 %9, i8* %4
%10 = load i8, i8* %4
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @test_37_0(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 4
%3 = atomicrmw add i8* %2, i8 1 acq_rel
%4 = add i8 %3, 1
ret i8 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void clear_screen(FILE *output) {
  (void)fprintf(output, "\n\n=========================================\n");
}


x86 assembly (clang, -O0):
<clear_screen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_screen>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x2c,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"\0A\0A=========================================\0A\00"
define void @clear_screen(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [45 x i8] c"\0A\0A=========================================\0A\00"
define void @clear_screen(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i64 44, i64 1, i32* %0)
ret void
}
void VSunload(void) {}


x86 assembly (clang, -O0):
<VSunload>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VSunload>:
ret

LLVM IR (-O0):
define void @VSunload() {
ret void
}

LLVM IR (-O2):
define void @VSunload() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void USBHostAddrSet(uint32_t ui32Base, uint32_t ui32Endpoint, uint32_t ui32Addr,
                    uint32_t ui32Flags) {
  ;

  ;
  if (ui32Flags & 0x00002000) {
    (*((volatile unsigned char *)(ui32Base + 0x00000080 +
                                  (ui32Endpoint >> 1)))) = ui32Addr;
  } else {
    (*((volatile unsigned char *)(ui32Base + 0x00000080 + 4 +
                                  (ui32Endpoint >> 1)))) = ui32Addr;
  }
}


x86 assembly (clang, -O0):
<USBHostAddrSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0x2000,%eax
cmp    $0x0,%eax
je     113f <USBHostAddrSet+0x3f>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x4(%rbp),%eax
add    $0x80,%eax
mov    -0x8(%rbp),%edx
sar    $0x1,%edx
add    %edx,%eax
cltq
mov    %cl,(%rax)
jmp    115b <USBHostAddrSet+0x5b>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x4(%rbp),%eax
add    $0x80,%eax
add    $0x4,%eax
mov    -0x8(%rbp),%edx
sar    $0x1,%edx
add    %edx,%eax
cltq
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostAddrSet>:
xor    %eax,%eax
test   $0x2000,%ecx
sete   %al
lea    (%rdi,%rax,4),%eax
add    $0x80,%eax
sar    %esi
cltq
movslq %esi,%rcx
mov    %dl,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define void @USBHostAddrSet(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = and i32 %9, 8192
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = load i32, i32* %7
%14 = trunc i32 %13 to i8
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 128
%17 = load i32, i32* %6
%18 = ashr i32 %17, 1
%19 = add nsw i32 %16, %18
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i8*
store volatile i8 %14, i8* %21
br label %33
22: ; preds = %4
%23 = load i32, i32* %7
%24 = trunc i32 %23 to i8
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 128
%27 = add nsw i32 %26, 4
%28 = load i32, i32* %6
%29 = ashr i32 %28, 1
%30 = add nsw i32 %27, %29
%31 = sext i32 %30 to i64
%32 = inttoptr i64 %31 to i8*
store volatile i8 %24, i8* %32
br label %33
33: ; preds = %22, %12
ret void
}

LLVM IR (-O2):
define void @USBHostAddrSet(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %3, 8192
%6 = icmp eq i32 %5, 0
%7 = trunc i32 %2 to i8
%8 = select i1 %6, i32 132, i32 128
%9 = add nsw i32 %8, %0
%10 = ashr i32 %1, 1
%11 = add nsw i32 %9, %10
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
store volatile i8 %7, i8* %13
ret void
}
void beep_off(void) {}


x86 assembly (clang, -O0):
<beep_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beep_off>:
ret

LLVM IR (-O0):
define void @beep_off() {
ret void
}

LLVM IR (-O2):
define void @beep_off() {
ret void
}
void iwl_leds_exit(struct iwl_priv *priv) {}


x86 assembly (clang, -O0):
<iwl_leds_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<iwl_leds_exit>:
ret

LLVM IR (-O0):
%struct.iwl_priv = type opaque
define void @iwl_leds_exit(%struct.iwl_priv* %0) {
%2 = alloca %struct.iwl_priv*
store %struct.iwl_priv* %0, %struct.iwl_priv** %2
ret void
}

LLVM IR (-O2):
%struct.iwl_priv = type opaque
define void @iwl_leds_exit(%struct.iwl_priv* nocapture %0) {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ window;
};
struct TYPE_4__ {
  TYPE_1__ xmapping;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xmapping_window(void *_p) {
  return (unsigned long)((XEvent *)_p)->xmapping.window;
}


x86 assembly (clang, -O0):
<get_XEvent_xmapping_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xmapping_window>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xmapping_window(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xmapping_window(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void print_trace(void) {}


x86 assembly (clang, -O0):
<print_trace>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_trace>:
ret

LLVM IR (-O0):
define void @print_trace() {
ret void
}

LLVM IR (-O2):
define void @print_trace() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ARCH_SET_GS;
int /*<<< orphan*/ EXIT_FAILURE;
scalar_t__ arch_prctl(int /*<<< orphan*/, unsigned long);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void set_gs(void *addr) {
  if (arch_prctl(ARCH_SET_GS, (unsigned long)addr)) {
    perror("arch_prctl(ARCH_SET_GS)");
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<set_gs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <arch_prctl@plt>
cmp    $0x0,%rax
je     1172 <set_gs+0x42>
lea    0xea1(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e75(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_gs>:
push   %rax
mov    %rdi,%rsi
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1030 <arch_prctl@plt>
test   %rax,%rax
jne    1149 <set_gs+0x19>
pop    %rax
ret
lea    0xeb0(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@ARCH_SET_GS = global i32 0
@.str = [24 x i8] c"arch_prctl(ARCH_SET_GS)\00"
@EXIT_FAILURE = global i32 0
define void @set_gs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @ARCH_SET_GS
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
%6 = call i64 @arch_prctl(i32 %3, i64 %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = call i32 @perror(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @EXIT_FAILURE
%11 = call i32 @exit(i32 %10)
unreachable
12: ; preds = %1
ret void
}

LLVM IR (-O2):
@ARCH_SET_GS = global i32 0
@.str = [24 x i8] c"arch_prctl(ARCH_SET_GS)\00"
@EXIT_FAILURE = global i32 0
define void @set_gs(i8* %0) {
%2 = load i32, i32* @ARCH_SET_GS
%3 = ptrtoint i8* %0 to i64
%4 = tail call i64 @arch_prctl(i32 %2, i64 %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = tail call i32 @perror(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_flag(int, int);
void set_halfcarry(bool set) { set_flag(5, set); }


x86 assembly (clang, -O0):
<set_halfcarry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x5,%edi
call   1030 <set_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_halfcarry>:
mov    %edi,%esi
mov    $0x5,%edi
jmp    1030 <set_flag@plt>

LLVM IR (-O0):
define void @set_halfcarry(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @set_flag(i32 5, i32 %3)
ret void
}

LLVM IR (-O2):
define void @set_halfcarry(i32 %0) {
%2 = tail call i32 @set_flag(i32 5, i32 %0)
ret void
}
/* Type definitions */
struct timeval {
  int tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
long timeval_diff(struct timeval *a, struct timeval *b) {
  long r = 0;
  r = (a->tv_sec - b->tv_sec) * 1000000;
  r += (a->tv_usec - b->tv_usec);
  return r;
}


x86 assembly (clang, -O0):
<timeval_diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
imul   $0xf4240,%eax,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
sub    0x8(%rcx),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_diff>:
movslq (%rdi),%rax
movslq (%rsi),%rcx
sub    %rcx,%rax
imul   $0xf4240,%rax,%rcx
mov    0x8(%rdi),%rax
sub    0x8(%rsi),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i64 @timeval_diff(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
%5 = alloca i64
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
store i64 0, i64* %5
%6 = load %struct.timeval*, %struct.timeval** %3
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = load %struct.timeval*, %struct.timeval** %4
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %9, i32 0, i32 0
%11 = load i32, i32* %10
%12 = sub nsw i32 %8, %11
%13 = mul nsw i32 %12, 1000000
%14 = sext i32 %13 to i64
store i64 %14, i64* %5
%15 = load %struct.timeval*, %struct.timeval** %3
%16 = getelementptr inbounds %struct.timeval, %struct.timeval* %15, i32 0, i32 1
%17 = load i64, i64* %16
%18 = load %struct.timeval*, %struct.timeval** %4
%19 = getelementptr inbounds %struct.timeval, %struct.timeval* %18, i32 0, i32 1
%20 = load i64, i64* %19
%21 = sub nsw i64 %17, %20
%22 = load i64, i64* %5
%23 = add nsw i64 %22, %21
store i64 %23, i64* %5
%24 = load i64, i64* %5
ret i64 %24
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i64 @timeval_diff(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
%8 = mul nsw i32 %7, 1000000
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%11 = load i64, i64* %10
%12 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%13 = load i64, i64* %12
%14 = sub i64 %11, %13
%15 = add nsw i64 %14, %9
ret i64 %15
}
void led_init() { *((volatile unsigned long *)0x7f008820) = 0x1111; }


x86 assembly (clang, -O0):
<led_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f008820,%eax
movq   $0x1111,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_init>:
movq   $0x1111,0x7f008820
ret

LLVM IR (-O0):
define void @led_init() {
store volatile i64 4369, i64* inttoptr (i64 2130741280 to i64*)
ret void
}

LLVM IR (-O2):
define void @led_init() {
store volatile i64 4369, i64* inttoptr (i64 2130741280 to i64*)
ret void
}
long jdiv12_round_up(long a, long b) { return (a + b - 1L) / b; }


x86 assembly (clang, -O0):
<jdiv12_round_up>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
sub    $0x1,%rax
cqto
idivq  -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<jdiv12_round_up>:
lea    (%rdi,%rsi,1),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     111a <jdiv12_round_up+0x1a>
cqto
idiv   %rsi
ret
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i64 @jdiv12_round_up(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
%8 = sub nsw i64 %7, 1
%9 = load i64, i64* %4
%10 = sdiv i64 %8, %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @jdiv12_round_up(i64 %0, i64 %1) {
%3 = add i64 %0, -1
%4 = add i64 %3, %1
%5 = sdiv i64 %4, %1
ret i64 %5
}
/* Variables and functions */
int open(char *, int);
int ALT_posix_openpt(int flags) { return open("/dev/ptmx", flags); }


x86 assembly (clang, -O0):
<ALT_posix_openpt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ALT_posix_openpt>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <open@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"/dev/ptmx\00"
define i32 @ALT_posix_openpt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [10 x i8] c"/dev/ptmx\00"
define i32 @ALT_posix_openpt(i32 %0) {
%2 = tail call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ UINT32_MAX;
int /*<<< orphan*/ printf(char *, scalar_t__, float);
int main(void) {
  uint32_t val;
  for (val = 0; val <= UINT32_MAX; val++)
    printf("%d %.24f\n", val, (float)val);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ec6(%rip),%rcx
cmp    (%rcx),%rax
jg     1162 <main+0x52>
mov    -0x10(%rbp),%rsi
cvtsi2ssq -0x10(%rbp),%xmm0
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1127 <main+0x17>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
mov    0x2edc(%rip),%r15
cmpq   $0x0,(%r15)
js     114c <main+0x3c>
mov    $0xffffffffffffffff,%rbx
lea    0xed0(%rip),%r14
add    $0x1,%rbx
xorps  %xmm0,%xmm0
cvtsi2ss %rbx,%xmm0
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
cmp    (%r15),%rbx
jl     1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@UINT32_MAX = global i64 0
@.str = [10 x i8] c"%d %.24f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
br label %3
3: ; preds = %12, %0
%4 = load i64, i64* %2
%5 = load i64, i64* @UINT32_MAX
%6 = icmp sle i64 %4, %5
br i1 %6, label %7, label %15
7: ; preds = %3
%8 = load i64, i64* %2
%9 = load i64, i64* %2
%10 = sitofp i64 %9 to float
%11 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %8, float %10)
br label %12
12: ; preds = %7
%13 = load i64, i64* %2
%14 = add nsw i64 %13, 1
store i64 %14, i64* %2
br label %3
15: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@UINT32_MAX = global i64 0
@.str = [10 x i8] c"%d %.24f\0A\00"
define i32 @main() {
%1 = load i64, i64* @UINT32_MAX
%2 = icmp slt i64 %1, 0
br i1 %2, label %10, label %3
3: ; preds = %0, %3
%4 = phi i64 [ %7, %3 ], [ 0, %0 ]
%5 = sitofp i64 %4 to float
%6 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %4, float %5)
%7 = add nuw nsw i64 %4, 1
%8 = load i64, i64* @UINT32_MAX
%9 = icmp slt i64 %4, %8
br i1 %9, label %3, label %10
10: ; preds = %3, %0
ret i32 0
}
/* Variables and functions */
void gforth_cacheflush(void *p, size_t size) {}


x86 assembly (clang, -O0):
<gforth_cacheflush>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gforth_cacheflush>:
ret

LLVM IR (-O0):
define void @gforth_cacheflush(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @gforth_cacheflush(i8* nocapture %0, i64 %1) {
ret void
}
void RandomFunc(unsigned short input[1], unsigned short output[1]) {
  unsigned short state[1];
  unsigned short local1;
  {
    state[0UL] = input[0UL] + (unsigned short)2885;
    local1 = 0UL;
    while (local1 < (unsigned short)0) {
      if (state[0UL] > local1) {
      }
      local1 += 2UL;
    }
    output[0UL] = state[0UL] * 371143069UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
add    $0xb45,%eax
mov    %ax,-0x12(%rbp)
movw   $0x0,-0x14(%rbp)
movzwl -0x14(%rbp),%eax
cmp    $0x0,%eax
jge    1155 <RandomFunc+0x55>
movzwl -0x12(%rbp),%eax
movzwl -0x14(%rbp),%ecx
cmp    %ecx,%eax
jle    1144 <RandomFunc+0x44>
jmp    1144 <RandomFunc+0x44>
movzwl -0x14(%rbp),%eax
add    $0x2,%rax
mov    %ax,-0x14(%rbp)
jmp    1122 <RandomFunc+0x22>
movzwl -0x12(%rbp),%eax
imul   $0x161f319d,%rax,%rax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movzwl (%rdi),%eax
imul   $0x319d,%eax,%eax
add    $0x1e51,%eax
mov    %ax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca [1 x i16]
%6 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i64 0
%9 = load i16, i16* %8
%10 = zext i16 %9 to i32
%11 = add nsw i32 %10, 2885
%12 = trunc i32 %11 to i16
%13 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
store i16 %12, i16* %13
store i16 0, i16* %6
br label %14
14: ; preds = %26, %2
%15 = load i16, i16* %6
%16 = zext i16 %15 to i32
%17 = icmp slt i32 %16, 0
br i1 %17, label %18, label %31
18: ; preds = %14
%19 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%20 = load i16, i16* %19
%21 = zext i16 %20 to i32
%22 = load i16, i16* %6
%23 = zext i16 %22 to i32
%24 = icmp sgt i32 %21, %23
br i1 %24, label %25, label %26
25: ; preds = %18
br label %26
26: ; preds = %25, %18
%27 = load i16, i16* %6
%28 = zext i16 %27 to i64
%29 = add i64 %28, 2
%30 = trunc i64 %29 to i16
store i16 %30, i16* %6
br label %14
31: ; preds = %14
%32 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%33 = load i16, i16* %32
%34 = zext i16 %33 to i64
%35 = mul i64 %34, 371143069
%36 = trunc i64 %35 to i16
%37 = load i16*, i16** %4
%38 = getelementptr inbounds i16, i16* %37, i64 0
store i16 %36, i16* %38
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i16* nocapture %0, i16* nocapture writeonly %1) {
%3 = load i16, i16* %0
%4 = mul i16 %3, 12701
%5 = add i16 %4, 7761
store i16 %5, i16* %1
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EBADF;
int /*<<< orphan*/ errno;
int fstat(int file, struct stat *st) {
  errno = EBADF;
  return -1;
}


x86 assembly (clang, -O0):
<fstat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec5(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstat>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@EBADF = global i32 0
@errno = global i32 0
define i32 @fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i32, i32* @EBADF
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@EBADF = global i32 0
@errno = global i32 0
define i32 @fstat(i32 %0, %struct.stat* nocapture readnone %1) {
%3 = load i32, i32* @EBADF
store i32 %3, i32* @errno
ret i32 -1
}
void dummy1(void *p) {}


x86 assembly (clang, -O0):
<dummy1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy1>:
ret

LLVM IR (-O0):
define void @dummy1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @dummy1(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Inst_Printf(char *, char *, ...);
void Move_Ret_To_Foreign_D(int index) {
  Inst_Printf("lda", "$1,pl_foreign_double");
  Inst_Printf("stt", "$f0,%d($1)", index * 8);
}


x86 assembly (clang, -O0):
<Move_Ret_To_Foreign_D>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
lea    0xedb(%rip),%rsi
mov    $0x0,%al
call   1030 <Inst_Printf@plt>
mov    -0x4(%rbp),%edx
shl    $0x3,%edx
lea    0xedc(%rip),%rdi
lea    0xed9(%rip),%rsi
mov    $0x0,%al
call   1030 <Inst_Printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Move_Ret_To_Foreign_D>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
lea    0xee3(%rip),%rsi
xor    %eax,%eax
call   1030 <Inst_Printf@plt>
shl    $0x3,%ebx
lea    0xee7(%rip),%rdi
lea    0xee4(%rip),%rsi
mov    %ebx,%edx
xor    %eax,%eax
pop    %rbx
jmp    1030 <Inst_Printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"lda\00"
@.str.1 = [21 x i8] c"$1,pl_foreign_double\00"
@.str.2 = [4 x i8] c"stt\00"
@.str.3 = [11 x i8] c"$f0,%d($1)\00"
define void @Move_Ret_To_Foreign_D(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, i8*, ...) @Inst_Printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 8
%6 = call i32 (i8*, i8*, ...) @Inst_Printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"lda\00"
@.str.1 = [21 x i8] c"$1,pl_foreign_double\00"
@.str.2 = [4 x i8] c"stt\00"
@.str.3 = [11 x i8] c"$f0,%d($1)\00"
define void @Move_Ret_To_Foreign_D(i32 %0) {
%2 = tail call i32 (i8*, i8*, ...) @Inst_Printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
%3 = shl nsw i32 %0, 3
%4 = tail call i32 (i8*, i8*, ...) @Inst_Printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i32 %3)
ret void
}
char cambioCHAR(int a) {
  a = (char)(a + 48);
  return a;
}


x86 assembly (clang, -O0):
<cambioCHAR>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%eax
movsbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cambioCHAR>:
lea    0x30(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @cambioCHAR(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 48
%5 = trunc i32 %4 to i8
%6 = sext i8 %5 to i32
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = trunc i32 %7 to i8
ret i8 %8
}

LLVM IR (-O2):
define signext i8 @cambioCHAR(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = add i8 %2, 48
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ heart_out_to_body_diastolic_pace();
void pacer_to_heart_diastolic_pace() { heart_out_to_body_diastolic_pace(); }


x86 assembly (clang, -O0):
<pacer_to_heart_diastolic_pace>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <heart_out_to_body_diastolic_pace@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pacer_to_heart_diastolic_pace>:
xor    %eax,%eax
jmp    1030 <heart_out_to_body_diastolic_pace@plt>

LLVM IR (-O0):
define void @pacer_to_heart_diastolic_pace() {
%1 = call i32 (...) @heart_out_to_body_diastolic_pace()
ret void
}

LLVM IR (-O2):
define void @pacer_to_heart_diastolic_pace() {
%1 = tail call i32 (...) @heart_out_to_body_diastolic_pace()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void rank_free(void *p) {
  if (p)
    free(p);
}


x86 assembly (clang, -O0):
<rank_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <rank_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rank_free>:
test   %rdi,%rdi
je     111a <rank_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @rank_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @rank_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
struct node {
  int dummy;
};
struct generator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ write_comment(struct generator *, struct node *);
int /*<<< orphan*/ write_failure(struct generator *);
void generate_false(struct generator *g, struct node *p) {
  write_comment(g, p);
  write_failure(g);
}


x86 assembly (clang, -O0):
<generate_false>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <write_comment@plt>
mov    -0x8(%rbp),%rdi
call   1030 <write_failure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_false>:
push   %rbx
mov    %rdi,%rbx
call   1040 <write_comment@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <write_failure@plt>

LLVM IR (-O0):
%struct.generator = type { i32 }
%struct.node = type { i32 }
define void @generate_false(%struct.generator* %0, %struct.node* %1) {
%3 = alloca %struct.generator*
%4 = alloca %struct.node*
store %struct.generator* %0, %struct.generator** %3
store %struct.node* %1, %struct.node** %4
%5 = load %struct.generator*, %struct.generator** %3
%6 = load %struct.node*, %struct.node** %4
%7 = call i32 @write_comment(%struct.generator* %5, %struct.node* %6)
%8 = load %struct.generator*, %struct.generator** %3
%9 = call i32 @write_failure(%struct.generator* %8)
ret void
}

LLVM IR (-O2):
%struct.generator = type { i32 }
%struct.node = type { i32 }
define void @generate_false(%struct.generator* %0, %struct.node* %1) {
%3 = tail call i32 @write_comment(%struct.generator* %0, %struct.node* %1)
%4 = tail call i32 @write_failure(%struct.generator* %0)
ret void
}
/* Variables and functions */
int EOF;
int stdin_read() { return EOF; }


x86 assembly (clang, -O0):
<stdin_read>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdin_read>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @stdin_read() {
%1 = load i32, i32* @EOF
ret i32 %1
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @stdin_read() {
%1 = load i32, i32* @EOF
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ bubble(int *, int);
int /*<<< orphan*/ gera_sem_repeticao(int *, int);
int /*<<< orphan*/ mostra(int *, int, char *);
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/);
int main() {
  int v[6];
  srand(time(0));
  gera_sem_repeticao(v, 6);
  bubble(v, 6);
  mostra(v, 6, "Resultado: ");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1060 <time@plt>
mov    %eax,%edi
call   1050 <srand@plt>
lea    -0x20(%rbp),%rdi
mov    $0x6,%esi
call   1070 <gera_sem_repeticao@plt>
lea    -0x20(%rbp),%rdi
mov    $0x6,%esi
call   1030 <bubble@plt>
lea    -0x20(%rbp),%rdi
mov    $0x6,%esi
lea    0xe67(%rip),%rdx
call   1040 <mostra@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
xor    %edi,%edi
call   1060 <time@plt>
mov    %eax,%edi
call   1050 <srand@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x6,%esi
call   1070 <gera_sem_repeticao@plt>
mov    %rbx,%rdi
mov    $0x6,%esi
call   1030 <bubble@plt>
lea    0xe79(%rip),%rdx
mov    %rbx,%rdi
mov    $0x6,%esi
call   1040 <mostra@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Resultado: \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i32]
store i32 0, i32* %1
%3 = call i32 @time(i32 0)
%4 = call i32 @srand(i32 %3)
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%6 = call i32 @gera_sem_repeticao(i32* %5, i32 6)
%7 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%8 = call i32 @bubble(i32* %7, i32 6)
%9 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%10 = call i32 @mostra(i32* %9, i32 6, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Resultado: \00"
define i32 @main() {
%1 = alloca [6 x i32]
%2 = bitcast [6 x i32]* %1 to i8*
%3 = tail call i32 @time(i32 0)
%4 = tail call i32 @srand(i32 %3)
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%6 = call i32 @gera_sem_repeticao(i32* %5, i32 6)
%7 = call i32 @bubble(i32* %5, i32 6)
%8 = call i32 @mostra(i32* %5, i32 6, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t GPIODirModeGet(uint32_t ui32Port, uint8_t ui8Pin) {
  uint32_t ui32Dir, ui32AFSEL;
  ;
  ;
  ui8Pin = 1 << ui8Pin;
  ui32Dir = (*((volatile uint32_t *)(ui32Port + 0x00000400)));
  ui32AFSEL = (*((volatile uint32_t *)(ui32Port + 0x00000420)));
  return (((ui32Dir & ui8Pin) ? 1 : 0) | ((ui32AFSEL & ui8Pin) ? 2 : 0));
}


x86 assembly (clang, -O0):
<GPIODirModeGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x400,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x420,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edx
and    -0x8(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    -0x10(%rbp),%esi
and    -0x8(%rbp),%esi
xor    %ecx,%ecx
mov    $0x2,%edx
cmp    $0x0,%esi
cmovne %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIODirModeGet>:
mov    %esi,%ecx
movslq %edi,%rax
mov    0x400(%rax),%edx
mov    0x420(%rax),%eax
shr    %cl,%edx
and    $0x1,%edx
xor    %esi,%esi
bt     %ecx,%eax
setb   %sil
lea    (%rdx,%rsi,2),%eax
ret

LLVM IR (-O0):
define i32 @GPIODirModeGet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = shl i32 1, %7
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1024
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
store i32 %13, i32* %5
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1056
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
store i32 %18, i32* %6
%19 = load i32, i32* %5
%20 = load i32, i32* %4
%21 = and i32 %19, %20
%22 = icmp ne i32 %21, 0
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 1, i32 0
%25 = load i32, i32* %6
%26 = load i32, i32* %4
%27 = and i32 %25, %26
%28 = icmp ne i32 %27, 0
%29 = zext i1 %28 to i64
%30 = select i1 %28, i32 2, i32 0
%31 = or i32 %24, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @GPIODirModeGet(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = add nsw i32 %0, 1024
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = add nsw i32 %0, 1056
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = lshr i32 %7, %1
%13 = and i32 %12, 1
%14 = and i32 %11, %3
%15 = icmp eq i32 %14, 0
%16 = select i1 %15, i32 0, i32 2
%17 = or i32 %16, %13
ret i32 %17
}
/* Variables and functions */
int addsum(int, int);
int /*<<< orphan*/ printf(char *, int, int, int);
int main() {
  int a = 5;
  int b = 6;
  printf("%d + %d = %d\n", a, b, addsum(a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <addsum@plt>
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    %eax,%ecx
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x6,%esi
call   1040 <addsum@plt>
lea    0xec9(%rip),%rdi
mov    $0x5,%esi
mov    $0x6,%edx
mov    %eax,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%d + %d = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
store i32 6, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = call i32 @addsum(i32 %6, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5, i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"%d + %d = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @addsum(i32 5, i32 6)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 5, i32 6, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int usage(void) {
  fprintf(stderr, "Usage: matl [-o file] [-s host[:port]] command\n");
  return 2;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [48 x i8] c"Usage: matl [-o file] [-s host[:port]] command\0A\00"
define i32 @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret i32 2
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [48 x i8] c"Usage: matl [-o file] [-s host[:port]] command\0A\00"
define i32 @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret i32 2
}
int test_imm_68uint8_mem(unsigned char *val) {
  return ((*val) & (0x68 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_68uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_68uint8_mem>:
testb  $0x68,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_68uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 104
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_68uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 104
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int iio_simple_dummy_events_register(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<iio_simple_dummy_events_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iio_simple_dummy_events_register>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @iio_simple_dummy_events_register(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @iio_simple_dummy_events_register(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
long write(int, char *, long);
long int portwrite2(int fd, char data2[]) {
  long int len = 2, n = 0;
  n = write(fd, data2, len);
  if (n < 0) {
    fputs("write failed!\n", stderr);
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<portwrite2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x2,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <write@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jge    1180 <portwrite2+0x60>
mov    0x2e7b(%rip),%rax
mov    (%rax),%esi
lea    0xe92(%rip),%rdi
call   1040 <fputs@plt>
movq   $0x0,-0x8(%rbp)
jmp    1188 <portwrite2+0x68>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<portwrite2>:
push   %rax
mov    $0x2,%edx
call   1030 <write@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
js     113a <portwrite2+0x1a>
pop    %rcx
ret
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
lea    0xeb6(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"write failed!\0A\00"
@stderr = global i32 0
define i64 @portwrite2(i32 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 2, i64* %6
store i64 0, i64* %7
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 @write(i32 %8, i8* %9, i64 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %2
%15 = load i32, i32* @stderr
%16 = call i32 @fputs(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %15)
store i64 0, i64* %3
br label %18
17: ; preds = %2
store i64 1, i64* %3
br label %18
18: ; preds = %17, %14
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
@.str = [15 x i8] c"write failed!\0A\00"
@stderr = global i32 0
define i64 @portwrite2(i32 %0, i8* nocapture %1) {
%3 = tail call i64 @write(i32 %0, i8* %1, i64 2)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fputs(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %2, %5
%9 = phi i64 [ 0, %5 ], [ 1, %2 ]
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ timestamp();
void Notice(char *message) {
  timestamp();
  printf("%s", message);
}


x86 assembly (clang, -O0):
<Notice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <timestamp@plt>
mov    -0x8(%rbp),%rsi
lea    0xec2(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Notice>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <timestamp@plt>
lea    0xece(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @Notice(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @timestamp()
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @Notice(i8* %0) {
%2 = tail call i32 (...) @timestamp()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
long f2() {
  long t = "asdfasdf";
  return "asdf";
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeee(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"asdfasdf\00"
@.str.1 = [5 x i8] c"asdf\00"
define i64 @f2() {
%1 = alloca i64
store i64 ptrtoint ([9 x i8]* @.str to i64), i64* %1
ret i64 ptrtoint ([5 x i8]* @.str.1 to i64)
}

LLVM IR (-O2):
@.str.1 = [5 x i8] c"asdf\00"
define i64 @f2() {
ret i64 ptrtoint ([5 x i8]* @.str.1 to i64)
}