xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ arm64_memmove_backwards(void *, void const *, size_t);
int /*<<< orphan*/ arm64_memmove_forwards(void *, void const *, size_t);
void arm64_memmove(void *dest, const void *src, size_t len) {
  if (dest <= src) {
    arm64_memmove_forwards(dest, src, len);
  } else {
    arm64_memmove_backwards(dest, src, len);
  }
}


x86 assembly (clang, -O0):
<arm64_memmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
ja     1158 <arm64_memmove+0x38>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <arm64_memmove_forwards@plt>
jmp    1169 <arm64_memmove+0x49>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <arm64_memmove_backwards@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm64_memmove>:
cmp    %rsi,%rdi
jbe    112a <arm64_memmove+0xa>
jmp    1040 <arm64_memmove_backwards@plt>
jmp    1030 <arm64_memmove_forwards@plt>

LLVM IR (-O0):
define void @arm64_memmove(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = icmp ule i8* %7, %8
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = load i64, i64* %6
%14 = call i32 @arm64_memmove_forwards(i8* %11, i8* %12, i64 %13)
br label %20
15: ; preds = %3
%16 = load i8*, i8** %4
%17 = load i8*, i8** %5
%18 = load i64, i64* %6
%19 = call i32 @arm64_memmove_backwards(i8* %16, i8* %17, i64 %18)
br label %20
20: ; preds = %15, %10
ret void
}

LLVM IR (-O2):
define void @arm64_memmove(i8* %0, i8* %1, i64 %2) {
%4 = icmp ugt i8* %0, %1
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @arm64_memmove_forwards(i8* %0, i8* %1, i64 %2)
br label %9
7: ; preds = %3
%8 = tail call i32 @arm64_memmove_backwards(i8* %0, i8* %1, i64 %2)
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int i, j, c;
  i = 0;
  if (c) {
  }
  j = i + 1;
  assert(j == 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1135 <main+0x25>
jmp    1135 <main+0x25>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
br label %8
8: ; preds = %7, %0
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 1
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
void azkfs_inode_add(struct super_block *vsb, struct inode *inode) {}


x86 assembly (clang, -O0):
<azkfs_inode_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<azkfs_inode_add>:
ret

LLVM IR (-O0):
%struct.super_block = type opaque
%struct.inode = type opaque
define void @azkfs_inode_add(%struct.super_block* %0, %struct.inode* %1) {
%3 = alloca %struct.super_block*
%4 = alloca %struct.inode*
store %struct.super_block* %0, %struct.super_block** %3
store %struct.inode* %1, %struct.inode** %4
ret void
}

LLVM IR (-O2):
%struct.super_block = type opaque
%struct.inode = type opaque
define void @azkfs_inode_add(%struct.super_block* nocapture %0, %struct.inode* nocapture %1) {
ret void
}
double log_gprob(double delta, double variance) {
  return -delta * delta / (2 * variance);
}


x86 assembly (clang, -O0):
<log_gprob>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xec9(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_gprob>:
movapd 0xef8(%rip),%xmm2
xorpd  %xmm0,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @log_gprob(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fneg double %5
%7 = load double, double* %3
%8 = fmul double %6, %7
%9 = load double, double* %4
%10 = fmul double 2.000000e+00, %9
%11 = fdiv double %8, %10
ret double %11
}

LLVM IR (-O2):
define double @log_gprob(double %0, double %1) {
%3 = fneg double %0
%4 = fmul double %3, %0
%5 = fmul double %1, 2.000000e+00
%6 = fdiv double %4, %5
ret double %6
}
void GI2C1_RequestBus(void) {}


x86 assembly (clang, -O0):
<GI2C1_RequestBus>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GI2C1_RequestBus>:
ret

LLVM IR (-O0):
define void @GI2C1_RequestBus() {
ret void
}

LLVM IR (-O2):
define void @GI2C1_RequestBus() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
float __VERIFIER_nondet_float();
int main() {
  float x;
  x = __VERIFIER_nondet_float();
  __VERIFIER_assert(x == x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_float@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_float@plt>
xor    %edi,%edi
ucomiss %xmm0,%xmm0
setnp  %dil
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call float (...) @__VERIFIER_nondet_float()
store float %3, float* %2
%4 = load float, float* %2
%5 = load float, float* %2
%6 = fcmp oeq float %4, %5
%7 = zext i1 %6 to i32
%8 = call i32 @__VERIFIER_assert(i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call float (...) @__VERIFIER_nondet_float()
%2 = fcmp ord float %1, 0.000000e+00
%3 = zext i1 %2 to i32
%4 = tail call i32 @__VERIFIER_assert(i32 %3)
ret i32 0
}
char case3(void) {
  char j = 0;
  char *z = &j;
  j = 1;
  if (*z)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<case3>:
push   %rbp
mov    %rsp,%rbp
movb   $0x0,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
movb   $0x1,-0x2(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     112a <case3+0x2a>
movb   $0x1,-0x1(%rbp)
jmp    112e <case3+0x2e>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<case3>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @case3() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i8*
store i8 0, i8* %2
store i8* %2, i8** %3
store i8 1, i8* %2
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i8 1, i8* %1
br label %9
8: ; preds = %0
store i8 0, i8* %1
br label %9
9: ; preds = %8, %7
%10 = load i8, i8* %1
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @case3() {
ret i8 1
}
/* Variables and functions */
int /*<<< orphan*/ F_UNLCK;
int /*<<< orphan*/ gt_xflock_with_op(int, int /*<<< orphan*/);
void gt_xflock_unlock(int fd) { gt_xflock_with_op(fd, F_UNLCK); }


x86 assembly (clang, -O0):
<gt_xflock_unlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <gt_xflock_with_op@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_xflock_unlock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <gt_xflock_with_op@plt>

LLVM IR (-O0):
@F_UNLCK = global i32 0
define void @gt_xflock_unlock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_UNLCK
%5 = call i32 @gt_xflock_with_op(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@F_UNLCK = global i32 0
define void @gt_xflock_unlock(i32 %0) {
%2 = load i32, i32* @F_UNLCK
%3 = tail call i32 @gt_xflock_with_op(i32 %0, i32 %2)
ret void
}
const char *indent(int n) {
  static char buf[(16 * 2) + 1] = {0};
  int i;
  if (buf[0] == 0) {
    for (i = 0; i < (16 * 2); ++i) {
      buf[i] = ' ';
    }
  }
  if (n > 16) {
    n = 16;
  }
  return buf + (16 - n) * 2;
}


x86 assembly (clang, -O0):
<indent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsbl 0x2f22(%rip),%eax
cmp    $0x0,%eax
jne    114a <indent+0x4a>
movl   $0x0,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jge    1145 <indent+0x45>
movslq -0x8(%rbp),%rcx
lea    0x2efd(%rip),%rax
movb   $0x20,(%rax,%rcx,1)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111e <indent+0x1e>
jmp    114a <indent+0x4a>
cmpl   $0x10,-0x4(%rbp)
jle    115b <indent+0x5b>
movl   $0x10,-0x4(%rbp)
mov    $0x10,%eax
sub    -0x4(%rbp),%eax
shl    $0x1,%eax
movslq %eax,%rcx
lea    0x2ec0(%rip),%rax
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indent>:
cmpb   $0x0,0x2f29(%rip)
jne    111e <indent+0x1e>
movaps 0xef0(%rip),%xmm0
movaps %xmm0,0x2f29(%rip)
movaps %xmm0,0x2f12(%rip)
mov    $0x20,%ecx
sub    %edi,%ecx
sub    %edi,%ecx
xor    %eax,%eax
cmp    $0x10,%edi
cmovl  %ecx,%eax
movslq %eax,%rcx
lea    0x2ef7(%rip),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
@indent.buf = internal global [33 x i8] zeroinitializer
define i8* @indent(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i8, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @indent.buf, i64 0, i64 0)
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %1
store i32 0, i32* %3
br label %8
8: ; preds = %15, %7
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 32
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [33 x i8], [33 x i8]* @indent.buf, i64 0, i64 %13
store i8 32, i8* %14
br label %15
15: ; preds = %11
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %8
18: ; preds = %8
br label %19
19: ; preds = %18, %1
%20 = load i32, i32* %2
%21 = icmp sgt i32 %20, 16
br i1 %21, label %22, label %23
22: ; preds = %19
store i32 16, i32* %2
br label %23
23: ; preds = %22, %19
%24 = load i32, i32* %2
%25 = sub nsw i32 16, %24
%26 = mul nsw i32 %25, 2
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @indent.buf, i64 0, i64 0), i64 %27
ret i8* %28
}

LLVM IR (-O2):
@indent.buf = internal global [33 x i8] zeroinitializer
define i8* @indent(i32 %0) {
%2 = load i8, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @indent.buf, i64 0, i64 0)
%3 = icmp eq i8 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %1
br label %5
5: ; preds = %4, %1
%6 = icmp slt i32 %0, 16
%7 = mul i32 %0, -2
%8 = add i32 %7, 32
%9 = select i1 %6, i32 %8, i32 0
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [33 x i8], [33 x i8]* @indent.buf, i64 0, i64 %10
ret i8* %11
}
void genbgezall_out() {}


x86 assembly (clang, -O0):
<genbgezall_out>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbgezall_out>:
ret

LLVM IR (-O0):
define void @genbgezall_out() {
ret void
}

LLVM IR (-O2):
define void @genbgezall_out() {
ret void
}
/* Type definitions */
struct aiocb64 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int aio_read64(struct aiocb64 *cb) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<aio_read64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aio_read64>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.aiocb64 = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @aio_read64(%struct.aiocb64* %0) {
%2 = alloca %struct.aiocb64*
store %struct.aiocb64* %0, %struct.aiocb64** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.aiocb64 = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @aio_read64(%struct.aiocb64* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ assem_debug(char *, int, int);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ output_w32(int);
void emit_fcvt_s_d(int rs, int rd) {
  assert(rs == 31);
  assert(rd == 31);
  assem_debug("fcvt s%d,d%d", rd, rs);
  output_w32(0x1e624000 | rs << 5 | rd);
}


x86 assembly (clang, -O0):
<emit_fcvt_s_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1f,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
cmpl   $0x1f,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xe93(%rip),%rdi
call   1030 <assem_debug@plt>
mov    -0x4(%rbp),%edi
shl    $0x5,%edi
or     $0x1e624000,%edi
or     -0x8(%rbp),%edi
call   1040 <output_w32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fcvt_s_d>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x1f,%ebx
sete   %dil
call   1050 <assert@plt>
xor    %edi,%edi
cmp    $0x1f,%ebp
sete   %dil
call   1050 <assert@plt>
lea    0xea6(%rip),%rdi
mov    %ebp,%esi
mov    %ebx,%edx
call   1030 <assem_debug@plt>
shl    $0x5,%ebx
or     %ebp,%ebx
or     $0x1e624000,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <output_w32@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"fcvt s%d,d%d\00"
define void @emit_fcvt_s_d(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 31
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 31
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = call i32 @assem_debug(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %14)
%16 = load i32, i32* %3
%17 = shl i32 %16, 5
%18 = or i32 509755392, %17
%19 = load i32, i32* %4
%20 = or i32 %18, %19
%21 = call i32 @output_w32(i32 %20)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"fcvt s%d,d%d\00"
define void @emit_fcvt_s_d(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 31
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp eq i32 %1, 31
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @assem_debug(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%10 = shl i32 %0, 5
%11 = or i32 %10, %1
%12 = or i32 %11, 509755392
%13 = tail call i32 @output_w32(i32 %12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ keyboard_read();
void task_tty() {
  while (1) {
    keyboard_read();
  }
}


x86 assembly (clang, -O0):
<task_tty>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <task_tty+0x9>
mov    $0x0,%al
call   1030 <keyboard_read@plt>
jmp    1119 <task_tty+0x9>

x86 assembly (clang, -O2):
<task_tty>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <keyboard_read@plt>
jmp    1120 <task_tty+0x10>

LLVM IR (-O0):
define void @task_tty() {
br label %1
1: ; preds = %0, %1
%2 = call i32 (...) @keyboard_read()
br label %1
}

LLVM IR (-O2):
define void @task_tty() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @keyboard_read()
br label %1
}
unsigned long CountOnes(unsigned long x) {
  unsigned long t;
  x = x - ((x >> 1) & 0x55555555);
  t = ((x >> 2) & 0x33333333);
  x = (x & 0x33333333) + t;
  x = (x + (x >> 4)) & 0x0F0F0F0F;
  x = x + (x << 8);
  x = x + (x << 16);
  return x >> 24;
}


x86 assembly (clang, -O0):
<CountOnes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x1,%rcx
and    $0x55555555,%rcx
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
and    $0x33333333,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0x33333333,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x4,%rcx
add    %rcx,%rax
and    $0xf0f0f0f,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shl    $0x8,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shl    $0x10,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x18,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CountOnes>:
mov    %rdi,%rax
shr    %rax
and    $0x55555555,%eax
sub    %rax,%rdi
mov    %edi,%eax
shr    $0x2,%eax
and    $0x33333333,%eax
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%rax,%rax
shr    $0x18,%rax
ret

LLVM IR (-O0):
define i64 @CountOnes(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = load i64, i64* %2
%6 = lshr i64 %5, 1
%7 = and i64 %6, 1431655765
%8 = sub i64 %4, %7
store i64 %8, i64* %2
%9 = load i64, i64* %2
%10 = lshr i64 %9, 2
%11 = and i64 %10, 858993459
store i64 %11, i64* %3
%12 = load i64, i64* %2
%13 = and i64 %12, 858993459
%14 = load i64, i64* %3
%15 = add i64 %13, %14
store i64 %15, i64* %2
%16 = load i64, i64* %2
%17 = load i64, i64* %2
%18 = lshr i64 %17, 4
%19 = add i64 %16, %18
%20 = and i64 %19, 252645135
store i64 %20, i64* %2
%21 = load i64, i64* %2
%22 = load i64, i64* %2
%23 = shl i64 %22, 8
%24 = add i64 %21, %23
store i64 %24, i64* %2
%25 = load i64, i64* %2
%26 = load i64, i64* %2
%27 = shl i64 %26, 16
%28 = add i64 %25, %27
store i64 %28, i64* %2
%29 = load i64, i64* %2
%30 = lshr i64 %29, 24
ret i64 %30
}

LLVM IR (-O2):
define i64 @CountOnes(i64 %0) {
%2 = lshr i64 %0, 1
%3 = and i64 %2, 1431655765
%4 = sub i64 %0, %3
%5 = lshr i64 %4, 2
%6 = and i64 %5, 858993459
%7 = and i64 %4, 858993459
%8 = add nuw nsw i64 %6, %7
%9 = lshr i64 %8, 4
%10 = add nuw nsw i64 %9, %8
%11 = and i64 %10, 252645135
%12 = mul nuw nsw i64 %11, 16843009
%13 = lshr i64 %12, 24
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ hires_timer(double *);
void hires_timer_(double *d) { hires_timer(d); }


x86 assembly (clang, -O0):
<hires_timer_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hires_timer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hires_timer_>:
jmp    1030 <hires_timer@plt>

LLVM IR (-O0):
define void @hires_timer_(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @hires_timer(double* %3)
ret void
}

LLVM IR (-O2):
define void @hires_timer_(double* %0) {
%2 = tail call i32 @hires_timer(double* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ start;

/* Variables and functions */
int /*<<< orphan*/ ActivitySelection(int *, int *, int);
int main() {
  int start[] = {1, 3, 1, 5, 6, 8};
  int finish[] = {2, 6, 6, 7, 8, 10};
  int n = sizeof(start) / sizeof(start[0]);
  ActivitySelection(start, finish, n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xed9(%rip),%rax
mov    %rax,-0x40(%rbp)
mov    0xed6(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x30(%rbp)
movl   $0x6,-0x44(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    -0x44(%rbp),%edx
call   1030 <ActivitySelection@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
mov    0xef5(%rip),%rax
mov    %rax,0x30(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
mov    0xefd(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xee1(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x6,%edx
call   1030 <ActivitySelection@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.start = [6 x i32] [i32 1, i32 3, i32 1, i32 5, i32 6, i32 8]
@__const.main.finish = [6 x i32] [i32 2, i32 6, i32 6, i32 7, i32 8, i32 10]
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i32]
%3 = alloca [6 x i32]
%4 = alloca i32
store i32 0, i32* %1
%5 = bitcast [6 x i32]* %2 to i8*
%6 = bitcast [6 x i32]* %3 to i8*
store i32 6, i32* %4
%7 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%8 = getelementptr inbounds [6 x i32], [6 x i32]* %3, i64 0, i64 0
%9 = load i32, i32* %4
%10 = call i32 @ActivitySelection(i32* %7, i32* %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.start = [6 x i32] [i32 1, i32 3, i32 1, i32 5, i32 6, i32 8]
@__const.main.finish = [6 x i32] [i32 2, i32 6, i32 6, i32 7, i32 8, i32 10]
define i32 @main() {
%1 = alloca [6 x i32]
%2 = alloca [6 x i32]
%3 = bitcast [6 x i32]* %1 to i8*
%4 = bitcast [6 x i32]* %2 to i8*
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%6 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%7 = call i32 @ActivitySelection(i32* %5, i32* %6, i32 6)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ leconvert_uint16_to(int /*<<< orphan*/);
int16_t leconvert_int16_to(int16_t native) {
  return leconvert_uint16_to(native);
}


x86 assembly (clang, -O0):
<leconvert_int16_to>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <leconvert_uint16_to@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<leconvert_int16_to>:
jmp    1030 <leconvert_uint16_to@plt>

LLVM IR (-O0):
define i32 @leconvert_int16_to(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @leconvert_uint16_to(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @leconvert_int16_to(i32 %0) {
%2 = tail call i32 @leconvert_uint16_to(i32 %0)
ret i32 %2
}
int main() {
  int i = 0;
  if (i == 0)
    ;
  switch (i)
    ;
  while (i != 0)
    ;
  do
    ;
  while (i != 0);
  for (i = 0; i < 0; i++)
    ;
  if (i == 0) {
  }
  switch (i) {}
  while (i != 0) {
  }
  do {
  } while (i != 0);
  for (i = 0; i < 0; i++) {
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1121 <main+0x21>
jmp    1121 <main+0x21>
jmp    1126 <main+0x26>
cmpl   $0x0,-0x8(%rbp)
je     1135 <main+0x35>
jmp    1126 <main+0x26>
jmp    113a <main+0x3a>
jmp    113f <main+0x3f>
cmpl   $0x0,-0x8(%rbp)
jne    113a <main+0x3a>
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    116d <main+0x6d>
jmp    115f <main+0x5f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1150 <main+0x50>
cmpl   $0x0,-0x8(%rbp)
jne    117c <main+0x7c>
jmp    117c <main+0x7c>
jmp    1181 <main+0x81>
cmpl   $0x0,-0x8(%rbp)
je     1190 <main+0x90>
jmp    1181 <main+0x81>
jmp    1195 <main+0x95>
jmp    119a <main+0x9a>
cmpl   $0x0,-0x8(%rbp)
jne    1195 <main+0x95>
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    11c8 <main+0xc8>
jmp    11ba <main+0xba>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    11ab <main+0xab>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
br label %6
6: ; preds = %5, %0
%7 = load i32, i32* %2
switch i32 %7, label %8 [
]
8: ; preds = %6
br label %9
9: ; preds = %12, %8
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
br label %9
13: ; preds = %9
br label %14
14: ; preds = %15, %13
br label %15
15: ; preds = %14
%16 = load i32, i32* %2
%17 = icmp ne i32 %16, 0
br i1 %17, label %14, label %18
18: ; preds = %15
store i32 0, i32* %2
br label %19
19: ; preds = %23, %18
%20 = load i32, i32* %2
%21 = icmp slt i32 %20, 0
br i1 %21, label %22, label %26
22: ; preds = %19
br label %23
23: ; preds = %22
%24 = load i32, i32* %2
%25 = add nsw i32 %24, 1
store i32 %25, i32* %2
br label %19
26: ; preds = %19
%27 = load i32, i32* %2
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %30
29: ; preds = %26
br label %30
30: ; preds = %29, %26
%31 = load i32, i32* %2
switch i32 %31, label %32 [
]
32: ; preds = %30
br label %33
33: ; preds = %36, %32
%34 = load i32, i32* %2
%35 = icmp ne i32 %34, 0
br i1 %35, label %36, label %37
36: ; preds = %33
br label %33
37: ; preds = %33
br label %38
38: ; preds = %39, %37
br label %39
39: ; preds = %38
%40 = load i32, i32* %2
%41 = icmp ne i32 %40, 0
br i1 %41, label %38, label %42
42: ; preds = %39
store i32 0, i32* %2
br label %43
43: ; preds = %47, %42
%44 = load i32, i32* %2
%45 = icmp slt i32 %44, 0
br i1 %45, label %46, label %50
46: ; preds = %43
br label %47
47: ; preds = %46
%48 = load i32, i32* %2
%49 = add nsw i32 %48, 1
store i32 %49, i32* %2
br label %43
50: ; preds = %43
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void INI_Rename_Generic() { ; }


x86 assembly (clang, -O0):
<INI_Rename_Generic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INI_Rename_Generic>:
ret

LLVM IR (-O0):
define void @INI_Rename_Generic() {
ret void
}

LLVM IR (-O2):
define void @INI_Rename_Generic() {
ret void
}
void dummy_rotate(struct rb_node *old, struct rb_node *new) {}


x86 assembly (clang, -O0):
<dummy_rotate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_rotate>:
ret

LLVM IR (-O0):
%struct.rb_node = type opaque
define void @dummy_rotate(%struct.rb_node* %0, %struct.rb_node* %1) {
%3 = alloca %struct.rb_node*
%4 = alloca %struct.rb_node*
store %struct.rb_node* %0, %struct.rb_node** %3
store %struct.rb_node* %1, %struct.rb_node** %4
ret void
}

LLVM IR (-O2):
%struct.rb_node = type opaque
define void @dummy_rotate(%struct.rb_node* nocapture %0, %struct.rb_node* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ term_restore();
void term_exit() { term_restore(); }


x86 assembly (clang, -O0):
<term_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <term_restore@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_exit>:
xor    %eax,%eax
jmp    1030 <term_restore@plt>

LLVM IR (-O0):
define void @term_exit() {
%1 = call i32 (...) @term_restore()
ret void
}

LLVM IR (-O2):
define void @term_exit() {
%1 = tail call i32 (...) @term_restore()
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ *display;
};
struct TYPE_4__ {
  TYPE_1__ xcreatewindow;
};
typedef TYPE_2__ XEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XEvent_xcreatewindow_display(void *_p, void *_v) {
  ((XEvent *)_p)->xcreatewindow.display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcreatewindow_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcreatewindow_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32* }
define void @set_XEvent_xcreatewindow_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_4__*
%9 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %8, i32 0, i32 0
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 0
store i32* %6, i32** %10
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcreatewindow_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ seq;

/* Variables and functions */
int /*<<< orphan*/ sysf_printf(char *, char *);
int write(int, int *, int);
int sync_wake(int fd, int seq) {
  int rc;
  rc = write(fd, &seq, sizeof(seq));
  do {
    if ((rc < 0))
      sysf_printf("Error waking process", "");
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<sync_wake>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    115f <sync_wake+0x3f>
lea    0xead(%rip),%rdi
lea    0xeba(%rip),%rsi
call   1040 <sysf_printf@plt>
jmp    1164 <sync_wake+0x44>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_wake>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
test   %eax,%eax
jns    114b <sync_wake+0x2b>
lea    0xec1(%rip),%rdi
lea    0xece(%rip),%rsi
call   1040 <sysf_printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Error waking process\00"
@.str.1 = [1 x i8] zeroinitializer
define i32 @sync_wake(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @write(i32 %6, i32* %4, i32 4)
store i32 %7, i32* %5
br label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = call i32 @sysf_printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %8
br label %14
14: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"Error waking process\00"
@.str.1 = [1 x i8] zeroinitializer
define i32 @sync_wake(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @write(i32 %0, i32* %3, i32 4)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @sysf_printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret i32 0
}
int int_shifts_are_arithmetic() {
  int x = -1;
  return (x >> 1) == x;
}


x86 assembly (clang, -O0):
<int_shifts_are_arithmetic>:
push   %rbp
mov    %rsp,%rbp
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
cmp    -0x4(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_shifts_are_arithmetic>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @int_shifts_are_arithmetic() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = load i32, i32* %1
%3 = ashr i32 %2, 1
%4 = load i32, i32* %1
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @int_shifts_are_arithmetic() {
ret i32 1
}
int test_imm_2Auint8_mem(unsigned char *val) {
  return ((*val) & (0x2A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Auint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x2a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Auint8_mem>:
testb  $0x2a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Auint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 42
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Auint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 42
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void ignore_signal(int sig) {}


x86 assembly (clang, -O0):
<ignore_signal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_signal>:
ret

LLVM IR (-O0):
define void @ignore_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @ignore_signal(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outnop1str(char *);
void sctoi() { outnop1str("SEX"); }


x86 assembly (clang, -O0):
<sctoi>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <outnop1str@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sctoi>:
lea    0xee9(%rip),%rdi
jmp    1030 <outnop1str@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"SEX\00"
define void @sctoi() {
%1 = call i32 @outnop1str(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"SEX\00"
define void @sctoi() {
%1 = tail call i32 @outnop1str(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __pid_t;

/* Variables and functions */
int /*<<< orphan*/ __fork();
__pid_t __vfork(void) { return __fork(); }


x86 assembly (clang, -O0):
<__vfork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__fork@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__vfork>:
xor    %eax,%eax
jmp    1030 <__fork@plt>

LLVM IR (-O0):
define i32 @__vfork() {
%1 = call i32 (...) @__fork()
ret i32 %1
}

LLVM IR (-O2):
define i32 @__vfork() {
%1 = tail call i32 (...) @__fork()
ret i32 %1
}
/* Variables and functions */
size_t vdirect_bit_LaceKVE_joint();
size_t get_vdirect_bit_LaceKVE_joint(size_t x) {
  return x & vdirect_bit_LaceKVE_joint();
}


x86 assembly (clang, -O0):
<get_vdirect_bit_LaceKVE_joint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <vdirect_bit_LaceKVE_joint@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
and    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_vdirect_bit_LaceKVE_joint>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <vdirect_bit_LaceKVE_joint@plt>
and    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @get_vdirect_bit_LaceKVE_joint(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 (...) @vdirect_bit_LaceKVE_joint()
%5 = and i64 %3, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @get_vdirect_bit_LaceKVE_joint(i64 %0) {
%2 = tail call i64 (...) @vdirect_bit_LaceKVE_joint()
%3 = and i64 %2, %0
ret i64 %3
}
long get_idefile_offset(int sector) {
  int offset_delta[] = {0, 4, 8, 12, 0, 4, 8, -4, 0, 4, -8, -4, 0, -12, -8, -4};
  return (sector + offset_delta[(sector % 16)]);
}


x86 assembly (clang, -O0):
<get_idefile_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
lea    0xeda(%rip),%rsi
mov    $0x40,%edx
call   1030 <memcpy@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x54(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    -0x54(%rbp),%eax
movslq %edx,%rcx
add    -0x50(%rbp,%rcx,4),%eax
cltq
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_idefile_offset>:
lea    0xf(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
and    $0xfffffff0,%eax
movslq %edi,%rcx
sub    %eax,%edi
movslq %edi,%rax
lea    0xee6(%rip),%rdx
movslq (%rdx,%rax,4),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
@__const.get_idefile_offset.offset_delta = [16 x i32] [i32 0, i32 4, i32 8, i32 12, i32 0, i32 4, i32 8, i32 -4, i32 0, i32 4, i32 -8, i32 -4, i32 0, i32 -12, i32 -8, i32 -4]
define i64 @get_idefile_offset(i32 %0) {
%2 = alloca i32
%3 = alloca [16 x i32]
store i32 %0, i32* %2
%4 = bitcast [16 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = srem i32 %6, 16
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [16 x i32], [16 x i32]* %3, i64 0, i64 %8
%10 = load i32, i32* %9
%11 = add nsw i32 %5, %10
%12 = sext i32 %11 to i64
ret i64 %12
}

LLVM IR (-O2):
@__const.get_idefile_offset.offset_delta = [16 x i32] [i32 0, i32 4, i32 8, i32 12, i32 0, i32 4, i32 8, i32 -4, i32 0, i32 4, i32 -8, i32 -4, i32 0, i32 -12, i32 -8, i32 -4]
define i64 @get_idefile_offset(i32 %0) {
%2 = srem i32 %0, 16
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds [16 x i32], [16 x i32]* @__const.get_idefile_offset.offset_delta, i64 0, i64 %3
%5 = load i32, i32* %4
%6 = add nsw i32 %5, %0
%7 = sext i32 %6 to i64
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ panic_syserror(char *, char *);
void *realloc(void *, size_t);
void *srealloc(void *ptr, size_t size) {
  void *new_ptr;
  new_ptr = realloc(ptr, size);
  if (!new_ptr)
    panic_syserror("can't allocate requested memory", "srealloc()");
  return new_ptr;
}


x86 assembly (clang, -O0):
<srealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115f <srealloc+0x3f>
lea    0xead(%rip),%rdi
lea    0xec6(%rip),%rsi
call   1030 <panic_syserror@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srealloc>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1141 <srealloc+0x21>
lea    0xecb(%rip),%rdi
lea    0xee4(%rip),%rsi
call   1030 <panic_syserror@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"can't allocate requested memory\00"
@.str.1 = [11 x i8] c"srealloc()\00"
define i8* @srealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @panic_syserror(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [32 x i8] c"can't allocate requested memory\00"
@.str.1 = [11 x i8] c"srealloc()\00"
define noalias i8* @srealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @panic_syserror(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a;
  a = 256;
  while (a++ < 512)
    printf("a = %d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x100,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x200,%eax
jge    1150 <main+0x40>
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x101,%ebx
lea    0xee0(%rip),%r14
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x201,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"a = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 256, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = icmp slt i32 %4, 512
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"a = %d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 257, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 513
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ finish();
void sync_inst() { finish(); }


x86 assembly (clang, -O0):
<sync_inst>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <finish@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_inst>:
xor    %eax,%eax
jmp    1030 <finish@plt>

LLVM IR (-O0):
define void @sync_inst() {
%1 = call i32 (...) @finish()
ret void
}

LLVM IR (-O2):
define void @sync_inst() {
%1 = tail call i32 (...) @finish()
ret void
}
void d2i_CERTIFICATEPOLICIES(void) {}


x86 assembly (clang, -O0):
<d2i_CERTIFICATEPOLICIES>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_CERTIFICATEPOLICIES>:
ret

LLVM IR (-O0):
define void @d2i_CERTIFICATEPOLICIES() {
ret void
}

LLVM IR (-O2):
define void @d2i_CERTIFICATEPOLICIES() {
ret void
}
/* Variables and functions */
scalar_t__ strcasecmp(char *, char *);
void strcasecmp_constant0() {
  if (strcasecmp("abc", "Abc") != 0)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strcasecmp_constant0>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1030 <strcasecmp@plt>
cmp    $0x0,%rax
je     1131 <strcasecmp_constant0+0x21>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcasecmp_constant0>:
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
@.str.1 = [4 x i8] c"Abc\00"
define void @strcasecmp_constant0() {
%1 = call i64 @strcasecmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = load i8, i8* null
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @strcasecmp_constant0() {
ret void
}
unsigned long rotl(unsigned long x, unsigned long r) {
  return (x << r) | (x >> (sizeof(x) * 8 - r));
}


x86 assembly (clang, -O0):
<rotl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    %cl,%rax
mov    -0x8(%rbp),%rdx
mov    $0x40,%ecx
sub    -0x10(%rbp),%rcx
shr    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl>:
mov    %rsi,%rcx
mov    %rdi,%rax
rol    %cl,%rax
ret

LLVM IR (-O0):
define i64 @rotl(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = shl i64 %5, %6
%8 = load i64, i64* %3
%9 = load i64, i64* %4
%10 = sub i64 64, %9
%11 = lshr i64 %8, %10
%12 = or i64 %7, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @rotl(i64 %0, i64 %1) {
%3 = shl i64 %0, %1
%4 = sub i64 64, %1
%5 = lshr i64 %0, %4
%6 = or i64 %5, %3
ret i64 %6
}
void RTDirRead(void) {}


x86 assembly (clang, -O0):
<RTDirRead>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDirRead>:
ret

LLVM IR (-O0):
define void @RTDirRead() {
ret void
}

LLVM IR (-O2):
define void @RTDirRead() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("ssl_test: SSL not configured.\n");
  exit(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"ssl_test: SSL not configured.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [30 x i8] c"ssl_test: SSL not configured.\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @exit(i32 0)
unreachable
}
unsigned int hibit(unsigned int x) {
  unsigned int res = 0;
  while (x > 0xff) {
    x >>= 8;
    res += 8;
  }
  while (x) {
    x >>= 1;
    res += 1;
  }
  return res;
}


x86 assembly (clang, -O0):
<hibit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xff,-0x4(%rbp)
jbe    1132 <hibit+0x32>
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <hibit+0xe>
jmp    1137 <hibit+0x37>
cmpl   $0x0,-0x4(%rbp)
je     1158 <hibit+0x58>
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1137 <hibit+0x37>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hibit>:
xor    %eax,%eax
cmp    $0x100,%edi
jb     1126 <hibit+0x26>
xor    %eax,%eax
mov    %edi,%ecx
xchg   %ax,%ax
shr    $0x8,%ecx
add    $0x8,%eax
cmp    $0xffff,%edi
mov    %ecx,%edi
ja     1110 <hibit+0x10>
test   %ecx,%ecx
jne    112c <hibit+0x2c>
jmp    113c <hibit+0x3c>
mov    %edi,%ecx
test   %ecx,%ecx
je     113c <hibit+0x3c>
mov    %ecx,%edx
xchg   %ax,%ax
shr    %edx
add    $0x1,%eax
cmp    $0x1,%ecx
mov    %edx,%ecx
ja     1130 <hibit+0x30>
ret

LLVM IR (-O0):
define i32 @hibit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, 255
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = lshr i32 %8, 8
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add i32 %10, 8
store i32 %11, i32* %3
br label %4
12: ; preds = %4
br label %13
13: ; preds = %16, %12
%14 = load i32, i32* %2
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %13
%17 = load i32, i32* %2
%18 = lshr i32 %17, 1
store i32 %18, i32* %2
%19 = load i32, i32* %3
%20 = add i32 %19, 1
store i32 %20, i32* %3
br label %13
21: ; preds = %13
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @hibit(i32 %0) {
%2 = icmp ugt i32 %0, 255
br i1 %2, label %7, label %3
3: ; preds = %7, %1
%4 = phi i32 [ %0, %1 ], [ %10, %7 ]
%5 = phi i32 [ 0, %1 ], [ %11, %7 ]
%6 = icmp eq i32 %4, 0
br i1 %6, label %19, label %13
7: ; preds = %1, %7
%8 = phi i32 [ %11, %7 ], [ 0, %1 ]
%9 = phi i32 [ %10, %7 ], [ %0, %1 ]
%10 = lshr i32 %9, 8
%11 = add nuw nsw i32 %8, 8
%12 = icmp ugt i32 %9, 65535
br i1 %12, label %7, label %3
13: ; preds = %3, %13
%14 = phi i32 [ %17, %13 ], [ %5, %3 ]
%15 = phi i32 [ %16, %13 ], [ %4, %3 ]
%16 = lshr i32 %15, 1
%17 = add nuw nsw i32 %14, 1
%18 = icmp ult i32 %15, 2
br i1 %18, label %19, label %13
19: ; preds = %13, %3
%20 = phi i32 [ %5, %3 ], [ %17, %13 ]
ret i32 %20
}