#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef unsigned long uint32_t;
typedef unsigned long Priority;

/* Variables and functions */
void NVIC_DecodePriority(uint32_t Priority, uint32_t PriorityGroup,
                         uint32_t *const pPreemptPriority,
                         uint32_t *const pSubPriority) {
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(4))
                            ? (uint32_t)(4)
                            : (uint32_t)(7UL - PriorityGroupTmp);
  SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(4)) < (uint32_t)7UL)
                        ? (uint32_t)0UL
                        : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(4));
  *pPreemptPriority = (Priority >> SubPriorityBits) &
                      (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
  *pSubPriority = (Priority) & (uint32_t)((1UL << (SubPriorityBits)) - 1UL);
}


x86 assembly (clang, -O0):
<NVIC_DecodePriority>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7,%rax
mov    %rax,-0x28(%rbp)
mov    $0x7,%eax
sub    -0x28(%rbp),%rax
cmp    $0x4,%rax
jbe    1141 <NVIC_DecodePriority+0x41>
mov    $0x4,%eax
mov    %rax,-0x40(%rbp)
jmp    114e <NVIC_DecodePriority+0x4e>
mov    $0x7,%eax
sub    -0x28(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
add    $0x4,%rax
cmp    $0x7,%rax
jae    1173 <NVIC_DecodePriority+0x73>
xor    %eax,%eax
mov    %rax,-0x48(%rbp)
jmp    1183 <NVIC_DecodePriority+0x83>
mov    -0x28(%rbp),%rax
sub    $0x7,%rax
add    $0x4,%rax
mov    %rax,-0x48(%rbp)
mov    -0x48(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x38(%rbp),%rcx
shr    %cl,%rax
mov    %rax,-0x58(%rbp)
mov    -0x30(%rbp),%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    -0x58(%rbp),%rcx
sub    $0x1,%rax
and    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x38(%rbp),%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    -0x50(%rbp),%rcx
sub    $0x1,%rax
and    %rax,%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NVIC_DecodePriority>:
and    $0x7,%esi
mov    %rsi,%rax
xor    $0x7,%rax
xor    %r8d,%r8d
sub    $0x3,%rsi
cmovae %rsi,%r8
mov    %rcx,%r9
mov    %rdi,%r10
mov    %r8d,%ecx
shr    %cl,%r10
cmp    $0x4,%rax
mov    $0x4,%ecx
cmovb  %eax,%ecx
mov    $0xffffffff,%eax
mov    $0xffffffff,%esi
shl    %cl,%esi
not    %esi
and    %esi,%r10d
mov    %r8d,%ecx
shl    %cl,%eax
mov    %r10,(%rdx)
not    %eax
and    %eax,%edi
mov    %rdi,(%r9)
ret

LLVM IR (-O0):
define void @NVIC_DecodePriority(i64 %0, i64 %1, i64* %2, i64* %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64*
%8 = alloca i64*
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64* %2, i64** %7
store i64* %3, i64** %8
%12 = load i64, i64* %6
%13 = and i64 %12, 7
store i64 %13, i64* %9
%14 = load i64, i64* %9
%15 = sub i64 7, %14
%16 = icmp ugt i64 %15, 4
br i1 %16, label %17, label %18
17: ; preds = %4
br label %21
18: ; preds = %4
%19 = load i64, i64* %9
%20 = sub i64 7, %19
br label %21
21: ; preds = %18, %17
%22 = phi i64 [ 4, %17 ], [ %20, %18 ]
store i64 %22, i64* %10
%23 = load i64, i64* %9
%24 = add i64 %23, 4
%25 = icmp ult i64 %24, 7
br i1 %25, label %26, label %27
26: ; preds = %21
br label %31
27: ; preds = %21
%28 = load i64, i64* %9
%29 = sub i64 %28, 7
%30 = add i64 %29, 4
br label %31
31: ; preds = %27, %26
%32 = phi i64 [ 0, %26 ], [ %30, %27 ]
store i64 %32, i64* %11
%33 = load i64, i64* %5
%34 = load i64, i64* %11
%35 = lshr i64 %33, %34
%36 = load i64, i64* %10
%37 = shl i64 1, %36
%38 = sub i64 %37, 1
%39 = and i64 %35, %38
%40 = load i64*, i64** %7
store i64 %39, i64* %40
%41 = load i64, i64* %5
%42 = load i64, i64* %11
%43 = shl i64 1, %42
%44 = sub i64 %43, 1
%45 = and i64 %41, %44
%46 = load i64*, i64** %8
store i64 %45, i64* %46
ret void
}

LLVM IR (-O2):
define void @NVIC_DecodePriority(i64 %0, i64 %1, i64* nocapture writeonly %2, i64* nocapture writeonly %3) {
%5 = and i64 %1, 7
%6 = xor i64 %5, 7
%7 = icmp ult i64 %6, 4
%8 = select i1 %7, i64 %6, i64 4
%9 = tail call i64 @llvm.usub.sat.i64(i64 %5, i64 3)
%10 = lshr i64 %0, %9
%11 = shl nsw i64 -1, %8
%12 = xor i64 %11, -1
%13 = and i64 %10, %12
store i64 %13, i64* %2
%14 = shl nsw i64 -1, %9
%15 = xor i64 %14, -1
%16 = and i64 %15, %0
store i64 %16, i64* %3
ret void
}