xunge/DecIR huggingface dataset:
/* Variables and functions */
double drand48();
int /*<<< orphan*/ printf(char *, double);
double get_random() {
  double num = drand48();
  printf("random number is %lf\n", num);
  return num;
}


x86 assembly (clang, -O0):
<get_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <drand48@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_random>:
push   %rax
xor    %eax,%eax
call   1040 <drand48@plt>
movsd  %xmm0,(%rsp)
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [22 x i8] c"random number is %lf\0A\00"
define double @get_random() {
%1 = alloca double
%2 = call double (...) @drand48()
store double %2, double* %1
%3 = load double, double* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), double %3)
%5 = load double, double* %1
ret double %5
}

LLVM IR (-O2):
@.str = [22 x i8] c"random number is %lf\0A\00"
define double @get_random() {
%1 = tail call double (...) @drand48()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), double %1)
ret double %1
}
/* Variables and functions */
int /*<<< orphan*/ Write_LCD(int, char *, int);
void Enable_Pixel(int fd, int x, int y) {
  char cmd[] = {254, 112, 0, 0, 253};
  cmd[2] = (char)x;
  cmd[3] = (char)y;
  Write_LCD(fd, cmd, 5);
}


x86 assembly (clang, -O0):
<Enable_Pixel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    0xed9(%rip),%eax
mov    %eax,-0x11(%rbp)
mov    0xed4(%rip),%al
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%eax
mov    %al,-0xf(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,-0xe(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x11(%rbp),%rsi
mov    $0x5,%edx
call   1030 <Write_LCD@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Enable_Pixel>:
push   %rax
movl   $0x70fe,(%rsp)
movb   $0xfd,0x4(%rsp)
mov    %sil,0x2(%rsp)
mov    %dl,0x3(%rsp)
mov    %rsp,%rsi
mov    $0x5,%edx
call   1030 <Write_LCD@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.Enable_Pixel.cmd = [5 x i8] c"\FEp\00\00\FD"
define void @Enable_Pixel(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca [5 x i8]
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = bitcast [5 x i8]* %7 to i8*
%9 = load i32, i32* %5
%10 = trunc i32 %9 to i8
%11 = getelementptr inbounds [5 x i8], [5 x i8]* %7, i64 0, i64 2
store i8 %10, i8* %11
%12 = load i32, i32* %6
%13 = trunc i32 %12 to i8
%14 = getelementptr inbounds [5 x i8], [5 x i8]* %7, i64 0, i64 3
store i8 %13, i8* %14
%15 = load i32, i32* %4
%16 = getelementptr inbounds [5 x i8], [5 x i8]* %7, i64 0, i64 0
%17 = call i32 @Write_LCD(i32 %15, i8* %16, i32 5)
ret void
}

LLVM IR (-O2):
@__const.Enable_Pixel.cmd = [5 x i8] c"\FEp\00\00\FD"
define void @Enable_Pixel(i32 %0, i32 %1, i32 %2) {
%4 = alloca [5 x i8]
%5 = getelementptr inbounds [5 x i8], [5 x i8]* %4, i64 0, i64 0
%6 = trunc i32 %1 to i8
%7 = getelementptr inbounds [5 x i8], [5 x i8]* %4, i64 0, i64 2
store i8 %6, i8* %7
%8 = trunc i32 %2 to i8
%9 = getelementptr inbounds [5 x i8], [5 x i8]* %4, i64 0, i64 3
store i8 %8, i8* %9
%10 = call i32 @Write_LCD(i32 %0, i8* %5, i32 5)
ret void
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ memfatal(char *, size_t);
void *xcalloc(size_t num, size_t size) {
  void *ptr = calloc(num, size);
  if (!ptr)
    memfatal("calloc", num * size);
  return ptr;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1161 <xcalloc+0x41>
mov    -0x8(%rbp),%rsi
imul   -0x10(%rbp),%rsi
lea    0xea4(%rip),%rdi
call   1040 <memfatal@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114b <xcalloc+0x2b>
imul   %r15,%r14
lea    0xebd(%rip),%rdi
mov    %r14,%rsi
call   1040 <memfatal@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [7 x i8] c"calloc\00"
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %16, label %11
11: ; preds = %2
%12 = load i64, i64* %3
%13 = load i64, i64* %4
%14 = mul i64 %12, %13
%15 = call i32 @memfatal(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %14)
br label %16
16: ; preds = %11, %2
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
@.str = [7 x i8] c"calloc\00"
define noalias i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = mul i64 %1, %0
%7 = tail call i32 @memfatal(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %6)
br label %8
8: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ assem_debug(char *, int, int);
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void emit_writeword_imm(int imm, int addr) {
  assem_debug("movl $%x,%x\n", imm, addr);
  assert(0);
}


x86 assembly (clang, -O0):
<emit_writeword_imm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec5(%rip),%rdi
call   1030 <assem_debug@plt>
xor    %edi,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_writeword_imm>:
push   %rax
mov    %esi,%edx
mov    %edi,%esi
lea    0xed4(%rip),%rdi
call   1030 <assem_debug@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"movl $%x,%x\0A\00"
define void @emit_writeword_imm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @assem_debug(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
%8 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"movl $%x,%x\0A\00"
define void @emit_writeword_imm(i32 %0, i32 %1) {
%3 = tail call i32 @assem_debug(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%4 = tail call i32 @assert(i32 0)
ret void
}
unsigned char f24(unsigned char x, unsigned long int y) {
  return (x >> (8 - y)) ^ (x << y);
}


x86 assembly (clang, -O0):
<f24>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
sar    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f24>:
mov    $0x8,%cl
sub    %sil,%cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f24(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 8, %7
%9 = trunc i64 %8 to i32
%10 = ashr i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = shl i32 %12, %14
%16 = xor i32 %10, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f24(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 8, %4
%6 = lshr i32 %3, %5
%7 = shl i32 %3, %4
%8 = xor i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
int pancake(int n) {
  int gap = 2, sum = 2, adj = -1;
  while (sum < n) {
    adj++;
    gap = gap * 2 - 1;
    sum += gap;
  }
  return n + adj;
}


x86 assembly (clang, -O0):
<pancake>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0xffffffff,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114b <pancake+0x4b>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    111c <pancake+0x1c>
mov    -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pancake>:
mov    $0xffffffff,%eax
cmp    $0x3,%edi
jl     1132 <pancake+0x32>
mov    $0x2,%ecx
mov    $0xffffffff,%eax
mov    $0x2,%edx
nopl   0x0(%rax)
add    $0x1,%eax
lea    (%rcx,%rdx,2),%ecx
add    $0xffffffff,%ecx
add    %edx,%edx
add    $0xffffffff,%edx
cmp    %edi,%ecx
jl     1120 <pancake+0x20>
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @pancake(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
store i32 2, i32* %4
store i32 -1, i32* %5
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %4
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32, i32* %5
%12 = add nsw i32 %11, 1
store i32 %12, i32* %5
%13 = load i32, i32* %3
%14 = mul nsw i32 %13, 2
%15 = sub nsw i32 %14, 1
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = add nsw i32 %17, %16
store i32 %18, i32* %4
br label %6
19: ; preds = %6
%20 = load i32, i32* %2
%21 = load i32, i32* %5
%22 = add nsw i32 %20, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @pancake(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %12
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ -1, %1 ]
%5 = phi i32 [ %10, %3 ], [ 2, %1 ]
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = add nsw i32 %4, 1
%8 = shl nsw i32 %6, 1
%9 = add nsw i32 %8, -1
%10 = add nsw i32 %9, %5
%11 = icmp slt i32 %10, %0
br i1 %11, label %3, label %12
12: ; preds = %3, %1
%13 = phi i32 [ -1, %1 ], [ %7, %3 ]
%14 = add nsw i32 %13, %0
ret i32 %14
}
void mdp4_writeback_kickoff_video(struct msm_fb_data_type *mfd,
                                  struct mdp4_overlay_pipe *pipe) {}


x86 assembly (clang, -O0):
<mdp4_writeback_kickoff_video>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_writeback_kickoff_video>:
ret

LLVM IR (-O0):
%struct.msm_fb_data_type = type opaque
%struct.mdp4_overlay_pipe = type opaque
define void @mdp4_writeback_kickoff_video(%struct.msm_fb_data_type* %0, %struct.mdp4_overlay_pipe* %1) {
%3 = alloca %struct.msm_fb_data_type*
%4 = alloca %struct.mdp4_overlay_pipe*
store %struct.msm_fb_data_type* %0, %struct.msm_fb_data_type** %3
store %struct.mdp4_overlay_pipe* %1, %struct.mdp4_overlay_pipe** %4
ret void
}

LLVM IR (-O2):
%struct.msm_fb_data_type = type opaque
%struct.mdp4_overlay_pipe = type opaque
define void @mdp4_writeback_kickoff_video(%struct.msm_fb_data_type* nocapture %0, %struct.mdp4_overlay_pipe* nocapture %1) {
ret void
}
__attribute__((regparm(0))) long sys_listen(int fd, int backlog) { return 0; }


x86 assembly (clang, -O0):
<sys_listen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_listen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @sys_listen(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @sys_listen(i32 %0, i32 %1) {
ret i64 0
}
/* Type definitions */
struct stat {
  int dummy;
};
struct FTW {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ perror(char const *);
int remove(char const *);
int unlink_cb(const char *fpath, const struct stat *sb, int typeflag,
              struct FTW *ftwbuf) {
  int rv = remove(fpath);
  if (rv)
    perror(fpath);
  return rv;
}


x86 assembly (clang, -O0):
<unlink_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <remove@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
je     1156 <unlink_cb+0x36>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlink_cb>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <remove@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    113a <unlink_cb+0x1a>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
call   1040 <perror@plt>
jmp    1131 <unlink_cb+0x11>

LLVM IR (-O0):
%struct.stat = type { i32 }
%struct.FTW = type { i32 }
define i32 @unlink_cb(i8* %0, %struct.stat* %1, i32 %2, %struct.FTW* %3) {
%5 = alloca i8*
%6 = alloca %struct.stat*
%7 = alloca i32
%8 = alloca %struct.FTW*
%9 = alloca i32
store i8* %0, i8** %5
store %struct.stat* %1, %struct.stat** %6
store i32 %2, i32* %7
store %struct.FTW* %3, %struct.FTW** %8
%10 = load i8*, i8** %5
%11 = call i32 @remove(i8* %10)
store i32 %11, i32* %9
%12 = load i32, i32* %9
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %4
%15 = load i8*, i8** %5
%16 = call i32 @perror(i8* %15)
br label %17
17: ; preds = %14, %4
%18 = load i32, i32* %9
ret i32 %18
}

LLVM IR (-O2):
%struct.stat = type { i32 }
%struct.FTW = type { i32 }
define i32 @unlink_cb(i8* nocapture %0, %struct.stat* nocapture readnone %1, i32 %2, %struct.FTW* nocapture readnone %3) {
%5 = tail call i32 @remove(i8* %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @perror(i8* %0)
br label %9
9: ; preds = %7, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
long double __ieee754_asinl(long double x) {
  fputs("__ieee754_asinl not implemented\n", stderr);
  __set_errno(ENOSYS);
  return 0.0;
}


x86 assembly (clang, -O0):
<__ieee754_asinl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
lea    0xec2(%rip),%rdi
call   1040 <fputs@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
fldz
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ieee754_asinl>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
fldz
pop    %rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"__ieee754_asinl not implemented\0A\00"
@stderr = global i32 0
@ENOSYS = global i32 0
define x86_fp80 @__ieee754_asinl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fputs(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret x86_fp80 0xK00000000000000000000
}

LLVM IR (-O2):
@.str = [33 x i8] c"__ieee754_asinl not implemented\0A\00"
@stderr = global i32 0
@ENOSYS = global i32 0
define x86_fp80 @__ieee754_asinl(x86_fp80 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @ENOSYS
%5 = tail call i32 @__set_errno(i32 %4)
ret x86_fp80 0xK00000000000000000000
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct fileinfo_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_destroy(struct genlist *);
void fileinfo_list_destroy(struct fileinfo_list *tthis) {
  genlist_destroy((struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<fileinfo_list_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileinfo_list_destroy>:
jmp    1030 <genlist_destroy@plt>

LLVM IR (-O0):
%struct.fileinfo_list = type { i32 }
%struct.genlist = type { i32 }
define void @fileinfo_list_destroy(%struct.fileinfo_list* %0) {
%2 = alloca %struct.fileinfo_list*
store %struct.fileinfo_list* %0, %struct.fileinfo_list** %2
%3 = load %struct.fileinfo_list*, %struct.fileinfo_list** %2
%4 = bitcast %struct.fileinfo_list* %3 to %struct.genlist*
%5 = call i32 @genlist_destroy(%struct.genlist* %4)
ret void
}

LLVM IR (-O2):
%struct.fileinfo_list = type { i32 }
%struct.genlist = type { i32 }
define void @fileinfo_list_destroy(%struct.fileinfo_list* %0) {
%2 = bitcast %struct.fileinfo_list* %0 to %struct.genlist*
%3 = tail call i32 @genlist_destroy(%struct.genlist* %2)
ret void
}
__attribute__((always_)) void pcie_ecrc_get_policy(char *str) {}


x86 assembly (clang, -O0):
<pcie_ecrc_get_policy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcie_ecrc_get_policy>:
ret

LLVM IR (-O0):
define void @pcie_ecrc_get_policy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @pcie_ecrc_get_policy(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
void *nla_reserve(void **, int, int);
void nla_put_u64(void **ctx, int t, __u64 var) {
  void *data = nla_reserve(ctx, t, sizeof(__u64));
  *(__u64 *)data = var;
}


x86 assembly (clang, -O0):
<nla_put_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x4,%edx
call   1030 <nla_reserve@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_put_u64>:
push   %rbx
mov    %edx,%ebx
mov    $0x4,%edx
call   1030 <nla_reserve@plt>
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @nla_put_u64(i8** %0, i32 %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8**, i8*** %4
%9 = load i32, i32* %5
%10 = call i8* @nla_reserve(i8** %8, i32 %9, i32 4)
store i8* %10, i8** %7
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = bitcast i8* %12 to i32*
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @nla_put_u64(i8** %0, i32 %1, i32 %2) {
%4 = tail call i8* @nla_reserve(i8** %0, i32 %1, i32 4)
%5 = bitcast i8* %4 to i32*
store i32 %2, i32* %5
ret void
}
void cli(void) { __asm__ volatile("cli"); }


x86 assembly (clang, -O0):
<cli>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli>:
cli
ret

LLVM IR (-O0):
define void @cli() {
ret void
}

LLVM IR (-O2):
define void @cli() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int vect_mus_audio_systems();
int mus_audio_systems(void) { return (vect_mus_audio_systems()); }


x86 assembly (clang, -O0):
<mus_audio_systems>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <vect_mus_audio_systems@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mus_audio_systems>:
xor    %eax,%eax
jmp    1030 <vect_mus_audio_systems@plt>

LLVM IR (-O0):
define i32 @mus_audio_systems() {
%1 = call i32 (...) @vect_mus_audio_systems()
ret i32 %1
}

LLVM IR (-O2):
define i32 @mus_audio_systems() {
%1 = tail call i32 (...) @vect_mus_audio_systems()
ret i32 %1
}
void put_task_stack(struct task_struct *tsk) {}


x86 assembly (clang, -O0):
<put_task_stack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_task_stack>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @put_task_stack(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @put_task_stack(%struct.task_struct* nocapture %0) {
ret void
}
int f_exit(void) { return ((0)); }


x86 assembly (clang, -O0):
<f_exit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f_exit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @f_exit() {
ret i32 0
}
int is_edge_enabled(int gpionum) {
  if ((gpionum >= 17 && gpionum <= 31) || (gpionum >= 61 && gpionum <= 64))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_edge_enabled>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x11,-0x8(%rbp)
jl     111b <is_edge_enabled+0x1b>
cmpl   $0x1f,-0x8(%rbp)
jle    112f <is_edge_enabled+0x2f>
cmpl   $0x3d,-0x8(%rbp)
jl     113b <is_edge_enabled+0x3b>
cmpl   $0x40,-0x8(%rbp)
jg     113b <is_edge_enabled+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <is_edge_enabled+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_edge_enabled>:
lea    -0x11(%rdi),%eax
cmp    $0xf,%eax
setb   %al
add    $0xffffffc3,%edi
cmp    $0x4,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_edge_enabled(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 17
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 31
br i1 %8, label %15, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 61
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 64
br i1 %14, label %15, label %16
15: ; preds = %12, %6
store i32 1, i32* %2
br label %17
16: ; preds = %12, %9
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_edge_enabled(i32 %0) {
%2 = add i32 %0, -17
%3 = icmp ult i32 %2, 15
%4 = add i32 %0, -61
%5 = icmp ult i32 %4, 4
%6 = or i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
void ARGBToBGRA() {}


x86 assembly (clang, -O0):
<ARGBToBGRA>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToBGRA>:
ret

LLVM IR (-O0):
define void @ARGBToBGRA() {
ret void
}

LLVM IR (-O2):
define void @ARGBToBGRA() {
ret void
}
double Sleef_atan_u10(double x) { return __builtin_atan(x); }


x86 assembly (clang, -O0):
<Sleef_atan_u10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <atan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_atan_u10>:
jmp    1030 <atan@plt>

LLVM IR (-O0):
define double @Sleef_atan_u10(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @atan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @Sleef_atan_u10(double %0) {
%2 = tail call double @atan(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ define_arithmetic_opcodes();
int /*<<< orphan*/ define_branch_opcodes();
int /*<<< orphan*/ define_data_transfer_opcodes();
int /*<<< orphan*/ define_logical_opcodes();
int /*<<< orphan*/ define_miscellaneous_opcodes();
void define_opcodes() {
  define_data_transfer_opcodes();
  define_arithmetic_opcodes();
  define_logical_opcodes();
  define_branch_opcodes();
  define_miscellaneous_opcodes();
}


x86 assembly (clang, -O0):
<define_opcodes>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <define_data_transfer_opcodes@plt>
mov    $0x0,%al
call   1040 <define_arithmetic_opcodes@plt>
mov    $0x0,%al
call   1070 <define_logical_opcodes@plt>
mov    $0x0,%al
call   1050 <define_branch_opcodes@plt>
mov    $0x0,%al
call   1060 <define_miscellaneous_opcodes@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<define_opcodes>:
push   %rax
xor    %eax,%eax
call   1030 <define_data_transfer_opcodes@plt>
xor    %eax,%eax
call   1040 <define_arithmetic_opcodes@plt>
xor    %eax,%eax
call   1070 <define_logical_opcodes@plt>
xor    %eax,%eax
call   1050 <define_branch_opcodes@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <define_miscellaneous_opcodes@plt>

LLVM IR (-O0):
define void @define_opcodes() {
%1 = call i32 (...) @define_data_transfer_opcodes()
%2 = call i32 (...) @define_arithmetic_opcodes()
%3 = call i32 (...) @define_logical_opcodes()
%4 = call i32 (...) @define_branch_opcodes()
%5 = call i32 (...) @define_miscellaneous_opcodes()
ret void
}

LLVM IR (-O2):
define void @define_opcodes() {
%1 = tail call i32 (...) @define_data_transfer_opcodes()
%2 = tail call i32 (...) @define_arithmetic_opcodes()
%3 = tail call i32 (...) @define_logical_opcodes()
%4 = tail call i32 (...) @define_branch_opcodes()
%5 = tail call i32 (...) @define_miscellaneous_opcodes()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lgen(char *, char *, int);
void cgincsw(int a) { lgen("%s\t%c%d", "incq", a); }


x86 assembly (clang, -O0):
<cgincsw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xedc(%rip),%rsi
call   1030 <lgen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgincsw>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xee8(%rip),%rsi
jmp    1030 <lgen@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s\09%c%d\00"
@.str.1 = [5 x i8] c"incq\00"
define void @cgincsw(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @lgen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s\09%c%d\00"
@.str.1 = [5 x i8] c"incq\00"
define void @cgincsw(i32 %0) {
%2 = tail call i32 @lgen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ free(char *);
char *str_add_escape(char const *, size_t);
int literal_print(FILE *f, const char *s, size_t len) {
  char *literal = str_add_escape(s, len);
  int r = fprintf(f, "%s", literal);
  free(literal);
  return r;
}


x86 assembly (clang, -O0):
<literal_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <str_add_escape@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rdx
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<literal_print>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1050 <str_add_escape@plt>
mov    %rax,%rbx
lea    0xeb4(%rip),%rsi
mov    %r14,%rdi
mov    %rax,%rdx
call   1040 <fprintf@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @literal_print(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i8* @str_add_escape(i8* %9, i64 %10)
store i8* %11, i8** %7
%12 = load i32*, i32** %4
%13 = load i8*, i8** %7
%14 = call i32 @fprintf(i32* %12, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %13)
store i32 %14, i32* %8
%15 = load i8*, i8** %7
%16 = call i32 @free(i8* %15)
%17 = load i32, i32* %8
ret i32 %17
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @literal_print(i32* nocapture %0, i8* %1, i64 %2) {
%4 = tail call i8* @str_add_escape(i8* %1, i64 %2)
%5 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = tail call i32 @free(i8* %4)
ret i32 %5
}
void loadgame(void) {}


x86 assembly (clang, -O0):
<loadgame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadgame>:
ret

LLVM IR (-O0):
define void @loadgame() {
ret void
}

LLVM IR (-O2):
define void @loadgame() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ BIGNUM;

/* Variables and functions */
int BN_hex2bn(int /*<<< orphan*/ **, char *);
int /*<<< orphan*/ OPENSSL_free(char *);
char *glue_strings(char const **, int /*<<< orphan*/ *);
int parse_bigBN(BIGNUM **out, const char *bn_strings[]) {
  char *bigstring = glue_strings(bn_strings, NULL);
  int ret = BN_hex2bn(out, bigstring);
  OPENSSL_free(bigstring);
  return ret;
}


x86 assembly (clang, -O0):
<parse_bigBN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <glue_strings@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <BN_hex2bn@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <OPENSSL_free@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_bigBN>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    %rsi,%rdi
xor    %esi,%esi
call   1040 <glue_strings@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <BN_hex2bn@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1050 <OPENSSL_free@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @parse_bigBN(i32** %0, i8** %1) {
%3 = alloca i32**
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i32** %0, i32*** %3
store i8** %1, i8*** %4
%7 = load i8**, i8*** %4
%8 = call i8* @glue_strings(i8** %7, i32* null)
store i8* %8, i8** %5
%9 = load i32**, i32*** %3
%10 = load i8*, i8** %5
%11 = call i32 @BN_hex2bn(i32** %9, i8* %10)
store i32 %11, i32* %6
%12 = load i8*, i8** %5
%13 = call i32 @OPENSSL_free(i8* %12)
%14 = load i32, i32* %6
ret i32 %14
}

LLVM IR (-O2):
define i32 @parse_bigBN(i32** %0, i8** %1) {
%3 = tail call i8* @glue_strings(i8** %1, i32* null)
%4 = tail call i32 @BN_hex2bn(i32** %0, i8* %3)
%5 = tail call i32 @OPENSSL_free(i8* %3)
ret i32 %4
}
int calLeftChildIndex(int index) { return ((2 * index) + 1); }


x86 assembly (clang, -O0):
<calLeftChildIndex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calLeftChildIndex>:
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @calLeftChildIndex(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @calLeftChildIndex(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = or i32 %2, 1
ret i32 %3
}
/* Variables and functions */
char *prompt_r(char const *, int /*<<< orphan*/ *);
char *prompt(const char *prompt) { return prompt_r(prompt, NULL); }


x86 assembly (clang, -O0):
<prompt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <prompt_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prompt>:
xor    %esi,%esi
jmp    1030 <prompt_r@plt>

LLVM IR (-O0):
define i8* @prompt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @prompt_r(i8* %3, i32* null)
ret i8* %4
}

LLVM IR (-O2):
define i8* @prompt(i8* %0) {
%2 = tail call i8* @prompt_r(i8* %0, i32* null)
ret i8* %2
}
unsigned long fta_log_message_resume_null(void) { return 0xFFFFFFFF; }


x86 assembly (clang, -O0):
<fta_log_message_resume_null>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fta_log_message_resume_null>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i64 @fta_log_message_resume_null() {
ret i64 4294967295
}

LLVM IR (-O2):
define i64 @fta_log_message_resume_null() {
ret i64 4294967295
}
int fun505() { return 505; }


x86 assembly (clang, -O0):
<fun505>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f9,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun505>:
mov    $0x1f9,%eax
ret

LLVM IR (-O0):
define i32 @fun505() {
ret i32 505
}

LLVM IR (-O2):
define i32 @fun505() {
ret i32 505
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ diminuto_fd_read_generic(int, void *, int, size_t);
ssize_t diminuto_fd_read(int fd, void *buffer, size_t size) {
  return diminuto_fd_read_generic(fd, buffer, 1, size);
}


x86 assembly (clang, -O0):
<diminuto_fd_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0x1,%edx
call   1030 <diminuto_fd_read_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_fd_read>:
mov    %rdx,%rcx
mov    $0x1,%edx
jmp    1030 <diminuto_fd_read_generic@plt>

LLVM IR (-O0):
define i32 @diminuto_fd_read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @diminuto_fd_read_generic(i32 %7, i8* %8, i32 1, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @diminuto_fd_read(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @diminuto_fd_read_generic(i32 %0, i8* %1, i32 1, i64 %2)
ret i32 %4
}
/* Variables and functions */
char *__dlerror();
char *dlerror(void) { return __dlerror(); }


x86 assembly (clang, -O0):
<dlerror>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__dlerror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlerror>:
xor    %eax,%eax
jmp    1030 <__dlerror@plt>

LLVM IR (-O0):
define i8* @dlerror() {
%1 = call i8* (...) @__dlerror()
ret i8* %1
}

LLVM IR (-O2):
define i8* @dlerror() {
%1 = tail call i8* (...) @__dlerror()
ret i8* %1
}
void foo357() {}


x86 assembly (clang, -O0):
<foo357>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo357>:
ret

LLVM IR (-O0):
define void @foo357() {
ret void
}

LLVM IR (-O2):
define void @foo357() {
ret void
}
void gtk_image_get_icon_name() {}


x86 assembly (clang, -O0):
<gtk_image_get_icon_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_image_get_icon_name>:
ret

LLVM IR (-O0):
define void @gtk_image_get_icon_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_image_get_icon_name() {
ret void
}
_Bool tagend(char c) {
  char *check;
  check = "dDiuUoOxXpcCsS%";
  return ((check = ft_strchr(check, c)) && *check ? 1 : 0);
}


x86 assembly (clang, -O0):
<tagend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
movsbl -0x1(%rbp),%esi
mov    $0x0,%al
call   1030 <ft_strchr@plt>
movslq %eax,%rcx
mov    %rcx,-0x10(%rbp)
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x11(%rbp)
je     115e <tagend+0x4e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tagend>:
push   %rbx
mov    %edi,%esi
lea    0xee6(%rip),%rdi
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <ft_strchr@plt>
test   %eax,%eax
je     112f <tagend+0x1f>
cltq
cmpb   $0x0,(%rax)
setne  %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"dDiuUoOxXpcCsS%\00"
define zeroext i1 @tagend(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8*
store i8 %0, i8* %2
store i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @ft_strchr to i32 (i8*, i32, ...)*)(i8* %4, i32 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %16
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 0
br label %16
16: ; preds = %11, %1
%17 = phi i1 [ false, %1 ], [ %15, %11 ]
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 1, i32 0
%20 = icmp ne i32 %19, 0
ret i1 %20
}

LLVM IR (-O2):
@.str = [16 x i8] c"dDiuUoOxXpcCsS%\00"
define zeroext i1 @tagend(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @ft_strchr to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = sext i32 %3 to i64
%7 = inttoptr i64 %6 to i8*
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br label %10
10: ; preds = %5, %1
%11 = phi i1 [ false, %1 ], [ %9, %5 ]
ret i1 %11
}
int os2_nettol(char *s, int n) { return (-1); }


x86 assembly (clang, -O0):
<os2_nettol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os2_nettol>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @os2_nettol(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @os2_nettol(i8* nocapture readnone %0, i32 %1) {
ret i32 -1
}
/* Variables and functions */
scalar_t__ strnlen(char *, int /*<<< orphan*/);
void strnlen_zero() {
  if (strnlen("abc", 0) != 0)
    (void)*(char *)0;
  if (strnlen(0, 0) != 0)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strnlen_zero>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %esi,%esi
call   1030 <strnlen@plt>
cmp    $0x0,%rax
je     112c <strnlen_zero+0x1c>
xor    %esi,%esi
mov    %esi,%edi
call   1030 <strnlen@plt>
cmp    $0x0,%rax
je     113f <strnlen_zero+0x2f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen_zero>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <strnlen@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <strnlen@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
define void @strnlen_zero() {
%1 = call i64 @strnlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = load i8, i8* null
br label %5
5: ; preds = %3, %0
%6 = call i64 @strnlen(i8* null, i32 0)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = load i8, i8* null
br label %10
10: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
define void @strnlen_zero() {
%1 = tail call i64 @strnlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = tail call i64 @strnlen(i8* null, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__0__GeneralIO__makeInput();
void CC2420TransmitP__CCA__makeInput(void) {
  Msp430GpioC__0__GeneralIO__makeInput();
}


x86 assembly (clang, -O0):
<CC2420TransmitP__CCA__makeInput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__0__GeneralIO__makeInput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420TransmitP__CCA__makeInput>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__0__GeneralIO__makeInput@plt>

LLVM IR (-O0):
define void @CC2420TransmitP__CCA__makeInput() {
%1 = call i32 (...) @Msp430GpioC__0__GeneralIO__makeInput()
ret void
}

LLVM IR (-O2):
define void @CC2420TransmitP__CCA__makeInput() {
%1 = tail call i32 (...) @Msp430GpioC__0__GeneralIO__makeInput()
ret void
}
void LimitFloat(float *a, float min, float max) {
  if (*a < min)
    *a = min;
  if (*a > max)
    *a = max;
}


x86 assembly (clang, -O0):
<LimitFloat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <LimitFloat+0x35>
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1154 <LimitFloat+0x54>
movss  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LimitFloat>:
movss  (%rdi),%xmm2
ucomiss %xmm2,%xmm0
maxss  %xmm2,%xmm0
ja     1113 <LimitFloat+0x13>
ucomiss %xmm1,%xmm0
ja     1113 <LimitFloat+0x13>
ret
minss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
ret

LLVM IR (-O0):
define void @LimitFloat(float* %0, float %1, float %2) {
%4 = alloca float*
%5 = alloca float
%6 = alloca float
store float* %0, float** %4
store float %1, float* %5
store float %2, float* %6
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = load float, float* %5
%10 = fcmp olt float %8, %9
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load float, float* %5
%13 = load float*, float** %4
store float %12, float* %13
br label %14
14: ; preds = %11, %3
%15 = load float*, float** %4
%16 = load float, float* %15
%17 = load float, float* %6
%18 = fcmp ogt float %16, %17
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load float, float* %6
%21 = load float*, float** %4
store float %20, float* %21
br label %22
22: ; preds = %19, %14
ret void
}

LLVM IR (-O2):
define void @LimitFloat(float* nocapture %0, float %1, float %2) {
%4 = load float, float* %0
%5 = fcmp olt float %4, %1
%6 = select i1 %5, float %1, float %4
%7 = fcmp ogt float %6, %2
%8 = or i1 %5, %7
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = select i1 %7, float %2, float %6
store float %10, float* %0
br label %11
11: ; preds = %3, %9
ret void
}
float max(float a, float b) {
  if (a < b)
    return b;
  return a;
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <max+0x30>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    113a <max+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @max(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp olt float %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %5
store float %10, float* %3
br label %13
11: ; preds = %2
%12 = load float, float* %4
store float %12, float* %3
br label %13
13: ; preds = %11, %9
%14 = load float, float* %3
ret float %14
}

LLVM IR (-O2):
define float @max(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %1, float %0
ret float %4
}
/* Type definitions */
struct tempfile {
  int dummy;
};

/* Variables and functions */
struct tempfile *mks_tempfile_tsm(char const *, int /*<<< orphan*/, int);
struct tempfile *mks_tempfile_tm(const char *filename_template, int mode) {
  return mks_tempfile_tsm(filename_template, 0, mode);
}


x86 assembly (clang, -O0):
<mks_tempfile_tm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <mks_tempfile_tsm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mks_tempfile_tm>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <mks_tempfile_tsm@plt>

LLVM IR (-O0):
%struct.tempfile = type { i32 }
define %struct.tempfile* @mks_tempfile_tm(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call %struct.tempfile* @mks_tempfile_tsm(i8* %5, i32 0, i32 %6)
ret %struct.tempfile* %7
}

LLVM IR (-O2):
%struct.tempfile = type { i32 }
define %struct.tempfile* @mks_tempfile_tm(i8* %0, i32 %1) {
%3 = tail call %struct.tempfile* @mks_tempfile_tsm(i8* %0, i32 0, i32 %1)
ret %struct.tempfile* %3
}
/* Variables and functions */
char getchar();
void my_scanf(char *input) {
  char character;
  int i = 0;
  while (i < 520 && (character = getchar()) != '\n') {
    *(input + i) = character;
    i++;
  }
}


x86 assembly (clang, -O0):
<my_scanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x208,-0x10(%rbp)
mov    %al,-0x11(%rbp)
jge    114b <my_scanf+0x3b>
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x9(%rbp)
movsbl %al,%eax
cmp    $0xa,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115b <my_scanf+0x4b>
jmp    1177 <my_scanf+0x67>
mov    -0x9(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1123 <my_scanf+0x13>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_scanf>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%al
je     113c <my_scanf+0x2c>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
cmp    $0x208,%rbx
jne    1120 <my_scanf+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @my_scanf(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 520
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = call signext i8 (...) @getchar()
store i8 %9, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 10
br label %12
12: ; preds = %8, %5
%13 = phi i1 [ false, %5 ], [ %11, %8 ]
br i1 %13, label %14, label %22
14: ; preds = %12
%15 = load i8, i8* %3
%16 = load i8*, i8** %2
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 %15, i8* %19
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @my_scanf(i8* nocapture writeonly %0) {
br label %2
2: ; preds = %1, %6
%3 = phi i64 [ 0, %1 ], [ %8, %6 ]
%4 = tail call signext i8 (...) @getchar()
%5 = icmp eq i8 %4, 10
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %0, i64 %3
store i8 %4, i8* %7
%8 = add nuw nsw i64 %3, 1
%9 = icmp eq i64 %8, 520
br i1 %9, label %10, label %2
10: ; preds = %6, %2
ret void
}