xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
int /*<<< orphan*/ system(char *);
int file_copy(char *source, char *dest) {
  char buf[160 * 2];
  sprintf(buf, "/bin/cp %s %s", source, dest);
  return (!system(buf));
}


x86 assembly (clang, -O0):
<file_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x150,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x150(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xeb7(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x150(%rbp),%rdi
call   1030 <system@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x150,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_copy>:
push   %rbx
sub    $0x140,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xecb(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x140,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"/bin/cp %s %s\00"
define i32 @file_copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [320 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [320 x i8], [320 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8)
%10 = getelementptr inbounds [320 x i8], [320 x i8]* %5, i64 0, i64 0
%11 = call i32 @system(i8* %10)
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
@.str = [14 x i8] c"/bin/cp %s %s\00"
define i32 @file_copy(i8* %0, i8* %1) {
%3 = alloca [320 x i8]
%4 = getelementptr inbounds [320 x i8], [320 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = call i32 @system(i8* %4)
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
unsigned int modrm_mod_idx(const unsigned int mod) { return (mod + 1) / 4; }


x86 assembly (clang, -O0):
<modrm_mod_idx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
shr    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modrm_mod_idx>:
lea    0x1(%rdi),%eax
shr    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @modrm_mod_idx(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 1
%5 = udiv i32 %4, 4
ret i32 %5
}

LLVM IR (-O2):
define i32 @modrm_mod_idx(i32 %0) {
%2 = add i32 %0, 1
%3 = lshr i32 %2, 2
ret i32 %3
}
/* Variables and functions */
int rc_gpio_set_value_mmap(int, int /*<<< orphan*/);
int rc_disable_servo_power_rail() { return rc_gpio_set_value_mmap(80, 0); }


x86 assembly (clang, -O0):
<rc_disable_servo_power_rail>:
push   %rbp
mov    %rsp,%rbp
mov    $0x50,%edi
xor    %esi,%esi
call   1030 <rc_gpio_set_value_mmap@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rc_disable_servo_power_rail>:
mov    $0x50,%edi
xor    %esi,%esi
jmp    1030 <rc_gpio_set_value_mmap@plt>

LLVM IR (-O0):
define i32 @rc_disable_servo_power_rail() {
%1 = call i32 @rc_gpio_set_value_mmap(i32 80, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @rc_disable_servo_power_rail() {
%1 = tail call i32 @rc_gpio_set_value_mmap(i32 80, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ atan(double);
long double tanl(int /*<<< orphan*/);
long double tanatan(double x) { return (tanl(atan(x))); }


x86 assembly (clang, -O0):
<tanatan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <atan@plt>
mov    %eax,%edi
call   1030 <tanl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanatan>:
push   %rax
call   1040 <atan@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <tanl@plt>

LLVM IR (-O0):
define x86_fp80 @tanatan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @atan(double %3)
%5 = call x86_fp80 @tanl(i32 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @tanatan(double %0) {
%2 = tail call i32 @atan(double %0)
%3 = tail call x86_fp80 @tanl(i32 %2)
ret x86_fp80 %3
}
int stack_depot_init(void) { return 0; }


x86 assembly (clang, -O0):
<stack_depot_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_depot_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stack_depot_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @stack_depot_init() {
ret i32 0
}
double QuarticEaseInOut(double p) {
  if (p < 0.5) {
    return 8 * p * p * p * p;
  } else {
    double f = (p - 1);
    return -8 * f * f * f * f + 1;
  }
}


x86 assembly (clang, -O0):
<QuarticEaseInOut>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1142 <QuarticEaseInOut+0x42>
movsd  0xef4(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1189 <QuarticEaseInOut+0x89>
movsd  -0x10(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeb0(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe88(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<QuarticEaseInOut>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    112b <QuarticEaseInOut+0x2b>
movsd  0xf0a(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret
addsd  0xed5(%rip),%xmm0
movsd  0xed5(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
addsd  0xec5(%rip),%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @QuarticEaseInOut(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = fcmp olt double %5, 5.000000e-01
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load double, double* %3
%9 = fmul double 8.000000e+00, %8
%10 = load double, double* %3
%11 = fmul double %9, %10
%12 = load double, double* %3
%13 = fmul double %11, %12
%14 = load double, double* %3
%15 = fmul double %13, %14
store double %15, double* %2
br label %27
16: ; preds = %1
%17 = load double, double* %3
%18 = fsub double %17, 1.000000e+00
store double %18, double* %4
%19 = load double, double* %4
%20 = fmul double -8.000000e+00, %19
%21 = load double, double* %4
%22 = fmul double %20, %21
%23 = load double, double* %4
%24 = fmul double %22, %23
%25 = load double, double* %4
%26 = call double @llvm.fmuladd.f64(double %24, double %25, double 1.000000e+00)
store double %26, double* %2
br label %27
27: ; preds = %16, %7
%28 = load double, double* %2
ret double %28
}

LLVM IR (-O2):
define double @QuarticEaseInOut(double %0) {
%2 = fcmp olt double %0, 5.000000e-01
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = fmul double %0, 8.000000e+00
%5 = fmul double %4, %0
%6 = fmul double %5, %0
%7 = fmul double %6, %0
br label %14
8: ; preds = %1
%9 = fadd double %0, -1.000000e+00
%10 = fmul double %9, -8.000000e+00
%11 = fmul double %9, %10
%12 = fmul double %9, %11
%13 = tail call double @llvm.fmuladd.f64(double %12, double %9, double 1.000000e+00)
br label %14
14: ; preds = %8, %3
%15 = phi double [ %7, %3 ], [ %13, %8 ]
ret double %15
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("Usage: ./notify <SRC_DIR> <DST_DIR>\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Usage: ./notify <SRC_DIR> <DST_DIR>\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [36 x i8] c"Usage: ./notify <SRC_DIR> <DST_DIR>\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 1)
unreachable
}
void curs_raw(void) {}


x86 assembly (clang, -O0):
<curs_raw>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curs_raw>:
ret

LLVM IR (-O0):
define void @curs_raw() {
ret void
}

LLVM IR (-O2):
define void @curs_raw() {
ret void
}
/* Variables and functions */
unsigned int single_kiss();
unsigned int kiss(void) { return single_kiss(); }


x86 assembly (clang, -O0):
<kiss>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <single_kiss@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kiss>:
xor    %eax,%eax
jmp    1030 <single_kiss@plt>

LLVM IR (-O0):
define i32 @kiss() {
%1 = call i32 (...) @single_kiss()
ret i32 %1
}

LLVM IR (-O2):
define i32 @kiss() {
%1 = tail call i32 (...) @single_kiss()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ debug_eval();
int /*<<< orphan*/ debug_psq();
int /*<<< orphan*/ printf(char *);
void debug() {
  debug_psq();
  if (!debug_eval())
    printf("\nNo evaluation errors.\n");
}


x86 assembly (clang, -O0):
<debug>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <debug_psq@plt>
mov    $0x0,%al
call   1050 <debug_eval@plt>
cmp    $0x0,%eax
jne    1157 <debug+0x27>
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug>:
push   %rax
xor    %eax,%eax
call   1040 <debug_psq@plt>
xor    %eax,%eax
call   1050 <debug_eval@plt>
test   %eax,%eax
je     1145 <debug+0x15>
pop    %rax
ret
lea    0xeb4(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"\0ANo evaluation errors.\0A\00"
define void @debug() {
%1 = call i32 (...) @debug_psq()
%2 = call i32 (...) @debug_eval()
%3 = icmp ne i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"\0ANo evaluation errors.\00"
define void @debug() {
%1 = tail call i32 (...) @debug_psq()
%2 = tail call i32 (...) @debug_eval()
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void Usage() {
  puts("Converts 4BPP SMS/GG/WSC tiles to Neo-Geo Sprite tiles.");
  puts("Usage: neosprconv (infile) [outfile]");
}


x86 assembly (clang, -O0):
<Usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xf11(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf14(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"Converts 4BPP SMS/GG/WSC tiles to Neo-Geo Sprite tiles.\00"
@.str.1 = [37 x i8] c"Usage: neosprconv (infile) [outfile]\00"
define void @Usage() {
%1 = call i32 @puts(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [56 x i8] c"Converts 4BPP SMS/GG/WSC tiles to Neo-Geo Sprite tiles.\00"
@.str.1 = [37 x i8] c"Usage: neosprconv (infile) [outfile]\00"
define void @Usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void strtoupper_ascii(char *str) {
  char *p = str;
  while (*p) {
    if (*p >= 'a' && *p <= 'z') {
      *p = *p - ('a' - 'A');
    }
    p++;
  }
}


x86 assembly (clang, -O0):
<strtoupper_ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1160 <strtoupper_ascii+0x60>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x61,%eax
jl     114f <strtoupper_ascii+0x4f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7a,%eax
jg     114f <strtoupper_ascii+0x4f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
sub    $0x20,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strtoupper_ascii+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoupper_ascii>:
mov    (%rdi),%al
test   %al,%al
je     112a <strtoupper_ascii+0x2a>
add    $0x1,%rdi
jmp    111b <strtoupper_ascii+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <strtoupper_ascii+0x2a>
lea    -0x61(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <strtoupper_ascii+0x10>
add    $0xe0,%al
mov    %al,-0x1(%rdi)
jmp    1110 <strtoupper_ascii+0x10>
ret

LLVM IR (-O0):
define void @strtoupper_ascii(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %26, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %26
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 122
br i1 %18, label %19, label %26
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = sub nsw i32 %22, 32
%24 = trunc i32 %23 to i8
%25 = load i8*, i8** %3
store i8 %24, i8* %25
br label %26
26: ; preds = %19, %14, %9
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %3
br label %5
29: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @strtoupper_ascii(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -97
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nsw i8 %5, -32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret void
}
sumNumbersFrom1ToX(int x) {
  int s = 0;
  while (x > 0)
    s += x;
  x--;
}


x86 assembly (clang, -O0):
<sumNumbersFrom1ToX>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1126 <sumNumbersFrom1ToX+0x26>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110e <sumNumbersFrom1ToX+0xe>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumNumbersFrom1ToX>:
test   %edi,%edi
jle    1112 <sumNumbersFrom1ToX+0x12>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
jmp    1110 <sumNumbersFrom1ToX+0x10>
ret

LLVM IR (-O0):
define i32 @sumNumbersFrom1ToX(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %8, %1
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = add nsw i32 %10, %9
store i32 %11, i32* %4
br label %5
12: ; preds = %5
%13 = load i32, i32* %3
%14 = add nsw i32 %13, -1
store i32 %14, i32* %3
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @sumNumbersFrom1ToX(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %4
3: ; preds = %1, %3
br label %3
4: ; preds = %1
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ ta_oom_b(int /*<<< orphan*/);
int /*<<< orphan*/ ta_vasprintf_append(char **, char const *,
                                       int /*<<< orphan*/);
char *ta_talloc_vasprintf_append(char *s, const char *fmt, va_list ap) {
  ta_oom_b(ta_vasprintf_append(&s, fmt, ap));
  return s;
}


x86 assembly (clang, -O0):
<ta_talloc_vasprintf_append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
lea    -0x8(%rbp),%rdi
call   1040 <ta_vasprintf_append@plt>
mov    %eax,%edi
call   1030 <ta_oom_b@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ta_talloc_vasprintf_append>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1040 <ta_vasprintf_append@plt>
mov    %eax,%edi
call   1030 <ta_oom_b@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @ta_talloc_vasprintf_append(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = call i32 @ta_vasprintf_append(i8** %4, i8* %7, i32 %8)
%10 = call i32 @ta_oom_b(i32 %9)
%11 = load i8*, i8** %4
ret i8* %11
}

LLVM IR (-O2):
define i8* @ta_talloc_vasprintf_append(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
store i8* %0, i8** %4
%5 = call i32 @ta_vasprintf_append(i8** %4, i8* %1, i32 %2)
%6 = call i32 @ta_oom_b(i32 %5)
%7 = load i8*, i8** %4
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ mtspr(int, unsigned int);
void cpu_perf_stop(unsigned int conf) { mtspr(((7 << (11)) + 33), conf); }


x86 assembly (clang, -O0):
<cpu_perf_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x3821,%edi
call   1030 <mtspr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_perf_stop>:
mov    %edi,%esi
mov    $0x3821,%edi
jmp    1030 <mtspr@plt>

LLVM IR (-O0):
define void @cpu_perf_stop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @mtspr(i32 14369, i32 %3)
ret void
}

LLVM IR (-O2):
define void @cpu_perf_stop(i32 %0) {
%2 = tail call i32 @mtspr(i32 14369, i32 %0)
ret void
}
void gendsll() {}


x86 assembly (clang, -O0):
<gendsll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gendsll>:
ret

LLVM IR (-O0):
define void @gendsll() {
ret void
}

LLVM IR (-O2):
define void @gendsll() {
ret void
}
/* Variables and functions */
int ones_add(int, int *, int);
int __fan(int ea, int target[]) { return ones_add(ea, target, 0x00FFFFFF); }


x86 assembly (clang, -O0):
<__fan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0xffffff,%edx
call   1030 <ones_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fan>:
mov    $0xffffff,%edx
jmp    1030 <ones_add@plt>

LLVM IR (-O0):
define i32 @__fan(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @ones_add(i32 %5, i32* %6, i32 16777215)
ret i32 %7
}

LLVM IR (-O2):
define i32 @__fan(i32 %0, i32* %1) {
%3 = tail call i32 @ones_add(i32 %0, i32* %1, i32 16777215)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int foo(int);
int main() {
  if (foo(1) != 1)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <foo@plt>
cmp    $0x1,%eax
je     1149 <main+0x29>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <foo@plt>
cmp    $0x1,%eax
jne    1134 <main+0x14>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 1)
%3 = icmp ne i32 %2, 1
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 1)
%2 = icmp eq i32 %1, 1
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
main() {
  int x = 0;
  x = f1(1, 2);
  printf(x);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x0,%al
call   1040 <f1@plt>
mov    %eax,-0x4(%rbp)
movslq -0x4(%rbp),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
xor    %eax,%eax
call   1040 <f1@plt>
movslq %eax,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i32, i32, ...) bitcast (i32 (...)* @f1 to i32 (i32, i32, ...)*)(i32 1, i32 2)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
%6 = call i32 (i8*, ...) @printf(i8* %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @f1 to i32 (i32, i32, ...)*)(i32 1, i32 2)
%2 = sext i32 %1 to i64
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) %3)
ret i32 0
}
void foo_2_1_1_1_2_1_2_2_1() {}


x86 assembly (clang, -O0):
<foo_2_1_1_1_2_1_2_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_1_1_2_1_2_2_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_1_1_2_1_2_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_1_1_2_1_2_2_1() {
ret void
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_message_open_container(void *m, char type, const char *contents) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_message_open_container>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
mov    0x2ec5(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_open_container>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_message_open_container(i8* %0, i8 signext %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8* %2, i8** %6
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_message_open_container(i8* nocapture readnone %0, i8 signext %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @EINVAL
%5 = sub nsw i32 0, %4
ret i32 %5
}
int foo(int a, int b) { return (!a & a) | (b & !b); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
and    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
cmpl   $0x0,-0x8(%rbp)
setne  %dl
xor    $0xff,%dl
and    $0x1,%dl
movzbl %dl,%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %ecx,%ecx
test   %edi,%edi
sete   %cl
and    %edi,%ecx
xor    %eax,%eax
test   %esi,%esi
sete   %al
and    %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
%9 = load i32, i32* %3
%10 = and i32 %8, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = and i32 %11, %15
%17 = or i32 %10, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = zext i1 %3 to i32
%5 = and i32 %4, %0
%6 = icmp eq i32 %1, 0
%7 = zext i1 %6 to i32
%8 = and i32 %7, %1
%9 = or i32 %8, %5
ret i32 %9
}
void swap(unsigned x[]) { x[0] ^= x[1] ^= x[0] ^= x[1]; }


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
xor    0x4(%rax),%ecx
mov    %ecx,0x4(%rax)
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
rolq   $0x20,(%rdi)
ret

LLVM IR (-O0):
define void @swap(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = xor i32 %8, %5
store i32 %9, i32* %7
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = xor i32 %12, %9
store i32 %13, i32* %11
%14 = load i32*, i32** %2
%15 = getelementptr inbounds i32, i32* %14, i64 0
%16 = load i32, i32* %15
%17 = xor i32 %16, %13
store i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = load i32, i32* %0
store i32 %4, i32* %2
store i32 %3, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ m48clock(int /*<<< orphan*/);
void m48chrSetClock(uint16_t addr, uint8_t val) {
  (void)val;
  m48clock(addr);
}


x86 assembly (clang, -O0):
<m48chrSetClock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <m48clock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m48chrSetClock>:
jmp    1030 <m48clock@plt>

LLVM IR (-O0):
define void @m48chrSetClock(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @m48clock(i32 %6)
ret void
}

LLVM IR (-O2):
define void @m48chrSetClock(i32 %0, i32 %1) {
%3 = tail call i32 @m48clock(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DDSpriteBuffer_BltImg(int, int, int, int);
int GetStretchX(int);
int GetStretchY(int);
void subCopyAnimToScreen(int si, int graphic, int sync_frame) {
  int X, Y;
  X = GetStretchX(si);
  Y = GetStretchY(si);
  DDSpriteBuffer_BltImg(X, Y, graphic, sync_frame);
}


x86 assembly (clang, -O0):
<subCopyAnimToScreen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <GetStretchX@plt>
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <GetStretchY@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
call   1040 <DDSpriteBuffer_BltImg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subCopyAnimToScreen>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r15d
mov    %edi,%ebx
call   1030 <GetStretchX@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1050 <GetStretchY@plt>
mov    %ebp,%edi
mov    %eax,%esi
mov    %r15d,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <DDSpriteBuffer_BltImg@plt>

LLVM IR (-O0):
define void @subCopyAnimToScreen(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %4
%10 = call i32 @GetStretchX(i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %4
%12 = call i32 @GetStretchY(i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = call i32 @DDSpriteBuffer_BltImg(i32 %13, i32 %14, i32 %15, i32 %16)
ret void
}

LLVM IR (-O2):
define void @subCopyAnimToScreen(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @GetStretchX(i32 %0)
%5 = tail call i32 @GetStretchY(i32 %0)
%6 = tail call i32 @DDSpriteBuffer_BltImg(i32 %4, i32 %5, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
double acos(double);
double module_libc_acos(double x) { return acos(x); }


x86 assembly (clang, -O0):
<module_libc_acos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <acos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_libc_acos>:
jmp    1030 <acos@plt>

LLVM IR (-O0):
define double @module_libc_acos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @acos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @module_libc_acos(double %0) {
%2 = tail call double @acos(double %0)
ret double %2
}
void AVOID_EMPTY_UNIT_WARNING_BY_GCC_SELECT() {}


x86 assembly (clang, -O0):
<AVOID_EMPTY_UNIT_WARNING_BY_GCC_SELECT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AVOID_EMPTY_UNIT_WARNING_BY_GCC_SELECT>:
ret

LLVM IR (-O0):
define void @AVOID_EMPTY_UNIT_WARNING_BY_GCC_SELECT() {
ret void
}

LLVM IR (-O2):
define void @AVOID_EMPTY_UNIT_WARNING_BY_GCC_SELECT() {
ret void
}
float grad2(int hash, float x, float y) {
  switch (hash & 0x4) {
  case 0x0:
    return x + y;
  case 0x1:
    return -x + y;
  case 0x2:
    return x - y;
  case 0x3:
    return -x - y;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<grad2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x4,%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%eax
ja     11a2 <grad2+0xa2>
mov    -0x18(%rbp),%rax
lea    0xed1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movss  -0xc(%rbp),%xmm0
addss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11aa <grad2+0xaa>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
addss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11aa <grad2+0xaa>
movss  -0xc(%rbp),%xmm0
subss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11aa <grad2+0xaa>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
subss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11aa <grad2+0xaa>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<grad2>:
test   $0x4,%dil
je     110a <grad2+0xa>
xorps  %xmm0,%xmm0
ret
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @grad2(i32 %0, float %1, float %2) {
%4 = alloca float
%5 = alloca i32
%6 = alloca float
%7 = alloca float
store i32 %0, i32* %5
store float %1, float* %6
store float %2, float* %7
%8 = load i32, i32* %5
%9 = and i32 %8, 4
switch i32 %9, label %28 [
i32 0, label %10
i32 1, label %14
i32 2, label %19
i32 3, label %23
]
10: ; preds = %3
%11 = load float, float* %6
%12 = load float, float* %7
%13 = fadd float %11, %12
store float %13, float* %4
br label %29
14: ; preds = %3
%15 = load float, float* %6
%16 = fneg float %15
%17 = load float, float* %7
%18 = fadd float %16, %17
store float %18, float* %4
br label %29
19: ; preds = %3
%20 = load float, float* %6
%21 = load float, float* %7
%22 = fsub float %20, %21
store float %22, float* %4
br label %29
23: ; preds = %3
%24 = load float, float* %6
%25 = fneg float %24
%26 = load float, float* %7
%27 = fsub float %25, %26
store float %27, float* %4
br label %29
28: ; preds = %3
store float 0.000000e+00, float* %4
br label %29
29: ; preds = %28, %23, %19, %14, %10
%30 = load float, float* %4
ret float %30
}

LLVM IR (-O2):
define float @grad2(i32 %0, float %1, float %2) {
%4 = and i32 %0, 4
%5 = icmp eq i32 %4, 0
%6 = fadd float %1, %2
%7 = select i1 %5, float %6, float 0.000000e+00
ret float %7
}
const char *_Locale_am_str(struct _Locale_time *__DUMMY_PAR) { return 0; }


x86 assembly (clang, -O0):
<_Locale_am_str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_am_str>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct._Locale_time = type opaque
define i8* @_Locale_am_str(%struct._Locale_time* %0) {
%2 = alloca %struct._Locale_time*
store %struct._Locale_time* %0, %struct._Locale_time** %2
ret i8* null
}

LLVM IR (-O2):
%struct._Locale_time = type opaque
define noalias i8* @_Locale_am_str(%struct._Locale_time* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
unsigned int rand();
void maybe_close(int fd) {
  unsigned int r = rand();
  if (r & 1)
    close(fd);
}


x86 assembly (clang, -O0):
<maybe_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     114c <maybe_close+0x2c>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maybe_close>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <rand@plt>
test   $0x1,%al
jne    1130 <maybe_close+0x10>
pop    %rbx
ret
mov    %ebx,%edi
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @maybe_close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @rand()
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @close(i32 %9)
br label %11
11: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @maybe_close(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = and i32 %2, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @close(i32 %0)
br label %7
7: ; preds = %5, %1
ret void
}
char *strcpy(char *dst, const char *src) {
  int i;
  i = 0;
  while (src[i]) {
    dst[i] = src[i];
    i++;
  }
  dst[i] = '\0';
  return (dst);
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1149 <strcpy+0x49>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <strcpy+0x13>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1127 <strcpy+0x27>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    %cl,(%rax,%rdx,1)
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <strcpy+0x10>
mov    %edx,%ecx
movb   $0x0,(%rax,%rcx,1)
ret
xor    %ecx,%ecx
movb   $0x0,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %25
13: ; preds = %6
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = load i8*, i8** %3
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 %18, i8* %22
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %6
25: ; preds = %6
%26 = load i8*, i8** %3
%27 = load i32, i32* %5
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i8, i8* %26, i64 %28
store i8 0, i8* %29
%30 = load i8*, i8** %3
ret i8* %30
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8 [ %11, %5 ], [ %3, %2 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %7, i8* %8
%9 = add nuw nsw i64 %6, 1
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = and i64 %9, 4294967295
br label %15
15: ; preds = %13, %2
%16 = phi i64 [ 0, %2 ], [ %14, %13 ]
%17 = getelementptr inbounds i8, i8* %0, i64 %16
store i8 0, i8* %17
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ __CRAB_assert(int);
int bar(int);
int foo(int);
int rec1(int);
int main() {
  int x = 3;
  int y = bar(x);
  int z = rec1(y);
  int w = foo(y);
  __CRAB_assert(w == 9);
  return z + w;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <bar@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1060 <rec1@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <foo@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x9,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <__CRAB_assert@plt>
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x3,%edi
call   1030 <bar@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1060 <rec1@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1050 <foo@plt>
mov    %eax,%ebx
xor    %edi,%edi
cmp    $0x9,%eax
sete   %dil
call   1040 <__CRAB_assert@plt>
add    %ebx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @bar(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @rec1(i32 %8)
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = call i32 @foo(i32 %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 9
%14 = zext i1 %13 to i32
%15 = call i32 @__CRAB_assert(i32 %14)
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = add nsw i32 %16, %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @bar(i32 3)
%2 = tail call i32 @rec1(i32 %1)
%3 = tail call i32 @foo(i32 %1)
%4 = icmp eq i32 %3, 9
%5 = zext i1 %4 to i32
%6 = tail call i32 @__CRAB_assert(i32 %5)
%7 = add nsw i32 %3, %2
ret i32 %7
}
void f_floatcomplex(float __complex__ a) {}


x86 assembly (clang, -O0):
<f_floatcomplex>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_floatcomplex>:
ret

LLVM IR (-O0):
define void @f_floatcomplex(<2 x float> %0) {
%2 = alloca { float, float }
%3 = bitcast { float, float }* %2 to <2 x float>*
store <2 x float> %0, <2 x float>* %3
ret void
}

LLVM IR (-O2):
define void @f_floatcomplex(<2 x float> %0) {
ret void
}
/* Variables and functions */
double generalized_dimension(double const *const *, int, int, double,
                             int /*<<< orphan*/, int *);
double capacity_dimension(const double *const *data, int t, int n,
                          double epsilon, int *box_num) {
  return generalized_dimension(data, t, n, epsilon, 0, box_num);
}


x86 assembly (clang, -O0):
<capacity_dimension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
movsd  -0x18(%rbp),%xmm0
mov    -0x20(%rbp),%r8
xor    %ecx,%ecx
call   1030 <generalized_dimension@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capacity_dimension>:
mov    %rcx,%r8
xor    %ecx,%ecx
jmp    1030 <generalized_dimension@plt>

LLVM IR (-O0):
define double @capacity_dimension(double** %0, i32 %1, i32 %2, double %3, i32* %4) {
%6 = alloca double**
%7 = alloca i32
%8 = alloca i32
%9 = alloca double
%10 = alloca i32*
store double** %0, double*** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store double %3, double* %9
store i32* %4, i32** %10
%11 = load double**, double*** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load double, double* %9
%15 = load i32*, i32** %10
%16 = call double @generalized_dimension(double** %11, i32 %12, i32 %13, double %14, i32 0, i32* %15)
ret double %16
}

LLVM IR (-O2):
define double @capacity_dimension(double** %0, i32 %1, i32 %2, double %3, i32* %4) {
%6 = tail call double @generalized_dimension(double** %0, i32 %1, i32 %2, double %3, i32 0, i32* %4)
ret double %6
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ rpi_gpio_get_val(scalar_t__);
int /*<<< orphan*/ rpi_gpio_set_val(scalar_t__, int);
void rpi_gpio_toggle(uint32_t pin) {
  uint32_t result = rpi_gpio_get_val(pin);
  if (result) {
    rpi_gpio_set_val(pin, 0);
  } else {
    rpi_gpio_set_val(pin, 1);
  }
}


x86 assembly (clang, -O0):
<rpi_gpio_toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rpi_gpio_get_val@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1154 <rpi_gpio_toggle+0x34>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1040 <rpi_gpio_set_val@plt>
jmp    1162 <rpi_gpio_toggle+0x42>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1040 <rpi_gpio_set_val@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpi_gpio_toggle>:
push   %rbx
mov    %rdi,%rbx
call   1030 <rpi_gpio_get_val@plt>
xor    %esi,%esi
test   %rax,%rax
sete   %sil
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <rpi_gpio_set_val@plt>

LLVM IR (-O0):
define void @rpi_gpio_toggle(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @rpi_gpio_get_val(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @rpi_gpio_set_val(i64 %9, i32 0)
br label %14
11: ; preds = %1
%12 = load i64, i64* %2
%13 = call i32 @rpi_gpio_set_val(i64 %12, i32 1)
br label %14
14: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
define void @rpi_gpio_toggle(i64 %0) {
%2 = tail call i64 @rpi_gpio_get_val(i64 %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @rpi_gpio_set_val(i64 %0, i32 %4)
ret void
}
unsigned long hash_gd5(char *uri) {
  unsigned long hash = 0;
  int c;
  while ((c = *uri++)) {
    if (c == '?' || c == '\n')
      break;
    hash = hash + (hash << 2) - (hash << 19) - c;
  }
  return hash;
}


x86 assembly (clang, -O0):
<hash_gd5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     1171 <hash_gd5+0x71>
cmpl   $0x3f,-0x14(%rbp)
je     1142 <hash_gd5+0x42>
cmpl   $0xa,-0x14(%rbp)
jne    1147 <hash_gd5+0x47>
jmp    1171 <hash_gd5+0x71>
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
shl    $0x13,%rcx
sub    %rcx,%rax
movslq -0x14(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hash_gd5+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_gd5>:
xor    %eax,%eax
movabs $0x8000000000000401,%rcx
jmp    1122 <hash_gd5+0x22>
xchg   %ax,%ax
movsbq %dl,%rdx
add    $0x1,%rdi
imul   $0xfffffffffff80005,%rax,%rax
sub    %rdx,%rax
movzbl (%rdi),%edx
cmp    $0x3f,%rdx
ja     1110 <hash_gd5+0x10>
bt     %rdx,%rcx
jae    1110 <hash_gd5+0x10>
ret

LLVM IR (-O0):
define i64 @hash_gd5(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 0, i64* %3
br label %5
5: ; preds = %18, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %29
11: ; preds = %5
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 63
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 10
br i1 %16, label %17, label %18
17: ; preds = %14, %11
br label %29
18: ; preds = %14
%19 = load i64, i64* %3
%20 = load i64, i64* %3
%21 = shl i64 %20, 2
%22 = add i64 %19, %21
%23 = load i64, i64* %3
%24 = shl i64 %23, 19
%25 = sub i64 %22, %24
%26 = load i32, i32* %4
%27 = sext i32 %26 to i64
%28 = sub i64 %25, %27
store i64 %28, i64* %3
br label %5
29: ; preds = %17, %5
%30 = load i64, i64* %3
ret i64 %30
}

LLVM IR (-O2):
define i64 @hash_gd5(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ 0, %1 ], [ %10, %6 ]
%4 = phi i8* [ %0, %1 ], [ %7, %6 ]
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %11
i8 63, label %11
i8 10, label %11
]
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %4, i64 1
%8 = mul i64 %3, -524283
%9 = sext i8 %5 to i64
%10 = sub i64 %8, %9
br label %2
11: ; preds = %2, %2, %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
#define SIGALRM 128
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stdout;
void signalHander(int signo) {
  switch (signo) {
  case SIGALRM:
    fprintf(stdout, "%s", "hogehoge");
    exit(EXIT_SUCCESS);
  }
}


x86 assembly (clang, -O0):
<signalHander>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x80,%eax
jne    1168 <signalHander+0x48>
jmp    113e <signalHander+0x1e>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xeb2(%rip),%rsi
lea    0xeae(%rip),%rdx
call   1030 <fprintf@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signalHander>:
cmp    $0x80,%edi
je     1129 <signalHander+0x9>
ret
push   %rax
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
lea    0xec2(%rip),%rdx
call   1030 <fprintf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [3 x i8] c"%s\00"
@.str.1 = [9 x i8] c"hogehoge\00"
@EXIT_SUCCESS = global i32 0
define void @signalHander(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %9 [
i32 128, label %4
]
4: ; preds = %1
%5 = load i32, i32* @stdout
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [3 x i8] c"%s\00"
@.str.1 = [9 x i8] c"hogehoge\00"
@EXIT_SUCCESS = global i32 0
define void @signalHander(i32 %0) {
%2 = icmp eq i32 %0, 128
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = load i32, i32* @stdout
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32, i32* @EXIT_SUCCESS
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %1
ret void
}
mpn_print() {}


x86 assembly (clang, -O0):
<mpn_print>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpn_print>:
ret

LLVM IR (-O0):
define i32 @mpn_print() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @mpn_print() {
ret i32 undef
}