xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ onepass(int *, int);
void bubblesort(int a[], int n) {
  int i;
  for (i = 0; i < n - 1; i++)
    if (!onepass(a, n - i))
      break;
}


x86 assembly (clang, -O0):
<bubblesort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    1167 <bubblesort+0x57>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
sub    -0x10(%rbp),%esi
call   1030 <onepass@plt>
cmp    $0x0,%eax
jne    1154 <bubblesort+0x44>
jmp    1167 <bubblesort+0x57>
jmp    1159 <bubblesort+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <bubblesort+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bubblesort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    $0x2,%esi
jl     114b <bubblesort+0x3b>
mov    %esi,%ebx
mov    %rdi,%r14
lea    -0x1(%rbx),%r15d
mov    $0x1,%ebp
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <onepass@plt>
test   %eax,%eax
je     114b <bubblesort+0x3b>
lea    0x1(%rbp),%eax
add    $0xffffffff,%ebx
cmp    %r15d,%ebp
mov    %eax,%ebp
jl     1130 <bubblesort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @bubblesort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 1
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i32*, i32** %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sub nsw i32 %13, %14
%16 = call i32 @onepass(i32* %12, i32 %15)
%17 = icmp ne i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %11
br label %23
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %18, %6
ret void
}

LLVM IR (-O2):
define void @bubblesort(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = icmp sgt i32 %1, 1
br i1 %4, label %5, label %13
5: ; preds = %2, %5
%6 = phi i32 [ %10, %5 ], [ 0, %2 ]
%7 = sub nsw i32 %1, %6
%8 = tail call i32 @onepass(i32* %0, i32 %7)
%9 = icmp ne i32 %8, 0
%10 = add nuw nsw i32 %6, 1
%11 = icmp slt i32 %10, %3
%12 = select i1 %9, i1 %11, i1 false
br i1 %12, label %5, label %13
13: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ dev_t;

/* Variables and functions */
int minor(dev_t dev) { return 0; }


x86 assembly (clang, -O0):
<minor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minor>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @minor(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @minor(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR4E_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR4E_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR4E_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR4E_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR4E_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
void timestamp_sync(void) {}


x86 assembly (clang, -O0):
<timestamp_sync>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timestamp_sync>:
ret

LLVM IR (-O0):
define void @timestamp_sync() {
ret void
}

LLVM IR (-O2):
define void @timestamp_sync() {
ret void
}
int pldummy_pbm() { return 0; }


x86 assembly (clang, -O0):
<pldummy_pbm>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pldummy_pbm>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pldummy_pbm() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pldummy_pbm() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ e_absx();
int /*<<< orphan*/ e_rol();
int /*<<< orphan*/ e_writeback();
void e_rol_absx() {
  e_absx();
  e_rol();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_rol_absx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <e_absx@plt>
mov    $0x0,%al
call   1050 <e_rol@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_rol_absx>:
push   %rax
xor    %eax,%eax
call   1040 <e_absx@plt>
xor    %eax,%eax
call   1050 <e_rol@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_rol_absx() {
%1 = call i32 (...) @e_absx()
%2 = call i32 (...) @e_rol()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_rol_absx() {
%1 = tail call i32 (...) @e_absx()
%2 = tail call i32 (...) @e_rol()
%3 = tail call i32 (...) @e_writeback()
ret void
}
int my_ceil(int val, int div) {
  if (div == 0)
    return 0;
  else
    return (val + div - 1) / div;
}


x86 assembly (clang, -O0):
<my_ceil>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1120 <my_ceil+0x20>
movl   $0x0,-0x4(%rbp)
jmp    1130 <my_ceil+0x30>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
sub    $0x1,%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_ceil>:
test   %esi,%esi
je     110e <my_ceil+0xe>
lea    (%rdi,%rsi,1),%eax
add    $0xffffffff,%eax
cltd
idiv   %esi
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_ceil(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %16
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = add nsw i32 %10, %11
%13 = sub nsw i32 %12, 1
%14 = load i32, i32* %5
%15 = sdiv i32 %13, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %9, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @my_ceil(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = add i32 %0, -1
%6 = add i32 %5, %1
%7 = sdiv i32 %6, %1
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 0, %2 ]
ret i32 %9
}
unsigned int linux_inl(unsigned long port) {
  return (*(volatile unsigned long *)(0xb0100000 + port));
}


x86 assembly (clang, -O0):
<linux_inl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xb0100000,%rax
add    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linux_inl>:
mov    $0xb0100000,%eax
mov    (%rdi,%rax,1),%rax
ret

LLVM IR (-O0):
define i32 @linux_inl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 2953838592, %3
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @linux_inl(i64 %0) {
%2 = add i64 %0, 2953838592
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int gca_cmp2_int64(const void *aa, const void *bb, void *p) {
  (void)p;
  const int64_t a = *(const int64_t *)aa;
  const int64_t b = *(const int64_t *)bb;
  return (((a) > (b)) - ((b) > (a)));
}


x86 assembly (clang, -O0):
<gca_cmp2_int64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x28(%rbp),%rcx
cmp    -0x20(%rbp),%rcx
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gca_cmp2_int64>:
mov    (%rdi),%rcx
mov    (%rsi),%rdx
xor    %eax,%eax
xor    %esi,%esi
cmp    %rdx,%rcx
setg   %al
setl   %sil
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gca_cmp2_int64(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%9 = load i8*, i8** %6
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %7
%13 = load i8*, i8** %5
%14 = bitcast i8* %13 to i64*
%15 = load i64, i64* %14
store i64 %15, i64* %8
%16 = load i64, i64* %7
%17 = load i64, i64* %8
%18 = icmp sgt i64 %16, %17
%19 = zext i1 %18 to i32
%20 = load i64, i64* %8
%21 = load i64, i64* %7
%22 = icmp sgt i64 %20, %21
%23 = zext i1 %22 to i32
%24 = sub nsw i32 %19, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @gca_cmp2_int64(i8* nocapture %0, i8* nocapture %1, i8* nocapture readnone %2) {
%4 = bitcast i8* %0 to i64*
%5 = load i64, i64* %4
%6 = bitcast i8* %1 to i64*
%7 = load i64, i64* %6
%8 = icmp sgt i64 %5, %7
%9 = zext i1 %8 to i32
%10 = icmp sgt i64 %7, %5
%11 = sext i1 %10 to i32
%12 = add nsw i32 %11, %9
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ run_execvp_test();
void run_execvP_test() { run_execvp_test(); }


x86 assembly (clang, -O0):
<run_execvP_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <run_execvp_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_execvP_test>:
xor    %eax,%eax
jmp    1030 <run_execvp_test@plt>

LLVM IR (-O0):
define void @run_execvP_test() {
%1 = call i32 (...) @run_execvp_test()
ret void
}

LLVM IR (-O2):
define void @run_execvP_test() {
%1 = tail call i32 (...) @run_execvp_test()
ret void
}
int ShrTest14(int Y, int X, unsigned C, int CC) {
  return (Y | ((X >> C) & CC)) << C;
}


x86 assembly (clang, -O0):
<ShrTest14>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShrTest14>:
mov    %ecx,%eax
mov    %edx,%ecx
sar    %cl,%esi
and    %esi,%eax
or     %edi,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ShrTest14(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = ashr i32 %10, %11
%13 = load i32, i32* %8
%14 = and i32 %12, %13
%15 = or i32 %9, %14
%16 = load i32, i32* %7
%17 = shl i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @ShrTest14(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = ashr i32 %1, %2
%6 = and i32 %5, %3
%7 = or i32 %6, %0
%8 = shl i32 %7, %2
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_read;
int /*<<< orphan*/ syscall(int /*<<< orphan*/, int, void *, size_t);
ssize_t sys_read(int fd, void *buf, size_t len) {
  return syscall(SYS_read, fd, buf, len);
}


x86 assembly (clang, -O0):
<sys_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_read>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_read = global i32 0
define i32 @sys_read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* @SYS_read
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @syscall(i32 %7, i32 %8, i8* %9, i64 %10)
ret i32 %11
}

LLVM IR (-O2):
@SYS_read = global i32 0
define i32 @sys_read(i32 %0, i8* %1, i64 %2) {
%4 = load i32, i32* @SYS_read
%5 = tail call i32 @syscall(i32 %4, i32 %0, i8* %1, i64 %2)
ret i32 %5
}
/* Variables and functions */
void *memalign(int, size_t);
void *Aligned_UnsafeMalloc(size_t size) {
  void *buf;
  buf = memalign((1 << 12), size);
  ((void)0);
  return buf;
}


x86 assembly (clang, -O0):
<Aligned_UnsafeMalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1000,%edi
call   1030 <memalign@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Aligned_UnsafeMalloc>:
mov    %rdi,%rsi
mov    $0x1000,%edi
jmp    1030 <memalign@plt>

LLVM IR (-O0):
define i8* @Aligned_UnsafeMalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @memalign(i32 4096, i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @Aligned_UnsafeMalloc(i64 %0) {
%2 = tail call align 4096 i8* @memalign(i32 4096, i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ pause();
void *tfn(void *args) { pause(); }


x86 assembly (clang, -O0):
<tfn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <pause@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tfn>:
xor    %eax,%eax
jmp    1030 <pause@plt>

LLVM IR (-O0):
define i8* @tfn(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 (...) @pause()
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @tfn(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @pause()
ret i8* undef
}
/* Type definitions */
typedef int /*<<< orphan*/ buff;

/* Variables and functions */
float atof(char *);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
int /*<<< orphan*/ trap_Cvar_VariableStringBuffer(char const *, char *, int);
float CG_Cvar_Get(const char *cvar) {
  char buff[128];
  memset(buff, 0, sizeof(buff));
  trap_Cvar_VariableStringBuffer(cvar, buff, sizeof(buff));
  return atof(buff);
}


x86 assembly (clang, -O0):
<CG_Cvar_Get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x90(%rbp),%rdi
xor    %esi,%esi
mov    $0x80,%edx
call   1040 <memset@plt>
mov    -0x8(%rbp),%rdi
lea    -0x90(%rbp),%rsi
mov    $0x80,%edx
call   1050 <trap_Cvar_VariableStringBuffer@plt>
lea    -0x90(%rbp),%rdi
call   1030 <atof@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_Cvar_Get>:
push   %r14
push   %rbx
sub    $0x88,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    %r14,%rdi
xor    %esi,%esi
mov    $0x80,%edx
call   1040 <memset@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x80,%edx
call   1050 <trap_Cvar_VariableStringBuffer@plt>
mov    %r14,%rdi
call   1030 <atof@plt>
add    $0x88,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define float @CG_Cvar_Get(i8* %0) {
%2 = alloca i8*
%3 = alloca [128 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%5 = call i32 @memset(i8* %4, i32 0, i32 128)
%6 = load i8*, i8** %2
%7 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%8 = call i32 @trap_Cvar_VariableStringBuffer(i8* %6, i8* %7, i32 128)
%9 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%10 = call float @atof(i8* %9)
ret float %10
}

LLVM IR (-O2):
define float @CG_Cvar_Get(i8* %0) {
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%4 = call i32 @memset(i8* %3, i32 0, i32 128)
%5 = call i32 @trap_Cvar_VariableStringBuffer(i8* %0, i8* %3, i32 128)
%6 = call float @atof(i8* %3)
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ kprintf(char *, int);
void isrHandle3() { kprintf("ISR %d.\n", 3); }


x86 assembly (clang, -O0):
<isrHandle3>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x3,%esi
call   1030 <kprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isrHandle3>:
lea    0xee9(%rip),%rdi
mov    $0x3,%esi
jmp    1030 <kprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle3() {
%1 = call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 3)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle3() {
%1 = tail call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 3)
ret void
}
int get_file_int(char file_chr) {
  if (file_chr >= 'a' && file_chr <= 'h')
    return (int)(file_chr - 'a');
  return -1;
}


x86 assembly (clang, -O0):
<get_file_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1133 <get_file_int+0x33>
movsbl -0x5(%rbp),%eax
cmp    $0x68,%eax
jg     1133 <get_file_int+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    113a <get_file_int+0x3a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_file_int>:
lea    -0x61(%rdi),%eax
lea    -0x61(%rdi),%ecx
cmp    $0x8,%al
mov    $0xffffffff,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @get_file_int(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 104
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 97
store i32 %14, i32* %2
br label %16
15: ; preds = %7, %1
store i32 -1, i32* %2
br label %16
16: ; preds = %15, %11
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @get_file_int(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 8
%4 = sext i8 %0 to i32
%5 = add nsw i32 %4, -97
%6 = select i1 %3, i32 %5, i32 -1
ret i32 %6
}
void LedsP$Led2$set(void) { HplAtm128GeneralIOPinP$0$IO$set(); }


x86 assembly (clang, -O0):
<LedsP$Led2$set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP$0$IO$set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP$Led2$set>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP$0$IO$set@plt>

LLVM IR (-O0):
define void @"LedsP$Led2$set"() {
%1 = call i32 (...) @"HplAtm128GeneralIOPinP$0$IO$set"()
ret void
}

LLVM IR (-O2):
define void @"LedsP$Led2$set"() {
%1 = tail call i32 (...) @"HplAtm128GeneralIOPinP$0$IO$set"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ writel(int, void *);
void set__PIO_PCx__ALTERNATIVE_OUTPUT_PUSH_PULL(void *base, int pin) {
  writel(((0x1) & 0x1) << pin, base + (0x24 + (2) * 0x10));
  writel(((0x1) & 0x1) << pin, base + (0x24 + (1) * 0x10));
  writel(((0x1) & 0x1) << pin, base + (0x28 + (0) * 0x10));
}


x86 assembly (clang, -O0):
<set__PIO_PCx__ALTERNATIVE_OUTPUT_PUSH_PULL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
mov    -0x8(%rbp),%rsi
add    $0x44,%rsi
call   1030 <writel@plt>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
mov    -0x8(%rbp),%rsi
add    $0x34,%rsi
call   1030 <writel@plt>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
mov    -0x8(%rbp),%rsi
add    $0x28,%rsi
call   1030 <writel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set__PIO_PCx__ALTERNATIVE_OUTPUT_PUSH_PULL>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ecx
mov    %rdi,%rbx
mov    $0x1,%ebp
shl    %cl,%ebp
lea    0x44(%rdi),%rsi
mov    %ebp,%edi
call   1030 <writel@plt>
lea    0x34(%rbx),%rsi
mov    %ebp,%edi
call   1030 <writel@plt>
add    $0x28,%rbx
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <writel@plt>

LLVM IR (-O0):
define void @set__PIO_PCx__ALTERNATIVE_OUTPUT_PUSH_PULL(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i8*, i8** %3
%8 = getelementptr i8, i8* %7, i64 68
%9 = call i32 @writel(i32 %6, i8* %8)
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = load i8*, i8** %3
%13 = getelementptr i8, i8* %12, i64 52
%14 = call i32 @writel(i32 %11, i8* %13)
%15 = load i32, i32* %4
%16 = shl i32 1, %15
%17 = load i8*, i8** %3
%18 = getelementptr i8, i8* %17, i64 40
%19 = call i32 @writel(i32 %16, i8* %18)
ret void
}

LLVM IR (-O2):
define void @set__PIO_PCx__ALTERNATIVE_OUTPUT_PUSH_PULL(i8* %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = getelementptr i8, i8* %0, i64 68
%5 = tail call i32 @writel(i32 %3, i8* %4)
%6 = getelementptr i8, i8* %0, i64 52
%7 = tail call i32 @writel(i32 %3, i8* %6)
%8 = getelementptr i8, i8* %0, i64 40
%9 = tail call i32 @writel(i32 %3, i8* %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ExtSelectPublic(char *, char *);
void ExttLogTypeSelect(void) {
  ExtSelectPublic(
      "tLogType",
      "tLogType.uLogType,tLogType.cLabel,tLogType.uOwner,tLogType.uCreatedBy,"
      "tLogType.uCreatedDate,tLogType.uModBy,tLogType.uModDate");
}


x86 assembly (clang, -O0):
<ExttLogTypeSelect>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <ExtSelectPublic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttLogTypeSelect>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
jmp    1030 <ExtSelectPublic@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"tLogType\00"
@.str.1 = [126 x i8] c"tLogType.uLogType,tLogType.cLabel,tLogType.uOwner,tLogType.uCreatedBy,tLogType.uCreatedDate,tLogType.uModBy,tLogType.uModDate\00"
define void @ExttLogTypeSelect() {
%1 = call i32 @ExtSelectPublic(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([126 x i8], [126 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"tLogType\00"
@.str.1 = [126 x i8] c"tLogType.uLogType,tLogType.cLabel,tLogType.uOwner,tLogType.uCreatedBy,tLogType.uCreatedDate,tLogType.uModBy,tLogType.uModDate\00"
define void @ExttLogTypeSelect() {
%1 = tail call i32 @ExtSelectPublic(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([126 x i8], [126 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ hal_iic_start(int);
int /*<<< orphan*/ hal_iic_stop();
int /*<<< orphan*/ hal_iic_write(int const);
void rtc_set_alarm_state(const uint8_t state) {
  hal_iic_start(0xd0U + 0x00U);
  hal_iic_write(0x0bU);
  hal_iic_write(state);
  hal_iic_stop();
}


x86 assembly (clang, -O0):
<rtc_set_alarm_state>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xd0,%edi
call   1050 <hal_iic_start@plt>
mov    $0xb,%edi
call   1040 <hal_iic_write@plt>
mov    -0x4(%rbp),%edi
call   1040 <hal_iic_write@plt>
mov    $0x0,%al
call   1030 <hal_iic_stop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_set_alarm_state>:
push   %rbx
mov    %edi,%ebx
mov    $0xd0,%edi
call   1050 <hal_iic_start@plt>
mov    $0xb,%edi
call   1040 <hal_iic_write@plt>
mov    %ebx,%edi
call   1040 <hal_iic_write@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <hal_iic_stop@plt>

LLVM IR (-O0):
define void @rtc_set_alarm_state(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @hal_iic_start(i32 208)
%4 = call i32 @hal_iic_write(i32 11)
%5 = load i32, i32* %2
%6 = call i32 @hal_iic_write(i32 %5)
%7 = call i32 (...) @hal_iic_stop()
ret void
}

LLVM IR (-O2):
define void @rtc_set_alarm_state(i32 %0) {
%2 = tail call i32 @hal_iic_start(i32 208)
%3 = tail call i32 @hal_iic_write(i32 11)
%4 = tail call i32 @hal_iic_write(i32 %0)
%5 = tail call i32 (...) @hal_iic_stop()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atasm_error(char *, int);
int /*<<< orphan*/ put_byte(int);
int put_opcode(int b) {
  if (b == -1)
    atasm_error("Illegal addressing mode.", 1);
  else
    put_byte(b);
  return 0;
}


x86 assembly (clang, -O0):
<put_opcode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    114b <put_opcode+0x2b>
lea    0xec4(%rip),%rdi
mov    $0x1,%esi
call   1030 <atasm_error@plt>
jmp    1153 <put_opcode+0x33>
mov    -0x4(%rbp),%edi
call   1040 <put_byte@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_opcode>:
push   %rax
cmp    $0xffffffff,%edi
je     112d <put_opcode+0xd>
call   1040 <put_byte@plt>
jmp    113e <put_opcode+0x1e>
lea    0xecc(%rip),%rdi
mov    $0x1,%esi
call   1030 <atasm_error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Illegal addressing mode.\00"
define i32 @put_opcode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @atasm_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 1)
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = call i32 @put_byte(i32 %8)
br label %10
10: ; preds = %7, %5
ret i32 0
}

LLVM IR (-O2):
@.str = [25 x i8] c"Illegal addressing mode.\00"
define i32 @put_opcode(i32 %0) {
%2 = icmp eq i32 %0, -1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @atasm_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 1)
br label %7
5: ; preds = %1
%6 = tail call i32 @put_byte(i32 %0)
br label %7
7: ; preds = %5, %3
ret i32 0
}
void do_something(struct test_struct *a) {
  do_something(a);
  do_something(a);
}


x86 assembly (clang, -O0):
<do_something>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <do_something@plt>
mov    -0x8(%rbp),%rdi
call   1030 <do_something@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_something>:
push   %rax
call   1030 <do_something@plt>
cs nopw 0x0(%rax,%rax,1)
jmp    1120 <do_something+0x10>

LLVM IR (-O0):
%struct.test_struct = type opaque
define void @do_something(%struct.test_struct* %0) {
%2 = alloca %struct.test_struct*
store %struct.test_struct* %0, %struct.test_struct** %2
%3 = load %struct.test_struct*, %struct.test_struct** %2
%4 = load %struct.test_struct*, %struct.test_struct** %2
ret void
}

LLVM IR (-O2):
%struct.test_struct = type opaque
define void @do_something(%struct.test_struct* nocapture %0) {
tail call void @do_something(%struct.test_struct* %0)
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ longa();
void foo2() {
  int i;
  for (i = 0; i < 10; i++)
    longa();
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    113e <foo2+0x2e>
mov    $0x0,%al
call   1030 <longa@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <foo2+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
push   %rax
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
call   1030 <longa@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <longa@plt>

LLVM IR (-O0):
define void @foo2() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 (...) @longa()
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @foo2() {
%1 = tail call i32 (...) @longa()
%2 = tail call i32 (...) @longa()
%3 = tail call i32 (...) @longa()
%4 = tail call i32 (...) @longa()
%5 = tail call i32 (...) @longa()
%6 = tail call i32 (...) @longa()
%7 = tail call i32 (...) @longa()
%8 = tail call i32 (...) @longa()
%9 = tail call i32 (...) @longa()
%10 = tail call i32 (...) @longa()
ret void
}
/* Variables and functions */
int mc_rand();
int mc_rand_odd(int min_n, int max_n) {
  int mod = max_n - min_n;
  int x = max_n;
  while (x >= max_n) {
    x = mc_rand() % mod + min_n;
    if (0 == (x & 1)) {
      x += 1;
    }
  }
  return x;
}


x86 assembly (clang, -O0):
<mc_rand_odd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1168 <mc_rand_odd+0x58>
mov    $0x0,%al
call   1030 <mc_rand@plt>
cltd
idivl  -0xc(%rbp)
add    -0x4(%rbp),%edx
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
and    $0x1,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    1163 <mc_rand_odd+0x53>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <mc_rand_odd+0x1d>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_rand_odd>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
mov    %esi,%ebx
sub    %edi,%ebx
nopl   (%rax)
xor    %eax,%eax
call   1030 <mc_rand@plt>
cltd
idiv   %ebx
add    %ebp,%edx
mov    %edx,%eax
not    %eax
and    $0x1,%eax
add    %edx,%eax
cmp    %r14d,%eax
jge    1120 <mc_rand_odd+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mc_rand_odd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
store i32 %10, i32* %6
br label %11
11: ; preds = %27, %2
%12 = load i32, i32* %6
%13 = load i32, i32* %4
%14 = icmp sge i32 %12, %13
br i1 %14, label %15, label %28
15: ; preds = %11
%16 = call i32 (...) @mc_rand()
%17 = load i32, i32* %5
%18 = srem i32 %16, %17
%19 = load i32, i32* %3
%20 = add nsw i32 %18, %19
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = and i32 %21, 1
%23 = icmp eq i32 0, %22
br i1 %23, label %24, label %27
24: ; preds = %15
%25 = load i32, i32* %6
%26 = add nsw i32 %25, 1
store i32 %26, i32* %6
br label %27
27: ; preds = %24, %15
br label %11
28: ; preds = %11
%29 = load i32, i32* %6
ret i32 %29
}

LLVM IR (-O2):
define i32 @mc_rand_odd(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
br label %4
4: ; preds = %2, %4
%5 = tail call i32 (...) @mc_rand()
%6 = srem i32 %5, %3
%7 = add nsw i32 %6, %0
%8 = and i32 %7, 1
%9 = xor i32 %8, 1
%10 = add nsw i32 %9, %7
%11 = icmp slt i32 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ SetCurrentStatus(int, char *);
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int execvp(char *, char **);
void SpawnExec(char *arguments[]) {
  int ReturnVal;
  assert(arguments != NULL);
  ReturnVal = execvp(arguments[0], arguments);
  if (ReturnVal == -1) {
    SetCurrentStatus(-1, "exit value");
  } else {
    SetCurrentStatus(0, "exit value");
  }
}


x86 assembly (clang, -O0):
<SpawnExec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <execvp@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    1181 <SpawnExec+0x51>
mov    $0xffffffff,%edi
lea    0xe89(%rip),%rsi
call   1040 <SetCurrentStatus@plt>
jmp    118f <SpawnExec+0x5f>
xor    %edi,%edi
lea    0xe76(%rip),%rsi
call   1040 <SetCurrentStatus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SpawnExec>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
mov    (%rbx),%rdi
mov    %rbx,%rsi
call   1050 <execvp@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
neg    %edi
lea    0xea1(%rip),%rsi
pop    %rbx
jmp    1040 <SetCurrentStatus@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"exit value\00"
define void @SpawnExec(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i8**, i8*** %2
%9 = getelementptr inbounds i8*, i8** %8, i64 0
%10 = load i8*, i8** %9
%11 = load i8**, i8*** %2
%12 = call i32 @execvp(i8* %10, i8** %11)
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, -1
br i1 %14, label %15, label %17
15: ; preds = %1
%16 = call i32 @SetCurrentStatus(i32 -1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %19
17: ; preds = %1
%18 = call i32 @SetCurrentStatus(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %17, %15
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"exit value\00"
define void @SpawnExec(i8** %0) {
%2 = icmp ne i8** %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = load i8*, i8** %0
%6 = tail call i32 @execvp(i8* %5, i8** %0)
%7 = icmp eq i32 %6, -1
%8 = sext i1 %7 to i32
%9 = tail call i32 @SetCurrentStatus(i32 %8, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
void ff_hevc_put_hevc_uni_w_epel_hv24_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_hv24_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_hv24_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_hv24_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_hv24_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("BOOTLOADER,DRIVER:STT30USB,VERSION:34556123\n");
  printf("BOOTLOADER,DRIVER:STT30USB,VERSION:34556123\n");
  printf("RETURN:-4,No such device\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    0xeef(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xefd(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"BOOTLOADER,DRIVER:STT30USB,VERSION:34556123\0A\00"
@.str.1 = [26 x i8] c"RETURN:-4,No such device\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str.2 = [44 x i8] c"BOOTLOADER,DRIVER:STT30USB,VERSION:34556123\00"
@str.3 = [25 x i8] c"RETURN:-4,No such device\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.2, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str.3, i64 0, i64 0))
ret i32 0
}
int qsort_asc_uivector(const void *a, const void *b) {
  return (*(unsigned *)a - *(unsigned *)b);
}


x86 assembly (clang, -O0):
<qsort_asc_uivector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_asc_uivector>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @qsort_asc_uivector(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @qsort_asc_uivector(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub i32 %4, %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint8_t;

/* Variables and functions */
void volatile_fetch_and_u8(uint8_t *dest, uint8_t val) {
  *((volatile uint8_t *)dest) &= val;
}


x86 assembly (clang, -O0):
<volatile_fetch_and_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_and_u8>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
and    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @volatile_fetch_and_u8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
%8 = and i32 %7, %5
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @volatile_fetch_and_u8(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = load volatile i32, i32* %0
%6 = and i32 %5, %4
store volatile i32 %6, i32* %0
ret void
}
unsigned char get_bit(unsigned char *bits, unsigned long i) {
  return (bits[i / 8] >> i % 8) & 1;
}


x86 assembly (clang, -O0):
<get_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x3,%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x10(%rbp),%rcx
and    $0x7,%rcx
sar    %cl,%eax
and    $0x1,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bit>:
mov    %rsi,%rcx
mov    %rsi,%rax
shr    $0x3,%rax
mov    (%rdi,%rax,1),%al
and    $0x7,%cl
shr    %cl,%al
and    $0x1,%al
ret

LLVM IR (-O0):
define zeroext i8 @get_bit(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = udiv i64 %6, 8
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = load i64, i64* %4
%12 = urem i64 %11, 8
%13 = trunc i64 %12 to i32
%14 = ashr i32 %10, %13
%15 = and i32 %14, 1
%16 = trunc i32 %15 to i8
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @get_bit(i8* nocapture %0, i64 %1) {
%3 = lshr i64 %1, 3
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = trunc i64 %1 to i8
%7 = and i8 %6, 7
%8 = lshr i8 %5, %7
%9 = and i8 %8, 1
ret i8 %9
}
/* Variables and functions */
int /*<<< orphan*/ write_byte(char const);
void print(const char *s) {
  while (*s != 0) {
    write_byte(*s);
    s++;
  }
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1149 <print+0x39>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <write_byte@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <print+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <print+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <write_byte@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <print+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i32 @write_byte(i8 signext %10)
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @print(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @write_byte(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void cleanup_progressbar() {
  printf("\r                                                     \r");
}


x86 assembly (clang, -O0):
<cleanup_progressbar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup_progressbar>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"\0D \0D\00"
define void @cleanup_progressbar() {
%1 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [56 x i8] c"\0D \0D\00"
define void @cleanup_progressbar() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret void
}
void tasks_short_foo1(void) {}


x86 assembly (clang, -O0):
<tasks_short_foo1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tasks_short_foo1>:
ret

LLVM IR (-O0):
define void @tasks_short_foo1() {
ret void
}

LLVM IR (-O2):
define void @tasks_short_foo1() {
ret void
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_insert_head(struct list *, struct list *);
int /*<<< orphan*/ list_remove(struct list *);
void list_make_first(struct list *list, struct list *entry) {
  list_remove(entry);
  list_insert_head(list, entry);
}


x86 assembly (clang, -O0):
<list_make_first>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <list_remove@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <list_insert_head@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_make_first>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <list_remove@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <list_insert_head@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_make_first(%struct.list* %0, %struct.list* %1) {
%3 = alloca %struct.list*
%4 = alloca %struct.list*
store %struct.list* %0, %struct.list** %3
store %struct.list* %1, %struct.list** %4
%5 = load %struct.list*, %struct.list** %4
%6 = call i32 @list_remove(%struct.list* %5)
%7 = load %struct.list*, %struct.list** %3
%8 = load %struct.list*, %struct.list** %4
%9 = call i32 @list_insert_head(%struct.list* %7, %struct.list* %8)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_make_first(%struct.list* %0, %struct.list* %1) {
%3 = tail call i32 @list_remove(%struct.list* %1)
%4 = tail call i32 @list_insert_head(%struct.list* %0, %struct.list* %1)
ret void
}
int test_imm_7Auint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x7A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Auint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x7a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Auint64_lowword_reg>:
test   $0x7a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Auint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 122
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_7Auint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 122
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void swap(int arr[], int index0, int index1) {
  int tmp;
  tmp = arr[index0];
  arr[index0] = arr[index1];
  arr[index1] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
void ft_add_test_case(char **data, char *dest, char *src) {
  data[0] = dest;
  data[1] = src;
}


x86 assembly (clang, -O0):
<ft_add_test_case>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_add_test_case>:
mov    %rsi,(%rdi)
mov    %rdx,0x8(%rdi)
ret

LLVM IR (-O0):
define void @ft_add_test_case(i8** %0, i8* %1, i8* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i8*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 0
store i8* %7, i8** %9
%10 = load i8*, i8** %6
%11 = load i8**, i8*** %4
%12 = getelementptr inbounds i8*, i8** %11, i64 1
store i8* %10, i8** %12
ret void
}

LLVM IR (-O2):
define void @ft_add_test_case(i8** nocapture writeonly %0, i8* %1, i8* %2) {
store i8* %1, i8** %0
%4 = getelementptr inbounds i8*, i8** %0, i64 1
store i8* %2, i8** %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ laserInit(int);
void coreInitLaser(void) { laserInit(19); }


x86 assembly (clang, -O0):
<coreInitLaser>:
push   %rbp
mov    %rsp,%rbp
mov    $0x13,%edi
call   1030 <laserInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<coreInitLaser>:
mov    $0x13,%edi
jmp    1030 <laserInit@plt>

LLVM IR (-O0):
define void @coreInitLaser() {
%1 = call i32 @laserInit(i32 19)
ret void
}

LLVM IR (-O2):
define void @coreInitLaser() {
%1 = tail call i32 @laserInit(i32 19)
ret void
}