char is_direction(short c, short *d) {
  switch (c) {
  case 'h':
    *d = 6;
    break;
  case 'j':
    *d = 4;
    break;
  case 'k':
    *d = 0;
    break;
  case 'l':
    *d = 2;
    break;
  case 'b':
    *d = 5;
    break;
  case 'y':
    *d = 7;
    break;
  case 'u':
    *d = 1;
    break;
  case 'n':
    *d = 3;
    break;
  case '\033':
    break;
  default:
    return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<is_direction>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movswl -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
sub    $0x1b,%eax
je     121c <is_direction+0x11c>
jmp    1124 <is_direction+0x24>
mov    -0x14(%rbp),%eax
sub    $0x62,%eax
je     11e4 <is_direction+0xe4>
jmp    1135 <is_direction+0x35>
mov    -0x14(%rbp),%eax
sub    $0x68,%eax
je     11ac <is_direction+0xac>
jmp    1146 <is_direction+0x46>
mov    -0x14(%rbp),%eax
sub    $0x6a,%eax
je     11ba <is_direction+0xba>
jmp    1157 <is_direction+0x57>
mov    -0x14(%rbp),%eax
sub    $0x6b,%eax
je     11c8 <is_direction+0xc8>
jmp    1168 <is_direction+0x68>
mov    -0x14(%rbp),%eax
sub    $0x6c,%eax
je     11d6 <is_direction+0xd6>
jmp    1179 <is_direction+0x79>
mov    -0x14(%rbp),%eax
sub    $0x6e,%eax
je     120e <is_direction+0x10e>
jmp    118a <is_direction+0x8a>
mov    -0x14(%rbp),%eax
sub    $0x75,%eax
je     1200 <is_direction+0x100>
jmp    119b <is_direction+0x9b>
mov    -0x14(%rbp),%eax
sub    $0x79,%eax
je     11f2 <is_direction+0xf2>
jmp    1221 <is_direction+0x121>
mov    -0x10(%rbp),%rax
movw   $0x6,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x4,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x0,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x2,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x5,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x7,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x1,(%rax)
jmp    122a <is_direction+0x12a>
mov    -0x10(%rbp),%rax
movw   $0x3,(%rax)
jmp    122a <is_direction+0x12a>
jmp    122a <is_direction+0x12a>
movb   $0x0,-0x1(%rbp)
jmp    122e <is_direction+0x12e>
movb   $0x1,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_direction>:
xor    %eax,%eax
lea    -0x62(%rdi),%edx
cmp    $0x17,%edx
ja     1124 <is_direction+0x24>
mov    $0x6,%cx
lea    0xeeb(%rip),%rdi
movslq (%rdi,%rdx,4),%rdx
add    %rdi,%rdx
jmp    *%rdx
mov    $0x5,%cx
jmp    114a <is_direction+0x4a>
cmp    $0x1b,%edi
je     114d <is_direction+0x4d>
ret
mov    $0x4,%cx
jmp    114a <is_direction+0x4a>
xor    %ecx,%ecx
jmp    114a <is_direction+0x4a>
mov    $0x2,%cx
jmp    114a <is_direction+0x4a>
mov    $0x3,%cx
jmp    114a <is_direction+0x4a>
mov    $0x1,%cx
jmp    114a <is_direction+0x4a>
mov    $0x7,%cx
mov    %cx,(%rsi)
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @is_direction(i16 signext %0, i16* %1) {
%3 = alloca i8
%4 = alloca i16
%5 = alloca i16*
store i16 %0, i16* %4
store i16* %1, i16** %5
%6 = load i16, i16* %4
%7 = sext i16 %6 to i32
switch i32 %7, label %25 [
i32 104, label %8
i32 106, label %10
i32 107, label %12
i32 108, label %14
i32 98, label %16
i32 121, label %18
i32 117, label %20
i32 110, label %22
i32 27, label %24
]
8: ; preds = %2
%9 = load i16*, i16** %5
store i16 6, i16* %9
br label %26
10: ; preds = %2
%11 = load i16*, i16** %5
store i16 4, i16* %11
br label %26
12: ; preds = %2
%13 = load i16*, i16** %5
store i16 0, i16* %13
br label %26
14: ; preds = %2
%15 = load i16*, i16** %5
store i16 2, i16* %15
br label %26
16: ; preds = %2
%17 = load i16*, i16** %5
store i16 5, i16* %17
br label %26
18: ; preds = %2
%19 = load i16*, i16** %5
store i16 7, i16* %19
br label %26
20: ; preds = %2
%21 = load i16*, i16** %5
store i16 1, i16* %21
br label %26
22: ; preds = %2
%23 = load i16*, i16** %5
store i16 3, i16* %23
br label %26
24: ; preds = %2
br label %26
25: ; preds = %2
store i8 0, i8* %3
br label %27
26: ; preds = %24, %22, %20, %18, %16, %14, %12, %10, %8
store i8 1, i8* %3
br label %27
27: ; preds = %26, %25
%28 = load i8, i8* %3
ret i8 %28
}

LLVM IR (-O2):
define signext i8 @is_direction(i16 signext %0, i16* nocapture writeonly %1) {
%3 = sext i16 %0 to i32
switch i32 %3, label %14 [
i32 104, label %11
i32 106, label %4
i32 107, label %5
i32 108, label %6
i32 98, label %7
i32 121, label %8
i32 117, label %9
i32 110, label %10
i32 27, label %13
]
4: ; preds = %2
br label %11
5: ; preds = %2
br label %11
6: ; preds = %2
br label %11
7: ; preds = %2
br label %11
8: ; preds = %2
br label %11
9: ; preds = %2
br label %11
10: ; preds = %2
br label %11
11: ; preds = %2, %4, %5, %6, %7, %8, %9, %10
%12 = phi i16 [ 3, %10 ], [ 1, %9 ], [ 7, %8 ], [ 5, %7 ], [ 2, %6 ], [ 0, %5 ], [ 4, %4 ], [ 6, %2 ]
store i16 %12, i16* %1
br label %13
13: ; preds = %11, %2
br label %14
14: ; preds = %2, %13
%15 = phi i8 [ 1, %13 ], [ 0, %2 ]
ret i8 %15
}