xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void *malloc(unsigned int);
int /*<<< orphan*/ printf(char *, unsigned int);
void *mallocX(unsigned int nbytes) {
  void *ptr;
  ptr = malloc(nbytes);
  if (ptr == NULL) {
    printf("Socorro! malloc devolveu NULL! (%d)\n", nbytes);
    exit(EXIT_FAILURE);
  }
  return ptr;
}


x86 assembly (clang, -O0):
<mallocX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116f <mallocX+0x3f>
mov    -0x4(%rbp),%esi
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocX>:
push   %rbx
mov    %edi,%ebx
call   1040 <malloc@plt>
test   %rax,%rax
je     113f <mallocX+0xf>
pop    %rbx
ret
lea    0xeba(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Socorro! malloc devolveu NULL! (%d)\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @mallocX(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [37 x i8] c"Socorro! malloc devolveu NULL! (%d)\0A\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @mallocX(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %0)
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int _assert_int_mismatch(char *func, int expected, int found) {
  printf("F");
  return 1;
}


x86 assembly (clang, -O0):
<_assert_int_mismatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_int_mismatch>:
push   %rax
mov    $0x46,%edi
call   1030 <putchar@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"F\00"
define i32 @_assert_int_mismatch(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
define i32 @_assert_int_mismatch(i8* nocapture readnone %0, i32 %1, i32 %2) {
%4 = tail call i32 @putchar(i32 70)
ret i32 1
}
void TimerSyncConfigure(unsigned long ulBase, unsigned long ulConfigure) {

  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) &= ~0x00000080;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= ulConfigure;
}


x86 assembly (clang, -O0):
<TimerSyncConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
and    $0xffffffffffffff7f,%rcx
mov    %rcx,0x8(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerSyncConfigure>:
andq   $0xffffffffffffff7f,0x8(%rdi)
ff
or     %rsi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @TimerSyncConfigure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 8
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -129
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 8
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @TimerSyncConfigure(i64 %0, i64 %1) {
%3 = add i64 %0, 8
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -129
store volatile i64 %6, i64* %4
%7 = load volatile i64, i64* %4
%8 = or i64 %7, %1
store volatile i64 %8, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void generate_macro_exp_matrix() {
  char *s =
      "void* exp_matrix(char const* param_type, int** mat_1,  int mat_1_rows, "
      "int mat_1_cols, int exp) {			if(exp <= 0) {	"
      "			printf(\"errore: comportamento non definito per "
      "esponente = 0\n\");				exit(1);	"
      "		}			void** mat = mat_1;		"
      "	int i;			for(i = 1; i < exp; i++ ) {		"
      "		mat = mul_matrix(param_type, mat, mat, mat_1_rows, mat_1_cols, "
      "mat_1_rows, mat_1_cols);					}	"
      "		return mat;		}\n";
  printf("%s", s);
}


x86 assembly (clang, -O0):
<generate_macro_exp_matrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0x1049(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_macro_exp_matrix>:
lea    0x1060(%rip),%rdi
lea    0xee2(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [375 x i8] c"void* exp_matrix(char const* param_type, int** mat_1, int mat_1_rows, int mat_1_cols, int exp) {\09\09\09if(exp <= 0) {\09\09\09\09printf(\22errore: comportamento non definito per esponente = 0\0A\22);\09\09\09\09exit(1);\09\09\09}\09\09\09void** mat = mat_1;\09\09\09int i;\09\09\09for(i = 1; i < exp; i++ ) {\09\09\09\09mat = mul_matrix(param_type, mat, mat, mat_1_rows, mat_1_cols, mat_1_rows, mat_1_cols);\09\09\09\09\09}\09\09\09return mat;\09\09}\0A\00"
@.str.1 = [3 x i8] c"%s\00"
define void @generate_macro_exp_matrix() {
%1 = alloca i8*
store i8* getelementptr inbounds ([375 x i8], [375 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [375 x i8] c"void* exp_matrix(char const* param_type, int** mat_1, int mat_1_rows, int mat_1_cols, int exp) {\09\09\09if(exp <= 0) {\09\09\09\09printf(\22errore: comportamento non definito per esponente = 0\0A\22);\09\09\09\09exit(1);\09\09\09}\09\09\09void** mat = mat_1;\09\09\09int i;\09\09\09for(i = 1; i < exp; i++ ) {\09\09\09\09mat = mul_matrix(param_type, mat, mat, mat_1_rows, mat_1_cols, mat_1_rows, mat_1_cols);\09\09\09\09\09}\09\09\09return mat;\09\09}\0A\00"
@.str.1 = [3 x i8] c"%s\00"
define void @generate_macro_exp_matrix() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([375 x i8], [375 x i8]* @.str, i64 0, i64 0))
ret void
}
int dbg_is_chk_fs(const struct ubifs_info *c) { return 0; }


x86 assembly (clang, -O0):
<dbg_is_chk_fs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_is_chk_fs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ubifs_info = type opaque
define i32 @dbg_is_chk_fs(%struct.ubifs_info* %0) {
%2 = alloca %struct.ubifs_info*
store %struct.ubifs_info* %0, %struct.ubifs_info** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ubifs_info = type opaque
define i32 @dbg_is_chk_fs(%struct.ubifs_info* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int mask_get(uint32_t *mask, int num) {
  return (mask[num / 32] >> (num % 32)) & 1;
}


x86 assembly (clang, -O0):
<mask_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
mov    %edx,%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mask_get>:
mov    %esi,%ecx
lea    0x1f(%rcx),%eax
test   %esi,%esi
cmovns %esi,%eax
sar    $0x5,%eax
cltq
mov    (%rdi,%rax,4),%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mask_get(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sdiv i32 %6, 32
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32, i32* %9
%11 = load i32, i32* %4
%12 = srem i32 %11, 32
%13 = ashr i32 %10, %12
%14 = and i32 %13, 1
ret i32 %14
}

LLVM IR (-O2):
define i32 @mask_get(i32* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 32
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = and i32 %1, 31
%8 = lshr i32 %6, %7
%9 = and i32 %8, 1
ret i32 %9
}
/* Variables and functions */
int aes_set_hw(int);
int AES_CBC_set_hw(int hw) { return aes_set_hw(hw); }


x86 assembly (clang, -O0):
<AES_CBC_set_hw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <aes_set_hw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AES_CBC_set_hw>:
jmp    1030 <aes_set_hw@plt>

LLVM IR (-O0):
define i32 @AES_CBC_set_hw(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @aes_set_hw(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @AES_CBC_set_hw(i32 %0) {
%2 = tail call i32 @aes_set_hw(i32 %0)
ret i32 %2
}
void gtk_box_set_homogeneous() {}


x86 assembly (clang, -O0):
<gtk_box_set_homogeneous>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_box_set_homogeneous>:
ret

LLVM IR (-O0):
define void @gtk_box_set_homogeneous() {
ret void
}

LLVM IR (-O2):
define void @gtk_box_set_homogeneous() {
ret void
}
void int2BuffBigEndian(int val, char *buf) {
  char *littleEn = (char *)&val;
  buf[0] = littleEn[3];
  buf[1] = littleEn[2];
  buf[2] = littleEn[1];
  buf[3] = littleEn[0];
}


x86 assembly (clang, -O0):
<int2BuffBigEndian>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x18(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<int2BuffBigEndian>:
bswap  %edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @int2BuffBigEndian(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = bitcast i32* %3 to i8*
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = getelementptr inbounds i8, i8* %7, i64 3
%9 = load i8, i8* %8
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 %9, i8* %11
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i64 2
%14 = load i8, i8* %13
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i64 1
store i8 %14, i8* %16
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i64 1
%19 = load i8, i8* %18
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i64 2
store i8 %19, i8* %21
%22 = load i8*, i8** %5
%23 = getelementptr inbounds i8, i8* %22, i64 0
%24 = load i8, i8* %23
%25 = load i8*, i8** %4
%26 = getelementptr inbounds i8, i8* %25, i64 3
store i8 %24, i8* %26
ret void
}

LLVM IR (-O2):
define void @int2BuffBigEndian(i32 %0, i8* nocapture writeonly %1) {
%3 = trunc i32 %0 to i8
%4 = lshr i32 %0, 8
%5 = trunc i32 %4 to i8
%6 = lshr i32 %0, 16
%7 = trunc i32 %6 to i8
%8 = lshr i32 %0, 24
%9 = trunc i32 %8 to i8
store i8 %9, i8* %1
%10 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %7, i8* %10
%11 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %5, i8* %11
%12 = getelementptr inbounds i8, i8* %1, i64 3
store i8 %3, i8* %12
ret void
}
int test_imm_17uint16_reg(unsigned short val) {
  return ((val) & (-0x17 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_17uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffffe9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_17uint16_reg>:
test   $0xffe9,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_17uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -23
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_17uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -23
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ add_ptr(void *);
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *malloc(size_t);
void *_memory_alloc(size_t size) {
  void *ptr = malloc(size);
  assert(ptr != NULL);
  add_ptr(ptr);
  return ptr;
}


x86 assembly (clang, -O0):
<_memory_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1050 <add_ptr@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_memory_alloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rdi
call   1050 <add_ptr@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @_memory_alloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i8*, i8** %3
%11 = call i32 @add_ptr(i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @_memory_alloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp ne i8* %2, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @add_ptr(i8* %2)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void mov_reg32_preg32x4preg32(int reg1, int reg2, int reg3) {
  put8(0x8B);
  put8((reg1 << 3) | 4);
  put8(0x80 | (reg2 << 3) | reg3);
}


x86 assembly (clang, -O0):
<mov_reg32_preg32x4preg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0x4,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
shl    $0x3,%edi
or     $0x80,%edi
or     -0xc(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg32_preg32x4preg32>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0x8b,%edi
call   1030 <put8@plt>
lea    0x4(,%rbx,8),%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     %r14d,%ebp
or     $0x80,%ebp
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_reg32_preg32x4preg32(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @put8(i32 139)
%8 = load i32, i32* %4
%9 = shl i32 %8, 3
%10 = or i32 %9, 4
%11 = call i32 @put8(i32 %10)
%12 = load i32, i32* %5
%13 = shl i32 %12, 3
%14 = or i32 128, %13
%15 = load i32, i32* %6
%16 = or i32 %14, %15
%17 = call i32 @put8(i32 %16)
ret void
}

LLVM IR (-O2):
define void @mov_reg32_preg32x4preg32(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @put8(i32 139)
%5 = shl i32 %0, 3
%6 = or i32 %5, 4
%7 = tail call i32 @put8(i32 %6)
%8 = shl i32 %1, 3
%9 = or i32 %8, %2
%10 = or i32 %9, 128
%11 = tail call i32 @put8(i32 %10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x2a() {
  Assert_real((isodigit(42) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              215, ("isodigit should be 0 for *"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x2a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xd7,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x2a>:
push   %rax
mov    $0x2a,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0xd7,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for *\00"
define void @t_isodigit_0x2a() {
%1 = call i64 @isodigit(i32 42)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 215, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for *\00"
define void @t_isodigit_0x2a() {
%1 = tail call i64 @isodigit(i32 42)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 215, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
struct sockaddr_in *cast_addr(struct sockaddr *addr) {
  return (struct sockaddr_in *)addr;
}


x86 assembly (clang, -O0):
<cast_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_addr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.sockaddr_in = type opaque
%struct.sockaddr = type opaque
define %struct.sockaddr_in* @cast_addr(%struct.sockaddr* %0) {
%2 = alloca %struct.sockaddr*
store %struct.sockaddr* %0, %struct.sockaddr** %2
%3 = load %struct.sockaddr*, %struct.sockaddr** %2
%4 = bitcast %struct.sockaddr* %3 to %struct.sockaddr_in*
ret %struct.sockaddr_in* %4
}

LLVM IR (-O2):
%struct.sockaddr_in = type opaque
%struct.sockaddr = type opaque
define %struct.sockaddr_in* @cast_addr(%struct.sockaddr* readnone %0) {
%2 = bitcast %struct.sockaddr* %0 to %struct.sockaddr_in*
ret %struct.sockaddr_in* %2
}
void udev_selinux_lsetfilecon(struct udev *udev, const char *file,
                              unsigned int mode) {}


x86 assembly (clang, -O0):
<udev_selinux_lsetfilecon>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<udev_selinux_lsetfilecon>:
ret

LLVM IR (-O0):
%struct.udev = type opaque
define void @udev_selinux_lsetfilecon(%struct.udev* %0, i8* %1, i32 %2) {
%4 = alloca %struct.udev*
%5 = alloca i8*
%6 = alloca i32
store %struct.udev* %0, %struct.udev** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.udev = type opaque
define void @udev_selinux_lsetfilecon(%struct.udev* nocapture %0, i8* nocapture %1, i32 %2) {
ret void
}
void fc65(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    goto a;
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
a:;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc65>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc65>:
ret

LLVM IR (-O0):
define void @fc65(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %20
7: ; No predecessors!
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = load i32, i32* %2
%11 = zext i32 %10 to i64
%12 = load i32, i32* %2
%13 = zext i32 %12 to i64
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
%16 = load i32, i32* %2
%17 = zext i32 %16 to i64
%18 = load i32, i32* %2
%19 = zext i32 %18 to i64
br label %20
20: ; preds = %7, %1
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc65(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ write(int, char *, int);
void oom(void) {
  write(2, "out of memory.\n", 15);
  exit(1);
}


x86 assembly (clang, -O0):
<oom>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
lea    0xed0(%rip),%rsi
mov    $0xf,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<oom>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x2,%edi
mov    $0xf,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"out of memory.\0A\00"
define void @oom() {
%1 = call i32 @write(i32 2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 15)
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [16 x i8] c"out of memory.\0A\00"
define void @oom() {
%1 = tail call i32 @write(i32 2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 15)
%2 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
scalar_t__ encode_Nucleotide(char);
void fill_int(unsigned long long int *nucl_seq, char n1) {
  *nucl_seq <<= 2;
  *nucl_seq += encode_Nucleotide(n1);
}


x86 assembly (clang, -O0):
<fill_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
shl    $0x2,%rcx
mov    %rcx,(%rax)
movsbl -0x9(%rbp),%edi
call   1030 <encode_Nucleotide@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_int>:
push   %rbx
mov    %rdi,%rbx
shlq   $0x2,(%rdi)
mov    %esi,%edi
call   1030 <encode_Nucleotide@plt>
add    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @fill_int(i64* %0, i8 signext %1) {
%3 = alloca i64*
%4 = alloca i8
store i64* %0, i64** %3
store i8 %1, i8* %4
%5 = load i64*, i64** %3
%6 = load i64, i64* %5
%7 = shl i64 %6, 2
store i64 %7, i64* %5
%8 = load i8, i8* %4
%9 = call i64 @encode_Nucleotide(i8 signext %8)
%10 = load i64*, i64** %3
%11 = load i64, i64* %10
%12 = add i64 %11, %9
store i64 %12, i64* %10
ret void
}

LLVM IR (-O2):
define void @fill_int(i64* nocapture %0, i8 signext %1) {
%3 = load i64, i64* %0
%4 = shl i64 %3, 2
store i64 %4, i64* %0
%5 = tail call i64 @encode_Nucleotide(i8 signext %1)
%6 = load i64, i64* %0
%7 = add i64 %6, %5
store i64 %7, i64* %0
ret void
}
unsigned int _le4(unsigned int i) {
  static short d = 0x1122;
  return *((char *)&d) == 0x22
             ? i
             : (i << 24 & 0xff000000) | (i << 8 & 0x00ff0000) |
                   (i >> 8 & 0x0000ff00) | (i >> 24 & 0x000000ff);
}


x86 assembly (clang, -O0):
<_le4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsbl 0x2f12(%rip),%eax
cmp    $0x22,%eax
jne    1122 <_le4+0x22>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    115a <_le4+0x5a>
mov    -0x4(%rbp),%eax
shl    $0x18,%eax
and    $0xff000000,%eax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
and    $0xff0000,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shr    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shr    $0x18,%ecx
and    $0xff,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_le4>:
mov    %edi,%eax
ret

LLVM IR (-O0):
@_le4.d = internal global i16 4386
define i32 @_le4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i8, i8* bitcast (i16* @_le4.d to i8*)
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 34
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %2
br label %24
8: ; preds = %1
%9 = load i32, i32* %2
%10 = shl i32 %9, 24
%11 = and i32 %10, -16777216
%12 = load i32, i32* %2
%13 = shl i32 %12, 8
%14 = and i32 %13, 16711680
%15 = or i32 %11, %14
%16 = load i32, i32* %2
%17 = lshr i32 %16, 8
%18 = and i32 %17, 65280
%19 = or i32 %15, %18
%20 = load i32, i32* %2
%21 = lshr i32 %20, 24
%22 = and i32 %21, 255
%23 = or i32 %19, %22
br label %24
24: ; preds = %8, %6
%25 = phi i32 [ %7, %6 ], [ %23, %8 ]
ret i32 %25
}

LLVM IR (-O2):
define i32 @_le4(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int ms2deg(int, float);
double hms2d(int h, int m, float s) { return 15.0 * (h + ms2deg(m, s)); }


x86 assembly (clang, -O0):
<hms2d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
movss  -0xc(%rbp),%xmm0
call   1030 <ms2deg@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
cvtsi2sd %eax,%xmm1
movsd  0xeb7(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hms2d>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
call   1030 <ms2deg@plt>
add    %ebx,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mulsd  0xed5(%rip),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @hms2d(i32 %0, i32 %1, float %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca float
store i32 %0, i32* %4
store i32 %1, i32* %5
store float %2, float* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load float, float* %6
%10 = call i32 @ms2deg(i32 %8, float %9)
%11 = add nsw i32 %7, %10
%12 = sitofp i32 %11 to double
%13 = fmul double 1.500000e+01, %12
ret double %13
}

LLVM IR (-O2):
define double @hms2d(i32 %0, i32 %1, float %2) {
%4 = tail call i32 @ms2deg(i32 %1, float %2)
%5 = add nsw i32 %4, %0
%6 = sitofp i32 %5 to double
%7 = fmul double %6, 1.500000e+01
ret double %7
}
long int hashString(char *str) {
  unsigned long hash = 5381;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<hashString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <hashString+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hashString+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashString>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <hashString+0x2d>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hashString+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @hashString(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @hashString(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
int st_numcmp(const char *x, const char *y) { return ((x) != (y)); }


x86 assembly (clang, -O0):
<st_numcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_numcmp>:
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i32 @st_numcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ne i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @st_numcmp(i8* readnone %0, i8* readnone %1) {
%3 = icmp ne i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void impl() {
  asm volatile("popq %%rax\n\t"
               "movq %%rax, (%%rsp)\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<impl>:
push   %rbp
mov    %rsp,%rbp
pop    %rax
mov    %rax,(%rsp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<impl>:
pop    %rax
mov    %rax,(%rsp)
ret

LLVM IR (-O0):
define void @impl() {
ret void
}

LLVM IR (-O2):
define void @impl() {
tail call void asm sideeffect "popq %rax\0A\09movq %rax, (%rsp)\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void g2_free(void *p) {
  if (p != NULL)
    free(p);
}


x86 assembly (clang, -O0):
<g2_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <g2_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_free>:
test   %rdi,%rdi
je     111a <g2_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @g2_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @g2_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
void *__ioremap(unsigned long, unsigned long, int /*<<< orphan*/);
void *ioremap_fullcache(unsigned long physaddr, unsigned long size) {
  return __ioremap(physaddr, size, 0);
}


x86 assembly (clang, -O0):
<ioremap_fullcache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <__ioremap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioremap_fullcache>:
xor    %edx,%edx
jmp    1030 <__ioremap@plt>

LLVM IR (-O0):
define i8* @ioremap_fullcache(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @__ioremap(i64 %5, i64 %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @ioremap_fullcache(i64 %0, i64 %1) {
%3 = tail call i8* @__ioremap(i64 %0, i64 %1, i32 0)
ret i8* %3
}
void destroy_tensor(void ***tensor) {
  if (tensor) {
    if (tensor[0]) {
      free(tensor[0][0]);
    }
    free(tensor[0]);
  }
  free(tensor);
}


x86 assembly (clang, -O0):
<destroy_tensor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1150 <destroy_tensor+0x40>
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1144 <destroy_tensor+0x34>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_tensor>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     1131 <destroy_tensor+0x21>
mov    (%rbx),%rdi
test   %rdi,%rdi
je     112c <destroy_tensor+0x1c>
mov    (%rdi),%rdi
call   1030 <free@plt>
mov    (%rbx),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @destroy_tensor(i8*** %0) {
%2 = alloca i8***
store i8*** %0, i8**** %2
%3 = load i8***, i8**** %2
%4 = icmp ne i8*** %3, null
br i1 %4, label %5, label %21
5: ; preds = %1
%6 = load i8***, i8**** %2
%7 = getelementptr inbounds i8**, i8*** %6, i64 0
%8 = load i8**, i8*** %7
%9 = icmp ne i8** %8, null
br i1 %9, label %10, label %16
10: ; preds = %5
%11 = load i8***, i8**** %2
%12 = getelementptr inbounds i8**, i8*** %11, i64 0
%13 = load i8**, i8*** %12
%14 = getelementptr inbounds i8*, i8** %13, i64 0
%15 = load i8*, i8** %14
br label %16
16: ; preds = %10, %5
%17 = load i8***, i8**** %2
%18 = getelementptr inbounds i8**, i8*** %17, i64 0
%19 = load i8**, i8*** %18
%20 = bitcast i8** %19 to i8*
br label %21
21: ; preds = %16, %1
%22 = load i8***, i8**** %2
%23 = bitcast i8*** %22 to i8*
ret void
}

LLVM IR (-O2):
define void @destroy_tensor(i8*** %0) {
%2 = icmp eq i8*** %0, null
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = load i8**, i8*** %0
%5 = icmp eq i8** %4, null
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = bitcast i8** %4 to i8*
br label %12
8: ; preds = %3
%9 = load i8*, i8** %4
tail call void @free(i8* %9)
%10 = bitcast i8*** %0 to i8**
%11 = load i8*, i8** %10
br label %12
12: ; preds = %6, %8
%13 = phi i8* [ %11, %8 ], [ %7, %6 ]
tail call void @free(i8* %13)
br label %14
14: ; preds = %12, %1
%15 = bitcast i8*** %0 to i8*
tail call void @free(i8* %15)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, unsigned long long);
int main() {
  unsigned long long int a, b, c;
  int i;
  a = 2;
  b = 1;
  c = 1;
  for (i = 1; i <= 100; i++) {
    printf("№%d : %llu \n", i, c);
    c = a + b;
    a = b;
    b = c;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x2,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
movq   $0x1,-0x20(%rbp)
movl   $0x1,-0x24(%rbp)
cmpl   $0x64,-0x24(%rbp)
jg     1185 <main+0x75>
mov    -0x24(%rbp),%esi
mov    -0x20(%rbp),%rdx
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    113e <main+0x2e>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    $0x2,%ebx
mov    $0x1,%eax
mov    $0x1,%ebp
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    %rax,%r15
mov    %r14,%rdi
mov    %ebp,%esi
mov    %rax,%rdx
call   1030 <printf@plt>
add    %r15,%rbx
add    $0x1,%ebp
mov    %rbx,%rax
mov    %r15,%rbx
cmp    $0x65,%ebp
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [15 x i8] c"\E2\84\96%d : %llu \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store i32 0, i32* %1
store i64 2, i64* %2
store i64 1, i64* %3
store i64 1, i64* %4
store i32 1, i32* %5
br label %6
6: ; preds = %18, %0
%7 = load i32, i32* %5
%8 = icmp sle i32 %7, 100
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %5
%11 = load i64, i64* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %10, i64 %11)
%13 = load i64, i64* %2
%14 = load i64, i64* %3
%15 = add i64 %13, %14
store i64 %15, i64* %4
%16 = load i64, i64* %3
store i64 %16, i64* %2
%17 = load i64, i64* %4
store i64 %17, i64* %3
br label %18
18: ; preds = %9
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"\E2\84\96%d : %llu \0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 1, %0 ], [ %7, %1 ]
%3 = phi i64 [ 1, %0 ], [ %6, %1 ]
%4 = phi i64 [ 2, %0 ], [ %3, %1 ]
%5 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %2, i64 %3)
%6 = add i64 %3, %4
%7 = add nuw nsw i32 %2, 1
%8 = icmp eq i32 %7, 101
br i1 %8, label %9, label %1
9: ; preds = %1
ret i32 0
}
int test_imm_85int32_mem(int *val) {
  return ((*val) & (0x85 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_85int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x85,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_85int32_mem>:
testb  $0x85,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_85int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 133
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_85int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 133
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int strcmp(const char *s1, const char *s2) {
  int result;
  while (1) {
    result = *s1 - *s2++;
    if ((result != 0) || (*s1++ == 0)) {
      break;
    }
  }
  return result;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    114f <strcmp+0x4f>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1154 <strcmp+0x54>
jmp    1159 <strcmp+0x59>
jmp    110c <strcmp+0xc>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi,%rcx,1),%edx
movsbl (%rsi,%rcx,1),%r8d
mov    %edx,%eax
sub    %r8d,%eax
jne    1128 <strcmp+0x28>
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcmp+0x10>
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %2, %24
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %9, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = icmp ne i32 %15, 0
br i1 %16, label %23, label %17
17: ; preds = %6
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
%20 = load i8, i8* %18
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %17, %6
br label %25
24: ; preds = %17
br label %6
25: ; preds = %23
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %12, %3 ]
%5 = phi i8* [ %0, %2 ], [ %13, %3 ]
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %7, %9
%11 = icmp ne i32 %10, 0
%12 = getelementptr inbounds i8, i8* %4, i64 1
%13 = getelementptr inbounds i8, i8* %5, i64 1
%14 = icmp eq i8 %6, 0
%15 = select i1 %11, i1 true, i1 %14
br i1 %15, label %16, label %3
16: ; preds = %3
ret i32 %10
}
/* Type definitions */
struct rtattr {
  int dummy;
};
struct nlmsghdr {
  int dummy;
};

/* Variables and functions */
struct rtattr *_rtattr_begin(struct nlmsghdr *, size_t, unsigned short,
                             int /*<<< orphan*/, int /*<<< orphan*/);
struct rtattr *rtattr_begin(struct nlmsghdr *nh, size_t req_sz,
                            unsigned short rta_type) {
  return _rtattr_begin(nh, req_sz, rta_type, 0, 0);
}


x86 assembly (clang, -O0):
<rtattr_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %r8d,%r8d
movzwl -0x12(%rbp),%edx
mov    %r8d,%ecx
call   1030 <_rtattr_begin@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtattr_begin>:
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <_rtattr_begin@plt>

LLVM IR (-O0):
%struct.rtattr = type { i32 }
%struct.nlmsghdr = type { i32 }
define %struct.rtattr* @rtattr_begin(%struct.nlmsghdr* %0, i64 %1, i16 zeroext %2) {
%4 = alloca %struct.nlmsghdr*
%5 = alloca i64
%6 = alloca i16
store %struct.nlmsghdr* %0, %struct.nlmsghdr** %4
store i64 %1, i64* %5
store i16 %2, i16* %6
%7 = load %struct.nlmsghdr*, %struct.nlmsghdr** %4
%8 = load i64, i64* %5
%9 = load i16, i16* %6
%10 = call %struct.rtattr* @_rtattr_begin(%struct.nlmsghdr* %7, i64 %8, i16 zeroext %9, i32 0, i32 0)
ret %struct.rtattr* %10
}

LLVM IR (-O2):
%struct.rtattr = type { i32 }
%struct.nlmsghdr = type { i32 }
define %struct.rtattr* @rtattr_begin(%struct.nlmsghdr* %0, i64 %1, i16 zeroext %2) {
%4 = tail call %struct.rtattr* @_rtattr_begin(%struct.nlmsghdr* %0, i64 %1, i16 zeroext %2, i32 0, i32 0)
ret %struct.rtattr* %4
}
void Loop_Delay(const unsigned int DELAY) {
  unsigned int x, y;
  for (x = 0; x <= DELAY; x++) {
    for (y = 0; y <= 120; y++)
      ;
  }
}


x86 assembly (clang, -O0):
<Loop_Delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
ja     1151 <Loop_Delay+0x51>
movl   $0x0,-0xc(%rbp)
cmpl   $0x78,-0xc(%rbp)
ja     113e <Loop_Delay+0x3e>
jmp    1130 <Loop_Delay+0x30>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <Loop_Delay+0x21>
jmp    1143 <Loop_Delay+0x43>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <Loop_Delay+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Loop_Delay>:
ret

LLVM IR (-O0):
define void @Loop_Delay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp ule i32 %6, %7
br i1 %8, label %9, label %21
9: ; preds = %5
store i32 0, i32* %4
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %4
%12 = icmp ule i32 %11, 120
br i1 %12, label %13, label %17
13: ; preds = %10
br label %14
14: ; preds = %13
%15 = load i32, i32* %4
%16 = add i32 %15, 1
store i32 %16, i32* %4
br label %10
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load i32, i32* %3
%20 = add i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @Loop_Delay(i32 %0) {
ret void
}
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int l2tp_session_profile_delete_1_svc(char *, void *, struct svc_req *);
int _l2tp_session_profile_delete_1(char **argp, void *result,
                                   struct svc_req *rqstp) {
  return (l2tp_session_profile_delete_1_svc(*argp, result, rqstp));
}


x86 assembly (clang, -O0):
<_l2tp_session_profile_delete_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <l2tp_session_profile_delete_1_svc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_l2tp_session_profile_delete_1>:
mov    (%rdi),%rdi
jmp    1030 <l2tp_session_profile_delete_1_svc@plt>

LLVM IR (-O0):
%struct.svc_req = type { i32 }
define i32 @_l2tp_session_profile_delete_1(i8** %0, i8* %1, %struct.svc_req* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca %struct.svc_req*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store %struct.svc_req* %2, %struct.svc_req** %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = load i8*, i8** %5
%10 = load %struct.svc_req*, %struct.svc_req** %6
%11 = call i32 @l2tp_session_profile_delete_1_svc(i8* %8, i8* %9, %struct.svc_req* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
define i32 @_l2tp_session_profile_delete_1(i8** nocapture %0, i8* %1, %struct.svc_req* %2) {
%4 = load i8*, i8** %0
%5 = tail call i32 @l2tp_session_profile_delete_1_svc(i8* %4, i8* %1, %struct.svc_req* %2)
ret i32 %5
}
/* Variables and functions */
void *BT_GetThreadTag(void) { return NULL; }


x86 assembly (clang, -O0):
<BT_GetThreadTag>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BT_GetThreadTag>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @BT_GetThreadTag() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @BT_GetThreadTag() {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ readmem65816(int /*<<< orphan*/);
int /*<<< orphan*/ sbc8(int /*<<< orphan*/);
int /*<<< orphan*/ zeropagex();
void sbcZpx8(void) { sbc8(readmem65816(zeropagex())); }


x86 assembly (clang, -O0):
<sbcZpx8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <zeropagex@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
call   1030 <sbc8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sbcZpx8>:
push   %rax
xor    %eax,%eax
call   1040 <zeropagex@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <sbc8@plt>

LLVM IR (-O0):
define void @sbcZpx8() {
%1 = call i32 (...) @zeropagex()
%2 = call i32 @readmem65816(i32 %1)
%3 = call i32 @sbc8(i32 %2)
ret void
}

LLVM IR (-O2):
define void @sbcZpx8() {
%1 = tail call i32 (...) @zeropagex()
%2 = tail call i32 @readmem65816(i32 %1)
%3 = tail call i32 @sbc8(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _cxx__Unwind_DeleteException(void *);
void _Unwind_DeleteException(void *exc) { _cxx__Unwind_DeleteException(exc); }


x86 assembly (clang, -O0):
<_Unwind_DeleteException>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_cxx__Unwind_DeleteException@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Unwind_DeleteException>:
jmp    1030 <_cxx__Unwind_DeleteException@plt>

LLVM IR (-O0):
define void @_Unwind_DeleteException(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_cxx__Unwind_DeleteException(i8* %3)
ret void
}

LLVM IR (-O2):
define void @_Unwind_DeleteException(i8* %0) {
%2 = tail call i32 @_cxx__Unwind_DeleteException(i8* %0)
ret void
}