xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ int64_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
scalar_t__ INT16_MAX;
scalar_t__ INT16_MIN;
int QCBOR_Int64ToInt16(int64_t src, int16_t *dest) {
  if (src > INT16_MAX || src < INT16_MIN) {
    return -1;
  } else {
    *dest = (int16_t)src;
  }
  return 0;
}


x86 assembly (clang, -O0):
<QCBOR_Int64ToInt16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ec9(%rip),%rcx
cmp    (%rcx),%rax
jg     1134 <QCBOR_Int64ToInt16+0x34>
mov    -0x10(%rbp),%rax
mov    0x2ead(%rip),%rcx
cmp    (%rcx),%rax
jge    1140 <QCBOR_Int64ToInt16+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    1152 <QCBOR_Int64ToInt16+0x52>
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QCBOR_Int64ToInt16>:
mov    0x2ed9(%rip),%rcx
mov    $0xffffffff,%eax
cmp    %rdi,(%rcx)
jl     1122 <QCBOR_Int64ToInt16+0x22>
mov    0x2ec0(%rip),%rcx
cmp    %rdi,(%rcx)
jg     1122 <QCBOR_Int64ToInt16+0x22>
mov    %rdi,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
@INT16_MAX = global i64 0
@INT16_MIN = global i64 0
define i32 @QCBOR_Int64ToInt16(i64 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64*
store i64 %0, i64* %4
store i64* %1, i64** %5
%6 = load i64, i64* %4
%7 = load i64, i64* @INT16_MAX
%8 = icmp sgt i64 %6, %7
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load i64, i64* %4
%11 = load i64, i64* @INT16_MIN
%12 = icmp slt i64 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %9, %2
store i32 -1, i32* %3
br label %18
14: ; preds = %9
%15 = load i64, i64* %4
%16 = load i64*, i64** %5
store i64 %15, i64* %16
br label %17
17: ; preds = %14
store i32 0, i32* %3
br label %18
18: ; preds = %17, %13
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@INT16_MAX = global i64 0
@INT16_MIN = global i64 0
define i32 @QCBOR_Int64ToInt16(i64 %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* @INT16_MAX
%4 = icmp slt i64 %3, %0
%5 = load i64, i64* @INT16_MIN
%6 = icmp sgt i64 %5, %0
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %9, label %8
8: ; preds = %2
store i64 %0, i64* %1
br label %9
9: ; preds = %2, %8
%10 = phi i32 [ 0, %8 ], [ -1, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void CountUp(int start, int end) {
  printf("%d \n", start);
  if (start < end)
    CountUp(start + 1, end);
}


x86 assembly (clang, -O0):
<CountUp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1157 <CountUp+0x37>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    -0x8(%rbp),%esi
call   1040 <CountUp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CountUp>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%ebp
cmp    %edi,%esi
cmovle %edi,%ebx
add    $0x1,%ebx
lea    0xed9(%rip),%r14
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    $0x1,%ebp
cmp    %ebp,%ebx
jne    1130 <CountUp+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d \0A\00"
define void @CountUp(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
%13 = load i32, i32* %4
br label %14
14: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d \0A\00"
define void @CountUp(i32 %0, i32 %1) {
%3 = call i32 @llvm.smax.i32(i32 %1, i32 %0)
br label %4
4: ; preds = %4, %2
%5 = phi i32 [ %0, %2 ], [ %7, %4 ]
%6 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = add i32 %5, 1
%8 = icmp eq i32 %5, %3
br i1 %8, label %9, label %4
9: ; preds = %4
ret void
}
unsigned short UnsignedShortNoSwap(unsigned short l) { return l; }


x86 assembly (clang, -O0):
<UnsignedShortNoSwap>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnsignedShortNoSwap>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @UnsignedShortNoSwap(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
ret i16 %3
}

LLVM IR (-O2):
define zeroext i16 @UnsignedShortNoSwap(i16 returned zeroext %0) {
ret i16 %0
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
int tcgetattr(int, struct termios *);
struct termios gatt(int fid) {
  int ret;
  struct termios att;
  ret = tcgetattr(fid, &att);
  if (ret < 0) {
    fprintf(stderr, "tcgetattr failed for fid %d\n", fid);
    exit(1);
  }
  return att;
}


x86 assembly (clang, -O0):
<gatt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1040 <tcgetattr@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1176 <gatt+0x46>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
mov    -0xc(%rbp),%edx
lea    0xe99(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gatt>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0x8(%rsp),%rsi
call   1040 <tcgetattr@plt>
test   %eax,%eax
js     114f <gatt+0x1f>
mov    0x8(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
lea    0xea1(%rip),%rsi
mov    %ebx,%edx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.termios = type { i32 }
@stderr = global i32 0
@.str = [29 x i8] c"tcgetattr failed for fid %d\0A\00"
define i32 @gatt(i32 %0) {
%2 = alloca %struct.termios
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @tcgetattr(i32 %5, %struct.termios* %2)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %1
%10 = load i32, i32* @stderr
%11 = load i32, i32* %3
%12 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %1
%15 = getelementptr inbounds %struct.termios, %struct.termios* %2, i32 0, i32 0
%16 = load i32, i32* %15
ret i32 %16
}

LLVM IR (-O2):
%struct.termios = type { i32 }
@stderr = global i32 0
@.str = [29 x i8] c"tcgetattr failed for fid %d\0A\00"
define i32 @gatt(i32 %0) {
%2 = alloca %struct.termios
%3 = call i32 @tcgetattr(i32 %0, %struct.termios* %2)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %0)
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %1
%10 = getelementptr inbounds %struct.termios, %struct.termios* %2, i64 0, i32 0
%11 = load i32, i32* %10
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int print_uint32(int /*<<< orphan*/, char *);
int print_int32(int32_t n, char *p) {
  int sign;
  if ((sign = n < 0)) {
    *p++ = '-';
    n = -n;
  }
  return print_uint32(n, p) + sign;
}


x86 assembly (clang, -O0):
<print_int32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
setl   %al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x14(%rbp)
test   $0x1,%al
jne    113e <print_int32+0x2e>
jmp    1158 <print_int32+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x2d,(%rax)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <print_uint32@plt>
add    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int32>:
push   %rbx
mov    %edi,%ebx
test   %edi,%edi
js     111b <print_int32+0xb>
mov    %ebx,%edi
jmp    1126 <print_int32+0x16>
movb   $0x2d,(%rsi)
add    $0x1,%rsi
mov    %ebx,%edi
neg    %edi
shr    $0x1f,%ebx
call   1030 <print_uint32@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @print_int32(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %5
br i1 %7, label %9, label %14
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
store i8 45, i8* %10
%12 = load i32, i32* %3
%13 = sub nsw i32 0, %12
store i32 %13, i32* %3
br label %14
14: ; preds = %9, %2
%15 = load i32, i32* %3
%16 = load i8*, i8** %4
%17 = call i32 @print_uint32(i32 %15, i8* %16)
%18 = load i32, i32* %5
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @print_int32(i32 %0, i8* %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = getelementptr inbounds i8, i8* %1, i64 1
store i8 45, i8* %1
%6 = sub nsw i32 0, %0
br label %7
7: ; preds = %4, %2
%8 = phi i8* [ %5, %4 ], [ %1, %2 ]
%9 = phi i32 [ %6, %4 ], [ %0, %2 ]
%10 = lshr i32 %0, 31
%11 = tail call i32 @print_uint32(i32 %9, i8* %8)
%12 = add nsw i32 %11, %10
ret i32 %12
}
void ITM_intr(void) {}


x86 assembly (clang, -O0):
<ITM_intr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ITM_intr>:
ret

LLVM IR (-O0):
define void @ITM_intr() {
ret void
}

LLVM IR (-O2):
define void @ITM_intr() {
ret void
}
long long min() { return -0x7fffffffffffffffLL - 1; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movabs $0x8000000000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
movabs $0x8000000000000000,%rax
ret

LLVM IR (-O0):
define i64 @min() {
ret i64 -9223372036854775808
}

LLVM IR (-O2):
define i64 @min() {
ret i64 -9223372036854775808
}
int ssearch(int number, int target) {
  if (number)
    return ssearch(number / 10, target) + (number % 10 == target);
  else
    return number == target - 1;
}


x86 assembly (clang, -O0):
<ssearch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1164 <ssearch+0x54>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    -0xc(%rbp),%esi
call   1030 <ssearch@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%edx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <ssearch+0x6a>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssearch>:
xor    %r9d,%r9d
test   %edi,%edi
je     1145 <ssearch+0x45>
nopw   0x0(%rax,%rax,1)
movslq %edi,%rax
imul   $0x66666667,%rax,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%r8d
mov    %eax,%edx
sub    %r8d,%edx
xor    %ecx,%ecx
cmp    %esi,%edx
sete   %cl
add    %ecx,%r9d
add    $0x9,%eax
cmp    $0x12,%eax
ja     1110 <ssearch+0x10>
xor    %eax,%eax
cmp    $0x1,%esi
sete   %al
add    %r9d,%eax
ret

LLVM IR (-O0):
define i32 @ssearch(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sdiv i32 %9, 10
%11 = load i32, i32* %5
%12 = call i32 @ssearch(i32 %10, i32 %11)
%13 = load i32, i32* %4
%14 = srem i32 %13, 10
%15 = load i32, i32* %5
%16 = icmp eq i32 %14, %15
%17 = zext i1 %16 to i32
%18 = add nsw i32 %12, %17
store i32 %18, i32* %3
br label %25
19: ; preds = %2
%20 = load i32, i32* %4
%21 = load i32, i32* %5
%22 = sub nsw i32 %21, 1
%23 = icmp eq i32 %20, %22
%24 = zext i1 %23 to i32
store i32 %24, i32* %3
br label %25
25: ; preds = %19, %8
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @ssearch(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %14, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %0, %2 ]
%6 = phi i32 [ %11, %4 ], [ 0, %2 ]
%7 = sdiv i32 %5, 10
%8 = srem i32 %5, 10
%9 = icmp eq i32 %8, %1
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %6, %10
%12 = add i32 %5, 9
%13 = icmp ult i32 %12, 19
br i1 %13, label %14, label %4
14: ; preds = %4, %2
%15 = phi i32 [ 0, %2 ], [ %11, %4 ]
%16 = icmp eq i32 %1, 1
%17 = zext i1 %16 to i32
%18 = add nsw i32 %15, %17
ret i32 %18
}
void loop(void) {
  volatile int i = 1;
  while (i++)
    ;
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1124 <loop+0x24>
jmp    110b <loop+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop>:
movl   $0x1,-0x4(%rsp)
nopl   0x0(%rax,%rax,1)
mov    -0x4(%rsp),%eax
lea    0x1(%rax),%ecx
mov    %ecx,-0x4(%rsp)
test   %eax,%eax
jne    1110 <loop+0x10>
ret

LLVM IR (-O0):
define void @loop() {
%1 = alloca i32
store volatile i32 1, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load volatile i32, i32* %1
%4 = add nsw i32 %3, 1
store volatile i32 %4, i32* %1
%5 = icmp ne i32 %3, 0
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @loop() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 1, i32* %1
br label %3
3: ; preds = %3, %0
%4 = load volatile i32, i32* %1
%5 = add nsw i32 %4, 1
store volatile i32 %5, i32* %1
%6 = icmp eq i32 %4, 0
br i1 %6, label %7, label %3
7: ; preds = %3
ret void
}
/* Type definitions */
struct node {
  int dummy;
};
struct generator {
  int dummy;
};

/* Variables and functions */
int repeat_score(struct generator *, struct node *);
int repeat_restore(struct generator *g, struct node *p) {
  return repeat_score(g, p) >= 2;
}


x86 assembly (clang, -O0):
<repeat_restore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <repeat_score@plt>
cmp    $0x2,%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeat_restore>:
push   %rax
call   1030 <repeat_score@plt>
xor    %ecx,%ecx
cmp    $0x2,%eax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.generator = type { i32 }
%struct.node = type { i32 }
define i32 @repeat_restore(%struct.generator* %0, %struct.node* %1) {
%3 = alloca %struct.generator*
%4 = alloca %struct.node*
store %struct.generator* %0, %struct.generator** %3
store %struct.node* %1, %struct.node** %4
%5 = load %struct.generator*, %struct.generator** %3
%6 = load %struct.node*, %struct.node** %4
%7 = call i32 @repeat_score(%struct.generator* %5, %struct.node* %6)
%8 = icmp sge i32 %7, 2
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.generator = type { i32 }
%struct.node = type { i32 }
define i32 @repeat_restore(%struct.generator* %0, %struct.node* %1) {
%3 = tail call i32 @repeat_score(%struct.generator* %0, %struct.node* %1)
%4 = icmp sgt i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int EDEADLK;
int pthread_rwlock_always_fail_EDEADLK(pthread_rwlock_t *rwlock) {
  return EDEADLK;
}


x86 assembly (clang, -O0):
<pthread_rwlock_always_fail_EDEADLK>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_rwlock_always_fail_EDEADLK>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EDEADLK = global i32 0
define i32 @pthread_rwlock_always_fail_EDEADLK(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @EDEADLK
ret i32 %3
}

LLVM IR (-O2):
@EDEADLK = global i32 0
define i32 @pthread_rwlock_always_fail_EDEADLK(i32* nocapture readnone %0) {
%2 = load i32, i32* @EDEADLK
ret i32 %2
}
void turnoffled() {}


x86 assembly (clang, -O0):
<turnoffled>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<turnoffled>:
ret

LLVM IR (-O0):
define void @turnoffled() {
ret void
}

LLVM IR (-O2):
define void @turnoffled() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void die(char *error) {
  fprintf(stderr, error);
  fprintf(stderr, "\n");
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xeb2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rbx
mov    %rdi,%rsi
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct MIDIMessageData {
  int dummy;
};

/* Variables and functions */
int _size_one_byte(struct MIDIMessageData *data, size_t *size) {
  if (data == NULL || size == NULL)
    return 1;
  *size = 1;
  return 0;
}


x86 assembly (clang, -O0):
<_size_one_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1122 <_size_one_byte+0x22>
cmpq   $0x0,-0x18(%rbp)
jne    112e <_size_one_byte+0x2e>
movl   $0x1,-0x4(%rbp)
jmp    1140 <_size_one_byte+0x40>
mov    -0x18(%rbp),%rax
movq   $0x1,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_size_one_byte>:
mov    $0x1,%eax
test   %rdi,%rdi
je     1118 <_size_one_byte+0x18>
test   %rsi,%rsi
je     1118 <_size_one_byte+0x18>
movq   $0x1,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.MIDIMessageData = type { i32 }
define i32 @_size_one_byte(%struct.MIDIMessageData* %0, i64* %1) {
%3 = alloca i32
%4 = alloca %struct.MIDIMessageData*
%5 = alloca i64*
store %struct.MIDIMessageData* %0, %struct.MIDIMessageData** %4
store i64* %1, i64** %5
%6 = load %struct.MIDIMessageData*, %struct.MIDIMessageData** %4
%7 = icmp eq %struct.MIDIMessageData* %6, null
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i64*, i64** %5
%10 = icmp eq i64* %9, null
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 1, i32* %3
br label %14
12: ; preds = %8
%13 = load i64*, i64** %5
store i64 1, i64* %13
store i32 0, i32* %3
br label %14
14: ; preds = %12, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.MIDIMessageData = type { i32 }
define i32 @_size_one_byte(%struct.MIDIMessageData* readnone %0, i64* writeonly %1) {
%3 = icmp eq %struct.MIDIMessageData* %0, null
%4 = icmp eq i64* %1, null
%5 = or i1 %3, %4
br i1 %5, label %7, label %6
6: ; preds = %2
store i64 1, i64* %1
br label %7
7: ; preds = %2, %6
%8 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %8
}
void client_flushaccess(void) {}


x86 assembly (clang, -O0):
<client_flushaccess>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<client_flushaccess>:
ret

LLVM IR (-O0):
define void @client_flushaccess() {
ret void
}

LLVM IR (-O2):
define void @client_flushaccess() {
ret void
}
int simd_get_supported_features(void) {
  int result = 0;
  return (result);
}


x86 assembly (clang, -O0):
<simd_get_supported_features>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simd_get_supported_features>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @simd_get_supported_features() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @simd_get_supported_features() {
ret i32 0
}
char *irc_irc_to_html(const char *const string) { return string; }


x86 assembly (clang, -O0):
<irc_irc_to_html>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_irc_to_html>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @irc_irc_to_html(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @irc_irc_to_html(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
typedef int wint_t;

/* Variables and functions */
int isalnum(int);
int iswalnum(wint_t c) { return c <= 255 ? isalnum(c) : 0; }


x86 assembly (clang, -O0):
<iswalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xff,-0x4(%rbp)
jg     1138 <iswalnum+0x28>
mov    -0x4(%rbp),%edi
call   1030 <isalnum@plt>
mov    %eax,-0x8(%rbp)
jmp    1142 <iswalnum+0x32>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1142 <iswalnum+0x32>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswalnum>:
cmp    $0xff,%edi
jg     111d <iswalnum+0xd>
jmp    1030 <isalnum@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @iswalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 255
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @isalnum(i32 %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ %7, %5 ], [ 0, %8 ]
ret i32 %10
}

LLVM IR (-O2):
define i32 @iswalnum(i32 %0) {
%2 = icmp slt i32 %0, 256
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @isalnum(i32 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
void InterpolateRow_AVX2() {}


x86 assembly (clang, -O0):
<InterpolateRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InterpolateRow_AVX2>:
ret

LLVM IR (-O0):
define void @InterpolateRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @InterpolateRow_AVX2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trace_initialize();
void trace_file_init(void) { trace_initialize(); }


x86 assembly (clang, -O0):
<trace_file_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <trace_initialize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_file_init>:
xor    %eax,%eax
jmp    1030 <trace_initialize@plt>

LLVM IR (-O0):
define void @trace_file_init() {
%1 = call i32 (...) @trace_initialize()
ret void
}

LLVM IR (-O2):
define void @trace_file_init() {
%1 = tail call i32 (...) @trace_initialize()
ret void
}
void RTZipTarFsStreamFromIoStream(void) {}


x86 assembly (clang, -O0):
<RTZipTarFsStreamFromIoStream>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTZipTarFsStreamFromIoStream>:
ret

LLVM IR (-O0):
define void @RTZipTarFsStreamFromIoStream() {
ret void
}

LLVM IR (-O2):
define void @RTZipTarFsStreamFromIoStream() {
ret void
}
/* Variables and functions */
char *strcat(char *, char const *);
char *lenient_strcat(char *dest, const char *src) {
  if (dest && src) {
    return strcat(dest, src);
  }
  return dest;
}


x86 assembly (clang, -O0):
<lenient_strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114c <lenient_strcat+0x3c>
cmpq   $0x0,-0x18(%rbp)
je     114c <lenient_strcat+0x3c>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcat@plt>
mov    %rax,-0x8(%rbp)
jmp    1154 <lenient_strcat+0x44>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lenient_strcat>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     1126 <lenient_strcat+0x16>
test   %rsi,%rsi
je     1126 <lenient_strcat+0x16>
mov    %rbx,%rdi
call   1030 <strcat@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @lenient_strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = call i8* @strcat(i8* %12, i8* %13)
store i8* %14, i8** %3
br label %17
15: ; preds = %8, %2
%16 = load i8*, i8** %4
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %11
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @lenient_strcat(i8* returned %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i8* @strcat(i8* %0, i8* %1)
br label %8
8: ; preds = %2, %6
ret i8* %0
}
float magic_sqrt(float number) {
  float x = number;
  float xhalf = 0.5f * x;
  int i = *(int *)&x;
  i = 0x5f375a84 - (i >> 1);
  x = *(float *)&i;
  x = x * (1.5f - xhalf * x * x);
  return number * x;
}


x86 assembly (clang, -O0):
<magic_sqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xee9(%rip),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f375a84,%eax
sub    %ecx,%eax
mov    %eax,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
movss  -0x8(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe8e(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<magic_sqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f375a84,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
movss  0xee7(%rip),%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm1,%xmm2
mulss  %xmm1,%xmm2
addss  0xed7(%rip),%xmm2
mulss  %xmm1,%xmm2
mulss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @magic_sqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %2
%6 = load float, float* %2
store float %6, float* %3
%7 = load float, float* %3
%8 = fmul float 5.000000e-01, %7
store float %8, float* %4
%9 = bitcast float* %3 to i32*
%10 = load i32, i32* %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = ashr i32 %11, 1
%13 = sub nsw i32 1597463172, %12
store i32 %13, i32* %5
%14 = bitcast i32* %5 to float*
%15 = load float, float* %14
store float %15, float* %3
%16 = load float, float* %3
%17 = load float, float* %4
%18 = load float, float* %3
%19 = fmul float %17, %18
%20 = load float, float* %3
%21 = fneg float %19
%22 = call float @llvm.fmuladd.f32(float %21, float %20, float 1.500000e+00)
%23 = fmul float %16, %22
store float %23, float* %3
%24 = load float, float* %2
%25 = load float, float* %3
%26 = fmul float %24, %25
ret float %26
}

LLVM IR (-O2):
define float @magic_sqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597463172, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
%10 = fmul float %9, %0
ret float %10
}
void RTRandAdvCreateParkMiller(void) {}


x86 assembly (clang, -O0):
<RTRandAdvCreateParkMiller>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTRandAdvCreateParkMiller>:
ret

LLVM IR (-O0):
define void @RTRandAdvCreateParkMiller() {
ret void
}

LLVM IR (-O2):
define void @RTRandAdvCreateParkMiller() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ConvertString(char *);
char *getBracketParam();
int /*<<< orphan*/ safe_free(char *);
void CmdNatexlab(int code) {
  char *s = getBracketParam();
  if (!2)
    ConvertString(s);
  safe_free(s);
}


x86 assembly (clang, -O0):
<CmdNatexlab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getBracketParam@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <safe_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CmdNatexlab>:
push   %rax
xor    %eax,%eax
call   1030 <getBracketParam@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <safe_free@plt>

LLVM IR (-O0):
define void @CmdNatexlab(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* (...) @getBracketParam()
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @safe_free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @CmdNatexlab(i32 %0) {
%2 = tail call i8* (...) @getBracketParam()
%3 = tail call i32 @safe_free(i8* %2)
ret void
}
unsigned long norm_tree_size(unsigned long interval) {
  unsigned long tmp;
  unsigned long j = 4;
  ;
  if (interval <= 16 * 4)
    return 16;
  while (1) {
    tmp = 16 * j;
    if (tmp * 4 >= interval)
      break;
    j *= 4;
    ;
  }
  return tmp;
}


x86 assembly (clang, -O0):
<norm_tree_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x4,-0x20(%rbp)
cmpq   $0x40,-0x10(%rbp)
ja     1128 <norm_tree_size+0x28>
movq   $0x10,-0x8(%rbp)
jmp    1169 <norm_tree_size+0x69>
jmp    112d <norm_tree_size+0x2d>
mov    -0x20(%rbp),%rax
shl    $0x4,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x2,%rax
cmp    -0x10(%rbp),%rax
jb     1150 <norm_tree_size+0x50>
jmp    1161 <norm_tree_size+0x61>
mov    -0x20(%rbp),%rax
shl    $0x2,%rax
mov    %rax,-0x20(%rbp)
jmp    112d <norm_tree_size+0x2d>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm_tree_size>:
mov    $0x10,%eax
cmp    $0x41,%rdi
jb     112b <norm_tree_size+0x2b>
mov    $0x4,%ecx
mov    %rcx,%rax
mov    %rcx,%rdx
shl    $0x6,%rdx
lea    0x0(,%rcx,4),%rcx
cmp    %rdi,%rdx
jb     1110 <norm_tree_size+0x10>
shl    $0x4,%rax
ret

LLVM IR (-O0):
define i64 @norm_tree_size(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 4, i64* %5
%6 = load i64, i64* %3
%7 = icmp ule i64 %6, 64
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 16, i64* %2
br label %23
9: ; preds = %1
br label %10
10: ; preds = %9, %18
%11 = load i64, i64* %5
%12 = mul i64 16, %11
store i64 %12, i64* %4
%13 = load i64, i64* %4
%14 = mul i64 %13, 4
%15 = load i64, i64* %3
%16 = icmp uge i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %10
br label %21
18: ; preds = %10
%19 = load i64, i64* %5
%20 = mul i64 %19, 4
store i64 %20, i64* %5
br label %10
21: ; preds = %17
%22 = load i64, i64* %4
store i64 %22, i64* %2
br label %23
23: ; preds = %21, %8
%24 = load i64, i64* %2
ret i64 %24
}

LLVM IR (-O2):
define i64 @norm_tree_size(i64 %0) {
%2 = icmp ult i64 %0, 65
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %7, %3 ], [ 4, %1 ]
%5 = shl i64 %4, 6
%6 = icmp ult i64 %5, %0
%7 = shl i64 %4, 2
br i1 %6, label %3, label %8
8: ; preds = %3
%9 = shl i64 %4, 4
br label %10
10: ; preds = %1, %8
%11 = phi i64 [ %9, %8 ], [ 16, %1 ]
ret i64 %11
}
const char *__malidrv_build_info(void) {
  return "malidrv:  CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=17 "
         "REPO_URL=r3p1-01rel0 REVISION=r3p1-01rel0 "
         "CHANGED_REVISION=r3p1-01rel0 CHANGE_DATE=r3p1-01rel0 BUILD_DATE=Pon "
         "Aug 19 17:20:39 CEST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 "
         "USING_HWMEM=1 USING_MALI200=0 USING_MALI400=3 "
         "USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= "
         "MALI_PLATFORM_FILE=platform/ux500/mali_platform.c "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_PROFILING=0 "
         "USING_INTERNAL_PROFILING=0 USING_GPU_UTILIZATION=y";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [472 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=17 REPO_URL=r3p1-01rel0 REVISION=r3p1-01rel0 CHANGED_REVISION=r3p1-01rel0 CHANGE_DATE=r3p1-01rel0 BUILD_DATE=Pon Aug 19 17:20:39 CEST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_PROFILING=0 USING_INTERNAL_PROFILING=0 USING_GPU_UTILIZATION=y\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([472 x i8], [472 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [472 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=17 REPO_URL=r3p1-01rel0 REVISION=r3p1-01rel0 CHANGED_REVISION=r3p1-01rel0 CHANGE_DATE=r3p1-01rel0 BUILD_DATE=Pon Aug 19 17:20:39 CEST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_PROFILING=0 USING_INTERNAL_PROFILING=0 USING_GPU_UTILIZATION=y\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([472 x i8], [472 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
long double __builtin_powil(long double, int);
long double pow(long double __x, int __n) { return __builtin_powil(__x, __n); }


x86 assembly (clang, -O0):
<pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %edi,-0x14(%rbp)
fldt   -0x10(%rbp)
mov    -0x14(%rbp),%edi
mov    %rsp,%rax
fstpt  (%rax)
call   1130 <__powixf2>
fld    %st(0)
fstp   %st(0)
add    $0x30,%rsp
pop    %rbp
ret
nopl   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<pow>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1120 <__powixf2>
add    $0x18,%rsp
ret
cs nopw 0x0(%rax,%rax,1)
nop

LLVM IR (-O0):
define x86_fp80 @pow(x86_fp80 %0, i32 %1) {
%3 = alloca x86_fp80
%4 = alloca i32
store x86_fp80 %0, x86_fp80* %3
store i32 %1, i32* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load i32, i32* %4
%7 = call x86_fp80 @llvm.powi.f80.i32(x86_fp80 %5, i32 %6)
ret x86_fp80 %7
}

LLVM IR (-O2):
define x86_fp80 @pow(x86_fp80 %0, i32 %1) {
%3 = tail call x86_fp80 @llvm.powi.f80.i32(x86_fp80 %0, i32 %1)
ret x86_fp80 %3
}
/* Variables and functions */
long long __normal___moddi3(long long, long long);
long long __wrap___moddi3(long long a, long long b) {
  return __normal___moddi3(a, b);
}


x86 assembly (clang, -O0):
<__wrap___moddi3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__normal___moddi3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap___moddi3>:
jmp    1030 <__normal___moddi3@plt>

LLVM IR (-O0):
define i64 @__wrap___moddi3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @__normal___moddi3(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @__wrap___moddi3(i64 %0, i64 %1) {
%3 = tail call i64 @__normal___moddi3(i64 %0, i64 %1)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ islower(int);
void t_islower_0x69() {
  Assert_real((islower(105)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              530, ("islower should be 1 for i"));
}


x86 assembly (clang, -O0):
<t_islower_0x69>:
push   %rbp
mov    %rsp,%rbp
mov    $0x69,%edi
call   1030 <islower@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x212,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x69>:
push   %rax
mov    $0x69,%edi
call   1030 <islower@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x212,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for i\00"
define void @t_islower_0x69() {
%1 = call i32 @islower(i32 105)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 530, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for i\00"
define void @t_islower_0x69() {
%1 = tail call i32 @islower(i32 105)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 530, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void venc_exit(void) {}


x86 assembly (clang, -O0):
<venc_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<venc_exit>:
ret

LLVM IR (-O0):
define void @venc_exit() {
ret void
}

LLVM IR (-O2):
define void @venc_exit() {
ret void
}
void foo_1_1_2_2_2_2_1_2_1() {}


x86 assembly (clang, -O0):
<foo_1_1_2_2_2_2_1_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_2_2_2_2_1_2_1>:
ret

LLVM IR (-O0):
define void @foo_1_1_2_2_2_2_1_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_2_2_2_2_1_2_1() {
ret void
}
int compare() {}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
ret

LLVM IR (-O0):
define i32 @compare() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @compare() {
ret i32 undef
}
/* Variables and functions */
int __syscall(int, void *, size_t, int /*<<< orphan*/, int);
int write(int filedes, void *buffer, size_t length) {
  return __syscall(filedes, buffer, length, 0, 0x404);
}


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x404,%r8d
call   1030 <__syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
xor    %ecx,%ecx
mov    $0x404,%r8d
jmp    1030 <__syscall@plt>

LLVM IR (-O0):
define i32 @write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @__syscall(i32 %7, i8* %8, i64 %9, i32 0, i32 1028)
ret i32 %10
}

LLVM IR (-O2):
define i32 @write(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @__syscall(i32 %0, i8* %1, i64 %2, i32 0, i32 1028)
ret i32 %4
}
double fz_clampd(double d, double min, double max) {
  return (d > min ? (d < max ? d : max) : min);
}


x86 assembly (clang, -O0):
<fz_clampd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    115f <fz_clampd+0x5f>
movsd  -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1146 <fz_clampd+0x46>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1150 <fz_clampd+0x50>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    1169 <fz_clampd+0x69>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fz_clampd>:
movapd %xmm1,%xmm3
cmpltsd %xmm0,%xmm3
minsd  %xmm2,%xmm0
andpd  %xmm3,%xmm0
andnpd %xmm1,%xmm3
orpd   %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @fz_clampd(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fcmp ogt double %7, %8
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load double, double* %4
%12 = load double, double* %6
%13 = fcmp olt double %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load double, double* %4
br label %18
16: ; preds = %10
%17 = load double, double* %6
br label %18
18: ; preds = %16, %14
%19 = phi double [ %15, %14 ], [ %17, %16 ]
br label %22
20: ; preds = %3
%21 = load double, double* %5
br label %22
22: ; preds = %20, %18
%23 = phi double [ %19, %18 ], [ %21, %20 ]
ret double %23
}

LLVM IR (-O2):
define double @fz_clampd(double %0, double %1, double %2) {
%4 = fcmp ogt double %0, %1
%5 = fcmp olt double %0, %2
%6 = select i1 %5, double %0, double %2
%7 = select i1 %4, double %6, double %1
ret double %7
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ FUTEX_WAIT;
int __futex(void volatile *, int /*<<< orphan*/, int, struct timespec const *);
int __futex_wait(volatile void *ftx, int value,
                 const struct timespec *timeout) {
  return __futex(ftx, FUTEX_WAIT, value, timeout);
}


x86 assembly (clang, -O0):
<__futex_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eba(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <__futex@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__futex_wait>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    0x2ecc(%rip),%rax
mov    (%rax),%esi
jmp    1030 <__futex@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@FUTEX_WAIT = global i32 0
define i32 @__futex_wait(i8* %0, i32 %1, %struct.timespec* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca %struct.timespec*
store i8* %0, i8** %4
store i32 %1, i32* %5
store %struct.timespec* %2, %struct.timespec** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* @FUTEX_WAIT
%9 = load i32, i32* %5
%10 = load %struct.timespec*, %struct.timespec** %6
%11 = call i32 @__futex(i8* %7, i32 %8, i32 %9, %struct.timespec* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@FUTEX_WAIT = global i32 0
define i32 @__futex_wait(i8* %0, i32 %1, %struct.timespec* %2) {
%4 = load i32, i32* @FUTEX_WAIT
%5 = tail call i32 @__futex(i8* %0, i32 %4, i32 %1, %struct.timespec* %2)
ret i32 %5
}
void UserSelfEventQueueEmptyCalloutf(void) {}


x86 assembly (clang, -O0):
<UserSelfEventQueueEmptyCalloutf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UserSelfEventQueueEmptyCalloutf>:
ret

LLVM IR (-O0):
define void @UserSelfEventQueueEmptyCalloutf() {
ret void
}

LLVM IR (-O2):
define void @UserSelfEventQueueEmptyCalloutf() {
ret void
}
void ExttRelayAuxTable(void) {}


x86 assembly (clang, -O0):
<ExttRelayAuxTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttRelayAuxTable>:
ret

LLVM IR (-O0):
define void @ExttRelayAuxTable() {
ret void
}

LLVM IR (-O2):
define void @ExttRelayAuxTable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enreset();
void DisableEtherdev(void) { enreset(); }


x86 assembly (clang, -O0):
<DisableEtherdev>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <enreset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisableEtherdev>:
xor    %eax,%eax
jmp    1030 <enreset@plt>

LLVM IR (-O0):
define void @DisableEtherdev() {
%1 = call i32 (...) @enreset()
ret void
}

LLVM IR (-O2):
define void @DisableEtherdev() {
%1 = tail call i32 (...) @enreset()
ret void
}
int test_imm_D6int64_highword_reg(long long val) {
  return ((val >> 32) & (0xD6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D6int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xd6,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D6int64_highword_reg>:
movabs $0xd600000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D6int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 214
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D6int64_highword_reg(i64 %0) {
%2 = and i64 %0, 919123001344
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ squeeze(char *, char *);
int main() {
  char str1[] = "abcdefghijklmnopqrstuvwxyz";
  char str2[] = "bdfhjlnprtvxz";
  squeeze(str1, str2);
  printf("%s\n", str1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec1(%rip),%ax
mov    %ax,-0x8(%rbp)
mov    0xeb9(%rip),%al
mov    %al,-0x6(%rbp)
mov    0xeb0(%rip),%rax
mov    %rax,-0x2e(%rbp)
mov    0xeae(%rip),%eax
mov    %eax,-0x26(%rbp)
mov    0xea8(%rip),%ax
mov    %ax,-0x22(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x2e(%rbp),%rsi
call   1030 <squeeze@plt>
lea    -0x20(%rbp),%rsi
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
movups 0xedf(%rip),%xmm0
movups %xmm0,0x1b(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movabs $0x7a78767472706e,%rax
mov    %rax,0x6(%rsp)
movabs $0x706e6c6a68666462,%rax
6c 6e 70
mov    %rax,(%rsp)
lea    0x10(%rsp),%rbx
mov    %rsp,%rsi
mov    %rbx,%rdi
call   1030 <squeeze@plt>
lea    0xeb8(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.str1 = [27 x i8] c"abcdefghijklmnopqrstuvwxyz\00"
@__const.main.str2 = [14 x i8] c"bdfhjlnprtvxz\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [27 x i8]
%3 = alloca [14 x i8]
store i32 0, i32* %1
%4 = bitcast [27 x i8]* %2 to i8*
%5 = bitcast [14 x i8]* %3 to i8*
%6 = getelementptr inbounds [27 x i8], [27 x i8]* %2, i64 0, i64 0
%7 = getelementptr inbounds [14 x i8], [14 x i8]* %3, i64 0, i64 0
%8 = call i32 @squeeze(i8* %6, i8* %7)
%9 = getelementptr inbounds [27 x i8], [27 x i8]* %2, i64 0, i64 0
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.str1 = [27 x i8] c"abcdefghijklmnopqrstuvwxyz\00"
@__const.main.str2 = [14 x i8] c"bdfhjlnprtvxz\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [27 x i8]
%2 = alloca [14 x i8]
%3 = getelementptr inbounds [27 x i8], [27 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [14 x i8], [14 x i8]* %2, i64 0, i64 0
%5 = call i32 @squeeze(i8* %3, i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}