int f1(unsigned char a, unsigned char b) {
  int result = 0, i;
  for (i = 0; i < 8; i++)
    if ((b >> i) & 1)
      result += (a << i);
  return result;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    115f <f1+0x5f>
movzbl -0x2(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     114c <f1+0x4c>
movzbl -0x1(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1151 <f1+0x51>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111e <f1+0x1e>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
movd   %edi,%xmm1
add    %edi,%edi
pshufd $0x50,%xmm1,%xmm2
movdqa %xmm1,%xmm0
pslld  $0x3,%xmm0
pslld  $0x2,%xmm2
pshufd $0x55,%xmm2,%xmm2
punpckldq %xmm2,%xmm0
movd   %esi,%xmm2
pshufd $0x0,%xmm2,%xmm2
movdqa 0xecd(%rip),%xmm3
movdqa %xmm2,%xmm4
pand   %xmm3,%xmm4
movdqa 0xecd(%rip),%xmm5
pand   %xmm5,%xmm2
pshufd $0x0,%xmm1,%xmm6
movdqa %xmm6,%xmm7
pmuludq %xmm5,%xmm7
pmuludq 0xec4(%rip),%xmm6
pshufd $0xe8,%xmm7,%xmm7
pshufd $0xe8,%xmm6,%xmm6
punpckldq %xmm6,%xmm7
movd   %edi,%xmm6
punpcklqdq %xmm6,%xmm1
shufps $0x24,%xmm1,%xmm0
pcmpeqd %xmm5,%xmm2
pand   %xmm7,%xmm2
pcmpeqd %xmm3,%xmm4
pand   %xmm0,%xmm4
paddd  %xmm2,%xmm4
pshufd $0xee,%xmm4,%xmm0
paddd  %xmm4,%xmm0
pshufd $0x55,%xmm0,%xmm1
paddd  %xmm0,%xmm1
movd   %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @f1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %25, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 8
br i1 %9, label %10, label %28
10: ; preds = %7
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = load i32, i32* %6
%14 = ashr i32 %12, %13
%15 = and i32 %14, 1
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %24
17: ; preds = %10
%18 = load i8, i8* %3
%19 = zext i8 %18 to i32
%20 = load i32, i32* %6
%21 = shl i32 %19, %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, %21
store i32 %23, i32* %5
br label %24
24: ; preds = %17, %10
br label %25
25: ; preds = %24
%26 = load i32, i32* %6
%27 = add nsw i32 %26, 1
store i32 %27, i32* %6
br label %7
28: ; preds = %7
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @f1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 1
%6 = insertelement <2 x i32> poison, i32 %4, i64 0
%7 = shufflevector <2 x i32> %6, <2 x i32> poison, <2 x i32> zeroinitializer
%8 = shl nuw nsw <2 x i32> %7, <i32 3, i32 2>
%9 = insertelement <8 x i32> poison, i32 %3, i64 0
%10 = shufflevector <8 x i32> %9, <8 x i32> poison, <8 x i32> zeroinitializer
%11 = and <8 x i32> %10, <i32 128, i32 64, i32 32, i32 16, i32 8, i32 4, i32 2, i32 1>
%12 = icmp eq <8 x i32> %11, zeroinitializer
%13 = insertelement <4 x i32> poison, i32 %4, i64 0
%14 = shufflevector <4 x i32> %13, <4 x i32> poison, <4 x i32> zeroinitializer
%15 = shl nuw nsw <4 x i32> %14, <i32 7, i32 6, i32 5, i32 4>
%16 = shufflevector <4 x i32> %15, <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
%17 = shufflevector <2 x i32> %8, <2 x i32> poison, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%18 = shufflevector <8 x i32> %16, <8 x i32> %17, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 undef, i32 undef>
%19 = insertelement <8 x i32> %18, i32 %5, i64 6
%20 = insertelement <8 x i32> %19, i32 %4, i64 7
%21 = select <8 x i1> %12, <8 x i32> zeroinitializer, <8 x i32> %20
%22 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %21)
ret i32 %22
}