xunge/DecIR huggingface dataset:
/* Variables and functions */
int ArgNum();
scalar_t__ GetFlag(int);
int /*<<< orphan*/ SetFlag(int, scalar_t__);
void Act_Add(void) {
  int a = ArgNum();
  SetFlag(a, GetFlag(a) + ArgNum());
}


x86 assembly (clang, -O0):
<Act_Add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <ArgNum@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <GetFlag@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1050 <ArgNum@plt>
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edi
cltq
add    %rax,%rsi
call   1030 <SetFlag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Act_Add>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <ArgNum@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1040 <GetFlag@plt>
mov    %rax,%r14
xor    %eax,%eax
call   1050 <ArgNum@plt>
movslq %eax,%rsi
add    %r14,%rsi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <SetFlag@plt>

LLVM IR (-O0):
define void @Act_Add() {
%1 = alloca i32
%2 = call i32 (...) @ArgNum()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = load i32, i32* %1
%5 = call i64 @GetFlag(i32 %4)
%6 = call i32 (...) @ArgNum()
%7 = sext i32 %6 to i64
%8 = add nsw i64 %5, %7
%9 = call i32 @SetFlag(i32 %3, i64 %8)
ret void
}

LLVM IR (-O2):
define void @Act_Add() {
%1 = tail call i32 (...) @ArgNum()
%2 = tail call i64 @GetFlag(i32 %1)
%3 = tail call i32 (...) @ArgNum()
%4 = sext i32 %3 to i64
%5 = add nsw i64 %2, %4
%6 = tail call i32 @SetFlag(i32 %1, i64 %5)
ret void
}
void NETSCAPE_SPKAC_free(void) {}


x86 assembly (clang, -O0):
<NETSCAPE_SPKAC_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NETSCAPE_SPKAC_free>:
ret

LLVM IR (-O0):
define void @NETSCAPE_SPKAC_free() {
ret void
}

LLVM IR (-O2):
define void @NETSCAPE_SPKAC_free() {
ret void
}
/* Variables and functions */
int *malloc(int);
int main() {
  int x, y, z;
  int *p, *q;
  int **r;
  y = 42;
  x = y;
  q = malloc(x);
  p = &x;
  r = &p;
  q = &y;
  *r = q;
  r = &q;
  if (x == 42) {
    p = &z;
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2a,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x20(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    %rcx,(%rax)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpl   $0x2a,-0x8(%rbp)
jne    1175 <main+0x65>
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2a,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32**
store i32 0, i32* %1
store i32 42, i32* %3
%8 = load i32, i32* %3
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = call i32* @malloc(i32 %9)
store i32* %10, i32** %6
store i32* %2, i32** %5
store i32** %5, i32*** %7
store i32* %3, i32** %6
%11 = load i32*, i32** %6
%12 = load i32**, i32*** %7
store i32* %11, i32** %12
store i32** %6, i32*** %7
%13 = load i32, i32* %2
%14 = icmp eq i32 %13, 42
br i1 %14, label %15, label %16
15: ; preds = %0
store i32* %4, i32** %5
br label %16
16: ; preds = %15, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 42)
ret i32 0
}
void UNSET_DIGIT(unsigned int *v, int i) {
  v[i / (sizeof(unsigned int) * 8)] &=
      ~(1U << (i % (sizeof(unsigned int) * 8)));
}


x86 assembly (clang, -O0):
<UNSET_DIGIT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
and    $0x1f,%rax
mov    %eax,%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
shr    $0x5,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UNSET_DIGIT>:
movslq %esi,%rcx
mov    $0xfffffffe,%eax
rol    %cl,%eax
shr    $0x5,%rcx
and    %eax,(%rdi,%rcx,4)
ret

LLVM IR (-O0):
define void @UNSET_DIGIT(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = urem i64 %6, 32
%8 = trunc i64 %7 to i32
%9 = shl i32 1, %8
%10 = xor i32 %9, -1
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = udiv i64 %13, 32
%15 = getelementptr inbounds i32, i32* %11, i64 %14
%16 = load i32, i32* %15
%17 = and i32 %16, %10
store i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @UNSET_DIGIT(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = and i32 %1, 31
%5 = shl nuw i32 1, %4
%6 = xor i32 %5, -1
%7 = lshr i64 %3, 5
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = and i32 %9, %6
store i32 %10, i32* %8
ret void
}
/* Type definitions */
struct thread {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct thread *);
void thread_free(struct thread *thread) { free(thread); }


x86 assembly (clang, -O0):
<thread_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.thread = type { i32 }
define void @thread_free(%struct.thread* %0) {
%2 = alloca %struct.thread*
store %struct.thread* %0, %struct.thread** %2
%3 = load %struct.thread*, %struct.thread** %2
%4 = call i32 @free(%struct.thread* %3)
ret void
}

LLVM IR (-O2):
%struct.thread = type { i32 }
define void @thread_free(%struct.thread* nocapture %0) {
%2 = tail call i32 @free(%struct.thread* %0)
ret void
}
/* Variables and functions */
int get_stat_result_c4_(char *, long *, long);
int get_stat_result_c8_(char *name, long *stat_result, long len_name) {
  return get_stat_result_c4_(name, stat_result, len_name);
}


x86 assembly (clang, -O0):
<get_stat_result_c8_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <get_stat_result_c4_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_stat_result_c8_>:
jmp    1030 <get_stat_result_c4_@plt>

LLVM IR (-O0):
define i32 @get_stat_result_c8_(i8* %0, i64* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64
store i8* %0, i8** %4
store i64* %1, i64** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64*, i64** %5
%9 = load i64, i64* %6
%10 = call i32 @get_stat_result_c4_(i8* %7, i64* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_stat_result_c8_(i8* %0, i64* %1, i64 %2) {
%4 = tail call i32 @get_stat_result_c4_(i8* %0, i64* %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ReplaceBlank(char *, int);
int /*<<< orphan*/ puts(char *);
int main(int argc, const char *argv[]) {
  char str[100] =
      "Hooray! Oh My Zsh has been update and/or is at the current version.";
  ReplaceBlank(str, 100);
  puts(str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x80(%rbp),%rdi
lea    0xeac(%rip),%rsi
mov    $0x64,%edx
call   1040 <memcpy@plt>
lea    -0x80(%rbp),%rdi
mov    $0x64,%esi
call   1050 <ReplaceBlank@plt>
lea    -0x80(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
movaps 0xf24(%rip),%xmm0
movaps %xmm0,0x50(%rsp)
movaps 0xf08(%rip),%xmm0
movaps %xmm0,0x40(%rsp)
movaps 0xeec(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xed0(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xeb4(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xe98(%rip),%xmm0
movaps %xmm0,(%rsp)
movl   $0x0,0x60(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x64,%esi
call   1040 <ReplaceBlank@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.str = [100 x i8] c"Hooray! Oh My Zsh has been update and/or is at the current version.\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [100 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [100 x i8]* %6 to i8*
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %6, i64 0, i64 0
%9 = call i32 @ReplaceBlank(i8* %8, i32 100)
%10 = getelementptr inbounds [100 x i8], [100 x i8]* %6, i64 0, i64 0
%11 = call i32 @puts(i8* %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.str = [100 x i8] c"Hooray! Oh My Zsh has been update and/or is at the current version.\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [100 x i8]
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = call i32 @ReplaceBlank(i8* %4, i32 100)
%6 = call i32 @puts(i8* %4)
ret i32 0
}
/* Variables and functions */
int test_server_nonblock();
int main() {
  int nret = 0;
  nret = test_server_nonblock();
  return -nret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <test_server_nonblock@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
sub    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_server_nonblock@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 (...) @test_server_nonblock()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_server_nonblock()
%2 = sub nsw i32 0, %1
ret i32 %2
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t galois_field_sub(uint64_t m, uint64_t n) { return m ^ n; }


x86 assembly (clang, -O0):
<galois_field_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<galois_field_sub>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @galois_field_sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @galois_field_sub(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
float internal_sign_f(float value) {
  return (value >= 0 ? (value == 0 ? 0 : 1) : -1);
}


x86 assembly (clang, -O0):
<internal_sign_f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1141 <internal_sign_f+0x41>
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
mov    $0x1,%eax
xor    %ecx,%ecx
ucomiss %xmm1,%xmm0
setnp  %sil
sete   %dl
test   %sil,%dl
cmovne %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    114e <internal_sign_f+0x4e>
mov    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    114e <internal_sign_f+0x4e>
mov    -0x8(%rbp),%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_sign_f>:
xorps  %xmm1,%xmm1
movaps %xmm0,%xmm2
cmpeqss %xmm1,%xmm2
movss  0xeed(%rip),%xmm3
andnps %xmm3,%xmm2
cmpnless %xmm0,%xmm1
movss  0xee1(%rip),%xmm0
andps  %xmm1,%xmm0
andnps %xmm2,%xmm1
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @internal_sign_f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load float, float* %2
%7 = fcmp oeq float %6, 0.000000e+00
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 1
br label %11
10: ; preds = %1
br label %11
11: ; preds = %10, %5
%12 = phi i32 [ %9, %5 ], [ -1, %10 ]
%13 = sitofp i32 %12 to float
ret float %13
}

LLVM IR (-O2):
define float @internal_sign_f(float %0) {
%2 = fcmp ult float %0, 0.000000e+00
%3 = fcmp oeq float %0, 0.000000e+00
%4 = select i1 %3, float 0.000000e+00, float 1.000000e+00
%5 = select i1 %2, float -1.000000e+00, float %4
ret float %5
}
void CFGMR3InsertNodeFV(void) {}


x86 assembly (clang, -O0):
<CFGMR3InsertNodeFV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3InsertNodeFV>:
ret

LLVM IR (-O0):
define void @CFGMR3InsertNodeFV() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3InsertNodeFV() {
ret void
}
void _exit() {}


x86 assembly (clang, -O0):
<_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
unreachable
}

LLVM IR (-O2):
int path_035_expected_2(int y) {
  int x;
  for (x = 0; x < y; x++) {
    continue;
    if (x) {
    } else {
    }
  }
  return x;
}


x86 assembly (clang, -O0):
<path_035_expected_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    112d <path_035_expected_2+0x2d>
jmp    111f <path_035_expected_2+0x1f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <path_035_expected_2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_035_expected_2>:
xor    %eax,%eax
test   %edi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @path_035_expected_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @path_035_expected_2(i32 %0) {
%2 = call i32 @llvm.smax.i32(i32 %0, i32 0)
ret i32 %2
}
/* Variables and functions */
unsigned long UINT_MAX;
unsigned long strtoul(char *, int /*<<< orphan*/ *, int);
unsigned int ar_strtoui(char *s) {
  unsigned long int tmp = strtoul(s, NULL, 10);
  unsigned int ans;
  if (tmp <= UINT_MAX) {
    ans = tmp;
  } else {
    ans = UINT_MAX;
  }
  return ans;
}


x86 assembly (clang, -O0):
<ar_strtoui>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1030 <strtoul@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2eab(%rip),%rcx
cmp    (%rcx),%rax
ja     1152 <ar_strtoui+0x42>
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
jmp    115f <ar_strtoui+0x4f>
mov    0x2e8f(%rip),%rax
mov    (%rax),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar_strtoui>:
push   %rax
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <strtoul@plt>
mov    0x2ec4(%rip),%rcx
mov    (%rcx),%rcx
cmp    %rcx,%rax
cmova  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@UINT_MAX = global i64 0
define i32 @ar_strtoui(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @strtoul(i8* %5, i32* null, i32 10)
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = load i64, i64* @UINT_MAX
%9 = icmp ule i64 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i64, i64* %3
%12 = trunc i64 %11 to i32
store i32 %12, i32* %4
br label %16
13: ; preds = %1
%14 = load i64, i64* @UINT_MAX
%15 = trunc i64 %14 to i32
store i32 %15, i32* %4
br label %16
16: ; preds = %13, %10
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
@UINT_MAX = global i64 0
define i32 @ar_strtoui(i8* nocapture %0) {
%2 = tail call i64 @strtoul(i8* nocapture %0, i32* null, i32 10)
%3 = load i64, i64* @UINT_MAX
%4 = icmp ugt i64 %2, %3
%5 = select i1 %4, i64 %3, i64 %2
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Variables and functions */
int addch(int);
int /*<<< orphan*/ refresh();
int con_putch(int ch) {
  int c = addch(ch);
  refresh();
  return c;
}


x86 assembly (clang, -O0):
<con_putch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <addch@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <refresh@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<con_putch>:
push   %rbx
call   1030 <addch@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <refresh@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @con_putch(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @addch(i32 %4)
store i32 %5, i32* %3
%6 = call i32 (...) @refresh()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @con_putch(i32 %0) {
%2 = tail call i32 @addch(i32 %0)
%3 = tail call i32 (...) @refresh()
ret i32 %2
}
int isnanf(x)
float x;
{
  union {
    float f;
    unsigned short s[2];
    unsigned int i;
  } u;
  u.f = x;
  if (sizeof(int) == 4) {
    if (((u.i & 0x7f800000) == 0x7f800000) && ((u.i & 0x007fffff) != 0))
      return 1;
    return (0);
  } else {
    if ((u.s[0] & 0x7f80) == 0x7f80) {
      if (((u.s[0] & 0x000f) | u.s[1]) != 0)
        return (1);
    }
    return (0);
  }
}


x86 assembly (clang, -O0):
<isnanf>:
push   %rbp
mov    %rsp,%rbp
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0x7f800000,%eax
cmp    $0x7f800000,%eax
jne    1147 <isnanf+0x47>
mov    -0x10(%rbp),%eax
and    $0x7fffff,%eax
cmp    $0x0,%eax
je     1147 <isnanf+0x47>
movl   $0x1,-0x4(%rbp)
jmp    114e <isnanf+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnanf>:
cvtsd2ss %xmm0,%xmm0
movd   %xmm0,%eax
mov    %eax,%ecx
not    %ecx
test   $0x7f800000,%ecx
sete   %cl
test   $0x7fffff,%eax
setne  %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
%union.anon = type { float }
define i32 @isnanf(double %0) {
%2 = alloca i32
%3 = alloca float
%4 = alloca %union.anon
%5 = fptrunc double %0 to float
store float %5, float* %3
%6 = load float, float* %3
%7 = bitcast %union.anon* %4 to float*
store float %6, float* %7
%8 = bitcast %union.anon* %4 to i32*
%9 = load i32, i32* %8
%10 = and i32 %9, 2139095040
%11 = icmp eq i32 %10, 2139095040
br i1 %11, label %12, label %18
12: ; preds = %1
%13 = bitcast %union.anon* %4 to i32*
%14 = load i32, i32* %13
%15 = and i32 %14, 8388607
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 1, i32* %2
br label %19
18: ; preds = %12, %1
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @isnanf(double %0) {
%2 = fptrunc double %0 to float
%3 = bitcast float %2 to i32
%4 = and i32 %3, 2139095040
%5 = icmp eq i32 %4, 2139095040
%6 = and i32 %3, 8388607
%7 = icmp ne i32 %6, 0
%8 = and i1 %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int fls(int /*<<< orphan*/);
__attribute__((const)) int __ilog2_u32(u_int32_t n) { return fls(n) - 1; }


x86 assembly (clang, -O0):
<__ilog2_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fls@plt>
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ilog2_u32>:
push   %rax
call   1030 <fls@plt>
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__ilog2_u32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fls(i32 %3)
%5 = sub nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @__ilog2_u32(i32 %0) {
%2 = tail call i32 @fls(i32 %0)
%3 = add nsw i32 %2, -1
ret i32 %3
}
void rop3_251_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~S;
  stk2 = T | stk3;
  stk1 = *D | stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_251_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_251_1_1>:
mov    %esi,%eax
not    %al
or     %dl,%al
mov    (%rdi),%cl
or     %cl,%al
or     %sil,%dl
xor    %al,%cl
and    %dl,%cl
xor    %al,%cl
mov    %cl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_251_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8, i8* %6
%15 = zext i8 %14 to i32
%16 = load i8, i8* %9
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_251_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %1, -1
%5 = or i8 %4, %2
%6 = load i8, i8* %0
%7 = or i8 %5, %6
%8 = or i8 %2, %1
%9 = xor i8 %8, -1
%10 = and i8 %7, %9
%11 = and i8 %6, %8
%12 = or i8 %11, %10
store i8 %12, i8* %0
ret void
}
/* Variables and functions */
scalar_t__ load_device_tree(char const *);
int uart_setup(const char *dt) {
  if (load_device_tree(dt)) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<uart_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <load_device_tree@plt>
cmp    $0x0,%rax
je     113b <uart_setup+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <uart_setup+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_setup>:
push   %rax
call   1030 <load_device_tree@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @uart_setup(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @load_device_tree(i8* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @uart_setup(i8* %0) {
%2 = tail call i64 @load_device_tree(i8* %0)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void cvcc_led_off(void) { *(unsigned char *)0x5002 &= ~(1 << 3); }


x86 assembly (clang, -O0):
<cvcc_led_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5002,%eax
movzbl (%rax),%eax
and    $0xfffffff7,%eax
mov    %al,%cl
mov    $0x5002,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvcc_led_off>:
andb   $0xf7,0x5002
f7
ret

LLVM IR (-O0):
define void @cvcc_led_off() {
%1 = load i8, i8* inttoptr (i64 20482 to i8*)
%2 = zext i8 %1 to i32
%3 = and i32 %2, -9
%4 = trunc i32 %3 to i8
store i8 %4, i8* inttoptr (i64 20482 to i8*)
ret void
}

LLVM IR (-O2):
define void @cvcc_led_off() {
%1 = load i8, i8* inttoptr (i64 20482 to i8*)
%2 = and i8 %1, -9
store i8 %2, i8* inttoptr (i64 20482 to i8*)
ret void
}
void init_ring(void) {}


x86 assembly (clang, -O0):
<init_ring>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_ring>:
ret

LLVM IR (-O0):
define void @init_ring() {
ret void
}

LLVM IR (-O2):
define void @init_ring() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void ps(char *s) { printf("%s", s); }


x86 assembly (clang, -O0):
<ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @ps(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @ps(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
size_t doz(size_t a, size_t b) { return a < b ? 0 : a - b; }


x86 assembly (clang, -O0):
<doz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1125 <doz+0x25>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    1131 <doz+0x31>
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doz>:
xor    %eax,%eax
sub    %rsi,%rdi
cmovae %rdi,%rax
ret

LLVM IR (-O0):
define i64 @doz(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %2
br label %13
9: ; preds = %2
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = sub i64 %10, %11
br label %13
13: ; preds = %9, %8
%14 = phi i64 [ 0, %8 ], [ %12, %9 ]
ret i64 %14
}

LLVM IR (-O2):
define i64 @doz(i64 %0, i64 %1) {
%3 = tail call i64 @llvm.usub.sat.i64(i64 %0, i64 %1)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void funcion_que_no_devuelve(void) {
  printf("ESTA FUNCION NO DE VUELVE NADA\n");
}


x86 assembly (clang, -O0):
<funcion_que_no_devuelve>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcion_que_no_devuelve>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"ESTA FUNCION NO DE VUELVE NADA\0A\00"
define void @funcion_que_no_devuelve() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [31 x i8] c"ESTA FUNCION NO DE VUELVE NADA\00"
define void @funcion_que_no_devuelve() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, double);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int a, b;
  scanf("%d %d", &a, &b);
  printf("%d %.2lf", a / b, (double)a / b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,%esi
cvtsi2sdl -0x8(%rbp),%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
divsd  %xmm1,%xmm0
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%ecx
mov    (%rsp),%esi
mov    %ecx,%eax
cltd
cvtsi2sd %ecx,%xmm0
idiv   %esi
cvtsi2sd %esi,%xmm1
divsd  %xmm1,%xmm0
lea    0xeb2(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [9 x i8] c"%d %.2lf\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = sdiv i32 %5, %6
%8 = load i32, i32* %2
%9 = sitofp i32 %8 to double
%10 = load i32, i32* %3
%11 = sitofp i32 %10 to double
%12 = fdiv double %9, %11
%13 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %7, double %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [9 x i8] c"%d %.2lf\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = sdiv i32 %6, %7
%9 = sitofp i32 %6 to double
%10 = sitofp i32 %7 to double
%11 = fdiv double %9, %10
%12 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %8, double %11)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int syscall(int, int /*<<< orphan*/, int /*<<< orphan*/);
int ps() {
  printf("Entering kernal to ps...\n");
  return syscall(1, 0, 0);
}


x86 assembly (clang, -O0):
<ps>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1040 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
pop    %rax
jmp    1040 <syscall@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Entering kernal to ps...\0A\00"
define i32 @ps() {
%1 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @syscall(i32 1, i32 0, i32 0)
ret i32 %2
}

LLVM IR (-O2):
@str = [25 x i8] c"Entering kernal to ps...\00"
define i32 @ps() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @syscall(i32 1, i32 0, i32 0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ malloc(unsigned int);
double *darray(unsigned int n) { return (double *)malloc(n * sizeof(double)); }


x86 assembly (clang, -O0):
<darray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darray>:
shl    $0x3,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define double* @darray(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = mul i64 %4, 8
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to double*
ret double* %8
}

LLVM IR (-O2):
define double* @darray(i32 %0) {
%2 = shl i32 %0, 3
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to double*
ret double* %4
}
void d2i_PKCS7_ENC_CONTENT(void) {}


x86 assembly (clang, -O0):
<d2i_PKCS7_ENC_CONTENT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS7_ENC_CONTENT>:
ret

LLVM IR (-O0):
define void @d2i_PKCS7_ENC_CONTENT() {
ret void
}

LLVM IR (-O2):
define void @d2i_PKCS7_ENC_CONTENT() {
ret void
}
int identity(int x) { return x + 2; }


x86 assembly (clang, -O0):
<identity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<identity>:
lea    0x2(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @identity(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @identity(i32 %0) {
%2 = add nsw i32 %0, 2
ret i32 %2
}
/* Type definitions */
typedef int u_int32_t;

/* Variables and functions */
u_int32_t swap_u_int32_t(u_int32_t t) {
  u_int32_t temp1, temp2;
  temp1 = ((t) << (16)) | ((t) >> (32 - (16)));
  temp2 = temp1 >> 8;
  temp1 &= 0x00ff00ff;
  temp2 &= 0x00ff00ff;
  temp1 <<= 8;
  return temp1 | temp2;
}


x86 assembly (clang, -O0):
<swap_u_int32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff00ff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_u_int32_t>:
mov    %edi,%eax
shl    $0x10,%eax
sar    $0x10,%edi
or     %edi,%eax
bswap  %eax
ror    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @swap_u_int32_t(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = shl i32 %5, 16
%7 = load i32, i32* %2
%8 = ashr i32 %7, 16
%9 = or i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = ashr i32 %10, 8
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = and i32 %12, 16711935
store i32 %13, i32* %3
%14 = load i32, i32* %4
%15 = and i32 %14, 16711935
store i32 %15, i32* %4
%16 = load i32, i32* %3
%17 = shl i32 %16, 8
store i32 %17, i32* %3
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = or i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @swap_u_int32_t(i32 %0) {
%2 = shl i32 %0, 16
%3 = ashr i32 %0, 16
%4 = or i32 %2, %3
%5 = lshr i32 %4, 8
%6 = and i32 %5, 16711935
%7 = shl i32 %4, 8
%8 = and i32 %7, -16711936
%9 = or i32 %8, %6
ret i32 %9
}
void mumps_thread_affinity_return() {}


x86 assembly (clang, -O0):
<mumps_thread_affinity_return>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mumps_thread_affinity_return>:
ret

LLVM IR (-O0):
define void @mumps_thread_affinity_return() {
ret void
}

LLVM IR (-O2):
define void @mumps_thread_affinity_return() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x99() {
  Assert_real((isalnum(153) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              770, ("isalnum should be 0 for 0x99"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x99>:
push   %rbp
mov    %rsp,%rbp
mov    $0x99,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x302,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x99>:
push   %rax
mov    $0x99,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x302,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x99\00"
define void @t_isalnum_0x99() {
%1 = call i64 @isalnum(i32 153)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 770, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x99\00"
define void @t_isalnum_0x99() {
%1 = tail call i64 @isalnum(i32 153)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 770, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int rfid_pn532_readack();
int /*<<< orphan*/ rfid_pn532_waitready(int /*<<< orphan*/);
int /*<<< orphan*/ rfid_pn532_write_command(int /*<<< orphan*/ *,
                                            int /*<<< orphan*/);
bool rfid_pn532_send_command_check_ack(uint8_t *cmd, uint8_t cmdlen,
                                       uint16_t timeout) {
  rfid_pn532_write_command(cmd, cmdlen);
  if (!rfid_pn532_waitready(timeout)) {
    return false;
  }
  return rfid_pn532_readack();
}


x86 assembly (clang, -O0):
<rfid_pn532_send_command_check_ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1050 <rfid_pn532_write_command@plt>
mov    -0x18(%rbp),%edi
call   1040 <rfid_pn532_waitready@plt>
cmp    $0x0,%eax
jne    116b <rfid_pn532_send_command_check_ack+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1175 <rfid_pn532_send_command_check_ack+0x45>
mov    $0x0,%al
call   1030 <rfid_pn532_readack@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfid_pn532_send_command_check_ack>:
push   %rbx
mov    %edx,%ebx
call   1050 <rfid_pn532_write_command@plt>
mov    %ebx,%edi
call   1040 <rfid_pn532_waitready@plt>
test   %eax,%eax
je     114b <rfid_pn532_send_command_check_ack+0x1b>
xor    %eax,%eax
pop    %rbx
jmp    1030 <rfid_pn532_readack@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rfid_pn532_send_command_check_ack(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = call i32 @rfid_pn532_write_command(i32* %8, i32 %9)
%11 = load i32, i32* %7
%12 = call i32 @rfid_pn532_waitready(i32 %11)
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %3
store i32 0, i32* %4
br label %17
15: ; preds = %3
%16 = call i32 (...) @rfid_pn532_readack()
store i32 %16, i32* %4
br label %17
17: ; preds = %15, %14
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @rfid_pn532_send_command_check_ack(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @rfid_pn532_write_command(i32* %0, i32 %1)
%5 = tail call i32 @rfid_pn532_waitready(i32 %2)
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i32 (...) @rfid_pn532_readack()
br label %9
9: ; preds = %3, %7
%10 = phi i32 [ %8, %7 ], [ 0, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ handle_34(int /*<<< orphan*/);
int gen_34() { handle_34(0); }


x86 assembly (clang, -O0):
<gen_34>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <handle_34@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_34>:
xor    %edi,%edi
jmp    1030 <handle_34@plt>

LLVM IR (-O0):
define i32 @gen_34() {
%1 = alloca i32
%2 = call i32 @handle_34(i32 0)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @gen_34() {
%1 = tail call i32 @handle_34(i32 0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ pushNumber(int /*<<< orphan*/);
int /*<<< orphan*/ systemheight();
void basSystemHeight() { pushNumber(systemheight()); }


x86 assembly (clang, -O0):
<basSystemHeight>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <systemheight@plt>
mov    %eax,%edi
call   1040 <pushNumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<basSystemHeight>:
push   %rax
xor    %eax,%eax
call   1030 <systemheight@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <pushNumber@plt>

LLVM IR (-O0):
define void @basSystemHeight() {
%1 = call i32 (...) @systemheight()
%2 = call i32 @pushNumber(i32 %1)
ret void
}

LLVM IR (-O2):
define void @basSystemHeight() {
%1 = tail call i32 (...) @systemheight()
%2 = tail call i32 @pushNumber(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ CLIENT;

/* Variables and functions */
char *clnt_sperror(int /*<<< orphan*/ *, char const *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void clnt_perror(CLIENT *rpch, const char *s) {
  (void)fprintf(stderr, "%s\n", clnt_sperror(rpch, s));
}


x86 assembly (clang, -O0):
<clnt_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <clnt_sperror@plt>
mov    -0x14(%rbp),%edi
mov    %rax,%rdx
lea    0xeaa(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clnt_perror>:
push   %rbx
mov    0x2eb8(%rip),%rax
mov    (%rax),%ebx
call   1040 <clnt_sperror@plt>
lea    0xeca(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @clnt_perror(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i32*, i32** %3
%7 = load i8*, i8** %4
%8 = call i8* @clnt_sperror(i32* %6, i8* %7)
%9 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @clnt_perror(i32* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i8* @clnt_sperror(i32* %0, i8* %1)
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CheckRunningInMainThread(char *);
void GetXOPIndString(char *text, int strID, int index) {
  *text = 0;
  if (!CheckRunningInMainThread("GetXOPIndString"))
    return;
}


x86 assembly (clang, -O0):
<GetXOPIndString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
lea    0xed0(%rip),%rdi
call   1030 <CheckRunningInMainThread@plt>
cmp    $0x0,%eax
jne    1143 <GetXOPIndString+0x33>
jmp    1143 <GetXOPIndString+0x33>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetXOPIndString>:
movb   $0x0,(%rdi)
lea    0xee6(%rip),%rdi
jmp    1030 <CheckRunningInMainThread@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"GetXOPIndString\00"
define void @GetXOPIndString(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
store i8 0, i8* %7
%8 = call i32 @CheckRunningInMainThread(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %3
br label %11
11: ; preds = %10, %3
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"GetXOPIndString\00"
define void @GetXOPIndString(i8* nocapture writeonly %0, i32 %1, i32 %2) {
store i8 0, i8* %0
%4 = tail call i32 @CheckRunningInMainThread(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ sub_image;
};
struct TYPE_4__ {
  TYPE_1__ f;
};
typedef TYPE_2__ XImage;

/* Variables and functions */
void *get_XImage_f_sub_image(void *_p) {
  return (void *)((XImage *)_p)->f.sub_image;
}


x86 assembly (clang, -O0):
<get_XImage_f_sub_image>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XImage_f_sub_image>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i8* @get_XImage_f_sub_image(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @get_XImage_f_sub_image(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ glIndexd(double);
void Indexd(double v) { glIndexd(v); }


x86 assembly (clang, -O0):
<Indexd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <glIndexd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Indexd>:
jmp    1030 <glIndexd@plt>

LLVM IR (-O0):
define void @Indexd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @glIndexd(double %3)
ret void
}

LLVM IR (-O2):
define void @Indexd(double %0) {
%2 = tail call i32 @glIndexd(double %0)
ret void
}
/* Variables and functions */
long long atoll(char const *);
int atoiNoCap(const char *s) {
  long long int l;
  union {
    unsigned int u;
    signed int i;
  } retval;
  l = atoll(s);
  if (l < 0) {
    retval.i = (int)l;
  } else {
    retval.u = (unsigned int)l;
  }
  return retval.i;
}


x86 assembly (clang, -O0):
<atoiNoCap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoll@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1140 <atoiNoCap+0x30>
mov    -0x10(%rbp),%rax
mov    %eax,-0x18(%rbp)
jmp    1147 <atoiNoCap+0x37>
mov    -0x10(%rbp),%rax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoiNoCap>:
jmp    1030 <atoll@plt>

LLVM IR (-O0):
%union.anon = type { i32 }
define i32 @atoiNoCap(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca %union.anon
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @atoll(i8* %5)
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i64, i64* %3
%11 = trunc i64 %10 to i32
%12 = bitcast %union.anon* %4 to i32*
store i32 %11, i32* %12
br label %17
13: ; preds = %1
%14 = load i64, i64* %3
%15 = trunc i64 %14 to i32
%16 = bitcast %union.anon* %4 to i32*
store i32 %15, i32* %16
br label %17
17: ; preds = %13, %9
%18 = bitcast %union.anon* %4 to i32*
%19 = load i32, i32* %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @atoiNoCap(i8* nocapture %0) {
%2 = tail call i64 @atoll(i8* %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) { printf("hello world"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}