xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ check(int);
void test(int a, int b) { check((a ? 1 : 0) | (b ? 2 : 0)); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
xor    %edi,%edi
mov    $0x1,%eax
cmp    $0x0,%ecx
cmovne %eax,%edi
mov    -0x8(%rbp),%edx
xor    %eax,%eax
mov    $0x2,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
or     %eax,%edi
call   1030 <check@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
test   %esi,%esi
setne  %al
xor    %ecx,%ecx
test   %edi,%edi
setne  %cl
lea    (%rcx,%rax,2),%edi
jmp    1030 <check@plt>

LLVM IR (-O0):
define void @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 1, i32 0
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 2, i32 0
%13 = or i32 %8, %12
%14 = call i32 @check(i32 %13)
ret void
}

LLVM IR (-O2):
define void @test(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
%4 = zext i1 %3 to i32
%5 = icmp eq i32 %1, 0
%6 = select i1 %5, i32 0, i32 2
%7 = or i32 %6, %4
%8 = tail call i32 @check(i32 %7)
ret void
}
void i2d_ASN1_GENERALSTRING(void) {}


x86 assembly (clang, -O0):
<i2d_ASN1_GENERALSTRING>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ASN1_GENERALSTRING>:
ret

LLVM IR (-O0):
define void @i2d_ASN1_GENERALSTRING() {
ret void
}

LLVM IR (-O2):
define void @i2d_ASN1_GENERALSTRING() {
ret void
}
/* Variables and functions */
int strcmp_natural_uncasted(char *, char *);
int strcmp_natural(const void *s1, const void *s2) {
  return strcmp_natural_uncasted((char *)s1, (char *)s2);
}


x86 assembly (clang, -O0):
<strcmp_natural>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp_natural_uncasted@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_natural>:
jmp    1030 <strcmp_natural_uncasted@plt>

LLVM IR (-O0):
define i32 @strcmp_natural(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp_natural_uncasted(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcmp_natural(i8* %0, i8* %1) {
%3 = tail call i32 @strcmp_natural_uncasted(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hello(void) { printf("hello world\n"); }


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"hello world\0A\00"
define void @hello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"hello world\00"
define void @hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pic_remap();
void pic_initialize(void) { pic_remap(); }


x86 assembly (clang, -O0):
<pic_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pic_remap@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_initialize>:
xor    %eax,%eax
jmp    1030 <pic_remap@plt>

LLVM IR (-O0):
define void @pic_initialize() {
%1 = call i32 (...) @pic_remap()
ret void
}

LLVM IR (-O2):
define void @pic_initialize() {
%1 = tail call i32 (...) @pic_remap()
ret void
}
/* Type definitions */
typedef int uid_t;

/* Variables and functions */
int geteuid();
int test(void) {
  uid_t uid;
  uid = geteuid();
  return uid;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <geteuid@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
jmp    1030 <geteuid@plt>

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = call i32 (...) @geteuid()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @test() {
%1 = tail call i32 (...) @geteuid()
ret i32 %1
}
int ft_toupper(int c) {
  if (c >= 'a' && c <= 'z') {
    return (c - 32);
  }
  return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1129 <ft_toupper+0x29>
cmpl   $0x7a,-0x8(%rbp)
jg     1129 <ft_toupper+0x29>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <ft_toupper+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
int DFQ1(int *a) {
  if (!(*a))
    return 0;
  return DFQ1(a + 1) + 1;
}


x86 assembly (clang, -O0):
<DFQ1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
jne    1135 <DFQ1+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1148 <DFQ1+0x38>
mov    -0x10(%rbp),%rdi
add    $0x4,%rdi
call   1030 <DFQ1@plt>
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DFQ1>:
cmpl   $0x0,(%rdi)
je     111c <DFQ1+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpl   $0x0,0x4(%rdi,%rax,4)
lea    0x1(%rax),%rax
jne    1110 <DFQ1+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DFQ1(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %13
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = call i32 @DFQ1(i32* %10)
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %13
13: ; preds = %8, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @DFQ1(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32* [ %7, %4 ], [ %0, %1 ]
%6 = phi i32 [ %8, %4 ], [ 0, %1 ]
%7 = getelementptr inbounds i32, i32* %5, i64 1
%8 = add nuw nsw i32 %6, 1
%9 = load i32, i32* %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
void gcspy_arrayOutputBaseWrite(char *buffer, int v) {
  if (v > 127)
    v -= 256;
  *buffer = (char)v;
}


x86 assembly (clang, -O0):
<gcspy_arrayOutputBaseWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x7f,-0xc(%rbp)
jle    1120 <gcspy_arrayOutputBaseWrite+0x20>
mov    -0xc(%rbp),%eax
sub    $0x100,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcspy_arrayOutputBaseWrite>:
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @gcspy_arrayOutputBaseWrite(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 127
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 256
store i32 %9, i32* %4
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %4
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %3
store i8 %12, i8* %13
ret void
}

LLVM IR (-O2):
define void @gcspy_arrayOutputBaseWrite(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
ret void
}
/* Variables and functions */
void *my_memset(void *a, int c, size_t size) {
  char *str = (char *)a;
  size_t i = 0;
  while (i < size) {
    str[i] = (char)c;
    i = i + 1;
  }
  return (a);
}


x86 assembly (clang, -O0):
<my_memset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    114e <my_memset+0x4e>
mov    -0xc(%rbp),%eax
mov    %al,%dl
mov    -0x20(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    111f <my_memset+0x1f>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_memset>:
push   %rbx
mov    %rdi,%rbx
test   %rdx,%rdx
je     1121 <my_memset+0x11>
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @my_memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%9 = load i8*, i8** %4
store i8* %9, i8** %7
store i64 0, i64* %8
br label %10
10: ; preds = %14, %3
%11 = load i64, i64* %8
%12 = load i64, i64* %6
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %22
14: ; preds = %10
%15 = load i32, i32* %5
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %7
%18 = load i64, i64* %8
%19 = getelementptr inbounds i8, i8* %17, i64 %18
store i8 %16, i8* %19
%20 = load i64, i64* %8
%21 = add i64 %20, 1
store i64 %21, i64* %8
br label %10
22: ; preds = %10
%23 = load i8*, i8** %4
ret i8* %23
}

LLVM IR (-O2):
define i8* @my_memset(i8* returned writeonly %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
br label %7
7: ; preds = %5, %3
ret i8* %0
}
/* Variables and functions */
bool qlibc_is_threadsafe(void) { return false; }


x86 assembly (clang, -O0):
<qlibc_is_threadsafe>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qlibc_is_threadsafe>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @qlibc_is_threadsafe() {
ret i32 0
}

LLVM IR (-O2):
define i32 @qlibc_is_threadsafe() {
ret i32 0
}
/* Variables and functions */
int MI_return();
int MI2_return(void) { return MI_return(); }


x86 assembly (clang, -O0):
<MI2_return>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MI_return@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MI2_return>:
xor    %eax,%eax
jmp    1030 <MI_return@plt>

LLVM IR (-O0):
define i32 @MI2_return() {
%1 = call i32 (...) @MI_return()
ret i32 %1
}

LLVM IR (-O2):
define i32 @MI2_return() {
%1 = tail call i32 (...) @MI_return()
ret i32 %1
}
float Sleef_truncf(float x) { return __builtin_truncf(x); }


x86 assembly (clang, -O0):
<Sleef_truncf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <truncf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_truncf>:
jmp    1030 <truncf@plt>

LLVM IR (-O0):
define float @Sleef_truncf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.trunc.f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @Sleef_truncf(float %0) {
%2 = tail call float @llvm.trunc.f32(float %0)
ret float %2
}
int rk31sdk_get_sdio_wifi_voltage(void) {
  int voltage;
  voltage = 3000;
  return voltage;
}


x86 assembly (clang, -O0):
<rk31sdk_get_sdio_wifi_voltage>:
push   %rbp
mov    %rsp,%rbp
movl   $0xbb8,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rk31sdk_get_sdio_wifi_voltage>:
mov    $0xbb8,%eax
ret

LLVM IR (-O0):
define i32 @rk31sdk_get_sdio_wifi_voltage() {
%1 = alloca i32
store i32 3000, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @rk31sdk_get_sdio_wifi_voltage() {
ret i32 3000
}
int is_in_bound(int *arr, int size, int *ptr) {
  if (ptr >= arr && ptr <= (arr + size)) {
    return 0;
  } else
    return 1;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jb     1145 <is_in_bound+0x45>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
shl    $0x2,%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
ja     1145 <is_in_bound+0x45>
movl   $0x0,-0x4(%rbp)
jmp    114c <is_in_bound+0x4c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
cmp    %rdi,%rdx
setb   %al
movslq %esi,%rcx
lea    (%rdi,%rcx,4),%rcx
cmp    %rdx,%rcx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i32*, i32** %7
%9 = load i32*, i32** %5
%10 = icmp uge i32* %8, %9
br i1 %10, label %11, label %19
11: ; preds = %3
%12 = load i32*, i32** %7
%13 = load i32*, i32** %5
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = icmp ule i32* %12, %16
br i1 %17, label %18, label %19
18: ; preds = %11
store i32 0, i32* %4
br label %20
19: ; preds = %11, %3
store i32 1, i32* %4
br label %20
20: ; preds = %19, %18
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* readnone %0, i32 %1, i32* readnone %2) {
%4 = icmp ult i32* %2, %0
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = icmp ult i32* %6, %2
%8 = select i1 %4, i1 true, i1 %7
%9 = zext i1 %8 to i32
ret i32 %9
}
int LowByte(int i) { return (i & 0xff); }


x86 assembly (clang, -O0):
<LowByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LowByte>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @LowByte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
ret i32 %4
}

LLVM IR (-O2):
define i32 @LowByte(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
/* Type definitions */
typedef int index;

/* Variables and functions */
size_t bnode_ref(size_t index) { return (((index) + 1) << 1); }


x86 assembly (clang, -O0):
<bnode_ref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
shl    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bnode_ref>:
lea    (%rdi,%rdi,1),%rax
add    $0x2,%rax
ret

LLVM IR (-O0):
define i64 @bnode_ref(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 1
%5 = shl i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @bnode_ref(i64 %0) {
%2 = shl i64 %0, 1
%3 = add i64 %2, 2
ret i64 %3
}
void ff_hevc_put_hevc_bi_qpel_h24_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_h24_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_h24_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_h24_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_h24_10_avx2() {
ret void
}
/* Type definitions */
struct ripple_random {
  int dummy;
};

/* Variables and functions */
scalar_t__ UINT_MAX;
double ripple_random_uint32(struct ripple_random *);
double ripple_random_double(struct ripple_random *rrand) {
  return ripple_random_uint32(rrand) / (double)UINT_MAX;
}


x86 assembly (clang, -O0):
<ripple_random_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ripple_random_uint32@plt>
mov    0x2ebc(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ripple_random_double>:
push   %rax
call   1030 <ripple_random_uint32@plt>
mov    0x2ecb(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.ripple_random = type { i32 }
@UINT_MAX = global i64 0
define double @ripple_random_double(%struct.ripple_random* %0) {
%2 = alloca %struct.ripple_random*
store %struct.ripple_random* %0, %struct.ripple_random** %2
%3 = load %struct.ripple_random*, %struct.ripple_random** %2
%4 = call double @ripple_random_uint32(%struct.ripple_random* %3)
%5 = load i64, i64* @UINT_MAX
%6 = sitofp i64 %5 to double
%7 = fdiv double %4, %6
ret double %7
}

LLVM IR (-O2):
%struct.ripple_random = type { i32 }
@UINT_MAX = global i64 0
define double @ripple_random_double(%struct.ripple_random* %0) {
%2 = tail call double @ripple_random_uint32(%struct.ripple_random* %0)
%3 = load i64, i64* @UINT_MAX
%4 = sitofp i64 %3 to double
%5 = fdiv double %2, %4
ret double %5
}
/* Variables and functions */
int pause();
int test(void) {
  int result;
  result = pause();
  return result;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <pause@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
jmp    1030 <pause@plt>

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = call i32 (...) @pause()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @test() {
%1 = tail call i32 (...) @pause()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xdf() {
  Assert_real((isascii(223) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              1120, ("isascii should be 0 for 0xdf"));
}


x86 assembly (clang, -O0):
<t_isascii_0xdf>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdf,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x460,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xdf>:
push   %rax
mov    $0xdf,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x460,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xdf\00"
define void @t_isascii_0xdf() {
%1 = call i64 @isascii(i32 223)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xdf\00"
define void @t_isascii_0xdf() {
%1 = tail call i64 @isascii(i32 223)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int printf() {}


x86 assembly (clang, -O0):
<printf>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<printf>:
ret

LLVM IR (-O0):
define i32 @printf() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @printf() {
ret i32 undef
}
/* Variables and functions */
scalar_t__ grpc_is_epollexclusive_available();
int main(int argc, char **argv) {
  return grpc_is_epollexclusive_available() ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <grpc_is_epollexclusive_available@plt>
mov    %rax,%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <grpc_is_epollexclusive_available@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @grpc_is_epollexclusive_available()
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @grpc_is_epollexclusive_available()
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int bits_clrb(uint8_t *vec, size_t size, uint8_t bit) {
  if (size <= (bit >> 3))
    return -1;
  *(vec + (bit >> 3)) &= (uint8_t)(~(1 << (bit & 0x07)));
  return 1;
}


x86 assembly (clang, -O0):
<bits_clrb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
cmp    %rcx,%rax
ja     1131 <bits_clrb+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    115b <bits_clrb+0x5b>
mov    -0x1c(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bits_clrb>:
mov    %edx,%eax
sar    $0x3,%eax
movslq %eax,%r8
mov    $0xffffffff,%eax
cmp    %rsi,%r8
jae    1127 <bits_clrb+0x27>
and    $0x7,%dl
mov    $0xfffffffe,%eax
mov    %edx,%ecx
rol    %cl,%eax
and    %eax,(%rdi,%r8,4)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bits_clrb(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = load i32, i32* %7
%10 = ashr i32 %9, 3
%11 = sext i32 %10 to i64
%12 = icmp ule i64 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %26
14: ; preds = %3
%15 = load i32, i32* %7
%16 = and i32 %15, 7
%17 = shl i32 1, %16
%18 = xor i32 %17, -1
%19 = load i32*, i32** %5
%20 = load i32, i32* %7
%21 = ashr i32 %20, 3
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %19, i64 %22
%24 = load i32, i32* %23
%25 = and i32 %24, %18
store i32 %25, i32* %23
store i32 1, i32* %4
br label %26
26: ; preds = %14, %13
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @bits_clrb(i32* nocapture %0, i64 %1, i32 %2) {
%4 = ashr i32 %2, 3
%5 = sext i32 %4 to i64
%6 = icmp ult i64 %5, %1
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = and i32 %2, 7
%9 = shl nuw nsw i32 1, %8
%10 = xor i32 %9, -1
%11 = getelementptr inbounds i32, i32* %0, i64 %5
%12 = load i32, i32* %11
%13 = and i32 %12, %10
store i32 %13, i32* %11
br label %14
14: ; preds = %3, %7
%15 = phi i32 [ 1, %7 ], [ -1, %3 ]
ret i32 %15
}
/* Variables and functions */
int fill_normal_config_req(unsigned char *, int, int, int,
                           int /*<<< orphan*/ *);
int fill_auth_method_req(unsigned char *buf) {
  return fill_normal_config_req(buf, 0x20, 0xc, 0x0, NULL);
}


x86 assembly (clang, -O0):
<fill_auth_method_req>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x20,%esi
mov    $0xc,%edx
xor    %ecx,%ecx
xor    %eax,%eax
mov    %eax,%r8d
call   1030 <fill_normal_config_req@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_auth_method_req>:
mov    $0x20,%esi
mov    $0xc,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <fill_normal_config_req@plt>

LLVM IR (-O0):
define i32 @fill_auth_method_req(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fill_normal_config_req(i8* %3, i32 32, i32 12, i32 0, i32* null)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fill_auth_method_req(i8* %0) {
%2 = tail call i32 @fill_normal_config_req(i8* %0, i32 32, i32 12, i32 0, i32* null)
ret i32 %2
}
int test_imm_24int64_lowword_mem(long long *val) {
  return ((*val) & (0x24 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_24int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x24,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_24int64_lowword_mem>:
testb  $0x24,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_24int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 36
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_24int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 36
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int /*<<< orphan*/);
void TOSH_CLR_RADIO_CCA_PIN() { clear_io_bit(-4, 0); }


x86 assembly (clang, -O0):
<TOSH_CLR_RADIO_CCA_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffc,%edi
xor    %esi,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_CLR_RADIO_CCA_PIN>:
mov    $0xfffffffc,%edi
xor    %esi,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_CLR_RADIO_CCA_PIN() {
%1 = call i32 @clear_io_bit(i32 -4, i32 0)
ret void
}

LLVM IR (-O2):
define void @TOSH_CLR_RADIO_CCA_PIN() {
%1 = tail call i32 @clear_io_bit(i32 -4, i32 0)
ret void
}
void glAlphaFuncx(void) { return; }


x86 assembly (clang, -O0):
<glAlphaFuncx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glAlphaFuncx>:
ret

LLVM IR (-O0):
define void @glAlphaFuncx() {
ret void
}

LLVM IR (-O2):
define void @glAlphaFuncx() {
ret void
}
void TransposeUVWx8_C() {}


x86 assembly (clang, -O0):
<TransposeUVWx8_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TransposeUVWx8_C>:
ret

LLVM IR (-O0):
define void @TransposeUVWx8_C() {
ret void
}

LLVM IR (-O2):
define void @TransposeUVWx8_C() {
ret void
}
void yy_2_TableRowBody(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_2_TableRowBody>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_2_TableRowBody>:
ret

LLVM IR (-O0):
define void @yy_2_TableRowBody(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_2_TableRowBody(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430InterruptP__Port12__default__fired();
void HplMsp430InterruptP__Port12__fired(void) {
  HplMsp430InterruptP__Port12__default__fired();
}


x86 assembly (clang, -O0):
<HplMsp430InterruptP__Port12__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430InterruptP__Port12__default__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430InterruptP__Port12__fired>:
xor    %eax,%eax
jmp    1030 <HplMsp430InterruptP__Port12__default__fired@plt>

LLVM IR (-O0):
define void @HplMsp430InterruptP__Port12__fired() {
%1 = call i32 (...) @HplMsp430InterruptP__Port12__default__fired()
ret void
}

LLVM IR (-O2):
define void @HplMsp430InterruptP__Port12__fired() {
%1 = tail call i32 (...) @HplMsp430InterruptP__Port12__default__fired()
ret void
}
long CDRreadTrack(unsigned char *time) { return -1; }


x86 assembly (clang, -O0):
<CDRreadTrack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CDRreadTrack>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @CDRreadTrack(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i64 -1
}

LLVM IR (-O2):
define i64 @CDRreadTrack(i8* nocapture readnone %0) {
ret i64 -1
}
int getRightInput(void) { return 0; }


x86 assembly (clang, -O0):
<getRightInput>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRightInput>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getRightInput() {
ret i32 0
}

LLVM IR (-O2):
define i32 @getRightInput() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_BIT_STRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_BIT_STRING_it;
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int i2d_ASN1_BIT_STRING(ASN1_BIT_STRING *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &ASN1_BIT_STRING_it);
}


x86 assembly (clang, -O0):
<i2d_ASN1_BIT_STRING>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ASN1_BIT_STRING>:
mov    0x2ec9(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@ASN1_BIT_STRING_it = global i32 0
define i32 @i2d_ASN1_BIT_STRING(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @ASN1_BIT_STRING_it)
ret i32 %7
}

LLVM IR (-O2):
@ASN1_BIT_STRING_it = global i32 0
define i32 @i2d_ASN1_BIT_STRING(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @ASN1_BIT_STRING_it)
ret i32 %3
}
/* Variables and functions */
double asin(double);
double SDL_asin(double val) { return asin(val); }


x86 assembly (clang, -O0):
<SDL_asin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <asin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_asin>:
jmp    1030 <asin@plt>

LLVM IR (-O0):
define double @SDL_asin(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @asin(double %3)
ret double %4
}

LLVM IR (-O2):
define double @SDL_asin(double %0) {
%2 = tail call double @asin(double %0)
ret double %2
}
int isSurrogate(unsigned int codePoint) {
  return 0xD800 <= codePoint && codePoint <= 0xDFFF;
}


x86 assembly (clang, -O0):
<isSurrogate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0xd800,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
ja     1127 <isSurrogate+0x27>
cmpl   $0xdfff,-0x4(%rbp)
setbe  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSurrogate>:
and    $0xfffff800,%edi
xor    %eax,%eax
cmp    $0xd800,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isSurrogate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ule i32 55296, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 57343
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isSurrogate(i32 %0) {
%2 = and i32 %0, -2048
%3 = icmp eq i32 %2, 55296
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ UP3D_GetParameter(int);
int32_t UP3D_GetCheckLightKey() { return UP3D_GetParameter(0x34); }


x86 assembly (clang, -O0):
<UP3D_GetCheckLightKey>:
push   %rbp
mov    %rsp,%rbp
mov    $0x34,%edi
call   1030 <UP3D_GetParameter@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UP3D_GetCheckLightKey>:
mov    $0x34,%edi
jmp    1030 <UP3D_GetParameter@plt>

LLVM IR (-O0):
define i32 @UP3D_GetCheckLightKey() {
%1 = call i32 @UP3D_GetParameter(i32 52)
ret i32 %1
}

LLVM IR (-O2):
define i32 @UP3D_GetCheckLightKey() {
%1 = tail call i32 @UP3D_GetParameter(i32 52)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int open(char const *, int, int /*<<< orphan*/);
int octave_open_wrapper(const char *nm, int flags, mode_t mode) {
  return open(nm, flags, mode);
}


x86 assembly (clang, -O0):
<octave_open_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_open_wrapper>:
jmp    1030 <open@plt>

LLVM IR (-O0):
define i32 @octave_open_wrapper(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @open(i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @octave_open_wrapper(i8* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @open(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
unsigned char f32(unsigned char x, long int y) {
  return (x >> (8 * sizeof(unsigned char) - y)) ^ (x << y);
}


x86 assembly (clang, -O0):
<f32>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
sar    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f32>:
mov    $0x8,%cl
sub    %sil,%cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f32(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 8, %7
%9 = trunc i64 %8 to i32
%10 = ashr i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = shl i32 %12, %14
%16 = xor i32 %10, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f32(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 8, %4
%6 = lshr i32 %3, %5
%7 = shl i32 %3, %4
%8 = xor i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
int tst_audit4_aux(void) { return 77; }


x86 assembly (clang, -O0):
<tst_audit4_aux>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tst_audit4_aux>:
mov    $0x4d,%eax
ret

LLVM IR (-O0):
define i32 @tst_audit4_aux() {
ret i32 77
}

LLVM IR (-O2):
define i32 @tst_audit4_aux() {
ret i32 77
}
int test_18(unsigned char x, int y, int z) { return ((x >> 2) & 16) == 0; }


x86 assembly (clang, -O0):
<test_18>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x2,%eax
and    $0x10,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_18>:
xor    %eax,%eax
test   $0x40,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @test_18(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = ashr i32 %8, 2
%10 = and i32 %9, 16
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_18(i8 zeroext %0, i32 %1, i32 %2) {
%4 = lshr i8 %0, 6
%5 = and i8 %4, 1
%6 = xor i8 %5, 1
%7 = zext i8 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int i;
  i = 0;
  int j;
  j = 0;
  while (i < 5) {
    i = i + 1;
    j = 0;
  }
  assert(j == 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    114c <main+0x3c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
jmp    112d <main+0x1d>
cmpl   $0x0,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
store i32 0, i32* %3
br label %4
10: ; preds = %4
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
void null_audio_free(void *data) { (void)data; }


x86 assembly (clang, -O0):
<null_audio_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_audio_free>:
ret

LLVM IR (-O0):
define void @null_audio_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @null_audio_free(i8* nocapture %0) {
ret void
}
int sync_oem4(unsigned char *buff, unsigned char data) {
  buff[0] = buff[1];
  buff[1] = buff[2];
  buff[2] = data;
  return buff[0] == 0xAA && buff[1] == 0x44 && buff[2] == 0x12;
}


x86 assembly (clang, -O0):
<sync_oem4>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
xor    %eax,%eax
cmp    $0xaa,%ecx
mov    %al,-0xa(%rbp)
jne    1172 <sync_oem4+0x72>
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%ecx
xor    %eax,%eax
cmp    $0x44,%ecx
mov    %al,-0xa(%rbp)
jne    1172 <sync_oem4+0x72>
mov    -0x8(%rbp),%rax
movzbl 0x2(%rax),%eax
cmp    $0x12,%eax
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_oem4>:
mov    0x1(%rdi),%al
mov    0x2(%rdi),%cl
mov    %al,(%rdi)
mov    %cl,0x1(%rdi)
mov    %sil,0x2(%rdi)
xor    $0xaa,%al
xor    $0x44,%cl
or     %al,%cl
xor    $0x12,%sil
xor    %eax,%eax
or     %cl,%sil
sete   %al
ret

LLVM IR (-O0):
define i32 @sync_oem4(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 2
%12 = load i8, i8* %11
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %14
%15 = load i8, i8* %4
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 2
store i8 %15, i8* %17
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 0
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = icmp eq i32 %21, 170
br i1 %22, label %23, label %35
23: ; preds = %2
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i64 1
%26 = load i8, i8* %25
%27 = zext i8 %26 to i32
%28 = icmp eq i32 %27, 68
br i1 %28, label %29, label %35
29: ; preds = %23
%30 = load i8*, i8** %3
%31 = getelementptr inbounds i8, i8* %30, i64 2
%32 = load i8, i8* %31
%33 = zext i8 %32 to i32
%34 = icmp eq i32 %33, 18
br label %35
35: ; preds = %29, %23, %2
%36 = phi i1 [ false, %23 ], [ false, %2 ], [ %34, %29 ]
%37 = zext i1 %36 to i32
ret i32 %37
}

LLVM IR (-O2):
define i32 @sync_oem4(i8* nocapture %0, i8 zeroext %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
store i8 %4, i8* %0
%5 = getelementptr inbounds i8, i8* %0, i64 2
%6 = load i8, i8* %5
store i8 %6, i8* %3
store i8 %1, i8* %5
%7 = icmp eq i8 %4, -86
%8 = icmp eq i8 %6, 68
%9 = select i1 %7, i1 %8, i1 false
%10 = icmp eq i8 %1, 18
%11 = and i1 %10, %9
%12 = zext i1 %11 to i32
ret i32 %12
}
unsigned char unit2code(int unit) {
  static unsigned char code[] = {6, 14, 2, 10, 1, 9, 5, 13,
                                 7, 15, 3, 11, 0, 8, 4, 12};
  return (unit > 0 && unit < 17) ? code[unit - 1] : 0xff;
}


x86 assembly (clang, -O0):
<unit2code>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1137 <unit2code+0x37>
cmpl   $0x11,-0x4(%rbp)
jge    1137 <unit2code+0x37>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
movslq %eax,%rcx
lea    0x2f05(%rip),%rax
movzbl (%rax,%rcx,1),%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <unit2code+0x44>
mov    $0xff,%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <unit2code+0x44>
mov    -0x8(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unit2code>:
add    $0xffffffff,%edi
mov    $0xff,%al
cmp    $0xf,%edi
ja     1116 <unit2code+0x16>
mov    %edi,%eax
lea    0xeed(%rip),%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
@unit2code.code = internal global [16 x i8] c"\06\0E\02\0A\01\09\05\0D\07\0F\03\0B\00\08\04\0C"
define zeroext i8 @unit2code(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %15
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 17
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [16 x i8], [16 x i8]* @unit2code.code, i64 0, i64 %11
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
br label %16
15: ; preds = %5, %1
br label %16
16: ; preds = %15, %8
%17 = phi i32 [ %14, %8 ], [ 255, %15 ]
%18 = trunc i32 %17 to i8
ret i8 %18
}

LLVM IR (-O2):
@unit2code.code = internal unnamed_addr constant [16 x i8] c"\06\0E\02\0A\01\09\05\0D\07\0F\03\0B\00\08\04\0C"
define zeroext i8 @unit2code(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 16
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = zext i32 %2 to i64
%6 = getelementptr inbounds [16 x i8], [16 x i8]* @unit2code.code, i64 0, i64 %5
%7 = load i8, i8* %6
br label %8
8: ; preds = %1, %4
%9 = phi i8 [ %7, %4 ], [ -1, %1 ]
ret i8 %9
}
int cvtfloat(void) {
  float f;
  unsigned char c = 0xff;
  f = c;
  return f;
}


x86 assembly (clang, -O0):
<cvtfloat>:
push   %rbp
mov    %rsp,%rbp
movb   $0xff,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvtfloat>:
mov    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @cvtfloat() {
%1 = alloca float
%2 = alloca i8
store i8 -1, i8* %2
%3 = load i8, i8* %2
%4 = uitofp i8 %3 to float
store float %4, float* %1
%5 = load float, float* %1
%6 = fptosi float %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @cvtfloat() {
ret i32 255
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
__attribute__((regparm(0))) __attribute__((noreturn)) void
deputy_fail_noreturn_fast(void) {
  fprintf(stderr, "Deputy check failed; execution aborted.\n");
  fprintf(stderr, "Detailed error report suppressed (--deputyFastChecks).\n");
  exit(1);
}


x86 assembly (clang, -O0):
<deputy_fail_noreturn_fast>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<deputy_fail_noreturn_fast>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xeea(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [41 x i8] c"Deputy check failed; execution aborted.\0A\00"
@.str.1 = [56 x i8] c"Detailed error report suppressed (--deputyFastChecks).\0A\00"
define void @deputy_fail_noreturn_fast() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [41 x i8] c"Deputy check failed; execution aborted.\0A\00"
@.str.1 = [56 x i8] c"Detailed error report suppressed (--deputyFastChecks).\0A\00"
define void @deputy_fail_noreturn_fast() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
}
long double test_cosl(long double x) { return __builtin_cosl(x); }


x86 assembly (clang, -O0):
<test_cosl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <cosl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_cosl>:
jmp    1030 <cosl@plt>

LLVM IR (-O0):
define x86_fp80 @test_cosl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @cosl(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @test_cosl(x86_fp80 %0) {
%2 = tail call x86_fp80 @cosl(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int /*<<< orphan*/ malloc(int);
int malloc_fail() {
  malloc(1000000);
  return 0;
}


x86 assembly (clang, -O0):
<malloc_fail>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf4240,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_fail>:
push   %rax
mov    $0xf4240,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @malloc_fail() {
%1 = call i32 @malloc(i32 1000000)
ret i32 0
}

LLVM IR (-O2):
define i32 @malloc_fail() {
%1 = tail call i32 @malloc(i32 1000000)
ret i32 0
}
unsigned long _dl_linux_resolver(unsigned long got_offset, unsigned long *got) {
  return 0;
}


x86 assembly (clang, -O0):
<_dl_linux_resolver>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dl_linux_resolver>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @_dl_linux_resolver(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
ret i64 0
}

LLVM IR (-O2):
define i64 @_dl_linux_resolver(i64 %0, i64* nocapture readnone %1) {
ret i64 0
}