xunge/DecIR huggingface dataset:
unsigned int hash(const char *s) {
  unsigned int hashval;
  for (hashval = 0; *s != '\0'; s++)
    hashval = *s + 31 * hashval;
  return hashval % 256;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1140 <hash+0x40>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
imul   $0x1f,-0xc(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <hash+0x2d>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movzbl %cl,%ecx
mov    %eax,%edx
shl    $0x5,%edx
sub    %eax,%edx
mov    %edx,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
movzbl %al,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = load i32, i32* %3
%14 = mul i32 31, %13
%15 = add i32 %12, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %9
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
%21 = urem i32 %20, 256
ret i32 %21
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = zext i8 %5 to i32
%9 = mul i32 %6, 31
%10 = add i32 %9, %8
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = and i32 %10, 255
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
int rl_copy_backward_word(count, key)
int count, key;
{
  if (count < 0)
    return (rl_copy_forward_word(-count, key));
  return (_rl_copy_word_as_kill(count, -1));
}


x86 assembly (clang, -O0):
<rl_copy_backward_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    114f <rl_copy_backward_word+0x2f>
xor    %edi,%edi
sub    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1040 <rl_copy_forward_word@plt>
mov    %eax,-0x4(%rbp)
jmp    1161 <rl_copy_backward_word+0x41>
mov    -0x8(%rbp),%edi
mov    $0xffffffff,%esi
mov    $0x0,%al
call   1030 <_rl_copy_word_as_kill@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rl_copy_backward_word>:
test   %edi,%edi
js     1130 <rl_copy_backward_word+0x10>
mov    $0xffffffff,%esi
xor    %eax,%eax
jmp    1030 <_rl_copy_word_as_kill@plt>
neg    %edi
xor    %eax,%eax
jmp    1040 <rl_copy_forward_word@plt>

LLVM IR (-O0):
define i32 @rl_copy_backward_word(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
%11 = load i32, i32* %5
%12 = call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_copy_forward_word to i32 (i32, i32, ...)*)(i32 %10, i32 %11)
store i32 %12, i32* %3
br label %16
13: ; preds = %2
%14 = load i32, i32* %4
%15 = call i32 (i32, i32, ...) bitcast (i32 (...)* @_rl_copy_word_as_kill to i32 (i32, i32, ...)*)(i32 %14, i32 -1)
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @rl_copy_backward_word(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = sub nsw i32 0, %0
%6 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_copy_forward_word to i32 (i32, i32, ...)*)(i32 %5, i32 %1)
br label %9
7: ; preds = %2
%8 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @_rl_copy_word_as_kill to i32 (i32, i32, ...)*)(i32 %0, i32 -1)
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ %6, %4 ], [ %8, %7 ]
ret i32 %10
}
/* Variables and functions */
int FIPS_mode(void) { return 0; }


x86 assembly (clang, -O0):
<FIPS_mode>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FIPS_mode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @FIPS_mode() {
ret i32 0
}

LLVM IR (-O2):
define i32 @FIPS_mode() {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ type;
};
typedef TYPE_1__ XConfigureRequestEvent;

/* Variables and functions */
int get_XConfigureRequestEvent_type(void *_p) {
  return (int)((XConfigureRequestEvent *)_p)->type;
}


x86 assembly (clang, -O0):
<get_XConfigureRequestEvent_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XConfigureRequestEvent_type>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XConfigureRequestEvent_type(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XConfigureRequestEvent_type(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __ctype_init();
char **__environ;
int /*<<< orphan*/ __libc_init(int, char **, char **);
void __libc_init_first(int argc, char *arg0, ...) {
  char **argv = &arg0, **envp = &argv[argc + 1];
  __environ = envp;
  __libc_init(argc, argv, envp);
  __ctype_init();
}


x86 assembly (clang, -O0):
<__libc_init_first>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x4(%rbp),%rcx
lea    0x8(%rax,%rcx,8),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    0x2ea5(%rip),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <__libc_init@plt>
xor    %eax,%eax
call   1030 <__ctype_init@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_init_first>:
push   %rax
mov    %rsi,(%rsp)
movslq %edi,%rdi
lea    (%rsp,%rdi,8),%rdx
add    $0x8,%rdx
mov    0x2ec1(%rip),%rax
mov    %rdx,(%rax)
mov    %rsp,%rsi
call   1040 <__libc_init@plt>
xor    %eax,%eax
call   1030 <__ctype_init@plt>
pop    %rax
ret

LLVM IR (-O0):
@__environ = global i8** null
define void @__libc_init_first(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i32 %0, i32* %3
store i8* %1, i8** %4
store i8** %4, i8*** %5
%7 = load i8**, i8*** %5
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8*, i8** %7, i64 %10
store i8** %11, i8*** %6
%12 = load i8**, i8*** %6
store i8** %12, i8*** @__environ
%13 = load i32, i32* %3
%14 = load i8**, i8*** %5
%15 = load i8**, i8*** %6
%16 = call i32 @__libc_init(i32 %13, i8** %14, i8** %15)
%17 = call i32 (...) @__ctype_init()
ret void
}

LLVM IR (-O2):
@__environ = global i8** null
define void @__libc_init_first(i32 %0, i8* %1, ...) {
%3 = alloca i8*
store i8* %1, i8** %3
%4 = add nsw i32 %0, 1
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8*, i8** %3, i64 %5
store i8** %6, i8*** @__environ
%7 = call i32 @__libc_init(i32 %0, i8** %3, i8** %6)
%8 = call i32 (...) @__ctype_init()
ret void
}
int do_527() { return 527; }


x86 assembly (clang, -O0):
<do_527>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_527>:
mov    $0x20f,%eax
ret

LLVM IR (-O0):
define i32 @do_527() {
ret i32 527
}

LLVM IR (-O2):
define i32 @do_527() {
ret i32 527
}
unsigned read_word(unsigned char *buf) { return buf[0] + (buf[1] << 8); }


x86 assembly (clang, -O0):
<read_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_word>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_word(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = add nsw i32 %6, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @read_word(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
ret i32 %8
}
void swap(int *array, int position_a, int position_b) {
  int aux;
  aux = array[position_a];
  array[position_a] = array[position_b];
  array[position_b] = aux;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
int test_imm_CEuint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xCE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CEuint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xce,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CEuint64_lowword_reg>:
test   $0xce,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CEuint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 206
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_CEuint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 206
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
double L1(double x) { return x; }


x86 assembly (clang, -O0):
<L1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<L1>:
ret

LLVM IR (-O0):
define double @L1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @L1(double returned %0) {
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, int);
void set_nonblocking(int fd) {
  int flag = fcntl(fd, F_GETFL, 0);
  fcntl(fd, F_SETFL, flag | O_NONBLOCK);
}


x86 assembly (clang, -O0):
<set_nonblocking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    0x2ea1(%rip),%rax
or     (%rax),%edx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_nonblocking>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    0x2eae(%rip),%rcx
mov    (%rcx),%esi
mov    0x2eb5(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%edx
pop    %rbx
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @set_nonblocking(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_GETFL
%6 = call i32 @fcntl(i32 %4, i32 %5, i32 0)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* @F_SETFL
%9 = load i32, i32* %3
%10 = load i32, i32* @O_NONBLOCK
%11 = or i32 %9, %10
%12 = call i32 @fcntl(i32 %7, i32 %8, i32 %11)
ret void
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @set_nonblocking(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 @fcntl(i32 %0, i32 %2, i32 0)
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %3
%7 = tail call i32 @fcntl(i32 %0, i32 %4, i32 %6)
ret void
}
void outb(unsigned short port, unsigned char value) {
  asm volatile("outb %b0,%w1" ::"a"(value), "d"(port));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    -0x2(%rbp),%dx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb ${0:b},${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 %1, i16 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ output_with_tab(char *);
gen_def_byte() { output_with_tab(".db\t"); }


x86 assembly (clang, -O0):
<gen_def_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <output_with_tab@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_def_byte>:
lea    0xee9(%rip),%rdi
jmp    1030 <output_with_tab@plt>

LLVM IR (-O0):
@.str = [5 x i8] c".db\09\00"
define i32 @gen_def_byte() {
%1 = alloca i32
%2 = call i32 @output_with_tab(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [5 x i8] c".db\09\00"
define i32 @gen_def_byte() {
%1 = tail call i32 @output_with_tab(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int exact_square(int number) {
  int divisor, no_exact_square = 1;
  for (divisor = 0; divisor <= number / 2; divisor++) {
    if (divisor * divisor == number) {
      no_exact_square = 0;
      break;
    } else {
      no_exact_square = 1;
    }
  }
  if (no_exact_square == 1)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
jg     1169 <exact_square+0x69>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    114f <exact_square+0x4f>
movl   $0x0,-0x10(%rbp)
jmp    1169 <exact_square+0x69>
movl   $0x1,-0x10(%rbp)
jmp    115b <exact_square+0x5b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <exact_square+0x15>
cmpl   $0x1,-0x10(%rbp)
jne    117f <exact_square+0x7f>
movl   $0x0,-0x4(%rbp)
jmp    1186 <exact_square+0x86>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
sar    %ecx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
mov    %eax,%edx
cmp    %ecx,%eax
jg     1122 <exact_square+0x22>
mov    %edx,%esi
imul   %edx,%esi
lea    0x1(%rdx),%eax
cmp    %edi,%esi
jne    1110 <exact_square+0x10>
xor    %eax,%eax
cmp    %ecx,%edx
setle  %al
ret

LLVM IR (-O0):
define i32 @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %5
store i32 0, i32* %4
br label %6
6: ; preds = %20, %1
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 2
%10 = icmp sle i32 %7, %9
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i32, i32* %4
%13 = load i32, i32* %4
%14 = mul nsw i32 %12, %13
%15 = load i32, i32* %3
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %11
store i32 0, i32* %5
br label %23
18: ; preds = %11
store i32 1, i32* %5
br label %19
19: ; preds = %18
br label %20
20: ; preds = %19
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %6
23: ; preds = %17, %6
%24 = load i32, i32* %5
%25 = icmp eq i32 %24, 1
br i1 %25, label %26, label %27
26: ; preds = %23
store i32 0, i32* %2
br label %28
27: ; preds = %23
store i32 1, i32* %2
br label %28
28: ; preds = %27, %26
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @exact_square(i32 %0) {
%2 = sdiv i32 %0, 2
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ 0, %1 ], [ %9, %3 ]
%5 = icmp sgt i32 %4, %2
%6 = mul nsw i32 %4, %4
%7 = icmp eq i32 %6, %0
%8 = select i1 %5, i1 true, i1 %7
%9 = add nuw nsw i32 %4, 1
br i1 %8, label %10, label %3
10: ; preds = %3
%11 = xor i1 %5, true
%12 = zext i1 %11 to i32
ret i32 %12
}
f_get_my_resident_time_(int *wu, int *wh, int *ws) {
  char *hostname;
  *wu = 0;
  *wh = 1800;
  *ws = 1800;
}


x86 assembly (clang, -O0):
<f_get_my_resident_time_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x708,(%rax)
mov    -0x20(%rbp),%rax
movl   $0x708,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_get_my_resident_time_>:
movl   $0x0,(%rdi)
movl   $0x708,(%rsi)
movl   $0x708,(%rdx)
ret

LLVM IR (-O0):
define i32 @f_get_my_resident_time_(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i8*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%9 = load i32*, i32** %5
store i32 0, i32* %9
%10 = load i32*, i32** %6
store i32 1800, i32* %10
%11 = load i32*, i32** %7
store i32 1800, i32* %11
%12 = load i32, i32* %4
ret i32 %12
}

LLVM IR (-O2):
define i32 @f_get_my_resident_time_(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
store i32 0, i32* %0
store i32 1800, i32* %1
store i32 1800, i32* %2
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ getenv(char *);
char *strdup(char *);
int /*<<< orphan*/ strncpy(char *, int /*<<< orphan*/, int);
char *filesystem_GetUserFileDir() {
  char programsdirbuf[300];
  strncpy(programsdirbuf, getenv("HOME"), 299);
  programsdirbuf[299] = 0;
  return strdup(programsdirbuf);
}


x86 assembly (clang, -O0):
<filesystem_GetUserFileDir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x140,%rsp
lea    -0x130(%rbp),%rax
mov    %rax,-0x138(%rbp)
lea    0xeb0(%rip),%rdi
call   1030 <getenv@plt>
mov    -0x138(%rbp),%rdi
mov    %eax,%esi
mov    $0x12b,%edx
call   1040 <strncpy@plt>
movb   $0x0,-0x5(%rbp)
lea    -0x130(%rbp),%rdi
call   1050 <strdup@plt>
add    $0x140,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesystem_GetUserFileDir>:
push   %rbx
sub    $0x130,%rsp
lea    0xec1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    %eax,%esi
mov    $0x12b,%edx
call   1040 <strncpy@plt>
movb   $0x0,0x12b(%rsp)
mov    %rbx,%rdi
call   1050 <strdup@plt>
add    $0x130,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"HOME\00"
define i8* @filesystem_GetUserFileDir() {
%1 = alloca [300 x i8]
%2 = getelementptr inbounds [300 x i8], [300 x i8]* %1, i64 0, i64 0
%3 = call i32 @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @strncpy(i8* %2, i32 %3, i32 299)
%5 = getelementptr inbounds [300 x i8], [300 x i8]* %1, i64 0, i64 299
store i8 0, i8* %5
%6 = getelementptr inbounds [300 x i8], [300 x i8]* %1, i64 0, i64 0
%7 = call i8* @strdup(i8* %6)
ret i8* %7
}

LLVM IR (-O2):
@.str = [5 x i8] c"HOME\00"
define noalias i8* @filesystem_GetUserFileDir() {
%1 = alloca [300 x i8]
%2 = getelementptr inbounds [300 x i8], [300 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @strncpy(i8* %2, i32 %3, i32 299)
%5 = getelementptr inbounds [300 x i8], [300 x i8]* %1, i64 0, i64 299
store i8 0, i8* %5
%6 = call i8* @strdup(i8* %2)
ret i8* %6
}
/* Type definitions */
typedef size_t uint64_t;
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t contains0(int64_t *arr, uint64_t len) {
  for (uint64_t i = 0; i < len; ++i) {
    if (arr[i] == 0) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<contains0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1158 <contains0+0x58>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
jne    1142 <contains0+0x42>
movq   $0x1,-0x8(%rbp)
jmp    1160 <contains0+0x60>
jmp    1147 <contains0+0x47>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <contains0+0x14>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<contains0>:
test   %rsi,%rsi
je     112c <contains0+0x2c>
cmpq   $0x0,(%rdi)
je     112f <contains0+0x2f>
mov    $0x1,%eax
mov    %rax,%rcx
cmp    %rax,%rsi
je     1123 <contains0+0x23>
lea    0x1(%rcx),%rax
cmpq   $0x0,(%rdi,%rcx,8)
jne    1110 <contains0+0x10>
xor    %eax,%eax
cmp    %rsi,%rcx
setb   %al
ret
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @contains0(i64* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %19, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i64*, i64** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i64, i64* %12, i64 %13
%15 = load i64, i64* %14
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %11
store i64 1, i64* %3
br label %23
18: ; preds = %11
br label %19
19: ; preds = %18
%20 = load i64, i64* %6
%21 = add i64 %20, 1
store i64 %21, i64* %6
br label %7
22: ; preds = %7
store i64 0, i64* %3
br label %23
23: ; preds = %22, %17
%24 = load i64, i64* %3
ret i64 %24
}

LLVM IR (-O2):
define i64 @contains0(i64* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %18, label %4
4: ; preds = %2
%5 = load i64, i64* %0
%6 = icmp eq i64 %5, 0
br i1 %6, label %18, label %7
7: ; preds = %4, %10
%8 = phi i64 [ %14, %10 ], [ 1, %4 ]
%9 = icmp eq i64 %8, %1
br i1 %9, label %15, label %10
10: ; preds = %7
%11 = getelementptr inbounds i64, i64* %0, i64 %8
%12 = load i64, i64* %11
%13 = icmp eq i64 %12, 0
%14 = add nuw i64 %8, 1
br i1 %13, label %15, label %7
15: ; preds = %7, %10
%16 = icmp ult i64 %8, %1
%17 = zext i1 %16 to i64
br label %18
18: ; preds = %15, %4, %2
%19 = phi i64 [ 0, %2 ], [ 1, %4 ], [ %17, %15 ]
ret i64 %19
}
int main() {
start:
  goto next;
  return 1;
success:
  return 0;
next:
foo:
  goto success;
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    1114 <main+0x14>
xor    %eax,%eax
pop    %rbp
ret
jmp    1119 <main+0x19>
jmp    1110 <main+0x10>

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
br label %4
3: ; preds = %5
ret i32 0
4: ; preds = %2
br label %5
5: ; preds = %4
br label %3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void gtk_text_iter_forward_cursor_positions() {}


x86 assembly (clang, -O0):
<gtk_text_iter_forward_cursor_positions>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_forward_cursor_positions>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_forward_cursor_positions() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_forward_cursor_positions() {
ret void
}
int sys_strlen(char *str) {
  int i = 0;
  while (*(str + i) != 0x00) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<sys_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <sys_strlen+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <sys_strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_strlen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <sys_strlen+0x10>
ret

LLVM IR (-O0):
define i32 @sys_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @sys_strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
int In_Range(Value, LowVal, HighVal)
double Value, LowVal, HighVal;
{ return (Value >= LowVal && Value <= HighVal); }


x86 assembly (clang, -O0):
<In_Range>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
ucomisd -0x10(%rbp),%xmm0
mov    %al,-0x19(%rbp)
jb     113c <In_Range+0x3c>
movsd  -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<In_Range>:
ucomisd %xmm1,%xmm0
setae  %al
ucomisd %xmm0,%xmm2
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @In_Range(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fcmp oge double %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load double, double* %4
%12 = load double, double* %6
%13 = fcmp ole double %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @In_Range(double %0, double %1, double %2) {
%4 = fcmp oge double %0, %1
%5 = fcmp ole double %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
void f14(int a, int b, int c, int d, int e, int f, char X) {}


x86 assembly (clang, -O0):
<f14>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f14>:
ret

LLVM IR (-O0):
define void @f14(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8 signext %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i8
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i8 %6, i8* %14
ret void
}

LLVM IR (-O2):
define void @f14(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8 signext %6) {
ret void
}
/* Type definitions */
typedef int uint16_t;
struct pcg_state_32 {
  int dummy;
};

/* Variables and functions */
int pcg_mcg_32_xsh_rr_16_random_r(struct pcg_state_32 *);
uint16_t pcg_mcg_32_xsh_rr_16_boundedrand_r(struct pcg_state_32 *rng,
                                            uint16_t bound) {
  uint16_t threshold = ((uint16_t)(-bound)) % bound;
  for (;;) {
    uint16_t r = pcg_mcg_32_xsh_rr_16_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_mcg_32_xsh_rr_16_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_mcg_32_xsh_rr_16_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_mcg_32_xsh_rr_16_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_mcg_32_xsh_rr_16_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_mcg_32_xsh_rr_16_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_mcg_32_xsh_rr_16_random_r@plt>
test   %eax,%eax
js     1120 <pcg_mcg_32_xsh_rr_16_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_32 = type { i32 }
define i32 @pcg_mcg_32_xsh_rr_16_boundedrand_r(%struct.pcg_state_32* %0, i32 %1) {
%3 = alloca %struct.pcg_state_32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_32* %0, %struct.pcg_state_32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_32*, %struct.pcg_state_32** %3
%13 = call i32 @pcg_mcg_32_xsh_rr_16_random_r(%struct.pcg_state_32* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_32 = type { i32 }
define i32 @pcg_mcg_32_xsh_rr_16_boundedrand_r(%struct.pcg_state_32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_mcg_32_xsh_rr_16_random_r(%struct.pcg_state_32* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_ATTRIBUTE;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_ATTRIBUTE_it;
int i2d_X509_ATTRIBUTE(X509_ATTRIBUTE *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &X509_ATTRIBUTE_it);
}


x86 assembly (clang, -O0):
<i2d_X509_ATTRIBUTE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2ea9(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_X509_ATTRIBUTE>:
mov    0x2ec1(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@X509_ATTRIBUTE_it = global i32 0
define i32 @i2d_X509_ATTRIBUTE(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @X509_ATTRIBUTE_it)
ret i32 %7
}

LLVM IR (-O2):
@X509_ATTRIBUTE_it = global i32 0
define i32 @i2d_X509_ATTRIBUTE(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @X509_ATTRIBUTE_it)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bar(void *(*)(int, int));
void entry(void *(*service)(int, int)) {
  bar(service);
  service(0, 0);
}


x86 assembly (clang, -O0):
<entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bar@plt>
xor    %esi,%esi
mov    %esi,%edi
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entry>:
push   %rbx
mov    %rdi,%rbx
call   1030 <bar@plt>
xor    %edi,%edi
xor    %esi,%esi
mov    %rbx,%rax
pop    %rbx
jmp    *%rax

LLVM IR (-O0):
define void @entry(i8* (i32, i32)* %0) {
%2 = alloca i8* (i32, i32)*
store i8* (i32, i32)* %0, i8* (i32, i32)** %2
%3 = load i8* (i32, i32)*, i8* (i32, i32)** %2
%4 = call i32 @bar(i8* (i32, i32)* %3)
%5 = load i8* (i32, i32)*, i8* (i32, i32)** %2
%6 = call i8* %5(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @entry(i8* (i32, i32)* %0) {
%2 = tail call i32 @bar(i8* (i32, i32)* %0)
%3 = tail call i8* %0(i32 0, i32 0)
ret void
}
/* Variables and functions */
char *skip_to_separator(char *, char *);
char *skip_to_nl(char *chp) { return skip_to_separator(chp, "\n"); }


x86 assembly (clang, -O0):
<skip_to_nl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <skip_to_separator@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_to_nl>:
lea    0xee9(%rip),%rsi
jmp    1030 <skip_to_separator@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i8* @skip_to_nl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @skip_to_separator(i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define i8* @skip_to_nl(i8* %0) {
%2 = tail call i8* @skip_to_separator(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
/* Variables and functions */
int killer(int /*<<< orphan*/);
int /*<<< orphan*/ readPidFile(char *);
int parKiller(void) { return killer(readPidFile("/tmp/.pidlbr-dmn")); }


x86 assembly (clang, -O0):
<parKiller>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <readPidFile@plt>
mov    %eax,%edi
call   1030 <killer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<parKiller>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <readPidFile@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <killer@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"/tmp/.pidlbr-dmn\00"
define i32 @parKiller() {
%1 = call i32 @readPidFile(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @killer(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@.str = [17 x i8] c"/tmp/.pidlbr-dmn\00"
define i32 @parKiller() {
%1 = tail call i32 @readPidFile(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @killer(i32 %1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ cfg_get(char *);
int check_cfg_flag(void) { cfg_get("flag"); }


x86 assembly (clang, -O0):
<check_cfg_flag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <cfg_get@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_cfg_flag>:
lea    0xee9(%rip),%rdi
jmp    1030 <cfg_get@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"flag\00"
define i32 @check_cfg_flag() {
%1 = alloca i32
%2 = call i32 @cfg_get(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [5 x i8] c"flag\00"
define i32 @check_cfg_flag() {
%1 = tail call i32 @cfg_get(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int read(int, unsigned char *, int);
unsigned char get(int fd) {
  unsigned char c;
  while (read(fd, &c, 1) == -1)
    ;
  return c;
}


x86 assembly (clang, -O0):
<get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0xffffffff,%eax
jne    113a <get+0x2a>
jmp    111b <get+0xb>
movzbl -0x5(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x7(%rsp),%r14
nopl   0x0(%rax,%rax,1)
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0xffffffff,%eax
je     1120 <get+0x10>
mov    0x7(%rsp),%al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define zeroext i8 @get(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = call i32 @read(i32 %5, i8* %3, i32 1)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
%10 = load i8, i8* %3
ret i8 %10
}

LLVM IR (-O2):
define zeroext i8 @get(i32 %0) {
%2 = alloca i8
br label %3
3: ; preds = %3, %1
%4 = call i32 @read(i32 %0, i8* %2, i32 1)
%5 = icmp eq i32 %4, -1
br i1 %5, label %3, label %6
6: ; preds = %3
%7 = load i8, i8* %2
ret i8 %7
}
int idx_column(int el, int idx) { return (9 * (idx) + (el)); }


x86 assembly (clang, -O0):
<idx_column>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x9,-0x8(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idx_column>:
lea    (%rsi,%rsi,8),%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @idx_column(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = mul nsw i32 9, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @idx_column(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, 9
%4 = add nsw i32 %3, %0
ret i32 %4
}
void md_init_set_status(int flags) { (void)flags; }


x86 assembly (clang, -O0):
<md_init_set_status>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_init_set_status>:
ret

LLVM IR (-O0):
define void @md_init_set_status(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @md_init_set_status(i32 %0) {
ret void
}
void logmsg(const char *msg, unsigned level) {}


x86 assembly (clang, -O0):
<logmsg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<logmsg>:
ret

LLVM IR (-O0):
define void @logmsg(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @logmsg(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
void hash_data_copy(char *dst, const char *src) { strcpy(dst, src); }


x86 assembly (clang, -O0):
<hash_data_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_data_copy>:
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
define void @hash_data_copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcpy(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @hash_data_copy(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ExtSelect(char *, char *, int /*<<< orphan*/);
void ExttHitMonthSelect(void) {
  ExtSelect("tHitMonth",
            "tHitMonth.uHit,tHitMonth.cZone,tHitMonth.cHost,tHitMonth."
            "uHitCount,tHitMonth.uSuccess,tHitMonth.uReferral,tHitMonth."
            "uNxrrset,tHitMonth.uNxdomain,tHitMonth.uRecursion,tHitMonth."
            "uFailure,tHitMonth.uOwner,tHitMonth.uCreatedBy,tHitMonth."
            "uCreatedDate,tHitMonth.uModBy,tHitMonth.uModDate",
            0);
}


x86 assembly (clang, -O0):
<ExttHitMonthSelect>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee8(%rip),%rsi
xor    %edx,%edx
call   1030 <ExtSelect@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttHitMonthSelect>:
lea    0xee9(%rip),%rdi
lea    0xeec(%rip),%rsi
xor    %edx,%edx
jmp    1030 <ExtSelect@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"tHitMonth\00"
@.str.1 = [282 x i8] c"tHitMonth.uHit,tHitMonth.cZone,tHitMonth.cHost,tHitMonth.uHitCount,tHitMonth.uSuccess,tHitMonth.uReferral,tHitMonth.uNxrrset,tHitMonth.uNxdomain,tHitMonth.uRecursion,tHitMonth.uFailure,tHitMonth.uOwner,tHitMonth.uCreatedBy,tHitMonth.uCreatedDate,tHitMonth.uModBy,tHitMonth.uModDate\00"
define void @ExttHitMonthSelect() {
%1 = call i32 @ExtSelect(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([282 x i8], [282 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"tHitMonth\00"
@.str.1 = [282 x i8] c"tHitMonth.uHit,tHitMonth.cZone,tHitMonth.cHost,tHitMonth.uHitCount,tHitMonth.uSuccess,tHitMonth.uReferral,tHitMonth.uNxrrset,tHitMonth.uNxdomain,tHitMonth.uRecursion,tHitMonth.uFailure,tHitMonth.uOwner,tHitMonth.uCreatedBy,tHitMonth.uCreatedDate,tHitMonth.uModBy,tHitMonth.uModDate\00"
define void @ExttHitMonthSelect() {
%1 = tail call i32 @ExtSelect(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([282 x i8], [282 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}
/* Type definitions */
struct dos_file_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dos_unix_path_fcb(int, int);
struct dos_file_list *find_first_file(int /*<<< orphan*/);
struct dos_file_list *dos_find_first_file_fcb(int addr) {
  return find_first_file(dos_unix_path_fcb(addr, 1));
}


x86 assembly (clang, -O0):
<dos_find_first_file_fcb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1040 <dos_unix_path_fcb@plt>
mov    %eax,%edi
call   1030 <find_first_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dos_find_first_file_fcb>:
push   %rax
mov    $0x1,%esi
call   1040 <dos_unix_path_fcb@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <find_first_file@plt>

LLVM IR (-O0):
%struct.dos_file_list = type { i32 }
define %struct.dos_file_list* @dos_find_first_file_fcb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @dos_unix_path_fcb(i32 %3, i32 1)
%5 = call %struct.dos_file_list* @find_first_file(i32 %4)
ret %struct.dos_file_list* %5
}

LLVM IR (-O2):
%struct.dos_file_list = type { i32 }
define %struct.dos_file_list* @dos_find_first_file_fcb(i32 %0) {
%2 = tail call i32 @dos_unix_path_fcb(i32 %0, i32 1)
%3 = tail call %struct.dos_file_list* @find_first_file(i32 %2)
ret %struct.dos_file_list* %3
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ GPIOBaseValid(unsigned long);
void GPIOPinIntClear(unsigned long ulPort, unsigned char ucPins) {
  DEBUG_ASSERT(GPIOBaseValid(ulPort));
  (*((volatile unsigned long *)(ulPort + 0x0000041C))) = ucPins;
}


x86 assembly (clang, -O0):
<GPIOPinIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
movzbl -0x9(%rbp),%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x41c(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinIntClear>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    %ebp,%eax
mov    %rax,0x41c(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @GPIOPinIntClear(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = call i32 @GPIOBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i8, i8* %4
%9 = zext i8 %8 to i64
%10 = load i64, i64* %3
%11 = add i64 %10, 1052
%12 = inttoptr i64 %11 to i64*
store volatile i64 %9, i64* %12
ret void
}

LLVM IR (-O2):
define void @GPIOPinIntClear(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIOBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = zext i8 %1 to i64
%6 = add i64 %0, 1052
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}
/* Type definitions */
struct section_list_link {
  int dummy;
};
struct section_list {
  int dummy;
};
struct genlist {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_head(struct genlist const *);
struct section_list_link *section_list_head(const struct section_list *tthis) {
  return (struct section_list_link *)genlist_head(
      (const struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<section_list_head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_head@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_list_head>:
jmp    1030 <genlist_head@plt>

LLVM IR (-O0):
%struct.section_list_link = type { i32 }
%struct.section_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.section_list_link* @section_list_head(%struct.section_list* %0) {
%2 = alloca %struct.section_list*
store %struct.section_list* %0, %struct.section_list** %2
%3 = load %struct.section_list*, %struct.section_list** %2
%4 = bitcast %struct.section_list* %3 to %struct.genlist*
%5 = call i64 @genlist_head(%struct.genlist* %4)
%6 = inttoptr i64 %5 to %struct.section_list_link*
ret %struct.section_list_link* %6
}

LLVM IR (-O2):
%struct.section_list_link = type { i32 }
%struct.section_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.section_list_link* @section_list_head(%struct.section_list* %0) {
%2 = bitcast %struct.section_list* %0 to %struct.genlist*
%3 = tail call i64 @genlist_head(%struct.genlist* %2)
%4 = inttoptr i64 %3 to %struct.section_list_link*
ret %struct.section_list_link* %4
}