xunge/DecIR huggingface dataset:
/* Variables and functions */
void *malloc(size_t);
void *qh_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<qh_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qh_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @qh_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @qh_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
int Operand_mr1_decode(unsigned int *valp __attribute__((__unused__))) {
  return 0;
}


x86 assembly (clang, -O0):
<Operand_mr1_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_mr1_decode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_mr1_decode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_mr1_decode(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
float fa_roundf(float);
int fa_rintf(float x) {
  float xx;
  xx = fa_roundf(x);
  if (xx > 2147483647)
    return 2147483647;
  else if (xx < (-2147483647 - 1))
    return (-2147483647 - 1);
  else
    return (int)xx;
}


x86 assembly (clang, -O0):
<fa_rintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <fa_roundf@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  0xec7(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    114e <fa_rintf+0x3e>
movl   $0x7fffffff,-0x4(%rbp)
jmp    1174 <fa_rintf+0x64>
movss  0xeae(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    116c <fa_rintf+0x5c>
movl   $0x80000000,-0x4(%rbp)
jmp    1174 <fa_rintf+0x64>
cvttss2si -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fa_rintf>:
push   %rax
call   1030 <fa_roundf@plt>
mov    $0x7fffffff,%eax
ucomiss 0xede(%rip),%xmm0
ja     113a <fa_rintf+0x2a>
mov    $0x80000000,%eax
movss  0xed3(%rip),%xmm1
ucomiss %xmm0,%xmm1
ja     113a <fa_rintf+0x2a>
cvttss2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fa_rintf(float %0) {
%2 = alloca i32
%3 = alloca float
%4 = alloca float
store float %0, float* %3
%5 = load float, float* %3
%6 = call float @fa_roundf(float %5)
store float %6, float* %4
%7 = load float, float* %4
%8 = fcmp ogt float %7, 0x41E0000000000000
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 2147483647, i32* %2
br label %17
10: ; preds = %1
%11 = load float, float* %4
%12 = fcmp olt float %11, 0xC1E0000000000000
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 -2147483648, i32* %2
br label %17
14: ; preds = %10
%15 = load float, float* %4
%16 = fptosi float %15 to i32
store i32 %16, i32* %2
br label %17
17: ; preds = %14, %13, %9
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @fa_rintf(float %0) {
%2 = tail call float @fa_roundf(float %0)
%3 = fcmp ogt float %2, 0x41E0000000000000
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = fcmp olt float %2, 0xC1E0000000000000
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = fptosi float %2 to i32
br label %8
8: ; preds = %4, %1, %6
%9 = phi i32 [ %7, %6 ], [ 2147483647, %1 ], [ -2147483648, %4 ]
ret i32 %9
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
struct node *node_prev(struct node *);
int node_index(struct node *node) {
  int index = -1;
  while (node) {
    node = node_prev(node);
    index++;
  }
  return index;
}


x86 assembly (clang, -O0):
<node_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1149 <node_index+0x39>
mov    -0x8(%rbp),%rdi
call   1030 <node_prev@plt>
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <node_index+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<node_index>:
push   %rbx
test   %rdi,%rdi
je     1132 <node_index+0x22>
mov    %rdi,%rax
mov    $0xffffffff,%ebx
xchg   %ax,%ax
mov    %rax,%rdi
call   1030 <node_prev@plt>
add    $0x1,%ebx
test   %rax,%rax
jne    1120 <node_index+0x10>
jmp    1137 <node_index+0x27>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define i32 @node_index(%struct.node* %0) {
%2 = alloca %struct.node*
%3 = alloca i32
store %struct.node* %0, %struct.node** %2
store i32 -1, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load %struct.node*, %struct.node** %2
%6 = icmp ne %struct.node* %5, null
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load %struct.node*, %struct.node** %2
%9 = call %struct.node* @node_prev(%struct.node* %8)
store %struct.node* %9, %struct.node** %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.node = type { i32 }
define i32 @node_index(%struct.node* %0) {
%2 = icmp eq %struct.node* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ -1, %1 ]
%5 = phi %struct.node* [ %6, %3 ], [ %0, %1 ]
%6 = tail call %struct.node* @node_prev(%struct.node* %5)
%7 = add nsw i32 %4, 1
%8 = icmp eq %struct.node* %6, null
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ -1, %1 ], [ %7, %3 ]
ret i32 %10
}
int fun415() { return 415; }


x86 assembly (clang, -O0):
<fun415>:
push   %rbp
mov    %rsp,%rbp
mov    $0x19f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun415>:
mov    $0x19f,%eax
ret

LLVM IR (-O0):
define i32 @fun415() {
ret i32 415
}

LLVM IR (-O2):
define i32 @fun415() {
ret i32 415
}
int test_imm_1Duint8_mem(unsigned char *val) {
  return ((*val) & (-0x1D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Duint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffe3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Duint8_mem>:
testb  $0xe3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Duint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -29
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Duint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -29
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int from_bt(const char *a) {
  int n = 0;
  while (*a != '\0') {
    n *= 3;
    if (*a == '+') {
      n++;
    } else if (*a == '-') {
      n--;
    }
    a++;
  }
  return n;
}


x86 assembly (clang, -O0):
<from_bt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1173 <from_bt+0x73>
imul   $0x3,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2b,%eax
jne    1144 <from_bt+0x44>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1162 <from_bt+0x62>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
jne    115d <from_bt+0x5d>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1162 <from_bt+0x62>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <from_bt+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_bt>:
mov    (%rdi),%cl
test   %cl,%cl
je     1131 <from_bt+0x31>
add    $0x1,%rdi
xor    %eax,%eax
jmp    111e <from_bt+0x1e>
xchg   %ax,%ax
add    $0xffffffff,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
je     1130 <from_bt+0x30>
lea    (%rax,%rax,2),%eax
cmp    $0x2d,%cl
je     1110 <from_bt+0x10>
cmp    $0x2b,%cl
jne    1113 <from_bt+0x13>
add    $0x1,%eax
jmp    1113 <from_bt+0x13>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @from_bt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %28, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %31
9: ; preds = %4
%10 = load i32, i32* %3
%11 = mul nsw i32 %10, 3
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 43
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %28
19: ; preds = %9
%20 = load i8*, i8** %2
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %22, 45
br i1 %23, label %24, label %27
24: ; preds = %19
%25 = load i32, i32* %3
%26 = add nsw i32 %25, -1
store i32 %26, i32* %3
br label %27
27: ; preds = %24, %19
br label %28
28: ; preds = %27, %16
%29 = load i8*, i8** %2
%30 = getelementptr inbounds i8, i8* %29, i32 1
store i8* %30, i8** %2
br label %4
31: ; preds = %4
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @from_bt(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %18, label %4
4: ; preds = %1, %13
%5 = phi i8 [ %16, %13 ], [ %2, %1 ]
%6 = phi i32 [ %14, %13 ], [ 0, %1 ]
%7 = phi i8* [ %15, %13 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 3
switch i8 %5, label %13 [
i8 43, label %9
i8 45, label %11
]
9: ; preds = %4
%10 = add nsw i32 %8, 1
br label %13
11: ; preds = %4
%12 = add nsw i32 %8, -1
br label %13
13: ; preds = %4, %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ], [ %8, %4 ]
%15 = getelementptr inbounds i8, i8* %7, i64 1
%16 = load i8, i8* %15
%17 = icmp eq i8 %16, 0
br i1 %17, label %18, label %4
18: ; preds = %13, %1
%19 = phi i32 [ 0, %1 ], [ %14, %13 ]
ret i32 %19
}
/* Type definitions */
struct robot {
  int dummy;
};

/* Variables and functions */
int loc_y(struct robot *);
int cmd_loc_y(struct robot *robot, int *args) { return loc_y(robot); }


x86 assembly (clang, -O0):
<cmd_loc_y>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <loc_y@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_loc_y>:
jmp    1030 <loc_y@plt>

LLVM IR (-O0):
%struct.robot = type { i32 }
define i32 @cmd_loc_y(%struct.robot* %0, i32* %1) {
%3 = alloca %struct.robot*
%4 = alloca i32*
store %struct.robot* %0, %struct.robot** %3
store i32* %1, i32** %4
%5 = load %struct.robot*, %struct.robot** %3
%6 = call i32 @loc_y(%struct.robot* %5)
ret i32 %6
}

LLVM IR (-O2):
%struct.robot = type { i32 }
define i32 @cmd_loc_y(%struct.robot* %0, i32* nocapture readnone %1) {
%3 = tail call i32 @loc_y(%struct.robot* %0)
ret i32 %3
}
char *msg() { return "BUCK ON WINDOWS"; }


x86 assembly (clang, -O0):
<msg>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [16 x i8] c"BUCK ON WINDOWS\00"
define i8* @msg() {
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [16 x i8] c"BUCK ON WINDOWS\00"
define i8* @msg() {
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0)
}
int SDL_imageFilterAddByteMMX(unsigned char *Src1, unsigned char *Dest,
                              int length, unsigned char C) {
  return (0);
}


x86 assembly (clang, -O0):
<SDL_imageFilterAddByteMMX>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %al,-0x15(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_imageFilterAddByteMMX>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @SDL_imageFilterAddByteMMX(i8* %0, i8* %1, i32 %2, i8 zeroext %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8 %3, i8* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @SDL_imageFilterAddByteMMX(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8 zeroext %3) {
ret i32 0
}
/* Variables and functions */
int SIM_power_draincap(double, int, int);
scalar_t__ SIM_power_gatecap(double, int /*<<< orphan*/);
double SIM_rr_arbiter_carry_cap() {
  double Ctotal = 0;
  Ctotal += 2 * SIM_power_draincap((5.4 * 0.0875), 1, 1) +
            SIM_power_draincap((30.5 * 0.0875), 0, 2);
  Ctotal += SIM_power_gatecap((5.4 * 0.0875) + (30.5 * 0.0875), 0);
  return Ctotal;
}


x86 assembly (clang, -O0):
<SIM_rr_arbiter_carry_cap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xed8(%rip),%xmm0
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <SIM_power_draincap@plt>
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
movsd  0xeb6(%rip),%xmm0
xor    %edi,%edi
mov    $0x2,%esi
call   1030 <SIM_power_draincap@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cvtsi2sd %eax,%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xe85(%rip),%xmm0
xor    %edi,%edi
call   1040 <SIM_power_gatecap@plt>
cvtsi2sd %rax,%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIM_rr_arbiter_carry_cap>:
push   %rbx
sub    $0x10,%rsp
movsd  0xed3(%rip),%xmm0
mov    $0x1,%edi
mov    $0x1,%esi
call   1030 <SIM_power_draincap@plt>
mov    %eax,%ebx
movsd  0xec2(%rip),%xmm0
xor    %edi,%edi
mov    $0x2,%esi
call   1030 <SIM_power_draincap@plt>
lea    (%rax,%rbx,2),%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0xea6(%rip),%xmm0
xor    %edi,%edi
call   1040 <SIM_power_gatecap@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @SIM_rr_arbiter_carry_cap() {
%1 = alloca double
store double 0.000000e+00, double* %1
%2 = call i32 @SIM_power_draincap(double 4.725000e-01, i32 1, i32 1)
%3 = mul nsw i32 2, %2
%4 = call i32 @SIM_power_draincap(double 0x4005599999999999, i32 0, i32 2)
%5 = add nsw i32 %3, %4
%6 = sitofp i32 %5 to double
%7 = load double, double* %1
%8 = fadd double %7, %6
store double %8, double* %1
%9 = call i64 @SIM_power_gatecap(double 3.141250e+00, i32 0)
%10 = sitofp i64 %9 to double
%11 = load double, double* %1
%12 = fadd double %11, %10
store double %12, double* %1
%13 = load double, double* %1
ret double %13
}

LLVM IR (-O2):
define double @SIM_rr_arbiter_carry_cap() {
%1 = tail call i32 @SIM_power_draincap(double 4.725000e-01, i32 1, i32 1)
%2 = shl nsw i32 %1, 1
%3 = tail call i32 @SIM_power_draincap(double 0x4005599999999999, i32 0, i32 2)
%4 = add nsw i32 %2, %3
%5 = sitofp i32 %4 to double
%6 = tail call i64 @SIM_power_gatecap(double 3.141250e+00, i32 0)
%7 = sitofp i64 %6 to double
%8 = fadd double %5, %7
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void *f(void *arg) {
  int id = *(int *)arg;
  for (;;)
    printf("%d ", id);
  return NULL;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
jmp    1125 <f+0x15>

x86 assembly (clang, -O2):
<f>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
jmp    1120 <f+0x10>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define i8* @f(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
br label %7
7: ; preds = %7, %1
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define noalias i8* @f(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
br label %4
4: ; preds = %4, %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
br label %4
}
/* Variables and functions */
char const *setCharset(int /*<<< orphan*/ *);
const char *getCharset(void) { return setCharset(NULL); }


x86 assembly (clang, -O0):
<getCharset>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <setCharset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCharset>:
xor    %edi,%edi
jmp    1030 <setCharset@plt>

LLVM IR (-O0):
define i8* @getCharset() {
%1 = call i8* @setCharset(i32* null)
ret i8* %1
}

LLVM IR (-O2):
define i8* @getCharset() {
%1 = tail call i8* @setCharset(i32* null)
ret i8* %1
}
unsigned int btl_mem(char *base, int bitno) {
  unsigned char res;
  __asm__ __volatile__("btl\t%2, %0\n\t"
                       "setc\t%1"
                       : "=m"(*base), "=q"(res)
                       : "r"(bitno)
                       : "cc", "memory");
  return res;
}


x86 assembly (clang, -O0):
<btl_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
bt     %ecx,(%rax)
setb   %al
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<btl_mem>:
bt     %esi,(%rdi)
setb   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @btl_mem(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8 asm sideeffect "btl\09$2, $0\0A\09setc\09$1", "=*m,=q,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %6, i32 %7)
store i8 %8, i8* %5
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @btl_mem(i8* %0, i32 %1) {
%3 = tail call i8 asm sideeffect "btl\09$2, $0\0A\09setc\09$1", "=*m,=q,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0, i32 %1)
%4 = zext i8 %3 to i32
ret i32 %4
}
int fun990() { return 990; }


x86 assembly (clang, -O0):
<fun990>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3de,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun990>:
mov    $0x3de,%eax
ret

LLVM IR (-O0):
define i32 @fun990() {
ret i32 990
}

LLVM IR (-O2):
define i32 @fun990() {
ret i32 990
}
void ScaleRowDown4_NEON() {}


x86 assembly (clang, -O0):
<ScaleRowDown4_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleRowDown4_NEON>:
ret

LLVM IR (-O0):
define void @ScaleRowDown4_NEON() {
ret void
}

LLVM IR (-O2):
define void @ScaleRowDown4_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar(int);
int nondet();
int main() {
  int n;
  n = nondet();
  bar(n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <nondet@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <nondet@plt>
mov    %eax,%edi
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @nondet()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @bar(i32 %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @nondet()
%2 = tail call i32 @bar(i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(char *, int, int, int /*<<< orphan*/ *);
int read_byte(FILE *file, unsigned char *bp) {
  if (fread((char *)bp, 1, 1, file) != 1)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fread@plt>
cmp    $0x1,%eax
je     1149 <read_byte+0x39>
movl   $0x0,-0x4(%rbp)
jmp    1150 <read_byte+0x40>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_byte>:
push   %rax
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @read_byte(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = load i32*, i32** %4
%8 = call i32 @fread(i8* %6, i32 1, i32 1, i32* %7)
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %12
11: ; preds = %2
store i32 1, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @read_byte(i32* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @fread(i8* %1, i32 1, i32 1, i32* %0)
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
int au_br_fhsm(int brperm) { return brperm & (1 << 5); }


x86 assembly (clang, -O0):
<au_br_fhsm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<au_br_fhsm>:
mov    %edi,%eax
and    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @au_br_fhsm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 32
ret i32 %4
}

LLVM IR (-O2):
define i32 @au_br_fhsm(i32 %0) {
%2 = and i32 %0, 32
ret i32 %2
}
/* Variables and functions */
scalar_t__ MemVmMap(int /*<<< orphan*/ *, void *, int, int,
                    int /*<<< orphan*/ *);
void *MemMapPage(void *vaddr, int flags) {
  return MemVmMap(NULL, vaddr, 0x1000, flags, NULL) ? vaddr : NULL;
}


x86 assembly (clang, -O0):
<MemMapPage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%r8d
mov    $0x1000,%edx
mov    %r8,%rdi
call   1030 <MemVmMap@plt>
cmp    $0x0,%rax
je     114f <MemMapPage+0x3f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    115a <MemMapPage+0x4a>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    115a <MemMapPage+0x4a>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemMapPage>:
push   %rbx
mov    %esi,%ecx
mov    %rdi,%rbx
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x1000,%edx
xor    %r8d,%r8d
call   1030 <MemVmMap@plt>
test   %rax,%rax
cmovne %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @MemMapPage(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @MemVmMap(i32* null, i8* %5, i32 4096, i32 %6, i32* null)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i8*, i8** %3
br label %12
11: ; preds = %2
br label %12
12: ; preds = %11, %9
%13 = phi i8* [ %10, %9 ], [ null, %11 ]
ret i8* %13
}

LLVM IR (-O2):
define i8* @MemMapPage(i8* %0, i32 %1) {
%3 = tail call i64 @MemVmMap(i32* null, i8* %0, i32 4096, i32 %1, i32* null)
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i8* null, i8* %0
ret i8* %5
}
/* Variables and functions */
int read(int, char *, int);
int readline(int fd, char *str) {
  int n;
  do {
    n = read(fd, str, 1);
  } while (n > 0 && *str++ != '\0');
  return (n > 0);
}


x86 assembly (clang, -O0):
<readline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jle    115d <readline+0x4d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    111f <readline+0xf>
cmpl   $0x0,-0x14(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readline>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <read@plt>
test   %eax,%eax
jle    113c <readline+0x2c>
cmpb   $0x0,(%rbx)
lea    0x1(%rbx),%rbx
jne    1120 <readline+0x10>
xor    %ecx,%ecx
test   %eax,%eax
setg   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @readline(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %3
%8 = load i8*, i8** %4
%9 = call i32 @read(i32 %7, i8* %8, i32 1)
store i32 %9, i32* %5
br label %10
10: ; preds = %6
%11 = load i32, i32* %5
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %10
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %4
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br label %19
19: ; preds = %13, %10
%20 = phi i1 [ false, %10 ], [ %18, %13 ]
br i1 %20, label %6, label %21
21: ; preds = %19
%22 = load i32, i32* %5
%23 = icmp sgt i32 %22, 0
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @readline(i32 %0, i8* nocapture %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %1, %2 ], [ %8, %7 ]
%5 = tail call i32 @read(i32 %0, i8* %4, i32 1)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = load i8, i8* %4
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %3
11: ; preds = %3, %7
%12 = zext i1 %6 to i32
ret i32 %12
}
/* Variables and functions */
int libc_execve(char const *, char *const *, char *const *);
int /*<<< orphan*/ watch_log(char *, char const *);
int execve(const char *file, char *const *argv, char *const *envp) {
  watch_log("exec %s\n", file);
  return libc_execve(file, argv, envp);
}


x86 assembly (clang, -O0):
<execve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec1(%rip),%rdi
call   1040 <watch_log@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <libc_execve@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execve>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0xecb(%rip),%rdi
mov    %rbx,%rsi
call   1040 <watch_log@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <libc_execve@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"exec %s\0A\00"
define i32 @execve(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8*, i8** %4
%8 = call i32 @watch_log(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i8*, i8** %4
%10 = load i8**, i8*** %5
%11 = load i8**, i8*** %6
%12 = call i32 @libc_execve(i8* %9, i8** %10, i8** %11)
ret i32 %12
}

LLVM IR (-O2):
@.str = [9 x i8] c"exec %s\0A\00"
define i32 @execve(i8* %0, i8** %1, i8** %2) {
%4 = tail call i32 @watch_log(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = tail call i32 @libc_execve(i8* %0, i8** %1, i8** %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ writefile(char const *, int *, int const *, char const *,
                             int *, int *);
void cwritefile(const char *filename, const int *m, const int *n,
                const float *A, const int *ldA, int *info) {
  int cm = *m * (int)(2 * sizeof(float) / sizeof(char));
  int cldA = *ldA * (int)(2 * sizeof(float) / sizeof(char));
  writefile(filename, &cm, n, (const char *)A, &cldA, info);
}


x86 assembly (clang, -O0):
<cwritefile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
shl    $0x3,%eax
mov    %eax,-0x34(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%eax
shl    $0x3,%eax
mov    %eax,-0x38(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x30(%rbp),%r9
lea    -0x34(%rbp),%rsi
lea    -0x38(%rbp),%r8
call   1030 <writefile@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cwritefile>:
push   %rax
mov    (%rsi),%eax
shl    $0x3,%eax
mov    %eax,0x4(%rsp)
mov    (%r8),%eax
shl    $0x3,%eax
mov    %eax,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%r8
call   1030 <writefile@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @cwritefile(i8* %0, i32* %1, i32* %2, float* %3, i32* %4, i32* %5) {
%7 = alloca i8*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca float*
%11 = alloca i32*
%12 = alloca i32*
%13 = alloca i32
%14 = alloca i32
store i8* %0, i8** %7
store i32* %1, i32** %8
store i32* %2, i32** %9
store float* %3, float** %10
store i32* %4, i32** %11
store i32* %5, i32** %12
%15 = load i32*, i32** %8
%16 = load i32, i32* %15
%17 = mul nsw i32 %16, 8
store i32 %17, i32* %13
%18 = load i32*, i32** %11
%19 = load i32, i32* %18
%20 = mul nsw i32 %19, 8
store i32 %20, i32* %14
%21 = load i8*, i8** %7
%22 = load i32*, i32** %9
%23 = load float*, float** %10
%24 = bitcast float* %23 to i8*
%25 = load i32*, i32** %12
%26 = call i32 @writefile(i8* %21, i32* %13, i32* %22, i8* %24, i32* %14, i32* %25)
ret void
}

LLVM IR (-O2):
define void @cwritefile(i8* %0, i32* nocapture %1, i32* %2, float* %3, i32* nocapture %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = bitcast i32* %7 to i8*
%10 = load i32, i32* %1
%11 = shl nsw i32 %10, 3
store i32 %11, i32* %7
%12 = bitcast i32* %8 to i8*
%13 = load i32, i32* %4
%14 = shl nsw i32 %13, 3
store i32 %14, i32* %8
%15 = bitcast float* %3 to i8*
%16 = call i32 @writefile(i8* %0, i32* %7, i32* %2, i8* %15, i32* %8, i32* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Thrd_Flush_Buffer32(int);
unsigned int Thrd_Show_Bits(int, int);
unsigned int Thrd_Get_Bits32(signed int t) {
  unsigned int l;
  l = Thrd_Show_Bits(t, 32);
  Thrd_Flush_Buffer32(t);
  return l;
}


x86 assembly (clang, -O0):
<Thrd_Get_Bits32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x20,%esi
call   1030 <Thrd_Show_Bits@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <Thrd_Flush_Buffer32@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Thrd_Get_Bits32>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x20,%esi
call   1030 <Thrd_Show_Bits@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <Thrd_Flush_Buffer32@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Thrd_Get_Bits32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @Thrd_Show_Bits(i32 %4, i32 32)
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = call i32 @Thrd_Flush_Buffer32(i32 %6)
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @Thrd_Get_Bits32(i32 %0) {
%2 = tail call i32 @Thrd_Show_Bits(i32 %0, i32 32)
%3 = tail call i32 @Thrd_Flush_Buffer32(i32 %0)
ret i32 %2
}
/* Variables and functions */
bool nrf53_errata_26(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_26>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_26>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_26() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_26() {
ret i32 0
}
/* Variables and functions */
scalar_t__ html_tablecloserow();
scalar_t__ html_tabledata(int /*<<< orphan*/, int, int, int /*<<< orphan*/,
                          char *);
int html_tableopenrow(int /*<<< orphan*/);
int html_writetablebreak() {
  int l = html_tableopenrow((0));
  l += html_tabledata((0), 3, 1, 0, "<HR>");
  l += html_tablecloserow();
  return l;
}


x86 assembly (clang, -O0):
<html_writetablebreak>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <html_tableopenrow@plt>
mov    %eax,-0x4(%rbp)
xor    %ecx,%ecx
mov    $0x3,%esi
mov    $0x1,%edx
lea    0xeab(%rip),%r8
mov    %ecx,%edi
call   1050 <html_tabledata@plt>
mov    %rax,%rcx
movslq -0x4(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <html_tablecloserow@plt>
mov    %rax,%rcx
movslq -0x4(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<html_writetablebreak>:
push   %rbp
push   %rbx
push   %rax
xor    %edi,%edi
call   1030 <html_tableopenrow@plt>
mov    %eax,%ebp
lea    0xebd(%rip),%r8
xor    %edi,%edi
mov    $0x3,%esi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1050 <html_tabledata@plt>
mov    %rax,%rbx
add    %ebp,%ebx
xor    %eax,%eax
call   1040 <html_tablecloserow@plt>
add    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"<HR>\00"
define i32 @html_writetablebreak() {
%1 = alloca i32
%2 = call i32 @html_tableopenrow(i32 0)
store i32 %2, i32* %1
%3 = call i64 @html_tabledata(i32 0, i32 3, i32 1, i32 0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %1
%5 = sext i32 %4 to i64
%6 = add nsw i64 %5, %3
%7 = trunc i64 %6 to i32
store i32 %7, i32* %1
%8 = call i64 (...) @html_tablecloserow()
%9 = load i32, i32* %1
%10 = sext i32 %9 to i64
%11 = add nsw i64 %10, %8
%12 = trunc i64 %11 to i32
store i32 %12, i32* %1
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"<HR>\00"
define i32 @html_writetablebreak() {
%1 = tail call i32 @html_tableopenrow(i32 0)
%2 = tail call i64 @html_tabledata(i32 0, i32 3, i32 1, i32 0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = trunc i64 %2 to i32
%4 = add i32 %1, %3
%5 = tail call i64 (...) @html_tablecloserow()
%6 = trunc i64 %5 to i32
%7 = add i32 %4, %6
ret i32 %7
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ helper(struct TreeNode *, int *);
int findTilt(struct TreeNode *root) {
  int tilt = 0;
  helper(root, &tilt);
  return tilt;
}


x86 assembly (clang, -O0):
<findTilt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <helper@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findTilt>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <helper@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32 @findTilt(%struct.TreeNode* %0) {
%2 = alloca %struct.TreeNode*
%3 = alloca i32
store %struct.TreeNode* %0, %struct.TreeNode** %2
store i32 0, i32* %3
%4 = load %struct.TreeNode*, %struct.TreeNode** %2
%5 = call i32 @helper(%struct.TreeNode* %4, i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32 @findTilt(%struct.TreeNode* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @helper(%struct.TreeNode* %0, i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
void a_or_l(volatile void *p, long v) {
  __asm__("lock ; .byte 0x67\n\tor %1, %0"
          : "=m"(*(long *)p)
          : "r"(v)
          : "memory");
}


x86 assembly (clang, -O0):
<a_or_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
lock or %rcx,(%eax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_or_l>:
lock or %rsi,(%edi)
ret

LLVM IR (-O0):
define void @a_or_l(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %4
ret void
}

LLVM IR (-O2):
define void @a_or_l(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
tail call void asm "lock ; .byte 0x67\0A\09or $1, $0", "=*m,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Sleep(unsigned int);
unsigned int sleep(unsigned int nb_sec) {
  Sleep(nb_sec * 1000);
  return 0;
}


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <Sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
push   %rax
imul   $0x3e8,%edi,%edi
call   1030 <Sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 1000
%5 = call i32 @Sleep(i32 %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @sleep(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @Sleep(i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int main() { system("python gs.py"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"python gs.py\00"
define i32 @main() {
%1 = call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"python gs.py\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
long syscall(int, int, char *);
long int auditsec_register(int state, char *prog) {
  return syscall(299, state, prog);
}


x86 assembly (clang, -O0):
<auditsec_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0x12b,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<auditsec_register>:
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x12b,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i64 @auditsec_register(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i64 @syscall(i32 299, i32 %5, i8* %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @auditsec_register(i32 %0, i8* %1) {
%3 = tail call i64 @syscall(i32 299, i32 %0, i8* %1)
ret i64 %3
}
int test_imm_1Aint16_reg(short val) {
  return ((val) & (-0x1A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Aint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffe6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Aint16_reg>:
test   $0xffe6,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Aint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -26
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Aint16_reg(i16 signext %0) {
%2 = and i16 %0, -26
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint64_t load48(const uint8_t *src) {
  uint64_t w = ((uint64_t)src[0]) | ((uint64_t)src[1] << 8) |
               ((uint64_t)src[2] << 16) | ((uint64_t)src[3] << 24) |
               ((uint64_t)src[4] << 32) | ((uint64_t)src[5] << 40);
  return w;
}


x86 assembly (clang, -O0):
<load48>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x10(%rcx),%rcx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x18(%rcx),%rcx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x20(%rcx),%rcx
mov    %ecx,%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x28(%rcx),%rcx
mov    %ecx,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load48>:
ret

LLVM IR (-O0):
define i32 @load48(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = load i64*, i64** %2
%9 = getelementptr inbounds i64, i64* %8, i64 1
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = shl i32 %11, 8
%13 = or i32 %7, %12
%14 = load i64*, i64** %2
%15 = getelementptr inbounds i64, i64* %14, i64 2
%16 = load i64, i64* %15
%17 = trunc i64 %16 to i32
%18 = shl i32 %17, 16
%19 = or i32 %13, %18
%20 = load i64*, i64** %2
%21 = getelementptr inbounds i64, i64* %20, i64 3
%22 = load i64, i64* %21
%23 = trunc i64 %22 to i32
%24 = shl i32 %23, 24
%25 = or i32 %19, %24
%26 = load i64*, i64** %2
%27 = getelementptr inbounds i64, i64* %26, i64 4
%28 = load i64, i64* %27
%29 = trunc i64 %28 to i32
%30 = shl i32 %29, 32
%31 = or i32 %25, %30
%32 = load i64*, i64** %2
%33 = getelementptr inbounds i64, i64* %32, i64 5
%34 = load i64, i64* %33
%35 = trunc i64 %34 to i32
%36 = shl i32 %35, 40
%37 = or i32 %31, %36
store i32 %37, i32* %3
%38 = load i32, i32* %3
ret i32 %38
}

LLVM IR (-O2):
define i32 @load48(i64* nocapture readnone %0) {
ret i32 poison
}
void gtk_widget_map() {}


x86 assembly (clang, -O0):
<gtk_widget_map>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_widget_map>:
ret

LLVM IR (-O0):
define void @gtk_widget_map() {
ret void
}

LLVM IR (-O2):
define void @gtk_widget_map() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int mutex_trylock(int /*<<< orphan*/ *);
int pthread_mutex_trylock(pthread_mutex_t *mutex) {
  return mutex_trylock(mutex);
}


x86 assembly (clang, -O0):
<pthread_mutex_trylock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mutex_trylock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_mutex_trylock>:
jmp    1030 <mutex_trylock@plt>

LLVM IR (-O0):
define i32 @pthread_mutex_trylock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @mutex_trylock(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pthread_mutex_trylock(i32* %0) {
%2 = tail call i32 @mutex_trylock(i32* %0)
ret i32 %2
}
int ld_lt_cr1(long double a1) { return (((100) < (a1))); }


x86 assembly (clang, -O0):
<ld_lt_cr1>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
flds   0xeed(%rip)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_lt_cr1>:
fldt   0x8(%rsp)
flds   0xef6(%rip)
xor    %eax,%eax
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
ret

LLVM IR (-O0):
define i32 @ld_lt_cr1(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp olt x86_fp80 0xK4005C800000000000000, %3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @ld_lt_cr1(x86_fp80 %0) {
%2 = fcmp ogt x86_fp80 %0, 0xK4005C800000000000000
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
scalar_t__ ntohs(int /*<<< orphan*/ const);
uint16_t EXTRACT_16BITS(const void *p) {
  return ((uint16_t)ntohs(*(const uint16_t *)(p)));
}


x86 assembly (clang, -O0):
<EXTRACT_16BITS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EXTRACT_16BITS>:
mov    (%rdi),%edi
jmp    1030 <ntohs@plt>

LLVM IR (-O0):
define i32 @EXTRACT_16BITS(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i64 @ntohs(i32 %5)
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @EXTRACT_16BITS(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i64 @ntohs(i32 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ SendCMD(int);
void SetColumnAddress(uint8_t add) {
  SendCMD((0x10 | (add >> 4)));
  SendCMD((0x0f & add));
}


x86 assembly (clang, -O0):
<SetColumnAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x4,%edi
or     $0x10,%edi
call   1030 <SendCMD@plt>
mov    -0x4(%rbp),%edi
and    $0xf,%edi
call   1030 <SendCMD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetColumnAddress>:
push   %rbx
mov    %edi,%ebx
sar    $0x4,%edi
or     $0x10,%edi
call   1030 <SendCMD@plt>
and    $0xf,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <SendCMD@plt>

LLVM IR (-O0):
define void @SetColumnAddress(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
%5 = or i32 16, %4
%6 = call i32 @SendCMD(i32 %5)
%7 = load i32, i32* %2
%8 = and i32 15, %7
%9 = call i32 @SendCMD(i32 %8)
ret void
}

LLVM IR (-O2):
define void @SetColumnAddress(i32 %0) {
%2 = ashr i32 %0, 4
%3 = or i32 %2, 16
%4 = tail call i32 @SendCMD(i32 %3)
%5 = and i32 %0, 15
%6 = tail call i32 @SendCMD(i32 %5)
ret void
}
int test1(int a) { return !(a & 1); }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @test1(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}