unsigned int pwm_get_reg_base(unsigned int gpio) {
  unsigned int reg_base = 0;
  switch (gpio) {
  case (6):
  case (4):
    reg_base = (0xbfe5c000);
    break;
  case (92):
  case (5):
    reg_base = (0xbfe5c010);
    break;
  case (52):
  case (46):
    reg_base = (0xbfe5c020);
    break;
  case (47):
  case (53):
    reg_base = (0xbfe5c030);
    break;
  }
  return reg_base;
}


x86 assembly (clang, -O0):
<pwm_get_reg_base>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x4,%eax
je     1199 <pwm_get_reg_base+0x99>
jmp    1122 <pwm_get_reg_base+0x22>
mov    -0xc(%rbp),%eax
sub    $0x5,%eax
je     11a5 <pwm_get_reg_base+0xa5>
jmp    1133 <pwm_get_reg_base+0x33>
mov    -0xc(%rbp),%eax
sub    $0x6,%eax
je     1199 <pwm_get_reg_base+0x99>
jmp    1144 <pwm_get_reg_base+0x44>
mov    -0xc(%rbp),%eax
sub    $0x2e,%eax
je     11b1 <pwm_get_reg_base+0xb1>
jmp    1155 <pwm_get_reg_base+0x55>
mov    -0xc(%rbp),%eax
sub    $0x2f,%eax
je     11bd <pwm_get_reg_base+0xbd>
jmp    1166 <pwm_get_reg_base+0x66>
mov    -0xc(%rbp),%eax
sub    $0x34,%eax
je     11b1 <pwm_get_reg_base+0xb1>
jmp    1177 <pwm_get_reg_base+0x77>
mov    -0xc(%rbp),%eax
sub    $0x35,%eax
je     11bd <pwm_get_reg_base+0xbd>
jmp    1188 <pwm_get_reg_base+0x88>
mov    -0xc(%rbp),%eax
sub    $0x5c,%eax
je     11a5 <pwm_get_reg_base+0xa5>
jmp    11c4 <pwm_get_reg_base+0xc4>
movl   $0xbfe5c000,-0x8(%rbp)
jmp    11c4 <pwm_get_reg_base+0xc4>
movl   $0xbfe5c010,-0x8(%rbp)
jmp    11c4 <pwm_get_reg_base+0xc4>
movl   $0xbfe5c020,-0x8(%rbp)
jmp    11c4 <pwm_get_reg_base+0xc4>
movl   $0xbfe5c030,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwm_get_reg_base>:
xor    %eax,%eax
lea    -0x4(%rdi),%ecx
cmp    $0x31,%ecx
ja     112c <pwm_get_reg_base+0x2c>
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0xbfe5c000,%eax
ret
mov    $0xbfe5c020,%eax
ret
mov    $0xbfe5c030,%eax
ret
cmp    $0x5c,%edi
jne    112b <pwm_get_reg_base+0x2b>
mov    $0xbfe5c010,%eax
ret

LLVM IR (-O0):
define i32 @pwm_get_reg_base(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %9 [
i32 6, label %5
i32 4, label %5
i32 92, label %6
i32 5, label %6
i32 52, label %7
i32 46, label %7
i32 47, label %8
i32 53, label %8
]
5: ; preds = %1, %1
store i32 -1075462144, i32* %3
br label %9
6: ; preds = %1, %1
store i32 -1075462128, i32* %3
br label %9
7: ; preds = %1, %1
store i32 -1075462112, i32* %3
br label %9
8: ; preds = %1, %1
store i32 -1075462096, i32* %3
br label %9
9: ; preds = %1, %8, %7, %6, %5
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @pwm_get_reg_base(i32 %0) {
switch i32 %0, label %6 [
i32 6, label %2
i32 4, label %2
i32 92, label %3
i32 5, label %3
i32 52, label %4
i32 46, label %4
i32 47, label %5
i32 53, label %5
]
2: ; preds = %1, %1
br label %6
3: ; preds = %1, %1
br label %6
4: ; preds = %1, %1
br label %6
5: ; preds = %1, %1
br label %6
6: ; preds = %1, %5, %4, %3, %2
%7 = phi i32 [ 0, %1 ], [ -1075462096, %5 ], [ -1075462112, %4 ], [ -1075462128, %3 ], [ -1075462144, %2 ]
ret i32 %7
}