#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef char *uint32_t;

/* Variables and functions */
uint32_t sse2_popcount2(uint8_t *buffer, int chunks16) {
  static uint8_t mask33[16] = {0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
                               0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33};
  static uint8_t mask55[16] = {0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
                               0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55};
  static uint8_t mask0f[16] = {0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
                               0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f};
  uint32_t result = 0;
  int i, n, k;
  __asm__ volatile("movdqu (%%eax), %%xmm5" : : "a"(mask55));
  __asm__ volatile("movdqu (%%eax), %%xmm6" : : "a"(mask33));
  __asm__ volatile("movdqu (%%eax), %%xmm7" : : "a"(mask0f));
  __asm__ volatile("pxor %xmm4, %xmm4");
  i = 0;
  while (chunks16 > 0) {
    if (chunks16 > 31) {
      k = 31;
      chunks16 -= 31;
    } else {
      k = chunks16;
      chunks16 = 0;
    }
    __asm__ volatile("pxor %xmm3, %xmm3");
    for (n = 0; n < k; n++) {
      __asm__ volatile("movdqu	  (%%eax), %%xmm0	\n"
                       "movdqa    %%xmm0, %%xmm1	\n"
                       "psrlw         $1, %%xmm1	\n"
                       "pand      %%xmm5, %%xmm0	\n"
                       "pand      %%xmm5, %%xmm1	\n"
                       "paddb     %%xmm1, %%xmm0	\n"
                       "movdqa    %%xmm0, %%xmm1	\n"
                       "psrlw         $2, %%xmm1	\n"
                       "pand      %%xmm6, %%xmm0	\n"
                       "pand      %%xmm6, %%xmm1	\n"
                       "paddb     %%xmm1, %%xmm0	\n"
                       "movdqa    %%xmm0, %%xmm1	\n"
                       "psrlw         $4, %%xmm1	\n"
                       "pand      %%xmm7, %%xmm0	\n"
                       "pand      %%xmm7, %%xmm1	\n"
                       "paddb     %%xmm1, %%xmm0	\n"
                       "paddb     %%xmm0, %%xmm3	\n"
                       :
                       : "a"(&buffer[i]));
      i += 16;
    }
    __asm__ volatile("pxor	%xmm0, %xmm0		\n"
                     "psadbw	%xmm0, %xmm3		\n"
                     "paddd	%xmm3, %xmm4		\n");
  }
  __asm__ volatile("movhlps   %%xmm4, %%xmm0	\n"
                   "paddd     %%xmm4, %%xmm0	\n"
                   "movd      %%xmm0, %%eax	\n"
                   : "=a"(result));
  return result;
}


x86 assembly (clang, -O0):
<sse2_popcount2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
lea    0x2f56(%rip),%rax
movdqu (%eax),%xmm5
lea    0x2f0a(%rip),%rax
movdqu (%eax),%xmm6
lea    0x2f7e(%rip),%rax
movdqu (%eax),%xmm7
pxor   %xmm4,%xmm4
movl   $0x0,-0x1c(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    120e <sse2_popcount2+0x10e>
cmpl   $0x1f,-0xc(%rbp)
jle    116b <sse2_popcount2+0x6b>
movl   $0x1f,-0x24(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1f,%eax
mov    %eax,-0xc(%rbp)
jmp    1178 <sse2_popcount2+0x78>
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
movl   $0x0,-0xc(%rbp)
pxor   %xmm3,%xmm3
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x24(%rbp),%eax
jge    11fd <sse2_popcount2+0xfd>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
movdqu (%eax),%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x1,%xmm1
pand   %xmm5,%xmm0
pand   %xmm5,%xmm1
paddb  %xmm1,%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x2,%xmm1
pand   %xmm6,%xmm0
pand   %xmm6,%xmm1
paddb  %xmm1,%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x4,%xmm1
pand   %xmm7,%xmm0
pand   %xmm7,%xmm1
paddb  %xmm1,%xmm0
paddb  %xmm0,%xmm3
mov    -0x1c(%rbp),%eax
add    $0x10,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1183 <sse2_popcount2+0x83>
pxor   %xmm0,%xmm0
psadbw %xmm0,%xmm3
paddd  %xmm3,%xmm4
jmp    1142 <sse2_popcount2+0x42>
movhlps %xmm4,%xmm0
paddd  %xmm4,%xmm0
movd   %xmm0,%eax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sse2_popcount2>:
lea    0x2f69(%rip),%rax
movdqu (%eax),%xmm5
lea    0x2f1d(%rip),%rax
movdqu (%eax),%xmm6
lea    0x2f91(%rip),%rax
movdqu (%eax),%xmm7
pxor   %xmm4,%xmm4
test   %esi,%esi
jle    11d0 <sse2_popcount2+0xd0>
xor    %r8d,%r8d
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nop
cmp    $0x1f,%esi
mov    $0x1f,%ecx
cmovb  %esi,%ecx
pxor   %xmm3,%xmm3
movslq %edx,%rdx
lea    (%rdi,%rdx,4),%rax
cs nopw 0x0(%rax,%rax,1)
movdqu (%eax),%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x1,%xmm1
pand   %xmm5,%xmm0
pand   %xmm5,%xmm1
paddb  %xmm1,%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x2,%xmm1
pand   %xmm6,%xmm0
pand   %xmm6,%xmm1
paddb  %xmm1,%xmm0
movdqa %xmm0,%xmm1
psrlw  $0x4,%xmm1
pand   %xmm7,%xmm0
pand   %xmm7,%xmm1
paddb  %xmm1,%xmm0
paddb  %xmm0,%xmm3
add    $0x10,%rdx
add    $0x40,%rax
add    $0xffffffff,%ecx
jne    1160 <sse2_popcount2+0x60>
sub    $0x1f,%esi
cmovb  %r8d,%esi
pxor   %xmm0,%xmm0
psadbw %xmm0,%xmm3
paddd  %xmm3,%xmm4
test   %esi,%esi
jg     1140 <sse2_popcount2+0x40>
movhlps %xmm4,%xmm0
paddd  %xmm4,%xmm0
movd   %xmm0,%eax
ret

LLVM IR (-O0):
@sse2_popcount2.mask33 = internal global [16 x i32] [i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51]
@sse2_popcount2.mask55 = internal global [16 x i32] [i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85]
@sse2_popcount2.mask0f = internal global [16 x i32] [i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15]
define i8* @sse2_popcount2(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i8* null, i8** %5
store i32 0, i32* %6
br label %9
9: ; preds = %35, %2
%10 = load i32, i32* %4
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %36
12: ; preds = %9
%13 = load i32, i32* %4
%14 = icmp sgt i32 %13, 31
br i1 %14, label %15, label %18
15: ; preds = %12
store i32 31, i32* %8
%16 = load i32, i32* %4
%17 = sub nsw i32 %16, 31
store i32 %17, i32* %4
br label %20
18: ; preds = %12
%19 = load i32, i32* %4
store i32 %19, i32* %8
store i32 0, i32* %4
br label %20
20: ; preds = %18, %15
store i32 0, i32* %7
br label %21
21: ; preds = %32, %20
%22 = load i32, i32* %7
%23 = load i32, i32* %8
%24 = icmp slt i32 %22, %23
br i1 %24, label %25, label %35
25: ; preds = %21
%26 = load i32*, i32** %3
%27 = load i32, i32* %6
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i32, i32* %26, i64 %28
%30 = load i32, i32* %6
%31 = add nsw i32 %30, 16
store i32 %31, i32* %6
br label %32
32: ; preds = %25
%33 = load i32, i32* %7
%34 = add nsw i32 %33, 1
store i32 %34, i32* %7
br label %21
35: ; preds = %21
br label %9
36: ; preds = %9
%37 = call i8* asm sideeffect "movhlps %xmm4, %xmm0\09\0Apaddd %xmm4, %xmm0\09\0Amovd %xmm0, %eax\09\0A", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i8* %37, i8** %5
%38 = load i8*, i8** %5
ret i8* %38
}

LLVM IR (-O2):
@sse2_popcount2.mask33 = internal global [16 x i32] [i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51, i32 51]
@sse2_popcount2.mask55 = internal global [16 x i32] [i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85, i32 85]
@sse2_popcount2.mask0f = internal global [16 x i32] [i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15]
define i8* @sse2_popcount2(i32* %0, i32 %1) {
tail call void asm sideeffect "movdqu (%eax), %xmm5", "{ax},~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([16 x i32], [16 x i32]* @sse2_popcount2.mask55, i64 0, i64 0))
tail call void asm sideeffect "movdqu (%eax), %xmm6", "{ax},~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([16 x i32], [16 x i32]* @sse2_popcount2.mask33, i64 0, i64 0))
tail call void asm sideeffect "movdqu (%eax), %xmm7", "{ax},~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([16 x i32], [16 x i32]* @sse2_popcount2.mask0f, i64 0, i64 0))
tail call void asm sideeffect "pxor %xmm4, %xmm4", "~{dirflag},~{fpsr},~{flags}"()
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %21
4: ; preds = %2, %18
%5 = phi i64 [ %15, %18 ], [ 0, %2 ]
%6 = phi i32 [ %19, %18 ], [ %1, %2 ]
%7 = icmp ult i32 %6, 31
%8 = select i1 %7, i32 %6, i32 31
tail call void asm sideeffect "pxor %xmm3, %xmm3", "~{dirflag},~{fpsr},~{flags}"()
%9 = shl i64 %5, 32
%10 = ashr exact i64 %9, 32
br label %11
11: ; preds = %4, %11
%12 = phi i64 [ %10, %4 ], [ %15, %11 ]
%13 = phi i32 [ 0, %4 ], [ %16, %11 ]
%14 = getelementptr inbounds i32, i32* %0, i64 %12
tail call void asm sideeffect "movdqu\09 (%eax), %xmm0\09\0Amovdqa %xmm0, %xmm1\09\0Apsrlw $$1, %xmm1\09\0Apand %xmm5, %xmm0\09\0Apand %xmm5, %xmm1\09\0Apaddb %xmm1, %xmm0\09\0Amovdqa %xmm0, %xmm1\09\0Apsrlw $$2, %xmm1\09\0Apand %xmm6, %xmm0\09\0Apand %xmm6, %xmm1\09\0Apaddb %xmm1, %xmm0\09\0Amovdqa %xmm0, %xmm1\09\0Apsrlw $$4, %xmm1\09\0Apand %xmm7, %xmm0\09\0Apand %xmm7, %xmm1\09\0Apaddb %xmm1, %xmm0\09\0Apaddb %xmm0, %xmm3\09\0A", "{ax},~{dirflag},~{fpsr},~{flags}"(i32* %14)
%15 = add nsw i64 %12, 16
%16 = add nuw nsw i32 %13, 1
%17 = icmp eq i32 %16, %8
br i1 %17, label %18, label %11
18: ; preds = %11
%19 = tail call i32 @llvm.usub.sat.i32(i32 %6, i32 31)
tail call void asm sideeffect "pxor\09%xmm0, %xmm0\09\09\0Apsadbw\09%xmm0, %xmm3\09\09\0Apaddd\09%xmm3, %xmm4\09\09\0A", "~{dirflag},~{fpsr},~{flags}"()
%20 = icmp sgt i32 %19, 0
br i1 %20, label %4, label %21
21: ; preds = %18, %2
%22 = tail call i8* asm sideeffect "movhlps %xmm4, %xmm0\09\0Apaddd %xmm4, %xmm0\09\0Amovd %xmm0, %eax\09\0A", "={ax},~{dirflag},~{fpsr},~{flags}"()
ret i8* %22
}