xunge/DecIR huggingface dataset:
int securestore_key_read(char *keyname, char *keybuf, unsigned int keylen,
                         unsigned int *reallen) {
  return -1;
}


x86 assembly (clang, -O0):
<securestore_key_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<securestore_key_read>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @securestore_key_read(i8* %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
ret i32 -1
}

LLVM IR (-O2):
define i32 @securestore_key_read(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i32* nocapture readnone %3) {
ret i32 -1
}
int null_reset() { return 1; }


x86 assembly (clang, -O0):
<null_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_reset>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @null_reset() {
ret i32 1
}

LLVM IR (-O2):
define i32 @null_reset() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, int);
void cpuid_get(void *id) { memcpy(id, (void *)((0x1fff7a10)), (12)); }


x86 assembly (clang, -O0):
<cpuid_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1fff7a10,%esi
mov    $0xc,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_get>:
mov    $0x1fff7a10,%esi
mov    $0xc,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cpuid_get(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @memcpy(i8* %3, i8* inttoptr (i64 536836624 to i8*), i32 12)
ret void
}

LLVM IR (-O2):
define void @cpuid_get(i8* %0) {
%2 = tail call i32 @memcpy(i8* %0, i8* inttoptr (i64 536836624 to i8*), i32 12)
ret void
}
/* Type definitions */
struct flathdr3 {
  int dummy;
};

/* Variables and functions */
scalar_t__ oldest_header(struct flathdr3 *, struct flathdr3 *);
int newest_header(struct flathdr3 *hdr1, struct flathdr3 *hdr0) {
  return oldest_header(hdr1, hdr0) ? 0 : 1;
}


x86 assembly (clang, -O0):
<newest_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <oldest_header@plt>
mov    %rax,%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newest_header>:
push   %rax
call   1030 <oldest_header@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.flathdr3 = type { i32 }
define i32 @newest_header(%struct.flathdr3* %0, %struct.flathdr3* %1) {
%3 = alloca %struct.flathdr3*
%4 = alloca %struct.flathdr3*
store %struct.flathdr3* %0, %struct.flathdr3** %3
store %struct.flathdr3* %1, %struct.flathdr3** %4
%5 = load %struct.flathdr3*, %struct.flathdr3** %3
%6 = load %struct.flathdr3*, %struct.flathdr3** %4
%7 = call i64 @oldest_header(%struct.flathdr3* %5, %struct.flathdr3* %6)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 0, i32 1
ret i32 %10
}

LLVM IR (-O2):
%struct.flathdr3 = type { i32 }
define i32 @newest_header(%struct.flathdr3* %0, %struct.flathdr3* %1) {
%3 = tail call i64 @oldest_header(%struct.flathdr3* %0, %struct.flathdr3* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
int validate_nibble(uint8_t a) {
  if (((a >= '0') && (a <= '9')) || ((a >= 'A') && (a <= 'F')) ||
      ((a >= 'a') && (a <= 'f')))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<validate_nibble>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <validate_nibble+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1158 <validate_nibble+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     113e <validate_nibble+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jle    1158 <validate_nibble+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1164 <validate_nibble+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     1164 <validate_nibble+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <validate_nibble+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_nibble>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%al
setb   %al
and    $0xdf,%dil
add    $0xbf,%dil
cmp    $0x6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @validate_nibble(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 70
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 97
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 102
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @validate_nibble(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
int running_number() {
  static int n = 0;
  return n++;
}


x86 assembly (clang, -O0):
<running_number>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0f(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<running_number>:
mov    0x2f1e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f15(%rip)
ret

LLVM IR (-O0):
@running_number.n = internal global i32 0
define i32 @running_number() {
%1 = load i32, i32* @running_number.n
%2 = add nsw i32 %1, 1
store i32 %2, i32* @running_number.n
ret i32 %1
}

LLVM IR (-O2):
@running_number.n = internal unnamed_addr global i32 0
define i32 @running_number() {
%1 = load i32, i32* @running_number.n
%2 = add nsw i32 %1, 1
store i32 %2, i32* @running_number.n
ret i32 %1
}
void test7() {
  ({ 5; });
}


x86 assembly (clang, -O0):
<test7>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test7>:
ret

LLVM IR (-O0):
define void @test7() {
%1 = alloca i32
store i32 5, i32* %1
%2 = load i32, i32* %1
ret void
}

LLVM IR (-O2):
define void @test7() {
ret void
}
unsigned int f3(unsigned int x, int y __attribute__((unused))) {
  return (x << 1) | (x >> (8 * 4 - 1));
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%ecx
shr    $0x1f,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
mov    %edi,%eax
rol    %eax
ret

LLVM IR (-O0):
define i32 @f3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 1
%7 = load i32, i32* %3
%8 = lshr i32 %7, 31
%9 = or i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f3(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 1)
ret i32 %3
}
void fc68(int n) {
a : {
  typedef int(*b)[n];
  {
    typedef int(*c)[n];
    0;
  }
  {
    typedef int(*d)[n];
    goto a;
    0;
  };
  typedef int(*e)[n];
  0;
};
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc68>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fc68+0x7>

x86 assembly (clang, -O2):
<fc68>:
jmp    1100 <fc68>

LLVM IR (-O0):
define void @fc68(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
%4 = load i32, i32* %2
%5 = zext i32 %4 to i64
%6 = load i32, i32* %2
%7 = zext i32 %6 to i64
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
br label %3
10: ; No predecessors!
%11 = load i32, i32* %2
%12 = zext i32 %11 to i64
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
%17 = load i32, i32* %2
%18 = zext i32 %17 to i64
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc68(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ CL_QueryGetInfoMessage(char *);
void CL_QueryGetStatusMessage_f(void) { CL_QueryGetInfoMessage("getstatus"); }


x86 assembly (clang, -O0):
<CL_QueryGetStatusMessage_f>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <CL_QueryGetInfoMessage@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CL_QueryGetStatusMessage_f>:
lea    0xee9(%rip),%rdi
jmp    1030 <CL_QueryGetInfoMessage@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"getstatus\00"
define void @CL_QueryGetStatusMessage_f() {
%1 = call i32 @CL_QueryGetInfoMessage(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"getstatus\00"
define void @CL_QueryGetStatusMessage_f() {
%1 = tail call i32 @CL_QueryGetInfoMessage(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xip_fpo_add_d(double *, double, double);
double xil_fpo_add_d(double a, double b) {
  double res_d;
  xip_fpo_add_d(&res_d, a, b);
  return res_d;
}


x86 assembly (clang, -O0):
<xil_fpo_add_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    -0x18(%rbp),%rdi
call   1030 <xip_fpo_add_d@plt>
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xil_fpo_add_d>:
push   %rax
mov    %rsp,%rdi
call   1030 <xip_fpo_add_d@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @xil_fpo_add_d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = call i32 @xip_fpo_add_d(double* %5, double %6, double %7)
%9 = load double, double* %5
ret double %9
}

LLVM IR (-O2):
define double @xil_fpo_add_d(double %0, double %1) {
%3 = alloca double
%4 = bitcast double* %3 to i8*
%5 = call i32 @xip_fpo_add_d(double* %3, double %0, double %1)
%6 = load double, double* %3
ret double %6
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned int getHeight(int /*<<< orphan*/ *);
unsigned int getWidth(int /*<<< orphan*/ *);
unsigned int getNumPixels(FILE *myFile) {
  return (getWidth(myFile) * getHeight(myFile));
}


x86 assembly (clang, -O0):
<getNumPixels>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getWidth@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getHeight@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNumPixels>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <getWidth@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <getHeight@plt>
imul   %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getNumPixels(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @getWidth(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @getHeight(i32* %5)
%7 = mul i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @getNumPixels(i32* %0) {
%2 = tail call i32 @getWidth(i32* %0)
%3 = tail call i32 @getHeight(i32* %0)
%4 = mul i32 %3, %2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ nRF24L01P_setRegister(int, int);
int /*<<< orphan*/ printf(char *, int);
void nRF24L01P_setRfFrequency(int frequency) {
  int channel;
  if ((frequency < 2400) || (frequency > 2525)) {
    printf("nRF24L01P: Invalid RF Frequency setting %d\r\n", frequency);
    return;
  }
  channel = (frequency - 2400) & 0x7F;
  nRF24L01P_setRegister(0x05, channel);
}


x86 assembly (clang, -O0):
<nRF24L01P_setRfFrequency>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x960,-0x4(%rbp)
jl     1145 <nRF24L01P_setRfFrequency+0x25>
cmpl   $0x9dd,-0x4(%rbp)
jle    1159 <nRF24L01P_setRfFrequency+0x39>
mov    -0x4(%rbp),%esi
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
jmp    1174 <nRF24L01P_setRfFrequency+0x54>
mov    -0x4(%rbp),%eax
sub    $0x960,%eax
and    $0x7f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x5,%edi
call   1040 <nRF24L01P_setRegister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nRF24L01P_setRfFrequency>:
mov    %edi,%esi
lea    -0x9de(%rsi),%eax
cmp    $0xffffff81,%eax
ja     1139 <nRF24L01P_setRfFrequency+0x19>
lea    0xecc(%rip),%rdi
jmp    1030 <printf@plt>
add    $0x20,%esi
and    $0x7f,%esi
mov    $0x5,%edi
jmp    1040 <nRF24L01P_setRegister@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"nRF24L01P: Invalid RF Frequency setting %d\0D\0A\00"
define void @nRF24L01P_setRfFrequency(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 2400
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 2525
br i1 %8, label %9, label %12
9: ; preds = %6, %1
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %18
12: ; preds = %6
%13 = load i32, i32* %2
%14 = sub nsw i32 %13, 2400
%15 = and i32 %14, 127
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = call i32 @nRF24L01P_setRegister(i32 5, i32 %16)
br label %18
18: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
@.str = [45 x i8] c"nRF24L01P: Invalid RF Frequency setting %d\0D\0A\00"
define void @nRF24L01P_setRfFrequency(i32 %0) {
%2 = add i32 %0, -2526
%3 = icmp ult i32 %2, -126
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %10
6: ; preds = %1
%7 = add nuw nsw i32 %0, 32
%8 = and i32 %7, 127
%9 = tail call i32 @nRF24L01P_setRegister(i32 5, i32 %8)
br label %10
10: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ds_set_boolean(int /*<<< orphan*/, int /*<<< orphan*/, int);
void snmp_set_mib_errors(int err) { ds_set_boolean(0, 0, err); }


x86 assembly (clang, -O0):
<snmp_set_mib_errors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %esi,%esi
mov    %esi,%edi
call   1030 <ds_set_boolean@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snmp_set_mib_errors>:
mov    %edi,%edx
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <ds_set_boolean@plt>

LLVM IR (-O0):
define void @snmp_set_mib_errors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ds_set_boolean(i32 0, i32 0, i32 %3)
ret void
}

LLVM IR (-O2):
define void @snmp_set_mib_errors(i32 %0) {
%2 = tail call i32 @ds_set_boolean(i32 0, i32 0, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void signal_handler(int signum) { printf("%d\n", signum); }


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_handler>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @signal_handler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x53() {
  Assert_real((isalpha(83)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              420, ("isalpha should be 1 for S"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x53>:
push   %rbp
mov    %rsp,%rbp
mov    $0x53,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1a4,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x53>:
push   %rax
mov    $0x53,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x1a4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for S\00"
define void @t_isalpha_0x53() {
%1 = call i32 @isalpha(i32 83)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for S\00"
define void @t_isalpha_0x53() {
%1 = tail call i32 @isalpha(i32 83)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(unsigned char *);
void drawToScreen(unsigned char *scrbuf) { print(scrbuf); }


x86 assembly (clang, -O0):
<drawToScreen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawToScreen>:
jmp    1030 <print@plt>

LLVM IR (-O0):
define void @drawToScreen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @print(i8* %3)
ret void
}

LLVM IR (-O2):
define void @drawToScreen(i8* %0) {
%2 = tail call i32 @print(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void bug_report(const char *function) {
  fprintf(stderr, "PROGRAM BUG: %s\n", function);
  exit(1);
}


x86 assembly (clang, -O0):
<bug_report>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<bug_report>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [17 x i8] c"PROGRAM BUG: %s\0A\00"
define void @bug_report(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [17 x i8] c"PROGRAM BUG: %s\0A\00"
define void @bug_report(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
void const *GppcFinfoV1();
const void *pg_finfo_datefunc2(void) { return GppcFinfoV1(); }


x86 assembly (clang, -O0):
<pg_finfo_datefunc2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GppcFinfoV1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pg_finfo_datefunc2>:
xor    %eax,%eax
jmp    1030 <GppcFinfoV1@plt>

LLVM IR (-O0):
define i8* @pg_finfo_datefunc2() {
%1 = call i8* (...) @GppcFinfoV1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @pg_finfo_datefunc2() {
%1 = tail call i8* (...) @GppcFinfoV1()
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("./virgulino [-e/-d] <encrypter plugin> [-k] <compatible_key> [-m] "
         "<message> [-s] <stegno_plugin> [-i] <input_file> [-o] <output_file>");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [134 x i8] c"./virgulino [-e/-d] <encrypter plugin> [-k] <compatible_key> [-m] <message> [-s] <stegno_plugin> [-i] <input_file> [-o] <output_file>\00"
@EXIT_SUCCESS = global i32 0
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@.str = [134 x i8] c"./virgulino [-e/-d] <encrypter plugin> [-k] <compatible_key> [-m] <message> [-s] <stegno_plugin> [-i] <input_file> [-o] <output_file>\00"
@EXIT_SUCCESS = global i32 0
define void @usage() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
void *mem_calloc_func(size_t, size_t);
void *mem_calloc(size_t nmemb, size_t size) {
  if ((nmemb == 0) || (size == 0))
    return 0;
  return mem_calloc_func(nmemb, size);
}


x86 assembly (clang, -O0):
<mem_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1136 <mem_calloc+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    1143 <mem_calloc+0x33>
movq   $0x0,-0x8(%rbp)
jmp    1154 <mem_calloc+0x44>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <mem_calloc_func@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_calloc>:
test   %rdi,%rdi
je     111f <mem_calloc+0xf>
test   %rsi,%rsi
je     111f <mem_calloc+0xf>
jmp    1030 <mem_calloc_func@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @mem_calloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i64, i64* %5
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i8* null, i8** %3
br label %16
12: ; preds = %8
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = call i8* @mem_calloc_func(i64 %13, i64 %14)
store i8* %15, i8** %3
br label %16
16: ; preds = %12, %11
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @mem_calloc(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
%4 = icmp eq i64 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i8* @mem_calloc_func(i64 %0, i64 %1)
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ %7, %6 ], [ null, %2 ]
ret i8* %9
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint64_t ntru_keccak_le64(const uint8_t *x) {
  uint64_t r = 0;
  uint64_t i;
  for (i = 0; i < 8; i++)
    r |= (uint64_t)x[i] << (8 * i);
  return r;
}


x86 assembly (clang, -O0):
<ntru_keccak_le64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x8,-0x10(%rbp)
jge    1148 <ntru_keccak_le64+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    -0x10(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <ntru_keccak_le64+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntru_keccak_le64>:
ret

LLVM IR (-O0):
define i32 @ntru_keccak_le64(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
%4 = alloca i32
store i64* %0, i64** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %20, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 8
br i1 %7, label %8, label %23
8: ; preds = %5
%9 = load i64*, i64** %2
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %9, i64 %11
%13 = load i64, i64* %12
%14 = trunc i64 %13 to i32
%15 = load i32, i32* %4
%16 = mul nsw i32 8, %15
%17 = shl i32 %14, %16
%18 = load i32, i32* %3
%19 = or i32 %18, %17
store i32 %19, i32* %3
br label %20
20: ; preds = %8
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %5
23: ; preds = %5
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @ntru_keccak_le64(i64* nocapture %0) {
ret i32 poison
}
void BIO_callback_ctrl(void) {}


x86 assembly (clang, -O0):
<BIO_callback_ctrl>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_callback_ctrl>:
ret

LLVM IR (-O0):
define void @BIO_callback_ctrl() {
ret void
}

LLVM IR (-O2):
define void @BIO_callback_ctrl() {
ret void
}
int event_portal_kernel(struct PortalInternal *pint) { return -1; }


x86 assembly (clang, -O0):
<event_portal_kernel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_portal_kernel>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.PortalInternal = type opaque
define i32 @event_portal_kernel(%struct.PortalInternal* %0) {
%2 = alloca %struct.PortalInternal*
store %struct.PortalInternal* %0, %struct.PortalInternal** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.PortalInternal = type opaque
define i32 @event_portal_kernel(%struct.PortalInternal* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ system(char *);
char getch() {
  char c;
  system("stty raw -echo");
  c = getchar();
  system("stty cooked echo");
  return c;
}


x86 assembly (clang, -O0):
<getch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <system@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x1(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <system@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getch>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %eax,%ebx
lea    0xed2(%rip),%rdi
call   1030 <system@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"stty raw -echo\00"
@.str.1 = [17 x i8] c"stty cooked echo\00"
define signext i8 @getch() {
%1 = alloca i8
%2 = call i32 @system(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = call signext i8 (...) @getchar()
store i8 %3, i8* %1
%4 = call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%5 = load i8, i8* %1
ret i8 %5
}

LLVM IR (-O2):
@.str = [15 x i8] c"stty raw -echo\00"
@.str.1 = [17 x i8] c"stty cooked echo\00"
define signext i8 @getch() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call signext i8 (...) @getchar()
%3 = tail call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
ret i8 %2
}
void pcp_def_paging_metrics(void) {}


x86 assembly (clang, -O0):
<pcp_def_paging_metrics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_paging_metrics>:
ret

LLVM IR (-O0):
define void @pcp_def_paging_metrics() {
ret void
}

LLVM IR (-O2):
define void @pcp_def_paging_metrics() {
ret void
}
double mchpr1(void) {
  static double epsmch = 0.0;
  if (epsmch == 0.0) {
    double eps = 1.0;
    while ((1.0 + (eps * 0.5)) > 1.0)
      eps *= 0.5;
    epsmch = eps;
  }
  return epsmch;
}


x86 assembly (clang, -O0):
<mchpr1>:
push   %rbp
mov    %rsp,%rbp
movsd  0x2f1c(%rip),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    117f <mchpr1+0x7f>
jp     117f <mchpr1+0x7f>
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xecf(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xebb(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xeaf(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1172 <mchpr1+0x72>
movsd  0xea5(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    112c <mchpr1+0x2c>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,0x2ea9(%rip)
movsd  0x2ea1(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mchpr1>:
movsd  0x2f20(%rip),%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    115a <mchpr1+0x5a>
jp     115a <mchpr1+0x5a>
movsd  0xee4(%rip),%xmm1
movsd  0xee4(%rip),%xmm2
movapd %xmm1,%xmm0
nopl   0x0(%rax,%rax,1)
mulsd  %xmm2,%xmm0
mulsd  %xmm2,%xmm0
mulsd  %xmm2,%xmm0
mulsd  %xmm2,%xmm0
movapd %xmm0,%xmm3
mulsd  %xmm2,%xmm3
addsd  %xmm1,%xmm3
ucomisd %xmm1,%xmm3
ja     1130 <mchpr1+0x30>
movsd  %xmm0,0x2ece(%rip)
ret

LLVM IR (-O0):
@mchpr1.epsmch = internal global double 0.000000e+00
define double @mchpr1() {
%1 = alloca double
%2 = load double, double* @mchpr1.epsmch
%3 = fcmp oeq double %2, 0.000000e+00
br i1 %3, label %4, label %14
4: ; preds = %0
store double 1.000000e+00, double* %1
br label %5
5: ; preds = %9, %4
%6 = load double, double* %1
%7 = call double @llvm.fmuladd.f64(double %6, double 5.000000e-01, double 1.000000e+00)
%8 = fcmp ogt double %7, 1.000000e+00
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load double, double* %1
%11 = fmul double %10, 5.000000e-01
store double %11, double* %1
br label %5
12: ; preds = %5
%13 = load double, double* %1
store double %13, double* @mchpr1.epsmch
br label %14
14: ; preds = %12, %0
%15 = load double, double* @mchpr1.epsmch
ret double %15
}

LLVM IR (-O2):
@mchpr1.epsmch = internal unnamed_addr global double 0.000000e+00
define double @mchpr1() {
%1 = load double, double* @mchpr1.epsmch
%2 = fcmp oeq double %1, 0.000000e+00
br i1 %2, label %3, label %12
3: ; preds = %0, %3
%4 = phi double [ %8, %3 ], [ 1.000000e+00, %0 ]
%5 = fmul double %4, 5.000000e-01
%6 = fmul double %5, 5.000000e-01
%7 = fmul double %6, 5.000000e-01
%8 = fmul double %7, 5.000000e-01
%9 = tail call double @llvm.fmuladd.f64(double %8, double 5.000000e-01, double 1.000000e+00)
%10 = fcmp ogt double %9, 1.000000e+00
br i1 %10, label %3, label %11
11: ; preds = %3
store double %8, double* @mchpr1.epsmch
br label %12
12: ; preds = %11, %0
%13 = phi double [ %8, %11 ], [ %1, %0 ]
ret double %13
}
void RTManifestVerify(void) {}


x86 assembly (clang, -O0):
<RTManifestVerify>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTManifestVerify>:
ret

LLVM IR (-O0):
define void @RTManifestVerify() {
ret void
}

LLVM IR (-O2):
define void @RTManifestVerify() {
ret void
}
/* Variables and functions */
long *IncomePlus(long *);
int /*<<< orphan*/ printf(char *, long);
int main(void) {
  long your_pay = 30000L;
  long *pold_pay = &your_pay;
  long *pnew_pay = NULL;
  pnew_pay = IncomePlus(pold_pay);
  printf("\nOld pay = $%ld", *pold_pay);
  printf("\nNew pay = $%ld", *pnew_pay);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x7530,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <IncomePlus@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rsi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
mov    -0x20(%rbp),%rax
mov    (%rax),%rsi
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movq   $0x7530,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1040 <IncomePlus@plt>
mov    %rax,%rbx
mov    0x8(%rsp),%rsi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    (%rbx),%rsi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"\0AOld pay = $%ld\00"
@.str.1 = [16 x i8] c"\0ANew pay = $%ld\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64*
%4 = alloca i64*
store i32 0, i32* %1
store i64 30000, i64* %2
store i64* %2, i64** %3
store i64* null, i64** %4
%5 = load i64*, i64** %3
%6 = call i64* @IncomePlus(i64* %5)
store i64* %6, i64** %4
%7 = load i64*, i64** %3
%8 = load i64, i64* %7
%9 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i64 %8)
%10 = load i64*, i64** %4
%11 = load i64, i64* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i64 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"\0AOld pay = $%ld\00"
@.str.1 = [16 x i8] c"\0ANew pay = $%ld\00"
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
store i64 30000, i64* %1
%3 = call i64* @IncomePlus(i64* %1)
%4 = load i64, i64* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i64 %4)
%6 = load i64, i64* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i64 %6)
ret i32 0
}
int virtual_machine_object_str_internal_marker(void *object_internal) {
  (void)object_internal;
  return 0;
}


x86 assembly (clang, -O0):
<virtual_machine_object_str_internal_marker>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<virtual_machine_object_str_internal_marker>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @virtual_machine_object_str_internal_marker(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @virtual_machine_object_str_internal_marker(i8* nocapture readnone %0) {
ret i32 0
}
void fw3_xt_free_target_udata(struct xtables_target *t) { return; }


x86 assembly (clang, -O0):
<fw3_xt_free_target_udata>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fw3_xt_free_target_udata>:
ret

LLVM IR (-O0):
%struct.xtables_target = type opaque
define void @fw3_xt_free_target_udata(%struct.xtables_target* %0) {
%2 = alloca %struct.xtables_target*
store %struct.xtables_target* %0, %struct.xtables_target** %2
ret void
}

LLVM IR (-O2):
%struct.xtables_target = type opaque
define void @fw3_xt_free_target_udata(%struct.xtables_target* nocapture %0) {
ret void
}
unsigned int system_atomics_increment(volatile long *value_ptr) {
  unsigned int previous_value;
  { previous_value = __sync_fetch_and_add(value_ptr, 1) + 1; }
  return previous_value;
}


x86 assembly (clang, -O0):
<system_atomics_increment>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
lock xadd %rax,(%rcx)
add    $0x1,%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_atomics_increment>:
mov    $0x1,%eax
lock xadd %rax,(%rdi)
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @system_atomics_increment(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = atomicrmw add i64* %4, i64 1 seq_cst
%6 = add nsw i64 %5, 1
%7 = trunc i64 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @system_atomics_increment(i64* nocapture %0) {
%2 = atomicrmw add i64* %0, i64 1 seq_cst
%3 = trunc i64 %2 to i32
%4 = add i32 %3, 1
ret i32 %4
}
int returns_23(void) { return 23; }


x86 assembly (clang, -O0):
<returns_23>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<returns_23>:
mov    $0x17,%eax
ret

LLVM IR (-O0):
define i32 @returns_23() {
ret i32 23
}

LLVM IR (-O2):
define i32 @returns_23() {
ret i32 23
}
/* Variables and functions */
int rand();
int init_hp() {
  int hp;
  int min = 20;
  int max = 30;
  hp = (rand() % (max - min + 1)) + min;
  return hp;
}


x86 assembly (clang, -O0):
<init_hp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x14,-0x8(%rbp)
movl   $0x1e,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0xc(%rbp),%ecx
sub    -0x8(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_hp>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x2e8ba2e9,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%edx
lea    (%rcx,%rdx,2),%ecx
neg    %ecx
add    %ecx,%eax
add    $0x14,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @init_hp() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 20, i32* %2
store i32 30, i32* %3
%4 = call i32 (...) @rand()
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = sub nsw i32 %5, %6
%8 = add nsw i32 %7, 1
%9 = srem i32 %4, %8
%10 = load i32, i32* %2
%11 = add nsw i32 %9, %10
store i32 %11, i32* %1
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @init_hp() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 11
%3 = add nsw i32 %2, 20
ret i32 %3
}
void get_rgb_parts(unsigned int color, unsigned char *r, unsigned char *g,
                   unsigned char *b) {
  *r = ((color & 0xFF0000) >> 2 * 8);
  *g = ((color & 0x00FF00) >> 8);
  *b = (color & 0x0000FF);
}


x86 assembly (clang, -O0):
<get_rgb_parts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff0000,%eax
shr    $0x10,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
shr    $0x8,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rgb_parts>:
mov    %edi,%eax
shr    $0x10,%edi
mov    %dil,(%rsi)
mov    %ah,(%rdx)
mov    %al,(%rcx)
ret

LLVM IR (-O0):
define void @get_rgb_parts(i32 %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = and i32 %9, 16711680
%11 = lshr i32 %10, 16
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %6
store i8 %12, i8* %13
%14 = load i32, i32* %5
%15 = and i32 %14, 65280
%16 = lshr i32 %15, 8
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %7
store i8 %17, i8* %18
%19 = load i32, i32* %5
%20 = and i32 %19, 255
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %8
store i8 %21, i8* %22
ret void
}

LLVM IR (-O2):
define void @get_rgb_parts(i32 %0, i8* nocapture writeonly %1, i8* nocapture writeonly %2, i8* nocapture writeonly %3) {
%5 = lshr i32 %0, 16
%6 = trunc i32 %5 to i8
store i8 %6, i8* %1
%7 = lshr i32 %0, 8
%8 = trunc i32 %7 to i8
store i8 %8, i8* %2
%9 = trunc i32 %0 to i8
store i8 %9, i8* %3
ret void
}
void rct_set_adc_clk_src(int src) {}


x86 assembly (clang, -O0):
<rct_set_adc_clk_src>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rct_set_adc_clk_src>:
ret

LLVM IR (-O0):
define void @rct_set_adc_clk_src(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @rct_set_adc_clk_src(i32 %0) {
ret void
}
/* Variables and functions */
int core9_swap(char *, int);
int U_EMRPIE_swap(char *record, int torev) {
  return (core9_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMRPIE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core9_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRPIE_swap>:
jmp    1030 <core9_swap@plt>

LLVM IR (-O0):
define i32 @U_EMRPIE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core9_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMRPIE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core9_swap(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void dump_raw(char *data, int len) {
  int i = 0;
  for (i = 0; i < len; i++) {
    printf("%02x ", *(data++));
  }
}


x86 assembly (clang, -O0):
<dump_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1165 <dump_raw+0x55>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <dump_raw+0x1d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_raw>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1146 <dump_raw+0x36>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %ebx,%r12d
jne    1130 <dump_raw+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%02x \00"
define void @dump_raw(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %14)
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%02x \00"
define void @dump_raw(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 0, %2 ]
%6 = phi i8* [ %7, %4 ], [ %0, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
%10 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i32 %5, 1
%12 = icmp eq i32 %11, %1
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ helper_double_4_recursive(double *, int);
void helper_double_4(double *buf) { helper_double_4_recursive(buf, 4); }


x86 assembly (clang, -O0):
<helper_double_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <helper_double_4_recursive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helper_double_4>:
mov    $0x4,%esi
jmp    1030 <helper_double_4_recursive@plt>

LLVM IR (-O0):
define void @helper_double_4(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @helper_double_4_recursive(double* %3, i32 4)
ret void
}

LLVM IR (-O2):
define void @helper_double_4(double* %0) {
%2 = tail call i32 @helper_double_4_recursive(double* %0, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void ExperimentalRerankTopFile() { fprintf(stderr, "Unimplemented.\n"); }


x86 assembly (clang, -O0):
<ExperimentalRerankTopFile>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExperimentalRerankTopFile>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [16 x i8] c"Unimplemented.\0A\00"
define void @ExperimentalRerankTopFile() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [16 x i8] c"Unimplemented.\0A\00"
define void @ExperimentalRerankTopFile() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
scalar_t__ geopm_region_id_is_nested(int);
uint64_t geopm_region_id_parent(uint64_t rid) {
  return (geopm_region_id_is_nested(rid) ? ((rid << 32) >> 32) : 0);
}


x86 assembly (clang, -O0):
<geopm_region_id_parent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <geopm_region_id_is_nested@plt>
cmp    $0x0,%rax
je     1146 <geopm_region_id_parent+0x36>
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
shl    %cl,%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    %eax,-0x8(%rbp)
jmp    1150 <geopm_region_id_parent+0x40>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1150 <geopm_region_id_parent+0x40>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<geopm_region_id_parent>:
push   %rax
call   1030 <geopm_region_id_is_nested@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @geopm_region_id_parent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @geopm_region_id_is_nested(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = shl i32 %7, 32
%9 = ashr i32 %8, 32
br label %11
10: ; preds = %1
br label %11
11: ; preds = %10, %6
%12 = phi i32 [ %9, %6 ], [ 0, %10 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @geopm_region_id_parent(i32 %0) {
%2 = tail call i64 @geopm_region_id_is_nested(i32 %0)
ret i32 0
}