xunge/DecIR huggingface dataset:
/* Type definitions */
struct fifo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct fifo *);
void fifo_destroy(struct fifo *f) { free(f); }


x86 assembly (clang, -O0):
<fifo_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifo_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.fifo = type { i32 }
define void @fifo_destroy(%struct.fifo* %0) {
%2 = alloca %struct.fifo*
store %struct.fifo* %0, %struct.fifo** %2
%3 = load %struct.fifo*, %struct.fifo** %2
%4 = call i32 @free(%struct.fifo* %3)
ret void
}

LLVM IR (-O2):
%struct.fifo = type { i32 }
define void @fifo_destroy(%struct.fifo* nocapture %0) {
%2 = tail call i32 @free(%struct.fifo* %0)
ret void
}
/* Type definitions */
typedef int atomic_int;

/* Variables and functions */
int ATOMIC_VAR_INIT(int);
int /*<<< orphan*/ abort();
void test_add_sub(void) {
  atomic_int i = ATOMIC_VAR_INIT(1);
  i += 2;
  if (i != 3)
    abort();
  i -= 2;
  if (i != 1)
    abort();
  if ((i += 2) != 3)
    abort();
  if ((i -= 2) != 1)
    abort();
}


x86 assembly (clang, -O0):
<test_add_sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1040 <ATOMIC_VAR_INIT@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
je     114f <test_add_sub+0x2f>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x4(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     1169 <test_add_sub+0x49>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x3,%eax
je     1182 <test_add_sub+0x62>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x4(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x1,%eax
je     119b <test_add_sub+0x7b>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_add_sub>:
push   %rax
mov    $0x1,%edi
call   1040 <ATOMIC_VAR_INIT@plt>
cmp    $0x1,%eax
jne    1132 <test_add_sub+0x12>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @test_add_sub() {
%1 = alloca i32
%2 = call i32 @ATOMIC_VAR_INIT(i32 1)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 2
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 3
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 (...) @abort()
unreachable
9: ; preds = %0
%10 = load i32, i32* %1
%11 = sub nsw i32 %10, 2
store i32 %11, i32* %1
%12 = load i32, i32* %1
%13 = icmp ne i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %9
%17 = load i32, i32* %1
%18 = add nsw i32 %17, 2
store i32 %18, i32* %1
%19 = icmp ne i32 %18, 3
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = call i32 (...) @abort()
unreachable
22: ; preds = %16
%23 = load i32, i32* %1
%24 = sub nsw i32 %23, 2
store i32 %24, i32* %1
%25 = icmp ne i32 %24, 1
br i1 %25, label %26, label %28
26: ; preds = %22
%27 = call i32 (...) @abort()
unreachable
28: ; preds = %22
ret void
}

LLVM IR (-O2):
define void @test_add_sub() {
%1 = tail call i32 @ATOMIC_VAR_INIT(i32 1)
%2 = icmp eq i32 %1, 1
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char const *);
void DieWithSystemMessage(const char *msg) { perror(msg); }


x86 assembly (clang, -O0):
<DieWithSystemMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DieWithSystemMessage>:
jmp    1030 <perror@plt>

LLVM IR (-O0):
define void @DieWithSystemMessage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
ret void
}

LLVM IR (-O2):
define void @DieWithSystemMessage(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void convert_16_bit_to_byte_address(uint16_t value, uint8_t *data) {
  data[0] = value & 0xFF;
  data[1] = (value >> 8) & 0xFF;
}


x86 assembly (clang, -O0):
<convert_16_bit_to_byte_address>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_16_bit_to_byte_address>:
mov    %edi,%eax
movzbl %al,%ecx
mov    %ecx,(%rsi)
movzbl %ah,%eax
mov    %eax,0x4(%rsi)
ret

LLVM IR (-O0):
define void @convert_16_bit_to_byte_address(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
%9 = load i32, i32* %3
%10 = ashr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32*, i32** %4
%13 = getelementptr inbounds i32, i32* %12, i64 1
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @convert_16_bit_to_byte_address(i32 %0, i32* nocapture writeonly %1) {
%3 = and i32 %0, 255
store i32 %3, i32* %1
%4 = lshr i32 %0, 8
%5 = and i32 %4, 255
%6 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %5, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ psw_write_bit(int, int /*<<< orphan*/);
void psw_clr_ac(void) { psw_write_bit(6, 0); }


x86 assembly (clang, -O0):
<psw_clr_ac>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
xor    %esi,%esi
call   1030 <psw_write_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<psw_clr_ac>:
mov    $0x6,%edi
xor    %esi,%esi
jmp    1030 <psw_write_bit@plt>

LLVM IR (-O0):
define void @psw_clr_ac() {
%1 = call i32 @psw_write_bit(i32 6, i32 0)
ret void
}

LLVM IR (-O2):
define void @psw_clr_ac() {
%1 = tail call i32 @psw_write_bit(i32 6, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ inv_mix_column(unsigned char *);
void inverse_mix(unsigned char *state) {
  for (unsigned short int i = 0; i < 4; i++)
    inv_mix_column((state + i * 4));
}


x86 assembly (clang, -O0):
<inverse_mix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movw   $0x0,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
cmp    $0x4,%eax
jge    1155 <inverse_mix+0x45>
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%eax
shl    $0x2,%eax
cltq
add    %rax,%rdi
call   1030 <inv_mix_column@plt>
mov    -0xa(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xa(%rbp)
jmp    1122 <inverse_mix+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverse_mix>:
push   %rbx
mov    %rdi,%rbx
call   1030 <inv_mix_column@plt>
lea    0x4(%rbx),%rdi
call   1030 <inv_mix_column@plt>
lea    0x8(%rbx),%rdi
call   1030 <inv_mix_column@plt>
add    $0xc,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <inv_mix_column@plt>

LLVM IR (-O0):
define void @inverse_mix(i8* %0) {
%2 = alloca i8*
%3 = alloca i16
store i8* %0, i8** %2
store i16 0, i16* %3
br label %4
4: ; preds = %16, %1
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = icmp slt i32 %6, 4
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i16, i16* %3
%11 = zext i16 %10 to i32
%12 = mul nsw i32 %11, 4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %9, i64 %13
%15 = call i32 @inv_mix_column(i8* %14)
br label %16
16: ; preds = %8
%17 = load i16, i16* %3
%18 = add i16 %17, 1
store i16 %18, i16* %3
br label %4
19: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @inverse_mix(i8* %0) {
%2 = tail call i32 @inv_mix_column(i8* %0)
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = tail call i32 @inv_mix_column(i8* %3)
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = tail call i32 @inv_mix_column(i8* %5)
%7 = getelementptr inbounds i8, i8* %0, i64 12
%8 = tail call i32 @inv_mix_column(i8* %7)
ret void
}
int HelpItem18(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem18>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem18>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem18() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem18() {
ret i32 0
}
int logicalShift(int x, int n) {
  int mask = ~((0x1 << 31) >> n << 1);
  return x >> n & mask;
}


x86 assembly (clang, -O0):
<logicalShift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x80000000,%eax
sar    %cl,%eax
shl    $0x1,%eax
xor    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logicalShift>:
mov    %esi,%ecx
mov    $0x80000000,%eax
sar    %cl,%eax
add    %eax,%eax
not    %eax
sar    %cl,%edi
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = ashr i32 -2147483648, %6
%8 = shl i32 %7, 1
%9 = xor i32 %8, -1
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = ashr i32 %10, %11
%13 = load i32, i32* %5
%14 = and i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = ashr i32 -2147483648, %1
%4 = shl i32 %3, 1
%5 = xor i32 %4, -1
%6 = ashr i32 %0, %1
%7 = and i32 %6, %5
ret i32 %7
}
int hidden_str(const char *str) { return 0; }


x86 assembly (clang, -O0):
<hidden_str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hidden_str>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hidden_str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @hidden_str(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;
typedef int int8_t;

/* Variables and functions */
uint64_t rotl64(uint64_t x, int8_t r) {
  r = r % 64;
  if (r < 0)
    r += 64;
  return (x << r) | (x >> (64 - r));
}


x86 assembly (clang, -O0):
<rotl64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    112b <rotl64+0x2b>
mov    -0x8(%rbp),%eax
add    $0x40,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x40,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl64>:
lea    0x3f(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
and    $0xffffffc0,%eax
sub    %eax,%esi
lea    0x40(%rsi),%eax
test   %esi,%esi
movzbl %al,%ecx
cmovns %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotl64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = srem i32 %5, 64
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 64
store i32 %11, i32* %4
br label %12
12: ; preds = %9, %2
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = shl i32 %13, %14
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = sub nsw i32 64, %17
%19 = ashr i32 %16, %18
%20 = or i32 %15, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @rotl64(i32 %0, i32 %1) {
%3 = srem i32 %1, 64
%4 = icmp slt i32 %3, 0
%5 = add nsw i32 %3, 64
%6 = select i1 %4, i32 %5, i32 %3
%7 = shl i32 %0, %6
%8 = sub nuw nsw i32 64, %6
%9 = ashr i32 %0, %8
%10 = or i32 %9, %7
ret i32 %10
}
int test_imm_D1int32_mem(int *val) {
  return ((*val) & (0xD1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D1int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xd1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D1int32_mem>:
testb  $0xd1,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D1int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 209
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D1int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 209
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t coap_build_code(uint8_t _class, uint8_t detail) {
  return (_class << 5) | detail;
}


x86 assembly (clang, -O0):
<coap_build_code>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x5,%eax
or     -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<coap_build_code>:
mov    %edi,%eax
shl    $0x5,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @coap_build_code(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 5
%7 = load i32, i32* %4
%8 = or i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @coap_build_code(i32 %0, i32 %1) {
%3 = shl i32 %0, 5
%4 = or i32 %3, %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void eat(int i) {
  printf("\tFilosofo#%d esta COMENDO\n", i);
  return;
}


x86 assembly (clang, -O0):
<eat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eat>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"\09Filosofo#%d esta COMENDO\0A\00"
define void @eat(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"\09Filosofo#%d esta COMENDO\0A\00"
define void @eat(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
double atof(char const *);
double __atof(const char *nptr) { return atof(nptr); }


x86 assembly (clang, -O0):
<__atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atof>:
jmp    1030 <atof@plt>

LLVM IR (-O0):
define double @__atof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @atof(i8* %3)
ret double %4
}

LLVM IR (-O2):
define double @__atof(i8* nocapture %0) {
%2 = tail call double @atof(i8* %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ Scl_ConGetOutReq(int);
float Scl_Int2Flt(int /*<<< orphan*/);
float Scl_ConGetOutReqFloat(int i) { return Scl_Int2Flt(Scl_ConGetOutReq(i)); }


x86 assembly (clang, -O0):
<Scl_ConGetOutReqFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <Scl_ConGetOutReq@plt>
mov    %eax,%edi
call   1030 <Scl_Int2Flt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Scl_ConGetOutReqFloat>:
push   %rax
call   1040 <Scl_ConGetOutReq@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <Scl_Int2Flt@plt>

LLVM IR (-O0):
define float @Scl_ConGetOutReqFloat(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @Scl_ConGetOutReq(i32 %3)
%5 = call float @Scl_Int2Flt(i32 %4)
ret float %5
}

LLVM IR (-O2):
define float @Scl_ConGetOutReqFloat(i32 %0) {
%2 = tail call i32 @Scl_ConGetOutReq(i32 %0)
%3 = tail call float @Scl_Int2Flt(i32 %2)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ _open_cb(char const *);
int /*<<< orphan*/ warn_text_ui(char *);
bool cmd_open(const char *arg) {
  if (!arg) {
    warn_text_ui("Expected a file for the open command");
    goto EXIT;
  }
  _open_cb(arg);
EXIT:
  return true;
}


x86 assembly (clang, -O0):
<cmd_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <cmd_open+0x28>
lea    0xec2(%rip),%rdi
call   1030 <warn_text_ui@plt>
jmp    1151 <cmd_open+0x31>
mov    -0x8(%rbp),%rdi
call   1040 <_open_cb@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_open>:
push   %rax
test   %rdi,%rdi
je     112d <cmd_open+0xd>
call   1040 <_open_cb@plt>
jmp    1139 <cmd_open+0x19>
lea    0xecc(%rip),%rdi
call   1030 <warn_text_ui@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"Expected a file for the open command\00"
define i32 @cmd_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = call i32 @warn_text_ui(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
br label %10
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @_open_cb(i8* %8)
br label %10
10: ; preds = %7, %5
ret i32 1
}

LLVM IR (-O2):
@.str = [37 x i8] c"Expected a file for the open command\00"
define i32 @cmd_open(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @warn_text_ui(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %1
%6 = tail call i32 @_open_cb(i8* %0)
br label %7
7: ; preds = %5, %3
ret i32 1
}
int pantagon(int i) { return i * (3 * i - 1) / 2; }


x86 assembly (clang, -O0):
<pantagon>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x3,-0x4(%rbp),%ecx
sub    $0x1,%ecx
imul   %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<pantagon>:
lea    (%rdi,%rdi,2),%ecx
add    $0xffffffff,%ecx
imul   %edi,%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @pantagon(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 3, %4
%6 = sub nsw i32 %5, 1
%7 = mul nsw i32 %3, %6
%8 = sdiv i32 %7, 2
ret i32 %8
}

LLVM IR (-O2):
define i32 @pantagon(i32 %0) {
%2 = mul nsw i32 %0, 3
%3 = add nsw i32 %2, -1
%4 = mul nsw i32 %3, %0
%5 = sdiv i32 %4, 2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x29() {
  Assert_real((isprint(41)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              210, ("isprint should be 1 for )"));
}


x86 assembly (clang, -O0):
<t_isprint_0x29>:
push   %rbp
mov    %rsp,%rbp
mov    $0x29,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xd2,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x29>:
push   %rax
mov    $0x29,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0xd2,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for )\00"
define void @t_isprint_0x29() {
%1 = call i32 @isprint(i32 41)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 210, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for )\00"
define void @t_isprint_0x29() {
%1 = tail call i32 @isprint(i32 41)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 210, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t *ip_dstaddr(uint8_t *p_ip) { return p_ip + 16; }


x86 assembly (clang, -O0):
<ip_dstaddr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_dstaddr>:
lea    0x40(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @ip_dstaddr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 16
ret i32* %4
}

LLVM IR (-O2):
define i32* @ip_dstaddr(i32* readnone %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 16
ret i32* %2
}
void GPMCWEAndOETimingConfig(unsigned int baseAddr, unsigned int csNum,
                             unsigned int conf) {
  (*((volatile unsigned int *)(baseAddr + (0x6C + (csNum * (0x30)))))) = conf;
}


x86 assembly (clang, -O0):
<GPMCWEAndOETimingConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%edx
add    $0x6c,%edx
add    %edx,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCWEAndOETimingConfig>:
lea    (%rsi,%rsi,2),%eax
shl    $0x4,%eax
add    %edi,%eax
add    $0x6c,%eax
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPMCWEAndOETimingConfig(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = mul i32 %9, 48
%11 = add i32 108, %10
%12 = add i32 %8, %11
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 %7, i32* %14
ret void
}

LLVM IR (-O2):
define void @GPMCWEAndOETimingConfig(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %1, 48
%5 = add i32 %0, 108
%6 = add i32 %5, %4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %2, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ adc8(int /*<<< orphan*/);
int /*<<< orphan*/ indirecty();
int /*<<< orphan*/ readmem65816(int /*<<< orphan*/);
void adcIndirecty8(void) { adc8(readmem65816(indirecty())); }


x86 assembly (clang, -O0):
<adcIndirecty8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <indirecty@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
call   1040 <adc8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adcIndirecty8>:
push   %rax
xor    %eax,%eax
call   1030 <indirecty@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <adc8@plt>

LLVM IR (-O0):
define void @adcIndirecty8() {
%1 = call i32 (...) @indirecty()
%2 = call i32 @readmem65816(i32 %1)
%3 = call i32 @adc8(i32 %2)
ret void
}

LLVM IR (-O2):
define void @adcIndirecty8() {
%1 = tail call i32 (...) @indirecty()
%2 = tail call i32 @readmem65816(i32 %1)
%3 = tail call i32 @adc8(i32 %2)
ret void
}
double test_tan(double x) { return __builtin_tan(x); }


x86 assembly (clang, -O0):
<test_tan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_tan>:
jmp    1030 <tan@plt>

LLVM IR (-O0):
define double @test_tan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @tan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test_tan(double %0) {
%2 = tail call double @tan(double %0)
ret double %2
}
void mm_init_cgroup(struct mm_struct *mm, struct task_struct *p) {}


x86 assembly (clang, -O0):
<mm_init_cgroup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_init_cgroup>:
ret

LLVM IR (-O0):
%struct.mm_struct = type opaque
%struct.task_struct = type opaque
define void @mm_init_cgroup(%struct.mm_struct* %0, %struct.task_struct* %1) {
%3 = alloca %struct.mm_struct*
%4 = alloca %struct.task_struct*
store %struct.mm_struct* %0, %struct.mm_struct** %3
store %struct.task_struct* %1, %struct.task_struct** %4
ret void
}

LLVM IR (-O2):
%struct.mm_struct = type opaque
%struct.task_struct = type opaque
define void @mm_init_cgroup(%struct.mm_struct* nocapture %0, %struct.task_struct* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ veg_info_destructor();
void ___v_exitfunc(int ___ar, void *___ar2) { veg_info_destructor(); }


x86 assembly (clang, -O0):
<___v_exitfunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <veg_info_destructor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___v_exitfunc>:
xor    %eax,%eax
jmp    1030 <veg_info_destructor@plt>

LLVM IR (-O0):
define void @___v_exitfunc(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 (...) @veg_info_destructor()
ret void
}

LLVM IR (-O2):
define void @___v_exitfunc(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @veg_info_destructor()
ret void
}
unsigned int hash32int(unsigned int i) {
  i = (i << 15) - i - 1;
  i = i ^ (i >> 12);
  i = i + (i << 2);
  i = i ^ (i >> 4);
  i = i * 2057;
  i = i ^ (i >> 16);
  return i;
}


x86 assembly (clang, -O0):
<hash32int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xf,%eax
sub    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0xc,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x2,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x4,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
imul   $0x809,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x10,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash32int>:
mov    %edi,%eax
shl    $0xf,%eax
not    %edi
add    %eax,%edi
mov    %edi,%eax
shr    $0xc,%eax
xor    %edi,%eax
lea    (%rax,%rax,4),%eax
mov    %eax,%ecx
shr    $0x4,%ecx
xor    %eax,%ecx
imul   $0x809,%ecx,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash32int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 15
%5 = load i32, i32* %2
%6 = sub i32 %4, %5
%7 = sub i32 %6, 1
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = lshr i32 %9, 12
%11 = xor i32 %8, %10
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = load i32, i32* %2
%14 = shl i32 %13, 2
%15 = add i32 %12, %14
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = load i32, i32* %2
%18 = lshr i32 %17, 4
%19 = xor i32 %16, %18
store i32 %19, i32* %2
%20 = load i32, i32* %2
%21 = mul i32 %20, 2057
store i32 %21, i32* %2
%22 = load i32, i32* %2
%23 = load i32, i32* %2
%24 = lshr i32 %23, 16
%25 = xor i32 %22, %24
store i32 %25, i32* %2
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @hash32int(i32 %0) {
%2 = mul i32 %0, 32767
%3 = add i32 %2, -1
%4 = lshr i32 %3, 12
%5 = xor i32 %4, %3
%6 = mul i32 %5, 5
%7 = lshr i32 %6, 4
%8 = xor i32 %7, %6
%9 = mul i32 %8, 2057
%10 = lshr i32 %9, 16
%11 = xor i32 %10, %9
ret i32 %11
}
/* Variables and functions */
int Pop();
int /*<<< orphan*/ Push(int);
int CmdMultiply(void) {
  Push(Pop() * Pop());
  return 0;
}


x86 assembly (clang, -O0):
<CmdMultiply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <Pop@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Pop@plt>
mov    -0x4(%rbp),%edi
imul   %eax,%edi
call   1040 <Push@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CmdMultiply>:
push   %rbx
xor    %eax,%eax
call   1030 <Pop@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <Pop@plt>
imul   %eax,%ebx
mov    %ebx,%edi
call   1040 <Push@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @CmdMultiply() {
%1 = call i32 (...) @Pop()
%2 = call i32 (...) @Pop()
%3 = mul nsw i32 %1, %2
%4 = call i32 @Push(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @CmdMultiply() {
%1 = tail call i32 (...) @Pop()
%2 = tail call i32 (...) @Pop()
%3 = mul nsw i32 %2, %1
%4 = tail call i32 @Push(i32 %3)
ret i32 0
}
void led_off(void) { (*((volatile unsigned long *)0x400253FC)) &= ~(0x01); }


x86 assembly (clang, -O0):
<led_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400253fc,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    $0x400253fc,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_off>:
andq   $0xfffffffffffffffe,0x400253fc
40 fe
ret

LLVM IR (-O0):
define void @led_off() {
%1 = load volatile i64, i64* inttoptr (i64 1073894396 to i64*)
%2 = and i64 %1, -2
store volatile i64 %2, i64* inttoptr (i64 1073894396 to i64*)
ret void
}

LLVM IR (-O2):
define void @led_off() {
%1 = load volatile i64, i64* inttoptr (i64 1073894396 to i64*)
%2 = and i64 %1, -2
store volatile i64 %2, i64* inttoptr (i64 1073894396 to i64*)
ret void
}
int test_imm_00int8_mem(signed char *val) {
  return ((*val) & (-0x00 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0xffffffd8,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_00int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 0
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_00int8_mem(i8* nocapture readnone %0) {
ret i32 -40
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
int exists_p(const char *path) {
  struct stat status;
  if (stat(path, &status) < 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<exists_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jge    113f <exists_p+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1146 <exists_p+0x36>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exists_p>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
shr    $0x3f,%rax
xor    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @exists_p(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @exists_p(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = lshr i64 %4, 63
%6 = trunc i64 %5 to i32
%7 = xor i32 %6, 1
ret i32 %7
}
void led_status_found_cardsystem(void) {}


x86 assembly (clang, -O0):
<led_status_found_cardsystem>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_status_found_cardsystem>:
ret

LLVM IR (-O0):
define void @led_status_found_cardsystem() {
ret void
}

LLVM IR (-O2):
define void @led_status_found_cardsystem() {
ret void
}
void sequence_zero_stats(void) {}


x86 assembly (clang, -O0):
<sequence_zero_stats>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequence_zero_stats>:
ret

LLVM IR (-O0):
define void @sequence_zero_stats() {
ret void
}

LLVM IR (-O2):
define void @sequence_zero_stats() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int quaddobl_Newton_step(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(197, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<quaddobl_Newton_step>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xc5,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quaddobl_Newton_step>:
mov    $0xc5,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @quaddobl_Newton_step() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 197, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @quaddobl_Newton_step() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 197, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void POMDP_FG_OPTS_showUsageBrief(FILE *file, char *exec_name) {
  fprintf(file, "Usage: %s [opts...] [args...]\n", exec_name);
  fprintf(file, "Use '-h' for help.\n");
}


x86 assembly (clang, -O0):
<POMDP_FG_OPTS_showUsageBrief>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xede(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<POMDP_FG_OPTS_showUsageBrief>:
push   %rbx
mov    %rsi,%rdx
mov    %rdi,%rbx
lea    0xed2(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
lea    0xee3(%rip),%rdi
mov    $0x13,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Usage: %s [opts...] [args...]\0A\00"
@.str.1 = [20 x i8] c"Use '-h' for help.\0A\00"
define void @POMDP_FG_OPTS_showUsageBrief(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 (i32*, i8*, ...) @fprintf(i32* %5, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32*, i32** %3
%9 = call i32 (i32*, i8*, ...) @fprintf(i32* %8, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"Usage: %s [opts...] [args...]\0A\00"
@.str.1 = [20 x i8] c"Use '-h' for help.\0A\00"
define void @POMDP_FG_OPTS_showUsageBrief(i32* nocapture %0, i8* %1) {
%3 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %1)
%4 = tail call i64 @fwrite(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i64 19, i64 1, i32* %0)
ret void
}
void ASN1_check_infinite_end(void) {}


x86 assembly (clang, -O0):
<ASN1_check_infinite_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_check_infinite_end>:
ret

LLVM IR (-O0):
define void @ASN1_check_infinite_end() {
ret void
}

LLVM IR (-O2):
define void @ASN1_check_infinite_end() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ gmp_randstate_t;

/* Variables and functions */
int gmp_urandomb_ui(int /*<<< orphan*/, int);
float getrandom_3(gmp_randstate_t state) {
  union {
    uint32_t ui;
    float f;
  } x;
  do
    x.ui = gmp_urandomb_ui(state, 32);
  while ((x.ui & 0x7F800000) == 0x7F800000);
  return x.f;
}


x86 assembly (clang, -O0):
<getrandom_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x20,%esi
call   1030 <gmp_urandomb_ui@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7f800000,%eax
cmp    $0x7f800000,%eax
je     111b <getrandom_3+0xb>
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getrandom_3>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
mov    $0x20,%esi
call   1030 <gmp_urandomb_ui@plt>
mov    %eax,%ecx
not    %ecx
test   $0x7f800000,%ecx
je     1120 <getrandom_3+0x10>
movd   %eax,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define float @getrandom_3(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
store i32 %0, i32* %2
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = call i32 @gmp_urandomb_ui(i32 %5, i32 32)
%7 = bitcast %union.anon* %3 to i32*
store i32 %6, i32* %7
br label %8
8: ; preds = %4
%9 = bitcast %union.anon* %3 to i32*
%10 = load i32, i32* %9
%11 = and i32 %10, 2139095040
%12 = icmp eq i32 %11, 2139095040
br i1 %12, label %4, label %13
13: ; preds = %8
%14 = bitcast %union.anon* %3 to float*
%15 = load float, float* %14
ret float %15
}

LLVM IR (-O2):
define float @getrandom_3(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @gmp_urandomb_ui(i32 %0, i32 32)
%4 = and i32 %3, 2139095040
%5 = icmp eq i32 %4, 2139095040
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = bitcast i32 %3 to float
ret float %7
}
/* Variables and functions */
char *ch(char *, char *, int /*<<< orphan*/);
char *st(char *buf, char *end, char *add) {
  while (*add)
    buf = ch(buf, end, *add++);
  return buf;
}


x86 assembly (clang, -O0):
<st>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1159 <st+0x49>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%edx
call   1030 <ch@plt>
mov    %rax,-0x8(%rbp)
jmp    1124 <st+0x14>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<st>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rax
mov    (%rdx),%cl
test   %cl,%cl
je     1149 <st+0x39>
mov    %rdx,%rbx
mov    %rsi,%r14
add    $0x1,%rbx
nopw   0x0(%rax,%rax,1)
movsbl %cl,%edx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <ch@plt>
movzbl (%rbx),%ecx
add    $0x1,%rbx
test   %cl,%cl
jne    1130 <st+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @st(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
br label %7
7: ; preds = %11, %3
%8 = load i8*, i8** %6
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %6
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = call i8* @ch(i8* %12, i8* %13, i32 %17)
store i8* %18, i8** %4
br label %7
19: ; preds = %7
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define i8* @st(i8* %0, i8* %1, i8* nocapture %2) {
%4 = load i8, i8* %2
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %6
%7 = phi i8 [ %13, %6 ], [ %4, %3 ]
%8 = phi i8* [ %10, %6 ], [ %2, %3 ]
%9 = phi i8* [ %12, %6 ], [ %0, %3 ]
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = sext i8 %7 to i32
%12 = tail call i8* @ch(i8* %9, i8* %1, i32 %11)
%13 = load i8, i8* %10
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %6, %3
%16 = phi i8* [ %0, %3 ], [ %12, %6 ]
ret i8* %16
}
/* Variables and functions */
double acos(double);
int /*<<< orphan*/ printf(char *, double, double);
int main() {
  double param, result;
  param = 0.5;
  result = acos(param) * 180.0 / 3.14159265;
  printf("The arc cosine of %f is %.3f degrees.\n", param, result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <acos@plt>
movsd  0xeba(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef8(%rip),%rdi
movsd  0xee0(%rip),%xmm0
movsd  0xee0(%rip),%xmm1
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"The arc cosine of %f is %.3f degrees.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
store double 5.000000e-01, double* %2
%4 = load double, double* %2
%5 = call double @acos(double %4)
%6 = fmul double %5, 1.800000e+02
%7 = fdiv double %6, 0x400921FB53C8D4F1
store double %7, double* %3
%8 = load double, double* %2
%9 = load double, double* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), double %8, double %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [39 x i8] c"The arc cosine of %f is %.3f degrees.\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), double 5.000000e-01, double 0x404E000000933B42)
ret i32 0
}
void neural_layer_upsample_rand(struct Layer *l) { (void)l; }


x86 assembly (clang, -O0):
<neural_layer_upsample_rand>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<neural_layer_upsample_rand>:
ret

LLVM IR (-O0):
%struct.Layer = type opaque
define void @neural_layer_upsample_rand(%struct.Layer* %0) {
%2 = alloca %struct.Layer*
store %struct.Layer* %0, %struct.Layer** %2
%3 = load %struct.Layer*, %struct.Layer** %2
ret void
}

LLVM IR (-O2):
%struct.Layer = type opaque
define void @neural_layer_upsample_rand(%struct.Layer* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ is_loalpha(char const);
int __loalpha_len(const char *s) {
  int l;
  for (l = 0; is_loalpha(*s); l++)
    s++;
  return l;
}


x86 assembly (clang, -O0):
<__loalpha_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_loalpha@plt>
cmp    $0x0,%rax
je     1153 <__loalpha_len+0x43>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <__loalpha_len+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__loalpha_len>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
movsbl (%rdi),%edi
call   1030 <is_loalpha@plt>
xor    %ebx,%ebx
test   %rax,%rax
je     1144 <__loalpha_len+0x34>
cs nopw 0x0(%rax,%rax,1)
movsbl 0x1(%r14,%rbx,1),%edi
call   1030 <is_loalpha@plt>
add    $0x1,%rbx
test   %rax,%rax
jne    1130 <__loalpha_len+0x20>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @__loalpha_len(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = call i64 @is_loalpha(i8 signext %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
br label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @__loalpha_len(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call i64 @is_loalpha(i8 signext %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %9, %5 ], [ 0, %1 ]
%7 = phi i8* [ %8, %5 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = add nuw nsw i32 %6, 1
%10 = load i8, i8* %8
%11 = tail call i64 @is_loalpha(i8 signext %10)
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %1
%14 = phi i32 [ 0, %1 ], [ %9, %5 ]
ret i32 %14
}
int f7(int a, int b) { return a == 0 && b == 7; }


x86 assembly (clang, -O0):
<f7>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jne    1123 <f7+0x23>
cmpl   $0x7,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7>:
xor    $0x7,%esi
xor    %eax,%eax
or     %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @f7(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 7
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @f7(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 7
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
double mjd2ts(dj)
double dj;
{ return ((dj - 33282.0) * 86400.0); }


x86 assembly (clang, -O0):
<mjd2ts>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xef2(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xede(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mjd2ts>:
addsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @mjd2ts(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 3.328200e+04
%5 = fmul double %4, 8.640000e+04
ret double %5
}

LLVM IR (-O2):
define double @mjd2ts(double %0) {
%2 = fadd double %0, -3.328200e+04
%3 = fmul double %2, 8.640000e+04
ret double %3
}