unsigned long SysCtlClockConfigGet(void) {
  unsigned long ulMWRAllow;
  unsigned long ulSysClk = 0;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  ulSysClk |=
      (((*((volatile unsigned long *)(0x400FB80C))) & (0x00300000 >> 20))
       << (20));
  ulSysClk |=
      (((*((volatile unsigned long *)(0x400FB810))) & (0x000C0000 >> 18))
       << (18));
  ulSysClk |=
      (((*((volatile unsigned long *)(0x400FB850))) & (0x00030000 >> 16))
       << (16));
  ulSysClk |= ((*((volatile unsigned long *)(0x400FB804))) & 0x0000007F);
  ulSysClk |= ((*((volatile unsigned long *)(0x400FB804))) & 0x00000300);
  ulSysClk |=
      (((*((volatile unsigned long *)(0x400FB800))) & (0x80000000 >> 31))
       << 31);
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
  return ulSysClk;
}


x86 assembly (clang, -O0):
<SysCtlClockConfigGet>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x10(%rbp)
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    $0x400fb80c,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x14,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb810,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x12,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb850,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x10,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb804,%eax
mov    (%rax),%rax
and    $0x7f,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb804,%eax
mov    (%rax),%rax
and    $0x300,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb800,%eax
mov    (%rax),%rax
and    $0x1,%rax
shl    $0x1f,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlClockConfigGet>:
mov    0x400fb980,%rcx
40
mov    $0xa5a5a5a5,%eax
mov    %rax,0x400fb980
40
mov    0x400fb80c,%rax
40
and    $0x3,%eax
shl    $0x14,%rax
mov    0x400fb810,%rdx
40
and    $0x3,%edx
shl    $0x12,%rdx
or     %rax,%rdx
mov    0x400fb850,%rax
40
and    $0x3,%eax
shl    $0x10,%rax
or     %rdx,%rax
mov    0x400fb804,%rdx
40
and    $0x7f,%edx
or     %rax,%rdx
mov    0x400fb804,%rsi
40
and    $0x300,%esi
or     %rdx,%rsi
mov    0x400fb800,%rax
40
shl    $0x1f,%eax
or     %rsi,%rax
mov    %rcx,0x400fb980
40
ret

LLVM IR (-O0):
define i64 @SysCtlClockConfigGet() {
%1 = alloca i64
%2 = alloca i64
store i64 0, i64* %2
%3 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %3, i64* %1
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%4 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%5 = and i64 %4, 3
%6 = shl i64 %5, 20
%7 = load i64, i64* %2
%8 = or i64 %7, %6
store i64 %8, i64* %2
%9 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%10 = and i64 %9, 3
%11 = shl i64 %10, 18
%12 = load i64, i64* %2
%13 = or i64 %12, %11
store i64 %13, i64* %2
%14 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%15 = and i64 %14, 3
%16 = shl i64 %15, 16
%17 = load i64, i64* %2
%18 = or i64 %17, %16
store i64 %18, i64* %2
%19 = load volatile i64, i64* inttoptr (i64 1074771972 to i64*)
%20 = and i64 %19, 127
%21 = load i64, i64* %2
%22 = or i64 %21, %20
store i64 %22, i64* %2
%23 = load volatile i64, i64* inttoptr (i64 1074771972 to i64*)
%24 = and i64 %23, 768
%25 = load i64, i64* %2
%26 = or i64 %25, %24
store i64 %26, i64* %2
%27 = load volatile i64, i64* inttoptr (i64 1074771968 to i64*)
%28 = and i64 %27, 1
%29 = shl i64 %28, 31
%30 = load i64, i64* %2
%31 = or i64 %30, %29
store i64 %31, i64* %2
%32 = load i64, i64* %1
store volatile i64 %32, i64* inttoptr (i64 1074772352 to i64*)
%33 = load i64, i64* %2
ret i64 %33
}

LLVM IR (-O2):
define i64 @SysCtlClockConfigGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%2 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%3 = shl i64 %2, 20
%4 = and i64 %3, 3145728
%5 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%6 = shl i64 %5, 18
%7 = and i64 %6, 786432
%8 = or i64 %7, %4
%9 = load volatile i64, i64* inttoptr (i64 1074772048 to i64*)
%10 = shl i64 %9, 16
%11 = and i64 %10, 196608
%12 = or i64 %8, %11
%13 = load volatile i64, i64* inttoptr (i64 1074771972 to i64*)
%14 = and i64 %13, 127
%15 = or i64 %12, %14
%16 = load volatile i64, i64* inttoptr (i64 1074771972 to i64*)
%17 = and i64 %16, 768
%18 = or i64 %15, %17
%19 = load volatile i64, i64* inttoptr (i64 1074771968 to i64*)
%20 = shl i64 %19, 31
%21 = and i64 %20, 2147483648
%22 = or i64 %18, %21
store volatile i64 %1, i64* inttoptr (i64 1074772352 to i64*)
ret i64 %22
}