xunge/DecIR huggingface dataset:
int test_05(int x, int y) {
  if (y < 4)
    ++x;
  return x;
}


x86 assembly (clang, -O0):
<test_05>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x4,-0x8(%rbp)
jge    111d <test_05+0x1d>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_05>:
xor    %eax,%eax
cmp    $0x4,%esi
setl   %al
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @test_05(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 4
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_05(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 4
%4 = zext i1 %3 to i32
%5 = add nsw i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int mmbuf__close();
int teardown() { return mmbuf__close(); }


x86 assembly (clang, -O0):
<teardown>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mmbuf__close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<teardown>:
xor    %eax,%eax
jmp    1030 <mmbuf__close@plt>

LLVM IR (-O0):
define i32 @teardown() {
%1 = call i32 (...) @mmbuf__close()
ret i32 %1
}

LLVM IR (-O2):
define i32 @teardown() {
%1 = tail call i32 (...) @mmbuf__close()
ret i32 %1
}
/* Variables and functions */
scalar_t__ HTTPWrapperIsAscii(int);
int HTTPWrapperToUpper(int c) {
  if (HTTPWrapperIsAscii(c) > 0) {
    if (c >= 97 && c <= 122) {
      return (c - 32);
    }
  }
  return c;
}


x86 assembly (clang, -O0):
<HTTPWrapperToUpper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <HTTPWrapperIsAscii@plt>
cmp    $0x0,%rax
jle    1154 <HTTPWrapperToUpper+0x44>
cmpl   $0x61,-0x8(%rbp)
jl     114f <HTTPWrapperToUpper+0x3f>
cmpl   $0x7a,-0x8(%rbp)
jg     114f <HTTPWrapperToUpper+0x3f>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    115a <HTTPWrapperToUpper+0x4a>
jmp    1154 <HTTPWrapperToUpper+0x44>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HTTPWrapperToUpper>:
push   %rbx
mov    %edi,%ebx
call   1030 <HTTPWrapperIsAscii@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmovle %ebx,%ecx
lea    -0x61(%rbx),%eax
cmp    $0x1a,%eax
cmovae %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @HTTPWrapperToUpper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @HTTPWrapperIsAscii(i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 97
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sle i32 %11, 122
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 32
store i32 %15, i32* %2
br label %19
16: ; preds = %10, %7
br label %17
17: ; preds = %16, %1
%18 = load i32, i32* %3
store i32 %18, i32* %2
br label %19
19: ; preds = %17, %13
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @HTTPWrapperToUpper(i32 %0) {
%2 = tail call i64 @HTTPWrapperIsAscii(i32 %0)
%3 = icmp sgt i64 %2, 0
%4 = add i32 %0, -97
%5 = icmp ult i32 %4, 26
%6 = and i1 %5, %3
%7 = add nsw i32 %0, -32
%8 = select i1 %6, i32 %7, i32 %0
ret i32 %8
}
int ten() { return 10; }


x86 assembly (clang, -O0):
<ten>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ten>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @ten() {
ret i32 10
}

LLVM IR (-O2):
define i32 @ten() {
ret i32 10
}
/* Variables and functions */
int /*<<< orphan*/ test_blitzmax_comment_entities();
int /*<<< orphan*/ test_blitzmax_comments();
void all_blitzmax_tests() {
  test_blitzmax_comments();
  test_blitzmax_comment_entities();
}


x86 assembly (clang, -O0):
<all_blitzmax_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_blitzmax_comments@plt>
mov    $0x0,%al
call   1030 <test_blitzmax_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_blitzmax_tests>:
push   %rax
xor    %eax,%eax
call   1040 <test_blitzmax_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_blitzmax_comment_entities@plt>

LLVM IR (-O0):
define void @all_blitzmax_tests() {
%1 = call i32 (...) @test_blitzmax_comments()
%2 = call i32 (...) @test_blitzmax_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_blitzmax_tests() {
%1 = tail call i32 (...) @test_blitzmax_comments()
%2 = tail call i32 (...) @test_blitzmax_comment_entities()
ret void
}
/* Type definitions */
struct stack {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ push(struct stack *, int);
void init_hanoi(int n, struct stack *x) {
  for (; n > 0; --n)
    push(x, n);
}


x86 assembly (clang, -O0):
<init_hanoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1143 <init_hanoi+0x33>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1030 <push@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <init_hanoi+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_hanoi>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1134 <init_hanoi+0x24>
mov    %rsi,%r14
mov    %edi,%ebx
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <push@plt>
lea    -0x1(%rbx),%eax
cmp    $0x1,%ebx
mov    %eax,%ebx
ja     1120 <init_hanoi+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.stack = type { i32 }
define void @init_hanoi(i32 %0, %struct.stack* %1) {
%3 = alloca i32
%4 = alloca %struct.stack*
store i32 %0, i32* %3
store %struct.stack* %1, %struct.stack** %4
br label %5
5: ; preds = %12, %2
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load %struct.stack*, %struct.stack** %4
%10 = load i32, i32* %3
%11 = call i32 @push(%struct.stack* %9, i32 %10)
br label %12
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, -1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
%struct.stack = type { i32 }
define void @init_hanoi(i32 %0, %struct.stack* %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %0, %2 ]
%6 = tail call i32 @push(%struct.stack* %1, i32 %5)
%7 = add nsw i32 %5, -1
%8 = icmp ugt i32 %5, 1
br i1 %8, label %4, label %9
9: ; preds = %4, %2
ret void
}
int *f() {
  int z = 6;
  {
    int x = 5;
    return &z;
  }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movl   $0x6,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
lea    -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x4(%rsp),%rax
ret

LLVM IR (-O0):
define i32* @f() {
%1 = alloca i32
%2 = alloca i32
store i32 6, i32* %1
store i32 5, i32* %2
ret i32* %1
}

LLVM IR (-O2):
define noalias i32* @f() {
%1 = alloca i32
ret i32* %1
}
char *strcpy(char *dest, const char *src) {
  char *cs, *ct;
  ct = dest;
  cs = (char *)src;
  while (*cs) {
    *ct++ = *cs++;
  }
  *ct++ = *cs++;
  return (dest);
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1150 <strcpy+0x50>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
jmp    111c <strcpy+0x1c>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
mov    %rdi,%rdx
test   %cl,%cl
je     1131 <strcpy+0x31>
add    $0x1,%rsi
mov    %rax,%rdx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %cl,(%rdx)
add    $0x1,%rdx
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <strcpy+0x20>
movb   $0x0,(%rdx)
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %6
%8 = load i8*, i8** %4
store i8* %8, i8** %5
br label %9
9: ; preds = %13, %2
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
%16 = load i8, i8* %14
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %6
store i8 %16, i8* %17
br label %9
19: ; preds = %9
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %5
%22 = load i8, i8* %20
%23 = load i8*, i8** %6
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %6
store i8 %22, i8* %23
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ serial_putchar(int /*<<< orphan*/);
void serial_putstr(char *str) {
  while (*str)
    serial_putchar(*str++);
}


x86 assembly (clang, -O0):
<serial_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <serial_putstr+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <serial_putchar@plt>
jmp    111c <serial_putstr+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_putstr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <serial_putstr+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <serial_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <serial_putstr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @serial_putstr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @serial_putchar(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @serial_putstr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @serial_putchar(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int threeSumClosest(int *, int, int);
int main() {
  int n[] = {-1, 0, 1, 2, -1, -4, -5, -9, 3, 5, 6, 7, 8, 4};
  int size;
  printf("%d\n", threeSumClosest(n, 14, 5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x38,%edx
call   1050 <memcpy@plt>
lea    -0x40(%rbp),%rdi
mov    $0xe,%esi
mov    $0x5,%edx
call   1030 <threeSumClosest@plt>
mov    %eax,%esi
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
mov    0xf05(%rip),%rax
mov    %rax,0x30(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeb1(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0xe,%esi
mov    $0x5,%edx
call   1030 <threeSumClosest@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.n = [14 x i32] [i32 -1, i32 0, i32 1, i32 2, i32 -1, i32 -4, i32 -5, i32 -9, i32 3, i32 5, i32 6, i32 7, i32 8, i32 4]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [14 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [14 x i32]* %2 to i8*
%5 = getelementptr inbounds [14 x i32], [14 x i32]* %2, i64 0, i64 0
%6 = call i32 @threeSumClosest(i32* %5, i32 14, i32 5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.n = [14 x i32] [i32 -1, i32 0, i32 1, i32 2, i32 -1, i32 -4, i32 -5, i32 -9, i32 3, i32 5, i32 6, i32 7, i32 8, i32 4]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [14 x i32]
%2 = bitcast [14 x i32]* %1 to i8*
%3 = getelementptr inbounds [14 x i32], [14 x i32]* %1, i64 0, i64 0
%4 = call i32 @threeSumClosest(i32* %3, i32 14, i32 5)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ wint_t;

/* Variables and functions */
int isspace(scalar_t__);
int iswspace(wint_t wc) { return ((wc < (wint_t)0x100 ? isspace(wc) : 0)); }


x86 assembly (clang, -O0):
<iswspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x100,-0x8(%rbp)
jge    113b <iswspace+0x2b>
mov    -0x8(%rbp),%rdi
call   1030 <isspace@plt>
mov    %eax,-0xc(%rbp)
jmp    1145 <iswspace+0x35>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    1145 <iswspace+0x35>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswspace>:
cmp    $0xff,%rdi
jg     111e <iswspace+0xe>
jmp    1030 <isspace@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @iswspace(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 256
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = call i32 @isspace(i64 %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ %7, %5 ], [ 0, %8 ]
ret i32 %10
}

LLVM IR (-O2):
define i32 @iswspace(i64 %0) {
%2 = icmp slt i64 %0, 256
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @isspace(i64 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
/* Variables and functions */
float cosf(float);
float sinf(float);
float tanf(float x) { return sinf(x) / cosf(x); }


x86 assembly (clang, -O0):
<tanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <cosf@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanf>:
push   %rax
movss  %xmm0,(%rsp)
call   1030 <sinf@plt>
movss  %xmm0,0x4(%rsp)
movss  (%rsp),%xmm0
call   1040 <cosf@plt>
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @tanf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sinf(float %3)
%5 = load float, float* %2
%6 = call float @cosf(float %5)
%7 = fdiv float %4, %6
ret float %7
}

LLVM IR (-O2):
define float @tanf(float %0) {
%2 = tail call float @sinf(float %0)
%3 = tail call float @cosf(float %0)
%4 = fdiv float %2, %3
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ luaL_check_lstr(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ pushresult(int);
scalar_t__ rename(int /*<<< orphan*/, int /*<<< orphan*/);
void io_rename(void) {
  pushresult(
      rename((luaL_check_lstr((1), NULL)), (luaL_check_lstr((2), NULL))) == 0);
}


x86 assembly (clang, -O0):
<io_rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1050 <luaL_check_lstr@plt>
mov    %eax,-0x4(%rbp)
mov    $0x2,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1050 <luaL_check_lstr@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
call   1040 <rename@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <pushresult@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_rename>:
push   %rbx
mov    $0x1,%edi
xor    %esi,%esi
call   1050 <luaL_check_lstr@plt>
mov    %eax,%ebx
mov    $0x2,%edi
xor    %esi,%esi
call   1050 <luaL_check_lstr@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1040 <rename@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rbx
jmp    1030 <pushresult@plt>

LLVM IR (-O0):
define void @io_rename() {
%1 = call i32 @luaL_check_lstr(i32 1, i32* null)
%2 = call i32 @luaL_check_lstr(i32 2, i32* null)
%3 = call i64 @rename(i32 %1, i32 %2)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @pushresult(i32 %5)
ret void
}

LLVM IR (-O2):
define void @io_rename() {
%1 = tail call i32 @luaL_check_lstr(i32 1, i32* null)
%2 = tail call i32 @luaL_check_lstr(i32 2, i32* null)
%3 = tail call i64 @rename(i32 %1, i32 %2)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @pushresult(i32 %5)
ret void
}
double Sleef_sqrt_u05(double x) { return __builtin_sqrt(x); }


x86 assembly (clang, -O0):
<Sleef_sqrt_u05>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_sqrt_u05>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     111f <Sleef_sqrt_u05+0xf>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @Sleef_sqrt_u05(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sqrt(double %3)
ret double %4
}

LLVM IR (-O2):
define double @Sleef_sqrt_u05(double %0) {
%2 = tail call double @sqrt(double %0)
ret double %2
}
/* Variables and functions */
scalar_t__ rand();
float noise_tick(void) {
  float output;
  output = (float)rand() - 16384.;
  output *= 0.00006103516;
  return output;
}


x86 assembly (clang, -O0):
<noise_tick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed8(%rip),%xmm1
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeb2(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<noise_tick>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
addss  0xedb(%rip),%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  0xed7(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @noise_tick() {
%1 = alloca float
%2 = call i64 (...) @rand()
%3 = sitofp i64 %2 to float
%4 = fpext float %3 to double
%5 = fsub double %4, 1.638400e+04
%6 = fptrunc double %5 to float
store float %6, float* %1
%7 = load float, float* %1
%8 = fpext float %7 to double
%9 = fmul double %8, 0x3F100000107E1FE9
%10 = fptrunc double %9 to float
store float %10, float* %1
%11 = load float, float* %1
ret float %11
}

LLVM IR (-O2):
define float @noise_tick() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = fadd float %2, -1.638400e+04
%4 = fpext float %3 to double
%5 = fmul double %4, 0x3F100000107E1FE9
%6 = fptrunc double %5 to float
ret float %6
}
/* Variables and functions */
int rit_changePath(char const *);
int set_rit_path(const char *rit_path) { return rit_changePath(rit_path); }


x86 assembly (clang, -O0):
<set_rit_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rit_changePath@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_rit_path>:
jmp    1030 <rit_changePath@plt>

LLVM IR (-O0):
define i32 @set_rit_path(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @rit_changePath(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @set_rit_path(i8* %0) {
%2 = tail call i32 @rit_changePath(i8* %0)
ret i32 %2
}
void log_background(void) {}


x86 assembly (clang, -O0):
<log_background>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_background>:
ret

LLVM IR (-O0):
define void @log_background() {
ret void
}

LLVM IR (-O2):
define void @log_background() {
ret void
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_write_cmd(struct flashrom_flashctx *, int, int, unsigned int,
                  int /*<<< orphan*/ *, int /*<<< orphan*/, int);
int spi_block_erase_5c(struct flashrom_flashctx *flash, unsigned int addr,
                       unsigned int blocklen) {
  return spi_write_cmd(flash, 0x5c, true, addr, NULL, 0, 100 * 1000);
}


x86 assembly (clang, -O0):
<spi_block_erase_5c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x5c,%esi
mov    $0x1,%edx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
movl   $0x186a0,(%rsp)
call   1030 <spi_write_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_block_erase_5c>:
push   %rax
mov    %esi,%ecx
movl   $0x186a0,(%rsp)
mov    $0x5c,%esi
mov    $0x1,%edx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <spi_write_cmd@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_block_erase_5c(%struct.flashrom_flashctx* %0, i32 %1, i32 %2) {
%4 = alloca %struct.flashrom_flashctx*
%5 = alloca i32
%6 = alloca i32
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %4
%8 = load i32, i32* %5
%9 = call i32 @spi_write_cmd(%struct.flashrom_flashctx* %7, i32 92, i32 1, i32 %8, i32* null, i32 0, i32 100000)
ret i32 %9
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_block_erase_5c(%struct.flashrom_flashctx* %0, i32 %1, i32 %2) {
%4 = tail call i32 @spi_write_cmd(%struct.flashrom_flashctx* %0, i32 92, i32 1, i32 %1, i32* null, i32 0, i32 100000)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xf4() {
  Assert_real((isbdigit(244) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              1225, ("isbdigit should be 0 for 0xf4"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xf4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf4,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4c9,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xf4>:
push   %rax
mov    $0xf4,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4c9,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xf4\00"
define void @t_isbdigit_0xf4() {
%1 = call i64 @isbdigit(i32 244)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1225, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xf4\00"
define void @t_isbdigit_0xf4() {
%1 = tail call i64 @isbdigit(i32 244)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1225, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int bgbrasw_exp2f8(int val) {
  int i, j, k;
  i = 256 | (val & 255);
  j = (val >> 8);
  while (j--)
    i = i << 1;
  k = (i >> 8);
  return (k);
}


x86 assembly (clang, -O0):
<bgbrasw_exp2f8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
or     $0x100,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     1142 <bgbrasw_exp2f8+0x42>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1120 <bgbrasw_exp2f8+0x20>
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bgbrasw_exp2f8>:
movzbl %dil,%eax
or     $0x100,%eax
cmp    $0x100,%edi
jb     1138 <bgbrasw_exp2f8+0x38>
sar    $0x8,%edi
lea    -0x1(%rdi),%ecx
mov    %edi,%edx
and    $0x7,%edx
je     112b <bgbrasw_exp2f8+0x2b>
xor    %esi,%esi
add    %eax,%eax
add    $0x1,%esi
cmp    %esi,%edx
jne    1120 <bgbrasw_exp2f8+0x20>
sub    %esi,%edi
cmp    $0x7,%ecx
jb     1138 <bgbrasw_exp2f8+0x38>
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <bgbrasw_exp2f8+0x30>
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @bgbrasw_exp2f8(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = and i32 %6, 255
%8 = or i32 256, %7
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = ashr i32 %9, 8
store i32 %10, i32* %4
br label %11
11: ; preds = %15, %1
%12 = load i32, i32* %4
%13 = add nsw i32 %12, -1
store i32 %13, i32* %4
%14 = icmp ne i32 %12, 0
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %3
%17 = shl i32 %16, 1
store i32 %17, i32* %3
br label %11
18: ; preds = %11
%19 = load i32, i32* %3
%20 = ashr i32 %19, 8
store i32 %20, i32* %5
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @bgbrasw_exp2f8(i32 %0) {
%2 = and i32 %0, 255
%3 = or i32 %2, 256
%4 = icmp ult i32 %0, 256
br i1 %4, label %29, label %5
5: ; preds = %1
%6 = ashr i32 %0, 8
%7 = add nsw i32 %6, -1
%8 = and i32 %6, 7
%9 = icmp eq i32 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %5, %10
%11 = phi i32 [ %15, %10 ], [ %3, %5 ]
%12 = phi i32 [ %14, %10 ], [ %6, %5 ]
%13 = phi i32 [ %16, %10 ], [ 0, %5 ]
%14 = add nsw i32 %12, -1
%15 = shl i32 %11, 1
%16 = add i32 %13, 1
%17 = icmp eq i32 %16, %8
br i1 %17, label %18, label %10
18: ; preds = %10, %5
%19 = phi i32 [ undef, %5 ], [ %15, %10 ]
%20 = phi i32 [ %3, %5 ], [ %15, %10 ]
%21 = phi i32 [ %6, %5 ], [ %14, %10 ]
%22 = icmp ult i32 %7, 7
br i1 %22, label %29, label %23
23: ; preds = %18, %23
%24 = phi i32 [ %26, %23 ], [ %20, %18 ]
%25 = phi i32 [ %27, %23 ], [ %21, %18 ]
%26 = shl i32 %24, 8
%27 = add nsw i32 %25, -8
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %23
29: ; preds = %18, %23, %1
%30 = phi i32 [ %3, %1 ], [ %19, %18 ], [ %26, %23 ]
%31 = ashr i32 %30, 8
ret i32 %31
}
/* Variables and functions */
int /*<<< orphan*/ do_markets();
void process_markets(void) { do_markets(); }


x86 assembly (clang, -O0):
<process_markets>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <do_markets@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_markets>:
xor    %eax,%eax
jmp    1030 <do_markets@plt>

LLVM IR (-O0):
define void @process_markets() {
%1 = call i32 (...) @do_markets()
ret void
}

LLVM IR (-O2):
define void @process_markets() {
%1 = tail call i32 (...) @do_markets()
ret void
}
void fb_ConsoleScroll(int nrows) {}


x86 assembly (clang, -O0):
<fb_ConsoleScroll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_ConsoleScroll>:
ret

LLVM IR (-O0):
define void @fb_ConsoleScroll(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @fb_ConsoleScroll(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int tlsext_supportedgroups_serverhello_needs(SSL *s) { return 0; }


x86 assembly (clang, -O0):
<tlsext_supportedgroups_serverhello_needs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tlsext_supportedgroups_serverhello_needs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tlsext_supportedgroups_serverhello_needs(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @tlsext_supportedgroups_serverhello_needs(i32* nocapture readnone %0) {
ret i32 0
}
void pcp_def_fchost_metrics(struct activity *a) {}


x86 assembly (clang, -O0):
<pcp_def_fchost_metrics>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_fchost_metrics>:
ret

LLVM IR (-O0):
%struct.activity = type opaque
define void @pcp_def_fchost_metrics(%struct.activity* %0) {
%2 = alloca %struct.activity*
store %struct.activity* %0, %struct.activity** %2
ret void
}

LLVM IR (-O2):
%struct.activity = type opaque
define void @pcp_def_fchost_metrics(%struct.activity* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ mem_readb_phys(int /*<<< orphan*/);
uint8_t _dma_read(uint32_t addr) {
  uint8_t temp = mem_readb_phys(addr);
  return (temp);
}


x86 assembly (clang, -O0):
<_dma_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <mem_readb_phys@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dma_read>:
jmp    1030 <mem_readb_phys@plt>

LLVM IR (-O0):
define i32 @_dma_read(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @mem_readb_phys(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @_dma_read(i32 %0) {
%2 = tail call i32 @mem_readb_phys(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Bar160(long, long, long, long);
void bar(long x, long y, long w, long h) { Bar160(x, y, w, h); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <Bar160@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <Bar160@plt>

LLVM IR (-O0):
define void @bar(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @Bar160(i64 %9, i64 %10, i64 %11, i64 %12)
ret void
}

LLVM IR (-O2):
define void @bar(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i32 @Bar160(i64 %0, i64 %1, i64 %2, i64 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, char *);
short flushInputBuffer() {
  char cleaner;
  int counter = 0;
  do {
    scanf("%c", &cleaner);
    counter++;
  } while (cleaner != '\n');
  return counter == 1 ? 0 : 1;
}


x86 assembly (clang, -O0):
<flushInputBuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
lea    0xeda(%rip),%rdi
lea    -0x1(%rbp),%rsi
call   1030 <scanf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jne    111f <flushInputBuffer+0xf>
mov    -0x8(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x1,%edx
cmove  %ecx,%eax
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flushInputBuffer>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    $0x1,%ebp
lea    0xedc(%rip),%r14
lea    0xf(%rsp),%rbx
nopl   0x0(%rax)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <scanf@plt>
add    $0xffffffff,%ebp
cmpb   $0xa,0xf(%rsp)
jne    1130 <flushInputBuffer+0x20>
xor    %eax,%eax
test   %ebp,%ebp
setne  %al
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define signext i16 @flushInputBuffer() {
%1 = alloca i8
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %7, %0
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
br label %7
7: ; preds = %3
%8 = load i8, i8* %1
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 10
br i1 %10, label %3, label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 1
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 0, i32 1
%16 = trunc i32 %15 to i16
ret i16 %16
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define signext i16 @flushInputBuffer() {
%1 = alloca i8
br label %2
2: ; preds = %2, %0
%3 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%5 = add nuw nsw i32 %3, 1
%6 = load i8, i8* %1
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %2
8: ; preds = %2
%9 = icmp ne i32 %3, 0
%10 = zext i1 %9 to i16
ret i16 %10
}
int settimeofday(const struct timeval *tv, const struct timezone *tz) {
  return 0;
}


x86 assembly (clang, -O0):
<settimeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<settimeofday>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timeval = type opaque
%struct.timezone = type opaque
define i32 @settimeofday(%struct.timeval* %0, %struct.timezone* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timezone*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timezone* %1, %struct.timezone** %4
ret i32 0
}

LLVM IR (-O2):
%struct.timeval = type opaque
%struct.timezone = type opaque
define i32 @settimeofday(%struct.timeval* nocapture readnone %0, %struct.timezone* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int fileCopy(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int createNewMaster(FILE *nfPtr) {
  int created;
  FILE *ofPtr = fopen("oldMast.dat", "rb");
  created = fileCopy(ofPtr, nfPtr);
  fclose(ofPtr);
  return created;
}


x86 assembly (clang, -O0):
<createNewMaster>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xebd(%rip),%rdi
lea    0xec2(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <fileCopy@plt>
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createNewMaster>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
lea    0xec2(%rip),%rdi
lea    0xec7(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <fileCopy@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <fclose@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"oldMast.dat\00"
@.str.1 = [3 x i8] c"rb\00"
define i32 @createNewMaster(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32*
store i32* %0, i32** %2
%5 = call i32* @fopen(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
store i32* %5, i32** %4
%6 = load i32*, i32** %4
%7 = load i32*, i32** %2
%8 = call i32 @fileCopy(i32* %6, i32* %7)
store i32 %8, i32* %3
%9 = load i32*, i32** %4
%10 = call i32 @fclose(i32* %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@.str = [12 x i8] c"oldMast.dat\00"
@.str.1 = [3 x i8] c"rb\00"
define i32 @createNewMaster(i32* %0) {
%2 = tail call i32* @fopen(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @fileCopy(i32* %2, i32* %0)
%4 = tail call i32 @fclose(i32* %2)
ret i32 %3
}
void MPURegionEnable(unsigned long ulRegion) {
  ;
  (*((volatile unsigned long *)(0xE000ED98))) = ulRegion;
  (*((volatile unsigned long *)(0xE000EDA0))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<MPURegionEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0xe000ed98,%eax
mov    %rcx,(%rax)
mov    $0xe000eda0,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0xe000eda0,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPURegionEnable>:
mov    $0xe000eda0,%eax
mov    %rdi,-0x8(%rax)
orq    $0x1,(%rax)
ret

LLVM IR (-O0):
define void @MPURegionEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
store volatile i64 %3, i64* inttoptr (i64 3758157208 to i64*)
%4 = load volatile i64, i64* inttoptr (i64 3758157216 to i64*)
%5 = or i64 %4, 1
store volatile i64 %5, i64* inttoptr (i64 3758157216 to i64*)
ret void
}

LLVM IR (-O2):
define void @MPURegionEnable(i64 %0) {
store volatile i64 %0, i64* inttoptr (i64 3758157208 to i64*)
%2 = load volatile i64, i64* inttoptr (i64 3758157216 to i64*)
%3 = or i64 %2, 1
store volatile i64 %3, i64* inttoptr (i64 3758157216 to i64*)
ret void
}
void smlt_arch_write_barrier(void) { __asm volatile("" : : : "memory"); }


x86 assembly (clang, -O0):
<smlt_arch_write_barrier>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smlt_arch_write_barrier>:
ret

LLVM IR (-O0):
define void @smlt_arch_write_barrier() {
ret void
}

LLVM IR (-O2):
define void @smlt_arch_write_barrier() {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
int timespec_equal(const struct timespec *a, const struct timespec *b) {
  return (a->tv_sec == b->tv_sec) && (a->tv_nsec == b->tv_nsec);
}


x86 assembly (clang, -O0):
<timespec_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rdx
xor    %eax,%eax
cmp    (%rdx),%rcx
mov    %al,-0x11(%rbp)
jne    113b <timespec_equal+0x3b>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
cmp    0x8(%rcx),%rax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_equal>:
mov    (%rdi),%rcx
xor    %eax,%eax
cmp    (%rsi),%rcx
jne    1117 <timespec_equal+0x17>
mov    0x8(%rdi),%rcx
xor    %eax,%eax
cmp    0x8(%rsi),%rcx
sete   %al
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i32 @timespec_equal(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = load %struct.timespec*, %struct.timespec** %4
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 0
%10 = load i64, i64* %9
%11 = icmp eq i64 %7, %10
br i1 %11, label %12, label %20
12: ; preds = %2
%13 = load %struct.timespec*, %struct.timespec** %3
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %13, i32 0, i32 1
%15 = load i64, i64* %14
%16 = load %struct.timespec*, %struct.timespec** %4
%17 = getelementptr inbounds %struct.timespec, %struct.timespec* %16, i32 0, i32 1
%18 = load i64, i64* %17
%19 = icmp eq i64 %15, %18
br label %20
20: ; preds = %12, %2
%21 = phi i1 [ false, %2 ], [ %19, %12 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define i32 @timespec_equal(%struct.timespec* nocapture %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = icmp eq i64 %4, %6
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%10 = load i64, i64* %9
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%12 = load i64, i64* %11
%13 = icmp eq i64 %10, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %8, %2
%16 = phi i32 [ 0, %2 ], [ %14, %8 ]
ret i32 %16
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void stl_le_p(void *ptr, int v) { *(uint32_t *)ptr = v; }


x86 assembly (clang, -O0):
<stl_le_p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stl_le_p>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @stl_le_p(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @stl_le_p(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int dcr_write(unsigned long regaddr, unsigned int data) { return 0; }


x86 assembly (clang, -O0):
<dcr_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcr_write>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dcr_write(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @dcr_write(i64 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int);
void sr_wait(unsigned int millis) { usleep(millis * 1000); }


x86 assembly (clang, -O0):
<sr_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sr_wait>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @sr_wait(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @sr_wait(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
int test_imm_39int16_mem(short *val) {
  return ((*val) & (0x39 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_39int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x39,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_39int16_mem>:
testb  $0x39,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_39int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 57
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_39int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 57
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned as_uint32(int a) { return *((unsigned *)&a); }


x86 assembly (clang, -O0):
<as_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<as_uint32>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @as_uint32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @as_uint32(i32 returned %0) {
ret i32 %0
}
int nmrn(int x) { return x - 1; }


x86 assembly (clang, -O0):
<nmrn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmrn>:
lea    -0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @nmrn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @nmrn(i32 %0) {
%2 = add nsw i32 %0, -1
ret i32 %2
}
/* Variables and functions */
int RAND_MAX;
int /*<<< orphan*/ myexp(double);
double rand();
int main(int argc, const char *argv[]) {
  for (int i = 1; i <= 30; i++)
    myexp(20.0 * rand() / (RAND_MAX / 2) - 20);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x1e,-0x14(%rbp)
jg     1195 <main+0x75>
mov    $0x0,%al
call   1040 <rand@plt>
movaps %xmm0,%xmm1
movsd  0xea7(%rip),%xmm0
mulsd  %xmm1,%xmm0
mov    0x2e84(%rip),%rax
mov    (%rax),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
movsd  0xe82(%rip),%xmm1
subsd  %xmm1,%xmm0
call   1030 <myexp@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x1e,%ebx
mov    0x2eb8(%rip),%r14
xor    %eax,%eax
call   1040 <rand@plt>
mulsd  0xec1(%rip),%xmm0
mov    (%r14),%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
sar    %ecx
xorps  %xmm1,%xmm1
cvtsi2sd %ecx,%xmm1
divsd  %xmm1,%xmm0
addsd  0xeaa(%rip),%xmm0
call   1030 <myexp@plt>
add    $0xffffffff,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = icmp sle i32 %8, 30
br i1 %9, label %10, label %22
10: ; preds = %7
%11 = call double (...) @rand()
%12 = fmul double 2.000000e+01, %11
%13 = load i32, i32* @RAND_MAX
%14 = sdiv i32 %13, 2
%15 = sitofp i32 %14 to double
%16 = fdiv double %12, %15
%17 = fsub double %16, 2.000000e+01
%18 = call i32 @myexp(double %17)
br label %19
19: ; preds = %10
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %4
3: ; preds = %4
ret i32 0
4: ; preds = %2, %4
%5 = phi i32 [ 1, %2 ], [ %14, %4 ]
%6 = tail call double (...) @rand()
%7 = fmul double %6, 2.000000e+01
%8 = load i32, i32* @RAND_MAX
%9 = sdiv i32 %8, 2
%10 = sitofp i32 %9 to double
%11 = fdiv double %7, %10
%12 = fadd double %11, -2.000000e+01
%13 = tail call i32 @myexp(double %12)
%14 = add nuw nsw i32 %5, 1
%15 = icmp eq i32 %14, 31
br i1 %15, label %3, label %4
}