#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ MMU_CleanInvalidateDCacheIndex(int);
int /*<<< orphan*/ MMU_DisableDCache();
int /*<<< orphan*/ MMU_DisableICache();
int /*<<< orphan*/ MMU_DisableMMU();
int /*<<< orphan*/ MMU_EnableDCache();
int /*<<< orphan*/ MMU_EnableICache();
int /*<<< orphan*/ MMU_EnableMMU();
int /*<<< orphan*/ MMU_InvalidateICache();
int /*<<< orphan*/ MMU_InvalidateTLB();
int /*<<< orphan*/ MMU_SetMTT(int, int, int, int);
void ChangeRomCacheStatus(int attr) {
  int i, j;
  MMU_DisableDCache();
  MMU_DisableICache();
  for (i = 0; i < 64; i++)
    for (j = 0; j < 8; j++)
      MMU_CleanInvalidateDCacheIndex((i << 26) | (j << 5));
  MMU_InvalidateICache();
  MMU_DisableMMU();
  MMU_InvalidateTLB();
  MMU_SetMTT(0x00000000, 0x07f00000, 0x00000000, attr);
  MMU_SetMTT(0x08000000, 0x0ff00000, 0x08000000, attr);
  MMU_EnableMMU();
  MMU_EnableICache();
  MMU_EnableDCache();
}


x86 assembly (clang, -O0):
<ChangeRomCacheStatus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1070 <MMU_DisableDCache@plt>
mov    $0x0,%al
call   10a0 <MMU_DisableICache@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x40,-0x8(%rbp)
jge    120f <ChangeRomCacheStatus+0x6f>
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    11fc <ChangeRomCacheStatus+0x5c>
mov    -0x8(%rbp),%edi
shl    $0x1a,%edi
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
or     %eax,%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    11d1 <ChangeRomCacheStatus+0x31>
jmp    1201 <ChangeRomCacheStatus+0x61>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    11c0 <ChangeRomCacheStatus+0x20>
mov    $0x0,%al
call   1040 <MMU_InvalidateICache@plt>
mov    $0x0,%al
call   1080 <MMU_DisableMMU@plt>
mov    $0x0,%al
call   10b0 <MMU_InvalidateTLB@plt>
mov    -0x4(%rbp),%ecx
xor    %edx,%edx
mov    $0x7f00000,%esi
mov    %edx,%edi
call   1050 <MMU_SetMTT@plt>
mov    -0x4(%rbp),%ecx
mov    $0x8000000,%edx
mov    $0xff00000,%esi
mov    %edx,%edi
call   1050 <MMU_SetMTT@plt>
mov    $0x0,%al
call   1090 <MMU_EnableMMU@plt>
mov    $0x0,%al
call   10c0 <MMU_EnableICache@plt>
mov    $0x0,%al
call   1060 <MMU_EnableDCache@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ChangeRomCacheStatus>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
xor    %ebx,%ebx
xor    %eax,%eax
call   1070 <MMU_DisableDCache@plt>
xor    %eax,%eax
call   10a0 <MMU_DisableICache@plt>
mov    $0x40,%ebp
nopl   0x0(%rax)
mov    %ebx,%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0x20(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0x40(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0x60(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0x80(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0xa0(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0xc0(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
lea    0xe0(%rbx),%edi
call   1030 <MMU_CleanInvalidateDCacheIndex@plt>
add    $0x4000000,%ebx
add    $0xffffffff,%ebp
jne    11c0 <ChangeRomCacheStatus+0x20>
xor    %eax,%eax
call   1040 <MMU_InvalidateICache@plt>
xor    %eax,%eax
call   1080 <MMU_DisableMMU@plt>
xor    %eax,%eax
call   10b0 <MMU_InvalidateTLB@plt>
xor    %edi,%edi
mov    $0x7f00000,%esi
xor    %edx,%edx
mov    %r14d,%ecx
call   1050 <MMU_SetMTT@plt>
mov    $0x8000000,%edi
mov    $0xff00000,%esi
mov    $0x8000000,%edx
mov    %r14d,%ecx
call   1050 <MMU_SetMTT@plt>
xor    %eax,%eax
call   1090 <MMU_EnableMMU@plt>
xor    %eax,%eax
call   10c0 <MMU_EnableICache@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1060 <MMU_EnableDCache@plt>

LLVM IR (-O0):
define void @ChangeRomCacheStatus(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i32 (...) @MMU_DisableDCache()
%6 = call i32 (...) @MMU_DisableICache()
store i32 0, i32* %3
br label %7
7: ; preds = %25, %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 64
br i1 %9, label %10, label %28
10: ; preds = %7
store i32 0, i32* %4
br label %11
11: ; preds = %21, %10
%12 = load i32, i32* %4
%13 = icmp slt i32 %12, 8
br i1 %13, label %14, label %24
14: ; preds = %11
%15 = load i32, i32* %3
%16 = shl i32 %15, 26
%17 = load i32, i32* %4
%18 = shl i32 %17, 5
%19 = or i32 %16, %18
%20 = call i32 @MMU_CleanInvalidateDCacheIndex(i32 %19)
br label %21
21: ; preds = %14
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %11
24: ; preds = %11
br label %25
25: ; preds = %24
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 1
store i32 %27, i32* %3
br label %7
28: ; preds = %7
%29 = call i32 (...) @MMU_InvalidateICache()
%30 = call i32 (...) @MMU_DisableMMU()
%31 = call i32 (...) @MMU_InvalidateTLB()
%32 = load i32, i32* %2
%33 = call i32 @MMU_SetMTT(i32 0, i32 133169152, i32 0, i32 %32)
%34 = load i32, i32* %2
%35 = call i32 @MMU_SetMTT(i32 134217728, i32 267386880, i32 134217728, i32 %34)
%36 = call i32 (...) @MMU_EnableMMU()
%37 = call i32 (...) @MMU_EnableICache()
%38 = call i32 (...) @MMU_EnableDCache()
ret void
}

LLVM IR (-O2):
define void @ChangeRomCacheStatus(i32 %0) {
%2 = tail call i32 (...) @MMU_DisableDCache()
%3 = tail call i32 (...) @MMU_DisableICache()
br label %4
4: ; preds = %1, %4
%5 = phi i32 [ 0, %1 ], [ %22, %4 ]
%6 = shl i32 %5, 26
%7 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %6)
%8 = or i32 %6, 32
%9 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %8)
%10 = or i32 %6, 64
%11 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %10)
%12 = or i32 %6, 96
%13 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %12)
%14 = or i32 %6, 128
%15 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %14)
%16 = or i32 %6, 160
%17 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %16)
%18 = or i32 %6, 192
%19 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %18)
%20 = or i32 %6, 224
%21 = tail call i32 @MMU_CleanInvalidateDCacheIndex(i32 %20)
%22 = add nuw nsw i32 %5, 1
%23 = icmp eq i32 %22, 64
br i1 %23, label %24, label %4
24: ; preds = %4
%25 = tail call i32 (...) @MMU_InvalidateICache()
%26 = tail call i32 (...) @MMU_DisableMMU()
%27 = tail call i32 (...) @MMU_InvalidateTLB()
%28 = tail call i32 @MMU_SetMTT(i32 0, i32 133169152, i32 0, i32 %0)
%29 = tail call i32 @MMU_SetMTT(i32 134217728, i32 267386880, i32 134217728, i32 %0)
%30 = tail call i32 (...) @MMU_EnableMMU()
%31 = tail call i32 (...) @MMU_EnableICache()
%32 = tail call i32 (...) @MMU_EnableDCache()
ret void
}