#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool softfloat_isNaNF128M(const uint32_t *aWPtr) {
  uint32_t uiA96;
  uiA96 = aWPtr[0];
  if ((uiA96 & 0x7FFF0000) != 0x7FFF0000)
    return false;
  return ((uiA96 & 0x0000FFFF) != 0) ||
         ((aWPtr[((4) - 1 - (2))] | aWPtr[((4) - 1 - (1))] |
           aWPtr[((4) - 1 - (0))]) != 0);
}


x86 assembly (clang, -O0):
<softfloat_isNaNF128M>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0x7fff0000,%eax
cmp    $0x7fff0000,%eax
je     1130 <softfloat_isNaNF128M+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1170 <softfloat_isNaNF128M+0x70>
mov    -0x14(%rbp),%ecx
and    $0xffff,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
jne    1165 <softfloat_isNaNF128M+0x65>
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x10(%rbp),%rcx
or     0x8(%rcx),%eax
mov    -0x10(%rbp),%rcx
or     0xc(%rcx),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<softfloat_isNaNF128M>:
mov    (%rdi),%ecx
mov    %ecx,%edx
not    %edx
xor    %eax,%eax
test   $0x7fff0000,%edx
jne    111a <softfloat_isNaNF128M+0x1a>
mov    $0x1,%eax
test   %cx,%cx
je     111b <softfloat_isNaNF128M+0x1b>
ret
mov    0x8(%rdi),%ecx
or     0x4(%rdi),%ecx
xor    %eax,%eax
or     0xc(%rdi),%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @softfloat_isNaNF128M(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = and i32 %8, 2147418112
%10 = icmp ne i32 %9, 2147418112
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 0, i32* %2
br label %32
12: ; preds = %1
%13 = load i32, i32* %4
%14 = and i32 %13, 65535
%15 = icmp ne i32 %14, 0
br i1 %15, label %29, label %16
16: ; preds = %12
%17 = load i32*, i32** %3
%18 = getelementptr inbounds i32, i32* %17, i64 1
%19 = load i32, i32* %18
%20 = load i32*, i32** %3
%21 = getelementptr inbounds i32, i32* %20, i64 2
%22 = load i32, i32* %21
%23 = or i32 %19, %22
%24 = load i32*, i32** %3
%25 = getelementptr inbounds i32, i32* %24, i64 3
%26 = load i32, i32* %25
%27 = or i32 %23, %26
%28 = icmp ne i32 %27, 0
br label %29
29: ; preds = %16, %12
%30 = phi i1 [ true, %12 ], [ %28, %16 ]
%31 = zext i1 %30 to i32
store i32 %31, i32* %2
br label %32
32: ; preds = %29, %11
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @softfloat_isNaNF128M(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 2147418112
%4 = icmp eq i32 %3, 2147418112
br i1 %4, label %5, label %19
5: ; preds = %1
%6 = and i32 %2, 65535
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = getelementptr inbounds i32, i32* %0, i64 1
%10 = load i32, i32* %9
%11 = getelementptr inbounds i32, i32* %0, i64 2
%12 = load i32, i32* %11
%13 = or i32 %12, %10
%14 = getelementptr inbounds i32, i32* %0, i64 3
%15 = load i32, i32* %14
%16 = or i32 %13, %15
%17 = icmp ne i32 %16, 0
%18 = zext i1 %17 to i32
br label %19
19: ; preds = %5, %8, %1
%20 = phi i32 [ 0, %1 ], [ 1, %5 ], [ %18, %8 ]
ret i32 %20
}