xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ SendInterrupt(int, int, int, int);
void ScuSendLevel2DMAEnd(void) { SendInterrupt(0x49, 0x6, 0x0200, 0x00000200); }


x86 assembly (clang, -O0):
<ScuSendLevel2DMAEnd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x49,%edi
mov    $0x6,%esi
mov    $0x200,%ecx
mov    %ecx,%edx
call   1030 <SendInterrupt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScuSendLevel2DMAEnd>:
mov    $0x49,%edi
mov    $0x6,%esi
mov    $0x200,%edx
mov    $0x200,%ecx
jmp    1030 <SendInterrupt@plt>

LLVM IR (-O0):
define void @ScuSendLevel2DMAEnd() {
%1 = call i32 @SendInterrupt(i32 73, i32 6, i32 512, i32 512)
ret void
}

LLVM IR (-O2):
define void @ScuSendLevel2DMAEnd() {
%1 = tail call i32 @SendInterrupt(i32 73, i32 6, i32 512, i32 512)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *copy(const char *s) {
  char *p;
  p = (char *)malloc(strlen(s) + 1);
  if (p == 0)
    fatal("Ran out of memory.");
  else
    (void)strcpy(p, s);
  return (p);
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1181 <copy+0x41>
lea    0xe89(%rip),%rdi
call   1060 <fatal@plt>
jmp    118e <copy+0x4e>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     116a <copy+0x2a>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    1176 <copy+0x36>
lea    0xe8f(%rip),%rdi
call   1060 <fatal@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Ran out of memory.\00"
define i8* @copy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = call i32 @fatal(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
br label %17
13: ; preds = %1
%14 = load i8*, i8** %3
%15 = load i8*, i8** %2
%16 = call i32 @strcpy(i8* %14, i8* %15)
br label %17
17: ; preds = %13, %11
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@.str = [19 x i8] c"Ran out of memory.\00"
define i8* @copy(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 @fatal(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
br label %11
9: ; preds = %1
%10 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %11
11: ; preds = %9, %7
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ zfree(void *);
void _dictFree(void *ptr) { zfree(ptr); }


x86 assembly (clang, -O0):
<_dictFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <zfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dictFree>:
jmp    1030 <zfree@plt>

LLVM IR (-O0):
define void @_dictFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @zfree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @_dictFree(i8* %0) {
%2 = tail call i32 @zfree(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ record_linux_param_description(char *, char *, char *);
void module_param_desc_use_rtt_scaling(void) {
  record_linux_param_description("tcp_htcp.c", "use_rtt_scaling",
                                 "turn on/off RTT scaling");
}


x86 assembly (clang, -O0):
<module_param_desc_use_rtt_scaling>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee9(%rip),%rsi
lea    0xef2(%rip),%rdx
call   1030 <record_linux_param_description@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_param_desc_use_rtt_scaling>:
lea    0xee9(%rip),%rdi
lea    0xeed(%rip),%rsi
lea    0xef6(%rip),%rdx
jmp    1030 <record_linux_param_description@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"tcp_htcp.c\00"
@.str.1 = [16 x i8] c"use_rtt_scaling\00"
@.str.2 = [24 x i8] c"turn on/off RTT scaling\00"
define void @module_param_desc_use_rtt_scaling() {
%1 = call i32 @record_linux_param_description(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"tcp_htcp.c\00"
@.str.1 = [16 x i8] c"use_rtt_scaling\00"
@.str.2 = [24 x i8] c"turn on/off RTT scaling\00"
define void @module_param_desc_use_rtt_scaling() {
%1 = tail call i32 @record_linux_param_description(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void SSE_status(void) {
  printf("Processor features detected: ");
  printf("SSE, SSE2\n");
}


x86 assembly (clang, -O0):
<SSE_status>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef7(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSE_status>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xeea(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"Processor features detected: \00"
@.str.1 = [11 x i8] c"SSE, SSE2\0A\00"
define void @SSE_status() {
%1 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"Processor features detected: \00"
@str = [10 x i8] c"SSE, SSE2\00"
define void @SSE_status() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x3a() {
  Assert_real((isbdigit(58) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              295, ("isbdigit should be 0 for :"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x3a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x127,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x3a>:
push   %rax
mov    $0x3a,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x127,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for :\00"
define void @t_isbdigit_0x3a() {
%1 = call i64 @isbdigit(i32 58)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 295, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for :\00"
define void @t_isbdigit_0x3a() {
%1 = tail call i64 @isbdigit(i32 58)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 295, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *libintl_dcngettext(int /*<<< orphan*/ *, char const *, char const *,
                         unsigned long, int);
char *libintl_ngettext(const char *msgid1, const char *msgid2,
                       unsigned long int n) {
  return libintl_dcngettext(NULL, msgid1, msgid2, n, 1729);
}


x86 assembly (clang, -O0):
<libintl_ngettext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edi
mov    $0x6c1,%r8d
call   1030 <libintl_dcngettext@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libintl_ngettext>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
mov    $0x6c1,%r8d
jmp    1030 <libintl_dcngettext@plt>

LLVM IR (-O0):
define i8* @libintl_ngettext(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @libintl_dcngettext(i32* null, i8* %7, i8* %8, i64 %9, i32 1729)
ret i8* %10
}

LLVM IR (-O2):
define i8* @libintl_ngettext(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @libintl_dcngettext(i32* null, i8* %0, i8* %1, i64 %2, i32 1729)
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void dl_sl_load(void *s, FILE *f) {}


x86 assembly (clang, -O0):
<dl_sl_load>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dl_sl_load>:
ret

LLVM IR (-O0):
define void @dl_sl_load(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @dl_sl_load(i8* nocapture %0, i32* nocapture %1) {
ret void
}
void gtk_text_view_scroll_to_iter() {}


x86 assembly (clang, -O0):
<gtk_text_view_scroll_to_iter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_scroll_to_iter>:
ret

LLVM IR (-O0):
define void @gtk_text_view_scroll_to_iter() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_scroll_to_iter() {
ret void
}
int sudoku_slot_col_from_id(int id) { return id % 9; }


x86 assembly (clang, -O0):
<sudoku_slot_col_from_id>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sudoku_slot_col_from_id>:
movslq %edi,%rax
imul   $0x38e38e39,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,8),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sudoku_slot_col_from_id(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 9
ret i32 %4
}

LLVM IR (-O2):
define i32 @sudoku_slot_col_from_id(i32 %0) {
%2 = srem i32 %0, 9
ret i32 %2
}
void setupMemoryLeakDetection() {}


x86 assembly (clang, -O0):
<setupMemoryLeakDetection>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setupMemoryLeakDetection>:
ret

LLVM IR (-O0):
define void @setupMemoryLeakDetection() {
ret void
}

LLVM IR (-O2):
define void @setupMemoryLeakDetection() {
ret void
}
dt() {}


x86 assembly (clang, -O0):
<dt>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dt>:
ret

LLVM IR (-O0):
define i32 @dt() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @dt() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int i, j;
  if (i == 1337) {
    while (i < 15) {
      if (i == 2) {
        printf("1\n");
        goto next;
      }
      i++;
    }
  }
  while (i < 15) {
  next:
    printf("2\n");
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x539,-0x8(%rbp)
jne    1169 <main+0x59>
jmp    1131 <main+0x21>
cmpl   $0xf,-0x8(%rbp)
jge    1164 <main+0x54>
cmpl   $0x2,-0x8(%rbp)
jne    1156 <main+0x46>
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
jmp    117d <main+0x6d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1131 <main+0x21>
jmp    1169 <main+0x59>
jmp    116e <main+0x5e>
cmpl   $0xf,-0x8(%rbp)
jge    1197 <main+0x87>
jmp    117d <main+0x6d>
lea    0xe7f(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    116e <main+0x5e>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"1\0A\00"
@.str.1 = [3 x i8] c"2\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 1337
br i1 %5, label %6, label %19
6: ; preds = %0
br label %7
7: ; preds = %15, %6
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 15
br i1 %9, label %10, label %18
10: ; preds = %7
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, 2
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %24
15: ; preds = %10
%16 = load i32, i32* %2
%17 = add nsw i32 %16, 1
store i32 %17, i32* %2
br label %7
18: ; preds = %7
br label %19
19: ; preds = %18, %0
br label %20
20: ; preds = %24, %19
%21 = load i32, i32* %2
%22 = icmp slt i32 %21, 15
br i1 %22, label %23, label %28
23: ; preds = %20
br label %24
24: ; preds = %23, %13
%25 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%26 = load i32, i32* %2
%27 = add nsw i32 %26, 1
store i32 %27, i32* %2
br label %20
28: ; preds = %20
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int inc(int *i) { return *i = (*i + 1) % (60 + 1); }


x86 assembly (clang, -O0):
<inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
mov    $0x3d,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    -0x8(%rbp),%rcx
mov    %eax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc>:
mov    (%rdi),%eax
mov    %eax,%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
imul   $0x4325c53f,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x24,%rcx
add    %edx,%ecx
imul   $0x3d,%ecx,%ecx
neg    %ecx
add    %ecx,%eax
add    $0x1,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @inc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
%6 = srem i32 %5, 61
%7 = load i32*, i32** %2
store i32 %6, i32* %7
ret i32 %6
}

LLVM IR (-O2):
define i32 @inc(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add nsw i32 %2, 1
%4 = srem i32 %3, 61
store i32 %4, i32* %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ TOSH_CLR_GREEN_LED_PIN();
int /*<<< orphan*/ TOSH_CLR_RED_LED_PIN();
int /*<<< orphan*/ TOSH_CLR_YELLOW_LED_PIN();
int /*<<< orphan*/ TOSH_MAKE_GREEN_LED_OUTPUT();
int /*<<< orphan*/ TOSH_MAKE_RED_LED_OUTPUT();
int /*<<< orphan*/ TOSH_MAKE_YELLOW_LED_OUTPUT();
void __assertUART(const char *file, int line) {
  {};
  TOSH_MAKE_RED_LED_OUTPUT();
  TOSH_CLR_RED_LED_PIN();
  TOSH_MAKE_YELLOW_LED_OUTPUT();
  TOSH_CLR_YELLOW_LED_PIN();
  TOSH_MAKE_GREEN_LED_OUTPUT();
  TOSH_CLR_GREEN_LED_PIN();
}


x86 assembly (clang, -O0):
<__assertUART>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1040 <TOSH_MAKE_RED_LED_OUTPUT@plt>
mov    $0x0,%al
call   1050 <TOSH_CLR_RED_LED_PIN@plt>
mov    $0x0,%al
call   1080 <TOSH_MAKE_YELLOW_LED_OUTPUT@plt>
mov    $0x0,%al
call   1030 <TOSH_CLR_YELLOW_LED_PIN@plt>
mov    $0x0,%al
call   1070 <TOSH_MAKE_GREEN_LED_OUTPUT@plt>
mov    $0x0,%al
call   1060 <TOSH_CLR_GREEN_LED_PIN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__assertUART>:
push   %rax
xor    %eax,%eax
call   1040 <TOSH_MAKE_RED_LED_OUTPUT@plt>
xor    %eax,%eax
call   1050 <TOSH_CLR_RED_LED_PIN@plt>
xor    %eax,%eax
call   1080 <TOSH_MAKE_YELLOW_LED_OUTPUT@plt>
xor    %eax,%eax
call   1030 <TOSH_CLR_YELLOW_LED_PIN@plt>
xor    %eax,%eax
call   1070 <TOSH_MAKE_GREEN_LED_OUTPUT@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <TOSH_CLR_GREEN_LED_PIN@plt>

LLVM IR (-O0):
define void @__assertUART(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 (...) @TOSH_MAKE_RED_LED_OUTPUT()
%6 = call i32 (...) @TOSH_CLR_RED_LED_PIN()
%7 = call i32 (...) @TOSH_MAKE_YELLOW_LED_OUTPUT()
%8 = call i32 (...) @TOSH_CLR_YELLOW_LED_PIN()
%9 = call i32 (...) @TOSH_MAKE_GREEN_LED_OUTPUT()
%10 = call i32 (...) @TOSH_CLR_GREEN_LED_PIN()
ret void
}

LLVM IR (-O2):
define void @__assertUART(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 (...) @TOSH_MAKE_RED_LED_OUTPUT()
%4 = tail call i32 (...) @TOSH_CLR_RED_LED_PIN()
%5 = tail call i32 (...) @TOSH_MAKE_YELLOW_LED_OUTPUT()
%6 = tail call i32 (...) @TOSH_CLR_YELLOW_LED_PIN()
%7 = tail call i32 (...) @TOSH_MAKE_GREEN_LED_OUTPUT()
%8 = tail call i32 (...) @TOSH_CLR_GREEN_LED_PIN()
ret void
}
void decrease_speed(double *sleep) { *sleep = *sleep / 1.5; }


x86 assembly (clang, -O0):
<decrease_speed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  0xee8(%rip),%xmm1
divsd  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<decrease_speed>:
movsd  (%rdi),%xmm0
divsd  0xef4(%rip),%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @decrease_speed(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = fdiv double %4, 1.500000e+00
%6 = load double*, double** %2
store double %5, double* %6
ret void
}

LLVM IR (-O2):
define void @decrease_speed(double* nocapture %0) {
%2 = load double, double* %0
%3 = fdiv double %2, 1.500000e+00
store double %3, double* %0
ret void
}
void pnx833x_gpio_disable_irq(unsigned int pin) {
  do {
    ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xFFE4))) &=
     ~(1 << (pin)));
  } while (0);
}


x86 assembly (clang, -O0):
<pnx833x_gpio_disable_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0ffe4,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0ffe4,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pnx833x_gpio_disable_irq>:
mov    %edi,%ecx
mov    $0xfffffffe,%eax
rol    %cl,%eax
cltq
mov    $0xb7e0ffe4,%ecx
and    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @pnx833x_gpio_disable_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1
%4 = load i32, i32* %2
%5 = shl i32 1, %4
%6 = xor i32 %5, -1
%7 = sext i32 %6 to i64
%8 = load volatile i64, i64* inttoptr (i64 3084976100 to i64*)
%9 = and i64 %8, %7
store volatile i64 %9, i64* inttoptr (i64 3084976100 to i64*)
br label %10
10: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @pnx833x_gpio_disable_irq(i32 %0) {
%2 = shl nuw i32 1, %0
%3 = xor i32 %2, -1
%4 = sext i32 %3 to i64
%5 = load volatile i64, i64* inttoptr (i64 3084976100 to i64*)
%6 = and i64 %5, %4
store volatile i64 %6, i64* inttoptr (i64 3084976100 to i64*)
ret void
}
void dummy_snprintf(void) {}


x86 assembly (clang, -O0):
<dummy_snprintf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_snprintf>:
ret

LLVM IR (-O0):
define void @dummy_snprintf() {
ret void
}

LLVM IR (-O2):
define void @dummy_snprintf() {
ret void
}
double discriminant(double a, double b, double c) { return b * b - 4 * a * c; }


x86 assembly (clang, -O0):
<discriminant>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xedb(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<discriminant>:
mulsd  0xef8(%rip),%xmm0
mulsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @discriminant(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %5
%9 = load double, double* %4
%10 = fmul double 4.000000e+00, %9
%11 = load double, double* %6
%12 = fmul double %10, %11
%13 = fneg double %12
%14 = call double @llvm.fmuladd.f64(double %7, double %8, double %13)
ret double %14
}

LLVM IR (-O2):
define double @discriminant(double %0, double %1, double %2) {
%4 = fmul double %0, -4.000000e+00
%5 = fmul double %4, %2
%6 = tail call double @llvm.fmuladd.f64(double %1, double %1, double %5)
ret double %6
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr8setBank0(int);
void m101_setParams(uint16_t addr, uint8_t val) {
  (void)addr;
  chr8setBank0(val << 13);
}


x86 assembly (clang, -O0):
<m101_setParams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xd,%edi
call   1030 <chr8setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m101_setParams>:
mov    %esi,%edi
shl    $0xd,%edi
jmp    1030 <chr8setBank0@plt>

LLVM IR (-O0):
define void @m101_setParams(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 13
%8 = call i32 @chr8setBank0(i32 %7)
ret void
}

LLVM IR (-O2):
define void @m101_setParams(i32 %0, i32 %1) {
%3 = shl i32 %1, 13
%4 = tail call i32 @chr8setBank0(i32 %3)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t FlashIntStatus(void) {
  uint32_t ui32IntFlags;
  ui32IntFlags = 0;
  if ((*((volatile unsigned long *)(0x40030000 + 0x0000201C))) & 0x01000000) {
    ui32IntFlags = 0x00400000;
  }
  if ((*((volatile unsigned long *)(0x40030000 + 0x0000201C))) & 0x02000000) {
    ui32IntFlags |= 0x00010000;
  }
  return (ui32IntFlags);
}


x86 assembly (clang, -O0):
<FlashIntStatus>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x4003201c,%eax
mov    (%rax),%rax
and    $0x1000000,%rax
cmp    $0x0,%rax
je     112a <FlashIntStatus+0x2a>
movl   $0x400000,-0x4(%rbp)
mov    $0x4003201c,%eax
mov    (%rax),%rax
and    $0x2000000,%rax
cmp    $0x0,%rax
je     114d <FlashIntStatus+0x4d>
mov    -0x4(%rbp),%eax
or     $0x10000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashIntStatus>:
mov    0x4003201c,%rcx
40
shr    $0x2,%ecx
and    $0x400000,%ecx
mov    0x4003201c,%rax
40
shr    $0x9,%eax
and    $0x10000,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @FlashIntStatus() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load volatile i64, i64* inttoptr (i64 1073946652 to i64*)
%3 = and i64 %2, 16777216
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 4194304, i32* %1
br label %6
6: ; preds = %5, %0
%7 = load volatile i64, i64* inttoptr (i64 1073946652 to i64*)
%8 = and i64 %7, 33554432
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, i32* %1
%12 = or i32 %11, 65536
store i32 %12, i32* %1
br label %13
13: ; preds = %10, %6
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @FlashIntStatus() {
%1 = load volatile i64, i64* inttoptr (i64 1073946652 to i64*)
%2 = trunc i64 %1 to i32
%3 = lshr i32 %2, 2
%4 = and i32 %3, 4194304
%5 = load volatile i64, i64* inttoptr (i64 1073946652 to i64*)
%6 = trunc i64 %5 to i32
%7 = lshr i32 %6, 9
%8 = and i32 %7, 65536
%9 = or i32 %8, %4
ret i32 %9
}
void empty_isr(unsigned int isr_number) {}


x86 assembly (clang, -O0):
<empty_isr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<empty_isr>:
ret

LLVM IR (-O0):
define void @empty_isr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @empty_isr(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data) {
  ;
  while ((*((volatile uint32_t *)(ui32Base + 0x00000F08))) & 0x00000002) {
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000F00))) = ui8Data;
}


x86 assembly (clang, -O0):
<I2CFIFODataPut>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xf08,%eax
cltq
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1127 <I2CFIFODataPut+0x27>
jmp    110a <I2CFIFODataPut+0xa>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xf00,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CFIFODataPut>:
movslq %edi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
testl  $0x2,0xf08(%rax)
jne    1110 <I2CFIFODataPut+0x10>
mov    %esi,0xf00(%rax)
ret

LLVM IR (-O0):
define void @I2CFIFODataPut(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %13, %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 3848
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, 2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %5
br label %5
14: ; preds = %5
%15 = load i32, i32* %4
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 3840
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 %15, i32* %19
ret void
}

LLVM IR (-O2):
define void @I2CFIFODataPut(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 3848
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
br label %6
6: ; preds = %6, %2
%7 = load volatile i32, i32* %5
%8 = and i32 %7, 2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %6
10: ; preds = %6
%11 = add nsw i32 %0, 3840
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %1, i32* %13
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  if (n % 10) {
    printf("1\n%d\n", n % 10);
  } else {
    printf("2\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1173 <main+0x53>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
lea    0xe9c(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1181 <main+0x61>
lea    0xe8f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
movslq 0x4(%rsp),%rsi
imul   $0x66666667,%rsi,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%esi
je     1174 <main+0x44>
lea    0xe98(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
jmp    1180 <main+0x50>
lea    0xe8e(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [6 x i8] c"1\0A%d\0A\00"
@.str.2 = [3 x i8] c"2\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = srem i32 %4, 10
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %0
%8 = load i32, i32* %2
%9 = srem i32 %8, 10
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 %9)
br label %13
11: ; preds = %0
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
br label %13
13: ; preds = %11, %7
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [6 x i8] c"1\0A%d\0A\00"
@str = [2 x i8] c"2\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = srem i32 %4, 10
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %0
%8 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 %5)
br label %11
9: ; preds = %0
%10 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
br label %11
11: ; preds = %9, %7
ret i32 0
}
void random_rd_init(const char *fname) {}


x86 assembly (clang, -O0):
<random_rd_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_rd_init>:
ret

LLVM IR (-O0):
define void @random_rd_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @random_rd_init(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int getpid();
int getppid();
uint32_t minidhc_gen_xid() {
  return ((uint32_t)(getpid() ^ getppid())) * 0x8d1a2f3d;
}


x86 assembly (clang, -O0):
<minidhc_gen_xid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getppid@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
xor    %ecx,%eax
imul   $0x8d1a2f3d,%eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minidhc_gen_xid>:
push   %rbx
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <getppid@plt>
xor    %ebx,%eax
imul   $0x8d1a2f3d,%eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @minidhc_gen_xid() {
%1 = call i32 (...) @getpid()
%2 = call i32 (...) @getppid()
%3 = xor i32 %1, %2
%4 = mul i32 %3, -1927663811
ret i32 %4
}

LLVM IR (-O2):
define i32 @minidhc_gen_xid() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 (...) @getppid()
%3 = xor i32 %2, %1
%4 = mul i32 %3, -1927663811
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ loglike_theta_fast_initialize();
void fitfun_initialize() { loglike_theta_fast_initialize(); }


x86 assembly (clang, -O0):
<fitfun_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <loglike_theta_fast_initialize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fitfun_initialize>:
xor    %eax,%eax
jmp    1030 <loglike_theta_fast_initialize@plt>

LLVM IR (-O0):
define void @fitfun_initialize() {
%1 = call i32 (...) @loglike_theta_fast_initialize()
ret void
}

LLVM IR (-O2):
define void @fitfun_initialize() {
%1 = tail call i32 (...) @loglike_theta_fast_initialize()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ reconstruct_missing_uv_sse2_ssse3(int /*<<< orphan*/ *,
                                                     int /*<<< orphan*/ *,
                                                     int /*<<< orphan*/ *);
extern void reconstruct_missing_uv_sse2_ssse3_sse41(__m128i *current_uv,
                                                    __m128i *next_uv,
                                                    __m128i *out) {
  reconstruct_missing_uv_sse2_ssse3(current_uv, next_uv, out);
}


x86 assembly (clang, -O0):
<reconstruct_missing_uv_sse2_ssse3_sse41>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <reconstruct_missing_uv_sse2_ssse3@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reconstruct_missing_uv_sse2_ssse3_sse41>:
jmp    1030 <reconstruct_missing_uv_sse2_ssse3@plt>

LLVM IR (-O0):
define void @reconstruct_missing_uv_sse2_ssse3_sse41(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32*, i32** %6
%10 = call i32 @reconstruct_missing_uv_sse2_ssse3(i32* %7, i32* %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @reconstruct_missing_uv_sse2_ssse3_sse41(i32* %0, i32* %1, i32* %2) {
%4 = tail call i32 @reconstruct_missing_uv_sse2_ssse3(i32* %0, i32* %1, i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ setCooked();
void finish(int n) {
  setCooked();
  exit(n);
}


x86 assembly (clang, -O0):
<finish>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <setCooked@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<finish>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <setCooked@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @finish(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @setCooked()
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
define void @finish(i32 %0) {
%2 = tail call i32 (...) @setCooked()
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ __LDREXW(scalar_t__ volatile *);
scalar_t__ __STREXW(scalar_t__, scalar_t__ volatile *);
uint32_t atomic_incr_u32(uint32_t *valuePtr, uint32_t delta) {
  uint32_t newValue;
  do {
    newValue = __LDREXW((volatile uint32_t *)valuePtr) + delta;
  } while (__STREXW(newValue, (volatile uint32_t *)valuePtr));
  return newValue;
}


x86 assembly (clang, -O0):
<atomic_incr_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__LDREXW@plt>
add    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <__STREXW@plt>
cmp    $0x0,%rax
jne    1130 <atomic_incr_u32+0x10>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_incr_u32>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
nopl   0x0(%rax,%rax,1)
mov    %r15,%rdi
call   1040 <__LDREXW@plt>
mov    %rax,%rbx
add    %r14,%rbx
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <__STREXW@plt>
test   %rax,%rax
jne    1130 <atomic_incr_u32+0x10>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @atomic_incr_u32(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
br label %6
6: ; preds = %11, %2
%7 = load i64*, i64** %3
%8 = call i64 @__LDREXW(i64* %7)
%9 = load i64, i64* %4
%10 = add nsw i64 %8, %9
store i64 %10, i64* %5
br label %11
11: ; preds = %6
%12 = load i64, i64* %5
%13 = load i64*, i64** %3
%14 = call i64 @__STREXW(i64 %12, i64* %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %6, label %16
16: ; preds = %11
%17 = load i64, i64* %5
ret i64 %17
}

LLVM IR (-O2):
define i64 @atomic_incr_u32(i64* %0, i64 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i64 @__LDREXW(i64* %0)
%5 = add nsw i64 %4, %1
%6 = tail call i64 @__STREXW(i64 %5, i64* %0)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ sleep(int);
void main() {
  sleep(7);
  exit(1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1040 <sleep@plt>
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
call   1040 <sleep@plt>
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @sleep(i32 7)
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @sleep(i32 7)
%2 = tail call i32 @exit(i32 1)
unreachable
}
long double log10l(long double x) {
  long double r;
  if (!x)
    return __pole_error(1);
  __asm__ __volatile__("fld1; fyl2x; fldl2t; fdivrp" : "=t"(r) : "0"(x));
  return r;
}


x86 assembly (clang, -O0):
<log10l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
fldz
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jne    1154 <log10l+0x44>
jp     1154 <log10l+0x44>
jmp    113a <log10l+0x2a>
xor    %eax,%eax
mov    $0x1,%edi
call   1030 <__pole_error@plt>
mov    %eax,-0x34(%rbp)
fildl  -0x34(%rbp)
fstpt  -0x10(%rbp)
jmp    1168 <log10l+0x58>
fldt   -0x20(%rbp)
fld1
fyl2x
fldl2t
fdivrp %st,%st(1)
fstpt  -0x30(%rbp)
fldt   -0x30(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log10l>:
push   %rax
fldt   0x10(%rsp)
fldz
fxch   %st(1)
fucomi %st(1),%st
fstp   %st(1)
jne    1121 <log10l+0x11>
jnp    112b <log10l+0x1b>
fld1
fyl2x
fldl2t
fdivrp %st,%st(1)
pop    %rax
ret
fstp   %st(0)
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <__pole_error@plt>
mov    %eax,0x4(%rsp)
fildl  0x4(%rsp)
pop    %rax
ret

LLVM IR (-O0):
define x86_fp80 @log10l(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
%5 = load x86_fp80, x86_fp80* %3
%6 = fcmp une x86_fp80 %5, 0xK00000000000000000000
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = call i32 (i32, ...) bitcast (i32 (...)* @__pole_error to i32 (i32, ...)*)(i32 1)
%9 = sitofp i32 %8 to x86_fp80
store x86_fp80 %9, x86_fp80* %2
br label %14
10: ; preds = %1
%11 = load x86_fp80, x86_fp80* %3
%12 = call x86_fp80 asm sideeffect "fld1; fyl2x; fldl2t; fdivrp", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %11)
store x86_fp80 %12, x86_fp80* %4
%13 = load x86_fp80, x86_fp80* %4
store x86_fp80 %13, x86_fp80* %2
br label %14
14: ; preds = %10, %7
%15 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %15
}

LLVM IR (-O2):
define x86_fp80 @log10l(x86_fp80 %0) {
%2 = fcmp une x86_fp80 %0, 0xK00000000000000000000
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @__pole_error to i32 (i32, ...)*)(i32 1)
%5 = sitofp i32 %4 to x86_fp80
br label %8
6: ; preds = %1
%7 = tail call x86_fp80 asm sideeffect "fld1; fyl2x; fldl2t; fdivrp", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0)
br label %8
8: ; preds = %6, %3
%9 = phi x86_fp80 [ %7, %6 ], [ %5, %3 ]
ret x86_fp80 %9
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void PIL_sleep(int t) { sleep(t); }


x86 assembly (clang, -O0):
<PIL_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIL_sleep>:
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @PIL_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @PIL_sleep(i32 %0) {
%2 = tail call i32 @sleep(i32 %0)
ret void
}
/* Type definitions */
struct index_packet {
  int dummy;
};

/* Variables and functions */
int pgread_big_endian(unsigned char *, struct index_packet *);
int pgread_little_endian(unsigned char *, struct index_packet *);
int flatpack__pgread(unsigned char *page, struct index_packet *target,
                     int little_endian) {
  if (little_endian)
    return pgread_little_endian(page, target);
  else
    return pgread_big_endian(page, target);
}


x86 assembly (clang, -O0):
<flatpack__pgread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1152 <flatpack__pgread+0x32>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <pgread_little_endian@plt>
mov    %eax,-0x4(%rbp)
jmp    1162 <flatpack__pgread+0x42>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <pgread_big_endian@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flatpack__pgread>:
test   %edx,%edx
je     1129 <flatpack__pgread+0x9>
jmp    1040 <pgread_little_endian@plt>
jmp    1030 <pgread_big_endian@plt>

LLVM IR (-O0):
%struct.index_packet = type { i32 }
define i32 @flatpack__pgread(i8* %0, %struct.index_packet* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca %struct.index_packet*
%7 = alloca i32
store i8* %0, i8** %5
store %struct.index_packet* %1, %struct.index_packet** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = load %struct.index_packet*, %struct.index_packet** %6
%13 = call i32 @pgread_little_endian(i8* %11, %struct.index_packet* %12)
store i32 %13, i32* %4
br label %18
14: ; preds = %3
%15 = load i8*, i8** %5
%16 = load %struct.index_packet*, %struct.index_packet** %6
%17 = call i32 @pgread_big_endian(i8* %15, %struct.index_packet* %16)
store i32 %17, i32* %4
br label %18
18: ; preds = %14, %10
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
%struct.index_packet = type { i32 }
define i32 @flatpack__pgread(i8* %0, %struct.index_packet* %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @pgread_little_endian(i8* %0, %struct.index_packet* %1)
br label %9
7: ; preds = %3
%8 = tail call i32 @pgread_big_endian(i8* %0, %struct.index_packet* %1)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ streamtowrite(int, void const *, int /*<<< orphan*/,
                                 int /*<<< orphan*/);
int32_t unixtowrite(int sock, const void *buff, uint32_t leng,
                    uint32_t msecto) {
  return streamtowrite(sock, buff, leng, msecto);
}


x86 assembly (clang, -O0):
<unixtowrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <streamtowrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unixtowrite>:
jmp    1030 <streamtowrite@plt>

LLVM IR (-O0):
define i32 @unixtowrite(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @streamtowrite(i32 %9, i8* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @unixtowrite(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @streamtowrite(i32 %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
int compute_log2(int val) {
  int count = 0;
  while (val > 1) {
    if (val & 1)
      return -1;
    val /= 2;
    count++;
  }
  return (val == 0) ? -1 : count;
}


x86 assembly (clang, -O0):
<compute_log2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    114f <compute_log2+0x4f>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1133 <compute_log2+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    1172 <compute_log2+0x72>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <compute_log2+0xe>
cmpl   $0x0,-0x8(%rbp)
jne    1166 <compute_log2+0x66>
mov    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    116c <compute_log2+0x6c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_log2>:
xor    %ecx,%ecx
cmp    $0x2,%edi
jl     1126 <compute_log2+0x26>
xor    %ecx,%ecx
nopl   0x0(%rax)
test   $0x1,%dil
jne    1130 <compute_log2+0x30>
mov    %edi,%eax
shr    %eax
add    $0x1,%ecx
cmp    $0x3,%edi
mov    %eax,%edi
ja     1110 <compute_log2+0x10>
jmp    1128 <compute_log2+0x28>
mov    %edi,%eax
cmp    $0x1,%eax
sbb    %eax,%eax
or     %ecx,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @compute_log2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %3
%10 = and i32 %9, 1
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 -1, i32* %2
br label %26
13: ; preds = %8
%14 = load i32, i32* %3
%15 = sdiv i32 %14, 2
store i32 %15, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %18
br label %24
22: ; preds = %18
%23 = load i32, i32* %4
br label %24
24: ; preds = %22, %21
%25 = phi i32 [ -1, %21 ], [ %23, %22 ]
store i32 %25, i32* %2
br label %26
26: ; preds = %24, %12
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @compute_log2(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %12
3: ; preds = %1, %8
%4 = phi i32 [ %10, %8 ], [ 0, %1 ]
%5 = phi i32 [ %9, %8 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %3
%9 = lshr i32 %5, 1
%10 = add nuw nsw i32 %4, 1
%11 = icmp ugt i32 %5, 3
br i1 %11, label %3, label %12
12: ; preds = %8, %1
%13 = phi i32 [ %0, %1 ], [ %9, %8 ]
%14 = phi i32 [ 0, %1 ], [ %10, %8 ]
%15 = icmp eq i32 %13, 0
%16 = select i1 %15, i32 -1, i32 %14
br label %17
17: ; preds = %3, %12
%18 = phi i32 [ %16, %12 ], [ -1, %3 ]
ret i32 %18
}