xunge/DecIR huggingface dataset:
void Timer0A_Enable(void) {
  (*((volatile unsigned long *)0x4003000C)) |= 0x00000001;
}


x86 assembly (clang, -O0):
<Timer0A_Enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4003000c,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0x4003000c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Timer0A_Enable>:
orq    $0x1,0x4003000c
40 01
ret

LLVM IR (-O0):
define void @Timer0A_Enable() {
%1 = load volatile i64, i64* inttoptr (i64 1073938444 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 1073938444 to i64*)
ret void
}

LLVM IR (-O2):
define void @Timer0A_Enable() {
%1 = load volatile i64, i64* inttoptr (i64 1073938444 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 1073938444 to i64*)
ret void
}
void delay() {}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
ret

LLVM IR (-O0):
define void @delay() {
ret void
}

LLVM IR (-O2):
define void @delay() {
ret void
}
int dscal(int N, double DA, double *DX, int INCX) {
  extern int dscal_(int *N, double *DA, double *DX, int *INCX);
  return dscal_(&N, &DA, DX, &INCX);
}


x86 assembly (clang, -O0):
<dscal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x18(%rbp),%rdx
lea    -0x4(%rbp),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x1c(%rbp),%rcx
call   1030 <dscal_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dscal>:
sub    $0x18,%rsp
mov    %rsi,%rax
mov    %edi,0xc(%rsp)
movsd  %xmm0,0x10(%rsp)
mov    %edx,0x8(%rsp)
lea    0xc(%rsp),%rdi
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rcx
mov    %rax,%rdx
call   1030 <dscal_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @dscal(i32 %0, double %1, double* %2, i32 %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca double*
%8 = alloca i32
store i32 %0, i32* %5
store double %1, double* %6
store double* %2, double** %7
store i32 %3, i32* %8
%9 = load double*, double** %7
%10 = call i32 @dscal_(i32* %5, double* %6, double* %9, i32* %8)
ret i32 %10
}

LLVM IR (-O2):
define i32 @dscal(i32 %0, double %1, double* %2, i32 %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca i32
store i32 %0, i32* %5
store double %1, double* %6
store i32 %3, i32* %7
%8 = call i32 @dscal_(i32* %5, double* %6, double* %2, i32* %7)
ret i32 %8
}
void nfs_fscache_renew_cookie(struct inode *inode) {}


x86 assembly (clang, -O0):
<nfs_fscache_renew_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfs_fscache_renew_cookie>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @nfs_fscache_renew_cookie(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @nfs_fscache_renew_cookie(%struct.inode* nocapture %0) {
ret void
}
__attribute__((always_)) void disable_edge_ioapic_irq(unsigned int irq) {}


x86 assembly (clang, -O0):
<disable_edge_ioapic_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_edge_ioapic_irq>:
ret

LLVM IR (-O0):
define void @disable_edge_ioapic_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @disable_edge_ioapic_irq(i32 %0) {
ret void
}
unsigned xrop3_53_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D ^ S;
  stk3 = ~stk3;
  stk2 = T | stk3;
  stk1 = S ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_53_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_53_1_1>:
mov    %esi,%eax
or     %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
or     %esi,%eax
xor    $0xffffff00,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_53_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %6
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %10
%27 = xor i32 %26, -1
store i32 %27, i32* %10
%28 = load i32, i32* %7
%29 = load i32, i32* %10
%30 = or i32 %28, %29
store i32 %30, i32* %9
%31 = load i32, i32* %6
%32 = load i32, i32* %9
%33 = xor i32 %31, %32
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %7
%39 = xor i32 %38, -1
%40 = and i32 %37, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %6
%43 = and i32 %41, %42
%44 = or i32 %40, %43
%45 = load i32, i32* %5
%46 = load i32, i32* %7
%47 = and i32 %45, %46
%48 = or i32 %44, %47
ret i32 %48
}

LLVM IR (-O2):
define i32 @xrop3_53_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = or i8 %1, %0
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = or i32 %8, %4
%10 = xor i32 %9, -256
ret i32 %10
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t ntohs(uint16_t netshort) { return (netshort << 8) | (netshort >> 8); }


x86 assembly (clang, -O0):
<ntohs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntohs>:
mov    %edi,%eax
shl    $0x8,%eax
sar    $0x8,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @ntohs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @ntohs(i32 %0) {
%2 = shl i32 %0, 8
%3 = ashr i32 %0, 8
%4 = or i32 %2, %3
ret i32 %4
}
void irqNMI() {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<irqNMI>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <irqNMI+0x9>
jmp    1109 <irqNMI+0x9>

x86 assembly (clang, -O2):
<irqNMI>:
jmp    1100 <irqNMI>

LLVM IR (-O0):
define void @irqNMI() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @irqNMI() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int rom_present(char *);
int gd5434_available(void) {
  return rom_present(L"roms/video/cirruslogic/gd5434.bin");
}


x86 assembly (clang, -O0):
<gd5434_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gd5434_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [34 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 103, i32 100, i32 53, i32 52, i32 51, i32 52, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @gd5434_available() {
%1 = call i32 @rom_present(i8* bitcast ([34 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [34 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 103, i32 100, i32 53, i32 52, i32 51, i32 52, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @gd5434_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([34 x i32]* @.str to i8*))
ret i32 %1
}
void buildat_mem_libc_enable() {}


x86 assembly (clang, -O0):
<buildat_mem_libc_enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buildat_mem_libc_enable>:
ret

LLVM IR (-O0):
define void @buildat_mem_libc_enable() {
ret void
}

LLVM IR (-O2):
define void @buildat_mem_libc_enable() {
ret void
}
/* Variables and functions */
double mp_time_us();
double mp_time_sec(void) { return mp_time_us() / (double)(1000 * 1000); }


x86 assembly (clang, -O0):
<mp_time_sec>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mp_time_us@plt>
movsd  0xedd(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_time_sec>:
push   %rax
xor    %eax,%eax
call   1030 <mp_time_us@plt>
divsd  0xee0(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @mp_time_sec() {
%1 = call double (...) @mp_time_us()
%2 = fdiv double %1, 1.000000e+06
ret double %2
}

LLVM IR (-O2):
define double @mp_time_sec() {
%1 = tail call double (...) @mp_time_us()
%2 = fdiv double %1, 1.000000e+06
ret double %2
}
void foo249() {}


x86 assembly (clang, -O0):
<foo249>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo249>:
ret

LLVM IR (-O0):
define void @foo249() {
ret void
}

LLVM IR (-O2):
define void @foo249() {
ret void
}
int logicalShift(int x, int n) {
  int mask = ~(((~0) << ((~n) + 32)) << 1);
  return (x >> n) & mask;
}


x86 assembly (clang, -O0):
<logicalShift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
add    $0x20,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
shl    $0x1,%eax
xor    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logicalShift>:
mov    $0x1f,%cl
sub    %sil,%cl
mov    $0xfffffffe,%eax
shl    %cl,%eax
not    %eax
mov    %esi,%ecx
sar    %cl,%edi
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = xor i32 %6, -1
%8 = add nsw i32 %7, 32
%9 = shl i32 -1, %8
%10 = shl i32 %9, 1
%11 = xor i32 %10, -1
store i32 %11, i32* %5
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = ashr i32 %12, %13
%15 = load i32, i32* %5
%16 = and i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = sub i32 31, %1
%4 = shl i32 -2, %3
%5 = xor i32 %4, -1
%6 = ashr i32 %0, %1
%7 = and i32 %6, %5
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ _output_centroids(int);
void output_centroids_with_point_num() {
  _output_centroids(1);
  return;
}


x86 assembly (clang, -O0):
<output_centroids_with_point_num>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <_output_centroids@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_centroids_with_point_num>:
mov    $0x1,%edi
jmp    1030 <_output_centroids@plt>

LLVM IR (-O0):
define void @output_centroids_with_point_num() {
%1 = call i32 @_output_centroids(i32 1)
ret void
}

LLVM IR (-O2):
define void @output_centroids_with_point_num() {
%1 = tail call i32 @_output_centroids(i32 1)
ret void
}
/* Type definitions */
struct dumperinfo {
  int dummy;
};

/* Variables and functions */
int dumpsys_gen_write_aux_headers(struct dumperinfo *);
int dumpsys_write_aux_headers(struct dumperinfo *di) {
  return (dumpsys_gen_write_aux_headers(di));
}


x86 assembly (clang, -O0):
<dumpsys_write_aux_headers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dumpsys_gen_write_aux_headers@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpsys_write_aux_headers>:
jmp    1030 <dumpsys_gen_write_aux_headers@plt>

LLVM IR (-O0):
%struct.dumperinfo = type { i32 }
define i32 @dumpsys_write_aux_headers(%struct.dumperinfo* %0) {
%2 = alloca %struct.dumperinfo*
store %struct.dumperinfo* %0, %struct.dumperinfo** %2
%3 = load %struct.dumperinfo*, %struct.dumperinfo** %2
%4 = call i32 @dumpsys_gen_write_aux_headers(%struct.dumperinfo* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.dumperinfo = type { i32 }
define i32 @dumpsys_write_aux_headers(%struct.dumperinfo* %0) {
%2 = tail call i32 @dumpsys_gen_write_aux_headers(%struct.dumperinfo* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ name_cipher(char *, short);
int /*<<< orphan*/ r_read(int /*<<< orphan*/ *, char *, short);
void read_string(char *s, FILE *fp) {
  short n;
  r_read(fp, (char *)&n, sizeof(short));
  r_read(fp, s, n);
  name_cipher(s, n);
}


x86 assembly (clang, -O0):
<read_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x12(%rbp),%rsi
mov    $0x2,%edx
call   1040 <r_read@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movswl -0x12(%rbp),%edx
call   1040 <r_read@plt>
mov    -0x8(%rbp),%rdi
movswl -0x12(%rbp),%esi
call   1030 <name_cipher@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_string>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0x6(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x2,%edx
call   1040 <r_read@plt>
movswl 0x6(%rsp),%edx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <r_read@plt>
movswl 0x6(%rsp),%esi
mov    %r14,%rdi
call   1030 <name_cipher@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @read_string(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i16
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = bitcast i16* %5 to i8*
%8 = call i32 @r_read(i32* %6, i8* %7, i16 signext 2)
%9 = load i32*, i32** %4
%10 = load i8*, i8** %3
%11 = load i16, i16* %5
%12 = call i32 @r_read(i32* %9, i8* %10, i16 signext %11)
%13 = load i8*, i8** %3
%14 = load i16, i16* %5
%15 = call i32 @name_cipher(i8* %13, i16 signext %14)
ret void
}

LLVM IR (-O2):
define void @read_string(i8* %0, i32* %1) {
%3 = alloca i16
%4 = bitcast i16* %3 to i8*
%5 = call i32 @r_read(i32* %1, i8* %4, i16 signext 2)
%6 = load i16, i16* %3
%7 = call i32 @r_read(i32* %1, i8* %0, i16 signext %6)
%8 = load i16, i16* %3
%9 = call i32 @name_cipher(i8* %0, i16 signext %8)
ret void
}
/* Variables and functions */
size_t strlcat(char *, char const *, size_t);
size_t strlen(char *);
size_t strlcpy(char *dst, const char *src, size_t siz) {
  if (siz == 0)
    return strlen(dst);
  dst[0] = '\0';
  return strlcat(dst, src, siz);
}


x86 assembly (clang, -O0):
<strlcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1151 <strlcpy+0x31>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x8(%rbp)
jmp    116d <strlcpy+0x4d>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <strlcat@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlcpy>:
test   %rdx,%rdx
je     112d <strlcpy+0xd>
movb   $0x0,(%rdi)
jmp    1030 <strlcat@plt>
jmp    1040 <strlen@plt>

LLVM IR (-O0):
define i64 @strlcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = call i64 @strlen(i8* %11)
store i64 %12, i64* %4
br label %20
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i64 0
store i8 0, i8* %15
%16 = load i8*, i8** %5
%17 = load i8*, i8** %6
%18 = load i64, i64* %7
%19 = call i64 @strlcat(i8* %16, i8* %17, i64 %18)
store i64 %19, i64* %4
br label %20
20: ; preds = %13, %10
%21 = load i64, i64* %4
ret i64 %21
}

LLVM IR (-O2):
define i64 @strlcpy(i8* %0, i8* %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
br label %9
7: ; preds = %3
store i8 0, i8* %0
%8 = tail call i64 @strlcat(i8* %0, i8* %1, i64 %2)
br label %9
9: ; preds = %7, %5
%10 = phi i64 [ %6, %5 ], [ %8, %7 ]
ret i64 %10
}
int C_Utils_compare_uint_ptr(const unsigned int *item1,
                             const unsigned int *item2) {
  unsigned int i1 = *item1;
  unsigned int i2 = *item2;
  if (i1 == i2)
    return 0;
  return i1 < i2 ? -1 : 1;
}


x86 assembly (clang, -O0):
<C_Utils_compare_uint_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jne    1136 <C_Utils_compare_uint_ptr+0x36>
movl   $0x0,-0x4(%rbp)
jmp    114e <C_Utils_compare_uint_ptr+0x4e>
mov    -0x1c(%rbp),%edx
mov    -0x20(%rbp),%esi
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    %esi,%edx
cmovb  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Utils_compare_uint_ptr>:
mov    (%rdi),%eax
xor    %ecx,%ecx
xor    %edx,%edx
cmp    (%rsi),%eax
setae  %dl
lea    -0x1(%rdx,%rdx,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @C_Utils_compare_uint_ptr(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
store i32 %9, i32* %6
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 0, i32* %3
br label %22
16: ; preds = %2
%17 = load i32, i32* %6
%18 = load i32, i32* %7
%19 = icmp ult i32 %17, %18
%20 = zext i1 %19 to i64
%21 = select i1 %19, i32 -1, i32 1
store i32 %21, i32* %3
br label %22
22: ; preds = %16, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @C_Utils_compare_uint_ptr(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp eq i32 %3, %4
%6 = icmp ult i32 %3, %4
%7 = select i1 %6, i32 -1, i32 1
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ nl_oom();
char *strchr(char *, char);
char *strdup(char *);
char *nl_nid_addr(char *nid) {
  char *addr, *p;
  addr = strdup(nid);
  if (!addr)
    nl_oom();
  p = strchr(addr, '@');
  if (p)
    *p = '\0';
  return addr;
}


x86 assembly (clang, -O0):
<nl_nid_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115b <nl_nid_addr+0x2b>
mov    $0x0,%al
call   1030 <nl_oom@plt>
mov    -0x10(%rbp),%rdi
mov    $0x40,%esi
call   1040 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     117f <nl_nid_addr+0x4f>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nl_nid_addr>:
push   %rbx
call   1050 <strdup@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1145 <nl_nid_addr+0x15>
xor    %eax,%eax
call   1030 <nl_oom@plt>
mov    %rbx,%rdi
mov    $0x40,%esi
call   1040 <strchr@plt>
test   %rax,%rax
je     115a <nl_nid_addr+0x2a>
movb   $0x0,(%rax)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @nl_nid_addr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @strdup(i8* %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = call i32 (...) @nl_oom()
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %3
%13 = call i8* @strchr(i8* %12, i8 signext 64)
store i8* %13, i8** %4
%14 = load i8*, i8** %4
%15 = icmp ne i8* %14, null
br i1 %15, label %16, label %18
16: ; preds = %11
%17 = load i8*, i8** %4
store i8 0, i8* %17
br label %18
18: ; preds = %16, %11
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @nl_nid_addr(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @nl_oom()
br label %6
6: ; preds = %4, %1
%7 = tail call i8* @strchr(i8* dereferenceable(1) %2, i8 signext 64)
%8 = icmp eq i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %6
store i8 0, i8* %7
br label %10
10: ; preds = %9, %6
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ arm_mpy_op();
int /*<<< orphan*/ arm_mpy_smlal(int /*<<< orphan*/);
void arm_smlal() { arm_mpy_smlal(arm_mpy_op()); }


x86 assembly (clang, -O0):
<arm_smlal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arm_mpy_op@plt>
mov    %eax,%edi
call   1040 <arm_mpy_smlal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_smlal>:
push   %rax
xor    %eax,%eax
call   1030 <arm_mpy_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <arm_mpy_smlal@plt>

LLVM IR (-O0):
define void @arm_smlal() {
%1 = call i32 (...) @arm_mpy_op()
%2 = call i32 @arm_mpy_smlal(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_smlal() {
%1 = tail call i32 (...) @arm_mpy_op()
%2 = tail call i32 @arm_mpy_smlal(i32 %1)
ret void
}
int grid_xpull_ispeer(int socktype) { return socktype == (5 * 16 + 0) ? 1 : 0; }


x86 assembly (clang, -O0):
<grid_xpull_ispeer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x50,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_xpull_ispeer>:
xor    %eax,%eax
cmp    $0x50,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @grid_xpull_ispeer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 80
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @grid_xpull_ispeer(i32 %0) {
%2 = icmp eq i32 %0, 80
%3 = zext i1 %2 to i32
ret i32 %3
}
void syslog() {}


x86 assembly (clang, -O0):
<syslog>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syslog>:
ret

LLVM IR (-O0):
define void @syslog() {
ret void
}

LLVM IR (-O2):
define void @syslog() {
ret void
}
void gtk_cell_renderer_progress_new() {}


x86 assembly (clang, -O0):
<gtk_cell_renderer_progress_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_cell_renderer_progress_new>:
ret

LLVM IR (-O0):
define void @gtk_cell_renderer_progress_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_cell_renderer_progress_new() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int read(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ usleep(int);
int /*<<< orphan*/ write(int, char *, int);
int main() {
  char buf[64000];
  int n;
  while (1) {
    n = read(0, buf, sizeof(buf));
    usleep(10000);
    if (n <= 0) {
      break;
    }
    write(1, buf, n);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0xfa20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0xfa10(%rbp),%rsi
xor    %edi,%edi
mov    $0xfa00,%edx
call   1040 <read@plt>
mov    %eax,-0xfa14(%rbp)
mov    $0x2710,%edi
call   1050 <usleep@plt>
cmpl   $0x0,-0xfa14(%rbp)
jg     1177 <main+0x47>
jmp    1193 <main+0x63>
lea    -0xfa10(%rbp),%rsi
mov    -0xfa14(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
jmp    1142 <main+0x12>
xor    %eax,%eax
add    $0xfa20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0xfa08,%rsp
mov    %rsp,%rsi
xor    %edi,%edi
mov    $0xfa00,%edx
call   1040 <read@plt>
mov    %eax,%ebx
mov    $0x2710,%edi
call   1050 <usleep@plt>
test   %ebx,%ebx
jle    118e <main+0x5e>
mov    %rsp,%r14
nopl   0x0(%rax)
mov    $0x1,%edi
mov    %r14,%rsi
mov    %ebx,%edx
call   1030 <write@plt>
xor    %edi,%edi
mov    %r14,%rsi
mov    $0xfa00,%edx
call   1040 <read@plt>
mov    %eax,%ebx
mov    $0x2710,%edi
call   1050 <usleep@plt>
test   %ebx,%ebx
jg     1160 <main+0x30>
xor    %eax,%eax
add    $0xfa08,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [64000 x i8]
%3 = alloca i32
store i32 0, i32* %1
br label %4
4: ; preds = %0, %11
%5 = getelementptr inbounds [64000 x i8], [64000 x i8]* %2, i64 0, i64 0
%6 = call i32 @read(i32 0, i8* %5, i32 64000)
store i32 %6, i32* %3
%7 = call i32 @usleep(i32 10000)
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %4
br label %15
11: ; preds = %4
%12 = getelementptr inbounds [64000 x i8], [64000 x i8]* %2, i64 0, i64 0
%13 = load i32, i32* %3
%14 = call i32 @write(i32 1, i8* %12, i32 %13)
br label %4
15: ; preds = %10
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [64000 x i8]
%2 = getelementptr inbounds [64000 x i8], [64000 x i8]* %1, i64 0, i64 0
%3 = call i32 @read(i32 0, i8* %2, i32 64000)
%4 = tail call i32 @usleep(i32 10000)
%5 = icmp slt i32 %3, 1
br i1 %5, label %12, label %6
6: ; preds = %0, %6
%7 = phi i32 [ %9, %6 ], [ %3, %0 ]
%8 = call i32 @write(i32 1, i8* %2, i32 %7)
%9 = call i32 @read(i32 0, i8* %2, i32 64000)
%10 = tail call i32 @usleep(i32 10000)
%11 = icmp slt i32 %9, 1
br i1 %11, label %12, label %6
12: ; preds = %6, %0
ret i32 0
}
int PyDTrace_LINE_ENABLED(void) { return 0; }


x86 assembly (clang, -O0):
<PyDTrace_LINE_ENABLED>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyDTrace_LINE_ENABLED>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PyDTrace_LINE_ENABLED() {
ret i32 0
}

LLVM IR (-O2):
define i32 @PyDTrace_LINE_ENABLED() {
ret i32 0
}
/* Variables and functions */
scalar_t__ check_leap_year(short);
short get_yday(short year) {
  if (check_leap_year(year))
    return 366;
  else
    return 365;
}


x86 assembly (clang, -O0):
<get_yday>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%edi
call   1030 <check_leap_year@plt>
cmp    $0x0,%rax
je     113d <get_yday+0x2d>
movw   $0x16e,-0x2(%rbp)
jmp    1143 <get_yday+0x33>
movw   $0x16d,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_yday>:
push   %rax
call   1030 <check_leap_year@plt>
cmp    $0x1,%rax
mov    $0x16e,%ax
sbb    $0x0,%ax
pop    %rcx
ret

LLVM IR (-O0):
define signext i16 @get_yday(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = call i64 @check_leap_year(i16 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i16 366, i16* %2
br label %9
8: ; preds = %1
store i16 365, i16* %2
br label %9
9: ; preds = %8, %7
%10 = load i16, i16* %2
ret i16 %10
}

LLVM IR (-O2):
define signext i16 @get_yday(i16 signext %0) {
%2 = tail call i64 @check_leap_year(i16 signext %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i16 365, i16 366
ret i16 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage(void) { printf("Usage: echo \"STRING\" >> FILE\n"); }


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"Usage: echo \22STRING\22 >> FILE\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [29 x i8] c"Usage: echo \22STRING\22 >> FILE\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vol_print_all();
void dfi_s390mv_info(void) { vol_print_all(); }


x86 assembly (clang, -O0):
<dfi_s390mv_info>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <vol_print_all@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfi_s390mv_info>:
xor    %eax,%eax
jmp    1030 <vol_print_all@plt>

LLVM IR (-O0):
define void @dfi_s390mv_info() {
%1 = call i32 (...) @vol_print_all()
ret void
}

LLVM IR (-O2):
define void @dfi_s390mv_info() {
%1 = tail call i32 (...) @vol_print_all()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug_print(char *, void *, char const *, int,
                               int /*<<< orphan*/);
int /*<<< orphan*/ free(void *);
void debug_free(void *p, const char *filename, int line) {
  debug_print("-free", p, filename, line, 0);
  free(p);
}


x86 assembly (clang, -O0):
<debug_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xebb(%rip),%rdi
xor    %r8d,%r8d
call   1040 <debug_print@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_free>:
push   %rbx
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rbx
lea    0xed0(%rip),%rdi
mov    %rbx,%rsi
xor    %r8d,%r8d
call   1040 <debug_print@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"-free\00"
define void @debug_free(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @debug_print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8, i32 %9, i32 0)
%11 = load i8*, i8** %4
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"-free\00"
define void @debug_free(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @debug_print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i32 %2, i32 0)
%5 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar_fd(char, int);
int /*<<< orphan*/ ft_putdigit_fd(long long, int);
void ft_putllong_fd(long long n, int fd) {
  if (n < 0) {
    ft_putchar_fd('-', fd);
    n = -n;
  }
  ft_putdigit_fd(n, fd);
}


x86 assembly (clang, -O0):
<ft_putllong_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1151 <ft_putllong_fd+0x31>
mov    -0xc(%rbp),%esi
mov    $0x2d,%edi
call   1040 <ft_putchar_fd@plt>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ft_putdigit_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putllong_fd>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
test   %rdi,%rdi
jns    113c <ft_putllong_fd+0x1c>
mov    $0x2d,%edi
mov    %ebp,%esi
call   1040 <ft_putchar_fd@plt>
neg    %rbx
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ft_putdigit_fd@plt>

LLVM IR (-O0):
define void @ft_putllong_fd(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, i32* %4
%9 = call i32 @ft_putchar_fd(i8 signext 45, i32 %8)
%10 = load i64, i64* %3
%11 = sub nsw i64 0, %10
store i64 %11, i64* %3
br label %12
12: ; preds = %7, %2
%13 = load i64, i64* %3
%14 = load i32, i32* %4
%15 = call i32 @ft_putdigit_fd(i64 %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @ft_putllong_fd(i64 %0, i32 %1) {
%3 = icmp slt i64 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @ft_putchar_fd(i8 signext 45, i32 %1)
%6 = sub nsw i64 0, %0
br label %7
7: ; preds = %4, %2
%8 = phi i64 [ %6, %4 ], [ %0, %2 ]
%9 = tail call i32 @ft_putdigit_fd(i64 %8, i32 %1)
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ mshell_loop();
int main(int argc, char **argv) {
  mshell_loop();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <mshell_loop@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <mshell_loop@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @mshell_loop()
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @mshell_loop()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Type definitions */
struct trace_seq {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ trace_seq_printf(struct trace_seq *, char *,
                                    int /*<<< orphan*/);
int /*<<< orphan*/ xen_hypercall_name(unsigned int);
unsigned long long process_xen_hypercall_name(struct trace_seq *s,
                                              unsigned long long *args) {
  unsigned int op = args[0];
  trace_seq_printf(s, "%s", xen_hypercall_name(op));
  return 0;
}


x86 assembly (clang, -O0):
<process_xen_hypercall_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <xen_hypercall_name@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%edx
lea    0xea9(%rip),%rsi
call   1030 <trace_seq_printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_xen_hypercall_name>:
push   %rbx
mov    %rdi,%rbx
mov    (%rsi),%edi
call   1040 <xen_hypercall_name@plt>
lea    0xece(%rip),%rsi
mov    %rbx,%rdi
mov    %eax,%edx
call   1030 <trace_seq_printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.trace_seq = type { i32 }
@.str = [3 x i8] c"%s\00"
define i64 @process_xen_hypercall_name(%struct.trace_seq* %0, i64* %1) {
%3 = alloca %struct.trace_seq*
%4 = alloca i64*
%5 = alloca i32
store %struct.trace_seq* %0, %struct.trace_seq** %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = getelementptr inbounds i64, i64* %6, i64 0
%8 = load i64, i64* %7
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = load %struct.trace_seq*, %struct.trace_seq** %3
%11 = load i32, i32* %5
%12 = call i32 @xen_hypercall_name(i32 %11)
%13 = call i32 @trace_seq_printf(%struct.trace_seq* %10, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
ret i64 0
}

LLVM IR (-O2):
%struct.trace_seq = type { i32 }
@.str = [3 x i8] c"%s\00"
define i64 @process_xen_hypercall_name(%struct.trace_seq* %0, i64* nocapture %1) {
%3 = load i64, i64* %1
%4 = trunc i64 %3 to i32
%5 = tail call i32 @xen_hypercall_name(i32 %4)
%6 = tail call i32 @trace_seq_printf(%struct.trace_seq* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i64 0
}
/* Type definitions */
typedef unsigned long volatile uint32_t;
typedef scalar_t__ ui32Base;

/* Variables and functions */
void PWMGenIntTrigEnable(uint32_t ui32Base, uint32_t ui32Gen,
                         uint32_t ui32IntTrig) {
  ;
  ;

  ;
  (*((volatile unsigned long *)(((ui32Base) + (ui32Gen)) + 0x00000004))) |=
      ui32IntTrig;
}


x86 assembly (clang, -O0):
<PWMGenIntTrigEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
add    %rcx,%rax
mov    0x4(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntTrigEnable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    %rdx,-0x18(%rsp)
mov    -0x18(%rsp),%rax
mov    -0x8(%rsp),%rcx
mov    -0x10(%rsp),%rdx
or     %rax,0x4(%rcx,%rdx,1)
ret

LLVM IR (-O0):
define void @PWMGenIntTrigEnable(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
store volatile i64 %2, i64* %6
%7 = load volatile i64, i64* %6
%8 = load volatile i64, i64* %4
%9 = load volatile i64, i64* %5
%10 = add i64 %8, %9
%11 = add i64 %10, 4
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = or i64 %13, %7
store volatile i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @PWMGenIntTrigEnable(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
store volatile i64 %2, i64* %6
%7 = load volatile i64, i64* %6
%8 = load volatile i64, i64* %4
%9 = load volatile i64, i64* %5
%10 = add i64 %8, 4
%11 = add i64 %10, %9
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = or i64 %13, %7
store volatile i64 %14, i64* %12
ret void
}
void initialize_vec(double *a, int n) {
  register int i;
  for (i = 0; i < n; i++)
    a[i] = 0.0;
}


x86 assembly (clang, -O0):
<initialize_vec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <initialize_vec+0x3c>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <initialize_vec+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_vec>:
test   %esi,%esi
jle    1126 <initialize_vec+0x16>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @initialize_vec(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load double*, double** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double, double* %11, i64 %13
store double 0.000000e+00, double* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @initialize_vec(double* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast double* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 3
br label %8
8: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ printf(char *, void *);
void my_free(void *p) {
  printf(">>> free 0x%8.8X\n", p);
  free(p);
}


x86 assembly (clang, -O0):
<my_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_free>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [18 x i8] c">>> free 0x%8.8X\0A\00"
define void @my_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c">>> free 0x%8.8X\0A\00"
define void @my_free(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @free(i8* %0)
ret void
}
unsigned xrop3_207_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~T;
  stk1 = S | stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_207_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_207_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %ecx
or     %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_207_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = xor i32 %22, -1
store i32 %23, i32* %9
%24 = load i32, i32* %6
%25 = load i32, i32* %9
%26 = or i32 %24, %25
store i32 %26, i32* %8
%27 = load i32, i32* %8
%28 = load i32, i32* %6
%29 = and i32 %27, %28
%30 = load i32, i32* %8
%31 = load i32, i32* %7
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = or i32 %29, %33
%35 = load i32, i32* %7
%36 = load i32, i32* %6
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %5
%40 = and i32 %38, %39
%41 = or i32 %34, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_207_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, -1
%8 = or i32 %4, %5
%9 = or i32 %8, %7
ret i32 %9
}
int mdrv_dload_get_softload(void) { return 0; }


x86 assembly (clang, -O0):
<mdrv_dload_get_softload>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdrv_dload_get_softload>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mdrv_dload_get_softload() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mdrv_dload_get_softload() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_free__(void *);
int /*<<< orphan*/ __coverity_mark_as_afm_freed__(void *, char *);
void H5Sclose(void *id) {
  __coverity_free__(id);
  __coverity_mark_as_afm_freed__(id, "H5Sclose");
}


x86 assembly (clang, -O0):
<H5Sclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__coverity_free__@plt>
mov    -0x8(%rbp),%rdi
lea    0xec0(%rip),%rsi
call   1030 <__coverity_mark_as_afm_freed__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H5Sclose>:
push   %rbx
mov    %rdi,%rbx
call   1040 <__coverity_free__@plt>
lea    0xed0(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <__coverity_mark_as_afm_freed__@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"H5Sclose\00"
define void @H5Sclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__coverity_free__(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @__coverity_mark_as_afm_freed__(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"H5Sclose\00"
define void @H5Sclose(i8* %0) {
%2 = tail call i32 @__coverity_free__(i8* %0)
%3 = tail call i32 @__coverity_mark_as_afm_freed__(i8* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cleanup_exit();
void sigterm_handler(int s) { cleanup_exit(); }


x86 assembly (clang, -O0):
<sigterm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <cleanup_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigterm_handler>:
xor    %eax,%eax
jmp    1030 <cleanup_exit@plt>

LLVM IR (-O0):
define void @sigterm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @cleanup_exit()
ret void
}

LLVM IR (-O2):
define void @sigterm_handler(i32 %0) {
%2 = tail call i32 (...) @cleanup_exit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void f(long i) {
  if ((signed char)i < 0 || (signed char)i == 0)
    abort();
  else
    exit(0);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl %al,%eax
cmp    $0x0,%eax
jl     114c <f+0x2c>
mov    -0x8(%rbp),%rax
movsbl %al,%eax
cmp    $0x0,%eax
jne    1153 <f+0x33>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<f>:
push   %rax
shl    $0x18,%edi
test   %edi,%edi
jg     112f <f+0xf>
xor    %eax,%eax
call   1030 <abort@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @f(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i8
%5 = sext i8 %4 to i32
%6 = icmp slt i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = load i64, i64* %2
%9 = trunc i64 %8 to i8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %7, %1
%13 = call i32 (...) @abort()
unreachable
14: ; preds = %7
%15 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @f(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = shl i32 %2, 24
%4 = icmp slt i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = tail call i32 @exit(i32 0)
unreachable
}