xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _EEPROMSectorMaskClear();
void EEPROMIntClear(uint32_t ui32IntFlags) {
  (*((volatile uint32_t *)(0x400FD014))) = 0x00000004;
  if ((((*((volatile uint32_t *)(0x400FE000))) & (0x70000000 | 0x00FF0000)) ==
       (0x10000000 | 0x00050000)) &&
      (((*((volatile uint32_t *)(0x400FE000))) & (0x0000FF00 | 0x000000FF)) ==
       (0x00000000 | 0x00000000))) {
    _EEPROMSectorMaskClear();
  }
}


x86 assembly (clang, -O0):
<EEPROMIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x400fd014,%eax
movl   $0x4,(%rax)
mov    $0x400fe000,%eax
mov    (%rax),%eax
and    $0x70ff0000,%eax
cmp    $0x10050000,%eax
jne    1159 <EEPROMIntClear+0x49>
mov    $0x400fe000,%eax
mov    (%rax),%eax
and    $0xffff,%eax
cmp    $0x0,%eax
jne    1159 <EEPROMIntClear+0x49>
mov    $0x0,%al
call   1030 <_EEPROMSectorMaskClear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMIntClear>:
movl   $0x4,0x400fd014
mov    $0x70ff0000,%eax
and    0x400fe000,%eax
cmp    $0x10050000,%eax
jne    113a <EEPROMIntClear+0x2a>
mov    0x400fe000,%eax
test   %ax,%ax
je     113b <EEPROMIntClear+0x2b>
ret
xor    %eax,%eax
jmp    1030 <_EEPROMSectorMaskClear@plt>

LLVM IR (-O0):
define void @EEPROMIntClear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i32 4, i32* inttoptr (i64 1074778132 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1074782208 to i32*)
%4 = and i32 %3, 1895759872
%5 = icmp eq i32 %4, 268763136
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load volatile i32, i32* inttoptr (i64 1074782208 to i32*)
%8 = and i32 %7, 65535
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = call i32 (...) @_EEPROMSectorMaskClear()
br label %12
12: ; preds = %10, %6, %1
ret void
}

LLVM IR (-O2):
define void @EEPROMIntClear(i32 %0) {
store volatile i32 4, i32* inttoptr (i64 1074778132 to i32*)
%2 = load volatile i32, i32* inttoptr (i64 1074782208 to i32*)
%3 = and i32 %2, 1895759872
%4 = icmp eq i32 %3, 268763136
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 1074782208 to i32*)
%7 = and i32 %6, 65535
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 (...) @_EEPROMSectorMaskClear()
br label %11
11: ; preds = %9, %5, %1
ret void
}
void mapred_fini_task(struct mapred_task *task __attribute__((unused))) {}


x86 assembly (clang, -O0):
<mapred_fini_task>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapred_fini_task>:
ret

LLVM IR (-O0):
%struct.mapred_task = type opaque
define void @mapred_fini_task(%struct.mapred_task* %0) {
%2 = alloca %struct.mapred_task*
store %struct.mapred_task* %0, %struct.mapred_task** %2
ret void
}

LLVM IR (-O2):
%struct.mapred_task = type opaque
define void @mapred_fini_task(%struct.mapred_task* nocapture %0) {
ret void
}
int main(void) {
  unsigned char x;
  double y = 300;
  x = y;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movabs $0x4072c00000000000,%rax
c0 72 40
mov    %rax,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%eax
mov    %al,-0x5(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca double
store i32 0, i32* %1
store double 3.000000e+02, double* %3
%4 = load double, double* %3
%5 = fptoui double %4 to i8
store i8 %5, i8* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int gf4_mul_2_u64(int);
uint64_t gf4_mul_u64(uint64_t a, unsigned char b) {
  uint64_t r = a * ((uint64_t)(b & 1));
  return r ^ (gf4_mul_2_u64(a) * ((uint64_t)(b >> 1)));
}


x86 assembly (clang, -O0):
<gf4_mul_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
movzbl -0x5(%rbp),%ecx
and    $0x1,%ecx
imul   %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <gf4_mul_2_u64@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
movzbl -0x5(%rbp),%edx
sar    $0x1,%edx
imul   %edx,%ecx
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf4_mul_u64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %esi,%ebp
and    $0x1,%ebp
imul   %edi,%ebp
call   1030 <gf4_mul_2_u64@plt>
shr    %ebx
imul   %ebx,%eax
xor    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @gf4_mul_u64(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i32, i32* %3
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = and i32 %8, 1
%10 = mul nsw i32 %6, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = load i32, i32* %3
%13 = call i32 @gf4_mul_2_u64(i32 %12)
%14 = load i8, i8* %4
%15 = zext i8 %14 to i32
%16 = ashr i32 %15, 1
%17 = mul nsw i32 %13, %16
%18 = xor i32 %11, %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @gf4_mul_u64(i32 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = and i32 %3, 1
%5 = mul nuw nsw i32 %4, %0
%6 = tail call i32 @gf4_mul_2_u64(i32 %0)
%7 = lshr i32 %3, 1
%8 = mul nsw i32 %6, %7
%9 = xor i32 %8, %5
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ set_hl(int);
void opcb_e6() { set_hl(4); }


x86 assembly (clang, -O0):
<opcb_e6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <set_hl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcb_e6>:
mov    $0x4,%edi
jmp    1030 <set_hl@plt>

LLVM IR (-O0):
define void @opcb_e6() {
%1 = call i32 @set_hl(i32 4)
ret void
}

LLVM IR (-O2):
define void @opcb_e6() {
%1 = tail call i32 @set_hl(i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CNRFBCanSendData(int);
int /*<<< orphan*/ CNRFBSend1(int /*<<< orphan*/);
int /*<<< orphan*/ CNRFBSend2(int);
int /*<<< orphan*/ CNRFBStartSend(int);
int StartFrameDraw(int conn, int nrdr) {
  if (!CNRFBCanSendData(conn))
    return -1;
  CNRFBStartSend(conn);
  CNRFBSend1(0);
  CNRFBSend1(0);
  CNRFBSend2(nrdr);
  return 0;
}


x86 assembly (clang, -O0):
<StartFrameDraw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <CNRFBCanSendData@plt>
cmp    $0x0,%eax
jne    116b <StartFrameDraw+0x2b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1190 <StartFrameDraw+0x50>
mov    -0x8(%rbp),%edi
call   1030 <CNRFBStartSend@plt>
xor    %edi,%edi
call   1060 <CNRFBSend1@plt>
xor    %edi,%edi
call   1060 <CNRFBSend1@plt>
mov    -0xc(%rbp),%edi
call   1050 <CNRFBSend2@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StartFrameDraw>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1040 <CNRFBCanSendData@plt>
test   %eax,%eax
je     1170 <StartFrameDraw+0x30>
mov    %ebp,%edi
call   1030 <CNRFBStartSend@plt>
xor    %ebp,%ebp
xor    %edi,%edi
call   1060 <CNRFBSend1@plt>
xor    %edi,%edi
call   1060 <CNRFBSend1@plt>
mov    %ebx,%edi
call   1050 <CNRFBSend2@plt>
jmp    1175 <StartFrameDraw+0x35>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @StartFrameDraw(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = call i32 @CNRFBCanSendData(i32 %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %2
store i32 -1, i32* %3
br label %17
10: ; preds = %2
%11 = load i32, i32* %4
%12 = call i32 @CNRFBStartSend(i32 %11)
%13 = call i32 @CNRFBSend1(i32 0)
%14 = call i32 @CNRFBSend1(i32 0)
%15 = load i32, i32* %5
%16 = call i32 @CNRFBSend2(i32 %15)
store i32 0, i32* %3
br label %17
17: ; preds = %10, %9
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @StartFrameDraw(i32 %0, i32 %1) {
%3 = tail call i32 @CNRFBCanSendData(i32 %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i32 @CNRFBStartSend(i32 %0)
%7 = tail call i32 @CNRFBSend1(i32 0)
%8 = tail call i32 @CNRFBSend1(i32 0)
%9 = tail call i32 @CNRFBSend2(i32 %1)
br label %10
10: ; preds = %2, %5
%11 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char mensaje[] = "Hola a todos";
  printf("%s\n", mensaje);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x11(%rbp)
mov    0xed8(%rip),%eax
mov    %eax,-0x9(%rbp)
mov    0xed3(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0x11(%rbp),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0x736f646f742061,%rax
mov    %rax,0xd(%rsp)
movabs $0x74206120616c6f48,%rax
61 20 74
mov    %rax,0x8(%rsp)
lea    0xed4(%rip),%rdi
lea    0x8(%rsp),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.mensaje = [13 x i8] c"Hola a todos\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [13 x i8]
store i32 0, i32* %1
%3 = bitcast [13 x i8]* %2 to i8*
%4 = getelementptr inbounds [13 x i8], [13 x i8]* %2, i64 0, i64 0
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@__const.main.mensaje = [13 x i8] c"Hola a todos\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [13 x i8]
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int strlength(char *);
void str_reverse(char *str) {
  char *other = str + strlength(str);
  while (*str) {
    *str = *other;
    str++;
    other--;
  }
}


x86 assembly (clang, -O0):
<str_reverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlength@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1173 <str_reverse+0x63>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    113d <str_reverse+0x2d>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_reverse>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlength@plt>
cmpb   $0x0,(%rbx)
je     1143 <str_reverse+0x33>
cltq
add    %rbx,%rax
add    $0x1,%rbx
nopw   0x0(%rax,%rax,1)
movzbl (%rax),%ecx
mov    %cl,-0x1(%rbx)
add    $0xffffffffffffffff,%rax
cmpb   $0x0,(%rbx)
lea    0x1(%rbx),%rbx
jne    1130 <str_reverse+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define void @str_reverse(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlength(i8* %5)
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
store i8* %8, i8** %3
br label %9
9: ; preds = %13, %1
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = load i8*, i8** %2
store i8 %15, i8* %16
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 -1
store i8* %20, i8** %3
br label %9
21: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @str_reverse(i8* %0) {
%2 = tail call i32 @strlength(i8* %0)
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %1
%6 = sext i32 %2 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
br label %8
8: ; preds = %5, %8
%9 = phi i8* [ %13, %8 ], [ %7, %5 ]
%10 = phi i8* [ %12, %8 ], [ %0, %5 ]
%11 = load i8, i8* %9
store i8 %11, i8* %10
%12 = getelementptr inbounds i8, i8* %10, i64 1
%13 = getelementptr inbounds i8, i8* %9, i64 -1
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %8
16: ; preds = %8, %1
ret void
}
/* Variables and functions */
float __ocml_tan_f32(float);
float tanf(float x) { return __ocml_tan_f32(x); }


x86 assembly (clang, -O0):
<tanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__ocml_tan_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanf>:
jmp    1030 <__ocml_tan_f32@plt>

LLVM IR (-O0):
define float @tanf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__ocml_tan_f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @tanf(float %0) {
%2 = tail call float @__ocml_tan_f32(float %0)
ret float %2
}
int davinci_mux_init(void) { return 0; }


x86 assembly (clang, -O0):
<davinci_mux_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<davinci_mux_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @davinci_mux_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @davinci_mux_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strftime_test();
int /*<<< orphan*/ strptime_test();
int main(int argc, char *argv[]) {
  strftime_test();
  strptime_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <strftime_test@plt>
mov    $0x0,%al
call   1030 <strptime_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <strftime_test@plt>
xor    %eax,%eax
call   1030 <strptime_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @strftime_test()
%7 = call i32 (...) @strptime_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @strftime_test()
%4 = tail call i32 (...) @strptime_test()
ret i32 0
}
void gal_fun_test_f1(int *p, int n) {
  int i;
  for (i = 0; i < n; ++i) {
    *p++ = 0;
  }
}


x86 assembly (clang, -O0):
<gal_fun_test_f1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1141 <gal_fun_test_f1+0x41>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x8(%rbp)
movl   $0x0,(%rax)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <gal_fun_test_f1+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gal_fun_test_f1>:
test   %esi,%esi
jle    1126 <gal_fun_test_f1+0x16>
push   %rax
mov    %esi,%edx
shl    $0x2,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @gal_fun_test_f1(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i32 1
store i32* %12, i32** %3
store i32 0, i32* %11
br label %13
13: ; preds = %10
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @gal_fun_test_f1(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast i32* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 2
br label %8
8: ; preds = %4, %2
ret void
}
int bug1021_test_2(int x, char *y, void *z) { return y[0]; }


x86 assembly (clang, -O0):
<bug1021_test_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bug1021_test_2>:
movsbl (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @bug1021_test_2(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @bug1021_test_2(i32 %0, i8* nocapture %1, i8* nocapture readnone %2) {
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
ret i32 %5
}
int fun376() { return 376; }


x86 assembly (clang, -O0):
<fun376>:
push   %rbp
mov    %rsp,%rbp
mov    $0x178,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun376>:
mov    $0x178,%eax
ret

LLVM IR (-O0):
define i32 @fun376() {
ret i32 376
}

LLVM IR (-O2):
define i32 @fun376() {
ret i32 376
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage(int i) {
  printf("Usage:  gem5ToMcPAT [OPTIONS]\n"
         "Launch parser gem5ToMcPAT\n"
         "Options:\n"
         "  -x <file>, --xmltemplate=<file>: XML template\n"
         "  -c <file>, --config=<file>: config.ini file (not JSON!)\n"
         "  -s <file>, --stats=<file>: statistics file\n"
         "  -o <file>, --output=<output>: XML output\n"
         "  -h, --help: displays this message\n\n");
  exit(i);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [297 x i8] c"Usage: gem5ToMcPAT [OPTIONS]\0ALaunch parser gem5ToMcPAT\0AOptions:\0A -x <file>, --xmltemplate=<file>: XML template\0A -c <file>, --config=<file>: config.ini file (not JSON!)\0A -s <file>, --stats=<file>: statistics file\0A -o <file>, --output=<output>: XML output\0A -h, --help: displays this message\0A\0A\00"
define void @usage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([297 x i8], [297 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
@str = [296 x i8] c"Usage: gem5ToMcPAT [OPTIONS]\0ALaunch parser gem5ToMcPAT\0AOptions:\0A -x <file>, --xmltemplate=<file>: XML template\0A -c <file>, --config=<file>: config.ini file (not JSON!)\0A -s <file>, --stats=<file>: statistics file\0A -o <file>, --output=<output>: XML output\0A -h, --help: displays this message\0A\00"
define void @usage(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([296 x i8], [296 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 %0)
unreachable
}
void HI_RegSetBit(unsigned long value, unsigned long offset,
                  unsigned long addr) {
  unsigned long t, mask;
  mask = 1 << offset;
  t = readl((const volatile void *)addr);
  t &= ~mask;
  t |= (value << offset) & mask;
  writel(t, (volatile void *)addr);
}


x86 assembly (clang, -O0):
<HI_RegSetBit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <readl@plt>
cltq
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    %cl,%rax
and    -0x28(%rbp),%rax
or     -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x0,%al
call   1040 <writel@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HI_RegSetBit>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
mov    $0x1,%eax
mov    %r15d,%ecx
shl    %cl,%eax
movslq %eax,%r12
mov    %rdx,%rdi
xor    %eax,%eax
call   1030 <readl@plt>
cltq
mov    %r15d,%ecx
shl    %cl,%rbx
xor    %rax,%rbx
and    %r12,%rbx
xor    %rax,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <writel@plt>

LLVM IR (-O0):
define void @HI_RegSetBit(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = load i64, i64* %5
%10 = trunc i64 %9 to i32
%11 = shl i32 1, %10
%12 = sext i32 %11 to i64
store i64 %12, i64* %8
%13 = load i64, i64* %6
%14 = inttoptr i64 %13 to i8*
%15 = call i32 (i8*, ...) bitcast (i32 (...)* @readl to i32 (i8*, ...)*)(i8* %14)
%16 = sext i32 %15 to i64
store i64 %16, i64* %7
%17 = load i64, i64* %8
%18 = xor i64 %17, -1
%19 = load i64, i64* %7
%20 = and i64 %19, %18
store i64 %20, i64* %7
%21 = load i64, i64* %4
%22 = load i64, i64* %5
%23 = shl i64 %21, %22
%24 = load i64, i64* %8
%25 = and i64 %23, %24
%26 = load i64, i64* %7
%27 = or i64 %26, %25
store i64 %27, i64* %7
%28 = load i64, i64* %7
%29 = load i64, i64* %6
%30 = inttoptr i64 %29 to i8*
%31 = call i32 (i64, i8*, ...) bitcast (i32 (...)* @writel to i32 (i64, i8*, ...)*)(i64 %28, i8* %30)
ret void
}

LLVM IR (-O2):
define void @HI_RegSetBit(i64 %0, i64 %1, i64 %2) {
%4 = trunc i64 %1 to i32
%5 = shl nuw i32 1, %4
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %2 to i8*
%8 = tail call i32 (i8*, ...) bitcast (i32 (...)* @readl to i32 (i8*, ...)*)(i8* %7)
%9 = sext i32 %8 to i64
%10 = xor i64 %6, -1
%11 = and i64 %9, %10
%12 = shl i64 %0, %1
%13 = and i64 %12, %6
%14 = or i64 %11, %13
%15 = tail call i32 (i64, i8*, ...) bitcast (i32 (...)* @writel to i32 (i64, i8*, ...)*)(i64 %14, i8* %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RB_HALT_SYSTEM;
int errno;
scalar_t__ reboot(int /*<<< orphan*/);
int main(void) {
  if (reboot(RB_HALT_SYSTEM))
    return 0;
  else
    return -errno;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
call   1030 <reboot@plt>
cmp    $0x0,%rax
je     1143 <main+0x33>
movl   $0x0,-0x4(%rbp)
jmp    1151 <main+0x41>
xor    %eax,%eax
mov    0x2e94(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1030 <reboot@plt>
mov    0x2eba(%rip),%rdx
xor    %ecx,%ecx
sub    (%rdx),%ecx
xor    %edx,%edx
test   %rax,%rax
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@RB_HALT_SYSTEM = global i32 0
@errno = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @RB_HALT_SYSTEM
%3 = call i64 @reboot(i32 %2)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 0, i32* %1
br label %9
6: ; preds = %0
%7 = load i32, i32* @errno
%8 = sub nsw i32 0, %7
store i32 %8, i32* %1
br label %9
9: ; preds = %6, %5
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@RB_HALT_SYSTEM = global i32 0
@errno = global i32 0
define i32 @main() {
%1 = load i32, i32* @RB_HALT_SYSTEM
%2 = tail call i64 @reboot(i32 %1)
%3 = icmp eq i64 %2, 0
%4 = load i32, i32* @errno
%5 = sub nsw i32 0, %4
%6 = select i1 %3, i32 %5, i32 0
ret i32 %6
}
__attribute__((no, noclone)) int f12(void *a, int b, long long c, long long d,
                                     long long e, float f, float *g, int *h,
                                     int *i) {
  asm volatile("" : : "r"(a), "r"(b), "r"(c), "r"(d) : "memory");
  asm volatile("" : : "r"(e), "r"(f), "r"(g), "r"(h) : "memory");
  asm volatile("" : : "r"(i) : "memory");
  return 0;
}


x86 assembly (clang, -O0):
<f12>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
movss  %xmm0,-0x2c(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rax
movss  -0x2c(%rbp),%xmm0
mov    -0x38(%rbp),%rdx
mov    0x10(%rbp),%rsi
movd   %xmm0,%ecx
mov    0x18(%rbp),%rax
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f12>:
mov    0x10(%rsp),%r10
mov    0x8(%rsp),%rax
movd   %xmm0,%ecx
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f12(i8* %0, i32 %1, i64 %2, i64 %3, i64 %4, float %5, float* %6, i32* %7, i32* %8) {
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
%15 = alloca float
%16 = alloca float*
%17 = alloca i32*
%18 = alloca i32*
store i8* %0, i8** %10
store i32 %1, i32* %11
store i64 %2, i64* %12
store i64 %3, i64* %13
store i64 %4, i64* %14
store float %5, float* %15
store float* %6, float** %16
store i32* %7, i32** %17
store i32* %8, i32** %18
%19 = load i8*, i8** %10
%20 = load i32, i32* %11
%21 = load i64, i64* %12
%22 = load i64, i64* %13
%23 = load i64, i64* %14
%24 = load float, float* %15
%25 = load float*, float** %16
%26 = load i32*, i32** %17
%27 = load i32*, i32** %18
ret i32 0
}

LLVM IR (-O2):
define i32 @f12(i8* %0, i32 %1, i64 %2, i64 %3, i64 %4, float %5, float* %6, i32* %7, i32* %8) {
tail call void asm sideeffect "", "r,r,r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0, i32 %1, i64 %2, i64 %3)
tail call void asm sideeffect "", "r,r,r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4, float %5, float* %6, i32* %7)
tail call void asm sideeffect "", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %8)
ret i32 0
}
void CFGMR3QueryIntegerDef(void) {}


x86 assembly (clang, -O0):
<CFGMR3QueryIntegerDef>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3QueryIntegerDef>:
ret

LLVM IR (-O0):
define void @CFGMR3QueryIntegerDef() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3QueryIntegerDef() {
ret void
}
unsigned xrop3_250_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D | T;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_250_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_250_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%edx
shl    $0x8,%edx
lea    (%rdx,%rsi,1),%eax
or     %ecx,%eax
or     $0xff,%edx
not    %eax
and    %edx,%eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_250_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %7
%23 = or i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = load i32, i32* %6
%26 = xor i32 %25, -1
%27 = and i32 %24, %26
%28 = load i32, i32* %7
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = load i32, i32* %5
%32 = load i32, i32* %6
%33 = and i32 %31, %32
%34 = or i32 %30, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %7
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_250_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %6, %5
%8 = or i32 %6, 255
%9 = or i32 %7, %4
%10 = xor i32 %9, -1
%11 = and i32 %8, %10
%12 = or i8 %1, %0
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ read(int, char *, int);
int fgetc(FILE *stream) {
  char c;
  read(((int)stream), &c, 1);
  return c;
}


x86 assembly (clang, -O0):
<fgetc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
lea    -0x9(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
movsbl -0x9(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetc>:
push   %rax
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
movsbl 0x7(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fgetc(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = ptrtoint i32* %4 to i32
%6 = call i32 @read(i32 %5, i8* %3, i32 1)
%7 = load i8, i8* %3
%8 = sext i8 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @fgetc(i32* %0) {
%2 = alloca i8
%3 = ptrtoint i32* %0 to i64
%4 = trunc i64 %3 to i32
%5 = call i32 @read(i32 %4, i8* %2, i32 1)
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
ret i32 %7
}
int add3(int a, int b, int c) { return a + b + c; }


x86 assembly (clang, -O0):
<add3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add3>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @add3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @add3(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
ret i32 %5
}
void __cause_ex1(ex, file, lineno) char *ex;
char *file;
int lineno;
{ __cause_exception(ex, file, lineno, 0); }


x86 assembly (clang, -O0):
<__cause_ex1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
mov    $0x0,%al
call   1030 <__cause_exception@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cause_ex1>:
xor    %ecx,%ecx
xor    %eax,%eax
jmp    1030 <__cause_exception@plt>

LLVM IR (-O0):
define void @__cause_ex1(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 (i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @__cause_exception to i32 (i8*, i8*, i32, i32, ...)*)(i8* %7, i8* %8, i32 %9, i32 0)
ret void
}

LLVM IR (-O2):
define void @__cause_ex1(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 (i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @__cause_exception to i32 (i8*, i8*, i32, i32, ...)*)(i8* %0, i8* %1, i32 %2, i32 0)
ret void
}
int getByte(int x, int n) { return x >> (n << 3) & 0xFF; }


x86 assembly (clang, -O0):
<getByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x3,%ecx
sar    %cl,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getByte>:
lea    0x0(,%rsi,8),%ecx
sar    %cl,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @getByte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 3
%8 = ashr i32 %5, %7
%9 = and i32 %8, 255
ret i32 %9
}

LLVM IR (-O2):
define i32 @getByte(i32 %0, i32 %1) {
%3 = shl i32 %1, 3
%4 = ashr i32 %0, %3
%5 = and i32 %4, 255
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef char uint8_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           unsigned int, unsigned int);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
int default_error_sink(void *handle, const uint8_t *filename, unsigned line,
                       unsigned col, const char *fmt, va_list args) {
  fprintf(stderr, "error: %s:%u:%u: ", filename, line, col);
  vfprintf(stderr, fmt, args);
  return 0;
}


x86 assembly (clang, -O0):
<default_error_sink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
lea    0xea7(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1040 <vfprintf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_error_sink>:
push   %rbp
push   %r14
push   %rbx
mov    %r9d,%ebp
mov    %r8,%rbx
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    0x2ea7(%rip),%r14
mov    (%r14),%edi
lea    0xebd(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1040 <vfprintf@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"error: %s:%u:%u: \00"
define i32 @default_error_sink(i8* %0, i8* %1, i32 %2, i32 %3, i8* %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i32
store i8* %0, i8** %7
store i8* %1, i8** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i32 %5, i32* %12
%13 = load i32, i32* @stderr
%14 = load i8*, i8** %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %14, i32 %15, i32 %16)
%18 = load i32, i32* @stderr
%19 = load i8*, i8** %11
%20 = load i32, i32* %12
%21 = call i32 @vfprintf(i32 %18, i8* %19, i32 %20)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"error: %s:%u:%u: \00"
define i32 @default_error_sink(i8* nocapture readnone %0, i8* %1, i32 %2, i32 %3, i8* %4, i32 %5) {
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2, i32 %3)
%9 = load i32, i32* @stderr
%10 = tail call i32 @vfprintf(i32 %9, i8* %4, i32 %5)
ret i32 0
}
void foo562() {}


x86 assembly (clang, -O0):
<foo562>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo562>:
ret

LLVM IR (-O0):
define void @foo562() {
ret void
}

LLVM IR (-O2):
define void @foo562() {
ret void
}
void RTAvlrGCPtrDoWithAll(void) {}


x86 assembly (clang, -O0):
<RTAvlrGCPtrDoWithAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlrGCPtrDoWithAll>:
ret

LLVM IR (-O0):
define void @RTAvlrGCPtrDoWithAll() {
ret void
}

LLVM IR (-O2):
define void @RTAvlrGCPtrDoWithAll() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ pclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *popen(char *, char *);
int /*<<< orphan*/ printf(char *);
int initDataFolder() {
  FILE *fp;
  fp = popen("mkdir -p data/", "r");
  if (fp == NULL) {
    printf("[Error] - Error initialing process folder\n");
    exit(1);
  }
  pclose(fp);
  return 0;
}


x86 assembly (clang, -O0):
<initDataFolder>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
lea    0xeb9(%rip),%rsi
call   1050 <popen@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1180 <initDataFolder+0x40>
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1060 <exit@plt>
mov    -0x8(%rbp),%rdi
call   1040 <pclose@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initDataFolder>:
push   %rax
lea    0xeb8(%rip),%rdi
lea    0xee8(%rip),%rsi
call   1050 <popen@plt>
test   %rax,%rax
je     1165 <initDataFolder+0x25>
mov    %rax,%rdi
call   1040 <pclose@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xea3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"mkdir -p data/\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [43 x i8] c"[Error] - Error initialing process folder\0A\00"
define i32 @initDataFolder() {
%1 = alloca i32*
%2 = call i32* @popen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.2, i64 0, i64 0))
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = call i32 @pclose(i32* %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"mkdir -p data/\00"
@.str.1 = [2 x i8] c"r\00"
@str = [42 x i8] c"[Error] - Error initialing process folder\00"
define i32 @initDataFolder() {
%1 = tail call i32* @popen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %0
%7 = tail call i32 @pclose(i32* %1)
ret i32 0
}
__attribute__((no, noclone)) void clobber_sp(void) {
  __asm volatile("" : : : "sp");
}


x86 assembly (clang, -O0):
<clobber_sp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clobber_sp>:
ret

LLVM IR (-O0):
define void @clobber_sp() {
ret void
}

LLVM IR (-O2):
define void @clobber_sp() {
tail call void asm sideeffect "", "~{sp},~{dirflag},~{fpsr},~{flags}"()
ret void
}
int cmp(unsigned long long x, unsigned y) { return !!(x - y); }


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    %rcx,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    %esi,%ecx
xor    %eax,%eax
cmp    %rdi,%rcx
setne  %al
ret

LLVM IR (-O0):
define i32 @cmp(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = sub i64 %5, %7
%9 = icmp ne i64 %8, 0
%10 = xor i1 %9, true
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @cmp(i64 %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = icmp ne i64 %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint16_t;
struct pcg_state_32 {
  int dummy;
};

/* Variables and functions */
int pcg_unique_32_xsh_rr_16_random_r(struct pcg_state_32 *);
uint16_t pcg_unique_32_xsh_rr_16_boundedrand_r(struct pcg_state_32 *rng,
                                               uint16_t bound) {
  uint16_t threshold = ((uint16_t)(-bound)) % bound;
  for (;;) {
    uint16_t r = pcg_unique_32_xsh_rr_16_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_unique_32_xsh_rr_16_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_unique_32_xsh_rr_16_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_unique_32_xsh_rr_16_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_unique_32_xsh_rr_16_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_unique_32_xsh_rr_16_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_unique_32_xsh_rr_16_random_r@plt>
test   %eax,%eax
js     1120 <pcg_unique_32_xsh_rr_16_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_32 = type { i32 }
define i32 @pcg_unique_32_xsh_rr_16_boundedrand_r(%struct.pcg_state_32* %0, i32 %1) {
%3 = alloca %struct.pcg_state_32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_32* %0, %struct.pcg_state_32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_32*, %struct.pcg_state_32** %3
%13 = call i32 @pcg_unique_32_xsh_rr_16_random_r(%struct.pcg_state_32* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_32 = type { i32 }
define i32 @pcg_unique_32_xsh_rr_16_boundedrand_r(%struct.pcg_state_32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_unique_32_xsh_rr_16_random_r(%struct.pcg_state_32* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ REG_UART_BASE(scalar_t__);
__attribute__((always_)) __attribute__((flatten)) uint32_t
UART_DATE(uint32_t i) {
  return (REG_UART_BASE(i) + 0x78);
}


x86 assembly (clang, -O0):
<UART_DATE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <REG_UART_BASE@plt>
add    $0x78,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_DATE>:
push   %rax
call   1030 <REG_UART_BASE@plt>
add    $0x78,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @UART_DATE(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @REG_UART_BASE(i64 %3)
%5 = add nsw i64 %4, 120
ret i64 %5
}

LLVM IR (-O2):
define i64 @UART_DATE(i64 %0) {
%2 = tail call i64 @REG_UART_BASE(i64 %0)
%3 = add nsw i64 %2, 120
ret i64 %3
}
/* Type definitions */
struct b_tonegen {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ setMIDIDrawBar(struct b_tonegen *, int, unsigned char);
void setDrawbar14(void *d, unsigned char v) {
  setMIDIDrawBar((struct b_tonegen *)d, 14, v);
}


x86 assembly (clang, -O0):
<setDrawbar14>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xe,%esi
movzbl -0x9(%rbp),%edx
call   1030 <setMIDIDrawBar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDrawbar14>:
mov    %esi,%edx
mov    $0xe,%esi
jmp    1030 <setMIDIDrawBar@plt>

LLVM IR (-O0):
%struct.b_tonegen = type { i32 }
define void @setDrawbar14(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.b_tonegen*
%7 = load i8, i8* %4
%8 = call i32 @setMIDIDrawBar(%struct.b_tonegen* %6, i32 14, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
%struct.b_tonegen = type { i32 }
define void @setDrawbar14(i8* %0, i8 zeroext %1) {
%3 = bitcast i8* %0 to %struct.b_tonegen*
%4 = tail call i32 @setMIDIDrawBar(%struct.b_tonegen* %3, i32 14, i8 zeroext %1)
ret void
}
void handle_exit(int code) {
  graphics_exit();
  asm("jmp c4504_ui\n");
}


x86 assembly (clang, -O0):
<handle_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <graphics_exit@plt>
jmp    1030 <c4504_ui@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_exit>:
push   %rax
xor    %eax,%eax
call   1040 <graphics_exit@plt>
jmp    1030 <c4504_ui@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @handle_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @graphics_exit()
ret void
}

LLVM IR (-O2):
define void @handle_exit(i32 %0) {
%2 = tail call i32 (...) @graphics_exit()
tail call void asm sideeffect "jmp c4504_ui\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) { printf("hello\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"hello\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [6 x i8] c"hello\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
struct stfl_form {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ const *checkret(int /*<<< orphan*/);
const wchar_t *stfl_lookup(struct stfl_form *f, const wchar_t *path,
                           const wchar_t *newname) {
  return checkret(0);
}


x86 assembly (clang, -O0):
<stfl_lookup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %edi,%edi
call   1030 <checkret@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stfl_lookup>:
xor    %edi,%edi
jmp    1030 <checkret@plt>

LLVM IR (-O0):
%struct.stfl_form = type { i32 }
define i32* @stfl_lookup(%struct.stfl_form* %0, i32* %1, i32* %2) {
%4 = alloca %struct.stfl_form*
%5 = alloca i32*
%6 = alloca i32*
store %struct.stfl_form* %0, %struct.stfl_form** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = call i32* @checkret(i32 0)
ret i32* %7
}

LLVM IR (-O2):
%struct.stfl_form = type { i32 }
define i32* @stfl_lookup(%struct.stfl_form* nocapture readnone %0, i32* nocapture readnone %1, i32* nocapture readnone %2) {
%4 = tail call i32* @checkret(i32 0)
ret i32* %4
}
void arg_idx(char *p, int i) { __builtin_prefetch(&p[i], 0, 0); }


x86 assembly (clang, -O0):
<arg_idx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
prefetchnta (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arg_idx>:
movslq %esi,%rax
prefetchnta (%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @arg_idx(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
ret void
}

LLVM IR (-O2):
define void @arg_idx(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
tail call void @llvm.prefetch.p0i8(i8* %4, i32 0, i32 0, i32 1)
ret void
}