xunge/DecIR huggingface dataset:
void process_root(real, im) double real, im;
{ plintf("Root: %g + I %g \n", real, im); }


x86 assembly (clang, -O0):
<process_root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    0xecd(%rip),%rdi
mov    $0x2,%al
call   1030 <plintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_root>:
lea    0xee9(%rip),%rdi
mov    $0x2,%al
jmp    1030 <plintf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Root: %g + I %g \0A\00"
define void @process_root(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 (i8*, double, double, ...) bitcast (i32 (...)* @plintf to i32 (i8*, double, double, ...)*)(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), double %5, double %6)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Root: %g + I %g \0A\00"
define void @process_root(double %0, double %1) {
%3 = tail call i32 (i8*, double, double, ...) bitcast (i32 (...)* @plintf to i32 (i8*, double, double, ...)*)(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), double %0, double %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDERR_FILENO;
int /*<<< orphan*/ dup2(int, int /*<<< orphan*/);
void log_redirect(int fd) { dup2(fd, STDERR_FILENO); }


x86 assembly (clang, -O0):
<log_redirect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <dup2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_redirect>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <dup2@plt>

LLVM IR (-O0):
@STDERR_FILENO = global i32 0
define void @log_redirect(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @STDERR_FILENO
%5 = call i32 @dup2(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@STDERR_FILENO = global i32 0
define void @log_redirect(i32 %0) {
%2 = load i32, i32* @STDERR_FILENO
%3 = tail call i32 @dup2(i32 %0, i32 %2)
ret void
}
int hashfunct(str, hash_size)
register char str[];
int hash_size;
{
  register int hashval;
  register int locstr;
  hashval = 0;
  locstr = 0;
  while (str[locstr])
    hashval = ((hashval << 1) + str[locstr++]) % hash_size;
  return (hashval);
}


x86 assembly (clang, -O0):
<hashfunct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1155 <hashfunct+0x55>
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    -0x8(%rbp),%rcx
mov    -0x14(%rbp),%edx
mov    %edx,%esi
add    $0x1,%esi
mov    %esi,-0x14(%rbp)
movslq %edx,%rdx
movsbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
jmp    1119 <hashfunct+0x19>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashfunct>:
mov    (%rdi),%al
test   %al,%al
je     1127 <hashfunct+0x27>
add    $0x1,%rdi
xor    %edx,%edx
nopl   0x0(%rax)
movsbl %al,%eax
lea    (%rax,%rdx,2),%eax
cltd
idiv   %esi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <hashfunct+0x10>
mov    %edx,%eax
ret
xor    %edx,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hashfunct(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %27
14: ; preds = %7
%15 = load i32, i32* %5
%16 = shl i32 %15, 1
%17 = load i8*, i8** %3
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
%20 = sext i32 %18 to i64
%21 = getelementptr inbounds i8, i8* %17, i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = add nsw i32 %16, %23
%25 = load i32, i32* %4
%26 = srem i32 %24, %25
store i32 %26, i32* %5
br label %7
27: ; preds = %7
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @hashfunct(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %10, %5 ], [ 0, %2 ]
%7 = phi i8 [ %15, %5 ], [ %3, %2 ]
%8 = phi i32 [ %13, %5 ], [ 0, %2 ]
%9 = shl i32 %8, 1
%10 = add nuw nsw i64 %6, 1
%11 = sext i8 %7 to i32
%12 = add nsw i32 %9, %11
%13 = srem i32 %12, %1
%14 = getelementptr inbounds i8, i8* %0, i64 %10
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %5
17: ; preds = %5, %2
%18 = phi i32 [ 0, %2 ], [ %13, %5 ]
ret i32 %18
}
void invlpg(void *p) { asm volatile("invlpg %0" ::"m"(*(char *)p)); }


x86 assembly (clang, -O0):
<invlpg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
invlpg (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<invlpg>:
invlpg (%rdi)
ret

LLVM IR (-O0):
define void @invlpg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @invlpg(i8* %0) {
tail call void asm sideeffect "invlpg $0", "*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_fail(char const *, int, char *);
void assert_null_(const char *file, int line, void *pointer) {
  if (pointer != NULL) {
    assert_fail(file, line, "Expected <null> but was not");
  }
}


x86 assembly (clang, -O0):
<assert_null_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1141 <assert_null_+0x31>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    0xec4(%rip),%rdx
call   1030 <assert_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_null_>:
test   %rdx,%rdx
je     1121 <assert_null_+0x11>
lea    0xee4(%rip),%rdx
jmp    1030 <assert_fail@plt>
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Expected <null> but was not\00"
define void @assert_null_(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = call i32 @assert_fail(i8* %10, i32 %11, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"Expected <null> but was not\00"
define void @assert_null_(i8* %0, i32 %1, i8* readnone %2) {
%4 = icmp eq i8* %2, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @assert_fail(i8* %0, i32 %1, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
int strlen(char *);
char *copyStr(char *src) {
  int slen = strlen(src);
  char *dst = (char *)malloc(sizeof(char) * (slen + 1));
  memcpy(dst, src, slen + 1);
  return dst;
}


x86 assembly (clang, -O0):
<copyStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
add    $0x1,%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyStr>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
lea    0x1(%rax),%ebp
mov    %ebp,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @copyStr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i64 @malloc(i32 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %4
%14 = load i8*, i8** %4
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
%18 = call i32 @memcpy(i8* %14, i8* %15, i32 %17)
%19 = load i8*, i8** %4
ret i8* %19
}

LLVM IR (-O2):
define i8* @copyStr(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %3)
ret i8* %5
}
/* Variables and functions */
void Default_SAADC_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<Default_SAADC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Default_SAADC_IRQHandler+0x9>
jmp    1109 <Default_SAADC_IRQHandler+0x9>

x86 assembly (clang, -O2):
<Default_SAADC_IRQHandler>:
jmp    1100 <Default_SAADC_IRQHandler>

LLVM IR (-O0):
define void @Default_SAADC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Default_SAADC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void umocktypes_free_char(char *value) { (void)value; }


x86 assembly (clang, -O0):
<umocktypes_free_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<umocktypes_free_char>:
ret

LLVM IR (-O0):
define void @umocktypes_free_char(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @umocktypes_free_char(i8* nocapture %0) {
ret void
}
int test_imm_BEint8_mem(signed char *val) {
  return ((*val) & (-0xBE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BEint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff42,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BEint8_mem>:
movsbl (%rdi),%eax
test   $0xffffff42,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BEint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -190
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_BEint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -190
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
void updateCarry(unsigned char cyf, unsigned int *reg) {
  reg -= 2;
  if (cyf) {
    *reg |= (1 << 29);
  } else {
    *reg &= ~(1 << 29);
  }
}


x86 assembly (clang, -O0):
<updateCarry>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffff8,%rax
mov    %rax,-0x10(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1137 <updateCarry+0x37>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
or     $0x20000000,%ecx
mov    %ecx,(%rax)
jmp    1145 <updateCarry+0x45>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
and    $0xdfffffff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateCarry>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
mov    $0xdfffffff,%ecx
and    -0x8(%rsi),%ecx
shl    $0x1d,%eax
or     %ecx,%eax
mov    %eax,-0x8(%rsi)
ret

LLVM IR (-O0):
define void @updateCarry(i8 zeroext %0, i32* %1) {
%3 = alloca i8
%4 = alloca i32*
store i8 %0, i8* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 -2
store i32* %6, i32** %4
%7 = load i8, i8* %3
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = or i32 %11, 536870912
store i32 %12, i32* %10
br label %17
13: ; preds = %2
%14 = load i32*, i32** %4
%15 = load i32, i32* %14
%16 = and i32 %15, -536870913
store i32 %16, i32* %14
br label %17
17: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
define void @updateCarry(i8 zeroext %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 -2
%4 = icmp eq i8 %0, 0
%5 = load i32, i32* %3
%6 = and i32 %5, -536870913
%7 = select i1 %4, i32 0, i32 536870912
%8 = or i32 %6, %7
store i32 %8, i32* %3
ret void
}
/* Type definitions */
typedef int wint_t;

/* Variables and functions */
scalar_t__ toupper(int);
wint_t towupper(wint_t c) { return c <= 255 ? (wint_t)toupper(c) : c; }


x86 assembly (clang, -O0):
<towupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xff,-0x4(%rbp)
jg     1138 <towupper+0x28>
mov    -0x4(%rbp),%edi
call   1030 <toupper@plt>
mov    %eax,-0x8(%rbp)
jmp    113e <towupper+0x2e>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<towupper>:
mov    %edi,%eax
cmp    $0xff,%edi
jg     1126 <towupper+0x16>
push   %rax
mov    %eax,%edi
call   1030 <toupper@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @towupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 255
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i64 @toupper(i32 %6)
%8 = trunc i64 %7 to i32
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %5
%12 = phi i32 [ %8, %5 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @towupper(i32 %0) {
%2 = icmp slt i32 %0, 256
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i64 @toupper(i32 %0)
%5 = trunc i64 %4 to i32
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ %0, %1 ]
ret i32 %7
}
void X509_REVOKED_free(void) {}


x86 assembly (clang, -O0):
<X509_REVOKED_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_REVOKED_free>:
ret

LLVM IR (-O0):
define void @X509_REVOKED_free() {
ret void
}

LLVM IR (-O2):
define void @X509_REVOKED_free() {
ret void
}
int cairo_code_draw_casRLabel_get_height() { return 10; }


x86 assembly (clang, -O0):
<cairo_code_draw_casRLabel_get_height>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_casRLabel_get_height>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_casRLabel_get_height() {
ret i32 10
}

LLVM IR (-O2):
define i32 @cairo_code_draw_casRLabel_get_height() {
ret i32 10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0x97() {
  Assert_real((isascii(151) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              760, ("isascii should be 0 for 0x97"));
}


x86 assembly (clang, -O0):
<t_isascii_0x97>:
push   %rbp
mov    %rsp,%rbp
mov    $0x97,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2f8,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x97>:
push   %rax
mov    $0x97,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2f8,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x97\00"
define void @t_isascii_0x97() {
%1 = call i64 @isascii(i32 151)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 760, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x97\00"
define void @t_isascii_0x97() {
%1 = tail call i64 @isascii(i32 151)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 760, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_AAuint16_mem(unsigned short *val) {
  return ((*val) & (-0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff56,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAuint16_mem>:
movzwl (%rdi),%eax
test   $0xff56,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -170
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_AAuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -170
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ usleep(size_t);
void msleep(size_t ms) { usleep(ms * 1000); }


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
imul   $0x3e8,-0x8(%rbp),%rdi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
imul   $0x3e8,%rdi,%rdi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @msleep(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 1000
%5 = call i32 @usleep(i64 %4)
ret void
}

LLVM IR (-O2):
define void @msleep(i64 %0) {
%2 = mul i64 %0, 1000
%3 = tail call i32 @usleep(i64 %2)
ret void
}
int block_get_block_size() { return 512; }


x86 assembly (clang, -O0):
<block_get_block_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x200,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<block_get_block_size>:
mov    $0x200,%eax
ret

LLVM IR (-O0):
define i32 @block_get_block_size() {
ret i32 512
}

LLVM IR (-O2):
define i32 @block_get_block_size() {
ret i32 512
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000004))) = ui32Cmd;
}


x86 assembly (clang, -O0):
<I2CMasterControl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterControl>:
mov    %rsi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @I2CMasterControl(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 4
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2CMasterControl(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 4
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xd7() {
  Assert_real((iscntrl(215) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              1080, ("iscntrl should be 0 for 0xd7"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xd7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd7,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x438,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xd7>:
push   %rax
mov    $0xd7,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x438,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xd7\00"
define void @t_iscntrl_0xd7() {
%1 = call i64 @iscntrl(i32 215)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1080, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xd7\00"
define void @t_iscntrl_0xd7() {
%1 = tail call i64 @iscntrl(i32 215)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1080, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int syscall(int, size_t, int /*<<< orphan*/ const *);
int setgroups(size_t count, const gid_t list[]) {
  return syscall(206, count, list);
}


x86 assembly (clang, -O0):
<setgroups>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0xce,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setgroups>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0xce,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @setgroups(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
%5 = load i64, i64* %3
%6 = load i32*, i32** %4
%7 = call i32 @syscall(i32 206, i64 %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @setgroups(i64 %0, i32* %1) {
%3 = tail call i32 @syscall(i32 206, i64 %0, i32* %1)
ret i32 %3
}
__attribute__((always_)) int
variable_test_bit(int nr, volatile const unsigned long *addr) {
  int oldbit;
  asm volatile("bt %2,%1\n\t"
               "sbb %0,%0"
               : "=r"(oldbit)
               : "m"(*(unsigned long *)addr), "Ir"(nr));
  return oldbit;
}


x86 assembly (clang, -O0):
<variable_test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
bt     %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<variable_test_bit>:
bt     %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @variable_test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "bt $2,$1\0A\09sbb $0,$0", "=r,*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @variable_test_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "bt $2,$1\0A\09sbb $0,$0", "=r,*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret i32 %3
}
void av_aes_ctr_init() {}


x86 assembly (clang, -O0):
<av_aes_ctr_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_aes_ctr_init>:
ret

LLVM IR (-O0):
define void @av_aes_ctr_init() {
ret void
}

LLVM IR (-O2):
define void @av_aes_ctr_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vga_set_480_scanlines(int);
void vga_set_80x30(void) { vga_set_480_scanlines(0xdf); }


x86 assembly (clang, -O0):
<vga_set_80x30>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdf,%edi
call   1030 <vga_set_480_scanlines@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_set_80x30>:
mov    $0xdf,%edi
jmp    1030 <vga_set_480_scanlines@plt>

LLVM IR (-O0):
define void @vga_set_80x30() {
%1 = call i32 @vga_set_480_scanlines(i32 223)
ret void
}

LLVM IR (-O2):
define void @vga_set_80x30() {
%1 = tail call i32 @vga_set_480_scanlines(i32 223)
ret void
}
void dd_pbl_ios_adx_session_start(const char *client_id, const char *apple_id,
                                  const char *url_scheme) {}


x86 assembly (clang, -O0):
<dd_pbl_ios_adx_session_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_pbl_ios_adx_session_start>:
ret

LLVM IR (-O0):
define void @dd_pbl_ios_adx_session_start(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @dd_pbl_ios_adx_session_start(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int buffer_unixwrite(int, char *, int);
int mywrite(int fd, char *buf, int len) {
  int w;
  w = buffer_unixwrite(fd, buf, len);
  if (w == -1)
    _exit(111);
  return w;
}


x86 assembly (clang, -O0):
<mywrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <buffer_unixwrite@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0xffffffff,-0x18(%rbp)
jne    1158 <mywrite+0x38>
mov    $0x6f,%edi
call   1030 <_exit@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywrite>:
push   %rax
call   1040 <buffer_unixwrite@plt>
cmp    $0xffffffff,%eax
je     112d <mywrite+0xd>
pop    %rcx
ret
mov    $0x6f,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @mywrite(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @buffer_unixwrite(i32 %8, i8* %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @_exit(i32 111)
unreachable
16: ; preds = %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @mywrite(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @buffer_unixwrite(i32 %0, i8* %1, i32 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @_exit(i32 111)
unreachable
8: ; preds = %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int el_hdlcDecode(uint8_t *in, size_t inLength, uint8_t *out,
                  size_t outLength) {}


x86 assembly (clang, -O0):
<el_hdlcDecode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<el_hdlcDecode>:
ret

LLVM IR (-O0):
define i32 @el_hdlcDecode(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i32* %2, i32** %8
store i64 %3, i64* %9
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @el_hdlcDecode(i32* nocapture readnone %0, i64 %1, i32* nocapture readnone %2, i64 %3) {
ret i32 undef
}
void printfactors(n) register int n;
{
  register int prime;
  if (n == 1)
    printf("\t1\n");
  else
    while (n != 1) {
      prime = factor(n);
      printf("\t%d\n", prime);
      n /= prime;
    }
}


x86 assembly (clang, -O0):
<printfactors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1148 <printfactors+0x28>
lea    0xec4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    118b <printfactors+0x6b>
jmp    114d <printfactors+0x2d>
cmpl   $0x1,-0x4(%rbp)
je     1186 <printfactors+0x66>
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1040 <factor@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe96(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    114d <printfactors+0x2d>
jmp    118b <printfactors+0x6b>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printfactors>:
cmp    $0x1,%edi
jne    1141 <printfactors+0x11>
lea    0xec9(%rip),%rdi
jmp    1030 <puts@plt>
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
lea    0xeb2(%rip),%r14
xchg   %ax,%ax
mov    %ebx,%edi
xor    %eax,%eax
call   1050 <factor@plt>
mov    %eax,%ebp
mov    %r14,%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %ebx,%eax
cltd
idiv   %ebp
mov    %eax,%ebx
cmp    $0x1,%eax
jne    1150 <printfactors+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\091\0A\00"
@.str.1 = [5 x i8] c"\09%d\0A\00"
define void @printfactors(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %21
8: ; preds = %1
br label %9
9: ; preds = %12, %8
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 1
br i1 %11, label %12, label %20
12: ; preds = %9
%13 = load i32, i32* %2
%14 = call i32 (i32, ...) bitcast (i32 (...)* @factor to i32 (i32, ...)*)(i32 %13)
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %15)
%17 = load i32, i32* %3
%18 = load i32, i32* %2
%19 = sdiv i32 %18, %17
store i32 %19, i32* %2
br label %9
20: ; preds = %9
br label %21
21: ; preds = %20, %6
ret void
}

LLVM IR (-O2):
@.str.1 = [5 x i8] c"\09%d\0A\00"
@str = [3 x i8] c"\091\00"
define void @printfactors(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
br label %11
5: ; preds = %1, %5
%6 = phi i32 [ %9, %5 ], [ %0, %1 ]
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @factor to i32 (i32, ...)*)(i32 %6)
%8 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = sdiv i32 %6, %7
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %5
11: ; preds = %5, %3
ret void
}
char asm_getchar(void) {
  char v;
  asm("movb $0x08,%%ah ; int $0x21" : "=a"(v));
  return v;
}


x86 assembly (clang, -O0):
<asm_getchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%ah
int    $0x21
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm_getchar>:
mov    $0x8,%ah
int    $0x21
ret

LLVM IR (-O0):
define signext i8 @asm_getchar() {
%1 = alloca i8
%2 = call i8 asm "movb $$0x08,%ah ; int $$0x21", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i8 %2, i8* %1
%3 = load i8, i8* %1
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @asm_getchar() {
%1 = tail call i8 asm "movb $$0x08,%ah ; int $$0x21", "={ax},~{dirflag},~{fpsr},~{flags}"()
ret i8 %1
}
/* Type definitions */
struct addrinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ freeaddrinfo(struct addrinfo *);
void socket_free_address(struct addrinfo *address) { freeaddrinfo(address); }


x86 assembly (clang, -O0):
<socket_free_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <freeaddrinfo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_free_address>:
jmp    1030 <freeaddrinfo@plt>

LLVM IR (-O0):
%struct.addrinfo = type { i32 }
define void @socket_free_address(%struct.addrinfo* %0) {
%2 = alloca %struct.addrinfo*
store %struct.addrinfo* %0, %struct.addrinfo** %2
%3 = load %struct.addrinfo*, %struct.addrinfo** %2
%4 = call i32 @freeaddrinfo(%struct.addrinfo* %3)
ret void
}

LLVM IR (-O2):
%struct.addrinfo = type { i32 }
define void @socket_free_address(%struct.addrinfo* %0) {
%2 = tail call i32 @freeaddrinfo(%struct.addrinfo* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void help(char *progname) {
  printf("Usage: %s [OPTIONS]\n"
         "-f, --facter\n"
         "Import facts from the facter program\n"
         "\n"
         "-p, --path <argument>\n"
         "Set the module path (default is pwd)\n"
         "\n"
         "-d, --debug\n"
         "Show debug messages\n"
         "\n"
         "-v, --verbose\n"
         "Set verbose mode\n"
         "\n"
         "--version\n"
         "Show program version\n"
         "\n"
         "-h, --help\n"
         "Display this help\n",
         progname);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [258 x i8] c"Usage: %s [OPTIONS]\0A-f, --facter\0AImport facts from the facter program\0A\0A-p, --path <argument>\0ASet the module path (default is pwd)\0A\0A-d, --debug\0AShow debug messages\0A\0A-v, --verbose\0ASet verbose mode\0A\0A--version\0AShow program version\0A\0A-h, --help\0ADisplay this help\0A\00"
define void @help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([258 x i8], [258 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [258 x i8] c"Usage: %s [OPTIONS]\0A-f, --facter\0AImport facts from the facter program\0A\0A-p, --path <argument>\0ASet the module path (default is pwd)\0A\0A-d, --debug\0AShow debug messages\0A\0A-v, --verbose\0ASet verbose mode\0A\0A--version\0AShow program version\0A\0A-h, --help\0ADisplay this help\0A\00"
define void @help(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([258 x i8], [258 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
char _x2c(char hex_up, char hex_low) {
  char digit;
  digit = 16 * (hex_up >= 'A' ? ((hex_up & 0xdf) - 'A') + 10 : (hex_up - '0'));
  digit += (hex_low >= 'A' ? ((hex_low & 0xdf) - 'A') + 10 : (hex_low - '0'));
  return digit;
}


x86 assembly (clang, -O0):
<_x2c>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1134 <_x2c+0x34>
movsbl -0x1(%rbp),%eax
and    $0xdf,%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x8(%rbp)
jmp    113e <_x2c+0x3e>
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x4,%eax
mov    %al,-0x3(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     116b <_x2c+0x6b>
movsbl -0x2(%rbp),%eax
and    $0xdf,%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
jmp    1175 <_x2c+0x75>
movsbl -0x2(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
movsbl -0x3(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x3(%rbp)
movsbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_x2c>:
mov    %esi,%eax
and    $0xdf,%al
add    $0xc9,%al
lea    -0x30(%rsi),%ecx
cmp    $0x41,%sil
movzbl %cl,%ecx
movzbl %al,%edx
cmovl  %ecx,%edx
mov    %edi,%eax
shl    $0x4,%al
lea    -0x70(%rax),%ecx
cmp    $0x41,%dil
movzbl %al,%esi
movzbl %cl,%eax
cmovl  %esi,%eax
add    %dl,%al
ret

LLVM IR (-O0):
define signext i8 @_x2c(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = icmp sge i32 %7, 65
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = and i32 %11, 223
%13 = sub nsw i32 %12, 65
%14 = add nsw i32 %13, 10
br label %19
15: ; preds = %2
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = sub nsw i32 %17, 48
br label %19
19: ; preds = %15, %9
%20 = phi i32 [ %14, %9 ], [ %18, %15 ]
%21 = mul nsw i32 16, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %5
%23 = load i8, i8* %4
%24 = sext i8 %23 to i32
%25 = icmp sge i32 %24, 65
br i1 %25, label %26, label %32
26: ; preds = %19
%27 = load i8, i8* %4
%28 = sext i8 %27 to i32
%29 = and i32 %28, 223
%30 = sub nsw i32 %29, 65
%31 = add nsw i32 %30, 10
br label %36
32: ; preds = %19
%33 = load i8, i8* %4
%34 = sext i8 %33 to i32
%35 = sub nsw i32 %34, 48
br label %36
36: ; preds = %32, %26
%37 = phi i32 [ %31, %26 ], [ %35, %32 ]
%38 = load i8, i8* %5
%39 = sext i8 %38 to i32
%40 = add nsw i32 %39, %37
%41 = trunc i32 %40 to i8
store i8 %41, i8* %5
%42 = load i8, i8* %5
ret i8 %42
}

LLVM IR (-O2):
define signext i8 @_x2c(i8 signext %0, i8 signext %1) {
%3 = icmp sgt i8 %0, 64
%4 = icmp sgt i8 %1, 64
%5 = and i8 %1, -33
%6 = add i8 %5, -55
%7 = add i8 %1, -48
%8 = select i1 %4, i8 %6, i8 %7
%9 = shl i8 %0, 4
%10 = add i8 %9, -112
%11 = select i1 %3, i8 %10, i8 %9
%12 = add i8 %8, %11
ret i8 %12
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430InterruptP__Port14__enable();
void Msp430InterruptC__0__HplInterrupt__enable(void) {
  HplMsp430InterruptP__Port14__enable();
}


x86 assembly (clang, -O0):
<Msp430InterruptC__0__HplInterrupt__enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430InterruptP__Port14__enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430InterruptC__0__HplInterrupt__enable>:
xor    %eax,%eax
jmp    1030 <HplMsp430InterruptP__Port14__enable@plt>

LLVM IR (-O0):
define void @Msp430InterruptC__0__HplInterrupt__enable() {
%1 = call i32 (...) @HplMsp430InterruptP__Port14__enable()
ret void
}

LLVM IR (-O2):
define void @Msp430InterruptC__0__HplInterrupt__enable() {
%1 = tail call i32 (...) @HplMsp430InterruptP__Port14__enable()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int main() {
  system("start javaw -jar ./res/APIManager.jar");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"start javaw -jar ./res/APIManager.jar\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @system(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [38 x i8] c"start javaw -jar ./res/APIManager.jar\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef scalar_t__ pid_t;
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_PROCESS_CPUTIME_ID;
int EPERM;
scalar_t__ getpid();
int clock_getcpuclockid(pid_t pid, clockid_t *clk) {
  if (pid && pid != getpid())
    return EPERM;
  *clk = CLOCK_PROCESS_CPUTIME_ID;
  return 0;
}


x86 assembly (clang, -O0):
<clock_getcpuclockid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115b <clock_getcpuclockid+0x4b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
je     115b <clock_getcpuclockid+0x4b>
mov    0x2e7f(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1171 <clock_getcpuclockid+0x61>
mov    0x2e86(%rip),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_getcpuclockid>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
test   %rdi,%rdi
je     112b <clock_getcpuclockid+0x1b>
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
cmp    %rbx,%rax
jne    113b <clock_getcpuclockid+0x2b>
mov    0x2eb6(%rip),%rax
mov    (%rax),%eax
mov    %eax,(%r14)
xor    %eax,%eax
jmp    1144 <clock_getcpuclockid+0x34>
mov    0x2e8e(%rip),%rax
mov    (%rax),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EPERM = global i32 0
@CLOCK_PROCESS_CPUTIME_ID = global i32 0
define i32 @clock_getcpuclockid(i64 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32*
store i64 %0, i64* %4
store i32* %1, i32** %5
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i64, i64* %4
%10 = call i64 (...) @getpid()
%11 = icmp ne i64 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i32, i32* @EPERM
store i32 %13, i32* %3
br label %17
14: ; preds = %8, %2
%15 = load i32, i32* @CLOCK_PROCESS_CPUTIME_ID
%16 = load i32*, i32** %5
store i32 %15, i32* %16
store i32 0, i32* %3
br label %17
17: ; preds = %14, %12
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@EPERM = global i32 0
@CLOCK_PROCESS_CPUTIME_ID = global i32 0
define i32 @clock_getcpuclockid(i64 %0, i32* nocapture writeonly %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = tail call i64 (...) @getpid()
%6 = icmp eq i64 %5, %0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = load i32, i32* @EPERM
br label %11
9: ; preds = %4, %2
%10 = load i32, i32* @CLOCK_PROCESS_CPUTIME_ID
store i32 %10, i32* %1
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ %8, %7 ], [ 0, %9 ]
ret i32 %12
}
/* Variables and functions */
size_t pow10(size_t c) {
  size_t r = 10;
  for (size_t i = 1; i < c; ++i)
    r *= 10;
  return r;
}


x86 assembly (clang, -O0):
<pow10>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0xa,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1140 <pow10+0x40>
imul   $0xa,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1118 <pow10+0x18>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow10>:
mov    $0xa,%eax
cmp    $0x2,%rdi
jb     115d <pow10+0x5d>
lea    -0x1(%rdi),%rdx
add    $0xfffffffffffffffe,%rdi
mov    %edx,%ecx
and    $0x7,%ecx
cmp    $0x7,%rdi
jae    1125 <pow10+0x25>
mov    $0xa,%eax
jmp    113d <pow10+0x3d>
and    $0xfffffffffffffff8,%rdx
mov    $0xa,%eax
xchg   %ax,%ax
imul   $0x5f5e100,%rax,%rax
add    $0xfffffffffffffff8,%rdx
jne    1130 <pow10+0x30>
test   %rcx,%rcx
je     115d <pow10+0x5d>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    %rax,%rax
lea    (%rax,%rax,4),%rax
add    $0xffffffffffffffff,%rcx
jne    1150 <pow10+0x50>
ret

LLVM IR (-O0):
define i64 @pow10(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
store i64 10, i64* %3
store i64 1, i64* %4
br label %5
5: ; preds = %12, %1
%6 = load i64, i64* %4
%7 = load i64, i64* %2
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i64, i64* %3
%11 = mul i64 %10, 10
store i64 %11, i64* %3
br label %12
12: ; preds = %9
%13 = load i64, i64* %4
%14 = add i64 %13, 1
store i64 %14, i64* %4
br label %5
15: ; preds = %5
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @pow10(i64 %0) {
%2 = icmp ugt i64 %0, 1
br i1 %2, label %3, label %20
3: ; preds = %1
%4 = add i64 %0, -1
%5 = add i64 %0, -2
%6 = and i64 %4, 7
%7 = icmp ult i64 %5, 7
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = and i64 %4, -8
br label %22
10: ; preds = %22, %3
%11 = phi i64 [ undef, %3 ], [ %25, %22 ]
%12 = phi i64 [ 10, %3 ], [ %25, %22 ]
%13 = icmp eq i64 %6, 0
br i1 %13, label %20, label %14
14: ; preds = %10, %14
%15 = phi i64 [ %17, %14 ], [ %12, %10 ]
%16 = phi i64 [ %18, %14 ], [ 0, %10 ]
%17 = mul i64 %15, 10
%18 = add i64 %16, 1
%19 = icmp eq i64 %18, %6
br i1 %19, label %20, label %14
20: ; preds = %10, %14, %1
%21 = phi i64 [ 10, %1 ], [ %11, %10 ], [ %17, %14 ]
ret i64 %21
22: ; preds = %22, %8
%23 = phi i64 [ 10, %8 ], [ %25, %22 ]
%24 = phi i64 [ 0, %8 ], [ %26, %22 ]
%25 = mul i64 %23, 100000000
%26 = add i64 %24, 8
%27 = icmp eq i64 %26, %9
br i1 %27, label %10, label %22
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t stdlib_ndarray_clamp_index(int64_t idx, int64_t max) {
  if (idx < 0) {
    return 0;
  }
  if (idx > max) {
    return max;
  }
  return idx;
}


x86 assembly (clang, -O0):
<stdlib_ndarray_clamp_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1124 <stdlib_ndarray_clamp_index+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1147 <stdlib_ndarray_clamp_index+0x47>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jle    113f <stdlib_ndarray_clamp_index+0x3f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1147 <stdlib_ndarray_clamp_index+0x47>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_ndarray_clamp_index>:
cmp    %rsi,%rdi
cmovle %rdi,%rsi
xor    %eax,%eax
test   %rdi,%rdi
cmovns %rsi,%rax
ret

LLVM IR (-O0):
define i64 @stdlib_ndarray_clamp_index(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 0, i64* %3
br label %17
9: ; preds = %2
%10 = load i64, i64* %4
%11 = load i64, i64* %5
%12 = icmp sgt i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i64, i64* %5
store i64 %14, i64* %3
br label %17
15: ; preds = %9
%16 = load i64, i64* %4
store i64 %16, i64* %3
br label %17
17: ; preds = %15, %13, %8
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @stdlib_ndarray_clamp_index(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, 0
%4 = icmp sgt i64 %0, %1
%5 = select i1 %4, i64 %1, i64 %0
%6 = select i1 %3, i64 0, i64 %5
ret i64 %6
}
void inc(long *a) { a[0] = a[0] + 1; }


x86 assembly (clang, -O0):
<inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc>:
addq   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @inc(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = add nsw i64 %5, 1
%7 = load i64*, i64** %2
%8 = getelementptr inbounds i64, i64* %7, i64 0
store i64 %6, i64* %8
ret void
}

LLVM IR (-O2):
define void @inc(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = add nsw i64 %2, 1
store i64 %3, i64* %0
ret void
}
int old_function(a, b, c)
int a, *c;
int *b;
{ return a + *b; }


x86 assembly (clang, -O0):
<old_function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<old_function>:
mov    %edi,%eax
add    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @old_function(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = add nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @old_function(i32 %0, i32* nocapture %1, i32* nocapture readnone %2) {
%4 = load i32, i32* %1
%5 = add nsw i32 %4, %0
ret i32 %5
}