xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
void debugger_output(int socked_fd, char *text) {
  write(socked_fd, text, strlen(text));
}


x86 assembly (clang, -O0):
<debugger_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debugger_output>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
define void @debugger_output(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @write(i32 %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
define void @debugger_output(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %3)
ret void
}
void motion_result9(int *data) {
  int i = 0;
  int j = data[0];
  if (i >= data[2])
    return;
  j = j * 21;
loop:
  data[i] = j + i;
  i++;
  if (i < data[2])
    goto loop;
}


x86 assembly (clang, -O0):
<motion_result9>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
cmp    0x8(%rcx),%eax
jl     112d <motion_result9+0x2d>
jmp    1163 <motion_result9+0x63>
imul   $0x15,-0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edx
add    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
cmp    0x8(%rcx),%eax
jge    1163 <motion_result9+0x63>
jmp    1134 <motion_result9+0x34>
pop    %rbp
ret

x86 assembly (clang, -O2):
<motion_result9>:
cmpl   $0x0,0x8(%rdi)
jle    1123 <motion_result9+0x23>
mov    (%rdi),%eax
lea    (%rax,%rax,4),%ecx
lea    (%rax,%rcx,4),%eax
xor    %ecx,%ecx
lea    (%rax,%rcx,1),%edx
mov    %edx,(%rdi,%rcx,4)
add    $0x1,%rcx
movslq 0x8(%rdi),%rdx
cmp    %rdx,%rcx
jl     1110 <motion_result9+0x10>
ret

LLVM IR (-O0):
define void @motion_result9(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 2
%11 = load i32, i32* %10
%12 = icmp sge i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %1
br label %33
14: ; preds = %1
%15 = load i32, i32* %4
%16 = mul nsw i32 %15, 21
store i32 %16, i32* %4
br label %17
17: ; preds = %32, %14
%18 = load i32, i32* %4
%19 = load i32, i32* %3
%20 = add nsw i32 %18, %19
%21 = load i32*, i32** %2
%22 = load i32, i32* %3
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i32, i32* %21, i64 %23
store i32 %20, i32* %24
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
%27 = load i32, i32* %3
%28 = load i32*, i32** %2
%29 = getelementptr inbounds i32, i32* %28, i64 2
%30 = load i32, i32* %29
%31 = icmp slt i32 %27, %30
br i1 %31, label %32, label %33
32: ; preds = %17
br label %17
33: ; preds = %13, %17
ret void
}

LLVM IR (-O2):
define void @motion_result9(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 1
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = load i32, i32* %0
%7 = mul nsw i32 %6, 21
br label %8
8: ; preds = %8, %5
%9 = phi i64 [ %13, %8 ], [ 0, %5 ]
%10 = trunc i64 %9 to i32
%11 = add nsw i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %11, i32* %12
%13 = add nuw nsw i64 %9, 1
%14 = load i32, i32* %2
%15 = sext i32 %14 to i64
%16 = icmp slt i64 %13, %15
br i1 %16, label %8, label %17
17: ; preds = %8, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ posix_spawnattr_t;
typedef int /*<<< orphan*/ posix_spawn_file_actions_t;
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int posix_spawn(pid_t *pid, const char *path,
                const posix_spawn_file_actions_t *file_actions,
                const posix_spawnattr_t *attrp, char *const argv[],
                char *const envp[]) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<posix_spawn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%ecx
mov    0x2eac(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawn>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawn(i32* %0, i8* %1, i32* %2, i32* %3, i8** %4, i8** %5) {
%7 = alloca i32*
%8 = alloca i8*
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i8**
%12 = alloca i8**
store i32* %0, i32** %7
store i8* %1, i8** %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i8** %4, i8*** %11
store i8** %5, i8*** %12
%13 = load i32, i32* @ENOSYS
store i32 %13, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawn(i32* nocapture readnone %0, i8* nocapture readnone %1, i32* nocapture readnone %2, i32* nocapture readnone %3, i8** nocapture readnone %4, i8** nocapture readnone %5) {
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}
void X509V3_get_section(void) {}


x86 assembly (clang, -O0):
<X509V3_get_section>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509V3_get_section>:
ret

LLVM IR (-O0):
define void @X509V3_get_section() {
ret void
}

LLVM IR (-O2):
define void @X509V3_get_section() {
ret void
}
/* Variables and functions */
void *strdup(char const *);
void *my_strdup(const char *str, void *data) { return strdup(str); }


x86 assembly (clang, -O0):
<my_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strdup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strdup>:
jmp    1030 <strdup@plt>

LLVM IR (-O0):
define i8* @my_strdup(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i8* @strdup(i8* %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @my_strdup(i8* nocapture %0, i8* nocapture readnone %1) {
%3 = tail call i8* @strdup(i8* %0)
ret i8* %3
}
char *xstrchr(const char *str, int c) {
  while (*str) {
    if (*str == (char)c) {
      return (char *)str;
    }
    str++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<xstrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <xstrchr+0x4b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x14(%rbp),%ecx
movsbl %cl,%ecx
cmp    %ecx,%eax
jne    113a <xstrchr+0x3a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <xstrchr+0x53>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <xstrchr+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrchr>:
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <xstrchr+0x23>
mov    %rdi,%rax
movsbl %sil,%edx
nopl   (%rax)
movsbl %cl,%ecx
cmp    %ecx,%edx
je     1125 <xstrchr+0x25>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <xstrchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @xstrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %23
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %5
%15 = trunc i32 %14 to i8
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br i1 %17, label %18, label %20
18: ; preds = %10
%19 = load i8*, i8** %4
store i8* %19, i8** %3
br label %24
20: ; preds = %10
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
br label %6
23: ; preds = %6
store i8* null, i8** %3
br label %24
24: ; preds = %23, %18
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @xstrchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2
%6 = shl i32 %1, 24
%7 = ashr exact i32 %6, 24
br label %8
8: ; preds = %5, %13
%9 = phi i8 [ %3, %5 ], [ %15, %13 ]
%10 = phi i8* [ %0, %5 ], [ %14, %13 ]
%11 = sext i8 %9 to i32
%12 = icmp eq i32 %7, %11
br i1 %12, label %17, label %13
13: ; preds = %8
%14 = getelementptr inbounds i8, i8* %10, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %8
17: ; preds = %8, %13, %2
%18 = phi i8* [ null, %2 ], [ null, %13 ], [ %10, %8 ]
ret i8* %18
}
/* Variables and functions */
int /*<<< orphan*/ LRDP(char *);
void uc9_send_signal() { LRDP("uc9:send_signal IGNORED\n"); }


x86 assembly (clang, -O0):
<uc9_send_signal>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <LRDP@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uc9_send_signal>:
lea    0xee9(%rip),%rdi
jmp    1030 <LRDP@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"uc9:send_signal IGNORED\0A\00"
define void @uc9_send_signal() {
%1 = call i32 @LRDP(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"uc9:send_signal IGNORED\0A\00"
define void @uc9_send_signal() {
%1 = tail call i32 @LRDP(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_68int8_mem(signed char *val) {
  return ((*val) & (0x68 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_68int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_68int8_mem>:
testb  $0x68,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_68int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 104
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_68int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 104
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
double berechne_differenz_in_prozent(double zahl1, double zahl2) {
  double differenz = 0.0;
  if (zahl1 >= zahl2) {
    differenz = 100 - (zahl2 / zahl1 * 100);
  } else {
    differenz = 100 - (zahl1 / zahl2 * 100);
  }
  return differenz;
}


x86 assembly (clang, -O0):
<berechne_differenz_in_prozent>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1161 <berechne_differenz_in_prozent+0x61>
movsd  -0x10(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  0xeb1(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1197 <berechne_differenz_in_prozent+0x97>
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  0xe76(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<berechne_differenz_in_prozent>:
ucomisd %xmm1,%xmm0
movapd %xmm1,%xmm2
cmpnlesd %xmm0,%xmm2
movapd %xmm2,%xmm3
andpd  %xmm0,%xmm3
andnpd %xmm1,%xmm2
orpd   %xmm3,%xmm2
jb     1123 <berechne_differenz_in_prozent+0x23>
movapd %xmm0,%xmm1
divsd  %xmm1,%xmm2
movsd  0xed1(%rip),%xmm0
mulsd  %xmm0,%xmm2
subsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @berechne_differenz_in_prozent(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
store double 0.000000e+00, double* %5
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fcmp oge double %6, %7
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load double, double* %4
%11 = load double, double* %3
%12 = fdiv double %10, %11
%13 = fneg double %12
%14 = call double @llvm.fmuladd.f64(double %13, double 1.000000e+02, double 1.000000e+02)
store double %14, double* %5
br label %21
15: ; preds = %2
%16 = load double, double* %3
%17 = load double, double* %4
%18 = fdiv double %16, %17
%19 = fneg double %18
%20 = call double @llvm.fmuladd.f64(double %19, double 1.000000e+02, double 1.000000e+02)
store double %20, double* %5
br label %21
21: ; preds = %15, %9
%22 = load double, double* %5
ret double %22
}

LLVM IR (-O2):
define double @berechne_differenz_in_prozent(double %0, double %1) {
%3 = fcmp ult double %0, %1
%4 = select i1 %3, double %0, double %1
%5 = select i1 %3, double %1, double %0
%6 = fneg double %4
%7 = fdiv double %6, %5
%8 = tail call double @llvm.fmuladd.f64(double %7, double 1.000000e+02, double 1.000000e+02)
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ strtoimax(char const *, char **, int);
int /*<<< orphan*/ strtoumax(char const *, char **, int);
void uninivar_strtoimax(void) {
  const char *s;
  char **endp;
  int base;
  (void)strtoimax(s, endp, base);
  (void)strtoumax(s, endp, base);
}


x86 assembly (clang, -O0):
<uninivar_strtoimax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtoimax@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <strtoumax@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninivar_strtoimax>:
push   %rax
call   1030 <strtoimax@plt>
pop    %rax
jmp    1040 <strtoumax@plt>

LLVM IR (-O0):
define void @uninivar_strtoimax() {
%1 = alloca i8*
%2 = alloca i8**
%3 = alloca i32
%4 = load i8*, i8** %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = call i32 @strtoimax(i8* %4, i8** %5, i32 %6)
%8 = load i8*, i8** %1
%9 = load i8**, i8*** %2
%10 = load i32, i32* %3
%11 = call i32 @strtoumax(i8* %8, i8** %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @uninivar_strtoimax() {
%1 = tail call i32 @strtoimax(i8* undef, i8** undef, i32 undef)
%2 = tail call i32 @strtoumax(i8* undef, i8** undef, i32 undef)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
void wfd_init(const char *filename) {
  FILE *file1;
  file1 = fopen(filename, "w");
  if (file1) {
    fclose(file1);
  }
}


x86 assembly (clang, -O0):
<wfd_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1154 <wfd_init+0x34>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfd_init>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     113b <wfd_init+0x1b>
mov    %rax,%rdi
pop    %rax
jmp    1030 <fclose@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define void @wfd_init(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = icmp ne i32* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = call i32 @fclose(i32* %9)
br label %11
11: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define void @wfd_init(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fclose(i32* %2)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ create();
int main(void) { create(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <create@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <create@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @create()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @create()
ret i32 0
}
int tdefault_can_do_single_step(struct target_ops *self) { return -1; }


x86 assembly (clang, -O0):
<tdefault_can_do_single_step>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_can_do_single_step>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
define i32 @tdefault_can_do_single_step(%struct.target_ops* %0) {
%2 = alloca %struct.target_ops*
store %struct.target_ops* %0, %struct.target_ops** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.target_ops = type opaque
define i32 @tdefault_can_do_single_step(%struct.target_ops* nocapture readnone %0) {
ret i32 -1
}
int read(int fd, char *buffer, int len) { return -1; }


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @read(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @read(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 -1
}
/* Variables and functions */
double floor(double);
double modulus(double x, double y) { return x - y * floor(x / y); }


x86 assembly (clang, -O0):
<modulus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
call   1030 <floor@plt>
movsd  -0x20(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x18(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modulus>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
divsd  %xmm1,%xmm0
call   1030 <floor@plt>
mulsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @modulus(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = fdiv double %7, %8
%10 = call double @llvm.floor.f64(double %9)
%11 = fneg double %6
%12 = call double @llvm.fmuladd.f64(double %11, double %10, double %5)
ret double %12
}

LLVM IR (-O2):
define double @modulus(double %0, double %1) {
%3 = fdiv double %0, %1
%4 = tail call double @llvm.floor.f64(double %3)
%5 = fneg double %1
%6 = tail call double @llvm.fmuladd.f64(double %5, double %4, double %0)
ret double %6
}
void arch_enable_irq() {}


x86 assembly (clang, -O0):
<arch_enable_irq>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_enable_irq>:
ret

LLVM IR (-O0):
define void @arch_enable_irq() {
ret void
}

LLVM IR (-O2):
define void @arch_enable_irq() {
ret void
}
extern __attribute__((gnu_)) int stat(void) {}


x86 assembly (clang, -O0):
<stat>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stat>:
ret

LLVM IR (-O0):
define i32 @stat() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @stat() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *, int);
int scan(char const *, int);
void _do_scan(int exp, const char *str, int len) {
  int ret = scan(str, len);
  printf("%d %s %d\n", exp, exp == ret ? "==" : "!=", ret);
}


x86 assembly (clang, -O0):
<_do_scan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <scan@plt>
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%ecx
mov    -0x18(%rbp),%edi
lea    0xebc(%rip),%rdx
lea    0xeb2(%rip),%rax
cmp    %edi,%ecx
cmove  %rax,%rdx
mov    -0x18(%rbp),%ecx
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_do_scan>:
push   %rbx
mov    %edi,%ebx
mov    %rsi,%rdi
mov    %edx,%esi
call   1040 <scan@plt>
cmp    %ebx,%eax
lea    0xed4(%rip),%rcx
lea    0xed0(%rip),%rdx
cmove  %rcx,%rdx
lea    0xeb8(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%ecx
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"%d %s %d\0A\00"
@.str.1 = [3 x i8] c"==\00"
@.str.2 = [3 x i8] c"!=\00"
define void @_do_scan(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @scan(i8* %8, i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %7
%14 = icmp eq i32 %12, %13
%15 = zext i1 %14 to i64
%16 = select i1 %14, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0)
%17 = load i32, i32* %7
%18 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %16, i32 %17)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%d %s %d\0A\00"
@.str.1 = [3 x i8] c"==\00"
@.str.2 = [3 x i8] c"!=\00"
define void @_do_scan(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @scan(i8* %1, i32 %2)
%5 = icmp eq i32 %4, %0
%6 = select i1 %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %6, i32 %4)
ret void
}
/* Variables and functions */
int bits(unsigned int);
unsigned int even(unsigned int value) { return !(bits(value) % 2); }


x86 assembly (clang, -O0):
<even>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bits@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<even>:
push   %rax
call   1030 <bits@plt>
not    %eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @even(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bits(i32 %3)
%5 = srem i32 %4, 2
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @even(i32 %0) {
%2 = tail call i32 @bits(i32 %0)
%3 = and i32 %2, 1
%4 = xor i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ glViewport(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
int /*<<< orphan*/ reshapeOpenGLState(int, int);
void dbReshape(int w, int h) {
  glViewport(0, 0, w, h);
  reshapeOpenGLState(w, h);
}


x86 assembly (clang, -O0):
<dbReshape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
xor    %esi,%esi
mov    %esi,%edi
call   1040 <glViewport@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <reshapeOpenGLState@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbReshape>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
xor    %esi,%esi
mov    %ebp,%edx
mov    %ebx,%ecx
call   1040 <glViewport@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <reshapeOpenGLState@plt>

LLVM IR (-O0):
define void @dbReshape(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @glViewport(i32 0, i32 0, i32 %5, i32 %6)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @reshapeOpenGLState(i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @dbReshape(i32 %0, i32 %1) {
%3 = tail call i32 @glViewport(i32 0, i32 0, i32 %0, i32 %1)
%4 = tail call i32 @reshapeOpenGLState(i32 %0, i32 %1)
ret void
}
int ft_count_if(char **tab, int (*f)(char *)) {
  int count;
  int total;
  count = 0;
  total = 0;
  while (tab[count] != '\0') {
    if (f(tab[count]) == 1)
      total++;
    count++;
  }
  return (total);
}


x86 assembly (clang, -O0):
<ft_count_if>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1163 <ft_count_if+0x63>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq -0x14(%rbp),%rdx
mov    (%rcx,%rdx,8),%rdi
call   *%rax
cmp    $0x1,%eax
jne    1155 <ft_count_if+0x55>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111e <ft_count_if+0x1e>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_count_if>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     113b <ft_count_if+0x3b>
mov    %rsi,%r14
add    $0x8,%rbx
xor    %ebp,%ebp
nopl   0x0(%rax,%rax,1)
call   *%r14
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
add    %ecx,%ebp
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1120 <ft_count_if+0x20>
jmp    113d <ft_count_if+0x3d>
xor    %ebp,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ft_count_if(i8** %0, i32 (i8*)* %1) {
%3 = alloca i8**
%4 = alloca i32 (i8*)*
%5 = alloca i32
%6 = alloca i32
store i8** %0, i8*** %3
store i32 (i8*)* %1, i32 (i8*)** %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %26, %2
%8 = load i8**, i8*** %3
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8*, i8** %8, i64 %10
%12 = load i8*, i8** %11
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %29
14: ; preds = %7
%15 = load i32 (i8*)*, i32 (i8*)** %4
%16 = load i8**, i8*** %3
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
%21 = call i32 %15(i8* %20)
%22 = icmp eq i32 %21, 1
br i1 %22, label %23, label %26
23: ; preds = %14
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %26
26: ; preds = %23, %14
%27 = load i32, i32* %5
%28 = add nsw i32 %27, 1
store i32 %28, i32* %5
br label %7
29: ; preds = %7
%30 = load i32, i32* %6
ret i32 %30
}

LLVM IR (-O2):
define i32 @ft_count_if(i8** nocapture %0, i32 (i8*)* nocapture %1) {
%3 = load i8*, i8** %0
%4 = icmp eq i8* %3, null
br i1 %4, label %17, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %13, %5 ], [ 0, %2 ]
%7 = phi i8* [ %15, %5 ], [ %3, %2 ]
%8 = phi i32 [ %12, %5 ], [ 0, %2 ]
%9 = tail call i32 %1(i8* %7)
%10 = icmp eq i32 %9, 1
%11 = zext i1 %10 to i32
%12 = add nuw nsw i32 %8, %11
%13 = add nuw i64 %6, 1
%14 = getelementptr inbounds i8*, i8** %0, i64 %13
%15 = load i8*, i8** %14
%16 = icmp eq i8* %15, null
br i1 %16, label %17, label %5
17: ; preds = %5, %2
%18 = phi i32 [ 0, %2 ], [ %12, %5 ]
ret i32 %18
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_rdctl(int);
uint32_t _Nios2_Get_ctlreg_exception(void) {
  return (uint32_t)__builtin_rdctl(7);
}


x86 assembly (clang, -O0):
<_Nios2_Get_ctlreg_exception>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1030 <__builtin_rdctl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_Get_ctlreg_exception>:
mov    $0x7,%edi
jmp    1030 <__builtin_rdctl@plt>

LLVM IR (-O0):
define i32 @_Nios2_Get_ctlreg_exception() {
%1 = call i32 @__builtin_rdctl(i32 7)
ret i32 %1
}

LLVM IR (-O2):
define i32 @_Nios2_Get_ctlreg_exception() {
%1 = tail call i32 @__builtin_rdctl(i32 7)
ret i32 %1
}
__attribute__((__const__)) int gumbo_ascii_isupper(int c) {
  return ((unsigned)(c) - 'A') < 26;
}


x86 assembly (clang, -O0):
<gumbo_ascii_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
cmp    $0x1a,%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gumbo_ascii_isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @gumbo_ascii_isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 65
%5 = icmp ult i32 %4, 26
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @gumbo_ascii_isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void cpu_halt(void) {
  __asm__ __volatile__("cli; hlt");
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<cpu_halt>:
push   %rbp
mov    %rsp,%rbp
cli
hlt
jmp    1106 <cpu_halt+0x6>

x86 assembly (clang, -O2):
<cpu_halt>:
cli
hlt
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
jmp    1110 <cpu_halt+0x10>

LLVM IR (-O0):
define void @cpu_halt() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @cpu_halt() {
tail call void asm sideeffect "cli; hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %1
1: ; preds = %1, %0
br label %1
}
unsigned char APPL_StartMailboxHandler(void) { return 0; }


x86 assembly (clang, -O0):
<APPL_StartMailboxHandler>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<APPL_StartMailboxHandler>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @APPL_StartMailboxHandler() {
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @APPL_StartMailboxHandler() {
ret i8 0
}
/* Type definitions */
struct generator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wch(struct generator *, char);
int /*<<< orphan*/ wi(struct generator *, int);
void wi3(struct generator *g, int i) {
  if (i < 100)
    wch(g, ' ');
  if (i < 10)
    wch(g, ' ');
  wi(g, i);
}


x86 assembly (clang, -O0):
<wi3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
jge    1147 <wi3+0x27>
mov    -0x8(%rbp),%rdi
mov    $0x20,%esi
call   1040 <wch@plt>
cmpl   $0xa,-0xc(%rbp)
jge    115f <wi3+0x3f>
mov    -0x8(%rbp),%rdi
mov    $0x20,%esi
call   1040 <wch@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <wi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wi3>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
cmp    $0x63,%esi
jg     114d <wi3+0x2d>
mov    %r14,%rdi
mov    $0x20,%esi
call   1040 <wch@plt>
cmp    $0x9,%ebx
jg     114d <wi3+0x2d>
mov    %r14,%rdi
mov    $0x20,%esi
call   1040 <wch@plt>
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <wi@plt>

LLVM IR (-O0):
%struct.generator = type { i32 }
define void @wi3(%struct.generator* %0, i32 %1) {
%3 = alloca %struct.generator*
%4 = alloca i32
store %struct.generator* %0, %struct.generator** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load %struct.generator*, %struct.generator** %3
%9 = call i32 @wch(%struct.generator* %8, i8 signext 32)
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %4
%12 = icmp slt i32 %11, 10
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load %struct.generator*, %struct.generator** %3
%15 = call i32 @wch(%struct.generator* %14, i8 signext 32)
br label %16
16: ; preds = %13, %10
%17 = load %struct.generator*, %struct.generator** %3
%18 = load i32, i32* %4
%19 = call i32 @wi(%struct.generator* %17, i32 %18)
ret void
}

LLVM IR (-O2):
%struct.generator = type { i32 }
define void @wi3(%struct.generator* %0, i32 %1) {
%3 = icmp slt i32 %1, 100
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = tail call i32 @wch(%struct.generator* %0, i8 signext 32)
%6 = icmp slt i32 %1, 10
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @wch(%struct.generator* %0, i8 signext 32)
br label %9
9: ; preds = %2, %7, %4
%10 = tail call i32 @wi(%struct.generator* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AF_UNSPEC;
int ahosts_ex(int /*<<< orphan*/, int /*<<< orphan*/, int, char **);
int ahosts(int argc, char *argv[]) {
  return ahosts_ex(AF_UNSPEC, 0, argc, argv);
}


x86 assembly (clang, -O0):
<ahosts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
xor    %esi,%esi
call   1030 <ahosts_ex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ahosts>:
mov    %rsi,%rcx
mov    %edi,%edx
mov    0x2ecc(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
jmp    1030 <ahosts_ex@plt>

LLVM IR (-O0):
@AF_UNSPEC = global i32 0
define i32 @ahosts(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* @AF_UNSPEC
%6 = load i32, i32* %3
%7 = load i8**, i8*** %4
%8 = call i32 @ahosts_ex(i32 %5, i32 0, i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
@AF_UNSPEC = global i32 0
define i32 @ahosts(i32 %0, i8** %1) {
%3 = load i32, i32* @AF_UNSPEC
%4 = tail call i32 @ahosts_ex(i32 %3, i32 0, i32 %0, i8** %1)
ret i32 %4
}
int help_neighbor(int argc, char **argv) { return 1; }


x86 assembly (clang, -O0):
<help_neighbor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_neighbor>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @help_neighbor(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @help_neighbor(i32 %0, i8** nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ vo_draw_alpha_uyvy_C(int, int, unsigned char *,
                                        unsigned char *, int, unsigned char *,
                                        int);
void vo_draw_alpha_uyvy(int w, int h, unsigned char *src, unsigned char *srca,
                        int srcstride, unsigned char *dstbase, int dststride) {
  vo_draw_alpha_uyvy_C(w, h, src, srca, srcstride, dstbase, dststride);
}


x86 assembly (clang, -O0):
<vo_draw_alpha_uyvy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
mov    0x10(%rbp),%eax
mov    %eax,(%rsp)
call   1030 <vo_draw_alpha_uyvy_C@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vo_draw_alpha_uyvy>:
jmp    1030 <vo_draw_alpha_uyvy_C@plt>

LLVM IR (-O0):
define void @vo_draw_alpha_uyvy(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i32 %4, i32* %12
store i8* %5, i8** %13
store i32 %6, i32* %14
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = load i8*, i8** %10
%18 = load i8*, i8** %11
%19 = load i32, i32* %12
%20 = load i8*, i8** %13
%21 = load i32, i32* %14
%22 = call i32 @vo_draw_alpha_uyvy_C(i32 %15, i32 %16, i8* %17, i8* %18, i32 %19, i8* %20, i32 %21)
ret void
}

LLVM IR (-O2):
define void @vo_draw_alpha_uyvy(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = tail call i32 @vo_draw_alpha_uyvy_C(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6)
ret void
}
/* Variables and functions */
int SPI_3WIRE;
int SPI_getMode(int);
int SPI_setMode(int, int);
int SPI_enable3Wire(int spidev_fd) {
  int mode = SPI_getMode(spidev_fd);
  if (mode < 0)
    return -1;
  return SPI_setMode(spidev_fd, mode | SPI_3WIRE);
}


x86 assembly (clang, -O0):
<SPI_enable3Wire>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <SPI_getMode@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    114c <SPI_enable3Wire+0x2c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <SPI_enable3Wire+0x43>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    0x2e8f(%rip),%rax
or     (%rax),%esi
call   1030 <SPI_setMode@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_enable3Wire>:
push   %rbx
mov    %edi,%ebx
call   1040 <SPI_getMode@plt>
test   %eax,%eax
js     113f <SPI_enable3Wire+0x1f>
mov    0x2eb5(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <SPI_setMode@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
@SPI_3WIRE = global i32 0
define i32 @SPI_enable3Wire(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @SPI_getMode(i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %16
10: ; preds = %1
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = load i32, i32* @SPI_3WIRE
%14 = or i32 %12, %13
%15 = call i32 @SPI_setMode(i32 %11, i32 %14)
store i32 %15, i32* %2
br label %16
16: ; preds = %10, %9
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@SPI_3WIRE = global i32 0
define i32 @SPI_enable3Wire(i32 %0) {
%2 = tail call i32 @SPI_getMode(i32 %0)
%3 = icmp slt i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = load i32, i32* @SPI_3WIRE
%6 = or i32 %5, %2
%7 = tail call i32 @SPI_setMode(i32 %0, i32 %6)
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ -1, %1 ]
ret i32 %9
}
/* Variables and functions */
int f7(int *);
int f8(int *p) { return f7(p); }


x86 assembly (clang, -O0):
<f8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f7@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f8>:
jmp    1030 <f7@plt>

LLVM IR (-O0):
define i32 @f8(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f7(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f8(i32* %0) {
%2 = tail call i32 @f7(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ DisableZigbee();
void zgb_hal_close() { DisableZigbee(); }


x86 assembly (clang, -O0):
<zgb_hal_close>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DisableZigbee@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zgb_hal_close>:
xor    %eax,%eax
jmp    1030 <DisableZigbee@plt>

LLVM IR (-O0):
define void @zgb_hal_close() {
%1 = call i32 (...) @DisableZigbee()
ret void
}

LLVM IR (-O2):
define void @zgb_hal_close() {
%1 = tail call i32 (...) @DisableZigbee()
ret void
}
int reset_free(struct reset_ctl *reset_ctl) { return 0; }


x86 assembly (clang, -O0):
<reset_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_free>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.reset_ctl = type opaque
define i32 @reset_free(%struct.reset_ctl* %0) {
%2 = alloca %struct.reset_ctl*
store %struct.reset_ctl* %0, %struct.reset_ctl** %2
ret i32 0
}

LLVM IR (-O2):
%struct.reset_ctl = type opaque
define i32 @reset_free(%struct.reset_ctl* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_add_io(void *e, void **s, int fd, uint32_t events, void *callback,
                void *userdata) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_add_io>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
xor    %eax,%eax
mov    0x2ebd(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_add_io>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_add_io(i8* %0, i8** %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i8*
%8 = alloca i8**
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i8*
store i8* %0, i8** %7
store i8** %1, i8*** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i8* %5, i8** %12
%13 = load i32, i32* @EINVAL
%14 = sub nsw i32 0, %13
ret i32 %14
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_add_io(i8* nocapture readnone %0, i8** nocapture readnone %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}
int hwdl_link(void) { return 0; }


x86 assembly (clang, -O0):
<hwdl_link>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hwdl_link>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hwdl_link() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hwdl_link() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ dump_stuff_shammx64(void *, unsigned int, unsigned int);
int /*<<< orphan*/ printf(char *, char *);
void dump_stuff_shammx64_msg(const void *msg, void *buf, unsigned int size,
                             unsigned int index) {
  printf("%s : ", (char *)msg);
  dump_stuff_shammx64(buf, size, index);
}


x86 assembly (clang, -O0):
<dump_stuff_shammx64_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
call   1040 <dump_stuff_shammx64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_stuff_shammx64_msg>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <dump_stuff_shammx64@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s : \00"
define void @dump_stuff_shammx64_msg(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @dump_stuff_shammx64(i8* %11, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s : \00"
define void @dump_stuff_shammx64_msg(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
%6 = tail call i32 @dump_stuff_shammx64(i8* %1, i32 %2, i32 %3)
ret void
}
void lcd_port_init(void) {
  (*(volatile unsigned long *)0x7f008100) = 0xaaaaaaaa;
  (*(volatile unsigned long *)0x7f008120) = 0xaaaaaaaa;
}


x86 assembly (clang, -O0):
<lcd_port_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f008100,%eax
mov    $0xaaaaaaaa,%ecx
mov    %rcx,(%rax)
mov    $0x7f008120,%eax
mov    $0xaaaaaaaa,%ecx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_port_init>:
mov    $0xaaaaaaaa,%eax
mov    %rax,0x7f008100
7f
mov    %rax,0x7f008120
7f
ret

LLVM IR (-O0):
define void @lcd_port_init() {
store volatile i64 2863311530, i64* inttoptr (i64 2130739456 to i64*)
store volatile i64 2863311530, i64* inttoptr (i64 2130739488 to i64*)
ret void
}

LLVM IR (-O2):
define void @lcd_port_init() {
store volatile i64 2863311530, i64* inttoptr (i64 2130739456 to i64*)
store volatile i64 2863311530, i64* inttoptr (i64 2130739488 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpgt_epi16(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i __attribute__((__always___, __nodebug__))
_mm_cmplt_epi16(__m128i a, __m128i b) {
  return _mm_cmpgt_epi16(b, a);
}


x86 assembly (clang, -O0):
<_mm_cmplt_epi16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <_mm_cmpgt_epi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cmplt_epi16>:
mov    %edi,%eax
mov    %esi,%edi
mov    %eax,%esi
jmp    1030 <_mm_cmpgt_epi16@plt>

LLVM IR (-O0):
define i32 @_mm_cmplt_epi16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @_mm_cmpgt_epi16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @_mm_cmplt_epi16(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpgt_epi16(i32 %1, i32 %0)
ret i32 %3
}
f(enum A{X} a) { return a + 1; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add i32 %0, 1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_rwlock_unlock(int /*<<< orphan*/ *);
void kl_pthread_rwlock_rdunlock(void *data) {
  pthread_rwlock_unlock((pthread_rwlock_t *)data);
}


x86 assembly (clang, -O0):
<kl_pthread_rwlock_rdunlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_rwlock_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kl_pthread_rwlock_rdunlock>:
jmp    1030 <pthread_rwlock_unlock@plt>

LLVM IR (-O0):
define void @kl_pthread_rwlock_rdunlock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @pthread_rwlock_unlock(i32* %4)
ret void
}

LLVM IR (-O2):
define void @kl_pthread_rwlock_rdunlock(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @pthread_rwlock_unlock(i32* %2)
ret void
}