int Cyc_is_other_special(char c) {
  char _tmp21B = c;
  switch (_tmp21B) {
  case 92U:
  _LL1:
  _LL2:
    goto _LL4;
  case 34U:
  _LL3:
  _LL4:
    goto _LL6;
  case 59U:
  _LL5:
  _LL6:
    goto _LL8;
  case 38U:
  _LL7:
  _LL8:
    goto _LLA;
  case 40U:
  _LL9:
  _LLA:
    goto _LLC;
  case 41U:
  _LLB:
  _LLC:
    goto _LLE;
  case 124U:
  _LLD:
  _LLE:
    goto _LL10;
  case 94U:
  _LLF:
  _LL10:
    goto _LL12;
  case 60U:
  _LL11:
  _LL12:
    goto _LL14;
  case 62U:
  _LL13:
  _LL14:
    goto _LL16;
  case 10U:
  _LL15:
  _LL16:
    goto _LL18;
  case 9U:
  _LL17:
  _LL18:
    return 1;
  default:
  _LL19:
  _LL1A:
    return 0;
  }
_LL0:;
}


x86 assembly (clang, -O0):
<Cyc_is_other_special>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0x6(%rbp)
movsbl -0x6(%rbp),%eax
add    $0xfffffff7,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x73,%eax
ja     11f5 <Cyc_is_other_special+0xf5>
mov    -0x10(%rbp),%rax
lea    0xecf(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    113f <Cyc_is_other_special+0x3f>
jmp    1144 <Cyc_is_other_special+0x44>
jmp    1153 <Cyc_is_other_special+0x53>
jmp    114e <Cyc_is_other_special+0x4e>
jmp    1153 <Cyc_is_other_special+0x53>
jmp    1162 <Cyc_is_other_special+0x62>
jmp    115d <Cyc_is_other_special+0x5d>
jmp    1162 <Cyc_is_other_special+0x62>
jmp    1171 <Cyc_is_other_special+0x71>
jmp    116c <Cyc_is_other_special+0x6c>
jmp    1171 <Cyc_is_other_special+0x71>
jmp    1180 <Cyc_is_other_special+0x80>
jmp    117b <Cyc_is_other_special+0x7b>
jmp    1180 <Cyc_is_other_special+0x80>
jmp    118f <Cyc_is_other_special+0x8f>
jmp    118a <Cyc_is_other_special+0x8a>
jmp    118f <Cyc_is_other_special+0x8f>
jmp    119e <Cyc_is_other_special+0x9e>
jmp    1199 <Cyc_is_other_special+0x99>
jmp    119e <Cyc_is_other_special+0x9e>
jmp    11ad <Cyc_is_other_special+0xad>
jmp    11a8 <Cyc_is_other_special+0xa8>
jmp    11ad <Cyc_is_other_special+0xad>
jmp    11bc <Cyc_is_other_special+0xbc>
jmp    11b7 <Cyc_is_other_special+0xb7>
jmp    11bc <Cyc_is_other_special+0xbc>
jmp    11cb <Cyc_is_other_special+0xcb>
jmp    11c6 <Cyc_is_other_special+0xc6>
jmp    11cb <Cyc_is_other_special+0xcb>
jmp    11da <Cyc_is_other_special+0xda>
jmp    11d5 <Cyc_is_other_special+0xd5>
jmp    11da <Cyc_is_other_special+0xda>
jmp    11e9 <Cyc_is_other_special+0xe9>
jmp    11e4 <Cyc_is_other_special+0xe4>
jmp    11e9 <Cyc_is_other_special+0xe9>
movl   $0x1,-0x4(%rbp)
jmp    1206 <Cyc_is_other_special+0x106>
jmp    11fa <Cyc_is_other_special+0xfa>
jmp    11ff <Cyc_is_other_special+0xff>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_is_other_special>:
add    $0xfffffff7,%edi
cmp    $0x73,%edi
ja     111e <Cyc_is_other_special+0x1e>
mov    $0x1,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Cyc_is_other_special(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
%5 = load i8, i8* %3
store i8 %5, i8* %4
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
switch i32 %7, label %44 [
i32 92, label %8
i32 34, label %11
i32 59, label %14
i32 38, label %17
i32 40, label %20
i32 41, label %23
i32 124, label %26
i32 94, label %29
i32 60, label %32
i32 62, label %35
i32 10, label %38
i32 9, label %41
]
8: ; preds = %1
br label %9
9: ; preds = %8
br label %10
10: ; preds = %9
br label %13
11: ; preds = %1
br label %12
12: ; preds = %11
br label %13
13: ; preds = %12, %10
br label %16
14: ; preds = %1
br label %15
15: ; preds = %14
br label %16
16: ; preds = %15, %13
br label %19
17: ; preds = %1
br label %18
18: ; preds = %17
br label %19
19: ; preds = %18, %16
br label %22
20: ; preds = %1
br label %21
21: ; preds = %20
br label %22
22: ; preds = %21, %19
br label %25
23: ; preds = %1
br label %24
24: ; preds = %23
br label %25
25: ; preds = %24, %22
br label %28
26: ; preds = %1
br label %27
27: ; preds = %26
br label %28
28: ; preds = %27, %25
br label %31
29: ; preds = %1
br label %30
30: ; preds = %29
br label %31
31: ; preds = %30, %28
br label %34
32: ; preds = %1
br label %33
33: ; preds = %32
br label %34
34: ; preds = %33, %31
br label %37
35: ; preds = %1
br label %36
36: ; preds = %35
br label %37
37: ; preds = %36, %34
br label %40
38: ; preds = %1
br label %39
39: ; preds = %38
br label %40
40: ; preds = %39, %37
br label %43
41: ; preds = %1
br label %42
42: ; preds = %41
br label %43
43: ; preds = %42, %40
store i32 1, i32* %2
br label %48
44: ; preds = %1
br label %45
45: ; preds = %44
br label %46
46: ; preds = %45
store i32 0, i32* %2
br label %48
47: ; No predecessors!
br label %48
48: ; preds = %47, %46, %43
%49 = load i32, i32* %2
ret i32 %49
}

LLVM IR (-O2):
define i32 @Cyc_is_other_special(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 92, label %4
i32 34, label %4
i32 59, label %4
i32 38, label %4
i32 40, label %4
i32 41, label %4
i32 124, label %4
i32 94, label %4
i32 60, label %4
i32 62, label %4
i32 10, label %4
i32 9, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}