xunge/DecIR huggingface dataset:
unsigned short intel_cpu_type() {
  unsigned long eax, unused;
  unsigned short type;
  __asm__("cpuid"
          : "=a"(eax), "=b"(unused), "=c"(unused), "=d"(unused)
          : "a"(1));
  ;
  type = (eax >> 12) & 0x3;
  return type;
}


x86 assembly (clang, -O0):
<intel_cpu_type>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x1,%eax
cpuid
mov    %rax,-0x10(%rbp)
mov    %rbx,-0x18(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shr    $0xc,%rax
and    $0x3,%rax
mov    %ax,-0x1a(%rbp)
movzwl -0x1a(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_cpu_type>:
push   %rbx
mov    $0x1,%eax
cpuid
shr    $0xc,%eax
and    $0x3,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i16 @intel_cpu_type() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i16
%4 = call { i64, i64, i64, i64 } asm "cpuid", "={ax},={bx},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 1)
%5 = extractvalue { i64, i64, i64, i64 } %4, 0
%6 = extractvalue { i64, i64, i64, i64 } %4, 1
%7 = extractvalue { i64, i64, i64, i64 } %4, 2
%8 = extractvalue { i64, i64, i64, i64 } %4, 3
store i64 %5, i64* %1
store i64 %6, i64* %2
store i64 %7, i64* %2
store i64 %8, i64* %2
%9 = load i64, i64* %1
%10 = lshr i64 %9, 12
%11 = and i64 %10, 3
%12 = trunc i64 %11 to i16
store i16 %12, i16* %3
%13 = load i16, i16* %3
ret i16 %13
}

LLVM IR (-O2):
define zeroext i16 @intel_cpu_type() {
%1 = tail call { i64, i64, i64, i64 } asm "cpuid", "={ax},={bx},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 1)
%2 = extractvalue { i64, i64, i64, i64 } %1, 0
%3 = trunc i64 %2 to i16
%4 = lshr i16 %3, 12
%5 = and i16 %4, 3
ret i16 %5
}
void rcu_preempt_process_callbacks(void) {}


x86 assembly (clang, -O0):
<rcu_preempt_process_callbacks>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_preempt_process_callbacks>:
ret

LLVM IR (-O0):
define void @rcu_preempt_process_callbacks() {
ret void
}

LLVM IR (-O2):
define void @rcu_preempt_process_callbacks() {
ret void
}
int xio_get_log_level(void) { return 0; }


x86 assembly (clang, -O0):
<xio_get_log_level>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xio_get_log_level>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xio_get_log_level() {
ret i32 0
}

LLVM IR (-O2):
define i32 @xio_get_log_level() {
ret i32 0
}
int _write(int file, char *ptr, int len) { return -1; }


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @_write(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 -1
}
int conf_strcnt(const char *s, char c) {
  int count;
  const char *p;
  for (count = 0, p = s; *p != (char)0; p++)
    if (*p == c)
      count++;
  return count;
}


x86 assembly (clang, -O0):
<conf_strcnt>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115f <conf_strcnt+0x5f>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1149 <conf_strcnt+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114e <conf_strcnt+0x4e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111d <conf_strcnt+0x1d>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conf_strcnt>:
mov    (%rdi),%cl
test   %cl,%cl
je     1126 <conf_strcnt+0x26>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
xor    %edx,%edx
cmp    %sil,%cl
sete   %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <conf_strcnt+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @conf_strcnt(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
store i32 0, i32* %5
%7 = load i8*, i8** %3
store i8* %7, i8** %6
br label %8
8: ; preds = %24, %2
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %27
13: ; preds = %8
%14 = load i8*, i8** %6
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %4
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %23
23: ; preds = %20, %13
br label %24
24: ; preds = %23
%25 = load i8*, i8** %6
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %6
br label %8
27: ; preds = %8
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @conf_strcnt(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i8* [ %12, %5 ], [ %0, %2 ]
%8 = phi i32 [ %11, %5 ], [ 0, %2 ]
%9 = icmp eq i8 %6, %1
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %8, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %11, %5 ]
ret i32 %16
}
int execute_fadvise64_64() { return 0; }


x86 assembly (clang, -O0):
<execute_fadvise64_64>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_fadvise64_64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_fadvise64_64() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_fadvise64_64() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ AtmegaCompareP__0__AtmegaCounter__overflow();
int /*<<< orphan*/ AtmegaCounterP__0__AtmegaCounter__overflow();
void HplAtmRfa1TimerMacP__Counter__overflow(void) {
  AtmegaCompareP__0__AtmegaCounter__overflow();
  AtmegaCounterP__0__AtmegaCounter__overflow();
}


x86 assembly (clang, -O0):
<HplAtmRfa1TimerMacP__Counter__overflow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <AtmegaCompareP__0__AtmegaCounter__overflow@plt>
mov    $0x0,%al
call   1030 <AtmegaCounterP__0__AtmegaCounter__overflow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplAtmRfa1TimerMacP__Counter__overflow>:
push   %rax
xor    %eax,%eax
call   1040 <AtmegaCompareP__0__AtmegaCounter__overflow@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <AtmegaCounterP__0__AtmegaCounter__overflow@plt>

LLVM IR (-O0):
define void @HplAtmRfa1TimerMacP__Counter__overflow() {
%1 = call i32 (...) @AtmegaCompareP__0__AtmegaCounter__overflow()
%2 = call i32 (...) @AtmegaCounterP__0__AtmegaCounter__overflow()
ret void
}

LLVM IR (-O2):
define void @HplAtmRfa1TimerMacP__Counter__overflow() {
%1 = tail call i32 (...) @AtmegaCompareP__0__AtmegaCounter__overflow()
%2 = tail call i32 (...) @AtmegaCounterP__0__AtmegaCounter__overflow()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2CLoopbackEnable(uint32_t ui32Base) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000020))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<I2CLoopbackEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CLoopbackEnable>:
movslq %edi,%rax
orl    $0x1,0x20(%rax)
ret

LLVM IR (-O0):
define void @I2CLoopbackEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 32
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 1
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @I2CLoopbackEnable(i32 %0) {
%2 = add nsw i32 %0, 32
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = or i32 %5, 1
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
scalar_t__ COND_CC();
int /*<<< orphan*/ EA_AY_AI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_scc_8_ai(void) {
  m68ki_write_8(EA_AY_AI_8(), COND_CC() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_scc_8_ai>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <EA_AY_AI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <COND_CC@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_scc_8_ai>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <EA_AY_AI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <COND_CC@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_scc_8_ai() {
%1 = call i32 (...) @EA_AY_AI_8()
%2 = call i64 (...) @COND_CC()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_scc_8_ai() {
%1 = tail call i32 (...) @EA_AY_AI_8()
%2 = tail call i64 (...) @COND_CC()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
unsigned long SPISingleDataReadWrite(unsigned long ulBase,
                                     unsigned long ulWData) {
  unsigned long ulReadTemp;

  ;
  while (((*((volatile unsigned long *)(ulBase + 0x00000008))) & 0x00000080)) {
  }
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) = ulWData;
  while (((*((volatile unsigned long *)(ulBase + 0x00000008))) & 0x00000080)) {
  }
  ulReadTemp = (*((volatile unsigned long *)(ulBase + 0x0000000C)));
  return ulReadTemp;
}


x86 assembly (clang, -O0):
<SPISingleDataReadWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
and    $0x80,%rax
cmp    $0x0,%rax
je     1129 <SPISingleDataReadWrite+0x29>
jmp    110c <SPISingleDataReadWrite+0xc>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0xc(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
and    $0x80,%rax
cmp    $0x0,%rax
je     1152 <SPISingleDataReadWrite+0x52>
jmp    1135 <SPISingleDataReadWrite+0x35>
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPISingleDataReadWrite>:
testq  $0x80,0x8(%rdi)
jne    1100 <SPISingleDataReadWrite>
mov    %rsi,0xc(%rdi)
xchg   %ax,%ax
testq  $0x80,0x8(%rdi)
jne    1110 <SPISingleDataReadWrite+0x10>
mov    0xc(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @SPISingleDataReadWrite(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
br label %6
6: ; preds = %13, %2
%7 = load i64, i64* %3
%8 = add i64 %7, 8
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, 128
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %6
br label %6
14: ; preds = %6
%15 = load i64, i64* %4
%16 = load i64, i64* %3
%17 = add i64 %16, 12
%18 = inttoptr i64 %17 to i64*
store volatile i64 %15, i64* %18
br label %19
19: ; preds = %26, %14
%20 = load i64, i64* %3
%21 = add i64 %20, 8
%22 = inttoptr i64 %21 to i64*
%23 = load volatile i64, i64* %22
%24 = and i64 %23, 128
%25 = icmp ne i64 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %19
br label %19
27: ; preds = %19
%28 = load i64, i64* %3
%29 = add i64 %28, 12
%30 = inttoptr i64 %29 to i64*
%31 = load volatile i64, i64* %30
store i64 %31, i64* %5
%32 = load i64, i64* %5
ret i64 %32
}

LLVM IR (-O2):
define i64 @SPISingleDataReadWrite(i64 %0, i64 %1) {
%3 = add i64 %0, 8
%4 = inttoptr i64 %3 to i64*
br label %5
5: ; preds = %5, %2
%6 = load volatile i64, i64* %4
%7 = and i64 %6, 128
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %5
9: ; preds = %5
%10 = add i64 %0, 12
%11 = inttoptr i64 %10 to i64*
store volatile i64 %1, i64* %11
br label %12
12: ; preds = %12, %9
%13 = load volatile i64, i64* %4
%14 = and i64 %13, 128
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %12
16: ; preds = %12
%17 = load volatile i64, i64* %11
ret i64 %17
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ star();
main() {
  printf("See function below:\n\n");
  star();
  printf("\n\nSee function above:");
  getchar();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <star@plt>
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xece(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <star@plt>
lea    0xea5(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
call   1060 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"See function below:\0A\0A\00"
@.str.1 = [22 x i8] c"\0A\0ASee function above:\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @star()
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [22 x i8] c"\0A\0ASee function above:\00"
@str = [21 x i8] c"See function below:\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @star()
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 (...) @getchar()
ret i32 0
}
/* Variables and functions */
bool RFCGetPaType(void) {
  return (bool)((*((volatile unsigned char *)(0x21000345))) & 0x04);
}


x86 assembly (clang, -O0):
<RFCGetPaType>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21000345,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RFCGetPaType>:
movzbl 0x21000345,%eax
21
and    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @RFCGetPaType() {
%1 = load volatile i8, i8* inttoptr (i64 553648965 to i8*)
%2 = zext i8 %1 to i32
%3 = and i32 %2, 4
ret i32 %3
}

LLVM IR (-O2):
define i32 @RFCGetPaType() {
%1 = load volatile i8, i8* inttoptr (i64 553648965 to i8*)
%2 = and i8 %1, 4
%3 = zext i8 %2 to i32
ret i32 %3
}
/* Type definitions */
struct Queue {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Q_destroy(struct Queue *);
int /*<<< orphan*/ Q_get(struct Queue *);
struct Queue *Q_make();
int /*<<< orphan*/ Q_put(struct Queue *, int);
int main() {
  struct Queue *q = Q_make();
  Q_put(q, 1);
  Q_put(q, 2);
  Q_put(q, 3);
  Q_get(q);
  Q_destroy(q);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <Q_make@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1030 <Q_put@plt>
mov    -0x10(%rbp),%rdi
mov    $0x2,%esi
call   1030 <Q_put@plt>
mov    -0x10(%rbp),%rdi
mov    $0x3,%esi
call   1030 <Q_put@plt>
mov    -0x10(%rbp),%rdi
call   1060 <Q_get@plt>
mov    -0x10(%rbp),%rdi
call   1050 <Q_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <Q_make@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x1,%esi
call   1030 <Q_put@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <Q_put@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <Q_put@plt>
mov    %rbx,%rdi
call   1060 <Q_get@plt>
mov    %rbx,%rdi
call   1050 <Q_destroy@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.Queue = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.Queue*
store i32 0, i32* %1
%3 = call %struct.Queue* (...) @Q_make()
store %struct.Queue* %3, %struct.Queue** %2
%4 = load %struct.Queue*, %struct.Queue** %2
%5 = call i32 @Q_put(%struct.Queue* %4, i32 1)
%6 = load %struct.Queue*, %struct.Queue** %2
%7 = call i32 @Q_put(%struct.Queue* %6, i32 2)
%8 = load %struct.Queue*, %struct.Queue** %2
%9 = call i32 @Q_put(%struct.Queue* %8, i32 3)
%10 = load %struct.Queue*, %struct.Queue** %2
%11 = call i32 @Q_get(%struct.Queue* %10)
%12 = load %struct.Queue*, %struct.Queue** %2
%13 = call i32 @Q_destroy(%struct.Queue* %12)
ret i32 0
}

LLVM IR (-O2):
%struct.Queue = type { i32 }
define i32 @main() {
%1 = tail call %struct.Queue* (...) @Q_make()
%2 = tail call i32 @Q_put(%struct.Queue* %1, i32 1)
%3 = tail call i32 @Q_put(%struct.Queue* %1, i32 2)
%4 = tail call i32 @Q_put(%struct.Queue* %1, i32 3)
%5 = tail call i32 @Q_get(%struct.Queue* %1)
%6 = tail call i32 @Q_destroy(%struct.Queue* %1)
ret i32 0
}
/* Variables and functions */
int check_arg_count(int, int /*<<< orphan*/);
int /*<<< orphan*/ report_count(int);
int /*<<< orphan*/ report_return(int /*<<< orphan*/);
int /*<<< orphan*/ underscore();
void cmd_underscore(int nargs, char **args) {
  if (check_arg_count(nargs, 0) == 1)
    return;
  report_count(1);
  report_return(underscore());
}


x86 assembly (clang, -O0):
<cmd_underscore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <check_arg_count@plt>
cmp    $0x1,%eax
jne    1167 <cmd_underscore+0x27>
jmp    117f <cmd_underscore+0x3f>
mov    $0x1,%edi
call   1050 <report_count@plt>
mov    $0x0,%al
call   1060 <underscore@plt>
mov    %eax,%edi
call   1030 <report_return@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_underscore>:
push   %rax
xor    %esi,%esi
call   1040 <check_arg_count@plt>
cmp    $0x1,%eax
jne    114f <cmd_underscore+0xf>
pop    %rax
ret
mov    $0x1,%edi
call   1050 <report_count@plt>
xor    %eax,%eax
call   1060 <underscore@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <report_return@plt>

LLVM IR (-O0):
define void @cmd_underscore(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = call i32 @check_arg_count(i32 %5, i32 0)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
br label %13
9: ; preds = %2
%10 = call i32 @report_count(i32 1)
%11 = call i32 (...) @underscore()
%12 = call i32 @report_return(i32 %11)
br label %13
13: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
define void @cmd_underscore(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @check_arg_count(i32 %0, i32 0)
%4 = icmp eq i32 %3, 1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @report_count(i32 1)
%7 = tail call i32 (...) @underscore()
%8 = tail call i32 @report_return(i32 %7)
br label %9
9: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putendl(char *);
int ft_put_twod(char **map) {
  int index;
  index = -1;
  while (map[++index])
    ft_putendl(map[index]);
  return (1);
}


x86 assembly (clang, -O0):
<ft_put_twod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    %ecx,-0xc(%rbp)
movslq %ecx,%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1154 <ft_put_twod+0x44>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <ft_putendl@plt>
jmp    1123 <ft_put_twod+0x13>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_put_twod>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1131 <ft_put_twod+0x21>
add    $0x8,%rbx
call   1030 <ft_putendl@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1120 <ft_put_twod+0x10>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_put_twod(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 -1, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8*, i8** %5, i64 %8
%10 = load i8*, i8** %9
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %19
12: ; preds = %4
%13 = load i8**, i8*** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = call i32 @ft_putendl(i8* %17)
br label %4
19: ; preds = %4
ret i32 1
}

LLVM IR (-O2):
define i32 @ft_put_twod(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @ft_putendl(i8* %6)
%8 = add nuw i64 %5, 1
%9 = getelementptr inbounds i8*, i8** %0, i64 %8
%10 = load i8*, i8** %9
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret i32 1
}
int gen_cin(cin) {
  int r = ((cin & 1) ? (1 << 29) : 0);
  return r;
}


x86 assembly (clang, -O0):
<gen_cin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x1,%edx
xor    %eax,%eax
mov    $0x20000000,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_cin>:
mov    %edi,%eax
and    $0x1,%eax
shl    $0x1d,%eax
ret

LLVM IR (-O0):
define i32 @gen_cin(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 536870912, i32 0
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @gen_cin(i32 %0) {
%2 = shl i32 %0, 29
%3 = and i32 %2, 536870912
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void fxn() {
  auto int auto_var = 0;
  static int static_var = 0;
  static_var++;
  auto_var++;
  printf("\n\t\tauto_var is %d, static _var is %d", auto_var, static_var);
}


x86 assembly (clang, -O0):
<fxn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2f07(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2efe(%rip)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    0x2eec(%rip),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fxn>:
mov    0x2f16(%rip),%edx
add    $0x1,%edx
mov    %edx,0x2f0d(%rip)
lea    0xeda(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@fxn.static_var = internal global i32 0
@.str = [37 x i8] c"\0A\09\09auto_var is %d, static _var is %d\00"
define void @fxn() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @fxn.static_var
%3 = add nsw i32 %2, 1
store i32 %3, i32* @fxn.static_var
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = load i32, i32* @fxn.static_var
%8 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@fxn.static_var = internal unnamed_addr global i32 0
@.str = [37 x i8] c"\0A\09\09auto_var is %d, static _var is %d\00"
define void @fxn() {
%1 = load i32, i32* @fxn.static_var
%2 = add nsw i32 %1, 1
store i32 %2, i32* @fxn.static_var
%3 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 1, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wscanf(int /*<<< orphan*/ *, ...);
void uninitvar_wscanf(void) {
  wchar_t *format;
  int i;
  (void)wscanf(format);
  (void)wscanf(format, &i);
}


x86 assembly (clang, -O0):
<uninitvar_wscanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <wscanf@plt>
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x0,%al
call   1030 <wscanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_wscanf>:
push   %rax
xor    %eax,%eax
call   1030 <wscanf@plt>
lea    0x4(%rsp),%rsi
xor    %eax,%eax
call   1030 <wscanf@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @uninitvar_wscanf() {
%1 = alloca i32*
%2 = alloca i32
%3 = load i32*, i32** %1
%4 = call i32 (i32*, ...) @wscanf(i32* %3)
%5 = load i32*, i32** %1
%6 = call i32 (i32*, ...) @wscanf(i32* %5, i32* %2)
ret void
}

LLVM IR (-O2):
define void @uninitvar_wscanf() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i32*, ...) @wscanf(i32* undef)
%4 = call i32 (i32*, ...) @wscanf(i32* undef, i32* %1)
ret void
}
int add(int a, int b) {
  int add;
  add = a + b;
  return add;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
void foo150(int p) {}


x86 assembly (clang, -O0):
<foo150>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo150>:
ret

LLVM IR (-O0):
define void @foo150(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo150(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_set_epi32(int, int, int, int);
__m128i test_mm_set_epi32(int A, int B, int C, int D) {
  return _mm_set_epi32(A, B, C, D);
}


x86 assembly (clang, -O0):
<test_mm_set_epi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <_mm_set_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_set_epi32>:
jmp    1030 <_mm_set_epi32@plt>

LLVM IR (-O0):
define i32 @test_mm_set_epi32(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @_mm_set_epi32(i32 %9, i32 %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @test_mm_set_epi32(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @_mm_set_epi32(i32 %0, i32 %1, i32 %2, i32 %3)
ret i32 %5
}
void foo_close(struct tcmu_device *dev) {}


x86 assembly (clang, -O0):
<foo_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_close>:
ret

LLVM IR (-O0):
%struct.tcmu_device = type opaque
define void @foo_close(%struct.tcmu_device* %0) {
%2 = alloca %struct.tcmu_device*
store %struct.tcmu_device* %0, %struct.tcmu_device** %2
ret void
}

LLVM IR (-O2):
%struct.tcmu_device = type opaque
define void @foo_close(%struct.tcmu_device* nocapture %0) {
ret void
}
/* Variables and functions */
int code_convert(char *, char *, char const *, size_t, char *, size_t);
int g2u(const char *inbuf, size_t inlen, char *outbuf, size_t outlen) {
  return code_convert("gbk", "utf-8", inbuf, inlen, outbuf, outlen);
}


x86 assembly (clang, -O0):
<g2u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
lea    0xec1(%rip),%rdi
lea    0xebe(%rip),%rsi
call   1030 <code_convert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2u>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xedd(%rip),%rdi
lea    0xeda(%rip),%rsi
jmp    1030 <code_convert@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"gbk\00"
@.str.1 = [6 x i8] c"utf-8\00"
define i32 @g2u(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i64, i64* %8
%13 = call i32 @code_convert(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %9, i64 %10, i8* %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"gbk\00"
@.str.1 = [6 x i8] c"utf-8\00"
define i32 @g2u(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = tail call i32 @code_convert(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %0, i64 %1, i8* %2, i64 %3)
ret i32 %5
}
int alignof_double() {
  struct s {
    char x;
    double y;
  };
  return sizeof(char) + (sizeof(struct s) - (sizeof(char) + sizeof(double)));
}


x86 assembly (clang, -O0):
<alignof_double>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alignof_double>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @alignof_double() {
ret i32 8
}

LLVM IR (-O2):
define i32 @alignof_double() {
ret i32 8
}
/* Variables and functions */
void *malloc(size_t);
int main(int argc, char **argv) {
  size_t *size = malloc(sizeof(size_t));
  *size = 16;
  void *p = malloc(*size);
  ((char *)p)[16] = 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x10,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movb   $0x0,0x10(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = call i8* @malloc(i64 8)
%8 = bitcast i8* %7 to i64*
store i64* %8, i64** %5
%9 = load i64*, i64** %5
store i64 16, i64* %9
%10 = load i64*, i64** %5
%11 = load i64, i64* %10
%12 = call i8* @malloc(i64 %11)
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = getelementptr inbounds i8, i8* %13, i64 16
store i8 0, i8* %14
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
char tolower(char);
char *strlwr(char *psz) {
  char *ret = psz;
  while (*psz) {
    *psz = tolower(*psz);
    psz++;
  }
  return ret;
}


x86 assembly (clang, -O0):
<strlwr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1156 <strlwr+0x46>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1124 <strlwr+0x14>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlwr>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     1146 <strlwr+0x36>
lea    0x1(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <strlwr+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strlwr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %9, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = call signext i8 @tolower(i8 signext %11)
%13 = load i8*, i8** %2
store i8 %12, i8* %13
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %2
br label %5
16: ; preds = %5
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @strlwr(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call signext i8 @tolower(i8 signext %5)
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_is_negative(int n) {
  if (n < 0)
    ft_putchar('N');
  else
    ft_putchar('P');
}


x86 assembly (clang, -O0):
<ft_is_negative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1134 <ft_is_negative+0x24>
mov    $0x4e,%edi
call   1030 <ft_putchar@plt>
jmp    113e <ft_is_negative+0x2e>
mov    $0x50,%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_is_negative>:
not    %edi
shr    $0x1f,%edi
add    %edi,%edi
add    $0x4e,%edi
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_is_negative(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @ft_putchar(i8 signext 78)
br label %9
7: ; preds = %1
%8 = call i32 @ft_putchar(i8 signext 80)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @ft_is_negative(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = select i1 %2, i8 78, i8 80
%4 = tail call i32 @ft_putchar(i8 signext %3)
ret void
}
/* Variables and functions */
float my_random_double();
int /*<<< orphan*/ printf(char *, float);
int /*<<< orphan*/ srandom(int);
main(int argc, char *argv[]) {
  int i;
  float f;
  double t0, t1;
  int iters = 1000;
  int seed = 17;
  srandom(seed);
  for (i = 0; i < iters; i++) {
    f = my_random_double();
    printf("%f\n", f);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3e8,-0x2c(%rbp)
movl   $0x11,-0x30(%rbp)
mov    -0x30(%rbp),%edi
call   1030 <srandom@plt>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x2c(%rbp),%eax
jge    119a <main+0x6a>
mov    $0x0,%al
call   1050 <my_random_double@plt>
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
lea    0xe79(%rip),%rdi
call   1040 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1163 <main+0x33>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x11,%edi
call   1030 <srandom@plt>
mov    $0x3e8,%ebp
lea    0xeb7(%rip),%rbx
nopl   0x0(%rax)
xor    %eax,%eax
call   1050 <my_random_double@plt>
mov    %rbx,%rdi
call   1040 <printf@plt>
add    $0xffffffff,%ebp
jne    1150 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca float
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1000, i32* %10
store i32 17, i32* %11
%12 = load i32, i32* %11
%13 = call i32 @srandom(i32 %12)
store i32 0, i32* %6
br label %14
14: ; preds = %22, %2
%15 = load i32, i32* %6
%16 = load i32, i32* %10
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %25
18: ; preds = %14
%19 = call float (...) @my_random_double()
store float %19, float* %7
%20 = load float, float* %7
%21 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float %20)
br label %22
22: ; preds = %18
%23 = load i32, i32* %6
%24 = add nsw i32 %23, 1
store i32 %24, i32* %6
br label %14
25: ; preds = %14
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @srandom(i32 17)
br label %4
4: ; preds = %2, %4
%5 = phi i32 [ 0, %2 ], [ %8, %4 ]
%6 = tail call float (...) @my_random_double()
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float %6)
%8 = add nuw nsw i32 %5, 1
%9 = icmp eq i32 %8, 1000
br i1 %9, label %10, label %4
10: ; preds = %4
ret i32 0
}
/* Variables and functions */
int log(double);
double ebur128_energy_to_loudness(double energy) {
  return 10 * (log(energy) / log(10.0)) - 0.691;
}


x86 assembly (clang, -O0):
<ebur128_energy_to_loudness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
mov    %eax,-0xc(%rbp)
movsd  0xed6(%rip),%xmm0
call   1030 <log@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
imul   $0xa,%eax,%eax
cvtsi2sd %eax,%xmm0
movsd  0xeb2(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ebur128_energy_to_loudness>:
push   %rbx
call   1030 <log@plt>
mov    %eax,%ebx
movsd  0xee0(%rip),%xmm0
call   1030 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
add    %eax,%eax
lea    (%rax,%rax,4),%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
addsd  0xec8(%rip),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @ebur128_energy_to_loudness(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @log(double %3)
%5 = call i32 @log(double 1.000000e+01)
%6 = sdiv i32 %4, %5
%7 = mul nsw i32 10, %6
%8 = sitofp i32 %7 to double
%9 = fsub double %8, 6.910000e-01
ret double %9
}

LLVM IR (-O2):
define double @ebur128_energy_to_loudness(double %0) {
%2 = tail call i32 @log(double %0)
%3 = tail call i32 @log(double 1.000000e+01)
%4 = sdiv i32 %2, %3
%5 = mul nsw i32 %4, 10
%6 = sitofp i32 %5 to double
%7 = fadd double %6, -6.910000e-01
ret double %7
}
/* Variables and functions */
short IFF_UP;
int set_if_flags(char *, short);
int set_if_up(char *ifname, short flags) {
  return set_if_flags(ifname, flags | IFF_UP);
}


x86 assembly (clang, -O0):
<set_if_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movswl -0xa(%rbp),%eax
mov    0x2eb6(%rip),%rcx
movswl (%rcx),%ecx
or     %ecx,%eax
movswl %ax,%esi
call   1030 <set_if_flags@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_if_up>:
mov    0x2ed1(%rip),%rax
or     (%rax),%si
movswl %si,%esi
jmp    1030 <set_if_flags@plt>

LLVM IR (-O0):
@IFF_UP = global i16 0
define i32 @set_if_up(i8* %0, i16 signext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i8*, i8** %3
%6 = load i16, i16* %4
%7 = sext i16 %6 to i32
%8 = load i16, i16* @IFF_UP
%9 = sext i16 %8 to i32
%10 = or i32 %7, %9
%11 = trunc i32 %10 to i16
%12 = call i32 @set_if_flags(i8* %5, i16 signext %11)
ret i32 %12
}

LLVM IR (-O2):
@IFF_UP = global i16 0
define i32 @set_if_up(i8* %0, i16 signext %1) {
%3 = load i16, i16* @IFF_UP
%4 = or i16 %3, %1
%5 = tail call i32 @set_if_flags(i8* %0, i16 signext %4)
ret i32 %5
}
void OnEnter(int State) {}


x86 assembly (clang, -O0):
<OnEnter>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<OnEnter>:
ret

LLVM IR (-O0):
define void @OnEnter(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @OnEnter(i32 %0) {
ret void
}
/* Variables and functions */
void printf(char *x) {}


x86 assembly (clang, -O0):
<printf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<printf>:
ret

LLVM IR (-O0):
define void @printf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @printf(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int pigpio_command(int, int, unsigned int, unsigned int, int);
int hardware_clock(int pi, unsigned gpio, unsigned frequency) {
  return pigpio_command(pi, 85, gpio, frequency, 1);
}


x86 assembly (clang, -O0):
<hardware_clock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0x55,%esi
mov    $0x1,%r8d
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hardware_clock>:
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x55,%esi
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @hardware_clock(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @pigpio_command(i32 %7, i32 85, i32 %8, i32 %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
define i32 @hardware_clock(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @pigpio_command(i32 %0, i32 85, i32 %1, i32 %2, i32 1)
ret i32 %4
}
void vector_copy(double u[], double v[]) {
  for (int i = 0; i < 3; i++)
    v[i] = u[i];
}


x86 assembly (clang, -O0):
<vector_copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x3,-0x14(%rbp)
jge    1145 <vector_copy+0x45>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <vector_copy+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_copy>:
movsd  (%rdi),%xmm0
movsd  %xmm0,(%rsi)
movsd  0x8(%rdi),%xmm0
movsd  %xmm0,0x8(%rsi)
movsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rsi)
ret

LLVM IR (-O0):
define void @vector_copy(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca i32
store double* %0, double** %3
store double* %1, double** %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 3
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load double*, double** %3
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds double, double* %10, i64 %12
%14 = load double, double* %13
%15 = load double*, double** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %15, i64 %17
store double %14, double* %18
br label %19
19: ; preds = %9
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @vector_copy(double* nocapture %0, double* nocapture writeonly %1) {
%3 = load double, double* %0
store double %3, double* %1
%4 = getelementptr inbounds double, double* %0, i64 1
%5 = load double, double* %4
%6 = getelementptr inbounds double, double* %1, i64 1
store double %5, double* %6
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 2
store double %8, double* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ M_Menu_DownloadOptions_f();
void DownloadOptionsFunc(void *self) { M_Menu_DownloadOptions_f(); }


x86 assembly (clang, -O0):
<DownloadOptionsFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <M_Menu_DownloadOptions_f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DownloadOptionsFunc>:
xor    %eax,%eax
jmp    1030 <M_Menu_DownloadOptions_f@plt>

LLVM IR (-O0):
define void @DownloadOptionsFunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @M_Menu_DownloadOptions_f()
ret void
}

LLVM IR (-O2):
define void @DownloadOptionsFunc(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @M_Menu_DownloadOptions_f()
ret void
}
void foo652(int p) {}


x86 assembly (clang, -O0):
<foo652>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo652>:
ret

LLVM IR (-O0):
define void @foo652(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo652(i32 %0) {
ret void
}
int check_sp_value(void *arg) {
  if (arg != 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<check_sp_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     111f <check_sp_value+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1126 <check_sp_value+0x26>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_sp_value>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @check_sp_value(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @check_sp_value(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isxdigit(int);
void t_isxdigit_0x66() {
  Assert_real((isxdigit(102)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              515, ("isxdigit should be 1 for f"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x66>:
push   %rbp
mov    %rsp,%rbp
mov    $0x66,%edi
call   1030 <isxdigit@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x203,%edx
lea    0xf66(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x66>:
push   %rax
mov    $0x66,%edi
call   1030 <isxdigit@plt>
lea    0xece(%rip),%rsi
lea    0xf70(%rip),%rcx
mov    %eax,%edi
mov    $0x203,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 1 for f\00"
define void @t_isxdigit_0x66() {
%1 = call i32 @isxdigit(i32 102)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 515, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 1 for f\00"
define void @t_isxdigit_0x66() {
%1 = tail call i32 @isxdigit(i32 102)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 515, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_3Duint32_reg(unsigned int val) {
  return ((val) & (0x3D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Duint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x3d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Duint32_reg>:
test   $0x3d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Duint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 61
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_3Duint32_reg(i32 %0) {
%2 = and i32 %0, 61
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}