xunge/DecIR huggingface dataset:
/* Variables and functions */
double sqrt(double);
double dist(double x1, double y1, double z1, double x2, double y2, double z2) {
  return sqrt((x1 - x2) * (x1 - x2) + (y1 - y2) * (y1 - y2) +
              (z1 - z2) * (z1 - z2));
}


x86 assembly (clang, -O0):
<dist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  %xmm5,-0x30(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x20(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
subsd  -0x20(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm0
subsd  -0x28(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm3
subsd  -0x28(%rbp),%xmm3
mulsd  %xmm3,%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
subsd  -0x30(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
subsd  -0x30(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist>:
subsd  %xmm3,%xmm0
subsd  %xmm4,%xmm1
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
subsd  %xmm5,%xmm2
mulsd  %xmm2,%xmm2
addsd  %xmm0,%xmm2
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm2
jb     1142 <dist+0x32>
xorps  %xmm0,%xmm0
sqrtsd %xmm2,%xmm0
ret
movapd %xmm2,%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @dist(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
%13 = load double, double* %7
%14 = load double, double* %10
%15 = fsub double %13, %14
%16 = load double, double* %7
%17 = load double, double* %10
%18 = fsub double %16, %17
%19 = load double, double* %8
%20 = load double, double* %11
%21 = fsub double %19, %20
%22 = load double, double* %8
%23 = load double, double* %11
%24 = fsub double %22, %23
%25 = fmul double %21, %24
%26 = call double @llvm.fmuladd.f64(double %15, double %18, double %25)
%27 = load double, double* %9
%28 = load double, double* %12
%29 = fsub double %27, %28
%30 = load double, double* %9
%31 = load double, double* %12
%32 = fsub double %30, %31
%33 = call double @llvm.fmuladd.f64(double %29, double %32, double %26)
%34 = call double @sqrt(double %33)
ret double %34
}

LLVM IR (-O2):
define double @dist(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = fsub double %0, %3
%8 = fsub double %1, %4
%9 = fmul double %8, %8
%10 = tail call double @llvm.fmuladd.f64(double %7, double %7, double %9)
%11 = fsub double %2, %5
%12 = tail call double @llvm.fmuladd.f64(double %11, double %11, double %10)
%13 = tail call double @sqrt(double %12)
ret double %13
}
/* Variables and functions */
scalar_t__ fabs(float);
int nint(float x) {
  int value;
  if (x < 0.0)
    value = -(int)(fabs(x) + 0.5);
  else
    value = (int)(fabs(x) + 0.5);
  return value;
}


x86 assembly (clang, -O0):
<nint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    115e <nint+0x4e>
movss  -0x4(%rbp),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %rax,%xmm0
movsd  0xeb6(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    1180 <nint+0x70>
movss  -0x4(%rbp),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %rax,%xmm0
movsd  0xe8b(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nint>:
push   %rax
movss  %xmm0,0x4(%rsp)
call   1030 <fabs@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  0xed4(%rip),%xmm0
cvttsd2si %xmm0,%ecx
mov    %ecx,%eax
neg    %eax
xorpd  %xmm0,%xmm0
ucomiss 0x4(%rsp),%xmm0
cmovbe %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @nint(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load float, float* %2
%9 = call i64 @fabs(float %8)
%10 = sitofp i64 %9 to double
%11 = fadd double %10, 5.000000e-01
%12 = fptosi double %11 to i32
%13 = sub nsw i32 0, %12
store i32 %13, i32* %3
br label %20
14: ; preds = %1
%15 = load float, float* %2
%16 = call i64 @fabs(float %15)
%17 = sitofp i64 %16 to double
%18 = fadd double %17, 5.000000e-01
%19 = fptosi double %18 to i32
store i32 %19, i32* %3
br label %20
20: ; preds = %14, %7
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @nint(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = tail call i64 @fabs(float %0)
%4 = sitofp i64 %3 to double
%5 = fadd double %4, 5.000000e-01
%6 = fptosi double %5 to i32
%7 = sub nsw i32 0, %6
%8 = select i1 %2, i32 %7, i32 %6
ret i32 %8
}
void win_parallel_exit(void) {}


x86 assembly (clang, -O0):
<win_parallel_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<win_parallel_exit>:
ret

LLVM IR (-O0):
define void @win_parallel_exit() {
ret void
}

LLVM IR (-O2):
define void @win_parallel_exit() {
ret void
}
void reset_to_98(int *n) { *n = 98; }


x86 assembly (clang, -O0):
<reset_to_98>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x62,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_to_98>:
movl   $0x62,(%rdi)
ret

LLVM IR (-O0):
define void @reset_to_98(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 98, i32* %3
ret void
}

LLVM IR (-O2):
define void @reset_to_98(i32* nocapture writeonly %0) {
store i32 98, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gfxstub_setup();
int /*<<< orphan*/ key_setup();
int /*<<< orphan*/ openpanel_setup();
int /*<<< orphan*/ savepanel_setup();
void x_gui_setup(void) {
  gfxstub_setup();
  openpanel_setup();
  savepanel_setup();
  key_setup();
}


x86 assembly (clang, -O0):
<x_gui_setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <gfxstub_setup@plt>
mov    $0x0,%al
call   1040 <openpanel_setup@plt>
mov    $0x0,%al
call   1050 <savepanel_setup@plt>
mov    $0x0,%al
call   1030 <key_setup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_gui_setup>:
push   %rax
xor    %eax,%eax
call   1060 <gfxstub_setup@plt>
xor    %eax,%eax
call   1040 <openpanel_setup@plt>
xor    %eax,%eax
call   1050 <savepanel_setup@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <key_setup@plt>

LLVM IR (-O0):
define void @x_gui_setup() {
%1 = call i32 (...) @gfxstub_setup()
%2 = call i32 (...) @openpanel_setup()
%3 = call i32 (...) @savepanel_setup()
%4 = call i32 (...) @key_setup()
ret void
}

LLVM IR (-O2):
define void @x_gui_setup() {
%1 = tail call i32 (...) @gfxstub_setup()
%2 = tail call i32 (...) @openpanel_setup()
%3 = tail call i32 (...) @savepanel_setup()
%4 = tail call i32 (...) @key_setup()
ret void
}
int GreatestOfThree(int a, int b, int c) {
  if ((a > b) && (a > c)) {
    return a;
  } else if (b > c) {
    return b;
  }
  return c;
}


x86 assembly (clang, -O0):
<GreatestOfThree>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1130 <GreatestOfThree+0x30>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1130 <GreatestOfThree+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <GreatestOfThree+0x52>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1147 <GreatestOfThree+0x47>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <GreatestOfThree+0x52>
jmp    114c <GreatestOfThree+0x4c>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GreatestOfThree>:
cmp    %edx,%esi
mov    %edx,%ecx
cmovg  %esi,%ecx
cmp    %edx,%edi
mov    %ecx,%eax
cmovg  %edi,%eax
cmp    %esi,%edi
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @GreatestOfThree(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %26
17: ; preds = %11, %3
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = icmp sgt i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = load i32, i32* %6
store i32 %22, i32* %4
br label %26
23: ; preds = %17
br label %24
24: ; preds = %23
%25 = load i32, i32* %7
store i32 %25, i32* %4
br label %26
26: ; preds = %24, %21, %15
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @GreatestOfThree(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = and i1 %4, %5
%7 = icmp sgt i32 %1, %2
%8 = select i1 %7, i32 %1, i32 %2
%9 = select i1 %6, i32 %0, i32 %8
ret i32 %9
}
int test_62_4(int *mem) { return __atomic_nand_fetch(mem + 0, 1, 4); }


x86 assembly (clang, -O0):
<test_62_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
and    %esi,%edx
mov    %edx,-0x28(%rbp)
not    %edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    1150 <test_62_4+0x50>
jmp    1122 <test_62_4+0x22>
mov    -0x18(%rbp),%ecx
mov    -0x24(%rbp),%eax
and    %ecx,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_62_4>:
mov    (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
not    %ecx
or     $0xfffffffe,%ecx
lock cmpxchg %ecx,(%rdi)
jne    1110 <test_62_4+0x10>
not    %eax
or     $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @test_62_4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 1, i32* %3
%7 = load i32, i32* %3
%8 = atomicrmw nand i32* %6, i32 %7 acq_rel
%9 = and i32 %8, %7
%10 = xor i32 %9, -1
store i32 %10, i32* %4
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_62_4(i32* nocapture %0) {
%2 = atomicrmw nand i32* %0, i32 1 acq_rel
%3 = and i32 %2, 1
%4 = xor i32 %3, -1
ret i32 %4
}
/* Type definitions */
struct ps_process_info {
  int dummy;
};
struct ps_process_event {
  int dummy;
};

/* Variables and functions */
scalar_t__ obus_event_get_info(int /*<<< orphan*/);
int /*<<< orphan*/ ps_process_const_obus_event(struct ps_process_event const *);
const struct ps_process_info *
ps_process_event_get_info(const struct ps_process_event *event) {
  return (const struct ps_process_info *)obus_event_get_info(
      ps_process_const_obus_event(event));
}


x86 assembly (clang, -O0):
<ps_process_event_get_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ps_process_const_obus_event@plt>
mov    %eax,%edi
call   1040 <obus_event_get_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_process_event_get_info>:
push   %rax
call   1030 <ps_process_const_obus_event@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <obus_event_get_info@plt>

LLVM IR (-O0):
%struct.ps_process_info = type { i32 }
%struct.ps_process_event = type { i32 }
define %struct.ps_process_info* @ps_process_event_get_info(%struct.ps_process_event* %0) {
%2 = alloca %struct.ps_process_event*
store %struct.ps_process_event* %0, %struct.ps_process_event** %2
%3 = load %struct.ps_process_event*, %struct.ps_process_event** %2
%4 = call i32 @ps_process_const_obus_event(%struct.ps_process_event* %3)
%5 = call i64 @obus_event_get_info(i32 %4)
%6 = inttoptr i64 %5 to %struct.ps_process_info*
ret %struct.ps_process_info* %6
}

LLVM IR (-O2):
%struct.ps_process_info = type { i32 }
%struct.ps_process_event = type { i32 }
define %struct.ps_process_info* @ps_process_event_get_info(%struct.ps_process_event* %0) {
%2 = tail call i32 @ps_process_const_obus_event(%struct.ps_process_event* %0)
%3 = tail call i64 @obus_event_get_info(i32 %2)
%4 = inttoptr i64 %3 to %struct.ps_process_info*
ret %struct.ps_process_info* %4
}
int lookup2(int i) {
  int a[] = {0, 1, 2, 3, 4, 5, 6, 7};
  return a[i + 1];
}


x86 assembly (clang, -O0):
<lookup2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0xef2(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xeef(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xeec(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xee9(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
mov    -0x30(%rbp,%rax,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookup2>:
movslq %edi,%rax
lea    0xef6(%rip),%rcx
mov    0x4(%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
@__const.lookup2.a = [8 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7]
define i32 @lookup2(i32 %0) {
%2 = alloca i32
%3 = alloca [8 x i32]
store i32 %0, i32* %2
%4 = bitcast [8 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [8 x i32], [8 x i32]* %3, i64 0, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
@__const.lookup2.a = [8 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7]
define i32 @lookup2(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds [8 x i32], [8 x i32]* @__const.lookup2.a, i64 0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/);
void write_lines(char *line_ptr[], int n_lines) {
  int i;
  for (i = 1; n_lines-- > 0; ++i)
    printf("%i) %s\n", i, *line_ptr++);
}


x86 assembly (clang, -O0):
<write_lines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    116b <write_lines+0x5b>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%rax
mov    %eax,%edx
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <write_lines+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_lines>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <write_lines+0x37>
mov    %rdi,%r14
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%edx
add    $0x1,%rbx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    %ebx,%r12d
jne    1130 <write_lines+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%i) %s\0A\00"
define void @write_lines(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %4
%8 = add nsw i32 %7, -1
store i32 %8, i32* %4
%9 = icmp sgt i32 %7, 0
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i8**, i8*** %3
%13 = getelementptr inbounds i8*, i8** %12, i32 1
store i8** %13, i8*** %3
%14 = load i8*, i8** %12
%15 = ptrtoint i8* %14 to i32
%16 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%i) %s\0A\00"
define void @write_lines(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2, %4
%5 = phi i32 [ %12, %4 ], [ 1, %2 ]
%6 = phi i8** [ %7, %4 ], [ %0, %2 ]
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %6
%9 = ptrtoint i8* %8 to i64
%10 = trunc i64 %9 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %10)
%12 = add nuw i32 %5, 1
%13 = icmp eq i32 %5, %1
br i1 %13, label %14, label %4
14: ; preds = %4, %2
ret void
}
int fun335() { return 335; }


x86 assembly (clang, -O0):
<fun335>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun335>:
mov    $0x14f,%eax
ret

LLVM IR (-O0):
define i32 @fun335() {
ret i32 335
}

LLVM IR (-O2):
define i32 @fun335() {
ret i32 335
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, short, short);
void func_short(short x1, short x2) { printf("short: %hd %hd\n", x1, x2); }


x86 assembly (clang, -O0):
<func_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
lea    0xecf(%rip),%rdi
movswl %ax,%esi
movswl -0x4(%rbp),%edx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_short>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"short: %hd %hd\0A\00"
define void @func_short(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i16 signext %5, i16 signext %6)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"short: %hd %hd\0A\00"
define void @func_short(i16 signext %0, i16 signext %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i16 signext %0, i16 signext %1)
ret void
}
void XDrawArc() {}


x86 assembly (clang, -O0):
<XDrawArc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XDrawArc>:
ret

LLVM IR (-O0):
define void @XDrawArc() {
ret void
}

LLVM IR (-O2):
define void @XDrawArc() {
ret void
}
/* Variables and functions */
int randmt();
double randu53(void) {
  const unsigned int a = randmt() >> 5;
  const unsigned int b = randmt() >> 6;
  return (a * 67108864.0 + b + 0.4) * (1.0 / 9007199254740992.0);
}


x86 assembly (clang, -O0):
<randu53>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %al,-0x9(%rbp)
call   1030 <randmt@plt>
mov    %eax,%ecx
mov    -0x9(%rbp),%al
sar    $0x5,%ecx
mov    %ecx,-0x4(%rbp)
call   1030 <randmt@plt>
sar    $0x6,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2sd %rax,%xmm0
mov    -0x8(%rbp),%eax
cvtsi2sd %rax,%xmm1
movsd  0xec0(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xea8(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xe94(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randu53>:
push   %rbx
xor    %eax,%eax
call   1030 <randmt@plt>
mov    %eax,%ebx
sar    $0x5,%ebx
xor    %eax,%eax
call   1030 <randmt@plt>
sar    $0x6,%eax
cvtsi2sd %rbx,%xmm0
cvtsi2sd %rax,%xmm1
mulsd  0xec7(%rip),%xmm0
addsd  %xmm1,%xmm0
addsd  0xec3(%rip),%xmm0
mulsd  0xec3(%rip),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @randu53() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @randmt()
%4 = ashr i32 %3, 5
store i32 %4, i32* %1
%5 = call i32 (...) @randmt()
%6 = ashr i32 %5, 6
store i32 %6, i32* %2
%7 = load i32, i32* %1
%8 = uitofp i32 %7 to double
%9 = load i32, i32* %2
%10 = uitofp i32 %9 to double
%11 = call double @llvm.fmuladd.f64(double %8, double 0x4190000000000000, double %10)
%12 = fadd double %11, 4.000000e-01
%13 = fmul double %12, 0x3CA0000000000000
ret double %13
}

LLVM IR (-O2):
define double @randu53() {
%1 = tail call i32 (...) @randmt()
%2 = ashr i32 %1, 5
%3 = tail call i32 (...) @randmt()
%4 = ashr i32 %3, 6
%5 = uitofp i32 %2 to double
%6 = uitofp i32 %4 to double
%7 = tail call double @llvm.fmuladd.f64(double %5, double 0x4190000000000000, double %6)
%8 = fadd double %7, 4.000000e-01
%9 = fmul double %8, 0x3CA0000000000000
ret double %9
}
/* Variables and functions */
size_t str_index_n(char const *, char const *, size_t);
size_t u_index_n(const char *haystack, const char *needle, size_t n) {
  return str_index_n(haystack, needle, n);
}


x86 assembly (clang, -O0):
<u_index_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <str_index_n@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_index_n>:
jmp    1030 <str_index_n@plt>

LLVM IR (-O0):
define i64 @u_index_n(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @str_index_n(i8* %7, i8* %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @u_index_n(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @str_index_n(i8* %0, i8* %1, i64 %2)
ret i64 %4
}
void I422ToAR30Row_Any_SSSE3() {}


x86 assembly (clang, -O0):
<I422ToAR30Row_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422ToAR30Row_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @I422ToAR30Row_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @I422ToAR30Row_Any_SSSE3() {
ret void
}
int number_width(long n) {
  int width = 0;
  if (n < 0) {
    n *= -1;
    width++;
  }
  do {
    n /= 10;
    width++;
  } while (n);
  return width;
}


x86 assembly (clang, -O0):
<number_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    112c <number_width+0x2c>
imul   $0xffffffffffffffff,-0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1131 <number_width+0x31>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1131 <number_width+0x31>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<number_width>:
mov    %rdi,%rcx
neg    %rcx
cmovs  %rdi,%rcx
shr    $0x3f,%rdi
movabs $0x6666666666666667,%rsi
66 66 66
nopl   0x0(%rax,%rax,1)
mov    %rcx,%rax
imul   %rsi
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
add    $0x1,%edi
add    $0x9,%rcx
cmp    $0x12,%rcx
mov    %rdx,%rcx
ja     1120 <number_width+0x20>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @number_width(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
%4 = load i64, i64* %2
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i64, i64* %2
%8 = mul nsw i64 %7, -1
store i64 %8, i64* %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %11
11: ; preds = %6, %1
br label %12
12: ; preds = %17, %11
%13 = load i64, i64* %2
%14 = sdiv i64 %13, 10
store i64 %14, i64* %2
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %17
17: ; preds = %12
%18 = load i64, i64* %2
%19 = icmp ne i64 %18, 0
br i1 %19, label %12, label %20
20: ; preds = %17
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @number_width(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
%3 = lshr i64 %0, 63
%4 = trunc i64 %3 to i32
br label %5
5: ; preds = %5, %1
%6 = phi i64 [ %2, %1 ], [ %8, %5 ]
%7 = phi i32 [ %4, %1 ], [ %9, %5 ]
%8 = sdiv i64 %6, 10
%9 = add nuw nsw i32 %7, 1
%10 = add i64 %6, 9
%11 = icmp ult i64 %10, 19
br i1 %11, label %12, label %5
12: ; preds = %5
ret i32 %9
}
struct fiblist **fiblist_vector(nl, nh)
long nh, nl;
{
  struct fiblist **v;
  v = (struct fiblist **)calloc(nh - nl + 1 + 1, sizeof(struct fiblist *));
  return v - nl + 1;
}


x86 assembly (clang, -O0):
<fiblist_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x1,%rdi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
add    $0x8,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiblist_vector>:
push   %rbx
mov    %rdi,%rbx
sub    %rdi,%rsi
lea    0x2(%rsi),%rdi
mov    $0x8,%esi
call   1030 <calloc@plt>
shl    $0x3,%rbx
neg    %rbx
add    %rbx,%rax
add    $0x8,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.fiblist = type opaque
define %struct.fiblist** @fiblist_vector(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca %struct.fiblist**
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 1
%11 = call i8* @calloc(i64 %10, i64 8)
%12 = bitcast i8* %11 to %struct.fiblist**
store %struct.fiblist** %12, %struct.fiblist*** %5
%13 = load %struct.fiblist**, %struct.fiblist*** %5
%14 = load i64, i64* %3
%15 = sub i64 0, %14
%16 = getelementptr inbounds %struct.fiblist*, %struct.fiblist** %13, i64 %15
%17 = getelementptr inbounds %struct.fiblist*, %struct.fiblist** %16, i64 1
ret %struct.fiblist** %17
}

LLVM IR (-O2):
%struct.fiblist = type opaque
define noalias %struct.fiblist** @fiblist_vector(i64 %0, i64 %1) {
%3 = sub i64 0, %0
%4 = sub i64 2, %0
%5 = add i64 %4, %1
%6 = tail call i8* @calloc(i64 %5, i64 8)
%7 = bitcast i8* %6 to %struct.fiblist**
%8 = getelementptr inbounds %struct.fiblist*, %struct.fiblist** %7, i64 %3
%9 = getelementptr inbounds %struct.fiblist*, %struct.fiblist** %8, i64 1
ret %struct.fiblist** %9
}
/* Variables and functions */
int /*<<< orphan*/ SI446X_CHANGE_STATE(int);
int /*<<< orphan*/ SI446X_CONFIG_INIT();
int SI446X_GET_DEVICE_STATE();
int /*<<< orphan*/ SI446X_RESET();
int /*<<< orphan*/ SI446X_SET_POWER(int);
int /*<<< orphan*/ SI446X_START_RX(int /*<<< orphan*/, int /*<<< orphan*/,
                                   int /*<<< orphan*/, int /*<<< orphan*/,
                                   int /*<<< orphan*/, int);
void SI446X_TXCONFIG(void) {
  SI446X_RESET();
  SI446X_CONFIG_INIT();
  SI446X_SET_POWER(0x7F);
  SI446X_CHANGE_STATE(6);
  while (SI446X_GET_DEVICE_STATE() != 6)
    ;
  SI446X_START_RX(0, 0, 0, 0, 0, 3);
}


x86 assembly (clang, -O0):
<SI446X_TXCONFIG>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <SI446X_RESET@plt>
mov    $0x0,%al
call   1080 <SI446X_CONFIG_INIT@plt>
mov    $0x7f,%edi
call   1060 <SI446X_SET_POWER@plt>
mov    $0x6,%edi
call   1040 <SI446X_CHANGE_STATE@plt>
mov    $0x0,%al
call   1030 <SI446X_GET_DEVICE_STATE@plt>
cmp    $0x6,%eax
je     119b <SI446X_TXCONFIG+0x3b>
jmp    1186 <SI446X_TXCONFIG+0x26>
xor    %r8d,%r8d
mov    $0x3,%r9d
mov    %r8d,%edi
mov    %r8d,%esi
mov    %r8d,%edx
mov    %r8d,%ecx
call   1070 <SI446X_START_RX@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SI446X_TXCONFIG>:
push   %rax
xor    %eax,%eax
call   1050 <SI446X_RESET@plt>
xor    %eax,%eax
call   1080 <SI446X_CONFIG_INIT@plt>
mov    $0x7f,%edi
call   1060 <SI446X_SET_POWER@plt>
mov    $0x6,%edi
call   1040 <SI446X_CHANGE_STATE@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <SI446X_GET_DEVICE_STATE@plt>
cmp    $0x6,%eax
jne    1190 <SI446X_TXCONFIG+0x30>
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
mov    $0x3,%r9d
pop    %rax
jmp    1070 <SI446X_START_RX@plt>

LLVM IR (-O0):
define void @SI446X_TXCONFIG() {
%1 = call i32 (...) @SI446X_RESET()
%2 = call i32 (...) @SI446X_CONFIG_INIT()
%3 = call i32 @SI446X_SET_POWER(i32 127)
%4 = call i32 @SI446X_CHANGE_STATE(i32 6)
br label %5
5: ; preds = %8, %0
%6 = call i32 (...) @SI446X_GET_DEVICE_STATE()
%7 = icmp ne i32 %6, 6
br i1 %7, label %8, label %9
8: ; preds = %5
br label %5
9: ; preds = %5
%10 = call i32 @SI446X_START_RX(i32 0, i32 0, i32 0, i32 0, i32 0, i32 3)
ret void
}

LLVM IR (-O2):
define void @SI446X_TXCONFIG() {
%1 = tail call i32 (...) @SI446X_RESET()
%2 = tail call i32 (...) @SI446X_CONFIG_INIT()
%3 = tail call i32 @SI446X_SET_POWER(i32 127)
%4 = tail call i32 @SI446X_CHANGE_STATE(i32 6)
br label %5
5: ; preds = %5, %0
%6 = tail call i32 (...) @SI446X_GET_DEVICE_STATE()
%7 = icmp eq i32 %6, 6
br i1 %7, label %8, label %5
8: ; preds = %5
%9 = tail call i32 @SI446X_START_RX(i32 0, i32 0, i32 0, i32 0, i32 0, i32 3)
ret void
}
/* Variables and functions */
int *ivec_new_random_idx(int, int);
int *ivec_new_random_perm(int n) { return ivec_new_random_idx(n, n - 1); }


x86 assembly (clang, -O0):
<ivec_new_random_perm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
sub    $0x1,%esi
call   1030 <ivec_new_random_idx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivec_new_random_perm>:
lea    -0x1(%rdi),%esi
jmp    1030 <ivec_new_random_idx@plt>

LLVM IR (-O0):
define i32* @ivec_new_random_perm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = call i32* @ivec_new_random_idx(i32 %3, i32 %5)
ret i32* %6
}

LLVM IR (-O2):
define i32* @ivec_new_random_perm(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = tail call i32* @ivec_new_random_idx(i32 %0, i32 %2)
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ loglike_psi_finalize();
void fitfun_finalize() { loglike_psi_finalize(); }


x86 assembly (clang, -O0):
<fitfun_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <loglike_psi_finalize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fitfun_finalize>:
xor    %eax,%eax
jmp    1030 <loglike_psi_finalize@plt>

LLVM IR (-O0):
define void @fitfun_finalize() {
%1 = call i32 (...) @loglike_psi_finalize()
ret void
}

LLVM IR (-O2):
define void @fitfun_finalize() {
%1 = tail call i32 (...) @loglike_psi_finalize()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ doIt();
int main(int argc, const char *argv[]) {
  doIt();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <doIt@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <doIt@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @doIt()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @doIt()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ASRT_Mark(char *, int, char *);
scalar_t__ ASRT_True(int);
int test_FalseFail() {
  do {
    ASRT_Mark("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/cohadar/c-learning/refs/heads/master/"
              "src/asrt_tests.c",
              63, "1");
    if (ASRT_True(!(1))) {
      return 1;
    };
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<test_FalseFail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
mov    $0x3f,%esi
lea    0xf55(%rip),%rdx
call   1040 <ASRT_Mark@plt>
xor    %edi,%edi
call   1030 <ASRT_True@plt>
cmp    $0x0,%rax
je     115d <test_FalseFail+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1169 <test_FalseFail+0x49>
jmp    1162 <test_FalseFail+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_FalseFail>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xf61(%rip),%rdx
mov    $0x3f,%esi
call   1040 <ASRT_Mark@plt>
xor    %edi,%edi
call   1030 <ASRT_True@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/cohadar/c-learning/refs/heads/master/src/asrt_tests.c\00"
@.str.1 = [2 x i8] c"1\00"
define i32 @test_FalseFail() {
%1 = alloca i32
br label %2
2: ; preds = %0
%3 = call i32 @ASRT_Mark(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 63, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%4 = call i64 @ASRT_True(i32 0)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %2
store i32 1, i32* %1
br label %9
7: ; preds = %2
br label %8
8: ; preds = %7
store i32 0, i32* %1
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/cohadar/c-learning/refs/heads/master/src/asrt_tests.c\00"
@.str.1 = [2 x i8] c"1\00"
define i32 @test_FalseFail() {
%1 = tail call i32 @ASRT_Mark(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 63, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i64 @ASRT_True(i32 0)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *getlogin();
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char const *argv[]) {
  printf("%s\n", getlogin());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getlogin@plt>
mov    %rax,%rsi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getlogin@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i8* (...) @getlogin()
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* (...) @getlogin()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
int readstring(in, readbuffer)
int in;
char *readbuffer;
{
  int c_max;
  c_max = read(in, readbuffer, 512);
  if (c_max <= 0) {
    exit(0);
  }
  return c_max;
}


x86 assembly (clang, -O0):
<readstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x200,%edx
mov    $0x0,%al
call   1030 <read@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jg     1156 <readstring+0x36>
xor    %edi,%edi
call   1040 <exit@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readstring>:
push   %rax
mov    $0x200,%edx
xor    %eax,%eax
call   1030 <read@plt>
test   %eax,%eax
jle    1133 <readstring+0x13>
pop    %rcx
ret
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @readstring(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @read to i32 (i32, i8*, i32, ...)*)(i32 %6, i8* %7, i32 512)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp sle i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
unreachable
12: ; preds = %2
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @readstring(i32 %0, i8* %1) {
%3 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @read to i32 (i32, i8*, i32, ...)*)(i32 %0, i8* %1, i32 512)
%4 = icmp slt i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %2
tail call void @exit(i32 0)
unreachable
6: ; preds = %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/);
void ExitCurrentThread() { pthread_exit(0); }


x86 assembly (clang, -O0):
<ExitCurrentThread>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <pthread_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExitCurrentThread>:
xor    %edi,%edi
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define void @ExitCurrentThread() {
%1 = call i32 @pthread_exit(i32 0)
ret void
}

LLVM IR (-O2):
define void @ExitCurrentThread() {
%1 = tail call i32 @pthread_exit(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x47() {
  Assert_real((isodigit(71) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              360, ("isodigit should be 0 for G"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x47>:
push   %rbp
mov    %rsp,%rbp
mov    $0x47,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x168,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x47>:
push   %rax
mov    $0x47,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x168,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for G\00"
define void @t_isodigit_0x47() {
%1 = call i64 @isodigit(i32 71)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 360, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for G\00"
define void @t_isodigit_0x47() {
%1 = tail call i64 @isodigit(i32 71)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 360, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RES(int);
int /*<<< orphan*/ usleep(int);
void SSD1339_reset(void) {
  RES(0);
  usleep(100000);
  RES(1);
}


x86 assembly (clang, -O0):
<SSD1339_reset>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <RES@plt>
mov    $0x186a0,%edi
call   1040 <usleep@plt>
mov    $0x1,%edi
call   1030 <RES@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSD1339_reset>:
push   %rax
xor    %edi,%edi
call   1030 <RES@plt>
mov    $0x186a0,%edi
call   1040 <usleep@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <RES@plt>

LLVM IR (-O0):
define void @SSD1339_reset() {
%1 = call i32 @RES(i32 0)
%2 = call i32 @usleep(i32 100000)
%3 = call i32 @RES(i32 1)
ret void
}

LLVM IR (-O2):
define void @SSD1339_reset() {
%1 = tail call i32 @RES(i32 0)
%2 = tail call i32 @usleep(i32 100000)
%3 = tail call i32 @RES(i32 1)
ret void
}
int ispunct(int ch) {
  return (ch >= 0x21 && ch <= 0x2F) || (ch >= 0x3A && ch <= 0x40) ||
         (ch >= 0x5B && ch <= 0x60) || (ch >= 0x7B && ch <= 0x7E);
}


x86 assembly (clang, -O0):
<ispunct>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x21,-0x4(%rbp)
jl     1120 <ispunct+0x20>
mov    $0x1,%al
cmpl   $0x2f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1171 <ispunct+0x71>
cmpl   $0x3a,-0x4(%rbp)
jl     1139 <ispunct+0x39>
mov    $0x1,%al
cmpl   $0x40,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1171 <ispunct+0x71>
cmpl   $0x5b,-0x4(%rbp)
jl     1152 <ispunct+0x52>
mov    $0x1,%al
cmpl   $0x60,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1171 <ispunct+0x71>
xor    %eax,%eax
cmpl   $0x7b,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     116b <ispunct+0x6b>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ispunct>:
movd   %edi,%xmm0
pshufd $0x0,%xmm0,%xmm0
paddd  0xeef(%rip),%xmm0
pxor   0xef7(%rip),%xmm0
movdqa 0xeff(%rip),%xmm1
pcmpgtd %xmm0,%xmm1
movmskps %xmm1,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @ispunct(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 33
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 47
br i1 %7, label %28, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 58
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 64
br i1 %13, label %28, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 91
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 96
br i1 %19, label %28, label %20
20: ; preds = %17, %14
%21 = load i32, i32* %2
%22 = icmp sge i32 %21, 123
br i1 %22, label %23, label %26
23: ; preds = %20
%24 = load i32, i32* %2
%25 = icmp sle i32 %24, 126
br label %26
26: ; preds = %23, %20
%27 = phi i1 [ false, %20 ], [ %25, %23 ]
br label %28
28: ; preds = %26, %17, %11, %5
%29 = phi i1 [ true, %17 ], [ true, %11 ], [ true, %5 ], [ %27, %26 ]
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @ispunct(i32 %0) {
%2 = insertelement <4 x i32> poison, i32 %0, i64 0
%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <4 x i32> zeroinitializer
%4 = add <4 x i32> %3, <i32 -123, i32 -91, i32 -33, i32 -58>
%5 = icmp ult <4 x i32> %4, <i32 4, i32 6, i32 15, i32 7>
%6 = bitcast <4 x i1> %5 to i4
%7 = icmp ne i4 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ _bad_return_address(int);
void bad_return_scratchpad(void) { _bad_return_address(0xFFB00000); }


x86 assembly (clang, -O0):
<bad_return_scratchpad>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffb00000,%edi
call   1030 <_bad_return_address@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad_return_scratchpad>:
mov    $0xffb00000,%edi
jmp    1030 <_bad_return_address@plt>

LLVM IR (-O0):
define void @bad_return_scratchpad() {
%1 = call i32 @_bad_return_address(i32 -5242880)
ret void
}

LLVM IR (-O2):
define void @bad_return_scratchpad() {
%1 = tail call i32 @_bad_return_address(i32 -5242880)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int, int /*<<< orphan*/);
int ftell(int /*<<< orphan*/ *);
size_t fsize(FILE *file) {
  int position;
  int size;
  position = ftell(file);
  fseek(file, 0, SEEK_END);
  size = ftell(file);
  fseek(file, position, SEEK_SET);
  return size;
}


x86 assembly (clang, -O0):
<fsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea5(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2e72(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
movslq -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsize>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
call   1030 <ftell@plt>
mov    %eax,%r14d
mov    0x2eb2(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %rbx,%rdi
call   1030 <ftell@plt>
mov    %eax,%ebp
mov    0x2e85(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    %r14d,%esi
call   1040 <fseek@plt>
movslq %ebp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @fsize(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = call i32 @ftell(i32* %5)
store i32 %6, i32* %3
%7 = load i32*, i32** %2
%8 = load i32, i32* @SEEK_END
%9 = call i32 @fseek(i32* %7, i32 0, i32 %8)
%10 = load i32*, i32** %2
%11 = call i32 @ftell(i32* %10)
store i32 %11, i32* %4
%12 = load i32*, i32** %2
%13 = load i32, i32* %3
%14 = load i32, i32* @SEEK_SET
%15 = call i32 @fseek(i32* %12, i32 %13, i32 %14)
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
ret i64 %17
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @fsize(i32* nocapture %0) {
%2 = tail call i32 @ftell(i32* %0)
%3 = load i32, i32* @SEEK_END
%4 = tail call i32 @fseek(i32* %0, i32 0, i32 %3)
%5 = tail call i32 @ftell(i32* %0)
%6 = load i32, i32* @SEEK_SET
%7 = tail call i32 @fseek(i32* %0, i32 %2, i32 %6)
%8 = sext i32 %5 to i64
ret i64 %8
}
unsigned getLoadLimit(unsigned size) {
  return (unsigned int)((unsigned long long)size * 65) / 100;
}


x86 assembly (clang, -O0):
<getLoadLimit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x41,%rax,%rax
mov    $0x64,%ecx
xor    %edx,%edx
div    %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLoadLimit>:
mov    %edi,%eax
shl    $0x6,%eax
add    %edi,%eax
imul   $0x51eb851f,%rax,%rax
shr    $0x25,%rax
ret

LLVM IR (-O0):
define i32 @getLoadLimit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = mul i64 %4, 65
%6 = trunc i64 %5 to i32
%7 = udiv i32 %6, 100
ret i32 %7
}

LLVM IR (-O2):
define i32 @getLoadLimit(i32 %0) {
%2 = mul i32 %0, 65
%3 = udiv i32 %2, 100
ret i32 %3
}
/* Variables and functions */
int bcm2835_read(int);
int /*<<< orphan*/ bcm2835_write(int, unsigned char);
void mini_uart_putc(unsigned char byte) {
  while (bcm2835_read((0 + 0x201000 + 0x18)) & (1 << 5)) {
  }
  bcm2835_write((0 + 0x201000 + 0x00), byte);
}


x86 assembly (clang, -O0):
<mini_uart_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x201018,%edi
call   1030 <bcm2835_read@plt>
and    $0x20,%eax
cmp    $0x0,%eax
je     1149 <mini_uart_putc+0x29>
jmp    112e <mini_uart_putc+0xe>
mov    $0x201000,%edi
movzbl -0x1(%rbp),%esi
call   1040 <bcm2835_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mini_uart_putc>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x201018,%edi
call   1030 <bcm2835_read@plt>
test   $0x20,%al
jne    1130 <mini_uart_putc+0x10>
movzbl %bl,%esi
mov    $0x201000,%edi
pop    %rbx
jmp    1040 <bcm2835_write@plt>

LLVM IR (-O0):
define void @mini_uart_putc(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %7, %1
%4 = call i32 @bcm2835_read(i32 2101272)
%5 = and i32 %4, 32
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i8, i8* %2
%10 = call i32 @bcm2835_write(i32 2101248, i8 zeroext %9)
ret void
}

LLVM IR (-O2):
define void @mini_uart_putc(i8 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @bcm2835_read(i32 2101272)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = tail call i32 @bcm2835_write(i32 2101248, i8 zeroext %0)
ret void
}