xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ I2CSlaveBaseValid(unsigned long);
void I2CSlaveIntDisable(unsigned long ulBase) {
  DEBUG_ASSERT(I2CSlaveBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) &= ~0x00000001;
}


x86 assembly (clang, -O0):
<I2CSlaveIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <I2CSlaveBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    %rcx,0xc(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveIntDisable>:
push   %rbx
mov    %rdi,%rbx
call   1040 <I2CSlaveBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
andq   $0xfffffffffffffffe,0xc(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @I2CSlaveIntDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @I2CSlaveBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 12
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, -2
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2CSlaveIntDisable(i64 %0) {
%2 = tail call i32 @I2CSlaveBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 12
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -2
store volatile i64 %7, i64* %5
ret void
}
void portModuleCpuInit(void) {}


x86 assembly (clang, -O0):
<portModuleCpuInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<portModuleCpuInit>:
ret

LLVM IR (-O0):
define void @portModuleCpuInit() {
ret void
}

LLVM IR (-O2):
define void @portModuleCpuInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char *, unsigned int);
int acl_data(unsigned char *out_data, unsigned int *out_length,
             unsigned char *in_data, unsigned int in_length) {
  if (*out_length < in_length)
    return 1;
  memcpy(out_data, in_data, in_length);
  *out_length = in_length;
  return 0;
}


x86 assembly (clang, -O0):
<acl_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
cmp    -0x24(%rbp),%eax
jae    1142 <acl_data+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1162 <acl_data+0x52>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x24(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acl_data>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%eax
cmp    %ecx,(%rsi)
jb     1131 <acl_data+0x21>
mov    %ecx,%ebx
mov    %rsi,%r14
mov    %rdx,%rsi
mov    %ecx,%edx
call   1030 <memcpy@plt>
mov    %ebx,(%r14)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @acl_data(i8* %0, i32* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %6
store i32* %1, i32** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32*, i32** %7
%11 = load i32, i32* %10
%12 = load i32, i32* %9
%13 = icmp ult i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %4
store i32 1, i32* %5
br label %22
15: ; preds = %4
%16 = load i8*, i8** %6
%17 = load i8*, i8** %8
%18 = load i32, i32* %9
%19 = call i32 @memcpy(i8* %16, i8* %17, i32 %18)
%20 = load i32, i32* %9
%21 = load i32*, i32** %7
store i32 %20, i32* %21
store i32 0, i32* %5
br label %22
22: ; preds = %15, %14
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @acl_data(i8* %0, i32* nocapture %1, i8* %2, i32 %3) {
%5 = load i32, i32* %1
%6 = icmp ult i32 %5, %3
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @memcpy(i8* %0, i8* %2, i32 %3)
store i32 %3, i32* %1
br label %9
9: ; preds = %4, %7
%10 = phi i32 [ 0, %7 ], [ 1, %4 ]
ret i32 %10
}
int is_whitespace(int c) { return c == ' ' || c == '\t'; }


x86 assembly (clang, -O0):
<is_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <is_whitespace+0x20>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_whitespace>:
cmp    $0x20,%edi
sete   %al
cmp    $0x9,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_whitespace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_whitespace(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = icmp eq i32 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct stat {
  int /*<<< orphan*/ st_ctime;
};

/* Variables and functions */
time_t posix_stat_st_ctime(const struct stat *st) { return st->st_ctime; }


x86 assembly (clang, -O0):
<posix_stat_st_ctime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_stat_st_ctime>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @posix_stat_st_ctime(%struct.stat* %0) {
%2 = alloca %struct.stat*
store %struct.stat* %0, %struct.stat** %2
%3 = load %struct.stat*, %struct.stat** %2
%4 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @posix_stat_st_ctime(%struct.stat* nocapture %0) {
%2 = getelementptr inbounds %struct.stat, %struct.stat* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
int f_bge_rc2(float a1) { return !(__builtin_isgreaterequal(a1, 100)); }


x86 assembly (clang, -O0):
<f_bge_rc2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
ucomiss %xmm1,%xmm0
setae  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_bge_rc2>:
xor    %eax,%eax
ucomiss 0xef7(%rip),%xmm0
setb   %al
ret

LLVM IR (-O0):
define i32 @f_bge_rc2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 1.000000e+02
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @f_bge_rc2(float %0) {
%2 = fcmp ult float %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ FinishATTList();
int /*<<< orphan*/ InitATTList();
int /*<<< orphan*/ SetUp_address();
__attribute__((no)) void SetUpMemBanks(void) {
  InitATTList();
  SetUp_address();
  FinishATTList();
}


x86 assembly (clang, -O0):
<SetUpMemBanks>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <InitATTList@plt>
mov    $0x0,%al
call   1030 <SetUp_address@plt>
mov    $0x0,%al
call   1040 <FinishATTList@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetUpMemBanks>:
push   %rax
xor    %eax,%eax
call   1050 <InitATTList@plt>
xor    %eax,%eax
call   1030 <SetUp_address@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <FinishATTList@plt>

LLVM IR (-O0):
define void @SetUpMemBanks() {
%1 = call i32 (...) @InitATTList()
%2 = call i32 (...) @SetUp_address()
%3 = call i32 (...) @FinishATTList()
ret void
}

LLVM IR (-O2):
define void @SetUpMemBanks() {
%1 = tail call i32 (...) @InitATTList()
%2 = tail call i32 (...) @SetUp_address()
%3 = tail call i32 (...) @FinishATTList()
ret void
}
/* Variables and functions */
float const M_PI;
int cos(float const);
float perlin_interpolate(const float a, const float b, const float x) {
  const float ft = x * M_PI;
  const float f = (1 - cos(ft)) * 0.5;
  return a * (1 - f) + b * f;
}


x86 assembly (clang, -O0):
<perlin_interpolate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mov    0x2eb5(%rip),%rax
mulss  (%rax),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
call   1030 <cos@plt>
mov    %eax,%ecx
mov    $0x1,%eax
sub    %ecx,%eax
cvtsi2sd %eax,%xmm0
movsd  0xead(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xe8b(%rip),%xmm2
subss  -0x14(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0x14(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perlin_interpolate>:
push   %rax
movss  %xmm1,(%rsp)
movss  %xmm0,0x4(%rsp)
xorps  %xmm0,%xmm0
mulss  %xmm2,%xmm0
call   1030 <cos@plt>
mov    $0x1,%ecx
sub    %eax,%ecx
xorps  %xmm0,%xmm0
cvtsi2sd %ecx,%xmm0
mulsd  0xec2(%rip),%xmm0
xorps  %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm1
movss  0xebb(%rip),%xmm0
subss  %xmm1,%xmm0
movss  (%rsp),%xmm2
mulss  %xmm1,%xmm2
mulss  0x4(%rsp),%xmm0
addss  %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = constant float 0.000000e+00
define float @perlin_interpolate(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%9 = load float, float* %6
%10 = load float, float* @M_PI
%11 = fmul float %9, %10
store float %11, float* %7
%12 = load float, float* %7
%13 = call i32 @cos(float %12)
%14 = sub nsw i32 1, %13
%15 = sitofp i32 %14 to double
%16 = fmul double %15, 5.000000e-01
%17 = fptrunc double %16 to float
store float %17, float* %8
%18 = load float, float* %4
%19 = load float, float* %8
%20 = fsub float 1.000000e+00, %19
%21 = load float, float* %5
%22 = load float, float* %8
%23 = fmul float %21, %22
%24 = call float @llvm.fmuladd.f32(float %18, float %20, float %23)
ret float %24
}

LLVM IR (-O2):
@M_PI = constant float 0.000000e+00
define float @perlin_interpolate(float %0, float %1, float %2) {
%4 = fmul float %2, 0.000000e+00
%5 = tail call i32 @cos(float %4)
%6 = sub nsw i32 1, %5
%7 = sitofp i32 %6 to double
%8 = fmul double %7, 5.000000e-01
%9 = fptrunc double %8 to float
%10 = fsub float 1.000000e+00, %9
%11 = fmul float %9, %1
%12 = tail call float @llvm.fmuladd.f32(float %0, float %10, float %11)
ret float %12
}
/* Variables and functions */
double drand48();
double gen_uniform_double() { return drand48(); }


x86 assembly (clang, -O0):
<gen_uniform_double>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <drand48@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_uniform_double>:
xor    %eax,%eax
jmp    1030 <drand48@plt>

LLVM IR (-O0):
define double @gen_uniform_double() {
%1 = call double (...) @drand48()
ret double %1
}

LLVM IR (-O2):
define double @gen_uniform_double() {
%1 = tail call double (...) @drand48()
ret double %1
}
/* Variables and functions */
size_t balign_up(size_t x, size_t n) {
  size_t r = x % n;
  return (r ? x + (n - r) : x);
}


x86 assembly (clang, -O0):
<balign_up>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     113f <balign_up+0x3f>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    -0x18(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
jmp    1147 <balign_up+0x47>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<balign_up>:
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1116 <balign_up+0x16>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
jmp    111c <balign_up+0x1c>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
sub    %rdx,%rsi
test   %rdx,%rdx
cmove  %rdx,%rsi
add    %rdi,%rsi
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @balign_up(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = urem i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i64, i64* %3
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = sub i64 %13, %14
%16 = add i64 %12, %15
br label %19
17: ; preds = %2
%18 = load i64, i64* %3
br label %19
19: ; preds = %17, %11
%20 = phi i64 [ %16, %11 ], [ %18, %17 ]
ret i64 %20
}

LLVM IR (-O2):
define i64 @balign_up(i64 %0, i64 %1) {
%3 = urem i64 %0, %1
%4 = icmp eq i64 %3, 0
%5 = sub i64 %1, %3
%6 = select i1 %4, i64 0, i64 %5
%7 = add i64 %6, %0
ret i64 %7
}
int check_digits(char s[]) {
  int res;
  return res;
}


x86 assembly (clang, -O0):
<check_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_digits>:
ret

LLVM IR (-O0):
define i32 @check_digits(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @check_digits(i8* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
int sprintf(char *, char *, float);
int smp_sio_float2string(char *buffer, float n) {
  return sprintf(buffer, "%f", n);
}


x86 assembly (clang, -O0):
<smp_sio_float2string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
lea    0xecf(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_sio_float2string>:
lea    0xee9(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define i32 @smp_sio_float2string(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
store i8* %0, i8** %3
store float %1, float* %4
%5 = load i8*, i8** %3
%6 = load float, float* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define i32 @smp_sio_float2string(i8* nocapture writeonly %0, float %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %1)
ret i32 %3
}
int exact_square(int a) {
  int i;
  if (a == 1)
    return 1;
  for (i = 0; i <= a / 2; i++)
    if (i * i == a)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <exact_square+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1178 <exact_square+0x78>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jg     1171 <exact_square+0x71>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    115e <exact_square+0x5e>
movl   $0x1,-0x4(%rbp)
jmp    1178 <exact_square+0x78>
jmp    1163 <exact_square+0x63>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <exact_square+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
cmp    $0x1,%edi
jne    110c <exact_square+0xc>
mov    $0x1,%eax
jmp    1113 <exact_square+0x13>
xor    %eax,%eax
cmp    $0xffffffff,%edi
jge    1114 <exact_square+0x14>
ret
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
sar    %eax
add    $0x1,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ecx,%edx
imul   %ecx,%edx
cmp    %edi,%edx
je     1105 <exact_square+0x5>
add    $0x1,%ecx
cmp    %ecx,%eax
jne    1130 <exact_square+0x30>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %26
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = sdiv i32 %11, 2
%13 = icmp sle i32 %10, %12
br i1 %13, label %14, label %25
14: ; preds = %9
%15 = load i32, i32* %4
%16 = load i32, i32* %4
%17 = mul nsw i32 %15, %16
%18 = load i32, i32* %3
%19 = icmp eq i32 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %14
store i32 1, i32* %2
br label %26
21: ; preds = %14
br label %22
22: ; preds = %21
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %9
25: ; preds = %9
store i32 0, i32* %2
br label %26
26: ; preds = %25, %20, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @exact_square(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = icmp slt i32 %0, -1
br i1 %4, label %14, label %5
5: ; preds = %3
%6 = sdiv i32 %0, 2
br label %10
7: ; preds = %10
%8 = add nuw nsw i32 %11, 1
%9 = icmp eq i32 %11, %6
br i1 %9, label %14, label %10
10: ; preds = %5, %7
%11 = phi i32 [ %8, %7 ], [ 0, %5 ]
%12 = mul nsw i32 %11, %11
%13 = icmp eq i32 %12, %0
br i1 %13, label %14, label %7
14: ; preds = %10, %7, %3, %1
%15 = phi i32 [ 1, %1 ], [ 0, %3 ], [ 1, %10 ], [ 0, %7 ]
ret i32 %15
}
/* Variables and functions */
double sin(double);
double sin_degrees(double x) {
  double ret;
  ret = sin(x * 3.14159265359 / 180.0);
  return (ret);
}


x86 assembly (clang, -O0):
<sin_degrees>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <sin@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin_degrees>:
mulsd  0xee8(%rip),%xmm0
divsd  0xee8(%rip),%xmm0
jmp    1030 <sin@plt>

LLVM IR (-O0):
define double @sin_degrees(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double %4, 0x400921FB54442EEA
%6 = fdiv double %5, 1.800000e+02
%7 = call double @sin(double %6)
store double %7, double* %3
%8 = load double, double* %3
ret double %8
}

LLVM IR (-O2):
define double @sin_degrees(double %0) {
%2 = fmul double %0, 0x400921FB54442EEA
%3 = fdiv double %2, 1.800000e+02
%4 = tail call double @sin(double %3)
ret double %4
}
extern unsigned int inl(unsigned short port) {
  unsigned int _v;
  __asm__ __volatile__("in"
                       "l"
                       " %"
                       "w"
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "Nd"(port));
  return _v;
}


x86 assembly (clang, -O0):
<inl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inl>:
mov    %edi,%edx
in     (%dx),%eax
ret

LLVM IR (-O0):
define i32 @inl(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 asm sideeffect "inl ${1:w},$0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @inl(i16 zeroext %0) {
%2 = tail call i32 asm sideeffect "inl ${1:w},$0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i32 %2
}
/* Variables and functions */
int Dac104S085SetRaw(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/,
                     int /*<<< orphan*/);
int /*<<< orphan*/ ScaleAndBound(float);
bool Dac104S085SetVoltage(float a, float b, float c, float d) {
  return Dac104S085SetRaw(ScaleAndBound(a), ScaleAndBound(b), ScaleAndBound(c),
                          ScaleAndBound(d));
}


x86 assembly (clang, -O0):
<Dac104S085SetVoltage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    %eax,-0x1c(%rbp)
movss  -0x8(%rbp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    %eax,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    %eax,-0x14(%rbp)
movss  -0x10(%rbp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    %eax,%ecx
call   1030 <Dac104S085SetRaw@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dac104S085SetVoltage>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
movss  %xmm3,0xc(%rsp)
movss  %xmm2,0x8(%rsp)
movss  %xmm1,0x4(%rsp)
call   1040 <ScaleAndBound@plt>
mov    %eax,%r14d
movss  0x4(%rsp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    %eax,%ebp
movss  0x8(%rsp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    %eax,%ebx
movss  0xc(%rsp),%xmm0
call   1040 <ScaleAndBound@plt>
mov    %r14d,%edi
mov    %ebp,%esi
mov    %ebx,%edx
mov    %eax,%ecx
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <Dac104S085SetRaw@plt>

LLVM IR (-O0):
define i32 @Dac104S085SetVoltage(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = call i32 @ScaleAndBound(float %9)
%11 = load float, float* %6
%12 = call i32 @ScaleAndBound(float %11)
%13 = load float, float* %7
%14 = call i32 @ScaleAndBound(float %13)
%15 = load float, float* %8
%16 = call i32 @ScaleAndBound(float %15)
%17 = call i32 @Dac104S085SetRaw(i32 %10, i32 %12, i32 %14, i32 %16)
ret i32 %17
}

LLVM IR (-O2):
define i32 @Dac104S085SetVoltage(float %0, float %1, float %2, float %3) {
%5 = tail call i32 @ScaleAndBound(float %0)
%6 = tail call i32 @ScaleAndBound(float %1)
%7 = tail call i32 @ScaleAndBound(float %2)
%8 = tail call i32 @ScaleAndBound(float %3)
%9 = tail call i32 @Dac104S085SetRaw(i32 %5, i32 %6, i32 %7, i32 %8)
ret i32 %9
}
void spi_send8(volatile unsigned int *base, unsigned int val) {
  *(base + 1) = val;
}


x86 assembly (clang, -O0):
<spi_send8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_send8>:
mov    %esi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @spi_send8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 1
store volatile i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @spi_send8(i32* %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 1
store volatile i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_xrealloc() {
  printf("NOT IMPLEMENTED:"
         "pa_xrealloc"
         "\n");
}


x86 assembly (clang, -O0):
<pa_xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_xrealloc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"NOT IMPLEMENTED:pa_xrealloc\0A\00"
define i32 @pa_xrealloc() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [28 x i8] c"NOT IMPLEMENTED:pa_xrealloc\00"
define i32 @pa_xrealloc() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef enum bpf_map_type { ____Placeholder_bpf_map_type } bpf_map_type;
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int bpf_create_map_in_map_node(int, char const *, int, int, int,
                               int /*<<< orphan*/, int);
int bpf_create_map_in_map(enum bpf_map_type map_type, const char *name,
                          int key_size, int inner_map_fd, int max_entries,
                          __u32 map_flags) {
  return bpf_create_map_in_map_node(map_type, name, key_size, inner_map_fd,
                                    max_entries, map_flags, -1);
}


x86 assembly (clang, -O0):
<bpf_create_map_in_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
mov    -0x20(%rbp),%r9d
movl   $0xffffffff,(%rsp)
call   1030 <bpf_create_map_in_map_node@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_create_map_in_map>:
push   %rax
movl   $0xffffffff,(%rsp)
call   1030 <bpf_create_map_in_map_node@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bpf_create_map_in_map(i32 %0, i8* %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i8* %1, i8** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i8*, i8** %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = call i32 @bpf_create_map_in_map_node(i32 %13, i8* %14, i32 %15, i32 %16, i32 %17, i32 %18, i32 -1)
ret i32 %19
}

LLVM IR (-O2):
define i32 @bpf_create_map_in_map(i32 %0, i8* %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 @bpf_create_map_in_map_node(i32 %0, i8* %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 -1)
ret i32 %7
}
struct rsn_pmksa_cache *
pmksa_cache_init(void (*free_cb)(struct rsn_pmksa_cache_entry *entry, void *ctx,
                                 int replace),
                 void *ctx, struct wpa_sm *sm) {
  return (void *)-1;
}


x86 assembly (clang, -O0):
<pmksa_cache_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmksa_cache_init>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
%struct.rsn_pmksa_cache = type opaque
%struct.rsn_pmksa_cache_entry = type opaque
%struct.wpa_sm = type opaque
define %struct.rsn_pmksa_cache* @pmksa_cache_init(void (%struct.rsn_pmksa_cache_entry*, i8*, i32)* %0, i8* %1, %struct.wpa_sm* %2) {
%4 = alloca void (%struct.rsn_pmksa_cache_entry*, i8*, i32)*
%5 = alloca i8*
%6 = alloca %struct.wpa_sm*
store void (%struct.rsn_pmksa_cache_entry*, i8*, i32)* %0, void (%struct.rsn_pmksa_cache_entry*, i8*, i32)** %4
store i8* %1, i8** %5
store %struct.wpa_sm* %2, %struct.wpa_sm** %6
ret %struct.rsn_pmksa_cache* inttoptr (i64 -1 to %struct.rsn_pmksa_cache*)
}

LLVM IR (-O2):
%struct.rsn_pmksa_cache = type opaque
%struct.rsn_pmksa_cache_entry = type opaque
%struct.wpa_sm = type opaque
define %struct.rsn_pmksa_cache* @pmksa_cache_init(void (%struct.rsn_pmksa_cache_entry*, i8*, i32)* nocapture readnone %0, i8* nocapture readnone %1, %struct.wpa_sm* nocapture readnone %2) {
ret %struct.rsn_pmksa_cache* inttoptr (i64 -1 to %struct.rsn_pmksa_cache*)
}
/* Variables and functions */
int /*<<< orphan*/ HibernateWriteComplete();
void HibernateRTCMatch0Set(unsigned long ulMatch) {
  (*((volatile unsigned long *)(0x400FC004))) = ulMatch;
  HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateRTCMatch0Set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x400fc004,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCMatch0Set>:
mov    %rdi,0x400fc004
40
xor    %eax,%eax
jmp    1030 <HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateRTCMatch0Set(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
store volatile i64 %3, i64* inttoptr (i64 1074774020 to i64*)
%4 = call i32 (...) @HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateRTCMatch0Set(i64 %0) {
store volatile i64 %0, i64* inttoptr (i64 1074774020 to i64*)
%2 = tail call i32 (...) @HibernateWriteComplete()
ret void
}
int test_imm_45uint8_reg(unsigned char val) {
  return ((val) & (0x45 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_45uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x45,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_45uint8_reg>:
test   $0x45,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_45uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 69
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_45uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 69
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int output_frames_src_48_to_16_total(int input_frames) {
  if ((input_frames % 3) != 0)
    return -1;
  return input_frames / 3;
}


x86 assembly (clang, -O0):
<output_frames_src_48_to_16_total>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1127 <output_frames_src_48_to_16_total+0x27>
movl   $0xffffffff,-0x4(%rbp)
jmp    1135 <output_frames_src_48_to_16_total+0x35>
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_frames_src_48_to_16_total>:
imul   $0xaaaaaaab,%edi,%ecx
add    $0x2aaaaaaa,%ecx
mov    $0xffffffff,%eax
cmp    $0x55555554,%ecx
jbe    111a <output_frames_src_48_to_16_total+0x1a>
ret
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @output_frames_src_48_to_16_total(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sdiv i32 %9, 3
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @output_frames_src_48_to_16_total(i32 %0) {
%2 = srem i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = sdiv i32 %0, 3
%5 = select i1 %3, i32 %4, i32 -1
ret i32 %5
}
char *skip_digits(char *text) {
  char *current = text;
  while ('0' <= *current && *current <= '9')
    current++;
  return current;
}


x86 assembly (clang, -O0):
<skip_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
jg     1139 <skip_digits+0x39>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1149 <skip_digits+0x49>
jmp    115a <skip_digits+0x5a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <skip_digits+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_digits>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
add    $0xd0,%cl
cmp    $0xa,%cl
jb     1110 <skip_digits+0x10>
ret

LLVM IR (-O0):
define i8* @skip_digits(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp sle i32 48, %8
br i1 %9, label %10, label %15
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp sle i32 %13, 57
br label %15
15: ; preds = %10, %5
%16 = phi i1 [ false, %5 ], [ %14, %10 ]
br i1 %16, label %17, label %20
17: ; preds = %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %5
20: ; preds = %15
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @skip_digits(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = add i8 %4, -48
%6 = icmp ult i8 %5, 10
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %2, label %8
8: ; preds = %2
ret i8* %3
}
/* Variables and functions */
double exp(double);
double fo_eq46(double r, double a, double b, double c) {
  double t1 = exp(-a * r + b);
  double t2 = t1 * t1;
  return c * t1 / (1.0 + t2);
}


x86 assembly (clang, -O0):
<fo_eq46>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
mulsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x20(%rbp),%xmm0
mulsd  -0x28(%rbp),%xmm0
movsd  0xe7b(%rip),%xmm1
addsd  -0x30(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fo_eq46>:
push   %rax
movsd  %xmm3,(%rsp)
mulsd  %xmm1,%xmm0
subsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
call   1030 <exp@plt>
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  (%rsp),%xmm0
addsd  0xec4(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @fo_eq46(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%11 = load double, double* %6
%12 = fneg double %11
%13 = load double, double* %5
%14 = load double, double* %7
%15 = call double @llvm.fmuladd.f64(double %12, double %13, double %14)
%16 = call double @exp(double %15)
store double %16, double* %9
%17 = load double, double* %9
%18 = load double, double* %9
%19 = fmul double %17, %18
store double %19, double* %10
%20 = load double, double* %8
%21 = load double, double* %9
%22 = fmul double %20, %21
%23 = load double, double* %10
%24 = fadd double 1.000000e+00, %23
%25 = fdiv double %22, %24
ret double %25
}

LLVM IR (-O2):
define double @fo_eq46(double %0, double %1, double %2, double %3) {
%5 = fneg double %1
%6 = tail call double @llvm.fmuladd.f64(double %5, double %0, double %2)
%7 = tail call double @exp(double %6)
%8 = fmul double %7, %7
%9 = fmul double %7, %3
%10 = fadd double %8, 1.000000e+00
%11 = fdiv double %9, %10
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xe3() {
  Assert_real((isdigit(227) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              1140, ("isdigit should be 0 for 0xe3"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xe3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe3,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x474,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xe3>:
push   %rax
mov    $0xe3,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x474,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xe3\00"
define void @t_isdigit_0xe3() {
%1 = call i64 @isdigit(i32 227)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1140, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xe3\00"
define void @t_isdigit_0xe3() {
%1 = tail call i64 @isdigit(i32 227)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1140, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void ft_putcharendl(char c) {
  write(1, &c, 1);
  write(1, "\n", 1);
  return;
}


x86 assembly (clang, -O0):
<ft_putcharendl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
mov    $0x1,%edx
lea    0xec6(%rip),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putcharendl>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
lea    0xecf(%rip),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
pop    %rax
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @ft_putcharendl(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 1, i8* %2, i32 1)
%4 = call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @ft_putcharendl(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 1, i8* %2, i32 1)
%4 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
int bitmap_test_bit(int nr, const unsigned long *maskp) {
  return (maskp[((nr) / (8 * sizeof(long)))] &
          (1UL << ((nr) % (8 * sizeof(long))))) != 0;
}


x86 assembly (clang, -O0):
<bitmap_test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
shr    $0x6,%rcx
mov    (%rax,%rcx,8),%rax
movslq -0x4(%rbp),%rcx
and    $0x3f,%rcx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_test_bit>:
movslq %edi,%rcx
mov    %rcx,%rax
shr    $0x6,%rax
mov    (%rsi,%rax,8),%rdx
xor    %eax,%eax
bt     %rcx,%rdx
setb   %al
ret

LLVM IR (-O0):
define i32 @bitmap_test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = udiv i64 %7, 64
%9 = getelementptr inbounds i64, i64* %5, i64 %8
%10 = load i64, i64* %9
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = urem i64 %12, 64
%14 = shl i64 1, %13
%15 = and i64 %10, %14
%16 = icmp ne i64 %15, 0
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @bitmap_test_bit(i32 %0, i64* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = lshr i64 %3, 6
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = load i64, i64* %5
%7 = and i64 %3, 63
%8 = shl nuw i64 1, %7
%9 = and i64 %6, %8
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
char gridChar(int i) {
  switch (i) {
  case -1:
    return 'O';
  case 0:
    return ' ';
  case 1:
    return 'X';
  }
}


x86 assembly (clang, -O0):
<gridChar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0xffffffff,%eax
je     113c <gridChar+0x3c>
jmp    111b <gridChar+0x1b>
mov    -0xc(%rbp),%eax
test   %eax,%eax
je     1145 <gridChar+0x45>
jmp    112b <gridChar+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
je     114e <gridChar+0x4e>
jmp    1152 <gridChar+0x52>
movb   $0x4f,-0x1(%rbp)
jmp    1152 <gridChar+0x52>
movb   $0x20,-0x1(%rbp)
jmp    1152 <gridChar+0x52>
movb   $0x58,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gridChar>:
test   %edi,%edi
mov    $0x20,%eax
mov    $0x4f,%ecx
cmove  %eax,%ecx
cmp    $0x1,%edi
mov    $0x58,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @gridChar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 -1, label %5
i32 0, label %6
i32 1, label %7
]
5: ; preds = %1
store i8 79, i8* %2
br label %8
6: ; preds = %1
store i8 32, i8* %2
br label %8
7: ; preds = %1
store i8 88, i8* %2
br label %8
8: ; preds = %5, %6, %7, %1
%9 = load i8, i8* %2
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @gridChar(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8 32, i8 79
%4 = icmp eq i32 %0, 1
%5 = select i1 %4, i8 88, i8 %3
ret i8 %5
}
/* Type definitions */
struct ebt_u_replace {
  int dummy;
};

/* Variables and functions */
int iterate_entries(struct ebt_u_replace *, int);
int ebt_check_for_references(struct ebt_u_replace *replace, int print_err) {
  if (print_err)
    return iterate_entries(replace, 1);
  else
    return iterate_entries(replace, 2);
}


x86 assembly (clang, -O0):
<ebt_check_for_references>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     113f <ebt_check_for_references+0x2f>
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1030 <iterate_entries@plt>
mov    %eax,-0x4(%rbp)
jmp    1150 <ebt_check_for_references+0x40>
mov    -0x10(%rbp),%rdi
mov    $0x2,%esi
call   1030 <iterate_entries@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ebt_check_for_references>:
cmp    $0x1,%esi
mov    $0x1,%esi
adc    $0x0,%esi
jmp    1030 <iterate_entries@plt>

LLVM IR (-O0):
%struct.ebt_u_replace = type { i32 }
define i32 @ebt_check_for_references(%struct.ebt_u_replace* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.ebt_u_replace*
%5 = alloca i32
store %struct.ebt_u_replace* %0, %struct.ebt_u_replace** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load %struct.ebt_u_replace*, %struct.ebt_u_replace** %4
%10 = call i32 @iterate_entries(%struct.ebt_u_replace* %9, i32 1)
store i32 %10, i32* %3
br label %14
11: ; preds = %2
%12 = load %struct.ebt_u_replace*, %struct.ebt_u_replace** %4
%13 = call i32 @iterate_entries(%struct.ebt_u_replace* %12, i32 2)
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.ebt_u_replace = type { i32 }
define i32 @ebt_check_for_references(%struct.ebt_u_replace* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i32 2, i32 1
%5 = tail call i32 @iterate_entries(%struct.ebt_u_replace* %0, i32 %4)
ret i32 %5
}
/* Variables and functions */
int getValue(int);
int /*<<< orphan*/ printf(char *, ...);
void generate(int l, int s) {
  int idx;
  for (idx = 0; idx < l; idx++) {
    printf("%c", getValue(s));
  }
  printf("\n");
  return;
}


x86 assembly (clang, -O0):
<generate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1167 <generate+0x47>
mov    -0x8(%rbp),%edi
call   1040 <getValue@plt>
mov    %eax,%esi
lea    0xeae(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1135 <generate+0x15>
lea    0xe95(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    1143 <generate+0x23>
mov    %esi,%ebx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1040 <getValue@plt>
mov    %eax,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebp
jne    1130 <generate+0x10>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @generate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i32, i32* %4
%12 = call i32 @getValue(i32 %11)
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %10
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
store i32 %16, i32* %5
br label %6
17: ; preds = %6
%18 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @generate(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i32 [ %8, %4 ], [ 0, %2 ]
%6 = tail call i32 @getValue(i32 %1)
%7 = tail call i32 @putchar(i32 %6)
%8 = add nuw nsw i32 %5, 1
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %4
10: ; preds = %4, %2
%11 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_cmd(char *);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  int i;
  for (i = 1; i < argc; i++)
    do_cmd(argv[i]);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1168 <main+0x48>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <do_cmd@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%edi
jl     1152 <main+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14,%rbx,8),%rdi
call   1030 <do_cmd@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <main+0x20>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %18, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @do_cmd(i8* %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %7
21: ; preds = %7
%22 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @do_cmd(i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @exit(i32 0)
unreachable
}