xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ LOG_WARNING;
int /*<<< orphan*/ vsyslog(int /*<<< orphan*/, char const *,
                           int /*<<< orphan*/);
void logger(void *dummy, bool error, const char *fmt, va_list ap) {
  (void)dummy;
  vsyslog(error ? LOG_ERR : LOG_WARNING, fmt, ap);
}


x86 assembly (clang, -O0):
<logger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1141 <logger+0x31>
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
jmp    114d <logger+0x3d>
mov    0x2ea0(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <vsyslog@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logger>:
test   %esi,%esi
jne    111d <logger+0xd>
mov    0x2ecd(%rip),%rax
jmp    1124 <logger+0x14>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1030 <vsyslog@plt>

LLVM IR (-O0):
@LOG_ERR = global i32 0
@LOG_WARNING = global i32 0
define void @logger(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = load i32, i32* @LOG_ERR
br label %16
14: ; preds = %4
%15 = load i32, i32* @LOG_WARNING
br label %16
16: ; preds = %14, %12
%17 = phi i32 [ %13, %12 ], [ %15, %14 ]
%18 = load i8*, i8** %7
%19 = load i32, i32* %8
%20 = call i32 @vsyslog(i32 %17, i8* %18, i32 %19)
ret void
}

LLVM IR (-O2):
@LOG_ERR = global i32 0
@LOG_WARNING = global i32 0
define void @logger(i8* nocapture readnone %0, i32 %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %1, 0
%6 = load i32, i32* @LOG_ERR
%7 = load i32, i32* @LOG_WARNING
%8 = select i1 %5, i32 %7, i32 %6
%9 = tail call i32 @vsyslog(i32 %8, i8* %2, i32 %3)
ret void
}
int compare(x, y)
unsigned int x;
unsigned int y;
{
  if (x == y)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1122 <compare+0x22>
movl   $0x0,-0x4(%rbp)
jmp    1129 <compare+0x29>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @compare(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %11
10: ; preds = %2
store i32 1, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @compare(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int f14(int count) {
  int index, nextLineIndex;
  for (index = 0; index < count; index = nextLineIndex + 1) {
    nextLineIndex = index + 1;
    continue;
  }
  return index;
}


x86 assembly (clang, -O0):
<f14>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1131 <f14+0x31>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <f14+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f14>:
xor    %eax,%eax
test   %edi,%edi
cmovg  %edi,%eax
add    $0x1,%eax
and    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @f14(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %4
br label %12
12: ; preds = %9
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @f14(i32 %0) {
%2 = call i32 @llvm.smax.i32(i32 %0, i32 0)
%3 = add nuw i32 %2, 1
%4 = and i32 %3, -2
ret i32 %4
}
/* Variables and functions */
int atoi(char const *);
char *om_battery_energy_path();
char *om_sysfs_readfile(char const *);
int om_battery_energy_get() {
  const char *path = om_battery_energy_path();
  if (path == NULL)
    return -1;
  const char *val = om_sysfs_readfile(path);
  if (val == NULL)
    return -1;
  return atoi(val);
}


x86 assembly (clang, -O0):
<om_battery_energy_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1040 <om_battery_energy_path@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115a <om_battery_energy_get+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    118a <om_battery_energy_get+0x5a>
mov    -0x10(%rbp),%rdi
call   1030 <om_sysfs_readfile@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    117e <om_battery_energy_get+0x4e>
movl   $0xffffffff,-0x4(%rbp)
jmp    118a <om_battery_energy_get+0x5a>
mov    -0x18(%rbp),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<om_battery_energy_get>:
push   %rax
xor    %eax,%eax
call   1040 <om_battery_energy_path@plt>
test   %rax,%rax
je     1153 <om_battery_energy_get+0x23>
mov    %rax,%rdi
call   1030 <om_sysfs_readfile@plt>
test   %rax,%rax
je     1153 <om_battery_energy_get+0x23>
mov    %rax,%rdi
pop    %rax
jmp    1050 <atoi@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @om_battery_energy_get() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = call i8* (...) @om_battery_energy_path()
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 -1, i32* %1
br label %17
8: ; preds = %0
%9 = load i8*, i8** %2
%10 = call i8* @om_sysfs_readfile(i8* %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 -1, i32* %1
br label %17
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = call i32 @atoi(i8* %15)
store i32 %16, i32* %1
br label %17
17: ; preds = %14, %13, %7
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @om_battery_energy_get() {
%1 = tail call i8* (...) @om_battery_energy_path()
%2 = icmp eq i8* %1, null
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = tail call i8* @om_sysfs_readfile(i8* %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @atoi(i8* %4)
br label %8
8: ; preds = %6, %3, %0
%9 = phi i32 [ -1, %0 ], [ %7, %6 ], [ -1, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ bar(char *);
int /*<<< orphan*/ foo();
int main(void) {
  bar("This string definitely is too long, sorry!");
  foo();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <bar@plt>
mov    $0x0,%al
call   1040 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <bar@plt>
xor    %eax,%eax
call   1040 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"This string definitely is too long, sorry!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @bar(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
@.str = [43 x i8] c"This string definitely is too long, sorry!\00"
define i32 @main() {
%1 = tail call i32 @bar(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @foo()
ret i32 0
}
/* Type definitions */
struct hashMap {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *getWord(int /*<<< orphan*/ *);
int /*<<< orphan*/ insertMap(struct hashMap *, char *, int);
void loadDictionary(FILE *file, struct hashMap *ht) {
  char *nextWord;
  nextWord = getWord(file);
  while (nextWord != NULL) {
    insertMap(ht, nextWord, 1);
    nextWord = getWord(file);
  }
}


x86 assembly (clang, -O0):
<loadDictionary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getWord@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     116c <loadDictionary+0x4c>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <insertMap@plt>
mov    -0x8(%rbp),%rdi
call   1040 <getWord@plt>
mov    %rax,-0x18(%rbp)
jmp    113d <loadDictionary+0x1d>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadDictionary>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
call   1040 <getWord@plt>
test   %rax,%rax
je     114f <loadDictionary+0x2f>
mov    %r14,%rdi
mov    %rax,%rsi
mov    $0x1,%edx
call   1030 <insertMap@plt>
mov    %rbx,%rdi
jmp    1130 <loadDictionary+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.hashMap = type { i32 }
define void @loadDictionary(i32* %0, %struct.hashMap* %1) {
%3 = alloca i32*
%4 = alloca %struct.hashMap*
%5 = alloca i8*
store i32* %0, i32** %3
store %struct.hashMap* %1, %struct.hashMap** %4
%6 = load i32*, i32** %3
%7 = call i8* @getWord(i32* %6)
store i8* %7, i8** %5
br label %8
8: ; preds = %11, %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load %struct.hashMap*, %struct.hashMap** %4
%13 = load i8*, i8** %5
%14 = call i32 @insertMap(%struct.hashMap* %12, i8* %13, i32 1)
%15 = load i32*, i32** %3
%16 = call i8* @getWord(i32* %15)
store i8* %16, i8** %5
br label %8
17: ; preds = %8
ret void
}

LLVM IR (-O2):
%struct.hashMap = type { i32 }
define void @loadDictionary(i32* %0, %struct.hashMap* %1) {
%3 = tail call i8* @getWord(i32* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %10, label %5
5: ; preds = %2, %5
%6 = phi i8* [ %8, %5 ], [ %3, %2 ]
%7 = tail call i32 @insertMap(%struct.hashMap* %1, i8* %6, i32 1)
%8 = tail call i8* @getWord(i32* %0)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %5
10: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void printarr(char *arr, int size) {
  int i;
  for (i = 0; i < size; i++) {
    printf("%d\n", arr[i]);
  }
}


x86 assembly (clang, -O0):
<printarr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <printarr+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
lea    0xebf(%rip),%rdi
movsbl (%rax,%rcx,1),%esi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printarr+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printarr>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1146 <printarr+0x36>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <printarr+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @printarr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @printarr(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
int cairo_code_draw_infamousLogoBW_get_width() { return 67; }


x86 assembly (clang, -O0):
<cairo_code_draw_infamousLogoBW_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_infamousLogoBW_get_width>:
mov    $0x43,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_infamousLogoBW_get_width() {
ret i32 67
}

LLVM IR (-O2):
define i32 @cairo_code_draw_infamousLogoBW_get_width() {
ret i32 67
}
_Bool foo(_Bool bp) { _Bool bl; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
and    $0x1,%al
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i1 @foo(i1 zeroext %0) {
%2 = alloca i1
%3 = alloca i8
%4 = alloca i8
%5 = zext i1 %0 to i8
store i8 %5, i8* %3
%6 = load i1, i1* %2
ret i1 %6
}

LLVM IR (-O2):
define zeroext i1 @foo(i1 zeroext %0) {
ret i1 undef
}
/* Variables and functions */
int Sfile_sep_make_argv(char *, char *, char *, int /*<<< orphan*/, int *,
                        char ***, int);
int Sfile_make_argv(char *progname, char *line, int *argc, char ***argv,
                    int flag) {
  return Sfile_sep_make_argv(progname, line, "", 0, argc, argv, flag);
}


x86 assembly (clang, -O0):
<Sfile_make_argv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
mov    -0x24(%rbp),%eax
lea    0xeba(%rip),%rdx
xor    %ecx,%ecx
mov    %eax,(%rsp)
call   1030 <Sfile_sep_make_argv@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sfile_make_argv>:
push   %rax
mov    %rcx,%r9
mov    %rdx,%rax
mov    %r8d,(%rsp)
lea    0xede(%rip),%rdx
xor    %ecx,%ecx
mov    %rax,%r8
call   1030 <Sfile_sep_make_argv@plt>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @Sfile_make_argv(i8* %0, i8* %1, i32* %2, i8*** %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32*
%9 = alloca i8***
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32* %2, i32** %8
store i8*** %3, i8**** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i32*, i32** %8
%14 = load i8***, i8**** %9
%15 = load i32, i32* %10
%16 = call i32 @Sfile_sep_make_argv(i8* %11, i8* %12, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 0, i32* %13, i8*** %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @Sfile_make_argv(i8* %0, i8* %1, i32* %2, i8*** %3, i32 %4) {
%6 = tail call i32 @Sfile_sep_make_argv(i8* %0, i8* %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 0, i32* %2, i8*** %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
unsigned int RAND_MAX;
unsigned int rand();
unsigned int bigrand() { return RAND_MAX * rand() + rand(); }


x86 assembly (clang, -O0):
<bigrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bigrand>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ece(%rip),%rax
mov    (%rax),%ebp
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%ebx
imul   %ebp,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
add    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @bigrand() {
%1 = load i32, i32* @RAND_MAX
%2 = call i32 (...) @rand()
%3 = mul i32 %1, %2
%4 = call i32 (...) @rand()
%5 = add i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @bigrand() {
%1 = load i32, i32* @RAND_MAX
%2 = tail call i32 (...) @rand()
%3 = mul i32 %2, %1
%4 = tail call i32 (...) @rand()
%5 = add i32 %3, %4
ret i32 %5
}
/* Type definitions */
struct statvfs {
  int dummy;
};
struct statfs {
  int dummy;
};

/* Variables and functions */
scalar_t__ __fstatfs(int, struct statfs *);
int /*<<< orphan*/ __internal_statvfs(int /*<<< orphan*/ *, struct statvfs *,
                                      struct statfs *, int);
int fstatvfs(int fd, struct statvfs *buf) {
  struct statfs fsbuf;
  if (__fstatfs(fd, &fsbuf) < 0)
    return -1;
  __internal_statvfs(NULL, buf, &fsbuf, fd);
  return 0;
}


x86 assembly (clang, -O0):
<fstatvfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1040 <__fstatfs@plt>
cmp    $0x0,%rax
jge    1151 <fstatvfs+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    116c <fstatvfs+0x4c>
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%edi
lea    -0x18(%rbp),%rdx
call   1030 <__internal_statvfs@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstatvfs>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %edi,%ebx
lea    0x8(%rsp),%rsi
call   1040 <__fstatfs@plt>
test   %rax,%rax
js     1153 <fstatvfs+0x33>
xor    %r15d,%r15d
lea    0x8(%rsp),%rdx
xor    %edi,%edi
mov    %r14,%rsi
mov    %ebx,%ecx
call   1030 <__internal_statvfs@plt>
jmp    1159 <fstatvfs+0x39>
mov    $0xffffffff,%r15d
mov    %r15d,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.statvfs = type { i32 }
%struct.statfs = type { i32 }
define i32 @fstatvfs(i32 %0, %struct.statvfs* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.statvfs*
%6 = alloca %struct.statfs
store i32 %0, i32* %4
store %struct.statvfs* %1, %struct.statvfs** %5
%7 = load i32, i32* %4
%8 = call i64 @__fstatfs(i32 %7, %struct.statfs* %6)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %15
11: ; preds = %2
%12 = load %struct.statvfs*, %struct.statvfs** %5
%13 = load i32, i32* %4
%14 = call i32 @__internal_statvfs(i32* null, %struct.statvfs* %12, %struct.statfs* %6, i32 %13)
store i32 0, i32* %3
br label %15
15: ; preds = %11, %10
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
%struct.statvfs = type { i32 }
%struct.statfs = type { i32 }
define i32 @fstatvfs(i32 %0, %struct.statvfs* %1) {
%3 = alloca %struct.statfs
%4 = bitcast %struct.statfs* %3 to i8*
%5 = call i64 @__fstatfs(i32 %0, %struct.statfs* %3)
%6 = icmp slt i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = call i32 @__internal_statvfs(i32* null, %struct.statvfs* %1, %struct.statfs* %3, i32 %0)
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ 0, %7 ], [ -1, %2 ]
ret i32 %10
}
/* Variables and functions */
int rom_present(char *);
int s3_phoenix_trio32_available(void) {
  return rom_present(L"roms/video/s3/86c732p.bin");
}


x86 assembly (clang, -O0):
<s3_phoenix_trio32_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3_phoenix_trio32_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [26 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 47, i32 56, i32 54, i32 99, i32 55, i32 51, i32 50, i32 112, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_phoenix_trio32_available() {
%1 = call i32 @rom_present(i8* bitcast ([26 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [26 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 47, i32 56, i32 54, i32 99, i32 55, i32 51, i32 50, i32 112, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_phoenix_trio32_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([26 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
float add1(float);
float add2(float n) {
  if (n < 1)
    return 1;
  return 2 + n + add1(n - 1);
}


x86 assembly (clang, -O0):
<add2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  0xedb(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1141 <add2+0x31>
movss  0xec9(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    117a <add2+0x6a>
movss  0xebb(%rip),%xmm0
addss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xea0(%rip),%xmm1
subss  %xmm1,%xmm0
call   1030 <add1@plt>
movaps %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add2>:
push   %rax
movss  0xee7(%rip),%xmm1
ucomiss %xmm0,%xmm1
ja     1146 <add2+0x36>
movss  0xede(%rip),%xmm1
addss  %xmm0,%xmm1
movss  %xmm1,0x4(%rsp)
addss  0xed0(%rip),%xmm0
call   1030 <add1@plt>
movaps %xmm0,%xmm1
addss  0x4(%rsp),%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @add2(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp olt float %4, 1.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store float 1.000000e+00, float* %2
br label %14
7: ; preds = %1
%8 = load float, float* %3
%9 = fadd float 2.000000e+00, %8
%10 = load float, float* %3
%11 = fsub float %10, 1.000000e+00
%12 = call float @add1(float %11)
%13 = fadd float %9, %12
store float %13, float* %2
br label %14
14: ; preds = %7, %6
%15 = load float, float* %2
ret float %15
}

LLVM IR (-O2):
define float @add2(float %0) {
%2 = fcmp olt float %0, 1.000000e+00
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = fadd float %0, 2.000000e+00
%5 = fadd float %0, -1.000000e+00
%6 = tail call float @add1(float %5)
%7 = fadd float %4, %6
br label %8
8: ; preds = %1, %3
%9 = phi float [ %7, %3 ], [ 1.000000e+00, %1 ]
ret float %9
}
void __kill_fasync(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<__kill_fasync>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__kill_fasync>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.__kill_fasync = [14 x i8] c"__kill_fasync\00"
define void @__kill_fasync() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.__kill_fasync, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.__kill_fasync = [14 x i8] c"__kill_fasync\00"
define void @__kill_fasync() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.__kill_fasync, i64 0, i64 0))
ret void
}
/* Variables and functions */
int integer_comp(void *key1, void *key2) {
  intptr_t a = (intptr_t)(key1);
  intptr_t b = (intptr_t)(key2);
  if (a == b) {
    return 0;
  } else if (a < b) {
    return -1;
  } else
    return 1;
}


x86 assembly (clang, -O0):
<integer_comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jne    1136 <integer_comp+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1157 <integer_comp+0x57>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jge    1150 <integer_comp+0x50>
movl   $0xffffffff,-0x4(%rbp)
jmp    1157 <integer_comp+0x57>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<integer_comp>:
xor    %ecx,%ecx
xor    %eax,%eax
cmp    %rsi,%rdi
setge  %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @integer_comp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = ptrtoint i8* %8 to i64
store i64 %9, i64* %6
%10 = load i8*, i8** %5
%11 = ptrtoint i8* %10 to i64
store i64 %11, i64* %7
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 0, i32* %3
br label %22
16: ; preds = %2
%17 = load i64, i64* %6
%18 = load i64, i64* %7
%19 = icmp slt i64 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 -1, i32* %3
br label %22
21: ; preds = %16
store i32 1, i32* %3
br label %22
22: ; preds = %21, %20, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @integer_comp(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = icmp slt i8* %0, %1
%5 = select i1 %4, i32 -1, i32 1
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ u_long;

/* Variables and functions */
int tac_connect(int /*<<< orphan*/ *, int *, int);
int tac_connect_single(u_long server, int timeout) {
  return (tac_connect(&server, &timeout, 1));
}


x86 assembly (clang, -O0):
<tac_connect_single>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1030 <tac_connect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tac_connect_single>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x1,%edx
call   1030 <tac_connect@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tac_connect_single(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @tac_connect(i32* %3, i32* %4, i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @tac_connect_single(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @tac_connect(i32* %3, i32* %4, i32 1)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int /*<<< orphan*/ S_IFCHR;
int _stat(const uint8_t *file, struct stat *st) {
  st->st_mode = S_IFCHR;
  return 0;
}


x86 assembly (clang, -O0):
<_stat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_stat>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@S_IFCHR = global i32 0
define i32 @_stat(i32* %0, %struct.stat* %1) {
%3 = alloca i32*
%4 = alloca %struct.stat*
store i32* %0, i32** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i32, i32* @S_IFCHR
%6 = load %struct.stat*, %struct.stat** %4
%7 = getelementptr inbounds %struct.stat, %struct.stat* %6, i32 0, i32 0
store i32 %5, i32* %7
ret i32 0
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@S_IFCHR = global i32 0
define i32 @_stat(i32* nocapture readnone %0, %struct.stat* nocapture writeonly %1) {
%3 = load i32, i32* @S_IFCHR
%4 = getelementptr inbounds %struct.stat, %struct.stat* %1, i64 0, i32 0
store i32 %3, i32* %4
ret i32 0
}
void PDL_Quit() { return; }


x86 assembly (clang, -O0):
<PDL_Quit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDL_Quit>:
ret

LLVM IR (-O0):
define void @PDL_Quit() {
ret void
}

LLVM IR (-O2):
define void @PDL_Quit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ islower(int);
void t_islower_0x7a() {
  Assert_real((islower(122)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              615, ("islower should be 1 for z"));
}


x86 assembly (clang, -O0):
<t_islower_0x7a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7a,%edi
call   1030 <islower@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x267,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x7a>:
push   %rax
mov    $0x7a,%edi
call   1030 <islower@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x267,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for z\00"
define void @t_islower_0x7a() {
%1 = call i32 @islower(i32 122)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 615, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for z\00"
define void @t_islower_0x7a() {
%1 = tail call i32 @islower(i32 122)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 615, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void test1_ShortClassAccessInModule_targetInit__I() {}


x86 assembly (clang, -O0):
<test1_ShortClassAccessInModule_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1_ShortClassAccessInModule_targetInit__I>:
ret

LLVM IR (-O0):
define void @test1_ShortClassAccessInModule_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test1_ShortClassAccessInModule_targetInit__I() {
ret void
}
int test_imm_8Eint16_mem(short *val) {
  return ((*val) & (0x8E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Eint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x8e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Eint16_mem>:
testb  $0x8e,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Eint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 142
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Eint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 142
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int pc8736x_gpio_set(int, int, int);
int board_hp_p2706t(void) {
  int ret;
  ret = pc8736x_gpio_set(0xE4, 0x25, 1);
  if (!ret)
    ret = pc8736x_gpio_set(0xE4, 0x26, 1);
  return ret;
}


x86 assembly (clang, -O0):
<board_hp_p2706t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xe4,%edi
mov    $0x25,%esi
mov    $0x1,%edx
call   1030 <pc8736x_gpio_set@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1150 <board_hp_p2706t+0x40>
mov    $0xe4,%edi
mov    $0x26,%esi
mov    $0x1,%edx
call   1030 <pc8736x_gpio_set@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_hp_p2706t>:
push   %rax
mov    $0xe4,%edi
mov    $0x25,%esi
mov    $0x1,%edx
call   1030 <pc8736x_gpio_set@plt>
test   %eax,%eax
je     112b <board_hp_p2706t+0x1b>
pop    %rcx
ret
mov    $0xe4,%edi
mov    $0x26,%esi
mov    $0x1,%edx
pop    %rax
jmp    1030 <pc8736x_gpio_set@plt>

LLVM IR (-O0):
define i32 @board_hp_p2706t() {
%1 = alloca i32
%2 = call i32 @pc8736x_gpio_set(i32 228, i32 37, i32 1)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %0
%6 = call i32 @pc8736x_gpio_set(i32 228, i32 38, i32 1)
store i32 %6, i32* %1
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @board_hp_p2706t() {
%1 = tail call i32 @pc8736x_gpio_set(i32 228, i32 37, i32 1)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @pc8736x_gpio_set(i32 228, i32 38, i32 1)
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %1, %0 ], [ %4, %3 ]
ret i32 %6
}
/* Type definitions */
struct statement {
  int dummy;
};

/* Variables and functions */
struct statement *stmt_void();
struct statement *stmt_break() {
  return stmt_void();
}


x86 assembly (clang, -O0):
<stmt_break>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <stmt_void@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stmt_break>:
xor    %eax,%eax
jmp    1030 <stmt_void@plt>

LLVM IR (-O0):
%struct.statement = type { i32 }
define %struct.statement* @stmt_break() {
%1 = call %struct.statement* (...) @stmt_void()
ret %struct.statement* %1
}

LLVM IR (-O2):
%struct.statement = type { i32 }
define %struct.statement* @stmt_break() {
%1 = tail call %struct.statement* (...) @stmt_void()
ret %struct.statement* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int vsnprintf(char *, int, char const *, int /*<<< orphan*/);
int write(int, char *, int);
int vwritef(int fd, const char *format, va_list vl) {
  char buffer[1024];
  int size;
  size = vsnprintf(buffer, sizeof(buffer), format, vl);
  if (size > 0)
    return write(fd, buffer, size);
  else
    return size;
}


x86 assembly (clang, -O0):
<vwritef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x430,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    -0x420(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x400,%esi
call   1030 <vsnprintf@plt>
mov    %eax,-0x424(%rbp)
cmpl   $0x0,-0x424(%rbp)
jle    117d <vwritef+0x5d>
mov    -0x8(%rbp),%edi
lea    -0x420(%rbp),%rsi
mov    -0x424(%rbp),%edx
call   1040 <write@plt>
mov    %eax,-0x4(%rbp)
jmp    1186 <vwritef+0x66>
mov    -0x424(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x430,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwritef>:
push   %rbx
sub    $0x400,%rsp
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%ebx
mov    %rsp,%rdi
mov    $0x400,%esi
call   1030 <vsnprintf@plt>
test   %eax,%eax
jle    114c <vwritef+0x2c>
mov    %rsp,%rsi
mov    %ebx,%edi
mov    %eax,%edx
call   1040 <write@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @vwritef(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca [1024 x i8]
%9 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %8, i64 0, i64 0
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = call i32 @vsnprintf(i8* %10, i32 1024, i8* %11, i32 %12)
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %3
%17 = load i32, i32* %5
%18 = getelementptr inbounds [1024 x i8], [1024 x i8]* %8, i64 0, i64 0
%19 = load i32, i32* %9
%20 = call i32 @write(i32 %17, i8* %18, i32 %19)
store i32 %20, i32* %4
br label %23
21: ; preds = %3
%22 = load i32, i32* %9
store i32 %22, i32* %4
br label %23
23: ; preds = %21, %16
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @vwritef(i32 %0, i8* nocapture %1, i32 %2) {
%4 = alloca [1024 x i8]
%5 = getelementptr inbounds [1024 x i8], [1024 x i8]* %4, i64 0, i64 0
%6 = call i32 @vsnprintf(i8* %5, i32 1024, i8* %1, i32 %2)
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = call i32 @write(i32 %0, i8* %5, i32 %6)
br label %10
10: ; preds = %3, %8
%11 = phi i32 [ %9, %8 ], [ %6, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x16() {
  Assert_real((isascii(22)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              115, ("isascii should be 1 for 0x16"));
}


x86 assembly (clang, -O0):
<t_isascii_0x16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x73,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x16>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x73,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 1 for 0x16\00"
define void @t_isascii_0x16() {
%1 = call i32 @isascii(i32 22)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 1 for 0x16\00"
define void @t_isascii_0x16() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int main(void) {
  for (int counter = 0; counter < 5; counter++) {
    int a;
    a++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1133 <main+0x33>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %10, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void f(void) {
  int a[100], b[100], c[100];
  int i;
#pragma hlt fusion
  {
    for (i = 0; i < 100; i++) {
      a[i] = 0;
    }
    c[3] = 4;
    for (i = 0; i < 100; i++) {
      b[i] = 0;
    }
  }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x440,%rsp
movl   $0x0,-0x4b4(%rbp)
cmpl   $0x64,-0x4b4(%rbp)
jge    1148 <f+0x48>
movslq -0x4b4(%rbp),%rax
movl   $0x0,-0x190(%rbp,%rax,4)
mov    -0x4b4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4b4(%rbp)
jmp    1115 <f+0x15>
movl   $0x4,-0x4a4(%rbp)
movl   $0x0,-0x4b4(%rbp)
cmpl   $0x64,-0x4b4(%rbp)
jge    118f <f+0x8f>
movslq -0x4b4(%rbp),%rax
movl   $0x0,-0x320(%rbp,%rax,4)
mov    -0x4b4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4b4(%rbp)
jmp    115c <f+0x5c>
add    $0x440,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f() {
%1 = alloca [100 x i32]
%2 = alloca [100 x i32]
%3 = alloca [100 x i32]
%4 = alloca i32
store i32 0, i32* %4
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 100
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [100 x i32], [100 x i32]* %1, i64 0, i64 %10
store i32 0, i32* %11
br label %12
12: ; preds = %8
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %5
15: ; preds = %5
%16 = getelementptr inbounds [100 x i32], [100 x i32]* %3, i64 0, i64 3
store i32 4, i32* %16
store i32 0, i32* %4
br label %17
17: ; preds = %24, %15
%18 = load i32, i32* %4
%19 = icmp slt i32 %18, 100
br i1 %19, label %20, label %27
20: ; preds = %17
%21 = load i32, i32* %4
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds [100 x i32], [100 x i32]* %2, i64 0, i64 %22
store i32 0, i32* %23
br label %24
24: ; preds = %20
%25 = load i32, i32* %4
%26 = add nsw i32 %25, 1
store i32 %26, i32* %4
br label %17
27: ; preds = %17
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
int r(x)
int x;
{ return (rand() / 256) % x; }


x86 assembly (clang, -O0):
<r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x100,%ecx
cltd
idiv   %ecx
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
lea    0xff(%rax),%ecx
test   %eax,%eax
cmovs  %ecx,%eax
sar    $0x8,%eax
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @r(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = sdiv i32 %3, 256
%5 = load i32, i32* %2
%6 = srem i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @r(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = sdiv i32 %2, 256
%4 = srem i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ serial_config();
int /*<<< orphan*/ serial_init();
extern void gps_init(void) {
  serial_init();
  serial_config();
}


x86 assembly (clang, -O0):
<gps_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <serial_init@plt>
mov    $0x0,%al
call   1030 <serial_config@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gps_init>:
push   %rax
xor    %eax,%eax
call   1040 <serial_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <serial_config@plt>

LLVM IR (-O0):
define void @gps_init() {
%1 = call i32 (...) @serial_init()
%2 = call i32 (...) @serial_config()
ret void
}

LLVM IR (-O2):
define void @gps_init() {
%1 = tail call i32 (...) @serial_init()
%2 = tail call i32 (...) @serial_config()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ luaL_check_number(int);
int /*<<< orphan*/ lua_pushnumber(int /*<<< orphan*/);
int /*<<< orphan*/ pow(int /*<<< orphan*/, int /*<<< orphan*/);
void math_pow(void) {
  lua_pushnumber(pow(luaL_check_number(1), luaL_check_number(2)));
}


x86 assembly (clang, -O0):
<math_pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <luaL_check_number@plt>
mov    %eax,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <luaL_check_number@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
call   1050 <pow@plt>
mov    %eax,%edi
call   1040 <lua_pushnumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_pow>:
push   %rbx
mov    $0x1,%edi
call   1030 <luaL_check_number@plt>
mov    %eax,%ebx
mov    $0x2,%edi
call   1030 <luaL_check_number@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1050 <pow@plt>
mov    %eax,%edi
pop    %rbx
jmp    1040 <lua_pushnumber@plt>

LLVM IR (-O0):
define void @math_pow() {
%1 = call i32 @luaL_check_number(i32 1)
%2 = call i32 @luaL_check_number(i32 2)
%3 = call i32 @pow(i32 %1, i32 %2)
%4 = call i32 @lua_pushnumber(i32 %3)
ret void
}

LLVM IR (-O2):
define void @math_pow() {
%1 = tail call i32 @luaL_check_number(i32 1)
%2 = tail call i32 @luaL_check_number(i32 2)
%3 = tail call i32 @pow(i32 %1, i32 %2)
%4 = tail call i32 @lua_pushnumber(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _SUB_BDP_WRITE(char const *, int);
void bdp_write(const char *data, int size) { _SUB_BDP_WRITE(data, size); }


x86 assembly (clang, -O0):
<bdp_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_SUB_BDP_WRITE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bdp_write>:
jmp    1030 <_SUB_BDP_WRITE@plt>

LLVM IR (-O0):
define void @bdp_write(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @_SUB_BDP_WRITE(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @bdp_write(i8* %0, i32 %1) {
%3 = tail call i32 @_SUB_BDP_WRITE(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
#define EACCES 131
#define EINVAL 130
#define ENOENT 129
#define ENOSPC 128
int EPERM;
int errno;
void assignSemgetError() {
  switch (errno) {
  case EACCES:
    errno = EPERM;
    break;
  case EINVAL:
    break;
  case ENOENT:
    errno = EINVAL;
    break;
  case ENOSPC:
    break;
  default:
    break;
  }
}


x86 assembly (clang, -O0):
<assignSemgetError>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
add    $0xffffff80,%eax
mov    %eax,%ecx
mov    %rcx,-0x8(%rbp)
sub    $0x3,%eax
ja     1166 <assignSemgetError+0x66>
mov    -0x8(%rbp),%rax
lea    0xed6(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    0x2e96(%rip),%rax
mov    (%rax),%ecx
mov    0x2e9d(%rip),%rax
mov    %ecx,(%rax)
jmp    116b <assignSemgetError+0x6b>
jmp    116b <assignSemgetError+0x6b>
mov    0x2e8a(%rip),%rax
movl   $0x82,(%rax)
jmp    116b <assignSemgetError+0x6b>
jmp    116b <assignSemgetError+0x6b>
jmp    116b <assignSemgetError+0x6b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<assignSemgetError>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
cmp    $0x81,%ecx
je     1124 <assignSemgetError+0x24>
cmp    $0x83,%ecx
jne    112b <assignSemgetError+0x2b>
mov    0x2eb0(%rip),%rcx
mov    (%rcx),%ecx
jmp    1129 <assignSemgetError+0x29>
mov    $0x82,%ecx
mov    %ecx,(%rax)
ret

LLVM IR (-O0):
@errno = global i32 0
@EPERM = global i32 0
define void @assignSemgetError() {
%1 = load i32, i32* @errno
switch i32 %1, label %7 [
i32 131, label %2
i32 130, label %4
i32 129, label %5
i32 128, label %6
]
2: ; preds = %0
%3 = load i32, i32* @EPERM
store i32 %3, i32* @errno
br label %8
4: ; preds = %0
br label %8
5: ; preds = %0
store i32 130, i32* @errno
br label %8
6: ; preds = %0
br label %8
7: ; preds = %0
br label %8
8: ; preds = %7, %6, %5, %4, %2
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@EPERM = global i32 0
define void @assignSemgetError() {
%1 = load i32, i32* @errno
switch i32 %1, label %6 [
i32 131, label %2
i32 129, label %4
]
2: ; preds = %0
%3 = load i32, i32* @EPERM
br label %4
4: ; preds = %0, %2
%5 = phi i32 [ %3, %2 ], [ 130, %0 ]
store i32 %5, i32* @errno
br label %6
6: ; preds = %4, %0
ret void
}
int isnum(int c) {
  if (c >= 48 && c <= 57)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     1127 <isnum+0x27>
cmpl   $0x39,-0x8(%rbp)
jg     1127 <isnum+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <isnum+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnum>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @isnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}