xunge/DecIR huggingface dataset:
/* Variables and functions */
char *str_alloc_debug(scalar_t__, char const *, int);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *str_dup_debug(const char *str, const char *file, int line) {
  char *retval;
  retval = str_alloc_debug(strlen(str) + 1, file, line);
  strcpy(retval, str);
  return retval;
}


x86 assembly (clang, -O0):
<str_dup_debug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <str_alloc_debug@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_dup_debug>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1050 <str_alloc_debug@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %rbp,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @str_dup_debug(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %9, 1
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i8* @str_alloc_debug(i64 %10, i8* %11, i32 %12)
store i8* %13, i8** %7
%14 = load i8*, i8** %7
%15 = load i8*, i8** %4
%16 = call i32 @strcpy(i8* %14, i8* %15)
%17 = load i8*, i8** %7
ret i8* %17
}

LLVM IR (-O2):
define i8* @str_dup_debug(i8* %0, i8* %1, i32 %2) {
%4 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @str_alloc_debug(i64 %5, i8* %1, i32 %2)
%7 = tail call i32 @strcpy(i8* %6, i8* %0)
ret i8* %6
}
void MPI_Finalize() {}


x86 assembly (clang, -O0):
<MPI_Finalize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPI_Finalize>:
ret

LLVM IR (-O0):
define void @MPI_Finalize() {
ret void
}

LLVM IR (-O2):
define void @MPI_Finalize() {
ret void
}
int X_mq_unlink(const char *mq_name) {
  ((void)mq_name);
  return 0;
}


x86 assembly (clang, -O0):
<X_mq_unlink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<X_mq_unlink>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @X_mq_unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @X_mq_unlink(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int f55(int *);
int f56(int *p) { return f55(p); }


x86 assembly (clang, -O0):
<f56>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f55@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f56>:
jmp    1030 <f55@plt>

LLVM IR (-O0):
define i32 @f56(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f55(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f56(i32* %0) {
%2 = tail call i32 @f55(i32* %0)
ret i32 %2
}
int netx_packet_recvd(char *buf) { return -1; }


x86 assembly (clang, -O0):
<netx_packet_recvd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<netx_packet_recvd>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @netx_packet_recvd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @netx_packet_recvd(i8* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int System_out_println(int i) {
  printf("%d\n", i);
  return 0;
}


x86 assembly (clang, -O0):
<System_out_println>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<System_out_println>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @System_out_println(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @System_out_println(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 0
}
float prv_process_fpa_rsub_real32(float a, float b) { return b - a; }


x86 assembly (clang, -O0):
<prv_process_fpa_rsub_real32>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_process_fpa_rsub_real32>:
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @prv_process_fpa_rsub_real32(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float, float* %3
%7 = fsub float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @prv_process_fpa_rsub_real32(float %0, float %1) {
%3 = fsub float %1, %0
ret float %3
}
void gl2psPrintGzipHeader() {}


x86 assembly (clang, -O0):
<gl2psPrintGzipHeader>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl2psPrintGzipHeader>:
ret

LLVM IR (-O0):
define void @gl2psPrintGzipHeader() {
ret void
}

LLVM IR (-O2):
define void @gl2psPrintGzipHeader() {
ret void
}
/* Variables and functions */
void *memmove(void *, void const *, size_t);
void *memcpy(void *dst, const void *src, size_t n) {
  return memmove(dst, src, n);
}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memmove@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define i8* @memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @memcpy(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %2, i1 false)
ret i8* %0
}
/* Variables and functions */
memcp(char *data, char *target, size_t size) {}


x86 assembly (clang, -O0):
<memcp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcp>:
ret

LLVM IR (-O0):
define i32 @memcp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @memcp(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2) {
ret i32 undef
}
int test_imm_2Eint32_reg(int val) { return ((val) & (0x2E << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_2Eint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x2e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Eint32_reg>:
test   $0x2e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Eint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 46
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_2Eint32_reg(i32 %0) {
%2 = and i32 %0, 46
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void cpuhvfs_dump_dvfsp_info(void) {}


x86 assembly (clang, -O0):
<cpuhvfs_dump_dvfsp_info>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuhvfs_dump_dvfsp_info>:
ret

LLVM IR (-O0):
define void @cpuhvfs_dump_dvfsp_info() {
ret void
}

LLVM IR (-O2):
define void @cpuhvfs_dump_dvfsp_info() {
ret void
}
extern int bar(void) { return -1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @bar() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @bar() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ Hello();
int strtol(char *, int /*<<< orphan*/ *, int);
int main(int argc, char *argv[]) {
  int thread_count = strtol(argv[1], NULL, 10);
#pragma omp parallel num_threads(thread_count)
  Hello();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <Hello@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <strtol@plt>
xor    %eax,%eax
call   1040 <Hello@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i32 @strtol(i8* %9, i32* null, i32 10)
store i32 %10, i32* %6
%11 = call i32 (...) @Hello()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @strtol(i8* nocapture %4, i32* null, i32 10)
%6 = tail call i32 (...) @Hello()
ret i32 0
}
/* Variables and functions */
char *GetEnvVar(char const *);
int atoi(char const *);
int IsEnvVarInt(const char *name, int i) {
  const char *s = GetEnvVar(name);
  return s && atoi(s) == i;
}


x86 assembly (clang, -O0):
<IsEnvVarInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetEnvVar@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x18(%rbp)
mov    %al,-0x19(%rbp)
je     115e <IsEnvVarInt+0x3e>
mov    -0x18(%rbp),%rdi
call   1040 <atoi@plt>
cmp    -0xc(%rbp),%eax
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsEnvVarInt>:
push   %rbx
mov    %esi,%ebx
call   1030 <GetEnvVar@plt>
test   %rax,%rax
je     1140 <IsEnvVarInt+0x20>
mov    %rax,%rdi
call   1040 <atoi@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    %ebx,%ecx
sete   %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @IsEnvVarInt(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i8* @GetEnvVar(i8* %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i8*, i8** %5
%12 = call i32 @atoi(i8* %11)
%13 = load i32, i32* %4
%14 = icmp eq i32 %12, %13
br label %15
15: ; preds = %10, %2
%16 = phi i1 [ false, %2 ], [ %14, %10 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @IsEnvVarInt(i8* %0, i32 %1) {
%3 = tail call i8* @GetEnvVar(i8* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @atoi(i8* %3)
%7 = icmp eq i32 %6, %1
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 0, %2 ], [ %8, %5 ]
ret i32 %10
}
/* Variables and functions */
char *strchr(char const *, int const);
int gotchar(const int asearch, const char *astring) {
  char *e = strchr(astring, asearch);
  return e ? (int)(e - astring) : -1;
}


x86 assembly (clang, -O0):
<gotchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114d <gotchar+0x3d>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x1c(%rbp)
jmp    115a <gotchar+0x4a>
mov    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
jmp    115a <gotchar+0x4a>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gotchar>:
push   %rbx
mov    %rsi,%rbx
mov    %edi,%esi
mov    %rbx,%rdi
call   1030 <strchr@plt>
mov    %eax,%ecx
sub    %ebx,%ecx
cmp    $0x1,%rax
sbb    %eax,%eax
or     %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @gotchar(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = load i32, i32* %3
%8 = call i8* @strchr(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = load i8*, i8** %4
%14 = ptrtoint i8* %12 to i64
%15 = ptrtoint i8* %13 to i64
%16 = sub i64 %14, %15
%17 = trunc i64 %16 to i32
br label %19
18: ; preds = %2
br label %19
19: ; preds = %18, %11
%20 = phi i32 [ %17, %11 ], [ -1, %18 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @gotchar(i32 %0, i8* %1) {
%3 = tail call i8* @strchr(i8* dereferenceable(1) %1, i32 %0)
%4 = icmp eq i8* %3, null
%5 = ptrtoint i8* %3 to i64
%6 = ptrtoint i8* %1 to i64
%7 = sub i64 %5, %6
%8 = trunc i64 %7 to i32
%9 = select i1 %4, i32 -1, i32 %8
ret i32 %9
}
int fun777() { return 777; }


x86 assembly (clang, -O0):
<fun777>:
push   %rbp
mov    %rsp,%rbp
mov    $0x309,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun777>:
mov    $0x309,%eax
ret

LLVM IR (-O0):
define i32 @fun777() {
ret i32 777
}

LLVM IR (-O2):
define i32 @fun777() {
ret i32 777
}
/* Variables and functions */
bool CMP(int const *lhs, int rhs) {
  return (lhs != 0 && *lhs == rhs) || (lhs == 0 && rhs == -1);
}


x86 assembly (clang, -O0):
<CMP>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     112a <CMP+0x2a>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    $0x1,%al
cmp    -0xc(%rbp),%ecx
mov    %al,-0xd(%rbp)
je     114a <CMP+0x4a>
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0xe(%rbp)
jne    1144 <CMP+0x44>
cmpl   $0xffffffff,-0xc(%rbp)
sete   %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMP>:
test   %rdi,%rdi
je     110e <CMP+0xe>
mov    $0x1,%eax
cmp    %esi,(%rdi)
je     111f <CMP+0x1f>
test   %rdi,%rdi
sete   %al
cmp    $0xffffffff,%esi
sete   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @CMP(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = load i32, i32* %4
%11 = icmp eq i32 %9, %10
br i1 %11, label %20, label %12
12: ; preds = %7, %2
%13 = load i32*, i32** %3
%14 = icmp eq i32* %13, null
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %4
%17 = icmp eq i32 %16, -1
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %7
%21 = phi i1 [ true, %7 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @CMP(i32* %0, i32 %1) {
%3 = icmp eq i32* %0, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i32, i32* %0
%6 = icmp eq i32 %5, %1
br i1 %6, label %11, label %7
7: ; preds = %4, %2
%8 = icmp eq i32 %1, -1
%9 = and i1 %3, %8
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4
%12 = phi i32 [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
unsigned int hash_code(const char *s) {
  unsigned int hash_val;
  for (hash_val = 0U; *s != '\0'; s++) {
    hash_val = *s + 31 * hash_val;
  }
  return (hash_val % 101);
}


x86 assembly (clang, -O0):
<hash_code>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1140 <hash_code+0x40>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
imul   $0x1f,-0xc(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <hash_code+0xf>
mov    -0xc(%rbp),%eax
mov    $0x65,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_code>:
mov    (%rdi),%cl
test   %cl,%cl
je     1147 <hash_code+0x47>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
mov    %eax,%edx
shl    $0x5,%edx
sub    %eax,%edx
mov    %edx,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash_code+0x10>
mov    %eax,%ecx
imul   $0x446f8657,%rcx,%rcx
shr    $0x20,%rcx
mov    %eax,%edx
sub    %ecx,%edx
shr    %edx
add    %ecx,%edx
shr    $0x6,%edx
imul   $0x65,%edx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash_code(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = load i32, i32* %3
%14 = mul i32 31, %13
%15 = add i32 %12, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %9
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
%21 = urem i32 %20, 101
ret i32 %21
}

LLVM IR (-O2):
define i32 @hash_code(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = mul i32 %6, 31
%10 = add i32 %9, %8
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = urem i32 %10, 101
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
void *kasan_init_slab_obj(struct kmem_cache *cache, const void *object) {
  return (void *)object;
}


x86 assembly (clang, -O0):
<kasan_init_slab_obj>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kasan_init_slab_obj>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
%struct.kmem_cache = type opaque
define i8* @kasan_init_slab_obj(%struct.kmem_cache* %0, i8* %1) {
%3 = alloca %struct.kmem_cache*
%4 = alloca i8*
store %struct.kmem_cache* %0, %struct.kmem_cache** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
ret i8* %5
}

LLVM IR (-O2):
%struct.kmem_cache = type opaque
define i8* @kasan_init_slab_obj(%struct.kmem_cache* nocapture readnone %0, i8* readnone returned %1) {
ret i8* %1
}
double pair_tailcorr_cut_olpslater1s1s(void *pair_data, long center_index,
                                       long other_index, double rcut) {
  double t1 = 0;
  return t1;
}


x86 assembly (clang, -O0):
<pair_tailcorr_cut_olpslater1s1s>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pair_tailcorr_cut_olpslater1s1s>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @pair_tailcorr_cut_olpslater1s1s(i8* %0, i64 %1, i64 %2, double %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca double
%9 = alloca double
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store double %3, double* %8
store double 0.000000e+00, double* %9
%10 = load double, double* %9
ret double %10
}

LLVM IR (-O2):
define double @pair_tailcorr_cut_olpslater1s1s(i8* nocapture readnone %0, i64 %1, i64 %2, double %3) {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ emit_adcimm(int, int /*<<< orphan*/, int);
int /*<<< orphan*/ emit_andimm(int, int, int);
int /*<<< orphan*/ emit_asrs_imm(int, int, int);
void emit_sarsr(int t, int sr) {
  emit_andimm(sr, ~1, sr);
  emit_asrs_imm(t, 1, t);
  emit_adcimm(sr, 0, sr);
}


x86 assembly (clang, -O0):
<emit_sarsr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0xfffffffe,%esi
call   1050 <emit_andimm@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%edx
mov    $0x1,%esi
call   1040 <emit_asrs_imm@plt>
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%edx
xor    %esi,%esi
call   1030 <emit_adcimm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_sarsr>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%edi
mov    $0xfffffffe,%esi
mov    %ebx,%edx
call   1050 <emit_andimm@plt>
mov    %ebp,%edi
mov    $0x1,%esi
mov    %ebp,%edx
call   1040 <emit_asrs_imm@plt>
mov    %ebx,%edi
xor    %esi,%esi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <emit_adcimm@plt>

LLVM IR (-O0):
define void @emit_sarsr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @emit_andimm(i32 %5, i32 -2, i32 %6)
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @emit_asrs_imm(i32 %8, i32 1, i32 %9)
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = call i32 @emit_adcimm(i32 %11, i32 0, i32 %12)
ret void
}

LLVM IR (-O2):
define void @emit_sarsr(i32 %0, i32 %1) {
%3 = tail call i32 @emit_andimm(i32 %1, i32 -2, i32 %1)
%4 = tail call i32 @emit_asrs_imm(i32 %0, i32 1, i32 %0)
%5 = tail call i32 @emit_adcimm(i32 %1, i32 0, i32 %1)
ret void
}
int history_search(string, direction)
char *string;
int direction;
{ return (history_search_internal(string, direction, 0)); }


x86 assembly (clang, -O0):
<history_search>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
mov    $0x0,%al
call   1030 <history_search_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<history_search>:
xor    %edx,%edx
xor    %eax,%eax
jmp    1030 <history_search_internal@plt>

LLVM IR (-O0):
define i32 @history_search(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @history_search_internal to i32 (i8*, i32, i32, ...)*)(i8* %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @history_search(i8* %0, i32 %1) {
%3 = tail call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @history_search_internal to i32 (i8*, i32, i32, ...)*)(i8* %0, i32 %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int INT_MIN;
int test6(int x) { return (x ^ 0x1234) - INT_MIN; }


x86 assembly (clang, -O0):
<test6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x1234,%eax
mov    0x2ed2(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test6>:
mov    %edi,%eax
xor    $0x1234,%eax
mov    0x2eda(%rip),%rcx
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @test6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, 4660
%5 = load i32, i32* @INT_MIN
%6 = sub nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @test6(i32 %0) {
%2 = xor i32 %0, 4660
%3 = load i32, i32* @INT_MIN
%4 = sub nsw i32 %2, %3
ret i32 %4
}
/* Variables and functions */
int marktab_rend_file(char *);
int main(int argc, char **argv) { return marktab_rend_file(argv[1]); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <marktab_rend_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x8(%rsi),%rdi
jmp    1030 <marktab_rend_file@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @marktab_rend_file(i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @marktab_rend_file(i8* %4)
ret i32 %5
}
int fun154() { return 154; }


x86 assembly (clang, -O0):
<fun154>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun154>:
mov    $0x9a,%eax
ret

LLVM IR (-O0):
define i32 @fun154() {
ret i32 154
}

LLVM IR (-O2):
define i32 @fun154() {
ret i32 154
}
/* Variables and functions */
double strtod(char const *, char const **);
double atof(const char *ascii) { return (strtod(ascii, (const char **)0)); }


x86 assembly (clang, -O0):
<atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <strtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atof>:
xor    %esi,%esi
jmp    1030 <strtod@plt>

LLVM IR (-O0):
define double @atof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @strtod(i8* %3, i8** null)
ret double %4
}

LLVM IR (-O2):
define double @atof(i8* nocapture %0) {
%2 = tail call double @strtod(i8* nocapture %0, i8** null)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void msg_error_undefined_decl() {
  printf("Error: there's no defined action for this declaration.\n");
}


x86 assembly (clang, -O0):
<msg_error_undefined_decl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_error_undefined_decl>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"Error: there's no defined action for this declaration.\0A\00"
define void @msg_error_undefined_decl() {
%1 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [55 x i8] c"Error: there's no defined action for this declaration.\00"
define void @msg_error_undefined_decl() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int od_pvq_size_ctx(int);
int od_pvq_k1_ctx(int n, int orig_length) {
  if (orig_length)
    return 8 + 2 * (n > 8) + (n & 1);
  else
    return od_pvq_size_ctx(n);
}


x86 assembly (clang, -O0):
<od_pvq_k1_ctx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114a <od_pvq_k1_ctx+0x3a>
cmpl   $0x8,-0x8(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
shl    $0x1,%eax
add    $0x8,%eax
mov    -0x8(%rbp),%ecx
and    $0x1,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1155 <od_pvq_k1_ctx+0x45>
mov    -0x8(%rbp),%edi
call   1030 <od_pvq_size_ctx@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<od_pvq_k1_ctx>:
test   %esi,%esi
je     1126 <od_pvq_k1_ctx+0x16>
xor    %eax,%eax
cmp    $0x9,%edi
setge  %al
and    $0x1,%edi
lea    (%rdi,%rax,2),%eax
add    $0x8,%eax
ret
jmp    1030 <od_pvq_size_ctx@plt>

LLVM IR (-O0):
define i32 @od_pvq_k1_ctx(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 8
%11 = zext i1 %10 to i32
%12 = mul nsw i32 2, %11
%13 = add nsw i32 8, %12
%14 = load i32, i32* %4
%15 = and i32 %14, 1
%16 = add nsw i32 %13, %15
store i32 %16, i32* %3
br label %20
17: ; preds = %2
%18 = load i32, i32* %4
%19 = call i32 @od_pvq_size_ctx(i32 %18)
store i32 %19, i32* %3
br label %20
20: ; preds = %17, %8
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @od_pvq_k1_ctx(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = icmp sgt i32 %0, 8
%6 = select i1 %5, i32 10, i32 8
%7 = and i32 %0, 1
%8 = or i32 %6, %7
br label %11
9: ; preds = %2
%10 = tail call i32 @od_pvq_size_ctx(i32 %0)
br label %11
11: ; preds = %9, %4
%12 = phi i32 [ %8, %4 ], [ %10, %9 ]
ret i32 %12
}
/* Variables and functions */
double drand48();
void nAleatorios(double *nums) {
  int i;
  for (i = 0; i < 1000000; i++) {
    nums[i] = drand48();
  }
}


x86 assembly (clang, -O0):
<nAleatorios>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xf4240,-0xc(%rbp)
jge    1152 <nAleatorios+0x42>
mov    $0x0,%al
call   1030 <drand48@plt>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <nAleatorios+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nAleatorios>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <drand48@plt>
movsd  %xmm0,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    $0xf4240,%rbx
jne    1120 <nAleatorios+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @nAleatorios(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1000000
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = call double (...) @drand48()
%9 = load double*, double** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds double, double* %9, i64 %11
store double %8, double* %12
br label %13
13: ; preds = %7
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @nAleatorios(double* nocapture writeonly %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i64 [ 0, %1 ], [ %6, %2 ]
%4 = tail call double (...) @drand48()
%5 = getelementptr inbounds double, double* %0, i64 %3
store double %4, double* %5
%6 = add nuw nsw i64 %3, 1
%7 = icmp eq i64 %6, 1000000
br i1 %7, label %8, label %2
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(unsigned short, unsigned short);
void serial_set_baud(unsigned short com, unsigned short divisor) {
  outb((com + 3), 0x80);
  outb((com), (divisor >> 8) & 0x00FF);
  outb((com), divisor & 0x00FF);
}


x86 assembly (clang, -O0):
<serial_set_baud>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x3,%eax
mov    $0x80,%esi
movzwl %ax,%edi
call   1030 <outb@plt>
mov    -0x2(%rbp),%cx
movzwl -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movzwl %cx,%edi
movzwl %ax,%esi
call   1030 <outb@plt>
mov    -0x2(%rbp),%cx
movzwl -0x4(%rbp),%eax
and    $0xff,%eax
movzwl %cx,%edi
movzwl %ax,%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_set_baud>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
lea    0x3(%rbx),%eax
movzwl %ax,%edi
mov    $0x80,%esi
call   1030 <outb@plt>
mov    %ebp,%esi
shr    $0x8,%esi
mov    %ebx,%edi
call   1030 <outb@plt>
movzbl %bpl,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @serial_set_baud(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = add nsw i32 %6, 3
%8 = trunc i32 %7 to i16
%9 = call i32 @outb(i16 zeroext %8, i16 zeroext 128)
%10 = load i16, i16* %3
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i16
%16 = call i32 @outb(i16 zeroext %10, i16 zeroext %15)
%17 = load i16, i16* %3
%18 = load i16, i16* %4
%19 = zext i16 %18 to i32
%20 = and i32 %19, 255
%21 = trunc i32 %20 to i16
%22 = call i32 @outb(i16 zeroext %17, i16 zeroext %21)
ret void
}

LLVM IR (-O2):
define void @serial_set_baud(i16 zeroext %0, i16 zeroext %1) {
%3 = add i16 %0, 3
%4 = tail call i32 @outb(i16 zeroext %3, i16 zeroext 128)
%5 = lshr i16 %1, 8
%6 = tail call i32 @outb(i16 zeroext %0, i16 zeroext %5)
%7 = and i16 %1, 255
%8 = tail call i32 @outb(i16 zeroext %0, i16 zeroext %7)
ret void
}
/* Variables and functions */
scalar_t__ pthread_self();
int rathread_get_tid(void) { return (int)pthread_self(); }


x86 assembly (clang, -O0):
<rathread_get_tid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pthread_self@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rathread_get_tid>:
xor    %eax,%eax
jmp    1030 <pthread_self@plt>

LLVM IR (-O0):
define i32 @rathread_get_tid() {
%1 = call i64 (...) @pthread_self()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @rathread_get_tid() {
%1 = tail call i64 (...) @pthread_self()
%2 = trunc i64 %1 to i32
ret i32 %2
}
int randomNumber(range)
int range;
{ return ((abs(random()) >> 2) % range); }


x86 assembly (clang, -O0):
<randomNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <random@plt>
mov    %eax,%edi
call   1030 <abs@plt>
sar    $0x2,%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomNumber>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <random@plt>
mov    %eax,%ecx
neg    %ecx
cmovns %ecx,%eax
shr    $0x2,%eax
xor    %edx,%edx
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randomNumber(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @random()
%4 = call i32 @abs(i32 %3)
%5 = ashr i32 %4, 2
%6 = load i32, i32* %2
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @randomNumber(i32 %0) {
%2 = tail call i32 (...) @random()
%3 = tail call i32 @llvm.abs.i32(i32 %2, i1 true)
%4 = lshr i32 %3, 2
%5 = srem i32 %4, %0
ret i32 %5
}
void ECAPCounterConfig(unsigned int baseAdd, unsigned int countVal) {
  (*((volatile unsigned int *)(baseAdd + (0x0)))) = countVal;
}


x86 assembly (clang, -O0):
<ECAPCounterConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECAPCounterConfig>:
mov    %edi,%eax
mov    %esi,(%rax)
ret

LLVM IR (-O0):
define void @ECAPCounterConfig(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %6, 0
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @ECAPCounterConfig(i32 %0, i32 %1) {
%3 = zext i32 %0 to i64
%4 = inttoptr i64 %3 to i32*
store volatile i32 %1, i32* %4
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000F04))) &= 0xffff0000;
  (*((volatile uint32_t *)(ui32Base + 0x00000F04))) |= ui32Config;
}


x86 assembly (clang, -O0):
<I2CTxFIFOConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xf04,%eax
cltq
mov    (%rax),%ecx
and    $0xffff0000,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%eax
add    $0xf04,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CTxFIFOConfigSet>:
movslq %edi,%rax
andl   $0xffff0000,0xf04(%rax)
or     %esi,0xf04(%rax)
ret

LLVM IR (-O0):
define void @I2CTxFIFOConfigSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 3844
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -65536
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 3844
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = or i32 %16, %11
store volatile i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @I2CTxFIFOConfigSet(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 3844
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -65536
store volatile i32 %7, i32* %5
%8 = load volatile i32, i32* %5
%9 = or i32 %8, %1
store volatile i32 %9, i32* %5
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
typedef TYPE_1__ *mpz_t;
struct TYPE_3__ {
  int /*<<< orphan*/ _mp_alloc;
  int /*<<< orphan*/ _mp_d;
};

/* Variables and functions */
int /*<<< orphan*/ mpn_zero(int /*<<< orphan*/, int /*<<< orphan*/);
void mpz_zero(mpz_t op) { mpn_zero(op->_mp_d, op->_mp_alloc); }


x86 assembly (clang, -O0):
<mpz_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
call   1030 <mpn_zero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpz_zero>:
mov    (%rdi),%esi
mov    0x4(%rdi),%edi
jmp    1030 <mpn_zero@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i32 }
define void @mpz_zero(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%3 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 1
%5 = load i32, i32* %4
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @mpn_zero(i32 %5, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32, i32 }
define void @mpz_zero(%struct.TYPE_3__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 1
%3 = load i32, i32* %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = tail call i32 @mpn_zero(i32 %3, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ show_pointer(int);
void display_show_pointer(int yesno) { show_pointer(yesno); }


x86 assembly (clang, -O0):
<display_show_pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <show_pointer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_show_pointer>:
jmp    1030 <show_pointer@plt>

LLVM IR (-O0):
define void @display_show_pointer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @show_pointer(i32 %3)
ret void
}

LLVM IR (-O2):
define void @display_show_pointer(i32 %0) {
%2 = tail call i32 @show_pointer(i32 %0)
ret void
}
void test_isspace(void) {
  int i, j;
  for (i = -127; i < 256;)
    j = i, printf("%s: %d -> %d\n", __FUNCTION__, j, isspace(i++) ? 1 : 0);
}


x86 assembly (clang, -O0):
<test_isspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffff81,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
jge    1184 <test_isspace+0x64>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    %edi,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
call   1040 <isspace@plt>
mov    -0xc(%rbp),%edx
mov    %eax,%esi
xor    %ecx,%ecx
mov    $0x1,%eax
cmp    $0x0,%esi
cmovne %eax,%ecx
lea    0xe8f(%rip),%rdi
lea    0xe96(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    112f <test_isspace+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_isspace>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    $0xffffff81,%ebx
lea    0xecd(%rip),%r14
lea    0xed4(%rip),%r15
nopw   0x0(%rax,%rax,1)
lea    0x1(%rbx),%ebp
mov    %ebx,%edi
call   1040 <isspace@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %r14,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
xor    %eax,%eax
call   1030 <printf@plt>
mov    %ebp,%ebx
cmp    $0x100,%ebp
jne    1140 <test_isspace+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%s: %d -> %d\0A\00"
@__FUNCTION__.test_isspace = [13 x i8] c"test_isspace\00"
define void @test_isspace() {
%1 = alloca i32
%2 = alloca i32
store i32 -127, i32* %1
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i32, i32* %1
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
%11 = call i32 @isspace(i32 %9)
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
%15 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.test_isspace, i64 0, i64 0), i32 %8, i32 %14)
br label %3
16: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"%s: %d -> %d\0A\00"
@__FUNCTION__.test_isspace = [13 x i8] c"test_isspace\00"
define void @test_isspace() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ -127, %0 ], [ %3, %1 ]
%3 = add nsw i32 %2, 1
%4 = tail call i32 @isspace(i32 %2)
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.test_isspace, i64 0, i64 0), i32 %2, i32 %6)
%8 = icmp eq i32 %3, 256
br i1 %8, label %9, label %1
9: ; preds = %1
ret void
}
void PRCMSRAMRetentionDisable(unsigned long ulSramColSel,
                              unsigned long ulFlags) {
  if (ulFlags & 0x00000001) {
    (*((volatile unsigned long *)(0x4402D000 + 0x00000018))) &=
        ~(ulSramColSel & 0xF);
  }
  if (ulFlags & 0x00000002) {
    (*((volatile unsigned long *)(0x4402D000 + 0x0000001C))) &=
        ~(ulSramColSel & 0xF);
  }
}


x86 assembly (clang, -O0):
<PRCMSRAMRetentionDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     113d <PRCMSRAMRetentionDisable+0x3d>
mov    -0x8(%rbp),%rax
and    $0xf,%rax
xor    $0xffffffffffffffff,%rax
mov    $0x4402d018,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x4402d018,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     116e <PRCMSRAMRetentionDisable+0x6e>
mov    -0x8(%rbp),%rax
and    $0xf,%rax
xor    $0xffffffffffffffff,%rax
mov    $0x4402d01c,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x4402d01c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMSRAMRetentionDisable>:
test   $0x1,%sil
jne    110d <PRCMSRAMRetentionDisable+0xd>
test   $0x2,%sil
jne    1123 <PRCMSRAMRetentionDisable+0x23>
ret
mov    %edi,%eax
not    %eax
or     $0xfffffffffffffff0,%rax
and    %rax,0x4402d018
44
test   $0x2,%sil
je     110c <PRCMSRAMRetentionDisable+0xc>
not    %edi
or     $0xfffffffffffffff0,%rdi
and    %rdi,0x4402d01c
44
ret

LLVM IR (-O0):
define void @PRCMSRAMRetentionDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 1
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i64, i64* %3
%10 = and i64 %9, 15
%11 = xor i64 %10, -1
%12 = load volatile i64, i64* inttoptr (i64 1141035032 to i64*)
%13 = and i64 %12, %11
store volatile i64 %13, i64* inttoptr (i64 1141035032 to i64*)
br label %14
14: ; preds = %8, %2
%15 = load i64, i64* %4
%16 = and i64 %15, 2
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %14
%19 = load i64, i64* %3
%20 = and i64 %19, 15
%21 = xor i64 %20, -1
%22 = load volatile i64, i64* inttoptr (i64 1141035036 to i64*)
%23 = and i64 %22, %21
store volatile i64 %23, i64* inttoptr (i64 1141035036 to i64*)
br label %24
24: ; preds = %18, %14
ret void
}

LLVM IR (-O2):
define void @PRCMSRAMRetentionDisable(i64 %0, i64 %1) {
%3 = and i64 %1, 1
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = and i64 %0, 15
%7 = xor i64 %6, -1
%8 = load volatile i64, i64* inttoptr (i64 1141035032 to i64*)
%9 = and i64 %8, %7
store volatile i64 %9, i64* inttoptr (i64 1141035032 to i64*)
br label %10
10: ; preds = %5, %2
%11 = and i64 %1, 2
%12 = icmp eq i64 %11, 0
br i1 %12, label %18, label %13
13: ; preds = %10
%14 = and i64 %0, 15
%15 = xor i64 %14, -1
%16 = load volatile i64, i64* inttoptr (i64 1141035036 to i64*)
%17 = and i64 %16, %15
store volatile i64 %17, i64* inttoptr (i64 1141035036 to i64*)
br label %18
18: ; preds = %13, %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gen_args(char *, int);
int gen_dummy_args_new(char *dirname) {
  gen_args(dirname, 3);
  return (0);
}


x86 assembly (clang, -O0):
<gen_dummy_args_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1030 <gen_args@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_dummy_args_new>:
push   %rax
mov    $0x3,%esi
call   1030 <gen_args@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_dummy_args_new(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gen_args(i8* %3, i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_dummy_args_new(i8* %0) {
%2 = tail call i32 @gen_args(i8* %0, i32 3)
ret i32 0
}
/* Variables and functions */
short mus_char_to_bshort(unsigned char const *);
short mus_char_to_lshort(unsigned char const *);
short big_or_little_endian_short(const unsigned char *n, int little) {
  if (little)
    return (mus_char_to_lshort(n));
  return (mus_char_to_bshort(n));
}


x86 assembly (clang, -O0):
<big_or_little_endian_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     114b <big_or_little_endian_short+0x2b>
mov    -0x10(%rbp),%rdi
call   1030 <mus_char_to_lshort@plt>
mov    %ax,-0x2(%rbp)
jmp    1158 <big_or_little_endian_short+0x38>
mov    -0x10(%rbp),%rdi
call   1040 <mus_char_to_bshort@plt>
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<big_or_little_endian_short>:
test   %esi,%esi
je     1129 <big_or_little_endian_short+0x9>
jmp    1030 <mus_char_to_lshort@plt>
jmp    1040 <mus_char_to_bshort@plt>

LLVM IR (-O0):
define signext i16 @big_or_little_endian_short(i8* %0, i32 %1) {
%3 = alloca i16
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = call signext i16 @mus_char_to_lshort(i8* %9)
store i16 %10, i16* %3
br label %14
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = call signext i16 @mus_char_to_bshort(i8* %12)
store i16 %13, i16* %3
br label %14
14: ; preds = %11, %8
%15 = load i16, i16* %3
ret i16 %15
}

LLVM IR (-O2):
define signext i16 @big_or_little_endian_short(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call signext i16 @mus_char_to_lshort(i8* %0)
br label %8
6: ; preds = %2
%7 = tail call signext i16 @mus_char_to_bshort(i8* %0)
br label %8
8: ; preds = %6, %4
%9 = phi i16 [ %5, %4 ], [ %7, %6 ]
ret i16 %9
}