#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ dc_disable();
int /*<<< orphan*/ dc_enable();
int dc_test(void) {
  int i;
  unsigned long base, add, ul;
  base = (((unsigned long)0x00100000 / (256 * 16)) * 256 * 16) + 256 * 16;
  dc_enable();
  add = base;
  for (i = 0; i < 1; i++) {
    ul = *((volatile unsigned long *)(add));
    ul = *((volatile unsigned long *)(add + 16 + 4));
    ul = *((volatile unsigned long *)(add + 2 * 16 + 8));
    ul = *((volatile unsigned long *)(add + 3 * 16 + 12));
    add += 256 * 16;
  }
  add = base;
  for (i = 0; i < 1; i++) {
    *((volatile unsigned long *)(add + 0)) = 0x00000001;
    *((volatile unsigned long *)(add + 4)) = 0x00000000;
    *((volatile unsigned long *)(add + 8)) = 0x00000000;
    *((volatile unsigned long *)(add + 12)) = 0x00000000;
    *((volatile unsigned long *)(add + 16 + 0)) = 0x00000000;
    *((volatile unsigned long *)(add + 16 + 4)) = 0x00000002;
    *((volatile unsigned long *)(add + 16 + 8)) = 0x00000000;
    *((volatile unsigned long *)(add + 16 + 12)) = 0x00000000;
    *((volatile unsigned long *)(add + 2 * 16 + 0)) = 0x00000000;
    *((volatile unsigned long *)(add + 2 * 16 + 4)) = 0x00000000;
    *((volatile unsigned long *)(add + 2 * 16 + 8)) = 0x00000003;
    *((volatile unsigned long *)(add + 2 * 16 + 12)) = 0x00000000;
    *((volatile unsigned long *)(add + 3 * 16 + 0)) = 0x00000000;
    *((volatile unsigned long *)(add + 3 * 16 + 4)) = 0x00000000;
    *((volatile unsigned long *)(add + 3 * 16 + 8)) = 0x00000000;
    *((volatile unsigned long *)(add + 3 * 16 + 12)) = 0x00000004;
    add += 256 * 16;
  }
  add = base;
  for (i = 0; i < 1; i++) {
    *((volatile unsigned char *)(add + 16 - 4)) =
        *((volatile unsigned char *)(add + 3));
    *((volatile unsigned char *)(add + 2 * 16 - 8)) =
        *((volatile unsigned char *)(add + 16 + 7));
    *((volatile unsigned char *)(add + 3 * 16 - 12)) =
        *((volatile unsigned char *)(add + 2 * 16 + 11));
    *((volatile unsigned char *)(add + 4 * 16 - 16)) =
        *((volatile unsigned char *)(add + 3 * 16 + 15));
    add += 256 * 16;
  }
  add = base;
  for (i = 0; i < 1; i++) {
    *((volatile unsigned short *)(add + (256 - 1) * 16)) =
        *((volatile unsigned short *)(add + 16 - 4)) +
        *((volatile unsigned short *)(add + 2));
    *((volatile unsigned short *)(add + (256 - 1) * 16 + 2)) =
        *((volatile unsigned short *)(add + 16 - 8)) +
        *((volatile unsigned short *)(add + 16 + 6));
    *((volatile unsigned short *)(add + (256 - 1) * 16 + 4)) =
        *((volatile unsigned short *)(add + 16 - 12)) +
        *((volatile unsigned short *)(add + 2 * 16 + 10));
    *((volatile unsigned short *)(add + (256 - 1) * 16 + 6)) =
        *((volatile unsigned short *)(add + 16 - 16)) +
        *((volatile unsigned short *)(add + 2 * 16 + 14));
    add += 256 * 16;
  }
  add = base + 1 * 256 * 16;
  for (i = 0; i < 1; i++) {
    ul = *((volatile unsigned long *)(add));
    ul = *((volatile unsigned long *)(add + 16));
    ul = *((volatile unsigned long *)(add + 2 * 16));
    ul = *((volatile unsigned long *)(add + 3 * 16));
    add += 256 * 16;
  }
  ul = 0;
  add = base;
  for (i = 0; i < 1; i++) {
    ul += *((volatile unsigned short *)(add + (256 - 1) * 16)) +
          *((volatile unsigned short *)(add + 16 - 4)) +
          *((volatile unsigned short *)(add + 2));
    ul += *((volatile unsigned short *)(add + (256 - 1) * 16 + 2)) +
          *((volatile unsigned short *)(add + 16 - 8)) +
          *((volatile unsigned short *)(add + 16 + 6));
    ul += *((volatile unsigned short *)(add + (256 - 1) * 16 + 4)) +
          *((volatile unsigned short *)(add + 16 - 12)) +
          *((volatile unsigned short *)(add + 2 * 16 + 10));
    ul += *((volatile unsigned short *)(add + (256 - 1) * 16 + 6)) +
          *((volatile unsigned short *)(add + 16 - 16)) +
          *((volatile unsigned short *)(add + 2 * 16 + 14));
    add += 256 * 16;
  }
  dc_disable();
  return ul;
}


x86 assembly (clang, -O0):
<dc_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x101000,-0x10(%rbp)
mov    $0x0,%al
call   1030 <dc_enable@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    119b <dc_test+0x7b>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x14(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x28(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x3c(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <dc_test+0x26>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    128f <dc_test+0x16f>
mov    -0x18(%rbp),%rax
movq   $0x1,(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x4(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x8(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0xc(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x10(%rax)
mov    -0x18(%rbp),%rax
movq   $0x2,0x14(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x18(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x1c(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x20(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x24(%rax)
mov    -0x18(%rbp),%rax
movq   $0x3,0x28(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x2c(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x30(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x34(%rax)
mov    -0x18(%rbp),%rax
movq   $0x0,0x38(%rax)
mov    -0x18(%rbp),%rax
movq   $0x4,0x3c(%rax)
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    11aa <dc_test+0x8a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    1318 <dc_test+0x1f8>
mov    -0x18(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x18(%rbp),%rax
add    $0x10,%rax
sub    $0x4,%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    0x17(%rax),%cl
mov    -0x18(%rbp),%rax
add    $0x20,%rax
sub    $0x8,%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    0x2b(%rax),%cl
mov    -0x18(%rbp),%rax
add    $0x30,%rax
sub    $0xc,%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    0x3f(%rax),%cl
mov    -0x18(%rbp),%rax
add    $0x40,%rax
sub    $0x10,%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    129e <dc_test+0x17e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    1401 <dc_test+0x2e1>
mov    -0x18(%rbp),%rax
add    $0x10,%rax
sub    $0x4,%rax
mov    (%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
mov    0x2(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,0xff0(%rax)
mov    -0x18(%rbp),%rax
add    $0x10,%rax
sub    $0x8,%rax
mov    (%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
mov    0x16(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,0xff2(%rax)
mov    -0x18(%rbp),%rax
add    $0x10,%rax
sub    $0xc,%rax
mov    (%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
mov    0x2a(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,0xff4(%rax)
mov    -0x18(%rbp),%rax
add    $0x10,%rax
sub    $0x10,%rax
mov    (%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
mov    0x2e(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,0xff6(%rax)
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1327 <dc_test+0x207>
mov    -0x10(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    146b <dc_test+0x34b>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x10(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x20(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x30(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1416 <dc_test+0x2f6>
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    158c <dc_test+0x46c>
mov    -0x18(%rbp),%rax
mov    0xff0(%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
add    $0x10,%rcx
sub    $0x4,%rcx
mov    (%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    0x2(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
cltq
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0xff2(%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
add    $0x10,%rcx
sub    $0x8,%rcx
mov    (%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    0x16(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
cltq
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0xff4(%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
add    $0x10,%rcx
sub    $0xc,%rcx
mov    (%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    0x2a(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
cltq
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0xff6(%rax),%ax
movzwl %ax,%eax
mov    -0x18(%rbp),%rcx
add    $0x10,%rcx
sub    $0x10,%rcx
mov    (%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    0x2e(%rcx),%cx
movzwl %cx,%ecx
add    %ecx,%eax
cltq
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1482 <dc_test+0x362>
mov    $0x0,%al
call   1040 <dc_disable@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dc_test>:
push   %rbx
xor    %eax,%eax
call   1030 <dc_enable@plt>
mov    0x101000,%rax
mov    0x101014,%rax
mov    0x101028,%rax
mov    0x10103c,%rax
movq   $0x1,0x101000
movq   $0x0,0x101004
movq   $0x0,0x101008
movq   $0x0,0x10100c
movq   $0x0,0x101010
movq   $0x2,0x101014
movq   $0x0,0x101018
movq   $0x0,0x10101c
movq   $0x0,0x101020
movq   $0x0,0x101024
movq   $0x3,0x101028
movq   $0x0,0x10102c
movq   $0x0,0x101030
movq   $0x0,0x101034
movq   $0x0,0x101038
movq   $0x4,0x10103c
mov    0x101003,%al
mov    %al,0x10100c
mov    0x101017,%al
mov    %al,0x101018
mov    0x10102b,%al
mov    %al,0x101024
mov    0x10103f,%al
mov    %al,0x101030
movzwl 0x10100c,%eax
add    0x101002,%ax
mov    %ax,0x101ff0
movzwl 0x101008,%eax
add    0x101016,%ax
mov    %ax,0x101ff2
movzwl 0x101004,%eax
add    0x10102a,%ax
mov    %ax,0x101ff4
movzwl 0x101000,%eax
add    0x10102e,%ax
mov    %ax,0x101ff6
mov    0x102000,%rax
mov    0x102010,%rax
mov    0x102020,%rax
mov    0x102030,%rax
movzwl 0x101ff0,%eax
movzwl 0x10100c,%ecx
add    %eax,%ecx
movzwl 0x101002,%eax
add    %ecx,%eax
movzwl 0x101ff2,%ecx
add    %eax,%ecx
movzwl 0x101008,%eax
add    %ecx,%eax
movzwl 0x101016,%ecx
add    %eax,%ecx
movzwl 0x101ff4,%eax
add    %ecx,%eax
movzwl 0x101004,%ecx
add    %eax,%ecx
movzwl 0x10102a,%eax
add    %ecx,%eax
movzwl 0x101ff6,%ecx
add    %eax,%ecx
movzwl 0x101000,%eax
add    %ecx,%eax
movzwl 0x10102e,%ebx
add    %eax,%ebx
xor    %eax,%eax
call   1040 <dc_disable@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dc_test() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 1052672, i64* %2
%5 = call i32 (...) @dc_enable()
%6 = load i64, i64* %2
store i64 %6, i64* %3
store i32 0, i32* %1
br label %7
7: ; preds = %31, %0
%8 = load i32, i32* %1
%9 = icmp slt i32 %8, 1
br i1 %9, label %10, label %34
10: ; preds = %7
%11 = load i64, i64* %3
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
store i64 %13, i64* %4
%14 = load i64, i64* %3
%15 = add i64 %14, 16
%16 = add i64 %15, 4
%17 = inttoptr i64 %16 to i64*
%18 = load volatile i64, i64* %17
store i64 %18, i64* %4
%19 = load i64, i64* %3
%20 = add i64 %19, 32
%21 = add i64 %20, 8
%22 = inttoptr i64 %21 to i64*
%23 = load volatile i64, i64* %22
store i64 %23, i64* %4
%24 = load i64, i64* %3
%25 = add i64 %24, 48
%26 = add i64 %25, 12
%27 = inttoptr i64 %26 to i64*
%28 = load volatile i64, i64* %27
store i64 %28, i64* %4
%29 = load i64, i64* %3
%30 = add i64 %29, 4096
store i64 %30, i64* %3
br label %31
31: ; preds = %10
%32 = load i32, i32* %1
%33 = add nsw i32 %32, 1
store i32 %33, i32* %1
br label %7
34: ; preds = %7
%35 = load i64, i64* %2
store i64 %35, i64* %3
store i32 0, i32* %1
br label %36
36: ; preds = %102, %34
%37 = load i32, i32* %1
%38 = icmp slt i32 %37, 1
br i1 %38, label %39, label %105
39: ; preds = %36
%40 = load i64, i64* %3
%41 = add i64 %40, 0
%42 = inttoptr i64 %41 to i64*
store volatile i64 1, i64* %42
%43 = load i64, i64* %3
%44 = add i64 %43, 4
%45 = inttoptr i64 %44 to i64*
store volatile i64 0, i64* %45
%46 = load i64, i64* %3
%47 = add i64 %46, 8
%48 = inttoptr i64 %47 to i64*
store volatile i64 0, i64* %48
%49 = load i64, i64* %3
%50 = add i64 %49, 12
%51 = inttoptr i64 %50 to i64*
store volatile i64 0, i64* %51
%52 = load i64, i64* %3
%53 = add i64 %52, 16
%54 = add i64 %53, 0
%55 = inttoptr i64 %54 to i64*
store volatile i64 0, i64* %55
%56 = load i64, i64* %3
%57 = add i64 %56, 16
%58 = add i64 %57, 4
%59 = inttoptr i64 %58 to i64*
store volatile i64 2, i64* %59
%60 = load i64, i64* %3
%61 = add i64 %60, 16
%62 = add i64 %61, 8
%63 = inttoptr i64 %62 to i64*
store volatile i64 0, i64* %63
%64 = load i64, i64* %3
%65 = add i64 %64, 16
%66 = add i64 %65, 12
%67 = inttoptr i64 %66 to i64*
store volatile i64 0, i64* %67
%68 = load i64, i64* %3
%69 = add i64 %68, 32
%70 = add i64 %69, 0
%71 = inttoptr i64 %70 to i64*
store volatile i64 0, i64* %71
%72 = load i64, i64* %3
%73 = add i64 %72, 32
%74 = add i64 %73, 4
%75 = inttoptr i64 %74 to i64*
store volatile i64 0, i64* %75
%76 = load i64, i64* %3
%77 = add i64 %76, 32
%78 = add i64 %77, 8
%79 = inttoptr i64 %78 to i64*
store volatile i64 3, i64* %79
%80 = load i64, i64* %3
%81 = add i64 %80, 32
%82 = add i64 %81, 12
%83 = inttoptr i64 %82 to i64*
store volatile i64 0, i64* %83
%84 = load i64, i64* %3
%85 = add i64 %84, 48
%86 = add i64 %85, 0
%87 = inttoptr i64 %86 to i64*
store volatile i64 0, i64* %87
%88 = load i64, i64* %3
%89 = add i64 %88, 48
%90 = add i64 %89, 4
%91 = inttoptr i64 %90 to i64*
store volatile i64 0, i64* %91
%92 = load i64, i64* %3
%93 = add i64 %92, 48
%94 = add i64 %93, 8
%95 = inttoptr i64 %94 to i64*
store volatile i64 0, i64* %95
%96 = load i64, i64* %3
%97 = add i64 %96, 48
%98 = add i64 %97, 12
%99 = inttoptr i64 %98 to i64*
store volatile i64 4, i64* %99
%100 = load i64, i64* %3
%101 = add i64 %100, 4096
store i64 %101, i64* %3
br label %102
102: ; preds = %39
%103 = load i32, i32* %1
%104 = add nsw i32 %103, 1
store i32 %104, i32* %1
br label %36
105: ; preds = %36
%106 = load i64, i64* %2
store i64 %106, i64* %3
store i32 0, i32* %1
br label %107
107: ; preds = %148, %105
%108 = load i32, i32* %1
%109 = icmp slt i32 %108, 1
br i1 %109, label %110, label %151
110: ; preds = %107
%111 = load i64, i64* %3
%112 = add i64 %111, 3
%113 = inttoptr i64 %112 to i8*
%114 = load volatile i8, i8* %113
%115 = load i64, i64* %3
%116 = add i64 %115, 16
%117 = sub i64 %116, 4
%118 = inttoptr i64 %117 to i8*
store volatile i8 %114, i8* %118
%119 = load i64, i64* %3
%120 = add i64 %119, 16
%121 = add i64 %120, 7
%122 = inttoptr i64 %121 to i8*
%123 = load volatile i8, i8* %122
%124 = load i64, i64* %3
%125 = add i64 %124, 32
%126 = sub i64 %125, 8
%127 = inttoptr i64 %126 to i8*
store volatile i8 %123, i8* %127
%128 = load i64, i64* %3
%129 = add i64 %128, 32
%130 = add i64 %129, 11
%131 = inttoptr i64 %130 to i8*
%132 = load volatile i8, i8* %131
%133 = load i64, i64* %3
%134 = add i64 %133, 48
%135 = sub i64 %134, 12
%136 = inttoptr i64 %135 to i8*
store volatile i8 %132, i8* %136
%137 = load i64, i64* %3
%138 = add i64 %137, 48
%139 = add i64 %138, 15
%140 = inttoptr i64 %139 to i8*
%141 = load volatile i8, i8* %140
%142 = load i64, i64* %3
%143 = add i64 %142, 64
%144 = sub i64 %143, 16
%145 = inttoptr i64 %144 to i8*
store volatile i8 %141, i8* %145
%146 = load i64, i64* %3
%147 = add i64 %146, 4096
store i64 %147, i64* %3
br label %148
148: ; preds = %110
%149 = load i32, i32* %1
%150 = add nsw i32 %149, 1
store i32 %150, i32* %1
br label %107
151: ; preds = %107
%152 = load i64, i64* %2
store i64 %152, i64* %3
store i32 0, i32* %1
br label %153
153: ; preds = %229, %151
%154 = load i32, i32* %1
%155 = icmp slt i32 %154, 1
br i1 %155, label %156, label %232
156: ; preds = %153
%157 = load i64, i64* %3
%158 = add i64 %157, 16
%159 = sub i64 %158, 4
%160 = inttoptr i64 %159 to i16*
%161 = load volatile i16, i16* %160
%162 = zext i16 %161 to i32
%163 = load i64, i64* %3
%164 = add i64 %163, 2
%165 = inttoptr i64 %164 to i16*
%166 = load volatile i16, i16* %165
%167 = zext i16 %166 to i32
%168 = add nsw i32 %162, %167
%169 = trunc i32 %168 to i16
%170 = load i64, i64* %3
%171 = add i64 %170, 4080
%172 = inttoptr i64 %171 to i16*
store volatile i16 %169, i16* %172
%173 = load i64, i64* %3
%174 = add i64 %173, 16
%175 = sub i64 %174, 8
%176 = inttoptr i64 %175 to i16*
%177 = load volatile i16, i16* %176
%178 = zext i16 %177 to i32
%179 = load i64, i64* %3
%180 = add i64 %179, 16
%181 = add i64 %180, 6
%182 = inttoptr i64 %181 to i16*
%183 = load volatile i16, i16* %182
%184 = zext i16 %183 to i32
%185 = add nsw i32 %178, %184
%186 = trunc i32 %185 to i16
%187 = load i64, i64* %3
%188 = add i64 %187, 4080
%189 = add i64 %188, 2
%190 = inttoptr i64 %189 to i16*
store volatile i16 %186, i16* %190
%191 = load i64, i64* %3
%192 = add i64 %191, 16
%193 = sub i64 %192, 12
%194 = inttoptr i64 %193 to i16*
%195 = load volatile i16, i16* %194
%196 = zext i16 %195 to i32
%197 = load i64, i64* %3
%198 = add i64 %197, 32
%199 = add i64 %198, 10
%200 = inttoptr i64 %199 to i16*
%201 = load volatile i16, i16* %200
%202 = zext i16 %201 to i32
%203 = add nsw i32 %196, %202
%204 = trunc i32 %203 to i16
%205 = load i64, i64* %3
%206 = add i64 %205, 4080
%207 = add i64 %206, 4
%208 = inttoptr i64 %207 to i16*
store volatile i16 %204, i16* %208
%209 = load i64, i64* %3
%210 = add i64 %209, 16
%211 = sub i64 %210, 16
%212 = inttoptr i64 %211 to i16*
%213 = load volatile i16, i16* %212
%214 = zext i16 %213 to i32
%215 = load i64, i64* %3
%216 = add i64 %215, 32
%217 = add i64 %216, 14
%218 = inttoptr i64 %217 to i16*
%219 = load volatile i16, i16* %218
%220 = zext i16 %219 to i32
%221 = add nsw i32 %214, %220
%222 = trunc i32 %221 to i16
%223 = load i64, i64* %3
%224 = add i64 %223, 4080
%225 = add i64 %224, 6
%226 = inttoptr i64 %225 to i16*
store volatile i16 %222, i16* %226
%227 = load i64, i64* %3
%228 = add i64 %227, 4096
store i64 %228, i64* %3
br label %229
229: ; preds = %156
%230 = load i32, i32* %1
%231 = add nsw i32 %230, 1
store i32 %231, i32* %1
br label %153
232: ; preds = %153
%233 = load i64, i64* %2
%234 = add i64 %233, 4096
store i64 %234, i64* %3
store i32 0, i32* %1
br label %235
235: ; preds = %256, %232
%236 = load i32, i32* %1
%237 = icmp slt i32 %236, 1
br i1 %237, label %238, label %259
238: ; preds = %235
%239 = load i64, i64* %3
%240 = inttoptr i64 %239 to i64*
%241 = load volatile i64, i64* %240
store i64 %241, i64* %4
%242 = load i64, i64* %3
%243 = add i64 %242, 16
%244 = inttoptr i64 %243 to i64*
%245 = load volatile i64, i64* %244
store i64 %245, i64* %4
%246 = load i64, i64* %3
%247 = add i64 %246, 32
%248 = inttoptr i64 %247 to i64*
%249 = load volatile i64, i64* %248
store i64 %249, i64* %4
%250 = load i64, i64* %3
%251 = add i64 %250, 48
%252 = inttoptr i64 %251 to i64*
%253 = load volatile i64, i64* %252
store i64 %253, i64* %4
%254 = load i64, i64* %3
%255 = add i64 %254, 4096
store i64 %255, i64* %3
br label %256
256: ; preds = %238
%257 = load i32, i32* %1
%258 = add nsw i32 %257, 1
store i32 %258, i32* %1
br label %235
259: ; preds = %235
store i64 0, i64* %4
%260 = load i64, i64* %2
store i64 %260, i64* %3
store i32 0, i32* %1
br label %261
261: ; preds = %357, %259
%262 = load i32, i32* %1
%263 = icmp slt i32 %262, 1
br i1 %263, label %264, label %360
264: ; preds = %261
%265 = load i64, i64* %3
%266 = add i64 %265, 4080
%267 = inttoptr i64 %266 to i16*
%268 = load volatile i16, i16* %267
%269 = zext i16 %268 to i32
%270 = load i64, i64* %3
%271 = add i64 %270, 16
%272 = sub i64 %271, 4
%273 = inttoptr i64 %272 to i16*
%274 = load volatile i16, i16* %273
%275 = zext i16 %274 to i32
%276 = add nsw i32 %269, %275
%277 = load i64, i64* %3
%278 = add i64 %277, 2
%279 = inttoptr i64 %278 to i16*
%280 = load volatile i16, i16* %279
%281 = zext i16 %280 to i32
%282 = add nsw i32 %276, %281
%283 = sext i32 %282 to i64
%284 = load i64, i64* %4
%285 = add i64 %284, %283
store i64 %285, i64* %4
%286 = load i64, i64* %3
%287 = add i64 %286, 4080
%288 = add i64 %287, 2
%289 = inttoptr i64 %288 to i16*
%290 = load volatile i16, i16* %289
%291 = zext i16 %290 to i32
%292 = load i64, i64* %3
%293 = add i64 %292, 16
%294 = sub i64 %293, 8
%295 = inttoptr i64 %294 to i16*
%296 = load volatile i16, i16* %295
%297 = zext i16 %296 to i32
%298 = add nsw i32 %291, %297
%299 = load i64, i64* %3
%300 = add i64 %299, 16
%301 = add i64 %300, 6
%302 = inttoptr i64 %301 to i16*
%303 = load volatile i16, i16* %302
%304 = zext i16 %303 to i32
%305 = add nsw i32 %298, %304
%306 = sext i32 %305 to i64
%307 = load i64, i64* %4
%308 = add i64 %307, %306
store i64 %308, i64* %4
%309 = load i64, i64* %3
%310 = add i64 %309, 4080
%311 = add i64 %310, 4
%312 = inttoptr i64 %311 to i16*
%313 = load volatile i16, i16* %312
%314 = zext i16 %313 to i32
%315 = load i64, i64* %3
%316 = add i64 %315, 16
%317 = sub i64 %316, 12
%318 = inttoptr i64 %317 to i16*
%319 = load volatile i16, i16* %318
%320 = zext i16 %319 to i32
%321 = add nsw i32 %314, %320
%322 = load i64, i64* %3
%323 = add i64 %322, 32
%324 = add i64 %323, 10
%325 = inttoptr i64 %324 to i16*
%326 = load volatile i16, i16* %325
%327 = zext i16 %326 to i32
%328 = add nsw i32 %321, %327
%329 = sext i32 %328 to i64
%330 = load i64, i64* %4
%331 = add i64 %330, %329
store i64 %331, i64* %4
%332 = load i64, i64* %3
%333 = add i64 %332, 4080
%334 = add i64 %333, 6
%335 = inttoptr i64 %334 to i16*
%336 = load volatile i16, i16* %335
%337 = zext i16 %336 to i32
%338 = load i64, i64* %3
%339 = add i64 %338, 16
%340 = sub i64 %339, 16
%341 = inttoptr i64 %340 to i16*
%342 = load volatile i16, i16* %341
%343 = zext i16 %342 to i32
%344 = add nsw i32 %337, %343
%345 = load i64, i64* %3
%346 = add i64 %345, 32
%347 = add i64 %346, 14
%348 = inttoptr i64 %347 to i16*
%349 = load volatile i16, i16* %348
%350 = zext i16 %349 to i32
%351 = add nsw i32 %344, %350
%352 = sext i32 %351 to i64
%353 = load i64, i64* %4
%354 = add i64 %353, %352
store i64 %354, i64* %4
%355 = load i64, i64* %3
%356 = add i64 %355, 4096
store i64 %356, i64* %3
br label %357
357: ; preds = %264
%358 = load i32, i32* %1
%359 = add nsw i32 %358, 1
store i32 %359, i32* %1
br label %261
360: ; preds = %261
%361 = call i32 (...) @dc_disable()
%362 = load i64, i64* %4
%363 = trunc i64 %362 to i32
ret i32 %363
}

LLVM IR (-O2):
define i32 @dc_test() {
%1 = tail call i32 (...) @dc_enable()
%2 = load volatile i64, i64* inttoptr (i64 1052672 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 1052692 to i64*)
%4 = load volatile i64, i64* inttoptr (i64 1052712 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 1052732 to i64*)
store volatile i64 1, i64* inttoptr (i64 1052672 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052676 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052680 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052684 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052688 to i64*)
store volatile i64 2, i64* inttoptr (i64 1052692 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052696 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052700 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052704 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052708 to i64*)
store volatile i64 3, i64* inttoptr (i64 1052712 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052716 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052720 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052724 to i64*)
store volatile i64 0, i64* inttoptr (i64 1052728 to i64*)
store volatile i64 4, i64* inttoptr (i64 1052732 to i64*)
%6 = load volatile i8, i8* inttoptr (i64 1052675 to i8*)
store volatile i8 %6, i8* inttoptr (i64 1052684 to i8*)
%7 = load volatile i8, i8* inttoptr (i64 1052695 to i8*)
store volatile i8 %7, i8* inttoptr (i64 1052696 to i8*)
%8 = load volatile i8, i8* inttoptr (i64 1052715 to i8*)
store volatile i8 %8, i8* inttoptr (i64 1052708 to i8*)
%9 = load volatile i8, i8* inttoptr (i64 1052735 to i8*)
store volatile i8 %9, i8* inttoptr (i64 1052720 to i8*)
%10 = load volatile i16, i16* inttoptr (i64 1052684 to i16*)
%11 = load volatile i16, i16* inttoptr (i64 1052674 to i16*)
%12 = add i16 %11, %10
store volatile i16 %12, i16* inttoptr (i64 1056752 to i16*)
%13 = load volatile i16, i16* inttoptr (i64 1052680 to i16*)
%14 = load volatile i16, i16* inttoptr (i64 1052694 to i16*)
%15 = add i16 %14, %13
store volatile i16 %15, i16* inttoptr (i64 1056754 to i16*)
%16 = load volatile i16, i16* inttoptr (i64 1052676 to i16*)
%17 = load volatile i16, i16* inttoptr (i64 1052714 to i16*)
%18 = add i16 %17, %16
store volatile i16 %18, i16* inttoptr (i64 1056756 to i16*)
%19 = load volatile i16, i16* inttoptr (i64 1052672 to i16*)
%20 = load volatile i16, i16* inttoptr (i64 1052718 to i16*)
%21 = add i16 %20, %19
store volatile i16 %21, i16* inttoptr (i64 1056758 to i16*)
%22 = load volatile i64, i64* inttoptr (i64 1056768 to i64*)
%23 = load volatile i64, i64* inttoptr (i64 1056784 to i64*)
%24 = load volatile i64, i64* inttoptr (i64 1056800 to i64*)
%25 = load volatile i64, i64* inttoptr (i64 1056816 to i64*)
%26 = load volatile i16, i16* inttoptr (i64 1056752 to i16*)
%27 = zext i16 %26 to i32
%28 = load volatile i16, i16* inttoptr (i64 1052684 to i16*)
%29 = zext i16 %28 to i32
%30 = load volatile i16, i16* inttoptr (i64 1052674 to i16*)
%31 = zext i16 %30 to i32
%32 = load volatile i16, i16* inttoptr (i64 1056754 to i16*)
%33 = zext i16 %32 to i32
%34 = load volatile i16, i16* inttoptr (i64 1052680 to i16*)
%35 = zext i16 %34 to i32
%36 = load volatile i16, i16* inttoptr (i64 1052694 to i16*)
%37 = zext i16 %36 to i32
%38 = load volatile i16, i16* inttoptr (i64 1056756 to i16*)
%39 = zext i16 %38 to i32
%40 = load volatile i16, i16* inttoptr (i64 1052676 to i16*)
%41 = zext i16 %40 to i32
%42 = load volatile i16, i16* inttoptr (i64 1052714 to i16*)
%43 = zext i16 %42 to i32
%44 = load volatile i16, i16* inttoptr (i64 1056758 to i16*)
%45 = zext i16 %44 to i32
%46 = load volatile i16, i16* inttoptr (i64 1052672 to i16*)
%47 = zext i16 %46 to i32
%48 = load volatile i16, i16* inttoptr (i64 1052718 to i16*)
%49 = zext i16 %48 to i32
%50 = add nuw nsw i32 %27, %29
%51 = add nuw nsw i32 %50, %31
%52 = add nuw nsw i32 %51, %33
%53 = add nuw nsw i32 %52, %35
%54 = add nuw nsw i32 %53, %37
%55 = add nuw nsw i32 %54, %39
%56 = add nuw nsw i32 %55, %41
%57 = add nuw nsw i32 %56, %43
%58 = add nuw nsw i32 %57, %45
%59 = add nuw nsw i32 %58, %47
%60 = add nuw nsw i32 %59, %49
%61 = tail call i32 (...) @dc_disable()
ret i32 %60
}