int get_rdtsc_latency() {
  unsigned long long a, b;
  unsigned long long reg_a, reg_b, reg_c, reg_d;
  unsigned int latency = 0xffffffff, i;
  double tmp;
  for (i = 0; i < 100; i++) {
    __asm__ __volatile__("rdtsc;"
                         "mov %%rax,%%rbx;"
                         "mov %%rdx,%%rcx;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;"
                         "rdtsc;"
                         : "=a"(reg_a), "=b"(reg_b), "=c"(reg_c), "=d"(reg_d));
    a = (reg_d << 32) + (reg_a & 0xffffffffULL);
    b = (reg_c << 32) + (reg_b & 0xffffffffULL);
    tmp = rint(((double)(a - b)) / ((double)257));
    if (tmp < latency)
      latency = (int)tmp;
  }
  return latency;
}


x86 assembly (clang, -O0):
<get_rdtsc_latency>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x48,%rsp
movl   $0xffffffff,-0x3c(%rbp)
movl   $0x0,-0x40(%rbp)
cmpl   $0x64,-0x40(%rbp)
jae    13e9 <get_rdtsc_latency+0x2d9>
rdtsc
mov    %rax,%rbx
mov    %rdx,%rcx
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mov    %rax,-0x20(%rbp)
mov    %rbx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    %rdx,-0x38(%rbp)
mov    -0x38(%rbp),%rax
shl    $0x20,%rax
mov    -0x20(%rbp),%ecx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x30(%rbp),%rax
shl    $0x20,%rax
mov    -0x28(%rbp),%ecx
or     %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    %rcx,%rax
movq   %rax,%xmm0
movaps 0xc7a(%rip),%xmm1
punpckldq %xmm1,%xmm0
movapd 0xc7e(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xc77(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <rint@plt>
movsd  %xmm0,-0x48(%rbp)
movsd  -0x48(%rbp),%xmm1
mov    -0x3c(%rbp),%eax
cvtsi2sd %rax,%xmm0
ucomisd %xmm1,%xmm0
jbe    13d6 <get_rdtsc_latency+0x2c6>
cvttsd2si -0x48(%rbp),%eax
mov    %eax,-0x3c(%rbp)
jmp    13db <get_rdtsc_latency+0x2cb>
mov    -0x40(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x40(%rbp)
jmp    1127 <get_rdtsc_latency+0x17>
mov    -0x3c(%rbp),%eax
add    $0x48,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rdtsc_latency>:
push   %rbp
push   %r14
push   %rbx
mov    $0xffffffff,%r14d
mov    $0x64,%ebp
jmp    1139 <get_rdtsc_latency+0x29>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    $0xffffffff,%ebp
je     13a5 <get_rdtsc_latency+0x295>
rdtsc
mov    %rax,%rbx
mov    %rdx,%rcx
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shl    $0x20,%rdx
mov    %eax,%eax
or     %rdx,%rax
shl    $0x20,%rcx
mov    %ebx,%edx
sub    %rdx,%rax
sub    %rcx,%rax
movq   %rax,%xmm1
punpckldq 0xc9b(%rip),%xmm1
subpd  0xca3(%rip),%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
divsd  0xc9f(%rip),%xmm0
call   1030 <rint@plt>
mov    %r14d,%eax
xorps  %xmm1,%xmm1
cvtsi2sd %rax,%xmm1
ucomisd %xmm0,%xmm1
jbe    1130 <get_rdtsc_latency+0x20>
cvttsd2si %xmm0,%r14d
jmp    1130 <get_rdtsc_latency+0x20>
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get_rdtsc_latency() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
%9 = alloca double
store i32 -1, i32* %7
store i32 0, i32* %8
br label %10
10: ; preds = %43, %0
%11 = load i32, i32* %8
%12 = icmp ult i32 %11, 100
br i1 %12, label %13, label %46
13: ; preds = %10
%14 = call { i64, i64, i64, i64 } asm sideeffect "rdtsc;mov %rax,%rbx;mov %rdx,%rcx;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;", "={ax},={bx},={cx},={dx},~{dirflag},~{fpsr},~{flags}"()
%15 = extractvalue { i64, i64, i64, i64 } %14, 0
%16 = extractvalue { i64, i64, i64, i64 } %14, 1
%17 = extractvalue { i64, i64, i64, i64 } %14, 2
%18 = extractvalue { i64, i64, i64, i64 } %14, 3
store i64 %15, i64* %3
store i64 %16, i64* %4
store i64 %17, i64* %5
store i64 %18, i64* %6
%19 = load i64, i64* %6
%20 = shl i64 %19, 32
%21 = load i64, i64* %3
%22 = and i64 %21, 4294967295
%23 = add i64 %20, %22
store i64 %23, i64* %1
%24 = load i64, i64* %5
%25 = shl i64 %24, 32
%26 = load i64, i64* %4
%27 = and i64 %26, 4294967295
%28 = add i64 %25, %27
store i64 %28, i64* %2
%29 = load i64, i64* %1
%30 = load i64, i64* %2
%31 = sub i64 %29, %30
%32 = uitofp i64 %31 to double
%33 = fdiv double %32, 2.570000e+02
%34 = call double @llvm.rint.f64(double %33)
store double %34, double* %9
%35 = load double, double* %9
%36 = load i32, i32* %7
%37 = uitofp i32 %36 to double
%38 = fcmp olt double %35, %37
br i1 %38, label %39, label %42
39: ; preds = %13
%40 = load double, double* %9
%41 = fptosi double %40 to i32
store i32 %41, i32* %7
br label %42
42: ; preds = %39, %13
br label %43
43: ; preds = %42
%44 = load i32, i32* %8
%45 = add i32 %44, 1
store i32 %45, i32* %8
br label %10
46: ; preds = %10
%47 = load i32, i32* %7
ret i32 %47
}

LLVM IR (-O2):
define i32 @get_rdtsc_latency() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ -1, %0 ], [ %22, %1 ]
%3 = phi i32 [ 0, %0 ], [ %23, %1 ]
%4 = tail call { i64, i64, i64, i64 } asm sideeffect "rdtsc;mov %rax,%rbx;mov %rdx,%rcx;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;rdtsc;", "={ax},={bx},={cx},={dx},~{dirflag},~{fpsr},~{flags}"()
%5 = extractvalue { i64, i64, i64, i64 } %4, 0
%6 = extractvalue { i64, i64, i64, i64 } %4, 1
%7 = extractvalue { i64, i64, i64, i64 } %4, 2
%8 = extractvalue { i64, i64, i64, i64 } %4, 3
%9 = shl i64 %8, 32
%10 = and i64 %5, 4294967295
%11 = mul i64 %7, -4294967296
%12 = and i64 %6, 4294967295
%13 = or i64 %9, %10
%14 = sub i64 %13, %12
%15 = add i64 %14, %11
%16 = uitofp i64 %15 to double
%17 = fdiv double %16, 2.570000e+02
%18 = tail call double @llvm.rint.f64(double %17)
%19 = uitofp i32 %2 to double
%20 = fcmp olt double %18, %19
%21 = fptosi double %18 to i32
%22 = select i1 %20, i32 %21, i32 %2
%23 = add nuw nsw i32 %3, 1
%24 = icmp eq i32 %23, 100
br i1 %24, label %25, label %1
25: ; preds = %1
ret i32 %22
}