xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void help(char message[]) {
  fprintf(stderr, " in the help routine...\n");
  fprintf(stderr, "%s\n", message);
  exit(1);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec2(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<help>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb2(%rip),%r14
mov    (%r14),%edi
lea    0xec8(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xed0(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [25 x i8] c" in the help routine...\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [25 x i8] c" in the help routine...\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @help(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 (i32, i8*, ...) @fprintf(i32 %2, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stderr
%5 = tail call i32 (i32, i8*, ...) @fprintf(i32 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%6 = tail call i32 @exit(i32 1)
unreachable
}
char *langRomTypeLodeRunner() { return "Lode Runner"; }


x86 assembly (clang, -O0):
<langRomTypeLodeRunner>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeLodeRunner>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Lode Runner\00"
define i8* @langRomTypeLodeRunner() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [12 x i8] c"Lode Runner\00"
define i8* @langRomTypeLodeRunner() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ idc(int *);
int test02(int *p, int *x) {
  if (p)
    ;
  idc(p);
  if (x)
    ;
  return *p;
}


x86 assembly (clang, -O0):
<test02>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <test02+0x20>
jmp    1130 <test02+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <idc@plt>
cmpq   $0x0,-0x10(%rbp)
je     1149 <test02+0x39>
jmp    1149 <test02+0x39>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test02>:
push   %rbx
mov    %rdi,%rbx
call   1030 <idc@plt>
mov    (%rbx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test02(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
br label %8
8: ; preds = %7, %2
%9 = load i32*, i32** %3
%10 = call i32 @idc(i32* %9)
%11 = load i32*, i32** %4
%12 = icmp ne i32* %11, null
br i1 %12, label %13, label %14
13: ; preds = %8
br label %14
14: ; preds = %13, %8
%15 = load i32*, i32** %3
%16 = load i32, i32* %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @test02(i32* %0, i32* nocapture readnone %1) {
%3 = tail call i32 @idc(i32* %0)
%4 = load i32, i32* %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ array_is_sorted(int *, unsigned int);
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ quick_sort_rec(int *, int /*<<< orphan*/, unsigned int);
void quick_sort(int *a, unsigned int length) {
  quick_sort_rec(a, 0, length - 1);
  assert(array_is_sorted(a, length));
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1050 <quick_sort_rec@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <array_is_sorted@plt>
mov    %eax,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%r14d
mov    %rdi,%rbx
lea    -0x1(%r14),%edx
xor    %esi,%esi
call   1050 <quick_sort_rec@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
call   1040 <array_is_sorted@plt>
mov    %eax,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub i32 %6, 1
%8 = call i32 @quick_sort_rec(i32* %5, i32 0, i32 %7)
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = call i32 @array_is_sorted(i32* %9, i32 %10)
%12 = call i32 @assert(i32 %11)
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1) {
%3 = add i32 %1, -1
%4 = tail call i32 @quick_sort_rec(i32* %0, i32 0, i32 %3)
%5 = tail call i32 @array_is_sorted(i32* %0, i32 %1)
%6 = tail call i32 @assert(i32 %5)
ret void
}
int fun616() { return 616; }


x86 assembly (clang, -O0):
<fun616>:
push   %rbp
mov    %rsp,%rbp
mov    $0x268,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun616>:
mov    $0x268,%eax
ret

LLVM IR (-O0):
define i32 @fun616() {
ret i32 616
}

LLVM IR (-O2):
define i32 @fun616() {
ret i32 616
}
/* Variables and functions */
char const *remote_s3();
const char *__attribute__((section(".test.c"))) call_remote_s3(void) {
  return remote_s3() + 1;
}


x86 assembly (clang, -O0):
<call_remote_s3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <remote_s3@plt>
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_remote_s3>:
push   %rax
xor    %eax,%eax
call   1030 <remote_s3@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @call_remote_s3() section ".test.c" {
%1 = call i8* (...) @remote_s3()
%2 = getelementptr inbounds i8, i8* %1, i64 1
ret i8* %2
}

LLVM IR (-O2):
define i8* @call_remote_s3() section ".test.c" {
%1 = tail call i8* (...) @remote_s3()
%2 = getelementptr inbounds i8, i8* %1, i64 1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char, unsigned char, unsigned char,
                          unsigned char, unsigned char, unsigned char);
void print_mac(unsigned char *buf) {
  printf("%02x:%02x:%02x:%02x:%02x:%02x\n", buf[0], buf[1], buf[2], buf[3],
         buf[4], buf[5]);
}


x86 assembly (clang, -O0):
<print_mac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%sil
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%dl
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x8(%rbp),%rax
mov    0x3(%rax),%r8b
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%r9b
mov    -0x8(%rbp),%rax
lea    0xeb4(%rip),%rdi
movzbl %sil,%esi
movzbl %dl,%edx
movzbl %cl,%ecx
movzbl %r8b,%r8d
movzbl %r9b,%r9d
movzbl 0x5(%rax),%eax
mov    %eax,(%rsp)
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_mac>:
push   %rax
movzbl (%rdi),%esi
movzbl 0x1(%rdi),%edx
movzbl 0x2(%rdi),%ecx
movzbl 0x3(%rdi),%r8d
movzbl 0x4(%rdi),%r9d
movzbl 0x5(%rdi),%eax
mov    %eax,(%rsp)
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [31 x i8] c"%02x:%02x:%02x:%02x:%02x:%02x\0A\00"
define void @print_mac(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 2
%11 = load i8, i8* %10
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i64 3
%14 = load i8, i8* %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 4
%17 = load i8, i8* %16
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i64 5
%20 = load i8, i8* %19
%21 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8 zeroext %5, i8 zeroext %8, i8 zeroext %11, i8 zeroext %14, i8 zeroext %17, i8 zeroext %20)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"%02x:%02x:%02x:%02x:%02x:%02x\0A\00"
define void @print_mac(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
%5 = getelementptr inbounds i8, i8* %0, i64 2
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %0, i64 3
%8 = load i8, i8* %7
%9 = getelementptr inbounds i8, i8* %0, i64 4
%10 = load i8, i8* %9
%11 = getelementptr inbounds i8, i8* %0, i64 5
%12 = load i8, i8* %11
%13 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8 zeroext %2, i8 zeroext %4, i8 zeroext %6, i8 zeroext %8, i8 zeroext %10, i8 zeroext %12)
ret void
}
int ZBarcode_Version() { return (2 * 10000) + (9 * 100) + 0; }


x86 assembly (clang, -O0):
<ZBarcode_Version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x51a4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZBarcode_Version>:
mov    $0x51a4,%eax
ret

LLVM IR (-O0):
define i32 @ZBarcode_Version() {
ret i32 20900
}

LLVM IR (-O2):
define i32 @ZBarcode_Version() {
ret i32 20900
}
/* Variables and functions */
int llib_opt_get_short(int, char **, char const *, void *);
__attribute__((unused)) int getopt(int argc, char *argv[],
                                   const char *optstring) {
  return llib_opt_get_short(argc, argv, optstring, (void *)0);
}


x86 assembly (clang, -O0):
<getopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <llib_opt_get_short@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getopt>:
xor    %ecx,%ecx
jmp    1030 <llib_opt_get_short@plt>

LLVM IR (-O0):
define i32 @getopt(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load i8*, i8** %6
%10 = call i32 @llib_opt_get_short(i32 %7, i8** %8, i8* %9, i8* null)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getopt(i32 %0, i8** %1, i8* %2) {
%4 = tail call i32 @llib_opt_get_short(i32 %0, i8** %1, i8* %2, i8* null)
ret i32 %4
}
int fun1195() { return 1195; }


x86 assembly (clang, -O0):
<fun1195>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4ab,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1195>:
mov    $0x4ab,%eax
ret

LLVM IR (-O0):
define i32 @fun1195() {
ret i32 1195
}

LLVM IR (-O2):
define i32 @fun1195() {
ret i32 1195
}
void foo3a() {}


x86 assembly (clang, -O0):
<foo3a>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo3a>:
ret

LLVM IR (-O0):
define void @foo3a() {
ret void
}

LLVM IR (-O2):
define void @foo3a() {
ret void
}
/* Type definitions */
struct strbuf {
  int dummy;
};
struct child_process {
  int dummy;
};

/* Variables and functions */
int pipe_command(struct child_process *, int /*<<< orphan*/ *,
                 int /*<<< orphan*/, struct strbuf *, size_t,
                 int /*<<< orphan*/ *, int /*<<< orphan*/);
int capture_command(struct child_process *cmd, struct strbuf *out,
                    size_t hint) {
  return pipe_command(cmd, NULL, 0, out, hint, NULL, 0);
}


x86 assembly (clang, -O0):
<capture_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
xor    %eax,%eax
mov    %eax,%r9d
xor    %edx,%edx
mov    %r9,%rsi
movl   $0x0,(%rsp)
call   1030 <pipe_command@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capture_command>:
push   %rax
mov    %rdx,%r8
mov    %rsi,%rcx
movl   $0x0,(%rsp)
xor    %esi,%esi
xor    %edx,%edx
xor    %r9d,%r9d
call   1030 <pipe_command@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.child_process = type { i32 }
%struct.strbuf = type { i32 }
define i32 @capture_command(%struct.child_process* %0, %struct.strbuf* %1, i64 %2) {
%4 = alloca %struct.child_process*
%5 = alloca %struct.strbuf*
%6 = alloca i64
store %struct.child_process* %0, %struct.child_process** %4
store %struct.strbuf* %1, %struct.strbuf** %5
store i64 %2, i64* %6
%7 = load %struct.child_process*, %struct.child_process** %4
%8 = load %struct.strbuf*, %struct.strbuf** %5
%9 = load i64, i64* %6
%10 = call i32 @pipe_command(%struct.child_process* %7, i32* null, i32 0, %struct.strbuf* %8, i64 %9, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.child_process = type { i32 }
%struct.strbuf = type { i32 }
define i32 @capture_command(%struct.child_process* %0, %struct.strbuf* %1, i64 %2) {
%4 = tail call i32 @pipe_command(%struct.child_process* %0, i32* null, i32 0, %struct.strbuf* %1, i64 %2, i32* null, i32 0)
ret i32 %4
}
void stdio_clear_arena(void) {}


x86 assembly (clang, -O0):
<stdio_clear_arena>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdio_clear_arena>:
ret

LLVM IR (-O0):
define void @stdio_clear_arena() {
ret void
}

LLVM IR (-O2):
define void @stdio_clear_arena() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void cube(int n) { printf("Cube of %d = %d\n", n, n * n * n); }


x86 assembly (clang, -O0):
<cube>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%edx
imul   -0x4(%rbp),%edx
imul   -0x4(%rbp),%edx
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cube>:
mov    %edi,%esi
mov    %edi,%edx
imul   %edi,%edx
imul   %edi,%edx
lea    0xedf(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Cube of %d = %d\0A\00"
define void @cube(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
%7 = load i32, i32* %2
%8 = mul nsw i32 %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Cube of %d = %d\0A\00"
define void @cube(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = mul nsw i32 %2, %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %3)
ret void
}
float func(float x) { return ((x * x * x) - x - 4); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  0xec6(%rip),%xmm1
subss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
subss  %xmm0,%xmm1
addss  0xee9(%rip),%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @func(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = load float, float* %2
%8 = fneg float %7
%9 = call float @llvm.fmuladd.f32(float %5, float %6, float %8)
%10 = fsub float %9, 4.000000e+00
ret float %10
}

LLVM IR (-O2):
define float @func(float %0) {
%2 = fmul float %0, %0
%3 = fneg float %0
%4 = tail call float @llvm.fmuladd.f32(float %2, float %0, float %3)
%5 = fadd float %4, -4.000000e+00
ret float %5
}
/* Type definitions */
struct cpufreq_available_governors {
  int dummy;
};

/* Variables and functions */
struct cpufreq_available_governors *sysfs_get_available_governors(unsigned int);
struct cpufreq_available_governors *
cpufreq_get_available_governors(unsigned int cpu) {
  return sysfs_get_available_governors(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_available_governors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfs_get_available_governors@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_available_governors>:
jmp    1030 <sysfs_get_available_governors@plt>

LLVM IR (-O0):
%struct.cpufreq_available_governors = type { i32 }
define %struct.cpufreq_available_governors* @cpufreq_get_available_governors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_available_governors* @sysfs_get_available_governors(i32 %3)
ret %struct.cpufreq_available_governors* %4
}

LLVM IR (-O2):
%struct.cpufreq_available_governors = type { i32 }
define %struct.cpufreq_available_governors* @cpufreq_get_available_governors(i32 %0) {
%2 = tail call %struct.cpufreq_available_governors* @sysfs_get_available_governors(i32 %0)
ret %struct.cpufreq_available_governors* %2
}
/* Variables and functions */
void *malloc(size_t);
void *pffft_aligned_malloc(size_t nb_bytes) {
  void *p, *p0 = malloc(nb_bytes + 64);
  if (!p0)
    return (void *)0;
  p = (void *)(((size_t)p0 + 64) & (~((size_t)(64 - 1))));
  *((void **)p - 1) = p0;
  return p;
}


x86 assembly (clang, -O0):
<pffft_aligned_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x40,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1145 <pffft_aligned_malloc+0x35>
movq   $0x0,-0x8(%rbp)
jmp    1169 <pffft_aligned_malloc+0x59>
mov    -0x20(%rbp),%rax
add    $0x40,%rax
and    $0xffffffffffffffc0,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,-0x8(%rax)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pffft_aligned_malloc>:
push   %rax
add    $0x40,%rdi
call   1030 <malloc@plt>
test   %rax,%rax
je     1130 <pffft_aligned_malloc+0x20>
mov    %rax,%rcx
add    $0x40,%rax
and    $0xffffffffffffffc0,%rax
mov    %rcx,-0x8(%rax)
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @pffft_aligned_malloc(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
store i64 %0, i64* %3
%6 = load i64, i64* %3
%7 = add i64 %6, 64
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %1
store i8* null, i8** %2
br label %23
12: ; preds = %1
%13 = load i8*, i8** %5
%14 = ptrtoint i8* %13 to i64
%15 = add i64 %14, 64
%16 = and i64 %15, -64
%17 = inttoptr i64 %16 to i8*
store i8* %17, i8** %4
%18 = load i8*, i8** %5
%19 = load i8*, i8** %4
%20 = bitcast i8* %19 to i8**
%21 = getelementptr inbounds i8*, i8** %20, i64 -1
store i8* %18, i8** %21
%22 = load i8*, i8** %4
store i8* %22, i8** %2
br label %23
23: ; preds = %12, %11
%24 = load i8*, i8** %2
ret i8* %24
}

LLVM IR (-O2):
define i8* @pffft_aligned_malloc(i64 %0) {
%2 = add i64 %0, 64
%3 = tail call i8* @malloc(i64 %2)
%4 = icmp eq i8* %3, null
br i1 %4, label %12, label %5
5: ; preds = %1
%6 = ptrtoint i8* %3 to i64
%7 = add i64 %6, 64
%8 = and i64 %7, -64
%9 = inttoptr i64 %8 to i8*
%10 = inttoptr i64 %8 to i8**
%11 = getelementptr inbounds i8*, i8** %10, i64 -1
store i8* %3, i8** %11
br label %12
12: ; preds = %1, %5
%13 = phi i8* [ %9, %5 ], [ null, %1 ]
ret i8* %13
}
/* Type definitions */
struct timespec {
  long tv_sec;
  long tv_nsec;
};

/* Variables and functions */
extern long difftimespec(struct timespec t1, struct timespec t0) {
  long d = t1.tv_sec - t0.tv_sec;
  d *= 1000;
  d += (t1.tv_nsec - t0.tv_nsec) / (long)(1e6);
  return d;
}


x86 assembly (clang, -O0):
<difftimespec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
imul   $0x3e8,-0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    $0xf4240,%ecx
cqto
idiv   %rcx
add    -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<difftimespec>:
mov    %rsi,%rax
sub    %rdx,%rdi
imul   $0x3e8,%rdi,%rsi
sub    %rcx,%rax
movabs $0x431bde82d7b634db,%rcx
de 1b 43
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x12,%rdx
add    %rdx,%rax
add    %rsi,%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i64 @difftimespec(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca %struct.timespec
%6 = alloca %struct.timespec
%7 = alloca i64
%8 = bitcast %struct.timespec* %5 to { i64, i64 }*
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 0
store i64 %0, i64* %9
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 1
store i64 %1, i64* %10
%11 = bitcast %struct.timespec* %6 to { i64, i64 }*
%12 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %11, i32 0, i32 0
store i64 %2, i64* %12
%13 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %11, i32 0, i32 1
store i64 %3, i64* %13
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%15 = load i64, i64* %14
%16 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 0
%17 = load i64, i64* %16
%18 = sub nsw i64 %15, %17
store i64 %18, i64* %7
%19 = load i64, i64* %7
%20 = mul nsw i64 %19, 1000
store i64 %20, i64* %7
%21 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 1
%22 = load i64, i64* %21
%23 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 1
%24 = load i64, i64* %23
%25 = sub nsw i64 %22, %24
%26 = sdiv i64 %25, 1000000
%27 = load i64, i64* %7
%28 = add nsw i64 %27, %26
store i64 %28, i64* %7
%29 = load i64, i64* %7
ret i64 %29
}

LLVM IR (-O2):
define i64 @difftimespec(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = sub nsw i64 %0, %2
%6 = mul nsw i64 %5, 1000
%7 = sub nsw i64 %1, %3
%8 = sdiv i64 %7, 1000000
%9 = add nsw i64 %8, %6
ret i64 %9
}
/* Variables and functions */
int ssds_get_gen_name(int, int /*<<< orphan*/ *, char *, char *, char *, int);
int ssds_get_vers(int pcfd, char *res, int len) {
  return ssds_get_gen_name(pcfd, NULL, "get_name", "vers", res, len);
}


x86 assembly (clang, -O0):
<ssds_get_vers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%r8
mov    -0x14(%rbp),%r9d
xor    %eax,%eax
mov    %eax,%esi
lea    0xec8(%rip),%rdx
lea    0xeca(%rip),%rcx
call   1030 <ssds_get_gen_name@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssds_get_vers>:
mov    %edx,%r9d
mov    %rsi,%r8
lea    0xee3(%rip),%rdx
lea    0xee5(%rip),%rcx
xor    %esi,%esi
jmp    1030 <ssds_get_gen_name@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"get_name\00"
@.str.1 = [5 x i8] c"vers\00"
define i32 @ssds_get_vers(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @ssds_get_gen_name(i32 %7, i32* null, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
@.str = [9 x i8] c"get_name\00"
@.str.1 = [5 x i8] c"vers\00"
define i32 @ssds_get_vers(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @ssds_get_gen_name(i32 %0, i32* null, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ nrf_write(int, unsigned char const *, int);
void __attribute__((unused)) nrf_tx_addr(const unsigned char *addr) {
  nrf_write(0x20 | 0x10, addr, 5);
}


x86 assembly (clang, -O0):
<nrf_tx_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x30,%edi
mov    $0x5,%edx
call   1030 <nrf_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_tx_addr>:
mov    %rdi,%rsi
mov    $0x30,%edi
mov    $0x5,%edx
jmp    1030 <nrf_write@plt>

LLVM IR (-O0):
define void @nrf_tx_addr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @nrf_write(i32 48, i8* %3, i32 5)
ret void
}

LLVM IR (-O2):
define void @nrf_tx_addr(i8* %0) {
%2 = tail call i32 @nrf_write(i32 48, i8* %0, i32 5)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
char **collect_anagrams(char *anagrams[], int len) {
  char **ret = (char **)malloc(len * sizeof(char));
  return ret;
}


x86 assembly (clang, -O0):
<collect_anagrams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<collect_anagrams>:
mov    %esi,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8** @collect_anagrams(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i8**
store i8** %0, i8*** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 1
%9 = trunc i64 %8 to i32
%10 = call i64 @malloc(i32 %9)
%11 = inttoptr i64 %10 to i8**
store i8** %11, i8*** %5
%12 = load i8**, i8*** %5
ret i8** %12
}

LLVM IR (-O2):
define i8** @collect_anagrams(i8** nocapture readnone %0, i32 %1) {
%3 = tail call i64 @malloc(i32 %1)
%4 = inttoptr i64 %3 to i8**
ret i8** %4
}
/* Variables and functions */
int errno;
int faccessat(int, char const *, int, int);
int __sulong_posix_faccessat(int fd, const char *path, int amode, int flag) {
  {
    int native_errno = errno;
    int result = faccessat(fd, path, amode, flag);
    if (result == (int)-1) {
      result = (int)(long)-errno;
    }
    errno = native_errno;
    return result;
  };
}


x86 assembly (clang, -O0):
<__sulong_posix_faccessat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <faccessat@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0xffffffff,-0x20(%rbp)
jne    1160 <__sulong_posix_faccessat+0x50>
xor    %eax,%eax
mov    0x2e87(%rip),%rcx
sub    (%rcx),%eax
cltq
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%ecx
mov    0x2e76(%rip),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sulong_posix_faccessat>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <faccessat@plt>
xor    %ecx,%ecx
sub    (%rbx),%ecx
cmp    $0xffffffff,%eax
cmove  %ecx,%eax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @__sulong_posix_faccessat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* @errno
store i32 %11, i32* %9
%12 = load i32, i32* %5
%13 = load i8*, i8** %6
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = call i32 @faccessat(i32 %12, i8* %13, i32 %14, i32 %15)
store i32 %16, i32* %10
%17 = load i32, i32* %10
%18 = icmp eq i32 %17, -1
br i1 %18, label %19, label %24
19: ; preds = %4
%20 = load i32, i32* @errno
%21 = sub nsw i32 0, %20
%22 = sext i32 %21 to i64
%23 = trunc i64 %22 to i32
store i32 %23, i32* %10
br label %24
24: ; preds = %19, %4
%25 = load i32, i32* %9
store i32 %25, i32* @errno
%26 = load i32, i32* %10
ret i32 %26
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @__sulong_posix_faccessat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = load i32, i32* @errno
%6 = tail call i32 @faccessat(i32 %0, i8* %1, i32 %2, i32 %3)
%7 = icmp eq i32 %6, -1
%8 = load i32, i32* @errno
%9 = sub nsw i32 0, %8
%10 = select i1 %7, i32 %9, i32 %6
store i32 %5, i32* @errno
ret i32 %10
}
long core__math___Int____124d(long self, long p0) {
  long var;
  long var1;
  var1 = self | p0;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core__math___Int____124d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core__math___Int____124d>:
mov    %rdi,%rax
or     %rsi,%rax
ret

LLVM IR (-O0):
define i64 @core__math___Int____124d(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = or i64 %7, %8
store i64 %9, i64* %6
%10 = load i64, i64* %6
store i64 %10, i64* %5
br label %11
11: ; preds = %2
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @core__math___Int____124d(i64 %0, i64 %1) {
%3 = or i64 %1, %0
ret i64 %3
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
long syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
             int, int, unsigned long);
long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu,
                     int group_fd, unsigned long flags) {
  return syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i64 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load i32, i32* @__NR_perf_event_open
%12 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i64, i64* %10
%17 = call i64 @syscall(i32 %11, %struct.perf_event_attr* %12, i32 %13, i32 %14, i32 %15, i64 %16)
ret i64 %17
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i64 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @__NR_perf_event_open
%7 = tail call i64 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
ret i64 %7
}
void Ptask2Mtask(void) { return; }


x86 assembly (clang, -O0):
<Ptask2Mtask>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ptask2Mtask>:
ret

LLVM IR (-O0):
define void @Ptask2Mtask() {
ret void
}

LLVM IR (-O2):
define void @Ptask2Mtask() {
ret void
}
int test_imm_04uint16_mem(unsigned short *val) {
  return ((*val) & (-0x04 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_04uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xfffffffc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_04uint16_mem>:
cmpw   $0x4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_04uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -4
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_04uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = icmp ult i16 %2, 4
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ draw_msg_at_color(int, int, int /*<<< orphan*/, int);
void grey_hilite_msg_at(int x, int y) { draw_msg_at_color(x, y, 0, 80); }


x86 assembly (clang, -O0):
<grey_hilite_msg_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %edx,%edx
mov    $0x50,%ecx
call   1030 <draw_msg_at_color@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grey_hilite_msg_at>:
xor    %edx,%edx
mov    $0x50,%ecx
jmp    1030 <draw_msg_at_color@plt>

LLVM IR (-O0):
define void @grey_hilite_msg_at(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @draw_msg_at_color(i32 %5, i32 %6, i32 0, i32 80)
ret void
}

LLVM IR (-O2):
define void @grey_hilite_msg_at(i32 %0, i32 %1) {
%3 = tail call i32 @draw_msg_at_color(i32 %0, i32 %1, i32 0, i32 80)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __dbg_check_suspend();
int /*<<< orphan*/ port_suspend();
void chSysSuspend(void) {
  port_suspend();
  __dbg_check_suspend();
}


x86 assembly (clang, -O0):
<chSysSuspend>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <port_suspend@plt>
mov    $0x0,%al
call   1040 <__dbg_check_suspend@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chSysSuspend>:
push   %rax
xor    %eax,%eax
call   1030 <port_suspend@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <__dbg_check_suspend@plt>

LLVM IR (-O0):
define void @chSysSuspend() {
%1 = call i32 (...) @port_suspend()
%2 = call i32 (...) @__dbg_check_suspend()
ret void
}

LLVM IR (-O2):
define void @chSysSuspend() {
%1 = tail call i32 (...) @port_suspend()
%2 = tail call i32 (...) @__dbg_check_suspend()
ret void
}
int c40_close(c40_fd)
int c40_fd;
{ return (close(c40_fd)); }


x86 assembly (clang, -O0):
<c40_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c40_close>:
xor    %eax,%eax
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @c40_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @close to i32 (i32, ...)*)(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @c40_close(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @close to i32 (i32, ...)*)(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void TimerIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000018))) &= ~(ui32IntFlags);
}


x86 assembly (clang, -O0):
<TimerIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerIntDisable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
not    %rax
mov    -0x8(%rsp),%rcx
and    %rax,0x18(%rcx)
ret

LLVM IR (-O0):
define void @TimerIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load volatile i64, i64* %3
%8 = add i64 %7, 24
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @TimerIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load volatile i64, i64* %3
%8 = add i64 %7, 24
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void print_array(int *p, int n) {
  int i;
  for (i = 0; i < n; i++)
    printf("p[%d] = %d\n", i, p[i]);
}


x86 assembly (clang, -O0):
<print_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <print_array+0x4a>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_array+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <print_array+0x37>
mov    %rdi,%r14
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print_array+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"p[%d] = %d\0A\00"
define void @print_array(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %16)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"p[%d] = %d\0A\00"
define void @print_array(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = trunc i64 %7 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %9)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret void
}
int getSmallestFactor(int a) {
  int i = 2;
  while (i * i <= a) {
    if (a % i == 0) {
      return i;
    }
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<getSmallestFactor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1147 <getSmallestFactor+0x47>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1139 <getSmallestFactor+0x39>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114e <getSmallestFactor+0x4e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <getSmallestFactor+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSmallestFactor>:
xor    %ecx,%ecx
cmp    $0x4,%edi
jl     1125 <getSmallestFactor+0x25>
mov    $0x2,%esi
nopl   0x0(%rax)
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1128 <getSmallestFactor+0x28>
add    $0x1,%esi
mov    %esi,%eax
imul   %esi,%eax
cmp    %edi,%eax
jle    1110 <getSmallestFactor+0x10>
mov    %ecx,%eax
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @getSmallestFactor(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %5
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %11
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %22
18: ; preds = %11
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %5
21: ; preds = %5
store i32 0, i32* %2
br label %22
22: ; preds = %21, %16
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @getSmallestFactor(i32 %0) {
%2 = icmp slt i32 %0, 4
br i1 %2, label %11, label %3
3: ; preds = %1, %7
%4 = phi i32 [ %8, %7 ], [ 2, %1 ]
%5 = srem i32 %0, %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %3
%8 = add nuw nsw i32 %4, 1
%9 = mul nsw i32 %8, %8
%10 = icmp sgt i32 %9, %0
br i1 %10, label %11, label %3
11: ; preds = %3, %7, %1
%12 = phi i32 [ 0, %1 ], [ 0, %7 ], [ %4, %3 ]
ret i32 %12
}
int toi_alloc_init(void) { return 0; }


x86 assembly (clang, -O0):
<toi_alloc_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toi_alloc_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @toi_alloc_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @toi_alloc_init() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ array;

/* Variables and functions */
int /*<<< orphan*/ printArray(int *, int);
int main(int argc, char const *argv[]) {
  int array[10] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
  printArray(array, sizeof(array) / sizeof(array[0]));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xebf(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
lea    -0x40(%rbp),%rdi
mov    $0xa,%esi
call   1040 <printArray@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
mov    0xf05(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0xa,%esi
call   1030 <printArray@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.array = [10 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [10 x i32]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [10 x i32]* %6 to i8*
%8 = getelementptr inbounds [10 x i32], [10 x i32]* %6, i64 0, i64 0
%9 = call i32 @printArray(i32* %8, i32 10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.array = [10 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9]
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [10 x i32]
%4 = bitcast [10 x i32]* %3 to i8*
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 0
%6 = call i32 @printArray(i32* %5, i32 10)
ret i32 0
}
/* Variables and functions */
int iptables_do_command(char *, char const *);
int iptables_unallow_mac(const char mac[]) {
  return iptables_do_command("-t mangle -D "
                             "ndsBLK"
                             " -m mac --mac-source %s -j RETURN",
                             mac);
}


x86 assembly (clang, -O0):
<iptables_unallow_mac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <iptables_do_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iptables_unallow_mac>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <iptables_do_command@plt>

LLVM IR (-O0):
@.str = [53 x i8] c"-t mangle -D ndsBLK -m mac --mac-source %s -j RETURN\00"
define i32 @iptables_unallow_mac(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @iptables_do_command(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [53 x i8] c"-t mangle -D ndsBLK -m mac --mac-source %s -j RETURN\00"
define i32 @iptables_unallow_mac(i8* %0) {
%2 = tail call i32 @iptables_do_command(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
double f(double x) { return x * x - 7 * x + 12; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  0xeed(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xeb9(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
addsd  0xeec(%rip),%xmm0
ret

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fmul double 7.000000e+00, %5
%7 = fneg double %6
%8 = call double @llvm.fmuladd.f64(double %3, double %4, double %7)
%9 = fadd double %8, 1.200000e+01
ret double %9
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = fmul double %0, -7.000000e+00
%3 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %2)
%4 = fadd double %3, 1.200000e+01
ret double %4
}
/* Variables and functions */
double incomplete_beta(double, double, double, char const *);
double beta_distr(double a, double b, double x, const char *prompt) {
  return incomplete_beta(a, b, x, prompt);
}


x86 assembly (clang, -O0):
<beta_distr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
mov    %rdi,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
mov    -0x20(%rbp),%rdi
call   1030 <incomplete_beta@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beta_distr>:
jmp    1030 <incomplete_beta@plt>

LLVM IR (-O0):
define double @beta_distr(double %0, double %1, double %2, i8* %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca i8*
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store i8* %3, i8** %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = load double, double* %7
%12 = load i8*, i8** %8
%13 = call double @incomplete_beta(double %9, double %10, double %11, i8* %12)
ret double %13
}

LLVM IR (-O2):
define double @beta_distr(double %0, double %1, double %2, i8* %3) {
%5 = tail call double @incomplete_beta(double %0, double %1, double %2, i8* %3)
ret double %5
}