xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ gpu_send_control_gp0(int);
void gpu_draw_range(int x1, int y1, int x2, int y2) {
  gpu_send_control_gp0(0xE3000000 | (x1 & 0x3FF) | ((y1 & 0x3FF) << 10));
  gpu_send_control_gp0(0xE4000000 | (x2 & 0x3FF) | ((y2 & 0x3FF) << 10));
}


x86 assembly (clang, -O0):
<gpu_draw_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0x3ff,%edi
or     $0xe3000000,%edi
mov    -0x8(%rbp),%eax
and    $0x3ff,%eax
shl    $0xa,%eax
or     %eax,%edi
call   1030 <gpu_send_control_gp0@plt>
mov    -0xc(%rbp),%edi
and    $0x3ff,%edi
or     $0xe4000000,%edi
mov    -0x10(%rbp),%eax
and    $0x3ff,%eax
shl    $0xa,%eax
or     %eax,%edi
call   1030 <gpu_send_control_gp0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpu_draw_range>:
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%r14d
and    $0x3ff,%edi
shl    $0xa,%esi
and    $0xffc00,%esi
add    %esi,%edi
add    $0xe3000000,%edi
call   1030 <gpu_send_control_gp0@plt>
and    $0x3ff,%r14d
shl    $0xa,%ebx
and    $0xffc00,%ebx
lea    (%r14,%rbx,1),%edi
add    $0xe4000000,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <gpu_send_control_gp0@plt>

LLVM IR (-O0):
define void @gpu_draw_range(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = and i32 %9, 1023
%11 = or i32 -486539264, %10
%12 = load i32, i32* %6
%13 = and i32 %12, 1023
%14 = shl i32 %13, 10
%15 = or i32 %11, %14
%16 = call i32 @gpu_send_control_gp0(i32 %15)
%17 = load i32, i32* %7
%18 = and i32 %17, 1023
%19 = or i32 -469762048, %18
%20 = load i32, i32* %8
%21 = and i32 %20, 1023
%22 = shl i32 %21, 10
%23 = or i32 %19, %22
%24 = call i32 @gpu_send_control_gp0(i32 %23)
ret void
}

LLVM IR (-O2):
define void @gpu_draw_range(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %0, 1023
%6 = shl i32 %1, 10
%7 = and i32 %6, 1047552
%8 = or i32 %5, %7
%9 = or i32 %8, -486539264
%10 = tail call i32 @gpu_send_control_gp0(i32 %9)
%11 = and i32 %2, 1023
%12 = shl i32 %3, 10
%13 = and i32 %12, 1047552
%14 = or i32 %11, %13
%15 = or i32 %14, -469762048
%16 = tail call i32 @gpu_send_control_gp0(i32 %15)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x59() {
  Assert_real((isbdigit(89) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              450, ("isbdigit should be 0 for Y"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x59>:
push   %rbp
mov    %rsp,%rbp
mov    $0x59,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1c2,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x59>:
push   %rax
mov    $0x59,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x1c2,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for Y\00"
define void @t_isbdigit_0x59() {
%1 = call i64 @isbdigit(i32 89)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 450, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for Y\00"
define void @t_isbdigit_0x59() {
%1 = tail call i64 @isbdigit(i32 89)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 450, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int strcmp(const char *cs, const char *ct) {
  int d0, d1;
  register int __res;
  __asm__ __volatile__("cld\n"
                       "1:\tlodsb\n\t"
                       "scasb\n\t"
                       "jne 2f\n\t"
                       "testb %%al,%%al\n\t"
                       "jne 1b\n\t"
                       "xorl %%eax,%%eax\n\t"
                       "jmp 3f\n"
                       "2:\tsbbl %%eax,%%eax\n\t"
                       "orb $1,%%al\n"
                       "3:"
                       : "=a"(__res), "=&S"(d0), "=&D"(d1)
                       : "1"(cs), "2"(ct));
  return __res;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdi
cld
lods   %ds:(%rsi),%al
scas   %es:(%rdi),%al
jne    112c <strcmp+0x2c>
test   %al,%al
jne    1115 <strcmp+0x15>
xor    %eax,%eax
jmp    1130 <strcmp+0x30>
sbb    %eax,%eax
or     $0x1,%al
mov    %eax,-0x1c(%rbp)
mov    %esi,%eax
mov    %eax,-0x14(%rbp)
mov    %edi,%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    %rsi,%rax
mov    %rdi,%rsi
mov    %rax,%rdi
cld
lods   %ds:(%rsi),%al
scas   %es:(%rdi),%al
jne    1116 <strcmp+0x16>
test   %al,%al
jne    110a <strcmp+0xa>
xor    %eax,%eax
jmp    111a <strcmp+0x1a>
sbb    %eax,%eax
or     $0x1,%al
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call { i32, i8*, i8* } asm sideeffect "cld\0A1:\09lodsb\0A\09scasb\0A\09jne 2f\0A\09testb %al,%al\0A\09jne 1b\0A\09xorl %eax,%eax\0A\09jmp 3f\0A2:\09sbbl %eax,%eax\0A\09orb $$1,%al\0A3:", "={ax},=&{si},=&{di},1,2,~{dirflag},~{fpsr},~{flags}"(i8* %8, i8* %9)
%11 = extractvalue { i32, i8*, i8* } %10, 0
%12 = extractvalue { i32, i8*, i8* } %10, 1
%13 = extractvalue { i32, i8*, i8* } %10, 2
store i32 %11, i32* %7
%14 = ptrtoint i8* %12 to i64
%15 = trunc i64 %14 to i32
store i32 %15, i32* %5
%16 = ptrtoint i8* %13 to i64
%17 = trunc i64 %16 to i32
store i32 %17, i32* %6
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = tail call { i32, i8*, i8* } asm sideeffect "cld\0A1:\09lodsb\0A\09scasb\0A\09jne 2f\0A\09testb %al,%al\0A\09jne 1b\0A\09xorl %eax,%eax\0A\09jmp 3f\0A2:\09sbbl %eax,%eax\0A\09orb $$1,%al\0A3:", "={ax},=&{si},=&{di},1,2,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1)
%4 = extractvalue { i32, i8*, i8* } %3, 0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void slab_depot_free(void *slab) { free(slab); }


x86 assembly (clang, -O0):
<slab_depot_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slab_depot_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @slab_depot_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @slab_depot_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void TIM2_IC12_IRQHandler(void) {}


x86 assembly (clang, -O0):
<TIM2_IC12_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM2_IC12_IRQHandler>:
ret

LLVM IR (-O0):
define void @TIM2_IC12_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @TIM2_IC12_IRQHandler() {
ret void
}
/* Type definitions */
typedef unsigned char volatile uint32_t;

/* Variables and functions */
uint32_t EventSwEventGet(uint32_t ui32SwEvent) {
  ;
  return (
      (*((volatile unsigned char *)(0x40083000 + 0x00000F00 + ui32SwEvent))));
}


x86 assembly (clang, -O0):
<EventSwEventGet>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
movzbl %al,%eax
add    $0x40083f00,%eax
cltq
mov    (%rax),%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EventSwEventGet>:
mov    %dil,-0x1(%rsp)
movzbl -0x1(%rsp),%eax
mov    0x40083f00(%rax),%al
ret

LLVM IR (-O0):
define zeroext i8 @EventSwEventGet(i8 zeroext %0) {
%2 = alloca i8
store volatile i8 %0, i8* %2
%3 = load volatile i8, i8* %2
%4 = zext i8 %3 to i32
%5 = add nsw i32 1074282240, %4
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
%8 = load volatile i8, i8* %7
ret i8 %8
}

LLVM IR (-O2):
define zeroext i8 @EventSwEventGet(i8 zeroext %0) {
%2 = alloca i8
store volatile i8 %0, i8* %2
%3 = load volatile i8, i8* %2
%4 = zext i8 %3 to i64
%5 = or i64 %4, 1074282240
%6 = inttoptr i64 %5 to i8*
%7 = load volatile i8, i8* %6
ret i8 %7
}
/* Variables and functions */
int /*<<< orphan*/ not_defined();
int main(void) { not_defined(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <not_defined@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <not_defined@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @not_defined()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @not_defined()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_agile_rbtree();
int main() {
  test_agile_rbtree();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_agile_rbtree@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_agile_rbtree@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_agile_rbtree()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_agile_rbtree()
ret i32 0
}
/* Variables and functions */
int strcmp(char *const, char *const);
int cmpstr(const void *vs1, const void *vs2) {
  char *const *s1 = vs1;
  char *const *s2 = vs2;
  return strcmp(*s1, *s2);
}


x86 assembly (clang, -O0):
<cmpstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
mov    -0x20(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpstr>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @cmpstr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
store i8** %8, i8*** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
store i8** %10, i8*** %6
%11 = load i8**, i8*** %5
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %6
%14 = load i8*, i8** %13
%15 = call i32 @strcmp(i8* %12, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @cmpstr(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %5, i8* dereferenceable(1) %6)
ret i32 %7
}
int z(double i) { return (i + (-2.0)) <= i; }


x86 assembly (clang, -O0):
<z>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm1
addsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<z>:
movsd  0xef8(%rip),%xmm1
addsd  %xmm0,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @z(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, -2.000000e+00
%5 = load double, double* %2
%6 = fcmp ole double %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @z(double %0) {
%2 = fadd double %0, -2.000000e+00
%3 = fcmp ole double %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
void setCommand(unsigned char *packet, unsigned char command) {
  packet[5] &= 0xf0;
  packet[5] |= command;
  packet[6] &= 0xf0;
  packet[6] |= command;
}


x86 assembly (clang, -O0):
<setCommand>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x5(%rax),%ecx
and    $0xf0,%ecx
mov    %cl,0x5(%rax)
movzbl -0x9(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl 0x5(%rax),%ecx
or     %edx,%ecx
mov    %cl,0x5(%rax)
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%ecx
and    $0xf0,%ecx
mov    %cl,0x6(%rax)
movzbl -0x9(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%ecx
or     %edx,%ecx
mov    %cl,0x6(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setCommand>:
mov    0x5(%rdi),%al
mov    0x6(%rdi),%cl
and    $0xf0,%al
or     %sil,%al
mov    %al,0x5(%rdi)
and    $0xf0,%cl
or     %sil,%cl
mov    %cl,0x6(%rdi)
ret

LLVM IR (-O0):
define void @setCommand(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 5
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = and i32 %8, 240
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 5
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = or i32 %16, %12
%18 = trunc i32 %17 to i8
store i8 %18, i8* %14
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i64 6
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = and i32 %22, 240
%24 = trunc i32 %23 to i8
store i8 %24, i8* %20
%25 = load i8, i8* %4
%26 = zext i8 %25 to i32
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i64 6
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = or i32 %30, %26
%32 = trunc i32 %31 to i8
store i8 %32, i8* %28
ret void
}

LLVM IR (-O2):
define void @setCommand(i8* nocapture %0, i8 zeroext %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 5
%4 = load i8, i8* %3
%5 = and i8 %4, -16
%6 = or i8 %5, %1
store i8 %6, i8* %3
%7 = getelementptr inbounds i8, i8* %0, i64 6
%8 = load i8, i8* %7
%9 = and i8 %8, -16
%10 = or i8 %9, %1
store i8 %10, i8* %7
ret void
}
/* Variables and functions */
scalar_t__ ERR;
scalar_t__ setupterm(char *, int, int *);
int curses_init(const char *term) {
  int err;
  if (setupterm((char *)term, 1, &err) == ERR) {
    return err - 2;
  }
  return 0;
}


x86 assembly (clang, -O0):
<curses_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
lea    -0x14(%rbp),%rdx
call   1030 <setupterm@plt>
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%rax
jne    114c <curses_init+0x3c>
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <curses_init+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curses_init>:
push   %rax
lea    0x4(%rsp),%rdx
mov    $0x1,%esi
call   1030 <setupterm@plt>
mov    0x2ec1(%rip),%rdx
mov    0x4(%rsp),%esi
add    $0xfffffffe,%esi
xor    %ecx,%ecx
cmp    (%rdx),%rax
cmove  %esi,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ERR = global i64 0
define i32 @curses_init(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @setupterm(i8* %5, i32 1, i32* %4)
%7 = load i64, i64* @ERR
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 2
store i32 %11, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@ERR = global i64 0
define i32 @curses_init(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i64 @setupterm(i8* %0, i32 1, i32* %2)
%5 = load i64, i64* @ERR
%6 = icmp eq i64 %4, %5
%7 = load i32, i32* %2
%8 = add nsw i32 %7, -2
%9 = select i1 %6, i32 %8, i32 0
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage(int result) {
  printf("Usage: utmpdump [ -froh ] [ filename ]\n");
  exit(result);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Usage: utmpdump [ -froh ] [ filename ]\0A\00"
define void @usage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
@str = [39 x i8] c"Usage: utmpdump [ -froh ] [ filename ]\00"
define void @usage(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 %0)
unreachable
}
void fa160(void) {
P0A:
  goto P0A;
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
a:
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    p02C:
      goto p02C;
      goto a;
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa160>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa160+0x4>

x86 assembly (clang, -O2):
<fa160>:
jmp    1100 <fa160>

LLVM IR (-O0):
define void @fa160() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; No predecessors!
br label %11
11: ; preds = %11, %10
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
br label %14
14: ; preds = %14, %13
br label %14
15: ; preds = %15
br label %15
16: ; No predecessors!
br label %17
17: ; preds = %17, %16
br label %17
18: ; No predecessors!
br label %19
19: ; preds = %19, %18
br label %19
20: ; preds = %20
br label %20
21: ; No predecessors!
br label %22
22: ; preds = %22, %21
br label %22
23: ; preds = %23
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa160() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ display;
};
struct TYPE_4__ {
  TYPE_1__ xconfigurerequest;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void *get_XEvent_xconfigurerequest_display(void *_p) {
  return (void *)((XEvent *)_p)->xconfigurerequest.display;
}


x86 assembly (clang, -O0):
<get_XEvent_xconfigurerequest_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xconfigurerequest_display>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i8* @get_XEvent_xconfigurerequest_display(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @get_XEvent_xconfigurerequest_display(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ pthread_setname_np(char *);
int /*<<< orphan*/ sleep(int);
void *second_thread(void *in) {
  pthread_setname_np("second thread");
  while (1)
    sleep(1);
  return NULL;
}


x86 assembly (clang, -O0):
<second_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <pthread_setname_np@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    1138 <second_thread+0x18>

x86 assembly (clang, -O2):
<second_thread>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <pthread_setname_np@plt>
nopl   (%rax)
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    1130 <second_thread+0x10>

LLVM IR (-O0):
@.str = [14 x i8] c"second thread\00"
define i8* @second_thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @pthread_setname_np(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %4
4: ; preds = %1, %4
%5 = call i32 @sleep(i32 1)
br label %4
}

LLVM IR (-O2):
@.str = [14 x i8] c"second thread\00"
define noalias i8* @second_thread(i8* nocapture readnone %0) {
%2 = tail call i32 @pthread_setname_np(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %1, %3
%4 = tail call i32 @sleep(i32 1)
br label %3
}
/* Type definitions */
struct vec3i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec3i_zero(int /*<<< orphan*/ *);
__attribute__((always_)) struct vec3i *psvec3i_zero(struct vec3i *result) {
  vec3i_zero((int32_t *)result);
  return result;
}


x86 assembly (clang, -O0):
<psvec3i_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vec3i_zero@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3i_zero>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec3i_zero@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec3i = type { i32 }
define %struct.vec3i* @psvec3i_zero(%struct.vec3i* %0) {
%2 = alloca %struct.vec3i*
store %struct.vec3i* %0, %struct.vec3i** %2
%3 = load %struct.vec3i*, %struct.vec3i** %2
%4 = bitcast %struct.vec3i* %3 to i32*
%5 = call i32 @vec3i_zero(i32* %4)
%6 = load %struct.vec3i*, %struct.vec3i** %2
ret %struct.vec3i* %6
}

LLVM IR (-O2):
%struct.vec3i = type { i32 }
define %struct.vec3i* @psvec3i_zero(%struct.vec3i* returned %0) {
%2 = getelementptr %struct.vec3i, %struct.vec3i* %0, i64 0, i32 0
%3 = tail call i32 @vec3i_zero(i32* %2)
ret %struct.vec3i* %0
}
/* Variables and functions */
int /*<<< orphan*/ emit_leairrx1(int /*<<< orphan*/, int, int, int);
void gen_tlb_addr_w(int ar, int map) {
  if (map >= 0) {
    emit_leairrx1(0, ar, map, ar);
  }
}


x86 assembly (clang, -O0):
<gen_tlb_addr_w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1138 <gen_tlb_addr_w+0x28>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
xor    %edi,%edi
call   1030 <emit_leairrx1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_tlb_addr_w>:
test   %esi,%esi
js     1121 <gen_tlb_addr_w+0x11>
mov    %esi,%edx
mov    %edi,%ecx
xor    %edi,%edi
mov    %ecx,%esi
jmp    1030 <emit_leairrx1@plt>
ret

LLVM IR (-O0):
define void @gen_tlb_addr_w(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = call i32 @emit_leairrx1(i32 0, i32 %8, i32 %9, i32 %10)
br label %12
12: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @gen_tlb_addr_w(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @emit_leairrx1(i32 0, i32 %0, i32 %1, i32 %0)
br label %6
6: ; preds = %4, %2
ret void
}
void ulong_done(struct flt *flt, void *ud, void *vinstance) {}


x86 assembly (clang, -O0):
<ulong_done>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulong_done>:
ret

LLVM IR (-O0):
%struct.flt = type opaque
define void @ulong_done(%struct.flt* %0, i8* %1, i8* %2) {
%4 = alloca %struct.flt*
%5 = alloca i8*
%6 = alloca i8*
store %struct.flt* %0, %struct.flt** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
%struct.flt = type opaque
define void @ulong_done(%struct.flt* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
void inNbr2inNbrUnit_inNbr() {}


x86 assembly (clang, -O0):
<inNbr2inNbrUnit_inNbr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inNbr2inNbrUnit_inNbr>:
ret

LLVM IR (-O0):
define void @inNbr2inNbrUnit_inNbr() {
ret void
}

LLVM IR (-O2):
define void @inNbr2inNbrUnit_inNbr() {
ret void
}
/* Variables and functions */
int diminuto_ipc_close(int);
int diminuto_ipc4_close(int fd) { return diminuto_ipc_close(fd); }


x86 assembly (clang, -O0):
<diminuto_ipc4_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <diminuto_ipc_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipc4_close>:
jmp    1030 <diminuto_ipc_close@plt>

LLVM IR (-O0):
define i32 @diminuto_ipc4_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @diminuto_ipc_close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @diminuto_ipc4_close(i32 %0) {
%2 = tail call i32 @diminuto_ipc_close(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ vsprintf(char *, char const *, int /*<<< orphan*/);
char *getstr(const char *msg, va_list vl) {
  char *p = malloc(sizeof(char) * 10000);
  vsprintf(p, msg, vl);
  return p;
}


x86 assembly (clang, -O0):
<getstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x2710,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <vsprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getstr>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
mov    $0x2710,%edi
call   1030 <malloc@plt>
mov    %rax,%rbp
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1040 <vsprintf@plt>
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @getstr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = call i8* @malloc(i32 10000)
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @vsprintf(i8* %7, i8* %8, i32 %9)
%11 = load i8*, i8** %5
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @getstr(i8* nocapture %0, i32 %1) {
%3 = tail call dereferenceable_or_null(10000) i8* @malloc(i32 10000)
%4 = tail call i32 @vsprintf(i8* %3, i8* %0, i32 %1)
ret i8* %3
}
int f(void) { return 42; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 42
}

LLVM IR (-O2):
define i32 @f() {
ret i32 42
}
int kvm_close(void *kd) { return (0); }


x86 assembly (clang, -O0):
<kvm_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kvm_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @kvm_close(i8* nocapture readnone %0) {
ret i32 0
}
void DoClearScreenBuffer(void) {}


x86 assembly (clang, -O0):
<DoClearScreenBuffer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoClearScreenBuffer>:
ret

LLVM IR (-O0):
define void @DoClearScreenBuffer() {
ret void
}

LLVM IR (-O2):
define void @DoClearScreenBuffer() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ func_ull_ull(unsigned long long, unsigned long long);
int /*<<< orphan*/ printf(char *, int, int, int, int);
int main() {
  int a, b, c, d;
  a = 1;
  b = 2;
  c = 3;
  d = 4;
  func_ull_ull((unsigned long long)a / 1.0, (unsigned long long)b / 1.0);
  printf("%d %d %d %d", a, b, c, d);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0x4,-0x14(%rbp)
movslq -0x8(%rbp),%rax
movq   %rax,%xmm0
movaps 0xea5(%rip),%xmm3
punpckldq %xmm3,%xmm0
movapd 0xea9(%rip),%xmm2
subpd  %xmm2,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
mov    %rdi,%rcx
sar    $0x3f,%rcx
movsd  0xe93(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rdi
movslq -0xc(%rbp),%rax
movq   %rax,%xmm0
punpckldq %xmm3,%xmm0
subpd  %xmm2,%xmm0
movaps %xmm0,%xmm2
unpckhpd %xmm0,%xmm0
addsd  %xmm2,%xmm0
movaps %xmm0,%xmm2
cvttsd2si %xmm2,%rsi
mov    %rsi,%rcx
sar    $0x3f,%rcx
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rsi
call   1030 <func_ull_ull@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
lea    0xe39(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <func_ull_ull@plt>
lea    0xec9(%rip),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
mov    $0x4,%r8d
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%d %d %d %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
store i32 3, i32* %4
store i32 4, i32* %5
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = uitofp i64 %7 to double
%9 = fdiv double %8, 1.000000e+00
%10 = fptoui double %9 to i64
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = uitofp i64 %12 to double
%14 = fdiv double %13, 1.000000e+00
%15 = fptoui double %14 to i64
%16 = call i32 @func_ull_ull(i64 %10, i64 %15)
%17 = load i32, i32* %2
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %17, i32 %18, i32 %19, i32 %20)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d %d %d %d\00"
define i32 @main() {
%1 = tail call i32 @func_ull_ull(i64 1, i64 2)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1, i32 2, i32 3, i32 4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int cmdquit() {
  printf("Good bye!\n");
  exit(0);
}


x86 assembly (clang, -O0):
<cmdquit>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<cmdquit>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Good bye!\0A\00"
define i32 @cmdquit() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [10 x i8] c"Good bye!\00"
define i32 @cmdquit() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
testFunc5(void) {}


x86 assembly (clang, -O0):
<testFunc5>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testFunc5>:
ret

LLVM IR (-O0):
define i32 @testFunc5() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @testFunc5() {
ret i32 undef
}
/* Variables and functions */
int cubeByValue(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int number = 5;
  printf("The original value of number is %d", number);
  number = cubeByValue(number);
  printf("\nThe new value of number is %d\n", number);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <cubeByValue@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1040 <cubeByValue@plt>
lea    0xee0(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"The original value of number is %d\00"
@.str.1 = [32 x i8] c"\0AThe new value of number is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @cubeByValue(i32 %5)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"The original value of number is %d\00"
@.str.1 = [32 x i8] c"\0AThe new value of number is %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 5)
%2 = tail call i32 @cubeByValue(i32 5)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0), i32 %2)
ret i32 0
}
unsigned int gnu_dev_major(unsigned long long int __dev) {
  return (unsigned int)(__dev >> 8 & (unsigned long int)4095 |
                        (unsigned long int)((unsigned int)(__dev >> 32) &
                                            (unsigned int)~4095));
}


x86 assembly (clang, -O0):
<gnu_dev_major>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
and    $0xfff,%rax
mov    -0x8(%rbp),%rcx
shr    $0x20,%rcx
and    $0xfffff000,%ecx
mov    %ecx,%ecx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnu_dev_major>:
mov    %edi,%eax
shr    $0x8,%eax
and    $0xfff,%eax
shr    $0x20,%rdi
and    $0xfffff000,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @gnu_dev_major(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 8
%5 = and i64 %4, 4095
%6 = load i64, i64* %2
%7 = lshr i64 %6, 32
%8 = trunc i64 %7 to i32
%9 = and i32 %8, -4096
%10 = zext i32 %9 to i64
%11 = or i64 %5, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @gnu_dev_major(i64 %0) {
%2 = lshr i64 %0, 8
%3 = and i64 %2, 4095
%4 = lshr i64 %0, 32
%5 = and i64 %4, 4294963200
%6 = or i64 %3, %5
%7 = trunc i64 %6 to i32
ret i32 %7
}
int my_init(void) { return 0; }


x86 assembly (clang, -O0):
<my_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @my_init() {
ret i32 0
}
void RTUniFree(void) {}


x86 assembly (clang, -O0):
<RTUniFree>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTUniFree>:
ret

LLVM IR (-O0):
define void @RTUniFree() {
ret void
}

LLVM IR (-O2):
define void @RTUniFree() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int fun_stub_base_1_stub(int a) {
  printf("fun_stub_base_1_stub:a = %d \n", a);
  return a;
}


x86 assembly (clang, -O0):
<fun_stub_base_1_stub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_stub_base_1_stub>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"fun_stub_base_1_stub:a = %d \0A\00"
define i32 @fun_stub_base_1_stub(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
@.str = [30 x i8] c"fun_stub_base_1_stub:a = %d \0A\00"
define i32 @fun_stub_base_1_stub(i32 returned %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 %0
}
void freeIntMatrix(int **matrix, int idim) {
  int loop = 0;
  for (loop = 0; loop < idim; loop++) {
    free(matrix[loop]);
  }
  free(matrix);
}


x86 assembly (clang, -O0):
<freeIntMatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <freeIntMatrix+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <freeIntMatrix+0x1d>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeIntMatrix>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <freeIntMatrix+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <freeIntMatrix+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeIntMatrix(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = bitcast i32* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32**, i32*** %3
%22 = bitcast i32** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @freeIntMatrix(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = bitcast i32** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast i32** %0 to i8*
tail call void @free(i8* %14)
ret void
}
int sancus_bit_has_bit(unsigned long mask, unsigned bit) {
  return !!(mask & (1UL << (bit)));
}


x86 assembly (clang, -O0):
<sancus_bit_has_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sancus_bit_has_bit>:
xor    %eax,%eax
bt     %rsi,%rdi
setb   %al
ret

LLVM IR (-O0):
define i32 @sancus_bit_has_bit(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = shl i64 1, %7
%9 = and i64 %5, %8
%10 = icmp ne i64 %9, 0
%11 = xor i1 %10, true
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @sancus_bit_has_bit(i64 %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = shl nuw i64 1, %3
%5 = and i64 %4, %0
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
void ini_rlk(double *vars, double *min, double *minABS, double *max) {
  vars[0] = -1.701747;
  vars[1] = -4.919226;
  *min = -1.18;
  *minABS = -1.977;
  *max = 2.111;
  return;
}


x86 assembly (clang, -O0):
<ini_rlk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xf00(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0xee8(%rip),%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movsd  0xecf(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
movsd  0xeb7(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x20(%rbp),%rax
movsd  0xe9f(%rip),%xmm0
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ini_rlk>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movabs $0xbff2e147ae147ae1,%rax
e1 f2 bf
mov    %rax,(%rsi)
movabs $0xbfffa1cac083126f,%rax
a1 ff bf
mov    %rax,(%rdx)
movabs $0x4000e353f7ced917,%rax
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @ini_rlk(double* %0, double* %1, double* %2, double* %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store double* %0, double** %5
store double* %1, double** %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load double*, double** %5
%10 = getelementptr inbounds double, double* %9, i64 0
store double 0xBFFB3A5B0FF10ECB, double* %10
%11 = load double*, double** %5
%12 = getelementptr inbounds double, double* %11, i64 1
store double 0xC013AD49949E8816, double* %12
%13 = load double*, double** %6
store double -1.180000e+00, double* %13
%14 = load double*, double** %7
store double -1.977000e+00, double* %14
%15 = load double*, double** %8
store double 2.111000e+00, double* %15
ret void
}

LLVM IR (-O2):
define void @ini_rlk(double* nocapture writeonly %0, double* nocapture writeonly %1, double* nocapture writeonly %2, double* nocapture writeonly %3) {
%5 = bitcast double* %0 to <2 x double>*
store <2 x double> <double 0xBFFB3A5B0FF10ECB, double 0xC013AD49949E8816>, <2 x double>* %5
store double -1.180000e+00, double* %1
store double -1.977000e+00, double* %2
store double 2.111000e+00, double* %3
ret void
}
void freeReturnStruct() {}


x86 assembly (clang, -O0):
<freeReturnStruct>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeReturnStruct>:
ret

LLVM IR (-O0):
define void @freeReturnStruct() {
ret void
}

LLVM IR (-O2):
define void @freeReturnStruct() {
ret void
}
const char *deviceMultiplexerGetName(void) { return "MULTIPLEXER"; }


x86 assembly (clang, -O0):
<deviceMultiplexerGetName>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deviceMultiplexerGetName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"MULTIPLEXER\00"
define i8* @deviceMultiplexerGetName() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [12 x i8] c"MULTIPLEXER\00"
define i8* @deviceMultiplexerGetName() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int __sunriset__(int, int, int, double, double, double, int /*<<< orphan*/,
                 double *, double *);
int nautical_twilight(int year, int month, int day, double lon, double lat,
                      double *start, double *end) {
  return __sunriset__(year, month, day, lon, lat, -12.0, 0, start, end);
}


x86 assembly (clang, -O0):
<nautical_twilight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
movsd  0xeaa(%rip),%xmm2
xor    %ecx,%ecx
call   1030 <__sunriset__@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nautical_twilight>:
mov    %r8,%r9
mov    %rcx,%r8
movsd  0xee2(%rip),%xmm2
xor    %ecx,%ecx
jmp    1030 <__sunriset__@plt>

LLVM IR (-O0):
define i32 @nautical_twilight(i32 %0, i32 %1, i32 %2, double %3, double %4, double* %5, double* %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca double
%12 = alloca double
%13 = alloca double*
%14 = alloca double*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store double %3, double* %11
store double %4, double* %12
store double* %5, double** %13
store double* %6, double** %14
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = load i32, i32* %10
%18 = load double, double* %11
%19 = load double, double* %12
%20 = load double*, double** %13
%21 = load double*, double** %14
%22 = call i32 @__sunriset__(i32 %15, i32 %16, i32 %17, double %18, double %19, double -1.200000e+01, i32 0, double* %20, double* %21)
ret i32 %22
}

LLVM IR (-O2):
define i32 @nautical_twilight(i32 %0, i32 %1, i32 %2, double %3, double %4, double* %5, double* %6) {
%8 = tail call i32 @__sunriset__(i32 %0, i32 %1, i32 %2, double %3, double %4, double -1.200000e+01, i32 0, double* %5, double* %6)
ret i32 %8
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
scalar_t__ write(int, int *, int);
ssize_t write_int4(int f, int i) {
  i = ((i & 0xff000000) >> 24 | (i & 0x00ff0000) >> 8 | (i & 0x0000ff00) << 8 |
       (i & 0x000000ff) << 24);
  return write(f, &i, 4) > 0;
}


x86 assembly (clang, -O0):
<write_int4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff000000,%eax
shr    $0x18,%eax
mov    -0x8(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
cmp    $0x0,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int4>:
push   %rax
bswap  %esi
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
xor    %ecx,%ecx
test   %rax,%rax
setg   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_int4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, -16777216
%7 = lshr i32 %6, 24
%8 = load i32, i32* %4
%9 = and i32 %8, 16711680
%10 = ashr i32 %9, 8
%11 = or i32 %7, %10
%12 = load i32, i32* %4
%13 = and i32 %12, 65280
%14 = shl i32 %13, 8
%15 = or i32 %11, %14
%16 = load i32, i32* %4
%17 = and i32 %16, 255
%18 = shl i32 %17, 24
%19 = or i32 %15, %18
store i32 %19, i32* %4
%20 = load i32, i32* %3
%21 = call i64 @write(i32 %20, i32* %4, i32 4)
%22 = icmp sgt i64 %21, 0
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @write_int4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = tail call i32 @llvm.bswap.i32(i32 %1)
store i32 %4, i32* %3
%5 = call i64 @write(i32 %0, i32* %3, i32 4)
%6 = icmp sgt i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
int do_838() { return 838; }


x86 assembly (clang, -O0):
<do_838>:
push   %rbp
mov    %rsp,%rbp
mov    $0x346,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_838>:
mov    $0x346,%eax
ret

LLVM IR (-O0):
define i32 @do_838() {
ret i32 838
}

LLVM IR (-O2):
define i32 @do_838() {
ret i32 838
}