int gpio_set(unsigned int pin, unsigned int value) {
  unsigned int *gpio_address = (unsigned int *)0x20200000;
  unsigned int bit_poker = 0x01;
  unsigned int register_field;
  if (pin >= 54)
    return 0;
  gpio_address += pin / 32;
  register_field = pin & 0x1F;
  bit_poker <<= register_field;
  if (value)
    gpio_address += 7;
  else
    gpio_address += 10;
  *gpio_address |= bit_poker;
  return 1;
}


x86 assembly (clang, -O0):
<gpio_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x20200000,%eax
mov    %rax,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
cmpl   $0x36,-0x8(%rbp)
jb     1130 <gpio_set+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1194 <gpio_set+0x94>
mov    -0x8(%rbp),%ecx
shr    $0x5,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,%ecx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%ecx
mov    -0x1c(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1176 <gpio_set+0x76>
mov    -0x18(%rbp),%rax
add    $0x1c,%rax
mov    %rax,-0x18(%rbp)
jmp    1182 <gpio_set+0x82>
mov    -0x18(%rbp),%rax
add    $0x28,%rax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_set>:
xor    %eax,%eax
cmp    $0x35,%edi
ja     1136 <gpio_set+0x36>
mov    %edi,%eax
shr    $0x5,%eax
lea    0x28(,%rax,4),%rcx
lea    0x1c(,%rax,4),%rdx
test   %esi,%esi
cmove  %rcx,%rdx
mov    $0x1,%esi
mov    %edi,%ecx
shl    %cl,%esi
mov    $0x1,%eax
or     %esi,0x20200000(%rdx)
ret

LLVM IR (-O0):
define i32 @gpio_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* inttoptr (i64 538968064 to i32*), i32** %6
store i32 1, i32* %7
%9 = load i32, i32* %4
%10 = icmp uge i32 %9, 54
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %36
12: ; preds = %2
%13 = load i32, i32* %4
%14 = udiv i32 %13, 32
%15 = load i32*, i32** %6
%16 = zext i32 %14 to i64
%17 = getelementptr inbounds i32, i32* %15, i64 %16
store i32* %17, i32** %6
%18 = load i32, i32* %4
%19 = and i32 %18, 31
store i32 %19, i32* %8
%20 = load i32, i32* %8
%21 = load i32, i32* %7
%22 = shl i32 %21, %20
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %12
%26 = load i32*, i32** %6
%27 = getelementptr inbounds i32, i32* %26, i64 7
store i32* %27, i32** %6
br label %31
28: ; preds = %12
%29 = load i32*, i32** %6
%30 = getelementptr inbounds i32, i32* %29, i64 10
store i32* %30, i32** %6
br label %31
31: ; preds = %28, %25
%32 = load i32, i32* %7
%33 = load i32*, i32** %6
%34 = load i32, i32* %33
%35 = or i32 %34, %32
store i32 %35, i32* %33
store i32 1, i32* %3
br label %36
36: ; preds = %31, %11
%37 = load i32, i32* %3
ret i32 %37
}

LLVM IR (-O2):
define i32 @gpio_set(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, 53
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = lshr i32 %0, 5
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* inttoptr (i64 538968064 to i32*), i64 %6
%8 = and i32 %0, 31
%9 = shl nuw i32 1, %8
%10 = icmp eq i32 %1, 0
%11 = select i1 %10, i64 10, i64 7
%12 = getelementptr inbounds i32, i32* %7, i64 %11
%13 = load i32, i32* %12
%14 = or i32 %13, %9
store i32 %14, i32* %12
br label %15
15: ; preds = %2, %4
%16 = phi i32 [ 1, %4 ], [ 0, %2 ]
ret i32 %16
}