xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
float fx10(uint32_t value) {
  if ((value >> 9) & 0x1)
    return -(((value - 1) ^ 0x3ff) / 256.0f);
  else
    return value / 256.0f;
}


x86 assembly (clang, -O0):
<fx10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x9,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     114b <fx10+0x4b>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
xor    $0x3ff,%eax
cvtsi2ss %eax,%xmm0
movss  0xed0(%rip),%xmm1
divss  %xmm1,%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1161 <fx10+0x61>
cvtsi2ssl -0x8(%rbp),%xmm0
movss  0xea8(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fx10>:
lea    -0x1(%rdi),%eax
xor    $0x3ff,%eax
xor    %ecx,%ecx
test   $0x200,%edi
cmove  %edi,%eax
cvtsi2ss %eax,%xmm0
sete   %cl
lea    0xedf(%rip),%rax
mulss  (%rax,%rcx,4),%xmm0
ret

LLVM IR (-O0):
define float @fx10(i32 %0) {
%2 = alloca float
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = ashr i32 %4, 9
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = xor i32 %10, 1023
%12 = sitofp i32 %11 to float
%13 = fdiv float %12, 2.560000e+02
%14 = fneg float %13
store float %14, float* %2
br label %19
15: ; preds = %1
%16 = load i32, i32* %3
%17 = sitofp i32 %16 to float
%18 = fdiv float %17, 2.560000e+02
store float %18, float* %2
br label %19
19: ; preds = %15, %8
%20 = load float, float* %2
ret float %20
}

LLVM IR (-O2):
define float @fx10(i32 %0) {
%2 = and i32 %0, 512
%3 = icmp eq i32 %2, 0
%4 = add nsw i32 %0, -1
%5 = xor i32 %4, 1023
%6 = select i1 %3, i32 %0, i32 %5
%7 = select i1 %3, float 3.906250e-03, float -3.906250e-03
%8 = sitofp i32 %6 to float
%9 = fmul float %7, %8
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float, float, float);
float Add(float a, float b) {
  printf("\nResult of Adding %.2f and %.2f is %.2f.", a, b, a + b);
  return a + b;
}


x86 assembly (clang, -O0):
<Add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
addss  -0x8(%rbp),%xmm2
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Add>:
push   %rax
movaps %xmm0,%xmm2
addss  %xmm1,%xmm2
movss  %xmm2,0x4(%rsp)
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
movss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [41 x i8] c"\0AResult of Adding %.2f and %.2f is %.2f.\00"
define float @Add(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = load float, float* %3
%8 = load float, float* %4
%9 = fadd float %7, %8
%10 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), float %5, float %6, float %9)
%11 = load float, float* %3
%12 = load float, float* %4
%13 = fadd float %11, %12
ret float %13
}

LLVM IR (-O2):
@.str = [41 x i8] c"\0AResult of Adding %.2f and %.2f is %.2f.\00"
define float @Add(float %0, float %1) {
%3 = fadd float %0, %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), float %0, float %1, float %3)
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ cnd_t;

/* Variables and functions */
int cond_broadcast(int /*<<< orphan*/ *);
int cnd_broadcast(cnd_t *cond) { return cond_broadcast(cond); }


x86 assembly (clang, -O0):
<cnd_broadcast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cond_broadcast@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnd_broadcast>:
jmp    1030 <cond_broadcast@plt>

LLVM IR (-O0):
define i32 @cnd_broadcast(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @cond_broadcast(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cnd_broadcast(i32* %0) {
%2 = tail call i32 @cond_broadcast(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ HalWdgIntrHandle();
void INTR_WatchdogHandler(void) { HalWdgIntrHandle(); }


x86 assembly (clang, -O0):
<INTR_WatchdogHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HalWdgIntrHandle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<INTR_WatchdogHandler>:
xor    %eax,%eax
jmp    1030 <HalWdgIntrHandle@plt>

LLVM IR (-O0):
define void @INTR_WatchdogHandler() {
%1 = call i32 (...) @HalWdgIntrHandle()
ret void
}

LLVM IR (-O2):
define void @INTR_WatchdogHandler() {
%1 = tail call i32 (...) @HalWdgIntrHandle()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_client_conf_load() {
  printf("NOT IMPLEMENTED:"
         "pa_client_conf_load"
         "\n");
}


x86 assembly (clang, -O0):
<pa_client_conf_load>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_client_conf_load>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"NOT IMPLEMENTED:pa_client_conf_load\0A\00"
define i32 @pa_client_conf_load() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [36 x i8] c"NOT IMPLEMENTED:pa_client_conf_load\00"
define i32 @pa_client_conf_load() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef unsigned int uint64_t;

/* Variables and functions */
__attribute__((pure, const)) uint64_t htooe64(uint64_t x) {
  x = ((x >> 32U) & 0xffffffffU) | ((x << 32U) & 0xffffffff00000000U);
  x = ((x >> 16U) & 0xffff0000ffffU) | ((x << 16U) & 0xffff0000ffff0000U);
  return ((x >> 8U) & 0xff00ff00ff00ffU) | ((x << 8U) & 0xff00ff00ff00ff00U);
}


x86 assembly (clang, -O0):
<htooe64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
shr    %cl,%eax
and    $0xffffffff,%eax
mov    %eax,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
mov    %ecx,%ecx
movabs $0xffffffff00000000,%rdx
ff ff ff
and    %rdx,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
mov    %eax,%eax
movabs $0xffff0000ffff,%rcx
and    %rcx,%rax
mov    -0x4(%rbp),%ecx
shl    $0x10,%ecx
mov    %ecx,%ecx
movabs $0xffff0000ffff0000,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %eax,%eax
movabs $0xff00ff00ff00ff,%rcx
and    %rcx,%rax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
mov    %ecx,%ecx
movabs $0xff00ff00ff00ff00,%rdx
and    %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htooe64>:
ret

LLVM IR (-O0):
define i32 @htooe64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 32
%5 = and i32 %4, -1
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = shl i32 %7, 32
%9 = zext i32 %8 to i64
%10 = and i64 %9, -4294967296
%11 = or i64 %6, %10
%12 = trunc i64 %11 to i32
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = lshr i32 %13, 16
%15 = zext i32 %14 to i64
%16 = and i64 %15, 281470681808895
%17 = load i32, i32* %2
%18 = shl i32 %17, 16
%19 = zext i32 %18 to i64
%20 = and i64 %19, -281470681808896
%21 = or i64 %16, %20
%22 = trunc i64 %21 to i32
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = lshr i32 %23, 8
%25 = zext i32 %24 to i64
%26 = and i64 %25, 71777214294589695
%27 = load i32, i32* %2
%28 = shl i32 %27, 8
%29 = zext i32 %28 to i64
%30 = and i64 %29, -71777214294589696
%31 = or i64 %26, %30
%32 = trunc i64 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @htooe64(i32 %0) {
ret i32 poison
}
/* Variables and functions */
float __infer_nondet_float();
float acosf(float x) { return __infer_nondet_float(); }


x86 assembly (clang, -O0):
<acosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acosf>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_float@plt>

LLVM IR (-O0):
define float @acosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call float (...) @__infer_nondet_float()
ret float %3
}

LLVM IR (-O2):
define float @acosf(float %0) {
%2 = tail call float (...) @__infer_nondet_float()
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ serial_putc(unsigned int, int /*<<< orphan*/);
void serial_puts(unsigned int base, const char *s) {
  while (*s) {
    serial_putc(base, *s++);
  }
}


x86 assembly (clang, -O0):
<serial_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <serial_puts+0x3b>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%esi
call   1030 <serial_putc@plt>
jmp    111f <serial_puts+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_puts>:
push   %rbp
push   %rbx
push   %rax
mov    (%rsi),%al
test   %al,%al
je     1145 <serial_puts+0x35>
mov    %rsi,%rbx
mov    %edi,%ebp
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%esi
mov    %ebp,%edi
call   1030 <serial_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <serial_puts+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @serial_puts(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
br label %5
5: ; preds = %9, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = call i32 @serial_putc(i32 %10, i32 %14)
br label %5
16: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @serial_puts(i32 %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %8, %5 ], [ %1, %2 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = sext i8 %6 to i32
%10 = tail call i32 @serial_putc(i32 %0, i32 %9)
%11 = load i8, i8* %8
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *, char const *);
long check(long ret, const char *msg) {
  if (ret == -1) {
    err(1, "%s", msg);
  }
  return ret;
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0xffffffffffffffff,-0x8(%rbp)
jne    1140 <check+0x30>
mov    -0x10(%rbp),%rdx
mov    $0x1,%edi
lea    0xec5(%rip),%rsi
call   1030 <err@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
push   %rbx
mov    %rdi,%rbx
cmp    $0xffffffffffffffff,%rdi
jne    112e <check+0x1e>
mov    %rsi,%rdx
lea    0xedc(%rip),%rsi
mov    $0x1,%edi
call   1030 <err@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i64 @check(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @err(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %8)
br label %10
10: ; preds = %7, %2
%11 = load i64, i64* %3
ret i64 %11
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i64 @check(i64 returned %0, i8* %1) {
%3 = icmp eq i64 %0, -1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @err(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %6
6: ; preds = %4, %2
ret i64 %0
}
/* Variables and functions */
int isupper(char c) { return c >= 'A' && c <= 'Z'; }


x86 assembly (clang, -O0):
<isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x41,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isupper+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper>:
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isupper(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int close(int);
int gpio_file_close(int fd) { return close(fd); }


x86 assembly (clang, -O0):
<gpio_file_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_file_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @gpio_file_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @gpio_file_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
/* Variables and functions */
bool is_decimal(char c) { return c >= '0' && c <= '9'; }


x86 assembly (clang, -O0):
<is_decimal>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <is_decimal+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_decimal>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_decimal(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_decimal(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct bwb_line {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SetOnError(int);
struct bwb_line *bwb_zline(struct bwb_line *);
struct bwb_line *bwb_ON_ERROR_RESUME_NEXT(struct bwb_line *l) {
  SetOnError(-1);
  return bwb_zline(l);
}


x86 assembly (clang, -O0):
<bwb_ON_ERROR_RESUME_NEXT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%edi
call   1040 <SetOnError@plt>
mov    -0x8(%rbp),%rdi
call   1030 <bwb_zline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwb_ON_ERROR_RESUME_NEXT>:
push   %rbx
mov    %rdi,%rbx
mov    $0xffffffff,%edi
call   1040 <SetOnError@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <bwb_zline@plt>

LLVM IR (-O0):
%struct.bwb_line = type { i32 }
define %struct.bwb_line* @bwb_ON_ERROR_RESUME_NEXT(%struct.bwb_line* %0) {
%2 = alloca %struct.bwb_line*
store %struct.bwb_line* %0, %struct.bwb_line** %2
%3 = call i32 @SetOnError(i32 -1)
%4 = load %struct.bwb_line*, %struct.bwb_line** %2
%5 = call %struct.bwb_line* @bwb_zline(%struct.bwb_line* %4)
ret %struct.bwb_line* %5
}

LLVM IR (-O2):
%struct.bwb_line = type { i32 }
define %struct.bwb_line* @bwb_ON_ERROR_RESUME_NEXT(%struct.bwb_line* %0) {
%2 = tail call i32 @SetOnError(i32 -1)
%3 = tail call %struct.bwb_line* @bwb_zline(%struct.bwb_line* %0)
ret %struct.bwb_line* %3
}
/* Variables and functions */
int /*<<< orphan*/ isspace(int /*<<< orphan*/);
int isEmpty(const char *str) {
  if (!str)
    return 1;
  while (*str)
    if (!isspace(*(str++)))
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<isEmpty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <isEmpty+0x23>
movl   $0x1,-0x4(%rbp)
jmp    117d <isEmpty+0x6d>
jmp    1138 <isEmpty+0x28>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1176 <isEmpty+0x66>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%eax
jne    1171 <isEmpty+0x61>
movl   $0x0,-0x4(%rbp)
jmp    117d <isEmpty+0x6d>
jmp    1138 <isEmpty+0x28>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEmpty>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
test   %rdi,%rdi
je     1136 <isEmpty+0x26>
mov    %rdi,%rbx
movsbl (%rbx),%edi
test   %edi,%edi
je     1136 <isEmpty+0x26>
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %eax,%eax
jne    1120 <isEmpty+0x10>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @isEmpty(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i32 1, i32* %2
br label %22
7: ; preds = %1
br label %8
8: ; preds = %20, %7
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = call i32 @isspace(i32 %16)
%18 = icmp ne i32 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %12
store i32 0, i32* %2
br label %22
20: ; preds = %12
br label %8
21: ; preds = %8
store i32 1, i32* %2
br label %22
22: ; preds = %21, %19, %6
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @isEmpty(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %12, label %3
3: ; preds = %1, %7
%4 = phi i8* [ %8, %7 ], [ %0, %1 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = sext i8 %5 to i32
%10 = tail call i32 @isspace(i32 %9)
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %3
12: ; preds = %3, %7, %1
%13 = phi i32 [ 1, %1 ], [ 1, %3 ], [ 0, %7 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRSETMAPMODE_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 1, torev);
}


x86 assembly (clang, -O0):
<U_WMRSETMAPMODE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRSETMAPMODE_swap>:
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRSETMAPMODE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 1, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRSETMAPMODE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 1, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void mergeSort(int *a, int p, int r) {
  int mid;
  if (p < r) {
    mid = (p + r) / 2;
    mergeSort(a, p, mid);
    mergeSort(a, mid + 1, r);
    merge(a, p, mid, r);
  }
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <mergeSort+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <mergeSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <mergeSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
cmp    %edx,%esi
jge    1172 <mergeSort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1030 <mergeSort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1030 <mergeSort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @mergeSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @mergeSort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @mergeSort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
unsigned int readSSSS();
int /*<<< orphan*/ skip(unsigned int);
bool skipHeader() {
  unsigned int datasize = readSSSS();
  if (datasize < 4) {
    if (0)
      printf("Not a jpeg 2\n");
    return false;
  }
  if (0)
    printf("Mark size %u\n", datasize);
  skip(datasize - 2);
  return true;
}


x86 assembly (clang, -O0):
<skipHeader>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <readSSSS@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x4,-0x8(%rbp)
jae    1148 <skipHeader+0x28>
movl   $0x0,-0x4(%rbp)
jmp    115a <skipHeader+0x3a>
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <skip@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipHeader>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <readSSSS@plt>
cmp    $0x4,%eax
jb     113e <skipHeader+0x1e>
add    $0xfffffffe,%eax
mov    %eax,%edi
call   1030 <skip@plt>
mov    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @skipHeader() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @readSSSS()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 4
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %1
br label %11
7: ; preds = %0
%8 = load i32, i32* %2
%9 = sub i32 %8, 2
%10 = call i32 @skip(i32 %9)
store i32 1, i32* %1
br label %11
11: ; preds = %7, %6
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @skipHeader() {
%1 = tail call i32 (...) @readSSSS()
%2 = icmp ult i32 %1, 4
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = add i32 %1, -2
%5 = tail call i32 @skip(i32 %4)
br label %6
6: ; preds = %0, %3
%7 = phi i32 [ 1, %3 ], [ 0, %0 ]
ret i32 %7
}
__attribute__((weak)) void framerate_notify_frame(void) { ; }


x86 assembly (clang, -O0):
<framerate_notify_frame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<framerate_notify_frame>:
ret

LLVM IR (-O0):
define weak void @framerate_notify_frame() {
ret void
}

LLVM IR (-O2):
define weak void @framerate_notify_frame() {
ret void
}
/* Variables and functions */
unsigned char inb(int);
int /*<<< orphan*/ io_wait();
unsigned char inb_p(int port) {
  unsigned char value = inb(port);
  io_wait();
  return value;
}


x86 assembly (clang, -O0):
<inb_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <inb@plt>
mov    %al,-0x5(%rbp)
mov    $0x0,%al
call   1030 <io_wait@plt>
movzbl -0x5(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb_p>:
push   %rbx
call   1040 <inb@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <io_wait@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @inb_p(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call zeroext i8 @inb(i32 %4)
store i8 %5, i8* %3
%6 = call i32 (...) @io_wait()
%7 = load i8, i8* %3
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @inb_p(i32 %0) {
%2 = tail call zeroext i8 @inb(i32 %0)
%3 = tail call i32 (...) @io_wait()
ret i8 %2
}
/* Variables and functions */
int ERANGE;
int set_str_val(char **pdst, const char *end, char c) {
  if (*pdst < end) {
    char *p = *pdst;
    *p = c;
    (*pdst)++;
  } else
    return -ERANGE;
  return 0;
}


x86 assembly (clang, -O0):
<set_str_val>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jae    1149 <set_str_val+0x49>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x19(%rbp),%cl
mov    -0x28(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    115c <set_str_val+0x5c>
xor    %eax,%eax
mov    0x2e96(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    1163 <set_str_val+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_str_val>:
mov    (%rdi),%rax
cmp    %rsi,%rax
jae    1111 <set_str_val+0x11>
mov    %dl,(%rax)
addq   $0x1,(%rdi)
xor    %eax,%eax
ret
mov    0x2ed0(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ERANGE = global i32 0
define i32 @set_str_val(i8** %0, i8* %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i8*
store i8** %0, i8*** %5
store i8* %1, i8** %6
store i8 %2, i8* %7
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
%11 = load i8*, i8** %6
%12 = icmp ult i8* %10, %11
br i1 %12, label %13, label %21
13: ; preds = %3
%14 = load i8**, i8*** %5
%15 = load i8*, i8** %14
store i8* %15, i8** %8
%16 = load i8, i8* %7
%17 = load i8*, i8** %8
store i8 %16, i8* %17
%18 = load i8**, i8*** %5
%19 = load i8*, i8** %18
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %18
br label %24
21: ; preds = %3
%22 = load i32, i32* @ERANGE
%23 = sub nsw i32 0, %22
store i32 %23, i32* %4
br label %25
24: ; preds = %13
store i32 0, i32* %4
br label %25
25: ; preds = %24, %21
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
@ERANGE = global i32 0
define i32 @set_str_val(i8** nocapture %0, i8* readnone %1, i8 signext %2) {
%4 = load i8*, i8** %0
%5 = icmp ult i8* %4, %1
br i1 %5, label %6, label %9
6: ; preds = %3
store i8 %2, i8* %4
%7 = load i8*, i8** %0
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8* %8, i8** %0
br label %12
9: ; preds = %3
%10 = load i32, i32* @ERANGE
%11 = sub nsw i32 0, %10
br label %12
12: ; preds = %6, %9
%13 = phi i32 [ 0, %6 ], [ %11, %9 ]
ret i32 %13
}
/* Variables and functions */
int external_shared();
int external_static();
int main(void) { return external_static() + external_shared() + 31415926; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <external_static@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <external_shared@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x1df5e76,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <external_static@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <external_shared@plt>
add    %ebx,%eax
add    $0x1df5e76,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @external_static()
%3 = call i32 (...) @external_shared()
%4 = add nsw i32 %2, %3
%5 = add nsw i32 %4, 31415926
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @external_static()
%2 = tail call i32 (...) @external_shared()
%3 = add i32 %1, 31415926
%4 = add i32 %3, %2
ret i32 %4
}
int isspace(int c) { return c == ' ' || c == '\n' || c == '\r' || c == '\t'; }


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <isspace+0x3e>
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <isspace+0x3e>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <isspace+0x3e>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
cmp    $0x20,%edi
ja     111d <isspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002400,%rdx
bt     %rcx,%rdx
jae    111d <isspace+0x1d>
ret
xor    %eax,%eax
cmp    $0x9,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 10
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 13
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 9
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @isspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 10, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 9
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Type definitions */
typedef int clock_t;

/* Variables and functions */
int __infer_nondet_clock_t();
clock_t clock() {
  clock_t res;
  res = __infer_nondet_clock_t();
  if (res < -1)
    while (1)
      ;
  return res;
}


x86 assembly (clang, -O0):
<clock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__infer_nondet_clock_t@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jge    1136 <clock+0x26>
jmp    1131 <clock+0x21>
jmp    1131 <clock+0x21>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock>:
push   %rax
xor    %eax,%eax
call   1030 <__infer_nondet_clock_t@plt>
cmp    $0xfffffffe,%eax
jg     1122 <clock+0x12>
nopl   (%rax)
jmp    1120 <clock+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @clock() {
%1 = alloca i32
%2 = call i32 (...) @__infer_nondet_clock_t()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
br label %6
6: ; preds = %5, %6
br label %6
7: ; preds = %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @clock() {
%1 = tail call i32 (...) @__infer_nondet_clock_t()
%2 = icmp slt i32 %1, -1
br i1 %2, label %3, label %4
3: ; preds = %0, %3
br label %3
4: ; preds = %0
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ serial_close(int /*<<< orphan*/);
void PIC16F1789_stop(void) {
  serial_close(0);
  ;
}


x86 assembly (clang, -O0):
<PIC16F1789_stop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <serial_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIC16F1789_stop>:
xor    %edi,%edi
jmp    1030 <serial_close@plt>

LLVM IR (-O0):
define void @PIC16F1789_stop() {
%1 = call i32 @serial_close(i32 0)
ret void
}

LLVM IR (-O2):
define void @PIC16F1789_stop() {
%1 = tail call i32 @serial_close(i32 0)
ret void
}
char *sccsid(void) {
  return ("@(#)sysstat-"
          "8.1.5"
          ": "
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/odit/rv042/refs/heads/master/linux/"
          "embedded_rootfs/pkg_addon/sysstat-8.1.5/pidstat.c"
          " compiled "
          "Mar 16 2022"
          " "
          "15:07:20");
}


x86 assembly (clang, -O0):
<sccsid>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sccsid>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [224 x i8] c"@(#)sysstat-8.1.5: /scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/odit/rv042/refs/heads/master/linux/embedded_rootfs/pkg_addon/sysstat-8.1.5/pidstat.c compiled Mar 16 2022 15:07:20\00"
define i8* @sccsid() {
ret i8* getelementptr inbounds ([224 x i8], [224 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [224 x i8] c"@(#)sysstat-8.1.5: /scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/odit/rv042/refs/heads/master/linux/embedded_rootfs/pkg_addon/sysstat-8.1.5/pidstat.c compiled Mar 16 2022 15:07:20\00"
define i8* @sccsid() {
ret i8* getelementptr inbounds ([224 x i8], [224 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int /*<<< orphan*/ g(int);
int /*<<< orphan*/ h(int);
int /*<<< orphan*/ x();
void main(int foo) {
  f(1);
  x();
  g(2);
  x();
  if (1) {
    h(3);
  } else {
    h(4);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1050 <f@plt>
mov    $0x0,%al
call   1040 <x@plt>
mov    $0x2,%edi
call   1060 <g@plt>
mov    $0x0,%al
call   1040 <x@plt>
mov    $0x3,%edi
call   1030 <h@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1050 <f@plt>
xor    %eax,%eax
call   1040 <x@plt>
mov    $0x2,%edi
call   1060 <g@plt>
xor    %eax,%eax
call   1040 <x@plt>
mov    $0x3,%edi
pop    %rax
jmp    1030 <h@plt>

LLVM IR (-O0):
define void @main(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @f(i32 1)
%4 = call i32 (...) @x()
%5 = call i32 @g(i32 2)
%6 = call i32 (...) @x()
%7 = call i32 @h(i32 3)
ret void
}

LLVM IR (-O2):
define void @main(i32 %0) {
%2 = tail call i32 @f(i32 1)
%3 = tail call i32 (...) @x()
%4 = tail call i32 @g(i32 2)
%5 = tail call i32 (...) @x()
%6 = tail call i32 @h(i32 3)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void context_switch() { *((uint32_t volatile *)0xE000ED04) = 0x10000000; }


x86 assembly (clang, -O0):
<context_switch>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe000ed04,%eax
movl   $0x10000000,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<context_switch>:
mov    $0xe000ed04,%eax
movl   $0x10000000,(%rax)
ret

LLVM IR (-O0):
define void @context_switch() {
store volatile i32 268435456, i32* inttoptr (i64 3758157060 to i32*)
ret void
}

LLVM IR (-O2):
define void @context_switch() {
store volatile i32 268435456, i32* inttoptr (i64 3758157060 to i32*)
ret void
}
int atoi(const char *s) {
  int n;
  n = 0;
  while (*s != 0 && (*s >= '0' && *s <= '9')) {
    n = n * 10 + (*s - '0');
    s++;
  }
  return n;
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xd(%rbp)
je     114f <atoi+0x4f>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0xe(%rbp)
jl     1149 <atoi+0x49>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    115f <atoi+0x5f>
jmp    1183 <atoi+0x83>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <atoi+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
mov    (%rdi),%cl
lea    -0x30(%rcx),%edx
xor    %eax,%eax
cmp    $0x9,%dl
ja     113b <atoi+0x3b>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
lea    -0x30(%rcx),%edx
add    $0x1,%rdi
cmp    $0xa,%dl
jb     1120 <atoi+0x20>
ret

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %23, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 48
br i1 %13, label %14, label %19
14: ; preds = %9
%15 = load i8*, i8** %2
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 57
br label %19
19: ; preds = %14, %9
%20 = phi i1 [ false, %9 ], [ %18, %14 ]
br label %21
21: ; preds = %19, %4
%22 = phi i1 [ false, %4 ], [ %20, %19 ]
br i1 %22, label %23, label %33
23: ; preds = %21
%24 = load i32, i32* %3
%25 = mul nsw i32 %24, 10
%26 = load i8*, i8** %2
%27 = load i8, i8* %26
%28 = sext i8 %27 to i32
%29 = sub nsw i32 %28, 48
%30 = add nsw i32 %25, %29
store i32 %30, i32* %3
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i32 1
store i8* %32, i8** %2
br label %4
33: ; preds = %21
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @atoi(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i32 [ %12, %5 ], [ 0, %1 ]
%8 = phi i8* [ %13, %5 ], [ %0, %1 ]
%9 = zext i8 %6 to i32
%10 = mul nsw i32 %7, 10
%11 = add i32 %10, -48
%12 = add i32 %11, %9
%13 = getelementptr inbounds i8, i8* %8, i64 1
%14 = load i8, i8* %13
%15 = add i8 %14, -48
%16 = icmp ult i8 %15, 10
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %12, %5 ]
ret i32 %18
}
double mindiv(double x, double y) { return (double)(x - y) / (x * y); }


x86 assembly (clang, -O0):
<mindiv>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mindiv>:
movapd %xmm0,%xmm2
subsd  %xmm1,%xmm2
mulsd  %xmm1,%xmm0
divsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @mindiv(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = load double, double* %3
%9 = load double, double* %4
%10 = fmul double %8, %9
%11 = fdiv double %7, %10
ret double %11
}

LLVM IR (-O2):
define double @mindiv(double %0, double %1) {
%3 = fsub double %0, %1
%4 = fmul double %0, %1
%5 = fdiv double %3, %4
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int main(int argc, char *argv[]) { exit(41); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x29,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x29,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @exit(i32 41)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 41)
unreachable
}
signed long long int
signedlonglongint_ignoring_signedshort(signed long long int x, signed short y) {
  return x;
}


x86 assembly (clang, -O0):
<signedlonglongint_ignoring_signedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlonglongint_ignoring_signedshort>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlonglongint_ignoring_signedshort(i64 %0, i16 signext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlonglongint_ignoring_signedshort(i64 returned %0, i16 signext %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ ft_strdel(char **);
char *ft_strjoin_key(char *, char *, char *);
char *ft_strfjoin_key(char *s1, char *s2, char *key) {
  char *tmp;
  tmp = ft_strjoin_key(s1, s2, key);
  ft_strdel(&s1);
  return (tmp);
}


x86 assembly (clang, -O0):
<ft_strfjoin_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <ft_strjoin_key@plt>
mov    %rax,-0x20(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <ft_strdel@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strfjoin_key>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,0x8(%rsp)
call   1040 <ft_strjoin_key@plt>
mov    %rax,%rbx
lea    0x8(%rsp),%rdi
call   1030 <ft_strdel@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ft_strfjoin_key(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i8* @ft_strjoin_key(i8* %8, i8* %9, i8* %10)
store i8* %11, i8** %7
%12 = call i32 @ft_strdel(i8** %4)
%13 = load i8*, i8** %7
ret i8* %13
}

LLVM IR (-O2):
define i8* @ft_strfjoin_key(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
store i8* %0, i8** %4
%5 = tail call i8* @ft_strjoin_key(i8* %0, i8* %1, i8* %2)
%6 = call i32 @ft_strdel(i8** %4)
ret i8* %5
}
/* Variables and functions */
char const *tmpnam(int /*<<< orphan*/ *);
const char *GenerateTmpFileName() { return tmpnam(NULL); }


x86 assembly (clang, -O0):
<GenerateTmpFileName>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <tmpnam@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenerateTmpFileName>:
xor    %edi,%edi
jmp    1030 <tmpnam@plt>

LLVM IR (-O0):
define i8* @GenerateTmpFileName() {
%1 = call i8* @tmpnam(i32* null)
ret i8* %1
}

LLVM IR (-O2):
define i8* @GenerateTmpFileName() {
%1 = tail call i8* @tmpnam(i32* null)
ret i8* %1
}
int ceillog2(unsigned int n) {
  int x = 0;
  while (n > 1) {
    x++;
    n /= 2;
  }
  return x;
}


x86 assembly (clang, -O0):
<ceillog2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jbe    112f <ceillog2+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <ceillog2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceillog2>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <ceillog2+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
shr    %ecx
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <ceillog2+0x10>
ret

LLVM IR (-O0):
define i32 @ceillog2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = udiv i32 %10, 2
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @ceillog2(i32 %0) {
%2 = icmp ugt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = lshr i32 %5, 1
%8 = icmp ugt i32 %5, 3
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %10
}
long fib(int n) {
  if (n <= 1)
    return 1;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jg     1132 <fib+0x22>
movq   $0x1,-0x8(%rbp)
jmp    115a <fib+0x4a>
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r14d
cmp    $0x2,%edi
jl     1147 <fib+0x37>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %r14d,%r14d
nopw   0x0(%rax,%rax,1)
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %rax,%r14
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <fib+0x20>
add    $0x1,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i64 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i64 @fib(i32 %12)
%14 = add nsw i64 %10, %13
store i64 %14, i64* %2
br label %15
15: ; preds = %7, %6
%16 = load i64, i64* %2
ret i64 %16
}

LLVM IR (-O2):
define i64 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i64 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i64 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i64 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i64 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i64 [ 1, %1 ], [ %12, %11 ]
ret i64 %14
}
int pinconf_validate_map(const struct pinctrl_map *map, int i) { return 0; }


x86 assembly (clang, -O0):
<pinconf_validate_map>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pinconf_validate_map>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pinctrl_map = type opaque
define i32 @pinconf_validate_map(%struct.pinctrl_map* %0, i32 %1) {
%3 = alloca %struct.pinctrl_map*
%4 = alloca i32
store %struct.pinctrl_map* %0, %struct.pinctrl_map** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.pinctrl_map = type opaque
define i32 @pinconf_validate_map(%struct.pinctrl_map* nocapture readnone %0, i32 %1) {
ret i32 0
}