xunge/DecIR huggingface dataset:
int test_imm_AAuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xaa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAuint64_highword_mem>:
testb  $0xaa,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 170
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_AAuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 730144440320
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void ff_hevc_h_loop_filter_luma_10_avx() {}


x86 assembly (clang, -O0):
<ff_hevc_h_loop_filter_luma_10_avx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_h_loop_filter_luma_10_avx>:
ret

LLVM IR (-O0):
define void @ff_hevc_h_loop_filter_luma_10_avx() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_h_loop_filter_luma_10_avx() {
ret void
}
void yy_3_MagicWordAutoCorrect(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_3_MagicWordAutoCorrect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_3_MagicWordAutoCorrect>:
ret

LLVM IR (-O0):
define void @yy_3_MagicWordAutoCorrect(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_3_MagicWordAutoCorrect(i8* nocapture %0, i32 %1) {
ret void
}
char char_fetch_xor_acq_rel(char *ptr, int value) {
  return __atomic_fetch_xor(ptr, value, 4);
}


x86 assembly (clang, -O0):
<char_fetch_xor_acq_rel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    %cl,-0xd(%rbp)
mov    -0xd(%rbp),%cl
mov    %cl,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0xf(%rbp)
mov    -0xf(%rbp),%al
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%sil
mov    %al,%dl
xor    %sil,%dl
lock cmpxchg %dl,(%rcx)
sete   %cl
mov    %al,-0x19(%rbp)
test   $0x1,%cl
mov    %al,-0xf(%rbp)
jne    114f <char_fetch_xor_acq_rel+0x4f>
jmp    1124 <char_fetch_xor_acq_rel+0x24>
mov    -0x19(%rbp),%al
mov    %al,-0xe(%rbp)
movsbl -0xe(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_fetch_xor_acq_rel>:
mov    (%rdi),%al
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
xor    %sil,%cl
lock cmpxchg %cl,(%rdi)
jne    1110 <char_fetch_xor_acq_rel+0x10>
ret

LLVM IR (-O0):
define signext i8 @char_fetch_xor_acq_rel(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = trunc i32 %8 to i8
store i8 %9, i8* %5
%10 = load i8, i8* %5
%11 = atomicrmw xor i8* %7, i8 %10 acq_rel
store i8 %11, i8* %6
%12 = load i8, i8* %6
ret i8 %12
}

LLVM IR (-O2):
define signext i8 @char_fetch_xor_acq_rel(i8* nocapture %0, i32 %1) {
%3 = trunc i32 %1 to i8
%4 = atomicrmw xor i8* %0, i8 %3 acq_rel
ret i8 %4
}
int main() {
  int i = 123, j = 5, k = 1;
  do {
    i++;
    do {
      j++;
      do {
        k++;
      } while (k < 4);
    } while (j < 2);
  } while (i < 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x7b,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x4,-0x10(%rbp)
jl     1132 <main+0x32>
jmp    114a <main+0x4a>
cmpl   $0x2,-0xc(%rbp)
jl     1129 <main+0x29>
jmp    1159 <main+0x59>
cmpl   $0x5,-0x8(%rbp)
jl     1120 <main+0x20>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 123, i32* %2
store i32 5, i32* %3
store i32 1, i32* %4
br label %5
5: ; preds = %22, %0
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 1
store i32 %7, i32* %2
br label %8
8: ; preds = %18, %5
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %11
11: ; preds = %14, %8
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
store i32 %13, i32* %4
br label %14
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp slt i32 %15, 4
br i1 %16, label %11, label %17
17: ; preds = %14
br label %18
18: ; preds = %17
%19 = load i32, i32* %3
%20 = icmp slt i32 %19, 2
br i1 %20, label %8, label %21
21: ; preds = %18
br label %22
22: ; preds = %21
%23 = load i32, i32* %2
%24 = icmp slt i32 %23, 5
br i1 %24, label %5, label %25
25: ; preds = %22
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void ls_cost_nm5_decref(void) {}


x86 assembly (clang, -O0):
<ls_cost_nm5_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm5_decref>:
ret

LLVM IR (-O0):
define void @ls_cost_nm5_decref() {
ret void
}

LLVM IR (-O2):
define void @ls_cost_nm5_decref() {
ret void
}
int test_imm_52int8_reg(signed char val) {
  return ((val) & (0x52 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_52int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x52,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_52int8_reg>:
test   $0x52,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_52int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 82
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_52int8_reg(i8 signext %0) {
%2 = and i8 %0, 82
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void ff_hevc_put_hevc_uni_w_qpel_hv16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_hv16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_hv16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_hv16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_hv16_12_sse4() {
ret void
}
/* Variables and functions */
unsigned char *chreke_client_authorize(unsigned char *, unsigned char *,
                                       unsigned char *, unsigned char const *);
unsigned char *ke_chreke_client_authorize(unsigned char *client_auth,
                                          unsigned char *client_context,
                                          unsigned char *key_agreed,
                                          const unsigned char *server_session) {
  return chreke_client_authorize(client_auth, client_context, key_agreed,
                                 server_session);
}


x86 assembly (clang, -O0):
<ke_chreke_client_authorize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <chreke_client_authorize@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ke_chreke_client_authorize>:
jmp    1030 <chreke_client_authorize@plt>

LLVM IR (-O0):
define i8* @ke_chreke_client_authorize(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i8* @chreke_client_authorize(i8* %9, i8* %10, i8* %11, i8* %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @ke_chreke_client_authorize(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i8* @chreke_client_authorize(i8* %0, i8* %1, i8* %2, i8* %3)
ret i8* %5
}
int test4(int *a, int *b) { return a - b; }


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
mov    %rdi,%rax
sub    %rsi,%rax
shr    $0x2,%rax
ret

LLVM IR (-O0):
define i32 @test4(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = ptrtoint i32* %5 to i64
%8 = ptrtoint i32* %6 to i64
%9 = sub i64 %7, %8
%10 = sdiv exact i64 %9, 4
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @test4(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = sub i64 %3, %4
%6 = lshr exact i64 %5, 2
%7 = trunc i64 %6 to i32
ret i32 %7
}
int isodigit(int c) { return c >= '0' && c < '8'; }


x86 assembly (clang, -O0):
<isodigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isodigit+0x20>
cmpl   $0x38,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isodigit>:
and    $0xfffffff8,%edi
xor    %eax,%eax
cmp    $0x30,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isodigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 56
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isodigit(i32 %0) {
%2 = and i32 %0, -8
%3 = icmp eq i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  char *res_class;
};
typedef TYPE_1__ XClassHint;

/* Variables and functions */
void set_XClassHint_res_class(void *_p, void *_v) {
  ((XClassHint *)_p)->res_class = (char *)_v;
}


x86 assembly (clang, -O0):
<set_XClassHint_res_class>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XClassHint_res_class>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i8* }
define void @set_XClassHint_res_class(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i8* %5, i8** %8
ret void
}

LLVM IR (-O2):
define void @set_XClassHint_res_class(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Variables and functions */
short printNumber(unsigned long, int);
scalar_t__ println();
short printNumber_UC_ln(unsigned char b, int base) {
  short n = 0;
  n = printNumber((unsigned long)b, base);
  n += println();
  return (n);
}


x86 assembly (clang, -O0):
<printNumber_UC_ln>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movw   $0x0,-0xa(%rbp)
movzbl -0x1(%rbp),%eax
mov    %eax,%edi
mov    -0x8(%rbp),%esi
call   1040 <printNumber@plt>
mov    %ax,-0xa(%rbp)
mov    $0x0,%al
call   1030 <println@plt>
mov    %rax,%rcx
movswq -0xa(%rbp),%rax
add    %rcx,%rax
mov    %ax,-0xa(%rbp)
movswl -0xa(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printNumber_UC_ln>:
push   %rbx
mov    %edi,%edi
call   1040 <printNumber@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <println@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i16 @printNumber_UC_ln(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i16
store i8 %0, i8* %3
store i32 %1, i32* %4
store i16 0, i16* %5
%6 = load i8, i8* %3
%7 = zext i8 %6 to i64
%8 = load i32, i32* %4
%9 = call signext i16 @printNumber(i64 %7, i32 %8)
store i16 %9, i16* %5
%10 = call i64 (...) @println()
%11 = load i16, i16* %5
%12 = sext i16 %11 to i64
%13 = add nsw i64 %12, %10
%14 = trunc i64 %13 to i16
store i16 %14, i16* %5
%15 = load i16, i16* %5
ret i16 %15
}

LLVM IR (-O2):
define signext i16 @printNumber_UC_ln(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i64
%4 = tail call signext i16 @printNumber(i64 %3, i32 %1)
%5 = tail call i64 (...) @println()
%6 = trunc i64 %5 to i16
%7 = add i16 %4, %6
ret i16 %7
}
/* Type definitions */
struct plugin_manager_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
plugin_manager_init_and_or_create(struct plugin_manager_struct *, char const *,
                                  int /*<<< orphan*/, int /*<<< orphan*/ *);
int plugin_manager_init_plugin(struct plugin_manager_struct *manager,
                               const char *name) {
  if (!plugin_manager_init_and_or_create(manager, name, 0, NULL))
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<plugin_manager_init_plugin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
xor    %edx,%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <plugin_manager_init_and_or_create@plt>
cmp    $0x0,%eax
jne    1148 <plugin_manager_init_plugin+0x38>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <plugin_manager_init_plugin+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_manager_init_plugin>:
push   %rax
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <plugin_manager_init_and_or_create@plt>
cmp    $0x1,%eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.plugin_manager_struct = type { i32 }
define i32 @plugin_manager_init_plugin(%struct.plugin_manager_struct* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.plugin_manager_struct*
%5 = alloca i8*
store %struct.plugin_manager_struct* %0, %struct.plugin_manager_struct** %4
store i8* %1, i8** %5
%6 = load %struct.plugin_manager_struct*, %struct.plugin_manager_struct** %4
%7 = load i8*, i8** %5
%8 = call i32 @plugin_manager_init_and_or_create(%struct.plugin_manager_struct* %6, i8* %7, i32 0, i32* null)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 -1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.plugin_manager_struct = type { i32 }
define i32 @plugin_manager_init_plugin(%struct.plugin_manager_struct* %0, i8* %1) {
%3 = tail call i32 @plugin_manager_init_and_or_create(%struct.plugin_manager_struct* %0, i8* %1, i32 0, i32* null)
%4 = icmp eq i32 %3, 0
%5 = sext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fflush(FILE *fp) { return (0); }


x86 assembly (clang, -O0):
<fflush>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fflush>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fflush(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fflush(i32* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int closedir(int /*<<< orphan*/ *);
__attribute__((__weak__, __always___)) int softboundmpx_closedir(DIR *dir) {
  return closedir(dir);
}


x86 assembly (clang, -O0):
<softboundmpx_closedir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <closedir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_closedir>:
jmp    1030 <closedir@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_closedir(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @closedir(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define weak i32 @softboundmpx_closedir(i32* %0) {
%2 = tail call i32 @closedir(i32* %0)
ret i32 %2
}
/* Variables and functions */
char *strdup(char const *);
char *ss_strdup(const char *s) {
  if (!s) {
    return NULL;
  }
  return strdup(s);
}


x86 assembly (clang, -O0):
<ss_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <ss_strdup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1141 <ss_strdup+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <strdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ss_strdup>:
test   %rdi,%rdi
je     111a <ss_strdup+0xa>
jmp    1030 <strdup@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ss_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i8* null, i8** %2
br label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i8* @strdup(i8* %8)
store i8* %9, i8** %2
br label %10
10: ; preds = %7, %6
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @ss_strdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @strdup(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
void AONIOC32kHzOutputDisable(void) {
  (*((volatile unsigned long *)(0x40094000 + 0x00000010))) = 0x00000001;
}


x86 assembly (clang, -O0):
<AONIOC32kHzOutputDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40094010,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AONIOC32kHzOutputDisable>:
movq   $0x1,0x40094010
ret

LLVM IR (-O0):
define void @AONIOC32kHzOutputDisable() {
store volatile i64 1, i64* inttoptr (i64 1074348048 to i64*)
ret void
}

LLVM IR (-O2):
define void @AONIOC32kHzOutputDisable() {
store volatile i64 1, i64* inttoptr (i64 1074348048 to i64*)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ rtc_memw();
void rtc_reg_write(uint32_t addr, uint32_t val) {
  rtc_memw();
  addr += 0x60000700;
  *((volatile uint32_t *)addr) = val;
  rtc_memw();
}


x86 assembly (clang, -O0):
<rtc_reg_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rtc_memw@plt>
mov    -0x8(%rbp),%rax
add    $0x60000700,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <rtc_memw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_reg_write>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <rtc_memw@plt>
mov    %r14,0x60000700(%rbx)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <rtc_memw@plt>

LLVM IR (-O0):
define void @rtc_reg_write(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call i32 (...) @rtc_memw()
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 1610614528
store i64 %7, i64* %3
%8 = load i64, i64* %4
%9 = load i64, i64* %3
%10 = inttoptr i64 %9 to i64*
store volatile i64 %8, i64* %10
%11 = call i32 (...) @rtc_memw()
ret void
}

LLVM IR (-O2):
define void @rtc_reg_write(i64 %0, i64 %1) {
%3 = tail call i32 (...) @rtc_memw()
%4 = add nsw i64 %0, 1610614528
%5 = inttoptr i64 %4 to i64*
store volatile i64 %1, i64* %5
%6 = tail call i32 (...) @rtc_memw()
ret void
}
int test09(int a, int b, int c, int d) {
  int x = a == b;
  int y = c == d;
  return x != y;
}


x86 assembly (clang, -O0):
<test09>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test09>:
cmp    %esi,%edi
sete   %al
cmp    %ecx,%edx
sete   %cl
xor    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @test09(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = icmp eq i32 %11, %12
%14 = zext i1 %13 to i32
store i32 %14, i32* %9
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = icmp eq i32 %15, %16
%18 = zext i1 %17 to i32
store i32 %18, i32* %10
%19 = load i32, i32* %9
%20 = load i32, i32* %10
%21 = icmp ne i32 %19, %20
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @test09(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %0, %1
%6 = icmp eq i32 %2, %3
%7 = xor i1 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ myputs(char *);
int main() {
  myputs("Hello world.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <myputs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <myputs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello world.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @myputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello world.\0A\00"
define i32 @main() {
%1 = tail call i32 @myputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
unsigned long DMemTest(int, int, int, int);
main(void) {
  unsigned long fail_addr;
  if (fail_addr = DMemTest(0x40000000, 0xc0000000, 16000, 16000))
    return (0);
  else
    return (1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x40000000,%edi
mov    $0xc0000000,%esi
mov    $0x3e80,%ecx
mov    %ecx,%edx
call   1030 <DMemTest@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     114f <main+0x3f>
movl   $0x0,-0x4(%rbp)
jmp    1156 <main+0x46>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x40000000,%edi
mov    $0xc0000000,%esi
mov    $0x3e80,%edx
mov    $0x3e80,%ecx
call   1030 <DMemTest@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = call i64 @DMemTest(i32 1073741824, i32 -1073741824, i32 16000, i32 16000)
store i64 %3, i64* %2
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 0, i32* %1
br label %7
6: ; preds = %0
store i32 1, i32* %1
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @DMemTest(i32 1073741824, i32 -1073741824, i32 16000, i32 16000)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int bin_count(int);
int days(int n) {
  return n < 4 ? n : n & (n - 1) ? bin_count(n << 1 + 1) : bin_count(n) + 1;
}


x86 assembly (clang, -O0):
<days>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x4,-0x4(%rbp)
jge    1130 <days+0x20>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    116b <days+0x5b>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1157 <days+0x47>
mov    -0x4(%rbp),%edi
shl    $0x2,%edi
call   1030 <bin_count@plt>
mov    %eax,-0xc(%rbp)
jmp    1165 <days+0x55>
mov    -0x4(%rbp),%edi
call   1030 <bin_count@plt>
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<days>:
cmp    $0x4,%edi
jl     112b <days+0x1b>
lea    -0x1(%rdi),%eax
test   %eax,%edi
jne    112e <days+0x1e>
push   %rax
call   1030 <bin_count@plt>
mov    %eax,%edi
add    $0x1,%edi
add    $0x8,%rsp
mov    %edi,%eax
ret
shl    $0x2,%edi
jmp    1030 <bin_count@plt>

LLVM IR (-O0):
define i32 @days(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 4
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %23
7: ; preds = %1
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
%11 = and i32 %8, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %7
%14 = load i32, i32* %2
%15 = shl i32 %14, 2
%16 = call i32 @bin_count(i32 %15)
br label %21
17: ; preds = %7
%18 = load i32, i32* %2
%19 = call i32 @bin_count(i32 %18)
%20 = add nsw i32 %19, 1
br label %21
21: ; preds = %17, %13
%22 = phi i32 [ %16, %13 ], [ %20, %17 ]
br label %23
23: ; preds = %21, %5
%24 = phi i32 [ %6, %5 ], [ %22, %21 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @days(i32 %0) {
%2 = icmp slt i32 %0, 4
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = shl i32 %0, 2
%8 = tail call i32 @bin_count(i32 %7)
br label %12
9: ; preds = %3
%10 = tail call i32 @bin_count(i32 %0)
%11 = add nsw i32 %10, 1
br label %12
12: ; preds = %1, %6, %9
%13 = phi i32 [ %8, %6 ], [ %11, %9 ], [ %0, %1 ]
ret i32 %13
}
int nbl_is_nmll(char *pstrBuffer) {
  return (*((unsigned int *)(pstrBuffer + 0x00))) == 0x4C4C4D4E;
}


x86 assembly (clang, -O0):
<nbl_is_nmll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x4c4c4d4e,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nbl_is_nmll>:
xor    %eax,%eax
cmpl   $0x4c4c4d4e,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @nbl_is_nmll(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1280068942
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @nbl_is_nmll(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1280068942
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ bzero(char *, int);
void initialize_3d_char(char ***array, int n1, int n2, int n3) {
  bzero(array[0][0], n1 * n2 * n3 * sizeof(char));
}


x86 assembly (clang, -O0):
<initialize_3d_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rdi
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
imul   -0x14(%rbp),%eax
cltq
shl    $0x0,%rax
mov    %eax,%esi
call   1030 <bzero@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_3d_char>:
mov    (%rdi),%rax
mov    (%rax),%rdi
imul   %edx,%esi
imul   %ecx,%esi
jmp    1030 <bzero@plt>

LLVM IR (-O0):
define void @initialize_3d_char(i8*** %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8***
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8*** %0, i8**** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8***, i8**** %5
%10 = getelementptr inbounds i8**, i8*** %9, i64 0
%11 = load i8**, i8*** %10
%12 = getelementptr inbounds i8*, i8** %11, i64 0
%13 = load i8*, i8** %12
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = mul nsw i32 %14, %15
%17 = load i32, i32* %8
%18 = mul nsw i32 %16, %17
%19 = sext i32 %18 to i64
%20 = mul i64 %19, 1
%21 = trunc i64 %20 to i32
%22 = call i32 @bzero(i8* %13, i32 %21)
ret void
}

LLVM IR (-O2):
define void @initialize_3d_char(i8*** nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = load i8**, i8*** %0
%6 = load i8*, i8** %5
%7 = mul nsw i32 %2, %1
%8 = mul nsw i32 %7, %3
%9 = tail call i32 @bzero(i8* %6, i32 %8)
ret void
}
/* Variables and functions */
int largest_palindrome();
int /*<<< orphan*/ printf(char *, int);
int main() { printf("%d\n", largest_palindrome()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <largest_palindrome@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <largest_palindrome@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 (...) @largest_palindrome()
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @largest_palindrome()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ttclose();
int ansiclose() {
  ttclose();
  return 0;
}


x86 assembly (clang, -O0):
<ansiclose>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ttclose@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ansiclose>:
push   %rax
xor    %eax,%eax
call   1030 <ttclose@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ansiclose() {
%1 = call i32 (...) @ttclose()
ret i32 0
}

LLVM IR (-O2):
define i32 @ansiclose() {
%1 = tail call i32 (...) @ttclose()
ret i32 0
}
unsigned int fn2(unsigned int x, unsigned int y) {
  unsigned int tem1 = x & y;
  unsigned int tem2 = x | y;
  return tem1 ^ tem2;
}


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = and i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = or i32 %10, %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = xor i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @fn2(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ get_pin(int /*<<< orphan*/, int, int);
uint8_t io_read_pin(uint8_t pin) { return get_pin(pin, 0x12, 0x13); }


x86 assembly (clang, -O0):
<io_read_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x12,%esi
mov    $0x13,%edx
call   1030 <get_pin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_read_pin>:
mov    $0x12,%esi
mov    $0x13,%edx
jmp    1030 <get_pin@plt>

LLVM IR (-O0):
define i32 @io_read_pin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @get_pin(i32 %3, i32 18, i32 19)
ret i32 %4
}

LLVM IR (-O2):
define i32 @io_read_pin(i32 %0) {
%2 = tail call i32 @get_pin(i32 %0, i32 18, i32 19)
ret i32 %2
}
int main() {
  int a = 0;
  int b = 1;
  if (b == 0) {
    a = a + b;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    112c <main+0x2c>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %0
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
store i32 %9, i32* %2
br label %10
10: ; preds = %6, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void benchSVML512_SPNontrig() {}


x86 assembly (clang, -O0):
<benchSVML512_SPNontrig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<benchSVML512_SPNontrig>:
ret

LLVM IR (-O0):
define void @benchSVML512_SPNontrig() {
ret void
}

LLVM IR (-O2):
define void @benchSVML512_SPNontrig() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long);
int main(void) {
  printf("BITMAP_LAST_WORD_MASK(32):%d\n", (~0UL >> (-(32) & (64 - 1))));
  printf("BITMAP_LAST_WORD_MASK(65):%d\n", (~0UL >> (-(65) & (64 - 1))));
  printf("BITMAP_LAST_WORD_MASK_TOOLS(32):%d\n",
         (((32) % 64) ? (1UL << ((32) % 64)) - 1 : ~0UL));
  printf("BITMAP_LAST_WORD_MASK_TOOLS(65):%d\n",
         (((65) % 64) ? (1UL << ((65) % 64)) - 1 : ~0UL));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xef4(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
lea    0xf07(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
lea    0xef5(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xf02(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
lea    0xf15(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"BITMAP_LAST_WORD_MASK(32):%d\0A\00"
@.str.1 = [30 x i8] c"BITMAP_LAST_WORD_MASK(65):%d\0A\00"
@.str.2 = [36 x i8] c"BITMAP_LAST_WORD_MASK_TOOLS(32):%d\0A\00"
@.str.3 = [36 x i8] c"BITMAP_LAST_WORD_MASK_TOOLS(65):%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i64 4294967295)
%3 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0), i64 1)
%4 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0), i64 4294967295)
%5 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.3, i64 0, i64 0), i64 1)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"BITMAP_LAST_WORD_MASK(32):%d\0A\00"
@.str.1 = [30 x i8] c"BITMAP_LAST_WORD_MASK(65):%d\0A\00"
@.str.2 = [36 x i8] c"BITMAP_LAST_WORD_MASK_TOOLS(32):%d\0A\00"
@.str.3 = [36 x i8] c"BITMAP_LAST_WORD_MASK_TOOLS(65):%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i64 4294967295)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0), i64 1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0), i64 4294967295)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.3, i64 0, i64 0), i64 1)
ret i32 0
}
/* Variables and functions */
char *strchr(char *, char);
size_t strlen(char *);
void modificar_caracter(char **cadena, char letra_ant, char letra_nueva) {
  char *cadena_aux = strchr(*cadena, letra_ant);
  (*cadena)[strlen(*cadena) - strlen(cadena_aux)] = letra_nueva;
}


x86 assembly (clang, -O0):
<modificar_caracter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
movsbl -0x9(%rbp),%esi
call   1040 <strchr@plt>
mov    %rax,-0x18(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x21(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x30(%rbp),%rcx
mov    -0x21(%rbp),%dl
mov    %rax,%rsi
mov    -0x20(%rbp),%rax
sub    %rsi,%rcx
mov    %dl,(%rax,%rcx,1)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modificar_caracter>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    (%rdi),%rbx
mov    %rbx,%rdi
call   1040 <strchr@plt>
mov    %rax,%r15
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %rax,%rbp
mov    %r15,%rdi
call   1030 <strlen@plt>
sub    %rax,%rbp
mov    %r14b,(%rbx,%rbp,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @modificar_caracter(i8** %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8**
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8*
store i8** %0, i8*** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = load i8, i8* %5
%11 = call i8* @strchr(i8* %9, i8 signext %10)
store i8* %11, i8** %7
%12 = load i8, i8* %6
%13 = load i8**, i8*** %4
%14 = load i8*, i8** %13
%15 = load i8**, i8*** %4
%16 = load i8*, i8** %15
%17 = call i64 @strlen(i8* %16)
%18 = load i8*, i8** %7
%19 = call i64 @strlen(i8* %18)
%20 = sub i64 %17, %19
%21 = getelementptr inbounds i8, i8* %14, i64 %20
store i8 %12, i8* %21
ret void
}

LLVM IR (-O2):
define void @modificar_caracter(i8** nocapture %0, i8 signext %1, i8 signext %2) {
%4 = load i8*, i8** %0
%5 = tail call i8* @strchr(i8* dereferenceable(1) %4, i8 signext %1)
%6 = tail call i64 @strlen(i8* dereferenceable(1) %4)
%7 = tail call i64 @strlen(i8* dereferenceable(1) %5)
%8 = sub i64 %6, %7
%9 = getelementptr inbounds i8, i8* %4, i64 %8
store i8 %2, i8* %9
ret void
}
char getTextualGrade(unsigned numericGrade) {
  char grade;
  if (numericGrade == 1) {
    grade = 'A';
  } else if (numericGrade == 2) {
    grade = 'B';
  } else if (numericGrade == 3) {
    grade = 'C';
  } else if (numericGrade == 4) {
    grade = 'D';
  } else if (numericGrade == 5) {
    grade = 'E';
  } else if (numericGrade == 6) {
    grade = 'F';
  } else {
    grade = 'Z';
  }
  return grade;
}


x86 assembly (clang, -O0):
<getTextualGrade>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    111a <getTextualGrade+0x1a>
movb   $0x41,-0x5(%rbp)
jmp    1196 <getTextualGrade+0x96>
cmpl   $0x2,-0x4(%rbp)
jne    112d <getTextualGrade+0x2d>
movb   $0x42,-0x5(%rbp)
jmp    1191 <getTextualGrade+0x91>
cmpl   $0x3,-0x4(%rbp)
jne    1140 <getTextualGrade+0x40>
movb   $0x43,-0x5(%rbp)
jmp    118c <getTextualGrade+0x8c>
cmpl   $0x4,-0x4(%rbp)
jne    1153 <getTextualGrade+0x53>
movb   $0x44,-0x5(%rbp)
jmp    1187 <getTextualGrade+0x87>
cmpl   $0x5,-0x4(%rbp)
jne    1166 <getTextualGrade+0x66>
movb   $0x45,-0x5(%rbp)
jmp    1182 <getTextualGrade+0x82>
cmpl   $0x6,-0x4(%rbp)
jne    1179 <getTextualGrade+0x79>
movb   $0x46,-0x5(%rbp)
jmp    117d <getTextualGrade+0x7d>
movb   $0x5a,-0x5(%rbp)
jmp    1182 <getTextualGrade+0x82>
jmp    1187 <getTextualGrade+0x87>
jmp    118c <getTextualGrade+0x8c>
jmp    1191 <getTextualGrade+0x91>
jmp    1196 <getTextualGrade+0x96>
movsbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTextualGrade>:
add    $0xffffffff,%edi
lea    0x41(%rdi),%eax
cmp    $0x6,%edi
movzbl %al,%ecx
mov    $0x5a,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @getTextualGrade(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 65, i8* %3
br label %33
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 66, i8* %3
br label %32
11: ; preds = %7
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 3
br i1 %13, label %14, label %15
14: ; preds = %11
store i8 67, i8* %3
br label %31
15: ; preds = %11
%16 = load i32, i32* %2
%17 = icmp eq i32 %16, 4
br i1 %17, label %18, label %19
18: ; preds = %15
store i8 68, i8* %3
br label %30
19: ; preds = %15
%20 = load i32, i32* %2
%21 = icmp eq i32 %20, 5
br i1 %21, label %22, label %23
22: ; preds = %19
store i8 69, i8* %3
br label %29
23: ; preds = %19
%24 = load i32, i32* %2
%25 = icmp eq i32 %24, 6
br i1 %25, label %26, label %27
26: ; preds = %23
store i8 70, i8* %3
br label %28
27: ; preds = %23
store i8 90, i8* %3
br label %28
28: ; preds = %27, %26
br label %29
29: ; preds = %28, %22
br label %30
30: ; preds = %29, %18
br label %31
31: ; preds = %30, %14
br label %32
32: ; preds = %31, %10
br label %33
33: ; preds = %32, %6
%34 = load i8, i8* %3
ret i8 %34
}

LLVM IR (-O2):
define signext i8 @getTextualGrade(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 6
%4 = trunc i32 %2 to i8
%5 = add i8 %4, 65
%6 = select i1 %3, i8 %5, i8 90
ret i8 %6
}
char ch_toupper(char ch) {
  return ((ch >= 'a') && (ch <= 'z')) ? (ch - 'a' + 'A') : ch;
}


x86 assembly (clang, -O0):
<ch_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1136 <ch_toupper+0x36>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     1136 <ch_toupper+0x36>
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %eax,-0x8(%rbp)
jmp    113d <ch_toupper+0x3d>
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch_toupper>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @ch_toupper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 97
%14 = add nsw i32 %13, 65
br label %18
15: ; preds = %6, %1
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
br label %18
18: ; preds = %15, %10
%19 = phi i32 [ %14, %10 ], [ %17, %15 ]
%20 = trunc i32 %19 to i8
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @ch_toupper(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ entity_master_simulate();
void update() { entity_master_simulate(); }


x86 assembly (clang, -O0):
<update>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <entity_master_simulate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<update>:
xor    %eax,%eax
jmp    1030 <entity_master_simulate@plt>

LLVM IR (-O0):
define void @update() {
%1 = call i32 (...) @entity_master_simulate()
ret void
}

LLVM IR (-O2):
define void @update() {
%1 = tail call i32 (...) @entity_master_simulate()
ret void
}
/* Variables and functions */
int RAND_MAX;
int rand();
int getRandomWithRange(int lower, int upper) {
  int randVal = 0;
  randVal = lower + rand() / (RAND_MAX / (upper - lower + 1) + 1);
  return randVal;
}


x86 assembly (clang, -O0):
<getRandomWithRange>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x14(%rbp)
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRandomWithRange>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%ecx
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
mov    %eax,%esi
add    $0x1,%esi
mov    %ecx,%eax
cltd
idiv   %esi
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @getRandomWithRange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %3
%7 = call i32 (...) @rand()
%8 = load i32, i32* @RAND_MAX
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = sub nsw i32 %9, %10
%12 = add nsw i32 %11, 1
%13 = sdiv i32 %8, %12
%14 = add nsw i32 %13, 1
%15 = sdiv i32 %7, %14
%16 = add nsw i32 %6, %15
store i32 %16, i32* %5
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @getRandomWithRange(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = load i32, i32* @RAND_MAX
%5 = sub i32 1, %0
%6 = add i32 %5, %1
%7 = sdiv i32 %4, %6
%8 = add nsw i32 %7, 1
%9 = sdiv i32 %3, %8
%10 = add nsw i32 %9, %0
ret i32 %10
}
void foo682(int p) {}


x86 assembly (clang, -O0):
<foo682>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo682>:
ret

LLVM IR (-O0):
define void @foo682(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo682(i32 %0) {
ret void
}
/* Variables and functions */
int fifo_write(char *);
int fifo_next_music() { return fifo_write("pt_step 1\n"); }


x86 assembly (clang, -O0):
<fifo_next_music>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fifo_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifo_next_music>:
lea    0xee9(%rip),%rdi
jmp    1030 <fifo_write@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"pt_step 1\0A\00"
define i32 @fifo_next_music() {
%1 = call i32 @fifo_write(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [11 x i8] c"pt_step 1\0A\00"
define i32 @fifo_next_music() {
%1 = tail call i32 @fifo_write(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void foo7() {}


x86 assembly (clang, -O0):
<foo7>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo7>:
ret

LLVM IR (-O0):
define void @foo7() {
ret void
}

LLVM IR (-O2):
define void @foo7() {
ret void
}
void ptrace_sandbox_attach_point(void) {}


x86 assembly (clang, -O0):
<ptrace_sandbox_attach_point>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_sandbox_attach_point>:
ret

LLVM IR (-O0):
define void @ptrace_sandbox_attach_point() {
ret void
}

LLVM IR (-O2):
define void @ptrace_sandbox_attach_point() {
ret void
}
_Bool onlyBitsSet(const int flags, const int mask) {
  if (flags & ~mask)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<onlyBitsSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1127 <onlyBitsSet+0x27>
movb   $0x0,-0x1(%rbp)
jmp    112b <onlyBitsSet+0x2b>
movb   $0x1,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<onlyBitsSet>:
not    %esi
test   %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define zeroext i1 @onlyBitsSet(i32 %0, i32 %1) {
%3 = alloca i1
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i1 false, i1* %3
br label %13
12: ; preds = %2
store i1 true, i1* %3
br label %13
13: ; preds = %12, %11
%14 = load i1, i1* %3
ret i1 %14
}

LLVM IR (-O2):
define zeroext i1 @onlyBitsSet(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
ret i1 %5
}