xunge/DecIR huggingface dataset:
/* Type definitions */
struct shared_pool {
  int dummy;
};

/* Variables and functions */
struct shared_pool *shared_pool_alloc_and_init(int, int, int);
int /*<<< orphan*/ shared_pool_blind_guardian(struct shared_pool *, int, int,
                                              int /*<<< orphan*/);
int /*<<< orphan*/ shared_pool_destroy(struct shared_pool *);
int main(void) {
  struct shared_pool *sp = shared_pool_alloc_and_init(0xbeef, 17, 128);
  shared_pool_blind_guardian(sp, 10000, 10000000, 0);
  shared_pool_destroy(sp);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xbeef,%edi
mov    $0x11,%esi
mov    $0x80,%edx
call   1050 <shared_pool_alloc_and_init@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2710,%esi
mov    $0x989680,%edx
xor    %ecx,%ecx
call   1030 <shared_pool_blind_guardian@plt>
mov    -0x10(%rbp),%rdi
call   1040 <shared_pool_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xbeef,%edi
mov    $0x11,%esi
mov    $0x80,%edx
call   1050 <shared_pool_alloc_and_init@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x2710,%esi
mov    $0x989680,%edx
xor    %ecx,%ecx
call   1030 <shared_pool_blind_guardian@plt>
mov    %rbx,%rdi
call   1040 <shared_pool_destroy@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.shared_pool = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.shared_pool*
store i32 0, i32* %1
%3 = call %struct.shared_pool* @shared_pool_alloc_and_init(i32 48879, i32 17, i32 128)
store %struct.shared_pool* %3, %struct.shared_pool** %2
%4 = load %struct.shared_pool*, %struct.shared_pool** %2
%5 = call i32 @shared_pool_blind_guardian(%struct.shared_pool* %4, i32 10000, i32 10000000, i32 0)
%6 = load %struct.shared_pool*, %struct.shared_pool** %2
%7 = call i32 @shared_pool_destroy(%struct.shared_pool* %6)
ret i32 0
}

LLVM IR (-O2):
%struct.shared_pool = type { i32 }
define i32 @main() {
%1 = tail call %struct.shared_pool* @shared_pool_alloc_and_init(i32 48879, i32 17, i32 128)
%2 = tail call i32 @shared_pool_blind_guardian(%struct.shared_pool* %1, i32 10000, i32 10000000, i32 0)
%3 = tail call i32 @shared_pool_destroy(%struct.shared_pool* %1)
ret i32 0
}
/* Variables and functions */
int getpagesize();
int /*<<< orphan*/ printf(char *, int);
void test_pagesize(void) { printf("Pagesize: %d\n", getpagesize()); }


x86 assembly (clang, -O0):
<test_pagesize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <getpagesize@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_pagesize>:
push   %rax
xor    %eax,%eax
call   1040 <getpagesize@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Pagesize: %d\0A\00"
define void @test_pagesize() {
%1 = call i32 (...) @getpagesize()
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Pagesize: %d\0A\00"
define void @test_pagesize() {
%1 = tail call i32 (...) @getpagesize()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
bool fields_whitespace(char ch) { return (ch == 9) || (ch == 32); }


x86 assembly (clang, -O0):
<fields_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     1129 <fields_whitespace+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x20,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fields_whitespace>:
cmp    $0x9,%dil
sete   %al
cmp    $0x20,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @fields_whitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 9
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @fields_whitespace(i8 signext %0) {
%2 = icmp eq i8 %0, 9
%3 = icmp eq i8 %0, 32
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned long SysCtlADCSpeedGet(void) {
  ;
  return ((*((volatile unsigned long *)(0x400FE100))) & 0x00000F00);
}


x86 assembly (clang, -O0):
<SysCtlADCSpeedGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fe100,%eax
mov    (%rax),%rax
and    $0xf00,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlADCSpeedGet>:
mov    0x400fe100,%rax
40
and    $0xf00,%eax
ret

LLVM IR (-O0):
define i64 @SysCtlADCSpeedGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074782464 to i64*)
%2 = and i64 %1, 3840
ret i64 %2
}

LLVM IR (-O2):
define i64 @SysCtlADCSpeedGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074782464 to i64*)
%2 = and i64 %1, 3840
ret i64 %2
}
int test_imm_84int64_midword_reg(long long val) {
  return ((val >> 16) & (0x84 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_84int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x84,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_84int64_midword_reg>:
test   $0x840000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_84int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 132
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_84int64_midword_reg(i64 %0) {
%2 = and i64 %0, 8650752
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int a, b;
  scanf("%d%d", &a, &b);
  printf("%d\n", a + b + 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x4(%rbp),%esi
add    -0x8(%rbp),%esi
add    $0x1,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
mov    (%rsp),%ecx
lea    (%rax,%rcx,1),%esi
add    $0x1,%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
%7 = add nsw i32 %6, 1
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = add i32 %6, 1
%9 = add i32 %8, %7
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Variables and functions */
char *_itoa(int);
int /*<<< orphan*/ output_string(char *);
void output_decimal(int number) {
  char *p = _itoa(number);
  output_string(p);
}


x86 assembly (clang, -O0):
<output_decimal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_itoa@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <output_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_decimal>:
push   %rax
call   1040 <_itoa@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <output_string@plt>

LLVM IR (-O0):
define void @output_decimal(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @_itoa(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @output_string(i8* %6)
ret void
}

LLVM IR (-O2):
define void @output_decimal(i32 %0) {
%2 = tail call i8* @_itoa(i32 %0)
%3 = tail call i32 @output_string(i8* %2)
ret void
}
/* Type definitions */
struct device_d {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ WARN_ON(int);
int device_reset(struct device_d *dev) {
  WARN_ON(1);
  return 0;
}


x86 assembly (clang, -O0):
<device_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <WARN_ON@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_reset>:
push   %rax
mov    $0x1,%edi
call   1030 <WARN_ON@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.device_d = type { i32 }
define i32 @device_reset(%struct.device_d* %0) {
%2 = alloca %struct.device_d*
store %struct.device_d* %0, %struct.device_d** %2
%3 = call i32 @WARN_ON(i32 1)
ret i32 0
}

LLVM IR (-O2):
%struct.device_d = type { i32 }
define i32 @device_reset(%struct.device_d* nocapture readnone %0) {
%2 = tail call i32 @WARN_ON(i32 1)
ret i32 0
}
void caller_1_1_1_1_1_1_1() {}


x86 assembly (clang, -O0):
<caller_1_1_1_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_1_1_1_1_1_1_1>:
ret

LLVM IR (-O0):
define void @caller_1_1_1_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @caller_1_1_1_1_1_1_1() {
ret void
}
/* Type definitions */
struct mpd_pair {
  int dummy;
};
struct mpd_connection {
  int dummy;
};

/* Variables and functions */
struct mpd_pair *mpd_recv_pair_named(struct mpd_connection *, char *);
__attribute__((malloc)) struct mpd_pair *
mpd_recv_url_scheme_pair(struct mpd_connection *connection) {
  return mpd_recv_pair_named(connection, "handler");
}


x86 assembly (clang, -O0):
<mpd_recv_url_scheme_pair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <mpd_recv_pair_named@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpd_recv_url_scheme_pair>:
lea    0xee9(%rip),%rsi
jmp    1030 <mpd_recv_pair_named@plt>

LLVM IR (-O0):
%struct.mpd_pair = type { i32 }
%struct.mpd_connection = type { i32 }
@.str = [8 x i8] c"handler\00"
define noalias %struct.mpd_pair* @mpd_recv_url_scheme_pair(%struct.mpd_connection* %0) {
%2 = alloca %struct.mpd_connection*
store %struct.mpd_connection* %0, %struct.mpd_connection** %2
%3 = load %struct.mpd_connection*, %struct.mpd_connection** %2
%4 = call %struct.mpd_pair* @mpd_recv_pair_named(%struct.mpd_connection* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret %struct.mpd_pair* %4
}

LLVM IR (-O2):
%struct.mpd_pair = type { i32 }
%struct.mpd_connection = type { i32 }
@.str = [8 x i8] c"handler\00"
define noalias %struct.mpd_pair* @mpd_recv_url_scheme_pair(%struct.mpd_connection* %0) {
%2 = tail call %struct.mpd_pair* @mpd_recv_pair_named(%struct.mpd_connection* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret %struct.mpd_pair* %2
}
/* Variables and functions */
int /*<<< orphan*/ malloc(int);
int /*<<< orphan*/ sleep(int);
int main() {
  for (long i = 0; i < 99999999; i++) {
    malloc(1);
  }
  sleep(10);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x5f5e0ff,-0x10(%rbp)
05
jge    1160 <main+0x40>
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <main+0x17>
mov    $0xa,%edi
call   1040 <sleep@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x5f5e0ff,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <malloc@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <main+0x10>
mov    $0xa,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
br label %3
3: ; preds = %8, %0
%4 = load i64, i64* %2
%5 = icmp slt i64 %4, 99999999
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @malloc(i32 1)
br label %8
8: ; preds = %6
%9 = load i64, i64* %2
%10 = add nsw i64 %9, 1
store i64 %10, i64* %2
br label %3
11: ; preds = %3
%12 = call i32 @sleep(i32 10)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
br label %3
1: ; preds = %3
%2 = tail call i32 @sleep(i32 10)
ret i32 0
3: ; preds = %0, %3
%4 = phi i64 [ 0, %0 ], [ %6, %3 ]
%5 = tail call i32 @malloc(i32 1)
%6 = add nuw nsw i64 %4, 1
%7 = icmp eq i64 %6, 99999999
br i1 %7, label %1, label %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void roll_left(uint32_t state) { return; }


x86 assembly (clang, -O0):
<roll_left>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<roll_left>:
ret

LLVM IR (-O0):
define void @roll_left(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @roll_left(i32 %0) {
ret void
}
/* Variables and functions */
int strlen(char const *);
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
char *xmalloc(size_t);
char *xstrndup(const char *str, size_t n) {
  size_t len;
  char *cp;
  len = strlen(str) + 1;
  if (len > n && n > 0)
    len = n;
  cp = xmalloc(len);
  strncpy(cp, str, len);
  return cp;
}


x86 assembly (clang, -O0):
<xstrndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1173 <xstrndup+0x43>
cmpq   $0x0,-0x10(%rbp)
jbe    1173 <xstrndup+0x43>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <xmalloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrndup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
cmp    %r15,%rax
mov    %rax,%rbx
cmova  %r15,%rbx
test   %r15,%r15
cmove  %rax,%rbx
mov    %rbx,%rdi
call   1050 <xmalloc@plt>
mov    %rax,%r15
mov    %rax,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @xstrndup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
%9 = add nsw i32 %8, 1
%10 = sext i32 %9 to i64
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = load i64, i64* %4
%13 = icmp ugt i64 %11, %12
br i1 %13, label %14, label %19
14: ; preds = %2
%15 = load i64, i64* %4
%16 = icmp ugt i64 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %14
%18 = load i64, i64* %4
store i64 %18, i64* %5
br label %19
19: ; preds = %17, %14, %2
%20 = load i64, i64* %5
%21 = call i8* @xmalloc(i64 %20)
store i8* %21, i8** %6
%22 = load i8*, i8** %6
%23 = load i8*, i8** %3
%24 = load i64, i64* %5
%25 = call i32 @strncpy(i8* %22, i8* %23, i64 %24)
%26 = load i8*, i8** %6
ret i8* %26
}

LLVM IR (-O2):
define i8* @xstrndup(i8* %0, i64 %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = add nsw i32 %3, 1
%5 = sext i32 %4 to i64
%6 = icmp ugt i64 %5, %1
%7 = icmp ne i64 %1, 0
%8 = and i1 %7, %6
%9 = select i1 %8, i64 %1, i64 %5
%10 = tail call i8* @xmalloc(i64 %9)
%11 = tail call i32 @strncpy(i8* %10, i8* %0, i64 %9)
ret i8* %10
}
/* Type definitions */
struct oscap_string_iterator {
  int dummy;
};
struct oscap_iterator {
  int dummy;
};

/* Variables and functions */
char const *oscap_iterator_next(struct oscap_iterator *);
const char *oscap_string_iterator_next(struct oscap_string_iterator *it) {
  return oscap_iterator_next(((struct oscap_iterator *)(it)));
}


x86 assembly (clang, -O0):
<oscap_string_iterator_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <oscap_iterator_next@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oscap_string_iterator_next>:
jmp    1030 <oscap_iterator_next@plt>

LLVM IR (-O0):
%struct.oscap_string_iterator = type { i32 }
%struct.oscap_iterator = type { i32 }
define i8* @oscap_string_iterator_next(%struct.oscap_string_iterator* %0) {
%2 = alloca %struct.oscap_string_iterator*
store %struct.oscap_string_iterator* %0, %struct.oscap_string_iterator** %2
%3 = load %struct.oscap_string_iterator*, %struct.oscap_string_iterator** %2
%4 = bitcast %struct.oscap_string_iterator* %3 to %struct.oscap_iterator*
%5 = call i8* @oscap_iterator_next(%struct.oscap_iterator* %4)
ret i8* %5
}

LLVM IR (-O2):
%struct.oscap_string_iterator = type { i32 }
%struct.oscap_iterator = type { i32 }
define i8* @oscap_string_iterator_next(%struct.oscap_string_iterator* %0) {
%2 = bitcast %struct.oscap_string_iterator* %0 to %struct.oscap_iterator*
%3 = tail call i8* @oscap_iterator_next(%struct.oscap_iterator* %2)
ret i8* %3
}
/* Type definitions */
struct genlist_link {
  int dummy;
};
struct genlist {
  int dummy;
};
struct clause_list_link {
  int dummy;
};
struct clause_list {
  int dummy;
};
struct Clause {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_insert_after(struct genlist *, struct Clause *,
                                        struct genlist_link *);
void clause_list_insert_after(struct clause_list *tthis, struct Clause *pfoo,
                              struct clause_list_link *plink) {
  genlist_insert_after((struct genlist *)tthis, pfoo,
                       (struct genlist_link *)plink);
}


x86 assembly (clang, -O0):
<clause_list_insert_after>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <genlist_insert_after@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clause_list_insert_after>:
jmp    1030 <genlist_insert_after@plt>

LLVM IR (-O0):
%struct.clause_list = type { i32 }
%struct.Clause = type { i32 }
%struct.clause_list_link = type { i32 }
%struct.genlist = type { i32 }
%struct.genlist_link = type { i32 }
define void @clause_list_insert_after(%struct.clause_list* %0, %struct.Clause* %1, %struct.clause_list_link* %2) {
%4 = alloca %struct.clause_list*
%5 = alloca %struct.Clause*
%6 = alloca %struct.clause_list_link*
store %struct.clause_list* %0, %struct.clause_list** %4
store %struct.Clause* %1, %struct.Clause** %5
store %struct.clause_list_link* %2, %struct.clause_list_link** %6
%7 = load %struct.clause_list*, %struct.clause_list** %4
%8 = bitcast %struct.clause_list* %7 to %struct.genlist*
%9 = load %struct.Clause*, %struct.Clause** %5
%10 = load %struct.clause_list_link*, %struct.clause_list_link** %6
%11 = bitcast %struct.clause_list_link* %10 to %struct.genlist_link*
%12 = call i32 @genlist_insert_after(%struct.genlist* %8, %struct.Clause* %9, %struct.genlist_link* %11)
ret void
}

LLVM IR (-O2):
%struct.clause_list = type { i32 }
%struct.Clause = type { i32 }
%struct.clause_list_link = type { i32 }
%struct.genlist = type { i32 }
%struct.genlist_link = type { i32 }
define void @clause_list_insert_after(%struct.clause_list* %0, %struct.Clause* %1, %struct.clause_list_link* %2) {
%4 = bitcast %struct.clause_list* %0 to %struct.genlist*
%5 = bitcast %struct.clause_list_link* %2 to %struct.genlist_link*
%6 = tail call i32 @genlist_insert_after(%struct.genlist* %4, %struct.Clause* %1, %struct.genlist_link* %5)
ret void
}
unsigned xrop3_71_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D ^ T;
  stk2 = S & stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_71_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_71_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
mov    %edx,%eax
xor    $0xff,%eax
and    %ecx,%eax
xor    %edx,%eax
or     %ecx,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_71_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %7
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %7
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = xor i32 %32, -1
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_71_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 255
%8 = and i32 %7, %4
%9 = xor i32 %8, %6
%10 = or i32 %9, %4
%11 = xor i32 %10, -1
%12 = or i32 %11, %3
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ memset(unsigned int *, int, int);
void nn_bitset_one(unsigned numbits, unsigned *bits) {
  memset(bits, 0xff, 4 * ((numbits + 31) / 32));
  {
    const int k = numbits / 32;
    const int n = numbits % 32;
    bits[k] &= ~(~0u >> n);
  }
}


x86 assembly (clang, -O0):
<nn_bitset_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
add    $0x1f,%edx
shr    $0x5,%edx
shl    $0x2,%edx
mov    $0xff,%esi
call   1030 <memset@plt>
mov    -0x4(%rbp),%eax
shr    $0x5,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
mov    $0xffffffff,%edx
shr    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nn_bitset_one>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
lea    0x1f(%rbx),%edx
shr    $0x3,%edx
and    $0xfffffffc,%edx
mov    %rsi,%rdi
mov    $0xff,%esi
call   1030 <memset@plt>
mov    %ebx,%eax
shr    $0x5,%eax
mov    $0xffffffff,%edx
mov    %ebx,%ecx
shr    %cl,%edx
not    %edx
and    %edx,(%r14,%rax,4)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @nn_bitset_one(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32*, i32** %4
%8 = load i32, i32* %3
%9 = add i32 %8, 31
%10 = udiv i32 %9, 32
%11 = mul i32 4, %10
%12 = call i32 @memset(i32* %7, i32 255, i32 %11)
%13 = load i32, i32* %3
%14 = udiv i32 %13, 32
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = urem i32 %15, 32
store i32 %16, i32* %6
%17 = load i32, i32* %6
%18 = lshr i32 -1, %17
%19 = xor i32 %18, -1
%20 = load i32*, i32** %4
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
%24 = load i32, i32* %23
%25 = and i32 %24, %19
store i32 %25, i32* %23
ret void
}

LLVM IR (-O2):
define void @nn_bitset_one(i32 %0, i32* %1) {
%3 = add i32 %0, 31
%4 = lshr i32 %3, 3
%5 = and i32 %4, 536870908
%6 = tail call i32 @memset(i32* %1, i32 255, i32 %5)
%7 = lshr i32 %0, 5
%8 = and i32 %0, 31
%9 = lshr i32 -1, %8
%10 = xor i32 %9, -1
%11 = zext i32 %7 to i64
%12 = getelementptr inbounds i32, i32* %1, i64 %11
%13 = load i32, i32* %12
%14 = and i32 %13, %10
store i32 %14, i32* %12
ret void
}
/* Variables and functions */
int strlen(char *);
int filter(char *prefix, char extension) {
  int len = strlen(prefix);
  return (len == 0 || prefix[len - 1] < extension);
}


x86 assembly (clang, -O0):
<filter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x10(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     115a <filter+0x4a>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
setl   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filter>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
je     1130 <filter+0x20>
movslq %eax,%rcx
xor    %eax,%eax
cmp    %bpl,-0x1(%rcx,%rbx,1)
setl   %al
jmp    1135 <filter+0x25>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @filter(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %21, label %10
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %11, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i8, i8* %4
%19 = sext i8 %18 to i32
%20 = icmp slt i32 %17, %19
br label %21
21: ; preds = %10, %2
%22 = phi i1 [ true, %2 ], [ %20, %10 ]
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @filter(i8* %0, i8 signext %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2
%6 = add nsw i32 %3, -1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = icmp slt i8 %9, %1
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %2
%13 = phi i32 [ 1, %2 ], [ %11, %5 ]
ret i32 %13
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
uint32_t SSIIntStatus(uint32_t ui32Base, bool bMasked) {
  ;
  if (bMasked) {
    return ((*((volatile uint32_t *)(ui32Base + 0x0000001C))));
  } else {
    return ((*((volatile uint32_t *)(ui32Base + 0x00000018))));
  }
}


x86 assembly (clang, -O0):
<SSIIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1126 <SSIIntStatus+0x26>
mov    -0x10(%rbp),%rax
mov    0x1c(%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1132 <SSIIntStatus+0x32>
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIIntStatus>:
mov    %rdi,-0x8(%rsp)
xor    %eax,%eax
test   %esi,%esi
setne  %al
mov    -0x8(%rsp),%rcx
mov    0x18(%rcx,%rax,4),%rax
ret

LLVM IR (-O0):
define i64 @SSIIntStatus(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store volatile i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load volatile i64, i64* %4
%10 = add nsw i64 %9, 28
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
store i64 %12, i64* %3
br label %18
13: ; preds = %2
%14 = load volatile i64, i64* %4
%15 = add nsw i64 %14, 24
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
store i64 %17, i64* %3
br label %18
18: ; preds = %13, %8
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @SSIIntStatus(i64 %0, i32 %1) {
%3 = alloca i64
store volatile i64 %0, i64* %3
%4 = icmp eq i32 %1, 0
%5 = load volatile i64, i64* %3
%6 = select i1 %4, i64 24, i64 28
%7 = add nsw i64 %5, %6
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
ret i64 %9
}
int compare(const void *a, const void *b) {
  return *(const char *)a - *(const char *)b;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
movsbl (%rdi),%eax
movsbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Type definitions */
typedef int volatile uint32_t;

/* Variables and functions */
uint32_t volatile_fetch_and_u32(volatile uint32_t *dest, uint32_t val) {
  uint32_t result = *dest;
  *dest = result & val;
  return result;
}


x86 assembly (clang, -O0):
<volatile_fetch_and_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
and    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_and_u32>:
mov    %esi,-0x4(%rsp)
mov    (%rdi),%eax
mov    %eax,-0x8(%rsp)
mov    -0x8(%rsp),%eax
and    -0x4(%rsp),%eax
mov    %eax,(%rdi)
mov    -0x8(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @volatile_fetch_and_u32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
store volatile i32 %7, i32* %5
%8 = load volatile i32, i32* %5
%9 = load volatile i32, i32* %4
%10 = and i32 %8, %9
%11 = load i32*, i32** %3
store volatile i32 %10, i32* %11
%12 = load volatile i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @volatile_fetch_and_u32(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store volatile i32 %1, i32* %3
%5 = bitcast i32* %4 to i8*
%6 = load volatile i32, i32* %0
store volatile i32 %6, i32* %4
%7 = load volatile i32, i32* %4
%8 = load volatile i32, i32* %3
%9 = and i32 %8, %7
store volatile i32 %9, i32* %0
%10 = load volatile i32, i32* %4
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ tube_log_performance_counters();
int /*<<< orphan*/ tube_reset_performance_counters();
int /*<<< orphan*/ tube_wait_for_rst_release();
int /*<<< orphan*/ w65816_reset();
void copro_65816_reset() {
  tube_log_performance_counters();
  w65816_reset();
  tube_wait_for_rst_release();
  tube_reset_performance_counters();
}


x86 assembly (clang, -O0):
<copro_65816_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tube_log_performance_counters@plt>
mov    $0x0,%al
call   1040 <w65816_reset@plt>
mov    $0x0,%al
call   1060 <tube_wait_for_rst_release@plt>
mov    $0x0,%al
call   1050 <tube_reset_performance_counters@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copro_65816_reset>:
push   %rax
xor    %eax,%eax
call   1030 <tube_log_performance_counters@plt>
xor    %eax,%eax
call   1040 <w65816_reset@plt>
xor    %eax,%eax
call   1060 <tube_wait_for_rst_release@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <tube_reset_performance_counters@plt>

LLVM IR (-O0):
define void @copro_65816_reset() {
%1 = call i32 (...) @tube_log_performance_counters()
%2 = call i32 (...) @w65816_reset()
%3 = call i32 (...) @tube_wait_for_rst_release()
%4 = call i32 (...) @tube_reset_performance_counters()
ret void
}

LLVM IR (-O2):
define void @copro_65816_reset() {
%1 = tail call i32 (...) @tube_log_performance_counters()
%2 = tail call i32 (...) @w65816_reset()
%3 = tail call i32 (...) @tube_wait_for_rst_release()
%4 = tail call i32 (...) @tube_reset_performance_counters()
ret void
}
unsigned char rev_byte_2c(unsigned char x) {
  x = ((x & 0xaa) >> 1) | ((x & 0x55) << 1);
  x = ((x & 0xcc) >> 2) | ((x & 0x33) << 2);
  x = ((x & 0xf0) >> 4) | ((x & 0x0f) << 4);
  return x;
}


x86 assembly (clang, -O0):
<rev_byte_2c>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xaa,%eax
sar    $0x1,%eax
movzbl -0x1(%rbp),%ecx
and    $0x55,%ecx
shl    $0x1,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xcc,%eax
sar    $0x2,%eax
movzbl -0x1(%rbp),%ecx
and    $0x33,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf0,%eax
sar    $0x4,%eax
movzbl -0x1(%rbp),%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev_byte_2c>:
rol    $0x4,%dil
mov    %edi,%eax
and    $0x33,%al
shl    $0x2,%al
shr    $0x2,%dil
and    $0x33,%dil
or     %dil,%al
mov    %eax,%ecx
and    $0x55,%cl
add    %cl,%cl
shr    %al
and    $0x55,%al
or     %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @rev_byte_2c(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 170
%6 = ashr i32 %5, 1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = and i32 %8, 85
%10 = shl i32 %9, 1
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i8
store i8 %12, i8* %2
%13 = load i8, i8* %2
%14 = zext i8 %13 to i32
%15 = and i32 %14, 204
%16 = ashr i32 %15, 2
%17 = load i8, i8* %2
%18 = zext i8 %17 to i32
%19 = and i32 %18, 51
%20 = shl i32 %19, 2
%21 = or i32 %16, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %2
%23 = load i8, i8* %2
%24 = zext i8 %23 to i32
%25 = and i32 %24, 240
%26 = ashr i32 %25, 4
%27 = load i8, i8* %2
%28 = zext i8 %27 to i32
%29 = and i32 %28, 15
%30 = shl i32 %29, 4
%31 = or i32 %26, %30
%32 = trunc i32 %31 to i8
store i8 %32, i8* %2
%33 = load i8, i8* %2
ret i8 %33
}

LLVM IR (-O2):
define zeroext i8 @rev_byte_2c(i8 zeroext %0) {
%2 = tail call i8 @llvm.bitreverse.i8(i8 %0)
ret i8 %2
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char const *);
int is_equal_string(const char *lhs, const char *rhs) {
  return (0 == strcmp(lhs, rhs));
}


x86 assembly (clang, -O0):
<is_equal_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_equal_string>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_equal_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 0, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @is_equal_string(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void puts_times(const char *what, size_t times) {
  size_t i;
  for (i = 0; i < times; i++) {
    printf("%s", what);
  }
}


x86 assembly (clang, -O0):
<puts_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1157 <puts_times+0x47>
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <puts_times+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts_times>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1141 <puts_times+0x31>
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0xed9(%rip),%r15
nopw   0x0(%rax,%rax,1)
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <printf@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <puts_times+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @puts_times(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %13, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10
%14 = load i64, i64* %5
%15 = add i64 %14, 1
store i64 %15, i64* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @puts_times(i8* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%7 = add nuw i64 %5, 1
%8 = icmp eq i64 %7, %1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
int privsep_init(void) { return 0; }


x86 assembly (clang, -O0):
<privsep_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<privsep_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @privsep_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @privsep_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ destroy_keyboard();
int /*<<< orphan*/ destroy_screen();
void destroy() {
  destroy_keyboard();
  destroy_screen();
}


x86 assembly (clang, -O0):
<destroy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <destroy_keyboard@plt>
mov    $0x0,%al
call   1040 <destroy_screen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy>:
push   %rax
xor    %eax,%eax
call   1030 <destroy_keyboard@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <destroy_screen@plt>

LLVM IR (-O0):
define void @destroy() {
%1 = call i32 (...) @destroy_keyboard()
%2 = call i32 (...) @destroy_screen()
ret void
}

LLVM IR (-O2):
define void @destroy() {
%1 = tail call i32 (...) @destroy_keyboard()
%2 = tail call i32 (...) @destroy_screen()
ret void
}
int input_map_b3(char c) {
  if (c == 'd')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<input_map_b3>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x64,%eax
jne    1123 <input_map_b3+0x23>
movl   $0x1,-0x4(%rbp)
jmp    112a <input_map_b3+0x2a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_map_b3>:
xor    %eax,%eax
cmp    $0x64,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @input_map_b3(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 100
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @input_map_b3(i8 signext %0) {
%2 = icmp eq i8 %0, 100
%3 = zext i1 %2 to i32
ret i32 %3
}
float dot(float x, float y, float z, float *g) {
  return x * g[0] + y * g[1] + z * g[2];
}


x86 assembly (clang, -O0):
<dot>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
mov    %rdi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm1
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm2
movss  -0x8(%rbp),%xmm0
mov    -0x18(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot>:
mulss  0x4(%rdi),%xmm1
mulss  (%rdi),%xmm0
addss  %xmm1,%xmm0
mulss  0x8(%rdi),%xmm2
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @dot(float %0, float %1, float %2, float* %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float*
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float* %3, float** %8
%9 = load float, float* %5
%10 = load float*, float** %8
%11 = getelementptr inbounds float, float* %10, i64 0
%12 = load float, float* %11
%13 = load float, float* %6
%14 = load float*, float** %8
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = fmul float %13, %16
%18 = call float @llvm.fmuladd.f32(float %9, float %12, float %17)
%19 = load float, float* %7
%20 = load float*, float** %8
%21 = getelementptr inbounds float, float* %20, i64 2
%22 = load float, float* %21
%23 = call float @llvm.fmuladd.f32(float %19, float %22, float %18)
ret float %23
}

LLVM IR (-O2):
define float @dot(float %0, float %1, float %2, float* nocapture %3) {
%5 = load float, float* %3
%6 = getelementptr inbounds float, float* %3, i64 1
%7 = load float, float* %6
%8 = fmul float %7, %1
%9 = tail call float @llvm.fmuladd.f32(float %0, float %5, float %8)
%10 = getelementptr inbounds float, float* %3, i64 2
%11 = load float, float* %10
%12 = tail call float @llvm.fmuladd.f32(float %2, float %11, float %9)
ret float %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() { printf("Usage: \n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Usage: \0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"Usage: \00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
void rop3_110_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~S;
  stk3 = T | stk4;
  stk2 = *D & stk3;
  stk1 = S ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_110_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_110_1_1>:
ret

LLVM IR (-O0):
define void @rop3_110_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %10
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %10
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = load i8, i8* %8
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = xor i32 %37, -1
%39 = and i32 %35, %38
%40 = load i8, i8* %6
%41 = zext i8 %40 to i32
%42 = xor i32 %41, -1
%43 = and i32 %39, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %5
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = load i8*, i8** %4
%52 = load i8, i8* %51
%53 = zext i8 %52 to i32
%54 = load i8, i8* %6
%55 = zext i8 %54 to i32
%56 = and i32 %53, %55
%57 = or i32 %50, %56
%58 = trunc i32 %57 to i8
%59 = load i8*, i8** %4
store i8 %58, i8* %59
ret void
}

LLVM IR (-O2):
define void @rop3_110_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g5_get_force(int, double **, double *);
void(g5_get_force_)(int *ni, double (*a)[3], double *p) {
  g5_get_force(*ni, a, p);
}


x86 assembly (clang, -O0):
<g5_get_force_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <g5_get_force@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g5_get_force_>:
mov    (%rdi),%edi
jmp    1030 <g5_get_force@plt>

LLVM IR (-O0):
define void @g5_get_force_(i32* %0, [3 x double]* %1, double* %2) {
%4 = alloca i32*
%5 = alloca [3 x double]*
%6 = alloca double*
store i32* %0, i32** %4
store [3 x double]* %1, [3 x double]** %5
store double* %2, double** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load [3 x double]*, [3 x double]** %5
%10 = bitcast [3 x double]* %9 to double**
%11 = load double*, double** %6
%12 = call i32 @g5_get_force(i32 %8, double** %10, double* %11)
ret void
}

LLVM IR (-O2):
define void @g5_get_force_(i32* nocapture %0, [3 x double]* %1, double* %2) {
%4 = load i32, i32* %0
%5 = bitcast [3 x double]* %1 to double**
%6 = tail call i32 @g5_get_force(i32 %4, double** %5, double* %2)
ret void
}