isfield(buf, field) char buf[];
char field[];
{
  register char *cp, *cp2;
  cp = buf;
  cp2 = field;
  while (lower(*cp++) == lower(*cp2++))
    ;
  if (*--cp == ':' && *--cp2 == 0)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<isfield>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <lower@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x28(%rbp)
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <lower@plt>
mov    %eax,%ecx
mov    -0x2c(%rbp),%eax
cmp    %ecx,%eax
jne    1177 <isfield+0x67>
jmp    1130 <isfield+0x20>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x20(%rbp)
movsbl -0x1(%rax),%eax
cmp    $0x3a,%eax
jne    11bb <isfield+0xab>
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x28(%rbp)
movsbl -0x1(%rax),%eax
cmp    $0x0,%eax
jne    11bb <isfield+0xab>
movl   $0x1,-0x4(%rbp)
jmp    11c2 <isfield+0xb2>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isfield>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nop
movsbl (%r15,%rbx,1),%edi
xor    %eax,%eax
call   1030 <lower@plt>
mov    %eax,%ebp
movsbl (%r14,%rbx,1),%edi
xor    %eax,%eax
call   1030 <lower@plt>
add    $0x1,%rbx
cmp    %eax,%ebp
je     1120 <isfield+0x10>
cmpb   $0x3a,-0x1(%r15,%rbx,1)
jne    1152 <isfield+0x42>
cmpb   $0x0,-0x1(%r14,%rbx,1)
je     1156 <isfield+0x46>
xor    %eax,%eax
jmp    115b <isfield+0x4b>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @isfield(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
store i8* %9, i8** %7
br label %10
10: ; preds = %22, %2
%11 = load i8*, i8** %6
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %6
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = call i32 (i32, ...) bitcast (i32 (...)* @lower to i32 (i32, ...)*)(i32 %14)
%16 = load i8*, i8** %7
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %7
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = call i32 (i32, ...) bitcast (i32 (...)* @lower to i32 (i32, ...)*)(i32 %19)
%21 = icmp eq i32 %15, %20
br i1 %21, label %22, label %23
22: ; preds = %10
br label %10
23: ; preds = %10
%24 = load i8*, i8** %6
%25 = getelementptr inbounds i8, i8* %24, i32 -1
store i8* %25, i8** %6
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = icmp eq i32 %27, 58
br i1 %28, label %29, label %36
29: ; preds = %23
%30 = load i8*, i8** %7
%31 = getelementptr inbounds i8, i8* %30, i32 -1
store i8* %31, i8** %7
%32 = load i8, i8* %31
%33 = sext i8 %32 to i32
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %36
35: ; preds = %29
store i32 1, i32* %3
br label %37
36: ; preds = %29, %23
store i32 0, i32* %3
br label %37
37: ; preds = %36, %35
%38 = load i32, i32* %3
ret i32 %38
}

LLVM IR (-O2):
define i32 @isfield(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %6, %3 ]
%5 = phi i8* [ %1, %2 ], [ %10, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = tail call i32 (i32, ...) bitcast (i32 (...)* @lower to i32 (i32, ...)*)(i32 %8)
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = load i8, i8* %5
%12 = sext i8 %11 to i32
%13 = tail call i32 (i32, ...) bitcast (i32 (...)* @lower to i32 (i32, ...)*)(i32 %12)
%14 = icmp eq i32 %9, %13
br i1 %14, label %3, label %15
15: ; preds = %3
%16 = load i8, i8* %4
%17 = icmp eq i8 %16, 58
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i8, i8* %5
%20 = icmp eq i8 %19, 0
br i1 %20, label %22, label %21
21: ; preds = %18, %15
br label %22
22: ; preds = %18, %21
%23 = phi i32 [ 0, %21 ], [ 1, %18 ]
ret i32 %23
}