xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ foo(int /*<<< orphan*/);
int /*<<< orphan*/ xktime_set();
void LCD_WaitTE(void) { foo(xktime_set()); }


x86 assembly (clang, -O0):
<LCD_WaitTE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <xktime_set@plt>
mov    %eax,%edi
call   1040 <foo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_WaitTE>:
push   %rax
xor    %eax,%eax
call   1030 <xktime_set@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <foo@plt>

LLVM IR (-O0):
define void @LCD_WaitTE() {
%1 = call i32 (...) @xktime_set()
%2 = call i32 @foo(i32 %1)
ret void
}

LLVM IR (-O2):
define void @LCD_WaitTE() {
%1 = tail call i32 (...) @xktime_set()
%2 = tail call i32 @foo(i32 %1)
ret void
}
void gtk_tree_model_sort_convert_path_to_child_path() {}


x86 assembly (clang, -O0):
<gtk_tree_model_sort_convert_path_to_child_path>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_sort_convert_path_to_child_path>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_sort_convert_path_to_child_path() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_sort_convert_path_to_child_path() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EC_POINT;
typedef int /*<<< orphan*/ EC_GROUP;
typedef int /*<<< orphan*/ BN_CTX;
typedef int /*<<< orphan*/ BIGNUM;

/* Variables and functions */
int EC_POINT_set_affine_coordinates_GFp(int /*<<< orphan*/ const *,
                                        int /*<<< orphan*/ *,
                                        int /*<<< orphan*/ const *,
                                        int /*<<< orphan*/ const *,
                                        int /*<<< orphan*/ *);
int EC_POINT_set_affine_coordinates(const EC_GROUP *group, EC_POINT *p,
                                    const BIGNUM *x, const BIGNUM *y,
                                    BN_CTX *ctx) {
  return EC_POINT_set_affine_coordinates_GFp(group, p, x, y, ctx);
}


x86 assembly (clang, -O0):
<EC_POINT_set_affine_coordinates>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <EC_POINT_set_affine_coordinates_GFp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_POINT_set_affine_coordinates>:
jmp    1030 <EC_POINT_set_affine_coordinates_GFp@plt>

LLVM IR (-O0):
define i32 @EC_POINT_set_affine_coordinates(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32*, i32** %6
%12 = load i32*, i32** %7
%13 = load i32*, i32** %8
%14 = load i32*, i32** %9
%15 = load i32*, i32** %10
%16 = call i32 @EC_POINT_set_affine_coordinates_GFp(i32* %11, i32* %12, i32* %13, i32* %14, i32* %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @EC_POINT_set_affine_coordinates(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = tail call i32 @EC_POINT_set_affine_coordinates_GFp(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4)
ret i32 %6
}
unsigned opt_f(unsigned *p) { return *p; }


x86 assembly (clang, -O0):
<opt_f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_f>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @opt_f(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @opt_f(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("1.In C, lowercase letters are significant.\n");
  printf("2.main is where program exexution begins.\n");
  printf("3.Opening and closing braces enclose program statements in a "
         "routine.\n");
  printf("4.All program statements must be terminated by a semicolon");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xefa(%rip),%rdi
call   1030 <printf@plt>
lea    0xf19(%rip),%rdi
call   1030 <printf@plt>
lea    0xf54(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xf13(%rip),%rdi
call   1030 <puts@plt>
lea    0xf32(%rip),%rdi
call   1030 <puts@plt>
lea    0xf50(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [44 x i8] c"1.In C, lowercase letters are significant.\0A\00"
@.str.1 = [43 x i8] c"2.main is where program exexution begins.\0A\00"
@.str.2 = [71 x i8] c"3.Opening and closing braces enclose program statements in a routine.\0A\00"
@.str.3 = [59 x i8] c"4.All program statements must be terminated by a semicolon\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.3 = [59 x i8] c"4.All program statements must be terminated by a semicolon\00"
@str = [43 x i8] c"1.In C, lowercase letters are significant.\00"
@str.4 = [42 x i8] c"2.main is where program exexution begins.\00"
@str.5 = [70 x i8] c"3.Opening and closing braces enclose program statements in a routine.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}
int okn_tsm_mtx3(struct okn_tsm *t, struct okn_mtx3 *mtx) { return 1; }


x86 assembly (clang, -O0):
<okn_tsm_mtx3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<okn_tsm_mtx3>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.okn_tsm = type opaque
%struct.okn_mtx3 = type opaque
define i32 @okn_tsm_mtx3(%struct.okn_tsm* %0, %struct.okn_mtx3* %1) {
%3 = alloca %struct.okn_tsm*
%4 = alloca %struct.okn_mtx3*
store %struct.okn_tsm* %0, %struct.okn_tsm** %3
store %struct.okn_mtx3* %1, %struct.okn_mtx3** %4
ret i32 1
}

LLVM IR (-O2):
%struct.okn_tsm = type opaque
%struct.okn_mtx3 = type opaque
define i32 @okn_tsm_mtx3(%struct.okn_tsm* nocapture readnone %0, %struct.okn_mtx3* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
scalar_t__ be32toh(int);
int decode(const void *ptr) { return (int)be32toh(*(int *)ptr); }


x86 assembly (clang, -O0):
<decode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <be32toh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode>:
mov    (%rdi),%edi
jmp    1030 <be32toh@plt>

LLVM IR (-O0):
define i32 @decode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i64 @be32toh(i32 %5)
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @decode(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i64 @be32toh(i32 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void usage(const char *app) {
  printf("usage: %s <-i image> "
         "[-d dump] [-c count] [-f format] "
         "[-t type] [-s sig <part>] [-w sig <sig>]\n",
         app);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [96 x i8] c"usage: %s <-i image> [-d dump] [-c count] [-f format] [-t type] [-s sig <part>] [-w sig <sig>]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([96 x i8], [96 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [96 x i8] c"usage: %s <-i image> [-d dump] [-c count] [-f format] [-t type] [-s sig <part>] [-w sig <sig>]\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([96 x i8], [96 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int16_t negate(int16_t var1) {
  int16_t var_out;
  var_out = (var1 == (int16_t)0x8000) ? (int16_t)0x7fff : -var1;
  return (var_out);
}


x86 assembly (clang, -O0):
<negate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x8000,-0x4(%rbp)
jne    1121 <negate+0x21>
mov    $0x7fff,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <negate+0x29>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<negate>:
mov    %edi,%ecx
neg    %ecx
cmp    $0x8000,%edi
mov    $0x7fff,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @negate(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 32768
br i1 %5, label %6, label %7
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %6
%11 = phi i32 [ 32767, %6 ], [ %9, %7 ]
store i32 %11, i32* %3
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @negate(i32 %0) {
%2 = icmp eq i32 %0, 32768
%3 = sub nsw i32 0, %0
%4 = select i1 %2, i32 32767, i32 %3
ret i32 %4
}
int sprintf(char *s, const char *format, ...) {
  int i;
  __builtin_va_list ap;
  __builtin_stdarg_start((ap), format);
  i = vsprintf(s, format, ap);
  __builtin_va_end(ap);
  return i;
}


x86 assembly (clang, -O0):
<sprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0xe0,%rsp
test   %al,%al
je     114c <sprintf+0x3c>
movaps %xmm0,-0xb0(%rbp)
movaps %xmm1,-0xa0(%rbp)
movaps %xmm2,-0x90(%rbp)
movaps %xmm3,-0x80(%rbp)
movaps %xmm4,-0x70(%rbp)
movaps %xmm5,-0x60(%rbp)
movaps %xmm6,-0x50(%rbp)
movaps %xmm7,-0x40(%rbp)
mov    %r9,-0xb8(%rbp)
mov    %r8,-0xc0(%rbp)
mov    %rcx,-0xc8(%rbp)
mov    %rdx,-0xd0(%rbp)
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0xe0(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movl   $0x30,-0x2c(%rbp)
movl   $0x10,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x30(%rbp),%rdx
call   1030 <vsprintf@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0xe0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprintf>:
sub    $0xd8,%rsp
mov    %rdx,0x30(%rsp)
mov    %rcx,0x38(%rsp)
mov    %r8,0x40(%rsp)
mov    %r9,0x48(%rsp)
test   %al,%al
je     1166 <sprintf+0x56>
movaps %xmm0,0x50(%rsp)
movaps %xmm1,0x60(%rsp)
movaps %xmm2,0x70(%rsp)
movaps %xmm3,0x80(%rsp)
movaps %xmm4,0x90(%rsp)
movaps %xmm5,0xa0(%rsp)
movaps %xmm6,0xb0(%rsp)
movaps %xmm7,0xc0(%rsp)
lea    0x20(%rsp),%rax
mov    %rax,0x10(%rsp)
lea    0xe0(%rsp),%rax
mov    %rax,0x8(%rsp)
movabs $0x3000000010,%rax
mov    %rax,(%rsp)
mov    %rsp,%rdx
call   1030 <vsprintf@plt>
add    $0xd8,%rsp
ret

LLVM IR (-O0):
%struct.__va_list_tag = type { i32, i32, i8*, i8* }
define i32 @sprintf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca [1 x %struct.__va_list_tag]
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %6, i64 0, i64 0
%8 = bitcast %struct.__va_list_tag* %7 to i8*
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %6, i64 0, i64 0
%12 = call i32 @vsprintf(i8* %9, i8* %10, %struct.__va_list_tag* %11)
store i32 %12, i32* %5
%13 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %6, i64 0, i64 0
%14 = bitcast %struct.__va_list_tag* %13 to i8*
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
%struct.__va_list_tag = type { i32, i32, i8*, i8* }
define i32 @sprintf(i8* nocapture %0, i8* nocapture %1, ...) {
%3 = alloca [1 x %struct.__va_list_tag]
%4 = bitcast [1 x %struct.__va_list_tag]* %3 to i8*
%5 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %3, i64 0, i64 0
%6 = call i32 @vsprintf(i8* %0, i8* %1, %struct.__va_list_tag* %5)
ret i32 %6
}
int compute_square(int y) {
  { return (y + 3); }
}


x86 assembly (clang, -O0):
<compute_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_square>:
lea    0x3(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @compute_square(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 3
ret i32 %4
}

LLVM IR (-O2):
define i32 @compute_square(i32 %0) {
%2 = add nsw i32 %0, 3
ret i32 %2
}
void tl880_deinit_hipix(struct tl880_dev *tl880dev) {}


x86 assembly (clang, -O0):
<tl880_deinit_hipix>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tl880_deinit_hipix>:
ret

LLVM IR (-O0):
%struct.tl880_dev = type opaque
define void @tl880_deinit_hipix(%struct.tl880_dev* %0) {
%2 = alloca %struct.tl880_dev*
store %struct.tl880_dev* %0, %struct.tl880_dev** %2
ret void
}

LLVM IR (-O2):
%struct.tl880_dev = type opaque
define void @tl880_deinit_hipix(%struct.tl880_dev* nocapture %0) {
ret void
}
int f(unsigned short usVlanID) {
  unsigned int uiVlanID = 0xffffffff;
  int i;
  if ((unsigned short)0xffff != usVlanID)
    uiVlanID = (unsigned int)usVlanID;
  return uiVlanID;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movl   $0xffffffff,-0x8(%rbp)
movzwl -0x2(%rbp),%ecx
mov    $0xffff,%eax
cmp    %ecx,%eax
je     112a <f+0x2a>
movzwl -0x2(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    $0xffff,%di
mov    $0xffffffff,%eax
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
%4 = alloca i32
store i16 %0, i16* %2
store i32 -1, i32* %3
%5 = load i16, i16* %2
%6 = zext i16 %5 to i32
%7 = icmp ne i32 65535, %6
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i16, i16* %2
%10 = zext i16 %9 to i32
store i32 %10, i32* %3
br label %11
11: ; preds = %8, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @f(i16 zeroext %0) {
%2 = icmp eq i16 %0, -1
%3 = zext i16 %0 to i32
%4 = select i1 %2, i32 -1, i32 %3
ret i32 %4
}
float MinFloat(float x, float y) { return (x < y) ? x : y; }


x86 assembly (clang, -O0):
<MinFloat>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <MinFloat+0x30>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <MinFloat+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MinFloat>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @MinFloat(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @MinFloat(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
int test_imm_EBuint16_mem(unsigned short *val) {
  return ((*val) & (0xEB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EBuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xeb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EBuint16_mem>:
testb  $0xeb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EBuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 235
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_EBuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 235
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned xrop3_16_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D | S;
  stk2 = ~stk2;
  stk1 = T & stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_16_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_16_0_0>:
mov    %edi,%eax
not    %eax
and    %esi,%eax
shl    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_16_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = and i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
ret i32 %30
}

LLVM IR (-O2):
define i32 @xrop3_16_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = xor i32 %3, -1
%6 = and i32 %4, %5
%7 = shl nuw nsw i32 %6, 8
ret i32 %7
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
char *read_uint8(char *buf, uint8_t *val) {
  *val = *buf;
  return buf + 1;
}


x86 assembly (clang, -O0):
<read_uint8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_uint8>:
mov    (%rdi),%al
mov    %al,(%rsi)
lea    0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @read_uint8(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = load i8*, i8** %4
store i8 %6, i8* %7
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 1
ret i8* %9
}

LLVM IR (-O2):
define i8* @read_uint8(i8* %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
store i8 %3, i8* %1
%4 = getelementptr inbounds i8, i8* %0, i64 1
ret i8* %4
}
/* Type definitions */
struct sysinfo {
  int dummy;
};

/* Variables and functions */
int syscall(int, struct sysinfo *);
int sysinfo(struct sysinfo *info) { return syscall(116, info); }


x86 assembly (clang, -O0):
<sysinfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x74,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysinfo>:
mov    %rdi,%rsi
mov    $0x74,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.sysinfo = type { i32 }
define i32 @sysinfo(%struct.sysinfo* %0) {
%2 = alloca %struct.sysinfo*
store %struct.sysinfo* %0, %struct.sysinfo** %2
%3 = load %struct.sysinfo*, %struct.sysinfo** %2
%4 = call i32 @syscall(i32 116, %struct.sysinfo* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.sysinfo = type { i32 }
define i32 @sysinfo(%struct.sysinfo* %0) {
%2 = tail call i32 @syscall(i32 116, %struct.sysinfo* %0)
ret i32 %2
}
void fd69(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  a : {
    typedef int(*c)[n];
  P012A:
    goto P012A;
    0;
  }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    p013A:
      goto p013A;
      goto a;
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd69>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd69+0x7>

x86 assembly (clang, -O2):
<fd69>:
jmp    1100 <fd69>

LLVM IR (-O0):
define void @fd69(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %4
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
br label %10
10: ; preds = %10, %7
br label %10
11: ; preds = %11
br label %11
12: ; No predecessors!
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
br label %15
15: ; preds = %15, %12
br label %15
16: ; preds = %16
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd69(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ AirspeedStateHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void AirspeedStateRequestUpdate() {
  UAVObjRequestUpdate(AirspeedStateHandle());
}


x86 assembly (clang, -O0):
<AirspeedStateRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AirspeedStateHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AirspeedStateRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <AirspeedStateHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @AirspeedStateRequestUpdate() {
%1 = call i32 (...) @AirspeedStateHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AirspeedStateRequestUpdate() {
%1 = tail call i32 (...) @AirspeedStateHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assertTrue(char *, int);
void g(double **pp) {
  assertTrue("**pp == 10", **pp == 10);
  ;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsd  (%rax),%xmm0
movsd  0xed1(%rip),%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%esi
lea    0xec1(%rip),%rdi
call   1030 <assertTrue@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    (%rdi),%rax
movsd  0xee5(%rip),%xmm0
cmpeqsd (%rax),%xmm0
movq   %xmm0,%rsi
and    $0x1,%esi
lea    0xed9(%rip),%rdi
jmp    1030 <assertTrue@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"**pp == 10\00"
define void @g(double** %0) {
%2 = alloca double**
store double** %0, double*** %2
%3 = load double**, double*** %2
%4 = load double*, double** %3
%5 = load double, double* %4
%6 = fcmp oeq double %5, 1.000000e+01
%7 = zext i1 %6 to i32
%8 = call i32 @assertTrue(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"**pp == 10\00"
define void @g(double** nocapture %0) {
%2 = load double*, double** %0
%3 = load double, double* %2
%4 = fcmp oeq double %3, 1.000000e+01
%5 = zext i1 %4 to i32
%6 = tail call i32 @assertTrue(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}
void glBindSampler(void) { return; }


x86 assembly (clang, -O0):
<glBindSampler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glBindSampler>:
ret

LLVM IR (-O0):
define void @glBindSampler() {
ret void
}

LLVM IR (-O2):
define void @glBindSampler() {
ret void
}
/* Variables and functions */
const char *get_system_type(void) { return "NEC VR4100 series"; }


x86 assembly (clang, -O0):
<get_system_type>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_system_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [18 x i8] c"NEC VR4100 series\00"
define i8* @get_system_type() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [18 x i8] c"NEC VR4100 series\00"
define i8* @get_system_type() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ uartTx(char *, int);
void lcdVisualDisplayOff() { uartTx("\xFE\x08", 2); }


x86 assembly (clang, -O0):
<lcdVisualDisplayOff>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x2,%esi
call   1030 <uartTx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdVisualDisplayOff>:
lea    0xee9(%rip),%rdi
mov    $0x2,%esi
jmp    1030 <uartTx@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\FE\08\00"
define void @lcdVisualDisplayOff() {
%1 = call i32 @uartTx(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\FE\08\00"
define void @lcdVisualDisplayOff() {
%1 = tail call i32 @uartTx(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}
void ps_print_comment() {}


x86 assembly (clang, -O0):
<ps_print_comment>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_print_comment>:
ret

LLVM IR (-O0):
define void @ps_print_comment() {
ret void
}

LLVM IR (-O2):
define void @ps_print_comment() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ led_off();
int /*<<< orphan*/ led_on();
void die(void) {
  int i;
  for (;;) {
    led_on();
    for (i = 0; i < 1000000; i++)
      ;
    led_off();
    for (i = 0; i < 1000000; i++)
      ;
  }
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <led_on@plt>
movl   $0x0,-0x4(%rbp)
cmpl   $0xf4240,-0x4(%rbp)
jge    1156 <die+0x36>
jmp    1148 <die+0x28>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1136 <die+0x16>
mov    $0x0,%al
call   1030 <led_off@plt>
movl   $0x0,-0x4(%rbp)
cmpl   $0xf4240,-0x4(%rbp)
jge    1184 <die+0x64>
jmp    1176 <die+0x56>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <die+0x44>
jmp    1128 <die+0x8>

x86 assembly (clang, -O2):
<die>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <led_on@plt>
xor    %eax,%eax
call   1030 <led_off@plt>
jmp    1130 <die+0x10>

LLVM IR (-O0):
define void @die() {
%1 = alloca i32
br label %2
2: ; preds = %20, %0
%3 = call i32 (...) @led_on()
store i32 0, i32* %1
br label %4
4: ; preds = %8, %2
%5 = load i32, i32* %1
%6 = icmp slt i32 %5, 1000000
br i1 %6, label %7, label %11
7: ; preds = %4
br label %8
8: ; preds = %7
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %4
11: ; preds = %4
%12 = call i32 (...) @led_off()
store i32 0, i32* %1
br label %13
13: ; preds = %17, %11
%14 = load i32, i32* %1
%15 = icmp slt i32 %14, 1000000
br i1 %15, label %16, label %20
16: ; preds = %13
br label %17
17: ; preds = %16
%18 = load i32, i32* %1
%19 = add nsw i32 %18, 1
store i32 %19, i32* %1
br label %13
20: ; preds = %13
br label %2
}

LLVM IR (-O2):
define void @die() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @led_on()
%3 = tail call i32 (...) @led_off()
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ core_pll_init();
int /*<<< orphan*/ ddr_pll_init();
int /*<<< orphan*/ mpu_pll_init();
int /*<<< orphan*/ per_pll_init();
void pll_init(void) {
  mpu_pll_init();
  core_pll_init();
  ddr_pll_init();
  per_pll_init();
}


x86 assembly (clang, -O0):
<pll_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <mpu_pll_init@plt>
mov    $0x0,%al
call   1050 <core_pll_init@plt>
mov    $0x0,%al
call   1040 <ddr_pll_init@plt>
mov    $0x0,%al
call   1030 <per_pll_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pll_init>:
push   %rax
xor    %eax,%eax
call   1060 <mpu_pll_init@plt>
xor    %eax,%eax
call   1050 <core_pll_init@plt>
xor    %eax,%eax
call   1040 <ddr_pll_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <per_pll_init@plt>

LLVM IR (-O0):
define void @pll_init() {
%1 = call i32 (...) @mpu_pll_init()
%2 = call i32 (...) @core_pll_init()
%3 = call i32 (...) @ddr_pll_init()
%4 = call i32 (...) @per_pll_init()
ret void
}

LLVM IR (-O2):
define void @pll_init() {
%1 = tail call i32 (...) @mpu_pll_init()
%2 = tail call i32 (...) @core_pll_init()
%3 = tail call i32 (...) @ddr_pll_init()
%4 = tail call i32 (...) @per_pll_init()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
char *mirror(char *);
int /*<<< orphan*/ printf(char *, char *, char *);
int randInt();
char *strgen(int);
int main(void) {
  char *str, *str2;
  uint32_t len;
  len = (randInt() % 10) + 1;
  str = strgen(len);
  str2 = mirror(str);
  printf("%s%s\n", str, str2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <randInt@plt>
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <strgen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <mirror@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xe74(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1060 <randInt@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x1,%edi
call   1030 <strgen@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <mirror@plt>
lea    0xe7e(%rip),%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @randInt()
%6 = srem i32 %5, 10
%7 = add nsw i32 %6, 1
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i8* @strgen(i32 %8)
store i8* %9, i8** %2
%10 = load i8*, i8** %2
%11 = call i8* @mirror(i8* %10)
store i8* %11, i8** %3
%12 = load i8*, i8** %2
%13 = load i8*, i8** %3
%14 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s%s\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @randInt()
%2 = srem i32 %1, 10
%3 = add nsw i32 %2, 1
%4 = tail call i8* @strgen(i32 %3)
%5 = tail call i8* @mirror(i8* %4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %5)
ret i32 0
}
/* Type definitions */
struct caslock {
  int dummy;
};

/* Variables and functions */
int caslock(struct caslock *, void *, void *, void *, int);
int chcaslock(struct caslock *lock, void *iff, void *then, void *err) {
  return caslock(lock, iff, then, err, -1);
}


x86 assembly (clang, -O0):
<chcaslock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xffffffff,%r8d
call   1030 <caslock@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chcaslock>:
mov    $0xffffffff,%r8d
jmp    1030 <caslock@plt>

LLVM IR (-O0):
%struct.caslock = type { i32 }
define i32 @chcaslock(%struct.caslock* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.caslock*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.caslock* %0, %struct.caslock** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load %struct.caslock*, %struct.caslock** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @caslock(%struct.caslock* %9, i8* %10, i8* %11, i8* %12, i32 -1)
ret i32 %13
}

LLVM IR (-O2):
%struct.caslock = type { i32 }
define i32 @chcaslock(%struct.caslock* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @caslock(%struct.caslock* %0, i8* %1, i8* %2, i8* %3, i32 -1)
ret i32 %5
}
void g_strcompress() {}


x86 assembly (clang, -O0):
<g_strcompress>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_strcompress>:
ret

LLVM IR (-O0):
define void @g_strcompress() {
ret void
}

LLVM IR (-O2):
define void @g_strcompress() {
ret void
}
/* Variables and functions */
long double __qerfc(long double);
long double __q_erfc(long double *arg) { return (__qerfc(*arg)); }


x86 assembly (clang, -O0):
<__q_erfc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__qerfc@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__q_erfc>:
sub    $0x18,%rsp
fldt   (%rdi)
fstpt  (%rsp)
call   1030 <__qerfc@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @__q_erfc(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = load x86_fp80*, x86_fp80** %2
%4 = load x86_fp80, x86_fp80* %3
%5 = call x86_fp80 @__qerfc(x86_fp80 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @__q_erfc(x86_fp80* nocapture %0) {
%2 = load x86_fp80, x86_fp80* %0
%3 = tail call x86_fp80 @__qerfc(x86_fp80 %2)
ret x86_fp80 %3
}
/* Variables and functions */
int /*<<< orphan*/ VirtualizeTimerC__0__Timer__stop(unsigned int);
void TrickleTimerImplP__0__Timer__stop(void) {
  VirtualizeTimerC__0__Timer__stop(4U);
}


x86 assembly (clang, -O0):
<TrickleTimerImplP__0__Timer__stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <VirtualizeTimerC__0__Timer__stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TrickleTimerImplP__0__Timer__stop>:
mov    $0x4,%edi
jmp    1030 <VirtualizeTimerC__0__Timer__stop@plt>

LLVM IR (-O0):
define void @TrickleTimerImplP__0__Timer__stop() {
%1 = call i32 @VirtualizeTimerC__0__Timer__stop(i32 4)
ret void
}

LLVM IR (-O2):
define void @TrickleTimerImplP__0__Timer__stop() {
%1 = tail call i32 @VirtualizeTimerC__0__Timer__stop(i32 4)
ret void
}
void USB_HP_IRQHandler(void) {}


x86 assembly (clang, -O0):
<USB_HP_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_HP_IRQHandler>:
ret

LLVM IR (-O0):
define void @USB_HP_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @USB_HP_IRQHandler() {
ret void
}
void gdk_keymap_lookup_key() {}


x86 assembly (clang, -O0):
<gdk_keymap_lookup_key>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_keymap_lookup_key>:
ret

LLVM IR (-O0):
define void @gdk_keymap_lookup_key() {
ret void
}

LLVM IR (-O2):
define void @gdk_keymap_lookup_key() {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int get_lookup_offset(uint64_t occupied_squares, uint64_t magic, int shift) {
  return (int)((occupied_squares * magic) >> shift);
}


x86 assembly (clang, -O0):
<get_lookup_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_lookup_offset>:
mov    %edx,%ecx
mov    %edi,%eax
imul   %esi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @get_lookup_offset(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = ashr i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @get_lookup_offset(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %1, %0
%5 = ashr i32 %4, %2
ret i32 %5
}
void to_sign_short_store_4(__float128 a, short *p) { p[4] = (short)a; }


x86 assembly (clang, -O0):
<to_sign_short_store_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movaps %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movaps -0x10(%rbp),%xmm0
call   1130 <__fixtfsi>
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,0x8(%rax)
add    $0x20,%rsp
pop    %rbp
ret
nopw   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<to_sign_short_store_4>:
push   %rbx
mov    %rdi,%rbx
call   1110 <__fixtfsi>
mov    %ax,0x8(%rbx)
pop    %rbx
ret
nop

LLVM IR (-O0):
define void @to_sign_short_store_4(fp128 %0, i16* %1) {
%3 = alloca fp128
%4 = alloca i16*
store fp128 %0, fp128* %3
store i16* %1, i16** %4
%5 = load fp128, fp128* %3
%6 = fptosi fp128 %5 to i16
%7 = load i16*, i16** %4
%8 = getelementptr inbounds i16, i16* %7, i64 4
store i16 %6, i16* %8
ret void
}

LLVM IR (-O2):
define void @to_sign_short_store_4(fp128 %0, i16* nocapture writeonly %1) {
%3 = fptosi fp128 %0 to i16
%4 = getelementptr inbounds i16, i16* %1, i64 4
store i16 %3, i16* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ execv(char *, char **);
int child_main(void *arg) {
  char **argv = (char **)arg;
  execv(argv[0], argv);
}


x86 assembly (clang, -O0):
<child_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <execv@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_main>:
mov    %rdi,%rsi
mov    (%rdi),%rdi
jmp    1030 <execv@plt>

LLVM IR (-O0):
define i32 @child_main(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
store i8** %6, i8*** %4
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
%10 = load i8**, i8*** %4
%11 = call i32 @execv(i8* %9, i8** %10)
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @child_main(i8* %0) {
%2 = bitcast i8* %0 to i8**
%3 = load i8*, i8** %2
%4 = tail call i32 @execv(i8* %3, i8** %2)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ general_info();
int /*<<< orphan*/ set_encrypt_key();
int main(int argc, char **argv) {
  general_info();
  set_encrypt_key();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <general_info@plt>
mov    $0x0,%al
call   1040 <set_encrypt_key@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <general_info@plt>
xor    %eax,%eax
call   1040 <set_encrypt_key@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @general_info()
%7 = call i32 (...) @set_encrypt_key()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @general_info()
%4 = tail call i32 (...) @set_encrypt_key()
ret i32 0
}
int dictdb_close(void *dict_data) { return 0; }


x86 assembly (clang, -O0):
<dictdb_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dictdb_close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dictdb_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dictdb_close(i8* nocapture readnone %0) {
ret i32 0
}
signed perlin_dot(const signed short *vectors, unsigned gx, unsigned gy,
                  unsigned gw, unsigned gh, signed vx, signed vy) {
  return vx * vectors[gy * gw * 2 + gx * 2 + 0] +
         vy * vectors[gy * gw * 2 + gx * 2 + 1];
}


x86 assembly (clang, -O0):
<perlin_dot>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%edx
imul   -0x14(%rbp),%edx
shl    $0x1,%edx
mov    -0xc(%rbp),%esi
shl    $0x1,%esi
add    %esi,%edx
add    $0x0,%edx
mov    %edx,%edx
movswl (%rcx,%rdx,2),%ecx
imul   %ecx,%eax
mov    0x10(%rbp),%ecx
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%esi
imul   -0x14(%rbp),%esi
shl    $0x1,%esi
mov    -0xc(%rbp),%edi
shl    $0x1,%edi
add    %edi,%esi
add    $0x1,%esi
mov    %esi,%esi
movswl (%rdx,%rsi,2),%edx
imul   %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<perlin_dot>:
imul   %ecx,%edx
add    %esi,%edx
lea    (%rdx,%rdx,1),%eax
movswl (%rdi,%rax,2),%ecx
imul   %r9d,%ecx
lea    (%rdx,%rdx,1),%eax
add    $0x1,%eax
movswl (%rdi,%rax,2),%eax
imul   0x8(%rsp),%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @perlin_dot(i16* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca i16*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i16* %0, i16** %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load i32, i32* %13
%16 = load i16*, i16** %8
%17 = load i32, i32* %10
%18 = load i32, i32* %11
%19 = mul i32 %17, %18
%20 = mul i32 %19, 2
%21 = load i32, i32* %9
%22 = mul i32 %21, 2
%23 = add i32 %20, %22
%24 = add i32 %23, 0
%25 = zext i32 %24 to i64
%26 = getelementptr inbounds i16, i16* %16, i64 %25
%27 = load i16, i16* %26
%28 = sext i16 %27 to i32
%29 = mul nsw i32 %15, %28
%30 = load i32, i32* %14
%31 = load i16*, i16** %8
%32 = load i32, i32* %10
%33 = load i32, i32* %11
%34 = mul i32 %32, %33
%35 = mul i32 %34, 2
%36 = load i32, i32* %9
%37 = mul i32 %36, 2
%38 = add i32 %35, %37
%39 = add i32 %38, 1
%40 = zext i32 %39 to i64
%41 = getelementptr inbounds i16, i16* %31, i64 %40
%42 = load i16, i16* %41
%43 = sext i16 %42 to i32
%44 = mul nsw i32 %30, %43
%45 = add nsw i32 %29, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @perlin_dot(i16* nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = mul i32 %3, %2
%9 = add i32 %8, %1
%10 = shl i32 %9, 1
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i16, i16* %0, i64 %11
%13 = load i16, i16* %12
%14 = sext i16 %13 to i32
%15 = mul nsw i32 %14, %5
%16 = or i32 %10, 1
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i16, i16* %0, i64 %17
%19 = load i16, i16* %18
%20 = sext i16 %19 to i32
%21 = mul nsw i32 %20, %6
%22 = add nsw i32 %21, %15
ret i32 %22
}
imm0adr1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if (22 <= (*((unsigned short *)11111111)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<imm0adr1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0xa98ac7,%eax
movzwl (%rax),%ecx
mov    $0x16,%eax
cmp    %ecx,%eax
jg     1140 <imm0adr1+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1147 <imm0adr1+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imm0adr1>:
xor    %eax,%eax
cmpw   $0x16,0xa98ac7
setae  %al
ret

LLVM IR (-O0):
define i32 @imm0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* inttoptr (i64 11111111 to i16*)
%17 = zext i16 %16 to i32
%18 = icmp sle i32 22, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @imm0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = load i16, i16* inttoptr (i64 11111111 to i16*)
%8 = icmp ugt i16 %7, 21
%9 = zext i1 %8 to i32
ret i32 %9
}