xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint64_t FP64_MAKE(bool sign, int exp, uint64_t fract) {
  assert(exp >= 0 && exp <= 0x7ff);
  assert(fract < 0x10000000000000LL);
  return (uint64_t)sign << 63 | (uint64_t)exp << 52 | fract;
}


x86 assembly (clang, -O0):
<FP64_MAKE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jl     113d <FP64_MAKE+0x2d>
cmpl   $0x7ff,-0x8(%rbp)
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movslq -0xc(%rbp),%rax
movabs $0x10000000000000,%rcx
cmp    %rcx,%rax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
mov    $0x3f,%ecx
shl    %cl,%eax
mov    -0x8(%rbp),%edx
mov    $0x34,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
or     -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FP64_MAKE>:
push   %rax
xor    %edi,%edi
cmp    $0x800,%esi
setb   %dil
call   1030 <assert@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
define i32 @FP64_MAKE(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %5
%11 = icmp sle i32 %10, 2047
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ false, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = icmp slt i64 %17, 4503599627370496
%19 = zext i1 %18 to i32
%20 = call i32 @assert(i32 %19)
%21 = load i32, i32* %4
%22 = shl i32 %21, 63
%23 = load i32, i32* %5
%24 = shl i32 %23, 52
%25 = or i32 %22, %24
%26 = load i32, i32* %6
%27 = or i32 %25, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @FP64_MAKE(i32 %0, i32 %1, i32 %2) {
%4 = icmp ult i32 %1, 2048
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i32 @assert(i32 1)
ret i32 poison
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void *uDMAControlAlternateBaseGet(uint32_t ui32Base) {
  ;
  return ((void *)(*((volatile unsigned long *)(ui32Base + 0x0000000C))));
}


x86 assembly (clang, -O0):
<uDMAControlAlternateBaseGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAControlAlternateBaseGet>:
mov    0xc(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @uDMAControlAlternateBaseGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 12
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
define i8* @uDMAControlAlternateBaseGet(i64 %0) {
%2 = add nsw i64 %0, 12
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
/* Type definitions */
typedef size_t uint16_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, int);
uint16_t copy_tox_str(char *msg, size_t size, const char *data,
                      uint16_t length) {
  int len = (((length) < (size - 1)) ? (length) : (size - 1));
  memcpy(msg, data, len);
  msg[len] = '\0';
  return len;
}


x86 assembly (clang, -O0):
<copy_tox_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
cmp    %rcx,%rax
jae    114a <copy_tox_str+0x3a>
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
jmp    1156 <copy_tox_str+0x46>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
movslq -0x24(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
movslq -0x24(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_tox_str>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
add    $0xffffffffffffffff,%rbx
cmp    %rcx,%rbx
cmova  %rcx,%rbx
mov    %rdx,%rsi
mov    %ebx,%edx
call   1030 <memcpy@plt>
movslq %ebx,%rax
movb   $0x0,(%r14,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @copy_tox_str(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%10 = load i64, i64* %8
%11 = load i64, i64* %6
%12 = sub i64 %11, 1
%13 = icmp ult i64 %10, %12
br i1 %13, label %14, label %16
14: ; preds = %4
%15 = load i64, i64* %8
br label %19
16: ; preds = %4
%17 = load i64, i64* %6
%18 = sub i64 %17, 1
br label %19
19: ; preds = %16, %14
%20 = phi i64 [ %15, %14 ], [ %18, %16 ]
%21 = trunc i64 %20 to i32
store i32 %21, i32* %9
%22 = load i8*, i8** %5
%23 = load i8*, i8** %7
%24 = load i32, i32* %9
%25 = call i32 @memcpy(i8* %22, i8* %23, i32 %24)
%26 = load i8*, i8** %5
%27 = load i32, i32* %9
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i8, i8* %26, i64 %28
store i8 0, i8* %29
%30 = load i32, i32* %9
%31 = sext i32 %30 to i64
ret i64 %31
}

LLVM IR (-O2):
define i64 @copy_tox_str(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = add i64 %1, -1
%6 = icmp ugt i64 %5, %3
%7 = select i1 %6, i64 %3, i64 %5
%8 = trunc i64 %7 to i32
%9 = tail call i32 @memcpy(i8* %0, i8* %2, i32 %8)
%10 = shl i64 %7, 32
%11 = ashr exact i64 %10, 32
%12 = getelementptr inbounds i8, i8* %0, i64 %11
store i8 0, i8* %12
ret i64 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void output(char c, unsigned long *ol) {
  if (c != '\n') {
    printf("%c", c);
    (*ol)++;
  }
}


x86 assembly (clang, -O0):
<output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
je     114d <output+0x3d>
lea    0xeca(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output>:
cmp    $0xa,%dil
je     112f <output+0x1f>
push   %rbx
mov    %rsi,%rbx
movsbl %dil,%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
addq   $0x1,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @output(i8 signext %0, i64* %1) {
%3 = alloca i8
%4 = alloca i64*
store i8 %0, i8* %3
store i64* %1, i64** %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 10
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8, i8* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %9)
%11 = load i64*, i64** %4
%12 = load i64, i64* %11
%13 = add i64 %12, 1
store i64 %13, i64* %11
br label %14
14: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @output(i8 signext %0, i64* nocapture %1) {
%3 = icmp eq i8 %0, 10
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %0)
%6 = load i64, i64* %1
%7 = add i64 %6, 1
store i64 %7, i64* %1
br label %8
8: ; preds = %4, %2
ret void
}
int numberOfCharacters(unsigned int n) {
  int charNum = 0;
  while (n >= 10) {
    n = n / 10;
    charNum++;
  }
  charNum++;
  return charNum;
}


x86 assembly (clang, -O0):
<numberOfCharacters>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jb     1135 <numberOfCharacters+0x35>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <numberOfCharacters+0xe>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numberOfCharacters>:
mov    $0x1,%eax
cmp    $0xa,%edi
jb     1134 <numberOfCharacters+0x34>
mov    $0x1,%eax
mov    $0xcccccccd,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x23,%rdx
add    $0x1,%eax
cmp    $0x63,%edi
mov    %edx,%edi
ja     1120 <numberOfCharacters+0x20>
ret

LLVM IR (-O0):
define i32 @numberOfCharacters(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp uge i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = udiv i32 %8, 10
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @numberOfCharacters(i32 %0) {
%2 = icmp ugt i32 %0, 9
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = udiv i32 %5, 10
%7 = add i32 %4, 1
%8 = icmp ugt i32 %5, 99
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
void rdtsc_someFunc() {}


x86 assembly (clang, -O0):
<rdtsc_someFunc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdtsc_someFunc>:
ret

LLVM IR (-O0):
define void @rdtsc_someFunc() {
ret void
}

LLVM IR (-O2):
define void @rdtsc_someFunc() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int _usage(void) {
  fputs("Usage: "
        "time"
        " [-p] utility [argument...]\n  -p	Force the POSIX locale\n",
        stderr);
  return 1;
}


x86 assembly (clang, -O0):
<_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [68 x i8] c"Usage: time [-p] utility [argument...]\0A -p\09Force the POSIX locale\0A\00"
@stderr = global i32 0
define i32 @_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}

LLVM IR (-O2):
@.str = [68 x i8] c"Usage: time [-p] utility [argument...]\0A -p\09Force the POSIX locale\0A\00"
@stderr = global i32 0
define i32 @_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}
int topla(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<topla>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<topla>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @topla(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @topla(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int tirar(int);
int d4() { return tirar(4); }


x86 assembly (clang, -O0):
<d4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <tirar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<d4>:
mov    $0x4,%edi
jmp    1030 <tirar@plt>

LLVM IR (-O0):
define i32 @d4() {
%1 = call i32 @tirar(i32 4)
ret i32 %1
}

LLVM IR (-O2):
define i32 @d4() {
%1 = tail call i32 @tirar(i32 4)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  char a[10];
  a[2] = 'a';
  printf("%c", a[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x61,-0xc(%rbp)
lea    0xed6(%rip),%rdi
movsbl -0xd(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 2
store i8 97, i8* %3
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 1
%5 = load i8, i8* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext undef)
ret i32 0
}
int blk_throtl_bio(struct request_queue *q, struct bio **bio) { return 0; }


x86 assembly (clang, -O0):
<blk_throtl_bio>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_throtl_bio>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.request_queue = type opaque
%struct.bio = type opaque
define i32 @blk_throtl_bio(%struct.request_queue* %0, %struct.bio** %1) {
%3 = alloca %struct.request_queue*
%4 = alloca %struct.bio**
store %struct.request_queue* %0, %struct.request_queue** %3
store %struct.bio** %1, %struct.bio*** %4
ret i32 0
}

LLVM IR (-O2):
%struct.request_queue = type opaque
%struct.bio = type opaque
define i32 @blk_throtl_bio(%struct.request_queue* nocapture readnone %0, %struct.bio** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int pun_float_to_int(float x) {
  union {
    float f;
    uint32_t i;
  } vx = {x};
  return vx.i;
}


x86 assembly (clang, -O0):
<pun_float_to_int>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pun_float_to_int>:
movd   %xmm0,%eax
ret

LLVM IR (-O0):
%union.anon = type { float }
define i32 @pun_float_to_int(float %0) {
%2 = alloca float
%3 = alloca %union.anon
store float %0, float* %2
%4 = bitcast %union.anon* %3 to float*
%5 = load float, float* %2
store float %5, float* %4
%6 = bitcast %union.anon* %3 to i32*
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @pun_float_to_int(float %0) {
%2 = bitcast float %0 to i32
ret i32 %2
}
long core___core__Int____37d(long self, long p0) {
  long var;
  long var1;
  var1 = self % p0;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Int____37d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Int____37d>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1118 <core___core__Int____37d+0x18>
cqto
idiv   %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @core___core__Int____37d(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = srem i64 %7, %8
store i64 %9, i64* %6
%10 = load i64, i64* %6
store i64 %10, i64* %5
br label %11
11: ; preds = %2
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @core___core__Int____37d(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
ret i64 %3
}
int digits(int num, int base) {
  int register d = 1;
  int register n;
  for (n = num; n >= base; n /= base)
    d++;
  return d;
}


x86 assembly (clang, -O0):
<digits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     113d <digits+0x3d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
jmp    1117 <digits+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digits>:
mov    $0x1,%ecx
cmp    %esi,%edi
jl     111a <digits+0x1a>
mov    %edi,%eax
mov    $0x1,%ecx
add    $0x1,%ecx
cltd
idiv   %esi
cmp    %esi,%eax
jge    1110 <digits+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @digits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 1, i32* %5
%7 = load i32, i32* %3
store i32 %7, i32* %6
br label %8
8: ; preds = %15, %2
%9 = load i32, i32* %6
%10 = load i32, i32* %4
%11 = icmp sge i32 %9, %10
br i1 %11, label %12, label %19
12: ; preds = %8
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
br label %15
15: ; preds = %12
%16 = load i32, i32* %4
%17 = load i32, i32* %6
%18 = sdiv i32 %17, %16
store i32 %18, i32* %6
br label %8
19: ; preds = %8
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @digits(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %10, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %8, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ 1, %2 ]
%7 = add nuw nsw i32 %6, 1
%8 = sdiv i32 %5, %1
%9 = icmp slt i32 %8, %1
br i1 %9, label %10, label %4
10: ; preds = %4, %2
%11 = phi i32 [ 1, %2 ], [ %7, %4 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ hstcp_unregister();
void module_unregister_fake(void) {
  if (0)
    hstcp_unregister();
}


x86 assembly (clang, -O0):
<module_unregister_fake>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_unregister_fake>:
ret

LLVM IR (-O0):
define void @module_unregister_fake() {
ret void
}

LLVM IR (-O2):
define void @module_unregister_fake() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOG_CONS;
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ LOG_USER;
int /*<<< orphan*/ closelog();
int /*<<< orphan*/ openlog(char *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *, char const *);
void writeMessageToSyslogd(const char *message) {
  openlog("Demo", LOG_CONS, LOG_USER);
  syslog(LOG_ERR, "%s", message);
  closelog();
}


x86 assembly (clang, -O0):
<writeMessageToSyslogd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
mov    0x2e9c(%rip),%rax
mov    (%rax),%edx
lea    0xeab(%rip),%rdi
call   1050 <openlog@plt>
mov    0x2e67(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xe97(%rip),%rsi
call   1040 <syslog@plt>
mov    $0x0,%al
call   1030 <closelog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeMessageToSyslogd>:
push   %rbx
mov    %rdi,%rbx
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    0x2ea4(%rip),%rax
mov    (%rax),%edx
lea    0xeb3(%rip),%rdi
call   1050 <openlog@plt>
mov    0x2e6f(%rip),%rax
mov    (%rax),%edi
lea    0xea3(%rip),%rsi
mov    %rbx,%rdx
call   1040 <syslog@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <closelog@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"Demo\00"
@LOG_CONS = global i32 0
@LOG_USER = global i32 0
@LOG_ERR = global i32 0
@.str.1 = [3 x i8] c"%s\00"
define void @writeMessageToSyslogd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @LOG_CONS
%4 = load i32, i32* @LOG_USER
%5 = call i32 @openlog(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
%6 = load i32, i32* @LOG_ERR
%7 = load i8*, i8** %2
%8 = call i32 @syslog(i32 %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %7)
%9 = call i32 (...) @closelog()
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"Demo\00"
@LOG_CONS = global i32 0
@LOG_USER = global i32 0
@LOG_ERR = global i32 0
@.str.1 = [3 x i8] c"%s\00"
define void @writeMessageToSyslogd(i8* %0) {
%2 = load i32, i32* @LOG_CONS
%3 = load i32, i32* @LOG_USER
%4 = tail call i32 @openlog(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %3)
%5 = load i32, i32* @LOG_ERR
%6 = tail call i32 @syslog(i32 %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%7 = tail call i32 (...) @closelog()
ret void
}
int __attribute__((no)) handle_large_alignment(int num) {
  int other_array[10];
  int big_array[100] __attribute__((aligned(32)));
  return big_array[num] + other_array[num];
}


x86 assembly (clang, -O0):
<handle_large_alignment>:
push   %rbp
mov    %rsp,%rbp
and    $0xffffffffffffffe0,%rsp
sub    $0x1e0,%rsp
mov    %edi,0x1cc(%rsp)
movslq 0x1cc(%rsp),%rax
mov    (%rsp,%rax,4),%eax
movslq 0x1cc(%rsp),%rcx
add    0x1a0(%rsp,%rcx,4),%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_large_alignment>:
ret

LLVM IR (-O0):
define i32 @handle_large_alignment(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i32]
%4 = alloca [100 x i32]
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [100 x i32], [100 x i32]* %4, i64 0, i64 %6
%8 = load i32, i32* %7
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %10
%12 = load i32, i32* %11
%13 = add nsw i32 %8, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @handle_large_alignment(i32 %0) {
ret i32 undef
}
void test1_SwitchTest_targetInit__I() {}


x86 assembly (clang, -O0):
<test1_SwitchTest_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1_SwitchTest_targetInit__I>:
ret

LLVM IR (-O0):
define void @test1_SwitchTest_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test1_SwitchTest_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void pointer_to_pointer() {
  int i = 5, j = 6, k = 7;
  int *ip;
  int *ip2;
  ip = &i;
  ip2 = &j;
  int **ipp;
  ipp = &ip;
  *ipp = &k;
  printf("**ipp = %d\n", **ipp);
}


x86 assembly (clang, -O0):
<pointer_to_pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x5,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
movl   $0x7,-0xc(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
lea    -0xc(%rbp),%rcx
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%esi
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer_to_pointer>:
lea    0xee9(%rip),%rdi
mov    $0x7,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"**ipp = %d\0A\00"
define void @pointer_to_pointer() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32**
store i32 5, i32* %1
store i32 6, i32* %2
store i32 7, i32* %3
store i32* %1, i32** %4
store i32* %2, i32** %5
store i32** %4, i32*** %6
%7 = load i32**, i32*** %6
store i32* %3, i32** %7
%8 = load i32**, i32*** %6
%9 = load i32*, i32** %8
%10 = load i32, i32* %9
%11 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"**ipp = %d\0A\00"
define void @pointer_to_pointer() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 7)
ret void
}
int f13(int x, int y) {
  if (y >= 0)
    return x % -y;
  return 34;
}


x86 assembly (clang, -O0):
<f13>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1127 <f13+0x27>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
sub    -0xc(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,-0x4(%rbp)
jmp    112e <f13+0x2e>
movl   $0x22,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f13>:
test   %esi,%esi
js     110e <f13+0xe>
neg    %esi
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret
mov    $0x22,%eax
ret

LLVM IR (-O0):
define i32 @f13(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = sub nsw i32 0, %10
%12 = srem i32 %9, %11
store i32 %12, i32* %3
br label %14
13: ; preds = %2
store i32 34, i32* %3
br label %14
14: ; preds = %13, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @f13(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = sub nsw i32 0, %1
%6 = srem i32 %0, %5
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ 34, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ do_n_times(int);
void do_m2_times_quadratic(int m) {
  for (int i = 0; i < m; i++) {
    do_n_times(m);
  }
}


x86 assembly (clang, -O0):
<do_m2_times_quadratic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1144 <do_m2_times_quadratic+0x34>
mov    -0x4(%rbp),%edi
call   1030 <do_n_times@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <do_m2_times_quadratic+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_m2_times_quadratic>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    112c <do_m2_times_quadratic+0x1c>
mov    %edi,%ebx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1030 <do_n_times@plt>
add    $0xffffffff,%ebp
jne    1120 <do_m2_times_quadratic+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @do_m2_times_quadratic(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* %2
%10 = call i32 @do_n_times(i32 %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @do_m2_times_quadratic(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %4, label %3
3: ; preds = %4, %1
ret void
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 @do_n_times(i32 %0)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %3, label %4
}
/* Variables and functions */
int /*<<< orphan*/ hano(char, int, char, char);
int main() {
  hano('a', 10, 'b', 'c');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x61,%edi
mov    $0xa,%esi
mov    $0x62,%edx
mov    $0x63,%ecx
call   1030 <hano@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x61,%edi
mov    $0xa,%esi
mov    $0x62,%edx
mov    $0x63,%ecx
call   1030 <hano@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @hano(i8 signext 97, i32 10, i8 signext 98, i8 signext 99)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @hano(i8 signext 97, i32 10, i8 signext 98, i8 signext 99)
ret i32 0
}
/* Variables and functions */
int inb(int);
int /*<<< orphan*/ outb(int, int);
unsigned get_cmos(int reg) {
  outb(0x70, reg);
  return inb(0x71);
}


x86 assembly (clang, -O0):
<get_cmos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x70,%edi
call   1030 <outb@plt>
mov    $0x71,%edi
call   1040 <inb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cmos>:
push   %rax
mov    %edi,%esi
mov    $0x70,%edi
call   1030 <outb@plt>
mov    $0x71,%edi
pop    %rax
jmp    1040 <inb@plt>

LLVM IR (-O0):
define i32 @get_cmos(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @outb(i32 112, i32 %3)
%5 = call i32 @inb(i32 113)
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_cmos(i32 %0) {
%2 = tail call i32 @outb(i32 112, i32 %0)
%3 = tail call i32 @inb(i32 113)
ret i32 %3
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ceil(int);
scalar_t__ fabs(scalar_t__);
int log(double);
int32_t size_base_2(int32_t a) {
  if (a < 0) {
    a = fabs(a);
  } else if (a == 0) {
    return 0;
  }
  return (int32_t)ceil(log((double)a) / log((double)2));
}


x86 assembly (clang, -O0):
<size_base_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1159 <size_base_2+0x29>
mov    -0x10(%rbp),%rdi
call   1040 <fabs@plt>
mov    %rax,-0x10(%rbp)
jmp    1176 <size_base_2+0x46>
cmpq   $0x0,-0x10(%rbp)
jne    1171 <size_base_2+0x41>
movq   $0x0,-0x8(%rbp)
jmp    11a6 <size_base_2+0x76>
jmp    1176 <size_base_2+0x46>
cvtsi2sdq -0x10(%rbp),%xmm0
call   1050 <log@plt>
mov    %eax,-0x14(%rbp)
movsd  0xe74(%rip),%xmm0
call   1050 <log@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <ceil@plt>
cltq
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_base_2>:
push   %rbx
test   %rdi,%rdi
js     113c <size_base_2+0xc>
jne    1144 <size_base_2+0x14>
xor    %eax,%eax
pop    %rbx
ret
call   1040 <fabs@plt>
mov    %rax,%rdi
cvtsi2sd %rdi,%xmm0
call   1050 <log@plt>
mov    %eax,%ebx
movsd  0xea8(%rip),%xmm0
call   1050 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <ceil@plt>
cltq
pop    %rbx
ret

LLVM IR (-O0):
define i64 @size_base_2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i64, i64* %3
%8 = call i64 @fabs(i64 %7)
store i64 %8, i64* %3
br label %14
9: ; preds = %1
%10 = load i64, i64* %3
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
store i64 0, i64* %2
br label %22
13: ; preds = %9
br label %14
14: ; preds = %13, %6
%15 = load i64, i64* %3
%16 = sitofp i64 %15 to double
%17 = call i32 @log(double %16)
%18 = call i32 @log(double 2.000000e+00)
%19 = sdiv i32 %17, %18
%20 = call i32 @ceil(i32 %19)
%21 = sext i32 %20 to i64
store i64 %21, i64* %2
br label %22
22: ; preds = %14, %12
%23 = load i64, i64* %2
ret i64 %23
}

LLVM IR (-O2):
define i64 @size_base_2(i64 %0) {
%2 = icmp slt i64 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i64 @fabs(i64 %0)
br label %7
5: ; preds = %1
%6 = icmp eq i64 %0, 0
br i1 %6, label %15, label %7
7: ; preds = %5, %3
%8 = phi i64 [ %4, %3 ], [ %0, %5 ]
%9 = sitofp i64 %8 to double
%10 = tail call i32 @log(double %9)
%11 = tail call i32 @log(double 2.000000e+00)
%12 = sdiv i32 %10, %11
%13 = tail call i32 @ceil(i32 %12)
%14 = sext i32 %13 to i64
br label %15
15: ; preds = %5, %7
%16 = phi i64 [ %14, %7 ], [ 0, %5 ]
ret i64 %16
}
int has_suffix(const char *str, const char *suffix) {
  const char *tmp = strstr(str, suffix);
  if (!tmp)
    return 0;
  return str + strlen(str) - strlen(suffix) == tmp;
}


x86 assembly (clang, -O0):
<has_suffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1158 <has_suffix+0x38>
movl   $0x0,-0x4(%rbp)
jmp    119e <has_suffix+0x7e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rdx
mov    -0x28(%rbp),%rax
xor    %ecx,%ecx
sub    %rdx,%rcx
add    %rcx,%rax
cmp    -0x20(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_suffix>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r15
mov    %rdi,%r12
call   1040 <strstr@plt>
test   %rax,%rax
je     115e <has_suffix+0x3e>
mov    %rax,%r14
mov    %r12,%rdi
call   1030 <strlen@plt>
mov    %rax,%rbx
add    %r12,%rbx
mov    %r15,%rdi
call   1030 <strlen@plt>
sub    %rax,%rbx
xor    %eax,%eax
cmp    %r14,%rbx
sete   %al
jmp    1160 <has_suffix+0x40>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @has_suffix(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i8* @strstr(i8* %7, i8* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 0, i32* %3
br label %25
13: ; preds = %2
%14 = load i8*, i8** %4
%15 = load i8*, i8** %4
%16 = call i64 @strlen(i8* %15)
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8*, i8** %5
%19 = call i64 @strlen(i8* %18)
%20 = sub i64 0, %19
%21 = getelementptr inbounds i8, i8* %17, i64 %20
%22 = load i8*, i8** %6
%23 = icmp eq i8* %21, %22
%24 = zext i1 %23 to i32
store i32 %24, i32* %3
br label %25
25: ; preds = %13, %12
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @has_suffix(i8* %0, i8* nocapture %1) {
%3 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %13, label %5
5: ; preds = %2
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%9 = sub i64 0, %8
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = icmp eq i8* %10, %3
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %2, %5
%14 = phi i32 [ %12, %5 ], [ 0, %2 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ stdout;
int main(int argc, char *argv[]) {
  char *str = "Test string for puts and fputs functions... PASS";
  puts(str);
  fputs(str, stdout);
  puts("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <puts@plt>
mov    -0x18(%rbp),%rdi
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
call   1040 <fputs@plt>
lea    0xece(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1040 <fputs@plt>
lea    0xee9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [49 x i8] c"Test string for puts and fputs functions... PASS\00"
@stdout = global i32 0
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @puts(i8* %7)
%9 = load i8*, i8** %6
%10 = load i32, i32* @stdout
%11 = call i32 @fputs(i8* %9, i32 %10)
%12 = call i32 @puts(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [49 x i8] c"Test string for puts and fputs functions... PASS\00"
@stdout = global i32 0
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stdout
%5 = tail call i32 @fputs(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
void NV21ToRGB24Row_C() {}


x86 assembly (clang, -O0):
<NV21ToRGB24Row_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV21ToRGB24Row_C>:
ret

LLVM IR (-O0):
define void @NV21ToRGB24Row_C() {
ret void
}

LLVM IR (-O2):
define void @NV21ToRGB24Row_C() {
ret void
}
/* Type definitions */
typedef scalar_t__ time_t;
struct timespec {
  long tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, struct timespec *);
void ssd1306_delay(unsigned int ms) {
  struct timespec sleeper, dummy;
  sleeper.tv_sec = (time_t)(ms / 1000);
  sleeper.tv_nsec = (long)(ms % 1000) * 1000000;
  nanosleep(&sleeper, &dummy);
}


x86 assembly (clang, -O0):
<ssd1306_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%eax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
imul   $0xf4240,%rax,%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssd1306_delay>:
sub    $0x28,%rsp
mov    %edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
mov    %rax,0x10(%rsp)
imul   $0x3e8,%eax,%eax
sub    %eax,%edi
imul   $0xf4240,%edi,%eax
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
lea    0x18(%rsp),%rsi
call   1030 <nanosleep@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define void @ssd1306_delay(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = udiv i32 %5, 1000
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 %7, i64* %8
%9 = load i32, i32* %2
%10 = urem i32 %9, 1000
%11 = zext i32 %10 to i64
%12 = mul nsw i64 %11, 1000000
%13 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i64 %12, i64* %13
%14 = call i32 @nanosleep(%struct.timespec* %3, %struct.timespec* %4)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define void @ssd1306_delay(i32 %0) {
%2 = alloca %struct.timespec
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %2 to i8*
%5 = bitcast %struct.timespec* %3 to i8*
%6 = udiv i32 %0, 1000
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 %7, i64* %8
%9 = urem i32 %0, 1000
%10 = mul nuw nsw i32 %9, 1000000
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i64 %11, i64* %12
%13 = call i32 @nanosleep(%struct.timespec* %2, %struct.timespec* %3)
ret void
}
/* Type definitions */
struct cpufreq_available_governors {
  int dummy;
};

/* Variables and functions */
struct cpufreq_available_governors *
sysfs_get_available_governors(unsigned int cpu) {
  return NULL;
}


x86 assembly (clang, -O0):
<sysfs_get_available_governors>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_get_available_governors>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cpufreq_available_governors = type { i32 }
define %struct.cpufreq_available_governors* @sysfs_get_available_governors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret %struct.cpufreq_available_governors* null
}

LLVM IR (-O2):
%struct.cpufreq_available_governors = type { i32 }
define noalias %struct.cpufreq_available_governors* @sysfs_get_available_governors(i32 %0) {
ret %struct.cpufreq_available_governors* null
}
void GPIOModuleDisable(unsigned int baseAdd) {
  (*((volatile unsigned int *)(baseAdd + (0x130)))) |= ((0x00000001u));
}


x86 assembly (clang, -O0):
<GPIOModuleDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x130,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOModuleDisable>:
add    $0x130,%edi
orl    $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @GPIOModuleDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 304
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 1
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @GPIOModuleDisable(i32 %0) {
%2 = add i32 %0, 304
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = or i32 %5, 1
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
void const *GppcFinfoV1();
const void *pg_finfo_spifunc6(void) { return GppcFinfoV1(); }


x86 assembly (clang, -O0):
<pg_finfo_spifunc6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GppcFinfoV1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pg_finfo_spifunc6>:
xor    %eax,%eax
jmp    1030 <GppcFinfoV1@plt>

LLVM IR (-O0):
define i8* @pg_finfo_spifunc6() {
%1 = call i8* (...) @GppcFinfoV1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @pg_finfo_spifunc6() {
%1 = tail call i8* (...) @GppcFinfoV1()
ret i8* %1
}
void cpu_uint8_write(void *ptr, unsigned v) {
  unsigned char *ptr8 = (unsigned char *)ptr;
  ptr8[0] = (unsigned char)v;
}


x86 assembly (clang, -O0):
<cpu_uint8_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_uint8_write>:
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @cpu_uint8_write(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
ret void
}

LLVM IR (-O2):
define void @cpu_uint8_write(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
ret void
}
/* Variables and functions */
float fastBounceIn(int, float, float, int, float, float);
float fastBounceOut(float fraction, float start, float delta, int bounces,
                    float growth, float damping) {
  return fastBounceIn(1 - fraction, start + delta, -delta, bounces, growth,
                      damping);
}


x86 assembly (clang, -O0):
<fastBounceOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
movss  %xmm3,-0x14(%rbp)
movss  %xmm4,-0x18(%rbp)
movss  0xec4(%rip),%xmm0
subss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%edi
movss  -0x8(%rbp),%xmm0
addss  -0xc(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mov    -0x10(%rbp),%esi
movss  -0x14(%rbp),%xmm2
movss  -0x18(%rbp),%xmm3
call   1030 <fastBounceIn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastBounceOut>:
movss  0xee8(%rip),%xmm5
subss  %xmm0,%xmm5
cvttss2si %xmm5,%eax
mov    %edi,%esi
movaps %xmm1,%xmm0
addss  %xmm2,%xmm0
xorps  0xee0(%rip),%xmm2
mov    %eax,%edi
movaps %xmm2,%xmm1
movaps %xmm3,%xmm2
movaps %xmm4,%xmm3
jmp    1030 <fastBounceIn@plt>

LLVM IR (-O0):
define float @fastBounceOut(float %0, float %1, float %2, i32 %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store i32 %3, i32* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %7
%14 = fsub float 1.000000e+00, %13
%15 = fptosi float %14 to i32
%16 = load float, float* %8
%17 = load float, float* %9
%18 = fadd float %16, %17
%19 = load float, float* %9
%20 = fneg float %19
%21 = load i32, i32* %10
%22 = load float, float* %11
%23 = load float, float* %12
%24 = call float @fastBounceIn(i32 %15, float %18, float %20, i32 %21, float %22, float %23)
ret float %24
}

LLVM IR (-O2):
define float @fastBounceOut(float %0, float %1, float %2, i32 %3, float %4, float %5) {
%7 = fsub float 1.000000e+00, %0
%8 = fptosi float %7 to i32
%9 = fadd float %1, %2
%10 = fneg float %2
%11 = tail call float @fastBounceIn(i32 %8, float %9, float %10, i32 %3, float %4, float %5)
ret float %11
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  char const *pw_dir;
};

/* Variables and functions */
char *getenv(char *);
TYPE_1__ *getpwuid(int /*<<< orphan*/);
int /*<<< orphan*/ getuid();
const char *homedir(void) {
  const char *home = getenv("HOME");
  return home ? home : getpwuid(getuid())->pw_dir;
}


x86 assembly (clang, -O0):
<homedir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1160 <homedir+0x30>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1175 <homedir+0x45>
mov    $0x0,%al
call   1050 <getuid@plt>
mov    %eax,%edi
call   1040 <getpwuid@plt>
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<homedir>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     1144 <homedir+0x14>
pop    %rcx
ret
xor    %eax,%eax
call   1050 <getuid@plt>
mov    %eax,%edi
call   1040 <getpwuid@plt>
mov    (%rax),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i8* }
@.str = [5 x i8] c"HOME\00"
define i8* @homedir() {
%1 = alloca i8*
%2 = call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i8*, i8** %1
br label %12
7: ; preds = %0
%8 = call i32 (...) @getuid()
%9 = call %struct.TYPE_2__* @getpwuid(i32 %8)
%10 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %9, i32 0, i32 0
%11 = load i8*, i8** %10
br label %12
12: ; preds = %7, %5
%13 = phi i8* [ %6, %5 ], [ %11, %7 ]
ret i8* %13
}

LLVM IR (-O2):
%struct.TYPE_2__ = type { i8* }
@.str = [5 x i8] c"HOME\00"
define i8* @homedir() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i8* %1, null
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = tail call i32 (...) @getuid()
%5 = tail call %struct.TYPE_2__* @getpwuid(i32 %4)
%6 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %5, i64 0, i32 0
%7 = load i8*, i8** %6
br label %8
8: ; preds = %0, %3
%9 = phi i8* [ %7, %3 ], [ %1, %0 ]
ret i8* %9
}