xunge/DecIR huggingface dataset:
int RECOIL_GetSteInterlacedColor(int rgb) {
  rgb = (rgb & 1792) << 10 | (rgb & 2160) << 6 | (rgb & 16519) << 2 |
        (rgb & 8192) >> 5 | (rgb & 8) >> 2 | (rgb & 4096) >> 12;
  return rgb << 3 | (rgb >> 2 & 460551);
}


x86 assembly (clang, -O0):
<RECOIL_GetSteInterlacedColor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x700,%eax
shl    $0xa,%eax
mov    -0x4(%rbp),%ecx
and    $0x870,%ecx
shl    $0x6,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x4087,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x2000,%ecx
sar    $0x5,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x8,%ecx
sar    $0x2,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x1000,%ecx
sar    $0xc,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x70707,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RECOIL_GetSteInterlacedColor>:
mov    %edi,%eax
shl    $0xa,%eax
and    $0x1c0000,%eax
mov    %edi,%ecx
shl    $0x6,%ecx
and    $0x21c00,%ecx
or     %eax,%ecx
mov    %edi,%eax
and    $0x4087,%eax
lea    (%rcx,%rax,4),%eax
mov    %edi,%ecx
shr    $0x5,%ecx
and    $0x100,%ecx
mov    %edi,%edx
shr    $0x2,%edx
and    $0x2,%edx
or     %ecx,%edx
shr    $0xc,%edi
and    $0x1,%edi
or     %edx,%edi
or     %eax,%edi
shr    $0x2,%eax
and    $0x70707,%eax
lea    (%rax,%rdi,8),%eax
ret

LLVM IR (-O0):
define i32 @RECOIL_GetSteInterlacedColor(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1792
%5 = shl i32 %4, 10
%6 = load i32, i32* %2
%7 = and i32 %6, 2160
%8 = shl i32 %7, 6
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16519
%12 = shl i32 %11, 2
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 8192
%16 = ashr i32 %15, 5
%17 = or i32 %13, %16
%18 = load i32, i32* %2
%19 = and i32 %18, 8
%20 = ashr i32 %19, 2
%21 = or i32 %17, %20
%22 = load i32, i32* %2
%23 = and i32 %22, 4096
%24 = ashr i32 %23, 12
%25 = or i32 %21, %24
store i32 %25, i32* %2
%26 = load i32, i32* %2
%27 = shl i32 %26, 3
%28 = load i32, i32* %2
%29 = ashr i32 %28, 2
%30 = and i32 %29, 460551
%31 = or i32 %27, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @RECOIL_GetSteInterlacedColor(i32 %0) {
%2 = shl i32 %0, 10
%3 = and i32 %2, 1835008
%4 = shl i32 %0, 6
%5 = and i32 %4, 138240
%6 = or i32 %3, %5
%7 = shl i32 %0, 2
%8 = and i32 %7, 66076
%9 = or i32 %6, %8
%10 = lshr i32 %0, 5
%11 = and i32 %10, 256
%12 = lshr i32 %0, 2
%13 = and i32 %12, 2
%14 = lshr i32 %0, 12
%15 = and i32 %14, 1
%16 = or i32 %13, %11
%17 = or i32 %16, %15
%18 = or i32 %17, %9
%19 = shl nuw nsw i32 %18, 3
%20 = lshr exact i32 %9, 2
%21 = and i32 %20, 460551
%22 = or i32 %19, %21
ret i32 %22
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isupper(int);
void t_isupper_0x47() {
  Assert_real((isupper(71)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              360, ("isupper should be 1 for G"));
}


x86 assembly (clang, -O0):
<t_isupper_0x47>:
push   %rbp
mov    %rsp,%rbp
mov    $0x47,%edi
call   1030 <isupper@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x168,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x47>:
push   %rax
mov    $0x47,%edi
call   1030 <isupper@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x168,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 1 for G\00"
define void @t_isupper_0x47() {
%1 = call i32 @isupper(i32 71)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 360, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 1 for G\00"
define void @t_isupper_0x47() {
%1 = tail call i32 @isupper(i32 71)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 360, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
scalar_t__ memcpy(char *, char *, int);
int copy_something(char *buf, int len) {
  char *kbuf;
  int ret;
  kbuf = (char *)malloc(sizeof(char) * 800);
  if (len > 800) {
    return -1;
  }
  ret = (int)memcpy(kbuf, buf, len);
  free(kbuf);
  return ret;
}


x86 assembly (clang, -O0):
<copy_something>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    $0x320,%edi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpl   $0x320,-0x14(%rbp)
jle    1166 <copy_something+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <copy_something+0x58>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <memcpy@plt>
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_something>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%r15
mov    $0x320,%edi
call   1050 <malloc@plt>
mov    $0xffffffff,%ebx
cmp    $0x320,%ebp
jg     116e <copy_something+0x3e>
mov    %rax,%r14
mov    %rax,%rdi
mov    %r15,%rsi
mov    %ebp,%edx
call   1040 <memcpy@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <free@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @copy_something(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%8 = call i64 @malloc(i32 800)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %6
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 800
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %3
br label %22
13: ; preds = %2
%14 = load i8*, i8** %6
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = call i64 @memcpy(i8* %14, i8* %15, i32 %16)
%18 = trunc i64 %17 to i32
store i32 %18, i32* %7
%19 = load i8*, i8** %6
%20 = call i32 @free(i8* %19)
%21 = load i32, i32* %7
store i32 %21, i32* %3
br label %22
22: ; preds = %13, %12
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @copy_something(i8* %0, i32 %1) {
%3 = tail call i64 @malloc(i32 800)
%4 = inttoptr i64 %3 to i8*
%5 = icmp sgt i32 %1, 800
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i64 @memcpy(i8* %4, i8* %0, i32 %1)
%8 = trunc i64 %7 to i32
%9 = tail call i32 @free(i8* %4)
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ %8, %6 ], [ -1, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void test_close(void *rctxt) { free(rctxt); }


x86 assembly (clang, -O0):
<test_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_close>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @test_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @test_close(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int _cpuID() { return 0; }


x86 assembly (clang, -O0):
<_cpuID>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cpuID>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_cpuID() {
ret i32 0
}

LLVM IR (-O2):
define i32 @_cpuID() {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ emit_colours_event();
void qc_game_colour_cvar(int *var, int val) {
  *var = (uint8_t)val;
  emit_colours_event();
}


x86 assembly (clang, -O0):
<qc_game_colour_cvar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <emit_colours_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qc_game_colour_cvar>:
mov    %esi,(%rdi)
xor    %eax,%eax
jmp    1030 <emit_colours_event@plt>

LLVM IR (-O0):
define void @qc_game_colour_cvar(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
%7 = call i32 (...) @emit_colours_event()
ret void
}

LLVM IR (-O2):
define void @qc_game_colour_cvar(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
%3 = tail call i32 (...) @emit_colours_event()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_slli_epi32(int /*<<< orphan*/, int);
__m128i shift(__m128i x, int bits) { return _mm_slli_epi32(x, bits); }


x86 assembly (clang, -O0):
<shift>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_slli_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift>:
jmp    1030 <_mm_slli_epi32@plt>

LLVM IR (-O0):
define i32 @shift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_slli_epi32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @shift(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_slli_epi32(i32 %0, i32 %1)
ret i32 %3
}
void debug_scanner_state(int state) {
  switch (state) {
  case 1:;
    break;
  case 2:;
    break;
  case 3:;
    break;
  case 0:;
    break;
  default:;
    break;
  }
}


x86 assembly (clang, -O0):
<debug_scanner_state>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     1140 <debug_scanner_state+0x40>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    1145 <debug_scanner_state+0x45>
jmp    1145 <debug_scanner_state+0x45>
jmp    1145 <debug_scanner_state+0x45>
jmp    1145 <debug_scanner_state+0x45>
jmp    1145 <debug_scanner_state+0x45>
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_scanner_state>:
ret

LLVM IR (-O0):
define void @debug_scanner_state(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 1, label %4
i32 2, label %5
i32 3, label %6
i32 0, label %7
]
4: ; preds = %1
br label %9
5: ; preds = %1
br label %9
6: ; preds = %1
br label %9
7: ; preds = %1
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %7, %6, %5, %4
ret void
}

LLVM IR (-O2):
define void @debug_scanner_state(i32 %0) {
ret void
}
void a_inc(volatile int *x) {
  __asm__("lock ; .byte 0x67\n\tincl %0" : "=m"(*x) : "m"(*x) : "memory");
}


x86 assembly (clang, -O0):
<a_inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
lock incl (%eax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_inc>:
lock incl (%edi)
ret

LLVM IR (-O0):
define void @a_inc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @a_inc(i32* %0) {
tail call void asm "lock ; .byte 0x67\0A\09incl $0", "=*m,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32* elementtype(i32) %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ len;

/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned int *, int);
void zipPrevEncodeLengthForceLarge(unsigned char *p, unsigned int len) {
  if (p == NULL)
    return;
  p[0] = 254;
  memcpy(p + 1, &len, sizeof(len));
}


x86 assembly (clang, -O0):
<zipPrevEncodeLengthForceLarge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112f <zipPrevEncodeLengthForceLarge+0x1f>
jmp    114c <zipPrevEncodeLengthForceLarge+0x3c>
mov    -0x8(%rbp),%rax
movb   $0xfe,(%rax)
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zipPrevEncodeLengthForceLarge>:
push   %rax
mov    %esi,0x4(%rsp)
test   %rdi,%rdi
je     1130 <zipPrevEncodeLengthForceLarge+0x20>
movb   $0xfe,(%rdi)
add    $0x1,%rdi
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @zipPrevEncodeLengthForceLarge(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
br label %14
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 -2, i8* %10
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = call i32 @memcpy(i8* %12, i32* %4, i32 4)
br label %14
14: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @zipPrevEncodeLengthForceLarge(i8* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = icmp eq i8* %0, null
br i1 %4, label %8, label %5
5: ; preds = %2
store i8 -2, i8* %0
%6 = getelementptr inbounds i8, i8* %0, i64 1
%7 = call i32 @memcpy(i8* %6, i32* %3, i32 4)
br label %8
8: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int main(void) {
  unsigned int x;
  while (x < 0x0fffffff) {
    x++;
  }
  __VERIFIER_assert(x > 0x0fffffff);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xfffffff,-0x8(%rbp)
jae    113a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111f <main+0xf>
cmpl   $0xfffffff,-0x8(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 268435455
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
%11 = icmp ugt i32 %10, 268435455
%12 = zext i1 %11 to i32
%13 = call i32 @__VERIFIER_assert(i32 %12)
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__VERIFIER_assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ VL_ScreenRect(int, int, int, int, int);
void VH_Plot(int x, int y, int colour) { VL_ScreenRect(x, y, 1, 1, colour); }


x86 assembly (clang, -O0):
<VH_Plot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%r8d
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <VL_ScreenRect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VH_Plot>:
mov    %edx,%r8d
mov    $0x1,%edx
mov    $0x1,%ecx
jmp    1030 <VL_ScreenRect@plt>

LLVM IR (-O0):
define void @VH_Plot(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @VL_ScreenRect(i32 %7, i32 %8, i32 1, i32 1, i32 %9)
ret void
}

LLVM IR (-O2):
define void @VH_Plot(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @VL_ScreenRect(i32 %0, i32 %1, i32 1, i32 1, i32 %2)
ret void
}
double floatsidf(int i) { return i; }


x86 assembly (clang, -O0):
<floatsidf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatsidf>:
cvtsi2sd %edi,%xmm0
ret

LLVM IR (-O0):
define double @floatsidf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
ret double %4
}

LLVM IR (-O2):
define double @floatsidf(i32 %0) {
%2 = sitofp i32 %0 to double
ret double %2
}
void string_byte_copy_func(char *src, char *dst) { *dst = *src; }


x86 assembly (clang, -O0):
<string_byte_copy_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_byte_copy_func>:
mov    (%rdi),%al
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @string_byte_copy_func(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = load i8*, i8** %4
store i8 %6, i8* %7
ret void
}

LLVM IR (-O2):
define void @string_byte_copy_func(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x0c() {
  Assert_real((isdigit(12) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              65, ("isdigit should be 0 for 0x0c"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x0c>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x41,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x0c>:
push   %rax
mov    $0xc,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x41,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x0c\00"
define void @t_isdigit_0x0c() {
%1 = call i64 @isdigit(i32 12)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x0c\00"
define void @t_isdigit_0x0c() {
%1 = tail call i64 @isdigit(i32 12)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool is_sync(const uint32_t *const rx_data) {
  if (*rx_data == 0x7cd215d8)
    return true;
  return false;
}


x86 assembly (clang, -O0):
<is_sync>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x7cd215d8,(%rax)
jne    1124 <is_sync+0x24>
movl   $0x1,-0x4(%rbp)
jmp    112b <is_sync+0x2b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_sync>:
xor    %eax,%eax
cmpl   $0x7cd215d8,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @is_sync(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 2094142936
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_sync(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 2094142936
%4 = zext i1 %3 to i32
ret i32 %4
}
int mem_mp_init() { return 0; }


x86 assembly (clang, -O0):
<mem_mp_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_mp_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mem_mp_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mem_mp_init() {
ret i32 0
}
__attribute__((always_)) void outb(unsigned char value, unsigned short port) {
  asm volatile("out"
               "b"
               " %"
               "b"
               "0,%"
               "w"
               "1"
               :
               : "a"(value), "Nd"(port));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%al
mov    -0x4(%rbp),%dx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%edx
mov    %edi,%eax
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @outb(i8 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "outb ${0:b},${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %0, i16 %1)
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ wurm_utf8_isalpha(scalar_t__);
int wurm_utf8_issymbol_initial(int32_t code) {
  return wurm_utf8_isalpha(code) || code == (int32_t)'_';
}


x86 assembly (clang, -O0):
<wurm_utf8_issymbol_initial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wurm_utf8_isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1142 <wurm_utf8_issymbol_initial+0x32>
cmpq   $0x5f,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wurm_utf8_issymbol_initial>:
push   %rbx
mov    %rdi,%rbx
call   1030 <wurm_utf8_isalpha@plt>
test   %rax,%rax
setne  %al
cmp    $0x5f,%rbx
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @wurm_utf8_issymbol_initial(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @wurm_utf8_isalpha(i64 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i64, i64* %2
%8 = icmp eq i64 %7, 95
br label %9
9: ; preds = %6, %1
%10 = phi i1 [ true, %1 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @wurm_utf8_issymbol_initial(i64 %0) {
%2 = tail call i64 @wurm_utf8_isalpha(i64 %0)
%3 = icmp ne i64 %2, 0
%4 = icmp eq i64 %0, 95
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int skip_line(FILE *file) {
  int temp = 0;
  while (1) {
    temp = fgetc(file);
    if (temp < 0)
      return -1;
    if (temp == (int)'\n')
      break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<skip_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1145 <skip_line+0x35>
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <skip_line+0x50>
cmpl   $0xa,-0x14(%rbp)
jne    1154 <skip_line+0x44>
jmp    1159 <skip_line+0x49>
jmp    1123 <skip_line+0x13>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_line>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <fgetc@plt>
test   %eax,%eax
js     1135 <skip_line+0x25>
cmp    $0xa,%eax
jne    1120 <skip_line+0x10>
xor    %eax,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @skip_line(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 0, i32* %4
br label %5
5: ; preds = %1, %15
%6 = load i32*, i32** %3
%7 = call i32 @fgetc(i32* %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5
store i32 -1, i32* %2
br label %17
11: ; preds = %5
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %15
14: ; preds = %11
br label %16
15: ; preds = %11
br label %5
16: ; preds = %14
store i32 0, i32* %2
br label %17
17: ; preds = %16, %10
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @skip_line(i32* nocapture %0) {
br label %2
2: ; preds = %5, %1
%3 = tail call i32 @fgetc(i32* %0)
%4 = icmp slt i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = icmp eq i32 %3, 10
br i1 %6, label %7, label %2
7: ; preds = %5, %2
%8 = phi i32 [ -1, %2 ], [ 0, %5 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int pthread_rwlock_tryrdlock(pthread_rwlock_t *lock) {}


x86 assembly (clang, -O0):
<pthread_rwlock_tryrdlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_rwlock_tryrdlock>:
ret

LLVM IR (-O0):
define i32 @pthread_rwlock_tryrdlock(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @pthread_rwlock_tryrdlock(i32* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
struct vec3 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec3_abs(float *, float *);
__attribute__((always_)) struct vec3 *psvec3_abs(struct vec3 *result,
                                                 struct vec3 *a) {
  vec3_abs((float *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec3_abs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec3_abs@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3_abs>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec3_abs@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec3 = type { i32 }
define %struct.vec3* @psvec3_abs(%struct.vec3* %0, %struct.vec3* %1) {
%3 = alloca %struct.vec3*
%4 = alloca %struct.vec3*
store %struct.vec3* %0, %struct.vec3** %3
store %struct.vec3* %1, %struct.vec3** %4
%5 = load %struct.vec3*, %struct.vec3** %3
%6 = bitcast %struct.vec3* %5 to float*
%7 = load %struct.vec3*, %struct.vec3** %4
%8 = bitcast %struct.vec3* %7 to float*
%9 = call i32 @vec3_abs(float* %6, float* %8)
%10 = load %struct.vec3*, %struct.vec3** %3
ret %struct.vec3* %10
}

LLVM IR (-O2):
%struct.vec3 = type { i32 }
define %struct.vec3* @psvec3_abs(%struct.vec3* returned %0, %struct.vec3* %1) {
%3 = bitcast %struct.vec3* %0 to float*
%4 = bitcast %struct.vec3* %1 to float*
%5 = tail call i32 @vec3_abs(float* %3, float* %4)
ret %struct.vec3* %0
}
/* Variables and functions */
int /*<<< orphan*/ ac_init_stat();
int /*<<< orphan*/ cs_accounts_chk();
int /*<<< orphan*/ init_srvid();
int /*<<< orphan*/ init_tierid();
void cs_reload_config(void) {
  cs_accounts_chk();
  init_srvid();
  init_tierid();
  ac_init_stat();
}


x86 assembly (clang, -O0):
<cs_reload_config>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <cs_accounts_chk@plt>
mov    $0x0,%al
call   1030 <init_srvid@plt>
mov    $0x0,%al
call   1050 <init_tierid@plt>
mov    $0x0,%al
call   1040 <ac_init_stat@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs_reload_config>:
push   %rax
xor    %eax,%eax
call   1060 <cs_accounts_chk@plt>
xor    %eax,%eax
call   1030 <init_srvid@plt>
xor    %eax,%eax
call   1050 <init_tierid@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <ac_init_stat@plt>

LLVM IR (-O0):
define void @cs_reload_config() {
%1 = call i32 (...) @cs_accounts_chk()
%2 = call i32 (...) @init_srvid()
%3 = call i32 (...) @init_tierid()
%4 = call i32 (...) @ac_init_stat()
ret void
}

LLVM IR (-O2):
define void @cs_reload_config() {
%1 = tail call i32 (...) @cs_accounts_chk()
%2 = tail call i32 (...) @init_srvid()
%3 = tail call i32 (...) @init_tierid()
%4 = tail call i32 (...) @ac_init_stat()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ convertDate(char const **);
int /*<<< orphan*/ printf(char *);
int main(int argc, const char *argv[]) {
  printf("------TRANSLATE DATE------\n");
  if (argc == 2) {
    convertDate(argv);
  } else {
    printf(
        "Usage: ./a.out 20/14/1985\nMust include 0's in single digit dates.\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1040 <printf@plt>
cmpl   $0x2,-0x8(%rbp)
jne    115a <main+0x3a>
mov    -0x10(%rbp),%rdi
call   1030 <convertDate@plt>
jmp    1166 <main+0x46>
lea    0xebb(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
cmp    $0x2,%ebp
jne    1143 <main+0x23>
mov    %rbx,%rdi
call   1040 <convertDate@plt>
jmp    114f <main+0x2f>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [28 x i8] c"------TRANSLATE DATE------\0A\00"
@.str.1 = [67 x i8] c"Usage: ./a.out 20/14/1985\0AMust include 0's in single digit dates.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = call i32 @convertDate(i8** %10)
br label %14
12: ; preds = %2
%13 = call i32 @printf(i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str.1, i64 0, i64 0))
br label %14
14: ; preds = %12, %9
ret i32 0
}

LLVM IR (-O2):
@str = [27 x i8] c"------TRANSLATE DATE------\00"
@str.2 = [66 x i8] c"Usage: ./a.out 20/14/1985\0AMust include 0's in single digit dates.\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
%4 = icmp eq i32 %0, 2
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @convertDate(i8** %1)
br label %9
7: ; preds = %2
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([66 x i8], [66 x i8]* @str.2, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret i32 0
}
/* Variables and functions */
int get_full_year_with_sed(char *, int);
int get_left_two_digits_of_current_year(int optional_current_year) {
  return get_full_year_with_sed("\\(..\\)\\(.*\\)/\\1", optional_current_year);
}


x86 assembly (clang, -O0):
<get_left_two_digits_of_current_year>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <get_full_year_with_sed@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_left_two_digits_of_current_year>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <get_full_year_with_sed@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"\\(..\\)\\(.*\\)/\\1\00"
define i32 @get_left_two_digits_of_current_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @get_full_year_with_sed(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [16 x i8] c"\\(..\\)\\(.*\\)/\\1\00"
define i32 @get_left_two_digits_of_current_year(i32 %0) {
%2 = tail call i32 @get_full_year_with_sed(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 %2
}
/* Variables and functions */
size_t ipsec_situation_size(void) { return 4; }


x86 assembly (clang, -O0):
<ipsec_situation_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipsec_situation_size>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @ipsec_situation_size() {
ret i64 4
}

LLVM IR (-O2):
define i64 @ipsec_situation_size() {
ret i64 4
}
/* Variables and functions */
double log(double);
float FreqToMel(float freq) { return 1127.0 * log(1.0 + (freq / 700.0)); }


x86 assembly (clang, -O0):
<FreqToMel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee2(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
addsd  %xmm1,%xmm0
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  0xeb2(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FreqToMel>:
push   %rax
cvtss2sd %xmm0,%xmm0
divsd  0xee3(%rip),%xmm0
addsd  0xee3(%rip),%xmm0
call   1030 <log@plt>
mulsd  0xede(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @FreqToMel(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fdiv double %4, 7.000000e+02
%6 = fadd double 1.000000e+00, %5
%7 = call double @log(double %6)
%8 = fmul double 1.127000e+03, %7
%9 = fptrunc double %8 to float
ret float %9
}

LLVM IR (-O2):
define float @FreqToMel(float %0) {
%2 = fpext float %0 to double
%3 = fdiv double %2, 7.000000e+02
%4 = fadd double %3, 1.000000e+00
%5 = tail call double @log(double %4)
%6 = fmul double %5, 1.127000e+03
%7 = fptrunc double %6 to float
ret float %7
}
int test_imm_87uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x87 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_87uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x87,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_87uint64_lowword_mem>:
testb  $0x87,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_87uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 135
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_87uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 135
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ redisplay();
int /*<<< orphan*/ tty_flush();
void rl_forced_update_display() {
  redisplay();
  tty_flush();
}


x86 assembly (clang, -O0):
<rl_forced_update_display>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <redisplay@plt>
mov    $0x0,%al
call   1040 <tty_flush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rl_forced_update_display>:
push   %rax
xor    %eax,%eax
call   1030 <redisplay@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <tty_flush@plt>

LLVM IR (-O0):
define void @rl_forced_update_display() {
%1 = call i32 (...) @redisplay()
%2 = call i32 (...) @tty_flush()
ret void
}

LLVM IR (-O2):
define void @rl_forced_update_display() {
%1 = tail call i32 (...) @redisplay()
%2 = tail call i32 (...) @tty_flush()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int);
int fputchar(int c) {
  putchar(c);
  return 0;
}


x86 assembly (clang, -O0):
<fputchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputchar>:
push   %rax
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fputchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @putchar(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @fputchar(i32 %0) {
%2 = tail call i32 @putchar(i32 %0)
ret i32 0
}
/* Variables and functions */
int cgc_strlen(char *);
int /*<<< orphan*/ strcpy(char *, char const *);
char *strcat(char *destination, const char *source) {
  strcpy(destination + cgc_strlen(destination), source);
  return destination;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <cgc_strlen@plt>
mov    -0x18(%rbp),%rdi
cltq
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <cgc_strlen@plt>
movslq %eax,%rdi
add    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @cgc_strlen(i8* %6)
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8*, i8** %4
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* %1) {
%3 = tail call i32 @cgc_strlen(i8* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = tail call i32 @strcpy(i8* %5, i8* %1)
ret i8* %0
}
/* Type definitions */
typedef int uint8_t;
typedef int const uint32_t;

/* Variables and functions */
uint32_t __get_unaligned_be32(const uint8_t *p) {
  return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
}


x86 assembly (clang, -O0):
<__get_unaligned_be32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_unaligned_be32>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @__get_unaligned_be32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @__get_unaligned_be32(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
/* Type definitions */
struct tagStorm {
  int dummy;
};
struct hash {
  int dummy;
};

/* Variables and functions */
struct hash *tagStormIndexExtended(struct tagStorm *, char *, int, int);
struct hash *tagStormUniqueIndex(struct tagStorm *tagStorm, char *tag) {
  return tagStormIndexExtended(tagStorm, tag, 1, 1);
}


x86 assembly (clang, -O0):
<tagStormUniqueIndex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <tagStormIndexExtended@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tagStormUniqueIndex>:
mov    $0x1,%edx
mov    $0x1,%ecx
jmp    1030 <tagStormIndexExtended@plt>

LLVM IR (-O0):
%struct.hash = type { i32 }
%struct.tagStorm = type { i32 }
define %struct.hash* @tagStormUniqueIndex(%struct.tagStorm* %0, i8* %1) {
%3 = alloca %struct.tagStorm*
%4 = alloca i8*
store %struct.tagStorm* %0, %struct.tagStorm** %3
store i8* %1, i8** %4
%5 = load %struct.tagStorm*, %struct.tagStorm** %3
%6 = load i8*, i8** %4
%7 = call %struct.hash* @tagStormIndexExtended(%struct.tagStorm* %5, i8* %6, i32 1, i32 1)
ret %struct.hash* %7
}

LLVM IR (-O2):
%struct.hash = type { i32 }
%struct.tagStorm = type { i32 }
define %struct.hash* @tagStormUniqueIndex(%struct.tagStorm* %0, i8* %1) {
%3 = tail call %struct.hash* @tagStormIndexExtended(%struct.tagStorm* %0, i8* %1, i32 1, i32 1)
ret %struct.hash* %3
}
/* Variables and functions */
char *getenv(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  char *server_name = getenv("SERVER_NAME");
  if (server_name == NULL) {
    server_name = "server.lavenliu.com";
  }
  printf("accessing server %s\n", server_name);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115c <main+0x3c>
lea    0xeb4(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
lea    0xed5(%rip),%rsi
cmovne %rax,%rsi
lea    0xede(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"SERVER_NAME\00"
@.str.1 = [20 x i8] c"server.lavenliu.com\00"
@.str.2 = [21 x i8] c"accessing server %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i8* @getenv(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i8* %7, i8** %6
%8 = load i8*, i8** %6
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %11
10: ; preds = %2
store i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i8** %6
br label %11
11: ; preds = %10, %2
%12 = load i8*, i8** %6
%13 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.2, i64 0, i64 0), i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"SERVER_NAME\00"
@.str.1 = [20 x i8] c"server.lavenliu.com\00"
@.str.2 = [21 x i8] c"accessing server %s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* @getenv(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i8* %3, null
%5 = select i1 %4, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i8* %3
%6 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.2, i64 0, i64 0), i8* %5)
ret i32 0
}
/* Variables and functions */
scalar_t__ COND_GE();
int /*<<< orphan*/ EA_AY_PI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_sge_8_pi(void) {
  m68ki_write_8(EA_AY_PI_8(), COND_GE() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_sge_8_pi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_AY_PI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_GE@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_sge_8_pi>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_AY_PI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_GE@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_sge_8_pi() {
%1 = call i32 (...) @EA_AY_PI_8()
%2 = call i64 (...) @COND_GE()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_sge_8_pi() {
%1 = tail call i32 (...) @EA_AY_PI_8()
%2 = tail call i64 (...) @COND_GE()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
int toupper(int val) {
  if (val >= 'a' && val <= 'z')
    return val - ('a' - 'A');
  return val;
}


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1129 <toupper+0x29>
cmpl   $0x7a,-0x8(%rbp)
jg     1129 <toupper+0x29>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <toupper+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ testAccess();
int /*<<< orphan*/ test_sys_state();
int /*<<< orphan*/ testpipe();
void test_file_suit() {
  testpipe();
  test_sys_state();
  testAccess();
}


x86 assembly (clang, -O0):
<test_file_suit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <testpipe@plt>
mov    $0x0,%al
call   1040 <test_sys_state@plt>
mov    $0x0,%al
call   1050 <testAccess@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_file_suit>:
push   %rax
xor    %eax,%eax
call   1030 <testpipe@plt>
xor    %eax,%eax
call   1040 <test_sys_state@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <testAccess@plt>

LLVM IR (-O0):
define void @test_file_suit() {
%1 = call i32 (...) @testpipe()
%2 = call i32 (...) @test_sys_state()
%3 = call i32 (...) @testAccess()
ret void
}

LLVM IR (-O2):
define void @test_file_suit() {
%1 = tail call i32 (...) @testpipe()
%2 = tail call i32 (...) @test_sys_state()
%3 = tail call i32 (...) @testAccess()
ret void
}
void SPIM_SaveConfig(void) {}


x86 assembly (clang, -O0):
<SPIM_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIM_SaveConfig>:
ret

LLVM IR (-O0):
define void @SPIM_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @SPIM_SaveConfig() {
ret void
}