xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ add_exported_option_do(char *, char *, int,
                                          int /*<<< orphan*/);
void add_exported_option(char *key, char *value, int configured) {
  add_exported_option_do(key, value, configured, 0);
}


x86 assembly (clang, -O0):
<add_exported_option>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <add_exported_option_do@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_exported_option>:
xor    %ecx,%ecx
jmp    1030 <add_exported_option_do@plt>

LLVM IR (-O0):
define void @add_exported_option(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @add_exported_option_do(i8* %7, i8* %8, i32 %9, i32 0)
ret void
}

LLVM IR (-O2):
define void @add_exported_option(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @add_exported_option_do(i8* %0, i8* %1, i32 %2, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ generatekey(char const *, char const *);
int /*<<< orphan*/ isFileExists(char const *);
int memcmp(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ serialread(char const *);
int validatekey(const char *KEY_FILE, const char *KEY_SOURCE,
                const char *KEY_DATA) {
  if (!isFileExists(KEY_FILE))
    return -1;
  return memcmp(serialread(KEY_FILE), generatekey(KEY_SOURCE, KEY_DATA), 64);
}


x86 assembly (clang, -O0):
<validatekey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1060 <isFileExists@plt>
cmp    $0x0,%eax
jne    1172 <validatekey+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    119d <validatekey+0x5d>
mov    -0x10(%rbp),%rdi
call   1050 <serialread@plt>
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <generatekey@plt>
mov    -0x24(%rbp),%edi
mov    %eax,%esi
mov    $0x40,%edx
call   1030 <memcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validatekey>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1060 <isFileExists@plt>
test   %eax,%eax
je     117f <validatekey+0x3f>
mov    %rbx,%rdi
call   1050 <serialread@plt>
mov    %eax,%ebx
mov    %r15,%rdi
mov    %r14,%rsi
call   1040 <generatekey@plt>
mov    %ebx,%edi
mov    %eax,%esi
mov    $0x40,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <memcmp@plt>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @validatekey(i8* %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i8*, i8** %5
%9 = call i32 @isFileExists(i8* %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %3
store i32 -1, i32* %4
br label %19
12: ; preds = %3
%13 = load i8*, i8** %5
%14 = call i32 @serialread(i8* %13)
%15 = load i8*, i8** %6
%16 = load i8*, i8** %7
%17 = call i32 @generatekey(i8* %15, i8* %16)
%18 = call i32 @memcmp(i32 %14, i32 %17, i32 64)
store i32 %18, i32* %4
br label %19
19: ; preds = %12, %11
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @validatekey(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @isFileExists(i8* %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = tail call i32 @serialread(i8* %0)
%8 = tail call i32 @generatekey(i8* %1, i8* %2)
%9 = tail call i32 @memcmp(i32 %7, i32 %8, i32 64)
br label %10
10: ; preds = %3, %6
%11 = phi i32 [ %9, %6 ], [ -1, %3 ]
ret i32 %11
}
int fibN(int n) {
  if (n <= 2)
    return 1;
  return fibN(n - 1) + fibN(n - 2);
}


x86 assembly (clang, -O0):
<fibN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     1131 <fibN+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fibN+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibN@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibN@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibN>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fibN+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fibN@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x4,%ebx
ja     1130 <fibN+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibN(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fibN(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fibN(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fibN(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibN(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
scalar_t__ atof(char *);
char *compnu(char *px, char *py) {
  if (atof(px) > atof(py))
    return py;
  else
    return px;
}


x86 assembly (clang, -O0):
<compnu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <atof@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <atof@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
jle    1153 <compnu+0x43>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115b <compnu+0x4b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compnu>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <atof@plt>
mov    %rax,%r15
mov    %r14,%rdi
call   1030 <atof@plt>
cmp    %rax,%r15
cmovg  %r14,%rbx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @compnu(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = call i64 @atof(i8* %6)
%8 = load i8*, i8** %5
%9 = call i64 @atof(i8* %8)
%10 = icmp sgt i64 %7, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i8*, i8** %5
store i8* %12, i8** %3
br label %15
13: ; preds = %2
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %15
15: ; preds = %13, %11
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @compnu(i8* %0, i8* %1) {
%3 = tail call i64 @atof(i8* %0)
%4 = tail call i64 @atof(i8* %1)
%5 = icmp sgt i64 %3, %4
%6 = select i1 %5, i8* %1, i8* %0
ret i8* %6
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int hea_test_u64_bit(int /*<<< orphan*/ const, int);
int hea_cq_aer_eq_par_id_invalid_err_check(const __u64 *aer) {
  return hea_test_u64_bit(*aer, 9);
}


x86 assembly (clang, -O0):
<hea_cq_aer_eq_par_id_invalid_err_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    $0x9,%esi
call   1030 <hea_test_u64_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hea_cq_aer_eq_par_id_invalid_err_check>:
mov    (%rdi),%edi
mov    $0x9,%esi
jmp    1030 <hea_test_u64_bit@plt>

LLVM IR (-O0):
define i32 @hea_cq_aer_eq_par_id_invalid_err_check(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @hea_test_u64_bit(i32 %4, i32 9)
ret i32 %5
}

LLVM IR (-O2):
define i32 @hea_cq_aer_eq_par_id_invalid_err_check(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @hea_test_u64_bit(i32 %2, i32 9)
ret i32 %3
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_26(uint64_t x) {
  __asm__("rolq $26, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_26>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x1a,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_26>:
mov    %rdi,%rax
rol    $0x1a,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_26(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$26, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_26(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$26, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Type definitions */
struct cycle {
  int dummy;
};

/* Variables and functions */
int free_object(int, short *);
int free_cycle(struct cycle *cyc) { return free_object(13, (short *)cyc); }


x86 assembly (clang, -O0):
<free_cycle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xd,%edi
call   1030 <free_object@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_cycle>:
mov    %rdi,%rsi
mov    $0xd,%edi
jmp    1030 <free_object@plt>

LLVM IR (-O0):
%struct.cycle = type { i32 }
define i32 @free_cycle(%struct.cycle* %0) {
%2 = alloca %struct.cycle*
store %struct.cycle* %0, %struct.cycle** %2
%3 = load %struct.cycle*, %struct.cycle** %2
%4 = bitcast %struct.cycle* %3 to i16*
%5 = call i32 @free_object(i32 13, i16* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.cycle = type { i32 }
define i32 @free_cycle(%struct.cycle* %0) {
%2 = bitcast %struct.cycle* %0 to i16*
%3 = tail call i32 @free_object(i32 13, i16* %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ glFlush();
void Flush(void) { glFlush(); }


x86 assembly (clang, -O0):
<Flush>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Flush>:
xor    %eax,%eax
jmp    1030 <glFlush@plt>

LLVM IR (-O0):
define void @Flush() {
%1 = call i32 (...) @glFlush()
ret void
}

LLVM IR (-O2):
define void @Flush() {
%1 = tail call i32 (...) @glFlush()
ret void
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
void _timespec_zero(struct timespec *ts) {
  ts->tv_sec = 0;
  ts->tv_nsec = 0;
}


x86 assembly (clang, -O0):
<_timespec_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,0x8(%rax)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_timespec_zero>:
xorps  %xmm0,%xmm0
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define void @_timespec_zero(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 0, i64* %4
%5 = load %struct.timespec*, %struct.timespec** %2
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
store i64 0, i64* %6
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define void @_timespec_zero(%struct.timespec* nocapture writeonly %0) {
%2 = bitcast %struct.timespec* %0 to i8*
ret void
}
/* Variables and functions */
int check_for_async(char *arg) {
  if (arg != NULL) {
    if (arg[0] == '&')
      return 1;
    else
      return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<check_for_async>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113b <check_for_async+0x3b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x26,%eax
jne    112f <check_for_async+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1142 <check_for_async+0x42>
movl   $0xffffffff,-0x4(%rbp)
jmp    1142 <check_for_async+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_for_async>:
test   %rdi,%rdi
je     1113 <check_for_async+0x13>
xor    %eax,%eax
cmpb   $0x26,(%rdi)
sete   %al
add    %eax,%eax
add    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_for_async(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 38
br i1 %11, label %12, label %13
12: ; preds = %6
store i32 1, i32* %2
br label %15
13: ; preds = %6
store i32 -1, i32* %2
br label %15
14: ; preds = %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %13, %12
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @check_for_async(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 38
%6 = select i1 %5, i32 1, i32 -1
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
int gt(int x) { return x > 0; }


x86 assembly (clang, -O0):
<gt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt>:
xor    %eax,%eax
test   %edi,%edi
setg   %al
ret

LLVM IR (-O0):
define i32 @gt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @gt(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ audio_ic_set_recdgain();
int /*<<< orphan*/ menu_numeric_toggle(void *, int, int /*<<< orphan*/, int);
void audio_recdgain_toggle(void *priv, int delta) {
  menu_numeric_toggle(priv, -2 * delta, 0, 126);
  audio_ic_set_recdgain();
}


x86 assembly (clang, -O0):
<audio_recdgain_toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
imul   $0xfffffffe,-0xc(%rbp),%esi
xor    %edx,%edx
mov    $0x7e,%ecx
call   1030 <menu_numeric_toggle@plt>
mov    $0x0,%al
call   1040 <audio_ic_set_recdgain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<audio_recdgain_toggle>:
push   %rax
add    %esi,%esi
neg    %esi
xor    %edx,%edx
mov    $0x7e,%ecx
call   1030 <menu_numeric_toggle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <audio_ic_set_recdgain@plt>

LLVM IR (-O0):
define void @audio_recdgain_toggle(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = mul nsw i32 -2, %6
%8 = call i32 @menu_numeric_toggle(i8* %5, i32 %7, i32 0, i32 126)
%9 = call i32 (...) @audio_ic_set_recdgain()
ret void
}

LLVM IR (-O2):
define void @audio_recdgain_toggle(i8* %0, i32 %1) {
%3 = mul nsw i32 %1, -2
%4 = tail call i32 @menu_numeric_toggle(i8* %0, i32 %3, i32 0, i32 126)
%5 = tail call i32 (...) @audio_ic_set_recdgain()
ret void
}
/* Variables and functions */
int rand();
int rand_sort(const void *a, const void *b) { return (rand() % 2); }


x86 assembly (clang, -O0):
<rand_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_sort>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rand_sort(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 (...) @rand()
%6 = srem i32 %5, 2
ret i32 %6
}

LLVM IR (-O2):
define i32 @rand_sort(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, 2
ret i32 %4
}
int MySoftwareModule(int myInput) { return (myInput); }


x86 assembly (clang, -O0):
<MySoftwareModule>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MySoftwareModule>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @MySoftwareModule(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @MySoftwareModule(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int is_little_endian();
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  int little_endian;
  little_endian = is_little_endian();
  printf("%s little endian!\n", little_endian ? "is" : "isn't");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <is_little_endian@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
lea    0xecc(%rip),%rsi
lea    0xec2(%rip),%rax
cmp    $0x0,%ecx
cmovne %rax,%rsi
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <is_little_endian@plt>
test   %eax,%eax
lea    0xee5(%rip),%rax
lea    0xedb(%rip),%rsi
cmove  %rax,%rsi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"%s little endian!\0A\00"
@.str.1 = [3 x i8] c"is\00"
@.str.2 = [6 x i8] c"isn't\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @is_little_endian()
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%12 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"%s little endian!\0A\00"
@.str.1 = [3 x i8] c"is\00"
@.str.2 = [6 x i8] c"isn't\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @is_little_endian()
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ putchar(int);
int main() {
  int c;
  while ((c = getchar()) != EOF)
    putchar(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2ea8(%rip),%rcx
cmp    (%rcx),%eax
je     1155 <main+0x35>
mov    -0x8(%rbp),%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rbx
cmp    (%rbx),%eax
je     1152 <main+0x32>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%eax
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = call i32 (...) @getchar()
store i32 %4, i32* %2
%5 = load i32, i32* @EOF
%6 = icmp ne i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, i32* %2
%9 = call i32 @putchar(i32 %8)
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %10, label %4
4: ; preds = %0, %4
%5 = phi i32 [ %7, %4 ], [ %1, %0 ]
%6 = tail call i32 @putchar(i32 %5)
%7 = tail call i32 (...) @getchar()
%8 = load i32, i32* @EOF
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %4
10: ; preds = %4, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_isles(int, int);
void test_unknown_builtin(int a, int b) { __builtin_isles(a, b); }


x86 assembly (clang, -O0):
<test_unknown_builtin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__builtin_isles@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_unknown_builtin>:
jmp    1030 <__builtin_isles@plt>

LLVM IR (-O0):
define void @test_unknown_builtin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__builtin_isles(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @test_unknown_builtin(i32 %0, i32 %1) {
%3 = tail call i32 @__builtin_isles(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hang_forever();
void panic_finish(void) { hang_forever(); }


x86 assembly (clang, -O0):
<panic_finish>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hang_forever@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<panic_finish>:
xor    %eax,%eax
jmp    1030 <hang_forever@plt>

LLVM IR (-O0):
define void @panic_finish() {
%1 = call i32 (...) @hang_forever()
ret void
}

LLVM IR (-O2):
define void @panic_finish() {
%1 = tail call i32 (...) @hang_forever()
ret void
}
void kexec_early_calculations(void) {}


x86 assembly (clang, -O0):
<kexec_early_calculations>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kexec_early_calculations>:
ret

LLVM IR (-O0):
define void @kexec_early_calculations() {
ret void
}

LLVM IR (-O2):
define void @kexec_early_calculations() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
int /*<<< orphan*/ print_debug(char *);
int /*<<< orphan*/ print_debug_hex32(unsigned int);
void test(void) {
  unsigned char i;
  for (i = 127; i != 5; i++) {
    print_debug("i: ");
    print_debug_hex32((unsigned)i);
    print_debug("\n");
  }
  _exit(0);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x7f,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x5,%eax
je     1177 <test+0x47>
lea    0xeb0(%rip),%rdi
call   1050 <print_debug@plt>
movzbl -0x1(%rbp),%edi
call   1040 <print_debug_hex32@plt>
lea    0xe9f(%rip),%rdi
call   1050 <print_debug@plt>
mov    -0x1(%rbp),%al
add    $0x1,%al
mov    %al,-0x1(%rbp)
jmp    113c <test+0xc>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<test>:
push   %r15
push   %r14
push   %rbx
mov    $0x7f,%bl
lea    0xec2(%rip),%r14
lea    0xebf(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
nop
movzbl %bl,%ebx
mov    %r14,%rdi
call   1050 <print_debug@plt>
mov    %ebx,%edi
call   1040 <print_debug_hex32@plt>
mov    %r15,%rdi
call   1050 <print_debug@plt>
add    $0x1,%bl
cmp    $0x5,%bl
jne    1150 <test+0x20>
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"i: \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @test() {
%1 = alloca i8
store i8 127, i8* %1
br label %2
2: ; preds = %12, %0
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = icmp ne i32 %4, 5
br i1 %5, label %6, label %15
6: ; preds = %2
%7 = call i32 @print_debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%8 = load i8, i8* %1
%9 = zext i8 %8 to i32
%10 = call i32 @print_debug_hex32(i32 %9)
%11 = call i32 @print_debug(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %12
12: ; preds = %6
%13 = load i8, i8* %1
%14 = add i8 %13, 1
store i8 %14, i8* %1
br label %2
15: ; preds = %2
%16 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"i: \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @test() {
br label %1
1: ; preds = %0, %1
%2 = phi i8 [ 127, %0 ], [ %7, %1 ]
%3 = zext i8 %2 to i32
%4 = tail call i32 @print_debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @print_debug_hex32(i32 %3)
%6 = tail call i32 @print_debug(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%7 = add i8 %2, 1
%8 = icmp eq i8 %7, 5
br i1 %8, label %9, label %1
9: ; preds = %1
%10 = tail call i32 @_exit(i32 0)
unreachable
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t not_xlow_1(uint64_t u) { return -u | ~u; }


x86 assembly (clang, -O0):
<not_xlow_1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<not_xlow_1>:
mov    %edi,%eax
neg    %eax
not    %edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @not_xlow_1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
%5 = load i32, i32* %2
%6 = xor i32 %5, -1
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @not_xlow_1(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = xor i32 %0, -1
%4 = or i32 %2, %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint_least32_t;

/* Variables and functions */
size_t fmt_uint32_base(char *, int /*<<< orphan*/, int);
size_t fmt_uint32(char *ptr, uint_least32_t val) {
  return fmt_uint32_base(ptr, val, 10);
}


x86 assembly (clang, -O0):
<fmt_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0xa,%edx
call   1030 <fmt_uint32_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_uint32>:
mov    $0xa,%edx
jmp    1030 <fmt_uint32_base@plt>

LLVM IR (-O0):
define i64 @fmt_uint32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @fmt_uint32_base(i8* %5, i32 %6, i32 10)
ret i64 %7
}

LLVM IR (-O2):
define i64 @fmt_uint32(i8* %0, i32 %1) {
%3 = tail call i64 @fmt_uint32_base(i8* %0, i32 %1, i32 10)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ A_BOLD;
int /*<<< orphan*/ attroff(int /*<<< orphan*/);
void attribute_off_bold_c() { attroff(A_BOLD); }


x86 assembly (clang, -O0):
<attribute_off_bold_c>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <attroff@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<attribute_off_bold_c>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <attroff@plt>

LLVM IR (-O0):
@A_BOLD = global i32 0
define void @attribute_off_bold_c() {
%1 = load i32, i32* @A_BOLD
%2 = call i32 @attroff(i32 %1)
ret void
}

LLVM IR (-O2):
@A_BOLD = global i32 0
define void @attribute_off_bold_c() {
%1 = load i32, i32* @A_BOLD
%2 = tail call i32 @attroff(i32 %1)
ret void
}
char **check_pptr_MAIL_SERVERchar(char **v) { return v; }


x86 assembly (clang, -O0):
<check_pptr_MAIL_SERVERchar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_pptr_MAIL_SERVERchar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8** @check_pptr_MAIL_SERVERchar(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
ret i8** %3
}

LLVM IR (-O2):
define i8** @check_pptr_MAIL_SERVERchar(i8** readnone returned %0) {
ret i8** %0
}
long labs(long n) { return n >= 0 ? n : -n; }


x86 assembly (clang, -O0):
<labs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jl     1120 <labs+0x20>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <labs+0x2a>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<labs>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @labs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sge i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i64, i64* %2
br label %10
7: ; preds = %1
%8 = load i64, i64* %2
%9 = sub nsw i64 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i64 [ %6, %5 ], [ %9, %7 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @labs(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
void SwapValue(int a[], int i, int j) {
  int temp;
  temp = a[i];
  a[i] = a[j];
  a[j] = temp;
}


x86 assembly (clang, -O0):
<SwapValue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwapValue>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @SwapValue(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @SwapValue(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ spi_write(int, char);
void pfio_write_output(char value) { spi_write(0x12, value); }


x86 assembly (clang, -O0):
<pfio_write_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x12,%edi
movsbl -0x1(%rbp),%esi
call   1030 <spi_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfio_write_output>:
mov    %edi,%esi
mov    $0x12,%edi
jmp    1030 <spi_write@plt>

LLVM IR (-O0):
define void @pfio_write_output(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @spi_write(i32 18, i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @pfio_write_output(i8 signext %0) {
%2 = tail call i32 @spi_write(i32 18, i8 signext %0)
ret void
}
char *Find_default_var_value(void *v) { return (0); }


x86 assembly (clang, -O0):
<Find_default_var_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Find_default_var_value>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @Find_default_var_value(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @Find_default_var_value(i8* nocapture readnone %0) {
ret i8* null
}
int ubi_dbg_is_erase_failure(void) { return 0; }


x86 assembly (clang, -O0):
<ubi_dbg_is_erase_failure>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ubi_dbg_is_erase_failure>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ubi_dbg_is_erase_failure() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ubi_dbg_is_erase_failure() {
ret i32 0
}
unsigned revnum(unsigned n) {
  unsigned rev = 0;
  do
    rev = rev * 10 + n % 10;
  while (n /= 10);
  return rev;
}


x86 assembly (clang, -O0):
<revnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jne    110e <revnum+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<revnum>:
xor    %eax,%eax
mov    $0xcccccccd,%r8d
nopl   0x0(%rax,%rax,1)
lea    (%rax,%rax,4),%eax
mov    %edi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%esi
lea    (%rsi,%rsi,4),%esi
mov    %edi,%ecx
sub    %esi,%ecx
lea    (%rcx,%rax,2),%eax
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <revnum+0x10>
ret

LLVM IR (-O0):
define i32 @revnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = mul i32 %5, 10
%7 = load i32, i32* %2
%8 = urem i32 %7, 10
%9 = add i32 %6, %8
store i32 %9, i32* %3
br label %10
10: ; preds = %4
%11 = load i32, i32* %2
%12 = udiv i32 %11, 10
store i32 %12, i32* %2
%13 = icmp ne i32 %12, 0
br i1 %13, label %4, label %14
14: ; preds = %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @revnum(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %8, %2 ]
%4 = phi i32 [ 0, %1 ], [ %7, %2 ]
%5 = mul i32 %4, 10
%6 = urem i32 %3, 10
%7 = add i32 %5, %6
%8 = udiv i32 %3, 10
%9 = icmp ult i32 %3, 10
br i1 %9, label %10, label %2
10: ; preds = %2
ret i32 %7
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int /*<<< orphan*/ bubble(int *, int);
int main() {
  int *a;
  int n = __VERIFIER_nondet_int();
  bubble(a, n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <bubble@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,%esi
call   1030 <bubble@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %3
%5 = load i32*, i32** %2
%6 = load i32, i32* %3
%7 = call i32 @bubble(i32* %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 @bubble(i32* undef, i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_mutex_lock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
void *lockunlock(void *mut) {
  size_t i;
  for (i = 0; i < 1000000; i++) {
    pthread_mutex_lock((pthread_mutex_t *)mut);
    pthread_mutex_unlock((pthread_mutex_t *)mut);
  }
  return 0;
}


x86 assembly (clang, -O0):
<lockunlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0xf4240,-0x10(%rbp)
jae    1165 <lockunlock+0x45>
mov    -0x8(%rbp),%rdi
call   1040 <pthread_mutex_lock@plt>
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_unlock@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1134 <lockunlock+0x14>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lockunlock>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0xf4240,%ebx
nopl   0x0(%rax)
mov    %r14,%rdi
call   1040 <pthread_mutex_lock@plt>
mov    %r14,%rdi
call   1030 <pthread_mutex_unlock@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <lockunlock+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @lockunlock(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %14, %1
%5 = load i64, i64* %3
%6 = icmp ult i64 %5, 1000000
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @pthread_mutex_lock(i32* %9)
%11 = load i8*, i8** %2
%12 = bitcast i8* %11 to i32*
%13 = call i32 @pthread_mutex_unlock(i32* %12)
br label %14
14: ; preds = %7
%15 = load i64, i64* %3
%16 = add i64 %15, 1
store i64 %16, i64* %3
br label %4
17: ; preds = %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @lockunlock(i8* %0) {
%2 = bitcast i8* %0 to i32*
br label %3
3: ; preds = %1, %3
%4 = phi i64 [ 0, %1 ], [ %7, %3 ]
%5 = tail call i32 @pthread_mutex_lock(i32* %2)
%6 = tail call i32 @pthread_mutex_unlock(i32* %2)
%7 = add nuw nsw i64 %4, 1
%8 = icmp eq i64 %7, 1000000
br i1 %8, label %9, label %3
9: ; preds = %3
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print(char *str) {
  printf("test.c print(char *str)\n");
  printf("%s\n", str);
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xee4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"test.c print(char *str)\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"test.c print(char *str)\00"
define void @print(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret void
}
/* Type definitions */
struct channel {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ channel_write_msg(struct channel *, char const *,
                                     char const *);
void channel_new_message(struct channel *chan, const char *user,
                         const char *line) {
  do {
    ;
  } while (0);
  do {
    ;
  } while (0);
  do {
    ;
  } while (0);
  channel_write_msg(chan, user, line);
}


x86 assembly (clang, -O0):
<channel_new_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
jmp    1129 <channel_new_message+0x19>
jmp    112e <channel_new_message+0x1e>
jmp    1133 <channel_new_message+0x23>
jmp    1138 <channel_new_message+0x28>
jmp    113d <channel_new_message+0x2d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <channel_write_msg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<channel_new_message>:
jmp    1030 <channel_write_msg@plt>

LLVM IR (-O0):
%struct.channel = type { i32 }
define void @channel_new_message(%struct.channel* %0, i8* %1, i8* %2) {
%4 = alloca %struct.channel*
%5 = alloca i8*
%6 = alloca i8*
store %struct.channel* %0, %struct.channel** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
br label %7
7: ; preds = %3
br label %8
8: ; preds = %7
br label %9
9: ; preds = %8
br label %10
10: ; preds = %9
br label %11
11: ; preds = %10
br label %12
12: ; preds = %11
%13 = load %struct.channel*, %struct.channel** %4
%14 = load i8*, i8** %5
%15 = load i8*, i8** %6
%16 = call i32 @channel_write_msg(%struct.channel* %13, i8* %14, i8* %15)
ret void
}

LLVM IR (-O2):
%struct.channel = type { i32 }
define void @channel_new_message(%struct.channel* %0, i8* %1, i8* %2) {
%4 = tail call i32 @channel_write_msg(%struct.channel* %0, i8* %1, i8* %2)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t cp_Construct(uint8_t color, uint8_t piece) {
  color <<= 4;
  color |= piece;
  return color;
}


x86 assembly (clang, -O0):
<cp_Construct>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cp_Construct>:
mov    %edi,%eax
shl    $0x4,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @cp_Construct(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 4
store i32 %6, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = or i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @cp_Construct(i32 %0, i32 %1) {
%3 = shl i32 %0, 4
%4 = or i32 %3, %1
ret i32 %4
}
int execv(name, args)
char *name;
char **args;
{
  extern char **environ;
  return execve(name, args, environ);
}


x86 assembly (clang, -O0):
<execv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb9(%rip),%rax
mov    (%rax),%rdx
mov    $0x0,%al
call   1030 <execve@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execv>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%rdx
xor    %eax,%eax
jmp    1030 <execve@plt>

LLVM IR (-O0):
@environ = external global i8**
define i32 @execv(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = load i8**, i8*** @environ
%8 = call i32 (i8*, i8**, i8**, ...) bitcast (i32 (...)* @execve to i32 (i8*, i8**, i8**, ...)*)(i8* %5, i8** %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
@environ = external global i8**
define i32 @execv(i8* %0, i8** %1) {
%3 = load i8**, i8*** @environ
%4 = tail call i32 (i8*, i8**, i8**, ...) bitcast (i32 (...)* @execve to i32 (i8*, i8**, i8**, ...)*)(i8* %0, i8** %1, i8** %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int input_timeout(int /*<<< orphan*/, int);
int /*<<< orphan*/ stderr;
int main(void) {
  fprintf(stderr, "select returned %d.\n", input_timeout(STDIN_FILENO, 5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    $0x5,%esi
call   1040 <input_timeout@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%edx
lea    0xea6(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2eb8(%rip),%rax
mov    (%rax),%ebx
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
mov    $0x5,%esi
call   1040 <input_timeout@plt>
lea    0xebc(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"select returned %d.\0A\00"
@STDIN_FILENO = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stderr
%3 = load i32, i32* @STDIN_FILENO
%4 = call i32 @input_timeout(i32 %3, i32 5)
%5 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"select returned %d.\0A\00"
@STDIN_FILENO = global i32 0
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = load i32, i32* @STDIN_FILENO
%3 = tail call i32 @input_timeout(i32 %2, i32 5)
%4 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
int test_imm_98int16_mem(short *val) {
  return ((*val) & (-0x98 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_98int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_98int16_mem>:
movzwl (%rdi),%eax
test   $0xff68,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_98int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -152
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_98int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -152
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned int instr_util_ustuffs16(int val1, int val2) {
  unsigned int retval;
  retval = (unsigned int)((val1 << 16) & 0xffff0000);
  retval |= (unsigned int)(val2 & 0xffff);
  return retval;
}


x86 assembly (clang, -O0):
<instr_util_ustuffs16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
and    $0xffff0000,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffff,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<instr_util_ustuffs16>:
shl    $0x10,%edi
movzwl %si,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @instr_util_ustuffs16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = shl i32 %6, 16
%8 = and i32 %7, -65536
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = and i32 %9, 65535
%11 = load i32, i32* %5
%12 = or i32 %11, %10
store i32 %12, i32* %5
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @instr_util_ustuffs16(i32 %0, i32 %1) {
%3 = shl i32 %0, 16
%4 = and i32 %1, 65535
%5 = or i32 %4, %3
ret i32 %5
}
/* Variables and functions */
void *memcpy(int *, int const *, size_t);
void *memcpy_caller_casting(int *dst, const int *src, size_t n) {
  return memcpy(dst, src, n);
}


x86 assembly (clang, -O0):
<memcpy_caller_casting>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_caller_casting>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define i8* @memcpy_caller_casting(i32* %0, i32* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i64, i64* %6
%10 = call i8* @memcpy(i32* %7, i32* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @memcpy_caller_casting(i32* %0, i32* %1, i64 %2) {
%4 = tail call i8* @memcpy(i32* %0, i32* %1, i64 %2)
ret i8* %4
}
void INT_Excep_PERIB_INTB175(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB175>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB175>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB175() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB175() {
ret void
}
int do_401() { return 401; }


x86 assembly (clang, -O0):
<do_401>:
push   %rbp
mov    %rsp,%rbp
mov    $0x191,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_401>:
mov    $0x191,%eax
ret

LLVM IR (-O0):
define i32 @do_401() {
ret i32 401
}

LLVM IR (-O2):
define i32 @do_401() {
ret i32 401
}