int cvt_flip(int type, int flip) {
  if (flip == 0)
    return type;
  switch (type) {
  case 7:
    return 10;
  case 8:
    return 11;
  case 9:
    return 12;
  case 15:
    return 16;
  case 26:
    return 25;
  case 29:
    return 28;
  case 32:
    return 31;
  case 44:
    return 43;
  case 10:
    return 7;
  case 11:
    return 8;
  case 12:
    return 9;
  case 16:
    return 15;
  case 25:
    return 26;
  case 28:
    return 29;
  case 31:
    return 32;
  case 43:
    return 44;
  case 34:
    return 35;
  case 35:
    return 34;
  case 37:
    return 38;
  case 38:
    return 37;
  default:
    return type;
  }
}


x86 assembly (clang, -O0):
<cvt_flip>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    111f <cvt_flip+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
mov    -0x8(%rbp),%eax
add    $0xfffffff9,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x25,%eax
ja     1238 <cvt_flip+0x138>
mov    -0x18(%rbp),%rax
lea    0xec1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xa,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0xb,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0xc,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x10,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x19,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x1c,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x1f,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x2b,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x7,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x8,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x9,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0xf,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x1a,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x1d,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x20,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x2c,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x23,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x22,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x26,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
movl   $0x25,-0x4(%rbp)
jmp    123e <cvt_flip+0x13e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvt_flip>:
mov    %edi,%eax
test   %esi,%esi
je     112b <cvt_flip+0x2b>
lea    -0x7(%rax),%ecx
cmp    $0x25,%ecx
ja     112b <cvt_flip+0x2b>
movabs $0x30db6c033f,%rdx
bt     %rcx,%rdx
jae    112b <cvt_flip+0x2b>
movslq %ecx,%rax
lea    0xed8(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @cvt_flip(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %34
10: ; preds = %2
%11 = load i32, i32* %4
switch i32 %11, label %32 [
i32 7, label %12
i32 8, label %13
i32 9, label %14
i32 15, label %15
i32 26, label %16
i32 29, label %17
i32 32, label %18
i32 44, label %19
i32 10, label %20
i32 11, label %21
i32 12, label %22
i32 16, label %23
i32 25, label %24
i32 28, label %25
i32 31, label %26
i32 43, label %27
i32 34, label %28
i32 35, label %29
i32 37, label %30
i32 38, label %31
]
12: ; preds = %10
store i32 10, i32* %3
br label %34
13: ; preds = %10
store i32 11, i32* %3
br label %34
14: ; preds = %10
store i32 12, i32* %3
br label %34
15: ; preds = %10
store i32 16, i32* %3
br label %34
16: ; preds = %10
store i32 25, i32* %3
br label %34
17: ; preds = %10
store i32 28, i32* %3
br label %34
18: ; preds = %10
store i32 31, i32* %3
br label %34
19: ; preds = %10
store i32 43, i32* %3
br label %34
20: ; preds = %10
store i32 7, i32* %3
br label %34
21: ; preds = %10
store i32 8, i32* %3
br label %34
22: ; preds = %10
store i32 9, i32* %3
br label %34
23: ; preds = %10
store i32 15, i32* %3
br label %34
24: ; preds = %10
store i32 26, i32* %3
br label %34
25: ; preds = %10
store i32 29, i32* %3
br label %34
26: ; preds = %10
store i32 32, i32* %3
br label %34
27: ; preds = %10
store i32 44, i32* %3
br label %34
28: ; preds = %10
store i32 35, i32* %3
br label %34
29: ; preds = %10
store i32 34, i32* %3
br label %34
30: ; preds = %10
store i32 38, i32* %3
br label %34
31: ; preds = %10
store i32 37, i32* %3
br label %34
32: ; preds = %10
%33 = load i32, i32* %4
store i32 %33, i32* %3
br label %34
34: ; preds = %32, %31, %30, %29, %28, %27, %26, %25, %24, %23, %22, %21, %20, %19, %18, %17, %16, %15, %14, %13, %12, %8
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
@switch.table.cvt_flip = [38 x i32] [i32 10, i32 11, i32 12, i32 7, i32 8, i32 9, i32 10, i32 10, i32 16, i32 15, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 26, i32 25, i32 10, i32 29, i32 28, i32 10, i32 32, i32 31, i32 10, i32 35, i32 34, i32 10, i32 38, i32 37, i32 10, i32 10, i32 10, i32 10, i32 44, i32 43]
define i32 @cvt_flip(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = add i32 %0, -7
%6 = icmp ult i32 %5, 38
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = zext i32 %5 to i64
%9 = lshr i64 209839719231, %8
%10 = and i64 %9, 1
%11 = icmp eq i64 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %7
%13 = sext i32 %5 to i64
%14 = getelementptr inbounds [38 x i32], [38 x i32]* @switch.table.cvt_flip, i64 0, i64 %13
%15 = load i32, i32* %14
br label %16
16: ; preds = %4, %7, %12, %2
%17 = phi i32 [ %0, %2 ], [ %15, %12 ], [ %0, %7 ], [ %0, %4 ]
ret i32 %17
}