#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct ath_hw {
  int dummy;
};
struct ath9k_channel {
  int dummy;
};

/* Variables and functions */
scalar_t__ AR_SREV_9340(struct ath_hw *);
scalar_t__ AR_SREV_9485(struct ath_hw *);
int /*<<< orphan*/ IS_CHAN_2GHZ(struct ath9k_channel *);
int /*<<< orphan*/ ar9003_hw_ant_ctrl_apply(struct ath_hw *,
                                            int /*<<< orphan*/);
int /*<<< orphan*/ ar9003_hw_apply_tuning_caps(struct ath_hw *);
int /*<<< orphan*/ ar9003_hw_atten_apply(struct ath_hw *,
                                         struct ath9k_channel *);
int /*<<< orphan*/ ar9003_hw_drive_strength_apply(struct ath_hw *);
int /*<<< orphan*/ ar9003_hw_internal_regulator_apply(struct ath_hw *);
int /*<<< orphan*/ ar9003_hw_xpa_bias_level_apply(struct ath_hw *,
                                                  int /*<<< orphan*/);
void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
                                      struct ath9k_channel *chan) {
  ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
  ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
  ar9003_hw_drive_strength_apply(ah);
  ar9003_hw_atten_apply(ah, chan);
  if (!AR_SREV_9340(ah))
    ar9003_hw_internal_regulator_apply(ah);
  if (AR_SREV_9485(ah) || AR_SREV_9340(ah))
    ar9003_hw_apply_tuning_caps(ah);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <IS_CHAN_2GHZ@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1060 <ar9003_hw_xpa_bias_level_apply@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <IS_CHAN_2GHZ@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1070 <ar9003_hw_ant_ctrl_apply@plt>
mov    -0x8(%rbp),%rdi
call   1080 <ar9003_hw_drive_strength_apply@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1090 <ar9003_hw_atten_apply@plt>
mov    -0x8(%rbp),%rdi
call   1040 <AR_SREV_9340@plt>
cmp    $0x0,%rax
jne    120a <ath9k_hw_ar9300_set_board_values+0x7a>
mov    -0x8(%rbp),%rdi
call   1050 <ar9003_hw_internal_regulator_apply@plt>
mov    -0x8(%rbp),%rdi
call   10b0 <AR_SREV_9485@plt>
cmp    $0x0,%rax
jne    1230 <ath9k_hw_ar9300_set_board_values+0xa0>
mov    -0x8(%rbp),%rdi
call   1040 <AR_SREV_9340@plt>
cmp    $0x0,%rax
je     1239 <ath9k_hw_ar9300_set_board_values+0xa9>
mov    -0x8(%rbp),%rdi
call   10a0 <ar9003_hw_apply_tuning_caps@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <IS_CHAN_2GHZ@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1060 <ar9003_hw_xpa_bias_level_apply@plt>
mov    %r14,%rdi
call   1030 <IS_CHAN_2GHZ@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1070 <ar9003_hw_ant_ctrl_apply@plt>
mov    %rbx,%rdi
call   1080 <ar9003_hw_drive_strength_apply@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1090 <ar9003_hw_atten_apply@plt>
mov    %rbx,%rdi
call   1040 <AR_SREV_9340@plt>
test   %rax,%rax
jne    11e6 <ath9k_hw_ar9300_set_board_values+0x56>
mov    %rbx,%rdi
call   1050 <ar9003_hw_internal_regulator_apply@plt>
mov    %rbx,%rdi
call   10b0 <AR_SREV_9485@plt>
test   %rax,%rax
jne    1200 <ath9k_hw_ar9300_set_board_values+0x70>
mov    %rbx,%rdi
call   1040 <AR_SREV_9340@plt>
test   %rax,%rax
je     120f <ath9k_hw_ar9300_set_board_values+0x7f>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    10a0 <ar9003_hw_apply_tuning_caps@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ath_hw = type { i32 }
%struct.ath9k_channel = type { i32 }
define void @ath9k_hw_ar9300_set_board_values(%struct.ath_hw* %0, %struct.ath9k_channel* %1) {
%3 = alloca %struct.ath_hw*
%4 = alloca %struct.ath9k_channel*
store %struct.ath_hw* %0, %struct.ath_hw** %3
store %struct.ath9k_channel* %1, %struct.ath9k_channel** %4
%5 = load %struct.ath_hw*, %struct.ath_hw** %3
%6 = load %struct.ath9k_channel*, %struct.ath9k_channel** %4
%7 = call i32 @IS_CHAN_2GHZ(%struct.ath9k_channel* %6)
%8 = call i32 @ar9003_hw_xpa_bias_level_apply(%struct.ath_hw* %5, i32 %7)
%9 = load %struct.ath_hw*, %struct.ath_hw** %3
%10 = load %struct.ath9k_channel*, %struct.ath9k_channel** %4
%11 = call i32 @IS_CHAN_2GHZ(%struct.ath9k_channel* %10)
%12 = call i32 @ar9003_hw_ant_ctrl_apply(%struct.ath_hw* %9, i32 %11)
%13 = load %struct.ath_hw*, %struct.ath_hw** %3
%14 = call i32 @ar9003_hw_drive_strength_apply(%struct.ath_hw* %13)
%15 = load %struct.ath_hw*, %struct.ath_hw** %3
%16 = load %struct.ath9k_channel*, %struct.ath9k_channel** %4
%17 = call i32 @ar9003_hw_atten_apply(%struct.ath_hw* %15, %struct.ath9k_channel* %16)
%18 = load %struct.ath_hw*, %struct.ath_hw** %3
%19 = call i64 @AR_SREV_9340(%struct.ath_hw* %18)
%20 = icmp ne i64 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %2
%22 = load %struct.ath_hw*, %struct.ath_hw** %3
%23 = call i32 @ar9003_hw_internal_regulator_apply(%struct.ath_hw* %22)
br label %24
24: ; preds = %21, %2
%25 = load %struct.ath_hw*, %struct.ath_hw** %3
%26 = call i64 @AR_SREV_9485(%struct.ath_hw* %25)
%27 = icmp ne i64 %26, 0
br i1 %27, label %32, label %28
28: ; preds = %24
%29 = load %struct.ath_hw*, %struct.ath_hw** %3
%30 = call i64 @AR_SREV_9340(%struct.ath_hw* %29)
%31 = icmp ne i64 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %28, %24
%33 = load %struct.ath_hw*, %struct.ath_hw** %3
%34 = call i32 @ar9003_hw_apply_tuning_caps(%struct.ath_hw* %33)
br label %35
35: ; preds = %32, %28
ret void
}

LLVM IR (-O2):
%struct.ath_hw = type { i32 }
%struct.ath9k_channel = type { i32 }
define void @ath9k_hw_ar9300_set_board_values(%struct.ath_hw* %0, %struct.ath9k_channel* %1) {
%3 = tail call i32 @IS_CHAN_2GHZ(%struct.ath9k_channel* %1)
%4 = tail call i32 @ar9003_hw_xpa_bias_level_apply(%struct.ath_hw* %0, i32 %3)
%5 = tail call i32 @IS_CHAN_2GHZ(%struct.ath9k_channel* %1)
%6 = tail call i32 @ar9003_hw_ant_ctrl_apply(%struct.ath_hw* %0, i32 %5)
%7 = tail call i32 @ar9003_hw_drive_strength_apply(%struct.ath_hw* %0)
%8 = tail call i32 @ar9003_hw_atten_apply(%struct.ath_hw* %0, %struct.ath9k_channel* %1)
%9 = tail call i64 @AR_SREV_9340(%struct.ath_hw* %0)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = tail call i32 @ar9003_hw_internal_regulator_apply(%struct.ath_hw* %0)
br label %13
13: ; preds = %11, %2
%14 = tail call i64 @AR_SREV_9485(%struct.ath_hw* %0)
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = tail call i64 @AR_SREV_9340(%struct.ath_hw* %0)
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %16, %13
%20 = tail call i32 @ar9003_hw_apply_tuning_caps(%struct.ath_hw* %0)
br label %21
21: ; preds = %19, %16
ret void
}