xunge/DecIR huggingface dataset:
int do_per_step(int step, int nstep) {
  if (nstep != 0)
    return ((step % nstep) == 0);
  else
    return 0;
}


x86 assembly (clang, -O0):
<do_per_step>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     112e <do_per_step+0x2e>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1135 <do_per_step+0x35>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_per_step>:
test   %esi,%esi
je     1111 <do_per_step+0x11>
mov    %edi,%eax
cltd
idiv   %esi
xor    %eax,%eax
test   %edx,%edx
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @do_per_step(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = srem i32 %9, %10
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
store i32 %13, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @do_per_step(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = srem i32 %0, %1
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 0, %2 ]
ret i32 %9
}
int in_darray(double needle, double haystack[], int count) {
  int i;
  for (i = 0; i < count; i++) {
    if (haystack[i] == needle) {
      return i;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<in_darray>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %esi,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    115f <in_darray+0x5f>
mov    -0x18(%rbp),%rax
movslq -0x20(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    114c <in_darray+0x4c>
jp     114c <in_darray+0x4c>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <in_darray+0x66>
jmp    1151 <in_darray+0x51>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1117 <in_darray+0x17>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_darray>:
test   %esi,%esi
jle    1126 <in_darray+0x26>
mov    %esi,%ecx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movsd  (%rdi,%rax,8),%xmm1
ucomisd %xmm0,%xmm1
jne    111d <in_darray+0x1d>
jnp    1128 <in_darray+0x28>
add    $0x1,%rax
cmp    %rax,%rcx
jne    1110 <in_darray+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @in_darray(double %0, double* %1, i32 %2) {
%4 = alloca i32
%5 = alloca double
%6 = alloca double*
%7 = alloca i32
%8 = alloca i32
store double %0, double* %5
store double* %1, double** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load double*, double** %6
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = load double, double* %5
%20 = fcmp oeq double %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 0, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @in_darray(double %0, double* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds double, double* %1, i64 %8
%10 = load double, double* %9
%11 = fcmp oeq double %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ 0, %3 ], [ %16, %15 ], [ 0, %12 ]
ret i32 %18
}
void take(volatile int *spinlock) { (void)spinlock; }


x86 assembly (clang, -O0):
<take>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<take>:
ret

LLVM IR (-O0):
define void @take(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @take(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(const char *name) {
  printf(
      "Usage: %s [--port|-p <n>] [--nodaemon|-n] [--verbose|-v] [--log|-l]\n"
      "          [--device|-d <device name>]\n"
      "\n"
      "options can be one of the following:\n"
      "--port <n>  : The port number the server is supposed to be running on.\n"
      "\tDefault - 6543\n"
      "--nodaemon  : Prevents the process from going into the background.\n"
      "\tDefault - in background\n"
      "--log <filename> : Log transactions into given file.\n"
      "--verbose   : verbose mode\n"
      "--device    : TPM device; default is /dev/tpm0\n"
      "\n"
      "The device (e.g., /dev/tpm0) must be read/write by the user running the "
      "proxy\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [530 x i8] c"Usage: %s [--port|-p <n>] [--nodaemon|-n] [--verbose|-v] [--log|-l]\0A [--device|-d <device name>]\0A\0Aoptions can be one of the following:\0A--port <n> : The port number the server is supposed to be running on.\0A\09Default - 6543\0A--nodaemon : Prevents the process from going into the background.\0A\09Default - in background\0A--log <filename> : Log transactions into given file.\0A--verbose : verbose mode\0A--device : TPM device; default is /dev/tpm0\0A\0AThe device (e.g., /dev/tpm0) must be read/write by the user running the proxy\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([530 x i8], [530 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [530 x i8] c"Usage: %s [--port|-p <n>] [--nodaemon|-n] [--verbose|-v] [--log|-l]\0A [--device|-d <device name>]\0A\0Aoptions can be one of the following:\0A--port <n> : The port number the server is supposed to be running on.\0A\09Default - 6543\0A--nodaemon : Prevents the process from going into the background.\0A\09Default - in background\0A--log <filename> : Log transactions into given file.\0A--verbose : verbose mode\0A--device : TPM device; default is /dev/tpm0\0A\0AThe device (e.g., /dev/tpm0) must be read/write by the user running the proxy\0A\00"
define void @usage(i8* nocapture readnone %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([530 x i8], [530 x i8]* @.str, i64 0, i64 0))
ret void
}
const char *sqlassieShortLicense() {
  return "This is free software; see the source for copying conditions. There "
         "is NO\nwarranty; not even for MERCHANTABILITY or FITNESS FOR A "
         "PARTICULAR PURPOSE.";
}


x86 assembly (clang, -O0):
<sqlassieShortLicense>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlassieShortLicense>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [150 x i8] c"This is free software; see the source for copying conditions. There is NO\0Awarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\00"
define i8* @sqlassieShortLicense() {
ret i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [150 x i8] c"This is free software; see the source for copying conditions. There is NO\0Awarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\00"
define i8* @sqlassieShortLicense() {
ret i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str, i64 0, i64 0)
}
double lerp(double a, double b, double t) { return a + t * (b - a); }


x86 assembly (clang, -O0):
<lerp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
subsd  -0x8(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerp>:
subsd  %xmm0,%xmm1
mulsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @lerp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %6
%9 = load double, double* %5
%10 = load double, double* %4
%11 = fsub double %9, %10
%12 = call double @llvm.fmuladd.f64(double %8, double %11, double %7)
ret double %12
}

LLVM IR (-O2):
define double @lerp(double %0, double %1, double %2) {
%4 = fsub double %1, %0
%5 = tail call double @llvm.fmuladd.f64(double %2, double %4, double %0)
ret double %5
}
/* Variables and functions */
char *strrchr(char *, char);
char *filenameFromPath(char *path) {
  char *p = path;
  if (p != NULL) {
    p = strrchr(p, '/');
    if (p != NULL)
      ++p;
    else
      p = path;
  }
  return p;
}


x86 assembly (clang, -O0):
<filenameFromPath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116a <filenameFromPath+0x5a>
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115d <filenameFromPath+0x4d>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1165 <filenameFromPath+0x55>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    116a <filenameFromPath+0x5a>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filenameFromPath>:
test   %rdi,%rdi
je     1133 <filenameFromPath+0x23>
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,%rcx
add    $0x1,%rax
test   %rcx,%rcx
cmove  %rbx,%rax
pop    %rbx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @filenameFromPath(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %18
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i8* @strrchr(i8* %8, i8 signext 47)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
br label %17
15: ; preds = %7
%16 = load i8*, i8** %2
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %12
br label %18
18: ; preds = %17, %1
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @filenameFromPath(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i8* @strrchr(i8* %0, i8 signext 47)
%5 = icmp eq i8* %4, null
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = select i1 %5, i8* %0, i8* %6
br label %8
8: ; preds = %3, %1
%9 = phi i8* [ null, %1 ], [ %7, %3 ]
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ handle_33(int /*<<< orphan*/);
int gen_33() {
  handle_33(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_33>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_33@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_33>:
push   %rax
xor    %edi,%edi
call   1030 <handle_33@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_33() {
%1 = call i32 @handle_33(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_33() {
%1 = tail call i32 @handle_33(i32 0)
ret i32 0
}
/* Variables and functions */
scalar_t__ close(int);
int /*<<< orphan*/ err_msg(char *);
int Close(int sockfd) {
  if (close(sockfd) < 0)
    err_msg("close failed\n");
}


x86 assembly (clang, -O0):
<Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
cmp    $0x0,%rax
jge    1149 <Close+0x29>
lea    0xebc(%rip),%rdi
call   1040 <err_msg@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Close>:
push   %rax
call   1030 <close@plt>
test   %rax,%rax
js     112d <Close+0xd>
pop    %rcx
ret
lea    0xecc(%rip),%rdi
call   1040 <err_msg@plt>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"close failed\0A\00"
define i32 @Close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @close(i32 %4)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @err_msg(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [14 x i8] c"close failed\0A\00"
define i32 @Close(i32 %0) {
%2 = tail call i64 @close(i32 %0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err_msg(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *xmalloc(size_t);
char *xstrdup(const char *str) {
  size_t len;
  char *cp;
  len = strlen(str) + 1;
  cp = xmalloc(len);
  strcpy(cp, str);
  return cp;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
add    $0x1,%eax
movslq %eax,%rdi
call   1050 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
%14 = load i8*, i8** %4
ret i8* %14
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @xmalloc(i64 %4)
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
ret i8* %5
}
int IsDBCSNone(const unsigned char *cp, int *pdxChar) { return 0; }


x86 assembly (clang, -O0):
<IsDBCSNone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsDBCSNone>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @IsDBCSNone(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @IsDBCSNone(i8* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
int fun_2_in_release_so(int x, int y) { return 20 + x + y; }


x86 assembly (clang, -O0):
<fun_2_in_release_so>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x14,%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_2_in_release_so>:
lea    (%rdi,%rsi,1),%eax
add    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @fun_2_in_release_so(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 20, %5
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @fun_2_in_release_so(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 20
%4 = add nsw i32 %3, %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_flint_help() { printf("PlaceHolder for useful tips\n"); }


x86 assembly (clang, -O0):
<print_flint_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_flint_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"PlaceHolder for useful tips\0A\00"
define void @print_flint_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"PlaceHolder for useful tips\00"
define void @print_flint_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_C1int64_midword_reg(long long val) {
  return ((val >> 16) & (0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xc1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1int64_midword_reg>:
test   $0xc10000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 193
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C1int64_midword_reg(i64 %0) {
%2 = and i64 %0, 12648448
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void handleInterrupt() {
  cleanup();
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<handleInterrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cleanup@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<handleInterrupt>:
push   %rax
xor    %eax,%eax
call   1030 <cleanup@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define void @handleInterrupt() {
%1 = call i32 (...) @cleanup()
%2 = load i32, i32* @EXIT_SUCCESS
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define void @handleInterrupt() {
%1 = tail call i32 (...) @cleanup()
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Type definitions */
typedef int u_short;

/* Variables and functions */
int htons(int);
int ntohs(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  u_short ns_port;
  u_short port;
  ns_port = htons(3000);
  printf("ns_port = %04x\n", ns_port);
  port = ntohs(ns_port);
  printf("port = %hu\n", port);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xbb8,%edi
call   1030 <htons@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%edi
call   1050 <ntohs@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xbb8,%edi
call   1030 <htons@plt>
mov    %eax,%ebx
lea    0xebc(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    %ebx,%edi
call   1050 <ntohs@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"ns_port = %04x\0A\00"
@.str.1 = [12 x i8] c"port = %hu\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @htons(i32 3000)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @ntohs(i32 %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"ns_port = %04x\0A\00"
@.str.1 = [12 x i8] c"port = %hu\0A\00"
define i32 @main() {
%1 = tail call i32 @htons(i32 3000)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @ntohs(i32 %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}
void test59_InitTestM_targetInit__I() {}


x86 assembly (clang, -O0):
<test59_InitTestM_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test59_InitTestM_targetInit__I>:
ret

LLVM IR (-O0):
define void @test59_InitTestM_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test59_InitTestM_targetInit__I() {
ret void
}
void zlibCompileFlags(void) {}


x86 assembly (clang, -O0):
<zlibCompileFlags>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlibCompileFlags>:
ret

LLVM IR (-O0):
define void @zlibCompileFlags() {
ret void
}

LLVM IR (-O2):
define void @zlibCompileFlags() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(void *);
int /*<<< orphan*/ qsort(void *, size_t, size_t,
                         int (*)(void const *, void const *));
void qsort_safe(void *base, size_t nmemb, size_t size,
                int (*compar)(const void *, const void *)) {
  if (nmemb) {
    assert(base);
    qsort(base, nmemb, size, compar);
  }
}


x86 assembly (clang, -O0):
<qsort_safe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1161 <qsort_safe+0x41>
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <qsort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_safe>:
test   %rsi,%rsi
je     115a <qsort_safe+0x3a>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%rbx
mov    %rdi,%r12
call   1040 <assert@plt>
mov    %r12,%rdi
mov    %rbx,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <qsort@plt>
ret

LLVM IR (-O0):
define void @qsort_safe(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
%9 = load i64, i64* %6
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i8*, i8** %5
%13 = call i32 @assert(i8* %12)
%14 = load i8*, i8** %5
%15 = load i64, i64* %6
%16 = load i64, i64* %7
%17 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%18 = call i32 @qsort(i8* %14, i64 %15, i64 %16, i32 (i8*, i8*)* %17)
br label %19
19: ; preds = %11, %4
ret void
}

LLVM IR (-O2):
define void @qsort_safe(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* nocapture %3) {
%5 = icmp eq i64 %1, 0
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = tail call i32 @assert(i8* %0)
%8 = tail call i32 @qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3)
br label %9
9: ; preds = %6, %4
ret void
}
void spi_enable_clock(int port) {}


x86 assembly (clang, -O0):
<spi_enable_clock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_enable_clock>:
ret

LLVM IR (-O0):
define void @spi_enable_clock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @spi_enable_clock(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exact_square();
int main(void) { exact_square(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <exact_square@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <exact_square@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @exact_square()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @exact_square()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cond();
int func();
int main(void) {
  int i = func();
  cond();
  func();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <func@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <cond@plt>
mov    $0x0,%al
call   1040 <func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <func@plt>
xor    %eax,%eax
call   1030 <cond@plt>
xor    %eax,%eax
call   1040 <func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @func()
store i32 %3, i32* %2
%4 = call i32 (...) @cond()
%5 = call i32 (...) @func()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @func()
%2 = tail call i32 (...) @cond()
%3 = tail call i32 (...) @func()
ret i32 0
}
const char *pathconN_nm9_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<pathconN_nm9_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <pathconN_nm9_name_out+0x2b>
jmp    111a <pathconN_nm9_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <pathconN_nm9_name_out+0x3b>
jmp    114b <pathconN_nm9_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathconN_nm9_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathconN_nm9_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm9_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathconN_nm9_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathconN_nm9_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;
struct serializer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ s_w8(struct serializer *, int /*<<< orphan*/);
int /*<<< orphan*/ s_wl16(struct serializer *, int /*<<< orphan*/);
void s_wl24(struct serializer *s, uint32_t u24) {
  s_w8(s, (uint8_t)u24);
  s_wl16(s, (uint16_t)(u24 >> 8));
  return;
}


x86 assembly (clang, -O0):
<s_wl24>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <s_w8@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
sar    $0x8,%esi
call   1030 <s_wl16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_wl24>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
call   1040 <s_w8@plt>
sar    $0x8,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <s_wl16@plt>

LLVM IR (-O0):
%struct.serializer = type { i32 }
define void @s_wl24(%struct.serializer* %0, i32 %1) {
%3 = alloca %struct.serializer*
%4 = alloca i32
store %struct.serializer* %0, %struct.serializer** %3
store i32 %1, i32* %4
%5 = load %struct.serializer*, %struct.serializer** %3
%6 = load i32, i32* %4
%7 = call i32 @s_w8(%struct.serializer* %5, i32 %6)
%8 = load %struct.serializer*, %struct.serializer** %3
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = call i32 @s_wl16(%struct.serializer* %8, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.serializer = type { i32 }
define void @s_wl24(%struct.serializer* %0, i32 %1) {
%3 = tail call i32 @s_w8(%struct.serializer* %0, i32 %1)
%4 = ashr i32 %1, 8
%5 = tail call i32 @s_wl16(%struct.serializer* %0, i32 %4)
ret void
}
void SDHostRespGet(unsigned long ulBase, unsigned long ulRespnse[4]) {
  ulRespnse[0] = (*((volatile unsigned long *)(ulBase + 0x00000210)));
  ulRespnse[1] = (*((volatile unsigned long *)(ulBase + 0x00000214)));
  ulRespnse[2] = (*((volatile unsigned long *)(ulBase + 0x00000218)));
  ulRespnse[3] = (*((volatile unsigned long *)(ulBase + 0x0000021C)));
}


x86 assembly (clang, -O0):
<SDHostRespGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x210(%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x214(%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    0x218(%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x10(%rax)
mov    -0x8(%rbp),%rax
mov    0x21c(%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDHostRespGet>:
mov    0x210(%rdi),%rax
mov    %rax,(%rsi)
mov    0x214(%rdi),%rax
mov    %rax,0x8(%rsi)
mov    0x218(%rdi),%rax
mov    %rax,0x10(%rsi)
mov    0x21c(%rdi),%rax
mov    %rax,0x18(%rsi)
ret

LLVM IR (-O0):
define void @SDHostRespGet(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
%5 = load i64, i64* %3
%6 = add i64 %5, 528
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = load i64*, i64** %4
%10 = getelementptr inbounds i64, i64* %9, i64 0
store i64 %8, i64* %10
%11 = load i64, i64* %3
%12 = add i64 %11, 532
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = load i64*, i64** %4
%16 = getelementptr inbounds i64, i64* %15, i64 1
store i64 %14, i64* %16
%17 = load i64, i64* %3
%18 = add i64 %17, 536
%19 = inttoptr i64 %18 to i64*
%20 = load volatile i64, i64* %19
%21 = load i64*, i64** %4
%22 = getelementptr inbounds i64, i64* %21, i64 2
store i64 %20, i64* %22
%23 = load i64, i64* %3
%24 = add i64 %23, 540
%25 = inttoptr i64 %24 to i64*
%26 = load volatile i64, i64* %25
%27 = load i64*, i64** %4
%28 = getelementptr inbounds i64, i64* %27, i64 3
store i64 %26, i64* %28
ret void
}

LLVM IR (-O2):
define void @SDHostRespGet(i64 %0, i64* nocapture writeonly %1) {
%3 = add i64 %0, 528
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
store i64 %5, i64* %1
%6 = add i64 %0, 532
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = getelementptr inbounds i64, i64* %1, i64 1
store i64 %8, i64* %9
%10 = add i64 %0, 536
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = getelementptr inbounds i64, i64* %1, i64 2
store i64 %12, i64* %13
%14 = add i64 %0, 540
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = getelementptr inbounds i64, i64* %1, i64 3
store i64 %16, i64* %17
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int d86f_track_flags(int);
uint8_t d86f_get_encoding(int drive) {
  return (d86f_track_flags(drive) & 0x18) >> 3;
}


x86 assembly (clang, -O0):
<d86f_get_encoding>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <d86f_track_flags@plt>
and    $0x18,%eax
sar    $0x3,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d86f_get_encoding>:
push   %rax
call   1030 <d86f_track_flags@plt>
shr    $0x3,%eax
and    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @d86f_get_encoding(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @d86f_track_flags(i32 %3)
%5 = and i32 %4, 24
%6 = ashr i32 %5, 3
ret i32 %6
}

LLVM IR (-O2):
define i32 @d86f_get_encoding(i32 %0) {
%2 = tail call i32 @d86f_track_flags(i32 %0)
%3 = lshr i32 %2, 3
%4 = and i32 %3, 3
ret i32 %4
}
float radians(float degrees) {
  return degrees * (3.14159265358979323846f / 180.0f);
}


x86 assembly (clang, -O0):
<radians>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radians>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @radians(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x3F91DF46A0000000
ret float %4
}

LLVM IR (-O2):
define float @radians(float %0) {
%2 = fmul float %0, 0x3F91DF46A0000000
ret float %2
}
__attribute__((no)) unsigned int rxsbg_si_sll(unsigned int a, unsigned int b) {
  return a ^ (b << 1);
}


x86 assembly (clang, -O0):
<rxsbg_si_sll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x1,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rxsbg_si_sll>:
lea    (%rsi,%rsi,1),%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @rxsbg_si_sll(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 1
%8 = xor i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @rxsbg_si_sll(i32 %0, i32 %1) {
%3 = shl i32 %1, 1
%4 = xor i32 %3, %0
ret i32 %4
}
int sum(int arr[], int size) {
  if (size == 0)
    return 0;
  else {
    int small_result = sum(arr, size - 1);
    return small_result + arr[size - 1];
  }
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1135 <sum+0x25>
movl   $0x0,-0x4(%rbp)
jmp    115d <sum+0x4d>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1030 <sum@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
movslq %edx,%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
test   %esi,%esi
je     1135 <sum+0x25>
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    -0x1(%rbx),%esi
call   1030 <sum@plt>
movslq %ebx,%rcx
add    -0x4(%r14,%rcx,4),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sum(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %23
10: ; preds = %2
%11 = load i32*, i32** %4
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = call i32 @sum(i32* %11, i32 %13)
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = sub nsw i32 %17, 1
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %16, i64 %19
%21 = load i32, i32* %20
%22 = add nsw i32 %15, %21
store i32 %22, i32* %3
br label %23
23: ; preds = %10, %9
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @sum(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi i32 [ %12, %6 ], [ 0, %2 ]
ret i32 %5
6: ; preds = %2
%7 = add nsw i32 %1, -1
%8 = tail call i32 @sum(i32* %0, i32 %7)
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = add nsw i32 %11, %8
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mouse_callback() { printf("Mouse event\n"); }


x86 assembly (clang, -O0):
<mouse_callback>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mouse_callback>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Mouse event\0A\00"
define void @mouse_callback() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"Mouse event\00"
define void @mouse_callback() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
void dup2_error() { perror("dup2 error"); }


x86 assembly (clang, -O0):
<dup2_error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <perror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup2_error>:
lea    0xee9(%rip),%rdi
jmp    1030 <perror@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"dup2 error\00"
define void @dup2_error() {
%1 = call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"dup2 error\00"
define void @dup2_error() {
%1 = tail call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
int complement3bit(int x) {
  if (x & 4)
    return ((x & 3) - 4);
  return x;
}


x86 assembly (clang, -O0):
<complement3bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     1127 <complement3bit+0x27>
mov    -0x8(%rbp),%eax
and    $0x3,%eax
sub    $0x4,%eax
mov    %eax,-0x4(%rbp)
jmp    112d <complement3bit+0x2d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<complement3bit>:
mov    %edi,%eax
or     $0xfffffffc,%eax
test   $0x4,%dil
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @complement3bit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = and i32 %8, 3
%10 = sub nsw i32 %9, 4
store i32 %10, i32* %2
br label %13
11: ; preds = %1
%12 = load i32, i32* %3
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @complement3bit(i32 %0) {
%2 = and i32 %0, 4
%3 = icmp eq i32 %2, 0
%4 = or i32 %0, -4
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
long long fun_call_ret_4() {
  long long ret = 0xffffffff;
  ret += 1;
  return ret;
}


x86 assembly (clang, -O0):
<fun_call_ret_4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_call_ret_4>:
movabs $0x100000000,%rax
ret

LLVM IR (-O0):
define i64 @fun_call_ret_4() {
%1 = alloca i64
store i64 4294967295, i64* %1
%2 = load i64, i64* %1
%3 = add nsw i64 %2, 1
store i64 %3, i64* %1
%4 = load i64, i64* %1
ret i64 %4
}

LLVM IR (-O2):
define i64 @fun_call_ret_4() {
ret i64 4294967296
}
/* Variables and functions */
int inb(int);
int /*<<< orphan*/ outb(int, char const);
void putc_serial(const char c) {
  while (!(inb(0x3F8 + 5) & 0x20))
    ;
  outb(0x3F8, c);
}


x86 assembly (clang, -O0):
<putc_serial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x3fd,%edi
call   1040 <inb@plt>
and    $0x20,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1150 <putc_serial+0x30>
jmp    1155 <putc_serial+0x35>
jmp    112e <putc_serial+0xe>
mov    $0x3f8,%edi
movsbl -0x1(%rbp),%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc_serial>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x3fd,%edi
call   1040 <inb@plt>
test   $0x20,%al
je     1130 <putc_serial+0x10>
movsbl %bl,%esi
mov    $0x3f8,%edi
pop    %rbx
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @putc_serial(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %8, %1
%4 = call i32 @inb(i32 1021)
%5 = and i32 %4, 32
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = load i8, i8* %2
%11 = call i32 @outb(i32 1016, i8 signext %10)
ret void
}

LLVM IR (-O2):
define void @putc_serial(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @inb(i32 1021)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = tail call i32 @outb(i32 1016, i8 signext %0)
ret void
}
/* Variables and functions */
double dsfmt_gv_genrand_close_open();
double s_genrand_close_open(void) { return dsfmt_gv_genrand_close_open(); }


x86 assembly (clang, -O0):
<s_genrand_close_open>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dsfmt_gv_genrand_close_open@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_genrand_close_open>:
xor    %eax,%eax
jmp    1030 <dsfmt_gv_genrand_close_open@plt>

LLVM IR (-O0):
define double @s_genrand_close_open() {
%1 = call double (...) @dsfmt_gv_genrand_close_open()
ret double %1
}

LLVM IR (-O2):
define double @s_genrand_close_open() {
%1 = tail call double (...) @dsfmt_gv_genrand_close_open()
ret double %1
}
int get_value_from_c(void) { return 5; }


x86 assembly (clang, -O0):
<get_value_from_c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_value_from_c>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @get_value_from_c() {
ret i32 5
}

LLVM IR (-O2):
define i32 @get_value_from_c() {
ret i32 5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void printInfo() {
  fprintf(stdout, "\nThis program calculates the page number\n"
                  "and the offset within the page for a\nmachine with a 32-bit "
                  "virtual memory\naddress space and a 4KB page size.\n\n");
}


x86 assembly (clang, -O0):
<printInfo>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printInfo>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [152 x i8] c"\0AThis program calculates the page number\0Aand the offset within the page for a\0Amachine with a 32-bit virtual memory\0Aaddress space and a 4KB page size.\0A\0A\00"
define void @printInfo() {
%1 = load i32, i32* @stdout
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([152 x i8], [152 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [152 x i8] c"\0AThis program calculates the page number\0Aand the offset within the page for a\0Amachine with a 32-bit virtual memory\0Aaddress space and a 4KB page size.\0A\0A\00"
define void @printInfo() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([152 x i8], [152 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char getc();
char getchar(void) { return getc(); }


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getc@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
xor    %eax,%eax
jmp    1030 <getc@plt>

LLVM IR (-O0):
define signext i8 @getchar() {
%1 = call signext i8 (...) @getc()
ret i8 %1
}

LLVM IR (-O2):
define signext i8 @getchar() {
%1 = tail call signext i8 (...) @getc()
ret i8 %1
}
int compare(const void *num1, const void *num2) {
  return (*(int *)num1 - *(int *)num2);
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
int gca_search_double(const void *aa, void *bb) {
  const double a = *(const double *)aa;
  const double b = *(double *)bb;
  return (((a) > (b)) - ((b) > (a)));
}


x86 assembly (clang, -O0):
<gca_search_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
movsd  -0x20(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gca_search_double>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gca_search_double(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca double
%6 = alloca double
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to double*
%9 = load double, double* %8
store double %9, double* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to double*
%12 = load double, double* %11
store double %12, double* %6
%13 = load double, double* %5
%14 = load double, double* %6
%15 = fcmp ogt double %13, %14
%16 = zext i1 %15 to i32
%17 = load double, double* %6
%18 = load double, double* %5
%19 = fcmp ogt double %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @gca_search_double(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp ogt double %4, %6
%8 = zext i1 %7 to i32
%9 = fcmp ogt double %6, %4
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
int test_imm_EEuint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xEE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EEuint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xee,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EEuint64_lowword_mem>:
testb  $0xee,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EEuint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 238
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EEuint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 238
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}