xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ addch(char);
int /*<<< orphan*/ clear();
void dev_putch(int c) {
  if (c >= 0) {
    addch((char)c);
  } else {
    clear();
  }
}


x86 assembly (clang, -O0):
<dev_putch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1145 <dev_putch+0x25>
mov    -0x4(%rbp),%eax
movsbl %al,%edi
call   1030 <addch@plt>
jmp    114c <dev_putch+0x2c>
mov    $0x0,%al
call   1040 <clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_putch>:
test   %edi,%edi
js     112d <dev_putch+0xd>
movsbl %dil,%edi
jmp    1030 <addch@plt>
xor    %eax,%eax
jmp    1040 <clear@plt>

LLVM IR (-O0):
define void @dev_putch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = trunc i32 %6 to i8
%8 = call i32 @addch(i8 signext %7)
br label %11
9: ; preds = %1
%10 = call i32 (...) @clear()
br label %11
11: ; preds = %9, %5
ret void
}

LLVM IR (-O2):
define void @dev_putch(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = trunc i32 %0 to i8
%5 = tail call i32 @addch(i8 signext %4)
br label %8
6: ; preds = %1
%7 = tail call i32 (...) @clear()
br label %8
8: ; preds = %6, %3
ret void
}
void I_FlushSaves(void) {}


x86 assembly (clang, -O0):
<I_FlushSaves>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_FlushSaves>:
ret

LLVM IR (-O0):
define void @I_FlushSaves() {
ret void
}

LLVM IR (-O2):
define void @I_FlushSaves() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ I_Error(char *);
__attribute__((noreturn)) void Internal_Send(void) {
  I_Error("Send without netgame\n");
}


x86 assembly (clang, -O0):
<Internal_Send>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <I_Error@plt>

x86 assembly (clang, -O2):
<Internal_Send>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <I_Error@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Send without netgame\0A\00"
define void @Internal_Send() {
%1 = call i32 @I_Error(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
unreachable
}

LLVM IR (-O2):
@.str = [22 x i8] c"Send without netgame\0A\00"
define void @Internal_Send() {
%1 = tail call i32 @I_Error(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ logCmdOption(char *, char *);
void logNVIndexCmdOption() {
  logCmdOption("-i, --index", "Index of the NVRAM area");
}


x86 assembly (clang, -O0):
<logNVIndexCmdOption>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
call   1030 <logCmdOption@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<logNVIndexCmdOption>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <logCmdOption@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"-i, --index\00"
@.str.1 = [24 x i8] c"Index of the NVRAM area\00"
define void @logNVIndexCmdOption() {
%1 = call i32 @logCmdOption(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"-i, --index\00"
@.str.1 = [24 x i8] c"Index of the NVRAM area\00"
define void @logNVIndexCmdOption() {
%1 = tail call i32 @logCmdOption(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}
long call_with_1_arg(int (*func)(), int argc, char **argv) {
  long ret;
  __asm__ __volatile__("movq %2, %%rdi\n\t"
                       "xor %%rax, %%rax\n\t"
                       "call *%1\n\t"
                       "movq %%rax, %0"
                       : "=r"(ret)
                       : "r"(func), "m"(argv[3])
                       : "rax", "rcx", "rdi");
  return ret;
}


x86 assembly (clang, -O0):
<call_with_1_arg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x18(%rbp),%rsi
add    $0x18,%rsi
mov    (%rsi),%rdi
xor    %rax,%rax
call   *%rdx
mov    %rax,%rdx
mov    %rdx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_with_1_arg>:
mov    %rdi,%rsi
mov    0x18(%rdx),%rdi
xor    %rax,%rax
call   *%rsi
mov    %rax,%rdx
mov    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @call_with_1_arg(i32 (...)* %0, i32 %1, i8** %2) {
%4 = alloca i32 (...)*
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i64
store i32 (...)* %0, i32 (...)** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%8 = load i32 (...)*, i32 (...)** %4
%9 = load i8**, i8*** %6
%10 = getelementptr inbounds i8*, i8** %9, i64 3
%11 = call i64 asm sideeffect "movq $2, %rdi\0A\09xor %rax, %rax\0A\09call *$1\0A\09movq %rax, $0", "=r,r,*m,~{rax},~{rcx},~{rdi},~{dirflag},~{fpsr},~{flags}"(i32 (...)* %8, i8** elementtype(i8*) %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
ret i64 %12
}

LLVM IR (-O2):
define i64 @call_with_1_arg(i32 (...)* %0, i32 %1, i8** %2) {
%4 = getelementptr inbounds i8*, i8** %2, i64 3
%5 = tail call i64 asm sideeffect "movq $2, %rdi\0A\09xor %rax, %rax\0A\09call *$1\0A\09movq %rax, $0", "=r,r,*m,~{rax},~{rcx},~{rdi},~{dirflag},~{fpsr},~{flags}"(i32 (...)* %0, i8** elementtype(i8*) %4)
ret i64 %5
}
/* Variables and functions */
char *restapi_server_call(char *);
char *restapi_server_expect_get(char *url) { return restapi_server_call(url); }


x86 assembly (clang, -O0):
<restapi_server_expect_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <restapi_server_call@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<restapi_server_expect_get>:
jmp    1030 <restapi_server_call@plt>

LLVM IR (-O0):
define i8* @restapi_server_expect_get(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @restapi_server_call(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @restapi_server_expect_get(i8* %0) {
%2 = tail call i8* @restapi_server_call(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ f2(int);
void f3(int a) { f2(a); }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
jmp    1030 <f2@plt>

LLVM IR (-O0):
define void @f3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f2(i32 %3)
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0) {
%2 = tail call i32 @f2(i32 %0)
ret void
}
void single_nop_delay() { __asm__("nop"); }


x86 assembly (clang, -O0):
<single_nop_delay>:
push   %rbp
mov    %rsp,%rbp
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<single_nop_delay>:
nop
ret

LLVM IR (-O0):
define void @single_nop_delay() {
ret void
}

LLVM IR (-O2):
define void @single_nop_delay() {
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
float not(float a) { return 4294967295.0 - a; }


x86 assembly (clang, -O0):
<not>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<not>:
cvtss2sd %xmm0,%xmm0
movsd  0xef4(%rip),%xmm1
subsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @not(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fsub double 0x41EFFFFFFFE00000, %4
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @not(float %0) {
%2 = fpext float %0 to double
%3 = fsub double 0x41EFFFFFFFE00000, %2
%4 = fptrunc double %3 to float
ret float %4
}
/* Variables and functions */
void *malloc(size_t);
void *m_try_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<m_try_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_try_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @m_try_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @m_try_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char);
void different_type_pointer() {
  int a = 97;
  char *p = (char *)&a;
  if (*p == *(char *)&a)
    printf("%c,%d\n", *p, *p);
}


x86 assembly (clang, -O0):
<different_type_pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x61,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x4(%rbp),%ecx
cmp    %ecx,%eax
jne    1156 <different_type_pointer+0x46>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
lea    0xeb5(%rip),%rdi
movsbl %cl,%esi
movsbl (%rax),%edx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<different_type_pointer>:
lea    0xee9(%rip),%rdi
mov    $0x61,%esi
mov    $0x61,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%c,%d\0A\00"
define void @different_type_pointer() {
%1 = alloca i32
%2 = alloca i8*
store i32 97, i32* %1
%3 = bitcast i32* %1 to i8*
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = bitcast i32* %1 to i8*
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %6, %9
br i1 %10, label %11, label %17
11: ; preds = %0
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext %13, i8 signext %15)
br label %17
17: ; preds = %11, %0
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%c,%d\0A\00"
define void @different_type_pointer() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext 97, i8 signext 97)
ret void
}
int input1_simple_loop() {
  int a;
  int n = 10;
  int i, sum = 0;
  for (i = 1; i <= 10; i++) {
    sum += i;
  }
  return sum;
}


x86 assembly (clang, -O0):
<input1_simple_loop>:
push   %rbp
mov    %rsp,%rbp
movl   $0xa,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jg     113a <input1_simple_loop+0x3a>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1119 <input1_simple_loop+0x19>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input1_simple_loop>:
mov    $0x37,%eax
ret

LLVM IR (-O0):
define i32 @input1_simple_loop() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 10, i32* %2
store i32 0, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 10
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = add nsw i32 %10, %9
store i32 %11, i32* %4
br label %12
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @input1_simple_loop() {
ret i32 55
}
void osalSysLockFromISR(void) {}


x86 assembly (clang, -O0):
<osalSysLockFromISR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osalSysLockFromISR>:
ret

LLVM IR (-O0):
define void @osalSysLockFromISR() {
ret void
}

LLVM IR (-O2):
define void @osalSysLockFromISR() {
ret void
}
int do_883() { return 883; }


x86 assembly (clang, -O0):
<do_883>:
push   %rbp
mov    %rsp,%rbp
mov    $0x373,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_883>:
mov    $0x373,%eax
ret

LLVM IR (-O0):
define i32 @do_883() {
ret i32 883
}

LLVM IR (-O2):
define i32 @do_883() {
ret i32 883
}
void sme_event_disassoc(struct wpa_supplicant *wpa_s,
                        union wpa_event_data *data) {}


x86 assembly (clang, -O0):
<sme_event_disassoc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sme_event_disassoc>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
%union.wpa_event_data = type opaque
define void @sme_event_disassoc(%struct.wpa_supplicant* %0, %union.wpa_event_data* %1) {
%3 = alloca %struct.wpa_supplicant*
%4 = alloca %union.wpa_event_data*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %3
store %union.wpa_event_data* %1, %union.wpa_event_data** %4
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
%union.wpa_event_data = type opaque
define void @sme_event_disassoc(%struct.wpa_supplicant* nocapture %0, %union.wpa_event_data* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void Void_0_io_1_printLine_2_Boolean(bool value) {
  printf(value ? "true\n" : "false\n");
}


x86 assembly (clang, -O0):
<Void_0_io_1_printLine_2_Boolean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
lea    0xee1(%rip),%rdi
lea    0xed4(%rip),%rax
cmp    $0x0,%ecx
cmovne %rax,%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Void_0_io_1_printLine_2_Boolean>:
test   %edi,%edi
lea    0xeed(%rip),%rax
lea    0xee0(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"true\0A\00"
@.str.1 = [7 x i8] c"false\0A\00"
define void @Void_0_io_1_printLine_2_Boolean(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0)
%7 = call i32 @printf(i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"true\0A\00"
@.str.1 = [7 x i8] c"false\0A\00"
define void @Void_0_io_1_printLine_2_Boolean(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_InverseQuaternion_init(void) {
  _hmt_register_covercase("HMM_InverseQuaternion", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_InverseQuaternion_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef4(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_InverseQuaternion_init>:
lea    0xee9(%rip),%rdi
lea    0xef8(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"HMM_InverseQuaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_InverseQuaternion_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"HMM_InverseQuaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_InverseQuaternion_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ add_fcmd_table(char *, int);
int old_lesskey(char *buf, int len) {
  if (buf[len - 1] != '\0' && buf[len - 2] != '\0')
    return (-1);
  add_fcmd_table(buf, len);
  return (0);
}


x86 assembly (clang, -O0):
<old_lesskey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115f <old_lesskey+0x4f>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x2,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115f <old_lesskey+0x4f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1172 <old_lesskey+0x62>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <add_fcmd_table@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<old_lesskey>:
push   %rax
movslq %esi,%rcx
cmpb   $0x0,-0x1(%rcx,%rdi,1)
je     1129 <old_lesskey+0x19>
mov    $0xffffffff,%eax
cmpb   $0x0,-0x2(%rcx,%rdi,1)
je     1129 <old_lesskey+0x19>
pop    %rcx
ret
call   1030 <add_fcmd_table@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @old_lesskey(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = load i32, i32* %5
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %24
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 2
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %14
store i32 -1, i32* %3
br label %28
24: ; preds = %14, %2
%25 = load i8*, i8** %4
%26 = load i32, i32* %5
%27 = call i32 @add_fcmd_table(i8* %25, i32 %26)
store i32 0, i32* %3
br label %28
28: ; preds = %24, %23
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @old_lesskey(i8* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %2
%9 = add nsw i32 %1, -2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %8, %2
%15 = tail call i32 @add_fcmd_table(i8* %0, i32 %1)
br label %16
16: ; preds = %8, %14
%17 = phi i32 [ 0, %14 ], [ -1, %8 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ bar(float, double);
float __attribute__((cmse_nonsecure_entry)) baz(float a, double b) {
  return (float)bar(a, b);
}


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movsd  %xmm1,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <bar@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
push   %rax
call   1030 <bar@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @baz(float %0, double %1) {
%3 = alloca float
%4 = alloca double
store float %0, float* %3
store double %1, double* %4
%5 = load float, float* %3
%6 = load double, double* %4
%7 = call i64 @bar(float %5, double %6)
%8 = sitofp i64 %7 to float
ret float %8
}

LLVM IR (-O2):
define float @baz(float %0, double %1) {
%3 = tail call i64 @bar(float %0, double %1)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ loadTables();
void lifetimeRiskInit(void) { loadTables(); }


x86 assembly (clang, -O0):
<lifetimeRiskInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <loadTables@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lifetimeRiskInit>:
xor    %eax,%eax
jmp    1030 <loadTables@plt>

LLVM IR (-O0):
define void @lifetimeRiskInit() {
%1 = call i32 (...) @loadTables()
ret void
}

LLVM IR (-O2):
define void @lifetimeRiskInit() {
%1 = tail call i32 (...) @loadTables()
ret void
}
/* Variables and functions */
scalar_t__ islower(int);
scalar_t__ isupper(int);
int isalpha(int c) { return islower(c) || isupper(c); }


x86 assembly (clang, -O0):
<isalpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <isalpha+0x37>
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isalpha+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1040 <isupper@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isupper(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isalpha(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isupper(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int day_of_year(int, int, int);
int /*<<< orphan*/ month_year(int, int, int *, int *);
int /*<<< orphan*/ printf(char *, int, ...);
int main() {
  int month, day;
  month_year(2017, 1, &month, &day);
  printf("%d %d\n", month, day);
  printf("%d\n", day_of_year(2017, 1, 1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x7e1,%edi
mov    $0x1,%esi
lea    -0x8(%rbp),%rdx
lea    -0xc(%rbp),%rcx
call   1050 <month_year@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xe9d(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x7e1,%edi
mov    $0x1,%edx
mov    %edx,%esi
call   1040 <day_of_year@plt>
mov    %eax,%esi
lea    0xe7f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdx
mov    %rsp,%rcx
mov    $0x7e1,%edi
mov    $0x1,%esi
call   1050 <month_year@plt>
mov    0x4(%rsp),%esi
mov    (%rsp),%edx
lea    0xeaa(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x7e1,%edi
mov    $0x1,%esi
mov    $0x1,%edx
call   1040 <day_of_year@plt>
lea    0xe8b(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @month_year(i32 2017, i32 1, i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
%8 = call i32 @day_of_year(i32 2017, i32 1, i32 1)
%9 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @month_year(i32 2017, i32 1, i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
%9 = call i32 @day_of_year(i32 2017, i32 1, i32 1)
%10 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int getpw(uid_t uid, char *buf) { return 0; }


x86 assembly (clang, -O0):
<getpw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpw>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getpw(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @getpw(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sla_aoppat_(double *, double *);
void slaAoppat(double date, double aoprms[14]) { sla_aoppat_(&date, aoprms); }


x86 assembly (clang, -O0):
<slaAoppat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x8(%rbp),%rdi
call   1030 <sla_aoppat_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slaAoppat>:
push   %rax
mov    %rdi,%rsi
movsd  %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <sla_aoppat_@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @slaAoppat(double %0, double* %1) {
%3 = alloca double
%4 = alloca double*
store double %0, double* %3
store double* %1, double** %4
%5 = load double*, double** %4
%6 = call i32 @sla_aoppat_(double* %3, double* %5)
ret void
}

LLVM IR (-O2):
define void @slaAoppat(double %0, double* %1) {
%3 = alloca double
store double %0, double* %3
%4 = call i32 @sla_aoppat_(double* %3, double* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ platform_log(char *, char *, int, char *, char *);
void opengl_trace(char *function, char *gl_function, char *file, int line) {
  platform_log("[%s:%d %s] %s\n", file, line, function, gl_function);
}


x86 assembly (clang, -O0):
<opengl_trace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
lea    0xec3(%rip),%rdi
call   1030 <platform_log@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opengl_trace>:
mov    %rsi,%r8
mov    %rdi,%rax
lea    0xee3(%rip),%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
mov    %rax,%rcx
jmp    1030 <platform_log@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"[%s:%d %s] %s\0A\00"
define void @opengl_trace(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %7
%10 = load i32, i32* %8
%11 = load i8*, i8** %5
%12 = load i8*, i8** %6
%13 = call i32 @platform_log(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %9, i32 %10, i8* %11, i8* %12)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"[%s:%d %s] %s\0A\00"
define void @opengl_trace(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @platform_log(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %2, i32 %3, i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_entity(int /*<<< orphan*/, char *,
                                             char *);
void test_blitzmax_comment_entities() {
  test_parser_verify_entity(test_parser_sourcefile("bat", " ' comment"),
                            "comment", "' comment");
}


x86 assembly (clang, -O0):
<test_blitzmax_comment_entities>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec7(%rip),%rsi
lea    0xebe(%rip),%rdx
call   1040 <test_parser_verify_entity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_blitzmax_comment_entities>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed5(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xecc(%rip),%rsi
lea    0xec3(%rip),%rdx
mov    %eax,%edi
pop    %rax
jmp    1040 <test_parser_verify_entity@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"bat\00"
@.str.1 = [11 x i8] c" ' comment\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [10 x i8] c"' comment\00"
define void @test_blitzmax_comment_entities() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"bat\00"
@.str.1 = [11 x i8] c" ' comment\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [10 x i8] c"' comment\00"
define void @test_blitzmax_comment_entities() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
ret void
}
unsigned long hpet_readl(unsigned long a) { return 0; }


x86 assembly (clang, -O0):
<hpet_readl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hpet_readl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hpet_readl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i64 0
}

LLVM IR (-O2):
define i64 @hpet_readl(i64 %0) {
ret i64 0
}
void ScaleSumSamples_C() {}


x86 assembly (clang, -O0):
<ScaleSumSamples_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleSumSamples_C>:
ret

LLVM IR (-O0):
define void @ScaleSumSamples_C() {
ret void
}

LLVM IR (-O2):
define void @ScaleSumSamples_C() {
ret void
}
float atanf(float x) {
  float r;
  __asm__ __volatile__("fld1; fpatan" : "=t"(r) : "0"(x));
  return r;
}


x86 assembly (clang, -O0):
<atanf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
flds   -0xc(%rbp)
fld1
fpatan
fstps  -0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<atanf>:
movss  %xmm0,-0x4(%rsp)
flds   -0x4(%rsp)
fld1
fpatan
fstps  -0x8(%rsp)
movss  -0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @atanf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float asm sideeffect "fld1; fpatan", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @atanf(float %0) {
%2 = tail call float asm sideeffect "fld1; fpatan", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %0)
ret float %2
}
void foo701() {}


x86 assembly (clang, -O0):
<foo701>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo701>:
ret

LLVM IR (-O0):
define void @foo701() {
ret void
}

LLVM IR (-O2):
define void @foo701() {
ret void
}
/* Variables and functions */
int grub_strcasecmp(char const *, char const *);
int strcasecmp(const char *s1, const char *s2) {
  return grub_strcasecmp(s1, s2);
}


x86 assembly (clang, -O0):
<strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <grub_strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcasecmp>:
jmp    1030 <grub_strcasecmp@plt>

LLVM IR (-O0):
define i32 @strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @grub_strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcasecmp(i8* %0, i8* %1) {
%3 = tail call i32 @grub_strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int equal(char *, char *);
int /*<<< orphan*/ reverse(char *);
int test_reverse_single_char() {
  char string[] = "a";
  reverse(string);
  return equal("a", string);
}


x86 assembly (clang, -O0):
<test_reverse_single_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed1(%rip),%ax
mov    %ax,-0x2(%rbp)
lea    -0x2(%rbp),%rdi
call   1030 <reverse@plt>
lea    -0x2(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_reverse_single_char>:
push   %rbx
sub    $0x10,%rsp
movw   $0x61,0xe(%rsp)
lea    0xe(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <reverse@plt>
lea    0xec0(%rip),%rdi
mov    %rbx,%rsi
call   1040 <equal@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.test_reverse_single_char.string = [2 x i8] c"a\00"
@.str = [2 x i8] c"a\00"
define i32 @test_reverse_single_char() {
%1 = alloca [2 x i8]
%2 = bitcast [2 x i8]* %1 to i8*
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
%4 = call i32 @reverse(i8* %3)
%5 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
%6 = call i32 @equal(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 %6
}

LLVM IR (-O2):
@.str = [2 x i8] c"a\00"
define i32 @test_reverse_single_char() {
%1 = alloca i16
%2 = bitcast i16* %1 to i8*
store i16 97, i16* %1
%3 = call i32 @reverse(i8* %2)
%4 = call i32 @equal(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 %4
}
int validateInput(int i, int j, int board[9]) {
  if (i < 3 && i >= 0 && j < 3 && j >= 0)
    return !board[3 * i + j];
  return 0;
}


x86 assembly (clang, -O0):
<validateInput>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    115a <validateInput+0x5a>
cmpl   $0x0,-0x8(%rbp)
jl     115a <validateInput+0x5a>
cmpl   $0x3,-0xc(%rbp)
jge    115a <validateInput+0x5a>
cmpl   $0x0,-0xc(%rbp)
jl     115a <validateInput+0x5a>
mov    -0x18(%rbp),%rax
imul   $0x3,-0x8(%rbp),%ecx
add    -0xc(%rbp),%ecx
movslq %ecx,%rcx
cmpl   $0x0,(%rax,%rcx,4)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <validateInput+0x61>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validateInput>:
xor    %eax,%eax
cmp    $0x2,%edi
ja     111a <validateInput+0x1a>
cmp    $0x2,%esi
ja     111a <validateInput+0x1a>
lea    (%rdi,%rdi,2),%ecx
add    %esi,%ecx
xor    %eax,%eax
cmpl   $0x0,(%rdx,%rcx,4)
sete   %al
ret

LLVM IR (-O0):
define i32 @validateInput(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 3
br i1 %9, label %10, label %31
10: ; preds = %3
%11 = load i32, i32* %5
%12 = icmp sge i32 %11, 0
br i1 %12, label %13, label %31
13: ; preds = %10
%14 = load i32, i32* %6
%15 = icmp slt i32 %14, 3
br i1 %15, label %16, label %31
16: ; preds = %13
%17 = load i32, i32* %6
%18 = icmp sge i32 %17, 0
br i1 %18, label %19, label %31
19: ; preds = %16
%20 = load i32*, i32** %7
%21 = load i32, i32* %5
%22 = mul nsw i32 3, %21
%23 = load i32, i32* %6
%24 = add nsw i32 %22, %23
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %20, i64 %25
%27 = load i32, i32* %26
%28 = icmp ne i32 %27, 0
%29 = xor i1 %28, true
%30 = zext i1 %29 to i32
store i32 %30, i32* %4
br label %32
31: ; preds = %16, %13, %10, %3
store i32 0, i32* %4
br label %32
32: ; preds = %31, %19
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @validateInput(i32 %0, i32 %1, i32* nocapture %2) {
%4 = icmp ult i32 %0, 3
%5 = icmp ult i32 %1, 3
%6 = and i1 %4, %5
br i1 %6, label %7, label %15
7: ; preds = %3
%8 = mul nuw nsw i32 %0, 3
%9 = add nuw nsw i32 %8, %1
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %2, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 0
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %3, %7
%16 = phi i32 [ %14, %7 ], [ 0, %3 ]
ret i32 %16
}
void pnx833x_gpio_init(void) {
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF008))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF064))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF014))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF068))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF020))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF024))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xF028))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xFFE8))) =
      0xffff;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xFFE8))) = 0;
  (*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) + 0xFFE4))) = 0;
}


x86 assembly (clang, -O0):
<pnx833x_gpio_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb7e0f008,%eax
movq   $0x0,(%rax)
mov    $0xb7e0f064,%eax
movq   $0x0,(%rax)
mov    $0xb7e0f014,%eax
movq   $0x0,(%rax)
mov    $0xb7e0f068,%eax
movq   $0x0,(%rax)
mov    $0xb7e0f020,%eax
movq   $0x0,(%rax)
mov    $0xb7e0f024,%eax
movq   $0x0,(%rax)
mov    $0xb7e0f028,%eax
movq   $0x0,(%rax)
mov    $0xb7e0ffe8,%eax
movq   $0xffff,(%rax)
mov    $0xb7e0ffe8,%eax
movq   $0x0,(%rax)
mov    $0xb7e0ffe4,%eax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pnx833x_gpio_init>:
mov    $0xb7e0ffe8,%eax
movq   $0x0,-0xfe0(%rax)
movq   $0x0,-0xf84(%rax)
movq   $0x0,-0xfd4(%rax)
movq   $0x0,-0xf80(%rax)
movq   $0x0,-0xfc8(%rax)
movq   $0x0,-0xfc4(%rax)
movq   $0x0,-0xfc0(%rax)
movq   $0xffff,(%rax)
movq   $0x0,(%rax)
movq   $0x0,-0x4(%rax)
ret

LLVM IR (-O0):
define void @pnx833x_gpio_init() {
store volatile i64 0, i64* inttoptr (i64 3084972040 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972132 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972052 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972136 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972064 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972068 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972072 to i64*)
store volatile i64 65535, i64* inttoptr (i64 3084976104 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084976104 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084976100 to i64*)
ret void
}

LLVM IR (-O2):
define void @pnx833x_gpio_init() {
store volatile i64 0, i64* inttoptr (i64 3084972040 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972132 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972052 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972136 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972064 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972068 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084972072 to i64*)
store volatile i64 65535, i64* inttoptr (i64 3084976104 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084976104 to i64*)
store volatile i64 0, i64* inttoptr (i64 3084976100 to i64*)
ret void
}
void ev_dispatch(void) { return; }


x86 assembly (clang, -O0):
<ev_dispatch>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ev_dispatch>:
ret

LLVM IR (-O0):
define void @ev_dispatch() {
ret void
}

LLVM IR (-O2):
define void @ev_dispatch() {
ret void
}
void ff_hevc_put_hevc_bi_qpel_h48_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_h48_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_h48_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_h48_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_h48_10_avx2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, const char *argv[]) {
  printf("thsi is shell's first git file\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"thsi is shell's first git file\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [31 x i8] c"thsi is shell's first git file\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
char *doasprintf(char *, char const *);
int /*<<< orphan*/ warn(char *);
char *json_fmt_revokecert(const char *cert) {
  char *p;
  p = doasprintf("{"
                 "\"resource\": \"revoke-cert\", "
                 "\"certificate\": \"%s\""
                 "}",
                 cert);
  if (NULL == p)
    warn("asprintf");
  return (p);
}


x86 assembly (clang, -O0):
<json_fmt_revokecert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1040 <doasprintf@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x10(%rbp),%rax
jne    1158 <json_fmt_revokecert+0x38>
lea    0xede(%rip),%rdi
call   1030 <warn@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_fmt_revokecert>:
push   %rbx
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1040 <doasprintf@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1144 <json_fmt_revokecert+0x24>
lea    0xef2(%rip),%rdi
call   1030 <warn@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [49 x i8] c"{\22resource\22: \22revoke-cert\22, \22certificate\22: \22%s\22}\00"
@.str.1 = [9 x i8] c"asprintf\00"
define i8* @json_fmt_revokecert(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @doasprintf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* null, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @warn(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [49 x i8] c"{\22resource\22: \22revoke-cert\22, \22certificate\22: \22%s\22}\00"
@.str.1 = [9 x i8] c"asprintf\00"
define i8* @json_fmt_revokecert(i8* %0) {
%2 = tail call i8* @doasprintf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @warn(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ _IOLBF;
int /*<<< orphan*/ setvbuf(int /*<<< orphan*/ *, char *, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void setlinebuf(FILE *stream) { setvbuf(stream, (char *)NULL, _IOLBF, 0); }


x86 assembly (clang, -O0):
<setlinebuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
xor    %ecx,%ecx
call   1030 <setvbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setlinebuf>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
xor    %ecx,%ecx
jmp    1030 <setvbuf@plt>

LLVM IR (-O0):
@_IOLBF = global i32 0
define void @setlinebuf(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* @_IOLBF
%5 = call i32 @setvbuf(i32* %3, i8* null, i32 %4, i32 0)
ret void
}

LLVM IR (-O2):
@_IOLBF = global i32 0
define void @setlinebuf(i32* nocapture %0) {
%2 = load i32, i32* @_IOLBF
%3 = tail call i32 @setvbuf(i32* %0, i8* null, i32 %2, i32 0)
ret void
}
/* Variables and functions */
char *skip_blank(char *p) {
  while (*p && *p == ' ')
    ++p;
  if (!*p)
    return NULL;
  return p;
}


x86 assembly (clang, -O0):
<skip_blank>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     112d <skip_blank+0x2d>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    113d <skip_blank+0x3d>
jmp    114e <skip_blank+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <skip_blank+0x8>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1168 <skip_blank+0x68>
movq   $0x0,-0x8(%rbp)
jmp    1170 <skip_blank+0x70>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_blank>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
cmp    $0x20,%cl
je     1110 <skip_blank+0x10>
xor    %edx,%edx
test   %cl,%cl
cmove  %rdx,%rax
ret

LLVM IR (-O0):
define i8* @skip_blank(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 32
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %19
16: ; preds = %14
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
br label %4
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = icmp ne i8 %21, 0
br i1 %22, label %24, label %23
23: ; preds = %19
store i8* null, i8** %2
br label %26
24: ; preds = %19
%25 = load i8*, i8** %3
store i8* %25, i8** %2
br label %26
26: ; preds = %24, %23
%27 = load i8*, i8** %2
ret i8* %27
}

LLVM IR (-O2):
define i8* @skip_blank(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
%8 = icmp eq i8 %4, 0
%9 = select i1 %8, i8* null, i8* %3
ret i8* %9
}
unsigned num_constrained(const unsigned flags) {
  const unsigned y = flags | flags >> 1;
  return (y & 1u) + (y >> 2 & 1u) + (y >> 4 & 1u);
}


x86 assembly (clang, -O0):
<num_constrained>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
mov    -0x8(%rbp),%ecx
shr    $0x2,%ecx
and    $0x1,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%ecx
shr    $0x4,%ecx
and    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_constrained>:
mov    %edi,%eax
shr    %eax
or     %edi,%eax
mov    %eax,%ecx
and    $0x1,%ecx
mov    %eax,%edx
shr    $0x2,%edx
and    $0x1,%edx
add    %ecx,%edx
shr    $0x4,%eax
and    $0x1,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @num_constrained(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = lshr i32 %5, 1
%7 = or i32 %4, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = and i32 %8, 1
%10 = load i32, i32* %3
%11 = lshr i32 %10, 2
%12 = and i32 %11, 1
%13 = add i32 %9, %12
%14 = load i32, i32* %3
%15 = lshr i32 %14, 4
%16 = and i32 %15, 1
%17 = add i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @num_constrained(i32 %0) {
%2 = lshr i32 %0, 1
%3 = or i32 %2, %0
%4 = and i32 %3, 1
%5 = lshr i32 %3, 2
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %6, %4
%8 = lshr i32 %3, 4
%9 = and i32 %8, 1
%10 = add nuw nsw i32 %7, %9
ret i32 %10
}