#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
scalar_t__ _pwmss_ehrpwm_tbclk_status_get(unsigned int);
int /*<<< orphan*/ _pwmss_ehrpwm_tbclk_status_set(unsigned int,
                                                  int /*<<< orphan*/);
int pwmss_tbclk_disable(unsigned int device_id) {
  if (_pwmss_ehrpwm_tbclk_status_get(device_id) == 0) {
    return 1;
  }
  switch (device_id) {
  case 0:
    (*((volatile unsigned int *)((0x44E10000) + (0x664)))) &= (0xFFFFFFFEu);
    break;
  case 1:
    (*((volatile unsigned int *)((0x44E10000) + (0x664)))) &= (0xFFFFFFFDu);
    break;
  case 2:
    (*((volatile unsigned int *)((0x44E10000) + (0x664)))) &= (0xFFFFFFFBu);
    break;
  default:
    return -1;
  }
  _pwmss_ehrpwm_tbclk_status_set(device_id, 0);
  return 0;
}


x86 assembly (clang, -O0):
<pwmss_tbclk_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <_pwmss_ehrpwm_tbclk_status_get@plt>
cmp    $0x0,%rax
jne    1149 <pwmss_tbclk_disable+0x29>
movl   $0x1,-0x4(%rbp)
jmp    11dd <pwmss_tbclk_disable+0xbd>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     117e <pwmss_tbclk_disable+0x5e>
jmp    115c <pwmss_tbclk_disable+0x3c>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
je     1194 <pwmss_tbclk_disable+0x74>
jmp    116d <pwmss_tbclk_disable+0x4d>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     11aa <pwmss_tbclk_disable+0x8a>
jmp    11c0 <pwmss_tbclk_disable+0xa0>
mov    $0x44e10664,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    $0x44e10664,%eax
mov    %ecx,(%rax)
jmp    11cc <pwmss_tbclk_disable+0xac>
mov    $0x44e10664,%eax
mov    (%rax),%ecx
and    $0xfffffffd,%ecx
mov    $0x44e10664,%eax
mov    %ecx,(%rax)
jmp    11cc <pwmss_tbclk_disable+0xac>
mov    $0x44e10664,%eax
mov    (%rax),%ecx
and    $0xfffffffb,%ecx
mov    $0x44e10664,%eax
mov    %ecx,(%rax)
jmp    11cc <pwmss_tbclk_disable+0xac>
movl   $0xffffffff,-0x4(%rbp)
jmp    11dd <pwmss_tbclk_disable+0xbd>
mov    -0x8(%rbp),%edi
xor    %esi,%esi
call   1040 <_pwmss_ehrpwm_tbclk_status_set@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwmss_tbclk_disable>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <_pwmss_ehrpwm_tbclk_status_get@plt>
test   %rax,%rax
je     115a <pwmss_tbclk_disable+0x3a>
mov    $0xffffffff,%ebp
cmp    $0x2,%ebx
ja     115f <pwmss_tbclk_disable+0x3f>
movslq %ebx,%rax
lea    0xebd(%rip),%rcx
mov    (%rcx,%rax,4),%eax
and    %eax,0x44e10664
xor    %ebp,%ebp
mov    %ebx,%edi
xor    %esi,%esi
call   1040 <_pwmss_ehrpwm_tbclk_status_set@plt>
jmp    115f <pwmss_tbclk_disable+0x3f>
mov    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @pwmss_tbclk_disable(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @_pwmss_ehrpwm_tbclk_status_get(i32 %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %23
8: ; preds = %1
%9 = load i32, i32* %3
switch i32 %9, label %19 [
i32 0, label %10
i32 1, label %13
i32 2, label %16
]
10: ; preds = %8
%11 = load volatile i32, i32* inttoptr (i64 1155597924 to i32*)
%12 = and i32 %11, -2
store volatile i32 %12, i32* inttoptr (i64 1155597924 to i32*)
br label %20
13: ; preds = %8
%14 = load volatile i32, i32* inttoptr (i64 1155597924 to i32*)
%15 = and i32 %14, -3
store volatile i32 %15, i32* inttoptr (i64 1155597924 to i32*)
br label %20
16: ; preds = %8
%17 = load volatile i32, i32* inttoptr (i64 1155597924 to i32*)
%18 = and i32 %17, -5
store volatile i32 %18, i32* inttoptr (i64 1155597924 to i32*)
br label %20
19: ; preds = %8
store i32 -1, i32* %2
br label %23
20: ; preds = %16, %13, %10
%21 = load i32, i32* %3
%22 = call i32 @_pwmss_ehrpwm_tbclk_status_set(i32 %21, i32 0)
store i32 0, i32* %2
br label %23
23: ; preds = %20, %19, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
@switch.table.pwmss_tbclk_disable = [3 x i32] [i32 -2, i32 -3, i32 -5]
define i32 @pwmss_tbclk_disable(i32 %0) {
%2 = tail call i64 @_pwmss_ehrpwm_tbclk_status_get(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = icmp ult i32 %0, 3
br i1 %5, label %6, label %13
6: ; preds = %4
%7 = sext i32 %0 to i64
%8 = getelementptr inbounds [3 x i32], [3 x i32]* @switch.table.pwmss_tbclk_disable, i64 0, i64 %7
%9 = load i32, i32* %8
%10 = load volatile i32, i32* inttoptr (i64 1155597924 to i32*)
%11 = and i32 %10, %9
store volatile i32 %11, i32* inttoptr (i64 1155597924 to i32*)
%12 = tail call i32 @_pwmss_ehrpwm_tbclk_status_set(i32 %0, i32 0)
br label %13
13: ; preds = %4, %1, %6
%14 = phi i32 [ 0, %6 ], [ 1, %1 ], [ -1, %4 ]
ret i32 %14
}