xunge/DecIR huggingface dataset:
/* Variables and functions */
double atof(char *);
int compare_double(double *, double *);
int compare_str_numeric(const void *a, const void *b) {
  char *sa;
  char *sb;
  double da;
  double db;
  sa = (char *)a;
  sb = (char *)b;
  da = atof(sa);
  db = atof(sb);
  return compare_double(&da, &db);
}


x86 assembly (clang, -O0):
<compare_str_numeric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x30(%rbp)
lea    -0x28(%rbp),%rdi
lea    -0x30(%rbp),%rsi
call   1040 <compare_double@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_str_numeric>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
call   1030 <atof@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1030 <atof@plt>
movsd  %xmm0,(%rsp)
lea    0x8(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <compare_double@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @compare_str_numeric(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca double
%8 = alloca double
store i8* %0, i8** %3
store i8* %1, i8** %4
%9 = load i8*, i8** %3
store i8* %9, i8** %5
%10 = load i8*, i8** %4
store i8* %10, i8** %6
%11 = load i8*, i8** %5
%12 = call double @atof(i8* %11)
store double %12, double* %7
%13 = load i8*, i8** %6
%14 = call double @atof(i8* %13)
store double %14, double* %8
%15 = call i32 @compare_double(double* %7, double* %8)
ret i32 %15
}

LLVM IR (-O2):
define i32 @compare_str_numeric(i8* nocapture %0, i8* nocapture %1) {
%3 = alloca double
%4 = alloca double
%5 = bitcast double* %3 to i8*
%6 = bitcast double* %4 to i8*
%7 = tail call double @atof(i8* %0)
store double %7, double* %3
%8 = tail call double @atof(i8* %1)
store double %8, double* %4
%9 = call i32 @compare_double(double* %3, double* %4)
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128Timer1P__CompareA__start();
void Atm128AlarmC__0__HplAtm128Compare__start(void) {
  HplAtm128Timer1P__CompareA__start();
}


x86 assembly (clang, -O0):
<Atm128AlarmC__0__HplAtm128Compare__start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128Timer1P__CompareA__start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Atm128AlarmC__0__HplAtm128Compare__start>:
xor    %eax,%eax
jmp    1030 <HplAtm128Timer1P__CompareA__start@plt>

LLVM IR (-O0):
define void @Atm128AlarmC__0__HplAtm128Compare__start() {
%1 = call i32 (...) @HplAtm128Timer1P__CompareA__start()
ret void
}

LLVM IR (-O2):
define void @Atm128AlarmC__0__HplAtm128Compare__start() {
%1 = tail call i32 (...) @HplAtm128Timer1P__CompareA__start()
ret void
}
void abc3defghijklmnopqrstuvwxzy() {}


x86 assembly (clang, -O0):
<abc3defghijklmnopqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abc3defghijklmnopqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @abc3defghijklmnopqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @abc3defghijklmnopqrstuvwxzy() {
ret void
}
/* Type definitions */
typedef scalar_t__ clock_t;

/* Variables and functions */
double CLOCKS_PER_SEC;
double running_time(clock_t start, clock_t finish) {
  return ((double)(finish - start)) * 1000 / CLOCKS_PER_SEC;
}


x86 assembly (clang, -O0):
<running_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
cvtsi2sd %rax,%xmm0
movsd  0xedf(%rip),%xmm1
mulsd  %xmm1,%xmm0
mov    0x2ebc(%rip),%rax
divsd  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<running_time>:
sub    %rdi,%rsi
cvtsi2sd %rsi,%xmm0
mulsd  0xef0(%rip),%xmm0
mov    0x2ed1(%rip),%rax
divsd  (%rax),%xmm0
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global double 0.000000e+00
define double @running_time(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = sub nsw i64 %5, %6
%8 = sitofp i64 %7 to double
%9 = fmul double %8, 1.000000e+03
%10 = load double, double* @CLOCKS_PER_SEC
%11 = fdiv double %9, %10
ret double %11
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global double 0.000000e+00
define double @running_time(i64 %0, i64 %1) {
%3 = sub nsw i64 %1, %0
%4 = sitofp i64 %3 to double
%5 = fmul double %4, 1.000000e+03
%6 = load double, double* @CLOCKS_PER_SEC
%7 = fdiv double %5, %6
ret double %7
}
int hcf(int a, int b) {
  while (b != 0) {
    int temp = b;
    b = a % b;
    a = temp;
  }
  return a;
}


x86 assembly (clang, -O0):
<hcf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <hcf+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110a <hcf+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hcf>:
mov    %edi,%eax
test   %esi,%esi
je     111d <hcf+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <hcf+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hcf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %4
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
store i32 %13, i32* %4
%14 = load i32, i32* %5
store i32 %14, i32* %3
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @hcf(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
unsigned is_unique(unsigned num) {
  unsigned flag, flags = 0;
  do {
    flag = 1u << num % 10;
    if (flag & flags)
      return 0;
    flags |= flag;
  } while (num /= 10);
  return 1;
}


x86 assembly (clang, -O0):
<is_unique>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    -0x10(%rbp),%eax
cmp    $0x0,%eax
je     1141 <is_unique+0x41>
movl   $0x0,-0x4(%rbp)
jmp    1169 <is_unique+0x69>
mov    -0xc(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jne    110e <is_unique+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_unique>:
xor    %eax,%eax
mov    $0xcccccccd,%r8d
xor    %r9d,%r9d
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%ecx
lea    (%rcx,%rcx,4),%esi
mov    %edi,%ecx
sub    %esi,%ecx
mov    $0x1,%esi
shl    %cl,%esi
bt     %ecx,%r9d
jb     1140 <is_unique+0x40>
or     %esi,%r9d
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <is_unique+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_unique(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %5
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %3
%8 = urem i32 %7, 10
%9 = shl i32 1, %8
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = and i32 %10, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %6
store i32 0, i32* %2
br label %24
15: ; preds = %6
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = or i32 %17, %16
store i32 %18, i32* %5
br label %19
19: ; preds = %15
%20 = load i32, i32* %3
%21 = udiv i32 %20, 10
store i32 %21, i32* %3
%22 = icmp ne i32 %21, 0
br i1 %22, label %6, label %23
23: ; preds = %19
store i32 1, i32* %2
br label %24
24: ; preds = %23, %14
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_unique(i32 %0) {
br label %2
2: ; preds = %10, %1
%3 = phi i32 [ %0, %1 ], [ %6, %10 ]
%4 = phi i32 [ 0, %1 ], [ %11, %10 ]
%5 = urem i32 %3, 10
%6 = udiv i32 %3, 10
%7 = shl nuw nsw i32 1, %5
%8 = and i32 %7, %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = or i32 %7, %4
%12 = icmp ult i32 %3, 10
br i1 %12, label %13, label %2
13: ; preds = %10, %2
%14 = phi i32 [ 0, %2 ], [ 1, %10 ]
ret i32 %14
}
unsigned long hash32(unsigned long a) {
  a = a & 0xffffffffUL;
  a = (a ^ 61UL) ^ (a >> 16);
  a = (a + (a << 3)) & 0xffffffffUL;
  a = a ^ (a >> 4);
  a = (a * 0x27d4eb2dUL) & 0xffffffffUL;
  a = a ^ (a >> 15);
  return a;
}


x86 assembly (clang, -O0):
<hash32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xffffffff,%rax
and    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0x3d,%rax
mov    -0x8(%rbp),%rcx
shr    $0x10,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
movabs $0xffffffff,%rcx
and    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x4,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
imul   $0x27d4eb2d,-0x8(%rbp),%rax
27
movabs $0xffffffff,%rcx
and    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0xf,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash32>:
mov    %edi,%eax
mov    %rax,%rcx
shr    $0x10,%rcx
xor    %rax,%rcx
xor    $0x3d,%rcx
lea    (%rcx,%rcx,8),%rax
mov    %eax,%ecx
shr    $0x4,%rcx
xor    %eax,%ecx
imul   $0x27d4eb2d,%ecx,%ecx
mov    %rcx,%rax
shr    $0xf,%rax
xor    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @hash32(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 4294967295
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = xor i64 %5, 61
%7 = load i64, i64* %2
%8 = lshr i64 %7, 16
%9 = xor i64 %6, %8
store i64 %9, i64* %2
%10 = load i64, i64* %2
%11 = load i64, i64* %2
%12 = shl i64 %11, 3
%13 = add i64 %10, %12
%14 = and i64 %13, 4294967295
store i64 %14, i64* %2
%15 = load i64, i64* %2
%16 = load i64, i64* %2
%17 = lshr i64 %16, 4
%18 = xor i64 %15, %17
store i64 %18, i64* %2
%19 = load i64, i64* %2
%20 = mul i64 %19, 668265261
%21 = and i64 %20, 4294967295
store i64 %21, i64* %2
%22 = load i64, i64* %2
%23 = load i64, i64* %2
%24 = lshr i64 %23, 15
%25 = xor i64 %22, %24
store i64 %25, i64* %2
%26 = load i64, i64* %2
ret i64 %26
}

LLVM IR (-O2):
define i64 @hash32(i64 %0) {
%2 = and i64 %0, 4294967295
%3 = lshr i64 %2, 16
%4 = xor i64 %2, %3
%5 = xor i64 %4, 61
%6 = mul nuw nsw i64 %5, 9
%7 = and i64 %6, 4294967295
%8 = lshr i64 %7, 4
%9 = xor i64 %8, %7
%10 = mul nuw nsw i64 %9, 668265261
%11 = and i64 %10, 4294967295
%12 = lshr i64 %11, 15
%13 = xor i64 %12, %11
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ Msp430UsartShareP__1__RawI2CInterrupts__fired();
void HplMsp430Usart0P__I2CInterrupts__fired(void) {
  Msp430UsartShareP__1__RawI2CInterrupts__fired();
}


x86 assembly (clang, -O0):
<HplMsp430Usart0P__I2CInterrupts__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430UsartShareP__1__RawI2CInterrupts__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430Usart0P__I2CInterrupts__fired>:
xor    %eax,%eax
jmp    1030 <Msp430UsartShareP__1__RawI2CInterrupts__fired@plt>

LLVM IR (-O0):
define void @HplMsp430Usart0P__I2CInterrupts__fired() {
%1 = call i32 (...) @Msp430UsartShareP__1__RawI2CInterrupts__fired()
ret void
}

LLVM IR (-O2):
define void @HplMsp430Usart0P__I2CInterrupts__fired() {
%1 = tail call i32 (...) @Msp430UsartShareP__1__RawI2CInterrupts__fired()
ret void
}
void avio_wl32() {}


x86 assembly (clang, -O0):
<avio_wl32>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_wl32>:
ret

LLVM IR (-O0):
define void @avio_wl32() {
ret void
}

LLVM IR (-O2):
define void @avio_wl32() {
ret void
}
void pmu_adc_enable() {}


x86 assembly (clang, -O0):
<pmu_adc_enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_enable>:
ret

LLVM IR (-O0):
define void @pmu_adc_enable() {
ret void
}

LLVM IR (-O2):
define void @pmu_adc_enable() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ getgid();
int /*<<< orphan*/ getuid();
int setgid(int /*<<< orphan*/);
int setuid(int /*<<< orphan*/);
void jrnld_drop_privileges() {
  uid_t uid;
  gid_t gid;
  uid = getuid();
  assert(setuid(uid) != -1);
  gid = getgid();
  assert(setgid(gid) != -1);
}


x86 assembly (clang, -O0):
<jrnld_drop_privileges>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getuid@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1070 <setuid@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0x0,%al
call   1050 <getgid@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1060 <setgid@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jrnld_drop_privileges>:
push   %rax
xor    %eax,%eax
call   1030 <getuid@plt>
mov    %eax,%edi
call   1070 <setuid@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
setne  %dil
call   1040 <assert@plt>
xor    %eax,%eax
call   1050 <getgid@plt>
mov    %eax,%edi
call   1060 <setgid@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
setne  %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @jrnld_drop_privileges() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @getuid()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @setuid(i32 %4)
%6 = icmp ne i32 %5, -1
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = call i32 (...) @getgid()
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @setgid(i32 %10)
%12 = icmp ne i32 %11, -1
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
ret void
}

LLVM IR (-O2):
define void @jrnld_drop_privileges() {
%1 = tail call i32 (...) @getuid()
%2 = tail call i32 @setuid(i32 %1)
%3 = icmp ne i32 %2, -1
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 (...) @getgid()
%7 = tail call i32 @setgid(i32 %6)
%8 = icmp ne i32 %7, -1
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
ret void
}
/* Variables and functions */
long long middle(long long);
int /*<<< orphan*/ scanf(char *, long long *);
long long int cuts() {
  long long int cut_times, median, other_half;
  scanf("%lld", &cut_times);
  median = middle(cut_times);
  other_half = cut_times - median;
  return median * other_half;
}


x86 assembly (clang, -O0):
<cuts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xed1(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <scanf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <middle@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
imul   -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cuts>:
push   %rax
lea    0xed8(%rip),%rdi
mov    %rsp,%rsi
call   1030 <scanf@plt>
mov    (%rsp),%rdi
call   1040 <middle@plt>
mov    (%rsp),%rcx
sub    %rax,%rcx
imul   %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%lld\00"
define i64 @cuts() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %1)
%5 = load i64, i64* %1
%6 = call i64 @middle(i64 %5)
store i64 %6, i64* %2
%7 = load i64, i64* %1
%8 = load i64, i64* %2
%9 = sub nsw i64 %7, %8
store i64 %9, i64* %3
%10 = load i64, i64* %2
%11 = load i64, i64* %3
%12 = mul nsw i64 %10, %11
ret i64 %12
}

LLVM IR (-O2):
@.str = [5 x i8] c"%lld\00"
define i64 @cuts() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %1)
%4 = load i64, i64* %1
%5 = call i64 @middle(i64 %4)
%6 = load i64, i64* %1
%7 = sub nsw i64 %6, %5
%8 = mul nsw i64 %7, %5
ret i64 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_PKEY;

/* Variables and functions */
int pkey_set_type(int /*<<< orphan*/ *, int, int /*<<< orphan*/ *, int);
int EVP_PKEY_set_type(EVP_PKEY *pkey, int type) {
  return pkey_set_type(pkey, type, NULL, -1);
}


x86 assembly (clang, -O0):
<EVP_PKEY_set_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %eax,%eax
mov    %eax,%edx
mov    $0xffffffff,%ecx
call   1030 <pkey_set_type@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_PKEY_set_type>:
xor    %edx,%edx
mov    $0xffffffff,%ecx
jmp    1030 <pkey_set_type@plt>

LLVM IR (-O0):
define i32 @EVP_PKEY_set_type(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @pkey_set_type(i32* %5, i32 %6, i32* null, i32 -1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @EVP_PKEY_set_type(i32* %0, i32 %1) {
%3 = tail call i32 @pkey_set_type(i32* %0, i32 %1, i32* null, i32 -1)
ret i32 %3
}
void __attribute__((visibility("default")))
__cyg_profile_func_enter(void *child, void *parent) {}


x86 assembly (clang, -O0):
<__cyg_profile_func_enter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cyg_profile_func_enter>:
ret

LLVM IR (-O0):
define void @__cyg_profile_func_enter(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__cyg_profile_func_enter(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char const *, char const *);
FILE *FCEUD_UTF8fopen(const char *fn, const char *mode) {
  return (fopen(fn, mode));
}


x86 assembly (clang, -O0):
<FCEUD_UTF8fopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FCEUD_UTF8fopen>:
jmp    1030 <fopen@plt>

LLVM IR (-O0):
define i32* @FCEUD_UTF8fopen(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32* @fopen(i8* %5, i8* %6)
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @FCEUD_UTF8fopen(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
long double __ieee754_acosl(long double x) {
  fputs("__ieee754_acosl not implemented\n", stderr);
  __set_errno(ENOSYS);
  return 0.0;
}


x86 assembly (clang, -O0):
<__ieee754_acosl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
lea    0xec2(%rip),%rdi
call   1040 <fputs@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
fldz
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ieee754_acosl>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
fldz
pop    %rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"__ieee754_acosl not implemented\0A\00"
@stderr = global i32 0
@ENOSYS = global i32 0
define x86_fp80 @__ieee754_acosl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fputs(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret x86_fp80 0xK00000000000000000000
}

LLVM IR (-O2):
@.str = [33 x i8] c"__ieee754_acosl not implemented\0A\00"
@stderr = global i32 0
@ENOSYS = global i32 0
define x86_fp80 @__ieee754_acosl(x86_fp80 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @ENOSYS
%5 = tail call i32 @__set_errno(i32 %4)
ret x86_fp80 0xK00000000000000000000
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_NormalizeVec4_init(void) {
  _hmt_register_covercase("HMM_NormalizeVec4", "2");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_NormalizeVec4_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef0(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_NormalizeVec4_init>:
lea    0xee9(%rip),%rdi
lea    0xef4(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"HMM_NormalizeVec4\00"
@.str.1 = [2 x i8] c"2\00"
define void @_hmt_covercase_HMM_NormalizeVec4_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"HMM_NormalizeVec4\00"
@.str.1 = [2 x i8] c"2\00"
define void @_hmt_covercase_HMM_NormalizeVec4_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void GPMCPrefetchCSSelect(unsigned int baseAddr, unsigned int csNum) {
  (*((volatile unsigned int *)(baseAddr + (0x1E0 + ((1 - 1) * (0x4)))))) &=
      ~(0x07000000u);
  (*((volatile unsigned int *)(baseAddr + (0x1E0 + ((1 - 1) * (0x4)))))) |=
      ((csNum << (0x00000018u)) & (0x07000000u));
}


x86 assembly (clang, -O0):
<GPMCPrefetchCSSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1e0,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xf8ffffff,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
shl    $0x18,%edx
and    $0x7000000,%edx
mov    -0x4(%rbp),%eax
add    $0x1e0,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCPrefetchCSSelect>:
add    $0x1e0,%edi
andl   $0xf8ffffff,(%rdi)
and    $0x7,%esi
shl    $0x18,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPMCPrefetchCSSelect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 480
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -117440513
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = shl i32 %11, 24
%13 = and i32 %12, 117440512
%14 = load i32, i32* %3
%15 = add i32 %14, 480
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @GPMCPrefetchCSSelect(i32 %0, i32 %1) {
%3 = add i32 %0, 480
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -117440513
store volatile i32 %7, i32* %5
%8 = shl i32 %1, 24
%9 = and i32 %8, 117440512
%10 = load volatile i32, i32* %5
%11 = or i32 %10, %9
store volatile i32 %11, i32* %5
ret void
}
/* Variables and functions */
int strlen(char *);
int /*<<< orphan*/ switcharoni(char *, int /*<<< orphan*/, int);
void carbonInit() {
  char str[] = "Carbon";
  int string = strlen(str);
  switcharoni(str, 0, string - 1);
}


x86 assembly (clang, -O0):
<carbonInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x7(%rbp)
mov    0xecc(%rip),%ax
mov    %ax,-0x3(%rbp)
mov    0xec4(%rip),%al
mov    %al,-0x1(%rbp)
lea    -0x7(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
lea    -0x7(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1040 <switcharoni@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<carbonInit>:
push   %rbx
sub    $0x10,%rsp
movl   $0x6e6f62,0xb(%rsp)
movl   $0x62726143,0x8(%rsp)
62
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <strlen@plt>
lea    -0x1(%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <switcharoni@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.carbonInit.str = [7 x i8] c"Carbon\00"
define void @carbonInit() {
%1 = alloca [7 x i8]
%2 = alloca i32
%3 = bitcast [7 x i8]* %1 to i8*
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %2
%6 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = call i32 @switcharoni(i8* %6, i32 0, i32 %8)
ret void
}

LLVM IR (-O2):
@__const.carbonInit.str = [7 x i8] c"Carbon\00"
define void @carbonInit() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @strlen(i8* %2)
%4 = add nsw i32 %3, -1
%5 = call i32 @switcharoni(i8* %2, i32 0, i32 %4)
ret void
}
/* Variables and functions */
int __iscsym(int);
int iscsym(int c) { return __iscsym(c); }


x86 assembly (clang, -O0):
<iscsym>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__iscsym@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscsym>:
jmp    1030 <__iscsym@plt>

LLVM IR (-O0):
define i32 @iscsym(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__iscsym(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @iscsym(i32 %0) {
%2 = tail call i32 @__iscsym(i32 %0)
ret i32 %2
}
void host_message(const char *msg) {
  touch_buffer(msg, strlen(msg));
  __asm__ __volatile__(".byte 0x0f, 0x3f\n"
                       ".byte 0x00, "
                       "0x00"
                       "\n"
                       ".byte "
                       "0x01"
                       ", 0x00\n"
                       ".byte 0x00, 0x00, 0x00\n"
                       ".byte 0x00\n"
                       :
                       : "a"(msg));
}


x86 assembly (clang, -O0):
<host_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rsi
mov    $0x0,%al
call   1040 <touch_buffer@plt>
mov    -0x8(%rbp),%rax
(bad)
add    %al,(%rax)
add    %eax,(%rax)
add    %al,(%rax)
add    %al,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<host_message>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1040 <touch_buffer@plt>
mov    %rbx,%rax
(bad)
add    %al,(%rax)
add    %eax,(%rax)
add    %al,(%rax)
add    %al,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @host_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = call i32 (i8*, i64, ...) bitcast (i32 (...)* @touch_buffer to i32 (i8*, i64, ...)*)(i8* %3, i64 %5)
%7 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @host_message(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = tail call i32 (i8*, i64, ...) bitcast (i32 (...)* @touch_buffer to i32 (i8*, i64, ...)*)(i8* %0, i64 %2)
tail call void asm sideeffect ".byte 0x0f, 0x3f\0A.byte 0x00, 0x00\0A.byte 0x01, 0x00\0A.byte 0x00, 0x00, 0x00\0A.byte 0x00\0A", "{ax},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void assert3(void) { assert(2 == 3); }


x86 assembly (clang, -O0):
<assert3>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert3>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @assert3() {
%1 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @assert3() {
%1 = tail call i32 @assert(i32 0)
ret void
}
/* Variables and functions */
int japi_printer(int);
int j_printer(int arg0) { return (japi_printer(arg0)); }


x86 assembly (clang, -O0):
<j_printer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_printer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_printer>:
jmp    1030 <japi_printer@plt>

LLVM IR (-O0):
define i32 @j_printer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_printer(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_printer(i32 %0) {
%2 = tail call i32 @japi_printer(i32 %0)
ret i32 %2
}
/* Variables and functions */
int strcmp(char *const, char *const);
int compare_string_ptr(const void *p1, const void *p2) {
  return strcmp(*(char *const *)p1, *(char *const *)p2);
}


x86 assembly (clang, -O0):
<compare_string_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_string_ptr>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare_string_ptr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare_string_ptr(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int execute(char *, char *);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int load_module(char *name) {
  char msg[128], cmd[512];
  int ret;
  sprintf(msg, "Trying to load module %s", name);
  sprintf(cmd, "/sbin/modprobe %s", name);
  ret = execute(msg, cmd);
  return ret;
}


x86 assembly (clang, -O0):
<load_module>:
push   %rbp
mov    %rsp,%rbp
sub    $0x2a0,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x90(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xebf(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x290(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xec1(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x90(%rbp),%rdi
lea    -0x290(%rbp),%rsi
call   1030 <execute@plt>
mov    %eax,-0x294(%rbp)
mov    -0x294(%rbp),%eax
add    $0x2a0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_module>:
push   %r15
push   %r14
push   %rbx
sub    $0x280,%rsp
mov    %rdi,%rbx
lea    0xeca(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
mov    %rbx,%rdx
call   1040 <sprintf@plt>
lea    0xece(%rip),%rsi
lea    0x80(%rsp),%r15
mov    %r15,%rdi
mov    %rbx,%rdx
call   1040 <sprintf@plt>
mov    %r14,%rdi
mov    %r15,%rsi
call   1030 <execute@plt>
add    $0x280,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Trying to load module %s\00"
@.str.1 = [18 x i8] c"/sbin/modprobe %s\00"
define i32 @load_module(i8* %0) {
%2 = alloca i8*
%3 = alloca [128 x i8]
%4 = alloca [512 x i8]
%5 = alloca i32
store i8* %0, i8** %2
%6 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%7 = load i8*, i8** %2
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = getelementptr inbounds [512 x i8], [512 x i8]* %4, i64 0, i64 0
%10 = load i8*, i8** %2
%11 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i8* %10)
%12 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%13 = getelementptr inbounds [512 x i8], [512 x i8]* %4, i64 0, i64 0
%14 = call i32 @execute(i8* %12, i8* %13)
store i32 %14, i32* %5
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@.str = [25 x i8] c"Trying to load module %s\00"
@.str.1 = [18 x i8] c"/sbin/modprobe %s\00"
define i32 @load_module(i8* %0) {
%2 = alloca [128 x i8]
%3 = alloca [512 x i8]
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [512 x i8], [512 x i8]* %3, i64 0, i64 0
%6 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
%7 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%8 = call i32 @execute(i8* %4, i8* %5)
ret i32 %8
}
void gtk_icon_info_set_raw_coordinates() {}


x86 assembly (clang, -O0):
<gtk_icon_info_set_raw_coordinates>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_info_set_raw_coordinates>:
ret

LLVM IR (-O0):
define void @gtk_icon_info_set_raw_coordinates() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_info_set_raw_coordinates() {
ret void
}
void rop3_155_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T | S;
  stk2 = *D & stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_155_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_155_0_0>:
or     %esi,%edx
and    (%rdi),%dl
xor    %sil,%dl
not    %dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_155_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = and i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %5
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = load i8*, i8** %4
store i8 %33, i8* %34
ret void
}

LLVM IR (-O2):
define void @rop3_155_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = or i8 %2, %1
%5 = load i8, i8* %0
%6 = and i8 %5, %4
%7 = xor i8 %6, %1
%8 = xor i8 %7, -1
store i8 %8, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ inlined();
int /*<<< orphan*/ inlined2();
main() {
  inlined();
  inlined2();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <inlined@plt>
mov    $0x0,%al
call   1040 <inlined2@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <inlined@plt>
xor    %eax,%eax
call   1040 <inlined2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @inlined()
%2 = call i32 (...) @inlined2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @inlined()
%2 = tail call i32 (...) @inlined2()
ret i32 0
}
/* Variables and functions */
scalar_t__ get_glyph_gen(char const *, char *, char, int /*<<< orphan*/,
                         int /*<<< orphan*/, int /*<<< orphan*/);
const char *get_glyph_nc(const char *iptr, char *optr, char mchar) {
  return (const char *)get_glyph_gen(iptr, optr, mchar, 0, 0, 0);
}


x86 assembly (clang, -O0):
<get_glyph_nc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %r9d,%r9d
movsbl -0x11(%rbp),%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <get_glyph_gen@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_glyph_nc>:
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <get_glyph_gen@plt>

LLVM IR (-O0):
define i8* @get_glyph_nc(i8* %0, i8* %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8, i8* %6
%10 = call i64 @get_glyph_gen(i8* %7, i8* %8, i8 signext %9, i32 0, i32 0, i32 0)
%11 = inttoptr i64 %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define i8* @get_glyph_nc(i8* %0, i8* %1, i8 signext %2) {
%4 = tail call i64 @get_glyph_gen(i8* %0, i8* %1, i8 signext %2, i32 0, i32 0, i32 0)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
void thd_mutex_lock(int *p) {}


x86 assembly (clang, -O0):
<thd_mutex_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<thd_mutex_lock>:
ret

LLVM IR (-O0):
define void @thd_mutex_lock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @thd_mutex_lock(i32* nocapture %0) {
ret void
}
int checkbit(char *p, int n) {
  return (((p[n / 8] >> ((8 - 1) - n % 8)) & 01));
}


x86 assembly (clang, -O0):
<checkbit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
mov    $0x7,%ecx
sub    %edx,%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkbit>:
lea    0x7(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
mov    %ecx,%eax
sar    $0x3,%eax
cltq
movsbl (%rdi,%rax,1),%eax
and    $0xfffffff8,%ecx
sub    %ecx,%esi
mov    $0x7,%cl
sub    %sil,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @checkbit(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sdiv i32 %6, 8
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = load i32, i32* %4
%13 = srem i32 %12, 8
%14 = sub nsw i32 7, %13
%15 = ashr i32 %11, %14
%16 = and i32 %15, 1
ret i32 %16
}

LLVM IR (-O2):
define i32 @checkbit(i8* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = srem i32 %1, 8
%9 = sub nsw i32 7, %8
%10 = lshr i32 %7, %9
%11 = and i32 %10, 1
ret i32 %11
}
void copy(char *destination, const char *source) {
  *destination = *source;
  if (*source == '\0')
    return;
  copy(destination + 1, source + 1);
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1141 <copy+0x31>
jmp    1156 <copy+0x46>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
mov    -0x10(%rbp),%rsi
add    $0x1,%rsi
call   1030 <copy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
mov    (%rsi),%al
mov    %al,(%rdi)
cmpb   $0x0,(%rsi)
je     1121 <copy+0x21>
mov    $0x1,%eax
xchg   %ax,%ax
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
cmpb   $0x0,(%rsi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <copy+0x10>
ret

LLVM IR (-O0):
define void @copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = load i8*, i8** %3
store i8 %6, i8* %7
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
br label %18
13: ; preds = %2
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i64 1
br label %18
18: ; preds = %13, %12
ret void
}

LLVM IR (-O2):
define void @copy(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
store i8 %3, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %2, %6
%7 = phi i8* [ %10, %6 ], [ %1, %2 ]
%8 = phi i8* [ %9, %6 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
store i8 %11, i8* %9
%12 = load i8, i8* %10
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret void
}
/* Variables and functions */
unsigned short inw(int);
int /*<<< orphan*/ smbus_delay();
int smbus_wait_until_ready(void) {
  unsigned long loops;
  loops = (100 * 1000 * 10);
  do {
    unsigned short val;
    smbus_delay();
    val = inw(0x1000 + 0xe0);
    if ((val & 0x800) == 0) {
      break;
    }
  } while (--loops);
  return loops ? 0 : -1;
}


x86 assembly (clang, -O0):
<smbus_wait_until_ready>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0xf4240,-0x8(%rbp)
mov    $0x0,%al
call   1040 <smbus_delay@plt>
mov    $0x10e0,%edi
call   1030 <inw@plt>
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
and    $0x800,%eax
cmp    $0x0,%eax
jne    115c <smbus_wait_until_ready+0x3c>
jmp    1177 <smbus_wait_until_ready+0x57>
jmp    1161 <smbus_wait_until_ready+0x41>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    1130 <smbus_wait_until_ready+0x10>
mov    -0x8(%rbp),%rdx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbus_wait_until_ready>:
push   %rbx
mov    $0xf4240,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <smbus_delay@plt>
mov    $0x10e0,%edi
call   1030 <inw@plt>
test   $0x800,%eax
je     1150 <smbus_wait_until_ready+0x30>
add    $0xffffffffffffffff,%rbx
jne    1130 <smbus_wait_until_ready+0x10>
xor    %ebx,%ebx
cmp    $0x1,%rbx
sbb    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @smbus_wait_until_ready() {
%1 = alloca i64
%2 = alloca i16
store i64 1000000, i64* %1
br label %3
3: ; preds = %12, %0
%4 = call i32 (...) @smbus_delay()
%5 = call zeroext i16 @inw(i32 4320)
store i16 %5, i16* %2
%6 = load i16, i16* %2
%7 = zext i16 %6 to i32
%8 = and i32 %7, 2048
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
br label %16
11: ; preds = %3
br label %12
12: ; preds = %11
%13 = load i64, i64* %1
%14 = add i64 %13, -1
store i64 %14, i64* %1
%15 = icmp ne i64 %14, 0
br i1 %15, label %3, label %16
16: ; preds = %12, %10
%17 = load i64, i64* %1
%18 = icmp ne i64 %17, 0
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 0, i32 -1
ret i32 %20
}

LLVM IR (-O2):
define i32 @smbus_wait_until_ready() {
br label %1
1: ; preds = %7, %0
%2 = phi i64 [ 1000000, %0 ], [ %8, %7 ]
%3 = tail call i32 (...) @smbus_delay()
%4 = tail call zeroext i16 @inw(i32 4320)
%5 = and i16 %4, 2048
%6 = icmp eq i16 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = add nsw i64 %2, -1
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %1
10: ; preds = %1, %7
%11 = phi i64 [ %2, %1 ], [ 0, %7 ]
%12 = icmp eq i64 %11, 0
%13 = sext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ srandom(long);
void inicializa_random(long semilla) { srandom(semilla); }


x86 assembly (clang, -O0):
<inicializa_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <srandom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inicializa_random>:
jmp    1030 <srandom@plt>

LLVM IR (-O0):
define void @inicializa_random(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @srandom(i64 %3)
ret void
}

LLVM IR (-O2):
define void @inicializa_random(i64 %0) {
%2 = tail call i32 @srandom(i64 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HAA_init_heap();
void heap_init() { HAA_init_heap(); }


x86 assembly (clang, -O0):
<heap_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HAA_init_heap@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_init>:
xor    %eax,%eax
jmp    1030 <HAA_init_heap@plt>

LLVM IR (-O0):
define void @heap_init() {
%1 = call i32 (...) @HAA_init_heap()
ret void
}

LLVM IR (-O2):
define void @heap_init() {
%1 = tail call i32 (...) @HAA_init_heap()
ret void
}
void bfunc(const char *arg) { return; }


x86 assembly (clang, -O0):
<bfunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bfunc>:
ret

LLVM IR (-O0):
define void @bfunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @bfunc(i8* nocapture %0) {
ret void
}
/* Variables and functions */
char *malloc(int);
void get(char **p) { *p = malloc(100); }


x86 assembly (clang, -O0):
<get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x64,%edi
call   1030 <malloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get>:
push   %rbx
mov    %rdi,%rbx
mov    $0x64,%edi
call   1030 <malloc@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @get(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i8* @malloc(i32 100)
%4 = load i8**, i8*** %2
store i8* %3, i8** %4
ret void
}

LLVM IR (-O2):
define void @get(i8** nocapture writeonly %0) {
%2 = tail call dereferenceable_or_null(100) i8* @malloc(i32 100)
store i8* %2, i8** %0
ret void
}
/* Variables and functions */
int sprint_open_modes(int);
int /*<<< orphan*/ tprints(int);
void tprint_open_modes(int flags) {
  tprints(sprint_open_modes(flags) + sizeof("flags"));
}


x86 assembly (clang, -O0):
<tprint_open_modes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sprint_open_modes@plt>
cltq
add    $0x6,%rax
mov    %eax,%edi
call   1040 <tprints@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tprint_open_modes>:
push   %rax
call   1030 <sprint_open_modes@plt>
lea    0x6(%rax),%edi
pop    %rax
jmp    1040 <tprints@plt>

LLVM IR (-O0):
define void @tprint_open_modes(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sprint_open_modes(i32 %3)
%5 = sext i32 %4 to i64
%6 = add i64 %5, 6
%7 = trunc i64 %6 to i32
%8 = call i32 @tprints(i32 %7)
ret void
}

LLVM IR (-O2):
define void @tprint_open_modes(i32 %0) {
%2 = tail call i32 @sprint_open_modes(i32 %0)
%3 = add i32 %2, 6
%4 = tail call i32 @tprints(i32 %3)
ret void
}
unsigned long unsignedlong_ignoring_longlongint(unsigned long x,
                                                long long int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlong_ignoring_longlongint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlong_ignoring_longlongint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlong_ignoring_longlongint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlong_ignoring_longlongint(i64 returned %0, i64 %1) {
ret i64 %0
}