xunge/DecIR huggingface dataset:
/* Variables and functions */
int read(int, char *, int);
int cread(int fd, char *buf, int n) {
  int nread;
  if ((nread = read(fd, buf, n)) < 0) {
    return -1;
  }
  return nread;
}


x86 assembly (clang, -O0):
<cread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <read@plt>
mov    %eax,-0x18(%rbp)
cmp    $0x0,%eax
jge    1149 <cread+0x39>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <cread+0x3f>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cread>:
push   %rax
call   1030 <read@plt>
test   %eax,%eax
mov    $0xffffffff,%ecx
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cread(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @read(i32 %9, i8* %10, i32 %11)
store i32 %12, i32* %8
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %3
store i32 -1, i32* %4
br label %17
15: ; preds = %3
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %17
17: ; preds = %15, %14
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @cread(i32 %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i32 %2)
%5 = icmp sgt i32 %4, -1
%6 = select i1 %5, i32 %4, i32 -1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xc8() {
  Assert_real((isgraph(200) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              1005, ("isgraph should be 0 for 0xc8"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xc8>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc8,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3ed,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xc8>:
push   %rax
mov    $0xc8,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3ed,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xc8\00"
define void @t_isgraph_0xc8() {
%1 = call i64 @isgraph(i32 200)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1005, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xc8\00"
define void @t_isgraph_0xc8() {
%1 = tail call i64 @isgraph(i32 200)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1005, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct client {
  int dummy;
};

/* Variables and functions */
scalar_t__ client_get_uid(struct client const *);
__attribute__((pure)) bool client_is_local(const struct client *client) {
  return client_get_uid(client) > 0;
}


x86 assembly (clang, -O0):
<client_is_local>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <client_get_uid@plt>
cmp    $0x0,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<client_is_local>:
push   %rax
call   1030 <client_get_uid@plt>
xor    %ecx,%ecx
test   %rax,%rax
setg   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.client = type { i32 }
define i32 @client_is_local(%struct.client* %0) {
%2 = alloca %struct.client*
store %struct.client* %0, %struct.client** %2
%3 = load %struct.client*, %struct.client** %2
%4 = call i64 @client_get_uid(%struct.client* %3)
%5 = icmp sgt i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.client = type { i32 }
define i32 @client_is_local(%struct.client* %0) {
%2 = tail call i64 @client_get_uid(%struct.client* %0)
%3 = icmp sgt i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int bit_length(unsigned int num) {
  int count = 0;
  while (num) {
    count++;
    num >>= 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<bit_length>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <bit_length+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bit_length+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_length>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bit_length+0x1c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <bit_length+0x10>
ret

LLVM IR (-O0):
define i32 @bit_length(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = lshr i32 %10, 1
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @bit_length(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = lshr i32 %5, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ mod_alarm_init();
int /*<<< orphan*/ mod_battery_init();
int /*<<< orphan*/ mod_clock_init();
int /*<<< orphan*/ mod_reset_init();
int /*<<< orphan*/ mod_rpc_init();
void mod_init(void) {
  mod_rpc_init();
  mod_reset_init();
  mod_alarm_init();
  mod_battery_init();
  mod_clock_init();
}


x86 assembly (clang, -O0):
<mod_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mod_rpc_init@plt>
mov    $0x0,%al
call   1060 <mod_reset_init@plt>
mov    $0x0,%al
call   1040 <mod_alarm_init@plt>
mov    $0x0,%al
call   1050 <mod_battery_init@plt>
mov    $0x0,%al
call   1070 <mod_clock_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_init>:
push   %rax
xor    %eax,%eax
call   1030 <mod_rpc_init@plt>
xor    %eax,%eax
call   1060 <mod_reset_init@plt>
xor    %eax,%eax
call   1040 <mod_alarm_init@plt>
xor    %eax,%eax
call   1050 <mod_battery_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <mod_clock_init@plt>

LLVM IR (-O0):
define void @mod_init() {
%1 = call i32 (...) @mod_rpc_init()
%2 = call i32 (...) @mod_reset_init()
%3 = call i32 (...) @mod_alarm_init()
%4 = call i32 (...) @mod_battery_init()
%5 = call i32 (...) @mod_clock_init()
ret void
}

LLVM IR (-O2):
define void @mod_init() {
%1 = tail call i32 (...) @mod_rpc_init()
%2 = tail call i32 (...) @mod_reset_init()
%3 = tail call i32 (...) @mod_alarm_init()
%4 = tail call i32 (...) @mod_battery_init()
%5 = tail call i32 (...) @mod_clock_init()
ret void
}
/* Variables and functions */
int maximum(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("The biggest number is %i\n", maximum(12, 42));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xc,%edi
mov    $0x2a,%esi
call   1030 <maximum@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc,%edi
mov    $0x2a,%esi
call   1030 <maximum@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"The biggest number is %i\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @maximum(i32 12, i32 42)
%3 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [26 x i8] c"The biggest number is %i\0A\00"
define i32 @main() {
%1 = tail call i32 @maximum(i32 12, i32 42)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int floor(int);
int calc_row(int n, int index) { return floor(index / n); }


x86 assembly (clang, -O0):
<calc_row>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0x4(%rbp)
mov    %eax,%edi
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_row>:
mov    %esi,%eax
cltd
idiv   %edi
mov    %eax,%edi
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @calc_row(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sdiv i32 %5, %6
%8 = call i32 @floor(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @calc_row(i32 %0, i32 %1) {
%3 = sdiv i32 %1, %0
%4 = tail call i32 @floor(i32 %3)
ret i32 %4
}
void f(const int *x) {}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @f(i32* nocapture %0) {
ret void
}
void test_two(int x, int y) {
#pragma omp distribute
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      ;
}


x86 assembly (clang, -O0):
<test_two>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1156 <test_two+0x56>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1143 <test_two+0x43>
jmp    1135 <test_two+0x35>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1124 <test_two+0x24>
jmp    1148 <test_two+0x48>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <test_two+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_two>:
ret

LLVM IR (-O0):
define void @test_two(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
store i32 0, i32* %6
br label %12
12: ; preds = %17, %11
%13 = load i32, i32* %6
%14 = load i32, i32* %4
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
br label %17
17: ; preds = %16
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
br label %12
20: ; preds = %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @test_two(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
double ft_cos(double);
double ft_sin(double);
double ft_tan(double angle) { return (ft_sin(angle) / ft_cos(angle)); }


x86 assembly (clang, -O0):
<ft_tan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <ft_sin@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ft_cos@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_tan>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <ft_sin@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <ft_cos@plt>
movsd  0x10(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @ft_tan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @ft_sin(double %3)
%5 = load double, double* %2
%6 = call double @ft_cos(double %5)
%7 = fdiv double %4, %6
ret double %7
}

LLVM IR (-O2):
define double @ft_tan(double %0) {
%2 = tail call double @ft_sin(double %0)
%3 = tail call double @ft_cos(double %0)
%4 = fdiv double %2, %3
ret double %4
}
void free_list(struct item *head) { ; }


x86 assembly (clang, -O0):
<free_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_list>:
ret

LLVM IR (-O0):
%struct.item = type opaque
define void @free_list(%struct.item* %0) {
%2 = alloca %struct.item*
store %struct.item* %0, %struct.item** %2
ret void
}

LLVM IR (-O2):
%struct.item = type opaque
define void @free_list(%struct.item* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLfloat;

/* Variables and functions */
int /*<<< orphan*/ GL_LINES;
int /*<<< orphan*/ glBegin(int /*<<< orphan*/);
int /*<<< orphan*/ glEnd();
int /*<<< orphan*/ glVertex2f(int /*<<< orphan*/, int /*<<< orphan*/);
void drawOneLine(GLfloat x1, GLfloat y1, GLfloat x2, GLfloat y2) {
  glBegin(GL_LINES);
  glVertex2f((x1), (y1));
  glVertex2f((x2), (y2));
  glEnd();
}


x86 assembly (clang, -O0):
<drawOneLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1050 <glBegin@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <glVertex2f@plt>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <glVertex2f@plt>
mov    $0x0,%al
call   1030 <glEnd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawOneLine>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%ebx
mov    %edi,%ebp
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1050 <glBegin@plt>
mov    %ebp,%edi
mov    %ebx,%esi
call   1040 <glVertex2f@plt>
mov    %r15d,%edi
mov    %r14d,%esi
call   1040 <glVertex2f@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <glEnd@plt>

LLVM IR (-O0):
@GL_LINES = global i32 0
define void @drawOneLine(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @GL_LINES
%10 = call i32 @glBegin(i32 %9)
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = call i32 @glVertex2f(i32 %11, i32 %12)
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = call i32 @glVertex2f(i32 %14, i32 %15)
%17 = call i32 (...) @glEnd()
ret void
}

LLVM IR (-O2):
@GL_LINES = global i32 0
define void @drawOneLine(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = load i32, i32* @GL_LINES
%6 = tail call i32 @glBegin(i32 %5)
%7 = tail call i32 @glVertex2f(i32 %0, i32 %1)
%8 = tail call i32 @glVertex2f(i32 %2, i32 %3)
%9 = tail call i32 (...) @glEnd()
ret void
}
/* Type definitions */
struct MemoryPage {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ MAFreeMemoryBlock(struct MemoryPage *, void *);
void MARemoveMemoryBlock(struct MemoryPage *p_mempage, void *p) {
  MAFreeMemoryBlock(p_mempage, p);
  return;
}


x86 assembly (clang, -O0):
<MARemoveMemoryBlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <MAFreeMemoryBlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MARemoveMemoryBlock>:
jmp    1030 <MAFreeMemoryBlock@plt>

LLVM IR (-O0):
%struct.MemoryPage = type { i32 }
define void @MARemoveMemoryBlock(%struct.MemoryPage* %0, i8* %1) {
%3 = alloca %struct.MemoryPage*
%4 = alloca i8*
store %struct.MemoryPage* %0, %struct.MemoryPage** %3
store i8* %1, i8** %4
%5 = load %struct.MemoryPage*, %struct.MemoryPage** %3
%6 = load i8*, i8** %4
%7 = call i32 @MAFreeMemoryBlock(%struct.MemoryPage* %5, i8* %6)
ret void
}

LLVM IR (-O2):
%struct.MemoryPage = type { i32 }
define void @MARemoveMemoryBlock(%struct.MemoryPage* %0, i8* %1) {
%3 = tail call i32 @MAFreeMemoryBlock(%struct.MemoryPage* %0, i8* %1)
ret void
}
int is_divisible_by(int x, int y) { return x % y == 0; }


x86 assembly (clang, -O0):
<is_divisible_by>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_divisible_by>:
mov    %edi,%eax
cltd
idiv   %esi
xor    %eax,%eax
test   %edx,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @is_divisible_by(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @is_divisible_by(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int __crow_sub(int a, int b) { return a - b; }


x86 assembly (clang, -O0):
<__crow_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__crow_sub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @__crow_sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @__crow_sub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bson_fatal_msg(int, char *);
void *realloc(void *, int);
void *bson_realloc(void *ptr, int size) {
  void *p = realloc(ptr, size);
  bson_fatal_msg(!!p, "realloc() failed");
  return p;
}


x86 assembly (clang, -O0):
<bson_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
lea    0xea9(%rip),%rsi
call   1040 <bson_fatal_msg@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bson_realloc>:
push   %rbx
call   1030 <realloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
lea    0xec7(%rip),%rsi
call   1040 <bson_fatal_msg@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"realloc() failed\00"
define i8* @bson_realloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @realloc(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = xor i1 %10, true
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = call i32 @bson_fatal_msg(i32 %13, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@.str = [17 x i8] c"realloc() failed\00"
define i8* @bson_realloc(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @bson_fatal_msg(i32 %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ android_atomic_add(int, int /*<<< orphan*/ volatile *);
extern int32_t android_atomic_dec(volatile int32_t *addr) {
  return android_atomic_add(-1, addr);
}


x86 assembly (clang, -O0):
<android_atomic_dec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xffffffff,%edi
call   1030 <android_atomic_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_atomic_dec>:
mov    %rdi,%rsi
mov    $0xffffffff,%edi
jmp    1030 <android_atomic_add@plt>

LLVM IR (-O0):
define i32 @android_atomic_dec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @android_atomic_add(i32 -1, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @android_atomic_dec(i32* %0) {
%2 = tail call i32 @android_atomic_add(i32 -1, i32* %0)
ret i32 %2
}
char *strchr(const char *str, int c) {
  while (*str)
    if (*str == c)
      return (char *)str;
    else
      str++;
  return 0;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <strchr+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1135 <strchr+0x35>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <strchr+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchr+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <strchr+0x23>
mov    %rdi,%rax
nopl   0x0(%rax)
movsbl %cl,%ecx
cmp    %esi,%ecx
je     1125 <strchr+0x25>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %5
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %4
store i8* %17, i8** %3
br label %23
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %4
br label %21
21: ; preds = %18
br label %6
22: ; preds = %6
store i8* null, i8** %3
br label %23
23: ; preds = %22, %16
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %10
%6 = phi i8 [ %12, %10 ], [ %3, %2 ]
%7 = phi i8* [ %11, %10 ], [ %0, %2 ]
%8 = sext i8 %6 to i32
%9 = icmp eq i32 %8, %1
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %10, %2
%15 = phi i8* [ null, %2 ], [ null, %10 ], [ %7, %5 ]
ret i8* %15
}
/* Type definitions */
struct msgbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ *malloc(size_t);
int /*<<< orphan*/ msgbuf_use(struct msgbuf *, int /*<<< orphan*/ *, size_t);
void msgbuf_init(struct msgbuf *b, size_t size) {
  msgbuf_use(b, size ? malloc(size) : NULL, size);
}


x86 assembly (clang, -O0):
<msgbuf_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1155 <msgbuf_init+0x35>
mov    -0x10(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x20(%rbp)
jmp    1160 <msgbuf_init+0x40>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
jmp    1160 <msgbuf_init+0x40>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <msgbuf_use@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgbuf_init>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
test   %rsi,%rsi
je     113c <msgbuf_init+0x1c>
mov    %rbx,%rdi
call   1030 <malloc@plt>
mov    %rax,%rsi
jmp    113e <msgbuf_init+0x1e>
xor    %esi,%esi
mov    %r14,%rdi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <msgbuf_use@plt>

LLVM IR (-O0):
%struct.msgbuf = type { i32 }
define void @msgbuf_init(%struct.msgbuf* %0, i64 %1) {
%3 = alloca %struct.msgbuf*
%4 = alloca i64
store %struct.msgbuf* %0, %struct.msgbuf** %3
store i64 %1, i64* %4
%5 = load %struct.msgbuf*, %struct.msgbuf** %3
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i64, i64* %4
%10 = call i32* @malloc(i64 %9)
br label %12
11: ; preds = %2
br label %12
12: ; preds = %11, %8
%13 = phi i32* [ %10, %8 ], [ null, %11 ]
%14 = load i64, i64* %4
%15 = call i32 @msgbuf_use(%struct.msgbuf* %5, i32* %13, i64 %14)
ret void
}

LLVM IR (-O2):
%struct.msgbuf = type { i32 }
define void @msgbuf_init(%struct.msgbuf* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32* @malloc(i64 %1)
br label %6
6: ; preds = %2, %4
%7 = phi i32* [ %5, %4 ], [ null, %2 ]
%8 = tail call i32 @msgbuf_use(%struct.msgbuf* %0, i32* %7, i64 %1)
ret void
}
char *__attribute__((unused)) strchr(const char *s, int c) {
  char ch = c;
  while (*s) {
    if (*s == ch)
      return (char *)s;
    ++s;
  }
  if (ch != '\0') {
    return (void *)0;
  } else {
    return (char *)s;
  }
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %al,-0x15(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114f <strchr+0x4f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x15(%rbp),%ecx
cmp    %ecx,%eax
jne    113e <strchr+0x3e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1171 <strchr+0x71>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1111 <strchr+0x11>
movsbl -0x15(%rbp),%eax
cmp    $0x0,%eax
je     1169 <strchr+0x69>
movq   $0x0,-0x8(%rbp)
jmp    1171 <strchr+0x71>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <strchr+0x23>
movsbl %sil,%edx
nopl   (%rax)
movsbl %cl,%ecx
cmp    %ecx,%edx
je     112c <strchr+0x2c>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strchr+0x10>
xor    %ecx,%ecx
test   %sil,%sil
cmovne %rcx,%rax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = trunc i32 %7 to i8
store i8 %8, i8* %6
br label %9
9: ; preds = %22, %2
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %6
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %22
20: ; preds = %13
%21 = load i8*, i8** %4
store i8* %21, i8** %3
br label %32
22: ; preds = %13
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %9
25: ; preds = %9
%26 = load i8, i8* %6
%27 = sext i8 %26 to i32
%28 = icmp ne i32 %27, 0
br i1 %28, label %29, label %30
29: ; preds = %25
store i8* null, i8** %3
br label %32
30: ; preds = %25
%31 = load i8*, i8** %4
store i8* %31, i8** %3
br label %32
32: ; preds = %30, %29, %20
%33 = load i8*, i8** %3
ret i8* %33
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2
%6 = shl i32 %1, 24
%7 = ashr exact i32 %6, 24
br label %8
8: ; preds = %5, %13
%9 = phi i8 [ %3, %5 ], [ %15, %13 ]
%10 = phi i8* [ %0, %5 ], [ %14, %13 ]
%11 = sext i8 %9 to i32
%12 = icmp eq i32 %7, %11
br i1 %12, label %22, label %13
13: ; preds = %8
%14 = getelementptr inbounds i8, i8* %10, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %8
17: ; preds = %13, %2
%18 = phi i8* [ %0, %2 ], [ %14, %13 ]
%19 = and i32 %1, 255
%20 = icmp eq i32 %19, 0
%21 = select i1 %20, i8* %18, i8* null
br label %22
22: ; preds = %8, %17
%23 = phi i8* [ %21, %17 ], [ %10, %8 ]
ret i8* %23
}
long int ar_member_pos(desc, name, hdrpos, datapos, size, date, uid, gid, mode,
                       mem)
int desc;
char *name;
long int hdrpos, datapos, size, date;
int uid, gid, mode;
char *mem;
{
  if (!ar_name_equal(name, mem))
    return 0;
  return hdrpos;
}


x86 assembly (clang, -O0):
<ar_member_pos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x28(%rbp),%rax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x18(%rbp),%rdi
mov    0x28(%rbp),%rsi
mov    $0x0,%al
call   1030 <ar_name_equal@plt>
cmp    $0x0,%eax
jne    1161 <ar_member_pos+0x51>
movq   $0x0,-0x8(%rbp)
jmp    1169 <ar_member_pos+0x59>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar_member_pos>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rdi
mov    0x38(%rsp),%rsi
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <ar_name_equal@plt>
test   %eax,%eax
cmovne %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @ar_member_pos(i32 %0, i8* %1, i64 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32 %7, i32 %8, i8* %9) {
%11 = alloca i64
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i64
%15 = alloca i64
%16 = alloca i64
%17 = alloca i64
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i8*
store i32 %0, i32* %12
store i8* %1, i8** %13
store i64 %2, i64* %14
store i64 %3, i64* %15
store i64 %4, i64* %16
store i64 %5, i64* %17
store i32 %6, i32* %18
store i32 %7, i32* %19
store i32 %8, i32* %20
store i8* %9, i8** %21
%22 = load i8*, i8** %13
%23 = load i8*, i8** %21
%24 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @ar_name_equal to i32 (i8*, i8*, ...)*)(i8* %22, i8* %23)
%25 = icmp ne i32 %24, 0
br i1 %25, label %27, label %26
26: ; preds = %10
store i64 0, i64* %11
br label %29
27: ; preds = %10
%28 = load i64, i64* %14
store i64 %28, i64* %11
br label %29
29: ; preds = %27, %26
%30 = load i64, i64* %11
ret i64 %30
}

LLVM IR (-O2):
define i64 @ar_member_pos(i32 %0, i8* %1, i64 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32 %7, i32 %8, i8* %9) {
%11 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @ar_name_equal to i32 (i8*, i8*, ...)*)(i8* %1, i8* %9)
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, i64 0, i64 %2
ret i64 %13
}
void dnk_init(char **args) {}


x86 assembly (clang, -O0):
<dnk_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dnk_init>:
ret

LLVM IR (-O0):
define void @dnk_init(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret void
}

LLVM IR (-O2):
define void @dnk_init(i8** nocapture %0) {
ret void
}
int parse_adaptation_field(unsigned char *buf, int len) {
  unsigned char adaptation_field_length;
  adaptation_field_length = buf[0];
  if (adaptation_field_length > 0) {
  }
  return adaptation_field_length + 1;
}


x86 assembly (clang, -O0):
<parse_adaptation_field>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
cmp    $0x0,%eax
jle    1126 <parse_adaptation_field+0x26>
jmp    1126 <parse_adaptation_field+0x26>
movzbl -0xd(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_adaptation_field>:
movzbl (%rdi),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @parse_adaptation_field(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
store i8 %8, i8* %5
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %2
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = add nsw i32 %15, 1
ret i32 %16
}

LLVM IR (-O2):
define i32 @parse_adaptation_field(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = add nuw nsw i32 %4, 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ foo(int);
int main() { return !foo(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <foo@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <foo@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 1)
%3 = icmp ne i32 %2, 0
%4 = xor i1 %3, true
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 1)
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
int re_match_2(bufp, string1, size1, string2, size2, pos, regs, stop)
struct re_pattern_buffer *bufp;
const char *string1, *string2;
int size1, size2;
int pos;
struct re_registers *regs;
int stop;
{
  int result;
  result = re_match_2_internal(bufp, string1, size1, string2, size2, pos, regs,
                               stop);
  __builtin_alloca(0);
  return result;
}


x86 assembly (clang, -O0):
<re_match_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9d,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
mov    -0x28(%rbp),%r9d
mov    0x10(%rbp),%r10
mov    0x18(%rbp),%eax
mov    %r10,(%rsp)
mov    %eax,0x8(%rsp)
mov    $0x0,%al
call   1030 <re_match_2_internal@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<re_match_2>:
push   %rax
mov    0x18(%rsp),%r10d
xor    %eax,%eax
push   %r10
push   0x18(%rsp)
call   1030 <re_match_2_internal@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match_2(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i8* %3, i32 %4, i32 %5, %struct.re_registers* %6, i32 %7) {
%9 = alloca %struct.re_pattern_buffer*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i32
%14 = alloca i32
%15 = alloca %struct.re_registers*
%16 = alloca i32
%17 = alloca i32
store %struct.re_pattern_buffer* %0, %struct.re_pattern_buffer** %9
store i8* %1, i8** %10
store i32 %2, i32* %11
store i8* %3, i8** %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store %struct.re_registers* %6, %struct.re_registers** %15
store i32 %7, i32* %16
%18 = load %struct.re_pattern_buffer*, %struct.re_pattern_buffer** %9
%19 = load i8*, i8** %10
%20 = load i32, i32* %11
%21 = load i8*, i8** %12
%22 = load i32, i32* %13
%23 = load i32, i32* %14
%24 = load %struct.re_registers*, %struct.re_registers** %15
%25 = load i32, i32* %16
%26 = call i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_match_2_internal to i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %18, i8* %19, i32 %20, i8* %21, i32 %22, i32 %23, %struct.re_registers* %24, i32 %25)
store i32 %26, i32* %17
%27 = alloca i8, i64 0
%28 = load i32, i32* %17
ret i32 %28
}

LLVM IR (-O2):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match_2(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i8* %3, i32 %4, i32 %5, %struct.re_registers* %6, i32 %7) {
%9 = tail call i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_match_2_internal to i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i8* %3, i32 %4, i32 %5, %struct.re_registers* %6, i32 %7)
ret i32 %9
}
void MAID_unregister_address(void *p) {}


x86 assembly (clang, -O0):
<MAID_unregister_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAID_unregister_address>:
ret

LLVM IR (-O0):
define void @MAID_unregister_address(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @MAID_unregister_address(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MEM_SetByte(unsigned int, unsigned int);
void m68k_write_memory_8(unsigned int addr, unsigned int val) {
  MEM_SetByte(addr, val);
}


x86 assembly (clang, -O0):
<m68k_write_memory_8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <MEM_SetByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_write_memory_8>:
jmp    1030 <MEM_SetByte@plt>

LLVM IR (-O0):
define void @m68k_write_memory_8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @MEM_SetByte(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @m68k_write_memory_8(i32 %0, i32 %1) {
%3 = tail call i32 @MEM_SetByte(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int strcmp(char const *, char const *);
int vstrcmp(const char *s1, const char *s2) {
  if (!s1 && !s2)
    return 0;
  else if (!s1 || !s2)
    return 1;
  else
    return strcmp(s1, s2);
}


x86 assembly (clang, -O0):
<vstrcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1142 <vstrcmp+0x32>
cmpq   $0x0,-0x18(%rbp)
jne    1142 <vstrcmp+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1174 <vstrcmp+0x64>
cmpq   $0x0,-0x10(%rbp)
je     1158 <vstrcmp+0x48>
cmpq   $0x0,-0x18(%rbp)
jne    1164 <vstrcmp+0x54>
movl   $0x1,-0x4(%rbp)
jmp    1174 <vstrcmp+0x64>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vstrcmp>:
xor    %eax,%eax
mov    %rdi,%rcx
or     %rsi,%rcx
je     112e <vstrcmp+0x1e>
mov    $0x1,%eax
test   %rdi,%rdi
je     112e <vstrcmp+0x1e>
test   %rsi,%rsi
je     112e <vstrcmp+0x1e>
jmp    1030 <strcmp@plt>
ret

LLVM IR (-O0):
define i32 @vstrcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %8
store i32 0, i32* %3
br label %23
12: ; preds = %8, %2
%13 = load i8*, i8** %4
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i8*, i8** %5
%17 = icmp ne i8* %16, null
br i1 %17, label %19, label %18
18: ; preds = %15, %12
store i32 1, i32* %3
br label %23
19: ; preds = %15
%20 = load i8*, i8** %4
%21 = load i8*, i8** %5
%22 = call i32 @strcmp(i8* %20, i8* %21)
store i32 %22, i32* %3
br label %23
23: ; preds = %19, %18, %11
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @vstrcmp(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = or i1 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = and i1 %3, %4
br i1 %7, label %8, label %10
8: ; preds = %6
%9 = tail call i32 @strcmp(i8* %0, i8* %1)
br label %10
10: ; preds = %6, %2, %8
%11 = phi i32 [ %9, %8 ], [ 0, %2 ], [ 1, %6 ]
ret i32 %11
}
void RTStrSimplePatternNMatch(void) {}


x86 assembly (clang, -O0):
<RTStrSimplePatternNMatch>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTStrSimplePatternNMatch>:
ret

LLVM IR (-O0):
define void @RTStrSimplePatternNMatch() {
ret void
}

LLVM IR (-O2):
define void @RTStrSimplePatternNMatch() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\nHello, I am a test case. Called by Child Process !!\n\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [55 x i8] c"\0AHello, I am a test case. Called by Child Process !!\0A\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [54 x i8] c"\0AHello, I am a test case. Called by Child Process !!\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str, i64 0, i64 0))
ret i32 0
}
unsigned int g(unsigned int a, unsigned int b) { return ~a ^ ~b; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = xor i32 %5, -1
%7 = load i32, i32* %4
%8 = xor i32 %7, -1
%9 = xor i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __getpagesize() {
  __set_errno(ENOSYS);
  return 0;
}


x86 assembly (clang, -O0):
<__getpagesize>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__getpagesize>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @__getpagesize() {
%1 = load i32, i32* @ENOSYS
%2 = call i32 @__set_errno(i32 %1)
ret i32 0
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @__getpagesize() {
%1 = load i32, i32* @ENOSYS
%2 = tail call i32 @__set_errno(i32 %1)
ret i32 0
}
/* Variables and functions */
scalar_t__ is_gtin(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  if (is_gtin(argv[1])) {
    printf("Yes, '%s' is valid\n", argv[1]);
  } else {
    printf("No, '%s' is not valid\n", argv[1]);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <is_gtin@plt>
cmp    $0x0,%rax
je     1166 <main+0x46>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
jmp    117a <main+0x5a>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
mov    0x8(%rsi),%rdi
call   1040 <is_gtin@plt>
test   %rax,%rax
mov    0x8(%rbx),%rsi
lea    0xed9(%rip),%rax
lea    0xebe(%rip),%rdi
cmove  %rax,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Yes, '%s' is valid\0A\00"
@.str.1 = [23 x i8] c"No, '%s' is not valid\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i64 @is_gtin(i8* %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %14)
br label %21
16: ; preds = %2
%17 = load i8**, i8*** %5
%18 = getelementptr inbounds i8*, i8** %17, i64 1
%19 = load i8*, i8** %18
%20 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* %19)
br label %21
21: ; preds = %16, %11
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@.str = [20 x i8] c"Yes, '%s' is valid\0A\00"
@.str.1 = [23 x i8] c"No, '%s' is not valid\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i64 @is_gtin(i8* %4)
%6 = icmp eq i64 %5, 0
%7 = load i8*, i8** %3
%8 = select i1 %6, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0)
%9 = tail call i32 @printf(i8* %8, i8* %7)
ret i32 0
}
/* Type definitions */
struct iovec {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, int, struct iovec const *, int,
                           int /*<<< orphan*/);
ssize_t uv__pwritev(int fd, const struct iovec *iov, int iovcnt, off_t offset) {
  return syscall(296, fd, iov, iovcnt, offset);
}


x86 assembly (clang, -O0):
<uv__pwritev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    $0x128,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uv__pwritev>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x128,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.iovec = type { i32 }
define i32 @uv__pwritev(i32 %0, %struct.iovec* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca %struct.iovec*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store %struct.iovec* %1, %struct.iovec** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load %struct.iovec*, %struct.iovec** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @syscall(i32 296, i32 %9, %struct.iovec* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.iovec = type { i32 }
define i32 @uv__pwritev(i32 %0, %struct.iovec* %1, i32 %2, i32 %3) {
%5 = tail call i32 @syscall(i32 296, i32 %0, %struct.iovec* %1, i32 %2, i32 %3)
ret i32 %5
}