xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ pic24_nvmcon_write_internal();
int /*<<< orphan*/ pic24_program_verify();
int /*<<< orphan*/ pic24_six(int, int);
int /*<<< orphan*/ pic24_standby();
void pic24_PIC24FKA_erase(void) {
  pic24_program_verify();
  pic24_six(0x24064A, 0);
  pic24_six(0x883B0A, 0);
  pic24_six(0x200000, 0);
  pic24_six(0x880190, 0);
  pic24_six(0x200000, 0);
  pic24_six(0xBB0800, 2);
  pic24_nvmcon_write_internal();
  pic24_standby();
}


x86 assembly (clang, -O0):
<pic24_PIC24FKA_erase>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <pic24_program_verify@plt>
mov    $0x24064a,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x883b0a,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x200000,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x880190,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x200000,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0xbb0800,%edi
mov    $0x2,%esi
call   1060 <pic24_six@plt>
mov    $0x0,%al
call   1040 <pic24_nvmcon_write_internal@plt>
mov    $0x0,%al
call   1030 <pic24_standby@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic24_PIC24FKA_erase>:
push   %rax
xor    %eax,%eax
call   1050 <pic24_program_verify@plt>
mov    $0x24064a,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x883b0a,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x200000,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x880190,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0x200000,%edi
xor    %esi,%esi
call   1060 <pic24_six@plt>
mov    $0xbb0800,%edi
mov    $0x2,%esi
call   1060 <pic24_six@plt>
xor    %eax,%eax
call   1040 <pic24_nvmcon_write_internal@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <pic24_standby@plt>

LLVM IR (-O0):
define void @pic24_PIC24FKA_erase() {
%1 = call i32 (...) @pic24_program_verify()
%2 = call i32 @pic24_six(i32 2360906, i32 0)
%3 = call i32 @pic24_six(i32 8928010, i32 0)
%4 = call i32 @pic24_six(i32 2097152, i32 0)
%5 = call i32 @pic24_six(i32 8913296, i32 0)
%6 = call i32 @pic24_six(i32 2097152, i32 0)
%7 = call i32 @pic24_six(i32 12257280, i32 2)
%8 = call i32 (...) @pic24_nvmcon_write_internal()
%9 = call i32 (...) @pic24_standby()
ret void
}

LLVM IR (-O2):
define void @pic24_PIC24FKA_erase() {
%1 = tail call i32 (...) @pic24_program_verify()
%2 = tail call i32 @pic24_six(i32 2360906, i32 0)
%3 = tail call i32 @pic24_six(i32 8928010, i32 0)
%4 = tail call i32 @pic24_six(i32 2097152, i32 0)
%5 = tail call i32 @pic24_six(i32 8913296, i32 0)
%6 = tail call i32 @pic24_six(i32 2097152, i32 0)
%7 = tail call i32 @pic24_six(i32 12257280, i32 2)
%8 = tail call i32 (...) @pic24_nvmcon_write_internal()
%9 = tail call i32 (...) @pic24_standby()
ret void
}
int HelpItem140(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem140>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem140>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem140() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem140() {
ret i32 0
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
float stdlib_strided_snansumors(int, float *, int);
int main() {
  float x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 0.0 / 0.0, 0.0 / 0.0};
  int64_t N = 5;
  int64_t stride = 2;
  float v = stdlib_strided_snansumors(N, x, stride);
  printf("sum: %f\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    -0x30(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x28,%edx
call   1050 <memcpy@plt>
movl   $0x5,-0x34(%rbp)
movl   $0x2,-0x38(%rbp)
mov    -0x34(%rbp),%edi
lea    -0x30(%rbp),%rsi
mov    -0x38(%rbp),%edx
call   1030 <stdlib_strided_snansumors@plt>
movss  %xmm0,-0x3c(%rbp)
movss  -0x3c(%rbp),%xmm0
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
mov    0xef5(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x5,%edi
mov    $0x2,%edx
call   1030 <stdlib_strided_snansumors@plt>
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [10 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00, float 0x7FF8000000000000, float 0x7FF8000000000000]
@.str = [9 x i8] c"sum: %f\0A\00"
define i32 @main() {
%1 = alloca [10 x float]
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
%5 = bitcast [10 x float]* %1 to i8*
store i32 5, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [10 x float], [10 x float]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call float @stdlib_strided_snansumors(i32 %6, float* %7, i32 %8)
store float %9, float* %4
%10 = load float, float* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), float %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [10 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00, float 0x7FF8000000000000, float 0x7FF8000000000000]
@.str = [9 x i8] c"sum: %f\0A\00"
define i32 @main() {
%1 = alloca [10 x float]
%2 = bitcast [10 x float]* %1 to i8*
%3 = getelementptr inbounds [10 x float], [10 x float]* %1, i64 0, i64 0
%4 = call float @stdlib_strided_snansumors(i32 5, float* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), float %4)
ret i32 0
}
void TIM1_IC12_IRQHandler(void) {}


x86 assembly (clang, -O0):
<TIM1_IC12_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM1_IC12_IRQHandler>:
ret

LLVM IR (-O0):
define void @TIM1_IC12_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @TIM1_IC12_IRQHandler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ md4_final(void *, unsigned char *);
void hash_method_result_md4(void *context, unsigned char *result_r) {
  md4_final(context, result_r);
}


x86 assembly (clang, -O0):
<hash_method_result_md4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <md4_final@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_method_result_md4>:
jmp    1030 <md4_final@plt>

LLVM IR (-O0):
define void @hash_method_result_md4(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @md4_final(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @hash_method_result_md4(i8* %0, i8* %1) {
%3 = tail call i32 @md4_final(i8* %0, i8* %1)
ret void
}
cbuf11(f, n) int f, n;
{ cbuf(f, n, 11); }


x86 assembly (clang, -O0):
<cbuf11>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0xb,%edx
mov    $0x0,%al
call   1030 <cbuf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf11>:
mov    $0xb,%edx
xor    %eax,%eax
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf11(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %6, i32 %7, i32 11)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @cbuf11(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %1, i32 11)
ret i32 undef
}
double creal(double __complex__ z) { return __real__ z; }


x86 assembly (clang, -O0):
<creal>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<creal>:
ret

LLVM IR (-O0):
define double @creal(double %0, double %1) {
%3 = alloca { double, double }
%4 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
store double %0, double* %4
%5 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
store double %1, double* %5
%6 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%7 = load double, double* %6
ret double %7
}

LLVM IR (-O2):
define double @creal(double returned %0, double %1) {
ret double %0
}
void transfer_BGR888_to_RGB888(unsigned char *(*output), unsigned char *input) {
  *(*output)++ = input[2];
  *(*output)++ = input[1];
  *(*output)++ = input[0];
}


x86 assembly (clang, -O0):
<transfer_BGR888_to_RGB888>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<transfer_BGR888_to_RGB888>:
mov    0x2(%rsi),%al
mov    (%rdi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rdi)
mov    %al,(%rcx)
mov    0x1(%rsi),%al
mov    (%rdi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rdi)
mov    %al,(%rcx)
mov    (%rsi),%al
mov    (%rdi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rdi)
mov    %al,(%rcx)
ret

LLVM IR (-O0):
define void @transfer_BGR888_to_RGB888(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i64 2
%7 = load i8, i8* %6
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %8
store i8 %7, i8* %9
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = load i8, i8* %12
%14 = load i8**, i8*** %3
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %14
store i8 %13, i8* %15
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i64 0
%19 = load i8, i8* %18
%20 = load i8**, i8*** %3
%21 = load i8*, i8** %20
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %20
store i8 %19, i8* %21
ret void
}

LLVM IR (-O2):
define void @transfer_BGR888_to_RGB888(i8** nocapture %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %1, i64 2
%4 = load i8, i8* %3
%5 = load i8*, i8** %0
%6 = getelementptr inbounds i8, i8* %5, i64 1
store i8* %6, i8** %0
store i8 %4, i8* %5
%7 = getelementptr inbounds i8, i8* %1, i64 1
%8 = load i8, i8* %7
%9 = load i8*, i8** %0
%10 = getelementptr inbounds i8, i8* %9, i64 1
store i8* %10, i8** %0
store i8 %8, i8* %9
%11 = load i8, i8* %1
%12 = load i8*, i8** %0
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8* %13, i8** %0
store i8 %11, i8* %12
ret void
}
int do_481() { return 481; }


x86 assembly (clang, -O0):
<do_481>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_481>:
mov    $0x1e1,%eax
ret

LLVM IR (-O0):
define i32 @do_481() {
ret i32 481
}

LLVM IR (-O2):
define i32 @do_481() {
ret i32 481
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x51() {
  Assert_real((ispunct(81) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              410, ("ispunct should be 0 for Q"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x51>:
push   %rbp
mov    %rsp,%rbp
mov    $0x51,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x19a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x51>:
push   %rax
mov    $0x51,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x19a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 0 for Q\00"
define void @t_ispunct_0x51() {
%1 = call i64 @ispunct(i32 81)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 410, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 0 for Q\00"
define void @t_ispunct_0x51() {
%1 = tail call i64 @ispunct(i32 81)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 410, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void TMR3GetWarpDrive(void) {}


x86 assembly (clang, -O0):
<TMR3GetWarpDrive>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TMR3GetWarpDrive>:
ret

LLVM IR (-O0):
define void @TMR3GetWarpDrive() {
ret void
}

LLVM IR (-O2):
define void @TMR3GetWarpDrive() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Pow(int, int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
main() {
  printf("2^21 = %ld\n", Pow(2, 21));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
mov    $0x15,%esi
call   1040 <Pow@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x15,%esi
call   1040 <Pow@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"2^21 = %ld\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @Pow(i32 2, i32 21)
%3 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"2^21 = %ld\0A\00"
define i32 @main() {
%1 = tail call i32 @Pow(i32 2, i32 21)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int strcasestr(str, tag)
char *str, *tag;
{
  char buf[256];
  str_lower(buf, str);
  return (int)strstr(buf, tag);
}


x86 assembly (clang, -O0):
<strcasestr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x0,%al
call   1030 <str_lower@plt>
lea    -0x110(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strstr@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcasestr>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %rsi,%rbx
mov    %rdi,%rsi
mov    %rsp,%r14
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <str_lower@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <strstr@plt>
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @strcasestr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @str_lower to i32 (i8*, i8*, ...)*)(i8* %6, i8* %7)
%9 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%10 = load i8*, i8** %4
%11 = call i8* @strstr(i8* %9, i8* %10)
%12 = ptrtoint i8* %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @strcasestr(i8* %0, i8* nocapture %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @str_lower to i32 (i8*, i8*, ...)*)(i8* %4, i8* %0)
%6 = call i8* @strstr(i8* %4, i8* dereferenceable(1) %1)
%7 = ptrtoint i8* %6 to i64
%8 = trunc i64 %7 to i32
ret i32 %8
}
int rcs2scr(int i) {
  return i & 0x1800 | i >> 8 & 7 | i >> 2 & 0x38 | i << 6 & 0x7c0;
}


x86 assembly (clang, -O0):
<rcs2scr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1800,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0x7,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x38,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x6,%ecx
and    $0x7c0,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcs2scr>:
mov    %edi,%eax
and    $0x1800,%eax
mov    %edi,%ecx
shr    $0x8,%ecx
and    $0x7,%ecx
or     %eax,%ecx
mov    %edi,%eax
shr    $0x2,%eax
and    $0x38,%eax
or     %ecx,%eax
and    $0x1f,%edi
shl    $0x6,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rcs2scr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 6144
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = and i32 %6, 7
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = and i32 %10, 56
%12 = or i32 %8, %11
%13 = load i32, i32* %2
%14 = shl i32 %13, 6
%15 = and i32 %14, 1984
%16 = or i32 %12, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @rcs2scr(i32 %0) {
%2 = and i32 %0, 6144
%3 = lshr i32 %0, 8
%4 = and i32 %3, 7
%5 = or i32 %4, %2
%6 = lshr i32 %0, 2
%7 = and i32 %6, 56
%8 = or i32 %5, %7
%9 = shl i32 %0, 6
%10 = and i32 %9, 1984
%11 = or i32 %8, %10
ret i32 %11
}
int cl_zlib_init(void) { return 0; }


x86 assembly (clang, -O0):
<cl_zlib_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_zlib_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cl_zlib_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @cl_zlib_init() {
ret i32 0
}
int isoctal(char c) {
  if (c >= '0' && c <= '7')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isoctal>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <isoctal+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x37,%eax
jg     1130 <isoctal+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <isoctal+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoctal>:
and    $0xf8,%dil
xor    %eax,%eax
cmp    $0x30,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isoctal(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 55
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @isoctal(i8 signext %0) {
%2 = and i8 %0, -8
%3 = icmp eq i8 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int n;
typedef int int32_t;
typedef scalar_t__ d;

/* Variables and functions */
int32_t idiv_up(int32_t n, int32_t d) {
  return (n >= 0) ? (((n) + (d)-1) / (d)) : (n / d);
}


x86 assembly (clang, -O0):
<idiv_up>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1129 <idiv_up+0x29>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
sub    $0x1,%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
jmp    1133 <idiv_up+0x33>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idiv_up>:
test   %edi,%edi
lea    -0x1(%rdi,%rsi,1),%eax
cmovs  %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @idiv_up(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %4
%13 = sdiv i32 %11, %12
br label %18
14: ; preds = %2
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = sdiv i32 %15, %16
br label %18
18: ; preds = %14, %7
%19 = phi i32 [ %13, %7 ], [ %17, %14 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @idiv_up(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, -1
%4 = add i32 %0, -1
%5 = add i32 %4, %1
%6 = select i1 %3, i32 %5, i32 %0
%7 = sdiv i32 %6, %1
ret i32 %7
}
void av_log_format_line() {}


x86 assembly (clang, -O0):
<av_log_format_line>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_log_format_line>:
ret

LLVM IR (-O0):
define void @av_log_format_line() {
ret void
}

LLVM IR (-O2):
define void @av_log_format_line() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void fre(void *i) { printf("free_cb, %s\n", (char *)i); }


x86 assembly (clang, -O0):
<fre>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fre>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"free_cb, %s\0A\00"
define void @fre(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"free_cb, %s\0A\00"
define void @fre(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
__attribute__((noipa)) unsigned long f4(unsigned int a, unsigned int b) {
  unsigned int i = __builtin_add_overflow(a, b, &a);
  return a - i;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
setb   %al
mov    %ecx,-0x4(%rbp)
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    %edi,%eax
add    %esi,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i64 @f4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %6, i32 %7)
%9 = extractvalue { i32, i1 } %8, 1
%10 = extractvalue { i32, i1 } %8, 0
store i32 %10, i32* %3
%11 = zext i1 %9 to i32
store i32 %11, i32* %5
%12 = load i32, i32* %3
%13 = load i32, i32* %5
%14 = sub i32 %12, %13
%15 = zext i32 %14 to i64
ret i64 %15
}

LLVM IR (-O2):
define i64 @f4(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 1
%5 = extractvalue { i32, i1 } %3, 0
%6 = sext i1 %4 to i32
%7 = add i32 %5, %6
%8 = zext i32 %7 to i64
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ MADV_DONTNEED;
int /*<<< orphan*/ madvise(void *, size_t, int /*<<< orphan*/);
void freeze_vm(void *start_addr, size_t length) {
  madvise(start_addr, length, MADV_DONTNEED);
}


x86 assembly (clang, -O0):
<freeze_vm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
call   1030 <madvise@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeze_vm>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
jmp    1030 <madvise@plt>

LLVM IR (-O0):
@MADV_DONTNEED = global i32 0
define void @freeze_vm(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = load i32, i32* @MADV_DONTNEED
%8 = call i32 @madvise(i8* %5, i64 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@MADV_DONTNEED = global i32 0
define void @freeze_vm(i8* %0, i64 %1) {
%3 = load i32, i32* @MADV_DONTNEED
%4 = tail call i32 @madvise(i8* %0, i64 %1, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void shds_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<shds_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shds_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @shds_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @shds_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int fib(int n) {
  if (n == 0) {
    return 1;
  } else if (n == 1) {
    return 1;
  } else {
    return fib(n - 1) + fib(n - 2);
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    116a <fib+0x5a>
cmpl   $0x1,-0x8(%rbp)
jne    1147 <fib+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fib+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jb     1145 <fib+0x35>
mov    %edi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fib(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fib(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
void TimerMainOutputConfigure(unsigned long ulBase,
                              unsigned long ulMOConfigure) {
  ;

  ;
  if (ulMOConfigure == 0x00000001) {
    (*((volatile unsigned long *)(ulBase + 0x00000044))) |= 0x00008000;
  } else {
    (*((volatile unsigned long *)(ulBase + 0x00000044))) &= ~0x00008000;
  }
}


x86 assembly (clang, -O0):
<TimerMainOutputConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jne    112f <TimerMainOutputConfigure+0x2f>
mov    -0x8(%rbp),%rax
mov    0x44(%rax),%rcx
or     $0x8000,%rcx
mov    %rcx,0x44(%rax)
jmp    1142 <TimerMainOutputConfigure+0x42>
mov    -0x8(%rbp),%rax
mov    0x44(%rax),%rcx
and    $0xffffffffffff7fff,%rcx
mov    %rcx,0x44(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerMainOutputConfigure>:
xor    %eax,%eax
cmp    $0x1,%rsi
sete   %al
mov    $0xffffffffffff7fff,%rcx
and    0x44(%rdi),%rcx
shl    $0xf,%rax
or     %rcx,%rax
mov    %rax,0x44(%rdi)
ret

LLVM IR (-O0):
define void @TimerMainOutputConfigure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 1
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i64, i64* %3
%9 = add i64 %8, 68
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = or i64 %11, 32768
store volatile i64 %12, i64* %10
br label %19
13: ; preds = %2
%14 = load i64, i64* %3
%15 = add i64 %14, 68
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
%18 = and i64 %17, -32769
store volatile i64 %18, i64* %16
br label %19
19: ; preds = %13, %7
ret void
}

LLVM IR (-O2):
define void @TimerMainOutputConfigure(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 1
%4 = add i64 %0, 68
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -32769
%8 = select i1 %3, i64 32768, i64 0
%9 = or i64 %7, %8
store volatile i64 %9, i64* %5
ret void
}
int getBit(int in, int index) {
  if ((in & (0x1 << index)) == 0)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<getBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
jne    1130 <getBit+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1137 <getBit+0x37>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBit>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @getBit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = shl i32 1, %7
%9 = and i32 %6, %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %13
12: ; preds = %2
store i32 1, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @getBit(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int ENODEV;
int sci_adi_read(unsigned long reg) { return -ENODEV; }


x86 assembly (clang, -O0):
<sci_adi_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sci_adi_read>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENODEV = global i32 0
define i32 @sci_adi_read(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i32, i32* @ENODEV
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@ENODEV = global i32 0
define i32 @sci_adi_read(i64 %0) {
%2 = load i32, i32* @ENODEV
%3 = sub nsw i32 0, %2
ret i32 %3
}
void strcp(char *s, char *o, int l) {
  while (l-- && *o)
    *s++ = *o++;
}


x86 assembly (clang, -O0):
<strcp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    %ecx,%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
je     1138 <strcp+0x38>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1148 <strcp+0x48>
jmp    116f <strcp+0x6f>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    110f <strcp+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcp>:
test   %edx,%edx
je     1123 <strcp+0x23>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rcx,1),%edx
test   %dl,%dl
je     1123 <strcp+0x23>
mov    %dl,(%rdi,%rcx,1)
add    $0x1,%rcx
cmp    %ecx,%eax
jne    1110 <strcp+0x10>
ret

LLVM IR (-O0):
define void @strcp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
br label %7
7: ; preds = %18, %3
%8 = load i32, i32* %6
%9 = add nsw i32 %8, -1
store i32 %9, i32* %6
%10 = icmp ne i32 %8, 0
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 0
br label %16
16: ; preds = %11, %7
%17 = phi i1 [ false, %7 ], [ %15, %11 ]
br i1 %17, label %18, label %24
18: ; preds = %16
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %5
%21 = load i8, i8* %19
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
store i8 %21, i8* %22
br label %7
24: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @strcp(i8* nocapture writeonly %0, i8* nocapture %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %16, label %5
5: ; preds = %3, %12
%6 = phi i32 [ %9, %12 ], [ %2, %3 ]
%7 = phi i8* [ %13, %12 ], [ %1, %3 ]
%8 = phi i8* [ %14, %12 ], [ %0, %3 ]
%9 = add nsw i32 %6, -1
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %5
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = getelementptr inbounds i8, i8* %8, i64 1
store i8 %10, i8* %8
%15 = icmp eq i32 %9, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %12, %3
ret void
}
void CFGMR3QueryUInt(void) {}


x86 assembly (clang, -O0):
<CFGMR3QueryUInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3QueryUInt>:
ret

LLVM IR (-O0):
define void @CFGMR3QueryUInt() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3QueryUInt() {
ret void
}
int is_nth_bit_set(unsigned int num, int bit) { return ((num >> bit) & 0x01); }


x86 assembly (clang, -O0):
<is_nth_bit_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_nth_bit_set>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_nth_bit_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
%8 = and i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_nth_bit_set(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void f() { fflush(stdout); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @f() {
%1 = load i32, i32* @stdout
%2 = call i32 @fflush(i32 %1)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @f() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fflush(i32 %1)
ret void
}
void zero_block(double *a, int m, int n) {
  int i;
  for (i = 0; i < m * n; i++)
    a[i] = 0.0;
}


x86 assembly (clang, -O0):
<zero_block>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0x10(%rbp),%ecx
cmp    %ecx,%eax
jge    1145 <zero_block+0x45>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <zero_block+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_block>:
imul   %edx,%esi
test   %esi,%esi
jle    1129 <zero_block+0x19>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @zero_block(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = mul nsw i32 %10, %11
%13 = icmp slt i32 %9, %12
br i1 %13, label %14, label %22
14: ; preds = %8
%15 = load double*, double** %4
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %15, i64 %17
store double 0.000000e+00, double* %18
br label %19
19: ; preds = %14
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @zero_block(double* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = mul i32 %2, %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = bitcast double* %0 to i8*
%8 = zext i32 %4 to i64
%9 = shl nuw nsw i64 %8, 3
br label %10
10: ; preds = %6, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dsfmt_gv_fill_array_open_open(double *, int);
void s_fill_array_open_open(double array[], int size) {
  dsfmt_gv_fill_array_open_open(array, size);
}


x86 assembly (clang, -O0):
<s_fill_array_open_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <dsfmt_gv_fill_array_open_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_fill_array_open_open>:
jmp    1030 <dsfmt_gv_fill_array_open_open@plt>

LLVM IR (-O0):
define void @s_fill_array_open_open(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
%5 = load double*, double** %3
%6 = load i32, i32* %4
%7 = call i32 @dsfmt_gv_fill_array_open_open(double* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @s_fill_array_open_open(double* %0, i32 %1) {
%3 = tail call i32 @dsfmt_gv_fill_array_open_open(double* %0, i32 %1)
ret void
}
/* Variables and functions */
int isnanf(float);
int cmp(float a) { return isnanf(a); }


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isnanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
jmp    1030 <isnanf@plt>

LLVM IR (-O0):
define i32 @cmp(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @isnanf(float %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cmp(float %0) {
%2 = tail call i32 @isnanf(float %0)
ret i32 %2
}
char *my_index(char const *str, int chr) {
  while (*str) {
    if (*str == chr)
      return (char *)str;
    str++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<my_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <my_index+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1135 <my_index+0x35>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <my_index+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <my_index+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_index>:
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <my_index+0x23>
mov    %rdi,%rax
nopl   0x0(%rax)
movsbl %cl,%ecx
cmp    %esi,%ecx
je     1125 <my_index+0x25>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <my_index+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @my_index(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %5
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %4
store i8* %17, i8** %3
br label %22
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %4
br label %6
21: ; preds = %6
store i8* null, i8** %3
br label %22
22: ; preds = %21, %16
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @my_index(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %10
%6 = phi i8 [ %12, %10 ], [ %3, %2 ]
%7 = phi i8* [ %11, %10 ], [ %0, %2 ]
%8 = sext i8 %6 to i32
%9 = icmp eq i32 %8, %1
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %10, %2
%15 = phi i8* [ null, %2 ], [ null, %10 ], [ %7, %5 ]
ret i8* %15
}
int isvalueinarray(int val, int *arr, int size) {
  int i;
  for (i = 0; i < size; i++) {
    if (arr[i] == val)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isvalueinarray>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1154 <isvalueinarray+0x54>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x8(%rbp),%eax
jne    1141 <isvalueinarray+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <isvalueinarray+0x5b>
jmp    1146 <isvalueinarray+0x46>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <isvalueinarray+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isvalueinarray>:
test   %edx,%edx
jle    111e <isvalueinarray+0x1e>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %edi,(%rsi,%rcx,4)
je     1121 <isvalueinarray+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <isvalueinarray+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isvalueinarray(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %6
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %5
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @isvalueinarray(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %1, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %0
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ serial_close(int /*<<< orphan*/);
void PIC16F648A_stop(void) {
  serial_close(0);
  ;
}


x86 assembly (clang, -O0):
<PIC16F648A_stop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <serial_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIC16F648A_stop>:
xor    %edi,%edi
jmp    1030 <serial_close@plt>

LLVM IR (-O0):
define void @PIC16F648A_stop() {
%1 = call i32 @serial_close(i32 0)
ret void
}

LLVM IR (-O2):
define void @PIC16F648A_stop() {
%1 = tail call i32 @serial_close(i32 0)
ret void
}
long f(char *w) {
  long k, i, c = 0, x;
  char *p = (char *)&x;
  for (i = 0; i < 1; i++) {
    for (k = 0; k < sizeof(long); k++)
      p[k] = w[k];
    c += x;
  }
  return c;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x20(%rbp)
lea    -0x28(%rbp),%rax
mov    %rax,-0x30(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jge    1182 <f+0x82>
movq   $0x0,-0x10(%rbp)
cmpq   $0x8,-0x10(%rbp)
jae    1165 <f+0x65>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x30(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1133 <f+0x33>
mov    -0x28(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1120 <f+0x20>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @f(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %2
store i64 0, i64* %5
%8 = bitcast i64* %6 to i8*
store i8* %8, i8** %7
store i64 0, i64* %4
br label %9
9: ; preds = %31, %1
%10 = load i64, i64* %4
%11 = icmp slt i64 %10, 1
br i1 %11, label %12, label %34
12: ; preds = %9
store i64 0, i64* %3
br label %13
13: ; preds = %24, %12
%14 = load i64, i64* %3
%15 = icmp ult i64 %14, 8
br i1 %15, label %16, label %27
16: ; preds = %13
%17 = load i8*, i8** %2
%18 = load i64, i64* %3
%19 = getelementptr inbounds i8, i8* %17, i64 %18
%20 = load i8, i8* %19
%21 = load i8*, i8** %7
%22 = load i64, i64* %3
%23 = getelementptr inbounds i8, i8* %21, i64 %22
store i8 %20, i8* %23
br label %24
24: ; preds = %16
%25 = load i64, i64* %3
%26 = add nsw i64 %25, 1
store i64 %26, i64* %3
br label %13
27: ; preds = %13
%28 = load i64, i64* %6
%29 = load i64, i64* %5
%30 = add nsw i64 %29, %28
store i64 %30, i64* %5
br label %31
31: ; preds = %27
%32 = load i64, i64* %4
%33 = add nsw i64 %32, 1
store i64 %33, i64* %4
br label %9
34: ; preds = %9
%35 = load i64, i64* %5
ret i64 %35
}

LLVM IR (-O2):
define i64 @f(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ SCSI_CTL_PHASE_RestoreConfig();
void SCSI_CTL_PHASE_Wakeup(void) { SCSI_CTL_PHASE_RestoreConfig(); }


x86 assembly (clang, -O0):
<SCSI_CTL_PHASE_Wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SCSI_CTL_PHASE_RestoreConfig@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCSI_CTL_PHASE_Wakeup>:
xor    %eax,%eax
jmp    1030 <SCSI_CTL_PHASE_RestoreConfig@plt>

LLVM IR (-O0):
define void @SCSI_CTL_PHASE_Wakeup() {
%1 = call i32 (...) @SCSI_CTL_PHASE_RestoreConfig()
ret void
}

LLVM IR (-O2):
define void @SCSI_CTL_PHASE_Wakeup() {
%1 = tail call i32 (...) @SCSI_CTL_PHASE_RestoreConfig()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ block(int /*<<< orphan*/);
void analyzer() { block(0); }


x86 assembly (clang, -O0):
<analyzer>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <block@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<analyzer>:
xor    %edi,%edi
jmp    1030 <block@plt>

LLVM IR (-O0):
define void @analyzer() {
%1 = call i32 @block(i32 0)
ret void
}

LLVM IR (-O2):
define void @analyzer() {
%1 = tail call i32 @block(i32 0)
ret void
}