void kernel_CPU_06_mod_3DRhoCte(float *gU0, float *gU1, float *gVorg, int nnoi,
                                int nnoj, int k0, int k1, float FATMDFX,
                                float FATMDFY, float FATMDFZ, float *W) {
  int index_X, index_Y;
  int block_index_X;
  int stride = nnoi * nnoj;
  int index, k;
  for (index_X = 0; index_X < nnoi; index_X += 2)
    for (index_Y = 0; index_Y < nnoj; index_Y++)
      for (k = 0; k < k1 - k0; k++) {
        for (block_index_X = index_X; block_index_X < ({
                                        typeof(nnoi) _min1 = (nnoi);
                                        typeof(index_X + 2) _min2 =
                                            (index_X + 2);
                                        (void)(&_min1 == &_min2);
                                        _min1 < _min2 ? _min1 : _min2;
                                      });
             block_index_X++) {
          index = (index_Y * nnoi + block_index_X) + (k0 + k) * stride;
          if (gVorg[index] > 0.0f) {
            gU1[index] =
                2.0f * gU0[index] - gU1[index] +
                FATMDFX * gVorg[index] * gVorg[index] *
                    (+W[6] * (gU0[index - 6] + gU0[index + 6]) +
                     W[5] * (gU0[index - 5] + gU0[index + 5]) +
                     W[4] * (gU0[index - 4] + gU0[index + 4]) +
                     W[3] * (gU0[index - 3] + gU0[index + 3]) +
                     W[2] * (gU0[index - 2] + gU0[index + 2]) +
                     W[1] * (gU0[index - 1] + gU0[index + 1]) +
                     W[0] * gU0[index]) +
                FATMDFY * gVorg[index] * gVorg[index] *
                    (+W[6] * (gU0[index - 6 * nnoi] + gU0[index + 6 * nnoi]) +
                     W[5] * (gU0[index - 5 * nnoi] + gU0[index + 5 * nnoi]) +
                     W[4] * (gU0[index - 4 * nnoi] + gU0[index + 4 * nnoi]) +
                     W[3] * (gU0[index - 3 * nnoi] + gU0[index + 3 * nnoi]) +
                     W[2] * (gU0[index - 2 * nnoi] + gU0[index + 2 * nnoi]) +
                     W[1] * (gU0[index - nnoi] + gU0[index + nnoi]) +
                     W[0] * gU0[index]) +
                FATMDFZ * gVorg[index] * gVorg[index] *
                    (+W[6] *
                         (gU0[index + 6 * stride] + gU0[index - 6 * stride]) +
                     W[5] *
                         (gU0[index + 5 * stride] + gU0[index - 5 * stride]) +
                     W[4] *
                         (gU0[index + 4 * stride] + gU0[index - 4 * stride]) +
                     W[3] *
                         (gU0[index + 3 * stride] + gU0[index - 3 * stride]) +
                     W[2] *
                         (gU0[index + 2 * stride] + gU0[index - 2 * stride]) +
                     W[1] * (gU0[index + stride] + gU0[index - stride]) +
                     W[0] * gU0[index]);
          }
        }
      }
}


x86 assembly (clang, -O0):
<kernel_CPU_06_mod_3DRhoCte>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movss  %xmm0,-0x28(%rbp)
movss  %xmm1,-0x2c(%rbp)
movss  %xmm2,-0x30(%rbp)
mov    -0x1c(%rbp),%eax
imul   -0x20(%rbp),%eax
mov    %eax,-0x40(%rbp)
movl   $0x0,-0x34(%rbp)
mov    -0x34(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    1743 <kernel_CPU_06_mod_3DRhoCte+0x643>
movl   $0x0,-0x38(%rbp)
mov    -0x38(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    1730 <kernel_CPU_06_mod_3DRhoCte+0x630>
movl   $0x0,-0x48(%rbp)
mov    -0x48(%rbp),%eax
mov    0x10(%rbp),%ecx
sub    -0x24(%rbp),%ecx
cmp    %ecx,%eax
jge    171d <kernel_CPU_06_mod_3DRhoCte+0x61d>
mov    -0x34(%rbp),%eax
mov    %eax,-0x3c(%rbp)
mov    -0x3c(%rbp),%eax
mov    %eax,-0x58(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4c(%rbp)
mov    -0x34(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x50(%rbp)
mov    -0x4c(%rbp),%eax
cmp    -0x50(%rbp),%eax
jge    11ab <kernel_CPU_06_mod_3DRhoCte+0xab>
mov    -0x4c(%rbp),%eax
mov    %eax,-0x5c(%rbp)
jmp    11b1 <kernel_CPU_06_mod_3DRhoCte+0xb1>
mov    -0x50(%rbp),%eax
mov    %eax,-0x5c(%rbp)
mov    -0x58(%rbp),%eax
mov    -0x5c(%rbp),%ecx
mov    %ecx,-0x54(%rbp)
cmp    -0x54(%rbp),%eax
jge    170a <kernel_CPU_06_mod_3DRhoCte+0x60a>
mov    -0x38(%rbp),%eax
imul   -0x1c(%rbp),%eax
add    -0x3c(%rbp),%eax
mov    -0x24(%rbp),%ecx
add    -0x48(%rbp),%ecx
imul   -0x40(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x44(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    16f7 <kernel_CPU_06_mod_3DRhoCte+0x5f7>
mov    -0x8(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm1
mov    -0x10(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
addss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  -0x28(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    $0x6,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    $0x6,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    $0x5,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    $0x5,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    $0x4,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    $0x4,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    $0x3,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    $0x3,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    $0x2,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    $0x2,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  -0x2c(%rbp),%xmm1
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm1
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm1
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x6,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x6,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x5,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x5,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x2,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x2,%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x3,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x3,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x1,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x1,%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0x30(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x44(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x6,-0x40(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x6,-0x40(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x5,-0x40(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x5,-0x40(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x40(%rbp),%edx
shl    $0x2,%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x40(%rbp),%edx
shl    $0x2,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x3,-0x40(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
imul   $0x3,-0x40(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x40(%rbp),%edx
shl    $0x1,%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
mov    -0x40(%rbp),%edx
shl    $0x1,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
add    -0x40(%rbp),%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x44(%rbp),%ecx
sub    -0x40(%rbp),%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movslq -0x44(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
jmp    16fc <kernel_CPU_06_mod_3DRhoCte+0x5fc>
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
jmp    117f <kernel_CPU_06_mod_3DRhoCte+0x7f>
jmp    170f <kernel_CPU_06_mod_3DRhoCte+0x60f>
mov    -0x48(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x48(%rbp)
jmp    1168 <kernel_CPU_06_mod_3DRhoCte+0x68>
jmp    1722 <kernel_CPU_06_mod_3DRhoCte+0x622>
mov    -0x38(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x38(%rbp)
jmp    1155 <kernel_CPU_06_mod_3DRhoCte+0x55>
jmp    1735 <kernel_CPU_06_mod_3DRhoCte+0x635>
mov    -0x34(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x34(%rbp)
jmp    1142 <kernel_CPU_06_mod_3DRhoCte+0x42>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_CPU_06_mod_3DRhoCte>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x278,%rsp
movss  %xmm2,-0x5c(%rsp)
movss  %xmm1,-0x60(%rsp)
movss  %xmm0,-0x64(%rsp)
mov    %r8d,-0x78(%rsp)
mov    %rdx,0x270(%rsp)
mov    %rsi,0x268(%rsp)
mov    %ecx,-0x7c(%rsp)
test   %ecx,%ecx
jle    1d65 <kernel_CPU_06_mod_3DRhoCte+0xc65>
mov    0x2b0(%rsp),%esi
mov    -0x78(%rsp),%ecx
mov    %ecx,%eax
mov    -0x7c(%rsp),%edx
imul   %edx,%eax
sub    %r9d,%esi
mov    %esi,-0x74(%rsp)
mov    %r9d,%esi
imul   %ecx,%esi
mov    %esi,%ecx
imul   %edx,%ecx
lea    0x6(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x80(%rsp)
lea    -0x6(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x78(%rsp)
lea    0x5(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x70(%rsp)
lea    -0x5(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x68(%rsp)
lea    0x4(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x60(%rsp)
lea    -0x4(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x58(%rsp)
lea    0x3(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x50(%rsp)
lea    -0x3(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x48(%rsp)
lea    0x2(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x40(%rsp)
lea    -0x2(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x38(%rsp)
lea    0x1(%r9),%ebp
imul   %eax,%ebp
mov    %rbp,0x30(%rsp)
add    $0xffffffff,%r9d
imul   %eax,%r9d
mov    %r9,0x98(%rsp)
mov    %eax,%r15d
lea    -0x6(%rsi),%eax
imul   %edx,%eax
mov    %rax,0x28(%rsp)
lea    0x6(%rsi),%eax
imul   %edx,%eax
mov    %rax,0x20(%rsp)
lea    -0x5(%rsi),%eax
imul   %edx,%eax
mov    %rax,0x18(%rsp)
lea    0x5(%rsi),%eax
imul   %edx,%eax
mov    %rax,0x10(%rsp)
lea    -0x4(%rsi),%eax
imul   %edx,%eax
mov    %rax,0x8(%rsp)
lea    0x4(%rsi),%eax
imul   %edx,%eax
mov    %rax,(%rsp)
lea    -0x3(%rsi),%eax
imul   %edx,%eax
mov    %rax,-0x8(%rsp)
lea    0x3(%rsi),%eax
imul   %edx,%eax
mov    %rax,-0x10(%rsp)
lea    -0x2(%rsi),%eax
imul   %edx,%eax
mov    %rax,-0x18(%rsp)
lea    0x2(%rsi),%eax
imul   %edx,%eax
mov    %rax,-0x20(%rsp)
lea    -0x1(%rsi),%eax
imul   %edx,%eax
mov    %rax,-0x28(%rsp)
add    $0x1,%esi
imul   %edx,%esi
mov    %rsi,0x90(%rsp)
xorps  %xmm0,%xmm0
mov    0x2b8(%rsp),%rbx
lea    -0x1(%rcx),%eax
mov    %rax,-0x30(%rsp)
mov    %edx,%eax
mov    %rax,0x260(%rsp)
lea    -0x2(%rcx),%eax
mov    %rax,-0x38(%rsp)
lea    -0x3(%rcx),%eax
mov    %rax,-0x40(%rsp)
lea    -0x4(%rcx),%eax
mov    %rax,-0x48(%rsp)
lea    -0x5(%rcx),%eax
mov    %rax,-0x50(%rsp)
mov    %rcx,0x88(%rsp)
lea    -0x6(%rcx),%eax
mov    %rax,-0x58(%rsp)
xor    %esi,%esi
jmp    13b3 <kernel_CPU_06_mod_3DRhoCte+0x2b3>
xchg   %ax,%ax
add    $0x2,%rsi
addq   $0x2,-0x30(%rsp)
addq   $0x2,-0x38(%rsp)
addq   $0x2,-0x40(%rsp)
addq   $0x2,-0x48(%rsp)
addq   $0x2,-0x50(%rsp)
addq   $0x2,-0x58(%rsp)
addq   $0x2,0x88(%rsp)
addq   $0x2,0x28(%rsp)
addq   $0x2,0x20(%rsp)
addq   $0x2,0x18(%rsp)
addq   $0x2,0x10(%rsp)
addq   $0x2,0x8(%rsp)
addq   $0x2,(%rsp)
addq   $0x2,-0x8(%rsp)
addq   $0x2,-0x10(%rsp)
addq   $0x2,-0x18(%rsp)
addq   $0x2,-0x20(%rsp)
addq   $0x2,-0x28(%rsp)
addq   $0x2,0x90(%rsp)
addq   $0x2,0x80(%rsp)
addq   $0x2,0x78(%rsp)
addq   $0x2,0x70(%rsp)
addq   $0x2,0x68(%rsp)
addq   $0x2,0x60(%rsp)
addq   $0x2,0x58(%rsp)
addq   $0x2,0x50(%rsp)
addq   $0x2,0x48(%rsp)
addq   $0x2,0x40(%rsp)
addq   $0x2,0x38(%rsp)
addq   $0x2,0x30(%rsp)
addq   $0x2,0x98(%rsp)
cmp    -0x7c(%rsp),%esi
jge    1d65 <kernel_CPU_06_mod_3DRhoCte+0xc65>
cmpl   $0x0,-0x78(%rsp)
jle    12e0 <kernel_CPU_06_mod_3DRhoCte+0x1e0>
lea    0x2(%rsi),%ecx
mov    -0x7c(%rsp),%eax
cmp    %eax,%ecx
cmovg  %eax,%ecx
mov    %ecx,-0x6c(%rsp)
movslq %ecx,%rbp
xor    %ecx,%ecx
mov    0x98(%rsp),%rax
mov    %rax,0x190(%rsp)
mov    0x30(%rsp),%rax
mov    %rax,0x188(%rsp)
mov    0x38(%rsp),%rax
mov    %rax,0x180(%rsp)
mov    0x40(%rsp),%rax
mov    %rax,0x178(%rsp)
mov    0x48(%rsp),%rax
mov    %rax,0x170(%rsp)
mov    0x50(%rsp),%rax
mov    %rax,0x168(%rsp)
mov    0x58(%rsp),%rax
mov    %rax,0x160(%rsp)
mov    0x60(%rsp),%rax
mov    %rax,0x158(%rsp)
mov    0x68(%rsp),%rax
mov    %rax,0x150(%rsp)
mov    0x70(%rsp),%rax
mov    %rax,0x148(%rsp)
mov    0x78(%rsp),%rax
mov    %rax,0x140(%rsp)
mov    0x80(%rsp),%rax
mov    %rax,0x138(%rsp)
mov    0x90(%rsp),%rax
mov    %rax,0x130(%rsp)
mov    -0x28(%rsp),%rax
mov    %rax,0x128(%rsp)
mov    -0x20(%rsp),%rax
mov    %rax,0x120(%rsp)
mov    -0x18(%rsp),%rax
mov    %rax,0x118(%rsp)
mov    -0x10(%rsp),%rax
mov    %rax,0x110(%rsp)
mov    -0x8(%rsp),%rax
mov    %rax,0x108(%rsp)
mov    (%rsp),%rax
mov    %rax,0x100(%rsp)
mov    0x8(%rsp),%rax
mov    %rax,0xf8(%rsp)
mov    0x10(%rsp),%rax
mov    %rax,0xf0(%rsp)
mov    0x18(%rsp),%rax
mov    %rax,0xe8(%rsp)
mov    0x20(%rsp),%rax
mov    %rax,0xe0(%rsp)
mov    0x28(%rsp),%rax
mov    %rax,0xd8(%rsp)
mov    0x88(%rsp),%rax
mov    %rax,0xd0(%rsp)
mov    -0x58(%rsp),%rax
mov    %rax,0xc8(%rsp)
mov    -0x50(%rsp),%rax
mov    %rax,0xc0(%rsp)
mov    -0x48(%rsp),%rax
mov    %rax,0xb8(%rsp)
mov    -0x40(%rsp),%rax
mov    %rax,0xb0(%rsp)
mov    -0x38(%rsp),%rax
mov    %rax,0xa8(%rsp)
mov    -0x30(%rsp),%rax
mov    %rax,0xa0(%rsp)
jmp    1691 <kernel_CPU_06_mod_3DRhoCte+0x591>
cs nopw 0x0(%rax,%rax,1)
mov    -0x70(%rsp),%ecx
add    $0x1,%ecx
mov    0x260(%rsp),%rax
add    %rax,0xa0(%rsp)
add    %rax,0xa8(%rsp)
add    %rax,0xb0(%rsp)
add    %rax,0xb8(%rsp)
add    %rax,0xc0(%rsp)
add    %rax,0xc8(%rsp)
add    %rax,0xd0(%rsp)
add    %rax,0xd8(%rsp)
add    %rax,0xe0(%rsp)
add    %rax,0xe8(%rsp)
add    %rax,0xf0(%rsp)
add    %rax,0xf8(%rsp)
add    %rax,0x100(%rsp)
add    %rax,0x108(%rsp)
add    %rax,0x110(%rsp)
add    %rax,0x118(%rsp)
add    %rax,0x120(%rsp)
add    %rax,0x128(%rsp)
add    %rax,0x130(%rsp)
add    %rax,0x138(%rsp)
add    %rax,0x140(%rsp)
add    %rax,0x148(%rsp)
add    %rax,0x150(%rsp)
add    %rax,0x158(%rsp)
add    %rax,0x160(%rsp)
add    %rax,0x168(%rsp)
add    %rax,0x170(%rsp)
add    %rax,0x178(%rsp)
add    %rax,0x180(%rsp)
add    %rax,0x188(%rsp)
add    %rax,0x190(%rsp)
cmp    -0x78(%rsp),%ecx
je     12e0 <kernel_CPU_06_mod_3DRhoCte+0x1e0>
mov    %ecx,-0x70(%rsp)
cmpl   $0x0,-0x74(%rsp)
jle    1580 <kernel_CPU_06_mod_3DRhoCte+0x480>
xor    %ecx,%ecx
mov    0x190(%rsp),%rax
mov    %rax,0x258(%rsp)
mov    0x188(%rsp),%rax
mov    %rax,0x250(%rsp)
mov    0x180(%rsp),%rax
mov    %rax,0x248(%rsp)
mov    0x178(%rsp),%rax
mov    %rax,0x240(%rsp)
mov    0x170(%rsp),%rax
mov    %rax,0x238(%rsp)
mov    0x168(%rsp),%rax
mov    %rax,0x230(%rsp)
mov    0x160(%rsp),%rax
mov    %rax,0x228(%rsp)
mov    0x158(%rsp),%rax
mov    %rax,0x220(%rsp)
mov    0x150(%rsp),%rax
mov    %rax,0x218(%rsp)
mov    0x148(%rsp),%rax
mov    %rax,0x210(%rsp)
mov    0x140(%rsp),%rax
mov    %rax,0x208(%rsp)
mov    0x138(%rsp),%rax
mov    %rax,0x200(%rsp)
mov    0x130(%rsp),%rax
mov    %rax,0x1f8(%rsp)
mov    0x128(%rsp),%rax
mov    %rax,0x1f0(%rsp)
mov    0x120(%rsp),%rax
mov    %rax,0x1e8(%rsp)
mov    0x118(%rsp),%rax
mov    %rax,0x1e0(%rsp)
mov    0x110(%rsp),%rax
mov    %rax,0x1d8(%rsp)
mov    0x108(%rsp),%rax
mov    %rax,0x1d0(%rsp)
mov    0x100(%rsp),%rax
mov    %rax,0x1c8(%rsp)
mov    0xf8(%rsp),%rax
mov    %rax,0x1c0(%rsp)
mov    0xf0(%rsp),%rax
mov    %rax,0x1b8(%rsp)
mov    0xe8(%rsp),%rax
mov    %rax,0x1b0(%rsp)
mov    0xe0(%rsp),%rax
mov    %rax,0x1a8(%rsp)
mov    0xd8(%rsp),%rax
mov    %rax,0x1a0(%rsp)
mov    0xd0(%rsp),%r8
mov    0xc8(%rsp),%rax
mov    %rax,0x198(%rsp)
mov    0xc0(%rsp),%r13
mov    0xb8(%rsp),%r9
mov    0xb0(%rsp),%rax
mov    0xa8(%rsp),%r14
mov    0xa0(%rsp),%r11
jmp    195b <kernel_CPU_06_mod_3DRhoCte+0x85b>
nopw   0x0(%rax,%rax,1)
mov    -0x68(%rsp),%ecx
add    $0x1,%ecx
add    %r15,%r11
add    %r15,%r14
add    %r15,%rax
add    %r15,%r9
add    %r15,%r13
add    %r15,0x198(%rsp)
add    %r15,%r8
add    %r15,0x1a0(%rsp)
add    %r15,0x1a8(%rsp)
add    %r15,0x1b0(%rsp)
add    %r15,0x1b8(%rsp)
add    %r15,0x1c0(%rsp)
add    %r15,0x1c8(%rsp)
add    %r15,0x1d0(%rsp)
add    %r15,0x1d8(%rsp)
add    %r15,0x1e0(%rsp)
add    %r15,0x1e8(%rsp)
add    %r15,0x1f0(%rsp)
add    %r15,0x1f8(%rsp)
add    %r15,0x200(%rsp)
add    %r15,0x208(%rsp)
add    %r15,0x210(%rsp)
add    %r15,0x218(%rsp)
add    %r15,0x220(%rsp)
add    %r15,0x228(%rsp)
add    %r15,0x230(%rsp)
add    %r15,0x238(%rsp)
add    %r15,0x240(%rsp)
add    %r15,0x248(%rsp)
add    %r15,0x250(%rsp)
add    %r15,0x258(%rsp)
cmp    -0x74(%rsp),%ecx
je     1580 <kernel_CPU_06_mod_3DRhoCte+0x480>
mov    %ecx,-0x68(%rsp)
cmp    %esi,-0x6c(%rsp)
jle    1870 <kernel_CPU_06_mod_3DRhoCte+0x770>
xor    %r12d,%r12d
jmp    1985 <kernel_CPU_06_mod_3DRhoCte+0x885>
xchg   %ax,%ax
lea    (%rsi,%r12,1),%rdx
add    $0x1,%rdx
add    $0x1,%r12
cmp    %rbp,%rdx
jge    1870 <kernel_CPU_06_mod_3DRhoCte+0x770>
lea    (%r8,%r12,1),%edx
movslq %edx,%r10
mov    0x270(%rsp),%rdx
movss  (%rdx,%r10,4),%xmm7
ucomiss %xmm0,%xmm7
jbe    1970 <kernel_CPU_06_mod_3DRhoCte+0x870>
movss  (%rdi,%r10,4),%xmm15
movaps %xmm15,%xmm3
addss  %xmm15,%xmm3
mov    %rbp,%rcx
mov    %rsi,%rbp
mov    0x268(%rsp),%rsi
subss  (%rsi,%r10,4),%xmm3
movaps %xmm7,%xmm5
mulss  -0x64(%rsp),%xmm5
mulss  %xmm7,%xmm5
movss  0x18(%rbx),%xmm9
mov    0x198(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm2
lea    0x6(%r8,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm2
movss  0x14(%rbx),%xmm10
lea    0x0(%r13,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm4
lea    0x5(%r8,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm4
mulss  %xmm10,%xmm4
mulss  %xmm9,%xmm2
addss  %xmm4,%xmm2
movss  0x10(%rbx),%xmm11
lea    (%r9,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm4
lea    0x4(%r8,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm4
mulss  %xmm11,%xmm4
addss  %xmm2,%xmm4
movss  0xc(%rbx),%xmm12
lea    (%rax,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm2
lea    0x3(%r8,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm2
mulss  %xmm12,%xmm2
addss  %xmm4,%xmm2
movss  0x4(%rbx),%xmm13
movss  0x8(%rbx),%xmm14
lea    (%r14,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm4
lea    0x2(%r8,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm4
mulss  %xmm14,%xmm4
addss  %xmm2,%xmm4
lea    (%r11,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm6
lea    0x1(%r8,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm6
mulss  %xmm13,%xmm6
addss  %xmm4,%xmm6
mulss  (%rbx),%xmm15
addss  %xmm15,%xmm6
mulss  %xmm5,%xmm6
addss  %xmm3,%xmm6
movaps %xmm7,%xmm5
mulss  -0x60(%rsp),%xmm5
mulss  %xmm7,%xmm5
mov    0x1a0(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm2
mov    0x1a8(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm2
mov    0x1b0(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm3
mov    0x1b8(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm3
mulss  %xmm10,%xmm3
mulss  %xmm9,%xmm2
mov    0x1c0(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm4
mov    0x1c8(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm4
addss  %xmm3,%xmm2
mulss  %xmm11,%xmm4
addss  %xmm2,%xmm4
mov    0x1d0(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm3
mov    0x1d8(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm3
mulss  %xmm12,%xmm3
addss  %xmm4,%xmm3
mov    0x1e0(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm2
mov    0x1e8(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm2
mulss  %xmm14,%xmm2
addss  %xmm3,%xmm2
mov    0x1f0(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm3
mov    0x1f8(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm3
mulss  %xmm13,%xmm3
mov    0x200(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm4
mov    0x208(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm4
addss  %xmm2,%xmm3
mov    0x210(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm8
mov    0x218(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm8
addss  %xmm15,%xmm3
mov    0x220(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm2
mov    0x228(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm2
mulss  %xmm5,%xmm3
mov    0x230(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm5
mov    0x238(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm5
mov    0x240(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm1
mov    0x248(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm1
mov    0x250(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
movss  (%rdi,%rdx,4),%xmm0
mov    0x258(%rsp),%rdx
lea    (%rdx,%r12,1),%edx
movslq %edx,%rdx
addss  (%rdi,%rdx,4),%xmm0
addss  %xmm6,%xmm3
movaps %xmm7,%xmm6
mulss  -0x5c(%rsp),%xmm6
mulss  %xmm7,%xmm6
mulss  %xmm10,%xmm8
mulss  %xmm9,%xmm4
addss  %xmm8,%xmm4
mulss  %xmm11,%xmm2
addss  %xmm4,%xmm2
mulss  %xmm12,%xmm5
addss  %xmm2,%xmm5
mulss  %xmm14,%xmm1
addss  %xmm5,%xmm1
mulss  %xmm13,%xmm0
addss  %xmm1,%xmm0
addss  %xmm15,%xmm0
mulss  %xmm6,%xmm0
addss  %xmm3,%xmm0
movss  %xmm0,(%rsi,%r10,4)
mov    %rbp,%rsi
mov    %rcx,%rbp
xorps  %xmm0,%xmm0
jmp    1970 <kernel_CPU_06_mod_3DRhoCte+0x870>
add    $0x278,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @kernel_CPU_06_mod_3DRhoCte(float* %0, float* %1, float* %2, i32 %3, i32 %4, i32 %5, i32 %6, float %7, float %8, float %9, float* %10) {
%12 = alloca float*
%13 = alloca float*
%14 = alloca float*
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca float
%20 = alloca float
%21 = alloca float
%22 = alloca float*
%23 = alloca i32
%24 = alloca i32
%25 = alloca i32
%26 = alloca i32
%27 = alloca i32
%28 = alloca i32
%29 = alloca i32
%30 = alloca i32
%31 = alloca i32
store float* %0, float** %12
store float* %1, float** %13
store float* %2, float** %14
store i32 %3, i32* %15
store i32 %4, i32* %16
store i32 %5, i32* %17
store i32 %6, i32* %18
store float %7, float* %19
store float %8, float* %20
store float %9, float* %21
store float* %10, float** %22
%32 = load i32, i32* %15
%33 = load i32, i32* %16
%34 = mul nsw i32 %32, %33
store i32 %34, i32* %26
store i32 0, i32* %23
br label %35
35: ; preds = %538, %11
%36 = load i32, i32* %23
%37 = load i32, i32* %15
%38 = icmp slt i32 %36, %37
br i1 %38, label %39, label %541
39: ; preds = %35
store i32 0, i32* %24
br label %40
40: ; preds = %534, %39
%41 = load i32, i32* %24
%42 = load i32, i32* %16
%43 = icmp slt i32 %41, %42
br i1 %43, label %44, label %537
44: ; preds = %40
store i32 0, i32* %28
br label %45
45: ; preds = %530, %44
%46 = load i32, i32* %28
%47 = load i32, i32* %18
%48 = load i32, i32* %17
%49 = sub nsw i32 %47, %48
%50 = icmp slt i32 %46, %49
br i1 %50, label %51, label %533
51: ; preds = %45
%52 = load i32, i32* %23
store i32 %52, i32* %25
br label %53
53: ; preds = %526, %51
%54 = load i32, i32* %25
%55 = load i32, i32* %15
store i32 %55, i32* %29
%56 = load i32, i32* %23
%57 = add nsw i32 %56, 2
store i32 %57, i32* %30
%58 = icmp eq i32* %29, %30
%59 = zext i1 %58 to i32
%60 = load i32, i32* %29
%61 = load i32, i32* %30
%62 = icmp slt i32 %60, %61
br i1 %62, label %63, label %65
63: ; preds = %53
%64 = load i32, i32* %29
br label %67
65: ; preds = %53
%66 = load i32, i32* %30
br label %67
67: ; preds = %65, %63
%68 = phi i32 [ %64, %63 ], [ %66, %65 ]
store i32 %68, i32* %31
%69 = load i32, i32* %31
%70 = icmp slt i32 %54, %69
br i1 %70, label %71, label %529
71: ; preds = %67
%72 = load i32, i32* %24
%73 = load i32, i32* %15
%74 = mul nsw i32 %72, %73
%75 = load i32, i32* %25
%76 = add nsw i32 %74, %75
%77 = load i32, i32* %17
%78 = load i32, i32* %28
%79 = add nsw i32 %77, %78
%80 = load i32, i32* %26
%81 = mul nsw i32 %79, %80
%82 = add nsw i32 %76, %81
store i32 %82, i32* %27
%83 = load float*, float** %14
%84 = load i32, i32* %27
%85 = sext i32 %84 to i64
%86 = getelementptr inbounds float, float* %83, i64 %85
%87 = load float, float* %86
%88 = fcmp ogt float %87, 0.000000e+00
br i1 %88, label %89, label %525
89: ; preds = %71
%90 = load float*, float** %12
%91 = load i32, i32* %27
%92 = sext i32 %91 to i64
%93 = getelementptr inbounds float, float* %90, i64 %92
%94 = load float, float* %93
%95 = load float*, float** %13
%96 = load i32, i32* %27
%97 = sext i32 %96 to i64
%98 = getelementptr inbounds float, float* %95, i64 %97
%99 = load float, float* %98
%100 = fneg float %99
%101 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %94, float %100)
%102 = load float, float* %19
%103 = load float*, float** %14
%104 = load i32, i32* %27
%105 = sext i32 %104 to i64
%106 = getelementptr inbounds float, float* %103, i64 %105
%107 = load float, float* %106
%108 = fmul float %102, %107
%109 = load float*, float** %14
%110 = load i32, i32* %27
%111 = sext i32 %110 to i64
%112 = getelementptr inbounds float, float* %109, i64 %111
%113 = load float, float* %112
%114 = fmul float %108, %113
%115 = load float*, float** %22
%116 = getelementptr inbounds float, float* %115, i64 6
%117 = load float, float* %116
%118 = load float*, float** %12
%119 = load i32, i32* %27
%120 = sub nsw i32 %119, 6
%121 = sext i32 %120 to i64
%122 = getelementptr inbounds float, float* %118, i64 %121
%123 = load float, float* %122
%124 = load float*, float** %12
%125 = load i32, i32* %27
%126 = add nsw i32 %125, 6
%127 = sext i32 %126 to i64
%128 = getelementptr inbounds float, float* %124, i64 %127
%129 = load float, float* %128
%130 = fadd float %123, %129
%131 = load float*, float** %22
%132 = getelementptr inbounds float, float* %131, i64 5
%133 = load float, float* %132
%134 = load float*, float** %12
%135 = load i32, i32* %27
%136 = sub nsw i32 %135, 5
%137 = sext i32 %136 to i64
%138 = getelementptr inbounds float, float* %134, i64 %137
%139 = load float, float* %138
%140 = load float*, float** %12
%141 = load i32, i32* %27
%142 = add nsw i32 %141, 5
%143 = sext i32 %142 to i64
%144 = getelementptr inbounds float, float* %140, i64 %143
%145 = load float, float* %144
%146 = fadd float %139, %145
%147 = fmul float %133, %146
%148 = call float @llvm.fmuladd.f32(float %117, float %130, float %147)
%149 = load float*, float** %22
%150 = getelementptr inbounds float, float* %149, i64 4
%151 = load float, float* %150
%152 = load float*, float** %12
%153 = load i32, i32* %27
%154 = sub nsw i32 %153, 4
%155 = sext i32 %154 to i64
%156 = getelementptr inbounds float, float* %152, i64 %155
%157 = load float, float* %156
%158 = load float*, float** %12
%159 = load i32, i32* %27
%160 = add nsw i32 %159, 4
%161 = sext i32 %160 to i64
%162 = getelementptr inbounds float, float* %158, i64 %161
%163 = load float, float* %162
%164 = fadd float %157, %163
%165 = call float @llvm.fmuladd.f32(float %151, float %164, float %148)
%166 = load float*, float** %22
%167 = getelementptr inbounds float, float* %166, i64 3
%168 = load float, float* %167
%169 = load float*, float** %12
%170 = load i32, i32* %27
%171 = sub nsw i32 %170, 3
%172 = sext i32 %171 to i64
%173 = getelementptr inbounds float, float* %169, i64 %172
%174 = load float, float* %173
%175 = load float*, float** %12
%176 = load i32, i32* %27
%177 = add nsw i32 %176, 3
%178 = sext i32 %177 to i64
%179 = getelementptr inbounds float, float* %175, i64 %178
%180 = load float, float* %179
%181 = fadd float %174, %180
%182 = call float @llvm.fmuladd.f32(float %168, float %181, float %165)
%183 = load float*, float** %22
%184 = getelementptr inbounds float, float* %183, i64 2
%185 = load float, float* %184
%186 = load float*, float** %12
%187 = load i32, i32* %27
%188 = sub nsw i32 %187, 2
%189 = sext i32 %188 to i64
%190 = getelementptr inbounds float, float* %186, i64 %189
%191 = load float, float* %190
%192 = load float*, float** %12
%193 = load i32, i32* %27
%194 = add nsw i32 %193, 2
%195 = sext i32 %194 to i64
%196 = getelementptr inbounds float, float* %192, i64 %195
%197 = load float, float* %196
%198 = fadd float %191, %197
%199 = call float @llvm.fmuladd.f32(float %185, float %198, float %182)
%200 = load float*, float** %22
%201 = getelementptr inbounds float, float* %200, i64 1
%202 = load float, float* %201
%203 = load float*, float** %12
%204 = load i32, i32* %27
%205 = sub nsw i32 %204, 1
%206 = sext i32 %205 to i64
%207 = getelementptr inbounds float, float* %203, i64 %206
%208 = load float, float* %207
%209 = load float*, float** %12
%210 = load i32, i32* %27
%211 = add nsw i32 %210, 1
%212 = sext i32 %211 to i64
%213 = getelementptr inbounds float, float* %209, i64 %212
%214 = load float, float* %213
%215 = fadd float %208, %214
%216 = call float @llvm.fmuladd.f32(float %202, float %215, float %199)
%217 = load float*, float** %22
%218 = getelementptr inbounds float, float* %217, i64 0
%219 = load float, float* %218
%220 = load float*, float** %12
%221 = load i32, i32* %27
%222 = sext i32 %221 to i64
%223 = getelementptr inbounds float, float* %220, i64 %222
%224 = load float, float* %223
%225 = call float @llvm.fmuladd.f32(float %219, float %224, float %216)
%226 = call float @llvm.fmuladd.f32(float %114, float %225, float %101)
%227 = load float, float* %20
%228 = load float*, float** %14
%229 = load i32, i32* %27
%230 = sext i32 %229 to i64
%231 = getelementptr inbounds float, float* %228, i64 %230
%232 = load float, float* %231
%233 = fmul float %227, %232
%234 = load float*, float** %14
%235 = load i32, i32* %27
%236 = sext i32 %235 to i64
%237 = getelementptr inbounds float, float* %234, i64 %236
%238 = load float, float* %237
%239 = fmul float %233, %238
%240 = load float*, float** %22
%241 = getelementptr inbounds float, float* %240, i64 6
%242 = load float, float* %241
%243 = load float*, float** %12
%244 = load i32, i32* %27
%245 = load i32, i32* %15
%246 = mul nsw i32 6, %245
%247 = sub nsw i32 %244, %246
%248 = sext i32 %247 to i64
%249 = getelementptr inbounds float, float* %243, i64 %248
%250 = load float, float* %249
%251 = load float*, float** %12
%252 = load i32, i32* %27
%253 = load i32, i32* %15
%254 = mul nsw i32 6, %253
%255 = add nsw i32 %252, %254
%256 = sext i32 %255 to i64
%257 = getelementptr inbounds float, float* %251, i64 %256
%258 = load float, float* %257
%259 = fadd float %250, %258
%260 = load float*, float** %22
%261 = getelementptr inbounds float, float* %260, i64 5
%262 = load float, float* %261
%263 = load float*, float** %12
%264 = load i32, i32* %27
%265 = load i32, i32* %15
%266 = mul nsw i32 5, %265
%267 = sub nsw i32 %264, %266
%268 = sext i32 %267 to i64
%269 = getelementptr inbounds float, float* %263, i64 %268
%270 = load float, float* %269
%271 = load float*, float** %12
%272 = load i32, i32* %27
%273 = load i32, i32* %15
%274 = mul nsw i32 5, %273
%275 = add nsw i32 %272, %274
%276 = sext i32 %275 to i64
%277 = getelementptr inbounds float, float* %271, i64 %276
%278 = load float, float* %277
%279 = fadd float %270, %278
%280 = fmul float %262, %279
%281 = call float @llvm.fmuladd.f32(float %242, float %259, float %280)
%282 = load float*, float** %22
%283 = getelementptr inbounds float, float* %282, i64 4
%284 = load float, float* %283
%285 = load float*, float** %12
%286 = load i32, i32* %27
%287 = load i32, i32* %15
%288 = mul nsw i32 4, %287
%289 = sub nsw i32 %286, %288
%290 = sext i32 %289 to i64
%291 = getelementptr inbounds float, float* %285, i64 %290
%292 = load float, float* %291
%293 = load float*, float** %12
%294 = load i32, i32* %27
%295 = load i32, i32* %15
%296 = mul nsw i32 4, %295
%297 = add nsw i32 %294, %296
%298 = sext i32 %297 to i64
%299 = getelementptr inbounds float, float* %293, i64 %298
%300 = load float, float* %299
%301 = fadd float %292, %300
%302 = call float @llvm.fmuladd.f32(float %284, float %301, float %281)
%303 = load float*, float** %22
%304 = getelementptr inbounds float, float* %303, i64 3
%305 = load float, float* %304
%306 = load float*, float** %12
%307 = load i32, i32* %27
%308 = load i32, i32* %15
%309 = mul nsw i32 3, %308
%310 = sub nsw i32 %307, %309
%311 = sext i32 %310 to i64
%312 = getelementptr inbounds float, float* %306, i64 %311
%313 = load float, float* %312
%314 = load float*, float** %12
%315 = load i32, i32* %27
%316 = load i32, i32* %15
%317 = mul nsw i32 3, %316
%318 = add nsw i32 %315, %317
%319 = sext i32 %318 to i64
%320 = getelementptr inbounds float, float* %314, i64 %319
%321 = load float, float* %320
%322 = fadd float %313, %321
%323 = call float @llvm.fmuladd.f32(float %305, float %322, float %302)
%324 = load float*, float** %22
%325 = getelementptr inbounds float, float* %324, i64 2
%326 = load float, float* %325
%327 = load float*, float** %12
%328 = load i32, i32* %27
%329 = load i32, i32* %15
%330 = mul nsw i32 2, %329
%331 = sub nsw i32 %328, %330
%332 = sext i32 %331 to i64
%333 = getelementptr inbounds float, float* %327, i64 %332
%334 = load float, float* %333
%335 = load float*, float** %12
%336 = load i32, i32* %27
%337 = load i32, i32* %15
%338 = mul nsw i32 2, %337
%339 = add nsw i32 %336, %338
%340 = sext i32 %339 to i64
%341 = getelementptr inbounds float, float* %335, i64 %340
%342 = load float, float* %341
%343 = fadd float %334, %342
%344 = call float @llvm.fmuladd.f32(float %326, float %343, float %323)
%345 = load float*, float** %22
%346 = getelementptr inbounds float, float* %345, i64 1
%347 = load float, float* %346
%348 = load float*, float** %12
%349 = load i32, i32* %27
%350 = load i32, i32* %15
%351 = sub nsw i32 %349, %350
%352 = sext i32 %351 to i64
%353 = getelementptr inbounds float, float* %348, i64 %352
%354 = load float, float* %353
%355 = load float*, float** %12
%356 = load i32, i32* %27
%357 = load i32, i32* %15
%358 = add nsw i32 %356, %357
%359 = sext i32 %358 to i64
%360 = getelementptr inbounds float, float* %355, i64 %359
%361 = load float, float* %360
%362 = fadd float %354, %361
%363 = call float @llvm.fmuladd.f32(float %347, float %362, float %344)
%364 = load float*, float** %22
%365 = getelementptr inbounds float, float* %364, i64 0
%366 = load float, float* %365
%367 = load float*, float** %12
%368 = load i32, i32* %27
%369 = sext i32 %368 to i64
%370 = getelementptr inbounds float, float* %367, i64 %369
%371 = load float, float* %370
%372 = call float @llvm.fmuladd.f32(float %366, float %371, float %363)
%373 = call float @llvm.fmuladd.f32(float %239, float %372, float %226)
%374 = load float, float* %21
%375 = load float*, float** %14
%376 = load i32, i32* %27
%377 = sext i32 %376 to i64
%378 = getelementptr inbounds float, float* %375, i64 %377
%379 = load float, float* %378
%380 = fmul float %374, %379
%381 = load float*, float** %14
%382 = load i32, i32* %27
%383 = sext i32 %382 to i64
%384 = getelementptr inbounds float, float* %381, i64 %383
%385 = load float, float* %384
%386 = fmul float %380, %385
%387 = load float*, float** %22
%388 = getelementptr inbounds float, float* %387, i64 6
%389 = load float, float* %388
%390 = load float*, float** %12
%391 = load i32, i32* %27
%392 = load i32, i32* %26
%393 = mul nsw i32 6, %392
%394 = add nsw i32 %391, %393
%395 = sext i32 %394 to i64
%396 = getelementptr inbounds float, float* %390, i64 %395
%397 = load float, float* %396
%398 = load float*, float** %12
%399 = load i32, i32* %27
%400 = load i32, i32* %26
%401 = mul nsw i32 6, %400
%402 = sub nsw i32 %399, %401
%403 = sext i32 %402 to i64
%404 = getelementptr inbounds float, float* %398, i64 %403
%405 = load float, float* %404
%406 = fadd float %397, %405
%407 = load float*, float** %22
%408 = getelementptr inbounds float, float* %407, i64 5
%409 = load float, float* %408
%410 = load float*, float** %12
%411 = load i32, i32* %27
%412 = load i32, i32* %26
%413 = mul nsw i32 5, %412
%414 = add nsw i32 %411, %413
%415 = sext i32 %414 to i64
%416 = getelementptr inbounds float, float* %410, i64 %415
%417 = load float, float* %416
%418 = load float*, float** %12
%419 = load i32, i32* %27
%420 = load i32, i32* %26
%421 = mul nsw i32 5, %420
%422 = sub nsw i32 %419, %421
%423 = sext i32 %422 to i64
%424 = getelementptr inbounds float, float* %418, i64 %423
%425 = load float, float* %424
%426 = fadd float %417, %425
%427 = fmul float %409, %426
%428 = call float @llvm.fmuladd.f32(float %389, float %406, float %427)
%429 = load float*, float** %22
%430 = getelementptr inbounds float, float* %429, i64 4
%431 = load float, float* %430
%432 = load float*, float** %12
%433 = load i32, i32* %27
%434 = load i32, i32* %26
%435 = mul nsw i32 4, %434
%436 = add nsw i32 %433, %435
%437 = sext i32 %436 to i64
%438 = getelementptr inbounds float, float* %432, i64 %437
%439 = load float, float* %438
%440 = load float*, float** %12
%441 = load i32, i32* %27
%442 = load i32, i32* %26
%443 = mul nsw i32 4, %442
%444 = sub nsw i32 %441, %443
%445 = sext i32 %444 to i64
%446 = getelementptr inbounds float, float* %440, i64 %445
%447 = load float, float* %446
%448 = fadd float %439, %447
%449 = call float @llvm.fmuladd.f32(float %431, float %448, float %428)
%450 = load float*, float** %22
%451 = getelementptr inbounds float, float* %450, i64 3
%452 = load float, float* %451
%453 = load float*, float** %12
%454 = load i32, i32* %27
%455 = load i32, i32* %26
%456 = mul nsw i32 3, %455
%457 = add nsw i32 %454, %456
%458 = sext i32 %457 to i64
%459 = getelementptr inbounds float, float* %453, i64 %458
%460 = load float, float* %459
%461 = load float*, float** %12
%462 = load i32, i32* %27
%463 = load i32, i32* %26
%464 = mul nsw i32 3, %463
%465 = sub nsw i32 %462, %464
%466 = sext i32 %465 to i64
%467 = getelementptr inbounds float, float* %461, i64 %466
%468 = load float, float* %467
%469 = fadd float %460, %468
%470 = call float @llvm.fmuladd.f32(float %452, float %469, float %449)
%471 = load float*, float** %22
%472 = getelementptr inbounds float, float* %471, i64 2
%473 = load float, float* %472
%474 = load float*, float** %12
%475 = load i32, i32* %27
%476 = load i32, i32* %26
%477 = mul nsw i32 2, %476
%478 = add nsw i32 %475, %477
%479 = sext i32 %478 to i64
%480 = getelementptr inbounds float, float* %474, i64 %479
%481 = load float, float* %480
%482 = load float*, float** %12
%483 = load i32, i32* %27
%484 = load i32, i32* %26
%485 = mul nsw i32 2, %484
%486 = sub nsw i32 %483, %485
%487 = sext i32 %486 to i64
%488 = getelementptr inbounds float, float* %482, i64 %487
%489 = load float, float* %488
%490 = fadd float %481, %489
%491 = call float @llvm.fmuladd.f32(float %473, float %490, float %470)
%492 = load float*, float** %22
%493 = getelementptr inbounds float, float* %492, i64 1
%494 = load float, float* %493
%495 = load float*, float** %12
%496 = load i32, i32* %27
%497 = load i32, i32* %26
%498 = add nsw i32 %496, %497
%499 = sext i32 %498 to i64
%500 = getelementptr inbounds float, float* %495, i64 %499
%501 = load float, float* %500
%502 = load float*, float** %12
%503 = load i32, i32* %27
%504 = load i32, i32* %26
%505 = sub nsw i32 %503, %504
%506 = sext i32 %505 to i64
%507 = getelementptr inbounds float, float* %502, i64 %506
%508 = load float, float* %507
%509 = fadd float %501, %508
%510 = call float @llvm.fmuladd.f32(float %494, float %509, float %491)
%511 = load float*, float** %22
%512 = getelementptr inbounds float, float* %511, i64 0
%513 = load float, float* %512
%514 = load float*, float** %12
%515 = load i32, i32* %27
%516 = sext i32 %515 to i64
%517 = getelementptr inbounds float, float* %514, i64 %516
%518 = load float, float* %517
%519 = call float @llvm.fmuladd.f32(float %513, float %518, float %510)
%520 = call float @llvm.fmuladd.f32(float %386, float %519, float %373)
%521 = load float*, float** %13
%522 = load i32, i32* %27
%523 = sext i32 %522 to i64
%524 = getelementptr inbounds float, float* %521, i64 %523
store float %520, float* %524
br label %525
525: ; preds = %89, %71
br label %526
526: ; preds = %525
%527 = load i32, i32* %25
%528 = add nsw i32 %527, 1
store i32 %528, i32* %25
br label %53
529: ; preds = %67
br label %530
530: ; preds = %529
%531 = load i32, i32* %28
%532 = add nsw i32 %531, 1
store i32 %532, i32* %28
br label %45
533: ; preds = %45
br label %534
534: ; preds = %533
%535 = load i32, i32* %24
%536 = add nsw i32 %535, 1
store i32 %536, i32* %24
br label %40
537: ; preds = %40
br label %538
538: ; preds = %537
%539 = load i32, i32* %23
%540 = add nsw i32 %539, 2
store i32 %540, i32* %23
br label %35
541: ; preds = %35
ret void
}

LLVM IR (-O2):
define void @kernel_CPU_06_mod_3DRhoCte(float* %0, float* nocapture %1, float* nocapture %2, i32 %3, i32 %4, i32 %5, i32 %6, float %7, float %8, float %9, float* nocapture %10) {
%12 = mul nsw i32 %4, %3
%13 = icmp sgt i32 %3, 0
br i1 %13, label %14, label %280
14: ; preds = %11
%15 = icmp sgt i32 %4, 0
%16 = sub i32 %6, %5
%17 = icmp sgt i32 %16, 0
%18 = getelementptr inbounds float, float* %10, i64 6
%19 = getelementptr inbounds float, float* %10, i64 5
%20 = getelementptr inbounds float, float* %10, i64 4
%21 = getelementptr inbounds float, float* %10, i64 3
%22 = getelementptr inbounds float, float* %10, i64 2
%23 = getelementptr inbounds float, float* %10, i64 1
%24 = mul nsw i32 %3, 6
%25 = mul nsw i32 %3, 5
%26 = shl nsw i32 %3, 2
%27 = mul nsw i32 %3, 3
%28 = shl nuw nsw i32 %3, 1
%29 = mul nsw i32 %12, 6
%30 = mul nsw i32 %12, 5
%31 = shl nsw i32 %12, 2
%32 = mul nsw i32 %12, 3
%33 = shl nsw i32 %12, 1
br label %34
34: ; preds = %14, %276
%35 = phi i64 [ 0, %14 ], [ %277, %276 ]
%36 = trunc i64 %35 to i32
br i1 %15, label %37, label %276
37: ; preds = %34
%38 = add nuw nsw i32 %36, 2
%39 = icmp sgt i32 %38, %3
%40 = select i1 %39, i32 %3, i32 %38
%41 = icmp sgt i32 %40, %36
%42 = sext i32 %40 to i64
br label %43
43: ; preds = %37, %273
%44 = phi i32 [ 0, %37 ], [ %274, %273 ]
br i1 %17, label %45, label %273
45: ; preds = %43
%46 = mul nsw i32 %44, %3
br label %47
47: ; preds = %45, %270
%48 = phi i32 [ 0, %45 ], [ %271, %270 ]
br i1 %41, label %49, label %270
49: ; preds = %47
%50 = add nsw i32 %48, %5
%51 = mul nsw i32 %50, %12
%52 = add i32 %51, %46
br label %53
53: ; preds = %49, %267
%54 = phi i64 [ %35, %49 ], [ %268, %267 ]
%55 = trunc i64 %54 to i32
%56 = add i32 %52, %55
%57 = sext i32 %56 to i64
%58 = getelementptr inbounds float, float* %2, i64 %57
%59 = load float, float* %58
%60 = fcmp ogt float %59, 0.000000e+00
br i1 %60, label %61, label %267
61: ; preds = %53
%62 = getelementptr inbounds float, float* %0, i64 %57
%63 = load float, float* %62
%64 = getelementptr inbounds float, float* %1, i64 %57
%65 = load float, float* %64
%66 = fneg float %65
%67 = tail call float @llvm.fmuladd.f32(float %63, float 2.000000e+00, float %66)
%68 = fmul float %59, %7
%69 = fmul float %59, %68
%70 = load float, float* %18
%71 = add nsw i32 %56, -6
%72 = sext i32 %71 to i64
%73 = getelementptr inbounds float, float* %0, i64 %72
%74 = load float, float* %73
%75 = add nsw i32 %56, 6
%76 = sext i32 %75 to i64
%77 = getelementptr inbounds float, float* %0, i64 %76
%78 = load float, float* %77
%79 = fadd float %74, %78
%80 = load float, float* %19
%81 = add nsw i32 %56, -5
%82 = sext i32 %81 to i64
%83 = getelementptr inbounds float, float* %0, i64 %82
%84 = load float, float* %83
%85 = add nsw i32 %56, 5
%86 = sext i32 %85 to i64
%87 = getelementptr inbounds float, float* %0, i64 %86
%88 = load float, float* %87
%89 = fadd float %84, %88
%90 = fmul float %80, %89
%91 = tail call float @llvm.fmuladd.f32(float %70, float %79, float %90)
%92 = load float, float* %20
%93 = add nsw i32 %56, -4
%94 = sext i32 %93 to i64
%95 = getelementptr inbounds float, float* %0, i64 %94
%96 = load float, float* %95
%97 = add nsw i32 %56, 4
%98 = sext i32 %97 to i64
%99 = getelementptr inbounds float, float* %0, i64 %98
%100 = load float, float* %99
%101 = fadd float %96, %100
%102 = tail call float @llvm.fmuladd.f32(float %92, float %101, float %91)
%103 = load float, float* %21
%104 = add nsw i32 %56, -3
%105 = sext i32 %104 to i64
%106 = getelementptr inbounds float, float* %0, i64 %105
%107 = load float, float* %106
%108 = add nsw i32 %56, 3
%109 = sext i32 %108 to i64
%110 = getelementptr inbounds float, float* %0, i64 %109
%111 = load float, float* %110
%112 = fadd float %107, %111
%113 = tail call float @llvm.fmuladd.f32(float %103, float %112, float %102)
%114 = load float, float* %22
%115 = add nsw i32 %56, -2
%116 = sext i32 %115 to i64
%117 = getelementptr inbounds float, float* %0, i64 %116
%118 = load float, float* %117
%119 = add nsw i32 %56, 2
%120 = sext i32 %119 to i64
%121 = getelementptr inbounds float, float* %0, i64 %120
%122 = load float, float* %121
%123 = fadd float %118, %122
%124 = tail call float @llvm.fmuladd.f32(float %114, float %123, float %113)
%125 = load float, float* %23
%126 = add nsw i32 %56, -1
%127 = sext i32 %126 to i64
%128 = getelementptr inbounds float, float* %0, i64 %127
%129 = load float, float* %128
%130 = add nsw i32 %56, 1
%131 = sext i32 %130 to i64
%132 = getelementptr inbounds float, float* %0, i64 %131
%133 = load float, float* %132
%134 = fadd float %129, %133
%135 = tail call float @llvm.fmuladd.f32(float %125, float %134, float %124)
%136 = load float, float* %10
%137 = tail call float @llvm.fmuladd.f32(float %136, float %63, float %135)
%138 = tail call float @llvm.fmuladd.f32(float %69, float %137, float %67)
%139 = fmul float %59, %8
%140 = fmul float %59, %139
%141 = sub nsw i32 %56, %24
%142 = sext i32 %141 to i64
%143 = getelementptr inbounds float, float* %0, i64 %142
%144 = load float, float* %143
%145 = add nsw i32 %56, %24
%146 = sext i32 %145 to i64
%147 = getelementptr inbounds float, float* %0, i64 %146
%148 = load float, float* %147
%149 = fadd float %144, %148
%150 = sub nsw i32 %56, %25
%151 = sext i32 %150 to i64
%152 = getelementptr inbounds float, float* %0, i64 %151
%153 = load float, float* %152
%154 = add nsw i32 %56, %25
%155 = sext i32 %154 to i64
%156 = getelementptr inbounds float, float* %0, i64 %155
%157 = load float, float* %156
%158 = fadd float %153, %157
%159 = fmul float %80, %158
%160 = tail call float @llvm.fmuladd.f32(float %70, float %149, float %159)
%161 = sub nsw i32 %56, %26
%162 = sext i32 %161 to i64
%163 = getelementptr inbounds float, float* %0, i64 %162
%164 = load float, float* %163
%165 = add nsw i32 %56, %26
%166 = sext i32 %165 to i64
%167 = getelementptr inbounds float, float* %0, i64 %166
%168 = load float, float* %167
%169 = fadd float %164, %168
%170 = tail call float @llvm.fmuladd.f32(float %92, float %169, float %160)
%171 = sub nsw i32 %56, %27
%172 = sext i32 %171 to i64
%173 = getelementptr inbounds float, float* %0, i64 %172
%174 = load float, float* %173
%175 = add nsw i32 %56, %27
%176 = sext i32 %175 to i64
%177 = getelementptr inbounds float, float* %0, i64 %176
%178 = load float, float* %177
%179 = fadd float %174, %178
%180 = tail call float @llvm.fmuladd.f32(float %103, float %179, float %170)
%181 = sub nsw i32 %56, %28
%182 = sext i32 %181 to i64
%183 = getelementptr inbounds float, float* %0, i64 %182
%184 = load float, float* %183
%185 = add nsw i32 %56, %28
%186 = sext i32 %185 to i64
%187 = getelementptr inbounds float, float* %0, i64 %186
%188 = load float, float* %187
%189 = fadd float %184, %188
%190 = tail call float @llvm.fmuladd.f32(float %114, float %189, float %180)
%191 = sub nsw i32 %56, %3
%192 = sext i32 %191 to i64
%193 = getelementptr inbounds float, float* %0, i64 %192
%194 = load float, float* %193
%195 = add nsw i32 %56, %3
%196 = sext i32 %195 to i64
%197 = getelementptr inbounds float, float* %0, i64 %196
%198 = load float, float* %197
%199 = fadd float %194, %198
%200 = tail call float @llvm.fmuladd.f32(float %125, float %199, float %190)
%201 = tail call float @llvm.fmuladd.f32(float %136, float %63, float %200)
%202 = tail call float @llvm.fmuladd.f32(float %140, float %201, float %138)
%203 = fmul float %59, %9
%204 = fmul float %59, %203
%205 = add nsw i32 %56, %29
%206 = sext i32 %205 to i64
%207 = getelementptr inbounds float, float* %0, i64 %206
%208 = load float, float* %207
%209 = sub nsw i32 %56, %29
%210 = sext i32 %209 to i64
%211 = getelementptr inbounds float, float* %0, i64 %210
%212 = load float, float* %211
%213 = fadd float %208, %212
%214 = add nsw i32 %56, %30
%215 = sext i32 %214 to i64
%216 = getelementptr inbounds float, float* %0, i64 %215
%217 = load float, float* %216
%218 = sub nsw i32 %56, %30
%219 = sext i32 %218 to i64
%220 = getelementptr inbounds float, float* %0, i64 %219
%221 = load float, float* %220
%222 = fadd float %217, %221
%223 = fmul float %80, %222
%224 = tail call float @llvm.fmuladd.f32(float %70, float %213, float %223)
%225 = add nsw i32 %56, %31
%226 = sext i32 %225 to i64
%227 = getelementptr inbounds float, float* %0, i64 %226
%228 = load float, float* %227
%229 = sub nsw i32 %56, %31
%230 = sext i32 %229 to i64
%231 = getelementptr inbounds float, float* %0, i64 %230
%232 = load float, float* %231
%233 = fadd float %228, %232
%234 = tail call float @llvm.fmuladd.f32(float %92, float %233, float %224)
%235 = add nsw i32 %56, %32
%236 = sext i32 %235 to i64
%237 = getelementptr inbounds float, float* %0, i64 %236
%238 = load float, float* %237
%239 = sub nsw i32 %56, %32
%240 = sext i32 %239 to i64
%241 = getelementptr inbounds float, float* %0, i64 %240
%242 = load float, float* %241
%243 = fadd float %238, %242
%244 = tail call float @llvm.fmuladd.f32(float %103, float %243, float %234)
%245 = add nsw i32 %56, %33
%246 = sext i32 %245 to i64
%247 = getelementptr inbounds float, float* %0, i64 %246
%248 = load float, float* %247
%249 = sub nsw i32 %56, %33
%250 = sext i32 %249 to i64
%251 = getelementptr inbounds float, float* %0, i64 %250
%252 = load float, float* %251
%253 = fadd float %248, %252
%254 = tail call float @llvm.fmuladd.f32(float %114, float %253, float %244)
%255 = add nsw i32 %56, %12
%256 = sext i32 %255 to i64
%257 = getelementptr inbounds float, float* %0, i64 %256
%258 = load float, float* %257
%259 = sub nsw i32 %56, %12
%260 = sext i32 %259 to i64
%261 = getelementptr inbounds float, float* %0, i64 %260
%262 = load float, float* %261
%263 = fadd float %258, %262
%264 = tail call float @llvm.fmuladd.f32(float %125, float %263, float %254)
%265 = tail call float @llvm.fmuladd.f32(float %136, float %63, float %264)
%266 = tail call float @llvm.fmuladd.f32(float %204, float %265, float %202)
store float %266, float* %64
br label %267
267: ; preds = %53, %61
%268 = add nuw nsw i64 %54, 1
%269 = icmp slt i64 %268, %42
br i1 %269, label %53, label %270
270: ; preds = %267, %47
%271 = add nuw nsw i32 %48, 1
%272 = icmp eq i32 %271, %16
br i1 %272, label %273, label %47
273: ; preds = %270, %43
%274 = add nuw nsw i32 %44, 1
%275 = icmp eq i32 %274, %4
br i1 %275, label %276, label %43
276: ; preds = %273, %34
%277 = add nuw nsw i64 %35, 2
%278 = trunc i64 %277 to i32
%279 = icmp slt i32 %278, %3
br i1 %279, label %34, label %280
280: ; preds = %276, %11
ret void
}