xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ process(char *);
int main(int argc, char *argv[]) {
  char *docbase = "/var/www";
  if (argc > 1)
    docbase = argv[1];
  process(docbase);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1147 <main+0x37>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <process@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     111c <main+0xc>
mov    0x8(%rsi),%rdi
jmp    1123 <main+0x13>
lea    0xedd(%rip),%rdi
call   1030 <process@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"/var/www\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
store i8* %12, i8** %6
br label %13
13: ; preds = %9, %2
%14 = load i8*, i8** %6
%15 = call i32 @process(i8* %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"/var/www\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
br label %7
7: ; preds = %4, %2
%8 = phi i8* [ %6, %4 ], [ getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), %2 ]
%9 = tail call i32 @process(i8* %8)
ret i32 0
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
void store_UINT32(uint32_t *arr, uint32_t idx, uint32_t value) {
  arr[idx] = value;
}


x86 assembly (clang, -O0):
<store_UINT32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<store_UINT32>:
mov    %rdx,(%rdi,%rsi,8)
ret

LLVM IR (-O0):
define void @store_UINT32(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = load i64*, i64** %4
%9 = load i64, i64* %5
%10 = getelementptr inbounds i64, i64* %8, i64 %9
store i64 %7, i64* %10
ret void
}

LLVM IR (-O2):
define void @store_UINT32(i64* nocapture writeonly %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i64, i64* %0, i64 %1
store i64 %2, i64* %4
ret void
}
/* Type definitions */
struct peer {
  int dummy;
};

/* Variables and functions */
int check_username(char *, char *);
char *get_username(struct peer *, char *);
int isitpeer(struct peer *p, char *inp) {
  char *login = NULL;
  login = get_username(p, login);
  return check_username(inp, login);
}


x86 assembly (clang, -O0):
<isitpeer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <get_username@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <check_username@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isitpeer>:
push   %rbx
mov    %rsi,%rbx
xor    %esi,%esi
call   1030 <get_username@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1040 <check_username@plt>

LLVM IR (-O0):
%struct.peer = type { i32 }
define i32 @isitpeer(%struct.peer* %0, i8* %1) {
%3 = alloca %struct.peer*
%4 = alloca i8*
%5 = alloca i8*
store %struct.peer* %0, %struct.peer** %3
store i8* %1, i8** %4
store i8* null, i8** %5
%6 = load %struct.peer*, %struct.peer** %3
%7 = load i8*, i8** %5
%8 = call i8* @get_username(%struct.peer* %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = call i32 @check_username(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.peer = type { i32 }
define i32 @isitpeer(%struct.peer* %0, i8* %1) {
%3 = tail call i8* @get_username(%struct.peer* %0, i8* null)
%4 = tail call i32 @check_username(i8* %1, i8* %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ thr1(int /*<<< orphan*/);
int /*<<< orphan*/ thr2(int /*<<< orphan*/);
int /*<<< orphan*/ thr3(int /*<<< orphan*/);
int /*<<< orphan*/ thr4(int /*<<< orphan*/);
int /*<<< orphan*/ thr5(int /*<<< orphan*/);
int /*<<< orphan*/ thr6(int /*<<< orphan*/);
int /*<<< orphan*/ thr7(int /*<<< orphan*/);
int /*<<< orphan*/ thr8(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  thr1(0);
__CPROVER_ASYNC_1:
  thr2(0);
__CPROVER_ASYNC_2:
  thr3(0);
__CPROVER_ASYNC_3:
  thr4(0);
__CPROVER_ASYNC_4:
  thr5(0);
__CPROVER_ASYNC_5:
  thr6(0);
__CPROVER_ASYNC_6:
  thr7(0);
__CPROVER_ASYNC_7:
  thr8(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
jmp    1189 <main+0x9>
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1090 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1080 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   10a0 <thr7@plt>
xor    %edi,%edi
call   1070 <thr8@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1090 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1080 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   10a0 <thr7@plt>
xor    %edi,%edi
call   1070 <thr8@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
br label %1
1: ; preds = %0
%2 = call i32 @thr1(i32 0)
br label %3
3: ; preds = %1
%4 = call i32 @thr2(i32 0)
br label %5
5: ; preds = %3
%6 = call i32 @thr3(i32 0)
br label %7
7: ; preds = %5
%8 = call i32 @thr4(i32 0)
br label %9
9: ; preds = %7
%10 = call i32 @thr5(i32 0)
br label %11
11: ; preds = %9
%12 = call i32 @thr6(i32 0)
br label %13
13: ; preds = %11
%14 = call i32 @thr7(i32 0)
br label %15
15: ; preds = %13
%16 = call i32 @thr8(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @thr1(i32 0)
%2 = tail call i32 @thr2(i32 0)
%3 = tail call i32 @thr3(i32 0)
%4 = tail call i32 @thr4(i32 0)
%5 = tail call i32 @thr5(i32 0)
%6 = tail call i32 @thr6(i32 0)
%7 = tail call i32 @thr7(i32 0)
%8 = tail call i32 @thr8(i32 0)
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_clear_standard_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(27, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_clear_standard_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1b,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_clear_standard_system>:
mov    $0x1b,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @syscon_clear_standard_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 27, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_clear_standard_system() {
%1 = tail call i32 @_ada_use_c2phc(i32 27, i32* undef, i32* undef, double* undef)
ret i32 %1
}
double ls_costN_nm7_twice(double x) { return x + x; }


x86 assembly (clang, -O0):
<ls_costN_nm7_twice>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm7_twice>:
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_costN_nm7_twice(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fadd double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_costN_nm7_twice(double %0) {
%2 = fadd double %0, %0
ret double %2
}
int streamInqHistorySize(int streamID) {
  int size = 0;
  (void)streamID;
  return (size);
}


x86 assembly (clang, -O0):
<streamInqHistorySize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<streamInqHistorySize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @streamInqHistorySize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @streamInqHistorySize(i32 %0) {
ret i32 0
}
int ret10() {
  static int i = 10;
  i += 1;
  return (i);
}


x86 assembly (clang, -O0):
<ret10>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f0d(%rip)
mov    0x2f07(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ret10>:
mov    0x2f1a(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f11(%rip)
ret

LLVM IR (-O0):
@ret10.i = internal global i32 10
define i32 @ret10() {
%1 = load i32, i32* @ret10.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @ret10.i
%3 = load i32, i32* @ret10.i
ret i32 %3
}

LLVM IR (-O2):
@ret10.i = internal unnamed_addr global i32 10
define i32 @ret10() {
%1 = load i32, i32* @ret10.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @ret10.i
ret i32 %2
}
void dmaFence() { asm(""); }


x86 assembly (clang, -O0):
<dmaFence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmaFence>:
ret

LLVM IR (-O0):
define void @dmaFence() {
ret void
}

LLVM IR (-O2):
define void @dmaFence() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
is_ipdotformat(char *s) {
  int d;
  for (d = 0; *s; s++) {
    if (*s == '.')
      d++;
  }
  return (d == 3);
}


x86 assembly (clang, -O0):
<is_ipdotformat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <is_ipdotformat+0x4b>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
jne    1135 <is_ipdotformat+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113a <is_ipdotformat+0x3a>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <is_ipdotformat+0xf>
cmpl   $0x3,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ipdotformat>:
xor    %ecx,%ecx
jmp    1117 <is_ipdotformat+0x17>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%ecx
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0x2e,%al
je     1110 <is_ipdotformat+0x10>
test   %al,%al
jne    1113 <is_ipdotformat+0x13>
xor    %eax,%eax
cmp    $0x3,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @is_ipdotformat(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 46
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %8
br label %17
17: ; preds = %16
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %4
20: ; preds = %4
%21 = load i32, i32* %3
%22 = icmp eq i32 %21, 3
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @is_ipdotformat(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %10, %8 ]
%4 = phi i32 [ 0, %1 ], [ %9, %8 ]
%5 = load i8, i8* %3
switch i8 %5, label %8 [
i8 0, label %11
i8 46, label %6
]
6: ; preds = %2
%7 = add nsw i32 %4, 1
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ %4, %2 ]
%10 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
11: ; preds = %2
%12 = icmp eq i32 %4, 3
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ emit_movimm(int, int);
void do_preload_rhash(int r) { emit_movimm(0xf8, r); }


x86 assembly (clang, -O0):
<do_preload_rhash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0xf8,%edi
call   1030 <emit_movimm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_preload_rhash>:
mov    %edi,%esi
mov    $0xf8,%edi
jmp    1030 <emit_movimm@plt>

LLVM IR (-O0):
define void @do_preload_rhash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @emit_movimm(i32 248, i32 %3)
ret void
}

LLVM IR (-O2):
define void @do_preload_rhash(i32 %0) {
%2 = tail call i32 @emit_movimm(i32 248, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mgrSendMessageToLedController(char *);
int mgrUploadStopped(int code, void *arg1, void *arg2) {
  ;
  if (code == 0) {
    mgrSendMessageToLedController("/led/orange/on");
  } else {
    mgrSendMessageToLedController("/led/orange/blink/fast");
  }
  return 0;
}


x86 assembly (clang, -O0):
<mgrUploadStopped>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    113e <mgrUploadStopped+0x2e>
lea    0xecc(%rip),%rdi
call   1030 <mgrSendMessageToLedController@plt>
jmp    114a <mgrUploadStopped+0x3a>
lea    0xeca(%rip),%rdi
call   1030 <mgrSendMessageToLedController@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mgrUploadStopped>:
push   %rax
test   %edi,%edi
lea    0xee6(%rip),%rax
lea    0xeee(%rip),%rdi
cmove  %rax,%rdi
call   1030 <mgrSendMessageToLedController@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"/led/orange/on\00"
@.str.1 = [23 x i8] c"/led/orange/blink/fast\00"
define i32 @mgrUploadStopped(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 @mgrSendMessageToLedController(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %13
11: ; preds = %3
%12 = call i32 @mgrSendMessageToLedController(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %9
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"/led/orange/on\00"
@.str.1 = [23 x i8] c"/led/orange/blink/fast\00"
define i32 @mgrUploadStopped(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0)
%6 = tail call i32 @mgrSendMessageToLedController(i8* %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_debug(char *);
int /*<<< orphan*/ uart_init();
void main(void) {
  static const char msg[] = "hello world\r\n";
  uart_init();
  print_debug("hello world\r\n");
  print_debug("how are you today\r\n");
  while (1) {
    ;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <uart_init@plt>
lea    0xedc(%rip),%rdi
call   1040 <print_debug@plt>
lea    0xede(%rip),%rdi
call   1040 <print_debug@plt>
jmp    1143 <main+0x23>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <uart_init@plt>
lea    0xed1(%rip),%rdi
call   1040 <print_debug@plt>
lea    0xed3(%rip),%rdi
call   1040 <print_debug@plt>
jmp    1140 <main+0x20>

LLVM IR (-O0):
@main.msg = internal constant [14 x i8] c"hello world\0D\0A\00"
@.str = [14 x i8] c"hello world\0D\0A\00"
@.str.1 = [20 x i8] c"how are you today\0D\0A\00"
define void @main() {
%1 = call i32 (...) @uart_init()
%2 = call i32 @print_debug(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @print_debug(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
br label %4
4: ; preds = %0, %4
br label %4
}

LLVM IR (-O2):
@.str = [14 x i8] c"hello world\0D\0A\00"
@.str.1 = [20 x i8] c"how are you today\0D\0A\00"
define void @main() {
%1 = tail call i32 (...) @uart_init()
%2 = tail call i32 @print_debug(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @print_debug(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
br label %4
4: ; preds = %0, %4
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("Goodbye cruel world\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Goodbye cruel world\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [20 x i8] c"Goodbye cruel world\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long long, unsigned long long,
                          unsigned long long);
int main(int argc, const char *argv[]) {
  int i = 2147483647;
  unsigned long long j = 1.54467441e19;
  printf("%d %d %d\n", i, i + 1, i + 2);
  printf("%llu %llu %llu\n", j, j + 1, j + 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x7fffffff,-0x14(%rbp)
movabs $0xd65ddbeb28dc6800,%rax
db 5d d6
mov    %rax,-0x20(%rbp)
movslq -0x14(%rbp),%rsi
mov    -0x14(%rbp),%eax
add    $0x1,%eax
movslq %eax,%rdx
mov    -0x14(%rbp),%eax
add    $0x2,%eax
movslq %eax,%rcx
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x20(%rbp),%rsi
mov    -0x20(%rbp),%rdx
add    $0x1,%rdx
mov    -0x20(%rbp),%rcx
add    $0x2,%rcx
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x7fffffff,%esi
mov    $0xffffffff80000000,%rdx
mov    $0xffffffff80000001,%rcx
call   1030 <printf@plt>
movabs $0xd65ddbeb28dc6800,%rsi
db 5d d6
lea    0x1(%rsi),%rdx
lea    0x2(%rsi),%rcx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%d %d %d\0A\00"
@.str.1 = [16 x i8] c"%llu %llu %llu\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 2147483647, i32* %6
store i64 -2999999973709551616, i64* %7
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = load i32, i32* %6
%14 = add nsw i32 %13, 2
%15 = sext i32 %14 to i64
%16 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %9, i64 %12, i64 %15)
%17 = load i64, i64* %7
%18 = load i64, i64* %7
%19 = add i64 %18, 1
%20 = load i64, i64* %7
%21 = add i64 %20, 2
%22 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i64 %17, i64 %19, i64 %21)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"%d %d %d\0A\00"
@.str.1 = [16 x i8] c"%llu %llu %llu\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 2147483647, i64 -2147483648, i64 -2147483647)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i64 -2999999973709551616, i64 -2999999973709551615, i64 -2999999973709551614)
ret i32 0
}
void g_param_spec_long() {}


x86 assembly (clang, -O0):
<g_param_spec_long>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_long>:
ret

LLVM IR (-O0):
define void @g_param_spec_long() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_long() {
ret void
}
/* Variables and functions */
void native_screen_grab_desktop(bool video) {}


x86 assembly (clang, -O0):
<native_screen_grab_desktop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_screen_grab_desktop>:
ret

LLVM IR (-O0):
define void @native_screen_grab_desktop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @native_screen_grab_desktop(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mvprintw(int /*<<< orphan*/, int /*<<< orphan*/, char *);
int /*<<< orphan*/ refresh();
void yrc_uiPrintHelp(void) {
  mvprintw(
      0, 0,
      "Use shortcuts or arrow keys up and down and Enter to select a choice.");
  refresh();
}


x86 assembly (clang, -O0):
<yrc_uiPrintHelp>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
lea    0xed3(%rip),%rdx
mov    %esi,%edi
call   1040 <mvprintw@plt>
mov    $0x0,%al
call   1030 <refresh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<yrc_uiPrintHelp>:
push   %rax
lea    0xed8(%rip),%rdx
xor    %edi,%edi
xor    %esi,%esi
call   1040 <mvprintw@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <refresh@plt>

LLVM IR (-O0):
@.str = [70 x i8] c"Use shortcuts or arrow keys up and down and Enter to select a choice.\00"
define void @yrc_uiPrintHelp() {
%1 = call i32 @mvprintw(i32 0, i32 0, i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
@.str = [70 x i8] c"Use shortcuts or arrow keys up and down and Enter to select a choice.\00"
define void @yrc_uiPrintHelp() {
%1 = tail call i32 @mvprintw(i32 0, i32 0, i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @refresh()
ret void
}
unsigned char inb(unsigned short port) {
  unsigned char ret;
  asm volatile("inb %1, %0" : "=a"(ret) : "Nd"(port));
  return ret;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x54() {
  Assert_real((isgraph(84)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              425, ("isgraph should be 1 for T"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x54>:
push   %rbp
mov    %rsp,%rbp
mov    $0x54,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1a9,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x54>:
push   %rax
mov    $0x54,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x1a9,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for T\00"
define void @t_isgraph_0x54() {
%1 = call i32 @isgraph(i32 84)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 425, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for T\00"
define void @t_isgraph_0x54() {
%1 = tail call i32 @isgraph(i32 84)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 425, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Sfalse();
int /*<<< orphan*/ nest();
void Ffalse(void) {
  nest();
  Sfalse();
}


x86 assembly (clang, -O0):
<Ffalse>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <nest@plt>
mov    $0x0,%al
call   1030 <Sfalse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ffalse>:
push   %rax
xor    %eax,%eax
call   1040 <nest@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <Sfalse@plt>

LLVM IR (-O0):
define void @Ffalse() {
%1 = call i32 (...) @nest()
%2 = call i32 (...) @Sfalse()
ret void
}

LLVM IR (-O2):
define void @Ffalse() {
%1 = tail call i32 (...) @nest()
%2 = tail call i32 (...) @Sfalse()
ret void
}
int Factorial(int n) {
  int fact = 1;
  int m = 1;
  while (m <= n) {
    fact *= m;
    m++;
  }
  return m;
}


x86 assembly (clang, -O0):
<Factorial>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1139 <Factorial+0x39>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <Factorial+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Factorial>:
xor    %eax,%eax
test   %edi,%edi
cmovg  %edi,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @Factorial(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 1, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = mul nsw i32 %11, %10
store i32 %12, i32* %3
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @Factorial(i32 %0) {
%2 = call i32 @llvm.smax.i32(i32 %0, i32 0)
%3 = add nuw nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int write_value_to_fcd(int, unsigned char, int /*<<< orphan*/ *);
int fcdppSetLNA(unsigned char state) {
  return write_value_to_fcd(110, state, NULL);
}


x86 assembly (clang, -O0):
<fcdppSetLNA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x6e,%edi
xor    %eax,%eax
mov    %eax,%edx
movzbl -0x1(%rbp),%esi
call   1030 <write_value_to_fcd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcdppSetLNA>:
mov    %edi,%esi
mov    $0x6e,%edi
xor    %edx,%edx
jmp    1030 <write_value_to_fcd@plt>

LLVM IR (-O0):
define i32 @fcdppSetLNA(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @write_value_to_fcd(i32 110, i8 zeroext %3, i32* null)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fcdppSetLNA(i8 zeroext %0) {
%2 = tail call i32 @write_value_to_fcd(i32 110, i8 zeroext %0, i32* null)
ret i32 %2
}
/* Type definitions */
struct stat {
  int st_mode;
};

/* Variables and functions */
int S_IFREG;
int is_file(struct stat *info) { return (info->st_mode & S_IFREG); }


x86 assembly (clang, -O0):
<is_file>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    0x2ed3(%rip),%rcx
and    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_file>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
and    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@S_IFREG = global i32 0
define i32 @is_file(%struct.stat* %0) {
%2 = alloca %struct.stat*
store %struct.stat* %0, %struct.stat** %2
%3 = load %struct.stat*, %struct.stat** %2
%4 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = load i32, i32* @S_IFREG
%7 = and i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@S_IFREG = global i32 0
define i32 @is_file(%struct.stat* nocapture %0) {
%2 = getelementptr inbounds %struct.stat, %struct.stat* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = load i32, i32* @S_IFREG
%5 = and i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
void exitFromChild(int retcode) { _exit(retcode); }


x86 assembly (clang, -O0):
<exitFromChild>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<exitFromChild>:
push   %rax
call   1030 <_exit@plt>

LLVM IR (-O0):
define void @exitFromChild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @exitFromChild(i32 %0) {
%2 = tail call i32 @_exit(i32 %0)
unreachable
}
/* Type definitions */
struct shared_segment {
  int dummy;
};
struct segalloc_node {
  int dummy;
};

/* Variables and functions */
struct segalloc_node *seg_free_list_from_free_list_addr(int /*<<< orphan*/);
int /*<<< orphan*/ stm_free_list_addr(struct shared_segment *);
struct segalloc_node *stm_free_list(struct shared_segment *seg) {
  return seg_free_list_from_free_list_addr(stm_free_list_addr(seg));
}


x86 assembly (clang, -O0):
<stm_free_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <stm_free_list_addr@plt>
mov    %eax,%edi
call   1040 <seg_free_list_from_free_list_addr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stm_free_list>:
push   %rax
call   1030 <stm_free_list_addr@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <seg_free_list_from_free_list_addr@plt>

LLVM IR (-O0):
%struct.segalloc_node = type { i32 }
%struct.shared_segment = type { i32 }
define %struct.segalloc_node* @stm_free_list(%struct.shared_segment* %0) {
%2 = alloca %struct.shared_segment*
store %struct.shared_segment* %0, %struct.shared_segment** %2
%3 = load %struct.shared_segment*, %struct.shared_segment** %2
%4 = call i32 @stm_free_list_addr(%struct.shared_segment* %3)
%5 = call %struct.segalloc_node* @seg_free_list_from_free_list_addr(i32 %4)
ret %struct.segalloc_node* %5
}

LLVM IR (-O2):
%struct.segalloc_node = type { i32 }
%struct.shared_segment = type { i32 }
define %struct.segalloc_node* @stm_free_list(%struct.shared_segment* %0) {
%2 = tail call i32 @stm_free_list_addr(%struct.shared_segment* %0)
%3 = tail call %struct.segalloc_node* @seg_free_list_from_free_list_addr(i32 %2)
ret %struct.segalloc_node* %3
}
__attribute__((externally_visible)) void externally_visible_function() {}


x86 assembly (clang, -O0):
<externally_visible_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<externally_visible_function>:
ret

LLVM IR (-O0):
define void @externally_visible_function() {
ret void
}

LLVM IR (-O2):
define void @externally_visible_function() {
ret void
}
int fun832() { return 832; }


x86 assembly (clang, -O0):
<fun832>:
push   %rbp
mov    %rsp,%rbp
mov    $0x340,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun832>:
mov    $0x340,%eax
ret

LLVM IR (-O0):
define i32 @fun832() {
ret i32 832
}

LLVM IR (-O2):
define i32 @fun832() {
ret i32 832
}
void ieee80211_proc_init_virtual(struct net_device *dev) {}


x86 assembly (clang, -O0):
<ieee80211_proc_init_virtual>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_proc_init_virtual>:
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define void @ieee80211_proc_init_virtual(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret void
}

LLVM IR (-O2):
%struct.net_device = type opaque
define void @ieee80211_proc_init_virtual(%struct.net_device* nocapture %0) {
ret void
}
/* Variables and functions */
int Register(void *);
int cnfRegp(void *cpointer) {
  int result;
  result = Register(cpointer);
  if (result > 0)
    result = 1;
  return result;
}


x86 assembly (clang, -O0):
<cnfRegp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Register@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1139 <cnfRegp+0x29>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnfRegp>:
push   %rax
call   1030 <Register@plt>
test   %eax,%eax
mov    $0x1,%ecx
cmovg  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cnfRegp(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @Register(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %3
br label %9
9: ; preds = %8, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @cnfRegp(i8* %0) {
%2 = tail call i32 @Register(i8* %0)
%3 = icmp slt i32 %2, 1
%4 = select i1 %3, i32 %2, i32 1
ret i32 %4
}
char *langRomTypeKonamiSynth() { return "Konami Synthesizer"; }


x86 assembly (clang, -O0):
<langRomTypeKonamiSynth>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeKonamiSynth>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Konami Synthesizer\00"
define i8* @langRomTypeKonamiSynth() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [19 x i8] c"Konami Synthesizer\00"
define i8* @langRomTypeKonamiSynth() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void foo() { printf("foo"); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"foo\00"
define void @foo() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"foo\00"
define void @foo() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
short int GetDriveParam_bx(char drive) {
  if (drive == 0)
    return 4;
  else
    return 0xFFFF;
}


x86 assembly (clang, -O0):
<GetDriveParam_bx>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x3(%rbp)
movsbl -0x3(%rbp),%eax
cmp    $0x0,%eax
jne    1122 <GetDriveParam_bx+0x22>
movw   $0x4,-0x2(%rbp)
jmp    1128 <GetDriveParam_bx+0x28>
movw   $0xffff,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetDriveParam_bx>:
neg    %dil
sbb    %eax,%eax
or     $0x4,%eax
ret

LLVM IR (-O0):
define signext i16 @GetDriveParam_bx(i8 signext %0) {
%2 = alloca i16
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i16 4, i16* %2
br label %9
8: ; preds = %1
store i16 -1, i16* %2
br label %9
9: ; preds = %8, %7
%10 = load i16, i16* %2
ret i16 %10
}

LLVM IR (-O2):
define signext i16 @GetDriveParam_bx(i8 signext %0) {
%2 = icmp eq i8 %0, 0
%3 = select i1 %2, i16 4, i16 -1
ret i16 %3
}
int fc() { return 0; }


x86 assembly (clang, -O0):
<fc>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fc() {
ret i32 0
}

LLVM IR (-O2):
define i32 @fc() {
ret i32 0
}
/* Type definitions */
struct track_info {
  int dummy;
};

/* Variables and functions */
struct track_info *lib_set_track(int /*<<< orphan*/);
int /*<<< orphan*/ sorted_get_selected();
struct track_info *sorted_activate_selected(void) {
  return lib_set_track(sorted_get_selected());
}


x86 assembly (clang, -O0):
<sorted_activate_selected>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <sorted_get_selected@plt>
mov    %eax,%edi
call   1030 <lib_set_track@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sorted_activate_selected>:
push   %rax
xor    %eax,%eax
call   1040 <sorted_get_selected@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <lib_set_track@plt>

LLVM IR (-O0):
%struct.track_info = type { i32 }
define %struct.track_info* @sorted_activate_selected() {
%1 = call i32 (...) @sorted_get_selected()
%2 = call %struct.track_info* @lib_set_track(i32 %1)
ret %struct.track_info* %2
}

LLVM IR (-O2):
%struct.track_info = type { i32 }
define %struct.track_info* @sorted_activate_selected() {
%1 = tail call i32 (...) @sorted_get_selected()
%2 = tail call %struct.track_info* @lib_set_track(i32 %1)
ret %struct.track_info* %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(char const *);
size_t strcspn(char *, char const *);
char *truncate_to(char *s, const char *term) {
  assert(s);
  assert(term);
  s[strcspn(s, term)] = 0;
  return s;
}


x86 assembly (clang, -O0):
<truncate_to>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcspn@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncate_to>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    %r14,%rdi
call   1040 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcspn@plt>
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @truncate_to(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @assert(i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %3
%11 = load i8*, i8** %4
%12 = call i64 @strcspn(i8* %10, i8* %11)
%13 = getelementptr inbounds i8, i8* %9, i64 %12
store i8 0, i8* %13
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define i8* @truncate_to(i8* returned %0, i8* %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = tail call i32 @assert(i8* %1)
%5 = tail call i64 @strcspn(i8* %0, i8* %1)
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i8* %0
}
/* Variables and functions */
int STC31xx_WriteByte8(int, int);
int STC311x_Powerdown(void) {
  int res;
  STC31xx_WriteByte8(0x01, 0x01);
  res = STC31xx_WriteByte8(0x00, 0);
  if (res != 0)
    return (res);
  return (0);
}


x86 assembly (clang, -O0):
<STC311x_Powerdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <STC31xx_WriteByte8@plt>
xor    %esi,%esi
mov    %esi,%edi
call   1030 <STC31xx_WriteByte8@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1145 <STC311x_Powerdown+0x35>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114c <STC311x_Powerdown+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STC311x_Powerdown>:
push   %rax
mov    $0x1,%edi
mov    $0x1,%esi
call   1030 <STC31xx_WriteByte8@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <STC31xx_WriteByte8@plt>

LLVM IR (-O0):
define i32 @STC311x_Powerdown() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @STC31xx_WriteByte8(i32 1, i32 1)
%4 = call i32 @STC31xx_WriteByte8(i32 0, i32 0)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i32, i32* %2
store i32 %8, i32* %1
br label %10
9: ; preds = %0
store i32 0, i32* %1
br label %10
10: ; preds = %9, %7
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @STC311x_Powerdown() {
%1 = tail call i32 @STC31xx_WriteByte8(i32 1, i32 1)
%2 = tail call i32 @STC31xx_WriteByte8(i32 0, i32 0)
ret i32 %2
}
int test_imm_EFint64_midword_reg(long long val) {
  return ((val >> 16) & (0xEF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EFint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xef,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EFint64_midword_reg>:
test   $0xef0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EFint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 239
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EFint64_midword_reg(i64 %0) {
%2 = and i64 %0, 15663104
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int NOROM_CPUcpsie();
bool IntMasterEnable(void) { return (NOROM_CPUcpsie()); }


x86 assembly (clang, -O0):
<IntMasterEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NOROM_CPUcpsie@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntMasterEnable>:
xor    %eax,%eax
jmp    1030 <NOROM_CPUcpsie@plt>

LLVM IR (-O0):
define i32 @IntMasterEnable() {
%1 = call i32 (...) @NOROM_CPUcpsie()
ret i32 %1
}

LLVM IR (-O2):
define i32 @IntMasterEnable() {
%1 = tail call i32 (...) @NOROM_CPUcpsie()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int a = 100;
  int b = 25;
  if (a > b)
    printf("The higher value is %d\n", a);
  else
    printf("The higher value is %d\n", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x64,-0x14(%rbp)
movl   $0x19,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jle    1154 <main+0x44>
mov    -0x14(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
jmp    1163 <main+0x53>
mov    -0x18(%rbp),%esi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"The higher value is %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 100, i32* %6
store i32 25, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %6
%13 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %17
14: ; preds = %2
%15 = load i32, i32* %7
%16 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %14, %11
ret i32 0
}

LLVM IR (-O2):
@.str = [24 x i8] c"The higher value is %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 100)
ret i32 0
}
/* Variables and functions */
int strcmp(char *, char *);
void strcmp_diff_length_1() {
  char *x = "123";
  char *y = "23456";
  if (strcmp(x, y) != -1)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strcmp_diff_length_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0xffffffff,%eax
je     1144 <strcmp_diff_length_1+0x34>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_diff_length_1>:
ret

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"23456\00"
define void @strcmp_diff_length_1() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strcmp(i8* %3, i8* %4)
%6 = icmp ne i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i8, i8* null
br label %9
9: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
define void @strcmp_diff_length_1() {
ret void
}
extern void set_image_content_dnumcolumns_dnumversion(int *numcolumns,
                                                      int *numversion) {
  *numcolumns = 1;
  *numversion = 0;
}


x86 assembly (clang, -O0):
<set_image_content_dnumcolumns_dnumversion>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_image_content_dnumcolumns_dnumversion>:
movl   $0x1,(%rdi)
movl   $0x0,(%rsi)
ret

LLVM IR (-O0):
define void @set_image_content_dnumcolumns_dnumversion(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 1, i32* %5
%6 = load i32*, i32** %4
store i32 0, i32* %6
ret void
}

LLVM IR (-O2):
define void @set_image_content_dnumcolumns_dnumversion(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
store i32 1, i32* %0
store i32 0, i32* %1
ret void
}