xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ system(char *);
void fbimg() {
  printf("Flashing '/sdcard/boot.img' to "
         "'/dev/block/platform/msm_sdcc.1/by-name/boot'");
  char buf[256];
  sprintf(buf, "/system/bin/sh -c %s",
          "'dd if=/sdcard/boot.img "
          "of=/dev/block/platform/msm_sdcc.1/by-name/boot'");
  system(buf);
}


x86 assembly (clang, -O0):
<fbimg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
lea    -0x100(%rbp),%rdi
lea    0xef8(%rip),%rsi
lea    0xf06(%rip),%rdx
call   1050 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fbimg>:
push   %rbx
sub    $0x100,%rsp
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
lea    0xf02(%rip),%rsi
lea    0xf10(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [77 x i8] c"Flashing '/sdcard/boot.img' to '/dev/block/platform/msm_sdcc.1/by-name/boot'\00"
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [72 x i8] c"'dd if=/sdcard/boot.img of=/dev/block/platform/msm_sdcc.1/by-name/boot'\00"
define void @fbimg() {
%1 = alloca [256 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str.2, i64 0, i64 0))
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [77 x i8] c"Flashing '/sdcard/boot.img' to '/dev/block/platform/msm_sdcc.1/by-name/boot'\00"
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [72 x i8] c"'dd if=/sdcard/boot.img of=/dev/block/platform/msm_sdcc.1/by-name/boot'\00"
define void @fbimg() {
%1 = alloca [256 x i8]
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @system(i8* %3)
ret void
}
/* Variables and functions */
int rb_scan_args_hash_idx(char const *);
int rb_scan_args_block_idx(const char *fmt) {
  const int idx = rb_scan_args_hash_idx(fmt);
  return idx + (fmt[idx] == ':');
}


x86 assembly (clang, -O0):
<rb_scan_args_block_idx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rb_scan_args_hash_idx@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    $0x3a,%ecx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_scan_args_block_idx>:
push   %rbx
mov    %rdi,%rbx
call   1030 <rb_scan_args_hash_idx@plt>
cltq
xor    %ecx,%ecx
cmpb   $0x3a,(%rbx,%rax,1)
sete   %cl
add    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rb_scan_args_block_idx(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @rb_scan_args_hash_idx(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i8*, i8** %2
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 58
%14 = zext i1 %13 to i32
%15 = add nsw i32 %6, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @rb_scan_args_block_idx(i8* %0) {
%2 = tail call i32 @rb_scan_args_hash_idx(i8* %0)
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 58
%7 = zext i1 %6 to i32
%8 = add nsw i32 %2, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ FUTEX_WAKE;
int /*<<< orphan*/ FUTEX_WAKE_PRIVATE;
int __futex(void volatile *, int /*<<< orphan*/, int, int /*<<< orphan*/ *,
            int /*<<< orphan*/);
int __futex_wake_ex(volatile void *ftx, bool shared, int count) {
  return __futex(ftx, shared ? FUTEX_WAKE : FUTEX_WAKE_PRIVATE, count, NULL, 0);
}


x86 assembly (clang, -O0):
<__futex_wake_ex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1145 <__futex_wake_ex+0x35>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
jmp    1151 <__futex_wake_ex+0x41>
mov    0x2e9c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
call   1030 <__futex@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__futex_wake_ex>:
test   %esi,%esi
jne    111d <__futex_wake_ex+0xd>
mov    0x2ecd(%rip),%rax
jmp    1124 <__futex_wake_ex+0x14>
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <__futex@plt>

LLVM IR (-O0):
@FUTEX_WAKE = global i32 0
@FUTEX_WAKE_PRIVATE = global i32 0
define i32 @__futex_wake_ex(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* @FUTEX_WAKE
br label %14
12: ; preds = %3
%13 = load i32, i32* @FUTEX_WAKE_PRIVATE
br label %14
14: ; preds = %12, %10
%15 = phi i32 [ %11, %10 ], [ %13, %12 ]
%16 = load i32, i32* %6
%17 = call i32 @__futex(i8* %7, i32 %15, i32 %16, i32* null, i32 0)
ret i32 %17
}

LLVM IR (-O2):
@FUTEX_WAKE = global i32 0
@FUTEX_WAKE_PRIVATE = global i32 0
define i32 @__futex_wake_ex(i8* %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = load i32, i32* @FUTEX_WAKE
%6 = load i32, i32* @FUTEX_WAKE_PRIVATE
%7 = select i1 %4, i32 %6, i32 %5
%8 = tail call i32 @__futex(i8* %0, i32 %7, i32 %2, i32* null, i32 0)
ret i32 %8
}
void store4(unsigned char *buf, int value) {
  buf[0] = value;
  buf[1] = value >> 8;
  buf[2] = value >> 16;
  buf[3] = value >> 24;
}


x86 assembly (clang, -O0):
<store4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<store4>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @store4(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = trunc i32 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 %6, i8* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8 %11, i8* %13
%14 = load i32, i32* %4
%15 = ashr i32 %14, 16
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i64 2
store i8 %16, i8* %18
%19 = load i32, i32* %4
%20 = ashr i32 %19, 24
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 3
store i8 %21, i8* %23
ret void
}

LLVM IR (-O2):
define void @store4(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
%4 = lshr i32 %1, 8
%5 = trunc i32 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i32 %1, 16
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i32 %1, 24
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void wprint(char *pch) { printf("%s ", pch); }


x86 assembly (clang, -O0):
<wprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wprint>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s \00"
define void @wprint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s \00"
define void @wprint(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
char *strrchr(char *, int);
char *g_dirname(char *input) {
  char *b_ptr = strrchr(input, 0x2F);
  if (!b_ptr) {
    input[0] = 0x0;
  } else {
    b_ptr[0] = 0x0;
  }
  return input;
}


x86 assembly (clang, -O0):
<g_dirname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1145 <g_dirname+0x35>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
jmp    114c <g_dirname+0x3c>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_dirname>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
cmove  %rbx,%rax
movb   $0x0,(%rax)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @g_dirname(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strrchr(i8* %4, i32 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 0, i8* %10
br label %14
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 0, i8* %13
br label %14
14: ; preds = %11, %8
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @g_dirname(i8* returned %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i32 47)
%3 = icmp eq i8* %2, null
%4 = select i1 %3, i8* %0, i8* %2
store i8 0, i8* %4
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ emit_adc(int, int);
int /*<<< orphan*/ emit_addimm(int, int, int);
int /*<<< orphan*/ emit_shrimm(int, int, int);
void emit_dt(int t, int sr) {
  emit_addimm(t, -2, t);
  emit_shrimm(sr, 1, sr);
  emit_addimm(t, 1, t);
  emit_adc(sr, sr);
}


x86 assembly (clang, -O0):
<emit_dt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%edx
mov    $0xfffffffe,%esi
call   1030 <emit_addimm@plt>
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x1,%esi
call   1040 <emit_shrimm@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%edx
mov    $0x1,%esi
call   1030 <emit_addimm@plt>
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1050 <emit_adc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_dt>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0xfffffffe,%esi
mov    %edi,%edx
call   1030 <emit_addimm@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    %ebx,%edx
call   1040 <emit_shrimm@plt>
mov    %ebp,%edi
mov    $0x1,%esi
mov    %ebp,%edx
call   1030 <emit_addimm@plt>
mov    %ebx,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <emit_adc@plt>

LLVM IR (-O0):
define void @emit_dt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @emit_addimm(i32 %5, i32 -2, i32 %6)
%8 = load i32, i32* %4
%9 = load i32, i32* %4
%10 = call i32 @emit_shrimm(i32 %8, i32 1, i32 %9)
%11 = load i32, i32* %3
%12 = load i32, i32* %3
%13 = call i32 @emit_addimm(i32 %11, i32 1, i32 %12)
%14 = load i32, i32* %4
%15 = load i32, i32* %4
%16 = call i32 @emit_adc(i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @emit_dt(i32 %0, i32 %1) {
%3 = tail call i32 @emit_addimm(i32 %0, i32 -2, i32 %0)
%4 = tail call i32 @emit_shrimm(i32 %1, i32 1, i32 %1)
%5 = tail call i32 @emit_addimm(i32 %0, i32 1, i32 %0)
%6 = tail call i32 @emit_adc(i32 %1, i32 %1)
ret void
}
/* Variables and functions */
char *dirfile(int /*<<< orphan*/, char *);
int /*<<< orphan*/ lgetenv(char *);
char *homefile(char *filename) { return (dirfile(lgetenv("HOME"), filename)); }


x86 assembly (clang, -O0):
<homefile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <lgetenv@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1030 <dirfile@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<homefile>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <lgetenv@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <dirfile@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"HOME\00"
define i8* @homefile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @lgetenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i8* @dirfile(i32 %3, i8* %4)
ret i8* %5
}

LLVM IR (-O2):
@.str = [5 x i8] c"HOME\00"
define i8* @homefile(i8* %0) {
%2 = tail call i32 @lgetenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i8* @dirfile(i32 %2, i8* %0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, float, float, float, float);
void print_line(int period, float price, float cash, float shares,
                float value) {
  printf("%4d %9.3f %10.2f %10.2f %10.2f\n", period, price, cash, shares,
         value);
}


x86 assembly (clang, -O0):
<print_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  %xmm3,-0x14(%rbp)
mov    -0x4(%rbp),%esi
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
movss  -0x14(%rbp),%xmm3
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_line>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"%4d %9.3f %10.2f %10.2f %10.2f\0A\00"
define void @print_line(i32 %0, float %1, float %2, float %3, float %4) {
%6 = alloca i32
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store i32 %0, i32* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float %4, float* %10
%11 = load i32, i32* %6
%12 = load float, float* %7
%13 = load float, float* %8
%14 = load float, float* %9
%15 = load float, float* %10
%16 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %11, float %12, float %13, float %14, float %15)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"%4d %9.3f %10.2f %10.2f %10.2f\0A\00"
define void @print_line(i32 %0, float %1, float %2, float %3, float %4) {
%6 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %0, float %1, float %2, float %3, float %4)
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ p_memsz;
  int /*<<< orphan*/ p_vaddr;
};
typedef TYPE_1__ Elf64_Phdr;

/* Variables and functions */
int /*<<< orphan*/ munmap_guest(int /*<<< orphan*/, int /*<<< orphan*/);
void unmapSegment(int fd, Elf64_Phdr *segment) {
  munmap_guest(segment->p_vaddr, segment->p_memsz);
}


x86 assembly (clang, -O0):
<unmapSegment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1030 <munmap_guest@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmapSegment>:
mov    (%rsi),%eax
mov    0x4(%rsi),%edi
mov    %eax,%esi
jmp    1030 <munmap_guest@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i32 }
define void @unmapSegment(i32 %0, %struct.TYPE_3__* %1) {
%3 = alloca i32
%4 = alloca %struct.TYPE_3__*
store i32 %0, i32* %3
store %struct.TYPE_3__* %1, %struct.TYPE_3__** %4
%5 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 1
%7 = load i32, i32* %6
%8 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = call i32 @munmap_guest(i32 %7, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32, i32 }
define void @unmapSegment(i32 %0, %struct.TYPE_3__* nocapture %1) {
%3 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %1, i64 0, i32 1
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @munmap_guest(i32 %4, i32 %6)
ret void
}
/* Type definitions */
struct dnaSeq {
  int dummy;
};

/* Variables and functions */
struct dnaSeq *nibLoadPartMasked(int /*<<< orphan*/, char *, int, int);
struct dnaSeq *nibLoadPart(char *fileName, int start, int size) {
  return nibLoadPartMasked(0, fileName, start, size);
}


x86 assembly (clang, -O0):
<nibLoadPart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
xor    %edi,%edi
call   1030 <nibLoadPartMasked@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nibLoadPart>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <nibLoadPartMasked@plt>

LLVM IR (-O0):
%struct.dnaSeq = type { i32 }
define %struct.dnaSeq* @nibLoadPart(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call %struct.dnaSeq* @nibLoadPartMasked(i32 0, i8* %7, i32 %8, i32 %9)
ret %struct.dnaSeq* %10
}

LLVM IR (-O2):
%struct.dnaSeq = type { i32 }
define %struct.dnaSeq* @nibLoadPart(i8* %0, i32 %1, i32 %2) {
%4 = tail call %struct.dnaSeq* @nibLoadPartMasked(i32 0, i8* %0, i32 %1, i32 %2)
ret %struct.dnaSeq* %4
}
int DecideSmallBit(char *number, int length) {
  int i;
  for (i = length - 1; i >= 0; --i) {
    if (number[i] == '.') {
      break;
    }
  }
  return length - i - 1;
}


x86 assembly (clang, -O0):
<DecideSmallBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     114b <DecideSmallBit+0x4b>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2e,%eax
jne    1138 <DecideSmallBit+0x38>
jmp    114b <DecideSmallBit+0x4b>
jmp    113d <DecideSmallBit+0x3d>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <DecideSmallBit+0x14>
mov    -0xc(%rbp),%eax
sub    -0x10(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DecideSmallBit>:
mov    %esi,%eax
mov    %esi,%edx
xor    %ecx,%ecx
test   %esi,%esi
cmovs  %esi,%ecx
nopl   0x0(%rax,%rax,1)
test   %edx,%edx
jle    1127 <DecideSmallBit+0x27>
lea    -0x1(%rdx),%rsi
cmpb   $0x2e,-0x1(%rdi,%rdx,1)
mov    %rsi,%rdx
jne    1110 <DecideSmallBit+0x10>
add    $0x1,%esi
mov    %esi,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @DecideSmallBit(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
br label %8
8: ; preds = %21, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %8
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 46
br i1 %18, label %19, label %20
19: ; preds = %11
br label %24
20: ; preds = %11
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, -1
store i32 %23, i32* %5
br label %8
24: ; preds = %19, %8
%25 = load i32, i32* %4
%26 = load i32, i32* %5
%27 = sub nsw i32 %25, %26
%28 = sub nsw i32 %27, 1
ret i32 %28
}

LLVM IR (-O2):
define i32 @DecideSmallBit(i8* nocapture %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = call i32 @llvm.smin.i32(i32 %1, i32 0)
br label %5
5: ; preds = %10, %2
%6 = phi i64 [ %7, %10 ], [ %3, %2 ]
%7 = add nsw i64 %6, -1
%8 = trunc i64 %6 to i32
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %0, i64 %7
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 46
br i1 %13, label %14, label %5
14: ; preds = %10
%15 = trunc i64 %6 to i32
br label %16
16: ; preds = %5, %14
%17 = phi i32 [ %15, %14 ], [ %4, %5 ]
%18 = sub i32 %1, %17
ret i32 %18
}
/* Variables and functions */
int open_dev_cpu_msr(int dummy1) { return 0; }


x86 assembly (clang, -O0):
<open_dev_cpu_msr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_dev_cpu_msr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @open_dev_cpu_msr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @open_dev_cpu_msr(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int send(int, char *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int send_data(int sockfd, char *buf) {
  if (send(sockfd, buf, strlen(buf), 0) == -1) {
    perror("send");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<send_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0xffffffff,%eax
jne    1187 <send_data+0x57>
lea    0xe8a(%rip),%rdi
call   1050 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    118e <send_data+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_data>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
xor    %r14d,%r14d
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0xffffffff,%eax
je     115f <send_data+0x2f>
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret
lea    0xe9a(%rip),%rdi
call   1050 <perror@plt>
mov    $0xffffffff,%r14d
jmp    1157 <send_data+0x27>

LLVM IR (-O0):
@.str = [5 x i8] c"send\00"
define i32 @send_data(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = load i8*, i8** %5
%8 = load i8*, i8** %5
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @send(i32 %6, i8* %7, i32 %9, i32 0)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [5 x i8] c"send\00"
define i32 @send_data(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @send(i32 %0, i8* %1, i32 %3, i32 0)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %9
}
int test_imm_D3int32_mem(int *val) {
  return ((*val) & (0xD3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D3int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xd3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D3int32_mem>:
testb  $0xd3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D3int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 211
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D3int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 211
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int write_multprec_target_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(497, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<write_multprec_target_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1f1,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_multprec_target_solutions>:
mov    $0x1f1,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @write_multprec_target_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 497, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @write_multprec_target_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 497, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void input_end() {}


x86 assembly (clang, -O0):
<input_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_end>:
ret

LLVM IR (-O0):
define void @input_end() {
ret void
}

LLVM IR (-O2):
define void @input_end() {
ret void
}
/* Type definitions */
typedef enum animals { ____Placeholder_animals } animals;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  enum animals { xiong, eyu, xiyi, mao };
  enum animals one;
  one = xiyi;
  one = 5;
  printf("%d\n", one);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x2,-0x14(%rbp)
movl   $0x5,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 2, i32* %6
store i32 5, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 5)
ret i32 0
}
/* Type definitions */
typedef char *uint16_t;

/* Variables and functions */
uint16_t _get_ldt(void) {
  uint16_t ret;
  __asm__ __volatile__("sldt %0" : "=m"(ret));
  return ret;
}


x86 assembly (clang, -O0):
<_get_ldt>:
push   %rbp
mov    %rsp,%rbp
sldt   -0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_ldt>:
sldt   -0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i8* @_get_ldt() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define i8* @_get_ldt() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
%3 = load i8*, i8** %1
ret i8* %3
}
signed short int signedshortint_ignoring_signedlongint(signed short int x,
                                                       signed long int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedshortint_ignoring_signedlongint>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedshortint_ignoring_signedlongint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @signedshortint_ignoring_signedlongint(i16 signext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @signedshortint_ignoring_signedlongint(i16 returned signext %0, i64 %1) {
ret i16 %0
}
void fa112(void) {
a:
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        p024A:
          goto p024A;
          goto a;
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa112>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <fa112+0x9>
jmp    1109 <fa112+0x9>

x86 assembly (clang, -O2):
<fa112>:
jmp    1100 <fa112>

LLVM IR (-O0):
define void @fa112() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %0
br label %8
8: ; preds = %8, %7
br label %8
9: ; No predecessors!
br label %10
10: ; preds = %10, %9
br label %10
11: ; preds = %11
br label %11
12: ; No predecessors!
br label %13
13: ; preds = %13, %12
br label %13
14: ; preds = %14
br label %14
15: ; preds = %15
br label %15
16: ; No predecessors!
br label %17
17: ; preds = %17, %16
br label %17
18: ; No predecessors!
br label %19
19: ; preds = %19, %18
br label %19
20: ; preds = %20
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa112() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ wifi_promiscuous_enable(int);
void smart_enable(void) { wifi_promiscuous_enable(1); }


x86 assembly (clang, -O0):
<smart_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <wifi_promiscuous_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smart_enable>:
mov    $0x1,%edi
jmp    1030 <wifi_promiscuous_enable@plt>

LLVM IR (-O0):
define void @smart_enable() {
%1 = call i32 @wifi_promiscuous_enable(i32 1)
ret void
}

LLVM IR (-O2):
define void @smart_enable() {
%1 = tail call i32 @wifi_promiscuous_enable(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndirectIndexedE0X0(int);
int /*<<< orphan*/ STA16(int /*<<< orphan*/, int);
void Op91E0M0X0(void) { STA16(DirectIndirectIndexedE0X0(2), 0xFFFFFF); }


x86 assembly (clang, -O0):
<Op91E0M0X0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <DirectIndirectIndexedE0X0@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
call   1040 <STA16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op91E0M0X0>:
push   %rax
mov    $0x2,%edi
call   1030 <DirectIndirectIndexedE0X0@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
pop    %rax
jmp    1040 <STA16@plt>

LLVM IR (-O0):
define void @Op91E0M0X0() {
%1 = call i32 @DirectIndirectIndexedE0X0(i32 2)
%2 = call i32 @STA16(i32 %1, i32 16777215)
ret void
}

LLVM IR (-O2):
define void @Op91E0M0X0() {
%1 = tail call i32 @DirectIndirectIndexedE0X0(i32 2)
%2 = tail call i32 @STA16(i32 %1, i32 16777215)
ret void
}
void PicoShutdown(void) {}


x86 assembly (clang, -O0):
<PicoShutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PicoShutdown>:
ret

LLVM IR (-O0):
define void @PicoShutdown() {
ret void
}

LLVM IR (-O2):
define void @PicoShutdown() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void uint2string(char *msg, uint32_t number1) {
  uint32_t *uint32;
  uint32 = ((uint32_t *)&(msg[0]));
  *uint32 = number1;
}


x86 assembly (clang, -O0):
<uint2string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint2string>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @uint2string(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i32, i32* %4
%10 = load i32*, i32** %5
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @uint2string(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int ft_strlen(char *);
char *malloc(int);
char *ft_strdup(char *str) {
  char *copy;
  copy = malloc(sizeof(char *) * ft_strlen(str));
  copy = str;
  return (copy);
}


x86 assembly (clang, -O0):
<ft_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ft_strlen@plt>
cltq
shl    $0x3,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strdup>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ft_strlen@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ft_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @ft_strlen(i8* %4)
%6 = sext i32 %5 to i64
%7 = mul i64 8, %6
%8 = trunc i64 %7 to i32
%9 = call i8* @malloc(i32 %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %2
store i8* %10, i8** %3
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @ft_strdup(i8* returned %0) {
%2 = tail call i32 @ft_strlen(i8* %0)
ret i8* %0
}
int dosh(string, shell)
char *string;
char *shell;
{
  int number;
  return system(string);
}


x86 assembly (clang, -O0):
<dosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <system@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dosh>:
xor    %eax,%eax
jmp    1030 <system@plt>

LLVM IR (-O0):
define i32 @dosh(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @system to i32 (i8*, ...)*)(i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @dosh(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @system to i32 (i8*, ...)*)(i8* %0)
ret i32 %3
}
void foo(int *__restrict myptr1, int *myptr2) {
  myptr1[0] = 0;
  myptr2[0] = 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movl   $0x0,(%rdi)
movl   $0x0,(%rsi)
ret

LLVM IR (-O0):
define void @foo(i32* noalias %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 0, i32* %6
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 0, i32* %8
ret void
}

LLVM IR (-O2):
define void @foo(i32* noalias nocapture writeonly %0, i32* nocapture writeonly %1) {
store i32 0, i32* %0
store i32 0, i32* %1
ret void
}
int security_task_getsid(struct task_struct *p) { return 0; }


x86 assembly (clang, -O0):
<security_task_getsid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_task_getsid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define i32 @security_task_getsid(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define i32 @security_task_getsid(%struct.task_struct* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int a[], int low, int high) {
  int s;
  if (low < high) {
    s = partition(a, low, high);
    quicksort(a, low, s - 1);
    quicksort(a, s + 1, high);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
double escalon(float t) {
  float resultado;
  if (t < 0) {
    resultado = 0;
  } else {
    resultado = 1;
  }
  return resultado;
}


x86 assembly (clang, -O0):
<escalon>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1123 <escalon+0x23>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1130 <escalon+0x30>
movss  0xed5(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<escalon>:
xorps  %xmm1,%xmm1
ucomiss %xmm0,%xmm1
xorps  %xmm0,%xmm0
ja     1113 <escalon+0x13>
movsd  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
define double @escalon(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fcmp olt float %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store float 0.000000e+00, float* %3
br label %8
7: ; preds = %1
store float 1.000000e+00, float* %3
br label %8
8: ; preds = %7, %6
%9 = load float, float* %3
%10 = fpext float %9 to double
ret double %10
}

LLVM IR (-O2):
define double @escalon(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = select i1 %2, double 0.000000e+00, double 1.000000e+00
ret double %3
}
/* Variables and functions */
float atan2f(float, float);
float HMM_ATan2F(float Left, float Right) {
  ;
  float Result = atan2f(Left, Right);
  return (Result);
}


x86 assembly (clang, -O0):
<HMM_ATan2F>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <atan2f@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMM_ATan2F>:
jmp    1030 <atan2f@plt>

LLVM IR (-O0):
define float @HMM_ATan2F(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = call float @atan2f(float %6, float %7)
store float %8, float* %5
%9 = load float, float* %5
ret float %9
}

LLVM IR (-O2):
define float @HMM_ATan2F(float %0, float %1) {
%3 = tail call float @atan2f(float %0, float %1)
ret float %3
}
/* Type definitions */
struct geometry_struct {
  int dummy;
};

/* Variables and functions */
int A_within_B(struct geometry_struct *, struct geometry_struct *, int);
int sphere_within_cone(struct geometry_struct *geometry_child,
                       struct geometry_struct *geometry_parent) {
  return A_within_B(geometry_child, geometry_parent, (int)300);
}


x86 assembly (clang, -O0):
<sphere_within_cone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x12c,%edx
call   1030 <A_within_B@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sphere_within_cone>:
mov    $0x12c,%edx
jmp    1030 <A_within_B@plt>

LLVM IR (-O0):
%struct.geometry_struct = type { i32 }
define i32 @sphere_within_cone(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = alloca %struct.geometry_struct*
%4 = alloca %struct.geometry_struct*
store %struct.geometry_struct* %0, %struct.geometry_struct** %3
store %struct.geometry_struct* %1, %struct.geometry_struct** %4
%5 = load %struct.geometry_struct*, %struct.geometry_struct** %3
%6 = load %struct.geometry_struct*, %struct.geometry_struct** %4
%7 = call i32 @A_within_B(%struct.geometry_struct* %5, %struct.geometry_struct* %6, i32 300)
ret i32 %7
}

LLVM IR (-O2):
%struct.geometry_struct = type { i32 }
define i32 @sphere_within_cone(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = tail call i32 @A_within_B(%struct.geometry_struct* %0, %struct.geometry_struct* %1, i32 300)
ret i32 %3
}
int to16bit(c1, c2)
int c1, c2;
{ return ((c1 & 0xff) << 8) + (c2 & 0xff); }


x86 assembly (clang, -O0):
<to16bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%ecx
and    $0xff,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to16bit>:
shl    $0x8,%edi
movzwl %di,%ecx
movzbl %sil,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @to16bit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = shl i32 %6, 8
%8 = load i32, i32* %4
%9 = and i32 %8, 255
%10 = add nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @to16bit(i32 %0, i32 %1) {
%3 = shl i32 %0, 8
%4 = and i32 %3, 65280
%5 = and i32 %1, 255
%6 = or i32 %4, %5
ret i32 %6
}
int emac1_aframesreceivedok_set(unsigned int dev_id,
                                union emac1_aframesreceivedok_u *value) {
  return 1;
}


x86 assembly (clang, -O0):
<emac1_aframesreceivedok_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<emac1_aframesreceivedok_set>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.emac1_aframesreceivedok_u = type opaque
define i32 @emac1_aframesreceivedok_set(i32 %0, %union.emac1_aframesreceivedok_u* %1) {
%3 = alloca i32
%4 = alloca %union.emac1_aframesreceivedok_u*
store i32 %0, i32* %3
store %union.emac1_aframesreceivedok_u* %1, %union.emac1_aframesreceivedok_u** %4
ret i32 1
}

LLVM IR (-O2):
%union.emac1_aframesreceivedok_u = type opaque
define i32 @emac1_aframesreceivedok_set(i32 %0, %union.emac1_aframesreceivedok_u* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int partition(int *, int, int);
void quickSort(int values[], int value, int length) {
  int p;
  if (value < length) {
    p = partition(values, value, length);
    quickSort(values, value, p - 1);
    quickSort(values, p + 1, length);
  }
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quickSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quickSort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quickSort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quickSort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quickSort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}