xunge/DecIR huggingface dataset:
/* Variables and functions */
double cfrac_tan(double, int);
double calculate_height(double height, double beta, double distance) {
  return height + cfrac_tan(beta, 10) * distance;
}


x86 assembly (clang, -O0):
<calculate_height>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    $0xa,%edi
call   1030 <cfrac_tan@plt>
movsd  -0x20(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_height>:
sub    $0x18,%rsp
movsd  %xmm2,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
movapd %xmm1,%xmm0
mov    $0xa,%edi
call   1030 <cfrac_tan@plt>
mulsd  0x8(%rsp),%xmm0
addsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @calculate_height(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = call double @cfrac_tan(double %8, i32 10)
%10 = load double, double* %6
%11 = call double @llvm.fmuladd.f64(double %9, double %10, double %7)
ret double %11
}

LLVM IR (-O2):
define double @calculate_height(double %0, double %1, double %2) {
%4 = tail call double @cfrac_tan(double %1, i32 10)
%5 = tail call double @llvm.fmuladd.f64(double %4, double %2, double %0)
ret double %5
}
void glUniform2uiv(void) { return; }


x86 assembly (clang, -O0):
<glUniform2uiv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glUniform2uiv>:
ret

LLVM IR (-O0):
define void @glUniform2uiv() {
ret void
}

LLVM IR (-O2):
define void @glUniform2uiv() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __NR_set_tid_address;
int /*<<< orphan*/ syscall(int /*<<< orphan*/, int *);
int main() {
  int i;
  syscall(__NR_set_tid_address, (int *)-1);
  syscall(__NR_set_tid_address, &i);
  syscall(__NR_set_tid_address, NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    $0xffffffffffffffff,%rsi
call   1030 <syscall@plt>
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <syscall@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <syscall@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
mov    0x2ecc(%rip),%rbx
mov    (%rbx),%edi
mov    $0xffffffffffffffff,%rsi
call   1030 <syscall@plt>
mov    (%rbx),%edi
lea    0xc(%rsp),%rsi
call   1030 <syscall@plt>
mov    (%rbx),%edi
xor    %esi,%esi
call   1030 <syscall@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__NR_set_tid_address = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @__NR_set_tid_address
%4 = call i32 @syscall(i32 %3, i32* inttoptr (i64 -1 to i32*))
%5 = load i32, i32* @__NR_set_tid_address
%6 = call i32 @syscall(i32 %5, i32* %2)
%7 = load i32, i32* @__NR_set_tid_address
%8 = call i32 @syscall(i32 %7, i32* null)
ret i32 0
}

LLVM IR (-O2):
@__NR_set_tid_address = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = load i32, i32* @__NR_set_tid_address
%4 = tail call i32 @syscall(i32 %3, i32* inttoptr (i64 -1 to i32*))
%5 = load i32, i32* @__NR_set_tid_address
%6 = call i32 @syscall(i32 %5, i32* %1)
%7 = load i32, i32* @__NR_set_tid_address
%8 = call i32 @syscall(i32 %7, i32* null)
ret i32 0
}
int sign(double x) {
  if (x >= 0) {
    return 1;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1127 <sign+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <sign+0x2e>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setae  %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sign(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @sign(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = select i1 %2, i32 -1, i32 1
ret i32 %3
}
void util_get_real_time_size(int *rt_size) { *rt_size = (int)sizeof(double); }


x86 assembly (clang, -O0):
<util_get_real_time_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x8,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_get_real_time_size>:
movl   $0x8,(%rdi)
ret

LLVM IR (-O0):
define void @util_get_real_time_size(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 8, i32* %3
ret void
}

LLVM IR (-O2):
define void @util_get_real_time_size(i32* nocapture writeonly %0) {
store i32 8, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int i;
  if (i == 0) {
    assert(i == 0);
  } else {
    assert(i != 0);
  }
  int k;
  if (k > 0) {
    assert(k > 0);
  } else {
    assert(k <= 0);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    113f <main+0x2f>
cmpl   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
jmp    1150 <main+0x40>
cmpl   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x0,-0xc(%rbp)
jle    1170 <main+0x60>
cmpl   $0x0,-0xc(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
jmp    1181 <main+0x71>
cmpl   $0x0,-0xc(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %0
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
br label %16
11: ; preds = %0
%12 = load i32, i32* %2
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
br label %16
16: ; preds = %11, %6
%17 = load i32, i32* %3
%18 = icmp sgt i32 %17, 0
br i1 %18, label %19, label %24
19: ; preds = %16
%20 = load i32, i32* %3
%21 = icmp sgt i32 %20, 0
%22 = zext i1 %21 to i32
%23 = call i32 @assert(i32 %22)
br label %29
24: ; preds = %16
%25 = load i32, i32* %3
%26 = icmp sle i32 %25, 0
%27 = zext i1 %26 to i32
%28 = call i32 @assert(i32 %27)
br label %29
29: ; preds = %24, %19
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 0)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ myputc(char const);
void myputs(const char *str) {
  while (*str) {
    myputc(*str);
    str++;
  }
}


x86 assembly (clang, -O0):
<myputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <myputs+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <myputc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <myputs+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myputs>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <myputs+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <myputc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <myputs+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @myputs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i32 @myputc(i8 signext %9)
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @myputs(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @myputc(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int bool_t;

/* Variables and functions */
bool_t xdr_void(void) { return 1; }


x86 assembly (clang, -O0):
<xdr_void>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_void>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @xdr_void() {
ret i32 1
}

LLVM IR (-O2):
define i32 @xdr_void() {
ret i32 1
}
void strcpy_2(char *s, char *t) {
  int i = 0;
  while (*s++ = *t++) {
  };
}


x86 assembly (clang, -O0):
<strcpy_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1142 <strcpy_2+0x42>
jmp    1113 <strcpy_2+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy_2>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strcpy_2+0x10>
ret

LLVM IR (-O0):
define void @strcpy_2(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8, i8* %7
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
store i8 %9, i8* %10
%12 = icmp ne i8 %9, 0
br i1 %12, label %13, label %14
13: ; preds = %6
br label %6
14: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @strcpy_2(i8* nocapture writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ system(char *);
void ov50() {
  printf("\nIncreasing CPU VDD Voltage by 50mV\n");
  char buf[256];
  sprintf(
      buf, "/system/bin/sh -c %s",
      "'echo +50000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'");
  system(buf);
}


x86 assembly (clang, -O0):
<ov50>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
lea    -0x100(%rbp),%rdi
lea    0xed0(%rip),%rsi
lea    0xede(%rip),%rdx
call   1050 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ov50>:
push   %rbx
sub    $0x100,%rsp
lea    0xf1b(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb5(%rip),%rsi
lea    0xec3(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <system@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"\0AIncreasing CPU VDD Voltage by 50mV\0A\00"
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [69 x i8] c"'echo +50000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'\00"
define void @ov50() {
%1 = alloca [256 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str.2, i64 0, i64 0))
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [69 x i8] c"'echo +50000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'\00"
@str = [36 x i8] c"\0AIncreasing CPU VDD Voltage by 50mV\00"
define void @ov50() {
%1 = alloca [256 x i8]
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @system(i8* %3)
ret void
}
int abs(int in) {
  if (in < 0) {
    return -in;
  } else {
    return in;
  }
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <abs+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ dp_disklock();
size_t fwrite_orig(void const *, size_t, size_t, int /*<<< orphan*/ *);
size_t fwrite(const void *ptr, size_t size, size_t nmemb, FILE *stream) {
  dp_disklock();
  return (fwrite_orig(ptr, size, nmemb, stream));
}


x86 assembly (clang, -O0):
<fwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x0,%al
call   1040 <dp_disklock@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fwrite_orig@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwrite>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%r12
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <dp_disklock@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <fwrite_orig@plt>

LLVM IR (-O0):
define i64 @fwrite(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = call i32 (...) @dp_disklock()
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = load i64, i64* %7
%13 = load i32*, i32** %8
%14 = call i64 @fwrite_orig(i8* %10, i64 %11, i64 %12, i32* %13)
ret i64 %14
}

LLVM IR (-O2):
define i64 @fwrite(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = tail call i32 (...) @dp_disklock()
%6 = tail call i64 @fwrite_orig(i8* %0, i64 %1, i64 %2, i32* %3)
ret i64 %6
}
void lsInsnLogger_unlog() {}


x86 assembly (clang, -O0):
<lsInsnLogger_unlog>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsInsnLogger_unlog>:
ret

LLVM IR (-O0):
define void @lsInsnLogger_unlog() {
ret void
}

LLVM IR (-O2):
define void @lsInsnLogger_unlog() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TicTacToe();
int main(int argc, const char *argv[]) {
  TicTacToe();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <TicTacToe@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <TicTacToe@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @TicTacToe()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @TicTacToe()
ret i32 0
}
void SUPR3QueryVTCaps(void) {}


x86 assembly (clang, -O0):
<SUPR3QueryVTCaps>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SUPR3QueryVTCaps>:
ret

LLVM IR (-O0):
define void @SUPR3QueryVTCaps() {
ret void
}

LLVM IR (-O2):
define void @SUPR3QueryVTCaps() {
ret void
}
void BRK(void) {}


x86 assembly (clang, -O0):
<BRK>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BRK>:
ret

LLVM IR (-O0):
define void @BRK() {
ret void
}

LLVM IR (-O2):
define void @BRK() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *umem_alloc(size_t, int);
void *umem_zalloc(size_t size, int flags) {
  void *ptr = NULL;
  ptr = umem_alloc(size, flags);
  if (ptr)
    memset(ptr, 0, size);
  return (ptr);
}


x86 assembly (clang, -O0):
<umem_zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <umem_alloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1161 <umem_zalloc+0x41>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umem_zalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <umem_alloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1141 <umem_zalloc+0x21>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1040 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @umem_zalloc(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i8*
store i64 %0, i64* %3
store i32 %1, i32* %4
store i8* null, i8** %5
%6 = load i64, i64* %3
%7 = load i32, i32* %4
%8 = call i8* @umem_alloc(i64 %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = load i64, i64* %3
%14 = call i32 @memset(i8* %12, i32 0, i64 %13)
br label %15
15: ; preds = %11, %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @umem_zalloc(i64 %0, i32 %1) {
%3 = tail call i8* @umem_alloc(i64 %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memset(i8* %3, i32 0, i64 %0)
br label %7
7: ; preds = %5, %2
ret i8* %3
}
int nr_cifre(int x) {
  int nr_cifre = 0;
  if (x == 0) {
    return 1;
  } else {
    for (; x > 0; x /= 10)
      if (!((x % 10) % 2))
        nr_cifre++;
    return nr_cifre;
  }
}


x86 assembly (clang, -O0):
<nr_cifre>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1124 <nr_cifre+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1178 <nr_cifre+0x78>
jmp    1129 <nr_cifre+0x29>
cmpl   $0x0,-0x8(%rbp)
jle    1172 <nr_cifre+0x72>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115a <nr_cifre+0x5a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    115f <nr_cifre+0x5f>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1129 <nr_cifre+0x29>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nr_cifre>:
test   %edi,%edi
je     112b <nr_cifre+0x2b>
jle    1131 <nr_cifre+0x31>
xor    %eax,%eax
mov    $0xcccccccd,%ecx
nopl   (%rax)
mov    %edi,%edx
not    %edx
and    $0x1,%edx
add    %edx,%eax
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x23,%rdx
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <nr_cifre+0x10>
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nr_cifre(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %26
8: ; preds = %1
br label %9
9: ; preds = %21, %8
%10 = load i32, i32* %3
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %24
12: ; preds = %9
%13 = load i32, i32* %3
%14 = srem i32 %13, 10
%15 = srem i32 %14, 2
%16 = icmp ne i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %12
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %20
20: ; preds = %17, %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %3
%23 = sdiv i32 %22, 10
store i32 %23, i32* %3
br label %9
24: ; preds = %9
%25 = load i32, i32* %4
store i32 %25, i32* %2
br label %26
26: ; preds = %24, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @nr_cifre(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %11, %5 ], [ 0, %3 ]
%7 = phi i32 [ %12, %5 ], [ %0, %3 ]
%8 = urem i32 %7, 10
%9 = and i32 %8, 1
%10 = xor i32 %9, 1
%11 = add nuw nsw i32 %10, %6
%12 = udiv i32 %7, 10
%13 = icmp ult i32 %7, 10
br i1 %13, label %14, label %5
14: ; preds = %5, %3, %1
%15 = phi i32 [ 1, %1 ], [ 0, %3 ], [ %11, %5 ]
ret i32 %15
}
int hashCode(int key, int size) { return key % size; }


x86 assembly (clang, -O0):
<hashCode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashCode>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hashCode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @hashCode(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
char *volt_desc(unsigned char b) {
  char *s;
  switch (b) {
  case 0x03:
    s = "5V";
    break;
  case 0x02:
    s = "3.3V";
    break;
  case 0x01:
    s = "-12V";
    break;
  case 0x00:
  default:
    s = "12V";
    break;
  }
  return (s);
}


x86 assembly (clang, -O0):
<volt_desc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     1165 <volt_desc+0x65>
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xed9(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1170 <volt_desc+0x70>
lea    0xecc(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1170 <volt_desc+0x70>
lea    0xec1(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1170 <volt_desc+0x70>
jmp    1165 <volt_desc+0x65>
lea    0xead(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<volt_desc>:
add    $0xff,%dil
cmp    $0x2,%dil
ja     111d <volt_desc+0x1d>
movsbq %dil,%rax
lea    0xefb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
lea    0xee5(%rip),%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"5V\00"
@.str.1 = [5 x i8] c"3.3V\00"
@.str.2 = [5 x i8] c"-12V\00"
@.str.3 = [4 x i8] c"12V\00"
define i8* @volt_desc(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8*
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
switch i32 %5, label %10 [
i32 3, label %6
i32 2, label %7
i32 1, label %8
i32 0, label %9
]
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %3
br label %11
7: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %3
br label %11
8: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8** %3
br label %11
9: ; preds = %1
br label %10
10: ; preds = %1, %9
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8** %3
br label %11
11: ; preds = %10, %8, %7, %6
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [3 x i8] c"5V\00"
@.str.1 = [5 x i8] c"3.3V\00"
@.str.2 = [5 x i8] c"-12V\00"
@.str.3 = [4 x i8] c"12V\00"
@reltable.volt_desc = [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.2 to i64), i64 ptrtoint ([3 x i32]* @reltable.volt_desc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.1 to i64), i64 ptrtoint ([3 x i32]* @reltable.volt_desc to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str to i64), i64 ptrtoint ([3 x i32]* @reltable.volt_desc to i64)) to i32)]
define i8* @volt_desc(i8 zeroext %0) {
%2 = add i8 %0, -1
%3 = icmp ult i8 %2, 3
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i8 %2 to i64
%6 = shl i64 %5, 2
%7 = call i8* @llvm.load.relative.i64(i8* bitcast ([3 x i32]* @reltable.volt_desc to i8*), i64 %6)
br label %8
8: ; preds = %1, %4
%9 = phi i8* [ %7, %4 ], [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), %1 ]
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ BBM_TS_STOP(void *);
void mtv_ts_stop(void *hDevice) { BBM_TS_STOP(hDevice); }


x86 assembly (clang, -O0):
<mtv_ts_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <BBM_TS_STOP@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtv_ts_stop>:
jmp    1030 <BBM_TS_STOP@plt>

LLVM IR (-O0):
define void @mtv_ts_stop(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @BBM_TS_STOP(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mtv_ts_stop(i8* %0) {
%2 = tail call i32 @BBM_TS_STOP(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void presenta() {
  printf("\n");
  printf(
      "Chronopic-serial-conf. (c) Juan Gonzalez. Febrero 2005. Licencia GPL\n");
  printf("Configuracion del puerto serie para trabajar con ChronoPIC\n");
  printf("Proyecto ChronoJump\n");
  printf("\n");
}


x86 assembly (clang, -O0):
<presenta>:
push   %rbp
mov    %rsp,%rbp
lea    0xf65(%rip),%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
lea    0xf13(%rip),%rdi
call   1030 <printf@plt>
lea    0xf43(%rip),%rdi
call   1030 <printf@plt>
lea    0xf35(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<presenta>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
lea    0xece(%rip),%rdi
call   1040 <puts@plt>
lea    0xf07(%rip),%rdi
call   1040 <puts@plt>
lea    0xf36(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
@.str.1 = [70 x i8] c"Chronopic-serial-conf. (c) Juan Gonzalez. Febrero 2005. Licencia GPL\0A\00"
@.str.2 = [60 x i8] c"Configuracion del puerto serie para trabajar con ChronoPIC\0A\00"
@.str.3 = [21 x i8] c"Proyecto ChronoJump\0A\00"
define void @presenta() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [69 x i8] c"Chronopic-serial-conf. (c) Juan Gonzalez. Febrero 2005. Licencia GPL\00"
@str.4 = [59 x i8] c"Configuracion del puerto serie para trabajar con ChronoPIC\00"
@str.5 = [20 x i8] c"Proyecto ChronoJump\00"
define void @presenta() {
%1 = tail call i32 @putchar(i32 10)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([69 x i8], [69 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str.4, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str.5, i64 0, i64 0))
%5 = tail call i32 @putchar(i32 10)
ret void
}
_Complex float test_ccosf(_Complex float x) { return __builtin_ccosf(x); }


x86 assembly (clang, -O0):
<test_ccosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movlpd %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  %xmm1,-0x18(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <ccosf@plt>
movlpd %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm1
movss  -0x1c(%rbp),%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ccosf>:
jmp    1030 <ccosf@plt>

LLVM IR (-O0):
define <2 x float> @test_ccosf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = alloca { float, float }
%6 = bitcast { float, float }* %3 to <2 x float>*
store <2 x float> %0, <2 x float>* %6
%7 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%8 = load float, float* %7
%9 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
%10 = load float, float* %9
%11 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%12 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
store float %8, float* %11
store float %10, float* %12
%13 = bitcast { float, float }* %4 to <2 x float>*
%14 = load <2 x float>, <2 x float>* %13
%15 = call <2 x float> @ccosf(<2 x float> %14)
%16 = bitcast { float, float }* %5 to <2 x float>*
store <2 x float> %15, <2 x float>* %16
%17 = getelementptr inbounds { float, float }, { float, float }* %5, i32 0, i32 0
%18 = load float, float* %17
%19 = getelementptr inbounds { float, float }, { float, float }* %5, i32 0, i32 1
%20 = load float, float* %19
%21 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%22 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
store float %18, float* %21
store float %20, float* %22
%23 = bitcast { float, float }* %2 to <2 x float>*
%24 = load <2 x float>, <2 x float>* %23
ret <2 x float> %24
}

LLVM IR (-O2):
define <2 x float> @test_ccosf(<2 x float> %0) {
%2 = tail call <2 x float> @ccosf(<2 x float> %0)
ret <2 x float> %2
}
/* Type definitions */
typedef int int8_t;
typedef int /*<<< orphan*/ input;
typedef int /*<<< orphan*/ expected;

/* Variables and functions */
int /*<<< orphan*/ test_rebase(int, int *, int, int, int *, int);
void test_trinary_to_hex(void) {
  int8_t input[] = {1, 1, 2, 0};
  int8_t expected[] = {2, 10};
  test_rebase(3, input, (sizeof(input) / sizeof(input[0])), 16, expected,
              (sizeof(expected) / sizeof(expected[0])));
}


x86 assembly (clang, -O0):
<test_trinary_to_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xede(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    0xedb(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%r8
mov    $0x3,%edi
mov    $0x4,%edx
mov    $0x10,%ecx
mov    $0x2,%r9d
call   1030 <test_rebase@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_trinary_to_hex>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movabs $0xa00000002,%rax
mov    %rax,0x8(%rsp)
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%r8
mov    $0x3,%edi
mov    $0x4,%edx
mov    $0x10,%ecx
mov    $0x2,%r9d
call   1030 <test_rebase@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.test_trinary_to_hex.input = [4 x i32] [i32 1, i32 1, i32 2, i32 0]
@__const.test_trinary_to_hex.expected = [2 x i32] [i32 2, i32 10]
define void @test_trinary_to_hex() {
%1 = alloca [4 x i32]
%2 = alloca [2 x i32]
%3 = bitcast [4 x i32]* %1 to i8*
%4 = bitcast [2 x i32]* %2 to i8*
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%7 = call i32 @test_rebase(i32 3, i32* %5, i32 4, i32 16, i32* %6, i32 2)
ret void
}

LLVM IR (-O2):
@__const.test_trinary_to_hex.input = [4 x i32] [i32 1, i32 1, i32 2, i32 0]
define void @test_trinary_to_hex() {
%1 = alloca [4 x i32]
%2 = alloca i64
%3 = bitcast [4 x i32]* %1 to i8*
%4 = bitcast i64* %2 to i8*
store i64 42949672962, i64* %2
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%6 = bitcast i64* %2 to i32*
%7 = call i32 @test_rebase(i32 3, i32* %5, i32 4, i32 16, i32* %6, i32 2)
ret void
}
/* Variables and functions */
int compared2(long const *, long const *);
int __eqdf2(double a, double b) {
  return compared2(((const long *)&a), ((const long *)&b));
}


x86 assembly (clang, -O0):
<__eqdf2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <compared2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__eqdf2>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <compared2@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @__eqdf2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = bitcast double* %3 to i64*
%6 = bitcast double* %4 to i64*
%7 = call i32 @compared2(i64* %5, i64* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @__eqdf2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = bitcast double* %3 to i64*
%6 = bitcast double* %4 to i64*
%7 = call i32 @compared2(i64* %5, i64* %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printMinusRow();
int /*<<< orphan*/ printf(char *);
void printGoodbye() {
  printMinusRow();
  printf("\n\tT H A N K\tY O U\tA N D\tG O O D B Y E\n");
  printMinusRow();
}


x86 assembly (clang, -O0):
<printGoodbye>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <printMinusRow@plt>
lea    0xece(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <printMinusRow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printGoodbye>:
push   %rax
xor    %eax,%eax
call   1030 <printMinusRow@plt>
lea    0xed1(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <printMinusRow@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"\0A\09T H A N K\09Y O U\09A N D\09G O O D B Y E\0A\00"
define void @printGoodbye() {
%1 = call i32 (...) @printMinusRow()
%2 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @printMinusRow()
ret void
}

LLVM IR (-O2):
@str = [38 x i8] c"\0A\09T H A N K\09Y O U\09A N D\09G O O D B Y E\00"
define void @printGoodbye() {
%1 = tail call i32 (...) @printMinusRow()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @printMinusRow()
ret void
}
int test_imm_07uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x07 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_07uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_07uint64_highword_mem>:
testb  $0x7,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_07uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 7
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_07uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 30064771072
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stdout;
char *strerror(int /*<<< orphan*/);
void efatal(char *msg) {
  fprintf(stdout, "%s: %s\n", msg, strerror(errno));
  exit(-1);
}


x86 assembly (clang, -O0):
<efatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    %rax,%rcx
lea    0xe91(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<efatal>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2e9b(%rip),%rax
mov    (%rax),%ebp
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeac(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @efatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = load i32, i32* @errno
%6 = call i8* @strerror(i32 %5)
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
%8 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @efatal(i8* %0) {
%2 = load i32, i32* @stdout
%3 = load i32, i32* @errno
%4 = tail call i8* @strerror(i32 %3)
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
%6 = tail call i32 @exit(i32 -1)
unreachable
}
unsigned long round_to_word(long int size_in_bits) {
  if (size_in_bits % 32) {
    return ((size_in_bits + 32 - (size_in_bits % 32)) / 32);
  } else {
    return (size_in_bits / 32);
  }
}


x86 assembly (clang, -O0):
<round_to_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x20,%ecx
cqto
idiv   %rcx
cmp    $0x0,%rdx
je     1154 <round_to_word+0x54>
mov    -0x10(%rbp),%rax
add    $0x20,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x20,%ecx
cqto
idiv   %rcx
mov    -0x18(%rbp),%rax
sub    %rdx,%rax
mov    $0x20,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
jmp    1166 <round_to_word+0x66>
mov    -0x10(%rbp),%rax
mov    $0x20,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_to_word>:
lea    0x1f(%rdi),%rax
test   %rdi,%rdi
cmovns %rdi,%rax
and    $0xffffffffffffffe0,%rax
lea    0x20(%rax),%rcx
cmp    %rax,%rdi
cmove  %rdi,%rcx
lea    0x1f(%rcx),%rax
test   %rcx,%rcx
cmovns %rcx,%rax
sar    $0x5,%rax
ret

LLVM IR (-O0):
define i64 @round_to_word(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = srem i64 %4, 32
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 32
%10 = load i64, i64* %3
%11 = srem i64 %10, 32
%12 = sub nsw i64 %9, %11
%13 = sdiv i64 %12, 32
store i64 %13, i64* %2
br label %17
14: ; preds = %1
%15 = load i64, i64* %3
%16 = sdiv i64 %15, 32
store i64 %16, i64* %2
br label %17
17: ; preds = %14, %7
%18 = load i64, i64* %2
ret i64 %18
}

LLVM IR (-O2):
define i64 @round_to_word(i64 %0) {
%2 = srem i64 %0, 32
%3 = icmp eq i64 %2, 0
%4 = add nsw i64 %0, 32
%5 = sub i64 %4, %2
%6 = select i1 %3, i64 %0, i64 %5
%7 = sdiv i64 %6, 32
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ atanl(long double);
long double sinl(int /*<<< orphan*/);
long double __attribute__((no)) sinatanl_(long double x) {
  return sinl(atanl(x));
}


x86 assembly (clang, -O0):
<sinatanl_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <atanl@plt>
mov    %eax,%edi
call   1030 <sinl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sinatanl_>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1040 <atanl@plt>
mov    %eax,%edi
add    $0x18,%rsp
jmp    1030 <sinl@plt>

LLVM IR (-O0):
define x86_fp80 @sinatanl_(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i32 @atanl(x86_fp80 %3)
%5 = call x86_fp80 @sinl(i32 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @sinatanl_(x86_fp80 %0) {
%2 = tail call i32 @atanl(x86_fp80 %0)
%3 = tail call x86_fp80 @sinl(i32 %2)
ret x86_fp80 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void print_help(const char *cmd) {
  printf("Use %s [-Olevel | -h] [states.txt] [states_out.txt] [states.v]\n"
         "\t-h\tPrint this help;\n"
         "\t-Olevel\tSpecify level of optimization (default is 1):\n"
         "\t\t0 - no optimization\n"
         "\t\t1 - just group common bits (default, best for hardware)\n"
         "\t\t>1 - higher levels\n"
         "\t\t-1 - infinite optimization (best for simulation).\n\n"
         "Copyright (c) Odintsov Oleg, nnop@newmail.ru\n"
         "This tool is a part of Agat hardware project.\n",
         cmd);
  exit(100);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x64,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_help>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x64,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [385 x i8] c"Use %s [-Olevel | -h] [states.txt] [states_out.txt] [states.v]\0A\09-h\09Print this help;\0A\09-Olevel\09Specify level of optimization (default is 1):\0A\09\090 - no optimization\0A\09\091 - just group common bits (default, best for hardware)\0A\09\09>1 - higher levels\0A\09\09-1 - infinite optimization (best for simulation).\0A\0ACopyright (c) Odintsov Oleg, nnop@newmail.ru\0AThis tool is a part of Agat hardware project.\0A\00"
define void @print_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([385 x i8], [385 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 100)
unreachable
}

LLVM IR (-O2):
@.str = [385 x i8] c"Use %s [-Olevel | -h] [states.txt] [states_out.txt] [states.v]\0A\09-h\09Print this help;\0A\09-Olevel\09Specify level of optimization (default is 1):\0A\09\090 - no optimization\0A\09\091 - just group common bits (default, best for hardware)\0A\09\09>1 - higher levels\0A\09\09-1 - infinite optimization (best for simulation).\0A\0ACopyright (c) Odintsov Oleg, nnop@newmail.ru\0AThis tool is a part of Agat hardware project.\0A\00"
define void @print_help(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([385 x i8], [385 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 100)
unreachable
}
void ConvertSidedef(void) {}


x86 assembly (clang, -O0):
<ConvertSidedef>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConvertSidedef>:
ret

LLVM IR (-O0):
define void @ConvertSidedef() {
ret void
}

LLVM IR (-O2):
define void @ConvertSidedef() {
ret void
}
int array_is_zero(unsigned int const *arr, int len) {
  int i;
  for (i = 0; i < len; ++i) {
    if (arr[i] != 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<array_is_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    114f <array_is_zero+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
je     113c <array_is_zero+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1156 <array_is_zero+0x56>
jmp    1141 <array_is_zero+0x41>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <array_is_zero+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_is_zero>:
mov    $0x1,%eax
test   %esi,%esi
jle    111f <array_is_zero+0x1f>
mov    %esi,%ecx
xor    %edx,%edx
nopl   (%rax)
cmpl   $0x0,(%rdi,%rdx,4)
jne    1120 <array_is_zero+0x20>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <array_is_zero+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @array_is_zero(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %11
store i32 0, i32* %3
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %7
23: ; preds = %7
store i32 1, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @array_is_zero(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %13, %5
br i1 %7, label %14, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %13, %6 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, 0
%13 = add nuw nsw i64 %9, 1
br i1 %12, label %6, label %14
14: ; preds = %8, %6, %2
%15 = phi i32 [ 1, %2 ], [ 1, %6 ], [ 0, %8 ]
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ u;
struct unimapdesc {
  int dummy;
};

/* Variables and functions */
int main(void) {
  struct unimapdesc u;
  (void)u;
  return sizeof(u);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
%struct.unimapdesc = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.unimapdesc
store i32 0, i32* %1
ret i32 4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 4
}