xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double const);
void vector_printf(const double *vector, int size) {
  int k;
  for (k = 0; k < size; k++)
    printf(" %f", vector[k]);
}


x86 assembly (clang, -O0):
<vector_printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <vector_printf+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <vector_printf+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_printf>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <vector_printf+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
movsd  (%r15,%rbx,8),%xmm0
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <vector_printf+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c" %f\00"
define void @vector_printf(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double*, double** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double, double* %11, i64 %13
%15 = load double, double* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" %f\00"
define void @vector_printf(double* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double, double* %0, i64 %7
%9 = load double, double* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int n;

/* Variables and functions */
scalar_t__ is_little();
unsigned endian_big_to_host(unsigned n) {
  return is_little()
             ? ((n) << 24 | ((n)&0xff00) << 8 | (n) >> 24 | ((n)&0xff0000) >> 8)
             : n;
}


x86 assembly (clang, -O0):
<endian_big_to_host>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <is_little@plt>
cmp    $0x0,%rax
je     115e <endian_big_to_host+0x4e>
mov    -0x4(%rbp),%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shr    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    1164 <endian_big_to_host+0x54>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endian_big_to_host>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <is_little@plt>
test   %rax,%rax
mov    %ebx,%eax
bswap  %eax
cmove  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @endian_big_to_host(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 (...) @is_little()
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %19
5: ; preds = %1
%6 = load i32, i32* %2
%7 = shl i32 %6, 24
%8 = load i32, i32* %2
%9 = and i32 %8, 65280
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = load i32, i32* %2
%13 = lshr i32 %12, 24
%14 = or i32 %11, %13
%15 = load i32, i32* %2
%16 = and i32 %15, 16711680
%17 = lshr i32 %16, 8
%18 = or i32 %14, %17
br label %21
19: ; preds = %1
%20 = load i32, i32* %2
br label %21
21: ; preds = %19, %5
%22 = phi i32 [ %18, %5 ], [ %20, %19 ]
ret i32 %22
}

LLVM IR (-O2):
define i32 @endian_big_to_host(i32 %0) {
%2 = tail call i64 (...) @is_little()
%3 = icmp eq i64 %2, 0
%4 = tail call i32 @llvm.bswap.i32(i32 %0)
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
void reg_dummy_read() {
  int a = *(unsigned int *)(((0x08000000)));
  a++;
}


x86 assembly (clang, -O0):
<reg_dummy_read>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8000000,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_dummy_read>:
ret

LLVM IR (-O0):
define void @reg_dummy_read() {
%1 = alloca i32
%2 = load i32, i32* inttoptr (i64 134217728 to i32*)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
ret void
}

LLVM IR (-O2):
define void @reg_dummy_read() {
ret void
}
int memtype_check_insert(struct memtype *entry_new,
                         enum page_cache_mode *new_type) {
  return 0;
}


x86 assembly (clang, -O0):
<memtype_check_insert>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memtype_check_insert>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.memtype = type opaque
define i32 @memtype_check_insert(%struct.memtype* %0, i32* %1) {
%3 = alloca %struct.memtype*
%4 = alloca i32*
store %struct.memtype* %0, %struct.memtype** %3
store i32* %1, i32** %4
ret i32 0
}

LLVM IR (-O2):
%struct.memtype = type opaque
define i32 @memtype_check_insert(%struct.memtype* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void t4(char *x) { free(x); }


x86 assembly (clang, -O0):
<t4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t4>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @t4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @t4(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void __attribute__((weak)) dma1_stream3_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<dma1_stream3_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dma1_stream3_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.dma1_stream3_isr = [17 x i8] c"dma1_stream3_isr\00"
define weak void @dma1_stream3_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__FUNCTION__.dma1_stream3_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.dma1_stream3_isr = [17 x i8] c"dma1_stream3_isr\00"
define weak void @dma1_stream3_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__FUNCTION__.dma1_stream3_isr, i64 0, i64 0))
ret void
}
double *translate(double *p, double *T, double *s) {
  int i;
  for (i = 0; i < 2; i++) {
    s[i] = p[i] + T[i];
  }
  return s;
}


x86 assembly (clang, -O0):
<translate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x2,-0x1c(%rbp)
jge    1156 <translate+0x56>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
addsd  (%rax,%rcx,8),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <translate+0x17>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translate>:
mov    %rdx,%rax
movsd  (%rdi),%xmm0
addsd  (%rsi),%xmm0
movsd  %xmm0,(%rdx)
movsd  0x8(%rdi),%xmm0
addsd  0x8(%rsi),%xmm0
movsd  %xmm0,0x8(%rdx)
ret

LLVM IR (-O0):
define double* @translate(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
%7 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
store i32 0, i32* %7
br label %8
8: ; preds = %27, %3
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 2
br i1 %10, label %11, label %30
11: ; preds = %8
%12 = load double*, double** %4
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double, double* %12, i64 %14
%16 = load double, double* %15
%17 = load double*, double** %5
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds double, double* %17, i64 %19
%21 = load double, double* %20
%22 = fadd double %16, %21
%23 = load double*, double** %6
%24 = load i32, i32* %7
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds double, double* %23, i64 %25
store double %22, double* %26
br label %27
27: ; preds = %11
%28 = load i32, i32* %7
%29 = add nsw i32 %28, 1
store i32 %29, i32* %7
br label %8
30: ; preds = %8
%31 = load double*, double** %6
ret double* %31
}

LLVM IR (-O2):
define double* @translate(double* nocapture %0, double* nocapture %1, double* returned writeonly %2) {
%4 = load double, double* %0
%5 = load double, double* %1
%6 = fadd double %4, %5
store double %6, double* %2
%7 = getelementptr inbounds double, double* %0, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 1
%10 = load double, double* %9
%11 = fadd double %8, %10
%12 = getelementptr inbounds double, double* %2, i64 1
store double %11, double* %12
ret double* %2
}
/* Variables and functions */
int is_user_input_pending();
int search_abort_func(void *opaque) { return is_user_input_pending(); }


x86 assembly (clang, -O0):
<search_abort_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <is_user_input_pending@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_abort_func>:
xor    %eax,%eax
jmp    1030 <is_user_input_pending@plt>

LLVM IR (-O0):
define i32 @search_abort_func(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @is_user_input_pending()
ret i32 %3
}

LLVM IR (-O2):
define i32 @search_abort_func(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @is_user_input_pending()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ GL_CULL_FACE;
int /*<<< orphan*/ GL_PROJECTION;
int /*<<< orphan*/ glClearColor(double, double, double, double);
int /*<<< orphan*/ glEnable(int /*<<< orphan*/);
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ glMatrixMode(int /*<<< orphan*/);
int /*<<< orphan*/ glOrtho(double, double, double, double, double, double);
void init(void) {
  glClearColor(1.0, 1.0, 1.0, 0.0);
  glMatrixMode(GL_PROJECTION);
  glLoadIdentity();
  glOrtho(-1.7, 1.7, -1.7, 1.7, -1.7, 1.7);
  glEnable(GL_CULL_FACE);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
movsd  0xeb4(%rip),%xmm2
xorps  %xmm3,%xmm3
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1060 <glClearColor@plt>
mov    0x2e6f(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1070 <glLoadIdentity@plt>
movsd  0xe79(%rip),%xmm4
movsd  0xe79(%rip),%xmm5
movaps %xmm4,%xmm0
movaps %xmm5,%xmm1
movaps %xmm4,%xmm2
movaps %xmm5,%xmm3
call   1050 <glOrtho@plt>
mov    0x2e31(%rip),%rax
mov    (%rax),%edi
call   1040 <glEnable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
movsd  0xea7(%rip),%xmm0
xorps  %xmm3,%xmm3
movaps %xmm0,%xmm1
movaps %xmm0,%xmm2
call   1060 <glClearColor@plt>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
call   1070 <glLoadIdentity@plt>
movsd  0xe84(%rip),%xmm0
movsd  0xe84(%rip),%xmm1
movaps %xmm0,%xmm2
movaps %xmm1,%xmm3
movaps %xmm0,%xmm4
movaps %xmm1,%xmm5
call   1050 <glOrtho@plt>
mov    0x2e34(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <glEnable@plt>

LLVM IR (-O0):
@GL_PROJECTION = global i32 0
@GL_CULL_FACE = global i32 0
define void @init() {
%1 = call i32 @glClearColor(double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 0.000000e+00)
%2 = load i32, i32* @GL_PROJECTION
%3 = call i32 @glMatrixMode(i32 %2)
%4 = call i32 (...) @glLoadIdentity()
%5 = call i32 @glOrtho(double -1.700000e+00, double 1.700000e+00, double -1.700000e+00, double 1.700000e+00, double -1.700000e+00, double 1.700000e+00)
%6 = load i32, i32* @GL_CULL_FACE
%7 = call i32 @glEnable(i32 %6)
ret void
}

LLVM IR (-O2):
@GL_PROJECTION = global i32 0
@GL_CULL_FACE = global i32 0
define void @init() {
%1 = tail call i32 @glClearColor(double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 0.000000e+00)
%2 = load i32, i32* @GL_PROJECTION
%3 = tail call i32 @glMatrixMode(i32 %2)
%4 = tail call i32 (...) @glLoadIdentity()
%5 = tail call i32 @glOrtho(double -1.700000e+00, double 1.700000e+00, double -1.700000e+00, double 1.700000e+00, double -1.700000e+00, double 1.700000e+00)
%6 = load i32, i32* @GL_CULL_FACE
%7 = tail call i32 @glEnable(i32 %6)
ret void
}
/* Variables and functions */
unsigned long sysfsparser_cpufreq_get_transition_latency(unsigned int);
unsigned long cpufreq_get_transition_latency(unsigned int cpu) {
  return sysfsparser_cpufreq_get_transition_latency(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_transition_latency>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfsparser_cpufreq_get_transition_latency@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_transition_latency>:
jmp    1030 <sysfsparser_cpufreq_get_transition_latency@plt>

LLVM IR (-O0):
define i64 @cpufreq_get_transition_latency(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @sysfsparser_cpufreq_get_transition_latency(i32 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @cpufreq_get_transition_latency(i32 %0) {
%2 = tail call i64 @sysfsparser_cpufreq_get_transition_latency(i32 %0)
ret i64 %2
}
/* Type definitions */
struct vecident {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vecident_resize__(struct vecident *, size_t,
                                     int /*<<< orphan*/);
void vecident_resize(struct vecident *v, size_t new_count) {
  vecident_resize__(v, new_count, 0);
}


x86 assembly (clang, -O0):
<vecident_resize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <vecident_resize__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vecident_resize>:
xor    %edx,%edx
jmp    1030 <vecident_resize__@plt>

LLVM IR (-O0):
%struct.vecident = type { i32 }
define void @vecident_resize(%struct.vecident* %0, i64 %1) {
%3 = alloca %struct.vecident*
%4 = alloca i64
store %struct.vecident* %0, %struct.vecident** %3
store i64 %1, i64* %4
%5 = load %struct.vecident*, %struct.vecident** %3
%6 = load i64, i64* %4
%7 = call i32 @vecident_resize__(%struct.vecident* %5, i64 %6, i32 0)
ret void
}

LLVM IR (-O2):
%struct.vecident = type { i32 }
define void @vecident_resize(%struct.vecident* %0, i64 %1) {
%3 = tail call i32 @vecident_resize__(%struct.vecident* %0, i64 %1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *malloc(int /*<<< orphan*/);
int /*<<< orphan*/ writestr(int, char *);
void *newbuf(void) {
  void *ret;
  if ((ret = malloc(0)) == 0) {
    writestr(2, "libhutils: WTF is wrong with malloc(0);\n");
    exit(1);
  }
  return ret;
}


x86 assembly (clang, -O0):
<newbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    1168 <newbuf+0x38>
mov    $0x2,%edi
lea    0xea7(%rip),%rsi
call   1040 <writestr@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newbuf>:
push   %rax
xor    %edi,%edi
call   1030 <malloc@plt>
test   %rax,%rax
je     113f <newbuf+0xf>
pop    %rcx
ret
lea    0xeba(%rip),%rsi
mov    $0x2,%edi
call   1040 <writestr@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"libhutils: WTF is wrong with malloc(0);\0A\00"
define i8* @newbuf() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 0)
store i8* %2, i8** %1
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = call i32 @writestr(i32 2, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @exit(i32 1)
unreachable
7: ; preds = %0
%8 = load i8*, i8** %1
ret i8* %8
}

LLVM IR (-O2):
@.str = [41 x i8] c"libhutils: WTF is wrong with malloc(0);\0A\00"
define noalias i8* @newbuf() {
%1 = tail call i8* @malloc(i32 0)
%2 = icmp eq i8* %1, null
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @writestr(i32 2, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %0
ret i8* %1
}
void handle_50(int sig) {}


x86 assembly (clang, -O0):
<handle_50>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_50>:
ret

LLVM IR (-O0):
define void @handle_50(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_50(i32 %0) {
ret void
}
void __aeabi_unwind_cpp_pr1(void) { (void)0; }


x86 assembly (clang, -O0):
<__aeabi_unwind_cpp_pr1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_unwind_cpp_pr1>:
ret

LLVM IR (-O0):
define void @__aeabi_unwind_cpp_pr1() {
ret void
}

LLVM IR (-O2):
define void @__aeabi_unwind_cpp_pr1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dprintf(char *);
void exception_fiq(void) {
  *((volatile unsigned int *)0x49056090) = 0x00400000;
  dprintf("Exception: FIQ\n");
}


x86 assembly (clang, -O0):
<exception_fiq>:
push   %rbp
mov    %rsp,%rbp
mov    $0x49056090,%eax
movl   $0x400000,(%rax)
lea    0xeda(%rip),%rdi
call   1030 <dprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exception_fiq>:
movl   $0x400000,0x49056090
lea    0xede(%rip),%rdi
jmp    1030 <dprintf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Exception: FIQ\0A\00"
define void @exception_fiq() {
store volatile i32 4194304, i32* inttoptr (i64 1225089168 to i32*)
%1 = call i32 @dprintf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"Exception: FIQ\0A\00"
define void @exception_fiq() {
store volatile i32 4194304, i32* inttoptr (i64 1225089168 to i32*)
%1 = tail call i32 @dprintf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_06(unsigned char *x, int i) { return x[i]; }


x86 assembly (clang, -O0):
<test_06>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_06>:
movslq %esi,%rax
movzbl (%rdi,%rax,1),%eax
ret

LLVM IR (-O0):
define i32 @test_06(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @test_06(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ I2C_SLAVE;
int ioctl(int, int /*<<< orphan*/, int);
int /*<<< orphan*/ printf(char *);
int talk_to_device(int busfd, int addr) {
  int ret = ioctl(busfd, I2C_SLAVE, addr);
  if (ret < 0)
    printf("Failed to acquire bus access and/or talk to slave.\n");
  return ret;
}


x86 assembly (clang, -O0):
<talk_to_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
call   1040 <ioctl@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    115b <talk_to_device+0x3b>
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<talk_to_device>:
push   %rbx
mov    %esi,%edx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
call   1040 <ioctl@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1143 <talk_to_device+0x23>
lea    0xec2(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@I2C_SLAVE = global i32 0
@.str = [52 x i8] c"Failed to acquire bus access and/or talk to slave.\0A\00"
define i32 @talk_to_device(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* @I2C_SLAVE
%8 = load i32, i32* %4
%9 = call i32 @ioctl(i32 %6, i32 %7, i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %12, %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@I2C_SLAVE = global i32 0
@str = [51 x i8] c"Failed to acquire bus access and/or talk to slave.\00"
define i32 @talk_to_device(i32 %0, i32 %1) {
%3 = load i32, i32* @I2C_SLAVE
%4 = tail call i32 @ioctl(i32 %0, i32 %3, i32 %1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret i32 %4
}
unsigned long hash(unsigned char *str) {
  int counter = 0;
  unsigned long hash = 5381;
  int c;
  while (c = *(str++) && counter < 50) {
    hash = (hash * 33) ^ c;
  }
  return hash;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movq   $0x1505,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x1d(%rbp)
je     1141 <hash+0x41>
cmpl   $0x32,-0xc(%rbp)
setl   %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x1c(%rbp)
test   $0x1,%al
jne    115c <hash+0x5c>
jmp    1171 <hash+0x71>
imul   $0x21,-0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
xor    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1117 <hash+0x17>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
cmpb   $0x0,(%rdi)
je     1138 <hash+0x38>
add    $0x1,%rdi
mov    $0x1505,%ecx
mov    %rcx,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
shl    $0x5,%rax
add    %rcx,%rax
xor    $0x1,%rax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
mov    %rax,%rcx
jne    1120 <hash+0x20>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i64 5381, i64* %4
br label %6
6: ; preds = %18, %1
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %2
%9 = load i8, i8* %7
%10 = zext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %6
%13 = load i32, i32* %3
%14 = icmp slt i32 %13, 50
br label %15
15: ; preds = %12, %6
%16 = phi i1 [ false, %6 ], [ %14, %12 ]
%17 = zext i1 %16 to i32
store i32 %17, i32* %5
br i1 %16, label %18, label %24
18: ; preds = %15
%19 = load i64, i64* %4
%20 = mul i64 %19, 33
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = xor i64 %20, %22
store i64 %23, i64* %4
br label %6
24: ; preds = %15
%25 = load i64, i64* %4
ret i64 %25
}

LLVM IR (-O2):
define i64 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %0, %1 ]
%6 = phi i64 [ %9, %4 ], [ 5381, %1 ]
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = mul i64 %6, 33
%9 = xor i64 %8, 1
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
%13 = phi i64 [ 5381, %1 ], [ %9, %4 ]
ret i64 %13
}
/* Type definitions */
struct sqlConnection {
  int dummy;
};
typedef int /*<<< orphan*/ query;

/* Variables and functions */
char *sqlQuickString(struct sqlConnection *, char *);
int /*<<< orphan*/ sqlSafef(char *, int, char *, int);
char *genePixSubmitId(struct sqlConnection *conn, int id) {
  char query[256];
  sqlSafef(query, sizeof(query),
           "select imageFile.submitId from image,imageFile "
           "where image.id = %d and image.imageFile = imageFile.id",
           id);
  return sqlQuickString(conn, query);
}


x86 assembly (clang, -O0):
<genePixSubmitId>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x100,%esi
lea    0xeb8(%rip),%rdx
call   1040 <sqlSafef@plt>
mov    -0x8(%rbp),%rdi
lea    -0x110(%rbp),%rsi
call   1030 <sqlQuickString@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genePixSubmitId>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %esi,%ecx
mov    %rdi,%rbx
lea    0xeca(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x100,%esi
call   1040 <sqlSafef@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <sqlQuickString@plt>
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.sqlConnection = type { i32 }
@.str = [102 x i8] c"select imageFile.submitId from image,imageFile where image.id = %d and image.imageFile = imageFile.id\00"
define i8* @genePixSubmitId(%struct.sqlConnection* %0, i32 %1) {
%3 = alloca %struct.sqlConnection*
%4 = alloca i32
%5 = alloca [256 x i8]
store %struct.sqlConnection* %0, %struct.sqlConnection** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %4
%8 = call i32 @sqlSafef(i8* %6, i32 256, i8* getelementptr inbounds ([102 x i8], [102 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load %struct.sqlConnection*, %struct.sqlConnection** %3
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%11 = call i8* @sqlQuickString(%struct.sqlConnection* %9, i8* %10)
ret i8* %11
}

LLVM IR (-O2):
%struct.sqlConnection = type { i32 }
@.str = [102 x i8] c"select imageFile.submitId from image,imageFile where image.id = %d and image.imageFile = imageFile.id\00"
define i8* @genePixSubmitId(%struct.sqlConnection* %0, i32 %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @sqlSafef(i8* %4, i32 256, i8* getelementptr inbounds ([102 x i8], [102 x i8]* @.str, i64 0, i64 0), i32 %1)
%6 = call i8* @sqlQuickString(%struct.sqlConnection* %0, i8* %4)
ret i8* %6
}
void tegra_dvfs_core_cap_level_set(int level) {}


x86 assembly (clang, -O0):
<tegra_dvfs_core_cap_level_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_dvfs_core_cap_level_set>:
ret

LLVM IR (-O0):
define void @tegra_dvfs_core_cap_level_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @tegra_dvfs_core_cap_level_set(i32 %0) {
ret void
}
/* Type definitions */
struct timespec {
  int tv_sec;
  scalar_t__ tv_nsec;
};
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t diff_timespec(struct timespec *a, struct timespec *b) {
  return (b->tv_sec - a->tv_sec) * 1000000000 + (b->tv_nsec - a->tv_nsec);
}


x86 assembly (clang, -O0):
<diff_timespec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%eax
imul   $0x3b9aca00,%eax,%eax
cltq
mov    -0x10(%rbp),%rcx
mov    0x8(%rcx),%rcx
mov    -0x8(%rbp),%rdx
sub    0x8(%rdx),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<diff_timespec>:
movslq (%rsi),%rax
movslq (%rdi),%rcx
sub    %rcx,%rax
imul   $0x3b9aca00,%rax,%rcx
mov    0x8(%rsi),%rax
sub    0x8(%rdi),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define i64 @diff_timespec(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %4
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = load %struct.timespec*, %struct.timespec** %3
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
%12 = mul nsw i32 %11, 1000000000
%13 = sext i32 %12 to i64
%14 = load %struct.timespec*, %struct.timespec** %4
%15 = getelementptr inbounds %struct.timespec, %struct.timespec* %14, i32 0, i32 1
%16 = load i64, i64* %15
%17 = load %struct.timespec*, %struct.timespec** %3
%18 = getelementptr inbounds %struct.timespec, %struct.timespec* %17, i32 0, i32 1
%19 = load i64, i64* %18
%20 = sub nsw i64 %16, %19
%21 = add nsw i64 %13, %20
ret i64 %21
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define i64 @diff_timespec(%struct.timespec* nocapture %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
%8 = mul nsw i32 %7, 1000000000
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%11 = load i64, i64* %10
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%13 = load i64, i64* %12
%14 = sub i64 %11, %13
%15 = add nsw i64 %14, %9
ret i64 %15
}
int make_bigger_int(int value) {
  int result = 0;
  result = value * value + 50000;
  return result;
}


x86 assembly (clang, -O0):
<make_bigger_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
add    $0xc350,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_bigger_int>:
imul   %edi,%edi
lea    0xc350(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @make_bigger_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
%7 = add nsw i32 %6, 50000
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @make_bigger_int(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = add nuw nsw i32 %2, 50000
ret i32 %3
}
hoc_win_wait_cursor() {}


x86 assembly (clang, -O0):
<hoc_win_wait_cursor>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoc_win_wait_cursor>:
ret

LLVM IR (-O0):
define i32 @hoc_win_wait_cursor() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @hoc_win_wait_cursor() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ stbi__mad3sizes_valid(int, int, int, int);
void *stbi__malloc(int);
void *stbi__malloc_mad3(int a, int b, int c, int add) {
  if (!stbi__mad3sizes_valid(a, b, c, add))
    return NULL;
  return stbi__malloc(a * b * c + add);
}


x86 assembly (clang, -O0):
<stbi__malloc_mad3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1040 <stbi__mad3sizes_valid@plt>
cmp    $0x0,%eax
jne    115b <stbi__malloc_mad3+0x3b>
movq   $0x0,-0x8(%rbp)
jmp    1172 <stbi__malloc_mad3+0x52>
mov    -0xc(%rbp),%edi
imul   -0x10(%rbp),%edi
imul   -0x14(%rbp),%edi
add    -0x18(%rbp),%edi
call   1030 <stbi__malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi__malloc_mad3>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%ebp
mov    %edi,%ebx
call   1040 <stbi__mad3sizes_valid@plt>
test   %eax,%eax
je     1155 <stbi__malloc_mad3+0x35>
imul   %ebx,%ebp
imul   %r15d,%ebp
add    %r14d,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <stbi__malloc@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8* @stbi__malloc_mad3(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = load i32, i32* %9
%14 = call i32 @stbi__mad3sizes_valid(i32 %10, i32 %11, i32 %12, i32 %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %4
store i8* null, i8** %5
br label %26
17: ; preds = %4
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = mul nsw i32 %18, %19
%21 = load i32, i32* %8
%22 = mul nsw i32 %20, %21
%23 = load i32, i32* %9
%24 = add nsw i32 %22, %23
%25 = call i8* @stbi__malloc(i32 %24)
store i8* %25, i8** %5
br label %26
26: ; preds = %17, %16
%27 = load i8*, i8** %5
ret i8* %27
}

LLVM IR (-O2):
define i8* @stbi__malloc_mad3(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @stbi__mad3sizes_valid(i32 %0, i32 %1, i32 %2, i32 %3)
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %4
%8 = mul nsw i32 %1, %0
%9 = mul nsw i32 %8, %2
%10 = add nsw i32 %9, %3
%11 = tail call i8* @stbi__malloc(i32 %10)
br label %12
12: ; preds = %4, %7
%13 = phi i8* [ %11, %7 ], [ null, %4 ]
ret i8* %13
}
/* Variables and functions */
int /*<<< orphan*/ fill_box8(char *, int, int, int, int, int, int);
int /*<<< orphan*/ init_palette();
int /*<<< orphan*/ io_hlt();
void HariMain(void) {
  char *p;
  init_palette();
  p = (char *)0xa0000;
  fill_box8(p, 320, (1), 20, 20, 120, 120);
  fill_box8(p, 320, (2), 70, 50, 170, 150);
  fill_box8(p, 320, (4), 120, 80, 220, 180);
  for (;;)
    io_hlt();
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <init_palette@plt>
mov    $0xa0000,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x140,%esi
mov    $0x1,%edx
mov    $0x14,%r8d
mov    $0x78,%r9d
mov    %r8d,%ecx
movl   $0x78,(%rsp)
call   1040 <fill_box8@plt>
mov    -0x8(%rbp),%rdi
mov    $0x140,%esi
mov    $0x2,%edx
mov    $0x46,%ecx
mov    $0x32,%r8d
mov    $0xaa,%r9d
movl   $0x96,(%rsp)
call   1040 <fill_box8@plt>
mov    -0x8(%rbp),%rdi
mov    $0x140,%esi
mov    $0x4,%edx
mov    $0x78,%ecx
mov    $0x50,%r8d
mov    $0xdc,%r9d
movl   $0xb4,(%rsp)
call   1040 <fill_box8@plt>
mov    $0x0,%al
call   1030 <io_hlt@plt>
jmp    11c7 <HariMain+0x97>

x86 assembly (clang, -O2):
<HariMain>:
push   %rax
xor    %eax,%eax
call   1050 <init_palette@plt>
movl   $0x78,(%rsp)
mov    $0xa0000,%edi
mov    $0x140,%esi
mov    $0x1,%edx
mov    $0x14,%ecx
mov    $0x14,%r8d
mov    $0x78,%r9d
call   1040 <fill_box8@plt>
movl   $0x96,(%rsp)
mov    $0xa0000,%edi
mov    $0x140,%esi
mov    $0x2,%edx
mov    $0x46,%ecx
mov    $0x32,%r8d
mov    $0xaa,%r9d
call   1040 <fill_box8@plt>
movl   $0xb4,(%rsp)
mov    $0xa0000,%edi
mov    $0x140,%esi
mov    $0x4,%edx
mov    $0x78,%ecx
mov    $0x50,%r8d
mov    $0xdc,%r9d
call   1040 <fill_box8@plt>
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <io_hlt@plt>
jmp    11c0 <HariMain+0x90>

LLVM IR (-O0):
define void @HariMain() {
%1 = alloca i8*
%2 = call i32 (...) @init_palette()
store i8* inttoptr (i64 655360 to i8*), i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @fill_box8(i8* %3, i32 320, i32 1, i32 20, i32 20, i32 120, i32 120)
%5 = load i8*, i8** %1
%6 = call i32 @fill_box8(i8* %5, i32 320, i32 2, i32 70, i32 50, i32 170, i32 150)
%7 = load i8*, i8** %1
%8 = call i32 @fill_box8(i8* %7, i32 320, i32 4, i32 120, i32 80, i32 220, i32 180)
br label %9
9: ; preds = %9, %0
%10 = call i32 (...) @io_hlt()
br label %9
}

LLVM IR (-O2):
define void @HariMain() {
%1 = tail call i32 (...) @init_palette()
%2 = tail call i32 @fill_box8(i8* inttoptr (i64 655360 to i8*), i32 320, i32 1, i32 20, i32 20, i32 120, i32 120)
%3 = tail call i32 @fill_box8(i8* inttoptr (i64 655360 to i8*), i32 320, i32 2, i32 70, i32 50, i32 170, i32 150)
%4 = tail call i32 @fill_box8(i8* inttoptr (i64 655360 to i8*), i32 320, i32 4, i32 120, i32 80, i32 220, i32 180)
br label %5
5: ; preds = %5, %0
%6 = tail call i32 (...) @io_hlt()
br label %5
}
const char *mg_version(void) { return "3.8"; }


x86 assembly (clang, -O0):
<mg_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mg_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"3.8\00"
define i8* @mg_version() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"3.8\00"
define i8* @mg_version() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;

/* Variables and functions */
int __infer_nondet_int();
int iswdigit(wint_t wc) { return __infer_nondet_int(); }


x86 assembly (clang, -O0):
<iswdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswdigit>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @iswdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @__infer_nondet_int()
ret i32 %3
}

LLVM IR (-O2):
define i32 @iswdigit(i32 %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
ret i32 %2
}
/* Variables and functions */
unsigned int bme280_compensate_H_int32(int);
unsigned short int
bme280_compensate_H_int32_sixteen_bit_output(signed int adc_h) {
  unsigned int v_x1_u32r;
  unsigned short int v_x2_u32r;
  v_x1_u32r = bme280_compensate_H_int32(adc_h);
  v_x2_u32r = (unsigned short int)(v_x1_u32r >> 1);
  return v_x2_u32r;
}


x86 assembly (clang, -O0):
<bme280_compensate_H_int32_sixteen_bit_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bme280_compensate_H_int32@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bme280_compensate_H_int32_sixteen_bit_output>:
push   %rax
call   1030 <bme280_compensate_H_int32@plt>
shr    %eax
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i16 @bme280_compensate_H_int32_sixteen_bit_output(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @bme280_compensate_H_int32(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = lshr i32 %7, 1
%9 = trunc i32 %8 to i16
store i16 %9, i16* %4
%10 = load i16, i16* %4
ret i16 %10
}

LLVM IR (-O2):
define zeroext i16 @bme280_compensate_H_int32_sixteen_bit_output(i32 %0) {
%2 = tail call i32 @bme280_compensate_H_int32(i32 %0)
%3 = lshr i32 %2, 1
%4 = trunc i32 %3 to i16
ret i16 %4
}
void __dabt(void) { return; }


x86 assembly (clang, -O0):
<__dabt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dabt>:
ret

LLVM IR (-O0):
define void @__dabt() {
ret void
}

LLVM IR (-O2):
define void @__dabt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(void *);
int /*<<< orphan*/ solve(long, int /*<<< orphan*/);
void *solve0(void *threadid) {
  long t;
  t = (int)threadid;
  solve(t, 0);
  pthread_exit((void *)t);
}


x86 assembly (clang, -O0):
<solve0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
xor    %esi,%esi
call   1030 <solve@plt>
mov    -0x18(%rbp),%rdi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solve0>:
push   %rbx
movslq %edi,%rbx
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <solve@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
define i8* @solve0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i32
%7 = sext i32 %6 to i64
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = call i32 @solve(i64 %8, i32 0)
%10 = load i64, i64* %4
%11 = inttoptr i64 %10 to i8*
%12 = call i32 @pthread_exit(i8* %11)
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
define noalias i8* @solve0(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = shl i64 %2, 32
%4 = ashr exact i64 %3, 32
%5 = tail call i32 @solve(i64 %4, i32 0)
%6 = inttoptr i64 %4 to i8*
%7 = tail call i32 @pthread_exit(i8* %6)
ret i8* undef
}
int test_imm_84uint16_mem(unsigned short *val) {
  return ((*val) & (0x84 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_84uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x84,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_84uint16_mem>:
testb  $0x84,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_84uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 132
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_84uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 132
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int flip(prob)
float prob;
{
  float randomperc();
  if (randomperc() <= prob)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<flip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <randomperc@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     1145 <flip+0x35>
movl   $0x1,-0x4(%rbp)
jmp    114c <flip+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip>:
push   %rax
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <randomperc@plt>
xor    %eax,%eax
movss  0x4(%rsp),%xmm1
ucomiss %xmm0,%xmm1
setae  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @flip(double %0) {
%2 = alloca i32
%3 = alloca float
%4 = fptrunc double %0 to float
store float %4, float* %3
%5 = call float (...) @randomperc()
%6 = load float, float* %3
%7 = fcmp ole float %5, %6
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @flip(double %0) {
%2 = fptrunc double %0 to float
%3 = tail call float (...) @randomperc()
%4 = fcmp ole float %3, %2
%5 = zext i1 %4 to i32
ret i32 %5
}
int get_exhaustive_limit(double found_ratio) {
  for (int search_start = 4;; search_start *= 2) {
    double best_ratio = (double)search_start / (search_start - 1);
    if (best_ratio < found_ratio)
      return search_start / 2;
  }
}


x86 assembly (clang, -O0):
<get_exhaustive_limit>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm0
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1149 <get_exhaustive_limit+0x49>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret
jmp    114e <get_exhaustive_limit+0x4e>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1110 <get_exhaustive_limit+0x10>

x86 assembly (clang, -O2):
<get_exhaustive_limit>:
mov    $0x4,%eax
cs nopw 0x0(%rax,%rax,1)
nop
mov    %eax,%ecx
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
lea    -0x1(%rcx),%eax
xorps  %xmm2,%xmm2
cvtsi2sd %eax,%xmm2
divsd  %xmm2,%xmm1
lea    (%rcx,%rcx,1),%eax
ucomisd %xmm1,%xmm0
jbe    1110 <get_exhaustive_limit+0x10>
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @get_exhaustive_limit(double %0) {
%2 = alloca double
%3 = alloca i32
%4 = alloca double
store double %0, double* %2
store i32 4, i32* %3
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to double
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = sitofp i32 %9 to double
%11 = fdiv double %7, %10
store double %11, double* %4
%12 = load double, double* %4
%13 = load double, double* %2
%14 = fcmp olt double %12, %13
br i1 %14, label %15, label %18
15: ; preds = %5
%16 = load i32, i32* %3
%17 = sdiv i32 %16, 2
ret i32 %17
18: ; preds = %5
br label %19
19: ; preds = %18
%20 = load i32, i32* %3
%21 = mul nsw i32 %20, 2
store i32 %21, i32* %3
br label %5
}

LLVM IR (-O2):
define i32 @get_exhaustive_limit(double %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 4, %1 ], [ %9, %2 ]
%4 = sitofp i32 %3 to double
%5 = add nsw i32 %3, -1
%6 = sitofp i32 %5 to double
%7 = fdiv double %4, %6
%8 = fcmp olt double %7, %0
%9 = shl nsw i32 %3, 1
br i1 %8, label %10, label %2
10: ; preds = %2
%11 = sdiv i32 %3, 2
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int pclose(FILE *stream) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<pclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pclose>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @pclose(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @pclose(i32* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i32 -1
}