xunge/DecIR huggingface dataset:
int getLEdword(unsigned char buf[4]) {
  return (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
}


x86 assembly (clang, -O0):
<getLEdword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x0,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLEdword>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @getLEdword(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 0
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = shl i32 %23, 0
%25 = or i32 %19, %24
ret i32 %25
}

LLVM IR (-O2):
define i32 @getLEdword(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw i32 %4, 24
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 16
%10 = or i32 %9, %5
%11 = getelementptr inbounds i8, i8* %0, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 8
%15 = or i32 %10, %14
%16 = load i8, i8* %0
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
ret i32 %18
}
/* Variables and functions */
int strcmp(char const *, char const *);
int reverse_strcmp(const void *x, const void *y) {
  const char **x1 = (const char **)x;
  const char **y1 = (const char **)y;
  return strcmp(*y1, *x1);
}


x86 assembly (clang, -O0):
<reverse_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_strcmp>:
mov    (%rsi),%rax
mov    (%rdi),%rsi
mov    %rax,%rdi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @reverse_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
store i8** %8, i8*** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
store i8** %10, i8*** %6
%11 = load i8**, i8*** %6
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %5
%14 = load i8*, i8** %13
%15 = call i32 @strcmp(i8* %12, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @reverse_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %5, i8* dereferenceable(1) %6)
ret i32 %7
}
__attribute__((visibility("hidden"))) __attribute__((used)) void
the_hidden_function() {}


x86 assembly (clang, -O0):
<the_hidden_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<the_hidden_function>:
ret

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void ()* @the_hidden_function to i8*)], section "llvm.metadata"
define hidden void @the_hidden_function() {
ret void
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void ()* @the_hidden_function to i8*)], section "llvm.metadata"
define hidden void @the_hidden_function() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_53c8xx(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_53c8xx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_53c8xx>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_53c8xx() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_53c8xx() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
OP(ed, c7) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
void __attribute__((format(printf, 2, 3)))
xfs_debug(const struct xfs_mount *mp, const char *fmt, ...) {}


x86 assembly (clang, -O0):
<xfs_debug>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfs_debug>:
ret

LLVM IR (-O0):
%struct.xfs_mount = type opaque
define void @xfs_debug(%struct.xfs_mount* %0, i8* %1, ...) {
%3 = alloca %struct.xfs_mount*
%4 = alloca i8*
store %struct.xfs_mount* %0, %struct.xfs_mount** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.xfs_mount = type opaque
define void @xfs_debug(%struct.xfs_mount* nocapture %0, i8* nocapture %1, ...) {
ret void
}
/* Type definitions */
struct ibv_wq_init_attr {
  int dummy;
};
struct ibv_wq {
  int dummy;
};
struct ibv_context {
  int dummy;
};

/* Variables and functions */
struct ibv_wq *ibv_create_wq(struct ibv_context *, struct ibv_wq_init_attr *);
struct ibv_wq *mlx4_glue_create_wq(struct ibv_context *context,
                                   struct ibv_wq_init_attr *wq_init_attr) {
  return ibv_create_wq(context, wq_init_attr);
}


x86 assembly (clang, -O0):
<mlx4_glue_create_wq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ibv_create_wq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx4_glue_create_wq>:
jmp    1030 <ibv_create_wq@plt>

LLVM IR (-O0):
%struct.ibv_wq = type { i32 }
%struct.ibv_context = type { i32 }
%struct.ibv_wq_init_attr = type { i32 }
define %struct.ibv_wq* @mlx4_glue_create_wq(%struct.ibv_context* %0, %struct.ibv_wq_init_attr* %1) {
%3 = alloca %struct.ibv_context*
%4 = alloca %struct.ibv_wq_init_attr*
store %struct.ibv_context* %0, %struct.ibv_context** %3
store %struct.ibv_wq_init_attr* %1, %struct.ibv_wq_init_attr** %4
%5 = load %struct.ibv_context*, %struct.ibv_context** %3
%6 = load %struct.ibv_wq_init_attr*, %struct.ibv_wq_init_attr** %4
%7 = call %struct.ibv_wq* @ibv_create_wq(%struct.ibv_context* %5, %struct.ibv_wq_init_attr* %6)
ret %struct.ibv_wq* %7
}

LLVM IR (-O2):
%struct.ibv_wq = type { i32 }
%struct.ibv_context = type { i32 }
%struct.ibv_wq_init_attr = type { i32 }
define %struct.ibv_wq* @mlx4_glue_create_wq(%struct.ibv_context* %0, %struct.ibv_wq_init_attr* %1) {
%3 = tail call %struct.ibv_wq* @ibv_create_wq(%struct.ibv_context* %0, %struct.ibv_wq_init_attr* %1)
ret %struct.ibv_wq* %3
}
void Die() {
  int *pInt = 0;
  *pInt = 42;
}


x86 assembly (clang, -O0):
<Die>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x2a,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @Die() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
store i32 42, i32* %2
ret void
}

LLVM IR (-O2):
int wpa_key_mgmt_sha256(int akm) { return !!(akm & ((1 << (8)) | (1 << (7)))); }


x86 assembly (clang, -O0):
<wpa_key_mgmt_sha256>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x180,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_key_mgmt_sha256>:
xor    %eax,%eax
test   $0x180,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 384
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = and i32 %0, 384
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
long __attribute__((no)) lsubv(long a, long b) { return a - b; }


x86 assembly (clang, -O0):
<lsubv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsubv>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @lsubv(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @lsubv(i64 %0, i64 %1) {
%3 = sub nsw i64 %0, %1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x27() {
  Assert_real((isspace(39) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              200, ("isspace should be 0 for '"));
}


x86 assembly (clang, -O0):
<t_isspace_0x27>:
push   %rbp
mov    %rsp,%rbp
mov    $0x27,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xc8,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x27>:
push   %rax
mov    $0x27,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xc8,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for '\00"
define void @t_isspace_0x27() {
%1 = call i64 @isspace(i32 39)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 200, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for '\00"
define void @t_isspace_0x27() {
%1 = tail call i64 @isspace(i32 39)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 200, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
void plan(unsigned int num) { printf("1..%d\n", num); }


x86 assembly (clang, -O0):
<plan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plan>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"1..%d\0A\00"
define void @plan(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"1..%d\0A\00"
define void @plan(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ paint_it(char const *, char *);
void magenta(const char *string) { paint_it(string, "\x1b[0;35m"); }


x86 assembly (clang, -O0):
<magenta>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <paint_it@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magenta>:
lea    0xee9(%rip),%rsi
jmp    1030 <paint_it@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"\1B[0;35m\00"
define void @magenta(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @paint_it(i8* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"\1B[0;35m\00"
define void @magenta(i8* %0) {
%2 = tail call i32 @paint_it(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int int64_t;

/* Variables and functions */
int64_t signed_bits(int64_t value, int bits) {
  if (bits < 64) {
    value &= ((int64_t)1 << bits) - 1;
    if (value & (int64_t)1 << (bits - 1))
      value |= (int64_t)((uint64_t)-1 << bits);
  }
  return value;
}


x86 assembly (clang, -O0):
<signed_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x40,-0x8(%rbp)
jge    1159 <signed_bits+0x59>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1154 <signed_bits+0x54>
mov    -0x8(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <signed_bits+0x59>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_bits>:
mov    %edi,%eax
cmp    $0x3f,%esi
jg     1128 <signed_bits+0x28>
mov    $0xffffffff,%edx
mov    %esi,%ecx
shl    %cl,%edx
mov    %edx,%ecx
not    %ecx
and    %eax,%ecx
add    $0xff,%sil
movzbl %sil,%esi
or     %eax,%edx
bt     %esi,%ecx
cmovae %ecx,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @signed_bits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 64
br i1 %6, label %7, label %25
7: ; preds = %2
%8 = load i32, i32* %4
%9 = shl i32 1, %8
%10 = sub nsw i32 %9, 1
%11 = load i32, i32* %3
%12 = and i32 %11, %10
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = shl i32 1, %15
%17 = and i32 %13, %16
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %24
19: ; preds = %7
%20 = load i32, i32* %4
%21 = shl i32 -1, %20
%22 = load i32, i32* %3
%23 = or i32 %22, %21
store i32 %23, i32* %3
br label %24
24: ; preds = %19, %7
br label %25
25: ; preds = %24, %2
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @signed_bits(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 64
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = shl nsw i32 -1, %1
%6 = xor i32 %5, -1
%7 = and i32 %6, %0
%8 = add nsw i32 %1, -1
%9 = shl nuw i32 1, %8
%10 = and i32 %7, %9
%11 = icmp eq i32 %10, 0
%12 = or i32 %5, %0
%13 = select i1 %11, i32 %7, i32 %12
br label %14
14: ; preds = %4, %2
%15 = phi i32 [ %0, %2 ], [ %13, %4 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ fizzbuzz(int);
int main() { fizzbuzz(15); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
call   1030 <fizzbuzz@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xf,%edi
call   1030 <fizzbuzz@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @fizzbuzz(i32 15)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fizzbuzz(i32 15)
ret i32 0
}
nodev() { return -4; }


x86 assembly (clang, -O0):
<nodev>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nodev>:
mov    $0xfffffffc,%eax
ret

LLVM IR (-O0):
define i32 @nodev() {
ret i32 -4
}

LLVM IR (-O2):
define i32 @nodev() {
ret i32 -4
}
extern void f3() {}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3() {
ret void
}

LLVM IR (-O2):
define void @f3() {
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
int aeron_alloc_no_err(void **ptr, size_t size) {
  *ptr = malloc(size);
  if (NULL == *ptr) {
    return -1;
  }
  memset(*ptr, 0, size);
  return 0;
}


x86 assembly (clang, -O0):
<aeron_alloc_no_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
cmp    (%rcx),%rax
jne    115e <aeron_alloc_no_err+0x3e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1177 <aeron_alloc_no_err+0x57>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_alloc_no_err>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    %rsi,%rdi
call   1040 <malloc@plt>
mov    %rax,0x0(%rbp)
test   %rax,%rax
je     114b <aeron_alloc_no_err+0x2b>
xor    %ebp,%ebp
mov    %rax,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
jmp    1150 <aeron_alloc_no_err+0x30>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @aeron_alloc_no_err(i8** %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i64
store i8** %0, i8*** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = call i8* @malloc(i64 %6)
%8 = load i8**, i8*** %4
store i8* %7, i8** %8
%9 = load i8**, i8*** %4
%10 = load i8*, i8** %9
%11 = icmp eq i8* null, %10
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %3
br label %18
13: ; preds = %2
%14 = load i8**, i8*** %4
%15 = load i8*, i8** %14
%16 = load i64, i64* %5
%17 = call i32 @memset(i8* %15, i32 0, i64 %16)
store i32 0, i32* %3
br label %18
18: ; preds = %13, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @aeron_alloc_no_err(i8** nocapture writeonly %0, i64 %1) {
%3 = tail call i8* @malloc(i64 %1)
store i8* %3, i8** %0
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memset(i8* %3, i32 0, i64 %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %8
}
/* Type definitions */
struct feed_group {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ init_mutexes(struct feed_group *const);
int default_config(struct feed_group *const group) {
  init_mutexes(group);
  return 0;
}


x86 assembly (clang, -O0):
<default_config>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <init_mutexes@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_config>:
push   %rax
call   1030 <init_mutexes@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.feed_group = type { i32 }
define i32 @default_config(%struct.feed_group* %0) {
%2 = alloca %struct.feed_group*
store %struct.feed_group* %0, %struct.feed_group** %2
%3 = load %struct.feed_group*, %struct.feed_group** %2
%4 = call i32 @init_mutexes(%struct.feed_group* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.feed_group = type { i32 }
define i32 @default_config(%struct.feed_group* %0) {
%2 = tail call i32 @init_mutexes(%struct.feed_group* %0)
ret i32 0
}
int interposableBar() { return 100; }


x86 assembly (clang, -O0):
<interposableBar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<interposableBar>:
mov    $0x64,%eax
ret

LLVM IR (-O0):
define i32 @interposableBar() {
ret i32 100
}

LLVM IR (-O2):
define i32 @interposableBar() {
ret i32 100
}
/* Type definitions */
struct list_t {
  int dummy;
};

/* Variables and functions */
struct list_t *list_create_with_size(int);
struct list_t *list_create(void) {
  return list_create_with_size(8);
}


x86 assembly (clang, -O0):
<list_create>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
call   1030 <list_create_with_size@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_create>:
mov    $0x8,%edi
jmp    1030 <list_create_with_size@plt>

LLVM IR (-O0):
%struct.list_t = type { i32 }
define %struct.list_t* @list_create() {
%1 = call %struct.list_t* @list_create_with_size(i32 8)
ret %struct.list_t* %1
}

LLVM IR (-O2):
%struct.list_t = type { i32 }
define %struct.list_t* @list_create() {
%1 = tail call %struct.list_t* @list_create_with_size(i32 8)
ret %struct.list_t* %1
}
int is_arabic(unsigned char c) {
  if ((c >= 0x99 && c <= 0xA2) || (c >= 0xA5 && c <= 0xBF) ||
      (c >= 0xC1 && c <= 0xFF))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_arabic>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x99,%eax
jl     1128 <is_arabic+0x28>
movzbl -0x5(%rbp),%eax
cmp    $0xa2,%eax
jle    1164 <is_arabic+0x64>
movzbl -0x5(%rbp),%eax
cmp    $0xa5,%eax
jl     1146 <is_arabic+0x46>
movzbl -0x5(%rbp),%eax
cmp    $0xbf,%eax
jle    1164 <is_arabic+0x64>
movzbl -0x5(%rbp),%eax
cmp    $0xc1,%eax
jl     1170 <is_arabic+0x70>
movzbl -0x5(%rbp),%eax
cmp    $0xff,%eax
jg     1170 <is_arabic+0x70>
movl   $0x1,-0x4(%rbp)
jmp    1177 <is_arabic+0x77>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_arabic>:
lea    0x67(%rdi),%eax
cmp    $0xa,%al
setb   %al
lea    0x5b(%rdi),%ecx
cmp    $0x1b,%cl
setb   %cl
or     %al,%cl
cmp    $0xc1,%dil
setae  %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_arabic(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 153
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 162
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = icmp sge i32 %13, 165
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp sle i32 %17, 191
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = zext i8 %20 to i32
%22 = icmp sge i32 %21, 193
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = zext i8 %24 to i32
%26 = icmp sle i32 %25, 255
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @is_arabic(i8 zeroext %0) {
%2 = add i8 %0, 103
%3 = icmp ult i8 %2, 10
%4 = add i8 %0, 91
%5 = icmp ult i8 %4, 27
%6 = or i1 %3, %5
%7 = icmp ugt i8 %0, -64
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, const char *argv[]) {
  do {
    printf("Hello, ");
    printf("world!\n");
  } while (0);
  ({
    printf("Aloha, ");
    printf("jerk!\n");
  });
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xedc(%rip),%rdi
call   1030 <puts@plt>
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xecb(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Hello, \00"
@.str.1 = [8 x i8] c"world!\0A\00"
@.str.2 = [8 x i8] c"Aloha, \00"
@.str.3 = [7 x i8] c"jerk!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %2
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %7
%11 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
%12 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.3, i64 0, i64 0))
store i32 %12, i32* %6
%13 = load i32, i32* %6
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"Hello, \00"
@.str.2 = [8 x i8] c"Aloha, \00"
@str = [7 x i8] c"world!\00"
@str.4 = [6 x i8] c"jerk!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.4, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ strerror(int);
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *, int, int /*<<< orphan*/);
void log_errno(int errornum) {
  syslog(LOG_ERR, "%d: %s", errornum, strerror(errornum));
}


x86 assembly (clang, -O0):
<log_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <strerror@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    %eax,%ecx
lea    0xeac(%rip),%rsi
call   1030 <syslog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_errno>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eac(%rip),%rax
mov    (%rax),%ebp
call   1040 <strerror@plt>
lea    0xec6(%rip),%rsi
mov    %ebp,%edi
mov    %ebx,%edx
mov    %eax,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <syslog@plt>

LLVM IR (-O0):
@LOG_ERR = global i32 0
@.str = [7 x i8] c"%d: %s\00"
define void @log_errno(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @LOG_ERR
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @strerror(i32 %5)
%7 = call i32 @syslog(i32 %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %6)
ret void
}

LLVM IR (-O2):
@LOG_ERR = global i32 0
@.str = [7 x i8] c"%d: %s\00"
define void @log_errno(i32 %0) {
%2 = load i32, i32* @LOG_ERR
%3 = tail call i32 @strerror(i32 %0)
%4 = tail call i32 @syslog(i32 %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ minHeapFixdown(int *, int /*<<< orphan*/, int);
void minHeapDeleteElem(int heaps[], int n) {
  heaps[0] = heaps[n - 1];
  minHeapFixdown(heaps, 0, n - 1);
}


x86 assembly (clang, -O0):
<minHeapDeleteElem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <minHeapFixdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minHeapDeleteElem>:
movslq %esi,%rax
lea    -0x1(%rsi),%edx
mov    -0x4(%rdi,%rax,4),%eax
mov    %eax,(%rdi)
xor    %esi,%esi
jmp    1030 <minHeapFixdown@plt>

LLVM IR (-O0):
define void @minHeapDeleteElem(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32, i32* %9
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 0
store i32 %10, i32* %12
%13 = load i32*, i32** %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = call i32 @minHeapFixdown(i32* %13, i32 0, i32 %15)
ret void
}

LLVM IR (-O2):
define void @minHeapDeleteElem(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
store i32 %6, i32* %0
%7 = tail call i32 @minHeapFixdown(i32* %0, i32 0, i32 %3)
ret void
}
int ft_isalpha(int c) {
  if ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z'))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     111b <ft_isalpha+0x1b>
cmpl   $0x7a,-0x8(%rbp)
jle    112f <ft_isalpha+0x2f>
cmpl   $0x41,-0x8(%rbp)
jl     113b <ft_isalpha+0x3b>
cmpl   $0x5a,-0x8(%rbp)
jg     113b <ft_isalpha+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <ft_isalpha+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalpha>:
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isalpha(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %15, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 90
br i1 %14, label %15, label %16
15: ; preds = %12, %6
store i32 1, i32* %2
br label %17
16: ; preds = %12, %9
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @ft_isalpha(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _rotr(int /*<<< orphan*/, int);
uint32_t rotr32(uint32_t x, int n) { return _rotr(x, n); }


x86 assembly (clang, -O0):
<rotr32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_rotr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr32>:
jmp    1030 <_rotr@plt>

LLVM IR (-O0):
define i32 @rotr32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_rotr(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @rotr32(i32 %0, i32 %1) {
%3 = tail call i32 @_rotr(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int UINT16_MAX;
int rat_mod_generic_set_val_max16(const char *argv, uint8_t *data,
                                  uint16_t len) {
  do {
  } while (0);
  if (!argv || !data || len < sizeof(uint16_t))
    return -1;
  *((uint16_t *)data) = UINT16_MAX;
  return 0;
}


x86 assembly (clang, -O0):
<rat_mod_generic_set_val_max16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
jmp    1114 <rat_mod_generic_set_val_max16+0x14>
cmpq   $0x0,-0x10(%rbp)
je     1138 <rat_mod_generic_set_val_max16+0x38>
cmpq   $0x0,-0x18(%rbp)
je     1138 <rat_mod_generic_set_val_max16+0x38>
movslq -0x1c(%rbp),%rax
cmp    $0x4,%rax
jae    1144 <rat_mod_generic_set_val_max16+0x44>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <rat_mod_generic_set_val_max16+0x5a>
mov    0x2e95(%rip),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rat_mod_generic_set_val_max16>:
mov    $0xffffffff,%eax
test   %rdi,%rdi
je     1121 <rat_mod_generic_set_val_max16+0x21>
test   %rsi,%rsi
je     1121 <rat_mod_generic_set_val_max16+0x21>
cmp    $0x4,%edx
jb     1121 <rat_mod_generic_set_val_max16+0x21>
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
@UINT16_MAX = global i32 0
define i32 @rat_mod_generic_set_val_max16(i8* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
br label %8
8: ; preds = %3
br label %9
9: ; preds = %8
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = load i32*, i32** %6
%14 = icmp ne i32* %13, null
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = icmp ult i64 %17, 4
br i1 %18, label %19, label %20
19: ; preds = %15, %12, %9
store i32 -1, i32* %4
br label %23
20: ; preds = %15
%21 = load i32, i32* @UINT16_MAX
%22 = load i32*, i32** %6
store i32 %21, i32* %22
store i32 0, i32* %4
br label %23
23: ; preds = %20, %19
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
@UINT16_MAX = global i32 0
define i32 @rat_mod_generic_set_val_max16(i8* readnone %0, i32* writeonly %1, i32 %2) {
%4 = icmp eq i8* %0, null
%5 = icmp eq i32* %1, null
%6 = or i1 %4, %5
%7 = icmp ult i32 %2, 4
%8 = or i1 %6, %7
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = load i32, i32* @UINT16_MAX
store i32 %10, i32* %1
br label %11
11: ; preds = %3, %9
%12 = phi i32 [ 0, %9 ], [ -1, %3 ]
ret i32 %12
}
/* Variables and functions */
int __bsrq(long long);
int test__bsrq(long long X) { return __bsrq(X); }


x86 assembly (clang, -O0):
<test__bsrq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__bsrq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__bsrq>:
jmp    1030 <__bsrq@plt>

LLVM IR (-O0):
define i32 @test__bsrq(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @__bsrq(i64 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test__bsrq(i64 %0) {
%2 = tail call i32 @__bsrq(i64 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ e_lsr();
int /*<<< orphan*/ e_writeback();
int /*<<< orphan*/ e_zp();
void e_lsr_zp() {
  e_zp();
  e_lsr();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_lsr_zp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <e_zp@plt>
mov    $0x0,%al
call   1050 <e_lsr@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_lsr_zp>:
push   %rax
xor    %eax,%eax
call   1040 <e_zp@plt>
xor    %eax,%eax
call   1050 <e_lsr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_lsr_zp() {
%1 = call i32 (...) @e_zp()
%2 = call i32 (...) @e_lsr()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_lsr_zp() {
%1 = tail call i32 (...) @e_zp()
%2 = tail call i32 (...) @e_lsr()
%3 = tail call i32 (...) @e_writeback()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mbstate_t;

/* Variables and functions */
int mbsinit(int /*<<< orphan*/ const *);
__attribute__((__weak__, __always___)) int
softboundmpx_mbsinit(const mbstate_t *ps) {
  return mbsinit(ps);
}


x86 assembly (clang, -O0):
<softboundmpx_mbsinit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mbsinit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_mbsinit>:
jmp    1030 <mbsinit@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_mbsinit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @mbsinit(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define weak i32 @softboundmpx_mbsinit(i32* %0) {
%2 = tail call i32 @mbsinit(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ ispunct(int);
void t_ispunct_0x5d() {
  Assert_real((ispunct(93)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              470, ("ispunct should be 1 for ]"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x5d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5d,%edi
call   1030 <ispunct@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1d6,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x5d>:
push   %rax
mov    $0x5d,%edi
call   1030 <ispunct@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x1d6,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 1 for ]\00"
define void @t_ispunct_0x5d() {
%1 = call i32 @ispunct(i32 93)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 470, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 1 for ]\00"
define void @t_ispunct_0x5d() {
%1 = tail call i32 @ispunct(i32 93)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 470, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int lseek(int, int, int);
int X(int f, int o, int w) { return lseek(f, o, w); }


x86 assembly (clang, -O0):
<X>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <lseek@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X>:
jmp    1030 <lseek@plt>

LLVM IR (-O0):
define i32 @X(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @lseek(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @X(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @lseek(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
int new_pid(void) {
  static int pid = 0;
  return pid++;
}


x86 assembly (clang, -O0):
<new_pid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0f(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_pid>:
mov    0x2f1e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f15(%rip)
ret

LLVM IR (-O0):
@new_pid.pid = internal global i32 0
define i32 @new_pid() {
%1 = load i32, i32* @new_pid.pid
%2 = add nsw i32 %1, 1
store i32 %2, i32* @new_pid.pid
ret i32 %1
}

LLVM IR (-O2):
@new_pid.pid = internal unnamed_addr global i32 0
define i32 @new_pid() {
%1 = load i32, i32* @new_pid.pid
%2 = add nsw i32 %1, 1
store i32 %2, i32* @new_pid.pid
ret i32 %1
}
void gtk_text_iter_get_attributes() {}


x86 assembly (clang, -O0):
<gtk_text_iter_get_attributes>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_get_attributes>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_get_attributes() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_get_attributes() {
ret void
}
char *strcpy(char *restrict dest, const char *restrict src) {
  char *dt = dest;
  while ((*dest++ = *src++))
    ;
  return dt;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1143 <strcpy+0x43>
jmp    1114 <strcpy+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* noalias %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
store i8 %10, i8* %11
%13 = icmp ne i8 %10, 0
br i1 %13, label %14, label %15
14: ; preds = %7
br label %7
15: ; preds = %7
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @strcpy(i8* noalias returned writeonly %0, i8* noalias nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ printf(char *, unsigned long long);
unsigned long long rdtsc();
int main() {
  unsigned long long coldstart = 0;
  unsigned long long start = 0;
  unsigned long long end = 0;
  int pid = 0;
  coldstart = rdtsc();
  start = rdtsc();
  pid = getpid();
  end = rdtsc();
  printf("%llu", (end - start));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    $0x0,%al
call   1050 <rdtsc@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <rdtsc@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1050 <rdtsc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
sub    -0x10(%rbp),%rsi
lea    0xe6f(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <rdtsc@plt>
xor    %eax,%eax
call   1050 <rdtsc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
xor    %eax,%eax
call   1050 <rdtsc@plt>
sub    %rbx,%rax
lea    0xea6(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%llu\00"
define i32 @main() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = alloca i32
store i64 0, i64* %1
store i64 0, i64* %2
store i64 0, i64* %3
store i32 0, i32* %4
%5 = call i64 (...) @rdtsc()
store i64 %5, i64* %1
%6 = call i64 (...) @rdtsc()
store i64 %6, i64* %2
%7 = call i32 (...) @getpid()
store i32 %7, i32* %4
%8 = call i64 (...) @rdtsc()
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = load i64, i64* %2
%11 = sub i64 %9, %10
%12 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%llu\00"
define i32 @main() {
%1 = tail call i64 (...) @rdtsc()
%2 = tail call i64 (...) @rdtsc()
%3 = tail call i32 (...) @getpid()
%4 = tail call i64 (...) @rdtsc()
%5 = sub i64 %4, %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %5)
ret i32 0
}
void s2e_merge_point() {
  __asm__ __volatile__(".byte 0x0f, 0x3f\n"
                       ".byte 0x00, 0x70, 0x00, 0x00\n"
                       ".byte 0x00, 0x00, 0x00, 0x00\n");
}


x86 assembly (clang, -O0):
<s2e_merge_point>:
push   %rbp
mov    %rsp,%rbp
(bad)
add    %dh,0x0(%rax)
add    %al,(%rax)
add    %al,(%rax)
add    %bl,-0x3d(%rbp)

x86 assembly (clang, -O2):
<s2e_merge_point>:
(bad)
add    %dh,0x0(%rax)
add    %al,(%rax)
add    %al,(%rax)
add    %al,%bl

LLVM IR (-O0):
define void @s2e_merge_point() {
ret void
}

LLVM IR (-O2):
define void @s2e_merge_point() {
tail call void asm sideeffect ".byte 0x0f, 0x3f\0A.byte 0x00, 0x70, 0x00, 0x00\0A.byte 0x00, 0x00, 0x00, 0x00\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void zero_close(struct fs_node *node) {
  (void)node;
  return;
}


x86 assembly (clang, -O0):
<zero_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_close>:
ret

LLVM IR (-O0):
%struct.fs_node = type opaque
define void @zero_close(%struct.fs_node* %0) {
%2 = alloca %struct.fs_node*
store %struct.fs_node* %0, %struct.fs_node** %2
%3 = load %struct.fs_node*, %struct.fs_node** %2
ret void
}

LLVM IR (-O2):
%struct.fs_node = type opaque
define void @zero_close(%struct.fs_node* nocapture %0) {
ret void
}
/* Variables and functions */
double sin(int);
double Sine(int a) { return sin(a * 180.0 / 3.1415926535); }


x86 assembly (clang, -O0):
<Sine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xee0(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xecc(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <sin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sine>:
cvtsi2sd %edi,%xmm0
mulsd  0xee4(%rip),%xmm0
divsd  0xee4(%rip),%xmm0
cvttsd2si %xmm0,%edi
jmp    1030 <sin@plt>

LLVM IR (-O0):
define double @Sine(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fmul double %4, 1.800000e+02
%6 = fdiv double %5, 0x400921FB54411744
%7 = fptosi double %6 to i32
%8 = call double @sin(i32 %7)
ret double %8
}

LLVM IR (-O2):
define double @Sine(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fmul double %2, 1.800000e+02
%4 = fdiv double %3, 0x400921FB54411744
%5 = fptosi double %4 to i32
%6 = tail call double @sin(i32 %5)
ret double %6
}
void updatecounts(int counts[], int len, int wordlen) {
  wordlen = wordlen < len ? wordlen : len;
  counts[wordlen - 1]++;
}


x86 assembly (clang, -O0):
<updatecounts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1125 <updatecounts+0x25>
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    112b <updatecounts+0x2b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
add    $0x1,%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<updatecounts>:
cmp    %esi,%edx
cmovl  %edx,%esi
movslq %esi,%rax
addl   $0x1,-0x4(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @updatecounts(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %6
br label %14
12: ; preds = %3
%13 = load i32, i32* %5
br label %14
14: ; preds = %12, %10
%15 = phi i32 [ %11, %10 ], [ %13, %12 ]
store i32 %15, i32* %6
%16 = load i32*, i32** %4
%17 = load i32, i32* %6
%18 = sub nsw i32 %17, 1
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %16, i64 %19
%21 = load i32, i32* %20
%22 = add nsw i32 %21, 1
store i32 %22, i32* %20
ret void
}

LLVM IR (-O2):
define void @updatecounts(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %2, %1
%5 = select i1 %4, i32 %2, i32 %1
%6 = add nsw i32 %5, -1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = add nsw i32 %9, 1
store i32 %10, i32* %8
ret void
}