xunge/DecIR huggingface dataset:
int comp(int *a, int *b) {
  if (*a < *b) {
    return -1;
  }
  if (*a == *b) {
    return 0;
  }
  if (*a > *b) {
    return 1;
  }
}


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jge    112a <comp+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1161 <comp+0x61>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jne    1148 <comp+0x48>
movl   $0x0,-0x4(%rbp)
jmp    1161 <comp+0x61>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jle    1161 <comp+0x61>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setne  %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @comp(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %26
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = load i32*, i32** %5
%16 = load i32, i32* %15
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %19
18: ; preds = %12
store i32 0, i32* %3
br label %26
19: ; preds = %12
%20 = load i32*, i32** %4
%21 = load i32, i32* %20
%22 = load i32*, i32** %5
%23 = load i32, i32* %22
%24 = icmp sgt i32 %21, %23
br i1 %24, label %25, label %26
25: ; preds = %19
store i32 1, i32* %3
br label %26
26: ; preds = %11, %18, %25, %19
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @comp(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %3, %4
%6 = icmp ne i32 %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
void ctrl1_(void) {}


x86 assembly (clang, -O0):
<ctrl1_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctrl1_>:
ret

LLVM IR (-O0):
define void @ctrl1_() {
ret void
}

LLVM IR (-O2):
define void @ctrl1_() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit_u(int);
void emit_halt(unsigned cond) { emit_u(0xFFFFFFF0U | cond); }


x86 assembly (clang, -O0):
<emit_halt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
or     $0xfffffff0,%edi
call   1030 <emit_u@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_halt>:
or     $0xfffffff0,%edi
jmp    1030 <emit_u@plt>

LLVM IR (-O0):
define void @emit_halt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = or i32 -16, %3
%5 = call i32 @emit_u(i32 %4)
ret void
}

LLVM IR (-O2):
define void @emit_halt(i32 %0) {
%2 = or i32 %0, -16
%3 = tail call i32 @emit_u(i32 %2)
ret void
}
/* Variables and functions */
int PAPI_remove_event(int, int);
void papif_remove_event_(int *EventSet, int *Event, int *check) {
  *check = PAPI_remove_event(*EventSet, *Event);
}


x86 assembly (clang, -O0):
<papif_remove_event_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1030 <PAPI_remove_event@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_remove_event_>:
push   %rbx
mov    %rdx,%rbx
mov    (%rdi),%edi
mov    (%rsi),%esi
call   1030 <PAPI_remove_event@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_remove_event_(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = call i32 @PAPI_remove_event(i32 %8, i32 %10)
%12 = load i32*, i32** %6
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @papif_remove_event_(i32* nocapture %0, i32* nocapture %1, i32* nocapture writeonly %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %1
%6 = tail call i32 @PAPI_remove_event(i32 %4, i32 %5)
store i32 %6, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rfftf1(int, double *, double *, double *, int *);
void rfftf(int n, double r[], double wsave[]) {
  if (n == 1)
    return;
  rfftf1(n, r, wsave, wsave + n, (int *)(wsave + 2 * n));
}


x86 assembly (clang, -O0):
<rfftf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1132 <rfftf+0x22>
jmp    1164 <rfftf+0x54>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x18(%rbp),%rcx
movslq -0x4(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rcx
mov    -0x18(%rbp),%r8
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
cltq
shl    $0x3,%rax
add    %rax,%r8
call   1030 <rfftf1@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfftf>:
cmp    $0x1,%edi
jne    1116 <rfftf+0x6>
ret
movslq %edi,%rax
lea    (%rdx,%rax,8),%rcx
lea    (%rdi,%rdi,1),%eax
cltq
lea    (%rdx,%rax,8),%r8
jmp    1030 <rfftf1@plt>

LLVM IR (-O0):
define void @rfftf(i32 %0, double* %1, double* %2) {
%4 = alloca i32
%5 = alloca double*
%6 = alloca double*
store i32 %0, i32* %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %3
br label %25
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load double*, double** %5
%13 = load double*, double** %6
%14 = load double*, double** %6
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double*, double** %6
%19 = load i32, i32* %4
%20 = mul nsw i32 2, %19
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds double, double* %18, i64 %21
%23 = bitcast double* %22 to i32*
%24 = call i32 @rfftf1(i32 %11, double* %12, double* %13, double* %17, i32* %23)
br label %25
25: ; preds = %10, %9
ret void
}

LLVM IR (-O2):
define void @rfftf(i32 %0, double* %1, double* %2) {
%4 = icmp eq i32 %0, 1
br i1 %4, label %13, label %5
5: ; preds = %3
%6 = sext i32 %0 to i64
%7 = getelementptr inbounds double, double* %2, i64 %6
%8 = shl nsw i32 %0, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds double, double* %2, i64 %9
%11 = bitcast double* %10 to i32*
%12 = tail call i32 @rfftf1(i32 %0, double* %1, double* %2, double* %7, i32* %11)
br label %13
13: ; preds = %3, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void dieNeg(int val, char *msg) {
  if (val < 0) {
    perror(msg);
    exit(-val);
  }
}


x86 assembly (clang, -O0):
<dieNeg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    114c <dieNeg+0x2c>
mov    -0x10(%rbp),%rdi
call   1030 <perror@plt>
xor    %edi,%edi
sub    -0x4(%rbp),%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dieNeg>:
test   %edi,%edi
js     1125 <dieNeg+0x5>
ret
push   %rbx
mov    %edi,%ebx
mov    %rsi,%rdi
call   1030 <perror@plt>
neg    %ebx
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @dieNeg(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @perror(i8* %8)
%10 = load i32, i32* %3
%11 = sub nsw i32 0, %10
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @dieNeg(i32 %0, i8* nocapture %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = tail call i32 @perror(i8* %1)
%6 = sub nsw i32 0, %0
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AdcStreamP__Alarm__fired();
void TransformAlarmC__2__Alarm__fired(void) { AdcStreamP__Alarm__fired(); }


x86 assembly (clang, -O0):
<TransformAlarmC__2__Alarm__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AdcStreamP__Alarm__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TransformAlarmC__2__Alarm__fired>:
xor    %eax,%eax
jmp    1030 <AdcStreamP__Alarm__fired@plt>

LLVM IR (-O0):
define void @TransformAlarmC__2__Alarm__fired() {
%1 = call i32 (...) @AdcStreamP__Alarm__fired()
ret void
}

LLVM IR (-O2):
define void @TransformAlarmC__2__Alarm__fired() {
%1 = tail call i32 (...) @AdcStreamP__Alarm__fired()
ret void
}
/* Type definitions */
struct sched_param {
  int dummy;
};
typedef int /*<<< orphan*/ posix_spawnattr_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int posix_spawnattr_getschedparam(const posix_spawnattr_t *attr,
                                  struct sched_param *schedparam) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<posix_spawnattr_getschedparam>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawnattr_getschedparam>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sched_param = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_getschedparam(i32* %0, %struct.sched_param* %1) {
%3 = alloca i32*
%4 = alloca %struct.sched_param*
store i32* %0, i32** %3
store %struct.sched_param* %1, %struct.sched_param** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.sched_param = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_getschedparam(i32* nocapture readnone %0, %struct.sched_param* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  (void)fprintf(stderr, "Usage: test_fcntl_lock"
                        " source...\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"Usage: test_fcntl_lock source...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"Usage: test_fcntl_lock source...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void kasan_module_free(void *addr) {}


x86 assembly (clang, -O0):
<kasan_module_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kasan_module_free>:
ret

LLVM IR (-O0):
define void @kasan_module_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @kasan_module_free(i8* nocapture %0) {
ret void
}
void g_main_loop_unref() {}


x86 assembly (clang, -O0):
<g_main_loop_unref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_main_loop_unref>:
ret

LLVM IR (-O0):
define void @g_main_loop_unref() {
ret void
}

LLVM IR (-O2):
define void @g_main_loop_unref() {
ret void
}
int hdmi4_cec_init(struct platform_device *pdev, struct hdmi_core_data *core,
                   struct hdmi_wp_data *wp) {
  return 0;
}


x86 assembly (clang, -O0):
<hdmi4_cec_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdmi4_cec_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.platform_device = type opaque
%struct.hdmi_core_data = type opaque
%struct.hdmi_wp_data = type opaque
define i32 @hdmi4_cec_init(%struct.platform_device* %0, %struct.hdmi_core_data* %1, %struct.hdmi_wp_data* %2) {
%4 = alloca %struct.platform_device*
%5 = alloca %struct.hdmi_core_data*
%6 = alloca %struct.hdmi_wp_data*
store %struct.platform_device* %0, %struct.platform_device** %4
store %struct.hdmi_core_data* %1, %struct.hdmi_core_data** %5
store %struct.hdmi_wp_data* %2, %struct.hdmi_wp_data** %6
ret i32 0
}

LLVM IR (-O2):
%struct.platform_device = type opaque
%struct.hdmi_core_data = type opaque
%struct.hdmi_wp_data = type opaque
define i32 @hdmi4_cec_init(%struct.platform_device* nocapture readnone %0, %struct.hdmi_core_data* nocapture readnone %1, %struct.hdmi_wp_data* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
int mq_unlink(char const *);
void test_mqueue_unlink_prototype() {
  const char *name = "bogus";
  int err;
  err = mq_unlink(name);
  (void)err;
}


x86 assembly (clang, -O0):
<test_mqueue_unlink_prototype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mq_unlink@plt>
mov    %eax,-0xc(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mqueue_unlink_prototype>:
lea    0xee9(%rip),%rdi
jmp    1030 <mq_unlink@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"bogus\00"
define void @test_mqueue_unlink_prototype() {
%1 = alloca i8*
%2 = alloca i32
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @mq_unlink(i8* %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"bogus\00"
define void @test_mqueue_unlink_prototype() {
%1 = tail call i32 @mq_unlink(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
int bics_si_test1(int a, int b, int c) {
  if ((a & b) == a)
    return a;
  else
    return c;
}


x86 assembly (clang, -O0):
<bics_si_test1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1127 <bics_si_test1+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112d <bics_si_test1+0x2d>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bics_si_test1>:
mov    %edx,%eax
not    %esi
test   %esi,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @bics_si_test1(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = and i32 %8, %9
%11 = load i32, i32* %5
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %17
15: ; preds = %3
%16 = load i32, i32* %7
store i32 %16, i32* %4
br label %17
17: ; preds = %15, %13
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @bics_si_test1(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, %0
%5 = icmp eq i32 %4, %0
%6 = select i1 %5, i32 %0, i32 %2
ret i32 %6
}
void execerror(message, op) char *message, *op;
{
  printf("run time error: %s needed for %s\n", message, op);
  abortexecution_();
}


x86 assembly (clang, -O0):
<execerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <abortexecution_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execerror>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xed2(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <abortexecution_@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"run time error: %s needed for %s\0A\00"
define void @execerror(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
%8 = call i32 (...) @abortexecution_()
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"run time error: %s needed for %s\0A\00"
define void @execerror(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = tail call i32 (...) @abortexecution_()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long);
int main() {
  printf("Size of long: %lu\n", (unsigned long)sizeof(long));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Size of long: %lu\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i64 8)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"Size of long: %lu\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i64 8)
ret i32 0
}
/* Variables and functions */
char const *cfg_mvp_get_lib(char *);
const char *cfg_mvp_get_processor_lib(void) {
  return cfg_mvp_get_lib("processor");
}


x86 assembly (clang, -O0):
<cfg_mvp_get_processor_lib>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <cfg_mvp_get_lib@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_mvp_get_processor_lib>:
lea    0xee9(%rip),%rdi
jmp    1030 <cfg_mvp_get_lib@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"processor\00"
define i8* @cfg_mvp_get_processor_lib() {
%1 = call i8* @cfg_mvp_get_lib(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [10 x i8] c"processor\00"
define i8* @cfg_mvp_get_processor_lib() {
%1 = tail call i8* @cfg_mvp_get_lib(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ putBlack();
int /*<<< orphan*/ putRed();
void putColorOfSuit(int s) {
  if (s % 2 == 1) {
    putRed();
  } else {
    putBlack();
  }
}


x86 assembly (clang, -O0):
<putColorOfSuit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    114b <putColorOfSuit+0x2b>
mov    $0x0,%al
call   1030 <putRed@plt>
jmp    1152 <putColorOfSuit+0x32>
mov    $0x0,%al
call   1040 <putBlack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putColorOfSuit>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
and    $0xfffffffe,%eax
sub    %eax,%edi
xor    %eax,%eax
cmp    $0x1,%edi
jne    1138 <putColorOfSuit+0x18>
jmp    1030 <putRed@plt>
jmp    1040 <putBlack@plt>

LLVM IR (-O0):
define void @putColorOfSuit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @putRed()
br label %10
8: ; preds = %1
%9 = call i32 (...) @putBlack()
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
define void @putColorOfSuit(i32 %0) {
%2 = srem i32 %0, 2
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @putRed()
br label %8
6: ; preds = %1
%7 = tail call i32 (...) @putBlack()
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
int machdep_sys_wait4(int, int *, int, int /*<<< orphan*/ *);
int machdep_sys_waitpid(int a, int *b, int c) {
  return (machdep_sys_wait4(a, b, c, NULL));
}


x86 assembly (clang, -O0):
<machdep_sys_waitpid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <machdep_sys_wait4@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<machdep_sys_waitpid>:
xor    %ecx,%ecx
jmp    1030 <machdep_sys_wait4@plt>

LLVM IR (-O0):
define i32 @machdep_sys_waitpid(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = call i32 @machdep_sys_wait4(i32 %7, i32* %8, i32 %9, i32* null)
ret i32 %10
}

LLVM IR (-O2):
define i32 @machdep_sys_waitpid(i32 %0, i32* %1, i32 %2) {
%4 = tail call i32 @machdep_sys_wait4(i32 %0, i32* %1, i32 %2, i32* null)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(unsigned char, unsigned char);
void SensorSetReg_SP80818(unsigned short uAddr, unsigned short uVal) {
  VIM_SIF_I2cWriteByte((unsigned char)uAddr, (unsigned char)uVal);
}


x86 assembly (clang, -O0):
<SensorSetReg_SP80818>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
mov    %al,%cl
mov    -0x4(%rbp),%ax
movzbl %cl,%edi
movzbl %al,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetReg_SP80818>:
movzbl %dil,%edi
movzbl %sil,%esi
jmp    1030 <VIM_SIF_I2cWriteByte@plt>

LLVM IR (-O0):
define void @SensorSetReg_SP80818(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = trunc i16 %5 to i8
%7 = load i16, i16* %4
%8 = trunc i16 %7 to i8
%9 = call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %6, i8 zeroext %8)
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_SP80818(i16 zeroext %0, i16 zeroext %1) {
%3 = trunc i16 %0 to i8
%4 = trunc i16 %1 to i8
%5 = tail call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %3, i8 zeroext %4)
ret void
}
/* Type definitions */
typedef int uint16_t;
typedef int /*<<< orphan*/ out;

/* Variables and functions */
uint16_t TO_BE16(uint16_t in) {
  uint16_t out = 0;
  unsigned char *pout = (unsigned char *)&out;
  int i;
  for (i = sizeof(out) - 1; i >= 0; --i, in >>= 8)
    pout[i] = in & 0xff;
  return out;
}


x86 assembly (clang, -O0):
<TO_BE16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1153 <TO_BE16+0x53>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
jmp    111d <TO_BE16+0x1d>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TO_BE16>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @TO_BE16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%6 = bitcast i32* %3 to i8*
store i8* %6, i8** %4
store i32 3, i32* %5
br label %7
7: ; preds = %18, %1
%8 = load i32, i32* %5
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %23
10: ; preds = %7
%11 = load i32, i32* %2
%12 = and i32 %11, 255
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 %13, i8* %17
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, -1
store i32 %20, i32* %5
%21 = load i32, i32* %2
%22 = ashr i32 %21, 8
store i32 %22, i32* %2
br label %7
23: ; preds = %7
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @TO_BE16(i32 %0) {
%2 = call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ arl_wrapper_function();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Calling arl_wrapper_function()...\n");
  arl_wrapper_function();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <arl_wrapper_function@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <arl_wrapper_function@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"Calling arl_wrapper_function()...\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @arl_wrapper_function()
ret i32 0
}

LLVM IR (-O2):
@str = [34 x i8] c"Calling arl_wrapper_function()...\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @arl_wrapper_function()
ret i32 0
}
void termop_dblwidth(struct ansiseq *s) {
  tnc_log_log(
      7, 4, -1,
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c",
      215, __func__, "unhandled");
  ansiseq_dump(s);
}


x86 assembly (clang, -O0):
<termop_dblwidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x7,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
lea    0xebe(%rip),%rcx
mov    $0xd7,%r8d
lea    0xf37(%rip),%r9
lea    0xf40(%rip),%rax
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <tnc_log_log@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <ansiseq_dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<termop_dblwidth>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xf67(%rip),%rax
mov    %rax,(%rsp)
lea    0xec6(%rip),%rcx
lea    0xf45(%rip),%r9
mov    $0x7,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
mov    $0xd7,%r8d
xor    %eax,%eax
call   1030 <tnc_log_log@plt>
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <ansiseq_dump@plt>

LLVM IR (-O0):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_dblwidth = [16 x i8] c"termop_dblwidth\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_dblwidth(%struct.ansiseq* %0) {
%2 = alloca %struct.ansiseq*
store %struct.ansiseq* %0, %struct.ansiseq** %2
%3 = call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 215, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.termop_dblwidth, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%4 = load %struct.ansiseq*, %struct.ansiseq** %2
%5 = call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %4)
ret void
}

LLVM IR (-O2):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_dblwidth = [16 x i8] c"termop_dblwidth\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_dblwidth(%struct.ansiseq* %0) {
%2 = tail call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 215, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.termop_dblwidth, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %0)
ret void
}
const char *Sort_Definition(void) {
  return "struct Sort {\n"
         "  void (*sort_by)(var,bool(*f)(var,var));\n"
         "};";
}


x86 assembly (clang, -O0):
<Sort_Definition>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sort_Definition>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [59 x i8] c"struct Sort {\0A void (*sort_by)(var,bool(*f)(var,var));\0A};\00"
define i8* @Sort_Definition() {
ret i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [59 x i8] c"struct Sort {\0A void (*sort_by)(var,bool(*f)(var,var));\0A};\00"
define i8* @Sort_Definition() {
ret i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0)
}
void swap(char *vec[], int i, int j) {
  char *tmp;
  tmp = vec[i];
  vec[i] = vec[j];
  vec[j] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,8),%rcx
movslq %edx,%rdx
mov    (%rdi,%rdx,8),%rsi
mov    %rsi,(%rdi,%rax,8)
mov    %rcx,(%rdi,%rdx,8)
ret

LLVM IR (-O0):
define void @swap(i8** %0, i32 %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8**, i8*** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8*, i8** %8, i64 %10
%12 = load i8*, i8** %11
store i8* %12, i8** %7
%13 = load i8**, i8*** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = load i8**, i8*** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8*, i8** %18, i64 %20
store i8* %17, i8** %21
%22 = load i8*, i8** %7
%23 = load i8**, i8*** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8*, i8** %23, i64 %25
store i8* %22, i8** %26
ret void
}

LLVM IR (-O2):
define void @swap(i8** nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i8*, i8** %0, i64 %4
%6 = load i8*, i8** %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
store i8* %9, i8** %5
store i8* %6, i8** %8
ret void
}
void sg_init_table(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<sg_init_table>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_init_table>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.sg_init_table = [14 x i8] c"sg_init_table\00"
define void @sg_init_table() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.sg_init_table, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.sg_init_table = [14 x i8] c"sg_init_table\00"
define void @sg_init_table() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.sg_init_table, i64 0, i64 0))
ret void
}
int BLAS_char_check_trans(char trans) {
  return trans == 'N' || trans == 'n' || trans == 'T' || trans == 't' ||
         trans == 'C' || trans == 'c';
}


x86 assembly (clang, -O0):
<BLAS_char_check_trans>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x4e,%ecx
mov    %al,-0x2(%rbp)
je     1171 <BLAS_char_check_trans+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x6e,%ecx
mov    %al,-0x2(%rbp)
je     1171 <BLAS_char_check_trans+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x54,%ecx
mov    %al,-0x2(%rbp)
je     1171 <BLAS_char_check_trans+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x74,%ecx
mov    %al,-0x2(%rbp)
je     1171 <BLAS_char_check_trans+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x43,%ecx
mov    %al,-0x2(%rbp)
je     1171 <BLAS_char_check_trans+0x71>
movsbl -0x1(%rbp),%eax
cmp    $0x63,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BLAS_char_check_trans>:
lea    -0x43(%rdi),%ecx
cmp    $0x31,%cl
ja     1121 <BLAS_char_check_trans+0x21>
mov    $0x1,%eax
movzbl %cl,%ecx
movabs $0x2080000020801,%rdx
bt     %rcx,%rdx
jae    1121 <BLAS_char_check_trans+0x21>
ret
xor    %eax,%eax
cmp    $0x63,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @BLAS_char_check_trans(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 78
br i1 %5, label %26, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 110
br i1 %9, label %26, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 84
br i1 %13, label %26, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 116
br i1 %17, label %26, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 67
br i1 %21, label %26, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 99
br label %26
26: ; preds = %22, %18, %14, %10, %6, %1
%27 = phi i1 [ true, %18 ], [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %25, %22 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @BLAS_char_check_trans(i8 signext %0) {
switch i8 %0, label %2 [
i8 116, label %5
i8 110, label %5
i8 84, label %5
i8 78, label %5
i8 67, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 99
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
int test_untagged_bitmask(int val) { return val; }


x86 assembly (clang, -O0):
<test_untagged_bitmask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_untagged_bitmask>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @test_untagged_bitmask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @test_untagged_bitmask(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, unsigned char, unsigned char, unsigned char,
                          unsigned char);
int main(void) {
  unsigned char n = 200;
  unsigned char res = n & (n - 1);
  printf("before: %d (0x%x)\nafter : %d (0x%x)\n", n, n, res, res);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0xc8,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
movzbl -0x5(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %al,-0x6(%rbp)
mov    -0x5(%rbp),%dl
mov    -0x5(%rbp),%cl
mov    -0x6(%rbp),%al
lea    0xebd(%rip),%rdi
movzbl %dl,%esi
movzbl %cl,%edx
movzbl %al,%ecx
movzbl -0x6(%rbp),%r8d
call   1030 <printf@plt>
mov    0x2e83(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xc8,%esi
mov    $0xc8,%edx
mov    $0xc0,%ecx
mov    $0xc0,%r8d
call   1030 <printf@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"before: %d (0x%x)\0Aafter : %d (0x%x)\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
store i8 -56, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = sub nsw i32 %7, 1
%9 = and i32 %5, %8
%10 = trunc i32 %9 to i8
store i8 %10, i8* %3
%11 = load i8, i8* %2
%12 = load i8, i8* %2
%13 = load i8, i8* %3
%14 = load i8, i8* %3
%15 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8 zeroext %11, i8 zeroext %12, i8 zeroext %13, i8 zeroext %14)
%16 = load i32, i32* @EXIT_SUCCESS
ret i32 %16
}

LLVM IR (-O2):
@.str = [37 x i8] c"before: %d (0x%x)\0Aafter : %d (0x%x)\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8 zeroext -56, i8 zeroext -56, i8 zeroext -64, i8 zeroext -64)
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
int a_f() { return 20; }


x86 assembly (clang, -O0):
<a_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_f>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @a_f() {
ret i32 20
}

LLVM IR (-O2):
define i32 @a_f() {
ret i32 20
}
/* Type definitions */
typedef int /*<<< orphan*/ XIMCallback;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XIMCallback(void *_p) {
  if (_p == NULL)
    abort();
  free((XIMCallback *)_p);
}


x86 assembly (clang, -O0):
<free_XIMCallback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XIMCallback+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XIMCallback>:
test   %rdi,%rdi
je     112a <free_XIMCallback+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XIMCallback(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XIMCallback(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Adc_ConfigureMode();
int /*<<< orphan*/ Adc_EnableTemperatureChannel();
int /*<<< orphan*/ Adc_Reset();
int /*<<< orphan*/ Adc_StartTemperatureSensorConversion();
void AdcHardware_Init(void) {
  Adc_Reset();
  Adc_ConfigureMode();
  Adc_EnableTemperatureChannel();
  Adc_StartTemperatureSensorConversion();
}


x86 assembly (clang, -O0):
<AdcHardware_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <Adc_Reset@plt>
mov    $0x0,%al
call   1050 <Adc_ConfigureMode@plt>
mov    $0x0,%al
call   1040 <Adc_EnableTemperatureChannel@plt>
mov    $0x0,%al
call   1030 <Adc_StartTemperatureSensorConversion@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AdcHardware_Init>:
push   %rax
xor    %eax,%eax
call   1060 <Adc_Reset@plt>
xor    %eax,%eax
call   1050 <Adc_ConfigureMode@plt>
xor    %eax,%eax
call   1040 <Adc_EnableTemperatureChannel@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <Adc_StartTemperatureSensorConversion@plt>

LLVM IR (-O0):
define void @AdcHardware_Init() {
%1 = call i32 (...) @Adc_Reset()
%2 = call i32 (...) @Adc_ConfigureMode()
%3 = call i32 (...) @Adc_EnableTemperatureChannel()
%4 = call i32 (...) @Adc_StartTemperatureSensorConversion()
ret void
}

LLVM IR (-O2):
define void @AdcHardware_Init() {
%1 = tail call i32 (...) @Adc_Reset()
%2 = tail call i32 (...) @Adc_ConfigureMode()
%3 = tail call i32 (...) @Adc_EnableTemperatureChannel()
%4 = tail call i32 (...) @Adc_StartTemperatureSensorConversion()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int PATH_MAX;
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ sprintf(char *, char *, int);
FILE *open_pid_stat(int pid) {
  FILE *fp;
  char proc_path[PATH_MAX];
  sprintf(proc_path, "/proc/%d/stat", pid);
  fp = fopen(proc_path, "r");
  return fp;
}


x86 assembly (clang, -O0):
<open_pid_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edx
lea    0xe9f(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x28(%rbp),%rdi
lea    0xe9d(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_pid_stat>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
push   %rax
mov    %edi,%edx
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
lea    0xeb7(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sprintf@plt>
lea    0xeb6(%rip),%rsi
mov    %rbx,%rdi
call   1030 <fopen@plt>
lea    -0x8(%rbp),%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@PATH_MAX = global i32 0
@.str = [14 x i8] c"/proc/%d/stat\00"
@.str.1 = [2 x i8] c"r\00"
define i32* @open_pid_stat(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i64
store i32 %0, i32* %2
%6 = load i32, i32* @PATH_MAX
%7 = zext i32 %6 to i64
%8 = call i8* @llvm.stacksave()
store i8* %8, i8** %4
%9 = alloca i8, i64 %7
store i64 %7, i64* %5
%10 = load i32, i32* %2
%11 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = call i32* @fopen(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %12, i32** %3
%13 = load i32*, i32** %3
%14 = load i8*, i8** %4
ret i32* %13
}

LLVM IR (-O2):
@PATH_MAX = global i32 0
@.str = [14 x i8] c"/proc/%d/stat\00"
@.str.1 = [2 x i8] c"r\00"
define noalias i32* @open_pid_stat(i32 %0) {
%2 = load i32, i32* @PATH_MAX
%3 = zext i32 %2 to i64
%4 = alloca i8, i64 %3
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0)
%6 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32* %6
}
float backIn(float fraction, float start, float delta, float speed) {
  return delta * fraction * fraction * ((speed + 1) * fraction - speed) + start;
}


x86 assembly (clang, -O0):
<backIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  0xed1(%rip),%xmm2
addss  -0x10(%rbp),%xmm2
movss  -0x4(%rbp),%xmm3
movss  -0x10(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm3,%xmm2
addss  %xmm1,%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<backIn>:
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
movss  0xef0(%rip),%xmm4
addss  %xmm3,%xmm4
mulss  %xmm4,%xmm0
subss  %xmm3,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @backIn(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = load float, float* %5
%11 = fmul float %9, %10
%12 = load float, float* %5
%13 = fmul float %11, %12
%14 = load float, float* %8
%15 = fadd float %14, 1.000000e+00
%16 = load float, float* %5
%17 = load float, float* %8
%18 = fneg float %17
%19 = call float @llvm.fmuladd.f32(float %15, float %16, float %18)
%20 = load float, float* %6
%21 = call float @llvm.fmuladd.f32(float %13, float %19, float %20)
ret float %21
}

LLVM IR (-O2):
define float @backIn(float %0, float %1, float %2, float %3) {
%5 = fmul float %0, %2
%6 = fmul float %5, %0
%7 = fadd float %3, 1.000000e+00
%8 = fneg float %3
%9 = tail call float @llvm.fmuladd.f32(float %7, float %0, float %8)
%10 = tail call float @llvm.fmuladd.f32(float %6, float %9, float %1)
ret float %10
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int /*<<< orphan*/ u8_strlen(int /*<<< orphan*/ const *);
int u8_strncmp(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *,
               int /*<<< orphan*/);
int u8_strcmp(const u_int32_t *s1, const u_int32_t *s2) {
  return u8_strncmp(s1, s2, u8_strlen(s2));
}


x86 assembly (clang, -O0):
<u8_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <u8_strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <u8_strncmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8_strcmp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <u8_strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <u8_strncmp@plt>

LLVM IR (-O0):
define i32 @u8_strcmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = load i32*, i32** %4
%8 = call i32 @u8_strlen(i32* %7)
%9 = call i32 @u8_strncmp(i32* %5, i32* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @u8_strcmp(i32* %0, i32* %1) {
%3 = tail call i32 @u8_strlen(i32* %1)
%4 = tail call i32 @u8_strncmp(i32* %0, i32* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ _gets(char *);
void fizz(void) {
  char buf[20];
  _gets(buf);
  return;
}


x86 assembly (clang, -O0):
<fizz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x20(%rbp),%rdi
call   1030 <_gets@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fizz>:
sub    $0x18,%rsp
mov    %rsp,%rdi
call   1030 <_gets@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @fizz() {
%1 = alloca [20 x i8]
%2 = getelementptr inbounds [20 x i8], [20 x i8]* %1, i64 0, i64 0
%3 = call i32 @_gets(i8* %2)
ret void
}

LLVM IR (-O2):
define void @fizz() {
%1 = alloca [20 x i8]
%2 = getelementptr inbounds [20 x i8], [20 x i8]* %1, i64 0, i64 0
%3 = call i32 @_gets(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR3C_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR3C_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR3C_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR3C_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR3C_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}