xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ strcmp(char const *, char const *);
bool sc(const char *strA, const char *strB) { return strcmp(strA, strB) == 0; }


x86 assembly (clang, -O0):
<sc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sc>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @sc(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int pthread_self();
int sesc_self(void) { return pthread_self(); }


x86 assembly (clang, -O0):
<sesc_self>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pthread_self@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_self>:
xor    %eax,%eax
jmp    1030 <pthread_self@plt>

LLVM IR (-O0):
define i32 @sesc_self() {
%1 = call i32 (...) @pthread_self()
ret i32 %1
}

LLVM IR (-O2):
define i32 @sesc_self() {
%1 = tail call i32 (...) @pthread_self()
ret i32 %1
}
void main(void) {
  static const char msg[] = "hello world\r\n";
  char *str;
  char ch;
  str = msg;
  while (1) {
    ch = *str++;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    %al,-0x9(%rbp)
jmp    110f <main+0xf>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
@main.msg = internal constant [14 x i8] c"hello world\0D\0A\00"
define void @main() {
%1 = alloca i8*
%2 = alloca i8
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @main.msg, i64 0, i64 0), i8** %1
br label %3
3: ; preds = %0, %3
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %1
%6 = load i8, i8* %4
store i8 %6, i8* %2
br label %3
}

LLVM IR (-O2):
define void @main() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void radio_df_cte_tx_aod_4us_set(uint8_t cte_len) {}


x86 assembly (clang, -O0):
<radio_df_cte_tx_aod_4us_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_df_cte_tx_aod_4us_set>:
ret

LLVM IR (-O0):
define void @radio_df_cte_tx_aod_4us_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @radio_df_cte_tx_aod_4us_set(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int memcmp(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
int time_cmp(uint8_t *time1, uint8_t *time2) {
  return memcmp(time1, time2, 20);
}


x86 assembly (clang, -O0):
<time_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x14,%edx
call   1030 <memcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_cmp>:
mov    $0x14,%edx
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define i32 @time_cmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @memcmp(i32* %5, i32* %6, i32 20)
ret i32 %7
}

LLVM IR (-O2):
define i32 @time_cmp(i32* %0, i32* %1) {
%3 = tail call i32 @memcmp(i32* %0, i32* %1, i32 20)
ret i32 %3
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void EPIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000210))) &= ~ui32IntFlags;
}


x86 assembly (clang, -O0):
<EPIIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x210(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x210(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIIntDisable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
not    %rax
mov    -0x8(%rsp),%rcx
and    %rax,0x210(%rcx)
ret

LLVM IR (-O0):
define void @EPIIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load volatile i64, i64* %3
%8 = add nsw i64 %7, 528
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @EPIIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load volatile i64, i64* %3
%8 = add nsw i64 %7, 528
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}
/* Variables and functions */
int math_gcd(int, int);
int math_lcm(int a, int b) { return a / math_gcd(a, b) * b; }


x86 assembly (clang, -O0):
<math_lcm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <math_gcd@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
imul   -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_lcm>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <math_gcd@plt>
mov    %eax,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
imul   %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @math_lcm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @math_gcd(i32 %6, i32 %7)
%9 = sdiv i32 %5, %8
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @math_lcm(i32 %0, i32 %1) {
%3 = tail call i32 @math_gcd(i32 %0, i32 %1)
%4 = sdiv i32 %0, %3
%5 = mul nsw i32 %4, %1
ret i32 %5
}
int test_imm_55int64_midword_reg(long long val) {
  return ((val >> 16) & (0x55 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_55int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x55,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_55int64_midword_reg>:
test   $0x550000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_55int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 85
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_55int64_midword_reg(i64 %0) {
%2 = and i64 %0, 5570560
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int sio_aucat_nfds(struct sio_hdl *hdl) { return 1; }


x86 assembly (clang, -O0):
<sio_aucat_nfds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sio_aucat_nfds>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.sio_hdl = type opaque
define i32 @sio_aucat_nfds(%struct.sio_hdl* %0) {
%2 = alloca %struct.sio_hdl*
store %struct.sio_hdl* %0, %struct.sio_hdl** %2
ret i32 1
}

LLVM IR (-O2):
%struct.sio_hdl = type opaque
define i32 @sio_aucat_nfds(%struct.sio_hdl* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct XRayTraceCapture {
  int dummy;
};

/* Variables and functions */
void XRaySetAnnotationFilter(struct XRayTraceCapture *capture,
                             uint32_t filter) {}


x86 assembly (clang, -O0):
<XRaySetAnnotationFilter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<XRaySetAnnotationFilter>:
ret

LLVM IR (-O0):
%struct.XRayTraceCapture = type { i32 }
define void @XRaySetAnnotationFilter(%struct.XRayTraceCapture* %0, i32 %1) {
%3 = alloca %struct.XRayTraceCapture*
%4 = alloca i32
store %struct.XRayTraceCapture* %0, %struct.XRayTraceCapture** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.XRayTraceCapture = type { i32 }
define void @XRaySetAnnotationFilter(%struct.XRayTraceCapture* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XErrorEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
int xerrordummy(Display *dsply, XErrorEvent *ee) { return 0; }


x86 assembly (clang, -O0):
<xerrordummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xerrordummy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xerrordummy(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @xerrordummy(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
void TimerIC1PrescalerSet(unsigned long ulBase, unsigned long ulPrescaler) {

  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000018))) &= ~0x0000000C;
  (*((volatile unsigned long *)(ulBase + 0x00000018))) |= ulPrescaler;
}


x86 assembly (clang, -O0):
<TimerIC1PrescalerSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rcx
and    $0xfffffffffffffff3,%rcx
mov    %rcx,0x18(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerIC1PrescalerSet>:
andq   $0xfffffffffffffff3,0x18(%rdi)
or     %rsi,0x18(%rdi)
ret

LLVM IR (-O0):
define void @TimerIC1PrescalerSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 24
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -13
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 24
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @TimerIC1PrescalerSet(i64 %0, i64 %1) {
%3 = add i64 %0, 24
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -13
store volatile i64 %6, i64* %4
%7 = load volatile i64, i64* %4
%8 = or i64 %7, %1
store volatile i64 %8, i64* %4
ret void
}
void put_long_be(char *cp, long lval) {
  *cp++ = (lval >> 24) & 0xff;
  *cp++ = (lval >> 16) & 0xff;
  *cp++ = (lval >> 8) & 0xff;
  *cp++ = lval & 0xff;
}


x86 assembly (clang, -O0):
<put_long_be>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sar    $0x18,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
sar    $0x10,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
sar    $0x8,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_long_be>:
bswap  %esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @put_long_be(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = ashr i64 %5, 24
%7 = and i64 %6, 255
%8 = trunc i64 %7 to i8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = load i64, i64* %4
%12 = ashr i64 %11, 16
%13 = and i64 %12, 255
%14 = trunc i64 %13 to i8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
%17 = load i64, i64* %4
%18 = ashr i64 %17, 8
%19 = and i64 %18, 255
%20 = trunc i64 %19 to i8
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
store i8 %20, i8* %21
%23 = load i64, i64* %4
%24 = and i64 %23, 255
%25 = trunc i64 %24 to i8
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %3
store i8 %25, i8* %26
ret void
}

LLVM IR (-O2):
define void @put_long_be(i8* nocapture writeonly %0, i64 %1) {
%3 = lshr i64 %1, 24
%4 = trunc i64 %3 to i8
%5 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %4, i8* %0
%6 = lshr i64 %1, 16
%7 = trunc i64 %6 to i8
%8 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %7, i8* %5
%9 = lshr i64 %1, 8
%10 = trunc i64 %9 to i8
%11 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %10, i8* %8
%12 = trunc i64 %1 to i8
store i8 %12, i8* %11
ret void
}
int test_imm_04uint8_reg(unsigned char val) {
  return ((val) & (-0x04 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_04uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xfffffffc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_04uint8_reg>:
cmp    $0x4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_04uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -4
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_04uint8_reg(i8 zeroext %0) {
%2 = icmp ult i8 %0, 4
%3 = select i1 %2, i32 -40, i32 -20
ret i32 %3
}
void pmksa_cache_deinit(struct rsn_pmksa_cache *pmksa) {}


x86 assembly (clang, -O0):
<pmksa_cache_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmksa_cache_deinit>:
ret

LLVM IR (-O0):
%struct.rsn_pmksa_cache = type opaque
define void @pmksa_cache_deinit(%struct.rsn_pmksa_cache* %0) {
%2 = alloca %struct.rsn_pmksa_cache*
store %struct.rsn_pmksa_cache* %0, %struct.rsn_pmksa_cache** %2
ret void
}

LLVM IR (-O2):
%struct.rsn_pmksa_cache = type opaque
define void @pmksa_cache_deinit(%struct.rsn_pmksa_cache* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char, char);
int main() {
  char h, t, c;
  h = 'h';
  t = 't';
  c = 'c';
  printf(" %c\n %c\n %c\n", h, t, c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x68,-0x5(%rbp)
movb   $0x74,-0x6(%rbp)
movb   $0x63,-0x7(%rbp)
mov    -0x5(%rbp),%cl
mov    -0x6(%rbp),%al
lea    0xec8(%rip),%rdi
movsbl %cl,%esi
movsbl %al,%edx
movsbl -0x7(%rbp),%ecx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x68,%esi
mov    $0x74,%edx
mov    $0x63,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c" %c\0A %c\0A %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i32 0, i32* %1
store i8 104, i8* %2
store i8 116, i8* %3
store i8 99, i8* %4
%5 = load i8, i8* %2
%6 = load i8, i8* %3
%7 = load i8, i8* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8 signext %5, i8 signext %6, i8 signext %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c" %c\0A %c\0A %c\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8 signext 104, i8 signext 116, i8 signext 99)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FTSENT;

/* Variables and functions */
int statcmp(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *);
int revstatcmp(const FTSENT *a, const FTSENT *b) { return (statcmp(b, a)); }


x86 assembly (clang, -O0):
<revstatcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <statcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<revstatcmp>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <statcmp@plt>

LLVM IR (-O0):
define i32 @revstatcmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32*, i32** %3
%7 = call i32 @statcmp(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @revstatcmp(i32* %0, i32* %1) {
%3 = tail call i32 @statcmp(i32* %1, i32* %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xeb() {
  Assert_real((isalpha(235) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1180, ("isalpha should be 0 for 0xeb"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xeb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xeb,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x49c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xeb>:
push   %rax
mov    $0xeb,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x49c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xeb\00"
define void @t_isalpha_0xeb() {
%1 = call i64 @isalpha(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xeb\00"
define void @t_isalpha_0xeb() {
%1 = tail call i64 @isalpha(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_0Cuint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x0C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Cuint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Cuint64_midword_mem>:
testb  $0xc,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Cuint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 12
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Cuint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 786432
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ shex8(char *, char *, int);
void print_hex(char *str, int arg) {
  char buf[9];
  puts(str);
  puts(" ");
  shex8(buf, &buf[9], arg);
  buf[8] = '\0';
  puts(buf);
  puts("\n");
}


x86 assembly (clang, -O0):
<print_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
lea    -0x15(%rbp),%rdi
lea    -0x15(%rbp),%rsi
add    $0x9,%rsi
mov    -0xc(%rbp),%edx
call   1040 <shex8@plt>
movb   $0x0,-0xd(%rbp)
lea    -0x15(%rbp),%rdi
call   1030 <puts@plt>
lea    0xe96(%rip),%rdi
call   1030 <puts@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hex>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %esi,%ebx
call   1030 <puts@plt>
lea    0xecb(%rip),%rdi
call   1030 <puts@plt>
lea    0x18(%rsp),%rsi
lea    0xf(%rsp),%r14
mov    %r14,%rdi
mov    %ebx,%edx
call   1040 <shex8@plt>
movb   $0x0,0x17(%rsp)
mov    %r14,%rdi
call   1030 <puts@plt>
lea    0xea0(%rip),%rdi
call   1030 <puts@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_hex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [9 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @puts(i8* %6)
%8 = call i32 @puts(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%9 = getelementptr inbounds [9 x i8], [9 x i8]* %5, i64 0, i64 0
%10 = getelementptr inbounds [9 x i8], [9 x i8]* %5, i64 0, i64 9
%11 = load i32, i32* %4
%12 = call i32 @shex8(i8* %9, i8* %10, i32 %11)
%13 = getelementptr inbounds [9 x i8], [9 x i8]* %5, i64 0, i64 8
store i8 0, i8* %13
%14 = getelementptr inbounds [9 x i8], [9 x i8]* %5, i64 0, i64 0
%15 = call i32 @puts(i8* %14)
%16 = call i32 @puts(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_hex(i8* nocapture %0, i32 %1) {
%3 = alloca [9 x i8]
%4 = getelementptr inbounds [9 x i8], [9 x i8]* %3, i64 0, i64 0
%5 = tail call i32 @puts(i8* dereferenceable(1) %0)
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = getelementptr inbounds [9 x i8], [9 x i8]* %3, i64 0, i64 9
%8 = call i32 @shex8(i8* %4, i8* %7, i32 %1)
%9 = getelementptr inbounds [9 x i8], [9 x i8]* %3, i64 0, i64 8
store i8 0, i8* %9
%10 = call i32 @puts(i8* %4)
%11 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void av_timecode_init() {}


x86 assembly (clang, -O0):
<av_timecode_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_timecode_init>:
ret

LLVM IR (-O0):
define void @av_timecode_init() {
ret void
}

LLVM IR (-O2):
define void @av_timecode_init() {
ret void
}
void zc_sb_v0_byteswap(struct zc_sb_v0 *const sb __attribute__((unused))) {}


x86 assembly (clang, -O0):
<zc_sb_v0_byteswap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zc_sb_v0_byteswap>:
ret

LLVM IR (-O0):
%struct.zc_sb_v0 = type opaque
define void @zc_sb_v0_byteswap(%struct.zc_sb_v0* %0) {
%2 = alloca %struct.zc_sb_v0*
store %struct.zc_sb_v0* %0, %struct.zc_sb_v0** %2
ret void
}

LLVM IR (-O2):
%struct.zc_sb_v0 = type opaque
define void @zc_sb_v0_byteswap(%struct.zc_sb_v0* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ panic(char *);
void nmi_trap(void) { panic("exception(trap): non maskable interrupt"); }


x86 assembly (clang, -O0):
<nmi_trap>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <panic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmi_trap>:
lea    0xee9(%rip),%rdi
jmp    1030 <panic@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"exception(trap): non maskable interrupt\00"
define void @nmi_trap() {
%1 = call i32 @panic(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c"exception(trap): non maskable interrupt\00"
define void @nmi_trap() {
%1 = tail call i32 @panic(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *taplog_utf8_to_local(const char *str) {
  char *ret = NULL;
  return ret;
}


x86 assembly (clang, -O0):
<taplog_utf8_to_local>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<taplog_utf8_to_local>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @taplog_utf8_to_local(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %3
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @taplog_utf8_to_local(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int read(int /*<<< orphan*/, char *, int);
int ttgetc(void) {
  char buf[1];
  while (read(0, &buf[0], 1) != 1)
    ;
  return (buf[0] & 0xFF);
}


x86 assembly (clang, -O0):
<ttgetc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x1(%rbp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0x1,%eax
je     1136 <ttgetc+0x26>
jmp    1118 <ttgetc+0x8>
movsbl -0x1(%rbp),%eax
and    $0xff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ttgetc>:
push   %rbx
sub    $0x10,%rsp
lea    0xf(%rsp),%rbx
nopw   0x0(%rax,%rax,1)
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0x1,%eax
jne    1120 <ttgetc+0x10>
movzbl 0xf(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ttgetc() {
%1 = alloca [1 x i8]
br label %2
2: ; preds = %6, %0
%3 = getelementptr inbounds [1 x i8], [1 x i8]* %1, i64 0, i64 0
%4 = call i32 @read(i32 0, i8* %3, i32 1)
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
%8 = getelementptr inbounds [1 x i8], [1 x i8]* %1, i64 0, i64 0
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = and i32 %10, 255
ret i32 %11
}

LLVM IR (-O2):
define i32 @ttgetc() {
%1 = alloca [1 x i8]
%2 = getelementptr inbounds [1 x i8], [1 x i8]* %1, i64 0, i64 0
br label %3
3: ; preds = %3, %0
%4 = call i32 @read(i32 0, i8* %2, i32 1)
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
ret i32 %8
}
/* Variables and functions */
int __syscall(int, char const *, char const *);
int symlink(const char *link, const char *new) {
  return __syscall(88, link, new);
}


x86 assembly (clang, -O0):
<symlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x58,%edi
call   1030 <__syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<symlink>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x58,%edi
jmp    1030 <__syscall@plt>

LLVM IR (-O0):
define i32 @symlink(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @__syscall(i32 88, i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @symlink(i8* %0, i8* %1) {
%3 = tail call i32 @__syscall(i32 88, i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void *realloc(void *, size_t);
void *realloc_trap(void *ptr, size_t malloc_size) {
  void *ret = realloc(ptr, malloc_size);
  if (!ret) {
    perror("err: realloc_trap: \n");
    exit(EXIT_FAILURE);
  }
  return ret;
}


x86 assembly (clang, -O0):
<realloc_trap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1176 <realloc_trap+0x46>
lea    0xe9d(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e71(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realloc_trap>:
push   %rax
call   1030 <realloc@plt>
test   %rax,%rax
je     113d <realloc_trap+0xd>
pop    %rcx
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"err: realloc_trap: \0A\00"
@EXIT_FAILURE = global i32 0
define i8* @realloc_trap(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %15, label %11
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* @EXIT_FAILURE
%14 = call i32 @exit(i32 %13)
unreachable
15: ; preds = %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@.str = [21 x i8] c"err: realloc_trap: \0A\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @realloc_trap(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %2
ret i8* %3
}
void kol_btn_type(unsigned t) {
  asm volatile("int $0x40" ::"a"(48), "b"(1), "c"(t));
}


x86 assembly (clang, -O0):
<kol_btn_type>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x30,%eax
mov    $0x1,%ebx
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_btn_type>:
push   %rbx
mov    %edi,%ecx
mov    $0x30,%eax
mov    $0x1,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_btn_type(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @kol_btn_type(i32 %0) {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 48, i32 1, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: string2mem [options] <string>\n"
                  "-o Offset in Bytes\n"
                  "-f Filename for output file\n"
                  "-d Prepend seconds since 1970-01-01 00:00:00 +0000 (UTC)"
                  " as uint32_t\n"
                  "-w Width in Bytes\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [172 x i8] c"Usage: string2mem [options] <string>\0A-o Offset in Bytes\0A-f Filename for output file\0A-d Prepend seconds since 1970-01-01 00:00:00 +0000 (UTC) as uint32_t\0A-w Width in Bytes\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([172 x i8], [172 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [172 x i8] c"Usage: string2mem [options] <string>\0A-o Offset in Bytes\0A-f Filename for output file\0A-d Prepend seconds since 1970-01-01 00:00:00 +0000 (UTC) as uint32_t\0A-w Width in Bytes\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([172 x i8], [172 x i8]* @.str, i64 0, i64 0))
ret void
}
int SDL_imageFilterClipToRangeMMX(unsigned char *Src1, unsigned char *Dest,
                                  int length, unsigned char Tmin,
                                  unsigned char Tmax) {
  return (0);
}


x86 assembly (clang, -O0):
<SDL_imageFilterClipToRangeMMX>:
push   %rbp
mov    %rsp,%rbp
mov    %r8b,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %cl,-0x15(%rbp)
mov    %al,-0x16(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_imageFilterClipToRangeMMX>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @SDL_imageFilterClipToRangeMMX(i8* %0, i8* %1, i32 %2, i8 zeroext %3, i8 zeroext %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8 %3, i8* %9
store i8 %4, i8* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @SDL_imageFilterClipToRangeMMX(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8 zeroext %3, i8 zeroext %4) {
ret i32 0
}
int test_imm_6Cuint16_mem(unsigned short *val) {
  return ((*val) & (0x6C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Cuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x6c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Cuint16_mem>:
testb  $0x6c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Cuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 108
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Cuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 108
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int eat(int c) {
  int i;
  while ((i = ((getch()) & 0x1FFFF)) != c && i != '\n')
    ;
  return (i);
}


x86 assembly (clang, -O0):
<eat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getch@plt>
mov    %eax,%ecx
and    $0x1ffff,%ecx
mov    %ecx,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%ecx
mov    %al,-0x9(%rbp)
je     1145 <eat+0x35>
cmpl   $0xa,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1155 <eat+0x45>
jmp    115a <eat+0x4a>
jmp    111b <eat+0xb>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eat>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <getch@plt>
and    $0x1ffff,%eax
cmp    %ebx,%eax
je     1135 <eat+0x25>
cmp    $0xa,%eax
jne    1120 <eat+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @eat(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %14, %1
%5 = call i32 (...) @getch()
%6 = and i32 %5, 131071
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = icmp ne i32 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = icmp ne i32 %10, 10
br label %12
12: ; preds = %9, %4
%13 = phi i1 [ false, %4 ], [ %11, %9 ]
br i1 %13, label %14, label %15
14: ; preds = %12
br label %4
15: ; preds = %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @eat(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 (...) @getch()
%4 = and i32 %3, 131071
%5 = icmp ne i32 %4, %0
%6 = icmp ne i32 %4, 10
%7 = and i1 %5, %6
br i1 %7, label %2, label %8
8: ; preds = %2
ret i32 %4
}
void spin_cpu_spinwait() {
  volatile int x = 0;
  x = x;
}


x86 assembly (clang, -O0):
<spin_cpu_spinwait>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spin_cpu_spinwait>:
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
mov    %eax,-0x4(%rsp)
ret

LLVM IR (-O0):
define void @spin_cpu_spinwait() {
%1 = alloca i32
store volatile i32 0, i32* %1
%2 = load volatile i32, i32* %1
store volatile i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @spin_cpu_spinwait() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 0, i32* %1
%3 = load volatile i32, i32* %1
store volatile i32 %3, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ read(int, char *, int);
void generate_random_str(char *buf, int len) {
  int fd;
  fd = open("/dev/urandom", O_RDONLY);
  read(fd, buf, len);
  close(fd);
}


x86 assembly (clang, -O0):
<generate_random_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%esi
lea    0xeb1(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <read@plt>
mov    -0x10(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_random_str>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
mov    0x2ea7(%rip),%rax
mov    (%rax),%esi
lea    0xeb6(%rip),%rdi
call   1050 <open@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1040 <read@plt>
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <close@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"/dev/urandom\00"
@O_RDONLY = global i32 0
define void @generate_random_str(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* @O_RDONLY
%7 = call i32 @open(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 @read(i32 %8, i8* %9, i32 %10)
%12 = load i32, i32* %5
%13 = call i32 @close(i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"/dev/urandom\00"
@O_RDONLY = global i32 0
define void @generate_random_str(i8* nocapture %0, i32 %1) {
%3 = load i32, i32* @O_RDONLY
%4 = tail call i32 @open(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @read(i32 %4, i8* %0, i32 %1)
%6 = tail call i32 @close(i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("Pierwszy program");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Pierwszy program\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Pierwszy program\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void do_first(int *arr) {
  int x = arr[0];
  arr[0] = 3;
}


x86 assembly (clang, -O0):
<do_first>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x3,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_first>:
movl   $0x3,(%rdi)
ret

LLVM IR (-O0):
define void @do_first(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 3, i32* %8
ret void
}

LLVM IR (-O2):
define void @do_first(i32* nocapture writeonly %0) {
store i32 3, i32* %0
ret void
}
unsigned int extcss3_char_len(char c) {
  unsigned int i = 7, j = 0;
  while ((i >= 0) && ((c >> i) & 1)) {
    i--;
    j++;
  }
  return (j == 0 ? 1 : j);
}


x86 assembly (clang, -O0):
<extcss3_char_len>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x7,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jb     113c <extcss3_char_len+0x3c>
movsbl -0x1(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    114c <extcss3_char_len+0x4c>
jmp    1163 <extcss3_char_len+0x63>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1118 <extcss3_char_len+0x18>
cmpl   $0x0,-0xc(%rbp)
jne    117a <extcss3_char_len+0x7a>
mov    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1180 <extcss3_char_len+0x80>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<extcss3_char_len>:
test   $0x80,%dil
je     1125 <extcss3_char_len+0x25>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
lea    0x6(%rax),%ecx
movzbl %cl,%ecx
add    $0xffffffff,%eax
bt     %ecx,%edi
jb     1110 <extcss3_char_len+0x10>
test   %eax,%eax
je     1125 <extcss3_char_len+0x25>
neg    %eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @extcss3_char_len(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 7, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = icmp uge i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = load i32, i32* %3
%12 = ashr i32 %10, %11
%13 = and i32 %12, 1
%14 = icmp ne i32 %13, 0
br label %15
15: ; preds = %8, %5
%16 = phi i1 [ false, %5 ], [ %14, %8 ]
br i1 %16, label %17, label %22
17: ; preds = %15
%18 = load i32, i32* %3
%19 = add i32 %18, -1
store i32 %19, i32* %3
%20 = load i32, i32* %4
%21 = add i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %15
%23 = load i32, i32* %4
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22
br label %28
26: ; preds = %22
%27 = load i32, i32* %4
br label %28
28: ; preds = %26, %25
%29 = phi i32 [ 1, %25 ], [ %27, %26 ]
ret i32 %29
}

LLVM IR (-O2):
define i32 @extcss3_char_len(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, 128
%4 = icmp eq i32 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %9, %5 ], [ 0, %1 ]
%7 = phi i32 [ %8, %5 ], [ 7, %1 ]
%8 = add i32 %7, -1
%9 = add i32 %6, 1
%10 = shl nuw i32 1, %8
%11 = and i32 %10, %2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = icmp eq i32 %9, 0
br i1 %14, label %15, label %16
15: ; preds = %1, %13
br label %16
16: ; preds = %13, %15
%17 = phi i32 [ 1, %15 ], [ %9, %13 ]
ret i32 %17
}
int obterMeses(float anos) { return (anos - (int)anos) / (1.0f / 12.0f) + 1; }


x86 assembly (clang, -O0):
<obterMeses>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvttss2si -0x4(%rbp),%eax
cvtsi2ss %eax,%xmm1
subss  %xmm1,%xmm0
movss  0xee1(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xed1(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<obterMeses>:
cvttps2dq %xmm0,%xmm1
cvtdq2ps %xmm1,%xmm1
subss  %xmm1,%xmm0
divss  0xeed(%rip),%xmm0
addss  0xee9(%rip),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @obterMeses(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fptosi float %4 to i32
%6 = sitofp i32 %5 to float
%7 = fsub float %3, %6
%8 = fdiv float %7, 0x3FB5555560000000
%9 = fadd float %8, 1.000000e+00
%10 = fptosi float %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @obterMeses(float %0) {
%2 = fptosi float %0 to i32
%3 = sitofp i32 %2 to float
%4 = fsub float %0, %3
%5 = fdiv float %4, 0x3FB5555560000000
%6 = fadd float %5, 1.000000e+00
%7 = fptosi float %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ test4_asynccancel();
int /*<<< orphan*/ test4_cancelation();
int /*<<< orphan*/ test4_cleanup();
int /*<<< orphan*/ test4_thread_exit();
int /*<<< orphan*/ write(int, char *, int);
void test4() {
  write(1, "\nTEST 4: cancelation & cleanup:\n\n",
        sizeof("\nTEST 4: cancelation & cleanup:\n\n") - 1);
  test4_thread_exit();
  test4_cleanup();
  test4_cancelation();
  test4_asynccancel();
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xea0(%rip),%rsi
mov    $0x21,%edx
call   1030 <write@plt>
mov    $0x0,%al
call   1050 <test4_thread_exit@plt>
mov    $0x0,%al
call   1060 <test4_cleanup@plt>
mov    $0x0,%al
call   1040 <test4_cancelation@plt>
mov    $0x0,%al
call   1070 <test4_asynccancel@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
push   %rax
lea    0xea8(%rip),%rsi
mov    $0x1,%edi
mov    $0x21,%edx
call   1030 <write@plt>
xor    %eax,%eax
call   1050 <test4_thread_exit@plt>
xor    %eax,%eax
call   1060 <test4_cleanup@plt>
xor    %eax,%eax
call   1040 <test4_cancelation@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <test4_asynccancel@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"\0ATEST 4: cancelation & cleanup:\0A\0A\00"
define void @test4() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 33)
%2 = call i32 (...) @test4_thread_exit()
%3 = call i32 (...) @test4_cleanup()
%4 = call i32 (...) @test4_cancelation()
%5 = call i32 (...) @test4_asynccancel()
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"\0ATEST 4: cancelation & cleanup:\0A\0A\00"
define void @test4() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 33)
%2 = tail call i32 (...) @test4_thread_exit()
%3 = tail call i32 (...) @test4_cleanup()
%4 = tail call i32 (...) @test4_cancelation()
%5 = tail call i32 (...) @test4_asynccancel()
ret void
}
int ShowApps() { return 0; }


x86 assembly (clang, -O0):
<ShowApps>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShowApps>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ShowApps() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ShowApps() {
ret i32 0
}
int test_imm_B7uint8_mem(unsigned char *val) {
  return ((*val) & (0xB7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B7uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xb7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B7uint8_mem>:
testb  $0xb7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B7uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 183
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B7uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -73
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}