xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ stderr;
int eassert_function(int fact, int line, char *fact_text) {
  if (!fact) {
    fprintf(stderr, "assertion failed, line %d: %s\n", line, fact_text);
    exit(1);
  } else
    return 0;
}


x86 assembly (clang, -O0):
<eassert_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1162 <eassert_function+0x42>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    0xead(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eassert_function>:
test   %edi,%edi
je     1127 <eassert_function+0x7>
xor    %eax,%eax
ret
push   %rax
mov    %rdx,%rcx
mov    %esi,%edx
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"assertion failed, line %d: %s\0A\00"
define i32 @eassert_function(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = load i32, i32* @stderr
%11 = load i32, i32* %5
%12 = load i8*, i8** %6
%13 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %12)
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"assertion failed, line %d: %s\0A\00"
define i32 @eassert_function(i32 %0, i32 %1, i8* %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %2)
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %3
ret i32 0
}
int is_ordering_error(int ordering) {
  return (((ordering) ==
           (((int)-(((int)0x37ED)
                    << (8 * (((!!(((!!(sizeof(int))) * ((sizeof(int)) - 1)))) *
                              ((((!!(sizeof(int))) * ((sizeof(int)) - 1))) -
                               1)))))))) ||
          ((ordering) ==
           (((int)-(((int)0x37EE)
                    << (8 * (((!!(((!!(sizeof(int))) * ((sizeof(int)) - 1)))) *
                              ((((!!(sizeof(int))) * ((sizeof(int)) - 1))) -
                               1)))))))));
}


x86 assembly (clang, -O0):
<is_ordering_error>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xc8130000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1126 <is_ordering_error+0x26>
cmpl   $0xc8120000,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ordering_error>:
and    $0xfffeffff,%edi
xor    %eax,%eax
cmp    $0xc8120000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_ordering_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -938278912
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, -938344448
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_ordering_error(i32 %0) {
%2 = and i32 %0, -65537
%3 = icmp eq i32 %2, -938344448
%4 = zext i1 %3 to i32
ret i32 %4
}
short *test_func_03(short *p, int c) {
  *--p = (short)c;
  *--p = (short)c;
  *--p = (short)c;
  return p;
}


x86 assembly (clang, -O0):
<test_func_03>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0xfffffffffffffffe,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cx,-0x2(%rax)
mov    -0xc(%rbp),%eax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0xfffffffffffffffe,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cx,-0x2(%rax)
mov    -0xc(%rbp),%eax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0xfffffffffffffffe,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cx,-0x2(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_func_03>:
mov    %si,-0x2(%rdi)
mov    %si,-0x4(%rdi)
mov    %si,-0x6(%rdi)
lea    -0x6(%rdi),%rax
ret

LLVM IR (-O0):
define i16* @test_func_03(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = trunc i32 %5 to i16
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i32 -1
store i16* %8, i16** %3
store i16 %6, i16* %8
%9 = load i32, i32* %4
%10 = trunc i32 %9 to i16
%11 = load i16*, i16** %3
%12 = getelementptr inbounds i16, i16* %11, i32 -1
store i16* %12, i16** %3
store i16 %10, i16* %12
%13 = load i32, i32* %4
%14 = trunc i32 %13 to i16
%15 = load i16*, i16** %3
%16 = getelementptr inbounds i16, i16* %15, i32 -1
store i16* %16, i16** %3
store i16 %14, i16* %16
%17 = load i16*, i16** %3
ret i16* %17
}

LLVM IR (-O2):
define i16* @test_func_03(i16* writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i16
%4 = getelementptr inbounds i16, i16* %0, i64 -1
store i16 %3, i16* %4
%5 = getelementptr inbounds i16, i16* %0, i64 -2
store i16 %3, i16* %5
%6 = getelementptr inbounds i16, i16* %0, i64 -3
store i16 %3, i16* %6
ret i16* %6
}
/* Variables and functions */
int /*<<< orphan*/ byte_reverse_int(int *);
void chibord_(int *inarr, int *num) {
  int *ip;
  int k;
  ip = inarr;
  for (k = 0; k < *num; k++, ip++)
    byte_reverse_int(ip);
}


x86 assembly (clang, -O0):
<chibord_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
jge    1161 <chibord_+0x51>
mov    -0x18(%rbp),%rdi
call   1030 <byte_reverse_int@plt>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
jmp    112f <chibord_+0x1f>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chibord_>:
push   %rbp
push   %r14
push   %rbx
cmpl   $0x0,(%rsi)
jle    1144 <chibord_+0x34>
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <byte_reverse_int@plt>
add    $0x1,%ebp
add    $0x4,%rbx
cmp    (%r14),%ebp
jl     1130 <chibord_+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @chibord_(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
store i32* %7, i32** %5
store i32 0, i32* %6
br label %8
8: ; preds = %16, %2
%9 = load i32, i32* %6
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %21
13: ; preds = %8
%14 = load i32*, i32** %5
%15 = call i32 @byte_reverse_int(i32* %14)
br label %16
16: ; preds = %13
%17 = load i32, i32* %6
%18 = add nsw i32 %17, 1
store i32 %18, i32* %6
%19 = load i32*, i32** %5
%20 = getelementptr inbounds i32, i32* %19, i32 1
store i32* %20, i32** %5
br label %8
21: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @chibord_(i32* %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %13
5: ; preds = %2, %5
%6 = phi i32 [ %9, %5 ], [ 0, %2 ]
%7 = phi i32* [ %10, %5 ], [ %0, %2 ]
%8 = tail call i32 @byte_reverse_int(i32* %7)
%9 = add nuw nsw i32 %6, 1
%10 = getelementptr inbounds i32, i32* %7, i64 1
%11 = load i32, i32* %1
%12 = icmp slt i32 %9, %11
br i1 %12, label %5, label %13
13: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_XCPU(int /*<<< orphan*/);
int gen_XCPU() {
  handle_XCPU(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_XCPU>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_XCPU@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_XCPU>:
push   %rax
xor    %edi,%edi
call   1030 <handle_XCPU@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_XCPU() {
%1 = call i32 @handle_XCPU(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_XCPU() {
%1 = tail call i32 @handle_XCPU(i32 0)
ret i32 0
}
int isFive2(int a) {
  int toReturn = (a == 5) ? 1 : 0;
  return toReturn;
}


x86 assembly (clang, -O0):
<isFive2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x5,%edx
cmove  %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isFive2>:
xor    %eax,%eax
cmp    $0x5,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isFive2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 5
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @isFive2(i32 %0) {
%2 = icmp eq i32 %0, 5
%3 = zext i1 %2 to i32
ret i32 %3
}
void rop3_194_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = *D | S;
  stk3 = ~stk3;
  stk2 = T | stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_194_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_194_1_0>:
not    %dl
or     %sil,%dl
and    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_194_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = xor i32 %18, -1
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %9
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %8
%27 = load i8, i8* %5
%28 = zext i8 %27 to i32
%29 = load i8, i8* %8
%30 = zext i8 %29 to i32
%31 = xor i32 %28, %30
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = trunc i32 %35 to i8
store i8 %36, i8* %7
%37 = load i8, i8* %7
%38 = zext i8 %37 to i32
%39 = load i8, i8* %5
%40 = zext i8 %39 to i32
%41 = xor i32 %40, -1
%42 = and i32 %38, %41
%43 = load i8*, i8** %4
%44 = load i8, i8* %43
%45 = zext i8 %44 to i32
%46 = load i8, i8* %5
%47 = zext i8 %46 to i32
%48 = and i32 %45, %47
%49 = or i32 %42, %48
%50 = trunc i32 %49 to i8
%51 = load i8*, i8** %4
store i8 %50, i8* %51
ret void
}

LLVM IR (-O2):
define void @rop3_194_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %2, -1
%6 = or i8 %5, %1
%7 = and i8 %4, %6
store i8 %7, i8* %0
ret void
}
void GPIOPinWrite(unsigned int baseAdd, unsigned int pinNumber,
                  unsigned int pinValue) {
  if ((0x1) == pinValue) {
    (*((volatile unsigned int *)(baseAdd + (0x194)))) = (1 << pinNumber);
  } else {
    (*((volatile unsigned int *)(baseAdd + (0x190)))) = (1 << pinNumber);
  }
}


x86 assembly (clang, -O0):
<GPIOPinWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x1,%eax
cmp    -0xc(%rbp),%eax
jne    1138 <GPIOPinWrite+0x38>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x194,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
jmp    1150 <GPIOPinWrite+0x50>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x190,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinWrite>:
mov    %esi,%ecx
xor    %eax,%eax
cmp    $0x1,%edx
sete   %al
mov    $0x1,%edx
shl    %cl,%edx
lea    (%rdi,%rax,4),%eax
add    $0x190,%eax
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPIOPinWrite(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 1, %7
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load i32, i32* %5
%11 = shl i32 1, %10
%12 = load i32, i32* %4
%13 = add i32 %12, 404
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
store volatile i32 %11, i32* %15
br label %23
16: ; preds = %3
%17 = load i32, i32* %5
%18 = shl i32 1, %17
%19 = load i32, i32* %4
%20 = add i32 %19, 400
%21 = zext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 %18, i32* %22
br label %23
23: ; preds = %16, %9
ret void
}

LLVM IR (-O2):
define void @GPIOPinWrite(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 1
%5 = shl nuw i32 1, %1
%6 = select i1 %4, i32 404, i32 400
%7 = add i32 %6, %0
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}
void test_init(void) {}


x86 assembly (clang, -O0):
<test_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_init>:
ret

LLVM IR (-O0):
define void @test_init() {
ret void
}

LLVM IR (-O2):
define void @test_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_bar(int number) {
  int i = 0;
  for (i = 0; i < number; i++) {
    printf("#");
  }
}


x86 assembly (clang, -O0):
<print_bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114f <print_bar+0x3f>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <print_bar+0x19>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_bar>:
push   %rbx
test   %edi,%edi
jle    112f <print_bar+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x23,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <print_bar+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"#\00"
define void @print_bar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @print_bar(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @putchar(i32 35)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
void ss_init(void) {}


x86 assembly (clang, -O0):
<ss_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ss_init>:
ret

LLVM IR (-O0):
define void @ss_init() {
ret void
}

LLVM IR (-O2):
define void @ss_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ closelog();
void log_deinit_syslog(void) { closelog(); }


x86 assembly (clang, -O0):
<log_deinit_syslog>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <closelog@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_deinit_syslog>:
xor    %eax,%eax
jmp    1030 <closelog@plt>

LLVM IR (-O0):
define void @log_deinit_syslog() {
%1 = call i32 (...) @closelog()
ret void
}

LLVM IR (-O2):
define void @log_deinit_syslog() {
%1 = tail call i32 (...) @closelog()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_version(void) {
  printf("fosread-"
         "0.4.0"
         "\n");
}


x86 assembly (clang, -O0):
<print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"fosread-0.4.0\0A\00"
define void @print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"fosread-0.4.0\00"
define void @print_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
long long ticks2nano(long long count) { return count; }


x86 assembly (clang, -O0):
<ticks2nano>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ticks2nano>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ticks2nano(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @ticks2nano(i64 returned %0) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ e_dec();
int /*<<< orphan*/ e_writeback();
int /*<<< orphan*/ e_zpx();
void e_dec_zpx() {
  e_zpx();
  e_dec();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_dec_zpx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <e_zpx@plt>
mov    $0x0,%al
call   1050 <e_dec@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_dec_zpx>:
push   %rax
xor    %eax,%eax
call   1040 <e_zpx@plt>
xor    %eax,%eax
call   1050 <e_dec@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_dec_zpx() {
%1 = call i32 (...) @e_zpx()
%2 = call i32 (...) @e_dec()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_dec_zpx() {
%1 = tail call i32 (...) @e_zpx()
%2 = tail call i32 (...) @e_dec()
%3 = tail call i32 (...) @e_writeback()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void print_vals(const void *key, const void *value) {
  char *key_str = (char *)key;
  char *value_str = (char *)value;
  printf("%s: %s\n", key_str, value_str);
}


x86 assembly (clang, -O0):
<print_vals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_vals>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
define void @print_vals(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
define void @print_vals(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int g(int);
int f(int n) {
  if (n <= 1)
    return 1;
  else
    return g(n - 1) + f(n - 2);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1141 <f+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1164 <f+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1040 <g@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <f@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1145 <f+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <g@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <f+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @g(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @f(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @g(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ move_eof();
void cmd_eof(const char *pf, char **args) { move_eof(); }


x86 assembly (clang, -O0):
<cmd_eof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <move_eof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_eof>:
xor    %eax,%eax
jmp    1030 <move_eof@plt>

LLVM IR (-O0):
define void @cmd_eof(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = call i32 (...) @move_eof()
ret void
}

LLVM IR (-O2):
define void @cmd_eof(i8* nocapture readnone %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @move_eof()
ret void
}
int test_imm_70int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x70,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70int64_highword_mem>:
testb  $0x70,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 112
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_70int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 481036337152
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
scalar_t__ test_scanf();
int main(int argc, char *argv[]) {
  int res = 0;
  res += test_scanf();
  return res;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x0,%al
call   1030 <test_scanf@plt>
mov    %rax,%rcx
movslq -0x14(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <test_scanf@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = call i64 (...) @test_scanf()
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = add nsw i64 %9, %7
%11 = trunc i64 %10 to i32
store i32 %11, i32* %6
%12 = load i32, i32* %6
ret i32 %12
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @test_scanf()
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, char, size_t);
void *calloc(size_t nmemb, size_t size) {
  void *ptr;
  ptr = malloc(nmemb * size);
  if (ptr)
    memset(ptr, '\0', nmemb * size);
  return ptr;
}


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1161 <calloc+0x41>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
imul   -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %rax,%rax
je     1148 <calloc+0x28>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = mul i64 %6, %7
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %18
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = mul i64 %14, %15
%17 = call i32 @memset(i8* %13, i8 signext 0, i64 %16)
br label %18
18: ; preds = %12, %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @memset(i8* %4, i8 signext 0, i64 %3)
br label %8
8: ; preds = %6, %2
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int main(int argc, char **argv) {
  char x[8] = "abc";
  memset(x, argc, strlen(x));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xec3(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    %eax,%edx
call   1040 <memset@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
movq   $0x636261,(%rsp)
mov    %rsp,%r14
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1040 <memset@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.main.x = [8 x i8] c"abc\00\00\00\00\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [8 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [8 x i8]* %6 to i8*
%8 = getelementptr inbounds [8 x i8], [8 x i8]* %6, i64 0, i64 0
%9 = load i32, i32* %4
%10 = getelementptr inbounds [8 x i8], [8 x i8]* %6, i64 0, i64 0
%11 = call i32 @strlen(i8* %10)
%12 = call i32 @memset(i8* %8, i32 %9, i32 %11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 6513249, i64* %3
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @memset(i8* %4, i32 %0, i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ myclock(int);
void mywrapper() { myclock(100); }


x86 assembly (clang, -O0):
<mywrapper>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
call   1030 <myclock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywrapper>:
mov    $0x64,%edi
jmp    1030 <myclock@plt>

LLVM IR (-O0):
define void @mywrapper() {
%1 = call i32 @myclock(i32 100)
ret void
}

LLVM IR (-O2):
define void @mywrapper() {
%1 = tail call i32 @myclock(i32 100)
ret void
}
/* Variables and functions */
void *calloc(size_t, size_t);
void *jv_mem_calloc_unguarded(size_t nemb, size_t sz) {
  return calloc(nemb, sz);
}


x86 assembly (clang, -O0):
<jv_mem_calloc_unguarded>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jv_mem_calloc_unguarded>:
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @jv_mem_calloc_unguarded(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @calloc(i64 %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @jv_mem_calloc_unguarded(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *);
int realloc_ptr(void *, size_t, size_t, size_t);
void xrealloc_ptr(void *p, size_t nmemb, size_t size, size_t head) {
  if (realloc_ptr(p, nmemb, size, head) == -1) {
    err(1, "realloc");
  }
}


x86 assembly (clang, -O0):
<xrealloc_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <realloc_ptr@plt>
cmp    $0xffffffff,%eax
jne    1167 <xrealloc_ptr+0x47>
mov    $0x1,%edi
lea    0xe9e(%rip),%rsi
call   1030 <err@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc_ptr>:
push   %rax
call   1040 <realloc_ptr@plt>
cmp    $0xffffffff,%eax
je     112d <xrealloc_ptr+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rsi
mov    $0x1,%edi
pop    %rax
jmp    1030 <err@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"realloc\00"
define void @xrealloc_ptr(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @realloc_ptr(i8* %9, i64 %10, i64 %11, i64 %12)
%14 = icmp eq i32 %13, -1
br i1 %14, label %15, label %17
15: ; preds = %4
%16 = call i32 @err(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %4
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"realloc\00"
define void @xrealloc_ptr(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i32 @realloc_ptr(i8* %0, i64 %1, i64 %2, i64 %3)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @err(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ _write_decimal_1(int /*<<< orphan*/);
int /*<<< orphan*/ _write_decimal_10(int /*<<< orphan*/);
int /*<<< orphan*/ _write_decimal_100(int /*<<< orphan*/);
void vt_write_uint8(uint8_t value) {
  _write_decimal_100(value);
  _write_decimal_10(value);
  _write_decimal_1(value);
}


x86 assembly (clang, -O0):
<vt_write_uint8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_write_decimal_100@plt>
mov    -0x4(%rbp),%edi
call   1030 <_write_decimal_10@plt>
mov    -0x4(%rbp),%edi
call   1050 <_write_decimal_1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vt_write_uint8>:
push   %rbx
mov    %edi,%ebx
call   1040 <_write_decimal_100@plt>
mov    %ebx,%edi
call   1030 <_write_decimal_10@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1050 <_write_decimal_1@plt>

LLVM IR (-O0):
define void @vt_write_uint8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_write_decimal_100(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @_write_decimal_10(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @_write_decimal_1(i32 %7)
ret void
}

LLVM IR (-O2):
define void @vt_write_uint8(i32 %0) {
%2 = tail call i32 @_write_decimal_100(i32 %0)
%3 = tail call i32 @_write_decimal_10(i32 %0)
%4 = tail call i32 @_write_decimal_1(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ guitp(char *, int);
void g_gid_t() { guitp("gid_t", sizeof(gid_t)); }


x86 assembly (clang, -O0):
<g_gid_t>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x4,%esi
call   1030 <guitp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_gid_t>:
lea    0xee9(%rip),%rdi
mov    $0x4,%esi
jmp    1030 <guitp@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"gid_t\00"
define void @g_gid_t() {
%1 = call i32 @guitp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"gid_t\00"
define void @g_gid_t() {
%1 = tail call i32 @guitp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}
unsigned sq(unsigned a) {
  unsigned i = 2;
  while (i * i < a)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<sq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    112c <sq+0x2c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <sq+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq>:
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
mov    %eax,%ecx
imul   %eax,%ecx
cmp    %edi,%ecx
jb     1110 <sq+0x10>
ret

LLVM IR (-O0):
define i32 @sq(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = mul i32 %5, %6
%8 = load i32, i32* %2
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @sq(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 2, %1 ], [ %6, %2 ]
%4 = mul i32 %3, %3
%5 = icmp ult i32 %4, %0
%6 = add i32 %3, 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i32 %3
}
int fb_GfxIsRedir(int is_input) { return 0; }


x86 assembly (clang, -O0):
<fb_GfxIsRedir>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_GfxIsRedir>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fb_GfxIsRedir(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fb_GfxIsRedir(i32 %0) {
ret i32 0
}
double alpha(unsigned char precision) {
  switch (precision) {
  case 4:
    return 0.673;
  case 5:
    return 0.697;
  case 6:
    return 0.709;
  default:
    return 0.7213 / (1 + 1.079 / ((1 << precision)));
  }
}


x86 assembly (clang, -O0):
<alpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x4,%eax
je     1141 <alpha+0x41>
jmp    111f <alpha+0x1f>
mov    -0x10(%rbp),%eax
sub    $0x5,%eax
je     1153 <alpha+0x53>
jmp    1130 <alpha+0x30>
mov    -0x10(%rbp),%eax
sub    $0x6,%eax
je     1165 <alpha+0x65>
jmp    1177 <alpha+0x77>
movsd  0xec7(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11af <alpha+0xaf>
movsd  0xead(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11af <alpha+0xaf>
movsd  0xe93(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11af <alpha+0xaf>
movzbl -0x9(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cvtsi2sd %eax,%xmm1
movsd  0xe9a(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  0xe86(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  0xe72(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<alpha>:
lea    -0x4(%rdi),%eax
cmp    $0x3,%al
jae    1118 <alpha+0x18>
movsbq %al,%rax
lea    0xf06(%rip),%rcx
movsd  (%rcx,%rax,8),%xmm0
ret
mov    $0x1,%eax
mov    %edi,%ecx
shl    %cl,%eax
cvtsi2sd %eax,%xmm0
movsd  0xed3(%rip),%xmm1
divsd  %xmm0,%xmm1
addsd  0xecf(%rip),%xmm1
movsd  0xecf(%rip),%xmm0
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @alpha(i8 zeroext %0) {
%2 = alloca double
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
switch i32 %5, label %9 [
i32 4, label %6
i32 5, label %7
i32 6, label %8
]
6: ; preds = %1
store double 6.730000e-01, double* %2
br label %17
7: ; preds = %1
store double 6.970000e-01, double* %2
br label %17
8: ; preds = %1
store double 7.090000e-01, double* %2
br label %17
9: ; preds = %1
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 1, %11
%13 = sitofp i32 %12 to double
%14 = fdiv double 1.079000e+00, %13
%15 = fadd double 1.000000e+00, %14
%16 = fdiv double 7.213000e-01, %15
store double %16, double* %2
br label %17
17: ; preds = %9, %8, %7, %6
%18 = load double, double* %2
ret double %18
}

LLVM IR (-O2):
@switch.table.alpha = [3 x double] [double 6.730000e-01, double 6.970000e-01, double 7.090000e-01]
define double @alpha(i8 zeroext %0) {
%2 = add i8 %0, -4
%3 = icmp ult i8 %2, 3
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = zext i8 %0 to i32
%6 = shl nuw i32 1, %5
%7 = sitofp i32 %6 to double
%8 = fdiv double 1.079000e+00, %7
%9 = fadd double %8, 1.000000e+00
%10 = fdiv double 7.213000e-01, %9
br label %15
11: ; preds = %1
%12 = sext i8 %2 to i64
%13 = getelementptr inbounds [3 x double], [3 x double]* @switch.table.alpha, i64 0, i64 %12
%14 = load double, double* %13
br label %15
15: ; preds = %11, %4
%16 = phi double [ %10, %4 ], [ %14, %11 ]
ret double %16
}
/* Variables and functions */
int /*<<< orphan*/ game_main_loop();
int /*<<< orphan*/ init_ncurses();
int /*<<< orphan*/ init_parse_options(int, char **);
int /*<<< orphan*/ init_variables();
int main(int argc, char **argv) {
  init_ncurses();
  init_variables();
  init_parse_options(argc, argv);
  game_main_loop();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <init_ncurses@plt>
mov    $0x0,%al
call   1050 <init_variables@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1060 <init_parse_options@plt>
mov    $0x0,%al
call   1040 <game_main_loop@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <init_ncurses@plt>
xor    %eax,%eax
call   1050 <init_variables@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1060 <init_parse_options@plt>
xor    %eax,%eax
call   1040 <game_main_loop@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @init_ncurses()
%6 = call i32 (...) @init_variables()
%7 = load i32, i32* %3
%8 = load i8**, i8*** %4
%9 = call i32 @init_parse_options(i32 %7, i8** %8)
%10 = call i32 (...) @game_main_loop()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 (...) @init_ncurses()
%4 = tail call i32 (...) @init_variables()
%5 = tail call i32 @init_parse_options(i32 %0, i8** %1)
%6 = tail call i32 (...) @game_main_loop()
ret i32 0
}
/* Variables and functions */
char *strtok(char *, char *);
char *nxt(char **toks) {
  char *t = strtok(*toks, " \t\n\r");
  if (*toks)
    *toks = NULL;
  return t;
}


x86 assembly (clang, -O0):
<nxt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    0xed6(%rip),%rsi
call   1030 <strtok@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     114c <nxt+0x3c>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nxt>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
lea    0xee2(%rip),%rsi
call   1030 <strtok@plt>
cmpq   $0x0,(%rbx)
je     1130 <nxt+0x20>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c" \09\0A\0D\00"
define i8* @nxt(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = call i8* @strtok(i8* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %3
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = load i8**, i8*** %2
store i8* null, i8** %11
br label %12
12: ; preds = %10, %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c" \09\0A\0D\00"
define i8* @nxt(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i8* @strtok(i8* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i8* null, i8** %0
br label %7
7: ; preds = %6, %1
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ notImplementedI5();
void prtAtExitI5() { notImplementedI5(); }


x86 assembly (clang, -O0):
<prtAtExitI5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <notImplementedI5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<prtAtExitI5>:
xor    %eax,%eax
jmp    1030 <notImplementedI5@plt>

LLVM IR (-O0):
define void @prtAtExitI5() {
%1 = call i32 (...) @notImplementedI5()
ret void
}

LLVM IR (-O2):
define void @prtAtExitI5() {
%1 = tail call i32 (...) @notImplementedI5()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ matNf_getColumn(float *, float const *, int const, int);
void mat3f_getColumn(float result[3], const float m[9], const int col) {
  matNf_getColumn(result, m, col, 3);
}


x86 assembly (clang, -O0):
<mat3f_getColumn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x3,%ecx
call   1030 <matNf_getColumn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat3f_getColumn>:
mov    $0x3,%ecx
jmp    1030 <matNf_getColumn@plt>

LLVM IR (-O0):
define void @mat3f_getColumn(float* %0, float* %1, i32 %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store i32 %2, i32* %6
%7 = load float*, float** %4
%8 = load float*, float** %5
%9 = load i32, i32* %6
%10 = call i32 @matNf_getColumn(float* %7, float* %8, i32 %9, i32 3)
ret void
}

LLVM IR (-O2):
define void @mat3f_getColumn(float* %0, float* %1, i32 %2) {
%4 = tail call i32 @matNf_getColumn(float* %0, float* %1, i32 %2, i32 3)
ret void
}
void ff_hevc_put_hevc_uni_w_pel_pixels24_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_pel_pixels24_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_pel_pixels24_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_pel_pixels24_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_pel_pixels24_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cbCalcInit();
int cbPrintBegin() {
  cbCalcInit();
  return 0;
}


x86 assembly (clang, -O0):
<cbPrintBegin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cbCalcInit@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbPrintBegin>:
push   %rax
xor    %eax,%eax
call   1030 <cbCalcInit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cbPrintBegin() {
%1 = call i32 (...) @cbCalcInit()
ret i32 0
}

LLVM IR (-O2):
define i32 @cbPrintBegin() {
%1 = tail call i32 (...) @cbCalcInit()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ XEvent;
typedef int /*<<< orphan*/ Widget;
typedef int /*<<< orphan*/ String;
typedef int /*<<< orphan*/ Cardinal;

/* Variables and functions */
int /*<<< orphan*/ ringbell();
void bell(Widget w, XEvent *e, String *vector, Cardinal *count) { ringbell(); }


x86 assembly (clang, -O0):
<bell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x0,%al
call   1030 <ringbell@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bell>:
xor    %eax,%eax
jmp    1030 <ringbell@plt>

LLVM IR (-O0):
define void @bell(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = call i32 (...) @ringbell()
ret void
}

LLVM IR (-O2):
define void @bell(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i32* nocapture readnone %3) {
%5 = tail call i32 (...) @ringbell()
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int width;
};
struct TYPE_4__ {
  TYPE_1__ xgraphicsexpose;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xgraphicsexpose_width(void *_p, int _v) {
  ((XEvent *)_p)->xgraphicsexpose.width = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xgraphicsexpose_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xgraphicsexpose_width>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xgraphicsexpose_width(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xgraphicsexpose_width(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void dfn_af(f) float f;
{}


x86 assembly (clang, -O0):
<dfn_af>:
push   %rbp
mov    %rsp,%rbp
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfn_af>:
ret

LLVM IR (-O0):
define void @dfn_af(double %0) {
%2 = alloca float
%3 = fptrunc double %0 to float
store float %3, float* %2
ret void
}

LLVM IR (-O2):
define void @dfn_af(double %0) {
ret void
}