xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ osaf_abort(int);
int pthread_mutex_lock(int /*<<< orphan*/ *);
void osaf_mutex_lock_ordie(pthread_mutex_t *io_mutex) {
  int result = pthread_mutex_lock(io_mutex);
  if (result != 0)
    osaf_abort(result);
}


x86 assembly (clang, -O0):
<osaf_mutex_lock_ordie>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_lock@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114a <osaf_mutex_lock_ordie+0x2a>
mov    -0xc(%rbp),%edi
call   1040 <osaf_abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osaf_mutex_lock_ordie>:
push   %rax
call   1030 <pthread_mutex_lock@plt>
test   %eax,%eax
je     1132 <osaf_mutex_lock_ordie+0x12>
mov    %eax,%edi
pop    %rax
jmp    1040 <osaf_abort@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @osaf_mutex_lock_ordie(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @pthread_mutex_lock(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i32 @osaf_abort(i32 %9)
br label %11
11: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @osaf_mutex_lock_ordie(i32* %0) {
%2 = tail call i32 @pthread_mutex_lock(i32* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @osaf_abort(i32 %2)
br label %6
6: ; preds = %4, %1
ret void
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int offset(int, int, int, int);
int owl_eyespace(int, int);
int autohelperowl_attackpat95(struct pattern *patt, int transformation,
                              int move, int color, int action) {
  int a, B;
  (void)patt;
  (void)color;
  (void)action;
  a = offset(0, 1, move, transformation);
  B = offset(-1, 0, move, transformation);
  return owl_eyespace(a, B);
}


x86 assembly (clang, -O0):
<autohelperowl_attackpat95>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
xor    %edi,%edi
mov    $0x1,%esi
call   1040 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1040 <offset@plt>
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%edi
mov    -0x20(%rbp),%esi
call   1030 <owl_eyespace@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_attackpat95>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%ebp
xor    %edi,%edi
mov    $0x1,%esi
mov    %ebp,%ecx
call   1040 <offset@plt>
mov    %eax,%r14d
mov    $0xffffffff,%edi
xor    %esi,%esi
mov    %ebx,%edx
mov    %ebp,%ecx
call   1040 <offset@plt>
mov    %r14d,%edi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <owl_eyespace@plt>

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat95(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%13 = load %struct.pattern*, %struct.pattern** %6
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = load i32, i32* %8
%17 = load i32, i32* %7
%18 = call i32 @offset(i32 0, i32 1, i32 %16, i32 %17)
store i32 %18, i32* %11
%19 = load i32, i32* %8
%20 = load i32, i32* %7
%21 = call i32 @offset(i32 -1, i32 0, i32 %19, i32 %20)
store i32 %21, i32* %12
%22 = load i32, i32* %11
%23 = load i32, i32* %12
%24 = call i32 @owl_eyespace(i32 %22, i32 %23)
ret i32 %24
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat95(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 0, i32 1, i32 %2, i32 %1)
%7 = tail call i32 @offset(i32 -1, i32 0, i32 %2, i32 %1)
%8 = tail call i32 @owl_eyespace(i32 %6, i32 %7)
ret i32 %8
}
int SysCall6(int EAX__, int EBX__, int ECX__, int EDX__, int ESI__, int EDI__) {
  asm volatile("" ::"a"(EAX__));
  asm volatile("" ::"b"(EBX__));
  asm volatile("" ::"c"(ECX__));
  asm volatile("" ::"d"(EDX__));
  asm volatile("" ::"S"(ESI__));
  asm volatile("" ::"D"(EDI__));
  asm volatile("int $0x40");
  register int res;
  asm volatile("" : "=a"(res) :);
  return res;
}


x86 assembly (clang, -O0):
<SysCall6>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ebx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%esi
mov    -0x20(%rbp),%edi
int    $0x40
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCall6>:
push   %rbx
mov    %ecx,%r10d
mov    %edx,%ecx
mov    %esi,%ebx
mov    %edi,%eax
mov    %r10d,%edx
mov    %r8d,%esi
mov    %r9d,%edi
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @SysCall6(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = load i32, i32* %10
%18 = load i32, i32* %11
%19 = load i32, i32* %12
%20 = call i32 asm sideeffect "", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i32 %20, i32* %13
%21 = load i32, i32* %13
ret i32 %21
}

LLVM IR (-O2):
define i32 @SysCall6(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
tail call void asm sideeffect "", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 %0)
tail call void asm sideeffect "", "{bx},~{dirflag},~{fpsr},~{flags}"(i32 %1)
tail call void asm sideeffect "", "{cx},~{dirflag},~{fpsr},~{flags}"(i32 %2)
tail call void asm sideeffect "", "{dx},~{dirflag},~{fpsr},~{flags}"(i32 %3)
tail call void asm sideeffect "", "{si},~{dirflag},~{fpsr},~{flags}"(i32 %4)
tail call void asm sideeffect "", "{di},~{dirflag},~{fpsr},~{flags}"(i32 %5)
tail call void asm sideeffect "int $$0x40", "~{dirflag},~{fpsr},~{flags}"()
%7 = tail call i32 asm sideeffect "", "={ax},~{dirflag},~{fpsr},~{flags}"()
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ msgqueue_sendstring(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, int);
void MoveTo(int x, int y) {
  static char buffer[56];
  sprintf(buffer, "1 %d %d", x, y);
  msgqueue_sendstring(buffer);
  return;
}


x86 assembly (clang, -O0):
<MoveTo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0x2f05(%rip),%rdi
lea    0xebe(%rip),%rsi
call   1040 <sprintf@plt>
lea    0x2ef2(%rip),%rdi
call   1030 <msgqueue_sendstring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MoveTo>:
push   %rbx
mov    %esi,%ecx
mov    %edi,%edx
lea    0x2f14(%rip),%rbx
lea    0xecd(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <msgqueue_sendstring@plt>

LLVM IR (-O0):
@MoveTo.buffer = internal global [56 x i8] zeroinitializer
@.str = [8 x i8] c"1 %d %d\00"
define void @MoveTo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @sprintf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @MoveTo.buffer, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
%8 = call i32 @msgqueue_sendstring(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @MoveTo.buffer, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@MoveTo.buffer = internal global [56 x i8] zeroinitializer
@.str = [8 x i8] c"1 %d %d\00"
define void @MoveTo(i32 %0, i32 %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @MoveTo.buffer, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%4 = tail call i32 @msgqueue_sendstring(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @MoveTo.buffer, i64 0, i64 0))
ret void
}
/* Variables and functions */
int readInt();
int /*<<< orphan*/ writeCommand(char *);
int encoderLeft() {
  int counter = 0;
  writeCommand("EDL");
  counter = readInt();
  return -counter;
}


x86 assembly (clang, -O0):
<encoderLeft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <writeCommand@plt>
mov    $0x0,%al
call   1030 <readInt@plt>
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encoderLeft>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <writeCommand@plt>
xor    %eax,%eax
call   1030 <readInt@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"EDL\00"
define i32 @encoderLeft() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @writeCommand(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @readInt()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = sub nsw i32 0, %4
ret i32 %5
}

LLVM IR (-O2):
@.str = [4 x i8] c"EDL\00"
define i32 @encoderLeft() {
%1 = tail call i32 @writeCommand(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @readInt()
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ insertionSort(void *, size_t, size_t,
                                 int (*)(void const *, void const *));
int /*<<< orphan*/ quickSort(void *, int /*<<< orphan*/, size_t, size_t,
                             int (*)(void const *, void const *));
void quickSort_h(void *base, size_t nitems, size_t memSize,
                 int (*cmp)(const void *, const void *)) {
  quickSort(base, 0, nitems - 1, memSize, cmp);
  insertionSort(base, nitems, memSize, cmp);
}


x86 assembly (clang, -O0):
<quickSort_h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
xor    %esi,%esi
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <insertionSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort_h>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%r12
mov    %rdi,%rbx
lea    -0x1(%rsi),%rdx
xor    %esi,%esi
mov    %r15,%rcx
mov    %r14,%r8
call   1040 <quickSort@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <insertionSort@plt>

LLVM IR (-O0):
define void @quickSort_h(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = sub i64 %10, 1
%12 = load i64, i64* %7
%13 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%14 = call i32 @quickSort(i8* %9, i32 0, i64 %11, i64 %12, i32 (i8*, i8*)* %13)
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = load i64, i64* %7
%18 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%19 = call i32 @insertionSort(i8* %15, i64 %16, i64 %17, i32 (i8*, i8*)* %18)
ret void
}

LLVM IR (-O2):
define void @quickSort_h(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = add i64 %1, -1
%6 = tail call i32 @quickSort(i8* %0, i32 0, i64 %5, i64 %2, i32 (i8*, i8*)* %3)
%7 = tail call i32 @insertionSort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3)
ret void
}
/* Variables and functions */
int max(int /*<<< orphan*/, int);
int /*<<< orphan*/ max3(int, int, int);
int max4(int i, int j, int k, int l) { return max(max3(i, j, k), l); }


x86 assembly (clang, -O0):
<max4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1040 <max3@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%esi
call   1030 <max@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<max4>:
push   %rbx
mov    %ecx,%ebx
call   1040 <max3@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <max@plt>

LLVM IR (-O0):
define i32 @max4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = call i32 @max3(i32 %9, i32 %10, i32 %11)
%13 = load i32, i32* %8
%14 = call i32 @max(i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @max4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @max3(i32 %0, i32 %1, i32 %2)
%6 = tail call i32 @max(i32 %5, i32 %3)
ret i32 %6
}
/* Variables and functions */
int fpcompare(double, double, int, int);
int isunordered(double x, double y) {
  return fpcompare(x, y, (0x0100 | 0x0400 | 0x4000), -1);
}


x86 assembly (clang, -O0):
<isunordered>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mov    $0x4500,%edi
mov    $0xffffffff,%esi
call   1030 <fpcompare@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isunordered>:
mov    $0x4500,%edi
mov    $0xffffffff,%esi
jmp    1030 <fpcompare@plt>

LLVM IR (-O0):
define i32 @isunordered(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @fpcompare(double %5, double %6, i32 17664, i32 -1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @isunordered(double %0, double %1) {
%3 = tail call i32 @fpcompare(double %0, double %1, i32 17664, i32 -1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void putchar_hex(char c) {
  char *hex = "0123456789ABCDEF";
  putchar(hex[(c & 0xf0) >> 4]);
  putchar(hex[(c & 0x0f) >> 0]);
}


x86 assembly (clang, -O0):
<putchar_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl -0x1(%rbp),%ecx
and    $0xf0,%ecx
sar    $0x4,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
movsbl -0x1(%rbp),%ecx
and    $0xf,%ecx
sar    $0x0,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar_hex>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
movzbl %bl,%eax
shr    $0x4,%rax
lea    0xedc(%rip),%r14
movsbl (%rax,%r14,1),%edi
call   1030 <putchar@plt>
and    $0xf,%ebx
movsbl (%rbx,%r14,1),%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"0123456789ABCDEF\00"
define void @putchar_hex(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8*
store i8 %0, i8* %2
store i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = and i32 %6, 240
%8 = ashr i32 %7, 4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %4, i64 %9
%11 = load i8, i8* %10
%12 = call i32 @putchar(i8 signext %11)
%13 = load i8*, i8** %3
%14 = load i8, i8* %2
%15 = sext i8 %14 to i32
%16 = and i32 %15, 15
%17 = ashr i32 %16, 0
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %13, i64 %18
%20 = load i8, i8* %19
%21 = call i32 @putchar(i8 signext %20)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"0123456789ABCDEF\00"
define void @putchar_hex(i8 signext %0) {
%2 = zext i8 %0 to i32
%3 = lshr i32 %2, 4
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds [17 x i8], [17 x i8]* @.str, i64 0, i64 %4
%6 = load i8, i8* %5
%7 = tail call i32 @putchar(i8 signext %6)
%8 = and i32 %2, 15
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds [17 x i8], [17 x i8]* @.str, i64 0, i64 %9
%11 = load i8, i8* %10
%12 = tail call i32 @putchar(i8 signext %11)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ kernel_print_character(char);
void print_char(char c) { kernel_print_character(c); }


x86 assembly (clang, -O0):
<print_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <kernel_print_character@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_char>:
jmp    1030 <kernel_print_character@plt>

LLVM IR (-O0):
define void @print_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @kernel_print_character(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @print_char(i8 signext %0) {
%2 = tail call i32 @kernel_print_character(i8 signext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memchunk_make_writable() {
  printf("NOT IMPLEMENTED:"
         "pa_memchunk_make_writable"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memchunk_make_writable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memchunk_make_writable>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"NOT IMPLEMENTED:pa_memchunk_make_writable\0A\00"
define i32 @pa_memchunk_make_writable() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [42 x i8] c"NOT IMPLEMENTED:pa_memchunk_make_writable\00"
define i32 @pa_memchunk_make_writable() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
struct bi_tree {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bi_tree_update_impl(struct bi_tree *, int /*<<< orphan*/,
                                       int);
void bi_tree_delete(struct bi_tree *bi, int idx) {
  if (bi == NULL)
    return;
  bi_tree_update_impl(bi, 0, idx + 1);
}


x86 assembly (clang, -O0):
<bi_tree_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112f <bi_tree_delete+0x1f>
jmp    1140 <bi_tree_delete+0x30>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
add    $0x1,%edx
xor    %esi,%esi
call   1030 <bi_tree_update_impl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bi_tree_delete>:
test   %rdi,%rdi
je     1121 <bi_tree_delete+0x11>
mov    %esi,%edx
add    $0x1,%edx
xor    %esi,%esi
jmp    1030 <bi_tree_update_impl@plt>
ret

LLVM IR (-O0):
%struct.bi_tree = type { i32 }
define void @bi_tree_delete(%struct.bi_tree* %0, i32 %1) {
%3 = alloca %struct.bi_tree*
%4 = alloca i32
store %struct.bi_tree* %0, %struct.bi_tree** %3
store i32 %1, i32* %4
%5 = load %struct.bi_tree*, %struct.bi_tree** %3
%6 = icmp eq %struct.bi_tree* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
br label %13
8: ; preds = %2
%9 = load %struct.bi_tree*, %struct.bi_tree** %3
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 1
%12 = call i32 @bi_tree_update_impl(%struct.bi_tree* %9, i32 0, i32 %11)
br label %13
13: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
%struct.bi_tree = type { i32 }
define void @bi_tree_delete(%struct.bi_tree* %0, i32 %1) {
%3 = icmp eq %struct.bi_tree* %0, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = add nsw i32 %1, 1
%6 = tail call i32 @bi_tree_update_impl(%struct.bi_tree* %0, i32 0, i32 %5)
br label %7
7: ; preds = %2, %4
ret void
}
int test_function() { return 0; }


x86 assembly (clang, -O0):
<test_function>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_function>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_function() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test_function() {
ret i32 0
}
int read_ramdisk(int nth_zone, int zone_size, unsigned char *p_dest) {
  if (zone_size * (nth_zone + 1) > 2 * 1024 * 1024)
    return -1;
  else {
    __asm__("mov %%ds,%%bx\n\t"
            "mov %%es,%%dx\n\t"
            "mov $0x10,%%ax\n\t"
            "mov %%ax,%%es\n\t"
            "mov %%ax,%%ds\n\t"
            "cld\n\t"
            "rep\n\t"
            "movsl\n\t"
            "mov %%dx,%%es\n\t"
            "mov %%bx,%%ds\n\t" ::"c"(zone_size / 4),
            "D"(p_dest),
            "S"((unsigned char *)(0x100000 + zone_size * nth_zone)));
    return 0;
  }
}


x86 assembly (clang, -O0):
<read_ramdisk>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
cmp    $0x200000,%eax
jle    1131 <read_ramdisk+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    116d <read_ramdisk+0x6d>
mov    -0xc(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
add    $0x100000,%eax
movslq %eax,%rsi
mov    %ds,%bx
mov    %es,%dx
mov    $0x10,%ax
mov    %eax,%es
mov    %eax,%ds
cld
rep movsl %ds:(%rsi),%es:(%rdi)
mov    %edx,%es
mov    %ebx,%ds
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_ramdisk>:
lea    0x1(%rdi),%ecx
imul   %esi,%ecx
mov    $0xffffffff,%eax
cmp    $0x200000,%ecx
jg     1144 <read_ramdisk+0x44>
lea    0x3(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
sar    $0x2,%ecx
imul   %esi,%edi
add    $0x100000,%edi
movslq %edi,%rsi
mov    %rdx,%rdi
mov    %ds,%bx
mov    %es,%dx
mov    $0x10,%ax
mov    %eax,%es
mov    %eax,%ds
cld
rep movsl %ds:(%rsi),%es:(%rdi)
mov    %edx,%es
mov    %ebx,%ds
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @read_ramdisk(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
%11 = mul nsw i32 %8, %10
%12 = icmp sgt i32 %11, 2097152
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %24
14: ; preds = %3
%15 = load i32, i32* %6
%16 = sdiv i32 %15, 4
%17 = load i8*, i8** %7
%18 = load i32, i32* %6
%19 = load i32, i32* %5
%20 = mul nsw i32 %18, %19
%21 = add nsw i32 1048576, %20
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i8*
store i32 0, i32* %4
br label %24
24: ; preds = %14, %13
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @read_ramdisk(i32 %0, i32 %1, i8* %2) {
%4 = add nsw i32 %0, 1
%5 = mul nsw i32 %4, %1
%6 = icmp sgt i32 %5, 2097152
br i1 %6, label %13, label %7
7: ; preds = %3
%8 = sdiv i32 %1, 4
%9 = mul nsw i32 %1, %0
%10 = add nsw i32 %9, 1048576
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i8*
tail call void asm sideeffect "mov %ds,%bx\0A\09mov %es,%dx\0A\09mov $$0x10,%ax\0A\09mov %ax,%es\0A\09mov %ax,%ds\0A\09cld\0A\09rep\0A\09movsl\0A\09mov %dx,%es\0A\09mov %bx,%ds\0A\09", "{cx},{di},{si},~{dirflag},~{fpsr},~{flags}"(i32 %8, i8* %2, i8* %12)
br label %13
13: ; preds = %3, %7
%14 = phi i32 [ 0, %7 ], [ -1, %3 ]
ret i32 %14
}
void fd178(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  a : {
    typedef int(*g)[n];
  P024A:
    goto P024A;
    0;
  };
  p02B:
    goto p02B;
    goto a;
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd178>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd178+0x7>

x86 assembly (clang, -O2):
<fd178>:
jmp    1100 <fd178>

LLVM IR (-O0):
define void @fd178(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %23
%27 = load i32, i32* %2
%28 = zext i32 %27 to i64
br label %29
29: ; preds = %29, %26
br label %29
30: ; preds = %30
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd178(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Type definitions */
struct stack_st_OPENSSL_CSTRING {
  int dummy;
};
typedef int /*<<< orphan*/ OPENSSL_STACK;

/* Variables and functions */
int OPENSSL_sk_reserve(int /*<<< orphan*/ *, int);
int sk_OPENSSL_CSTRING_reserve(struct stack_st_OPENSSL_CSTRING *sk, int n) {
  return OPENSSL_sk_reserve((OPENSSL_STACK *)sk, n);
}


x86 assembly (clang, -O0):
<sk_OPENSSL_CSTRING_reserve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <OPENSSL_sk_reserve@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_OPENSSL_CSTRING_reserve>:
jmp    1030 <OPENSSL_sk_reserve@plt>

LLVM IR (-O0):
%struct.stack_st_OPENSSL_CSTRING = type { i32 }
define i32 @sk_OPENSSL_CSTRING_reserve(%struct.stack_st_OPENSSL_CSTRING* %0, i32 %1) {
%3 = alloca %struct.stack_st_OPENSSL_CSTRING*
%4 = alloca i32
store %struct.stack_st_OPENSSL_CSTRING* %0, %struct.stack_st_OPENSSL_CSTRING** %3
store i32 %1, i32* %4
%5 = load %struct.stack_st_OPENSSL_CSTRING*, %struct.stack_st_OPENSSL_CSTRING** %3
%6 = bitcast %struct.stack_st_OPENSSL_CSTRING* %5 to i32*
%7 = load i32, i32* %4
%8 = call i32 @OPENSSL_sk_reserve(i32* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.stack_st_OPENSSL_CSTRING = type { i32 }
define i32 @sk_OPENSSL_CSTRING_reserve(%struct.stack_st_OPENSSL_CSTRING* %0, i32 %1) {
%3 = getelementptr %struct.stack_st_OPENSSL_CSTRING, %struct.stack_st_OPENSSL_CSTRING* %0, i64 0, i32 0
%4 = tail call i32 @OPENSSL_sk_reserve(i32* %3, i32 %1)
ret i32 %4
}
int f_ne_rm2(float a1, float *a2) { return !(((a1) != (*a2))); }


x86 assembly (clang, -O0):
<f_ne_rm2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
ucomiss (%rax),%xmm0
setne  %al
setp   %cl
or     %cl,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_ne_rm2>:
cmpeqss (%rdi),%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @f_ne_rm2(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = load float*, float** %4
%7 = load float, float* %6
%8 = fcmp une float %5, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f_ne_rm2(float %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fcmp oeq float %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x0c() {
  Assert_real((isgraph(12) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              65, ("isgraph should be 0 for 0x0c"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x0c>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x41,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x0c>:
push   %rax
mov    $0xc,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x41,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x0c\00"
define void @t_isgraph_0x0c() {
%1 = call i64 @isgraph(i32 12)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x0c\00"
define void @t_isgraph_0x0c() {
%1 = tail call i64 @isgraph(i32 12)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx,
           unsigned int *ecx, unsigned int *edx) {
  __asm__("cpuid;"
          : "=b"(*ebx), "=a"(*eax), "=c"(*ecx), "=d"(*edx)
          : "1"(op), "c"(0));
}


x86 assembly (clang, -O0):
<cpuid>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    -0x20(%rbp),%r9
mov    -0x18(%rbp),%rdi
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0xc(%rbp),%eax
xor    %ecx,%ecx
cpuid
mov    %eax,%r8d
mov    -0x40(%rbp),%rax
mov    %ecx,%esi
mov    -0x38(%rbp),%rcx
mov    %ebx,(%r9)
mov    %r8d,(%rdi)
mov    %esi,(%rcx)
mov    %edx,(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid>:
push   %rbx
mov    %rcx,%r9
mov    %rdx,%r10
mov    %edi,%eax
xor    %ecx,%ecx
cpuid
mov    %ebx,(%r10)
mov    %eax,(%rsi)
mov    %ecx,(%r9)
mov    %edx,(%r8)
pop    %rbx
ret

LLVM IR (-O0):
define void @cpuid(i32 %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
store i32 %0, i32* %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32*, i32** %8
%12 = load i32*, i32** %7
%13 = load i32*, i32** %9
%14 = load i32*, i32** %10
%15 = load i32, i32* %6
%16 = call { i32, i32, i32, i32 } asm "cpuid;", "={bx},={ax},={cx},={dx},1,{cx},~{dirflag},~{fpsr},~{flags}"(i32 %15, i32 0)
%17 = extractvalue { i32, i32, i32, i32 } %16, 0
%18 = extractvalue { i32, i32, i32, i32 } %16, 1
%19 = extractvalue { i32, i32, i32, i32 } %16, 2
%20 = extractvalue { i32, i32, i32, i32 } %16, 3
store i32 %17, i32* %11
store i32 %18, i32* %12
store i32 %19, i32* %13
store i32 %20, i32* %14
ret void
}

LLVM IR (-O2):
define void @cpuid(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4) {
%6 = tail call { i32, i32, i32, i32 } asm "cpuid;", "={bx},={ax},={cx},={dx},1,{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 0)
%7 = extractvalue { i32, i32, i32, i32 } %6, 0
%8 = extractvalue { i32, i32, i32, i32 } %6, 1
%9 = extractvalue { i32, i32, i32, i32 } %6, 2
%10 = extractvalue { i32, i32, i32, i32 } %6, 3
store i32 %7, i32* %2
store i32 %8, i32* %1
store i32 %9, i32* %3
store i32 %10, i32* %4
ret void
}
/* Variables and functions */
int log2i(long long);
long long scm_page_level(long long i) { return (log2i(i + 2) - 1) / 2; }


x86 assembly (clang, -O0):
<scm_page_level>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x2,%rdi
call   1030 <log2i@plt>
sub    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scm_page_level>:
push   %rax
add    $0x2,%rdi
call   1030 <log2i@plt>
mov    %eax,%ecx
add    $0xffffffff,%ecx
shr    $0x1f,%ecx
add    %ecx,%eax
add    $0xffffffff,%eax
sar    %eax
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @scm_page_level(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 2
%5 = call i32 @log2i(i64 %4)
%6 = sub nsw i32 %5, 1
%7 = sdiv i32 %6, 2
%8 = sext i32 %7 to i64
ret i64 %8
}

LLVM IR (-O2):
define i64 @scm_page_level(i64 %0) {
%2 = add nsw i64 %0, 2
%3 = tail call i32 @log2i(i64 %2)
%4 = add nsw i32 %3, -1
%5 = sdiv i32 %4, 2
%6 = sext i32 %5 to i64
ret i64 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printSpaces(uint32_t spaces) {
  while (spaces--)
    printf(" ");
}


x86 assembly (clang, -O0):
<printSpaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1140 <printSpaces+0x30>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
jmp    111b <printSpaces+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printSpaces>:
push   %rbx
test   %edi,%edi
je     112f <printSpaces+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <printSpaces+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define void @printSpaces(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @printSpaces(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 @putchar(i32 32)
%7 = icmp eq i32 %5, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
scalar_t__ bcd_diff(char const *, void *);
int64_t bcd2gps(void *bcd) {
  static const char y2k[6] = {0, 0, 0, 1, 1, 0};
  return bcd_diff(y2k, bcd) + 630720000;
}


x86 assembly (clang, -O0):
<bcd2gps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <bcd_diff@plt>
add    $0x25980600,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd2gps>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <bcd_diff@plt>
add    $0x25980600,%rax
pop    %rcx
ret

LLVM IR (-O0):
@bcd2gps.y2k = internal constant [6 x i8] c"\00\00\00\01\01\00"
define i64 @bcd2gps(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @bcd_diff(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @bcd2gps.y2k, i64 0, i64 0), i8* %3)
%5 = add nsw i64 %4, 630720000
ret i64 %5
}

LLVM IR (-O2):
@bcd2gps.y2k = internal constant [6 x i8] c"\00\00\00\01\01\00"
define i64 @bcd2gps(i8* %0) {
%2 = tail call i64 @bcd_diff(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @bcd2gps.y2k, i64 0, i64 0), i8* %0)
%3 = add nsw i64 %2, 630720000
ret i64 %3
}
int expx(int x, int n) {
  for (int i = 0; i < n - 1; i++)
    x *= x;
  return x;
}


x86 assembly (clang, -O0):
<expx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    113a <expx+0x3a>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <expx+0x11>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<expx>:
mov    %edi,%eax
cmp    $0x2,%esi
jl     1158 <expx+0x58>
lea    -0x1(%rsi),%edx
add    $0xfffffffe,%esi
mov    %edx,%ecx
and    $0x7,%ecx
cmp    $0x7,%esi
jb     113d <expx+0x3d>
and    $0xfffffff8,%edx
nopw   0x0(%rax,%rax,1)
imul   %eax,%eax
imul   %eax,%eax
imul   %eax,%eax
imul   %eax,%eax
imul   %eax,%eax
imul   %eax,%eax
imul   %eax,%eax
imul   %eax,%eax
add    $0xfffffff8,%edx
jne    1120 <expx+0x20>
test   %ecx,%ecx
je     1158 <expx+0x58>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
imul   %eax,%eax
add    $0xffffffff,%ecx
jne    1150 <expx+0x50>
ret

LLVM IR (-O0):
define i32 @expx(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 1
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %18
11: ; preds = %6
%12 = load i32, i32* %3
%13 = load i32, i32* %3
%14 = mul nsw i32 %13, %12
store i32 %14, i32* %3
br label %15
15: ; preds = %11
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @expx(i32 %0, i32 %1) {
%3 = add i32 %1, -1
%4 = icmp sgt i32 %1, 1
br i1 %4, label %5, label %21
5: ; preds = %2
%6 = add i32 %1, -2
%7 = and i32 %3, 7
%8 = icmp ult i32 %6, 7
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = and i32 %3, -8
br label %23
11: ; preds = %23, %5
%12 = phi i32 [ undef, %5 ], [ %33, %23 ]
%13 = phi i32 [ %0, %5 ], [ %33, %23 ]
%14 = icmp eq i32 %7, 0
br i1 %14, label %21, label %15
15: ; preds = %11, %15
%16 = phi i32 [ %18, %15 ], [ %13, %11 ]
%17 = phi i32 [ %19, %15 ], [ 0, %11 ]
%18 = mul nsw i32 %16, %16
%19 = add i32 %17, 1
%20 = icmp eq i32 %19, %7
br i1 %20, label %21, label %15
21: ; preds = %11, %15, %2
%22 = phi i32 [ %0, %2 ], [ %12, %11 ], [ %18, %15 ]
ret i32 %22
23: ; preds = %23, %9
%24 = phi i32 [ %0, %9 ], [ %33, %23 ]
%25 = phi i32 [ 0, %9 ], [ %34, %23 ]
%26 = mul nsw i32 %24, %24
%27 = mul nsw i32 %26, %26
%28 = mul nsw i32 %27, %27
%29 = mul nsw i32 %28, %28
%30 = mul nsw i32 %29, %29
%31 = mul nsw i32 %30, %30
%32 = mul nsw i32 %31, %31
%33 = mul nsw i32 %32, %32
%34 = add i32 %25, 8
%35 = icmp eq i32 %34, %10
br i1 %35, label %11, label %23
}
void __attribute__((section(".cs3.reset"))) dummy_handler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<dummy_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <dummy_handler+0x9>
jmp    1109 <dummy_handler+0x9>

x86 assembly (clang, -O2):
<dummy_handler>:
jmp    1100 <dummy_handler>

LLVM IR (-O0):
define void @dummy_handler() section ".cs3.reset" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @dummy_handler() section ".cs3.reset" {
br label %1
1: ; preds = %0, %1
br label %1
}
int test_imm_5Dint64_lowword_reg(long long val) {
  return ((val) & (0x5D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Dint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x5d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Dint64_lowword_reg>:
test   $0x5d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Dint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 93
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Dint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 93
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ UI_DEV_DESTROY;
int ioctl(int, int /*<<< orphan*/);
int uinput_fini(int fd) { return ioctl(fd, UI_DEV_DESTROY); }


x86 assembly (clang, -O0):
<uinput_fini>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uinput_fini>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
@UI_DEV_DESTROY = global i32 0
define i32 @uinput_fini(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @UI_DEV_DESTROY
%5 = call i32 @ioctl(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@UI_DEV_DESTROY = global i32 0
define i32 @uinput_fini(i32 %0) {
%2 = load i32, i32* @UI_DEV_DESTROY
%3 = tail call i32 @ioctl(i32 %0, i32 %2)
ret i32 %3
}
__attribute__((weak)) void TWI1_IrqHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<TWI1_IrqHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <TWI1_IrqHandler+0x9>
jmp    1109 <TWI1_IrqHandler+0x9>

x86 assembly (clang, -O2):
<TWI1_IrqHandler>:
jmp    1100 <TWI1_IrqHandler>

LLVM IR (-O0):
define weak void @TWI1_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @TWI1_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
unsigned int hash(char *c, unsigned int step, unsigned int size) {
  unsigned int hashvalue = 0;
  if (!*c)
    return 0;
  do {
    hashvalue += *c++;
    hashvalue *= step;
  } while (*c);
  return (hashvalue % size);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    112e <hash+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    116d <hash+0x6d>
jmp    1133 <hash+0x33>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%eax
imul   -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1133 <hash+0x33>
mov    -0x1c(%rbp),%eax
xor    %edx,%edx
divl   -0x18(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    %edx,%ecx
mov    (%rdi),%dl
test   %dl,%dl
je     112a <hash+0x2a>
add    $0x1,%rdi
xor    %eax,%eax
xchg   %ax,%ax
movsbl %dl,%edx
add    %edx,%eax
imul   %esi,%eax
movzbl (%rdi),%edx
add    $0x1,%rdi
test   %dl,%dl
jne    1110 <hash+0x10>
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %3
store i32 0, i32* %4
br label %32
13: ; preds = %3
br label %14
14: ; preds = %24, %13
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i8, i8* %15
%18 = sext i8 %17 to i32
%19 = load i32, i32* %8
%20 = add i32 %19, %18
store i32 %20, i32* %8
%21 = load i32, i32* %6
%22 = load i32, i32* %8
%23 = mul i32 %22, %21
store i32 %23, i32* %8
br label %24
24: ; preds = %14
%25 = load i8*, i8** %5
%26 = load i8, i8* %25
%27 = icmp ne i8 %26, 0
br i1 %27, label %14, label %28
28: ; preds = %24
%29 = load i32, i32* %8
%30 = load i32, i32* %7
%31 = urem i32 %29, %30
store i32 %31, i32* %4
br label %32
32: ; preds = %28, %12
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0, i32 %1, i32 %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %18, label %6
6: ; preds = %3, %6
%7 = phi i8 [ %14, %6 ], [ %4, %3 ]
%8 = phi i8* [ %10, %6 ], [ %0, %3 ]
%9 = phi i32 [ %13, %6 ], [ 0, %3 ]
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = sext i8 %7 to i32
%12 = add i32 %9, %11
%13 = mul i32 %12, %1
%14 = load i8, i8* %10
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %6
16: ; preds = %6
%17 = urem i32 %13, %2
br label %18
18: ; preds = %3, %16
%19 = phi i32 [ %17, %16 ], [ 0, %3 ]
ret i32 %19
}
/* Variables and functions */
int func();
int main(int argc, char **argv) { return func() == 42 ? 0 : 99; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
mov    %eax,%edx
mov    $0x63,%eax
xor    %ecx,%ecx
cmp    $0x2a,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <func@plt>
cmp    $0x2a,%eax
mov    $0x63,%eax
cmove  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @func()
%7 = icmp eq i32 %6, 42
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 99
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @func()
%4 = icmp eq i32 %3, 42
%5 = select i1 %4, i32 0, i32 99
ret i32 %5
}
char *index(sp, c)
register char *sp, c;
{
  do {
    if (*sp == c)
      return (sp);
  } while (*sp++);
  return (0);
}


x86 assembly (clang, -O0):
<index>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    112e <index+0x2e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <index+0x53>
jmp    1133 <index+0x33>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,(%rax)
jne    110e <index+0xe>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<index>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rax),%ecx
cmp    %sil,%cl
je     1122 <index+0x22>
add    $0x1,%rax
test   %cl,%cl
jne    1110 <index+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @index(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
br label %6
6: ; preds = %16, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8, i8* %5
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %15
13: ; preds = %6
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %22
15: ; preds = %6
br label %16
16: ; preds = %15
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %4
%19 = load i8, i8* %17
%20 = icmp ne i8 %19, 0
br i1 %20, label %6, label %21
21: ; preds = %16
store i8* null, i8** %3
br label %22
22: ; preds = %21, %13
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @index(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %0, %2 ], [ %8, %7 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, %1
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = icmp eq i8 %5, 0
br i1 %9, label %10, label %3
10: ; preds = %7, %3
%11 = phi i8* [ %4, %3 ], [ null, %7 ]
ret i8* %11
}