xunge/DecIR huggingface dataset:
float ANTweenTimingFunctionBackIn(float time, float begin, float change,
                                  float duration) {
  float s = 1.70158;
  time /= duration;
  return change * time * time * ((s + 1) * time - s) + begin;
}


x86 assembly (clang, -O0):
<ANTweenTimingFunctionBackIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  0xee4(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0x4(%rbp),%xmm0
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  0xeb1(%rip),%xmm2
addss  -0x14(%rbp),%xmm2
movss  -0x4(%rbp),%xmm3
movss  -0x14(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm3,%xmm2
addss  %xmm1,%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenTimingFunctionBackIn>:
divss  %xmm3,%xmm0
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  0xeec(%rip),%xmm0
addss  0xee8(%rip),%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @ANTweenTimingFunctionBackIn(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
store float 0x3FFB39AC00000000, float* %9
%10 = load float, float* %8
%11 = load float, float* %5
%12 = fdiv float %11, %10
store float %12, float* %5
%13 = load float, float* %7
%14 = load float, float* %5
%15 = fmul float %13, %14
%16 = load float, float* %5
%17 = fmul float %15, %16
%18 = load float, float* %9
%19 = fadd float %18, 1.000000e+00
%20 = load float, float* %5
%21 = load float, float* %9
%22 = fneg float %21
%23 = call float @llvm.fmuladd.f32(float %19, float %20, float %22)
%24 = load float, float* %6
%25 = call float @llvm.fmuladd.f32(float %17, float %23, float %24)
ret float %25
}

LLVM IR (-O2):
define float @ANTweenTimingFunctionBackIn(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fmul float %5, %2
%7 = fmul float %5, %6
%8 = tail call float @llvm.fmuladd.f32(float %5, float 0x40059CD600000000, float 0xBFFB39AC00000000)
%9 = tail call float @llvm.fmuladd.f32(float %7, float %8, float %1)
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ my_abort();
int main(int argc, char const *argv[]) {
  my_abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <my_abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <my_abort@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @my_abort()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @my_abort()
ret i32 0
}
unsigned xrop3_175_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~T;
  stk1 = D | stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_175_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_175_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %ecx
or     %edi,%ecx
not    %eax
and    %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_175_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = xor i32 %22, -1
store i32 %23, i32* %9
%24 = load i32, i32* %5
%25 = load i32, i32* %9
%26 = or i32 %24, %25
store i32 %26, i32* %8
%27 = load i32, i32* %8
%28 = load i32, i32* %6
%29 = and i32 %27, %28
%30 = load i32, i32* %8
%31 = load i32, i32* %7
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = or i32 %29, %33
%35 = load i32, i32* %7
%36 = load i32, i32* %6
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %5
%40 = and i32 %38, %39
%41 = or i32 %34, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_175_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, -1
%8 = or i32 %7, %3
%9 = xor i32 %4, -1
%10 = and i32 %9, %5
%11 = or i32 %8, %10
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ is_prime(int);
int is_not_prime(int num) { return !is_prime(num); }


x86 assembly (clang, -O0):
<is_not_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_prime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_not_prime>:
push   %rax
call   1030 <is_prime@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_not_prime(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @is_prime(i32 %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_not_prime(i32 %0) {
%2 = tail call i32 @is_prime(i32 %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void write_summary(FILE *out, int ret, int diff) {
  if (ret)
    fprintf(out, "Solution is not unique.\n");
  else
    fprintf(out, "Solution is unique. Difficulty: %d\n", diff);
}


x86 assembly (clang, -O0):
<write_summary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1143 <write_summary+0x33>
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
jmp    1158 <write_summary+0x48>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
lea    0xec8(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_summary>:
mov    %rdi,%rcx
test   %esi,%esi
je     113d <write_summary+0x1d>
lea    0xed2(%rip),%rdi
mov    $0x18,%esi
mov    $0x1,%edx
jmp    1040 <fwrite@plt>
lea    0xed5(%rip),%rsi
mov    %rcx,%rdi
xor    %eax,%eax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Solution is not unique.\0A\00"
@.str.1 = [36 x i8] c"Solution is unique. Difficulty: %d\0A\00"
define void @write_summary(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32*, i32** %4
%11 = call i32 (i32*, i8*, ...) @fprintf(i32* %10, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %16
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = call i32 (i32*, i8*, ...) @fprintf(i32* %13, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i32 %14)
br label %16
16: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Solution is not unique.\0A\00"
@.str.1 = [36 x i8] c"Solution is unique. Difficulty: %d\0A\00"
define void @write_summary(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i64 @fwrite(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i64 24, i64 1, i32* %0)
br label %9
7: ; preds = %3
%8 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i32 %2)
br label %9
9: ; preds = %7, %5
ret void
}
void f3(void) {
  int i = 0;
#pragma acc update device(i)
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3() {
%1 = alloca i32
store i32 0, i32* %1
ret void
}

LLVM IR (-O2):
define void @f3() {
ret void
}
void __attribute__((visibility("default"))) _mcount(void) {}


x86 assembly (clang, -O0):
<_mcount>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mcount>:
ret

LLVM IR (-O0):
define void @_mcount() {
ret void
}

LLVM IR (-O2):
define void @_mcount() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dsfmt_gv_fill_array_open_open(double *, long);
void fill_array_open_open(double array[], long size) {
  dsfmt_gv_fill_array_open_open(array, size);
}


x86 assembly (clang, -O0):
<fill_array_open_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dsfmt_gv_fill_array_open_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_array_open_open>:
jmp    1030 <dsfmt_gv_fill_array_open_open@plt>

LLVM IR (-O0):
define void @fill_array_open_open(double* %0, i64 %1) {
%3 = alloca double*
%4 = alloca i64
store double* %0, double** %3
store i64 %1, i64* %4
%5 = load double*, double** %3
%6 = load i64, i64* %4
%7 = call i32 @dsfmt_gv_fill_array_open_open(double* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @fill_array_open_open(double* %0, i64 %1) {
%3 = tail call i32 @dsfmt_gv_fill_array_open_open(double* %0, i64 %1)
ret void
}
void NetworkStartUp() {}


x86 assembly (clang, -O0):
<NetworkStartUp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NetworkStartUp>:
ret

LLVM IR (-O0):
define void @NetworkStartUp() {
ret void
}

LLVM IR (-O2):
define void @NetworkStartUp() {
ret void
}
int index_wrap(const int i, const int n) {
  int r = i - n * (int)((double)i / (double)n);
  if (r < 0) {
    r += n;
  }
  return r;
}


x86 assembly (clang, -O0):
<index_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
cvtsi2sdl -0x4(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edx
imul   %edx,%ecx
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    113d <index_wrap+0x3d>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_wrap>:
cvtsi2sd %edi,%xmm0
cvtsi2sd %esi,%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
imul   %esi,%eax
sub    %eax,%edi
mov    %edi,%eax
sar    $0x1f,%eax
and    %esi,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @index_wrap(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sitofp i32 %8 to double
%10 = load i32, i32* %4
%11 = sitofp i32 %10 to double
%12 = fdiv double %9, %11
%13 = fptosi double %12 to i32
%14 = mul nsw i32 %7, %13
%15 = sub nsw i32 %6, %14
store i32 %15, i32* %5
%16 = load i32, i32* %5
%17 = icmp slt i32 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %2
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = add nsw i32 %20, %19
store i32 %21, i32* %5
br label %22
22: ; preds = %18, %2
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @index_wrap(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to double
%4 = sitofp i32 %1 to double
%5 = fdiv double %3, %4
%6 = fptosi double %5 to i32
%7 = mul nsw i32 %6, %1
%8 = sub nsw i32 %0, %7
%9 = icmp slt i32 %8, 0
%10 = select i1 %9, i32 %1, i32 0
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ remote_monitoring_run();
int main(void) {
  remote_monitoring_run();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <remote_monitoring_run@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <remote_monitoring_run@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @remote_monitoring_run()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @remote_monitoring_run()
ret i32 0
}
void hugo_stopmusic(void) {}


x86 assembly (clang, -O0):
<hugo_stopmusic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hugo_stopmusic>:
ret

LLVM IR (-O0):
define void @hugo_stopmusic() {
ret void
}

LLVM IR (-O2):
define void @hugo_stopmusic() {
ret void
}
/* Type definitions */
struct packet {
  int dummy;
};

/* Variables and functions */
unsigned char *create_kv_packet(unsigned char const *, int,
                                unsigned char const *, size_t, struct packet *,
                                unsigned char *);
unsigned char *create_identifier_packet(const unsigned char *identifier,
                                        size_t identifier_sz,
                                        struct packet *pkt,
                                        unsigned char *ptr) {
  return create_kv_packet((const unsigned char *)"identifier",
                          (sizeof("identifier") - 1), identifier, identifier_sz,
                          pkt, ptr);
}


x86 assembly (clang, -O0):
<create_identifier_packet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
lea    0xec1(%rip),%rdi
mov    $0xa,%esi
call   1030 <create_kv_packet@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_identifier_packet>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xedd(%rip),%rdi
mov    $0xa,%esi
jmp    1030 <create_kv_packet@plt>

LLVM IR (-O0):
%struct.packet = type { i32 }
@.str = [11 x i8] c"identifier\00"
define i8* @create_identifier_packet(i8* %0, i64 %1, %struct.packet* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca %struct.packet*
%8 = alloca i8*
store i8* %0, i8** %5
store i64 %1, i64* %6
store %struct.packet* %2, %struct.packet** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load %struct.packet*, %struct.packet** %7
%12 = load i8*, i8** %8
%13 = call i8* @create_kv_packet(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 10, i8* %9, i64 %10, %struct.packet* %11, i8* %12)
ret i8* %13
}

LLVM IR (-O2):
%struct.packet = type { i32 }
@.str = [11 x i8] c"identifier\00"
define i8* @create_identifier_packet(i8* %0, i64 %1, %struct.packet* %2, i8* %3) {
%5 = tail call i8* @create_kv_packet(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 10, i8* %0, i64 %1, %struct.packet* %2, i8* %3)
ret i8* %5
}
/* Variables and functions */
int sendRestart();
int game_restart() { return sendRestart(); }


x86 assembly (clang, -O0):
<game_restart>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sendRestart@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<game_restart>:
xor    %eax,%eax
jmp    1030 <sendRestart@plt>

LLVM IR (-O0):
define i32 @game_restart() {
%1 = call i32 (...) @sendRestart()
ret i32 %1
}

LLVM IR (-O2):
define i32 @game_restart() {
%1 = tail call i32 (...) @sendRestart()
ret i32 %1
}
/* Type definitions */
typedef scalar_t__ wchar_t;

/* Variables and functions */
int pcmp(const void *va, const void *vb) {
  long long n;
  const wchar_t *a, *b;
  a = va;
  b = vb;
  n = (long long)b[0] - (long long)a[0];
  if (n)
    return n;
  return (long long)b[1] - (long long)a[1];
}


x86 assembly (clang, -O0):
<pcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
sub    (%rcx),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1145 <pcmp+0x45>
mov    -0x20(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    1158 <pcmp+0x58>
mov    -0x30(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x28(%rbp),%rcx
sub    0x8(%rcx),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcmp>:
mov    (%rsi),%rax
sub    (%rdi),%rax
je     1109 <pcmp+0x9>
ret
mov    0x8(%rsi),%rax
sub    0x8(%rdi),%rax
ret

LLVM IR (-O0):
define i32 @pcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64*
%8 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i64*
store i64* %10, i64** %7
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i64*
store i64* %12, i64** %8
%13 = load i64*, i64** %8
%14 = getelementptr inbounds i64, i64* %13, i64 0
%15 = load i64, i64* %14
%16 = load i64*, i64** %7
%17 = getelementptr inbounds i64, i64* %16, i64 0
%18 = load i64, i64* %17
%19 = sub nsw i64 %15, %18
store i64 %19, i64* %6
%20 = load i64, i64* %6
%21 = icmp ne i64 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %2
%23 = load i64, i64* %6
%24 = trunc i64 %23 to i32
store i32 %24, i32* %3
br label %34
25: ; preds = %2
%26 = load i64*, i64** %8
%27 = getelementptr inbounds i64, i64* %26, i64 1
%28 = load i64, i64* %27
%29 = load i64*, i64** %7
%30 = getelementptr inbounds i64, i64* %29, i64 1
%31 = load i64, i64* %30
%32 = sub nsw i64 %28, %31
%33 = trunc i64 %32 to i32
store i32 %33, i32* %3
br label %34
34: ; preds = %25, %22
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @pcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = sub nsw i64 %5, %6
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %2
%10 = getelementptr inbounds i8, i8* %1, i64 8
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
%13 = getelementptr inbounds i8, i8* %0, i64 8
%14 = bitcast i8* %13 to i64*
%15 = load i64, i64* %14
%16 = sub nsw i64 %12, %15
br label %17
17: ; preds = %2, %9
%18 = phi i64 [ %16, %9 ], [ %7, %2 ]
%19 = trunc i64 %18 to i32
ret i32 %19
}
void insb(void *buf, unsigned short port, int len) {
  asm volatile("rep insb %3, %%es:(%0)"
               : "=D"(buf), "=c"(len), "=m"(buf)
               : "Nd"(port), "0"(buf), "1"(len));
}


x86 assembly (clang, -O0):
<insb>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xa(%rbp),%dx
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%ecx
rep insb (%dx),%es:(%rdi)
mov    %rdi,-0x8(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insb>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,-0x8(%rsp)
rep insb (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insb(i8* %0, i16 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i32
store i8* %0, i8** %4
store i16 %1, i16* %5
store i32 %2, i32* %6
%7 = load i16, i16* %5
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = call { i8*, i32 } asm sideeffect "rep insb $3, %es:($0)", "={di},={cx},=*m,N{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %4, i16 %7, i8* %8, i32 %9)
%11 = extractvalue { i8*, i32 } %10, 0
%12 = extractvalue { i8*, i32 } %10, 1
store i8* %11, i8** %4
store i32 %12, i32* %6
ret void
}

LLVM IR (-O2):
define void @insb(i8* %0, i16 zeroext %1, i32 %2) {
%4 = alloca i8*
store i8* %0, i8** %4
%5 = call { i8*, i32 } asm sideeffect "rep insb $3, %es:($0)", "={di},={cx},=*m,N{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %4, i16 %1, i8* %0, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lru_cache_free();
void lruCacheFree() { lru_cache_free(); }


x86 assembly (clang, -O0):
<lruCacheFree>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lru_cache_free@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lruCacheFree>:
xor    %eax,%eax
jmp    1030 <lru_cache_free@plt>

LLVM IR (-O0):
define void @lruCacheFree() {
%1 = call i32 (...) @lru_cache_free()
ret void
}

LLVM IR (-O2):
define void @lruCacheFree() {
%1 = tail call i32 (...) @lru_cache_free()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xdc() {
  Assert_real((islower(220) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1105, ("islower should be 0 for 0xdc"));
}


x86 assembly (clang, -O0):
<t_islower_0xdc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdc,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x451,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xdc>:
push   %rax
mov    $0xdc,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x451,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xdc\00"
define void @t_islower_0xdc() {
%1 = call i64 @islower(i32 220)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1105, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xdc\00"
define void @t_islower_0xdc() {
%1 = tail call i64 @islower(i32 220)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1105, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
float Sleef_fmaxf(float x, float y) { return __builtin_fmaxf(x, y); }


x86 assembly (clang, -O0):
<Sleef_fmaxf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm3
movss  -0x8(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordss %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
maxss  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_fmaxf>:
movaps %xmm0,%xmm2
cmpunordss %xmm0,%xmm2
movaps %xmm2,%xmm3
andps  %xmm1,%xmm3
maxss  %xmm0,%xmm1
andnps %xmm1,%xmm2
orps   %xmm3,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @Sleef_fmaxf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @llvm.maxnum.f32(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @Sleef_fmaxf(float %0, float %1) {
%3 = tail call float @llvm.maxnum.f32(float %0, float %1)
ret float %3
}
void WideTimer3B_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<WideTimer3B_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <WideTimer3B_Handler+0x9>
jmp    1109 <WideTimer3B_Handler+0x9>

x86 assembly (clang, -O2):
<WideTimer3B_Handler>:
jmp    1100 <WideTimer3B_Handler>

LLVM IR (-O0):
define void @WideTimer3B_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @WideTimer3B_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char, char);
int main() {
  char init1, init2, init3;
  init1 = 'P';
  init2 = 'S';
  init3 = 'P';
  printf("My initials are : %c.%c.%c\n", init1, init2, init3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x50,-0x5(%rbp)
movb   $0x53,-0x6(%rbp)
movb   $0x50,-0x7(%rbp)
mov    -0x5(%rbp),%cl
mov    -0x6(%rbp),%al
lea    0xec8(%rip),%rdi
movsbl %cl,%esi
movsbl %al,%edx
movsbl -0x7(%rbp),%ecx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x50,%esi
mov    $0x53,%edx
mov    $0x50,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"My initials are : %c.%c.%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i32 0, i32* %1
store i8 80, i8* %2
store i8 83, i8* %3
store i8 80, i8* %4
%5 = load i8, i8* %2
%6 = load i8, i8* %3
%7 = load i8, i8* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8 signext %5, i8 signext %6, i8 signext %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"My initials are : %c.%c.%c\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8 signext 80, i8 signext 83, i8 signext 80)
ret i32 0
}
void g_ascii_tolower() {}


x86 assembly (clang, -O0):
<g_ascii_tolower>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_ascii_tolower>:
ret

LLVM IR (-O0):
define void @g_ascii_tolower() {
ret void
}

LLVM IR (-O2):
define void @g_ascii_tolower() {
ret void
}
void dummy(x, y) int *x;
int y;
{}


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
ret

LLVM IR (-O0):
define void @dummy(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @dummy(i32* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void EPIIntErrorClear(uint32_t ui32Base, uint32_t ui32ErrFlags) {
  ASSERT(ui32Base == 0x400D0000);
  ASSERT(ui32ErrFlags < 0x20);
  (*((volatile uint32_t *)(ui32Base + 0x0000021C))) = ui32ErrFlags;
}


x86 assembly (clang, -O0):
<EPIIntErrorClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x400d0000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x20,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x21c,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIIntErrorClear>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x400d0000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x20,%ebx
setl   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x21c(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @EPIIntErrorClear(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1074593792
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = icmp slt i32 %9, 32
%11 = zext i1 %10 to i32
%12 = call i32 @ASSERT(i32 %11)
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 540
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
store volatile i32 %13, i32* %17
ret void
}

LLVM IR (-O2):
define void @EPIIntErrorClear(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1074593792
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = icmp slt i32 %1, 32
%7 = zext i1 %6 to i32
%8 = tail call i32 @ASSERT(i32 %7)
%9 = add nsw i32 %0, 540
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
store volatile i32 %1, i32* %11
ret void
}
int test_imm_6Euint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x6E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Euint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x6e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Euint64_midword_mem>:
testb  $0x6e,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Euint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 110
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Euint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7208960
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ swscanf(int /*<<< orphan*/ *, char *, long *);
void getCellId_HashTableFile(wchar_t *buffer, long int *cell_id) {
  swscanf(buffer, L"::%ld\n", cell_id);
}


x86 assembly (clang, -O0):
<getCellId_HashTableFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <swscanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCellId_HashTableFile>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <swscanf@plt>

LLVM IR (-O0):
@.str = [7 x i32] [i32 58, i32 58, i32 37, i32 108, i32 100, i32 10, i32 0]
define void @getCellId_HashTableFile(i32* %0, i64* %1) {
%3 = alloca i32*
%4 = alloca i64*
store i32* %0, i32** %3
store i64* %1, i64** %4
%5 = load i32*, i32** %3
%6 = load i64*, i64** %4
%7 = call i32 @swscanf(i32* %5, i8* bitcast ([7 x i32]* @.str to i8*), i64* %6)
ret void
}

LLVM IR (-O2):
@.str = [7 x i32] [i32 58, i32 58, i32 37, i32 108, i32 100, i32 10, i32 0]
define void @getCellId_HashTableFile(i32* %0, i64* %1) {
%3 = tail call i32 @swscanf(i32* %0, i8* bitcast ([7 x i32]* @.str to i8*), i64* %1)
ret void
}
int GetFirstChild(int index) { return 2 * index; }


x86 assembly (clang, -O0):
<GetFirstChild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetFirstChild>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @GetFirstChild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @GetFirstChild(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_read;
int /*<<< orphan*/ syscall(int /*<<< orphan*/, int, void *, size_t);
ssize_t real_read(int fd, void *buf, size_t count) {
  return (syscall(SYS_read, (fd), (buf), (count)));
}


x86 assembly (clang, -O0):
<real_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<real_read>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_read = global i32 0
define i32 @real_read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* @SYS_read
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @syscall(i32 %7, i32 %8, i8* %9, i64 %10)
ret i32 %11
}

LLVM IR (-O2):
@SYS_read = global i32 0
define i32 @real_read(i32 %0, i8* %1, i64 %2) {
%4 = load i32, i32* @SYS_read
%5 = tail call i32 @syscall(i32 %4, i32 %0, i8* %1, i64 %2)
ret i32 %5
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ putchar(char);
int main(void) {
  char ch;
  while ((ch = getchar()) != '\n')
    putchar(ch);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%eax
cmp    $0xa,%eax
je     1153 <main+0x33>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    $0xa,%al
je     1145 <main+0x25>
movsbl %al,%edi
call   1030 <putchar@plt>
jmp    1130 <main+0x10>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i8, i8* %2
%9 = call i32 @putchar(i8 signext %8)
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = icmp eq i8 %1, 10
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = phi i8 [ %6, %3 ], [ %1, %0 ]
%5 = tail call i32 @putchar(i8 signext %4)
%6 = tail call signext i8 (...) @getchar()
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %3
8: ; preds = %3, %0
ret i32 0
}
/* Variables and functions */
int fn_sq_ch_61(char const *);
int fn_al_sq_ch_61(const char *text) {
  int pos = 0;
  pos = fn_sq_ch_61(text);
  if (pos != -1)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_al_sq_ch_61>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fn_sq_ch_61@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1144 <fn_al_sq_ch_61+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_al_sq_ch_61+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_al_sq_ch_61>:
jmp    1030 <fn_sq_ch_61@plt>

LLVM IR (-O0):
define i32 @fn_al_sq_ch_61(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @fn_sq_ch_61(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @fn_al_sq_ch_61(i8* %0) {
%2 = tail call i32 @fn_sq_ch_61(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ android_atomic_add(int, int /*<<< orphan*/ volatile *);
int32_t android_atomic_dec(volatile int32_t *addr) {
  return android_atomic_add(-1, addr);
}


x86 assembly (clang, -O0):
<android_atomic_dec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xffffffff,%edi
call   1030 <android_atomic_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_atomic_dec>:
mov    %rdi,%rsi
mov    $0xffffffff,%edi
jmp    1030 <android_atomic_add@plt>

LLVM IR (-O0):
define i32 @android_atomic_dec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @android_atomic_add(i32 -1, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @android_atomic_dec(i32* %0) {
%2 = tail call i32 @android_atomic_add(i32 -1, i32* %0)
ret i32 %2
}
/* Variables and functions */
void *contract_equal(void const *, void const *, char const *, char const *,
                     char const *, int, char const *, char *);
void *_contract_ensures_equal(const void *a, const void *b, const char *a_s,
                              const char *b_s, const char *file, int line,
                              const char *func) {
  return contract_equal(a, b, a_s, b_s, file, line, func,
                        "%s:%d: %s: Ensures `%s' == `%s' failed.\n");
}


x86 assembly (clang, -O0):
<_contract_ensures_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x2c(%rbp),%r9d
mov    0x10(%rbp),%r10
lea    0xea9(%rip),%rax
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <contract_equal@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_contract_ensures_equal>:
push   %rax
lea    0xee8(%rip),%rax
push   %rax
push   0x18(%rsp)
call   1030 <contract_equal@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"%s:%d: %s: Ensures `%s' == `%s' failed.\0A\00"
define i8* @_contract_ensures_equal(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i32 %5, i8* %6) {
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i32
%14 = alloca i8*
store i8* %0, i8** %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i8* %4, i8** %12
store i32 %5, i32* %13
store i8* %6, i8** %14
%15 = load i8*, i8** %8
%16 = load i8*, i8** %9
%17 = load i8*, i8** %10
%18 = load i8*, i8** %11
%19 = load i8*, i8** %12
%20 = load i32, i32* %13
%21 = load i8*, i8** %14
%22 = call i8* @contract_equal(i8* %15, i8* %16, i8* %17, i8* %18, i8* %19, i32 %20, i8* %21, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i8* %22
}

LLVM IR (-O2):
@.str = [41 x i8] c"%s:%d: %s: Ensures `%s' == `%s' failed.\0A\00"
define i8* @_contract_ensures_equal(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i32 %5, i8* %6) {
%8 = tail call i8* @contract_equal(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i32 %5, i8* %6, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
void xen_smp_intr_free_pv(unsigned int cpu) {}


x86 assembly (clang, -O0):
<xen_smp_intr_free_pv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xen_smp_intr_free_pv>:
ret

LLVM IR (-O0):
define void @xen_smp_intr_free_pv(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @xen_smp_intr_free_pv(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t m172doBitRev(uint8_t val) {
  return (val & 0xC0) | ((val >> 5) & 1) | ((val >> 3) & 2) | ((val >> 1) & 4) |
         ((val << 1) & 8) | ((val << 3) & 0x10) | ((val << 5) & 0x20);
}


x86 assembly (clang, -O0):
<m172doBitRev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xc0,%eax
mov    -0x4(%rbp),%ecx
sar    $0x5,%ecx
and    $0x1,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x3,%ecx
and    $0x2,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x4,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
and    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x3,%ecx
and    $0x10,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x5,%ecx
and    $0x20,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m172doBitRev>:
mov    %edi,%eax
and    $0xc0,%eax
mov    %edi,%ecx
shr    $0x5,%ecx
and    $0x1,%ecx
or     %eax,%ecx
mov    %edi,%eax
shr    $0x3,%eax
and    $0x2,%eax
or     %ecx,%eax
mov    %edi,%ecx
shr    %ecx
and    $0x4,%ecx
or     %eax,%ecx
mov    %edi,%eax
and    $0x4,%eax
lea    (%rcx,%rax,2),%eax
mov    %edi,%ecx
and    $0x2,%ecx
lea    (%rax,%rcx,8),%eax
shl    $0x5,%edi
and    $0x20,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @m172doBitRev(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 192
%5 = load i32, i32* %2
%6 = ashr i32 %5, 5
%7 = and i32 %6, 1
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = ashr i32 %9, 3
%11 = and i32 %10, 2
%12 = or i32 %8, %11
%13 = load i32, i32* %2
%14 = ashr i32 %13, 1
%15 = and i32 %14, 4
%16 = or i32 %12, %15
%17 = load i32, i32* %2
%18 = shl i32 %17, 1
%19 = and i32 %18, 8
%20 = or i32 %16, %19
%21 = load i32, i32* %2
%22 = shl i32 %21, 3
%23 = and i32 %22, 16
%24 = or i32 %20, %23
%25 = load i32, i32* %2
%26 = shl i32 %25, 5
%27 = and i32 %26, 32
%28 = or i32 %24, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @m172doBitRev(i32 %0) {
%2 = and i32 %0, 192
%3 = lshr i32 %0, 5
%4 = and i32 %3, 1
%5 = or i32 %4, %2
%6 = lshr i32 %0, 3
%7 = and i32 %6, 2
%8 = or i32 %5, %7
%9 = lshr i32 %0, 1
%10 = and i32 %9, 4
%11 = or i32 %8, %10
%12 = shl i32 %0, 1
%13 = and i32 %12, 8
%14 = or i32 %11, %13
%15 = shl i32 %0, 3
%16 = and i32 %15, 16
%17 = or i32 %14, %16
%18 = shl i32 %0, 5
%19 = and i32 %18, 32
%20 = or i32 %17, %19
ret i32 %20
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xe6() {
  Assert_real((islower(230) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1155, ("islower should be 0 for 0xe6"));
}


x86 assembly (clang, -O0):
<t_islower_0xe6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe6,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x483,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xe6>:
push   %rax
mov    $0xe6,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x483,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xe6\00"
define void @t_islower_0xe6() {
%1 = call i64 @islower(i32 230)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xe6\00"
define void @t_islower_0xe6() {
%1 = tail call i64 @islower(i32 230)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) { printf("Hello world..\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello world..\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello world..\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int ulz77_encode_file(char const *, char const *, int);
int ulz77_decompress_file(const char *filename_dst, const char *filename_src) {
  return ulz77_encode_file(filename_dst, filename_src, 1);
}


x86 assembly (clang, -O0):
<ulz77_decompress_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <ulz77_encode_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulz77_decompress_file>:
mov    $0x1,%edx
jmp    1030 <ulz77_encode_file@plt>

LLVM IR (-O0):
define i32 @ulz77_decompress_file(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @ulz77_encode_file(i8* %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ulz77_decompress_file(i8* %0, i8* %1) {
%3 = tail call i32 @ulz77_encode_file(i8* %0, i8* %1, i32 1)
ret i32 %3
}
char *langDbgMemRamNormal() { return "Normal"; }


x86 assembly (clang, -O0):
<langDbgMemRamNormal>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langDbgMemRamNormal>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"Normal\00"
define i8* @langDbgMemRamNormal() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"Normal\00"
define i8* @langDbgMemRamNormal() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct ltable {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _resize(struct ltable *, int, int);
void ltable_resize(struct ltable *t, int nasize, int nhsize) {
  _resize(t, nasize, nhsize);
}


x86 assembly (clang, -O0):
<ltable_resize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <_resize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltable_resize>:
jmp    1030 <_resize@plt>

LLVM IR (-O0):
%struct.ltable = type { i32 }
define void @ltable_resize(%struct.ltable* %0, i32 %1, i32 %2) {
%4 = alloca %struct.ltable*
%5 = alloca i32
%6 = alloca i32
store %struct.ltable* %0, %struct.ltable** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.ltable*, %struct.ltable** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @_resize(%struct.ltable* %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
%struct.ltable = type { i32 }
define void @ltable_resize(%struct.ltable* %0, i32 %1, i32 %2) {
%4 = tail call i32 @_resize(%struct.ltable* %0, i32 %1, i32 %2)
ret void
}