xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void USBULPIRegWrite(uint32_t ui32Base, uint8_t ui8Reg, uint8_t ui8Data) {
  ;
  (*((volatile uint8_t *)(ui32Base + 0x00000075))) = ui8Reg;
  (*((volatile uint8_t *)(ui32Base + 0x00000074))) = ui8Data;
  (*((volatile uint8_t *)(ui32Base + 0x00000076))) = 0x00000001;
  while (((*((volatile uint8_t *)(ui32Base + 0x00000076))) & 0x00000002) == 0) {
  }
  (*((volatile uint8_t *)(ui32Base + 0x00000076))) = 0;
}


x86 assembly (clang, -O0):
<USBULPIRegWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x75(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x74(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1,0x76(%rax)
mov    -0x8(%rbp),%rax
mov    0x76(%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
jne    1145 <USBULPIRegWrite+0x45>
jmp    112d <USBULPIRegWrite+0x2d>
mov    -0x8(%rbp),%rax
movl   $0x0,0x76(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBULPIRegWrite>:
mov    %esi,0x75(%rdi)
mov    %edx,0x74(%rdi)
movl   $0x1,0x76(%rdi)
nopl   (%rax)
testl  $0x2,0x76(%rdi)
je     1110 <USBULPIRegWrite+0x10>
movl   $0x0,0x76(%rdi)
ret

LLVM IR (-O0):
define void @USBULPIRegWrite(i64 %0, i32 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i64, i64* %4
%9 = add nsw i64 %8, 117
%10 = inttoptr i64 %9 to i32*
store volatile i32 %7, i32* %10
%11 = load i32, i32* %6
%12 = load i64, i64* %4
%13 = add nsw i64 %12, 116
%14 = inttoptr i64 %13 to i32*
store volatile i32 %11, i32* %14
%15 = load i64, i64* %4
%16 = add nsw i64 %15, 118
%17 = inttoptr i64 %16 to i32*
store volatile i32 1, i32* %17
br label %18
18: ; preds = %25, %3
%19 = load i64, i64* %4
%20 = add nsw i64 %19, 118
%21 = inttoptr i64 %20 to i32*
%22 = load volatile i32, i32* %21
%23 = and i32 %22, 2
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %18
br label %18
26: ; preds = %18
%27 = load i64, i64* %4
%28 = add nsw i64 %27, 118
%29 = inttoptr i64 %28 to i32*
store volatile i32 0, i32* %29
ret void
}

LLVM IR (-O2):
define void @USBULPIRegWrite(i64 %0, i32 %1, i32 %2) {
%4 = add nsw i64 %0, 117
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
%6 = add nsw i64 %0, 116
%7 = inttoptr i64 %6 to i32*
store volatile i32 %2, i32* %7
%8 = add nsw i64 %0, 118
%9 = inttoptr i64 %8 to i32*
store volatile i32 1, i32* %9
br label %10
10: ; preds = %10, %3
%11 = load volatile i32, i32* %9
%12 = and i32 %11, 2
%13 = icmp eq i32 %12, 0
br i1 %13, label %10, label %14
14: ; preds = %10
store volatile i32 0, i32* %9
ret void
}
int test_imm_72int8_reg(signed char val) {
  return ((val) & (-0x72 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_72int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff8e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_72int8_reg>:
test   $0x8e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_72int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -114
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_72int8_reg(i8 signext %0) {
%2 = and i8 %0, -114
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
__attribute__((no)) void *gen_load_locked_si(void *x, void *y) { return x; }


x86 assembly (clang, -O0):
<gen_load_locked_si>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_load_locked_si>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @gen_load_locked_si(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
ret i8* %5
}

LLVM IR (-O2):
define i8* @gen_load_locked_si(i8* readnone returned %0, i8* nocapture readnone %1) {
ret i8* %0
}
/* Variables and functions */
scalar_t__ lw6sys_chr_is_alnum(char);
int _is_host(char c) {
  return (lw6sys_chr_is_alnum(c) || (c == '.') || (c == '-'));
}


x86 assembly (clang, -O0):
<_is_host>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <lw6sys_chr_is_alnum@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1158 <_is_host+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2e,%ecx
mov    %al,-0x2(%rbp)
je     1158 <_is_host+0x48>
movsbl -0x1(%rbp),%eax
cmp    $0x2d,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_host>:
push   %rbx
mov    %edi,%ebx
call   1030 <lw6sys_chr_is_alnum@plt>
test   %rax,%rax
setne  %al
lea    -0x2d(%rbx),%ecx
cmp    $0x2,%cl
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_is_host(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @lw6sys_chr_is_alnum(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 46
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 45
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @_is_host(i8 signext %0) {
%2 = tail call i64 @lw6sys_chr_is_alnum(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = add i8 %0, -45
%5 = icmp ult i8 %4, 2
%6 = or i1 %5, %3
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_message_new_method_errorf(void *call, void **m, const char *name,
                                 const char *format, ...) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_message_new_method_errorf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
neg    %eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_new_method_errorf>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_message_new_method_errorf(i8* %0, i8** %1, i8* %2, i8* %3, ...) {
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8** %1, i8*** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* @EINVAL
%10 = sub nsw i32 0, %9
ret i32 %10
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_message_new_method_errorf(i8* nocapture readnone %0, i8** nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, ...) {
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ SYS_gettid;
int syscall(int /*<<< orphan*/);
int gettid(void) { return syscall(SYS_gettid); }


x86 assembly (clang, -O0):
<gettid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_gettid = global i32 0
define i32 @gettid() {
%1 = load i32, i32* @SYS_gettid
%2 = call i32 @syscall(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@SYS_gettid = global i32 0
define i32 @gettid() {
%1 = load i32, i32* @SYS_gettid
%2 = tail call i32 @syscall(i32 %1)
ret i32 %2
}
long djbhash(const char *str) {
  long hash = 5381;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<djbhash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <djbhash+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <djbhash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<djbhash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <djbhash+0x2d>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <djbhash+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @djbhash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add nsw i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add nsw i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @djbhash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add nsw i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ foo();
void test_firstprivate() {
  int i;
#pragma omp parallel
#pragma omp single firstprivate(
  foo();
#pragma omp parallel
#pragma omp single firstprivate(,
  foo();
#pragma omp parallel
#pragma omp single firstprivate(, )
  foo();
#pragma omp parallel
#pragma omp single firstprivate()
  foo();
#pragma omp parallel
#pragma omp single firstprivate(int)
  foo();
#pragma omp parallel
#pragma omp single firstprivate(0)
  foo();
}


x86 assembly (clang, -O0):
<test_firstprivate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_firstprivate>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <foo@plt>

LLVM IR (-O0):
define void @test_firstprivate() {
%1 = alloca i32
%2 = call i32 (...) @foo()
%3 = call i32 (...) @foo()
%4 = call i32 (...) @foo()
%5 = call i32 (...) @foo()
%6 = call i32 (...) @foo()
%7 = call i32 (...) @foo()
ret void
}

LLVM IR (-O2):
define void @test_firstprivate() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo()
%3 = tail call i32 (...) @foo()
%4 = tail call i32 (...) @foo()
%5 = tail call i32 (...) @foo()
%6 = tail call i32 (...) @foo()
ret void
}
/* Variables and functions */
double frexp(double, int *);
int isnan(double d) {
  int expon = 0;
  double val = frexp(d, &expon);
  if (expon == 1025) {
    if (val == 0.5) {
      return 0;
    } else if (val == -0.5) {
      return 0;
    } else {
      return 1;
    }
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isnan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movsd  -0x10(%rbp),%xmm0
lea    -0x14(%rbp),%rdi
call   1030 <frexp@plt>
movsd  %xmm0,-0x20(%rbp)
cmpl   $0x401,-0x14(%rbp)
jne    11a2 <isnan+0x92>
movsd  -0x20(%rbp),%xmm0
movsd  0xeaf(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    116d <isnan+0x5d>
jp     116d <isnan+0x5d>
movl   $0x0,-0x4(%rbp)
jmp    11a9 <isnan+0x99>
movsd  -0x20(%rbp),%xmm0
movsd  0xe8e(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1196 <isnan+0x86>
jp     1196 <isnan+0x86>
movl   $0x0,-0x4(%rbp)
jmp    11a9 <isnan+0x99>
movl   $0x1,-0x4(%rbp)
jmp    11a9 <isnan+0x99>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnan>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <frexp@plt>
cmpl   $0x401,0x4(%rsp)
sete   %al
ucomisd 0xeca(%rip),%xmm0
setp   %cl
setne  %dl
or     %cl,%dl
and    %al,%dl
ucomisd 0xec0(%rip),%xmm0
setp   %al
setne  %cl
or     %al,%cl
and    %dl,%cl
movzbl %cl,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isnan(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca i32
%5 = alloca double
store double %0, double* %3
store i32 0, i32* %4
%6 = load double, double* %3
%7 = call double @frexp(double %6, i32* %4)
store double %7, double* %5
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 1025
br i1 %9, label %10, label %19
10: ; preds = %1
%11 = load double, double* %5
%12 = fcmp oeq double %11, 5.000000e-01
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 0, i32* %2
br label %20
14: ; preds = %10
%15 = load double, double* %5
%16 = fcmp oeq double %15, -5.000000e-01
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 0, i32* %2
br label %20
18: ; preds = %14
store i32 1, i32* %2
br label %20
19: ; preds = %1
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %17, %13
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @isnan(double %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call double @frexp(double %0, i32* %2)
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 1025
%7 = fcmp une double %4, 5.000000e-01
%8 = select i1 %6, i1 %7, i1 false
%9 = fcmp une double %4, -5.000000e-01
%10 = select i1 %8, i1 %9, i1 false
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printk_char(unsigned short const, char);
void printk_hex_prefix(const unsigned short out) {
  printk_char(out, '0');
  printk_char(out, 'x');
}


x86 assembly (clang, -O0):
<printk_hex_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x30,%esi
movzwl -0x2(%rbp),%edi
call   1030 <printk_char@plt>
mov    $0x78,%esi
movzwl -0x2(%rbp),%edi
call   1030 <printk_char@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printk_hex_prefix>:
push   %rbx
mov    %edi,%ebx
mov    $0x30,%esi
call   1030 <printk_char@plt>
mov    %ebx,%edi
mov    $0x78,%esi
pop    %rbx
jmp    1030 <printk_char@plt>

LLVM IR (-O0):
define void @printk_hex_prefix(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call i32 @printk_char(i16 zeroext %3, i8 signext 48)
%5 = load i16, i16* %2
%6 = call i32 @printk_char(i16 zeroext %5, i8 signext 120)
ret void
}

LLVM IR (-O2):
define void @printk_hex_prefix(i16 zeroext %0) {
%2 = tail call i32 @printk_char(i16 zeroext %0, i8 signext 48)
%3 = tail call i32 @printk_char(i16 zeroext %0, i8 signext 120)
ret void
}
/* Variables and functions */
scalar_t__ isLowercaseLetter(char);
scalar_t__ isUppercaseLetter(char);
int isLetter(char c) {
  if (isLowercaseLetter(c) || isUppercaseLetter(c)) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isLetter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <isLowercaseLetter@plt>
cmp    $0x0,%rax
jne    1154 <isLetter+0x34>
movsbl -0x5(%rbp),%edi
call   1040 <isUppercaseLetter@plt>
cmp    $0x0,%rax
je     1160 <isLetter+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1167 <isLetter+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLetter>:
push   %rbx
mov    %edi,%ebx
call   1030 <isLowercaseLetter@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isLetter+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1040 <isUppercaseLetter@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isLetter(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isLowercaseLetter(i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = call i64 @isUppercaseLetter(i8 signext %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %13
12: ; preds = %7
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @isLetter(i8 signext %0) {
%2 = tail call i64 @isLowercaseLetter(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isUppercaseLetter(i8 signext %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
void highlight_pointer(const int where) {}


x86 assembly (clang, -O0):
<highlight_pointer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<highlight_pointer>:
ret

LLVM IR (-O0):
define void @highlight_pointer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @highlight_pointer(i32 %0) {
ret void
}
int test_imm_DAint64_lowword_reg(long long val) {
  return ((val) & (0xDA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DAint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xda,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DAint64_lowword_reg>:
test   $0xda,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DAint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 218
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_DAint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 218
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct Var {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pA(char *, char const *, char const *, char const *);
void __func_add_ptr(struct Var *avar, const char *areg, const char *lreg,
                    const char *rreg) {
  pA("%s = %s + %s;", areg, lreg, rreg);
}


x86 assembly (clang, -O0):
<__func_add_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    0xec5(%rip),%rdi
call   1030 <pA@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__func_add_ptr>:
lea    0xee9(%rip),%rdi
jmp    1030 <pA@plt>

LLVM IR (-O0):
%struct.Var = type { i32 }
@.str = [14 x i8] c"%s = %s + %s;\00"
define void @__func_add_ptr(%struct.Var* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.Var*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.Var* %0, %struct.Var** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = load i8*, i8** %8
%12 = call i32 @pA(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i8* %11)
ret void
}

LLVM IR (-O2):
%struct.Var = type { i32 }
@.str = [14 x i8] c"%s = %s + %s;\00"
define void @__func_add_ptr(%struct.Var* nocapture readnone %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @pA(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2, i8* %3)
ret void
}
int is_command(char c) {
  return (c == '>' || c == '<' || c == '+' || c == '-' || c == '.' ||
          c == ',' || c == '[' || c == ']');
}


x86 assembly (clang, -O0):
<is_command>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x3e,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x3c,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2d,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2e,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2c,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5b,%ecx
mov    %al,-0x2(%rbp)
je     1195 <is_command+0x95>
movsbl -0x1(%rbp),%eax
cmp    $0x5d,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_command>:
lea    -0x2b(%rdi),%ecx
cmp    $0x30,%cl
ja     1121 <is_command+0x21>
mov    $0x1,%eax
movzbl %cl,%ecx
movabs $0x10000000a000f,%rdx
bt     %rcx,%rdx
jae    1121 <is_command+0x21>
ret
xor    %eax,%eax
cmp    $0x5d,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_command(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 62
br i1 %5, label %34, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 60
br i1 %9, label %34, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 43
br i1 %13, label %34, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 45
br i1 %17, label %34, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 46
br i1 %21, label %34, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 44
br i1 %25, label %34, label %26
26: ; preds = %22
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 91
br i1 %29, label %34, label %30
30: ; preds = %26
%31 = load i8, i8* %2
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 93
br label %34
34: ; preds = %30, %26, %22, %18, %14, %10, %6, %1
%35 = phi i1 [ true, %26 ], [ true, %22 ], [ true, %18 ], [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %33, %30 ]
%36 = zext i1 %35 to i32
ret i32 %36
}

LLVM IR (-O2):
define i32 @is_command(i8 signext %0) {
switch i8 %0, label %2 [
i8 91, label %5
i8 62, label %5
i8 60, label %5
i8 46, label %5
i8 45, label %5
i8 44, label %5
i8 43, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 93
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ copy_file(char const *, char const *);
int /*<<< orphan*/ unlink(char const *);
void move_file(const char *source, const char *destination) {
  copy_file(source, destination);
  unlink(source);
}


x86 assembly (clang, -O0):
<move_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <copy_file@plt>
mov    -0x8(%rbp),%rdi
call   1040 <unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_file>:
push   %rbx
mov    %rdi,%rbx
call   1030 <copy_file@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <unlink@plt>

LLVM IR (-O0):
define void @move_file(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @copy_file(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = call i32 @unlink(i8* %8)
ret void
}

LLVM IR (-O2):
define void @move_file(i8* %0, i8* %1) {
%3 = tail call i32 @copy_file(i8* %0, i8* %1)
%4 = tail call i32 @unlink(i8* %0)
ret void
}
unsigned int alarm(unsigned int x) { return 0; }


x86 assembly (clang, -O0):
<alarm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alarm>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @alarm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @alarm(i32 %0) {
ret i32 0
}
Init_sha1() {}


x86 assembly (clang, -O0):
<Init_sha1>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init_sha1>:
ret

LLVM IR (-O0):
define i32 @Init_sha1() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @Init_sha1() {
ret i32 undef
}
int inicializa_ind_apelido(int ind_apelido[30]) {
  int i = 0;
  for (i = 0; i < 30; i++) {
    ind_apelido[i] = -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<inicializa_ind_apelido>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1e,-0xc(%rbp)
jge    113d <inicializa_ind_apelido+0x3d>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0xffffffff,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <inicializa_ind_apelido+0x16>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inicializa_ind_apelido>:
pcmpeqd %xmm0,%xmm0
movdqu %xmm0,0x60(%rdi)
movdqu %xmm0,0x50(%rdi)
movdqu %xmm0,0x40(%rdi)
movdqu %xmm0,0x30(%rdi)
movdqu %xmm0,0x20(%rdi)
movdqu %xmm0,0x10(%rdi)
movdqu %xmm0,(%rdi)
movq   $0xffffffffffffffff,0x70(%rdi)
ff
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @inicializa_ind_apelido(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 30
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 -1, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @inicializa_ind_apelido(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to i8*
ret i32 0
}
/* Variables and functions */
unsigned long PRCMHIBRegRead(int);
int /*<<< orphan*/ PRCMHIBRegWrite(int, unsigned long);
void PRCMIntEnable(unsigned long ulIntFlags) {
  unsigned long ulRegValue;
  if (ulIntFlags & 0x00004000) {
    (*((volatile unsigned long *)(0x44025000 + 0x00000124))) |= 0x4;
    ulRegValue = PRCMHIBRegRead(0x4402F800 + 0x00000054);
    ulRegValue |= 0x1;
    PRCMHIBRegWrite(0x4402F800 + 0x00000054, ulRegValue);
  }
}


x86 assembly (clang, -O0):
<PRCMIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x4000,%rax
cmp    $0x0,%rax
je     117c <PRCMIntEnable+0x5c>
mov    $0x44025124,%eax
mov    (%rax),%rcx
or     $0x4,%rcx
mov    $0x44025124,%eax
mov    %rcx,(%rax)
mov    $0x4402f854,%edi
call   1040 <PRCMHIBRegRead@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
or     $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x4402f854,%edi
call   1030 <PRCMHIBRegWrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMIntEnable>:
test   $0x4000,%edi
jne    1129 <PRCMIntEnable+0x9>
ret
push   %rax
orq    $0x4,0x44025124
44 04
mov    $0x4402f854,%edi
call   1040 <PRCMHIBRegRead@plt>
or     $0x1,%rax
mov    $0x4402f854,%edi
mov    %rax,%rsi
pop    %rax
jmp    1030 <PRCMHIBRegWrite@plt>

LLVM IR (-O0):
define void @PRCMIntEnable(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 16384
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load volatile i64, i64* inttoptr (i64 1141002532 to i64*)
%9 = or i64 %8, 4
store volatile i64 %9, i64* inttoptr (i64 1141002532 to i64*)
%10 = call i64 @PRCMHIBRegRead(i32 1141045332)
store i64 %10, i64* %3
%11 = load i64, i64* %3
%12 = or i64 %11, 1
store i64 %12, i64* %3
%13 = load i64, i64* %3
%14 = call i32 @PRCMHIBRegWrite(i32 1141045332, i64 %13)
br label %15
15: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @PRCMIntEnable(i64 %0) {
%2 = and i64 %0, 16384
%3 = icmp eq i64 %2, 0
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = load volatile i64, i64* inttoptr (i64 1141002532 to i64*)
%6 = or i64 %5, 4
store volatile i64 %6, i64* inttoptr (i64 1141002532 to i64*)
%7 = tail call i64 @PRCMHIBRegRead(i32 1141045332)
%8 = or i64 %7, 1
%9 = tail call i32 @PRCMHIBRegWrite(i32 1141045332, i64 %8)
br label %10
10: ; preds = %4, %1
ret void
}
long int fib(long int n) {
  if (n == 1)
    return 0;
  else if (n == 2)
    return 1;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jne    1134 <fib+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1178 <fib+0x68>
cmpq   $0x2,-0x10(%rbp)
jne    114c <fib+0x3c>
movq   $0x1,-0x8(%rbp)
jmp    1178 <fib+0x68>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %r14d,%r14d
cmp    $0x1,%rbx
je     113c <fib+0x2c>
cmp    $0x2,%rbx
je     1140 <fib+0x30>
lea    -0x1(%rbx),%rdi
call   1030 <fib@plt>
add    %rax,%r14
add    $0xfffffffffffffffe,%rbx
cmp    $0x1,%rbx
jne    1120 <fib+0x10>
xor    %eax,%eax
jmp    1145 <fib+0x35>
mov    $0x1,%eax
add    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %19
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %19
11: ; preds = %7
%12 = load i64, i64* %3
%13 = sub nsw i64 %12, 1
%14 = call i64 @fib(i64 %13)
%15 = load i64, i64* %3
%16 = sub nsw i64 %15, 2
%17 = call i64 @fib(i64 %16)
%18 = add nsw i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @fib(i64 %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i64 [ 0, %1 ], [ %9, %5 ]
%4 = phi i64 [ %0, %1 ], [ %8, %5 ]
switch i64 %4, label %5 [
i64 1, label %10
i64 2, label %11
]
5: ; preds = %2
%6 = add nsw i64 %4, -1
%7 = tail call i64 @fib(i64 %6)
%8 = add nsw i64 %4, -2
%9 = add nsw i64 %7, %3
br label %2
10: ; preds = %2
br label %11
11: ; preds = %2, %10
%12 = phi i64 [ 0, %10 ], [ 1, %2 ]
%13 = add nsw i64 %12, %3
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ GPIOBaseValid(unsigned long);
void GPIOPinWrite(unsigned long ulPort, unsigned char ucPins,
                  unsigned char ucVal) {
  DEBUG_ASSERT(GPIOBaseValid(ulPort));
  (*((volatile unsigned long *)(ulPort + (0x00000000 + (ucPins << 2))))) =
      ucVal;
}


x86 assembly (clang, -O0):
<GPIOPinWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
movzbl -0xa(%rbp),%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%edx
shl    $0x2,%edx
add    $0x0,%edx
movslq %edx,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinWrite>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %rdi,%rbp
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    %ebx,%eax
mov    %r14d,%ecx
mov    %rax,0x0(%rbp,%rcx,4)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @GPIOPinWrite(i64 %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i64
%5 = alloca i8
%6 = alloca i8
store i64 %0, i64* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i64, i64* %4
%8 = call i32 @GPIOBaseValid(i64 %7)
%9 = call i32 @DEBUG_ASSERT(i32 %8)
%10 = load i8, i8* %6
%11 = zext i8 %10 to i64
%12 = load i64, i64* %4
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = shl i32 %14, 2
%16 = add nsw i32 0, %15
%17 = sext i32 %16 to i64
%18 = add i64 %12, %17
%19 = inttoptr i64 %18 to i64*
store volatile i64 %11, i64* %19
ret void
}

LLVM IR (-O2):
define void @GPIOPinWrite(i64 %0, i8 zeroext %1, i8 zeroext %2) {
%4 = tail call i32 @GPIOBaseValid(i64 %0)
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = zext i8 %2 to i64
%7 = zext i8 %1 to i64
%8 = shl nuw nsw i64 %7, 2
%9 = add i64 %8, %0
%10 = inttoptr i64 %9 to i64*
store volatile i64 %6, i64* %10
ret void
}
/* Variables and functions */
scalar_t__ errno;
double pow(int, double);
double foo_opt(int x, double y) {
  double yy = 0;
  errno = 0;
  yy = pow(x, y * y);
  return 0;
}


x86 assembly (clang, -O0):
<foo_opt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    0x2eb1(%rip),%rax
movq   $0x0,(%rax)
mov    -0x4(%rbp),%edi
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
call   1030 <pow@plt>
movsd  %xmm0,-0x18(%rbp)
xorps  %xmm0,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_opt>:
push   %rax
mov    0x2ec8(%rip),%rax
movq   $0x0,(%rax)
mulsd  %xmm0,%xmm0
call   1030 <pow@plt>
xorpd  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@errno = global i64 0
define double @foo_opt(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
store double 0.000000e+00, double* %5
store i64 0, i64* @errno
%6 = load i32, i32* %3
%7 = load double, double* %4
%8 = load double, double* %4
%9 = fmul double %7, %8
%10 = call double @pow(i32 %6, double %9)
store double %10, double* %5
ret double 0.000000e+00
}

LLVM IR (-O2):
@errno = global i64 0
define double @foo_opt(i32 %0, double %1) {
store i64 0, i64* @errno
%3 = fmul double %1, %1
%4 = tail call double @pow(i32 %0, double %3)
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int _locale_locales(void) {
  puts("C\nPOSIX");
  return 0;
}


x86 assembly (clang, -O0):
<_locale_locales>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_locale_locales>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"C\0APOSIX\00"
define i32 @_locale_locales() {
%1 = call i32 @puts(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"C\0APOSIX\00"
define i32 @_locale_locales() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int int8_t;
typedef int int16_t;

/* Variables and functions */
int get_actual_proper_motion_sigma(const int8_t pm_sigma) {
  int rval = pm_sigma + 128;
  const int16_t lookup_table[5] = {275, 325, 375, 450, 500};
  if (rval >= 251)
    rval = lookup_table[rval - 251];
  return (rval);
}


x86 assembly (clang, -O0):
<get_actual_proper_motion_sigma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%eax
mov    %eax,-0x8(%rbp)
mov    0xee7(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xee4(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xee2(%rip),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0xfb,-0x8(%rbp)
jl     114f <get_actual_proper_motion_sigma+0x4f>
mov    -0x8(%rbp),%eax
sub    $0xfb,%eax
cltq
mov    -0x20(%rbp,%rax,4),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_actual_proper_motion_sigma>:
mov    %edi,%eax
cmp    $0x7b,%edi
jl     1115 <get_actual_proper_motion_sigma+0x15>
add    $0xffffff85,%eax
lea    0xeef(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret
sub    $0xffffff80,%eax
ret

LLVM IR (-O0):
@__const.get_actual_proper_motion_sigma.lookup_table = [5 x i32] [i32 275, i32 325, i32 375, i32 450, i32 500]
define i32 @get_actual_proper_motion_sigma(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [5 x i32]
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 128
store i32 %6, i32* %3
%7 = bitcast [5 x i32]* %4 to i8*
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 251
br i1 %9, label %10, label %16
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 251
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [5 x i32], [5 x i32]* %4, i64 0, i64 %13
%15 = load i32, i32* %14
store i32 %15, i32* %3
br label %16
16: ; preds = %10, %1
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@__const.get_actual_proper_motion_sigma.lookup_table = [5 x i32] [i32 275, i32 325, i32 375, i32 450, i32 500]
define i32 @get_actual_proper_motion_sigma(i32 %0) {
%2 = add nsw i32 %0, 128
%3 = icmp sgt i32 %0, 122
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = add nsw i32 %0, -123
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds [5 x i32], [5 x i32]* @__const.get_actual_proper_motion_sigma.lookup_table, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ %8, %4 ], [ %2, %1 ]
ret i32 %10
}
int mylog2(int n) {
  int logValue = 0;
  if (n == 0)
    return -1;
  else if (n == 1)
    return 0;
  n >>= 1;
  while (n) {
    logValue++;
    n >>= 1;
  }
  return logValue;
}


x86 assembly (clang, -O0):
<mylog2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1124 <mylog2+0x24>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <mylog2+0x6f>
cmpl   $0x1,-0x8(%rbp)
jne    113a <mylog2+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    116f <mylog2+0x6f>
jmp    113f <mylog2+0x3f>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1169 <mylog2+0x69>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1148 <mylog2+0x48>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mylog2>:
test   %edi,%edi
je     111d <mylog2+0x1d>
xor    %eax,%eax
cmp    $0x1,%edi
je     111c <mylog2+0x1c>
mov    %edi,%ecx
nopl   (%rax)
sar    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <mylog2+0x10>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mylog2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %26
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 0, i32* %2
br label %26
12: ; preds = %8
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = ashr i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %19, %13
%17 = load i32, i32* %3
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %24
19: ; preds = %16
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
%22 = load i32, i32* %3
%23 = ashr i32 %22, 1
store i32 %23, i32* %3
br label %16
24: ; preds = %16
%25 = load i32, i32* %4
store i32 %25, i32* %2
br label %26
26: ; preds = %24, %11, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @mylog2(i32 %0) {
switch i32 %0, label %3 [
i32 0, label %9
i32 1, label %2
]
2: ; preds = %1
br label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = ashr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 4
br i1 %8, label %9, label %3
9: ; preds = %3, %1, %2
%10 = phi i32 [ 0, %2 ], [ -1, %1 ], [ %7, %3 ]
ret i32 %10
}
void av_bprint_escape() {}


x86 assembly (clang, -O0):
<av_bprint_escape>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_bprint_escape>:
ret

LLVM IR (-O0):
define void @av_bprint_escape() {
ret void
}

LLVM IR (-O2):
define void @av_bprint_escape() {
ret void
}
/* Variables and functions */
char *git_ptr_error(int);
char *strdup(char const *);
char *git__strdup(const char *s) {
  char *r = strdup(s);
  if (!s)
    return git_ptr_error((-1 - 3));
  return r;
}


x86 assembly (clang, -O0):
<git__strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1157 <git__strdup+0x37>
mov    $0xfffffffc,%edi
call   1030 <git_ptr_error@plt>
mov    %rax,-0x8(%rbp)
jmp    115f <git__strdup+0x3f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<git__strdup>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strdup@plt>
test   %rbx,%rbx
je     1130 <git__strdup+0x10>
pop    %rbx
ret
mov    $0xfffffffc,%edi
pop    %rbx
jmp    1030 <git_ptr_error@plt>

LLVM IR (-O0):
define i8* @git__strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strdup(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = call i8* @git_ptr_error(i32 -4)
store i8* %10, i8** %2
br label %13
11: ; preds = %1
%12 = load i8*, i8** %4
store i8* %12, i8** %2
br label %13
13: ; preds = %11, %9
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
define i8* @git__strdup(i8* %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @git_ptr_error(i32 -4)
br label %6
6: ; preds = %1, %4
%7 = phi i8* [ %5, %4 ], [ %2, %1 ]
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ downheap(int *, int, int /*<<< orphan*/);
int /*<<< orphan*/ heapify(int *, int);
int /*<<< orphan*/ swap(int *, int /*<<< orphan*/, int);
void heapsort(int array[], int size) {
  heapify(array, size);
  for (int i = size - 1; i > 0; i--) {
    swap(array, 0, i);
    downheap(array, i, 0);
  }
}


x86 assembly (clang, -O0):
<heapsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <heapify@plt>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1188 <heapsort+0x58>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
xor    %esi,%esi
call   1050 <swap@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
xor    %edx,%edx
call   1030 <downheap@plt>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1154 <heapsort+0x24>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heapsort>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
call   1040 <heapify@plt>
cmp    $0x2,%ebx
jl     1173 <heapsort+0x43>
add    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
lea    -0x2(%rbx),%ebp
mov    %r14,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1050 <swap@plt>
mov    %r14,%rdi
mov    %ebp,%esi
xor    %edx,%edx
call   1030 <downheap@plt>
add    $0xffffffff,%ebx
cmp    $0x2,%ebx
ja     1150 <heapsort+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @heapsort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = call i32 @heapify(i32* %6, i32 %7)
%9 = load i32, i32* %4
%10 = sub nsw i32 %9, 1
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load i32, i32* %5
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %24
14: ; preds = %11
%15 = load i32*, i32** %3
%16 = load i32, i32* %5
%17 = call i32 @swap(i32* %15, i32 0, i32 %16)
%18 = load i32*, i32** %3
%19 = load i32, i32* %5
%20 = call i32 @downheap(i32* %18, i32 %19, i32 0)
br label %21
21: ; preds = %14
%22 = load i32, i32* %5
%23 = add nsw i32 %22, -1
store i32 %23, i32* %5
br label %11
24: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @heapsort(i32* %0, i32 %1) {
%3 = tail call i32 @heapify(i32* %0, i32 %1)
%4 = icmp sgt i32 %1, 1
br i1 %4, label %6, label %5
5: ; preds = %6, %2
ret void
6: ; preds = %2, %6
%7 = phi i32 [ %8, %6 ], [ %1, %2 ]
%8 = add nsw i32 %7, -1
%9 = tail call i32 @swap(i32* %0, i32 0, i32 %8)
%10 = tail call i32 @downheap(i32* %0, i32 %8, i32 0)
%11 = icmp ugt i32 %7, 2
br i1 %11, label %6, label %5
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int /*<<< orphan*/ throw(char *);
int timeval_to_milliseconds(struct timeval *);
int current_milliseconds() {
  struct timeval current_time;
  if (gettimeofday(&current_time, NULL) == -1) {
    throw("Error getting time");
  }
  return timeval_to_milliseconds(&current_time);
}


x86 assembly (clang, -O0):
<current_milliseconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <gettimeofday@plt>
cmp    $0xffffffff,%eax
jne    115a <current_milliseconds+0x2a>
lea    0xeab(%rip),%rdi
call   1050 <throw@plt>
lea    -0x8(%rbp),%rdi
call   1030 <timeval_to_milliseconds@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<current_milliseconds>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1040 <gettimeofday@plt>
cmp    $0xffffffff,%eax
jne    114c <current_milliseconds+0x1c>
lea    0xeb9(%rip),%rdi
call   1050 <throw@plt>
mov    %rsp,%rdi
call   1030 <timeval_to_milliseconds@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
@.str = [19 x i8] c"Error getting time\00"
define i32 @current_milliseconds() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @throw(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = call i32 @timeval_to_milliseconds(%struct.timeval* %1)
ret i32 %7
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
@.str = [19 x i8] c"Error getting time\00"
define i32 @current_milliseconds() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call i32 @throw(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = call i32 @timeval_to_milliseconds(%struct.timeval* %1)
ret i32 %8
}