xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIGCHLD;
int /*<<< orphan*/ SIG_BLOCK;
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int /*<<< orphan*/ sigismember(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *);
int main() {
  sigset_t mask;
  sigemptyset(&mask);
  sigprocmask(SIG_BLOCK, NULL, &mask);
  if (!sigismember(&mask, SIGCHLD))
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <sigemptyset@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
lea    -0x8(%rbp),%rdx
call   1030 <sigprocmask@plt>
mov    0x2e83(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdi
call   1050 <sigismember@plt>
cmp    $0x0,%eax
jne    1185 <main+0x55>
movl   $0x0,-0x4(%rbp)
jmp    118c <main+0x5c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigemptyset@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <sigprocmask@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1050 <sigismember@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SIG_BLOCK = global i32 0
@SIGCHLD = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @sigemptyset(i32* %2)
%4 = load i32, i32* @SIG_BLOCK
%5 = call i32 @sigprocmask(i32 %4, i32* null, i32* %2)
%6 = load i32, i32* @SIGCHLD
%7 = call i32 @sigismember(i32* %2, i32 %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 0, i32* %1
br label %11
10: ; preds = %0
store i32 1, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@SIG_BLOCK = global i32 0
@SIGCHLD = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigemptyset(i32* %1)
%4 = load i32, i32* @SIG_BLOCK
%5 = call i32 @sigprocmask(i32 %4, i32* null, i32* %1)
%6 = load i32, i32* @SIGCHLD
%7 = call i32 @sigismember(i32* %1, i32 %6)
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
scalar_t__ malloc(int);
char *emptystr() {
  char *str;
  str = (char *)malloc(sizeof(char));
  *str = 0;
  return str;
}


x86 assembly (clang, -O0):
<emptystr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emptystr>:
push   %rax
mov    $0x1,%edi
call   1030 <malloc@plt>
movb   $0x0,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i8* @emptystr() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 1)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
store i8 0, i8* %4
%5 = load i8*, i8** %1
ret i8* %5
}

LLVM IR (-O2):
define i8* @emptystr() {
%1 = tail call i64 @malloc(i32 1)
%2 = inttoptr i64 %1 to i8*
store i8 0, i8* %2
ret i8* %2
}
void main() {
  int x;
  if (x) {
    goto L1;
  } else {
    goto L2;
  }
L1:
  if (x) {
    goto L2;
  } else {
    goto end;
  }
L2:
  if (x) {
    goto L1;
  } else {
    goto end;
  }
end:;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,-0x4(%rbp)
je     1113 <main+0x13>
jmp    1118 <main+0x18>
jmp    112c <main+0x2c>
cmpl   $0x0,-0x4(%rbp)
je     1127 <main+0x27>
jmp    112c <main+0x2c>
jmp    1140 <main+0x40>
cmpl   $0x0,-0x4(%rbp)
je     113b <main+0x3b>
jmp    1118 <main+0x18>
jmp    1140 <main+0x40>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
br label %6
5: ; preds = %0
br label %11
6: ; preds = %14, %4
%7 = load i32, i32* %1
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
br label %11
10: ; preds = %6
br label %16
11: ; preds = %9, %5
%12 = load i32, i32* %1
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %11
br label %6
15: ; preds = %11
br label %16
16: ; preds = %15, %10
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
int execute_recvmmsg() { return 0; }


x86 assembly (clang, -O0):
<execute_recvmmsg>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_recvmmsg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_recvmmsg() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_recvmmsg() {
ret i32 0
}
long double fmodl(long double x, long double div) {
  return __builtin_fmodl(x, div);
}


x86 assembly (clang, -O0):
<fmodl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <fmodl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmodl>:
jmp    1100 <fmodl>

LLVM IR (-O0):
define x86_fp80 @fmodl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call x86_fp80 @fmodl(x86_fp80 %5, x86_fp80 %6)
ret x86_fp80 %7
}

LLVM IR (-O2):
define x86_fp80 @fmodl(x86_fp80 %0, x86_fp80 %1) {
br label %3
3: ; preds = %3, %2
br label %3
}
/* Type definitions */
typedef int volatile uint16_t;

/* Variables and functions */
uint16_t volatile_fetch_xor_u16(volatile uint16_t *dest, uint16_t val) {
  uint16_t result = *dest;
  *dest = result ^ val;
  return result;
}


x86 assembly (clang, -O0):
<volatile_fetch_xor_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
xor    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_xor_u16>:
mov    %esi,-0x4(%rsp)
mov    (%rdi),%eax
mov    %eax,-0x8(%rsp)
mov    -0x8(%rsp),%eax
xor    -0x4(%rsp),%eax
mov    %eax,(%rdi)
mov    -0x8(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @volatile_fetch_xor_u16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
store volatile i32 %7, i32* %5
%8 = load volatile i32, i32* %5
%9 = load volatile i32, i32* %4
%10 = xor i32 %8, %9
%11 = load i32*, i32** %3
store volatile i32 %10, i32* %11
%12 = load volatile i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @volatile_fetch_xor_u16(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store volatile i32 %1, i32* %3
%5 = bitcast i32* %4 to i8*
%6 = load volatile i32, i32* %0
store volatile i32 %6, i32* %4
%7 = load volatile i32, i32* %4
%8 = load volatile i32, i32* %3
%9 = xor i32 %8, %7
store volatile i32 %9, i32* %0
%10 = load volatile i32, i32* %4
ret i32 %10
}
void DMTimerIntStatusClear(unsigned int baseAdd, unsigned int intFlags) {
  (*((volatile unsigned int *)(baseAdd + (0x28)))) =
      (intFlags & ((0x00000004u) | (0x00000002u) | (0x00000001u)));
}


x86 assembly (clang, -O0):
<DMTimerIntStatusClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
and    $0x7,%ecx
mov    -0x4(%rbp),%eax
add    $0x28,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerIntStatusClear>:
and    $0x7,%esi
add    $0x28,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @DMTimerIntStatusClear(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 7
%7 = load i32, i32* %3
%8 = add i32 %7, 40
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
ret void
}

LLVM IR (-O2):
define void @DMTimerIntStatusClear(i32 %0, i32 %1) {
%3 = and i32 %1, 7
%4 = add i32 %0, 40
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 %3, i32* %6
ret void
}
void strcp(char *s, char *t) {
  while (*s++ = *t++)
    ;
}


x86 assembly (clang, -O0):
<strcp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     113b <strcp+0x3b>
jmp    110c <strcp+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcp>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strcp+0x10>
ret

LLVM IR (-O0):
define void @strcp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %12, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = icmp ne i8 %8, 0
br i1 %11, label %12, label %13
12: ; preds = %5
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @strcp(i8* nocapture writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret void
}
double integer(double x) { return (double)(long)x; }


x86 assembly (clang, -O0):
<integer>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%rax
cvtsi2sd %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<integer>:
cvttsd2si %xmm0,%rax
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
ret

LLVM IR (-O0):
define double @integer(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fptosi double %3 to i64
%5 = sitofp i64 %4 to double
ret double %5
}

LLVM IR (-O2):
define double @integer(double %0) {
%2 = fptosi double %0 to i64
%3 = sitofp i64 %2 to double
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void __w_le_u64(const void *p, const uint64_t val) { *((uint64_t *)(p)) = val; }


x86 assembly (clang, -O0):
<__w_le_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__w_le_u64>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @__w_le_u64(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @__w_le_u64(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Init();
void _M2_GC_init(__attribute__((unused)) int argc,
                 __attribute__((unused)) char *argv[]) {
  Init();
}


x86 assembly (clang, -O0):
<_M2_GC_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <Init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_GC_init>:
xor    %eax,%eax
jmp    1030 <Init@plt>

LLVM IR (-O0):
define void @_M2_GC_init(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @Init()
ret void
}

LLVM IR (-O2):
define void @_M2_GC_init(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @Init()
ret void
}
void init_definitions(void) { return; }


x86 assembly (clang, -O0):
<init_definitions>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_definitions>:
ret

LLVM IR (-O0):
define void @init_definitions() {
ret void
}

LLVM IR (-O2):
define void @init_definitions() {
ret void
}
int test_imm_05uint16_reg(unsigned short val) {
  return ((val) & (0x05 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_05uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_05uint16_reg>:
test   $0x5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_05uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 5
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_05uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 5
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void FLASH_IRQHandler() {}


x86 assembly (clang, -O0):
<FLASH_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FLASH_IRQHandler>:
ret

LLVM IR (-O0):
define void @FLASH_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @FLASH_IRQHandler() {
ret void
}
int x44_process_syn(struct mypacket *packet) { return 0; }


x86 assembly (clang, -O0):
<x44_process_syn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x44_process_syn>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mypacket = type opaque
define i32 @x44_process_syn(%struct.mypacket* %0) {
%2 = alloca %struct.mypacket*
store %struct.mypacket* %0, %struct.mypacket** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mypacket = type opaque
define i32 @x44_process_syn(%struct.mypacket* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
size_t recupererTypePotion(char const *);
unsigned int calculerPrixPotionAcheterBoutique(const unsigned int quantite,
                                               const char *typePotion,
                                               unsigned int niveauPotion) {
  static const unsigned int prix[3][2] = {{30, 70}, {20, 60}, {20, 60}};
  return quantite * prix[recupererTypePotion(typePotion)][--niveauPotion];
}


x86 assembly (clang, -O0):
<calculerPrixPotionAcheterBoutique>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <recupererTypePotion@plt>
mov    %rax,%rdx
mov    -0x18(%rbp),%eax
lea    0xec2(%rip),%rcx
shl    $0x3,%rdx
add    %rdx,%rcx
mov    -0x14(%rbp),%edx
add    $0xffffffff,%edx
mov    %edx,-0x14(%rbp)
mov    %edx,%edx
imul   (%rcx,%rdx,4),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculerPrixPotionAcheterBoutique>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <recupererTypePotion@plt>
add    $0xffffffff,%ebx
lea    0xed7(%rip),%rcx
lea    (%rcx,%rax,8),%rax
imul   (%rax,%rbx,4),%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@calculerPrixPotionAcheterBoutique.prix = internal constant [3 x [2 x i32]] [[2 x i32] [i32 30, i32 70], [2 x i32] [i32 20, i32 60], [2 x i32] [i32 20, i32 60]]
define i32 @calculerPrixPotionAcheterBoutique(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = call i64 @recupererTypePotion(i8* %8)
%10 = getelementptr inbounds [3 x [2 x i32]], [3 x [2 x i32]]* @calculerPrixPotionAcheterBoutique.prix, i64 0, i64 %9
%11 = load i32, i32* %6
%12 = add i32 %11, -1
store i32 %12, i32* %6
%13 = zext i32 %12 to i64
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %10, i64 0, i64 %13
%15 = load i32, i32* %14
%16 = mul i32 %7, %15
ret i32 %16
}

LLVM IR (-O2):
@calculerPrixPotionAcheterBoutique.prix = internal unnamed_addr constant [3 x [2 x i32]] [[2 x i32] [i32 30, i32 70], [2 x i32] [i32 20, i32 60], [2 x i32] [i32 20, i32 60]]
define i32 @calculerPrixPotionAcheterBoutique(i32 %0, i8* %1, i32 %2) {
%4 = tail call i64 @recupererTypePotion(i8* %1)
%5 = add i32 %2, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds [3 x [2 x i32]], [3 x [2 x i32]]* @calculerPrixPotionAcheterBoutique.prix, i64 0, i64 %4, i64 %6
%8 = load i32, i32* %7
%9 = mul i32 %8, %0
ret i32 %9
}
/* Variables and functions */
scalar_t__ tolower(int);
char *airToLower(char *str) {
  char *c;
  if (str) {
    c = str;
    while (*c) {
      *c = ((char)(tolower(((int)(*c)))));
      c++;
    }
  }
  return str;
}


x86 assembly (clang, -O0):
<airToLower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1166 <airToLower+0x56>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1161 <airToLower+0x51>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    112f <airToLower+0x1f>
jmp    1166 <airToLower+0x56>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<airToLower>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %rdi,%rdi
je     1146 <airToLower+0x36>
mov    (%r14),%al
test   %al,%al
je     1146 <airToLower+0x36>
lea    0x1(%r14),%rbx
nopw   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <airToLower+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @airToLower(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %22
6: ; preds = %1
%7 = load i8*, i8** %2
store i8* %7, i8** %3
br label %8
8: ; preds = %12, %6
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = call i64 @tolower(i32 %15)
%17 = trunc i64 %16 to i8
%18 = load i8*, i8** %3
store i8 %17, i8* %18
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %8
21: ; preds = %8
br label %22
22: ; preds = %21, %1
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @airToLower(i8* returned %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %6
%7 = phi i8 [ %13, %6 ], [ %4, %3 ]
%8 = phi i8* [ %12, %6 ], [ %0, %3 ]
%9 = sext i8 %7 to i32
%10 = tail call i64 @tolower(i32 %9)
%11 = trunc i64 %10 to i8
store i8 %11, i8* %8
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %6, %3, %1
ret i8* %0
}
int input_map_cbegin(char c) {
  if (c >= '0' && c <= '3')
    return 1;
  else if (c >= '4' && c <= '7')
    return 2;
  else if (c >= '8' && c < '9')
    return 3;
  else
    return 0;
}


x86 assembly (clang, -O0):
<input_map_cbegin>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <input_map_cbegin+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x33,%eax
jg     1130 <input_map_cbegin+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1183 <input_map_cbegin+0x83>
movsbl -0x5(%rbp),%eax
cmp    $0x34,%eax
jl     1156 <input_map_cbegin+0x56>
movsbl -0x5(%rbp),%eax
cmp    $0x37,%eax
jg     1156 <input_map_cbegin+0x56>
movl   $0x2,-0x4(%rbp)
jmp    1183 <input_map_cbegin+0x83>
movsbl -0x5(%rbp),%eax
cmp    $0x38,%eax
jl     117c <input_map_cbegin+0x7c>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jge    117c <input_map_cbegin+0x7c>
movl   $0x3,-0x4(%rbp)
jmp    1183 <input_map_cbegin+0x83>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_map_cbegin>:
mov    %edi,%eax
and    $0xfc,%al
cmp    $0x30,%al
je     1112 <input_map_cbegin+0x12>
cmp    $0x34,%al
jne    1118 <input_map_cbegin+0x18>
mov    $0x2,%eax
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
cmp    $0x38,%dil
sete   %al
lea    (%rax,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @input_map_cbegin(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 51
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %31
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 52
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 55
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 2, i32* %2
br label %31
21: ; preds = %16, %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp sge i32 %23, 56
br i1 %24, label %25, label %30
25: ; preds = %21
%26 = load i8, i8* %3
%27 = sext i8 %26 to i32
%28 = icmp slt i32 %27, 57
br i1 %28, label %29, label %30
29: ; preds = %25
store i32 3, i32* %2
br label %31
30: ; preds = %25, %21
store i32 0, i32* %2
br label %31
31: ; preds = %30, %29, %20, %11
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @input_map_cbegin(i8 signext %0) {
%2 = and i8 %0, -4
switch i8 %2, label %3 [
i8 48, label %7
i8 52, label %6
]
3: ; preds = %1
%4 = icmp eq i8 %0, 56
%5 = select i1 %4, i32 3, i32 0
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %3
%8 = phi i32 [ 1, %1 ], [ %5, %3 ], [ 2, %6 ]
ret i32 %8
}
void XGetSizeHints() {}


x86 assembly (clang, -O0):
<XGetSizeHints>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetSizeHints>:
ret

LLVM IR (-O0):
define void @XGetSizeHints() {
ret void
}

LLVM IR (-O2):
define void @XGetSizeHints() {
ret void
}
void __renderer_software_init() {
  NOT_IMPLEMENTED("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                  "outputs/2022-01-22/02-19-57/repos/rdavison/claytracer/refs/"
                  "heads/master/software_renderer.c",
                  6, __func__);
}


x86 assembly (clang, -O0):
<__renderer_software_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x6,%esi
lea    0xf6d(%rip),%rdx
mov    $0x0,%al
call   1030 <NOT_IMPLEMENTED@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__renderer_software_init>:
lea    0xee9(%rip),%rdi
lea    0xf76(%rip),%rdx
mov    $0x6,%esi
xor    %eax,%eax
jmp    1030 <NOT_IMPLEMENTED@plt>

LLVM IR (-O0):
@.str = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/rdavison/claytracer/refs/heads/master/software_renderer.c\00"
@__func__.__renderer_software_init = [25 x i8] c"__renderer_software_init\00"
define void @__renderer_software_init() {
%1 = call i32 (i8*, i32, i8*, ...) bitcast (i32 (...)* @NOT_IMPLEMENTED to i32 (i8*, i32, i8*, ...)*)(i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str, i64 0, i64 0), i32 6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @__func__.__renderer_software_init, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/rdavison/claytracer/refs/heads/master/software_renderer.c\00"
@__func__.__renderer_software_init = [25 x i8] c"__renderer_software_init\00"
define void @__renderer_software_init() {
%1 = tail call i32 (i8*, i32, i8*, ...) bitcast (i32 (...)* @NOT_IMPLEMENTED to i32 (i8*, i32, i8*, ...)*)(i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str, i64 0, i64 0), i32 6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @__func__.__renderer_software_init, i64 0, i64 0))
ret void
}
/* Variables and functions */
int dev_start();
int cpio_stwr(void) { return (dev_start()); }


x86 assembly (clang, -O0):
<cpio_stwr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dev_start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpio_stwr>:
xor    %eax,%eax
jmp    1030 <dev_start@plt>

LLVM IR (-O0):
define i32 @cpio_stwr() {
%1 = call i32 (...) @dev_start()
ret i32 %1
}

LLVM IR (-O2):
define i32 @cpio_stwr() {
%1 = tail call i32 (...) @dev_start()
ret i32 %1
}
int is_word_char(char c) {
  return c >= 'a' && c <= 'z' || c >= 'A' && c <= 'Z' || c >= '0' && c <= '9' ||
         c == '_';
}


x86 assembly (clang, -O0):
<is_word_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1129 <is_word_char+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    1174 <is_word_char+0x74>
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1148 <is_word_char+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    1174 <is_word_char+0x74>
movsbl -0x1(%rbp),%eax
cmp    $0x30,%eax
jl     1167 <is_word_char+0x67>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x39,%ecx
mov    %al,-0x2(%rbp)
jle    1174 <is_word_char+0x74>
movsbl -0x1(%rbp),%eax
cmp    $0x5f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_word_char>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
lea    -0x30(%rdi),%ecx
cmp    $0xa,%cl
setb   %cl
cmp    $0x5f,%dil
sete   %dl
or     %cl,%dl
or     %al,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @is_word_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %30, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br i1 %17, label %30, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sge i32 %20, 48
br i1 %21, label %22, label %26
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 57
br i1 %25, label %30, label %26
26: ; preds = %22, %18
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 95
br label %30
30: ; preds = %26, %22, %14, %6
%31 = phi i1 [ true, %22 ], [ true, %14 ], [ true, %6 ], [ %29, %26 ]
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @is_word_char(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = icmp eq i8 %0, 95
%9 = or i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Type definitions */
struct utmpx {
  int dummy;
};
struct utmp {
  int dummy;
};

/* Variables and functions */
scalar_t__ getutid(struct utmp const *);
struct utmpx *getutxid(const struct utmpx *utmp_entry) {
  return (struct utmpx *)getutid((const struct utmp *)utmp_entry);
}


x86 assembly (clang, -O0):
<getutxid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getutid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getutxid>:
jmp    1030 <getutid@plt>

LLVM IR (-O0):
%struct.utmpx = type { i32 }
%struct.utmp = type { i32 }
define %struct.utmpx* @getutxid(%struct.utmpx* %0) {
%2 = alloca %struct.utmpx*
store %struct.utmpx* %0, %struct.utmpx** %2
%3 = load %struct.utmpx*, %struct.utmpx** %2
%4 = bitcast %struct.utmpx* %3 to %struct.utmp*
%5 = call i64 @getutid(%struct.utmp* %4)
%6 = inttoptr i64 %5 to %struct.utmpx*
ret %struct.utmpx* %6
}

LLVM IR (-O2):
%struct.utmpx = type { i32 }
%struct.utmp = type { i32 }
define %struct.utmpx* @getutxid(%struct.utmpx* %0) {
%2 = bitcast %struct.utmpx* %0 to %struct.utmp*
%3 = tail call i64 @getutid(%struct.utmp* %2)
%4 = inttoptr i64 %3 to %struct.utmpx*
ret %struct.utmpx* %4
}
/* Variables and functions */
int /*<<< orphan*/ CC2420ReceiveP__CC2420Receive__sfd_dropped();
void CC2420TransmitP__CC2420Receive__sfd_dropped(void) {
  CC2420ReceiveP__CC2420Receive__sfd_dropped();
}


x86 assembly (clang, -O0):
<CC2420TransmitP__CC2420Receive__sfd_dropped>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CC2420ReceiveP__CC2420Receive__sfd_dropped@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420TransmitP__CC2420Receive__sfd_dropped>:
xor    %eax,%eax
jmp    1030 <CC2420ReceiveP__CC2420Receive__sfd_dropped@plt>

LLVM IR (-O0):
define void @CC2420TransmitP__CC2420Receive__sfd_dropped() {
%1 = call i32 (...) @CC2420ReceiveP__CC2420Receive__sfd_dropped()
ret void
}

LLVM IR (-O2):
define void @CC2420TransmitP__CC2420Receive__sfd_dropped() {
%1 = tail call i32 (...) @CC2420ReceiveP__CC2420Receive__sfd_dropped()
ret void
}
/* Variables and functions */
int fun1(int, int);
int fun2(int, int);
int fun3(int a, int b) {
  int c = fun2(a, b);
  return fun1(a, b);
}


x86 assembly (clang, -O0):
<fun3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <fun2@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <fun1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun3>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <fun2@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <fun1@plt>

LLVM IR (-O0):
define i32 @fun3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @fun2(i32 %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @fun1(i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @fun3(i32 %0, i32 %1) {
%3 = tail call i32 @fun2(i32 %0, i32 %1)
%4 = tail call i32 @fun1(i32 %0, i32 %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strstr(char *, char *);
int ebuild_check(char *name) { return !!strstr(name, ".ebuild"); }


x86 assembly (clang, -O0):
<ebuild_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ebuild_check>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strstr@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c".ebuild\00"
define i32 @ebuild_check(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strstr(i8* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@.str = [8 x i8] c".ebuild\00"
define i32 @ebuild_check(i8* %0) {
%2 = tail call i32 @strstr(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void ff_hevc_put_hevc_bi_qpel_hv4_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_hv4_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_hv4_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_hv4_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_hv4_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_channel_map_snprint() {
  printf("NOT IMPLEMENTED:"
         "pa_channel_map_snprint"
         "\n");
}


x86 assembly (clang, -O0):
<pa_channel_map_snprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_channel_map_snprint>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"NOT IMPLEMENTED:pa_channel_map_snprint\0A\00"
define i32 @pa_channel_map_snprint() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [39 x i8] c"NOT IMPLEMENTED:pa_channel_map_snprint\00"
define i32 @pa_channel_map_snprint() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
unsigned short HwMdReadPad(int port) {
  if (port == 0)
    return (*(volatile unsigned short *)0x20004028);
  else if (port == 1)
    return (*(volatile unsigned short *)0x2000402A);
  else
    return 0xF000;
}


x86 assembly (clang, -O0):
<HwMdReadPad>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1122 <HwMdReadPad+0x22>
mov    $0x20004028,%eax
mov    (%rax),%ax
mov    %ax,-0x2(%rbp)
jmp    1143 <HwMdReadPad+0x43>
cmpl   $0x1,-0x8(%rbp)
jne    113d <HwMdReadPad+0x3d>
mov    $0x2000402a,%eax
mov    (%rax),%ax
mov    %ax,-0x2(%rbp)
jmp    1143 <HwMdReadPad+0x43>
movw   $0xf000,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HwMdReadPad>:
cmp    $0x1,%edi
je     1116 <HwMdReadPad+0x16>
mov    $0xf000,%ax
test   %edi,%edi
jne    111e <HwMdReadPad+0x1e>
movzwl 0x20004028,%eax
20
ret
movzwl 0x2000402a,%eax
20
ret

LLVM IR (-O0):
define zeroext i16 @HwMdReadPad(i32 %0) {
%2 = alloca i16
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load volatile i16, i16* inttoptr (i64 536887336 to i16*)
store i16 %7, i16* %2
br label %14
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = load volatile i16, i16* inttoptr (i64 536887338 to i16*)
store i16 %12, i16* %2
br label %14
13: ; preds = %8
store i16 -4096, i16* %2
br label %14
14: ; preds = %13, %11, %6
%15 = load i16, i16* %2
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @HwMdReadPad(i32 %0) {
switch i32 %0, label %6 [
i32 0, label %2
i32 1, label %4
]
2: ; preds = %1
%3 = load volatile i16, i16* inttoptr (i64 536887336 to i16*)
br label %6
4: ; preds = %1
%5 = load volatile i16, i16* inttoptr (i64 536887338 to i16*)
br label %6
6: ; preds = %1, %4, %2
%7 = phi i16 [ %3, %2 ], [ %5, %4 ], [ -4096, %1 ]
ret i16 %7
}
void defaultV(double *src) {
  src[0] = -.4;
  src[1] = .8;
  src[2] = .01;
}


x86 assembly (clang, -O0):
<defaultV>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xefc(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0xee4(%rip),%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<defaultV>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movabs $0x3f847ae147ae147b,%rax
7a 84 3f
mov    %rax,0x10(%rdi)
ret

LLVM IR (-O0):
define void @defaultV(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
store double -4.000000e-01, double* %4
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 1
store double 8.000000e-01, double* %6
%7 = load double*, double** %2
%8 = getelementptr inbounds double, double* %7, i64 2
store double 1.000000e-02, double* %8
ret void
}

LLVM IR (-O2):
define void @defaultV(double* nocapture writeonly %0) {
%2 = bitcast double* %0 to <2 x double>*
store <2 x double> <double -4.000000e-01, double 8.000000e-01>, <2 x double>* %2
%3 = getelementptr inbounds double, double* %0, i64 2
store double 1.000000e-02, double* %3
ret void
}
/* Variables and functions */
int NewClass(int);
int /*<<< orphan*/ bar();
int foo1(void) {
  bar();
  return (NewClass(1));
}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <bar@plt>
mov    $0x1,%edi
call   1030 <NewClass@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
push   %rax
xor    %eax,%eax
call   1040 <bar@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <NewClass@plt>

LLVM IR (-O0):
define i32 @foo1() {
%1 = call i32 (...) @bar()
%2 = call i32 @NewClass(i32 1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @foo1() {
%1 = tail call i32 (...) @bar()
%2 = tail call i32 @NewClass(i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
const char *dataq_autodiscover(void) {
  fprintf(stderr,
          "Sorry, autodiscovery unimplemented.\n"
          "If you're at Kitty Hawk, just specify 'di718b' as the hostname and "
          "let the DHCP\n"
          "server do the work.  Otherwise, you can use the 'DATAQ Instruments "
          "Hardware Manager'\n"
          "utility provided with WinDAQ, or check your DHCP logs for MAC "
          "addresses starting with\n"
          "00:80:A3, or implement "
          "http://wiki.lantronix.com/developer/Lantronix_Discovery_Protocol\n");
  return NULL;
}


x86 assembly (clang, -O0):
<dataq_autodiscover>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dataq_autodiscover>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [376 x i8] c"Sorry, autodiscovery unimplemented.\0AIf you're at Kitty Hawk, just specify 'di718b' as the hostname and let the DHCP\0Aserver do the work. Otherwise, you can use the 'DATAQ Instruments Hardware Manager'\0Autility provided with WinDAQ, or check your DHCP logs for MAC addresses starting with\0A00:80:A3, or implement http://wiki.lantronix.com/developer/Lantronix_Discovery_Protocol\0A\00"
define i8* @dataq_autodiscover() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([376 x i8], [376 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [376 x i8] c"Sorry, autodiscovery unimplemented.\0AIf you're at Kitty Hawk, just specify 'di718b' as the hostname and let the DHCP\0Aserver do the work. Otherwise, you can use the 'DATAQ Instruments Hardware Manager'\0Autility provided with WinDAQ, or check your DHCP logs for MAC addresses starting with\0A00:80:A3, or implement http://wiki.lantronix.com/developer/Lantronix_Discovery_Protocol\0A\00"
define noalias i8* @dataq_autodiscover() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([376 x i8], [376 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int S_ISLNK(int /*<<< orphan*/);
int s_islnk(mode_t mode) { return S_ISLNK(mode); }


x86 assembly (clang, -O0):
<s_islnk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <S_ISLNK@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_islnk>:
jmp    1030 <S_ISLNK@plt>

LLVM IR (-O0):
define i32 @s_islnk(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @S_ISLNK(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @s_islnk(i32 %0) {
%2 = tail call i32 @S_ISLNK(i32 %0)
ret i32 %2
}
int isFullQueue(int begin, int end) { return (begin == 0 && end == (5 - 1)); }


x86 assembly (clang, -O0):
<isFullQueue>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jne    1123 <isFullQueue+0x23>
cmpl   $0x4,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isFullQueue>:
xor    $0x4,%esi
xor    %eax,%eax
or     %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @isFullQueue(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 4
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isFullQueue(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 4
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void RTRandAdvSeed(void) {}


x86 assembly (clang, -O0):
<RTRandAdvSeed>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTRandAdvSeed>:
ret

LLVM IR (-O0):
define void @RTRandAdvSeed() {
ret void
}

LLVM IR (-O2):
define void @RTRandAdvSeed() {
ret void
}
/* Variables and functions */
int find_xb(double, double const *, int, int /*<<< orphan*/);
int find_x(double x, const double a[], int n) { return find_xb(x, a, n, 0); }


x86 assembly (clang, -O0):
<find_x>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
xor    %edx,%edx
call   1030 <find_xb@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_x>:
xor    %edx,%edx
jmp    1030 <find_xb@plt>

LLVM IR (-O0):
define i32 @find_x(double %0, double* %1, i32 %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca i32
store double %0, double* %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double, double* %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = call i32 @find_xb(double %7, double* %8, i32 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @find_x(double %0, double* %1, i32 %2) {
%4 = tail call i32 @find_xb(double %0, double* %1, i32 %2, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ reverse(char *);
int /*<<< orphan*/ stdin;
int main() {
  char sentence[80];
  printf("Enter a line of text:\n");
  fgets(sentence, 80, stdin);
  printf("\nThe line printed backward is:\n");
  reverse(sentence);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
lea    -0x60(%rbp),%rdi
mov    0x2e92(%rip),%rax
mov    (%rax),%edx
mov    $0x50,%esi
call   1050 <fgets@plt>
lea    0xeae(%rip),%rdi
call   1040 <printf@plt>
lea    -0x60(%rbp),%rdi
call   1030 <reverse@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x50,%rsp
lea    0xec4(%rip),%rdi
call   1040 <puts@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x50,%esi
call   1050 <fgets@plt>
lea    0xeb5(%rip),%rdi
call   1040 <puts@plt>
mov    %rbx,%rdi
call   1030 <reverse@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Enter a line of text:\0A\00"
@stdin = global i32 0
@.str.1 = [32 x i8] c"\0AThe line printed backward is:\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [80 x i8]
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 80, i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
%8 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%9 = call i32 @reverse(i8* %8)
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
@str = [22 x i8] c"Enter a line of text:\00"
@str.2 = [31 x i8] c"\0AThe line printed backward is:\00"
define i32 @main() {
%1 = alloca [80 x i8]
%2 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @stdin
%5 = call i32 @fgets(i8* %2, i32 80, i32 %4)
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str.2, i64 0, i64 0))
%7 = call i32 @reverse(i8* %2)
ret i32 0
}
/* Variables and functions */
void *clad_gar_put(void *, size_t, int, size_t, void *);
void *clad_par_put(void *arr, size_t nmemb, size_t index, void *data) {
  return clad_gar_put(arr, nmemb, sizeof(void *), index, data);
}


x86 assembly (clang, -O0):
<clad_par_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    $0x8,%edx
call   1030 <clad_gar_put@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clad_par_put>:
mov    %rcx,%r8
mov    %rdx,%rcx
mov    $0x8,%edx
jmp    1030 <clad_gar_put@plt>

LLVM IR (-O0):
define i8* @clad_par_put(i8* %0, i64 %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i8*, i8** %8
%13 = call i8* @clad_gar_put(i8* %9, i64 %10, i32 8, i64 %11, i8* %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @clad_par_put(i8* %0, i64 %1, i64 %2, i8* %3) {
%5 = tail call i8* @clad_gar_put(i8* %0, i64 %1, i32 8, i64 %2, i8* %3)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ __llvm_profile_write_file();
void writeFileWithoutReturn(void) { __llvm_profile_write_file(); }


x86 assembly (clang, -O0):
<writeFileWithoutReturn>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__llvm_profile_write_file@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeFileWithoutReturn>:
xor    %eax,%eax
jmp    1030 <__llvm_profile_write_file@plt>

LLVM IR (-O0):
define void @writeFileWithoutReturn() {
%1 = call i32 (...) @__llvm_profile_write_file()
ret void
}

LLVM IR (-O2):
define void @writeFileWithoutReturn() {
%1 = tail call i32 (...) @__llvm_profile_write_file()
ret void
}