void _pwmss_clk_enable(unsigned int device_id) {
  if (0 == device_id) {
    (*((volatile unsigned int *)((0x44E00000) + (0xd4)))) |= (0x2u);
    while ((0x2u) != ((*((volatile unsigned int *)((0x44E00000) + (0xd4)))) &
                      (0x00000003u)))
      ;
    while (
        ((0x0u) << (0x00000010u)) !=
        ((*((volatile unsigned int *)((0x44E00000) + (0xd4)))) & (0x00030000u)))
      ;
  } else if (1 == device_id) {
    (*((volatile unsigned int *)((0x44E00000) + (0xcc)))) |= (0x2u);
    while ((0x2u) != ((*((volatile unsigned int *)((0x44E00000) + (0xcc)))) &
                      (0x00000003u)))
      ;
    while (
        ((0x0u) << (0x00000010u)) !=
        ((*((volatile unsigned int *)((0x44E00000) + (0xcc)))) & (0x00030000u)))
      ;
  } else if (2 == device_id) {
    (*((volatile unsigned int *)((0x44E00000) + (0xd8)))) |= (0x2u);
    while ((0x2u) != ((*((volatile unsigned int *)((0x44E00000) + (0xd8)))) &
                      (0x00000003u)))
      ;
    while (
        ((0x0u) << (0x00000010u)) !=
        ((*((volatile unsigned int *)((0x44E00000) + (0xd8)))) & (0x00030000u)))
      ;
  } else {
    ;
  }
}


x86 assembly (clang, -O0):
<_pwmss_clk_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1165 <_pwmss_clk_enable+0x65>
mov    $0x44e000d4,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    $0x44e000d4,%eax
mov    %ecx,(%rax)
mov    $0x44e000d4,%eax
mov    (%rax),%ecx
and    $0x3,%ecx
mov    $0x2,%eax
cmp    %ecx,%eax
je     113f <_pwmss_clk_enable+0x3f>
jmp    1123 <_pwmss_clk_enable+0x23>
jmp    1144 <_pwmss_clk_enable+0x44>
mov    $0x44e000d4,%eax
mov    (%rax),%ecx
and    $0x30000,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1160 <_pwmss_clk_enable+0x60>
jmp    1144 <_pwmss_clk_enable+0x44>
jmp    1236 <_pwmss_clk_enable+0x136>
mov    $0x1,%eax
cmp    -0x4(%rbp),%eax
jne    11c6 <_pwmss_clk_enable+0xc6>
mov    $0x44e000cc,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    $0x44e000cc,%eax
mov    %ecx,(%rax)
mov    $0x44e000cc,%eax
mov    (%rax),%ecx
and    $0x3,%ecx
mov    $0x2,%eax
cmp    %ecx,%eax
je     11a0 <_pwmss_clk_enable+0xa0>
jmp    1184 <_pwmss_clk_enable+0x84>
jmp    11a5 <_pwmss_clk_enable+0xa5>
mov    $0x44e000cc,%eax
mov    (%rax),%ecx
and    $0x30000,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     11c1 <_pwmss_clk_enable+0xc1>
jmp    11a5 <_pwmss_clk_enable+0xa5>
jmp    1231 <_pwmss_clk_enable+0x131>
mov    $0x2,%eax
cmp    -0x4(%rbp),%eax
jne    1227 <_pwmss_clk_enable+0x127>
mov    $0x44e000d8,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    $0x44e000d8,%eax
mov    %ecx,(%rax)
mov    $0x44e000d8,%eax
mov    (%rax),%ecx
and    $0x3,%ecx
mov    $0x2,%eax
cmp    %ecx,%eax
je     1201 <_pwmss_clk_enable+0x101>
jmp    11e5 <_pwmss_clk_enable+0xe5>
jmp    1206 <_pwmss_clk_enable+0x106>
mov    $0x44e000d8,%eax
mov    (%rax),%ecx
and    $0x30000,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1222 <_pwmss_clk_enable+0x122>
jmp    1206 <_pwmss_clk_enable+0x106>
jmp    122c <_pwmss_clk_enable+0x12c>
jmp    122c <_pwmss_clk_enable+0x12c>
jmp    1231 <_pwmss_clk_enable+0x131>
jmp    1236 <_pwmss_clk_enable+0x136>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pwmss_clk_enable>:
cmp    $0x2,%edi
je     113f <_pwmss_clk_enable+0x3f>
cmp    $0x1,%edi
je     116f <_pwmss_clk_enable+0x6f>
test   %edi,%edi
jne    119d <_pwmss_clk_enable+0x9d>
orl    $0x2,0x44e000d4
02
nopw   0x0(%rax,%rax,1)
mov    0x44e000d4,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1120 <_pwmss_clk_enable+0x20>
nop
testl  $0x30000,0x44e000d4
jne    1130 <_pwmss_clk_enable+0x30>
jmp    119d <_pwmss_clk_enable+0x9d>
orl    $0x2,0x44e000d8
02
nopw   0x0(%rax,%rax,1)
mov    0x44e000d8,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1150 <_pwmss_clk_enable+0x50>
nop
testl  $0x30000,0x44e000d8
jne    1160 <_pwmss_clk_enable+0x60>
jmp    119d <_pwmss_clk_enable+0x9d>
orl    $0x2,0x44e000cc
02
nopw   0x0(%rax,%rax,1)
mov    0x44e000cc,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1180 <_pwmss_clk_enable+0x80>
nop
testl  $0x30000,0x44e000cc
jne    1190 <_pwmss_clk_enable+0x90>
ret

LLVM IR (-O0):
define void @_pwmss_clk_enable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 0, %3
br i1 %4, label %5, label %20
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%7 = or i32 %6, 2
store volatile i32 %7, i32* inttoptr (i64 1155530964 to i32*)
br label %8
8: ; preds = %12, %5
%9 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%10 = and i32 %9, 3
%11 = icmp ne i32 2, %10
br i1 %11, label %12, label %13
12: ; preds = %8
br label %8
13: ; preds = %8
br label %14
14: ; preds = %18, %13
%15 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%16 = and i32 %15, 196608
%17 = icmp ne i32 0, %16
br i1 %17, label %18, label %19
18: ; preds = %14
br label %14
19: ; preds = %14
br label %59
20: ; preds = %1
%21 = load i32, i32* %2
%22 = icmp eq i32 1, %21
br i1 %22, label %23, label %38
23: ; preds = %20
%24 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%25 = or i32 %24, 2
store volatile i32 %25, i32* inttoptr (i64 1155530956 to i32*)
br label %26
26: ; preds = %30, %23
%27 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%28 = and i32 %27, 3
%29 = icmp ne i32 2, %28
br i1 %29, label %30, label %31
30: ; preds = %26
br label %26
31: ; preds = %26
br label %32
32: ; preds = %36, %31
%33 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%34 = and i32 %33, 196608
%35 = icmp ne i32 0, %34
br i1 %35, label %36, label %37
36: ; preds = %32
br label %32
37: ; preds = %32
br label %58
38: ; preds = %20
%39 = load i32, i32* %2
%40 = icmp eq i32 2, %39
br i1 %40, label %41, label %56
41: ; preds = %38
%42 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%43 = or i32 %42, 2
store volatile i32 %43, i32* inttoptr (i64 1155530968 to i32*)
br label %44
44: ; preds = %48, %41
%45 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%46 = and i32 %45, 3
%47 = icmp ne i32 2, %46
br i1 %47, label %48, label %49
48: ; preds = %44
br label %44
49: ; preds = %44
br label %50
50: ; preds = %54, %49
%51 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%52 = and i32 %51, 196608
%53 = icmp ne i32 0, %52
br i1 %53, label %54, label %55
54: ; preds = %50
br label %50
55: ; preds = %50
br label %57
56: ; preds = %38
br label %57
57: ; preds = %56, %55
br label %58
58: ; preds = %57, %37
br label %59
59: ; preds = %58, %19
ret void
}

LLVM IR (-O2):
define void @_pwmss_clk_enable(i32 %0) {
switch i32 %0, label %35 [
i32 0, label %2
i32 1, label %13
i32 2, label %24
]
2: ; preds = %1
%3 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%4 = or i32 %3, 2
store volatile i32 %4, i32* inttoptr (i64 1155530964 to i32*)
br label %5
5: ; preds = %5, %2
%6 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%7 = and i32 %6, 3
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %5
9: ; preds = %5, %9
%10 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%11 = and i32 %10, 196608
%12 = icmp eq i32 %11, 0
br i1 %12, label %35, label %9
13: ; preds = %1
%14 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%15 = or i32 %14, 2
store volatile i32 %15, i32* inttoptr (i64 1155530956 to i32*)
br label %16
16: ; preds = %16, %13
%17 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%18 = and i32 %17, 3
%19 = icmp eq i32 %18, 2
br i1 %19, label %20, label %16
20: ; preds = %16, %20
%21 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%22 = and i32 %21, 196608
%23 = icmp eq i32 %22, 0
br i1 %23, label %35, label %20
24: ; preds = %1
%25 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%26 = or i32 %25, 2
store volatile i32 %26, i32* inttoptr (i64 1155530968 to i32*)
br label %27
27: ; preds = %27, %24
%28 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%29 = and i32 %28, 3
%30 = icmp eq i32 %29, 2
br i1 %30, label %31, label %27
31: ; preds = %27, %31
%32 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%33 = and i32 %32, 196608
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %31
35: ; preds = %31, %20, %9, %1
ret void
}