xunge/DecIR huggingface dataset:
void daily_log_reset(void) {}


x86 assembly (clang, -O0):
<daily_log_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<daily_log_reset>:
ret

LLVM IR (-O0):
define void @daily_log_reset() {
ret void
}

LLVM IR (-O2):
define void @daily_log_reset() {
ret void
}
/* Variables and functions */
int matN_getIndex(int const, int const, int);
int mat4f_getIndex(const int row, const int col) {
  return matN_getIndex(row, col, 4);
}


x86 assembly (clang, -O0):
<mat4f_getIndex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x4,%edx
call   1030 <matN_getIndex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat4f_getIndex>:
mov    $0x4,%edx
jmp    1030 <matN_getIndex@plt>

LLVM IR (-O0):
define i32 @mat4f_getIndex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @matN_getIndex(i32 %5, i32 %6, i32 4)
ret i32 %7
}

LLVM IR (-O2):
define i32 @mat4f_getIndex(i32 %0, i32 %1) {
%3 = tail call i32 @matN_getIndex(i32 %0, i32 %1, i32 4)
ret i32 %3
}
/* Variables and functions */
char *strchr(char *, int);
int MySAR_copy_until(char *from, int delimiter) {
  char *target = strchr(from, delimiter);
  if (target == NULL)
    return 0;
  return (int)(target - from);
}


x86 assembly (clang, -O0):
<MySAR_copy_until>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1146 <MySAR_copy_until+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1154 <MySAR_copy_until+0x44>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MySAR_copy_until>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strchr@plt>
mov    %eax,%edx
sub    %ebx,%edx
xor    %ecx,%ecx
test   %rax,%rax
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @MySAR_copy_until(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i8* @strchr(i8* %7, i32 %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 0, i32* %3
br label %20
13: ; preds = %2
%14 = load i8*, i8** %6
%15 = load i8*, i8** %4
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
%19 = trunc i64 %18 to i32
store i32 %19, i32* %3
br label %20
20: ; preds = %13, %12
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @MySAR_copy_until(i8* %0, i32 %1) {
%3 = tail call i8* @strchr(i8* dereferenceable(1) %0, i32 %1)
%4 = icmp eq i8* %3, null
%5 = ptrtoint i8* %3 to i64
%6 = ptrtoint i8* %0 to i64
%7 = sub i64 %5, %6
%8 = trunc i64 %7 to i32
%9 = select i1 %4, i32 0, i32 %8
ret i32 %9
}
int test_imm_2Cuint32_reg(unsigned int val) {
  return ((val) & (0x2C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Cuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x2c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Cuint32_reg>:
test   $0x2c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Cuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 44
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_2Cuint32_reg(i32 %0) {
%2 = and i32 %0, 44
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int audioInit() {}


x86 assembly (clang, -O0):
<audioInit>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<audioInit>:
ret

LLVM IR (-O0):
define i32 @audioInit() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @audioInit() {
ret i32 undef
}
char f0(void) { return 0; }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @f0() {
ret i8 0
}

LLVM IR (-O2):
define signext i8 @f0() {
ret i8 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t next_pow2(uint32_t v) {
  v--;
  v |= v >> 1;
  v |= v >> 2;
  v |= v >> 4;
  v |= v >> 8;
  v |= v >> 16;
  v++;
  return v;
}


x86 assembly (clang, -O0):
<next_pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_pow2>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
sar    %ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
sar    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
sar    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @next_pow2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = add nsw i32 %25, 1
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @next_pow2(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = ashr i32 %2, 1
%4 = or i32 %3, %2
%5 = ashr i32 %4, 2
%6 = or i32 %5, %4
%7 = ashr i32 %6, 4
%8 = or i32 %7, %6
%9 = ashr i32 %8, 8
%10 = or i32 %9, %8
%11 = ashr i32 %10, 16
%12 = or i32 %11, %10
%13 = add nsw i32 %12, 1
ret i32 %13
}
int main(void) {
#pragma acc parallel vector_length(128)
  {
#pragma acc loop vector
    for (int i = 0; i < 1024; i++)
      ;
#pragma acc loop vector
    for (int i = 0; i < 1024; i++)
      ;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x400,-0x8(%rbp)
jge    1132 <main+0x32>
jmp    1124 <main+0x24>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
movl   $0x0,-0xc(%rbp)
cmpl   $0x400,-0xc(%rbp)
jge    1159 <main+0x59>
jmp    114b <main+0x4b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1139 <main+0x39>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %8, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 1024
br i1 %6, label %7, label %11
7: ; preds = %4
br label %8
8: ; preds = %7
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %4
11: ; preds = %4
store i32 0, i32* %3
br label %12
12: ; preds = %16, %11
%13 = load i32, i32* %3
%14 = icmp slt i32 %13, 1024
br i1 %14, label %15, label %19
15: ; preds = %12
br label %16
16: ; preds = %15
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %12
19: ; preds = %12
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
__attribute__((always_)) unsigned long readq(const volatile void *addr) {
  unsigned long ret;
  asm volatile("mov"
               "q"
               " %1,%0"
               : "=r"(ret)
               : "m"(*(volatile unsigned long *)addr)
               : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<readq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readq>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @readq(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i64*
%6 = call i64 asm sideeffect "movq $1,$0", "=r,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %5)
store i64 %6, i64* %3
%7 = load i64, i64* %3
ret i64 %7
}

LLVM IR (-O2):
define i64 @readq(i8* %0) {
%2 = bitcast i8* %0 to i64*
%3 = tail call i64 asm sideeffect "movq $1,$0", "=r,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %2)
ret i64 %3
}
/* Variables and functions */
scalar_t__ flushentry();
void *malloc(int);
void *Malloc(int size) {
  void *retval;
  while ((retval = malloc(size)) == NULL)
    if (flushentry() == 0)
      break;
  return (retval);
}


x86 assembly (clang, -O0):
<Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    115c <Malloc+0x3c>
mov    $0x0,%al
call   1030 <flushentry@plt>
cmp    $0x0,%rax
jne    1157 <Malloc+0x37>
jmp    115c <Malloc+0x3c>
jmp    112b <Malloc+0xb>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Malloc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ebp,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114b <Malloc+0x2b>
xor    %eax,%eax
call   1030 <flushentry@plt>
test   %rax,%rax
jne    1130 <Malloc+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @Malloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %2
%6 = call i8* @malloc(i32 %5)
store i8* %6, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i64 (...) @flushentry()
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
br label %13
12: ; preds = %8
br label %4
13: ; preds = %11, %4
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @Malloc(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = tail call i8* @malloc(i32 %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i64 (...) @flushentry()
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %2
8: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int rom_present(char *);
int s3_v7mirage_86c801_available(void) {
  return rom_present(L"roms/video/s3/v7mirage.vbi");
}


x86 assembly (clang, -O0):
<s3_v7mirage_86c801_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3_v7mirage_86c801_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [27 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 47, i32 118, i32 55, i32 109, i32 105, i32 114, i32 97, i32 103, i32 101, i32 46, i32 118, i32 98, i32 105, i32 0]
define i32 @s3_v7mirage_86c801_available() {
%1 = call i32 @rom_present(i8* bitcast ([27 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [27 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 47, i32 118, i32 55, i32 109, i32 105, i32 114, i32 97, i32 103, i32 101, i32 46, i32 118, i32 98, i32 105, i32 0]
define i32 @s3_v7mirage_86c801_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([27 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
double pow(double, double);
double Moffat(double rda, double nb, double junk) {
  junk = 1;
  return pow(junk + rda * rda, nb);
}


x86 assembly (clang, -O0):
<Moffat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xed1(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <pow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Moffat>:
mulsd  %xmm0,%xmm0
addsd  0xee4(%rip),%xmm0
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @Moffat(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store double 1.000000e+00, double* %6
%7 = load double, double* %6
%8 = load double, double* %4
%9 = load double, double* %4
%10 = call double @llvm.fmuladd.f64(double %8, double %9, double %7)
%11 = load double, double* %5
%12 = call double @pow(double %10, double %11)
ret double %12
}

LLVM IR (-O2):
define double @Moffat(double %0, double %1, double %2) {
%4 = tail call double @llvm.fmuladd.f64(double %0, double %0, double 1.000000e+00)
%5 = tail call double @pow(double %4, double %1)
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, size_t);
int main(int argc, char const *argv[]) {
  int n = 0;
  size_t intsize;
  intsize = sizeof(int);
  printf("n = %d, n as %zd bytes: all ints have %zd bytes.\n", n, sizeof n,
         intsize);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movq   $0x4,-0x20(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x20(%rbp),%rcx
lea    0xebd(%rip),%rdi
mov    $0x4,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%ecx
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [50 x i8] c"n = %d, n as %zd bytes: all ints have %zd bytes.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i64 4, i64* %7
%8 = load i32, i32* %6
%9 = load i64, i64* %7
%10 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 %8, i32 4, i64 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [50 x i8] c"n = %d, n as %zd bytes: all ints have %zd bytes.\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 0, i32 4, i64 4)
ret i32 0
}
double pow2(double x) { return x * x; }


x86 assembly (clang, -O0):
<pow2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow2>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @pow2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @pow2(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Type definitions */
struct cube {
  int dummy;
};

/* Variables and functions */
void *find_key(struct cube *, int, short *, short *, short *, short *);
void *get_key(struct cube *cube, int key) {
  short w, x, y, z;
  return find_key(cube, key, &w, &x, &y, &z);
}


x86 assembly (clang, -O0):
<get_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    -0xe(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x12(%rbp),%r8
lea    -0x14(%rbp),%r9
call   1030 <find_key@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_key>:
push   %rax
lea    0x6(%rsp),%rdx
lea    0x4(%rsp),%rcx
lea    0x2(%rsp),%r8
mov    %rsp,%r9
call   1030 <find_key@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.cube = type { i32 }
define i8* @get_key(%struct.cube* %0, i32 %1) {
%3 = alloca %struct.cube*
%4 = alloca i32
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
store %struct.cube* %0, %struct.cube** %3
store i32 %1, i32* %4
%9 = load %struct.cube*, %struct.cube** %3
%10 = load i32, i32* %4
%11 = call i8* @find_key(%struct.cube* %9, i32 %10, i16* %5, i16* %6, i16* %7, i16* %8)
ret i8* %11
}

LLVM IR (-O2):
%struct.cube = type { i32 }
define i8* @get_key(%struct.cube* %0, i32 %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
%7 = bitcast i16* %3 to i8*
%8 = bitcast i16* %4 to i8*
%9 = bitcast i16* %5 to i8*
%10 = bitcast i16* %6 to i8*
%11 = call i8* @find_key(%struct.cube* %0, i32 %1, i16* %3, i16* %4, i16* %5, i16* %6)
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
int fibo(int);
int main() {
  int x = 7;
  int result = fibo(x);
  if (result != 13) {
    __VERIFIER_error();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <fibo@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xd,-0xc(%rbp)
je     1152 <main+0x32>
mov    $0x0,%al
call   1030 <__VERIFIER_error@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
call   1040 <fibo@plt>
cmp    $0xd,%eax
je     1137 <main+0x17>
xor    %eax,%eax
call   1030 <__VERIFIER_error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 7, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fibo(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 13
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 (...) @__VERIFIER_error()
br label %10
10: ; preds = %8, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fibo(i32 7)
%2 = icmp eq i32 %1, 13
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @__VERIFIER_error()
br label %5
5: ; preds = %3, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ trim(char *);
int main() {
  char s[100];
  gets(s);
  printf("[%s] -> ", s);
  trim(s);
  printf("[%s]", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x70(%rbp),%rdi
call   1050 <gets@plt>
lea    -0x70(%rbp),%rsi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
lea    -0x70(%rbp),%rdi
call   1040 <trim@plt>
lea    -0x70(%rbp),%rsi
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <gets@plt>
lea    0xeb9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <trim@plt>
lea    0xeab(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"[%s] -> \00"
@.str.1 = [5 x i8] c"[%s]\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%4 = call i32 @gets(i8* %3)
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%8 = call i32 @trim(i8* %7)
%9 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%10 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"[%s] -> \00"
@.str.1 = [5 x i8] c"[%s]\00"
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = call i32 @gets(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %2)
%5 = call i32 @trim(i8* %2)
%6 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ handle_XFSZ(int /*<<< orphan*/);
int gen_XFSZ() {
  handle_XFSZ(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_XFSZ>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_XFSZ@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_XFSZ>:
push   %rax
xor    %edi,%edi
call   1030 <handle_XFSZ@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_XFSZ() {
%1 = call i32 @handle_XFSZ(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_XFSZ() {
%1 = tail call i32 @handle_XFSZ(i32 0)
ret i32 0
}
void av_aes_ctr_set_random_iv() {}


x86 assembly (clang, -O0):
<av_aes_ctr_set_random_iv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_aes_ctr_set_random_iv>:
ret

LLVM IR (-O0):
define void @av_aes_ctr_set_random_iv() {
ret void
}

LLVM IR (-O2):
define void @av_aes_ctr_set_random_iv() {
ret void
}
void XAddHosts() {}


x86 assembly (clang, -O0):
<XAddHosts>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XAddHosts>:
ret

LLVM IR (-O0):
define void @XAddHosts() {
ret void
}

LLVM IR (-O2):
define void @XAddHosts() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *xmalloc(size_t);
char *xstrdup(const char *str) {
  size_t len = (strlen(str) + 1);
  char *ptr = xmalloc(len);
  memcpy(ptr, str, len);
  return ptr;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1050 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1050 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = load i8*, i8** %2
%13 = load i64, i64* %3
%14 = call i32 @memcpy(i8* %11, i8* %12, i64 %13)
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @xmalloc(i64 %4)
%6 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ xsi_register_didat(char *, char *);
extern void work_a_3073701636_1075909370_init() {
  xsi_register_didat(
      "work_a_3073701636_1075909370",
      "isim/Combined_tb_isim_beh.exe.sim/work/a_3073701636_1075909370.didat");
}


x86 assembly (clang, -O0):
<work_a_3073701636_1075909370_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xefb(%rip),%rsi
call   1030 <xsi_register_didat@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<work_a_3073701636_1075909370_init>:
lea    0xee9(%rip),%rdi
lea    0xeff(%rip),%rsi
jmp    1030 <xsi_register_didat@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"work_a_3073701636_1075909370\00"
@.str.1 = [69 x i8] c"isim/Combined_tb_isim_beh.exe.sim/work/a_3073701636_1075909370.didat\00"
define void @work_a_3073701636_1075909370_init() {
%1 = call i32 @xsi_register_didat(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"work_a_3073701636_1075909370\00"
@.str.1 = [69 x i8] c"isim/Combined_tb_isim_beh.exe.sim/work/a_3073701636_1075909370.didat\00"
define void @work_a_3073701636_1075909370_init() {
%1 = tail call i32 @xsi_register_didat(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
void end_graphics(void) { endwin(); }


x86 assembly (clang, -O0):
<end_graphics>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_graphics>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @end_graphics() {
%1 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @end_graphics() {
%1 = tail call i32 (...) @endwin()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int, int, int);
void printPrism(int *prism) {
  printf("%d\t%d\t%d\t%d\t%d\t%d\n", prism[0], prism[1], prism[2], prism[3],
         prism[4], prism[5]);
}


x86 assembly (clang, -O0):
<printPrism>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%r8d
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%r9d
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
lea    0xeb2(%rip),%rdi
mov    %eax,(%rsp)
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printPrism>:
push   %rax
mov    (%rdi),%esi
mov    0x4(%rdi),%edx
mov    0x8(%rdi),%ecx
mov    0xc(%rdi),%r8d
mov    0x10(%rdi),%r9d
mov    0x14(%rdi),%eax
mov    %eax,(%rsp)
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"%d\09%d\09%d\09%d\09%d\09%d\0A\00"
define void @printPrism(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = load i32, i32* %7
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 2
%11 = load i32, i32* %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 3
%14 = load i32, i32* %13
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 4
%17 = load i32, i32* %16
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i64 5
%20 = load i32, i32* %19
%21 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %8, i32 %11, i32 %14, i32 %17, i32 %20)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"%d\09%d\09%d\09%d\09%d\09%d\0A\00"
define void @printPrism(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = getelementptr inbounds i32, i32* %0, i64 2
%6 = load i32, i32* %5
%7 = getelementptr inbounds i32, i32* %0, i64 3
%8 = load i32, i32* %7
%9 = getelementptr inbounds i32, i32* %0, i64 4
%10 = load i32, i32* %9
%11 = getelementptr inbounds i32, i32* %0, i64 5
%12 = load i32, i32* %11
%13 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %4, i32 %6, i32 %8, i32 %10, i32 %12)
ret void
}
int kol_process_kill_pid(unsigned process) {
  asm("int $0x40" ::"a"(18), "b"(18), "c"(process));
}


x86 assembly (clang, -O0):
<kol_process_kill_pid>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    $0x12,%ebx
mov    %ebx,%eax
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_process_kill_pid>:
push   %rbx
mov    %edi,%ecx
mov    $0x12,%eax
mov    $0x12,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_process_kill_pid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @kol_process_kill_pid(i32 %0) {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 18, i32 18, i32 %0)
ret i32 undef
}
void main() {
  int x;
  x = 2;
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x2,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
store i32 2, i32* %1
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void b() {
  int x = 1;
  printf("%d\n", (x + 1));
}


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%esi
add    $0x1,%esi
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
lea    0xee9(%rip),%rdi
mov    $0x2,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @b() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @b() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}
/* Type definitions */
struct stat {
  unsigned long long st_size;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
unsigned long long exm_file_size_get(const char *filename) {
  struct stat buf;
  if (stat(filename, &buf) != 0)
    return 0;
  return buf.st_size;
}


x86 assembly (clang, -O0):
<exm_file_size_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
je     1140 <exm_file_size_get+0x30>
movq   $0x0,-0x8(%rbp)
jmp    1148 <exm_file_size_get+0x38>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exm_file_size_get>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
jne    1124 <exm_file_size_get+0x14>
mov    (%rsp),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i64 @exm_file_size_get(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 0, i64* %2
br label %12
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i64, i64* %10
store i64 %11, i64* %2
br label %12
12: ; preds = %9, %8
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i64 @exm_file_size_get(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = select i1 %5, i64 %7, i64 0
ret i64 %8
}
PSIGNAL(sig, func) int *sig, *func;
{ return ((long)signal(*sig, *func)); }


x86 assembly (clang, -O0):
<PSIGNAL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    $0x0,%al
call   1030 <signal@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PSIGNAL>:
mov    (%rdi),%edi
mov    (%rsi),%esi
xor    %eax,%eax
jmp    1030 <signal@plt>

LLVM IR (-O0):
define i32 @PSIGNAL(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = call i32 (i32, i32, ...) bitcast (i32 (...)* @signal to i32 (i32, i32, ...)*)(i32 %6, i32 %8)
%10 = sext i32 %9 to i64
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @PSIGNAL(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @signal to i32 (i32, i32, ...)*)(i32 %3, i32 %4)
ret i32 %5
}
/* Type definitions */
struct resist_setup_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ resist_setup_init(struct resist_setup_t **);
void resist_setup_init_default(struct resist_setup_t **stp) {
  resist_setup_init(stp);
}


x86 assembly (clang, -O0):
<resist_setup_init_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <resist_setup_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resist_setup_init_default>:
jmp    1030 <resist_setup_init@plt>

LLVM IR (-O0):
%struct.resist_setup_t = type { i32 }
define void @resist_setup_init_default(%struct.resist_setup_t** %0) {
%2 = alloca %struct.resist_setup_t**
store %struct.resist_setup_t** %0, %struct.resist_setup_t*** %2
%3 = load %struct.resist_setup_t**, %struct.resist_setup_t*** %2
%4 = call i32 @resist_setup_init(%struct.resist_setup_t** %3)
ret void
}

LLVM IR (-O2):
%struct.resist_setup_t = type { i32 }
define void @resist_setup_init_default(%struct.resist_setup_t** %0) {
%2 = tail call i32 @resist_setup_init(%struct.resist_setup_t** %0)
ret void
}
unsigned int premul_nozero(unsigned int val, unsigned char alpha) {
  if (alpha == 0xFF)
    return val;
  else
    return ((((val & 0x00FF00FF) * alpha) >> 8) & 0x00FF00FF) |
           ((((val & 0xFF00FF00) >> 8) * alpha) & 0xFF00FF00);
}


x86 assembly (clang, -O0):
<premul_nozero>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
cmp    $0xff,%eax
jne    1127 <premul_nozero+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <premul_nozero+0x5c>
mov    -0x8(%rbp),%eax
and    $0xff00ff,%eax
movzbl -0x9(%rbp),%ecx
imul   %ecx,%eax
shr    $0x8,%eax
and    $0xff00ff,%eax
mov    -0x8(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
movzbl -0x9(%rbp),%edx
imul   %edx,%ecx
and    $0xff00ff00,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<premul_nozero>:
mov    %edi,%eax
cmp    $0xff,%sil
je     112e <premul_nozero+0x2e>
mov    %eax,%ecx
and    $0xff00ff,%ecx
imul   %esi,%ecx
shr    $0x8,%ecx
and    $0xff00ff,%ecx
shr    $0x8,%eax
and    $0xff00ff,%eax
imul   %esi,%eax
and    $0xff00ff00,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @premul_nozero(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = icmp eq i32 %7, 255
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %27
11: ; preds = %2
%12 = load i32, i32* %4
%13 = and i32 %12, 16711935
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = mul i32 %13, %15
%17 = lshr i32 %16, 8
%18 = and i32 %17, 16711935
%19 = load i32, i32* %4
%20 = and i32 %19, -16711936
%21 = lshr i32 %20, 8
%22 = load i8, i8* %5
%23 = zext i8 %22 to i32
%24 = mul i32 %21, %23
%25 = and i32 %24, -16711936
%26 = or i32 %18, %25
store i32 %26, i32* %3
br label %27
27: ; preds = %11, %9
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @premul_nozero(i32 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = icmp eq i8 %1, -1
br i1 %4, label %15, label %5
5: ; preds = %2
%6 = and i32 %0, 16711935
%7 = mul nuw i32 %6, %3
%8 = lshr i32 %7, 8
%9 = and i32 %8, 16711935
%10 = lshr i32 %0, 8
%11 = and i32 %10, 16711935
%12 = mul nuw i32 %11, %3
%13 = and i32 %12, -16711936
%14 = or i32 %9, %13
br label %15
15: ; preds = %2, %5
%16 = phi i32 [ %14, %5 ], [ %0, %2 ]
ret i32 %16
}
int Cin_OGM_Init(const char *filename) { return 1; }


x86 assembly (clang, -O0):
<Cin_OGM_Init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cin_OGM_Init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @Cin_OGM_Init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @Cin_OGM_Init(i8* nocapture readnone %0) {
ret i32 1
}
__attribute__((always_)) void set_start_time_ns(struct request *req) {}


x86 assembly (clang, -O0):
<set_start_time_ns>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_start_time_ns>:
ret

LLVM IR (-O0):
%struct.request = type opaque
define void @set_start_time_ns(%struct.request* %0) {
%2 = alloca %struct.request*
store %struct.request* %0, %struct.request** %2
ret void
}

LLVM IR (-O2):
%struct.request = type opaque
define void @set_start_time_ns(%struct.request* nocapture %0) {
ret void
}
float celsius(int fahr) { return (5.0 / 9.0) * (fahr - 32.0); }


x86 assembly (clang, -O0):
<celsius>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xef4(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xee0(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<celsius>:
cvtsi2sd %edi,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @celsius(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fsub double %4, 3.200000e+01
%6 = fmul double 0x3FE1C71C71C71C72, %5
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @celsius(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fadd double %2, -3.200000e+01
%4 = fmul double %3, 0x3FE1C71C71C71C72
%5 = fptrunc double %4 to float
ret float %5
}
herbert(a) char *a;
{
  int k;
  k = 0;
  while (a[k]) {
    putchar(a[k]);
    k++;
  }
}


x86 assembly (clang, -O0):
<herbert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1156 <herbert+0x46>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
mov    $0x0,%al
call   1030 <putchar@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1123 <herbert+0x13>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<herbert>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1135 <herbert+0x25>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
xor    %eax,%eax
call   1030 <putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <herbert+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @herbert(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %12, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %5
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = call i32 (i32, ...) bitcast (i32 (...)* @putchar to i32 (i32, ...)*)(i32 %18)
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @herbert(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %9, %4 ], [ 0, %1 ]
%6 = phi i8 [ %11, %4 ], [ %2, %1 ]
%7 = sext i8 %6 to i32
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @putchar to i32 (i32, ...)*)(i32 %7)
%9 = add nuw i64 %5, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
ret i32 undef
}
/* Variables and functions */
int func();
int main(int argc, char *argv[]) { return func(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <func@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @func()
ret i32 %6
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @func()
ret i32 %3
}
unsigned char galois_mul2(unsigned char value) {
  if (value >> 7) {
    return ((value << 1) ^ 0x1b);
  } else
    return (value << 1);
}


x86 assembly (clang, -O0):
<galois_mul2>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
sar    $0x7,%eax
cmp    $0x0,%eax
je     112c <galois_mul2+0x2c>
movzbl -0x2(%rbp),%eax
shl    $0x1,%eax
xor    $0x1b,%eax
mov    %al,-0x1(%rbp)
jmp    1136 <galois_mul2+0x36>
movzbl -0x2(%rbp),%eax
shl    $0x1,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<galois_mul2>:
lea    (%rdi,%rdi,1),%eax
movzbl %al,%ecx
xor    $0x1b,%al
test   %dil,%dil
movzbl %al,%eax
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @galois_mul2(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = ashr i32 %5, 7
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 1
%12 = xor i32 %11, 27
%13 = trunc i32 %12 to i8
store i8 %13, i8* %2
br label %19
14: ; preds = %1
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %2
br label %19
19: ; preds = %14, %8
%20 = load i8, i8* %2
ret i8 %20
}

LLVM IR (-O2):
define zeroext i8 @galois_mul2(i8 zeroext %0) {
%2 = icmp sgt i8 %0, -1
%3 = shl i8 %0, 1
%4 = xor i8 %3, 27
%5 = select i1 %2, i8 %3, i8 %4
ret i8 %5
}
/* Variables and functions */
int EXIT_SUCCESS;
int fib(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("index = %d\n", 8);
  printf("fib = %d\n", fib(8));
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
mov    $0x8,%edi
call   1040 <fib@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e81(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
mov    $0x8,%edi
call   1040 <fib@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"index = %d\0A\00"
@.str.1 = [10 x i8] c"fib = %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 8)
%3 = call i32 @fib(i32 8)
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}

LLVM IR (-O2):
@.str = [12 x i8] c"index = %d\0A\00"
@.str.1 = [10 x i8] c"fib = %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 8)
%2 = tail call i32 @fib(i32 8)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ test_rebol_comment_entities();
int /*<<< orphan*/ test_rebol_comments();
void all_rebol_tests() {
  test_rebol_comments();
  test_rebol_comment_entities();
}


x86 assembly (clang, -O0):
<all_rebol_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_rebol_comments@plt>
mov    $0x0,%al
call   1030 <test_rebol_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_rebol_tests>:
push   %rax
xor    %eax,%eax
call   1040 <test_rebol_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_rebol_comment_entities@plt>

LLVM IR (-O0):
define void @all_rebol_tests() {
%1 = call i32 (...) @test_rebol_comments()
%2 = call i32 (...) @test_rebol_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_rebol_tests() {
%1 = tail call i32 (...) @test_rebol_comments()
%2 = tail call i32 (...) @test_rebol_comment_entities()
ret void
}
int test_imm_3Dint16_reg(short val) {
  return ((val) & (0x3D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Dint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x3d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Dint16_reg>:
test   $0x3d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Dint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 61
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Dint16_reg(i16 signext %0) {
%2 = and i16 %0, 61
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}