xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int msgrcv(int, void *, int, long, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void CommReceive(int channel_id, void *message, int size) {
  long type = *(long *)message;
  if (msgrcv(channel_id, message, size - sizeof(long), type, 0) == -1) {
    printf("Error! Receive message wrong!\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<CommReceive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rax
sub    $0x8,%rax
mov    %eax,%edx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1050 <msgrcv@plt>
cmp    $0xffffffff,%eax
jne    1189 <CommReceive+0x59>
lea    0xe86(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CommReceive>:
push   %rax
mov    (%rsi),%rcx
add    $0xfffffff8,%edx
xor    %r8d,%r8d
call   1050 <msgrcv@plt>
cmp    $0xffffffff,%eax
je     1146 <CommReceive+0x16>
pop    %rax
ret
lea    0xeb3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Error! Receive message wrong!\0A\00"
define void @CommReceive(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %7
%11 = load i32, i32* %4
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = sub i64 %14, 8
%16 = trunc i64 %15 to i32
%17 = load i64, i64* %7
%18 = call i32 @msgrcv(i32 %11, i8* %12, i32 %16, i64 %17, i32 0)
%19 = icmp eq i32 %18, -1
br i1 %19, label %20, label %23
20: ; preds = %3
%21 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%22 = call i32 @exit(i32 1)
unreachable
23: ; preds = %3
ret void
}

LLVM IR (-O2):
@str = [30 x i8] c"Error! Receive message wrong!\00"
define void @CommReceive(i32 %0, i8* %1, i32 %2) {
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %4
%6 = add i32 %2, -8
%7 = tail call i32 @msgrcv(i32 %0, i8* %1, i32 %6, i64 %5, i32 0)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
%11 = tail call i32 @exit(i32 1)
unreachable
12: ; preds = %3
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t nrf_drv_radio802154_rx_duration_get(uint8_t psdu_length,
                                             bool ack_requested) {
  uint16_t result = 10 + (psdu_length + 1) * 2;
  if (ack_requested) {
    result += 12 + 10 + (6 * 2) + 12;
  }
  result *= 16;
  return result;
}


x86 assembly (clang, -O0):
<nrf_drv_radio802154_rx_duration_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
shl    $0x1,%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112c <nrf_drv_radio802154_rx_duration_get+0x2c>
mov    -0xc(%rbp),%eax
add    $0x2e,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_drv_radio802154_rx_duration_get>:
test   %esi,%esi
lea    0xc(%rdi,%rdi,1),%ecx
lea    0x3a(%rdi,%rdi,1),%eax
cmove  %ecx,%eax
shl    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @nrf_drv_radio802154_rx_duration_get(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
%8 = mul nsw i32 %7, 2
%9 = add nsw i32 10, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 46
store i32 %14, i32* %5
br label %15
15: ; preds = %12, %2
%16 = load i32, i32* %5
%17 = mul nsw i32 %16, 16
store i32 %17, i32* %5
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @nrf_drv_radio802154_rx_duration_get(i32 %0, i32 %1) {
%3 = shl i32 %0, 1
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i32 12, i32 58
%6 = add i32 %5, %3
%7 = shl nsw i32 %6, 4
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ parallel_clr_eoi(int);
int /*<<< orphan*/ parallel_set_eoi(int);
void parallel_drv1_set_eoi(unsigned char val) {
  if (val) {
    parallel_set_eoi(0x08);
  } else {
    parallel_clr_eoi(~0x08);
  }
}


x86 assembly (clang, -O0):
<parallel_drv1_set_eoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1147 <parallel_drv1_set_eoi+0x27>
mov    $0x8,%edi
call   1040 <parallel_set_eoi@plt>
jmp    1151 <parallel_drv1_set_eoi+0x31>
mov    $0xfffffff7,%edi
call   1030 <parallel_clr_eoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_drv1_set_eoi>:
test   %edi,%edi
je     112e <parallel_drv1_set_eoi+0xe>
mov    $0x8,%edi
jmp    1040 <parallel_set_eoi@plt>
mov    $0xfffffff7,%edi
jmp    1030 <parallel_clr_eoi@plt>

LLVM IR (-O0):
define void @parallel_drv1_set_eoi(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @parallel_set_eoi(i32 8)
br label %9
7: ; preds = %1
%8 = call i32 @parallel_clr_eoi(i32 -9)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @parallel_drv1_set_eoi(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @parallel_set_eoi(i32 8)
br label %7
5: ; preds = %1
%6 = tail call i32 @parallel_clr_eoi(i32 -9)
br label %7
7: ; preds = %5, %3
ret void
}
int test_imm_C2int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0xC2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C2int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0xc2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C2int64_highword_mem>:
testb  $0xc2,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C2int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 194
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C2int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 833223655424
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ write_to_file(char *, char *);
void release_hsa(void) { write_to_file("/sys/kernel/debug/zcore/hsa", "0"); }


x86 assembly (clang, -O0):
<release_hsa>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xefa(%rip),%rsi
call   1030 <write_to_file@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<release_hsa>:
lea    0xee9(%rip),%rdi
lea    0xefe(%rip),%rsi
jmp    1030 <write_to_file@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"/sys/kernel/debug/zcore/hsa\00"
@.str.1 = [2 x i8] c"0\00"
define void @release_hsa() {
%1 = call i32 @write_to_file(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"/sys/kernel/debug/zcore/hsa\00"
@.str.1 = [2 x i8] c"0\00"
define void @release_hsa() {
%1 = tail call i32 @write_to_file(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int ds1621_read_value(int, int);
int /*<<< orphan*/ ds1621_write_value(int, int, int);
int reset_THF(int dev_fd) {
  int reg;
  reg = ds1621_read_value(dev_fd, 0xAC);
  reg = reg & ~0x40;
  ds1621_write_value(dev_fd, 0xAC, reg & 0xfe);
}


x86 assembly (clang, -O0):
<reset_THF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0xac,%esi
call   1030 <ds1621_read_value@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffffffbf,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%edx
and    $0xfe,%edx
mov    $0xac,%esi
call   1040 <ds1621_write_value@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_THF>:
push   %rbx
mov    %edi,%ebx
mov    $0xac,%esi
call   1030 <ds1621_read_value@plt>
and    $0xbe,%eax
mov    %ebx,%edi
mov    $0xac,%esi
mov    %eax,%edx
pop    %rbx
jmp    1040 <ds1621_write_value@plt>

LLVM IR (-O0):
define i32 @reset_THF(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @ds1621_read_value(i32 %5, i32 172)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, -65
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 254
%12 = call i32 @ds1621_write_value(i32 %9, i32 172, i32 %11)
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @reset_THF(i32 %0) {
%2 = tail call i32 @ds1621_read_value(i32 %0, i32 172)
%3 = and i32 %2, 190
%4 = tail call i32 @ds1621_write_value(i32 %0, i32 172, i32 %3)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ displays_refute_null_failed(void *, char const *, int);
void Displayer_display_refute_null_failed(void *act, const char *file,
                                          int line) {
  displays_refute_null_failed(act, file, line);
}


x86 assembly (clang, -O0):
<Displayer_display_refute_null_failed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <displays_refute_null_failed@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Displayer_display_refute_null_failed>:
jmp    1030 <displays_refute_null_failed@plt>

LLVM IR (-O0):
define void @Displayer_display_refute_null_failed(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @displays_refute_null_failed(i8* %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @Displayer_display_refute_null_failed(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @displays_refute_null_failed(i8* %0, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int numero;
  printf("Insira o número: ");
  scanf("%d", &numero);
  if (numero % 2 == 0)
    printf("eh par\n");
  else
    printf("eh impar\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xed1(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1170 <main+0x50>
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
jmp    117c <main+0x5c>
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xecf(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
testb  $0x1,0x4(%rsp)
lea    0xec5(%rip),%rax
lea    0xeb5(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Insira o n\C3\BAmero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [8 x i8] c"eh par\0A\00"
@.str.3 = [10 x i8] c"eh impar\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
br label %12
10: ; preds = %0
%11 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
br label %12
12: ; preds = %10, %8
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"Insira o n\C3\BAmero: \00"
@.str.1 = [3 x i8] c"%d\00"
@str = [9 x i8] c"eh impar\00"
@str.4 = [7 x i8] c"eh par\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @str.4, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0)
%9 = call i32 @puts(i8* dereferenceable(1) %8)
ret i32 0
}
/* Variables and functions */
char *strchr(char const *, char);
int verify_array_checksum(char const *, int);
int verify_string_checksum(const char *str) {
  char *cp;
  cp = strchr(str, '*');
  return (cp == NULL) ? 0 : verify_array_checksum(str, cp - str + 3);
}


x86 assembly (clang, -O0):
<verify_string_checksum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2a,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1153 <verify_string_checksum+0x33>
xor    %eax,%eax
mov    %eax,-0x14(%rbp)
jmp    1170 <verify_string_checksum+0x50>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
add    $0x3,%rax
mov    %eax,%esi
call   1040 <verify_array_checksum@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verify_string_checksum>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2a,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     1143 <verify_string_checksum+0x23>
sub    %ebx,%eax
add    $0x3,%eax
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <verify_array_checksum@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @verify_string_checksum(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i8 signext 42)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %9
8: ; preds = %1
br label %19
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = ptrtoint i8* %11 to i64
%14 = ptrtoint i8* %12 to i64
%15 = sub i64 %13, %14
%16 = add nsw i64 %15, 3
%17 = trunc i64 %16 to i32
%18 = call i32 @verify_array_checksum(i8* %10, i32 %17)
br label %19
19: ; preds = %9, %8
%20 = phi i32 [ 0, %8 ], [ %18, %9 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @verify_string_checksum(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 42)
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = ptrtoint i8* %2 to i64
%6 = ptrtoint i8* %0 to i64
%7 = sub i64 %5, %6
%8 = trunc i64 %7 to i32
%9 = add i32 %8, 3
%10 = tail call i32 @verify_array_checksum(i8* %0, i32 %9)
br label %11
11: ; preds = %1, %4
%12 = phi i32 [ %10, %4 ], [ 0, %1 ]
ret i32 %12
}
/* Variables and functions */
int is_aligned(void *ptr, size_t alignment) {
  uintptr_t address = (uintptr_t)ptr;
  return ((address % alignment) == 0);
}


x86 assembly (clang, -O0):
<is_aligned>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
cmp    $0x0,%rdx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_aligned>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1116 <is_aligned+0x16>
xor    %edx,%edx
div    %rsi
jmp    111a <is_aligned+0x1a>
xor    %edx,%edx
div    %esi
xor    %eax,%eax
test   %rdx,%rdx
sete   %al
ret

LLVM IR (-O0):
define i32 @is_aligned(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %6 to i64
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = urem i64 %8, %9
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_aligned(i8* %0, i64 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = urem i64 %3, %1
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct timeval {
  scalar_t__ tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
double get_timediff(struct timeval *tv1, struct timeval *tv2) {
  return (double)(tv2->tv_usec - tv1->tv_usec) / 1000000 +
         (double)(tv2->tv_sec - tv1->tv_sec);
}


x86 assembly (clang, -O0):
<get_timediff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x8(%rbp),%rcx
sub    0x8(%rcx),%rax
cvtsi2sd %rax,%xmm0
movsd  0xed7(%rip),%xmm1
divsd  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%rax
cvtsi2sd %rax,%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_timediff>:
mov    (%rsi),%rax
mov    0x8(%rsi),%rcx
sub    0x8(%rdi),%rcx
cvtsi2sd %rcx,%xmm1
divsd  0xee8(%rip),%xmm1
sub    (%rdi),%rax
cvtsi2sd %rax,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define double @get_timediff(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 1
%7 = load i64, i64* %6
%8 = load %struct.timeval*, %struct.timeval** %3
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 1
%10 = load i64, i64* %9
%11 = sub nsw i64 %7, %10
%12 = sitofp i64 %11 to double
%13 = fdiv double %12, 1.000000e+06
%14 = load %struct.timeval*, %struct.timeval** %4
%15 = getelementptr inbounds %struct.timeval, %struct.timeval* %14, i32 0, i32 0
%16 = load i64, i64* %15
%17 = load %struct.timeval*, %struct.timeval** %3
%18 = getelementptr inbounds %struct.timeval, %struct.timeval* %17, i32 0, i32 0
%19 = load i64, i64* %18
%20 = sub nsw i64 %16, %19
%21 = sitofp i64 %20 to double
%22 = fadd double %13, %21
ret double %22
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define double @get_timediff(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%6 = load i64, i64* %5
%7 = sub nsw i64 %4, %6
%8 = sitofp i64 %7 to double
%9 = fdiv double %8, 1.000000e+06
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%11 = load i64, i64* %10
%12 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%13 = load i64, i64* %12
%14 = sub nsw i64 %11, %13
%15 = sitofp i64 %14 to double
%16 = fadd double %9, %15
ret double %16
}
int reduzAND(int *v) {
  int i, ra;
  ra = 0xFFFFFFFF;
  for (i = 0; i < 5; i++) {
    ra = ra & v[i];
  }
  return (ra);
}


x86 assembly (clang, -O0):
<reduzAND>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    113f <reduzAND+0x3f>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
and    (%rcx,%rdx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <reduzAND+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reduzAND>:
movdqu 0x4(%rdi),%xmm0
pshufd $0xee,%xmm0,%xmm1
pand   %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
pand   %xmm1,%xmm0
movd   %xmm0,%eax
and    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @reduzAND(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 -1, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32*, i32** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = and i32 %9, %14
store i32 %15, i32* %4
br label %16
16: ; preds = %8
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @reduzAND(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = bitcast i32* %3 to <4 x i32>*
%5 = load <4 x i32>, <4 x i32>* %4
%6 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %5)
%7 = and i32 %6, %2
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ rdtsc();
int main(void) {
  printf("%lld\n", rdtsc());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <rdtsc@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @rdtsc()
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @rdtsc()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int todecimal(int /*<<< orphan*/);
int dtoi(char *s) {
  int sum = 0;
  while (*s) {
    sum = sum * 10 + todecimal(*s++);
  }
  return sum;
}


x86 assembly (clang, -O0):
<dtoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115d <dtoi+0x4d>
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <todecimal@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <dtoi+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtoi>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%cl
test   %cl,%cl
je     114d <dtoi+0x3d>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
lea    (%rax,%rax,4),%r14d
movsbl %cl,%edi
call   1030 <todecimal@plt>
lea    (%rax,%r14,2),%eax
movzbl (%rbx),%ecx
add    $0x1,%rbx
test   %cl,%cl
jne    1130 <dtoi+0x20>
jmp    114f <dtoi+0x3f>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @dtoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 10
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = call i32 @todecimal(i32 %14)
%16 = add nsw i32 %10, %15
store i32 %16, i32* %3
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @dtoi(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %12, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 10
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = sext i8 %5 to i32
%11 = tail call i32 @todecimal(i32 %10)
%12 = add nsw i32 %11, %8
%13 = load i8, i8* %9
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %12, %4 ]
ret i32 %16
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int isin_S4(int);
int32_t Cosine(uint32_t phase) {
  phase += 0x2000000;
  int32_t P = phase >> 17;
  return isin_S4(P) << 17;
}


x86 assembly (clang, -O0):
<Cosine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2000000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x11,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isin_S4@plt>
shl    $0x11,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cosine>:
push   %rax
add    $0x2000000,%edi
sar    $0x11,%edi
call   1030 <isin_S4@plt>
shl    $0x11,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Cosine(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 33554432
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = ashr i32 %6, 17
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @isin_S4(i32 %8)
%10 = shl i32 %9, 17
ret i32 %10
}

LLVM IR (-O2):
define i32 @Cosine(i32 %0) {
%2 = add nsw i32 %0, 33554432
%3 = ashr i32 %2, 17
%4 = tail call i32 @isin_S4(i32 %3)
%5 = shl i32 %4, 17
ret i32 %5
}
void _start(void) {
  __asm__ volatile("xorq %%rbp, %%rbp;"
                   "popq %%rdi;"
                   "movq %%rsp, %%rsi;"
                   "leaq 8(%%rsi,%%rdi,8), %%rdx;"
                   "pushq %%rbp;"
                   "pushq %%rbp;"
                   "andq $-16, %%rsp;"
                   "call _init_sblibc;"
                   "call _init;"
                   "call main;"
                   "movq %%rax, %%rdi;"
                   "call exit;"
                   "hlt;" ::
                       :);
}


x86 assembly (clang, -O0):
<_start>:
push   %rbp
mov    %rsp,%rbp
xor    %rbp,%rbp
pop    %rdi
mov    %rsp,%rsi
lea    0x8(%rsi,%rdi,8),%rdx
push   %rbp
push   %rbp
and    $0xfffffffffffffff0,%rsp
call   1030 <_init_sblibc@plt>
call   1000 <_init>
call   1040 <main@plt>
mov    %rax,%rdi
call   1050 <exit@plt>
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<_start>:
xor    %rbp,%rbp
pop    %rdi
mov    %rsp,%rsi
lea    0x8(%rsi,%rdi,8),%rdx
push   %rbp
push   %rbp
and    $0xfffffffffffffff0,%rsp
call   1030 <_init_sblibc@plt>
call   1000 <_init>
call   1040 <main@plt>
mov    %rax,%rdi
call   1050 <exit@plt>
hlt
ret

LLVM IR (-O0):
define void @_start() {
ret void
}

LLVM IR (-O2):
define void @_start() {
tail call void asm sideeffect "xorq %rbp, %rbp;popq %rdi;movq %rsp, %rsi;leaq 8(%rsi,%rdi,8), %rdx;pushq %rbp;pushq %rbp;andq $$-16, %rsp;call _init_sblibc;call _init;call main;movq %rax, %rdi;call exit;hlt;", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ path;

/* Variables and functions */
int open(char *, int);
int /*<<< orphan*/ snprintf(char *, int, char *, int);
int gpio_open(int pin, int mode) {
  char path[1024];
  snprintf(path, sizeof(path), "/sys/class/gpio/gpio%d/value", pin);
  return open(path, mode);
}


x86 assembly (clang, -O0):
<gpio_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x410(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0x400,%esi
lea    0xeb9(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x410(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1040 <open@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_open>:
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %esi,%ebx
mov    %edi,%ecx
lea    0xecb(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x400,%esi
call   1030 <snprintf@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1040 <open@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [29 x i8] c"/sys/class/gpio/gpio%d/value\00"
define i32 @gpio_open(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [1024 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %3
%8 = call i32 @snprintf(i8* %6, i32 1024, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%10 = load i32, i32* %4
%11 = call i32 @open(i8* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
@.str = [29 x i8] c"/sys/class/gpio/gpio%d/value\00"
define i32 @gpio_open(i32 %0, i32 %1) {
%3 = alloca [1024 x i8]
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = call i32 @snprintf(i8* %4, i32 1024, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %0)
%6 = call i32 @open(i8* %4, i32 %1)
ret i32 %6
}
/* Variables and functions */
unsigned int inl(int);
int /*<<< orphan*/ outl(int, int);
unsigned int pci_read_config32(unsigned addr) {
  outl(0x80000000 | (addr & ~3), 0xCF8);
  return inl(0xCFC);
}


x86 assembly (clang, -O0):
<pci_read_config32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
and    $0xfffffffc,%edi
or     $0x80000000,%edi
mov    $0xcf8,%esi
call   1030 <outl@plt>
mov    $0xcfc,%edi
call   1040 <inl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_read_config32>:
push   %rax
and    $0x7ffffffc,%edi
or     $0x80000000,%edi
mov    $0xcf8,%esi
call   1030 <outl@plt>
mov    $0xcfc,%edi
pop    %rax
jmp    1040 <inl@plt>

LLVM IR (-O0):
define i32 @pci_read_config32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -4
%5 = or i32 -2147483648, %4
%6 = call i32 @outl(i32 %5, i32 3320)
%7 = call i32 @inl(i32 3324)
ret i32 %7
}

LLVM IR (-O2):
define i32 @pci_read_config32(i32 %0) {
%2 = and i32 %0, 2147483644
%3 = or i32 %2, -2147483648
%4 = tail call i32 @outl(i32 %3, i32 3320)
%5 = tail call i32 @inl(i32 3324)
ret i32 %5
}
float nsvg__viewAlign(float content, float container, int type) {
  if (type == 0)
    return 0;
  else if (type == 2)
    return container - content;
  return (container - content) * 0.5f;
}


x86 assembly (clang, -O0):
<nsvg__viewAlign>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1128 <nsvg__viewAlign+0x28>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1166 <nsvg__viewAlign+0x66>
cmpl   $0x2,-0x10(%rbp)
jne    1146 <nsvg__viewAlign+0x46>
movss  -0xc(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1166 <nsvg__viewAlign+0x66>
jmp    114b <nsvg__viewAlign+0x4b>
movss  -0xc(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  0xea3(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsvg__viewAlign>:
test   %edi,%edi
je     1111 <nsvg__viewAlign+0x11>
subss  %xmm0,%xmm1
cmp    $0x2,%edi
jne    1115 <nsvg__viewAlign+0x15>
movaps %xmm1,%xmm0
ret
xorps  %xmm0,%xmm0
ret
mulss  0xee3(%rip),%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @nsvg__viewAlign(float %0, float %1, i32 %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca i32
store float %0, float* %5
store float %1, float* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store float 0.000000e+00, float* %4
br label %24
11: ; preds = %3
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load float, float* %6
%16 = load float, float* %5
%17 = fsub float %15, %16
store float %17, float* %4
br label %24
18: ; preds = %11
br label %19
19: ; preds = %18
%20 = load float, float* %6
%21 = load float, float* %5
%22 = fsub float %20, %21
%23 = fmul float %22, 5.000000e-01
store float %23, float* %4
br label %24
24: ; preds = %19, %14, %10
%25 = load float, float* %4
ret float %25
}

LLVM IR (-O2):
define float @nsvg__viewAlign(float %0, float %1, i32 %2) {
switch i32 %2, label %6 [
i32 0, label %9
i32 2, label %4
]
4: ; preds = %3
%5 = fsub float %1, %0
br label %9
6: ; preds = %3
%7 = fsub float %1, %0
%8 = fmul float %7, 5.000000e-01
br label %9
9: ; preds = %3, %6, %4
%10 = phi float [ %5, %4 ], [ %8, %6 ], [ 0.000000e+00, %3 ]
ret float %10
}
double converte_milisegundo(unsigned long long x) {
  return (double)(x / 1000.0);
}


x86 assembly (clang, -O0):
<converte_milisegundo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movaps 0xf01(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xf00(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xec9(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<converte_milisegundo>:
movq   %rdi,%xmm1
punpckldq 0xef3(%rip),%xmm1
subpd  0xefb(%rip),%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
divsd  0xef7(%rip),%xmm0
ret

LLVM IR (-O0):
define double @converte_milisegundo(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = uitofp i64 %3 to double
%5 = fdiv double %4, 1.000000e+03
ret double %5
}

LLVM IR (-O2):
define double @converte_milisegundo(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = fdiv double %2, 1.000000e+03
ret double %3
}
unsigned short
unsignedshort_ignoring_unsignedlonglongint(unsigned short x,
                                           unsigned long long int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedshort_ignoring_unsignedlonglongint>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedshort_ignoring_unsignedlonglongint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @unsignedshort_ignoring_unsignedlonglongint(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @unsignedshort_ignoring_unsignedlonglongint(i16 returned zeroext %0, i64 %1) {
ret i16 %0
}
/* Variables and functions */
int /*<<< orphan*/ readbyte();
void skip_bytes(int len) {
  while (len-- > 0)
    readbyte();
}


x86 assembly (clang, -O0):
<skip_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    113b <skip_bytes+0x2b>
mov    $0x0,%al
call   1030 <readbyte@plt>
jmp    111b <skip_bytes+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_bytes>:
push   %rbx
test   %edi,%edi
jle    112f <skip_bytes+0x1f>
mov    %edi,%ebx
add    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <readbyte@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <skip_bytes+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @skip_bytes(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp sgt i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @readbyte()
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @skip_bytes(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 (...) @readbyte()
%7 = icmp ugt i32 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret void
}
void ff_hevc_put_hevc_bi_qpel_v64_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v64_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v64_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v64_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v64_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __chk_fail();
int __gethostname(char *, size_t);
int __gethostname_chk(char *buf, size_t buflen, size_t nreal) {
  if (buflen > nreal)
    __chk_fail();
  return __gethostname(buf, buflen);
}


x86 assembly (clang, -O0):
<__gethostname_chk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1149 <__gethostname_chk+0x29>
mov    $0x0,%al
call   1030 <__chk_fail@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <__gethostname@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gethostname_chk>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
cmp    %rdx,%rsi
jbe    1136 <__gethostname_chk+0x16>
xor    %eax,%eax
call   1030 <__chk_fail@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <__gethostname@plt>

LLVM IR (-O0):
define i32 @__gethostname_chk(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = load i64, i64* %6
%9 = icmp ugt i64 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = call i32 (...) @__chk_fail()
br label %12
12: ; preds = %10, %3
%13 = load i8*, i8** %4
%14 = load i64, i64* %5
%15 = call i32 @__gethostname(i8* %13, i64 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @__gethostname_chk(i8* %0, i64 %1, i64 %2) {
%4 = icmp ugt i64 %1, %2
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 (...) @__chk_fail()
br label %7
7: ; preds = %5, %3
%8 = tail call i32 @__gethostname(i8* %0, i64 %1)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ fill(int, int, int);
int /*<<< orphan*/ window(int, int);
void setup() {
  window(200, 200);
  fill(255, 255, 255);
}


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc8,%esi
mov    %esi,%edi
call   1040 <window@plt>
mov    $0xff,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <fill@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
push   %rax
mov    $0xc8,%edi
mov    $0xc8,%esi
call   1040 <window@plt>
mov    $0xff,%edi
mov    $0xff,%esi
mov    $0xff,%edx
pop    %rax
jmp    1030 <fill@plt>

LLVM IR (-O0):
define void @setup() {
%1 = call i32 @window(i32 200, i32 200)
%2 = call i32 @fill(i32 255, i32 255, i32 255)
ret void
}

LLVM IR (-O2):
define void @setup() {
%1 = tail call i32 @window(i32 200, i32 200)
%2 = tail call i32 @fill(i32 255, i32 255, i32 255)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int print_vector(int *ptr, int length) {
  for (int i = 0; i < length; i++) {
    printf("%d\n", ptr[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<print_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1157 <print_vector+0x47>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_vector+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_vector>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <print_vector+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print_vector+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @print_vector(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @print_vector(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret i32 0
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
char EOF;
char getchar();
int /*<<< orphan*/ putchar(char);
int main(void) {
  char ch;
  while ((ch = getchar()) != EOF)
    putchar(ch);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%eax
mov    0x2ea5(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     115c <main+0x3c>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rbx
cmp    (%rbx),%al
je     1153 <main+0x33>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%al
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i8 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %9, %0
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = sext i8 %4 to i32
%6 = load i8, i8* @EOF
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %5, %7
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i8, i8* %2
%11 = call i32 @putchar(i8 signext %10)
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@EOF = global i8 0
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = load i8, i8* @EOF
%3 = icmp eq i8 %1, %2
br i1 %3, label %10, label %4
4: ; preds = %0, %4
%5 = phi i8 [ %7, %4 ], [ %1, %0 ]
%6 = tail call i32 @putchar(i8 signext %5)
%7 = tail call signext i8 (...) @getchar()
%8 = load i8, i8* @EOF
%9 = icmp eq i8 %7, %8
br i1 %9, label %10, label %4
10: ; preds = %4, %0
ret i32 0
}
/* Variables and functions */
char *slice(char *, int /*<<< orphan*/, int);
char *buf1(char *text, int pos) {
  char *buffer1 = slice(text, 0, pos);
  return buffer1;
}


x86 assembly (clang, -O0):
<buf1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <slice@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf1>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <slice@plt>

LLVM IR (-O0):
define i8* @buf1(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @slice(i8* %6, i32 0, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
ret i8* %9
}

LLVM IR (-O2):
define i8* @buf1(i8* %0, i32 %1) {
%3 = tail call i8* @slice(i8* %0, i32 0, i32 %1)
ret i8* %3
}
/* Variables and functions */
size_t thread_level_get_turn_pos(size_t thread_id) { return thread_id / 2; }


x86 assembly (clang, -O0):
<thread_level_get_turn_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_level_get_turn_pos>:
mov    %rdi,%rax
shr    %rax
ret

LLVM IR (-O0):
define i64 @thread_level_get_turn_pos(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = udiv i64 %3, 2
ret i64 %4
}

LLVM IR (-O2):
define i64 @thread_level_get_turn_pos(i64 %0) {
%2 = lshr i64 %0, 1
ret i64 %2
}
int fib(int n) {
  if (n < 3)
    return n;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    1130 <fib+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x3,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x4,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @fib(i32 %10)
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fib(i32 %13)
%15 = add nsw i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}