xunge/DecIR huggingface dataset:
/* Variables and functions */
int RSA2048_load(int, char *, unsigned char *, int);
int RSA2048_load_prikey_P(int fd, unsigned char *RSA2048_P) {
  int ret;
  ret = RSA2048_load(fd, "BF51010480", RSA2048_P, 128);
  if (ret != 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<RSA2048_load_prikey_P>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rdx
lea    0xed3(%rip),%rsi
mov    $0x80,%ecx
call   1030 <RSA2048_load@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1150 <RSA2048_load_prikey_P+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1157 <RSA2048_load_prikey_P+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA2048_load_prikey_P>:
push   %rax
mov    %rsi,%rdx
lea    0xee5(%rip),%rsi
mov    $0x80,%ecx
call   1030 <RSA2048_load@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"BF51010480\00"
define i32 @RSA2048_load_prikey_P(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = call i32 @RSA2048_load(i32 %7, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %8, i32 128)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 1, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [11 x i8] c"BF51010480\00"
define i32 @RSA2048_load_prikey_P(i32 %0, i8* %1) {
%3 = tail call i32 @RSA2048_load(i32 %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %1, i32 128)
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ clearerr(int /*<<< orphan*/ *);
void uninit_clearerr(void) {
  FILE *fp;
  clearerr(fp);
}


x86 assembly (clang, -O0):
<uninit_clearerr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1030 <clearerr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninit_clearerr>:
jmp    1030 <clearerr@plt>

LLVM IR (-O0):
define void @uninit_clearerr() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = call i32 @clearerr(i32* %2)
ret void
}

LLVM IR (-O2):
define void @uninit_clearerr() {
%1 = tail call i32 @clearerr(i32* undef)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void __PUT_UINT32_RAW(uint32_t *addr, uint32_t val) {
  (*(uint32_t *)(((uint8_t *)(addr)) + (0))) = val;
}


x86 assembly (clang, -O0):
<__PUT_UINT32_RAW>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__PUT_UINT32_RAW>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @__PUT_UINT32_RAW(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @__PUT_UINT32_RAW(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret void
}
void bencode_2(b, p) void *b;
void *p;
{ bcopy(p, b, 2); }


x86 assembly (clang, -O0):
<bencode_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x2,%edx
mov    $0x0,%al
call   1030 <bcopy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bencode_2>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
mov    $0x2,%edx
xor    %eax,%eax
jmp    1030 <bcopy@plt>

LLVM IR (-O0):
define void @bencode_2(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 (i8*, i8*, i32, ...) bitcast (i32 (...)* @bcopy to i32 (i8*, i8*, i32, ...)*)(i8* %5, i8* %6, i32 2)
ret void
}

LLVM IR (-O2):
define void @bencode_2(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, i8*, i32, ...) bitcast (i32 (...)* @bcopy to i32 (i8*, i8*, i32, ...)*)(i8* %1, i8* %0, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ test_init_mchar();
int /*<<< orphan*/ test_init_schar();
void test_init() {
  test_init_schar();
  test_init_mchar();
  puts("MatrixInit(): Success");
}


x86 assembly (clang, -O0):
<test_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <test_init_schar@plt>
mov    $0x0,%al
call   1040 <test_init_mchar@plt>
lea    0xeb7(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_init>:
push   %rax
xor    %eax,%eax
call   1050 <test_init_schar@plt>
xor    %eax,%eax
call   1040 <test_init_mchar@plt>
lea    0xeba(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"MatrixInit(): Success\00"
define void @test_init() {
%1 = call i32 (...) @test_init_schar()
%2 = call i32 (...) @test_init_mchar()
%3 = call i32 @puts(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"MatrixInit(): Success\00"
define void @test_init() {
%1 = tail call i32 (...) @test_init_schar()
%2 = tail call i32 (...) @test_init_mchar()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *memchr(const void *s __attribute__((unused)),
             int c __attribute__((unused)), size_t n __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<memchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memchr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @memchr(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @memchr(i8* nocapture readnone %0, i32 %1, i64 %2) {
ret i8* null
}
/* Variables and functions */
int create_mem_dev(char *);
int smrlog_open_master(char *basedir) { return create_mem_dev(basedir); }


x86 assembly (clang, -O0):
<smrlog_open_master>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <create_mem_dev@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smrlog_open_master>:
jmp    1030 <create_mem_dev@plt>

LLVM IR (-O0):
define i32 @smrlog_open_master(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @create_mem_dev(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @smrlog_open_master(i8* %0) {
%2 = tail call i32 @create_mem_dev(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void ADCIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags) {
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) |= ui32IntFlags;
}


x86 assembly (clang, -O0):
<ADCIntClearEx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntClearEx>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,0xc(%rcx)
ret

LLVM IR (-O0):
define void @ADCIntClearEx(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 12
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @ADCIntClearEx(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 12
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int num1, num2, temp;
  num1 = 10;
  num2 = 20;
  printf("Initially: num1 = %d, num2 = %d\n", num1, num2);
  temp = num1;
  num1 = num2;
  num2 = temp;
  printf("Finally: num1 = %d, num2 = %d\n", num1, num2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xa,%esi
mov    $0x14,%edx
call   1030 <printf@plt>
lea    0xef3(%rip),%rdi
mov    $0x14,%esi
mov    $0xa,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"Initially: num1 = %d, num2 = %d\0A\00"
@.str.1 = [31 x i8] c"Finally: num1 = %d, num2 = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 10, i32* %1
store i32 20, i32* %2
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = load i32, i32* %1
store i32 %7, i32* %3
%8 = load i32, i32* %2
store i32 %8, i32* %1
%9 = load i32, i32* %3
store i32 %9, i32* %2
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [33 x i8] c"Initially: num1 = %d, num2 = %d\0A\00"
@.str.1 = [31 x i8] c"Finally: num1 = %d, num2 = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 10, i32 20)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i32 20, i32 10)
ret i32 0
}
void LightScheduler_Destroy(void) {}


x86 assembly (clang, -O0):
<LightScheduler_Destroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LightScheduler_Destroy>:
ret

LLVM IR (-O0):
define void @LightScheduler_Destroy() {
ret void
}

LLVM IR (-O2):
define void @LightScheduler_Destroy() {
ret void
}
int main() {
  volatile int a = 1;
  a = 0;
  do {
    if (!(a))
      asm volatile(".byte 0xd6" : : "a"(1));
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    $0x0,%eax
jne    112b <main+0x2b>
mov    $0x1,%eax
(bad)
jmp    1130 <main+0x30>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0x1,-0x4(%rsp)
movl   $0x0,-0x4(%rsp)
cmpl   $0x0,-0x4(%rsp)
je     111a <main+0x1a>
xor    %eax,%eax
ret
mov    $0x1,%eax
(bad)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store volatile i32 1, i32* %2
store volatile i32 0, i32* %2
br label %3
3: ; preds = %0
%4 = load volatile i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %3
br label %7
7: ; preds = %6, %3
br label %8
8: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 1, i32* %1
store volatile i32 0, i32* %1
%3 = load volatile i32, i32* %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
tail call void asm sideeffect ".byte 0xd6", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 1)
br label %6
6: ; preds = %5, %0
ret i32 0
}
void RTStrSimplePatternMatch(void) {}


x86 assembly (clang, -O0):
<RTStrSimplePatternMatch>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTStrSimplePatternMatch>:
ret

LLVM IR (-O0):
define void @RTStrSimplePatternMatch() {
ret void
}

LLVM IR (-O2):
define void @RTStrSimplePatternMatch() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
scalar_t__ const s291_compute_cs(scalar_t__ const *);
int s291_get_dc(scalar_t__ const *);
bool s291_check_cs(const uint16_t *p_s291) {
  return p_s291[6 + s291_get_dc(p_s291)] == s291_compute_cs(p_s291);
}


x86 assembly (clang, -O0):
<s291_check_cs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <s291_get_dc@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
add    $0x6,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <s291_compute_cs@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s291_check_cs>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <s291_get_dc@plt>
cltq
mov    0x30(%rbx,%rax,8),%r14
mov    %rbx,%rdi
call   1030 <s291_compute_cs@plt>
xor    %ecx,%ecx
cmp    %rax,%r14
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @s291_check_cs(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64*, i64** %2
%5 = call i32 @s291_get_dc(i64* %4)
%6 = add nsw i32 6, %5
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %3, i64 %7
%9 = load i64, i64* %8
%10 = load i64*, i64** %2
%11 = call i64 @s291_compute_cs(i64* %10)
%12 = icmp eq i64 %9, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @s291_check_cs(i64* %0) {
%2 = tail call i32 @s291_get_dc(i64* %0)
%3 = add nsw i32 %2, 6
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i64, i64* %0, i64 %4
%6 = load i64, i64* %5
%7 = tail call i64 @s291_compute_cs(i64* %0)
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
void task_numa_free(struct task_struct *p) {}


x86 assembly (clang, -O0):
<task_numa_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_numa_free>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @task_numa_free(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @task_numa_free(%struct.task_struct* nocapture %0) {
ret void
}
/* Variables and functions */
char *fcitx_utils_set_str_with_len(char *, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
char *fcitx_utils_set_str(char *res, const char *str) {
  return fcitx_utils_set_str_with_len(res, str, strlen(str));
}


x86 assembly (clang, -O0):
<fcitx_utils_set_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <fcitx_utils_set_str_with_len@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcitx_utils_set_str>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <fcitx_utils_set_str_with_len@plt>

LLVM IR (-O0):
define i8* @fcitx_utils_set_str(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i8* @fcitx_utils_set_str_with_len(i8* %5, i8* %6, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
define i8* @fcitx_utils_set_str(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i8* @fcitx_utils_set_str_with_len(i8* %0, i8* %1, i32 %3)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ mill_panic(char const *);
void go_panic(const char *text) { mill_panic(text); }


x86 assembly (clang, -O0):
<go_panic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mill_panic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<go_panic>:
jmp    1030 <mill_panic@plt>

LLVM IR (-O0):
define void @go_panic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @mill_panic(i8* %3)
ret void
}

LLVM IR (-O2):
define void @go_panic(i8* %0) {
%2 = tail call i32 @mill_panic(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ knh_opcode_check();
int /*<<< orphan*/ knh_srand(int /*<<< orphan*/);
void konoha_init(void) {
  static int isInit = 0;
  if (isInit == 0) {
    knh_opcode_check();
    knh_srand(0);
  }
  isInit = 1;
}


x86 assembly (clang, -O0):
<konoha_init>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f09(%rip)
jne    113f <konoha_init+0x1f>
mov    $0x0,%al
call   1030 <knh_opcode_check@plt>
xor    %edi,%edi
call   1040 <knh_srand@plt>
movl   $0x1,0x2eeb(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<konoha_init>:
push   %rax
cmpb   $0x0,0x2f0c(%rip)
jne    1138 <konoha_init+0x18>
xor    %eax,%eax
call   1030 <knh_opcode_check@plt>
xor    %edi,%edi
call   1040 <knh_srand@plt>
movb   $0x1,0x2ef5(%rip)
pop    %rax
ret

LLVM IR (-O0):
@konoha_init.isInit = internal global i32 0
define void @konoha_init() {
%1 = load i32, i32* @konoha_init.isInit
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i32 (...) @knh_opcode_check()
%5 = call i32 @knh_srand(i32 0)
br label %6
6: ; preds = %3, %0
store i32 1, i32* @konoha_init.isInit
ret void
}

LLVM IR (-O2):
@konoha_init.isInit = internal unnamed_addr global i1 false
define void @konoha_init() {
%1 = load i1, i1* @konoha_init.isInit
br i1 %1, label %5, label %2
2: ; preds = %0
%3 = tail call i32 (...) @knh_opcode_check()
%4 = tail call i32 @knh_srand(i32 0)
br label %5
5: ; preds = %2, %0
store i1 true, i1* @konoha_init.isInit
ret void
}
void cfg80211_debugfs_rdev_add(struct cfg80211_registered_device *rdev) {}


x86 assembly (clang, -O0):
<cfg80211_debugfs_rdev_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg80211_debugfs_rdev_add>:
ret

LLVM IR (-O0):
%struct.cfg80211_registered_device = type opaque
define void @cfg80211_debugfs_rdev_add(%struct.cfg80211_registered_device* %0) {
%2 = alloca %struct.cfg80211_registered_device*
store %struct.cfg80211_registered_device* %0, %struct.cfg80211_registered_device** %2
ret void
}

LLVM IR (-O2):
%struct.cfg80211_registered_device = type opaque
define void @cfg80211_debugfs_rdev_add(%struct.cfg80211_registered_device* nocapture %0) {
ret void
}
int is_Reg(int op) {
  switch (op) {
  case 64:
  case 65:
  case 66:
  case 71:
  case 72:
  case 73:
    return (1);
  default:;
  }
  return (0);
}


x86 assembly (clang, -O0):
<is_Reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffc0,%eax
sub    $0x3,%eax
jb     1132 <is_Reg+0x32>
jmp    111e <is_Reg+0x1e>
mov    -0xc(%rbp),%eax
add    $0xffffffb9,%eax
sub    $0x2,%eax
ja     113e <is_Reg+0x3e>
jmp    1132 <is_Reg+0x32>
movl   $0x1,-0x4(%rbp)
jmp    114a <is_Reg+0x4a>
jmp    1143 <is_Reg+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_Reg>:
add    $0xffffffc0,%edi
xor    %eax,%eax
cmp    $0x9,%edi
ja     1117 <is_Reg+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @is_Reg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 64, label %5
i32 65, label %5
i32 66, label %5
i32 71, label %5
i32 72, label %5
i32 73, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %8
6: ; preds = %1
br label %7
7: ; preds = %6
store i32 0, i32* %2
br label %8
8: ; preds = %7, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@switch.table.is_Reg = [10 x i32] [i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1]
define i32 @is_Reg(i32 %0) {
%2 = add i32 %0, -64
%3 = icmp ult i32 %2, 10
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.is_Reg, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage() { printf("Usage: send SERVER PORTNUM MESSAGE\n"); }


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Usage: send SERVER PORTNUM MESSAGE\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [35 x i8] c"Usage: send SERVER PORTNUM MESSAGE\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getXMLCharset(char *, char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  char buf[41];
  getXMLCharset(argv[1], buf);
  printf("charset = \"%s\"\n", buf);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    -0x40(%rbp),%rsi
call   1040 <getXMLCharset@plt>
lea    -0x40(%rbp),%rsi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    0x8(%rsi),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1040 <getXMLCharset@plt>
lea    0xec5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"charset = \22%s\22\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [41 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = getelementptr inbounds [41 x i8], [41 x i8]* %6, i64 0, i64 0
%11 = call i32 @getXMLCharset(i8* %9, i8* %10)
%12 = getelementptr inbounds [41 x i8], [41 x i8]* %6, i64 0, i64 0
%13 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"charset = \22%s\22\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = alloca [41 x i8]
%4 = getelementptr inbounds [41 x i8], [41 x i8]* %3, i64 0, i64 0
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = call i32 @getXMLCharset(i8* %6, i8* %4)
%8 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ack(char *);
int /*<<< orphan*/ perror_reply(int, char *);
scalar_t__ rmdir(char *);
void removedir(char *name) {
  if (rmdir(name) < 0)
    perror_reply(550, name);
  else
    ack("RMD");
}


x86 assembly (clang, -O0):
<removedir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <rmdir@plt>
cmp    $0x0,%rax
jge    1162 <removedir+0x32>
mov    -0x8(%rbp),%rsi
mov    $0x226,%edi
call   1050 <perror_reply@plt>
jmp    116e <removedir+0x3e>
lea    0xe97(%rip),%rdi
call   1030 <ack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<removedir>:
push   %rbx
mov    %rdi,%rbx
call   1040 <rmdir@plt>
test   %rax,%rax
js     114b <removedir+0x1b>
lea    0xebb(%rip),%rdi
pop    %rbx
jmp    1030 <ack@plt>
mov    $0x226,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1050 <perror_reply@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"RMD\00"
define void @removedir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @rmdir(i8* %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @perror_reply(i32 550, i8* %7)
br label %11
9: ; preds = %1
%10 = call i32 @ack(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"RMD\00"
define void @removedir(i8* %0) {
%2 = tail call i64 @rmdir(i8* %0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror_reply(i32 550, i8* %0)
br label %8
6: ; preds = %1
%7 = tail call i32 @ack(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Write_LCD(int, char *, int);
void Set_9600(int fd) {
  char cmd[] = {254, 57, 0x20, 253};
  Write_LCD(fd, cmd, 4);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <Write_LCD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
movl   $0xfd2039fe,0x4(%rsp)
fd
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <Write_LCD@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.Set_9600.cmd = [4 x i8] c"\FE9 \FD"
define void @Set_9600(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i8]
store i32 %0, i32* %2
%4 = bitcast [4 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%7 = call i32 @Write_LCD(i32 %5, i8* %6, i32 4)
ret void
}

LLVM IR (-O2):
define void @Set_9600(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 -48219650, i32* %2
%4 = call i32 @Write_LCD(i32 %0, i8* %3, i32 4)
ret void
}
void scary(void) {
  volatile int *x = 0xdeadbeef;
  *x = 10;
}


x86 assembly (clang, -O0):
<scary>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdeadbeef,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xa,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scary>:
mov    $0xdeadbeef,%eax
movl   $0xa,(%rax)
ret

LLVM IR (-O0):
define void @scary() {
%1 = alloca i32*
store i32* inttoptr (i64 3735928559 to i32*), i32** %1
%2 = load i32*, i32** %1
store volatile i32 10, i32* %2
ret void
}

LLVM IR (-O2):
define void @scary() {
store volatile i32 10, i32* inttoptr (i64 3735928559 to i32*)
ret void
}
/* Variables and functions */
double exp(double);
double sinh(double x) { return .5 * (exp(x) - exp(-x)); }


x86 assembly (clang, -O0):
<sinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
movsd  -0x10(%rbp),%xmm1
subsd  %xmm0,%xmm1
movsd  0xea2(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sinh>:
sub    $0x28,%rsp
movaps %xmm0,0x10(%rsp)
call   1030 <exp@plt>
movsd  %xmm0,0x8(%rsp)
movapd 0x10(%rsp),%xmm0
xorpd  0xece(%rip),%xmm0
call   1030 <exp@plt>
movsd  0x8(%rsp),%xmm1
subsd  %xmm0,%xmm1
mulsd  0xec7(%rip),%xmm1
movapd %xmm1,%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @sinh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
%5 = load double, double* %2
%6 = fneg double %5
%7 = call double @exp(double %6)
%8 = fsub double %4, %7
%9 = fmul double 5.000000e-01, %8
ret double %9
}

LLVM IR (-O2):
define double @sinh(double %0) {
%2 = tail call double @exp(double %0)
%3 = fneg double %0
%4 = tail call double @exp(double %3)
%5 = fsub double %2, %4
%6 = fmul double %5, 5.000000e-01
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ print_parens_aux(char *, int /*<<< orphan*/,
                                    int /*<<< orphan*/, unsigned int,
                                    int /*<<< orphan*/);
void print_parens(unsigned n) {
  char results[2 * n + 1];
  print_parens_aux(results, 0, 0, n, 0);
}


x86 assembly (clang, -O0):
<print_parens>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,%eax
lea    0x1(%rax,%rax,1),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,%rsp
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
xor    %r8d,%r8d
mov    %r8d,%esi
mov    %r8d,%edx
call   1030 <print_parens_aux@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_parens>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,%ecx
lea    (%rcx,%rcx,1),%eax
add    $0x1,%eax
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
mov    %rsp,%rdi
sub    %rax,%rdi
mov    %rdi,%rsp
xor    %esi,%esi
xor    %edx,%edx
xor    %r8d,%r8d
call   1030 <print_parens_aux@plt>
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
define void @print_parens(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = mul i32 2, %5
%7 = add i32 %6, 1
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %3
%10 = alloca i8, i64 %8
store i64 %8, i64* %4
%11 = load i32, i32* %2
%12 = call i32 @print_parens_aux(i8* %10, i32 0, i32 0, i32 %11, i32 0)
%13 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @print_parens(i32 %0) {
%2 = shl i32 %0, 1
%3 = or i32 %2, 1
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4
%6 = call i32 @print_parens_aux(i8* %5, i32 0, i32 0, i32 %0, i32 0)
ret void
}
int f(int a, int b, int c) {
  a -= (short)b * (short)c;
  return a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
movswl %ax,%ecx
mov    -0xc(%rbp),%eax
cwtl
imul   %eax,%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
movswl %si,%ecx
movswl %dx,%edx
imul   %ecx,%edx
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = trunc i32 %7 to i16
%9 = sext i16 %8 to i32
%10 = load i32, i32* %6
%11 = trunc i32 %10 to i16
%12 = sext i16 %11 to i32
%13 = mul nsw i32 %9, %12
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, %13
store i32 %15, i32* %4
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 16
%5 = ashr exact i32 %4, 16
%6 = shl i32 %2, 16
%7 = ashr exact i32 %6, 16
%8 = mul nsw i32 %7, %5
%9 = sub nsw i32 %0, %8
ret i32 %9
}
int foo(void) {
  int a, b, c;
  asm("# Magic instruction" : "=r"(a) : "r"(0) : "memory");
  asm("# Magic instruction" : "=r"(b) : "r"(0) : "memory");
  asm("# Magic instruction" : "=r"(c) : "r"(0) : "memory");
  return a + b + c;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
add    %ecx,%edx
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 asm "# Magic instruction", "=r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %4, i32* %1
%5 = call i32 asm "# Magic instruction", "=r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %5, i32* %2
%6 = call i32 asm "# Magic instruction", "=r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %6, i32* %3
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @foo() {
%1 = tail call i32 asm "# Magic instruction", "=r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 0)
%2 = tail call i32 asm "# Magic instruction", "=r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 0)
%3 = tail call i32 asm "# Magic instruction", "=r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 0)
%4 = add nsw i32 %2, %1
%5 = add nsw i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handle_sigpipe(int sig) { printf("SIGPIPE!\n"); }


x86 assembly (clang, -O0):
<handle_sigpipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_sigpipe>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"SIGPIPE!\0A\00"
define void @handle_sigpipe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"SIGPIPE!\00"
define void @handle_sigpipe(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/);
void threadExit(void) { pthread_exit(0); }


x86 assembly (clang, -O0):
<threadExit>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <pthread_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadExit>:
xor    %edi,%edi
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define void @threadExit() {
%1 = call i32 @pthread_exit(i32 0)
ret void
}

LLVM IR (-O2):
define void @threadExit() {
%1 = tail call i32 @pthread_exit(i32 0)
ret void
}
/* Type definitions */
struct block {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rotate_left(struct block *);
void rotate_right(struct block *b) {
  for (int i = 0; i < 3; i++)
    rotate_left(b);
}


x86 assembly (clang, -O0):
<rotate_right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jge    1144 <rotate_right+0x34>
mov    -0x8(%rbp),%rdi
call   1030 <rotate_left@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <rotate_right+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate_right>:
push   %rbx
mov    %rdi,%rbx
call   1030 <rotate_left@plt>
mov    %rbx,%rdi
call   1030 <rotate_left@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <rotate_left@plt>

LLVM IR (-O0):
%struct.block = type { i32 }
define void @rotate_right(%struct.block* %0) {
%2 = alloca %struct.block*
%3 = alloca i32
store %struct.block* %0, %struct.block** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 3
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load %struct.block*, %struct.block** %2
%9 = call i32 @rotate_left(%struct.block* %8)
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
%struct.block = type { i32 }
define void @rotate_right(%struct.block* %0) {
%2 = tail call i32 @rotate_left(%struct.block* %0)
%3 = tail call i32 @rotate_left(%struct.block* %0)
%4 = tail call i32 @rotate_left(%struct.block* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ set_pin(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
void io_write_pin(uint8_t pin, uint8_t value) {
  set_pin(pin, value, 0x12, 0x13);
}


x86 assembly (clang, -O0):
<io_write_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x12,%edx
mov    $0x13,%ecx
call   1030 <set_pin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_write_pin>:
mov    $0x12,%edx
mov    $0x13,%ecx
jmp    1030 <set_pin@plt>

LLVM IR (-O0):
define void @io_write_pin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @set_pin(i32 %5, i32 %6, i32 18, i32 19)
ret void
}

LLVM IR (-O2):
define void @io_write_pin(i32 %0, i32 %1) {
%3 = tail call i32 @set_pin(i32 %0, i32 %1, i32 18, i32 19)
ret void
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
float randf() { return ((float)rand()) / (RAND_MAX + 1.0); }


x86 assembly (clang, -O0):
<randf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed4(%rip),%xmm1
mov    0x2eb5(%rip),%rax
addsd  (%rax),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<randf>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ec4(%rip),%rax
movsd  (%rax),%xmm1
addsd  0xed0(%rip),%xmm1
cvtss2sd %xmm0,%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define float @randf() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = fpext float %2 to double
%4 = load double, double* @RAND_MAX
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double %3, %5
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define float @randf() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = fpext float %2 to double
%4 = load double, double* @RAND_MAX
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double %3, %5
%7 = fptrunc double %6 to float
ret float %7
}
long f(long x, long y) { return (x > 1) ? y : (y & 1); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x1,-0x8(%rbp)
jle    1124 <f+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1130 <f+0x30>
mov    -0x10(%rbp),%rax
and    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %esi,%eax
and    $0x1,%eax
cmp    $0x2,%rdi
cmovge %rsi,%rax
ret

LLVM IR (-O0):
define i64 @f(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp sgt i64 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i64, i64* %4
br label %12
9: ; preds = %2
%10 = load i64, i64* %4
%11 = and i64 %10, 1
br label %12
12: ; preds = %9, %7
%13 = phi i64 [ %8, %7 ], [ %11, %9 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @f(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, 1
%4 = and i64 %1, 1
%5 = select i1 %3, i64 %1, i64 %4
ret i64 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t be16(uint8_t *p) {
  uint16_t a;
  a = p[0] << 8;
  a |= p[1];
  return a;
}


x86 assembly (clang, -O0):
<be16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<be16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @be16(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = shl i32 %6, 8
store i32 %7, i32* %3
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
%11 = load i32, i32* %3
%12 = or i32 %11, %10
store i32 %12, i32* %3
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @be16(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = or i32 %3, %5
ret i32 %6
}
unsigned long tegra_cl_dvfs_request_get(struct tegra_cl_dvfs *cld) { return 0; }


x86 assembly (clang, -O0):
<tegra_cl_dvfs_request_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_cl_dvfs_request_get>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tegra_cl_dvfs = type opaque
define i64 @tegra_cl_dvfs_request_get(%struct.tegra_cl_dvfs* %0) {
%2 = alloca %struct.tegra_cl_dvfs*
store %struct.tegra_cl_dvfs* %0, %struct.tegra_cl_dvfs** %2
ret i64 0
}

LLVM IR (-O2):
%struct.tegra_cl_dvfs = type opaque
define i64 @tegra_cl_dvfs_request_get(%struct.tegra_cl_dvfs* nocapture readnone %0) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
char *strdup(char const *);
char *xstrdup(const char *str) {
  char *ret = strdup(str);
  if (!ret) {
    fprintf(stderr, "Memory exhausted");
    abort();
  }
  return ret;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1170 <xstrdup+0x40>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %rax
call   1050 <strdup@plt>
test   %rax,%rax
je     113d <xstrdup+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [17 x i8] c"Memory exhausted\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [17 x i8] c"Memory exhausted\00"
define noalias i8* @xstrdup(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i8* %2
}
void stringlists_init(void) {}


x86 assembly (clang, -O0):
<stringlists_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringlists_init>:
ret

LLVM IR (-O0):
define void @stringlists_init() {
ret void
}

LLVM IR (-O2):
define void @stringlists_init() {
ret void
}
/* Variables and functions */
int get_build_date();
int /*<<< orphan*/ printf(char *, char *, int, int /*<<< orphan*/, int);
void version(void) {
  printf("c (C Compiler) %s %d (release) %d - Build: %d\n"
         "Copyright (c) 2011 Eudis Duran\n"
         "See LICENSE file for details.\n",
         "- 0.0.3 -", get_build_date(), 0, 201);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <get_build_date@plt>
mov    %eax,%edx
lea    0xecc(%rip),%rdi
lea    0xf31(%rip),%rsi
xor    %ecx,%ecx
mov    $0xc9,%r8d
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
push   %rax
xor    %eax,%eax
call   1040 <get_build_date@plt>
lea    0xed1(%rip),%rdi
lea    0xf36(%rip),%rsi
mov    %eax,%edx
xor    %ecx,%ecx
mov    $0xc9,%r8d
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [108 x i8] c"c (C Compiler) %s %d (release) %d - Build: %d\0ACopyright (c) 2011 Eudis Duran\0ASee LICENSE file for details.\0A\00"
@.str.1 = [10 x i8] c"- 0.0.3 -\00"
define void @version() {
%1 = call i32 (...) @get_build_date()
%2 = call i32 @printf(i8* getelementptr inbounds ([108 x i8], [108 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %1, i32 0, i32 201)
ret void
}

LLVM IR (-O2):
@.str = [108 x i8] c"c (C Compiler) %s %d (release) %d - Build: %d\0ACopyright (c) 2011 Eudis Duran\0ASee LICENSE file for details.\0A\00"
@.str.1 = [10 x i8] c"- 0.0.3 -\00"
define void @version() {
%1 = tail call i32 (...) @get_build_date()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([108 x i8], [108 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %1, i32 0, i32 201)
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int64_t ce_count_digits(int64_t n) {
  if (n < 0)
    n = -n;
  if (n == 0)
    return 1;
  int count = 0;
  while (n > 0) {
    n /= 10;
    count++;
  }
  return count;
}


x86 assembly (clang, -O0):
<ce_count_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1119 <ce_count_digits+0x19>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112f <ce_count_digits+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1162 <ce_count_digits+0x62>
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    115c <ce_count_digits+0x5c>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1136 <ce_count_digits+0x36>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ce_count_digits>:
test   %edi,%edi
je     1135 <ce_count_digits+0x35>
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
xor    %eax,%eax
mov    $0xcccccccd,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ecx,%esi
imul   %rdx,%rsi
shr    $0x23,%rsi
add    $0x1,%eax
cmp    $0x9,%ecx
mov    %esi,%ecx
ja     1120 <ce_count_digits+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ce_count_digits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 0, %8
store i32 %9, i32* %3
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 1, i32* %2
br label %25
14: ; preds = %10
store i32 0, i32* %4
br label %15
15: ; preds = %18, %14
%16 = load i32, i32* %3
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = load i32, i32* %3
%20 = sdiv i32 %19, 10
store i32 %20, i32* %3
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %15
23: ; preds = %15
%24 = load i32, i32* %4
store i32 %24, i32* %2
br label %25
25: ; preds = %23, %13
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @ce_count_digits(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ 0, %3 ]
%7 = phi i32 [ %8, %5 ], [ %4, %3 ]
%8 = udiv i32 %7, 10
%9 = add nuw nsw i32 %6, 1
%10 = icmp ult i32 %7, 10
br i1 %10, label %11, label %5
11: ; preds = %5, %1
%12 = phi i32 [ 1, %1 ], [ %9, %5 ]
ret i32 %12
}