xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ w;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  double w[1000];
  int i;
  for (i = 0; i < 1000; i++)
    w[i] = i;
  printf("data length = %d\n", sizeof(w));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1f60,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x1f54(%rbp)
cmpl   $0x3e8,-0x1f54(%rbp)
jge    1168 <main+0x58>
cvtsi2sdl -0x1f54(%rbp),%xmm0
ff
movslq -0x1f54(%rbp),%rax
movsd  %xmm0,-0x1f50(%rbp,%rax,8)
ff ff
mov    -0x1f54(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1f54(%rbp)
jmp    112c <main+0x1c>
lea    0xe91(%rip),%rdi
mov    $0x1f40,%esi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1f60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1f40,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"data length = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [1000 x double]
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1000
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %3
%9 = sitofp i32 %8 to double
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [1000 x double], [1000 x double]* %2, i64 0, i64 %11
store double %9, double* %12
br label %13
13: ; preds = %7
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 8000)
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
@.str = [18 x i8] c"data length = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 8000)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ hw_ncpu;

/* Variables and functions */
scalar_t__ sysctlbyname(char *, int *, size_t *, int /*<<< orphan*/ *,
                        int /*<<< orphan*/);
size_t get_number_of_cpus() {
  int hw_ncpu;
  size_t hw_ncpu_size = sizeof(hw_ncpu);
  if (sysctlbyname("hw.ncpu", &hw_ncpu, &hw_ncpu_size, NULL, 0) < 0) {
    return 0;
  }
  return (size_t)(hw_ncpu);
}


x86 assembly (clang, -O0):
<get_number_of_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x4,-0x18(%rbp)
lea    0xed9(%rip),%rdi
lea    -0xc(%rbp),%rsi
lea    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
call   1030 <sysctlbyname@plt>
cmp    $0x0,%rax
jge    1152 <get_number_of_cpus+0x42>
movq   $0x0,-0x8(%rbp)
jmp    115a <get_number_of_cpus+0x4a>
movslq -0xc(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_number_of_cpus>:
push   %rbx
sub    $0x10,%rsp
movq   $0x4,0x8(%rsp)
lea    0xedb(%rip),%rdi
xor    %ebx,%ebx
lea    0x4(%rsp),%rsi
lea    0x8(%rsp),%rdx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1030 <sysctlbyname@plt>
test   %rax,%rax
movslq 0x4(%rsp),%rax
cmovs  %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"hw.ncpu\00"
define i64 @get_number_of_cpus() {
%1 = alloca i64
%2 = alloca i32
%3 = alloca i64
store i64 4, i64* %3
%4 = call i64 @sysctlbyname(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32* %2, i64* %3, i32* null, i32 0)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i64 0, i64* %1
br label %10
7: ; preds = %0
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
store i64 %9, i64* %1
br label %10
10: ; preds = %7, %6
%11 = load i64, i64* %1
ret i64 %11
}

LLVM IR (-O2):
@.str = [8 x i8] c"hw.ncpu\00"
define i64 @get_number_of_cpus() {
%1 = alloca i32
%2 = alloca i64
%3 = bitcast i32* %1 to i8*
%4 = bitcast i64* %2 to i8*
store i64 4, i64* %2
%5 = call i64 @sysctlbyname(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32* %1, i64* %2, i32* null, i32 0)
%6 = icmp slt i64 %5, 0
%7 = load i32, i32* %1
%8 = sext i32 %7 to i64
%9 = select i1 %6, i64 0, i64 %8
ret i64 %9
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
unsigned char ExtractDay(uint16_t date) { return (date >> 7) & 0x1F; }


x86 assembly (clang, -O0):
<ExtractDay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x7,%eax
and    $0x1f,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExtractDay>:
mov    %edi,%eax
shr    $0x7,%eax
and    $0x1f,%al
ret

LLVM IR (-O0):
define zeroext i8 @ExtractDay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 7
%5 = and i32 %4, 31
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @ExtractDay(i32 %0) {
%2 = lshr i32 %0, 7
%3 = trunc i32 %2 to i8
%4 = and i8 %3, 31
ret i8 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t sqr(uint32_t i) { return i * i; }


x86 assembly (clang, -O0):
<sqr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqr>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @sqr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sqr(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
/* Variables and functions */
float fabs(float);
scalar_t__ isnan(float);
float check_price(float price) {
  if (isnan(price) != 0 || fabs(price) > 1000000.f)
    return (0.f);
  else
    return (price);
}


x86 assembly (clang, -O0):
<check_price>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%rax
jne    115c <check_price+0x3c>
movss  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
movss  0xead(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1169 <check_price+0x49>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1173 <check_price+0x53>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_price>:
sub    $0x18,%rsp
movaps %xmm0,(%rsp)
call   1030 <isnan@plt>
xorps  %xmm0,%xmm0
test   %rax,%rax
jne    1143 <check_price+0x33>
movaps 0xed4(%rip),%xmm1
movaps (%rsp),%xmm2
andps  %xmm2,%xmm1
movss  0xed5(%rip),%xmm0
cmpltss %xmm1,%xmm0
andnps %xmm2,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define float @check_price(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = call i64 @isnan(float %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load float, float* %3
%9 = call float @fabs(float %8)
%10 = fcmp ogt float %9, 1.000000e+06
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store float 0.000000e+00, float* %2
br label %14
12: ; preds = %7
%13 = load float, float* %3
store float %13, float* %2
br label %14
14: ; preds = %12, %11
%15 = load float, float* %2
ret float %15
}

LLVM IR (-O2):
define float @check_price(float %0) {
%2 = tail call i64 @isnan(float %0)
%3 = icmp ne i64 %2, 0
%4 = tail call float @llvm.fabs.f32(float %0)
%5 = fcmp ogt float %4, 1.000000e+06
%6 = select i1 %3, i1 true, i1 %5
%7 = select i1 %6, float 0.000000e+00, float %0
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_func(void *mem, void *arg) { free(mem); }


x86 assembly (clang, -O0):
<free_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_func>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_func(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @free_func(i8* nocapture %0, i8* nocapture readnone %1) {
%3 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int read(int, char *, int);
int /*<<< orphan*/ write(int, char *, int);
void echo(int fd) {
  int n;
  char buffer[256];
  while ((n = read(fd, buffer, 256)) > 0) {
    write(fd, buffer, n);
  }
}


x86 assembly (clang, -O0):
<echo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x110(%rbp),%rsi
mov    $0x100,%edx
call   1040 <read@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    1165 <echo+0x45>
mov    -0x4(%rbp),%edi
lea    -0x110(%rbp),%rsi
mov    -0x8(%rbp),%edx
call   1030 <write@plt>
jmp    112e <echo+0xe>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<echo>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %edi,%ebx
mov    %rsp,%rsi
mov    $0x100,%edx
call   1040 <read@plt>
test   %eax,%eax
jle    115f <echo+0x3f>
mov    %rsp,%r14
mov    %ebx,%edi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x100,%edx
call   1040 <read@plt>
test   %eax,%eax
jg     1140 <echo+0x20>
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @echo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [256 x i8]
store i32 %0, i32* %2
br label %5
5: ; preds = %10, %1
%6 = load i32, i32* %2
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%8 = call i32 @read(i32 %6, i8* %7, i32 256)
store i32 %8, i32* %3
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %5
%11 = load i32, i32* %2
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%13 = load i32, i32* %3
%14 = call i32 @write(i32 %11, i8* %12, i32 %13)
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @echo(i32 %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = call i32 @read(i32 %0, i8* %3, i32 256)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ %4, %1 ]
%8 = call i32 @write(i32 %0, i8* %3, i32 %7)
%9 = call i32 @read(i32 %0, i8* %3, i32 256)
%10 = icmp sgt i32 %9, 0
br i1 %10, label %6, label %11
11: ; preds = %6, %1
ret void
}
/* Variables and functions */
char *strtrim_left(char *, char);
char *skipt(char *p) { return strtrim_left(p, '\t'); }


x86 assembly (clang, -O0):
<skipt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x9,%esi
call   1030 <strtrim_left@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipt>:
mov    $0x9,%esi
jmp    1030 <strtrim_left@plt>

LLVM IR (-O0):
define i8* @skipt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strtrim_left(i8* %3, i8 signext 9)
ret i8* %4
}

LLVM IR (-O2):
define i8* @skipt(i8* %0) {
%2 = tail call i8* @strtrim_left(i8* %0, i8 signext 9)
ret i8* %2
}
int psci_init(void) { return 0; }


x86 assembly (clang, -O0):
<psci_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<psci_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @psci_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @psci_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ CtpRoutingEngineP__0__CtpInfo__triggerImmediateRouteUpdate();
void CtpForwardingEngineP__0__CtpInfo__triggerImmediateRouteUpdate(void) {
  CtpRoutingEngineP__0__CtpInfo__triggerImmediateRouteUpdate();
}


x86 assembly (clang, -O0):
<CtpForwardingEngineP__0__CtpInfo__triggerImmediateRouteUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CtpRoutingEngineP__0__CtpInfo__triggerImmediateRouteUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CtpForwardingEngineP__0__CtpInfo__triggerImmediateRouteUpdate>:
xor    %eax,%eax
jmp    1030 <CtpRoutingEngineP__0__CtpInfo__triggerImmediateRouteUpdate@plt>

LLVM IR (-O0):
define void @CtpForwardingEngineP__0__CtpInfo__triggerImmediateRouteUpdate() {
%1 = call i32 (...) @CtpRoutingEngineP__0__CtpInfo__triggerImmediateRouteUpdate()
ret void
}

LLVM IR (-O2):
define void @CtpForwardingEngineP__0__CtpInfo__triggerImmediateRouteUpdate() {
%1 = tail call i32 (...) @CtpRoutingEngineP__0__CtpInfo__triggerImmediateRouteUpdate()
ret void
}
/* Variables and functions */
scalar_t__ sample_biased_delta_r(int);
int sample_biased_r(int nsteps) {
  int i, dist;
  dist = 0;
  for (i = 0; i < nsteps; i++)
    dist += sample_biased_delta_r(i);
  return dist;
}


x86 assembly (clang, -O0):
<sample_biased_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1158 <sample_biased_r+0x48>
mov    -0x8(%rbp),%edi
call   1030 <sample_biased_delta_r@plt>
mov    %rax,%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <sample_biased_r+0x19>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample_biased_r>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
jle    1133 <sample_biased_r+0x23>
mov    %edi,%r14d
xor    %ebx,%ebx
xor    %ebp,%ebp
nop
mov    %ebp,%edi
call   1030 <sample_biased_delta_r@plt>
add    %eax,%ebx
add    $0x1,%ebp
cmp    %ebp,%r14d
jne    1120 <sample_biased_r+0x10>
jmp    1135 <sample_biased_r+0x25>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sample_biased_r(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = call i64 @sample_biased_delta_r(i32 %10)
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = add nsw i64 %13, %11
%15 = trunc i64 %14 to i32
store i32 %15, i32* %4
br label %16
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @sample_biased_r(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = tail call i64 @sample_biased_delta_r(i32 %5)
%7 = trunc i64 %6 to i32
%8 = add i32 %4, %7
%9 = add nuw nsw i32 %5, 1
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ check_vect();
int /*<<< orphan*/ main1(int);
int main(void) {
  check_vect();
  main1(16);
  main1(0);
  main1(1);
  main1(2);
  main1(16 - 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
mov    $0x10,%edi
call   1040 <main1@plt>
xor    %edi,%edi
call   1040 <main1@plt>
mov    $0x1,%edi
call   1040 <main1@plt>
mov    $0x2,%edi
call   1040 <main1@plt>
mov    $0xf,%edi
call   1040 <main1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <check_vect@plt>
mov    $0x10,%edi
call   1040 <main1@plt>
xor    %edi,%edi
call   1040 <main1@plt>
mov    $0x1,%edi
call   1040 <main1@plt>
mov    $0x2,%edi
call   1040 <main1@plt>
mov    $0xf,%edi
call   1040 <main1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @check_vect()
%3 = call i32 @main1(i32 16)
%4 = call i32 @main1(i32 0)
%5 = call i32 @main1(i32 1)
%6 = call i32 @main1(i32 2)
%7 = call i32 @main1(i32 15)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @check_vect()
%2 = tail call i32 @main1(i32 16)
%3 = tail call i32 @main1(i32 0)
%4 = tail call i32 @main1(i32 1)
%5 = tail call i32 @main1(i32 2)
%6 = tail call i32 @main1(i32 15)
ret i32 0
}
/* Variables and functions */
int rand();
int main(int argc, char **argv) {
  int x;
label:
  x = rand();
  if (x > 250) {
    goto label;
  }
  return x + 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xfa,-0x14(%rbp)
jle    1142 <main+0x32>
jmp    1126 <main+0x16>
mov    -0x14(%rbp),%eax
add    $0x5,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cmp    $0xfa,%eax
jg     1120 <main+0x10>
add    $0x5,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %11, %2
%8 = call i32 (...) @rand()
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = icmp sgt i32 %9, 250
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
%13 = load i32, i32* %6
%14 = add nsw i32 %13, 5
ret i32 %14
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 (...) @rand()
%5 = icmp sgt i32 %4, 250
br i1 %5, label %3, label %6
6: ; preds = %3
%7 = add nsw i32 %4, 5
ret i32 %7
}
int parse_memory_fields_padding(int offset, int size) {
  size = (((size) < (-1)) ? (size) : (-1));
  return (offset % size == 0) ? 0 : size - offset % size;
}


x86 assembly (clang, -O0):
<parse_memory_fields_padding>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jge    111f <parse_memory_fields_padding+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112c <parse_memory_fields_padding+0x2c>
mov    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    112c <parse_memory_fields_padding+0x2c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    114c <parse_memory_fields_padding+0x4c>
xor    %eax,%eax
mov    %eax,-0x10(%rbp)
jmp    1161 <parse_memory_fields_padding+0x61>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0x14(%rbp),%eax
sub    %edx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_memory_fields_padding>:
mov    %edi,%eax
test   %esi,%esi
mov    $0xffffffff,%ecx
cmovs  %esi,%ecx
cltd
idiv   %ecx
sub    %edx,%ecx
test   %edx,%edx
cmove  %edx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @parse_memory_fields_padding(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %4
br label %10
9: ; preds = %2
br label %10
10: ; preds = %9, %7
%11 = phi i32 [ %8, %7 ], [ -1, %9 ]
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %10
br label %23
17: ; preds = %10
%18 = load i32, i32* %4
%19 = load i32, i32* %3
%20 = load i32, i32* %4
%21 = srem i32 %19, %20
%22 = sub nsw i32 %18, %21
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 0, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @parse_memory_fields_padding(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, -1
%4 = select i1 %3, i32 %1, i32 -1
%5 = srem i32 %0, %4
%6 = icmp eq i32 %5, 0
%7 = sub nsw i32 %4, %5
%8 = select i1 %6, i32 0, i32 %7
ret i32 %8
}
/* Variables and functions */
double floor(double);
double c_floor(double arg0) { return floor(arg0); }


x86 assembly (clang, -O0):
<c_floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_floor>:
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @c_floor(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.floor.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @c_floor(double %0) {
%2 = tail call double @llvm.floor.f64(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int /*<<< orphan*/ O_RDWR;
int openat(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int main(void) { return openat(AT_FDCWD, "test", O_RDWR); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    0x2eb9(%rip),%rax
mov    (%rax),%edx
lea    0xec8(%rip),%rsi
call   1030 <openat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    0x2ec8(%rip),%rax
mov    (%rax),%edx
lea    0xed7(%rip),%rsi
jmp    1030 <openat@plt>

LLVM IR (-O0):
@AT_FDCWD = global i32 0
@.str = [5 x i8] c"test\00"
@O_RDWR = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @AT_FDCWD
%3 = load i32, i32* @O_RDWR
%4 = call i32 @openat(i32 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %4
}

LLVM IR (-O2):
@AT_FDCWD = global i32 0
@.str = [5 x i8] c"test\00"
@O_RDWR = global i32 0
define i32 @main() {
%1 = load i32, i32* @AT_FDCWD
%2 = load i32, i32* @O_RDWR
%3 = tail call i32 @openat(i32 %1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 %3
}
int match_bool(char a) {
  if (a == '>' || a == '<' || a == '=' || a == '!')
    return 0;
  return -1;
}


x86 assembly (clang, -O0):
<match_bool>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x3e,%eax
je     113e <match_bool+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x3c,%eax
je     113e <match_bool+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x3d,%eax
je     113e <match_bool+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x21,%eax
jne    114a <match_bool+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1151 <match_bool+0x51>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_bool>:
cmp    $0x3e,%dil
ja     111d <match_bool+0x1d>
xor    %eax,%eax
movzbl %dil,%ecx
movabs $0x7000000200000000,%rdx
bt     %rcx,%rdx
jae    111d <match_bool+0x1d>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @match_bool(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 62
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 60
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 61
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 33
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i32 0, i32* %2
br label %21
20: ; preds = %15
store i32 -1, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @match_bool(i8 signext %0) {
switch i8 %0, label %2 [
i8 62, label %3
i8 61, label %3
i8 60, label %3
i8 33, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %2
%4 = phi i32 [ -1, %2 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int _mm_extract_pi16(int /*<<< orphan*/, int);
int test_mm_extract_pi16(__m64 a) { return _mm_extract_pi16(a, 2); }


x86 assembly (clang, -O0):
<test_mm_extract_pi16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1030 <_mm_extract_pi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_extract_pi16>:
mov    $0x2,%esi
jmp    1030 <_mm_extract_pi16@plt>

LLVM IR (-O0):
define i32 @test_mm_extract_pi16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_extract_pi16(i32 %3, i32 2)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_extract_pi16(i32 %0) {
%2 = tail call i32 @_mm_extract_pi16(i32 %0, i32 2)
ret i32 %2
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long window;
};
typedef TYPE_1__ XVisibilityEvent;

/* Variables and functions */
void set_XVisibilityEvent_window(void *_p, unsigned long _v) {
  ((XVisibilityEvent *)_p)->window = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XVisibilityEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XVisibilityEvent_window>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XVisibilityEvent_window(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XVisibilityEvent_window(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int probe_api();
int mus_audio_initialize(void) { return (probe_api()); }


x86 assembly (clang, -O0):
<mus_audio_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <probe_api@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mus_audio_initialize>:
xor    %eax,%eax
jmp    1030 <probe_api@plt>

LLVM IR (-O0):
define i32 @mus_audio_initialize() {
%1 = call i32 (...) @probe_api()
ret i32 %1
}

LLVM IR (-O2):
define i32 @mus_audio_initialize() {
%1 = tail call i32 (...) @probe_api()
ret i32 %1
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *strdups(char *s) {
  char *p;
  p = (char *)malloc(strlen(s) + 1);
  if (p != NULL) {
    strcpy(p, s);
    return p;
  }
}


x86 assembly (clang, -O0):
<strdups>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1175 <strdups+0x45>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdups>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <strdups+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdups(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @strlen(i8* %5)
%7 = add nsw i64 %6, 1
%8 = call i64 @malloc(i64 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %17
12: ; preds = %1
%13 = load i8*, i8** %4
%14 = load i8*, i8** %3
%15 = call i32 @strcpy(i8* %13, i8* %14)
%16 = load i8*, i8** %4
store i8* %16, i8** %2
br label %17
17: ; preds = %12, %1
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @strdups(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %1, %7
ret i8* %5
}
__attribute__((always_)) int rodata_test(void) { return 0; }


x86 assembly (clang, -O0):
<rodata_test>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rodata_test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rodata_test() {
ret i32 0
}

LLVM IR (-O2):
define i32 @rodata_test() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int);
char const *uniquestr(char *);
const char *get_unique_name(void) {
  static int num_var = 100;
  char result[15];
  snprintf(result, 14, "$.anon%05d", num_var);
  return uniquestr(result);
}


x86 assembly (clang, -O0):
<get_unique_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0xf(%rbp),%rdi
mov    0x2efe(%rip),%ecx
mov    $0xe,%esi
lea    0xec2(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0xf(%rbp),%rdi
call   1040 <uniquestr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_unique_name>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rdx
lea    0x1(%rsp),%rbx
mov    %rbx,%rdi
mov    $0xe,%esi
mov    $0x64,%ecx
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <uniquestr@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@get_unique_name.num_var = internal global i32 100
@.str = [11 x i8] c"$.anon%05d\00"
define i8* @get_unique_name() {
%1 = alloca [15 x i8]
%2 = getelementptr inbounds [15 x i8], [15 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @get_unique_name.num_var
%4 = call i32 @snprintf(i8* %2, i32 14, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = getelementptr inbounds [15 x i8], [15 x i8]* %1, i64 0, i64 0
%6 = call i8* @uniquestr(i8* %5)
ret i8* %6
}

LLVM IR (-O2):
@.str = [11 x i8] c"$.anon%05d\00"
define i8* @get_unique_name() {
%1 = alloca [15 x i8]
%2 = getelementptr inbounds [15 x i8], [15 x i8]* %1, i64 0, i64 0
%3 = call i32 @snprintf(i8* %2, i32 14, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 100)
%4 = call i8* @uniquestr(i8* %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ E();
int /*<<< orphan*/ init(char *);
int main(int argc, char *argv[]) {
  init("3*(5+8)");
  E();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <init@plt>
mov    $0x0,%al
call   1040 <E@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <init@plt>
xor    %eax,%eax
call   1040 <E@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"3*(5+8)\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @init(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (...) @E()
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"3*(5+8)\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @init(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @E()
ret i32 0
}
void noop_free(void *v __attribute__((unused))) {}


x86 assembly (clang, -O0):
<noop_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop_free>:
ret

LLVM IR (-O0):
define void @noop_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @noop_free(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int close(int);
int chiudi_connessione(int id_connessione) {
  if (close(id_connessione) == -1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<chiudi_connessione>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    1138 <chiudi_connessione+0x28>
movl   $0x1,-0x4(%rbp)
jmp    113f <chiudi_connessione+0x2f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chiudi_connessione>:
push   %rax
call   1030 <close@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @chiudi_connessione(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @close(i32 %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @chiudi_connessione(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
%4 = zext i1 %3 to i32
ret i32 %4
}
void barrier(void) { __sync_synchronize(); }


x86 assembly (clang, -O0):
<barrier>:
push   %rbp
mov    %rsp,%rbp
mfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<barrier>:
mfence
ret

LLVM IR (-O0):
define void @barrier() {
fence seq_cst
ret void
}

LLVM IR (-O2):
define void @barrier() {
fence seq_cst
ret void
}
unsigned short Addr1(void) { return (0x1234); }


x86 assembly (clang, -O0):
<Addr1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1234,%ax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Addr1>:
mov    $0x1234,%ax
ret

LLVM IR (-O0):
define zeroext i16 @Addr1() {
ret i16 4660
}

LLVM IR (-O2):
define zeroext i16 @Addr1() {
ret i16 4660
}
/* Variables and functions */
int *getVar(int /*<<< orphan*/);
int /*<<< orphan*/ sl_getc();
int *getVariable() { return getVar(sl_getc()); }


x86 assembly (clang, -O0):
<getVariable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sl_getc@plt>
mov    %eax,%edi
call   1040 <getVar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getVariable>:
push   %rax
xor    %eax,%eax
call   1030 <sl_getc@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <getVar@plt>

LLVM IR (-O0):
define i32* @getVariable() {
%1 = call i32 (...) @sl_getc()
%2 = call i32* @getVar(i32 %1)
ret i32* %2
}

LLVM IR (-O2):
define i32* @getVariable() {
%1 = tail call i32 (...) @sl_getc()
%2 = tail call i32* @getVar(i32 %1)
ret i32* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ mbstowcs(int /*<<< orphan*/ *, char *, size_t);
char *strchr(char *, char);
void parse_hg_branch(wchar_t *out, char *data, size_t len) {
  char *c;
  if ((c = strchr(data, '\n')) != NULL)
    *c = '\0';
  mbstowcs(out, data, len);
}


x86 assembly (clang, -O0):
<parse_hg_branch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0xa,%esi
call   1040 <strchr@plt>
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
je     1157 <parse_hg_branch+0x37>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mbstowcs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_hg_branch>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
mov    %rsi,%rdi
mov    $0xa,%esi
call   1040 <strchr@plt>
test   %rax,%rax
je     1143 <parse_hg_branch+0x23>
movb   $0x0,(%rax)
mov    %r15,%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <mbstowcs@plt>

LLVM IR (-O0):
define void @parse_hg_branch(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = call i8* @strchr(i8* %8, i8 signext 10)
store i8* %9, i8** %7
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i8*, i8** %7
store i8 0, i8* %12
br label %13
13: ; preds = %11, %3
%14 = load i32*, i32** %4
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = call i32 @mbstowcs(i32* %14, i8* %15, i64 %16)
ret void
}

LLVM IR (-O2):
define void @parse_hg_branch(i32* %0, i8* %1, i64 %2) {
%4 = tail call i8* @strchr(i8* dereferenceable(1) %1, i8 signext 10)
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %3
store i8 0, i8* %4
br label %7
7: ; preds = %6, %3
%8 = tail call i32 @mbstowcs(i32* %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ motor(int, int);
void lib_motor(int mtrnum, int power) { motor(mtrnum, power); }


x86 assembly (clang, -O0):
<lib_motor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <motor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib_motor>:
jmp    1030 <motor@plt>

LLVM IR (-O0):
define void @lib_motor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @motor(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @lib_motor(i32 %0, i32 %1) {
%3 = tail call i32 @motor(i32 %0, i32 %1)
ret void
}
void AssetDestroyHandler(struct _Asset *asset, void *handler) {}


x86 assembly (clang, -O0):
<AssetDestroyHandler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AssetDestroyHandler>:
ret

LLVM IR (-O0):
%struct._Asset = type opaque
define void @AssetDestroyHandler(%struct._Asset* %0, i8* %1) {
%3 = alloca %struct._Asset*
%4 = alloca i8*
store %struct._Asset* %0, %struct._Asset** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct._Asset = type opaque
define void @AssetDestroyHandler(%struct._Asset* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ s2qcir(int *, int *);
void s2qcir_(int *col1, int *col2) { s2qcir(col1, col2); }


x86 assembly (clang, -O0):
<s2qcir_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <s2qcir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2qcir_>:
jmp    1030 <s2qcir@plt>

LLVM IR (-O0):
define void @s2qcir_(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @s2qcir(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @s2qcir_(i32* %0, i32* %1) {
%3 = tail call i32 @s2qcir(i32* %0, i32* %1)
ret void
}
void GP_break33(void) {}


x86 assembly (clang, -O0):
<GP_break33>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GP_break33>:
ret

LLVM IR (-O0):
define void @GP_break33() {
ret void
}

LLVM IR (-O2):
define void @GP_break33() {
ret void
}
/* Type definitions */
struct stat {
  long st_size;
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
scalar_t__ S_ISBLK(int /*<<< orphan*/);
scalar_t__ fstat(int, struct stat *);
long _sizeofdevice(int fd) {
  struct stat ss;
  if (fstat(fd, &ss))
    return -1;
  if (S_ISBLK(ss.st_mode)) {
    return -1;
  }
  return ss.st_size;
}


x86 assembly (clang, -O0):
<_sizeofdevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1040 <fstat@plt>
cmp    $0x0,%rax
je     114e <_sizeofdevice+0x2e>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1175 <_sizeofdevice+0x55>
mov    -0x18(%rbp),%edi
call   1030 <S_ISBLK@plt>
cmp    $0x0,%rax
je     116d <_sizeofdevice+0x4d>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1175 <_sizeofdevice+0x55>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sizeofdevice>:
push   %rbx
sub    $0x10,%rsp
mov    %rsp,%rsi
call   1040 <fstat@plt>
mov    $0xffffffffffffffff,%rbx
test   %rax,%rax
jne    114b <_sizeofdevice+0x2b>
mov    0x8(%rsp),%edi
call   1030 <S_ISBLK@plt>
test   %rax,%rax
jne    114b <_sizeofdevice+0x2b>
mov    (%rsp),%rbx
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.stat = type { i64, i32 }
define i64 @_sizeofdevice(i32 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca %struct.stat
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i64 @fstat(i32 %5, %struct.stat* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 -1, i64* %2
br label %18
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 1
%11 = load i32, i32* %10
%12 = call i64 @S_ISBLK(i32 %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i64 -1, i64* %2
br label %18
15: ; preds = %9
%16 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%17 = load i64, i64* %16
store i64 %17, i64* %2
br label %18
18: ; preds = %15, %14, %8
%19 = load i64, i64* %2
ret i64 %19
}

LLVM IR (-O2):
%struct.stat = type { i64, i32 }
define i64 @_sizeofdevice(i32 %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @fstat(i32 %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 1
%8 = load i32, i32* %7
%9 = tail call i64 @S_ISBLK(i32 %8)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%13 = load i64, i64* %12
br label %14
14: ; preds = %6, %1, %11
%15 = phi i64 [ %13, %11 ], [ -1, %1 ], [ -1, %6 ]
ret i64 %15
}
int function() { return 12; }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
mov    $0xc,%eax
ret

LLVM IR (-O0):
define i32 @function() {
ret i32 12
}

LLVM IR (-O2):
define i32 @function() {
ret i32 12
}
/* Type definitions */
struct map_session_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ storage_storageopen(struct map_session_data *);
int atcommand_storage(const int fd, struct map_session_data *sd,
                      const char *command, const char *message) {
  storage_storageopen(sd);
  return 0;
}


x86 assembly (clang, -O0):
<atcommand_storage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <storage_storageopen@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atcommand_storage>:
push   %rax
mov    %rsi,%rdi
call   1030 <storage_storageopen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.map_session_data = type { i32 }
define i32 @atcommand_storage(i32 %0, %struct.map_session_data* %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca %struct.map_session_data*
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store %struct.map_session_data* %1, %struct.map_session_data** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load %struct.map_session_data*, %struct.map_session_data** %6
%10 = call i32 @storage_storageopen(%struct.map_session_data* %9)
ret i32 0
}

LLVM IR (-O2):
%struct.map_session_data = type { i32 }
define i32 @atcommand_storage(i32 %0, %struct.map_session_data* %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 @storage_storageopen(%struct.map_session_data* %1)
ret i32 0
}
/* Variables and functions */
int str_index_of(char *, char *);
char *str_ndup(char *, int);
char *get_until(char *haystack, char *until) {
  int offset = str_index_of(haystack, until);
  return str_ndup(haystack, offset);
}


x86 assembly (clang, -O0):
<get_until>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <str_index_of@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <str_ndup@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_until>:
push   %rbx
mov    %rdi,%rbx
call   1030 <str_index_of@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <str_ndup@plt>

LLVM IR (-O0):
define i8* @get_until(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @str_index_of(i8* %6, i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %5
%11 = call i8* @str_ndup(i8* %9, i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @get_until(i8* %0, i8* %1) {
%3 = tail call i32 @str_index_of(i8* %0, i8* %1)
%4 = tail call i8* @str_ndup(i8* %0, i32 %3)
ret i8* %4
}
/* Type definitions */
typedef char uint8_t;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ _write(int, char *, int);
void oled_text_pos_set(int fd, uint8_t x, uint8_t y) {
  uint8_t buf[] = {'T', 'P', x, y};
  _write(fd, buf, sizeof(buf));
}


x86 assembly (clang, -O0):
<oled_text_pos_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %edi,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
movb   $0x54,-0xa(%rbp)
movb   $0x50,-0x9(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0x8(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x7(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xa(%rbp),%rsi
mov    $0x4,%edx
call   1030 <_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oled_text_pos_set>:
push   %rax
movw   $0x5054,0x4(%rsp)
mov    %sil,0x6(%rsp)
mov    %dl,0x7(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @oled_text_pos_set(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
%7 = alloca [4 x i8]
store i32 %0, i32* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %7, i64 0, i64 0
store i8 84, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8 80, i8* %9
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %5
store i8 %11, i8* %10
%12 = getelementptr inbounds i8, i8* %10, i64 1
%13 = load i8, i8* %6
store i8 %13, i8* %12
%14 = load i32, i32* %4
%15 = getelementptr inbounds [4 x i8], [4 x i8]* %7, i64 0, i64 0
%16 = call i32 @_write(i32 %14, i8* %15, i32 4)
ret void
}

LLVM IR (-O2):
define void @oled_text_pos_set(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca [4 x i8]
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
store i8 84, i8* %5
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 1
store i8 80, i8* %6
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 2
store i8 %1, i8* %7
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 3
store i8 %2, i8* %8
%9 = call i32 @_write(i32 %0, i8* %5, i32 4)
ret void
}
int size_class_in_tiny_or_medium(int size_class) { return size_class < 24; }


x86 assembly (clang, -O0):
<size_class_in_tiny_or_medium>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x18,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_class_in_tiny_or_medium>:
xor    %eax,%eax
cmp    $0x18,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @size_class_in_tiny_or_medium(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 24
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @size_class_in_tiny_or_medium(i32 %0) {
%2 = icmp slt i32 %0, 24
%3 = zext i1 %2 to i32
ret i32 %3
}
double abs_d(double x) { return x > 0 ? x : -x; }


x86 assembly (clang, -O0):
<abs_d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    112a <abs_d+0x2a>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    114b <abs_d+0x4b>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_d>:
movapd 0xef8(%rip),%xmm1
xorpd  %xmm0,%xmm1
xorpd  %xmm2,%xmm2
cmpltsd %xmm0,%xmm2
andpd  %xmm2,%xmm0
andnpd %xmm1,%xmm2
orpd   %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @abs_d(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load double, double* %2
br label %10
7: ; preds = %1
%8 = load double, double* %2
%9 = fneg double %8
br label %10
10: ; preds = %7, %5
%11 = phi double [ %6, %5 ], [ %9, %7 ]
ret double %11
}

LLVM IR (-O2):
define double @abs_d(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %0, double %3
ret double %4
}