#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
bool divisible(long n) {
  for (int i = 20; i >= 11; i--) {
    if (n % i != 0) {
      return false;
    }
  }
  return true;
}


x86 assembly (clang, -O0):
<divisible>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x14,-0x14(%rbp)
cmpl   $0xb,-0x14(%rbp)
jl     114f <divisible+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cqto
idiv   %rcx
cmp    $0x0,%rdx
je     113c <divisible+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1156 <divisible+0x56>
jmp    1141 <divisible+0x41>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <divisible+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divisible>:
mov    %rdi,%r9
movabs $0x6666666666666667,%rcx
66 66 66
mov    %rdi,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x3,%rdx
add    %rax,%rdx
shl    $0x2,%rdx
lea    (%rdx,%rdx,4),%rax
sub    %rax,%rdi
movabs $0xd79435e50d79436,%rcx
43 79 0d
mov    %r9,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
add    %rdx,%rax
lea    (%rax,%rax,8),%rcx
lea    (%rax,%rcx,2),%rax
mov    %r9,%rcx
sub    %rax,%rcx
or     %rdi,%rcx
movabs $0xe38e38e38e38e39,%rdx
e3 38 0e
mov    %r9,%rax
imul   %rdx
mov    %rdx,%rax
shr    $0x3f,%rax
add    %rdx,%rax
add    %rax,%rax
lea    (%rax,%rax,8),%rax
mov    %r9,%r8
sub    %rax,%r8
movabs $0x7878787878787879,%rdx
78 78 78
mov    %r9,%rax
imul   %rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x3,%rdx
add    %rax,%rdx
mov    %rdx,%rax
shl    $0x4,%rax
add    %rdx,%rax
mov    %r9,%rdi
sub    %rax,%rdi
or     %r8,%rdi
or     %rcx,%rdi
mov    %r9d,%r8d
and    $0xf,%r8d
movabs $0x8888888888888889,%rcx
88 88 88
mov    %r9,%rax
imul   %rcx
add    %r9,%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x3,%rdx
add    %rax,%rdx
lea    (%rdx,%rdx,4),%rax
lea    (%rax,%rax,2),%rax
mov    %r9,%rcx
sub    %rax,%rcx
or     %r8,%rcx
or     %rdi,%rcx
movabs $0x4924924924924925,%rdx
92 24 49
mov    %r9,%rax
imul   %rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
mov    %rdx,%rax
shl    $0x4,%rax
mov    %rdx,%rdi
sub    %rax,%rdi
add    %rdx,%rdi
add    %r9,%rdi
movabs $0x4ec4ec4ec4ec4ec5,%rdx
ec c4 4e
mov    %r9,%rax
imul   %rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
lea    (%rdx,%rdx,2),%rax
lea    (%rdx,%rax,4),%rax
mov    %r9,%rsi
sub    %rax,%rsi
or     %rdi,%rsi
movabs $0x2aaaaaaaaaaaaaab,%rdx
aa aa 2a
mov    %r9,%rax
imul   %rdx
mov    %rdx,%rax
shr    $0x3f,%rax
shr    %rdx
add    %rax,%rdx
shl    $0x2,%rdx
lea    (%rdx,%rdx,2),%rax
mov    %r9,%rdi
sub    %rax,%rdi
or     %rsi,%rdi
or     %rcx,%rdi
movabs $0x2e8ba2e8ba2e8ba3,%rcx
a2 8b 2e
mov    %r9,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    %rdx
add    %rax,%rdx
lea    (%rdx,%rdx,4),%rax
lea    (%rdx,%rax,2),%rax
sub    %rax,%r9
xor    %eax,%eax
or     %rdi,%r9
sete   %al
ret

LLVM IR (-O0):
define i32 @divisible(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 20, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = icmp sge i32 %6, 11
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i64, i64* %3
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = srem i64 %9, %11
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %8
store i32 0, i32* %2
br label %20
15: ; preds = %8
br label %16
16: ; preds = %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, -1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
store i32 1, i32* %2
br label %20
20: ; preds = %19, %14
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @divisible(i64 %0) {
%2 = srem i64 %0, 20
%3 = srem i64 %0, 19
%4 = or i64 %2, %3
%5 = srem i64 %0, 18
%6 = or i64 %4, %5
%7 = srem i64 %0, 17
%8 = or i64 %6, %7
%9 = and i64 %0, 15
%10 = or i64 %8, %9
%11 = srem i64 %0, 15
%12 = or i64 %10, %11
%13 = srem i64 %0, 14
%14 = or i64 %12, %13
%15 = srem i64 %0, 13
%16 = or i64 %14, %15
%17 = srem i64 %0, 12
%18 = or i64 %16, %17
%19 = srem i64 %0, 11
%20 = or i64 %18, %19
%21 = icmp eq i64 %20, 0
%22 = zext i1 %21 to i32
ret i32 %22
}