#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int get_cputype(int);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
int /*<<< orphan*/ support_avx();
int get_coretype(void) {
  int family, exfamily, model, exmodel, vendor;
  if (!have_cpuid())
    return 1;
  family = get_cputype(4);
  exfamily = get_cputype(1);
  model = get_cputype(5);
  exmodel = get_cputype(2);
  vendor = get_vendor();
  if (vendor == 1) {
    switch (family) {
    case 4:
      return 1;
    case 5:
      return 2;
    case 6:
      switch (exmodel) {
      case 0:
        switch (model) {
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
          return 3;
        case 7:
          return 4;
        case 8:
        case 10:
        case 11:
          return 5;
        case 9:
        case 13:
        case 14:
          return 8;
        case 15:
          return 14;
        }
        break;
      case 1:
        switch (model) {
        case 6:
          return 14;
        case 7:
          return 15;
        case 10:
        case 11:
        case 14:
        case 15:
          return 17;
        case 12:
          return 18;
        case 13:
          return 16;
        }
        break;
      case 2:
        switch (model) {
        case 5:
          return 17;
        case 10:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
          return 17;
        case 13:
          if (support_avx())
            return 20;
          else
            return 17;
        case 14:
        case 15:
          return 17;
        }
        break;
      case 3:
        switch (model) {
        case 10:
        case 14:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 13:
          if (support_avx())
            return 24;
          else
            return 17;
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        }
        break;
      case 5:
        switch (model) {
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 5:
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        }
        break;
      }
      break;
    case 15:
      if (model <= 0x2)
        return 6;
      else
        return 7;
    }
  }
  if (vendor == 3) {
    if (family <= 0x5)
      return 1;
    if (family <= 0xe)
      return 9;
    if (family == 0xf) {
      if ((exfamily == 0) || (exfamily == 2))
        return 10;
      else if (exfamily == 5)
        return 21;
      else if (exfamily == 6) {
        switch (model) {
        case 1:
          if (support_avx())
            return 22;
          else
            return 11;
        case 2:
          if (support_avx())
            return 23;
          else
            return 11;
        case 0:
          switch (exmodel) {
          case 3:
            if (support_avx())
              return 25;
            else
              return 11;
          case 6:
            if (support_avx())
              return 26;
            else
              return 11;
          }
          break;
        }
      } else
        return 11;
    }
  }
  if (vendor == 6) {
    switch (family) {
    case 0x6:
      return 19;
      break;
    }
    return 12;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_coretype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    $0x0,%al
call   1060 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1164 <get_coretype+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0xc(%rbp)
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    1587 <get_coretype+0x447>
mov    -0x8(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0xb,%eax
ja     1582 <get_coretype+0x442>
mov    -0x20(%rbp),%rax
lea    0xe34(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x2,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    -0x14(%rbp),%eax
mov    %rax,-0x28(%rbp)
sub    $0x5,%rax
ja     155b <get_coretype+0x41b>
mov    -0x28(%rbp),%rax
lea    0xe27(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%eax
mov    %rax,-0x30(%rbp)
sub    $0xf,%rax
ja     1273 <get_coretype+0x133>
mov    -0x30(%rbp),%rax
lea    0xeb2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x4,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x5,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x8,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xe,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    155b <get_coretype+0x41b>
mov    -0x10(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x38(%rbp)
sub    $0x9,%eax
ja     12dd <get_coretype+0x19d>
mov    -0x38(%rbp),%rax
lea    0xe20(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xf,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x12,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x10,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    155b <get_coretype+0x41b>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0xa,%eax
ja     137f <get_coretype+0x23f>
mov    -0x40(%rbp),%rax
lea    0xd8a(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1333 <get_coretype+0x1f3>
movl   $0x14,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1367 <get_coretype+0x227>
movl   $0x14,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    155b <get_coretype+0x41b>
mov    -0x10(%rbp),%eax
add    $0xfffffff6,%eax
mov    %eax,%ecx
mov    %rcx,-0x48(%rbp)
sub    $0x5,%eax
ja     1425 <get_coretype+0x2e5>
mov    -0x48(%rbp),%rax
lea    0xcd0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     13c9 <get_coretype+0x289>
movl   $0x14,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     13f1 <get_coretype+0x2b1>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1419 <get_coretype+0x2d9>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    155b <get_coretype+0x41b>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x50(%rbp)
sub    $0xa,%eax
ja     14cb <get_coretype+0x38b>
mov    -0x50(%rbp),%rax
lea    0xbfe(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     146f <get_coretype+0x32f>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1497 <get_coretype+0x357>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     14bf <get_coretype+0x37f>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    155b <get_coretype+0x41b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x54(%rbp)
sub    $0x5,%eax
je     152e <get_coretype+0x3ee>
jmp    14e4 <get_coretype+0x3a4>
mov    -0x54(%rbp),%eax
sub    $0x6,%eax
je     1506 <get_coretype+0x3c6>
jmp    14f5 <get_coretype+0x3b5>
mov    -0x54(%rbp),%eax
sub    $0xe,%eax
je     152e <get_coretype+0x3ee>
jmp    1556 <get_coretype+0x416>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1522 <get_coretype+0x3e2>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     154a <get_coretype+0x40a>
movl   $0x18,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x11,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    155b <get_coretype+0x41b>
jmp    1582 <get_coretype+0x442>
cmpl   $0x2,-0x10(%rbp)
jg     1576 <get_coretype+0x436>
movl   $0x6,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x7,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    1587 <get_coretype+0x447>
cmpl   $0x3,-0x18(%rbp)
jne    172b <get_coretype+0x5eb>
cmpl   $0x5,-0x8(%rbp)
jg     15a7 <get_coretype+0x467>
movl   $0x1,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
cmpl   $0xe,-0x8(%rbp)
jg     15bd <get_coretype+0x47d>
movl   $0x9,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
cmpl   $0xf,-0x8(%rbp)
jne    1726 <get_coretype+0x5e6>
cmpl   $0x0,-0xc(%rbp)
je     15db <get_coretype+0x49b>
cmpl   $0x2,-0xc(%rbp)
jne    15e7 <get_coretype+0x4a7>
movl   $0xa,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
cmpl   $0x5,-0xc(%rbp)
jne    15fd <get_coretype+0x4bd>
movl   $0x15,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
cmpl   $0x6,-0xc(%rbp)
jne    170b <get_coretype+0x5cb>
mov    -0x10(%rbp),%eax
mov    %eax,-0x58(%rbp)
test   %eax,%eax
je     168c <get_coretype+0x54c>
jmp    161a <get_coretype+0x4da>
mov    -0x58(%rbp),%eax
sub    $0x1,%eax
je     163c <get_coretype+0x4fc>
jmp    162b <get_coretype+0x4eb>
mov    -0x58(%rbp),%eax
sub    $0x2,%eax
je     1664 <get_coretype+0x524>
jmp    1706 <get_coretype+0x5c6>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1658 <get_coretype+0x518>
movl   $0x16,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xb,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     1680 <get_coretype+0x540>
movl   $0x17,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xb,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    -0x14(%rbp),%eax
mov    %eax,-0x5c(%rbp)
sub    $0x3,%eax
je     16b1 <get_coretype+0x571>
jmp    16a0 <get_coretype+0x560>
mov    -0x5c(%rbp),%eax
sub    $0x6,%eax
je     16d9 <get_coretype+0x599>
jmp    1701 <get_coretype+0x5c1>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     16cd <get_coretype+0x58d>
movl   $0x19,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xb,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
mov    $0x0,%al
call   1050 <support_avx@plt>
cmp    $0x0,%eax
je     16f5 <get_coretype+0x5b5>
movl   $0x1a,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xb,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    1706 <get_coretype+0x5c6>
jmp    1717 <get_coretype+0x5d7>
movl   $0xb,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
jmp    171c <get_coretype+0x5dc>
jmp    1721 <get_coretype+0x5e1>
jmp    1726 <get_coretype+0x5e6>
jmp    172b <get_coretype+0x5eb>
cmpl   $0x6,-0x18(%rbp)
jne    175e <get_coretype+0x61e>
mov    -0x8(%rbp),%eax
sub    $0x6,%eax
jne    1752 <get_coretype+0x612>
jmp    1746 <get_coretype+0x606>
movl   $0x13,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0xc,-0x4(%rbp)
jmp    1765 <get_coretype+0x625>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coretype>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1060 <have_cpuid@plt>
test   %eax,%eax
je     11c9 <get_coretype+0x89>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebx
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebp
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r14d
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r15d
xor    %eax,%eax
call   1040 <get_vendor@plt>
cmp    $0x6,%eax
je     11d3 <get_coretype+0x93>
cmp    $0x3,%eax
je     11e8 <get_coretype+0xa8>
cmp    $0x1,%eax
jne    1373 <get_coretype+0x233>
add    $0xfffffffc,%ebx
cmp    $0xb,%ebx
ja     1373 <get_coretype+0x233>
mov    $0x1,%eax
lea    0xe4a(%rip),%rcx
movslq (%rcx,%rbx,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x2,%eax
jmp    1375 <get_coretype+0x235>
mov    $0x1,%eax
jmp    1375 <get_coretype+0x235>
cmp    $0x6,%ebx
mov    $0x13,%ecx
mov    $0xc,%eax
cmove  %ecx,%eax
jmp    1375 <get_coretype+0x235>
mov    $0x1,%eax
cmp    $0x6,%ebx
jl     1375 <get_coretype+0x235>
mov    $0x9,%eax
cmp    $0xf,%ebx
jb     1375 <get_coretype+0x235>
jne    1373 <get_coretype+0x233>
test   $0xfffffffd,%ebp
je     12a9 <get_coretype+0x169>
cmp    $0x5,%ebp
je     1380 <get_coretype+0x240>
cmp    $0x6,%ebp
jne    1387 <get_coretype+0x247>
test   %r14d,%r14d
je     138e <get_coretype+0x24e>
cmp    $0x2,%r14d
je     13b7 <get_coretype+0x277>
mov    $0x0,%eax
cmp    $0x1,%r14d
jne    1375 <get_coretype+0x235>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x16,%eax
cmove  %ecx,%eax
jmp    1375 <get_coretype+0x235>
cmp    $0x5,%r15d
ja     1373 <get_coretype+0x233>
mov    %r15d,%eax
lea    0xdb7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0x10,%r14d
jae    1373 <get_coretype+0x233>
movslq %r14d,%rax
lea    0xdf6(%rip),%rcx
jmp    12cb <get_coretype+0x18b>
xor    %eax,%eax
cmp    $0x3,%r14d
setl   %al
xor    $0x7,%eax
jmp    1375 <get_coretype+0x235>
mov    $0xa,%eax
jmp    1375 <get_coretype+0x235>
add    $0xfffffffa,%r14d
cmp    $0xa,%r14d
jae    1373 <get_coretype+0x233>
movslq %r14d,%rax
lea    0xe01(%rip),%rcx
mov    (%rcx,%rax,4),%eax
jmp    1375 <get_coretype+0x235>
cmp    $0xf,%r14d
ja     1373 <get_coretype+0x233>
mov    $0x11,%eax
mov    $0xd020,%ecx
bt     %r14d,%ecx
jb     1375 <get_coretype+0x235>
cmp    $0xa,%r14d
je     1319 <get_coretype+0x1d9>
cmp    $0xd,%r14d
je     1319 <get_coretype+0x1d9>
jmp    1373 <get_coretype+0x233>
add    $0xfffffff6,%r14d
cmp    $0x5,%r14d
ja     1373 <get_coretype+0x233>
lea    0xd64(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
xor    %eax,%eax
call   1050 <support_avx@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,2),%eax
add    $0x11,%eax
jmp    1375 <get_coretype+0x235>
add    $0xfffffffb,%r14d
cmp    $0xa,%r14d
ja     1373 <get_coretype+0x233>
lea    0xd08(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
cmp    $0x5,%r14d
je     135b <get_coretype+0x21b>
cmp    $0xe,%r14d
je     135b <get_coretype+0x21b>
cmp    $0x6,%r14d
jne    1373 <get_coretype+0x233>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0x11,%ecx
mov    $0x18,%eax
cmove  %ecx,%eax
jmp    1375 <get_coretype+0x235>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret
mov    $0x15,%eax
jmp    1375 <get_coretype+0x235>
mov    $0xb,%eax
jmp    1375 <get_coretype+0x235>
cmp    $0x6,%r15d
je     13cf <get_coretype+0x28f>
mov    $0x0,%eax
cmp    $0x3,%r15d
jne    1375 <get_coretype+0x235>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x19,%eax
cmove  %ecx,%eax
jmp    1375 <get_coretype+0x235>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x17,%eax
cmove  %ecx,%eax
jmp    1375 <get_coretype+0x235>
xor    %eax,%eax
call   1050 <support_avx@plt>
test   %eax,%eax
mov    $0xb,%ecx
mov    $0x1a,%eax
cmove  %ecx,%eax
jmp    1375 <get_coretype+0x235>

LLVM IR (-O0):
define i32 @get_coretype() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = call i32 (...) @have_cpuid()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 1, i32* %1
br label %179
10: ; preds = %0
%11 = call i32 @get_cputype(i32 4)
store i32 %11, i32* %2
%12 = call i32 @get_cputype(i32 1)
store i32 %12, i32* %3
%13 = call i32 @get_cputype(i32 5)
store i32 %13, i32* %4
%14 = call i32 @get_cputype(i32 2)
store i32 %14, i32* %5
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = load i32, i32* %6
%17 = icmp eq i32 %16, 1
br i1 %17, label %18, label %112
18: ; preds = %10
%19 = load i32, i32* %2
switch i32 %19, label %111 [
i32 4, label %20
i32 5, label %21
i32 6, label %22
i32 15, label %106
]
20: ; preds = %18
store i32 1, i32* %1
br label %179
21: ; preds = %18
store i32 2, i32* %1
br label %179
22: ; preds = %18
%23 = load i32, i32* %5
switch i32 %23, label %105 [
i32 0, label %24
i32 1, label %32
i32 2, label %40
i32 3, label %56
i32 4, label %74
i32 5, label %92
]
24: ; preds = %22
%25 = load i32, i32* %4
switch i32 %25, label %31 [
i32 0, label %26
i32 1, label %26
i32 2, label %26
i32 3, label %26
i32 4, label %26
i32 5, label %26
i32 6, label %26
i32 7, label %27
i32 8, label %28
i32 10, label %28
i32 11, label %28
i32 9, label %29
i32 13, label %29
i32 14, label %29
i32 15, label %30
]
26: ; preds = %24, %24, %24, %24, %24, %24, %24
store i32 3, i32* %1
br label %179
27: ; preds = %24
store i32 4, i32* %1
br label %179
28: ; preds = %24, %24, %24
store i32 5, i32* %1
br label %179
29: ; preds = %24, %24, %24
store i32 8, i32* %1
br label %179
30: ; preds = %24
store i32 14, i32* %1
br label %179
31: ; preds = %24
br label %105
32: ; preds = %22
%33 = load i32, i32* %4
switch i32 %33, label %39 [
i32 6, label %34
i32 7, label %35
i32 10, label %36
i32 11, label %36
i32 14, label %36
i32 15, label %36
i32 12, label %37
i32 13, label %38
]
34: ; preds = %32
store i32 14, i32* %1
br label %179
35: ; preds = %32
store i32 15, i32* %1
br label %179
36: ; preds = %32, %32, %32, %32
store i32 17, i32* %1
br label %179
37: ; preds = %32
store i32 18, i32* %1
br label %179
38: ; preds = %32
store i32 16, i32* %1
br label %179
39: ; preds = %32
br label %105
40: ; preds = %22
%41 = load i32, i32* %4
switch i32 %41, label %55 [
i32 5, label %42
i32 10, label %43
i32 12, label %48
i32 13, label %49
i32 14, label %54
i32 15, label %54
]
42: ; preds = %40
store i32 17, i32* %1
br label %179
43: ; preds = %40
%44 = call i32 (...) @support_avx()
%45 = icmp ne i32 %44, 0
br i1 %45, label %46, label %47
46: ; preds = %43
store i32 20, i32* %1
br label %179
47: ; preds = %43
store i32 17, i32* %1
br label %179
48: ; preds = %40
store i32 17, i32* %1
br label %179
49: ; preds = %40
%50 = call i32 (...) @support_avx()
%51 = icmp ne i32 %50, 0
br i1 %51, label %52, label %53
52: ; preds = %49
store i32 20, i32* %1
br label %179
53: ; preds = %49
store i32 17, i32* %1
br label %179
54: ; preds = %40, %40
store i32 17, i32* %1
br label %179
55: ; preds = %40
br label %105
56: ; preds = %22
%57 = load i32, i32* %4
switch i32 %57, label %73 [
i32 10, label %58
i32 14, label %58
i32 12, label %63
i32 15, label %63
i32 13, label %68
]
58: ; preds = %56, %56
%59 = call i32 (...) @support_avx()
%60 = icmp ne i32 %59, 0
br i1 %60, label %61, label %62
61: ; preds = %58
store i32 20, i32* %1
br label %179
62: ; preds = %58
store i32 17, i32* %1
br label %179
63: ; preds = %56, %56
%64 = call i32 (...) @support_avx()
%65 = icmp ne i32 %64, 0
br i1 %65, label %66, label %67
66: ; preds = %63
store i32 24, i32* %1
br label %179
67: ; preds = %63
store i32 17, i32* %1
br label %179
68: ; preds = %56
%69 = call i32 (...) @support_avx()
%70 = icmp ne i32 %69, 0
br i1 %70, label %71, label %72
71: ; preds = %68
store i32 24, i32* %1
br label %179
72: ; preds = %68
store i32 17, i32* %1
br label %179
73: ; preds = %56
br label %105
74: ; preds = %22
%75 = load i32, i32* %4
switch i32 %75, label %91 [
i32 5, label %76
i32 6, label %76
i32 7, label %81
i32 15, label %81
i32 14, label %86
]
76: ; preds = %74, %74
%77 = call i32 (...) @support_avx()
%78 = icmp ne i32 %77, 0
br i1 %78, label %79, label %80
79: ; preds = %76
store i32 24, i32* %1
br label %179
80: ; preds = %76
store i32 17, i32* %1
br label %179
81: ; preds = %74, %74
%82 = call i32 (...) @support_avx()
%83 = icmp ne i32 %82, 0
br i1 %83, label %84, label %85
84: ; preds = %81
store i32 24, i32* %1
br label %179
85: ; preds = %81
store i32 17, i32* %1
br label %179
86: ; preds = %74
%87 = call i32 (...) @support_avx()
%88 = icmp ne i32 %87, 0
br i1 %88, label %89, label %90
89: ; preds = %86
store i32 24, i32* %1
br label %179
90: ; preds = %86
store i32 17, i32* %1
br label %179
91: ; preds = %74
br label %105
92: ; preds = %22
%93 = load i32, i32* %4
switch i32 %93, label %104 [
i32 6, label %94
i32 5, label %99
i32 14, label %99
]
94: ; preds = %92
%95 = call i32 (...) @support_avx()
%96 = icmp ne i32 %95, 0
br i1 %96, label %97, label %98
97: ; preds = %94
store i32 24, i32* %1
br label %179
98: ; preds = %94
store i32 17, i32* %1
br label %179
99: ; preds = %92, %92
%100 = call i32 (...) @support_avx()
%101 = icmp ne i32 %100, 0
br i1 %101, label %102, label %103
102: ; preds = %99
store i32 24, i32* %1
br label %179
103: ; preds = %99
store i32 17, i32* %1
br label %179
104: ; preds = %92
br label %105
105: ; preds = %22, %104, %91, %73, %55, %39, %31
br label %111
106: ; preds = %18
%107 = load i32, i32* %4
%108 = icmp sle i32 %107, 2
br i1 %108, label %109, label %110
109: ; preds = %106
store i32 6, i32* %1
br label %179
110: ; preds = %106
store i32 7, i32* %1
br label %179
111: ; preds = %18, %105
br label %112
112: ; preds = %111, %10
%113 = load i32, i32* %6
%114 = icmp eq i32 %113, 3
br i1 %114, label %115, label %171
115: ; preds = %112
%116 = load i32, i32* %2
%117 = icmp sle i32 %116, 5
br i1 %117, label %118, label %119
118: ; preds = %115
store i32 1, i32* %1
br label %179
119: ; preds = %115
%120 = load i32, i32* %2
%121 = icmp sle i32 %120, 14
br i1 %121, label %122, label %123
122: ; preds = %119
store i32 9, i32* %1
br label %179
123: ; preds = %119
%124 = load i32, i32* %2
%125 = icmp eq i32 %124, 15
br i1 %125, label %126, label %170
126: ; preds = %123
%127 = load i32, i32* %3
%128 = icmp eq i32 %127, 0
br i1 %128, label %132, label %129
129: ; preds = %126
%130 = load i32, i32* %3
%131 = icmp eq i32 %130, 2
br i1 %131, label %132, label %133
132: ; preds = %129, %126
store i32 10, i32* %1
br label %179
133: ; preds = %129
%134 = load i32, i32* %3
%135 = icmp eq i32 %134, 5
br i1 %135, label %136, label %137
136: ; preds = %133
store i32 21, i32* %1
br label %179
137: ; preds = %133
%138 = load i32, i32* %3
%139 = icmp eq i32 %138, 6
br i1 %139, label %140, label %166
140: ; preds = %137
%141 = load i32, i32* %4
switch i32 %141, label %165 [
i32 1, label %142
i32 2, label %147
i32 0, label %152
]
142: ; preds = %140
%143 = call i32 (...) @support_avx()
%144 = icmp ne i32 %143, 0
br i1 %144, label %145, label %146
145: ; preds = %142
store i32 22, i32* %1
br label %179
146: ; preds = %142
store i32 11, i32* %1
br label %179
147: ; preds = %140
%148 = call i32 (...) @support_avx()
%149 = icmp ne i32 %148, 0
br i1 %149, label %150, label %151
150: ; preds = %147
store i32 23, i32* %1
br label %179
151: ; preds = %147
store i32 11, i32* %1
br label %179
152: ; preds = %140
%153 = load i32, i32* %5
switch i32 %153, label %164 [
i32 3, label %154
i32 6, label %159
]
154: ; preds = %152
%155 = call i32 (...) @support_avx()
%156 = icmp ne i32 %155, 0
br i1 %156, label %157, label %158
157: ; preds = %154
store i32 25, i32* %1
br label %179
158: ; preds = %154
store i32 11, i32* %1
br label %179
159: ; preds = %152
%160 = call i32 (...) @support_avx()
%161 = icmp ne i32 %160, 0
br i1 %161, label %162, label %163
162: ; preds = %159
store i32 26, i32* %1
br label %179
163: ; preds = %159
store i32 11, i32* %1
br label %179
164: ; preds = %152
br label %165
165: ; preds = %140, %164
br label %167
166: ; preds = %137
store i32 11, i32* %1
br label %179
167: ; preds = %165
br label %168
168: ; preds = %167
br label %169
169: ; preds = %168
br label %170
170: ; preds = %169, %123
br label %171
171: ; preds = %170, %112
%172 = load i32, i32* %6
%173 = icmp eq i32 %172, 6
br i1 %173, label %174, label %178
174: ; preds = %171
%175 = load i32, i32* %2
switch i32 %175, label %177 [
i32 6, label %176
]
176: ; preds = %174
store i32 19, i32* %1
br label %179
177: ; preds = %174
store i32 12, i32* %1
br label %179
178: ; preds = %171
store i32 0, i32* %1
br label %179
179: ; preds = %178, %177, %176, %166, %163, %162, %158, %157, %151, %150, %146, %145, %136, %132, %122, %118, %110, %109, %103, %102, %98, %97, %90, %89, %85, %84, %80, %79, %72, %71, %67, %66, %62, %61, %54, %53, %52, %48, %47, %46, %42, %38, %37, %36, %35, %34, %30, %29, %28, %27, %26, %21, %20, %9
%180 = load i32, i32* %1
ret i32 %180
}

LLVM IR (-O2):
@switch.table.get_coretype = [16 x i32] [i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 4, i32 5, i32 8, i32 5, i32 5, i32 0, i32 8, i32 8, i32 14]
@switch.table.get_coretype.1 = [10 x i32] [i32 14, i32 15, i32 0, i32 0, i32 17, i32 17, i32 18, i32 16, i32 17, i32 17]
define i32 @get_coretype() {
%1 = tail call i32 (...) @have_cpuid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %105, label %3
3: ; preds = %0
%4 = tail call i32 @get_cputype(i32 4)
%5 = tail call i32 @get_cputype(i32 1)
%6 = tail call i32 @get_cputype(i32 5)
%7 = tail call i32 @get_cputype(i32 2)
%8 = tail call i32 (...) @get_vendor()
switch i32 %8, label %105 [
i32 1, label %9
i32 3, label %65
i32 6, label %94
]
9: ; preds = %3
switch i32 %4, label %64 [
i32 4, label %105
i32 5, label %10
i32 6, label %11
i32 15, label %61
]
10: ; preds = %9
br label %105
11: ; preds = %9
switch i32 %7, label %64 [
i32 0, label %12
i32 1, label %14
i32 2, label %17
i32 3, label %26
i32 4, label %39
i32 5, label %52
]
12: ; preds = %11
%13 = icmp ult i32 %6, 16
br i1 %13, label %97, label %64
14: ; preds = %11
%15 = add i32 %6, -6
%16 = icmp ult i32 %15, 10
br i1 %16, label %101, label %64
17: ; preds = %11
switch i32 %6, label %64 [
i32 5, label %105
i32 10, label %18
i32 12, label %105
i32 13, label %22
i32 14, label %105
i32 15, label %105
]
18: ; preds = %17
%19 = tail call i32 (...) @support_avx()
%20 = icmp eq i32 %19, 0
%21 = select i1 %20, i32 17, i32 20
br label %105
22: ; preds = %17
%23 = tail call i32 (...) @support_avx()
%24 = icmp eq i32 %23, 0
%25 = select i1 %24, i32 17, i32 20
br label %105
26: ; preds = %11
switch i32 %6, label %64 [
i32 10, label %27
i32 14, label %27
i32 12, label %31
i32 15, label %31
i32 13, label %35
]
27: ; preds = %26, %26
%28 = tail call i32 (...) @support_avx()
%29 = icmp eq i32 %28, 0
%30 = select i1 %29, i32 17, i32 20
br label %105
31: ; preds = %26, %26
%32 = tail call i32 (...) @support_avx()
%33 = icmp eq i32 %32, 0
%34 = select i1 %33, i32 17, i32 24
br label %105
35: ; preds = %26
%36 = tail call i32 (...) @support_avx()
%37 = icmp eq i32 %36, 0
%38 = select i1 %37, i32 17, i32 24
br label %105
39: ; preds = %11
switch i32 %6, label %64 [
i32 5, label %40
i32 6, label %40
i32 7, label %44
i32 15, label %44
i32 14, label %48
]
40: ; preds = %39, %39
%41 = tail call i32 (...) @support_avx()
%42 = icmp eq i32 %41, 0
%43 = select i1 %42, i32 17, i32 24
br label %105
44: ; preds = %39, %39
%45 = tail call i32 (...) @support_avx()
%46 = icmp eq i32 %45, 0
%47 = select i1 %46, i32 17, i32 24
br label %105
48: ; preds = %39
%49 = tail call i32 (...) @support_avx()
%50 = icmp eq i32 %49, 0
%51 = select i1 %50, i32 17, i32 24
br label %105
52: ; preds = %11
switch i32 %6, label %64 [
i32 6, label %53
i32 5, label %57
i32 14, label %57
]
53: ; preds = %52
%54 = tail call i32 (...) @support_avx()
%55 = icmp eq i32 %54, 0
%56 = select i1 %55, i32 17, i32 24
br label %105
57: ; preds = %52, %52
%58 = tail call i32 (...) @support_avx()
%59 = icmp eq i32 %58, 0
%60 = select i1 %59, i32 17, i32 24
br label %105
61: ; preds = %9
%62 = icmp slt i32 %6, 3
%63 = select i1 %62, i32 6, i32 7
br label %105
64: ; preds = %14, %12, %9, %52, %39, %26, %17, %11
br label %105
65: ; preds = %3
%66 = icmp slt i32 %4, 6
br i1 %66, label %105, label %67
67: ; preds = %65
%68 = icmp ult i32 %4, 15
br i1 %68, label %105, label %69
69: ; preds = %67
%70 = icmp eq i32 %4, 15
br i1 %70, label %71, label %105
71: ; preds = %69
%72 = and i32 %5, -3
%73 = icmp eq i32 %72, 0
br i1 %73, label %105, label %74
74: ; preds = %71
switch i32 %5, label %93 [
i32 5, label %105
i32 6, label %75
]
75: ; preds = %74
switch i32 %6, label %105 [
i32 1, label %76
i32 2, label %80
i32 0, label %84
]
76: ; preds = %75
%77 = tail call i32 (...) @support_avx()
%78 = icmp eq i32 %77, 0
%79 = select i1 %78, i32 11, i32 22
br label %105
80: ; preds = %75
%81 = tail call i32 (...) @support_avx()
%82 = icmp eq i32 %81, 0
%83 = select i1 %82, i32 11, i32 23
br label %105
84: ; preds = %75
switch i32 %7, label %105 [
i32 3, label %85
i32 6, label %89
]
85: ; preds = %84
%86 = tail call i32 (...) @support_avx()
%87 = icmp eq i32 %86, 0
%88 = select i1 %87, i32 11, i32 25
br label %105
89: ; preds = %84
%90 = tail call i32 (...) @support_avx()
%91 = icmp eq i32 %90, 0
%92 = select i1 %91, i32 11, i32 26
br label %105
93: ; preds = %74
br label %105
94: ; preds = %3
%95 = icmp eq i32 %4, 6
%96 = select i1 %95, i32 19, i32 12
br label %105
97: ; preds = %12
%98 = sext i32 %6 to i64
%99 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.get_coretype, i64 0, i64 %98
%100 = load i32, i32* %99
br label %105
101: ; preds = %14
%102 = sext i32 %15 to i64
%103 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.get_coretype.1, i64 0, i64 %102
%104 = load i32, i32* %103
br label %105
105: ; preds = %101, %97, %84, %75, %69, %64, %3, %94, %89, %85, %80, %76, %74, %71, %67, %65, %61, %57, %53, %48, %44, %40, %35, %31, %27, %17, %17, %22, %17, %18, %17, %9, %0, %93, %10
%106 = phi i32 [ 11, %93 ], [ 2, %10 ], [ 1, %0 ], [ 1, %9 ], [ 17, %17 ], [ %21, %18 ], [ 17, %17 ], [ %25, %22 ], [ 17, %17 ], [ 17, %17 ], [ %30, %27 ], [ %34, %31 ], [ %38, %35 ], [ %43, %40 ], [ %47, %44 ], [ %51, %48 ], [ %56, %53 ], [ %60, %57 ], [ %63, %61 ], [ 1, %65 ], [ 9, %67 ], [ 10, %71 ], [ 21, %74 ], [ %79, %76 ], [ %83, %80 ], [ %88, %85 ], [ %92, %89 ], [ %96, %94 ], [ 0, %3 ], [ 0, %64 ], [ 0, %69 ], [ 0, %75 ], [ 0, %84 ], [ %100, %97 ], [ %104, %101 ]
ret i32 %106
}