xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ dup2(int, int /*<<< orphan*/);
int /*<<< orphan*/ waitpid(int, int *, int /*<<< orphan*/);
int wai_father(int pid, int p[2], int status) {
  waitpid(pid, &status, WNOHANG);
  close(p[1]);
  dup2(p[0], 0);
  close(p[0]);
  return (0);
}


x86 assembly (clang, -O0):
<wai_father>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9c(%rip),%rax
mov    (%rax),%edx
lea    -0x14(%rbp),%rsi
call   1050 <waitpid@plt>
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%edi
call   1040 <close@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
xor    %esi,%esi
call   1030 <dup2@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1040 <close@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wai_father>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %edx,0xc(%rsp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edx
lea    0xc(%rsp),%rsi
call   1050 <waitpid@plt>
mov    0x4(%rbx),%edi
call   1040 <close@plt>
mov    (%rbx),%edi
xor    %esi,%esi
call   1030 <dup2@plt>
mov    (%rbx),%edi
call   1040 <close@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define i32 @wai_father(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* @WNOHANG
%9 = call i32 @waitpid(i32 %7, i32* %6, i32 %8)
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = call i32 @close(i32 %12)
%14 = load i32*, i32** %5
%15 = getelementptr inbounds i32, i32* %14, i64 0
%16 = load i32, i32* %15
%17 = call i32 @dup2(i32 %16, i32 0)
%18 = load i32*, i32** %5
%19 = getelementptr inbounds i32, i32* %18, i64 0
%20 = load i32, i32* %19
%21 = call i32 @close(i32 %20)
ret i32 0
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define i32 @wai_father(i32 %0, i32* nocapture %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = load i32, i32* @WNOHANG
%6 = call i32 @waitpid(i32 %0, i32* %4, i32 %5)
%7 = getelementptr inbounds i32, i32* %1, i64 1
%8 = load i32, i32* %7
%9 = call i32 @close(i32 %8)
%10 = load i32, i32* %1
%11 = call i32 @dup2(i32 %10, i32 0)
%12 = load i32, i32* %1
%13 = call i32 @close(i32 %12)
ret i32 0
}
void iommu_prepare_gfx_mapping(void) { return; }


x86 assembly (clang, -O0):
<iommu_prepare_gfx_mapping>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iommu_prepare_gfx_mapping>:
ret

LLVM IR (-O0):
define void @iommu_prepare_gfx_mapping() {
ret void
}

LLVM IR (-O2):
define void @iommu_prepare_gfx_mapping() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int);
char *xchar(int c, char *buf, int size) {
  snprintf(buf, size, "%%%02x", c);
  return buf;
}


x86 assembly (clang, -O0):
<xchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x4(%rbp),%ecx
lea    0xecd(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xchar>:
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ecx
lea    0xee3(%rip),%rax
mov    %rsi,%rdi
mov    %edx,%esi
mov    %rax,%rdx
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%%%02x\00"
define i8* @xchar(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = call i32 @snprintf(i8* %7, i32 %8, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i8*, i8** %5
ret i8* %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"%%%02x\00"
define i8* @xchar(i32 %0, i8* returned %1, i32 %2) {
%4 = tail call i32 @snprintf(i8* %1, i32 %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %1
}
change(a, b, c, d, s) long a, c;
char *s;
{
  range(a, b);
  printf("%s", s);
  range(c, d);
  printf("\n");
}


x86 assembly (clang, -O0):
<change>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    %r8,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    $0x0,%al
call   1040 <range@plt>
mov    -0x30(%rbp),%rsi
lea    0xead(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    $0x0,%al
call   1040 <range@plt>
lea    0xe94(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<change>:
push   %rbp
push   %r14
push   %rbx
mov    %r8,%rbx
mov    %ecx,%r14d
mov    %rdx,%rbp
xor    %eax,%eax
call   1050 <range@plt>
lea    0xeb5(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbp,%rdi
mov    %r14d,%esi
xor    %eax,%eax
call   1050 <range@plt>
mov    $0xa,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @change(i64 %0, i32 %1, i64 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i64
%8 = alloca i32
%9 = alloca i64
%10 = alloca i32
%11 = alloca i8*
store i64 %0, i64* %7
store i32 %1, i32* %8
store i64 %2, i64* %9
store i32 %3, i32* %10
store i8* %4, i8** %11
%12 = load i64, i64* %7
%13 = load i32, i32* %8
%14 = call i32 (i64, i32, ...) bitcast (i32 (...)* @range to i32 (i64, i32, ...)*)(i64 %12, i32 %13)
%15 = load i8*, i8** %11
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %15)
%17 = load i64, i64* %9
%18 = load i32, i32* %10
%19 = call i32 (i64, i32, ...) bitcast (i32 (...)* @range to i32 (i64, i32, ...)*)(i64 %17, i32 %18)
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%21 = load i32, i32* %6
ret i32 %21
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @change(i64 %0, i32 %1, i64 %2, i32 %3, i8* %4) {
%6 = tail call i32 (i64, i32, ...) bitcast (i32 (...)* @range to i32 (i64, i32, ...)*)(i64 %0, i32 %1)
%7 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%8 = tail call i32 (i64, i32, ...) bitcast (i32 (...)* @range to i32 (i64, i32, ...)*)(i64 %2, i32 %3)
%9 = tail call i32 @putchar(i32 10)
ret i32 undef
}
struct device_node *of_parse_phandle(const struct device_node *np,
                                     const char *phandle_name, int index) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<of_parse_phandle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_parse_phandle>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device_node = type opaque
define %struct.device_node* @of_parse_phandle(%struct.device_node* %0, i8* %1, i32 %2) {
%4 = alloca %struct.device_node*
%5 = alloca i8*
%6 = alloca i32
store %struct.device_node* %0, %struct.device_node** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret %struct.device_node* null
}

LLVM IR (-O2):
%struct.device_node = type opaque
define noalias %struct.device_node* @of_parse_phandle(%struct.device_node* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret %struct.device_node* null
}
/* Variables and functions */
double pow(double, double);
double module_libc_pow(double x, double y) { return pow(x, y); }


x86 assembly (clang, -O0):
<module_libc_pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_libc_pow>:
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @module_libc_pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @pow(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @module_libc_pow(double %0, double %1) {
%3 = tail call double @pow(double %0, double %1)
ret double %3
}
/* Variables and functions */
_Bool isspace(unsigned char);
_Bool dns_isspace(unsigned char c) { return isspace(c); }


x86 assembly (clang, -O0):
<dns_isspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <isspace@plt>
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_isspace>:
jmp    1030 <isspace@plt>

LLVM IR (-O0):
define zeroext i1 @dns_isspace(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i1 @isspace(i8 zeroext %3)
ret i1 %4
}

LLVM IR (-O2):
define zeroext i1 @dns_isspace(i8 zeroext %0) {
%2 = tail call zeroext i1 @isspace(i8 zeroext %0)
ret i1 %2
}
int abs(int num) {
  if (num < 0)
    return -num;
  return num;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <abs+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int lines;
int tty_lines() { return lines; }


x86 assembly (clang, -O0):
<tty_lines>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ee5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_lines>:
mov    0x2ee9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@lines = global i32 0
define i32 @tty_lines() {
%1 = load i32, i32* @lines
ret i32 %1
}

LLVM IR (-O2):
@lines = global i32 0
define i32 @tty_lines() {
%1 = load i32, i32* @lines
ret i32 %1
}
int search_number(int number, int tab[], int size) {
  int i;
  int position = -1;
  for (i = 0; i < size; i++) {
    if (number == tab[i]) {
      position = i;
      break;
    }
  }
  return position;
}


x86 assembly (clang, -O0):
<search_number>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0xffffffff,-0x1c(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115a <search_number+0x5a>
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jne    1147 <search_number+0x47>
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    115a <search_number+0x5a>
jmp    114c <search_number+0x4c>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111c <search_number+0x1c>
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_number>:
mov    $0xffffffff,%eax
test   %edx,%edx
jle    111e <search_number+0x1e>
mov    %edx,%edx
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edi,(%rsi,%rcx,4)
je     111f <search_number+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rdx
jne    1110 <search_number+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @search_number(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 -1, i32* %8
store i32 0, i32* %7
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32, i32* %4
%15 = load i32*, i32** %5
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = icmp eq i32 %14, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %7
store i32 %22, i32* %8
br label %27
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %7
%26 = add nsw i32 %25, 1
store i32 %26, i32* %7
br label %9
27: ; preds = %21, %9
%28 = load i32, i32* %8
ret i32 %28
}

LLVM IR (-O2):
define i32 @search_number(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %1, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
void ceph_fscache_update_objectsize(struct inode *inode) {}


x86 assembly (clang, -O0):
<ceph_fscache_update_objectsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_fscache_update_objectsize>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @ceph_fscache_update_objectsize(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @ceph_fscache_update_objectsize(%struct.inode* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __set_64bit(unsigned long long *, unsigned int,
                               unsigned int);
__attribute__((always_)) void __set_64bit_var(unsigned long long *ptr,
                                              unsigned long long value) {
  __set_64bit(ptr, *(((unsigned int *)&(value)) + 0),
              *(((unsigned int *)&(value)) + 1));
}


x86 assembly (clang, -O0):
<__set_64bit_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <__set_64bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__set_64bit_var>:
mov    %rsi,%rdx
shr    $0x20,%rdx
jmp    1030 <__set_64bit@plt>

LLVM IR (-O0):
define void @__set_64bit_var(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64*, i64** %3
%6 = bitcast i64* %4 to i32*
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = bitcast i64* %4 to i32*
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = call i32 @__set_64bit(i64* %5, i32 %8, i32 %11)
ret void
}

LLVM IR (-O2):
define void @__set_64bit_var(i64* %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = lshr i64 %1, 32
%5 = trunc i64 %4 to i32
%6 = tail call i32 @__set_64bit(i64* %0, i32 %3, i32 %5)
ret void
}
void rule_neural_act_init(const struct XCSF *xcsf, struct Cl *c) {
  (void)xcsf;
  (void)c;
}


x86 assembly (clang, -O0):
<rule_neural_act_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rule_neural_act_init>:
ret

LLVM IR (-O0):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @rule_neural_act_init(%struct.XCSF* %0, %struct.Cl* %1) {
%3 = alloca %struct.XCSF*
%4 = alloca %struct.Cl*
store %struct.XCSF* %0, %struct.XCSF** %3
store %struct.Cl* %1, %struct.Cl** %4
%5 = load %struct.XCSF*, %struct.XCSF** %3
%6 = load %struct.Cl*, %struct.Cl** %4
ret void
}

LLVM IR (-O2):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @rule_neural_act_init(%struct.XCSF* nocapture %0, %struct.Cl* nocapture %1) {
ret void
}
int generic_phy_get_by_index(struct udevice *user, int index, struct phy *phy) {
  return 0;
}


x86 assembly (clang, -O0):
<generic_phy_get_by_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<generic_phy_get_by_index>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.udevice = type opaque
%struct.phy = type opaque
define i32 @generic_phy_get_by_index(%struct.udevice* %0, i32 %1, %struct.phy* %2) {
%4 = alloca %struct.udevice*
%5 = alloca i32
%6 = alloca %struct.phy*
store %struct.udevice* %0, %struct.udevice** %4
store i32 %1, i32* %5
store %struct.phy* %2, %struct.phy** %6
ret i32 0
}

LLVM IR (-O2):
%struct.udevice = type opaque
%struct.phy = type opaque
define i32 @generic_phy_get_by_index(%struct.udevice* nocapture readnone %0, i32 %1, %struct.phy* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
void *__ioremap(unsigned long, unsigned long, int);
extern void *ioremap(unsigned long physaddr, unsigned long size) {
  return __ioremap(physaddr, size, 1);
}


x86 assembly (clang, -O0):
<ioremap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <__ioremap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioremap>:
mov    $0x1,%edx
jmp    1030 <__ioremap@plt>

LLVM IR (-O0):
define i8* @ioremap(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @__ioremap(i64 %5, i64 %6, i32 1)
ret i8* %7
}

LLVM IR (-O2):
define i8* @ioremap(i64 %0, i64 %1) {
%3 = tail call i8* @__ioremap(i64 %0, i64 %1, i32 1)
ret i8* %3
}
void g_key_file_get_locale_string() {}


x86 assembly (clang, -O0):
<g_key_file_get_locale_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_key_file_get_locale_string>:
ret

LLVM IR (-O0):
define void @g_key_file_get_locale_string() {
ret void
}

LLVM IR (-O2):
define void @g_key_file_get_locale_string() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ intense1();
int main() { intense1(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <intense1@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <intense1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @intense1()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @intense1()
ret i32 0
}
int main() {
  int a[3] = {1, 2, 3};
  return *(a + 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0xeee(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xeec(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
@__const.main.a = [3 x i32] [i32 1, i32 2, i32 3]
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
store i32 0, i32* %1
%3 = bitcast [3 x i32]* %2 to i8*
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%5 = getelementptr inbounds i32, i32* %4, i64 1
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
/* Variables and functions */
int ec_resume_long(long *);
int /*<<< orphan*/ echo_stream(int);
int ec_resume_flush(void) {
  int res;
  long arg;
  for (;;) {
    res = ec_resume_long(&arg);
    switch (res) {
    case 7:
      echo_stream((int)arg);
      break;
    default:
      return res;
    }
  }
}


x86 assembly (clang, -O0):
<ec_resume_flush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
call   1030 <ec_resume_long@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x7,%eax
jne    1155 <ec_resume_flush+0x35>
jmp    1145 <ec_resume_flush+0x25>
mov    -0x10(%rbp),%rax
mov    %eax,%edi
call   1040 <echo_stream@plt>
jmp    115e <ec_resume_flush+0x3e>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret
jmp    1128 <ec_resume_flush+0x8>

x86 assembly (clang, -O2):
<ec_resume_flush>:
push   %rbx
sub    $0x10,%rsp
lea    0x8(%rsp),%rdi
call   1030 <ec_resume_long@plt>
cmp    $0x7,%eax
jne    1156 <ec_resume_flush+0x36>
lea    0x8(%rsp),%rbx
nopl   0x0(%rax)
mov    0x8(%rsp),%edi
call   1040 <echo_stream@plt>
mov    %rbx,%rdi
call   1030 <ec_resume_long@plt>
cmp    $0x7,%eax
je     1140 <ec_resume_flush+0x20>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ec_resume_flush() {
%1 = alloca i32
%2 = alloca i64
br label %3
3: ; preds = %12, %0
%4 = call i32 @ec_resume_long(i64* %2)
store i32 %4, i32* %1
%5 = load i32, i32* %1
switch i32 %5, label %10 [
i32 7, label %6
]
6: ; preds = %3
%7 = load i64, i64* %2
%8 = trunc i64 %7 to i32
%9 = call i32 @echo_stream(i32 %8)
br label %12
10: ; preds = %3
%11 = load i32, i32* %1
ret i32 %11
12: ; preds = %6
br label %3
}

LLVM IR (-O2):
define i32 @ec_resume_flush() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = call i32 @ec_resume_long(i64* %1)
%4 = icmp eq i32 %3, 7
br i1 %4, label %5, label %11
5: ; preds = %0, %5
%6 = load i64, i64* %1
%7 = trunc i64 %6 to i32
%8 = call i32 @echo_stream(i32 %7)
%9 = call i32 @ec_resume_long(i64* %1)
%10 = icmp eq i32 %9, 7
br i1 %10, label %5, label %11
11: ; preds = %5, %0
%12 = phi i32 [ %3, %0 ], [ %9, %5 ]
ret i32 %12
}
void party_check_conflict(struct map_session_data *sd) {
  if (nullpo_chk("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                 "outputs/2022-01-22/02-19-57/repos/Lilystar/Auriga/refs/heads/"
                 "master/src/map/party.c",
                 403, __FUNCTION__, (void *)(sd))) {
    return;
  };
  return;
}


x86 assembly (clang, -O0):
<party_check_conflict>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    0xed9(%rip),%rdi
mov    $0x193,%esi
lea    0xf59(%rip),%rdx
mov    $0x0,%al
call   1030 <nullpo_chk@plt>
cmp    $0x0,%eax
je     1148 <party_check_conflict+0x38>
jmp    114d <party_check_conflict+0x3d>
jmp    114d <party_check_conflict+0x3d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<party_check_conflict>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
lea    0xf6b(%rip),%rdx
mov    $0x193,%esi
xor    %eax,%eax
jmp    1030 <nullpo_chk@plt>

LLVM IR (-O0):
%struct.map_session_data = type opaque
@.str = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Lilystar/Auriga/refs/heads/master/src/map/party.c\00"
@__FUNCTION__.party_check_conflict = [21 x i8] c"party_check_conflict\00"
define void @party_check_conflict(%struct.map_session_data* %0) {
%2 = alloca %struct.map_session_data*
store %struct.map_session_data* %0, %struct.map_session_data** %2
%3 = load %struct.map_session_data*, %struct.map_session_data** %2
%4 = bitcast %struct.map_session_data* %3 to i8*
%5 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @nullpo_chk to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 403, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__FUNCTION__.party_check_conflict, i64 0, i64 0), i8* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
%struct.map_session_data = type opaque
@.str = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Lilystar/Auriga/refs/heads/master/src/map/party.c\00"
@__FUNCTION__.party_check_conflict = [21 x i8] c"party_check_conflict\00"
define void @party_check_conflict(%struct.map_session_data* %0) {
%2 = bitcast %struct.map_session_data* %0 to i8*
%3 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @nullpo_chk to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 403, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__FUNCTION__.party_check_conflict, i64 0, i64 0), i8* %2)
ret void
}
int test_imm_EFuint8_mem(unsigned char *val) {
  return ((*val) & (-0xEF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EFuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff11,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EFuint8_mem>:
testb  $0x11,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EFuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -239
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_EFuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 17
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int function(char *, char *);
int main() { return function("asdfg", "asdf"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xed9(%rip),%rsi
call   1030 <function@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
lea    0xee8(%rip),%rsi
jmp    1030 <function@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"asdfg\00"
@.str.1 = [5 x i8] c"asdf\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @function(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 %2
}

LLVM IR (-O2):
@.str = [6 x i8] c"asdfg\00"
@.str.1 = [5 x i8] c"asdf\00"
define i32 @main() {
%1 = tail call i32 @function(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ dump_buffer(unsigned char *, int);
int /*<<< orphan*/ printf(char *, ...);
void print_buffer(char *str, unsigned char *buf, int len) {
  printf("%s:\n", str);
  dump_buffer(buf, len);
  printf("\n");
}


x86 assembly (clang, -O0):
<print_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <dump_buffer@plt>
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_buffer>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xebe(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1050 <dump_buffer@plt>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%s:\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_buffer(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @dump_buffer(i8* %9, i32 %10)
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%s:\0A\00"
define void @print_buffer(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = tail call i32 @dump_buffer(i8* %1, i32 %2)
%6 = tail call i32 @putchar(i32 10)
ret void
}
__attribute__((no)) int s1(int x) {
  switch (x) {
  case 10:
  case 11:
    return 2;
  case 12:
    return 123;
  default:
    return x + 2;
  }
}


x86 assembly (clang, -O0):
<s1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xfffffff6,%eax
sub    $0x2,%eax
jb     112f <s1+0x2f>
jmp    111e <s1+0x1e>
mov    -0xc(%rbp),%eax
sub    $0xc,%eax
je     113b <s1+0x3b>
jmp    1147 <s1+0x47>
movl   $0x2,-0x4(%rbp)
jmp    1150 <s1+0x50>
movl   $0x7b,-0x4(%rbp)
jmp    1150 <s1+0x50>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s1>:
mov    %edi,%eax
lea    -0xa(%rax),%ecx
cmp    $0x3,%ecx
jae    1118 <s1+0x18>
movslq %ecx,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @s1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 10, label %5
i32 11, label %5
i32 12, label %6
]
5: ; preds = %1, %1
store i32 2, i32* %2
br label %10
6: ; preds = %1
store i32 123, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 2
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@switch.table.s1 = [3 x i32] [i32 2, i32 2, i32 123]
define i32 @s1(i32 %0) {
%2 = add i32 %0, -10
%3 = icmp ult i32 %2, 3
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = add nsw i32 %0, 2
br label %10
6: ; preds = %1
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds [3 x i32], [3 x i32]* @switch.table.s1, i64 0, i64 %7
%9 = load i32, i32* %8
br label %10
10: ; preds = %6, %4
%11 = phi i32 [ %5, %4 ], [ %9, %6 ]
ret i32 %11
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t load_bigendian(const unsigned char *x) {
  return (uint64_t)(x[7]) | (((uint64_t)(x[6])) << 8) |
         (((uint64_t)(x[5])) << 16) | (((uint64_t)(x[4])) << 24) |
         (((uint64_t)(x[3])) << 32) | (((uint64_t)(x[2])) << 40) |
         (((uint64_t)(x[1])) << 48) | (((uint64_t)(x[0])) << 56);
}


x86 assembly (clang, -O0):
<load_bigendian>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x7(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x6(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x4(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%edx
mov    $0x30,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%edx
mov    $0x38,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_bigendian>:
ret

LLVM IR (-O0):
define i32 @load_bigendian(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 7
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 6
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 5
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 4
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
%25 = load i8*, i8** %2
%26 = getelementptr inbounds i8, i8* %25, i64 3
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = shl i32 %28, 32
%30 = or i32 %24, %29
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i64 2
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = shl i32 %34, 40
%36 = or i32 %30, %35
%37 = load i8*, i8** %2
%38 = getelementptr inbounds i8, i8* %37, i64 1
%39 = load i8, i8* %38
%40 = zext i8 %39 to i32
%41 = shl i32 %40, 48
%42 = or i32 %36, %41
%43 = load i8*, i8** %2
%44 = getelementptr inbounds i8, i8* %43, i64 0
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = shl i32 %46, 56
%48 = or i32 %42, %47
ret i32 %48
}

LLVM IR (-O2):
define i32 @load_bigendian(i8* nocapture readnone %0) {
ret i32 poison
}
long int longint_ignoring_longint(long int x, long int y) { return x; }


x86 assembly (clang, -O0):
<longint_ignoring_longint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longint_ignoring_longint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longint_ignoring_longint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longint_ignoring_longint(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, ...);
void set_socket_nonblock(int s) {
  fcntl(s, F_SETFL, fcntl(s, F_GETFL) | O_NONBLOCK);
}


x86 assembly (clang, -O0):
<set_socket_nonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    %eax,%edx
mov    0x2e99(%rip),%rax
or     (%rax),%edx
mov    $0x0,%al
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_socket_nonblock>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2ebc(%rip),%rax
mov    (%rax),%ebp
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
call   1030 <fcntl@plt>
mov    0x2eb3(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %ebp,%esi
mov    %eax,%edx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_SETFL = global i32 0
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @set_socket_nonblock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* %2
%6 = load i32, i32* @F_GETFL
%7 = call i32 (i32, i32, ...) @fcntl(i32 %5, i32 %6)
%8 = load i32, i32* @O_NONBLOCK
%9 = or i32 %7, %8
%10 = call i32 (i32, i32, ...) @fcntl(i32 %3, i32 %4, i32 %9)
ret void
}

LLVM IR (-O2):
@F_SETFL = global i32 0
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @set_socket_nonblock(i32 %0) {
%2 = load i32, i32* @F_SETFL
%3 = load i32, i32* @F_GETFL
%4 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %3)
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %4
%7 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %2, i32 %6)
ret void
}
void setTextShort(char *buffer, char numOfChars, unsigned short value) {
  for (char index = 0; index < numOfChars; index++) {
    buffer[numOfChars - 1 - index] = (value % 10) + 0x30;
    value /= 10;
  }
}


x86 assembly (clang, -O0):
<setTextShort>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %ax,-0xc(%rbp)
movb   $0x0,-0xd(%rbp)
movsbl -0xd(%rbp),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jge    116c <setTextShort+0x6c>
movzwl -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x30,%edx
mov    -0x8(%rbp),%rax
movsbl -0x9(%rbp),%ecx
sub    $0x1,%ecx
movsbl -0xd(%rbp),%esi
sub    %esi,%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
movzwl -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %ax,-0xc(%rbp)
mov    -0xd(%rbp),%al
add    $0x1,%al
mov    %al,-0xd(%rbp)
jmp    1119 <setTextShort+0x19>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setTextShort>:
test   %sil,%sil
jle    1133 <setTextShort+0x33>
movzbl %sil,%eax
nopl   0x0(%rax)
movzwl %dx,%ecx
imul   $0xcccd,%ecx,%ecx
shr    $0x13,%ecx
lea    (%rcx,%rcx,1),%esi
lea    (%rsi,%rsi,4),%esi
sub    %esi,%edx
or     $0x30,%dl
mov    %dl,-0x1(%rdi,%rax,1)
mov    %ecx,%edx
add    $0xffffffffffffffff,%rax
jne    1110 <setTextShort+0x10>
ret

LLVM IR (-O0):
define void @setTextShort(i8* %0, i8 signext %1, i16 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i16
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i16 %2, i16* %6
store i8 0, i8* %7
br label %8
8: ; preds = %33, %3
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = load i8, i8* %5
%12 = sext i8 %11 to i32
%13 = icmp slt i32 %10, %12
br i1 %13, label %14, label %36
14: ; preds = %8
%15 = load i16, i16* %6
%16 = zext i16 %15 to i32
%17 = srem i32 %16, 10
%18 = add nsw i32 %17, 48
%19 = trunc i32 %18 to i8
%20 = load i8*, i8** %4
%21 = load i8, i8* %5
%22 = sext i8 %21 to i32
%23 = sub nsw i32 %22, 1
%24 = load i8, i8* %7
%25 = sext i8 %24 to i32
%26 = sub nsw i32 %23, %25
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %20, i64 %27
store i8 %19, i8* %28
%29 = load i16, i16* %6
%30 = zext i16 %29 to i32
%31 = sdiv i32 %30, 10
%32 = trunc i32 %31 to i16
store i16 %32, i16* %6
br label %33
33: ; preds = %14
%34 = load i8, i8* %7
%35 = add i8 %34, 1
store i8 %35, i8* %7
br label %8
36: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @setTextShort(i8* nocapture writeonly %0, i8 signext %1, i16 zeroext %2) {
%4 = icmp sgt i8 %1, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = zext i8 %1 to i64
%7 = zext i8 %1 to i64
br label %9
8: ; preds = %9, %3
ret void
9: ; preds = %5, %9
%10 = phi i64 [ 0, %5 ], [ %19, %9 ]
%11 = phi i16 [ %2, %5 ], [ %18, %9 ]
%12 = urem i16 %11, 10
%13 = trunc i16 %12 to i8
%14 = or i8 %13, 48
%15 = xor i64 %10, -1
%16 = add nsw i64 %15, %6
%17 = getelementptr inbounds i8, i8* %0, i64 %16
store i8 %14, i8* %17
%18 = udiv i16 %11, 10
%19 = add nuw nsw i64 %10, 1
%20 = icmp eq i64 %19, %7
br i1 %20, label %8, label %9
}
void delay_x(void) {
  volatile int count = 50000000;
  while (count--)
    ;
}


x86 assembly (clang, -O0):
<delay_x>:
push   %rbp
mov    %rsp,%rbp
movl   $0x2faf080,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1124 <delay_x+0x24>
jmp    110b <delay_x+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_x>:
movl   $0x2faf080,-0x4(%rsp)
02
nopl   0x0(%rax,%rax,1)
subl   $0x1,-0x4(%rsp)
jae    1110 <delay_x+0x10>
ret

LLVM IR (-O0):
define void @delay_x() {
%1 = alloca i32
store volatile i32 50000000, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load volatile i32, i32* %1
%4 = add nsw i32 %3, -1
store volatile i32 %4, i32* %1
%5 = icmp ne i32 %3, 0
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @delay_x() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 50000000, i32* %1
br label %3
3: ; preds = %3, %0
%4 = load volatile i32, i32* %1
%5 = add nsw i32 %4, -1
store volatile i32 %5, i32* %1
%6 = icmp eq i32 %4, 0
br i1 %6, label %7, label %3
7: ; preds = %3
ret void
}
double _or(const int numInputs, const double *inputs,
           const double *connectionWeights) {
  int i;
  for (i = 0; i < numInputs; i++) {
    if (inputs[i] == 1) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<_or>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    116c <_or+0x6c>
mov    -0x18(%rbp),%rax
movslq -0x24(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  0xec9(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1159 <_or+0x59>
jp     1159 <_or+0x59>
movsd  0xeb1(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1174 <_or+0x74>
jmp    115e <_or+0x5e>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1116 <_or+0x16>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_or>:
xorps  %xmm0,%xmm0
test   %edi,%edi
jle    1136 <_or+0x36>
mov    %edi,%eax
xor    %ecx,%ecx
movsd  0xeed(%rip),%xmm1
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsd  (%rsi,%rcx,8),%xmm2
ucomisd %xmm1,%xmm2
jne    112d <_or+0x2d>
jnp    1137 <_or+0x37>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1120 <_or+0x20>
ret
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @_or(i32 %0, double* %1, double* %2) {
%4 = alloca double
%5 = alloca i32
%6 = alloca double*
%7 = alloca double*
%8 = alloca i32
store i32 %0, i32* %5
store double* %1, double** %6
store double* %2, double** %7
store i32 0, i32* %8
br label %9
9: ; preds = %22, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %5
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = load double*, double** %6
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = fcmp oeq double %18, 1.000000e+00
br i1 %19, label %20, label %21
20: ; preds = %13
store double 1.000000e+00, double* %4
br label %26
21: ; preds = %13
br label %22
22: ; preds = %21
%23 = load i32, i32* %8
%24 = add nsw i32 %23, 1
store i32 %24, i32* %8
br label %9
25: ; preds = %9
store double 0.000000e+00, double* %4
br label %26
26: ; preds = %25, %20
%27 = load double, double* %4
ret double %27
}

LLVM IR (-O2):
define double @_or(i32 %0, double* nocapture %1, double* nocapture readnone %2) {
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %0 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds double, double* %1, i64 %10
%12 = load double, double* %11
%13 = fcmp oeq double %12, 1.000000e+00
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi double [ 0.000000e+00, %3 ], [ 0.000000e+00, %7 ], [ 1.000000e+00, %9 ]
ret double %16
}
/* Variables and functions */
int /*<<< orphan*/ spi_emit_buf(char *, int);
void spi_emit_break(void) { spi_emit_buf("\x4", 1); }


x86 assembly (clang, -O0):
<spi_emit_break>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <spi_emit_buf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_emit_break>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <spi_emit_buf@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\04\00"
define void @spi_emit_break() {
%1 = call i32 @spi_emit_buf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\04\00"
define void @spi_emit_break() {
%1 = tail call i32 @spi_emit_buf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Type definitions */
typedef scalar_t__ n;

/* Variables and functions */
long C_flonum(long **, double);
long C_unsigned_int_to_num(long **ptr, unsigned long n) {
  if ((((n) & (0x8000000000000000L | (0x8000000000000000L >> 1))) == 0))
    return (((long)(n) << 1) | 0x00000001);
  else
    return C_flonum(ptr, (double)n);
}


x86 assembly (clang, -O0):
<C_unsigned_int_to_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movabs $0xc000000000000000,%rax
and    -0x18(%rbp),%rax
cmp    $0x0,%rax
jne    114d <C_unsigned_int_to_num+0x3d>
mov    -0x18(%rbp),%rax
shl    $0x1,%rax
or     $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1181 <C_unsigned_int_to_num+0x71>
mov    -0x10(%rbp),%rdi
movaps 0xea8(%rip),%xmm1
movq   -0x18(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xea7(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
call   1030 <C_flonum@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_unsigned_int_to_num>:
mov    %rsi,%rax
shr    $0x3e,%rax
jne    1122 <C_unsigned_int_to_num+0x12>
lea    (%rsi,%rsi,1),%rax
add    $0x1,%rax
ret
movq   %rsi,%xmm1
punpckldq 0xed1(%rip),%xmm1
subpd  0xed9(%rip),%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
jmp    1030 <C_flonum@plt>

LLVM IR (-O0):
define i64 @C_unsigned_int_to_num(i64** %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64**
%5 = alloca i64
store i64** %0, i64*** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = and i64 %6, -4611686018427387904
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i64, i64* %5
%11 = shl i64 %10, 1
%12 = or i64 %11, 1
store i64 %12, i64* %3
br label %18
13: ; preds = %2
%14 = load i64**, i64*** %4
%15 = load i64, i64* %5
%16 = uitofp i64 %15 to double
%17 = call i64 @C_flonum(i64** %14, double %16)
store i64 %17, i64* %3
br label %18
18: ; preds = %13, %9
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @C_unsigned_int_to_num(i64** %0, i64 %1) {
%3 = icmp ult i64 %1, 4611686018427387904
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = shl nuw nsw i64 %1, 1
%6 = or i64 %5, 1
br label %10
7: ; preds = %2
%8 = uitofp i64 %1 to double
%9 = tail call i64 @C_flonum(i64** %0, double %8)
br label %10
10: ; preds = %7, %4
%11 = phi i64 [ %6, %4 ], [ %9, %7 ]
ret i64 %11
}
void RE(int n) {}


x86 assembly (clang, -O0):
<RE>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RE>:
ret

LLVM IR (-O0):
define void @RE(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @RE(i32 %0) {
ret void
}
/* Type definitions */
struct rq_volatility {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct rq_volatility *);
void rq_volatility_free(struct rq_volatility *v) { free(v); }


x86 assembly (clang, -O0):
<rq_volatility_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rq_volatility_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.rq_volatility = type { i32 }
define void @rq_volatility_free(%struct.rq_volatility* %0) {
%2 = alloca %struct.rq_volatility*
store %struct.rq_volatility* %0, %struct.rq_volatility** %2
%3 = load %struct.rq_volatility*, %struct.rq_volatility** %2
%4 = call i32 @free(%struct.rq_volatility* %3)
ret void
}

LLVM IR (-O2):
%struct.rq_volatility = type { i32 }
define void @rq_volatility_free(%struct.rq_volatility* nocapture %0) {
%2 = tail call i32 @free(%struct.rq_volatility* %0)
ret void
}
unsigned int inportl(unsigned short port) {
  unsigned int value;
  asm volatile("inl %%dx, %%eax" : "=a"(value) : "dN"(port));
  return value;
}


x86 assembly (clang, -O0):
<inportl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inportl>:
mov    %edi,%edx
in     (%dx),%eax
ret

LLVM IR (-O0):
define i32 @inportl(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 asm sideeffect "inl %dx, %eax", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @inportl(i16 zeroext %0) {
%2 = tail call i32 asm sideeffect "inl %dx, %eax", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i32 %2
}