xunge/DecIR huggingface dataset:
double nx_max_d(double x, double y) { return (x > y) ? x : y; }


x86 assembly (clang, -O0):
<nx_max_d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112d <nx_max_d+0x2d>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <nx_max_d+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nx_max_d>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @nx_max_d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @nx_max_d(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
float push_buffer(float insample, float *buffer, unsigned long buflen,
                  unsigned long *pos) {
  float outsample;
  outsample = buffer[*pos];
  buffer[(*pos)++] = insample;
  if (*pos >= buflen)
    *pos = 0;
  return outsample;
}


x86 assembly (clang, -O0):
<push_buffer>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    (%rcx),%rcx
movss  (%rax,%rcx,4),%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rdx
mov    (%rdx),%rcx
mov    %rcx,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
movss  %xmm0,(%rax,%rcx,4)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jb     1165 <push_buffer+0x65>
mov    -0x20(%rbp),%rax
movq   $0x0,(%rax)
movss  -0x24(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<push_buffer>:
movaps %xmm0,%xmm1
mov    (%rdx),%rax
movss  (%rdi,%rax,4),%xmm0
lea    0x1(%rax),%rcx
mov    %rcx,(%rdx)
movss  %xmm1,(%rdi,%rax,4)
cmp    %rsi,%rcx
jb     1123 <push_buffer+0x23>
movq   $0x0,(%rdx)
ret

LLVM IR (-O0):
define float @push_buffer(float %0, float* %1, i64 %2, i64* %3) {
%5 = alloca float
%6 = alloca float*
%7 = alloca i64
%8 = alloca i64*
%9 = alloca float
store float %0, float* %5
store float* %1, float** %6
store i64 %2, i64* %7
store i64* %3, i64** %8
%10 = load float*, float** %6
%11 = load i64*, i64** %8
%12 = load i64, i64* %11
%13 = getelementptr inbounds float, float* %10, i64 %12
%14 = load float, float* %13
store float %14, float* %9
%15 = load float, float* %5
%16 = load float*, float** %6
%17 = load i64*, i64** %8
%18 = load i64, i64* %17
%19 = add i64 %18, 1
store i64 %19, i64* %17
%20 = getelementptr inbounds float, float* %16, i64 %18
store float %15, float* %20
%21 = load i64*, i64** %8
%22 = load i64, i64* %21
%23 = load i64, i64* %7
%24 = icmp uge i64 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %4
%26 = load i64*, i64** %8
store i64 0, i64* %26
br label %27
27: ; preds = %25, %4
%28 = load float, float* %9
ret float %28
}

LLVM IR (-O2):
define float @push_buffer(float %0, float* nocapture %1, i64 %2, i64* nocapture %3) {
%5 = load i64, i64* %3
%6 = getelementptr inbounds float, float* %1, i64 %5
%7 = load float, float* %6
%8 = add i64 %5, 1
store i64 %8, i64* %3
store float %0, float* %6
%9 = icmp ult i64 %8, %2
br i1 %9, label %11, label %10
10: ; preds = %4
store i64 0, i64* %3
br label %11
11: ; preds = %10, %4
ret float %7
}
unsigned int highestOneBit(unsigned int i) {
  i |= (i >> 1);
  i |= (i >> 2);
  i |= (i >> 4);
  i |= (i >> 8);
  i |= (i >> 16);
  return i - (i >> 1);
}


x86 assembly (clang, -O0):
<highestOneBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<highestOneBit>:
mov    %edi,%eax
shr    %eax
or     %edi,%eax
mov    %eax,%ecx
shr    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    %ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @highestOneBit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 1
%5 = load i32, i32* %2
%6 = or i32 %5, %4
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = lshr i32 %7, 2
%9 = load i32, i32* %2
%10 = or i32 %9, %8
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = lshr i32 %11, 4
%13 = load i32, i32* %2
%14 = or i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = lshr i32 %15, 8
%17 = load i32, i32* %2
%18 = or i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = lshr i32 %19, 16
%21 = load i32, i32* %2
%22 = or i32 %21, %20
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = load i32, i32* %2
%25 = lshr i32 %24, 1
%26 = sub i32 %23, %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @highestOneBit(i32 %0) {
%2 = lshr i32 %0, 1
%3 = or i32 %2, %0
%4 = lshr i32 %3, 2
%5 = or i32 %4, %3
%6 = lshr i32 %5, 4
%7 = or i32 %6, %5
%8 = lshr i32 %7, 8
%9 = or i32 %8, %7
%10 = lshr i32 %9, 16
%11 = or i32 %10, %9
%12 = lshr i32 %11, 1
%13 = sub i32 %11, %12
ret i32 %13
}
/* Type definitions */
struct mb_interpreter_t {
  int dummy;
};

/* Variables and functions */
int _remove_func(struct mb_interpreter_t *, char *, int);
int mb_remove_reserved_func(struct mb_interpreter_t *s, const char *n) {
  if (!s || !n)
    return 0;
  return _remove_func(s, (char *)n, (1));
}


x86 assembly (clang, -O0):
<mb_remove_reserved_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1136 <mb_remove_reserved_func+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    1142 <mb_remove_reserved_func+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1157 <mb_remove_reserved_func+0x47>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <_remove_func@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mb_remove_reserved_func>:
test   %rdi,%rdi
je     1124 <mb_remove_reserved_func+0x14>
test   %rsi,%rsi
je     1124 <mb_remove_reserved_func+0x14>
mov    $0x1,%edx
jmp    1030 <_remove_func@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mb_interpreter_t = type { i32 }
define i32 @mb_remove_reserved_func(%struct.mb_interpreter_t* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.mb_interpreter_t*
%5 = alloca i8*
store %struct.mb_interpreter_t* %0, %struct.mb_interpreter_t** %4
store i8* %1, i8** %5
%6 = load %struct.mb_interpreter_t*, %struct.mb_interpreter_t** %4
%7 = icmp ne %struct.mb_interpreter_t* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %8, %2
store i32 0, i32* %3
br label %16
12: ; preds = %8
%13 = load %struct.mb_interpreter_t*, %struct.mb_interpreter_t** %4
%14 = load i8*, i8** %5
%15 = call i32 @_remove_func(%struct.mb_interpreter_t* %13, i8* %14, i32 1)
store i32 %15, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.mb_interpreter_t = type { i32 }
define i32 @mb_remove_reserved_func(%struct.mb_interpreter_t* %0, i8* %1) {
%3 = icmp ne %struct.mb_interpreter_t* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @_remove_func(%struct.mb_interpreter_t* %0, i8* %1, i32 1)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Type definitions */
struct ib_hash_map {
  int dummy;
};

/* Variables and functions */
void *ib_map_lookup(struct ib_hash_map *, void const *, int /*<<< orphan*/ *);
void *ib_map_get(struct ib_hash_map *hm, const void *key) {
  return ib_map_lookup(hm, key, NULL);
}


x86 assembly (clang, -O0):
<ib_map_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <ib_map_lookup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ib_map_get>:
xor    %edx,%edx
jmp    1030 <ib_map_lookup@plt>

LLVM IR (-O0):
%struct.ib_hash_map = type { i32 }
define i8* @ib_map_get(%struct.ib_hash_map* %0, i8* %1) {
%3 = alloca %struct.ib_hash_map*
%4 = alloca i8*
store %struct.ib_hash_map* %0, %struct.ib_hash_map** %3
store i8* %1, i8** %4
%5 = load %struct.ib_hash_map*, %struct.ib_hash_map** %3
%6 = load i8*, i8** %4
%7 = call i8* @ib_map_lookup(%struct.ib_hash_map* %5, i8* %6, i32* null)
ret i8* %7
}

LLVM IR (-O2):
%struct.ib_hash_map = type { i32 }
define i8* @ib_map_get(%struct.ib_hash_map* %0, i8* %1) {
%3 = tail call i8* @ib_map_lookup(%struct.ib_hash_map* %0, i8* %1, i32* null)
ret i8* %3
}
void Hal_hook_rd_sgndrecfield_recelema2(void) {}


x86 assembly (clang, -O0):
<Hal_hook_rd_sgndrecfield_recelema2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hal_hook_rd_sgndrecfield_recelema2>:
ret

LLVM IR (-O0):
define void @Hal_hook_rd_sgndrecfield_recelema2() {
ret void
}

LLVM IR (-O2):
define void @Hal_hook_rd_sgndrecfield_recelema2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_conditions();
int /*<<< orphan*/ test_conditions_broadcast();
int /*<<< orphan*/ test_conditions_mixed();
int /*<<< orphan*/ test_conditions_signal();
int /*<<< orphan*/ test_conditions_timed();
int /*<<< orphan*/ write(int, char *, int);
void test3() {
  write(1, "\nTEST 3: condition variables and mutexes:\n\n",
        sizeof("\nTEST 3: condition variables and mutexes:\n\n") - 1);
  test_conditions();
  test_conditions_timed();
  test_conditions_signal();
  test_conditions_broadcast();
  test_conditions_mixed();
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xe90(%rip),%rsi
mov    $0x2b,%edx
call   1040 <write@plt>
mov    $0x0,%al
call   1050 <test_conditions@plt>
mov    $0x0,%al
call   1080 <test_conditions_timed@plt>
mov    $0x0,%al
call   1030 <test_conditions_signal@plt>
mov    $0x0,%al
call   1060 <test_conditions_broadcast@plt>
mov    $0x0,%al
call   1070 <test_conditions_mixed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
push   %rax
lea    0xe98(%rip),%rsi
mov    $0x1,%edi
mov    $0x2b,%edx
call   1040 <write@plt>
xor    %eax,%eax
call   1050 <test_conditions@plt>
xor    %eax,%eax
call   1080 <test_conditions_timed@plt>
xor    %eax,%eax
call   1030 <test_conditions_signal@plt>
xor    %eax,%eax
call   1060 <test_conditions_broadcast@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <test_conditions_mixed@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"\0ATEST 3: condition variables and mutexes:\0A\0A\00"
define void @test3() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 43)
%2 = call i32 (...) @test_conditions()
%3 = call i32 (...) @test_conditions_timed()
%4 = call i32 (...) @test_conditions_signal()
%5 = call i32 (...) @test_conditions_broadcast()
%6 = call i32 (...) @test_conditions_mixed()
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"\0ATEST 3: condition variables and mutexes:\0A\0A\00"
define void @test3() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 43)
%2 = tail call i32 (...) @test_conditions()
%3 = tail call i32 (...) @test_conditions_timed()
%4 = tail call i32 (...) @test_conditions_signal()
%5 = tail call i32 (...) @test_conditions_broadcast()
%6 = tail call i32 (...) @test_conditions_mixed()
ret void
}
/* Variables and functions */
int getpid();
int __getpid(void) { return getpid(); }


x86 assembly (clang, -O0):
<__getpid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__getpid>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i32 @__getpid() {
%1 = call i32 (...) @getpid()
ret i32 %1
}

LLVM IR (-O2):
define i32 @__getpid() {
%1 = tail call i32 (...) @getpid()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ hostx_toggle_damage_debug();
void hostx_handle_signal(int signum) {
  hostx_toggle_damage_debug();
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<hostx_handle_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hostx_toggle_damage_debug@plt>
jmp    1127 <hostx_handle_signal+0x17>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hostx_handle_signal>:
xor    %eax,%eax
jmp    1030 <hostx_toggle_damage_debug@plt>

LLVM IR (-O0):
define void @hostx_handle_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @hostx_toggle_damage_debug()
br label %4
4: ; preds = %1
br label %5
5: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @hostx_handle_signal(i32 %0) {
%2 = tail call i32 (...) @hostx_toggle_damage_debug()
ret void
}
int test_imm_24uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x24 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_24uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x24,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_24uint64_midword_mem>:
testb  $0x24,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_24uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 36
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_24uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 2359296
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void *waiter(void *udata) {
  (void)udata;
  usleep(1000000 * 5);
}


x86 assembly (clang, -O0):
<waiter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x4c4b40,%edi
call   1030 <usleep@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waiter>:
mov    $0x4c4b40,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define i8* @waiter(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @usleep(i32 5000000)
%6 = load i8*, i8** %2
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @waiter(i8* nocapture readnone %0) {
%2 = tail call i32 @usleep(i32 5000000)
ret i8* undef
}
/* Type definitions */
struct evm_instance {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct evm_instance *);
void evm_destroy(struct evm_instance *evm) { free(evm); }


x86 assembly (clang, -O0):
<evm_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evm_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.evm_instance = type { i32 }
define void @evm_destroy(%struct.evm_instance* %0) {
%2 = alloca %struct.evm_instance*
store %struct.evm_instance* %0, %struct.evm_instance** %2
%3 = load %struct.evm_instance*, %struct.evm_instance** %2
%4 = call i32 @free(%struct.evm_instance* %3)
ret void
}

LLVM IR (-O2):
%struct.evm_instance = type { i32 }
define void @evm_destroy(%struct.evm_instance* nocapture %0) {
%2 = tail call i32 @free(%struct.evm_instance* %0)
ret void
}
/* Variables and functions */
double trunc(double);
double test4(double x) { return trunc(x); }


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <trunc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
jmp    1030 <trunc@plt>

LLVM IR (-O0):
define double @test4(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.trunc.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test4(double %0) {
%2 = tail call double @llvm.trunc.f64(double %0)
ret double %2
}
int f(int *arr1, int *arr2, int *arr3) {
  if (arr3) {
    return arr3[5];
  }
  return arr1[arr2[5]];
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     112a <f+0x2a>
mov    -0x20(%rbp),%rax
mov    0x14(%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    113c <f+0x3c>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movslq 0x14(%rcx),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
test   %rdx,%rdx
je     110c <f+0xc>
add    $0x14,%rdx
mov    (%rdx),%eax
ret
movslq 0x14(%rsi),%rax
lea    (%rdi,%rax,4),%rdx
mov    (%rdx),%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%8 = load i32*, i32** %7
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32*, i32** %7
%12 = getelementptr inbounds i32, i32* %11, i64 5
%13 = load i32, i32* %12
store i32 %13, i32* %4
br label %22
14: ; preds = %3
%15 = load i32*, i32** %5
%16 = load i32*, i32** %6
%17 = getelementptr inbounds i32, i32* %16, i64 5
%18 = load i32, i32* %17
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %15, i64 %19
%21 = load i32, i32* %20
store i32 %21, i32* %4
br label %22
22: ; preds = %14, %10
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @f(i32* nocapture %0, i32* nocapture %1, i32* %2) {
%4 = icmp eq i32* %2, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = getelementptr inbounds i32, i32* %2, i64 5
br label %12
7: ; preds = %3
%8 = getelementptr inbounds i32, i32* %1, i64 5
%9 = load i32, i32* %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %0, i64 %10
br label %12
12: ; preds = %7, %5
%13 = phi i32* [ %6, %5 ], [ %11, %7 ]
%14 = load i32, i32* %13
ret i32 %14
}
/* Variables and functions */
scalar_t__ __builtin_vsx_xstsqrtdp_fg(double);
int *test_sqrt_df_3(double a, int *p) {
  if (__builtin_vsx_xstsqrtdp_fg(a))
    *p++ = 1;
  return p;
}


x86 assembly (clang, -O0):
<test_sqrt_df_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__builtin_vsx_xstsqrtdp_fg@plt>
cmp    $0x0,%rax
je     114a <test_sqrt_df_3+0x3a>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sqrt_df_3>:
push   %rbx
mov    %rdi,%rbx
call   1030 <__builtin_vsx_xstsqrtdp_fg@plt>
test   %rax,%rax
je     1128 <test_sqrt_df_3+0x18>
movl   $0x1,(%rbx)
add    $0x4,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32* @test_sqrt_df_3(double %0, i32* %1) {
%3 = alloca double
%4 = alloca i32*
store double %0, double* %3
store i32* %1, i32** %4
%5 = load double, double* %3
%6 = call i64 @__builtin_vsx_xstsqrtdp_fg(double %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %4
store i32 1, i32* %9
br label %11
11: ; preds = %8, %2
%12 = load i32*, i32** %4
ret i32* %12
}

LLVM IR (-O2):
define i32* @test_sqrt_df_3(double %0, i32* writeonly %1) {
%3 = tail call i64 @__builtin_vsx_xstsqrtdp_fg(double %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = getelementptr inbounds i32, i32* %1, i64 1
store i32 1, i32* %1
br label %7
7: ; preds = %5, %2
%8 = phi i32* [ %6, %5 ], [ %1, %2 ]
ret i32* %8
}
/* Variables and functions */
int /*<<< orphan*/ MagBiasHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void MagBiasUpdated() { UAVObjUpdated(MagBiasHandle()); }


x86 assembly (clang, -O0):
<MagBiasUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MagBiasHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MagBiasUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <MagBiasHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @MagBiasUpdated() {
%1 = call i32 (...) @MagBiasHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @MagBiasUpdated() {
%1 = tail call i32 (...) @MagBiasHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
void start_id() {
  unsigned long val;
  extern struct LifoStack values_stack;
  do {
    unsigned int __a, __d;
    asm volatile("rdtsc" : "=a"(__a), "=d"(__d));
    (val) = ((unsigned long)__a) | (((unsigned long)__d) << 32);
  } while (0);
  push(&values_stack, val);
}


x86 assembly (clang, -O0):
<start_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
rdtsc
mov    %eax,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    $0x20,%rcx
or     %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    0x2eb4(%rip),%rdi
mov    $0x0,%al
call   1030 <push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_id>:
rdtsc
mov    %eax,%esi
shl    $0x20,%rdx
or     %rdx,%rsi
mov    0x2ece(%rip),%rdi
xor    %eax,%eax
jmp    1030 <push@plt>

LLVM IR (-O0):
%struct.LifoStack = type opaque
@values_stack = external global %struct.LifoStack
define void @start_id() {
%1 = alloca i64
%2 = alloca i32
%3 = alloca i32
br label %4
4: ; preds = %0
%5 = call { i32, i32 } asm sideeffect "rdtsc", "={ax},={dx},~{dirflag},~{fpsr},~{flags}"()
%6 = extractvalue { i32, i32 } %5, 0
%7 = extractvalue { i32, i32 } %5, 1
store i32 %6, i32* %2
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = load i32, i32* %3
%11 = zext i32 %10 to i64
%12 = shl i64 %11, 32
%13 = or i64 %9, %12
store i64 %13, i64* %1
br label %14
14: ; preds = %4
%15 = load i64, i64* %1
%16 = call i32 (%struct.LifoStack*, i64, ...) bitcast (i32 (...)* @push to i32 (%struct.LifoStack*, i64, ...)*)(%struct.LifoStack* @values_stack, i64 %15)
ret void
}

LLVM IR (-O2):
%struct.LifoStack = type opaque
@values_stack = external global %struct.LifoStack
define void @start_id() {
%1 = tail call { i32, i32 } asm sideeffect "rdtsc", "={ax},={dx},~{dirflag},~{fpsr},~{flags}"()
%2 = extractvalue { i32, i32 } %1, 0
%3 = extractvalue { i32, i32 } %1, 1
%4 = zext i32 %2 to i64
%5 = zext i32 %3 to i64
%6 = shl nuw i64 %5, 32
%7 = or i64 %6, %4
%8 = tail call i32 (%struct.LifoStack*, i64, ...) bitcast (i32 (...)* @push to i32 (%struct.LifoStack*, i64, ...)*)(%struct.LifoStack* @values_stack, i64 %7)
ret void
}
/* Variables and functions */
int strcmp(char const *, char const *);
int compare(const void *a, const void *b) {
  const char *pa = *(const char **)a;
  const char *pb = *(const char **)b;
  return strcmp(pa, pb);
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
%9 = load i8*, i8** %8
store i8* %9, i8** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
%12 = load i8*, i8** %11
store i8* %12, i8** %6
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = call i32 @strcmp(i8* %13, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int *arr, int left, int right) {
  int pos;
  if (left >= right) {
    return;
  }
  pos = partition(arr, left, right);
  quicksort(arr, left, pos - 1);
  quicksort(arr, pos + 1, right);
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1143 <quicksort+0x23>
jmp    1179 <quicksort+0x59>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sge i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
br label %25
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @partition(i32* %13, i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = load i32, i32* %7
%20 = sub nsw i32 %19, 1
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
br label %25
25: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
int kbhit() { return (1); }


x86 assembly (clang, -O0):
<kbhit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kbhit>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @kbhit() {
ret i32 1
}

LLVM IR (-O2):
define i32 @kbhit() {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int64_t f_scalar_4(int64_t x) { return x; }


x86 assembly (clang, -O0):
<f_scalar_4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_scalar_4>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f_scalar_4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @f_scalar_4(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
double now();
double now_delta(double *dp) {
  double t = now();
  double d = t - *dp;
  *dp = t;
  return d;
}


x86 assembly (clang, -O0):
<now_delta>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <now@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
subsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<now_delta>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <now@plt>
movapd %xmm0,%xmm1
subsd  (%rbx),%xmm1
movsd  %xmm0,(%rbx)
movapd %xmm1,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @now_delta(double* %0) {
%2 = alloca double*
%3 = alloca double
%4 = alloca double
store double* %0, double** %2
%5 = call double (...) @now()
store double %5, double* %3
%6 = load double, double* %3
%7 = load double*, double** %2
%8 = load double, double* %7
%9 = fsub double %6, %8
store double %9, double* %4
%10 = load double, double* %3
%11 = load double*, double** %2
store double %10, double* %11
%12 = load double, double* %4
ret double %12
}

LLVM IR (-O2):
define double @now_delta(double* nocapture %0) {
%2 = tail call double (...) @now()
%3 = load double, double* %0
%4 = fsub double %2, %3
store double %2, double* %0
ret double %4
}
/* Variables and functions */
int unlink(char const *);
int eliminarLock(const char *nombre) { return unlink(nombre); }


x86 assembly (clang, -O0):
<eliminarLock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eliminarLock>:
jmp    1030 <unlink@plt>

LLVM IR (-O0):
define i32 @eliminarLock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @unlink(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @eliminarLock(i8* nocapture %0) {
%2 = tail call i32 @unlink(i8* %0)
ret i32 %2
}
void plazaio_end() {}


x86 assembly (clang, -O0):
<plazaio_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plazaio_end>:
ret

LLVM IR (-O0):
define void @plazaio_end() {
ret void
}

LLVM IR (-O2):
define void @plazaio_end() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ freerange(void *, void *);
void kinit1(void *vstart, void *vend) { freerange(vstart, vend); }


x86 assembly (clang, -O0):
<kinit1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <freerange@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kinit1>:
jmp    1030 <freerange@plt>

LLVM IR (-O0):
define void @kinit1(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @freerange(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @kinit1(i8* %0, i8* %1) {
%3 = tail call i32 @freerange(i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __isoc99_scanf();
int plusandminus(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[], char *envp[]) {
  int local0;
  int o0;
  int o5;
  __isoc99_scanf();
  o0 = plusandminus(local0, o5);
  printf("%d\n", o0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1050 <__isoc99_scanf@plt>
mov    -0x1c(%rbp),%edi
mov    -0x24(%rbp),%esi
call   1030 <plusandminus@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%esi
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <__isoc99_scanf@plt>
call   1030 <plusandminus@plt>
lea    0xebc(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%11 = call i32 (...) @__isoc99_scanf()
%12 = load i32, i32* %8
%13 = load i32, i32* %10
%14 = call i32 @plusandminus(i32 %12, i32 %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 (...) @__isoc99_scanf()
%5 = tail call i32 @plusandminus(i32 undef, i32 undef)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ parent;
};
typedef TYPE_1__ XCirculateRequestEvent;

/* Variables and functions */
unsigned long get_XCirculateRequestEvent_parent(void *_p) {
  return (unsigned long)((XCirculateRequestEvent *)_p)->parent;
}


x86 assembly (clang, -O0):
<get_XCirculateRequestEvent_parent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCirculateRequestEvent_parent>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XCirculateRequestEvent_parent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XCirculateRequestEvent_parent(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void init_accel_callbacks(void) {}


x86 assembly (clang, -O0):
<init_accel_callbacks>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_accel_callbacks>:
ret

LLVM IR (-O0):
define void @init_accel_callbacks() {
ret void
}

LLVM IR (-O2):
define void @init_accel_callbacks() {
ret void
}
void swap_wrong(int x, int y) {
  int tmp = x;
  x = y;
  y = tmp;
}


x86 assembly (clang, -O0):
<swap_wrong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_wrong>:
ret

LLVM IR (-O0):
define void @swap_wrong(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %4
store i32 %7, i32* %3
%8 = load i32, i32* %5
store i32 %8, i32* %4
ret void
}

LLVM IR (-O2):
define void @swap_wrong(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
scalar_t__ COLS;
scalar_t__ LINES;
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ mvcur(int /*<<< orphan*/, scalar_t__, scalar_t__,
                         int /*<<< orphan*/);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void die(int n) {
  signal(SIGINT, SIG_IGN);
  mvcur(0, COLS - 1, LINES - 1, 0);
  endwin();
  exit(n);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    0x2e7d(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
mov    0x2e67(%rip),%rax
mov    (%rax),%rsi
sub    $0x1,%rsi
mov    0x2e69(%rip),%rax
mov    (%rax),%rdx
sub    $0x1,%rdx
xor    %ecx,%ecx
mov    %ecx,%edi
call   1030 <mvcur@plt>
mov    $0x0,%al
call   1050 <endwin@plt>
mov    -0x4(%rbp),%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rbx
mov    %edi,%ebx
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
mov    0x2e85(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
mov    0x2e6f(%rip),%rax
mov    (%rax),%rsi
add    $0xffffffffffffffff,%rsi
mov    0x2e71(%rip),%rax
mov    (%rax),%rdx
add    $0xffffffffffffffff,%rdx
xor    %edi,%edi
xor    %ecx,%ecx
call   1030 <mvcur@plt>
xor    %eax,%eax
call   1050 <endwin@plt>
mov    %ebx,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
@COLS = global i64 0
@LINES = global i64 0
define void @die(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGINT
%4 = load i32, i32* @SIG_IGN
%5 = call i32 @signal(i32 %3, i32 %4)
%6 = load i64, i64* @COLS
%7 = sub nsw i64 %6, 1
%8 = load i64, i64* @LINES
%9 = sub nsw i64 %8, 1
%10 = call i32 @mvcur(i32 0, i64 %7, i64 %9, i32 0)
%11 = call i32 (...) @endwin()
%12 = load i32, i32* %2
%13 = call i32 @exit(i32 %12)
unreachable
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
@COLS = global i64 0
@LINES = global i64 0
define void @die(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = load i32, i32* @SIG_IGN
%4 = tail call i32 @signal(i32 %2, i32 %3)
%5 = load i64, i64* @COLS
%6 = add nsw i64 %5, -1
%7 = load i64, i64* @LINES
%8 = add nsw i64 %7, -1
%9 = tail call i32 @mvcur(i32 0, i64 %6, i64 %8, i32 0)
%10 = tail call i32 (...) @endwin()
%11 = tail call i32 @exit(i32 %0)
unreachable
}
void test___atomic_fetch_and_1(short *mem) { __atomic_fetch_and(mem, 1, 4); }


x86 assembly (clang, -O0):
<test___atomic_fetch_and_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
and    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test___atomic_fetch_and_1+0x5d>
jmp    1125 <test___atomic_fetch_and_1+0x25>
mov    -0x1a(%rbp),%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_fetch_and_1>:
lock andw $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_fetch_and_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw and i16* %5, i16 %6 acq_rel
store i16 %7, i16* %4
%8 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_fetch_and_1(i16* nocapture %0) {
%2 = atomicrmw and i16* %0, i16 1 acq_rel
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef unsigned long uint16_t;

/* Variables and functions */
uint16_t LCDIDDIndexedRead(uint32_t ui32Base, uint32_t ui32CS,
                           uint16_t ui16Addr) {
  uint32_t ui32Addr;
  ;
  ;
  ui32Addr = ui32CS ? 0x00000020 : 0x00000014;
  (*((volatile unsigned long *)(ui32Base + ui32Addr))) = ui16Addr;
  ui32Addr = ui32CS ? 0x00000024 : 0x00000018;
  return ((uint16_t)(*((volatile unsigned long *)(ui32Base + ui32Addr))));
}


x86 assembly (clang, -O0):
<LCDIDDIndexedRead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%edx
mov    $0x14,%eax
mov    $0x20,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    -0x14(%rbp),%eax
cltq
mov    %rcx,(%rax)
mov    -0x8(%rbp),%edx
mov    $0x18,%eax
mov    $0x24,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
add    -0x14(%rbp),%eax
cltq
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIDDIndexedRead>:
test   %esi,%esi
mov    $0x14,%eax
mov    $0x20,%ecx
cmove  %eax,%ecx
movslq %edi,%rax
mov    %rdx,(%rcx,%rax,1)
mov    $0x18,%ecx
mov    $0x24,%edx
cmove  %ecx,%edx
mov    (%rdx,%rax,1),%rax
ret

LLVM IR (-O0):
define i64 @LCDIDDIndexedRead(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 32, i32 20
store i32 %11, i32* %7
%12 = load i64, i64* %6
%13 = load i32, i32* %4
%14 = load i32, i32* %7
%15 = add nsw i32 %13, %14
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i64*
store volatile i64 %12, i64* %17
%18 = load i32, i32* %5
%19 = icmp ne i32 %18, 0
%20 = zext i1 %19 to i64
%21 = select i1 %19, i32 36, i32 24
store i32 %21, i32* %7
%22 = load i32, i32* %4
%23 = load i32, i32* %7
%24 = add nsw i32 %22, %23
%25 = sext i32 %24 to i64
%26 = inttoptr i64 %25 to i64*
%27 = load volatile i64, i64* %26
ret i64 %27
}

LLVM IR (-O2):
define i64 @LCDIDDIndexedRead(i32 %0, i32 %1, i64 %2) {
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i32 20, i32 32
%6 = add nsw i32 %5, %0
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i64*
store volatile i64 %2, i64* %8
%9 = select i1 %4, i32 24, i32 36
%10 = add nsw i32 %9, %0
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void g_error(char *message) { printf("%s: %s\n", "basename", message); }


x86 assembly (clang, -O0):
<g_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_error>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee7(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
@.str.1 = [9 x i8] c"basename\00"
define void @g_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
@.str.1 = [9 x i8] c"basename\00"
define void @g_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
int squareSum(int n) {
  int sum = 0, t;
  while (n) {
    t = n % 10;
    sum += t * t;
    n /= 10;
  }
  return sum;
}


x86 assembly (clang, -O0):
<squareSum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1146 <squareSum+0x46>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <squareSum+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<squareSum>:
xor    %eax,%eax
test   %edi,%edi
je     113e <squareSum+0x3e>
cs nopw 0x0(%rax,%rax,1)
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
imul   %esi,%esi
add    %esi,%eax
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <squareSum+0x10>
ret

LLVM IR (-O0):
define i32 @squareSum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %8, %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %2
%10 = srem i32 %9, 10
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = mul nsw i32 %11, %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %2
%17 = sdiv i32 %16, 10
store i32 %17, i32* %2
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @squareSum(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ %0, %1 ]
%5 = phi i32 [ %8, %3 ], [ 0, %1 ]
%6 = srem i32 %4, 10
%7 = mul nsw i32 %6, %6
%8 = add nuw nsw i32 %7, %5
%9 = sdiv i32 %4, 10
%10 = add i32 %4, 9
%11 = icmp ult i32 %10, 19
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ sock_sendline(char *, char *);
void ircproto_nick(char *nick) { sock_sendline("NICK %s", nick); }


x86 assembly (clang, -O0):
<ircproto_nick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <sock_sendline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ircproto_nick>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <sock_sendline@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"NICK %s\00"
define void @ircproto_nick(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sock_sendline(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"NICK %s\00"
define void @ircproto_nick(i8* %0) {
%2 = tail call i32 @sock_sendline(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzConstant_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ FAKE_SET_PORT_DATA_FOR_DEBUG(int /*<<< orphan*/);
int /*<<< orphan*/ SEND_ACKUP_DELAYED(int /*<<< orphan*/, int);
int /*<<< orphan*/ SEND_DATAON_DELAYED(int /*<<< orphan*/, int /*<<< orphan*/);
void BrzConstant_requp(struct comp *comp, int port) {
  struct BrzConstant_ *c = (struct BrzConstant_ *)comp;
  FAKE_SET_PORT_DATA_FOR_DEBUG(0);
  SEND_DATAON_DELAYED(0, 0);
  SEND_ACKUP_DELAYED(0, 1);
}


x86 assembly (clang, -O0):
<BrzConstant_requp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %edi,%edi
call   1030 <FAKE_SET_PORT_DATA_FOR_DEBUG@plt>
xor    %esi,%esi
mov    %esi,%edi
call   1040 <SEND_DATAON_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1050 <SEND_ACKUP_DELAYED@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzConstant_requp>:
push   %rax
xor    %edi,%edi
call   1030 <FAKE_SET_PORT_DATA_FOR_DEBUG@plt>
xor    %edi,%edi
xor    %esi,%esi
call   1040 <SEND_DATAON_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1050 <SEND_ACKUP_DELAYED@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzConstant_ = type { i32 }
define void @BrzConstant_requp(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzConstant_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzConstant_*
store %struct.BrzConstant_* %7, %struct.BrzConstant_** %5
%8 = call i32 @FAKE_SET_PORT_DATA_FOR_DEBUG(i32 0)
%9 = call i32 @SEND_DATAON_DELAYED(i32 0, i32 0)
%10 = call i32 @SEND_ACKUP_DELAYED(i32 0, i32 1)
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzConstant_requp(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @FAKE_SET_PORT_DATA_FOR_DEBUG(i32 0)
%4 = tail call i32 @SEND_DATAON_DELAYED(i32 0, i32 0)
%5 = tail call i32 @SEND_ACKUP_DELAYED(i32 0, i32 1)
ret void
}