xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ glClearColor(double, double, double, double);
void init() { glClearColor(1.0, 1.0, 1.0, 0.0); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
movsd  0xee4(%rip),%xmm2
xorps  %xmm3,%xmm3
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <glClearColor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
movsd  0xee8(%rip),%xmm0
xorps  %xmm3,%xmm3
movaps %xmm0,%xmm1
movaps %xmm0,%xmm2
jmp    1030 <glClearColor@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 @glClearColor(double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 0.000000e+00)
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 @glClearColor(double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 0.000000e+00)
ret void
}
int fuserl_attr_flags_canonicalize(int flags) {
  int canonical = 0;
  (void)flags;
  return canonical;
}


x86 assembly (clang, -O0):
<fuserl_attr_flags_canonicalize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fuserl_attr_flags_canonicalize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fuserl_attr_flags_canonicalize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @fuserl_attr_flags_canonicalize(i32 %0) {
ret i32 0
}
void bnxt_disable_poll(struct bnxt_napi *bnapi) {}


x86 assembly (clang, -O0):
<bnxt_disable_poll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bnxt_disable_poll>:
ret

LLVM IR (-O0):
%struct.bnxt_napi = type opaque
define void @bnxt_disable_poll(%struct.bnxt_napi* %0) {
%2 = alloca %struct.bnxt_napi*
store %struct.bnxt_napi* %0, %struct.bnxt_napi** %2
ret void
}

LLVM IR (-O2):
%struct.bnxt_napi = type opaque
define void @bnxt_disable_poll(%struct.bnxt_napi* nocapture %0) {
ret void
}
void kbase_rk_dvfs_enable(struct kbase_device *kbdev) {}


x86 assembly (clang, -O0):
<kbase_rk_dvfs_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kbase_rk_dvfs_enable>:
ret

LLVM IR (-O0):
%struct.kbase_device = type opaque
define void @kbase_rk_dvfs_enable(%struct.kbase_device* %0) {
%2 = alloca %struct.kbase_device*
store %struct.kbase_device* %0, %struct.kbase_device** %2
ret void
}

LLVM IR (-O2):
%struct.kbase_device = type opaque
define void @kbase_rk_dvfs_enable(%struct.kbase_device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ keyView(unsigned char, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void menuView(int item) { keyView((unsigned char)item, 0, 0); }


x86 assembly (clang, -O0):
<menuView>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
movzbl %al,%edi
mov    %edx,%esi
call   1030 <keyView@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<menuView>:
movzbl %dil,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <keyView@plt>

LLVM IR (-O0):
define void @menuView(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = call i32 @keyView(i8 zeroext %4, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @menuView(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = tail call i32 @keyView(i8 zeroext %2, i32 0, i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigdelset(int /*<<< orphan*/ *, int);
int main(void) {
  sigset_t set;
  int status;
  status = sigdelset(&set, 21);
  return status;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x15,%esi
call   1030 <sigdelset@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
mov    $0x15,%esi
call   1030 <sigdelset@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @sigdelset(i32* %2, i32 21)
store i32 %4, i32* %3
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigdelset(i32* %1, i32 21)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void show_help(void) {
  printf("Usage: %s [OPTION]\n\n    Print the full filename of the current "
         "working directory.\n\nOptions:\n    -h, --help\t\tdisplay this "
         "help\n    -V, --version\tdisplay version information\n\nReport bugs "
         "to <bulliver@gmail.com>\n",
         "pwd");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xfb0(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
lea    0xee9(%rip),%rdi
lea    0xfb4(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [210 x i8] c"Usage: %s [OPTION]\0A\0A Print the full filename of the current working directory.\0A\0AOptions:\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0AReport bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [4 x i8] c"pwd\00"
define void @show_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([210 x i8], [210 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [210 x i8] c"Usage: %s [OPTION]\0A\0A Print the full filename of the current working directory.\0A\0AOptions:\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0AReport bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [4 x i8] c"pwd\00"
define void @show_help() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([210 x i8], [210 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int exact_square(int num) {
  int i;
  for (i = 0; i < num; i++) {
    if (num == i * i)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114b <exact_square+0x4b>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
jne    1138 <exact_square+0x38>
movl   $0x1,-0x4(%rbp)
jmp    1152 <exact_square+0x52>
jmp    113d <exact_square+0x3d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <exact_square+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
xor    %eax,%eax
test   %edi,%edi
jle    1128 <exact_square+0x28>
cs nopw 0x0(%rax,%rax,1)
mov    %eax,%ecx
imul   %eax,%ecx
cmp    %edi,%ecx
je     1123 <exact_square+0x23>
add    $0x1,%eax
cmp    %eax,%edi
jne    1110 <exact_square+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = mul nsw i32 %11, %12
%14 = icmp eq i32 %10, %13
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 1, i32* %2
br label %21
16: ; preds = %9
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 0, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @exact_square(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 0, %1 ]
%7 = mul nsw i32 %6, %6
%8 = icmp eq i32 %7, %0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 0, %1 ], [ 0, %3 ], [ 1, %5 ]
ret i32 %11
}
int div2(int n) { return -1; }


x86 assembly (clang, -O0):
<div2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<div2>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @div2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @div2(i32 %0) {
ret i32 -1
}
/* Variables and functions */
unsigned int getMessagesForType(unsigned int, char *, int, char **);
unsigned int getFacts(unsigned int handle, char *sid, char **messages) {
  return getMessagesForType(handle, sid, 1, messages);
}


x86 assembly (clang, -O0):
<getFacts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0x1,%edx
call   1030 <getMessagesForType@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFacts>:
mov    %rdx,%rcx
mov    $0x1,%edx
jmp    1030 <getMessagesForType@plt>

LLVM IR (-O0):
define i32 @getFacts(i32 %0, i8* %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8**
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i8**, i8*** %6
%10 = call i32 @getMessagesForType(i32 %7, i8* %8, i32 1, i8** %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getFacts(i32 %0, i8* %1, i8** %2) {
%4 = tail call i32 @getMessagesForType(i32 %0, i8* %1, i32 1, i8** %2)
ret i32 %4
}
void bu_compile_not(args) struct conscell *args;
{
  int n = bu_compile_arg_list(args);
  if (n != 1)
    goto er;
  EMIT1ATM("NULL");
  EMITEND();
  return;
er:
  cerror("not: wrong # of args", args);
}


x86 assembly (clang, -O0):
<bu_compile_not>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <bu_compile_arg_list@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     1169 <bu_compile_not+0x29>
jmp    1183 <bu_compile_not+0x43>
lea    0xe90(%rip),%rdi
mov    $0x0,%al
call   1050 <EMIT1ATM@plt>
mov    $0x0,%al
call   1030 <EMITEND@plt>
jmp    1195 <bu_compile_not+0x55>
mov    -0x8(%rbp),%rsi
lea    0xe77(%rip),%rdi
mov    $0x0,%al
call   1060 <cerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bu_compile_not>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <bu_compile_arg_list@plt>
cmp    $0x1,%eax
jne    1166 <bu_compile_not+0x26>
lea    0xea9(%rip),%rdi
xor    %eax,%eax
call   1050 <EMIT1ATM@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <EMITEND@plt>
lea    0xe98(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1060 <cerror@plt>

LLVM IR (-O0):
%struct.conscell = type opaque
@.str = [5 x i8] c"NULL\00"
@.str.1 = [21 x i8] c"not: wrong # of args\00"
define void @bu_compile_not(%struct.conscell* %0) {
%2 = alloca %struct.conscell*
%3 = alloca i32
store %struct.conscell* %0, %struct.conscell** %2
%4 = load %struct.conscell*, %struct.conscell** %2
%5 = call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
br label %12
9: ; preds = %1
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @EMITEND()
br label %15
12: ; preds = %8
%13 = load %struct.conscell*, %struct.conscell** %2
%14 = call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %13)
br label %15
15: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
%struct.conscell = type opaque
@.str = [5 x i8] c"NULL\00"
@.str.1 = [21 x i8] c"not: wrong # of args\00"
define void @bu_compile_not(%struct.conscell* %0) {
%2 = tail call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %0)
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @EMITEND()
br label %9
7: ; preds = %1
%8 = tail call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %0)
br label %9
9: ; preds = %7, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _lightOS_sysLogCallBack(char *);
void sysLog(char *buffer) { _lightOS_sysLogCallBack(buffer); }


x86 assembly (clang, -O0):
<sysLog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_lightOS_sysLogCallBack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysLog>:
jmp    1030 <_lightOS_sysLogCallBack@plt>

LLVM IR (-O0):
define void @sysLog(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_lightOS_sysLogCallBack(i8* %3)
ret void
}

LLVM IR (-O2):
define void @sysLog(i8* %0) {
%2 = tail call i32 @_lightOS_sysLogCallBack(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ keccak_absorb(int /*<<< orphan*/ *, int,
                                 unsigned char const *, unsigned long long,
                                 int);
void shake256_absorb(uint64_t *s, const unsigned char *input,
                     unsigned long long inlen) {
  keccak_absorb(s, 136, input, inlen, 0x1F);
}


x86 assembly (clang, -O0):
<shake256_absorb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x88,%esi
mov    $0x1f,%r8d
call   1030 <keccak_absorb@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shake256_absorb>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    $0x88,%esi
mov    $0x1f,%r8d
jmp    1030 <keccak_absorb@plt>

LLVM IR (-O0):
define void @shake256_absorb(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @keccak_absorb(i32* %7, i32 136, i8* %8, i64 %9, i32 31)
ret void
}

LLVM IR (-O2):
define void @shake256_absorb(i32* %0, i8* %1, i64 %2) {
%4 = tail call i32 @keccak_absorb(i32* %0, i32 136, i8* %1, i64 %2, i32 31)
ret void
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int printargs_ld(struct tcb *);
int sys_epoll_create(struct tcb *tcp) { return printargs_ld(tcp); }


x86 assembly (clang, -O0):
<sys_epoll_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printargs_ld@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_epoll_create>:
jmp    1030 <printargs_ld@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define i32 @sys_epoll_create(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @printargs_ld(%struct.tcb* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define i32 @sys_epoll_create(%struct.tcb* %0) {
%2 = tail call i32 @printargs_ld(%struct.tcb* %0)
ret i32 %2
}
OP(ed, dd) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
scalar_t__ memory_free(void *, char *, int);
int /*<<< orphan*/ ring_clear(void *);
void ring_release(void **R) {
  ring_clear(*R);
  ((void)(memory_free((void *)(*R),
                      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                      "outputs/2022-01-22/02-19-57/repos/ASMlover/libc/refs/"
                      "heads/master/src/ring.c",
                      106),
          (*R) = 0));
}


x86 assembly (clang, -O0):
<ring_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1040 <ring_clear@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    0xeba(%rip),%rsi
mov    $0x6a,%edx
call   1030 <memory_free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ring_release>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1040 <ring_clear@plt>
mov    (%rbx),%rdi
lea    0xeca(%rip),%rsi
mov    $0x6a,%edx
call   1030 <memory_free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [133 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/ASMlover/libc/refs/heads/master/src/ring.c\00"
define void @ring_release(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @ring_clear(i8* %4)
%6 = load i8**, i8*** %2
%7 = load i8*, i8** %6
%8 = call i64 @memory_free(i8* %7, i8* getelementptr inbounds ([133 x i8], [133 x i8]* @.str, i64 0, i64 0), i32 106)
%9 = load i8**, i8*** %2
store i8* null, i8** %9
ret void
}

LLVM IR (-O2):
@.str = [133 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/ASMlover/libc/refs/heads/master/src/ring.c\00"
define void @ring_release(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @ring_clear(i8* %2)
%4 = load i8*, i8** %0
%5 = tail call i64 @memory_free(i8* %4, i8* getelementptr inbounds ([133 x i8], [133 x i8]* @.str, i64 0, i64 0), i32 106)
store i8* null, i8** %0
ret void
}
/* Type definitions */
struct RNAcofold_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_args(struct RNAcofold_args_info *);
int /*<<< orphan*/ clear_given(struct RNAcofold_args_info *);
int /*<<< orphan*/ init_args_info(struct RNAcofold_args_info *);
void RNAcofold_cmdline_parser_init(struct RNAcofold_args_info *args_info) {
  clear_given(args_info);
  clear_args(args_info);
  init_args_info(args_info);
}


x86 assembly (clang, -O0):
<RNAcofold_cmdline_parser_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <clear_given@plt>
mov    -0x8(%rbp),%rdi
call   1030 <clear_args@plt>
mov    -0x8(%rbp),%rdi
call   1050 <init_args_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAcofold_cmdline_parser_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <clear_given@plt>
mov    %rbx,%rdi
call   1030 <clear_args@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <init_args_info@plt>

LLVM IR (-O0):
%struct.RNAcofold_args_info = type { i32 }
define void @RNAcofold_cmdline_parser_init(%struct.RNAcofold_args_info* %0) {
%2 = alloca %struct.RNAcofold_args_info*
store %struct.RNAcofold_args_info* %0, %struct.RNAcofold_args_info** %2
%3 = load %struct.RNAcofold_args_info*, %struct.RNAcofold_args_info** %2
%4 = call i32 @clear_given(%struct.RNAcofold_args_info* %3)
%5 = load %struct.RNAcofold_args_info*, %struct.RNAcofold_args_info** %2
%6 = call i32 @clear_args(%struct.RNAcofold_args_info* %5)
%7 = load %struct.RNAcofold_args_info*, %struct.RNAcofold_args_info** %2
%8 = call i32 @init_args_info(%struct.RNAcofold_args_info* %7)
ret void
}

LLVM IR (-O2):
%struct.RNAcofold_args_info = type { i32 }
define void @RNAcofold_cmdline_parser_init(%struct.RNAcofold_args_info* %0) {
%2 = tail call i32 @clear_given(%struct.RNAcofold_args_info* %0)
%3 = tail call i32 @clear_args(%struct.RNAcofold_args_info* %0)
%4 = tail call i32 @init_args_info(%struct.RNAcofold_args_info* %0)
ret void
}
int forEachLoopMaxInteger(long max) {
  long sum = 0;
  for (long n = max; n > 0; n--) {
    double foo = n / 17;
    sum = sum + n;
  }
  return max;
}


x86 assembly (clang, -O0):
<forEachLoopMaxInteger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jle    1158 <forEachLoopMaxInteger+0x58>
mov    -0x18(%rbp),%rax
mov    $0x11,%ecx
cqto
idiv   %rcx
cvtsi2sd %rax,%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    1118 <forEachLoopMaxInteger+0x18>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<forEachLoopMaxInteger>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @forEachLoopMaxInteger(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca double
store i64 %0, i64* %2
store i64 0, i64* %3
%6 = load i64, i64* %2
store i64 %6, i64* %4
br label %7
7: ; preds = %17, %1
%8 = load i64, i64* %4
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i64, i64* %4
%12 = sdiv i64 %11, 17
%13 = sitofp i64 %12 to double
store double %13, double* %5
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = add nsw i64 %14, %15
store i64 %16, i64* %3
br label %17
17: ; preds = %10
%18 = load i64, i64* %4
%19 = add nsw i64 %18, -1
store i64 %19, i64* %4
br label %7
20: ; preds = %7
%21 = load i64, i64* %2
%22 = trunc i64 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @forEachLoopMaxInteger(i64 %0) {
%2 = trunc i64 %0 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *, ...);
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *ptr;
  if (size == 0)
    fatal("xmalloc: zero size");
  ptr = malloc(size);
  if (ptr == NULL)
    fatal("xmalloc: out of memory (allocating %zu bytes)", size);
  return ptr;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1145 <xmalloc+0x25>
lea    0xec2(%rip),%rdi
mov    $0x0,%al
call   1040 <fatal@plt>
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116f <xmalloc+0x4f>
mov    -0x8(%rbp),%rsi
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1040 <fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %rdi,%rdi
jne    113a <xmalloc+0x1a>
lea    0xecd(%rip),%rdi
xor    %eax,%eax
call   1040 <fatal@plt>
mov    %r14,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    115b <xmalloc+0x3b>
lea    0xec2(%rip),%rdi
mov    %r14,%rsi
xor    %eax,%eax
call   1040 <fatal@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [19 x i8] c"xmalloc: zero size\00"
@.str.1 = [46 x i8] c"xmalloc: out of memory (allocating %zu bytes)\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (i8*, ...) @fatal(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i64, i64* %2
%15 = call i32 (i8*, ...) @fatal(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0), i64 %14)
br label %16
16: ; preds = %13, %8
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@.str = [19 x i8] c"xmalloc: zero size\00"
@.str.1 = [46 x i8] c"xmalloc: out of memory (allocating %zu bytes)\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (i8*, ...) @fatal(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
%6 = tail call i8* @malloc(i64 %0)
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 (i8*, ...) @fatal(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0), i64 %0)
br label %10
10: ; preds = %8, %5
ret i8* %6
}
void do_ai_move(int side) {}


x86 assembly (clang, -O0):
<do_ai_move>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_ai_move>:
ret

LLVM IR (-O0):
define void @do_ai_move(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @do_ai_move(i32 %0) {
ret void
}
int owTouchBit(int portnum, int sendbit) { return 0; }


x86 assembly (clang, -O0):
<owTouchBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<owTouchBit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @owTouchBit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @owTouchBit(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ isgraph(int);
void uninitvar_isgraph(void) {
  int i;
  (void)isgraph(i);
}


x86 assembly (clang, -O0):
<uninitvar_isgraph>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_isgraph>:
ret

LLVM IR (-O0):
define void @uninitvar_isgraph() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = call i32 @isgraph(i32 %2)
ret void
}

LLVM IR (-O2):
define void @uninitvar_isgraph() {
ret void
}
/* Variables and functions */
int fc8080_audio_deselect(void *, unsigned char, unsigned char);
int bbm_com_audio_deselect(void *handle, unsigned char subch_id,
                           unsigned char buf_id) {
  int res;
  res = fc8080_audio_deselect(handle, subch_id, buf_id);
  return res;
}


x86 assembly (clang, -O0):
<bbm_com_audio_deselect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%al
movzbl %al,%esi
movzbl -0xa(%rbp),%edx
call   1030 <fc8080_audio_deselect@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbm_com_audio_deselect>:
jmp    1030 <fc8080_audio_deselect@plt>

LLVM IR (-O0):
define i32 @bbm_com_audio_deselect(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
%9 = load i8, i8* %5
%10 = load i8, i8* %6
%11 = call i32 @fc8080_audio_deselect(i8* %8, i8 zeroext %9, i8 zeroext %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @bbm_com_audio_deselect(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = tail call i32 @fc8080_audio_deselect(i8* %0, i8 zeroext %1, i8 zeroext %2)
ret i32 %4
}
int test_imm_F5uint16_reg(unsigned short val) {
  return ((val) & (0xF5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F5uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xf5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F5uint16_reg>:
test   $0xf5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F5uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 245
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F5uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 245
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xff() {
  Assert_real((isprint(255) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1280, ("isprint should be 0 for 0xff"));
}


x86 assembly (clang, -O0):
<t_isprint_0xff>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x500,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xff>:
push   %rax
mov    $0xff,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x500,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xff\00"
define void @t_isprint_0xff() {
%1 = call i64 @isprint(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xff\00"
define void @t_isprint_0xff() {
%1 = tail call i64 @isprint(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
unsigned long bar();
int main() {
  unsigned long nStyle = bar();
  if (nStyle & 32768)
    nStyle |= 65536;
  if (nStyle != (32768 | 65536))
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <bar@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x8000,%rax
cmp    $0x0,%rax
je     115c <main+0x3c>
mov    -0x10(%rbp),%rax
or     $0x10000,%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x18000,-0x10(%rbp)
je     1171 <main+0x51>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <bar@plt>
lea    (%rax,%rax,1),%ecx
and    $0x10000,%ecx
or     %rax,%rcx
cmp    $0x18000,%rcx
jne    1141 <main+0x21>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = call i64 (...) @bar()
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 32768
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i64, i64* %2
%9 = or i64 %8, 65536
store i64 %9, i64* %2
br label %10
10: ; preds = %7, %0
%11 = load i64, i64* %2
%12 = icmp ne i64 %11, 98304
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %10
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @bar()
%2 = shl i64 %1, 1
%3 = and i64 %2, 65536
%4 = or i64 %3, %1
%5 = icmp eq i64 %4, 98304
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %0
ret i32 0
}
void *get_origin_addr(void *addr) { return addr - sizeof(int); }


x86 assembly (clang, -O0):
<get_origin_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xfffffffffffffffc,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_origin_addr>:
lea    -0x4(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @get_origin_addr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 -4
ret i8* %4
}

LLVM IR (-O2):
define i8* @get_origin_addr(i8* readnone %0) {
%2 = getelementptr i8, i8* %0, i64 -4
ret i8* %2
}
void *test_anti_range_140(int n) {
  extern void *alloc_anti_range_140(int) __attribute__((alloc_size(1)));
  if (-1 <= n && n <= 2)
    n = -1 - 1;
  return alloc_anti_range_140(n);
}


x86 assembly (clang, -O0):
<test_anti_range_140>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
cmp    -0x4(%rbp),%eax
jg     113a <test_anti_range_140+0x2a>
cmpl   $0x2,-0x4(%rbp)
jg     113a <test_anti_range_140+0x2a>
movl   $0xfffffffe,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloc_anti_range_140@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_140>:
lea    0x1(%rdi),%eax
cmp    $0x4,%eax
mov    $0xfffffffe,%eax
cmovb  %eax,%edi
jmp    1030 <alloc_anti_range_140@plt>

LLVM IR (-O0):
define i8* @test_anti_range_140(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 -1, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %5
store i32 -2, i32* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i32, i32* %2
%11 = call i8* @alloc_anti_range_140(i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_140(i32 %0) {
%2 = add i32 %0, 1
%3 = icmp ult i32 %2, 4
%4 = select i1 %3, i32 -2, i32 %0
%5 = tail call i8* @alloc_anti_range_140(i32 %4)
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ mqd_t;

/* Variables and functions */
int syscall(int, int /*<<< orphan*/);
int mq_close(mqd_t mqd) { return syscall(6, mqd); }


x86 assembly (clang, -O0):
<mq_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x6,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mq_close>:
mov    %edi,%esi
mov    $0x6,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @mq_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @syscall(i32 6, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mq_close(i32 %0) {
%2 = tail call i32 @syscall(i32 6, i32 %0)
ret i32 %2
}
void RTLockValidatorRecExclCheckBlocking(void) {}


x86 assembly (clang, -O0):
<RTLockValidatorRecExclCheckBlocking>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLockValidatorRecExclCheckBlocking>:
ret

LLVM IR (-O0):
define void @RTLockValidatorRecExclCheckBlocking() {
ret void
}

LLVM IR (-O2):
define void @RTLockValidatorRecExclCheckBlocking() {
ret void
}
double test1(double x) { return __builtin_pow(x, 1. / 3.); }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
movsd  0xee8(%rip),%xmm1
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @test1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @pow(double %3, double 0x3FD5555555555555)
ret double %4
}

LLVM IR (-O2):
define double @test1(double %0) {
%2 = tail call double @pow(double %0, double 0x3FD5555555555555)
ret double %2
}
/* Variables and functions */
unsigned long long clock();
unsigned long long clock_start(void) { return clock(); }


x86 assembly (clang, -O0):
<clock_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_start>:
xor    %eax,%eax
jmp    1030 <clock@plt>

LLVM IR (-O0):
define i64 @clock_start() {
%1 = call i64 (...) @clock()
ret i64 %1
}

LLVM IR (-O2):
define i64 @clock_start() {
%1 = tail call i64 (...) @clock()
ret i64 %1
}
int gt(double a, double b) { return a > b; }


x86 assembly (clang, -O0):
<gt>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt>:
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @gt(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @gt(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __emit_expression_range(int /*<<< orphan*/, int);
void test_logical_operators(int lhs, int rhs) {
  __emit_expression_range(0, lhs && rhs);
  __emit_expression_range(0, lhs || rhs);
}


x86 assembly (clang, -O0):
<test_logical_operators>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     1137 <test_logical_operators+0x27>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%esi
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0xa(%rbp)
jne    115f <test_logical_operators+0x4f>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
and    $0x1,%al
movzbl %al,%esi
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_logical_operators>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
test   %edi,%edi
setne  %al
test   %esi,%esi
setne  %cl
and    %al,%cl
movzbl %cl,%esi
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
xor    %esi,%esi
or     %ebp,%ebx
setne  %sil
xor    %edi,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <__emit_expression_range@plt>

LLVM IR (-O0):
define void @test_logical_operators(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @__emit_expression_range(i32 0, i32 %12)
%14 = load i32, i32* %3
%15 = icmp ne i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %10
%17 = load i32, i32* %4
%18 = icmp ne i32 %17, 0
br label %19
19: ; preds = %16, %10
%20 = phi i1 [ true, %10 ], [ %18, %16 ]
%21 = zext i1 %20 to i32
%22 = call i32 @__emit_expression_range(i32 0, i32 %21)
ret void
}

LLVM IR (-O2):
define void @test_logical_operators(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
%4 = icmp ne i32 %1, 0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @__emit_expression_range(i32 0, i32 %6)
%8 = or i32 %1, %0
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @__emit_expression_range(i32 0, i32 %10)
ret void
}
int do_826() { return 826; }


x86 assembly (clang, -O0):
<do_826>:
push   %rbp
mov    %rsp,%rbp
mov    $0x33a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_826>:
mov    $0x33a,%eax
ret

LLVM IR (-O0):
define i32 @do_826() {
ret i32 826
}

LLVM IR (-O2):
define i32 @do_826() {
ret i32 826
}
void only_init() { ; }


x86 assembly (clang, -O0):
<only_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<only_init>:
ret

LLVM IR (-O0):
define void @only_init() {
ret void
}

LLVM IR (-O2):
define void @only_init() {
ret void
}
char *herwig6_addressc_(char *arg) { return arg; }


x86 assembly (clang, -O0):
<herwig6_addressc_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<herwig6_addressc_>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @herwig6_addressc_(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @herwig6_addressc_(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int strlen(char *);
scalar_t__ wRealloc(void *, int);
char *wCharConcat(char *dst, char *src) {
  int dstLen, srcLen;
  dstLen = strlen(dst);
  srcLen = strlen(src);
  dst = (char *)wRealloc((void *)dst, dstLen + srcLen + 2);
  strcat(dst, src);
  return dst;
}


x86 assembly (clang, -O0):
<wCharConcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    -0x18(%rbp),%esi
add    $0x2,%esi
call   1040 <wRealloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strcat@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wCharConcat>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%r15d
mov    %r14,%rdi
call   1030 <strlen@plt>
lea    (%r15,%rax,1),%esi
add    $0x2,%esi
mov    %rbx,%rdi
call   1040 <wRealloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1050 <strcat@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @wCharConcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %4
%10 = call i32 @strlen(i8* %9)
store i32 %10, i32* %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = add nsw i32 %14, 2
%16 = call i64 @wRealloc(i8* %11, i32 %15)
%17 = inttoptr i64 %16 to i8*
store i8* %17, i8** %3
%18 = load i8*, i8** %3
%19 = load i8*, i8** %4
%20 = call i32 @strcat(i8* %18, i8* %19)
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @wCharConcat(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = add i32 %3, 2
%6 = add i32 %5, %4
%7 = tail call i64 @wRealloc(i8* %0, i32 %6)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @strcat(i8* %8, i8* %1)
ret i8* %8
}
int schedee_priority_reverse(struct schedee *s) { return 0; }


x86 assembly (clang, -O0):
<schedee_priority_reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<schedee_priority_reverse>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.schedee = type opaque
define i32 @schedee_priority_reverse(%struct.schedee* %0) {
%2 = alloca %struct.schedee*
store %struct.schedee* %0, %struct.schedee** %2
ret i32 0
}

LLVM IR (-O2):
%struct.schedee = type opaque
define i32 @schedee_priority_reverse(%struct.schedee* nocapture readnone %0) {
ret i32 0
}
int entity_func2() { return 9; }


x86 assembly (clang, -O0):
<entity_func2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<entity_func2>:
mov    $0x9,%eax
ret

LLVM IR (-O0):
define i32 @entity_func2() {
ret i32 9
}

LLVM IR (-O2):
define i32 @entity_func2() {
ret i32 9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int compareStrings(const char *s1, const char *s2);
  printf("%i", compareStrings("hello", "hall"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xecd(%rip),%rdi
lea    0xecc(%rip),%rsi
call   1030 <compareStrings@plt>
mov    %eax,%esi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedb(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <compareStrings@plt>
lea    0xec5(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
@.str.1 = [6 x i8] c"hello\00"
@.str.2 = [5 x i8] c"hall\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @compareStrings(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
@.str.1 = [6 x i8] c"hello\00"
@.str.2 = [5 x i8] c"hall\00"
define i32 @main() {
%1 = tail call i32 @compareStrings(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Keccak(int, int, unsigned char const *, unsigned int, int,
                          unsigned char *, int);
void FIPS202_SHA3_224(const unsigned char *input, unsigned int inputByteLen,
                      unsigned char *output) {
  Keccak(1152, 448, input, inputByteLen, 0x06, output, 28);
}


x86 assembly (clang, -O0):
<FIPS202_SHA3_224>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%r9
mov    $0x480,%edi
mov    $0x1c0,%esi
mov    $0x6,%r8d
movl   $0x1c,(%rsp)
call   1030 <Keccak@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FIPS202_SHA3_224>:
push   %rax
mov    %rdx,%r9
mov    %esi,%ecx
mov    %rdi,%rdx
movl   $0x1c,(%rsp)
mov    $0x480,%edi
mov    $0x1c0,%esi
mov    $0x6,%r8d
call   1030 <Keccak@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @FIPS202_SHA3_224(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @Keccak(i32 1152, i32 448, i8* %7, i32 %8, i32 6, i8* %9, i32 28)
ret void
}

LLVM IR (-O2):
define void @FIPS202_SHA3_224(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @Keccak(i32 1152, i32 448, i8* %0, i32 %1, i32 6, i8* %2, i32 28)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ find_one(char *);
void find_one_index_medium_test() {
  find_one("benchmarks"
           ".index.medium");
}


x86 assembly (clang, -O0):
<find_one_index_medium_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <find_one@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_one_index_medium_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <find_one@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"benchmarks.index.medium\00"
define void @find_one_index_medium_test() {
%1 = call i32 @find_one(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"benchmarks.index.medium\00"
define void @find_one_index_medium_test() {
%1 = tail call i32 @find_one(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}