xunge/DecIR huggingface dataset:
int squashfs3_1_0_supported(struct squashfs3_sb_info *msblk) { return 0; }


x86 assembly (clang, -O0):
<squashfs3_1_0_supported>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<squashfs3_1_0_supported>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.squashfs3_sb_info = type opaque
define i32 @squashfs3_1_0_supported(%struct.squashfs3_sb_info* %0) {
%2 = alloca %struct.squashfs3_sb_info*
store %struct.squashfs3_sb_info* %0, %struct.squashfs3_sb_info** %2
ret i32 0
}

LLVM IR (-O2):
%struct.squashfs3_sb_info = type opaque
define i32 @squashfs3_1_0_supported(%struct.squashfs3_sb_info* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct i2c_msg {
  size_t len;
  int /*<<< orphan*/ *buf;
};

/* Variables and functions */
int /*<<< orphan*/ i2c_smbus_msg_pec(int /*<<< orphan*/, struct i2c_msg *);
void i2c_smbus_add_pec(struct i2c_msg *msg) {
  msg->buf[msg->len] = i2c_smbus_msg_pec(0, msg);
  msg->len++;
}


x86 assembly (clang, -O0):
<i2c_smbus_add_pec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <i2c_smbus_msg_pec@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_add_pec>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
mov    %rbx,%rsi
call   1030 <i2c_smbus_msg_pec@plt>
mov    (%rbx),%rcx
mov    0x8(%rbx),%rdx
mov    %eax,(%rdx,%rcx,4)
add    $0x1,%rcx
mov    %rcx,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.i2c_msg = type { i64, i32* }
define void @i2c_smbus_add_pec(%struct.i2c_msg* %0) {
%2 = alloca %struct.i2c_msg*
store %struct.i2c_msg* %0, %struct.i2c_msg** %2
%3 = load %struct.i2c_msg*, %struct.i2c_msg** %2
%4 = call i32 @i2c_smbus_msg_pec(i32 0, %struct.i2c_msg* %3)
%5 = load %struct.i2c_msg*, %struct.i2c_msg** %2
%6 = getelementptr inbounds %struct.i2c_msg, %struct.i2c_msg* %5, i32 0, i32 1
%7 = load i32*, i32** %6
%8 = load %struct.i2c_msg*, %struct.i2c_msg** %2
%9 = getelementptr inbounds %struct.i2c_msg, %struct.i2c_msg* %8, i32 0, i32 0
%10 = load i64, i64* %9
%11 = getelementptr inbounds i32, i32* %7, i64 %10
store i32 %4, i32* %11
%12 = load %struct.i2c_msg*, %struct.i2c_msg** %2
%13 = getelementptr inbounds %struct.i2c_msg, %struct.i2c_msg* %12, i32 0, i32 0
%14 = load i64, i64* %13
%15 = add i64 %14, 1
store i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
%struct.i2c_msg = type { i64, i32* }
define void @i2c_smbus_add_pec(%struct.i2c_msg* %0) {
%2 = tail call i32 @i2c_smbus_msg_pec(i32 0, %struct.i2c_msg* %0)
%3 = getelementptr inbounds %struct.i2c_msg, %struct.i2c_msg* %0, i64 0, i32 1
%4 = load i32*, i32** %3
%5 = getelementptr inbounds %struct.i2c_msg, %struct.i2c_msg* %0, i64 0, i32 0
%6 = load i64, i64* %5
%7 = getelementptr inbounds i32, i32* %4, i64 %6
store i32 %2, i32* %7
%8 = add i64 %6, 1
store i64 %8, i64* %5
ret void
}
int fork() {
  int int_num = 0;
  int tmp;
  __asm__("int $0x80" : "=a"(tmp) : "a"(int_num));
  return tmp;
}


x86 assembly (clang, -O0):
<fork>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
int    $0x80
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork>:
xor    %eax,%eax
int    $0x80
ret

LLVM IR (-O0):
define i32 @fork() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %1
%4 = call i32 asm "int $$0x80", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @fork() {
%1 = tail call i32 asm "int $$0x80", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret i32 %1
}
void disable_interrupts(void) { __asm__ __volatile("cli"); }


x86 assembly (clang, -O0):
<disable_interrupts>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_interrupts>:
cli
ret

LLVM IR (-O0):
define void @disable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @disable_interrupts() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ mapfilter_convport(int /*<<< orphan*/);
uint16_t SFilter_MapPort(uint16_t port) { return mapfilter_convport(port); }


x86 assembly (clang, -O0):
<SFilter_MapPort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <mapfilter_convport@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SFilter_MapPort>:
jmp    1030 <mapfilter_convport@plt>

LLVM IR (-O0):
define i32 @SFilter_MapPort(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @mapfilter_convport(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @SFilter_MapPort(i32 %0) {
%2 = tail call i32 @mapfilter_convport(i32 %0)
ret i32 %2
}
/* Variables and functions */
int dwarf_get_DSC_name(unsigned int, char const **);
char const *ellipname(int, unsigned int, char const *, char *, int);
const char *get_DSC_name(unsigned int val_in, int printonerr) {
  const char *v = 0;
  int res = dwarf_get_DSC_name(val_in, &v);
  return ellipname(res, val_in, v, "DSC", printonerr);
}


x86 assembly (clang, -O0):
<get_DSC_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1040 <dwarf_get_DSC_name@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%r8d
lea    0xea6(%rip),%rcx
call   1030 <ellipname@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_DSC_name>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
movq   $0x0,(%rsp)
mov    %rsp,%rsi
call   1040 <dwarf_get_DSC_name@plt>
mov    (%rsp),%rdx
lea    0xebe(%rip),%rcx
mov    %eax,%edi
mov    %ebp,%esi
mov    %ebx,%r8d
call   1030 <ellipname@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"DSC\00"
define i8* @get_DSC_name(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i8* null, i8** %5
%7 = load i32, i32* %3
%8 = call i32 @dwarf_get_DSC_name(i32 %7, i8** %5)
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = load i32, i32* %3
%11 = load i8*, i8** %5
%12 = load i32, i32* %4
%13 = call i8* @ellipname(i32 %9, i32 %10, i8* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %12)
ret i8* %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"DSC\00"
define i8* @get_DSC_name(i32 %0, i32 %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
store i8* null, i8** %3
%5 = call i32 @dwarf_get_DSC_name(i32 %0, i8** %3)
%6 = load i8*, i8** %3
%7 = call i8* @ellipname(i32 %5, i32 %0, i8* %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i8* %7
}
long double fminl(long double x, long double y) { return (x < y) ? x : y; }


x86 assembly (clang, -O0):
<fminl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fucomip %st(1),%st
fstp   %st(0)
jbe    1130 <fminl+0x30>
jmp    1125 <fminl+0x25>
fldt   -0x10(%rbp)
fstpt  -0x2c(%rbp)
jmp    1136 <fminl+0x36>
fldt   -0x20(%rbp)
fstpt  -0x2c(%rbp)
fldt   -0x2c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fminl>:
fldt   0x8(%rsp)
fldt   0x18(%rsp)
fucomi %st(1),%st
fcmovnbe %st(1),%st
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fminl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = fcmp olt x86_fp80 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load x86_fp80, x86_fp80* %3
br label %12
10: ; preds = %2
%11 = load x86_fp80, x86_fp80* %4
br label %12
12: ; preds = %10, %8
%13 = phi x86_fp80 [ %9, %8 ], [ %11, %10 ]
ret x86_fp80 %13
}

LLVM IR (-O2):
define x86_fp80 @fminl(x86_fp80 %0, x86_fp80 %1) {
%3 = fcmp olt x86_fp80 %0, %1
%4 = select i1 %3, x86_fp80 %0, x86_fp80 %1
ret x86_fp80 %4
}
/* Variables and functions */
int rand();
int getRandomInRange(int minimum_number, int max_number) {
  return rand() % (max_number + 1 - minimum_number) + minimum_number;
}


x86 assembly (clang, -O0):
<getRandomInRange>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRandomInRange>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getRandomInRange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @getRandomInRange(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
int xo_syslog_handle_flush(void *opaque __attribute__((__unused__))) {
  return 0;
}


x86 assembly (clang, -O0):
<xo_syslog_handle_flush>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xo_syslog_handle_flush>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xo_syslog_handle_flush(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @xo_syslog_handle_flush(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *gmtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
struct tm *time___new_Tm_gmtime___impl() {
  struct tm *tm;
  time_t t = time(NULL);
  tm = gmtime(&t);
  return tm;
}


x86 assembly (clang, -O0):
<time___new_Tm_gmtime___impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <gmtime@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time___new_Tm_gmtime___impl>:
push   %rax
xor    %edi,%edi
call   1030 <time@plt>
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1040 <gmtime@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define %struct.tm* @time___new_Tm_gmtime___impl() {
%1 = alloca %struct.tm*
%2 = alloca i32
%3 = call i32 @time(i32* null)
store i32 %3, i32* %2
%4 = call %struct.tm* @gmtime(i32* %2)
store %struct.tm* %4, %struct.tm** %1
%5 = load %struct.tm*, %struct.tm** %1
ret %struct.tm* %5
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define %struct.tm* @time___new_Tm_gmtime___impl() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @gmtime(i32* %1)
ret %struct.tm* %4
}
int test_imm_5Bint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x5B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Bint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x5b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Bint64_midword_mem>:
testb  $0x5b,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Bint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 91
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Bint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5963776
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
float ColorTableGreen(float c) {
  if (c < 0.33)
    return c / 0.33;
  if (c < 0.67)
    return 1.0;
  return 1.0 - (c - 0.67) / (1.0 - 0.67);
}


x86 assembly (clang, -O0):
<ColorTableGreen>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1147 <ColorTableGreen+0x47>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xecb(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11aa <ColorTableGreen+0xaa>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeb0(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1174 <ColorTableGreen+0x74>
movss  0xeb6(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    11aa <ColorTableGreen+0xaa>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xe83(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xe87(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xe73(%rip),%xmm0
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ColorTableGreen>:
cvtss2sd %xmm0,%xmm0
movsd  0xef4(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    111f <ColorTableGreen+0x1f>
divsd  0xee6(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret
movsd  0xee1(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    1136 <ColorTableGreen+0x36>
movss  0xef3(%rip),%xmm0
ret
addsd  0xed2(%rip),%xmm0
divsd  0xed2(%rip),%xmm0
addsd  0xed2(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @ColorTableGreen(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = fcmp olt double %5, 3.300000e-01
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load float, float* %3
%9 = fpext float %8 to double
%10 = fdiv double %9, 3.300000e-01
%11 = fptrunc double %10 to float
store float %11, float* %2
br label %24
12: ; preds = %1
%13 = load float, float* %3
%14 = fpext float %13 to double
%15 = fcmp olt double %14, 6.700000e-01
br i1 %15, label %16, label %17
16: ; preds = %12
store float 1.000000e+00, float* %2
br label %24
17: ; preds = %12
%18 = load float, float* %3
%19 = fpext float %18 to double
%20 = fsub double %19, 6.700000e-01
%21 = fdiv double %20, 0x3FD51EB851EB851E
%22 = fsub double 1.000000e+00, %21
%23 = fptrunc double %22 to float
store float %23, float* %2
br label %24
24: ; preds = %17, %16, %7
%25 = load float, float* %2
ret float %25
}

LLVM IR (-O2):
define float @ColorTableGreen(float %0) {
%2 = fpext float %0 to double
%3 = fcmp olt double %2, 3.300000e-01
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = fdiv double %2, 3.300000e-01
%6 = fptrunc double %5 to float
br label %14
7: ; preds = %1
%8 = fcmp olt double %2, 6.700000e-01
br i1 %8, label %14, label %9
9: ; preds = %7
%10 = fadd double %2, -6.700000e-01
%11 = fdiv double %10, 0x3FD51EB851EB851E
%12 = fsub double 1.000000e+00, %11
%13 = fptrunc double %12 to float
br label %14
14: ; preds = %7, %9, %4
%15 = phi float [ %6, %4 ], [ %13, %9 ], [ 1.000000e+00, %7 ]
ret float %15
}
int main() {
  unsigned char a = 3;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0x3,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 3, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 3
}
int argsparse_init(int *arg_idx) {
  *arg_idx = 1;
  return 0;
}


x86 assembly (clang, -O0):
<argsparse_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<argsparse_init>:
movl   $0x1,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @argsparse_init(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 1, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @argsparse_init(i32* nocapture writeonly %0) {
store i32 1, i32* %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void tputs(char *string, int nlines, int (*outfun)()) { fputs(string, stdout); }


x86 assembly (clang, -O0):
<tputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tputs>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @tputs(i8* %0, i32 %1, i32 (...)* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32 (...)*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 (...)* %2, i32 (...)** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* @stdout
%9 = call i32 @fputs(i8* %7, i32 %8)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @tputs(i8* %0, i32 %1, i32 (...)* nocapture readnone %2) {
%4 = load i32, i32* @stdout
%5 = tail call i32 @fputs(i8* %0, i32 %4)
ret void
}
int test_imm_16uint8_reg(unsigned char val) {
  return ((val) & (0x16 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_16uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x16,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_16uint8_reg>:
test   $0x16,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_16uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 22
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_16uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 22
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  int nResult;
  int b = 0;
  int i = -1;
  do {
    if (b != 0) {
      abort();
      nResult = 1;
    } else {
      nResult = 0;
    }
    i++;
    b = (i + 2) * 4;
  } while (i < 0);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0xffffffff,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114e <main+0x2e>
mov    $0x0,%al
call   1030 <abort@plt>
movl   $0x0,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x2,%eax
shl    $0x2,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     113d <main+0x1d>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 -1, i32* %4
br label %5
5: ; preds = %17, %0
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %5
store i32 0, i32* %2
br label %11
11: ; preds = %10
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
store i32 %13, i32* %4
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 2
%16 = mul nsw i32 %15, 4
store i32 %16, i32* %3
br label %17
17: ; preds = %11
%18 = load i32, i32* %4
%19 = icmp slt i32 %18, 0
br i1 %19, label %5, label %20
20: ; preds = %17
%21 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
void e53toasc(x, string, ndigs) unsigned short x[];
char *string;
int ndigs;
{
  unsigned short w[(6 + 3)];
  e53toe(x, w);
  etoasc(w, string, ndigs);
}


x86 assembly (clang, -O0):
<e53toasc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x30(%rbp),%rsi
mov    $0x0,%al
call   1040 <e53toe@plt>
lea    -0x30(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x0,%al
call   1030 <etoasc@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e53toasc>:
push   %rbp
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rsp,%r14
mov    %r14,%rsi
xor    %eax,%eax
call   1040 <e53toe@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
xor    %eax,%eax
call   1030 <etoasc@plt>
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @e53toasc(i16* %0, i8* %1, i32 %2) {
%4 = alloca i16*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [9 x i16]
store i16* %0, i16** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i16*, i16** %4
%9 = getelementptr inbounds [9 x i16], [9 x i16]* %7, i64 0, i64 0
%10 = call i32 (i16*, i16*, ...) bitcast (i32 (...)* @e53toe to i32 (i16*, i16*, ...)*)(i16* %8, i16* %9)
%11 = getelementptr inbounds [9 x i16], [9 x i16]* %7, i64 0, i64 0
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
%14 = call i32 (i16*, i8*, i32, ...) bitcast (i32 (...)* @etoasc to i32 (i16*, i8*, i32, ...)*)(i16* %11, i8* %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @e53toasc(i16* %0, i8* %1, i32 %2) {
%4 = alloca [9 x i16]
%5 = bitcast [9 x i16]* %4 to i8*
%6 = getelementptr inbounds [9 x i16], [9 x i16]* %4, i64 0, i64 0
%7 = call i32 (i16*, i16*, ...) bitcast (i32 (...)* @e53toe to i32 (i16*, i16*, ...)*)(i16* %0, i16* %6)
%8 = call i32 (i16*, i8*, i32, ...) bitcast (i32 (...)* @etoasc to i32 (i16*, i8*, i32, ...)*)(i16* %6, i8* %1, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void fputi(int x, int nbytes, FILE *f) {
  for (int i = 0; i < nbytes; i++) {
    fputc((x >> (i << 3)) & 0xFF, f);
  }
}


x86 assembly (clang, -O0):
<fputi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115d <fputi+0x4d>
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%ecx
shl    $0x3,%ecx
sar    %cl,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1129 <fputi+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputi>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %esi,%esi
jle    114a <fputi+0x3a>
mov    %rdx,%r14
mov    %esi,%ebp
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r15d,%eax
mov    %ebx,%ecx
sar    %cl,%eax
movzbl %al,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
add    $0x8,%ebx
add    $0xffffffff,%ebp
jne    1130 <fputi+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @fputi(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
store i32 0, i32* %7
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %5
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %7
%15 = shl i32 %14, 3
%16 = ashr i32 %13, %15
%17 = and i32 %16, 255
%18 = load i32*, i32** %6
%19 = call i32 @fputc(i32 %17, i32* %18)
br label %20
20: ; preds = %12
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @fputi(i32 %0, i32 %1, i32* nocapture %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %6, label %5
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i32 [ %12, %6 ], [ 0, %3 ]
%8 = shl i32 %7, 3
%9 = ashr i32 %0, %8
%10 = and i32 %9, 255
%11 = tail call i32 @fputc(i32 %10, i32* %2)
%12 = add nuw nsw i32 %7, 1
%13 = icmp eq i32 %12, %1
br i1 %13, label %5, label %6
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ portable_snprintf(char *, int, char *, char const *,
                                     char const *);
void output_system_error(const char *s1, const char *s2) {
  char buf[0x100];
  portable_snprintf(buf, 0x100, "%s: %s", s1, s2);
  perror(buf);
}


x86 assembly (clang, -O0):
<output_system_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
mov    $0x100,%esi
lea    0xeb2(%rip),%rdx
call   1030 <portable_snprintf@plt>
lea    -0x110(%rbp),%rdi
call   1040 <perror@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_system_error>:
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%r8
mov    %rdi,%rcx
lea    0xecb(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x100,%esi
call   1030 <portable_snprintf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%s: %s\00"
define void @output_system_error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i32 @portable_snprintf(i8* %6, i32 256, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8)
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%11 = call i32 @perror(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s: %s\00"
define void @output_system_error(i8* %0, i8* %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @portable_snprintf(i8* %4, i32 256, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = call i32 @perror(i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ segment_lcd_data(unsigned long, int);
void clear_digit(unsigned long int digit) {
  digit *= 2;
  segment_lcd_data(digit, 0x0);
  segment_lcd_data(digit + 1, 0x0);
}


x86 assembly (clang, -O0):
<clear_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <segment_lcd_data@plt>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
xor    %esi,%esi
call   1030 <segment_lcd_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_digit>:
push   %rbx
mov    %rdi,%rbx
add    %rdi,%rdi
xor    %esi,%esi
call   1030 <segment_lcd_data@plt>
lea    (%rbx,%rbx,1),%rdi
add    $0x1,%rdi
xor    %esi,%esi
pop    %rbx
jmp    1030 <segment_lcd_data@plt>

LLVM IR (-O0):
define void @clear_digit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 2
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = call i32 @segment_lcd_data(i64 %5, i32 0)
%7 = load i64, i64* %2
%8 = add i64 %7, 1
%9 = call i32 @segment_lcd_data(i64 %8, i32 0)
ret void
}

LLVM IR (-O2):
define void @clear_digit(i64 %0) {
%2 = shl i64 %0, 1
%3 = tail call i32 @segment_lcd_data(i64 %2, i32 0)
%4 = or i64 %2, 1
%5 = tail call i32 @segment_lcd_data(i64 %4, i32 0)
ret void
}
OP(fd, c4) { op_c4(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_c4@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_c4@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_c4()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_c4()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char *);
void *genstatefn(char *fn, char *devid) {
  snprintf(fn, 64, "%s-%s", "/var/spool/tracerstat", devid);
}


x86 assembly (clang, -O0):
<genstatefn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%r8
mov    $0x40,%esi
lea    0xecc(%rip),%rdx
lea    0xecb(%rip),%rcx
call   1030 <snprintf@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genstatefn>:
mov    %rsi,%r8
lea    0xee6(%rip),%rdx
lea    0xee5(%rip),%rcx
mov    $0x40,%esi
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s-%s\00"
@.str.1 = [22 x i8] c"/var/spool/tracerstat\00"
define i8* @genstatefn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i32 @snprintf(i8* %6, i32 64, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i8* %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s-%s\00"
@.str.1 = [22 x i8] c"/var/spool/tracerstat\00"
define noalias i8* @genstatefn(i8* %0, i8* %1) {
%3 = tail call i32 @snprintf(i8* %0, i32 64, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret i8* undef
}
/* Variables and functions */
double atan(double);
double Alpha(double Rt, double x, int n) {
  return atan(2.0 * Rt * x / (1.5e8 * ((double)n - 1.0)));
}


x86 assembly (clang, -O0):
<Alpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
movsd  0xee3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
cvtsi2sdl -0x14(%rbp),%xmm2
movsd  0xec4(%rip),%xmm1
subsd  %xmm1,%xmm2
movsd  0xeb0(%rip),%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
call   1030 <atan@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Alpha>:
addsd  %xmm0,%xmm0
cvtsi2sd %edi,%xmm2
addsd  0xee0(%rip),%xmm2
mulsd  %xmm1,%xmm0
mulsd  0xedc(%rip),%xmm2
divsd  %xmm2,%xmm0
jmp    1030 <atan@plt>

LLVM IR (-O0):
define double @Alpha(double %0, double %1, i32 %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca i32
store double %0, double* %4
store double %1, double* %5
store i32 %2, i32* %6
%7 = load double, double* %4
%8 = fmul double 2.000000e+00, %7
%9 = load double, double* %5
%10 = fmul double %8, %9
%11 = load i32, i32* %6
%12 = sitofp i32 %11 to double
%13 = fsub double %12, 1.000000e+00
%14 = fmul double 1.500000e+08, %13
%15 = fdiv double %10, %14
%16 = call double @atan(double %15)
ret double %16
}

LLVM IR (-O2):
define double @Alpha(double %0, double %1, i32 %2) {
%4 = fmul double %0, 2.000000e+00
%5 = fmul double %4, %1
%6 = sitofp i32 %2 to double
%7 = fadd double %6, -1.000000e+00
%8 = fmul double %7, 1.500000e+08
%9 = fdiv double %5, %8
%10 = tail call double @atan(double %9)
ret double %10
}
/* Variables and functions */
int fn_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(
    char const *);
int fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(
    const char *text) {
  int pos = 0;
  pos =
      fn_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(
          text);
  if (pos != -1)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fn_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1144 <fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102>:
jmp    1030 <fn_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102@plt>

LLVM IR (-O0):
define i32 @fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @fn_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @fn_al_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(i8* %0) {
%2 = tail call i32 @fn_sq_ch_68_ch_97_ch_116_ch_97_ch_67_ch_111_ch_109_ch_112_ch_108_ch_101_ch_109_ch_101_ch_110_ch_116_ch_79_ch_102(i8* %0)
ret i32 %2
}
double __floatunsidf(unsigned int i __attribute__((unused))) { return 0.0; }


x86 assembly (clang, -O0):
<__floatunsidf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__floatunsidf>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @__floatunsidf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @__floatunsidf(i32 %0) {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ tc_libc_inttypes_imaxabs();
int /*<<< orphan*/ tc_libc_inttypes_imaxdiv();
int /*<<< orphan*/ tc_libc_inttypes_strtoimax();
int /*<<< orphan*/ tc_libc_inttypes_strtoumax();
int libc_inttypes_main(void) {
  tc_libc_inttypes_imaxabs();
  tc_libc_inttypes_imaxdiv();
  tc_libc_inttypes_strtoimax();
  tc_libc_inttypes_strtoumax();
  return 0;
}


x86 assembly (clang, -O0):
<libc_inttypes_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <tc_libc_inttypes_imaxabs@plt>
mov    $0x0,%al
call   1060 <tc_libc_inttypes_imaxdiv@plt>
mov    $0x0,%al
call   1030 <tc_libc_inttypes_strtoimax@plt>
mov    $0x0,%al
call   1040 <tc_libc_inttypes_strtoumax@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libc_inttypes_main>:
push   %rax
xor    %eax,%eax
call   1050 <tc_libc_inttypes_imaxabs@plt>
xor    %eax,%eax
call   1060 <tc_libc_inttypes_imaxdiv@plt>
xor    %eax,%eax
call   1030 <tc_libc_inttypes_strtoimax@plt>
xor    %eax,%eax
call   1040 <tc_libc_inttypes_strtoumax@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @libc_inttypes_main() {
%1 = call i32 (...) @tc_libc_inttypes_imaxabs()
%2 = call i32 (...) @tc_libc_inttypes_imaxdiv()
%3 = call i32 (...) @tc_libc_inttypes_strtoimax()
%4 = call i32 (...) @tc_libc_inttypes_strtoumax()
ret i32 0
}

LLVM IR (-O2):
define i32 @libc_inttypes_main() {
%1 = tail call i32 (...) @tc_libc_inttypes_imaxabs()
%2 = tail call i32 (...) @tc_libc_inttypes_imaxdiv()
%3 = tail call i32 (...) @tc_libc_inttypes_strtoimax()
%4 = tail call i32 (...) @tc_libc_inttypes_strtoumax()
ret i32 0
}
void gtk_radio_menu_item_new_with_mnemonic_from_widget() {}


x86 assembly (clang, -O0):
<gtk_radio_menu_item_new_with_mnemonic_from_widget>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_radio_menu_item_new_with_mnemonic_from_widget>:
ret

LLVM IR (-O0):
define void @gtk_radio_menu_item_new_with_mnemonic_from_widget() {
ret void
}

LLVM IR (-O2):
define void @gtk_radio_menu_item_new_with_mnemonic_from_widget() {
ret void
}
double utencclock(hours, minutes, seconds)
int hours;
int minutes;
double seconds;
{ return (hours * 60 + minutes) * 60 + seconds; }


x86 assembly (clang, -O0):
<utencclock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
imul   $0x3c,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
imul   $0x3c,%eax,%eax
cvtsi2sd %eax,%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<utencclock>:
imul   $0x3c,%edi,%eax
add    %esi,%eax
imul   $0x3c,%eax,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @utencclock(i32 %0, i32 %1, double %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %4
store i32 %1, i32* %5
store double %2, double* %6
%7 = load i32, i32* %4
%8 = mul nsw i32 %7, 60
%9 = load i32, i32* %5
%10 = add nsw i32 %8, %9
%11 = mul nsw i32 %10, 60
%12 = sitofp i32 %11 to double
%13 = load double, double* %6
%14 = fadd double %12, %13
ret double %14
}

LLVM IR (-O2):
define double @utencclock(i32 %0, i32 %1, double %2) {
%4 = mul nsw i32 %0, 60
%5 = add nsw i32 %4, %1
%6 = mul nsw i32 %5, 60
%7 = sitofp i32 %6 to double
%8 = fadd double %7, %2
ret double %8
}
/* Variables and functions */
void *memalign(size_t, size_t);
void *aligned_alloc(size_t alignment, size_t size) {
  if (size % alignment)
    return NULL;
  return memalign(alignment, size);
}


x86 assembly (clang, -O0):
<aligned_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
cmp    $0x0,%rdx
je     1143 <aligned_alloc+0x33>
movq   $0x0,-0x8(%rbp)
jmp    1154 <aligned_alloc+0x44>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <memalign@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_alloc>:
mov    %rsi,%rax
or     %rdi,%rax
shr    $0x20,%rax
je     112c <aligned_alloc+0x1c>
mov    %rsi,%rax
xor    %edx,%edx
div    %rdi
test   %rdx,%rdx
je     1137 <aligned_alloc+0x27>
xor    %eax,%eax
ret
mov    %esi,%eax
xor    %edx,%edx
div    %edi
test   %rdx,%rdx
jne    1129 <aligned_alloc+0x19>
jmp    1030 <memalign@plt>

LLVM IR (-O0):
define i8* @aligned_alloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = load i64, i64* %4
%8 = urem i64 %6, %7
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i8* null, i8** %3
br label %15
11: ; preds = %2
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = call i8* @memalign(i64 %12, i64 %13)
store i8* %14, i8** %3
br label %15
15: ; preds = %11, %10
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define noalias i8* @aligned_alloc(i64 %0, i64 %1) {
%3 = urem i64 %1, %0
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i8* @memalign(i64 %0, i64 %1)
br label %7
7: ; preds = %2, %5
%8 = phi i8* [ %6, %5 ], [ null, %2 ]
ret i8* %8
}
int delete (unsigned char *app, unsigned char *username) {}


x86 assembly (clang, -O0):
<delete>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete>:
ret

LLVM IR (-O0):
define i32 @delete(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @delete(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ puts(char *);
void sh_exit(int code) {
  puts("exit");
  exit(code);
}


x86 assembly (clang, -O0):
<sh_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <puts@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sh_exit>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"exit\00"
define void @sh_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @puts(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
@.str = [5 x i8] c"exit\00"
define void @sh_exit(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int __builtin_mips_cabs_ueq_s(float, float);
int test3(float a, float b) { return __builtin_mips_cabs_ueq_s(a, b); }


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__builtin_mips_cabs_ueq_s@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
jmp    1030 <__builtin_mips_cabs_ueq_s@plt>

LLVM IR (-O0):
define i32 @test3(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @__builtin_mips_cabs_ueq_s(float %5, float %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test3(float %0, float %1) {
%3 = tail call i32 @__builtin_mips_cabs_ueq_s(float %0, float %1)
ret i32 %3
}
unsigned xrop3_114_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T ^ S;
  stk2 = D | stk3;
  stk1 = S ^ stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_114_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_114_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
lea    (%rdi,%rax,1),%ecx
shl    $0x8,%esi
xor    %esi,%eax
or     $0xff,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_114_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %6
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %5
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
ret i32 %32
}

LLVM IR (-O2):
define i32 @xrop3_114_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = xor i32 %7, %4
%9 = or i32 %8, 255
%10 = xor i32 %9, %5
ret i32 %10
}
int _write(int fd, char *buf, int nbytes) { return 0; }


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @_write(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(void *, size_t, size_t, int /*<<< orphan*/ *);
int /*<<< orphan*/ swap_endian(void *, size_t, size_t);
size_t my_fread(void *buffer, size_t size, size_t count, FILE *stream) {
  size_t result = fread(buffer, size, count, stream);
  swap_endian(buffer, size, result);
  return result;
}


x86 assembly (clang, -O0):
<my_fread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fread@plt>
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1040 <swap_endian@plt>
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_fread>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <fread@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
call   1040 <swap_endian@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @my_fread(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = load i64, i64* %7
%13 = load i32*, i32** %8
%14 = call i64 @fread(i8* %10, i64 %11, i64 %12, i32* %13)
store i64 %14, i64* %9
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = load i64, i64* %9
%18 = call i32 @swap_endian(i8* %15, i64 %16, i64 %17)
%19 = load i64, i64* %9
ret i64 %19
}

LLVM IR (-O2):
define i64 @my_fread(i8* %0, i64 %1, i64 %2, i32* nocapture %3) {
%5 = tail call i64 @fread(i8* %0, i64 %1, i64 %2, i32* %3)
%6 = tail call i32 @swap_endian(i8* %0, i64 %1, i64 %5)
ret i64 %5
}
int get_int8(char *start) { return (int)*start; }


x86 assembly (clang, -O0):
<get_int8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_int8>:
movsbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_int8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_int8(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
ret i32 %3
}