xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ le64toh(int /*<<< orphan*/);
uint64_t ReadLE64(const unsigned char *ptr) {
  return le64toh(*((uint64_t *)ptr));
}


x86 assembly (clang, -O0):
<ReadLE64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <le64toh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadLE64>:
mov    (%rdi),%edi
jmp    1030 <le64toh@plt>

LLVM IR (-O0):
define i32 @ReadLE64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @le64toh(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @ReadLE64(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @le64toh(i32 %3)
ret i32 %4
}
void noop(const char *msg, ...) { (void)msg; }


x86 assembly (clang, -O0):
<noop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop>:
ret

LLVM IR (-O0):
define void @noop(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @noop(i8* nocapture %0, ...) {
ret void
}
int ci_active(void) { return 0; }


x86 assembly (clang, -O0):
<ci_active>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ci_active>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ci_active() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ci_active() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M703_f(char *s) {
  debug("M703_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M703_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M703_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M703_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M703_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M703_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M703_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
int test_imm_8Dint16_reg(short val) {
  return ((val) & (-0x8D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Dint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff73,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Dint16_reg>:
test   $0xff73,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Dint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -141
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Dint16_reg(i16 signext %0) {
%2 = and i16 %0, -141
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void kclear_bit(int nr, volatile void *addr) {
  asm volatile("btrl %1, %0" : "=m"(*(volatile long *)addr) : "Ir"(nr));
}


x86 assembly (clang, -O0):
<kclear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btr    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kclear_bit>:
btr    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @kclear_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i64*
%7 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @kclear_bit(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i64*
tail call void asm sideeffect "btrl $1, $0", "=*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gtk_main();
int /*<<< orphan*/ window_1_SSG();
int showStatusGTKMain() {
  window_1_SSG();
  gtk_main();
  return 0;
}


x86 assembly (clang, -O0):
<showStatusGTKMain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <window_1_SSG@plt>
mov    $0x0,%al
call   1030 <gtk_main@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<showStatusGTKMain>:
push   %rax
xor    %eax,%eax
call   1040 <window_1_SSG@plt>
xor    %eax,%eax
call   1030 <gtk_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @showStatusGTKMain() {
%1 = call i32 (...) @window_1_SSG()
%2 = call i32 (...) @gtk_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @showStatusGTKMain() {
%1 = tail call i32 (...) @window_1_SSG()
%2 = tail call i32 (...) @gtk_main()
ret i32 0
}
/* Variables and functions */
int dal_reg_read(unsigned int, unsigned int, unsigned int *);
int emac1_reg_get(unsigned int dev_id, unsigned int reg_addr,
                  unsigned int *pvalue) {
  return dal_reg_read(dev_id, reg_addr + 0x8000, pvalue);
}


x86 assembly (clang, -O0):
<emac1_reg_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
add    $0x8000,%esi
mov    -0x10(%rbp),%rdx
call   1030 <dal_reg_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emac1_reg_get>:
add    $0x8000,%esi
jmp    1030 <dal_reg_read@plt>

LLVM IR (-O0):
define i32 @emac1_reg_get(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add i32 %8, 32768
%10 = load i32*, i32** %6
%11 = call i32 @dal_reg_read(i32 %7, i32 %9, i32* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @emac1_reg_get(i32 %0, i32 %1, i32* %2) {
%4 = add i32 %1, 32768
%5 = tail call i32 @dal_reg_read(i32 %0, i32 %4, i32* %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ cursors();
int /*<<< orphan*/ lprintf(char *, int);
void ycwi(int x) {
  cursors();
  lprintf("\nYou can't wield item %c!", x);
}


x86 assembly (clang, -O0):
<ycwi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <cursors@plt>
mov    -0x4(%rbp),%esi
lea    0xec4(%rip),%rdi
call   1040 <lprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ycwi>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <cursors@plt>
lea    0xecf(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <lprintf@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"\0AYou can't wield item %c!\00"
define void @ycwi(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @cursors()
%4 = load i32, i32* %2
%5 = call i32 @lprintf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"\0AYou can't wield item %c!\00"
define void @ycwi(i32 %0) {
%2 = tail call i32 (...) @cursors()
%3 = tail call i32 @lprintf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int sign(int num) { return (num < 0) ? -1 : 1; }


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
mov    %edi,%eax
sar    $0x1f,%eax
or     $0x1,%eax
ret

LLVM IR (-O0):
define i32 @sign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 -1, i32 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @sign(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i32 1, i32 -1
ret i32 %3
}
int is_lower(char c) { return c < 123 && c > 96; }


x86 assembly (clang, -O0):
<is_lower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x7b,%ecx
mov    %al,-0x2(%rbp)
jge    1129 <is_lower+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x60,%eax
setg   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_lower>:
add    $0x9f,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_lower(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp slt i32 %4, 123
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sgt i32 %8, 96
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_lower(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void I422ToARGB1555Row_Any_AVX2() {}


x86 assembly (clang, -O0):
<I422ToARGB1555Row_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422ToARGB1555Row_Any_AVX2>:
ret

LLVM IR (-O0):
define void @I422ToARGB1555Row_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @I422ToARGB1555Row_Any_AVX2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void *Thread(void *x) {
  sleep(10);
  return 0;
}


x86 assembly (clang, -O0):
<Thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xa,%edi
call   1030 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Thread>:
push   %rax
mov    $0xa,%edi
call   1030 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @Thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @sleep(i32 10)
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @Thread(i8* nocapture readnone %0) {
%2 = tail call i32 @sleep(i32 10)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void bputc(unsigned int n, char c) {
  size_t i;
  if (!n)
    return;
  if (n == 1)
    putchar(c);
  else
    for (i = 0; i < n; i++)
      putchar(c);
}


x86 assembly (clang, -O0):
<bputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1130 <bputc+0x20>
jmp    117f <bputc+0x6f>
cmpl   $0x1,-0x4(%rbp)
jne    1148 <bputc+0x38>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
jmp    117f <bputc+0x6f>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
cmp    %rcx,%rax
jae    117a <bputc+0x6a>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1150 <bputc+0x40>
jmp    117f <bputc+0x6f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bputc>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
je     114d <bputc+0x3d>
cmp    $0x1,%edi
jne    112b <bputc+0x1b>
movsbl %sil,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putchar@plt>
mov    %edi,%ebx
movsbl %sil,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
call   1030 <putchar@plt>
add    $0xffffffffffffffff,%rbx
jne    1140 <bputc+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @bputc(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i64
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %2
br label %28
9: ; preds = %2
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i8, i8* %4
%14 = call i32 @putchar(i8 signext %13)
br label %28
15: ; preds = %9
store i64 0, i64* %5
br label %16
16: ; preds = %24, %15
%17 = load i64, i64* %5
%18 = load i32, i32* %3
%19 = zext i32 %18 to i64
%20 = icmp ult i64 %17, %19
br i1 %20, label %21, label %27
21: ; preds = %16
%22 = load i8, i8* %4
%23 = call i32 @putchar(i8 signext %22)
br label %24
24: ; preds = %21
%25 = load i64, i64* %5
%26 = add i64 %25, 1
store i64 %26, i64* %5
br label %16
27: ; preds = %16
br label %28
28: ; preds = %8, %27, %12
ret void
}

LLVM IR (-O2):
define void @bputc(i32 %0, i8 signext %1) {
switch i32 %0, label %3 [
i32 0, label %12
i32 1, label %5
]
3: ; preds = %2
%4 = zext i32 %0 to i64
br label %7
5: ; preds = %2
%6 = tail call i32 @putchar(i8 signext %1)
br label %12
7: ; preds = %3, %7
%8 = phi i64 [ %10, %7 ], [ 0, %3 ]
%9 = tail call i32 @putchar(i8 signext %1)
%10 = add nuw nsw i64 %8, 1
%11 = icmp eq i64 %10, %4
br i1 %11, label %12, label %7
12: ; preds = %7, %5, %2
ret void
}
void change_count(int *count, int val) {
  if ((val > 2) && (val < 7)) {
    *count = *count + 1;
  } else if (val == 10) {
    *count = *count - 1;
  }
}


x86 assembly (clang, -O0):
<change_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jle    1133 <change_count+0x33>
cmpl   $0x7,-0xc(%rbp)
jge    1133 <change_count+0x33>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
jmp    1151 <change_count+0x51>
cmpl   $0xa,-0xc(%rbp)
jne    114c <change_count+0x4c>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
jmp    1151 <change_count+0x51>
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_count>:
lea    -0x3(%rsi),%ecx
mov    $0x1,%eax
cmp    $0x4,%ecx
jb     1117 <change_count+0x17>
mov    $0xffffffff,%eax
cmp    $0xa,%esi
jne    1119 <change_count+0x19>
add    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @change_count(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 7
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = load i32*, i32** %3
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
%14 = load i32*, i32** %3
store i32 %13, i32* %14
br label %24
15: ; preds = %7, %2
%16 = load i32, i32* %4
%17 = icmp eq i32 %16, 10
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = load i32*, i32** %3
%20 = load i32, i32* %19
%21 = sub nsw i32 %20, 1
%22 = load i32*, i32** %3
store i32 %21, i32* %22
br label %23
23: ; preds = %18, %15
br label %24
24: ; preds = %23, %10
ret void
}

LLVM IR (-O2):
define void @change_count(i32* nocapture %0, i32 %1) {
%3 = add i32 %1, -3
%4 = icmp ult i32 %3, 4
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = icmp eq i32 %1, 10
br i1 %6, label %7, label %11
7: ; preds = %5, %2
%8 = phi i32 [ 1, %2 ], [ -1, %5 ]
%9 = load i32, i32* %0
%10 = add nsw i32 %9, %8
store i32 %10, i32* %0
br label %11
11: ; preds = %7, %5
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int getchar(void) {
  uint32_t uart;
  uint8_t c;
  while (1) {
    uart = *((volatile uint32_t *)(0x20000004));
    if (uart & (0x00000002))
      break;
  }
  c = *((volatile uint8_t *)(0x20000000));
  return (int)c;
}


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20000004,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1122 <getchar+0x22>
jmp    1127 <getchar+0x27>
jmp    1104 <getchar+0x4>
mov    $0x20000000,%eax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
testl  $0x2,0x20000004
je     1100 <getchar>
mov    0x20000000,%rax
20
ret

LLVM IR (-O0):
define i32 @getchar() {
%1 = alloca i32
%2 = alloca i64
br label %3
3: ; preds = %0, %9
%4 = load volatile i32, i32* inttoptr (i64 536870916 to i32*)
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = and i32 %5, 2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %3
br label %10
9: ; preds = %3
br label %3
10: ; preds = %8
%11 = load volatile i64, i64* inttoptr (i64 536870912 to i64*)
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @getchar() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* inttoptr (i64 536870916 to i32*)
%3 = and i32 %2, 2
%4 = icmp eq i32 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = load volatile i64, i64* inttoptr (i64 536870912 to i64*)
%7 = trunc i64 %6 to i32
ret i32 %7
}
error(s1, s2) char *s1, *s2;
{
  printf("texindex: ");
  printf(s1, s2);
  printf("\n");
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"texindex: \00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @error(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 (i8*, ...) @printf(i8* %7, i8* %8)
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@.str = [11 x i8] c"texindex: \00"
define i32 @error(i8* nocapture %0, i8* %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) %0, i8* %1)
%5 = tail call i32 @putchar(i32 10)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ test_haxe_comment_entities();
int /*<<< orphan*/ test_haxe_comments();
void all_haxe_tests() {
  test_haxe_comments();
  test_haxe_comment_entities();
}


x86 assembly (clang, -O0):
<all_haxe_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_haxe_comments@plt>
mov    $0x0,%al
call   1030 <test_haxe_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_haxe_tests>:
push   %rax
xor    %eax,%eax
call   1040 <test_haxe_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_haxe_comment_entities@plt>

LLVM IR (-O0):
define void @all_haxe_tests() {
%1 = call i32 (...) @test_haxe_comments()
%2 = call i32 (...) @test_haxe_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_haxe_tests() {
%1 = tail call i32 (...) @test_haxe_comments()
%2 = tail call i32 (...) @test_haxe_comment_entities()
ret void
}
void RTLinuxSysFsReadStrFileV(void) {}


x86 assembly (clang, -O0):
<RTLinuxSysFsReadStrFileV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLinuxSysFsReadStrFileV>:
ret

LLVM IR (-O0):
define void @RTLinuxSysFsReadStrFileV() {
ret void
}

LLVM IR (-O2):
define void @RTLinuxSysFsReadStrFileV() {
ret void
}
/* Type definitions */
typedef scalar_t__ __v8hi;
typedef scalar_t__ __m128i;

/* Variables and functions */
__m128i __attribute__((__always___, __nodebug__))
_mm_cmpgt_epi16(__m128i a, __m128i b) {
  return (__m128i)((__v8hi)a > (__v8hi)b);
}


x86 assembly (clang, -O0):
<_mm_cmpgt_epi16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cmpgt_epi16>:
xor    %eax,%eax
cmp    %rsi,%rdi
setg   %al
ret

LLVM IR (-O0):
define i64 @_mm_cmpgt_epi16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @_mm_cmpgt_epi16(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = zext i1 %3 to i64
ret i64 %4
}
int max_horspool(int a, int b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<max_horspool>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <max_horspool+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <max_horspool+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_horspool>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max_horspool(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @max_horspool(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ traverseLeft(struct TreeNode *);
void flatten(struct TreeNode *root) {
  if (!root)
    return;
  traverseLeft(root);
}


x86 assembly (clang, -O0):
<flatten>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <flatten+0x1c>
jmp    1135 <flatten+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <traverseLeft@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flatten>:
test   %rdi,%rdi
je     111a <flatten+0xa>
jmp    1030 <traverseLeft@plt>
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define void @flatten(%struct.TreeNode* %0) {
%2 = alloca %struct.TreeNode*
store %struct.TreeNode* %0, %struct.TreeNode** %2
%3 = load %struct.TreeNode*, %struct.TreeNode** %2
%4 = icmp ne %struct.TreeNode* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load %struct.TreeNode*, %struct.TreeNode** %2
%8 = call i32 @traverseLeft(%struct.TreeNode* %7)
br label %9
9: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define void @flatten(%struct.TreeNode* %0) {
%2 = icmp eq %struct.TreeNode* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @traverseLeft(%struct.TreeNode* %0)
br label %5
5: ; preds = %1, %3
ret void
}
/* Variables and functions */
scalar_t__ strlen(char *);
int str_len(const void *p1, const void *p2) {
  return strlen(*(char **)p1) > strlen(*(char **)p2);
}


x86 assembly (clang, -O0):
<str_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_len>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    (%rdi),%rdi
call   1030 <strlen@plt>
mov    %rax,%r14
mov    (%rbx),%rdi
call   1030 <strlen@plt>
xor    %ecx,%ecx
cmp    %rax,%r14
setg   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @str_len(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = call i64 @strlen(i8* %7)
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
%11 = load i8*, i8** %10
%12 = call i64 @strlen(i8* %11)
%13 = icmp sgt i64 %8, %12
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @str_len(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = tail call i64 @strlen(i8* dereferenceable(1) %4)
%6 = bitcast i8* %1 to i8**
%7 = load i8*, i8** %6
%8 = tail call i64 @strlen(i8* dereferenceable(1) %7)
%9 = icmp sgt i64 %5, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, char *);
char Get_command(void) {
  char c;
  printf("Please enter a command:  ");
  scanf(" %c", &c);
  return c;
}


x86 assembly (clang, -O0):
<Get_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
lea    -0x1(%rbp),%rsi
call   1040 <scanf@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Get_command>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x7(%rsp),%al
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Please enter a command: \00"
@.str.1 = [4 x i8] c" %c\00"
define signext i8 @Get_command() {
%1 = alloca i8
%2 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%4 = load i8, i8* %1
ret i8 %4
}

LLVM IR (-O2):
@.str = [26 x i8] c"Please enter a command: \00"
@.str.1 = [4 x i8] c" %c\00"
define signext i8 @Get_command() {
%1 = alloca i8
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%4 = load i8, i8* %1
ret i8 %4
}
void echanger_valeurs_pour_tri(double *valeurs, int element1, int element2) {
  double temp_val;
  temp_val = valeurs[element1];
  valeurs[element1] = valeurs[element2];
  valeurs[element2] = temp_val;
}


x86 assembly (clang, -O0):
<echanger_valeurs_pour_tri>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
movsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<echanger_valeurs_pour_tri>:
movslq %esi,%rax
movsd  (%rdi,%rax,8),%xmm0
movslq %edx,%rcx
movsd  (%rdi,%rcx,8),%xmm1
movsd  %xmm1,(%rdi,%rax,8)
movsd  %xmm0,(%rdi,%rcx,8)
ret

LLVM IR (-O0):
define void @echanger_valeurs_pour_tri(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca double
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load double*, double** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds double, double* %8, i64 %10
%12 = load double, double* %11
store double %12, double* %7
%13 = load double*, double** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds double, double* %13, i64 %15
%17 = load double, double* %16
%18 = load double*, double** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds double, double* %18, i64 %20
store double %17, double* %21
%22 = load double, double* %7
%23 = load double*, double** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds double, double* %23, i64 %25
store double %22, double* %26
ret void
}

LLVM IR (-O2):
define void @echanger_valeurs_pour_tri(double* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds double, double* %0, i64 %4
%6 = load double, double* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds double, double* %0, i64 %7
%9 = load double, double* %8
store double %9, double* %5
store double %6, double* %8
ret void
}
void omp_set_num_threads(int _Num_threads) {}


x86 assembly (clang, -O0):
<omp_set_num_threads>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<omp_set_num_threads>:
ret

LLVM IR (-O0):
define void @omp_set_num_threads(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @omp_set_num_threads(i32 %0) {
ret void
}
int test_imm_6Cint16_reg(short val) {
  return ((val) & (-0x6C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Cint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff94,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Cint16_reg>:
test   $0xff94,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Cint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -108
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Cint16_reg(i16 signext %0) {
%2 = and i16 %0, -108
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned xrop3_27_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T ^ S;
  stk2 = D & stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_27_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_27_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
xor    %edi,%esi
xor    %esi,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_27_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %6
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %5
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = xor i32 %32, -1
store i32 %33, i32* %8
%34 = load i32, i32* %8
ret i32 %34
}

LLVM IR (-O2):
define i32 @xrop3_27_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = xor i8 %1, %0
%6 = zext i8 %5 to i32
%7 = xor i32 %4, %6
%8 = xor i32 %7, -1
ret i32 %8
}
/* Type definitions */
typedef int __u8;

/* Variables and functions */
int test_bit(int nr, const void *addr) {
  __u8 *p, mask;
  p = (__u8 *)addr;
  p += nr >> 3;
  mask = 1 << (nr & 0x7);
  return ((mask & *p) != 0);
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x3,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x18(%rbp),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
mov    %edi,%ecx
mov    %edi,%eax
sar    $0x3,%eax
cltq
mov    (%rsi,%rax,4),%eax
and    $0x7,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i32, i32* %3
%10 = ashr i32 %9, 3
%11 = load i32*, i32** %5
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds i32, i32* %11, i64 %12
store i32* %13, i32** %5
%14 = load i32, i32* %3
%15 = and i32 %14, 7
%16 = shl i32 1, %15
store i32 %16, i32* %6
%17 = load i32, i32* %6
%18 = load i32*, i32** %5
%19 = load i32, i32* %18
%20 = and i32 %17, %19
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = ashr i32 %0, 3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %3, i64 %5
%7 = and i32 %0, 7
%8 = load i32, i32* %6
%9 = lshr i32 %8, %7
%10 = and i32 %9, 1
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ DMA7_DriverIRQHandler();
__attribute__((weak)) void DMA7_IRQHandler(void) { DMA7_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<DMA7_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DMA7_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA7_IRQHandler>:
xor    %eax,%eax
jmp    1030 <DMA7_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @DMA7_IRQHandler() {
%1 = call i32 (...) @DMA7_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @DMA7_IRQHandler() {
%1 = tail call i32 (...) @DMA7_DriverIRQHandler()
ret void
}
int my_compare(const void *p, const void *q) {
  const int *m = (const void *)p;
  const int *n = (const void *)q;
  return *m - *n;
}


x86 assembly (clang, -O0):
<my_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_compare>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @my_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @my_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ load_configfile_wrapper(char *);
char load_configfile(char *config_file) {
  static char config_loaded = 0;
  if (config_loaded == 0) {
    load_configfile_wrapper(config_file);
    config_loaded = 1;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<load_configfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
movsbl 0x2f06(%rip),%eax
cmp    $0x0,%eax
jne    1145 <load_configfile+0x35>
mov    -0x10(%rbp),%rdi
call   1030 <load_configfile_wrapper@plt>
movb   $0x1,0x2eed(%rip)
movb   $0x1,-0x1(%rbp)
jmp    1149 <load_configfile+0x39>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_configfile>:
push   %rax
cmpb   $0x0,0x2f11(%rip)
je     111e <load_configfile+0xe>
xor    %eax,%eax
pop    %rcx
ret
call   1030 <load_configfile_wrapper@plt>
movb   $0x1,0x2eff(%rip)
mov    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
@load_configfile.config_loaded = internal global i8 0
define signext i8 @load_configfile(i8* %0) {
%2 = alloca i8
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8, i8* @load_configfile.config_loaded
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @load_configfile_wrapper(i8* %8)
store i8 1, i8* @load_configfile.config_loaded
store i8 1, i8* %2
br label %11
10: ; preds = %1
store i8 0, i8* %2
br label %11
11: ; preds = %10, %7
%12 = load i8, i8* %2
ret i8 %12
}

LLVM IR (-O2):
@load_configfile.config_loaded = internal unnamed_addr global i1 false
define signext i8 @load_configfile(i8* %0) {
%2 = load i1, i1* @load_configfile.config_loaded
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @load_configfile_wrapper(i8* %0)
store i1 true, i1* @load_configfile.config_loaded
br label %5
5: ; preds = %1, %3
%6 = phi i8 [ 1, %3 ], [ 0, %1 ]
ret i8 %6
}
int neilnm1(long a) { return -(a != -1); }


x86 assembly (clang, -O0):
<neilnm1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0xffffffffffffffff,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<neilnm1>:
xor    %eax,%eax
cmp    $0xffffffffffffffff,%rdi
setne  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @neilnm1(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, -1
%5 = zext i1 %4 to i32
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @neilnm1(i64 %0) {
%2 = icmp ne i64 %0, -1
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ *display;
};
typedef TYPE_1__ XMapEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XMapEvent_display(void *_p, void *_v) {
  ((XMapEvent *)_p)->display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XMapEvent_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XMapEvent_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32* }
define void @set_XMapEvent_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i32* %6, i32** %9
ret void
}

LLVM IR (-O2):
define void @set_XMapEvent_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
const char *crypto_get_library_name(void) {}


x86 assembly (clang, -O0):
<crypto_get_library_name>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_get_library_name>:
ret

LLVM IR (-O0):
define i8* @crypto_get_library_name() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define noalias i8* @crypto_get_library_name() {
ret i8* undef
}
void sk_dup(void) {}


x86 assembly (clang, -O0):
<sk_dup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_dup>:
ret

LLVM IR (-O0):
define void @sk_dup() {
ret void
}

LLVM IR (-O2):
define void @sk_dup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assertFuzzyEquals(int /*<<< orphan*/, double);
int /*<<< orphan*/ f(double);
void dotest(double x, double expected) { assertFuzzyEquals(f(x), expected); }


x86 assembly (clang, -O0):
<dotest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <f@plt>
mov    %eax,%edi
movsd  -0x10(%rbp),%xmm0
call   1040 <assertFuzzyEquals@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dotest>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <f@plt>
mov    %eax,%edi
movsd  (%rsp),%xmm0
pop    %rax
jmp    1040 <assertFuzzyEquals@plt>

LLVM IR (-O0):
define void @dotest(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call i32 @f(double %5)
%7 = load double, double* %4
%8 = call i32 @assertFuzzyEquals(i32 %6, double %7)
ret void
}

LLVM IR (-O2):
define void @dotest(double %0, double %1) {
%3 = tail call i32 @f(double %0)
%4 = tail call i32 @assertFuzzyEquals(i32 %3, double %1)
ret void
}
int blank_get(void *state, int type, char *value) {
  value[0] = '\0';
  return (0);
}


x86 assembly (clang, -O0):
<blank_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blank_get>:
movb   $0x0,(%rdx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @blank_get(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 0, i8* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @blank_get(i8* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
store i8 0, i8* %2
ret i32 0
}
int save_representation(void *representation, char *basename) { return 0; }


x86 assembly (clang, -O0):
<save_representation>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_representation>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @save_representation(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @save_representation(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpnle_sd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmpnle_sd(__m128d __a, __m128d __b) {
  return _mm_cmpnle_sd(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpnle_sd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpnle_sd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpnle_sd>:
jmp    1030 <_mm_cmpnle_sd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpnle_sd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpnle_sd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpnle_sd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpnle_sd(i32 %0, i32 %1)
ret i32 %3
}
void interpretAndExecuteInstruction(int instruction) {}


x86 assembly (clang, -O0):
<interpretAndExecuteInstruction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpretAndExecuteInstruction>:
ret

LLVM IR (-O0):
define void @interpretAndExecuteInstruction(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @interpretAndExecuteInstruction(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mean_fprime_wca_radius(double);
double mean_fprime_wca_radius_squared(double);
double uipow(int /*<<< orphan*/, int);
double variance_fprime_wca_radius(double T) {
  return mean_fprime_wca_radius_squared(T) -
         uipow(mean_fprime_wca_radius(T), 2);
}


x86 assembly (clang, -O0):
<variance_fprime_wca_radius>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <mean_fprime_wca_radius_squared@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1050 <mean_fprime_wca_radius@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1030 <uipow@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<variance_fprime_wca_radius>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <mean_fprime_wca_radius_squared@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1050 <mean_fprime_wca_radius@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1030 <uipow@plt>
movsd  0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @variance_fprime_wca_radius(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @mean_fprime_wca_radius_squared(double %3)
%5 = load double, double* %2
%6 = call i32 @mean_fprime_wca_radius(double %5)
%7 = call double @uipow(i32 %6, i32 2)
%8 = fsub double %4, %7
ret double %8
}

LLVM IR (-O2):
define double @variance_fprime_wca_radius(double %0) {
%2 = tail call double @mean_fprime_wca_radius_squared(double %0)
%3 = tail call i32 @mean_fprime_wca_radius(double %0)
%4 = tail call double @uipow(i32 %3, i32 2)
%5 = fsub double %2, %4
ret double %5
}
void stosb(void *addr, int data, int cnt) {
  int i;
  for (i = 0; i < cnt; i++) {
    *(((char *)addr) + i) = (char)data;
  }
}


x86 assembly (clang, -O0):
<stosb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    113f <stosb+0x3f>
mov    -0xc(%rbp),%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <stosb+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stosb>:
test   %edx,%edx
jle    1120 <stosb+0x10>
push   %rax
mov    %edx,%edx
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @stosb(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32, i32* %5
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %4
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 %14, i8* %18
br label %19
19: ; preds = %12
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @stosb(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = trunc i32 %1 to i8
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %5, %3
ret void
}