xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int ipower(int, int);
int64_t c_decimal_shift(int64_t x, int64_t y) { return x * ipower(10, y); }


x86 assembly (clang, -O0):
<c_decimal_shift>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    $0xa,%edi
call   1030 <ipower@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_decimal_shift>:
push   %rbx
mov    %edi,%ebx
mov    $0xa,%edi
call   1030 <ipower@plt>
imul   %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @c_decimal_shift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ipower(i32 10, i32 %6)
%8 = mul nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @c_decimal_shift(i32 %0, i32 %1) {
%3 = tail call i32 @ipower(i32 10, i32 %1)
%4 = mul nsw i32 %3, %0
ret i32 %4
}
/* Variables and functions */
scalar_t__ pmlstate_close_repository();
int pml_close_repository(void) { return (int)pmlstate_close_repository(); }


x86 assembly (clang, -O0):
<pml_close_repository>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pmlstate_close_repository@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pml_close_repository>:
xor    %eax,%eax
jmp    1030 <pmlstate_close_repository@plt>

LLVM IR (-O0):
define i32 @pml_close_repository() {
%1 = call i64 (...) @pmlstate_close_repository()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @pml_close_repository() {
%1 = tail call i64 (...) @pmlstate_close_repository()
%2 = trunc i64 %1 to i32
ret i32 %2
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzBinaryFuncConstR_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SEND_ACKDOWN_DELAYED(int, int /*<<< orphan*/);
int /*<<< orphan*/ SEND_DATAOFF_DELAYED(int /*<<< orphan*/, int);
void BrzBinaryFuncConstRPush_ackdown(struct comp *comp, int port) {
  struct BrzBinaryFuncConstR_ *c = (struct BrzBinaryFuncConstR_ *)comp;
  SEND_ACKDOWN_DELAYED(1, 0);
  SEND_DATAOFF_DELAYED(0, 1);
}


x86 assembly (clang, -O0):
<BrzBinaryFuncConstRPush_ackdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <SEND_ACKDOWN_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1040 <SEND_DATAOFF_DELAYED@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzBinaryFuncConstRPush_ackdown>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <SEND_ACKDOWN_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1040 <SEND_DATAOFF_DELAYED@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzBinaryFuncConstR_ = type { i32 }
define void @BrzBinaryFuncConstRPush_ackdown(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzBinaryFuncConstR_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzBinaryFuncConstR_*
store %struct.BrzBinaryFuncConstR_* %7, %struct.BrzBinaryFuncConstR_** %5
%8 = call i32 @SEND_ACKDOWN_DELAYED(i32 1, i32 0)
%9 = call i32 @SEND_DATAOFF_DELAYED(i32 0, i32 1)
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzBinaryFuncConstRPush_ackdown(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @SEND_ACKDOWN_DELAYED(i32 1, i32 0)
%4 = tail call i32 @SEND_DATAOFF_DELAYED(i32 0, i32 1)
ret void
}
void BN_GF2m_arr2poly(void) {}


x86 assembly (clang, -O0):
<BN_GF2m_arr2poly>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_GF2m_arr2poly>:
ret

LLVM IR (-O0):
define void @BN_GF2m_arr2poly() {
ret void
}

LLVM IR (-O2):
define void @BN_GF2m_arr2poly() {
ret void
}
const struct genlist *text_tag_list_base(const struct text_tag_list *tthis) {
  return ((struct genlist *)(tthis));
}


x86 assembly (clang, -O0):
<text_tag_list_base>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<text_tag_list_base>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.genlist = type opaque
%struct.text_tag_list = type opaque
define %struct.genlist* @text_tag_list_base(%struct.text_tag_list* %0) {
%2 = alloca %struct.text_tag_list*
store %struct.text_tag_list* %0, %struct.text_tag_list** %2
%3 = load %struct.text_tag_list*, %struct.text_tag_list** %2
%4 = bitcast %struct.text_tag_list* %3 to %struct.genlist*
ret %struct.genlist* %4
}

LLVM IR (-O2):
%struct.genlist = type opaque
%struct.text_tag_list = type opaque
define %struct.genlist* @text_tag_list_base(%struct.text_tag_list* readnone %0) {
%2 = bitcast %struct.text_tag_list* %0 to %struct.genlist*
ret %struct.genlist* %2
}
/* Variables and functions */
int /*<<< orphan*/ PR_SET_NAME;
int prctl(int /*<<< orphan*/, char *);
void kore_platform_proctitle(char *title) {
  if (prctl(PR_SET_NAME, title) == -1)
    ;
}


x86 assembly (clang, -O0):
<kore_platform_proctitle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <prctl@plt>
cmp    $0xffffffff,%eax
jne    113c <kore_platform_proctitle+0x2c>
jmp    113c <kore_platform_proctitle+0x2c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kore_platform_proctitle>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <prctl@plt>

LLVM IR (-O0):
@PR_SET_NAME = global i32 0
define void @kore_platform_proctitle(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @PR_SET_NAME
%4 = load i8*, i8** %2
%5 = call i32 @prctl(i32 %3, i8* %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
@PR_SET_NAME = global i32 0
define void @kore_platform_proctitle(i8* %0) {
%2 = load i32, i32* @PR_SET_NAME
%3 = tail call i32 @prctl(i32 %2, i8* %0)
ret void
}
__attribute__((always_)) int unregister_trace_mm_page_pcpu_drain(
    void (*probe)(void *__data, struct page *page, unsigned int order,
                  int migratetype),
    void *data) {
  return -38;
}


x86 assembly (clang, -O0):
<unregister_trace_mm_page_pcpu_drain>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_trace_mm_page_pcpu_drain>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.page = type opaque
define i32 @unregister_trace_mm_page_pcpu_drain(void (i8*, %struct.page*, i32, i32)* %0, i8* %1) {
%3 = alloca void (i8*, %struct.page*, i32, i32)*
%4 = alloca i8*
store void (i8*, %struct.page*, i32, i32)* %0, void (i8*, %struct.page*, i32, i32)** %3
store i8* %1, i8** %4
ret i32 -38
}

LLVM IR (-O2):
%struct.page = type opaque
define i32 @unregister_trace_mm_page_pcpu_drain(void (i8*, %struct.page*, i32, i32)* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -38
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hola a todos\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hola a todos\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hola a todos\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t array_length(uintptr_t *a) { return (int32_t)(*(a - 1)); }


x86 assembly (clang, -O0):
<array_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_length>:
mov    -0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @array_length(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 -1
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @array_length(i64* nocapture %0) {
%2 = getelementptr inbounds i64, i64* %0, i64 -1
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int str_len(char *str) {
  int i = 0;
  while (str[i++])
    ;
  return i;
}


x86 assembly (clang, -O0):
<str_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1130 <str_len+0x30>
jmp    110f <str_len+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_len>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpb   $0x0,(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <str_len+0x10>
ret

LLVM IR (-O0):
define i32 @str_len(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = sext i32 %6 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %4
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @str_len(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %4, %2 ], [ 0, %1 ]
%4 = add nuw i64 %3, 1
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %4 to i32
ret i32 %9
}
long int longint_ignoring_unsignedshort(long int x, unsigned short y) {
  return x;
}


x86 assembly (clang, -O0):
<longint_ignoring_unsignedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longint_ignoring_unsignedshort>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longint_ignoring_unsignedshort(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longint_ignoring_unsignedshort(i64 returned %0, i16 zeroext %1) {
ret i64 %0
}
/* Variables and functions */
size_t SIZE_MAX;
void *reralloc_size(void const *, void *, size_t);
void *reralloc_array_size(const void *ctx, void *ptr, size_t size,
                          size_t count) {
  if (count > SIZE_MAX / size)
    return NULL;
  return reralloc_size(ctx, ptr, size * count);
}


x86 assembly (clang, -O0):
<reralloc_array_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    0x2ea1(%rip),%rax
mov    (%rax),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x20(%rbp)
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
cmp    %rcx,%rax
jbe    115f <reralloc_array_size+0x4f>
movq   $0x0,-0x8(%rbp)
jmp    1179 <reralloc_array_size+0x69>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
imul   -0x28(%rbp),%rdx
call   1030 <reralloc_size@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reralloc_array_size>:
mov    %rdx,%r8
mov    0x2ebe(%rip),%rax
mov    (%rax),%rax
mov    %rax,%rdx
or     %r8,%rdx
shr    $0x20,%rdx
je     1136 <reralloc_array_size+0x26>
xor    %edx,%edx
div    %r8
cmp    %rcx,%rax
jae    1140 <reralloc_array_size+0x30>
xor    %eax,%eax
ret
xor    %edx,%edx
div    %r8d
cmp    %rcx,%rax
jb     1133 <reralloc_array_size+0x23>
imul   %r8,%rcx
mov    %rcx,%rdx
jmp    1030 <reralloc_size@plt>

LLVM IR (-O0):
@SIZE_MAX = global i64 0
define i8* @reralloc_array_size(i8* %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
%10 = load i64, i64* %9
%11 = load i64, i64* @SIZE_MAX
%12 = load i64, i64* %8
%13 = udiv i64 %11, %12
%14 = icmp ugt i64 %10, %13
br i1 %14, label %15, label %16
15: ; preds = %4
store i8* null, i8** %5
br label %23
16: ; preds = %4
%17 = load i8*, i8** %6
%18 = load i8*, i8** %7
%19 = load i64, i64* %8
%20 = load i64, i64* %9
%21 = mul i64 %19, %20
%22 = call i8* @reralloc_size(i8* %17, i8* %18, i64 %21)
store i8* %22, i8** %5
br label %23
23: ; preds = %16, %15
%24 = load i8*, i8** %5
ret i8* %24
}

LLVM IR (-O2):
@SIZE_MAX = global i64 0
define i8* @reralloc_array_size(i8* %0, i8* %1, i64 %2, i64 %3) {
%5 = load i64, i64* @SIZE_MAX
%6 = udiv i64 %5, %2
%7 = icmp ult i64 %6, %3
br i1 %7, label %11, label %8
8: ; preds = %4
%9 = mul i64 %3, %2
%10 = tail call i8* @reralloc_size(i8* %0, i8* %1, i64 %9)
br label %11
11: ; preds = %4, %8
%12 = phi i8* [ %10, %8 ], [ null, %4 ]
ret i8* %12
}
/* Type definitions */
typedef int /*<<< orphan*/ __off64_t;

/* Variables and functions */
int ENOSYS;
int posix_fadvise64(int fd, __off64_t offset, __off64_t len, int advise) {
  return ENOSYS;
}


x86 assembly (clang, -O0):
<posix_fadvise64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_fadvise64>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @posix_fadvise64(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @ENOSYS
ret i32 %9
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @posix_fadvise64(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = load i32, i32* @ENOSYS
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int celcon_mixed_volume_of_supports(int *mv) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc4c(239, mv, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_mixed_volume_of_supports>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xef,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_mixed_volume_of_supports>:
mov    %rdi,%rsi
mov    $0xef,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @celcon_mixed_volume_of_supports(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %4
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc4c(i32 239, i32* %6, i32* %7, double* %8, i32 0)
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @celcon_mixed_volume_of_supports(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc4c(i32 239, i32* %0, i32* undef, double* undef, i32 0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef int /*<<< orphan*/ uint8_t;
typedef uintptr_t uint32_t;

/* Variables and functions */
int /*<<< orphan*/ rgph_murmur32_finalise(int, uintptr_t *);
int /*<<< orphan*/ rgph_murmur32_mix0(int /*<<< orphan*/, uintptr_t *);
void rgph_u32x4_murmur32v_u8(uint8_t value, uintptr_t seed, uint32_t *h) {
  h[0] = h[1] = h[2] = h[3] = seed;
  rgph_murmur32_mix0(value, h);
  rgph_murmur32_finalise(sizeof(value), h);
}


x86 assembly (clang, -O0):
<rgph_u32x4_murmur32v_u8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x18(%rax)
mov    -0x18(%rbp),%rax
mov    %rcx,0x10(%rax)
mov    -0x18(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rsi
call   1040 <rgph_murmur32_mix0@plt>
mov    -0x18(%rbp),%rsi
mov    $0x4,%edi
call   1030 <rgph_murmur32_finalise@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u32x4_murmur32v_u8>:
push   %rbx
mov    %rdx,%rbx
mov    %rsi,0x18(%rdx)
mov    %rsi,0x10(%rdx)
mov    %rsi,0x8(%rdx)
mov    %rsi,(%rdx)
mov    %rdx,%rsi
call   1040 <rgph_murmur32_mix0@plt>
mov    $0x4,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <rgph_murmur32_finalise@plt>

LLVM IR (-O0):
define void @rgph_u32x4_murmur32v_u8(i32 %0, i64 %1, i64* %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i64, i64* %5
%8 = load i64*, i64** %6
%9 = getelementptr inbounds i64, i64* %8, i64 3
store i64 %7, i64* %9
%10 = load i64*, i64** %6
%11 = getelementptr inbounds i64, i64* %10, i64 2
store i64 %7, i64* %11
%12 = load i64*, i64** %6
%13 = getelementptr inbounds i64, i64* %12, i64 1
store i64 %7, i64* %13
%14 = load i64*, i64** %6
%15 = getelementptr inbounds i64, i64* %14, i64 0
store i64 %7, i64* %15
%16 = load i32, i32* %4
%17 = load i64*, i64** %6
%18 = call i32 @rgph_murmur32_mix0(i32 %16, i64* %17)
%19 = load i64*, i64** %6
%20 = call i32 @rgph_murmur32_finalise(i32 4, i64* %19)
ret void
}

LLVM IR (-O2):
define void @rgph_u32x4_murmur32v_u8(i32 %0, i64 %1, i64* %2) {
%4 = getelementptr inbounds i64, i64* %2, i64 3
store i64 %1, i64* %4
%5 = getelementptr inbounds i64, i64* %2, i64 2
store i64 %1, i64* %5
%6 = getelementptr inbounds i64, i64* %2, i64 1
store i64 %1, i64* %6
store i64 %1, i64* %2
%7 = tail call i32 @rgph_murmur32_mix0(i32 %0, i64* %2)
%8 = tail call i32 @rgph_murmur32_finalise(i32 4, i64* %2)
ret void
}
int gang() {
#pragma acc loop gang worker vector
  for (int i = 0; i < 10; i++) {
  }
  return 1;
}


x86 assembly (clang, -O0):
<gang>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1128 <gang+0x28>
jmp    111a <gang+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <gang+0xb>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gang>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @gang() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
ret i32 1
}

LLVM IR (-O2):
define i32 @gang() {
ret i32 1
}
/* Variables and functions */
double db_pos(double);
double psd_estimate(double re, double im) {
  double power;
  double psd;
  power = re * re + im * im;
  psd = 90.302 + db_pos(power);
  return psd;
}


x86 assembly (clang, -O0):
<psd_estimate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <db_pos@plt>
movaps %xmm0,%xmm1
movsd  0xea8(%rip),%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psd_estimate>:
push   %rax
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
call   1030 <db_pos@plt>
addsd  0xed6(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @psd_estimate(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %3
%8 = load double, double* %3
%9 = load double, double* %4
%10 = load double, double* %4
%11 = fmul double %9, %10
%12 = call double @llvm.fmuladd.f64(double %7, double %8, double %11)
store double %12, double* %5
%13 = load double, double* %5
%14 = call double @db_pos(double %13)
%15 = fadd double 9.030200e+01, %14
store double %15, double* %6
%16 = load double, double* %6
ret double %16
}

LLVM IR (-O2):
define double @psd_estimate(double %0, double %1) {
%3 = fmul double %1, %1
%4 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %3)
%5 = tail call double @db_pos(double %4)
%6 = fadd double %5, 9.030200e+01
ret double %6
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ internal_fiat_p224_nonzero(uintptr_t);
void fiat_p224_nonzero(uint32_t *out1, const uint32_t arg1[7]) {
  *out1 = (uint32_t)internal_fiat_p224_nonzero((uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p224_nonzero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <internal_fiat_p224_nonzero@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p224_nonzero>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <internal_fiat_p224_nonzero@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @fiat_p224_nonzero(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = ptrtoint i64* %5 to i64
%7 = call i64 @internal_fiat_p224_nonzero(i64 %6)
%8 = load i64*, i64** %3
store i64 %7, i64* %8
ret void
}

LLVM IR (-O2):
define void @fiat_p224_nonzero(i64* nocapture writeonly %0, i64* %1) {
%3 = ptrtoint i64* %1 to i64
%4 = tail call i64 @internal_fiat_p224_nonzero(i64 %3)
store i64 %4, i64* %0
ret void
}
void ft_striter(char *s, void (*f)(char *)) {
  if (s && f) {
    while (*s)
      (void)f(s++);
  }
}


x86 assembly (clang, -O0):
<ft_striter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1157 <ft_striter+0x57>
cmpq   $0x0,-0x10(%rbp)
je     1157 <ft_striter+0x57>
jmp    112b <ft_striter+0x2b>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1152 <ft_striter+0x52>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
mov    %rdi,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
call   *%rax
jmp    112b <ft_striter+0x2b>
jmp    1157 <ft_striter+0x57>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_striter>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1133 <ft_striter+0x33>
mov    %rsi,%r14
test   %rsi,%rsi
je     1133 <ft_striter+0x33>
mov    %rdi,%rbx
cmpb   $0x0,(%rdi)
je     1133 <ft_striter+0x33>
nopw   0x0(%rax,%rax,1)
lea    0x1(%rbx),%r15
mov    %rbx,%rdi
call   *%r14
cmpb   $0x0,0x1(%rbx)
mov    %r15,%rbx
jne    1120 <ft_striter+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @ft_striter(i8* %0, void (i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i8*)*
store i8* %0, i8** %3
store void (i8*)* %1, void (i8*)** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %20
7: ; preds = %2
%8 = load void (i8*)*, void (i8*)** %4
%9 = icmp ne void (i8*)* %8, null
br i1 %9, label %10, label %20
10: ; preds = %7
br label %11
11: ; preds = %15, %10
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = icmp ne i8 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load void (i8*)*, void (i8*)** %4
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
br label %11
19: ; preds = %11
br label %20
20: ; preds = %19, %7, %2
ret void
}

LLVM IR (-O2):
define void @ft_striter(i8* %0, void (i8*)* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne void (i8*)* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = load i8, i8* %0
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %6, %9
%10 = phi i8* [ %11, %9 ], [ %0, %6 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
tail call void %1(i8* %10)
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %9
14: ; preds = %9, %6, %2
ret void
}
void SDHostIntEnable(unsigned long ulBase, unsigned long ulIntFlags) {
  (*((volatile unsigned long *)(0x44026000 + 0x00000094))) = (ulIntFlags >> 30);
  (*((volatile unsigned long *)(ulBase + 0x00000238))) |=
      (ulIntFlags & 0x3FFFFFFF);
}


x86 assembly (clang, -O0):
<SDHostIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
shr    $0x1e,%rcx
mov    $0x44026094,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rdx
and    $0x3fffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x238(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x238(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDHostIntEnable>:
mov    %rsi,%rax
shr    $0x1e,%rax
mov    %rax,0x44026094
44
and    $0x3fffffff,%esi
or     %rsi,0x238(%rdi)
ret

LLVM IR (-O0):
define void @SDHostIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = lshr i64 %5, 30
store volatile i64 %6, i64* inttoptr (i64 1141006484 to i64*)
%7 = load i64, i64* %4
%8 = and i64 %7, 1073741823
%9 = load i64, i64* %3
%10 = add i64 %9, 568
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}

LLVM IR (-O2):
define void @SDHostIntEnable(i64 %0, i64 %1) {
%3 = lshr i64 %1, 30
store volatile i64 %3, i64* inttoptr (i64 1141006484 to i64*)
%4 = and i64 %1, 1073741823
%5 = add i64 %0, 568
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = or i64 %7, %4
store volatile i64 %8, i64* %6
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char const *);
char *strstr(char *, char const *);
int remove_suffix(char *name, const char *sfx) {
  char *p;
  p = strstr(name, sfx);
  if (!p)
    return 0;
  if (strcmp(p, sfx))
    return 0;
  *p = 0;
  return 1;
}


x86 assembly (clang, -O0):
<remove_suffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1158 <remove_suffix+0x38>
movl   $0x0,-0x4(%rbp)
jmp    1189 <remove_suffix+0x69>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     117b <remove_suffix+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    1189 <remove_suffix+0x69>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_suffix>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbp
call   1040 <strstr@plt>
xor    %r14d,%r14d
test   %rax,%rax
je     1150 <remove_suffix+0x30>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %rbp,%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
jne    1150 <remove_suffix+0x30>
movb   $0x0,(%rbx)
mov    $0x1,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @remove_suffix(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i8* @strstr(i8* %7, i8* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 0, i32* %3
br label %21
13: ; preds = %2
%14 = load i8*, i8** %6
%15 = load i8*, i8** %5
%16 = call i64 @strcmp(i8* %14, i8* %15)
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %13
store i32 0, i32* %3
br label %21
19: ; preds = %13
%20 = load i8*, i8** %6
store i8 0, i8* %20
store i32 1, i32* %3
br label %21
21: ; preds = %19, %18, %12
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @remove_suffix(i8* %0, i8* %1) {
%3 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i64 @strcmp(i8* %3, i8* %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %5
store i8 0, i8* %3
br label %9
9: ; preds = %5, %2, %8
%10 = phi i32 [ 1, %8 ], [ 0, %2 ], [ 0, %5 ]
ret i32 %10
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
scalar_t__ isupper(char);
uint8_t getxdigit(char c) {
  if (isupper(c))
    return 10 + (c - 'A');
  return 10 + (c - 'a');
}


x86 assembly (clang, -O0):
<getxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     1143 <getxdigit+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1150 <getxdigit+0x40>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
shl    $0x5,%ecx
lea    (%rcx,%rbx,1),%eax
add    $0xffffffa9,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getxdigit(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isupper(i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 65
%11 = add nsw i32 10, %10
store i32 %11, i32* %2
br label %17
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 97
%16 = add nsw i32 10, %15
store i32 %16, i32* %2
br label %17
17: ; preds = %12, %7
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @getxdigit(i8 signext %0) {
%2 = tail call i64 @isupper(i8 signext %0)
%3 = icmp eq i64 %2, 0
%4 = sext i8 %0 to i32
%5 = select i1 %3, i32 -87, i32 -55
%6 = add nsw i32 %5, %4
ret i32 %6
}
int test_imm_E8uint16_mem(unsigned short *val) {
  return ((*val) & (0xE8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E8uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xe8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E8uint16_mem>:
testb  $0xe8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E8uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 232
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E8uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 232
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello, kuyer!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"hello, kuyer!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"hello, kuyer!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int /*<<< orphan*/ ss_flags;
};
typedef TYPE_1__ stack_t;

/* Variables and functions */
int /*<<< orphan*/ SA_ONSTACK;
scalar_t__ sigaltstack(TYPE_1__ *, TYPE_1__ *);
void sigsegv_reset_onstack_flag(void) {
  stack_t ss;
  if (sigaltstack(NULL, &ss) >= 0) {
    ss.ss_flags &= ~SA_ONSTACK;
    sigaltstack(&ss, NULL);
  }
}


x86 assembly (clang, -O0):
<sigsegv_reset_onstack_flag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
lea    -0x8(%rbp),%rsi
call   1030 <sigaltstack@plt>
cmp    $0x0,%rax
jl     114e <sigsegv_reset_onstack_flag+0x3e>
mov    0x2eb2(%rip),%rax
mov    (%rax),%eax
xor    $0xffffffff,%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <sigaltstack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigsegv_reset_onstack_flag>:
push   %rax
mov    %rsp,%rsi
xor    %edi,%edi
call   1030 <sigaltstack@plt>
test   %rax,%rax
js     1138 <sigsegv_reset_onstack_flag+0x28>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
not    %eax
and    %eax,(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <sigaltstack@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { i32 }
@SA_ONSTACK = global i32 0
define void @sigsegv_reset_onstack_flag() {
%1 = alloca %struct.TYPE_4__
%2 = call i64 @sigaltstack(%struct.TYPE_4__* null, %struct.TYPE_4__* %1)
%3 = icmp sge i64 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %0
%5 = load i32, i32* @SA_ONSTACK
%6 = xor i32 %5, -1
%7 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %1, i32 0, i32 0
%8 = load i32, i32* %7
%9 = and i32 %8, %6
store i32 %9, i32* %7
%10 = call i64 @sigaltstack(%struct.TYPE_4__* %1, %struct.TYPE_4__* null)
br label %11
11: ; preds = %4, %0
ret void
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { i32 }
@SA_ONSTACK = global i32 0
define void @sigsegv_reset_onstack_flag() {
%1 = alloca %struct.TYPE_4__
%2 = bitcast %struct.TYPE_4__* %1 to i8*
%3 = call i64 @sigaltstack(%struct.TYPE_4__* null, %struct.TYPE_4__* %1)
%4 = icmp sgt i64 %3, -1
br i1 %4, label %5, label %12
5: ; preds = %0
%6 = load i32, i32* @SA_ONSTACK
%7 = xor i32 %6, -1
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %1, i64 0, i32 0
%9 = load i32, i32* %8
%10 = and i32 %9, %7
store i32 %10, i32* %8
%11 = call i64 @sigaltstack(%struct.TYPE_4__* %1, %struct.TYPE_4__* null)
br label %12
12: ; preds = %5, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bd2gcj(double, double, double *, double *);
int /*<<< orphan*/ gcj2wgs(double, double, double *, double *);
void bd2wgs(double bdlat, double bdlng, double *wgsLat, double *wgsLng) {
  double gcjlat, gcjlng;
  bd2gcj(bdlat, bdlng, &gcjlat, &gcjlng);
  gcj2wgs(gcjlat, gcjlng, wgsLat, wgsLng);
}


x86 assembly (clang, -O0):
<bd2wgs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    -0x28(%rbp),%rdi
lea    -0x30(%rbp),%rsi
call   1040 <bd2gcj@plt>
movsd  -0x28(%rbp),%xmm0
movsd  -0x30(%rbp),%xmm1
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <gcj2wgs@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bd2wgs>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1040 <bd2gcj@plt>
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <gcj2wgs@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @bd2wgs(double %0, double %1, double* %2, double* %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double*
%8 = alloca double*
%9 = alloca double
%10 = alloca double
store double %0, double* %5
store double %1, double* %6
store double* %2, double** %7
store double* %3, double** %8
%11 = load double, double* %5
%12 = load double, double* %6
%13 = call i32 @bd2gcj(double %11, double %12, double* %9, double* %10)
%14 = load double, double* %9
%15 = load double, double* %10
%16 = load double*, double** %7
%17 = load double*, double** %8
%18 = call i32 @gcj2wgs(double %14, double %15, double* %16, double* %17)
ret void
}

LLVM IR (-O2):
define void @bd2wgs(double %0, double %1, double* %2, double* %3) {
%5 = alloca double
%6 = alloca double
%7 = bitcast double* %5 to i8*
%8 = bitcast double* %6 to i8*
%9 = call i32 @bd2gcj(double %0, double %1, double* %5, double* %6)
%10 = load double, double* %5
%11 = load double, double* %6
%12 = call i32 @gcj2wgs(double %10, double %11, double* %2, double* %3)
ret void
}
void fsll_dump(const char *base, const char *headfile, const char *tailfile) {
  (void)base;
  (void)headfile;
  (void)tailfile;
}


x86 assembly (clang, -O0):
<fsll_dump>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsll_dump>:
ret

LLVM IR (-O0):
define void @fsll_dump(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
ret void
}

LLVM IR (-O2):
define void @fsll_dump(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fun01(int);
int /*<<< orphan*/ fun02(int);
int /*<<< orphan*/ fun03(int);
int /*<<< orphan*/ fun04(int);
int selector(int f, int n) {
  if (f == 1)
    fun01(n);
  if (f == 2)
    fun02(n);
  if (f == 3)
    fun03(n);
  if (f == 4)
    fun04(n);
  return 0;
}


x86 assembly (clang, -O0):
<selector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1160 <selector+0x20>
mov    -0x8(%rbp),%edi
call   1060 <fun01@plt>
cmpl   $0x2,-0x4(%rbp)
jne    1172 <selector+0x32>
mov    -0x8(%rbp),%edi
call   1040 <fun02@plt>
cmpl   $0x3,-0x4(%rbp)
jne    1184 <selector+0x44>
mov    -0x8(%rbp),%edi
call   1050 <fun03@plt>
cmpl   $0x4,-0x4(%rbp)
jne    1196 <selector+0x56>
mov    -0x8(%rbp),%edi
call   1030 <fun04@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<selector>:
push   %rax
add    $0xffffffff,%edi
cmp    $0x3,%edi
ja     117b <selector+0x3b>
lea    0xeb0(%rip),%rax
movslq (%rax,%rdi,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    %esi,%edi
call   1060 <fun01@plt>
jmp    117b <selector+0x3b>
mov    %esi,%edi
call   1040 <fun02@plt>
jmp    117b <selector+0x3b>
mov    %esi,%edi
call   1050 <fun03@plt>
jmp    117b <selector+0x3b>
mov    %esi,%edi
call   1030 <fun04@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @selector(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = call i32 @fun01(i32 %8)
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 2
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = call i32 @fun02(i32 %14)
br label %16
16: ; preds = %13, %10
%17 = load i32, i32* %3
%18 = icmp eq i32 %17, 3
br i1 %18, label %19, label %22
19: ; preds = %16
%20 = load i32, i32* %4
%21 = call i32 @fun03(i32 %20)
br label %22
22: ; preds = %19, %16
%23 = load i32, i32* %3
%24 = icmp eq i32 %23, 4
br i1 %24, label %25, label %28
25: ; preds = %22
%26 = load i32, i32* %4
%27 = call i32 @fun04(i32 %26)
br label %28
28: ; preds = %25, %22
ret i32 0
}

LLVM IR (-O2):
define i32 @selector(i32 %0, i32 %1) {
switch i32 %0, label %11 [
i32 1, label %3
i32 2, label %5
i32 3, label %7
i32 4, label %9
]
3: ; preds = %2
%4 = tail call i32 @fun01(i32 %1)
br label %11
5: ; preds = %2
%6 = tail call i32 @fun02(i32 %1)
br label %11
7: ; preds = %2
%8 = tail call i32 @fun03(i32 %1)
br label %11
9: ; preds = %2
%10 = tail call i32 @fun04(i32 %1)
br label %11
11: ; preds = %7, %5, %3, %2, %9
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_REQ;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int ASN1_item_i2d_fp(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                     int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_REQ_it;
int i2d_X509_REQ_fp(FILE *fp, X509_REQ *req) {
  return ASN1_item_i2d_fp(&X509_REQ_it, fp, req);
}


x86 assembly (clang, -O0):
<i2d_X509_REQ_fp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    0x2ec9(%rip),%rdi
call   1030 <ASN1_item_i2d_fp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_X509_REQ_fp>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2edb(%rip),%rdi
jmp    1030 <ASN1_item_i2d_fp@plt>

LLVM IR (-O0):
@X509_REQ_it = global i32 0
define i32 @i2d_X509_REQ_fp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @ASN1_item_i2d_fp(i32* @X509_REQ_it, i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
@X509_REQ_it = global i32 0
define i32 @i2d_X509_REQ_fp(i32* %0, i32* %1) {
%3 = tail call i32 @ASN1_item_i2d_fp(i32* @X509_REQ_it, i32* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
void print_args(int argc, char **argv) {
  int i;
  for (i = 1; i < argc; i++) {
    printf(" * argv[%d]: '%s'\n", i, argv[i]);
  }
}


x86 assembly (clang, -O0):
<print_args>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115b <print_args+0x4b>
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <print_args+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_args>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
cmp    $0x2,%edi
jl     1147 <print_args+0x37>
mov    %rsi,%r14
mov    %edi,%r12d
mov    $0x1,%ebx
lea    0xed1(%rip),%r15
nop
mov    (%r14,%rbx,8),%rdx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print_args+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [19 x i8] c" * argv[%d]: '%s'\0A\00"
define void @print_args(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 1, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i8**, i8*** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %16)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c" * argv[%d]: '%s'\0A\00"
define void @print_args(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = trunc i64 %7 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %10, i8* %9)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ smooth_lib_present_buf(char *, scalar_t__);
scalar_t__ strlen(char *);
int _main() {
  char *nice = "helloword";
  smooth_lib_present_buf(nice, strlen(nice) + 1);
  return 0;
}


x86 assembly (clang, -O0):
<_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rsi
add    $0x1,%rsi
call   1040 <smooth_lib_present_buf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xa,%esi
call   1030 <smooth_lib_present_buf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"helloword\00"
define i32 @_main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = load i8*, i8** %1
%4 = call i64 @strlen(i8* %3)
%5 = add nsw i64 %4, 1
%6 = call i32 @smooth_lib_present_buf(i8* %2, i64 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"helloword\00"
define i32 @_main() {
%1 = tail call i32 @smooth_lib_present_buf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 10)
ret i32 0
}
void eat_space(char **token) {
  while ((' ' == **token) || ('\t' == **token)) {
    ++(*token);
  }
}


x86 assembly (clang, -O0):
<eat_space>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%edx
mov    $0x1,%al
mov    $0x20,%ecx
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
je     113b <eat_space+0x3b>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x9,%eax
cmp    %ecx,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    114b <eat_space+0x4b>
jmp    115e <eat_space+0x5e>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    1108 <eat_space+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eat_space>:
mov    (%rdi),%rax
jmp    1113 <eat_space+0x13>
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rax,(%rdi)
add    $0x1,%rax
movzbl -0x1(%rax),%ecx
cmp    $0x20,%cl
je     1110 <eat_space+0x10>
cmp    $0x9,%cl
je     1110 <eat_space+0x10>
ret

LLVM IR (-O0):
define void @eat_space(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
br label %3
3: ; preds = %17, %1
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 32, %7
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 9, %13
br label %15
15: ; preds = %9, %3
%16 = phi i1 [ true, %3 ], [ %14, %9 ]
br i1 %16, label %17, label %21
17: ; preds = %15
%18 = load i8**, i8*** %2
%19 = load i8*, i8** %18
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %18
br label %3
21: ; preds = %15
ret void
}

LLVM IR (-O2):
define void @eat_space(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %6, %1
%4 = phi i8* [ %7, %6 ], [ %2, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %8 [
i8 32, label %6
i8 9, label %6
]
6: ; preds = %3, %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %7, i8** %0
br label %3
8: ; preds = %3
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t sign_extend(uint8_t data) { return data + (data < 0x80 ? 0 : 0xff00); }


x86 assembly (clang, -O0):
<sign_extend>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%esi
mov    $0xff00,%ecx
xor    %edx,%edx
cmp    $0x80,%esi
cmovl  %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign_extend>:
lea    0xff00(%rdi),%eax
cmp    $0x80,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @sign_extend(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 128
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 0, i32 65280
%8 = add nsw i32 %3, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @sign_extend(i32 %0) {
%2 = icmp slt i32 %0, 128
%3 = select i1 %2, i32 0, i32 65280
%4 = add nsw i32 %3, %0
ret i32 %4
}