xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, ...);
void print_string_var(const char *varname, const char *value) {
  if (!value) {
    printf("\t#%s\n", varname);
  } else {
    printf("\t%s \"%s\"\n", varname, value);
  }
}


x86 assembly (clang, -O0):
<print_string_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1142 <print_string_var+0x32>
mov    -0x8(%rbp),%rsi
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1158 <print_string_var+0x48>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xeb5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_string_var>:
mov    %rsi,%rdx
mov    %rdi,%rsi
test   %rdx,%rdx
je     1129 <print_string_var+0x19>
lea    0xee4(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>
lea    0xed0(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\09#%s\0A\00"
@.str.1 = [10 x i8] c"\09%s \22%s\22\0A\00"
define void @print_string_var(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp ne i8* %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %8)
br label %14
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = load i8*, i8** %4
%13 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %11, i8* %12)
br label %14
14: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\09#%s\0A\00"
@.str.1 = [10 x i8] c"\09%s \22%s\22\0A\00"
define void @print_string_var(i8* %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %8
6: ; preds = %2
%7 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %0, i8* %1)
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR2;
int /*<<< orphan*/ kill(int, int /*<<< orphan*/);
int main() { kill(1, SIGUSR2); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <kill@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <kill@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGUSR2 = global i32 0
define i32 @main() {
%1 = load i32, i32* @SIGUSR2
%2 = call i32 @kill(i32 1, i32 %1)
ret i32 0
}

LLVM IR (-O2):
@SIGUSR2 = global i32 0
define i32 @main() {
%1 = load i32, i32* @SIGUSR2
%2 = tail call i32 @kill(i32 1, i32 %1)
ret i32 0
}
int s2(int num) {
  long NUM = (long)num;
  long root = num & 1 ? 1 : 2;
  ;
  int step = 2;
  while (root * root < NUM) {
    root += step;
  }
  return root * root == NUM;
}


x86 assembly (clang, -O0):
<s2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edx
and    $0x1,%edx
mov    $0x2,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
cltq
mov    %rax,-0x18(%rbp)
movl   $0x2,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1156 <s2+0x56>
movslq -0x1c(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1132 <s2+0x32>
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2>:
movslq %edi,%rax
mov    %eax,%edx
and    $0x1,%edx
mov    $0x2,%ecx
sub    %rdx,%rcx
mov    %rcx,%rdx
imul   %rcx,%rdx
add    $0x2,%rcx
cmp    %rax,%rdx
jl     1110 <s2+0x10>
sete   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @s2(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
store i64 %7, i64* %3
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 1, i32 2
%13 = sext i32 %12 to i64
store i64 %13, i64* %4
store i32 2, i32* %5
br label %14
14: ; preds = %20, %1
%15 = load i64, i64* %4
%16 = load i64, i64* %4
%17 = mul nsw i64 %15, %16
%18 = load i64, i64* %3
%19 = icmp slt i64 %17, %18
br i1 %19, label %20, label %25
20: ; preds = %14
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = load i64, i64* %4
%24 = add nsw i64 %23, %22
store i64 %24, i64* %4
br label %14
25: ; preds = %14
%26 = load i64, i64* %4
%27 = load i64, i64* %4
%28 = mul nsw i64 %26, %27
%29 = load i64, i64* %3
%30 = icmp eq i64 %28, %29
%31 = zext i1 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @s2(i32 %0) {
%2 = sext i32 %0 to i64
%3 = and i32 %0, 1
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i64 2, i64 1
br label %6
6: ; preds = %6, %1
%7 = phi i64 [ %5, %1 ], [ %10, %6 ]
%8 = mul nsw i64 %7, %7
%9 = icmp slt i64 %8, %2
%10 = add nuw nsw i64 %7, 2
br i1 %9, label %6, label %11
11: ; preds = %6
%12 = icmp eq i64 %8, %2
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned int *);
void freeBitVectors(unsigned int **v, int n) {
  int i;
  for (i = 1; i < n; i++)
    free(v[i]);
}


x86 assembly (clang, -O0):
<freeBitVectors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <freeBitVectors+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <freeBitVectors+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeBitVectors>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%esi
jl     1142 <freeBitVectors+0x32>
mov    %rdi,%r14
mov    %esi,%r15d
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <freeBitVectors+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @freeBitVectors(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = call i32 @free(i32* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @freeBitVectors(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = load i32*, i32** %8
%10 = tail call i32 @free(i32* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
int whitespace(char c) { return (c == ' ' || c == '\t' || c == '\n') ? 1 : 0; }


x86 assembly (clang, -O0):
<whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     113b <whitespace+0x3b>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     113b <whitespace+0x3b>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<whitespace>:
mov    $0x1,%eax
cmp    $0x9,%dil
je     1111 <whitespace+0x11>
cmp    $0x20,%dil
jne    1112 <whitespace+0x12>
ret
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @whitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 1, i32 0
ret i32 %17
}

LLVM IR (-O2):
define i32 @whitespace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 10
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ]
ret i32 %6
}
void cmd_quit(char *prefix, char **params, int n_params) {}


x86 assembly (clang, -O0):
<cmd_quit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_quit>:
ret

LLVM IR (-O0):
define void @cmd_quit(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @cmd_quit(i8* nocapture %0, i8** nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ output_with_tab(char *);
gen_def_word() { output_with_tab(".dw\t"); }


x86 assembly (clang, -O0):
<gen_def_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <output_with_tab@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_def_word>:
lea    0xee9(%rip),%rdi
jmp    1030 <output_with_tab@plt>

LLVM IR (-O0):
@.str = [5 x i8] c".dw\09\00"
define i32 @gen_def_word() {
%1 = alloca i32
%2 = call i32 @output_with_tab(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [5 x i8] c".dw\09\00"
define i32 @gen_def_word() {
%1 = tail call i32 @output_with_tab(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int main(void) {
  int a;
  int *b;
  b = &a;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32* %2, i32** %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cgldlb(int n) { ngen("%s\tal,[bp%+d]", "mov", n); }


x86 assembly (clang, -O0):
<cgldlb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgldlb>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"%s\09al,[bp%+d]\00"
@.str.1 = [4 x i8] c"mov\00"
define void @cgldlb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ngen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"%s\09al,[bp%+d]\00"
@.str.1 = [4 x i8] c"mov\00"
define void @cgldlb(i32 %0) {
%2 = tail call i32 @ngen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
unsigned long mask(unsigned long field, unsigned long mask) {
  return field & ~mask;
}


x86 assembly (clang, -O0):
<mask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mask>:
mov    %rsi,%rax
not    %rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @mask(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = xor i64 %6, -1
%8 = and i64 %5, %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @mask(i64 %0, i64 %1) {
%3 = xor i64 %1, -1
%4 = and i64 %3, %0
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
void t_destroy() { endwin(); }


x86 assembly (clang, -O0):
<t_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_destroy>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @t_destroy() {
%1 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @t_destroy() {
%1 = tail call i32 (...) @endwin()
ret void
}
int ls31(unsigned int a) { return (a >> 31) != 0; }


x86 assembly (clang, -O0):
<ls31>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1f,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls31>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @ls31(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 31
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ls31(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3;

/* Variables and functions */
int sqlite3_exec(int /*<<< orphan*/ *, char *, int /*<<< orphan*/,
                 int /*<<< orphan*/, char **);
int /*<<< orphan*/ strncpy(char *, char *, int);
int ctable(sqlite3 *db) {
  char sql[2048];
  char *err = 0;
  strncpy(sql,
          "DROP TABLE IF EXISTS id;"
          "CREATE TABLE id(lid INT, uid TEXT, fn TEXT,"
          " org TEXT, ph TEXT, em TEXT);",
          2048);
  int dbrc = sqlite3_exec(db, sql, 0, 0, &err);
  return dbrc;
}


x86 assembly (clang, -O0):
<ctable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x820,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x818(%rbp)
lea    -0x810(%rbp),%rdi
lea    0xeb8(%rip),%rsi
mov    $0x800,%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rdi
lea    -0x810(%rbp),%rsi
xor    %ecx,%ecx
lea    -0x818(%rbp),%r8
mov    %ecx,%edx
call   1040 <sqlite3_exec@plt>
mov    %eax,-0x81c(%rbp)
mov    -0x81c(%rbp),%eax
add    $0x820,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctable>:
push   %r14
push   %rbx
sub    $0x818,%rsp
mov    %rdi,%rbx
movq   $0x0,0x8(%rsp)
lea    0xec3(%rip),%rsi
lea    0x10(%rsp),%r14
mov    %r14,%rdi
mov    $0x800,%edx
call   1030 <strncpy@plt>
lea    0x8(%rsp),%r8
mov    %rbx,%rdi
mov    %r14,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
call   1040 <sqlite3_exec@plt>
add    $0x818,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [97 x i8] c"DROP TABLE IF EXISTS id;CREATE TABLE id(lid INT, uid TEXT, fn TEXT, org TEXT, ph TEXT, em TEXT);\00"
define i32 @ctable(i32* %0) {
%2 = alloca i32*
%3 = alloca [2048 x i8]
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %2
store i8* null, i8** %4
%6 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%7 = call i32 @strncpy(i8* %6, i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str, i64 0, i64 0), i32 2048)
%8 = load i32*, i32** %2
%9 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%10 = call i32 @sqlite3_exec(i32* %8, i8* %9, i32 0, i32 0, i8** %4)
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
@.str = [97 x i8] c"DROP TABLE IF EXISTS id;CREATE TABLE id(lid INT, uid TEXT, fn TEXT, org TEXT, ph TEXT, em TEXT);\00"
define i32 @ctable(i32* %0) {
%2 = alloca [2048 x i8]
%3 = alloca i8*
%4 = getelementptr inbounds [2048 x i8], [2048 x i8]* %2, i64 0, i64 0
%5 = bitcast i8** %3 to i8*
store i8* null, i8** %3
%6 = call i32 @strncpy(i8* %4, i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str, i64 0, i64 0), i32 2048)
%7 = call i32 @sqlite3_exec(i32* %0, i8* %4, i32 0, i32 0, i8** %3)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Config_set_str(char const *, char *);
int /*<<< orphan*/ sprintf(char *, char *, unsigned int);
void Config_set_int(const char *par_name, unsigned int value) {
  char strval[16];
  sprintf(strval, "0x%04x", value);
  Config_set_str(par_name, strval);
}


x86 assembly (clang, -O0):
<Config_set_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xec3(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <Config_set_str@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Config_set_int>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %esi,%edx
mov    %rdi,%rbx
lea    0xecd(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <Config_set_str@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"0x%04x\00"
define void @Config_set_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [16 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %4
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i8*, i8** %3
%10 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%11 = call i32 @Config_set_str(i8* %9, i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"0x%04x\00"
define void @Config_set_int(i8* %0, i32 %1) {
%3 = alloca [16 x i8]
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
%6 = call i32 @Config_set_str(i8* %0, i8* %4)
ret void
}
/* Variables and functions */
int R(int /*<<< orphan*/);
int /*<<< orphan*/ cudaHostGetDevicePointer(void **, void *, unsigned int);
int HostGetDevicePointer(void **pDevice, void *pHost, unsigned int flags) {
  return R(cudaHostGetDevicePointer(pDevice, pHost, flags));
}


x86 assembly (clang, -O0):
<HostGetDevicePointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <cudaHostGetDevicePointer@plt>
mov    %eax,%edi
call   1030 <R@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HostGetDevicePointer>:
push   %rax
call   1040 <cudaHostGetDevicePointer@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <R@plt>

LLVM IR (-O0):
define i32 @HostGetDevicePointer(i8** %0, i8* %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @cudaHostGetDevicePointer(i8** %7, i8* %8, i32 %9)
%11 = call i32 @R(i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @HostGetDevicePointer(i8** %0, i8* %1, i32 %2) {
%4 = tail call i32 @cudaHostGetDevicePointer(i8** %0, i8* %1, i32 %2)
%5 = tail call i32 @R(i32 %4)
ret i32 %5
}
/* Type definitions */
struct cpufreq_affected_cpus {
  int dummy;
};

/* Variables and functions */
struct cpufreq_affected_cpus *sysfs_get_cpu_list(unsigned int, char *);
struct cpufreq_affected_cpus *sysfs_get_related_cpus(unsigned int cpu) {
  return sysfs_get_cpu_list(cpu, "related_cpus");
}


x86 assembly (clang, -O0):
<sysfs_get_related_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <sysfs_get_cpu_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_get_related_cpus>:
lea    0xee9(%rip),%rsi
jmp    1030 <sysfs_get_cpu_list@plt>

LLVM IR (-O0):
%struct.cpufreq_affected_cpus = type { i32 }
@.str = [13 x i8] c"related_cpus\00"
define %struct.cpufreq_affected_cpus* @sysfs_get_related_cpus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_affected_cpus* @sysfs_get_cpu_list(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret %struct.cpufreq_affected_cpus* %4
}

LLVM IR (-O2):
%struct.cpufreq_affected_cpus = type { i32 }
@.str = [13 x i8] c"related_cpus\00"
define %struct.cpufreq_affected_cpus* @sysfs_get_related_cpus(i32 %0) {
%2 = tail call %struct.cpufreq_affected_cpus* @sysfs_get_cpu_list(i32 %0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret %struct.cpufreq_affected_cpus* %2
}
int my_isdigit(char c, register char *base) {
  register int i;
  i = 0;
  while (base[i] != '\0') {
    if (c == base[i])
      return (1);
    i++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<my_isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115c <my_isdigit+0x5c>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    114e <my_isdigit+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1163 <my_isdigit+0x63>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <my_isdigit+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_isdigit>:
mov    (%rsi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1120 <my_isdigit+0x20>
add    $0x1,%rsi
nopl   0x0(%rax)
cmp    %dil,%cl
je     1121 <my_isdigit+0x21>
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <my_isdigit+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @my_isdigit(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i32
store i8 %0, i8* %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %26, %2
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %29
15: ; preds = %7
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = load i8*, i8** %5
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %17, %23
br i1 %24, label %25, label %26
25: ; preds = %15
store i32 1, i32* %3
br label %30
26: ; preds = %15
%27 = load i32, i32* %6
%28 = add nsw i32 %27, 1
store i32 %28, i32* %6
br label %7
29: ; preds = %7
store i32 0, i32* %3
br label %30
30: ; preds = %29, %25
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @my_isdigit(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %9
5: ; preds = %9
%6 = getelementptr inbounds i8, i8* %1, i64 %13
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %2, %5
%10 = phi i64 [ %13, %5 ], [ 0, %2 ]
%11 = phi i8 [ %7, %5 ], [ %3, %2 ]
%12 = icmp eq i8 %11, %0
%13 = add nuw i64 %10, 1
br i1 %12, label %14, label %5
14: ; preds = %9, %5, %2
%15 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %9 ]
ret i32 %15
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ CDC_BulkIn();
int /*<<< orphan*/ CDC_BulkOut();
void USB_EndPoint2(uint32_t event) {
  switch (event) {
  case 2:
    CDC_BulkOut();
    break;
  case 3:
    CDC_BulkIn();
    break;
  }
}


x86 assembly (clang, -O0):
<USB_EndPoint2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x2,%eax
je     1150 <USB_EndPoint2+0x30>
jmp    113f <USB_EndPoint2+0x1f>
mov    -0x8(%rbp),%eax
sub    $0x3,%eax
je     115c <USB_EndPoint2+0x3c>
jmp    1163 <USB_EndPoint2+0x43>
mov    $0x0,%al
call   1040 <CDC_BulkOut@plt>
jmp    1163 <USB_EndPoint2+0x43>
mov    $0x0,%al
call   1030 <CDC_BulkIn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_EndPoint2>:
cmp    $0x3,%edi
je     1131 <USB_EndPoint2+0x11>
cmp    $0x2,%edi
jne    1138 <USB_EndPoint2+0x18>
xor    %eax,%eax
jmp    1040 <CDC_BulkOut@plt>
xor    %eax,%eax
jmp    1030 <CDC_BulkIn@plt>
ret

LLVM IR (-O0):
define void @USB_EndPoint2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 2, label %4
i32 3, label %6
]
4: ; preds = %1
%5 = call i32 (...) @CDC_BulkOut()
br label %8
6: ; preds = %1
%7 = call i32 (...) @CDC_BulkIn()
br label %8
8: ; preds = %1, %6, %4
ret void
}

LLVM IR (-O2):
define void @USB_EndPoint2(i32 %0) {
switch i32 %0, label %6 [
i32 2, label %2
i32 3, label %4
]
2: ; preds = %1
%3 = tail call i32 (...) @CDC_BulkOut()
br label %6
4: ; preds = %1
%5 = tail call i32 (...) @CDC_BulkIn()
br label %6
6: ; preds = %1, %4, %2
ret void
}
/* Variables and functions */
int max(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 100;
  int b = 200;
  int ret;
  ret = max(a, b);
  printf("Max value is: %d\n", ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x64,-0x8(%rbp)
movl   $0xc8,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <max@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
mov    $0xc8,%esi
call   1040 <max@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Max value is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 100, i32* %2
store i32 200, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @max(i32 %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"Max value is: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @max(i32 100, i32 200)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int is_file_exists(const char *pathname) {
  (void)pathname;
  return -1;
}


x86 assembly (clang, -O0):
<is_file_exists>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_file_exists>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @is_file_exists(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @is_file_exists(i8* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ lookNarray(char *, int);
void lookpointer8_(char *ppp) { lookNarray(ppp, 8); }


x86 assembly (clang, -O0):
<lookpointer8_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <lookNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookpointer8_>:
mov    $0x8,%esi
jmp    1030 <lookNarray@plt>

LLVM IR (-O0):
define void @lookpointer8_(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @lookNarray(i8* %3, i32 8)
ret void
}

LLVM IR (-O2):
define void @lookpointer8_(i8* %0) {
%2 = tail call i32 @lookNarray(i8* %0, i32 8)
ret void
}
void entrar_matricula() {}


x86 assembly (clang, -O0):
<entrar_matricula>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entrar_matricula>:
ret

LLVM IR (-O0):
define void @entrar_matricula() {
ret void
}

LLVM IR (-O2):
define void @entrar_matricula() {
ret void
}
void applyReverb(short buffer[]) {
  int delayMilliseconds = 500;
  int delaySamples = (int)((float)delayMilliseconds * 44.1f);
  float decay = 0.5f;
  int i = 0;
}


x86 assembly (clang, -O0):
<applyReverb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1f4,-0xc(%rbp)
cvtsi2ssl -0xc(%rbp),%xmm0
movss  0xee8(%rip),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x10(%rbp)
movss  0xed1(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<applyReverb>:
ret

LLVM IR (-O0):
define void @applyReverb(i16* %0) {
%2 = alloca i16*
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
%6 = alloca i32
store i16* %0, i16** %2
store i32 500, i32* %3
%7 = load i32, i32* %3
%8 = sitofp i32 %7 to float
%9 = fmul float %8, 0x40460CCCC0000000
%10 = fptosi float %9 to i32
store i32 %10, i32* %4
store float 5.000000e-01, float* %5
store i32 0, i32* %6
ret void
}

LLVM IR (-O2):
define void @applyReverb(i16* nocapture %0) {
ret void
}
/* Type definitions */
struct sched_param {
  int dummy;
};
typedef int /*<<< orphan*/ posix_spawnattr_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int posix_spawnattr_setschedparam(posix_spawnattr_t *attr,
                                  const struct sched_param *schedparam) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<posix_spawnattr_setschedparam>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawnattr_setschedparam>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sched_param = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_setschedparam(i32* %0, %struct.sched_param* %1) {
%3 = alloca i32*
%4 = alloca %struct.sched_param*
store i32* %0, i32** %3
store %struct.sched_param* %1, %struct.sched_param** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.sched_param = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_setschedparam(i32* nocapture readnone %0, %struct.sched_param* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ read(int /*<<< orphan*/, int *, int);
void test_read() {
  int n = 0;
  read(0, &n, sizeof(int));
  assert(n == 0);
}


x86 assembly (clang, -O0):
<test_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
lea    -0x4(%rbp),%rsi
mov    $0x4,%edx
call   1030 <read@plt>
cmpl   $0x0,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_read>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
xor    %edi,%edi
mov    $0x4,%edx
call   1030 <read@plt>
xor    %edi,%edi
cmpl   $0x0,0x4(%rsp)
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @test_read() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @read(i32 0, i32* %1, i32 4)
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret void
}

LLVM IR (-O2):
define void @test_read() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @read(i32 0, i32* %1, i32 4)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char const *, int);
void ft_putstr(char const *s) {
  int i;
  i = 0;
  if (s == NULL)
    write(1, "(null)", 7);
  else {
    while (s[i])
      i++;
    write(1, s, i);
  }
}


x86 assembly (clang, -O0):
<ft_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1149 <ft_putstr+0x39>
mov    $0x1,%edi
lea    0xec6(%rip),%rsi
mov    $0x7,%edx
call   1030 <write@plt>
jmp    117f <ft_putstr+0x6f>
jmp    114e <ft_putstr+0x3e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     116e <ft_putstr+0x5e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114e <ft_putstr+0x3e>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr>:
test   %rdi,%rdi
je     1137 <ft_putstr+0x27>
mov    %rdi,%rsi
xor    %edx,%edx
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,(%rsi,%rdx,1)
lea    0x1(%rdx),%rdx
jne    1120 <ft_putstr+0x10>
add    $0xffffffff,%edx
mov    $0x1,%edi
jmp    1030 <write@plt>
lea    0xec2(%rip),%rsi
mov    $0x1,%edi
mov    $0x7,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"(null)\00"
define void @ft_putstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 7)
br label %23
8: ; preds = %1
br label %9
9: ; preds = %16, %8
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = icmp ne i8 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %9
19: ; preds = %9
%20 = load i8*, i8** %2
%21 = load i32, i32* %3
%22 = call i32 @write(i32 1, i8* %20, i32 %21)
br label %23
23: ; preds = %19, %6
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"(null)\00"
define void @ft_putstr(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 7)
br label %14
5: ; preds = %1, %5
%6 = phi i64 [ %10, %5 ], [ 0, %1 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
%10 = add nuw i64 %6, 1
br i1 %9, label %11, label %5
11: ; preds = %5
%12 = trunc i64 %6 to i32
%13 = tail call i32 @write(i32 1, i8* %0, i32 %12)
br label %14
14: ; preds = %11, %3
ret void
}
/* Type definitions */
typedef int int16_t;

/* Variables and functions */
int16_t max_16(int16_t a, int16_t b) { return a - ((a - b) & ((a - b) >> 15)); }


x86 assembly (clang, -O0):
<max_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%edx
sub    -0x8(%rbp),%edx
sar    $0xf,%edx
and    %edx,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_16>:
mov    %edi,%eax
mov    %edi,%ecx
sub    %esi,%ecx
mov    %ecx,%edx
sar    $0xf,%edx
and    %ecx,%edx
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @max_16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %9, %10
%12 = ashr i32 %11, 15
%13 = and i32 %8, %12
%14 = sub nsw i32 %5, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @max_16(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
%4 = ashr i32 %3, 15
%5 = and i32 %4, %3
%6 = sub nsw i32 %0, %5
ret i32 %6
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ check_tmpfs_mmap(struct __test_metadata *);
void wrapper_check_tmpfs_mmap(struct __test_metadata *_metadata,
                              struct __fixture_variant_metadata *variant) {
  check_tmpfs_mmap(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_check_tmpfs_mmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <check_tmpfs_mmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_check_tmpfs_mmap>:
jmp    1030 <check_tmpfs_mmap@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_check_tmpfs_mmap(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @check_tmpfs_mmap(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_check_tmpfs_mmap(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @check_tmpfs_mmap(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ switch_off_bits(unsigned char *, int);
int /*<<< orphan*/ switch_on_bits(unsigned char *, int);
void CTRL_REGSC_BITSET_BW500(unsigned char *data) {
  switch_on_bits(data, (0x80 | 0x20));
  switch_off_bits(data, (0x40));
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa0,%esi
call   1030 <switch_on_bits@plt>
mov    -0x8(%rbp),%rdi
mov    $0x40,%esi
call   1040 <switch_off_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbx
mov    %rdi,%rbx
mov    $0xa0,%esi
call   1030 <switch_on_bits@plt>
mov    %rbx,%rdi
mov    $0x40,%esi
pop    %rbx
jmp    1040 <switch_off_bits@plt>

LLVM IR (-O0):
define void @CTRL_REGSC_BITSET_BW500(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @switch_on_bits(i8* %3, i32 160)
%5 = load i8*, i8** %2
%6 = call i32 @switch_off_bits(i8* %5, i32 64)
ret void
}

LLVM IR (-O2):
define void @CTRL_REGSC_BITSET_BW500(i8* %0) {
%2 = tail call i32 @switch_on_bits(i8* %0, i32 160)
%3 = tail call i32 @switch_off_bits(i8* %0, i32 64)
ret void
}
void output_init(void) { return; }


x86 assembly (clang, -O0):
<output_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_init>:
ret

LLVM IR (-O0):
define void @output_init() {
ret void
}

LLVM IR (-O2):
define void @output_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ board_init();
int /*<<< orphan*/ kernel_init();
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ puts(char *);
__attribute__((constructor)) void startup(void) {
  putchar('\n');
  board_init();
  puts("RIOT MSP430 hardware initialization complete.\n");
  kernel_init();
}


x86 assembly (clang, -O0):
<startup>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x0,%al
call   1060 <board_init@plt>
lea    0xea4(%rip),%rdi
call   1050 <puts@plt>
mov    $0x0,%al
call   1040 <kernel_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<startup>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1060 <board_init@plt>
lea    0xea7(%rip),%rdi
call   1050 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <kernel_init@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"RIOT MSP430 hardware initialization complete.\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @startup, i8* null }]
define void @startup() {
%1 = call i32 @putchar(i8 signext 10)
%2 = call i32 (...) @board_init()
%3 = call i32 @puts(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @kernel_init()
ret void
}

LLVM IR (-O2):
@.str = [47 x i8] c"RIOT MSP430 hardware initialization complete.\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @startup, i8* null }]
define void @startup() {
%1 = tail call i32 @putchar(i8 signext 10)
%2 = tail call i32 (...) @board_init()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @kernel_init()
ret void
}
void gtk_icon_size_lookup_for_settings() {}


x86 assembly (clang, -O0):
<gtk_icon_size_lookup_for_settings>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_size_lookup_for_settings>:
ret

LLVM IR (-O0):
define void @gtk_icon_size_lookup_for_settings() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_size_lookup_for_settings() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ C67_asm(char *, int, int, int);
void C67_CMPLTU(int s1, int s2, int dst) { C67_asm("CMPLTU.L1", s1, s2, dst); }


x86 assembly (clang, -O0):
<C67_CMPLTU>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xecf(%rip),%rdi
call   1030 <C67_asm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C67_CMPLTU>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <C67_asm@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"CMPLTU.L1\00"
define void @C67_CMPLTU(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @C67_asm(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"CMPLTU.L1\00"
define void @C67_CMPLTU(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @C67_asm(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PPB_ann_initialize();
int /*<<< orphan*/ PPB_ann_terminate();
int /*<<< orphan*/ main_PPB_ann();
int main(int argc, const char *const argv[]) {
  (void)argc;
  (void)argv;
  PPB_ann_initialize();
  main_PPB_ann();
  PPB_ann_terminate();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <PPB_ann_initialize@plt>
mov    $0x0,%al
call   1050 <main_PPB_ann@plt>
mov    $0x0,%al
call   1040 <PPB_ann_terminate@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <PPB_ann_initialize@plt>
xor    %eax,%eax
call   1050 <main_PPB_ann@plt>
xor    %eax,%eax
call   1040 <PPB_ann_terminate@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 (...) @PPB_ann_initialize()
%9 = call i32 (...) @main_PPB_ann()
%10 = call i32 (...) @PPB_ann_terminate()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @PPB_ann_initialize()
%4 = tail call i32 (...) @main_PPB_ann()
%5 = tail call i32 (...) @PPB_ann_terminate()
ret i32 0
}
/* Variables and functions */
unsigned int mk_rnd_ipv4(int);
unsigned int mk_rnd_european_ipv4(void) { return mk_rnd_ipv4(194); }


x86 assembly (clang, -O0):
<mk_rnd_european_ipv4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc2,%edi
call   1030 <mk_rnd_ipv4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mk_rnd_european_ipv4>:
mov    $0xc2,%edi
jmp    1030 <mk_rnd_ipv4@plt>

LLVM IR (-O0):
define i32 @mk_rnd_european_ipv4() {
%1 = call i32 @mk_rnd_ipv4(i32 194)
ret i32 %1
}

LLVM IR (-O2):
define i32 @mk_rnd_european_ipv4() {
%1 = tail call i32 @mk_rnd_ipv4(i32 194)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void *process(void *arg) {
  while (1)
    sched_yield();
  return NULL;
}


x86 assembly (clang, -O0):
<process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <sched_yield@plt>
jmp    111c <process+0xc>

x86 assembly (clang, -O2):
<process>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <sched_yield@plt>
jmp    1120 <process+0x10>

LLVM IR (-O0):
define i8* @process(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %3
%4 = call i32 (...) @sched_yield()
br label %3
}

LLVM IR (-O2):
define noalias i8* @process(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
%3 = tail call i32 (...) @sched_yield()
br label %2
}
unsigned char rev8_hakmem(unsigned char b) {
  return ((b * 0x000202020202ULL) & 0x010884422010ULL) % 1023;
}


x86 assembly (clang, -O0):
<rev8_hakmem>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
movabs $0x202020202,%rcx
imul   %rcx,%rax
movabs $0x10884422010,%rcx
and    %rcx,%rax
mov    $0x3ff,%ecx
xor    %edx,%edx
div    %rcx
mov    %dl,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev8_hakmem>:
mov    %edi,%eax
movabs $0x202020202,%rdx
imul   %rax,%rdx
movabs $0x10884422010,%rcx
and    %rdx,%rcx
movabs $0x40100401004011,%rdx
mov    %rcx,%rax
mul    %rdx
mov    %ecx,%eax
sub    %edx,%eax
shr    %eax
add    %edx,%eax
shr    $0x9,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @rev8_hakmem(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i64
%5 = mul i64 %4, 8623620610
%6 = and i64 %5, 1136090292240
%7 = urem i64 %6, 1023
%8 = trunc i64 %7 to i8
ret i8 %8
}

LLVM IR (-O2):
define zeroext i8 @rev8_hakmem(i8 zeroext %0) {
%2 = zext i8 %0 to i64
%3 = mul nuw nsw i64 %2, 8623620610
%4 = and i64 %3, 1136090292240
%5 = urem i64 %4, 1023
%6 = trunc i64 %5 to i8
ret i8 %6
}
char *hello1() { return (char *)"Hello from hello1...\n"; }


x86 assembly (clang, -O0):
<hello1>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello1>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Hello from hello1...\0A\00"
define i8* @hello1() {
ret i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [22 x i8] c"Hello from hello1...\0A\00"
define i8* @hello1() {
ret i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0)
}
double hack_long2double(long long x) { return *((double *)&x); }


x86 assembly (clang, -O0):
<hack_long2double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<hack_long2double>:
movq   %rdi,%xmm0
ret

LLVM IR (-O0):
define double @hack_long2double(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = bitcast i64* %2 to double*
%4 = load double, double* %3
ret double %4
}

LLVM IR (-O2):
define double @hack_long2double(i64 %0) {
%2 = bitcast i64 %0 to double
ret double %2
}