xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ fexcept_t;

/* Variables and functions */
int fesetexceptflag(fexcept_t const *flagp, int excepts) {
  return excepts == 0 ? 0 : -1;
}


x86 assembly (clang, -O0):
<fesetexceptflag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fesetexceptflag>:
neg    %esi
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fesetexceptflag(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 0, i32 -1
ret i32 %8
}

LLVM IR (-O2):
define i32 @fesetexceptflag(i32* nocapture readnone %0, i32 %1) {
%3 = icmp ne i32 %1, 0
%4 = sext i1 %3 to i32
ret i32 %4
}
char *addstring(s)
char *s;
{
  char *p;
  p = (char *)checkmalloc(strlen(s) + 1);
  strcpy(p, s);
  return (p);
}


x86 assembly (clang, -O0):
<addstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
mov    $0x0,%al
call   1030 <checkmalloc@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addstring>:
push   %rbx
mov    %rdi,%rbx
call   1050 <strlen@plt>
lea    0x1(%rax),%rdi
xor    %eax,%eax
call   1030 <checkmalloc@plt>
movslq %eax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <strcpy@plt>

LLVM IR (-O0):
define i8* @addstring(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add i64 %5, 1
%7 = call i32 (i64, ...) bitcast (i32 (...)* @checkmalloc to i32 (i64, ...)*)(i64 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = load i8*, i8** %2
%12 = call i8* @strcpy(i8* %10, i8* %11)
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
define i8* @addstring(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
%4 = tail call i32 (i64, ...) bitcast (i32 (...)* @checkmalloc to i32 (i64, ...)*)(i64 %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
%7 = tail call i8* @strcpy(i8* dereferenceable(1) %6, i8* dereferenceable(1) %0)
ret i8* %6
}
/* Variables and functions */
size_t val_size_t(size_t x) { return x; }


x86 assembly (clang, -O0):
<val_size_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<val_size_t>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @val_size_t(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @val_size_t(i64 returned %0) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int write(int, char *, int);
write_data(int usbdev, char command) {
  char c[5];
  c[0] = command;
  int wr = write(usbdev, c, 1);
  if (wr == -1) {
    printf("Eror: Error writing data at the UART port\n");
    exit(EXIT_SUCCESS);
  }
  return 0;
}


x86 assembly (clang, -O0):
<write_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0xa(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xa(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0xffffffff,-0x10(%rbp)
jne    117f <write_data+0x4f>
lea    0xe94(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e68(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_data>:
push   %rax
mov    %sil,0x3(%rsp)
lea    0x3(%rsp),%rsi
mov    $0x1,%edx
call   1040 <write@plt>
cmp    $0xffffffff,%eax
je     114e <write_data+0x1e>
xor    %eax,%eax
pop    %rcx
ret
lea    0xeab(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"Eror: Error writing data at the UART port\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @write_data(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca [5 x i8]
%6 = alloca i32
store i32 %0, i32* %3
store i8 %1, i8* %4
%7 = load i8, i8* %4
%8 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
store i8 %7, i8* %8
%9 = load i32, i32* %3
%10 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
%11 = call i32 @write(i32 %9, i8* %10, i32 1)
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %18
14: ; preds = %2
%15 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%16 = load i32, i32* @EXIT_SUCCESS
%17 = call i32 @exit(i32 %16)
unreachable
18: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [42 x i8] c"Eror: Error writing data at the UART port\00"
define i32 @write_data(i32 %0, i8 signext %1) {
%3 = alloca [5 x i8]
%4 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = call i32 @write(i32 %0, i8* %4, i32 1)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_SUCCESS
%10 = tail call i32 @exit(i32 %9)
unreachable
11: ; preds = %2
ret i32 0
}
void co_init() {}


x86 assembly (clang, -O0):
<co_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<co_init>:
ret

LLVM IR (-O0):
define void @co_init() {
ret void
}

LLVM IR (-O2):
define void @co_init() {
ret void
}
/* Type definitions */
struct cmd_arg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ showLanInterface();
void cmdShowInterfaceLan(int cmdType, struct cmd_arg *pCmdArg) {
  showLanInterface();
}


x86 assembly (clang, -O0):
<cmdShowInterfaceLan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <showLanInterface@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdShowInterfaceLan>:
xor    %eax,%eax
jmp    1030 <showLanInterface@plt>

LLVM IR (-O0):
%struct.cmd_arg = type { i32 }
define void @cmdShowInterfaceLan(i32 %0, %struct.cmd_arg* %1) {
%3 = alloca i32
%4 = alloca %struct.cmd_arg*
store i32 %0, i32* %3
store %struct.cmd_arg* %1, %struct.cmd_arg** %4
%5 = call i32 (...) @showLanInterface()
ret void
}

LLVM IR (-O2):
%struct.cmd_arg = type { i32 }
define void @cmdShowInterfaceLan(i32 %0, %struct.cmd_arg* nocapture readnone %1) {
%3 = tail call i32 (...) @showLanInterface()
ret void
}
double recfact(double N) {
  double i;
  i = (int)N;
  if (i == 1) {
    return 1;
  } else {
    return N * recfact(N - 1);
  }
}


x86 assembly (clang, -O0):
<recfact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xec8(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    115a <recfact+0x4a>
jp     115a <recfact+0x4a>
movsd  0xeb0(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118b <recfact+0x7b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xe8f(%rip),%xmm1
subsd  %xmm1,%xmm0
call   1030 <recfact@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recfact>:
push   %rax
cvttsd2si %xmm0,%eax
cmp    $0x1,%eax
jne    1124 <recfact+0x14>
movsd  0xede(%rip),%xmm0
pop    %rax
ret
movapd %xmm0,%xmm1
movsd  0xed8(%rip),%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm1,(%rsp)
call   1030 <recfact@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @recfact(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = fptosi double %5 to i32
%7 = sitofp i32 %6 to double
store double %7, double* %4
%8 = load double, double* %4
%9 = fcmp oeq double %8, 1.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %1
store double 1.000000e+00, double* %2
br label %17
11: ; preds = %1
%12 = load double, double* %3
%13 = load double, double* %3
%14 = fsub double %13, 1.000000e+00
%15 = call double @recfact(double %14)
%16 = fmul double %12, %15
store double %16, double* %2
br label %17
17: ; preds = %11, %10
%18 = load double, double* %2
ret double %18
}

LLVM IR (-O2):
define double @recfact(double %0) {
%2 = fptosi double %0 to i32
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %6
4: ; preds = %1, %6
%5 = phi double [ %9, %6 ], [ 1.000000e+00, %1 ]
ret double %5
6: ; preds = %1
%7 = fadd double %0, -1.000000e+00
%8 = tail call double @recfact(double %7)
%9 = fmul double %8, %0
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__22__IO__selectIOFunc();
void HplMsp430Usart1P__UTXD__selectIOFunc(void) {
  HplMsp430GeneralIOP__22__IO__selectIOFunc();
}


x86 assembly (clang, -O0):
<HplMsp430Usart1P__UTXD__selectIOFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__22__IO__selectIOFunc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430Usart1P__UTXD__selectIOFunc>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__22__IO__selectIOFunc@plt>

LLVM IR (-O0):
define void @HplMsp430Usart1P__UTXD__selectIOFunc() {
%1 = call i32 (...) @HplMsp430GeneralIOP__22__IO__selectIOFunc()
ret void
}

LLVM IR (-O2):
define void @HplMsp430Usart1P__UTXD__selectIOFunc() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__22__IO__selectIOFunc()
ret void
}
unsigned short adc_read(int channel) {
  (void)channel;
  return 0;
}


x86 assembly (clang, -O0):
<adc_read>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adc_read>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i16 @adc_read(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i16 0
}

LLVM IR (-O2):
define zeroext i16 @adc_read(i32 %0) {
ret i16 0
}
/* Variables and functions */
int alien(char *);
int main() { return alien("BETHO! Altec oh liryom(a loadjudas!) dowd."), 0; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <alien@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <alien@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"BETHO! Altec oh liryom(a loadjudas!) dowd.\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @alien(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [43 x i8] c"BETHO! Altec oh liryom(a loadjudas!) dowd.\00"
define i32 @main() {
%1 = tail call i32 @alien(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x15() {
  Assert_real((isbdigit(21) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              110, ("isbdigit should be 0 for 0x15"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x15>:
push   %rbp
mov    %rsp,%rbp
mov    $0x15,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x6e,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x15>:
push   %rax
mov    $0x15,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x6e,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x15\00"
define void @t_isbdigit_0x15() {
%1 = call i64 @isbdigit(i32 21)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 110, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x15\00"
define void @t_isbdigit_0x15() {
%1 = tail call i64 @isbdigit(i32 21)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 110, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int arch_get_reg_size(char *);
int emit_get_reg_size(char *reg_name) { return arch_get_reg_size(reg_name); }


x86 assembly (clang, -O0):
<emit_get_reg_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <arch_get_reg_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_get_reg_size>:
jmp    1030 <arch_get_reg_size@plt>

LLVM IR (-O0):
define i32 @emit_get_reg_size(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @arch_get_reg_size(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @emit_get_reg_size(i8* %0) {
%2 = tail call i32 @arch_get_reg_size(i8* %0)
ret i32 %2
}
/* Type definitions */
struct avl_tree {
  int dummy;
};
struct avl_node {
  int dummy;
};

/* Variables and functions */
struct avl_node *find_name_node_avltree(struct avl_tree *, char *);
void *get_node_data_avltree(struct avl_node *);
void *find_data_avltree(struct avl_tree *t, char *key) {
  struct avl_node *n;
  n = find_name_node_avltree(t, key);
  if (n == NULL)
    return NULL;
  return get_node_data_avltree(n);
}


x86 assembly (clang, -O0):
<find_data_avltree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <find_name_node_avltree@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1159 <find_data_avltree+0x39>
movq   $0x0,-0x8(%rbp)
jmp    1166 <find_data_avltree+0x46>
mov    -0x20(%rbp),%rdi
call   1030 <get_node_data_avltree@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_data_avltree>:
push   %rax
call   1040 <find_name_node_avltree@plt>
test   %rax,%rax
je     1134 <find_data_avltree+0x14>
mov    %rax,%rdi
pop    %rax
jmp    1030 <get_node_data_avltree@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.avl_tree = type { i32 }
%struct.avl_node = type { i32 }
define i8* @find_data_avltree(%struct.avl_tree* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca %struct.avl_tree*
%5 = alloca i8*
%6 = alloca %struct.avl_node*
store %struct.avl_tree* %0, %struct.avl_tree** %4
store i8* %1, i8** %5
%7 = load %struct.avl_tree*, %struct.avl_tree** %4
%8 = load i8*, i8** %5
%9 = call %struct.avl_node* @find_name_node_avltree(%struct.avl_tree* %7, i8* %8)
store %struct.avl_node* %9, %struct.avl_node** %6
%10 = load %struct.avl_node*, %struct.avl_node** %6
%11 = icmp eq %struct.avl_node* %10, null
br i1 %11, label %12, label %13
12: ; preds = %2
store i8* null, i8** %3
br label %16
13: ; preds = %2
%14 = load %struct.avl_node*, %struct.avl_node** %6
%15 = call i8* @get_node_data_avltree(%struct.avl_node* %14)
store i8* %15, i8** %3
br label %16
16: ; preds = %13, %12
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
%struct.avl_tree = type { i32 }
%struct.avl_node = type { i32 }
define i8* @find_data_avltree(%struct.avl_tree* %0, i8* %1) {
%3 = tail call %struct.avl_node* @find_name_node_avltree(%struct.avl_tree* %0, i8* %1)
%4 = icmp eq %struct.avl_node* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i8* @get_node_data_avltree(%struct.avl_node* %3)
br label %7
7: ; preds = %2, %5
%8 = phi i8* [ %6, %5 ], [ null, %2 ]
ret i8* %8
}
unsigned long lockdep_count_forward_deps(struct lock_class *class) { return 0; }


x86 assembly (clang, -O0):
<lockdep_count_forward_deps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lockdep_count_forward_deps>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.lock_class = type opaque
define i64 @lockdep_count_forward_deps(%struct.lock_class* %0) {
%2 = alloca %struct.lock_class*
store %struct.lock_class* %0, %struct.lock_class** %2
ret i64 0
}

LLVM IR (-O2):
%struct.lock_class = type opaque
define i64 @lockdep_count_forward_deps(%struct.lock_class* nocapture readnone %0) {
ret i64 0
}
int test_imm_E1uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xE1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E1uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xe1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E1uint64_midword_reg>:
test   $0xe10000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E1uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 225
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E1uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14745600
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int get_Zd_distance_squared(int xi, int xj, int xk, int yi, int yj, int yk) {
  int dsq;
  int tmp;
  tmp = xi - yi;
  dsq = tmp * tmp;
  tmp = xj - yj;
  dsq += tmp * tmp;
  tmp = xk - yk;
  dsq += tmp * tmp;
  return dsq;
}


x86 assembly (clang, -O0):
<get_Zd_distance_squared>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
imul   -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
imul   -0x20(%rbp),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x18(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
imul   -0x20(%rbp),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_Zd_distance_squared>:
sub    %ecx,%edi
imul   %edi,%edi
sub    %r8d,%esi
imul   %esi,%esi
lea    (%rsi,%rdi,1),%eax
sub    %r9d,%edx
imul   %edx,%edx
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_Zd_distance_squared(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%15 = load i32, i32* %7
%16 = load i32, i32* %10
%17 = sub nsw i32 %15, %16
store i32 %17, i32* %14
%18 = load i32, i32* %14
%19 = load i32, i32* %14
%20 = mul nsw i32 %18, %19
store i32 %20, i32* %13
%21 = load i32, i32* %8
%22 = load i32, i32* %11
%23 = sub nsw i32 %21, %22
store i32 %23, i32* %14
%24 = load i32, i32* %14
%25 = load i32, i32* %14
%26 = mul nsw i32 %24, %25
%27 = load i32, i32* %13
%28 = add nsw i32 %27, %26
store i32 %28, i32* %13
%29 = load i32, i32* %9
%30 = load i32, i32* %12
%31 = sub nsw i32 %29, %30
store i32 %31, i32* %14
%32 = load i32, i32* %14
%33 = load i32, i32* %14
%34 = mul nsw i32 %32, %33
%35 = load i32, i32* %13
%36 = add nsw i32 %35, %34
store i32 %36, i32* %13
%37 = load i32, i32* %13
ret i32 %37
}

LLVM IR (-O2):
define i32 @get_Zd_distance_squared(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = sub nsw i32 %0, %3
%8 = mul nsw i32 %7, %7
%9 = sub nsw i32 %1, %4
%10 = mul nsw i32 %9, %9
%11 = add nuw nsw i32 %10, %8
%12 = sub nsw i32 %2, %5
%13 = mul nsw i32 %12, %12
%14 = add nuw nsw i32 %11, %13
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ evutil_socket_t;

/* Variables and functions */
int /*<<< orphan*/ event_base_loopexit(void *, int /*<<< orphan*/ *);
void interrupted(evutil_socket_t fd, short events, void *base) {
  event_base_loopexit(base, NULL);
}


x86 assembly (clang, -O0):
<interrupted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <event_base_loopexit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupted>:
mov    %rdx,%rdi
xor    %esi,%esi
jmp    1030 <event_base_loopexit@plt>

LLVM IR (-O0):
define void @interrupted(i32 %0, i16 signext %1, i8* %2) {
%4 = alloca i32
%5 = alloca i16
%6 = alloca i8*
store i32 %0, i32* %4
store i16 %1, i16* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @event_base_loopexit(i8* %7, i32* null)
ret void
}

LLVM IR (-O2):
define void @interrupted(i32 %0, i16 signext %1, i8* %2) {
%4 = tail call i32 @event_base_loopexit(i8* %2, i32* null)
ret void
}
int main() {
  char arr[2] = "1";
  return arr[0] + arr[1];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0xeee(%rip),%ax
mov    %ax,-0x6(%rbp)
movsbl -0x6(%rbp),%eax
movsbl -0x5(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x31,%eax
ret

LLVM IR (-O0):
@__const.main.arr = [2 x i8] c"1\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i8]
store i32 0, i32* %1
%3 = bitcast [2 x i8]* %2 to i8*
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 1
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = add nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 49
}
void g_hook_list_marshal_check() {}


x86 assembly (clang, -O0):
<g_hook_list_marshal_check>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_hook_list_marshal_check>:
ret

LLVM IR (-O0):
define void @g_hook_list_marshal_check() {
ret void
}

LLVM IR (-O2):
define void @g_hook_list_marshal_check() {
ret void
}
int wrap(int z, int (*f)(int a)) { return (*f)(z); }


x86 assembly (clang, -O0):
<wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%edi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap>:
jmp    *%rsi

LLVM IR (-O0):
define i32 @wrap(i32 %0, i32 (i32)* %1) {
%3 = alloca i32
%4 = alloca i32 (i32)*
store i32 %0, i32* %3
store i32 (i32)* %1, i32 (i32)** %4
%5 = load i32 (i32)*, i32 (i32)** %4
%6 = load i32, i32* %3
%7 = call i32 %5(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @wrap(i32 %0, i32 (i32)* nocapture %1) {
%3 = tail call i32 %1(i32 %0)
ret i32 %3
}
char *rng_uid(void) { return "58fd3704b7de783c46c1e9d11f8fe3e2"; }


x86 assembly (clang, -O0):
<rng_uid>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rng_uid>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"58fd3704b7de783c46c1e9d11f8fe3e2\00"
define i8* @rng_uid() {
ret i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [33 x i8] c"58fd3704b7de783c46c1e9d11f8fe3e2\00"
define i8* @rng_uid() {
ret i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0)
}
int somefunc(char *x, int y, double z) { return y; }


x86 assembly (clang, -O0):
<somefunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<somefunc>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @somefunc(i8* %0, i32 %1, double %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca double
store i8* %0, i8** %4
store i32 %1, i32* %5
store double %2, double* %6
%7 = load i32, i32* %5
ret i32 %7
}

LLVM IR (-O2):
define i32 @somefunc(i8* nocapture readnone %0, i32 returned %1, double %2) {
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void useage() {
  printf("Useage:\n");
  printf("bb_nandflash_ecc nand_img start_address  size\n");
}


x86 assembly (clang, -O0):
<useage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<useage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee4(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Useage:\0A\00"
@.str.1 = [47 x i8] c"bb_nandflash_ecc nand_img start_address size\0A\00"
define void @useage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"Useage:\00"
@str.2 = [46 x i8] c"bb_nandflash_ecc nand_img start_address size\00"
define void @useage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([46 x i8], [46 x i8]* @str.2, i64 0, i64 0))
ret void
}
int c_wrap() { return 1; }


x86 assembly (clang, -O0):
<c_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_wrap>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @c_wrap() {
ret i32 1
}

LLVM IR (-O2):
define i32 @c_wrap() {
ret i32 1
}
void my_isr(int n) { ; }


x86 assembly (clang, -O0):
<my_isr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_isr>:
ret

LLVM IR (-O0):
define void @my_isr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @my_isr(i32 %0) {
ret void
}
int DirtoDx(int dir) {
  if (dir == 0)
    return 1;
  else if (dir == 2)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<DirtoDx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <DirtoDx+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    113a <DirtoDx+0x3a>
cmpl   $0x2,-0x8(%rbp)
jne    1133 <DirtoDx+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    113a <DirtoDx+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DirtoDx>:
xor    %ecx,%ecx
cmp    $0x2,%edi
sete   %cl
neg    %ecx
test   %edi,%edi
mov    $0x1,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @DirtoDx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @DirtoDx(i32 %0) {
%2 = icmp eq i32 %0, 2
%3 = sext i1 %2 to i32
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i32 1, i32 %3
ret i32 %5
}
/* Variables and functions */
bool nrf53_errata_10(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_10>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_10>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_10() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_10() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void print_nl() { putchar('\n'); }


x86 assembly (clang, -O0):
<print_nl>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_nl>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @print_nl() {
%1 = call i32 @putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @print_nl() {
%1 = tail call i32 @putchar(i8 signext 10)
ret void
}
int test_imm_DBuint16_mem(unsigned short *val) {
  return ((*val) & (0xDB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DBuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xdb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DBuint16_mem>:
testb  $0xdb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DBuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 219
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DBuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 219
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int _dlclose(void *ptr) { return 0; }


x86 assembly (clang, -O0):
<_dlclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dlclose>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @_dlclose(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ flag_add(char *, int);
char gph_getkey();
void query_select(int sel, char *key) {
  if (sel == 1)
    *key = gph_getkey();
  else if (sel == -1)
    flag_add("fatal_error", 1);
}


x86 assembly (clang, -O0):
<query_select>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    114d <query_select+0x2d>
mov    $0x0,%al
call   1030 <gph_getkey@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
jmp    116d <query_select+0x4d>
cmpl   $0xffffffff,-0x4(%rbp)
jne    1168 <query_select+0x48>
lea    0xea2(%rip),%rdi
mov    $0x1,%esi
call   1040 <flag_add@plt>
jmp    116d <query_select+0x4d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<query_select>:
cmp    $0xffffffff,%edi
je     1139 <query_select+0x19>
cmp    $0x1,%edi
jne    1138 <query_select+0x18>
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
call   1030 <gph_getkey@plt>
mov    %al,(%rbx)
pop    %rbx
ret
lea    0xec0(%rip),%rdi
mov    $0x1,%esi
jmp    1040 <flag_add@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"fatal_error\00"
define void @query_select(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = call signext i8 (...) @gph_getkey()
%9 = load i8*, i8** %4
store i8 %8, i8* %9
br label %16
10: ; preds = %2
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 @flag_add(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1)
br label %15
15: ; preds = %13, %10
br label %16
16: ; preds = %15, %7
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"fatal_error\00"
define void @query_select(i32 %0, i8* nocapture writeonly %1) {
switch i32 %0, label %7 [
i32 1, label %3
i32 -1, label %5
]
3: ; preds = %2
%4 = tail call signext i8 (...) @gph_getkey()
store i8 %4, i8* %1
br label %7
5: ; preds = %2
%6 = tail call i32 @flag_add(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1)
br label %7
7: ; preds = %2, %5, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int vfprintf(int /*<<< orphan*/ *const, char const *const, int /*<<< orphan*/);
__attribute__((__unused__)) int(cheat_unwrapped_vfprintf)(
    FILE *const stream, char const *const format, va_list list) {
  return vfprintf(stream, format, list);
}


x86 assembly (clang, -O0):
<cheat_unwrapped_vfprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <vfprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cheat_unwrapped_vfprintf>:
jmp    1030 <vfprintf@plt>

LLVM IR (-O0):
define i32 @cheat_unwrapped_vfprintf(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @vfprintf(i32* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @cheat_unwrapped_vfprintf(i32* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @vfprintf(i32* %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int random_int(int);
int random_int_range(int start_in, int stop_in) {
  int start = start_in;
  int stop = stop_in;
  int temp = 0;
  if (start > stop) {
    temp = start;
    start = stop;
    stop = temp;
  }
  int ret = 0;
  int delta = (stop - start);
  ret = random_int(delta);
  return start + ret;
}


x86 assembly (clang, -O0):
<random_int_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    114f <random_int_range+0x3f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <random_int@plt>
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_int_range>:
push   %rbx
mov    %edi,%ebx
cmp    %esi,%edi
mov    %esi,%edi
cmovg  %ebx,%edi
cmovg  %esi,%ebx
sub    %ebx,%edi
call   1030 <random_int@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @random_int_range(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%10 = load i32, i32* %3
store i32 %10, i32* %5
%11 = load i32, i32* %4
store i32 %11, i32* %6
store i32 0, i32* %7
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %19
15: ; preds = %2
%16 = load i32, i32* %5
store i32 %16, i32* %7
%17 = load i32, i32* %6
store i32 %17, i32* %5
%18 = load i32, i32* %7
store i32 %18, i32* %6
br label %19
19: ; preds = %15, %2
store i32 0, i32* %8
%20 = load i32, i32* %6
%21 = load i32, i32* %5
%22 = sub nsw i32 %20, %21
store i32 %22, i32* %9
%23 = load i32, i32* %9
%24 = call i32 @random_int(i32 %23)
store i32 %24, i32* %8
%25 = load i32, i32* %5
%26 = load i32, i32* %8
%27 = add nsw i32 %25, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @random_int_range(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = sub nsw i32 %4, %5
%7 = tail call i32 @random_int(i32 %6)
%8 = add nsw i32 %7, %5
ret i32 %8
}
/* Variables and functions */
scalar_t__ less_than(int, int);
void l4_widened_overrun_Bad() {
  int a[10];
  for (int i = 0; less_than(i, 11); i++) {
    a[i] = 0;
  }
}


x86 assembly (clang, -O0):
<l4_widened_overrun_Bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x34(%rbp)
mov    -0x34(%rbp),%edi
mov    $0xb,%esi
call   1030 <less_than@plt>
cmp    $0x0,%rax
je     1150 <l4_widened_overrun_Bad+0x40>
movslq -0x34(%rbp),%rax
movl   $0x0,-0x30(%rbp,%rax,4)
mov    -0x34(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x34(%rbp)
jmp    111f <l4_widened_overrun_Bad+0xf>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l4_widened_overrun_Bad>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
mov    $0xb,%esi
call   1030 <less_than@plt>
add    $0x1,%ebx
test   %rax,%rax
jne    1120 <l4_widened_overrun_Bad+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @l4_widened_overrun_Bad() {
%1 = alloca [10 x i32]
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = call i64 @less_than(i32 %4, i32 11)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 %9
store i32 0, i32* %10
br label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @l4_widened_overrun_Bad() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = tail call i64 @less_than(i32 %2, i32 11)
%4 = icmp eq i64 %3, 0
%5 = add nuw nsw i32 %2, 1
br i1 %4, label %6, label %1
6: ; preds = %1
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
double randomFn(const double max, const double min) {
  return min + ((double)rand() / (double)(RAND_MAX)) * (max - min);
}


x86 assembly (clang, -O0):
<randomFn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movsd  -0x18(%rbp),%xmm1
cvtsi2sd %rax,%xmm0
mov    0x2ea4(%rip),%rax
cvtsi2sdq (%rax),%xmm2
divsd  %xmm2,%xmm0
movsd  -0x8(%rbp),%xmm2
subsd  -0x10(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomFn>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm2
mov    0x2eb5(%rip),%rax
xorps  %xmm1,%xmm1
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm2
movsd  0x10(%rsp),%xmm1
movsd  0x8(%rsp),%xmm0
subsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @randomFn(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = call i64 (...) @rand()
%7 = sitofp i64 %6 to double
%8 = load i64, i64* @RAND_MAX
%9 = sitofp i64 %8 to double
%10 = fdiv double %7, %9
%11 = load double, double* %3
%12 = load double, double* %4
%13 = fsub double %11, %12
%14 = call double @llvm.fmuladd.f64(double %10, double %13, double %5)
ret double %14
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @randomFn(double %0, double %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to double
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fdiv double %4, %6
%8 = fsub double %0, %1
%9 = tail call double @llvm.fmuladd.f64(double %7, double %8, double %1)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, size_t);
char *sizeu3(size_t num) {
  static char sizeu3_buf[28];
  sprintf(sizeu3_buf,
          "%"
          "zu",
          num);
  return sizeu3_buf;
}


x86 assembly (clang, -O0):
<sizeu3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0x2f19(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
lea    0x2f06(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeu3>:
push   %rbx
mov    %rdi,%rdx
lea    0x2f25(%rip),%rbx
lea    0xede(%rip),%rsi
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@sizeu3.sizeu3_buf = internal global [28 x i8] zeroinitializer
@.str = [4 x i8] c"%zu\00"
define i8* @sizeu3(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @sprintf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @sizeu3.sizeu3_buf, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %3)
ret i8* getelementptr inbounds ([28 x i8], [28 x i8]* @sizeu3.sizeu3_buf, i64 0, i64 0)
}

LLVM IR (-O2):
@sizeu3.sizeu3_buf = internal global [28 x i8] zeroinitializer
@.str = [4 x i8] c"%zu\00"
define i8* @sizeu3(i64 %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @sizeu3.sizeu3_buf, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %0)
ret i8* getelementptr inbounds ([28 x i8], [28 x i8]* @sizeu3.sizeu3_buf, i64 0, i64 0)
}
void omirror(void) {}


x86 assembly (clang, -O0):
<omirror>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<omirror>:
ret

LLVM IR (-O0):
define void @omirror() {
ret void
}

LLVM IR (-O2):
define void @omirror() {
ret void
}
/* Variables and functions */
int __VERIFIER_nondet_bool();
int /*<<< orphan*/ free(int *);
int *malloc(int);
int main() {
  bool selector = __VERIFIER_nondet_bool();
  int *ptr;
  if (selector) {
    ptr = malloc(sizeof(int));
  }
  if (selector) {
    *ptr = 666;
    free(ptr);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_bool@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1161 <main+0x31>
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     117e <main+0x4e>
mov    -0x10(%rbp),%rax
movl   $0x29a,(%rax)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_bool@plt>
test   %eax,%eax
je     1154 <main+0x24>
mov    $0x4,%edi
call   1050 <malloc@plt>
movl   $0x29a,(%rax)
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_bool()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32* @malloc(i32 4)
store i32* %8, i32** %3
br label %9
9: ; preds = %7, %0
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32*, i32** %3
store i32 666, i32* %13
%14 = load i32*, i32** %3
%15 = call i32 @free(i32* %14)
br label %16
16: ; preds = %12, %9
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_bool()
%2 = icmp eq i32 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32* @malloc(i32 4)
store i32 666, i32* %4
%5 = tail call i32 @free(i32* %4)
br label %6
6: ; preds = %0, %3
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, unsigned long);
int copyout(void *src, void *dst, unsigned long size) {
  memcpy(dst, src, size);
  return 0;
}


x86 assembly (clang, -O0):
<copyout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyout>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <memcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @copyout(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @copyout(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %1, i8* %0, i64 %2)
ret i32 0
}
int wifi_connect_to_supplicant() { return -1; }


x86 assembly (clang, -O0):
<wifi_connect_to_supplicant>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_connect_to_supplicant>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @wifi_connect_to_supplicant() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @wifi_connect_to_supplicant() {
ret i32 -1
}
/* Variables and functions */
void zfree(void *data, int size) {}


x86 assembly (clang, -O0):
<zfree>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zfree>:
ret

LLVM IR (-O0):
define void @zfree(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @zfree(i8* nocapture %0, i32 %1) {
ret void
}
void users_eme(void) {}


x86 assembly (clang, -O0):
<users_eme>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<users_eme>:
ret

LLVM IR (-O0):
define void @users_eme() {
ret void
}

LLVM IR (-O2):
define void @users_eme() {
ret void
}
void foo_2_2_1_2_1_2_2_1_2() {}


x86 assembly (clang, -O0):
<foo_2_2_1_2_1_2_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_1_2_1_2_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_1_2_1_2_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_1_2_1_2_2_1_2() {
ret void
}
int control_access_block_update_wo(unsigned char gid, unsigned short paddr,
                                   unsigned char sz, unsigned char mask,
                                   unsigned char *data) {
  return -1;
}


x86 assembly (clang, -O0):
<control_access_block_update_wo>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %si,%dx
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dx,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %r8,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<control_access_block_update_wo>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @control_access_block_update_wo(i8 zeroext %0, i16 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8* %4) {
%6 = alloca i8
%7 = alloca i16
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8*
store i8 %0, i8* %6
store i16 %1, i16* %7
store i8 %2, i8* %8
store i8 %3, i8* %9
store i8* %4, i8** %10
ret i32 -1
}

LLVM IR (-O2):
define i32 @control_access_block_update_wo(i8 zeroext %0, i16 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8* nocapture readnone %4) {
ret i32 -1
}
double f4_sum_cb_short(short (*cb)()) {
  short v = cb();
  return ((double)(v));
}


x86 assembly (clang, -O0):
<f4_sum_cb_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
call   *%rcx
mov    %ax,-0xa(%rbp)
movswl -0xa(%rbp),%eax
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_sum_cb_short>:
push   %rax
xor    %eax,%eax
call   *%rdi
cwtl
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f4_sum_cb_short(i16 (...)* %0) {
%2 = alloca i16 (...)*
%3 = alloca i16
store i16 (...)* %0, i16 (...)** %2
%4 = load i16 (...)*, i16 (...)** %2
%5 = call signext i16 (...) %4()
store i16 %5, i16* %3
%6 = load i16, i16* %3
%7 = sitofp i16 %6 to double
ret double %7
}

LLVM IR (-O2):
define double @f4_sum_cb_short(i16 (...)* nocapture %0) {
%2 = tail call signext i16 (...) %0()
%3 = sitofp i16 %2 to double
ret double %3
}