#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ OS_disable_interrupts(unsigned long *);
int /*<<< orphan*/ OS_enable_interrupts(unsigned long);
int lpc_write_reg(int, unsigned int);
int blender_write_reg(unsigned int reg, unsigned int value) {
  int err;
  unsigned long ie;
  OS_disable_interrupts(&ie);
  err = lpc_write_reg(0x04, (1 << 20) + (3 << 16));
  if (err) {
    OS_enable_interrupts(ie);
    return err;
  }
  err = lpc_write_reg(0x0C, (reg << 16) | 0x08 | 0x02);
  if (err) {
    OS_enable_interrupts(ie);
    return err;
  }
  err = lpc_write_reg(0x00, value);
  if (err) {
    OS_enable_interrupts(ie);
    return err;
  }
  OS_enable_interrupts(ie);
  return 0;
}


x86 assembly (clang, -O0):
<blender_write_reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x18(%rbp),%rdi
call   1050 <OS_disable_interrupts@plt>
mov    $0x4,%edi
mov    $0x130000,%esi
call   1040 <lpc_write_reg@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1177 <blender_write_reg+0x47>
mov    -0x18(%rbp),%rdi
call   1030 <OS_enable_interrupts@plt>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11e9 <blender_write_reg+0xb9>
mov    -0x8(%rbp),%esi
shl    $0x10,%esi
or     $0x8,%esi
or     $0x2,%esi
mov    $0xc,%edi
call   1040 <lpc_write_reg@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     11ae <blender_write_reg+0x7e>
mov    -0x18(%rbp),%rdi
call   1030 <OS_enable_interrupts@plt>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11e9 <blender_write_reg+0xb9>
mov    -0xc(%rbp),%esi
xor    %edi,%edi
call   1040 <lpc_write_reg@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     11d9 <blender_write_reg+0xa9>
mov    -0x18(%rbp),%rdi
call   1030 <OS_enable_interrupts@plt>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11e9 <blender_write_reg+0xb9>
mov    -0x18(%rbp),%rdi
call   1030 <OS_enable_interrupts@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blender_write_reg>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %esi,%r14d
mov    %edi,%ebp
lea    0x8(%rsp),%rdi
call   1050 <OS_disable_interrupts@plt>
mov    $0x4,%edi
mov    $0x130000,%esi
call   1040 <lpc_write_reg@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    1180 <blender_write_reg+0x50>
shl    $0x10,%ebp
or     $0xa,%ebp
mov    $0xc,%edi
mov    %ebp,%esi
call   1040 <lpc_write_reg@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    1180 <blender_write_reg+0x50>
xor    %edi,%edi
mov    %r14d,%esi
call   1040 <lpc_write_reg@plt>
mov    %eax,%ebx
mov    0x8(%rsp),%rdi
call   1030 <OS_enable_interrupts@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @blender_write_reg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = call i32 @OS_disable_interrupts(i64* %7)
%9 = call i32 @lpc_write_reg(i32 4, i32 1245184)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i64, i64* %7
%14 = call i32 @OS_enable_interrupts(i64 %13)
%15 = load i32, i32* %6
store i32 %15, i32* %3
br label %40
16: ; preds = %2
%17 = load i32, i32* %4
%18 = shl i32 %17, 16
%19 = or i32 %18, 8
%20 = or i32 %19, 2
%21 = call i32 @lpc_write_reg(i32 12, i32 %20)
store i32 %21, i32* %6
%22 = load i32, i32* %6
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %28
24: ; preds = %16
%25 = load i64, i64* %7
%26 = call i32 @OS_enable_interrupts(i64 %25)
%27 = load i32, i32* %6
store i32 %27, i32* %3
br label %40
28: ; preds = %16
%29 = load i32, i32* %5
%30 = call i32 @lpc_write_reg(i32 0, i32 %29)
store i32 %30, i32* %6
%31 = load i32, i32* %6
%32 = icmp ne i32 %31, 0
br i1 %32, label %33, label %37
33: ; preds = %28
%34 = load i64, i64* %7
%35 = call i32 @OS_enable_interrupts(i64 %34)
%36 = load i32, i32* %6
store i32 %36, i32* %3
br label %40
37: ; preds = %28
%38 = load i64, i64* %7
%39 = call i32 @OS_enable_interrupts(i64 %38)
store i32 0, i32* %3
br label %40
40: ; preds = %37, %33, %24, %12
%41 = load i32, i32* %3
ret i32 %41
}

LLVM IR (-O2):
define i32 @blender_write_reg(i32 %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i32 @OS_disable_interrupts(i64* %3)
%6 = call i32 @lpc_write_reg(i32 4, i32 1245184)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = shl i32 %0, 16
%10 = or i32 %9, 10
%11 = call i32 @lpc_write_reg(i32 12, i32 %10)
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %8
%14 = call i32 @lpc_write_reg(i32 0, i32 %1)
br label %15
15: ; preds = %8, %2, %13
%16 = phi i32 [ %14, %13 ], [ %6, %2 ], [ %11, %8 ]
%17 = load i64, i64* %3
%18 = call i32 @OS_enable_interrupts(i64 %17)
ret i32 %16
}