xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help(void) {
  printf("usage: [OPTION]... [FILE]...\n"
         "If FILE is not specified, then standard input will be used\n\n"
         " -v, --verbose\tverbose mode\n"
         " -c, --compress\tcompress input file and write to the output\n"
         " -d, --decompress\tdecompress input file and write to the output\n"
         " -o, --out FILE\tsave output to FILE instead to stdout\n"
         " -h, --help\tprint this help\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [324 x i8] c"usage: [OPTION]... [FILE]...\0AIf FILE is not specified, then standard input will be used\0A\0A -v, --verbose\09verbose mode\0A -c, --compress\09compress input file and write to the output\0A -d, --decompress\09decompress input file and write to the output\0A -o, --out FILE\09save output to FILE instead to stdout\0A -h, --help\09print this help\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([324 x i8], [324 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [323 x i8] c"usage: [OPTION]... [FILE]...\0AIf FILE is not specified, then standard input will be used\0A\0A -v, --verbose\09verbose mode\0A -c, --compress\09compress input file and write to the output\0A -d, --decompress\09decompress input file and write to the output\0A -o, --out FILE\09save output to FILE instead to stdout\0A -h, --help\09print this help\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([323 x i8], [323 x i8]* @str, i64 0, i64 0))
ret void
}
int conditiontest(int test1, int test2) {
  int result;
  if (test1 > test2) {
    result = test1;
  } else if (test1 < test2) {
    result = test2;
  } else {
    result = 0;
  }
  return result;
}


x86 assembly (clang, -O0):
<conditiontest>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <conditiontest+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1144 <conditiontest+0x44>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1138 <conditiontest+0x38>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    113f <conditiontest+0x3f>
movl   $0x0,-0xc(%rbp)
jmp    1144 <conditiontest+0x44>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conditiontest>:
xor    %eax,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @conditiontest(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %3
store i32 %10, i32* %5
br label %19
11: ; preds = %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %4
store i32 %16, i32* %5
br label %18
17: ; preds = %11
store i32 0, i32* %5
br label %18
18: ; preds = %17, %15
br label %19
19: ; preds = %18, %9
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @conditiontest(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = icmp slt i32 %0, %1
%5 = select i1 %4, i32 %1, i32 0
%6 = select i1 %3, i32 %0, i32 %5
ret i32 %6
}
void WebPInitUpsamplersMSA(void) {}


x86 assembly (clang, -O0):
<WebPInitUpsamplersMSA>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WebPInitUpsamplersMSA>:
ret

LLVM IR (-O0):
define void @WebPInitUpsamplersMSA() {
ret void
}

LLVM IR (-O2):
define void @WebPInitUpsamplersMSA() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pic_send_EOI_normal(int);
void isr_irq_3() { pic_send_EOI_normal(3); }


x86 assembly (clang, -O0):
<isr_irq_3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <pic_send_EOI_normal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isr_irq_3>:
mov    $0x3,%edi
jmp    1030 <pic_send_EOI_normal@plt>

LLVM IR (-O0):
define void @isr_irq_3() {
%1 = call i32 @pic_send_EOI_normal(i32 3)
ret void
}

LLVM IR (-O2):
define void @isr_irq_3() {
%1 = tail call i32 @pic_send_EOI_normal(i32 3)
ret void
}
int color_offset_f2(int x, int y) {
  return ((y << 10) - (((x << 10) * 70) / 67) - (7 << 10)) >> 10;
}


x86 assembly (clang, -O0):
<color_offset_f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xa,%eax
imul   $0x46,%eax,%eax
mov    $0x43,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
sub    $0x1c00,%eax
sar    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<color_offset_f2>:
shl    $0xa,%esi
imul   $0x11800,%edi,%eax
cltq
imul   $0xfffffffff85bb395,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x21,%rax
add    %ecx,%eax
add    %esi,%eax
add    $0xffffe400,%eax
sar    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @color_offset_f2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 10
%7 = load i32, i32* %3
%8 = shl i32 %7, 10
%9 = mul nsw i32 %8, 70
%10 = sdiv i32 %9, 67
%11 = sub nsw i32 %6, %10
%12 = sub nsw i32 %11, 7168
%13 = ashr i32 %12, 10
ret i32 %13
}

LLVM IR (-O2):
define i32 @color_offset_f2(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = mul i32 %0, 71680
%5 = sdiv i32 %4, -67
%6 = add i32 %3, -7168
%7 = add i32 %6, %5
%8 = ashr i32 %7, 10
ret i32 %8
}
int main() {
  int arr[4][3] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
  arr[3][2] = 3;
  arr[6][3] = 10;
  arr[3][6] = 10;
  arr[0][1] = 4;
  arr[-6][3] = 10;
  arr[3][-3] = 10;
  for (int i = 0; i < 10; ++i) {
    arr[i][i] = 5;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xed6(%rip),%rsi
mov    $0x30,%edx
call   1030 <memcpy@plt>
movl   $0x3,-0x14(%rbp)
movl   $0xa,0x14(%rbp)
movl   $0xa,-0x4(%rbp)
movl   $0x4,-0x3c(%rbp)
movl   $0xa,-0x7c(%rbp)
movl   $0xa,-0x28(%rbp)
movl   $0x0,-0x44(%rbp)
cmpl   $0xa,-0x44(%rbp)
jge    1197 <main+0x87>
movslq -0x44(%rbp),%rcx
lea    -0x40(%rbp),%rax
imul   $0xc,%rcx,%rcx
add    %rcx,%rax
movslq -0x44(%rbp),%rcx
movl   $0x5,(%rax,%rcx,4)
mov    -0x44(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x44(%rbp)
jmp    1165 <main+0x55>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.arr = [4 x [3 x i32]] [[3 x i32] [i32 1, i32 2, i32 3], [3 x i32] [i32 4, i32 5, i32 6], [3 x i32] [i32 7, i32 8, i32 9], [3 x i32] [i32 10, i32 11, i32 12]]
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x [3 x i32]]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [4 x [3 x i32]]* %2 to i8*
%5 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 3
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 2
store i32 3, i32* %6
%7 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 6
%8 = getelementptr inbounds [3 x i32], [3 x i32]* %7, i64 0, i64 3
store i32 10, i32* %8
%9 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 3
%10 = getelementptr inbounds [3 x i32], [3 x i32]* %9, i64 0, i64 6
store i32 10, i32* %10
%11 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 0
%12 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 1
store i32 4, i32* %12
%13 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 -6
%14 = getelementptr inbounds [3 x i32], [3 x i32]* %13, i64 0, i64 3
store i32 10, i32* %14
%15 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 3
%16 = getelementptr inbounds [3 x i32], [3 x i32]* %15, i64 0, i64 -3
store i32 10, i32* %16
store i32 0, i32* %3
br label %17
17: ; preds = %27, %0
%18 = load i32, i32* %3
%19 = icmp slt i32 %18, 10
br i1 %19, label %20, label %30
20: ; preds = %17
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds [4 x [3 x i32]], [4 x [3 x i32]]* %2, i64 0, i64 %22
%24 = load i32, i32* %3
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds [3 x i32], [3 x i32]* %23, i64 0, i64 %25
store i32 5, i32* %26
br label %27
27: ; preds = %20
%28 = load i32, i32* %3
%29 = add nsw i32 %28, 1
store i32 %29, i32* %3
br label %17
30: ; preds = %17
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int write(int, unsigned char *, int);
void putblk(unsigned char *blk, int blklen) {
  int len;
  len = write(1, blk, blklen);
  if (len != blklen) {
    fprintf(stderr, "putblk: write error\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<putblk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     117e <putblk+0x4e>
mov    0x2e7a(%rip),%rax
mov    (%rax),%edi
lea    0xe91(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putblk>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
mov    $0x1,%edi
mov    %ebx,%edx
call   1030 <write@plt>
cmp    %ebx,%eax
jne    1148 <putblk+0x18>
pop    %rbx
ret
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
lea    0xea8(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"putblk: write error\0A\00"
define void @putblk(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @write(i32 1, i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp ne i32 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i32, i32* @stderr
%14 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %2
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"putblk: write error\0A\00"
define void @putblk(i8* nocapture %0, i32 %1) {
%3 = tail call i32 @write(i32 1, i8* %0, i32 %1)
%4 = icmp eq i32 %3, %1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XFocusChangeEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XFocusChangeEvent(void) {
  XFocusChangeEvent *_p =
      (XFocusChangeEvent *)malloc(sizeof(XFocusChangeEvent));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XFocusChangeEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XFocusChangeEvent+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XFocusChangeEvent>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XFocusChangeEvent+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XFocusChangeEvent() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XFocusChangeEvent() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
scalar_t__ waitpid(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
void sigchild_handler(int sig) {
  (void)sig;
  while (waitpid(-1, NULL, WNOHANG) > 0)
    ;
}


x86 assembly (clang, -O0):
<sigchild_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jle    1141 <sigchild_handler+0x31>
jmp    111b <sigchild_handler+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigchild_handler>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    (%rbx),%edx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1030 <waitpid@plt>
test   %rax,%rax
jg     1120 <sigchild_handler+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define void @sigchild_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* @WNOHANG
%6 = call i64 @waitpid(i32 -1, i32* null, i32 %5)
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define void @sigchild_handler(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load i32, i32* @WNOHANG
%4 = tail call i64 @waitpid(i32 -1, i32* null, i32 %3)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
ret void
}
int qcs_kronecker_delta_function(int k, int j) {
  if (k == j)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<qcs_kronecker_delta_function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1122 <qcs_kronecker_delta_function+0x22>
movl   $0x1,-0x4(%rbp)
jmp    1129 <qcs_kronecker_delta_function+0x29>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcs_kronecker_delta_function>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @qcs_kronecker_delta_function(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @qcs_kronecker_delta_function(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_F7uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xF7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F7uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F7uint64_highword_mem>:
testb  $0xf7,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F7uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 247
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F7uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1060856922112
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void dpi_tcl_exec_cmd(char *cmd) {
  printf("tcl intregation is not support in this simulator\n");
}


x86 assembly (clang, -O0):
<dpi_tcl_exec_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpi_tcl_exec_cmd>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"tcl intregation is not support in this simulator\0A\00"
define void @dpi_tcl_exec_cmd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [49 x i8] c"tcl intregation is not support in this simulator\00"
define void @dpi_tcl_exec_cmd(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mj_main();
int main() {
  mj_main();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <mj_main@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <mj_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @mj_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @mj_main()
ret i32 0
}
void yy_2_pExtWsPlusTransient(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_2_pExtWsPlusTransient>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_2_pExtWsPlusTransient>:
ret

LLVM IR (-O0):
define void @yy_2_pExtWsPlusTransient(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_2_pExtWsPlusTransient(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
unsigned int __builtin_divweuo(unsigned int, unsigned int);
unsigned int div_weuo(unsigned int a, unsigned int b) {
  return __builtin_divweuo(a, b);
}


x86 assembly (clang, -O0):
<div_weuo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__builtin_divweuo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_weuo>:
jmp    1030 <__builtin_divweuo@plt>

LLVM IR (-O0):
define i32 @div_weuo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__builtin_divweuo(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @div_weuo(i32 %0, i32 %1) {
%3 = tail call i32 @__builtin_divweuo(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int O_CREAT;
int O_TRUNC;
int O_WRONLY;
void *doOpen(char const *, int);
void *__PHYSFS_platformOpenWrite(const char *filename) {
  return (doOpen(filename, O_WRONLY | O_CREAT | O_TRUNC));
}


x86 assembly (clang, -O0):
<__PHYSFS_platformOpenWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
mov    0x2ec8(%rip),%rax
or     (%rax),%esi
mov    0x2eb7(%rip),%rax
or     (%rax),%esi
call   1030 <doOpen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__PHYSFS_platformOpenWrite>:
mov    0x2eb1(%rip),%rax
mov    0x2eda(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    0x2ec7(%rip),%rax
or     (%rax),%esi
jmp    1030 <doOpen@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
define i8* @__PHYSFS_platformOpenWrite(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_WRONLY
%5 = load i32, i32* @O_CREAT
%6 = or i32 %4, %5
%7 = load i32, i32* @O_TRUNC
%8 = or i32 %6, %7
%9 = call i8* @doOpen(i8* %3, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
define i8* @__PHYSFS_platformOpenWrite(i8* %0) {
%2 = load i32, i32* @O_WRONLY
%3 = load i32, i32* @O_CREAT
%4 = or i32 %3, %2
%5 = load i32, i32* @O_TRUNC
%6 = or i32 %4, %5
%7 = tail call i8* @doOpen(i8* %0, i32 %6)
ret i8* %7
}
void pthread_cond_init() {}


x86 assembly (clang, -O0):
<pthread_cond_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_init>:
ret

LLVM IR (-O0):
define void @pthread_cond_init() {
ret void
}

LLVM IR (-O2):
define void @pthread_cond_init() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_PKEY;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ *do_b2i_bio(int /*<<< orphan*/ *, int);
EVP_PKEY *b2i_PublicKey_bio(BIO *in) { return do_b2i_bio(in, 1); }


x86 assembly (clang, -O0):
<b2i_PublicKey_bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <do_b2i_bio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b2i_PublicKey_bio>:
mov    $0x1,%esi
jmp    1030 <do_b2i_bio@plt>

LLVM IR (-O0):
define i32* @b2i_PublicKey_bio(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @do_b2i_bio(i32* %3, i32 1)
ret i32* %4
}

LLVM IR (-O2):
define i32* @b2i_PublicKey_bio(i32* %0) {
%2 = tail call i32* @do_b2i_bio(i32* %0, i32 1)
ret i32* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
float pow(int /*<<< orphan*/, int /*<<< orphan*/);
float pow_i_promote(int32_t lhs, int32_t rhs) { return pow(lhs, rhs); }


x86 assembly (clang, -O0):
<pow_i_promote>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow_i_promote>:
jmp    1030 <pow@plt>

LLVM IR (-O0):
define float @pow_i_promote(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call float @pow(i32 %5, i32 %6)
ret float %7
}

LLVM IR (-O2):
define float @pow_i_promote(i32 %0, i32 %1) {
%3 = tail call float @pow(i32 %0, i32 %1)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
void quit(int status) {
  kill(0, SIGTERM);
  exit(status);
}


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1030 <kill@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rbx
mov    %edi,%ebx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1030 <kill@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@SIGTERM = global i32 0
define void @quit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGTERM
%4 = call i32 @kill(i32 0, i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@SIGTERM = global i32 0
define void @quit(i32 %0) {
%2 = load i32, i32* @SIGTERM
%3 = tail call i32 @kill(i32 0, i32 %2)
%4 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void f2(void) { printf("hello world\n"); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"hello world\0A\00"
define void @f2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"hello world\00"
define void @f2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
int RequiredAlignment(void) { return 1; }


x86 assembly (clang, -O0):
<RequiredAlignment>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RequiredAlignment>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @RequiredAlignment() {
ret i32 1
}

LLVM IR (-O2):
define i32 @RequiredAlignment() {
ret i32 1
}
/* Variables and functions */
int middle(int);
short top(int x) { return 2 * middle(x); }


x86 assembly (clang, -O0):
<top>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <middle@plt>
shl    $0x1,%eax
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<top>:
push   %rax
call   1030 <middle@plt>
add    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define signext i16 @top(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @middle(i32 %3)
%5 = mul nsw i32 2, %4
%6 = trunc i32 %5 to i16
ret i16 %6
}

LLVM IR (-O2):
define signext i16 @top(i32 %0) {
%2 = tail call i32 @middle(i32 %0)
%3 = trunc i32 %2 to i16
%4 = shl i16 %3, 1
ret i16 %4
}
int ph1_sld3_pll_init(const struct uniphier_board_data *bd) { return 0; }


x86 assembly (clang, -O0):
<ph1_sld3_pll_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ph1_sld3_pll_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.uniphier_board_data = type opaque
define i32 @ph1_sld3_pll_init(%struct.uniphier_board_data* %0) {
%2 = alloca %struct.uniphier_board_data*
store %struct.uniphier_board_data* %0, %struct.uniphier_board_data** %2
ret i32 0
}

LLVM IR (-O2):
%struct.uniphier_board_data = type opaque
define i32 @ph1_sld3_pll_init(%struct.uniphier_board_data* nocapture readnone %0) {
ret i32 0
}
int min(int a, int b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
int khugepaged_enter_vma_merge(struct vm_area_struct *vma) { return 0; }


x86 assembly (clang, -O0):
<khugepaged_enter_vma_merge>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<khugepaged_enter_vma_merge>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define i32 @khugepaged_enter_vma_merge(%struct.vm_area_struct* %0) {
%2 = alloca %struct.vm_area_struct*
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define i32 @khugepaged_enter_vma_merge(%struct.vm_area_struct* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef void hashset;

/* Variables and functions */
int /*<<< orphan*/ assert(void const *);
scalar_t__ hashset_item(void const *, void const *);
int hashset_contains(const struct hashset *s, const void *key) {
  assert(s);
  assert(key);
  if (hashset_item(s, key)) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<hashset_contains>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x18(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <hashset_item@plt>
cmp    $0x0,%rax
je     1165 <hashset_contains+0x45>
movl   $0x1,-0x4(%rbp)
jmp    116c <hashset_contains+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashset_contains>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    %r14,%rdi
call   1040 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <hashset_item@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.hashset = type opaque
define i32 @hashset_contains(%struct.hashset* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.hashset*
%5 = alloca i8*
store %struct.hashset* %0, %struct.hashset** %4
store i8* %1, i8** %5
%6 = load %struct.hashset*, %struct.hashset** %4
%7 = bitcast %struct.hashset* %6 to i8*
%8 = call i32 @assert(i8* %7)
%9 = load i8*, i8** %5
%10 = call i32 @assert(i8* %9)
%11 = load %struct.hashset*, %struct.hashset** %4
%12 = bitcast %struct.hashset* %11 to i8*
%13 = load i8*, i8** %5
%14 = call i64 @hashset_item(i8* %12, i8* %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %2
store i32 1, i32* %3
br label %18
17: ; preds = %2
store i32 0, i32* %3
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
%struct.hashset = type opaque
define i32 @hashset_contains(%struct.hashset* %0, i8* %1) {
%3 = bitcast %struct.hashset* %0 to i8*
%4 = tail call i32 @assert(i8* %3)
%5 = tail call i32 @assert(i8* %1)
%6 = tail call i64 @hashset_item(i8* %3, i8* %1)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ output_byte(char);
void output_label_terminator(void) { output_byte(':'); }


x86 assembly (clang, -O0):
<output_label_terminator>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a,%edi
call   1030 <output_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_label_terminator>:
mov    $0x3a,%edi
jmp    1030 <output_byte@plt>

LLVM IR (-O0):
define void @output_label_terminator() {
%1 = call i32 @output_byte(i8 signext 58)
ret void
}

LLVM IR (-O2):
define void @output_label_terminator() {
%1 = tail call i32 @output_byte(i8 signext 58)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct ether_addr {
  int dummy;
};
typedef int int8_t;

/* Variables and functions */
struct ether_addr *ether_aton(int /*<<< orphan*/ *);
int /*<<< orphan*/ memcpy(void *, struct ether_addr *, int);
int8_t parse_esa(uint8_t *text, void *buf) {
  struct ether_addr *addr = ether_aton(text);
  if (addr == NULL) {
    return -1;
  }
  memcpy(buf, addr, sizeof(struct ether_addr));
  return 0;
}


x86 assembly (clang, -O0):
<parse_esa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <ether_aton@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1154 <parse_esa+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    116d <parse_esa+0x4d>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_esa>:
push   %rbx
mov    %rsi,%rbx
call   1040 <ether_aton@plt>
test   %rax,%rax
je     1142 <parse_esa+0x22>
mov    %rbx,%rdi
mov    %rax,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.ether_addr = type { i32 }
define i32 @parse_esa(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca %struct.ether_addr*
store i32* %0, i32** %4
store i8* %1, i8** %5
%7 = load i32*, i32** %4
%8 = call %struct.ether_addr* @ether_aton(i32* %7)
store %struct.ether_addr* %8, %struct.ether_addr** %6
%9 = load %struct.ether_addr*, %struct.ether_addr** %6
%10 = icmp eq %struct.ether_addr* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %16
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load %struct.ether_addr*, %struct.ether_addr** %6
%15 = call i32 @memcpy(i8* %13, %struct.ether_addr* %14, i32 4)
store i32 0, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.ether_addr = type { i32 }
define i32 @parse_esa(i32* %0, i8* %1) {
%3 = tail call %struct.ether_addr* @ether_aton(i32* %0)
%4 = icmp eq %struct.ether_addr* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memcpy(i8* %1, %struct.ether_addr* %3, i32 4)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *applet(char *const);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void usage(FILE *f, char *const arg0) {
  fprintf(f,
          "Usage: %s [OPTIONS]\n\n"
          "Options:\n"
          " -t or --timeout SECOND Set time-out in seconds [default=-1].\n"
          " -D or --debug          Turn on debug messages.\n"
          " -h or --help           Display this message.\n"
          " -V or --version        Display the version.\n"
          "",
          applet(arg0));
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <applet@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rdx
lea    0xeb1(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <applet@plt>
lea    0xecd(%rip),%rsi
mov    %rbx,%rdi
mov    %rax,%rdx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@.str = [232 x i8] c"Usage: %s [OPTIONS]\0A\0AOptions:\0A -t or --timeout SECOND Set time-out in seconds [default=-1].\0A -D or --debug Turn on debug messages.\0A -h or --help Display this message.\0A -V or --version Display the version.\0A\00"
define void @usage(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i8* @applet(i8* %6)
%8 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([232 x i8], [232 x i8]* @.str, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [232 x i8] c"Usage: %s [OPTIONS]\0A\0AOptions:\0A -t or --timeout SECOND Set time-out in seconds [default=-1].\0A -D or --debug Turn on debug messages.\0A -h or --help Display this message.\0A -V or --version Display the version.\0A\00"
define void @usage(i32* nocapture %0, i8* %1) {
%3 = tail call i8* @applet(i8* %1)
%4 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([232 x i8], [232 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
/* Type definitions */
struct timeval {
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int time_ms(void) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return (int)(tv.tv_usec / 1000);
}


x86 assembly (clang, -O0):
<time_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    -0x8(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_ms>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x26,%rax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @time_ms() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = sdiv i32 %4, 1000
ret i32 %5
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define i32 @time_ms() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = sdiv i32 %5, 1000
ret i32 %6
}
int mkpri(int level, int id) { return (((id) << 3) | (level)); }


x86 assembly (clang, -O0):
<mkpri>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
or     -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkpri>:
lea    0x0(,%rsi,8),%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @mkpri(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 3
%7 = load i32, i32* %3
%8 = or i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @mkpri(i32 %0, i32 %1) {
%3 = shl i32 %1, 3
%4 = or i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int strcmp(char const *const, char const *const);
int strptrcmp(const void *v1, const void *v2) {
  const char *const *s1 = v1;
  const char *const *s2 = v2;
  return strcmp(*s1, *s2);
}


x86 assembly (clang, -O0):
<strptrcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
mov    -0x20(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strptrcmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @strptrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
store i8** %8, i8*** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
store i8** %10, i8*** %6
%11 = load i8**, i8*** %5
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %6
%14 = load i8*, i8** %13
%15 = call i32 @strcmp(i8* %12, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @strptrcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %5, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ SetupMemoryPaging(int, int, unsigned char *);
void Setup256kExpansion(unsigned char *pExpansionMemoryAddress) {
  int i;
  for (i = 0; i < 64; i++) {
    if ((i & 0x020) == 0) {
      SetupMemoryPaging(i, (i & 0x01f), pExpansionMemoryAddress);
    }
  }
}


x86 assembly (clang, -O0):
<Setup256kExpansion>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x40,-0xc(%rbp)
jge    1161 <Setup256kExpansion+0x51>
mov    -0xc(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
jne    114e <Setup256kExpansion+0x3e>
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%esi
and    $0x1f,%esi
mov    -0x8(%rbp),%rdx
call   1030 <SetupMemoryPaging@plt>
jmp    1153 <Setup256kExpansion+0x43>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <Setup256kExpansion+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Setup256kExpansion>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
jmp    1128 <Setup256kExpansion+0x18>
nopw   0x0(%rax,%rax,1)
add    $0x1,%ebp
cmp    $0x40,%ebp
je     113f <Setup256kExpansion+0x2f>
test   $0x20,%bpl
jne    1120 <Setup256kExpansion+0x10>
mov    %ebp,%esi
and    $0x1f,%esi
mov    %ebp,%edi
mov    %rbx,%rdx
call   1030 <SetupMemoryPaging@plt>
jmp    1120 <Setup256kExpansion+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @Setup256kExpansion(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 64
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i32, i32* %3
%9 = and i32 %8, 32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i32, i32* %3
%13 = load i32, i32* %3
%14 = and i32 %13, 31
%15 = load i8*, i8** %2
%16 = call i32 @SetupMemoryPaging(i32 %12, i32 %14, i8* %15)
br label %17
17: ; preds = %11, %7
br label %18
18: ; preds = %17
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @Setup256kExpansion(i8* %0) {
br label %2
2: ; preds = %1, %9
%3 = phi i32 [ 0, %1 ], [ %10, %9 ]
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = and i32 %3, 31
%8 = tail call i32 @SetupMemoryPaging(i32 %3, i32 %7, i8* %0)
br label %9
9: ; preds = %2, %6
%10 = add nuw nsw i32 %3, 1
%11 = icmp eq i32 %10, 64
br i1 %11, label %12, label %2
12: ; preds = %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char *, size_t);
int grow_buff(char **buff, size_t *len) {
  size_t old_len = *len;
  char *tmp = *buff;
  *len *= 2;
  *buff = malloc(*len);
  memcpy(*buff, tmp, old_len);
  free(tmp);
  return 1;
}


x86 assembly (clang, -O0):
<grow_buff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
shl    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grow_buff>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    (%rsi),%r14
mov    (%rdi),%r15
lea    (%r14,%r14,1),%rdi
mov    %rdi,(%rsi)
call   1050 <malloc@plt>
mov    %rax,(%rbx)
mov    %rax,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1040 <memcpy@plt>
mov    %r15,%rdi
call   1030 <free@plt>
mov    $0x1,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @grow_buff(i8** %0, i64* %1) {
%3 = alloca i8**
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i8*
store i8** %0, i8*** %3
store i64* %1, i64** %4
%7 = load i64*, i64** %4
%8 = load i64, i64* %7
store i64 %8, i64* %5
%9 = load i8**, i8*** %3
%10 = load i8*, i8** %9
store i8* %10, i8** %6
%11 = load i64*, i64** %4
%12 = load i64, i64* %11
%13 = mul i64 %12, 2
store i64 %13, i64* %11
%14 = load i64*, i64** %4
%15 = load i64, i64* %14
%16 = call i8* @malloc(i64 %15)
%17 = load i8**, i8*** %3
store i8* %16, i8** %17
%18 = load i8**, i8*** %3
%19 = load i8*, i8** %18
%20 = load i8*, i8** %6
%21 = load i64, i64* %5
%22 = call i32 @memcpy(i8* %19, i8* %20, i64 %21)
%23 = load i8*, i8** %6
%24 = call i32 @free(i8* %23)
ret i32 1
}

LLVM IR (-O2):
define i32 @grow_buff(i8** nocapture %0, i64* nocapture %1) {
%3 = load i64, i64* %1
%4 = load i8*, i8** %0
%5 = shl i64 %3, 1
store i64 %5, i64* %1
%6 = tail call i8* @malloc(i64 %5)
store i8* %6, i8** %0
%7 = tail call i32 @memcpy(i8* %6, i8* %4, i64 %3)
%8 = tail call i32 @free(i8* %4)
ret i32 1
}
void foo550(int p) {}


x86 assembly (clang, -O0):
<foo550>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo550>:
ret

LLVM IR (-O0):
define void @foo550(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo550(i32 %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef scalar_t__ ui32Base;

/* Variables and functions */
void PWMGenFaultTriggerSet(uint32_t ui32Base, uint32_t ui32Gen,
                           uint32_t ui32Group, uint32_t ui32FaultTriggers) {
  ;
  ;

  ;

  ;

  ;
  if (ui32Group == 0) {
    (*((volatile uint32_t *)(((ui32Base) + (ui32Gen)) + 0x00000034))) =
        ui32FaultTriggers;
  } else {
    (*((volatile uint32_t *)(((ui32Base) + (ui32Gen)) + 0x00000038))) =
        ui32FaultTriggers;
  }
}


x86 assembly (clang, -O0):
<PWMGenFaultTriggerSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1134 <PWMGenFaultTriggerSet+0x34>
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,0x34(%rax)
jmp    1144 <PWMGenFaultTriggerSet+0x44>
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,0x38(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenFaultTriggerSet>:
xor    %eax,%eax
test   %rdx,%rdx
setne  %al
add    %rsi,%rdi
mov    %rcx,0x34(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @PWMGenFaultTriggerSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %4
%12 = load i64, i64* %8
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = add nsw i64 %13, %14
%16 = add nsw i64 %15, 52
%17 = inttoptr i64 %16 to i64*
store volatile i64 %12, i64* %17
br label %25
18: ; preds = %4
%19 = load i64, i64* %8
%20 = load i64, i64* %5
%21 = load i64, i64* %6
%22 = add nsw i64 %20, %21
%23 = add nsw i64 %22, 56
%24 = inttoptr i64 %23 to i64*
store volatile i64 %19, i64* %24
br label %25
25: ; preds = %18, %11
ret void
}

LLVM IR (-O2):
define void @PWMGenFaultTriggerSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %2, 0
%6 = add nsw i64 %1, %0
%7 = select i1 %5, i64 52, i64 56
%8 = add nsw i64 %6, %7
%9 = inttoptr i64 %8 to i64*
store volatile i64 %3, i64* %9
ret void
}
const char *ccnxControlAPIAbout_Name(void) { return "CCNx Control API"; }


x86 assembly (clang, -O0):
<ccnxControlAPIAbout_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnxControlAPIAbout_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"CCNx Control API\00"
define i8* @ccnxControlAPIAbout_Name() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [17 x i8] c"CCNx Control API\00"
define i8* @ccnxControlAPIAbout_Name() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}
void testClosureIrV(void (*closure)(int), int a1) { (*closure)(a1); }


x86 assembly (clang, -O0):
<testClosureIrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%edi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureIrV>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureIrV(void (i32)* %0, i32 %1) {
%3 = alloca void (i32)*
%4 = alloca i32
store void (i32)* %0, void (i32)** %3
store i32 %1, i32* %4
%5 = load void (i32)*, void (i32)** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @testClosureIrV(void (i32)* nocapture %0, i32 %1) {
tail call void %0(i32 %1)
ret void
}
void sb_wb_clear(void *p) {}


x86 assembly (clang, -O0):
<sb_wb_clear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_wb_clear>:
ret

LLVM IR (-O0):
define void @sb_wb_clear(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @sb_wb_clear(i8* nocapture %0) {
ret void
}
void RSA_public_encrypt(void) {}


x86 assembly (clang, -O0):
<RSA_public_encrypt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_public_encrypt>:
ret

LLVM IR (-O0):
define void @RSA_public_encrypt() {
ret void
}

LLVM IR (-O2):
define void @RSA_public_encrypt() {
ret void
}