xunge/DecIR huggingface dataset:
int remote_number_from_port(int port) {
  if (port & 1)
    return -1;
  port = (port - 5554) >> 1;
  if ((unsigned)port >= 16)
    return -1;
  return 5554 + port * 2;
}


x86 assembly (clang, -O0):
<remote_number_from_port>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1122 <remote_number_from_port+0x22>
movl   $0xffffffff,-0x4(%rbp)
jmp    1154 <remote_number_from_port+0x54>
mov    -0x8(%rbp),%eax
sub    $0x15b2,%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x10,-0x8(%rbp)
jb     1146 <remote_number_from_port+0x46>
movl   $0xffffffff,-0x4(%rbp)
jmp    1154 <remote_number_from_port+0x54>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
add    $0x15b2,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<remote_number_from_port>:
lea    -0x15d2(%rdi),%eax
mov    %edi,%ecx
and    $0xfffffffe,%ecx
cmp    $0xffffffe0,%eax
mov    $0xffffffff,%eax
cmovb  %eax,%ecx
test   $0x1,%dil
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @remote_number_from_port(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %19
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 5554
%11 = ashr i32 %10, 1
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = icmp uge i32 %12, 16
br i1 %13, label %14, label %15
14: ; preds = %8
store i32 -1, i32* %2
br label %19
15: ; preds = %8
%16 = load i32, i32* %3
%17 = mul nsw i32 %16, 2
%18 = add nsw i32 5554, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %15, %14, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @remote_number_from_port(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp ne i32 %2, 0
%4 = add i32 %0, -5586
%5 = icmp ult i32 %4, -32
%6 = or i1 %3, %5
%7 = and i32 %0, -2
%8 = select i1 %6, i32 -1, i32 %7
ret i32 %8
}
unsigned int rotr(unsigned int value, unsigned int shift) {
  return (value >> shift) | (value << (32 - shift));
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    %esi,%ecx
mov    %edi,%eax
ror    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rotr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub i32 32, %9
%11 = shl i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotr(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = sub i32 32, %1
%5 = shl i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
void av_bprint_init() {}


x86 assembly (clang, -O0):
<av_bprint_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_bprint_init>:
ret

LLVM IR (-O0):
define void @av_bprint_init() {
ret void
}

LLVM IR (-O2):
define void @av_bprint_init() {
ret void
}
void LedDriver_Create(void) {}


x86 assembly (clang, -O0):
<LedDriver_Create>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedDriver_Create>:
ret

LLVM IR (-O0):
define void @LedDriver_Create() {
ret void
}

LLVM IR (-O2):
define void @LedDriver_Create() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fibonacciBuzzFizz(int);
int main(int argc, char *argv[]) {
  fibonacciBuzzFizz(100);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x64,%edi
call   1030 <fibonacciBuzzFizz@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
call   1030 <fibonacciBuzzFizz@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @fibonacciBuzzFizz(i32 100)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fibonacciBuzzFizz(i32 100)
ret i32 0
}
int test_imm_BCint64_lowword_reg(long long val) {
  return ((val) & (0xBC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BCint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xbc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BCint64_lowword_reg>:
test   $0xbc,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BCint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 188
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_BCint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 188
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ pow(double, double);
int /*<<< orphan*/ powf(float, float);
int /*<<< orphan*/ powl(long double, long double);
void uninitvar_pow(void) {
  float f1, f2;
  (void)powf(f1, f2);
  double d1, d2;
  (void)pow(d1, d2);
  long double ld1, ld2;
  (void)powl(ld1, ld2);
}


x86 assembly (clang, -O0):
<uninitvar_pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1040 <powf@plt>
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
call   1050 <pow@plt>
fldt   -0x30(%rbp)
fldt   -0x40(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <powl@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_pow>:
sub    $0x28,%rsp
call   1040 <powf@plt>
call   1050 <pow@plt>
call   1030 <powl@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @uninitvar_pow() {
%1 = alloca float
%2 = alloca float
%3 = alloca double
%4 = alloca double
%5 = alloca x86_fp80
%6 = alloca x86_fp80
%7 = load float, float* %1
%8 = load float, float* %2
%9 = call i32 @powf(float %7, float %8)
%10 = load double, double* %3
%11 = load double, double* %4
%12 = call i32 @pow(double %10, double %11)
%13 = load x86_fp80, x86_fp80* %5
%14 = load x86_fp80, x86_fp80* %6
%15 = call i32 @powl(x86_fp80 %13, x86_fp80 %14)
ret void
}

LLVM IR (-O2):
define void @uninitvar_pow() {
%1 = tail call i32 @powf(float undef, float undef)
%2 = tail call i32 @pow(double undef, double undef)
%3 = tail call i32 @powl(x86_fp80 undef, x86_fp80 undef)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ AUTH;

/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ *authnone_create();
int /*<<< orphan*/ printf(char *, int);
int main(int argn, char *argc[]) {
  int run_mode = 0;
  int test_status = 1;
  int progNum = atoi(argc[2]);
  AUTH *authNone = NULL;
  authNone = authnone_create();
  test_status = ((AUTH *)authNone != NULL) ? 0 : 1;
  printf("%d\n", test_status);
  return test_status;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x1c(%rbp)
movq   $0x0,-0x28(%rbp)
mov    $0x0,%al
call   1030 <authnone_create@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%esi
lea    0xe6a(%rip),%rdi
call   1040 <printf@plt>
mov    -0x18(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <authnone_create@plt>
xor    %ebx,%ebx
test   %rax,%rax
sete   %bl
lea    0xec9(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 1, i32* %7
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 2
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
store i32 %13, i32* %8
store i32* null, i32** %9
%14 = call i32* (...) @authnone_create()
store i32* %14, i32** %9
%15 = load i32*, i32** %9
%16 = icmp ne i32* %15, null
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 0, i32 1
store i32 %18, i32* %7
%19 = load i32, i32* %7
%20 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %19)
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* (...) @authnone_create()
%4 = icmp eq i32* %3, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 %5
}
/* Variables and functions */
int PAPI_lock(int);
void papif_lock__(int *lock, int *check) { *check = PAPI_lock(*lock); }


x86 assembly (clang, -O0):
<papif_lock__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <PAPI_lock@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_lock__>:
push   %rbx
mov    %rsi,%rbx
mov    (%rdi),%edi
call   1030 <PAPI_lock@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_lock__(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = call i32 @PAPI_lock(i32 %6)
%8 = load i32*, i32** %4
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @papif_lock__(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = tail call i32 @PAPI_lock(i32 %3)
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
int _uptime_error(char const *message, int ret) {
  fputs("uptime"
        ": ",
        stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_uptime_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uptime_error>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"uptime: \00"
@stderr = global i32 0
define i32 @_uptime_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [9 x i8] c"uptime: \00"
@stderr = global i32 0
define i32 @_uptime_error(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
/* Variables and functions */
int txtarray_write4(char const *, char const *, int, double *, int, double *,
                    int, double *, int, double *, int);
int txtarray_write_all(const char *filename, const char *header, int nstations,
                       double *stations, double *displacements,
                       double *derivatives, double *stress) {
  return txtarray_write4(filename, header, nstations, stations, 3,
                         displacements, 3, derivatives, 9, stress, 6);
}


x86 assembly (clang, -O0):
<txtarray_write_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r9
mov    -0x30(%rbp),%r10
mov    0x10(%rbp),%rax
mov    $0x3,%r8d
movl   $0x3,(%rsp)
mov    %r10,0x8(%rsp)
movl   $0x9,0x10(%rsp)
mov    %rax,0x18(%rsp)
movl   $0x6,0x20(%rsp)
call   1030 <txtarray_write4@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txtarray_write_all>:
push   %rax
mov    %r9,%rax
mov    %r8,%r9
sub    $0x8,%rsp
mov    $0x3,%r8d
push   $0x6
push   0x20(%rsp)
push   $0x9
push   %rax
push   $0x3
call   1030 <txtarray_write4@plt>
add    $0x30,%rsp
pop    %rcx
ret

LLVM IR (-O0):
define i32 @txtarray_write_all(i8* %0, i8* %1, i32 %2, double* %3, double* %4, double* %5, double* %6) {
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
%11 = alloca double*
%12 = alloca double*
%13 = alloca double*
%14 = alloca double*
store i8* %0, i8** %8
store i8* %1, i8** %9
store i32 %2, i32* %10
store double* %3, double** %11
store double* %4, double** %12
store double* %5, double** %13
store double* %6, double** %14
%15 = load i8*, i8** %8
%16 = load i8*, i8** %9
%17 = load i32, i32* %10
%18 = load double*, double** %11
%19 = load double*, double** %12
%20 = load double*, double** %13
%21 = load double*, double** %14
%22 = call i32 @txtarray_write4(i8* %15, i8* %16, i32 %17, double* %18, i32 3, double* %19, i32 3, double* %20, i32 9, double* %21, i32 6)
ret i32 %22
}

LLVM IR (-O2):
define i32 @txtarray_write_all(i8* %0, i8* %1, i32 %2, double* %3, double* %4, double* %5, double* %6) {
%8 = tail call i32 @txtarray_write4(i8* %0, i8* %1, i32 %2, double* %3, i32 3, double* %4, i32 3, double* %5, i32 9, double* %6, i32 6)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void halWriteReg32(uintptr_t physicalAddress, uint32_t val) {
  volatile uint32_t *ptr = (uint32_t *)physicalAddress;
  *ptr = val;
}


x86 assembly (clang, -O0):
<halWriteReg32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<halWriteReg32>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @halWriteReg32(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32*
store i64 %0, i64* %3
store i32 %1, i32* %4
%6 = load i64, i64* %3
%7 = inttoptr i64 %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = load i32*, i32** %5
store volatile i32 %8, i32* %9
ret void
}

LLVM IR (-O2):
define void @halWriteReg32(i64 %0, i32 %1) {
%3 = inttoptr i64 %0 to i32*
store volatile i32 %1, i32* %3
ret void
}
int fun1(int i1, int *p2, int *p3, int i4) { return i1 + *p2 + *p3 + i4; }


x86 assembly (clang, -O0):
<fun1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
mov    -0x18(%rbp),%rcx
add    (%rcx),%eax
add    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1>:
lea    (%rdi,%rcx,1),%eax
add    (%rsi),%eax
add    (%rdx),%eax
ret

LLVM IR (-O0):
define i32 @fun1(i32 %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = add nsw i32 %9, %11
%13 = load i32*, i32** %7
%14 = load i32, i32* %13
%15 = add nsw i32 %12, %14
%16 = load i32, i32* %8
%17 = add nsw i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @fun1(i32 %0, i32* nocapture %1, i32* nocapture %2, i32 %3) {
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = add i32 %3, %0
%8 = add i32 %7, %5
%9 = add i32 %8, %6
ret i32 %9
}
__attribute__((no)) unsigned int andc_vp(unsigned int a, unsigned int *b) {
  return ~*b & a;
}


x86 assembly (clang, -O0):
<andc_vp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
xor    $0xffffffff,%eax
and    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<andc_vp>:
mov    (%rsi),%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @andc_vp(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = xor i32 %6, -1
%8 = load i32, i32* %3
%9 = and i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @andc_vp(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = xor i32 %3, -1
%5 = and i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  while (x > 0 && x > y) {
    y = y + x;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jle    114e <main+0x3e>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setg   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    115e <main+0x4e>
jmp    116c <main+0x5c>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <main+0x23>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
br label %6
6: ; preds = %15, %0
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = icmp sgt i32 %10, %11
br label %13
13: ; preds = %9, %6
%14 = phi i1 [ false, %6 ], [ %12, %9 ]
br i1 %14, label %15, label %19
15: ; preds = %13
%16 = load i32, i32* %3
%17 = load i32, i32* %2
%18 = add nsw i32 %16, %17
store i32 %18, i32* %3
br label %6
19: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Write_LCD(int, char *, int);
void Disable_Backlight(int fd) {
  char cmd[] = {254, 70, 253};
  Write_LCD(fd, cmd, 3);
}


x86 assembly (clang, -O0):
<Disable_Backlight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xede(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xed6(%rip),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x7(%rbp),%rsi
mov    $0x3,%edx
call   1030 <Write_LCD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Disable_Backlight>:
push   %rax
movb   $0xfd,0x6(%rsp)
movw   $0x46fe,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x3,%edx
call   1030 <Write_LCD@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.Disable_Backlight.cmd = [3 x i8] c"\FEF\FD"
define void @Disable_Backlight(i32 %0) {
%2 = alloca i32
%3 = alloca [3 x i8]
store i32 %0, i32* %2
%4 = bitcast [3 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %3, i64 0, i64 0
%7 = call i32 @Write_LCD(i32 %5, i8* %6, i32 3)
ret void
}

LLVM IR (-O2):
@__const.Disable_Backlight.cmd = [3 x i8] c"\FEF\FD"
define void @Disable_Backlight(i32 %0) {
%2 = alloca [3 x i8]
%3 = getelementptr inbounds [3 x i8], [3 x i8]* %2, i64 0, i64 0
%4 = call i32 @Write_LCD(i32 %0, i8* %3, i32 3)
ret void
}
int radix_letter(char c) {
  switch (c) {
  case 'b':
  case 'B':
  case 'y':
  case 'Y':
    return 2;
  case 'o':
  case 'O':
  case 'q':
  case 'Q':
    return 8;
  case 'h':
  case 'H':
  case 'x':
  case 'X':
    return 16;
  case 'd':
  case 'D':
  case 't':
  case 'T':
    return 10;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<radix_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffbe,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x37,%eax
ja     1164 <radix_letter+0x64>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x2,-0x4(%rbp)
jmp    116b <radix_letter+0x6b>
movl   $0x8,-0x4(%rbp)
jmp    116b <radix_letter+0x6b>
movl   $0x10,-0x4(%rbp)
jmp    116b <radix_letter+0x6b>
movl   $0xa,-0x4(%rbp)
jmp    116b <radix_letter+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<radix_letter>:
add    $0xffffffbe,%edi
cmp    $0x37,%edi
ja     1130 <radix_letter+0x30>
mov    $0x2,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
mov    $0xa,%eax
ret
mov    $0x10,%eax
ret
mov    $0x8,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @radix_letter(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 98, label %6
i32 66, label %6
i32 121, label %6
i32 89, label %6
i32 111, label %7
i32 79, label %7
i32 113, label %7
i32 81, label %7
i32 104, label %8
i32 72, label %8
i32 120, label %8
i32 88, label %8
i32 100, label %9
i32 68, label %9
i32 116, label %9
i32 84, label %9
]
6: ; preds = %1, %1, %1, %1
store i32 2, i32* %2
br label %11
7: ; preds = %1, %1, %1, %1
store i32 8, i32* %2
br label %11
8: ; preds = %1, %1, %1, %1
store i32 16, i32* %2
br label %11
9: ; preds = %1, %1, %1, %1
store i32 10, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @radix_letter(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %6 [
i32 98, label %7
i32 66, label %7
i32 121, label %7
i32 89, label %7
i32 111, label %3
i32 79, label %3
i32 113, label %3
i32 81, label %3
i32 104, label %4
i32 72, label %4
i32 120, label %4
i32 88, label %4
i32 100, label %5
i32 68, label %5
i32 116, label %5
i32 84, label %5
]
3: ; preds = %1, %1, %1, %1
br label %7
4: ; preds = %1, %1, %1, %1
br label %7
5: ; preds = %1, %1, %1, %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %1, %1, %1, %6, %5, %4, %3
%8 = phi i32 [ 0, %6 ], [ 10, %5 ], [ 16, %4 ], [ 8, %3 ], [ 2, %1 ], [ 2, %1 ], [ 2, %1 ], [ 2, %1 ]
ret i32 %8
}
void __attribute__((weak)) _on_bootstrap(void) {}


x86 assembly (clang, -O0):
<_on_bootstrap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_on_bootstrap>:
ret

LLVM IR (-O0):
define weak void @_on_bootstrap() {
ret void
}

LLVM IR (-O2):
define weak void @_on_bootstrap() {
ret void
}
char pgm_read_byte_near(const char *p) { return *p; }


x86 assembly (clang, -O0):
<pgm_read_byte_near>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgm_read_byte_near>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define signext i8 @pgm_read_byte_near(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @pgm_read_byte_near(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
/* Variables and functions */
int rand();
void randomGenerator(int *vetor, int tam) {
  for (int i = 0; i < tam; i++) {
    vetor[i] = (rand() % 8193);
  }
}


x86 assembly (clang, -O0):
<randomGenerator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <randomGenerator+0x4a>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2001,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <randomGenerator+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomGenerator>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1163 <randomGenerator+0x53>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x3ffe001,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x27,%rcx
add    %edx,%ecx
mov    %ecx,%edx
shl    $0xd,%edx
add    %ecx,%edx
sub    %edx,%eax
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <randomGenerator+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @randomGenerator(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = srem i32 %11, 8193
%13 = load i32*, i32** %3
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
store i32 %12, i32* %16
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @randomGenerator(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %12, %7 ]
%9 = tail call i32 (...) @rand()
%10 = srem i32 %9, 8193
%11 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 %10, i32* %11
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR87_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR87_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR87_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR87_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR87_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ADCHS_ISR();
int /*<<< orphan*/ SPIFI_ISR();
void SPIFI_ADCHS_ISR(void) {
  SPIFI_ISR();
  ADCHS_ISR();
}


x86 assembly (clang, -O0):
<SPIFI_ADCHS_ISR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <SPIFI_ISR@plt>
mov    $0x0,%al
call   1030 <ADCHS_ISR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIFI_ADCHS_ISR>:
push   %rax
xor    %eax,%eax
call   1040 <SPIFI_ISR@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <ADCHS_ISR@plt>

LLVM IR (-O0):
define void @SPIFI_ADCHS_ISR() {
%1 = call i32 (...) @SPIFI_ISR()
%2 = call i32 (...) @ADCHS_ISR()
ret void
}

LLVM IR (-O2):
define void @SPIFI_ADCHS_ISR() {
%1 = tail call i32 (...) @SPIFI_ISR()
%2 = tail call i32 (...) @ADCHS_ISR()
ret void
}
int aa_opt_is_leq(int lb, int ub) { return !lb && ub; }


x86 assembly (clang, -O0):
<aa_opt_is_leq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jne    1123 <aa_opt_is_leq+0x23>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_opt_is_leq>:
test   %edi,%edi
sete   %al
test   %esi,%esi
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @aa_opt_is_leq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @aa_opt_is_leq(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp ne i32 %1, 0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ sleep(int);
int main() {
  while (1) {
    puts("Hi!\n");
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    112f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
@.str = [5 x i8] c"Hi!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @puts(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @sleep(i32 1)
br label %2
}

LLVM IR (-O2):
@.str = [5 x i8] c"Hi!\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @sleep(i32 1)
br label %1
}
void sortByNomeComponenteTres() {}


x86 assembly (clang, -O0):
<sortByNomeComponenteTres>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortByNomeComponenteTres>:
ret

LLVM IR (-O0):
define void @sortByNomeComponenteTres() {
ret void
}

LLVM IR (-O2):
define void @sortByNomeComponenteTres() {
ret void
}
void TransposeWx8_NEON() {}


x86 assembly (clang, -O0):
<TransposeWx8_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TransposeWx8_NEON>:
ret

LLVM IR (-O0):
define void @TransposeWx8_NEON() {
ret void
}

LLVM IR (-O2):
define void @TransposeWx8_NEON() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void UARTTxIntModeSet(uint32_t ui32Base, uint32_t ui32Mode) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000030))) =
      (((*((volatile uint32_t *)(ui32Base + 0x00000030))) &
        ~(0x00000010 | 0x00000000)) |
       ui32Mode);
}


x86 assembly (clang, -O0):
<UARTTxIntModeSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    (%rax),%ecx
and    $0xffffffef,%ecx
or     -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTxIntModeSet>:
movslq %edi,%rax
mov    0x30(%rax),%ecx
and    $0xffffffef,%ecx
or     %esi,%ecx
mov    %ecx,0x30(%rax)
ret

LLVM IR (-O0):
define void @UARTTxIntModeSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 48
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -17
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 48
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 %12, i32* %16
ret void
}

LLVM IR (-O2):
define void @UARTTxIntModeSet(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 48
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -17
%8 = or i32 %7, %1
store volatile i32 %8, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
int *malloc(int);
int write_after_free() {
  volatile int *x = malloc(sizeof(int));
  *x = 42;
  free((int *)x);
  *x = 12;
  return 1;
}


x86 assembly (clang, -O0):
<write_after_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x2a,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movl   $0xc,(%rax)
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_after_free>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
movl   $0x2a,(%rax)
mov    %rax,%rdi
call   1030 <free@plt>
movl   $0xc,(%rbx)
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @write_after_free() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 4)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
store volatile i32 42, i32* %3
%4 = load i32*, i32** %1
%5 = call i32 @free(i32* %4)
%6 = load i32*, i32** %1
store volatile i32 12, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @write_after_free() {
%1 = tail call i32* @malloc(i32 4)
store volatile i32 42, i32* %1
%2 = tail call i32 @free(i32* %1)
store volatile i32 12, i32* %1
ret i32 1
}
/* Variables and functions */
float fabsf(float);
float absolute(float x) { return fabsf(x); }


x86 assembly (clang, -O0):
<absolute>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movaps 0xeeb(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<absolute>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define float @absolute(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.fabs.f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @absolute(float %0) {
%2 = tail call float @llvm.fabs.f32(float %0)
ret float %2
}
/* Type definitions */
struct gsm_modul {
  int dummy;
};

/* Variables and functions */
int module_check_phone_stat(struct gsm_modul *, char const *, int,
                            unsigned int);
int gsm_check_phone_stat(struct gsm_modul *gsm, const char *phone_number,
                         int hangup_flag, unsigned int timeout) {
  return module_check_phone_stat(gsm, phone_number, hangup_flag, timeout);
}


x86 assembly (clang, -O0):
<gsm_check_phone_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <module_check_phone_stat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsm_check_phone_stat>:
jmp    1030 <module_check_phone_stat@plt>

LLVM IR (-O0):
%struct.gsm_modul = type { i32 }
define i32 @gsm_check_phone_stat(%struct.gsm_modul* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca %struct.gsm_modul*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store %struct.gsm_modul* %0, %struct.gsm_modul** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load %struct.gsm_modul*, %struct.gsm_modul** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @module_check_phone_stat(%struct.gsm_modul* %9, i8* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.gsm_modul = type { i32 }
define i32 @gsm_check_phone_stat(%struct.gsm_modul* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @module_check_phone_stat(%struct.gsm_modul* %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
void _M2_Transform3D_finish(__attribute__((unused)) int argc,
                            __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_Transform3D_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_Transform3D_finish>:
ret

LLVM IR (-O0):
define void @_M2_Transform3D_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_Transform3D_finish(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
char toupper(char);
char *string_toupper(char *buf) {
  char *c = buf;
  while (*c) {
    *c = toupper(*c);
    c++;
  }
  return buf;
}


x86 assembly (clang, -O0):
<string_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1156 <string_toupper+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <string_toupper+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_toupper>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     1146 <string_toupper+0x36>
lea    0x1(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <toupper@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <string_toupper+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @string_toupper(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %9, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call signext i8 @toupper(i8 signext %11)
%13 = load i8*, i8** %3
store i8 %12, i8* %13
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
br label %5
16: ; preds = %5
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
define i8* @string_toupper(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call signext i8 @toupper(i8 signext %5)
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret i8* %0
}
char hexdigit(unsigned int nibble) {
  if ((nibble >= 0) && (nibble < 10))
    return nibble + 48;
  else if ((nibble >= 10) && (nibble < 16))
    return nibble + 55;
  else
    return '?';
}


x86 assembly (clang, -O0):
<hexdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jb     1129 <hexdigit+0x29>
cmpl   $0xa,-0x8(%rbp)
jae    1129 <hexdigit+0x29>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    114f <hexdigit+0x4f>
cmpl   $0xa,-0x8(%rbp)
jb     114b <hexdigit+0x4b>
cmpl   $0x10,-0x8(%rbp)
jae    114b <hexdigit+0x4b>
mov    -0x8(%rbp),%eax
add    $0x37,%eax
mov    %al,-0x1(%rbp)
jmp    114f <hexdigit+0x4f>
movb   $0x3f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexdigit>:
cmp    $0x9,%edi
ja     110b <hexdigit+0xb>
add    $0x30,%dil
jmp    1116 <hexdigit+0x16>
mov    $0x3f,%al
cmp    $0xf,%edi
ja     1118 <hexdigit+0x18>
add    $0x37,%dil
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @hexdigit(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp uge i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp ult i32 %7, 10
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add i32 %10, 48
%12 = trunc i32 %11 to i8
store i8 %12, i8* %2
br label %24
13: ; preds = %6, %1
%14 = load i32, i32* %3
%15 = icmp uge i32 %14, 10
br i1 %15, label %16, label %23
16: ; preds = %13
%17 = load i32, i32* %3
%18 = icmp ult i32 %17, 16
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = load i32, i32* %3
%21 = add i32 %20, 55
%22 = trunc i32 %21 to i8
store i8 %22, i8* %2
br label %24
23: ; preds = %16, %13
store i8 63, i8* %2
br label %24
24: ; preds = %23, %19, %9
%25 = load i8, i8* %2
ret i8 %25
}

LLVM IR (-O2):
define signext i8 @hexdigit(i32 %0) {
%2 = icmp ult i32 %0, 10
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = trunc i32 %0 to i8
%5 = add nuw nsw i8 %4, 48
br label %11
6: ; preds = %1
%7 = icmp ult i32 %0, 16
br i1 %7, label %8, label %11
8: ; preds = %6
%9 = trunc i32 %0 to i8
%10 = add nuw nsw i8 %9, 55
br label %11
11: ; preds = %6, %8, %3
%12 = phi i8 [ %5, %3 ], [ %10, %8 ], [ 63, %6 ]
ret i8 %12
}
void HelloFunc() { printf("Hello World from t4 %s\n", __FUNCTION__); }


x86 assembly (clang, -O0):
<HelloFunc>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef6(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelloFunc>:
lea    0xee9(%rip),%rdi
lea    0xefa(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Hello World from t4 %s\0A\00"
@__FUNCTION__.HelloFunc = [10 x i8] c"HelloFunc\00"
define void @HelloFunc() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.HelloFunc, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Hello World from t4 %s\0A\00"
@__FUNCTION__.HelloFunc = [10 x i8] c"HelloFunc\00"
define void @HelloFunc() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.HelloFunc, i64 0, i64 0))
ret void
}
int tosInt32_fromInt(int x) { return x; }


x86 assembly (clang, -O0):
<tosInt32_fromInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tosInt32_fromInt>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @tosInt32_fromInt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @tosInt32_fromInt(i32 returned %0) {
ret i32 %0
}
void foo389() {}


x86 assembly (clang, -O0):
<foo389>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo389>:
ret

LLVM IR (-O0):
define void @foo389() {
ret void
}

LLVM IR (-O2):
define void @foo389() {
ret void
}
void VMR3RetainUVM(void) {}


x86 assembly (clang, -O0):
<VMR3RetainUVM>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMR3RetainUVM>:
ret

LLVM IR (-O0):
define void @VMR3RetainUVM() {
ret void
}

LLVM IR (-O2):
define void @VMR3RetainUVM() {
ret void
}
/* Type definitions */
struct core_timer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ core_timer_init(struct core_timer *);
int /*<<< orphan*/ core_timer_start(struct core_timer *);
void core_debugger_jitter_detection_start(struct core_timer *timer) {
  core_timer_init(timer);
  core_timer_start(timer);
}


x86 assembly (clang, -O0):
<core_debugger_jitter_detection_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <core_timer_init@plt>
mov    -0x8(%rbp),%rdi
call   1030 <core_timer_start@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_debugger_jitter_detection_start>:
push   %rbx
mov    %rdi,%rbx
call   1040 <core_timer_init@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <core_timer_start@plt>

LLVM IR (-O0):
%struct.core_timer = type { i32 }
define void @core_debugger_jitter_detection_start(%struct.core_timer* %0) {
%2 = alloca %struct.core_timer*
store %struct.core_timer* %0, %struct.core_timer** %2
%3 = load %struct.core_timer*, %struct.core_timer** %2
%4 = call i32 @core_timer_init(%struct.core_timer* %3)
%5 = load %struct.core_timer*, %struct.core_timer** %2
%6 = call i32 @core_timer_start(%struct.core_timer* %5)
ret void
}

LLVM IR (-O2):
%struct.core_timer = type { i32 }
define void @core_debugger_jitter_detection_start(%struct.core_timer* %0) {
%2 = tail call i32 @core_timer_init(%struct.core_timer* %0)
%3 = tail call i32 @core_timer_start(%struct.core_timer* %0)
ret void
}
/* Type definitions */
struct vec3i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec3i_length_squared(int /*<<< orphan*/ *);
__attribute__((always_)) int32_t psvec3i_length_squared(struct vec3i *a) {
  return vec3i_length_squared((int32_t *)a);
}


x86 assembly (clang, -O0):
<psvec3i_length_squared>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vec3i_length_squared@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3i_length_squared>:
jmp    1030 <vec3i_length_squared@plt>

LLVM IR (-O0):
%struct.vec3i = type { i32 }
define i32 @psvec3i_length_squared(%struct.vec3i* %0) {
%2 = alloca %struct.vec3i*
store %struct.vec3i* %0, %struct.vec3i** %2
%3 = load %struct.vec3i*, %struct.vec3i** %2
%4 = bitcast %struct.vec3i* %3 to i32*
%5 = call i32 @vec3i_length_squared(i32* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.vec3i = type { i32 }
define i32 @psvec3i_length_squared(%struct.vec3i* %0) {
%2 = getelementptr %struct.vec3i, %struct.vec3i* %0, i64 0, i32 0
%3 = tail call i32 @vec3i_length_squared(i32* %2)
ret i32 %3
}
int test_imm_A4uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xA4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A4uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xa4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A4uint64_lowword_mem>:
testb  $0xa4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A4uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 164
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A4uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 164
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}