int main() {
  volatile long long a = 0x0000000000000000;
  if (__builtin_popcountll(a) != 0) {
    return 1;
  }
  volatile long long b = 0x0000000012345678;
  if (__builtin_popcountll(b) != 13) {
    return 1;
  }
  volatile long long c = 0x00000000FFFFFFFF;
  if (__builtin_popcountll(c) != 32) {
    return 1;
  }
  volatile long long d = 0x0123456789ABCDEF;
  if (__builtin_popcountll(d) != 32) {
    return 1;
  }
  volatile long long e = 0xFFFFFFFFFFFFFFFF;
  if (__builtin_popcountll(e) != 64) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cmp    $0x0,%eax
je     1185 <main+0x85>
movl   $0x1,-0x4(%rbp)
jmp    137b <main+0x27b>
movq   $0x12345678,-0x18(%rbp)
12
mov    -0x18(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cmp    $0xd,%eax
je     11ff <main+0xff>
movl   $0x1,-0x4(%rbp)
jmp    137b <main+0x27b>
mov    $0xffffffff,%eax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cmp    $0x20,%eax
je     127a <main+0x17a>
movl   $0x1,-0x4(%rbp)
jmp    137b <main+0x27b>
movabs $0x123456789abcdef,%rax
45 23 01
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cmp    $0x20,%eax
je     12fa <main+0x1fa>
movl   $0x1,-0x4(%rbp)
jmp    137b <main+0x27b>
movq   $0xffffffffffffffff,-0x30(%rbp)
ff
mov    -0x30(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cmp    $0x40,%eax
je     1374 <main+0x274>
movl   $0x1,-0x4(%rbp)
jmp    137b <main+0x27b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movq   $0x0,-0x8(%rsp)
mov    $0x1,%eax
cmpq   $0x0,-0x8(%rsp)
je     1117 <main+0x17>
ret
movq   $0x12345678,-0x10(%rsp)
34 12
mov    -0x10(%rsp),%rax
mov    %rax,%rcx
shr    %rcx
movabs $0x5555555555555555,%r8
55 55 55
and    %r8,%rcx
sub    %rcx,%rax
movabs $0x3333333333333333,%rcx
33 33 33
mov    %rax,%rsi
and    %rcx,%rsi
shr    $0x2,%rax
and    %rcx,%rax
add    %rsi,%rax
mov    %rax,%rdx
shr    $0x4,%rdx
add    %rax,%rdx
movabs $0xf0f0f0f0f0f0f0f,%rsi
0f 0f 0f
and    %rsi,%rdx
movabs $0x101010101010101,%rdi
01 01 01
imul   %rdi,%rdx
shr    $0x38,%rdx
mov    $0x1,%eax
cmp    $0xd,%edx
jne    1116 <main+0x16>
mov    $0xffffffff,%eax
mov    %rax,-0x18(%rsp)
mov    -0x18(%rsp),%rax
mov    %rax,%rdx
shr    %rdx
and    %r8,%rdx
sub    %rdx,%rax
mov    %rax,%rdx
and    %rcx,%rdx
shr    $0x2,%rax
and    %rcx,%rax
add    %rdx,%rax
mov    %rax,%rdx
shr    $0x4,%rdx
add    %rax,%rdx
and    %rsi,%rdx
imul   %rdi,%rdx
shr    $0x38,%rdx
mov    $0x1,%eax
cmp    $0x20,%edx
jne    1116 <main+0x16>
movabs $0x123456789abcdef,%rax
45 23 01
mov    %rax,-0x20(%rsp)
mov    -0x20(%rsp),%rax
mov    %rax,%rdx
shr    %rdx
and    %r8,%rdx
sub    %rdx,%rax
mov    %rax,%rdx
and    %rcx,%rdx
shr    $0x2,%rax
and    %rcx,%rax
add    %rdx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rax,%rcx
and    %rsi,%rcx
imul   %rdi,%rcx
shr    $0x38,%rcx
mov    $0x1,%eax
cmp    $0x20,%ecx
jne    1116 <main+0x16>
movq   $0xffffffffffffffff,-0x28(%rsp)
ff ff
mov    -0x28(%rsp),%rcx
xor    %eax,%eax
cmp    $0xffffffffffffffff,%rcx
setne  %al
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i32 0, i32* %1
store volatile i64 0, i64* %2
%7 = load volatile i64, i64* %2
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = trunc i64 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 1, i32* %1
br label %37
12: ; preds = %0
store volatile i64 305419896, i64* %3
%13 = load volatile i64, i64* %3
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = trunc i64 %14 to i32
%16 = icmp ne i32 %15, 13
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 1, i32* %1
br label %37
18: ; preds = %12
store volatile i64 4294967295, i64* %4
%19 = load volatile i64, i64* %4
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = trunc i64 %20 to i32
%22 = icmp ne i32 %21, 32
br i1 %22, label %23, label %24
23: ; preds = %18
store i32 1, i32* %1
br label %37
24: ; preds = %18
store volatile i64 81985529216486895, i64* %5
%25 = load volatile i64, i64* %5
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = trunc i64 %26 to i32
%28 = icmp ne i32 %27, 32
br i1 %28, label %29, label %30
29: ; preds = %24
store i32 1, i32* %1
br label %37
30: ; preds = %24
store volatile i64 -1, i64* %6
%31 = load volatile i64, i64* %6
%32 = call i64 @llvm.ctpop.i64(i64 %31)
%33 = trunc i64 %32 to i32
%34 = icmp ne i32 %33, 64
br i1 %34, label %35, label %36
35: ; preds = %30
store i32 1, i32* %1
br label %37
36: ; preds = %30
store i32 0, i32* %1
br label %37
37: ; preds = %36, %35, %29, %23, %17, %11
%38 = load i32, i32* %1
ret i32 %38
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = bitcast i64* %1 to i8*
store volatile i64 0, i64* %1
%7 = load volatile i64, i64* %1
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %35
9: ; preds = %0
%10 = bitcast i64* %2 to i8*
store volatile i64 305419896, i64* %2
%11 = load volatile i64, i64* %2
%12 = tail call i64 @llvm.ctpop.i64(i64 %11)
%13 = icmp eq i64 %12, 13
br i1 %13, label %14, label %33
14: ; preds = %9
%15 = bitcast i64* %3 to i8*
store volatile i64 4294967295, i64* %3
%16 = load volatile i64, i64* %3
%17 = tail call i64 @llvm.ctpop.i64(i64 %16)
%18 = icmp eq i64 %17, 32
br i1 %18, label %19, label %31
19: ; preds = %14
%20 = bitcast i64* %4 to i8*
store volatile i64 81985529216486895, i64* %4
%21 = load volatile i64, i64* %4
%22 = tail call i64 @llvm.ctpop.i64(i64 %21)
%23 = icmp eq i64 %22, 32
br i1 %23, label %24, label %29
24: ; preds = %19
%25 = bitcast i64* %5 to i8*
store volatile i64 -1, i64* %5
%26 = load volatile i64, i64* %5
%27 = icmp ne i64 %26, -1
%28 = zext i1 %27 to i32
br label %29
29: ; preds = %19, %24
%30 = phi i32 [ %28, %24 ], [ 1, %19 ]
br label %31
31: ; preds = %14, %29
%32 = phi i32 [ %30, %29 ], [ 1, %14 ]
br label %33
33: ; preds = %9, %31
%34 = phi i32 [ %32, %31 ], [ 1, %9 ]
br label %35
35: ; preds = %0, %33
%36 = phi i32 [ %34, %33 ], [ 1, %0 ]
ret i32 %36
}