xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ r(int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  r(n);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%edi
call   1030 <r@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <r@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%3 = load i32, i32* %1
%4 = call i32 @r(i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @r(i32 %4)
ret i32 0
}
int ceil_rshift(int v, int sh) {
  int mask = (1 << sh) - 1;
  return (v >> sh) + ((v & mask) != 0);
}


x86 assembly (clang, -O0):
<ceil_rshift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    -0x4(%rbp),%ecx
and    -0xc(%rbp),%ecx
cmp    $0x0,%ecx
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil_rshift>:
mov    %esi,%ecx
mov    %edi,%eax
mov    $0xffffffff,%edx
shl    %cl,%edx
not    %edx
and    %edi,%edx
sar    %cl,%eax
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ceil_rshift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = ashr i32 %9, %10
%12 = load i32, i32* %3
%13 = load i32, i32* %5
%14 = and i32 %12, %13
%15 = icmp ne i32 %14, 0
%16 = zext i1 %15 to i32
%17 = add nsw i32 %11, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @ceil_rshift(i32 %0, i32 %1) {
%3 = shl nsw i32 -1, %1
%4 = xor i32 %3, -1
%5 = ashr i32 %0, %1
%6 = and i32 %4, %0
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
%9 = add nsw i32 %5, %8
ret i32 %9
}
__attribute__((always_)) void criterion_continue_test(void) {}


x86 assembly (clang, -O0):
<criterion_continue_test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<criterion_continue_test>:
ret

LLVM IR (-O0):
define void @criterion_continue_test() {
ret void
}

LLVM IR (-O2):
define void @criterion_continue_test() {
ret void
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ time(int *);
void test_time() {
  time_t t = 1;
  time(&t);
  assert(t == 1);
}


x86 assembly (clang, -O0):
<test_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1040 <time@plt>
cmpl   $0x1,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_time>:
push   %rax
movl   $0x1,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1040 <time@plt>
xor    %edi,%edi
cmpl   $0x1,0x4(%rsp)
sete   %dil
call   1030 <assert@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @test_time() {
%1 = alloca i32
store i32 1, i32* %1
%2 = call i32 @time(i32* %1)
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret void
}

LLVM IR (-O2):
define void @test_time() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 1, i32* %1
%3 = call i32 @time(i32* %1)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret void
}
void gtk_check_version() {}


x86 assembly (clang, -O0):
<gtk_check_version>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_check_version>:
ret

LLVM IR (-O0):
define void @gtk_check_version() {
ret void
}

LLVM IR (-O2):
define void @gtk_check_version() {
ret void
}
/* Type definitions */
struct qcc_stream_interval {
  int dummy;
};
struct qcc_list_node {
  int dummy;
};
struct qcc_list {
  int dummy;
};
struct qcc_interval_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ qcc_list_push_back(struct qcc_list *,
                                      struct qcc_list_node *);
void qcc_interval_data_push_back(struct qcc_interval_data *list,
                                 struct qcc_stream_interval *node) {
  qcc_list_push_back((struct qcc_list *)list, (struct qcc_list_node *)node);
}


x86 assembly (clang, -O0):
<qcc_interval_data_push_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <qcc_list_push_back@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcc_interval_data_push_back>:
jmp    1030 <qcc_list_push_back@plt>

LLVM IR (-O0):
%struct.qcc_interval_data = type { i32 }
%struct.qcc_stream_interval = type { i32 }
%struct.qcc_list = type { i32 }
%struct.qcc_list_node = type { i32 }
define void @qcc_interval_data_push_back(%struct.qcc_interval_data* %0, %struct.qcc_stream_interval* %1) {
%3 = alloca %struct.qcc_interval_data*
%4 = alloca %struct.qcc_stream_interval*
store %struct.qcc_interval_data* %0, %struct.qcc_interval_data** %3
store %struct.qcc_stream_interval* %1, %struct.qcc_stream_interval** %4
%5 = load %struct.qcc_interval_data*, %struct.qcc_interval_data** %3
%6 = bitcast %struct.qcc_interval_data* %5 to %struct.qcc_list*
%7 = load %struct.qcc_stream_interval*, %struct.qcc_stream_interval** %4
%8 = bitcast %struct.qcc_stream_interval* %7 to %struct.qcc_list_node*
%9 = call i32 @qcc_list_push_back(%struct.qcc_list* %6, %struct.qcc_list_node* %8)
ret void
}

LLVM IR (-O2):
%struct.qcc_interval_data = type { i32 }
%struct.qcc_stream_interval = type { i32 }
%struct.qcc_list = type { i32 }
%struct.qcc_list_node = type { i32 }
define void @qcc_interval_data_push_back(%struct.qcc_interval_data* %0, %struct.qcc_stream_interval* %1) {
%3 = bitcast %struct.qcc_interval_data* %0 to %struct.qcc_list*
%4 = bitcast %struct.qcc_stream_interval* %1 to %struct.qcc_list_node*
%5 = tail call i32 @qcc_list_push_back(%struct.qcc_list* %3, %struct.qcc_list_node* %4)
ret void
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timespec {
  int dummy;
};

/* Variables and functions */
int cap_settime(struct timespec *, struct timezone *);
int security_settime(struct timespec *ts, struct timezone *tz) {
  return cap_settime(ts, tz);
}


x86 assembly (clang, -O0):
<security_settime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <cap_settime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_settime>:
jmp    1030 <cap_settime@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
%struct.timezone = type { i32 }
define i32 @security_settime(%struct.timespec* %0, %struct.timezone* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timezone*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timezone* %1, %struct.timezone** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = load %struct.timezone*, %struct.timezone** %4
%7 = call i32 @cap_settime(%struct.timespec* %5, %struct.timezone* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
%struct.timezone = type { i32 }
define i32 @security_settime(%struct.timespec* %0, %struct.timezone* %1) {
%3 = tail call i32 @cap_settime(%struct.timespec* %0, %struct.timezone* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ llib_print_f(int, char *);
void lcom_usage() { llib_print_f(2, "Usage: lcom -d device\n"); }


x86 assembly (clang, -O0):
<lcom_usage>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
lea    0xee0(%rip),%rsi
call   1030 <llib_print_f@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcom_usage>:
lea    0xee9(%rip),%rsi
mov    $0x2,%edi
jmp    1030 <llib_print_f@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Usage: lcom -d device\0A\00"
define void @lcom_usage() {
%1 = call i32 @llib_print_f(i32 2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"Usage: lcom -d device\0A\00"
define void @lcom_usage() {
%1 = tail call i32 @llib_print_f(i32 2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "Usage: last [-r] [-count] [-f file] [name] [tty] ...\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [54 x i8] c"Usage: last [-r] [-count] [-f file] [name] [tty] ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [54 x i8] c"Usage: last [-r] [-count] [-f file] [name] [tty] ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int sqrt(float);
short adjustedLightValue(short x) {
  if (x <= 150) {
    return x;
  } else {
    return (short)(sqrt(((float)x) / 150) * 150 + 0.00001);
  }
}


x86 assembly (clang, -O0):
<adjustedLightValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%eax
cmp    $0x96,%eax
jg     113b <adjustedLightValue+0x2b>
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
jmp    1172 <adjustedLightValue+0x62>
movswl -0x4(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  0xeb5(%rip),%xmm1
divss  %xmm1,%xmm0
call   1030 <sqrt@plt>
imul   $0x96,%eax,%eax
cvtsi2sd %eax,%xmm0
movsd  0xea2(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adjustedLightValue>:
mov    %edi,%eax
cmp    $0x97,%edi
jl     114a <adjustedLightValue+0x3a>
push   %rax
cwtl
cvtsi2ss %eax,%xmm0
divss  0xed8(%rip),%xmm0
call   1030 <sqrt@plt>
imul   $0x96,%eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
addsd  0xec6(%rip),%xmm0
cvttsd2si %xmm0,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define signext i16 @adjustedLightValue(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = icmp sle i32 %5, 150
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i16, i16* %3
store i16 %8, i16* %2
br label %18
9: ; preds = %1
%10 = load i16, i16* %3
%11 = sitofp i16 %10 to float
%12 = fdiv float %11, 1.500000e+02
%13 = call i32 @sqrt(float %12)
%14 = mul nsw i32 %13, 150
%15 = sitofp i32 %14 to double
%16 = fadd double %15, 1.000000e-05
%17 = fptosi double %16 to i16
store i16 %17, i16* %2
br label %18
18: ; preds = %9, %7
%19 = load i16, i16* %2
ret i16 %19
}

LLVM IR (-O2):
define signext i16 @adjustedLightValue(i16 signext %0) {
%2 = icmp slt i16 %0, 151
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = sitofp i16 %0 to float
%5 = fdiv float %4, 1.500000e+02
%6 = tail call i32 @sqrt(float %5)
%7 = mul nsw i32 %6, 150
%8 = sitofp i32 %7 to double
%9 = fadd double %8, 1.000000e-05
%10 = fptosi double %9 to i16
br label %11
11: ; preds = %1, %3
%12 = phi i16 [ %10, %3 ], [ %0, %1 ]
ret i16 %12
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_84() {
  Assert_real((isqrt(84) == 9),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              425, ("Integer square root of 84 should be 9"));
}


x86 assembly (clang, -O0):
<t_sqrt_84>:
push   %rbp
mov    %rsp,%rbp
mov    $0x54,%edi
call   1030 <isqrt@plt>
cmp    $0x9,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x1a9,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_84>:
push   %rax
mov    $0x54,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x9,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x1a9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 84 should be 9\00"
define void @t_sqrt_84() {
%1 = call i32 @isqrt(i32 84)
%2 = icmp eq i32 %1, 9
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 425, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 84 should be 9\00"
define void @t_sqrt_84() {
%1 = tail call i32 @isqrt(i32 84)
%2 = icmp eq i32 %1, 9
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 425, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
float atanf(float);
float gb_arctan(float a) { return atanf(a); }


x86 assembly (clang, -O0):
<gb_arctan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gb_arctan>:
jmp    1030 <atanf@plt>

LLVM IR (-O0):
define float @gb_arctan(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @atanf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @gb_arctan(float %0) {
%2 = tail call float @atanf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ c(int);
int /*<<< orphan*/ printf(char *, int);
void e(int x) {
  printf("e(%d)\n", x);
  c(x >> 1);
}


x86 assembly (clang, -O0):
<e>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
sar    $0x1,%edi
call   1040 <c@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
sar    %ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <c@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"e(%d)\0A\00"
define void @e(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = call i32 @c(i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"e(%d)\0A\00"
define void @e(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = ashr i32 %0, 1
%4 = tail call i32 @c(i32 %3)
ret void
}
int qsort_short(const void *i1, const void *i2) {
  return *(short *)i1 - *(short *)i2;
}


x86 assembly (clang, -O0):
<qsort_short>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
mov    -0x10(%rbp),%rcx
movswl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_short>:
movswl (%rdi),%eax
movswl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @qsort_short(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i16*
%7 = load i16, i16* %6
%8 = sext i16 %7 to i32
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i16*
%11 = load i16, i16* %10
%12 = sext i16 %11 to i32
%13 = sub nsw i32 %8, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @qsort_short(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i16*
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = bitcast i8* %1 to i16*
%7 = load i16, i16* %6
%8 = sext i16 %7 to i32
%9 = sub nsw i32 %5, %8
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ XErrorEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
int ignore_errors(Display *dpy, XErrorEvent *xev) { return 0; }


x86 assembly (clang, -O0):
<ignore_errors>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_errors>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ignore_errors(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @ignore_errors(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, float *, int);
uint32_t UsefulBufUtil_CopyFloatToUint32(float f) {
  uint32_t u32;
  memcpy(&u32, &f, sizeof(uint32_t));
  return u32;
}


x86 assembly (clang, -O0):
<UsefulBufUtil_CopyFloatToUint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UsefulBufUtil_CopyFloatToUint32>:
push   %rax
movss  %xmm0,0x4(%rsp)
mov    %rsp,%rdi
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @UsefulBufUtil_CopyFloatToUint32(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = call i32 @memcpy(i32* %3, float* %2, i32 4)
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @UsefulBufUtil_CopyFloatToUint32(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = bitcast i32* %3 to i8*
%5 = call i32 @memcpy(i32* %3, float* %2, i32 4)
%6 = load i32, i32* %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void gcp_free(void *ptr) { free((char *)ptr); }


x86 assembly (clang, -O0):
<gcp_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcp_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @gcp_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @gcp_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int icrypto_verifykeyfile(const char *fname, int secure) { return -1; }


x86 assembly (clang, -O0):
<icrypto_verifykeyfile>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<icrypto_verifykeyfile>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @icrypto_verifykeyfile(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @icrypto_verifykeyfile(i8* nocapture readnone %0, i32 %1) {
ret i32 -1
}
unsigned char reverse8bits(unsigned char b) {
  b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
  b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
  b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
  return b;
}


x86 assembly (clang, -O0):
<reverse8bits>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf0,%eax
sar    $0x4,%eax
movzbl -0x1(%rbp),%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xcc,%eax
sar    $0x2,%eax
movzbl -0x1(%rbp),%ecx
and    $0x33,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xaa,%eax
sar    $0x1,%eax
movzbl -0x1(%rbp),%ecx
and    $0x55,%ecx
shl    $0x1,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse8bits>:
rol    $0x4,%dil
mov    %edi,%eax
and    $0x33,%al
shl    $0x2,%al
shr    $0x2,%dil
and    $0x33,%dil
or     %dil,%al
mov    %eax,%ecx
and    $0x55,%cl
add    %cl,%cl
shr    %al
and    $0x55,%al
or     %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @reverse8bits(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 240
%6 = ashr i32 %5, 4
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = and i32 %8, 15
%10 = shl i32 %9, 4
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i8
store i8 %12, i8* %2
%13 = load i8, i8* %2
%14 = zext i8 %13 to i32
%15 = and i32 %14, 204
%16 = ashr i32 %15, 2
%17 = load i8, i8* %2
%18 = zext i8 %17 to i32
%19 = and i32 %18, 51
%20 = shl i32 %19, 2
%21 = or i32 %16, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %2
%23 = load i8, i8* %2
%24 = zext i8 %23 to i32
%25 = and i32 %24, 170
%26 = ashr i32 %25, 1
%27 = load i8, i8* %2
%28 = zext i8 %27 to i32
%29 = and i32 %28, 85
%30 = shl i32 %29, 1
%31 = or i32 %26, %30
%32 = trunc i32 %31 to i8
store i8 %32, i8* %2
%33 = load i8, i8* %2
ret i8 %33
}

LLVM IR (-O2):
define zeroext i8 @reverse8bits(i8 zeroext %0) {
%2 = tail call i8 @llvm.bitreverse.i8(i8 %0)
ret i8 %2
}
void RGB565ToYRow_Any_NEON() {}


x86 assembly (clang, -O0):
<RGB565ToYRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGB565ToYRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @RGB565ToYRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @RGB565ToYRow_Any_NEON() {
ret void
}
int test_imm_3Euint8_reg(unsigned char val) {
  return ((val) & (-0x3E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Euint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffffc2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Euint8_reg>:
test   $0xc2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Euint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -62
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Euint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -62
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ VAL();
int /*<<< orphan*/ erroVal();
int PARAM2() {
  if (VAL()) {
    return 1;
  }
  erroVal();
  return 0;
}


x86 assembly (clang, -O0):
<PARAM2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <VAL@plt>
cmp    $0x0,%rax
je     1145 <PARAM2+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1153 <PARAM2+0x33>
mov    $0x0,%al
call   1040 <erroVal@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PARAM2>:
push   %rax
xor    %eax,%eax
call   1030 <VAL@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <PARAM2+0x17>
pop    %rcx
ret
xor    %eax,%eax
call   1040 <erroVal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @PARAM2() {
%1 = alloca i32
%2 = call i64 (...) @VAL()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %7
5: ; preds = %0
%6 = call i32 (...) @erroVal()
store i32 0, i32* %1
br label %7
7: ; preds = %5, %4
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @PARAM2() {
%1 = tail call i64 (...) @VAL()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @erroVal()
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ 0, %3 ], [ 1, %0 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void signal_success() { printf("\033[1;32mOK\033[0m\n"); }


x86 assembly (clang, -O0):
<signal_success>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_success>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"\1B[1;32mOK\1B[0m\0A\00"
define void @signal_success() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"\1B[1;32mOK\1B[0m\00"
define void @signal_success() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
float getBMI(float masa, float wzrost) { return masa / (wzrost * wzrost); }


x86 assembly (clang, -O0):
<getBMI>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBMI>:
mulss  %xmm1,%xmm1
divss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @getBMI(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = load float, float* %4
%8 = fmul float %6, %7
%9 = fdiv float %5, %8
ret float %9
}

LLVM IR (-O2):
define float @getBMI(float %0, float %1) {
%3 = fmul float %1, %1
%4 = fdiv float %0, %3
ret float %4
}
int set_termcapn(const char *cap, int n) { return -1; }


x86 assembly (clang, -O0):
<set_termcapn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_termcapn>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @set_termcapn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @set_termcapn(i8* nocapture readnone %0, i32 %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ HwQuantonHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void HwQuantonRequestUpdate() { UAVObjRequestUpdate(HwQuantonHandle()); }


x86 assembly (clang, -O0):
<HwQuantonRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HwQuantonHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HwQuantonRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <HwQuantonHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @HwQuantonRequestUpdate() {
%1 = call i32 (...) @HwQuantonHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @HwQuantonRequestUpdate() {
%1 = tail call i32 (...) @HwQuantonHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
int pow(int, int);
int count_digits(int n) { return n * (pow(10, n) - pow(10, (n - 1))); }


x86 assembly (clang, -O0):
<count_digits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    $0xa,%edi
call   1030 <pow@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%esi
sub    $0x1,%esi
mov    $0xa,%edi
call   1030 <pow@plt>
mov    -0xc(%rbp),%ecx
mov    %eax,%edx
mov    -0x8(%rbp),%eax
sub    %edx,%ecx
imul   %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_digits>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0xa,%edi
mov    %ebx,%esi
call   1030 <pow@plt>
mov    %eax,%ebp
lea    -0x1(%rbx),%esi
mov    $0xa,%edi
call   1030 <pow@plt>
sub    %eax,%ebp
imul   %ebx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @count_digits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @pow(i32 10, i32 %4)
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 1
%8 = call i32 @pow(i32 10, i32 %7)
%9 = sub nsw i32 %5, %8
%10 = mul nsw i32 %3, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @count_digits(i32 %0) {
%2 = tail call i32 @pow(i32 10, i32 %0)
%3 = add nsw i32 %0, -1
%4 = tail call i32 @pow(i32 10, i32 %3)
%5 = sub nsw i32 %2, %4
%6 = mul nsw i32 %5, %0
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_strings(char **strings) {
  int count = 0;
  while (*(strings + count) != NULL) {
    free(*(strings + count));
    count++;
  }
}


x86 assembly (clang, -O0):
<free_strings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1155 <free_strings+0x45>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <free_strings+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_strings>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1131 <free_strings+0x21>
add    $0x8,%rbx
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1120 <free_strings+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @free_strings(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %20
11: ; preds = %4
%12 = load i8**, i8*** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @free(i8* %16)
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %4
20: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @free_strings(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @free(i8* %6)
%8 = add nuw nsw i64 %5, 1
%9 = getelementptr inbounds i8*, i8** %0, i64 %8
%10 = load i8*, i8** %9
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
int yas_bma250_read_reg_byte(int);
int yas_bma250_write_reg_byte(int, int);
int yas_bma250_set_offset_target_y(unsigned char data) {
  int ret = 0;
  int reg_data = 0;
  reg_data = yas_bma250_read_reg_byte(0x37);
  reg_data = ((reg_data & ~0x18) | ((data << 3) & 0x18));
  ret = yas_bma250_write_reg_byte(0x37, reg_data);
  return ret;
}


x86 assembly (clang, -O0):
<yas_bma250_set_offset_target_y>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x37,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffffffe7,%eax
movzbl -0x1(%rbp),%ecx
shl    $0x3,%ecx
and    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x37,%edi
call   1030 <yas_bma250_write_reg_byte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_bma250_set_offset_target_y>:
push   %rbx
mov    %edi,%ebx
mov    $0x37,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
and    $0xffffffe7,%eax
and    $0x3,%ebx
lea    (%rax,%rbx,8),%esi
mov    $0x37,%edi
pop    %rbx
jmp    1030 <yas_bma250_write_reg_byte@plt>

LLVM IR (-O0):
define i32 @yas_bma250_set_offset_target_y(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @yas_bma250_read_reg_byte(i32 55)
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = and i32 %6, -25
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 3
%11 = and i32 %10, 24
%12 = or i32 %7, %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = call i32 @yas_bma250_write_reg_byte(i32 55, i32 %13)
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @yas_bma250_set_offset_target_y(i8 zeroext %0) {
%2 = tail call i32 @yas_bma250_read_reg_byte(i32 55)
%3 = and i32 %2, -25
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 3
%6 = and i32 %5, 24
%7 = or i32 %3, %6
%8 = tail call i32 @yas_bma250_write_reg_byte(i32 55, i32 %7)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __dmmfree(void *x, void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<__dmmfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dmmfree>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @__dmmfree(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @__dmmfree(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Type definitions */
struct printf_info {
  int dummy;
};

/* Variables and functions */
int __printf_arginfo_pct(const struct printf_info *pi, size_t n, int *argt) {
  return (0);
}


x86 assembly (clang, -O0):
<__printf_arginfo_pct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__printf_arginfo_pct>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.printf_info = type { i32 }
define i32 @__printf_arginfo_pct(%struct.printf_info* %0, i64 %1, i32* %2) {
%4 = alloca %struct.printf_info*
%5 = alloca i64
%6 = alloca i32*
store %struct.printf_info* %0, %struct.printf_info** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
ret i32 0
}

LLVM IR (-O2):
%struct.printf_info = type { i32 }
define i32 @__printf_arginfo_pct(%struct.printf_info* nocapture readnone %0, i64 %1, i32* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print(int vetor[], int tam) {
  for (int i = 0; i < tam; i++)
    printf("%d ", vetor[i]);
  printf("\n");
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <print+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <print+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6) {
  unsigned long ret;
  register long r10 __asm__("r10") = a4;
  register long r8 __asm__("r8") = a5;
  register long r9 __asm__("r9") = a6;
  __asm__ __volatile__("syscall"
                       : "=a"(ret)
                       : "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(r10), "r"(r8),
                         "r"(r9)
                       : "rcx", "r11", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<__syscall6>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x48(%rbp)
mov    0x10(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x40(%rbp),%r10
mov    -0x48(%rbp),%r8
mov    -0x50(%rbp),%r9
syscall
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__syscall6>:
mov    %r9,%r11
mov    %rdi,%rax
mov    0x8(%rsp),%r9
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%r10
mov    %r11,%r8
syscall
ret

LLVM IR (-O0):
define i64 @__syscall6(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) {
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
%15 = alloca i64
%16 = alloca i64
%17 = alloca i64
%18 = alloca i64
store i64 %0, i64* %8
store i64 %1, i64* %9
store i64 %2, i64* %10
store i64 %3, i64* %11
store i64 %4, i64* %12
store i64 %5, i64* %13
store i64 %6, i64* %14
%19 = load i64, i64* %12
store i64 %19, i64* %16
%20 = load i64, i64* %13
store i64 %20, i64* %17
%21 = load i64, i64* %14
store i64 %21, i64* %18
%22 = load i64, i64* %8
%23 = load i64, i64* %9
%24 = load i64, i64* %10
%25 = load i64, i64* %11
%26 = load i64, i64* %16
%27 = load i64, i64* %17
%28 = load i64, i64* %18
%29 = call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},{r10},{r8},{r9},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %22, i64 %23, i64 %24, i64 %25, i64 %26, i64 %27, i64 %28)
store i64 %29, i64* %15
%30 = load i64, i64* %15
ret i64 %30
}

LLVM IR (-O2):
define i64 @__syscall6(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) {
%8 = tail call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},{r10},{r8},{r9},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6)
ret i64 %8
}
long long cpucycles_x86cpuspeed(void) {
  long long result;
  asm volatile(".byte 15;.byte 49" : "=A"(result));
  return result;
}


x86 assembly (clang, -O0):
<cpucycles_x86cpuspeed>:
push   %rbp
mov    %rsp,%rbp
rdtsc
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpucycles_x86cpuspeed>:
rdtsc
ret

LLVM IR (-O0):
define i64 @cpucycles_x86cpuspeed() {
%1 = alloca i64
%2 = call i64 asm sideeffect ".byte 15;.byte 49", "=A,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @cpucycles_x86cpuspeed() {
%1 = tail call i64 asm sideeffect ".byte 15;.byte 49", "=A,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t gf2_matrix_times(uint32_t *mat, uint32_t vec) {
  uint32_t sum;
  sum = 0;
  while (vec) {
    if (vec & 1)
      sum ^= *mat;
    vec >>= 1;
    mat++;
  }
  return (sum);
}


x86 assembly (clang, -O0):
<gf2_matrix_times>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1151 <gf2_matrix_times+0x51>
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1137 <gf2_matrix_times+0x37>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
jmp    1112 <gf2_matrix_times+0x12>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf2_matrix_times>:
xor    %eax,%eax
test   %esi,%esi
jne    111f <gf2_matrix_times+0x1f>
ret
nopw   0x0(%rax,%rax,1)
mov    %esi,%ecx
sar    %ecx
add    $0x4,%rdi
cmp    $0x1,%esi
mov    %ecx,%esi
jbe    1106 <gf2_matrix_times+0x6>
test   $0x1,%sil
je     1110 <gf2_matrix_times+0x10>
xor    (%rdi),%eax
jmp    1110 <gf2_matrix_times+0x10>

LLVM IR (-O0):
define i32 @gf2_matrix_times(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i32*, i32** %3
%15 = load i32, i32* %14
%16 = load i32, i32* %5
%17 = xor i32 %16, %15
store i32 %17, i32* %5
br label %18
18: ; preds = %13, %9
%19 = load i32, i32* %4
%20 = ashr i32 %19, 1
store i32 %20, i32* %4
%21 = load i32*, i32** %3
%22 = getelementptr inbounds i32, i32* %21, i32 1
store i32* %22, i32** %3
br label %6
23: ; preds = %6
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @gf2_matrix_times(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %18, label %4
4: ; preds = %2, %13
%5 = phi i32 [ %14, %13 ], [ 0, %2 ]
%6 = phi i32 [ %15, %13 ], [ %1, %2 ]
%7 = phi i32* [ %16, %13 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %4
%11 = load i32, i32* %7
%12 = xor i32 %11, %5
br label %13
13: ; preds = %10, %4
%14 = phi i32 [ %12, %10 ], [ %5, %4 ]
%15 = ashr i32 %6, 1
%16 = getelementptr inbounds i32, i32* %7, i64 1
%17 = icmp ult i32 %6, 2
br i1 %17, label %18, label %4
18: ; preds = %13, %2
%19 = phi i32 [ 0, %2 ], [ %14, %13 ]
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, size_t);
int main(int argc, char **argv) {
  size_t i;
  i = 1234;
  printf("%zu", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x4d2,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4d2,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%zu\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 1234, i64* %6
%7 = load i64, i64* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%zu\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 1234)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void print_help(const char *program) {
  fprintf(stderr, "format: %s [pid]\n", program);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"format: %s [pid]\0A\00"
define void @print_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"format: %s [pid]\0A\00"
define void @print_help(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ParseOptions(int, char **);
int main(int argc, char *argv[]) {
  ParseOptions(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <ParseOptions@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <ParseOptions@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @ParseOptions(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @ParseOptions(i32 %0, i8** %1)
ret i32 0
}
void gtk_window_set_default_size() {}


x86 assembly (clang, -O0):
<gtk_window_set_default_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_window_set_default_size>:
ret

LLVM IR (-O0):
define void @gtk_window_set_default_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_window_set_default_size() {
ret void
}