xunge/DecIR huggingface dataset:
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ valid;
};
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef TYPE_1__ ASN1_TLC;
typedef int /*<<< orphan*/ ASN1_TEMPLATE;

/* Variables and functions */
int asn1_template_ex_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ const *, int /*<<< orphan*/,
                         TYPE_1__ *, int /*<<< orphan*/);
int ASN1_template_d2i(ASN1_VALUE **pval, const unsigned char **in, long len,
                      const ASN1_TEMPLATE *tt) {
  ASN1_TLC c;
  (&c)->valid = 0;
  return asn1_template_ex_d2i(pval, in, len, tt, 0, &c, 0);
}


x86 assembly (clang, -O0):
<ASN1_template_d2i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
lea    -0x28(%rbp),%r9
movl   $0x0,(%rsp)
call   1030 <asn1_template_ex_d2i@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_template_d2i>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
movl   $0x0,(%rsp)
lea    0x10(%rsp),%r9
xor    %r8d,%r8d
call   1030 <asn1_template_ex_d2i@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i64 }
define i32 @ASN1_template_d2i(i32** %0, i8** %1, i64 %2, i32* %3) {
%5 = alloca i32**
%6 = alloca i8**
%7 = alloca i64
%8 = alloca i32*
%9 = alloca %struct.TYPE_3__
store i32** %0, i32*** %5
store i8** %1, i8*** %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 0
store i64 0, i64* %10
%11 = load i32**, i32*** %5
%12 = load i8**, i8*** %6
%13 = load i64, i64* %7
%14 = load i32*, i32** %8
%15 = call i32 @asn1_template_ex_d2i(i32** %11, i8** %12, i64 %13, i32* %14, i32 0, %struct.TYPE_3__* %9, i32 0)
ret i32 %15
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i64 }
define i32 @ASN1_template_d2i(i32** %0, i8** %1, i64 %2, i32* %3) {
%5 = alloca %struct.TYPE_3__
%6 = bitcast %struct.TYPE_3__* %5 to i8*
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i64 0, i32 0
store i64 0, i64* %7
%8 = call i32 @asn1_template_ex_d2i(i32** %0, i8** %1, i64 %2, i32* %3, i32 0, %struct.TYPE_3__* %5, i32 0)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf_s(char *, char *);
void error_report(char *sz_error) { printf_s("report: %s\n", sz_error); }


x86 assembly (clang, -O0):
<error_report>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf_s@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_report>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf_s@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"report: %s\0A\00"
define void @error_report(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf_s(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"report: %s\0A\00"
define void @error_report(i8* %0) {
%2 = tail call i32 @printf_s(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int INT_MAX;
int INT_MIN;
bool sdiv_is_oor(int a, int b) {
  return (INT_MIN < -(INT_MAX) && a == INT_MIN && b == -1);
}


x86 assembly (clang, -O0):
<sdiv_is_oor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ecf(%rip),%rax
mov    (%rax),%ecx
xor    %edx,%edx
mov    0x2ecc(%rip),%rax
sub    (%rax),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jge    114c <sdiv_is_oor+0x4c>
mov    -0x4(%rbp),%ecx
xor    %eax,%eax
mov    0x2ea9(%rip),%rdx
cmp    (%rdx),%ecx
mov    %al,-0x9(%rbp)
jne    114c <sdiv_is_oor+0x4c>
cmpl   $0xffffffff,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdiv_is_oor>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ed8(%rip),%rcx
xor    %edx,%edx
sub    (%rcx),%edx
cmp    %edx,%eax
setl   %cl
cmp    %edi,%eax
sete   %al
cmp    $0xffffffff,%esi
sete   %dl
and    %al,%dl
and    %cl,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
@INT_MAX = global i32 0
define i32 @sdiv_is_oor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @INT_MIN
%6 = load i32, i32* @INT_MAX
%7 = sub nsw i32 0, %6
%8 = icmp slt i32 %5, %7
br i1 %8, label %9, label %16
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* @INT_MIN
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %4
%15 = icmp eq i32 %14, -1
br label %16
16: ; preds = %13, %9, %2
%17 = phi i1 [ false, %9 ], [ false, %2 ], [ %15, %13 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
@INT_MIN = global i32 0
@INT_MAX = global i32 0
define i32 @sdiv_is_oor(i32 %0, i32 %1) {
%3 = load i32, i32* @INT_MIN
%4 = load i32, i32* @INT_MAX
%5 = sub nsw i32 0, %4
%6 = icmp slt i32 %3, %5
%7 = icmp eq i32 %3, %0
%8 = and i1 %7, %6
%9 = icmp eq i32 %1, -1
%10 = and i1 %9, %8
%11 = zext i1 %10 to i32
ret i32 %11
}
unsigned int umin(unsigned int a, unsigned int b) { return a <= b ? a : b; }


x86 assembly (clang, -O0):
<umin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
ja     1121 <umin+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <umin+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umin>:
mov    %edi,%eax
cmp    %esi,%edi
cmova  %esi,%eax
ret

LLVM IR (-O0):
define i32 @umin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ule i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @umin(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int fdt_create_with_flags(void *, int, int /*<<< orphan*/);
int fdt_create(void *buf, int bufsize) {
  return fdt_create_with_flags(buf, bufsize, 0);
}


x86 assembly (clang, -O0):
<fdt_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <fdt_create_with_flags@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdt_create>:
xor    %edx,%edx
jmp    1030 <fdt_create_with_flags@plt>

LLVM IR (-O0):
define i32 @fdt_create(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @fdt_create_with_flags(i8* %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fdt_create(i8* %0, i32 %1) {
%3 = tail call i32 @fdt_create_with_flags(i8* %0, i32 %1, i32 0)
ret i32 %3
}
unsigned int getMFTB(void) { return 0; }


x86 assembly (clang, -O0):
<getMFTB>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMFTB>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getMFTB() {
ret i32 0
}

LLVM IR (-O2):
define i32 @getMFTB() {
ret i32 0
}
void print_grid(int x, int y, char **grid) {}


x86 assembly (clang, -O0):
<print_grid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_grid>:
ret

LLVM IR (-O0):
define void @print_grid(i32 %0, i32 %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
ret void
}

LLVM IR (-O2):
define void @print_grid(i32 %0, i32 %1, i8** nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void out_log(const char *s) {
  fprintf(stderr, "log: %s\n", s);
  fflush(stderr);
}


x86 assembly (clang, -O0):
<out_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_log>:
push   %rbx
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [9 x i8] c"log: %s\0A\00"
define void @out_log(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fflush(i32 %6)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [9 x i8] c"log: %s\0A\00"
define void @out_log(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fflush(i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ot(char *);
defstorage() { ot(".blkb\t"); }


x86 assembly (clang, -O0):
<defstorage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ot@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defstorage>:
lea    0xee9(%rip),%rdi
jmp    1030 <ot@plt>

LLVM IR (-O0):
@.str = [7 x i8] c".blkb\09\00"
define i32 @defstorage() {
%1 = alloca i32
%2 = call i32 @ot(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [7 x i8] c".blkb\09\00"
define i32 @defstorage() {
%1 = tail call i32 @ot(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_remove_symbol_from_table(int i) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc(291, &i, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_remove_symbol_from_table>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x123,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_remove_symbol_from_table>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x123,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syscon_remove_symbol_from_table(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %3
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 291, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_remove_symbol_from_table(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 291, i32* %2, i32* undef, double* undef)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_group_data(char *, int, int, char *);
int /*<<< orphan*/ strncpy(char *, char *, int);
void fgmvwrite_group_data_(char groupname[], int data_type, int numgrp,
                           char *group_data) {
  char name[10];
  strncpy(name, groupname, 8);
  *(name + 8) = '\0';
  gmvwrite_group_data(name, data_type, numgrp, group_data);
}


x86 assembly (clang, -O0):
<fgmvwrite_group_data_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
lea    -0x22(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x8,%edx
call   1030 <strncpy@plt>
movb   $0x0,-0x1a(%rbp)
lea    -0x22(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1040 <gmvwrite_group_data@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_group_data_>:
push   %rbp
push   %r15
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rcx,%r14
mov    %edx,%ebp
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xe(%rsp),%r15
mov    %r15,%rdi
mov    $0x8,%edx
call   1030 <strncpy@plt>
movb   $0x0,0x16(%rsp)
mov    %r15,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
mov    %r14,%rcx
call   1040 <gmvwrite_group_data@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @fgmvwrite_group_data_(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca [10 x i8]
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = getelementptr inbounds [10 x i8], [10 x i8]* %9, i64 0, i64 0
%11 = load i8*, i8** %5
%12 = call i32 @strncpy(i8* %10, i8* %11, i32 8)
%13 = getelementptr inbounds [10 x i8], [10 x i8]* %9, i64 0, i64 0
%14 = getelementptr inbounds i8, i8* %13, i64 8
store i8 0, i8* %14
%15 = getelementptr inbounds [10 x i8], [10 x i8]* %9, i64 0, i64 0
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = load i8*, i8** %8
%19 = call i32 @gmvwrite_group_data(i8* %15, i32 %16, i32 %17, i8* %18)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_group_data_(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca [10 x i8]
%6 = getelementptr inbounds [10 x i8], [10 x i8]* %5, i64 0, i64 0
%7 = call i32 @strncpy(i8* %6, i8* %0, i32 8)
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %5, i64 0, i64 8
store i8 0, i8* %8
%9 = call i32 @gmvwrite_group_data(i8* %6, i32 %1, i32 %2, i8* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLfloat;

/* Variables and functions */
int /*<<< orphan*/ DOT3(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *);
GLfloat LEN_SQUARED_3FV(const GLfloat v[3]) { return DOT3(v, v); }


x86 assembly (clang, -O0):
<LEN_SQUARED_3FV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <DOT3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LEN_SQUARED_3FV>:
mov    %rdi,%rsi
jmp    1030 <DOT3@plt>

LLVM IR (-O0):
define i32 @LEN_SQUARED_3FV(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @DOT3(i32* %3, i32* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @LEN_SQUARED_3FV(i32* %0) {
%2 = tail call i32 @DOT3(i32* %0, i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage_short(void) {
  fprintf(stderr, "Usage: [-25bhvqrte] [-s string] [files ...]\n");
  exit(255);
}


x86 assembly (clang, -O0):
<usage_short>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage_short>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [45 x i8] c"Usage: [-25bhvqrte] [-s string] [files ...]\0A\00"
define void @usage_short() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 255)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [45 x i8] c"Usage: [-25bhvqrte] [-s string] [files ...]\0A\00"
define void @usage_short() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 255)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ ENGINE;

/* Variables and functions */
int /*<<< orphan*/ *ENGINE_get_first();
int /*<<< orphan*/ *ENGINE_get_next(int /*<<< orphan*/ *);
int /*<<< orphan*/ ENGINE_register_ciphers(int /*<<< orphan*/ *);
void ENGINE_register_all_ciphers(void) {
  ENGINE *e;
  for (e = ENGINE_get_first(); e; e = ENGINE_get_next(e))
    ENGINE_register_ciphers(e);
}


x86 assembly (clang, -O0):
<ENGINE_register_all_ciphers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <ENGINE_get_first@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1169 <ENGINE_register_all_ciphers+0x39>
mov    -0x8(%rbp),%rdi
call   1030 <ENGINE_register_ciphers@plt>
mov    -0x8(%rbp),%rdi
call   1040 <ENGINE_get_next@plt>
mov    %rax,-0x8(%rbp)
jmp    1143 <ENGINE_register_all_ciphers+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ENGINE_register_all_ciphers>:
push   %rbx
xor    %eax,%eax
call   1050 <ENGINE_get_first@plt>
test   %rax,%rax
je     1158 <ENGINE_register_all_ciphers+0x28>
mov    %rax,%rbx
mov    %rbx,%rdi
call   1030 <ENGINE_register_ciphers@plt>
mov    %rbx,%rdi
call   1040 <ENGINE_get_next@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1140 <ENGINE_register_all_ciphers+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ENGINE_register_all_ciphers() {
%1 = alloca i32*
%2 = call i32* (...) @ENGINE_get_first()
store i32* %2, i32** %1
br label %3
3: ; preds = %9, %0
%4 = load i32*, i32** %1
%5 = icmp ne i32* %4, null
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32*, i32** %1
%8 = call i32 @ENGINE_register_ciphers(i32* %7)
br label %9
9: ; preds = %6
%10 = load i32*, i32** %1
%11 = call i32* @ENGINE_get_next(i32* %10)
store i32* %11, i32** %1
br label %3
12: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @ENGINE_register_all_ciphers() {
%1 = tail call i32* (...) @ENGINE_get_first()
%2 = icmp eq i32* %1, null
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = phi i32* [ %6, %3 ], [ %1, %0 ]
%5 = tail call i32 @ENGINE_register_ciphers(i32* %4)
%6 = tail call i32* @ENGINE_get_next(i32* %4)
%7 = icmp eq i32* %6, null
br i1 %7, label %8, label %3
8: ; preds = %3, %0
ret void
}
void g_strsplit_set() {}


x86 assembly (clang, -O0):
<g_strsplit_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_strsplit_set>:
ret

LLVM IR (-O0):
define void @g_strsplit_set() {
ret void
}

LLVM IR (-O2):
define void @g_strsplit_set() {
ret void
}
/* Variables and functions */
void *malloc(size_t);
__attribute__((__always___)) void *chpl_malloc(size_t size) {
  return malloc(size);
}


x86 assembly (clang, -O0):
<chpl_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chpl_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @chpl_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @chpl_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ SuperDelay();
void Start(int row) {
  *(volatile unsigned int *)(0xFFFFFFE0 + 0x0C) = 16 | 2;
  SuperDelay();
  *(volatile unsigned int *)(0xFFFFFFE0 + 0x0C) = 2;
}


x86 assembly (clang, -O0):
<Start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xffffffec,%eax
movl   $0x12,(%rax)
mov    $0x0,%al
call   1030 <SuperDelay@plt>
mov    $0xffffffec,%eax
movl   $0x2,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Start>:
push   %rbx
mov    $0xffffffec,%ebx
movl   $0x12,(%rbx)
xor    %eax,%eax
call   1030 <SuperDelay@plt>
movl   $0x2,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @Start(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i32 18, i32* inttoptr (i64 4294967276 to i32*)
%3 = call i32 (...) @SuperDelay()
store volatile i32 2, i32* inttoptr (i64 4294967276 to i32*)
ret void
}

LLVM IR (-O2):
define void @Start(i32 %0) {
store volatile i32 18, i32* inttoptr (i64 4294967276 to i32*)
%2 = tail call i32 (...) @SuperDelay()
store volatile i32 2, i32* inttoptr (i64 4294967276 to i32*)
ret void
}
double divisionBy10(int inputNum) {
  double result = inputNum / 10.0;
  return result;
}


x86 assembly (clang, -O0):
<divisionBy10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xeec(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<divisionBy10>:
cvtsi2sd %edi,%xmm0
divsd  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @divisionBy10(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to double
%6 = fdiv double %5, 1.000000e+01
store double %6, double* %3
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
define double @divisionBy10(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fdiv double %2, 1.000000e+01
ret double %3
}
/* Variables and functions */
int i2c_smbus_write_byte(int, int);
int hummingboardI2CWrite(int fd, int data) {
  return i2c_smbus_write_byte(fd, data);
}


x86 assembly (clang, -O0):
<hummingboardI2CWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <i2c_smbus_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hummingboardI2CWrite>:
jmp    1030 <i2c_smbus_write_byte@plt>

LLVM IR (-O0):
define i32 @hummingboardI2CWrite(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @i2c_smbus_write_byte(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @hummingboardI2CWrite(i32 %0, i32 %1) {
%3 = tail call i32 @i2c_smbus_write_byte(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ posix_spawnattr_t;

/* Variables and functions */
int posix_spawnattr_destroy(posix_spawnattr_t *sa) {
  if (sa == NULL)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<posix_spawnattr_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <posix_spawnattr_destroy+0x1f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1126 <posix_spawnattr_destroy+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawnattr_destroy>:
cmp    $0x1,%rdi
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @posix_spawnattr_destroy(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @posix_spawnattr_destroy(i32* readnone %0) {
%2 = icmp eq i32* %0, null
%3 = sext i1 %2 to i32
ret i32 %3
}
int get_point(char a[]) {
  int i = 0;
  while (a[i] != '\0') {
    if (a[i] == '.')
      return i;
    i++;
  }
}


x86 assembly (clang, -O0):
<get_point>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1152 <get_point+0x52>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2e,%eax
jne    1144 <get_point+0x44>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <get_point+0x52>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <get_point+0xf>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_point>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1123 <get_point+0x23>
cmp    $0x2e,%cl
je     1123 <get_point+0x23>
add    $0x1,%rax
jmp    1110 <get_point+0x10>
ret

LLVM IR (-O0):
define i32 @get_point(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %23, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 46
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %4
store i32 %22, i32* %2
br label %26
23: ; preds = %13
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %21, %5
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @get_point(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ %7, %6 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %8
i8 46, label %8
]
6: ; preds = %2
%7 = add nuw i64 %3, 1
br label %2
8: ; preds = %2, %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
int CountLeftBrackets(char *LogicElement) {
  int i, Count = 0;
  for (i = 0; LogicElement[i] != '\x00'; i++) {
    if (LogicElement[i] == '(')
      Count++;
  }
  return (Count);
}


x86 assembly (clang, -O0):
<CountLeftBrackets>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115c <CountLeftBrackets+0x5c>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x28,%eax
jne    1149 <CountLeftBrackets+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114e <CountLeftBrackets+0x4e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <CountLeftBrackets+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CountLeftBrackets>:
xor    %eax,%eax
jmp    1117 <CountLeftBrackets+0x17>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
add    $0x1,%rdi
movzbl (%rdi),%ecx
cmp    $0x28,%cl
je     1110 <CountLeftBrackets+0x10>
test   %cl,%cl
jne    1113 <CountLeftBrackets+0x13>
ret

LLVM IR (-O0):
define i32 @CountLeftBrackets(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %25, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %28
13: ; preds = %5
%14 = load i8*, i8** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 40
br i1 %20, label %21, label %24
21: ; preds = %13
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %24
24: ; preds = %21, %13
br label %25
25: ; preds = %24
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 1
store i32 %27, i32* %3
br label %5
28: ; preds = %5
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @CountLeftBrackets(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i64 [ %11, %9 ], [ 0, %1 ]
%4 = phi i32 [ %10, %9 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
switch i8 %6, label %9 [
i8 0, label %12
i8 40, label %7
]
7: ; preds = %2
%8 = add nsw i32 %4, 1
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ %8, %7 ], [ %4, %2 ]
%11 = add nuw i64 %3, 1
br label %2
12: ; preds = %2
ret i32 %4
}
/* Type definitions */
typedef int int_fast16_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_COPY_int_fast16_t(int_fast16_t *const dest,
                                         int_fast16_t const src) {
  return (((*dest) = src), true);
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_COPY_int_fast16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_COPY_int_fast16_t>:
mov    %esi,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_COPY_int_fast16_t(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_COPY_int_fast16_t(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret i32 1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int arcv2_timer0_count_get();
__attribute__((always_)) void delayMicroseconds(uint32_t dwUs) {
  if (0 == dwUs)
    return;
  uint32_t init_count = arcv2_timer0_count_get();
  uint32_t clocks = dwUs << 5;
  while (arcv2_timer0_count_get() - init_count < clocks)
    ;
}


x86 assembly (clang, -O0):
<delayMicroseconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    112b <delayMicroseconds+0x1b>
jmp    1156 <delayMicroseconds+0x46>
mov    $0x0,%al
call   1030 <arcv2_timer0_count_get@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x5,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <arcv2_timer0_count_get@plt>
sub    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1156 <delayMicroseconds+0x46>
jmp    113e <delayMicroseconds+0x2e>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delayMicroseconds>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
je     113d <delayMicroseconds+0x2d>
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <arcv2_timer0_count_get@plt>
mov    %eax,%ebp
shl    $0x5,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
xor    %eax,%eax
call   1030 <arcv2_timer0_count_get@plt>
sub    %ebp,%eax
cmp    %ebx,%eax
jl     1130 <delayMicroseconds+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @delayMicroseconds(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp eq i32 0, %5
br i1 %6, label %7, label %8
7: ; preds = %1
br label %19
8: ; preds = %1
%9 = call i32 (...) @arcv2_timer0_count_get()
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = shl i32 %10, 5
store i32 %11, i32* %4
br label %12
12: ; preds = %18, %8
%13 = call i32 (...) @arcv2_timer0_count_get()
%14 = load i32, i32* %3
%15 = sub nsw i32 %13, %14
%16 = load i32, i32* %4
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %19
18: ; preds = %12
br label %12
19: ; preds = %7, %12
ret void
}

LLVM IR (-O2):
define void @delayMicroseconds(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i32 (...) @arcv2_timer0_count_get()
%5 = shl i32 %0, 5
br label %6
6: ; preds = %6, %3
%7 = tail call i32 (...) @arcv2_timer0_count_get()
%8 = sub nsw i32 %7, %4
%9 = icmp slt i32 %8, %5
br i1 %9, label %6, label %10
10: ; preds = %6, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void PrintUsage(void) { printf("Usage..\n"); }


x86 assembly (clang, -O0):
<PrintUsage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintUsage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Usage..\0A\00"
define void @PrintUsage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"Usage..\00"
define void @PrintUsage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
void **Huff_GetNode(void **tree) {
  void **node;
  int value;
  node = tree[262];
  if (!node) {
    value = (*(int *)&(tree[1]))++;
    node = &tree[value + 6407];
    return node;
  }
  tree[262] = node[0];
  return node;
}


x86 assembly (clang, -O0):
<Huff_GetNode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x830(%rax),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115c <Huff_GetNode+0x5c>
mov    -0x10(%rbp),%rcx
mov    0x8(%rcx),%eax
mov    %eax,%edx
add    $0x1,%edx
mov    %edx,0x8(%rcx)
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
add    $0x1907,%ecx
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1176 <Huff_GetNode+0x76>
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x830(%rax)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Huff_GetNode>:
mov    0x830(%rdi),%rax
test   %rax,%rax
je     1117 <Huff_GetNode+0x17>
mov    (%rax),%rcx
mov    %rcx,0x830(%rdi)
ret
movslq 0x8(%rdi),%rax
lea    0x1(%rax),%ecx
mov    %ecx,0x8(%rdi)
lea    (%rdi,%rax,8),%rax
add    $0xc838,%rax
ret

LLVM IR (-O0):
define i8** @Huff_GetNode(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
%4 = alloca i8**
%5 = alloca i32
store i8** %0, i8*** %3
%6 = load i8**, i8*** %3
%7 = getelementptr inbounds i8*, i8** %6, i64 262
%8 = load i8*, i8** %7
%9 = bitcast i8* %8 to i8**
store i8** %9, i8*** %4
%10 = load i8**, i8*** %4
%11 = icmp ne i8** %10, null
br i1 %11, label %24, label %12
12: ; preds = %1
%13 = load i8**, i8*** %3
%14 = getelementptr inbounds i8*, i8** %13, i64 1
%15 = bitcast i8** %14 to i32*
%16 = load i32, i32* %15
%17 = add nsw i32 %16, 1
store i32 %17, i32* %15
store i32 %16, i32* %5
%18 = load i8**, i8*** %3
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 6407
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8*, i8** %18, i64 %21
store i8** %22, i8*** %4
%23 = load i8**, i8*** %4
store i8** %23, i8*** %2
br label %31
24: ; preds = %1
%25 = load i8**, i8*** %4
%26 = getelementptr inbounds i8*, i8** %25, i64 0
%27 = load i8*, i8** %26
%28 = load i8**, i8*** %3
%29 = getelementptr inbounds i8*, i8** %28, i64 262
store i8* %27, i8** %29
%30 = load i8**, i8*** %4
store i8** %30, i8*** %2
br label %31
31: ; preds = %24, %12
%32 = load i8**, i8*** %2
ret i8** %32
}

LLVM IR (-O2):
define i8** @Huff_GetNode(i8** %0) {
%2 = getelementptr inbounds i8*, i8** %0, i64 262
%3 = bitcast i8** %2 to i8***
%4 = load i8**, i8*** %3
%5 = icmp eq i8** %4, null
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = getelementptr inbounds i8*, i8** %0, i64 1
%8 = bitcast i8** %7 to i32*
%9 = load i32, i32* %8
%10 = add nsw i32 %9, 1
store i32 %10, i32* %8
%11 = add nsw i32 %9, 6407
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8*, i8** %0, i64 %12
br label %16
14: ; preds = %1
%15 = load i8*, i8** %4
store i8* %15, i8** %2
br label %16
16: ; preds = %14, %6
%17 = phi i8** [ %4, %14 ], [ %13, %6 ]
ret i8** %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
int main() {
  char i = 0;
  for (; i >= 0; i++)
    printf("%d\n", i);
  unsigned char j = 0;
  for (; j >= 0; j++)
    printf("%d\n", j);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x0,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x0,%eax
jl     114d <main+0x3d>
lea    0xec9(%rip),%rdi
movzbl -0x5(%rbp),%esi
call   1030 <printf@plt>
mov    -0x5(%rbp),%al
add    $0x1,%al
mov    %al,-0x5(%rbp)
jmp    1123 <main+0x13>
movb   $0x0,-0x6(%rbp)
movzbl -0x6(%rbp),%eax
cmp    $0x0,%eax
jl     117b <main+0x6b>
lea    0xe9b(%rip),%rdi
movzbl -0x6(%rbp),%esi
call   1030 <printf@plt>
mov    -0x6(%rbp),%al
add    $0x1,%al
mov    %al,-0x6(%rbp)
jmp    1151 <main+0x41>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
movzbl %bl,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%bl
cmp    $0x80,%bl
jne    1120 <main+0x10>
xor    %ebx,%ebx
lea    0xec2(%rip),%r14
xchg   %ax,%ax
movzbl %bl,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%bl
jmp    1140 <main+0x30>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
store i8 0, i8* %2
br label %4
4: ; preds = %11, %0
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i8, i8* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %9)
br label %11
11: ; preds = %8
%12 = load i8, i8* %2
%13 = add i8 %12, 1
store i8 %13, i8* %2
br label %4
14: ; preds = %4
store i8 0, i8* %3
br label %15
15: ; preds = %22, %14
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = icmp sge i32 %17, 0
br i1 %18, label %19, label %25
19: ; preds = %15
%20 = load i8, i8* %3
%21 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %20)
br label %22
22: ; preds = %19
%23 = load i8, i8* %3
%24 = add i8 %23, 1
store i8 %24, i8* %3
br label %15
25: ; preds = %15
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i8 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %2)
%4 = add nuw i8 %2, 1
%5 = icmp eq i8 %4, -128
br i1 %5, label %6, label %1
6: ; preds = %1, %6
%7 = phi i8 [ %9, %6 ], [ 0, %1 ]
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %7)
%9 = add i8 %7, 1
br label %6
}
void prefetcht1(const void *v) {
  __asm__ volatile("prefetcht1 %0" : : "m"(*(const char *)v));
}


x86 assembly (clang, -O0):
<prefetcht1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
prefetcht1 (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prefetcht1>:
prefetcht1 (%rdi)
ret

LLVM IR (-O0):
define void @prefetcht1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @prefetcht1(i8* %0) {
tail call void asm sideeffect "prefetcht1 $0", "*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0)
ret void
}
/* Variables and functions */
int power_n(int, int);
int /*<<< orphan*/ printf(char *, int);
void main() {
  int x = 2;
  int n = 5;
  int pow = power_n(x, n);
  printf("Result is: %d\n", pow);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <power_n@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x5,%esi
call   1040 <power_n@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Result is: %d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 2, i32* %1
store i32 5, i32* %2
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @power_n(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"Result is: %d\0A\00"
define void @main() {
%1 = tail call i32 @power_n(i32 2, i32 5)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int sprintf(char *, char *, int);
int ssds_field_value(int fd, int class_num, int field_num, int item_num,
                     char *sp) {
  int ret;
  ret = sprintf(sp, "%d", class_num * 100 + (field_num + 1) * 10 + item_num);
  return ret;
}


x86 assembly (clang, -O0):
<ssds_field_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
imul   $0x64,-0x8(%rbp),%edx
mov    -0xc(%rbp),%eax
add    $0x1,%eax
imul   $0xa,%eax,%eax
add    %eax,%edx
add    -0x10(%rbp),%edx
lea    0xebb(%rip),%rsi
call   1030 <sprintf@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssds_field_value>:
mov    %r8,%rdi
imul   $0x64,%esi,%eax
lea    (%rdx,%rdx,4),%edx
lea    (%rax,%rdx,2),%eax
lea    (%rcx,%rax,1),%edx
add    $0xa,%edx
lea    0xed7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @ssds_field_value(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%12 = load i8*, i8** %10
%13 = load i32, i32* %7
%14 = mul nsw i32 %13, 100
%15 = load i32, i32* %8
%16 = add nsw i32 %15, 1
%17 = mul nsw i32 %16, 10
%18 = add nsw i32 %14, %17
%19 = load i32, i32* %9
%20 = add nsw i32 %18, %19
%21 = call i32 @sprintf(i8* %12, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %20)
store i32 %21, i32* %11
%22 = load i32, i32* %11
ret i32 %22
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @ssds_field_value(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture writeonly %4) {
%6 = mul nsw i32 %1, 100
%7 = mul i32 %2, 10
%8 = add i32 %6, 10
%9 = add i32 %8, %7
%10 = add i32 %9, %3
%11 = tail call i32 @sprintf(i8* dereferenceable(1) %4, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
ret i32 %11
}
int algorithm(int i) {
  if (i == 0)
    return i;
  else
    return algorithm((i < 0) ? i + 1 : i - 1);
}


x86 assembly (clang, -O0):
<algorithm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1130 <algorithm+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <algorithm+0x4c>
cmpl   $0x0,-0x8(%rbp)
jge    1148 <algorithm+0x38>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1151 <algorithm+0x41>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <algorithm@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<algorithm>:
test   %edi,%edi
je     111d <algorithm+0x1d>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edi,%eax
shr    $0x1f,%eax
lea    (%rdi,%rax,2),%edi
add    $0xffffffff,%edi
jne    1110 <algorithm+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @algorithm(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %20
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
br label %17
14: ; preds = %8
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 1
br label %17
17: ; preds = %14, %11
%18 = phi i32 [ %13, %11 ], [ %16, %14 ]
%19 = call i32 @algorithm(i32 %18)
store i32 %19, i32* %2
br label %20
20: ; preds = %17, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @algorithm(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = icmp sgt i32 %4, -1
%6 = select i1 %5, i32 -1, i32 1
%7 = add nsw i32 %6, %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ op_write1(int);
void op_enc_inc_e(void) { op_write1(0x1c); }


x86 assembly (clang, -O0):
<op_enc_inc_e>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c,%edi
call   1030 <op_write1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_enc_inc_e>:
mov    $0x1c,%edi
jmp    1030 <op_write1@plt>

LLVM IR (-O0):
define void @op_enc_inc_e() {
%1 = call i32 @op_write1(i32 28)
ret void
}

LLVM IR (-O2):
define void @op_enc_inc_e() {
%1 = tail call i32 @op_write1(i32 28)
ret void
}
/* Type definitions */
typedef scalar_t__ __v4si;
typedef scalar_t__ __m128i;

/* Variables and functions */
__m128i __attribute__((__always___, __nodebug__))
_mm_cmpeq_epi32(__m128i a, __m128i b) {
  return (__m128i)((__v4si)a == (__v4si)b);
}


x86 assembly (clang, -O0):
<_mm_cmpeq_epi32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cmpeq_epi32>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i64 @_mm_cmpeq_epi32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @_mm_cmpeq_epi32(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i64
ret i64 %4
}
int test_imm_C7uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xC7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C7uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xc7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C7uint64_midword_mem>:
testb  $0xc7,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C7uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 199
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C7uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 13041664
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x;
  if (!x) {
  } else {
    assert(x == 1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112e <main+0x1e>
jmp    113f <main+0x2f>
cmpl   $0x1,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %0
br label %11
6: ; preds = %0
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
br label %11
11: ; preds = %6, %5
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void gchead_(scan_no, feed_no, record, return_code) int *scan_no, *feed_no,
    *record, *return_code;
{}


x86 assembly (clang, -O0):
<gchead_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gchead_>:
ret

LLVM IR (-O0):
define void @gchead_(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
ret void
}

LLVM IR (-O2):
define void @gchead_(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture %3) {
ret void
}