xunge/DecIR huggingface dataset:
int dd_is_negative(const double *a) { return (a[0] < 0.0) ? 1 : 0; }


x86 assembly (clang, -O0):
<dd_is_negative>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
xorps  %xmm0,%xmm0
xor    %eax,%eax
mov    $0x1,%ecx
ucomisd %xmm1,%xmm0
cmova  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_is_negative>:
xorpd  %xmm0,%xmm0
xor    %eax,%eax
ucomisd (%rdi),%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @dd_is_negative(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fcmp olt double %5, 0.000000e+00
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 1, i32 0
ret i32 %8
}

LLVM IR (-O2):
define i32 @dd_is_negative(double* nocapture %0) {
%2 = load double, double* %0
%3 = fcmp olt double %2, 0.000000e+00
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char const *escnonprint_internal(char const *, char, int);
const char *escnonprint(const char *str) {
  return escnonprint_internal(str, '\\', 8);
}


x86 assembly (clang, -O0):
<escnonprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x5c,%esi
mov    $0x8,%edx
call   1030 <escnonprint_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<escnonprint>:
mov    $0x5c,%esi
mov    $0x8,%edx
jmp    1030 <escnonprint_internal@plt>

LLVM IR (-O0):
define i8* @escnonprint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @escnonprint_internal(i8* %3, i8 signext 92, i32 8)
ret i8* %4
}

LLVM IR (-O2):
define i8* @escnonprint(i8* %0) {
%2 = tail call i8* @escnonprint_internal(i8* %0, i8 signext 92, i32 8)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void writelines(char *lineptr[], int nlines) {
  int i;
  for (i = 0; i < nlines; i++) {
    printf("%s\n", lineptr[i]);
  }
}


x86 assembly (clang, -O0):
<writelines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <writelines+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <writelines+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writelines>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <writelines+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,8),%rsi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <writelines+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @writelines(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @writelines(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int send(int, char *, int, int /*<<< orphan*/);
int httpSend(int pSockId, char *pOut, int pOutSize) {
  int size;
  if ((size = send(pSockId, pOut, pOutSize, 0)) > 0)
    return size;
  return 0;
}


x86 assembly (clang, -O0):
<httpSend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <send@plt>
mov    %eax,-0x18(%rbp)
cmp    $0x0,%eax
jle    114a <httpSend+0x3a>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1151 <httpSend+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<httpSend>:
push   %rbx
xor    %ebx,%ebx
xor    %ecx,%ecx
call   1030 <send@plt>
test   %eax,%eax
cmovs  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @httpSend(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @send(i32 %9, i8* %10, i32 %11, i32 0)
store i32 %12, i32* %8
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = load i32, i32* %8
store i32 %15, i32* %4
br label %17
16: ; preds = %3
store i32 0, i32* %4
br label %17
17: ; preds = %16, %14
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @httpSend(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @send(i32 %0, i8* %1, i32 %2, i32 0)
%5 = icmp sgt i32 %4, 0
%6 = select i1 %5, i32 %4, i32 0
ret i32 %6
}
fne(float x, float y) {
  if (x != y)
    return 13;
  else
    return 140;
}


x86 assembly (clang, -O0):
<fne>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jne    1128 <fne+0x28>
jp     1128 <fne+0x28>
jmp    1134 <fne+0x34>
movl   $0xd,-0x4(%rbp)
jmp    113b <fne+0x3b>
movl   $0x8c,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fne>:
ucomiss %xmm1,%xmm0
setp   %al
setne  %cl
or     %al,%cl
mov    $0xd,%ecx
mov    $0x8c,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fne(float %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp une float %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 13, i32* %3
br label %11
10: ; preds = %2
store i32 140, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @fne(float %0, float %1) {
%3 = fcmp une float %0, %1
%4 = select i1 %3, i32 13, i32 140
ret i32 %4
}
unsigned int utils_inet_addr(unsigned char one, unsigned char two,
                             unsigned char three, unsigned char four) {
  unsigned long ip = 0;
  ip |= (one << 24);
  ip |= (two << 16);
  ip |= (three << 8);
  ip |= (four << 0);
  return (ip);
}


x86 assembly (clang, -O0):
<utils_inet_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x18,%eax
cltq
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x10,%eax
cltq
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
movzbl -0x3(%rbp),%eax
shl    $0x8,%eax
cltq
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
movzbl -0x4(%rbp),%eax
shl    $0x0,%eax
cltq
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utils_inet_addr>:
shl    $0x18,%edi
shl    $0x10,%esi
lea    (%rsi,%rdi,1),%eax
shl    $0x8,%edx
or     %edx,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @utils_inet_addr(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i64
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
store i64 0, i64* %9
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 24
%13 = sext i32 %12 to i64
%14 = load i64, i64* %9
%15 = or i64 %14, %13
store i64 %15, i64* %9
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 16
%19 = sext i32 %18 to i64
%20 = load i64, i64* %9
%21 = or i64 %20, %19
store i64 %21, i64* %9
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = shl i32 %23, 8
%25 = sext i32 %24 to i64
%26 = load i64, i64* %9
%27 = or i64 %26, %25
store i64 %27, i64* %9
%28 = load i8, i8* %8
%29 = zext i8 %28 to i32
%30 = shl i32 %29, 0
%31 = sext i32 %30 to i64
%32 = load i64, i64* %9
%33 = or i64 %32, %31
store i64 %33, i64* %9
%34 = load i64, i64* %9
%35 = trunc i64 %34 to i32
ret i32 %35
}

LLVM IR (-O2):
define i32 @utils_inet_addr(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = zext i8 %0 to i32
%6 = shl nuw i32 %5, 24
%7 = zext i8 %1 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %6
%10 = zext i8 %2 to i32
%11 = shl nuw nsw i32 %10, 8
%12 = or i32 %9, %11
%13 = zext i8 %3 to i32
%14 = or i32 %12, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x65() {
  Assert_real((isascii(101)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              510, ("isascii should be 1 for e"));
}


x86 assembly (clang, -O0):
<t_isascii_0x65>:
push   %rbp
mov    %rsp,%rbp
mov    $0x65,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1fe,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x65>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x1fe,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for e\00"
define void @t_isascii_0x65() {
%1 = call i32 @isascii(i32 101)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 510, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for e\00"
define void @t_isascii_0x65() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 510, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ls_trap();
int fac(volatile int n) {
  ls_trap();
  int i;
  volatile int p = 1;
  for (i = 1; i <= n; i++) {
    p *= i;
  }
  return p;
}


x86 assembly (clang, -O0):
<fac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ls_trap@plt>
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
cmp    %ecx,%eax
jg     1158 <fac+0x48>
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1130 <fac+0x20>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fac>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,0xc(%rsp)
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <ls_trap@plt>
movl   $0x1,0x8(%rsp)
cmpl   $0x0,0xc(%rsp)
jle    1154 <fac+0x44>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    $0x1,%ebx
mov    0x8(%rsp),%eax
imul   %ebx,%eax
mov    %eax,0x8(%rsp)
cmp    0xc(%rsp),%ebx
jl     1140 <fac+0x30>
mov    0x8(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fac(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store volatile i32 %0, i32* %2
%5 = call i32 (...) @ls_trap()
store volatile i32 1, i32* %4
store i32 1, i32* %3
br label %6
6: ; preds = %14, %1
%7 = load i32, i32* %3
%8 = load volatile i32, i32* %2
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i32, i32* %3
%12 = load volatile i32, i32* %4
%13 = mul nsw i32 %12, %11
store volatile i32 %13, i32* %4
br label %14
14: ; preds = %10
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %6
17: ; preds = %6
%18 = load volatile i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @fac(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store volatile i32 %0, i32* %2
%4 = tail call i32 (...) @ls_trap()
%5 = bitcast i32* %3 to i8*
store volatile i32 1, i32* %3
%6 = load volatile i32, i32* %2
%7 = icmp slt i32 %6, 1
br i1 %7, label %15, label %8
8: ; preds = %1, %8
%9 = phi i32 [ %12, %8 ], [ 1, %1 ]
%10 = load volatile i32, i32* %3
%11 = mul nsw i32 %10, %9
store volatile i32 %11, i32* %3
%12 = add nuw nsw i32 %9, 1
%13 = load volatile i32, i32* %2
%14 = icmp slt i32 %9, %13
br i1 %14, label %8, label %15
15: ; preds = %8, %1
%16 = load volatile i32, i32* %3
ret i32 %16
}
/* Variables and functions */
int stbi__bitreverse16(int);
int stbi__bit_reverse(int v, int bits) {
  ;
  return stbi__bitreverse16(v) >> (16 - bits);
}


x86 assembly (clang, -O0):
<stbi__bit_reverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <stbi__bitreverse16@plt>
mov    $0x10,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi__bit_reverse>:
push   %rbx
mov    %esi,%ebx
call   1030 <stbi__bitreverse16@plt>
mov    $0x10,%cl
sub    %bl,%cl
sar    %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @stbi__bit_reverse(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @stbi__bitreverse16(i32 %5)
%7 = load i32, i32* %4
%8 = sub nsw i32 16, %7
%9 = ashr i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @stbi__bit_reverse(i32 %0, i32 %1) {
%3 = tail call i32 @stbi__bitreverse16(i32 %0)
%4 = sub nsw i32 16, %1
%5 = ashr i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int M_PI;
double cos(int);
float hamming(float x) { return 0.54 - 0.46 * cos(2 * M_PI * x); }


x86 assembly (clang, -O0):
<hamming>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
shl    $0x1,%eax
cvtsi2ss %eax,%xmm0
mulss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%edi
call   1030 <cos@plt>
movsd  0xebd(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb9(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hamming>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%eax
add    %eax,%eax
cvtsi2ss %eax,%xmm1
mulss  %xmm0,%xmm1
cvttss2si %xmm1,%edi
call   1030 <cos@plt>
mulsd  0xecb(%rip),%xmm0
addsd  0xecb(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = global i32 0
define float @hamming(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load i32, i32* @M_PI
%4 = mul nsw i32 2, %3
%5 = sitofp i32 %4 to float
%6 = load float, float* %2
%7 = fmul float %5, %6
%8 = fptosi float %7 to i32
%9 = call double @cos(i32 %8)
%10 = call double @llvm.fmuladd.f64(double -4.600000e-01, double %9, double 5.400000e-01)
%11 = fptrunc double %10 to float
ret float %11
}

LLVM IR (-O2):
@M_PI = global i32 0
define float @hamming(float %0) {
%2 = load i32, i32* @M_PI
%3 = shl nsw i32 %2, 1
%4 = sitofp i32 %3 to float
%5 = fmul float %4, %0
%6 = fptosi float %5 to i32
%7 = tail call double @cos(i32 %6)
%8 = tail call double @llvm.fmuladd.f64(double %7, double -4.600000e-01, double 5.400000e-01)
%9 = fptrunc double %8 to float
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ breakpt();
void func5(void) { breakpt(); }


x86 assembly (clang, -O0):
<func5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <breakpt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func5>:
xor    %eax,%eax
jmp    1030 <breakpt@plt>

LLVM IR (-O0):
define void @func5() {
%1 = call i32 (...) @breakpt()
ret void
}

LLVM IR (-O2):
define void @func5() {
%1 = tail call i32 (...) @breakpt()
ret void
}
int test_imm_7Cint16_mem(short *val) {
  return ((*val) & (0x7C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Cint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x7c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Cint16_mem>:
testb  $0x7c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Cint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 124
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Cint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 124
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct _citrus_iconv {
  int dummy;
};
typedef scalar_t__ iconv_t;

/* Variables and functions */
int /*<<< orphan*/ EBADF;
int /*<<< orphan*/ _citrus_iconv_close(struct _citrus_iconv *);
int /*<<< orphan*/ errno;
int libiconv_close(iconv_t handle) {
  if ((!(handle) || (handle) == (iconv_t)-1)) {
    errno = EBADF;
    return (-1);
  }
  _citrus_iconv_close((struct _citrus_iconv *)(void *)handle);
  return (0);
}


x86 assembly (clang, -O0):
<libiconv_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1132 <libiconv_close+0x22>
cmpq   $0xffffffffffffffff,-0x10(%rbp)
jne    1150 <libiconv_close+0x40>
mov    0x2e9f(%rip),%rax
mov    (%rax),%ecx
mov    0x2e9e(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <libiconv_close+0x50>
mov    -0x10(%rbp),%rdi
call   1030 <_citrus_iconv_close@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libiconv_close>:
push   %rax
lea    0x1(%rdi),%rax
cmp    $0x1,%rax
ja     1134 <libiconv_close+0x24>
mov    0x2eb6(%rip),%rax
mov    (%rax),%eax
mov    0x2eb5(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
pop    %rcx
ret
call   1030 <_citrus_iconv_close@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct._citrus_iconv = type { i32 }
@EBADF = global i32 0
@errno = global i32 0
define i32 @libiconv_close(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i64, i64* %3
%8 = icmp eq i64 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %6, %1
%10 = load i32, i32* @EBADF
store i32 %10, i32* @errno
store i32 -1, i32* %2
br label %16
11: ; preds = %6
%12 = load i64, i64* %3
%13 = inttoptr i64 %12 to i8*
%14 = bitcast i8* %13 to %struct._citrus_iconv*
%15 = call i32 @_citrus_iconv_close(%struct._citrus_iconv* %14)
store i32 0, i32* %2
br label %16
16: ; preds = %11, %9
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
%struct._citrus_iconv = type { i32 }
@EBADF = global i32 0
@errno = global i32 0
define i32 @libiconv_close(i64 %0) {
%2 = add i64 %0, 1
%3 = icmp ult i64 %2, 2
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = load i32, i32* @EBADF
store i32 %5, i32* @errno
br label %9
6: ; preds = %1
%7 = inttoptr i64 %0 to %struct._citrus_iconv*
%8 = tail call i32 @_citrus_iconv_close(%struct._citrus_iconv* %7)
br label %9
9: ; preds = %6, %4
%10 = phi i32 [ -1, %4 ], [ 0, %6 ]
ret i32 %10
}
int get_hash_prime_number(int table_capacity) { return table_capacity; }


x86 assembly (clang, -O0):
<get_hash_prime_number>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_hash_prime_number>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @get_hash_prime_number(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @get_hash_prime_number(i32 returned %0) {
ret i32 %0
}
void pok_kernel_stop(void) {}


x86 assembly (clang, -O0):
<pok_kernel_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pok_kernel_stop>:
ret

LLVM IR (-O0):
define void @pok_kernel_stop() {
ret void
}

LLVM IR (-O2):
define void @pok_kernel_stop() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ op_mul();
void vm_op_mul(void) {
  op_mul();
  return;
}


x86 assembly (clang, -O0):
<vm_op_mul>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <op_mul@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vm_op_mul>:
xor    %eax,%eax
jmp    1030 <op_mul@plt>

LLVM IR (-O0):
define void @vm_op_mul() {
%1 = call i32 (...) @op_mul()
ret void
}

LLVM IR (-O2):
define void @vm_op_mul() {
%1 = tail call i32 (...) @op_mul()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
int /*<<< orphan*/ sem_wait(int /*<<< orphan*/ *);
void *thread_sem(void *arg) {
  sem_t *sem = (sem_t *)arg;
  sem_wait(sem);
  return arg;
}


x86 assembly (clang, -O0):
<thread_sem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <sem_wait@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_sem>:
push   %rbx
mov    %rdi,%rbx
call   1030 <sem_wait@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @thread_sem(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 @sem_wait(i32* %6)
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
define i8* @thread_sem(i8* returned %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @sem_wait(i32* %2)
ret i8* %0
}
/* Variables and functions */
unsigned long SnortStrtoul(char const *, char **, int);
unsigned long SnortStrtoulRange(const char *nptr, char **endptr, int base,
                                unsigned long lo, unsigned long hi) {
  unsigned long iRet = SnortStrtoul(nptr, endptr, base);
  if ((iRet > hi) || (iRet < lo))
    *endptr = (char *)nptr;
  return iRet;
}


x86 assembly (clang, -O0):
<SnortStrtoulRange>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <SnortStrtoul@plt>
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
cmp    -0x28(%rbp),%rax
ja     115b <SnortStrtoulRange+0x4b>
mov    -0x30(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1166 <SnortStrtoulRange+0x56>
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x30(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SnortStrtoulRange>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %r8,%r12
mov    %rcx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <SnortStrtoul@plt>
cmp    %r12,%rax
ja     1133 <SnortStrtoulRange+0x23>
cmp    %r15,%rax
jae    1136 <SnortStrtoulRange+0x26>
mov    %rbx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @SnortStrtoulRange(i8* %0, i8** %1, i32 %2, i64 %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store i8* %0, i8** %6
store i8** %1, i8*** %7
store i32 %2, i32* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%12 = load i8*, i8** %6
%13 = load i8**, i8*** %7
%14 = load i32, i32* %8
%15 = call i64 @SnortStrtoul(i8* %12, i8** %13, i32 %14)
store i64 %15, i64* %11
%16 = load i64, i64* %11
%17 = load i64, i64* %10
%18 = icmp ugt i64 %16, %17
br i1 %18, label %23, label %19
19: ; preds = %5
%20 = load i64, i64* %11
%21 = load i64, i64* %9
%22 = icmp ult i64 %20, %21
br i1 %22, label %23, label %26
23: ; preds = %19, %5
%24 = load i8*, i8** %6
%25 = load i8**, i8*** %7
store i8* %24, i8** %25
br label %26
26: ; preds = %23, %19
%27 = load i64, i64* %11
ret i64 %27
}

LLVM IR (-O2):
define i64 @SnortStrtoulRange(i8* %0, i8** %1, i32 %2, i64 %3, i64 %4) {
%6 = tail call i64 @SnortStrtoul(i8* %0, i8** %1, i32 %2)
%7 = icmp ugt i64 %6, %4
%8 = icmp ult i64 %6, %3
%9 = or i1 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %5
store i8* %0, i8** %1
br label %11
11: ; preds = %5, %10
ret i64 %6
}
/* Variables and functions */
float RAND_MAX;
scalar_t__ rand();
float random_float() { return (float)rand() / RAND_MAX; }


x86 assembly (clang, -O0):
<random_float>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ec1(%rip),%rax
divss  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_float>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ec4(%rip),%rax
divss  (%rax),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global float 0.000000e+00
define float @random_float() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = load float, float* @RAND_MAX
%4 = fdiv float %2, %3
ret float %4
}

LLVM IR (-O2):
@RAND_MAX = global float 0.000000e+00
define float @random_float() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = load float, float* @RAND_MAX
%4 = fdiv float %2, %3
ret float %4
}
int test_and_change_bit(int nr, unsigned long *addr) {
  unsigned long mask = (1UL << ((nr) % (sizeof(unsigned long) * 8)));
  unsigned long *p = addr + ((nr) / (sizeof(unsigned long) * 8));
  unsigned long old = *p;
  *p = old ^ mask;
  return (old & mask) != 0;
}


x86 assembly (clang, -O0):
<test_and_change_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rcx
and    $0x3f,%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
shr    $0x6,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rcx
xor    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
and    -0x18(%rbp),%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_change_bit>:
movslq %edi,%rcx
mov    %rcx,%rax
shr    $0x6,%rax
mov    (%rsi,%rax,8),%rdx
mov    %rdx,%rdi
btc    %rcx,%rdi
mov    %rdi,(%rsi,%rax,8)
xor    %eax,%eax
bt     %rcx,%rdx
setb   %al
ret

LLVM IR (-O0):
define i32 @test_and_change_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i32 %0, i32* %3
store i64* %1, i64** %4
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = urem i64 %9, 64
%11 = shl i64 1, %10
store i64 %11, i64* %5
%12 = load i64*, i64** %4
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = udiv i64 %14, 64
%16 = getelementptr inbounds i64, i64* %12, i64 %15
store i64* %16, i64** %6
%17 = load i64*, i64** %6
%18 = load i64, i64* %17
store i64 %18, i64* %7
%19 = load i64, i64* %7
%20 = load i64, i64* %5
%21 = xor i64 %19, %20
%22 = load i64*, i64** %6
store i64 %21, i64* %22
%23 = load i64, i64* %7
%24 = load i64, i64* %5
%25 = and i64 %23, %24
%26 = icmp ne i64 %25, 0
%27 = zext i1 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @test_and_change_bit(i32 %0, i64* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = and i64 %3, 63
%5 = shl nuw i64 1, %4
%6 = lshr i64 %3, 6
%7 = getelementptr inbounds i64, i64* %1, i64 %6
%8 = load i64, i64* %7
%9 = xor i64 %8, %5
store i64 %9, i64* %7
%10 = and i64 %8, %5
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
size_t list_meter_int8_t(const void *el) { return sizeof(int8_t); }


x86 assembly (clang, -O0):
<list_meter_int8_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_meter_int8_t>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @list_meter_int8_t(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i64 4
}

LLVM IR (-O2):
define i64 @list_meter_int8_t(i8* nocapture readnone %0) {
ret i64 4
}
/* Variables and functions */
int rand();
void fill_array(int array_size, int *input_array) {
  int i = 0;
  for (i = 0; i < array_size; ++i) {
    input_array[i] = rand() % 20;
  }
}


x86 assembly (clang, -O0):
<fill_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1161 <fill_array+0x51>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <fill_array+0x1d>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_array>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1162 <fill_array+0x52>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <fill_array+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @fill_array(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = srem i32 %11, 20
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
store i32 %12, i32* %16
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @fill_array(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, 20
%10 = getelementptr inbounds i32, i32* %1, i64 %7
store i32 %9, i32* %10
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
char *NPP_GetMIMEDescription();
char *NP_GetMIMEDescription(void) { return NPP_GetMIMEDescription(); }


x86 assembly (clang, -O0):
<NP_GetMIMEDescription>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NPP_GetMIMEDescription@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NP_GetMIMEDescription>:
xor    %eax,%eax
jmp    1030 <NPP_GetMIMEDescription@plt>

LLVM IR (-O0):
define i8* @NP_GetMIMEDescription() {
%1 = call i8* (...) @NPP_GetMIMEDescription()
ret i8* %1
}

LLVM IR (-O2):
define i8* @NP_GetMIMEDescription() {
%1 = tail call i8* (...) @NPP_GetMIMEDescription()
ret i8* %1
}
const char *get_file_type(void) { return "WavPack"; }


x86 assembly (clang, -O0):
<get_file_type>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_file_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"WavPack\00"
define i8* @get_file_type() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"WavPack\00"
define i8* @get_file_type() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
int testLib1(void) { return 0; }


x86 assembly (clang, -O0):
<testLib1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testLib1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @testLib1() {
ret i32 0
}

LLVM IR (-O2):
define i32 @testLib1() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DMA0_DriverIRQHandler();
__attribute__((weak)) void DMA0_IRQHandler(void) { DMA0_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<DMA0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DMA0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <DMA0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @DMA0_IRQHandler() {
%1 = call i32 (...) @DMA0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @DMA0_IRQHandler() {
%1 = tail call i32 (...) @DMA0_DriverIRQHandler()
ret void
}
void __propulsion_move_failed_handler(void) {
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<__propulsion_move_failed_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__propulsion_move_failed_handler+0x9>
jmp    110e <__propulsion_move_failed_handler+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__propulsion_move_failed_handler>:
ret

LLVM IR (-O0):
define void @__propulsion_move_failed_handler() {
br label %1
1: ; preds = %0
br label %2
2: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @__propulsion_move_failed_handler() {
ret void
}
const struct typ *typ_function_return_const(const struct typ *t) {
  return typ_function_return(__builtin_choose_expr(
      __builtin_types_compatible_p(__typeof__(t), const struct node *),
      (struct node *)(t),
      __builtin_choose_expr(
          __builtin_types_compatible_p(__typeof__(t), const struct module *),
          (struct module *)(t),
          __builtin_choose_expr(
              __builtin_types_compatible_p(__typeof__(t), const struct typ *),
              (struct typ *)(t),
              __builtin_choose_expr(
                  __builtin_types_compatible_p(__typeof__(t),
                                               const struct toplevel *),
                  (struct toplevel *)(t),
                  __builtin_choose_expr(
                      __builtin_types_compatible_p(__typeof__(t),
                                                   const struct scope *),
                      (struct scope *)(t),
                      __builtin_choose_expr(
                          __builtin_types_compatible_p(__typeof__(t),
                                                       const struct typset *),
                          (struct typset *)(t),
                          __builtin_choose_expr(
                              __builtin_types_compatible_p(
                                  __typeof__(t), const struct constraint *),
                              (struct constraint *)(t),
                              __builtin_choose_expr(
                                  __builtin_types_compatible_p(
                                      __typeof__(t),
                                      const struct vecancestor *),
                                  (struct vecancestor *)(t), (t))))))))));
}


x86 assembly (clang, -O0):
<typ_function_return_const>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <typ_function_return@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<typ_function_return_const>:
push   %rax
xor    %eax,%eax
call   1030 <typ_function_return@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
%struct.typ = type opaque
define %struct.typ* @typ_function_return_const(%struct.typ* %0) {
%2 = alloca %struct.typ*
store %struct.typ* %0, %struct.typ** %2
%3 = load %struct.typ*, %struct.typ** %2
%4 = call i32 (%struct.typ*, ...) bitcast (i32 (...)* @typ_function_return to i32 (%struct.typ*, ...)*)(%struct.typ* %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to %struct.typ*
ret %struct.typ* %6
}

LLVM IR (-O2):
%struct.typ = type opaque
define %struct.typ* @typ_function_return_const(%struct.typ* %0) {
%2 = tail call i32 (%struct.typ*, ...) bitcast (i32 (...)* @typ_function_return to i32 (%struct.typ*, ...)*)(%struct.typ* %0)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to %struct.typ*
ret %struct.typ* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello it's me\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello it's me\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello it's me\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init();
void _M2_pgeif_init(__attribute__((unused)) int argc,
                    __attribute__((unused)) char *argv[]) {
  init();
}


x86 assembly (clang, -O0):
<_M2_pgeif_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_pgeif_init>:
xor    %eax,%eax
jmp    1030 <init@plt>

LLVM IR (-O0):
define void @_M2_pgeif_init(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @init()
ret void
}

LLVM IR (-O2):
define void @_M2_pgeif_init(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ base_set(int /*<<< orphan*/);
void a_base_stop(void) { base_set(0); }


x86 assembly (clang, -O0):
<a_base_stop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <base_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_base_stop>:
xor    %edi,%edi
jmp    1030 <base_set@plt>

LLVM IR (-O0):
define void @a_base_stop() {
%1 = call i32 @base_set(i32 0)
ret void
}

LLVM IR (-O2):
define void @a_base_stop() {
%1 = tail call i32 @base_set(i32 0)
ret void
}
/* Type definitions */
struct acpi_device {
  int dummy;
};

/* Variables and functions */
int ENODEV;
int acpi_video_get_edid(struct acpi_device *device, int type, int device_id,
                        void **edid) {
  return -ENODEV;
}


x86 assembly (clang, -O0):
<acpi_video_get_edid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
xor    %eax,%eax
mov    0x2ec5(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_video_get_edid>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.acpi_device = type { i32 }
@ENODEV = global i32 0
define i32 @acpi_video_get_edid(%struct.acpi_device* %0, i32 %1, i32 %2, i8** %3) {
%5 = alloca %struct.acpi_device*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8**
store %struct.acpi_device* %0, %struct.acpi_device** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8** %3, i8*** %8
%9 = load i32, i32* @ENODEV
%10 = sub nsw i32 0, %9
ret i32 %10
}

LLVM IR (-O2):
%struct.acpi_device = type { i32 }
@ENODEV = global i32 0
define i32 @acpi_video_get_edid(%struct.acpi_device* nocapture readnone %0, i32 %1, i32 %2, i8** nocapture readnone %3) {
%5 = load i32, i32* @ENODEV
%6 = sub nsw i32 0, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ hello();
void foo() { hello(); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hello@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
jmp    1030 <hello@plt>

LLVM IR (-O0):
define void @foo() {
%1 = call i32 (...) @hello()
ret void
}

LLVM IR (-O2):
define void @foo() {
%1 = tail call i32 (...) @hello()
ret void
}
int yyerror(char *mes) { return 0; }


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyerror>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @yyerror(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int syscall(int, int, int /*<<< orphan*/, int /*<<< orphan*/,
            int /*<<< orphan*/, int /*<<< orphan*/);
int port_open(int port_number) {
  int result = syscall(1, port_number, 0, 0, 0, 0);
  return result;
}


x86 assembly (clang, -O0):
<port_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
xor    %r9d,%r9d
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <syscall@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_open>:
mov    %edi,%esi
mov    $0x1,%edi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @port_open(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @syscall(i32 1, i32 %4, i32 0, i32 0, i32 0, i32 0)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @port_open(i32 %0) {
%2 = tail call i32 @syscall(i32 1, i32 %0, i32 0, i32 0, i32 0, i32 0)
ret i32 %2
}
long hash(char *str) {
  unsigned long hash = 5381;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return (hash);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <hash+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <hash+0x2d>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
void nfs_fs_proc_exit(void) {}


x86 assembly (clang, -O0):
<nfs_fs_proc_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfs_fs_proc_exit>:
ret

LLVM IR (-O0):
define void @nfs_fs_proc_exit() {
ret void
}

LLVM IR (-O2):
define void @nfs_fs_proc_exit() {
ret void
}
void rop3_198_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~T;
  stk2 = *D & stk3;
  stk1 = S ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_198_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_198_1_1>:
ret

LLVM IR (-O0):
define void @rop3_198_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = xor i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_198_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
int main(void) {
  int x = 10;
  int *a;
  long *b;
  a = &x;
  b = (long *)a;
  *b;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i64*
store i32 0, i32* %1
store i32 10, i32* %2
store i32* %2, i32** %3
%5 = load i32*, i32** %3
%6 = bitcast i32* %5 to i64*
store i64* %6, i64** %4
%7 = load i64*, i64** %4
%8 = load i64, i64* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}