xunge/DecIR huggingface dataset:
int main() {
  int x = 0x12345678;
  return (*(char *)&x == 0x78);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x12345678,-0x8(%rbp)
movsbl -0x8(%rbp),%eax
cmp    $0x78,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 305419896, i32* %2
%3 = bitcast i32* %2 to i8*
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 120
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
void rop3_35_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = T & stk3;
  stk1 = S | stk2;
  stk1 = ~stk1;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_35_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_35_0_1>:
not    %sil
not    %dl
or     (%rdi),%dl
and    %sil,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_35_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = xor i32 %28, -1
%30 = trunc i32 %29 to i8
store i8 %30, i8* %7
%31 = load i8, i8* %7
%32 = zext i8 %31 to i32
%33 = load i8, i8* %5
%34 = zext i8 %33 to i32
%35 = and i32 %32, %34
%36 = load i8, i8* %7
%37 = zext i8 %36 to i32
%38 = load i8, i8* %6
%39 = zext i8 %38 to i32
%40 = xor i32 %39, -1
%41 = and i32 %37, %40
%42 = or i32 %35, %41
%43 = load i8, i8* %6
%44 = zext i8 %43 to i32
%45 = load i8, i8* %5
%46 = zext i8 %45 to i32
%47 = xor i32 %46, -1
%48 = and i32 %44, %47
%49 = load i8*, i8** %4
%50 = load i8, i8* %49
%51 = zext i8 %50 to i32
%52 = and i32 %48, %51
%53 = or i32 %42, %52
%54 = trunc i32 %53 to i8
%55 = load i8*, i8** %4
store i8 %54, i8* %55
ret void
}

LLVM IR (-O2):
define void @rop3_35_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %1, -1
%6 = xor i8 %2, -1
%7 = or i8 %4, %6
%8 = and i8 %7, %5
store i8 %8, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, int,
                           char const *, char const *);
int /*<<< orphan*/ stderr;
void print_error(const char *str, const char *filename, int lineno,
                 const char *line) {
  fprintf(stderr, "%s:%d: %s:\n%s\n", filename, lineno, str, line);
}


x86 assembly (clang, -O0):
<print_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%r8
mov    -0x20(%rbp),%r9
lea    0xeba(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_error>:
mov    %rcx,%r9
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%r8
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
lea    0xed5(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"%s:%d: %s:\0A%s\0A\00"
define void @print_error(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %5
%13 = load i8*, i8** %8
%14 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %10, i32 %11, i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"%s:%d: %s:\0A%s\0A\00"
define void @print_error(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2, i8* %0, i8* %3)
ret void
}
void clear_bit(int nr, unsigned long *addr) { *addr &= ~(1 << (nr)); }


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
and    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
mov    %edi,%ecx
mov    $0xfffffffe,%eax
rol    %cl,%eax
cltq
and    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = shl i32 1, %5
%7 = xor i32 %6, -1
%8 = sext i32 %7 to i64
%9 = load i64*, i64** %4
%10 = load i64, i64* %9
%11 = and i64 %10, %8
store i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32 %0, i64* nocapture %1) {
%3 = shl nuw i32 1, %0
%4 = xor i32 %3, -1
%5 = sext i32 %4 to i64
%6 = load i64, i64* %1
%7 = and i64 %6, %5
store i64 %7, i64* %1
ret void
}
void output_char(long c) {
  *(long *)(0x100000208) = (long)c;
  return;
}


x86 assembly (clang, -O0):
<output_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
movabs $0x100000208,%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_char>:
movabs $0x100000208,%rax
mov    %rdi,(%rax)
ret

LLVM IR (-O0):
define void @output_char(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
store i64 %3, i64* inttoptr (i64 4294967816 to i64*)
ret void
}

LLVM IR (-O2):
define void @output_char(i64 %0) {
store i64 %0, i64* inttoptr (i64 4294967816 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _delay_us(int);
int /*<<< orphan*/ cal_angle(unsigned int);
int /*<<< orphan*/ motion_direction(int);
int /*<<< orphan*/ speed_control(int /*<<< orphan*/, unsigned int);
void forward_soft_left(unsigned int speed, unsigned int angle) {
  motion_direction(0b00000100);
  speed_control(0, speed);
  cal_angle(angle * 2);
  _delay_us(10);
}


x86 assembly (clang, -O0):
<forward_soft_left>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x4,%edi
call   1040 <motion_direction@plt>
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1060 <speed_control@plt>
mov    -0x8(%rbp),%edi
shl    $0x1,%edi
call   1030 <cal_angle@plt>
mov    $0xa,%edi
call   1050 <_delay_us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forward_soft_left>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x4,%edi
call   1040 <motion_direction@plt>
xor    %edi,%edi
mov    %ebp,%esi
call   1060 <speed_control@plt>
add    %ebx,%ebx
mov    %ebx,%edi
call   1030 <cal_angle@plt>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <_delay_us@plt>

LLVM IR (-O0):
define void @forward_soft_left(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @motion_direction(i32 4)
%6 = load i32, i32* %3
%7 = call i32 @speed_control(i32 0, i32 %6)
%8 = load i32, i32* %4
%9 = mul i32 %8, 2
%10 = call i32 @cal_angle(i32 %9)
%11 = call i32 @_delay_us(i32 10)
ret void
}

LLVM IR (-O2):
define void @forward_soft_left(i32 %0, i32 %1) {
%3 = tail call i32 @motion_direction(i32 4)
%4 = tail call i32 @speed_control(i32 0, i32 %0)
%5 = shl i32 %1, 1
%6 = tail call i32 @cal_angle(i32 %5)
%7 = tail call i32 @_delay_us(i32 10)
ret void
}
/* Variables and functions */
size_t net_get_mac_addr_size() { return 6; }


x86 assembly (clang, -O0):
<net_get_mac_addr_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_get_mac_addr_size>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i64 @net_get_mac_addr_size() {
ret i64 6
}

LLVM IR (-O2):
define i64 @net_get_mac_addr_size() {
ret i64 6
}
/* Variables and functions */
unsigned long __builtin_mfdr(unsigned int);
unsigned long __ocd_read(unsigned int reg) { return __builtin_mfdr(reg); }


x86 assembly (clang, -O0):
<__ocd_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__builtin_mfdr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocd_read>:
jmp    1030 <__builtin_mfdr@plt>

LLVM IR (-O0):
define i64 @__ocd_read(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @__builtin_mfdr(i32 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @__ocd_read(i32 %0) {
%2 = tail call i64 @__builtin_mfdr(i32 %0)
ret i64 %2
}
int lastCharacterLocation(char array[]) {
  int i = 0;
  while (array[i] != '\0') {
    i++;
  }
  return i - 1;
}


x86 assembly (clang, -O0):
<lastCharacterLocation>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <lastCharacterLocation+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <lastCharacterLocation+0xf>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lastCharacterLocation>:
mov    $0xfffffffe,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <lastCharacterLocation+0x10>
ret

LLVM IR (-O0):
define i32 @lastCharacterLocation(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
%17 = sub nsw i32 %16, 1
ret i32 %17
}

LLVM IR (-O2):
define i32 @lastCharacterLocation(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
%10 = add nsw i32 %9, -1
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
int powercap_sysfs_control_type_get_enabled(char const *, scalar_t__ *);
int /*<<< orphan*/ u64_or_verbose(int, int /*<<< orphan*/, char *,
                                  int /*<<< orphan*/, int);
void analyze_control_type(const char *control_type, int verbose) {
  uint32_t val32;
  int ret = powercap_sysfs_control_type_get_enabled(control_type, &val32);
  u64_or_verbose(verbose, 0, "enabled", (uint64_t)val32, ret);
}


x86 assembly (clang, -O0):
<analyze_control_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <powercap_sysfs_control_type_get_enabled@plt>
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    -0x1c(%rbp),%r8d
xor    %esi,%esi
lea    0xeab(%rip),%rdx
call   1030 <u64_or_verbose@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<analyze_control_type>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
lea    0x8(%rsp),%rsi
call   1040 <powercap_sysfs_control_type_get_enabled@plt>
mov    0x8(%rsp),%ecx
lea    0xec4(%rip),%rdx
mov    %ebx,%edi
xor    %esi,%esi
mov    %eax,%r8d
call   1030 <u64_or_verbose@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"enabled\00"
define void @analyze_control_type(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = call i32 @powercap_sysfs_control_type_get_enabled(i8* %7, i64* %5)
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = load i64, i64* %5
%11 = trunc i64 %10 to i32
%12 = load i32, i32* %6
%13 = call i32 @u64_or_verbose(i32 %9, i32 0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"enabled\00"
define void @analyze_control_type(i8* %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i32 @powercap_sysfs_control_type_get_enabled(i8* %0, i64* %3)
%6 = load i64, i64* %3
%7 = trunc i64 %6 to i32
%8 = call i32 @u64_or_verbose(i32 %1, i32 0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %5)
ret void
}
int fndcmt(s)
char *s;
{
  while (*s && (*s != '\n'))
    if ((*s++ == '*') && (*s == '/'))
      return -1;
  return 0;
}


x86 assembly (clang, -O0):
<fndcmt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     112d <fndcmt+0x2d>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    113d <fndcmt+0x3d>
jmp    1179 <fndcmt+0x79>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x2a,%eax
jne    1174 <fndcmt+0x74>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
jne    1174 <fndcmt+0x74>
movl   $0xffffffff,-0x4(%rbp)
jmp    1180 <fndcmt+0x80>
jmp    1108 <fndcmt+0x8>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fndcmt>:
add    $0x1,%rdi
xor    %eax,%eax
jmp    1114 <fndcmt+0x14>
nopl   0x0(%rax,%rax,1)
add    $0x1,%rdi
movzbl -0x1(%rdi),%ecx
test   %cl,%cl
je     1130 <fndcmt+0x30>
cmp    $0xa,%cl
je     1130 <fndcmt+0x30>
cmp    $0x2a,%cl
jne    1110 <fndcmt+0x10>
cmpb   $0x2f,(%rdi)
jne    1110 <fndcmt+0x10>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fndcmt(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %28, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 10
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %29
16: ; preds = %14
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
%19 = load i8, i8* %17
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 42
br i1 %21, label %22, label %28
22: ; preds = %16
%23 = load i8*, i8** %3
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 47
br i1 %26, label %27, label %28
27: ; preds = %22
store i32 -1, i32* %2
br label %30
28: ; preds = %22, %16
br label %4
29: ; preds = %14
store i32 0, i32* %2
br label %30
30: ; preds = %29, %27
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @fndcmt(i8* nocapture %0) {
br label %2
2: ; preds = %11, %1
%3 = phi i8* [ %0, %1 ], [ %6, %11 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %12
i8 10, label %12
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
%7 = icmp eq i8 %4, 42
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i8, i8* %6
%10 = icmp eq i8 %9, 47
br i1 %10, label %12, label %11
11: ; preds = %8, %5
br label %2
12: ; preds = %2, %2, %8
%13 = phi i32 [ -1, %8 ], [ 0, %2 ], [ 0, %2 ]
ret i32 %13
}
equstr(ap1, ap2) char *ap1, *ap2;
{
  char *p1, *p2;
  p1 = ap1;
  p2 = ap2;
  do {
    if (*p1++ != *p2)
      return (0);
  } while (*p2++);
  return (1);
}


x86 assembly (clang, -O0):
<equstr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movsbl (%rax),%eax
mov    -0x28(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1149 <equstr+0x49>
movl   $0x0,-0x4(%rbp)
jmp    116d <equstr+0x6d>
jmp    114e <equstr+0x4e>
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x28(%rbp)
cmpb   $0x0,(%rax)
jne    111c <equstr+0x1c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<equstr>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rdi,%rcx,1),%edx
cmp    (%rsi,%rcx,1),%dl
jne    1126 <equstr+0x26>
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <equstr+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @equstr(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
store i8* %9, i8** %7
br label %10
10: ; preds = %21, %2
%11 = load i8*, i8** %6
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %6
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = load i8*, i8** %7
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %14, %17
br i1 %18, label %19, label %20
19: ; preds = %10
store i32 0, i32* %3
br label %27
20: ; preds = %10
br label %21
21: ; preds = %20
%22 = load i8*, i8** %7
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %7
%24 = load i8, i8* %22
%25 = icmp ne i8 %24, 0
br i1 %25, label %10, label %26
26: ; preds = %21
store i32 1, i32* %3
br label %27
27: ; preds = %26, %19
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @equstr(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %0, %2 ], [ %10, %9 ]
%5 = phi i8* [ %1, %2 ], [ %11, %9 ]
%6 = load i8, i8* %4
%7 = load i8, i8* %5
%8 = icmp eq i8 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = icmp eq i8 %6, 0
br i1 %12, label %13, label %3
13: ; preds = %9, %3
%14 = phi i32 [ 0, %3 ], [ 1, %9 ]
ret i32 %14
}
/* Type definitions */
typedef struct shashset const shashset;

/* Variables and functions */
int /*<<< orphan*/ assert(struct shashset const *);
int /*<<< orphan*/ shashset_deinit(struct shashset const *);
int /*<<< orphan*/ shashset_init_copy(struct shashset const *,
                                      struct shashset const *);
void shashset_assign_copy(struct shashset *s, const struct shashset *src) {
  assert(s);
  assert(src);
  shashset_deinit(s);
  shashset_init_copy(s, src);
}


x86 assembly (clang, -O0):
<shashset_assign_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1050 <shashset_deinit@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <shashset_init_copy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shashset_assign_copy>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %r14,%rdi
call   1030 <assert@plt>
mov    %rbx,%rdi
call   1050 <shashset_deinit@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <shashset_init_copy@plt>

LLVM IR (-O0):
%struct.shashset = type opaque
define void @shashset_assign_copy(%struct.shashset* %0, %struct.shashset* %1) {
%3 = alloca %struct.shashset*
%4 = alloca %struct.shashset*
store %struct.shashset* %0, %struct.shashset** %3
store %struct.shashset* %1, %struct.shashset** %4
%5 = load %struct.shashset*, %struct.shashset** %3
%6 = call i32 @assert(%struct.shashset* %5)
%7 = load %struct.shashset*, %struct.shashset** %4
%8 = call i32 @assert(%struct.shashset* %7)
%9 = load %struct.shashset*, %struct.shashset** %3
%10 = call i32 @shashset_deinit(%struct.shashset* %9)
%11 = load %struct.shashset*, %struct.shashset** %3
%12 = load %struct.shashset*, %struct.shashset** %4
%13 = call i32 @shashset_init_copy(%struct.shashset* %11, %struct.shashset* %12)
ret void
}

LLVM IR (-O2):
%struct.shashset = type opaque
define void @shashset_assign_copy(%struct.shashset* %0, %struct.shashset* %1) {
%3 = tail call i32 @assert(%struct.shashset* %0)
%4 = tail call i32 @assert(%struct.shashset* %1)
%5 = tail call i32 @shashset_deinit(%struct.shashset* %0)
%6 = tail call i32 @shashset_init_copy(%struct.shashset* %0, %struct.shashset* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xx(int, int, char **, char *, int /*<<< orphan*/,
                      int /*<<< orphan*/, int /*<<< orphan*/, int,
                      int /*<<< orphan*/);
void n(int line_no, int n, char *ps[], char *s) {
  xx(line_no, n, ps, s, 0, 0, 0, 1, 0);
}


x86 assembly (clang, -O0):
<n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
xor    %r9d,%r9d
mov    %r9d,%r8d
movl   $0x0,(%rsp)
movl   $0x1,0x8(%rsp)
movl   $0x0,0x10(%rsp)
call   1030 <xx@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<n>:
push   %rax
sub    $0x8,%rsp
xor    %r8d,%r8d
xor    %r9d,%r9d
push   $0x0
push   $0x1
push   $0x0
call   1030 <xx@plt>
add    $0x20,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @n(i32 %0, i32 %1, i8** %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i8**, i8*** %7
%12 = load i8*, i8** %8
%13 = call i32 @xx(i32 %9, i32 %10, i8** %11, i8* %12, i32 0, i32 0, i32 0, i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @n(i32 %0, i32 %1, i8** %2, i8* %3) {
%5 = tail call i32 @xx(i32 %0, i32 %1, i8** %2, i8* %3, i32 0, i32 0, i32 0, i32 1, i32 0)
ret void
}
/* Variables and functions */
double arctan(double);
double arccot(double n) { return 3.14159265358979323846 / 2 - arctan(n); }


x86 assembly (clang, -O0):
<arccot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <arctan@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arccot>:
push   %rax
call   1030 <arctan@plt>
movsd  0xee2(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @arccot(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @arctan(double %3)
%5 = fsub double 0x3FF921FB54442D18, %4
ret double %5
}

LLVM IR (-O2):
define double @arccot(double %0) {
%2 = tail call double @arctan(double %0)
%3 = fsub double 0x3FF921FB54442D18, %2
ret double %3
}
void UARTEnableIrDA(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) &=
      ~(0x00004000 | 0x00000800 | 0x00003000);
  (*((volatile unsigned long *)(ulBase + 0x00000014))) &=
      ~(0x00000020 | 0x00000008);
  (*((volatile unsigned long *)(ulBase + 0x00000014))) |= (0x00000002);
}


x86 assembly (clang, -O0):
<UARTEnableIrDA>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
and    $0xffffffffffff87ff,%rcx
mov    %rcx,0x10(%rax)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rcx
and    $0xffffffffffffffd7,%rcx
mov    %rcx,0x14(%rax)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rcx
or     $0x2,%rcx
mov    %rcx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTEnableIrDA>:
andq   $0xffffffffffff87ff,0x10(%rdi)
ff
andq   $0xffffffffffffffd7,0x14(%rdi)
orq    $0x2,0x14(%rdi)
ret

LLVM IR (-O0):
define void @UARTEnableIrDA(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 16
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -30721
store volatile i64 %7, i64* %5
%8 = load i64, i64* %2
%9 = add i64 %8, 20
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = and i64 %11, -41
store volatile i64 %12, i64* %10
%13 = load i64, i64* %2
%14 = add i64 %13, 20
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = or i64 %16, 2
store volatile i64 %17, i64* %15
ret void
}

LLVM IR (-O2):
define void @UARTEnableIrDA(i64 %0) {
%2 = add i64 %0, 16
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, -30721
store volatile i64 %5, i64* %3
%6 = add i64 %0, 20
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -41
store volatile i64 %9, i64* %7
%10 = load volatile i64, i64* %7
%11 = or i64 %10, 2
store volatile i64 %11, i64* %7
ret void
}
int main(int argc, char *argv[]) {
  int x;
  switch (argc) {
  case 0:
    x = (int)argv[0][0];
    break;
  case 1:
    x = (int)argv[1][1];
    break;
  default:
    x = (int)argv[2][2];
    break;
  }
  return argc;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
test   %eax,%eax
je     1136 <main+0x36>
jmp    1125 <main+0x25>
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
je     1148 <main+0x48>
jmp    115c <main+0x5c>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
jmp    116b <main+0x6b>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
movsbl 0x1(%rax),%eax
mov    %eax,-0x14(%rbp)
jmp    116b <main+0x6b>
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rax
movsbl 0x2(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
switch i32 %7, label %22 [
i32 0, label %8
i32 1, label %15
]
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
store i32 %14, i32* %6
br label %29
15: ; preds = %2
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i64 1
%18 = load i8*, i8** %17
%19 = getelementptr inbounds i8, i8* %18, i64 1
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
store i32 %21, i32* %6
br label %29
22: ; preds = %2
%23 = load i8**, i8*** %5
%24 = getelementptr inbounds i8*, i8** %23, i64 2
%25 = load i8*, i8** %24
%26 = getelementptr inbounds i8, i8* %25, i64 2
%27 = load i8, i8* %26
%28 = sext i8 %27 to i32
store i32 %28, i32* %6
br label %29
29: ; preds = %22, %15, %8
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @main(i32 returned %0, i8** nocapture readnone %1) {
ret i32 %0
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *_strdup(const char *str) {
  char *dup = malloc(strlen(str) + 1);
  if (dup) {
    strcpy(dup, str);
  }
  return dup;
}


x86 assembly (clang, -O0):
<_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <_strdup+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <_strdup+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
br label %14
14: ; preds = %10, %1
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @_strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %4, i8* %0)
br label %8
8: ; preds = %6, %1
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int bot_randf();
int bot_irand(int bound) {
  int v = (int)(bot_randf() * bound);
  assert(v >= 0);
  assert(v < bound);
  return v;
}


x86 assembly (clang, -O0):
<bot_irand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <bot_randf@plt>
imul   -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bot_irand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <bot_randf@plt>
mov    %eax,%ebp
imul   %ebx,%ebp
mov    %ebp,%edi
not    %edi
shr    $0x1f,%edi
call   1030 <assert@plt>
xor    %edi,%edi
cmp    %ebx,%ebp
setl   %dil
call   1030 <assert@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bot_irand(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @bot_randf()
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i32, i32* %3
%12 = load i32, i32* %2
%13 = icmp slt i32 %11, %12
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bot_irand(i32 %0) {
%2 = tail call i32 (...) @bot_randf()
%3 = mul nsw i32 %2, %0
%4 = xor i32 %3, -1
%5 = lshr i32 %4, 31
%6 = tail call i32 @assert(i32 %5)
%7 = icmp slt i32 %3, %0
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
ret i32 %3
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *dwb_strdup(char *s) {
  char *p = malloc(strlen(s) + 1);
  strcpy(p, s);
  return p;
}


x86 assembly (clang, -O0):
<dwb_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dwb_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @dwb_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @dwb_strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
/* Type definitions */
struct timeval {
  int tv_sec;
  long tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long test_time(void) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return tv.tv_sec * 1000 + tv.tv_usec;
}


x86 assembly (clang, -O0):
<test_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x10(%rbp),%eax
cltq
add    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_time>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq 0x8(%rsp),%rax
imul   $0x3e8,%rax,%rax
add    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i64 @test_time() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i64, i64* %7
%9 = add nsw i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i64 @test_time() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load i64, i64* %8
%10 = add nsw i64 %9, %7
ret i64 %10
}
void ff_hevc_put_hevc_pel_pixels64_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_pel_pixels64_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_pel_pixels64_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_pel_pixels64_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_pel_pixels64_12_sse4() {
ret void
}
int returnMinTens(int timeCode) { return (timeCode / 10) % 10; }


x86 assembly (clang, -O0):
<returnMinTens>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<returnMinTens>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @returnMinTens(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 10
%5 = srem i32 %4, 10
ret i32 %5
}

LLVM IR (-O2):
define i32 @returnMinTens(i32 %0) {
%2 = sdiv i32 %0, 10
%3 = srem i32 %2, 10
ret i32 %3
}
/* Type definitions */
typedef char *uint32_t;

/* Variables and functions */
uint32_t get_cr4() {
  uint32_t v;
  asm volatile("mov %%"
               "cr4"
               ", %0"
               : "=r"(v));
  return v;
}


x86 assembly (clang, -O0):
<get_cr4>:
push   %rbp
mov    %rsp,%rbp
mov    %cr4,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cr4>:
mov    %cr4,%rax
ret

LLVM IR (-O0):
define i8* @get_cr4() {
%1 = alloca i8*
%2 = call i8* asm sideeffect "mov %cr4, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @get_cr4() {
%1 = tail call i8* asm sideeffect "mov %cr4, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
void HibernateRequest(void) {
  (*((volatile unsigned long *)(0x400FC010))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<HibernateRequest>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x400fc010,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRequest>:
orq    $0x2,0x400fc010
40 02
ret

LLVM IR (-O0):
define void @HibernateRequest() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = or i64 %1, 2
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
ret void
}

LLVM IR (-O2):
define void @HibernateRequest() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = or i64 %1, 2
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
ret void
}
void(outsw)(int port, void const *addr, unsigned long count) {
  {
    ;
    return;
  }
}


x86 assembly (clang, -O0):
<outsw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsw>:
ret

LLVM IR (-O0):
define void @outsw(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
define void @outsw(i32 %0, i8* nocapture %1, i64 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateBatCheckStart(void) {
  (*((volatile unsigned long *)(0x400FC010))) |= 0x00000400;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateBatCheckStart>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%rcx
or     $0x400,%rcx
mov    $0x400fc010,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateBatCheckStart>:
orq    $0x400,0x400fc010
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateBatCheckStart() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = or i64 %1, 1024
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
%3 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateBatCheckStart() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = or i64 %1, 1024
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
%3 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
void gtk_tree_view_get_cell_area() {}


x86 assembly (clang, -O0):
<gtk_tree_view_get_cell_area>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_get_cell_area>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_get_cell_area() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_get_cell_area() {
ret void
}
void ComparatorRefSet(unsigned long ulBase, unsigned long ulRef) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = ulRef;
}


x86 assembly (clang, -O0):
<ComparatorRefSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ComparatorRefSet>:
mov    %rsi,0x10(%rdi)
ret

LLVM IR (-O0):
define void @ComparatorRefSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 16
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @ComparatorRefSet(i64 %0, i64 %1) {
%3 = add i64 %0, 16
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
void glMultiTexCoord4f(void) { return; }


x86 assembly (clang, -O0):
<glMultiTexCoord4f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glMultiTexCoord4f>:
ret

LLVM IR (-O0):
define void @glMultiTexCoord4f() {
ret void
}

LLVM IR (-O2):
define void @glMultiTexCoord4f() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void PWMFaultIntClear(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x0000001C))) = 0x00010000;
}


x86 assembly (clang, -O0):
<PWMFaultIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x10000,0x1c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMFaultIntClear>:
movq   $0x10000,0x1c(%rdi)
ret

LLVM IR (-O0):
define void @PWMFaultIntClear(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 28
%5 = inttoptr i64 %4 to i64*
store volatile i64 65536, i64* %5
ret void
}

LLVM IR (-O2):
define void @PWMFaultIntClear(i64 %0) {
%2 = add nsw i64 %0, 28
%3 = inttoptr i64 %2 to i64*
store volatile i64 65536, i64* %3
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int64_t nside2npix64(int64_t nside) { return 12 * nside * nside; }


x86 assembly (clang, -O0):
<nside2npix64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0xc,-0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nside2npix64>:
imul   %edi,%edi
shl    $0x2,%edi
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @nside2npix64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 12, %3
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @nside2npix64(i32 %0) {
%2 = mul nsw i32 %0, 12
%3 = mul nsw i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int be_seeing_you();
int main(int argc, char **argv) { return be_seeing_you() == 6 ? 0 : 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <be_seeing_you@plt>
mov    %eax,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x6,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <be_seeing_you@plt>
xor    %ecx,%ecx
cmp    $0x6,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @be_seeing_you()
%7 = icmp eq i32 %6, 6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @be_seeing_you()
%4 = icmp ne i32 %3, 6
%5 = zext i1 %4 to i32
ret i32 %5
}
int sum(int first, int second) { return first + second; }


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @sum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @sum(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int killpg(int pgrp, int signal) { return -1; }


x86 assembly (clang, -O0):
<killpg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<killpg>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @killpg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @killpg(i32 %0, i32 %1) {
ret i32 -1
}
/* Variables and functions */
scalar_t__ mock(char *);
char *cf_s_outrfc_mail(char *s) { return (char *)mock(s); }


x86 assembly (clang, -O0):
<cf_s_outrfc_mail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cf_s_outrfc_mail>:
jmp    1030 <mock@plt>

LLVM IR (-O0):
define i8* @cf_s_outrfc_mail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @mock(i8* %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @cf_s_outrfc_mail(i8* %0) {
%2 = tail call i64 @mock(i8* %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
char *numeric_arabic_to_roman(long int number) { return 0; }


x86 assembly (clang, -O0):
<numeric_arabic_to_roman>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeric_arabic_to_roman>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @numeric_arabic_to_roman(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @numeric_arabic_to_roman(i64 %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ foo();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("This is main!\n");
  bar();
  foo();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <bar@plt>
mov    $0x0,%al
call   1050 <foo@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <bar@plt>
xor    %eax,%eax
call   1050 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"This is main!\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @bar()
%3 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"This is main!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @bar()
%3 = tail call i32 (...) @foo()
ret i32 0
}