xunge/DecIR huggingface dataset:
wr_long(fd, l) long l;
{
  char buf[4];
  {
    register long x = (l);
    (((buf)[0] = ((int)x)), ((buf)[1] = ((int)x) >> 8));
    ((((buf) + 2)[0] = ((int)(x >> 16))),
     (((buf) + 2)[1] = ((int)(x >> 16)) >> 8));
  };
  wr_bytes(fd, buf, 4L);
}


x86 assembly (clang, -O0):
<wr_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %al,-0x14(%rbp)
mov    -0x20(%rbp),%rax
sar    $0x8,%eax
mov    %al,-0x13(%rbp)
mov    -0x20(%rbp),%rax
sar    $0x10,%rax
mov    %al,-0x12(%rbp)
mov    -0x20(%rbp),%rax
sar    $0x10,%rax
sar    $0x8,%eax
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x14(%rbp),%rsi
mov    $0x4,%edx
mov    $0x0,%al
call   1030 <wr_bytes@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wr_long>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
xor    %eax,%eax
call   1030 <wr_bytes@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wr_long(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca [4 x i8]
%7 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
%8 = load i64, i64* %5
store i64 %8, i64* %7
%9 = load i64, i64* %7
%10 = trunc i64 %9 to i32
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 0
store i8 %11, i8* %12
%13 = load i64, i64* %7
%14 = trunc i64 %13 to i32
%15 = ashr i32 %14, 8
%16 = trunc i32 %15 to i8
%17 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 1
store i8 %16, i8* %17
%18 = load i64, i64* %7
%19 = ashr i64 %18, 16
%20 = trunc i64 %19 to i32
%21 = trunc i32 %20 to i8
%22 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 0
%23 = getelementptr inbounds i8, i8* %22, i64 2
%24 = getelementptr inbounds i8, i8* %23, i64 0
store i8 %21, i8* %24
%25 = load i64, i64* %7
%26 = ashr i64 %25, 16
%27 = trunc i64 %26 to i32
%28 = ashr i32 %27, 8
%29 = trunc i32 %28 to i8
%30 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 0
%31 = getelementptr inbounds i8, i8* %30, i64 2
%32 = getelementptr inbounds i8, i8* %31, i64 1
store i8 %29, i8* %32
%33 = load i32, i32* %4
%34 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 0
%35 = call i32 (i32, i8*, i64, ...) bitcast (i32 (...)* @wr_bytes to i32 (i32, i8*, i64, ...)*)(i32 %33, i8* %34, i64 4)
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
define i32 @wr_long(i32 %0, i64 %1) {
%3 = alloca [4 x i8]
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = trunc i64 %1 to i8
store i8 %5, i8* %4
%6 = lshr i64 %1, 8
%7 = trunc i64 %6 to i8
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 1
store i8 %7, i8* %8
%9 = lshr i64 %1, 16
%10 = trunc i64 %9 to i8
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 2
store i8 %10, i8* %11
%12 = lshr i64 %1, 24
%13 = trunc i64 %12 to i8
%14 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 3
store i8 %13, i8* %14
%15 = call i32 (i32, i8*, i64, ...) bitcast (i32 (...)* @wr_bytes to i32 (i32, i8*, i64, ...)*)(i32 %0, i8* %4, i64 4)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ __ptr_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __munmap(__ptr_t addr, size_t len) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__munmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__munmap>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @__munmap(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @__munmap(i32 %0, i64 %1) {
%3 = load i32, i32* @ENOSYS
%4 = tail call i32 @__set_errno(i32 %3)
ret i32 -1
}
/* Variables and functions */
int tt_runtests(int, char **);
int main(int argc, char **argv) { return tt_runtests(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <tt_runtests@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <tt_runtests@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @tt_runtests(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @tt_runtests(i32 %0, i8** %1)
ret i32 %3
}
void testFunc4() {}


x86 assembly (clang, -O0):
<testFunc4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testFunc4>:
ret

LLVM IR (-O0):
define void @testFunc4() {
ret void
}

LLVM IR (-O2):
define void @testFunc4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SHUT_WR;
int /*<<< orphan*/ shutdown(int, int /*<<< orphan*/);
void shutdownSocket(int sockfd) { shutdown(sockfd, SHUT_WR); }


x86 assembly (clang, -O0):
<shutdownSocket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdownSocket>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <shutdown@plt>

LLVM IR (-O0):
@SHUT_WR = global i32 0
define void @shutdownSocket(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SHUT_WR
%5 = call i32 @shutdown(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@SHUT_WR = global i32 0
define void @shutdownSocket(i32 %0) {
%2 = load i32, i32* @SHUT_WR
%3 = tail call i32 @shutdown(i32 %0, i32 %2)
ret void
}
void PI_shutdown(void) {}


x86 assembly (clang, -O0):
<PI_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PI_shutdown>:
ret

LLVM IR (-O0):
define void @PI_shutdown() {
ret void
}

LLVM IR (-O2):
define void @PI_shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DrawBMP224(unsigned long, unsigned long, unsigned long,
                              unsigned long);
void drawbmp(unsigned long xd, unsigned long yd, unsigned long wd,
             unsigned long hd) {
  DrawBMP224(xd, yd, wd, hd);
}


x86 assembly (clang, -O0):
<drawbmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <DrawBMP224@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawbmp>:
jmp    1030 <DrawBMP224@plt>

LLVM IR (-O0):
define void @drawbmp(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @DrawBMP224(i64 %9, i64 %10, i64 %11, i64 %12)
ret void
}

LLVM IR (-O2):
define void @drawbmp(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i32 @DrawBMP224(i64 %0, i64 %1, i64 %2, i64 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scuGatePeripheralClock(int);
unsigned int adcDisable(void) {
  (*((volatile unsigned int *const)(0x48030000 + 0x000))) = (1 << 0);
  (*((volatile unsigned int *const)(0x48034000 + 0x040))) =
      (1 << 15) | (1 << 12);
  scuGatePeripheralClock((1 << 0));
  return 0;
}


x86 assembly (clang, -O0):
<adcDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x48030000,%eax
movl   $0x1,(%rax)
mov    $0x48034040,%eax
movl   $0x9000,(%rax)
mov    $0x1,%edi
call   1030 <scuGatePeripheralClock@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adcDisable>:
push   %rax
movl   $0x1,0x48030000
movl   $0x9000,0x48034040
mov    $0x1,%edi
call   1030 <scuGatePeripheralClock@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @adcDisable() {
store volatile i32 1, i32* inttoptr (i64 1208156160 to i32*)
store volatile i32 36864, i32* inttoptr (i64 1208172608 to i32*)
%1 = call i32 @scuGatePeripheralClock(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @adcDisable() {
store volatile i32 1, i32* inttoptr (i64 1208156160 to i32*)
store volatile i32 36864, i32* inttoptr (i64 1208172608 to i32*)
%1 = tail call i32 @scuGatePeripheralClock(i32 1)
ret i32 0
}
double radius_from_min_dimension(double radius_equat_minor,
                                 double radius_equat_major,
                                 double radius_polar) {
  const double rad_equat_min =
      (radius_equat_minor < radius_equat_major ? radius_equat_minor
                                               : radius_equat_major);
  return (rad_equat_min < radius_polar ? rad_equat_min : radius_polar);
}


x86 assembly (clang, -O0):
<radius_from_min_dimension>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1136 <radius_from_min_dimension+0x36>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    1140 <radius_from_min_dimension+0x40>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    116d <radius_from_min_dimension+0x6d>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
jmp    1177 <radius_from_min_dimension+0x77>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radius_from_min_dimension>:
minsd  %xmm1,%xmm0
minsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @radius_from_min_dimension(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
%9 = load double, double* %5
%10 = fcmp olt double %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load double, double* %4
br label %15
13: ; preds = %3
%14 = load double, double* %5
br label %15
15: ; preds = %13, %11
%16 = phi double [ %12, %11 ], [ %14, %13 ]
store double %16, double* %7
%17 = load double, double* %7
%18 = load double, double* %6
%19 = fcmp olt double %17, %18
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load double, double* %7
br label %24
22: ; preds = %15
%23 = load double, double* %6
br label %24
24: ; preds = %22, %20
%25 = phi double [ %21, %20 ], [ %23, %22 ]
ret double %25
}

LLVM IR (-O2):
define double @radius_from_min_dimension(double %0, double %1, double %2) {
%4 = fcmp olt double %0, %1
%5 = select i1 %4, double %0, double %1
%6 = fcmp olt double %5, %2
%7 = select i1 %6, double %5, double %2
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int slozhenie(int, int);
int umnozhenie(int, int);
int main() {
  printf("%d", umnozhenie(2, 3));
  printf("\n%d\n", slozhenie(2, 3));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <umnozhenie@plt>
mov    %eax,%esi
lea    0xea9(%rip),%rdi
call   1050 <printf@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <slozhenie@plt>
mov    %eax,%esi
lea    0xe8f(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <umnozhenie@plt>
lea    0xeb9(%rip),%rdi
mov    %eax,%esi
call   1050 <printf@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <slozhenie@plt>
lea    0xe9f(%rip),%rdi
mov    %eax,%esi
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [5 x i8] c"\0A%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @umnozhenie(i32 2, i32 3)
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 @slozhenie(i32 2, i32 3)
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [5 x i8] c"\0A%d\0A\00"
define i32 @main() {
%1 = tail call i32 @umnozhenie(i32 2, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @slozhenie(i32 2, i32 3)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
void LCDIDDCommandWrite(uint32_t ui32Base, uint32_t ui32CS, uint16_t ui16Cmd) {
  uint32_t ui32Reg;
  ;
  ;
  ui32Reg = ui32CS ? 0x00000020 : 0x00000014;
  (*((volatile uint32_t *)(ui32Base + ui32Reg))) = ui16Cmd;
}


x86 assembly (clang, -O0):
<LCDIDDCommandWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%edx
mov    $0x14,%eax
mov    $0x20,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIDDCommandWrite>:
test   %esi,%esi
mov    $0x14,%eax
mov    $0x20,%ecx
cmove  %eax,%ecx
movslq %edi,%rax
mov    %edx,(%rcx,%rax,1)
ret

LLVM IR (-O0):
define void @LCDIDDCommandWrite(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 32, i32 20
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = load i32, i32* %4
%14 = load i32, i32* %7
%15 = add nsw i32 %13, %14
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
store volatile i32 %12, i32* %17
ret void
}

LLVM IR (-O2):
define void @LCDIDDCommandWrite(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i32 20, i32 32
%6 = add nsw i32 %5, %0
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %2, i32* %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct nl_session {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ task_req(int, struct nl_session *, char);
uint64_t get_process_ctxt_switches(int pid, struct nl_session *nls) {
  return task_req(pid, nls, 's');
}


x86 assembly (clang, -O0):
<get_process_ctxt_switches>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x73,%edx
call   1030 <task_req@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_process_ctxt_switches>:
mov    $0x73,%edx
jmp    1030 <task_req@plt>

LLVM IR (-O0):
%struct.nl_session = type { i32 }
define i32 @get_process_ctxt_switches(i32 %0, %struct.nl_session* %1) {
%3 = alloca i32
%4 = alloca %struct.nl_session*
store i32 %0, i32* %3
store %struct.nl_session* %1, %struct.nl_session** %4
%5 = load i32, i32* %3
%6 = load %struct.nl_session*, %struct.nl_session** %4
%7 = call i32 @task_req(i32 %5, %struct.nl_session* %6, i8 signext 115)
ret i32 %7
}

LLVM IR (-O2):
%struct.nl_session = type { i32 }
define i32 @get_process_ctxt_switches(i32 %0, %struct.nl_session* %1) {
%3 = tail call i32 @task_req(i32 %0, %struct.nl_session* %1, i8 signext 115)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ xsi_register_didat(char *, char *);
extern void work_a_1402089428_0632001823_init() {
  xsi_register_didat(
      "work_a_1402089428_0632001823",
      "isim/RPN_toplevel_isim_par.exe.sim/work/a_1402089428_0632001823.didat");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xefb(%rip),%rsi
call   1030 <xsi_register_didat@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
lea    0xee9(%rip),%rdi
lea    0xeff(%rip),%rsi
jmp    1030 <xsi_register_didat@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"work_a_1402089428_0632001823\00"
@.str.1 = [70 x i8] c"isim/RPN_toplevel_isim_par.exe.sim/work/a_1402089428_0632001823.didat\00"
define void @work_a_1402089428_0632001823_init() {
%1 = call i32 @xsi_register_didat(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"work_a_1402089428_0632001823\00"
@.str.1 = [70 x i8] c"isim/RPN_toplevel_isim_par.exe.sim/work/a_1402089428_0632001823.didat\00"
define void @work_a_1402089428_0632001823_init() {
%1 = tail call i32 @xsi_register_didat(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str.1, i64 0, i64 0))
ret void
}
mymseq(num) int num;
{
  prtime();
  printf("SeqNr %d\n", num);
}


x86 assembly (clang, -O0):
<mymseq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <prtime@plt>
mov    -0x8(%rbp),%esi
lea    0xec4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mymseq>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <prtime@plt>
lea    0xecf(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"SeqNr %d\0A\00"
define i32 @mymseq(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @prtime()
%5 = load i32, i32* %3
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
@.str = [10 x i8] c"SeqNr %d\0A\00"
define i32 @mymseq(i32 %0) {
%2 = tail call i32 (...) @prtime()
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 undef
}
/* Variables and functions */
int S_IRUSR;
int S_IWUSR;
int __gen_tempname(char *, int, int /*<<< orphan*/, int);
int mkstemp64(char *template) {
  return __gen_tempname(template, 1, 0, S_IRUSR | S_IWUSR);
}


x86 assembly (clang, -O0):
<mkstemp64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb8(%rip),%rax
or     (%rax),%ecx
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <__gen_tempname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkstemp64>:
mov    0x2ec1(%rip),%rax
mov    0x2eca(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
mov    $0x1,%esi
xor    %edx,%edx
jmp    1030 <__gen_tempname@plt>

LLVM IR (-O0):
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
define i32 @mkstemp64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @S_IRUSR
%5 = load i32, i32* @S_IWUSR
%6 = or i32 %4, %5
%7 = call i32 @__gen_tempname(i8* %3, i32 1, i32 0, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
define i32 @mkstemp64(i8* %0) {
%2 = load i32, i32* @S_IRUSR
%3 = load i32, i32* @S_IWUSR
%4 = or i32 %3, %2
%5 = tail call i32 @__gen_tempname(i8* %0, i32 1, i32 0, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
void interrupt_process(short arg) {
  printf("sigint process...\n");
  sleep(4);
}


x86 assembly (clang, -O0):
<interrupt_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x4,%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_process>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x4,%edi
pop    %rax
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"sigint process...\0A\00"
define void @interrupt_process(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @sleep(i32 4)
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c"sigint process...\00"
define void @interrupt_process(i16 signext %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @sleep(i32 4)
ret void
}
int __gesf2(float a __attribute__((unused)), float b __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<__gesf2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gesf2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__gesf2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @__gesf2(float %0, float %1) {
ret i32 0
}
/* Variables and functions */
int partition(int *, int, int);
void quick_sort(int array[], int start, int end) {
  int pivot;
  if (start < end) {
    pivot = partition(array, start, end);
    quick_sort(array, start, pivot - 1);
    quick_sort(array, pivot + 1, end);
  }
  return;
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quick_sort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
int test_imm_A4int16_mem(short *val) {
  return ((*val) & (-0xA4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A4int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff5c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A4int16_mem>:
movzwl (%rdi),%eax
test   $0xff5c,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A4int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -164
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A4int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -164
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void err_dump(char *mess) { die(mess); }


x86 assembly (clang, -O0):
<err_dump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<err_dump>:
jmp    1030 <die@plt>

LLVM IR (-O0):
define void @err_dump(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @die(i8* %3)
ret void
}

LLVM IR (-O2):
define void @err_dump(i8* %0) {
%2 = tail call i32 @die(i8* %0)
ret void
}
long long fact(long long x) {
  if (x > 1)
    return x * fact(x - 1);
  else
    return 1;
}


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jle    1150 <fact+0x40>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fact@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1158 <fact+0x48>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
mov    $0x1,%eax
cmp    $0x2,%rdi
jl     1121 <fact+0x21>
mov    $0x1,%eax
imul   %rdi,%rax
lea    -0x1(%rdi),%rcx
cmp    $0x2,%rdi
mov    %rcx,%rdi
ja     1110 <fact+0x10>
ret

LLVM IR (-O0):
define i64 @fact(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp sgt i64 %4, 1
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i64, i64* %3
%8 = load i64, i64* %3
%9 = sub nsw i64 %8, 1
%10 = call i64 @fact(i64 %9)
%11 = mul nsw i64 %7, %10
store i64 %11, i64* %2
br label %13
12: ; preds = %1
store i64 1, i64* %2
br label %13
13: ; preds = %12, %6
%14 = load i64, i64* %2
ret i64 %14
}

LLVM IR (-O2):
define i64 @fact(i64 %0) {
%2 = icmp sgt i64 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i64 [ %6, %3 ], [ %0, %1 ]
%5 = phi i64 [ %7, %3 ], [ 1, %1 ]
%6 = add nsw i64 %4, -1
%7 = mul nsw i64 %4, %5
%8 = icmp ugt i64 %4, 2
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i64 [ 1, %1 ], [ %7, %3 ]
ret i64 %10
}
int ILibWrapper_WebRTC_ConnectionFactory_Bucketizer(int index) {
  return (index & (16 - 1));
}


x86 assembly (clang, -O0):
<ILibWrapper_WebRTC_ConnectionFactory_Bucketizer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ILibWrapper_WebRTC_ConnectionFactory_Bucketizer>:
mov    %edi,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @ILibWrapper_WebRTC_ConnectionFactory_Bucketizer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
ret i32 %4
}

LLVM IR (-O2):
define i32 @ILibWrapper_WebRTC_ConnectionFactory_Bucketizer(i32 %0) {
%2 = and i32 %0, 15
ret i32 %2
}
/* Variables and functions */
void *malloc(size_t);
void *memcpy(void *, void *, size_t);
int /*<<< orphan*/ oom_killer();
void *xmemdup(void *p, size_t s) {
  void *ptr = malloc(s);
  if (!ptr)
    oom_killer();
  return memcpy(ptr, p, s);
}


x86 assembly (clang, -O0):
<xmemdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115f <xmemdup+0x2f>
mov    $0x0,%al
call   1050 <oom_killer@plt>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmemdup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1152 <xmemdup+0x22>
xor    %eax,%eax
call   1050 <oom_killer@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define i8* @xmemdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = call i32 (...) @oom_killer()
br label %12
12: ; preds = %10, %2
%13 = load i8*, i8** %5
%14 = load i8*, i8** %3
%15 = load i64, i64* %4
%16 = call i8* @memcpy(i8* %13, i8* %14, i64 %15)
ret i8* %16
}

LLVM IR (-O2):
define noalias i8* @xmemdup(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @malloc(i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @oom_killer()
br label %7
7: ; preds = %5, %2
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %3, i8* align 1 %0, i64 %1, i1 false)
ret i8* %3
}
int get_fixed_point_scale_factor(int other_size, int this_size) {
  return (other_size << 14) / this_size;
}


x86 assembly (clang, -O0):
<get_fixed_point_scale_factor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xe,%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fixed_point_scale_factor>:
mov    %edi,%eax
shl    $0xe,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @get_fixed_point_scale_factor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 14
%7 = load i32, i32* %4
%8 = sdiv i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_fixed_point_scale_factor(i32 %0, i32 %1) {
%3 = shl i32 %0, 14
%4 = sdiv i32 %3, %1
ret i32 %4
}
/* Variables and functions */
int f2(int);
int f1(int foo) { return f2(foo); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
jmp    1030 <f2@plt>

LLVM IR (-O0):
define i32 @f1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f2(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f1(i32 %0) {
%2 = tail call i32 @f2(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ complement_nuc(char *);
int /*<<< orphan*/ reverse(char *);
void revcomp_nuc(char *seq) {
  complement_nuc(seq);
  reverse(seq);
}


x86 assembly (clang, -O0):
<revcomp_nuc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <complement_nuc@plt>
mov    -0x8(%rbp),%rdi
call   1030 <reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<revcomp_nuc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <complement_nuc@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define void @revcomp_nuc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @complement_nuc(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @reverse(i8* %5)
ret void
}

LLVM IR (-O2):
define void @revcomp_nuc(i8* %0) {
%2 = tail call i32 @complement_nuc(i8* %0)
%3 = tail call i32 @reverse(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xc4() {
  Assert_real((isdigit(196) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              985, ("isdigit should be 0 for 0xc4"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xc4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc4,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3d9,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xc4>:
push   %rax
mov    $0xc4,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3d9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xc4\00"
define void @t_isdigit_0xc4() {
%1 = call i64 @isdigit(i32 196)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 985, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xc4\00"
define void @t_isdigit_0xc4() {
%1 = tail call i64 @isdigit(i32 196)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 985, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void set_opponent_time(const char *centiseconds) {}


x86 assembly (clang, -O0):
<set_opponent_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_opponent_time>:
ret

LLVM IR (-O0):
define void @set_opponent_time(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @set_opponent_time(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_stmt;

/* Variables and functions */
int /*<<< orphan*/ *sql_prepare(char *);
char *sql_step_single_row(int /*<<< orphan*/ *);
char *random_quote(void) {
  sqlite3_stmt *stmt =
      sql_prepare("SELECT quote FROM quotes ORDER BY random() LIMIT 1");
  if (!stmt)
    return NULL;
  return sql_step_single_row(stmt);
}


x86 assembly (clang, -O0):
<random_quote>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <sql_prepare@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <random_quote+0x30>
movq   $0x0,-0x8(%rbp)
jmp    115d <random_quote+0x3d>
mov    -0x10(%rbp),%rdi
call   1040 <sql_step_single_row@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_quote>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <sql_prepare@plt>
test   %rax,%rax
je     113b <random_quote+0x1b>
mov    %rax,%rdi
pop    %rax
jmp    1040 <sql_step_single_row@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [51 x i8] c"SELECT quote FROM quotes ORDER BY random() LIMIT 1\00"
define i8* @random_quote() {
%1 = alloca i8*
%2 = alloca i32*
%3 = call i32* @sql_prepare(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %7, label %6
6: ; preds = %0
store i8* null, i8** %1
br label %10
7: ; preds = %0
%8 = load i32*, i32** %2
%9 = call i8* @sql_step_single_row(i32* %8)
store i8* %9, i8** %1
br label %10
10: ; preds = %7, %6
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
@.str = [51 x i8] c"SELECT quote FROM quotes ORDER BY random() LIMIT 1\00"
define i8* @random_quote() {
%1 = tail call i32* @sql_prepare(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i8* @sql_step_single_row(i32* %1)
br label %5
5: ; preds = %0, %3
%6 = phi i8* [ %4, %3 ], [ null, %0 ]
ret i8* %6
}
/* Type definitions */
struct stat {
  int st_mode;
};

/* Variables and functions */
int S_IFCHR;
int S_IFMT;
int file_charspecial(const struct stat *stat) {
  return (stat->st_mode & S_IFMT) != S_IFCHR;
}


x86 assembly (clang, -O0):
<file_charspecial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    0x2ecb(%rip),%rcx
and    (%rcx),%eax
mov    0x2eba(%rip),%rcx
cmp    (%rcx),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_charspecial>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
and    (%rdi),%ecx
mov    0x2ec6(%rip),%rdx
xor    %eax,%eax
cmp    (%rdx),%ecx
setne  %al
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@S_IFMT = global i32 0
@S_IFCHR = global i32 0
define i32 @file_charspecial(%struct.stat* %0) {
%2 = alloca %struct.stat*
store %struct.stat* %0, %struct.stat** %2
%3 = load %struct.stat*, %struct.stat** %2
%4 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = load i32, i32* @S_IFMT
%7 = and i32 %5, %6
%8 = load i32, i32* @S_IFCHR
%9 = icmp ne i32 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@S_IFMT = global i32 0
@S_IFCHR = global i32 0
define i32 @file_charspecial(%struct.stat* nocapture %0) {
%2 = getelementptr inbounds %struct.stat, %struct.stat* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = load i32, i32* @S_IFMT
%5 = and i32 %4, %3
%6 = load i32, i32* @S_IFCHR
%7 = icmp ne i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef scalar_t__ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
scalar_t__ read(int, void *, size_t);
ssize_t xreadx(int fd, void *buf, size_t count) {
  ssize_t status = read(fd, buf, count);
  if (status < 0)
    exit(-1);
  return status;
}


x86 assembly (clang, -O0):
<xreadx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jge    115c <xreadx+0x3c>
mov    $0xffffffff,%edi
call   1040 <exit@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xreadx>:
push   %rax
call   1030 <read@plt>
test   %rax,%rax
js     112d <xreadx+0xd>
pop    %rcx
ret
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i64 @xreadx(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 @read(i32 %8, i8* %9, i64 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @exit(i32 -1)
unreachable
16: ; preds = %3
%17 = load i64, i64* %7
ret i64 %17
}

LLVM IR (-O2):
define i64 @xreadx(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i64 @read(i32 %0, i8* %1, i64 %2)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %3
ret i64 %4
}
int sg_win32_start_capture() { return 0; }


x86 assembly (clang, -O0):
<sg_win32_start_capture>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_win32_start_capture>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sg_win32_start_capture() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sg_win32_start_capture() {
ret i32 0
}
__attribute__((no, noclone)) int foo(int a) {
  return (int)(0x14ff6e2207db5d1fLL >> a) >> 4;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
movabs $0x14ff6e2207db5d1f,%rax
6e ff 14
sar    %cl,%rax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%ecx
movabs $0x14ff6e2207db5d1f,%rax
6e ff 14
shr    %cl,%rax
sar    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = ashr i64 1513049092259536159, %4
%6 = trunc i64 %5 to i32
%7 = ashr i32 %6, 4
ret i32 %7
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = zext i32 %0 to i64
%3 = lshr i64 1513049092259536159, %2
%4 = trunc i64 %3 to i32
%5 = ashr i32 %4, 4
ret i32 %5
}
unsigned xrop3_49_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = D & stk3;
  stk1 = S | stk2;
  stk1 = ~stk1;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_49_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_49_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
mov    %esi,%eax
xor    $0xff,%eax
or     %ecx,%eax
or     %edx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_49_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
%34 = load i32, i32* %6
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %7
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = load i32, i32* %6
%42 = and i32 %40, %41
%43 = or i32 %39, %42
%44 = load i32, i32* %5
%45 = load i32, i32* %7
%46 = and i32 %44, %45
%47 = or i32 %43, %46
ret i32 %47
}

LLVM IR (-O2):
define i32 @xrop3_49_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %5, 255
%8 = or i32 %4, %7
%9 = or i32 %8, %6
%10 = xor i32 %9, -1
%11 = or i8 %1, %0
%12 = zext i8 %11 to i32
%13 = or i32 %12, %10
ret i32 %13
}
char *str_append(char *dst, char *src) {
  while (*src) {
    *dst = *src;
    dst++;
    src++;
  }
  return dst;
}


x86 assembly (clang, -O0):
<str_append>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1142 <str_append+0x42>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <str_append+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_append>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1121 <str_append+0x21>
add    $0x1,%rsi
nopl   (%rax)
mov    %cl,(%rax)
add    $0x1,%rax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <str_append+0x10>
ret

LLVM IR (-O0):
define i8* @str_append(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %9, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = load i8*, i8** %3
store i8 %11, i8* %12
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
br label %5
17: ; preds = %5
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @str_append(i8* writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
store i8 %6, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %9, %5 ]
ret i8* %14
}
int irbit1(unsigned long *iseed) {
  unsigned long newbit;
  newbit = (*iseed & 131072) >> 17 ^ (*iseed & 16) >> 4 ^ (*iseed & 2) >> 1 ^
           (*iseed & 1);
  *iseed = (*iseed << 1) | newbit;
  return (int)newbit;
}


x86 assembly (clang, -O0):
<irbit1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
and    $0x20000,%rax
shr    $0x11,%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
and    $0x10,%rcx
shr    $0x4,%rcx
xor    %rcx,%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
and    $0x2,%rcx
shr    $0x1,%rcx
xor    %rcx,%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
and    $0x1,%rcx
xor    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
shl    $0x1,%rcx
or     -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irbit1>:
mov    (%rdi),%rcx
mov    %ecx,%edx
shr    $0x4,%edx
xor    %ecx,%edx
mov    %ecx,%esi
shr    $0x11,%esi
mov    %ecx,%eax
shr    %eax
xor    %esi,%eax
xor    %edx,%eax
and    $0x1,%eax
lea    (%rax,%rcx,2),%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @irbit1(i64* %0) {
%2 = alloca i64*
%3 = alloca i64
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = load i64, i64* %4
%6 = and i64 %5, 131072
%7 = lshr i64 %6, 17
%8 = load i64*, i64** %2
%9 = load i64, i64* %8
%10 = and i64 %9, 16
%11 = lshr i64 %10, 4
%12 = xor i64 %7, %11
%13 = load i64*, i64** %2
%14 = load i64, i64* %13
%15 = and i64 %14, 2
%16 = lshr i64 %15, 1
%17 = xor i64 %12, %16
%18 = load i64*, i64** %2
%19 = load i64, i64* %18
%20 = and i64 %19, 1
%21 = xor i64 %17, %20
store i64 %21, i64* %3
%22 = load i64*, i64** %2
%23 = load i64, i64* %22
%24 = shl i64 %23, 1
%25 = load i64, i64* %3
%26 = or i64 %24, %25
%27 = load i64*, i64** %2
store i64 %26, i64* %27
%28 = load i64, i64* %3
%29 = trunc i64 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
define i32 @irbit1(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = lshr i64 %2, 17
%4 = lshr i64 %2, 4
%5 = lshr i64 %2, 1
%6 = xor i64 %4, %2
%7 = xor i64 %6, %3
%8 = xor i64 %7, %5
%9 = and i64 %8, 1
%10 = shl i64 %2, 1
%11 = or i64 %9, %10
store i64 %11, i64* %0
%12 = trunc i64 %9 to i32
ret i32 %12
}