xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ EncodeBase64(char *);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
int main(int argc, char *argv[]) {
  printf("Calculo de Base64 de la cadena: Demo 2 Telephaty\n");
  EncodeBase64("Demo 2 Telepathy");
  system("PAUSE");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
lea    0xed9(%rip),%rdi
call   1050 <EncodeBase64@plt>
lea    0xede(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedf(%rip),%rdi
call   1030 <puts@plt>
lea    0xebc(%rip),%rdi
call   1050 <EncodeBase64@plt>
lea    0xec1(%rip),%rdi
call   1040 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [50 x i8] c"Calculo de Base64 de la cadena: Demo 2 Telephaty\0A\00"
@.str.1 = [17 x i8] c"Demo 2 Telepathy\00"
@.str.2 = [6 x i8] c"PAUSE\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @EncodeBase64(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [17 x i8] c"Demo 2 Telepathy\00"
@.str.2 = [6 x i8] c"PAUSE\00"
@str = [49 x i8] c"Calculo de Base64 de la cadena: Demo 2 Telephaty\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @EncodeBase64(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
bool proc_valid(int proc) {
  if (proc == 0x01 || proc == 0x02)
    return true;
  return false;
}


x86 assembly (clang, -O0):
<proc_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     111b <proc_valid+0x1b>
cmpl   $0x2,-0x8(%rbp)
jne    1127 <proc_valid+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <proc_valid+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_valid>:
add    $0xffffffff,%edi
xor    %eax,%eax
cmp    $0x2,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @proc_valid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %11
10: ; preds = %6
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @proc_valid(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uintmax_t;

/* Variables and functions */
int /*<<< orphan*/ putc(int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void iprint(uintmax_t x) {
  if (x >= 10)
    iprint(x / 10);
  putc('0' + x % 10, stdout);
}


x86 assembly (clang, -O0):
<iprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jl     1147 <iprint+0x27>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <iprint@plt>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x30,%edi
mov    0x2e82(%rip),%rax
mov    (%rax),%esi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iprint>:
push   %rbx
mov    %edi,%ebx
cmp    $0xa,%edi
jl     113c <iprint+0x1c>
mov    %ebx,%eax
mov    $0xcccccccd,%edi
imul   %rax,%rdi
shr    $0x23,%rdi
call   1040 <iprint@plt>
movslq %ebx,%rax
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%eax
neg    %eax
lea    (%rbx,%rax,1),%edi
add    $0x30,%edi
mov    0x2e79(%rip),%rax
mov    (%rax),%esi
pop    %rbx
jmp    1030 <putc@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @iprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 10
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sdiv i32 %6, 10
br label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = srem i32 %9, 10
%11 = add nsw i32 48, %10
%12 = load i32, i32* @stdout
%13 = call i32 @putc(i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @iprint(i32 %0) {
%2 = icmp sgt i32 %0, 9
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = udiv i32 %0, 10
tail call void @iprint(i32 %4)
br label %5
5: ; preds = %3, %1
%6 = srem i32 %0, 10
%7 = add nsw i32 %6, 48
%8 = load i32, i32* @stdout
%9 = tail call i32 @putc(i32 %7, i32 %8)
ret void
}
void *tf2(void *arg) { return arg; }


x86 assembly (clang, -O0):
<tf2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tf2>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @tf2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @tf2(i8* readnone returned %0) {
ret i8* %0
}
void v3zero(float *v) {
  v[0] = 0.0;
  v[1] = 0.0;
  v[2] = 0.0;
}


x86 assembly (clang, -O0):
<v3zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<v3zero>:
movq   $0x0,(%rdi)
movl   $0x0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @v3zero(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
store float 0.000000e+00, float* %4
%5 = load float*, float** %2
%6 = getelementptr inbounds float, float* %5, i64 1
store float 0.000000e+00, float* %6
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 2
store float 0.000000e+00, float* %8
ret void
}

LLVM IR (-O2):
define void @v3zero(float* nocapture writeonly %0) {
store float 0.000000e+00, float* %0
%2 = getelementptr inbounds float, float* %0, i64 1
store float 0.000000e+00, float* %2
%3 = getelementptr inbounds float, float* %0, i64 2
store float 0.000000e+00, float* %3
ret void
}
/* Variables and functions */
scalar_t__ send(int, char *, long, int);
long isend(int sock, const void *buf, long size, int mode) {
  return (long)send(sock, (char *)buf, size, mode);
}


x86 assembly (clang, -O0):
<isend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isend>:
jmp    1030 <send@plt>

LLVM IR (-O0):
define i64 @isend(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = call i64 @send(i32 %9, i8* %10, i64 %11, i32 %12)
ret i64 %13
}

LLVM IR (-O2):
define i64 @isend(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call i64 @send(i32 %0, i8* %1, i64 %2, i32 %3)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ bfalgo(char *);
int /*<<< orphan*/ codeGoTo(int);
void codeConstantIncrement(int x, int q) {
  codeGoTo(x);
  while (q) {
    bfalgo("+");
    q--;
  }
}


x86 assembly (clang, -O0):
<codeConstantIncrement>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <codeGoTo@plt>
cmpl   $0x0,-0x8(%rbp)
je     115a <codeConstantIncrement+0x3a>
lea    0xeb9(%rip),%rdi
call   1040 <bfalgo@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <codeConstantIncrement+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<codeConstantIncrement>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <codeGoTo@plt>
test   %ebx,%ebx
je     114d <codeConstantIncrement+0x2d>
lea    0xeca(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1040 <bfalgo@plt>
add    $0xffffffff,%ebx
jne    1140 <codeConstantIncrement+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"+\00"
define void @codeConstantIncrement(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @codeGoTo(i32 %5)
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = call i32 @bfalgo(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%12 = load i32, i32* %4
%13 = add nsw i32 %12, -1
store i32 %13, i32* %4
br label %7
14: ; preds = %7
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"+\00"
define void @codeConstantIncrement(i32 %0, i32 %1) {
%3 = tail call i32 @codeGoTo(i32 %0)
%4 = icmp eq i32 %1, 0
br i1 %4, label %10, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %8, %5 ], [ %1, %2 ]
%7 = tail call i32 @bfalgo(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = add nsw i32 %6, -1
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %5
10: ; preds = %5, %2
ret void
}
adr0adr1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((*((signed char *)10000000)) <= (*((signed char *)11111111)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adr0adr1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0x989680,%eax
movsbl (%rax),%eax
mov    $0xa98ac7,%ecx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jg     1142 <adr0adr1+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1149 <adr0adr1+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0adr1>:
mov    0x989680,%cl
xor    %eax,%eax
cmp    0xa98ac7,%cl
setle  %al
ret

LLVM IR (-O0):
define i32 @adr0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8, i8* inttoptr (i64 10000000 to i8*)
%17 = sext i8 %16 to i32
%18 = load i8, i8* inttoptr (i64 11111111 to i8*)
%19 = sext i8 %18 to i32
%20 = icmp sle i32 %17, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @adr0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = load i8, i8* inttoptr (i64 10000000 to i8*)
%8 = load i8, i8* inttoptr (i64 11111111 to i8*)
%9 = icmp sle i8 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sigfpe(int s) { printf("sigfpe caught\n"); }


x86 assembly (clang, -O0):
<sigfpe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigfpe>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"sigfpe caught\0A\00"
define void @sigfpe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"sigfpe caught\00"
define void @sigfpe(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int darm_my_ror(int value, int shift) {
  assert(shift >= 0);
  if (shift == 0) {
    return value;
  } else {
    return ((value >> shift) | (value << (32 - shift)));
  }
}


x86 assembly (clang, -O0):
<darm_my_ror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x0,-0xc(%rbp)
jne    1144 <darm_my_ror+0x34>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <darm_my_ror+0x50>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    -0x8(%rbp),%edx
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darm_my_ror>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%edi
not    %edi
shr    $0x1f,%edi
call   1030 <assert@plt>
mov    %ebp,%edx
mov    %ebx,%ecx
sar    %cl,%edx
neg    %cl
mov    %ebp,%eax
shl    %cl,%eax
or     %edx,%eax
test   %ebx,%ebx
cmove  %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @darm_my_ror(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sge i32 %6, 0
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* %4
store i32 %13, i32* %3
br label %23
14: ; preds = %2
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = ashr i32 %15, %16
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = sub nsw i32 32, %19
%21 = shl i32 %18, %20
%22 = or i32 %17, %21
store i32 %22, i32* %3
br label %23
23: ; preds = %14, %12
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @darm_my_ror(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = lshr i32 %3, 31
%5 = tail call i32 @assert(i32 %4)
%6 = icmp eq i32 %1, 0
%7 = ashr i32 %0, %1
%8 = sub nsw i32 32, %1
%9 = shl i32 %0, %8
%10 = or i32 %9, %7
%11 = select i1 %6, i32 %0, i32 %10
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ run_all_validate_tests();
int main() {
  printf("Starting unit testing...\n");
  run_all_validate_tests();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <run_all_validate_tests@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <run_all_validate_tests@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Starting unit testing...\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @run_all_validate_tests()
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Starting unit testing...\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @run_all_validate_tests()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(void) {
  printf("usage: %s [-h | -e <lisp_expr> | <filename>]\n", "lisp");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf0c(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
lea    0xf10(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"usage: %s [-h | -e <lisp_expr> | <filename>]\0A\00"
@.str.1 = [5 x i8] c"lisp\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"usage: %s [-h | -e <lisp_expr> | <filename>]\0A\00"
@.str.1 = [5 x i8] c"lisp\00"
define void @usage() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void *SelectWrite(void *arg) { return (void *)0; }


x86 assembly (clang, -O0):
<SelectWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SelectWrite>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @SelectWrite(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @SelectWrite(i8* nocapture readnone %0) {
ret i8* null
}
int h(void) { return -72; }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffb8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
mov    $0xffffffb8,%eax
ret

LLVM IR (-O0):
define i32 @h() {
ret i32 -72
}

LLVM IR (-O2):
define i32 @h() {
ret i32 -72
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t betoh16(uint8_t *buffer) {
  return (uint16_t)buffer[1] | (uint16_t)buffer[0] << 8;
}


x86 assembly (clang, -O0):
<betoh16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<betoh16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @betoh16(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 1
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = load i64*, i64** %2
%8 = getelementptr inbounds i64, i64* %7, i64 0
%9 = load i64, i64* %8
%10 = trunc i64 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @betoh16(i64* nocapture %0) {
%2 = getelementptr inbounds i64, i64* %0, i64 1
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = load i64, i64* %0
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = or i32 %7, %4
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ MW_UDPBegin(unsigned int);
int MW_UDPFinalRead(unsigned char *, unsigned short);
int udpReadEnergia(unsigned char *data, unsigned int localPort,
                   unsigned short simVectorSize) {
  static int only_one_ethernet_begin;
  if (only_one_ethernet_begin == 0) {
    MW_UDPBegin(localPort);
    only_one_ethernet_begin++;
  }
  return MW_UDPFinalRead(data, simVectorSize);
}


x86 assembly (clang, -O0):
<udpReadEnergia>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %ax,-0xe(%rbp)
cmpl   $0x0,0x2ef7(%rip)
jne    115a <udpReadEnergia+0x3a>
mov    -0xc(%rbp),%edi
call   1040 <MW_UDPBegin@plt>
mov    0x2ee3(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2eda(%rip)
mov    -0x8(%rbp),%rdi
movzwl -0xe(%rbp),%esi
call   1030 <MW_UDPFinalRead@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udpReadEnergia>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rdi,%rbx
cmpl   $0x0,0x2f05(%rip)
jne    113f <udpReadEnergia+0x1f>
mov    %esi,%edi
call   1040 <MW_UDPBegin@plt>
addl   $0x1,0x2ef5(%rip)
movzwl %bp,%esi
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <MW_UDPFinalRead@plt>

LLVM IR (-O0):
@udpReadEnergia.only_one_ethernet_begin = internal global i32 0
define i32 @udpReadEnergia(i8* %0, i32 %1, i16 zeroext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i16
store i8* %0, i8** %4
store i32 %1, i32* %5
store i16 %2, i16* %6
%7 = load i32, i32* @udpReadEnergia.only_one_ethernet_begin
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i32, i32* %5
%11 = call i32 @MW_UDPBegin(i32 %10)
%12 = load i32, i32* @udpReadEnergia.only_one_ethernet_begin
%13 = add nsw i32 %12, 1
store i32 %13, i32* @udpReadEnergia.only_one_ethernet_begin
br label %14
14: ; preds = %9, %3
%15 = load i8*, i8** %4
%16 = load i16, i16* %6
%17 = call i32 @MW_UDPFinalRead(i8* %15, i16 zeroext %16)
ret i32 %17
}

LLVM IR (-O2):
@udpReadEnergia.only_one_ethernet_begin = internal unnamed_addr global i32 0
define i32 @udpReadEnergia(i8* %0, i32 %1, i16 zeroext %2) {
%4 = load i32, i32* @udpReadEnergia.only_one_ethernet_begin
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = tail call i32 @MW_UDPBegin(i32 %1)
%8 = load i32, i32* @udpReadEnergia.only_one_ethernet_begin
%9 = add nsw i32 %8, 1
store i32 %9, i32* @udpReadEnergia.only_one_ethernet_begin
br label %10
10: ; preds = %6, %3
%11 = tail call i32 @MW_UDPFinalRead(i8* %0, i16 zeroext %2)
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ foo();
void bar(int i, int partial, int args_addr) {
  int offset = 0;
  if (args_addr == 0)
    offset = 0;
  if (i >= offset)
    foo();
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1139 <bar+0x29>
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     114c <bar+0x3c>
mov    $0x0,%al
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
test   %edi,%edi
js     111b <bar+0xb>
xor    %eax,%eax
jmp    1030 <foo@plt>
ret

LLVM IR (-O0):
define void @bar(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 0, i32* %7
br label %11
11: ; preds = %10, %3
%12 = load i32, i32* %4
%13 = load i32, i32* %7
%14 = icmp sge i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = call i32 (...) @foo()
br label %17
17: ; preds = %15, %11
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, -1
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 (...) @foo()
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
scalar_t__ chk_flg_resize_map();
long get_screen_col();
long get_map_col(void) {
  if (chk_flg_resize_map()) {
    long n;
    n = get_screen_col();
    n -= 80 - ((0 + (20 * 2) - 1) + 1);
    return n;
  } else {
    return ((20 * 2));
  }
  return 1;
}


x86 assembly (clang, -O0):
<get_map_col>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <chk_flg_resize_map@plt>
cmp    $0x0,%rax
je     115d <get_map_col+0x3d>
mov    $0x0,%al
call   1040 <get_screen_col@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x28,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1165 <get_map_col+0x45>
movq   $0x28,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_map_col>:
push   %rax
xor    %eax,%eax
call   1030 <chk_flg_resize_map@plt>
test   %rax,%rax
je     113a <get_map_col+0x1a>
xor    %eax,%eax
call   1040 <get_screen_col@plt>
add    $0xffffffffffffffd8,%rax
pop    %rcx
ret
mov    $0x28,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @get_map_col() {
%1 = alloca i64
%2 = alloca i64
%3 = call i64 (...) @chk_flg_resize_map()
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = call i64 (...) @get_screen_col()
store i64 %6, i64* %2
%7 = load i64, i64* %2
%8 = sub nsw i64 %7, 40
store i64 %8, i64* %2
%9 = load i64, i64* %2
store i64 %9, i64* %1
br label %11
10: ; preds = %0
store i64 40, i64* %1
br label %11
11: ; preds = %10, %5
%12 = load i64, i64* %1
ret i64 %12
}

LLVM IR (-O2):
define i64 @get_map_col() {
%1 = tail call i64 (...) @chk_flg_resize_map()
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i64 (...) @get_screen_col()
%5 = add nsw i64 %4, -40
br label %6
6: ; preds = %0, %3
%7 = phi i64 [ %5, %3 ], [ 40, %0 ]
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char, char);
void pitch_bend(char a, char b, char c) {
  printf("pitch_bend %d %d %d\n", a, b, c);
}


x86 assembly (clang, -O0):
<pitch_bend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x2(%rbp),%al
lea    0xeca(%rip),%rdi
movsbl %cl,%esi
movsbl %al,%edx
movsbl -0x3(%rbp),%ecx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pitch_bend>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"pitch_bend %d %d %d\0A\00"
define void @pitch_bend(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8 signext %7, i8 signext %8, i8 signext %9)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"pitch_bend %d %d %d\0A\00"
define void @pitch_bend(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8 signext %0, i8 signext %1, i8 signext %2)
ret void
}
void uDMAChannelDisable(unsigned long ulChannelNum) {
  ;
  (*((volatile unsigned long *)(0x400FF02C))) = 1 << ulChannelNum;
}


x86 assembly (clang, -O0):
<uDMAChannelDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff02c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAChannelDisable>:
mov    %rdi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x400ff02c
40
ret

LLVM IR (-O0):
define void @uDMAChannelDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = shl i32 1, %4
%6 = sext i32 %5 to i64
store volatile i64 %6, i64* inttoptr (i64 1074786348 to i64*)
ret void
}

LLVM IR (-O2):
define void @uDMAChannelDisable(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = shl nuw i32 1, %2
%4 = sext i32 %3 to i64
store volatile i64 %4, i64* inttoptr (i64 1074786348 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ has_sse();
int support_fpu_underflow_control(int kind) {
  if (!has_sse())
    return 0;
  return (kind == 4 || kind == 8) ? 1 : 0;
}


x86 assembly (clang, -O0):
<support_fpu_underflow_control>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <has_sse@plt>
cmp    $0x0,%eax
jne    1137 <support_fpu_underflow_control+0x27>
movl   $0x0,-0x4(%rbp)
jmp    1163 <support_fpu_underflow_control+0x53>
mov    $0x1,%al
cmpl   $0x4,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1150 <support_fpu_underflow_control+0x40>
cmpl   $0x8,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<support_fpu_underflow_control>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <has_sse@plt>
test   %eax,%eax
setne  %al
add    $0xfffffffc,%ebx
test   $0xfffffffb,%ebx
sete   %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @support_fpu_underflow_control(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @has_sse()
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %1
store i32 0, i32* %2
br label %17
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 4
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 8
br label %13
13: ; preds = %10, %7
%14 = phi i1 [ true, %7 ], [ %12, %10 ]
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 1, i32 0
store i32 %16, i32* %2
br label %17
17: ; preds = %13, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @support_fpu_underflow_control(i32 %0) {
%2 = tail call i32 (...) @has_sse()
%3 = icmp ne i32 %2, 0
%4 = icmp eq i32 %0, 4
%5 = icmp eq i32 %0, 8
%6 = or i1 %4, %5
%7 = and i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
void wait_for_short_timer() {
  while (((*((volatile unsigned int *)(0x2e000 + 0x44))) & (1 << 1)) == 0) {
  }
  (*((volatile unsigned int *)(0x2e000 + 0x44))) |= (1 << 1);
}


x86 assembly (clang, -O0):
<wait_for_short_timer>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <wait_for_short_timer+0x9>
mov    $0x2e044,%eax
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
jne    1121 <wait_for_short_timer+0x21>
jmp    1109 <wait_for_short_timer+0x9>
mov    $0x2e044,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    $0x2e044,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_short_timer>:
testl  $0x2,0x2e044
je     1100 <wait_for_short_timer>
orl    $0x2,0x2e044
02
ret

LLVM IR (-O0):
define void @wait_for_short_timer() {
br label %1
1: ; preds = %5, %0
%2 = load volatile i32, i32* inttoptr (i64 188484 to i32*)
%3 = and i32 %2, 2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
%7 = load volatile i32, i32* inttoptr (i64 188484 to i32*)
%8 = or i32 %7, 2
store volatile i32 %8, i32* inttoptr (i64 188484 to i32*)
ret void
}

LLVM IR (-O2):
define void @wait_for_short_timer() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* inttoptr (i64 188484 to i32*)
%3 = and i32 %2, 2
%4 = icmp eq i32 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 188484 to i32*)
%7 = or i32 %6, 2
store volatile i32 %7, i32* inttoptr (i64 188484 to i32*)
ret void
}
void add3d(float *out, const float *a, const float *b) {
  out[0] = a[0] + b[0];
  out[1] = a[1] + b[1];
  out[2] = a[2] + b[2];
}


x86 assembly (clang, -O0):
<add3d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add3d>:
movss  (%rsi),%xmm0
addss  (%rdx),%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
addss  0x4(%rdx),%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
addss  0x8(%rdx),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @add3d(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %6
%11 = getelementptr inbounds float, float* %10, i64 0
%12 = load float, float* %11
%13 = fadd float %9, %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 0
store float %13, float* %15
%16 = load float*, float** %5
%17 = getelementptr inbounds float, float* %16, i64 1
%18 = load float, float* %17
%19 = load float*, float** %6
%20 = getelementptr inbounds float, float* %19, i64 1
%21 = load float, float* %20
%22 = fadd float %18, %21
%23 = load float*, float** %4
%24 = getelementptr inbounds float, float* %23, i64 1
store float %22, float* %24
%25 = load float*, float** %5
%26 = getelementptr inbounds float, float* %25, i64 2
%27 = load float, float* %26
%28 = load float*, float** %6
%29 = getelementptr inbounds float, float* %28, i64 2
%30 = load float, float* %29
%31 = fadd float %27, %30
%32 = load float*, float** %4
%33 = getelementptr inbounds float, float* %32, i64 2
store float %31, float* %33
ret void
}

LLVM IR (-O2):
define void @add3d(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fadd float %4, %5
store float %6, float* %0
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %2, i64 1
%10 = load float, float* %9
%11 = fadd float %8, %10
%12 = getelementptr inbounds float, float* %0, i64 1
store float %11, float* %12
%13 = getelementptr inbounds float, float* %1, i64 2
%14 = load float, float* %13
%15 = getelementptr inbounds float, float* %2, i64 2
%16 = load float, float* %15
%17 = fadd float %14, %16
%18 = getelementptr inbounds float, float* %0, i64 2
store float %17, float* %18
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xb5() {
  Assert_real((isalpha(181) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              910, ("isalpha should be 0 for 0xb5"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xb5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb5,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x38e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xb5>:
push   %rax
mov    $0xb5,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x38e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xb5\00"
define void @t_isalpha_0xb5() {
%1 = call i64 @isalpha(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xb5\00"
define void @t_isalpha_0xb5() {
%1 = tail call i64 @isalpha(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *_bproperties(void *inst1) { return NULL; }


x86 assembly (clang, -O0):
<_bproperties>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_bproperties>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @_bproperties(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @_bproperties(i8* nocapture readnone %0) {
ret i8* null
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void PWMFaultIntClear(uint32_t ui32Base) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  (*((volatile uint32_t *)(ui32Base + 0x0000001C))) = 0x00010000;
}


x86 assembly (clang, -O0):
<PWMFaultIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113a <PWMFaultIntClear+0x2a>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x1c,%eax
cltq
movl   $0x10000,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMFaultIntClear>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
movl   $0x10000,0x1c(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @PWMFaultIntClear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1073905664
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 1073909760
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @ASSERT(i32 %10)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 28
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
store volatile i32 65536, i32* %15
ret void
}

LLVM IR (-O2):
define void @PWMFaultIntClear(i32 %0) {
%2 = and i32 %0, -4097
%3 = icmp eq i32 %2, 1073905664
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = add nsw i32 %0, 28
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 65536, i32* %8
ret void
}
char CCharChars(char *Sorc) { return Sorc[0]; }


x86 assembly (clang, -O0):
<CCharChars>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CCharChars>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define signext i8 @CCharChars(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @CCharChars(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void xyz(void) { printf("        func2-xyz\n"); }


x86 assembly (clang, -O0):
<xyz>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xyz>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c" func2-xyz\0A\00"
define void @xyz() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c" func2-xyz\00"
define void @xyz() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ pigpio_command(int, int, int /*<<< orphan*/,
                                  int /*<<< orphan*/, int);
uint32_t get_current_tick(int pi) { return pigpio_command(pi, 16, 0, 0, 1); }


x86 assembly (clang, -O0):
<get_current_tick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x10,%esi
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    %ecx,%edx
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_current_tick>:
mov    $0x10,%esi
xor    %edx,%edx
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @get_current_tick(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pigpio_command(i32 %3, i32 16, i32 0, i32 0, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_current_tick(i32 %0) {
%2 = tail call i32 @pigpio_command(i32 %0, i32 16, i32 0, i32 0, i32 1)
ret i32 %2
}
/* Variables and functions */
char tolower(char const);
void lower_case(const char *src, char *dest, size_t strsz) {
  for (size_t i = 0; i < strsz; i++) {
    dest[i] = tolower(src[i]);
  }
  dest[strsz] = 0;
}


x86 assembly (clang, -O0):
<lower_case>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1169 <lower_case+0x59>
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <tolower@plt>
mov    %al,%dl
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112c <lower_case+0x1c>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower_case>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r12
mov    %rsi,%r14
test   %rdx,%rdx
je     1147 <lower_case+0x37>
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1030 <tolower@plt>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <lower_case+0x20>
movb   $0x0,(%r14,%r12,1)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @lower_case(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i64 0, i64* %7
br label %8
8: ; preds = %21, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i64, i64* %7
%15 = getelementptr inbounds i8, i8* %13, i64 %14
%16 = load i8, i8* %15
%17 = call signext i8 @tolower(i8 signext %16)
%18 = load i8*, i8** %5
%19 = load i64, i64* %7
%20 = getelementptr inbounds i8, i8* %18, i64 %19
store i8 %17, i8* %20
br label %21
21: ; preds = %12
%22 = load i64, i64* %7
%23 = add i64 %22, 1
store i64 %23, i64* %7
br label %8
24: ; preds = %8
%25 = load i8*, i8** %5
%26 = load i64, i64* %6
%27 = getelementptr inbounds i8, i8* %25, i64 %26
store i8 0, i8* %27
ret void
}

LLVM IR (-O2):
define void @lower_case(i8* nocapture %0, i8* nocapture writeonly %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %5, label %7
5: ; preds = %7, %3
%6 = getelementptr inbounds i8, i8* %1, i64 %2
store i8 0, i8* %6
ret void
7: ; preds = %3, %7
%8 = phi i64 [ %13, %7 ], [ 0, %3 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = tail call signext i8 @tolower(i8 signext %10)
%12 = getelementptr inbounds i8, i8* %1, i64 %8
store i8 %11, i8* %12
%13 = add nuw i64 %8, 1
%14 = icmp eq i64 %13, %2
br i1 %14, label %5, label %7
}
/* Type definitions */
typedef size_t int32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_s(char *buff, int32_t len) {
  int32_t i;
  for (i = 0; i < len; i++) {
    printf("%c", buff[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1161 <print_s+0x51>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%esi
lea    0xeb7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <print_s+0x18>
lea    0xe9b(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_s>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1143 <print_s+0x33>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%edi
call   1030 <putchar@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <print_s+0x20>
mov    $0xa,%edi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_s(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i64, i64* %5
%19 = add i64 %18, 1
store i64 %19, i64* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @print_s(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %10, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = tail call i32 @putchar(i32 %8)
%10 = add nuw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %2
%13 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void finish(void) {
  puts("\nThis is the function that looks under");
  puts("\tthe hard drive for any missing bits...");
}


x86 assembly (clang, -O0):
<finish>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xf00(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<finish>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf03(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"\0AThis is the function that looks under\00"
@.str.1 = [40 x i8] c"\09the hard drive for any missing bits...\00"
define void @finish() {
%1 = call i32 @puts(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [39 x i8] c"\0AThis is the function that looks under\00"
@.str.1 = [40 x i8] c"\09the hard drive for any missing bits...\00"
define void @finish() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void gdk_x11_lookup_xdisplay() {}


x86 assembly (clang, -O0):
<gdk_x11_lookup_xdisplay>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_x11_lookup_xdisplay>:
ret

LLVM IR (-O0):
define void @gdk_x11_lookup_xdisplay() {
ret void
}

LLVM IR (-O2):
define void @gdk_x11_lookup_xdisplay() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dxl_write_byte(unsigned char, int, unsigned char);
void setLowestVoltageLimit(unsigned char id, unsigned char limit) {
  dxl_write_byte(id, (12), limit);
}


x86 assembly (clang, -O0):
<setLowestVoltageLimit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
mov    $0xc,%esi
movzbl %al,%edi
movzbl -0x2(%rbp),%edx
call   1030 <dxl_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setLowestVoltageLimit>:
mov    %esi,%edx
mov    $0xc,%esi
jmp    1030 <dxl_write_byte@plt>

LLVM IR (-O0):
define void @setLowestVoltageLimit(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = load i8, i8* %4
%7 = call i32 @dxl_write_byte(i8 zeroext %5, i32 12, i8 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @setLowestVoltageLimit(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i32 @dxl_write_byte(i8 zeroext %0, i32 12, i8 zeroext %1)
ret void
}