xunge/DecIR huggingface dataset:
unsigned int _uiTelGetStatus(void) { return (0x0399); }


x86 assembly (clang, -O0):
<_uiTelGetStatus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x399,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uiTelGetStatus>:
mov    $0x399,%eax
ret

LLVM IR (-O0):
define i32 @_uiTelGetStatus() {
ret i32 921
}

LLVM IR (-O2):
define i32 @_uiTelGetStatus() {
ret i32 921
}
_Bool numeralStringAdheresToModernConvention(int convertedTermValue,
                                             int lastConvertedTermValue,
                                             char *numeralString) {
  if (convertedTermValue > lastConvertedTermValue) {
    showViolatesModernConventionMessage(numeralString);
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<numeralStringAdheresToModernConvention>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1142 <numeralStringAdheresToModernConvention+0x32>
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <showViolatesModernConventionMessage@plt>
movb   $0x0,-0x1(%rbp)
jmp    1146 <numeralStringAdheresToModernConvention+0x36>
movb   $0x1,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeralStringAdheresToModernConvention>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
cmp    %esi,%edi
jle    1125 <numeralStringAdheresToModernConvention+0x15>
mov    %rdx,%rdi
xor    %eax,%eax
call   1030 <showViolatesModernConventionMessage@plt>
cmp    %ebx,%ebp
setle  %al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i1 @numeralStringAdheresToModernConvention(i32 %0, i32 %1, i8* %2) {
%4 = alloca i1
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i8*, i8** %7
%13 = call i32 (i8*, ...) bitcast (i32 (...)* @showViolatesModernConventionMessage to i32 (i8*, ...)*)(i8* %12)
store i1 false, i1* %4
br label %15
14: ; preds = %3
store i1 true, i1* %4
br label %15
15: ; preds = %14, %11
%16 = load i1, i1* %4
ret i1 %16
}

LLVM IR (-O2):
define zeroext i1 @numeralStringAdheresToModernConvention(i32 %0, i32 %1, i8* %2) {
%4 = icmp sgt i32 %0, %1
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @showViolatesModernConventionMessage to i32 (i8*, ...)*)(i8* %2)
br label %7
7: ; preds = %3, %5
%8 = xor i1 %4, true
ret i1 %8
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
char por_encode_base30_digit(uint64_t digit) {
  if (digit < 10)
    return '0' + digit;
  return 'A' + (digit - 10);
}


x86 assembly (clang, -O0):
<por_encode_base30_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    111f <por_encode_base30_digit+0x1f>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    112b <por_encode_base30_digit+0x2b>
mov    -0x8(%rbp),%eax
sub    $0xa,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<por_encode_base30_digit>:
cmp    $0xa,%edi
mov    $0x30,%ecx
mov    $0x37,%eax
cmovl  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @por_encode_base30_digit(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 48, %7
%9 = trunc i32 %8 to i8
store i8 %9, i8* %2
br label %15
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 10
%13 = add nsw i32 65, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %15
15: ; preds = %10, %6
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @por_encode_base30_digit(i32 %0) {
%2 = icmp slt i32 %0, 10
%3 = trunc i32 %0 to i8
%4 = select i1 %2, i8 48, i8 55
%5 = add i8 %4, %3
ret i8 %5
}
int drv_generic_keypad_quit(void) { return 0; }


x86 assembly (clang, -O0):
<drv_generic_keypad_quit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_generic_keypad_quit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @drv_generic_keypad_quit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @drv_generic_keypad_quit() {
ret i32 0
}
int fstat(int des, struct stat *buf) { return -1; }


x86 assembly (clang, -O0):
<fstat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstat>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.stat = type opaque
define i32 @fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.stat = type opaque
define i32 @fstat(i32 %0, %struct.stat* nocapture readnone %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ udelay(int);
void i2c_bus_ready(void) {
  int timeout = 1000;
  while (timeout && ((*((volatile unsigned int *)(0x40301698))) & 0x0008)) {
    udelay(10);
    timeout--;
  }
}


x86 assembly (clang, -O0):
<i2c_bus_ready>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3e8,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1141 <i2c_bus_ready+0x31>
mov    $0x40301698,%eax
mov    (%rax),%eax
and    $0x8,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    1151 <i2c_bus_ready+0x41>
jmp    1169 <i2c_bus_ready+0x59>
mov    $0xa,%edi
call   1030 <udelay@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <i2c_bus_ready+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_bus_ready>:
push   %rbx
mov    $0xfffffc18,%ebx
cs nopw 0x0(%rax,%rax,1)
testl  $0x8,0x40301698
je     113b <i2c_bus_ready+0x2b>
mov    $0xa,%edi
call   1030 <udelay@plt>
inc    %ebx
jne    1120 <i2c_bus_ready+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @i2c_bus_ready() {
%1 = alloca i32
store i32 1000, i32* %1
br label %2
2: ; preds = %11, %0
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load volatile i32, i32* inttoptr (i64 1076893336 to i32*)
%7 = and i32 %6, 8
%8 = icmp ne i32 %7, 0
br label %9
9: ; preds = %5, %2
%10 = phi i1 [ false, %2 ], [ %8, %5 ]
br i1 %10, label %11, label %15
11: ; preds = %9
%12 = call i32 @udelay(i32 10)
%13 = load i32, i32* %1
%14 = add nsw i32 %13, -1
store i32 %14, i32* %1
br label %2
15: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @i2c_bus_ready() {
br label %1
1: ; preds = %0, %6
%2 = phi i32 [ 1000, %0 ], [ %8, %6 ]
%3 = load volatile i32, i32* inttoptr (i64 1076893336 to i32*)
%4 = and i32 %3, 8
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = tail call i32 @udelay(i32 10)
%8 = add nsw i32 %2, -1
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %1
10: ; preds = %6, %1
ret void
}
void ff_hevc_put_hevc_uni_w_epel_h16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h16_12_sse4() {
ret void
}
void serial2_handler(void) {}


x86 assembly (clang, -O0):
<serial2_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial2_handler>:
ret

LLVM IR (-O0):
define void @serial2_handler() {
ret void
}

LLVM IR (-O2):
define void @serial2_handler() {
ret void
}
void foo514(int p) {}


x86 assembly (clang, -O0):
<foo514>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo514>:
ret

LLVM IR (-O0):
define void @foo514(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo514(i32 %0) {
ret void
}
/* Variables and functions */
int runetochar(char *, int *);
int runelen(int c) {
  char str[10];
  return runetochar(str, &c);
}


x86 assembly (clang, -O0):
<runelen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0xe(%rbp),%rdi
lea    -0x4(%rbp),%rsi
call   1030 <runetochar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<runelen>:
sub    $0x18,%rsp
mov    %edi,0x8(%rsp)
lea    0xe(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <runetochar@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @runelen(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%5 = call i32 @runetochar(i8* %4, i32* %2)
ret i32 %5
}

LLVM IR (-O2):
define i32 @runelen(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%5 = call i32 @runetochar(i8* %4, i32* %2)
ret i32 %5
}
int Cyc_Character_isupper(unsigned char c) { return c >= 'A' ? c <= 'Z' : 0; }


x86 assembly (clang, -O0):
<Cyc_Character_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     112e <Cyc_Character_isupper+0x2e>
movzbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
jmp    1138 <Cyc_Character_isupper+0x38>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1138 <Cyc_Character_isupper+0x38>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Character_isupper>:
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @Cyc_Character_isupper(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 90
%10 = zext i1 %9 to i32
br label %12
11: ; preds = %1
br label %12
12: ; preds = %11, %6
%13 = phi i32 [ %10, %6 ], [ 0, %11 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @Cyc_Character_isupper(i8 zeroext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ send_errmsg(char *, char const *const);
void pwd_error(const char *const cause) {
  send_errmsg("cannot print current directory. ", cause);
}


x86 assembly (clang, -O0):
<pwd_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <send_errmsg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwd_error>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <send_errmsg@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"cannot print current directory. \00"
define void @pwd_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @send_errmsg(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"cannot print current directory. \00"
define void @pwd_error(i8* %0) {
%2 = tail call i32 @send_errmsg(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void debugpins_isr_set() {}


x86 assembly (clang, -O0):
<debugpins_isr_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debugpins_isr_set>:
ret

LLVM IR (-O0):
define void @debugpins_isr_set() {
ret void
}

LLVM IR (-O2):
define void @debugpins_isr_set() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_send(int, char *);
void japi_list_process(int sd) { do_send(sd, "LISTPROCESS\n"); }


x86 assembly (clang, -O0):
<japi_list_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <do_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<japi_list_process>:
lea    0xee9(%rip),%rsi
jmp    1030 <do_send@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"LISTPROCESS\0A\00"
define void @japi_list_process(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @do_send(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"LISTPROCESS\0A\00"
define void @japi_list_process(i32 %0) {
%2 = tail call i32 @do_send(i32 %0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay_ms(int);
void tempob() { delay_ms(200); }


x86 assembly (clang, -O0):
<tempob>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc8,%edi
call   1030 <delay_ms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tempob>:
mov    $0xc8,%edi
jmp    1030 <delay_ms@plt>

LLVM IR (-O0):
define void @tempob() {
%1 = call i32 @delay_ms(i32 200)
ret void
}

LLVM IR (-O2):
define void @tempob() {
%1 = tail call i32 @delay_ms(i32 200)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putcar(char);
void isr_clock_int(void) {
  static int tic = 0;
  static int sec = 0;
  tic++;
  if (tic % 100 == 0) {
    sec++;
    tic = 0;
    putcar('.');
  }
}


x86 assembly (clang, -O0):
<isr_clock_int>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f12(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f09(%rip)
mov    0x2f03(%rip),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115d <isr_clock_int+0x4d>
mov    0x2ef0(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2ee7(%rip)
movl   $0x0,0x2ed9(%rip)
mov    $0x2e,%edi
call   1030 <putcar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isr_clock_int>:
mov    0x2f16(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f0d(%rip)
imul   $0xc28f5c29,%eax,%eax
add    $0x51eb850,%eax
ror    $0x2,%eax
cmp    $0x28f5c28,%eax
jbe    1135 <isr_clock_int+0x25>
ret
addl   $0x1,0x2ef4(%rip)
movl   $0x0,0x2ee6(%rip)
mov    $0x2e,%edi
jmp    1030 <putcar@plt>

LLVM IR (-O0):
@isr_clock_int.tic = internal global i32 0
@isr_clock_int.sec = internal global i32 0
define void @isr_clock_int() {
%1 = load i32, i32* @isr_clock_int.tic
%2 = add nsw i32 %1, 1
store i32 %2, i32* @isr_clock_int.tic
%3 = load i32, i32* @isr_clock_int.tic
%4 = srem i32 %3, 100
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %0
%7 = load i32, i32* @isr_clock_int.sec
%8 = add nsw i32 %7, 1
store i32 %8, i32* @isr_clock_int.sec
store i32 0, i32* @isr_clock_int.tic
%9 = call i32 @putcar(i8 signext 46)
br label %10
10: ; preds = %6, %0
ret void
}

LLVM IR (-O2):
@isr_clock_int.tic = internal unnamed_addr global i32 0
@isr_clock_int.sec = internal unnamed_addr global i32 0
define void @isr_clock_int() {
%1 = load i32, i32* @isr_clock_int.tic
%2 = add nsw i32 %1, 1
store i32 %2, i32* @isr_clock_int.tic
%3 = srem i32 %2, 100
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %0
%6 = load i32, i32* @isr_clock_int.sec
%7 = add nsw i32 %6, 1
store i32 %7, i32* @isr_clock_int.sec
store i32 0, i32* @isr_clock_int.tic
%8 = tail call i32 @putcar(i8 signext 46)
br label %9
9: ; preds = %5, %0
ret void
}
int test_imm_F5int64_highword_reg(long long val) {
  return ((val >> 32) & (0xF5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F5int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xf5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F5int64_highword_reg>:
movabs $0xf500000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F5int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 245
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F5int64_highword_reg(i64 %0) {
%2 = and i64 %0, 1052266987520
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned int loop01(int n) {
  int i, j;
  unsigned int ucnt = 0;
  for (i = 0; i < n; i++)
    for (j = 0; j < n; j++)
      ucnt++;
  return ucnt;
}


x86 assembly (clang, -O0):
<loop01>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115e <loop01+0x5e>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114b <loop01+0x4b>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1128 <loop01+0x28>
jmp    1150 <loop01+0x50>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <loop01+0x15>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop01>:
mov    %edi,%ecx
imul   %edi,%ecx
xor    %eax,%eax
test   %edi,%edi
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @loop01(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %5
store i32 0, i32* %3
br label %6
6: ; preds = %22, %1
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %25
10: ; preds = %6
store i32 0, i32* %4
br label %11
11: ; preds = %18, %10
%12 = load i32, i32* %4
%13 = load i32, i32* %2
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %21
15: ; preds = %11
%16 = load i32, i32* %5
%17 = add i32 %16, 1
store i32 %17, i32* %5
br label %18
18: ; preds = %15
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %11
21: ; preds = %11
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %6
25: ; preds = %6
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @loop01(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = mul i32 %0, %0
%4 = select i1 %2, i32 %3, i32 0
ret i32 %4
}
void string_cat(char *arr1, char *arr2) {
  while (*arr1 != '\0') {
    arr1++;
  }
  while (*arr2 != '\0') {
    *arr1 = *arr2;
    arr1++;
    arr2++;
  }
  *arr1 = '\0';
}


x86 assembly (clang, -O0):
<string_cat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     112d <string_cat+0x2d>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110c <string_cat+0xc>
jmp    1132 <string_cat+0x32>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     116b <string_cat+0x6b>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1132 <string_cat+0x32>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_cat>:
mov    %rdi,%rcx
add    $0x1,%rdi
cmpb   $0x0,(%rcx)
jne    1100 <string_cat>
mov    (%rsi),%al
test   %al,%al
je     1136 <string_cat+0x36>
mov    $0xffffffffffffffff,%rcx
nopl   0x0(%rax)
mov    %al,(%rdi,%rcx,1)
movzbl 0x2(%rsi,%rcx,1),%eax
add    $0x1,%rcx
test   %al,%al
jne    1120 <string_cat+0x20>
add    %rcx,%rdi
mov    %rdi,%rcx
movb   $0x0,(%rcx)
ret

LLVM IR (-O0):
define void @string_cat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
br label %5
13: ; preds = %5
br label %14
14: ; preds = %19, %13
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %27
19: ; preds = %14
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = load i8*, i8** %3
store i8 %21, i8* %22
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %3
%25 = load i8*, i8** %4
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %4
br label %14
27: ; preds = %14
%28 = load i8*, i8** %3
store i8 0, i8* %28
ret void
}

LLVM IR (-O2):
define void @string_cat(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = load i8, i8* %1
%10 = icmp eq i8 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %8, %11
%12 = phi i8 [ %17, %11 ], [ %9, %8 ]
%13 = phi i8* [ %16, %11 ], [ %1, %8 ]
%14 = phi i8* [ %15, %11 ], [ %4, %8 ]
store i8 %12, i8* %14
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = getelementptr inbounds i8, i8* %13, i64 1
%17 = load i8, i8* %16
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %11
19: ; preds = %11, %8
%20 = phi i8* [ %4, %8 ], [ %15, %11 ]
store i8 0, i8* %20
ret void
}
/* Type definitions */
struct tmpl_node {
  int dummy;
};
struct object {
  int dummy;
};
struct node {
  int dummy;
};

/* Variables and functions */
struct object *object_new(int /*<<< orphan*/);
int /*<<< orphan*/ tmpl_node_class_get();
int /*<<< orphan*/ tmpl_node_init(struct tmpl_node *, char const *);
struct node *tmpl_node_new(const char *name) {
  struct object *node = object_new(tmpl_node_class_get());
  tmpl_node_init(((struct tmpl_node *)(node)), name);
  return ((struct node *)(node));
}


x86 assembly (clang, -O0):
<tmpl_node_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <tmpl_node_class_get@plt>
mov    %eax,%edi
call   1050 <object_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <tmpl_node_init@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tmpl_node_new>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <tmpl_node_class_get@plt>
mov    %eax,%edi
call   1050 <object_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <tmpl_node_init@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.node = type { i32 }
%struct.object = type { i32 }
%struct.tmpl_node = type { i32 }
define %struct.node* @tmpl_node_new(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.object*
store i8* %0, i8** %2
%4 = call i32 (...) @tmpl_node_class_get()
%5 = call %struct.object* @object_new(i32 %4)
store %struct.object* %5, %struct.object** %3
%6 = load %struct.object*, %struct.object** %3
%7 = bitcast %struct.object* %6 to %struct.tmpl_node*
%8 = load i8*, i8** %2
%9 = call i32 @tmpl_node_init(%struct.tmpl_node* %7, i8* %8)
%10 = load %struct.object*, %struct.object** %3
%11 = bitcast %struct.object* %10 to %struct.node*
ret %struct.node* %11
}

LLVM IR (-O2):
%struct.node = type { i32 }
%struct.object = type { i32 }
%struct.tmpl_node = type { i32 }
define %struct.node* @tmpl_node_new(i8* %0) {
%2 = tail call i32 (...) @tmpl_node_class_get()
%3 = tail call %struct.object* @object_new(i32 %2)
%4 = bitcast %struct.object* %3 to %struct.tmpl_node*
%5 = tail call i32 @tmpl_node_init(%struct.tmpl_node* %4, i8* %0)
%6 = bitcast %struct.object* %3 to %struct.node*
ret %struct.node* %6
}
void login(const struct utmp *entry) { return; }


x86 assembly (clang, -O0):
<login>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<login>:
ret

LLVM IR (-O0):
%struct.utmp = type opaque
define void @login(%struct.utmp* %0) {
%2 = alloca %struct.utmp*
store %struct.utmp* %0, %struct.utmp** %2
ret void
}

LLVM IR (-O2):
%struct.utmp = type opaque
define void @login(%struct.utmp* nocapture %0) {
ret void
}
void g_type_fundamental_next() {}


x86 assembly (clang, -O0):
<g_type_fundamental_next>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_type_fundamental_next>:
ret

LLVM IR (-O0):
define void @g_type_fundamental_next() {
ret void
}

LLVM IR (-O2):
define void @g_type_fundamental_next() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mutal_rec_d();
void mutal_rec_a() { mutal_rec_d(); }


x86 assembly (clang, -O0):
<mutal_rec_a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mutal_rec_d@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutal_rec_a>:
xor    %eax,%eax
jmp    1030 <mutal_rec_d@plt>

LLVM IR (-O0):
define void @mutal_rec_a() {
%1 = call i32 (...) @mutal_rec_d()
ret void
}

LLVM IR (-O2):
define void @mutal_rec_a() {
%1 = tail call i32 (...) @mutal_rec_d()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void def_free_func(void *opaque, void *address) {
  (void)opaque, (void)address;
  free(address);
}


x86 assembly (clang, -O0):
<def_free_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<def_free_func>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @def_free_func(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @free(i8* %7)
ret void
}

LLVM IR (-O2):
define void @def_free_func(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
unsigned int load_bswap32(unsigned int *p) { return __builtin_bswap32(*p); }


x86 assembly (clang, -O0):
<load_bswap32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
bswap  %eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_bswap32>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @load_bswap32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @llvm.bswap.i32(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @load_bswap32(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
ret i32 %3
}
unsigned long peer_offset(unsigned int peernum) { return 4 * peernum; }


x86 assembly (clang, -O0):
<peer_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<peer_offset>:
lea    0x0(,%rdi,4),%eax
ret

LLVM IR (-O0):
define i64 @peer_offset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 4, %3
%5 = zext i32 %4 to i64
ret i64 %5
}

LLVM IR (-O2):
define i64 @peer_offset(i32 %0) {
%2 = shl i32 %0, 2
%3 = zext i32 %2 to i64
ret i64 %3
}
int PyMPELog_SetFileName(const char filename[]) {
  int ierr = 0;
  return ierr;
}


x86 assembly (clang, -O0):
<PyMPELog_SetFileName>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyMPELog_SetFileName>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PyMPELog_SetFileName(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @PyMPELog_SetFileName(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef char *int64_t;

/* Variables and functions */
volatile int64_t CAS(volatile int64_t *addr, int64_t expected_value,
                     int64_t new_value) {
  return ({
    int64_t _x = (expected_value);
    __asm__ __volatile("lock; cmpxchgq %1,%2;"
                       : "+a"(_x)
                       : "r"((int64_t)(new_value)),
                         "m"(*(volatile int64_t *)(addr))
                       : "cc", "memory");
    _x;
  });
}


x86 assembly (clang, -O0):
<CAS>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rdx
lock cmpxchg %rcx,(%rdx)
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAS>:
mov    %rsi,%rax
lock cmpxchg %rdx,(%rdi)
ret

LLVM IR (-O0):
define i8* @CAS(i8** %0, i8* %1, i8* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%9 = load i8*, i8** %5
store i8* %9, i8** %7
%10 = load i8*, i8** %7
%11 = load i8*, i8** %6
%12 = load i8**, i8*** %4
%13 = call i8* asm sideeffect "lock; cmpxchgq $1,$2;", "={ax},r,*m,0,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %11, i8** elementtype(i8*) %12, i8* %10)
store i8* %13, i8** %7
%14 = load i8*, i8** %7
store i8* %14, i8** %8
%15 = load i8*, i8** %8
ret i8* %15
}

LLVM IR (-O2):
define i8* @CAS(i8** %0, i8* %1, i8* %2) {
%4 = tail call i8* asm sideeffect "lock; cmpxchgq $1,$2;", "={ax},r,*m,0,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %2, i8** elementtype(i8*) %0, i8* %1)
ret i8* %4
}
/* Variables and functions */
double sin(double);
double BackEaseOut(double p) {
  double f = (1 - p);
  return 1 - (f * f * f - f * sin(f * 3.14159265358979323846264338327));
}


x86 assembly (clang, -O0):
<BackEaseOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeae(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
call   1030 <sin@plt>
movsd  -0x28(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm2
movaps %xmm0,%xmm3
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm3,%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  0xe5f(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BackEaseOut>:
sub    $0x18,%rsp
movsd  0xee4(%rip),%xmm1
subsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
movapd %xmm1,%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,0x10(%rsp)
movsd  0xecc(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1030 <sin@plt>
movsd  0x8(%rsp),%xmm2
mulsd  %xmm2,%xmm0
movsd  0x10(%rsp),%xmm1
mulsd  %xmm2,%xmm1
subsd  %xmm0,%xmm1
movsd  0xe9b(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @BackEaseOut(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fsub double 1.000000e+00, %4
store double %5, double* %3
%6 = load double, double* %3
%7 = load double, double* %3
%8 = fmul double %6, %7
%9 = load double, double* %3
%10 = load double, double* %3
%11 = load double, double* %3
%12 = fmul double %11, 0x400921FB54442D18
%13 = call double @sin(double %12)
%14 = fmul double %10, %13
%15 = fneg double %14
%16 = call double @llvm.fmuladd.f64(double %8, double %9, double %15)
%17 = fsub double 1.000000e+00, %16
ret double %17
}

LLVM IR (-O2):
define double @BackEaseOut(double %0) {
%2 = fsub double 1.000000e+00, %0
%3 = fmul double %2, %2
%4 = fmul double %2, 0x400921FB54442D18
%5 = tail call double @sin(double %4)
%6 = fneg double %2
%7 = fmul double %5, %6
%8 = tail call double @llvm.fmuladd.f64(double %3, double %2, double %7)
%9 = fsub double 1.000000e+00, %8
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ disable_key_interrupts(int);
int get_key_state(int key) {
  int res;
  unsigned short prev_mask;
  prev_mask = (*(unsigned short *)0x4000132);
  disable_key_interrupts(key);
  res = ~(*(unsigned short *)0x4000130) & key;
  (*(unsigned short *)0x4000132) = prev_mask;
  return res;
}


x86 assembly (clang, -O0):
<get_key_state>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4000132,%eax
mov    (%rax),%ax
mov    %ax,-0xa(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <disable_key_interrupts@plt>
mov    $0x4000130,%eax
movzwl (%rax),%eax
xor    $0xffffffff,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xa(%rbp),%cx
mov    $0x4000132,%eax
mov    %cx,(%rax)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_key_state>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
movzwl 0x4000132,%ebp
04
call   1030 <disable_key_interrupts@plt>
movzwl 0x4000130,%eax
04
not    %eax
and    %ebx,%eax
mov    %bp,0x4000132
04
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get_key_state(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %2
%5 = load i16, i16* inttoptr (i64 67109170 to i16*)
store i16 %5, i16* %4
%6 = load i32, i32* %2
%7 = call i32 @disable_key_interrupts(i32 %6)
%8 = load i16, i16* inttoptr (i64 67109168 to i16*)
%9 = zext i16 %8 to i32
%10 = xor i32 %9, -1
%11 = load i32, i32* %2
%12 = and i32 %10, %11
store i32 %12, i32* %3
%13 = load i16, i16* %4
store i16 %13, i16* inttoptr (i64 67109170 to i16*)
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @get_key_state(i32 %0) {
%2 = load i16, i16* inttoptr (i64 67109170 to i16*)
%3 = tail call i32 @disable_key_interrupts(i32 %0)
%4 = load i16, i16* inttoptr (i64 67109168 to i16*)
%5 = zext i16 %4 to i32
%6 = xor i32 %5, -1
%7 = and i32 %6, %0
store i16 %2, i16* inttoptr (i64 67109170 to i16*)
ret i32 %7
}
int notifier_list_add() { return 0; }


x86 assembly (clang, -O0):
<notifier_list_add>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<notifier_list_add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @notifier_list_add() {
ret i32 0
}

LLVM IR (-O2):
define i32 @notifier_list_add() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ uart_cfini();
int /*<<< orphan*/ usb_cfini();
void cfini(void) {
  usb_cfini();
  uart_cfini();
}


x86 assembly (clang, -O0):
<cfini>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <usb_cfini@plt>
mov    $0x0,%al
call   1030 <uart_cfini@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfini>:
push   %rax
xor    %eax,%eax
call   1040 <usb_cfini@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <uart_cfini@plt>

LLVM IR (-O0):
define void @cfini() {
%1 = call i32 (...) @usb_cfini()
%2 = call i32 (...) @uart_cfini()
ret void
}

LLVM IR (-O2):
define void @cfini() {
%1 = tail call i32 (...) @usb_cfini()
%2 = tail call i32 (...) @uart_cfini()
ret void
}
void f(void) {
  __attribute__((vector_size(16))) unsigned char shufflehi = {
      0x00, 0x01, 0x02, 0x03, 0x10, 0x11, 0x12, 0x13,
      0x04, 0x05, 0x06, 0x07, 0x14, 0x15, 0x16, 0x17};
  shufflehi;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movaps 0xef5(%rip),%xmm0
movaps %xmm0,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f() {
%1 = alloca <16 x i8>
store <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 16, i8 17, i8 18, i8 19, i8 4, i8 5, i8 6, i8 7, i8 20, i8 21, i8 22, i8 23>, <16 x i8>* %1
%2 = load <16 x i8>, <16 x i8>* %1
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
double kg2po(double d) { return (d * 1000) / 453.592; }


x86 assembly (clang, -O0):
<kg2po>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<kg2po>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @kg2po(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.000000e+03
%5 = fdiv double %4, 4.535920e+02
ret double %5
}

LLVM IR (-O2):
define double @kg2po(double %0) {
%2 = fmul double %0, 1.000000e+03
%3 = fdiv double %2, 4.535920e+02
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ _SC_LEVEL1_DCACHE_LINESIZE;
size_t sysconf(int /*<<< orphan*/);
const size_t cache_line_size() {
  size_t size;
  size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
  if (size == 0)
    size = 64;
  return 64;
}


x86 assembly (clang, -O0):
<cache_line_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113d <cache_line_size+0x2d>
movq   $0x40,-0x8(%rbp)
mov    $0x40,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_line_size>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    $0x40,%eax
pop    %rcx
ret

LLVM IR (-O0):
@_SC_LEVEL1_DCACHE_LINESIZE = global i32 0
define i64 @cache_line_size() {
%1 = alloca i64
%2 = load i32, i32* @_SC_LEVEL1_DCACHE_LINESIZE
%3 = call i64 @sysconf(i32 %2)
store i64 %3, i64* %1
%4 = load i64, i64* %1
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i64 64, i64* %1
br label %7
7: ; preds = %6, %0
ret i64 64
}

LLVM IR (-O2):
@_SC_LEVEL1_DCACHE_LINESIZE = global i32 0
define i64 @cache_line_size() {
%1 = load i32, i32* @_SC_LEVEL1_DCACHE_LINESIZE
%2 = tail call i64 @sysconf(i32 %1)
ret i64 64
}
/* Variables and functions */
int /*<<< orphan*/ createSll();
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char **argv) {
  printf("Hello world\n");
  printf("createSll returned %p\n", createSll());
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <createSll@plt>
mov    %eax,%esi
lea    0xec0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedf(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1050 <createSll@plt>
lea    0xeb5(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
@.str.1 = [23 x i8] c"createSll returned %p\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (...) @createSll()
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [23 x i8] c"createSll returned %p\0A\00"
@str = [12 x i8] c"Hello world\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @createSll()
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
scalar_t__ isspace(char);
char *scanWhite(char *inScan) {
  char *retval = inScan;
  while ('\0' != *retval && 0 == isspace(*retval)) {
    retval++;
  }
  return retval;
}


x86 assembly (clang, -O0):
<scanWhite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
xor    %ecx,%ecx
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
je     1154 <scanWhite+0x44>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1164 <scanWhite+0x54>
jmp    1175 <scanWhite+0x65>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <scanWhite+0x14>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scanWhite>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1139 <scanWhite+0x29>
nopw   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <isspace@plt>
test   %rax,%rax
jne    1139 <scanWhite+0x29>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <scanWhite+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @scanWhite(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 0, %8
br i1 %9, label %10, label %15
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = call i64 @isspace(i8 signext %12)
%14 = icmp eq i64 0, %13
br label %15
15: ; preds = %10, %5
%16 = phi i1 [ false, %5 ], [ %14, %10 ]
br i1 %16, label %17, label %20
17: ; preds = %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %5
20: ; preds = %15
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @scanWhite(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8 [ %11, %9 ], [ %2, %1 ]
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = tail call i64 @isspace(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %4 ]
ret i8* %14
}
unsigned rotate_left(unsigned x, int n) {
  int bits_of_unsigned = sizeof(unsigned) << 3;
  unsigned left_part = x << n;
  unsigned right_part = x >> (bits_of_unsigned - n - 1);
  right_part = right_part >> 1;
  return left_part | right_part;
}


x86 assembly (clang, -O0):
<rotate_left>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x20,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    -0x8(%rbp),%ecx
sub    $0x1,%ecx
shr    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
or     -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate_left>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
mov    $0x1f,%dl
sub    %cl,%dl
mov    %edx,%ecx
shr    %cl,%edi
shr    %edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotate_left(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 32, i32* %5
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = shl i32 %8, %9
store i32 %10, i32* %6
%11 = load i32, i32* %3
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
%15 = sub nsw i32 %14, 1
%16 = lshr i32 %11, %15
store i32 %16, i32* %7
%17 = load i32, i32* %7
%18 = lshr i32 %17, 1
store i32 %18, i32* %7
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = or i32 %19, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @rotate_left(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub i32 31, %1
%5 = lshr i32 %0, %4
%6 = lshr i32 %5, 1
%7 = or i32 %6, %3
ret i32 %7
}
int get_add_result(int x, int y) { return x + y; }


x86 assembly (clang, -O0):
<get_add_result>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_add_result>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @get_add_result(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_add_result(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int emms() {
  printf("urgs! emms() never should happen\n");
  exit(0);
}


x86 assembly (clang, -O0):
<emms>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<emms>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"urgs! emms() never should happen\0A\00"
define i32 @emms() {
%1 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [33 x i8] c"urgs! emms() never should happen\00"
define i32 @emms() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ min_byte1;
};
typedef TYPE_1__ XFontStruct;

/* Variables and functions */
unsigned get_XFontStruct_min_byte1(void *_p) {
  return (unsigned)((XFontStruct *)_p)->min_byte1;
}


x86 assembly (clang, -O0):
<get_XFontStruct_min_byte1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XFontStruct_min_byte1>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define i32 @get_XFontStruct_min_byte1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_XFontStruct_min_byte1(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
void *phys_to_virt(unsigned long x) { return (void *)((unsigned long)x); }


x86 assembly (clang, -O0):
<phys_to_virt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<phys_to_virt>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @phys_to_virt(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}

LLVM IR (-O2):
define i8* @phys_to_virt(i64 %0) {
%2 = inttoptr i64 %0 to i8*
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ log_finalize();
void libjudge_finalize() { log_finalize(); }


x86 assembly (clang, -O0):
<libjudge_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <log_finalize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<libjudge_finalize>:
xor    %eax,%eax
jmp    1030 <log_finalize@plt>

LLVM IR (-O0):
define void @libjudge_finalize() {
%1 = call i32 (...) @log_finalize()
ret void
}

LLVM IR (-O2):
define void @libjudge_finalize() {
%1 = tail call i32 (...) @log_finalize()
ret void
}
int calculo(int *x, int *y) {
  *x = *x + 2;
  *y = *y - 2;
  return (*x + *y);
}


x86 assembly (clang, -O0):
<calculo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x2,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
sub    $0x2,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculo>:
addl   $0x2,(%rdi)
mov    (%rsi),%eax
add    $0xfffffffe,%eax
mov    %eax,(%rsi)
add    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @calculo(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 2
%8 = load i32*, i32** %3
store i32 %7, i32* %8
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = sub nsw i32 %10, 2
%12 = load i32*, i32** %4
store i32 %11, i32* %12
%13 = load i32*, i32** %3
%14 = load i32, i32* %13
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = add nsw i32 %14, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @calculo(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = add nsw i32 %3, 2
store i32 %4, i32* %0
%5 = load i32, i32* %1
%6 = add nsw i32 %5, -2
store i32 %6, i32* %1
%7 = load i32, i32* %0
%8 = add nsw i32 %7, %6
ret i32 %8
}