xunge/DecIR huggingface dataset:
_Complex float test_ccoshf(_Complex float x) { return __builtin_ccoshf(x); }


x86 assembly (clang, -O0):
<test_ccoshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movlpd %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  %xmm1,-0x18(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <ccoshf@plt>
movlpd %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm1
movss  -0x1c(%rbp),%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ccoshf>:
jmp    1030 <ccoshf@plt>

LLVM IR (-O0):
define <2 x float> @test_ccoshf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = alloca { float, float }
%6 = bitcast { float, float }* %3 to <2 x float>*
store <2 x float> %0, <2 x float>* %6
%7 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%8 = load float, float* %7
%9 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
%10 = load float, float* %9
%11 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%12 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
store float %8, float* %11
store float %10, float* %12
%13 = bitcast { float, float }* %4 to <2 x float>*
%14 = load <2 x float>, <2 x float>* %13
%15 = call <2 x float> @ccoshf(<2 x float> %14)
%16 = bitcast { float, float }* %5 to <2 x float>*
store <2 x float> %15, <2 x float>* %16
%17 = getelementptr inbounds { float, float }, { float, float }* %5, i32 0, i32 0
%18 = load float, float* %17
%19 = getelementptr inbounds { float, float }, { float, float }* %5, i32 0, i32 1
%20 = load float, float* %19
%21 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%22 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
store float %18, float* %21
store float %20, float* %22
%23 = bitcast { float, float }* %2 to <2 x float>*
%24 = load <2 x float>, <2 x float>* %23
ret <2 x float> %24
}

LLVM IR (-O2):
define <2 x float> @test_ccoshf(<2 x float> %0) {
%2 = tail call <2 x float> @ccoshf(<2 x float> %0)
ret <2 x float> %2
}
/* Variables and functions */
int bar(int);
int foo(int a) { return 2 * bar(a); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bar@plt>
shl    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
call   1030 <bar@plt>
add    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bar(i32 %3)
%5 = mul nsw i32 2, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = tail call i32 @bar(i32 %0)
%3 = shl nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
double log(double);
double correctedDivergence(double K) {
  if (K >= 0.75) {
    return 5;
  } else {
    return -0.75 * log(1.0 - (4.0 / 3.0) * K);
  }
}


x86 assembly (clang, -O0):
<correctedDivergence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1146 <correctedDivergence+0x36>
movsd  0xee4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    117c <correctedDivergence+0x6c>
movsd  -0x10(%rbp),%xmm0
movsd  0xebd(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb9(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  0xe95(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<correctedDivergence>:
push   %rax
ucomisd 0xeef(%rip),%xmm0
jae    113a <correctedDivergence+0x2a>
mulsd  0xeed(%rip),%xmm0
addsd  0xeed(%rip),%xmm0
call   1030 <log@plt>
mulsd  0xee8(%rip),%xmm0
pop    %rax
ret
movsd  0xebe(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @correctedDivergence(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 7.500000e-01
br i1 %5, label %6, label %7
6: ; preds = %1
store double 5.000000e+00, double* %2
br label %12
7: ; preds = %1
%8 = load double, double* %3
%9 = call double @llvm.fmuladd.f64(double 0xBFF5555555555555, double %8, double 1.000000e+00)
%10 = call double @log(double %9)
%11 = fmul double -7.500000e-01, %10
store double %11, double* %2
br label %12
12: ; preds = %7, %6
%13 = load double, double* %2
ret double %13
}

LLVM IR (-O2):
define double @correctedDivergence(double %0) {
%2 = fcmp ult double %0, 7.500000e-01
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call double @llvm.fmuladd.f64(double %0, double 0xBFF5555555555555, double 1.000000e+00)
%5 = tail call double @log(double %4)
%6 = fmul double %5, -7.500000e-01
br label %7
7: ; preds = %1, %3
%8 = phi double [ %6, %3 ], [ 5.000000e+00, %1 ]
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ __NR_epoll_create;
int syscall(int /*<<< orphan*/, int);
int epoll_create(int size) { return (syscall(__NR_epoll_create, size)); }


x86 assembly (clang, -O0):
<epoll_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epoll_create>:
mov    %edi,%esi
mov    0x2ed7(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_epoll_create = global i32 0
define i32 @epoll_create(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @__NR_epoll_create
%4 = load i32, i32* %2
%5 = call i32 @syscall(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@__NR_epoll_create = global i32 0
define i32 @epoll_create(i32 %0) {
%2 = load i32, i32* @__NR_epoll_create
%3 = tail call i32 @syscall(i32 %2, i32 %0)
ret i32 %3
}
/* Type definitions */
struct rtrie__view {
  int dummy;
};

/* Variables and functions */
int goto_node_zero(struct rtrie__view *);
int rtrie__iter(struct rtrie__view *t) { return goto_node_zero(t); }


x86 assembly (clang, -O0):
<rtrie__iter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <goto_node_zero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtrie__iter>:
jmp    1030 <goto_node_zero@plt>

LLVM IR (-O0):
%struct.rtrie__view = type { i32 }
define i32 @rtrie__iter(%struct.rtrie__view* %0) {
%2 = alloca %struct.rtrie__view*
store %struct.rtrie__view* %0, %struct.rtrie__view** %2
%3 = load %struct.rtrie__view*, %struct.rtrie__view** %2
%4 = call i32 @goto_node_zero(%struct.rtrie__view* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.rtrie__view = type { i32 }
define i32 @rtrie__iter(%struct.rtrie__view* %0) {
%2 = tail call i32 @goto_node_zero(%struct.rtrie__view* %0)
ret i32 %2
}
int gf_set_null_gradient(void **data_ptr) {
  double **grad_ptr = (double **)data_ptr;
  (*grad_ptr)[0] = -9999.0;
  (*grad_ptr)[1] = -9999.0;
  grad_ptr[0] += 2;
  return 0;
}


x86 assembly (clang, -O0):
<gf_set_null_gradient>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsd  0xee1(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsd  0xece(%rip),%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x10,%rcx
mov    %rcx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf_set_null_gradient>:
mov    (%rdi),%rax
movaps 0xef6(%rip),%xmm0
movups %xmm0,(%rax)
add    $0x10,%rax
mov    %rax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gf_set_null_gradient(i8** %0) {
%2 = alloca i8**
%3 = alloca double**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = bitcast i8** %4 to double**
store double** %5, double*** %3
%6 = load double**, double*** %3
%7 = load double*, double** %6
%8 = getelementptr inbounds double, double* %7, i64 0
store double -9.999000e+03, double* %8
%9 = load double**, double*** %3
%10 = load double*, double** %9
%11 = getelementptr inbounds double, double* %10, i64 1
store double -9.999000e+03, double* %11
%12 = load double**, double*** %3
%13 = getelementptr inbounds double*, double** %12, i64 0
%14 = load double*, double** %13
%15 = getelementptr inbounds double, double* %14, i64 2
store double* %15, double** %13
ret i32 0
}

LLVM IR (-O2):
define i32 @gf_set_null_gradient(i8** nocapture %0) {
%2 = bitcast i8** %0 to double**
%3 = load double*, double** %2
%4 = bitcast double* %3 to <2 x double>*
store <2 x double> <double -9.999000e+03, double -9.999000e+03>, <2 x double>* %4
%5 = getelementptr inbounds double, double* %3, i64 2
store double* %5, double** %2
ret i32 0
}
int KBtoByte(int kb) { return (kb * 1024); }


x86 assembly (clang, -O0):
<KBtoByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<KBtoByte>:
mov    %edi,%eax
shl    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @KBtoByte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1024
ret i32 %4
}

LLVM IR (-O2):
define i32 @KBtoByte(i32 %0) {
%2 = shl nsw i32 %0, 10
ret i32 %2
}
cmd_last(arg) char *arg;
{
  int nr_lines;
  if (arg)
    nr_lines = atoi(arg);
  else
    nr_lines = 0;
  show_last(nr_lines);
}


x86 assembly (clang, -O0):
<cmd_last>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114a <cmd_last+0x2a>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
jmp    1151 <cmd_last+0x31>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x0,%al
call   1030 <show_last@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_last>:
test   %rdi,%rdi
je     113a <cmd_last+0x1a>
push   %rax
xor    %eax,%eax
call   1040 <atoi@plt>
mov    %eax,%edi
add    $0x8,%rsp
xor    %eax,%eax
jmp    1030 <show_last@plt>
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <show_last@plt>

LLVM IR (-O0):
define i32 @cmd_last(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 (i8*, ...) bitcast (i32 (...)* @atoi to i32 (i8*, ...)*)(i8* %8)
store i32 %9, i32* %4
br label %11
10: ; preds = %1
store i32 0, i32* %4
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %4
%13 = call i32 (i32, ...) bitcast (i32 (...)* @show_last to i32 (i32, ...)*)(i32 %12)
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @cmd_last(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @atoi to i32 (i8*, ...)*)(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @show_last to i32 (i32, ...)*)(i32 %6)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ __disable_irq();
void port_suspend(void) { __disable_irq(); }


x86 assembly (clang, -O0):
<port_suspend>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__disable_irq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_suspend>:
xor    %eax,%eax
jmp    1030 <__disable_irq@plt>

LLVM IR (-O0):
define void @port_suspend() {
%1 = call i32 (...) @__disable_irq()
ret void
}

LLVM IR (-O2):
define void @port_suspend() {
%1 = tail call i32 (...) @__disable_irq()
ret void
}
void HalfFloatRow_C() {}


x86 assembly (clang, -O0):
<HalfFloatRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HalfFloatRow_C>:
ret

LLVM IR (-O0):
define void @HalfFloatRow_C() {
ret void
}

LLVM IR (-O2):
define void @HalfFloatRow_C() {
ret void
}
int incre(int i) { return (i + 1) % 100; }


x86 assembly (clang, -O0):
<incre>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<incre>:
add    $0x1,%edi
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rcx
add    %edx,%ecx
imul   $0x64,%ecx,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @incre(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = srem i32 %4, 100
ret i32 %5
}

LLVM IR (-O2):
define i32 @incre(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = srem i32 %2, 100
ret i32 %3
}
void p1() {}


x86 assembly (clang, -O0):
<p1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p1>:
ret

LLVM IR (-O0):
define void @p1() {
ret void
}

LLVM IR (-O2):
define void @p1() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ libcperciva_HMAC_SHA256_Buf(int /*<<< orphan*/ const *const,
                                               int,
                                               int /*<<< orphan*/ const *const,
                                               size_t const,
                                               int /*<<< orphan*/ *const);
void mpw_core_compute_hmac(uint8_t const *const masterKey,
                           uint8_t const *const sitePasswordInfo,
                           const size_t sitePasswordInfoLength,
                           uint8_t *const sitePasswordSeed) {
  do {
  } while (0);
  do {
  } while (0);
  libcperciva_HMAC_SHA256_Buf(masterKey, 64, sitePasswordInfo,
                              sitePasswordInfoLength, sitePasswordSeed);
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<mpw_core_compute_hmac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
jmp    112d <mpw_core_compute_hmac+0x1d>
jmp    1132 <mpw_core_compute_hmac+0x22>
jmp    1137 <mpw_core_compute_hmac+0x27>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    $0x40,%esi
call   1030 <libcperciva_HMAC_SHA256_Buf@plt>
jmp    1156 <mpw_core_compute_hmac+0x46>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpw_core_compute_hmac>:
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    $0x40,%esi
jmp    1030 <libcperciva_HMAC_SHA256_Buf@plt>

LLVM IR (-O0):
define void @mpw_core_compute_hmac(i32* %0, i32* %1, i64 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i64 %2, i64* %7
store i32* %3, i32** %8
br label %9
9: ; preds = %4
br label %10
10: ; preds = %9
br label %11
11: ; preds = %10
br label %12
12: ; preds = %11
%13 = load i32*, i32** %5
%14 = load i32*, i32** %6
%15 = load i64, i64* %7
%16 = load i32*, i32** %8
%17 = call i32 @libcperciva_HMAC_SHA256_Buf(i32* %13, i32 64, i32* %14, i64 %15, i32* %16)
br label %18
18: ; preds = %12
br label %19
19: ; preds = %18
ret void
}

LLVM IR (-O2):
define void @mpw_core_compute_hmac(i32* %0, i32* %1, i64 %2, i32* %3) {
%5 = tail call i32 @libcperciva_HMAC_SHA256_Buf(i32* %0, i32 64, i32* %1, i64 %2, i32* %3)
ret void
}
/* Type definitions */
struct rq_pricing_result {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct rq_pricing_result *);
int /*<<< orphan*/ rq_pricing_result_free_data(struct rq_pricing_result *);
void rq_pricing_result_free(struct rq_pricing_result *pricing_result) {
  rq_pricing_result_free_data(pricing_result);
  free(pricing_result);
}


x86 assembly (clang, -O0):
<rq_pricing_result_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <rq_pricing_result_free_data@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rq_pricing_result_free>:
push   %rbx
mov    %rdi,%rbx
call   1040 <rq_pricing_result_free_data@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.rq_pricing_result = type { i32 }
define void @rq_pricing_result_free(%struct.rq_pricing_result* %0) {
%2 = alloca %struct.rq_pricing_result*
store %struct.rq_pricing_result* %0, %struct.rq_pricing_result** %2
%3 = load %struct.rq_pricing_result*, %struct.rq_pricing_result** %2
%4 = call i32 @rq_pricing_result_free_data(%struct.rq_pricing_result* %3)
%5 = load %struct.rq_pricing_result*, %struct.rq_pricing_result** %2
%6 = call i32 @free(%struct.rq_pricing_result* %5)
ret void
}

LLVM IR (-O2):
%struct.rq_pricing_result = type { i32 }
define void @rq_pricing_result_free(%struct.rq_pricing_result* %0) {
%2 = tail call i32 @rq_pricing_result_free_data(%struct.rq_pricing_result* %0)
%3 = tail call i32 @free(%struct.rq_pricing_result* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _eml_parse822_is_ctl(char);
int /*<<< orphan*/ _eml_parse822_is_space(char);
int /*<<< orphan*/ _eml_parse822_is_special(char);
int _eml_parse822_is_atom_char_ex(char c) {
  return !_eml_parse822_is_special(c) && !_eml_parse822_is_space(c) &&
         !_eml_parse822_is_ctl(c);
}


x86 assembly (clang, -O0):
<_eml_parse822_is_atom_char_ex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <_eml_parse822_is_special@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
jne    1184 <_eml_parse822_is_atom_char_ex+0x54>
movsbl -0x1(%rbp),%edi
call   1040 <_eml_parse822_is_space@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
jne    1184 <_eml_parse822_is_atom_char_ex+0x54>
movsbl -0x1(%rbp),%edi
call   1050 <_eml_parse822_is_ctl@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_eml_parse822_is_atom_char_ex>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1030 <_eml_parse822_is_special@plt>
xor    %ebx,%ebx
test   %eax,%eax
jne    115d <_eml_parse822_is_atom_char_ex+0x2d>
movsbl %bpl,%ebp
mov    %ebp,%edi
call   1040 <_eml_parse822_is_space@plt>
test   %eax,%eax
jne    115d <_eml_parse822_is_atom_char_ex+0x2d>
mov    %ebp,%edi
call   1050 <_eml_parse822_is_ctl@plt>
xor    %ebx,%ebx
test   %eax,%eax
sete   %bl
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_eml_parse822_is_atom_char_ex(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @_eml_parse822_is_special(i8 signext %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i32 @_eml_parse822_is_space(i8 signext %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = call i32 @_eml_parse822_is_ctl(i8 signext %11)
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
br label %15
15: ; preds = %10, %6, %1
%16 = phi i1 [ false, %6 ], [ false, %1 ], [ %14, %10 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @_eml_parse822_is_atom_char_ex(i8 signext %0) {
%2 = tail call i32 @_eml_parse822_is_special(i8 signext %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i32 @_eml_parse822_is_space(i8 signext %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = tail call i32 @_eml_parse822_is_ctl(i8 signext %0)
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 0, %4 ], [ 0, %1 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int sizeX();
int strlen(char *);
int centerX(char *txt) { return (sizeX() - strlen(txt)) / 2; }


x86 assembly (clang, -O0):
<centerX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <sizeX@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<centerX>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <sizeX@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <strlen@plt>
sub    %eax,%ebp
mov    %ebp,%eax
shr    $0x1f,%eax
add    %ebp,%eax
sar    %eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @centerX(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @sizeX()
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sub nsw i32 %3, %5
%7 = sdiv i32 %6, 2
ret i32 %7
}

LLVM IR (-O2):
define i32 @centerX(i8* %0) {
%2 = tail call i32 (...) @sizeX()
%3 = tail call i32 @strlen(i8* %0)
%4 = sub nsw i32 %2, %3
%5 = sdiv i32 %4, 2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char const);
void ft_putstr(char const *s) {
  int i;
  i = 0;
  while (s[i])
    ft_putchar(s[i++]);
}


x86 assembly (clang, -O0):
<ft_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1155 <ft_putstr+0x45>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <ft_putchar@plt>
jmp    1123 <ft_putstr+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <ft_putstr+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <ft_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <ft_putstr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_putstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @ft_putchar(i8 signext %17)
br label %4
19: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ft_putstr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = add nuw i64 %5, 1
%8 = tail call i32 @ft_putchar(i8 signext %6)
%9 = getelementptr inbounds i8, i8* %0, i64 %7
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Type definitions */
struct programmer_t {
  int dummy;
};

/* Variables and functions */
int buspirate_bb_setpin(struct programmer_t *, int, int);
int buspirate_bb_highpulsepin(struct programmer_t *pgm, int pinfunc) {
  int ret;
  ret = buspirate_bb_setpin(pgm, pinfunc, 1);
  if (ret < 0)
    return ret;
  return buspirate_bb_setpin(pgm, pinfunc, 0);
}


x86 assembly (clang, -O0):
<buspirate_bb_highpulsepin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    $0x1,%edx
call   1030 <buspirate_bb_setpin@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jge    1148 <buspirate_bb_highpulsepin+0x38>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <buspirate_bb_highpulsepin+0x49>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
xor    %edx,%edx
call   1030 <buspirate_bb_setpin@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buspirate_bb_highpulsepin>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x1,%edx
call   1030 <buspirate_bb_setpin@plt>
test   %eax,%eax
js     1138 <buspirate_bb_highpulsepin+0x28>
mov    %rbx,%rdi
mov    %ebp,%esi
xor    %edx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <buspirate_bb_setpin@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.programmer_t = type { i32 }
define i32 @buspirate_bb_highpulsepin(%struct.programmer_t* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.programmer_t*
%5 = alloca i32
%6 = alloca i32
store %struct.programmer_t* %0, %struct.programmer_t** %4
store i32 %1, i32* %5
%7 = load %struct.programmer_t*, %struct.programmer_t** %4
%8 = load i32, i32* %5
%9 = call i32 @buspirate_bb_setpin(%struct.programmer_t* %7, i32 %8, i32 1)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* %6
store i32 %13, i32* %3
br label %18
14: ; preds = %2
%15 = load %struct.programmer_t*, %struct.programmer_t** %4
%16 = load i32, i32* %5
%17 = call i32 @buspirate_bb_setpin(%struct.programmer_t* %15, i32 %16, i32 0)
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
%struct.programmer_t = type { i32 }
define i32 @buspirate_bb_highpulsepin(%struct.programmer_t* %0, i32 %1) {
%3 = tail call i32 @buspirate_bb_setpin(%struct.programmer_t* %0, i32 %1, i32 1)
%4 = icmp slt i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @buspirate_bb_setpin(%struct.programmer_t* %0, i32 %1, i32 0)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ %3, %2 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
int main() {
  FILE *fp;
  fp = fopen("test.txt", "a");
  fprintf(fp, "Testing...\n");
  fclose(fp);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    0xec3(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb1(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rdi
lea    0xeca(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,%rbx
lea    0xebd(%rip),%rdi
mov    $0xb,%esi
mov    $0x1,%edx
mov    %rax,%rcx
call   1050 <fwrite@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"test.txt\00"
@.str.1 = [2 x i8] c"a\00"
@.str.2 = [12 x i8] c"Testing...\0A\00"
define i32 @main() {
%1 = alloca i32*
%2 = call i32* @fopen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0))
%5 = load i32*, i32** %1
%6 = call i32 @fclose(i32* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"test.txt\00"
@.str.1 = [2 x i8] c"a\00"
@.str.2 = [12 x i8] c"Testing...\0A\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i64 11, i64 1, i32* %1)
%3 = tail call i32 @fclose(i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void MonoalphabeticCleanUp(char *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<MonoalphabeticCleanUp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MonoalphabeticCleanUp>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @MonoalphabeticCleanUp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @MonoalphabeticCleanUp(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int rec_string_laenge(char *string, int i) {
  if (string[i] == '\0') {
    return 0;
  } else {
    return 1 + rec_string_laenge(string, i + 1);
  }
}


x86 assembly (clang, -O0):
<rec_string_laenge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
jne    1140 <rec_string_laenge+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1155 <rec_string_laenge+0x45>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
call   1030 <rec_string_laenge@plt>
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rec_string_laenge>:
movslq %esi,%rax
cmpb   $0x0,(%rdi,%rax,1)
je     112b <rec_string_laenge+0x2b>
lea    (%rax,%rdi,1),%rcx
add    $0x1,%rcx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
cmpb   $0x0,(%rcx,%rax,1)
lea    0x1(%rax),%rax
jne    1120 <rec_string_laenge+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rec_string_laenge(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = load i32, i32* %5
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %20
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
%18 = call i32 @rec_string_laenge(i8* %15, i32 %17)
%19 = add nsw i32 1, %18
store i32 %19, i32* %3
br label %20
20: ; preds = %14, %13
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @rec_string_laenge(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %2, %7
%8 = phi i64 [ %10, %7 ], [ %3, %2 ]
%9 = phi i32 [ %11, %7 ], [ 0, %2 ]
%10 = add i64 %8, 1
%11 = add nuw nsw i32 %9, 1
%12 = getelementptr inbounds i8, i8* %0, i64 %10
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %2
%16 = phi i32 [ 0, %2 ], [ %11, %7 ]
ret i32 %16
}
void FCEU_PutImageDummy(void) {}


x86 assembly (clang, -O0):
<FCEU_PutImageDummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FCEU_PutImageDummy>:
ret

LLVM IR (-O0):
define void @FCEU_PutImageDummy() {
ret void
}

LLVM IR (-O2):
define void @FCEU_PutImageDummy() {
ret void
}
int hal_pwm_init(void) { return 0; }


x86 assembly (clang, -O0):
<hal_pwm_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_pwm_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hal_pwm_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hal_pwm_init() {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t mulMod(uint32_t a, uint32_t b, uint32_t m) {
  return (uint32_t)(((uint64_t)a * b) % m);
}


x86 assembly (clang, -O0):
<mulMod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mulMod>:
mov    %edx,%ecx
mov    %edi,%eax
imul   %esi,%eax
cltd
idiv   %ecx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @mulMod(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = srem i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @mulMod(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %1, %0
%5 = srem i32 %4, %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ nio_pixel_set(int const, int const, unsigned int const);
void nio_vram_pixel_set(const int x, const int y, const unsigned int color) {
  nio_pixel_set(x, y, color);
}


x86 assembly (clang, -O0):
<nio_vram_pixel_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <nio_pixel_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nio_vram_pixel_set>:
jmp    1030 <nio_pixel_set@plt>

LLVM IR (-O0):
define void @nio_vram_pixel_set(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @nio_pixel_set(i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @nio_vram_pixel_set(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @nio_pixel_set(i32 %0, i32 %1, i32 %2)
ret void
}
void fc214(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
  a : {
    typedef int(*h)[n];
    0;
  };
    goto a;
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc214>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fc214+0x7>

x86 assembly (clang, -O2):
<fc214>:
jmp    1100 <fc214>

LLVM IR (-O0):
define void @fc214(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = load i32, i32* %2
%12 = zext i32 %11 to i64
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
br label %15
15: ; preds = %15, %1
%16 = load i32, i32* %2
%17 = zext i32 %16 to i64
br label %15
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc214(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
unsigned int dictGenHashFunction(unsigned char *, int /*<<< orphan*/);
int /*<<< orphan*/ wstrlen(char *);
unsigned int dictWstrHash(const void *key) {
  return dictGenHashFunction((unsigned char *)key, wstrlen((char *)key));
}


x86 assembly (clang, -O0):
<dictWstrHash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wstrlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <dictGenHashFunction@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dictWstrHash>:
push   %rbx
mov    %rdi,%rbx
call   1030 <wstrlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <dictGenHashFunction@plt>

LLVM IR (-O0):
define i32 @dictWstrHash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @wstrlen(i8* %4)
%6 = call i32 @dictGenHashFunction(i8* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @dictWstrHash(i8* %0) {
%2 = tail call i32 @wstrlen(i8* %0)
%3 = tail call i32 @dictGenHashFunction(i8* %0, i32 %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int hea_test_u64_bit(int /*<<< orphan*/ const, int);
int hea_cq_aer_cq_invalid_link_err_check(const __u64 *aer) {
  return hea_test_u64_bit(*aer, 1);
}


x86 assembly (clang, -O0):
<hea_cq_aer_cq_invalid_link_err_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    $0x1,%esi
call   1030 <hea_test_u64_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hea_cq_aer_cq_invalid_link_err_check>:
mov    (%rdi),%edi
mov    $0x1,%esi
jmp    1030 <hea_test_u64_bit@plt>

LLVM IR (-O0):
define i32 @hea_cq_aer_cq_invalid_link_err_check(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @hea_test_u64_bit(i32 %4, i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @hea_cq_aer_cq_invalid_link_err_check(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @hea_test_u64_bit(i32 %2, i32 1)
ret i32 %3
}
void eerror(n) const char *n;
{
  errsay();
  perror(n);
  eflush();
}


x86 assembly (clang, -O0):
<eerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <errsay@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <perror@plt>
mov    $0x0,%al
call   1030 <eflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eerror>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <errsay@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <perror@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <eflush@plt>

LLVM IR (-O0):
define void @eerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @errsay()
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @perror to i32 (i8*, ...)*)(i8* %4)
%6 = call i32 (...) @eflush()
ret void
}

LLVM IR (-O2):
define void @eerror(i8* %0) {
%2 = tail call i32 (...) @errsay()
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @perror to i32 (i8*, ...)*)(i8* %0)
%4 = tail call i32 (...) @eflush()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char *, int);
long get_prevadr(char *c) {
  long ad;
  memcpy((unsigned char *)&ad, (unsigned char *)(c - sizeof(long)),
         sizeof(long));
  return ad;
}


x86 assembly (clang, -O0):
<get_prevadr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
add    $0xfffffffffffffff8,%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_prevadr>:
push   %rax
lea    -0x8(%rdi),%rsi
mov    %rsp,%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @get_prevadr(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = bitcast i64* %3 to i8*
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 -8
%7 = call i32 @memcpy(i8* %4, i8* %6, i32 8)
%8 = load i64, i64* %3
ret i64 %8
}

LLVM IR (-O2):
define i64 @get_prevadr(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = getelementptr inbounds i8, i8* %0, i64 -8
%5 = call i32 @memcpy(i8* %3, i8* %4, i32 8)
%6 = load i64, i64* %2
ret i64 %6
}
int ft_lerpi(int first, int second, double p) {
  if (first == second)
    return (first);
  return ((int)((double)first + (second - first) * p));
}


x86 assembly (clang, -O0):
<ft_lerpi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1126 <ft_lerpi+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1149 <ft_lerpi+0x49>
cvtsi2sdl -0x8(%rbp),%xmm1
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_lerpi>:
mov    %esi,%eax
mov    %esi,%ecx
sub    %edi,%ecx
je     111c <ft_lerpi+0x1c>
cvtsi2sd %edi,%xmm1
cvtsi2sd %ecx,%xmm2
mulsd  %xmm0,%xmm2
addsd  %xmm1,%xmm2
cvttsd2si %xmm2,%eax
ret

LLVM IR (-O0):
define i32 @ft_lerpi(i32 %0, i32 %1, double %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca double
store i32 %0, i32* %5
store i32 %1, i32* %6
store double %2, double* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %5
store i32 %12, i32* %4
br label %23
13: ; preds = %3
%14 = load i32, i32* %5
%15 = sitofp i32 %14 to double
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = sub nsw i32 %16, %17
%19 = sitofp i32 %18 to double
%20 = load double, double* %7
%21 = call double @llvm.fmuladd.f64(double %19, double %20, double %15)
%22 = fptosi double %21 to i32
store i32 %22, i32* %4
br label %23
23: ; preds = %13, %11
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_lerpi(i32 %0, i32 %1, double %2) {
%4 = icmp eq i32 %1, %0
br i1 %4, label %11, label %5
5: ; preds = %3
%6 = sitofp i32 %0 to double
%7 = sub nsw i32 %1, %0
%8 = sitofp i32 %7 to double
%9 = tail call double @llvm.fmuladd.f64(double %8, double %2, double %6)
%10 = fptosi double %9 to i32
br label %11
11: ; preds = %3, %5
%12 = phi i32 [ %10, %5 ], [ %1, %3 ]
ret i32 %12
}
void gtk_cell_renderer_combo_get_type() {}


x86 assembly (clang, -O0):
<gtk_cell_renderer_combo_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_cell_renderer_combo_get_type>:
ret

LLVM IR (-O0):
define void @gtk_cell_renderer_combo_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_cell_renderer_combo_get_type() {
ret void
}
void arch_halt() {
  for (;;)
    asm volatile("hlt");
}


x86 assembly (clang, -O0):
<arch_halt>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <arch_halt+0x9>
hlt
jmp    1109 <arch_halt+0x9>

x86 assembly (clang, -O2):
<arch_halt>:
hlt
jmp    1100 <arch_halt>

LLVM IR (-O0):
define void @arch_halt() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @arch_halt() {
br label %1
1: ; preds = %1, %0
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void sigquit_handler(int sig) {
  printf("Terminating after receipt of SIGQUIT signal\n");
  exit(1);
}


x86 assembly (clang, -O0):
<sigquit_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sigquit_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"Terminating after receipt of SIGQUIT signal\0A\00"
define void @sigquit_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [44 x i8] c"Terminating after receipt of SIGQUIT signal\00"
define void @sigquit_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t logger_disabled_zero(void) { return (0); }


x86 assembly (clang, -O0):
<logger_disabled_zero>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logger_disabled_zero>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @logger_disabled_zero() {
ret i32 0
}

LLVM IR (-O2):
define i32 @logger_disabled_zero() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ outArrInt(int *, int);
int /*<<< orphan*/ printf(char *);
void outTriangularMat(int **xs, int size) {
  for (int i = 0; i < size; i++)
    outArrInt(xs[i], i + 1);
  printf("\n");
}


x86 assembly (clang, -O0):
<outTriangularMat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1167 <outTriangularMat+0x47>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x10(%rbp),%esi
add    $0x1,%esi
call   1040 <outArrInt@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <outTriangularMat+0x16>
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outTriangularMat>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1154 <outTriangularMat+0x34>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
add    $0x1,%rbx
mov    %ebx,%esi
call   1040 <outArrInt@plt>
cmp    %rbx,%r15
jne    1140 <outTriangularMat+0x20>
mov    $0xa,%edi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @outTriangularMat(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
%18 = call i32 @outArrInt(i32* %15, i32 %17)
br label %19
19: ; preds = %10
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
%23 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @outTriangularMat(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %12, %8 ]
%10 = getelementptr inbounds i32*, i32** %0, i64 %9
%11 = load i32*, i32** %10
%12 = add nuw nsw i64 %9, 1
%13 = trunc i64 %12 to i32
%14 = tail call i32 @outArrInt(i32* %11, i32 %13)
%15 = icmp eq i64 %12, %5
br i1 %15, label %6, label %8
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char const *, char *, int *);
int asciiToInt(const char *str) {
  int result;
  sscanf(str, "%d", &result);
  return result;
}


x86 assembly (clang, -O0):
<asciiToInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <sscanf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asciiToInt>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <sscanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @asciiToInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @asciiToInt(i8* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __libc_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<__libc_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @__libc_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @__libc_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memtrap_remove() {
  printf("NOT IMPLEMENTED:"
         "pa_memtrap_remove"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memtrap_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memtrap_remove>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"NOT IMPLEMENTED:pa_memtrap_remove\0A\00"
define i32 @pa_memtrap_remove() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [34 x i8] c"NOT IMPLEMENTED:pa_memtrap_remove\00"
define i32 @pa_memtrap_remove() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret i32 undef
}