int dowX2U(b)
register char b;
{
  register int n;
  for (n = 1; (!(b & 1)) && n < 8; n++, b = b >> 1)
    ;
  if (n == 7)
    n = 0;
  if (n == 8)
    n = 7;
  return (n);
}


x86 assembly (clang, -O0):
<dowX2U>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x1,-0x8(%rbp)
movsbl -0x1(%rbp),%ecx
and    $0x1,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1130 <dowX2U+0x30>
cmpl   $0x8,-0x8(%rbp)
setl   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1140 <dowX2U+0x40>
jmp    115d <dowX2U+0x5d>
jmp    1145 <dowX2U+0x45>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
sar    $0x1,%eax
mov    %al,-0x1(%rbp)
jmp    1111 <dowX2U+0x11>
cmpl   $0x7,-0x8(%rbp)
jne    116e <dowX2U+0x6e>
movl   $0x0,-0x8(%rbp)
cmpl   $0x8,-0x8(%rbp)
jne    117f <dowX2U+0x7f>
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dowX2U>:
mov    $0x1,%eax
test   $0x1,%dil
jne    118f <dowX2U+0x8f>
test   $0x2,%dil
jne    1143 <dowX2U+0x43>
test   $0x4,%dil
jne    1154 <dowX2U+0x54>
test   $0x8,%dil
jne    1165 <dowX2U+0x65>
test   $0x10,%dil
jne    1176 <dowX2U+0x76>
test   $0x20,%dil
jne    1190 <dowX2U+0x90>
xor    %eax,%eax
test   $0x40,%dil
sete   %al
lea    0x6(%rax),%ecx
add    $0x7,%eax
cmp    $0x6,%ecx
jne    1185 <dowX2U+0x85>
jmp    119f <dowX2U+0x9f>
mov    $0x2,%eax
mov    $0x1,%ecx
cmp    $0x6,%ecx
jne    1185 <dowX2U+0x85>
jmp    119f <dowX2U+0x9f>
mov    $0x3,%eax
mov    $0x2,%ecx
cmp    $0x6,%ecx
jne    1185 <dowX2U+0x85>
jmp    119f <dowX2U+0x9f>
mov    $0x4,%eax
mov    $0x3,%ecx
cmp    $0x6,%ecx
jne    1185 <dowX2U+0x85>
jmp    119f <dowX2U+0x9f>
mov    $0x5,%eax
mov    $0x4,%ecx
cmp    $0x6,%ecx
je     119f <dowX2U+0x9f>
cmp    $0x7,%ecx
jne    118f <dowX2U+0x8f>
mov    $0x7,%eax
ret
mov    $0x6,%eax
mov    $0x5,%ecx
cmp    $0x6,%ecx
jne    1185 <dowX2U+0x85>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dowX2U(i32 %0) {
%2 = alloca i8
%3 = alloca i32
%4 = trunc i32 %0 to i8
store i8 %4, i8* %2
store i32 1, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = and i32 %7, 1
%9 = icmp ne i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = load i32, i32* %3
%12 = icmp slt i32 %11, 8
br label %13
13: ; preds = %10, %5
%14 = phi i1 [ false, %5 ], [ %12, %10 ]
br i1 %14, label %15, label %23
15: ; preds = %13
br label %16
16: ; preds = %15
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = ashr i32 %20, 1
%22 = trunc i32 %21 to i8
store i8 %22, i8* %2
br label %5
23: ; preds = %13
%24 = load i32, i32* %3
%25 = icmp eq i32 %24, 7
br i1 %25, label %26, label %27
26: ; preds = %23
store i32 0, i32* %3
br label %27
27: ; preds = %26, %23
%28 = load i32, i32* %3
%29 = icmp eq i32 %28, 8
br i1 %29, label %30, label %31
30: ; preds = %27
store i32 7, i32* %3
br label %31
31: ; preds = %30, %27
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @dowX2U(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %29
4: ; preds = %1
%5 = and i32 %0, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %24
7: ; preds = %4
%8 = and i32 %0, 4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %24
10: ; preds = %7
%11 = and i32 %0, 8
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %24
13: ; preds = %10
%14 = and i32 %0, 16
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %24
16: ; preds = %13
%17 = and i32 %0, 32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %24
19: ; preds = %16
%20 = and i32 %0, 64
%21 = icmp eq i32 %20, 0
%22 = select i1 %21, i32 7, i32 6
%23 = select i1 %21, i32 8, i32 7
br label %24
24: ; preds = %19, %16, %13, %10, %7, %4
%25 = phi i32 [ 1, %4 ], [ 2, %7 ], [ 3, %10 ], [ 4, %13 ], [ 5, %16 ], [ %22, %19 ]
%26 = phi i32 [ 2, %4 ], [ 3, %7 ], [ 4, %10 ], [ 5, %13 ], [ 6, %16 ], [ %23, %19 ]
switch i32 %25, label %28 [
i32 6, label %29
i32 7, label %27
]
27: ; preds = %24
br label %29
28: ; preds = %24
br label %29
29: ; preds = %24, %28, %1, %27
%30 = phi i32 [ 7, %27 ], [ 1, %1 ], [ 0, %24 ], [ %26, %28 ]
ret i32 %30
}