xunge/DecIR huggingface dataset:
/* Type definitions */
struct Cyc_RgnOrder_RgnPO {
  int dummy;
};

/* Variables and functions */
void *Cyc_Absyn_access_eff(void *);
int /*<<< orphan*/ Cyc_RgnOrder_effect_outlives(struct Cyc_RgnOrder_RgnPO *,
                                                void *, void *);
int Cyc_RgnOrder_rgn_outlives_rgn(struct Cyc_RgnOrder_RgnPO *po, void *rgn1,
                                  void *rgn2) {
  return ({
    struct Cyc_RgnOrder_RgnPO *_Tmp0 = po;
    void *_Tmp1 = Cyc_Absyn_access_eff(rgn1);
    Cyc_RgnOrder_effect_outlives(_Tmp0, _Tmp1, rgn2);
  });
}


x86 assembly (clang, -O0):
<Cyc_RgnOrder_rgn_outlives_rgn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <Cyc_Absyn_access_eff@plt>
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <Cyc_RgnOrder_effect_outlives@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_RgnOrder_rgn_outlives_rgn>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <Cyc_Absyn_access_eff@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <Cyc_RgnOrder_effect_outlives@plt>

LLVM IR (-O0):
%struct.Cyc_RgnOrder_RgnPO = type { i32 }
define i32 @Cyc_RgnOrder_rgn_outlives_rgn(%struct.Cyc_RgnOrder_RgnPO* %0, i8* %1, i8* %2) {
%4 = alloca %struct.Cyc_RgnOrder_RgnPO*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca %struct.Cyc_RgnOrder_RgnPO*
%8 = alloca i8*
%9 = alloca i32
store %struct.Cyc_RgnOrder_RgnPO* %0, %struct.Cyc_RgnOrder_RgnPO** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%10 = load %struct.Cyc_RgnOrder_RgnPO*, %struct.Cyc_RgnOrder_RgnPO** %4
store %struct.Cyc_RgnOrder_RgnPO* %10, %struct.Cyc_RgnOrder_RgnPO** %7
%11 = load i8*, i8** %5
%12 = call i8* @Cyc_Absyn_access_eff(i8* %11)
store i8* %12, i8** %8
%13 = load %struct.Cyc_RgnOrder_RgnPO*, %struct.Cyc_RgnOrder_RgnPO** %7
%14 = load i8*, i8** %8
%15 = load i8*, i8** %6
%16 = call i32 @Cyc_RgnOrder_effect_outlives(%struct.Cyc_RgnOrder_RgnPO* %13, i8* %14, i8* %15)
store i32 %16, i32* %9
%17 = load i32, i32* %9
ret i32 %17
}

LLVM IR (-O2):
%struct.Cyc_RgnOrder_RgnPO = type { i32 }
define i32 @Cyc_RgnOrder_rgn_outlives_rgn(%struct.Cyc_RgnOrder_RgnPO* %0, i8* %1, i8* %2) {
%4 = tail call i8* @Cyc_Absyn_access_eff(i8* %1)
%5 = tail call i32 @Cyc_RgnOrder_effect_outlives(%struct.Cyc_RgnOrder_RgnPO* %0, i8* %4, i8* %2)
ret i32 %5
}
void tree_sitter_javascript_external_scanner_reset(void *p) {}


x86 assembly (clang, -O0):
<tree_sitter_javascript_external_scanner_reset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tree_sitter_javascript_external_scanner_reset>:
ret

LLVM IR (-O0):
define void @tree_sitter_javascript_external_scanner_reset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @tree_sitter_javascript_external_scanner_reset(i8* nocapture %0) {
ret void
}
unsigned long ffz(unsigned long word) {
  __asm__("bsf %1,%0" : "=r"(word) : "r"(~word));
  return (word);
}


x86 assembly (clang, -O0):
<ffz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
bsf    %rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffz>:
not    %rdi
bsf    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ffz(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, -1
%5 = call i64 asm "bsf $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %2
%6 = load i64, i64* %2
ret i64 %6
}

LLVM IR (-O2):
define i64 @ffz(i64 %0) {
%2 = xor i64 %0, -1
%3 = tail call i64 asm "bsf $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %2)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ rs(int);
int /*<<< orphan*/ ru(int);
main() {
  ru(5);
  rs(5);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <ru@plt>
mov    $0x5,%edi
call   1040 <rs@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <ru@plt>
mov    $0x5,%edi
call   1040 <rs@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @ru(i32 5)
%3 = call i32 @rs(i32 5)
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @ru(i32 5)
%2 = tail call i32 @rs(i32 5)
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t key_hash(uint16_t k) { return ((int)k + 253) % 128; }


x86 assembly (clang, -O0):
<key_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfd,%eax
mov    $0x80,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_hash>:
lea    0xfd(%rdi),%eax
lea    0x17c(%rdi),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff80,%ecx
neg    %ecx
lea    (%rdi,%rcx,1),%eax
add    $0xfd,%eax
ret

LLVM IR (-O0):
define i32 @key_hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 253
%5 = srem i32 %4, 128
ret i32 %5
}

LLVM IR (-O2):
define i32 @key_hash(i32 %0) {
%2 = add nsw i32 %0, 253
%3 = srem i32 %2, 128
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ test_java_comment_entities();
int /*<<< orphan*/ test_java_comments();
void all_java_tests() {
  test_java_comments();
  test_java_comment_entities();
}


x86 assembly (clang, -O0):
<all_java_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_java_comments@plt>
mov    $0x0,%al
call   1030 <test_java_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_java_tests>:
push   %rax
xor    %eax,%eax
call   1040 <test_java_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_java_comment_entities@plt>

LLVM IR (-O0):
define void @all_java_tests() {
%1 = call i32 (...) @test_java_comments()
%2 = call i32 (...) @test_java_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_java_tests() {
%1 = tail call i32 (...) @test_java_comments()
%2 = tail call i32 (...) @test_java_comment_entities()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ random_get_seedval_from_current_time();
int /*<<< orphan*/ random_seed(int /*<<< orphan*/);
void random_seed_with_current_time() {
  random_seed(random_get_seedval_from_current_time());
}


x86 assembly (clang, -O0):
<random_seed_with_current_time>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random_get_seedval_from_current_time@plt>
mov    %eax,%edi
call   1040 <random_seed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_seed_with_current_time>:
push   %rax
xor    %eax,%eax
call   1030 <random_get_seedval_from_current_time@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <random_seed@plt>

LLVM IR (-O0):
define void @random_seed_with_current_time() {
%1 = call i32 (...) @random_get_seedval_from_current_time()
%2 = call i32 @random_seed(i32 %1)
ret void
}

LLVM IR (-O2):
define void @random_seed_with_current_time() {
%1 = tail call i32 (...) @random_get_seedval_from_current_time()
%2 = tail call i32 @random_seed(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ arc4random_buf(void *, size_t);
void ev_arc4random_buf(void *buf, size_t n) { arc4random_buf(buf, n); }


x86 assembly (clang, -O0):
<ev_arc4random_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <arc4random_buf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ev_arc4random_buf>:
jmp    1030 <arc4random_buf@plt>

LLVM IR (-O0):
define void @ev_arc4random_buf(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @arc4random_buf(i8* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @ev_arc4random_buf(i8* %0, i64 %1) {
%3 = tail call i32 @arc4random_buf(i8* %0, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ findBlocks();
int /*<<< orphan*/ fromFile();
int /*<<< orphan*/ makeCfg();
int main() {
  fromFile();
  findBlocks();
  makeCfg();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <fromFile@plt>
mov    $0x0,%al
call   1030 <findBlocks@plt>
mov    $0x0,%al
call   1040 <makeCfg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fromFile@plt>
xor    %eax,%eax
call   1030 <findBlocks@plt>
xor    %eax,%eax
call   1040 <makeCfg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fromFile()
%3 = call i32 (...) @findBlocks()
%4 = call i32 (...) @makeCfg()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fromFile()
%2 = tail call i32 (...) @findBlocks()
%3 = tail call i32 (...) @makeCfg()
ret i32 0
}
void ed25519_Blinding_Finish(void *context) {}


x86 assembly (clang, -O0):
<ed25519_Blinding_Finish>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ed25519_Blinding_Finish>:
ret

LLVM IR (-O0):
define void @ed25519_Blinding_Finish(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ed25519_Blinding_Finish(i8* nocapture %0) {
ret void
}
/* Variables and functions */
unsigned long GPIOGetIntNumber(unsigned long);
int /*<<< orphan*/ IntDisable(unsigned long);
int /*<<< orphan*/ IntUnregister(unsigned long);
void GPIOIntUnregister(unsigned long ulPort) {
  ;
  ulPort = GPIOGetIntNumber(ulPort);
  IntDisable(ulPort);
  IntUnregister(ulPort);
}


x86 assembly (clang, -O0):
<GPIOIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GPIOGetIntNumber@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <IntDisable@plt>
mov    -0x8(%rbp),%rdi
call   1050 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOIntUnregister>:
push   %rbx
call   1030 <GPIOGetIntNumber@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <IntDisable@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <IntUnregister@plt>

LLVM IR (-O0):
define void @GPIOIntUnregister(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @GPIOGetIntNumber(i64 %3)
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = call i32 @IntDisable(i64 %5)
%7 = load i64, i64* %2
%8 = call i32 @IntUnregister(i64 %7)
ret void
}

LLVM IR (-O2):
define void @GPIOIntUnregister(i64 %0) {
%2 = tail call i64 @GPIOGetIntNumber(i64 %0)
%3 = tail call i32 @IntDisable(i64 %2)
%4 = tail call i32 @IntUnregister(i64 %2)
ret void
}
int wpas_wps_searching(struct wpa_supplicant *wpa_s) { return 0; }


x86 assembly (clang, -O0):
<wpas_wps_searching>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_wps_searching>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define i32 @wpas_wps_searching(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret i32 0
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define i32 @wpas_wps_searching(%struct.wpa_supplicant* nocapture readnone %0) {
ret i32 0
}
int fun226() { return 226; }


x86 assembly (clang, -O0):
<fun226>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun226>:
mov    $0xe2,%eax
ret

LLVM IR (-O0):
define i32 @fun226() {
ret i32 226
}

LLVM IR (-O2):
define i32 @fun226() {
ret i32 226
}
const char *ccnxPortalServerAbout_ShortNotice(void) {
  return "Copyright (c) 2017 Cisco and/or its affiliates.\n";
}


x86 assembly (clang, -O0):
<ccnxPortalServerAbout_ShortNotice>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnxPortalServerAbout_ShortNotice>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [49 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0A\00"
define i8* @ccnxPortalServerAbout_ShortNotice() {
ret i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [49 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0A\00"
define i8* @ccnxPortalServerAbout_ShortNotice() {
ret i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
float dcn_bw_floor2(float const, int);
float dcn_bw_ceil(const float arg) {
  float flr = dcn_bw_floor2(arg, 1);
  return flr + 0.00001 >= arg ? arg : flr + 1;
}


x86 assembly (clang, -O0):
<dcn_bw_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x1,%edi
call   1030 <dcn_bw_floor2@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xebe(%rip),%xmm1
addsd  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1168 <dcn_bw_ceil+0x58>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    117a <dcn_bw_ceil+0x6a>
movss  0xe98(%rip),%xmm0
addss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcn_bw_ceil>:
push   %rax
movss  %xmm0,0x4(%rsp)
mov    $0x1,%edi
call   1030 <dcn_bw_floor2@plt>
movss  0x4(%rsp),%xmm3
cvtss2sd %xmm0,%xmm1
addsd  0xecd(%rip),%xmm1
cvtss2sd %xmm3,%xmm2
ucomisd %xmm2,%xmm1
jae    1148 <dcn_bw_ceil+0x38>
addss  0xec3(%rip),%xmm0
movaps %xmm0,%xmm3
movaps %xmm3,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @dcn_bw_ceil(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @dcn_bw_floor2(float %4, i32 1)
store float %5, float* %3
%6 = load float, float* %3
%7 = fpext float %6 to double
%8 = fadd double %7, 1.000000e-05
%9 = load float, float* %2
%10 = fpext float %9 to double
%11 = fcmp oge double %8, %10
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = load float, float* %2
br label %17
14: ; preds = %1
%15 = load float, float* %3
%16 = fadd float %15, 1.000000e+00
br label %17
17: ; preds = %14, %12
%18 = phi float [ %13, %12 ], [ %16, %14 ]
ret float %18
}

LLVM IR (-O2):
define float @dcn_bw_ceil(float %0) {
%2 = tail call float @dcn_bw_floor2(float %0, i32 1)
%3 = fpext float %2 to double
%4 = fadd double %3, 1.000000e-05
%5 = fpext float %0 to double
%6 = fcmp oge double %4, %5
%7 = fadd float %2, 1.000000e+00
%8 = select i1 %6, float %0, float %7
ret float %8
}
int process_dmnt_init() { return 0; }


x86 assembly (clang, -O0):
<process_dmnt_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_dmnt_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @process_dmnt_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @process_dmnt_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ trap_R_RegisterShaderNoMip(char *);
void UI_DisplayOptionsMenu_Cache(void) {
  trap_R_RegisterShaderNoMip("menu/art/frame2_l");
  trap_R_RegisterShaderNoMip("menu/art/frame1_r");
  trap_R_RegisterShaderNoMip("menu/art/back_0");
  trap_R_RegisterShaderNoMip("menu/art/back_1");
}


x86 assembly (clang, -O0):
<UI_DisplayOptionsMenu_Cache>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xeeb(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef1(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef5(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_DisplayOptionsMenu_Cache>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xeee(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef4(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
lea    0xef8(%rip),%rdi
pop    %rax
jmp    1030 <trap_R_RegisterShaderNoMip@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"menu/art/frame2_l\00"
@.str.1 = [18 x i8] c"menu/art/frame1_r\00"
@.str.2 = [16 x i8] c"menu/art/back_0\00"
@.str.3 = [16 x i8] c"menu/art/back_1\00"
define void @UI_DisplayOptionsMenu_Cache() {
%1 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"menu/art/frame2_l\00"
@.str.1 = [18 x i8] c"menu/art/frame1_r\00"
@.str.2 = [16 x i8] c"menu/art/back_0\00"
@.str.3 = [16 x i8] c"menu/art/back_1\00"
define void @UI_DisplayOptionsMenu_Cache() {
%1 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i64 0, i64 0))
ret void
}
void free_3d_float(float ***ptr) {
  free(ptr[0][0]);
  free(ptr[0]);
  free(ptr);
}


x86 assembly (clang, -O0):
<free_3d_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_3d_float>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    (%rbx),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_3d_float(float*** %0) {
%2 = alloca float***
store float*** %0, float**** %2
%3 = load float***, float**** %2
%4 = getelementptr inbounds float**, float*** %3, i64 0
%5 = load float**, float*** %4
%6 = getelementptr inbounds float*, float** %5, i64 0
%7 = load float*, float** %6
%8 = bitcast float* %7 to i8*
%9 = load float***, float**** %2
%10 = getelementptr inbounds float**, float*** %9, i64 0
%11 = load float**, float*** %10
%12 = bitcast float** %11 to i8*
%13 = load float***, float**** %2
%14 = bitcast float*** %13 to i8*
ret void
}

LLVM IR (-O2):
define void @free_3d_float(float*** nocapture %0) {
%2 = bitcast float*** %0 to i8***
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
tail call void @free(i8* %4)
%5 = bitcast float*** %0 to i8**
%6 = load i8*, i8** %5
tail call void @free(i8* %6)
%7 = bitcast float*** %0 to i8*
tail call void @free(i8* %7)
ret void
}
void gtk_accessible_connect_widget_destroyed() {}


x86 assembly (clang, -O0):
<gtk_accessible_connect_widget_destroyed>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accessible_connect_widget_destroyed>:
ret

LLVM IR (-O0):
define void @gtk_accessible_connect_widget_destroyed() {
ret void
}

LLVM IR (-O2):
define void @gtk_accessible_connect_widget_destroyed() {
ret void
}
/* Type definitions */
typedef char *uint8_t;
typedef char *uint32_t;

/* Variables and functions */
uint8_t uint32_log2(const uint32_t x) {
  uint32_t y;
  if (!x)
    return 0;
  __asm__("\tbsr %1, %0\n" : "=r"(y) : "r"(x));
  return y;
}


x86 assembly (clang, -O0):
<uint32_log2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1120 <uint32_log2+0x20>
movq   $0x0,-0x8(%rbp)
jmp    1134 <uint32_log2+0x34>
mov    -0x10(%rbp),%rax
bsr    %rax,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint32_log2>:
test   %rdi,%rdi
je     110a <uint32_log2+0xa>
bsr    %rdi,%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @uint32_log2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %12
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i8* asm "\09bsr $1, $0\0A", "=r,r,~{dirflag},~{fpsr},~{flags}"(i8* %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
store i8* %11, i8** %2
br label %12
12: ; preds = %8, %7
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
define i8* @uint32_log2(i8* readnone %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* asm "\09bsr $1, $0\0A", "=r,r,~{dirflag},~{fpsr},~{flags}"(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
void *nxtgetdata(void *ref, const char *arg, int *data_type, int *dims_array,
                 int *ndims, int *free_data) {
  char *result;
  result = strdup(arg);
  *free_data = 1;
  *ndims = 1;
  dims_array[0] = strlen(result);
  *data_type = 4;
  return result;
}


x86 assembly (clang, -O0):
<nxtgetdata>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x38(%rbp)
mov    -0x30(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x28(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x38(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x4,(%rax)
mov    -0x38(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nxtgetdata>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    %r9,%r13
mov    %r8,%r14
mov    %rcx,%r15
mov    %rdx,%r12
mov    %rsi,%rdi
call   1040 <strdup@plt>
mov    %rax,%rbx
movl   $0x1,0x0(%r13)
movl   $0x1,(%r14)
mov    %rax,%rdi
call   1030 <strlen@plt>
mov    %eax,(%r15)
movl   $0x4,(%r12)
mov    %rbx,%rax
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @nxtgetdata(i8* %0, i8* %1, i32* %2, i32* %3, i32* %4, i32* %5) {
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32*
%13 = alloca i8*
store i8* %0, i8** %7
store i8* %1, i8** %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32* %5, i32** %12
%14 = load i8*, i8** %8
%15 = call i8* @strdup(i8* %14)
store i8* %15, i8** %13
%16 = load i32*, i32** %12
store i32 1, i32* %16
%17 = load i32*, i32** %11
store i32 1, i32* %17
%18 = load i8*, i8** %13
%19 = call i64 @strlen(i8* %18)
%20 = trunc i64 %19 to i32
%21 = load i32*, i32** %10
%22 = getelementptr inbounds i32, i32* %21, i64 0
store i32 %20, i32* %22
%23 = load i32*, i32** %9
store i32 4, i32* %23
%24 = load i8*, i8** %13
ret i8* %24
}

LLVM IR (-O2):
define noalias i8* @nxtgetdata(i8* nocapture readnone %0, i8* nocapture %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4, i32* nocapture writeonly %5) {
%7 = tail call i8* @strdup(i8* %1)
store i32 1, i32* %5
store i32 1, i32* %4
%8 = tail call i64 @strlen(i8* dereferenceable(1) %7)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %3
store i32 4, i32* %2
ret i8* %7
}
void send_attention_message(void *data, int cmd) {}


x86 assembly (clang, -O0):
<send_attention_message>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_attention_message>:
ret

LLVM IR (-O0):
define void @send_attention_message(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @send_attention_message(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
char *concat(int, char *, char *, char *);
int /*<<< orphan*/ is_absolute(char *);
char *xstrdup(char *);
char *make_abs(char *root, char *path) {
  if (!is_absolute(path))
    return concat(3, root, "/", path);
  else
    return xstrdup(path);
}


x86 assembly (clang, -O0):
<make_abs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <is_absolute@plt>
cmp    $0x0,%eax
jne    1174 <make_abs+0x44>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0x3,%edi
lea    0xe9a(%rip),%rdx
call   1030 <concat@plt>
mov    %rax,-0x8(%rbp)
jmp    1181 <make_abs+0x51>
mov    -0x18(%rbp),%rdi
call   1040 <xstrdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_abs>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1050 <is_absolute@plt>
test   %eax,%eax
je     1155 <make_abs+0x25>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <xstrdup@plt>
lea    0xea4(%rip),%rdx
mov    $0x3,%edi
mov    %r14,%rsi
mov    %rbx,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <concat@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"/\00"
define i8* @make_abs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = call i32 @is_absolute(i8* %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = call i8* @concat(i32 3, i8* %10, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %11)
store i8* %12, i8** %3
br label %16
13: ; preds = %2
%14 = load i8*, i8** %5
%15 = call i8* @xstrdup(i8* %14)
store i8* %15, i8** %3
br label %16
16: ; preds = %13, %9
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@.str = [2 x i8] c"/\00"
define i8* @make_abs(i8* %0, i8* %1) {
%3 = tail call i32 @is_absolute(i8* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i8* @concat(i32 3, i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %9
7: ; preds = %2
%8 = tail call i8* @xstrdup(i8* %1)
br label %9
9: ; preds = %7, %5
%10 = phi i8* [ %8, %7 ], [ %6, %5 ]
ret i8* %10
}
/* Variables and functions */
unsigned char *do_png(int *, int *, int *, int);
int /*<<< orphan*/ start_mem(unsigned char *, int);
unsigned char *stbi_png_load_from_memory(unsigned char *buffer, int len, int *x,
                                         int *y, int *comp, int req_comp) {
  start_mem(buffer, len);
  return do_png(x, y, comp, req_comp);
}


x86 assembly (clang, -O0):
<stbi_png_load_from_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <start_mem@plt>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    -0x2c(%rbp),%ecx
call   1040 <do_png@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi_png_load_from_memory>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %r9d,%r14d
mov    %r8,%r15
mov    %rcx,%rbp
mov    %rdx,%rbx
call   1030 <start_mem@plt>
mov    %rbx,%rdi
mov    %rbp,%rsi
mov    %r15,%rdx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <do_png@plt>

LLVM IR (-O0):
define i8* @stbi_png_load_from_memory(i8* %0, i32 %1, i32* %2, i32* %3, i32* %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32
store i8* %0, i8** %7
store i32 %1, i32* %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32 %5, i32* %12
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = call i32 @start_mem(i8* %13, i32 %14)
%16 = load i32*, i32** %9
%17 = load i32*, i32** %10
%18 = load i32*, i32** %11
%19 = load i32, i32* %12
%20 = call i8* @do_png(i32* %16, i32* %17, i32* %18, i32 %19)
ret i8* %20
}

LLVM IR (-O2):
define i8* @stbi_png_load_from_memory(i8* %0, i32 %1, i32* %2, i32* %3, i32* %4, i32 %5) {
%7 = tail call i32 @start_mem(i8* %0, i32 %1)
%8 = tail call i8* @do_png(i32* %2, i32* %3, i32* %4, i32 %5)
ret i8* %8
}
int new_int(void) { return 0; }


x86 assembly (clang, -O0):
<new_int>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_int>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @new_int() {
ret i32 0
}

LLVM IR (-O2):
define i32 @new_int() {
ret i32 0
}
double deg2rad(double degrees) {
  double result = degrees * 3.1415926535897932384626433832795028841971 / 180.0;
  return result;
}


x86 assembly (clang, -O0):
<deg2rad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<deg2rad>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @deg2rad(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double %4, 0x400921FB54442D18
%6 = fdiv double %5, 1.800000e+02
store double %6, double* %3
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
define double @deg2rad(double %0) {
%2 = fmul double %0, 0x400921FB54442D18
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
/* Variables and functions */
scalar_t__ listen(char, int);
int Server_Listen(char socket_desc) {
  if ((listen(socket_desc, 3)) == 0) {
    return 0;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<Server_Listen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    $0x3,%esi
movsbl -0x5(%rbp),%edi
call   1030 <listen@plt>
cmp    $0x0,%rax
jne    1142 <Server_Listen+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1149 <Server_Listen+0x39>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Server_Listen>:
push   %rax
mov    $0x3,%esi
call   1030 <listen@plt>
neg    %rax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Server_Listen(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @listen(i8 signext %4, i32 3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @Server_Listen(i8 signext %0) {
%2 = tail call i64 @listen(i8 signext %0, i32 3)
%3 = icmp ne i64 %2, 0
%4 = sext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
double floor(double);
double rev180(double x) { return (x - 360.0 * floor(x * (1.0 / 360.0) + 0.5)); }


x86 assembly (clang, -O0):
<rev180>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed4(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed0(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <floor@plt>
movsd  -0x10(%rbp),%xmm1
movsd  0xeaa(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev180>:
push   %rax
movapd %xmm0,%xmm1
movsd  %xmm0,(%rsp)
movsd  0xede(%rip),%xmm0
mulsd  %xmm1,%xmm0
addsd  0xeda(%rip),%xmm0
call   1030 <floor@plt>
mulsd  0xed5(%rip),%xmm0
addsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @rev180(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @llvm.fmuladd.f64(double %4, double 0x3F66C16C16C16C17, double 5.000000e-01)
%6 = call double @llvm.floor.f64(double %5)
%7 = call double @llvm.fmuladd.f64(double -3.600000e+02, double %6, double %3)
ret double %7
}

LLVM IR (-O2):
define double @rev180(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double 0x3F66C16C16C16C17, double 5.000000e-01)
%3 = tail call double @llvm.floor.f64(double %2)
%4 = tail call double @llvm.fmuladd.f64(double %3, double -3.600000e+02, double %0)
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(unsigned char *, int, int, int /*<<< orphan*/ *);
long getlongel(FILE *inf) {
  unsigned char buf[4];
  fread(buf, 4, 1, inf);
  return ((buf[0] << 0) + (buf[1] << 8) + (buf[2] << 16) + (buf[3] << 24));
}


x86 assembly (clang, -O0):
<getlongel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
movzbl -0xc(%rbp),%eax
shl    $0x0,%eax
movzbl -0xb(%rbp),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
movzbl -0xa(%rbp),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
movzbl -0x9(%rbp),%ecx
shl    $0x18,%ecx
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getlongel>:
push   %rax
mov    %rdi,%rcx
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
movslq 0x4(%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @getlongel(i32* %0) {
%2 = alloca i32*
%3 = alloca [4 x i8]
store i32* %0, i32** %2
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = load i32*, i32** %2
%6 = call i32 @fread(i8* %4, i32 4, i32 1, i32* %5)
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 0
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = add nsw i32 %10, %14
%16 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 2
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 16
%20 = add nsw i32 %15, %19
%21 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = shl i32 %23, 24
%25 = add nsw i32 %20, %24
%26 = sext i32 %25 to i64
ret i64 %26
}

LLVM IR (-O2):
define i64 @getlongel(i32* nocapture %0) {
%2 = alloca [4 x i8]
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%4 = call i32 @fread(i8* %3, i32 4, i32 1, i32* %0)
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 1
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = shl nuw nsw i32 %9, 8
%11 = or i32 %10, %6
%12 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 2
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = shl nuw nsw i32 %14, 16
%16 = or i32 %11, %15
%17 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 3
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = shl nuw i32 %19, 24
%21 = or i32 %16, %20
%22 = sext i32 %21 to i64
ret i64 %22
}
int f(int *i) { return *i; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ flockfile(int /*<<< orphan*/ *);
int /*<<< orphan*/ funlockfile(int /*<<< orphan*/ *);
int vfprintf_unlocked(int /*<<< orphan*/ *, char const *, int /*<<< orphan*/);
int vfprintf(FILE *restrict file, const char *restrict format, va_list ap) {
  flockfile(file);
  int result = vfprintf_unlocked(file, format, ap);
  funlockfile(file);
  return result;
}


x86 assembly (clang, -O0):
<vfprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <flockfile@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <vfprintf_unlocked@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <funlockfile@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfprintf>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
call   1040 <flockfile@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1050 <vfprintf_unlocked@plt>
mov    %eax,%ebx
mov    %rbp,%rdi
call   1030 <funlockfile@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @vfprintf(i32* noalias %0, i8* noalias %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = call i32 @flockfile(i32* %8)
%10 = load i32*, i32** %4
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @vfprintf_unlocked(i32* %10, i8* %11, i32 %12)
store i32 %13, i32* %7
%14 = load i32*, i32** %4
%15 = call i32 @funlockfile(i32* %14)
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @vfprintf(i32* noalias %0, i8* noalias %1, i32 %2) {
%4 = tail call i32 @flockfile(i32* %0)
%5 = tail call i32 @vfprintf_unlocked(i32* %0, i8* %1, i32 %2)
%6 = tail call i32 @funlockfile(i32* %0)
ret i32 %5
}
void angelic_treatment_of_funcction_pointers_good(int *(*fun_pointer)()) {
  int *p = fun_pointer();
  *p = 42;
}


x86 assembly (clang, -O0):
<angelic_treatment_of_funcction_pointers_good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   *-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x2a,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<angelic_treatment_of_funcction_pointers_good>:
push   %rax
xor    %eax,%eax
call   *%rdi
movl   $0x2a,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @angelic_treatment_of_funcction_pointers_good(i32* (...)* %0) {
%2 = alloca i32* (...)*
%3 = alloca i32*
store i32* (...)* %0, i32* (...)** %2
%4 = load i32* (...)*, i32* (...)** %2
%5 = call i32* (...) %4()
store i32* %5, i32** %3
%6 = load i32*, i32** %3
store i32 42, i32* %6
ret void
}

LLVM IR (-O2):
define void @angelic_treatment_of_funcction_pointers_good(i32* (...)* nocapture %0) {
%2 = tail call i32* (...) %0()
store i32 42, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void assert_null(void *val) {
  if (val == NULL)
    printf("\033[00;32mOK: The given value is null\033[00m\n");
  else
    printf("\033[31mKO: The given value is not null\033[00m\n");
}


x86 assembly (clang, -O0):
<assert_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1138 <assert_null+0x28>
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
jmp    1144 <assert_null+0x34>
lea    0xeeb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_null>:
test   %rdi,%rdi
lea    0xf10(%rip),%rax
lea    0xedf(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"\1B[00;32mOK: The given value is null\1B[00m\0A\00"
@.str.1 = [43 x i8] c"\1B[31mKO: The given value is not null\1B[00m\0A\00"
define void @assert_null(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %1
%8 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@str = [42 x i8] c"\1B[31mKO: The given value is not null\1B[00m\00"
@str.2 = [41 x i8] c"\1B[00;32mOK: The given value is null\1B[00m\00"
define void @assert_null(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = select i1 %2, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @str.2, i64 0, i64 0), i8* getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0)
%4 = tail call i32 @puts(i8* dereferenceable(1) %3)
ret void
}
void foo718() {}


x86 assembly (clang, -O0):
<foo718>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo718>:
ret

LLVM IR (-O0):
define void @foo718() {
ret void
}

LLVM IR (-O2):
define void @foo718() {
ret void
}
char getChar() { return 'd'; }


x86 assembly (clang, -O0):
<getChar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getChar>:
mov    $0x64,%al
ret

LLVM IR (-O0):
define signext i8 @getChar() {
ret i8 100
}

LLVM IR (-O2):
define signext i8 @getChar() {
ret i8 100
}
int tty_mode(int how) {}


x86 assembly (clang, -O0):
<tty_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_mode>:
ret

LLVM IR (-O0):
define i32 @tty_mode(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @tty_mode(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xaf() {
  Assert_real((isascii(175) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              880, ("isascii should be 0 for 0xaf"));
}


x86 assembly (clang, -O0):
<t_isascii_0xaf>:
push   %rbp
mov    %rsp,%rbp
mov    $0xaf,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x370,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xaf>:
push   %rax
mov    $0xaf,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x370,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xaf\00"
define void @t_isascii_0xaf() {
%1 = call i64 @isascii(i32 175)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 880, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xaf\00"
define void @t_isascii_0xaf() {
%1 = tail call i64 @isascii(i32 175)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 880, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int parseStmt(int, int);
int parse(int state, int flags) {
  switch (state) {
  case 8:
  case 18:
  case 6:
  case 2:
    state = parseStmt(state, flags);
    break;
  }
}


x86 assembly (clang, -O0):
<parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x2,%eax
je     1165 <parse+0x55>
jmp    1132 <parse+0x22>
mov    -0x10(%rbp),%eax
sub    $0x6,%eax
je     1165 <parse+0x55>
jmp    1143 <parse+0x33>
mov    -0x10(%rbp),%eax
sub    $0x8,%eax
je     1165 <parse+0x55>
jmp    1154 <parse+0x44>
mov    -0x10(%rbp),%eax
sub    $0x12,%eax
jne    1173 <parse+0x63>
jmp    1165 <parse+0x55>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <parseStmt@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse>:
lea    -0x2(%rdi),%eax
ror    %eax
cmp    $0x8,%eax
ja     112e <parse+0x1e>
mov    $0x10d,%ecx
bt     %eax,%ecx
jae    112e <parse+0x1e>
push   %rax
call   1030 <parseStmt@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @parse(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
switch i32 %6, label %11 [
i32 8, label %7
i32 18, label %7
i32 6, label %7
i32 2, label %7
]
7: ; preds = %2, %2, %2, %2
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call i32 @parseStmt(i32 %8, i32 %9)
store i32 %10, i32* %4
br label %11
11: ; preds = %2, %7
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @parse(i32 %0, i32 %1) {
%3 = add i32 %0, -2
%4 = tail call i32 @llvm.fshl.i32(i32 %3, i32 %3, i32 31)
switch i32 %4, label %7 [
i32 3, label %5
i32 8, label %5
i32 2, label %5
i32 0, label %5
]
5: ; preds = %2, %2, %2, %2
%6 = tail call i32 @parseStmt(i32 %0, i32 %1)
br label %7
7: ; preds = %2, %5
ret i32 undef
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ IntEnable(scalar_t__);
int /*<<< orphan*/ IntRegister(scalar_t__, void (*)());
int _SSIBaseValid(scalar_t__);
scalar_t__ _SSIIntNumberGet(scalar_t__);
void SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  uint32_t ui32Int;
  ASSERT(_SSIBaseValid(ui32Base));
  ui32Int = _SSIIntNumberGet(ui32Base);
  ASSERT(ui32Int != 0);
  IntRegister(ui32Int, pfnHandler);
  IntEnable(ui32Int);
}


x86 assembly (clang, -O0):
<SSIIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <_SSIBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
mov    -0x8(%rbp),%rdi
call   1070 <_SSIIntNumberGet@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <ASSERT@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <IntRegister@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <_SSIBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
mov    %rbx,%rdi
call   1070 <_SSIIntNumberGet@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1060 <ASSERT@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1050 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @SSIIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
%5 = alloca i64
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%6 = load i64, i64* %3
%7 = call i32 @_SSIBaseValid(i64 %6)
%8 = call i32 @ASSERT(i32 %7)
%9 = load i64, i64* %3
%10 = call i64 @_SSIIntNumberGet(i64 %9)
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = icmp ne i64 %11, 0
%13 = zext i1 %12 to i32
%14 = call i32 @ASSERT(i32 %13)
%15 = load i64, i64* %5
%16 = load void ()*, void ()** %4
%17 = bitcast void ()* %16 to void (...)*
%18 = call i32 @IntRegister(i64 %15, void (...)* %17)
%19 = load i64, i64* %5
%20 = call i32 @IntEnable(i64 %19)
ret void
}

LLVM IR (-O2):
define void @SSIIntRegister(i64 %0, void ()* %1) {
%3 = tail call i32 @_SSIBaseValid(i64 %0)
%4 = tail call i32 @ASSERT(i32 %3)
%5 = tail call i64 @_SSIIntNumberGet(i64 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @ASSERT(i32 %7)
%9 = bitcast void ()* %1 to void (...)*
%10 = tail call i32 @IntRegister(i64 %5, void (...)* %9)
%11 = tail call i32 @IntEnable(i64 %5)
ret void
}