xunge/DecIR huggingface dataset:
/* Variables and functions */
double frexp(double, int *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, double *);
main() {
  double x, y;
  int n, p;
  int *m;
  m = &p;
  scanf("%lf", &x);
  y = frexp(x, m);
  printf("%d", p - 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
lea    0xeb2(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1050 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
mov    -0x28(%rbp),%rdi
call   1040 <frexp@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x20(%rbp),%esi
sub    $0x1,%esi
lea    0xe8d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xec5(%rip),%rdi
lea    0x10(%rsp),%rsi
call   1050 <scanf@plt>
movsd  0x10(%rsp),%xmm0
lea    0xc(%rsp),%rdi
call   1040 <frexp@plt>
mov    0xc(%rsp),%esi
add    $0xffffffff,%esi
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 0, i32* %1
store i32* %5, i32** %6
%7 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%8 = load double, double* %2
%9 = load i32*, i32** %6
%10 = call double @frexp(double %8, i32* %9)
store double %10, double* %3
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca double
%2 = alloca i32
%3 = bitcast double* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%6 = load double, double* %1
%7 = call double @frexp(double %6, i32* %2)
%8 = load i32, i32* %2
%9 = add nsw i32 %8, -1
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ err_sys(char *);
int /*<<< orphan*/ readn(int, void *, size_t);
ssize_t Readn(int fd, void *ptr, size_t nbytes) {
  ssize_t n;
  if ((n = readn(fd, ptr, nbytes)) < 0)
    err_sys("readn error");
  return n;
}


x86 assembly (clang, -O0):
<Readn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <readn@plt>
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
jge    115b <Readn+0x3b>
lea    0xeaa(%rip),%rdi
call   1030 <err_sys@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Readn>:
push   %rbx
call   1040 <readn@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1138 <Readn+0x18>
lea    0xecd(%rip),%rdi
call   1030 <err_sys@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"readn error\00"
define i32 @Readn(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @readn(i32 %8, i8* %9, i64 %10)
store i32 %11, i32* %7
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = call i32 @err_sys(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %3
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
@.str = [12 x i8] c"readn error\00"
define i32 @Readn(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @readn(i32 %0, i8* %1, i64 %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @err_sys(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i32 %4
}
unsigned char f55(unsigned char x, int y) {
  return (x << ((-y) & (8 - 1))) ^ (x >> y);
}


x86 assembly (clang, -O0):
<f55>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x7,%ecx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f55>:
mov    %esi,%ecx
neg    %cl
and    $0x7,%cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f55(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = and i32 %8, 7
%10 = shl i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i32, i32* %4
%14 = ashr i32 %12, %13
%15 = xor i32 %10, %14
%16 = trunc i32 %15 to i8
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @f55(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = sub nsw i32 0, %1
%5 = and i32 %4, 7
%6 = shl nuw nsw i32 %3, %5
%7 = lshr i32 %3, %1
%8 = xor i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
void aget() {
  asm volatile("movq $0x0123456789abcdef, %%rax\n\t"
               "movq 0x18(%%rbp), %%rdx\n\t"
               "subq 0x10(%%rdx), %%rax\n\t"
               "pushq (%%rax)\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<aget>:
push   %rbp
mov    %rsp,%rbp
movabs $0x123456789abcdef,%rax
45 23 01
mov    0x18(%rbp),%rdx
sub    0x10(%rdx),%rax
push   (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<aget>:
movabs $0x123456789abcdef,%rax
45 23 01
mov    0x18(%rbp),%rdx
sub    0x10(%rdx),%rax
push   (%rax)
ret

LLVM IR (-O0):
define void @aget() {
ret void
}

LLVM IR (-O2):
define void @aget() {
tail call void asm sideeffect "movq $$0x0123456789abcdef, %rax\0A\09movq 0x18(%rbp), %rdx\0A\09subq 0x10(%rdx), %rax\0A\09pushq (%rax)\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void wn_multiply_vect_by_vect(double *x, double *y, int z) { assert(0); }


x86 assembly (clang, -O0):
<wn_multiply_vect_by_vect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wn_multiply_vect_by_vect>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @wn_multiply_vect_by_vect(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @wn_multiply_vect_by_vect(double* nocapture readnone %0, double* nocapture readnone %1, i32 %2) {
%4 = tail call i32 @assert(i32 0)
ret void
}
const char *GetBiosFilename(int *region, const char *cd_fname) {
  switch (*region) {
  case 8:
    return "cd.eu";
  case 1:
    return "cd.jp";
  default:
    return "cd.us";
  }
}


x86 assembly (clang, -O0):
<GetBiosFilename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
sub    $0x1,%eax
je     1144 <GetBiosFilename+0x44>
jmp    1123 <GetBiosFilename+0x23>
mov    -0x1c(%rbp),%eax
sub    $0x8,%eax
jne    1154 <GetBiosFilename+0x54>
jmp    1134 <GetBiosFilename+0x34>
lea    0xec5(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115f <GetBiosFilename+0x5f>
lea    0xebb(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115f <GetBiosFilename+0x5f>
lea    0xeb1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetBiosFilename>:
mov    (%rdi),%eax
cmp    $0x1,%eax
lea    0xefa(%rip),%rcx
lea    0xef9(%rip),%rdx
cmove  %rcx,%rdx
cmp    $0x8,%eax
lea    0xedf(%rip),%rax
cmovne %rdx,%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"cd.eu\00"
@.str.1 = [6 x i8] c"cd.jp\00"
@.str.2 = [6 x i8] c"cd.us\00"
define i8* @GetBiosFilename(i32* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
switch i32 %7, label %10 [
i32 8, label %8
i32 1, label %9
]
8: ; preds = %2
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %3
br label %11
9: ; preds = %2
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %3
br label %11
10: ; preds = %2
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8** %3
br label %11
11: ; preds = %10, %9, %8
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [6 x i8] c"cd.eu\00"
@.str.1 = [6 x i8] c"cd.jp\00"
@.str.2 = [6 x i8] c"cd.us\00"
define i8* @GetBiosFilename(i32* nocapture %0, i8* nocapture readnone %1) {
%3 = load i32, i32* %0
%4 = icmp eq i32 %3, 1
%5 = select i1 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%6 = icmp eq i32 %3, 8
%7 = select i1 %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %5
ret i8* %7
}
/* Type definitions */
struct dep {
  int dummy;
};

/* Variables and functions */
int check_in_no_cards(struct dep *, char);
int is_always_false(struct dep *dep) { return check_in_no_cards(dep, '!'); }


x86 assembly (clang, -O0):
<is_always_false>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x21,%esi
call   1030 <check_in_no_cards@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_always_false>:
mov    $0x21,%esi
jmp    1030 <check_in_no_cards@plt>

LLVM IR (-O0):
%struct.dep = type { i32 }
define i32 @is_always_false(%struct.dep* %0) {
%2 = alloca %struct.dep*
store %struct.dep* %0, %struct.dep** %2
%3 = load %struct.dep*, %struct.dep** %2
%4 = call i32 @check_in_no_cards(%struct.dep* %3, i8 signext 33)
ret i32 %4
}

LLVM IR (-O2):
%struct.dep = type { i32 }
define i32 @is_always_false(%struct.dep* %0) {
%2 = tail call i32 @check_in_no_cards(%struct.dep* %0, i8 signext 33)
ret i32 %2
}
/* Variables and functions */
int Execute();
int /*<<< orphan*/ XsvfExit(int);
int XsvfInit();
int main(void) {
  int rc;
  rc = XsvfInit();
  if (rc == 0) {
    rc = Execute();
  }
  XsvfExit(rc);
  return rc;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <XsvfInit@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    115d <main+0x2d>
mov    $0x0,%al
call   1050 <Execute@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <XsvfExit@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <XsvfInit@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    1147 <main+0x17>
xor    %eax,%eax
call   1050 <Execute@plt>
mov    %eax,%ebx
mov    %ebx,%edi
call   1040 <XsvfExit@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @XsvfInit()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @Execute()
store i32 %7, i32* %2
br label %8
8: ; preds = %6, %0
%9 = load i32, i32* %2
%10 = call i32 @XsvfExit(i32 %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @XsvfInit()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @Execute()
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %4, %3 ], [ %1, %0 ]
%7 = tail call i32 @XsvfExit(i32 %6)
ret i32 %6
}
/* Variables and functions */
double Aij(int, int);
double exp(double);
double lambda_ij(int, int);
double t2_f_repulsive(int i, int j, double rij) {
  return Aij(i, j) * exp(-lambda_ij(i, j) * rij);
}


x86 assembly (clang, -O0):
<t2_f_repulsive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <Aij@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <lambda_ij@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  -0x10(%rbp),%xmm0
call   1050 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t2_f_repulsive>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <Aij@plt>
movsd  %xmm0,0x8(%rsp)
mov    %ebp,%edi
mov    %ebx,%esi
call   1040 <lambda_ij@plt>
xorpd  0xea4(%rip),%xmm0
mulsd  0x10(%rsp),%xmm0
call   1050 <exp@plt>
mulsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define double @t2_f_repulsive(i32 %0, i32 %1, double %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %4
store i32 %1, i32* %5
store double %2, double* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call double @Aij(i32 %7, i32 %8)
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = call double @lambda_ij(i32 %10, i32 %11)
%13 = fneg double %12
%14 = load double, double* %6
%15 = fmul double %13, %14
%16 = call double @exp(double %15)
%17 = fmul double %9, %16
ret double %17
}

LLVM IR (-O2):
define double @t2_f_repulsive(i32 %0, i32 %1, double %2) {
%4 = tail call double @Aij(i32 %0, i32 %1)
%5 = tail call double @lambda_ij(i32 %0, i32 %1)
%6 = fneg double %5
%7 = fmul double %6, %2
%8 = tail call double @exp(double %7)
%9 = fmul double %4, %8
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void prindent(int indent) {
  while (indent--)
    printf("\t");
}


x86 assembly (clang, -O0):
<prindent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1140 <prindent+0x30>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
jmp    111b <prindent+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prindent>:
push   %rbx
test   %edi,%edi
je     112f <prindent+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x9,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <prindent+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\09\00"
define void @prindent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @prindent(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 @putchar(i32 9)
%7 = icmp eq i32 %5, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
int opuesto(int jugador) { return (jugador * -1); }


x86 assembly (clang, -O0):
<opuesto>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0xffffffff,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opuesto>:
mov    %edi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @opuesto(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, -1
ret i32 %4
}

LLVM IR (-O2):
define i32 @opuesto(i32 %0) {
%2 = sub nsw i32 0, %0
ret i32 %2
}
char *strcpy(char *s, const char *t) {
  while ((*s++ = *t++) != 0)
    ;
  return s;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     113f <strcpy+0x3f>
jmp    110c <strcpy+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rsi),%ecx
add    $0x1,%rsi
mov    %cl,(%rax)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %13, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = sext i8 %8 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %5
br label %5
14: ; preds = %5
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @strcpy(i8* writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %8
}
/* Variables and functions */
scalar_t__ send_command_to_variable_server(int, char *);
int set_binary_no_names(int socket) {
  if (send_command_to_variable_server(socket, "trick.var_binary_nonames()") <
      0) {
    return -1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<set_binary_no_names>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <send_command_to_variable_server@plt>
cmp    $0x0,%rax
jge    1140 <set_binary_no_names+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1147 <set_binary_no_names+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_binary_no_names>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <send_command_to_variable_server@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"trick.var_binary_nonames()\00"
define i32 @set_binary_no_names(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @send_command_to_variable_server(i32 %4, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [27 x i8] c"trick.var_binary_nonames()\00"
define i32 @set_binary_no_names(i32 %0) {
%2 = tail call i64 @send_command_to_variable_server(i32 %0, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = ashr i64 %2, 63
%4 = trunc i64 %3 to i32
ret i32 %4
}
int xx() { return 0; }


x86 assembly (clang, -O0):
<xx>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xx>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xx() {
ret i32 0
}

LLVM IR (-O2):
define i32 @xx() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ feof(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/ *);
int E_SkipRecord(FILE *input) {
  char line[1024] = "";
  if (feof(input))
    return 0;
  if (fgets(line, 1024, input) != NULL)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<E_SkipRecord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x410(%rbp),%rdi
xor    %esi,%esi
mov    $0x400,%edx
call   1030 <memset@plt>
mov    -0x10(%rbp),%rdi
call   1050 <feof@plt>
cmp    $0x0,%rax
je     1171 <E_SkipRecord+0x41>
movl   $0x0,-0x4(%rbp)
jmp    11a3 <E_SkipRecord+0x73>
lea    -0x410(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x400,%esi
call   1040 <fgets@plt>
cmp    $0x0,%rax
je     119c <E_SkipRecord+0x6c>
movl   $0x1,-0x4(%rbp)
jmp    11a3 <E_SkipRecord+0x73>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<E_SkipRecord>:
push   %rbp
push   %rbx
sub    $0x408,%rsp
mov    %rdi,%rbx
mov    %rsp,%rdi
xor    %ebp,%ebp
mov    $0x400,%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    %rbx,%rdi
call   1050 <feof@plt>
test   %rax,%rax
jne    1173 <E_SkipRecord+0x43>
mov    %rsp,%rdi
mov    $0x400,%esi
mov    %rbx,%rdx
call   1040 <fgets@plt>
xor    %ebp,%ebp
test   %rax,%rax
setne  %bpl
mov    %ebp,%eax
add    $0x408,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @E_SkipRecord(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca [1024 x i8]
store i32* %0, i32** %3
%5 = bitcast [1024 x i8]* %4 to i8*
%6 = load i32*, i32** %3
%7 = call i64 @feof(i32* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %17
10: ; preds = %1
%11 = getelementptr inbounds [1024 x i8], [1024 x i8]* %4, i64 0, i64 0
%12 = load i32*, i32** %3
%13 = call i32* @fgets(i8* %11, i32 1024, i32* %12)
%14 = icmp ne i32* %13, null
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 1, i32* %2
br label %17
16: ; preds = %10
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15, %9
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @E_SkipRecord(i32* nocapture %0) {
%2 = alloca [1024 x i8]
%3 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%4 = tail call i64 @feof(i32* %0)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = call i32* @fgets(i8* %3, i32 1024, i32* %0)
%8 = icmp ne i32* %7, null
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %1
%11 = phi i32 [ 0, %1 ], [ %9, %6 ]
ret i32 %11
}
/* Variables and functions */
scalar_t__ cvmx_debug_booted();
int cvmx_debug_enabled(void) { return cvmx_debug_booted() || 1; }


x86 assembly (clang, -O0):
<cvmx_debug_enabled>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <cvmx_debug_booted@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
jne    113b <cvmx_debug_enabled+0x2b>
mov    $0x1,%al
mov    %al,-0x1(%rbp)
jmp    113b <cvmx_debug_enabled+0x2b>
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_debug_enabled>:
push   %rax
xor    %eax,%eax
call   1030 <cvmx_debug_booted@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cvmx_debug_enabled() {
%1 = call i64 (...) @cvmx_debug_booted()
%2 = icmp ne i64 %1, 0
br i1 %2, label %4, label %3
3: ; preds = %0
br label %4
4: ; preds = %3, %0
%5 = phi i1 [ true, %0 ], [ true, %3 ]
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @cvmx_debug_enabled() {
%1 = tail call i64 (...) @cvmx_debug_booted()
ret i32 1
}
int main(void) {
  int counter1 = 0;
LOOPSTART1:
  if (counter1 < 5) {
    int counter2 = 0;
  LOOPSTART2:
    if (counter2 < 8) {
      counter2++;
      goto LOOPSTART2;
    }
    counter1++;
    goto LOOPSTART1;
  }
  if (counter1 == 4) {
    goto ERROR;
  } else {
    goto END;
  }
ERROR:
  goto ERROR;
END:
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1149 <main+0x49>
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    113b <main+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <main+0x23>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
cmpl   $0x4,-0x8(%rbp)
jne    1158 <main+0x58>
jmp    115d <main+0x5d>
jmp    1162 <main+0x62>
jmp    115d <main+0x5d>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %14, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %17
7: ; preds = %4
store i32 0, i32* %3
br label %8
8: ; preds = %11, %7
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 8
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %8
14: ; preds = %8
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 4
br i1 %19, label %20, label %21
20: ; preds = %17
br label %22
21: ; preds = %17
br label %23
22: ; preds = %22, %20
br label %22
23: ; preds = %21
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "usage: Bonnie [-d scratch-dir] [-s size-in-Mb] [-m "
                  "machine-label] [-f txt/html]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [81 x i8] c"usage: Bonnie [-d scratch-dir] [-s size-in-Mb] [-m machine-label] [-f txt/html]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [81 x i8] c"usage: Bonnie [-d scratch-dir] [-s size-in-Mb] [-m machine-label] [-f txt/html]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
char *BGBCP_EatWhiteNLb(char *);
char *BGBCC_SHXA_EatWhiteNoLinebreak(char *cs) {
  return (BGBCP_EatWhiteNLb(cs));
}


x86 assembly (clang, -O0):
<BGBCC_SHXA_EatWhiteNoLinebreak>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <BGBCP_EatWhiteNLb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGBCC_SHXA_EatWhiteNoLinebreak>:
jmp    1030 <BGBCP_EatWhiteNLb@plt>

LLVM IR (-O0):
define i8* @BGBCC_SHXA_EatWhiteNoLinebreak(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @BGBCP_EatWhiteNLb(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @BGBCC_SHXA_EatWhiteNoLinebreak(i8* %0) {
%2 = tail call i8* @BGBCP_EatWhiteNLb(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ FOURCC(char, char, char, float);
int /*<<< orphan*/ NodeUnRegisterClass(int /*<<< orphan*/);
void WVP_Done() { NodeUnRegisterClass(FOURCC('W', 'V', 'P', 'F')); }


x86 assembly (clang, -O0):
<WVP_Done>:
push   %rbp
mov    %rsp,%rbp
mov    $0x57,%edi
mov    $0x56,%esi
mov    $0x50,%edx
movss  0xec5(%rip),%xmm0
call   1030 <FOURCC@plt>
mov    %eax,%edi
call   1040 <NodeUnRegisterClass@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WVP_Done>:
push   %rax
movss  0xed7(%rip),%xmm0
mov    $0x57,%edi
mov    $0x56,%esi
mov    $0x50,%edx
call   1030 <FOURCC@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <NodeUnRegisterClass@plt>

LLVM IR (-O0):
define void @WVP_Done() {
%1 = call i32 @FOURCC(i8 signext 87, i8 signext 86, i8 signext 80, float 7.000000e+01)
%2 = call i32 @NodeUnRegisterClass(i32 %1)
ret void
}

LLVM IR (-O2):
define void @WVP_Done() {
%1 = tail call i32 @FOURCC(i8 signext 87, i8 signext 86, i8 signext 80, float 7.000000e+01)
%2 = tail call i32 @NodeUnRegisterClass(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  fprintf(stderr, "Usage: %s <c1> <c2> <c3> <c4>\n", name);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"Usage: %s <c1> <c2> <c3> <c4>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"Usage: %s <c1> <c2> <c3> <c4>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
int gpio_is_pin_valid(int pin) { return pin >= 0 && pin < 100; }


x86 assembly (clang, -O0):
<gpio_is_pin_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <gpio_is_pin_valid+0x20>
cmpl   $0x64,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_is_pin_valid>:
xor    %eax,%eax
cmp    $0x64,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @gpio_is_pin_valid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 100
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @gpio_is_pin_valid(i32 %0) {
%2 = icmp ult i32 %0, 100
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ assert(void *);
void *calloc(int, size_t);
void *heap_init(size_t size) {
  static void *heap;
  if (heap == NULL) {
    heap = calloc(1, size);
  }
  assert(heap);
  return heap;
}


x86 assembly (clang, -O0):
<heap_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,0x2f04(%rip)
jne    114f <heap_init+0x2f>
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,0x2ee9(%rip)
mov    0x2ee2(%rip),%rdi
call   1040 <assert@plt>
mov    0x2ed6(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_init>:
push   %rax
mov    %rdi,%rsi
mov    0x2f0d(%rip),%rdi
test   %rdi,%rdi
jne    1144 <heap_init+0x24>
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,%rdi
mov    %rax,0x2ef4(%rip)
call   1040 <assert@plt>
mov    0x2ee8(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
@heap_init.heap = internal global i8* null
define i8* @heap_init(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i8*, i8** @heap_init.heap
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = call i8* @calloc(i32 1, i64 %6)
store i8* %7, i8** @heap_init.heap
br label %8
8: ; preds = %5, %1
%9 = load i8*, i8** @heap_init.heap
%10 = call i32 @assert(i8* %9)
%11 = load i8*, i8** @heap_init.heap
ret i8* %11
}

LLVM IR (-O2):
@heap_init.heap = internal unnamed_addr global i8* null
define i8* @heap_init(i64 %0) {
%2 = load i8*, i8** @heap_init.heap
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @calloc(i32 1, i64 %0)
store i8* %5, i8** @heap_init.heap
br label %6
6: ; preds = %4, %1
%7 = phi i8* [ %5, %4 ], [ %2, %1 ]
%8 = tail call i32 @assert(i8* %7)
%9 = load i8*, i8** @heap_init.heap
ret i8* %9
}
int sum_digs_fact(int n) {
  int arr[10] = {1, 1, 2, 6, 24, 120, 720, 5040, 40320, 362880};
  int sum = 0;
  while (n > 0) {
    sum += arr[n % 10];
    n /= 10;
  }
  return sum;
}


x86 assembly (clang, -O0):
<sum_digs_fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xeda(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
movl   $0x0,-0x34(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    116c <sum_digs_fact+0x5c>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
movslq %edx,%rax
mov    -0x30(%rbp,%rax,4),%eax
add    -0x34(%rbp),%eax
mov    %eax,-0x34(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    1137 <sum_digs_fact+0x27>
mov    -0x34(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_digs_fact>:
xor    %eax,%eax
test   %edi,%edi
jle    113f <sum_digs_fact+0x3f>
mov    $0xcccccccd,%r8d
lea    0xeed(%rip),%r9
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %edi,%esi
imul   %r8,%rsi
shr    $0x23,%rsi
lea    (%rsi,%rsi,1),%ecx
lea    (%rcx,%rcx,4),%ecx
mov    %edi,%edx
sub    %ecx,%edx
add    (%r9,%rdx,4),%eax
cmp    $0x9,%edi
mov    %esi,%edi
ja     1120 <sum_digs_fact+0x20>
ret

LLVM IR (-O0):
@__const.sum_digs_fact.arr = [10 x i32] [i32 1, i32 1, i32 2, i32 6, i32 24, i32 120, i32 720, i32 5040, i32 40320, i32 362880]
define i32 @sum_digs_fact(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i32]
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast [10 x i32]* %3 to i8*
store i32 0, i32* %4
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %6
%10 = load i32, i32* %2
%11 = srem i32 %10, 10
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %12
%14 = load i32, i32* %13
%15 = load i32, i32* %4
%16 = add nsw i32 %15, %14
store i32 %16, i32* %4
%17 = load i32, i32* %2
%18 = sdiv i32 %17, 10
store i32 %18, i32* %2
br label %6
19: ; preds = %6
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
@__const.sum_digs_fact.arr = [10 x i32] [i32 1, i32 1, i32 2, i32 6, i32 24, i32 120, i32 720, i32 5040, i32 40320, i32 362880]
define i32 @sum_digs_fact(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %13
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ 0, %1 ]
%5 = phi i32 [ %11, %3 ], [ %0, %1 ]
%6 = urem i32 %5, 10
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds [10 x i32], [10 x i32]* @__const.sum_digs_fact.arr, i64 0, i64 %7
%9 = load i32, i32* %8
%10 = add nsw i32 %9, %4
%11 = udiv i32 %5, 10
%12 = icmp ult i32 %5, 10
br i1 %12, label %13, label %3
13: ; preds = %3, %1
%14 = phi i32 [ 0, %1 ], [ %10, %3 ]
ret i32 %14
}
int test_imm_28int32_reg(int val) { return ((val) & (0x28 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_28int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x28,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_28int32_reg>:
test   $0x28,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_28int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 40
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_28int32_reg(i32 %0) {
%2 = and i32 %0, 40
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void PTBL(signed char col, signed char row, unsigned char spN) {
  col;
  row;
  spN;
}


x86 assembly (clang, -O0):
<PTBL>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PTBL>:
ret

LLVM IR (-O0):
define void @PTBL(i8 signext %0, i8 signext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
ret void
}

LLVM IR (-O2):
define void @PTBL(i8 signext %0, i8 signext %1, i8 zeroext %2) {
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll60(struct __test_metadata *);
void wrapper_epoll60(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll60(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll60>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll60@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll60>:
jmp    1030 <epoll60@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll60(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll60(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll60(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll60(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
short kernel__Char__is_lower(char);
short kernel__Char__is_upper(char);
short int kernel__Char__is_letter(char self) {
  short int var;
  short int var1;
  short int var2;
  short int var_;
  short int var3;
  var2 = kernel__Char__is_lower(self);
  var_ = var2;
  if (var2) {
    var1 = var_;
  } else {
    var3 = kernel__Char__is_upper(self);
    var1 = var3;
  }
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<kernel__Char__is_letter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <kernel__Char__is_lower@plt>
mov    %ax,-0x8(%rbp)
mov    -0x8(%rbp),%ax
mov    %ax,-0xa(%rbp)
cmpw   $0x0,-0x8(%rbp)
je     115b <kernel__Char__is_letter+0x3b>
mov    -0xa(%rbp),%ax
mov    %ax,-0x6(%rbp)
jmp    1170 <kernel__Char__is_letter+0x50>
movsbl -0x1(%rbp),%edi
call   1040 <kernel__Char__is_upper@plt>
mov    %ax,-0xc(%rbp)
mov    -0xc(%rbp),%ax
mov    %ax,-0x6(%rbp)
mov    -0x6(%rbp),%ax
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel__Char__is_letter>:
push   %rbx
mov    %edi,%ebx
call   1030 <kernel__Char__is_lower@plt>
test   %ax,%ax
je     112f <kernel__Char__is_letter+0xf>
pop    %rbx
ret
movsbl %bl,%edi
pop    %rbx
jmp    1040 <kernel__Char__is_upper@plt>

LLVM IR (-O0):
define signext i16 @kernel__Char__is_letter(i8 signext %0) {
%2 = alloca i8
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
store i8 %0, i8* %2
%8 = load i8, i8* %2
%9 = call signext i16 @kernel__Char__is_lower(i8 signext %8)
store i16 %9, i16* %5
%10 = load i16, i16* %5
store i16 %10, i16* %6
%11 = load i16, i16* %5
%12 = icmp ne i16 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = load i16, i16* %6
store i16 %14, i16* %4
br label %19
15: ; preds = %1
%16 = load i8, i8* %2
%17 = call signext i16 @kernel__Char__is_upper(i8 signext %16)
store i16 %17, i16* %7
%18 = load i16, i16* %7
store i16 %18, i16* %4
br label %19
19: ; preds = %15, %13
%20 = load i16, i16* %4
store i16 %20, i16* %3
br label %21
21: ; preds = %19
%22 = load i16, i16* %3
ret i16 %22
}

LLVM IR (-O2):
define signext i16 @kernel__Char__is_letter(i8 signext %0) {
%2 = tail call signext i16 @kernel__Char__is_lower(i8 signext %0)
%3 = icmp eq i16 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call signext i16 @kernel__Char__is_upper(i8 signext %0)
br label %6
6: ; preds = %1, %4
%7 = phi i16 [ %5, %4 ], [ %2, %1 ]
ret i16 %7
}
/* Type definitions */
struct jit_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ emit_alu64(struct jit_state *, int, int, int);
void emit_cmp(struct jit_state *state, int src, int dst) {
  emit_alu64(state, 0x39, src, dst);
}


x86 assembly (clang, -O0):
<emit_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    $0x39,%esi
call   1030 <emit_alu64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_cmp>:
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x39,%esi
jmp    1030 <emit_alu64@plt>

LLVM IR (-O0):
%struct.jit_state = type { i32 }
define void @emit_cmp(%struct.jit_state* %0, i32 %1, i32 %2) {
%4 = alloca %struct.jit_state*
%5 = alloca i32
%6 = alloca i32
store %struct.jit_state* %0, %struct.jit_state** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.jit_state*, %struct.jit_state** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @emit_alu64(%struct.jit_state* %7, i32 57, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
%struct.jit_state = type { i32 }
define void @emit_cmp(%struct.jit_state* %0, i32 %1, i32 %2) {
%4 = tail call i32 @emit_alu64(%struct.jit_state* %0, i32 57, i32 %1, i32 %2)
ret void
}
void SuiteSparse_tic(double tic[2]) {
  tic[0] = 0;
  tic[1] = 0;
}


x86 assembly (clang, -O0):
<SuiteSparse_tic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SuiteSparse_tic>:
xorps  %xmm0,%xmm0
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @SuiteSparse_tic(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
store double 0.000000e+00, double* %4
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 1
store double 0.000000e+00, double* %6
ret void
}

LLVM IR (-O2):
define void @SuiteSparse_tic(double* nocapture writeonly %0) {
%2 = bitcast double* %0 to i8*
ret void
}
void test_simple_2(void) {}


x86 assembly (clang, -O0):
<test_simple_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_simple_2>:
ret

LLVM IR (-O0):
define void @test_simple_2() {
ret void
}

LLVM IR (-O2):
define void @test_simple_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UART3_RX_TX_DriverIRQHandler();
__attribute__((weak)) void UART3_RX_TX_IRQHandler(void) {
  UART3_RX_TX_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<UART3_RX_TX_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <UART3_RX_TX_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART3_RX_TX_IRQHandler>:
xor    %eax,%eax
jmp    1030 <UART3_RX_TX_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @UART3_RX_TX_IRQHandler() {
%1 = call i32 (...) @UART3_RX_TX_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @UART3_RX_TX_IRQHandler() {
%1 = tail call i32 (...) @UART3_RX_TX_DriverIRQHandler()
ret void
}
/* Variables and functions */
int LZ4_compress64kCtx(int /*<<< orphan*/ *, char *, char *, int);
int LZ4_compressCtx(int /*<<< orphan*/ *, char *, char *, int);
int LZ4_compress(char *source, char *dest, int isize) {
  if (isize < (int)((1 << 16) + ((8 + 4) - 1)))
    return LZ4_compress64kCtx(NULL, source, dest, isize);
  return LZ4_compressCtx(NULL, source, dest, isize);
}


x86 assembly (clang, -O0):
<LZ4_compress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x1000b,-0x1c(%rbp)
jge    115c <LZ4_compress+0x3c>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%edi
call   1030 <LZ4_compress64kCtx@plt>
mov    %eax,-0x4(%rbp)
jmp    1173 <LZ4_compress+0x53>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%edi
call   1040 <LZ4_compressCtx@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_compress>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
cmp    $0x1000a,%ecx
jg     1137 <LZ4_compress+0x17>
jmp    1030 <LZ4_compress64kCtx@plt>
jmp    1040 <LZ4_compressCtx@plt>

LLVM IR (-O0):
define i32 @LZ4_compress(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp slt i32 %8, 65547
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = call i32 @LZ4_compress64kCtx(i32* null, i8* %11, i8* %12, i32 %13)
store i32 %14, i32* %4
br label %20
15: ; preds = %3
%16 = load i8*, i8** %5
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = call i32 @LZ4_compressCtx(i32* null, i8* %16, i8* %17, i32 %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %15, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @LZ4_compress(i8* %0, i8* %1, i32 %2) {
%4 = icmp slt i32 %2, 65547
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @LZ4_compress64kCtx(i32* null, i8* %0, i8* %1, i32 %2)
br label %9
7: ; preds = %3
%8 = tail call i32 @LZ4_compressCtx(i32* null, i8* %0, i8* %1, i32 %2)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ next_char();
char str_value();
void next_non_space_char() {
  while (str_value() == ' ' || str_value() == '\n')
    next_char();
}


x86 assembly (clang, -O0):
<next_non_space_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
jmp    112d <next_non_space_char+0xd>
mov    $0x0,%al
call   1040 <str_value@plt>
movsbl %al,%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x1(%rbp)
je     1158 <next_non_space_char+0x38>
mov    $0x0,%al
call   1040 <str_value@plt>
movsbl %al,%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
test   $0x1,%al
jne    1168 <next_non_space_char+0x48>
jmp    1174 <next_non_space_char+0x54>
mov    $0x0,%al
call   1030 <next_char@plt>
jmp    112d <next_non_space_char+0xd>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_non_space_char>:
push   %rax
jmp    1137 <next_non_space_char+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <next_char@plt>
xor    %eax,%eax
call   1040 <str_value@plt>
cmp    $0x20,%al
je     1130 <next_non_space_char+0x10>
xor    %eax,%eax
call   1040 <str_value@plt>
cmp    $0xa,%al
je     1130 <next_non_space_char+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @next_non_space_char() {
br label %1
1: ; preds = %11, %0
%2 = call signext i8 (...) @str_value()
%3 = sext i8 %2 to i32
%4 = icmp eq i32 %3, 32
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = call signext i8 (...) @str_value()
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 10
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ true, %1 ], [ %8, %5 ]
br i1 %10, label %11, label %13
11: ; preds = %9
%12 = call i32 (...) @next_char()
br label %1
13: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @next_non_space_char() {
br label %1
1: ; preds = %7, %0
%2 = tail call signext i8 (...) @str_value()
%3 = icmp eq i8 %2, 32
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call signext i8 (...) @str_value()
%6 = icmp eq i8 %5, 10
br i1 %6, label %7, label %9
7: ; preds = %1, %4
%8 = tail call i32 (...) @next_char()
br label %1
9: ; preds = %4
ret void
}