xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ regmatch_t;
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int regexec(int /*<<< orphan*/ const *, char const *, size_t,
            int /*<<< orphan*/ *, int);
__attribute__((__weak__, __always___)) int
softboundmpx_regexec(const regex_t *preg, const char *string, size_t nmatch,
                     regmatch_t pmatch[], int eflags) {
  return regexec(preg, string, nmatch, pmatch, eflags);
}


x86 assembly (clang, -O0):
<softboundmpx_regexec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <regexec@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_regexec>:
jmp    1030 <regexec@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_regexec(i32* %0, i8* %1, i64 %2, i32* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32*
%10 = alloca i32
store i32* %0, i32** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i32* %3, i32** %9
store i32 %4, i32* %10
%11 = load i32*, i32** %6
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = load i32*, i32** %9
%15 = load i32, i32* %10
%16 = call i32 @regexec(i32* %11, i8* %12, i64 %13, i32* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define weak i32 @softboundmpx_regexec(i32* %0, i8* %1, i64 %2, i32* %3, i32 %4) {
%6 = tail call i32 @regexec(i32* %0, i8* %1, i64 %2, i32* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_aarch64_im_lane_boundsi(int, int /*<<< orphan*/,
                                                     int /*<<< orphan*/);
int search_line_fast(void) { __builtin_aarch64_im_lane_boundsi(4, 0, 0); }


x86 assembly (clang, -O0):
<search_line_fast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <__builtin_aarch64_im_lane_boundsi@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_line_fast>:
mov    $0x4,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <__builtin_aarch64_im_lane_boundsi@plt>

LLVM IR (-O0):
define i32 @search_line_fast() {
%1 = alloca i32
%2 = call i32 @__builtin_aarch64_im_lane_boundsi(i32 4, i32 0, i32 0)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @search_line_fast() {
%1 = tail call i32 @__builtin_aarch64_im_lane_boundsi(i32 4, i32 0, i32 0)
ret i32 undef
}
/* Variables and functions */
int ekle(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int z;
  z = ekle(1, 2);
  printf("z=%d\n", z);
  int x = 1, y = 5;
  z = ekle(x, y);
  printf("z=%d\n", z);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
call   1040 <ekle@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0xc(%rbp)
movl   $0x5,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <ekle@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe8a(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
mov    $0x2,%esi
call   1040 <ekle@plt>
lea    0xec9(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    $0x1,%edi
mov    $0x5,%esi
call   1040 <ekle@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"z=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 @ekle(i32 1, i32 2)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 1, i32* %3
store i32 5, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @ekle(i32 %8, i32 %9)
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"z=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @ekle(i32 1, i32 2)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @ekle(i32 1, i32 5)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
unsigned XXH_versionNumber(void) { return (0 * 100 * 100 + 6 * 100 + 0); }


x86 assembly (clang, -O0):
<XXH_versionNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x258,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XXH_versionNumber>:
mov    $0x258,%eax
ret

LLVM IR (-O0):
define i32 @XXH_versionNumber() {
ret i32 600
}

LLVM IR (-O2):
define i32 @XXH_versionNumber() {
ret i32 600
}
void InterruptClear(int InterruptSource) {
  ((volatile unsigned long *)(0xE000E000 + (0x280)))[(InterruptSource >> 5)] =
      1 << (InterruptSource & 31);
}


x86 assembly (clang, -O0):
<InterruptClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
movslq %eax,%rcx
mov    $0xe000e280,%eax
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<InterruptClear>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    $0xe000e280,%edx
mov    %rax,(%rdx,%rcx,8)
ret

LLVM IR (-O0):
define void @InterruptClear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 31
%5 = shl i32 1, %4
%6 = sext i32 %5 to i64
%7 = load i32, i32* %2
%8 = ashr i32 %7, 5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i64, i64* inttoptr (i64 3758154368 to i64*), i64 %9
store volatile i64 %6, i64* %10
ret void
}

LLVM IR (-O2):
define void @InterruptClear(i32 %0) {
%2 = and i32 %0, 31
%3 = shl nuw i32 1, %2
%4 = sext i32 %3 to i64
%5 = ashr i32 %0, 5
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i64, i64* inttoptr (i64 3758154368 to i64*), i64 %6
store volatile i64 %4, i64* %7
ret void
}
struct response_proto *get_res_pro(struct P4 *p4) {
  return (struct response_proto *)p4;
}


x86 assembly (clang, -O0):
<get_res_pro>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_res_pro>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.response_proto = type opaque
%struct.P4 = type opaque
define %struct.response_proto* @get_res_pro(%struct.P4* %0) {
%2 = alloca %struct.P4*
store %struct.P4* %0, %struct.P4** %2
%3 = load %struct.P4*, %struct.P4** %2
%4 = bitcast %struct.P4* %3 to %struct.response_proto*
ret %struct.response_proto* %4
}

LLVM IR (-O2):
%struct.response_proto = type opaque
%struct.P4 = type opaque
define %struct.response_proto* @get_res_pro(%struct.P4* readnone %0) {
%2 = bitcast %struct.P4* %0 to %struct.response_proto*
ret %struct.response_proto* %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x22() {
  Assert_real((isupper(34) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              175, ("isupper should be 0 for 0x22"));
}


x86 assembly (clang, -O0):
<t_isupper_0x22>:
push   %rbp
mov    %rsp,%rbp
mov    $0x22,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xaf,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x22>:
push   %rax
mov    $0x22,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xaf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x22\00"
define void @t_isupper_0x22() {
%1 = call i64 @isupper(i32 34)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 175, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x22\00"
define void @t_isupper_0x22() {
%1 = tail call i64 @isupper(i32 34)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 175, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int b3(int index) { return ((int *)00777777)[index]; }


x86 assembly (clang, -O0):
<b3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
mov    $0x3ffff,%eax
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b3>:
movslq %edi,%rax
mov    0x3ffff(,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @b3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* inttoptr (i64 262143 to i32*), i64 %4
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @b3(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds i32, i32* inttoptr (i64 262143 to i32*), i64 %2
%4 = load i32, i32* %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ NETSCAPE_SPKAC;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ NETSCAPE_SPKAC_it;
void NETSCAPE_SPKAC_free(NETSCAPE_SPKAC *a) {
  ASN1_item_free((ASN1_VALUE *)a, &NETSCAPE_SPKAC_it);
}


x86 assembly (clang, -O0):
<NETSCAPE_SPKAC_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NETSCAPE_SPKAC_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@NETSCAPE_SPKAC_it = global i32 0
define void @NETSCAPE_SPKAC_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @NETSCAPE_SPKAC_it)
ret void
}

LLVM IR (-O2):
@NETSCAPE_SPKAC_it = global i32 0
define void @NETSCAPE_SPKAC_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @NETSCAPE_SPKAC_it)
ret void
}
unsigned long long create_mask(unsigned int wordlength) {
  unsigned int i;
  unsigned long long mask = 0L;
  for (i = 0; i < 2 * wordlength; i++) {
    mask = (mask << 1) | 1;
  }
  return mask;
}


x86 assembly (clang, -O0):
<create_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
cmp    %ecx,%eax
jae    1145 <create_mask+0x45>
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
or     $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1116 <create_mask+0x16>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_mask>:
add    %edi,%edi
je     1115 <create_mask+0x15>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x6,%ecx
cmp    $0x7,%eax
jae    1118 <create_mask+0x18>
xor    %eax,%eax
jmp    112f <create_mask+0x2f>
xor    %eax,%eax
ret
and    $0xfffffff8,%edi
xor    %eax,%eax
nopl   (%rax)
shl    $0x8,%rax
or     $0xff,%rax
add    $0xfffffff8,%edi
jne    1120 <create_mask+0x20>
test   %ecx,%ecx
je     114c <create_mask+0x4c>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    %rax,%rax
add    $0x1,%rax
add    $0xffffffff,%ecx
jne    1140 <create_mask+0x40>
ret

LLVM IR (-O0):
define i64 @create_mask(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %4
store i32 0, i32* %3
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = mul i32 2, %7
%9 = icmp ult i32 %6, %8
br i1 %9, label %10, label %17
10: ; preds = %5
%11 = load i64, i64* %4
%12 = shl i64 %11, 1
%13 = or i64 %12, 1
store i64 %13, i64* %4
br label %14
14: ; preds = %10
%15 = load i32, i32* %3
%16 = add i32 %15, 1
store i32 %16, i32* %3
br label %5
17: ; preds = %5
%18 = load i64, i64* %4
ret i64 %18
}

LLVM IR (-O2):
define i64 @create_mask(i32 %0) {
%2 = shl i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %1
%5 = add i32 %2, -1
%6 = and i32 %2, 6
%7 = icmp ult i32 %5, 7
br i1 %7, label %17, label %8
8: ; preds = %4
%9 = and i32 %2, -8
br label %10
10: ; preds = %10, %8
%11 = phi i64 [ 0, %8 ], [ %14, %10 ]
%12 = phi i32 [ 0, %8 ], [ %15, %10 ]
%13 = shl i64 %11, 8
%14 = or i64 %13, 255
%15 = add i32 %12, 8
%16 = icmp eq i32 %15, %9
br i1 %16, label %17, label %10
17: ; preds = %10, %4
%18 = phi i64 [ undef, %4 ], [ %14, %10 ]
%19 = phi i64 [ 0, %4 ], [ %14, %10 ]
%20 = icmp eq i32 %6, 0
br i1 %20, label %28, label %21
21: ; preds = %17, %21
%22 = phi i64 [ %25, %21 ], [ %19, %17 ]
%23 = phi i32 [ %26, %21 ], [ 0, %17 ]
%24 = shl i64 %22, 1
%25 = or i64 %24, 1
%26 = add i32 %23, 1
%27 = icmp eq i32 %26, %6
br i1 %27, label %28, label %21
28: ; preds = %17, %21, %1
%29 = phi i64 [ 0, %1 ], [ %18, %17 ], [ %25, %21 ]
ret i64 %29
}
int ft_isprint(int c) {
  if (c >= ' ' && c <= '~')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jl     1127 <ft_isprint+0x27>
cmpl   $0x7e,-0x8(%rbp)
jg     1127 <ft_isprint+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <ft_isprint+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isprint(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 32
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 126
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ft_isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_52uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x52 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_52uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x52,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_52uint64_midword_mem>:
testb  $0x52,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_52uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 82
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_52uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5373952
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void pcp_print_net_sock_stats(struct activity *a, int curr) {}


x86 assembly (clang, -O0):
<pcp_print_net_sock_stats>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_print_net_sock_stats>:
ret

LLVM IR (-O0):
%struct.activity = type opaque
define void @pcp_print_net_sock_stats(%struct.activity* %0, i32 %1) {
%3 = alloca %struct.activity*
%4 = alloca i32
store %struct.activity* %0, %struct.activity** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.activity = type opaque
define void @pcp_print_net_sock_stats(%struct.activity* nocapture %0, i32 %1) {
ret void
}
int copyrightclaims() { return 0; }


x86 assembly (clang, -O0):
<copyrightclaims>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyrightclaims>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @copyrightclaims() {
ret i32 0
}

LLVM IR (-O2):
define i32 @copyrightclaims() {
ret i32 0
}
/* Variables and functions */
scalar_t__ isalpha(int);
scalar_t__ isdigit(int);
int isalnum(int c) { return ((isalpha(c)) || (isdigit(c))); }


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <isalnum+0x37>
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
push   %rbx
mov    %edi,%ebx
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isalnum+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isalpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isdigit(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isalnum(i32 %0) {
%2 = tail call i64 @isalpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isdigit(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
void foo(char *s) {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @foo(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ export_data_cache();
int /*<<< orphan*/ export_instruction_cache();
void export_SP_memory(void) {
  export_data_cache();
  export_instruction_cache();
  return;
}


x86 assembly (clang, -O0):
<export_SP_memory>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <export_data_cache@plt>
mov    $0x0,%al
call   1030 <export_instruction_cache@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<export_SP_memory>:
push   %rax
xor    %eax,%eax
call   1040 <export_data_cache@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <export_instruction_cache@plt>

LLVM IR (-O0):
define void @export_SP_memory() {
%1 = call i32 (...) @export_data_cache()
%2 = call i32 (...) @export_instruction_cache()
ret void
}

LLVM IR (-O2):
define void @export_SP_memory() {
%1 = tail call i32 (...) @export_data_cache()
%2 = tail call i32 (...) @export_instruction_cache()
ret void
}
int do_752() { return 752; }


x86 assembly (clang, -O0):
<do_752>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2f0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_752>:
mov    $0x2f0,%eax
ret

LLVM IR (-O0):
define i32 @do_752() {
ret i32 752
}

LLVM IR (-O2):
define i32 @do_752() {
ret i32 752
}
OP(ed, c0) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
void d2i_PKCS7_SIGN_ENVELOPE(void) {}


x86 assembly (clang, -O0):
<d2i_PKCS7_SIGN_ENVELOPE>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS7_SIGN_ENVELOPE>:
ret

LLVM IR (-O0):
define void @d2i_PKCS7_SIGN_ENVELOPE() {
ret void
}

LLVM IR (-O2):
define void @d2i_PKCS7_SIGN_ENVELOPE() {
ret void
}
signed char fn1(signed char x, unsigned long y) { return x << y; }


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movsbl -0x1(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
mov    %rsi,%rcx
movzbl %dil,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define signext i8 @fn1(i8 signext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %6, %8
%10 = trunc i32 %9 to i8
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @fn1(i8 signext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = shl i32 %3, %4
%6 = trunc i32 %5 to i8
ret i8 %6
}
float BETWEENF(float a, float b, float c) {
  return (b < a ? a : (b > c ? c : b));
}


x86 assembly (clang, -O0):
<BETWEENF>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0x4(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <BETWEENF+0x35>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1167 <BETWEENF+0x67>
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1153 <BETWEENF+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    115d <BETWEENF+0x5d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<BETWEENF>:
minss  %xmm1,%xmm2
cmpltss %xmm0,%xmm1
andps  %xmm1,%xmm0
andnps %xmm2,%xmm1
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @BETWEENF(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = load float, float* %4
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %4
br label %22
12: ; preds = %3
%13 = load float, float* %5
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
br label %20
18: ; preds = %12
%19 = load float, float* %5
br label %20
20: ; preds = %18, %16
%21 = phi float [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi float [ %11, %10 ], [ %21, %20 ]
ret float %23
}

LLVM IR (-O2):
define float @BETWEENF(float %0, float %1, float %2) {
%4 = fcmp olt float %1, %0
%5 = fcmp ogt float %1, %2
%6 = select i1 %5, float %2, float %1
%7 = select i1 %4, float %0, float %6
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ simplesample_mqtt_run();
int main(void) {
  simplesample_mqtt_run();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <simplesample_mqtt_run@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <simplesample_mqtt_run@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @simplesample_mqtt_run()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @simplesample_mqtt_run()
ret i32 0
}
/* Variables and functions */
int *a_ptr(int **);
void foo(int **x) {
  int *p = a_ptr(x);
  *p = 3;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <a_ptr@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x3,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
call   1030 <a_ptr@plt>
movl   $0x3,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @foo(i32** %0) {
%2 = alloca i32**
%3 = alloca i32*
store i32** %0, i32*** %2
%4 = load i32**, i32*** %2
%5 = call i32* @a_ptr(i32** %4)
store i32* %5, i32** %3
%6 = load i32*, i32** %3
store i32 3, i32* %6
ret void
}

LLVM IR (-O2):
define void @foo(i32** %0) {
%2 = tail call i32* @a_ptr(i32** %0)
store i32 3, i32* %2
ret void
}
/* Variables and functions */
double sqrt(double);
double Vec3Norm2(double vec[3]) {
  return sqrt(vec[0] * vec[0] + vec[1] * vec[1] + vec[2] * vec[2]);
}


x86 assembly (clang, -O0):
<Vec3Norm2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vec3Norm2>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1141 <Vec3Norm2+0x31>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @Vec3Norm2(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
%24 = call double @sqrt(double %23)
ret double %24
}

LLVM IR (-O2):
define double @Vec3Norm2(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
%10 = tail call double @sqrt(double %9)
ret double %10
}
int age(int n) {
  int c;
  if (n == 1)
    c = 10;
  else
    c = age(n - 1) + 2;
  return (c);
}


x86 assembly (clang, -O0):
<age>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1131 <age+0x21>
movl   $0xa,-0x8(%rbp)
jmp    1142 <age+0x32>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <age@plt>
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<age>:
cmp    $0x1,%edi
lea    0x8(%rdi,%rdi,1),%ecx
mov    $0xa,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @age(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 10, i32* %3
br label %12
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 %8, 1
%10 = call i32 @age(i32 %9)
%11 = add nsw i32 %10, 2
store i32 %11, i32* %3
br label %12
12: ; preds = %7, %6
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @age(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = shl i32 %0, 1
%4 = add i32 %3, 8
%5 = select i1 %2, i32 10, i32 %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef size_t uint32_t;

/* Variables and functions */
int /*<<< orphan*/ uex_ioread8(void *);
void uex_memcpy_fromio(void *d, void *s, uint32_t count) {
  uint32_t i = 0;
  uint8_t *d_p = d;
  while (i < count) {
    d_p[i] = uex_ioread8(s + i);
    i++;
  }
}


x86 assembly (clang, -O0):
<uex_memcpy_fromio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    116d <uex_memcpy_fromio+0x5d>
mov    -0x10(%rbp),%rdi
add    -0x20(%rbp),%rdi
call   1030 <uex_ioread8@plt>
mov    %eax,%edx
mov    -0x28(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1134 <uex_memcpy_fromio+0x24>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uex_memcpy_fromio>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     1146 <uex_memcpy_fromio+0x36>
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
lea    (%r14,%rbx,1),%rdi
call   1030 <uex_ioread8@plt>
mov    %eax,(%r15,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <uex_memcpy_fromio+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @uex_memcpy_fromio(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i64 0, i64* %7
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %8
br label %11
11: ; preds = %15, %3
%12 = load i64, i64* %7
%13 = load i64, i64* %6
%14 = icmp ult i64 %12, %13
br i1 %14, label %15, label %25
15: ; preds = %11
%16 = load i8*, i8** %5
%17 = load i64, i64* %7
%18 = getelementptr i8, i8* %16, i64 %17
%19 = call i32 @uex_ioread8(i8* %18)
%20 = load i32*, i32** %8
%21 = load i64, i64* %7
%22 = getelementptr inbounds i32, i32* %20, i64 %21
store i32 %19, i32* %22
%23 = load i64, i64* %7
%24 = add i64 %23, 1
store i64 %24, i64* %7
br label %11
25: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @uex_memcpy_fromio(i8* nocapture writeonly %0, i8* %1, i64 %2) {
%4 = bitcast i8* %0 to i32*
%5 = icmp eq i64 %2, 0
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %11, %6 ], [ 0, %3 ]
%8 = getelementptr i8, i8* %1, i64 %7
%9 = tail call i32 @uex_ioread8(i8* %8)
%10 = getelementptr inbounds i32, i32* %4, i64 %7
store i32 %9, i32* %10
%11 = add nuw i64 %7, 1
%12 = icmp eq i64 %11, %2
br i1 %12, label %13, label %6
13: ; preds = %6, %3
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t QEIIntStatus(uint32_t ui32Base, bool bMasked) {
  ;
  if (bMasked) {
    return ((*((volatile unsigned long *)(ui32Base + 0x00000028))));
  } else {
    return ((*((volatile unsigned long *)(ui32Base + 0x00000024))));
  }
}


x86 assembly (clang, -O0):
<QEIIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1126 <QEIIntStatus+0x26>
mov    -0x10(%rbp),%rax
mov    0x28(%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1132 <QEIIntStatus+0x32>
mov    -0x10(%rbp),%rax
mov    0x24(%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIIntStatus>:
mov    %rdi,-0x8(%rsp)
xor    %eax,%eax
test   %esi,%esi
setne  %al
mov    -0x8(%rsp),%rcx
mov    0x24(%rcx,%rax,4),%rax
ret

LLVM IR (-O0):
define i64 @QEIIntStatus(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store volatile i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load volatile i64, i64* %4
%10 = add i64 %9, 40
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
store i64 %12, i64* %3
br label %18
13: ; preds = %2
%14 = load volatile i64, i64* %4
%15 = add i64 %14, 36
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
store i64 %17, i64* %3
br label %18
18: ; preds = %13, %8
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @QEIIntStatus(i64 %0, i32 %1) {
%3 = alloca i64
store volatile i64 %0, i64* %3
%4 = icmp eq i32 %1, 0
%5 = load volatile i64, i64* %3
%6 = select i1 %4, i64 36, i64 40
%7 = add i64 %5, %6
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
ret i64 %9
}
const char *Function_Description(void) {
  return "The `Function` type allows C function pointers to be treated as "
         "Cello objects. They can be passed around, stored, and manipulated. "
         "Only C "
         "functions of the type `var(*)(var)` can be stored as a `Function` "
         "type "
         "and when called the arguments will be wrapped into an iterable and "
         "passed "
         "as the first argument, typically in the form of a `tuple`.";
}


x86 assembly (clang, -O0):
<Function_Description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Function_Description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [342 x i8] c"The `Function` type allows C function pointers to be treated as Cello objects. They can be passed around, stored, and manipulated. Only C functions of the type `var(*)(var)` can be stored as a `Function` type and when called the arguments will be wrapped into an iterable and passed as the first argument, typically in the form of a `tuple`.\00"
define i8* @Function_Description() {
ret i8* getelementptr inbounds ([342 x i8], [342 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [342 x i8] c"The `Function` type allows C function pointers to be treated as Cello objects. They can be passed around, stored, and manipulated. Only C functions of the type `var(*)(var)` can be stored as a `Function` type and when called the arguments will be wrapped into an iterable and passed as the first argument, typically in the form of a `tuple`.\00"
define i8* @Function_Description() {
ret i8* getelementptr inbounds ([342 x i8], [342 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
scalar_t__ isspecial(char);
int needs_quotation(char *str) {
  char c;
  while ((c = *str++)) {
    if (isspecial(c))
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<needs_quotation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x11(%rbp)
cmp    $0x0,%al
je     115c <needs_quotation+0x4c>
movsbl -0x11(%rbp),%edi
call   1030 <isspecial@plt>
cmp    $0x0,%rax
je     1157 <needs_quotation+0x47>
movl   $0x1,-0x4(%rbp)
jmp    1163 <needs_quotation+0x53>
jmp    111c <needs_quotation+0xc>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<needs_quotation>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rbx),%eax
test   %al,%al
je     113f <needs_quotation+0x2f>
add    $0x1,%rbx
movsbl %al,%edi
call   1030 <isspecial@plt>
test   %rax,%rax
je     1120 <needs_quotation+0x10>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @needs_quotation(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
br label %5
5: ; preds = %15, %1
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %3
%8 = load i8, i8* %6
store i8 %8, i8* %4
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %5
%11 = load i8, i8* %4
%12 = call i64 @isspecial(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 1, i32* %2
br label %17
15: ; preds = %10
br label %5
16: ; preds = %5
store i32 0, i32* %2
br label %17
17: ; preds = %16, %14
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @needs_quotation(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
%8 = tail call i64 @isspecial(i8 signext %4)
%9 = icmp eq i64 %8, 0
br i1 %9, label %2, label %10
10: ; preds = %2, %6
%11 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %11
}
char *c_utf8_prev_char(const char *str) {
  const char *p = str;
  do {
    p--;
  } while ((*p & 0xc0) == 0xb0);
  return (char *)p;
}


x86 assembly (clang, -O0):
<c_utf8_prev_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
and    $0xc0,%eax
cmp    $0xb0,%eax
je     1110 <c_utf8_prev_char+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_utf8_prev_char>:
lea    -0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @c_utf8_prev_char(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %8, %1
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i32 -1
store i8* %7, i8** %3
br label %8
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = and i32 %11, 192
%13 = icmp eq i32 %12, 176
br i1 %13, label %5, label %14
14: ; preds = %8
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @c_utf8_prev_char(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 -1
ret i8* %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void reset_bit(uint8_t bitmap[], size_t bit) {
  bitmap[bit / 8] &= ~(1 << (bit % 8));
}


x86 assembly (clang, -O0):
<reset_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7,%rax
mov    %eax,%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x3,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_bit>:
mov    %esi,%ecx
and    $0x7,%cl
mov    $0xfffffffe,%eax
rol    %cl,%eax
shr    $0x3,%rsi
and    %eax,(%rdi,%rsi,4)
ret

LLVM IR (-O0):
define void @reset_bit(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = urem i64 %5, 8
%7 = trunc i64 %6 to i32
%8 = shl i32 1, %7
%9 = xor i32 %8, -1
%10 = load i32*, i32** %3
%11 = load i64, i64* %4
%12 = udiv i64 %11, 8
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = and i32 %14, %9
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @reset_bit(i32* nocapture %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = and i32 %3, 7
%5 = shl nuw nsw i32 1, %4
%6 = xor i32 %5, -1
%7 = lshr i64 %1, 3
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = and i32 %9, %6
store i32 %10, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int x;
  int y = 55;
  for (x = 1; y <= 75; y = (++x * 5) + 50)
    printf("%10d %10d\n", x, y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x37,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x4b,-0xc(%rbp)
jg     1160 <main+0x50>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
imul   $0x5,%eax,%eax
add    $0x32,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x37,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
mov    $0x3c,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
mov    $0x41,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x4,%esi
mov    $0x46,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
mov    $0x4b,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%10d %10d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 55, i32* %3
store i32 1, i32* %2
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 75
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9)
br label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
%14 = mul nsw i32 %13, 5
%15 = add nsw i32 %14, 50
store i32 %15, i32* %3
br label %4
16: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"%10d %10d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 1, i32 55)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 2, i32 60)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 3, i32 65)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 4, i32 70)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 5, i32 75)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_CRLID;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_CRLID_it;
OCSP_CRLID *OCSP_CRLID_new(void) {
  return (OCSP_CRLID *)ASN1_item_new(&OCSP_CRLID_it);
}


x86 assembly (clang, -O0):
<OCSP_CRLID_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_CRLID_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@OCSP_CRLID_it = global i32 0
define i32* @OCSP_CRLID_new() {
%1 = call i64 @ASN1_item_new(i32* @OCSP_CRLID_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@OCSP_CRLID_it = global i32 0
define i32* @OCSP_CRLID_new() {
%1 = tail call i64 @ASN1_item_new(i32* @OCSP_CRLID_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
void *f11(int n) {
  int *x = malloc(n * sizeof(int));
  int i = 0;
  do {
    x[i++] = 0;
  } while (i < n);
  return x;
}


x86 assembly (clang, -O0):
<f11>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x14(%rbp)
movslq %ecx,%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jl     1133 <f11+0x23>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f11>:
push   %r14
push   %rbx
push   %rax
movslq %edi,%rbx
lea    0x0(,%rbx,4),%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
cmp    $0x2,%ebx
mov    $0x1,%edx
cmovge %ebx,%edx
shl    $0x2,%rdx
mov    %rax,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @f11(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 4
%8 = call i8* @malloc(i64 %7)
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %3
store i32 0, i32* %4
br label %10
10: ; preds = %16, %1
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
store i32 %13, i32* %4
%14 = sext i32 %12 to i64
%15 = getelementptr inbounds i32, i32* %11, i64 %14
store i32 0, i32* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %4
%18 = load i32, i32* %2
%19 = icmp slt i32 %17, %18
br i1 %19, label %10, label %20
20: ; preds = %16
%21 = load i32*, i32** %3
%22 = bitcast i32* %21 to i8*
ret i8* %22
}

LLVM IR (-O2):
define noalias i8* @f11(i32 %0) {
%2 = sext i32 %0 to i64
%3 = shl nsw i64 %2, 2
%4 = tail call i8* @malloc(i64 %3)
%5 = call i32 @llvm.smax.i32(i32 %0, i32 1)
%6 = zext i32 %5 to i64
%7 = shl nuw nsw i64 %6, 2
ret i8* %4
}
void gtk_icon_view_new() {}


x86 assembly (clang, -O0):
<gtk_icon_view_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_view_new>:
ret

LLVM IR (-O0):
define void @gtk_icon_view_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_view_new() {
ret void
}
int mem_cgroup_reclaim_imbalance(struct mem_cgroup *mem) { return 0; }


x86 assembly (clang, -O0):
<mem_cgroup_reclaim_imbalance>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_cgroup_reclaim_imbalance>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mem_cgroup = type opaque
define i32 @mem_cgroup_reclaim_imbalance(%struct.mem_cgroup* %0) {
%2 = alloca %struct.mem_cgroup*
store %struct.mem_cgroup* %0, %struct.mem_cgroup** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mem_cgroup = type opaque
define i32 @mem_cgroup_reclaim_imbalance(%struct.mem_cgroup* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ *stem_internal(int /*<<< orphan*/ *, int /*<<< orphan*/);
wchar_t *stem(wchar_t *word) { return stem_internal(word, 0); }


x86 assembly (clang, -O0):
<stem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <stem_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stem>:
xor    %esi,%esi
jmp    1030 <stem_internal@plt>

LLVM IR (-O0):
define i32* @stem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @stem_internal(i32* %3, i32 0)
ret i32* %4
}

LLVM IR (-O2):
define i32* @stem(i32* %0) {
%2 = tail call i32* @stem_internal(i32* %0, i32 0)
ret i32* %2
}