char IPOSG(int i) {
  switch (i) {
  case 0:
    return ('?');
  case 1:
    return ('A');
  case 2:
    return ('B');
  case 3:
    return ('L');
  case 4:
    return ('D');
  case 5:
    return ('N');
  case 6:
    return ('R');
  case 7:
    return ('U');
  case 8:
    return ('V');
  case 9:
    return ('W');
  case 10:
    return ('X');
  case 11:
    return ('Y');
  case 12:
    return ('Z');
  case 13:
    return ('H');
  case 14:
    return ('K');
  case 15:
    return ('E');
  case 16:
    return ('x');
  case 17:
    return ('9');
  case 18:
    return ('0');
  }
  return ('?');
}


x86 assembly (clang, -O0):
<IPOSG>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x12,%rax
ja     11d7 <IPOSG+0xd7>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x3f,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x41,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x42,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x4c,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x44,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x4e,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x52,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x55,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x56,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x57,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x58,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x59,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x5a,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x48,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x4b,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x45,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x78,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x39,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x30,-0x1(%rbp)
jmp    11db <IPOSG+0xdb>
movb   $0x3f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IPOSG>:
add    $0xffffffff,%edi
mov    $0x3f,%al
cmp    $0x11,%edi
ja     1117 <IPOSG+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
define signext i8 @IPOSG(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %24 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
i32 4, label %9
i32 5, label %10
i32 6, label %11
i32 7, label %12
i32 8, label %13
i32 9, label %14
i32 10, label %15
i32 11, label %16
i32 12, label %17
i32 13, label %18
i32 14, label %19
i32 15, label %20
i32 16, label %21
i32 17, label %22
i32 18, label %23
]
5: ; preds = %1
store i8 63, i8* %2
br label %25
6: ; preds = %1
store i8 65, i8* %2
br label %25
7: ; preds = %1
store i8 66, i8* %2
br label %25
8: ; preds = %1
store i8 76, i8* %2
br label %25
9: ; preds = %1
store i8 68, i8* %2
br label %25
10: ; preds = %1
store i8 78, i8* %2
br label %25
11: ; preds = %1
store i8 82, i8* %2
br label %25
12: ; preds = %1
store i8 85, i8* %2
br label %25
13: ; preds = %1
store i8 86, i8* %2
br label %25
14: ; preds = %1
store i8 87, i8* %2
br label %25
15: ; preds = %1
store i8 88, i8* %2
br label %25
16: ; preds = %1
store i8 89, i8* %2
br label %25
17: ; preds = %1
store i8 90, i8* %2
br label %25
18: ; preds = %1
store i8 72, i8* %2
br label %25
19: ; preds = %1
store i8 75, i8* %2
br label %25
20: ; preds = %1
store i8 69, i8* %2
br label %25
21: ; preds = %1
store i8 120, i8* %2
br label %25
22: ; preds = %1
store i8 57, i8* %2
br label %25
23: ; preds = %1
store i8 48, i8* %2
br label %25
24: ; preds = %1
store i8 63, i8* %2
br label %25
25: ; preds = %24, %23, %22, %21, %20, %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5
%26 = load i8, i8* %2
ret i8 %26
}

LLVM IR (-O2):
@switch.table.IPOSG = [18 x i8] c"ABLDNRUVWXYZHKEx90"
define signext i8 @IPOSG(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 18
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [18 x i8], [18 x i8]* @switch.table.IPOSG, i64 0, i64 %5
%7 = load i8, i8* %6
br label %8
8: ; preds = %4, %1
%9 = phi i8 [ 63, %1 ], [ %7, %4 ]
ret i8 %9
}