xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void rfc4175_set_extended_sequence_number(uint8_t *buf, uint16_t number) {
  buf[0] = (number >> 8) & 0xff;
  buf[1] = number & 0xff;
}


x86 assembly (clang, -O0):
<rfc4175_set_extended_sequence_number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfc4175_set_extended_sequence_number>:
mov    %esi,%eax
movzbl %ah,%ecx
mov    %ecx,(%rdi)
movzbl %al,%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @rfc4175_set_extended_sequence_number(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = and i32 %6, 255
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 1
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @rfc4175_set_extended_sequence_number(i32* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 255
store i32 %4, i32* %0
%5 = and i32 %1, 255
%6 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %5, i32* %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
void endianswap(uint16_t *ptr, int size) {
  while (size > 0) {
    size--;
    ptr[size] = ntohs(ptr[size]);
  }
}


x86 assembly (clang, -O0):
<endianswap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1154 <endianswap+0x44>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <ntohs@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
jmp    111f <endianswap+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endianswap>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    114b <endianswap+0x3b>
mov    %rdi,%r14
mov    %esi,%ebx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x2(%rbx),%r15d
mov    (%r14,%r15,4),%edi
call   1030 <ntohs@plt>
mov    %eax,(%r14,%r15,4)
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1130 <endianswap+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @endianswap(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %8, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %5
%9 = load i32, i32* %4
%10 = add nsw i32 %9, -1
store i32 %10, i32* %4
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @ntohs(i32 %15)
%17 = load i32*, i32** %3
%18 = load i32, i32* %4
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
br label %5
21: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @endianswap(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = and i64 %8, 4294967295
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 @ntohs(i32 %11)
store i32 %12, i32* %10
%13 = icmp ugt i64 %7, 1
br i1 %13, label %6, label %14
14: ; preds = %6, %2
ret void
}
void _asm_generic2parm_end(void) {}


x86 assembly (clang, -O0):
<_asm_generic2parm_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_asm_generic2parm_end>:
ret

LLVM IR (-O0):
define void @_asm_generic2parm_end() {
ret void
}

LLVM IR (-O2):
define void @_asm_generic2parm_end() {
ret void
}
int close(double x, double y) {
  if (x > y)
    return x - y < 0.000001;
  else
    return y - x < 0.000001;
}


x86 assembly (clang, -O0):
<close>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    1144 <close+0x44>
movsd  -0x10(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
movsd  0xed0(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1165 <close+0x65>
movsd  -0x18(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xeaa(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<close>:
movapd %xmm0,%xmm2
subsd  %xmm1,%xmm2
movapd %xmm1,%xmm3
subsd  %xmm0,%xmm3
cmpltsd %xmm0,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm3,%xmm1
orpd   %xmm2,%xmm1
movsd  0xed7(%rip),%xmm0
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @close(double %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load double, double* %4
%11 = load double, double* %5
%12 = fsub double %10, %11
%13 = fcmp olt double %12, 0x3EB0C6F7A0B5ED8D
%14 = zext i1 %13 to i32
store i32 %14, i32* %3
br label %21
15: ; preds = %2
%16 = load double, double* %5
%17 = load double, double* %4
%18 = fsub double %16, %17
%19 = fcmp olt double %18, 0x3EB0C6F7A0B5ED8D
%20 = zext i1 %19 to i32
store i32 %20, i32* %3
br label %21
21: ; preds = %15, %9
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @close(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = fsub double %0, %1
%5 = fsub double %1, %0
%6 = select i1 %3, double %4, double %5
%7 = fcmp olt double %6, 0x3EB0C6F7A0B5ED8D
%8 = zext i1 %7 to i32
ret i32 %8
}
int t(int i) {
  int j;
  if (i == 0) {
    j = 1;
    goto end;
  }
  j = 0;
end:
  return j;
}


x86 assembly (clang, -O0):
<t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    111d <t+0x1d>
movl   $0x1,-0x8(%rbp)
jmp    1124 <t+0x24>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @t(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %8
7: ; preds = %1
store i32 0, i32* %3
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @t(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int core7_swap(char *, int);
int U_EMROFFSETCLIPRGN_swap(char *record, int torev) {
  return (core7_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMROFFSETCLIPRGN_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core7_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMROFFSETCLIPRGN_swap>:
jmp    1030 <core7_swap@plt>

LLVM IR (-O0):
define i32 @U_EMROFFSETCLIPRGN_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core7_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMROFFSETCLIPRGN_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core7_swap(i8* %0, i32 %1)
ret i32 %3
}
void av_dup_packet() {}


x86 assembly (clang, -O0):
<av_dup_packet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_dup_packet>:
ret

LLVM IR (-O0):
define void @av_dup_packet() {
ret void
}

LLVM IR (-O2):
define void @av_dup_packet() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Ayyappa\n Dno 3-405\n Mandapam colony\n Sarpavaram\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [49 x i8] c"Ayyappa\0A Dno 3-405\0A Mandapam colony\0A Sarpavaram\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [48 x i8] c"Ayyappa\0A Dno 3-405\0A Mandapam colony\0A Sarpavaram\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
ret i32 0
}
unsigned int GetVendorID(void) { return 0xFFFFFFFF; }


x86 assembly (clang, -O0):
<GetVendorID>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetVendorID>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @GetVendorID() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @GetVendorID() {
ret i32 -1
}
char peek(char ARR[50], char val) { return ARR[val]; }


x86 assembly (clang, -O0):
<peek>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbq -0x9(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<peek>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%al
ret

LLVM IR (-O0):
define signext i8 @peek(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %4
%7 = sext i8 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @peek(i8* nocapture %0, i8 signext %1) {
%3 = sext i8 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
ret i8 %5
}
void isr_int_seg_not_present(long error_code) {}


x86 assembly (clang, -O0):
<isr_int_seg_not_present>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<isr_int_seg_not_present>:
ret

LLVM IR (-O0):
define void @isr_int_seg_not_present(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @isr_int_seg_not_present(i64 %0) {
ret void
}
void out2(x, y) {
  writeop(x);
  wrc(' ');
  wrn(y);
  wrc(' ');
}


x86 assembly (clang, -O0):
<out2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1040 <writeop@plt>
mov    $0x20,%edi
mov    $0x0,%al
call   1030 <wrc@plt>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1050 <wrn@plt>
mov    $0x20,%edi
mov    $0x0,%al
call   1030 <wrc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out2>:
push   %rbx
mov    %esi,%ebx
xor    %eax,%eax
call   1040 <writeop@plt>
mov    $0x20,%edi
xor    %eax,%eax
call   1030 <wrc@plt>
mov    %ebx,%edi
xor    %eax,%eax
call   1050 <wrn@plt>
mov    $0x20,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <wrc@plt>

LLVM IR (-O0):
define void @out2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 (i32, ...) bitcast (i32 (...)* @writeop to i32 (i32, ...)*)(i32 %5)
%7 = call i32 (i32, ...) bitcast (i32 (...)* @wrc to i32 (i32, ...)*)(i32 32)
%8 = load i32, i32* %4
%9 = call i32 (i32, ...) bitcast (i32 (...)* @wrn to i32 (i32, ...)*)(i32 %8)
%10 = call i32 (i32, ...) bitcast (i32 (...)* @wrc to i32 (i32, ...)*)(i32 32)
ret void
}

LLVM IR (-O2):
define void @out2(i32 %0, i32 %1) {
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @writeop to i32 (i32, ...)*)(i32 %0)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @wrc to i32 (i32, ...)*)(i32 32)
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @wrn to i32 (i32, ...)*)(i32 %1)
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @wrc to i32 (i32, ...)*)(i32 32)
ret void
}
/* Variables and functions */
int AF_INET6;
int idrnet_af_inet6() { return AF_INET6; }


x86 assembly (clang, -O0):
<idrnet_af_inet6>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idrnet_af_inet6>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@AF_INET6 = global i32 0
define i32 @idrnet_af_inet6() {
%1 = load i32, i32* @AF_INET6
ret i32 %1
}

LLVM IR (-O2):
@AF_INET6 = global i32 0
define i32 @idrnet_af_inet6() {
%1 = load i32, i32* @AF_INET6
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ CMAC_CTX;

/* Variables and functions */
int /*<<< orphan*/ CMAC_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void CMAC_CTX_free(CMAC_CTX *ctx) {
  if (ctx == NULL)
    return;
  CMAC_CTX_cleanup(ctx);
  free(ctx);
}


x86 assembly (clang, -O0):
<CMAC_CTX_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <CMAC_CTX_free+0x1c>
jmp    114e <CMAC_CTX_free+0x2e>
mov    -0x8(%rbp),%rdi
call   1040 <CMAC_CTX_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMAC_CTX_free>:
test   %rdi,%rdi
je     1137 <CMAC_CTX_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <CMAC_CTX_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @CMAC_CTX_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = call i32 @CMAC_CTX_cleanup(i32* %7)
%9 = load i32*, i32** %2
%10 = call i32 @free(i32* %9)
br label %11
11: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @CMAC_CTX_free(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @CMAC_CTX_cleanup(i32* %0)
%5 = tail call i32 @free(i32* %0)
br label %6
6: ; preds = %1, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int closedir(int /*<<< orphan*/ *);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ errx(int, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
void checked_closedir(DIR *d) {
  int err = closedir(d);
  if (err != 0) {
    errx(1, "Failed to close a directory: %s", strerror(errno));
  }
}


x86 assembly (clang, -O0):
<checked_closedir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <closedir@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1173 <checked_closedir+0x43>
mov    0x2e87(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %eax,%edx
mov    $0x1,%edi
lea    0xe92(%rip),%rsi
call   1030 <errx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checked_closedir>:
push   %rax
call   1040 <closedir@plt>
test   %eax,%eax
je     115c <checked_closedir+0x2c>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeb1(%rip),%rsi
mov    $0x1,%edi
mov    %eax,%edx
pop    %rax
jmp    1030 <errx@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [32 x i8] c"Failed to close a directory: %s\00"
@errno = global i32 0
define void @checked_closedir(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @closedir(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* @errno
%10 = call i32 @strerror(i32 %9)
%11 = call i32 @errx(i32 1, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %12
12: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"Failed to close a directory: %s\00"
@errno = global i32 0
define void @checked_closedir(i32* nocapture %0) {
%2 = tail call i32 @closedir(i32* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = load i32, i32* @errno
%6 = tail call i32 @strerror(i32 %5)
%7 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %4, %1
ret void
}
int atomic_dec_and_test_long(volatile long *var) {
  char ret;
  asm volatile("lock ;"
               " "
               "decl %0"
               "\n\t"
               "setz %1 \n\t"
               : "=m"(*var), "=qm"(ret)
               : "m"(*var)
               : "cc", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<atomic_dec_and_test_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
lock decl (%rax)
sete   -0x9(%rbp)
movsbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_dec_and_test_long>:
lock decl (%rdi)
sete   -0x1(%rsp)
movsbl -0x1(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @atomic_dec_and_test_long(i64* %0) {
%2 = alloca i64*
%3 = alloca i8
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = load i64*, i64** %2
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @atomic_dec_and_test_long(i64* %0) {
%2 = alloca i8
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
bool is_delim(char c) { return (c == '\t' || c == '\n'); }


x86 assembly (clang, -O0):
<is_delim>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     1129 <is_delim+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_delim>:
add    $0xf7,%dil
xor    %eax,%eax
cmp    $0x2,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_delim(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 9
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 10
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_delim(i8 signext %0) {
%2 = add i8 %0, -9
%3 = icmp ult i8 %2, 2
%4 = zext i1 %3 to i32
ret i32 %4
}
void free_object(void *pointer_to_memory) {}


x86 assembly (clang, -O0):
<free_object>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_object>:
ret

LLVM IR (-O0):
define void @free_object(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @free_object(i8* nocapture %0) {
ret void
}
int __ocl_any_int(int src) { return (src >> (32 - 1)) & 0x1; }


x86 assembly (clang, -O0):
<__ocl_any_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_any_int>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @__ocl_any_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 31
%5 = and i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @__ocl_any_int(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ino_t;

/* Variables and functions */
ino_t ret_ino_t(ino_t arg1) { return arg1; }


x86 assembly (clang, -O0):
<ret_ino_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ret_ino_t>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ret_ino_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @ret_ino_t(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void __attribute__((__no__)) callee2(long v) {
  if (v != 42)
    abort();
}


x86 assembly (clang, -O0):
<callee2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x2a,-0x8(%rbp)
je     112e <callee2+0x1e>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callee2>:
cmp    $0x2a,%rdi
jne    1117 <callee2+0x7>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @callee2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 42
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @callee2(i64 %0) {
%2 = icmp eq i64 %0, 42
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int);
void cthread_self_sleep(unsigned int millisecond) {
  usleep(millisecond * 1000);
}


x86 assembly (clang, -O0):
<cthread_self_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cthread_self_sleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @cthread_self_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @cthread_self_sleep(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
int get_any_unsigned_char() {
  unsigned char c;
  return c;
}


x86 assembly (clang, -O0):
<get_any_unsigned_char>:
push   %rbp
mov    %rsp,%rbp
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_any_unsigned_char>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_any_unsigned_char() {
%1 = alloca i8
%2 = load i8, i8* %1
%3 = zext i8 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @get_any_unsigned_char() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ put_character();
int /*<<< orphan*/ put_misc1();
int /*<<< orphan*/ put_misc2();
int /*<<< orphan*/ put_misc3();
int /*<<< orphan*/ put_stats();
void display_char() {
  put_character();
  put_misc1();
  put_stats();
  put_misc2();
  put_misc3();
}


x86 assembly (clang, -O0):
<display_char>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <put_character@plt>
mov    $0x0,%al
call   1040 <put_misc1@plt>
mov    $0x0,%al
call   1030 <put_stats@plt>
mov    $0x0,%al
call   1070 <put_misc2@plt>
mov    $0x0,%al
call   1050 <put_misc3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_char>:
push   %rax
xor    %eax,%eax
call   1060 <put_character@plt>
xor    %eax,%eax
call   1040 <put_misc1@plt>
xor    %eax,%eax
call   1030 <put_stats@plt>
xor    %eax,%eax
call   1070 <put_misc2@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <put_misc3@plt>

LLVM IR (-O0):
define void @display_char() {
%1 = call i32 (...) @put_character()
%2 = call i32 (...) @put_misc1()
%3 = call i32 (...) @put_stats()
%4 = call i32 (...) @put_misc2()
%5 = call i32 (...) @put_misc3()
ret void
}

LLVM IR (-O2):
define void @display_char() {
%1 = tail call i32 (...) @put_character()
%2 = tail call i32 (...) @put_misc1()
%3 = tail call i32 (...) @put_stats()
%4 = tail call i32 (...) @put_misc2()
%5 = tail call i32 (...) @put_misc3()
ret void
}
int ccnl_suite2defaultPort(int suite) { return 6363; }


x86 assembly (clang, -O0):
<ccnl_suite2defaultPort>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x18db,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnl_suite2defaultPort>:
mov    $0x18db,%eax
ret

LLVM IR (-O0):
define i32 @ccnl_suite2defaultPort(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 6363
}

LLVM IR (-O2):
define i32 @ccnl_suite2defaultPort(i32 %0) {
ret i32 6363
}
void RecursiveReverse(struct node **headRef) { ; }


x86 assembly (clang, -O0):
<RecursiveReverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RecursiveReverse>:
ret

LLVM IR (-O0):
%struct.node = type opaque
define void @RecursiveReverse(%struct.node** %0) {
%2 = alloca %struct.node**
store %struct.node** %0, %struct.node*** %2
ret void
}

LLVM IR (-O2):
%struct.node = type opaque
define void @RecursiveReverse(%struct.node** nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SHA1(unsigned char const *, size_t, unsigned char *);
int crypto_sha1_generate(unsigned char *hash, const unsigned char *text,
                         size_t len) {
  if (!SHA1(text, len, hash)) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<crypto_sha1_generate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <SHA1@plt>
cmp    $0x0,%eax
jne    114a <crypto_sha1_generate+0x3a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <crypto_sha1_generate+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_sha1_generate>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rax,%rdx
call   1030 <SHA1@plt>
cmp    $0x1,%eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @crypto_sha1_generate(i8* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %6
%9 = load i64, i64* %7
%10 = load i8*, i8** %5
%11 = call i32 @SHA1(i8* %8, i64 %9, i8* %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %3
store i32 -1, i32* %4
br label %15
14: ; preds = %3
store i32 0, i32* %4
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @crypto_sha1_generate(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @SHA1(i8* %1, i64 %2, i8* %0)
%5 = icmp eq i32 %4, 0
%6 = sext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
unsigned long GetStringWidth115(char const *);
unsigned long getstringwidth(const char *s) { return GetStringWidth115(s); }


x86 assembly (clang, -O0):
<getstringwidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetStringWidth115@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getstringwidth>:
jmp    1030 <GetStringWidth115@plt>

LLVM IR (-O0):
define i64 @getstringwidth(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @GetStringWidth115(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @getstringwidth(i8* %0) {
%2 = tail call i64 @GetStringWidth115(i8* %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ putchar_fastcall(int);
void rptc(int cc, int n) {
  while (n--)
    putchar_fastcall(cc);
}


x86 assembly (clang, -O0):
<rptc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     113f <rptc+0x2f>
mov    -0x4(%rbp),%edi
call   1030 <putchar_fastcall@plt>
jmp    111e <rptc+0xe>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rptc>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
je     112c <rptc+0x1c>
mov    %esi,%ebx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
call   1030 <putchar_fastcall@plt>
add    $0xffffffff,%ebx
jne    1120 <rptc+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @rptc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i32, i32* %3
%11 = call i32 @putchar_fastcall(i32 %10)
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @rptc(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = add nsw i32 %5, -1
%7 = tail call i32 @putchar_fastcall(i32 %0)
%8 = icmp eq i32 %6, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
void gtk_text_tag_table_get_size() {}


x86 assembly (clang, -O0):
<gtk_text_tag_table_get_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_tag_table_get_size>:
ret

LLVM IR (-O0):
define void @gtk_text_tag_table_get_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_tag_table_get_size() {
ret void
}
/* Variables and functions */
char *trap_Cvar_String(char *);
int CG_DownloadInProgress(void *parameter) {
  const char *str;
  str = trap_Cvar_String("cl_download_name");
  if (str[0])
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<CG_DownloadInProgress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <trap_Cvar_String@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <CG_DownloadInProgress+0x35>
movl   $0x1,-0x4(%rbp)
jmp    114c <CG_DownloadInProgress+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_DownloadInProgress>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <trap_Cvar_String@plt>
xor    %ecx,%ecx
cmpb   $0x0,(%rax)
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"cl_download_name\00"
define i32 @CG_DownloadInProgress(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = call i8* @trap_Cvar_String(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [17 x i8] c"cl_download_name\00"
define i32 @CG_DownloadInProgress(i8* nocapture readnone %0) {
%2 = tail call i8* @trap_Cvar_String(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int memory_is_address_valid(int address) {
  if (address >= (512 * 128) || address < 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<memory_is_address_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x10000,-0x8(%rbp)
jge    111e <memory_is_address_valid+0x1e>
cmpl   $0x0,-0x8(%rbp)
jge    112a <memory_is_address_valid+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1131 <memory_is_address_valid+0x31>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_is_address_valid>:
xor    %eax,%eax
cmp    $0x10000,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @memory_is_address_valid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65536
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @memory_is_address_valid(i32 %0) {
%2 = icmp ult i32 %0, 65536
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
long get_num(char *, char *);
char *long2str(char *, int /*<<< orphan*/);
int /*<<< orphan*/ tt_vertex(int, long);
char *macttNVertex(char *arg) {
  int tbl;
  long top;
  top = get_num("ttNVertex", arg);
  tbl = (int)get_num("ttNVertex", arg);
  return (long2str(arg, tt_vertex(tbl, top)));
}


x86 assembly (clang, -O0):
<macttNVertex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1030 <get_num@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xea5(%rip),%rdi
call   1030 <get_num@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
call   1040 <tt_vertex@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1050 <long2str@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<macttNVertex>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%rbx
lea    0xec1(%rip),%r14
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <get_num@plt>
mov    %rax,%r15
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <get_num@plt>
mov    %eax,%edi
mov    %r15,%rsi
call   1040 <tt_vertex@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <long2str@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"ttNVertex\00"
define i8* @macttNVertex(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @get_num(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %5)
store i64 %6, i64* %4
%7 = load i8*, i8** %2
%8 = call i64 @get_num(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = load i64, i64* %4
%13 = call i32 @tt_vertex(i32 %11, i64 %12)
%14 = call i8* @long2str(i8* %10, i32 %13)
ret i8* %14
}

LLVM IR (-O2):
@.str = [10 x i8] c"ttNVertex\00"
define i8* @macttNVertex(i8* %0) {
%2 = tail call i64 @get_num(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i64 @get_num(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = trunc i64 %3 to i32
%5 = tail call i32 @tt_vertex(i32 %4, i64 %2)
%6 = tail call i8* @long2str(i8* %0, i32 %5)
ret i8* %6
}
void ls_cost_nm8_decref(void) {}


x86 assembly (clang, -O0):
<ls_cost_nm8_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm8_decref>:
ret

LLVM IR (-O0):
define void @ls_cost_nm8_decref() {
ret void
}

LLVM IR (-O2):
define void @ls_cost_nm8_decref() {
ret void
}
signed long test_loops(int i) {
  int j = 0;
  for (; i < 10; i++)
    j += 2;
  do {
    i -= 3;
  } while (j--);
  return i;
}


x86 assembly (clang, -O0):
<test_loops>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    112f <test_loops+0x2f>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <test_loops+0xe>
jmp    1134 <test_loops+0x34>
mov    -0x4(%rbp),%eax
sub    $0x3,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
jne    1134 <test_loops+0x34>
movslq -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_loops>:
lea    -0x3(%rdi),%eax
cmp    $0xa,%edi
lea    (%rdi,%rdi,2),%ecx
lea    -0x35(%rcx,%rcx,1),%ecx
cmovge %eax,%ecx
movslq %ecx,%rax
ret

LLVM IR (-O0):
define i64 @test_loops(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 2
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
br label %14
14: ; preds = %17, %13
%15 = load i32, i32* %2
%16 = sub nsw i32 %15, 3
store i32 %16, i32* %2
br label %17
17: ; preds = %14
%18 = load i32, i32* %3
%19 = add nsw i32 %18, -1
store i32 %19, i32* %3
%20 = icmp ne i32 %18, 0
br i1 %20, label %14, label %21
21: ; preds = %17
%22 = load i32, i32* %2
%23 = sext i32 %22 to i64
ret i64 %23
}

LLVM IR (-O2):
define i64 @test_loops(i32 %0) {
%2 = icmp slt i32 %0, 10
%3 = mul i32 %0, 6
%4 = add nsw i32 %0, -3
%5 = add i32 %3, -53
%6 = select i1 %2, i32 %5, i32 %4
%7 = sext i32 %6 to i64
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ bcopy(void const *, void *, size_t);
void *memmove(void *dst, const void *src, size_t size) {
  bcopy(src, dst, size);
  return dst;
}


x86 assembly (clang, -O0):
<memmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <bcopy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove>:
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define i8* @memmove(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @bcopy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
ret i8* %11
}

LLVM IR (-O2):
define i8* @memmove(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %2, i1 false)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int);
int /*<<< orphan*/ tu_move(int, int);
__attribute__((always_)) void tu_mvaddch(int y, int x, int c) {
  tu_move(y, x);
  putchar(c);
}


x86 assembly (clang, -O0):
<tu_mvaddch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <tu_move@plt>
mov    -0xc(%rbp),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tu_mvaddch>:
push   %rbx
mov    %edx,%ebx
call   1040 <tu_move@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @tu_mvaddch(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @tu_move(i32 %7, i32 %8)
%10 = load i32, i32* %6
%11 = call i32 @putchar(i32 %10)
ret void
}

LLVM IR (-O2):
define void @tu_mvaddch(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @tu_move(i32 %0, i32 %1)
%5 = tail call i32 @putchar(i32 %2)
ret void
}
void NOP(void) {}


x86 assembly (clang, -O0):
<NOP>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOP>:
ret

LLVM IR (-O0):
define void @NOP() {
ret void
}

LLVM IR (-O2):
define void @NOP() {
ret void
}
/* Variables and functions */
int fabs(double);
int IsEqualDouble(void *a, void *b) {
  return (fabs(*(double *)a - *(double *)b) < 1e-10);
}


x86 assembly (clang, -O0):
<IsEqualDouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
subsd  (%rax),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %eax,%xmm1
movsd  0xebf(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsEqualDouble>:
push   %rax
movsd  (%rdi),%xmm0
subsd  (%rsi),%xmm0
call   1030 <fabs@plt>
xor    %ecx,%ecx
test   %eax,%eax
setle  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @IsEqualDouble(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to double*
%7 = load double, double* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
%11 = fsub double %7, %10
%12 = call i32 @fabs(double %11)
%13 = sitofp i32 %12 to double
%14 = fcmp olt double %13, 1.000000e-10
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @IsEqualDouble(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fsub double %4, %6
%8 = tail call i32 @fabs(double %7)
%9 = icmp slt i32 %8, 1
%10 = zext i1 %9 to i32
ret i32 %10
}
const char *rcsid(const char *p) {
  return rcsid(p = "@(#)$Id: magic.c 10 2006-07-10 18:22:27Z hyin $");
}


x86 assembly (clang, -O0):
<rcsid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xed2(%rip),%rdi
call   1030 <rcsid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcsid>:
jmp    1100 <rcsid>

LLVM IR (-O0):
@.str = [48 x i8] c"@(#)$Id: magic.c 10 2006-07-10 18:22:27Z hyin $\00"
define i8* @rcsid(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
store i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = call i8* @rcsid(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}

LLVM IR (-O2):
define noalias i8* @rcsid(i8* nocapture readnone %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
double b(double x) { return x + 100; }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @b(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 1.000000e+02
ret double %4
}

LLVM IR (-O2):
define double @b(double %0) {
%2 = fadd double %0, 1.000000e+02
ret double %2
}
void rwsem_down_read_failed(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<rwsem_down_read_failed>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rwsem_down_read_failed>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.rwsem_down_read_failed = [23 x i8] c"rwsem_down_read_failed\00"
define void @rwsem_down_read_failed() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__func__.rwsem_down_read_failed, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.rwsem_down_read_failed = [23 x i8] c"rwsem_down_read_failed\00"
define void @rwsem_down_read_failed() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__func__.rwsem_down_read_failed, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
void strcmp_constant_and_var_0() {
  char *x = "123";
  if (strcmp(x, "123") != 0)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strcmp_constant_and_var_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     113d <strcmp_constant_and_var_0+0x2d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_constant_and_var_0>:
lea    0xee9(%rip),%rdi
mov    %rdi,%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
define void @strcmp_constant_and_var_0() {
%1 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i64 @strcmp(i8* %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i8, i8* null
br label %7
7: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
define void @strcmp_constant_and_var_0() {
%1 = tail call i64 @strcmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int /*<<< orphan*/ CPU_ALLOC_SIZE(size_t);
scalar_t__ malloc(int /*<<< orphan*/);
cpu_set_t *__sched_cpualloc(size_t count) {
  return (cpu_set_t *)malloc(CPU_ALLOC_SIZE(count));
}


x86 assembly (clang, -O0):
<__sched_cpualloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <CPU_ALLOC_SIZE@plt>
mov    %eax,%edi
call   1040 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sched_cpualloc>:
push   %rax
call   1030 <CPU_ALLOC_SIZE@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <malloc@plt>

LLVM IR (-O0):
define i32* @__sched_cpualloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @CPU_ALLOC_SIZE(i64 %3)
%5 = call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i32*
ret i32* %6
}

LLVM IR (-O2):
define i32* @__sched_cpualloc(i64 %0) {
%2 = tail call i32 @CPU_ALLOC_SIZE(i64 %0)
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to i32*
ret i32* %4
}
int foo42(void) {
  int x, __attribute__((unused)) y, z;
  return 0;
}


x86 assembly (clang, -O0):
<foo42>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo42>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo42() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
ret i32 0
}

LLVM IR (-O2):
define i32 @foo42() {
ret i32 0
}
void RTMPSendDisassociationFrame(struct rt_rtmp_adapter *pAd) {}


x86 assembly (clang, -O0):
<RTMPSendDisassociationFrame>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMPSendDisassociationFrame>:
ret

LLVM IR (-O0):
%struct.rt_rtmp_adapter = type opaque
define void @RTMPSendDisassociationFrame(%struct.rt_rtmp_adapter* %0) {
%2 = alloca %struct.rt_rtmp_adapter*
store %struct.rt_rtmp_adapter* %0, %struct.rt_rtmp_adapter** %2
ret void
}

LLVM IR (-O2):
%struct.rt_rtmp_adapter = type opaque
define void @RTMPSendDisassociationFrame(%struct.rt_rtmp_adapter* nocapture %0) {
ret void
}
void TimerSlaveModeConfigure(unsigned long ulBase, unsigned long ulSelect) {

  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) &= ~0x00000007;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= ulSelect;
}


x86 assembly (clang, -O0):
<TimerSlaveModeConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
and    $0xfffffffffffffff8,%rcx
mov    %rcx,0x8(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerSlaveModeConfigure>:
andq   $0xfffffffffffffff8,0x8(%rdi)
or     %rsi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @TimerSlaveModeConfigure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 8
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -8
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 8
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @TimerSlaveModeConfigure(i64 %0, i64 %1) {
%3 = add i64 %0, 8
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -8
store volatile i64 %6, i64* %4
%7 = load volatile i64, i64* %4
%8 = or i64 %7, %1
store volatile i64 %8, i64* %4
ret void
}
int fun487() { return 487; }


x86 assembly (clang, -O0):
<fun487>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun487>:
mov    $0x1e7,%eax
ret

LLVM IR (-O0):
define i32 @fun487() {
ret i32 487
}

LLVM IR (-O2):
define i32 @fun487() {
ret i32 487
}
unsigned int McASPRxStatusGet(unsigned int baseAddr) {
  return ((*((volatile unsigned int *)(baseAddr + (0x80)))));
}


x86 assembly (clang, -O0):
<McASPRxStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%eax
mov    %eax,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPRxStatusGet>:
sub    $0xffffff80,%edi
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @McASPRxStatusGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 128
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @McASPRxStatusGet(i32 %0) {
%2 = add i32 %0, 128
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}