xunge/DecIR huggingface dataset:
void RandomFunc(unsigned long input[1], unsigned long output[1]) {
  unsigned long state[1];
  {
    state[0UL] = (input[0UL] + 51238316UL) + 274866410UL;
    if ((state[0UL] >> 4UL) & 1UL) {
      state[0UL] += state[0UL];
    } else {
      state[0UL] += state[0UL];
    }
    output[0UL] = state[0UL] + 454761159UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0x30dd5ac,%rax
add    $0x106220ea,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x4,%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     114a <RandomFunc+0x4a>
mov    -0x18(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1156 <RandomFunc+0x56>
mov    -0x18(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
add    $0x1b1b1ac7,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    (%rdi),%rax
add    %rax,%rax
add    $0x41fb07f3,%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca [1 x i64]
store i64* %0, i64** %3
store i64* %1, i64** %4
%6 = load i64*, i64** %3
%7 = getelementptr inbounds i64, i64* %6, i64 0
%8 = load i64, i64* %7
%9 = add i64 %8, 51238316
%10 = add i64 %9, 274866410
%11 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
store i64 %10, i64* %11
%12 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%13 = load i64, i64* %12
%14 = lshr i64 %13, 4
%15 = and i64 %14, 1
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %23
17: ; preds = %2
%18 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%19 = load i64, i64* %18
%20 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%21 = load i64, i64* %20
%22 = add i64 %21, %19
store i64 %22, i64* %20
br label %29
23: ; preds = %2
%24 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%25 = load i64, i64* %24
%26 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%27 = load i64, i64* %26
%28 = add i64 %27, %25
store i64 %28, i64* %26
br label %29
29: ; preds = %23, %17
%30 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%31 = load i64, i64* %30
%32 = add i64 %31, 454761159
%33 = load i64*, i64** %4
%34 = getelementptr inbounds i64, i64* %33, i64 0
store i64 %32, i64* %34
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i64* nocapture %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* %0
%4 = shl i64 %3, 1
%5 = add i64 %4, 1106970611
store i64 %5, i64* %1
ret void
}
unsigned fib_naive(unsigned n) {
  if (n < 2) {
    return n;
  } else {
    return (fib_naive(n - 1) + fib_naive(n - 2));
  }
}


x86 assembly (clang, -O0):
<fib_naive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jae    1130 <fib_naive+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib_naive+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib_naive@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib_naive@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib_naive>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jb     1132 <fib_naive+0x22>
xor    %ebp,%ebp
xchg   %ax,%ax
lea    -0x1(%rbx),%edi
call   1030 <fib_naive@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1120 <fib_naive+0x10>
add    %ebx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib_naive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ult i32 %4, 2
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub i32 %9, 1
%11 = call i32 @fib_naive(i32 %10)
%12 = load i32, i32* %3
%13 = sub i32 %12, 2
%14 = call i32 @fib_naive(i32 %13)
%15 = add i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib_naive(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add i32 %4, -1
%7 = tail call i32 @fib_naive(i32 %6)
%8 = add i32 %4, -2
%9 = add i32 %7, %5
%10 = icmp ult i32 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add i32 %13, %12
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, int);
int /*<<< orphan*/ stderr;
void __attribute__((noreturn)) wrong_variable_argc(int argc, int arity) {
  fflush(NULL);
  fprintf(stderr, "Expected at least %d arguments, got %d\n", arity, argc);
  exit(1);
}


x86 assembly (clang, -O0):
<wrong_variable_argc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
lea    0xea3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<wrong_variable_argc>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
call   1040 <fflush@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xeb2(%rip),%rsi
mov    %ebx,%edx
mov    %ebp,%ecx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [40 x i8] c"Expected at least %d arguments, got %d\0A\00"
define void @wrong_variable_argc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @fflush(i32* null)
%6 = load i32, i32* @stderr
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
%10 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [40 x i8] c"Expected at least %d arguments, got %d\0A\00"
define void @wrong_variable_argc(i32 %0, i32 %1) {
%3 = tail call i32 @fflush(i32* null)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
long double remquol(long double, long double, int *);
long double remainderl(long double x, long double y) {
  int q;
  return remquol(x, y, &q);
}


x86 assembly (clang, -O0):
<remainderl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
lea    -0x24(%rbp),%rdi
call   1030 <remquol@plt>
fld    %st(0)
fstp   %st(0)
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remainderl>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fldt   0x40(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
lea    0x24(%rsp),%rdi
call   1030 <remquol@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @remainderl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca i32
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80, x86_fp80* %4
%8 = call x86_fp80 @remquol(x86_fp80 %6, x86_fp80 %7, i32* %5)
ret x86_fp80 %8
}

LLVM IR (-O2):
define x86_fp80 @remainderl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call x86_fp80 @remquol(x86_fp80 %0, x86_fp80 %1, i32* %3)
ret x86_fp80 %5
}
void foo797() {}


x86 assembly (clang, -O0):
<foo797>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo797>:
ret

LLVM IR (-O0):
define void @foo797() {
ret void
}

LLVM IR (-O2):
define void @foo797() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *applet(char *const);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void usage(FILE *f, char *const arg0) {
  fprintf(f,
          "Usage: %s [OPTIONS] REGEX\n"
          "Options:\n"
          " -v or --verbose    Turn on verbose messages.\n"
          " -D or --debug      Turn on debug messages.\n"
          " -V or --version    Display the version.\n"
          " -h or --help       Display this message.\n"
          "",
          applet(arg0));
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <applet@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rdx
lea    0xeb1(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <applet@plt>
lea    0xecd(%rip),%rsi
mov    %rbx,%rdi
mov    %rax,%rdx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@.str = [209 x i8] c"Usage: %s [OPTIONS] REGEX\0AOptions:\0A -v or --verbose Turn on verbose messages.\0A -D or --debug Turn on debug messages.\0A -V or --version Display the version.\0A -h or --help Display this message.\0A\00"
define void @usage(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i8* @applet(i8* %6)
%8 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([209 x i8], [209 x i8]* @.str, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [209 x i8] c"Usage: %s [OPTIONS] REGEX\0AOptions:\0A -v or --verbose Turn on verbose messages.\0A -D or --debug Turn on debug messages.\0A -V or --version Display the version.\0A -h or --help Display this message.\0A\00"
define void @usage(i32* nocapture %0, i8* %1) {
%3 = tail call i8* @applet(i8* %1)
%4 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([209 x i8], [209 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
void FinalizeReports(void) {}


x86 assembly (clang, -O0):
<FinalizeReports>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FinalizeReports>:
ret

LLVM IR (-O0):
define void @FinalizeReports() {
ret void
}

LLVM IR (-O2):
define void @FinalizeReports() {
ret void
}
void test___atomic_xor_fetch_1(short *mem) { __atomic_xor_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test___atomic_xor_fetch_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test___atomic_xor_fetch_1+0x5d>
jmp    1125 <test___atomic_xor_fetch_1+0x25>
mov    -0x10(%rbp),%cx
mov    -0x1a(%rbp),%ax
xor    %cx,%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_xor_fetch_1>:
lock xorw $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_xor_fetch_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw xor i16* %5, i16 %6 acq_rel
%8 = xor i16 %7, %6
store i16 %8, i16* %4
%9 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_xor_fetch_1(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TWIE_Start();
int /*<<< orphan*/ TWIE_Stop();
int /*<<< orphan*/ TWIE_Write(char);
void Expander_Write_Byte(char ModuleAddress, char RegAddress, char Data_) {
  TWIE_Start();
  TWIE_Write(ModuleAddress << 1);
  TWIE_Write(RegAddress);
  TWIE_Write(Data_);
  TWIE_Stop();
}


x86 assembly (clang, -O0):
<Expander_Write_Byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    $0x0,%al
call   1050 <TWIE_Start@plt>
movsbl -0x1(%rbp),%eax
shl    $0x1,%eax
movsbl %al,%edi
call   1030 <TWIE_Write@plt>
movsbl -0x2(%rbp),%edi
call   1030 <TWIE_Write@plt>
movsbl -0x3(%rbp),%edi
call   1030 <TWIE_Write@plt>
mov    $0x0,%al
call   1040 <TWIE_Stop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Expander_Write_Byte>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <TWIE_Start@plt>
add    %bl,%bl
movsbl %bl,%edi
call   1030 <TWIE_Write@plt>
mov    %ebp,%edi
call   1030 <TWIE_Write@plt>
mov    %r14d,%edi
call   1030 <TWIE_Write@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <TWIE_Stop@plt>

LLVM IR (-O0):
define void @Expander_Write_Byte(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = call i32 (...) @TWIE_Start()
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = shl i32 %9, 1
%11 = trunc i32 %10 to i8
%12 = call i32 @TWIE_Write(i8 signext %11)
%13 = load i8, i8* %5
%14 = call i32 @TWIE_Write(i8 signext %13)
%15 = load i8, i8* %6
%16 = call i32 @TWIE_Write(i8 signext %15)
%17 = call i32 (...) @TWIE_Stop()
ret void
}

LLVM IR (-O2):
define void @Expander_Write_Byte(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = tail call i32 (...) @TWIE_Start()
%5 = shl i8 %0, 1
%6 = tail call i32 @TWIE_Write(i8 signext %5)
%7 = tail call i32 @TWIE_Write(i8 signext %1)
%8 = tail call i32 @TWIE_Write(i8 signext %2)
%9 = tail call i32 (...) @TWIE_Stop()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mmask_t;

/* Variables and functions */
int help_run(int key, mmask_t btn, int row, int col) { return 0; }


x86 assembly (clang, -O0):
<help_run>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_run>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @help_run(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @help_run(i32 %0, i32 %1, i32 %2, i32 %3) {
ret i32 0
}
/* Variables and functions */
double cgiDouble(char *);
int /*<<< orphan*/ cgiVarExists(char *);
double cgiOptionalDouble(char *varName, double defaultVal) {
  if (!cgiVarExists(varName))
    return defaultVal;
  return cgiDouble(varName);
}


x86 assembly (clang, -O0):
<cgiOptionalDouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <cgiVarExists@plt>
cmp    $0x0,%eax
jne    1152 <cgiOptionalDouble+0x32>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1160 <cgiOptionalDouble+0x40>
mov    -0x10(%rbp),%rdi
call   1040 <cgiDouble@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgiOptionalDouble>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
mov    %rdi,%rbx
call   1030 <cgiVarExists@plt>
test   %eax,%eax
je     1144 <cgiOptionalDouble+0x24>
mov    %rbx,%rdi
add    $0x10,%rsp
pop    %rbx
jmp    1040 <cgiDouble@plt>
movsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @cgiOptionalDouble(i8* %0, double %1) {
%3 = alloca double
%4 = alloca i8*
%5 = alloca double
store i8* %0, i8** %4
store double %1, double* %5
%6 = load i8*, i8** %4
%7 = call i32 @cgiVarExists(i8* %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %2
%10 = load double, double* %5
store double %10, double* %3
br label %14
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = call double @cgiDouble(i8* %12)
store double %13, double* %3
br label %14
14: ; preds = %11, %9
%15 = load double, double* %3
ret double %15
}

LLVM IR (-O2):
define double @cgiOptionalDouble(i8* %0, double %1) {
%3 = tail call i32 @cgiVarExists(i8* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call double @cgiDouble(i8* %0)
br label %7
7: ; preds = %2, %5
%8 = phi double [ %6, %5 ], [ %1, %2 ]
ret double %8
}
/* Variables and functions */
double drand();
void rand_matrix_double(double *A, int M, int N) {
  int i;
  for (i = 0; i < N * M; i++) {
    A[i] = drand();
  }
}


x86 assembly (clang, -O0):
<rand_matrix_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
jge    115d <rand_matrix_double+0x4d>
mov    $0x0,%al
call   1030 <drand@plt>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1129 <rand_matrix_double+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_matrix_double>:
push   %r15
push   %r14
push   %rbx
imul   %edx,%esi
test   %esi,%esi
jle    1146 <rand_matrix_double+0x36>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <drand@plt>
movsd  %xmm0,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <rand_matrix_double+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @rand_matrix_double(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = load i32, i32* %5
%12 = mul nsw i32 %10, %11
%13 = icmp slt i32 %9, %12
br i1 %13, label %14, label %23
14: ; preds = %8
%15 = call double (...) @drand()
%16 = load double*, double** %4
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds double, double* %16, i64 %18
store double %15, double* %19
br label %20
20: ; preds = %14
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @rand_matrix_double(double* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = mul i32 %2, %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = zext i32 %4 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %12, %8 ]
%10 = tail call double (...) @drand()
%11 = getelementptr inbounds double, double* %0, i64 %9
store double %10, double* %11
%12 = add nuw nsw i64 %9, 1
%13 = icmp eq i64 %12, %7
br i1 %13, label %14, label %8
14: ; preds = %8, %3
ret void
}
/* Type definitions */
struct s_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ setFullStatus(struct s_info *, int);
void setSlotFull(struct s_info *s) { setFullStatus(s, 1); }


x86 assembly (clang, -O0):
<setSlotFull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <setFullStatus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setSlotFull>:
mov    $0x1,%esi
jmp    1030 <setFullStatus@plt>

LLVM IR (-O0):
%struct.s_info = type { i32 }
define void @setSlotFull(%struct.s_info* %0) {
%2 = alloca %struct.s_info*
store %struct.s_info* %0, %struct.s_info** %2
%3 = load %struct.s_info*, %struct.s_info** %2
%4 = call i32 @setFullStatus(%struct.s_info* %3, i32 1)
ret void
}

LLVM IR (-O2):
%struct.s_info = type { i32 }
define void @setSlotFull(%struct.s_info* %0) {
%2 = tail call i32 @setFullStatus(%struct.s_info* %0, i32 1)
ret void
}
int _TOML_isLeapYear(int year) {
  if (year % 400 == 0) {
    return 1;
  } else if (year % 100 == 0) {
    return 0;
  } else if (year % 4 == 0) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<_TOML_isLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <_TOML_isLeapYear+0x27>
movl   $0x1,-0x4(%rbp)
jmp    116e <_TOML_isLeapYear+0x6e>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1147 <_TOML_isLeapYear+0x47>
movl   $0x0,-0x4(%rbp)
jmp    116e <_TOML_isLeapYear+0x6e>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1167 <_TOML_isLeapYear+0x67>
movl   $0x1,-0x4(%rbp)
jmp    116e <_TOML_isLeapYear+0x6e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_TOML_isLeapYear>:
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
mov    %eax,%ecx
ror    $0x4,%ecx
cmp    $0xa3d70b,%ecx
jb     112c <_TOML_isLeapYear+0x2c>
ror    $0x2,%eax
cmp    $0x28f5c29,%eax
jb     1132 <_TOML_isLeapYear+0x32>
xor    %eax,%eax
test   $0x3,%dil
sete   %al
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_TOML_isLeapYear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 400
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %19
8: ; preds = %1
%9 = load i32, i32* %3
%10 = srem i32 %9, 100
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %2
br label %19
13: ; preds = %8
%14 = load i32, i32* %3
%15 = srem i32 %14, 4
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %2
br label %19
18: ; preds = %13
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17, %12, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @_TOML_isLeapYear(i32 %0) {
%2 = srem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = and i32 %0, 3
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %1 ], [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_wait_until(long *ivar, int cmp, long cmp_value) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_wait_until>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_wait_until>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_wait_until(i64* %0, i32 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i64
store i64* %0, i64** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_wait_until(i64* nocapture readnone %0, i32 %1, i64 %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
int test2(int c, int d) { return (c & d) | c; }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
or     -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @test2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %5, %6
%8 = load i32, i32* %3
%9 = or i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @test2(i32 returned %0, i32 %1) {
ret i32 %0
}
int vlan_set() {}


x86 assembly (clang, -O0):
<vlan_set>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlan_set>:
ret

LLVM IR (-O0):
define i32 @vlan_set() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @vlan_set() {
ret i32 undef
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/);
int exemplo3() {
  srand(time(0));
  return rand();
}


x86 assembly (clang, -O0):
<exemplo3>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exemplo3>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <rand@plt>

LLVM IR (-O0):
define i32 @exemplo3() {
%1 = call i32 @time(i32 0)
%2 = call i32 @srand(i32 %1)
%3 = call i32 (...) @rand()
ret i32 %3
}

LLVM IR (-O2):
define i32 @exemplo3() {
%1 = tail call i32 @time(i32 0)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @rand()
ret i32 %3
}
int GetNextCoordinate(const int x, const int dx, const int max) {
  return (x + dx + max) % max;
}


x86 assembly (clang, -O0):
<GetNextCoordinate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetNextCoordinate>:
mov    %edx,%ecx
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
cltd
idiv   %ecx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @GetNextCoordinate(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
%12 = load i32, i32* %6
%13 = srem i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @GetNextCoordinate(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
%6 = srem i32 %5, %2
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printIds(char *);
void *threadFunc(void *arg) {
  printIds("new thread: ");
  return ((void *)0);
}


x86 assembly (clang, -O0):
<threadFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printIds@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadFunc>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printIds@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"new thread: \00"
define i8* @threadFunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printIds(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@.str = [13 x i8] c"new thread: \00"
define noalias i8* @threadFunc(i8* nocapture readnone %0) {
%2 = tail call i32 @printIds(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
void authcustomclose() {}


x86 assembly (clang, -O0):
<authcustomclose>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<authcustomclose>:
ret

LLVM IR (-O0):
define void @authcustomclose() {
ret void
}

LLVM IR (-O2):
define void @authcustomclose() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ literal_string_parameter(char *);
void call_literal_string_parameter1_Good() {
  char *s = "hello";
  literal_string_parameter(s);
}


x86 assembly (clang, -O0):
<call_literal_string_parameter1_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <literal_string_parameter@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_literal_string_parameter1_Good>:
lea    0xee9(%rip),%rdi
jmp    1030 <literal_string_parameter@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
define void @call_literal_string_parameter1_Good() {
%1 = alloca i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @literal_string_parameter(i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define void @call_literal_string_parameter1_Good() {
%1 = tail call i32 @literal_string_parameter(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct drc_kernel {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dk_compress_output(struct drc_kernel *);
int /*<<< orphan*/ dk_update_detector_average(struct drc_kernel *);
int /*<<< orphan*/ dk_update_envelope(struct drc_kernel *);
void dk_process_one_division(struct drc_kernel *dk) {
  dk_update_detector_average(dk);
  dk_update_envelope(dk);
  dk_compress_output(dk);
}


x86 assembly (clang, -O0):
<dk_process_one_division>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dk_update_detector_average@plt>
mov    -0x8(%rbp),%rdi
call   1040 <dk_update_envelope@plt>
mov    -0x8(%rbp),%rdi
call   1050 <dk_compress_output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dk_process_one_division>:
push   %rbx
mov    %rdi,%rbx
call   1030 <dk_update_detector_average@plt>
mov    %rbx,%rdi
call   1040 <dk_update_envelope@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <dk_compress_output@plt>

LLVM IR (-O0):
%struct.drc_kernel = type { i32 }
define void @dk_process_one_division(%struct.drc_kernel* %0) {
%2 = alloca %struct.drc_kernel*
store %struct.drc_kernel* %0, %struct.drc_kernel** %2
%3 = load %struct.drc_kernel*, %struct.drc_kernel** %2
%4 = call i32 @dk_update_detector_average(%struct.drc_kernel* %3)
%5 = load %struct.drc_kernel*, %struct.drc_kernel** %2
%6 = call i32 @dk_update_envelope(%struct.drc_kernel* %5)
%7 = load %struct.drc_kernel*, %struct.drc_kernel** %2
%8 = call i32 @dk_compress_output(%struct.drc_kernel* %7)
ret void
}

LLVM IR (-O2):
%struct.drc_kernel = type { i32 }
define void @dk_process_one_division(%struct.drc_kernel* %0) {
%2 = tail call i32 @dk_update_detector_average(%struct.drc_kernel* %0)
%3 = tail call i32 @dk_update_envelope(%struct.drc_kernel* %0)
%4 = tail call i32 @dk_compress_output(%struct.drc_kernel* %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void AUXTDCIdleForce(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000000))) = 0x00000003;
}


x86 assembly (clang, -O0):
<AUXTDCIdleForce>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x3,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AUXTDCIdleForce>:
movq   $0x3,(%rdi)
ret

LLVM IR (-O0):
define void @AUXTDCIdleForce(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 0
%5 = inttoptr i64 %4 to i64*
store volatile i64 3, i64* %5
ret void
}

LLVM IR (-O2):
define void @AUXTDCIdleForce(i64 %0) {
%2 = inttoptr i64 %0 to i64*
store volatile i64 3, i64* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main() {
  int i, j;
  if (i == 0) {
    if (j == 0) {
      printf("exit\n");
      exit(0);
    }
    for (i = 0; i < 10; i++) {
      printf("loop\n");
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1186 <main+0x66>
cmpl   $0x0,-0xc(%rbp)
jne    1156 <main+0x36>
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1181 <main+0x61>
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    115d <main+0x3d>
jmp    1186 <main+0x66>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"exit\0A\00"
@.str.1 = [6 x i8] c"loop\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %22
6: ; preds = %0
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 0)
unreachable
12: ; preds = %6
store i32 0, i32* %2
br label %13
13: ; preds = %18, %12
%14 = load i32, i32* %2
%15 = icmp slt i32 %14, 10
br i1 %15, label %16, label %21
16: ; preds = %13
%17 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
br label %18
18: ; preds = %16
%19 = load i32, i32* %2
%20 = add nsw i32 %19, 1
store i32 %20, i32* %2
br label %13
21: ; preds = %13
br label %22
22: ; preds = %21, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ptrdiff_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ inv_adst8_1d_internal_c(int /*<<< orphan*/ *const,
                                           int /*<<< orphan*/ const, int const,
                                           int const, int /*<<< orphan*/ *const,
                                           int /*<<< orphan*/ const);
void dav1d_inv_adst8_1d_c(int32_t *const c, const ptrdiff_t stride,
                          const int min, const int max) {
  inv_adst8_1d_internal_c(c, stride, min, max, c, stride);
}


x86 assembly (clang, -O0):
<dav1d_inv_adst8_1d_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%r8
mov    -0xc(%rbp),%r9d
call   1030 <inv_adst8_1d_internal_c@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dav1d_inv_adst8_1d_c>:
mov    %rdi,%r8
mov    %esi,%r9d
jmp    1030 <inv_adst8_1d_internal_c@plt>

LLVM IR (-O0):
define void @dav1d_inv_adst8_1d_c(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = load i32*, i32** %5
%14 = load i32, i32* %6
%15 = call i32 @inv_adst8_1d_internal_c(i32* %9, i32 %10, i32 %11, i32 %12, i32* %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @dav1d_inv_adst8_1d_c(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @inv_adst8_1d_internal_c(i32* %0, i32 %1, i32 %2, i32 %3, i32* %0, i32 %1)
ret void
}
int test_imm_F1uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xF1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F1uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F1uint64_highword_mem>:
testb  $0xf1,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F1uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 241
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F1uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1035087118336
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void RTAvlGCPhysGet(void) {}


x86 assembly (clang, -O0):
<RTAvlGCPhysGet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlGCPhysGet>:
ret

LLVM IR (-O0):
define void @RTAvlGCPhysGet() {
ret void
}

LLVM IR (-O2):
define void @RTAvlGCPhysGet() {
ret void
}
long long int longlongint_ignoring_signedshort(long long int x,
                                               signed short y) {
  return x;
}


x86 assembly (clang, -O0):
<longlongint_ignoring_signedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longlongint_ignoring_signedshort>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longlongint_ignoring_signedshort(i64 %0, i16 signext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longlongint_ignoring_signedshort(i64 returned %0, i16 signext %1) {
ret i64 %0
}
int isSpecialCharacter(char c) {
  return (c == '_' || c == ',' || c == '.' || c == '!' || c == '?');
}


x86 assembly (clang, -O0):
<isSpecialCharacter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5f,%ecx
mov    %al,-0x2(%rbp)
je     115f <isSpecialCharacter+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2c,%ecx
mov    %al,-0x2(%rbp)
je     115f <isSpecialCharacter+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2e,%ecx
mov    %al,-0x2(%rbp)
je     115f <isSpecialCharacter+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x21,%ecx
mov    %al,-0x2(%rbp)
je     115f <isSpecialCharacter+0x5f>
movsbl -0x1(%rbp),%eax
cmp    $0x3f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSpecialCharacter>:
lea    -0x21(%rdi),%ecx
cmp    $0x3e,%cl
ja     1121 <isSpecialCharacter+0x21>
mov    $0x1,%eax
movzbl %cl,%ecx
movabs $0x4000000000002801,%rdx
bt     %rcx,%rdx
jae    1121 <isSpecialCharacter+0x21>
ret
xor    %eax,%eax
cmp    $0x3f,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isSpecialCharacter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 95
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 44
br i1 %9, label %22, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 46
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 33
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 63
br label %22
22: ; preds = %18, %14, %10, %6, %1
%23 = phi i1 [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %21, %18 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @isSpecialCharacter(i8 signext %0) {
switch i8 %0, label %2 [
i8 95, label %5
i8 46, label %5
i8 44, label %5
i8 33, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 63
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
int /*<<< orphan*/ rotr(int *, int *, int *, int);
int /*<<< orphan*/ scanf(char *, int *, int *, int *, int *);
int main() {
  int a, b, c;
  int n;
  scanf("%d %d %d %d", &a, &b, &c, &n);
  rotr(&a, &b, &c, n);
  printf("%d %d %d\n", a, b, c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1040 <scanf@plt>
mov    -0x14(%rbp),%ecx
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1050 <rotr@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xe8d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xec0(%rip),%rdi
lea    0xc(%rsp),%rbx
lea    0x8(%rsp),%r14
lea    0x4(%rsp),%r15
mov    %rsp,%r8
mov    %rbx,%rsi
mov    %r14,%rdx
mov    %r15,%rcx
call   1040 <scanf@plt>
mov    (%rsp),%ecx
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1050 <rotr@plt>
mov    0xc(%rsp),%esi
mov    0x8(%rsp),%edx
mov    0x4(%rsp),%ecx
lea    0xe88(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%d %d %d %d\00"
@.str.1 = [10 x i8] c"%d %d %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3, i32* %4, i32* %5)
%7 = load i32, i32* %5
%8 = call i32 @rotr(i32* %2, i32* %3, i32* %4, i32 %7)
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %9, i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d %d %d %d\00"
@.str.1 = [10 x i8] c"%d %d %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %4
%11 = call i32 @rotr(i32* %1, i32* %2, i32* %3, i32 %10)
%12 = load i32, i32* %1
%13 = load i32, i32* %2
%14 = load i32, i32* %3
%15 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %12, i32 %13, i32 %14)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sln_ipc_mq_loop();
int main(int argc, char **argv) {
  sln_ipc_mq_loop();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <sln_ipc_mq_loop@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <sln_ipc_mq_loop@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @sln_ipc_mq_loop()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @sln_ipc_mq_loop()
ret i32 0
}
void foo_1_2_2_1_2_2_1_2_1() {}


x86 assembly (clang, -O0):
<foo_1_2_2_1_2_2_1_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_2_2_1_2_2_1_2_1>:
ret

LLVM IR (-O0):
define void @foo_1_2_2_1_2_2_1_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_1_2_2_1_2_2_1_2_1() {
ret void
}
void gdk_event_handler_set() {}


x86 assembly (clang, -O0):
<gdk_event_handler_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_event_handler_set>:
ret

LLVM IR (-O0):
define void @gdk_event_handler_set() {
ret void
}

LLVM IR (-O2):
define void @gdk_event_handler_set() {
ret void
}
void g31() {
#pragma pack(4)
  static struct {
    short a;
    long x;
    short z;
  } a = {23122, -12312731, -312};
#pragma pack()
}


x86 assembly (clang, -O0):
<g31>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g31>:
ret

LLVM IR (-O0):
%struct.anon = type <{ i16, [2 x i8], i64, i16, [2 x i8] }>
@g31.a = internal global %struct.anon <{ i16 23122, [2 x i8] undef, i64 -12312731, i16 -312, [2 x i8] undef }>
define void @g31() {
ret void
}

LLVM IR (-O2):
define void @g31() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AttitudeSettingsHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void AttitudeSettingsUpdated() { UAVObjUpdated(AttitudeSettingsHandle()); }


x86 assembly (clang, -O0):
<AttitudeSettingsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AttitudeSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AttitudeSettingsUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <AttitudeSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @AttitudeSettingsUpdated() {
%1 = call i32 (...) @AttitudeSettingsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AttitudeSettingsUpdated() {
%1 = tail call i32 (...) @AttitudeSettingsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
char *sysfsparser_cpufreq_get_available_governors(unsigned int);
char *cpufreq_get_available_governors(unsigned int cpu) {
  return sysfsparser_cpufreq_get_available_governors(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_available_governors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfsparser_cpufreq_get_available_governors@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_available_governors>:
jmp    1030 <sysfsparser_cpufreq_get_available_governors@plt>

LLVM IR (-O0):
define i8* @cpufreq_get_available_governors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @sysfsparser_cpufreq_get_available_governors(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @cpufreq_get_available_governors(i32 %0) {
%2 = tail call i8* @sysfsparser_cpufreq_get_available_governors(i32 %0)
ret i8* %2
}
unsigned short a_us(unsigned short a, unsigned char *b, int *c) {
  unsigned short d = a + *b;
  *c = d == 0;
  return d;
}


x86 assembly (clang, -O0):
<a_us>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
add    %ecx,%eax
mov    %ax,-0x1a(%rbp)
movzwl -0x1a(%rbp),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movzwl -0x1a(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_us>:
movzbl (%rsi),%eax
xor    %ecx,%ecx
add    %di,%ax
sete   %cl
mov    %ecx,(%rdx)
ret

LLVM IR (-O0):
define zeroext i16 @a_us(i16 zeroext %0, i8* %1, i32* %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i16
store i16 %0, i16* %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%8 = load i16, i16* %4
%9 = zext i16 %8 to i32
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = add nsw i32 %9, %12
%14 = trunc i32 %13 to i16
store i16 %14, i16* %7
%15 = load i16, i16* %7
%16 = zext i16 %15 to i32
%17 = icmp eq i32 %16, 0
%18 = zext i1 %17 to i32
%19 = load i32*, i32** %6
store i32 %18, i32* %19
%20 = load i16, i16* %7
ret i16 %20
}

LLVM IR (-O2):
define zeroext i16 @a_us(i16 zeroext %0, i8* nocapture %1, i32* nocapture writeonly %2) {
%4 = load i8, i8* %1
%5 = zext i8 %4 to i16
%6 = add i16 %5, %0
%7 = icmp eq i16 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %2
ret i16 %6
}
/* Variables and functions */
int /*<<< orphan*/ welcome();
int main(int argc, char **argv) {
  welcome();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <welcome@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <welcome@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @welcome()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @welcome()
ret i32 0
}