xunge/DecIR huggingface dataset:
void Ptngc_widemul(unsigned int i1, unsigned int i2, unsigned int *ohi,
                   unsigned int *olo) {
  __asm__ __volatile__("mull %%edx\n\t"
                       : "=a"(i1), "=d"(i2)
                       : "a"(i1), "d"(i2)
                       : "cc");
  *ohi = i2;
  *olo = i1;
}


x86 assembly (clang, -O0):
<Ptngc_widemul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
mul    %edx
mov    %eax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ptngc_widemul>:
mov    %rdx,%r8
mov    %esi,%edx
mov    %edi,%eax
mul    %edx
mov    %edx,(%r8)
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
define void @Ptngc_widemul(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call { i32, i32 } asm sideeffect "mull %edx\0A\09", "={ax},={dx},{ax},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %9, i32 %10)
%12 = extractvalue { i32, i32 } %11, 0
%13 = extractvalue { i32, i32 } %11, 1
store i32 %12, i32* %5
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32*, i32** %7
store i32 %14, i32* %15
%16 = load i32, i32* %5
%17 = load i32*, i32** %8
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @Ptngc_widemul(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = tail call { i32, i32 } asm sideeffect "mull %edx\0A\09", "={ax},={dx},{ax},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1)
%6 = extractvalue { i32, i32 } %5, 0
%7 = extractvalue { i32, i32 } %5, 1
store i32 %7, i32* %2
store i32 %6, i32* %3
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ subwindow;
};
typedef TYPE_1__ XMotionEvent;

/* Variables and functions */
unsigned long get_XMotionEvent_subwindow(void *_p) {
  return (unsigned long)((XMotionEvent *)_p)->subwindow;
}


x86 assembly (clang, -O0):
<get_XMotionEvent_subwindow>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XMotionEvent_subwindow>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XMotionEvent_subwindow(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XMotionEvent_subwindow(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int socket(int, int, int);
int make_socket(int family, int socktype, int protocol) {
  while (1) {
    int sock = socket(family, socktype, protocol);
    if (sock >= 0)
      return sock;
    if (errno != EINTR)
      return -1;
  }
}


x86 assembly (clang, -O0):
<make_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <socket@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1147 <make_socket+0x37>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1172 <make_socket+0x62>
mov    0x2e92(%rip),%rax
mov    (%rax),%rax
mov    0x2e80(%rip),%rcx
cmp    (%rcx),%rax
je     116d <make_socket+0x5d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1172 <make_socket+0x62>
jmp    1121 <make_socket+0x11>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_socket>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    0x2eba(%rip),%r15
mov    0x2eab(%rip),%r12
nopl   (%rax)
mov    %ebx,%edi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <socket@plt>
test   %eax,%eax
jns    114e <make_socket+0x3e>
mov    (%r15),%rax
cmp    (%r12),%rax
je     1130 <make_socket+0x20>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @make_socket(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
br label %9
9: ; preds = %3, %23
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = call i32 @socket(i32 %10, i32 %11, i32 %12)
store i32 %13, i32* %8
%14 = load i32, i32* %8
%15 = icmp sge i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %9
%17 = load i32, i32* %8
store i32 %17, i32* %4
br label %24
18: ; preds = %9
%19 = load i64, i64* @errno
%20 = load i64, i64* @EINTR
%21 = icmp ne i64 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 -1, i32* %4
br label %24
23: ; preds = %18
br label %9
24: ; preds = %22, %16
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @make_socket(i32 %0, i32 %1, i32 %2) {
br label %4
4: ; preds = %7, %3
%5 = tail call i32 @socket(i32 %0, i32 %1, i32 %2)
%6 = icmp sgt i32 %5, -1
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = load i64, i64* @errno
%9 = load i64, i64* @EINTR
%10 = icmp eq i64 %8, %9
br i1 %10, label %4, label %11
11: ; preds = %4, %7
%12 = phi i32 [ -1, %7 ], [ %5, %4 ]
ret i32 %12
}
/* Variables and functions */
int gettm(int);
int test_autorep_tm(short *tm) {
  int t = *tm;
  t = gettm(t) - t;
  if (t >= 266) {
    *tm = gettm(0) - t + 100 + 10000;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<test_autorep_tm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movswl (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <gettm@plt>
sub    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x10a,-0x14(%rbp)
jl     1169 <test_autorep_tm+0x59>
xor    %edi,%edi
call   1030 <gettm@plt>
sub    -0x14(%rbp),%eax
add    $0x64,%eax
add    $0x2710,%eax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1170 <test_autorep_tm+0x60>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_autorep_tm>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
movswl (%rdi),%ebx
mov    %ebx,%edi
call   1030 <gettm@plt>
mov    %eax,%ebp
sub    %ebx,%ebp
xor    %eax,%eax
cmp    $0x10a,%ebp
jl     1146 <test_autorep_tm+0x36>
xor    %edi,%edi
call   1030 <gettm@plt>
sub    %ebp,%eax
add    $0x2774,%eax
mov    %ax,(%r14)
mov    $0x1,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @test_autorep_tm(i16* %0) {
%2 = alloca i32
%3 = alloca i16*
%4 = alloca i32
store i16* %0, i16** %3
%5 = load i16*, i16** %3
%6 = load i16, i16* %5
%7 = sext i16 %6 to i32
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @gettm(i32 %8)
%10 = load i32, i32* %4
%11 = sub nsw i32 %9, %10
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = icmp sge i32 %12, 266
br i1 %13, label %14, label %22
14: ; preds = %1
%15 = call i32 @gettm(i32 0)
%16 = load i32, i32* %4
%17 = sub nsw i32 %15, %16
%18 = add nsw i32 %17, 100
%19 = add nsw i32 %18, 10000
%20 = trunc i32 %19 to i16
%21 = load i16*, i16** %3
store i16 %20, i16* %21
store i32 1, i32* %2
br label %23
22: ; preds = %1
store i32 0, i32* %2
br label %23
23: ; preds = %22, %14
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @test_autorep_tm(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = sext i16 %2 to i32
%4 = tail call i32 @gettm(i32 %3)
%5 = sub nsw i32 %4, %3
%6 = icmp sgt i32 %5, 265
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = tail call i32 @gettm(i32 0)
%9 = sub nsw i32 %8, %5
%10 = trunc i32 %9 to i16
%11 = add i16 %10, 10100
store i16 %11, i16* %0
br label %12
12: ; preds = %1, %7
%13 = phi i32 [ 1, %7 ], [ 0, %1 ]
ret i32 %13
}
/* Variables and functions */
unsigned char quick_select(unsigned char *, int, int);
unsigned char quick_select_median(unsigned char *arr, int nelems) {
  return quick_select(arr, nelems, (nelems - 1) / 2);
}


x86 assembly (clang, -O0):
<quick_select_median>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edx
call   1030 <quick_select@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_select_median>:
lea    -0x1(%rsi),%eax
shr    $0x1f,%eax
lea    (%rsi,%rax,1),%edx
add    $0xffffffff,%edx
sar    %edx
jmp    1030 <quick_select@plt>

LLVM IR (-O0):
define zeroext i8 @quick_select_median(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = sdiv i32 %8, 2
%10 = call zeroext i8 @quick_select(i8* %5, i32 %6, i32 %9)
ret i8 %10
}

LLVM IR (-O2):
define zeroext i8 @quick_select_median(i8* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = sdiv i32 %3, 2
%5 = tail call zeroext i8 @quick_select(i8* %0, i32 %1, i32 %4)
ret i8 %5
}
/* Variables and functions */
int Bar6(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int res;
  res = Bar6(6, 8);
  printf("main: res = %d\n", res);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x6,%edi
mov    $0x8,%esi
call   1040 <Bar6@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x6,%edi
mov    $0x8,%esi
call   1040 <Bar6@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"main: res = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @Bar6(i32 6, i32 8)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"main: res = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @Bar6(i32 6, i32 8)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
scalar_t__ calloc(int /*<<< orphan*/, int);
int /*<<< orphan*/ free(int *);
int /*<<< orphan*/ hypercubeDFS(int *, int /*<<< orphan*/, int);
int /*<<< orphan*/ powerOf2(int);
void generateGrayCode(int width) {
  int *visited = (int *)calloc(powerOf2(width), sizeof(int));
  hypercubeDFS(visited, 0, width);
  free(visited);
}


x86 assembly (clang, -O0):
<generateGrayCode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1060 <powerOf2@plt>
mov    %eax,%edi
mov    $0x4,%esi
call   1050 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
xor    %esi,%esi
call   1040 <hypercubeDFS@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateGrayCode>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1060 <powerOf2@plt>
mov    %eax,%edi
mov    $0x4,%esi
call   1050 <calloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1040 <hypercubeDFS@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @generateGrayCode(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @powerOf2(i32 %4)
%6 = call i64 @calloc(i32 %5, i32 4)
%7 = inttoptr i64 %6 to i32*
store i32* %7, i32** %3
%8 = load i32*, i32** %3
%9 = load i32, i32* %2
%10 = call i32 @hypercubeDFS(i32* %8, i32 0, i32 %9)
%11 = load i32*, i32** %3
%12 = call i32 @free(i32* %11)
ret void
}

LLVM IR (-O2):
define void @generateGrayCode(i32 %0) {
%2 = tail call i32 @powerOf2(i32 %0)
%3 = tail call i64 @calloc(i32 %2, i32 4)
%4 = inttoptr i64 %3 to i32*
%5 = tail call i32 @hypercubeDFS(i32* %4, i32 0, i32 %0)
%6 = tail call i32 @free(i32* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main() {
  printf("%s\n", "hello world");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int foo();
int bar() { return foo() * foo(); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <foo@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
imul   %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbx
xor    %eax,%eax
call   1030 <foo@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <foo@plt>
imul   %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = call i32 (...) @foo()
%2 = call i32 (...) @foo()
%3 = mul nsw i32 %1, %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @bar() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo()
%3 = mul nsw i32 %2, %1
ret i32 %3
}
unsigned char f71(unsigned char x, unsigned int y) {
  return (x << y) + (x >> (8 - y));
}


x86 assembly (clang, -O0):
<f71>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    $0x8,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f71>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
mov    $0x8,%dl
sub    %cl,%dl
mov    %edx,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f71(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 %6, %7
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = load i32, i32* %4
%12 = sub i32 8, %11
%13 = ashr i32 %10, %12
%14 = add nsw i32 %8, %13
%15 = trunc i32 %14 to i8
ret i8 %15
}

LLVM IR (-O2):
define zeroext i8 @f71(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = shl i32 %3, %1
%5 = sub i32 8, %1
%6 = lshr i32 %3, %5
%7 = add nsw i32 %6, %4
%8 = trunc i32 %7 to i8
ret i8 %8
}
void toLower(cPStr) char *cPStr;
{
  while (*cPStr) {
    if (*cPStr >= 'A' && *cPStr <= 'Z') {
      *cPStr = *cPStr + 32;
    }
    cPStr++;
  }
}


x86 assembly (clang, -O0):
<toLower>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1158 <toLower+0x58>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     1147 <toLower+0x47>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     1147 <toLower+0x47>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    $0x20,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <toLower+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<toLower>:
mov    (%rdi),%al
test   %al,%al
je     112a <toLower+0x2a>
add    $0x1,%rdi
jmp    111b <toLower+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <toLower+0x2a>
lea    -0x41(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <toLower+0x10>
add    $0x20,%al
mov    %al,-0x1(%rdi)
jmp    1110 <toLower+0x10>
ret

LLVM IR (-O0):
define void @toLower(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %24, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %27
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %24
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp sle i32 %15, 90
br i1 %16, label %17, label %24
17: ; preds = %12
%18 = load i8*, i8** %2
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = add nsw i32 %20, 32
%22 = trunc i32 %21 to i8
%23 = load i8*, i8** %2
store i8 %22, i8* %23
br label %24
24: ; preds = %17, %12, %7
%25 = load i8*, i8** %2
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %2
br label %3
27: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @toLower(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -65
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nuw nsw i8 %5, 32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void emit(char *s) { printf("\t%s", s); }


x86 assembly (clang, -O0):
<emit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\09%s\00"
define void @emit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\09%s\00"
define void @emit(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int SIGWINCH;
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ update_winsize();
void handle_sigwinch(int signum) {
  assert(signum == SIGWINCH);
  update_winsize();
}


x86 assembly (clang, -O0):
<handle_sigwinch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x0,%al
call   1040 <update_winsize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_sigwinch>:
push   %rax
mov    0x2ec0(%rip),%rcx
xor    %eax,%eax
cmp    %edi,(%rcx)
sete   %al
mov    %eax,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <update_winsize@plt>

LLVM IR (-O0):
@SIGWINCH = global i32 0
define void @handle_sigwinch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGWINCH
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = call i32 (...) @update_winsize()
ret void
}

LLVM IR (-O2):
@SIGWINCH = global i32 0
define void @handle_sigwinch(i32 %0) {
%2 = load i32, i32* @SIGWINCH
%3 = icmp eq i32 %2, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 (...) @update_winsize()
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int padcon_standard_initialize_homotopy(int verbose, int homo) {
  int fail;
  int precision = 0;
  int pars[2];
  double *c;
  pars[0] = verbose;
  pars[1] = homo;
  fail = _ada_use_c2phc4c(860, &precision, pars, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<padcon_standard_initialize_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
lea    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x35c,%edi
lea    -0x10(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padcon_standard_initialize_homotopy>:
sub    $0x18,%rsp
movl   $0x0,0xc(%rsp)
mov    %edi,0x10(%rsp)
mov    %esi,0x14(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
mov    $0x35c,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @padcon_standard_initialize_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca [2 x i32]
%8 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %6
%9 = load i32, i32* %3
%10 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
store i32 %9, i32* %10
%11 = load i32, i32* %4
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 1
store i32 %11, i32* %12
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%14 = load double*, double** %8
%15 = call i32 @_ada_use_c2phc4c(i32 860, i32* %6, i32* %13, double* %14, i32 0)
store i32 %15, i32* %5
%16 = load i32, i32* %5
ret i32 %16
}

LLVM IR (-O2):
define i32 @padcon_standard_initialize_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
%5 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%6 = bitcast [2 x i32]* %4 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %8
%9 = call i32 @_ada_use_c2phc4c(i32 860, i32* %3, i32* %7, double* undef, i32 0)
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ isConfigLine(char const *);
bool testCommentLine(void) {
  char const *line = "# this is a comment\n";
  if (!isConfigLine(line)) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<testCommentLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <isConfigLine@plt>
cmp    $0x0,%eax
jne    1141 <testCommentLine+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1148 <testCommentLine+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testCommentLine>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <isConfigLine@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"# this is a comment\0A\00"
define i32 @testCommentLine() {
%1 = alloca i32
%2 = alloca i8*
store i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @isConfigLine(i8* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %0
store i32 1, i32* %1
br label %8
7: ; preds = %0
store i32 0, i32* %1
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [21 x i8] c"# this is a comment\0A\00"
define i32 @testCommentLine() {
%1 = tail call i32 @isConfigLine(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
long int ar_member_pos(desc, mem, hdrpos, datapos, size, date, uid, gid, mode,
                       name)
int desc;
char *mem;
long int hdrpos, datapos, size, date;
int uid, gid, mode;
char *name;
{
  if (!ar_name_equal(name, mem))
    return 0;
  return hdrpos;
}


x86 assembly (clang, -O0):
<ar_member_pos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x28(%rbp),%rax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
mov    0x28(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x0,%al
call   1030 <ar_name_equal@plt>
cmp    $0x0,%eax
jne    1161 <ar_member_pos+0x51>
movq   $0x0,-0x8(%rbp)
jmp    1169 <ar_member_pos+0x59>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar_member_pos>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    0x38(%rsp),%rdi
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <ar_name_equal@plt>
test   %eax,%eax
cmovne %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @ar_member_pos(i32 %0, i8* %1, i64 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32 %7, i32 %8, i8* %9) {
%11 = alloca i64
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i64
%15 = alloca i64
%16 = alloca i64
%17 = alloca i64
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i8*
store i32 %0, i32* %12
store i8* %1, i8** %13
store i64 %2, i64* %14
store i64 %3, i64* %15
store i64 %4, i64* %16
store i64 %5, i64* %17
store i32 %6, i32* %18
store i32 %7, i32* %19
store i32 %8, i32* %20
store i8* %9, i8** %21
%22 = load i8*, i8** %21
%23 = load i8*, i8** %13
%24 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @ar_name_equal to i32 (i8*, i8*, ...)*)(i8* %22, i8* %23)
%25 = icmp ne i32 %24, 0
br i1 %25, label %27, label %26
26: ; preds = %10
store i64 0, i64* %11
br label %29
27: ; preds = %10
%28 = load i64, i64* %14
store i64 %28, i64* %11
br label %29
29: ; preds = %27, %26
%30 = load i64, i64* %11
ret i64 %30
}

LLVM IR (-O2):
define i64 @ar_member_pos(i32 %0, i8* %1, i64 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32 %7, i32 %8, i8* %9) {
%11 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @ar_name_equal to i32 (i8*, i8*, ...)*)(i8* %9, i8* %1)
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, i64 0, i64 %2
ret i64 %13
}
void av_opt_set_video_rate() {}


x86 assembly (clang, -O0):
<av_opt_set_video_rate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_opt_set_video_rate>:
ret

LLVM IR (-O0):
define void @av_opt_set_video_rate() {
ret void
}

LLVM IR (-O2):
define void @av_opt_set_video_rate() {
ret void
}
int compareDesc(const void *a, const void *b) { return *(int *)a < *(int *)b; }


x86 assembly (clang, -O0):
<compareDesc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compareDesc>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
setl   %al
ret

LLVM IR (-O0):
define i32 @compareDesc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp slt i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @compareDesc(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
int pinctrl_init_done(struct vmm_device *dev) { return 0; }


x86 assembly (clang, -O0):
<pinctrl_init_done>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pinctrl_init_done>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.vmm_device = type opaque
define i32 @pinctrl_init_done(%struct.vmm_device* %0) {
%2 = alloca %struct.vmm_device*
store %struct.vmm_device* %0, %struct.vmm_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.vmm_device = type opaque
define i32 @pinctrl_init_done(%struct.vmm_device* nocapture readnone %0) {
ret i32 0
}
int rule_match(int token) {
  switch (token) {
  case 17:
  case 18:
  case 19:
  case 20:
  case 21:
  case 22:
  case 23:
  case 24:
  case 25:
  case 26:
    return 300;
  }
  return token;
}


x86 assembly (clang, -O0):
<rule_match>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffef,%eax
sub    $0x9,%eax
ja     1127 <rule_match+0x27>
jmp    111b <rule_match+0x1b>
movl   $0x12c,-0x4(%rbp)
jmp    112d <rule_match+0x2d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rule_match>:
lea    -0x11(%rdi),%eax
cmp    $0xa,%eax
mov    $0x12c,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @rule_match(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 17, label %5
i32 18, label %5
i32 19, label %5
i32 20, label %5
i32 21, label %5
i32 22, label %5
i32 23, label %5
i32 24, label %5
i32 25, label %5
i32 26, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 300, i32* %2
br label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %8
8: ; preds = %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @rule_match(i32 %0) {
%2 = add i32 %0, -17
%3 = icmp ult i32 %2, 10
%4 = select i1 %3, i32 300, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __emit_string_literal_range(char *, int, int, int);
void test_simple_string_literal(void) {
  __emit_string_literal_range("0123456789", 6, 6, 7);
}


x86 assembly (clang, -O0):
<test_simple_string_literal>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x6,%edx
mov    $0x7,%ecx
mov    %edx,%esi
call   1030 <__emit_string_literal_range@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_simple_string_literal>:
lea    0xee9(%rip),%rdi
mov    $0x6,%esi
mov    $0x6,%edx
mov    $0x7,%ecx
jmp    1030 <__emit_string_literal_range@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"0123456789\00"
define void @test_simple_string_literal() {
%1 = call i32 @__emit_string_literal_range(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 6, i32 6, i32 7)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"0123456789\00"
define void @test_simple_string_literal() {
%1 = tail call i32 @__emit_string_literal_range(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 6, i32 6, i32 7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void _io_bell(void) { putchar('\007'); }


x86 assembly (clang, -O0):
<_io_bell>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1030 <putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_io_bell>:
mov    $0x7,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @_io_bell() {
%1 = call i32 @putchar(i8 signext 7)
ret void
}

LLVM IR (-O2):
define void @_io_bell() {
%1 = tail call i32 @putchar(i8 signext 7)
ret void
}
void hgetcharsize_(c, cw, ch) char *c;
float *cw, *ch;
{ hgetcharsize(*c, cw, ch); }


x86 assembly (clang, -O0):
<hgetcharsize_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1030 <hgetcharsize@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hgetcharsize_>:
movsbl (%rdi),%edi
xor    %eax,%eax
jmp    1030 <hgetcharsize@plt>

LLVM IR (-O0):
define void @hgetcharsize_(i8* %0, float* %1, float* %2) {
%4 = alloca i8*
%5 = alloca float*
%6 = alloca float*
store i8* %0, i8** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load float*, float** %5
%11 = load float*, float** %6
%12 = call i32 (i32, float*, float*, ...) bitcast (i32 (...)* @hgetcharsize to i32 (i32, float*, float*, ...)*)(i32 %9, float* %10, float* %11)
ret void
}

LLVM IR (-O2):
define void @hgetcharsize_(i8* nocapture %0, float* %1, float* %2) {
%4 = load i8, i8* %0
%5 = sext i8 %4 to i32
%6 = tail call i32 (i32, float*, float*, ...) bitcast (i32 (...)* @hgetcharsize to i32 (i32, float*, float*, ...)*)(i32 %5, float* %1, float* %2)
ret void
}
int fn2(int i) { return i == (1 << (sizeof(int) * 8)); }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmp    %eax,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
ret

LLVM IR (-O0):
define i32 @fn2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, poison
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @fn2(i32 %0) {
ret i32 poison
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll27(struct __test_metadata *);
void wrapper_epoll27(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll27(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll27>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll27@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll27>:
jmp    1030 <epoll27@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll27(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll27(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll27(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll27(%struct.__test_metadata* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void memSetInvalid8(uint16_t addr, uint8_t val) {
  (void)addr;
  (void)val;
}


x86 assembly (clang, -O0):
<memSetInvalid8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<memSetInvalid8>:
ret

LLVM IR (-O0):
define void @memSetInvalid8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @memSetInvalid8(i32 %0, i32 %1) {
ret void
}
float xPos(int idx, int nx, float x0, float dx, int numFeatures) {
  return x0 + dx * (0.5 + ((idx / numFeatures) % nx));
}


x86 assembly (clang, -O0):
<xPos>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x4(%rbp),%eax
cltd
idivl  -0x14(%rbp)
cltd
idivl  -0x8(%rbp)
cvtsi2sd %edx,%xmm3
movsd  0xec0(%rip),%xmm2
addsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<xPos>:
mov    %edx,%ecx
mov    %edi,%eax
cvtss2sd %xmm0,%xmm0
cvtss2sd %xmm1,%xmm1
cltd
idiv   %ecx
cltd
idiv   %esi
cvtsi2sd %edx,%xmm2
addsd  0xee2(%rip),%xmm2
mulsd  %xmm1,%xmm2
addsd  %xmm0,%xmm2
xorps  %xmm0,%xmm0
cvtsd2ss %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @xPos(i32 %0, i32 %1, float %2, float %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store float %2, float* %8
store float %3, float* %9
store i32 %4, i32* %10
%11 = load float, float* %8
%12 = fpext float %11 to double
%13 = load float, float* %9
%14 = fpext float %13 to double
%15 = load i32, i32* %6
%16 = load i32, i32* %10
%17 = sdiv i32 %15, %16
%18 = load i32, i32* %7
%19 = srem i32 %17, %18
%20 = sitofp i32 %19 to double
%21 = fadd double 5.000000e-01, %20
%22 = call double @llvm.fmuladd.f64(double %14, double %21, double %12)
%23 = fptrunc double %22 to float
ret float %23
}

LLVM IR (-O2):
define float @xPos(i32 %0, i32 %1, float %2, float %3, i32 %4) {
%6 = fpext float %2 to double
%7 = fpext float %3 to double
%8 = sdiv i32 %0, %4
%9 = srem i32 %8, %1
%10 = sitofp i32 %9 to double
%11 = fadd double %10, 5.000000e-01
%12 = tail call double @llvm.fmuladd.f64(double %7, double %11, double %6)
%13 = fptrunc double %12 to float
ret float %13
}
char int_to_leds_m$leds$red_on(void) {
  char result;
  result = leds$leds$red_on();
  return result;
}


x86 assembly (clang, -O0):
<int_to_leds_m$leds$red_on>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <leds$leds$red_on@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_leds_m$leds$red_on>:
push   %rax
xor    %eax,%eax
call   1030 <leds$leds$red_on@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @"int_to_leds_m$leds$red_on"() {
%1 = alloca i8
%2 = call i32 (...) @"leds$leds$red_on"()
%3 = trunc i32 %2 to i8
store i8 %3, i8* %1
%4 = load i8, i8* %1
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @"int_to_leds_m$leds$red_on"() {
%1 = tail call i32 (...) @"leds$leds$red_on"()
%2 = trunc i32 %1 to i8
ret i8 %2
}
/* Type definitions */
typedef scalar_t__ int64_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ __stdfix_sat_k(scalar_t__);
int32_t __stdfix_ssub_k(int32_t x, int32_t y) {
  return (__stdfix_sat_k((int64_t)x - (int64_t)y));
}


x86 assembly (clang, -O0):
<__stdfix_ssub_k>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
sub    -0x10(%rbp),%rdi
call   1030 <__stdfix_sat_k@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_ssub_k>:
sub    %rsi,%rdi
jmp    1030 <__stdfix_sat_k@plt>

LLVM IR (-O0):
define i64 @__stdfix_ssub_k(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
%8 = call i64 @__stdfix_sat_k(i64 %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @__stdfix_ssub_k(i64 %0, i64 %1) {
%3 = sub nsw i64 %0, %1
%4 = tail call i64 @__stdfix_sat_k(i64 %3)
ret i64 %4
}
int mod(int x, int m) {
  int r = x % m;
  return r < 0 ? r + m : r;
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    112c <mod+0x2c>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1132 <mod+0x32>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
sar    $0x1f,%eax
and    %esi,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
br label %17
15: ; preds = %2
%16 = load i32, i32* %5
br label %17
17: ; preds = %15, %11
%18 = phi i32 [ %14, %11 ], [ %16, %15 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @mod(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp slt i32 %3, 0
%5 = select i1 %4, i32 %1, i32 0
%6 = add nsw i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
int my_main() {
  printf("hello, world\n");
  sleep(5);
  return 0;
}


x86 assembly (clang, -O0):
<my_main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"hello, world\0A\00"
define i32 @my_main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @sleep(i32 5)
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"hello, world\00"
define i32 @my_main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @sleep(i32 5)
ret i32 0
}
/* Variables and functions */
int fabs(double);
int pioneer_send_command1(int, double);
int carmen_base_direct_set_deceleration(double deceleration) {
  deceleration = -fabs(deceleration) * 1000;
  return pioneer_send_command1(5, deceleration);
}


x86 assembly (clang, -O0):
<carmen_base_direct_set_deceleration>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <fabs@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
imul   $0x3e8,%eax,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x5,%edi
call   1030 <pioneer_send_command1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<carmen_base_direct_set_deceleration>:
push   %rax
call   1040 <fabs@plt>
imul   $0xfffffc18,%eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mov    $0x5,%edi
pop    %rax
jmp    1030 <pioneer_send_command1@plt>

LLVM IR (-O0):
define i32 @carmen_base_direct_set_deceleration(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @fabs(double %3)
%5 = sub nsw i32 0, %4
%6 = mul nsw i32 %5, 1000
%7 = sitofp i32 %6 to double
store double %7, double* %2
%8 = load double, double* %2
%9 = call i32 @pioneer_send_command1(i32 5, double %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @carmen_base_direct_set_deceleration(double %0) {
%2 = tail call i32 @fabs(double %0)
%3 = mul i32 %2, -1000
%4 = sitofp i32 %3 to double
%5 = tail call i32 @pioneer_send_command1(i32 5, double %4)
ret i32 %5
}
char fun_si8(char a, char b) { return a; }


x86 assembly (clang, -O0):
<fun_si8>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_si8>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @fun_si8(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @fun_si8(i8 returned signext %0, i8 signext %1) {
ret i8 %0
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int main() {
  int *a;
  int b[1];
  a = (int *)malloc(sizeof(int));
  *a = 123;
#pragma acc parallel copy(b)
  b[0] = *a;
  if (b[0] != 123) {
    return 1;
  }
  free(a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x7b,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x7b,-0x14(%rbp)
je     1166 <main+0x46>
movl   $0x1,-0x4(%rbp)
jmp    1176 <main+0x56>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
movl   $0x7b,(%rax)
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca [1 x i32]
store i32 0, i32* %1
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %2
%6 = load i32*, i32** %2
store i32 123, i32* %6
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
store i32 %8, i32* %9
%10 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
%11 = load i32, i32* %10
%12 = icmp ne i32 %11, 123
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, i32* %1
br label %17
14: ; preds = %0
%15 = load i32*, i32** %2
%16 = call i32 @free(i32* %15)
store i32 0, i32* %1
br label %17
17: ; preds = %14, %13
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 123, i32* %2
%3 = tail call i32 @free(i32* %2)
ret i32 0
}
/* Variables and functions */
float lerp(float, float, float);
float smoothstep(float p1, float p2, float amount) {
  float scaled_amount = amount * amount * (3 - 2 * amount);
  return lerp(p1, p2, scaled_amount);
}


x86 assembly (clang, -O0):
<smoothstep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
addss  %xmm2,%xmm2
movss  0xebe(%rip),%xmm1
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
call   1030 <lerp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smoothstep>:
movaps %xmm2,%xmm4
mulss  %xmm2,%xmm4
addss  %xmm2,%xmm2
movss  0xedd(%rip),%xmm3
subss  %xmm2,%xmm3
mulss  %xmm4,%xmm3
movaps %xmm3,%xmm2
jmp    1030 <lerp@plt>

LLVM IR (-O0):
define float @smoothstep(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%8 = load float, float* %6
%9 = load float, float* %6
%10 = fmul float %8, %9
%11 = load float, float* %6
%12 = call float @llvm.fmuladd.f32(float -2.000000e+00, float %11, float 3.000000e+00)
%13 = fmul float %10, %12
store float %13, float* %7
%14 = load float, float* %4
%15 = load float, float* %5
%16 = load float, float* %7
%17 = call float @lerp(float %14, float %15, float %16)
ret float %17
}

LLVM IR (-O2):
define float @smoothstep(float %0, float %1, float %2) {
%4 = fmul float %2, %2
%5 = tail call float @llvm.fmuladd.f32(float %2, float -2.000000e+00, float 3.000000e+00)
%6 = fmul float %4, %5
%7 = tail call float @lerp(float %0, float %1, float %6)
ret float %7
}