xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ strlcpy(char *, char const *, size_t);
int strlen(char const *);
char *xmalloc(size_t);
char *xstrdup(const char *str) {
  size_t len;
  char *cp;
  len = strlen(str) + 1;
  cp = xmalloc(len);
  strlcpy(cp, str, len);
  return cp;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1050 <strlcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1050 <strlcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = load i8*, i8** %2
%13 = load i64, i64* %3
%14 = call i32 @strlcpy(i8* %11, i8* %12, i64 %13)
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @xmalloc(i64 %4)
%6 = tail call i32 @strlcpy(i8* %5, i8* %0, i64 %4)
ret i8* %5
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t rm16(const uint8_t a[2]) {
  uint16_t x;
  x = (uint16_t)a[0] << 8;
  x |= (uint16_t)a[1] << 0;
  return x;
}


x86 assembly (clang, -O0):
<rm16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
shl    $0x0,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rm16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @rm16(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 8
store i32 %8, i32* %3
%9 = load i64*, i64** %2
%10 = getelementptr inbounds i64, i64* %9, i64 1
%11 = load i64, i64* %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 0
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @rm16(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 8
%5 = getelementptr inbounds i64, i64* %0, i64 1
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = or i32 %4, %7
ret i32 %8
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dvbmc_list_add_after(struct list *, struct list *);
void dvbmc_list_add_head(struct list *list, struct list *elem) {
  dvbmc_list_add_after(list, elem);
}


x86 assembly (clang, -O0):
<dvbmc_list_add_head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dvbmc_list_add_after@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dvbmc_list_add_head>:
jmp    1030 <dvbmc_list_add_after@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
define void @dvbmc_list_add_head(%struct.list* %0, %struct.list* %1) {
%3 = alloca %struct.list*
%4 = alloca %struct.list*
store %struct.list* %0, %struct.list** %3
store %struct.list* %1, %struct.list** %4
%5 = load %struct.list*, %struct.list** %3
%6 = load %struct.list*, %struct.list** %4
%7 = call i32 @dvbmc_list_add_after(%struct.list* %5, %struct.list* %6)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @dvbmc_list_add_head(%struct.list* %0, %struct.list* %1) {
%3 = tail call i32 @dvbmc_list_add_after(%struct.list* %0, %struct.list* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ R_MAIN_UserInit();
void main(void) {
  R_MAIN_UserInit();
  while (1U) {
    ;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <R_MAIN_UserInit@plt>
jmp    111b <main+0xb>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <R_MAIN_UserInit@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <main+0x10>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @R_MAIN_UserInit()
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @R_MAIN_UserInit()
br label %2
2: ; preds = %0, %2
br label %2
}
void gf8mul_00101000(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm7, %xmm1\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm6, %xmm0\n"
                       "\tpxor    %xmm5, %xmm6\n"
                       "\tpxor    %xmm5, %xmm3\n"
                       "\tpxor    %xmm5, %xmm1\n"
                       "\tpxor    %xmm4, %xmm7\n"
                       "\tpxor    %xmm4, %xmm0\n"
                       "\tpxor    %xmm3, %xmm7\n"
                       "\tpxor    %xmm3, %xmm5\n"
                       "\tpxor    %xmm3, %xmm2\n"
                       "\tpxor    %xmm3, %xmm1\n"
                       "\tpxor    %xmm2, %xmm7\n"
                       "\tpxor    %xmm2, %xmm5\n"
                       "\tpxor    %xmm5, %xmm2\n"
                       "\tpxor    %xmm1, %xmm6\n"
                       "\tpxor    %xmm1, %xmm4\n"
                       "\tpxor    %xmm4, %xmm1\n"
                       "\tpxor    %xmm0, %xmm5\n"
                       "\tpxor    %xmm0, %xmm3\n"
                       "\tpxor    %xmm3, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm1
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm0
pxor   %xmm5,%xmm6
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm1
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm0
pxor   %xmm3,%xmm7
pxor   %xmm3,%xmm5
pxor   %xmm3,%xmm2
pxor   %xmm3,%xmm1
pxor   %xmm2,%xmm7
pxor   %xmm2,%xmm5
pxor   %xmm5,%xmm2
pxor   %xmm1,%xmm6
pxor   %xmm1,%xmm4
pxor   %xmm4,%xmm1
pxor   %xmm0,%xmm5
pxor   %xmm0,%xmm3
pxor   %xmm3,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm1
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm0
pxor   %xmm5,%xmm6
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm1
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm0
pxor   %xmm3,%xmm7
pxor   %xmm3,%xmm5
pxor   %xmm3,%xmm2
pxor   %xmm3,%xmm1
pxor   %xmm2,%xmm7
pxor   %xmm2,%xmm5
pxor   %xmm5,%xmm2
pxor   %xmm1,%xmm6
pxor   %xmm1,%xmm4
pxor   %xmm4,%xmm1
pxor   %xmm0,%xmm5
pxor   %xmm0,%xmm3
pxor   %xmm3,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_00101000() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00101000() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm5\0A\09pxor %xmm7, %xmm1\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm6, %xmm0\0A\09pxor %xmm5, %xmm6\0A\09pxor %xmm5, %xmm3\0A\09pxor %xmm5, %xmm1\0A\09pxor %xmm4, %xmm7\0A\09pxor %xmm4, %xmm0\0A\09pxor %xmm3, %xmm7\0A\09pxor %xmm3, %xmm5\0A\09pxor %xmm3, %xmm2\0A\09pxor %xmm3, %xmm1\0A\09pxor %xmm2, %xmm7\0A\09pxor %xmm2, %xmm5\0A\09pxor %xmm5, %xmm2\0A\09pxor %xmm1, %xmm6\0A\09pxor %xmm1, %xmm4\0A\09pxor %xmm4, %xmm1\0A\09pxor %xmm0, %xmm5\0A\09pxor %xmm0, %xmm3\0A\09pxor %xmm3, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int main(void) {
  __asm__ __volatile__("subw $0x28, %%sp\n"
                       "movl $0, 0(%%esp)\n"
                       "addw $0x28, %%sp"
                       :
                       :
                       : "memory");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
sub    $0x28,%sp
movl   $0x0,(%esp)
add    $0x28,%sp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%sp
movl   $0x0,(%esp)
add    $0x28,%sp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "subw $$0x28, %sp\0Amovl $$0, 0(%esp)\0Aaddw $$0x28, %sp", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
char *langRomTypeHolyQuran() { return "Holy Quran"; }


x86 assembly (clang, -O0):
<langRomTypeHolyQuran>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeHolyQuran>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Holy Quran\00"
define i8* @langRomTypeHolyQuran() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"Holy Quran\00"
define i8* @langRomTypeHolyQuran() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void grpcsharp_batch_context_recv_status_on_client_error_string() {
  fprintf(stderr, "Should never reach here");
  abort();
}


x86 assembly (clang, -O0):
<grpcsharp_batch_context_recv_status_on_client_error_string>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<grpcsharp_batch_context_recv_status_on_client_error_string>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_batch_context_recv_status_on_client_error_string() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_batch_context_recv_status_on_client_error_string() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("%d\n", (int)(7));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x7,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x7,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 7)
ret i32 0
}
void __set_bit(long nr, volatile unsigned long *addr) {
  asm volatile("bts %1,%0"
               : "+m"((*(volatile long *)addr))
               : "Ir"(nr)
               : "memory");
}


x86 assembly (clang, -O0):
<__set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
bts    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__set_bit>:
bts    %rdi,(%rsi)
ret

LLVM IR (-O0):
define void @__set_bit(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i64, i64* %3
ret void
}

LLVM IR (-O2):
define void @__set_bit(i64 %0, i64* %1) {
tail call void asm sideeffect "bts $1,$0", "=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i64 %0, i64* elementtype(i64) %1)
ret void
}
/* Variables and functions */
int cbuf(int, int, int);
cbuf14(int f, int n) { return (cbuf(f, n, 14)); }


x86 assembly (clang, -O0):
<cbuf14>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0xe,%edx
call   1030 <cbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf14>:
mov    $0xe,%edx
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf14(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @cbuf(i32 %5, i32 %6, i32 14)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cbuf14(i32 %0, i32 %1) {
%3 = tail call i32 @cbuf(i32 %0, i32 %1, i32 14)
ret i32 %3
}
/* Variables and functions */
void *calloc(int, int);
int **aloca(int tam) {
  int **m, i;
  m = calloc(tam, sizeof(int *));
  for (i = 0; i < tam; i++)
    m[i] = calloc(tam, sizeof(int *));
  return (m);
}


x86 assembly (clang, -O0):
<aloca>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1169 <aloca+0x59>
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,%rdx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1133 <aloca+0x23>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aloca>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,%r15
test   %r14d,%r14d
jle    115a <aloca+0x4a>
mov    %r14d,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r14d,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,(%r15,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%rbp
jne    1140 <aloca+0x30>
mov    %r15,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32** @aloca(i32 %0) {
%2 = alloca i32
%3 = alloca i32**
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i8* @calloc(i32 %5, i32 8)
%7 = bitcast i8* %6 to i32**
store i32** %7, i32*** %3
store i32 0, i32* %4
br label %8
8: ; preds = %20, %1
%9 = load i32, i32* %4
%10 = load i32, i32* %2
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i32, i32* %2
%14 = call i8* @calloc(i32 %13, i32 8)
%15 = bitcast i8* %14 to i32*
%16 = load i32**, i32*** %3
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32*, i32** %16, i64 %18
store i32* %15, i32** %19
br label %20
20: ; preds = %12
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %8
23: ; preds = %8
%24 = load i32**, i32*** %3
ret i32** %24
}

LLVM IR (-O2):
define noalias i32** @aloca(i32 %0) {
%2 = tail call i8* @calloc(i32 %0, i32 8)
%3 = bitcast i8* %2 to i32**
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = zext i32 %0 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %12, %7 ]
%9 = tail call i8* @calloc(i32 %0, i32 8)
%10 = getelementptr inbounds i32*, i32** %3, i64 %8
%11 = bitcast i32** %10 to i8**
store i8* %9, i8** %11
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %1
ret i32** %3
}
int mdt_hsm_agent_unregister(struct mdt_thread_info *info,
                             struct obd_uuid *uuid) {
  return 0;
}


x86 assembly (clang, -O0):
<mdt_hsm_agent_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdt_hsm_agent_unregister>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mdt_thread_info = type opaque
%struct.obd_uuid = type opaque
define i32 @mdt_hsm_agent_unregister(%struct.mdt_thread_info* %0, %struct.obd_uuid* %1) {
%3 = alloca %struct.mdt_thread_info*
%4 = alloca %struct.obd_uuid*
store %struct.mdt_thread_info* %0, %struct.mdt_thread_info** %3
store %struct.obd_uuid* %1, %struct.obd_uuid** %4
ret i32 0
}

LLVM IR (-O2):
%struct.mdt_thread_info = type opaque
%struct.obd_uuid = type opaque
define i32 @mdt_hsm_agent_unregister(%struct.mdt_thread_info* nocapture readnone %0, %struct.obd_uuid* nocapture readnone %1) {
ret i32 0
}
void iommu_group_put(struct iommu_group *group) {}


x86 assembly (clang, -O0):
<iommu_group_put>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<iommu_group_put>:
ret

LLVM IR (-O0):
%struct.iommu_group = type opaque
define void @iommu_group_put(%struct.iommu_group* %0) {
%2 = alloca %struct.iommu_group*
store %struct.iommu_group* %0, %struct.iommu_group** %2
ret void
}

LLVM IR (-O2):
%struct.iommu_group = type opaque
define void @iommu_group_put(%struct.iommu_group* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool utf16_is_surrogate(uint16_t c) { return c >= 0xd800U && c <= 0xdfffU; }


x86 assembly (clang, -O0):
<utf16_is_surrogate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xd800,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jb     1126 <utf16_is_surrogate+0x26>
cmpl   $0xdfff,-0x4(%rbp)
setbe  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf16_is_surrogate>:
and    $0xfffff800,%edi
xor    %eax,%eax
cmp    $0xd800,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @utf16_is_surrogate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp uge i32 %3, 55296
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 57343
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @utf16_is_surrogate(i32 %0) {
%2 = and i32 %0, -2048
%3 = icmp eq i32 %2, 55296
%4 = zext i1 %3 to i32
ret i32 %4
}
utime() {}


x86 assembly (clang, -O0):
<utime>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utime>:
ret

LLVM IR (-O0):
define i32 @utime() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @utime() {
ret i32 undef
}
/* Variables and functions */
int mkstemp(char *);
int fio_tmpfile(void) {
  int fd = 0;
  char name_template[] = "/tmp/facil_io_tmpfile_XXXXXXXX";
  fd = mkstemp(name_template);
  return fd;
}


x86 assembly (clang, -O0):
<fio_tmpfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed2(%rip),%eax
mov    %eax,-0x18(%rbp)
mov    0xecc(%rip),%ax
mov    %ax,-0x14(%rbp)
mov    0xec4(%rip),%al
mov    %al,-0x12(%rbp)
lea    -0x30(%rbp),%rdi
call   1030 <mkstemp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fio_tmpfile>:
sub    $0x28,%rsp
movups 0xef4(%rip),%xmm0
movups %xmm0,0xf(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <mkstemp@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.fio_tmpfile.name_template = [31 x i8] c"/tmp/facil_io_tmpfile_XXXXXXXX\00"
define i32 @fio_tmpfile() {
%1 = alloca i32
%2 = alloca [31 x i8]
store i32 0, i32* %1
%3 = bitcast [31 x i8]* %2 to i8*
%4 = getelementptr inbounds [31 x i8], [31 x i8]* %2, i64 0, i64 0
%5 = call i32 @mkstemp(i8* %4)
store i32 %5, i32* %1
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
@__const.fio_tmpfile.name_template = [31 x i8] c"/tmp/facil_io_tmpfile_XXXXXXXX\00"
define i32 @fio_tmpfile() {
%1 = alloca [31 x i8]
%2 = getelementptr inbounds [31 x i8], [31 x i8]* %1, i64 0, i64 0
%3 = call i32 @mkstemp(i8* %2)
ret i32 %3
}
/* Type definitions */
struct hashtableitem {
  int dummy;
};
struct hashtable {
  int dummy;
};

/* Variables and functions */
int hashtable_get_target(struct hashtable *, void const *, size_t, void **,
                         int /*<<< orphan*/);
int hashtable_get_item(struct hashtable *ht, const void *key, size_t keylen,
                       struct hashtableitem **item) {
  return hashtable_get_target(ht, key, keylen, (void **)item, 0);
}


x86 assembly (clang, -O0):
<hashtable_get_item>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <hashtable_get_target@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashtable_get_item>:
xor    %r8d,%r8d
jmp    1030 <hashtable_get_target@plt>

LLVM IR (-O0):
%struct.hashtable = type { i32 }
%struct.hashtableitem = type { i32 }
define i32 @hashtable_get_item(%struct.hashtable* %0, i8* %1, i64 %2, %struct.hashtableitem** %3) {
%5 = alloca %struct.hashtable*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca %struct.hashtableitem**
store %struct.hashtable* %0, %struct.hashtable** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store %struct.hashtableitem** %3, %struct.hashtableitem*** %8
%9 = load %struct.hashtable*, %struct.hashtable** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load %struct.hashtableitem**, %struct.hashtableitem*** %8
%13 = bitcast %struct.hashtableitem** %12 to i8**
%14 = call i32 @hashtable_get_target(%struct.hashtable* %9, i8* %10, i64 %11, i8** %13, i32 0)
ret i32 %14
}

LLVM IR (-O2):
%struct.hashtable = type { i32 }
%struct.hashtableitem = type { i32 }
define i32 @hashtable_get_item(%struct.hashtable* %0, i8* %1, i64 %2, %struct.hashtableitem** %3) {
%5 = bitcast %struct.hashtableitem** %3 to i8**
%6 = tail call i32 @hashtable_get_target(%struct.hashtable* %0, i8* %1, i64 %2, i8** %5, i32 0)
ret i32 %6
}
void f(char *s, int size) {
  printf("%*s%*s", size / 2 + strlen(s) / 2, s, size / 2 - strlen(s) / 2, "");
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cltq
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
shr    $0x1,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cltq
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rcx
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
shr    $0x1,%rax
sub    %rax,%rcx
lea    0xe69(%rip),%rdi
lea    0xe68(%rip),%r8
mov    $0x0,%al
call   1040 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %esi,%eax
shr    $0x1f,%eax
add    %esi,%eax
sar    %eax
movslq %eax,%rbx
call   1030 <strlen@plt>
shr    %rax
lea    (%rax,%rbx,1),%rsi
sub    %rax,%rbx
lea    0xeb7(%rip),%rdi
lea    0xeb6(%rip),%r8
mov    %r14,%rdx
mov    %rbx,%rcx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%*s%*s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @f(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sdiv i32 %5, 2
%7 = sext i32 %6 to i64
%8 = load i8*, i8** %3
%9 = call i64 @strlen(i8* %8)
%10 = udiv i64 %9, 2
%11 = add i64 %7, %10
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = sdiv i32 %13, 2
%15 = sext i32 %14 to i64
%16 = load i8*, i8** %3
%17 = call i64 @strlen(i8* %16)
%18 = udiv i64 %17, 2
%19 = sub i64 %15, %18
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %11, i8* %12, i64 %19, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%*s%*s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @f(i8* %0, i32 %1) {
%3 = sdiv i32 %1, 2
%4 = sext i32 %3 to i64
%5 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%6 = lshr i64 %5, 1
%7 = add i64 %6, %4
%8 = sub i64 %4, %6
%9 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %7, i8* %0, i64 %8, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fftss_kern_r8_ia64_f(double *, double *, double *, double *,
                                        long, long);
void fftss_r8_ia64_n_f(double *in, double *out, double *w, long bsize,
                       long blocks) {
  fftss_kern_r8_ia64_f(in, out, w, w + bsize * blocks * 12, bsize * blocks,
                       bsize);
}


x86 assembly (clang, -O0):
<fftss_r8_ia64_n_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
imul   -0x28(%rbp),%rax
imul   $0xc,%rax,%rax
shl    $0x3,%rax
add    %rax,%rcx
mov    -0x20(%rbp),%r8
imul   -0x28(%rbp),%r8
mov    -0x20(%rbp),%r9
call   1030 <fftss_kern_r8_ia64_f@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fftss_r8_ia64_n_f>:
mov    %rcx,%r9
imul   %rcx,%r8
lea    (%r8,%r8,2),%rcx
shl    $0x5,%rcx
add    %rdx,%rcx
jmp    1030 <fftss_kern_r8_ia64_f@plt>

LLVM IR (-O0):
define void @fftss_r8_ia64_n_f(double* %0, double* %1, double* %2, i64 %3, i64 %4) {
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
%9 = alloca i64
%10 = alloca i64
store double* %0, double** %6
store double* %1, double** %7
store double* %2, double** %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%11 = load double*, double** %6
%12 = load double*, double** %7
%13 = load double*, double** %8
%14 = load double*, double** %8
%15 = load i64, i64* %9
%16 = load i64, i64* %10
%17 = mul nsw i64 %15, %16
%18 = mul nsw i64 %17, 12
%19 = getelementptr inbounds double, double* %14, i64 %18
%20 = load i64, i64* %9
%21 = load i64, i64* %10
%22 = mul nsw i64 %20, %21
%23 = load i64, i64* %9
%24 = call i32 @fftss_kern_r8_ia64_f(double* %11, double* %12, double* %13, double* %19, i64 %22, i64 %23)
ret void
}

LLVM IR (-O2):
define void @fftss_r8_ia64_n_f(double* %0, double* %1, double* %2, i64 %3, i64 %4) {
%6 = mul nsw i64 %4, %3
%7 = mul nsw i64 %6, 12
%8 = getelementptr inbounds double, double* %2, i64 %7
%9 = tail call i32 @fftss_kern_r8_ia64_f(double* %0, double* %1, double* %2, double* %8, i64 %6, i64 %3)
ret void
}
/* Type definitions */
typedef scalar_t__ int_fast32_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_EQUALS_int_fast32_t(int_fast32_t const k1,
                                           int_fast32_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_EQUALS_int_fast32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_EQUALS_int_fast32_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_EQUALS_int_fast32_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_EQUALS_int_fast32_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
struct woption {
  int dummy;
};

/* Variables and functions */
int _wgetopt_internal(int, int /*<<< orphan*/ *const *,
                      int /*<<< orphan*/ const *, struct woption const *, int *,
                      int /*<<< orphan*/);
int wgetopt_long(int argc, wchar_t *const *argv, const wchar_t *options,
                 const struct woption *long_options, int *opt_index) {
  return _wgetopt_internal(argc, argv, options, long_options, opt_index, 0);
}


x86 assembly (clang, -O0):
<wgetopt_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
xor    %r9d,%r9d
call   1030 <_wgetopt_internal@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wgetopt_long>:
xor    %r9d,%r9d
jmp    1030 <_wgetopt_internal@plt>

LLVM IR (-O0):
%struct.woption = type { i32 }
define i32 @wgetopt_long(i32 %0, i32** %1, i32* %2, %struct.woption* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32**
%8 = alloca i32*
%9 = alloca %struct.woption*
%10 = alloca i32*
store i32 %0, i32* %6
store i32** %1, i32*** %7
store i32* %2, i32** %8
store %struct.woption* %3, %struct.woption** %9
store i32* %4, i32** %10
%11 = load i32, i32* %6
%12 = load i32**, i32*** %7
%13 = load i32*, i32** %8
%14 = load %struct.woption*, %struct.woption** %9
%15 = load i32*, i32** %10
%16 = call i32 @_wgetopt_internal(i32 %11, i32** %12, i32* %13, %struct.woption* %14, i32* %15, i32 0)
ret i32 %16
}

LLVM IR (-O2):
%struct.woption = type { i32 }
define i32 @wgetopt_long(i32 %0, i32** %1, i32* %2, %struct.woption* %3, i32* %4) {
%6 = tail call i32 @_wgetopt_internal(i32 %0, i32** %1, i32* %2, %struct.woption* %3, i32* %4, i32 0)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ callrts(char *);
zand() { callrts("ccand"); }


x86 assembly (clang, -O0):
<zand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <callrts@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zand>:
lea    0xee9(%rip),%rdi
jmp    1030 <callrts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ccand\00"
define i32 @zand() {
%1 = alloca i32
%2 = call i32 @callrts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [6 x i8] c"ccand\00"
define i32 @zand() {
%1 = tail call i32 @callrts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
void tegra2_statmon_stop(void) {}


x86 assembly (clang, -O0):
<tegra2_statmon_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra2_statmon_stop>:
ret

LLVM IR (-O0):
define void @tegra2_statmon_stop() {
ret void
}

LLVM IR (-O2):
define void @tegra2_statmon_stop() {
ret void
}
void avutil_configuration() {}


x86 assembly (clang, -O0):
<avutil_configuration>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avutil_configuration>:
ret

LLVM IR (-O0):
define void @avutil_configuration() {
ret void
}

LLVM IR (-O2):
define void @avutil_configuration() {
ret void
}
/* Variables and functions */
double common_randJS();
float cos(int);
int /*<<< orphan*/ log(double);
float sqrt(int /*<<< orphan*/);
double common_norm_rand() {
  double R1 = common_randJS();
  double R2 = common_randJS();
  return 0.0f + 1.0f * cos(2 * 3.14 * R1) * sqrt(-log(R2));
}


x86 assembly (clang, -O0):
<common_norm_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1030 <common_randJS@plt>
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <common_randJS@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xea0(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1040 <cos@plt>
movaps %xmm0,%xmm1
movss  0xe7f(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1050 <log@plt>
xor    %edi,%edi
sub    %eax,%edi
call   1060 <sqrt@plt>
movaps %xmm0,%xmm1
movss  -0x14(%rbp),%xmm0
mulss  %xmm1,%xmm0
xorps  %xmm1,%xmm1
addss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<common_norm_rand>:
sub    $0x18,%rsp
xor    %eax,%eax
call   1030 <common_randJS@plt>
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <common_randJS@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
mulsd  0xe94(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1040 <cos@plt>
movss  %xmm0,0x8(%rsp)
movsd  0x10(%rsp),%xmm0
call   1050 <log@plt>
neg    %eax
mov    %eax,%edi
call   1060 <sqrt@plt>
mulss  0x8(%rsp),%xmm0
xorps  %xmm1,%xmm1
addss  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @common_norm_rand() {
%1 = alloca double
%2 = alloca double
%3 = call double (...) @common_randJS()
store double %3, double* %1
%4 = call double (...) @common_randJS()
store double %4, double* %2
%5 = load double, double* %1
%6 = fmul double 6.280000e+00, %5
%7 = fptosi double %6 to i32
%8 = call float @cos(i32 %7)
%9 = fmul float 1.000000e+00, %8
%10 = load double, double* %2
%11 = call i32 @log(double %10)
%12 = sub nsw i32 0, %11
%13 = call float @sqrt(i32 %12)
%14 = call float @llvm.fmuladd.f32(float %9, float %13, float 0.000000e+00)
%15 = fpext float %14 to double
ret double %15
}

LLVM IR (-O2):
define double @common_norm_rand() {
%1 = tail call double (...) @common_randJS()
%2 = tail call double (...) @common_randJS()
%3 = fmul double %1, 6.280000e+00
%4 = fptosi double %3 to i32
%5 = tail call float @cos(i32 %4)
%6 = tail call i32 @log(double %2)
%7 = sub nsw i32 0, %6
%8 = tail call float @sqrt(i32 %7)
%9 = tail call float @llvm.fmuladd.f32(float %5, float %8, float 0.000000e+00)
%10 = fpext float %9 to double
ret double %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ htobe32(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(void *, int /*<<< orphan*/ *, int);
void pack_to_be32(void *v, uint32_t u) {
  u = htobe32(u);
  memcpy(v, &u, sizeof(uint32_t));
}


x86 assembly (clang, -O0):
<pack_to_be32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <htobe32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pack_to_be32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <htobe32@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @pack_to_be32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @htobe32(i32 %5)
store i32 %6, i32* %4
%7 = load i8*, i8** %3
%8 = call i32 @memcpy(i8* %7, i32* %4, i32 4)
ret void
}

LLVM IR (-O2):
define void @pack_to_be32(i8* %0, i32 %1) {
%3 = alloca i32
%4 = tail call i32 @htobe32(i32 %1)
store i32 %4, i32* %3
%5 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
ret void
}
void _mktm_r(long lcltime, int *res) {
  long rem = lcltime % ((60L * 60L) * 24L);
  if (rem < 0)
    return;
  while (rem >= ((60L * 60L) * 24L))
    rem -= ((60L * 60L) * 24L);
  *res = (int)(rem % 60L);
}


x86 assembly (clang, -O0):
<_mktm_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x15180,%ecx
cqto
idiv   %rcx
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jge    112e <_mktm_r+0x2e>
jmp    116a <_mktm_r+0x6a>
jmp    1133 <_mktm_r+0x33>
cmpq   $0x15180,-0x18(%rbp)
jl     1154 <_mktm_r+0x54>
mov    -0x18(%rbp),%rax
sub    $0x15180,%rax
mov    %rax,-0x18(%rbp)
jmp    1133 <_mktm_r+0x33>
mov    -0x18(%rbp),%rax
mov    $0x3c,%ecx
cqto
idiv   %rcx
mov    %edx,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mktm_r>:
movabs $0x1845c8a0ce512957,%rcx
c8 45 18
mov    %rdi,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0xd,%rdx
add    %rax,%rdx
imul   $0x15180,%rdx,%rax
sub    %rax,%rdi
js     1140 <_mktm_r+0x40>
mov    %edi,%eax
mov    $0x88888889,%ecx
imul   %rax,%rcx
shr    $0x25,%rcx
imul   $0x3c,%ecx,%eax
sub    %eax,%edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @_mktm_r(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
%5 = alloca i64
store i64 %0, i64* %3
store i32* %1, i32** %4
%6 = load i64, i64* %3
%7 = srem i64 %6, 86400
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
br label %23
11: ; preds = %2
br label %12
12: ; preds = %15, %11
%13 = load i64, i64* %5
%14 = icmp sge i64 %13, 86400
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i64, i64* %5
%17 = sub nsw i64 %16, 86400
store i64 %17, i64* %5
br label %12
18: ; preds = %12
%19 = load i64, i64* %5
%20 = srem i64 %19, 60
%21 = trunc i64 %20 to i32
%22 = load i32*, i32** %4
store i32 %21, i32* %22
br label %23
23: ; preds = %18, %10
ret void
}

LLVM IR (-O2):
define void @_mktm_r(i64 %0, i32* nocapture writeonly %1) {
%3 = srem i64 %0, 86400
%4 = icmp slt i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = trunc i64 %3 to i32
%7 = urem i32 %6, 60
store i32 %7, i32* %1
br label %8
8: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xf7() {
  Assert_real((isbdigit(247) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              1240, ("isbdigit should be 0 for 0xf7"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xf7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf7,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4d8,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xf7>:
push   %rax
mov    $0xf7,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4d8,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xf7\00"
define void @t_isbdigit_0xf7() {
%1 = call i64 @isbdigit(i32 247)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1240, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xf7\00"
define void @t_isbdigit_0xf7() {
%1 = tail call i64 @isbdigit(i32 247)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1240, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ puts(char *);
void handle_interrupt(int sig) {
  puts("Goodbye crule world....\n");
  exit(1);
}


x86 assembly (clang, -O0):
<handle_interrupt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<handle_interrupt>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Goodbye crule world....\0A\00"
define void @handle_interrupt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @puts(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [25 x i8] c"Goodbye crule world....\0A\00"
define void @handle_interrupt(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void calibrate_realjoy(int stick) {}


x86 assembly (clang, -O0):
<calibrate_realjoy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<calibrate_realjoy>:
ret

LLVM IR (-O0):
define void @calibrate_realjoy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @calibrate_realjoy(i32 %0) {
ret void
}
/* Variables and functions */
bool nrf52_errata_109(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_109>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_109>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_109() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_109() {
ret i32 0
}
void yy_1_pExtWsPlusTransient(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_1_pExtWsPlusTransient>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_1_pExtWsPlusTransient>:
ret

LLVM IR (-O0):
define void @yy_1_pExtWsPlusTransient(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_1_pExtWsPlusTransient(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uproc_dnaresult_free(void *);
void map_list_dnaresult_free(void *value, void *opaque) {
  (void)opaque;
  uproc_dnaresult_free(value);
}


x86 assembly (clang, -O0):
<map_list_dnaresult_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <uproc_dnaresult_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_list_dnaresult_free>:
jmp    1030 <uproc_dnaresult_free@plt>

LLVM IR (-O0):
define void @map_list_dnaresult_free(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @uproc_dnaresult_free(i8* %6)
ret void
}

LLVM IR (-O2):
define void @map_list_dnaresult_free(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @uproc_dnaresult_free(i8* %0)
ret void
}
unsigned char isa_read8(unsigned short port) {
  return *(char *)((void *)(0xfe000000 | (port)));
}


x86 assembly (clang, -O0):
<isa_read8>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
or     $0xfe000000,%eax
mov    %eax,%eax
movzbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isa_read8>:
mov    %edi,%eax
mov    $0xfe000000,%ecx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
define zeroext i8 @isa_read8(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = or i32 -33554432, %4
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
%8 = load i8, i8* %7
ret i8 %8
}

LLVM IR (-O2):
define zeroext i8 @isa_read8(i16 zeroext %0) {
%2 = zext i16 %0 to i64
%3 = or i64 %2, 4261412864
%4 = inttoptr i64 %3 to i8*
%5 = load i8, i8* %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x0c() {
  Assert_real((isodigit(12) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              65, ("isodigit should be 0 for 0x0c"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x0c>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x41,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x0c>:
push   %rax
mov    $0xc,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x41,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x0c\00"
define void @t_isodigit_0x0c() {
%1 = call i64 @isodigit(i32 12)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x0c\00"
define void @t_isodigit_0x0c() {
%1 = tail call i64 @isodigit(i32 12)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void rb_thread_start_timer(void) {}


x86 assembly (clang, -O0):
<rb_thread_start_timer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_thread_start_timer>:
ret

LLVM IR (-O0):
define void @rb_thread_start_timer() {
ret void
}

LLVM IR (-O2):
define void @rb_thread_start_timer() {
ret void
}