xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct sockaddr_storage {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int getsourcefilter(int s, uint32_t interface, const struct sockaddr *group,
                    socklen_t grouplen, uint32_t *fmode, uint32_t *numsrc,
                    struct sockaddr_storage *slist) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<getsourcefilter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getsourcefilter>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
%struct.sockaddr_storage = type { i32 }
@ENOSYS = global i32 0
define i32 @getsourcefilter(i32 %0, i32 %1, %struct.sockaddr* %2, i32 %3, i32* %4, i32* %5, %struct.sockaddr_storage* %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.sockaddr*
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
%14 = alloca %struct.sockaddr_storage*
store i32 %0, i32* %8
store i32 %1, i32* %9
store %struct.sockaddr* %2, %struct.sockaddr** %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
store %struct.sockaddr_storage* %6, %struct.sockaddr_storage** %14
%15 = load i32, i32* @ENOSYS
%16 = call i32 @__set_errno(i32 %15)
ret i32 -1
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
%struct.sockaddr_storage = type { i32 }
@ENOSYS = global i32 0
define i32 @getsourcefilter(i32 %0, i32 %1, %struct.sockaddr* nocapture readnone %2, i32 %3, i32* nocapture readnone %4, i32* nocapture readnone %5, %struct.sockaddr_storage* nocapture readnone %6) {
%8 = load i32, i32* @ENOSYS
%9 = tail call i32 @__set_errno(i32 %8)
ret i32 -1
}
/* Type definitions */
typedef int GLint;
typedef int GLenum;

/* Variables and functions */
#define GL_POINT_DISTANCE_ATTENUATION 133
#define GL_POINT_FADE_THRESHOLD_SIZE 132
#define GL_POINT_SIZE_MAX 131
#define GL_POINT_SIZE_MIN 130
#define GL_POINT_SPRITE_COORD_ORIGIN 129
#define GL_POINT_SPRITE_R_MODE_NV 128
__attribute__((visibility("internal"))) __attribute__((pure)) GLint
__glPointParameterfvEXT_size(GLenum e) {
  switch (e) {
  case GL_POINT_SIZE_MIN:
  case GL_POINT_SIZE_MAX:
  case GL_POINT_FADE_THRESHOLD_SIZE:
  case GL_POINT_SPRITE_R_MODE_NV:
  case GL_POINT_SPRITE_COORD_ORIGIN:
    return 1;
  case GL_POINT_DISTANCE_ATTENUATION:
    return 3;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<__glPointParameterfvEXT_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffff80,%eax
sub    $0x5,%eax
jb     1131 <__glPointParameterfvEXT_size+0x31>
jmp    111e <__glPointParameterfvEXT_size+0x1e>
mov    -0xc(%rbp),%eax
sub    $0x85,%eax
je     113d <__glPointParameterfvEXT_size+0x3d>
jmp    1149 <__glPointParameterfvEXT_size+0x49>
movl   $0x1,-0x4(%rbp)
jmp    1150 <__glPointParameterfvEXT_size+0x50>
movl   $0x3,-0x4(%rbp)
jmp    1150 <__glPointParameterfvEXT_size+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glPointParameterfvEXT_size>:
add    $0xffffff80,%edi
xor    %eax,%eax
cmp    $0x5,%edi
ja     1117 <__glPointParameterfvEXT_size+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define hidden i32 @__glPointParameterfvEXT_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 130, label %5
i32 131, label %5
i32 132, label %5
i32 128, label %5
i32 129, label %5
i32 133, label %6
]
5: ; preds = %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %8
6: ; preds = %1
store i32 3, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@switch.table.__glPointParameterfvEXT_size = [6 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 3]
define hidden i32 @__glPointParameterfvEXT_size(i32 %0) {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.__glPointParameterfvEXT_size, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ loff_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_fallocate;
int syscall(int /*<<< orphan*/, int, int, int /*<<< orphan*/,
            int /*<<< orphan*/);
int fallocate(int fd, int mode, loff_t offset, loff_t len) {
  return syscall(SYS_fallocate, fd, mode, offset, len);
}


x86 assembly (clang, -O0):
<fallocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fallocate>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_fallocate = global i32 0
define i32 @fallocate(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @SYS_fallocate
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @syscall(i32 %9, i32 %10, i32 %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
@SYS_fallocate = global i32 0
define i32 @fallocate(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = load i32, i32* @SYS_fallocate
%6 = tail call i32 @syscall(i32 %5, i32 %0, i32 %1, i32 %2, i32 %3)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ output_genmidi(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  if (argc != 2) {
    printf("Usage: %s <output filename>\n", argv[0]);
    exit(-1);
  }
  output_genmidi(argv[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     116d <main+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <output_genmidi@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1143 <main+0x13>
mov    0x8(%rsi),%rdi
call   1030 <output_genmidi@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    (%rsi),%rsi
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"Usage: %s <output filename>\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = call i32 @exit(i32 -1)
unreachable
14: ; preds = %2
%15 = load i8**, i8*** %5
%16 = getelementptr inbounds i8*, i8** %15, i64 1
%17 = load i8*, i8** %16
%18 = call i32 @output_genmidi(i8* %17)
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"Usage: %s <output filename>\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @output_genmidi(i8* %10)
ret i32 0
}
int exchange(int *a, int *b) {
  int tmp;
  tmp = *b;
  *b = *a;
  *a = tmp;
  return 0;
}


x86 assembly (clang, -O0):
<exchange>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exchange>:
mov    (%rsi),%eax
mov    (%rdi),%ecx
mov    %ecx,(%rsi)
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @exchange(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = load i32*, i32** %4
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
store i32 %11, i32* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @exchange(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = load i32, i32* %0
store i32 %4, i32* %1
store i32 %3, i32* %0
ret i32 0
}
double check4(double x, double y) { return x * __builtin_copysign(x, y); }


x86 assembly (clang, -O0):
<check4>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
movaps 0xedc(%rip),%xmm3
pand   %xmm3,%xmm2
movaps 0xee1(%rip),%xmm3
pand   %xmm3,%xmm1
por    %xmm2,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<check4>:
andpd  0xef8(%rip),%xmm1
movapd 0xf00(%rip),%xmm2
andpd  %xmm0,%xmm2
orpd   %xmm1,%xmm2
mulsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @check4(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %3
%7 = load double, double* %4
%8 = call double @llvm.copysign.f64(double %6, double %7)
%9 = fmul double %5, %8
ret double %9
}

LLVM IR (-O2):
define double @check4(double %0, double %1) {
%3 = tail call double @llvm.copysign.f64(double %0, double %1)
%4 = fmul double %3, %0
ret double %4
}
/* Variables and functions */
scalar_t__ isdigit(char const);
extern bool sockIsIpAddress(const char *pString) {
  while (*pString != '\0') {
    if (!(*pString == '.' || isdigit(*pString))) {
      return false;
    }
    pString++;
  }
  return true;
}


x86 assembly (clang, -O0):
<sockIsIpAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     116f <sockIsIpAddress+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
je     115e <sockIsIpAddress+0x4e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
jne    115e <sockIsIpAddress+0x4e>
movl   $0x0,-0x4(%rbp)
jmp    1176 <sockIsIpAddress+0x66>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <sockIsIpAddress+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockIsIpAddress>:
push   %rbx
mov    %rdi,%rbx
jmp    1124 <sockIsIpAddress+0x14>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%rbx
movzbl (%rbx),%eax
cmp    $0x2e,%al
je     1120 <sockIsIpAddress+0x10>
test   %al,%al
je     1140 <sockIsIpAddress+0x30>
movsbl %al,%edi
call   1030 <isdigit@plt>
test   %rax,%rax
jne    1120 <sockIsIpAddress+0x10>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sockIsIpAddress(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %20, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 46
br i1 %13, label %20, label %14
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = call i64 @isdigit(i8 signext %16)
%18 = icmp ne i64 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %14
store i32 0, i32* %2
br label %24
20: ; preds = %14, %9
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %4
23: ; preds = %4
store i32 1, i32* %2
br label %24
24: ; preds = %23, %19
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @sockIsIpAddress(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %9, %8 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %10
i8 46, label %8
]
5: ; preds = %2
%6 = tail call i64 @isdigit(i8 signext %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %2, %5
%9 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
10: ; preds = %2, %5
%11 = phi i32 [ 0, %5 ], [ 1, %2 ]
ret i32 %11
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ setModule(int *, int, int, int);
void setModuleBounded(uint8_t qrcode[], int x, int y, bool isBlack) {
  int qrsize = qrcode[0];
  if (0 <= x && x < qrsize && 0 <= y && y < qrsize)
    setModule(qrcode, x, y, isBlack);
}


x86 assembly (clang, -O0):
<setModuleBounded>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0xc(%rbp),%eax
jg     116e <setModuleBounded+0x5e>
mov    -0xc(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    116e <setModuleBounded+0x5e>
xor    %eax,%eax
cmp    -0x10(%rbp),%eax
jg     116e <setModuleBounded+0x5e>
mov    -0x10(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    116e <setModuleBounded+0x5e>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <setModule@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setModuleBounded>:
test   %esi,%esi
js     1127 <setModuleBounded+0x17>
mov    (%rdi),%eax
cmp    %edx,%eax
jle    1127 <setModuleBounded+0x17>
test   %edx,%edx
js     1127 <setModuleBounded+0x17>
cmp    %esi,%eax
jle    1127 <setModuleBounded+0x17>
jmp    1030 <setModule@plt>
ret

LLVM IR (-O0):
define void @setModuleBounded(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
store i32 %12, i32* %9
%13 = load i32, i32* %6
%14 = icmp sle i32 0, %13
br i1 %14, label %15, label %32
15: ; preds = %4
%16 = load i32, i32* %6
%17 = load i32, i32* %9
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %32
19: ; preds = %15
%20 = load i32, i32* %7
%21 = icmp sle i32 0, %20
br i1 %21, label %22, label %32
22: ; preds = %19
%23 = load i32, i32* %7
%24 = load i32, i32* %9
%25 = icmp slt i32 %23, %24
br i1 %25, label %26, label %32
26: ; preds = %22
%27 = load i32*, i32** %5
%28 = load i32, i32* %6
%29 = load i32, i32* %7
%30 = load i32, i32* %8
%31 = call i32 @setModule(i32* %27, i32 %28, i32 %29, i32 %30)
br label %32
32: ; preds = %26, %22, %19, %15, %4
ret void
}

LLVM IR (-O2):
define void @setModuleBounded(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = load i32, i32* %0
%6 = icmp sgt i32 %1, -1
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = icmp sgt i32 %5, %1
%9 = icmp sgt i32 %2, -1
%10 = and i1 %9, %8
%11 = icmp sgt i32 %5, %2
%12 = and i1 %11, %10
br i1 %12, label %13, label %15
13: ; preds = %7
%14 = tail call i32 @setModule(i32* %0, i32 %1, i32 %2, i32 %3)
br label %15
15: ; preds = %13, %7, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int check_continue(char *buf) { return (!strcmp(buf, "continue\n")); }


x86 assembly (clang, -O0):
<check_continue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_continue>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"continue\0A\00"
define i32 @check_continue(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcmp(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@.str = [10 x i8] c"continue\0A\00"
define i32 @check_continue(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(10) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
float umath_float_abs(float value) { return value >= 0.0 ? value : (-value); }


x86 assembly (clang, -O0):
<umath_float_abs>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112e <umath_float_abs+0x2e>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1145 <umath_float_abs+0x45>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<umath_float_abs>:
movaps 0xef9(%rip),%xmm1
xorps  %xmm0,%xmm1
xorps  %xmm2,%xmm2
cmpless %xmm0,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @umath_float_abs(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load float, float* %2
br label %11
8: ; preds = %1
%9 = load float, float* %2
%10 = fneg float %9
br label %11
11: ; preds = %8, %6
%12 = phi float [ %7, %6 ], [ %10, %8 ]
ret float %12
}

LLVM IR (-O2):
define float @umath_float_abs(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %0, float %3
ret float %4
}
int operador(char opr) {
  if (opr == '+' || opr == '-' || opr == '*' || opr == '/') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<operador>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     113e <operador+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
je     113e <operador+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x2a,%eax
je     113e <operador+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x2f,%eax
jne    114a <operador+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <operador+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<operador>:
add    $0xd6,%dil
xor    %eax,%eax
cmp    $0x5,%dil
ja     111a <operador+0x1a>
movsbq %dil,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @operador(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 43
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 45
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 42
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 47
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i32 1, i32* %2
br label %21
20: ; preds = %15
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
@switch.table.operador = [6 x i32] [i32 1, i32 1, i32 0, i32 1, i32 0, i32 1]
define i32 @operador(i8 signext %0) {
%2 = add i8 %0, -42
%3 = icmp ult i8 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i8 %2 to i64
%6 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.operador, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Type definitions */
struct cp_token_cache {
  int dummy;
};

/* Variables and functions */
scalar_t__ ggc_test_and_set_mark(struct cp_token_cache *const);
void gt_ggc_mx_cp_token_cache(void *x_p) {
  struct cp_token_cache *const x = (struct cp_token_cache *)x_p;
  if (ggc_test_and_set_mark(x)) {
  }
}


x86 assembly (clang, -O0):
<gt_ggc_mx_cp_token_cache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ggc_test_and_set_mark@plt>
cmp    $0x0,%rax
je     113c <gt_ggc_mx_cp_token_cache+0x2c>
jmp    113c <gt_ggc_mx_cp_token_cache+0x2c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_ggc_mx_cp_token_cache>:
jmp    1030 <ggc_test_and_set_mark@plt>

LLVM IR (-O0):
%struct.cp_token_cache = type { i32 }
define void @gt_ggc_mx_cp_token_cache(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.cp_token_cache*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.cp_token_cache*
store %struct.cp_token_cache* %5, %struct.cp_token_cache** %3
%6 = load %struct.cp_token_cache*, %struct.cp_token_cache** %3
%7 = call i64 @ggc_test_and_set_mark(%struct.cp_token_cache* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %1
ret void
}

LLVM IR (-O2):
%struct.cp_token_cache = type { i32 }
define void @gt_ggc_mx_cp_token_cache(i8* %0) {
%2 = bitcast i8* %0 to %struct.cp_token_cache*
%3 = tail call i64 @ggc_test_and_set_mark(%struct.cp_token_cache* %2)
ret void
}
int ahc_patch0_func(struct ahc_softc *ahc) { return (0); }


x86 assembly (clang, -O0):
<ahc_patch0_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ahc_patch0_func>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ahc_softc = type opaque
define i32 @ahc_patch0_func(%struct.ahc_softc* %0) {
%2 = alloca %struct.ahc_softc*
store %struct.ahc_softc* %0, %struct.ahc_softc** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ahc_softc = type opaque
define i32 @ahc_patch0_func(%struct.ahc_softc* nocapture readnone %0) {
ret i32 0
}
void add_suites(void) {
  extern void _add_suite_tests_check_tests(void);
  _add_suite_tests_check_tests();
  ;
  extern void _add_suite_tests_hydrogen_tests(void);
  _add_suite_tests_hydrogen_tests();
  ;
  extern void _add_suite_tests_bug_tests(void);
  _add_suite_tests_bug_tests();
  ;
}


x86 assembly (clang, -O0):
<add_suites>:
push   %rbp
mov    %rsp,%rbp
call   1040 <_add_suite_tests_check_tests@plt>
call   1030 <_add_suite_tests_hydrogen_tests@plt>
call   1050 <_add_suite_tests_bug_tests@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_suites>:
push   %rax
call   1040 <_add_suite_tests_check_tests@plt>
call   1030 <_add_suite_tests_hydrogen_tests@plt>
pop    %rax
jmp    1050 <_add_suite_tests_bug_tests@plt>

LLVM IR (-O0):
define void @add_suites() {
ret void
}

LLVM IR (-O2):
define void @add_suites() {
tail call void @_add_suite_tests_check_tests()
tail call void @_add_suite_tests_hydrogen_tests()
tail call void @_add_suite_tests_bug_tests()
ret void
}
int HelpItem103(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem103>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem103>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem103() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem103() {
ret i32 0
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *initString(const char *src) {
  int length = strlen(src);
  char *dest;
  dest = malloc(length);
  strcpy(dest, src);
  return dest;
}


x86 assembly (clang, -O0):
<initString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initString>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @initString(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i8* @malloc(i32 %7)
store i8* %8, i8** %4
%9 = load i8*, i8** %4
%10 = load i8*, i8** %2
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %4
ret i8* %12
}

LLVM IR (-O2):
define i8* @initString(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i8* @malloc(i32 %2)
%4 = tail call i32 @strcpy(i8* %3, i8* %0)
ret i8* %3
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("Sample cli program.");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Sample cli program.\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str = [20 x i8] c"Sample cli program.\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ dwc_common_irq();
int /*<<< orphan*/ dwc_pcd_irq();
int dwc_otg_irq() {
  dwc_common_irq();
  dwc_pcd_irq();
  return 0;
}


x86 assembly (clang, -O0):
<dwc_otg_irq>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <dwc_common_irq@plt>
mov    $0x0,%al
call   1030 <dwc_pcd_irq@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dwc_otg_irq>:
push   %rax
xor    %eax,%eax
call   1040 <dwc_common_irq@plt>
xor    %eax,%eax
call   1030 <dwc_pcd_irq@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dwc_otg_irq() {
%1 = call i32 (...) @dwc_common_irq()
%2 = call i32 (...) @dwc_pcd_irq()
ret i32 0
}

LLVM IR (-O2):
define i32 @dwc_otg_irq() {
%1 = tail call i32 (...) @dwc_common_irq()
%2 = tail call i32 (...) @dwc_pcd_irq()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ itoa(int, char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  char s[20];
  int n = -123456789;
  itoa(n, s);
  printf("%s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xf8a432eb,-0x34(%rbp)
mov    -0x34(%rbp),%edi
lea    -0x30(%rbp),%rsi
call   1040 <itoa@plt>
lea    -0x30(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    $0xf8a432eb,%edi
mov    %rbx,%rsi
call   1040 <itoa@plt>
lea    0xec4(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [20 x i8]
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 -123456789, i32* %7
%8 = load i32, i32* %7
%9 = getelementptr inbounds [20 x i8], [20 x i8]* %6, i64 0, i64 0
%10 = call i32 @itoa(i32 %8, i8* %9)
%11 = getelementptr inbounds [20 x i8], [20 x i8]* %6, i64 0, i64 0
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [20 x i8]
%4 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%5 = call i32 @itoa(i32 -123456789, i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}
void foo824(int p) {}


x86 assembly (clang, -O0):
<foo824>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo824>:
ret

LLVM IR (-O0):
define void @foo824(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo824(i32 %0) {
ret void
}
void setInt24(unsigned char *array, int offset, unsigned int value) {
  array[offset + 0] = value >> 0;
  array[offset + 1] = value >> 8;
  array[offset + 2] = value >> 16;
}


x86 assembly (clang, -O0):
<setInt24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shr    $0x0,%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x0,%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
shr    $0x8,%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
shr    $0x10,%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x2,%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setInt24>:
movslq %esi,%rax
mov    %dl,(%rdi,%rax,1)
mov    %dh,0x1(%rdi,%rax,1)
shr    $0x10,%edx
mov    %dl,0x2(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @setInt24(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = lshr i32 %7, 0
%9 = trunc i32 %8 to i8
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = add nsw i32 %11, 0
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %10, i64 %13
store i8 %9, i8* %14
%15 = load i32, i32* %6
%16 = lshr i32 %15, 8
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %4
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %18, i64 %21
store i8 %17, i8* %22
%23 = load i32, i32* %6
%24 = lshr i32 %23, 16
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %4
%27 = load i32, i32* %5
%28 = add nsw i32 %27, 2
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i8, i8* %26, i64 %29
store i8 %25, i8* %30
ret void
}

LLVM IR (-O2):
define void @setInt24(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = trunc i32 %2 to i8
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 %4, i8* %6
%7 = lshr i32 %2, 8
%8 = trunc i32 %7 to i8
%9 = add nsw i32 %1, 1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
store i8 %8, i8* %11
%12 = lshr i32 %2, 16
%13 = trunc i32 %12 to i8
%14 = add nsw i32 %1, 2
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %0, i64 %15
store i8 %13, i8* %16
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fact(int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int no;
  scanf("%d", &no);
  printf("%ld", fact(no));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <fact@plt>
mov    %eax,%esi
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <fact@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%ld\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @fact(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%ld\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @fact(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(int *, int, int, int /*<<< orphan*/ *);
int read_blsize(FILE *f, int *size) { return fread(size, sizeof(int), 1, f); }


x86 assembly (clang, -O0):
<read_blsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_blsize>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x4,%esi
mov    $0x1,%edx
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i32 @read_blsize(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32*, i32** %3
%7 = call i32 @fread(i32* %5, i32 4, i32 1, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_blsize(i32* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fread(i32* %1, i32 4, i32 1, i32* %0)
ret i32 %3
}
int test_imm_E3int64_midword_reg(long long val) {
  return ((val >> 16) & (0xE3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E3int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xe3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E3int64_midword_reg>:
test   $0xe30000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E3int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 227
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E3int64_midword_reg(i64 %0) {
%2 = and i64 %0, 14876672
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void gtk_widget_unmap() {}


x86 assembly (clang, -O0):
<gtk_widget_unmap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_widget_unmap>:
ret

LLVM IR (-O0):
define void @gtk_widget_unmap() {
ret void
}

LLVM IR (-O2):
define void @gtk_widget_unmap() {
ret void
}
unsigned short crc16_add(unsigned char b, unsigned short acc) {
  acc ^= b;
  acc = (acc >> 8) | (acc << 8);
  acc ^= (acc & 0xff00) << 4;
  acc ^= (acc >> 8) >> 4;
  acc ^= (acc & 0xff00) >> 5;
  return acc;
}


x86 assembly (clang, -O0):
<crc16_add>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
movzbl -0x1(%rbp),%ecx
movzwl -0x4(%rbp),%eax
xor    %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
sar    $0x8,%eax
movzwl -0x4(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x4,%ecx
movzwl -0x4(%rbp),%eax
xor    %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%ecx
sar    $0x8,%ecx
sar    $0x4,%ecx
movzwl -0x4(%rbp),%eax
xor    %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x5,%ecx
movzwl -0x4(%rbp),%eax
xor    %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc16_add>:
xor    %esi,%edi
shrd   $0x8,%di,%si
mov    %esi,%eax
shl    $0x4,%eax
and    $0xfffff000,%eax
xor    %esi,%eax
movzwl %ax,%ecx
mov    %ecx,%edx
shr    $0xc,%edx
xor    %ecx,%edx
shr    $0x5,%eax
and    $0x7f8,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @crc16_add(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i16, i16* %4
%8 = zext i16 %7 to i32
%9 = xor i32 %8, %6
%10 = trunc i32 %9 to i16
store i16 %10, i16* %4
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = ashr i32 %12, 8
%14 = load i16, i16* %4
%15 = zext i16 %14 to i32
%16 = shl i32 %15, 8
%17 = or i32 %13, %16
%18 = trunc i32 %17 to i16
store i16 %18, i16* %4
%19 = load i16, i16* %4
%20 = zext i16 %19 to i32
%21 = and i32 %20, 65280
%22 = shl i32 %21, 4
%23 = load i16, i16* %4
%24 = zext i16 %23 to i32
%25 = xor i32 %24, %22
%26 = trunc i32 %25 to i16
store i16 %26, i16* %4
%27 = load i16, i16* %4
%28 = zext i16 %27 to i32
%29 = ashr i32 %28, 8
%30 = ashr i32 %29, 4
%31 = load i16, i16* %4
%32 = zext i16 %31 to i32
%33 = xor i32 %32, %30
%34 = trunc i32 %33 to i16
store i16 %34, i16* %4
%35 = load i16, i16* %4
%36 = zext i16 %35 to i32
%37 = and i32 %36, 65280
%38 = ashr i32 %37, 5
%39 = load i16, i16* %4
%40 = zext i16 %39 to i32
%41 = xor i32 %40, %38
%42 = trunc i32 %41 to i16
store i16 %42, i16* %4
%43 = load i16, i16* %4
ret i16 %43
}

LLVM IR (-O2):
define zeroext i16 @crc16_add(i8 zeroext %0, i16 zeroext %1) {
%3 = zext i8 %0 to i16
%4 = xor i16 %3, %1
%5 = tail call i16 @llvm.fshl.i16(i16 %4, i16 %1, i16 8)
%6 = shl i16 %5, 4
%7 = and i16 %6, -4096
%8 = xor i16 %7, %5
%9 = lshr i16 %8, 12
%10 = xor i16 %9, %8
%11 = lshr i16 %8, 5
%12 = and i16 %11, 2040
%13 = xor i16 %10, %12
ret i16 %13
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int errno;
int stat(char const *, struct stat *);
int __sulong_posix_stat(const char *path, struct stat *statbuf) {
  {
    int native_errno = errno;
    int result = stat(path, statbuf);
    if (result == (int)-1) {
      result = (int)(long)-errno;
    }
    errno = native_errno;
    return result;
  }
}


x86 assembly (clang, -O0):
<__sulong_posix_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stat@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0xffffffff,-0x18(%rbp)
jne    1156 <__sulong_posix_stat+0x46>
xor    %eax,%eax
mov    0x2e91(%rip),%rcx
sub    (%rcx),%eax
cltq
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%ecx
mov    0x2e80(%rip),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sulong_posix_stat>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <stat@plt>
xor    %ecx,%ecx
sub    (%rbx),%ecx
cmp    $0xffffffff,%eax
cmove  %ecx,%eax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@errno = global i32 0
define i32 @__sulong_posix_stat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%7 = load i32, i32* @errno
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = load %struct.stat*, %struct.stat** %4
%10 = call i32 @stat(i8* %8, %struct.stat* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %18
13: ; preds = %2
%14 = load i32, i32* @errno
%15 = sub nsw i32 0, %14
%16 = sext i32 %15 to i64
%17 = trunc i64 %16 to i32
store i32 %17, i32* %6
br label %18
18: ; preds = %13, %2
%19 = load i32, i32* %5
store i32 %19, i32* @errno
%20 = load i32, i32* %6
ret i32 %20
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@errno = global i32 0
define i32 @__sulong_posix_stat(i8* nocapture %0, %struct.stat* nocapture %1) {
%3 = load i32, i32* @errno
%4 = tail call i32 @stat(i8* %0, %struct.stat* %1)
%5 = icmp eq i32 %4, -1
%6 = load i32, i32* @errno
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 %4
store i32 %3, i32* @errno
ret i32 %8
}
intimx_ssi1_ac97_probe(struct platform_device *pdev) {
  int ret;
  return ret;
}


x86 assembly (clang, -O0):
<intimx_ssi1_ac97_probe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intimx_ssi1_ac97_probe>:
ret

LLVM IR (-O0):
%struct.platform_device = type opaque
define i32 @intimx_ssi1_ac97_probe(%struct.platform_device* %0) {
%2 = alloca %struct.platform_device*
%3 = alloca i32
store %struct.platform_device* %0, %struct.platform_device** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.platform_device = type opaque
define i32 @intimx_ssi1_ac97_probe(%struct.platform_device* nocapture readnone %0) {
ret i32 undef
}
int Operand_immrx4_decode(unsigned int *valp) {
  unsigned immrx4_0, r_0;
  r_0 = *valp & 0xf;
  immrx4_0 = ((((0xfffffff)) << 4) | r_0) << 2;
  *valp = immrx4_0;
  return 0;
}


x86 assembly (clang, -O0):
<Operand_immrx4_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xf,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     $0xfffffff0,%eax
shl    $0x2,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_immrx4_decode>:
mov    (%rdi),%eax
shl    $0x2,%eax
or     $0xffffffc0,%eax
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_immrx4_decode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = and i32 %6, 15
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = or i32 -16, %8
%10 = shl i32 %9, 2
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = load i32*, i32** %2
store i32 %11, i32* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_immrx4_decode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 2
%4 = or i32 %3, -64
store i32 %4, i32* %0
ret i32 0
}
/* Variables and functions */
int nvram_fset(char const *, char *);
int nvram_unset(const char *name) { return nvram_fset(name, ""); }


x86 assembly (clang, -O0):
<nvram_unset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <nvram_fset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvram_unset>:
lea    0xee9(%rip),%rsi
jmp    1030 <nvram_fset@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @nvram_unset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @nvram_fset(i8* %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @nvram_unset(i8* %0) {
%2 = tail call i32 @nvram_fset(i8* %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ STDERR_FILENO;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ print_error(char *);
int /*<<< orphan*/ strlen(char *);
int write(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int safe_output(char *msg) {
  if ((-1) == write(STDERR_FILENO, msg, strlen(msg))) {
    print_error("write");
    exit(EXIT_FAILURE);
  }
  return 1;
}


x86 assembly (clang, -O0):
<safe_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e8d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
call   1040 <write@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    %ecx,%eax
jne    11a0 <safe_output+0x60>
lea    0xe73(%rip),%rdi
call   1030 <print_error@plt>
mov    0x2e3f(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_output>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2e93(%rip),%rax
mov    (%rax),%ebp
call   1050 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1040 <write@plt>
cmp    $0xffffffff,%eax
je     1171 <safe_output+0x31>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
lea    0xe88(%rip),%rdi
call   1030 <print_error@plt>
mov    0x2e54(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@STDERR_FILENO = global i32 0
@.str = [6 x i8] c"write\00"
@EXIT_FAILURE = global i32 0
define i32 @safe_output(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @STDERR_FILENO
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = call i32 @write(i32 %3, i8* %4, i32 %6)
%8 = icmp eq i32 -1, %7
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = call i32 @print_error(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %1
ret i32 1
}

LLVM IR (-O2):
@STDERR_FILENO = global i32 0
@.str = [6 x i8] c"write\00"
@EXIT_FAILURE = global i32 0
define i32 @safe_output(i8* %0) {
%2 = load i32, i32* @STDERR_FILENO
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @write(i32 %2, i8* %0, i32 %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = tail call i32 @print_error(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
ret i32 1
}
__attribute__((no)) float bar(float a) { return a; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
ret

LLVM IR (-O0):
define float @bar(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @bar(float returned %0) {
ret float %0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int ct_lt_u64(int, int);
uint64_t ct_ge_u64(uint64_t x, uint64_t y) { return 1 ^ ct_lt_u64(x, y); }


x86 assembly (clang, -O0):
<ct_ge_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <ct_lt_u64@plt>
xor    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_ge_u64>:
push   %rax
call   1030 <ct_lt_u64@plt>
xor    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ct_ge_u64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ct_lt_u64(i32 %5, i32 %6)
%8 = xor i32 1, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @ct_ge_u64(i32 %0, i32 %1) {
%3 = tail call i32 @ct_lt_u64(i32 %0, i32 %1)
%4 = xor i32 %3, 1
ret i32 %4
}