xunge/DecIR huggingface dataset:
signed short scsi_id_to_refnum(int scsi_id) {
  return ~((signed short)scsi_id + 32);
}


x86 assembly (clang, -O0):
<scsi_id_to_refnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cwtl
add    $0x20,%eax
xor    $0xffffffff,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<scsi_id_to_refnum>:
mov    $0xffffffdf,%eax
sub    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @scsi_id_to_refnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i16
%5 = sext i16 %4 to i32
%6 = add nsw i32 %5, 32
%7 = xor i32 %6, -1
%8 = trunc i32 %7 to i16
ret i16 %8
}

LLVM IR (-O2):
define signext i16 @scsi_id_to_refnum(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = sub i16 -33, %2
ret i16 %3
}
/* Variables and functions */
float NAN;
float erff(float x) {
  (void)x;
  return NAN;
}


x86 assembly (clang, -O0):
<erff>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    0x2ee8(%rip),%rax
movss  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<erff>:
mov    0x2ef1(%rip),%rax
movss  (%rax),%xmm0
ret

LLVM IR (-O0):
@NAN = global float 0.000000e+00
define float @erff(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* @NAN
ret float %4
}

LLVM IR (-O2):
@NAN = global float 0.000000e+00
define float @erff(float %0) {
%2 = load float, float* @NAN
ret float %2
}
/* Variables and functions */
scalar_t__ bson_find_field(char *, char *, int);
int bson_find_field_as_double(char *buffer, char *field, double *data) {
  char *tmp = (char *)bson_find_field(buffer, field, 0x01);
  if (tmp) {
    *data = ((double *)tmp)[0];
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<bson_find_field_as_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <bson_find_field@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     1161 <bson_find_field_as_double+0x51>
mov    -0x28(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x20(%rbp),%rax
movsd  %xmm0,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1168 <bson_find_field_as_double+0x58>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bson_find_field_as_double>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    $0x1,%ebx
mov    $0x1,%edx
call   1030 <bson_find_field@plt>
test   %rax,%rax
je     1136 <bson_find_field_as_double+0x26>
movsd  (%rax),%xmm0
movsd  %xmm0,(%r14)
jmp    1138 <bson_find_field_as_double+0x28>
xor    %ebx,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @bson_find_field_as_double(i8* %0, i8* %1, double* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca double*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store double* %2, double** %7
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i64 @bson_find_field(i8* %9, i8* %10, i32 1)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %8
%13 = load i8*, i8** %8
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %21
15: ; preds = %3
%16 = load i8*, i8** %8
%17 = bitcast i8* %16 to double*
%18 = getelementptr inbounds double, double* %17, i64 0
%19 = load double, double* %18
%20 = load double*, double** %7
store double %19, double* %20
store i32 1, i32* %4
br label %22
21: ; preds = %3
store i32 0, i32* %4
br label %22
22: ; preds = %21, %15
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @bson_find_field_as_double(i8* %0, i8* %1, double* nocapture writeonly %2) {
%4 = tail call i64 @bson_find_field(i8* %0, i8* %1, i32 1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = inttoptr i64 %4 to double*
%8 = load double, double* %7
store double %8, double* %2
br label %9
9: ; preds = %3, %6
%10 = phi i32 [ 1, %6 ], [ 0, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ nls_load_codepage(char *, char *);
void c_codepage(char *v1, char *v2, void *t) { nls_load_codepage(v1, v2); }


x86 assembly (clang, -O0):
<c_codepage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <nls_load_codepage@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_codepage>:
jmp    1030 <nls_load_codepage@plt>

LLVM IR (-O0):
define void @c_codepage(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @nls_load_codepage(i8* %7, i8* %8)
ret void
}

LLVM IR (-O2):
define void @c_codepage(i8* %0, i8* %1, i8* nocapture readnone %2) {
%4 = tail call i32 @nls_load_codepage(i8* %0, i8* %1)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
uint32_t etna_smax(int32_t a, int32_t b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<etna_smax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <etna_smax+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <etna_smax+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<etna_smax>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @etna_smax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @etna_smax(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ log_msg(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, int);
void log_frameReceived(int packet, int frame) {
  char buffer[50];
  sprintf(buffer, "DAT: frame %d of packet %d received", frame, packet);
  log_msg(buffer);
}


x86 assembly (clang, -O0):
<log_frameReceived>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
lea    0xec1(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x40(%rbp),%rdi
call   1030 <log_msg@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_frameReceived>:
push   %rbx
sub    $0x40,%rsp
mov    %esi,%edx
mov    %edi,%ecx
lea    0xed0(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <log_msg@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"DAT: frame %d of packet %d received\00"
define void @log_frameReceived(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [50 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
%10 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%11 = call i32 @log_msg(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"DAT: frame %d of packet %d received\00"
define void @log_frameReceived(i32 %0, i32 %1) {
%3 = alloca [50 x i8]
%4 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%6 = call i32 @log_msg(i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ga_crossover();
int /*<<< orphan*/ ga_no_crossover();
int /*<<< orphan*/ hill_climber();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int main(void) {
  srand(time(NULL));
  hill_climber();
  ga_no_crossover();
  ga_crossover();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1070 <time@plt>
mov    %eax,%edi
call   1060 <srand@plt>
mov    $0x0,%al
call   1040 <hill_climber@plt>
mov    $0x0,%al
call   1050 <ga_no_crossover@plt>
mov    $0x0,%al
call   1030 <ga_crossover@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1070 <time@plt>
mov    %eax,%edi
call   1060 <srand@plt>
xor    %eax,%eax
call   1040 <hill_climber@plt>
xor    %eax,%eax
call   1050 <ga_no_crossover@plt>
xor    %eax,%eax
call   1030 <ga_crossover@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @time(i32* null)
%3 = call i32 @srand(i32 %2)
%4 = call i32 (...) @hill_climber()
%5 = call i32 (...) @ga_no_crossover()
%6 = call i32 (...) @ga_crossover()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @hill_climber()
%4 = tail call i32 (...) @ga_no_crossover()
%5 = tail call i32 (...) @ga_crossover()
ret i32 0
}
void bcm43xx_debugfs_exit(void) {}


x86 assembly (clang, -O0):
<bcm43xx_debugfs_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcm43xx_debugfs_exit>:
ret

LLVM IR (-O0):
define void @bcm43xx_debugfs_exit() {
ret void
}

LLVM IR (-O2):
define void @bcm43xx_debugfs_exit() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void h265sps_set_vps_id(uint8_t *p_h265sps, uint8_t i_vps_id) {
  p_h265sps[5] &= ~0xf0;
  p_h265sps[5] |= (i_vps_id << 4) & 0xf0;
}


x86 assembly (clang, -O0):
<h265sps_set_vps_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%ecx
and    $0xffffff0f,%ecx
mov    %ecx,0x14(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x4,%ecx
and    $0xf0,%ecx
mov    -0x8(%rbp),%rax
or     0x14(%rax),%ecx
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265sps_set_vps_id>:
mov    $0xffffff0f,%eax
and    0x14(%rdi),%eax
shl    $0x4,%esi
movzbl %sil,%ecx
or     %eax,%ecx
mov    %ecx,0x14(%rdi)
ret

LLVM IR (-O0):
define void @h265sps_set_vps_id(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 5
%7 = load i32, i32* %6
%8 = and i32 %7, -241
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = shl i32 %9, 4
%11 = and i32 %10, 240
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 5
%14 = load i32, i32* %13
%15 = or i32 %14, %11
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @h265sps_set_vps_id(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 5
%4 = load i32, i32* %3
%5 = and i32 %4, -241
%6 = shl i32 %1, 4
%7 = and i32 %6, 240
%8 = or i32 %5, %7
store i32 %8, i32* %3
ret void
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_add_tail(struct list_head *, struct list_head *);
int /*<<< orphan*/ list_del(struct list_head *);
void list_move_tail(struct list_head *list, struct list_head *head) {
  list_del(list);
  list_add_tail(list, head);
}


x86 assembly (clang, -O0):
<list_move_tail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <list_del@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <list_add_tail@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_move_tail>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <list_del@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <list_add_tail@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_move_tail(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %3
%6 = call i32 @list_del(%struct.list_head* %5)
%7 = load %struct.list_head*, %struct.list_head** %3
%8 = load %struct.list_head*, %struct.list_head** %4
%9 = call i32 @list_add_tail(%struct.list_head* %7, %struct.list_head* %8)
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_move_tail(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i32 @list_del(%struct.list_head* %0)
%4 = tail call i32 @list_add_tail(%struct.list_head* %0, %struct.list_head* %1)
ret void
}
/* Variables and functions */
int _findLower(int *, int, int);
int findLower(int *vector, int size) {
  int lastValue = vector[size - 1];
  return _findLower(vector, size, lastValue);
}


x86 assembly (clang, -O0):
<findLower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <_findLower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findLower>:
movslq %esi,%rsi
mov    -0x4(%rdi,%rsi,4),%edx
jmp    1030 <_findLower@plt>

LLVM IR (-O0):
define i32 @findLower(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %6, i64 %9
%11 = load i32, i32* %10
store i32 %11, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call i32 @_findLower(i32* %12, i32 %13, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @findLower(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = tail call i32 @_findLower(i32* %0, i32 %1, i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello world\n");
  printf("operating_system_structuredregistermurecursive_function_compiler\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
@.str.1 = [66 x i8] c"operating_system_structuredregistermurecursive_function_compiler\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello world\00"
@str.2 = [65 x i8] c"operating_system_structuredregistermurecursive_function_compiler\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([65 x i8], [65 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void writelines(char lines[][1000], int line_len) {
  int i;
  for (i = 0; i < line_len; i++) {
    printf("%s\n", lines[i]);
  }
}


x86 assembly (clang, -O0):
<writelines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115e <writelines+0x4e>
mov    -0x8(%rbp),%rsi
movslq -0x10(%rbp),%rax
imul   $0x3e8,%rax,%rax
add    %rax,%rsi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <writelines+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writelines>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1148 <writelines+0x38>
mov    %rdi,%rbx
mov    %esi,%r15d
lea    0xeda(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
add    $0x3e8,%rbx
add    $0xffffffffffffffff,%r15
jne    1130 <writelines+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @writelines([1000 x i8]* %0, i32 %1) {
%3 = alloca [1000 x i8]*
%4 = alloca i32
%5 = alloca i32
store [1000 x i8]* %0, [1000 x i8]** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load [1000 x i8]*, [1000 x i8]** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [1000 x i8], [1000 x i8]* %11, i64 %13
%15 = getelementptr inbounds [1000 x i8], [1000 x i8]* %14, i64 0, i64 0
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @writelines([1000 x i8]* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds [1000 x i8], [1000 x i8]* %0, i64 %7, i64 0
%9 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int int16_t;
typedef scalar_t__ hi;

/* Variables and functions */
int16_t s16le(unsigned char hi, unsigned char lo) {
  int sign = hi & (1 << 7);
  int v = (((int)(hi)&0x7f) << 8) | (int)lo;
  if (sign) {
    v = -0x8000 + v;
  }
  return v;
}


x86 assembly (clang, -O0):
<s16le>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x7f,%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1144 <s16le+0x44>
mov    -0xc(%rbp),%eax
add    $0xffff8000,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s16le>:
mov    %edi,%eax
and    $0x7f,%eax
shl    $0x8,%eax
lea    (%rax,%rsi,1),%ecx
test   $0x80,%dil
lea    -0x8000(%rax,%rsi,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @s16le(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%7 = load i8, i8* %3
%8 = zext i8 %7 to i32
%9 = and i32 %8, 128
store i32 %9, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = and i32 %11, 127
%13 = shl i32 %12, 8
%14 = load i8, i8* %4
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i32, i32* %5
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %2
%20 = load i32, i32* %6
%21 = add nsw i32 -32768, %20
store i32 %21, i32* %6
br label %22
22: ; preds = %19, %2
%23 = load i32, i32* %6
ret i32 %23
}

LLVM IR (-O2):
define i32 @s16le(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = and i32 %3, 128
%5 = shl nuw nsw i32 %3, 8
%6 = and i32 %5, 32512
%7 = zext i8 %1 to i32
%8 = or i32 %6, %7
%9 = icmp eq i32 %4, 0
%10 = or i32 %8, -32768
%11 = select i1 %9, i32 %8, i32 %10
ret i32 %11
}
int max(int valor1, int valor2) {
  if (valor1 > valor2)
    return valor1;
  else
    return valor2;
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1121 <max+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
#define DT_BLK 135
#define DT_CHR 134
#define DT_DIR 133
#define DT_FIFO 132
#define DT_LNK 131
#define DT_REG 130
#define DT_SOCK 129
#define DT_UNKNOWN 128
char parseType(unsigned char type) {
  switch (type) {
  case DT_REG:
    return '-';
  case DT_DIR:
    return 'd';
  case DT_LNK:
    return 'l';
  case DT_FIFO:
    return 'p';
  case DT_CHR:
    return 'c';
  case DT_SOCK:
    return 's';
  case DT_BLK:
    return 'b';
  case DT_UNKNOWN:
  default:
    return '?';
  }
}


x86 assembly (clang, -O0):
<parseType>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
add    $0xffffff80,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7,%eax
ja     1178 <parseType+0x78>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x2d,-0x1(%rbp)
jmp    117c <parseType+0x7c>
movb   $0x64,-0x1(%rbp)
jmp    117c <parseType+0x7c>
movb   $0x6c,-0x1(%rbp)
jmp    117c <parseType+0x7c>
movb   $0x70,-0x1(%rbp)
jmp    117c <parseType+0x7c>
movb   $0x63,-0x1(%rbp)
jmp    117c <parseType+0x7c>
movb   $0x73,-0x1(%rbp)
jmp    117c <parseType+0x7c>
movb   $0x62,-0x1(%rbp)
jmp    117c <parseType+0x7c>
jmp    1178 <parseType+0x78>
movb   $0x3f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseType>:
add    $0x7f,%dil
movzbl %dil,%eax
lea    0x0(,%rax,8),%ecx
movabs $0x626364706c2d73,%rdx
shr    %cl,%rdx
cmp    $0x7,%al
mov    $0x3f,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @parseType(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
switch i32 %5, label %14 [
i32 130, label %6
i32 133, label %7
i32 131, label %8
i32 132, label %9
i32 134, label %10
i32 129, label %11
i32 135, label %12
i32 128, label %13
]
6: ; preds = %1
store i8 45, i8* %2
br label %15
7: ; preds = %1
store i8 100, i8* %2
br label %15
8: ; preds = %1
store i8 108, i8* %2
br label %15
9: ; preds = %1
store i8 112, i8* %2
br label %15
10: ; preds = %1
store i8 99, i8* %2
br label %15
11: ; preds = %1
store i8 115, i8* %2
br label %15
12: ; preds = %1
store i8 98, i8* %2
br label %15
13: ; preds = %1
br label %14
14: ; preds = %1, %13
store i8 63, i8* %2
br label %15
15: ; preds = %14, %12, %11, %10, %9, %8, %7, %6
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @parseType(i8 zeroext %0) {
%2 = add i8 %0, 127
%3 = icmp ult i8 %2, 7
%4 = zext i8 %2 to i56
%5 = shl nuw nsw i56 %4, 3
%6 = lshr i56 27693830751661427, %5
%7 = trunc i56 %6 to i8
%8 = select i1 %3, i8 %7, i8 63
ret i8 %8
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int opt_paused(char *opt) {
  if (strcmp(opt, "-p") == 0)
    return 1;
  if (strcmp(opt, "--paused") == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<opt_paused>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1142 <opt_paused+0x32>
movl   $0x1,-0x4(%rbp)
jmp    116f <opt_paused+0x5f>
mov    -0x10(%rbp),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1168 <opt_paused+0x58>
movl   $0x1,-0x4(%rbp)
jmp    116f <opt_paused+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_paused>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     1141 <opt_paused+0x31>
lea    0xed7(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"-p\00"
@.str.1 = [9 x i8] c"--paused\00"
define i32 @opt_paused(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strcmp(i8* %9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %14
13: ; preds = %8
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [3 x i8] c"-p\00"
@.str.1 = [9 x i8] c"--paused\00"
define i32 @opt_paused(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void BSP_PeriodicTask_StopC(void) {
  (*((volatile uint32_t *)0x4004D024)) = 0x00000001;
  (*((volatile uint32_t *)0xE000E18C)) = 1 << 4;
}


x86 assembly (clang, -O0):
<BSP_PeriodicTask_StopC>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4004d024,%eax
movl   $0x1,(%rax)
mov    $0xe000e18c,%eax
movl   $0x10,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_PeriodicTask_StopC>:
movl   $0x1,0x4004d024
mov    $0xe000e18c,%eax
movl   $0x10,(%rax)
ret

LLVM IR (-O0):
define void @BSP_PeriodicTask_StopC() {
store volatile i32 1, i32* inttoptr (i64 1074057252 to i32*)
store volatile i32 16, i32* inttoptr (i64 3758154124 to i32*)
ret void
}

LLVM IR (-O2):
define void @BSP_PeriodicTask_StopC() {
store volatile i32 1, i32* inttoptr (i64 1074057252 to i32*)
store volatile i32 16, i32* inttoptr (i64 3758154124 to i32*)
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
float TempRawToFloat(uint16_t raw) {
  return ((float)raw * 0.0001f / 0.0075f) - 273;
}


x86 assembly (clang, -O0):
<TempRawToFloat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2ssq -0x8(%rbp),%xmm0
movss  0xef2(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xee2(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xed2(%rip),%xmm1
subss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<TempRawToFloat>:
cvtsi2ss %rdi,%xmm0
mulss  0xef3(%rip),%xmm0
divss  0xeef(%rip),%xmm0
addss  0xeeb(%rip),%xmm0
ret

LLVM IR (-O0):
define float @TempRawToFloat(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to float
%5 = fmul float %4, 0x3F1A36E2E0000000
%6 = fdiv float %5, 0x3F7EB851E0000000
%7 = fsub float %6, 2.730000e+02
ret float %7
}

LLVM IR (-O2):
define float @TempRawToFloat(i64 %0) {
%2 = sitofp i64 %0 to float
%3 = fmul float %2, 0x3F1A36E2E0000000
%4 = fdiv float %3, 0x3F7EB851E0000000
%5 = fadd float %4, -2.730000e+02
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ ENOMEM;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void *falloc_enomem(void) {
  fprintf(stderr, "falloc forcing ENOMEM\n");
  errno = ENOMEM;
  return NULL;
}


x86 assembly (clang, -O0):
<falloc_enomem>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%ecx
mov    0x2e97(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<falloc_enomem>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%eax
mov    0x2e9a(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"falloc forcing ENOMEM\0A\00"
@ENOMEM = global i32 0
@errno = global i32 0
define i8* @falloc_enomem() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @ENOMEM
store i32 %3, i32* @errno
ret i8* null
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"falloc forcing ENOMEM\0A\00"
@ENOMEM = global i32 0
@errno = global i32 0
define noalias i8* @falloc_enomem() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @ENOMEM
store i32 %3, i32* @errno
ret i8* null
}
__attribute__((always_)) void outsl(int port, const void *addr,
                                    unsigned long count) {
  __asm__ __volatile__("rep; outs"
                       "l"
                       : "+S"(addr), "+c"(count)
                       : "d"(port));
}


x86 assembly (clang, -O0):
<outsl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
rep outsl %ds:(%rsi),(%dx)
mov    %rsi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsl>:
mov    %rdx,%rcx
mov    %edi,%edx
rep outsl %ds:(%rsi),(%dx)
ret

LLVM IR (-O0):
define void @outsl(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* %4
%10 = call { i8*, i64 } asm sideeffect "rep; outsl", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %9, i8* %7, i64 %8)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @outsl(i32 %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep; outsl", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scripting_RunGC();
void Scripting_Idle() { scripting_RunGC(); }


x86 assembly (clang, -O0):
<Scripting_Idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <scripting_RunGC@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Scripting_Idle>:
xor    %eax,%eax
jmp    1030 <scripting_RunGC@plt>

LLVM IR (-O0):
define void @Scripting_Idle() {
%1 = call i32 (...) @scripting_RunGC()
ret void
}

LLVM IR (-O2):
define void @Scripting_Idle() {
%1 = tail call i32 (...) @scripting_RunGC()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void tty_Back() {
  char key;
  key = '\b';
  write(1, &key, 1);
  key = ' ';
  write(1, &key, 1);
  key = '\b';
  write(1, &key, 1);
}


x86 assembly (clang, -O0):
<tty_Back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x8,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
movb   $0x20,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
movb   $0x8,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_Back>:
push   %rbx
sub    $0x10,%rsp
movb   $0x8,0xf(%rsp)
lea    0xf(%rsp),%rbx
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
movb   $0x20,0xf(%rsp)
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
movb   $0x8,0xf(%rsp)
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @tty_Back() {
%1 = alloca i8
store i8 8, i8* %1
%2 = call i32 @write(i32 1, i8* %1, i32 1)
store i8 32, i8* %1
%3 = call i32 @write(i32 1, i8* %1, i32 1)
store i8 8, i8* %1
%4 = call i32 @write(i32 1, i8* %1, i32 1)
ret void
}

LLVM IR (-O2):
define void @tty_Back() {
%1 = alloca i8
store i8 8, i8* %1
%2 = call i32 @write(i32 1, i8* %1, i32 1)
store i8 32, i8* %1
%3 = call i32 @write(i32 1, i8* %1, i32 1)
store i8 8, i8* %1
%4 = call i32 @write(i32 1, i8* %1, i32 1)
ret void
}
/* Variables and functions */
int genieWriteObj(int, int, int);
int genieWriteInhLabelDefault(int index) {
  return genieWriteObj(41, index, -1);
}


x86 assembly (clang, -O0):
<genieWriteInhLabelDefault>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x29,%edi
mov    $0xffffffff,%edx
call   1030 <genieWriteObj@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genieWriteInhLabelDefault>:
mov    %edi,%esi
mov    $0x29,%edi
mov    $0xffffffff,%edx
jmp    1030 <genieWriteObj@plt>

LLVM IR (-O0):
define i32 @genieWriteInhLabelDefault(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @genieWriteObj(i32 41, i32 %3, i32 -1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @genieWriteInhLabelDefault(i32 %0) {
%2 = tail call i32 @genieWriteObj(i32 41, i32 %0, i32 -1)
ret i32 %2
}
void PrintEx() {}


x86 assembly (clang, -O0):
<PrintEx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintEx>:
ret

LLVM IR (-O0):
define void @PrintEx() {
ret void
}

LLVM IR (-O2):
define void @PrintEx() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char const *, char);
int is_valid_cbm_file_name(const char *name) {
  return strchr(name, ':') == NULL;
}


x86 assembly (clang, -O0):
<is_valid_cbm_file_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3a,%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_cbm_file_name>:
push   %rax
mov    $0x3a,%esi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_valid_cbm_file_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32* @strchr(i8* %3, i8 signext 58)
%5 = icmp eq i32* %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_valid_cbm_file_name(i8* %0) {
%2 = tail call i32* @strchr(i8* %0, i8 signext 58)
%3 = icmp eq i32* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
void ARGB1555ToYRow_Any_NEON() {}


x86 assembly (clang, -O0):
<ARGB1555ToYRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGB1555ToYRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @ARGB1555ToYRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @ARGB1555ToYRow_Any_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rs_decode_(int *, int *, int *, int *, int *);
void rs_decode__(int *recd0, int *era0, int *numera0, int *decoded, int *nerr) {
  rs_decode_(recd0, era0, numera0, decoded, nerr);
}


x86 assembly (clang, -O0):
<rs_decode__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <rs_decode_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rs_decode__>:
jmp    1030 <rs_decode_@plt>

LLVM IR (-O0):
define void @rs_decode__(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32*, i32** %6
%12 = load i32*, i32** %7
%13 = load i32*, i32** %8
%14 = load i32*, i32** %9
%15 = load i32*, i32** %10
%16 = call i32 @rs_decode_(i32* %11, i32* %12, i32* %13, i32* %14, i32* %15)
ret void
}

LLVM IR (-O2):
define void @rs_decode__(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = tail call i32 @rs_decode_(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ glob_t;

/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void globfree(glob_t *pglob) {
  (void)pglob;
  puts("globfree: not implemented");
}


x86 assembly (clang, -O0):
<globfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<globfree>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"globfree: not implemented\00"
define void @globfree(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @puts(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"globfree: not implemented\00"
define void @globfree(i32* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void gpx_end(FILE *out) { fprintf(out, "</gpx>\n"); }


x86 assembly (clang, -O0):
<gpx_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpx_end>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x7,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"</gpx>\0A\00"
define void @gpx_end(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"</gpx>\0A\00"
define void @gpx_end(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 7, i64 1, i32* %0)
ret void
}
double max(double x, double y) { return x < y ? y : x; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <max+0x31>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113b <max+0x3b>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %4
br label %12
10: ; preds = %2
%11 = load double, double* %3
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @max(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %1, double %0
ret double %4
}
void read_socket(int sockfd) {}


x86 assembly (clang, -O0):
<read_socket>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_socket>:
ret

LLVM IR (-O0):
define void @read_socket(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @read_socket(i32 %0) {
ret void
}
int is_terminator(c)
char c;
{
  if (isspace(c) || c == '(' || c == ')') {
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<is_terminator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <isspace@plt>
cmp    $0x0,%eax
jne    114a <is_terminator+0x3a>
movsbl -0x5(%rbp),%eax
cmp    $0x28,%eax
je     114a <is_terminator+0x3a>
movsbl -0x5(%rbp),%eax
cmp    $0x29,%eax
jne    1156 <is_terminator+0x46>
movl   $0x1,-0x4(%rbp)
jmp    115d <is_terminator+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_terminator>:
push   %rbx
mov    %edi,%ebx
movsbl %bl,%edi
call   1030 <isspace@plt>
test   %eax,%eax
setne  %al
and    $0xfe,%ebx
cmp    $0x28,%ebx
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_terminator(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = trunc i32 %0 to i8
store i8 %4, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = call i32 @isspace(i32 %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %17, label %9
9: ; preds = %1
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 40
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 41
br i1 %16, label %17, label %18
17: ; preds = %13, %9, %1
store i32 1, i32* %2
br label %19
18: ; preds = %13
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_terminator(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
%4 = tail call i32 @isspace(i32 %3)
%5 = icmp ne i32 %4, 0
%6 = and i32 %0, 254
%7 = icmp eq i32 %6, 40
%8 = or i1 %7, %5
%9 = zext i1 %8 to i32
ret i32 %9
}
int dns_cache_pollfd(struct dns_cache *cache) {
  (void)cache;
  return -1;
}


x86 assembly (clang, -O0):
<dns_cache_pollfd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_cache_pollfd>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.dns_cache = type opaque
define i32 @dns_cache_pollfd(%struct.dns_cache* %0) {
%2 = alloca %struct.dns_cache*
store %struct.dns_cache* %0, %struct.dns_cache** %2
%3 = load %struct.dns_cache*, %struct.dns_cache** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.dns_cache = type opaque
define i32 @dns_cache_pollfd(%struct.dns_cache* nocapture readnone %0) {
ret i32 -1
}
float chaine_rayon_max(float l1, float l2) { return l1 + l2; }


x86 assembly (clang, -O0):
<chaine_rayon_max>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaine_rayon_max>:
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @chaine_rayon_max(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fadd float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @chaine_rayon_max(float %0, float %1) {
%3 = fadd float %0, %1
ret float %3
}
void ath5k_debug_init(void) {}


x86 assembly (clang, -O0):
<ath5k_debug_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ath5k_debug_init>:
ret

LLVM IR (-O0):
define void @ath5k_debug_init() {
ret void
}

LLVM IR (-O2):
define void @ath5k_debug_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ADC1_ISR();
int /*<<< orphan*/ ADC2_ISR();
void ADC1_2_ISR(void) {
  ADC1_ISR();
  ADC2_ISR();
}


x86 assembly (clang, -O0):
<ADC1_2_ISR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ADC1_ISR@plt>
mov    $0x0,%al
call   1040 <ADC2_ISR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC1_2_ISR>:
push   %rax
xor    %eax,%eax
call   1030 <ADC1_ISR@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <ADC2_ISR@plt>

LLVM IR (-O0):
define void @ADC1_2_ISR() {
%1 = call i32 (...) @ADC1_ISR()
%2 = call i32 (...) @ADC2_ISR()
ret void
}

LLVM IR (-O2):
define void @ADC1_2_ISR() {
%1 = tail call i32 (...) @ADC1_ISR()
%2 = tail call i32 (...) @ADC2_ISR()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ranged_random_revmult_lazy(int /*<<< orphan*/);
void loop_revmult_lazy(size_t count, uint32_t range, uint32_t *output) {
  for (size_t i = 0; i < count; i++) {
    *output++ = ranged_random_revmult_lazy(range);
  }
}


x86 assembly (clang, -O0):
<loop_revmult_lazy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1165 <loop_revmult_lazy+0x55>
mov    -0xc(%rbp),%edi
call   1030 <ranged_random_revmult_lazy@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x18(%rbp)
mov    %ecx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112b <loop_revmult_lazy+0x1b>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop_revmult_lazy>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     1145 <loop_revmult_lazy+0x35>
mov    %rdx,%r14
mov    %esi,%r15d
mov    %rdi,%rbx
xor    %ebp,%ebp
nopw   0x0(%rax,%rax,1)
mov    %r15d,%edi
call   1030 <ranged_random_revmult_lazy@plt>
mov    %eax,(%r14,%rbp,4)
add    $0x1,%rbp
cmp    %rbp,%rbx
jne    1130 <loop_revmult_lazy+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @loop_revmult_lazy(i64 %0, i32 %1, i32* %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
store i64 %0, i64* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
store i64 0, i64* %7
br label %8
8: ; preds = %17, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %20
12: ; preds = %8
%13 = load i32, i32* %5
%14 = call i32 @ranged_random_revmult_lazy(i32 %13)
%15 = load i32*, i32** %6
%16 = getelementptr inbounds i32, i32* %15, i32 1
store i32* %16, i32** %6
store i32 %14, i32* %15
br label %17
17: ; preds = %12
%18 = load i64, i64* %7
%19 = add i64 %18, 1
store i64 %19, i64* %7
br label %8
20: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @loop_revmult_lazy(i64 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = icmp eq i64 %0, 0
br i1 %4, label %5, label %6
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i64 [ %11, %6 ], [ 0, %3 ]
%8 = phi i32* [ %10, %6 ], [ %2, %3 ]
%9 = tail call i32 @ranged_random_revmult_lazy(i32 %1)
%10 = getelementptr inbounds i32, i32* %8, i64 1
store i32 %9, i32* %8
%11 = add nuw i64 %7, 1
%12 = icmp eq i64 %11, %0
br i1 %12, label %5, label %6
}