xunge/DecIR huggingface dataset:
int test_imm_50int64_midword_reg(long long val) {
  return ((val >> 16) & (0x50 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_50int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x50,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_50int64_midword_reg>:
test   $0x500000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_50int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 80
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_50int64_midword_reg(i64 %0) {
%2 = and i64 %0, 5242880
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int scard_pcsc_check_wait_objs();
int scard_check_wait_objs(void) { return scard_pcsc_check_wait_objs(); }


x86 assembly (clang, -O0):
<scard_check_wait_objs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <scard_pcsc_check_wait_objs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scard_check_wait_objs>:
xor    %eax,%eax
jmp    1030 <scard_pcsc_check_wait_objs@plt>

LLVM IR (-O0):
define i32 @scard_check_wait_objs() {
%1 = call i32 (...) @scard_pcsc_check_wait_objs()
ret i32 %1
}

LLVM IR (-O2):
define i32 @scard_check_wait_objs() {
%1 = tail call i32 (...) @scard_pcsc_check_wait_objs()
ret i32 %1
}
/* Type definitions */
struct quat {
  int dummy;
};

/* Variables and functions */
int quat_is_zero(float *);
__attribute__((always_)) bool psquat_is_zero(struct quat *a) {
  return quat_is_zero((float *)a);
}


x86 assembly (clang, -O0):
<psquat_is_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <quat_is_zero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psquat_is_zero>:
jmp    1030 <quat_is_zero@plt>

LLVM IR (-O0):
%struct.quat = type { i32 }
define i32 @psquat_is_zero(%struct.quat* %0) {
%2 = alloca %struct.quat*
store %struct.quat* %0, %struct.quat** %2
%3 = load %struct.quat*, %struct.quat** %2
%4 = bitcast %struct.quat* %3 to float*
%5 = call i32 @quat_is_zero(float* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.quat = type { i32 }
define i32 @psquat_is_zero(%struct.quat* %0) {
%2 = bitcast %struct.quat* %0 to float*
%3 = tail call i32 @quat_is_zero(float* %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
void initialisiere_zufallszahlengenerator(void) { srand((unsigned)time(NULL)); }


x86 assembly (clang, -O0):
<initialisiere_zufallszahlengenerator>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialisiere_zufallszahlengenerator>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @initialisiere_zufallszahlengenerator() {
%1 = call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = call i32 @srand(i32 %2)
ret void
}

LLVM IR (-O2):
define void @initialisiere_zufallszahlengenerator() {
%1 = tail call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ s3c2440_nand_deselect_chip();
int /*<<< orphan*/ s3c2440_nand_select_chip();
int /*<<< orphan*/ s3c2440_wait_idle();
int /*<<< orphan*/ s3c2440_write_cmd(int);
void s3c2440_nand_reset(void) {
  s3c2440_nand_select_chip();
  s3c2440_write_cmd(0xff);
  s3c2440_wait_idle();
  s3c2440_nand_deselect_chip();
}


x86 assembly (clang, -O0):
<s3c2440_nand_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <s3c2440_nand_select_chip@plt>
mov    $0xff,%edi
call   1030 <s3c2440_write_cmd@plt>
mov    $0x0,%al
call   1060 <s3c2440_wait_idle@plt>
mov    $0x0,%al
call   1050 <s3c2440_nand_deselect_chip@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c2440_nand_reset>:
push   %rax
xor    %eax,%eax
call   1040 <s3c2440_nand_select_chip@plt>
mov    $0xff,%edi
call   1030 <s3c2440_write_cmd@plt>
xor    %eax,%eax
call   1060 <s3c2440_wait_idle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <s3c2440_nand_deselect_chip@plt>

LLVM IR (-O0):
define void @s3c2440_nand_reset() {
%1 = call i32 (...) @s3c2440_nand_select_chip()
%2 = call i32 @s3c2440_write_cmd(i32 255)
%3 = call i32 (...) @s3c2440_wait_idle()
%4 = call i32 (...) @s3c2440_nand_deselect_chip()
ret void
}

LLVM IR (-O2):
define void @s3c2440_nand_reset() {
%1 = tail call i32 (...) @s3c2440_nand_select_chip()
%2 = tail call i32 @s3c2440_write_cmd(i32 255)
%3 = tail call i32 (...) @s3c2440_wait_idle()
%4 = tail call i32 (...) @s3c2440_nand_deselect_chip()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __finite(double);
double __scalbn(double, int);
double __ldexp(double value, int exp) {
  if (!__finite(value) || value == 0.0)
    return value;
  value = __scalbn(value, exp);
  return value;
}


x86 assembly (clang, -O0):
<__ldexp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
movsd  -0x10(%rbp),%xmm0
movaps 0xee4(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  0xec8(%rip),%xmm1
ucomisd %xmm1,%xmm0
je     115a <__ldexp+0x4a>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1169 <__ldexp+0x59>
jp     1169 <__ldexp+0x59>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1185 <__ldexp+0x75>
movsd  -0x10(%rbp),%xmm0
mov    -0x14(%rbp),%edi
call   1030 <__scalbn@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ldexp>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    111c <__ldexp+0xc>
jnp    1137 <__ldexp+0x27>
movapd 0xedc(%rip),%xmm1
andpd  %xmm0,%xmm1
ucomisd 0xee0(%rip),%xmm1
je     1137 <__ldexp+0x27>
jmp    1030 <__scalbn@plt>
ret

LLVM IR (-O0):
define double @__ldexp(double %0, i32 %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %4
store i32 %1, i32* %5
%6 = load double, double* %4
%7 = call double @llvm.fabs.f64(double %6)
%8 = fcmp one double %7, 0x7FF0000000000000
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load double, double* %4
%11 = fcmp oeq double %10, 0.000000e+00
br i1 %11, label %12, label %14
12: ; preds = %9, %2
%13 = load double, double* %4
store double %13, double* %3
br label %19
14: ; preds = %9
%15 = load double, double* %4
%16 = load i32, i32* %5
%17 = call double @__scalbn(double %15, i32 %16)
store double %17, double* %4
%18 = load double, double* %4
store double %18, double* %3
br label %19
19: ; preds = %14, %12
%20 = load double, double* %3
ret double %20
}

LLVM IR (-O2):
define double @__ldexp(double %0, i32 %1) {
%3 = tail call double @llvm.fabs.f64(double %0)
%4 = fcmp ueq double %3, 0x7FF0000000000000
%5 = fcmp oeq double %0, 0.000000e+00
%6 = or i1 %5, %4
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call double @__scalbn(double %0, i32 %1)
br label %9
9: ; preds = %2, %7
%10 = phi double [ %8, %7 ], [ %0, %2 ]
ret double %10
}
__attribute__((no, optimize(0))) void aperiodic_release_empty(void *args) {}


x86 assembly (clang, -O0):
<aperiodic_release_empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<aperiodic_release_empty>:
ret

LLVM IR (-O0):
define void @aperiodic_release_empty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @aperiodic_release_empty(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ usleep(int);
void *printMessageFunction(void *data) {
  char *message;
  message = (char *)data;
  while (1) {
    printf("%s\n", message);
    usleep(1 * 1000);
  }
  printf("The thread that prints \"%s\" exited ...\n", message);
  return 0;
}


x86 assembly (clang, -O0):
<printMessageFunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3e8,%edi
call   1040 <usleep@plt>
jmp    1134 <printMessageFunction+0x14>

x86 assembly (clang, -O2):
<printMessageFunction>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xed2(%rip),%r14
xchg   %ax,%ax
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    $0x3e8,%edi
call   1040 <usleep@plt>
jmp    1130 <printMessageFunction+0x10>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i8* @printMessageFunction(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %1, %5
%6 = load i8*, i8** %3
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = call i32 @usleep(i32 1000)
br label %5
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define noalias i8* @printMessageFunction(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @usleep(i32 1000)
br label %2
}
void VMR3GetCpuCoreAndPackageIdFromCpuId(void) {}


x86 assembly (clang, -O0):
<VMR3GetCpuCoreAndPackageIdFromCpuId>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMR3GetCpuCoreAndPackageIdFromCpuId>:
ret

LLVM IR (-O0):
define void @VMR3GetCpuCoreAndPackageIdFromCpuId() {
ret void
}

LLVM IR (-O2):
define void @VMR3GetCpuCoreAndPackageIdFromCpuId() {
ret void
}
/* Variables and functions */
int ERR;
int getch();
int con_getch(void) {
  int i;
  while ((i = getch()) == ERR)
    ;
  return i;
}


x86 assembly (clang, -O0):
<con_getch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getch@plt>
mov    %eax,-0x4(%rbp)
mov    0x2ebf(%rip),%rcx
cmp    (%rcx),%eax
jne    1136 <con_getch+0x26>
jmp    1118 <con_getch+0x8>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<con_getch>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getch@plt>
cmp    (%rbx),%eax
je     1120 <con_getch+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@ERR = global i32 0
define i32 @con_getch() {
%1 = alloca i32
br label %2
2: ; preds = %6, %0
%3 = call i32 (...) @getch()
store i32 %3, i32* %1
%4 = load i32, i32* @ERR
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@ERR = global i32 0
define i32 @con_getch() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @getch()
%3 = load i32, i32* @ERR
%4 = icmp eq i32 %2, %3
br i1 %4, label %1, label %5
5: ; preds = %1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_array(int a[], int len) {
  for (int i = 0; i < len; i++) {
    printf("%d ", a[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <print_array+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_array+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <print_array+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print_array+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_array(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print_array(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
/* Variables and functions */
int /*<<< orphan*/ test_create();
int main() {
  test_create();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_create@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_create@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_create()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_create()
ret i32 0
}
void __isr_default() {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<__isr_default>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__isr_default+0x9>
jmp    1109 <__isr_default+0x9>

x86 assembly (clang, -O2):
<__isr_default>:
jmp    1100 <__isr_default>

LLVM IR (-O0):
define void @__isr_default() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @__isr_default() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
scalar_t__ hexadecimalNibble(char);
int hexadecimalInt(char *value) {
  int ret;
  for (ret = 0x00; *value; value++) {
    ret *= 0x10;
    ret += hexadecimalNibble(*value);
  }
  return ret;
}


x86 assembly (clang, -O0):
<hexadecimalInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1163 <hexadecimalInt+0x53>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <hexadecimalNibble@plt>
mov    %rax,%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1123 <hexadecimalInt+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexadecimalInt>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%cl
test   %cl,%cl
je     114c <hexadecimalInt+0x3c>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
shl    $0x4,%ebp
movsbl %cl,%edi
call   1030 <hexadecimalNibble@plt>
add    %ebp,%eax
movzbl (%rbx),%ecx
add    $0x1,%rbx
mov    %eax,%ebp
test   %cl,%cl
jne    1130 <hexadecimalInt+0x20>
jmp    114e <hexadecimalInt+0x3e>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @hexadecimalInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 16
store i32 %10, i32* %3
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = call i64 @hexadecimalNibble(i8 signext %12)
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = add nsw i64 %15, %13
%17 = trunc i64 %16 to i32
store i32 %17, i32* %3
br label %18
18: ; preds = %8
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @hexadecimalInt(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = shl nsw i32 %6, 4
%9 = tail call i64 @hexadecimalNibble(i8 signext %5)
%10 = trunc i64 %9 to i32
%11 = add i32 %8, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %16
}
/* Variables and functions */
char *do_big_dnum(double, int, int);
char *comma_dnum(double dnum, int decimal_digits) {
  extern int human_readable;
  return do_big_dnum(dnum, human_readable != 0, decimal_digits);
}


x86 assembly (clang, -O0):
<comma_dnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2eb4(%rip),%rax
cmpl   $0x0,(%rax)
setne  %al
and    $0x1,%al
movzbl %al,%edi
mov    -0xc(%rbp),%esi
call   1030 <do_big_dnum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comma_dnum>:
mov    %edi,%esi
mov    0x2ec7(%rip),%rax
xor    %edi,%edi
cmpl   $0x0,(%rax)
setne  %dil
jmp    1030 <do_big_dnum@plt>

LLVM IR (-O0):
@human_readable = external global i32
define i8* @comma_dnum(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* @human_readable
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
%9 = load i32, i32* %4
%10 = call i8* @do_big_dnum(double %5, i32 %8, i32 %9)
ret i8* %10
}

LLVM IR (-O2):
@human_readable = external global i32
define i8* @comma_dnum(double %0, i32 %1) {
%3 = load i32, i32* @human_readable
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i8* @do_big_dnum(double %0, i32 %5, i32 %1)
ret i8* %6
}
int rank(int square) { return square >> 3; }


x86 assembly (clang, -O0):
<rank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rank>:
mov    %edi,%eax
sar    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @rank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 3
ret i32 %4
}

LLVM IR (-O2):
define i32 @rank(i32 %0) {
%2 = ashr i32 %0, 3
ret i32 %2
}
void rec(int x, int y) {
  if (x <= 23 && x >= -42) {
    rec(2 * y - 2, x + 1);
  }
}


x86 assembly (clang, -O0):
<rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x17,-0x4(%rbp)
jg     1146 <rec+0x36>
cmpl   $0xffffffd6,-0x4(%rbp)
jl     1146 <rec+0x36>
mov    -0x8(%rbp),%edi
shl    $0x1,%edi
sub    $0x2,%edi
mov    -0x4(%rbp),%esi
add    $0x1,%esi
call   1030 <rec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rec>:
lea    0x2a(%rdi),%eax
cmp    $0x41,%eax
ja     1128 <rec+0x28>
nopl   0x0(%rax,%rax,1)
lea    (%rsi,%rsi,1),%eax
add    $0xfffffffe,%eax
add    $0x1,%edi
lea    (%rsi,%rsi,1),%ecx
add    $0x28,%ecx
mov    %edi,%esi
mov    %eax,%edi
cmp    $0x42,%ecx
jb     1110 <rec+0x10>
ret

LLVM IR (-O0):
define void @rec(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 23
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, -42
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %4
%12 = mul nsw i32 2, %11
%13 = sub nsw i32 %12, 2
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
br label %16
16: ; preds = %10, %7, %2
ret void
}

LLVM IR (-O2):
define void @rec(i32 %0, i32 %1) {
%3 = add i32 %0, 42
%4 = icmp ult i32 %3, 66
br i1 %4, label %5, label %13
5: ; preds = %2, %5
%6 = phi i32 [ %10, %5 ], [ %1, %2 ]
%7 = phi i32 [ %9, %5 ], [ %0, %2 ]
%8 = shl nsw i32 %6, 1
%9 = add nsw i32 %8, -2
%10 = add nsw i32 %7, 1
%11 = add i32 %8, 40
%12 = icmp ult i32 %11, 66
br i1 %12, label %5, label %13
13: ; preds = %5, %2
ret void
}
/* Variables and functions */
double pow(double, int);
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *);
int main(void) {
  double a;
  double n = 3.14159;
  double area;
  scanf("%lf", &a);
  area = n * pow(a, 2);
  printf("A=%.4lf\n", area);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xeb9(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
lea    0xeb5(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    $0x2,%edi
call   1050 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
lea    0xe7a(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed0(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm0
mov    $0x2,%edi
call   1050 <pow@plt>
mulsd  0xea9(%rip),%xmm0
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca double
store i32 0, i32* %1
store double 3.141590e+00, double* %3
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%6 = load double, double* %3
%7 = load double, double* %2
%8 = call double @pow(double %7, i32 2)
%9 = fmul double %6, %8
store double %9, double* %4
%10 = load double, double* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%4 = load double, double* %1
%5 = call double @pow(double %4, i32 2)
%6 = fmul double %5, 3.141590e+00
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %6)
ret i32 0
}
int cad_tamanho(char s[]) {
  if (s[0] == '\0')
    return 0;
  else
    return 1 + cad_tamanho(s + 1);
}


x86 assembly (clang, -O0):
<cad_tamanho>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1138 <cad_tamanho+0x28>
movl   $0x0,-0x4(%rbp)
jmp    114b <cad_tamanho+0x3b>
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1030 <cad_tamanho@plt>
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cad_tamanho>:
cmpb   $0x0,(%rdi)
je     111c <cad_tamanho+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <cad_tamanho+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cad_tamanho(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %15
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = call i32 @cad_tamanho(i8* %12)
%14 = add nsw i32 1, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %10, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @cad_tamanho(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %0, %1 ]
%6 = phi i32 [ %8, %4 ], [ 0, %1 ]
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = add nuw nsw i32 %6, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x95() {
  Assert_real((isdigit(149) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              750, ("isdigit should be 0 for 0x95"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x95>:
push   %rbp
mov    %rsp,%rbp
mov    $0x95,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2ee,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x95>:
push   %rax
mov    $0x95,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2ee,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x95\00"
define void @t_isdigit_0x95() {
%1 = call i64 @isdigit(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x95\00"
define void @t_isdigit_0x95() {
%1 = tail call i64 @isdigit(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_9Euint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x9E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Euint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x9e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Euint64_lowword_reg>:
test   $0x9e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Euint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 158
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_9Euint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 158
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ XSizeHints;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XSizeHints(void *_p) {
  if (_p == NULL)
    abort();
  free((XSizeHints *)_p);
}


x86 assembly (clang, -O0):
<free_XSizeHints>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XSizeHints+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XSizeHints>:
test   %rdi,%rdi
je     112a <free_XSizeHints+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XSizeHints(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XSizeHints(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint64_t read_pmc(uint32_t ecx) { return 0; }


x86 assembly (clang, -O0):
<read_pmc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_pmc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @read_pmc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @read_pmc(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main_fini1() {
  printf("main_fini1"
         "\n");
}


x86 assembly (clang, -O0):
<main_fini1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_fini1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"main_fini1\0A\00"
define void @main_fini1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"main_fini1\00"
define void @main_fini1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tml_dr_vAdd1(double, double *, int);
int /*<<< orphan*/ tml_dr_vCopy(double const *, double *, int);
int /*<<< orphan*/ tml_dr_vMpy1(double, double *, int);
void tml_dr_vNormalize(const double *src, double *dst, int n, double offset,
                       double factor) {
  tml_dr_vCopy(src, dst, n);
  tml_dr_vAdd1(-offset, dst, n);
  tml_dr_vMpy1((double)(1 / factor), dst, n);
}


x86 assembly (clang, -O0):
<tml_dr_vNormalize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <tml_dr_vCopy@plt>
movsd  -0x20(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <tml_dr_vAdd1@plt>
movsd  0xe73(%rip),%xmm0
divsd  -0x28(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1050 <tml_dr_vMpy1@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tml_dr_vNormalize>:
push   %rbp
push   %rbx
sub    $0x28,%rsp
movsd  %xmm1,0x8(%rsp)
movaps %xmm0,0x10(%rsp)
mov    %edx,%ebp
mov    %rsi,%rbx
call   1030 <tml_dr_vCopy@plt>
movaps 0x10(%rsp),%xmm0
xorps  0xea9(%rip),%xmm0
mov    %rbx,%rdi
mov    %ebp,%esi
call   1040 <tml_dr_vAdd1@plt>
movsd  0xea7(%rip),%xmm0
divsd  0x8(%rsp),%xmm0
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x28,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <tml_dr_vMpy1@plt>

LLVM IR (-O0):
define void @tml_dr_vNormalize(double* %0, double* %1, i32 %2, double %3, double %4) {
%6 = alloca double*
%7 = alloca double*
%8 = alloca i32
%9 = alloca double
%10 = alloca double
store double* %0, double** %6
store double* %1, double** %7
store i32 %2, i32* %8
store double %3, double* %9
store double %4, double* %10
%11 = load double*, double** %6
%12 = load double*, double** %7
%13 = load i32, i32* %8
%14 = call i32 @tml_dr_vCopy(double* %11, double* %12, i32 %13)
%15 = load double, double* %9
%16 = fneg double %15
%17 = load double*, double** %7
%18 = load i32, i32* %8
%19 = call i32 @tml_dr_vAdd1(double %16, double* %17, i32 %18)
%20 = load double, double* %10
%21 = fdiv double 1.000000e+00, %20
%22 = load double*, double** %7
%23 = load i32, i32* %8
%24 = call i32 @tml_dr_vMpy1(double %21, double* %22, i32 %23)
ret void
}

LLVM IR (-O2):
define void @tml_dr_vNormalize(double* %0, double* %1, i32 %2, double %3, double %4) {
%6 = tail call i32 @tml_dr_vCopy(double* %0, double* %1, i32 %2)
%7 = fneg double %3
%8 = tail call i32 @tml_dr_vAdd1(double %7, double* %1, i32 %2)
%9 = fdiv double 1.000000e+00, %4
%10 = tail call i32 @tml_dr_vMpy1(double %9, double* %1, i32 %2)
ret void
}
/* Type definitions */
struct user_regs_struct {
  int /*<<< orphan*/ rdi;
};
typedef int /*<<< orphan*/ register_t;
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ ptrace_getregs(int /*<<< orphan*/,
                                  struct user_regs_struct *);
register_t get_arg_from_regs(pid_t pid) {
  struct user_regs_struct regs;
  ptrace_getregs(pid, &regs);
  return regs.rdi;
}


x86 assembly (clang, -O0):
<get_arg_from_regs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1030 <ptrace_getregs@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_arg_from_regs>:
push   %rax
mov    %rsp,%rsi
call   1030 <ptrace_getregs@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.user_regs_struct = type { i32 }
define i32 @get_arg_from_regs(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.user_regs_struct
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @ptrace_getregs(i32 %4, %struct.user_regs_struct* %3)
%6 = getelementptr inbounds %struct.user_regs_struct, %struct.user_regs_struct* %3, i32 0, i32 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.user_regs_struct = type { i32 }
define i32 @get_arg_from_regs(i32 %0) {
%2 = alloca %struct.user_regs_struct
%3 = bitcast %struct.user_regs_struct* %2 to i8*
%4 = call i32 @ptrace_getregs(i32 %0, %struct.user_regs_struct* %2)
%5 = getelementptr inbounds %struct.user_regs_struct, %struct.user_regs_struct* %2, i64 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int8_t buffer_resolverKeyboardToCLI(void) { return 0; }


x86 assembly (clang, -O0):
<buffer_resolverKeyboardToCLI>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_resolverKeyboardToCLI>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @buffer_resolverKeyboardToCLI() {
ret i32 0
}

LLVM IR (-O2):
define i32 @buffer_resolverKeyboardToCLI() {
ret i32 0
}
void amdgpu_mn_unlock(struct amdgpu_mn *mn) {}


x86 assembly (clang, -O0):
<amdgpu_mn_unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<amdgpu_mn_unlock>:
ret

LLVM IR (-O0):
%struct.amdgpu_mn = type opaque
define void @amdgpu_mn_unlock(%struct.amdgpu_mn* %0) {
%2 = alloca %struct.amdgpu_mn*
store %struct.amdgpu_mn* %0, %struct.amdgpu_mn** %2
ret void
}

LLVM IR (-O2):
%struct.amdgpu_mn = type opaque
define void @amdgpu_mn_unlock(%struct.amdgpu_mn* nocapture %0) {
ret void
}
void XkbAllocGeomDoodads() {}


x86 assembly (clang, -O0):
<XkbAllocGeomDoodads>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbAllocGeomDoodads>:
ret

LLVM IR (-O0):
define void @XkbAllocGeomDoodads() {
ret void
}

LLVM IR (-O2):
define void @XkbAllocGeomDoodads() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ printf(char *, char const *, char *);
char *strerror(int /*<<< orphan*/);
void perror(const char *s) { printf("%s: %s", s, strerror(errno)); }


x86 assembly (clang, -O0):
<perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
mov    -0x10(%rbp),%rsi
mov    %rax,%rdx
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perror>:
push   %rbx
mov    %rdi,%rbx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
lea    0xec7(%rip),%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s: %s\00"
@errno = global i32 0
define void @perror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @errno
%5 = call i8* @strerror(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s: %s\00"
@errno = global i32 0
define void @perror(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i8* @strerror(i32 %2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %3)
ret void
}
void chalEnd2CHALEND() {}


x86 assembly (clang, -O0):
<chalEnd2CHALEND>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chalEnd2CHALEND>:
ret

LLVM IR (-O0):
define void @chalEnd2CHALEND() {
ret void
}

LLVM IR (-O2):
define void @chalEnd2CHALEND() {
ret void
}
void bitset_unset(unsigned char *bitset, unsigned long bit) {
  bitset[bit >> 3] &= ~(1 << (bit & 0x07));
}


x86 assembly (clang, -O0):
<bitset_unset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7,%rax
mov    %eax,%ecx
mov    $0x1,%esi
shl    %cl,%esi
xor    $0xffffffff,%esi
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x3,%rcx
movzbl (%rax,%rcx,1),%edx
and    %esi,%edx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitset_unset>:
mov    %rsi,%rcx
mov    $0xfe,%al
rol    %cl,%al
shr    $0x3,%rcx
and    %al,(%rdi,%rcx,1)
ret

LLVM IR (-O0):
define void @bitset_unset(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 7
%7 = trunc i64 %6 to i32
%8 = shl i32 1, %7
%9 = xor i32 %8, -1
%10 = load i8*, i8** %3
%11 = load i64, i64* %4
%12 = lshr i64 %11, 3
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = and i32 %15, %9
%17 = trunc i32 %16 to i8
store i8 %17, i8* %13
ret void
}

LLVM IR (-O2):
define void @bitset_unset(i8* nocapture %0, i64 %1) {
%3 = trunc i64 %1 to i8
%4 = and i8 %3, 7
%5 = shl nuw i8 1, %4
%6 = xor i8 %5, -1
%7 = lshr i64 %1, 3
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = and i8 %9, %6
store i8 %10, i8* %8
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR46_get(void) { return U_WMRCORENONE_get("U_WMR46"); }


x86 assembly (clang, -O0):
<U_WMR46_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR46_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR46\00"
define i32 @U_WMR46_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR46\00"
define i32 @U_WMR46_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
int MINUS(int M, int N) {
  int output = 0;
  if (M < N)
    goto quit0;
  {
    int ctr1;
    for (ctr1 = (M + 1); ctr1 > 0; ctr1--) {
      if ((output + N) == M)
        goto abort1;
      output = (output + 1);
    }
  }
abort1:
quit0:
  return output;
}


x86 assembly (clang, -O0):
<MINUS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1122 <MINUS+0x22>
jmp    116a <MINUS+0x6a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1160 <MINUS+0x60>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jne    1149 <MINUS+0x49>
jmp    1165 <MINUS+0x65>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    112b <MINUS+0x2b>
jmp    1165 <MINUS+0x65>
jmp    116a <MINUS+0x6a>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MINUS>:
xor    %eax,%eax
cmp    %esi,%edi
jl     1135 <MINUS+0x35>
test   %edi,%edi
js     1135 <MINUS+0x35>
cmp    %edi,%esi
je     1135 <MINUS+0x35>
lea    0x1(%rdi),%eax
test   %eax,%eax
mov    $0x1,%ecx
mov    $0x1,%edx
cmovle %eax,%edx
sub    %edx,%eax
not    %esi
add    %edi,%esi
cmp    %eax,%esi
cmovae %eax,%esi
add    $0x1,%esi
test   %eax,%eax
cmove  %ecx,%esi
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @MINUS(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %2
br label %32
11: ; preds = %2
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %6
br label %14
14: ; preds = %27, %11
%15 = load i32, i32* %6
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %30
17: ; preds = %14
%18 = load i32, i32* %5
%19 = load i32, i32* %4
%20 = add nsw i32 %18, %19
%21 = load i32, i32* %3
%22 = icmp eq i32 %20, %21
br i1 %22, label %23, label %24
23: ; preds = %17
br label %31
24: ; preds = %17
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 1
store i32 %26, i32* %5
br label %27
27: ; preds = %24
%28 = load i32, i32* %6
%29 = add nsw i32 %28, -1
store i32 %29, i32* %6
br label %14
30: ; preds = %14
br label %31
31: ; preds = %30, %23
br label %32
32: ; preds = %31, %10
%33 = load i32, i32* %5
ret i32 %33
}

LLVM IR (-O2):
define i32 @MINUS(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %18, label %4
4: ; preds = %2
%5 = add i32 %0, 1
%6 = icmp slt i32 %0, 0
%7 = icmp eq i32 %1, %0
%8 = or i1 %6, %7
br i1 %8, label %18, label %9
9: ; preds = %4
%10 = call i32 @llvm.smin.i32(i32 %5, i32 1)
%11 = sub i32 %5, %10
%12 = xor i32 %1, -1
%13 = add i32 %12, %0
%14 = icmp eq i32 %11, 0
%15 = call i32 @llvm.umin.i32(i32 %13, i32 %11)
%16 = add i32 %15, 1
%17 = select i1 %14, i32 1, i32 %16
br label %18
18: ; preds = %9, %4, %2
%19 = phi i32 [ 0, %2 ], [ 0, %4 ], [ %17, %9 ]
ret i32 %19
}
double SparseCompRow_num_flops(int N, int nz, int num_iterations) {
  int actual_nz = (nz / N) * N;
  return ((double)actual_nz) * 2.0 * ((double)num_iterations);
}


x86 assembly (clang, -O0):
<SparseCompRow_num_flops>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0x4(%rbp)
imul   -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
cvtsi2sdl -0x10(%rbp),%xmm0
movsd  0xed8(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SparseCompRow_num_flops>:
mov    %edx,%ecx
mov    %esi,%eax
cltd
idiv   %edi
sub    %edx,%esi
cvtsi2sd %esi,%xmm1
addsd  %xmm1,%xmm1
cvtsi2sd %ecx,%xmm0
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @SparseCompRow_num_flops(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = sdiv i32 %8, %9
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = sitofp i32 %13 to double
%15 = fmul double %14, 2.000000e+00
%16 = load i32, i32* %6
%17 = sitofp i32 %16 to double
%18 = fmul double %15, %17
ret double %18
}

LLVM IR (-O2):
define double @SparseCompRow_num_flops(i32 %0, i32 %1, i32 %2) {
%4 = srem i32 %1, %0
%5 = sub i32 %1, %4
%6 = sitofp i32 %5 to double
%7 = fmul double %6, 2.000000e+00
%8 = sitofp i32 %2 to double
%9 = fmul double %7, %8
ret double %9
}
void dummySendString(const char *pcBuffer) {}


x86 assembly (clang, -O0):
<dummySendString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummySendString>:
ret

LLVM IR (-O0):
define void @dummySendString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @dummySendString(i8* nocapture %0) {
ret void
}
int iso_zisofs_set_params(struct iso_zisofs_ctrl *params, int flag) {
  return 0xE830FEA7;
}


x86 assembly (clang, -O0):
<iso_zisofs_set_params>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xe830fea7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso_zisofs_set_params>:
mov    $0xe830fea7,%eax
ret

LLVM IR (-O0):
%struct.iso_zisofs_ctrl = type opaque
define i32 @iso_zisofs_set_params(%struct.iso_zisofs_ctrl* %0, i32 %1) {
%3 = alloca %struct.iso_zisofs_ctrl*
%4 = alloca i32
store %struct.iso_zisofs_ctrl* %0, %struct.iso_zisofs_ctrl** %3
store i32 %1, i32* %4
ret i32 -399442265
}

LLVM IR (-O2):
%struct.iso_zisofs_ctrl = type opaque
define i32 @iso_zisofs_set_params(%struct.iso_zisofs_ctrl* nocapture readnone %0, i32 %1) {
ret i32 -399442265
}
/* Variables and functions */
int /*<<< orphan*/ f_first();
int /*<<< orphan*/ test_safe();
void f_later() {
  f_first();
  test_safe();
}


x86 assembly (clang, -O0):
<f_later>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <f_first@plt>
mov    $0x0,%al
call   1030 <test_safe@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_later>:
push   %rax
xor    %eax,%eax
call   1040 <f_first@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_safe@plt>

LLVM IR (-O0):
define void @f_later() {
%1 = call i32 (...) @f_first()
%2 = call i32 (...) @test_safe()
ret void
}

LLVM IR (-O2):
define void @f_later() {
%1 = tail call i32 (...) @f_first()
%2 = tail call i32 (...) @test_safe()
ret void
}
OP(dd, ba) { op_ba(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_ba@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_ba@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_ba()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_ba()
ret i32 undef
}
int main() {
  int array[] = {1, 2, 3};
  int *ptr = array;
  return array[2];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0xeee(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xeec(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
@__const.main.array = [3 x i32] [i32 1, i32 2, i32 3]
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
%3 = alloca i32*
store i32 0, i32* %1
%4 = bitcast [3 x i32]* %2 to i8*
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
store i32* %5, i32** %3
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 2
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
ret i32 3
}