xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
int /*<<< orphan*/ pgp_hton32(int /*<<< orphan*/);
unsigned fmt_32(uint8_t *p, uint32_t a) {
  a = pgp_hton32(a);
  memcpy(p, &a, sizeof(a));
  return sizeof(a);
}


x86 assembly (clang, -O0):
<fmt_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <pgp_hton32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    $0x4,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <pgp_hton32@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    $0x4,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fmt_32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @pgp_hton32(i32 %5)
store i32 %6, i32* %4
%7 = load i32*, i32** %3
%8 = call i32 @memcpy(i32* %7, i32* %4, i32 4)
ret i32 4
}

LLVM IR (-O2):
define i32 @fmt_32(i32* %0, i32 %1) {
%3 = alloca i32
%4 = tail call i32 @pgp_hton32(i32 %1)
store i32 %4, i32* %3
%5 = call i32 @memcpy(i32* %0, i32* %3, i32 4)
ret i32 4
}
/* Variables and functions */
double deg_rad(double);
double mercator_x(double lon) { return 6378137.0 * deg_rad(lon); }


x86 assembly (clang, -O0):
<mercator_x>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <deg_rad@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mercator_x>:
push   %rax
call   1030 <deg_rad@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @mercator_x(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @deg_rad(double %3)
%5 = fmul double 0x415854A640000000, %4
ret double %5
}

LLVM IR (-O2):
define double @mercator_x(double %0) {
%2 = tail call double @deg_rad(double %0)
%3 = fmul double %2, 0x415854A640000000
ret double %3
}
/* Type definitions */
struct _reent {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void _free_r(struct _reent *ptr, void *addr) { free(addr); }


x86 assembly (clang, -O0):
<_free_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_free_r>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct._reent = type { i32 }
define void @_free_r(%struct._reent* %0, i8* %1) {
%3 = alloca %struct._reent*
%4 = alloca i8*
store %struct._reent* %0, %struct._reent** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
%struct._reent = type { i32 }
define void @_free_r(%struct._reent* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int func(int id) {
  if (id) {
    printf("I'm the parent\n");
    return 1;
  } else {
    printf("I'm the child\n");
    return 0;
  }
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     113d <func+0x2d>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    1150 <func+0x40>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
push   %rbx
xor    %ebx,%ebx
test   %edi,%edi
setne  %bl
lea    0xee1(%rip),%rax
lea    0xee8(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"I'm the parent\0A\00"
@.str.1 = [15 x i8] c"I'm the child\0A\00"
define i32 @func(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %2
br label %10
8: ; preds = %1
%9 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
store i32 0, i32* %2
br label %10
10: ; preds = %8, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@str = [14 x i8] c"I'm the child\00"
@str.2 = [15 x i8] c"I'm the parent\00"
define i32 @func(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @str.2, i64 0, i64 0)
%4 = xor i1 %2, true
%5 = zext i1 %4 to i32
%6 = tail call i32 @puts(i8* dereferenceable(1) %3)
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef scalar_t__ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint16_t h2o_absprio_urgency_to_chromium_weight(uint8_t urgency) {
  uint16_t weight;
  assert(urgency < 8);
  const float ksteps = 255.9f / (float)(8 - 1);
  weight = (uint16_t)(ksteps * ((8 - 1) - urgency)) + 1;
  return weight;
}


x86 assembly (clang, -O0):
<h2o_absprio_urgency_to_chromium_weight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x8,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movss  0xecc(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    $0x7,%eax
sub    -0x4(%rbp),%eax
cvtsi2ss %eax,%xmm1
movss  0xeb3(%rip),%xmm0
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_absprio_urgency_to_chromium_weight>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x8,%ebx
setl   %dil
call   1030 <assert@plt>
mov    $0x7,%eax
sub    %ebx,%eax
cvtsi2ss %eax,%xmm0
mulss  0xecc(%rip),%xmm0
cvttss2si %xmm0,%rax
add    $0x1,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @h2o_absprio_urgency_to_chromium_weight(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca float
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 8
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
store float 0x4042475060000000, float* %4
%9 = load i32, i32* %2
%10 = sub nsw i32 7, %9
%11 = sitofp i32 %10 to float
%12 = fmul float 0x4042475060000000, %11
%13 = fptosi float %12 to i64
%14 = add nsw i64 %13, 1
store i64 %14, i64* %3
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @h2o_absprio_urgency_to_chromium_weight(i32 %0) {
%2 = icmp slt i32 %0, 8
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = sub nsw i32 7, %0
%6 = sitofp i32 %5 to float
%7 = fmul float %6, 0x4042475060000000
%8 = fptosi float %7 to i64
%9 = add nsw i64 %8, 1
ret i64 %9
}
void macputs(s) char *s;
{ macprintf("%s\n", s); }


x86 assembly (clang, -O0):
<macputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <macprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<macputs>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
xor    %eax,%eax
jmp    1030 <macprintf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @macputs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @macprintf to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @macputs(i8* %0) {
%2 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @macprintf to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(char);
void uart_print_str(char *p) {
  while (*p != 0) {
    uart_putc(*p);
    p++;
  }
}


x86 assembly (clang, -O0):
<uart_print_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1149 <uart_print_str+0x39>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <uart_putc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <uart_print_str+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_print_str>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <uart_print_str+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <uart_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <uart_print_str+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @uart_print_str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i32 @uart_putc(i8 signext %10)
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @uart_print_str(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @uart_putc(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Type definitions */
struct geometry_struct {
  int dummy;
};

/* Variables and functions */
int cone_overlaps_sphere(struct geometry_struct *, struct geometry_struct *);
int sphere_overlaps_cone(struct geometry_struct *geometry_sph,
                         struct geometry_struct *geometry_cone) {
  return cone_overlaps_sphere(geometry_cone, geometry_sph);
}


x86 assembly (clang, -O0):
<sphere_overlaps_cone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <cone_overlaps_sphere@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sphere_overlaps_cone>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <cone_overlaps_sphere@plt>

LLVM IR (-O0):
%struct.geometry_struct = type { i32 }
define i32 @sphere_overlaps_cone(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = alloca %struct.geometry_struct*
%4 = alloca %struct.geometry_struct*
store %struct.geometry_struct* %0, %struct.geometry_struct** %3
store %struct.geometry_struct* %1, %struct.geometry_struct** %4
%5 = load %struct.geometry_struct*, %struct.geometry_struct** %4
%6 = load %struct.geometry_struct*, %struct.geometry_struct** %3
%7 = call i32 @cone_overlaps_sphere(%struct.geometry_struct* %5, %struct.geometry_struct* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.geometry_struct = type { i32 }
define i32 @sphere_overlaps_cone(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = tail call i32 @cone_overlaps_sphere(%struct.geometry_struct* %1, %struct.geometry_struct* %0)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int tm_hour;
  int tm_min;
  int tm_sec;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, int, int, int);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void ttime_1(void) {
  struct tm *t;
  time_t now;
  time(&now);
  t = localtime(&now);
  printf("It is now %d:%02d:%02d\n", t->tm_hour, t->tm_min, t->tm_sec);
}


x86 assembly (clang, -O0):
<ttime_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0xc(%rbp),%rdi
call   1050 <time@plt>
lea    -0xc(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ttime_1>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1050 <time@plt>
mov    %rbx,%rdi
call   1030 <localtime@plt>
mov    (%rax),%esi
mov    0x4(%rax),%edx
mov    0x8(%rax),%ecx
lea    0xea7(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32, i32, i32 }
@.str = [24 x i8] c"It is now %d:%02d:%02d\0A\00"
define void @ttime_1() {
%1 = alloca %struct.tm*
%2 = alloca i32
%3 = call i32 @time(i32* %2)
%4 = call %struct.tm* @localtime(i32* %2)
store %struct.tm* %4, %struct.tm** %1
%5 = load %struct.tm*, %struct.tm** %1
%6 = getelementptr inbounds %struct.tm, %struct.tm* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = load %struct.tm*, %struct.tm** %1
%9 = getelementptr inbounds %struct.tm, %struct.tm* %8, i32 0, i32 1
%10 = load i32, i32* %9
%11 = load %struct.tm*, %struct.tm** %1
%12 = getelementptr inbounds %struct.tm, %struct.tm* %11, i32 0, i32 2
%13 = load i32, i32* %12
%14 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %10, i32 %13)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32, i32, i32 }
@.str = [24 x i8] c"It is now %d:%02d:%02d\0A\00"
define void @ttime_1() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @time(i32* %1)
%4 = call %struct.tm* @localtime(i32* %1)
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 0
%6 = load i32, i32* %5
%7 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 1
%8 = load i32, i32* %7
%9 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 2
%10 = load i32, i32* %9
%11 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %8, i32 %10)
ret void
}
/* Variables and functions */
scalar_t__ isPrime(int);
void secvential() {
  int i;
  for (i = 0; i <= 1500000; i++) {
    if (isPrime(i)) {
    }
  }
}


x86 assembly (clang, -O0):
<secvential>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x16e360,-0x4(%rbp)
jg     1156 <secvential+0x46>
mov    -0x4(%rbp),%edi
call   1030 <isPrime@plt>
cmp    $0x0,%rax
je     1143 <secvential+0x33>
jmp    1143 <secvential+0x33>
jmp    1148 <secvential+0x38>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <secvential+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<secvential>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <isPrime@plt>
add    $0x1,%ebx
cmp    $0x16e361,%ebx
jne    1120 <secvential+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @secvential() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %11, %0
%3 = load i32, i32* %1
%4 = icmp sle i32 %3, 1500000
br i1 %4, label %5, label %14
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i64 @isPrime(i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %10
10: ; preds = %9, %5
br label %11
11: ; preds = %10
%12 = load i32, i32* %1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %1
br label %2
14: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @secvential() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i64 @isPrime(i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 1500001
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
int ti_edecay_start(double const *options) {
  (void)options;
  return 0;
}


x86 assembly (clang, -O0):
<ti_edecay_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_edecay_start>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ti_edecay_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ti_edecay_start(double* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef scalar_t__ __u8;

/* Variables and functions */
int modGT256(__u8 x, __u8 y) {
  __u8 z;
  z = y + (__u8)0x80;
  if (z > y)
    return ((x > y) && (x <= z));
  else
    return ((x > y) || (x <= z));
}


x86 assembly (clang, -O0):
<modGT256>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x80,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jle    1159 <modGT256+0x59>
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
cmp    -0x18(%rbp),%rcx
mov    %al,-0x21(%rbp)
jle    1149 <modGT256+0x49>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
setle  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1185 <modGT256+0x85>
mov    -0x10(%rbp),%rcx
mov    $0x1,%al
cmp    -0x18(%rbp),%rcx
mov    %al,-0x22(%rbp)
jg     117a <modGT256+0x7a>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
setle  %al
mov    %al,-0x22(%rbp)
mov    -0x22(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modGT256>:
cmp    %rsi,%rdi
setg   %al
sub    $0xffffffffffffff80,%rsi
cmp    %rdi,%rsi
setge  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @modGT256(i64 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = add nsw i64 %7, 128
store i64 %8, i64* %6
%9 = load i64, i64* %6
%10 = load i64, i64* %5
%11 = icmp sgt i64 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %2
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = icmp sgt i64 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i64, i64* %4
%18 = load i64, i64* %6
%19 = icmp sle i64 %17, %18
br label %20
20: ; preds = %16, %12
%21 = phi i1 [ false, %12 ], [ %19, %16 ]
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %34
23: ; preds = %2
%24 = load i64, i64* %4
%25 = load i64, i64* %5
%26 = icmp sgt i64 %24, %25
br i1 %26, label %31, label %27
27: ; preds = %23
%28 = load i64, i64* %4
%29 = load i64, i64* %6
%30 = icmp sle i64 %28, %29
br label %31
31: ; preds = %27, %23
%32 = phi i1 [ true, %23 ], [ %30, %27 ]
%33 = zext i1 %32 to i32
store i32 %33, i32* %3
br label %34
34: ; preds = %31, %20
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @modGT256(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = add nsw i64 %1, 128
%5 = icmp sge i64 %4, %0
%6 = select i1 %3, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
void chaz_ConfWriterPerl_vappend_conf(const char *fmt, va_list args) {
  (void)fmt;
  (void)args;
}


x86 assembly (clang, -O0):
<chaz_ConfWriterPerl_vappend_conf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_ConfWriterPerl_vappend_conf>:
ret

LLVM IR (-O0):
define void @chaz_ConfWriterPerl_vappend_conf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @chaz_ConfWriterPerl_vappend_conf(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delete_channel_t(void *);
void free_channel_list_handler(void *ptr) { delete_channel_t(ptr); }


x86 assembly (clang, -O0):
<free_channel_list_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <delete_channel_t@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_channel_list_handler>:
jmp    1030 <delete_channel_t@plt>

LLVM IR (-O0):
define void @free_channel_list_handler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @delete_channel_t(i8* %3)
ret void
}

LLVM IR (-O2):
define void @free_channel_list_handler(i8* %0) {
%2 = tail call i32 @delete_channel_t(i8* %0)
ret void
}
long long maxi(long long a, long long b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<maxi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <maxi+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <maxi+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxi>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @maxi(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @maxi(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ fd_log_at(char *, int /*<<< orphan*/, char *);
void fd_log(char *message) { fd_log_at("fd_log", 0, message); }


x86 assembly (clang, -O0):
<fd_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
xor    %esi,%esi
call   1030 <fd_log_at@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_log>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
xor    %esi,%esi
jmp    1030 <fd_log_at@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"fd_log\00"
define void @fd_log(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fd_log_at(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 0, i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"fd_log\00"
define void @fd_log(i8* %0) {
%2 = tail call i32 @fd_log_at(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 0, i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ITEM;

/* Variables and functions */
int /*<<< orphan*/ init(int /*<<< orphan*/ **, int /*<<< orphan*/ **,
                        char const **, int);
int /*<<< orphan*/ main_loop();
int main(int argc, const char **argv) {
  ITEM *a[argc], *b[argc];
  init(a, b, argv + 1, argc - 1);
  main_loop();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
lea    0xf(,%rax,8),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
lea    0xf(,%rax,8),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rsi
sub    %rcx,%rsi
mov    %rsi,%rsp
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdx
add    $0x8,%rdx
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
call   1030 <init@plt>
mov    $0x0,%al
call   1040 <main_loop@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,%eax
mov    %rsp,%r8
lea    0xf(,%rax,8),%rcx
and    $0xfffffffffffffff0,%rcx
sub    %rcx,%r8
mov    %r8,%rsp
mov    %rsp,%rax
sub    %rcx,%rax
mov    %rax,%rsp
lea    0x8(%rsi),%rdx
lea    -0x1(%rdi),%ecx
mov    %r8,%rdi
mov    %rax,%rsi
call   1030 <init@plt>
xor    %eax,%eax
call   1040 <main_loop@plt>
xor    %eax,%eax
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = call i8* @llvm.stacksave()
store i8* %11, i8** %6
%12 = alloca i32*, i64 %10
store i64 %10, i64* %7
%13 = load i32, i32* %4
%14 = zext i32 %13 to i64
%15 = alloca i32*, i64 %14
store i64 %14, i64* %8
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i64 1
%18 = load i32, i32* %4
%19 = sub nsw i32 %18, 1
%20 = call i32 @init(i32** %12, i32** %15, i8** %17, i32 %19)
%21 = call i32 (...) @main_loop()
store i32 0, i32* %3
%22 = load i8*, i8** %6
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = zext i32 %0 to i64
%4 = alloca i32*, i64 %3
%5 = alloca i32*, i64 %3
%6 = getelementptr inbounds i8*, i8** %1, i64 1
%7 = add nsw i32 %0, -1
%8 = call i32 @init(i32** %4, i32** %5, i8** %6, i32 %7)
%9 = call i32 (...) @main_loop()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ urt_shmem_detach(void *);
void urt_shmem_delete(void *mem) { urt_shmem_detach(mem); }


x86 assembly (clang, -O0):
<urt_shmem_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <urt_shmem_detach@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<urt_shmem_delete>:
jmp    1030 <urt_shmem_detach@plt>

LLVM IR (-O0):
define void @urt_shmem_delete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @urt_shmem_detach(i8* %3)
ret void
}

LLVM IR (-O2):
define void @urt_shmem_delete(i8* %0) {
%2 = tail call i32 @urt_shmem_detach(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void fun1(int a) { printf("Value of a is %d\n", a); }


x86 assembly (clang, -O0):
<fun1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Value of a is %d\0A\00"
define void @fun1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Value of a is %d\0A\00"
define void @fun1(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int abs(int);
int ABS(int a) { return abs(a); }


x86 assembly (clang, -O0):
<ABS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <abs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ABS>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @ABS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @abs(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ABS(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
void PROXY_CERT_INFO_EXTENSION_free(void) {}


x86 assembly (clang, -O0):
<PROXY_CERT_INFO_EXTENSION_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PROXY_CERT_INFO_EXTENSION_free>:
ret

LLVM IR (-O0):
define void @PROXY_CERT_INFO_EXTENSION_free() {
ret void
}

LLVM IR (-O2):
define void @PROXY_CERT_INFO_EXTENSION_free() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WriteByte(int, int, int);
void Mag_init() { WriteByte(0x1E, 0x02, 0x00); }


x86 assembly (clang, -O0):
<Mag_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e,%edi
mov    $0x2,%esi
xor    %edx,%edx
call   1030 <WriteByte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mag_init>:
mov    $0x1e,%edi
mov    $0x2,%esi
xor    %edx,%edx
jmp    1030 <WriteByte@plt>

LLVM IR (-O0):
define void @Mag_init() {
%1 = call i32 @WriteByte(i32 30, i32 2, i32 0)
ret void
}

LLVM IR (-O2):
define void @Mag_init() {
%1 = tail call i32 @WriteByte(i32 30, i32 2, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bad_mem();
void *malloc(unsigned int);
void *xmalloc(unsigned int size) {
  void *ret = malloc(size);
  if (ret == NULL)
    bad_mem();
  return ret;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1149 <xmalloc+0x29>
mov    $0x0,%al
call   1030 <bad_mem@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <xmalloc+0x15>
xor    %eax,%eax
call   1030 <bad_mem@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xmalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @bad_mem()
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @xmalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @bad_mem()
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ igt_set_timeout(int, char *);
int /*<<< orphan*/ sleep(int);
void __real_main4(void) {
  igt_set_timeout(1, "Testcase");
  sleep(5);
}


x86 assembly (clang, -O0):
<__real_main4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xed0(%rip),%rsi
call   1030 <igt_set_timeout@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__real_main4>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x1,%edi
call   1030 <igt_set_timeout@plt>
mov    $0x5,%edi
pop    %rax
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Testcase\00"
define void @__real_main4() {
%1 = call i32 @igt_set_timeout(i32 1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @sleep(i32 5)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"Testcase\00"
define void @__real_main4() {
%1 = tail call i32 @igt_set_timeout(i32 1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @sleep(i32 5)
ret void
}
__attribute__((always_)) int
pci_iov_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type) {
  return 0;
}


x86 assembly (clang, -O0):
<pci_iov_resource_bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_iov_resource_bar>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define i32 @pci_iov_resource_bar(%struct.pci_dev* %0, i32 %1, i32* %2) {
%4 = alloca %struct.pci_dev*
%5 = alloca i32
%6 = alloca i32*
store %struct.pci_dev* %0, %struct.pci_dev** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
ret i32 0
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define i32 @pci_iov_resource_bar(%struct.pci_dev* nocapture readnone %0, i32 %1, i32* nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t samples_to_nibbles(uint32_t samples) {
  uint32_t nibbles = samples / 14 * 16;
  if (samples % 14)
    nibbles += 2 + samples % 14;
  return nibbles;
}


x86 assembly (clang, -O0):
<samples_to_nibbles>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xe,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xe,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1142 <samples_to_nibbles+0x42>
mov    -0x4(%rbp),%eax
mov    $0xe,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x2,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<samples_to_nibbles>:
movslq %edi,%rcx
imul   $0xffffffff92492493,%rcx,%rax
shr    $0x20,%rax
add    %ecx,%eax
mov    %eax,%edx
shr    $0x1f,%edx
sar    $0x3,%eax
add    %edx,%eax
mov    %eax,%edx
shl    $0x4,%edx
mov    %eax,%esi
sub    %edx,%esi
add    %eax,%esi
lea    (%rcx,%rsi,1),%eax
add    $0x2,%eax
add    %esi,%ecx
cmove  %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @samples_to_nibbles(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 14
%6 = mul nsw i32 %5, 16
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = srem i32 %7, 14
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 14
%13 = add nsw i32 2, %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
br label %16
16: ; preds = %10, %1
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @samples_to_nibbles(i32 %0) {
%2 = sdiv i32 %0, 14
%3 = shl nsw i32 %2, 4
%4 = srem i32 %0, 14
%5 = icmp eq i32 %4, 0
%6 = add nsw i32 %4, 2
%7 = select i1 %5, i32 0, i32 %6
%8 = add nsw i32 %7, %3
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ isupper(int);
void uninitvar_isupper(void) {
  int i;
  (void)isupper(i);
}


x86 assembly (clang, -O0):
<uninitvar_isupper>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_isupper>:
ret

LLVM IR (-O0):
define void @uninitvar_isupper() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = call i32 @isupper(i32 %2)
ret void
}

LLVM IR (-O2):
define void @uninitvar_isupper() {
ret void
}
/* Variables and functions */
int tst_ark_entry(int, char **);
int main(int argc, char **argv) { return tst_ark_entry(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <tst_ark_entry@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <tst_ark_entry@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @tst_ark_entry(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @tst_ark_entry(i32 %0, i8** %1)
ret i32 %3
}
void test_04(int tab[], int index, int val) { tab[index + 1] = val; }


x86 assembly (clang, -O0):
<test_04>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_04>:
movslq %esi,%rax
mov    %edx,0x4(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @test_04(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
store i32 %7, i32* %12
ret void
}

LLVM IR (-O2):
define void @test_04(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, 1
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %2, i32* %6
ret void
}
/* Type definitions */
struct surface {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_arc_handles(struct surface *);
int /*<<< orphan*/ free_circle_handles(struct surface *);
int /*<<< orphan*/ free_cycle_handles(struct surface *);
int /*<<< orphan*/ free_edge_handles(struct surface *);
int /*<<< orphan*/ free_face_handles(struct surface *);
int /*<<< orphan*/ free_vertex_handles(struct surface *);
void clear_pqms(struct surface *srf) {
  free_cycle_handles(srf);
  free_vertex_handles(srf);
  free_arc_handles(srf);
  free_edge_handles(srf);
  free_circle_handles(srf);
  free_face_handles(srf);
}


x86 assembly (clang, -O0):
<clear_pqms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1080 <free_cycle_handles@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free_vertex_handles@plt>
mov    -0x8(%rbp),%rdi
call   1040 <free_arc_handles@plt>
mov    -0x8(%rbp),%rdi
call   1050 <free_edge_handles@plt>
mov    -0x8(%rbp),%rdi
call   1070 <free_circle_handles@plt>
mov    -0x8(%rbp),%rdi
call   1060 <free_face_handles@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_pqms>:
push   %rbx
mov    %rdi,%rbx
call   1080 <free_cycle_handles@plt>
mov    %rbx,%rdi
call   1030 <free_vertex_handles@plt>
mov    %rbx,%rdi
call   1040 <free_arc_handles@plt>
mov    %rbx,%rdi
call   1050 <free_edge_handles@plt>
mov    %rbx,%rdi
call   1070 <free_circle_handles@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1060 <free_face_handles@plt>

LLVM IR (-O0):
%struct.surface = type { i32 }
define void @clear_pqms(%struct.surface* %0) {
%2 = alloca %struct.surface*
store %struct.surface* %0, %struct.surface** %2
%3 = load %struct.surface*, %struct.surface** %2
%4 = call i32 @free_cycle_handles(%struct.surface* %3)
%5 = load %struct.surface*, %struct.surface** %2
%6 = call i32 @free_vertex_handles(%struct.surface* %5)
%7 = load %struct.surface*, %struct.surface** %2
%8 = call i32 @free_arc_handles(%struct.surface* %7)
%9 = load %struct.surface*, %struct.surface** %2
%10 = call i32 @free_edge_handles(%struct.surface* %9)
%11 = load %struct.surface*, %struct.surface** %2
%12 = call i32 @free_circle_handles(%struct.surface* %11)
%13 = load %struct.surface*, %struct.surface** %2
%14 = call i32 @free_face_handles(%struct.surface* %13)
ret void
}

LLVM IR (-O2):
%struct.surface = type { i32 }
define void @clear_pqms(%struct.surface* %0) {
%2 = tail call i32 @free_cycle_handles(%struct.surface* %0)
%3 = tail call i32 @free_vertex_handles(%struct.surface* %0)
%4 = tail call i32 @free_arc_handles(%struct.surface* %0)
%5 = tail call i32 @free_edge_handles(%struct.surface* %0)
%6 = tail call i32 @free_circle_handles(%struct.surface* %0)
%7 = tail call i32 @free_face_handles(%struct.surface* %0)
ret void
}
void t5() {
  int a[2][3];
  a[0][1] = 1;
  a[1][1] = 2;
  int *p = a;
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/array.c",
          40, 1, p[1]);
  ;
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/array.c",
          41, 2, p[4]);
  ;
}


x86 assembly (clang, -O0):
<t5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x1,-0x1c(%rbp)
movl   $0x2,-0x10(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x4(%rax),%ecx
lea    0xec4(%rip),%rdi
mov    $0x28,%esi
mov    $0x1,%edx
mov    $0x0,%al
call   1030 <fexpect@plt>
mov    -0x28(%rbp),%rax
mov    0x10(%rax),%ecx
lea    0xea5(%rip),%rdi
mov    $0x29,%esi
mov    $0x2,%edx
mov    $0x0,%al
call   1030 <fexpect@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t5>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x28,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
xor    %eax,%eax
call   1030 <fexpect@plt>
mov    %rbx,%rdi
mov    $0x29,%esi
mov    $0x2,%edx
mov    $0x2,%ecx
xor    %eax,%eax
pop    %rbx
jmp    1030 <fexpect@plt>

LLVM IR (-O0):
@.str = [128 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/array.c\00"
define void @t5() {
%1 = alloca [2 x [3 x i32]]
%2 = alloca i32*
%3 = getelementptr inbounds [2 x [3 x i32]], [2 x [3 x i32]]* %1, i64 0, i64 0
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 1
store i32 1, i32* %4
%5 = getelementptr inbounds [2 x [3 x i32]], [2 x [3 x i32]]* %1, i64 0, i64 1
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 1
store i32 2, i32* %6
%7 = getelementptr inbounds [2 x [3 x i32]], [2 x [3 x i32]]* %1, i64 0, i64 0
%8 = bitcast [3 x i32]* %7 to i32*
store i32* %8, i32** %2
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = call i32 (i8*, i32, i32, i32, ...) bitcast (i32 (...)* @fexpect to i32 (i8*, i32, i32, i32, ...)*)(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @.str, i64 0, i64 0), i32 40, i32 1, i32 %11)
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 4
%15 = load i32, i32* %14
%16 = call i32 (i8*, i32, i32, i32, ...) bitcast (i32 (...)* @fexpect to i32 (i8*, i32, i32, i32, ...)*)(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @.str, i64 0, i64 0), i32 41, i32 2, i32 %15)
ret void
}

LLVM IR (-O2):
@.str = [128 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/array.c\00"
define void @t5() {
%1 = tail call i32 (i8*, i32, i32, i32, ...) bitcast (i32 (...)* @fexpect to i32 (i8*, i32, i32, i32, ...)*)(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @.str, i64 0, i64 0), i32 40, i32 1, i32 1)
%2 = tail call i32 (i8*, i32, i32, i32, ...) bitcast (i32 (...)* @fexpect to i32 (i8*, i32, i32, i32, ...)*)(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @.str, i64 0, i64 0), i32 41, i32 2, i32 2)
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int copy_quaddobl_container_to_target_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(266, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<copy_quaddobl_container_to_target_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x10a,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_quaddobl_container_to_target_solutions>:
mov    $0x10a,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @copy_quaddobl_container_to_target_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 266, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @copy_quaddobl_container_to_target_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 266, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Variables and functions */
int rand();
int my_get_random(int min, int max) {
  int random_value;
  random_value = (rand() % (max - min + 1)) + min;
  return (random_value);
}


x86 assembly (clang, -O0):
<my_get_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
add    -0x4(%rbp),%edx
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_get_random>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @my_get_random(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i32 (...) @rand()
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
%10 = add nsw i32 %9, 1
%11 = srem i32 %6, %10
%12 = load i32, i32* %3
%13 = add nsw i32 %11, %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @my_get_random(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
int g(int a[], int *p) { return 7; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @g(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret i32 7
}

LLVM IR (-O2):
define i32 @g(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 7
}
/* Variables and functions */
char *_(char *);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf(_("Usage: sln src dest|file\n\n"));
  printf(_("For bug reporting instructions, please "
           "see:\n<http://www.gnu.org/software/libc/bugs.html>.\n"));
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <_@plt>
mov    %rax,%rdi
call   1030 <printf@plt>
lea    0xedc(%rip),%rdi
call   1040 <_@plt>
mov    %rax,%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <_@plt>
mov    %rax,%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1040 <_@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Usage: sln src dest|file\0A\0A\00"
@.str.1 = [91 x i8] c"For bug reporting instructions, please see:\0A<http://www.gnu.org/software/libc/bugs.html>.\0A\00"
define void @usage() {
%1 = call i8* @_(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* %1)
%3 = call i8* @_(i8* getelementptr inbounds ([91 x i8], [91 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"Usage: sln src dest|file\0A\0A\00"
@.str.1 = [91 x i8] c"For bug reporting instructions, please see:\0A<http://www.gnu.org/software/libc/bugs.html>.\0A\00"
define void @usage() {
%1 = tail call i8* @_(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) %1)
%3 = tail call i8* @_(i8* getelementptr inbounds ([91 x i8], [91 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
ret void
}
int main(void) {
  'a' == "B";
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"B\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
int x6_process_synack(struct mypacket *packet) { return 0; }


x86 assembly (clang, -O0):
<x6_process_synack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x6_process_synack>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mypacket = type opaque
define i32 @x6_process_synack(%struct.mypacket* %0) {
%2 = alloca %struct.mypacket*
store %struct.mypacket* %0, %struct.mypacket** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mypacket = type opaque
define i32 @x6_process_synack(%struct.mypacket* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *);
void section(FILE *f, const char *str) {
  fprintf(f, "\n\t /* ---------------- %s ---------------- */\n\n", str);
}


x86 assembly (clang, -O0):
<section>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"\0A\09 /* ---------------- %s ---------------- */\0A\0A\00"
define void @section(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [48 x i8] c"\0A\09 /* ---------------- %s ---------------- */\0A\0A\00"
define void @section(i32* nocapture %0, i8* %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}