xunge/DecIR huggingface dataset:
int exact_square(int number) {
  int i = 0;
  while (number > i) {
    if (i * i == number) {
      return 1;
    }
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1144 <exact_square+0x44>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1136 <exact_square+0x36>
movl   $0x1,-0x4(%rbp)
jmp    114b <exact_square+0x4b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <exact_square+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
xor    %eax,%eax
test   %edi,%edi
jle    1128 <exact_square+0x28>
cs nopw 0x0(%rax,%rax,1)
mov    %eax,%ecx
imul   %eax,%ecx
cmp    %edi,%ecx
je     1123 <exact_square+0x23>
add    $0x1,%eax
cmp    %eax,%edi
jne    1110 <exact_square+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %3
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 1, i32* %2
br label %20
16: ; preds = %9
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
store i32 0, i32* %2
br label %20
20: ; preds = %19, %15
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @exact_square(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 0, %1 ]
%7 = mul nsw i32 %6, %6
%8 = icmp eq i32 %7, %0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 0, %1 ], [ 0, %3 ], [ 1, %5 ]
ret i32 %11
}
unsigned char unsignedchar_ignoring_longint(unsigned char x, long int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedchar_ignoring_longint>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedchar_ignoring_longint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @unsignedchar_ignoring_longint(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
ret i8 %5
}

LLVM IR (-O2):
define zeroext i8 @unsignedchar_ignoring_longint(i8 returned zeroext %0, i64 %1) {
ret i8 %0
}
/* Variables and functions */
scalar_t__ get_next_arg(char const *, char **);
int get_args_nr(const char *call) {
  int nr = 0;
  char *offset = (char *)call;
  for (; get_next_arg(call, &offset); nr++)
    ;
  return nr;
}


x86 assembly (clang, -O0):
<get_args_nr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <get_next_arg@plt>
cmp    $0x0,%rax
je     1155 <get_args_nr+0x45>
jmp    1147 <get_args_nr+0x37>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <get_args_nr+0x1b>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_args_nr>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %rdi,0x8(%rsp)
mov    $0xffffffff,%ebp
lea    0x8(%rsp),%r14
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <get_next_arg@plt>
add    $0x1,%ebp
test   %rax,%rax
jne    1130 <get_args_nr+0x20>
mov    %ebp,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get_args_nr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
br label %6
6: ; preds = %11, %1
%7 = load i8*, i8** %2
%8 = call i64 @get_next_arg(i8* %7, i8** %4)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %6
br label %11
11: ; preds = %10
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %6
14: ; preds = %6
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_args_nr(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
store i8* %0, i8** %2
br label %4
4: ; preds = %4, %1
%5 = phi i32 [ 0, %1 ], [ %8, %4 ]
%6 = call i64 @get_next_arg(i8* %0, i8** %2)
%7 = icmp eq i64 %6, 0
%8 = add nuw nsw i32 %5, 1
br i1 %7, label %9, label %4
9: ; preds = %4
ret i32 %5
}
signed long long f33(signed long long v_foo) {
  signed long long v_and = v_foo & -7;
  signed long long v_shl = v_and << 10;
  return v_shl;
}


x86 assembly (clang, -O0):
<f33>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffff9,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0xa,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f33>:
mov    %rdi,%rax
and    $0xfffffffffffffff9,%rax
shl    $0xa,%rax
ret

LLVM IR (-O0):
define i64 @f33(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = and i64 %5, -7
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = shl i64 %7, 10
store i64 %8, i64* %4
%9 = load i64, i64* %4
ret i64 %9
}

LLVM IR (-O2):
define i64 @f33(i64 %0) {
%2 = shl i64 %0, 10
%3 = and i64 %2, -7168
ret i64 %3
}
int main(int argc, char *argv[]) {
  int a = 0;
  int i = 0;
  int c = 0;
  for (int k = 0; k < 5; k++) {
    c++;
  }
  while (i < 10) {
    i++;
    a++;
  }
  c = i;
  if (a < 10) {
  ERROR:
    goto ERROR;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x5,-0x20(%rbp)
jge    114f <main+0x4f>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    112e <main+0x2e>
jmp    1154 <main+0x54>
cmpl   $0xa,-0x18(%rbp)
jge    1175 <main+0x75>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1154 <main+0x54>
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0xa,-0x14(%rbp)
jge    118f <main+0x8f>
jmp    118a <main+0x8a>
jmp    118a <main+0x8a>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %7
store i32 0, i32* %8
store i32 0, i32* %9
br label %10
10: ; preds = %16, %2
%11 = load i32, i32* %9
%12 = icmp slt i32 %11, 5
br i1 %12, label %13, label %19
13: ; preds = %10
%14 = load i32, i32* %8
%15 = add nsw i32 %14, 1
store i32 %15, i32* %8
br label %16
16: ; preds = %13
%17 = load i32, i32* %9
%18 = add nsw i32 %17, 1
store i32 %18, i32* %9
br label %10
19: ; preds = %10
br label %20
20: ; preds = %23, %19
%21 = load i32, i32* %7
%22 = icmp slt i32 %21, 10
br i1 %22, label %23, label %28
23: ; preds = %20
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 1
store i32 %25, i32* %7
%26 = load i32, i32* %6
%27 = add nsw i32 %26, 1
store i32 %27, i32* %6
br label %20
28: ; preds = %20
%29 = load i32, i32* %7
store i32 %29, i32* %8
%30 = load i32, i32* %6
%31 = icmp slt i32 %30, 10
br i1 %31, label %32, label %34
32: ; preds = %28
br label %33
33: ; preds = %33, %32
br label %33
34: ; preds = %28
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
scalar_t__ NF_SET();
int NF_SET_01() { return NF_SET() ? 1 : 0; }


x86 assembly (clang, -O0):
<NF_SET_01>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NF_SET@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NF_SET_01>:
push   %rax
xor    %eax,%eax
call   1030 <NF_SET@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @NF_SET_01() {
%1 = call i64 (...) @NF_SET()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i64
%4 = select i1 %2, i32 1, i32 0
ret i32 %4
}

LLVM IR (-O2):
define i32 @NF_SET_01() {
%1 = tail call i64 (...) @NF_SET()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
unsigned char inb(unsigned int);
int /*<<< orphan*/ outb(unsigned char, unsigned int);
int smbus_wait(unsigned int);
int smbus_send_slave_address(unsigned smbus_io_base, unsigned char device) {
  unsigned char val;
  outb(device, smbus_io_base + 0x00);
  val = inb(smbus_io_base + 0x01);
  if (((val & (0x01 << 5)) != 0) || ((val & (0x01 << 4)) != 0)) {
    return -1;
  }
  return smbus_wait(smbus_io_base);
}


x86 assembly (clang, -O0):
<smbus_send_slave_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    -0x8(%rbp),%esi
add    $0x0,%esi
movzbl %al,%edi
call   1030 <outb@plt>
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1050 <inb@plt>
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
jne    1180 <smbus_send_slave_address+0x50>
movzbl -0xa(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     118c <smbus_send_slave_address+0x5c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1197 <smbus_send_slave_address+0x67>
mov    -0x8(%rbp),%edi
call   1040 <smbus_wait@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbus_send_slave_address>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
mov    %ebx,%esi
call   1030 <outb@plt>
lea    0x1(%rbx),%edi
call   1050 <inb@plt>
test   $0x30,%al
je     114f <smbus_send_slave_address+0x1f>
mov    $0xffffffff,%eax
pop    %rbx
ret
mov    %ebx,%edi
pop    %rbx
jmp    1040 <smbus_wait@plt>

LLVM IR (-O0):
define i32 @smbus_send_slave_address(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
%7 = load i8, i8* %5
%8 = load i32, i32* %4
%9 = add i32 %8, 0
%10 = call i32 @outb(i8 zeroext %7, i32 %9)
%11 = load i32, i32* %4
%12 = add i32 %11, 1
%13 = call zeroext i8 @inb(i32 %12)
store i8 %13, i8* %6
%14 = load i8, i8* %6
%15 = zext i8 %14 to i32
%16 = and i32 %15, 32
%17 = icmp ne i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %2
%19 = load i8, i8* %6
%20 = zext i8 %19 to i32
%21 = and i32 %20, 16
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %18, %2
store i32 -1, i32* %3
br label %27
24: ; preds = %18
%25 = load i32, i32* %4
%26 = call i32 @smbus_wait(i32 %25)
store i32 %26, i32* %3
br label %27
27: ; preds = %24, %23
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @smbus_send_slave_address(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @outb(i8 zeroext %1, i32 %0)
%4 = add i32 %0, 1
%5 = tail call zeroext i8 @inb(i32 %4)
%6 = and i8 %5, 48
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @smbus_wait(i32 %0)
br label %10
10: ; preds = %2, %8
%11 = phi i32 [ %9, %8 ], [ -1, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
int /*<<< orphan*/ gen_pop();
void gen_logical_shift_right(void) {
  gen_pop();
  gen_call("cclsr");
}


x86 assembly (clang, -O0):
<gen_logical_shift_right>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xece(%rip),%rdi
call   1040 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_logical_shift_right>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <gen_call@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"cclsr\00"
define void @gen_logical_shift_right() {
%1 = call i32 (...) @gen_pop()
%2 = call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"cclsr\00"
define void @gen_logical_shift_right() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
void gtk_label_set_mnemonic_widget() {}


x86 assembly (clang, -O0):
<gtk_label_set_mnemonic_widget>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_label_set_mnemonic_widget>:
ret

LLVM IR (-O0):
define void @gtk_label_set_mnemonic_widget() {
ret void
}

LLVM IR (-O2):
define void @gtk_label_set_mnemonic_widget() {
ret void
}
OP(ed, d1) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_reverse();
int main() {
  test_reverse();
  printf("reverse() works!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_reverse@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_reverse@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"reverse() works!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_reverse()
%3 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [17 x i8] c"reverse() works!\00"
define i32 @main() {
%1 = tail call i32 (...) @test_reverse()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ arr;

/* Variables and functions */
int rdar8601243_aux(int);
void rdar8601243() {
  char arr[100];
  char *start = arr;
  start = start + rdar8601243_aux(sizeof(arr) - (arr - start));
  (void)start;
}


x86 assembly (clang, -O0):
<rdar8601243>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
lea    -0x70(%rbp),%rax
mov    %rax,-0x78(%rbp)
mov    -0x78(%rbp),%rax
mov    %rax,-0x80(%rbp)
lea    -0x70(%rbp),%rcx
mov    -0x78(%rbp),%rax
sub    %rax,%rcx
mov    $0x64,%eax
sub    %rcx,%rax
mov    %eax,%edi
call   1030 <rdar8601243_aux@plt>
mov    %eax,%ecx
mov    -0x80(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x78(%rbp)
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdar8601243>:
mov    $0x64,%edi
jmp    1030 <rdar8601243_aux@plt>

LLVM IR (-O0):
define void @rdar8601243() {
%1 = alloca [100 x i8]
%2 = alloca i8*
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = ptrtoint i8* %5 to i64
%8 = ptrtoint i8* %6 to i64
%9 = sub i64 %7, %8
%10 = sub i64 100, %9
%11 = trunc i64 %10 to i32
%12 = call i32 @rdar8601243_aux(i32 %11)
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %4, i64 %13
store i8* %14, i8** %2
%15 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @rdar8601243() {
%1 = tail call i32 @rdar8601243_aux(i32 100)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void version() {
  printf("fmc v1.0.0 - Flat Message Compiler\n");
  printf("Copyright by calvin<calvinwilliams.c@gmail.com> 2014\n");
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xefd(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeff(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"fmc v1.0.0 - Flat Message Compiler\0A\00"
@.str.1 = [54 x i8] c"Copyright by calvin<calvinwilliams.c@gmail.com> 2014\0A\00"
define void @version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [35 x i8] c"fmc v1.0.0 - Flat Message Compiler\00"
@str.2 = [53 x i8] c"Copyright by calvin<calvinwilliams.c@gmail.com> 2014\00"
define void @version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
double rand();
float jimsrand() {
  double mmm = 2147483647;
  float x;
  x = rand() / mmm;
  return (x);
}


x86 assembly (clang, -O0):
<jimsrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  0xee0(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
divsd  -0x8(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jimsrand>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
divsd  0xee0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @jimsrand() {
%1 = alloca double
%2 = alloca float
store double 0x41DFFFFFFFC00000, double* %1
%3 = call double (...) @rand()
%4 = load double, double* %1
%5 = fdiv double %3, %4
%6 = fptrunc double %5 to float
store float %6, float* %2
%7 = load float, float* %2
ret float %7
}

LLVM IR (-O2):
define float @jimsrand() {
%1 = tail call double (...) @rand()
%2 = fdiv double %1, 0x41DFFFFFFFC00000
%3 = fptrunc double %2 to float
ret float %3
}
void vde_chain_nm4_incref(void) {}


x86 assembly (clang, -O0):
<vde_chain_nm4_incref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm4_incref>:
ret

LLVM IR (-O0):
define void @vde_chain_nm4_incref() {
ret void
}

LLVM IR (-O2):
define void @vde_chain_nm4_incref() {
ret void
}
int test_imm_C4int16_mem(short *val) {
  return ((*val) & (0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xc4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4int16_mem>:
testb  $0xc4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 196
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C4int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 196
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int XGetDefault() { return 0; }


x86 assembly (clang, -O0):
<XGetDefault>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetDefault>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @XGetDefault() {
ret i32 0
}

LLVM IR (-O2):
define i32 @XGetDefault() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int safe_atou(char const *, unsigned int *);
int safe_atou32(const char *s, uint32_t *ret_u) {
  struct _assert_struct_1 {
    char x[(sizeof(uint32_t) == sizeof(unsigned)) ? 0 : -1];
  };
  return safe_atou(s, (unsigned *)ret_u);
}


x86 assembly (clang, -O0):
<safe_atou32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <safe_atou@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_atou32>:
jmp    1030 <safe_atou@plt>

LLVM IR (-O0):
define i32 @safe_atou32(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @safe_atou(i8* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @safe_atou32(i8* %0, i32* %1) {
%3 = tail call i32 @safe_atou(i8* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char const *, int);
__attribute__((always_)) char *fcitx_utils_strchr0(const char *s, int c) {
  return (char *)(s ? strchr(s, c) : NULL);
}


x86 assembly (clang, -O0):
<fcitx_utils_strchr0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113f <fcitx_utils_strchr0+0x2f>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
jmp    114a <fcitx_utils_strchr0+0x3a>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    114a <fcitx_utils_strchr0+0x3a>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcitx_utils_strchr0>:
test   %rdi,%rdi
je     111a <fcitx_utils_strchr0+0xa>
jmp    1030 <strchr@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @fcitx_utils_strchr0(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32* @strchr(i8* %8, i32 %9)
br label %12
11: ; preds = %2
br label %12
12: ; preds = %11, %7
%13 = phi i32* [ %10, %7 ], [ null, %11 ]
%14 = bitcast i32* %13 to i8*
ret i8* %14
}

LLVM IR (-O2):
define i8* @fcitx_utils_strchr0(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32* @strchr(i8* %0, i32 %1)
%6 = bitcast i32* %5 to i8*
br label %7
7: ; preds = %2, %4
%8 = phi i8* [ %6, %4 ], [ null, %2 ]
ret i8* %8
}
/* Variables and functions */
char *func();
int /*<<< orphan*/ printf(char *, char *);
main() {
  printf("%s \n", func());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <func@plt>
mov    %rax,%rsi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <func@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%s \0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i8* (...) @func()
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%s \0A\00"
define i32 @main() {
%1 = tail call i8* (...) @func()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ display;
};
struct TYPE_4__ {
  TYPE_1__ xreparent;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void *get_XEvent_xreparent_display(void *_p) {
  return (void *)((XEvent *)_p)->xreparent.display;
}


x86 assembly (clang, -O0):
<get_XEvent_xreparent_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xreparent_display>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i8* @get_XEvent_xreparent_display(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @get_XEvent_xreparent_display(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ runGedit();
void callRunGedit() { runGedit(); }


x86 assembly (clang, -O0):
<callRunGedit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <runGedit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<callRunGedit>:
xor    %eax,%eax
jmp    1030 <runGedit@plt>

LLVM IR (-O0):
define void @callRunGedit() {
%1 = call i32 (...) @runGedit()
ret void
}

LLVM IR (-O2):
define void @callRunGedit() {
%1 = tail call i32 (...) @runGedit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void abc() { printf("ping me \n"); }


x86 assembly (clang, -O0):
<abc>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<abc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"ping me \0A\00"
define void @abc() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"ping me \00"
define void @abc() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
void g_source_ref() {}


x86 assembly (clang, -O0):
<g_source_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_source_ref>:
ret

LLVM IR (-O0):
define void @g_source_ref() {
ret void
}

LLVM IR (-O2):
define void @g_source_ref() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clipcolor(int, int, int, int *, int *, int *);
int lum(int, int, int);
void setlum(int r, int g, int b, int l, int *dr, int *dg, int *db) {
  int d = 255 - lum(r, g, b);
  clipcolor(r + d, g + d, b + d, dr, dg, db);
}


x86 assembly (clang, -O0):
<setlum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <lum@plt>
mov    %eax,%ecx
mov    $0xff,%eax
sub    %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x4(%rbp),%edi
add    -0x24(%rbp),%edi
mov    -0x8(%rbp),%esi
add    -0x24(%rbp),%esi
mov    -0xc(%rbp),%edx
add    -0x24(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    0x10(%rbp),%r9
call   1040 <clipcolor@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setlum>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %r9,%r14
mov    %r8,%r15
mov    %edx,%r12d
mov    %esi,%ebx
mov    %edi,%ebp
mov    0x40(%rsp),%r13
call   1030 <lum@plt>
mov    $0xff,%edx
sub    %eax,%edx
add    %edx,%ebp
add    %edx,%ebx
add    %r12d,%edx
mov    %ebp,%edi
mov    %ebx,%esi
mov    %r15,%rcx
mov    %r14,%r8
mov    %r13,%r9
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <clipcolor@plt>

LLVM IR (-O0):
define void @setlum(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5, i32* %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
%14 = alloca i32*
%15 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
store i32* %6, i32** %14
%16 = load i32, i32* %8
%17 = load i32, i32* %9
%18 = load i32, i32* %10
%19 = call i32 @lum(i32 %16, i32 %17, i32 %18)
%20 = sub nsw i32 255, %19
store i32 %20, i32* %15
%21 = load i32, i32* %8
%22 = load i32, i32* %15
%23 = add nsw i32 %21, %22
%24 = load i32, i32* %9
%25 = load i32, i32* %15
%26 = add nsw i32 %24, %25
%27 = load i32, i32* %10
%28 = load i32, i32* %15
%29 = add nsw i32 %27, %28
%30 = load i32*, i32** %12
%31 = load i32*, i32** %13
%32 = load i32*, i32** %14
%33 = call i32 @clipcolor(i32 %23, i32 %26, i32 %29, i32* %30, i32* %31, i32* %32)
ret void
}

LLVM IR (-O2):
define void @setlum(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5, i32* %6) {
%8 = tail call i32 @lum(i32 %0, i32 %1, i32 %2)
%9 = sub nsw i32 255, %8
%10 = add nsw i32 %9, %0
%11 = add nsw i32 %9, %1
%12 = add nsw i32 %9, %2
%13 = tail call i32 @clipcolor(i32 %10, i32 %11, i32 %12, i32* %4, i32* %5, i32* %6)
ret void
}
unsigned char BmpFillingByteCalc(const unsigned int xsize) {
  unsigned char FillingByte;
  FillingByte = (xsize % 4);
  return FillingByte;
}


x86 assembly (clang, -O0):
<BmpFillingByteCalc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BmpFillingByteCalc>:
mov    %edi,%eax
and    $0x3,%al
ret

LLVM IR (-O0):
define zeroext i8 @BmpFillingByteCalc(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = urem i32 %4, 4
%6 = trunc i32 %5 to i8
store i8 %6, i8* %3
%7 = load i8, i8* %3
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @BmpFillingByteCalc(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = and i8 %2, 3
ret i8 %3
}
int test7(int *p) {
  struct snd_pcm_hw_params_t *hwparams;
  __builtin_memset(p, 0, 256);
  __builtin_memset((char *)p, 0, 256);
  __builtin_memset(hwparams, 0, 256);
}


x86 assembly (clang, -O0):
<test7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1030 <memset@plt>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1030 <memset@plt>
mov    -0x18(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1030 <memset@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test7>:
xorps  %xmm0,%xmm0
movups %xmm0,0xf0(%rdi)
movups %xmm0,0xe0(%rdi)
movups %xmm0,0xd0(%rdi)
movups %xmm0,0xc0(%rdi)
movups %xmm0,0xb0(%rdi)
movups %xmm0,0xa0(%rdi)
movups %xmm0,0x90(%rdi)
movups %xmm0,0x80(%rdi)
movups %xmm0,0x70(%rdi)
movups %xmm0,0x60(%rdi)
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
movups %xmm0,(%rax)
ret

LLVM IR (-O0):
%struct.snd_pcm_hw_params_t = type opaque
define i32 @test7(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca %struct.snd_pcm_hw_params_t*
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = bitcast i32* %5 to i8*
%7 = load i32*, i32** %3
%8 = bitcast i32* %7 to i8*
%9 = load %struct.snd_pcm_hw_params_t*, %struct.snd_pcm_hw_params_t** %4
%10 = bitcast %struct.snd_pcm_hw_params_t* %9 to i8*
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @test7(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to i8*
tail call void @llvm.memset.p0i8.i64(i8* align 1 dereferenceable(256) undef, i8 0, i64 256, i1 false)
ret i32 undef
}
/* Variables and functions */
int getBlockDimx();
int getBlockIdxx();
int getThreadIdxx();
int getThreadId() { return getBlockIdxx() * getBlockDimx() + getThreadIdxx(); }


x86 assembly (clang, -O0):
<getThreadId>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <getBlockIdxx@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getBlockDimx@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getThreadIdxx@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getThreadId>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <getBlockIdxx@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <getBlockDimx@plt>
mov    %eax,%ebp
imul   %ebx,%ebp
xor    %eax,%eax
call   1040 <getThreadIdxx@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getThreadId() {
%1 = call i32 (...) @getBlockIdxx()
%2 = call i32 (...) @getBlockDimx()
%3 = mul nsw i32 %1, %2
%4 = call i32 (...) @getThreadIdxx()
%5 = add nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @getThreadId() {
%1 = tail call i32 (...) @getBlockIdxx()
%2 = tail call i32 (...) @getBlockDimx()
%3 = mul nsw i32 %2, %1
%4 = tail call i32 (...) @getThreadIdxx()
%5 = add nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int /*<<< orphan*/, int);
int /*<<< orphan*/ west_occluded_fill(int, int);
void west_occluded_fill_test(void **state) {
  assert_int_equal(
      west_occluded_fill(0x0000000080402000ul, 0x00FEFEFEFEFEFE00ul),
      0x00000000FE7E3E00ul);
}


x86 assembly (clang, -O0):
<west_occluded_fill_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x80402000,%edi
mov    $0xfefefe00,%esi
call   1030 <west_occluded_fill@plt>
mov    %eax,%edi
mov    $0xfe7e3e00,%esi
call   1040 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<west_occluded_fill_test>:
push   %rax
mov    $0x80402000,%edi
mov    $0xfefefe00,%esi
call   1030 <west_occluded_fill@plt>
mov    %eax,%edi
mov    $0xfe7e3e00,%esi
pop    %rax
jmp    1040 <assert_int_equal@plt>

LLVM IR (-O0):
define void @west_occluded_fill_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @west_occluded_fill(i32 -2143281152, i32 -16843264)
%4 = call i32 @assert_int_equal(i32 %3, i32 -25281024)
ret void
}

LLVM IR (-O2):
define void @west_occluded_fill_test(i8** nocapture readnone %0) {
%2 = tail call i32 @west_occluded_fill(i32 -2143281152, i32 -16843264)
%3 = tail call i32 @assert_int_equal(i32 %2, i32 -25281024)
ret void
}
void debug_urb_unlinked(struct imx21 *imx21, struct urb *urb) {}


x86 assembly (clang, -O0):
<debug_urb_unlinked>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_urb_unlinked>:
ret

LLVM IR (-O0):
%struct.imx21 = type opaque
%struct.urb = type opaque
define void @debug_urb_unlinked(%struct.imx21* %0, %struct.urb* %1) {
%3 = alloca %struct.imx21*
%4 = alloca %struct.urb*
store %struct.imx21* %0, %struct.imx21** %3
store %struct.urb* %1, %struct.urb** %4
ret void
}

LLVM IR (-O2):
%struct.imx21 = type opaque
%struct.urb = type opaque
define void @debug_urb_unlinked(%struct.imx21* nocapture %0, %struct.urb* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *, char const *);
int /*<<< orphan*/ stderr;
void message3(const char *a, const char *b, const char *c) {
  fprintf(stderr, "%s%s%s\n", a, b, c);
}


x86 assembly (clang, -O0):
<message3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<message3>:
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
lea    0xed7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s%s%s\0A\00"
define void @message3(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9, i8* %10)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s%s%s\0A\00"
define void @message3(i8* %0, i8* %1, i8* %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i8* %2)
ret void
}
void test_one(int x) {
#pragma omp target simd
  for (int i = 0; i < x; i++)
    ;
}


x86 assembly (clang, -O0):
<test_one>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    112d <test_one+0x2d>
jmp    111f <test_one+0x1f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <test_one+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_one>:
ret

LLVM IR (-O0):
define void @test_one(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @test_one(i32 %0) {
ret void
}
/* Type definitions */
struct drm_output {
  int dummy;
};

/* Variables and functions */
int intel_ddc_get_modes(struct drm_output *);
int intel_crt_get_modes(struct drm_output *output) {
  return intel_ddc_get_modes(output);
}


x86 assembly (clang, -O0):
<intel_crt_get_modes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <intel_ddc_get_modes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_crt_get_modes>:
jmp    1030 <intel_ddc_get_modes@plt>

LLVM IR (-O0):
%struct.drm_output = type { i32 }
define i32 @intel_crt_get_modes(%struct.drm_output* %0) {
%2 = alloca %struct.drm_output*
store %struct.drm_output* %0, %struct.drm_output** %2
%3 = load %struct.drm_output*, %struct.drm_output** %2
%4 = call i32 @intel_ddc_get_modes(%struct.drm_output* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.drm_output = type { i32 }
define i32 @intel_crt_get_modes(%struct.drm_output* %0) {
%2 = tail call i32 @intel_ddc_get_modes(%struct.drm_output* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ _IO(char, int);
int ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int grantpt(int fd) { return ioctl(fd, _IO('T', 0x60), 0); }


x86 assembly (clang, -O0):
<grantpt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x54,%edi
mov    $0x60,%esi
call   1030 <_IO@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
xor    %edx,%edx
call   1040 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grantpt>:
push   %rbx
mov    %edi,%ebx
mov    $0x54,%edi
mov    $0x60,%esi
call   1030 <_IO@plt>
mov    %ebx,%edi
mov    %eax,%esi
xor    %edx,%edx
pop    %rbx
jmp    1040 <ioctl@plt>

LLVM IR (-O0):
define i32 @grantpt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_IO(i8 signext 84, i32 96)
%5 = call i32 @ioctl(i32 %3, i32 %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
define i32 @grantpt(i32 %0) {
%2 = tail call i32 @_IO(i8 signext 84, i32 96)
%3 = tail call i32 @ioctl(i32 %0, i32 %2, i32 0)
ret i32 %3
}
void tputs(cp, affcnt, outfn) char *cp;
int affcnt;
int (*outfn)();
{
  while (*cp) {
    (*outfn)(*cp);
    cp++;
  }
}


x86 assembly (clang, -O0):
<tputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1140 <tputs+0x40>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
mov    $0x0,%al
call   *%rcx
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1113 <tputs+0x13>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tputs>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1133 <tputs+0x33>
mov    %rdx,%r14
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%edi
xor    %eax,%eax
call   *%r14
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <tputs+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @tputs(i8* %0, i32 %1, i32 (...)* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32 (...)*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 (...)* %2, i32 (...)** %6
br label %7
7: ; preds = %11, %3
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %7
%12 = load i32 (...)*, i32 (...)** %6
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = bitcast i32 (...)* %12 to i32 (i32, ...)*
%17 = call i32 (i32, ...) %16(i32 %15)
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %4
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @tputs(i8* nocapture %0, i32 %1, i32 (...)* nocapture %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %3
%7 = bitcast i32 (...)* %2 to i32 (i32, ...)*
br label %8
8: ; preds = %6, %8
%9 = phi i8 [ %4, %6 ], [ %14, %8 ]
%10 = phi i8* [ %0, %6 ], [ %13, %8 ]
%11 = sext i8 %9 to i32
%12 = tail call i32 (i32, ...) %7(i32 %11)
%13 = getelementptr inbounds i8, i8* %10, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %8
16: ; preds = %8, %3
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ processDirectory(char *, char *);
int main() {
  processDirectory("sampledata/correct/", "correct");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <processDirectory@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef5(%rip),%rsi
call   1030 <processDirectory@plt>
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"sampledata/correct/\00"
@.str.1 = [8 x i8] c"correct\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @processDirectory(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str = [20 x i8] c"sampledata/correct/\00"
@.str.1 = [8 x i8] c"correct\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @processDirectory(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
int ccic_register_switch_device(int mode) {}


x86 assembly (clang, -O0):
<ccic_register_switch_device>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccic_register_switch_device>:
ret

LLVM IR (-O0):
define i32 @ccic_register_switch_device(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @ccic_register_switch_device(i32 %0) {
ret i32 undef
}
int sanity_check(char *path) { return (path[0] == '.' || path[0] == '/'); }


x86 assembly (clang, -O0):
<sanity_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x2e,%ecx
mov    %al,-0x9(%rbp)
je     112d <sanity_check+0x2d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sanity_check>:
mov    (%rdi),%cl
and    $0xfe,%cl
xor    %eax,%eax
cmp    $0x2e,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @sanity_check(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 46
br i1 %7, label %14, label %8
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 47
br label %14
14: ; preds = %8, %1
%15 = phi i1 [ true, %1 ], [ %13, %8 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @sanity_check(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -2
%4 = icmp eq i8 %3, 46
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_operator() { printf("#<closure>"); }


x86 assembly (clang, -O0):
<print_operator>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_operator>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"#<closure>\00"
define void @print_operator() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"#<closure>\00"
define void @print_operator() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
void INT_Excep_POE_OEI2(void) {}


x86 assembly (clang, -O0):
<INT_Excep_POE_OEI2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_POE_OEI2>:
ret

LLVM IR (-O0):
define void @INT_Excep_POE_OEI2() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_POE_OEI2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e2();
void f2() { e2(); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <e2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
xor    %eax,%eax
jmp    1030 <e2@plt>

LLVM IR (-O0):
define void @f2() {
%1 = call i32 (...) @e2()
ret void
}

LLVM IR (-O2):
define void @f2() {
%1 = tail call i32 (...) @e2()
ret void
}
int ubi_dbg_is_erase_failure(const struct ubi_device *ubi) { return 0; }


x86 assembly (clang, -O0):
<ubi_dbg_is_erase_failure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ubi_dbg_is_erase_failure>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ubi_device = type opaque
define i32 @ubi_dbg_is_erase_failure(%struct.ubi_device* %0) {
%2 = alloca %struct.ubi_device*
store %struct.ubi_device* %0, %struct.ubi_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ubi_device = type opaque
define i32 @ubi_dbg_is_erase_failure(%struct.ubi_device* nocapture readnone %0) {
ret i32 0
}
void flush_cache(unsigned long dummy1, unsigned long dummy2) { return; }


x86 assembly (clang, -O0):
<flush_cache>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_cache>:
ret

LLVM IR (-O0):
define void @flush_cache(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @flush_cache(i64 %0, i64 %1) {
ret void
}