xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char const *, int);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
char *sbus_copy_substr(const char *p_src, int n_len) {
  char *p_dst = (char *)malloc(n_len + 1);
  memset(p_dst, 0, n_len + 1);
  memcpy(p_dst, p_src, n_len);
  return p_dst;
}


x86 assembly (clang, -O0):
<sbus_copy_substr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%edx
add    $0x1,%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sbus_copy_substr>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%ebp
mov    %ebp,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8* @sbus_copy_substr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
%13 = call i32 @memset(i8* %10, i32 0, i32 %12)
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = call i32 @memcpy(i8* %14, i8* %15, i32 %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @sbus_copy_substr(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @memset(i8* %5, i32 0, i32 %3)
%7 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
ret i8* %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t min_u32(uint32_t a, uint32_t b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<min_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <min_u32+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min_u32+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_u32>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min_u32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min_u32(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
signed int toupper(signed int __c) {
  signed int tmp_if_expr$2;
  const signed int **return_value___ctype_toupper_loc$1;
  if (__c >= -128) {
    if (!(__c < 256))
      goto __CPROVER_DUMP_L1;
    return_value___ctype_toupper_loc$1 = __ctype_toupper_loc();
    tmp_if_expr$2 = (*return_value___ctype_toupper_loc$1)[(signed long int)__c];
  } else {
  __CPROVER_DUMP_L1:;
    tmp_if_expr$2 = __c;
  }
  return tmp_if_expr$2;
}


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffff80,-0x4(%rbp)
jl     115a <toupper+0x4a>
cmpl   $0x100,-0x4(%rbp)
jl     1137 <toupper+0x27>
jmp    115f <toupper+0x4f>
mov    $0x0,%al
call   1030 <__ctype_toupper_loc@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movslq -0x4(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x8(%rbp)
jmp    1165 <toupper+0x55>
jmp    115f <toupper+0x4f>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
lea    0x80(%rbx),%eax
cmp    $0x17f,%eax
ja     1132 <toupper+0x22>
xor    %eax,%eax
call   1030 <__ctype_toupper_loc@plt>
cltq
mov    (%rax),%rax
movslq %ebx,%rcx
mov    (%rax,%rcx,4),%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32**
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, -128
br i1 %6, label %7, label %21
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 256
br i1 %9, label %11, label %10
10: ; preds = %7
br label %22
11: ; preds = %7
%12 = call i32 (...) @__ctype_toupper_loc()
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i32**
store i32** %14, i32*** %4
%15 = load i32**, i32*** %4
%16 = load i32*, i32** %15
%17 = load i32, i32* %2
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
%20 = load i32, i32* %19
store i32 %20, i32* %3
br label %24
21: ; preds = %1
br label %22
22: ; preds = %21, %10
%23 = load i32, i32* %2
store i32 %23, i32* %3
br label %24
24: ; preds = %22, %11
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = add i32 %0, 128
%3 = icmp ult i32 %2, 384
br i1 %3, label %4, label %12
4: ; preds = %1
%5 = tail call i32 (...) @__ctype_toupper_loc()
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32**
%8 = load i32*, i32** %7
%9 = sext i32 %0 to i64
%10 = getelementptr inbounds i32, i32* %8, i64 %9
%11 = load i32, i32* %10
br label %12
12: ; preds = %1, %4
%13 = phi i32 [ %11, %4 ], [ %0, %1 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ log_msg(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, int);
void log_frameResent(int packet, int frame) {
  char buffer[50];
  sprintf(buffer, "DAT: frame %d of packet %d resent", frame, packet);
  log_msg(buffer);
}


x86 assembly (clang, -O0):
<log_frameResent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
lea    0xec1(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x40(%rbp),%rdi
call   1030 <log_msg@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_frameResent>:
push   %rbx
sub    $0x40,%rsp
mov    %esi,%edx
mov    %edi,%ecx
lea    0xed0(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <log_msg@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"DAT: frame %d of packet %d resent\00"
define void @log_frameResent(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [50 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
%10 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%11 = call i32 @log_msg(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"DAT: frame %d of packet %d resent\00"
define void @log_frameResent(i32 %0, i32 %1) {
%3 = alloca [50 x i8]
%4 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%6 = call i32 @log_msg(i8* %4)
ret void
}
void swap_byte(unsigned char *b1, unsigned char *b2) {
  unsigned char temp = *b1;
  *b1 = *b2;
  *b2 = temp;
}


x86 assembly (clang, -O0):
<swap_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_byte>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @swap_byte(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = load i8*, i8** %3
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %4
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @swap_byte(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret void
}
int __b6_splay_is_thread(const struct b6_dref *dref) {
  return (unsigned long int)dref & 1;
}


x86 assembly (clang, -O0):
<__b6_splay_is_thread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__b6_splay_is_thread>:
mov    %rdi,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
%struct.b6_dref = type opaque
define i32 @__b6_splay_is_thread(%struct.b6_dref* %0) {
%2 = alloca %struct.b6_dref*
store %struct.b6_dref* %0, %struct.b6_dref** %2
%3 = load %struct.b6_dref*, %struct.b6_dref** %2
%4 = ptrtoint %struct.b6_dref* %3 to i64
%5 = and i64 %4, 1
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.b6_dref = type opaque
define i32 @__b6_splay_is_thread(%struct.b6_dref* %0) {
%2 = ptrtoint %struct.b6_dref* %0 to i64
%3 = trunc i64 %2 to i32
%4 = and i32 %3, 1
ret i32 %4
}
void g_main_context_check() {}


x86 assembly (clang, -O0):
<g_main_context_check>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_main_context_check>:
ret

LLVM IR (-O0):
define void @g_main_context_check() {
ret void
}

LLVM IR (-O2):
define void @g_main_context_check() {
ret void
}
/* Type definitions */
typedef unsigned long long uint16_t;

/* Variables and functions */
unsigned int hweight15(uint16_t a) {
  return ((a * 01000010000100001ull) & 0x111111111111111ull) % 15;
}


x86 assembly (clang, -O0):
<hweight15>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x200040008001,%rax
imul   -0x8(%rbp),%rax
movabs $0x111111111111111,%rcx
11 11 01
and    %rcx,%rax
mov    $0xf,%ecx
xor    %edx,%edx
div    %rcx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hweight15>:
movabs $0x200040008001,%rax
imul   %rdi,%rax
movabs $0x111111111111111,%rcx
11 11 01
and    %rax,%rcx
movabs $0x8888888888888889,%rdx
88 88 88
mov    %rcx,%rax
mul    %rdx
shr    $0x3,%rdx
lea    (%rdx,%rdx,4),%eax
lea    (%rax,%rax,2),%eax
sub    %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hweight15(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 35185445863425
%5 = and i64 %4, 76861433640456465
%6 = urem i64 %5, 15
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @hweight15(i64 %0) {
%2 = mul i64 %0, 35185445863425
%3 = and i64 %2, 76861433640456465
%4 = urem i64 %3, 15
%5 = trunc i64 %4 to i32
ret i32 %5
}
void breakpt() { asm("" ::: "memory"); }


x86 assembly (clang, -O0):
<breakpt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<breakpt>:
ret

LLVM IR (-O0):
define void @breakpt() {
ret void
}

LLVM IR (-O2):
define void @breakpt() {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
size_t get_host_name_max() { return 255; }


x86 assembly (clang, -O0):
<get_host_name_max>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_host_name_max>:
mov    $0xff,%eax
ret

LLVM IR (-O0):
define i64 @get_host_name_max() {
ret i64 255
}

LLVM IR (-O2):
define i64 @get_host_name_max() {
ret i64 255
}
char *Py_GetExecPrefix() { return "/"; }


x86 assembly (clang, -O0):
<Py_GetExecPrefix>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Py_GetExecPrefix>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"/\00"
define i8* @Py_GetExecPrefix() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [2 x i8] c"/\00"
define i8* @Py_GetExecPrefix() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
double tan(double x) {
  printf("tcl>>> %s\n", __func__);
  return -1;
}


x86 assembly (clang, -O0):
<tan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    0xee4(%rip),%rdi
lea    0xee8(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
movsd  0xec6(%rip),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tan>:
push   %rax
lea    0xef0(%rip),%rdi
lea    0xef4(%rip),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
movsd  0xed2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"tcl>>> %s\0A\00"
@__func__.tan = [4 x i8] c"tan\00"
define double @tan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__func__.tan, i64 0, i64 0))
ret double -1.000000e+00
}

LLVM IR (-O2):
@.str = [11 x i8] c"tcl>>> %s\0A\00"
@__func__.tan = [4 x i8] c"tan\00"
define double @tan(double %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__func__.tan, i64 0, i64 0))
ret double -1.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ UPnPResponse_SwitchPower_GetStatus(void *, int);
int /*<<< orphan*/ printf(char *);
void SwitchPower_GetStatus(void *upnptoken) {
  printf("UPnP Invoke: SwitchPower_GetStatus();\r\n");
  UPnPResponse_SwitchPower_GetStatus(upnptoken, 1);
}


x86 assembly (clang, -O0):
<SwitchPower_GetStatus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <UPnPResponse_SwitchPower_GetStatus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchPower_GetStatus>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <puts@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
pop    %rbx
jmp    1030 <UPnPResponse_SwitchPower_GetStatus@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"UPnP Invoke: SwitchPower_GetStatus();\0D\0A\00"
define void @SwitchPower_GetStatus(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @UPnPResponse_SwitchPower_GetStatus(i8* %4, i32 1)
ret void
}

LLVM IR (-O2):
@str = [39 x i8] c"UPnP Invoke: SwitchPower_GetStatus();\0D\00"
define void @SwitchPower_GetStatus(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @UPnPResponse_SwitchPower_GetStatus(i8* %0, i32 1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void set_bit(uint8_t *bitfield, int bit) {
  bitfield[bit / 8] |= 1 << (7 - (bit % 8));
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    $0x7,%ecx
sub    %edx,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
or     (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
lea    0x7(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
mov    %eax,%ecx
and    $0xfffffff8,%ecx
sub    %ecx,%esi
mov    $0x7,%cl
sub    %sil,%cl
mov    $0x1,%edx
shl    %cl,%edx
sar    $0x3,%eax
cltq
or     %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @set_bit(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = srem i32 %5, 8
%7 = sub nsw i32 7, %6
%8 = shl i32 1, %7
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 8
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %9, i64 %12
%14 = load i32, i32* %13
%15 = or i32 %14, %8
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @set_bit(i32* nocapture %0, i32 %1) {
%3 = srem i32 %1, 8
%4 = sub nsw i32 7, %3
%5 = shl nuw nsw i32 1, %4
%6 = sdiv i32 %1, 8
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = or i32 %9, %5
store i32 %10, i32* %8
ret void
}
void av_frame_get_color_range() {}


x86 assembly (clang, -O0):
<av_frame_get_color_range>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_frame_get_color_range>:
ret

LLVM IR (-O0):
define void @av_frame_get_color_range() {
ret void
}

LLVM IR (-O2):
define void @av_frame_get_color_range() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int /*<<< orphan*/ *malloc(int);
int pthread_getattr_np(int /*<<< orphan*/, int /*<<< orphan*/ *);
int my_pthread_getattr_np(pthread_t thid, pthread_attr_t *__attr) {
  pthread_attr_t *realattr;
  realattr = malloc(sizeof(pthread_attr_t));
  *((unsigned int *)__attr) = (unsigned int)realattr;
  return pthread_getattr_np(thid, realattr);
}


x86 assembly (clang, -O0):
<my_pthread_getattr_np>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
mov    -0x18(%rbp),%rsi
call   1030 <pthread_getattr_np@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_getattr_np>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %eax,(%rbx)
mov    %ebp,%edi
mov    %rax,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <pthread_getattr_np@plt>

LLVM IR (-O0):
define i32 @my_pthread_getattr_np(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = call i32* @malloc(i32 4)
store i32* %6, i32** %5
%7 = load i32*, i32** %5
%8 = ptrtoint i32* %7 to i32
%9 = load i32*, i32** %4
store i32 %8, i32* %9
%10 = load i32, i32* %3
%11 = load i32*, i32** %5
%12 = call i32 @pthread_getattr_np(i32 %10, i32* %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @my_pthread_getattr_np(i32 %0, i32* nocapture writeonly %1) {
%3 = tail call i32* @malloc(i32 4)
%4 = ptrtoint i32* %3 to i64
%5 = trunc i64 %4 to i32
store i32 %5, i32* %1
%6 = tail call i32 @pthread_getattr_np(i32 %0, i32* %3)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ arr;

/* Variables and functions */
int MatrixChainOrder(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int arr[] = {1, 2, 3, 4};
  int size = sizeof(arr) / sizeof(arr[0]);
  printf("Minimum number of multiplications is %d\n",
         MatrixChainOrder(arr, size));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
movl   $0x4,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1030 <MatrixChainOrder@plt>
mov    %eax,%esi
lea    0xeaf(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xed5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1030 <MatrixChainOrder@plt>
lea    0xecd(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [4 x i32] [i32 1, i32 2, i32 3, i32 4]
@.str = [41 x i8] c"Minimum number of multiplications is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [4 x i32]* %2 to i8*
store i32 4, i32* %3
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = call i32 @MatrixChainOrder(i32* %5, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [4 x i32] [i32 1, i32 2, i32 3, i32 4]
@.str = [41 x i8] c"Minimum number of multiplications is %d\0A\00"
define i32 @main() {
%1 = alloca [4 x i32]
%2 = bitcast [4 x i32]* %1 to i8*
%3 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%4 = call i32 @MatrixChainOrder(i32* %3, i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
int test_imm_55uint32_mem(unsigned int *val) {
  return ((*val) & (0x55 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_55uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x55,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_55uint32_mem>:
testb  $0x55,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_55uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 85
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_55uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 85
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
scalar_t__ malloc(int);
void malloc_out_parameter_local_mutation_ok(int **x) {
  *x = (int *)malloc(sizeof(int));
  x = NULL;
}


x86 assembly (clang, -O0):
<malloc_out_parameter_local_mutation_ok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
movq   $0x0,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_out_parameter_local_mutation_ok>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @malloc_out_parameter_local_mutation_ok(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i32*
%5 = load i32**, i32*** %2
store i32* %4, i32** %5
store i32** null, i32*** %2
ret void
}

LLVM IR (-O2):
define void @malloc_out_parameter_local_mutation_ok(i32** nocapture writeonly %0) {
%2 = tail call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ baz();
void bar() { baz(); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <baz@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xor    %eax,%eax
jmp    1030 <baz@plt>

LLVM IR (-O0):
define void @bar() {
%1 = call i32 (...) @baz()
ret void
}

LLVM IR (-O2):
define void @bar() {
%1 = tail call i32 (...) @baz()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ render_hex(char *, int, unsigned char const *, int, int);
void printipv6(const unsigned char *ipv6, FILE *f) {
  char tmpbuf[64];
  render_hex(tmpbuf, sizeof tmpbuf, ipv6, 16, 1);
  fprintf(f, "%s", tmpbuf);
}


x86 assembly (clang, -O0):
<printipv6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x40,%esi
mov    $0x10,%ecx
mov    $0x1,%r8d
call   1030 <render_hex@plt>
mov    -0x10(%rbp),%rdi
lea    -0x50(%rbp),%rdx
lea    0xea4(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printipv6>:
push   %r14
push   %rbx
sub    $0x48,%rsp
mov    %rsi,%rbx
mov    %rdi,%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x40,%esi
mov    $0x10,%ecx
mov    $0x1,%r8d
call   1030 <render_hex@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <fputs@plt>
add    $0x48,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @printipv6(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca [64 x i8]
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = getelementptr inbounds [64 x i8], [64 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = call i32 @render_hex(i8* %6, i32 64, i8* %7, i32 16, i32 1)
%9 = load i32*, i32** %4
%10 = getelementptr inbounds [64 x i8], [64 x i8]* %5, i64 0, i64 0
%11 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
ret void
}

LLVM IR (-O2):
define void @printipv6(i8* %0, i32* nocapture %1) {
%3 = alloca [64 x i8]
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%5 = call i32 @render_hex(i8* %4, i32 64, i8* %0, i32 16, i32 1)
%6 = call i32 @fputs(i8* %4, i32* %1)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t page_to_addr(int pg) { return 0xD0000 + ((pg & 3) * 16384); }


x86 assembly (clang, -O0):
<page_to_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3,%eax
shl    $0xe,%eax
add    $0xd0000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<page_to_addr>:
shl    $0xe,%edi
movzwl %di,%eax
or     $0xd0000,%eax
ret

LLVM IR (-O0):
define i32 @page_to_addr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 3
%5 = mul nsw i32 %4, 16384
%6 = add nsw i32 851968, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @page_to_addr(i32 %0) {
%2 = shl i32 %0, 14
%3 = and i32 %2, 49152
%4 = or i32 %3, 851968
ret i32 %4
}
float foo(float b) {
  __attribute((vector_size(16))) float c = {0, 0, 0, 0};
  __attribute((vector_size(16))) float d = {0, 0, 0, 0};
  d += c;
  return ((float *)&c)[2];
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
movaps %xmm0,-0x20(%rbp)
movaps %xmm0,-0x30(%rbp)
movaps -0x20(%rbp),%xmm0
addps  -0x30(%rbp),%xmm0
movaps %xmm0,-0x30(%rbp)
movss  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @foo(float %0) {
%2 = alloca float
%3 = alloca <4 x float>
%4 = alloca <4 x float>
store float %0, float* %2
store <4 x float> zeroinitializer, <4 x float>* %3
store <4 x float> zeroinitializer, <4 x float>* %4
%5 = load <4 x float>, <4 x float>* %3
%6 = load <4 x float>, <4 x float>* %4
%7 = fadd <4 x float> %6, %5
store <4 x float> %7, <4 x float>* %4
%8 = bitcast <4 x float>* %3 to float*
%9 = getelementptr inbounds float, float* %8, i64 2
%10 = load float, float* %9
ret float %10
}

LLVM IR (-O2):
define float @foo(float %0) {
ret float 0.000000e+00
}
/* Type definitions */
typedef int /*<<< orphan*/ n;

/* Variables and functions */
int CHAR_BIT;
int abs(int n) {
  int neg_val = n >> (sizeof(n) * CHAR_BIT - 1);
  return (n ^ neg_val) - neg_val;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ecf(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x2,%rcx
sub    $0x1,%rcx
sar    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
mov    0x2ed7(%rip),%rcx
mov    (%rcx),%cl
shl    $0x2,%cl
add    $0xff,%cl
mov    %edi,%edx
sar    %cl,%edx
xor    %edx,%eax
sub    %edx,%eax
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @CHAR_BIT
%6 = sext i32 %5 to i64
%7 = mul i64 4, %6
%8 = sub i64 %7, 1
%9 = trunc i64 %8 to i32
%10 = ashr i32 %4, %9
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = xor i32 %11, %12
%14 = load i32, i32* %3
%15 = sub nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define i32 @abs(i32 %0) {
%2 = load i32, i32* @CHAR_BIT
%3 = shl i32 %2, 2
%4 = add i32 %3, -1
%5 = ashr i32 %0, %4
%6 = xor i32 %5, %0
%7 = sub nsw i32 %6, %5
ret i32 %7
}
/* Variables and functions */
int sv_get_sample_type();
int vox_get_sample_type() { return sv_get_sample_type(); }


x86 assembly (clang, -O0):
<vox_get_sample_type>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sv_get_sample_type@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vox_get_sample_type>:
xor    %eax,%eax
jmp    1030 <sv_get_sample_type@plt>

LLVM IR (-O0):
define i32 @vox_get_sample_type() {
%1 = call i32 (...) @sv_get_sample_type()
ret i32 %1
}

LLVM IR (-O2):
define i32 @vox_get_sample_type() {
%1 = tail call i32 (...) @sv_get_sample_type()
ret i32 %1
}
/* Variables and functions */
int LZ4_compress64k_stack(char const *, char *, int);
int LZ4_compress_stack(char const *, char *, int);
int LZ4_compress(const char *source, char *dest, int inputSize) {
  if (inputSize < (int)((1 << 16) + ((8 + 4) - 1)))
    return LZ4_compress64k_stack(source, dest, inputSize);
  return LZ4_compress_stack(source, dest, inputSize);
}


x86 assembly (clang, -O0):
<LZ4_compress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x1000b,-0x1c(%rbp)
jge    1158 <LZ4_compress+0x38>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <LZ4_compress64k_stack@plt>
mov    %eax,-0x4(%rbp)
jmp    116b <LZ4_compress+0x4b>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <LZ4_compress_stack@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_compress>:
cmp    $0x1000a,%edx
jg     112d <LZ4_compress+0xd>
jmp    1030 <LZ4_compress64k_stack@plt>
jmp    1040 <LZ4_compress_stack@plt>

LLVM IR (-O0):
define i32 @LZ4_compress(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp slt i32 %8, 65547
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = call i32 @LZ4_compress64k_stack(i8* %11, i8* %12, i32 %13)
store i32 %14, i32* %4
br label %20
15: ; preds = %3
%16 = load i8*, i8** %5
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = call i32 @LZ4_compress_stack(i8* %16, i8* %17, i32 %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %15, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @LZ4_compress(i8* %0, i8* %1, i32 %2) {
%4 = icmp slt i32 %2, 65547
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @LZ4_compress64k_stack(i8* %0, i8* %1, i32 %2)
br label %9
7: ; preds = %3
%8 = tail call i32 @LZ4_compress_stack(i8* %0, i8* %1, i32 %2)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
/* Type definitions */
struct in_addr {
  int dummy;
};
struct sockaddr_in {
  int /*<<< orphan*/ sin_port;
  struct in_addr sin_addr;
  int /*<<< orphan*/ sin_family;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int /*<<< orphan*/ htons(int /*<<< orphan*/);
void init_target(struct sockaddr_in *target, struct in_addr in) {
  target->sin_family = AF_INET;
  target->sin_addr = in;
  target->sin_port = htons(0);
}


x86 assembly (clang, -O0):
<init_target>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %esi,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%ecx
mov    %ecx,0x4(%rax)
xor    %edi,%edi
call   1030 <htons@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_target>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x8(%rdi)
mov    %esi,0x4(%rdi)
xor    %edi,%edi
call   1030 <htons@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32, %struct.in_addr, i32 }
%struct.in_addr = type { i32 }
@AF_INET = global i32 0
define void @init_target(%struct.sockaddr_in* %0, i32 %1) {
%3 = alloca %struct.in_addr
%4 = alloca %struct.sockaddr_in*
%5 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
store i32 %1, i32* %5
store %struct.sockaddr_in* %0, %struct.sockaddr_in** %4
%6 = load i32, i32* @AF_INET
%7 = load %struct.sockaddr_in*, %struct.sockaddr_in** %4
%8 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %7, i32 0, i32 2
store i32 %6, i32* %8
%9 = load %struct.sockaddr_in*, %struct.sockaddr_in** %4
%10 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %9, i32 0, i32 1
%11 = bitcast %struct.in_addr* %10 to i8*
%12 = bitcast %struct.in_addr* %3 to i8*
%13 = call i32 @htons(i32 0)
%14 = load %struct.sockaddr_in*, %struct.sockaddr_in** %4
%15 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %14, i32 0, i32 0
store i32 %13, i32* %15
ret void
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32, %struct.in_addr, i32 }
%struct.in_addr = type { i32 }
@AF_INET = global i32 0
define void @init_target(%struct.sockaddr_in* nocapture writeonly %0, i32 %1) {
%3 = load i32, i32* @AF_INET
%4 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %0, i64 0, i32 2
store i32 %3, i32* %4
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %0, i64 0, i32 1, i32 0
store i32 %1, i32* %5
%6 = tail call i32 @htons(i32 0)
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %0, i64 0, i32 0
store i32 %6, i32* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hard_sti();
int /*<<< orphan*/ rt_sched_lock();
void rtos_irq_release_lock(void) {
  rt_sched_lock();
  hard_sti();
}


x86 assembly (clang, -O0):
<rtos_irq_release_lock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <rt_sched_lock@plt>
mov    $0x0,%al
call   1030 <hard_sti@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtos_irq_release_lock>:
push   %rax
xor    %eax,%eax
call   1040 <rt_sched_lock@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <hard_sti@plt>

LLVM IR (-O0):
define void @rtos_irq_release_lock() {
%1 = call i32 (...) @rt_sched_lock()
%2 = call i32 (...) @hard_sti()
ret void
}

LLVM IR (-O2):
define void @rtos_irq_release_lock() {
%1 = tail call i32 (...) @rt_sched_lock()
%2 = tail call i32 (...) @hard_sti()
ret void
}
void unsigned_char_or_signed_char_signed_int(unsigned char *LHS,
                                             signed int RHS) {
  (*LHS) |= RHS;
}


x86 assembly (clang, -O0):
<unsigned_char_or_signed_char_signed_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
or     %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_char_or_signed_char_signed_int>:
or     %sil,(%rdi)
ret

LLVM IR (-O0):
define void @unsigned_char_or_signed_char_signed_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = or i32 %8, %5
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
ret void
}

LLVM IR (-O2):
define void @unsigned_char_or_signed_char_signed_int(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = trunc i32 %1 to i8
%5 = or i8 %3, %4
store i8 %5, i8* %0
ret void
}
char f_add(double *a, const double *b) {
  *a = *a + (*b);
  return (0);
}


x86 assembly (clang, -O0):
<f_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
xor    %eax,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_add>:
movsd  (%rdi),%xmm0
addsd  (%rsi),%xmm0
movsd  %xmm0,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @f_add(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = load double*, double** %4
%8 = load double, double* %7
%9 = fadd double %6, %8
%10 = load double*, double** %3
store double %9, double* %10
ret i8 0
}

LLVM IR (-O2):
define signext i8 @f_add(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = fadd double %3, %4
store double %5, double* %0
ret i8 0
}
void set_pmu_sleep_clk_default() {}


x86 assembly (clang, -O0):
<set_pmu_sleep_clk_default>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pmu_sleep_clk_default>:
ret

LLVM IR (-O0):
define void @set_pmu_sleep_clk_default() {
ret void
}

LLVM IR (-O2):
define void @set_pmu_sleep_clk_default() {
ret void
}
unsigned short int f85(unsigned short int x, int y) {
  return (x << ((-y) & (8 * 2 - 1))) + (x >> y);
}


x86 assembly (clang, -O0):
<f85>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movzwl -0x2(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0xf,%ecx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f85>:
mov    %esi,%ecx
neg    %cl
and    $0xf,%cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f85(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = and i32 %8, 15
%10 = shl i32 %6, %9
%11 = load i16, i16* %3
%12 = zext i16 %11 to i32
%13 = load i32, i32* %4
%14 = ashr i32 %12, %13
%15 = add nsw i32 %10, %14
%16 = trunc i32 %15 to i16
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @f85(i16 zeroext %0, i32 %1) {
%3 = zext i16 %0 to i32
%4 = sub nsw i32 0, %1
%5 = and i32 %4, 15
%6 = shl nuw nsw i32 %3, %5
%7 = lshr i32 %3, %1
%8 = add nuw nsw i32 %6, %7
%9 = trunc i32 %8 to i16
ret i16 %9
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void wr_stars(int star_countr) {
  int i2;
  i2 = -1;
  ft_putchar('/');
  while (++i2 != star_countr)
    ft_putchar('*');
  ft_putchar('\\');
  ft_putchar('\n');
}


x86 assembly (clang, -O0):
<wr_stars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    $0x2f,%edi
call   1030 <ft_putchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    -0x4(%rbp),%eax
je     114d <wr_stars+0x3d>
mov    $0x2a,%edi
call   1030 <ft_putchar@plt>
jmp    112c <wr_stars+0x1c>
mov    $0x5c,%edi
call   1030 <ft_putchar@plt>
mov    $0xa,%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wr_stars>:
push   %rbx
mov    %edi,%ebx
mov    $0x2f,%edi
call   1030 <ft_putchar@plt>
test   %ebx,%ebx
je     113f <wr_stars+0x2f>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x2a,%edi
call   1030 <ft_putchar@plt>
add    $0xffffffff,%ebx
jne    1130 <wr_stars+0x20>
mov    $0x5c,%edi
call   1030 <ft_putchar@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @wr_stars(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -1, i32* %3
%4 = call i32 @ft_putchar(i8 signext 47)
br label %5
5: ; preds = %10, %1
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = icmp ne i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %5
%11 = call i32 @ft_putchar(i8 signext 42)
br label %5
12: ; preds = %5
%13 = call i32 @ft_putchar(i8 signext 92)
%14 = call i32 @ft_putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @wr_stars(i32 %0) {
%2 = tail call i32 @ft_putchar(i8 signext 47)
%3 = icmp eq i32 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 @ft_putchar(i8 signext 42)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %4
9: ; preds = %4, %1
%10 = tail call i32 @ft_putchar(i8 signext 92)
%11 = tail call i32 @ft_putchar(i8 signext 10)
ret void
}
int test_imm_C4uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xc4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4uint64_lowword_reg>:
test   $0xc4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 196
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_C4uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 196
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ BezierCircle(double, char *);
int /*<<< orphan*/ SetTransferMatrix(int, int /*<<< orphan*/,
                                     int /*<<< orphan*/, int, double, double);
void Vertex(double *args) {
  SetTransferMatrix(1, 0, 0, 1, args[0], args[1]);
  BezierCircle(args[2], "f");
}


x86 assembly (clang, -O0):
<Vertex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    $0x1,%ecx
xor    %edx,%edx
mov    %ecx,%edi
mov    %edx,%esi
call   1040 <SetTransferMatrix@plt>
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
lea    0xea3(%rip),%rdi
call   1030 <BezierCircle@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vertex>:
push   %rbx
mov    %rdi,%rbx
movsd  (%rdi),%xmm0
movsd  0x8(%rdi),%xmm1
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1040 <SetTransferMatrix@plt>
movsd  0x10(%rbx),%xmm0
lea    0xeb4(%rip),%rdi
pop    %rbx
jmp    1030 <BezierCircle@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define void @Vertex(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 1
%8 = load double, double* %7
%9 = call i32 @SetTransferMatrix(i32 1, i32 0, i32 0, i32 1, double %5, double %8)
%10 = load double*, double** %2
%11 = getelementptr inbounds double, double* %10, i64 2
%12 = load double, double* %11
%13 = call i32 @BezierCircle(double %12, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define void @Vertex(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = tail call i32 @SetTransferMatrix(i32 1, i32 0, i32 0, i32 1, double %2, double %4)
%6 = getelementptr inbounds double, double* %0, i64 2
%7 = load double, double* %6
%8 = tail call i32 @BezierCircle(double %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool nrf51_errata_14(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_14>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_14>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_14() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_14() {
ret i32 0
}
/* Type definitions */
typedef long clock_t;

/* Variables and functions */
long CLOCKS_PER_SEC;
long clock();
clock_t get_ticks_us(void) { return clock() / (CLOCKS_PER_SEC / 1000000L); }


x86 assembly (clang, -O0):
<get_ticks_us>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <clock@plt>
mov    %rax,-0x8(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%rax
mov    $0xf4240,%ecx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
cqto
idiv   %rcx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ticks_us>:
push   %rax
xor    %eax,%eax
call   1030 <clock@plt>
mov    %rax,%rcx
mov    0x2ec6(%rip),%rdx
movabs $0x431bde82d7b634db,%rax
de 1b 43
imulq  (%rdx)
mov    %rdx,%rsi
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x12,%rsi
add    %rax,%rsi
mov    %rcx,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1156 <get_ticks_us+0x46>
mov    %rcx,%rax
cqto
idiv   %rsi
pop    %rcx
ret
mov    %ecx,%eax
xor    %edx,%edx
div    %esi
pop    %rcx
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i64 0
define i64 @get_ticks_us() {
%1 = call i64 (...) @clock()
%2 = load i64, i64* @CLOCKS_PER_SEC
%3 = sdiv i64 %2, 1000000
%4 = sdiv i64 %1, %3
ret i64 %4
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i64 0
define i64 @get_ticks_us() {
%1 = tail call i64 (...) @clock()
%2 = load i64, i64* @CLOCKS_PER_SEC
%3 = sdiv i64 %2, 1000000
%4 = sdiv i64 %1, %3
ret i64 %4
}
void construct_lm(struct All_variables *E) { return; }


x86 assembly (clang, -O0):
<construct_lm>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<construct_lm>:
ret

LLVM IR (-O0):
%struct.All_variables = type opaque
define void @construct_lm(%struct.All_variables* %0) {
%2 = alloca %struct.All_variables*
store %struct.All_variables* %0, %struct.All_variables** %2
ret void
}

LLVM IR (-O2):
%struct.All_variables = type opaque
define void @construct_lm(%struct.All_variables* nocapture %0) {
ret void
}
/* Variables and functions */
bool sancus_get_urzu(size_t v, size_t a, size_t b, unsigned *out) {
  if ((v >= a) && (v <= b)) {
    if (out != NULL)
      *out = (unsigned)v;
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<sancus_get_urzu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jb     1153 <sancus_get_urzu+0x53>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
ja     1153 <sancus_get_urzu+0x53>
cmpq   $0x0,-0x28(%rbp)
je     1147 <sancus_get_urzu+0x47>
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    115a <sancus_get_urzu+0x5a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sancus_get_urzu>:
xor    %eax,%eax
cmp    %rsi,%rdi
jb     1118 <sancus_get_urzu+0x18>
cmp    %rdx,%rdi
ja     1118 <sancus_get_urzu+0x18>
mov    $0x1,%eax
test   %rcx,%rcx
je     1118 <sancus_get_urzu+0x18>
mov    %edi,(%rcx)
ret

LLVM IR (-O0):
define i32 @sancus_get_urzu(i64 %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32*
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i32* %3, i32** %9
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = icmp uge i64 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %4
%14 = load i64, i64* %6
%15 = load i64, i64* %8
%16 = icmp ule i64 %14, %15
br i1 %16, label %17, label %25
17: ; preds = %13
%18 = load i32*, i32** %9
%19 = icmp ne i32* %18, null
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i64, i64* %6
%22 = trunc i64 %21 to i32
%23 = load i32*, i32** %9
store i32 %22, i32* %23
br label %24
24: ; preds = %20, %17
store i32 1, i32* %5
br label %26
25: ; preds = %13, %4
store i32 0, i32* %5
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %5
ret i32 %27
}

LLVM IR (-O2):
define i32 @sancus_get_urzu(i64 %0, i64 %1, i64 %2, i32* writeonly %3) {
%5 = icmp ult i64 %0, %1
%6 = icmp ugt i64 %0, %2
%7 = or i1 %5, %6
br i1 %7, label %12, label %8
8: ; preds = %4
%9 = icmp eq i32* %3, null
br i1 %9, label %12, label %10
10: ; preds = %8
%11 = trunc i64 %0 to i32
store i32 %11, i32* %3
br label %12
12: ; preds = %4, %8, %10
%13 = phi i32 [ 1, %10 ], [ 1, %8 ], [ 0, %4 ]
ret i32 %13
}