xunge/DecIR huggingface dataset:
void pvec2str(cptr, iptr) char *cptr;
int *iptr;
{
  while (*iptr != (-1)) {
    *cptr++ = (0377 & *iptr++);
  }
  *cptr = 0;
}


x86 assembly (clang, -O0):
<pvec2str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0xffffffff,(%rax)
je     1147 <pvec2str+0x47>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    110c <pvec2str+0xc>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvec2str>:
mov    (%rsi),%eax
cmp    $0xffffffff,%eax
je     1121 <pvec2str+0x21>
add    $0x4,%rsi
nopl   0x0(%rax,%rax,1)
mov    %al,(%rdi)
add    $0x1,%rdi
mov    (%rsi),%eax
add    $0x4,%rsi
cmp    $0xffffffff,%eax
jne    1110 <pvec2str+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @pvec2str(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
br label %5
5: ; preds = %9, %2
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i32 1
store i32* %11, i32** %4
%12 = load i32, i32* %10
%13 = and i32 255, %12
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
br label %5
17: ; preds = %5
%18 = load i8*, i8** %3
store i8 0, i8* %18
ret void
}

LLVM IR (-O2):
define void @pvec2str(i8* nocapture writeonly %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, -1
br i1 %4, label %14, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %12, %5 ], [ %3, %2 ]
%7 = phi i32* [ %9, %5 ], [ %1, %2 ]
%8 = phi i8* [ %11, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i32, i32* %7, i64 1
%10 = trunc i32 %6 to i8
%11 = getelementptr inbounds i8, i8* %8, i64 1
store i8 %10, i8* %8
%12 = load i32, i32* %9
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %5
14: ; preds = %5, %2
%15 = phi i8* [ %0, %2 ], [ %11, %5 ]
store i8 0, i8* %15
ret void
}
/* Variables and functions */
int strlen(char const *);
int write_bytes(char const *, int);
int write_string(const char *string) {
  int length = strlen(string);
  return write_bytes(string, length);
}


x86 assembly (clang, -O0):
<write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <write_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_string>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <write_bytes@plt>

LLVM IR (-O0):
define i32 @write_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = call i32 @write_bytes(i8* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @write_string(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @write_bytes(i8* %0, i32 %2)
ret i32 %3
}
main() { printf2("hi %d, %s\n", 3, (char[]){'y', 'o', 0}); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x79,-0x3(%rbp)
movb   $0x6f,-0x2(%rbp)
movb   $0x0,-0x1(%rbp)
lea    -0x3(%rbp),%rdx
lea    0xed1(%rip),%rdi
mov    $0x3,%esi
mov    $0x0,%al
call   1030 <printf2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movw   $0x6f79,0x5(%rsp)
movb   $0x0,0x7(%rsp)
lea    0xedc(%rip),%rdi
lea    0x5(%rsp),%rdx
mov    $0x3,%esi
xor    %eax,%eax
call   1030 <printf2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"hi %d, %s\0A\00"
define i32 @main() {
%1 = alloca [3 x i8]
%2 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
store i8 121, i8* %2
%3 = getelementptr inbounds i8, i8* %2, i64 1
store i8 111, i8* %3
%4 = getelementptr inbounds i8, i8* %3, i64 1
store i8 0, i8* %4
%5 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
%6 = call i32 (i8*, i32, i8*, ...) bitcast (i32 (...)* @printf2 to i32 (i8*, i32, i8*, ...)*)(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 3, i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"hi %d, %s\0A\00"
define i32 @main() {
%1 = alloca [3 x i8]
%2 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 0
store i8 121, i8* %2
%3 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 1
store i8 111, i8* %3
%4 = getelementptr inbounds [3 x i8], [3 x i8]* %1, i64 0, i64 2
store i8 0, i8* %4
%5 = call i32 (i8*, i32, i8*, ...) bitcast (i32 (...)* @printf2 to i32 (i8*, i32, i8*, ...)*)(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 3, i8* %2)
ret i32 0
}
void gtk_entry_completion_get_model() {}


x86 assembly (clang, -O0):
<gtk_entry_completion_get_model>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_entry_completion_get_model>:
ret

LLVM IR (-O0):
define void @gtk_entry_completion_get_model() {
ret void
}

LLVM IR (-O2):
define void @gtk_entry_completion_get_model() {
ret void
}
void up_set_gauge_byte(int current) {}


x86 assembly (clang, -O0):
<up_set_gauge_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<up_set_gauge_byte>:
ret

LLVM IR (-O0):
define void @up_set_gauge_byte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @up_set_gauge_byte(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int vsnprintf(char *, int, char *, int /*<<< orphan*/);
int _vsnprint(char *buf, int n, char *fmt, va_list ap) {
  return vsnprintf(buf, n, fmt, ap);
}


x86 assembly (clang, -O0):
<_vsnprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <vsnprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vsnprint>:
jmp    1030 <vsnprintf@plt>

LLVM IR (-O0):
define i32 @_vsnprint(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 @vsnprintf(i8* %9, i32 %10, i8* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @_vsnprint(i8* nocapture %0, i32 %1, i8* nocapture %2, i32 %3) {
%5 = tail call i32 @vsnprintf(i8* %0, i32 %1, i8* %2, i32 %3)
ret i32 %5
}
void foo_1_2_2_1_1_2_2_1_2() {}


x86 assembly (clang, -O0):
<foo_1_2_2_1_1_2_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_2_2_1_1_2_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_1_2_2_1_1_2_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_2_2_1_1_2_2_1_2() {
ret void
}
double hpt_elapsed_time(const unsigned long long start,
                        const unsigned long long end,
                        const unsigned long long freq) {
  return (double)(end - start) / (double)freq;
}


x86 assembly (clang, -O0):
<hpt_elapsed_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
movq   %rax,%xmm0
movaps 0xed9(%rip),%xmm3
punpckldq %xmm3,%xmm0
movapd 0xedd(%rip),%xmm2
subpd  %xmm2,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movq   -0x18(%rbp),%xmm1
punpckldq %xmm3,%xmm1
subpd  %xmm2,%xmm1
movaps %xmm1,%xmm2
unpckhpd %xmm1,%xmm1
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<hpt_elapsed_time>:
sub    %rdi,%rsi
movq   %rsi,%xmm1
movdqa 0xef0(%rip),%xmm2
punpckldq %xmm2,%xmm1
movapd 0xef4(%rip),%xmm3
subpd  %xmm3,%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
movq   %rdx,%xmm1
punpckldq %xmm2,%xmm1
subpd  %xmm3,%xmm1
movapd %xmm1,%xmm2
unpckhpd %xmm1,%xmm2
addsd  %xmm1,%xmm2
divsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @hpt_elapsed_time(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = sub i64 %7, %8
%10 = uitofp i64 %9 to double
%11 = load i64, i64* %6
%12 = uitofp i64 %11 to double
%13 = fdiv double %10, %12
ret double %13
}

LLVM IR (-O2):
define double @hpt_elapsed_time(i64 %0, i64 %1, i64 %2) {
%4 = sub i64 %1, %0
%5 = uitofp i64 %4 to double
%6 = uitofp i64 %2 to double
%7 = fdiv double %5, %6
ret double %7
}
/* Type definitions */
struct iax_session {
  int dummy;
};

/* Variables and functions */
int __send_command(struct iax_session *, char, int, unsigned int,
                   unsigned char *, int, int, int /*<<< orphan*/,
                   int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int send_command(struct iax_session *i, char type, int command, unsigned int ts,
                 unsigned char *data, int datalen, int seqno) {
  return __send_command(i, type, command, ts, data, datalen, seqno, 0, 0, 0, 0);
}


x86 assembly (clang, -O0):
<send_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %sil,%al
mov    0x10(%rbp),%esi
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%sil
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
mov    0x10(%rbp),%eax
xor    %r10d,%r10d
movsbl %sil,%esi
mov    %eax,(%rsp)
movl   $0x0,0x8(%rsp)
movl   $0x0,0x10(%rsp)
movl   $0x0,0x18(%rsp)
movl   $0x0,0x20(%rsp)
call   1030 <__send_command@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_command>:
push   %rax
mov    0x10(%rsp),%eax
sub    $0x8,%rsp
push   $0x0
push   $0x0
push   $0x0
push   $0x0
push   %rax
call   1030 <__send_command@plt>
add    $0x30,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.iax_session = type { i32 }
define i32 @send_command(%struct.iax_session* %0, i8 signext %1, i32 %2, i32 %3, i8* %4, i32 %5, i32 %6) {
%8 = alloca %struct.iax_session*
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i32
%14 = alloca i32
store %struct.iax_session* %0, %struct.iax_session** %8
store i8 %1, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load %struct.iax_session*, %struct.iax_session** %8
%16 = load i8, i8* %9
%17 = load i32, i32* %10
%18 = load i32, i32* %11
%19 = load i8*, i8** %12
%20 = load i32, i32* %13
%21 = load i32, i32* %14
%22 = call i32 @__send_command(%struct.iax_session* %15, i8 signext %16, i32 %17, i32 %18, i8* %19, i32 %20, i32 %21, i32 0, i32 0, i32 0, i32 0)
ret i32 %22
}

LLVM IR (-O2):
%struct.iax_session = type { i32 }
define i32 @send_command(%struct.iax_session* %0, i8 signext %1, i32 %2, i32 %3, i8* %4, i32 %5, i32 %6) {
%8 = tail call i32 @__send_command(%struct.iax_session* %0, i8 signext %1, i32 %2, i32 %3, i8* %4, i32 %5, i32 %6, i32 0, i32 0, i32 0, i32 0)
ret i32 %8
}
void w_quick_sort_string_restore(void *data, int i, void *key) {
  char **k = (char **)key;
  char **str = (char **)data;
  str[i] = *k;
}


x86 assembly (clang, -O0):
<w_quick_sort_string_restore>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rdx
mov    -0x28(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_quick_sort_string_restore>:
mov    (%rdx),%rax
movslq %esi,%rcx
mov    %rax,(%rdi,%rcx,8)
ret

LLVM IR (-O0):
define void @w_quick_sort_string_restore(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i8**
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%9 = load i8*, i8** %6
%10 = bitcast i8* %9 to i8**
store i8** %10, i8*** %7
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i8**
store i8** %12, i8*** %8
%13 = load i8**, i8*** %7
%14 = load i8*, i8** %13
%15 = load i8**, i8*** %8
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8*, i8** %15, i64 %17
store i8* %14, i8** %18
ret void
}

LLVM IR (-O2):
define void @w_quick_sort_string_restore(i8* nocapture writeonly %0, i32 %1, i8* nocapture %2) {
%4 = bitcast i8* %2 to i8**
%5 = bitcast i8* %0 to i8**
%6 = load i8*, i8** %4
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
store i8* %6, i8** %8
ret void
}
/* Variables and functions */
int hexdump_helper(void *, int, int /*<<< orphan*/);
int hexdump(void *data, int len) { return hexdump_helper(data, len, 0); }


x86 assembly (clang, -O0):
<hexdump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <hexdump_helper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexdump>:
xor    %edx,%edx
jmp    1030 <hexdump_helper@plt>

LLVM IR (-O0):
define i32 @hexdump(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @hexdump_helper(i8* %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @hexdump(i8* %0, i32 %1) {
%3 = tail call i32 @hexdump_helper(i8* %0, i32 %1, i32 0)
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ detail;
};
struct TYPE_4__ {
  TYPE_1__ xfocus;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xfocus_detail(void *_p) {
  return (int)((XEvent *)_p)->xfocus.detail;
}


x86 assembly (clang, -O0):
<get_XEvent_xfocus_detail>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xfocus_detail>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xfocus_detail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xfocus_detail(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int w5100_readSn_byte(unsigned int, int);
unsigned w5100_readSnPROTO(unsigned sock) {
  return w5100_readSn_byte(sock, 0x0014);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x14,%esi
call   1030 <w5100_readSn_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x14,%esi
jmp    1030 <w5100_readSn_byte@plt>

LLVM IR (-O0):
define i32 @w5100_readSnPROTO(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @w5100_readSn_byte(i32 %3, i32 20)
ret i32 %4
}

LLVM IR (-O2):
define i32 @w5100_readSnPROTO(i32 %0) {
%2 = tail call i32 @w5100_readSn_byte(i32 %0, i32 20)
ret i32 %2
}
void gcf(float *gammcf, float a, float x, float *gln) {}


x86 assembly (clang, -O0):
<gcf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcf>:
ret

LLVM IR (-O0):
define void @gcf(float* %0, float %1, float %2, float* %3) {
%5 = alloca float*
%6 = alloca float
%7 = alloca float
%8 = alloca float*
store float* %0, float** %5
store float %1, float* %6
store float %2, float* %7
store float* %3, float** %8
ret void
}

LLVM IR (-O2):
define void @gcf(float* nocapture %0, float %1, float %2, float* nocapture %3) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
uint32_t EPINonBlockingReadCount(uint32_t ui32Base, uint32_t ui32Channel) {
  uint32_t ui32Offset;
  ASSERT(ui32Base == 0x400D0000);
  ASSERT(ui32Channel < 2);
  ui32Offset = ui32Channel * (0x00000038 - 0x00000028);
  return ((*((volatile uint32_t *)(ui32Base + 0x00000028 + ui32Offset))));
}


x86 assembly (clang, -O0):
<EPINonBlockingReadCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x400d0000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x2,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x28,%eax
add    -0xc(%rbp),%eax
cltq
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPINonBlockingReadCount>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x400d0000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x2,%ebx
setl   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
shl    $0x4,%rax
movslq %ebp,%rcx
mov    0x28(%rcx,%rax,1),%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @EPINonBlockingReadCount(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 1074593792
%8 = zext i1 %7 to i32
%9 = call i32 @ASSERT(i32 %8)
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 2
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = mul nsw i32 %14, 16
store i32 %15, i32* %5
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 40
%18 = load i32, i32* %5
%19 = add nsw i32 %17, %18
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
%22 = load volatile i32, i32* %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @EPINonBlockingReadCount(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1074593792
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = icmp slt i32 %1, 2
%7 = zext i1 %6 to i32
%8 = tail call i32 @ASSERT(i32 %7)
%9 = shl nsw i32 %1, 4
%10 = add nsw i32 %0, 40
%11 = add nsw i32 %10, %9
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
%14 = load volatile i32, i32* %13
ret i32 %14
}
/* Variables and functions */
int exact_square(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number = 0;
  scanf("%d", &number);
  exact_square(number);
  printf("%d\n", exact_square(number));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xeb3(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    %eax,%esi
lea    0xe94(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <exact_square@plt>
mov    0x4(%rsp),%edi
call   1040 <exact_square@plt>
lea    0xea0(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @exact_square(i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @exact_square(i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @exact_square(i32 %4)
%6 = load i32, i32* %1
%7 = call i32 @exact_square(i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ Interpolate_2(int /*<<< orphan*/, int, int /*<<< orphan*/,
                                 int, int);
void Interp8(uint32_t *pc, uint32_t c1, uint32_t c2) {
  *pc = Interpolate_2(c1, 5, c2, 3, 3);
}


x86 assembly (clang, -O0):
<Interp8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%edx
mov    $0x5,%esi
mov    $0x3,%r8d
mov    %r8d,%ecx
call   1030 <Interpolate_2@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp8>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
mov    $0x5,%esi
mov    $0x3,%ecx
mov    $0x3,%r8d
call   1030 <Interpolate_2@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @Interp8(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = call i32 @Interpolate_2(i32 %7, i32 5, i32 %8, i32 3, i32 3)
%10 = load i32*, i32** %4
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @Interp8(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = tail call i32 @Interpolate_2(i32 %1, i32 5, i32 %2, i32 3, i32 3)
store i32 %4, i32* %0
ret void
}
unsigned short UMVLine16Y_11(short unsigned int *Pic, int y, int width) {
  if (y != width) {
    y = y < 0 ? 0 : y;
    return Pic[y * width];
  }
  return Pic[y];
}


x86 assembly (clang, -O0):
<UMVLine16Y_11>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
je     1155 <UMVLine16Y_11+0x55>
cmpl   $0x0,-0x14(%rbp)
jge    112e <UMVLine16Y_11+0x2e>
xor    %eax,%eax
mov    %eax,-0x1c(%rbp)
jmp    1134 <UMVLine16Y_11+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
imul   -0x18(%rbp),%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x2(%rbp)
jmp    1165 <UMVLine16Y_11+0x65>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UMVLine16Y_11>:
xor    %eax,%eax
test   %esi,%esi
cmovns %esi,%eax
imul   %edx,%eax
cmp    %edx,%esi
cmove  %esi,%eax
cltq
movzwl (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define zeroext i16 @UMVLine16Y_11(i16* %0, i32 %1, i32 %2) {
%4 = alloca i16
%5 = alloca i16*
%6 = alloca i32
%7 = alloca i32
store i16* %0, i16** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = icmp ne i32 %8, %9
br i1 %10, label %11, label %26
11: ; preds = %3
%12 = load i32, i32* %6
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %11
br label %17
15: ; preds = %11
%16 = load i32, i32* %6
br label %17
17: ; preds = %15, %14
%18 = phi i32 [ 0, %14 ], [ %16, %15 ]
store i32 %18, i32* %6
%19 = load i16*, i16** %5
%20 = load i32, i32* %6
%21 = load i32, i32* %7
%22 = mul nsw i32 %20, %21
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i16, i16* %19, i64 %23
%25 = load i16, i16* %24
store i16 %25, i16* %4
br label %32
26: ; preds = %3
%27 = load i16*, i16** %5
%28 = load i32, i32* %6
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i16, i16* %27, i64 %29
%31 = load i16, i16* %30
store i16 %31, i16* %4
br label %32
32: ; preds = %26, %17
%33 = load i16, i16* %4
ret i16 %33
}

LLVM IR (-O2):
define zeroext i16 @UMVLine16Y_11(i16* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, %2
%5 = icmp sgt i32 %1, 0
%6 = select i1 %5, i32 %1, i32 0
%7 = mul nsw i32 %6, %2
%8 = select i1 %4, i32 %1, i32 %7
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i16, i16* %0, i64 %9
%11 = load i16, i16* %10
ret i16 %11
}
/* Variables and functions */
char *_getAvdContentPath(char const *);
char *_getAvdTargetArch(char *);
char *path_getAvdTargetArch(const char *avdName) {
  char *avdPath = _getAvdContentPath(avdName);
  char *avdArch = _getAvdTargetArch(avdPath);
  return avdArch;
}


x86 assembly (clang, -O0):
<path_getAvdTargetArch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_getAvdContentPath@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <_getAvdTargetArch@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_getAvdTargetArch>:
push   %rax
call   1030 <_getAvdContentPath@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <_getAvdTargetArch@plt>

LLVM IR (-O0):
define i8* @path_getAvdTargetArch(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @_getAvdContentPath(i8* %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = call i8* @_getAvdTargetArch(i8* %7)
store i8* %8, i8** %4
%9 = load i8*, i8** %4
ret i8* %9
}

LLVM IR (-O2):
define i8* @path_getAvdTargetArch(i8* %0) {
%2 = tail call i8* @_getAvdContentPath(i8* %0)
%3 = tail call i8* @_getAvdTargetArch(i8* %2)
ret i8* %3
}
int another_level_deep() { return 1; }


x86 assembly (clang, -O0):
<another_level_deep>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<another_level_deep>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @another_level_deep() {
ret i32 1
}

LLVM IR (-O2):
define i32 @another_level_deep() {
ret i32 1
}
void BN_BLINDING_invert_ex(void) {}


x86 assembly (clang, -O0):
<BN_BLINDING_invert_ex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_BLINDING_invert_ex>:
ret

LLVM IR (-O0):
define void @BN_BLINDING_invert_ex() {
ret void
}

LLVM IR (-O2):
define void @BN_BLINDING_invert_ex() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ reverse_string(char *);
char *strdup(char const *);
char *rstrdup(const char *str) {
  if (!str)
    return NULL;
  char *rstr = strdup(str);
  reverse_string(rstr);
  return rstr;
}


x86 assembly (clang, -O0):
<rstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <rstrdup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1162 <rstrdup+0x42>
mov    -0x10(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <reverse_string@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rstrdup>:
push   %rbx
test   %rdi,%rdi
je     1138 <rstrdup+0x18>
call   1040 <strdup@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <reverse_string@plt>
jmp    113a <rstrdup+0x1a>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @rstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i8* @strdup(i8* %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @reverse_string(i8* %11)
%13 = load i8*, i8** %4
store i8* %13, i8** %2
br label %14
14: ; preds = %8, %7
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @rstrdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i8* @strdup(i8* %0)
%5 = tail call i32 @reverse_string(i8* %4)
br label %6
6: ; preds = %1, %3
%7 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %7
}
/* Type definitions */
struct drm_file {
  int dummy;
};
struct drm_device {
  int dummy;
};

/* Variables and functions */
int radeon_do_resume_cp(struct drm_device *);
int radeon_cp_resume(struct drm_device *dev, void *data,
                     struct drm_file *file_priv) {
  return radeon_do_resume_cp(dev);
}


x86 assembly (clang, -O0):
<radeon_cp_resume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <radeon_do_resume_cp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radeon_cp_resume>:
jmp    1030 <radeon_do_resume_cp@plt>

LLVM IR (-O0):
%struct.drm_device = type { i32 }
%struct.drm_file = type { i32 }
define i32 @radeon_cp_resume(%struct.drm_device* %0, i8* %1, %struct.drm_file* %2) {
%4 = alloca %struct.drm_device*
%5 = alloca i8*
%6 = alloca %struct.drm_file*
store %struct.drm_device* %0, %struct.drm_device** %4
store i8* %1, i8** %5
store %struct.drm_file* %2, %struct.drm_file** %6
%7 = load %struct.drm_device*, %struct.drm_device** %4
%8 = call i32 @radeon_do_resume_cp(%struct.drm_device* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.drm_device = type { i32 }
%struct.drm_file = type { i32 }
define i32 @radeon_cp_resume(%struct.drm_device* %0, i8* nocapture readnone %1, %struct.drm_file* nocapture readnone %2) {
%4 = tail call i32 @radeon_do_resume_cp(%struct.drm_device* %0)
ret i32 %4
}
/* Variables and functions */
short bclr_h(short *, short *);
short intr_wrap_518(short p1, short p2) { return bclr_h(&p1, &p2); }


x86 assembly (clang, -O0):
<intr_wrap_518>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
lea    -0x2(%rbp),%rdi
lea    -0x4(%rbp),%rsi
call   1030 <bclr_h@plt>
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_518>:
push   %rax
mov    %di,0x6(%rsp)
mov    %si,0x4(%rsp)
lea    0x6(%rsp),%rdi
lea    0x4(%rsp),%rsi
call   1030 <bclr_h@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i16 @intr_wrap_518(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = call signext i16 @bclr_h(i16* %3, i16* %4)
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @intr_wrap_518(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = call signext i16 @bclr_h(i16* %3, i16* %4)
ret i16 %5
}
/* Variables and functions */
scalar_t__ is_prime(int, int);
int first_larger_prime(int n) {
  if (is_prime(n + 1, 3))
    return n + 1;
  else
    return first_larger_prime(n + 1);
}


x86 assembly (clang, -O0):
<first_larger_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
add    $0x1,%edi
mov    $0x3,%esi
call   1040 <is_prime@plt>
cmp    $0x0,%rax
je     1153 <first_larger_prime+0x33>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <first_larger_prime+0x41>
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1030 <first_larger_prime@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<first_larger_prime>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0x1,%ebx
mov    %ebx,%edi
mov    $0x3,%esi
call   1030 <is_prime@plt>
test   %rax,%rax
je     1120 <first_larger_prime+0x10>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @first_larger_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
%6 = call i64 @is_prime(i32 %5, i32 3)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
%14 = call i32 @first_larger_prime(i32 %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @first_larger_prime(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %4, %2 ]
%4 = add nsw i32 %3, 1
%5 = tail call i64 @is_prime(i32 %4, i32 3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %2, label %7
7: ; preds = %2
ret i32 %4
}
void RTProcWait(void) {}


x86 assembly (clang, -O0):
<RTProcWait>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTProcWait>:
ret

LLVM IR (-O0):
define void @RTProcWait() {
ret void
}

LLVM IR (-O2):
define void @RTProcWait() {
ret void
}
/* Variables and functions */
int nvidia_mcp_gpio_set(int, int);
int nvidia_mcp_gpio31_raise(void) { return nvidia_mcp_gpio_set(0x31, 0x01); }


x86 assembly (clang, -O0):
<nvidia_mcp_gpio31_raise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x31,%edi
mov    $0x1,%esi
call   1030 <nvidia_mcp_gpio_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvidia_mcp_gpio31_raise>:
mov    $0x31,%edi
mov    $0x1,%esi
jmp    1030 <nvidia_mcp_gpio_set@plt>

LLVM IR (-O0):
define i32 @nvidia_mcp_gpio31_raise() {
%1 = call i32 @nvidia_mcp_gpio_set(i32 49, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @nvidia_mcp_gpio31_raise() {
%1 = tail call i32 @nvidia_mcp_gpio_set(i32 49, i32 1)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, float *);
int main() {
  float nota;
  printf("\nDigite sua nota:");
  scanf("%f", &nota);
  if (nota >= 6) {
    printf("\nAprovado");
  } else {
    printf("\nReprovado");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
movss  -0x8(%rbp),%xmm0
movss  0xea8(%rip),%xmm1
ucomiss %xmm1,%xmm0
jb     1172 <main+0x52>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
jmp    117e <main+0x5e>
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
movss  0x4(%rsp),%xmm0
ucomiss 0xeb5(%rip),%xmm0
lea    0xed1(%rip),%rax
lea    0xec0(%rip),%rdi
cmovb  %rax,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"\0ADigite sua nota:\00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [10 x i8] c"\0AAprovado\00"
@.str.3 = [11 x i8] c"\0AReprovado\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %2)
%5 = load float, float* %2
%6 = fcmp oge float %5, 6.000000e+00
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0))
br label %11
9: ; preds = %0
%10 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0))
br label %11
11: ; preds = %9, %7
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"\0ADigite sua nota:\00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [10 x i8] c"\0AAprovado\00"
@.str.3 = [11 x i8] c"\0AReprovado\00"
define i32 @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %1)
%5 = load float, float* %1
%6 = fcmp ult float %5, 6.000000e+00
%7 = select i1 %6, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0)
%8 = call i32 @printf(i8* dereferenceable(1) %7)
ret i32 0
}
void Timer_1_Enable(void) {}


x86 assembly (clang, -O0):
<Timer_1_Enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Timer_1_Enable>:
ret

LLVM IR (-O0):
define void @Timer_1_Enable() {
ret void
}

LLVM IR (-O2):
define void @Timer_1_Enable() {
ret void
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_insert(struct list *, int, void const *);
int list_size(struct list *);
void list_append(struct list *list, const void *element) {
  int n = list_size(list) + 1;
  list_insert(list, n, element);
}


x86 assembly (clang, -O0):
<list_append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <list_size@plt>
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1040 <list_insert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_append>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <list_size@plt>
lea    0x1(%rax),%esi
mov    %rbx,%rdi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <list_insert@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_append(%struct.list* %0, i8* %1) {
%3 = alloca %struct.list*
%4 = alloca i8*
%5 = alloca i32
store %struct.list* %0, %struct.list** %3
store i8* %1, i8** %4
%6 = load %struct.list*, %struct.list** %3
%7 = call i32 @list_size(%struct.list* %6)
%8 = add nsw i32 %7, 1
store i32 %8, i32* %5
%9 = load %struct.list*, %struct.list** %3
%10 = load i32, i32* %5
%11 = load i8*, i8** %4
%12 = call i32 @list_insert(%struct.list* %9, i32 %10, i8* %11)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_append(%struct.list* %0, i8* %1) {
%3 = tail call i32 @list_size(%struct.list* %0)
%4 = add nsw i32 %3, 1
%5 = tail call i32 @list_insert(%struct.list* %0, i32 %4, i8* %1)
ret void
}
signed long long f41(signed int v_a) {
  signed int v_shl = v_a << 2;
  signed int v_shr = ((unsigned int)v_shl) >> 4;
  signed long long v_ext = (unsigned long long)v_shr;
  return v_ext;
}


x86 assembly (clang, -O0):
<f41>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f41>:
mov    %edi,%eax
shr    $0x2,%eax
and    $0xfffffff,%eax
ret

LLVM IR (-O0):
define i64 @f41(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = shl i32 %6, 2
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = lshr i32 %8, 4
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
store i64 %11, i64* %5
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @f41(i32 %0) {
%2 = lshr i32 %0, 2
%3 = and i32 %2, 268435455
%4 = zext i32 %3 to i64
ret i64 %4
}
/* Type definitions */
struct Curl_sh_entry {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Curl_cfree(struct Curl_sh_entry *);
void sh_freeentry(void *freethis) {
  struct Curl_sh_entry *p = (struct Curl_sh_entry *)freethis;
  Curl_cfree(p);
}


x86 assembly (clang, -O0):
<sh_freeentry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <Curl_cfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sh_freeentry>:
jmp    1030 <Curl_cfree@plt>

LLVM IR (-O0):
%struct.Curl_sh_entry = type { i32 }
define void @sh_freeentry(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.Curl_sh_entry*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.Curl_sh_entry*
store %struct.Curl_sh_entry* %5, %struct.Curl_sh_entry** %3
%6 = load %struct.Curl_sh_entry*, %struct.Curl_sh_entry** %3
%7 = call i32 @Curl_cfree(%struct.Curl_sh_entry* %6)
ret void
}

LLVM IR (-O2):
%struct.Curl_sh_entry = type { i32 }
define void @sh_freeentry(i8* %0) {
%2 = bitcast i8* %0 to %struct.Curl_sh_entry*
%3 = tail call i32 @Curl_cfree(%struct.Curl_sh_entry* %2)
ret void
}
void *sanb_mem_read_ptr(void **v) {
  volatile void **p = (volatile void **)v;
  return ((void *)(*p));
}


x86 assembly (clang, -O0):
<sanb_mem_read_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sanb_mem_read_ptr>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i8* @sanb_mem_read_ptr(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
store i8** %4, i8*** %3
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
ret i8* %6
}

LLVM IR (-O2):
define i8* @sanb_mem_read_ptr(i8** nocapture %0) {
%2 = load i8*, i8** %0
ret i8* %2
}
/* Type definitions */
struct atrf_dsc {
  int dummy;
};

/* Variables and functions */
void *atrf_usb_handle(struct atrf_dsc *dsc) { return NULL; }


x86 assembly (clang, -O0):
<atrf_usb_handle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atrf_usb_handle>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.atrf_dsc = type { i32 }
define i8* @atrf_usb_handle(%struct.atrf_dsc* %0) {
%2 = alloca %struct.atrf_dsc*
store %struct.atrf_dsc* %0, %struct.atrf_dsc** %2
ret i8* null
}

LLVM IR (-O2):
%struct.atrf_dsc = type { i32 }
define noalias i8* @atrf_usb_handle(%struct.atrf_dsc* nocapture readnone %0) {
ret i8* null
}
long fpathconf(int a, int b) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  while (1)
    ;
  return 0;
}


x86 assembly (clang, -O0):
<fpathconf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
lea    0xed9(%rip),%rsi
lea    0xee4(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
jmp    1135 <fpathconf+0x25>

x86 assembly (clang, -O2):
<fpathconf>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
nopl   0x0(%rax,%rax,1)
jmp    1130 <fpathconf+0x20>

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.fpathconf = [10 x i8] c"fpathconf\00"
define i64 @fpathconf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.fpathconf, i64 0, i64 0))
br label %6
6: ; preds = %2, %6
br label %6
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.fpathconf = [10 x i8] c"fpathconf\00"
define i64 @fpathconf(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.fpathconf, i64 0, i64 0))
br label %4
4: ; preds = %2, %4
br label %4
}
int system_is_big_endian(void) {
  int const i = 1;
  return *(char *)&i == 0;
}


x86 assembly (clang, -O0):
<system_is_big_endian>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
movsbl -0x4(%rbp),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_is_big_endian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @system_is_big_endian() {
%1 = alloca i32
store i32 1, i32* %1
%2 = bitcast i32* %1 to i8*
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @system_is_big_endian() {
ret i32 0
}
void rtw_proc_init_one(struct net_device *dev) {}


x86 assembly (clang, -O0):
<rtw_proc_init_one>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtw_proc_init_one>:
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define void @rtw_proc_init_one(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret void
}

LLVM IR (-O2):
%struct.net_device = type opaque
define void @rtw_proc_init_one(%struct.net_device* nocapture %0) {
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ FAIL(char *);
int /*<<< orphan*/ PASS(char *);
int foo();
int main() {
  if (foo() == 10)
    PASS("non-lazy-slide");
  else
    FAIL("non-lazy-slide");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
cmp    $0xa,%eax
jne    1160 <main+0x30>
lea    0xeaa(%rip),%rdi
call   1040 <PASS@plt>
jmp    116c <main+0x3c>
lea    0xe99(%rip),%rdi
call   1050 <FAIL@plt>
mov    0x2e6d(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
lea    0xec1(%rip),%rdi
cmp    $0xa,%eax
jne    114b <main+0x1b>
call   1040 <PASS@plt>
jmp    1150 <main+0x20>
call   1050 <FAIL@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"non-lazy-slide\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = icmp eq i32 %2, 10
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @PASS(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = call i32 @FAIL(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* @EXIT_SUCCESS
ret i32 %9
}

LLVM IR (-O2):
@.str = [15 x i8] c"non-lazy-slide\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = icmp eq i32 %1, 10
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @PASS(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %0
%6 = tail call i32 @FAIL(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %3
%8 = load i32, i32* @EXIT_SUCCESS
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ g();
void f(int n, char *p) {
  *p = 0;
  if (n) {
    *p = 1;
    g();
  }
  *p = 2;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
cmpl   $0x0,-0x4(%rbp)
je     113e <f+0x2e>
mov    -0x10(%rbp),%rax
movb   $0x1,(%rax)
mov    $0x0,%al
call   1030 <g@plt>
mov    -0x10(%rbp),%rax
movb   $0x2,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbx
mov    %rsi,%rbx
test   %edi,%edi
je     1122 <f+0x12>
movb   $0x1,(%rbx)
xor    %eax,%eax
call   1030 <g@plt>
movb   $0x2,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @f(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
store i8 0, i8* %5
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %4
store i8 1, i8* %9
%10 = call i32 (...) @g()
br label %11
11: ; preds = %8, %2
%12 = load i8*, i8** %4
store i8 2, i8* %12
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i8* nocapture writeonly %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %2
store i8 1, i8* %1
%5 = tail call i32 (...) @g()
br label %6
6: ; preds = %4, %2
store i8 2, i8* %1
ret void
}