bpnn_randomize_row(w, m) float *w;
int m;
{
  int i;
  for (i = 0; i <= m; i++) {
    w[i] = 0.1;
  }
}


x86 assembly (clang, -O0):
<bpnn_randomize_row>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jg     1141 <bpnn_randomize_row+0x41>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movss  0xed2(%rip),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <bpnn_randomize_row+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpnn_randomize_row>:
test   %esi,%esi
js     1210 <bpnn_randomize_row+0x110>
lea    0x1(%rsi),%eax
cmp    $0x7,%esi
jae    1117 <bpnn_randomize_row+0x17>
xor    %ecx,%ecx
jmp    1200 <bpnn_randomize_row+0x100>
mov    %eax,%ecx
and    $0xfffffff8,%ecx
lea    -0x8(%rcx),%rdx
mov    %rdx,%rsi
shr    $0x3,%rsi
add    $0x1,%rsi
mov    %esi,%r8d
and    $0x7,%r8d
cmp    $0x38,%rdx
jae    113f <bpnn_randomize_row+0x3f>
xor    %edx,%edx
jmp    11c1 <bpnn_randomize_row+0xc1>
and    $0xfffffffffffffff8,%rsi
xor    %edx,%edx
movaps 0xeb4(%rip),%xmm0
nopl   0x0(%rax)
movups %xmm0,(%rdi,%rdx,4)
movups %xmm0,0x10(%rdi,%rdx,4)
movups %xmm0,0x20(%rdi,%rdx,4)
movups %xmm0,0x30(%rdi,%rdx,4)
movups %xmm0,0x40(%rdi,%rdx,4)
movups %xmm0,0x50(%rdi,%rdx,4)
movups %xmm0,0x60(%rdi,%rdx,4)
movups %xmm0,0x70(%rdi,%rdx,4)
movups %xmm0,0x80(%rdi,%rdx,4)
movups %xmm0,0x90(%rdi,%rdx,4)
movups %xmm0,0xa0(%rdi,%rdx,4)
movups %xmm0,0xb0(%rdi,%rdx,4)
movups %xmm0,0xc0(%rdi,%rdx,4)
movups %xmm0,0xd0(%rdi,%rdx,4)
movups %xmm0,0xe0(%rdi,%rdx,4)
movups %xmm0,0xf0(%rdi,%rdx,4)
add    $0x40,%rdx
add    $0xfffffffffffffff8,%rsi
jne    1150 <bpnn_randomize_row+0x50>
test   %r8,%r8
je     11f2 <bpnn_randomize_row+0xf2>
lea    (%rdi,%rdx,4),%rdx
add    $0x10,%rdx
shl    $0x5,%r8
xor    %esi,%esi
movaps 0xe25(%rip),%xmm0
nopl   0x0(%rax,%rax,1)
movups %xmm0,-0x10(%rdx,%rsi,1)
movups %xmm0,(%rdx,%rsi,1)
add    $0x20,%rsi
cmp    %rsi,%r8
jne    11e0 <bpnn_randomize_row+0xe0>
cmp    %rax,%rcx
je     1210 <bpnn_randomize_row+0x110>
nopw   0x0(%rax,%rax,1)
movl   $0x3dcccccd,(%rdi,%rcx,4)
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1200 <bpnn_randomize_row+0x100>
ret

LLVM IR (-O0):
define i32 @bpnn_randomize_row(float* %0, i32 %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca i32
%6 = alloca i32
store float* %0, float** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %16, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load float*, float** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds float, float* %12, i64 %14
store float 0x3FB99999A0000000, float* %15
br label %16
16: ; preds = %11
%17 = load i32, i32* %6
%18 = add nsw i32 %17, 1
store i32 %18, i32* %6
br label %7
19: ; preds = %7
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @bpnn_randomize_row(float* nocapture writeonly %0, i32 %1) {
%3 = icmp slt i32 %1, 0
br i1 %3, label %84, label %4
4: ; preds = %2
%5 = add nuw i32 %1, 1
%6 = zext i32 %5 to i64
%7 = icmp ult i32 %1, 7
br i1 %7, label %77, label %8
8: ; preds = %4
%9 = and i64 %6, 4294967288
%10 = add nsw i64 %9, -8
%11 = lshr exact i64 %10, 3
%12 = add nuw nsw i64 %11, 1
%13 = and i64 %12, 7
%14 = icmp ult i64 %10, 56
br i1 %14, label %62, label %15
15: ; preds = %8
%16 = and i64 %12, 4611686018427387896
br label %17
17: ; preds = %17, %15
%18 = phi i64 [ 0, %15 ], [ %59, %17 ]
%19 = phi i64 [ 0, %15 ], [ %60, %17 ]
%20 = getelementptr inbounds float, float* %0, i64 %18
%21 = bitcast float* %20 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %21
%22 = getelementptr inbounds float, float* %20, i64 4
%23 = bitcast float* %22 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %23
%24 = or i64 %18, 8
%25 = getelementptr inbounds float, float* %0, i64 %24
%26 = bitcast float* %25 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %26
%27 = getelementptr inbounds float, float* %25, i64 4
%28 = bitcast float* %27 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %28
%29 = or i64 %18, 16
%30 = getelementptr inbounds float, float* %0, i64 %29
%31 = bitcast float* %30 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %31
%32 = getelementptr inbounds float, float* %30, i64 4
%33 = bitcast float* %32 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %33
%34 = or i64 %18, 24
%35 = getelementptr inbounds float, float* %0, i64 %34
%36 = bitcast float* %35 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %36
%37 = getelementptr inbounds float, float* %35, i64 4
%38 = bitcast float* %37 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %38
%39 = or i64 %18, 32
%40 = getelementptr inbounds float, float* %0, i64 %39
%41 = bitcast float* %40 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %41
%42 = getelementptr inbounds float, float* %40, i64 4
%43 = bitcast float* %42 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %43
%44 = or i64 %18, 40
%45 = getelementptr inbounds float, float* %0, i64 %44
%46 = bitcast float* %45 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %46
%47 = getelementptr inbounds float, float* %45, i64 4
%48 = bitcast float* %47 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %48
%49 = or i64 %18, 48
%50 = getelementptr inbounds float, float* %0, i64 %49
%51 = bitcast float* %50 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %51
%52 = getelementptr inbounds float, float* %50, i64 4
%53 = bitcast float* %52 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %53
%54 = or i64 %18, 56
%55 = getelementptr inbounds float, float* %0, i64 %54
%56 = bitcast float* %55 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %56
%57 = getelementptr inbounds float, float* %55, i64 4
%58 = bitcast float* %57 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %58
%59 = add nuw i64 %18, 64
%60 = add nuw i64 %19, 8
%61 = icmp eq i64 %60, %16
br i1 %61, label %62, label %17
62: ; preds = %17, %8
%63 = phi i64 [ 0, %8 ], [ %59, %17 ]
%64 = icmp eq i64 %13, 0
br i1 %64, label %75, label %65
65: ; preds = %62, %65
%66 = phi i64 [ %72, %65 ], [ %63, %62 ]
%67 = phi i64 [ %73, %65 ], [ 0, %62 ]
%68 = getelementptr inbounds float, float* %0, i64 %66
%69 = bitcast float* %68 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %69
%70 = getelementptr inbounds float, float* %68, i64 4
%71 = bitcast float* %70 to <4 x float>*
store <4 x float> <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>, <4 x float>* %71
%72 = add nuw i64 %66, 8
%73 = add i64 %67, 1
%74 = icmp eq i64 %73, %13
br i1 %74, label %75, label %65
75: ; preds = %65, %62
%76 = icmp eq i64 %9, %6
br i1 %76, label %84, label %77
77: ; preds = %4, %75
%78 = phi i64 [ 0, %4 ], [ %9, %75 ]
br label %79
79: ; preds = %77, %79
%80 = phi i64 [ %82, %79 ], [ %78, %77 ]
%81 = getelementptr inbounds float, float* %0, i64 %80
store float 0x3FB99999A0000000, float* %81
%82 = add nuw nsw i64 %80, 1
%83 = icmp eq i64 %82, %6
br i1 %83, label %84, label %79
84: ; preds = %79, %75, %2
ret i32 undef
}