void uDMAChannelAttributeDisable(unsigned long ulChannelNum,
                                 unsigned long ulAttr) {
  ;

  ;
  ulChannelNum &= 0x1f;
  if (ulAttr & 0x00000001) {
    (*((volatile unsigned long *)(0x400FF01C))) = 1 << ulChannelNum;
  }
  if (ulAttr & 0x00000002) {
    (*((volatile unsigned long *)(0x400FF034))) = 1 << ulChannelNum;
  }
  if (ulAttr & 0x00000004) {
    (*((volatile unsigned long *)(0x400FF03C))) = 1 << ulChannelNum;
  }
  if (ulAttr & 0x00000008) {
    (*((volatile unsigned long *)(0x400FF024))) = 1 << ulChannelNum;
  }
}


x86 assembly (clang, -O0):
<uDMAChannelAttributeDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1f,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1142 <uDMAChannelAttributeDisable+0x42>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff01c,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     116c <uDMAChannelAttributeDisable+0x6c>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff034,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x4,%rax
cmp    $0x0,%rax
je     1196 <uDMAChannelAttributeDisable+0x96>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff03c,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x8,%rax
cmp    $0x0,%rax
je     11c0 <uDMAChannelAttributeDisable+0xc0>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff024,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAChannelAttributeDisable>:
mov    %rdi,%rcx
and    $0x1f,%ecx
test   $0x1,%sil
jne    111f <uDMAChannelAttributeDisable+0x1f>
test   $0x2,%sil
jne    1136 <uDMAChannelAttributeDisable+0x36>
test   $0x4,%sil
jne    114d <uDMAChannelAttributeDisable+0x4d>
test   $0x8,%sil
jne    1164 <uDMAChannelAttributeDisable+0x64>
ret
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x400ff01c
40
test   $0x2,%sil
je     1112 <uDMAChannelAttributeDisable+0x12>
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x400ff034
40
test   $0x4,%sil
je     1118 <uDMAChannelAttributeDisable+0x18>
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x400ff03c
40
test   $0x8,%sil
je     111e <uDMAChannelAttributeDisable+0x1e>
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x400ff024
40
ret

LLVM IR (-O0):
define void @uDMAChannelAttributeDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = and i64 %5, 31
store i64 %6, i64* %3
%7 = load i64, i64* %4
%8 = and i64 %7, 1
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i64, i64* %3
%12 = trunc i64 %11 to i32
%13 = shl i32 1, %12
%14 = sext i32 %13 to i64
store volatile i64 %14, i64* inttoptr (i64 1074786332 to i64*)
br label %15
15: ; preds = %10, %2
%16 = load i64, i64* %4
%17 = and i64 %16, 2
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %24
19: ; preds = %15
%20 = load i64, i64* %3
%21 = trunc i64 %20 to i32
%22 = shl i32 1, %21
%23 = sext i32 %22 to i64
store volatile i64 %23, i64* inttoptr (i64 1074786356 to i64*)
br label %24
24: ; preds = %19, %15
%25 = load i64, i64* %4
%26 = and i64 %25, 4
%27 = icmp ne i64 %26, 0
br i1 %27, label %28, label %33
28: ; preds = %24
%29 = load i64, i64* %3
%30 = trunc i64 %29 to i32
%31 = shl i32 1, %30
%32 = sext i32 %31 to i64
store volatile i64 %32, i64* inttoptr (i64 1074786364 to i64*)
br label %33
33: ; preds = %28, %24
%34 = load i64, i64* %4
%35 = and i64 %34, 8
%36 = icmp ne i64 %35, 0
br i1 %36, label %37, label %42
37: ; preds = %33
%38 = load i64, i64* %3
%39 = trunc i64 %38 to i32
%40 = shl i32 1, %39
%41 = sext i32 %40 to i64
store volatile i64 %41, i64* inttoptr (i64 1074786340 to i64*)
br label %42
42: ; preds = %37, %33
ret void
}

LLVM IR (-O2):
define void @uDMAChannelAttributeDisable(i64 %0, i64 %1) {
%3 = and i64 %0, 31
%4 = and i64 %1, 1
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = trunc i64 %3 to i32
%8 = shl nuw i32 1, %7
%9 = sext i32 %8 to i64
store volatile i64 %9, i64* inttoptr (i64 1074786332 to i64*)
br label %10
10: ; preds = %6, %2
%11 = and i64 %1, 2
%12 = icmp eq i64 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %10
%14 = trunc i64 %3 to i32
%15 = shl nuw i32 1, %14
%16 = sext i32 %15 to i64
store volatile i64 %16, i64* inttoptr (i64 1074786356 to i64*)
br label %17
17: ; preds = %13, %10
%18 = and i64 %1, 4
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = trunc i64 %3 to i32
%22 = shl nuw i32 1, %21
%23 = sext i32 %22 to i64
store volatile i64 %23, i64* inttoptr (i64 1074786364 to i64*)
br label %24
24: ; preds = %20, %17
%25 = and i64 %1, 8
%26 = icmp eq i64 %25, 0
br i1 %26, label %31, label %27
27: ; preds = %24
%28 = trunc i64 %3 to i32
%29 = shl nuw i32 1, %28
%30 = sext i32 %29 to i64
store volatile i64 %30, i64* inttoptr (i64 1074786340 to i64*)
br label %31
31: ; preds = %27, %24
ret void
}