#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int, ...);
void ilk_debug_blc_pwm_cpu_ctl(char *result, int len, int reg, uint32_t val,
                               uint32_t devid) {
  int cycle, freq;
  cycle = (val & 0xFFFF);
  if ((((devid) == 0x0042) || ((devid) == 0x0046)) ||
      ((devid) == 0x0102 || (devid) == 0x0112 || (devid) == 0x0122 ||
       (devid) == 0x0106 || (devid) == 0x0116 || (devid) == 0x0126 ||
       (devid) == 0x010A) ||
      ((devid) == 0x0152 || (devid) == 0x0162 || (devid) == 0x0156 ||
       (devid) == 0x0166 || (devid) == 0x015a || (devid) == 0x016a)) {
    snprintf(result, len, "cycle %d", cycle);
  } else {
    freq = (val >> 16) & 0xFFFF;
    snprintf(result, len, "cycle %d, freq %d", cycle, freq);
  }
}


x86 assembly (clang, -O0):
<ilk_debug_blc_pwm_cpu_ctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x14(%rbp),%eax
and    $0xffff,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x42,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x46,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x102,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x112,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x122,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x106,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x116,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x126,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x10a,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x152,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x162,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x156,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x166,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x15a,-0x18(%rbp)
je     11f1 <ilk_debug_blc_pwm_cpu_ctl+0xe1>
cmpl   $0x16a,-0x18(%rbp)
jne    120e <ilk_debug_blc_pwm_cpu_ctl+0xfe>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x1c(%rbp),%ecx
lea    0xdfe(%rip),%rdx
mov    $0x0,%al
call   1030 <snprintf@plt>
jmp    1238 <ilk_debug_blc_pwm_cpu_ctl+0x128>
mov    -0x14(%rbp),%eax
sar    $0x10,%eax
and    $0xffff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    0xdd8(%rip),%rdx
mov    $0x0,%al
call   1030 <snprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilk_debug_blc_pwm_cpu_ctl>:
mov    %ecx,%r9d
movzwl %r9w,%ecx
lea    -0x102(%r8),%edx
cmp    $0x68,%edx
ja     1141 <ilk_debug_blc_pwm_cpu_ctl+0x31>
lea    0xed6(%rip),%rax
movslq (%rax,%rdx,4),%rdx
add    %rax,%rdx
jmp    *%rdx
lea    0x106a(%rip),%rdx
xor    %eax,%eax
jmp    1030 <snprintf@plt>
cmp    $0x46,%r8d
je     1133 <ilk_debug_blc_pwm_cpu_ctl+0x23>
cmp    $0x42,%r8d
je     1133 <ilk_debug_blc_pwm_cpu_ctl+0x23>
shr    $0x10,%r9d
lea    0x1055(%rip),%rdx
mov    %r9d,%r8d
xor    %eax,%eax
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"cycle %d\00"
@.str.1 = [18 x i8] c"cycle %d, freq %d\00"
define void @ilk_debug_blc_pwm_cpu_ctl(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%13 = load i32, i32* %9
%14 = and i32 %13, 65535
store i32 %14, i32* %11
%15 = load i32, i32* %10
%16 = icmp eq i32 %15, 66
br i1 %16, label %59, label %17
17: ; preds = %5
%18 = load i32, i32* %10
%19 = icmp eq i32 %18, 70
br i1 %19, label %59, label %20
20: ; preds = %17
%21 = load i32, i32* %10
%22 = icmp eq i32 %21, 258
br i1 %22, label %59, label %23
23: ; preds = %20
%24 = load i32, i32* %10
%25 = icmp eq i32 %24, 274
br i1 %25, label %59, label %26
26: ; preds = %23
%27 = load i32, i32* %10
%28 = icmp eq i32 %27, 290
br i1 %28, label %59, label %29
29: ; preds = %26
%30 = load i32, i32* %10
%31 = icmp eq i32 %30, 262
br i1 %31, label %59, label %32
32: ; preds = %29
%33 = load i32, i32* %10
%34 = icmp eq i32 %33, 278
br i1 %34, label %59, label %35
35: ; preds = %32
%36 = load i32, i32* %10
%37 = icmp eq i32 %36, 294
br i1 %37, label %59, label %38
38: ; preds = %35
%39 = load i32, i32* %10
%40 = icmp eq i32 %39, 266
br i1 %40, label %59, label %41
41: ; preds = %38
%42 = load i32, i32* %10
%43 = icmp eq i32 %42, 338
br i1 %43, label %59, label %44
44: ; preds = %41
%45 = load i32, i32* %10
%46 = icmp eq i32 %45, 354
br i1 %46, label %59, label %47
47: ; preds = %44
%48 = load i32, i32* %10
%49 = icmp eq i32 %48, 342
br i1 %49, label %59, label %50
50: ; preds = %47
%51 = load i32, i32* %10
%52 = icmp eq i32 %51, 358
br i1 %52, label %59, label %53
53: ; preds = %50
%54 = load i32, i32* %10
%55 = icmp eq i32 %54, 346
br i1 %55, label %59, label %56
56: ; preds = %53
%57 = load i32, i32* %10
%58 = icmp eq i32 %57, 362
br i1 %58, label %59, label %64
59: ; preds = %56, %53, %50, %47, %44, %41, %38, %35, %32, %29, %26, %23, %20, %17, %5
%60 = load i8*, i8** %6
%61 = load i32, i32* %7
%62 = load i32, i32* %11
%63 = call i32 (i8*, i32, i8*, i32, ...) @snprintf(i8* %60, i32 %61, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %62)
br label %73
64: ; preds = %56
%65 = load i32, i32* %9
%66 = ashr i32 %65, 16
%67 = and i32 %66, 65535
store i32 %67, i32* %12
%68 = load i8*, i8** %6
%69 = load i32, i32* %7
%70 = load i32, i32* %11
%71 = load i32, i32* %12
%72 = call i32 (i8*, i32, i8*, i32, ...) @snprintf(i8* %68, i32 %69, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 %70, i32 %71)
br label %73
73: ; preds = %64, %59
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"cycle %d\00"
@.str.1 = [18 x i8] c"cycle %d, freq %d\00"
define void @ilk_debug_blc_pwm_cpu_ctl(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = and i32 %3, 65535
switch i32 %4, label %9 [
i32 362, label %7
i32 358, label %7
i32 354, label %7
i32 346, label %7
i32 342, label %7
i32 338, label %7
i32 294, label %7
i32 290, label %7
i32 278, label %7
i32 274, label %7
i32 266, label %7
i32 262, label %7
i32 258, label %7
i32 70, label %7
i32 66, label %7
]
7: ; preds = %5, %5, %5, %5, %5, %5, %5, %5, %5, %5, %5, %5, %5, %5, %5
%8 = tail call i32 (i8*, i32, i8*, i32, ...) @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %12
9: ; preds = %5
%10 = lshr i32 %3, 16
%11 = tail call i32 (i8*, i32, i8*, i32, ...) @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 %6, i32 %10)
br label %12
12: ; preds = %9, %7
ret void
}