xunge/DecIR huggingface dataset:
/* Type definitions */
struct net_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ netif_carrier_on(struct net_device *);
void acx_carrier_on(struct net_device *ndev, const char *msg) {
  netif_carrier_on(ndev);
  if (msg)
    ;
}


x86 assembly (clang, -O0):
<acx_carrier_on>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <netif_carrier_on@plt>
cmpq   $0x0,-0x10(%rbp)
je     1139 <acx_carrier_on+0x29>
jmp    1139 <acx_carrier_on+0x29>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acx_carrier_on>:
jmp    1030 <netif_carrier_on@plt>

LLVM IR (-O0):
%struct.net_device = type { i32 }
define void @acx_carrier_on(%struct.net_device* %0, i8* %1) {
%3 = alloca %struct.net_device*
%4 = alloca i8*
store %struct.net_device* %0, %struct.net_device** %3
store i8* %1, i8** %4
%5 = load %struct.net_device*, %struct.net_device** %3
%6 = call i32 @netif_carrier_on(%struct.net_device* %5)
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %2
br label %10
10: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
%struct.net_device = type { i32 }
define void @acx_carrier_on(%struct.net_device* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @netif_carrier_on(%struct.net_device* %0)
ret void
}
void nop(int sig) {}


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
ret

LLVM IR (-O0):
define void @nop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @nop(i32 %0) {
ret void
}
int checkState_(char board[3][3]) {
  (void)board;
  return 4;
}


x86 assembly (clang, -O0):
<checkState_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkState_>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @checkState_([3 x i8]* %0) {
%2 = alloca [3 x i8]*
store [3 x i8]* %0, [3 x i8]** %2
%3 = load [3 x i8]*, [3 x i8]** %2
ret i32 4
}

LLVM IR (-O2):
define i32 @checkState_([3 x i8]* nocapture readnone %0) {
ret i32 4
}
int test_imm_6Fint8_reg(signed char val) {
  return ((val) & (-0x6F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Fint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff91,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Fint8_reg>:
test   $0x91,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Fint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -111
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Fint8_reg(i8 signext %0) {
%2 = and i8 %0, -111
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_C3int8_reg(signed char val) {
  return ((val) & (0xC3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C3int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xc3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C3int8_reg>:
test   $0xc3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C3int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 195
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C3int8_reg(i8 signext %0) {
%2 = and i8 %0, -61
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write_byte(int);
int /*<<< orphan*/ write_dword(int);
void jump_disp32(int displacement) {
  write_byte(0xE9);
  write_dword(displacement);
}


x86 assembly (clang, -O0):
<jump_disp32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xe9,%edi
call   1040 <write_byte@plt>
mov    -0x4(%rbp),%edi
call   1030 <write_dword@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jump_disp32>:
push   %rbx
mov    %edi,%ebx
mov    $0xe9,%edi
call   1040 <write_byte@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <write_dword@plt>

LLVM IR (-O0):
define void @jump_disp32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write_byte(i32 233)
%4 = load i32, i32* %2
%5 = call i32 @write_dword(i32 %4)
ret void
}

LLVM IR (-O2):
define void @jump_disp32(i32 %0) {
%2 = tail call i32 @write_byte(i32 233)
%3 = tail call i32 @write_dword(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncmp(char *, char *, int);
void strncmp_null_1() {
  char *x = "123";
  char *y = 0;
  strncmp(x, y, 3);
}


x86 assembly (clang, -O0):
<strncmp_null_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_null_1>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
mov    $0x3,%edx
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
define void @strncmp_null_1() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* null, i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strncmp(i8* %3, i8* %4, i32 3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
define void @strncmp_null_1() {
%1 = tail call i32 @strncmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* null, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vt100_EscSeq(int, unsigned char *, long long);
void vt100_CUU(int n) { vt100_EscSeq(n, (unsigned char *)"A", (long long)2); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
mov    $0x2,%edx
call   1030 <vt100_EscSeq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
lea    0xee9(%rip),%rsi
mov    $0x2,%edx
jmp    1030 <vt100_EscSeq@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"A\00"
define void @vt100_CUU(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @vt100_EscSeq(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 2)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"A\00"
define void @vt100_CUU(i32 %0) {
%2 = tail call i32 @vt100_EscSeq(i32 %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fork();
int /*<<< orphan*/ free(int /*<<< orphan*/);
int /*<<< orphan*/ malloc(int);
int main(void) {
  fork();
  free(malloc(1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %eax,%edi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %eax,%edi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fork()
%3 = call i32 @malloc(i32 1)
%4 = call i32 @free(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fork()
%2 = tail call i32 @malloc(i32 1)
%3 = tail call i32 @free(i32 %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct timeval {
  int dummy;
};

/* Variables and functions */
int recvfrom_u(int, int /*<<< orphan*/ *, size_t, struct timeval,
               int /*<<< orphan*/ *);
int recv_u(int sock, uint8_t *buf, size_t buflen, struct timeval wait) {
  return recvfrom_u(sock, buf, buflen, wait, NULL);
}


x86 assembly (clang, -O0):
<recv_u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %ecx,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%r8d
call   1030 <recvfrom_u@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recv_u>:
xor    %r8d,%r8d
jmp    1030 <recvfrom_u@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @recv_u(i32 %0, i32* %1, i64 %2, i32 %3) {
%5 = alloca %struct.timeval
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i64
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
store i32 %3, i32* %9
store i32 %0, i32* %6
store i32* %1, i32** %7
store i64 %2, i64* %8
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = load i64, i64* %8
%13 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%14 = load i32, i32* %13
%15 = call i32 @recvfrom_u(i32 %10, i32* %11, i64 %12, i32 %14, i32* null)
ret i32 %15
}

LLVM IR (-O2):
define i32 @recv_u(i32 %0, i32* %1, i64 %2, i32 %3) {
%5 = tail call i32 @recvfrom_u(i32 %0, i32* %1, i64 %2, i32 %3, i32* null)
ret i32 %5
}
void anetPeerToString(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               41, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<anetPeerToString>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x29,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<anetPeerToString>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x29,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.anetPeerToString = [17 x i8] c"anetPeerToString\00"
define void @anetPeerToString() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 41, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.anetPeerToString, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.anetPeerToString = [17 x i8] c"anetPeerToString\00"
define void @anetPeerToString() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 41, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.anetPeerToString, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *ctime(long *);
int /*<<< orphan*/ printf(char *, char *);
void get_time(long timeval) {
  char *cp;
  cp = ctime(&timeval);
  printf("%12.12s", cp + 4);
}


x86 assembly (clang, -O0):
<get_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <ctime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
add    $0x4,%rsi
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_time>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1030 <ctime@plt>
lea    0x4(%rax),%rsi
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%12.12s\00"
define void @get_time(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = call i8* @ctime(i64* %2)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 4
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%12.12s\00"
define void @get_time(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i8* @ctime(i64* %2)
%4 = getelementptr inbounds i8, i8* %3, i64 4
%5 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}
int imx_sema4_mutex_unlock(struct imx_sema4_mutex *mutex_ptr) { return 0; }


x86 assembly (clang, -O0):
<imx_sema4_mutex_unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imx_sema4_mutex_unlock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.imx_sema4_mutex = type opaque
define i32 @imx_sema4_mutex_unlock(%struct.imx_sema4_mutex* %0) {
%2 = alloca %struct.imx_sema4_mutex*
store %struct.imx_sema4_mutex* %0, %struct.imx_sema4_mutex** %2
ret i32 0
}

LLVM IR (-O2):
%struct.imx_sema4_mutex = type opaque
define i32 @imx_sema4_mutex_unlock(%struct.imx_sema4_mutex* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
void xtables_set_table(uint64_t *pt, uint64_t *table_addr) {
  uint64_t val;
  val = (3 << 0) | (uint64_t)table_addr;
  *pt = val;
}


x86 assembly (clang, -O0):
<xtables_set_table>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
or     $0x3,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtables_set_table>:
or     $0x3,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @xtables_set_table(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = ptrtoint i32* %6 to i32
%8 = or i32 3, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32*, i32** %3
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @xtables_set_table(i32* nocapture writeonly %0, i32* %1) {
%3 = ptrtoint i32* %1 to i64
%4 = trunc i64 %3 to i32
%5 = or i32 %4, 3
store i32 %5, i32* %0
ret void
}
int do_543() { return 543; }


x86 assembly (clang, -O0):
<do_543>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_543>:
mov    $0x21f,%eax
ret

LLVM IR (-O0):
define i32 @do_543() {
ret i32 543
}

LLVM IR (-O2):
define i32 @do_543() {
ret i32 543
}
int *test2(int *a) { return 1 + a; }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
lea    0x4(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @test2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
ret i32* %4
}

LLVM IR (-O2):
define i32* @test2(i32* readnone %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ log_write_err(int);
scalar_t__ write(int, char *, int);
int read_write_loop_nonl(int fd, char *buf, int count, int *saved,
                         int *read_amount) {
  if (write(fd, buf, count) < 0) {
    log_write_err(fd);
    return -1;
  }
  *saved = 0;
  *read_amount = 512;
  return 0;
}


x86 assembly (clang, -O0):
<read_write_loop_nonl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
cmp    $0x0,%rax
jge    1167 <read_write_loop_nonl+0x47>
mov    -0x8(%rbp),%edi
call   1040 <log_write_err@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1182 <read_write_loop_nonl+0x62>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x28(%rbp),%rax
movl   $0x200,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_write_loop_nonl>:
push   %rbp
push   %r14
push   %rbx
mov    %r8,%r14
mov    %rcx,%rbx
mov    %edi,%ebp
call   1030 <write@plt>
test   %rax,%rax
js     1147 <read_write_loop_nonl+0x27>
movl   $0x0,(%rbx)
movl   $0x200,(%r14)
xor    %eax,%eax
jmp    1153 <read_write_loop_nonl+0x33>
mov    %ebp,%edi
call   1040 <log_write_err@plt>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_write_loop_nonl(i32 %0, i8* %1, i32 %2, i32* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32*
%11 = alloca i32*
store i32 %0, i32* %7
store i8* %1, i8** %8
store i32 %2, i32* %9
store i32* %3, i32** %10
store i32* %4, i32** %11
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = call i64 @write(i32 %12, i8* %13, i32 %14)
%16 = icmp slt i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %5
%18 = load i32, i32* %7
%19 = call i32 @log_write_err(i32 %18)
store i32 -1, i32* %6
br label %23
20: ; preds = %5
%21 = load i32*, i32** %10
store i32 0, i32* %21
%22 = load i32*, i32** %11
store i32 512, i32* %22
store i32 0, i32* %6
br label %23
23: ; preds = %20, %17
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
define i32 @read_write_loop_nonl(i32 %0, i8* nocapture %1, i32 %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4) {
%6 = tail call i64 @write(i32 %0, i8* %1, i32 %2)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @log_write_err(i32 %0)
br label %11
10: ; preds = %5
store i32 0, i32* %3
store i32 512, i32* %4
br label %11
11: ; preds = %10, %8
%12 = phi i32 [ -1, %8 ], [ 0, %10 ]
ret i32 %12
}
const char *ls_info_compilation_environment() {
  return "["
         "Mar 18 2022"
         ", "
         "23:58:59"
         "] ("
         "Custom build system"
         ") "
         "GCC"
         "+"
         " "
         "9.4.0"
         " @ "
         "Linux"
         " ("
         "x86_64"
         ", "
         "little-endian"
         ")";
}


x86 assembly (clang, -O0):
<ls_info_compilation_environment>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_info_compilation_environment>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [89 x i8] c"[Mar 18 2022, 23:58:59] (Custom build system) GCC+ 9.4.0 @ Linux (x86_64, little-endian)\00"
define i8* @ls_info_compilation_environment() {
ret i8* getelementptr inbounds ([89 x i8], [89 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [89 x i8] c"[Mar 18 2022, 23:58:59] (Custom build system) GCC+ 9.4.0 @ Linux (x86_64, little-endian)\00"
define i8* @ls_info_compilation_environment() {
ret i8* getelementptr inbounds ([89 x i8], [89 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int sweep_set_standard_target(int n, double *c) {
  int fail, ptos[2];
  ptos[0] = 0;
  ptos[1] = 1;
  fail = _ada_use_c2phc4c(618, ptos, &n, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<sweep_set_standard_target>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x1,-0x18(%rbp)
lea    -0x1c(%rbp),%rsi
mov    -0x10(%rbp),%rcx
mov    $0x26a,%edi
lea    -0x4(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sweep_set_standard_target>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %edi,0xc(%rsp)
movabs $0x100000000,%rax
mov    %rax,0x10(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
mov    $0x26a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @sweep_set_standard_target(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca [2 x i32]
store i32 %0, i32* %3
store double* %1, double** %4
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
store i32 0, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
store i32 1, i32* %8
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%10 = load double*, double** %4
%11 = call i32 @_ada_use_c2phc4c(i32 618, i32* %9, i32* %3, double* %10, i32 0)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @sweep_set_standard_target(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
store i32 %0, i32* %3
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 0, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 1, i32* %7
%8 = call i32 @_ada_use_c2phc4c(i32 618, i32* %6, i32* %3, double* %1, i32 0)
ret i32 %8
}
int is_asciiz(const char *buf, int lbound, int ubound) {
  register int i;
  for (i = lbound; i < ubound; i++)
    if (!buf[i])
      return i + 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_asciiz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1153 <is_asciiz+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
jne    1140 <is_asciiz+0x40>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    115a <is_asciiz+0x5a>
jmp    1145 <is_asciiz+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1114 <is_asciiz+0x14>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_asciiz>:
xor    %eax,%eax
cmp    %edx,%esi
jge    1137 <is_asciiz+0x37>
movslq %esi,%rcx
add    $0x1,%esi
add    %rcx,%rdi
neg    %edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmpb   $0x0,(%rdi)
je     1138 <is_asciiz+0x38>
add    $0x1,%rdi
lea    (%rdx,%rsi,1),%ecx
add    $0x1,%ecx
add    $0x1,%esi
cmp    $0x1,%ecx
jne    1120 <is_asciiz+0x20>
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @is_asciiz(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
store i32 %9, i32* %8
br label %10
10: ; preds = %25, %3
%11 = load i32, i32* %8
%12 = load i32, i32* %7
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %28
14: ; preds = %10
%15 = load i8*, i8** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = icmp ne i8 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %14
%22 = load i32, i32* %8
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %29
24: ; preds = %14
br label %25
25: ; preds = %24
%26 = load i32, i32* %8
%27 = add nsw i32 %26, 1
store i32 %27, i32* %8
br label %10
28: ; preds = %10
store i32 0, i32* %4
br label %29
29: ; preds = %28, %21
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @is_asciiz(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %19
5: ; preds = %3
%6 = sext i32 %1 to i64
br label %7
7: ; preds = %5, %15
%8 = phi i64 [ %6, %5 ], [ %16, %15 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = trunc i64 %8 to i32
%14 = add nsw i32 %13, 1
br label %19
15: ; preds = %7
%16 = add nsw i64 %8, 1
%17 = trunc i64 %16 to i32
%18 = icmp eq i32 %17, %2
br i1 %18, label %19, label %7
19: ; preds = %15, %3, %12
%20 = phi i32 [ %14, %12 ], [ 0, %3 ], [ 0, %15 ]
ret i32 %20
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void IAmDead() {
  printf("Time to Die...\n");
  exit(-10);
}


x86 assembly (clang, -O0):
<IAmDead>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xfffffff6,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<IAmDead>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xfffffff6,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Time to Die...\0A\00"
define void @IAmDead() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -10)
unreachable
}

LLVM IR (-O2):
@str = [15 x i8] c"Time to Die...\00"
define void @IAmDead() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -10)
unreachable
}
int _storage_uidl_supported() { return 0; }


x86 assembly (clang, -O0):
<_storage_uidl_supported>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_storage_uidl_supported>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_storage_uidl_supported() {
ret i32 0
}

LLVM IR (-O2):
define i32 @_storage_uidl_supported() {
ret i32 0
}
/* Variables and functions */
void *malloc_fseg_align(int, int);
void *malloc_fseg(int n) { return malloc_fseg_align(n, 16); }


x86 assembly (clang, -O0):
<malloc_fseg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x10,%esi
call   1030 <malloc_fseg_align@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_fseg>:
mov    $0x10,%esi
jmp    1030 <malloc_fseg_align@plt>

LLVM IR (-O0):
define i8* @malloc_fseg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @malloc_fseg_align(i32 %3, i32 16)
ret i8* %4
}

LLVM IR (-O2):
define i8* @malloc_fseg(i32 %0) {
%2 = tail call i8* @malloc_fseg_align(i32 %0, i32 16)
ret i8* %2
}
void funct(int *a, int *b) {
  int *temp;
  temp = a;
  a = b;
  b = temp;
}


x86 assembly (clang, -O0):
<funct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<funct>:
ret

LLVM IR (-O0):
define void @funct(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
store i32* %6, i32** %5
%7 = load i32*, i32** %4
store i32* %7, i32** %3
%8 = load i32*, i32** %5
store i32* %8, i32** %4
ret void
}

LLVM IR (-O2):
define void @funct(i32* nocapture %0, i32* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_commandline_help(const char *progname) {
  printf("Usage: %s [options] root_dir image_file\n", progname);
  printf("Create DBFFS image, image_file,  from files in root_dir.\n");
  printf("Options:\n");
  printf(" -v: Be verbose.\n");
}


x86 assembly (clang, -O0):
<print_commandline_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xef4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf20(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf1c(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_commandline_help>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xef0(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1d(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1a(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"Usage: %s [options] root_dir image_file\0A\00"
@.str.1 = [58 x i8] c"Create DBFFS image, image_file, from files in root_dir.\0A\00"
@.str.2 = [10 x i8] c"Options:\0A\00"
@.str.3 = [18 x i8] c" -v: Be verbose.\0A\00"
define void @print_commandline_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0))
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"Usage: %s [options] root_dir image_file\0A\00"
@str = [57 x i8] c"Create DBFFS image, image_file, from files in root_dir.\00"
@str.4 = [9 x i8] c"Options:\00"
@str.5 = [17 x i8] c" -v: Be verbose.\00"
define void @print_commandline_help(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([57 x i8], [57 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str.4, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str.5, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear(unsigned char);
int /*<<< orphan*/ nxtDisplayString(unsigned char, char *, float);
int /*<<< orphan*/ update(unsigned char);
void printf(float number, unsigned char line) {
  if (line >= 8)
    line = 8 - 1;
  clear(line);
  nxtDisplayString(line, "%.4f", number);
  update(line);
}


x86 assembly (clang, -O0):
<printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
movss  %xmm0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x8,%eax
jl     1154 <printf+0x24>
movb   $0x7,-0x5(%rbp)
movzbl -0x5(%rbp),%edi
call   1040 <clear@plt>
mov    -0x5(%rbp),%al
movss  -0x4(%rbp),%xmm0
lea    0xe94(%rip),%rsi
movzbl %al,%edi
call   1050 <nxtDisplayString@plt>
movzbl -0x5(%rbp),%edi
call   1030 <update@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printf>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
movss  %xmm0,0xc(%rsp)
cmp    $0x7,%bl
mov    $0x7,%eax
cmovae %eax,%ebx
mov    %ebx,%edi
call   1040 <clear@plt>
lea    0xeaa(%rip),%rsi
mov    %ebx,%edi
movss  0xc(%rsp),%xmm0
call   1050 <nxtDisplayString@plt>
mov    %ebx,%edi
add    $0x10,%rsp
pop    %rbx
jmp    1030 <update@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%.4f\00"
define void @printf(float %0, i8 zeroext %1) {
%3 = alloca float
%4 = alloca i8
store float %0, float* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = icmp sge i32 %6, 8
br i1 %7, label %8, label %9
8: ; preds = %2
store i8 7, i8* %4
br label %9
9: ; preds = %8, %2
%10 = load i8, i8* %4
%11 = call i32 @clear(i8 zeroext %10)
%12 = load i8, i8* %4
%13 = load float, float* %3
%14 = call i32 @nxtDisplayString(i8 zeroext %12, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float %13)
%15 = load i8, i8* %4
%16 = call i32 @update(i8 zeroext %15)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%.4f\00"
define void @printf(float %0, i8 zeroext %1) {
%3 = icmp ult i8 %1, 7
%4 = select i1 %3, i8 %1, i8 7
%5 = tail call i32 @clear(i8 zeroext %4)
%6 = tail call i32 @nxtDisplayString(i8 zeroext %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float %0)
%7 = tail call i32 @update(i8 zeroext %4)
ret void
}
/* Type definitions */
struct dec_ctx {
  int dummy;
};

/* Variables and functions */
scalar_t__ get_bits(struct dec_ctx *, int);
int get_gamma_code(struct dec_ctx *ctx) {
  int gamma_code;
  gamma_code = 0;
  while (get_bits(ctx, 1) == 0) {
    ++gamma_code;
  }
  return gamma_code;
}


x86 assembly (clang, -O0):
<get_gamma_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <get_bits@plt>
cmp    $0x0,%rax
jne    1149 <get_gamma_code+0x39>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <get_gamma_code+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_gamma_code>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0xffffffff,%ebx
nopl   0x0(%rax)
mov    %r14,%rdi
mov    $0x1,%esi
call   1030 <get_bits@plt>
add    $0x1,%ebx
test   %rax,%rax
je     1120 <get_gamma_code+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.dec_ctx = type { i32 }
define i32 @get_gamma_code(%struct.dec_ctx* %0) {
%2 = alloca %struct.dec_ctx*
%3 = alloca i32
store %struct.dec_ctx* %0, %struct.dec_ctx** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load %struct.dec_ctx*, %struct.dec_ctx** %2
%6 = call i64 @get_bits(%struct.dec_ctx* %5, i32 1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
%struct.dec_ctx = type { i32 }
define i32 @get_gamma_code(%struct.dec_ctx* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %6, %2 ]
%4 = tail call i64 @get_bits(%struct.dec_ctx* %0, i32 1)
%5 = icmp eq i64 %4, 0
%6 = add nuw nsw i32 %3, 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i32 %3
}
/* Type definitions */
struct symT {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void initSymTab(struct symT **first) {
  *first = NULL;
  fprintf(stdout, "INFO initialized symbol table\n");
}


x86 assembly (clang, -O0):
<initSymTab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initSymTab>:
movq   $0x0,(%rdi)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
lea    0xed9(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
%struct.symT = type { i32 }
@stdout = global i32 0
@.str = [31 x i8] c"INFO initialized symbol table\0A\00"
define void @initSymTab(%struct.symT** %0) {
%2 = alloca %struct.symT**
store %struct.symT** %0, %struct.symT*** %2
%3 = load %struct.symT**, %struct.symT*** %2
store %struct.symT* null, %struct.symT** %3
%4 = load i32, i32* @stdout
%5 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.symT = type { i32 }
@stdout = global i32 0
@.str = [31 x i8] c"INFO initialized symbol table\0A\00"
define void @initSymTab(%struct.symT** nocapture writeonly %0) {
store %struct.symT* null, %struct.symT** %0
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
float sqrt(float);
float Distance(float x1, float y1, float x2, float y2) {
  return sqrt((x2 - x1) * (x2 - x1) + (y2 - y1) * (y2 - y1));
}


x86 assembly (clang, -O0):
<Distance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
movss  -0x10(%rbp),%xmm1
subss  -0x8(%rbp),%xmm1
movss  -0x10(%rbp),%xmm3
subss  -0x8(%rbp),%xmm3
mulss  %xmm3,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Distance>:
subss  %xmm0,%xmm2
subss  %xmm1,%xmm3
mulss  %xmm3,%xmm3
mulss  %xmm2,%xmm2
addss  %xmm3,%xmm2
xorps  %xmm0,%xmm0
ucomiss %xmm0,%xmm2
jb     1134 <Distance+0x24>
xorps  %xmm0,%xmm0
sqrtss %xmm2,%xmm0
ret
movaps %xmm2,%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @Distance(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = load float, float* %5
%11 = fsub float %9, %10
%12 = load float, float* %7
%13 = load float, float* %5
%14 = fsub float %12, %13
%15 = load float, float* %8
%16 = load float, float* %6
%17 = fsub float %15, %16
%18 = load float, float* %8
%19 = load float, float* %6
%20 = fsub float %18, %19
%21 = fmul float %17, %20
%22 = call float @llvm.fmuladd.f32(float %11, float %14, float %21)
%23 = call float @sqrt(float %22)
ret float %23
}

LLVM IR (-O2):
define float @Distance(float %0, float %1, float %2, float %3) {
%5 = fsub float %2, %0
%6 = fsub float %3, %1
%7 = fmul float %6, %6
%8 = tail call float @llvm.fmuladd.f32(float %5, float %5, float %7)
%9 = tail call float @sqrt(float %8)
ret float %9
}
/* Variables and functions */
float atanhf(float);
float futrts_atanh32(float x) { return atanhf(x); }


x86 assembly (clang, -O0):
<futrts_atanh32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanhf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futrts_atanh32>:
jmp    1030 <atanhf@plt>

LLVM IR (-O0):
define float @futrts_atanh32(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @atanhf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @futrts_atanh32(float %0) {
%2 = tail call float @atanhf(float %0)
ret float %2
}
/* Variables and functions */
int X509V3_add_standard_extensions(void) { return 1; }


x86 assembly (clang, -O0):
<X509V3_add_standard_extensions>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509V3_add_standard_extensions>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @X509V3_add_standard_extensions() {
ret i32 1
}

LLVM IR (-O2):
define i32 @X509V3_add_standard_extensions() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int kala(int, ...);
int main() {
  int i = 0;
  i = kala(3);
  assert(i == 3);
  i = kala(2, 5);
  assert(i == 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x3,%edi
mov    $0x0,%al
call   1040 <kala@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x2,%edi
mov    $0x5,%esi
mov    $0x0,%al
call   1040 <kala@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
xor    %eax,%eax
call   1040 <kala@plt>
xor    %edi,%edi
cmp    $0x3,%eax
sete   %dil
call   1030 <assert@plt>
mov    $0x2,%edi
mov    $0x5,%esi
xor    %eax,%eax
call   1040 <kala@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 (i32, ...) @kala(i32 3)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 3
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = call i32 (i32, ...) @kala(i32 2, i32 5)
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 2
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (i32, ...) @kala(i32 3)
%2 = icmp eq i32 %1, 3
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 (i32, ...) @kala(i32 2, i32 5)
%6 = icmp eq i32 %5, 2
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int count;
  for (count = 0; count < 3; count++) {
    printf("Hello\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    114a <main+0x3a>
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"Hello\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@str = [6 x i8] c"Hello\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void ff_hevc_h_loop_filter_luma_8_ssse3() {}


x86 assembly (clang, -O0):
<ff_hevc_h_loop_filter_luma_8_ssse3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_h_loop_filter_luma_8_ssse3>:
ret

LLVM IR (-O0):
define void @ff_hevc_h_loop_filter_luma_8_ssse3() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_h_loop_filter_luma_8_ssse3() {
ret void
}
/* Variables and functions */
float cos(float);
float sin(float);
void FastSinCos(float angle, float *s, float *c) {
  *s = sin(angle);
  *c = cos(angle);
}


x86 assembly (clang, -O0):
<FastSinCos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sin@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
call   1040 <cos@plt>
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FastSinCos>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movss  %xmm0,0x4(%rsp)
call   1030 <sin@plt>
movss  %xmm0,(%rbx)
movss  0x4(%rsp),%xmm0
call   1040 <cos@plt>
movss  %xmm0,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @FastSinCos(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = call float @sin(float %7)
%9 = load float*, float** %5
store float %8, float* %9
%10 = load float, float* %4
%11 = call float @cos(float %10)
%12 = load float*, float** %6
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @FastSinCos(float %0, float* nocapture writeonly %1, float* nocapture writeonly %2) {
%4 = tail call float @sin(float %0)
store float %4, float* %1
%5 = tail call float @cos(float %0)
store float %5, float* %2
ret void
}
int test_imm_62int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x62 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_62int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x62,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_62int64_midword_mem>:
testb  $0x62,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_62int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 98
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_62int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 6422528
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned short int f69(unsigned short int x, unsigned int y) {
  return (x << y) + (x >> (8 * 2 - y));
}


x86 assembly (clang, -O0):
<f69>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    $0x10,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f69>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
mov    $0x10,%dl
sub    %cl,%dl
mov    %edx,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f69(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 %6, %7
%9 = load i16, i16* %3
%10 = zext i16 %9 to i32
%11 = load i32, i32* %4
%12 = sub i32 16, %11
%13 = ashr i32 %10, %12
%14 = add nsw i32 %8, %13
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @f69(i16 zeroext %0, i32 %1) {
%3 = zext i16 %0 to i32
%4 = shl i32 %3, %1
%5 = sub i32 16, %1
%6 = lshr i32 %3, %5
%7 = add nsw i32 %6, %4
%8 = trunc i32 %7 to i16
ret i16 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void erreur_nbP(int nbP, int n) {
  printf("nbP (=%d) ne valide pas nbP > 1 ET nbP <= %d !\n", nbP, n * n);
}


x86 assembly (clang, -O0):
<erreur_nbP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
imul   -0x8(%rbp),%edx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erreur_nbP>:
mov    %esi,%edx
mov    %edi,%esi
imul   %edx,%edx
lea    0xee2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"nbP (=%d) ne valide pas nbP > 1 ET nbP <= %d !\0A\00"
define void @erreur_nbP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [48 x i8] c"nbP (=%d) ne valide pas nbP > 1 ET nbP <= %d !\0A\00"
define void @erreur_nbP(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %3)
ret void
}