#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ rc6_advance_pulse(unsigned int *, unsigned int *,
                                     unsigned int);
int /*<<< orphan*/ rc6_advance_space(unsigned int *, unsigned int *,
                                     unsigned int);
void rc6_add_bits(unsigned *buf, unsigned *n, unsigned bits, unsigned count,
                  unsigned length) {
  while (count--) {
    if (bits & (1 << count)) {
      rc6_advance_pulse(buf, n, length);
      rc6_advance_space(buf, n, length);
    } else {
      rc6_advance_space(buf, n, length);
      rc6_advance_pulse(buf, n, length);
    }
  }
}


x86 assembly (clang, -O0):
<rc6_add_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x18(%rbp)
cmp    $0x0,%eax
je     11b2 <rc6_add_bits+0x92>
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     118d <rc6_add_bits+0x6d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <rc6_advance_pulse@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <rc6_advance_space@plt>
jmp    11ad <rc6_add_bits+0x8d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <rc6_advance_space@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <rc6_advance_pulse@plt>
jmp    113a <rc6_add_bits+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rc6_add_bits>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
test   %ecx,%ecx
je     117f <rc6_add_bits+0x5f>
mov    %r8d,%r15d
mov    %ecx,%ebp
mov    %edx,%r14d
mov    %rsi,%r12
mov    %rdi,%rbx
add    $0xffffffff,%ebp
jmp    1158 <rc6_add_bits+0x38>
nop
call   1040 <rc6_advance_space@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15d,%edx
call   1030 <rc6_advance_pulse@plt>
add    $0xffffffff,%ebp
jae    117f <rc6_add_bits+0x5f>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15d,%edx
bt     %ebp,%r14d
jae    1140 <rc6_add_bits+0x20>
call   1030 <rc6_advance_pulse@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15d,%edx
call   1040 <rc6_advance_space@plt>
add    $0xffffffff,%ebp
jb     1158 <rc6_add_bits+0x38>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @rc6_add_bits(i32* %0, i32* %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
br label %11
11: ; preds = %39, %5
%12 = load i32, i32* %9
%13 = add i32 %12, -1
store i32 %13, i32* %9
%14 = icmp ne i32 %12, 0
br i1 %14, label %15, label %40
15: ; preds = %11
%16 = load i32, i32* %8
%17 = load i32, i32* %9
%18 = shl i32 1, %17
%19 = and i32 %16, %18
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %30
21: ; preds = %15
%22 = load i32*, i32** %6
%23 = load i32*, i32** %7
%24 = load i32, i32* %10
%25 = call i32 @rc6_advance_pulse(i32* %22, i32* %23, i32 %24)
%26 = load i32*, i32** %6
%27 = load i32*, i32** %7
%28 = load i32, i32* %10
%29 = call i32 @rc6_advance_space(i32* %26, i32* %27, i32 %28)
br label %39
30: ; preds = %15
%31 = load i32*, i32** %6
%32 = load i32*, i32** %7
%33 = load i32, i32* %10
%34 = call i32 @rc6_advance_space(i32* %31, i32* %32, i32 %33)
%35 = load i32*, i32** %6
%36 = load i32*, i32** %7
%37 = load i32, i32* %10
%38 = call i32 @rc6_advance_pulse(i32* %35, i32* %36, i32 %37)
br label %39
39: ; preds = %30, %21
br label %11
40: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @rc6_add_bits(i32* %0, i32* %1, i32 %2, i32 %3, i32 %4) {
%6 = icmp eq i32 %3, 0
br i1 %6, label %21, label %7
7: ; preds = %5, %19
%8 = phi i32 [ %9, %19 ], [ %3, %5 ]
%9 = add i32 %8, -1
%10 = shl nuw i32 1, %9
%11 = and i32 %10, %2
%12 = icmp eq i32 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %7
%14 = tail call i32 @rc6_advance_pulse(i32* %0, i32* %1, i32 %4)
%15 = tail call i32 @rc6_advance_space(i32* %0, i32* %1, i32 %4)
br label %19
16: ; preds = %7
%17 = tail call i32 @rc6_advance_space(i32* %0, i32* %1, i32 %4)
%18 = tail call i32 @rc6_advance_pulse(i32* %0, i32* %1, i32 %4)
br label %19
19: ; preds = %16, %13
%20 = icmp eq i32 %9, 0
br i1 %20, label %21, label %7
21: ; preds = %19, %5
ret void
}