xunge/DecIR huggingface dataset:
void ade7758_uninitialize_ring(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<ade7758_uninitialize_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7758_uninitialize_ring>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @ade7758_uninitialize_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @ade7758_uninitialize_ring(%struct.iio_dev* nocapture %0) {
ret void
}
/* Type definitions */
typedef int width;

/* Variables and functions */
volatile void *bme_bf_addr(volatile void *ptr, uintptr_t bit, uintptr_t width) {
  return (volatile void *)(((uintptr_t)ptr) |
                           ((1 << 28) | ((bit) << 23) | (((width)-1) << 19)));
}


x86 assembly (clang, -O0):
<bme_bf_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x17,%rcx
or     $0x10000000,%rcx
mov    -0x18(%rbp),%rdx
sub    $0x1,%rdx
shl    $0x13,%rdx
or     %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bme_bf_addr>:
shl    $0x17,%rsi
shl    $0x13,%rdx
lea    -0x80000(%rdx),%rax
or     %rdi,%rsi
or     %rsi,%rax
or     $0x10000000,%rax
ret

LLVM IR (-O0):
define i8* @bme_bf_addr(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = load i64, i64* %5
%10 = shl i64 %9, 23
%11 = or i64 268435456, %10
%12 = load i64, i64* %6
%13 = sub i64 %12, 1
%14 = shl i64 %13, 19
%15 = or i64 %11, %14
%16 = or i64 %8, %15
%17 = inttoptr i64 %16 to i8*
ret i8* %17
}

LLVM IR (-O2):
define i8* @bme_bf_addr(i8* %0, i64 %1, i64 %2) {
%4 = ptrtoint i8* %0 to i64
%5 = shl i64 %1, 23
%6 = shl i64 %2, 19
%7 = add i64 %6, -524288
%8 = or i64 %5, %4
%9 = or i64 %8, %7
%10 = or i64 %9, 268435456
%11 = inttoptr i64 %10 to i8*
ret i8* %11
}
/* Variables and functions */
size_t _memory_usable_size(void *);
size_t rpmalloc_usable_size(void *ptr) {
  return ptr ? _memory_usable_size(ptr) : 0;
}


x86 assembly (clang, -O0):
<rpmalloc_usable_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1139 <rpmalloc_usable_size+0x29>
mov    -0x8(%rbp),%rdi
call   1030 <_memory_usable_size@plt>
mov    %rax,-0x10(%rbp)
jmp    1144 <rpmalloc_usable_size+0x34>
xor    %eax,%eax
mov    %rax,-0x10(%rbp)
jmp    1144 <rpmalloc_usable_size+0x34>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpmalloc_usable_size>:
test   %rdi,%rdi
je     111a <rpmalloc_usable_size+0xa>
jmp    1030 <_memory_usable_size@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @rpmalloc_usable_size(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i64 @_memory_usable_size(i8* %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i64 [ %7, %5 ], [ 0, %8 ]
ret i64 %10
}

LLVM IR (-O2):
define i64 @rpmalloc_usable_size(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i64 @_memory_usable_size(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i64 [ %4, %3 ], [ 0, %1 ]
ret i64 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ recv(int, void *, size_t, int);
ssize_t oc_netlayer_recv(int sockfd, void *buf, size_t len, int flags) {
  return recv(sockfd, buf, len, flags);
}


x86 assembly (clang, -O0):
<oc_netlayer_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <recv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oc_netlayer_recv>:
jmp    1030 <recv@plt>

LLVM IR (-O0):
define i32 @oc_netlayer_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = call i32 @recv(i32 %9, i8* %10, i64 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @oc_netlayer_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call i32 @recv(i32 %0, i8* %1, i64 %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr,
          "Usage: diodload [OPTIONS]\n"
          "   -s,--server HOST:PORT server (default localhost:564)\n"
          "   -m,--msize            msize (default 65536)\n"
          "   -n,--numthreads       specify thread count (default 16)\n"
          "   -r,--runtime          specify runtime in seconds (default 10)\n"
          "   -g,--getattr          issue getattrs instead of read/write\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [316 x i8] c"Usage: diodload [OPTIONS]\0A -s,--server HOST:PORT server (default localhost:564)\0A -m,--msize msize (default 65536)\0A -n,--numthreads specify thread count (default 16)\0A -r,--runtime specify runtime in seconds (default 10)\0A -g,--getattr issue getattrs instead of read/write\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([316 x i8], [316 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [316 x i8] c"Usage: diodload [OPTIONS]\0A -s,--server HOST:PORT server (default localhost:564)\0A -m,--msize msize (default 65536)\0A -n,--numthreads specify thread count (default 16)\0A -r,--runtime specify runtime in seconds (default 10)\0A -g,--getattr issue getattrs instead of read/write\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([316 x i8], [316 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
float float_clamp(float f, float min, float max) {
  return f < min ? min : (f > max ? max : f);
}


x86 assembly (clang, -O0):
<float_clamp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <float_clamp+0x35>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1167 <float_clamp+0x67>
movss  -0x4(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1153 <float_clamp+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    115d <float_clamp+0x5d>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_clamp>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @float_clamp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %5
br label %22
12: ; preds = %3
%13 = load float, float* %4
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
br label %20
18: ; preds = %12
%19 = load float, float* %4
br label %20
20: ; preds = %18, %16
%21 = phi float [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi float [ %11, %10 ], [ %21, %20 ]
ret float %23
}

LLVM IR (-O2):
define float @float_clamp(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
int del_link() { return 0; }


x86 assembly (clang, -O0):
<del_link>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_link>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @del_link() {
ret i32 0
}

LLVM IR (-O2):
define i32 @del_link() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ openHotstartFile1();
int /*<<< orphan*/ openHotstartFile2();
int hotstart_open() {
  if (!openHotstartFile1())
    return 0;
  if (!openHotstartFile2())
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<hotstart_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <openHotstartFile1@plt>
cmp    $0x0,%eax
jne    1144 <hotstart_open+0x24>
movl   $0x0,-0x4(%rbp)
jmp    1167 <hotstart_open+0x47>
mov    $0x0,%al
call   1030 <openHotstartFile2@plt>
cmp    $0x0,%eax
jne    1160 <hotstart_open+0x40>
movl   $0x0,-0x4(%rbp)
jmp    1167 <hotstart_open+0x47>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hotstart_open>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <openHotstartFile1@plt>
test   %eax,%eax
je     113c <hotstart_open+0x1c>
xor    %eax,%eax
call   1030 <openHotstartFile2@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hotstart_open() {
%1 = alloca i32
%2 = call i32 (...) @openHotstartFile1()
%3 = icmp ne i32 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %0
store i32 0, i32* %1
br label %10
5: ; preds = %0
%6 = call i32 (...) @openHotstartFile2()
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %5
store i32 0, i32* %1
br label %10
9: ; preds = %5
store i32 1, i32* %1
br label %10
10: ; preds = %9, %8, %4
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @hotstart_open() {
%1 = tail call i32 (...) @openHotstartFile1()
%2 = icmp eq i32 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i32 (...) @openHotstartFile2()
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
void ff_sws_init_swscale_aarch64() {}


x86 assembly (clang, -O0):
<ff_sws_init_swscale_aarch64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_sws_init_swscale_aarch64>:
ret

LLVM IR (-O0):
define void @ff_sws_init_swscale_aarch64() {
ret void
}

LLVM IR (-O2):
define void @ff_sws_init_swscale_aarch64() {
ret void
}
void generate_numbers(int *numbers) {
  int i;
  for (i = 1; i < 10; i++)
    numbers[i] = numbers[i - 1] + 4;
}


x86 assembly (clang, -O0):
<generate_numbers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    1145 <generate_numbers+0x45>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
add    $0x4,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <generate_numbers+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_numbers>:
mov    (%rdi),%eax
movd   %eax,%xmm0
pshufd $0x0,%xmm0,%xmm0
movdqa 0xeed(%rip),%xmm1
paddd  %xmm0,%xmm1
paddd  0xef1(%rip),%xmm0
movdqu %xmm1,0x4(%rdi)
movdqu %xmm0,0x14(%rdi)
add    $0x24,%eax
mov    %eax,0x24(%rdi)
ret

LLVM IR (-O0):
define void @generate_numbers(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 1, i32* %3
br label %4
4: ; preds = %19, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %22
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
%13 = load i32, i32* %12
%14 = add nsw i32 %13, 4
%15 = load i32*, i32** %2
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
store i32 %14, i32* %18
br label %19
19: ; preds = %7
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %4
22: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @generate_numbers(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = insertelement <4 x i32> poison, i32 %2, i64 0
%5 = shufflevector <4 x i32> %4, <4 x i32> poison, <4 x i32> zeroinitializer
%6 = add nsw <4 x i32> %5, <i32 4, i32 8, i32 12, i32 16>
%7 = bitcast i32* %3 to <4 x i32>*
store <4 x i32> %6, <4 x i32>* %7
%8 = getelementptr inbounds i32, i32* %0, i64 5
%9 = add nsw <4 x i32> %5, <i32 20, i32 24, i32 28, i32 32>
%10 = bitcast i32* %8 to <4 x i32>*
store <4 x i32> %9, <4 x i32>* %10
%11 = add nsw i32 %2, 36
%12 = getelementptr inbounds i32, i32* %0, i64 9
store i32 %11, i32* %12
ret void
}
void showImage(int image, int align) {}


x86 assembly (clang, -O0):
<showImage>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<showImage>:
ret

LLVM IR (-O0):
define void @showImage(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @showImage(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int a = 4;
  int b = 5;
  assert(a > b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 4, i32* %1
store i32 5, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = icmp sgt i32 %3, %4
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 0)
ret i32 0
}
void v(float *d, float s) {
  d[0] += s;
  d[1] += s;
  d[2] += s;
}


x86 assembly (clang, -O0):
<v>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
addss  (%rax),%xmm0
movss  %xmm0,(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
addss  0x4(%rax),%xmm0
movss  %xmm0,0x4(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
addss  0x8(%rax),%xmm0
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<v>:
movss  (%rdi),%xmm1
addss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
movss  0x4(%rdi),%xmm1
addss  %xmm0,%xmm1
movss  %xmm1,0x4(%rdi)
addss  0x8(%rdi),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @v(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
store float* %0, float** %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float*, float** %3
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = fadd float %8, %5
store float %9, float* %7
%10 = load float, float* %4
%11 = load float*, float** %3
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = fadd float %13, %10
store float %14, float* %12
%15 = load float, float* %4
%16 = load float*, float** %3
%17 = getelementptr inbounds float, float* %16, i64 2
%18 = load float, float* %17
%19 = fadd float %18, %15
store float %19, float* %17
ret void
}

LLVM IR (-O2):
define void @v(float* nocapture %0, float %1) {
%3 = load float, float* %0
%4 = fadd float %3, %1
store float %4, float* %0
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = fadd float %6, %1
store float %7, float* %5
%8 = getelementptr inbounds float, float* %0, i64 2
%9 = load float, float* %8
%10 = fadd float %9, %1
store float %10, float* %8
ret void
}
int ub(int a[], int s, int e, int k) {
  int m;
  while (e > s) {
    m = (s + e) / 2;
    if (a[m] <= k)
      s = m + 1;
    else
      e = m;
  }
  return e + 1;
}


x86 assembly (clang, -O0):
<ub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    115b <ub+0x5b>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x14(%rbp),%eax
jg     1150 <ub+0x50>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1156 <ub+0x56>
mov    -0x18(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1111 <ub+0x11>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ub>:
mov    %edx,%eax
cmp    %esi,%edx
jg     111b <ub+0x1b>
jmp    113b <ub+0x3b>
nopl   0x0(%rax,%rax,1)
add    $0x1,%r9d
mov    %r9d,%esi
cmp    %esi,%eax
jle    113b <ub+0x3b>
lea    (%rsi,%rax,1),%r8d
mov    %r8d,%r9d
shr    $0x1f,%r9d
add    %r8d,%r9d
sar    %r9d
movslq %r9d,%rdx
cmp    %ecx,(%rdi,%rdx,4)
jle    1110 <ub+0x10>
mov    %r9d,%eax
cmp    %esi,%eax
jg     111b <ub+0x1b>
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ub(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
br label %10
10: ; preds = %31, %4
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = icmp sgt i32 %11, %12
br i1 %13, label %14, label %32
14: ; preds = %10
%15 = load i32, i32* %6
%16 = load i32, i32* %7
%17 = add nsw i32 %15, %16
%18 = sdiv i32 %17, 2
store i32 %18, i32* %9
%19 = load i32*, i32** %5
%20 = load i32, i32* %9
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = load i32, i32* %22
%24 = load i32, i32* %8
%25 = icmp sle i32 %23, %24
br i1 %25, label %26, label %29
26: ; preds = %14
%27 = load i32, i32* %9
%28 = add nsw i32 %27, 1
store i32 %28, i32* %6
br label %31
29: ; preds = %14
%30 = load i32, i32* %9
store i32 %30, i32* %7
br label %31
31: ; preds = %29, %26
br label %10
32: ; preds = %10
%33 = load i32, i32* %7
%34 = add nsw i32 %33, 1
ret i32 %34
}

LLVM IR (-O2):
define i32 @ub(i32* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp sgt i32 %2, %1
br i1 %5, label %6, label %19
6: ; preds = %4, %6
%7 = phi i32 [ %17, %6 ], [ %1, %4 ]
%8 = phi i32 [ %16, %6 ], [ %2, %4 ]
%9 = add nsw i32 %7, %8
%10 = sdiv i32 %9, 2
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %0, i64 %11
%13 = load i32, i32* %12
%14 = icmp sgt i32 %13, %3
%15 = add nsw i32 %10, 1
%16 = select i1 %14, i32 %10, i32 %8
%17 = select i1 %14, i32 %7, i32 %15
%18 = icmp sgt i32 %16, %17
br i1 %18, label %6, label %19
19: ; preds = %6, %4
%20 = phi i32 [ %2, %4 ], [ %16, %6 ]
%21 = add nsw i32 %20, 1
ret i32 %21
}
signed int *u_to_s_return(unsigned int *up) { return up; }


x86 assembly (clang, -O0):
<u_to_s_return>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_to_s_return>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32* @u_to_s_return(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret i32* %3
}

LLVM IR (-O2):
define i32* @u_to_s_return(i32* readnone returned %0) {
ret i32* %0
}
/* Variables and functions */
int /*<<< orphan*/ idt_add(int, unsigned int, int);
void syscall_init() {
  extern void _syscall_handler();
  idt_add(0x80, (unsigned int)_syscall_handler, 0x8e);
}


x86 assembly (clang, -O0):
<syscall_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80,%edi
mov    0x2ec8(%rip),%rax
mov    %eax,%esi
mov    $0x8e,%edx
call   1030 <idt_add@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall_init>:
mov    0x2ed2(%rip),%esi
mov    $0x80,%edi
mov    $0x8e,%edx
jmp    1030 <idt_add@plt>

LLVM IR (-O0):
define void @syscall_init() {
%1 = call i32 @idt_add(i32 128, i32 ptrtoint (void (...)* @_syscall_handler to i32), i32 142)
ret void
}

LLVM IR (-O2):
define void @syscall_init() {
%1 = tail call i32 @idt_add(i32 128, i32 ptrtoint (void (...)* @_syscall_handler to i32), i32 142)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void PrintArgs(char *name) {
  fprintf(stderr,
          "                                                        \n"
          "Usage: %s [VALUE] [VALUE] < input > output              \n"
          "                                                        \n"
          "Cut (select) read sequence from base/score x1 to x2.    \n"
          "                                                        \n",
          name);
}


x86 assembly (clang, -O0):
<PrintArgs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintArgs>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [286 x i8] c" \0AUsage: %s [VALUE] [VALUE] < input > output \0A \0ACut (select) read sequence from base/score x1 to x2. \0A \0A\00"
define void @PrintArgs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([286 x i8], [286 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [286 x i8] c" \0AUsage: %s [VALUE] [VALUE] < input > output \0A \0ACut (select) read sequence from base/score x1 to x2. \0A \0A\00"
define void @PrintArgs(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([286 x i8], [286 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void mod_udpd_is_dlclose_safe() {}


x86 assembly (clang, -O0):
<mod_udpd_is_dlclose_safe>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_udpd_is_dlclose_safe>:
ret

LLVM IR (-O0):
define void @mod_udpd_is_dlclose_safe() {
ret void
}

LLVM IR (-O2):
define void @mod_udpd_is_dlclose_safe() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EPINonBlockingReadConfigure(uint32_t ui32Base, uint32_t ui32Channel,
                                 uint32_t ui32DataSize, uint32_t ui32Address) {
  uint32_t ui32Offset;
  ;
  ;
  ;
  ;
  ui32Offset = ui32Channel * (0x00000030 - 0x00000020);
  (*((volatile unsigned long *)(ui32Base + 0x00000020 + ui32Offset))) =
      ui32DataSize;
  (*((volatile unsigned long *)(ui32Base + 0x00000024 + ui32Offset))) =
      ui32Address;
}


x86 assembly (clang, -O0):
<EPINonBlockingReadConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0x14(%rbp)
movslq -0xc(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    $0x20,%eax
add    -0x14(%rbp),%eax
cltq
mov    %rcx,(%rax)
movslq -0x10(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    $0x24,%eax
add    -0x14(%rbp),%eax
cltq
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPINonBlockingReadConfigure>:
shl    $0x4,%esi
movslq %edx,%rax
lea    (%rsi,%rdi,1),%edx
add    $0x20,%edx
movslq %edx,%rdx
mov    %rax,(%rdx)
movslq %ecx,%rax
lea    (%rsi,%rdi,1),%ecx
add    $0x24,%ecx
movslq %ecx,%rcx
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @EPINonBlockingReadConfigure(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %6
%11 = mul nsw i32 %10, 16
store i32 %11, i32* %9
%12 = load i32, i32* %7
%13 = sext i32 %12 to i64
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 32
%16 = load i32, i32* %9
%17 = add nsw i32 %15, %16
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i64*
store volatile i64 %13, i64* %19
%20 = load i32, i32* %8
%21 = sext i32 %20 to i64
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 36
%24 = load i32, i32* %9
%25 = add nsw i32 %23, %24
%26 = sext i32 %25 to i64
%27 = inttoptr i64 %26 to i64*
store volatile i64 %21, i64* %27
ret void
}

LLVM IR (-O2):
define void @EPINonBlockingReadConfigure(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl nsw i32 %1, 4
%6 = sext i32 %2 to i64
%7 = add i32 %5, %0
%8 = add i32 %7, 32
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i64*
store volatile i64 %6, i64* %10
%11 = sext i32 %3 to i64
%12 = add i32 %7, 36
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i64*
store volatile i64 %11, i64* %14
ret void
}
int cdrom_dummy_generic_packet(struct cdrom_device_info *cdi, void *cgc) {
  (void)cdi;
  (void)cgc;
  return -5;
}


x86 assembly (clang, -O0):
<cdrom_dummy_generic_packet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xfffffffb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdrom_dummy_generic_packet>:
mov    $0xfffffffb,%eax
ret

LLVM IR (-O0):
%struct.cdrom_device_info = type opaque
define i32 @cdrom_dummy_generic_packet(%struct.cdrom_device_info* %0, i8* %1) {
%3 = alloca %struct.cdrom_device_info*
%4 = alloca i8*
store %struct.cdrom_device_info* %0, %struct.cdrom_device_info** %3
store i8* %1, i8** %4
%5 = load %struct.cdrom_device_info*, %struct.cdrom_device_info** %3
%6 = load i8*, i8** %4
ret i32 -5
}

LLVM IR (-O2):
%struct.cdrom_device_info = type opaque
define i32 @cdrom_dummy_generic_packet(%struct.cdrom_device_info* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -5
}
float floorf(float x __attribute__((unused))) { return 0.0; }


x86 assembly (clang, -O0):
<floorf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<floorf>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @floorf(float %0) {
%2 = alloca float
store float %0, float* %2
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @floorf(float %0) {
ret float 0.000000e+00
}
int processors(void) {
  long config = 1;
  long online = 1;
  if (config <= 0)
    config = 1;
  if (online <= 0)
    online = 1;
  return config < online ? config : online;
}


x86 assembly (clang, -O0):
<processors>:
push   %rbp
mov    %rsp,%rbp
movq   $0x1,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jg     1127 <processors+0x27>
movq   $0x1,-0x8(%rbp)
cmpq   $0x0,-0x10(%rbp)
jg     113a <processors+0x3a>
movq   $0x1,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1155 <processors+0x55>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    115d <processors+0x5d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<processors>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @processors() {
%1 = alloca i64
%2 = alloca i64
store i64 1, i64* %1
store i64 1, i64* %2
%3 = load i64, i64* %1
%4 = icmp sle i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i64 1, i64* %1
br label %6
6: ; preds = %5, %0
%7 = load i64, i64* %2
%8 = icmp sle i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i64 1, i64* %2
br label %10
10: ; preds = %9, %6
%11 = load i64, i64* %1
%12 = load i64, i64* %2
%13 = icmp slt i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i64, i64* %1
br label %18
16: ; preds = %10
%17 = load i64, i64* %2
br label %18
18: ; preds = %16, %14
%19 = phi i64 [ %15, %14 ], [ %17, %16 ]
%20 = trunc i64 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @processors() {
ret i32 1
}
void break8() {}


x86 assembly (clang, -O0):
<break8>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<break8>:
ret

LLVM IR (-O0):
define void @break8() {
ret void
}

LLVM IR (-O2):
define void @break8() {
ret void
}
/* Variables and functions */
double Section3Area(float *);
double Section3Perim(float *);
int /*<<< orphan*/ printf(char *, double, double);
int Section3(float radius) {
  printf("\n3.- The perimeter is: %.2f, the area is: %.2f\n",
         Section3Perim(&radius), Section3Area(&radius));
  return 0;
}


x86 assembly (clang, -O0):
<Section3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1040 <Section3Perim@plt>
movsd  %xmm0,-0x10(%rbp)
lea    -0x4(%rbp),%rdi
call   1050 <Section3Area@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Section3>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0x4(%rsp)
lea    0x4(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <Section3Perim@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1050 <Section3Area@plt>
movaps %xmm0,%xmm1
lea    0xea0(%rip),%rdi
movsd  0x8(%rsp),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [48 x i8] c"\0A3.- The perimeter is: %.2f, the area is: %.2f\0A\00"
define i32 @Section3(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call double @Section3Perim(float* %2)
%4 = call double @Section3Area(float* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), double %3, double %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [48 x i8] c"\0A3.- The perimeter is: %.2f, the area is: %.2f\0A\00"
define i32 @Section3(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call double @Section3Perim(float* %2)
%4 = call double @Section3Area(float* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), double %3, double %4)
ret i32 0
}
int test_bit(int nr, const volatile unsigned long *addr) {
  return 1UL & (addr[((nr) / ((int)((sizeof(long) * 8))))] >>
                (nr & (((int)((sizeof(long) * 8))) - 1)));
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rax
mov    -0x4(%rbp),%ecx
and    $0x3f,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
mov    %edi,%ecx
lea    0x3f(%rcx),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x6,%eax
cltq
mov    (%rsi,%rax,8),%rax
shr    %cl,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 64
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i64, i64* %5, i64 %8
%10 = load volatile i64, i64* %9
%11 = load i32, i32* %3
%12 = and i32 %11, 63
%13 = zext i32 %12 to i64
%14 = lshr i64 %10, %13
%15 = and i64 1, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = sdiv i32 %0, 64
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = load volatile i64, i64* %5
%7 = and i32 %0, 63
%8 = zext i32 %7 to i64
%9 = lshr i64 %6, %8
%10 = trunc i64 %9 to i32
%11 = and i32 %10, 1
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void vector_free(void *v) {
  free(v);
  return;
}


x86 assembly (clang, -O0):
<vector_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @vector_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @vector_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
long gettl(st)
char st[8];
{
  long h, s, m;
  sscanf(st, "%02ld:%02ld:%02ld", &h, &m, &s);
  return (h * 60L * 60L + m * 60L + s);
}


x86 assembly (clang, -O0):
<gettl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x10(%rbp),%rdx
lea    -0x20(%rbp),%rcx
lea    -0x18(%rbp),%r8
mov    $0x0,%al
call   1030 <sscanf@plt>
imul   $0x3c,-0x10(%rbp),%rax
imul   $0x3c,%rax,%rax
imul   $0x3c,-0x20(%rbp),%rcx
add    %rcx,%rax
add    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettl>:
sub    $0x18,%rsp
lea    0xee5(%rip),%rsi
lea    0x10(%rsp),%rdx
mov    %rsp,%rcx
lea    0x8(%rsp),%r8
xor    %eax,%eax
call   1030 <sscanf@plt>
imul   $0xe10,0x10(%rsp),%rcx
imul   $0x3c,(%rsp),%rax
add    %rcx,%rax
add    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [18 x i8] c"%02ld:%02ld:%02ld\00"
define i64 @gettl(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 (i8*, i8*, ...) @sscanf(i8* %6, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64* %3, i64* %5, i64* %4)
%8 = load i64, i64* %3
%9 = mul nsw i64 %8, 60
%10 = mul nsw i64 %9, 60
%11 = load i64, i64* %5
%12 = mul nsw i64 %11, 60
%13 = add nsw i64 %10, %12
%14 = load i64, i64* %4
%15 = add nsw i64 %13, %14
ret i64 %15
}

LLVM IR (-O2):
@.str = [18 x i8] c"%02ld:%02ld:%02ld\00"
define i64 @gettl(i8* nocapture %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = bitcast i64* %2 to i8*
%6 = bitcast i64* %3 to i8*
%7 = bitcast i64* %4 to i8*
%8 = call i32 (i8*, i8*, ...) @sscanf(i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64* %2, i64* %4, i64* %3)
%9 = load i64, i64* %2
%10 = mul i64 %9, 3600
%11 = load i64, i64* %4
%12 = mul nsw i64 %11, 60
%13 = add nsw i64 %12, %10
%14 = load i64, i64* %3
%15 = add nsw i64 %13, %14
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_CLR_RFM_CTL1_PIN() { clear_io_bit(0x43, 6); }


x86 assembly (clang, -O0):
<TOSH_CLR_RFM_CTL1_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%edi
mov    $0x6,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_CLR_RFM_CTL1_PIN>:
mov    $0x43,%edi
mov    $0x6,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_CLR_RFM_CTL1_PIN() {
%1 = call i32 @clear_io_bit(i32 67, i32 6)
ret void
}

LLVM IR (-O2):
define void @TOSH_CLR_RFM_CTL1_PIN() {
%1 = tail call i32 @clear_io_bit(i32 67, i32 6)
ret void
}
void slashcharclass2HWHITESPACE() {}


x86 assembly (clang, -O0):
<slashcharclass2HWHITESPACE>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slashcharclass2HWHITESPACE>:
ret

LLVM IR (-O0):
define void @slashcharclass2HWHITESPACE() {
ret void
}

LLVM IR (-O2):
define void @slashcharclass2HWHITESPACE() {
ret void
}
void Delay(volatile unsigned long a) {
  a = 10 * a;
  while (a != 0)
    a--;
}


x86 assembly (clang, -O0):
<Delay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0xa,%rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x0,%rax
je     1133 <Delay+0x33>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
jmp    1114 <Delay+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Delay>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
add    %rax,%rax
lea    (%rax,%rax,4),%rax
mov    %rax,-0x8(%rsp)
cmpq   $0x0,-0x8(%rsp)
je     112e <Delay+0x2e>
xchg   %ax,%ax
addq   $0xffffffffffffffff,-0x8(%rsp)
cmpq   $0x0,-0x8(%rsp)
jne    1120 <Delay+0x20>
ret

LLVM IR (-O0):
define void @Delay(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = mul i64 10, %3
store volatile i64 %4, i64* %2
br label %5
5: ; preds = %8, %1
%6 = load volatile i64, i64* %2
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load volatile i64, i64* %2
%10 = add i64 %9, -1
store volatile i64 %10, i64* %2
br label %5
11: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @Delay(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = mul i64 %3, 10
store volatile i64 %4, i64* %2
%5 = load volatile i64, i64* %2
%6 = icmp eq i64 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1, %7
%8 = load volatile i64, i64* %2
%9 = add i64 %8, -1
store volatile i64 %9, i64* %2
%10 = load volatile i64, i64* %2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %1
ret void
}
int ft_tolower(int c) {
  if (c >= 'A' && c <= 'Z')
    return (c + 32);
  return (c);
}


x86 assembly (clang, -O0):
<ft_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     1129 <ft_tolower+0x29>
cmpl   $0x5a,-0x8(%rbp)
jg     1129 <ft_tolower+0x29>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <ft_tolower+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_tolower>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ft_tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stdout;
void testf(void *e, char *message, char *variable) {
  if (e == NULL) {
    fprintf(stdout, "%s- ERROR opening file: %s\n", message, variable);
    exit(0);
  }
}


x86 assembly (clang, -O0):
<testf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1163 <testf+0x43>
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xea9(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testf>:
test   %rdi,%rdi
je     1126 <testf+0x6>
ret
push   %rax
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [28 x i8] c"%s- ERROR opening file: %s\0A\00"
define void @testf(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i32, i32* @stdout
%11 = load i8*, i8** %5
%12 = load i8*, i8** %6
%13 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %11, i8* %12)
%14 = call i32 @exit(i32 0)
unreachable
15: ; preds = %3
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [28 x i8] c"%s- ERROR opening file: %s\0A\00"
define void @testf(i8* readnone %0, i8* %1, i8* %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = load i32, i32* @stdout
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2)
%8 = tail call i32 @exit(i32 0)
unreachable
9: ; preds = %3
ret void
}
void CFGMR3QueryS64Def(void) {}


x86 assembly (clang, -O0):
<CFGMR3QueryS64Def>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3QueryS64Def>:
ret

LLVM IR (-O0):
define void @CFGMR3QueryS64Def() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3QueryS64Def() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint16_t;
struct ipv6_hdr {
  int dummy;
};

/* Variables and functions */
uint16_t rte_ipv6_phdr_cksum(const struct ipv6_hdr *ipv6_hdr,
                             uint64_t ol_flags) {
  return (0);
}


x86 assembly (clang, -O0):
<rte_ipv6_phdr_cksum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_ipv6_phdr_cksum>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ipv6_hdr = type { i32 }
define i32 @rte_ipv6_phdr_cksum(%struct.ipv6_hdr* %0, i32 %1) {
%3 = alloca %struct.ipv6_hdr*
%4 = alloca i32
store %struct.ipv6_hdr* %0, %struct.ipv6_hdr** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.ipv6_hdr = type { i32 }
define i32 @rte_ipv6_phdr_cksum(%struct.ipv6_hdr* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int __swap32md(int);
int main(int argc, char *argv[]) { return 0 * __swap32md(argc); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <__swap32md@plt>
imul   $0x0,%eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <__swap32md@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = call i32 @__swap32md(i32 %6)
%8 = mul nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @__swap32md(i32 %0)
ret i32 0
}
char *desencriptar(char *cadena, int *ret) { return (cadena); }


x86 assembly (clang, -O0):
<desencriptar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<desencriptar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @desencriptar(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
ret i8* %5
}

LLVM IR (-O2):
define i8* @desencriptar(i8* readnone returned %0, i32* nocapture readnone %1) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ MIPS_CLEAR_BIT(int, int);
void xburst_cgm_ungate_ahb_mon() { MIPS_CLEAR_BIT((0xB0000000 + 0x28), 11); }


x86 assembly (clang, -O0):
<xburst_cgm_ungate_ahb_mon>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0000028,%edi
mov    $0xb,%esi
call   1030 <MIPS_CLEAR_BIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xburst_cgm_ungate_ahb_mon>:
mov    $0xb0000028,%edi
mov    $0xb,%esi
jmp    1030 <MIPS_CLEAR_BIT@plt>

LLVM IR (-O0):
define void @xburst_cgm_ungate_ahb_mon() {
%1 = call i32 @MIPS_CLEAR_BIT(i32 -1342177240, i32 11)
ret void
}

LLVM IR (-O2):
define void @xburst_cgm_ungate_ahb_mon() {
%1 = tail call i32 @MIPS_CLEAR_BIT(i32 -1342177240, i32 11)
ret void
}
/* Variables and functions */
double Delay_task(double);
double Flanger_process(double xin) {
  double yout;
  yout = Delay_task(xin);
  return yout;
}


x86 assembly (clang, -O0):
<Flanger_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <Delay_task@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Flanger_process>:
jmp    1030 <Delay_task@plt>

LLVM IR (-O0):
define double @Flanger_process(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double @Delay_task(double %4)
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @Flanger_process(double %0) {
%2 = tail call double @Delay_task(double %0)
ret double %2
}
__attribute__((__always___)) int fn1() { return 0; }


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fn1() {
ret i32 0
}

LLVM IR (-O2):
define i32 @fn1() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ write_uint16(int /*<<< orphan*/ *, unsigned int);
void write_uint32(FILE *f, unsigned int i) {
  write_uint16(f, i >> 16);
  write_uint16(f, i);
}


x86 assembly (clang, -O0):
<write_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
shr    $0x10,%esi
call   1030 <write_uint16@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <write_uint16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_uint32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
shr    $0x10,%esi
call   1030 <write_uint16@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write_uint16@plt>

LLVM IR (-O0):
define void @write_uint32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = lshr i32 %6, 16
%8 = call i32 @write_uint16(i32* %5, i32 %7)
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = call i32 @write_uint16(i32* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @write_uint32(i32* %0, i32 %1) {
%3 = lshr i32 %1, 16
%4 = tail call i32 @write_uint16(i32* %0, i32 %3)
%5 = tail call i32 @write_uint16(i32* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf(
      "Usage: "
      "flib"
      " [options] [action] [sources [destination]]\n"
      "\navailable options:\n"
      "    -f --force		Overwrite destination if already exists\n"
      "    -q --quiet		Don't print messages to stdout\n"
      "\navailable actions:\n"
      "    -e --extract	Extract patches from library\n"
      "    -h --help		Show short description and exit\n"
      "    -l --list		List patches in library file\n"
      "    -V --version	Print version information\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [379 x i8] c"Usage: flib [options] [action] [sources [destination]]\0A\0Aavailable options:\0A -f --force\09\09Overwrite destination if already exists\0A -q --quiet\09\09Don't print messages to stdout\0A\0Aavailable actions:\0A -e --extract\09Extract patches from library\0A -h --help\09\09Show short description and exit\0A -l --list\09\09List patches in library file\0A -V --version\09Print version information\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([379 x i8], [379 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [378 x i8] c"Usage: flib [options] [action] [sources [destination]]\0A\0Aavailable options:\0A -f --force\09\09Overwrite destination if already exists\0A -q --quiet\09\09Don't print messages to stdout\0A\0Aavailable actions:\0A -e --extract\09Extract patches from library\0A -h --help\09\09Show short description and exit\0A -l --list\09\09List patches in library file\0A -V --version\09Print version information\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([378 x i8], [378 x i8]* @str, i64 0, i64 0))
ret void
}