#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int nRF24L01P_getRegister(int);
int /*<<< orphan*/ nRF24L01P_setRegister(int, int);
int /*<<< orphan*/ printf(char *, int);
void nRF24L01P_setRfOutputPower(int power) {
  int rfSetup;
  rfSetup = nRF24L01P_getRegister(0x06) & ~(0x3 << 1);
  switch (power) {
  case 0:
    rfSetup |= (0x3 << 1);
    break;
  case -6:
    rfSetup |= (0x2 << 1);
    break;
  case -12:
    rfSetup |= (0x1 << 1);
    break;
  case -18:
    rfSetup |= (0x0 << 1);
    break;
  default:
    printf("nRF24L01P: Invalid RF Output Power setting %d\r\n", power);
    return;
  }
  nRF24L01P_setRegister(0x06, rfSetup);
}


x86 assembly (clang, -O0):
<nRF24L01P_setRfOutputPower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x6,%edi
call   1050 <nRF24L01P_getRegister@plt>
and    $0xfffffff9,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x12,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x12,%eax
ja     11ac <nRF24L01P_setRfOutputPower+0x7c>
mov    -0x10(%rbp),%rax
lea    0xe95(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x8(%rbp),%eax
or     $0x6,%eax
mov    %eax,-0x8(%rbp)
jmp    11c0 <nRF24L01P_setRfOutputPower+0x90>
mov    -0x8(%rbp),%eax
or     $0x4,%eax
mov    %eax,-0x8(%rbp)
jmp    11c0 <nRF24L01P_setRfOutputPower+0x90>
mov    -0x8(%rbp),%eax
or     $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    11c0 <nRF24L01P_setRfOutputPower+0x90>
mov    -0x8(%rbp),%eax
or     $0x0,%eax
mov    %eax,-0x8(%rbp)
jmp    11c0 <nRF24L01P_setRfOutputPower+0x90>
mov    -0x4(%rbp),%esi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
jmp    11cd <nRF24L01P_setRfOutputPower+0x9d>
mov    -0x8(%rbp),%esi
mov    $0x6,%edi
call   1040 <nRF24L01P_setRegister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nRF24L01P_setRfOutputPower>:
push   %rbx
mov    %edi,%ebx
mov    $0x6,%edi
call   1050 <nRF24L01P_getRegister@plt>
lea    0x12(%rbx),%ecx
ror    %ecx
cmp    $0x9,%ecx
ja     1161 <nRF24L01P_setRfOutputPower+0x31>
mov    %eax,%esi
and    $0xfffffff9,%esi
lea    0xead(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
or     $0x2,%esi
jmp    117a <nRF24L01P_setRfOutputPower+0x4a>
lea    0xec0(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <printf@plt>
or     $0x4,%esi
jmp    117a <nRF24L01P_setRfOutputPower+0x4a>
or     $0x6,%eax
mov    %eax,%esi
mov    $0x6,%edi
pop    %rbx
jmp    1040 <nRF24L01P_setRegister@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"nRF24L01P: Invalid RF Output Power setting %d\0D\0A\00"
define void @nRF24L01P_setRfOutputPower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @nRF24L01P_getRegister(i32 6)
%5 = and i32 %4, -7
store i32 %5, i32* %3
%6 = load i32, i32* %2
switch i32 %6, label %19 [
i32 0, label %7
i32 -6, label %10
i32 -12, label %13
i32 -18, label %16
]
7: ; preds = %1
%8 = load i32, i32* %3
%9 = or i32 %8, 6
store i32 %9, i32* %3
br label %22
10: ; preds = %1
%11 = load i32, i32* %3
%12 = or i32 %11, 4
store i32 %12, i32* %3
br label %22
13: ; preds = %1
%14 = load i32, i32* %3
%15 = or i32 %14, 2
store i32 %15, i32* %3
br label %22
16: ; preds = %1
%17 = load i32, i32* %3
%18 = or i32 %17, 0
store i32 %18, i32* %3
br label %22
19: ; preds = %1
%20 = load i32, i32* %2
%21 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 %20)
br label %25
22: ; preds = %16, %13, %10, %7
%23 = load i32, i32* %3
%24 = call i32 @nRF24L01P_setRegister(i32 6, i32 %23)
br label %25
25: ; preds = %22, %19
ret void
}

LLVM IR (-O2):
@.str = [48 x i8] c"nRF24L01P: Invalid RF Output Power setting %d\0D\0A\00"
define void @nRF24L01P_setRfOutputPower(i32 %0) {
%2 = tail call i32 @nRF24L01P_getRegister(i32 6)
%3 = and i32 %2, -7
%4 = add i32 %0, 18
%5 = tail call i32 @llvm.fshl.i32(i32 %4, i32 %4, i32 31)
switch i32 %5, label %12 [
i32 9, label %6
i32 6, label %8
i32 3, label %10
i32 0, label %14
]
6: ; preds = %1
%7 = or i32 %2, 6
br label %14
8: ; preds = %1
%9 = or i32 %3, 4
br label %14
10: ; preds = %1
%11 = or i32 %3, 2
br label %14
12: ; preds = %1
%13 = tail call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %17
14: ; preds = %1, %10, %8, %6
%15 = phi i32 [ %11, %10 ], [ %9, %8 ], [ %7, %6 ], [ %3, %1 ]
%16 = tail call i32 @nRF24L01P_setRegister(i32 6, i32 %15)
br label %17
17: ; preds = %14, %12
ret void
}