#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned short TH_CONTROL_PHASE(unsigned char volatile *);
unsigned short read6Btn(unsigned short port) {
  volatile unsigned char *pb;
  unsigned short val, v1, v2;
  pb = (volatile unsigned char *)0xa10003 + port * 2;
  v1 = TH_CONTROL_PHASE(pb);
  val = TH_CONTROL_PHASE(pb);
  v2 = TH_CONTROL_PHASE(pb);
  val = TH_CONTROL_PHASE(pb);
  if ((val & 0x0F00) != 0x0F00)
    v2 = (0x00 << 12) | 0x0F00;
  else
    v2 = (0x01 << 12) | ((v2 & 0x000F) << 8);
  val = ((v1 & 0x3000) >> 6) | (v1 & 0x003F);
  val |= v2;
  val ^= 0x0FFF;
  return val;
}


x86 assembly (clang, -O0):
<read6Btn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
shl    $0x1,%eax
movslq %eax,%rcx
mov    $0xa10003,%eax
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %ax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %ax,-0x16(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %ax,-0x12(%rbp)
movzwl -0x12(%rbp),%eax
and    $0xf00,%eax
cmp    $0xf00,%eax
je     1188 <read6Btn+0x78>
movw   $0xf00,-0x16(%rbp)
jmp    119b <read6Btn+0x8b>
movzwl -0x16(%rbp),%eax
and    $0xf,%eax
shl    $0x8,%eax
or     $0x1000,%eax
mov    %ax,-0x16(%rbp)
movzwl -0x14(%rbp),%eax
and    $0x3000,%eax
sar    $0x6,%eax
movzwl -0x14(%rbp),%ecx
and    $0x3f,%ecx
or     %ecx,%eax
mov    %ax,-0x12(%rbp)
movzwl -0x16(%rbp),%ecx
movzwl -0x12(%rbp),%eax
or     %ecx,%eax
mov    %ax,-0x12(%rbp)
movzwl -0x12(%rbp),%eax
xor    $0xfff,%eax
mov    %ax,-0x12(%rbp)
movzwl -0x12(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read6Btn>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%eax
lea    (%rax,%rax,1),%r14
add    $0xa10003,%r14
mov    %r14,%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %eax,%ebx
mov    %r14,%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %r14,%rdi
call   1030 <TH_CONTROL_PHASE@plt>
mov    %eax,%ebp
mov    %r14,%rdi
call   1030 <TH_CONTROL_PHASE@plt>
not    %eax
and    $0xf,%ebp
shl    $0x8,%ebp
or     $0x1000,%ebp
test   $0xf00,%eax
mov    $0xf00,%eax
cmove  %ebp,%eax
mov    %ebx,%ecx
shr    $0x6,%ecx
and    $0xc0,%ecx
and    $0x3f,%ebx
or     %ecx,%ebx
or     %eax,%ebx
xor    $0xfff,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i16 @read6Btn(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8*
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
store i16 %0, i16* %2
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = mul nsw i32 %8, 2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* inttoptr (i64 10551299 to i8*), i64 %10
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = call zeroext i16 @TH_CONTROL_PHASE(i8* %12)
store i16 %13, i16* %5
%14 = load i8*, i8** %3
%15 = call zeroext i16 @TH_CONTROL_PHASE(i8* %14)
store i16 %15, i16* %4
%16 = load i8*, i8** %3
%17 = call zeroext i16 @TH_CONTROL_PHASE(i8* %16)
store i16 %17, i16* %6
%18 = load i8*, i8** %3
%19 = call zeroext i16 @TH_CONTROL_PHASE(i8* %18)
store i16 %19, i16* %4
%20 = load i16, i16* %4
%21 = zext i16 %20 to i32
%22 = and i32 %21, 3840
%23 = icmp ne i32 %22, 3840
br i1 %23, label %24, label %25
24: ; preds = %1
store i16 3840, i16* %6
br label %32
25: ; preds = %1
%26 = load i16, i16* %6
%27 = zext i16 %26 to i32
%28 = and i32 %27, 15
%29 = shl i32 %28, 8
%30 = or i32 4096, %29
%31 = trunc i32 %30 to i16
store i16 %31, i16* %6
br label %32
32: ; preds = %25, %24
%33 = load i16, i16* %5
%34 = zext i16 %33 to i32
%35 = and i32 %34, 12288
%36 = ashr i32 %35, 6
%37 = load i16, i16* %5
%38 = zext i16 %37 to i32
%39 = and i32 %38, 63
%40 = or i32 %36, %39
%41 = trunc i32 %40 to i16
store i16 %41, i16* %4
%42 = load i16, i16* %6
%43 = zext i16 %42 to i32
%44 = load i16, i16* %4
%45 = zext i16 %44 to i32
%46 = or i32 %45, %43
%47 = trunc i32 %46 to i16
store i16 %47, i16* %4
%48 = load i16, i16* %4
%49 = zext i16 %48 to i32
%50 = xor i32 %49, 4095
%51 = trunc i32 %50 to i16
store i16 %51, i16* %4
%52 = load i16, i16* %4
ret i16 %52
}

LLVM IR (-O2):
define zeroext i16 @read6Btn(i16 zeroext %0) {
%2 = zext i16 %0 to i64
%3 = shl nuw nsw i64 %2, 1
%4 = getelementptr inbounds i8, i8* inttoptr (i64 10551299 to i8*), i64 %3
%5 = tail call zeroext i16 @TH_CONTROL_PHASE(i8* %4)
%6 = tail call zeroext i16 @TH_CONTROL_PHASE(i8* %4)
%7 = tail call zeroext i16 @TH_CONTROL_PHASE(i8* %4)
%8 = tail call zeroext i16 @TH_CONTROL_PHASE(i8* %4)
%9 = and i16 %8, 3840
%10 = icmp eq i16 %9, 3840
%11 = shl i16 %7, 8
%12 = and i16 %11, 3840
%13 = or i16 %12, 4096
%14 = select i1 %10, i16 %13, i16 3840
%15 = lshr i16 %5, 6
%16 = and i16 %15, 192
%17 = and i16 %5, 63
%18 = or i16 %16, %17
%19 = or i16 %18, %14
%20 = xor i16 %19, 4095
ret i16 %20
}