xunge/DecIR huggingface dataset:
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_append_standard_solution(int n, int m, double *sol) {
  int *a, fail;
  int b[2];
  b[0] = n;
  b[1] = m;
  fail = _ada_use_c2phc(36, a, b, sol);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_append_standard_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
lea    -0x24(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x24,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_append_standard_solution>:
push   %rax
mov    %rdx,%rcx
mov    %edi,(%rsp)
mov    %esi,0x4(%rsp)
mov    %rsp,%rdx
mov    $0x24,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_append_standard_solution(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca [2 x i32]
store i32 %0, i32* %4
store i32 %1, i32* %5
store double* %2, double** %6
%10 = load i32, i32* %4
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %12, i32* %13
%14 = load i32*, i32** %7
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%16 = load double*, double** %6
%17 = call i32 @_ada_use_c2phc(i32 36, i32* %14, i32* %15, double* %16)
store i32 %17, i32* %8
%18 = load i32, i32* %8
ret i32 %18
}

LLVM IR (-O2):
define i32 @solcon_append_standard_solution(i32 %0, i32 %1, double* %2) {
%4 = alloca [2 x i32]
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %7
%8 = call i32 @_ada_use_c2phc(i32 36, i32* undef, i32* %6, double* %2)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ echo(int);
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ pthread_detach(int /*<<< orphan*/);
int /*<<< orphan*/ pthread_self();
void *thread(void *vargp) {
  int connfd = *((int *)vargp);
  pthread_detach(pthread_self());
  free(vargp);
  echo(connfd);
  close(connfd);
  return NULL;
}


x86 assembly (clang, -O0):
<thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1070 <pthread_self@plt>
mov    %eax,%edi
call   1060 <pthread_detach@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%edi
call   1040 <echo@plt>
mov    -0xc(%rbp),%edi
call   1050 <close@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    (%rdi),%ebp
xor    %eax,%eax
call   1070 <pthread_self@plt>
mov    %eax,%edi
call   1060 <pthread_detach@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%edi
call   1040 <echo@plt>
mov    %ebp,%edi
call   1050 <close@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = call i32 (...) @pthread_self()
%8 = call i32 @pthread_detach(i32 %7)
%9 = load i8*, i8** %2
%10 = call i32 @free(i8* %9)
%11 = load i32, i32* %3
%12 = call i32 @echo(i32 %11)
%13 = load i32, i32* %3
%14 = call i32 @close(i32 %13)
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @thread(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 (...) @pthread_self()
%5 = tail call i32 @pthread_detach(i32 %4)
%6 = tail call i32 @free(i8* %0)
%7 = tail call i32 @echo(i32 %3)
%8 = tail call i32 @close(i32 %3)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ SAI3_RX_DriverIRQHandler();
__attribute__((weak)) void SAI3_RX_IRQHandler(void) {
  SAI3_RX_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<SAI3_RX_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SAI3_RX_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SAI3_RX_IRQHandler>:
xor    %eax,%eax
jmp    1030 <SAI3_RX_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @SAI3_RX_IRQHandler() {
%1 = call i32 (...) @SAI3_RX_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @SAI3_RX_IRQHandler() {
%1 = tail call i32 (...) @SAI3_RX_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LedsP__Leds__led0Off();
void TestSerialC__Leds__led0Off(void) { LedsP__Leds__led0Off(); }


x86 assembly (clang, -O0):
<TestSerialC__Leds__led0Off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LedsP__Leds__led0Off@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestSerialC__Leds__led0Off>:
xor    %eax,%eax
jmp    1030 <LedsP__Leds__led0Off@plt>

LLVM IR (-O0):
define void @TestSerialC__Leds__led0Off() {
%1 = call i32 (...) @LedsP__Leds__led0Off()
ret void
}

LLVM IR (-O2):
define void @TestSerialC__Leds__led0Off() {
%1 = tail call i32 (...) @LedsP__Leds__led0Off()
ret void
}
/* Variables and functions */
int max(float, float);
int min(float, float);
float negativeWeight(float h1, float h2) {
  return 1 - min(h1, h2) / max(h1, h2);
}


x86 assembly (clang, -O0):
<negativeWeight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <min@plt>
mov    %eax,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1040 <max@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,%ecx
mov    $0x1,%eax
sub    %ecx,%eax
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<negativeWeight>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
call   1030 <min@plt>
mov    %eax,%ebx
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
call   1040 <max@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    $0x1,%ecx
sub    %eax,%ecx
xorps  %xmm0,%xmm0
cvtsi2ss %ecx,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @negativeWeight(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @min(float %5, float %6)
%8 = load float, float* %3
%9 = load float, float* %4
%10 = call i32 @max(float %8, float %9)
%11 = sdiv i32 %7, %10
%12 = sub nsw i32 1, %11
%13 = sitofp i32 %12 to float
ret float %13
}

LLVM IR (-O2):
define float @negativeWeight(float %0, float %1) {
%3 = tail call i32 @min(float %0, float %1)
%4 = tail call i32 @max(float %0, float %1)
%5 = sdiv i32 %3, %4
%6 = sub nsw i32 1, %5
%7 = sitofp i32 %6 to float
ret float %7
}
int is_unixy(void) { return 1; }


x86 assembly (clang, -O0):
<is_unixy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_unixy>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_unixy() {
ret i32 1
}

LLVM IR (-O2):
define i32 @is_unixy() {
ret i32 1
}
/* Variables and functions */
bool string_is_pid(const char *s) {
  while (1) {
    switch (*s++) {
    case '0':
    case '1':
    case '2':
    case '3':
    case '4':
    case '5':
    case '6':
    case '7':
    case '8':
    case '9':
      continue;
    case '\0':
      return true;
    default:
      return false;
    }
  }
}


x86 assembly (clang, -O0):
<string_is_pid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
test   %eax,%eax
je     1143 <string_is_pid+0x43>
jmp    112a <string_is_pid+0x2a>
mov    -0x14(%rbp),%eax
add    $0xffffffd0,%eax
sub    $0x9,%eax
ja     114f <string_is_pid+0x4f>
jmp    113e <string_is_pid+0x3e>
jmp    1108 <string_is_pid+0x8>
movl   $0x1,-0x4(%rbp)
jmp    1156 <string_is_pid+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_is_pid>:
movsbl (%rdi),%eax
lea    -0x30(%rax),%ecx
cmp    $0xa,%ecx
jae    1111 <string_is_pid+0x11>
add    $0x1,%rdi
jmp    1100 <string_is_pid>
test   %eax,%eax
jne    111b <string_is_pid+0x1b>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @string_is_pid(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %1, %9
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %3
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
switch i32 %8, label %11 [
i32 48, label %9
i32 49, label %9
i32 50, label %9
i32 51, label %9
i32 52, label %9
i32 53, label %9
i32 54, label %9
i32 55, label %9
i32 56, label %9
i32 57, label %9
i32 0, label %10
]
9: ; preds = %4, %4, %4, %4, %4, %4, %4, %4, %4, %4
br label %4
10: ; preds = %4
store i32 1, i32* %2
br label %12
11: ; preds = %4
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @string_is_pid(i8* nocapture %0) {
br label %2
2: ; preds = %1, %6
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %9 [
i32 48, label %6
i32 49, label %6
i32 50, label %6
i32 51, label %6
i32 52, label %6
i32 53, label %6
i32 54, label %6
i32 55, label %6
i32 56, label %6
i32 57, label %6
i32 0, label %8
]
6: ; preds = %2, %2, %2, %2, %2, %2, %2, %2, %2, %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
br label %9
9: ; preds = %2, %8
%10 = phi i32 [ 1, %8 ], [ 0, %2 ]
ret i32 %10
}
/* Variables and functions */
size_t huff_class(int);
void calc_dc_freq(int num_pixel, int dct_quant[], int freq[]) {
  int i;
  for (i = 0; i < num_pixel; i += 64)
    freq[huff_class(dct_quant[i])]++;
}


x86 assembly (clang, -O0):
<calc_dc_freq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116c <calc_dc_freq+0x5c>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <huff_class@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
mov    (%rax,%rcx,4),%edx
add    $0x1,%edx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x40,%eax
mov    %eax,-0x1c(%rbp)
jmp    112a <calc_dc_freq+0x1a>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_dc_freq>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1146 <calc_dc_freq+0x36>
mov    %rdx,%r14
mov    %rsi,%r15
mov    %edi,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r15,%rbx,4),%edi
call   1030 <huff_class@plt>
addl   $0x1,(%r14,%rax,4)
add    $0x40,%rbx
cmp    %ebp,%ebx
jl     1130 <calc_dc_freq+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @calc_dc_freq(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
store i32 0, i32* %7
br label %8
8: ; preds = %23, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i32*, i32** %6
%14 = load i32*, i32** %5
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = call i64 @huff_class(i32 %18)
%20 = getelementptr inbounds i32, i32* %13, i64 %19
%21 = load i32, i32* %20
%22 = add nsw i32 %21, 1
store i32 %22, i32* %20
br label %23
23: ; preds = %12
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 64
store i32 %25, i32* %7
br label %8
26: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @calc_dc_freq(i32 %0, i32* nocapture %1, i32* nocapture %2) {
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %16
5: ; preds = %3, %5
%6 = phi i64 [ %13, %5 ], [ 0, %3 ]
%7 = getelementptr inbounds i32, i32* %1, i64 %6
%8 = load i32, i32* %7
%9 = tail call i64 @huff_class(i32 %8)
%10 = getelementptr inbounds i32, i32* %2, i64 %9
%11 = load i32, i32* %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %10
%13 = add nuw i64 %6, 64
%14 = trunc i64 %13 to i32
%15 = icmp slt i32 %14, %0
br i1 %15, label %5, label %16
16: ; preds = %5, %3
ret void
}
void no_op(int ch) { return; }


x86 assembly (clang, -O0):
<no_op>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_op>:
ret

LLVM IR (-O0):
define void @no_op(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @no_op(i32 %0) {
ret void
}
int fsearchBin(void *ail, unsigned int id, unsigned int value) { return 99; }


x86 assembly (clang, -O0):
<fsearchBin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsearchBin>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @fsearchBin(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 99
}

LLVM IR (-O2):
define i32 @fsearchBin(i8* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 99
}
/* Variables and functions */
void __aeabi_unwind_cpp_pr2(void) {}


x86 assembly (clang, -O0):
<__aeabi_unwind_cpp_pr2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_unwind_cpp_pr2>:
ret

LLVM IR (-O0):
define void @__aeabi_unwind_cpp_pr2() {
ret void
}

LLVM IR (-O2):
define void @__aeabi_unwind_cpp_pr2() {
ret void
}
int lm_free_lv_sanlock(struct lockspace *ls, struct resource *r) { return -1; }


x86 assembly (clang, -O0):
<lm_free_lv_sanlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lm_free_lv_sanlock>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.lockspace = type opaque
%struct.resource = type opaque
define i32 @lm_free_lv_sanlock(%struct.lockspace* %0, %struct.resource* %1) {
%3 = alloca %struct.lockspace*
%4 = alloca %struct.resource*
store %struct.lockspace* %0, %struct.lockspace** %3
store %struct.resource* %1, %struct.resource** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.lockspace = type opaque
%struct.resource = type opaque
define i32 @lm_free_lv_sanlock(%struct.lockspace* nocapture readnone %0, %struct.resource* nocapture readnone %1) {
ret i32 -1
}
/* Type definitions */
struct ip_tunnel_parm {
  int dummy;
};
typedef int /*<<< orphan*/ old_p;

/* Variables and functions */
scalar_t__ do_get_ioctl(char *, struct ip_tunnel_parm *);
int /*<<< orphan*/ memset(struct ip_tunnel_parm *, int /*<<< orphan*/, int);
int do_get(char *dev) {
  struct ip_tunnel_parm old_p;
  memset(&old_p, 0, sizeof(old_p));
  if (do_get_ioctl(dev, &old_p))
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<do_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <do_get_ioctl@plt>
cmp    $0x0,%rax
je     115f <do_get+0x3f>
movl   $0x0,-0x4(%rbp)
jmp    1166 <do_get+0x46>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_get>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    %rsp,%r14
mov    %r14,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <do_get_ioctl@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ip_tunnel_parm = type { i32 }
define i32 @do_get(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.ip_tunnel_parm
store i8* %0, i8** %3
%5 = call i32 @memset(%struct.ip_tunnel_parm* %4, i32 0, i32 4)
%6 = load i8*, i8** %3
%7 = call i64 @do_get_ioctl(i8* %6, %struct.ip_tunnel_parm* %4)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %11
10: ; preds = %1
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.ip_tunnel_parm = type { i32 }
define i32 @do_get(i8* %0) {
%2 = alloca %struct.ip_tunnel_parm
%3 = bitcast %struct.ip_tunnel_parm* %2 to i8*
%4 = call i32 @memset(%struct.ip_tunnel_parm* %2, i32 0, i32 4)
%5 = call i64 @do_get_ioctl(i8* %0, %struct.ip_tunnel_parm* %2)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ TIOCSCTTY;
int _ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ errno;
scalar_t__ getsid(int /*<<< orphan*/);
int tcsetsid(int fd, pid_t pid) {
  if (pid != getsid(0)) {
    errno = EINVAL;
    return (-1);
  }
  return (_ioctl(fd, TIOCSCTTY, NULL));
}


x86 assembly (clang, -O0):
<tcsetsid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %edi,%edi
call   1030 <getsid@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     116c <tcsetsid+0x4c>
mov    0x2e83(%rip),%rax
mov    (%rax),%ecx
mov    0x2e82(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1184 <tcsetsid+0x64>
mov    -0x8(%rbp),%edi
mov    0x2e5a(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1040 <_ioctl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcsetsid>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %edi,%edi
call   1030 <getsid@plt>
cmp    %rbx,%rax
jne    114c <tcsetsid+0x2c>
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
mov    %ebp,%edi
xor    %edx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <_ioctl@plt>
mov    0x2e85(%rip),%rax
mov    (%rax),%eax
mov    0x2e84(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@errno = global i32 0
@TIOCSCTTY = global i32 0
define i32 @tcsetsid(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = call i64 @getsid(i32 0)
%8 = icmp ne i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* @EINVAL
store i32 %10, i32* @errno
store i32 -1, i32* %3
br label %15
11: ; preds = %2
%12 = load i32, i32* %4
%13 = load i32, i32* @TIOCSCTTY
%14 = call i32 @_ioctl(i32 %12, i32 %13, i32* null)
store i32 %14, i32* %3
br label %15
15: ; preds = %11, %9
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@EINVAL = global i32 0
@errno = global i32 0
@TIOCSCTTY = global i32 0
define i32 @tcsetsid(i32 %0, i64 %1) {
%3 = tail call i64 @getsid(i32 0)
%4 = icmp eq i64 %3, %1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = load i32, i32* @EINVAL
store i32 %6, i32* @errno
br label %10
7: ; preds = %2
%8 = load i32, i32* @TIOCSCTTY
%9 = tail call i32 @_ioctl(i32 %0, i32 %8, i32* null)
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ -1, %5 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
scalar_t__ send(int, char *, int, int /*<<< orphan*/);
int strlen(char *);
void wrap_send(int fd, char *buff) {
  int rv;
  int len;
  rv = 0;
  len = strlen(buff);
  while (rv < len)
    rv += send(fd, buff, len - rv, 0);
}


x86 assembly (clang, -O0):
<wrap_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1174 <wrap_send+0x54>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
sub    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1040 <send@plt>
mov    %rax,%rcx
movslq -0x14(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x14(%rbp)
jmp    1142 <wrap_send+0x22>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_send>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r15
mov    %edi,%r14d
mov    %rsi,%rdi
call   1030 <strlen@plt>
test   %eax,%eax
jle    1159 <wrap_send+0x39>
mov    %eax,%ebp
xor    %ebx,%ebx
nopl   (%rax)
mov    %ebp,%edx
sub    %ebx,%edx
mov    %r14d,%edi
mov    %r15,%rsi
xor    %ecx,%ecx
call   1040 <send@plt>
add    %ebx,%eax
mov    %eax,%ebx
cmp    %eax,%ebp
jg     1140 <wrap_send+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @wrap_send(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
store i32 0, i32* %5
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %6
br label %9
9: ; preds = %13, %2
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %24
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i8*, i8** %4
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = sub nsw i32 %16, %17
%19 = call i64 @send(i32 %14, i8* %15, i32 %18, i32 0)
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = add nsw i64 %21, %19
%23 = trunc i64 %22 to i32
store i32 %23, i32* %5
br label %9
24: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @wrap_send(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %2, %5
%6 = phi i32 [ %10, %5 ], [ 0, %2 ]
%7 = sub nsw i32 %3, %6
%8 = tail call i64 @send(i32 %0, i8* %1, i32 %7, i32 0)
%9 = trunc i64 %8 to i32
%10 = add i32 %6, %9
%11 = icmp sgt i32 %3, %10
br i1 %11, label %5, label %12
12: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *name) {
  fprintf(stderr,
          "Usage: %s [-bBfFac] <ppsdev>\n"
          "Commands:\n"
          "  -b   bind kernel PPS consumer\n"
          "  -B   unbind kernel PPS consumer\n"
          "  -f   set kernel NTP PPS flags\n"
          "  -F   unset kernel NTP PPS flags\n"
          "Options:\n"
          "  -a   use assert edge\n"
          "  -c   use clear edge (default)\n",
          name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [236 x i8] c"Usage: %s [-bBfFac] <ppsdev>\0ACommands:\0A -b bind kernel PPS consumer\0A -B unbind kernel PPS consumer\0A -f set kernel NTP PPS flags\0A -F unset kernel NTP PPS flags\0AOptions:\0A -a use assert edge\0A -c use clear edge (default)\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([236 x i8], [236 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [236 x i8] c"Usage: %s [-bBfFac] <ppsdev>\0ACommands:\0A -b bind kernel PPS consumer\0A -B unbind kernel PPS consumer\0A -f set kernel NTP PPS flags\0A -F unset kernel NTP PPS flags\0AOptions:\0A -a use assert edge\0A -c use clear edge (default)\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([236 x i8], [236 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct packetSeen {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ freez(struct packetSeen **);
void freePacketSeen(struct packetSeen **pP) { freez(pP); }


x86 assembly (clang, -O0):
<freePacketSeen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <freez@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freePacketSeen>:
jmp    1030 <freez@plt>

LLVM IR (-O0):
%struct.packetSeen = type { i32 }
define void @freePacketSeen(%struct.packetSeen** %0) {
%2 = alloca %struct.packetSeen**
store %struct.packetSeen** %0, %struct.packetSeen*** %2
%3 = load %struct.packetSeen**, %struct.packetSeen*** %2
%4 = call i32 @freez(%struct.packetSeen** %3)
ret void
}

LLVM IR (-O2):
%struct.packetSeen = type { i32 }
define void @freePacketSeen(%struct.packetSeen** %0) {
%2 = tail call i32 @freez(%struct.packetSeen** %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ z80_ed_44_neg();
void z80_ed_74_neg(void) { z80_ed_44_neg(); }


x86 assembly (clang, -O0):
<z80_ed_74_neg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <z80_ed_44_neg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<z80_ed_74_neg>:
xor    %eax,%eax
jmp    1030 <z80_ed_44_neg@plt>

LLVM IR (-O0):
define void @z80_ed_74_neg() {
%1 = call i32 (...) @z80_ed_44_neg()
ret void
}

LLVM IR (-O2):
define void @z80_ed_74_neg() {
%1 = tail call i32 (...) @z80_ed_44_neg()
ret void
}
/* Type definitions */
struct vec3i {
  int dummy;
};
struct vec3 {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec3i_assign_vec3(int /*<<< orphan*/ *, float *);
__attribute__((always_)) struct vec3i *psvec3i_assign_vec3(struct vec3i *result,
                                                           struct vec3 *a) {
  vec3i_assign_vec3((int32_t *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec3i_assign_vec3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec3i_assign_vec3@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3i_assign_vec3>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec3i_assign_vec3@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec3i = type { i32 }
%struct.vec3 = type { i32 }
define %struct.vec3i* @psvec3i_assign_vec3(%struct.vec3i* %0, %struct.vec3* %1) {
%3 = alloca %struct.vec3i*
%4 = alloca %struct.vec3*
store %struct.vec3i* %0, %struct.vec3i** %3
store %struct.vec3* %1, %struct.vec3** %4
%5 = load %struct.vec3i*, %struct.vec3i** %3
%6 = bitcast %struct.vec3i* %5 to i32*
%7 = load %struct.vec3*, %struct.vec3** %4
%8 = bitcast %struct.vec3* %7 to float*
%9 = call i32 @vec3i_assign_vec3(i32* %6, float* %8)
%10 = load %struct.vec3i*, %struct.vec3i** %3
ret %struct.vec3i* %10
}

LLVM IR (-O2):
%struct.vec3i = type { i32 }
%struct.vec3 = type { i32 }
define %struct.vec3i* @psvec3i_assign_vec3(%struct.vec3i* returned %0, %struct.vec3* %1) {
%3 = getelementptr %struct.vec3i, %struct.vec3i* %0, i64 0, i32 0
%4 = bitcast %struct.vec3* %1 to float*
%5 = tail call i32 @vec3i_assign_vec3(i32* %3, float* %4)
ret %struct.vec3i* %0
}
void ble_evt_system_no_license_key(const void *nul) {}


x86 assembly (clang, -O0):
<ble_evt_system_no_license_key>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_evt_system_no_license_key>:
ret

LLVM IR (-O0):
define void @ble_evt_system_no_license_key(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ble_evt_system_no_license_key(i8* nocapture %0) {
ret void
}
int test_37_4(int *mem) { return __atomic_add_fetch(mem + 4, 1, 4); }


x86 assembly (clang, -O0):
<test_37_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,%eax
lock xadd %eax,0x10(%rdx)
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_37_4>:
mov    $0x1,%eax
lock xadd %eax,0x10(%rdi)
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_37_4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 4
store i32 1, i32* %3
%7 = load i32, i32* %3
%8 = atomicrmw add i32* %6, i32 %7 acq_rel
%9 = add i32 %8, %7
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @test_37_4(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = atomicrmw add i32* %2, i32 1 acq_rel
%4 = add i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int cio_read(int);
int /*<<< orphan*/ cio_skip(int);
void j2k_read_tlm() {
  int len;
  len = cio_read(2);

  cio_skip(len - 2);
}


x86 assembly (clang, -O0):
<j2k_read_tlm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
call   1040 <cio_read@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <cio_skip@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j2k_read_tlm>:
push   %rax
mov    $0x2,%edi
call   1040 <cio_read@plt>
lea    -0x2(%rax),%edi
pop    %rax
jmp    1030 <cio_skip@plt>

LLVM IR (-O0):
define void @j2k_read_tlm() {
%1 = alloca i32
%2 = call i32 @cio_read(i32 2)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = sub nsw i32 %3, 2
%5 = call i32 @cio_skip(i32 %4)
ret void
}

LLVM IR (-O2):
define void @j2k_read_tlm() {
%1 = tail call i32 @cio_read(i32 2)
%2 = add nsw i32 %1, -2
%3 = tail call i32 @cio_skip(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int /*<<< orphan*/);
int /*<<< orphan*/ g(int /*<<< orphan*/);
int main() {
  f(0);
  g(0);
  g(0);
  g(0);
  g(0);
  g(0);
  g(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <f@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <f@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %edi,%edi
call   1040 <g@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @f(i32 0)
%2 = call i32 @g(i32 0)
%3 = call i32 @g(i32 0)
%4 = call i32 @g(i32 0)
%5 = call i32 @g(i32 0)
%6 = call i32 @g(i32 0)
%7 = call i32 @g(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 0)
%2 = tail call i32 @g(i32 0)
%3 = tail call i32 @g(i32 0)
%4 = tail call i32 @g(i32 0)
%5 = tail call i32 @g(i32 0)
%6 = tail call i32 @g(i32 0)
%7 = tail call i32 @g(i32 0)
ret i32 0
}
void drv_base_backlight(int on) {}


x86 assembly (clang, -O0):
<drv_base_backlight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_base_backlight>:
ret

LLVM IR (-O0):
define void @drv_base_backlight(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @drv_base_backlight(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
uint32_t read_24b(const uint8_t *buf) {
  uint32_t value = ((uint32_t)buf[0]) << 16 | ((uint16_t)buf[1]) << 8 | buf[2];
  return value;
}


x86 assembly (clang, -O0):
<read_24b>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0x8(%rcx),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_24b>:
mov    (%rdi),%ecx
mov    0x4(%rdi),%eax
shl    $0x10,%ecx
shl    $0x8,%eax
or     %ecx,%eax
or     0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_24b(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = shl i32 %6, 16
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
%11 = shl i32 %10, 8
%12 = or i32 %7, %11
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 2
%15 = load i32, i32* %14
%16 = or i32 %12, %15
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @read_24b(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 16
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = or i32 %7, %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ send_http_error(int, char *, int /*<<< orphan*/ *);
void send_501_not_implemented(int clientsock) {
  send_http_error(clientsock, "501 Method Not Implemented", NULL);
}


x86 assembly (clang, -O0):
<send_501_not_implemented>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <send_http_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_501_not_implemented>:
lea    0xee9(%rip),%rsi
xor    %edx,%edx
jmp    1030 <send_http_error@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"501 Method Not Implemented\00"
define void @send_501_not_implemented(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @send_http_error(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32* null)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"501 Method Not Implemented\00"
define void @send_501_not_implemented(i32 %0) {
%2 = tail call i32 @send_http_error(i32 %0, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32* null)
ret void
}
int meson_test_main_foo(void) { return 10; }


x86 assembly (clang, -O0):
<meson_test_main_foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<meson_test_main_foo>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @meson_test_main_foo() {
ret i32 10
}

LLVM IR (-O2):
define i32 @meson_test_main_foo() {
ret i32 10
}
float InvSqrt(float x) {
  float xhalf = x * 0.5f;
  int *p = (int *)&x;
  *p = 0x5f3759df - (*p >> 1);
  return x * (1.5f - xhalf * x * x);
}


x86 assembly (clang, -O0):
<InvSqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
sar    $0x1,%eax
mov    $0x5f3759df,%ecx
sub    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe9a(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<InvSqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f3759df,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xedb(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @InvSqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32*
store float %0, float* %2
%5 = load float, float* %2
%6 = fmul float %5, 5.000000e-01
store float %6, float* %3
%7 = bitcast float* %2 to i32*
store i32* %7, i32** %4
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = ashr i32 %9, 1
%11 = sub nsw i32 1597463007, %10
%12 = load i32*, i32** %4
store i32 %11, i32* %12
%13 = load float, float* %2
%14 = load float, float* %3
%15 = load float, float* %2
%16 = fmul float %14, %15
%17 = load float, float* %2
%18 = fneg float %16
%19 = call float @llvm.fmuladd.f32(float %18, float %17, float 1.500000e+00)
%20 = fmul float %13, %19
ret float %20
}

LLVM IR (-O2):
define float @InvSqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597463007, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
ret float %9
}
/* Variables and functions */
char *malloc(int);
char *md_malloc(int n) {
  char *t;
  t = malloc(n);
  return (t);
}


x86 assembly (clang, -O0):
<md_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @md_malloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @md_malloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
ret i8* %2
}
int test_imm_46int8_reg(signed char val) {
  return ((val) & (-0x46 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_46int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffba,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_46int8_reg>:
test   $0xba,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_46int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -70
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_46int8_reg(i8 signext %0) {
%2 = and i8 %0, -70
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int utf8_encode_len(int codepoint) {
  if (codepoint < 0x80)
    return 1;
  if (codepoint < 0x800)
    return 2;
  if (codepoint < 0x10000)
    return 3;
  return 4;
}


x86 assembly (clang, -O0):
<utf8_encode_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x80,-0x8(%rbp)
jge    1120 <utf8_encode_len+0x20>
movl   $0x1,-0x4(%rbp)
jmp    1159 <utf8_encode_len+0x59>
cmpl   $0x800,-0x8(%rbp)
jge    1139 <utf8_encode_len+0x39>
movl   $0x2,-0x4(%rbp)
jmp    1159 <utf8_encode_len+0x59>
cmpl   $0x10000,-0x8(%rbp)
jge    1152 <utf8_encode_len+0x52>
movl   $0x3,-0x4(%rbp)
jmp    1159 <utf8_encode_len+0x59>
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8_encode_len>:
mov    $0x1,%eax
cmp    $0x80,%edi
jl     1128 <utf8_encode_len+0x28>
mov    $0x2,%eax
cmp    $0x800,%edi
jb     1128 <utf8_encode_len+0x28>
cmp    $0x10000,%edi
mov    $0x4,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @utf8_encode_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 128
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 2048
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 2, i32* %2
br label %16
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 65536
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 3, i32* %2
br label %16
15: ; preds = %11
store i32 4, i32* %2
br label %16
16: ; preds = %15, %14, %10, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @utf8_encode_len(i32 %0) {
%2 = icmp slt i32 %0, 128
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 2048
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 65536
%7 = select i1 %6, i32 3, i32 4
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 1, %1 ], [ 2, %3 ], [ %7, %5 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void do2(int x) { printf("do2 %d\n", x); }


x86 assembly (clang, -O0):
<do2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do2>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"do2 %d\0A\00"
define void @do2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"do2 %d\0A\00"
define void @do2(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef unsigned int u_long;

/* Variables and functions */
int do_rand(unsigned int *);
int rand_r(unsigned *ctx) {
  u_long val;
  int r;
  val = *ctx;
  r = do_rand(&val);
  *ctx = (unsigned)val;
  return (r);
}


x86 assembly (clang, -O0):
<rand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1030 <do_rand@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_r>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    (%rdi),%eax
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1030 <do_rand@plt>
mov    0xc(%rsp),%ecx
mov    %ecx,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rand_r(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = call i32 @do_rand(i32* %3)
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = load i32*, i32** %2
store i32 %8, i32* %9
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @rand_r(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* %0
store i32 %4, i32* %2
%5 = call i32 @do_rand(i32* %2)
%6 = load i32, i32* %2
store i32 %6, i32* %0
ret i32 %5
}
void tcp_synack(struct Seaper *seap, struct NetFrame *frame) {
  seap;
  frame;
}


x86 assembly (clang, -O0):
<tcp_synack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_synack>:
ret

LLVM IR (-O0):
%struct.Seaper = type opaque
%struct.NetFrame = type opaque
define void @tcp_synack(%struct.Seaper* %0, %struct.NetFrame* %1) {
%3 = alloca %struct.Seaper*
%4 = alloca %struct.NetFrame*
store %struct.Seaper* %0, %struct.Seaper** %3
store %struct.NetFrame* %1, %struct.NetFrame** %4
%5 = load %struct.Seaper*, %struct.Seaper** %3
%6 = load %struct.NetFrame*, %struct.NetFrame** %4
ret void
}

LLVM IR (-O2):
%struct.Seaper = type opaque
%struct.NetFrame = type opaque
define void @tcp_synack(%struct.Seaper* nocapture %0, %struct.NetFrame* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printArray(int array[], int size) {
  for (int i = 0; i < size; i++)
    printf("%d ", array[i]);
  printf("\n");
}


x86 assembly (clang, -O0):
<printArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <printArray+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printArray+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printArray>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <printArray+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <printArray+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @printArray(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
void rule_neural_act_update(const struct XCSF *xcsf, const struct Cl *c,
                            const double *x, const double *y) {
  (void)xcsf;
  (void)c;
  (void)x;
  (void)y;
}


x86 assembly (clang, -O0):
<rule_neural_act_update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rule_neural_act_update>:
ret

LLVM IR (-O0):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @rule_neural_act_update(%struct.XCSF* %0, %struct.Cl* %1, double* %2, double* %3) {
%5 = alloca %struct.XCSF*
%6 = alloca %struct.Cl*
%7 = alloca double*
%8 = alloca double*
store %struct.XCSF* %0, %struct.XCSF** %5
store %struct.Cl* %1, %struct.Cl** %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load %struct.XCSF*, %struct.XCSF** %5
%10 = load %struct.Cl*, %struct.Cl** %6
%11 = load double*, double** %7
%12 = load double*, double** %8
ret void
}

LLVM IR (-O2):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @rule_neural_act_update(%struct.XCSF* nocapture %0, %struct.Cl* nocapture %1, double* nocapture %2, double* nocapture %3) {
ret void
}
/* Variables and functions */
char *str_ltrim(char *);
char *str_rtrim(char *);
char *str_trim(char *str) {
  char *ptr;
  ptr = str_rtrim(str);
  str = str_ltrim(ptr);
  return str;
}


x86 assembly (clang, -O0):
<str_trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <str_rtrim@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <str_ltrim@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_trim>:
push   %rax
call   1030 <str_rtrim@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <str_ltrim@plt>

LLVM IR (-O0):
define i8* @str_trim(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @str_rtrim(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i8* @str_ltrim(i8* %6)
store i8* %7, i8** %2
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
define i8* @str_trim(i8* %0) {
%2 = tail call i8* @str_rtrim(i8* %0)
%3 = tail call i8* @str_ltrim(i8* %2)
ret i8* %3
}
int main(void) {
  return 0;
  if (1) {
    return 1;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}