xunge/DecIR huggingface dataset:
/* Variables and functions */
int strcasecmp(char *, char *);
int compare_signal_names(const void *a, const void *b) {
  return strcasecmp(*(char **)a, *(char **)b);
}


x86 assembly (clang, -O0):
<compare_signal_names>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_signal_names>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @compare_signal_names(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcasecmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare_signal_names(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcasecmp(i8* %4, i8* %6)
ret i32 %7
}
/* Variables and functions */
double NAN;
double erf(double x) {
  (void)x;
  return NAN;
}


x86 assembly (clang, -O0):
<erf>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ee8(%rip),%rax
movsd  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<erf>:
mov    0x2ef1(%rip),%rax
movsd  (%rax),%xmm0
ret

LLVM IR (-O0):
@NAN = global double 0.000000e+00
define double @erf(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* @NAN
ret double %4
}

LLVM IR (-O2):
@NAN = global double 0.000000e+00
define double @erf(double %0) {
%2 = load double, double* @NAN
ret double %2
}
void mmc_pwrseq_unregister(struct mmc_pwrseq *pwrseq) {}


x86 assembly (clang, -O0):
<mmc_pwrseq_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmc_pwrseq_unregister>:
ret

LLVM IR (-O0):
%struct.mmc_pwrseq = type opaque
define void @mmc_pwrseq_unregister(%struct.mmc_pwrseq* %0) {
%2 = alloca %struct.mmc_pwrseq*
store %struct.mmc_pwrseq* %0, %struct.mmc_pwrseq** %2
ret void
}

LLVM IR (-O2):
%struct.mmc_pwrseq = type opaque
define void @mmc_pwrseq_unregister(%struct.mmc_pwrseq* nocapture %0) {
ret void
}
void ft_ultimate_div_mod(int *a, int *b) {
  int i;
  int j;
  i = *a;
  j = *b;
  *a = i / j;
  *b = i % j;
}


x86 assembly (clang, -O0):
<ft_ultimate_div_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cltd
idivl  -0x18(%rbp)
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
cltd
idivl  -0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_ultimate_div_mod>:
mov    (%rdi),%eax
cltd
idivl  (%rsi)
mov    %eax,(%rdi)
mov    %edx,(%rsi)
ret

LLVM IR (-O0):
define void @ft_ultimate_div_mod(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
store i32 %8, i32* %5
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sdiv i32 %11, %12
%14 = load i32*, i32** %3
store i32 %13, i32* %14
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = srem i32 %15, %16
%18 = load i32*, i32** %4
store i32 %17, i32* %18
ret void
}

LLVM IR (-O2):
define void @ft_ultimate_div_mod(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = sdiv i32 %3, %4
store i32 %5, i32* %0
%6 = srem i32 %3, %4
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void world() { printf("world\n"); }


x86 assembly (clang, -O0):
<world>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<world>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"world\0A\00"
define void @world() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"world\00"
define void @world() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct stemmer {
  int dummy;
};

/* Variables and functions */
scalar_t__ m(struct stemmer *);
int /*<<< orphan*/ setto(struct stemmer *, int, char *);
void r(struct stemmer *z, int len, char *s) {
  if (m(z) > 0)
    setto(z, len, s);
}


x86 assembly (clang, -O0):
<r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <m@plt>
cmp    $0x0,%rax
jle    1156 <r+0x36>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <setto@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %esi,%ebp
mov    %rdi,%rbx
call   1040 <m@plt>
test   %rax,%rax
jle    1147 <r+0x27>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <setto@plt>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.stemmer = type { i32 }
define void @r(%struct.stemmer* %0, i32 %1, i8* %2) {
%4 = alloca %struct.stemmer*
%5 = alloca i32
%6 = alloca i8*
store %struct.stemmer* %0, %struct.stemmer** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.stemmer*, %struct.stemmer** %4
%8 = call i64 @m(%struct.stemmer* %7)
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load %struct.stemmer*, %struct.stemmer** %4
%12 = load i32, i32* %5
%13 = load i8*, i8** %6
%14 = call i32 @setto(%struct.stemmer* %11, i32 %12, i8* %13)
br label %15
15: ; preds = %10, %3
ret void
}

LLVM IR (-O2):
%struct.stemmer = type { i32 }
define void @r(%struct.stemmer* %0, i32 %1, i8* %2) {
%4 = tail call i64 @m(%struct.stemmer* %0)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @setto(%struct.stemmer* %0, i32 %1, i8* %2)
br label %8
8: ; preds = %6, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  fprintf(stderr, "Usage: %s <file> [init|worker|debug] [#] [0|1|2]\n", name);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [50 x i8] c"Usage: %s <file> [init|worker|debug] [#] [0|1|2]\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [50 x i8] c"Usage: %s <file> [init|worker|debug] [#] [0|1|2]\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_print_params(char *str) {
  int i;
  i = 0;
  while (str[i] != '\0') {
    ft_putchar(str[i]);
    i++;
  }
}


x86 assembly (clang, -O0):
<ft_print_params>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1157 <ft_print_params+0x47>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <ft_putchar@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <ft_print_params+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_print_params>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <ft_print_params+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <ft_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <ft_print_params+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_print_params(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @ft_putchar(i8 signext %17)
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ft_print_params(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @ft_putchar(i8 signext %6)
%8 = add nuw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
int f(int i) {
  extern int x;
  return x + i;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
mov    0x2ed7(%rip),%rcx
add    (%rcx),%eax
ret

LLVM IR (-O0):
@x = external global i32
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @x
%4 = load i32, i32* %2
%5 = add nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
@x = external global i32
define i32 @f(i32 %0) {
%2 = load i32, i32* @x
%3 = add nsw i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ handle_SYS(int /*<<< orphan*/);
int gen_SYS() {
  handle_SYS(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_SYS>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_SYS@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_SYS>:
push   %rax
xor    %edi,%edi
call   1030 <handle_SYS@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_SYS() {
%1 = call i32 @handle_SYS(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_SYS() {
%1 = tail call i32 @handle_SYS(i32 0)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int is_valid_priv_limit(uint8_t priv_limit) {
  if ((0x00 < priv_limit && priv_limit < 0x06) || priv_limit == 0x0F) {
    return 0;
  } else {
    return (-1);
  }
}


x86 assembly (clang, -O0):
<is_valid_priv_limit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
jge    111c <is_valid_priv_limit+0x1c>
cmpl   $0x6,-0x8(%rbp)
jl     1126 <is_valid_priv_limit+0x26>
cmpl   $0xf,-0x8(%rbp)
jne    1132 <is_valid_priv_limit+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1139 <is_valid_priv_limit+0x39>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_priv_limit>:
add    $0xffffffff,%edi
mov    $0xffffffff,%eax
cmp    $0xe,%edi
ja     111a <is_valid_priv_limit+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @is_valid_priv_limit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 0, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 6
br i1 %8, label %12, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 15
br i1 %11, label %12, label %13
12: ; preds = %9, %6
store i32 0, i32* %2
br label %14
13: ; preds = %9
store i32 -1, i32* %2
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@switch.table.is_valid_priv_limit = [15 x i32] [i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 0]
define i32 @is_valid_priv_limit(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 15
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [15 x i32], [15 x i32]* @switch.table.is_valid_priv_limit, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ -1, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int open_controldevice() {
  int fd = open("/dev/v4l2loopback", 0);
  if (fd < 0) {
    perror("unable to open control device '"
           "/dev/v4l2loopback"
           "'");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<open_controldevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
xor    %esi,%esi
call   1030 <open@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1169 <open_controldevice+0x39>
lea    0xeb8(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_controldevice>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %esi,%esi
call   1030 <open@plt>
test   %eax,%eax
js     1145 <open_controldevice+0x15>
pop    %rcx
ret
lea    0xec6(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"/dev/v4l2loopback\00"
@.str.1 = [50 x i8] c"unable to open control device '/dev/v4l2loopback'\00"
define i32 @open_controldevice() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @open(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 0)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = call i32 @perror(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %0
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@.str = [18 x i8] c"/dev/v4l2loopback\00"
@.str.1 = [50 x i8] c"unable to open control device '/dev/v4l2loopback'\00"
define i32 @open_controldevice() {
%1 = tail call i32 @open(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @perror(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %0
ret i32 undef
}
/* Variables and functions */
int i2c_smbus_write_byte_data(int, int, int);
int odroidI2CWriteReg8(int fd, int reg, int data) {
  return i2c_smbus_write_byte_data(fd, reg, data);
}


x86 assembly (clang, -O0):
<odroidI2CWriteReg8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <i2c_smbus_write_byte_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroidI2CWriteReg8>:
jmp    1030 <i2c_smbus_write_byte_data@plt>

LLVM IR (-O0):
define i32 @odroidI2CWriteReg8(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @i2c_smbus_write_byte_data(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @odroidI2CWriteReg8(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @i2c_smbus_write_byte_data(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ posix_binary_file_store(char *, char const *, size_t);
void ext_configuration_store(const char *buffer, size_t buffer_size) {
  posix_binary_file_store("kaa_configuration.bin", buffer, buffer_size);
}


x86 assembly (clang, -O0):
<ext_configuration_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <posix_binary_file_store@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext_configuration_store>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <posix_binary_file_store@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"kaa_configuration.bin\00"
define void @ext_configuration_store(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @posix_binary_file_store(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %5, i64 %6)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"kaa_configuration.bin\00"
define void @ext_configuration_store(i8* %0, i64 %1) {
%3 = tail call i32 @posix_binary_file_store(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %0, i64 %1)
ret void
}
/* Variables and functions */
int getNumberOfCores();
int getTotalSystemMemory();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%i\n", getNumberOfCores());
  printf("%uGB\n", getTotalSystemMemory() / 1024 / 1024);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getNumberOfCores@plt>
mov    %eax,%esi
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getTotalSystemMemory@plt>
mov    $0x400,%ecx
cltd
idiv   %ecx
mov    $0x400,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
lea    0xe90(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getNumberOfCores@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getTotalSystemMemory@plt>
lea    0xfffff(%rax),%esi
test   %eax,%eax
cmovns %eax,%esi
sar    $0x14,%esi
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [6 x i8] c"%uGB\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getNumberOfCores()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @getTotalSystemMemory()
%5 = sdiv i32 %4, 1024
%6 = sdiv i32 %5, 1024
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [6 x i8] c"%uGB\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getNumberOfCores()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @getTotalSystemMemory()
%4 = sdiv i32 %3, 1048576
%5 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
void I2CMasterDataPut(unsigned long ulBase, unsigned char ucData) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) = ucData;
}


x86 assembly (clang, -O0):
<I2CMasterDataPut>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterDataPut>:
mov    %esi,%eax
mov    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @I2CMasterDataPut(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = load i64, i64* %3
%8 = add i64 %7, 8
%9 = inttoptr i64 %8 to i64*
store volatile i64 %6, i64* %9
ret void
}

LLVM IR (-O2):
define void @I2CMasterDataPut(i64 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i64
%4 = add i64 %0, 8
%5 = inttoptr i64 %4 to i64*
store volatile i64 %3, i64* %5
ret void
}
int symbol(void) { return 42; }


x86 assembly (clang, -O0):
<symbol>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<symbol>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @symbol() {
ret i32 42
}

LLVM IR (-O2):
define i32 @symbol() {
ret i32 42
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
void sky_clear_int(void *target) { *((int32_t *)target) = 0; }


x86 assembly (clang, -O0):
<sky_clear_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sky_clear_int>:
movq   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @sky_clear_int(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i64*
store i64 0, i64* %4
ret void
}

LLVM IR (-O2):
define void @sky_clear_int(i8* nocapture writeonly %0) {
%2 = bitcast i8* %0 to i64*
store i64 0, i64* %2
ret void
}
unsigned char *ringfindChar(unsigned char *bufPtr, unsigned char *endPtr,
                            unsigned char character) {
  for (; bufPtr < endPtr; bufPtr++) {
    if (*bufPtr == character)
      return bufPtr + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ringfindChar>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1159 <ringfindChar+0x59>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x19(%rbp),%ecx
cmp    %ecx,%eax
jne    1143 <ringfindChar+0x43>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1161 <ringfindChar+0x61>
jmp    1148 <ringfindChar+0x48>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1111 <ringfindChar+0x11>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ringfindChar>:
cmp    %rsi,%rdi
jae    111f <ringfindChar+0x1f>
mov    %rdi,%rax
sub    %rdi,%rsi
add    $0x1,%rax
nop
cmp    %dl,-0x1(%rax)
je     1121 <ringfindChar+0x21>
add    $0x1,%rax
add    $0xffffffffffffffff,%rsi
jne    1110 <ringfindChar+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ringfindChar(i8* %0, i8* %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8 %2, i8* %7
br label %8
8: ; preds = %23, %3
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = icmp ult i8* %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i8, i8* %7
%17 = zext i8 %16 to i32
%18 = icmp eq i32 %15, %17
br i1 %18, label %19, label %22
19: ; preds = %12
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i64 1
store i8* %21, i8** %4
br label %27
22: ; preds = %12
br label %23
23: ; preds = %22
%24 = load i8*, i8** %5
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %5
br label %8
26: ; preds = %8
store i8* null, i8** %4
br label %27
27: ; preds = %26, %19
%28 = load i8*, i8** %4
ret i8* %28
}

LLVM IR (-O2):
define i8* @ringfindChar(i8* %0, i8* readnone %1, i8 zeroext %2) {
%4 = icmp ult i8* %0, %1
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = ptrtoint i8* %1 to i64
%7 = ptrtoint i8* %0 to i64
%8 = sub i64 %6, %7
%9 = getelementptr i8, i8* %0, i64 %8
br label %10
10: ; preds = %5, %15
%11 = phi i8* [ %14, %15 ], [ %0, %5 ]
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, %2
%14 = getelementptr inbounds i8, i8* %11, i64 1
br i1 %13, label %17, label %15
15: ; preds = %10
%16 = icmp eq i8* %14, %9
br i1 %16, label %17, label %10
17: ; preds = %15, %10, %3
%18 = phi i8* [ null, %3 ], [ null, %15 ], [ %14, %10 ]
ret i8* %18
}
void vr41xx_siu_early_setup(struct uart_port *port) {}


x86 assembly (clang, -O0):
<vr41xx_siu_early_setup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vr41xx_siu_early_setup>:
ret

LLVM IR (-O0):
%struct.uart_port = type opaque
define void @vr41xx_siu_early_setup(%struct.uart_port* %0) {
%2 = alloca %struct.uart_port*
store %struct.uart_port* %0, %struct.uart_port** %2
ret void
}

LLVM IR (-O2):
%struct.uart_port = type opaque
define void @vr41xx_siu_early_setup(%struct.uart_port* nocapture %0) {
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int cmp(const void *string_1, void *string_2) {
  return strcmp((char *)string_1, (char *)string_2);
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void genbranchlink() {}


x86 assembly (clang, -O0):
<genbranchlink>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbranchlink>:
ret

LLVM IR (-O0):
define void @genbranchlink() {
ret void
}

LLVM IR (-O2):
define void @genbranchlink() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int a[10];
  int x;
  a[1] = 1000;
  x = *(a + 1);
  assert(x == 1000);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x3e8,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
mov    %eax,-0x34(%rbp)
cmpl   $0x3e8,-0x34(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca [10 x i32]
%2 = alloca i32
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 1
store i32 1000, i32* %3
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%5 = getelementptr inbounds i32, i32* %4, i64 1
%6 = load i32, i32* %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 1000
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
void set_pageblock_skip(struct page *page) {}


x86 assembly (clang, -O0):
<set_pageblock_skip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pageblock_skip>:
ret

LLVM IR (-O0):
%struct.page = type opaque
define void @set_pageblock_skip(%struct.page* %0) {
%2 = alloca %struct.page*
store %struct.page* %0, %struct.page** %2
ret void
}

LLVM IR (-O2):
%struct.page = type opaque
define void @set_pageblock_skip(%struct.page* nocapture %0) {
ret void
}
/* Variables and functions */
unsigned int getColorFromHSVA(float, float, float, double);
unsigned int getColorFromHSV(float hue, float saturation, float value) {
  return getColorFromHSVA(hue, saturation, value, 1.0);
}


x86 assembly (clang, -O0):
<getColorFromHSV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movsd  0xec2(%rip),%xmm3
call   1030 <getColorFromHSVA@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getColorFromHSV>:
movsd  0xee8(%rip),%xmm3
jmp    1030 <getColorFromHSVA@plt>

LLVM IR (-O0):
define i32 @getColorFromHSV(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call i32 @getColorFromHSVA(float %7, float %8, float %9, double 1.000000e+00)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getColorFromHSV(float %0, float %1, float %2) {
%4 = tail call i32 @getColorFromHSVA(float %0, float %1, float %2, double 1.000000e+00)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void **);
void **malloc(int);
int main() {
  void **ptr = NULL;
  while (1) {
    void **data = ptr;
    ptr = malloc(sizeof ptr);
    free(ptr);
    ptr = data;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <main+0x17>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8**
%3 = alloca i8**
store i32 0, i32* %1
store i8** null, i8*** %2
br label %4
4: ; preds = %0, %4
%5 = load i8**, i8*** %2
store i8** %5, i8*** %3
%6 = call i8** @malloc(i32 8)
store i8** %6, i8*** %2
%7 = load i8**, i8*** %2
%8 = call i32 @free(i8** %7)
%9 = load i8**, i8*** %3
store i8** %9, i8*** %2
br label %4
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i8** @malloc(i32 8)
%3 = tail call i32 @free(i8** %2)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ STC31xx_WriteWord16(int, int);
void STC311x_SetSOC(int SOC) { STC31xx_WriteWord16(0x02, SOC); }


x86 assembly (clang, -O0):
<STC311x_SetSOC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x2,%edi
call   1030 <STC31xx_WriteWord16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STC311x_SetSOC>:
mov    %edi,%esi
mov    $0x2,%edi
jmp    1030 <STC31xx_WriteWord16@plt>

LLVM IR (-O0):
define void @STC311x_SetSOC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @STC31xx_WriteWord16(i32 2, i32 %3)
ret void
}

LLVM IR (-O2):
define void @STC311x_SetSOC(i32 %0) {
%2 = tail call i32 @STC31xx_WriteWord16(i32 2, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int a;
  a++;
  printf("a = %i\n", a);
  double buff[1048576];
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x800010,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x800010,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"a = %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [1048576 x double]
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"a = %i\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 undef)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct udphdr {
  int /*<<< orphan*/ dest;
};

/* Variables and functions */
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
uint16_t udphdr_dest_ntohs(struct udphdr *h) { return ntohs(h->dest); }


x86 assembly (clang, -O0):
<udphdr_dest_ntohs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udphdr_dest_ntohs>:
mov    (%rdi),%edi
jmp    1030 <ntohs@plt>

LLVM IR (-O0):
%struct.udphdr = type { i32 }
define i32 @udphdr_dest_ntohs(%struct.udphdr* %0) {
%2 = alloca %struct.udphdr*
store %struct.udphdr* %0, %struct.udphdr** %2
%3 = load %struct.udphdr*, %struct.udphdr** %2
%4 = getelementptr inbounds %struct.udphdr, %struct.udphdr* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = call i32 @ntohs(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
%struct.udphdr = type { i32 }
define i32 @udphdr_dest_ntohs(%struct.udphdr* nocapture %0) {
%2 = getelementptr inbounds %struct.udphdr, %struct.udphdr* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = tail call i32 @ntohs(i32 %3)
ret i32 %4
}
/* Variables and functions */
char *strrchr(char const *, char);
const char *get_filename_ext(const char *filename) {
  const char *dot = strrchr(filename, '.');
  if (!dot || dot == filename) {
    return "";
  }
  return dot;
}


x86 assembly (clang, -O0):
<get_filename_ext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2e,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1147 <get_filename_ext+0x37>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    1157 <get_filename_ext+0x47>
lea    0xeb2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115f <get_filename_ext+0x4f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_filename_ext>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2e,%esi
call   1030 <strrchr@plt>
cmp    %rbx,%rax
lea    0xed8(%rip),%rdx
mov    %rax,%rcx
cmove  %rdx,%rcx
test   %rax,%rax
cmove  %rdx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @get_filename_ext(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 46)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = load i8*, i8** %3
%12 = icmp eq i8* %10, %11
br i1 %12, label %13, label %14
13: ; preds = %9, %1
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %2
br label %16
14: ; preds = %9
%15 = load i8*, i8** %4
store i8* %15, i8** %2
br label %16
16: ; preds = %14, %13
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @get_filename_ext(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
%3 = icmp eq i8* %2, null
%4 = icmp eq i8* %2, %0
%5 = or i1 %3, %4
%6 = select i1 %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %2
ret i8* %6
}
/* Variables and functions */
scalar_t__ func();
int main() {
  int sum = 0;
  sum += func();
  sum += func();
  return sum;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
mov    %rax,%rcx
movslq -0x8(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
mov    %rax,%rcx
movslq -0x8(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <func@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <func@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i64 (...) @func()
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = add nsw i64 %5, %3
%7 = trunc i64 %6 to i32
store i32 %7, i32* %2
%8 = call i64 (...) @func()
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = add nsw i64 %10, %8
%12 = trunc i64 %11 to i32
store i32 %12, i32* %2
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @func()
%2 = tail call i64 (...) @func()
%3 = add i64 %2, %1
%4 = trunc i64 %3 to i32
ret i32 %4
}
int fzcheck() {
  double a, b;
  int i;
  a = 1.;
  b = .1;
  for (i = 155;; b *= b, i >>= 1) {
    if (i & 1) {
      a *= b;
      if (i == 1)
        break;
    }
  }
  b = a * a;
  return b == 0.;
}


x86 assembly (clang, -O0):
<fzcheck>:
push   %rbp
mov    %rsp,%rbp
movsd  0xefc(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xee7(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movl   $0x9b,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1157 <fzcheck+0x57>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1152 <fzcheck+0x52>
jmp    1179 <fzcheck+0x79>
jmp    1157 <fzcheck+0x57>
jmp    115c <fzcheck+0x5c>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1125 <fzcheck+0x25>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fzcheck>:
mov    $0x9b,%eax
movsd  0xef3(%rip),%xmm1
movsd  0xef3(%rip),%xmm0
jmp    1126 <fzcheck+0x26>
nopw   0x0(%rax,%rax,1)
mulsd  %xmm1,%xmm1
shr    %eax
test   $0x1,%al
je     1120 <fzcheck+0x20>
mulsd  %xmm1,%xmm0
cmp    $0x1,%eax
jne    1120 <fzcheck+0x20>
mulsd  %xmm0,%xmm0
xorpd  %xmm1,%xmm1
cmpeqsd %xmm0,%xmm1
movq   %xmm1,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fzcheck() {
%1 = alloca double
%2 = alloca double
%3 = alloca i32
store double 1.000000e+00, double* %1
store double 1.000000e-01, double* %2
store i32 155, i32* %3
br label %4
4: ; preds = %17, %0
%5 = load i32, i32* %3
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load double, double* %2
%10 = load double, double* %1
%11 = fmul double %10, %9
store double %11, double* %1
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %15
14: ; preds = %8
br label %23
15: ; preds = %8
br label %16
16: ; preds = %15, %4
br label %17
17: ; preds = %16
%18 = load double, double* %2
%19 = load double, double* %2
%20 = fmul double %19, %18
store double %20, double* %2
%21 = load i32, i32* %3
%22 = ashr i32 %21, 1
store i32 %22, i32* %3
br label %4
23: ; preds = %14
%24 = load double, double* %1
%25 = load double, double* %1
%26 = fmul double %24, %25
store double %26, double* %2
%27 = load double, double* %2
%28 = fcmp oeq double %27, 0.000000e+00
%29 = zext i1 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
define i32 @fzcheck() {
br label %1
1: ; preds = %10, %0
%2 = phi double [ 1.000000e+00, %0 ], [ %11, %10 ]
%3 = phi double [ 1.000000e-01, %0 ], [ %12, %10 ]
%4 = phi i32 [ 155, %0 ], [ %13, %10 ]
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = fmul double %2, %3
%9 = icmp eq i32 %4, 1
br i1 %9, label %14, label %10
10: ; preds = %1, %7
%11 = phi double [ %8, %7 ], [ %2, %1 ]
%12 = fmul double %3, %3
%13 = lshr i32 %4, 1
br label %1
14: ; preds = %7
%15 = fmul double %8, %8
%16 = fcmp oeq double %15, 0.000000e+00
%17 = zext i1 %16 to i32
ret i32 %17
}
int imx_gpcv2_mf_power_on(unsigned int irq, unsigned int on) { return 0; }


x86 assembly (clang, -O0):
<imx_gpcv2_mf_power_on>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imx_gpcv2_mf_power_on>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @imx_gpcv2_mf_power_on(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @imx_gpcv2_mf_power_on(i32 %0, i32 %1) {
ret i32 0
}
void gtk_propagate_event() {}


x86 assembly (clang, -O0):
<gtk_propagate_event>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_propagate_event>:
ret

LLVM IR (-O0):
define void @gtk_propagate_event() {
ret void
}

LLVM IR (-O2):
define void @gtk_propagate_event() {
ret void
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_rlc_a(struct em8051 *aCPU, int aPosition, char *aBuffer) {
  sprintf(aBuffer, "RLC   A");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_rlc_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_rlc_a>:
movabs $0x41202020434c52,%rax
mov    %rax,(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [8 x i8] c"RLC A\00"
define i32 @disasm_rlc_a(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
define i32 @disasm_rlc_a(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
%4 = bitcast i8* %2 to i64*
store i64 18331195838516306, i64* %4
ret i32 1
}
int grantpt(int fd) {
  (void)fd;
  return 0;
}


x86 assembly (clang, -O0):
<grantpt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grantpt>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @grantpt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @grantpt(i32 %0) {
ret i32 0
}
void str_cat(char s[], char t[]) {
  int i = 0, j = 0;
  while (s[i] != '\0')
    i++;
  while ((s[i++] = t[j++]) != '\0')
    ;
}


x86 assembly (clang, -O0):
<str_cat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     113d <str_cat+0x3d>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111a <str_cat+0x1a>
jmp    1142 <str_cat+0x42>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x18(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    -0x8(%rbp),%rcx
mov    -0x14(%rbp),%edx
mov    %edx,%esi
add    $0x1,%esi
mov    %esi,-0x14(%rbp)
movslq %edx,%rdx
mov    %al,(%rcx,%rdx,1)
movsbl %al,%eax
cmp    $0x0,%eax
je     117d <str_cat+0x7d>
jmp    1142 <str_cat+0x42>
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_cat>:
mov    $0xffffffff,%eax
mov    %rdi,%rcx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
cmpb   $0x0,(%rcx)
lea    0x1(%rcx),%rcx
jne    1110 <str_cat+0x10>
mov    %eax,%eax
add    %rax,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1130 <str_cat+0x30>
ret

LLVM IR (-O0):
define void @str_cat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %7
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %7
18: ; preds = %7
br label %19
19: ; preds = %33, %18
%20 = load i8*, i8** %4
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
%23 = sext i32 %21 to i64
%24 = getelementptr inbounds i8, i8* %20, i64 %23
%25 = load i8, i8* %24
%26 = load i8*, i8** %3
%27 = load i32, i32* %5
%28 = add nsw i32 %27, 1
store i32 %28, i32* %5
%29 = sext i32 %27 to i64
%30 = getelementptr inbounds i8, i8* %26, i64 %29
store i8 %25, i8* %30
%31 = sext i8 %25 to i32
%32 = icmp ne i32 %31, 0
br i1 %32, label %33, label %34
33: ; preds = %19
br label %19
34: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @str_cat(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %8, %3 ], [ 0, %2 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = add nuw i64 %4, 1
br i1 %7, label %9, label %3
9: ; preds = %3
%10 = and i64 %4, 4294967295
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %14, %11 ]
%13 = phi i64 [ %10, %9 ], [ %17, %11 ]
%14 = add nuw i64 %12, 1
%15 = getelementptr inbounds i8, i8* %1, i64 %12
%16 = load i8, i8* %15
%17 = add nuw i64 %13, 1
%18 = getelementptr inbounds i8, i8* %0, i64 %13
store i8 %16, i8* %18
%19 = icmp eq i8 %16, 0
br i1 %19, label %20, label %11
20: ; preds = %11
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RESET_FF_RestoreConfig();
void RESET_FF_Wakeup(void) { RESET_FF_RestoreConfig(); }


x86 assembly (clang, -O0):
<RESET_FF_Wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <RESET_FF_RestoreConfig@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RESET_FF_Wakeup>:
xor    %eax,%eax
jmp    1030 <RESET_FF_RestoreConfig@plt>

LLVM IR (-O0):
define void @RESET_FF_Wakeup() {
%1 = call i32 (...) @RESET_FF_RestoreConfig()
ret void
}

LLVM IR (-O2):
define void @RESET_FF_Wakeup() {
%1 = tail call i32 (...) @RESET_FF_RestoreConfig()
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ colormap;
};
struct TYPE_4__ {
  TYPE_1__ xcolormap;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xcolormap_colormap(void *_p) {
  return (unsigned long)((XEvent *)_p)->xcolormap.colormap;
}


x86 assembly (clang, -O0):
<get_XEvent_xcolormap_colormap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xcolormap_colormap>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xcolormap_colormap(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xcolormap_colormap(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void __vector_default(void) { abort(); }


x86 assembly (clang, -O0):
<__vector_default>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<__vector_default>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @__vector_default() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @__vector_default() {
%1 = tail call i32 (...) @abort()
unreachable
}