xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ ebuf;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
scalar_t__ strerror_r(int, char *, int);
char *strerror(int num) {
  static char ebuf[2048];
  if (strerror_r(num, ebuf, sizeof(ebuf)) != 0)
    errno = EINVAL;
  return (ebuf);
}


x86 assembly (clang, -O0):
<strerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0x2f1b(%rip),%rsi
mov    $0x800,%edx
call   1030 <strerror_r@plt>
cmp    $0x0,%rax
je     114b <strerror+0x3b>
mov    0x2e98(%rip),%rax
mov    (%rax),%ecx
mov    0x2e97(%rip),%rax
mov    %ecx,(%rax)
lea    0x2eee(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strerror>:
push   %rax
lea    0x2f28(%rip),%rsi
mov    $0x800,%edx
call   1030 <strerror_r@plt>
test   %rax,%rax
je     1139 <strerror+0x29>
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    0x2ea9(%rip),%rcx
mov    %eax,(%rcx)
lea    0x2f00(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
@strerror.ebuf = internal global [2048 x i8] zeroinitializer
@EINVAL = global i32 0
@errno = global i32 0
define i8* @strerror(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @strerror_r(i32 %3, i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @strerror.ebuf, i64 0, i64 0), i32 2048)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* @EINVAL
store i32 %7, i32* @errno
br label %8
8: ; preds = %6, %1
ret i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @strerror.ebuf, i64 0, i64 0)
}

LLVM IR (-O2):
@strerror.ebuf = internal global [2048 x i8] zeroinitializer
@EINVAL = global i32 0
@errno = global i32 0
define i8* @strerror(i32 %0) {
%2 = tail call i64 @strerror_r(i32 %0, i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @strerror.ebuf, i64 0, i64 0), i32 2048)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, i32* @EINVAL
store i32 %5, i32* @errno
br label %6
6: ; preds = %4, %1
ret i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @strerror.ebuf, i64 0, i64 0)
}
void pramcache_populate_inode(struct inode *inode) {}


x86 assembly (clang, -O0):
<pramcache_populate_inode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pramcache_populate_inode>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @pramcache_populate_inode(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @pramcache_populate_inode(%struct.inode* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *);
void ace_fs_append_line_to_file(const char *filepath,
                                const char *str_without_linebreak) {
  FILE *file = fopen(filepath, "a");
  fprintf(file, "%s\n", str_without_linebreak);
  fclose(file);
}


x86 assembly (clang, -O0):
<ace_fs_append_line_to_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xe9f(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ace_fs_append_line_to_file>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rbx
lea    0xeb5(%rip),%rsi
mov    %rax,%rdi
mov    %r14,%rdx
call   1040 <fprintf@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fclose@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"a\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @ace_fs_append_line_to_file(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = load i8*, i8** %4
%10 = call i32 @fprintf(i32* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %9)
%11 = load i32*, i32** %5
%12 = call i32 @fclose(i32* %11)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"a\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @ace_fs_append_line_to_file(i8* nocapture %0, i8* %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%5 = tail call i32 @fclose(i32* %3)
ret void
}
void MemManage_Handler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<MemManage_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <MemManage_Handler+0x9>
jmp    1109 <MemManage_Handler+0x9>

x86 assembly (clang, -O2):
<MemManage_Handler>:
jmp    1100 <MemManage_Handler>

LLVM IR (-O0):
define void @MemManage_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @MemManage_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
int db_sqlite3_close(void) { return 0x00; }


x86 assembly (clang, -O0):
<db_sqlite3_close>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_sqlite3_close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @db_sqlite3_close() {
ret i32 0
}

LLVM IR (-O2):
define i32 @db_sqlite3_close() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __dpl_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<__dpl_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dpl_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @__dpl_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @__dpl_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
void *mbzero(size_t n, void *xs) {
  uint8_t *proxy;
  size_t i;
  proxy = xs;
  i = 0;
  while (i < n) {
    proxy[i] = 0;
  }
  return (xs);
}


x86 assembly (clang, -O0):
<mbzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    113f <mbzero+0x3f>
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
jmp    111c <mbzero+0x1c>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbzero>:
test   %rdi,%rdi
je     1112 <mbzero+0x12>
movq   $0x0,(%rsi)
nopl   0x0(%rax)
jmp    1110 <mbzero+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @mbzero(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64
store i64 %0, i64* %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i64*
store i64* %8, i64** %5
store i64 0, i64* %6
br label %9
9: ; preds = %13, %2
%10 = load i64, i64* %6
%11 = load i64, i64* %3
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i64*, i64** %5
%15 = load i64, i64* %6
%16 = getelementptr inbounds i64, i64* %14, i64 %15
store i64 0, i64* %16
br label %9
17: ; preds = %9
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @mbzero(i64 %0, i8* returned writeonly %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = bitcast i8* %1 to i64*
store i64 0, i64* %5
br label %6
6: ; preds = %6, %4
br label %6
7: ; preds = %2
ret i8* %1
}
/* Variables and functions */
scalar_t__ isdigit(unsigned char);
unsigned char tolower(unsigned char);
int hexval(unsigned char c) {
  if (isdigit(c))
    return c - '0';
  c = tolower(c);
  if (c <= 'f')
    return c - 'a' + 10;
  return 0;
}


x86 assembly (clang, -O0):
<hexval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     1150 <hexval+0x30>
movzbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1182 <hexval+0x62>
movzbl -0x5(%rbp),%edi
call   1040 <tolower@plt>
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     117b <hexval+0x5b>
movzbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1182 <hexval+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexval>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
je     1135 <hexval+0x15>
movzbl %bl,%eax
add    $0xffffffd0,%eax
pop    %rbx
ret
movzbl %bl,%edi
call   1040 <tolower@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x66,%cl
ja     114c <hexval+0x2c>
movzbl %cl,%eax
add    $0xffffffa9,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hexval(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isdigit(i8 zeroext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = sub nsw i32 %9, 48
store i32 %10, i32* %2
br label %23
11: ; preds = %1
%12 = load i8, i8* %3
%13 = call zeroext i8 @tolower(i8 zeroext %12)
store i8 %13, i8* %3
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = icmp sle i32 %15, 102
br i1 %16, label %17, label %22
17: ; preds = %11
%18 = load i8, i8* %3
%19 = zext i8 %18 to i32
%20 = sub nsw i32 %19, 97
%21 = add nsw i32 %20, 10
store i32 %21, i32* %2
br label %23
22: ; preds = %11
store i32 0, i32* %2
br label %23
23: ; preds = %22, %17, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @hexval(i8 zeroext %0) {
%2 = tail call i64 @isdigit(i8 zeroext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = zext i8 %0 to i32
%6 = add nsw i32 %5, -48
br label %13
7: ; preds = %1
%8 = tail call zeroext i8 @tolower(i8 zeroext %0)
%9 = icmp ult i8 %8, 103
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = zext i8 %8 to i32
%12 = add nsw i32 %11, -87
br label %13
13: ; preds = %7, %10, %4
%14 = phi i32 [ %6, %4 ], [ %12, %10 ], [ 0, %7 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int g_exit(int exit_code) {
  _exit(exit_code);
  return 0;
}


x86 assembly (clang, -O0):
<g_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<g_exit>:
push   %rax
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @g_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define i32 @g_exit(i32 %0) {
%2 = tail call i32 @_exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ OUT(int, char);
void spiWrite(char data) { OUT(0x00, data); }


x86 assembly (clang, -O0):
<spiWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %edi,%edi
movsbl -0x1(%rbp),%esi
call   1030 <OUT@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spiWrite>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <OUT@plt>

LLVM IR (-O0):
define void @spiWrite(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @OUT(i32 0, i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @spiWrite(i8 signext %0) {
%2 = tail call i32 @OUT(i32 0, i8 signext %0)
ret void
}
int test_imm_41uint16_mem(unsigned short *val) {
  return ((*val) & (0x41 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_41uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x41,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_41uint16_mem>:
testb  $0x41,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_41uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 65
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_41uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 65
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
double log(double);
double logPoisson2(double k, double lambda) {
  return (k + 0.5) * log(lambda / k) + (k - lambda);
}


x86 assembly (clang, -O0):
<logPoisson2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xed6(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
movaps %xmm0,%xmm2
movsd  -0x18(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logPoisson2>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movapd %xmm0,%xmm2
movsd  %xmm0,(%rsp)
movsd  0xed5(%rip),%xmm0
addsd  %xmm2,%xmm0
movsd  %xmm0,0x10(%rsp)
movapd %xmm1,%xmm0
divsd  %xmm2,%xmm0
call   1030 <log@plt>
movsd  (%rsp),%xmm1
subsd  0x8(%rsp),%xmm1
mulsd  0x10(%rsp),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @logPoisson2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fadd double %5, 5.000000e-01
%7 = load double, double* %4
%8 = load double, double* %3
%9 = fdiv double %7, %8
%10 = call double @log(double %9)
%11 = load double, double* %3
%12 = load double, double* %4
%13 = fsub double %11, %12
%14 = call double @llvm.fmuladd.f64(double %6, double %10, double %13)
ret double %14
}

LLVM IR (-O2):
define double @logPoisson2(double %0, double %1) {
%3 = fadd double %0, 5.000000e-01
%4 = fdiv double %1, %0
%5 = tail call double @log(double %4)
%6 = fsub double %0, %1
%7 = tail call double @llvm.fmuladd.f64(double %3, double %5, double %6)
ret double %7
}
char *check_ptr_MAIL_SERVERchar(char *v) { return v; }


x86 assembly (clang, -O0):
<check_ptr_MAIL_SERVERchar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_ptr_MAIL_SERVERchar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @check_ptr_MAIL_SERVERchar(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @check_ptr_MAIL_SERVERchar(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ block_hooks_are_called();
int /*<<< orphan*/ check_thread();
void *irt_thread_func(void *arg) {
  assert((uintptr_t)arg == 0x12345678);
  check_thread();
  assert(!block_hooks_are_called());
  return (void *)0x23456789;
}


x86 assembly (clang, -O0):
<irt_thread_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x12345678,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0x0,%al
call   1050 <check_thread@plt>
mov    $0x0,%al
call   1030 <block_hooks_are_called@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0x23456789,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irt_thread_func>:
push   %rax
xor    %eax,%eax
cmp    $0x12345678,%rdi
sete   %al
mov    %eax,%edi
call   1040 <assert@plt>
xor    %eax,%eax
call   1050 <check_thread@plt>
xor    %eax,%eax
call   1030 <block_hooks_are_called@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1040 <assert@plt>
mov    $0x23456789,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @irt_thread_func(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp eq i64 %4, 305419896
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = call i32 (...) @check_thread()
%9 = call i32 (...) @block_hooks_are_called()
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret i8* inttoptr (i64 591751049 to i8*)
}

LLVM IR (-O2):
define i8* @irt_thread_func(i8* readnone %0) {
%2 = icmp eq i8* %0, inttoptr (i64 305419896 to i8*)
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 (...) @check_thread()
%6 = tail call i32 (...) @block_hooks_are_called()
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
ret i8* inttoptr (i64 591751049 to i8*)
}
/* Variables and functions */
int port_byte_in(int);
int /*<<< orphan*/ port_byte_out(int, int);
int get_cursor(void) {
  int offset;
  port_byte_out(0x3D4, 14);
  offset = port_byte_in(0x3D5) << 8;
  port_byte_out(0x3D4, 15);
  offset |= port_byte_in(0x3D5);
  return offset * 2;
}


x86 assembly (clang, -O0):
<get_cursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1030 <port_byte_out@plt>
mov    $0x3d5,%edi
call   1040 <port_byte_in@plt>
shl    $0x8,%eax
mov    %eax,-0x4(%rbp)
mov    $0x3d4,%edi
mov    $0xf,%esi
call   1030 <port_byte_out@plt>
mov    $0x3d5,%edi
call   1040 <port_byte_in@plt>
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cursor>:
push   %rbx
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1030 <port_byte_out@plt>
mov    $0x3d5,%edi
call   1040 <port_byte_in@plt>
mov    %eax,%ebx
mov    $0x3d4,%edi
mov    $0xf,%esi
call   1030 <port_byte_out@plt>
mov    $0x3d5,%edi
call   1040 <port_byte_in@plt>
shl    $0x9,%ebx
add    %eax,%eax
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_cursor() {
%1 = alloca i32
%2 = call i32 @port_byte_out(i32 980, i32 14)
%3 = call i32 @port_byte_in(i32 981)
%4 = shl i32 %3, 8
store i32 %4, i32* %1
%5 = call i32 @port_byte_out(i32 980, i32 15)
%6 = call i32 @port_byte_in(i32 981)
%7 = load i32, i32* %1
%8 = or i32 %7, %6
store i32 %8, i32* %1
%9 = load i32, i32* %1
%10 = mul nsw i32 %9, 2
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_cursor() {
%1 = tail call i32 @port_byte_out(i32 980, i32 14)
%2 = tail call i32 @port_byte_in(i32 981)
%3 = tail call i32 @port_byte_out(i32 980, i32 15)
%4 = tail call i32 @port_byte_in(i32 981)
%5 = shl i32 %2, 9
%6 = shl i32 %4, 1
%7 = or i32 %6, %5
ret i32 %7
}
int modular_pow(int base, int exponent, int modulus) {
  int result = 1;
  while (exponent > 0) {
    if (exponent % 2 == 1) {
      result = (result * base) % modulus;
    }
    exponent = exponent >> 1;
    base = (base * base) % modulus;
    return result;
  }
}


x86 assembly (clang, -O0):
<modular_pow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    115d <modular_pow+0x5d>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    1140 <modular_pow+0x40>
mov    -0x14(%rbp),%eax
imul   -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modular_pow>:
test   %esi,%esi
jle    1119 <modular_pow+0x19>
mov    $0x1,%eax
test   $0x1,%sil
je     1118 <modular_pow+0x18>
mov    %edx,%ecx
mov    %edi,%eax
cltd
idiv   %ecx
mov    %edx,%eax
ret
ret

LLVM IR (-O0):
define i32 @modular_pow(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 1, i32* %8
br label %9
9: ; preds = %3
%10 = load i32, i32* %6
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %31
12: ; preds = %9
%13 = load i32, i32* %6
%14 = srem i32 %13, 2
%15 = icmp eq i32 %14, 1
br i1 %15, label %16, label %22
16: ; preds = %12
%17 = load i32, i32* %8
%18 = load i32, i32* %5
%19 = mul nsw i32 %17, %18
%20 = load i32, i32* %7
%21 = srem i32 %19, %20
store i32 %21, i32* %8
br label %22
22: ; preds = %16, %12
%23 = load i32, i32* %6
%24 = ashr i32 %23, 1
store i32 %24, i32* %6
%25 = load i32, i32* %5
%26 = load i32, i32* %5
%27 = mul nsw i32 %25, %26
%28 = load i32, i32* %7
%29 = srem i32 %27, %28
store i32 %29, i32* %5
%30 = load i32, i32* %8
store i32 %30, i32* %4
br label %31
31: ; preds = %22, %9
%32 = load i32, i32* %4
ret i32 %32
}

LLVM IR (-O2):
define i32 @modular_pow(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %10
5: ; preds = %3
%6 = and i32 %1, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = srem i32 %0, %2
br label %10
10: ; preds = %3, %5, %8
%11 = phi i32 [ %9, %8 ], [ 1, %5 ], [ undef, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ foo(int);
int f4() { foo(12); }


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xc,%edi
call   1030 <foo@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    $0xc,%edi
jmp    1030 <foo@plt>

LLVM IR (-O0):
define i32 @f4() {
%1 = alloca i32
%2 = call i32 @foo(i32 12)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @f4() {
%1 = tail call i32 @foo(i32 12)
ret i32 undef
}
char jst_to_chr(just)
int just;
{
  switch (just) {
  case 0:
    return 'D';
  case 1:
    return 'L';
  case 2:
    return 'R';
  case 3:
    return 'C';
  default:
    return '?';
  }
}


x86 assembly (clang, -O0):
<jst_to_chr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     1150 <jst_to_chr+0x50>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x44,-0x1(%rbp)
jmp    1154 <jst_to_chr+0x54>
movb   $0x4c,-0x1(%rbp)
jmp    1154 <jst_to_chr+0x54>
movb   $0x52,-0x1(%rbp)
jmp    1154 <jst_to_chr+0x54>
movb   $0x43,-0x1(%rbp)
jmp    1154 <jst_to_chr+0x54>
movb   $0x3f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jst_to_chr>:
lea    0x0(,%rdi,8),%ecx
mov    $0x43524c44,%edx
shr    %cl,%edx
cmp    $0x4,%edi
mov    $0x3f,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @jst_to_chr(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i8 68, i8* %2
br label %10
6: ; preds = %1
store i8 76, i8* %2
br label %10
7: ; preds = %1
store i8 82, i8* %2
br label %10
8: ; preds = %1
store i8 67, i8* %2
br label %10
9: ; preds = %1
store i8 63, i8* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i8, i8* %2
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @jst_to_chr(i32 %0) {
%2 = icmp ult i32 %0, 4
%3 = shl i32 %0, 3
%4 = lshr i32 1129466948, %3
%5 = trunc i32 %4 to i8
%6 = select i1 %2, i8 %5, i8 63
ret i8 %6
}
int c057(void) { return 0; }


x86 assembly (clang, -O0):
<c057>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c057>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c057() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c057() {
ret i32 0
}
void foo810(int p) {}


x86 assembly (clang, -O0):
<foo810>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo810>:
ret

LLVM IR (-O0):
define void @foo810(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo810(i32 %0) {
ret void
}
void cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx,
           unsigned int *edx) {
  asm volatile("cpuid"
               : "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
               : "0"(*eax), "2"(*ecx));
}


x86 assembly (clang, -O0):
<cpuid>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%r8
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
mov    (%rcx),%ecx
cpuid
mov    %eax,%r9d
mov    -0x38(%rbp),%rax
mov    %ecx,%esi
mov    -0x30(%rbp),%rcx
mov    %r9d,(%r8)
mov    %ebx,(%rdi)
mov    %esi,(%rcx)
mov    %edx,(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid>:
push   %rbx
mov    %rcx,%r8
mov    %rdx,%r9
mov    (%rdi),%eax
mov    (%rdx),%ecx
cpuid
mov    %eax,(%rdi)
mov    %ebx,(%rsi)
mov    %ecx,(%r9)
mov    %edx,(%r8)
pop    %rbx
ret

LLVM IR (-O0):
define void @cpuid(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = load i32*, i32** %7
%16 = load i32, i32* %15
%17 = call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %14, i32 %16)
%18 = extractvalue { i32, i32, i32, i32 } %17, 0
%19 = extractvalue { i32, i32, i32, i32 } %17, 1
%20 = extractvalue { i32, i32, i32, i32 } %17, 2
%21 = extractvalue { i32, i32, i32, i32 } %17, 3
store i32 %18, i32* %9
store i32 %19, i32* %10
store i32 %20, i32* %11
store i32 %21, i32* %12
ret void
}

LLVM IR (-O2):
define void @cpuid(i32* nocapture %0, i32* nocapture writeonly %1, i32* nocapture %2, i32* nocapture writeonly %3) {
%5 = load i32, i32* %0
%6 = load i32, i32* %2
%7 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 %6)
%8 = extractvalue { i32, i32, i32, i32 } %7, 0
%9 = extractvalue { i32, i32, i32, i32 } %7, 1
%10 = extractvalue { i32, i32, i32, i32 } %7, 2
%11 = extractvalue { i32, i32, i32, i32 } %7, 3
store i32 %8, i32* %0
store i32 %9, i32* %1
store i32 %10, i32* %2
store i32 %11, i32* %3
ret void
}
int flags(void) { return 1; }


x86 assembly (clang, -O0):
<flags>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flags>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @flags() {
ret i32 1
}

LLVM IR (-O2):
define i32 @flags() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x7d() {
  Assert_real((isbdigit(125) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              630, ("isbdigit should be 0 for }"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x7d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7d,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x276,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x7d>:
push   %rax
mov    $0x7d,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x276,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for }\00"
define void @t_isbdigit_0x7d() {
%1 = call i64 @isbdigit(i32 125)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 630, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [27 x i8] c"isbdigit should be 0 for }\00"
define void @t_isbdigit_0x7d() {
%1 = tail call i64 @isbdigit(i32 125)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 630, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int _chmod(char const *, int);
int chmod(const char *filename, int pmode) { return _chmod(filename, pmode); }


x86 assembly (clang, -O0):
<chmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_chmod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chmod>:
jmp    1030 <_chmod@plt>

LLVM IR (-O0):
define i32 @chmod(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @_chmod(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @chmod(i8* %0, i32 %1) {
%3 = tail call i32 @_chmod(i8* %0, i32 %1)
ret i32 %3
}
int util_strftime(fmtr, fmtl, fmt)
char *fmtr;
int fmtl;
char *fmt;
{ return (0); }


x86 assembly (clang, -O0):
<util_strftime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_strftime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @util_strftime(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @util_strftime(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
ret i32 0
}
void I422ToAR30Row_AVX2() {}


x86 assembly (clang, -O0):
<I422ToAR30Row_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422ToAR30Row_AVX2>:
ret

LLVM IR (-O0):
define void @I422ToAR30Row_AVX2() {
ret void
}

LLVM IR (-O2):
define void @I422ToAR30Row_AVX2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pmu_set_sleep_clk(int, int, int, int);
void pmu_set_sleep_low() { pmu_set_sleep_clk(0x2, 0x1, 0x1, 0x1); }


x86 assembly (clang, -O0):
<pmu_set_sleep_low>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
mov    $0x1,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <pmu_set_sleep_clk@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_set_sleep_low>:
mov    $0x2,%edi
mov    $0x1,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
jmp    1030 <pmu_set_sleep_clk@plt>

LLVM IR (-O0):
define void @pmu_set_sleep_low() {
%1 = call i32 @pmu_set_sleep_clk(i32 2, i32 1, i32 1, i32 1)
ret void
}

LLVM IR (-O2):
define void @pmu_set_sleep_low() {
%1 = tail call i32 @pmu_set_sleep_clk(i32 2, i32 1, i32 1, i32 1)
ret void
}
/* Variables and functions */
int close(int);
int net_close(int s) { return close(s); }


x86 assembly (clang, -O0):
<net_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @net_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @net_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
int test_imm_10uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x10 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_10uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x10,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_10uint64_lowword_mem>:
testb  $0x10,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_10uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 16
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_10uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 16
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
char cast_short_char(short int x) { return (char)x; }


x86 assembly (clang, -O0):
<cast_short_char>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_short_char>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @cast_short_char(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = trunc i16 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @cast_short_char(i16 signext %0) {
%2 = trunc i16 %0 to i8
ret i8 %2
}
/* Type definitions */
struct gg_http {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct gg_http *);
int /*<<< orphan*/ gg_http_free_fields(struct gg_http *);
int /*<<< orphan*/ gg_http_stop(struct gg_http *);
void gg_http_free(struct gg_http *h) {
  if (!h)
    return;
  gg_http_stop(h);
  gg_http_free_fields(h);
  free(h);
}


x86 assembly (clang, -O0):
<gg_http_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114c <gg_http_free+0x1c>
jmp    1167 <gg_http_free+0x37>
mov    -0x8(%rbp),%rdi
call   1040 <gg_http_stop@plt>
mov    -0x8(%rbp),%rdi
call   1050 <gg_http_free_fields@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gg_http_free>:
test   %rdi,%rdi
je     114f <gg_http_free+0x1f>
push   %rbx
mov    %rdi,%rbx
call   1040 <gg_http_stop@plt>
mov    %rbx,%rdi
call   1050 <gg_http_free_fields@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.gg_http = type { i32 }
define void @gg_http_free(%struct.gg_http* %0) {
%2 = alloca %struct.gg_http*
store %struct.gg_http* %0, %struct.gg_http** %2
%3 = load %struct.gg_http*, %struct.gg_http** %2
%4 = icmp ne %struct.gg_http* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %13
6: ; preds = %1
%7 = load %struct.gg_http*, %struct.gg_http** %2
%8 = call i32 @gg_http_stop(%struct.gg_http* %7)
%9 = load %struct.gg_http*, %struct.gg_http** %2
%10 = call i32 @gg_http_free_fields(%struct.gg_http* %9)
%11 = load %struct.gg_http*, %struct.gg_http** %2
%12 = call i32 @free(%struct.gg_http* %11)
br label %13
13: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.gg_http = type { i32 }
define void @gg_http_free(%struct.gg_http* %0) {
%2 = icmp eq %struct.gg_http* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @gg_http_stop(%struct.gg_http* %0)
%5 = tail call i32 @gg_http_free_fields(%struct.gg_http* %0)
%6 = tail call i32 @free(%struct.gg_http* %0)
br label %7
7: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hi kkcf0123\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"hi kkcf0123\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"hi kkcf0123\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
scalar_t__ shmdt(char *);
int ipcShmFin(char *addr) {
  if (shmdt(addr) < 0) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ipcShmFin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <shmdt@plt>
cmp    $0x0,%rax
jge    113b <ipcShmFin+0x2b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1142 <ipcShmFin+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipcShmFin>:
push   %rax
call   1030 <shmdt@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ipcShmFin(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @shmdt(i8* %4)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @ipcShmFin(i8* %0) {
%2 = tail call i64 @shmdt(i8* %0)
%3 = ashr i64 %2, 63
%4 = trunc i64 %3 to i32
ret i32 %4
}
int test_imm_AFuint32_reg(unsigned int val) {
  return ((val) & (0xAF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AFuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xaf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AFuint32_reg>:
test   $0xaf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AFuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 175
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_AFuint32_reg(i32 %0) {
%2 = and i32 %0, 175
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ f_q(int, int);
scalar_t__ pow(int /*<<< orphan*/, int);
double sqrt(scalar_t__);
float f_w(int i, int j) {
  float resp = 2.0 / (1.0 + sqrt(i - pow(f_q(i, j), 2)));
  return resp;
}


x86 assembly (clang, -O0):
<f_w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <f_q@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1040 <pow@plt>
mov    -0x18(%rbp),%rdi
sub    %rax,%rdi
call   1050 <sqrt@plt>
movsd  0xe97(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  0xe83(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_w>:
push   %rbx
movslq %edi,%rbx
mov    %ebx,%edi
call   1030 <f_q@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1040 <pow@plt>
sub    %rax,%rbx
mov    %rbx,%rdi
call   1050 <sqrt@plt>
addsd  0xea6(%rip),%xmm0
movsd  0xea6(%rip),%xmm1
divsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define float @f_w(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @f_q(i32 %8, i32 %9)
%11 = call i64 @pow(i32 %10, i32 2)
%12 = sub nsw i64 %7, %11
%13 = call double @sqrt(i64 %12)
%14 = fadd double 1.000000e+00, %13
%15 = fdiv double 2.000000e+00, %14
%16 = fptrunc double %15 to float
store float %16, float* %5
%17 = load float, float* %5
ret float %17
}

LLVM IR (-O2):
define float @f_w(i32 %0, i32 %1) {
%3 = sext i32 %0 to i64
%4 = tail call i32 @f_q(i32 %0, i32 %1)
%5 = tail call i64 @pow(i32 %4, i32 2)
%6 = sub nsw i64 %3, %5
%7 = tail call double @sqrt(i64 %6)
%8 = fadd double %7, 1.000000e+00
%9 = fdiv double 2.000000e+00, %8
%10 = fptrunc double %9 to float
ret float %10
}
void dcTest_deInitPlatform() {}


x86 assembly (clang, -O0):
<dcTest_deInitPlatform>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcTest_deInitPlatform>:
ret

LLVM IR (-O0):
define void @dcTest_deInitPlatform() {
ret void
}

LLVM IR (-O2):
define void @dcTest_deInitPlatform() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "rawconnect: no arguments\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"rawconnect: no arguments\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"rawconnect: no arguments\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
unsigned int attr_hash(const char *str, unsigned int len) {
  static unsigned char asso_values[] = {
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 30, 41, 41, 41, 15, 41, 41,
      41, 41, 0,  0,  41, 41, 41, 41, 10, 0,  41, 41, 25, 0,  41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41,
      41, 41, 41, 41};
  return len + asso_values[(unsigned char)str[1]];
}


x86 assembly (clang, -O0):
<attr_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
mov    %ecx,%edx
lea    0x2f11(%rip),%rcx
movzbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<attr_hash>:
movzbl 0x1(%rdi),%eax
lea    0xef5(%rip),%rcx
movzbl (%rax,%rcx,1),%eax
add    %esi,%eax
ret

LLVM IR (-O0):
@attr_hash.asso_values = internal global [256 x i8] c")))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))\1E)))\0F))))\00\00))))\0A\00))\19\00))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))"
define i32 @attr_hash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = zext i8 %8 to i64
%10 = getelementptr inbounds [256 x i8], [256 x i8]* @attr_hash.asso_values, i64 0, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = add i32 %5, %12
ret i32 %13
}

LLVM IR (-O2):
@attr_hash.asso_values = internal unnamed_addr constant [256 x i8] c")))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))\1E)))\0F))))\00\00))))\0A\00))\19\00))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))"
define i32 @attr_hash(i8* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
%5 = zext i8 %4 to i64
%6 = getelementptr inbounds [256 x i8], [256 x i8]* @attr_hash.asso_values, i64 0, i64 %5
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = add i32 %8, %1
ret i32 %9
}
void area_circ(float *rad) { *rad = 3.14159 * (*rad) * (*rad); }


x86 assembly (clang, -O0):
<area_circ>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee4(%rip),%xmm0
mulsd  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<area_circ>:
movss  (%rdi),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xef0(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @area_circ(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = fmul double 3.141590e+00, %5
%7 = load float*, float** %2
%8 = load float, float* %7
%9 = fpext float %8 to double
%10 = fmul double %6, %9
%11 = fptrunc double %10 to float
%12 = load float*, float** %2
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @area_circ(float* nocapture %0) {
%2 = load float, float* %0
%3 = fpext float %2 to double
%4 = fmul double %3, 3.141590e+00
%5 = fmul double %4, %3
%6 = fptrunc double %5 to float
store float %6, float* %0
ret void
}
void GLUE_SET_PX_FROM_P1(void *b, int wv) {
  static const unsigned int tab[3] = {
      0x7c631b78,
      0x7c6e1b78,
      0x7c6f1b78,
  };
  *(unsigned int *)b = tab[wv];
}


x86 assembly (clang, -O0):
<GLUE_SET_PX_FROM_P1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rcx
lea    0xeea(%rip),%rax
mov    (%rax,%rcx,4),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLUE_SET_PX_FROM_P1>:
movslq %esi,%rax
lea    0xef6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
@GLUE_SET_PX_FROM_P1.tab = internal constant [3 x i32] [i32 2086869880, i32 2087590776, i32 2087656312]
define void @GLUE_SET_PX_FROM_P1(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [3 x i32], [3 x i32]* @GLUE_SET_PX_FROM_P1.tab, i64 0, i64 %6
%8 = load i32, i32* %7
%9 = load i8*, i8** %3
%10 = bitcast i8* %9 to i32*
store i32 %8, i32* %10
ret void
}

LLVM IR (-O2):
@GLUE_SET_PX_FROM_P1.tab = internal unnamed_addr constant [3 x i32] [i32 2086869880, i32 2087590776, i32 2087656312]
define void @GLUE_SET_PX_FROM_P1(i8* nocapture writeonly %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds [3 x i32], [3 x i32]* @GLUE_SET_PX_FROM_P1.tab, i64 0, i64 %3
%5 = load i32, i32* %4
%6 = bitcast i8* %0 to i32*
store i32 %5, i32* %6
ret void
}