xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ output(long, long);
void main() {
  long int a, b, i;
  a = 809;
  for (i = 10; i < 100; i++) {
    b = i * a + 1;
    if (8 * i < 100 && 9 * i >= 100)
      output(b, i);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x329,-0x8(%rbp)
movq   $0xa,-0x18(%rbp)
cmpq   $0x64,-0x18(%rbp)
jge    1188 <main+0x78>
mov    -0x18(%rbp),%rax
imul   -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x3,%rax
cmp    $0x64,%rax
jge    1172 <main+0x62>
imul   $0x9,-0x18(%rbp),%rax
cmp    $0x64,%rax
jl     1172 <main+0x62>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <output@plt>
jmp    1177 <main+0x67>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <main+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
mov    $0xa,%r15d
mov    $0x5a,%ebx
mov    $0x1f9b,%r14d
jmp    1148 <main+0x38>
nopl   0x0(%rax,%rax,1)
add    $0x1,%r15
add    $0x9,%rbx
add    $0x329,%r14
cmp    $0x384,%rbx
je     1161 <main+0x51>
cmp    $0xc,%r15
ja     1130 <main+0x20>
cmp    $0x64,%rbx
jb     1130 <main+0x20>
mov    %r14,%rdi
mov    %r15,%rsi
call   1030 <output@plt>
jmp    1130 <main+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
store i64 809, i64* %1
store i64 10, i64* %3
br label %4
4: ; preds = %24, %0
%5 = load i64, i64* %3
%6 = icmp slt i64 %5, 100
br i1 %6, label %7, label %27
7: ; preds = %4
%8 = load i64, i64* %3
%9 = load i64, i64* %1
%10 = mul nsw i64 %8, %9
%11 = add nsw i64 %10, 1
store i64 %11, i64* %2
%12 = load i64, i64* %3
%13 = mul nsw i64 8, %12
%14 = icmp slt i64 %13, 100
br i1 %14, label %15, label %23
15: ; preds = %7
%16 = load i64, i64* %3
%17 = mul nsw i64 9, %16
%18 = icmp sge i64 %17, 100
br i1 %18, label %19, label %23
19: ; preds = %15
%20 = load i64, i64* %2
%21 = load i64, i64* %3
%22 = call i32 @output(i64 %20, i64 %21)
br label %23
23: ; preds = %19, %15, %7
br label %24
24: ; preds = %23
%25 = load i64, i64* %3
%26 = add nsw i64 %25, 1
store i64 %26, i64* %3
br label %4
27: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @main() {
br label %1
1: ; preds = %0, %11
%2 = phi i64 [ 10, %0 ], [ %12, %11 ]
%3 = icmp ult i64 %2, 13
%4 = mul nuw nsw i64 %2, 9
%5 = icmp ugt i64 %4, 99
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = mul nuw nsw i64 %2, 809
%9 = add nuw nsw i64 %8, 1
%10 = tail call i32 @output(i64 %9, i64 %2)
br label %11
11: ; preds = %1, %7
%12 = add nuw nsw i64 %2, 1
%13 = icmp eq i64 %12, 100
br i1 %13, label %14, label %1
14: ; preds = %11
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ exit(int);
void reaper() {
  cleanup();
  exit(2);
}


x86 assembly (clang, -O0):
<reaper>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cleanup@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<reaper>:
push   %rax
xor    %eax,%eax
call   1030 <cleanup@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @reaper() {
%1 = call i32 (...) @cleanup()
%2 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
define void @reaper() {
%1 = tail call i32 (...) @cleanup()
%2 = tail call i32 @exit(i32 2)
unreachable
}
/* Type definitions */
typedef int uint_least32_t;
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t endian_32hi8(uint_least32_t dword) { return (uint8_t)(dword >> 8); }


x86 assembly (clang, -O0):
<endian_32hi8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<endian_32hi8>:
mov    %edi,%eax
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @endian_32hi8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
ret i32 %4
}

LLVM IR (-O2):
define i32 @endian_32hi8(i32 %0) {
%2 = ashr i32 %0, 8
ret i32 %2
}
void test3(int a) {
  int w;
  {
    w = a + 2;
    return;
  }
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
ret

LLVM IR (-O0):
define void @test3(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 2
store i32 %5, i32* %3
ret void
}

LLVM IR (-O2):
define void @test3(i32 %0) {
ret void
}
int FBasesPol(int b) {
  switch (b) {
  case 'A':
    return 'A';
  case 'C':
    return 'C';
  case 'G':
    return 'G';
  case 'T':
    return 'T';
  case 'U':
    return 'T';
  case 'a':
    return 'A';
  case 'c':
    return 'C';
  case 'g':
    return 'G';
  case 't':
    return 'T';
  default:
    return -1;
  }
  return -1;
}


x86 assembly (clang, -O0):
<FBasesPol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x33,%eax
ja     119c <FBasesPol+0x9c>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x41,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x43,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x47,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x54,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x54,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x41,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x43,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x47,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0x54,-0x4(%rbp)
jmp    11a3 <FBasesPol+0xa3>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FBasesPol>:
lea    -0x41(%rdi),%ecx
cmp    $0x33,%ecx
ja     1126 <FBasesPol+0x26>
mov    $0x41,%eax
lea    0xeec(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    %edi,%eax
ret
mov    $0x54,%eax
ret
mov    $0xffffffff,%eax
ret
mov    $0x43,%eax
ret
mov    $0x47,%eax
ret

LLVM IR (-O0):
define i32 @FBasesPol(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %14 [
i32 65, label %5
i32 67, label %6
i32 71, label %7
i32 84, label %8
i32 85, label %9
i32 97, label %10
i32 99, label %11
i32 103, label %12
i32 116, label %13
]
5: ; preds = %1
store i32 65, i32* %2
br label %15
6: ; preds = %1
store i32 67, i32* %2
br label %15
7: ; preds = %1
store i32 71, i32* %2
br label %15
8: ; preds = %1
store i32 84, i32* %2
br label %15
9: ; preds = %1
store i32 84, i32* %2
br label %15
10: ; preds = %1
store i32 65, i32* %2
br label %15
11: ; preds = %1
store i32 67, i32* %2
br label %15
12: ; preds = %1
store i32 71, i32* %2
br label %15
13: ; preds = %1
store i32 84, i32* %2
br label %15
14: ; preds = %1
store i32 -1, i32* %2
br label %15
15: ; preds = %14, %13, %12, %11, %10, %9, %8, %7, %6, %5
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @FBasesPol(i32 %0) {
switch i32 %0, label %9 [
i32 65, label %10
i32 67, label %2
i32 71, label %3
i32 84, label %4
i32 85, label %5
i32 97, label %10
i32 99, label %6
i32 103, label %7
i32 116, label %8
]
2: ; preds = %1
br label %10
3: ; preds = %1
br label %10
4: ; preds = %1
br label %10
5: ; preds = %1
br label %10
6: ; preds = %1
br label %10
7: ; preds = %1
br label %10
8: ; preds = %1
br label %10
9: ; preds = %1
br label %10
10: ; preds = %1, %1, %9, %8, %7, %6, %5, %4, %3, %2
%11 = phi i32 [ -1, %9 ], [ 84, %8 ], [ 71, %7 ], [ 67, %6 ], [ 84, %5 ], [ %0, %4 ], [ %0, %3 ], [ %0, %2 ], [ 65, %1 ], [ 65, %1 ]
ret i32 %11
}
unsigned char charset_screencode_to_petcii(unsigned char code) {
  code &= 0x7f;
  if (code <= 0x1f) {
    return (unsigned char)(code + 0x40);
  } else if (code >= 0x40 && code <= 0x5f) {
    return (unsigned char)(code + 0x20);
  }
  return code;
}


x86 assembly (clang, -O0):
<charset_screencode_to_petcii>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
and    $0x7f,%eax
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x1f,%eax
jg     1130 <charset_screencode_to_petcii+0x30>
movzbl -0x2(%rbp),%eax
add    $0x40,%eax
mov    %al,-0x1(%rbp)
jmp    1164 <charset_screencode_to_petcii+0x64>
movzbl -0x2(%rbp),%eax
cmp    $0x40,%eax
jl     1159 <charset_screencode_to_petcii+0x59>
movzbl -0x2(%rbp),%eax
cmp    $0x5f,%eax
jg     1159 <charset_screencode_to_petcii+0x59>
movzbl -0x2(%rbp),%eax
add    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    1164 <charset_screencode_to_petcii+0x64>
jmp    115e <charset_screencode_to_petcii+0x5e>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charset_screencode_to_petcii>:
mov    %edi,%eax
and    $0x7f,%al
cmp    $0x1f,%al
ja     110b <charset_screencode_to_petcii+0xb>
add    $0x40,%al
ret
and    $0x60,%dil
lea    0x20(%rax),%ecx
cmp    $0x40,%dil
movzbl %al,%edx
movzbl %cl,%eax
cmovne %edx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @charset_screencode_to_petcii(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 127
%7 = trunc i32 %6 to i8
store i8 %7, i8* %3
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 31
br i1 %10, label %11, label %16
11: ; preds = %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = add nsw i32 %13, 64
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %32
16: ; preds = %1
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = icmp sge i32 %18, 64
br i1 %19, label %20, label %29
20: ; preds = %16
%21 = load i8, i8* %3
%22 = zext i8 %21 to i32
%23 = icmp sle i32 %22, 95
br i1 %23, label %24, label %29
24: ; preds = %20
%25 = load i8, i8* %3
%26 = zext i8 %25 to i32
%27 = add nsw i32 %26, 32
%28 = trunc i32 %27 to i8
store i8 %28, i8* %2
br label %32
29: ; preds = %20, %16
br label %30
30: ; preds = %29
%31 = load i8, i8* %3
store i8 %31, i8* %2
br label %32
32: ; preds = %30, %24, %11
%33 = load i8, i8* %2
ret i8 %33
}

LLVM IR (-O2):
define zeroext i8 @charset_screencode_to_petcii(i8 zeroext %0) {
%2 = and i8 %0, 127
%3 = icmp ult i8 %2, 32
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nuw nsw i8 %2, 64
br label %11
6: ; preds = %1
%7 = and i8 %0, 96
%8 = icmp eq i8 %7, 64
%9 = add nuw i8 %2, 32
%10 = select i1 %8, i8 %9, i8 %2
br label %11
11: ; preds = %6, %4
%12 = phi i8 [ %5, %4 ], [ %10, %6 ]
ret i8 %12
}
/* Variables and functions */
int /*<<< orphan*/ mediansort(void **, int (*)(void const *, void const *),
                              int /*<<< orphan*/, int);
void sortPointers(void **vals, int total_elems,
                  int (*cmp)(const void *, const void *)) {
  mediansort(vals, cmp, 0, total_elems - 1);
}


x86 assembly (clang, -O0):
<sortPointers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
xor    %edx,%edx
call   1030 <mediansort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortPointers>:
lea    -0x1(%rsi),%ecx
mov    %rdx,%rsi
xor    %edx,%edx
jmp    1030 <mediansort@plt>

LLVM IR (-O0):
define void @sortPointers(i8** %0, i32 %1, i32 (i8*, i8*)* %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32 (i8*, i8*)*
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i32 (i8*, i8*)* %2, i32 (i8*, i8*)** %6
%7 = load i8**, i8*** %4
%8 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %6
%9 = load i32, i32* %5
%10 = sub nsw i32 %9, 1
%11 = call i32 @mediansort(i8** %7, i32 (i8*, i8*)* %8, i32 0, i32 %10)
ret void
}

LLVM IR (-O2):
define void @sortPointers(i8** %0, i32 %1, i32 (i8*, i8*)* %2) {
%4 = add nsw i32 %1, -1
%5 = tail call i32 @mediansort(i8** %0, i32 (i8*, i8*)* %2, i32 0, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
scalar_t__ wcslen(int /*<<< orphan*/ const *);
int /*<<< orphan*/ *wmemcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                            scalar_t__);
wchar_t *wcscpy(wchar_t *restrict whither, const wchar_t *restrict whence) {
  return wmemcpy(whither, whence, wcslen(whence) + 1);
}


x86 assembly (clang, -O0):
<wcscpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <wcslen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1030 <wmemcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcscpy>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <wcslen@plt>
lea    0x1(%rax),%rdx
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <wmemcpy@plt>

LLVM IR (-O0):
define i32* @wcscpy(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = load i32*, i32** %4
%8 = call i64 @wcslen(i32* %7)
%9 = add nsw i64 %8, 1
%10 = call i32* @wmemcpy(i32* %5, i32* %6, i64 %9)
ret i32* %10
}

LLVM IR (-O2):
define i32* @wcscpy(i32* noalias %0, i32* noalias %1) {
%3 = tail call i64 @wcslen(i32* %1)
%4 = add nsw i64 %3, 1
%5 = tail call i32* @wmemcpy(i32* %0, i32* %1, i64 %4)
ret i32* %5
}
/* Variables and functions */
int foo(int *, int);
int main() {
  int a[3] = {1, 2, 3};
  return foo(a, 2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xed8(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
mov    $0x2,%esi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xeee(%rip),%eax
mov    %eax,0x10(%rsp)
mov    0xedb(%rip),%rax
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
mov    $0x2,%esi
call   1030 <foo@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [3 x i32] [i32 1, i32 2, i32 3]
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
store i32 0, i32* %1
%3 = bitcast [3 x i32]* %2 to i8*
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%5 = call i32 @foo(i32* %4, i32 2)
ret i32 %5
}

LLVM IR (-O2):
@__const.main.a = [3 x i32] [i32 1, i32 2, i32 3]
define i32 @main() {
%1 = alloca [3 x i32]
%2 = bitcast [3 x i32]* %1 to i8*
%3 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
%4 = call i32 @foo(i32* %3, i32 2)
ret i32 %4
}
void foo(unsigned long long *p) {
  unsigned long long tmp;
  tmp = *p;
  tmp = (tmp >> 32) | (tmp << 32);
  tmp = (((tmp & 0xff00ff00ff00ff00ULL) >> 8) |
         ((tmp & 71777214294589695ULL) << 8));
  *p = (((tmp & 0xffff0000ffff0000ULL) >> 16) |
        ((tmp & 281470681808895ULL) << 16));
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x20,%rax
mov    -0x10(%rbp),%rcx
shl    $0x20,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
movabs $0xff00ff00ff00ff00,%rax
and    -0x10(%rbp),%rax
shr    $0x8,%rax
movabs $0xff00ff00ff00ff,%rcx
and    -0x10(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
movabs $0xffff0000ffff0000,%rcx
and    -0x10(%rbp),%rcx
shr    $0x10,%rcx
movabs $0xffff0000ffff,%rax
and    -0x10(%rbp),%rax
shl    $0x10,%rax
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    (%rdi),%rax
bswap  %rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @foo(i64* %0) {
%2 = alloca i64*
%3 = alloca i64
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = load i64, i64* %4
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = lshr i64 %6, 32
%8 = load i64, i64* %3
%9 = shl i64 %8, 32
%10 = or i64 %7, %9
store i64 %10, i64* %3
%11 = load i64, i64* %3
%12 = and i64 %11, -71777214294589696
%13 = lshr i64 %12, 8
%14 = load i64, i64* %3
%15 = and i64 %14, 71777214294589695
%16 = shl i64 %15, 8
%17 = or i64 %13, %16
store i64 %17, i64* %3
%18 = load i64, i64* %3
%19 = and i64 %18, -281470681808896
%20 = lshr i64 %19, 16
%21 = load i64, i64* %3
%22 = and i64 %21, 281470681808895
%23 = shl i64 %22, 16
%24 = or i64 %20, %23
%25 = load i64*, i64** %2
store i64 %24, i64* %25
ret void
}

LLVM IR (-O2):
define void @foo(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = tail call i64 @llvm.bswap.i64(i64 %2)
store i64 %3, i64* %0
ret void
}
/* Variables and functions */
int rand();
int random_range(int min, int max) { return rand() % (max - min + 1) + min; }


x86 assembly (clang, -O0):
<random_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_range>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @random_range(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @random_range(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ MSG_WAITALL;
int /*<<< orphan*/ recv(int, int *, int, int /*<<< orphan*/);
int recv_param(int connfd) {
  int temp;
  recv(connfd, &temp, sizeof(int), MSG_WAITALL);
  return temp;
}


x86 assembly (clang, -O0):
<recv_param>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb3(%rip),%rax
mov    (%rax),%ecx
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <recv@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recv_param>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%ecx
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <recv@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@MSG_WAITALL = global i32 0
define i32 @recv_param(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @MSG_WAITALL
%6 = call i32 @recv(i32 %4, i32* %3, i32 4, i32 %5)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@MSG_WAITALL = global i32 0
define i32 @recv_param(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @MSG_WAITALL
%5 = call i32 @recv(i32 %0, i32* %2, i32 4, i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}
double fifdint(double a) {
  long temp;
  temp = (long)(a);
  return (double)(temp);
}


x86 assembly (clang, -O0):
<fifdint>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cvtsi2sdq -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifdint>:
cvttsd2si %xmm0,%rax
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
ret

LLVM IR (-O0):
define double @fifdint(double %0) {
%2 = alloca double
%3 = alloca i64
store double %0, double* %2
%4 = load double, double* %2
%5 = fptosi double %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = sitofp i64 %6 to double
ret double %7
}

LLVM IR (-O2):
define double @fifdint(double %0) {
%2 = fptosi double %0 to i64
%3 = sitofp i64 %2 to double
ret double %3
}
signed long long signedlonglong_ignoring_longlongint(signed long long x,
                                                     long long int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedlonglong_ignoring_longlongint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlonglong_ignoring_longlongint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlonglong_ignoring_longlongint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlonglong_ignoring_longlongint(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  char *x = "foobarbaz";
  printf("%s\n", x);
  return 42;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2a,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef2(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <printf@plt>
mov    $0x2a,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"foobarbaz\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %7)
ret i32 42
}

LLVM IR (-O2):
@.str = [10 x i8] c"foobarbaz\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 42
}
/* Variables and functions */
int exp(float);
double fBose(float e) { return 1. / (exp(e) - 1.); }


x86 assembly (clang, -O0):
<fBose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <exp@plt>
cvtsi2sd %eax,%xmm1
movsd  0xecd(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xec1(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fBose>:
push   %rax
call   1030 <exp@plt>
cvtsi2sd %eax,%xmm1
addsd  0xede(%rip),%xmm1
movsd  0xede(%rip),%xmm0
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @fBose(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @exp(float %3)
%5 = sitofp i32 %4 to double
%6 = fsub double %5, 1.000000e+00
%7 = fdiv double 1.000000e+00, %6
ret double %7
}

LLVM IR (-O2):
define double @fBose(float %0) {
%2 = tail call i32 @exp(float %0)
%3 = sitofp i32 %2 to double
%4 = fadd double %3, -1.000000e+00
%5 = fdiv double 1.000000e+00, %4
ret double %5
}
/* Type definitions */
struct stack_st_OPENSSL_STRING {
  int dummy;
};
typedef int /*<<< orphan*/ OPENSSL_STACK;

/* Variables and functions */
int OPENSSL_sk_is_sorted(int /*<<< orphan*/ const *);
int sk_OPENSSL_STRING_is_sorted(const struct stack_st_OPENSSL_STRING *sk) {
  return OPENSSL_sk_is_sorted((const OPENSSL_STACK *)sk);
}


x86 assembly (clang, -O0):
<sk_OPENSSL_STRING_is_sorted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <OPENSSL_sk_is_sorted@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_OPENSSL_STRING_is_sorted>:
jmp    1030 <OPENSSL_sk_is_sorted@plt>

LLVM IR (-O0):
%struct.stack_st_OPENSSL_STRING = type { i32 }
define i32 @sk_OPENSSL_STRING_is_sorted(%struct.stack_st_OPENSSL_STRING* %0) {
%2 = alloca %struct.stack_st_OPENSSL_STRING*
store %struct.stack_st_OPENSSL_STRING* %0, %struct.stack_st_OPENSSL_STRING** %2
%3 = load %struct.stack_st_OPENSSL_STRING*, %struct.stack_st_OPENSSL_STRING** %2
%4 = bitcast %struct.stack_st_OPENSSL_STRING* %3 to i32*
%5 = call i32 @OPENSSL_sk_is_sorted(i32* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.stack_st_OPENSSL_STRING = type { i32 }
define i32 @sk_OPENSSL_STRING_is_sorted(%struct.stack_st_OPENSSL_STRING* %0) {
%2 = getelementptr %struct.stack_st_OPENSSL_STRING, %struct.stack_st_OPENSSL_STRING* %0, i64 0, i32 0
%3 = tail call i32 @OPENSSL_sk_is_sorted(i32* %2)
ret i32 %3
}
/* Variables and functions */
int ipkg_op(int, char **);
int ipkg_main(int argc, char **argv) { return ipkg_op(argc, argv); }


x86 assembly (clang, -O0):
<ipkg_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <ipkg_op@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipkg_main>:
jmp    1030 <ipkg_op@plt>

LLVM IR (-O0):
define i32 @ipkg_main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @ipkg_op(i32 %5, i8** %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ipkg_main(i32 %0, i8** %1) {
%3 = tail call i32 @ipkg_op(i32 %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0x91() {
  Assert_real((isascii(145) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              730, ("isascii should be 0 for 0x91"));
}


x86 assembly (clang, -O0):
<t_isascii_0x91>:
push   %rbp
mov    %rsp,%rbp
mov    $0x91,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2da,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x91>:
push   %rax
mov    $0x91,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2da,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x91\00"
define void @t_isascii_0x91() {
%1 = call i64 @isascii(i32 145)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 730, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x91\00"
define void @t_isascii_0x91() {
%1 = tail call i64 @isascii(i32 145)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 730, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ CmdRdChk();
int /*<<< orphan*/ RegReadA(int, unsigned char *);
void AccWit(unsigned char UcTrgDat) {
  unsigned char UcFlgVal;
  UcFlgVal = 1;
  while (UcFlgVal) {
    RegReadA(0x0282, &UcFlgVal);
    UcFlgVal &= UcTrgDat;
    if (CmdRdChk() != 0)
      break;
  };
}


x86 assembly (clang, -O0):
<AccWit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movb   $0x1,-0x2(%rbp)
cmpb   $0x0,-0x2(%rbp)
je     1172 <AccWit+0x52>
mov    $0x282,%edi
lea    -0x2(%rbp),%rsi
call   1040 <RegReadA@plt>
movzbl -0x1(%rbp),%ecx
movzbl -0x2(%rbp),%eax
and    %ecx,%eax
mov    %al,-0x2(%rbp)
mov    $0x0,%al
call   1030 <CmdRdChk@plt>
cmp    $0x0,%rax
je     116d <AccWit+0x4d>
jmp    1172 <AccWit+0x52>
jmp    1132 <AccWit+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AccWit>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
movb   $0x1,0x7(%rsp)
lea    0x7(%rsp),%r14
mov    $0x282,%edi
mov    %r14,%rsi
call   1040 <RegReadA@plt>
and    %bl,0x7(%rsp)
xor    %eax,%eax
call   1030 <CmdRdChk@plt>
test   %rax,%rax
jne    1154 <AccWit+0x34>
cmpb   $0x0,0x7(%rsp)
jne    1130 <AccWit+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @AccWit(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
store i8 1, i8* %3
br label %4
4: ; preds = %18, %1
%5 = load i8, i8* %3
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = call i32 @RegReadA(i32 642, i8* %3)
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = and i32 %12, %10
%14 = trunc i32 %13 to i8
store i8 %14, i8* %3
%15 = call i64 (...) @CmdRdChk()
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %7
br label %19
18: ; preds = %7
br label %4
19: ; preds = %17, %4
ret void
}

LLVM IR (-O2):
define void @AccWit(i8 zeroext %0) {
%2 = alloca i8
store i8 1, i8* %2
br label %3
3: ; preds = %1, %3
%4 = call i32 @RegReadA(i32 642, i8* %2)
%5 = load i8, i8* %2
%6 = and i8 %5, %0
store i8 %6, i8* %2
%7 = call i64 (...) @CmdRdChk()
%8 = icmp eq i64 %7, 0
%9 = load i8, i8* %2
%10 = icmp ne i8 %9, 0
%11 = select i1 %8, i1 %10, i1 false
br i1 %11, label %3, label %12
12: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR5E_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR5E_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR5E_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR5E_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR5E_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int print_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(21, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<print_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x15,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_system>:
mov    $0x15,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @print_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 21, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @print_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 21, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int celcon_number_of_cells(int *length) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc(82, length, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_number_of_cells>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x52,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_number_of_cells>:
mov    %rdi,%rsi
mov    $0x52,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @celcon_number_of_cells(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc(i32 82, i32* %6, i32* %7, double* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @celcon_number_of_cells(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc(i32 82, i32* %0, i32* undef, double* undef)
ret i32 %2
}
void foo483(int p) {}


x86 assembly (clang, -O0):
<foo483>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo483>:
ret

LLVM IR (-O0):
define void @foo483(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo483(i32 %0) {
ret void
}
double Nm2Km(const double valueNm) { return valueNm * 1.852; }


x86 assembly (clang, -O0):
<Nm2Km>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Nm2Km>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Nm2Km(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.852000e+00
ret double %4
}

LLVM IR (-O2):
define double @Nm2Km(double %0) {
%2 = fmul double %0, 1.852000e+00
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int drawline(int x) {
  int i = 0;
  for (i = 0; i < x; i++)
    printf("x");
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<drawline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114f <drawline+0x3f>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <drawline+0x19>
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawline>:
push   %rbx
test   %edi,%edi
jle    112f <drawline+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x78,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <drawline+0x10>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"x\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @drawline(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @drawline(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @putchar(i32 120)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
%9 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int randomized_partition(int *, int, int);
void quick_sort(int *input, int start, int end) {
  if (start >= end) {
    return;
  }
  int pivot = randomized_partition(input, start, end);
  quick_sort(input, start, pivot - 1);
  quick_sort(input, pivot + 1, end);
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1143 <quick_sort+0x23>
jmp    1179 <quick_sort+0x59>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <randomized_partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <randomized_partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sge i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
br label %25
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @randomized_partition(i32* %13, i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = load i32, i32* %7
%20 = sub nsw i32 %19, 1
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
br label %25
25: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @randomized_partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Type definitions */
struct mdinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, long long);
int sysfs_set_str(struct mdinfo *, struct mdinfo *, char *, char *);
int sysfs_set_num_signed(struct mdinfo *sra, struct mdinfo *dev, char *name,
                         long long val) {
  char valstr[50];
  sprintf(valstr, "%lli", val);
  return sysfs_set_str(sra, dev, name, valstr);
}


x86 assembly (clang, -O0):
<sysfs_set_num_signed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    -0x60(%rbp),%rdi
mov    -0x20(%rbp),%rdx
lea    0xeb9(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    -0x60(%rbp),%rcx
call   1030 <sysfs_set_str@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_set_num_signed>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x38,%rsp
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0xec5(%rip),%rsi
mov    %rsp,%r12
mov    %r12,%rdi
mov    %rcx,%rdx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
mov    %r12,%rcx
call   1030 <sysfs_set_str@plt>
add    $0x38,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.mdinfo = type { i32 }
@.str = [5 x i8] c"%lli\00"
define i32 @sysfs_set_num_signed(%struct.mdinfo* %0, %struct.mdinfo* %1, i8* %2, i64 %3) {
%5 = alloca %struct.mdinfo*
%6 = alloca %struct.mdinfo*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca [50 x i8]
store %struct.mdinfo* %0, %struct.mdinfo** %5
store %struct.mdinfo* %1, %struct.mdinfo** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%10 = getelementptr inbounds [50 x i8], [50 x i8]* %9, i64 0, i64 0
%11 = load i64, i64* %8
%12 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %11)
%13 = load %struct.mdinfo*, %struct.mdinfo** %5
%14 = load %struct.mdinfo*, %struct.mdinfo** %6
%15 = load i8*, i8** %7
%16 = getelementptr inbounds [50 x i8], [50 x i8]* %9, i64 0, i64 0
%17 = call i32 @sysfs_set_str(%struct.mdinfo* %13, %struct.mdinfo* %14, i8* %15, i8* %16)
ret i32 %17
}

LLVM IR (-O2):
%struct.mdinfo = type { i32 }
@.str = [5 x i8] c"%lli\00"
define i32 @sysfs_set_num_signed(%struct.mdinfo* %0, %struct.mdinfo* %1, i8* %2, i64 %3) {
%5 = alloca [50 x i8]
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%7 = call i32 @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %3)
%8 = call i32 @sysfs_set_str(%struct.mdinfo* %0, %struct.mdinfo* %1, i8* %2, i8* %6)
ret i32 %8
}
/* Variables and functions */
double RAND_MAX;
double rand();
unsigned int_rand(int n) {
  return ((int)((1.0 * rand() / (RAND_MAX + 1.0)) * n));
}


x86 assembly (clang, -O0):
<int_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movaps %xmm0,%xmm1
movsd  0xed3(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xec7(%rip),%xmm1
mov    0x2ea8(%rip),%rax
addsd  (%rax),%xmm1
divsd  %xmm1,%xmm0
cvtsi2sdl -0x4(%rbp),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_rand>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
mov    0x2ec7(%rip),%rax
movsd  (%rax),%xmm1
addsd  0xed3(%rip),%xmm1
cvtsi2sd %ebx,%xmm2
divsd  %xmm1,%xmm0
mulsd  %xmm0,%xmm2
cvttsd2si %xmm2,%eax
pop    %rbx
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define i32 @int_rand(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call double (...) @rand()
%4 = fmul double 1.000000e+00, %3
%5 = load double, double* @RAND_MAX
%6 = fadd double %5, 1.000000e+00
%7 = fdiv double %4, %6
%8 = load i32, i32* %2
%9 = sitofp i32 %8 to double
%10 = fmul double %7, %9
%11 = fptosi double %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define i32 @int_rand(i32 %0) {
%2 = tail call double (...) @rand()
%3 = load double, double* @RAND_MAX
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double %2, %4
%6 = sitofp i32 %0 to double
%7 = fmul double %5, %6
%8 = fptosi double %7 to i32
ret i32 %8
}
double test3(double a) { return __builtin_copysign(a, 0.0); }


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movaps 0xeeb(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @test3(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.copysign.f64(double %3, double 0.000000e+00)
ret double %4
}

LLVM IR (-O2):
define double @test3(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
ret double %2
}
void foo182(int p) {}


x86 assembly (clang, -O0):
<foo182>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo182>:
ret

LLVM IR (-O0):
define void @foo182(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo182(i32 %0) {
ret void
}
void anetTcpNonBlockConnect(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               46, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<anetTcpNonBlockConnect>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x2e,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<anetTcpNonBlockConnect>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x2e,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.anetTcpNonBlockConnect = [23 x i8] c"anetTcpNonBlockConnect\00"
define void @anetTcpNonBlockConnect() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 46, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__func__.anetTcpNonBlockConnect, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.anetTcpNonBlockConnect = [23 x i8] c"anetTcpNonBlockConnect\00"
define void @anetTcpNonBlockConnect() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 46, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__func__.anetTcpNonBlockConnect, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ display();
int main() {
  display();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <display@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <display@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @display()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @display()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i;
  for (i = 0; i < 256; i++)
    printf("\n%d. %c", i, i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x100,-0x8(%rbp)
jge    1153 <main+0x43>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"\0A%d. %c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"\0A%d. %c\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}