xunge/DecIR huggingface dataset:
/* Variables and functions */
int cutils_fcmp_long_double_compare(long double, long double);
bool cutils_cdar_DynamicArray_long_double_compare(const void *p1,
                                                  const void *p2, size_t s) {
  return cutils_fcmp_long_double_compare(*(long double *)p1,
                                         *(long double *)p2);
}


x86 assembly (clang, -O0):
<cutils_cdar_DynamicArray_long_double_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    -0x10(%rbp),%rax
fldt   (%rax)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <cutils_fcmp_long_double_compare@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cutils_cdar_DynamicArray_long_double_compare>:
sub    $0x28,%rsp
fldt   (%rdi)
fldt   (%rsi)
fstpt  0x10(%rsp)
fstpt  (%rsp)
call   1030 <cutils_fcmp_long_double_compare@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @cutils_cdar_DynamicArray_long_double_compare(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to x86_fp80*
%9 = load x86_fp80, x86_fp80* %8
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to x86_fp80*
%12 = load x86_fp80, x86_fp80* %11
%13 = call i32 @cutils_fcmp_long_double_compare(x86_fp80 %9, x86_fp80 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @cutils_cdar_DynamicArray_long_double_compare(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = bitcast i8* %0 to x86_fp80*
%5 = load x86_fp80, x86_fp80* %4
%6 = bitcast i8* %1 to x86_fp80*
%7 = load x86_fp80, x86_fp80* %6
%8 = tail call i32 @cutils_fcmp_long_double_compare(x86_fp80 %5, x86_fp80 %7)
ret i32 %8
}
unsigned long djb2_hash(const char *str) {
  unsigned long hash;
  int c;
  hash = 5381;
  while ((c = (unsigned char)*str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<djb2_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <djb2_hash+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <djb2_hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<djb2_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <djb2_hash+0x2c>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movzbl %cl,%eax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <djb2_hash+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @djb2_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @djb2_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = zext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
int ghdl_main(int, char **);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  printf("ghdl_main: %d\n", ghdl_main(argc, argv));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <ghdl_main@plt>
mov    %eax,%esi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <ghdl_main@plt>
lea    0xed3(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"ghdl_main: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @ghdl_main(i32 %6, i8** %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"ghdl_main: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @ghdl_main(i32 %0, i8** %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ base_test();
int /*<<< orphan*/ greth_test(int);
int /*<<< orphan*/ report_end();
int /*<<< orphan*/ report_start();
int main(void) {
  report_start();
  base_test();
  greth_test(0x80000b00);
  greth_test(0x80000c00);
  report_end();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <report_start@plt>
mov    $0x0,%al
call   1050 <base_test@plt>
mov    $0x80000b00,%edi
call   1040 <greth_test@plt>
mov    $0x80000c00,%edi
call   1040 <greth_test@plt>
mov    $0x0,%al
call   1030 <report_end@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <report_start@plt>
xor    %eax,%eax
call   1050 <base_test@plt>
mov    $0x80000b00,%edi
call   1040 <greth_test@plt>
mov    $0x80000c00,%edi
call   1040 <greth_test@plt>
xor    %eax,%eax
call   1030 <report_end@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @report_start()
%2 = call i32 (...) @base_test()
%3 = call i32 @greth_test(i32 -2147480832)
%4 = call i32 @greth_test(i32 -2147480576)
%5 = call i32 (...) @report_end()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @report_start()
%2 = tail call i32 (...) @base_test()
%3 = tail call i32 @greth_test(i32 -2147480832)
%4 = tail call i32 @greth_test(i32 -2147480576)
%5 = tail call i32 (...) @report_end()
ret i32 0
}
long switch_prob(long x, long n) {
  long result = x;
  switch (n) {
  case 60:
  case 62:
    result = x * 8;
    break;
  case 63:
    result = x >> 3;
    break;
  case 64:
    x = x << 4 - x;
  case 65:
    x = x * x;
  default:
    result = x + 0x4B;
  }
  return result;
}


x86 assembly (clang, -O0):
<switch_prob>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffc4,%rax
mov    %rax,-0x20(%rbp)
sub    $0x5,%rax
ja     1181 <switch_prob+0x81>
mov    -0x20(%rbp),%rax
lea    0xecb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
mov    %rax,-0x18(%rbp)
jmp    118d <switch_prob+0x8d>
mov    -0x8(%rbp),%rax
sar    $0x3,%rax
mov    %rax,-0x18(%rbp)
jmp    118d <switch_prob+0x8d>
mov    -0x8(%rbp),%rax
mov    $0x4,%ecx
sub    -0x8(%rbp),%rcx
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4b,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_prob>:
mov    %rdi,%rax
add    $0xffffffffffffffc4,%rsi
cmp    $0x5,%rsi
ja     1132 <switch_prob+0x32>
lea    0xeec(%rip),%rcx
movslq (%rcx,%rsi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
shl    $0x3,%rax
ret
sar    $0x3,%rax
ret
mov    $0x4,%cl
sub    %al,%cl
shl    %cl,%rax
imul   %rax,%rax
add    $0x4b,%rax
ret

LLVM IR (-O0):
define i64 @switch_prob(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
store i64 %6, i64* %5
%7 = load i64, i64* %4
switch i64 %7, label %23 [
i64 60, label %8
i64 62, label %8
i64 63, label %11
i64 64, label %14
i64 65, label %19
]
8: ; preds = %2, %2
%9 = load i64, i64* %3
%10 = mul nsw i64 %9, 8
store i64 %10, i64* %5
br label %26
11: ; preds = %2
%12 = load i64, i64* %3
%13 = ashr i64 %12, 3
store i64 %13, i64* %5
br label %26
14: ; preds = %2
%15 = load i64, i64* %3
%16 = load i64, i64* %3
%17 = sub nsw i64 4, %16
%18 = shl i64 %15, %17
store i64 %18, i64* %3
br label %19
19: ; preds = %2, %14
%20 = load i64, i64* %3
%21 = load i64, i64* %3
%22 = mul nsw i64 %20, %21
store i64 %22, i64* %3
br label %23
23: ; preds = %2, %19
%24 = load i64, i64* %3
%25 = add nsw i64 %24, 75
store i64 %25, i64* %5
br label %26
26: ; preds = %23, %11, %8
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @switch_prob(i64 %0, i64 %1) {
switch i64 %1, label %13 [
i64 60, label %3
i64 62, label %3
i64 63, label %5
i64 64, label %7
i64 65, label %10
]
3: ; preds = %2, %2
%4 = shl nsw i64 %0, 3
br label %16
5: ; preds = %2
%6 = ashr i64 %0, 3
br label %16
7: ; preds = %2
%8 = sub nsw i64 4, %0
%9 = shl i64 %0, %8
br label %10
10: ; preds = %2, %7
%11 = phi i64 [ %0, %2 ], [ %9, %7 ]
%12 = mul nsw i64 %11, %11
br label %13
13: ; preds = %2, %10
%14 = phi i64 [ %0, %2 ], [ %12, %10 ]
%15 = add nsw i64 %14, 75
br label %16
16: ; preds = %13, %5, %3
%17 = phi i64 [ %15, %13 ], [ %6, %5 ], [ %4, %3 ]
ret i64 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_getpwuid_free() {
  printf("NOT IMPLEMENTED:"
         "pa_getpwuid_free"
         "\n");
}


x86 assembly (clang, -O0):
<pa_getpwuid_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_getpwuid_free>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_getpwuid_free\0A\00"
define i32 @pa_getpwuid_free() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_getpwuid_free\00"
define i32 @pa_getpwuid_free() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void write16(uint8_t *p, uint16_t value) {
  p[0] = value;
  p[1] = value >> 8;
}


x86 assembly (clang, -O0):
<write16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write16>:
mov    %esi,(%rdi)
sar    $0x8,%esi
mov    %esi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @write16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load i32, i32* %4
%9 = ashr i32 %8, 8
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 1
store i32 %9, i32* %11
ret void
}

LLVM IR (-O2):
define void @write16(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
%3 = ashr i32 %1, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %3, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ brc(int, char);
int /*<<< orphan*/ extra_padding(int);
void su(int pn) {
  brc(pn, 'S');
  extra_padding(5);
}


x86 assembly (clang, -O0):
<su>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x53,%esi
call   1040 <brc@plt>
mov    $0x5,%edi
call   1030 <extra_padding@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<su>:
push   %rax
mov    $0x53,%esi
call   1040 <brc@plt>
mov    $0x5,%edi
pop    %rax
jmp    1030 <extra_padding@plt>

LLVM IR (-O0):
define void @su(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @brc(i32 %3, i8 signext 83)
%5 = call i32 @extra_padding(i32 5)
ret void
}

LLVM IR (-O2):
define void @su(i32 %0) {
%2 = tail call i32 @brc(i32 %0, i8 signext 83)
%3 = tail call i32 @extra_padding(i32 5)
ret void
}
void gdc_exec_server() {
  unsigned int *syscall_bc = (unsigned int *)0x8c0000bc;
  int (*syscall)() = (int (*)())(*syscall_bc);
  syscall((0), (0), 0, (2));
  ;
}


x86 assembly (clang, -O0):
<gdc_exec_server>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x8c0000bc,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %rax,-0x10(%rbp)
xor    %edx,%edx
mov    $0x2,%ecx
mov    %edx,%edi
mov    %edx,%esi
mov    $0x0,%al
call   *-0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdc_exec_server>:
mov    $0x8c0000bc,%eax
mov    (%rax),%r8d
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
mov    $0x2,%ecx
xor    %eax,%eax
jmp    *%r8

LLVM IR (-O0):
define void @gdc_exec_server() {
%1 = alloca i32*
%2 = alloca i32 (...)*
store i32* inttoptr (i64 2348810428 to i32*), i32** %1
%3 = load i32*, i32** %1
%4 = load i32, i32* %3
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32 (...)*
store i32 (...)* %6, i32 (...)** %2
%7 = load i32 (...)*, i32 (...)** %2
%8 = bitcast i32 (...)* %7 to i32 (i32, i32, i32, i32, ...)*
%9 = call i32 (i32, i32, i32, i32, ...) %8(i32 0, i32 0, i32 0, i32 2)
ret void
}

LLVM IR (-O2):
define void @gdc_exec_server() {
%1 = load i32, i32* inttoptr (i64 2348810428 to i32*)
%2 = zext i32 %1 to i64
%3 = inttoptr i64 %2 to i32 (i32, i32, i32, i32, ...)*
%4 = tail call i32 (i32, i32, i32, i32, ...) %3(i32 0, i32 0, i32 0, i32 2)
ret void
}
/* Type definitions */
struct value {
  int dummy;
};
struct key {
  int dummy;
};
struct hashtable {
  int dummy;
};

/* Variables and functions */
int hashtable_insert(struct hashtable *, struct key *, struct value *);
int insert_some(struct hashtable *h, struct key *k, struct value *v) {
  return hashtable_insert(h, k, v);
}


x86 assembly (clang, -O0):
<insert_some>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <hashtable_insert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_some>:
jmp    1030 <hashtable_insert@plt>

LLVM IR (-O0):
%struct.hashtable = type { i32 }
%struct.key = type { i32 }
%struct.value = type { i32 }
define i32 @insert_some(%struct.hashtable* %0, %struct.key* %1, %struct.value* %2) {
%4 = alloca %struct.hashtable*
%5 = alloca %struct.key*
%6 = alloca %struct.value*
store %struct.hashtable* %0, %struct.hashtable** %4
store %struct.key* %1, %struct.key** %5
store %struct.value* %2, %struct.value** %6
%7 = load %struct.hashtable*, %struct.hashtable** %4
%8 = load %struct.key*, %struct.key** %5
%9 = load %struct.value*, %struct.value** %6
%10 = call i32 @hashtable_insert(%struct.hashtable* %7, %struct.key* %8, %struct.value* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.hashtable = type { i32 }
%struct.key = type { i32 }
%struct.value = type { i32 }
define i32 @insert_some(%struct.hashtable* %0, %struct.key* %1, %struct.value* %2) {
%4 = tail call i32 @hashtable_insert(%struct.hashtable* %0, %struct.key* %1, %struct.value* %2)
ret i32 %4
}
/* Variables and functions */
void *ft_memset(void *s, int c, size_t n) {
  unsigned char *str;
  str = (unsigned char *)s;
  while (n--)
    *str++ = (unsigned char)c;
  return (s);
}


x86 assembly (clang, -O0):
<ft_memset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     114b <ft_memset+0x4b>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
jmp    1117 <ft_memset+0x17>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_memset>:
push   %rbx
mov    %rdi,%rbx
test   %rdx,%rdx
je     1121 <ft_memset+0x11>
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ft_memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %13, %3
%10 = load i64, i64* %6
%11 = add i64 %10, -1
store i64 %11, i64* %6
%12 = icmp ne i64 %10, 0
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i32, i32* %5
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %7
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %7
store i8 %15, i8* %16
br label %9
18: ; preds = %9
%19 = load i8*, i8** %4
ret i8* %19
}

LLVM IR (-O2):
define i8* @ft_memset(i8* returned writeonly %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
br label %7
7: ; preds = %5, %3
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ arr;

/* Variables and functions */
int /*<<< orphan*/ printArray(int *, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ quickSort(int *, int /*<<< orphan*/, int);
int main() {
  int arr[] = {10, 8, 9, 1, 5};
  int n = sizeof(arr) / sizeof(arr[0]);
  quickSort(arr, 0, n - 1);
  printf("Sorted array: n");
  printArray(arr, n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeba(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeb7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xeb5(%rip),%eax
mov    %eax,-0x10(%rbp)
movl   $0x5,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1040 <quickSort@plt>
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1050 <printArray@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xed5(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xeba(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <quickSort@plt>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1050 <printArray@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.arr = [5 x i32] [i32 10, i32 8, i32 9, i32 1, i32 5]
@.str = [16 x i8] c"Sorted array: n\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [5 x i32]* %2 to i8*
store i32 5, i32* %3
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = sub nsw i32 %6, 1
%8 = call i32 @quickSort(i32* %5, i32 0, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%11 = load i32, i32* %3
%12 = call i32 @printArray(i32* %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [5 x i32] [i32 10, i32 8, i32 9, i32 1, i32 5]
@.str = [16 x i8] c"Sorted array: n\00"
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @quickSort(i32* %3, i32 0, i32 4)
%5 = call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @printArray(i32* %3, i32 5)
ret i32 0
}
signed char implicitcast_1(unsigned int x) { return x; }


x86 assembly (clang, -O0):
<implicitcast_1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<implicitcast_1>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @implicitcast_1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @implicitcast_1(i32 %0) {
%2 = trunc i32 %0 to i8
ret i8 %2
}
unsigned long ieee_fpcr_to_swcr(unsigned long fp) {
  unsigned long sw;
  sw = (fp >> 35) & ((1UL << 17) | (1UL << 18) | (1UL << 19) | (1UL << 20) |
                     (1UL << 21) | (1UL << 22));
  sw |= (fp >> 36) & (1UL << 12);
  sw |= (~fp >> 48) & ((1UL << 1) | (1UL << 2) | (1UL << 3));
  sw |= (~fp >> 57) & ((1UL << 4) | (1UL << 5));
  sw |= (fp >> 47) & (1UL << 13);
  sw |= (~fp >> 41) & (1UL << 6);
  return sw;
}


x86 assembly (clang, -O0):
<ieee_fpcr_to_swcr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x23,%rax
and    $0x7e0000,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x24,%rax
and    $0x1000,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
shr    $0x30,%rax
and    $0xe,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
shr    $0x39,%rax
and    $0x30,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2f,%rax
and    $0x2000,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
shr    $0x29,%rax
and    $0x40,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee_fpcr_to_swcr>:
mov    %rdi,%rax
shr    $0x23,%rax
and    $0x7e0000,%eax
mov    %rdi,%rcx
shr    $0x24,%rcx
and    $0x1000,%ecx
or     %rax,%rcx
mov    %rdi,%rax
not    %rax
mov    %rax,%rdx
shr    $0x30,%rdx
and    $0xe,%edx
or     %rcx,%rdx
mov    %rax,%rcx
shr    $0x39,%rcx
and    $0x30,%ecx
or     %rdx,%rcx
shr    $0x2f,%rdi
and    $0x2000,%edi
or     %rdi,%rcx
shr    $0x29,%rax
and    $0x40,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @ieee_fpcr_to_swcr(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = lshr i64 %4, 35
%6 = and i64 %5, 8257536
store i64 %6, i64* %3
%7 = load i64, i64* %2
%8 = lshr i64 %7, 36
%9 = and i64 %8, 4096
%10 = load i64, i64* %3
%11 = or i64 %10, %9
store i64 %11, i64* %3
%12 = load i64, i64* %2
%13 = xor i64 %12, -1
%14 = lshr i64 %13, 48
%15 = and i64 %14, 14
%16 = load i64, i64* %3
%17 = or i64 %16, %15
store i64 %17, i64* %3
%18 = load i64, i64* %2
%19 = xor i64 %18, -1
%20 = lshr i64 %19, 57
%21 = and i64 %20, 48
%22 = load i64, i64* %3
%23 = or i64 %22, %21
store i64 %23, i64* %3
%24 = load i64, i64* %2
%25 = lshr i64 %24, 47
%26 = and i64 %25, 8192
%27 = load i64, i64* %3
%28 = or i64 %27, %26
store i64 %28, i64* %3
%29 = load i64, i64* %2
%30 = xor i64 %29, -1
%31 = lshr i64 %30, 41
%32 = and i64 %31, 64
%33 = load i64, i64* %3
%34 = or i64 %33, %32
store i64 %34, i64* %3
%35 = load i64, i64* %3
ret i64 %35
}

LLVM IR (-O2):
define i64 @ieee_fpcr_to_swcr(i64 %0) {
%2 = lshr i64 %0, 35
%3 = and i64 %2, 8257536
%4 = lshr i64 %0, 36
%5 = and i64 %4, 4096
%6 = or i64 %3, %5
%7 = xor i64 %0, -1
%8 = lshr i64 %7, 48
%9 = and i64 %8, 14
%10 = or i64 %6, %9
%11 = lshr i64 %7, 57
%12 = and i64 %11, 48
%13 = or i64 %10, %12
%14 = lshr i64 %0, 47
%15 = and i64 %14, 8192
%16 = or i64 %13, %15
%17 = lshr i64 %7, 41
%18 = and i64 %17, 64
%19 = or i64 %16, %18
ret i64 %19
}
/* Variables and functions */
scalar_t__ drand(double, double);
scalar_t__ log(scalar_t__);
double exponential_dist(double mean) {
  return -mean * (double)log(1.0 - drand(0.0, 1.0));
}


x86 assembly (clang, -O0):
<exponential_dist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  0xea7(%rip),%xmm1
call   1030 <drand@plt>
cvtsi2sd %rax,%xmm1
movsd  0xe95(%rip),%xmm0
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1040 <log@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sd %rax,%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exponential_dist>:
sub    $0x18,%rsp
xorps  0xed5(%rip),%xmm0
movaps %xmm0,(%rsp)
movsd  0xed9(%rip),%xmm1
xorps  %xmm0,%xmm0
call   1030 <drand@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
movsd  0xec1(%rip),%xmm1
subsd  %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
call   1040 <log@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
mulsd  (%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @exponential_dist(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fneg double %3
%5 = call i64 @drand(double 0.000000e+00, double 1.000000e+00)
%6 = sitofp i64 %5 to double
%7 = fsub double 1.000000e+00, %6
%8 = fptosi double %7 to i64
%9 = call i64 @log(i64 %8)
%10 = sitofp i64 %9 to double
%11 = fmul double %4, %10
ret double %11
}

LLVM IR (-O2):
define double @exponential_dist(double %0) {
%2 = fneg double %0
%3 = tail call i64 @drand(double 0.000000e+00, double 1.000000e+00)
%4 = sitofp i64 %3 to double
%5 = fsub double 1.000000e+00, %4
%6 = fptosi double %5 to i64
%7 = tail call i64 @log(i64 %6)
%8 = sitofp i64 %7 to double
%9 = fmul double %2, %8
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ put8(unsigned char);
void shrd_reg32_reg32_imm8(unsigned long reg1, unsigned long reg2,
                           unsigned char imm8) {
  put8(0x0F);
  put8(0xAC);
  put8(0xC0 | (reg2 << 3) | reg1);
  put8(imm8);
}


x86 assembly (clang, -O0):
<shrd_reg32_reg32_imm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xac,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
or     $0xc0,%rax
or     -0x8(%rbp),%rax
movzbl %al,%edi
call   1030 <put8@plt>
movzbl -0x11(%rbp),%edi
call   1030 <put8@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shrd_reg32_reg32_imm8>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xac,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %ebx,%ebp
or     $0xc0,%bpl
movzbl %bpl,%edi
call   1030 <put8@plt>
mov    %r14d,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @shrd_reg32_reg32_imm8(i64 %0, i64 %1, i8 zeroext %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8 %2, i8* %6
%7 = call i32 @put8(i8 zeroext 15)
%8 = call i32 @put8(i8 zeroext -84)
%9 = load i64, i64* %5
%10 = shl i64 %9, 3
%11 = or i64 192, %10
%12 = load i64, i64* %4
%13 = or i64 %11, %12
%14 = trunc i64 %13 to i8
%15 = call i32 @put8(i8 zeroext %14)
%16 = load i8, i8* %6
%17 = call i32 @put8(i8 zeroext %16)
ret void
}

LLVM IR (-O2):
define void @shrd_reg32_reg32_imm8(i64 %0, i64 %1, i8 zeroext %2) {
%4 = tail call i32 @put8(i8 zeroext 15)
%5 = tail call i32 @put8(i8 zeroext -84)
%6 = shl i64 %1, 3
%7 = or i64 %6, %0
%8 = trunc i64 %7 to i8
%9 = or i8 %8, -64
%10 = tail call i32 @put8(i8 zeroext %9)
%11 = tail call i32 @put8(i8 zeroext %2)
ret void
}
long USTAT(dev, buf)
long *dev, *buf;
{ return ((long)ustat(*dev, buf)); }


x86 assembly (clang, -O0):
<USTAT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <ustat@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USTAT>:
push   %rax
mov    (%rdi),%rdi
xor    %eax,%eax
call   1030 <ustat@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @USTAT(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %3
%6 = load i64, i64* %5
%7 = load i64*, i64** %4
%8 = call i32 (i64, i64*, ...) bitcast (i32 (...)* @ustat to i32 (i64, i64*, ...)*)(i64 %6, i64* %7)
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @USTAT(i64* nocapture %0, i64* %1) {
%3 = load i64, i64* %0
%4 = tail call i32 (i64, i64*, ...) bitcast (i32 (...)* @ustat to i32 (i64, i64*, ...)*)(i64 %3, i64* %1)
%5 = sext i32 %4 to i64
ret i64 %5
}
unsigned int fn4(unsigned int x) { return x | ~x; }


x86 assembly (clang, -O0):
<fn4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn4>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fn4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = xor i32 %4, -1
%6 = or i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @fn4(i32 %0) {
ret i32 -1
}
/* Variables and functions */
scalar_t__ testB(char);
int skipspace(void) {
  int any = 0;
  while (testB(' ') || testB('\t'))
    any = 1;
  return any;
}


x86 assembly (clang, -O0):
<skipspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x20,%edi
call   1030 <testB@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    114f <skipspace+0x3f>
mov    $0x9,%edi
call   1030 <testB@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    115f <skipspace+0x4f>
jmp    116b <skipspace+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    111f <skipspace+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipspace>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ebp,%ebx
mov    $0x20,%edi
call   1030 <testB@plt>
mov    $0x1,%ebp
test   %rax,%rax
jne    1120 <skipspace+0x10>
mov    $0x9,%edi
call   1030 <testB@plt>
test   %rax,%rax
jne    1120 <skipspace+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @skipspace() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %10, %0
%3 = call i64 @testB(i8 signext 32)
%4 = icmp ne i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = call i64 @testB(i8 signext 9)
%7 = icmp ne i64 %6, 0
br label %8
8: ; preds = %5, %2
%9 = phi i1 [ true, %2 ], [ %7, %5 ]
br i1 %9, label %10, label %11
10: ; preds = %8
store i32 1, i32* %1
br label %2
11: ; preds = %8
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @skipspace() {
br label %1
1: ; preds = %5, %0
%2 = phi i32 [ 0, %0 ], [ 1, %5 ]
%3 = tail call i64 @testB(i8 signext 32)
%4 = icmp eq i64 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %1, %6
br label %1
6: ; preds = %1
%7 = tail call i64 @testB(i8 signext 9)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %5
9: ; preds = %6
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ cleanleave();
int /*<<< orphan*/ slog(char *);
void sighandle(int signal) {
  slog("\nSignal received, freeing buffer memory.");
  cleanleave();
}


x86 assembly (clang, -O0):
<sighandle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <slog@plt>
mov    $0x0,%al
call   1030 <cleanleave@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandle>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <slog@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <cleanleave@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"\0ASignal received, freeing buffer memory.\00"
define void @sighandle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @slog(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @cleanleave()
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"\0ASignal received, freeing buffer memory.\00"
define void @sighandle(i32 %0) {
%2 = tail call i32 @slog(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @cleanleave()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "Usage: m4 [-Dname[=val]] [-Uname]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [35 x i8] c"Usage: m4 [-Dname[=val]] [-Uname]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [35 x i8] c"Usage: m4 [-Dname[=val]] [-Uname]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int smallest(int num1, int num2, int num3) {
  if (num1 < num2) {
    if (num1 < num3) {
      return num1;
    } else {
      return num3;
    }
  }
  if (num2 < num3)
    return num2;
  return num3;
}


x86 assembly (clang, -O0):
<smallest>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113b <smallest+0x3b>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1130 <smallest+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <smallest+0x58>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <smallest+0x58>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1152 <smallest+0x52>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <smallest+0x58>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smallest>:
mov    %edx,%eax
cmp    %edx,%edi
cmovl  %edi,%eax
cmp    %esi,%eax
cmovge %esi,%eax
ret

LLVM IR (-O0):
define i32 @smallest(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %27
17: ; preds = %11
%18 = load i32, i32* %7
store i32 %18, i32* %4
br label %27
19: ; preds = %3
%20 = load i32, i32* %6
%21 = load i32, i32* %7
%22 = icmp slt i32 %20, %21
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = load i32, i32* %6
store i32 %24, i32* %4
br label %27
25: ; preds = %19
%26 = load i32, i32* %7
store i32 %26, i32* %4
br label %27
27: ; preds = %25, %23, %17, %15
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @smallest(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %2
%5 = select i1 %4, i32 %0, i32 %2
%6 = icmp slt i32 %5, %1
%7 = select i1 %6, i32 %5, i32 %1
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
uintptr_t tag_arrptr(void *ptr, int elem_size_lg2) {
  assert(elem_size_lg2 <= 4);
  return (uintptr_t)ptr | elem_size_lg2;
}


x86 assembly (clang, -O0):
<tag_arrptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
or     %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tag_arrptr>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x5,%esi
setl   %dil
call   1030 <assert@plt>
movslq %ebx,%rax
or     %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @tag_arrptr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sle i32 %5, 4
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %3
%10 = ptrtoint i8* %9 to i64
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = or i64 %10, %12
ret i64 %13
}

LLVM IR (-O2):
define i64 @tag_arrptr(i8* %0, i32 %1) {
%3 = icmp slt i32 %1, 5
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = ptrtoint i8* %0 to i64
%7 = sext i32 %1 to i64
%8 = or i64 %7, %6
ret i64 %8
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ printf(char *, long, int);
main() {
  int c;
  long nc = 0;
  while ((c = getchar()) != EOF) {
    ++nc;
    printf("%ld : %c\n", nc, c);
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2ea0(%rip),%rcx
cmp    (%rcx),%eax
je     1174 <main+0x54>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edx
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
jmp    1137 <main+0x17>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb5(%rip),%r15
cmp    (%r15),%eax
je     116d <main+0x4d>
mov    $0x1,%ebx
lea    0xebc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
add    $0x1,%rbx
cmp    (%r15),%eax
jne    1150 <main+0x30>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@EOF = global i32 0
@.str = [10 x i8] c"%ld : %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %3
br label %4
4: ; preds = %8, %0
%5 = call i32 (...) @getchar()
store i32 %5, i32* %2
%6 = load i32, i32* @EOF
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i64, i64* %3
%10 = add nsw i64 %9, 1
store i64 %10, i64* %3
%11 = load i64, i64* %3
%12 = load i32, i32* %2
%13 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %11, i32 %12)
br label %4
14: ; preds = %4
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
@EOF = global i32 0
@.str = [10 x i8] c"%ld : %c\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %12, label %4
4: ; preds = %0, %4
%5 = phi i32 [ %9, %4 ], [ %1, %0 ]
%6 = phi i64 [ %7, %4 ], [ 0, %0 ]
%7 = add nuw nsw i64 %6, 1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %7, i32 %5)
%9 = tail call i32 (...) @getchar()
%10 = load i32, i32* @EOF
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %4
12: ; preds = %4, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void svd_beep(void) {
  fputc('\a', stderr);
  fflush(stderr);
}


x86 assembly (clang, -O0):
<svd_beep>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
mov    $0x7,%edi
call   1030 <fputc@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<svd_beep>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%esi
mov    $0x7,%edi
call   1030 <fputc@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @svd_beep() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputc(i8 signext 7, i32 %1)
%3 = load i32, i32* @stderr
%4 = call i32 @fflush(i32 %3)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @svd_beep() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputc(i8 signext 7, i32 %1)
%3 = load i32, i32* @stderr
%4 = tail call i32 @fflush(i32 %3)
ret void
}
unsigned long hash2(const char *str) {
  unsigned long hash = 0;
  while (*str != '\0') {
    hash = (hash << 4) + *(str++);
    unsigned long g = hash & 0xF0000000L;
    if (g != 0)
      hash ^= g >> 24;
    hash &= ~g;
  }
  return hash;
}


x86 assembly (clang, -O0):
<hash2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1184 <hash2+0x84>
mov    -0x10(%rbp),%rax
shl    $0x4,%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbq (%rcx),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
movabs $0xf0000000,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     116f <hash2+0x6f>
mov    -0x18(%rbp),%rax
shr    $0x18,%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hash2+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash2>:
mov    (%rdi),%cl
test   %cl,%cl
je     113e <hash2+0x3e>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
shl    $0x4,%rax
movsbq %cl,%rcx
add    %rax,%rcx
mov    %ecx,%eax
and    $0xf0000000,%eax
mov    %rax,%rdx
shr    $0x18,%rdx
xor    %rcx,%rdx
not    %rax
and    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash2+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hash2(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %5
5: ; preds = %27, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %32
10: ; preds = %5
%11 = load i64, i64* %3
%12 = shl i64 %11, 4
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
%15 = load i8, i8* %13
%16 = sext i8 %15 to i64
%17 = add i64 %12, %16
store i64 %17, i64* %3
%18 = load i64, i64* %3
%19 = and i64 %18, 4026531840
store i64 %19, i64* %4
%20 = load i64, i64* %4
%21 = icmp ne i64 %20, 0
br i1 %21, label %22, label %27
22: ; preds = %10
%23 = load i64, i64* %4
%24 = lshr i64 %23, 24
%25 = load i64, i64* %3
%26 = xor i64 %25, %24
store i64 %26, i64* %3
br label %27
27: ; preds = %22, %10
%28 = load i64, i64* %4
%29 = xor i64 %28, -1
%30 = load i64, i64* %3
%31 = and i64 %30, %29
store i64 %31, i64* %3
br label %5
32: ; preds = %5
%33 = load i64, i64* %3
ret i64 %33
}

LLVM IR (-O2):
define i64 @hash2(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %17, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = phi i64 [ %16, %4 ], [ 0, %1 ]
%8 = shl i64 %7, 4
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = sext i8 %5 to i64
%11 = add i64 %8, %10
%12 = and i64 %11, 4026531840
%13 = lshr exact i64 %12, 24
%14 = xor i64 %13, %11
%15 = xor i64 %12, -1
%16 = and i64 %14, %15
%17 = load i8, i8* %9
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %4
19: ; preds = %4, %1
%20 = phi i64 [ 0, %1 ], [ %16, %4 ]
ret i64 %20
}
char *itoa(char *p, unsigned x) {
  p += 3 * sizeof(int);
  *--p = 0;
  do {
    *--p = '0' + x % 10;
    x /= 10;
  } while (x);
  return p;
}


x86 assembly (clang, -O0):
<itoa>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0xc,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x0,-0x1(%rax)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
add    $0x30,%edx
mov    %dl,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,-0x1(%rax)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    112a <itoa+0x2a>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa>:
mov    %rdi,%rax
movb   $0x0,0xb(%rdi)
add    $0xb,%rax
mov    $0xcccccccd,%r8d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %esi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%edi
lea    (%rdi,%rdi,4),%edi
mov    %esi,%ecx
sub    %edi,%ecx
or     $0x30,%cl
mov    %cl,-0x1(%rax)
add    $0xffffffffffffffff,%rax
cmp    $0x9,%esi
mov    %edx,%esi
ja     1120 <itoa+0x20>
ret

LLVM IR (-O0):
define i8* @itoa(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 12
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 -1
store i8* %8, i8** %3
store i8 0, i8* %8
br label %9
9: ; preds = %18, %2
%10 = load i32, i32* %4
%11 = urem i32 %10, 10
%12 = add i32 48, %11
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 -1
store i8* %15, i8** %3
store i8 %13, i8* %15
%16 = load i32, i32* %4
%17 = udiv i32 %16, 10
store i32 %17, i32* %4
br label %18
18: ; preds = %9
%19 = load i32, i32* %4
%20 = icmp ne i32 %19, 0
br i1 %20, label %9, label %21
21: ; preds = %18
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @itoa(i8* writeonly %0, i32 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 11
store i8 0, i8* %3
br label %4
4: ; preds = %4, %2
%5 = phi i8* [ %3, %2 ], [ %10, %4 ]
%6 = phi i32 [ %1, %2 ], [ %11, %4 ]
%7 = urem i32 %6, 10
%8 = trunc i32 %7 to i8
%9 = or i8 %8, 48
%10 = getelementptr inbounds i8, i8* %5, i64 -1
store i8 %9, i8* %10
%11 = udiv i32 %6, 10
%12 = icmp ult i32 %6, 10
br i1 %12, label %13, label %4
13: ; preds = %4
ret i8* %10
}
/* Variables and functions */
scalar_t__ is_LWS(unsigned char);
const char *skip_LWS(const char *p) {
  while (*p != '\0' && is_LWS((unsigned char)*p))
    p++;
  return p;
}


x86 assembly (clang, -O0):
<skip_LWS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1147 <skip_LWS+0x37>
mov    -0x8(%rbp),%rax
movzbl (%rax),%edi
call   1030 <is_LWS@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1157 <skip_LWS+0x47>
jmp    1168 <skip_LWS+0x58>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_LWS+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_LWS>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1139 <skip_LWS+0x29>
nopw   0x0(%rax,%rax,1)
movzbl %al,%edi
call   1030 <is_LWS@plt>
test   %rax,%rax
je     1139 <skip_LWS+0x29>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <skip_LWS+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_LWS(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %15, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i64 @is_LWS(i8 zeroext %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %3
18: ; preds = %13
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @skip_LWS(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8 [ %11, %9 ], [ %2, %1 ]
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = tail call i64 @is_LWS(i8 zeroext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %4 ]
ret i8* %14
}