int hammingDistance(unsigned int recordVal[256], unsigned int queryVal[256]) {
  int hDist = 0;
  for (int i = 0x00000001; i < 256; i++) {
    int xRes = recordVal[i] ^ queryVal[i];
    for (int j = 0x00000000; j < 0x00000020; j++) {
      hDist += xRes & 0x00000001;
      xRes >>= 1;
    }
  }
  return hDist;
}


x86 assembly (clang, -O0):
<hammingDistance>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
cmpl   $0x100,-0x18(%rbp)
jge    1187 <hammingDistance+0x87>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
xor    (%rcx,%rdx,4),%eax
mov    %eax,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x20,-0x20(%rbp)
jge    1174 <hammingDistance+0x74>
mov    -0x1c(%rbp),%eax
and    $0x1,%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x1c(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1147 <hammingDistance+0x47>
jmp    1179 <hammingDistance+0x79>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111a <hammingDistance+0x1a>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hammingDistance>:
pxor   %xmm3,%xmm3
mov    $0x5,%eax
movdqa 0xeee(%rip),%xmm8
pxor   %xmm4,%xmm4
cs nopw 0x0(%rax,%rax,1)
movdqu -0x10(%rdi,%rax,4),%xmm1
movdqu (%rdi,%rax,4),%xmm5
movdqu -0x10(%rsi,%rax,4),%xmm2
pxor   %xmm1,%xmm2
movdqu (%rsi,%rax,4),%xmm9
pxor   %xmm5,%xmm9
movdqa %xmm2,%xmm6
pand   %xmm8,%xmm6
paddd  %xmm3,%xmm6
movdqa %xmm9,%xmm3
pand   %xmm8,%xmm3
paddd  %xmm4,%xmm3
movdqa %xmm2,%xmm7
psrld  $0x1,%xmm7
movdqa %xmm9,%xmm5
psrld  $0x1,%xmm5
pand   %xmm8,%xmm7
paddd  %xmm6,%xmm7
pand   %xmm8,%xmm5
paddd  %xmm3,%xmm5
movdqa %xmm2,%xmm6
psrld  $0x2,%xmm6
movdqa %xmm9,%xmm1
psrld  $0x2,%xmm1
pand   %xmm8,%xmm6
pand   %xmm8,%xmm1
movdqa %xmm2,%xmm4
psrld  $0x3,%xmm4
movdqa %xmm9,%xmm3
psrld  $0x3,%xmm3
pand   %xmm8,%xmm4
paddd  %xmm6,%xmm4
paddd  %xmm7,%xmm4
pand   %xmm8,%xmm3
paddd  %xmm1,%xmm3
paddd  %xmm5,%xmm3
movdqa %xmm2,%xmm1
psrld  $0x4,%xmm1
movdqa %xmm9,%xmm5
psrld  $0x4,%xmm5
pand   %xmm8,%xmm1
pand   %xmm8,%xmm5
movdqa %xmm2,%xmm7
psrld  $0x5,%xmm7
movdqa %xmm9,%xmm0
psrld  $0x5,%xmm0
pand   %xmm8,%xmm7
paddd  %xmm1,%xmm7
pand   %xmm8,%xmm0
paddd  %xmm5,%xmm0
movdqa %xmm2,%xmm6
psrld  $0x6,%xmm6
movdqa %xmm9,%xmm5
psrld  $0x6,%xmm5
pand   %xmm8,%xmm6
paddd  %xmm7,%xmm6
paddd  %xmm4,%xmm6
pand   %xmm8,%xmm5
paddd  %xmm0,%xmm5
paddd  %xmm3,%xmm5
movdqa %xmm2,%xmm0
psrld  $0x7,%xmm0
movdqa %xmm9,%xmm1
psrld  $0x7,%xmm1
pand   %xmm8,%xmm0
pand   %xmm8,%xmm1
movdqa %xmm2,%xmm3
psrld  $0x8,%xmm3
movdqa %xmm9,%xmm4
psrld  $0x8,%xmm4
pand   %xmm8,%xmm3
paddd  %xmm0,%xmm3
pand   %xmm8,%xmm4
paddd  %xmm1,%xmm4
movdqa %xmm2,%xmm0
psrld  $0x9,%xmm0
movdqa %xmm9,%xmm1
psrld  $0x9,%xmm1
pand   %xmm8,%xmm0
paddd  %xmm3,%xmm0
pand   %xmm8,%xmm1
paddd  %xmm4,%xmm1
movdqa %xmm2,%xmm4
psrld  $0xa,%xmm4
movdqa %xmm9,%xmm3
psrld  $0xa,%xmm3
pand   %xmm8,%xmm4
paddd  %xmm0,%xmm4
paddd  %xmm6,%xmm4
pand   %xmm8,%xmm3
paddd  %xmm1,%xmm3
paddd  %xmm5,%xmm3
movdqa %xmm2,%xmm0
psrld  $0xb,%xmm0
movdqa %xmm9,%xmm1
psrld  $0xb,%xmm1
pand   %xmm8,%xmm0
pand   %xmm8,%xmm1
movdqa %xmm2,%xmm5
psrld  $0xc,%xmm5
movdqa %xmm9,%xmm6
psrld  $0xc,%xmm6
pand   %xmm8,%xmm5
paddd  %xmm0,%xmm5
pand   %xmm8,%xmm6
paddd  %xmm1,%xmm6
movdqa %xmm2,%xmm0
psrld  $0xd,%xmm0
movdqa %xmm9,%xmm1
psrld  $0xd,%xmm1
pand   %xmm8,%xmm0
paddd  %xmm5,%xmm0
pand   %xmm8,%xmm1
paddd  %xmm6,%xmm1
movdqa %xmm2,%xmm7
psrld  $0xe,%xmm7
movdqa %xmm9,%xmm5
psrld  $0xe,%xmm5
pand   %xmm8,%xmm7
paddd  %xmm0,%xmm7
pand   %xmm8,%xmm5
paddd  %xmm1,%xmm5
movdqa %xmm2,%xmm6
psrld  $0xf,%xmm6
movdqa %xmm9,%xmm0
psrld  $0xf,%xmm0
pand   %xmm8,%xmm6
paddd  %xmm7,%xmm6
paddd  %xmm4,%xmm6
pand   %xmm8,%xmm0
paddd  %xmm5,%xmm0
paddd  %xmm3,%xmm0
movdqa %xmm2,%xmm1
psrld  $0x10,%xmm1
movdqa %xmm9,%xmm3
psrld  $0x10,%xmm3
pand   %xmm8,%xmm1
pand   %xmm8,%xmm3
movdqa %xmm2,%xmm4
psrld  $0x11,%xmm4
movdqa %xmm9,%xmm5
psrld  $0x11,%xmm5
pand   %xmm8,%xmm4
paddd  %xmm1,%xmm4
pand   %xmm8,%xmm5
paddd  %xmm3,%xmm5
movdqa %xmm2,%xmm1
psrld  $0x12,%xmm1
movdqa %xmm9,%xmm3
psrld  $0x12,%xmm3
pand   %xmm8,%xmm1
paddd  %xmm4,%xmm1
pand   %xmm8,%xmm3
paddd  %xmm5,%xmm3
movdqa %xmm2,%xmm4
psrld  $0x13,%xmm4
movdqa %xmm9,%xmm5
psrld  $0x13,%xmm5
pand   %xmm8,%xmm4
paddd  %xmm1,%xmm4
pand   %xmm8,%xmm5
paddd  %xmm3,%xmm5
movdqa %xmm2,%xmm1
psrld  $0x14,%xmm1
movdqa %xmm9,%xmm7
psrld  $0x14,%xmm7
pand   %xmm8,%xmm1
paddd  %xmm4,%xmm1
pand   %xmm8,%xmm7
paddd  %xmm5,%xmm7
movdqa %xmm2,%xmm4
psrld  $0x15,%xmm4
movdqa %xmm9,%xmm10
psrld  $0x15,%xmm10
pand   %xmm8,%xmm4
paddd  %xmm1,%xmm4
paddd  %xmm6,%xmm4
pand   %xmm8,%xmm10
paddd  %xmm7,%xmm10
paddd  %xmm0,%xmm10
movdqa %xmm2,%xmm0
psrld  $0x16,%xmm0
movdqa %xmm9,%xmm1
psrld  $0x16,%xmm1
pand   %xmm8,%xmm0
pand   %xmm8,%xmm1
movdqa %xmm2,%xmm5
psrld  $0x17,%xmm5
movdqa %xmm9,%xmm6
psrld  $0x17,%xmm6
pand   %xmm8,%xmm5
paddd  %xmm0,%xmm5
pand   %xmm8,%xmm6
paddd  %xmm1,%xmm6
movdqa %xmm2,%xmm0
psrld  $0x18,%xmm0
movdqa %xmm9,%xmm1
psrld  $0x18,%xmm1
pand   %xmm8,%xmm0
paddd  %xmm5,%xmm0
pand   %xmm8,%xmm1
paddd  %xmm6,%xmm1
movdqa %xmm2,%xmm5
psrld  $0x19,%xmm5
movdqa %xmm9,%xmm6
psrld  $0x19,%xmm6
pand   %xmm8,%xmm5
paddd  %xmm0,%xmm5
pand   %xmm8,%xmm6
paddd  %xmm1,%xmm6
movdqa %xmm2,%xmm0
psrld  $0x1a,%xmm0
movdqa %xmm9,%xmm1
psrld  $0x1a,%xmm1
pand   %xmm8,%xmm0
paddd  %xmm5,%xmm0
pand   %xmm8,%xmm1
paddd  %xmm6,%xmm1
movdqa %xmm2,%xmm7
psrld  $0x1b,%xmm7
movdqa %xmm9,%xmm3
psrld  $0x1b,%xmm3
pand   %xmm8,%xmm7
paddd  %xmm0,%xmm7
pand   %xmm8,%xmm3
paddd  %xmm1,%xmm3
movdqa %xmm2,%xmm6
psrld  $0x1c,%xmm6
movdqa %xmm9,%xmm5
psrld  $0x1c,%xmm5
pand   %xmm8,%xmm6
paddd  %xmm7,%xmm6
paddd  %xmm4,%xmm6
pand   %xmm8,%xmm5
paddd  %xmm3,%xmm5
paddd  %xmm10,%xmm5
movdqa %xmm2,%xmm0
psrld  $0x1d,%xmm0
movdqa %xmm9,%xmm1
psrld  $0x1d,%xmm1
pand   %xmm8,%xmm0
pand   %xmm8,%xmm1
movdqa %xmm2,%xmm3
psrld  $0x1e,%xmm3
movdqa %xmm9,%xmm4
psrld  $0x1e,%xmm4
pand   %xmm8,%xmm3
paddd  %xmm0,%xmm3
pand   %xmm8,%xmm4
paddd  %xmm1,%xmm4
psrld  $0x1f,%xmm2
paddd  %xmm3,%xmm2
movdqa %xmm2,%xmm3
paddd  %xmm6,%xmm3
psrld  $0x1f,%xmm9
paddd  %xmm4,%xmm9
movdqa %xmm9,%xmm4
paddd  %xmm5,%xmm4
add    $0x8,%rax
cmp    $0xfd,%rax
jne    1120 <hammingDistance+0x20>
paddd  %xmm3,%xmm4
pshufd $0xee,%xmm4,%xmm0
paddd  %xmm4,%xmm0
pshufd $0x55,%xmm0,%xmm1
paddd  %xmm0,%xmm1
movd   %xmm1,%eax
xor    %r8d,%r8d
nop
mov    0x3e4(%rsi,%r8,4),%ecx
xor    0x3e4(%rdi,%r8,4),%ecx
mov    %ecx,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    %eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x2,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x3,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x4,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x5,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x6,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x7,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x8,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x9,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0xa,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0xb,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0xc,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0xd,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0xe,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0xf,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x10,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x11,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x12,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x13,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x14,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x15,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x16,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x17,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x18,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x19,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x1a,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x1b,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x1c,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %ecx,%eax
shr    $0x1d,%eax
and    $0x1,%eax
add    %edx,%eax
mov    %ecx,%edx
shr    $0x1e,%edx
and    $0x1,%edx
add    %eax,%edx
shr    $0x1f,%ecx
mov    %ecx,%eax
add    %edx,%eax
add    $0x1,%r8
cmp    $0x7,%r8
jne    1600 <hammingDistance+0x500>
ret

LLVM IR (-O0):
define i32 @hammingDistance(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
store i32 0, i32* %5
store i32 1, i32* %6
br label %9
9: ; preds = %38, %2
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 256
br i1 %11, label %12, label %41
12: ; preds = %9
%13 = load i32*, i32** %3
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = xor i32 %17, %22
store i32 %23, i32* %7
store i32 0, i32* %8
br label %24
24: ; preds = %34, %12
%25 = load i32, i32* %8
%26 = icmp slt i32 %25, 32
br i1 %26, label %27, label %37
27: ; preds = %24
%28 = load i32, i32* %7
%29 = and i32 %28, 1
%30 = load i32, i32* %5
%31 = add nsw i32 %30, %29
store i32 %31, i32* %5
%32 = load i32, i32* %7
%33 = ashr i32 %32, 1
store i32 %33, i32* %7
br label %34
34: ; preds = %27
%35 = load i32, i32* %8
%36 = add nsw i32 %35, 1
store i32 %36, i32* %8
br label %24
37: ; preds = %24
br label %38
38: ; preds = %37
%39 = load i32, i32* %6
%40 = add nsw i32 %39, 1
store i32 %40, i32* %6
br label %9
41: ; preds = %9
%42 = load i32, i32* %5
ret i32 %42
}

LLVM IR (-O2):
define i32 @hammingDistance(i32* nocapture %0, i32* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ 0, %2 ], [ %210, %3 ]
%5 = phi <4 x i32> [ zeroinitializer, %2 ], [ %208, %3 ]
%6 = phi <4 x i32> [ zeroinitializer, %2 ], [ %209, %3 ]
%7 = or i64 %4, 1
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = bitcast i32* %8 to <4 x i32>*
%10 = load <4 x i32>, <4 x i32>* %9
%11 = getelementptr inbounds i32, i32* %8, i64 4
%12 = bitcast i32* %11 to <4 x i32>*
%13 = load <4 x i32>, <4 x i32>* %12
%14 = getelementptr inbounds i32, i32* %1, i64 %7
%15 = bitcast i32* %14 to <4 x i32>*
%16 = load <4 x i32>, <4 x i32>* %15
%17 = getelementptr inbounds i32, i32* %14, i64 4
%18 = bitcast i32* %17 to <4 x i32>*
%19 = load <4 x i32>, <4 x i32>* %18
%20 = xor <4 x i32> %16, %10
%21 = xor <4 x i32> %19, %13
%22 = and <4 x i32> %20, <i32 1, i32 1, i32 1, i32 1>
%23 = and <4 x i32> %21, <i32 1, i32 1, i32 1, i32 1>
%24 = add <4 x i32> %22, %5
%25 = add <4 x i32> %23, %6
%26 = lshr <4 x i32> %20, <i32 1, i32 1, i32 1, i32 1>
%27 = lshr <4 x i32> %21, <i32 1, i32 1, i32 1, i32 1>
%28 = and <4 x i32> %26, <i32 1, i32 1, i32 1, i32 1>
%29 = and <4 x i32> %27, <i32 1, i32 1, i32 1, i32 1>
%30 = add <4 x i32> %28, %24
%31 = add <4 x i32> %29, %25
%32 = lshr <4 x i32> %20, <i32 2, i32 2, i32 2, i32 2>
%33 = lshr <4 x i32> %21, <i32 2, i32 2, i32 2, i32 2>
%34 = and <4 x i32> %32, <i32 1, i32 1, i32 1, i32 1>
%35 = and <4 x i32> %33, <i32 1, i32 1, i32 1, i32 1>
%36 = add <4 x i32> %34, %30
%37 = add <4 x i32> %35, %31
%38 = lshr <4 x i32> %20, <i32 3, i32 3, i32 3, i32 3>
%39 = lshr <4 x i32> %21, <i32 3, i32 3, i32 3, i32 3>
%40 = and <4 x i32> %38, <i32 1, i32 1, i32 1, i32 1>
%41 = and <4 x i32> %39, <i32 1, i32 1, i32 1, i32 1>
%42 = add <4 x i32> %40, %36
%43 = add <4 x i32> %41, %37
%44 = lshr <4 x i32> %20, <i32 4, i32 4, i32 4, i32 4>
%45 = lshr <4 x i32> %21, <i32 4, i32 4, i32 4, i32 4>
%46 = and <4 x i32> %44, <i32 1, i32 1, i32 1, i32 1>
%47 = and <4 x i32> %45, <i32 1, i32 1, i32 1, i32 1>
%48 = add <4 x i32> %46, %42
%49 = add <4 x i32> %47, %43
%50 = lshr <4 x i32> %20, <i32 5, i32 5, i32 5, i32 5>
%51 = lshr <4 x i32> %21, <i32 5, i32 5, i32 5, i32 5>
%52 = and <4 x i32> %50, <i32 1, i32 1, i32 1, i32 1>
%53 = and <4 x i32> %51, <i32 1, i32 1, i32 1, i32 1>
%54 = add <4 x i32> %52, %48
%55 = add <4 x i32> %53, %49
%56 = lshr <4 x i32> %20, <i32 6, i32 6, i32 6, i32 6>
%57 = lshr <4 x i32> %21, <i32 6, i32 6, i32 6, i32 6>
%58 = and <4 x i32> %56, <i32 1, i32 1, i32 1, i32 1>
%59 = and <4 x i32> %57, <i32 1, i32 1, i32 1, i32 1>
%60 = add <4 x i32> %58, %54
%61 = add <4 x i32> %59, %55
%62 = lshr <4 x i32> %20, <i32 7, i32 7, i32 7, i32 7>
%63 = lshr <4 x i32> %21, <i32 7, i32 7, i32 7, i32 7>
%64 = and <4 x i32> %62, <i32 1, i32 1, i32 1, i32 1>
%65 = and <4 x i32> %63, <i32 1, i32 1, i32 1, i32 1>
%66 = add <4 x i32> %64, %60
%67 = add <4 x i32> %65, %61
%68 = lshr <4 x i32> %20, <i32 8, i32 8, i32 8, i32 8>
%69 = lshr <4 x i32> %21, <i32 8, i32 8, i32 8, i32 8>
%70 = and <4 x i32> %68, <i32 1, i32 1, i32 1, i32 1>
%71 = and <4 x i32> %69, <i32 1, i32 1, i32 1, i32 1>
%72 = add <4 x i32> %70, %66
%73 = add <4 x i32> %71, %67
%74 = lshr <4 x i32> %20, <i32 9, i32 9, i32 9, i32 9>
%75 = lshr <4 x i32> %21, <i32 9, i32 9, i32 9, i32 9>
%76 = and <4 x i32> %74, <i32 1, i32 1, i32 1, i32 1>
%77 = and <4 x i32> %75, <i32 1, i32 1, i32 1, i32 1>
%78 = add <4 x i32> %76, %72
%79 = add <4 x i32> %77, %73
%80 = lshr <4 x i32> %20, <i32 10, i32 10, i32 10, i32 10>
%81 = lshr <4 x i32> %21, <i32 10, i32 10, i32 10, i32 10>
%82 = and <4 x i32> %80, <i32 1, i32 1, i32 1, i32 1>
%83 = and <4 x i32> %81, <i32 1, i32 1, i32 1, i32 1>
%84 = add <4 x i32> %82, %78
%85 = add <4 x i32> %83, %79
%86 = lshr <4 x i32> %20, <i32 11, i32 11, i32 11, i32 11>
%87 = lshr <4 x i32> %21, <i32 11, i32 11, i32 11, i32 11>
%88 = and <4 x i32> %86, <i32 1, i32 1, i32 1, i32 1>
%89 = and <4 x i32> %87, <i32 1, i32 1, i32 1, i32 1>
%90 = add <4 x i32> %88, %84
%91 = add <4 x i32> %89, %85
%92 = lshr <4 x i32> %20, <i32 12, i32 12, i32 12, i32 12>
%93 = lshr <4 x i32> %21, <i32 12, i32 12, i32 12, i32 12>
%94 = and <4 x i32> %92, <i32 1, i32 1, i32 1, i32 1>
%95 = and <4 x i32> %93, <i32 1, i32 1, i32 1, i32 1>
%96 = add <4 x i32> %94, %90
%97 = add <4 x i32> %95, %91
%98 = lshr <4 x i32> %20, <i32 13, i32 13, i32 13, i32 13>
%99 = lshr <4 x i32> %21, <i32 13, i32 13, i32 13, i32 13>
%100 = and <4 x i32> %98, <i32 1, i32 1, i32 1, i32 1>
%101 = and <4 x i32> %99, <i32 1, i32 1, i32 1, i32 1>
%102 = add <4 x i32> %100, %96
%103 = add <4 x i32> %101, %97
%104 = lshr <4 x i32> %20, <i32 14, i32 14, i32 14, i32 14>
%105 = lshr <4 x i32> %21, <i32 14, i32 14, i32 14, i32 14>
%106 = and <4 x i32> %104, <i32 1, i32 1, i32 1, i32 1>
%107 = and <4 x i32> %105, <i32 1, i32 1, i32 1, i32 1>
%108 = add <4 x i32> %106, %102
%109 = add <4 x i32> %107, %103
%110 = lshr <4 x i32> %20, <i32 15, i32 15, i32 15, i32 15>
%111 = lshr <4 x i32> %21, <i32 15, i32 15, i32 15, i32 15>
%112 = and <4 x i32> %110, <i32 1, i32 1, i32 1, i32 1>
%113 = and <4 x i32> %111, <i32 1, i32 1, i32 1, i32 1>
%114 = add <4 x i32> %112, %108
%115 = add <4 x i32> %113, %109
%116 = lshr <4 x i32> %20, <i32 16, i32 16, i32 16, i32 16>
%117 = lshr <4 x i32> %21, <i32 16, i32 16, i32 16, i32 16>
%118 = and <4 x i32> %116, <i32 1, i32 1, i32 1, i32 1>
%119 = and <4 x i32> %117, <i32 1, i32 1, i32 1, i32 1>
%120 = add <4 x i32> %118, %114
%121 = add <4 x i32> %119, %115
%122 = lshr <4 x i32> %20, <i32 17, i32 17, i32 17, i32 17>
%123 = lshr <4 x i32> %21, <i32 17, i32 17, i32 17, i32 17>
%124 = and <4 x i32> %122, <i32 1, i32 1, i32 1, i32 1>
%125 = and <4 x i32> %123, <i32 1, i32 1, i32 1, i32 1>
%126 = add <4 x i32> %124, %120
%127 = add <4 x i32> %125, %121
%128 = lshr <4 x i32> %20, <i32 18, i32 18, i32 18, i32 18>
%129 = lshr <4 x i32> %21, <i32 18, i32 18, i32 18, i32 18>
%130 = and <4 x i32> %128, <i32 1, i32 1, i32 1, i32 1>
%131 = and <4 x i32> %129, <i32 1, i32 1, i32 1, i32 1>
%132 = add <4 x i32> %130, %126
%133 = add <4 x i32> %131, %127
%134 = lshr <4 x i32> %20, <i32 19, i32 19, i32 19, i32 19>
%135 = lshr <4 x i32> %21, <i32 19, i32 19, i32 19, i32 19>
%136 = and <4 x i32> %134, <i32 1, i32 1, i32 1, i32 1>
%137 = and <4 x i32> %135, <i32 1, i32 1, i32 1, i32 1>
%138 = add <4 x i32> %136, %132
%139 = add <4 x i32> %137, %133
%140 = lshr <4 x i32> %20, <i32 20, i32 20, i32 20, i32 20>
%141 = lshr <4 x i32> %21, <i32 20, i32 20, i32 20, i32 20>
%142 = and <4 x i32> %140, <i32 1, i32 1, i32 1, i32 1>
%143 = and <4 x i32> %141, <i32 1, i32 1, i32 1, i32 1>
%144 = add <4 x i32> %142, %138
%145 = add <4 x i32> %143, %139
%146 = lshr <4 x i32> %20, <i32 21, i32 21, i32 21, i32 21>
%147 = lshr <4 x i32> %21, <i32 21, i32 21, i32 21, i32 21>
%148 = and <4 x i32> %146, <i32 1, i32 1, i32 1, i32 1>
%149 = and <4 x i32> %147, <i32 1, i32 1, i32 1, i32 1>
%150 = add <4 x i32> %148, %144
%151 = add <4 x i32> %149, %145
%152 = lshr <4 x i32> %20, <i32 22, i32 22, i32 22, i32 22>
%153 = lshr <4 x i32> %21, <i32 22, i32 22, i32 22, i32 22>
%154 = and <4 x i32> %152, <i32 1, i32 1, i32 1, i32 1>
%155 = and <4 x i32> %153, <i32 1, i32 1, i32 1, i32 1>
%156 = add <4 x i32> %154, %150
%157 = add <4 x i32> %155, %151
%158 = lshr <4 x i32> %20, <i32 23, i32 23, i32 23, i32 23>
%159 = lshr <4 x i32> %21, <i32 23, i32 23, i32 23, i32 23>
%160 = and <4 x i32> %158, <i32 1, i32 1, i32 1, i32 1>
%161 = and <4 x i32> %159, <i32 1, i32 1, i32 1, i32 1>
%162 = add <4 x i32> %160, %156
%163 = add <4 x i32> %161, %157
%164 = lshr <4 x i32> %20, <i32 24, i32 24, i32 24, i32 24>
%165 = lshr <4 x i32> %21, <i32 24, i32 24, i32 24, i32 24>
%166 = and <4 x i32> %164, <i32 1, i32 1, i32 1, i32 1>
%167 = and <4 x i32> %165, <i32 1, i32 1, i32 1, i32 1>
%168 = add <4 x i32> %166, %162
%169 = add <4 x i32> %167, %163
%170 = lshr <4 x i32> %20, <i32 25, i32 25, i32 25, i32 25>
%171 = lshr <4 x i32> %21, <i32 25, i32 25, i32 25, i32 25>
%172 = and <4 x i32> %170, <i32 1, i32 1, i32 1, i32 1>
%173 = and <4 x i32> %171, <i32 1, i32 1, i32 1, i32 1>
%174 = add <4 x i32> %172, %168
%175 = add <4 x i32> %173, %169
%176 = lshr <4 x i32> %20, <i32 26, i32 26, i32 26, i32 26>
%177 = lshr <4 x i32> %21, <i32 26, i32 26, i32 26, i32 26>
%178 = and <4 x i32> %176, <i32 1, i32 1, i32 1, i32 1>
%179 = and <4 x i32> %177, <i32 1, i32 1, i32 1, i32 1>
%180 = add <4 x i32> %178, %174
%181 = add <4 x i32> %179, %175
%182 = lshr <4 x i32> %20, <i32 27, i32 27, i32 27, i32 27>
%183 = lshr <4 x i32> %21, <i32 27, i32 27, i32 27, i32 27>
%184 = and <4 x i32> %182, <i32 1, i32 1, i32 1, i32 1>
%185 = and <4 x i32> %183, <i32 1, i32 1, i32 1, i32 1>
%186 = add <4 x i32> %184, %180
%187 = add <4 x i32> %185, %181
%188 = lshr <4 x i32> %20, <i32 28, i32 28, i32 28, i32 28>
%189 = lshr <4 x i32> %21, <i32 28, i32 28, i32 28, i32 28>
%190 = and <4 x i32> %188, <i32 1, i32 1, i32 1, i32 1>
%191 = and <4 x i32> %189, <i32 1, i32 1, i32 1, i32 1>
%192 = add <4 x i32> %190, %186
%193 = add <4 x i32> %191, %187
%194 = lshr <4 x i32> %20, <i32 29, i32 29, i32 29, i32 29>
%195 = lshr <4 x i32> %21, <i32 29, i32 29, i32 29, i32 29>
%196 = and <4 x i32> %194, <i32 1, i32 1, i32 1, i32 1>
%197 = and <4 x i32> %195, <i32 1, i32 1, i32 1, i32 1>
%198 = add <4 x i32> %196, %192
%199 = add <4 x i32> %197, %193
%200 = lshr <4 x i32> %20, <i32 30, i32 30, i32 30, i32 30>
%201 = lshr <4 x i32> %21, <i32 30, i32 30, i32 30, i32 30>
%202 = and <4 x i32> %200, <i32 1, i32 1, i32 1, i32 1>
%203 = and <4 x i32> %201, <i32 1, i32 1, i32 1, i32 1>
%204 = add <4 x i32> %202, %198
%205 = add <4 x i32> %203, %199
%206 = lshr <4 x i32> %20, <i32 31, i32 31, i32 31, i32 31>
%207 = lshr <4 x i32> %21, <i32 31, i32 31, i32 31, i32 31>
%208 = add <4 x i32> %206, %204
%209 = add <4 x i32> %207, %205
%210 = add nuw i64 %4, 8
%211 = icmp eq i64 %210, 248
br i1 %211, label %212, label %3
212: ; preds = %3
%213 = add <4 x i32> %209, %208
%214 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %213)
br label %216
215: ; preds = %216
ret i32 %317
216: ; preds = %212, %216
%217 = phi i64 [ 249, %212 ], [ %318, %216 ]
%218 = phi i32 [ %214, %212 ], [ %317, %216 ]
%219 = getelementptr inbounds i32, i32* %0, i64 %217
%220 = load i32, i32* %219
%221 = getelementptr inbounds i32, i32* %1, i64 %217
%222 = load i32, i32* %221
%223 = xor i32 %222, %220
%224 = and i32 %223, 1
%225 = add nsw i32 %224, %218
%226 = lshr i32 %223, 1
%227 = and i32 %226, 1
%228 = add nsw i32 %227, %225
%229 = lshr i32 %223, 2
%230 = and i32 %229, 1
%231 = add nsw i32 %230, %228
%232 = lshr i32 %223, 3
%233 = and i32 %232, 1
%234 = add nsw i32 %233, %231
%235 = lshr i32 %223, 4
%236 = and i32 %235, 1
%237 = add nsw i32 %236, %234
%238 = lshr i32 %223, 5
%239 = and i32 %238, 1
%240 = add nsw i32 %239, %237
%241 = lshr i32 %223, 6
%242 = and i32 %241, 1
%243 = add nsw i32 %242, %240
%244 = lshr i32 %223, 7
%245 = and i32 %244, 1
%246 = add nsw i32 %245, %243
%247 = lshr i32 %223, 8
%248 = and i32 %247, 1
%249 = add nsw i32 %248, %246
%250 = lshr i32 %223, 9
%251 = and i32 %250, 1
%252 = add nsw i32 %251, %249
%253 = lshr i32 %223, 10
%254 = and i32 %253, 1
%255 = add nsw i32 %254, %252
%256 = lshr i32 %223, 11
%257 = and i32 %256, 1
%258 = add nsw i32 %257, %255
%259 = lshr i32 %223, 12
%260 = and i32 %259, 1
%261 = add nsw i32 %260, %258
%262 = lshr i32 %223, 13
%263 = and i32 %262, 1
%264 = add nsw i32 %263, %261
%265 = lshr i32 %223, 14
%266 = and i32 %265, 1
%267 = add nsw i32 %266, %264
%268 = lshr i32 %223, 15
%269 = and i32 %268, 1
%270 = add nsw i32 %269, %267
%271 = lshr i32 %223, 16
%272 = and i32 %271, 1
%273 = add nsw i32 %272, %270
%274 = lshr i32 %223, 17
%275 = and i32 %274, 1
%276 = add nsw i32 %275, %273
%277 = lshr i32 %223, 18
%278 = and i32 %277, 1
%279 = add nsw i32 %278, %276
%280 = lshr i32 %223, 19
%281 = and i32 %280, 1
%282 = add nsw i32 %281, %279
%283 = lshr i32 %223, 20
%284 = and i32 %283, 1
%285 = add nsw i32 %284, %282
%286 = lshr i32 %223, 21
%287 = and i32 %286, 1
%288 = add nsw i32 %287, %285
%289 = lshr i32 %223, 22
%290 = and i32 %289, 1
%291 = add nsw i32 %290, %288
%292 = lshr i32 %223, 23
%293 = and i32 %292, 1
%294 = add nsw i32 %293, %291
%295 = lshr i32 %223, 24
%296 = and i32 %295, 1
%297 = add nsw i32 %296, %294
%298 = lshr i32 %223, 25
%299 = and i32 %298, 1
%300 = add nsw i32 %299, %297
%301 = lshr i32 %223, 26
%302 = and i32 %301, 1
%303 = add nsw i32 %302, %300
%304 = lshr i32 %223, 27
%305 = and i32 %304, 1
%306 = add nsw i32 %305, %303
%307 = lshr i32 %223, 28
%308 = and i32 %307, 1
%309 = add nsw i32 %308, %306
%310 = lshr i32 %223, 29
%311 = and i32 %310, 1
%312 = add nsw i32 %311, %309
%313 = lshr i32 %223, 30
%314 = and i32 %313, 1
%315 = add nsw i32 %314, %312
%316 = lshr i32 %223, 31
%317 = add nsw i32 %316, %315
%318 = add nuw nsw i64 %217, 1
%319 = icmp eq i64 %318, 256
br i1 %319, label %215, label %216
}