xunge/DecIR huggingface dataset:
/* Type definitions */
struct tms {
  double tms_utime;
};

/* Variables and functions */
int ttime() {
  struct tms buffer;
  int utime;
  utime = (buffer.tms_utime / 60.0) * 1000.0;
  return (utime);
}


x86 assembly (clang, -O0):
<ttime>:
push   %rbp
mov    %rsp,%rbp
movsd  -0x8(%rbp),%xmm0
movsd  0xef7(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xee3(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ttime>:
ret

LLVM IR (-O0):
%struct.tms = type { double }
define i32 @ttime() {
%1 = alloca %struct.tms
%2 = alloca i32
%3 = getelementptr inbounds %struct.tms, %struct.tms* %1, i32 0, i32 0
%4 = load double, double* %3
%5 = fdiv double %4, 6.000000e+01
%6 = fmul double %5, 1.000000e+03
%7 = fptosi double %6 to i32
store i32 %7, i32* %2
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @ttime() {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_sys_cfg_max_sta_num_usage(void) {
  printf("\nUsage : sys_cfg_max_sta_num [STA_NUM]\n");
  printf("\nIf STA_NUM is provided, a 'set' is performed, else a 'get' is "
         "performed.\n");
  return;
}


x86 assembly (clang, -O0):
<print_sys_cfg_max_sta_num_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf01(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_sys_cfg_max_sta_num_usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf03(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"\0AUsage : sys_cfg_max_sta_num [STA_NUM]\0A\00"
@.str.1 = [75 x i8] c"\0AIf STA_NUM is provided, a 'set' is performed, else a 'get' is performed.\0A\00"
define void @print_sys_cfg_max_sta_num_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [39 x i8] c"\0AUsage : sys_cfg_max_sta_num [STA_NUM]\00"
@str.2 = [74 x i8] c"\0AIf STA_NUM is provided, a 'set' is performed, else a 'get' is performed.\00"
define void @print_sys_cfg_max_sta_num_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([74 x i8], [74 x i8]* @str.2, i64 0, i64 0))
ret void
}
void INT_Excep_TMR1_CMIA1(void) {}


x86 assembly (clang, -O0):
<INT_Excep_TMR1_CMIA1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_TMR1_CMIA1>:
ret

LLVM IR (-O0):
define void @INT_Excep_TMR1_CMIA1() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_TMR1_CMIA1() {
ret void
}
/* Variables and functions */
char const *vp_file_close(char *);
const char *vp_pty_close(char *args) { return vp_file_close(args); }


x86 assembly (clang, -O0):
<vp_pty_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vp_file_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vp_pty_close>:
jmp    1030 <vp_file_close@plt>

LLVM IR (-O0):
define i8* @vp_pty_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @vp_file_close(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @vp_pty_close(i8* %0) {
%2 = tail call i8* @vp_file_close(i8* %0)
ret i8* %2
}
int test_imm_64int64_highword_reg(long long val) {
  return ((val >> 32) & (0x64 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_64int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x64,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_64int64_highword_reg>:
movabs $0x6400000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_64int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 100
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_64int64_highword_reg(i64 %0) {
%2 = and i64 %0, 429496729600
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
float ctss_stepf(const float x, const float edge, const float y1,
                 const float y2) {
  return (x < edge ? y1 : y2);
}


x86 assembly (clang, -O0):
<ctss_stepf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    113a <ctss_stepf+0x3a>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    1144 <ctss_stepf+0x44>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctss_stepf>:
cmpltss %xmm1,%xmm0
andps  %xmm0,%xmm2
andnps %xmm3,%xmm0
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @ctss_stepf(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %6
%11 = fcmp olt float %9, %10
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = load float, float* %7
br label %16
14: ; preds = %4
%15 = load float, float* %8
br label %16
16: ; preds = %14, %12
%17 = phi float [ %13, %12 ], [ %15, %14 ]
ret float %17
}

LLVM IR (-O2):
define float @ctss_stepf(float %0, float %1, float %2, float %3) {
%5 = fcmp olt float %0, %1
%6 = select i1 %5, float %2, float %3
ret float %6
}
unsigned int scuGatePeripheralClock(const unsigned int peripheral) {
  (*((volatile unsigned int *const)((0x40010000 + 0) + 0x24))) = 0x00C0;
  (*((volatile unsigned int *const)((0x40010000 + 0x300) + 0x0c))) = peripheral;
  (*((volatile unsigned int *const)((0x40010000 + 0) + 0x24))) = 0x00C3;
  while ((*((volatile unsigned int *const)((0x40010000 + 0x300) + 0x00))) &
         ((1 << 31) | (1 << 30)))
    ;
  return 0;
}


x86 assembly (clang, -O0):
<scuGatePeripheralClock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x40010024,%eax
movl   $0xc0,(%rax)
mov    -0x4(%rbp),%ecx
mov    $0x4001030c,%eax
mov    %ecx,(%rax)
mov    $0x40010024,%eax
movl   $0xc3,(%rax)
mov    $0x40010300,%eax
mov    (%rax),%eax
and    $0xc0000000,%eax
cmp    $0x0,%eax
je     1141 <scuGatePeripheralClock+0x41>
jmp    1127 <scuGatePeripheralClock+0x27>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scuGatePeripheralClock>:
movl   $0xc0,0x40010024
mov    %edi,0x4001030c
movl   $0xc3,0x40010024
nopl   (%rax)
mov    0x40010300,%eax
cmp    $0x3fffffff,%eax
ja     1120 <scuGatePeripheralClock+0x20>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @scuGatePeripheralClock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i32 192, i32* inttoptr (i64 1073807396 to i32*)
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1073808140 to i32*)
store volatile i32 195, i32* inttoptr (i64 1073807396 to i32*)
br label %4
4: ; preds = %8, %1
%5 = load volatile i32, i32* inttoptr (i64 1073808128 to i32*)
%6 = and i32 %5, -1073741824
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @scuGatePeripheralClock(i32 %0) {
store volatile i32 192, i32* inttoptr (i64 1073807396 to i32*)
store volatile i32 %0, i32* inttoptr (i64 1073808140 to i32*)
store volatile i32 195, i32* inttoptr (i64 1073807396 to i32*)
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 1073808128 to i32*)
%4 = icmp ult i32 %3, 1073741824
br i1 %4, label %5, label %2
5: ; preds = %2
ret i32 0
}
/* Variables and functions */
int crypto_verify_32(unsigned char const *, unsigned char *);
int /*<<< orphan*/ sha512256_hmac(unsigned char *, unsigned char const *,
                                  unsigned long long, unsigned char const *);
int sha512256_hmac_verify(const unsigned char *h, const unsigned char *in,
                          unsigned long long inlen, const unsigned char *k) {
  unsigned char correct[32];
  sha512256_hmac(correct, in, inlen, k);
  return crypto_verify_32(h, correct);
}


x86 assembly (clang, -O0):
<sha512256_hmac_verify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <sha512256_hmac@plt>
mov    -0x8(%rbp),%rdi
lea    -0x40(%rbp),%rsi
call   1040 <crypto_verify_32@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha512256_hmac_verify>:
push   %r14
push   %rbx
sub    $0x28,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    %r14,%rdi
call   1030 <sha512256_hmac@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <crypto_verify_32@plt>
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @sha512256_hmac_verify(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca [32 x i8]
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%10 = getelementptr inbounds [32 x i8], [32 x i8]* %9, i64 0, i64 0
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i8*, i8** %8
%14 = call i32 @sha512256_hmac(i8* %10, i8* %11, i64 %12, i8* %13)
%15 = load i8*, i8** %5
%16 = getelementptr inbounds [32 x i8], [32 x i8]* %9, i64 0, i64 0
%17 = call i32 @crypto_verify_32(i8* %15, i8* %16)
ret i32 %17
}

LLVM IR (-O2):
define i32 @sha512256_hmac_verify(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca [32 x i8]
%6 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%7 = call i32 @sha512256_hmac(i8* %6, i8* %1, i64 %2, i8* %3)
%8 = call i32 @crypto_verify_32(i8* %0, i8* %6)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ foobar(int);
int main() {
  int a = 10;
  foobar(a);
  foobar(a++);
  foobar(a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <foobar@plt>
mov    -0x8(%rbp),%edi
mov    %edi,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
call   1030 <foobar@plt>
mov    -0x8(%rbp),%edi
call   1030 <foobar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <foobar@plt>
mov    $0xa,%edi
call   1030 <foobar@plt>
mov    $0xb,%edi
call   1030 <foobar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @foobar(i32 %3)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = call i32 @foobar(i32 %5)
%8 = load i32, i32* %2
%9 = call i32 @foobar(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foobar(i32 10)
%2 = tail call i32 @foobar(i32 10)
%3 = tail call i32 @foobar(i32 11)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void timer_start(uint32_t *timer) { timer[0x00C / 4] |= 1; }


x86 assembly (clang, -O0):
<timer_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
or     $0x1,%ecx
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_start>:
orb    $0x1,0xc(%rdi)
ret

LLVM IR (-O0):
define void @timer_start(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
%6 = or i32 %5, 1
store i32 %6, i32* %4
ret void
}

LLVM IR (-O2):
define void @timer_start(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
%4 = or i32 %3, 1
store i32 %4, i32* %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ fprintf(int /*<<< orphan*/ *, char *, int, int);
int mm_write_mtx_array_size(FILE *f, int M, int N) {
  if (fprintf(f, "%d %d\n", M, N) < 0)
    return 17;
  else
    return 0;
}


x86 assembly (clang, -O0):
<mm_write_mtx_array_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
cmp    $0x0,%rax
jge    114e <mm_write_mtx_array_size+0x3e>
movl   $0x11,-0x4(%rbp)
jmp    1155 <mm_write_mtx_array_size+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_write_mtx_array_size>:
push   %rax
mov    %edx,%ecx
mov    %esi,%edx
lea    0xee4(%rip),%rsi
call   1030 <fprintf@plt>
sar    $0x3f,%rax
and    $0x11,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @mm_write_mtx_array_size(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = call i64 @fprintf(i32* %8, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
%12 = icmp slt i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 17, i32* %4
br label %15
14: ; preds = %3
store i32 0, i32* %4
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @mm_write_mtx_array_size(i32* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i64 @fprintf(i32* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2)
%5 = icmp slt i64 %4, 0
%6 = select i1 %5, i32 17, i32 0
ret i32 %6
}
unsigned short __VERIFIER_nondet_ushort(void) {
  unsigned short us;
  { return (us); }
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_ushort>:
push   %rbp
mov    %rsp,%rbp
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_ushort>:
ret

LLVM IR (-O0):
define zeroext i16 @__VERIFIER_nondet_ushort() {
%1 = alloca i16
%2 = load i16, i16* %1
ret i16 %2
}

LLVM IR (-O2):
define zeroext i16 @__VERIFIER_nondet_ushort() {
ret i16 undef
}
void GroffSetEncoding(char *encoding) {}


x86 assembly (clang, -O0):
<GroffSetEncoding>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GroffSetEncoding>:
ret

LLVM IR (-O0):
define void @GroffSetEncoding(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @GroffSetEncoding(i8* nocapture %0) {
ret void
}
/* Type definitions */
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ update_tm(struct tm *, struct tm *, int);
void date_yesterday(struct tm *tm, struct tm *now, int *num) {
  update_tm(tm, now, -1 * 24 * 60 * 60);
}


x86 assembly (clang, -O0):
<date_yesterday>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xfffeae80,%edx
call   1030 <update_tm@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_yesterday>:
mov    $0xfffeae80,%edx
jmp    1030 <update_tm@plt>

LLVM IR (-O0):
%struct.tm = type { i32 }
define void @date_yesterday(%struct.tm* %0, %struct.tm* %1, i32* %2) {
%4 = alloca %struct.tm*
%5 = alloca %struct.tm*
%6 = alloca i32*
store %struct.tm* %0, %struct.tm** %4
store %struct.tm* %1, %struct.tm** %5
store i32* %2, i32** %6
%7 = load %struct.tm*, %struct.tm** %4
%8 = load %struct.tm*, %struct.tm** %5
%9 = call i32 @update_tm(%struct.tm* %7, %struct.tm* %8, i32 -86400)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define void @date_yesterday(%struct.tm* %0, %struct.tm* %1, i32* nocapture readnone %2) {
%4 = tail call i32 @update_tm(%struct.tm* %0, %struct.tm* %1, i32 -86400)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
void serialPuts(int fd, char *s) { write(fd, s, strlen(s)); }


x86 assembly (clang, -O0):
<serialPuts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialPuts>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
define void @serialPuts(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @write(i32 %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
define void @serialPuts(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int uint16_t;
typedef int /*<<< orphan*/ outRate;

/* Variables and functions */
int /*<<< orphan*/ FifoProtocol_memcpy(int /*<<< orphan*/ *,
                                       int /*<<< orphan*/ const *, int);
uint16_t inv_fifo_protocol_helper_encode_clockrate(uint32_t rate,
                                                   uint8_t *out) {
  const uint32_t outRate = rate;
  FifoProtocol_memcpy((out), (&outRate), (sizeof(outRate)));
  return 4;
}


x86 assembly (clang, -O0):
<inv_fifo_protocol_helper_encode_clockrate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0x4,%edx
call   1030 <FifoProtocol_memcpy@plt>
mov    $0x4,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_fifo_protocol_helper_encode_clockrate>:
push   %rax
mov    %rsi,%rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    %rax,%rdi
mov    $0x4,%edx
call   1030 <FifoProtocol_memcpy@plt>
mov    $0x4,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @inv_fifo_protocol_helper_encode_clockrate(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32*, i32** %4
%8 = call i32 @FifoProtocol_memcpy(i32* %7, i32* %5, i32 4)
ret i32 4
}

LLVM IR (-O2):
define i32 @inv_fifo_protocol_helper_encode_clockrate(i32 %0, i32* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 %0, i32* %3
%5 = call i32 @FifoProtocol_memcpy(i32* %1, i32* %3, i32 4)
ret i32 4
}
void sw_sleep(int force) {}


x86 assembly (clang, -O0):
<sw_sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sw_sleep>:
ret

LLVM IR (-O0):
define void @sw_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sw_sleep(i32 %0) {
ret void
}
void mesh_mpm_mgmt_rx(struct wpa_supplicant *wpa_s, struct rx_mgmt *rx_mgmt) {}


x86 assembly (clang, -O0):
<mesh_mpm_mgmt_rx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mesh_mpm_mgmt_rx>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
%struct.rx_mgmt = type opaque
define void @mesh_mpm_mgmt_rx(%struct.wpa_supplicant* %0, %struct.rx_mgmt* %1) {
%3 = alloca %struct.wpa_supplicant*
%4 = alloca %struct.rx_mgmt*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %3
store %struct.rx_mgmt* %1, %struct.rx_mgmt** %4
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
%struct.rx_mgmt = type opaque
define void @mesh_mpm_mgmt_rx(%struct.wpa_supplicant* nocapture %0, %struct.rx_mgmt* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int __sputc(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ flockfile(int /*<<< orphan*/ *);
int /*<<< orphan*/ funlockfile(int /*<<< orphan*/ *);
int __putc(int _c, FILE *_p) {
  int ret;
  flockfile(_p);
  ret = __sputc(_c, _p);
  funlockfile(_p);
  return (ret);
}


x86 assembly (clang, -O0):
<__putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <flockfile@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <__sputc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <funlockfile@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__putc>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1050 <flockfile@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1040 <__sputc@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <funlockfile@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @__putc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = call i32 @flockfile(i32* %6)
%8 = load i32, i32* %3
%9 = load i32*, i32** %4
%10 = call i32 @__sputc(i32 %8, i32* %9)
store i32 %10, i32* %5
%11 = load i32*, i32** %4
%12 = call i32 @funlockfile(i32* %11)
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @__putc(i32 %0, i32* %1) {
%3 = tail call i32 @flockfile(i32* %1)
%4 = tail call i32 @__sputc(i32 %0, i32* %1)
%5 = tail call i32 @funlockfile(i32* %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x90() {
  Assert_real((isalpha(144) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              725, ("isalpha should be 0 for 0x90"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x90>:
push   %rbp
mov    %rsp,%rbp
mov    $0x90,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2d5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x90>:
push   %rax
mov    $0x90,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2d5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x90\00"
define void @t_isalpha_0x90() {
%1 = call i64 @isalpha(i32 144)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 725, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x90\00"
define void @t_isalpha_0x90() {
%1 = tail call i64 @isalpha(i32 144)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 725, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *, int);
void clean_exit(char *name, int error) {
  printf("%s, exiting with error %d\n", name, error);
  exit(error);
}


x86 assembly (clang, -O0):
<clean_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<clean_exit>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xed3(%rip),%rdi
mov    %ebx,%edx
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"%s, exiting with error %d\0A\00"
define void @clean_exit(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
%8 = load i32, i32* %4
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@.str = [27 x i8] c"%s, exiting with error %d\0A\00"
define void @clean_exit(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%4 = tail call i32 @exit(i32 %1)
unreachable
}
int name_shutdown(void) { return 0; }


x86 assembly (clang, -O0):
<name_shutdown>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<name_shutdown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @name_shutdown() {
ret i32 0
}

LLVM IR (-O2):
define i32 @name_shutdown() {
ret i32 0
}
char *RCSid() {
  return RCSid("$Id: gpexecute.c,v 1.18 2011/03/13 19:55:29 markisch Exp $");
}


x86 assembly (clang, -O0):
<RCSid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <RCSid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCSid>:
jmp    1100 <RCSid>

LLVM IR (-O0):
@.str = [59 x i8] c"$Id: gpexecute.c,v 1.18 2011/03/13 19:55:29 markisch Exp $\00"
define i8* @RCSid() {
%1 = call i8* (i8*, ...) bitcast (i8* ()* @RCSid to i8* (i8*, ...)*)(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @RCSid() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ eeprom_update_byte(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ eeprom_update_word(int /*<<< orphan*/ *, int /*<<< orphan*/);
void eeconfig_init(void) {
  eeprom_update_word((uint16_t *)0, (uint16_t)0xFEED);
  eeprom_update_byte((uint8_t *)2, 0);
  eeprom_update_byte((uint8_t *)3, 0);
  eeprom_update_byte((uint8_t *)4, 0);
  eeprom_update_byte((uint8_t *)5, 0);
}


x86 assembly (clang, -O0):
<eeconfig_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
mov    $0xfeed,%esi
call   1030 <eeprom_update_word@plt>
mov    $0x2,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
mov    $0x3,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
mov    $0x4,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
mov    $0x5,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeconfig_init>:
push   %rax
xor    %edi,%edi
mov    $0xfeed,%esi
call   1030 <eeprom_update_word@plt>
mov    $0x2,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
mov    $0x3,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
mov    $0x4,%edi
xor    %esi,%esi
call   1040 <eeprom_update_byte@plt>
mov    $0x5,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <eeprom_update_byte@plt>

LLVM IR (-O0):
define void @eeconfig_init() {
%1 = call i32 @eeprom_update_word(i32* null, i32 65261)
%2 = call i32 @eeprom_update_byte(i32* inttoptr (i64 2 to i32*), i32 0)
%3 = call i32 @eeprom_update_byte(i32* inttoptr (i64 3 to i32*), i32 0)
%4 = call i32 @eeprom_update_byte(i32* inttoptr (i64 4 to i32*), i32 0)
%5 = call i32 @eeprom_update_byte(i32* inttoptr (i64 5 to i32*), i32 0)
ret void
}

LLVM IR (-O2):
define void @eeconfig_init() {
%1 = tail call i32 @eeprom_update_word(i32* null, i32 65261)
%2 = tail call i32 @eeprom_update_byte(i32* inttoptr (i64 2 to i32*), i32 0)
%3 = tail call i32 @eeprom_update_byte(i32* inttoptr (i64 3 to i32*), i32 0)
%4 = tail call i32 @eeprom_update_byte(i32* inttoptr (i64 4 to i32*), i32 0)
%5 = tail call i32 @eeprom_update_byte(i32* inttoptr (i64 5 to i32*), i32 0)
ret void
}
int test_imm_C8int8_reg(signed char val) {
  return ((val) & (0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xc8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8int8_reg>:
test   $0xc8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 200
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C8int8_reg(i8 signext %0) {
%2 = and i8 %0, -56
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void setlogmask(int mask) { ; }


x86 assembly (clang, -O0):
<setlogmask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setlogmask>:
ret

LLVM IR (-O0):
define void @setlogmask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @setlogmask(i32 %0) {
ret void
}
/* Type definitions */
struct wcsprm {
  int dummy;
};

/* Variables and functions */
int wcsinit(int, int, struct wcsprm *, int, int, int);
int wcsini(int alloc, int naxis, struct wcsprm *wcs) {
  return wcsinit(alloc, naxis, wcs, -1, -1, -1);
}


x86 assembly (clang, -O0):
<wcsini>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0xffffffff,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <wcsinit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcsini>:
mov    $0xffffffff,%ecx
mov    $0xffffffff,%r8d
mov    $0xffffffff,%r9d
jmp    1030 <wcsinit@plt>

LLVM IR (-O0):
%struct.wcsprm = type { i32 }
define i32 @wcsini(i32 %0, i32 %1, %struct.wcsprm* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.wcsprm*
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.wcsprm* %2, %struct.wcsprm** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load %struct.wcsprm*, %struct.wcsprm** %6
%10 = call i32 @wcsinit(i32 %7, i32 %8, %struct.wcsprm* %9, i32 -1, i32 -1, i32 -1)
ret i32 %10
}

LLVM IR (-O2):
%struct.wcsprm = type { i32 }
define i32 @wcsini(i32 %0, i32 %1, %struct.wcsprm* %2) {
%4 = tail call i32 @wcsinit(i32 %0, i32 %1, %struct.wcsprm* %2, i32 -1, i32 -1, i32 -1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x4a() {
  Assert_real((isalnum(74)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              375, ("isalnum should be 1 for J"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x4a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4a,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x177,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x4a>:
push   %rax
mov    $0x4a,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x177,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for J\00"
define void @t_isalnum_0x4a() {
%1 = call i32 @isalnum(i32 74)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 375, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for J\00"
define void @t_isalnum_0x4a() {
%1 = tail call i32 @isalnum(i32 74)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 375, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int sync_blockdev(struct block_device *bdev) {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<sync_blockdev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_blockdev>:
ret

LLVM IR (-O0):
%struct.block_device = type opaque
define i32 @sync_blockdev(%struct.block_device* %0) {
%2 = alloca %struct.block_device*
%3 = alloca i32
store %struct.block_device* %0, %struct.block_device** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.block_device = type opaque
define i32 @sync_blockdev(%struct.block_device* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int setgroups(int /*<<< orphan*/, int /*<<< orphan*/ *);
int initgroups(const char *user, gid_t group) { return setgroups(0, NULL); }


x86 assembly (clang, -O0):
<initgroups>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <setgroups@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initgroups>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <setgroups@plt>

LLVM IR (-O0):
define i32 @initgroups(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 @setgroups(i32 0, i32* null)
ret i32 %5
}

LLVM IR (-O2):
define i32 @initgroups(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @setgroups(i32 0, i32* null)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void ErrorHandling(char *message) {
  fputs(message, stderr);
  fputc('\n', stderr);
  exit(1);
}


x86 assembly (clang, -O0):
<ErrorHandling>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<ErrorHandling>:
push   %rbx
mov    0x2ea8(%rip),%rbx
mov    (%rbx),%esi
call   1030 <fputs@plt>
mov    (%rbx),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @ErrorHandling(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fputc(i8 signext 10, i32 %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
define void @ErrorHandling(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputc(i8 signext 10, i32 %4)
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ _SC_HOST_NAME_MAX;
long sysconf(int /*<<< orphan*/);
size_t get_hostname_max(void) {
  long len = sysconf(_SC_HOST_NAME_MAX);
  if (0 < len)
    return len;
  return 64;
}


x86 assembly (clang, -O0):
<get_hostname_max>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x10(%rbp),%rax
jge    1143 <get_hostname_max+0x33>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114b <get_hostname_max+0x3b>
movq   $0x40,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_hostname_max>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
test   %rax,%rax
mov    $0x40,%ecx
cmovle %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@_SC_HOST_NAME_MAX = global i32 0
define i64 @get_hostname_max() {
%1 = alloca i64
%2 = alloca i64
%3 = load i32, i32* @_SC_HOST_NAME_MAX
%4 = call i64 @sysconf(i32 %3)
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = icmp slt i64 0, %5
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i64, i64* %2
store i64 %8, i64* %1
br label %10
9: ; preds = %0
store i64 64, i64* %1
br label %10
10: ; preds = %9, %7
%11 = load i64, i64* %1
ret i64 %11
}

LLVM IR (-O2):
@_SC_HOST_NAME_MAX = global i32 0
define i64 @get_hostname_max() {
%1 = load i32, i32* @_SC_HOST_NAME_MAX
%2 = tail call i64 @sysconf(i32 %1)
%3 = icmp sgt i64 %2, 0
%4 = select i1 %3, i64 %2, i64 64
ret i64 %4
}
/* Type definitions */
struct snd_ac97 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ snd_ac97_update_bits(struct snd_ac97 *, int, int, int);
int patch_cx20551(struct snd_ac97 *ac97) {
  snd_ac97_update_bits(ac97, 0x5c, 0x01, 0x01);
  return 0;
}


x86 assembly (clang, -O0):
<patch_cx20551>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x5c,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <snd_ac97_update_bits@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<patch_cx20551>:
push   %rax
mov    $0x5c,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1030 <snd_ac97_update_bits@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.snd_ac97 = type { i32 }
define i32 @patch_cx20551(%struct.snd_ac97* %0) {
%2 = alloca %struct.snd_ac97*
store %struct.snd_ac97* %0, %struct.snd_ac97** %2
%3 = load %struct.snd_ac97*, %struct.snd_ac97** %2
%4 = call i32 @snd_ac97_update_bits(%struct.snd_ac97* %3, i32 92, i32 1, i32 1)
ret i32 0
}

LLVM IR (-O2):
%struct.snd_ac97 = type { i32 }
define i32 @patch_cx20551(%struct.snd_ac97* %0) {
%2 = tail call i32 @snd_ac97_update_bits(%struct.snd_ac97* %0, i32 92, i32 1, i32 1)
ret i32 0
}
/* Type definitions */
typedef int int16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int16_t a, b;
  scanf("%d", &a);
  scanf("%d", &b);
  printf("SOMA = %d\n", a + b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
lea    0xeba(%rip),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    0x8(%rsp),%esi
add    0xc(%rsp),%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [11 x i8] c"SOMA = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [11 x i8] c"SOMA = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = add nsw i32 %8, %7
%10 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}
long kvm_hypercall0_amd(unsigned int nr) {
  long ret;
  asm volatile(".byte 0x0f,0x01,0xd9" : "=a"(ret) : "a"(nr));
  return ret;
}


x86 assembly (clang, -O0):
<kvm_hypercall0_amd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
vmmcall
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_hypercall0_amd>:
mov    %edi,%eax
vmmcall
ret

LLVM IR (-O0):
define i64 @kvm_hypercall0_amd(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 asm sideeffect ".byte 0x0f,0x01,0xd9", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @kvm_hypercall0_amd(i32 %0) {
%2 = tail call i64 asm sideeffect ".byte 0x0f,0x01,0xd9", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i64 %2
}
void gtk_color_selection_get_type() {}


x86 assembly (clang, -O0):
<gtk_color_selection_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_color_selection_get_type>:
ret

LLVM IR (-O0):
define void @gtk_color_selection_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_color_selection_get_type() {
ret void
}
void event_list_statistics() {}


x86 assembly (clang, -O0):
<event_list_statistics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_list_statistics>:
ret

LLVM IR (-O0):
define void @event_list_statistics() {
ret void
}

LLVM IR (-O2):
define void @event_list_statistics() {
ret void
}
in(a, b, c) { return (a <= b && b <= c); }


x86 assembly (clang, -O0):
<in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0xd(%rbp)
jg     112a <in+0x2a>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in>:
cmp    %esi,%edi
setle  %al
cmp    %edx,%esi
setle  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @in(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = icmp sle i32 %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @in(i32 %0, i32 %1, i32 %2) {
%4 = icmp sle i32 %0, %1
%5 = icmp sle i32 %1, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
int make_permutation(int num_primes, int perm[]) {
  unsigned char p[33] = {2,  3,  5,  7,   11,  13,  17,  19,  23,  29,  31,
                         37, 41, 43, 47,  53,  59,  61,  67,  71,  73,  79,
                         83, 89, 97, 101, 103, 107, 109, 113, 127, 131, 137};
  perm[0] = 1;
  perm[1] = 0;
  perm[2] = 3;
  perm[3] = 4;
  perm[4] = 2;
  perm[5] = 6;
  perm[6] = 7;
  perm[7] = 8;
  perm[8] = 9;
  perm[9] = 5;
  return 10;
}


x86 assembly (clang, -O0):
<make_permutation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xed6(%rip),%rsi
mov    $0x21,%edx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,0x4(%rax)
mov    -0x10(%rbp),%rax
movl   $0x3,0x8(%rax)
mov    -0x10(%rbp),%rax
movl   $0x4,0xc(%rax)
mov    -0x10(%rbp),%rax
movl   $0x2,0x10(%rax)
mov    -0x10(%rbp),%rax
movl   $0x6,0x14(%rax)
mov    -0x10(%rbp),%rax
movl   $0x7,0x18(%rax)
mov    -0x10(%rbp),%rax
movl   $0x8,0x1c(%rax)
mov    -0x10(%rbp),%rax
movl   $0x9,0x20(%rax)
mov    -0x10(%rbp),%rax
movl   $0x5,0x24(%rax)
mov    $0xa,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_permutation>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rsi)
movaps 0xeff(%rip),%xmm0
movups %xmm0,0x10(%rsi)
movabs $0x500000009,%rax
mov    %rax,0x20(%rsi)
mov    $0xa,%eax
ret

LLVM IR (-O0):
@__const.make_permutation.p = [33 x i8] c"\02\03\05\07\0B\0D\11\13\17\1D\1F%)+/5;=CGIOSYaegkmq\7F\83\89"
define i32 @make_permutation(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca [33 x i8]
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = bitcast [33 x i8]* %5 to i8*
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 1, i32* %8
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i64 1
store i32 0, i32* %10
%11 = load i32*, i32** %4
%12 = getelementptr inbounds i32, i32* %11, i64 2
store i32 3, i32* %12
%13 = load i32*, i32** %4
%14 = getelementptr inbounds i32, i32* %13, i64 3
store i32 4, i32* %14
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 4
store i32 2, i32* %16
%17 = load i32*, i32** %4
%18 = getelementptr inbounds i32, i32* %17, i64 5
store i32 6, i32* %18
%19 = load i32*, i32** %4
%20 = getelementptr inbounds i32, i32* %19, i64 6
store i32 7, i32* %20
%21 = load i32*, i32** %4
%22 = getelementptr inbounds i32, i32* %21, i64 7
store i32 8, i32* %22
%23 = load i32*, i32** %4
%24 = getelementptr inbounds i32, i32* %23, i64 8
store i32 9, i32* %24
%25 = load i32*, i32** %4
%26 = getelementptr inbounds i32, i32* %25, i64 9
store i32 5, i32* %26
ret i32 10
}

LLVM IR (-O2):
define i32 @make_permutation(i32 %0, i32* nocapture writeonly %1) {
%3 = bitcast i32* %1 to <4 x i32>*
store <4 x i32> <i32 1, i32 0, i32 3, i32 4>, <4 x i32>* %3
%4 = getelementptr inbounds i32, i32* %1, i64 4
%5 = bitcast i32* %4 to <4 x i32>*
store <4 x i32> <i32 2, i32 6, i32 7, i32 8>, <4 x i32>* %5
%6 = getelementptr inbounds i32, i32* %1, i64 8
store i32 9, i32* %6
%7 = getelementptr inbounds i32, i32* %1, i64 9
store i32 5, i32* %7
ret i32 10
}
void cpu_get_switches(unsigned long *p1, unsigned long *p2) { *p1 = *p2 = 0; }


x86 assembly (clang, -O0):
<cpu_get_switches>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_get_switches>:
movq   $0x0,(%rsi)
movq   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @cpu_get_switches(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
store i64 0, i64* %5
%6 = load i64*, i64** %3
store i64 0, i64* %6
ret void
}

LLVM IR (-O2):
define void @cpu_get_switches(i64* nocapture writeonly %0, i64* nocapture writeonly %1) {
store i64 0, i64* %1
store i64 0, i64* %0
ret void
}