xunge/DecIR huggingface dataset:
/* Variables and functions */
int ceil(int /*<<< orphan*/);
int /*<<< orphan*/ log10(int);
char *malloc(int);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *fmt_itos(int i) {
  int length = ceil(log10(i)) + 1;
  char *s = malloc(length * sizeof(char));
  sprintf(s, "%d", i);
  return s;
}


x86 assembly (clang, -O0):
<fmt_itos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <log10@plt>
mov    %eax,%edi
call   1030 <ceil@plt>
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movslq -0x8(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xe7f(%rip),%rsi
call   1060 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_itos>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1050 <log10@plt>
mov    %eax,%edi
call   1030 <ceil@plt>
lea    0x1(%rax),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xe9d(%rip),%rsi
mov    %rax,%rdi
mov    %ebp,%edx
call   1060 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i8* @fmt_itos(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @log10(i32 %5)
%7 = call i32 @ceil(i32 %6)
%8 = add nsw i32 %7, 1
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 1
%12 = trunc i64 %11 to i32
%13 = call i8* @malloc(i32 %12)
store i8* %13, i8** %4
%14 = load i8*, i8** %4
%15 = load i32, i32* %2
%16 = call i32 @sprintf(i8* %14, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %15)
%17 = load i8*, i8** %4
ret i8* %17
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define noalias i8* @fmt_itos(i32 %0) {
%2 = tail call i32 @log10(i32 %0)
%3 = tail call i32 @ceil(i32 %2)
%4 = add nsw i32 %3, 1
%5 = tail call i8* @malloc(i32 %4)
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %5, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateIntClear(uint32_t ui32IntFlags) {
  ASSERT(!(ui32IntFlags & ~(0x00000008 | 0x00000004 | 0x00000080 | 0x00000040 |
                            0x00000020 | 0x00000001 | 0x00000010)));
  (*((volatile uint32_t *)(0x400FC020))) |= ui32IntFlags;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffff02,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
mov    $0x400fc020,%ecx
mov    (%rcx),%ecx
or     %eax,%ecx
mov    $0x400fc020,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateIntClear>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   $0xffffff02,%ebx
sete   %dil
call   1040 <ASSERT@plt>
or     %ebx,0x400fc020
xor    %eax,%eax
pop    %rbx
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateIntClear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -254
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %2
%10 = load volatile i32, i32* inttoptr (i64 1074774048 to i32*)
%11 = or i32 %10, %9
store volatile i32 %11, i32* inttoptr (i64 1074774048 to i32*)
%12 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateIntClear(i32 %0) {
%2 = and i32 %0, -254
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = load volatile i32, i32* inttoptr (i64 1074774048 to i32*)
%7 = or i32 %6, %0
store volatile i32 %7, i32* inttoptr (i64 1074774048 to i32*)
%8 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
extern unsigned char __inbc_p(unsigned short port) {
  unsigned char _v;
  __asm__ __volatile__("in"
                       "b"
                       " %"
                       ""
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "id"(port));
  __asm__ __volatile__("outb %al,$0x80");
  return _v;
}


x86 assembly (clang, -O0):
<__inbc_p>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
out    %al,$0x80
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inbc_p>:
mov    %edi,%edx
in     (%dx),%al
out    %al,$0x80
ret

LLVM IR (-O0):
define zeroext i8 @__inbc_p(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb $1,$0", "={ax},i{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @__inbc_p(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb $1,$0", "={ax},i{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
tail call void asm sideeffect "outb %al,$$0x80", "~{dirflag},~{fpsr},~{flags}"()
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ w5100_writeSHAR(int /*<<< orphan*/ *);
void w5100_setMACAddress(uint8_t *addr) { w5100_writeSHAR(addr); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <w5100_writeSHAR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
jmp    1030 <w5100_writeSHAR@plt>

LLVM IR (-O0):
define void @w5100_setMACAddress(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @w5100_writeSHAR(i32* %3)
ret void
}

LLVM IR (-O2):
define void @w5100_setMACAddress(i32* %0) {
%2 = tail call i32 @w5100_writeSHAR(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  printf("hello world, from %s\n", "randy");
  printf("this only gets printed if TESTMODULE is defined.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xee9(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xee7(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"hello world, from %s\0A\00"
@.str.1 = [6 x i8] c"randy\00"
@.str.2 = [50 x i8] c"this only gets printed if TESTMODULE is defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"hello world, from %s\0A\00"
@.str.1 = [6 x i8] c"randy\00"
@str = [49 x i8] c"this only gets printed if TESTMODULE is defined.\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str, i64 0, i64 0))
ret i32 0
}
char *strcpy(dst, src)
char *dst;
const char *src;
{
  register char *dscan = dst;
  register const char *sscan = src;
  if (!sscan)
    sscan = "";
  while ((*dscan++ = *sscan++) != '\0')
    continue;
  return (dst);
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1132 <strcpy+0x32>
lea    0xed2(%rip),%rax
mov    %rax,-0x20(%rbp)
jmp    1137 <strcpy+0x37>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     116a <strcpy+0x6a>
jmp    1137 <strcpy+0x37>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
test   %rsi,%rsi
lea    0xef3(%rip),%rdi
cmovne %rsi,%rdi
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rdi,%rdx,1),%ecx
mov    %cl,(%rax,%rdx,1)
add    $0x1,%rdx
test   %cl,%cl
jne    1120 <strcpy+0x20>
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %2
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %6
br label %12
12: ; preds = %11, %2
br label %13
13: ; preds = %21, %12
%14 = load i8*, i8** %6
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %6
%16 = load i8, i8* %14
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %5
store i8 %16, i8* %17
%19 = sext i8 %16 to i32
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %13
br label %13
22: ; preds = %13
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @strcpy(i8* returned writeonly %0, i8* %1) {
%3 = icmp eq i8* %1, null
%4 = select i1 %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %1
br label %5
5: ; preds = %5, %2
%6 = phi i8* [ %0, %2 ], [ %10, %5 ]
%7 = phi i8* [ %4, %2 ], [ %8, %5 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %7
%10 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %9, i8* %6
%11 = icmp eq i8 %9, 0
br i1 %11, label %12, label %5
12: ; preds = %5
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint32_t;

/* Variables and functions */
int /*<<< orphan*/ writes(char *);
int /*<<< orphan*/ writex(int /*<<< orphan*/ const);
void __ecall(uint32_t const mepc, uint32_t mtval) {
  writes("<\nECALL (mepc=");
  writex(mepc);
  writes(", mtval=");
  writex(mtval);
  writes(")\n>");
}


x86 assembly (clang, -O0):
<__ecall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xecb(%rip),%rdi
call   1030 <writes@plt>
mov    -0x4(%rbp),%edi
call   1040 <writex@plt>
lea    0xec6(%rip),%rdi
call   1030 <writes@plt>
mov    -0x8(%rbp),%edi
call   1040 <writex@plt>
lea    0xebb(%rip),%rdi
call   1030 <writes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ecall>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xed2(%rip),%rdi
call   1030 <writes@plt>
mov    %ebp,%edi
call   1040 <writex@plt>
lea    0xece(%rip),%rdi
call   1030 <writes@plt>
mov    %ebx,%edi
call   1040 <writex@plt>
lea    0xec4(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <writes@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"<\0AECALL (mepc=\00"
@.str.1 = [9 x i8] c", mtval=\00"
@.str.2 = [4 x i8] c")\0A>\00"
define void @__ecall(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @writes(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %3
%7 = call i32 @writex(i32 %6)
%8 = call i32 @writes(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%9 = load i32, i32* %4
%10 = call i32 @writex(i32 %9)
%11 = call i32 @writes(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"<\0AECALL (mepc=\00"
@.str.1 = [9 x i8] c", mtval=\00"
@.str.2 = [4 x i8] c")\0A>\00"
define void @__ecall(i32 %0, i32 %1) {
%3 = tail call i32 @writes(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @writex(i32 %0)
%5 = tail call i32 @writes(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 @writex(i32 %1)
%7 = tail call i32 @writes(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int rec(int);
int main(int argc, char const *argv[]) {
  printf("%d\n", rec(4));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1040 <rec@plt>
mov    %eax,%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <rec@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @rec(i32 4)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @rec(i32 4)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint64_t;
struct timespec {
  int tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
uint64_t rtutils_time2ns(const struct timespec *n) {
  return n->tv_nsec + (1000 * 1000000UL) * n->tv_sec;
}


x86 assembly (clang, -O0):
<rtutils_time2ns>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x8(%rbp),%rcx
movslq (%rcx),%rcx
imul   $0x3b9aca00,%rcx,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtutils_time2ns>:
movslq (%rdi),%rax
imul   $0x3b9aca00,%rax,%rax
add    0x8(%rdi),%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define i64 @rtutils_time2ns(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%5 = load i64, i64* %4
%6 = load %struct.timespec*, %struct.timespec** %2
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = sext i32 %8 to i64
%10 = mul i64 1000000000, %9
%11 = add i64 %5, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define i64 @rtutils_time2ns(%struct.timespec* nocapture %0) {
%2 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%3 = load i64, i64* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = mul nsw i64 %6, 1000000000
%8 = add i64 %7, %3
ret i64 %8
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int GPMODE_WCACHING_PAGE;
int fbo_handle_cache_page(uint8_t *buf, size_t buf_len, uint8_t page_control) {
  if (buf_len < 12)
    return -1;
  buf[0] = GPMODE_WCACHING_PAGE;
  buf[1] = 10;
  if (page_control != 1) {
    buf[2] = 4;
  }
  return 12;
}


x86 assembly (clang, -O0):
<fbo_handle_cache_page>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpq   $0xc,-0x18(%rbp)
jae    1126 <fbo_handle_cache_page+0x26>
movl   $0xffffffff,-0x4(%rbp)
jmp    115c <fbo_handle_cache_page+0x5c>
mov    0x2ebb(%rip),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
movl   $0xa,0x4(%rax)
cmpl   $0x1,-0x1c(%rbp)
je     1155 <fbo_handle_cache_page+0x55>
mov    -0x10(%rbp),%rax
movl   $0x4,0x8(%rax)
movl   $0xc,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fbo_handle_cache_page>:
mov    $0xffffffff,%eax
cmp    $0xc,%rsi
jb     112e <fbo_handle_cache_page+0x2e>
mov    0x2ed6(%rip),%rax
mov    (%rax),%eax
mov    %eax,(%rdi)
movl   $0xa,0x4(%rdi)
mov    $0xc,%eax
cmp    $0x1,%edx
je     112e <fbo_handle_cache_page+0x2e>
movl   $0x4,0x8(%rdi)
ret

LLVM IR (-O0):
@GPMODE_WCACHING_PAGE = global i32 0
define i32 @fbo_handle_cache_page(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = icmp ult i64 %8, 12
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 -1, i32* %4
br label %23
11: ; preds = %3
%12 = load i32, i32* @GPMODE_WCACHING_PAGE
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 0
store i32 %12, i32* %14
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 1
store i32 10, i32* %16
%17 = load i32, i32* %7
%18 = icmp ne i32 %17, 1
br i1 %18, label %19, label %22
19: ; preds = %11
%20 = load i32*, i32** %5
%21 = getelementptr inbounds i32, i32* %20, i64 2
store i32 4, i32* %21
br label %22
22: ; preds = %19, %11
store i32 12, i32* %4
br label %23
23: ; preds = %22, %10
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
@GPMODE_WCACHING_PAGE = global i32 0
define i32 @fbo_handle_cache_page(i32* nocapture writeonly %0, i64 %1, i32 %2) {
%4 = icmp ult i64 %1, 12
br i1 %4, label %11, label %5
5: ; preds = %3
%6 = load i32, i32* @GPMODE_WCACHING_PAGE
store i32 %6, i32* %0
%7 = getelementptr inbounds i32, i32* %0, i64 1
store i32 10, i32* %7
%8 = icmp eq i32 %2, 1
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = getelementptr inbounds i32, i32* %0, i64 2
store i32 4, i32* %10
br label %11
11: ; preds = %5, %9, %3
%12 = phi i32 [ -1, %3 ], [ 12, %9 ], [ 12, %5 ]
ret i32 %12
}
void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init) {}


x86 assembly (clang, -O0):
<kvm_cpu__select_features>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_cpu__select_features>:
ret

LLVM IR (-O0):
%struct.kvm = type opaque
%struct.kvm_vcpu_init = type opaque
define void @kvm_cpu__select_features(%struct.kvm* %0, %struct.kvm_vcpu_init* %1) {
%3 = alloca %struct.kvm*
%4 = alloca %struct.kvm_vcpu_init*
store %struct.kvm* %0, %struct.kvm** %3
store %struct.kvm_vcpu_init* %1, %struct.kvm_vcpu_init** %4
ret void
}

LLVM IR (-O2):
%struct.kvm = type opaque
%struct.kvm_vcpu_init = type opaque
define void @kvm_cpu__select_features(%struct.kvm* nocapture %0, %struct.kvm_vcpu_init* nocapture %1) {
ret void
}
/* Type definitions */
struct rtbst_table {
  int dummy;
};

/* Variables and functions */
void **rtbst_probe(struct rtbst_table *, void *);
void *rtbst_replace(struct rtbst_table *table, void *item) {
  void **p = rtbst_probe(table, item);
  if (p == NULL || *p == item)
    return NULL;
  else {
    void *r = *p;
    *p = item;
    return r;
  }
}


x86 assembly (clang, -O0):
<rtbst_replace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <rtbst_probe@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     114d <rtbst_replace+0x3d>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    115a <rtbst_replace+0x4a>
movq   $0x0,-0x8(%rbp)
jmp    1178 <rtbst_replace+0x68>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtbst_replace>:
push   %rbx
mov    %rsi,%rbx
call   1030 <rtbst_probe@plt>
test   %rax,%rax
je     112e <rtbst_replace+0x1e>
mov    %rax,%rcx
mov    (%rax),%rax
cmp    %rbx,%rax
je     112e <rtbst_replace+0x1e>
mov    %rbx,(%rcx)
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.rtbst_table = type { i32 }
define i8* @rtbst_replace(%struct.rtbst_table* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca %struct.rtbst_table*
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i8*
store %struct.rtbst_table* %0, %struct.rtbst_table** %4
store i8* %1, i8** %5
%8 = load %struct.rtbst_table*, %struct.rtbst_table** %4
%9 = load i8*, i8** %5
%10 = call i8** @rtbst_probe(%struct.rtbst_table* %8, i8* %9)
store i8** %10, i8*** %6
%11 = load i8**, i8*** %6
%12 = icmp eq i8** %11, null
br i1 %12, label %18, label %13
13: ; preds = %2
%14 = load i8**, i8*** %6
%15 = load i8*, i8** %14
%16 = load i8*, i8** %5
%17 = icmp eq i8* %15, %16
br i1 %17, label %18, label %19
18: ; preds = %13, %2
store i8* null, i8** %3
br label %25
19: ; preds = %13
%20 = load i8**, i8*** %6
%21 = load i8*, i8** %20
store i8* %21, i8** %7
%22 = load i8*, i8** %5
%23 = load i8**, i8*** %6
store i8* %22, i8** %23
%24 = load i8*, i8** %7
store i8* %24, i8** %3
br label %25
25: ; preds = %19, %18
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
%struct.rtbst_table = type { i32 }
define i8* @rtbst_replace(%struct.rtbst_table* %0, i8* %1) {
%3 = tail call i8** @rtbst_probe(%struct.rtbst_table* %0, i8* %1)
%4 = icmp eq i8** %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, %1
br i1 %7, label %9, label %8
8: ; preds = %5
store i8* %1, i8** %3
br label %9
9: ; preds = %2, %5, %8
%10 = phi i8* [ %6, %8 ], [ null, %5 ], [ null, %2 ]
ret i8* %10
}
/* Variables and functions */
void *vgscpu_create_specific_context(int, int, int);
void *vgscpu_create_context() {
  return vgscpu_create_specific_context(65536 - 4, 262144, 4194304);
}


x86 assembly (clang, -O0):
<vgscpu_create_context>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffc,%edi
mov    $0x40000,%esi
mov    $0x400000,%edx
call   1030 <vgscpu_create_specific_context@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vgscpu_create_context>:
mov    $0xfffc,%edi
mov    $0x40000,%esi
mov    $0x400000,%edx
jmp    1030 <vgscpu_create_specific_context@plt>

LLVM IR (-O0):
define i8* @vgscpu_create_context() {
%1 = call i8* @vgscpu_create_specific_context(i32 65532, i32 262144, i32 4194304)
ret i8* %1
}

LLVM IR (-O2):
define i8* @vgscpu_create_context() {
%1 = tail call i8* @vgscpu_create_specific_context(i32 65532, i32 262144, i32 4194304)
ret i8* %1
}
void kset_bit(int nr, volatile void *addr) {
  asm volatile("btsl %1, %0" : "=m"(*(volatile long *)addr) : "Ir"(nr));
}


x86 assembly (clang, -O0):
<kset_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
bts    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kset_bit>:
bts    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @kset_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i64*
%7 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @kset_bit(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i64*
tail call void asm sideeffect "btsl $1, $0", "=*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i32 %0)
ret void
}
void dbg_dump_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap, int cat) {
  return;
}


x86 assembly (clang, -O0):
<dbg_dump_heap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_dump_heap>:
ret

LLVM IR (-O0):
%struct.ubifs_info = type opaque
%struct.ubifs_lpt_heap = type opaque
define void @dbg_dump_heap(%struct.ubifs_info* %0, %struct.ubifs_lpt_heap* %1, i32 %2) {
%4 = alloca %struct.ubifs_info*
%5 = alloca %struct.ubifs_lpt_heap*
%6 = alloca i32
store %struct.ubifs_info* %0, %struct.ubifs_info** %4
store %struct.ubifs_lpt_heap* %1, %struct.ubifs_lpt_heap** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.ubifs_info = type opaque
%struct.ubifs_lpt_heap = type opaque
define void @dbg_dump_heap(%struct.ubifs_info* nocapture %0, %struct.ubifs_lpt_heap* nocapture %1, i32 %2) {
ret void
}
long double math_abs(long double value) {
  long double result = value;
  if (value < 0)
    result = -value;
  return result;
}


x86 assembly (clang, -O0):
<math_abs>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldz
fucomip %st(1),%st
fstp   %st(0)
jbe    112c <math_abs+0x2c>
jmp    1124 <math_abs+0x24>
fldt   -0x10(%rbp)
fchs
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_abs>:
fldt   0x8(%rsp)
fldz
fucomip %st(1),%st
fld    %st(0)
fchs
fxch   %st(1)
fcmovnbe %st(1),%st
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @math_abs(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
store x86_fp80 %4, x86_fp80* %3
%5 = load x86_fp80, x86_fp80* %2
%6 = fcmp olt x86_fp80 %5, 0xK00000000000000000000
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load x86_fp80, x86_fp80* %2
%9 = fneg x86_fp80 %8
store x86_fp80 %9, x86_fp80* %3
br label %10
10: ; preds = %7, %1
%11 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %11
}

LLVM IR (-O2):
define x86_fp80 @math_abs(x86_fp80 %0) {
%2 = fcmp olt x86_fp80 %0, 0xK00000000000000000000
%3 = fneg x86_fp80 %0
%4 = select i1 %2, x86_fp80 %3, x86_fp80 %0
ret x86_fp80 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *run(void *param) {
  printf("\n");
  printf("\n");
  printf("\n");
  return NULL;
}


x86 assembly (clang, -O0):
<run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i8* @run(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @run(i8* nocapture readnone %0) {
%2 = tail call i32 @putchar(i32 10)
%3 = tail call i32 @putchar(i32 10)
%4 = tail call i32 @putchar(i32 10)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ readCommand();
void activateUartConsole(void) {
  while (1)
    readCommand();
}


x86 assembly (clang, -O0):
<activateUartConsole>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <activateUartConsole+0x9>
mov    $0x0,%al
call   1030 <readCommand@plt>
jmp    1119 <activateUartConsole+0x9>

x86 assembly (clang, -O2):
<activateUartConsole>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <readCommand@plt>
jmp    1120 <activateUartConsole+0x10>

LLVM IR (-O0):
define void @activateUartConsole() {
br label %1
1: ; preds = %0, %1
%2 = call i32 (...) @readCommand()
br label %1
}

LLVM IR (-O2):
define void @activateUartConsole() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @readCommand()
br label %1
}
/* Variables and functions */
int EXIT_FAILURE;
int EXIT_SUCCESS;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *);
int main() {
  char *some_memory;
  int exit_code = EXIT_FAILURE;
  some_memory = (char *)malloc((1024));
  if (some_memory != NULL) {
    free(some_memory);
    printf("Memory allocated and freed again\n");
    exit_code = EXIT_SUCCESS;
  }
  exit(exit_code);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2e8a(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    $0x400,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1195 <main+0x55>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
lea    0xe7c(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e48(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2e98(%rip),%rax
mov    (%rax),%ebx
mov    $0x400,%edi
call   1050 <malloc@plt>
test   %rax,%rax
je     1176 <main+0x36>
mov    %rax,%rdi
call   1030 <free@plt>
lea    0xe98(%rip),%rdi
call   1040 <puts@plt>
mov    0x2e64(%rip),%rax
mov    (%rax),%ebx
mov    %ebx,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
@.str = [34 x i8] c"Memory allocated and freed again\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* @EXIT_FAILURE
store i32 %4, i32* %3
%5 = call i64 @malloc(i32 1024)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %2
%7 = load i8*, i8** %2
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %14
9: ; preds = %0
%10 = load i8*, i8** %2
%11 = call i32 @free(i8* %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* @EXIT_SUCCESS
store i32 %13, i32* %3
br label %14
14: ; preds = %9, %0
%15 = load i32, i32* %3
%16 = call i32 @exit(i32 %15)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
@str = [33 x i8] c"Memory allocated and freed again\00"
define i32 @main() {
%1 = load i32, i32* @EXIT_FAILURE
%2 = tail call i64 @malloc(i32 1024)
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %0
%5 = inttoptr i64 %2 to i8*
%6 = tail call i32 @free(i8* %5)
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_SUCCESS
br label %9
9: ; preds = %4, %0
%10 = phi i32 [ %8, %4 ], [ %1, %0 ]
%11 = tail call i32 @exit(i32 %10)
unreachable
}
void caller_1_2_1_2_1_2_2() {}


x86 assembly (clang, -O0):
<caller_1_2_1_2_1_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_1_2_1_2_1_2_2>:
ret

LLVM IR (-O0):
define void @caller_1_2_1_2_1_2_2() {
ret void
}

LLVM IR (-O2):
define void @caller_1_2_1_2_1_2_2() {
ret void
}
unsigned long XLastKnownRequestProcessed() {}


x86 assembly (clang, -O0):
<XLastKnownRequestProcessed>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XLastKnownRequestProcessed>:
ret

LLVM IR (-O0):
define i64 @XLastKnownRequestProcessed() {
%1 = alloca i64
%2 = load i64, i64* %1
ret i64 %2
}

LLVM IR (-O2):
define i64 @XLastKnownRequestProcessed() {
ret i64 undef
}
long mystrlen(char *s) {
  long l;
  l = 0;
  while (s[l]) {
    l = l + 1;
  }
  return l;
}


x86 assembly (clang, -O0):
<mystrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1133 <mystrlen+0x33>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <mystrlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <mystrlen+0x10>
ret

LLVM IR (-O0):
define i64 @mystrlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i64, i64* %3
%12 = add nsw i64 %11, 1
store i64 %12, i64* %3
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @mystrlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw nsw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t to_int32(const uint8_t *bytes) {
  return (uint32_t)bytes[0] | ((uint32_t)bytes[1] << 8) |
         ((uint32_t)bytes[2] << 16) | ((uint32_t)bytes[3] << 24);
}


x86 assembly (clang, -O0):
<to_int32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x10(%rcx),%rcx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x18(%rcx),%rcx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_int32>:
mov    0x8(%rdi),%ecx
mov    0x10(%rdi),%edx
shl    $0x8,%ecx
or     (%rdi),%ecx
shl    $0x10,%edx
mov    0x18(%rdi),%eax
shl    $0x18,%eax
or     %edx,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @to_int32(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = load i64*, i64** %2
%8 = getelementptr inbounds i64, i64* %7, i64 1
%9 = load i64, i64* %8
%10 = trunc i64 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i64*, i64** %2
%14 = getelementptr inbounds i64, i64* %13, i64 2
%15 = load i64, i64* %14
%16 = trunc i64 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i64*, i64** %2
%20 = getelementptr inbounds i64, i64* %19, i64 3
%21 = load i64, i64* %20
%22 = trunc i64 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @to_int32(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = getelementptr inbounds i64, i64* %0, i64 1
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i64, i64* %0, i64 2
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i64, i64* %0, i64 3
%15 = load i64, i64* %14
%16 = trunc i64 %15 to i32
%17 = shl i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
unsigned int BKDRHash(char *str) {
  unsigned int seed = 131;
  unsigned int hash = 0;
  while (*str) {
    hash = hash * seed + (*str++);
  }
  return (hash & 0x7FFFFFFF);
}


x86 assembly (clang, -O0):
<BKDRHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x83,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <BKDRHash+0x46>
mov    -0x10(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <BKDRHash+0x16>
mov    -0x10(%rbp),%eax
and    $0x7fffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BKDRHash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <BKDRHash+0x2c>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x83,%eax,%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <BKDRHash+0x10>
and    $0x7fffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @BKDRHash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 131, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %5
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = mul i32 %10, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = add i32 %12, %16
store i32 %17, i32* %4
br label %5
18: ; preds = %5
%19 = load i32, i32* %4
%20 = and i32 %19, 2147483647
ret i32 %20
}

LLVM IR (-O2):
define i32 @BKDRHash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul i32 %6, 131
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = sext i8 %5 to i32
%11 = add i32 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = and i32 %11, 2147483647
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
/* Type definitions */
typedef int uint_least32_t;

/* Variables and functions */
int foo(uint_least32_t cc) {
  while (cc >> 16) {
    cc = (cc & 0xffff) + (cc >> 16);
  }
  return ((unsigned short)(cc)) == ((unsigned short)(-1));
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
cmp    $0x0,%eax
je     112e <foo+0x2e>
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <foo+0x7>
mov    -0x4(%rbp),%eax
movzwl %ax,%eax
cmp    $0xffff,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
cmp    $0x10000,%edi
jb     1122 <foo+0x22>
nopl   0x0(%rax,%rax,1)
mov    %edi,%eax
sar    $0x10,%eax
movzwl %di,%edi
add    %eax,%edi
cmp    $0xffff,%edi
ja     1110 <foo+0x10>
xor    %eax,%eax
cmp    $0xffff,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = ashr i32 %4, 16
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i32, i32* %2
%9 = and i32 %8, 65535
%10 = load i32, i32* %2
%11 = ashr i32 %10, 16
%12 = add nsw i32 %9, %11
store i32 %12, i32* %2
br label %3
13: ; preds = %3
%14 = load i32, i32* %2
%15 = trunc i32 %14 to i16
%16 = zext i16 %15 to i32
%17 = icmp eq i32 %16, 65535
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp ult i32 %0, 65536
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = ashr i32 %4, 16
%6 = and i32 %4, 65535
%7 = add nsw i32 %6, %5
%8 = icmp ult i32 %7, 65536
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ %0, %1 ], [ %7, %3 ]
%11 = icmp eq i32 %10, 65535
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ flockfile(int /*<<< orphan*/ *);
int fputc_unlocked(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ funlockfile(int /*<<< orphan*/ *);
int fputc(int c, FILE *file) {
  flockfile(file);
  int result = fputc_unlocked(c, file);
  funlockfile(file);
  return result;
}


x86 assembly (clang, -O0):
<fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <flockfile@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1050 <fputc_unlocked@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <funlockfile@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputc>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <flockfile@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1050 <fputc_unlocked@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <funlockfile@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fputc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = call i32 @flockfile(i32* %6)
%8 = load i32, i32* %3
%9 = load i32*, i32** %4
%10 = call i32 @fputc_unlocked(i32 %8, i32* %9)
store i32 %10, i32* %5
%11 = load i32*, i32** %4
%12 = call i32 @funlockfile(i32* %11)
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @fputc(i32 %0, i32* nocapture %1) {
%3 = tail call i32 @flockfile(i32* %1)
%4 = tail call i32 @fputc_unlocked(i32 %0, i32* %1)
%5 = tail call i32 @funlockfile(i32* %1)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int hea_test_u64_bit(int /*<<< orphan*/ const, int);
int hea_cq_aer_data_bus_err_check(const __u64 *aer) {
  return hea_test_u64_bit(*aer, 32);
}


x86 assembly (clang, -O0):
<hea_cq_aer_data_bus_err_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    $0x20,%esi
call   1030 <hea_test_u64_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hea_cq_aer_data_bus_err_check>:
mov    (%rdi),%edi
mov    $0x20,%esi
jmp    1030 <hea_test_u64_bit@plt>

LLVM IR (-O0):
define i32 @hea_cq_aer_data_bus_err_check(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @hea_test_u64_bit(i32 %4, i32 32)
ret i32 %5
}

LLVM IR (-O2):
define i32 @hea_cq_aer_data_bus_err_check(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @hea_test_u64_bit(i32 %2, i32 32)
ret i32 %3
}
/* Variables and functions */
float cosf(float);
float nvg__cosf(float a) { return cosf(a); }


x86 assembly (clang, -O0):
<nvg__cosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <cosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvg__cosf>:
jmp    1030 <cosf@plt>

LLVM IR (-O0):
define float @nvg__cosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @cosf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @nvg__cosf(float %0) {
%2 = tail call float @cosf(float %0)
ret float %2
}
bitcount(unsigned x) {
  int b;
  for (b = 0; x != 0; x >>= 1)
    if (x & 01)
      b++;
  return b;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1143 <bitcount+0x43>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1130 <bitcount+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1135 <bitcount+0x35>
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <bitcount+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
br label %15
15: ; preds = %14
%16 = load i32, i32* %2
%17 = lshr i32 %16, 1
store i32 %17, i32* %2
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
/* Variables and functions */
scalar_t__ floor(double);
int floori(double x) { return (int)floor(x); }


x86 assembly (clang, -O0):
<floori>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<floori>:
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @floori(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @floor(double %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @floori(double %0) {
%2 = tail call i64 @floor(double %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ closeSerialPort();
void close_packet() { closeSerialPort(); }


x86 assembly (clang, -O0):
<close_packet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <closeSerialPort@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_packet>:
xor    %eax,%eax
jmp    1030 <closeSerialPort@plt>

LLVM IR (-O0):
define void @close_packet() {
%1 = call i32 (...) @closeSerialPort()
ret void
}

LLVM IR (-O2):
define void @close_packet() {
%1 = tail call i32 (...) @closeSerialPort()
ret void
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/, char *, int, int);
int shim_cacheflush(char *addr, int nbytes, int cache) {
  return shim_enosys(0, addr, nbytes, cache);
}


x86 assembly (clang, -O0):
<shim_cacheflush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_cacheflush>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_cacheflush(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @shim_enosys(i32 0, i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @shim_cacheflush(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @shim_enosys(i32 0, i8* %0, i32 %1, i32 %2)
ret i32 %4
}