xunge/DecIR huggingface dataset:
/* Variables and functions */
int func(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i = func(10);
  printf("%d\n", i);
  i = func(10);
  printf("%d\n", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1040 <func@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
mov    $0xa,%edi
call   1040 <func@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xa,%edi
call   1040 <func@plt>
lea    0xece(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    $0xa,%edi
call   1040 <func@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @func(i32 10)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @func(i32 10)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @func(i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @func(i32 10)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ putfun(char *, int, char *);
void accelerator_set_default_mod_mask(char *setting) {
  putfun("gtk_accelerator_set_default_mod_mask", 1, setting);
  free(setting);
}


x86 assembly (clang, -O0):
<accelerator_set_default_mod_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xec9(%rip),%rdi
mov    $0x1,%esi
call   1040 <putfun@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<accelerator_set_default_mod_mask>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    $0x1,%esi
mov    %rbx,%rdx
call   1040 <putfun@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"gtk_accelerator_set_default_mod_mask\00"
define void @accelerator_set_default_mod_mask(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @putfun(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 1, i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"gtk_accelerator_set_default_mod_mask\00"
define void @accelerator_set_default_mod_mask(i8* %0) {
%2 = tail call i32 @putfun(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 1, i8* %0)
%3 = tail call i32 @free(i8* %0)
ret void
}
int neg(int a) { return (-a) != 0; }


x86 assembly (clang, -O0):
<neg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<neg>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @neg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @neg(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
void Init_GBCPU(void) {}


x86 assembly (clang, -O0):
<Init_GBCPU>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init_GBCPU>:
ret

LLVM IR (-O0):
define void @Init_GBCPU() {
ret void
}

LLVM IR (-O2):
define void @Init_GBCPU() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_lvector(unsigned long *v, long nl, long nh) {
  free((char *)(v + nl - 1));
}


x86 assembly (clang, -O0):
<free_lvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_lvector>:
lea    (%rdi,%rsi,8),%rdi
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_lvector(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i64, i64* %7, i64 %8
%10 = getelementptr inbounds i64, i64* %9, i64 -1
%11 = bitcast i64* %10 to i8*
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @free_lvector(i64* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i64, i64* %0, i64 %1
%5 = getelementptr inbounds i64, i64* %4, i64 -1
%6 = bitcast i64* %5 to i8*
%7 = tail call i32 @free(i8* %6)
ret void
}
void gtk_icon_set_unref() {}


x86 assembly (clang, -O0):
<gtk_icon_set_unref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_set_unref>:
ret

LLVM IR (-O0):
define void @gtk_icon_set_unref() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_set_unref() {
ret void
}
/* Type definitions */
struct spi_message {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ kfree(struct spi_message *);
void spi_message_free(struct spi_message *m) { kfree(m); }


x86 assembly (clang, -O0):
<spi_message_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <kfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_message_free>:
jmp    1030 <kfree@plt>

LLVM IR (-O0):
%struct.spi_message = type { i32 }
define void @spi_message_free(%struct.spi_message* %0) {
%2 = alloca %struct.spi_message*
store %struct.spi_message* %0, %struct.spi_message** %2
%3 = load %struct.spi_message*, %struct.spi_message** %2
%4 = call i32 @kfree(%struct.spi_message* %3)
ret void
}

LLVM IR (-O2):
%struct.spi_message = type { i32 }
define void @spi_message_free(%struct.spi_message* %0) {
%2 = tail call i32 @kfree(%struct.spi_message* %0)
ret void
}
int ispunct(int c) {
  return !!((c >= ' ') &&
            !(((c >= 'a') && (c <= 'z')) || ((c >= 'A') && (c <= 'Z')) ||
              ((c >= '0') && (c <= '9'))));
}


x86 assembly (clang, -O0):
<ispunct>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     116f <ispunct+0x6f>
cmpl   $0x61,-0x4(%rbp)
jl     112f <ispunct+0x2f>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jle    1167 <ispunct+0x67>
cmpl   $0x41,-0x4(%rbp)
jl     1148 <ispunct+0x48>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jle    1167 <ispunct+0x67>
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x7(%rbp)
jl     1161 <ispunct+0x61>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x7(%rbp)
mov    -0x7(%rbp),%al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
xor    $0xff,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ispunct>:
xor    %eax,%eax
cmp    $0x20,%edi
jl     1123 <ispunct+0x23>
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffa5,%eax
cmp    $0xffffffe6,%eax
setb   %al
add    $0xffffffc6,%edi
cmp    $0xfffffff6,%edi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ispunct(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %28
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 97
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sle i32 %9, 122
br i1 %10, label %25, label %11
11: ; preds = %8, %5
%12 = load i32, i32* %2
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp sle i32 %15, 90
br i1 %16, label %25, label %17
17: ; preds = %14, %11
%18 = load i32, i32* %2
%19 = icmp sge i32 %18, 48
br i1 %19, label %20, label %23
20: ; preds = %17
%21 = load i32, i32* %2
%22 = icmp sle i32 %21, 57
br label %23
23: ; preds = %20, %17
%24 = phi i1 [ false, %17 ], [ %22, %20 ]
br label %25
25: ; preds = %23, %14, %8
%26 = phi i1 [ true, %14 ], [ true, %8 ], [ %24, %23 ]
%27 = xor i1 %26, true
br label %28
28: ; preds = %25, %1
%29 = phi i1 [ false, %1 ], [ %27, %25 ]
%30 = xor i1 %29, true
%31 = xor i1 %30, true
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @ispunct(i32 %0) {
%2 = icmp sgt i32 %0, 31
br i1 %2, label %3, label %11
3: ; preds = %1
%4 = and i32 %0, -33
%5 = add nsw i32 %4, -91
%6 = icmp ult i32 %5, -26
%7 = add nsw i32 %0, -58
%8 = icmp ult i32 %7, -10
%9 = select i1 %6, i1 %8, i1 false
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %10, %3 ]
ret i32 %12
}
int getLCP(unsigned int *first, unsigned int *second) {
  int b = 0;
  unsigned int diff = (*first) ^ (*second);
  unsigned int firstone = (unsigned int)(1 << (32 - 1));
  for (; diff != 0; diff = diff << 1) {
    if (diff & (firstone)) {
      return b;
    }
    b++;
  }
  return 32;
}


x86 assembly (clang, -O0):
<getLCP>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
xor    (%rcx),%eax
mov    %eax,-0x20(%rbp)
movl   $0x80000000,-0x24(%rbp)
cmpl   $0x0,-0x20(%rbp)
je     1164 <getLCP+0x64>
mov    -0x20(%rbp),%eax
and    -0x24(%rbp),%eax
cmp    $0x0,%eax
je     114d <getLCP+0x4d>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116b <getLCP+0x6b>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1129 <getLCP+0x29>
movl   $0x20,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLCP>:
mov    (%rsi),%ecx
xor    (%rdi),%ecx
mov    $0x20,%eax
je     1120 <getLCP+0x20>
xor    %edx,%edx
nopl   (%rax)
test   %ecx,%ecx
js     1121 <getLCP+0x21>
add    $0x1,%edx
lea    (%rcx,%rcx,1),%esi
test   %ecx,%ecx
mov    %esi,%ecx
jne    1110 <getLCP+0x10>
ret
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @getLCP(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 0, i32* %6
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = xor i32 %10, %12
store i32 %13, i32* %7
store i32 -2147483648, i32* %8
br label %14
14: ; preds = %27, %2
%15 = load i32, i32* %7
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %30
17: ; preds = %14
%18 = load i32, i32* %7
%19 = load i32, i32* %8
%20 = and i32 %18, %19
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = load i32, i32* %6
store i32 %23, i32* %3
br label %31
24: ; preds = %17
%25 = load i32, i32* %6
%26 = add nsw i32 %25, 1
store i32 %26, i32* %6
br label %27
27: ; preds = %24
%28 = load i32, i32* %7
%29 = shl i32 %28, 1
store i32 %29, i32* %7
br label %14
30: ; preds = %14
store i32 32, i32* %3
br label %31
31: ; preds = %30, %22
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @getLCP(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = xor i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %2, %11
%8 = phi i32 [ %13, %11 ], [ %5, %2 ]
%9 = phi i32 [ %12, %11 ], [ 0, %2 ]
%10 = icmp sgt i32 %8, -1
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = add nuw nsw i32 %9, 1
%13 = shl nuw i32 %8, 1
%14 = icmp eq i32 %8, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %11, %2
%16 = phi i32 [ 32, %2 ], [ 32, %11 ], [ %9, %7 ]
ret i32 %16
}
float f_param_to_feedrate(const float unit_value) { return unit_value / 60.0f; }


x86 assembly (clang, -O0):
<f_param_to_feedrate>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_param_to_feedrate>:
divss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f_param_to_feedrate(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 6.000000e+01
ret float %4
}

LLVM IR (-O2):
define float @f_param_to_feedrate(float %0) {
%2 = fdiv float %0, 6.000000e+01
ret float %2
}
void winnings(won) int won;
{
  if (won > 0) {
    mvprintw(1, 1, "$%d", won);
  }
}


x86 assembly (clang, -O0):
<winnings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113d <winnings+0x2d>
mov    -0x4(%rbp),%ecx
mov    $0x1,%esi
lea    0xecc(%rip),%rdx
mov    %esi,%edi
mov    $0x0,%al
call   1030 <mvprintw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<winnings>:
test   %edi,%edi
jle    112e <winnings+0x1e>
mov    %edi,%ecx
lea    0xee3(%rip),%rdx
mov    $0x1,%edi
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <mvprintw@plt>
ret

LLVM IR (-O0):
@.str = [4 x i8] c"$%d\00"
define void @winnings(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 (i32, i32, i8*, i32, ...) bitcast (i32 (...)* @mvprintw to i32 (i32, i32, i8*, i32, ...)*)(i32 1, i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"$%d\00"
define void @winnings(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (i32, i32, i8*, i32, ...) bitcast (i32 (...)* @mvprintw to i32 (i32, i32, i8*, i32, ...)*)(i32 1, i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %5
5: ; preds = %3, %1
ret void
}
int f_gt_rc2(float a1) { return !(((a1) > (100))); }


x86 assembly (clang, -O0):
<f_gt_rc2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
ucomiss %xmm1,%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_gt_rc2>:
xor    %eax,%eax
ucomiss 0xef7(%rip),%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @f_gt_rc2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ogt float %3, 1.000000e+02
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @f_gt_rc2(float %0) {
%2 = fcmp ule float %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
q() {}


x86 assembly (clang, -O0):
<q>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<q>:
ret

LLVM IR (-O0):
define i32 @q() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @q() {
ret i32 undef
}
int rsock_shutdown_how_to_int(const char *str, long len, int *valp) {
  switch (len) {
  case 2:
    return -1;
  case 4:
    return -1;
  case 7:
    return -1;
  case 9:
    return -1;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<rsock_shutdown_how_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0xfffffffffffffffe,%rax
mov    %rax,-0x28(%rbp)
sub    $0x7,%rax
ja     116a <rsock_shutdown_how_to_int+0x6a>
mov    -0x28(%rbp),%rax
lea    0xecf(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <rsock_shutdown_how_to_int+0x71>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <rsock_shutdown_how_to_int+0x71>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <rsock_shutdown_how_to_int+0x71>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <rsock_shutdown_how_to_int+0x71>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsock_shutdown_how_to_int>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @rsock_shutdown_how_to_int(i8* %0, i64 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i32* %2, i32** %7
%8 = load i64, i64* %6
switch i64 %8, label %13 [
i64 2, label %9
i64 4, label %10
i64 7, label %11
i64 9, label %12
]
9: ; preds = %3
store i32 -1, i32* %4
br label %14
10: ; preds = %3
store i32 -1, i32* %4
br label %14
11: ; preds = %3
store i32 -1, i32* %4
br label %14
12: ; preds = %3
store i32 -1, i32* %4
br label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %14
14: ; preds = %13, %12, %11, %10, %9
%15 = load i32, i32* %4
ret i32 %15
}

LLVM IR (-O2):
define i32 @rsock_shutdown_how_to_int(i8* nocapture readnone %0, i64 %1, i32* nocapture readnone %2) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ moddep2();
int /*<<< orphan*/ printk(char *);
void moddep(void) {
  printk("To be, or not to be ... ");
  moddep2();
}


x86 assembly (clang, -O0):
<moddep>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printk@plt>
mov    $0x0,%al
call   1040 <moddep2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<moddep>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printk@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <moddep2@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"To be, or not to be ... \00"
define void @moddep() {
%1 = call i32 @printk(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @moddep2()
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"To be, or not to be ... \00"
define void @moddep() {
%1 = tail call i32 @printk(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @moddep2()
ret void
}
/* Variables and functions */
int *malloc(int);
void bug() {
  int *array = malloc(1);
  array[1] = 0;
}


x86 assembly (clang, -O0):
<bug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,0x4(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bug>:
mov    $0x1,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @bug() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 1)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = getelementptr inbounds i32, i32* %3, i64 1
store i32 0, i32* %4
ret void
}

LLVM IR (-O2):
define void @bug() {
%1 = tail call i32* @malloc(i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int _get_u16(int /*<<< orphan*/ const *);
uint32_t _get_u32(const uint8_t *p) {
  return _get_u16(p) | (_get_u16(p + 2) << 16);
}


x86 assembly (clang, -O0):
<_get_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_get_u16@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x8,%rdi
call   1030 <_get_u16@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
shl    $0x10,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_u32>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <_get_u16@plt>
mov    %eax,%ebp
add    $0x8,%rbx
mov    %rbx,%rdi
call   1030 <_get_u16@plt>
shl    $0x10,%eax
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_get_u32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @_get_u16(i32* %3)
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 2
%7 = call i32 @_get_u16(i32* %6)
%8 = shl i32 %7, 16
%9 = or i32 %4, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @_get_u32(i32* %0) {
%2 = tail call i32 @_get_u16(i32* %0)
%3 = getelementptr inbounds i32, i32* %0, i64 2
%4 = tail call i32 @_get_u16(i32* %3)
%5 = shl i32 %4, 16
%6 = or i32 %5, %2
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint64_t;

/* Variables and functions */
int __get_unaligned_be32(int /*<<< orphan*/ const *);
uint64_t __get_unaligned_be64(const uint8_t *p) {
  return (uint64_t)__get_unaligned_be32(p) << 32 | __get_unaligned_be32(p + 4);
}


x86 assembly (clang, -O0):
<__get_unaligned_be64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__get_unaligned_be32@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x10,%rdi
call   1030 <__get_unaligned_be32@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_unaligned_be64>:
push   %rbx
mov    %rdi,%rbx
call   1030 <__get_unaligned_be32@plt>
add    $0x10,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <__get_unaligned_be32@plt>

LLVM IR (-O0):
define i32 @__get_unaligned_be64(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @__get_unaligned_be32(i32* %3)
%5 = shl i32 %4, 32
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 4
%8 = call i32 @__get_unaligned_be32(i32* %7)
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @__get_unaligned_be64(i32* %0) {
%2 = tail call i32 @__get_unaligned_be32(i32* %0)
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = tail call i32 @__get_unaligned_be32(i32* %3)
ret i32 poison
}
void rop3_185_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T & *D;
  stk2 = S | stk3;
  stk1 = *D ^ stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_185_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_185_0_0>:
mov    (%rdi),%al
and    %al,%dl
or     %sil,%dl
xor    %al,%dl
not    %dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_185_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = and i32 %11, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %5
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8*, i8** %4
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = load i8, i8* %8
%27 = zext i8 %26 to i32
%28 = xor i32 %25, %27
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = xor i32 %31, -1
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = load i8*, i8** %4
store i8 %34, i8* %35
ret void
}

LLVM IR (-O2):
define void @rop3_185_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %2
%6 = or i8 %5, %1
%7 = xor i8 %4, %6
%8 = xor i8 %7, -1
store i8 %8, i8* %0
ret void
}
/* Variables and functions */
int configurableLibraryResult();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("Library returns: %i\n", configurableLibraryResult());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <configurableLibraryResult@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <configurableLibraryResult@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Library returns: %i\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @configurableLibraryResult()
%3 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"Library returns: %i\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @configurableLibraryResult()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int endmntent(FILE *f) {
  fclose(f);
  return 1;
}


x86 assembly (clang, -O0):
<endmntent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endmntent>:
push   %rax
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @endmntent(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fclose(i32* %3)
ret i32 1
}

LLVM IR (-O2):
define i32 @endmntent(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int wvline(int /*<<< orphan*/ *, int /*<<< orphan*/, int);
int __darwin_wvline(WINDOW *w, uint32_t c, int n) { return wvline(w, c, n); }


x86 assembly (clang, -O0):
<__darwin_wvline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <wvline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__darwin_wvline>:
jmp    1030 <wvline@plt>

LLVM IR (-O0):
define i32 @__darwin_wvline(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @wvline(i32* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @__darwin_wvline(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @wvline(i32* %0, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ accel_tap_service_unsudirribe();
void tapService_deinit() { accel_tap_service_unsudirribe(); }


x86 assembly (clang, -O0):
<tapService_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <accel_tap_service_unsudirribe@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tapService_deinit>:
xor    %eax,%eax
jmp    1030 <accel_tap_service_unsudirribe@plt>

LLVM IR (-O0):
define void @tapService_deinit() {
%1 = call i32 (...) @accel_tap_service_unsudirribe()
ret void
}

LLVM IR (-O2):
define void @tapService_deinit() {
%1 = tail call i32 (...) @accel_tap_service_unsudirribe()
ret void
}
/* Type definitions */
struct ps_process {
  int dummy;
};
struct ps_bus_event {
  int dummy;
};
struct obus_bus_event {
  int dummy;
};

/* Variables and functions */
int obus_bus_event_register_object(struct obus_bus_event *, int /*<<< orphan*/);
int /*<<< orphan*/ ps_process_object(struct ps_process *);
int ps_bus_event_register_process(struct ps_bus_event *bus_event,
                                  struct ps_process *object) {
  return obus_bus_event_register_object((struct obus_bus_event *)bus_event,
                                        ps_process_object(object));
}


x86 assembly (clang, -O0):
<ps_bus_event_register_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ps_process_object@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1040 <obus_bus_event_register_object@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_bus_event_register_process>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <ps_process_object@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <obus_bus_event_register_object@plt>

LLVM IR (-O0):
%struct.ps_bus_event = type { i32 }
%struct.ps_process = type { i32 }
%struct.obus_bus_event = type { i32 }
define i32 @ps_bus_event_register_process(%struct.ps_bus_event* %0, %struct.ps_process* %1) {
%3 = alloca %struct.ps_bus_event*
%4 = alloca %struct.ps_process*
store %struct.ps_bus_event* %0, %struct.ps_bus_event** %3
store %struct.ps_process* %1, %struct.ps_process** %4
%5 = load %struct.ps_bus_event*, %struct.ps_bus_event** %3
%6 = bitcast %struct.ps_bus_event* %5 to %struct.obus_bus_event*
%7 = load %struct.ps_process*, %struct.ps_process** %4
%8 = call i32 @ps_process_object(%struct.ps_process* %7)
%9 = call i32 @obus_bus_event_register_object(%struct.obus_bus_event* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.ps_bus_event = type { i32 }
%struct.ps_process = type { i32 }
%struct.obus_bus_event = type { i32 }
define i32 @ps_bus_event_register_process(%struct.ps_bus_event* %0, %struct.ps_process* %1) {
%3 = bitcast %struct.ps_bus_event* %0 to %struct.obus_bus_event*
%4 = tail call i32 @ps_process_object(%struct.ps_process* %1)
%5 = tail call i32 @obus_bus_event_register_object(%struct.obus_bus_event* %3, i32 %4)
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
bool is_within(uint32_t lower, uint32_t value, uint32_t upper) {
  return (lower <= value) && (value <= upper);
}


x86 assembly (clang, -O0):
<is_within>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x19(%rbp)
jg     1131 <is_within+0x31>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
setle  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_within>:
cmp    %rsi,%rdi
setle  %al
cmp    %rdx,%rsi
setle  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_within(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = icmp sle i64 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = icmp sle i64 %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_within(i64 %0, i64 %1, i64 %2) {
%4 = icmp sle i64 %0, %1
%5 = icmp sle i64 %1, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ range_dec_normalize();
void range_done_decoding(void) { range_dec_normalize(); }


x86 assembly (clang, -O0):
<range_done_decoding>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <range_dec_normalize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_done_decoding>:
xor    %eax,%eax
jmp    1030 <range_dec_normalize@plt>

LLVM IR (-O0):
define void @range_done_decoding() {
%1 = call i32 (...) @range_dec_normalize()
ret void
}

LLVM IR (-O2):
define void @range_done_decoding() {
%1 = tail call i32 (...) @range_dec_normalize()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ f;

/* Variables and functions */
int /*<<< orphan*/ memcpy(long *, float *, int);
long fb_CVLFROMS(float f) {
  do {
    if ((4) == sizeof(f) && (4) == sizeof(long)) {
      long to;
      memcpy(&to, &f, 4);
      return to;
    } else {
      return (long)0;
    }
  } while (0);
}


x86 assembly (clang, -O0):
<fb_CVLFROMS>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
jmp    110e <fb_CVLFROMS+0xe>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_CVLFROMS>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @fb_CVLFROMS(float %0) {
%2 = alloca float
store float %0, float* %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
ret i64 0
}

LLVM IR (-O2):
define i64 @fb_CVLFROMS(float %0) {
ret i64 0
}
int test_imm_8Cint16_reg(short val) {
  return ((val) & (-0x8C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Cint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff74,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Cint16_reg>:
test   $0xff74,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Cint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -140
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Cint16_reg(i16 signext %0) {
%2 = and i16 %0, -140
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t mapToRange(int number) { return (uint8_t)((number + 32767) / 655.34); }


x86 assembly (clang, -O0):
<mapToRange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x7fff,%eax
cvtsi2sd %eax,%xmm0
movsd  0xee5(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapToRange>:
add    $0x7fff,%edi
cvtsi2sd %edi,%xmm0
divsd  0xeee(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @mapToRange(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 32767
%5 = sitofp i32 %4 to double
%6 = fdiv double %5, 6.553400e+02
%7 = fptosi double %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @mapToRange(i32 %0) {
%2 = add nsw i32 %0, 32767
%3 = sitofp i32 %2 to double
%4 = fdiv double %3, 6.553400e+02
%5 = fptosi double %4 to i32
ret i32 %5
}
void _M2_wrapsock_finish(void) {}


x86 assembly (clang, -O0):
<_M2_wrapsock_finish>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_wrapsock_finish>:
ret

LLVM IR (-O0):
define void @_M2_wrapsock_finish() {
ret void
}

LLVM IR (-O2):
define void @_M2_wrapsock_finish() {
ret void
}
int sys$wait(struct _fab *fab, void *err, void *suc) {
  return ({
    unsigned long resultvar;
    register long int _a3 asm("rdx") = (long)(suc);
    register long int _a2 asm("rsi") = (long)(err);
    register long int _a1 asm("rdi") = (long)(fab);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x82\n\t"
                 : "=a"(resultvar)
                 : "i"(28), "r"(_a1), "r"(_a2), "r"(_a3)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rdi
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    $0x1c,%rax
int    $0x82
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$wait>:
mov    $0x1c,%rax
int    $0x82
ret

LLVM IR (-O0):
%struct._fab = type opaque
define i32 @"sys$wait"(%struct._fab* %0, i8* %1, i8* %2) {
%4 = alloca %struct._fab*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store %struct._fab* %0, %struct._fab** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%12 = load i8*, i8** %6
%13 = ptrtoint i8* %12 to i64
store i64 %13, i64* %8
%14 = load i8*, i8** %5
%15 = ptrtoint i8* %14 to i64
store i64 %15, i64* %9
%16 = load %struct._fab*, %struct._fab** %4
%17 = ptrtoint %struct._fab* %16 to i64
store i64 %17, i64* %10
%18 = load i64, i64* %10
%19 = load i64, i64* %9
%20 = load i64, i64* %8
%21 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x82\0A\09", "={ax},i,{rdi},{rsi},{rdx},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 28, i64 %18, i64 %19, i64 %20)
store i64 %21, i64* %7
%22 = load i64, i64* %7
store i64 %22, i64* %11
%23 = load i64, i64* %11
%24 = trunc i64 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
%struct._fab = type opaque
define i32 @"sys$wait"(%struct._fab* %0, i8* %1, i8* %2) {
%4 = ptrtoint i8* %2 to i64
%5 = ptrtoint i8* %1 to i64
%6 = ptrtoint %struct._fab* %0 to i64
%7 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x82\0A\09", "={ax},i,{rdi},{rsi},{rdx},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 28, i64 %6, i64 %5, i64 %4)
%8 = trunc i64 %7 to i32
ret i32 %8
}
float fade(float t) { return t * t * t * (t * (t * 6 - 15) + 10); }


x86 assembly (clang, -O0):
<fade>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movss  0xeda(%rip),%xmm3
mulss  %xmm3,%xmm2
movss  0xed2(%rip),%xmm3
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm1
movss  0xeba(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fade>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
movss  0xeed(%rip),%xmm2
mulss  %xmm0,%xmm2
addss  0xee5(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  0xedd(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fade(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = fmul float %5, %6
%8 = load float, float* %2
%9 = load float, float* %2
%10 = call float @llvm.fmuladd.f32(float %9, float 6.000000e+00, float -1.500000e+01)
%11 = call float @llvm.fmuladd.f32(float %8, float %10, float 1.000000e+01)
%12 = fmul float %7, %11
ret float %12
}

LLVM IR (-O2):
define float @fade(float %0) {
%2 = fmul float %0, %0
%3 = fmul float %2, %0
%4 = tail call float @llvm.fmuladd.f32(float %0, float 6.000000e+00, float -1.500000e+01)
%5 = tail call float @llvm.fmuladd.f32(float %0, float %4, float 1.000000e+01)
%6 = fmul float %3, %5
ret float %6
}
/* Variables and functions */
scalar_t__ drv_CW_poll();
int /*<<< orphan*/ drv_CW_process_input();
void drv_CW_timer(void __attribute__((unused)) * notused) {
  while (drv_CW_poll()) {
    drv_CW_process_input();
  }
}


x86 assembly (clang, -O0):
<drv_CW_timer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <drv_CW_poll@plt>
cmp    $0x0,%rax
je     1149 <drv_CW_timer+0x29>
mov    $0x0,%al
call   1030 <drv_CW_process_input@plt>
jmp    112c <drv_CW_timer+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_CW_timer>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <drv_CW_poll@plt>
test   %rax,%rax
je     1145 <drv_CW_timer+0x25>
xor    %eax,%eax
call   1030 <drv_CW_process_input@plt>
jmp    1130 <drv_CW_timer+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @drv_CW_timer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %6, %1
%4 = call i64 (...) @drv_CW_poll()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = call i32 (...) @drv_CW_process_input()
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @drv_CW_timer(i8* nocapture readnone %0) {
%2 = tail call i64 (...) @drv_CW_poll()
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 (...) @drv_CW_process_input()
%6 = tail call i64 (...) @drv_CW_poll()
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %4
8: ; preds = %4, %1
ret void
}
void setval_305(unsigned *p) { *p = 3281047945U; }


x86 assembly (clang, -O0):
<setval_305>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xc390d189,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setval_305>:
movl   $0xc390d189,(%rdi)
ret

LLVM IR (-O0):
define void @setval_305(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 -1013919351, i32* %3
ret void
}

LLVM IR (-O2):
define void @setval_305(i32* nocapture writeonly %0) {
store i32 -1013919351, i32* %0
ret void
}
unsigned int even(unsigned int target) { return target / 2; }


x86 assembly (clang, -O0):
<even>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<even>:
mov    %edi,%eax
shr    %eax
ret

LLVM IR (-O0):
define i32 @even(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = udiv i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @even(i32 %0) {
%2 = lshr i32 %0, 1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int system_core(char *, int /*<<< orphan*/, int /*<<< orphan*/, char *);
int unpriv_system(char *command, uid_t uid, gid_t gid) {
  return system_core(command, uid, gid, "unpriv_system");
}


x86 assembly (clang, -O0):
<unpriv_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
lea    0xecd(%rip),%rcx
call   1030 <system_core@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unpriv_system>:
lea    0xee9(%rip),%rcx
jmp    1030 <system_core@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"unpriv_system\00"
define i32 @unpriv_system(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @system_core(i8* %7, i32 %8, i32 %9, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 %10
}

LLVM IR (-O2):
@.str = [14 x i8] c"unpriv_system\00"
define i32 @unpriv_system(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @system_core(i8* %0, i32 %1, i32 %2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int /*<<< orphan*/ socketcall_cp(int /*<<< orphan*/ (*)(int, void *, size_t,
                                                        int, struct sockaddr *,
                                                        int /*<<< orphan*/ *),
                                 int, void *, size_t, int, struct sockaddr *,
                                 int /*<<< orphan*/ *);
ssize_t recvfrom(int fd, void *restrict buf, size_t len, int flags,
                 struct sockaddr *restrict addr, socklen_t *restrict alen) {
  return socketcall_cp(recvfrom, fd, buf, len, flags, addr, alen);
}


x86 assembly (clang, -O0):
<recvfrom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
mov    -0x30(%rbp),%rax
mov    0x2e9c(%rip),%rdi
mov    %rax,(%rsp)
call   1030 <socketcall_cp@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recvfrom>:
push   %rax
mov    %r8,%rax
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    %r9,(%rsp)
mov    0x2ebe(%rip),%rdi
mov    %rax,%r9
call   1030 <socketcall_cp@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @recvfrom(i32 %0, i8* noalias %1, i64 %2, i32 %3, %struct.sockaddr* noalias %4, i32* noalias %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
%11 = alloca %struct.sockaddr*
%12 = alloca i32*
store i32 %0, i32* %7
store i8* %1, i8** %8
store i64 %2, i64* %9
store i32 %3, i32* %10
store %struct.sockaddr* %4, %struct.sockaddr** %11
store i32* %5, i32** %12
%13 = load i32, i32* %7
%14 = load i8*, i8** %8
%15 = load i64, i64* %9
%16 = load i32, i32* %10
%17 = load %struct.sockaddr*, %struct.sockaddr** %11
%18 = load i32*, i32** %12
%19 = call i32 @socketcall_cp(i32 (i32, i8*, i64, i32, %struct.sockaddr*, i32*)* @recvfrom, i32 %13, i8* %14, i64 %15, i32 %16, %struct.sockaddr* %17, i32* %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @recvfrom(i32 %0, i8* noalias %1, i64 %2, i32 %3, %struct.sockaddr* noalias %4, i32* noalias %5) {
%7 = tail call i32 @socketcall_cp(i32 (i32, i8*, i64, i32, %struct.sockaddr*, i32*)* @recvfrom, i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32* %5)
ret i32 %7
}
/* Variables and functions */
int fun(int);
int sfun(int n) {
  if (n == 1)
    return 1;
  return sfun(n - 1) + fun(n);
}


x86 assembly (clang, -O0):
<sfun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1141 <sfun+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1161 <sfun+0x41>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <sfun@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <fun@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfun>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     1148 <sfun+0x28>
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <sfun@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <fun@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sfun(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %14
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @sfun(i32 %9)
%11 = load i32, i32* %3
%12 = call i32 @fun(i32 %11)
%13 = add nsw i32 %10, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %7, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @sfun(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i32 [ %9, %5 ], [ 1, %1 ]
ret i32 %4
5: ; preds = %1
%6 = add nsw i32 %0, -1
%7 = tail call i32 @sfun(i32 %6)
%8 = tail call i32 @fun(i32 %0)
%9 = add nsw i32 %8, %7
br label %3
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t eoln_char(uint8_t c) { return (c == 10 || c == 13); }


x86 assembly (clang, -O0):
<eoln_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <eoln_char+0x20>
cmpl   $0xd,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eoln_char>:
cmp    $0xa,%edi
sete   %al
cmp    $0xd,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @eoln_char(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 13
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @eoln_char(i32 %0) {
%2 = icmp eq i32 %0, 10
%3 = icmp eq i32 %0, 13
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}