void sdp_set_big_endian(unsigned long long val, unsigned char *to,
                        int start_bit, int num_bits) {
  int sbit_o1 = start_bit + 1;
  int mask, num, k, x;
  mask = (8 != sbit_o1) ? ((1 << sbit_o1) - 1) : 0xff;
  k = start_bit - ((num_bits - 1) % 8);
  if (0 != k)
    val <<= ((k > 0) ? k : (8 + k));
  num = (num_bits + 15 - sbit_o1) / 8;
  for (k = 0; k < num; ++k) {
    if ((sbit_o1 - num_bits) > 0)
      mask &= ~((1 << (sbit_o1 - num_bits)) - 1);
    if (k < (num - 1))
      x = (val >> ((num - k - 1) * 8)) & 0xff;
    else
      x = val & 0xff;
    to[k] = (to[k] & ~mask) | (x & mask);
    mask = 0xff;
    num_bits -= sbit_o1;
    sbit_o1 = 8;
  }
}


x86 assembly (clang, -O0):
<sdp_set_big_endian>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    $0x8,%eax
cmp    -0x1c(%rbp),%eax
je     113e <sdp_set_big_endian+0x3e>
mov    -0x1c(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    %eax,-0x30(%rbp)
jmp    114b <sdp_set_big_endian+0x4b>
mov    $0xff,%eax
mov    %eax,-0x30(%rbp)
jmp    114b <sdp_set_big_endian+0x4b>
mov    -0x30(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x34(%rbp)
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x34(%rbp),%eax
sub    %edx,%eax
mov    %eax,-0x28(%rbp)
xor    %eax,%eax
cmp    -0x28(%rbp),%eax
je     11a6 <sdp_set_big_endian+0xa6>
cmpl   $0x0,-0x28(%rbp)
jle    118d <sdp_set_big_endian+0x8d>
mov    -0x28(%rbp),%eax
mov    %eax,-0x38(%rbp)
jmp    1196 <sdp_set_big_endian+0x96>
mov    -0x28(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0x38(%rbp)
mov    -0x38(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,%ecx
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%eax
add    $0xf,%eax
sub    -0x1c(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x24(%rbp)
movl   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%eax
cmp    -0x24(%rbp),%eax
jge    1286 <sdp_set_big_endian+0x186>
mov    -0x1c(%rbp),%eax
sub    -0x18(%rbp),%eax
cmp    $0x0,%eax
jle    11f5 <sdp_set_big_endian+0xf5>
mov    -0x1c(%rbp),%ecx
sub    -0x18(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
xor    $0xffffffff,%eax
and    -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x28(%rbp),%eax
mov    -0x24(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    1229 <sdp_set_big_endian+0x129>
mov    -0x8(%rbp),%rax
mov    -0x24(%rbp),%ecx
sub    -0x28(%rbp),%ecx
sub    $0x1,%ecx
shl    $0x3,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
and    $0xff,%rax
mov    %eax,-0x2c(%rbp)
jmp    1236 <sdp_set_big_endian+0x136>
mov    -0x8(%rbp),%rax
and    $0xff,%rax
mov    %eax,-0x2c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x28(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x20(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x2c(%rbp),%ecx
and    -0x20(%rbp),%ecx
or     %ecx,%eax
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x28(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
movl   $0xff,-0x20(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x18(%rbp)
movl   $0x8,-0x1c(%rbp)
mov    -0x28(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x28(%rbp)
jmp    11c1 <sdp_set_big_endian+0xc1>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdp_set_big_endian>:
push   %rbp
push   %r14
push   %rbx
sub    $0xf0,%rsp
mov    %ecx,%r11d
lea    -0x1(%r11),%eax
lea    0x6(%r11),%ebx
test   %eax,%eax
cmovns %eax,%ebx
and    $0xfffffff8,%ebx
sub    %eax,%ebx
add    %edx,%ebx
lea    0x8(%rbx),%eax
test   %ebx,%ebx
movzbl %al,%ecx
cmovg  %ebx,%ecx
cmove  %ebx,%ecx
shl    %cl,%rdi
mov    %edx,%ecx
not    %ecx
lea    (%r11,%rcx,1),%ebp
add    $0xf,%ebp
lea    (%r11,%rcx,1),%r8d
add    $0x16,%r8d
test   %ebp,%ebp
cmovns %ebp,%r8d
cmp    $0x8,%ebp
jl     19d6 <sdp_set_big_endian+0x8d6>
add    $0x1,%edx
sar    $0x3,%r8d
mov    $0xffffffff,%ebx
mov    %edx,%ecx
shl    %cl,%ebx
mov    $0xffffffff,%r9d
cmp    $0x8,%edx
not    %ebx
mov    $0xff,%r10d
cmovne %ebx,%r10d
mov    %edx,%ecx
sub    %r11d,%ecx
mov    $0xffffffff,%ebx
shl    %cl,%ebx
test   %ecx,%ecx
cmovle %r9d,%ebx
and    %r10d,%ebx
xor    %r9d,%r9d
cmp    $0x10,%ebp
lea    -0x8(,%r8,8),%ecx
ff
cmovb  %r9d,%ecx
mov    %rdi,%rax
shr    %cl,%rax
movzbl (%rsi),%ecx
xor    %ecx,%eax
and    %ebx,%eax
xor    %ecx,%eax
mov    %al,(%rsi)
and    $0xfffffff8,%ebp
cmp    $0x8,%ebp
je     19d6 <sdp_set_big_endian+0x8d6>
lea    -0x1(%r8),%eax
movslq %eax,%r9
mov    %r8d,%r10d
sub    %edx,%r11d
lea    -0x1(%r10),%rcx
mov    $0x1,%r14d
cmp    $0x10,%rcx
jb     196d <sdp_set_big_endian+0x86d>
mov    %rcx,%rdx
and    $0xfffffffffffffff0,%rdx
lea    0x1(%rdx),%r14
lea    0x0(,%rdx,8),%ebx
movd   %r11d,%xmm0
sub    %ebx,%r11d
pshufd $0x0,%xmm0,%xmm5
movdqa 0xdfa(%rip),%xmm4
paddd  %xmm5,%xmm4
movdqa 0xdfd(%rip),%xmm13
paddd  %xmm5,%xmm13
movdqa 0xe00(%rip),%xmm3
paddd  %xmm5,%xmm3
paddd  0xe04(%rip),%xmm5
movq   %r9,%xmm0
pshufd $0x44,%xmm0,%xmm1
movd   %r8d,%xmm0
pshufd $0x0,%xmm0,%xmm0
movdqa %xmm0,0x40(%rsp)
movq   %rdi,%xmm0
pshufd $0x44,%xmm0,%xmm0
movdqa %xmm0,0x20(%rsp)
movdqa 0xde2(%rip),%xmm2
movaps 0xdeb(%rip),%xmm0
movaps %xmm0,-0x60(%rsp)
movaps 0xdef(%rip),%xmm0
movaps %xmm0,-0x40(%rsp)
movdqa 0xdf1(%rip),%xmm10
movdqa 0xdf8(%rip),%xmm9
movdqa 0xe00(%rip),%xmm7
movaps 0xe09(%rip),%xmm0
movaps %xmm0,-0x50(%rsp)
movaps 0xe0d(%rip),%xmm0
movaps %xmm0,-0x70(%rsp)
xor    %ebx,%ebx
pxor   0xe7e(%rip),%xmm1
movdqa %xmm1,0x30(%rsp)
movdqa 0xdff(%rip),%xmm15
movdqa 0xe06(%rip),%xmm8
movdqa 0xe0e(%rip),%xmm0
movdqa %xmm0,-0x80(%rsp)
movdqa 0xe10(%rip),%xmm6
movdqa %xmm7,-0x30(%rsp)
movdqa %xmm9,-0x20(%rsp)
movdqa %xmm6,0x90(%rsp)
movdqa %xmm8,0xa0(%rsp)
movdqa %xmm15,0xb0(%rsp)
movdqa %xmm10,0xc0(%rsp)
movdqa %xmm2,-0x10(%rsp)
movdqa %xmm3,(%rsp)
movdqa %xmm13,0xd0(%rsp)
movdqa %xmm4,0xe0(%rsp)
movdqa %xmm5,0x10(%rsp)
movdqa 0xdc0(%rip),%xmm2
movdqa %xmm2,%xmm1
psubd  %xmm5,%xmm1
movdqa %xmm2,%xmm5
psubd  %xmm3,%xmm5
movdqa %xmm2,%xmm3
psubd  %xmm13,%xmm3
movdqa %xmm2,%xmm0
psubd  %xmm4,%xmm0
movdqa %xmm2,%xmm12
pcmpgtd 0x10(%rsp),%xmm12
movdqa %xmm2,%xmm14
pcmpgtd (%rsp),%xmm14
movdqa %xmm2,%xmm11
pcmpgtd %xmm13,%xmm11
movdqa %xmm2,%xmm9
pcmpgtd %xmm4,%xmm9
pslld  $0x17,%xmm0
movdqa 0xd76(%rip),%xmm13
paddd  %xmm13,%xmm0
cvttps2dq %xmm0,%xmm0
pshufd $0xf5,%xmm0,%xmm4
pcmpeqd %xmm7,%xmm7
pmuludq %xmm7,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm7,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm0
pslld  $0x17,%xmm3
paddd  %xmm13,%xmm3
cvttps2dq %xmm3,%xmm3
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm7,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm7,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pslld  $0x17,%xmm5
paddd  %xmm13,%xmm5
cvttps2dq %xmm5,%xmm2
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm7,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm7,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
pslld  $0x17,%xmm1
paddd  %xmm13,%xmm1
cvttps2dq %xmm1,%xmm1
pshufd $0xf5,%xmm1,%xmm4
pmuludq %xmm7,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm7,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm1
movdqa 0xcdb(%rip),%xmm5
movdqa %xmm5,%xmm4
pand   %xmm9,%xmm4
pand   %xmm0,%xmm4
pandn  %xmm5,%xmm9
por    %xmm4,%xmm9
movdqa %xmm9,0x80(%rsp)
movdqa %xmm5,%xmm0
pand   %xmm11,%xmm0
pand   %xmm3,%xmm0
pandn  %xmm5,%xmm11
por    %xmm0,%xmm11
movdqa %xmm11,0x70(%rsp)
movdqa %xmm5,%xmm0
pand   %xmm14,%xmm0
pand   %xmm2,%xmm0
pandn  %xmm5,%xmm14
por    %xmm0,%xmm14
movdqa %xmm14,0x60(%rsp)
movdqa %xmm5,%xmm0
pand   %xmm12,%xmm0
pand   %xmm1,%xmm0
pandn  %xmm5,%xmm12
por    %xmm0,%xmm12
movdqa %xmm12,0x50(%rsp)
movdqa %xmm6,%xmm0
movdqa 0xc63(%rip),%xmm11
pxor   %xmm11,%xmm0
movdqa 0x30(%rsp),%xmm6
movdqa %xmm6,%xmm1
pcmpgtd %xmm0,%xmm1
pcmpeqd %xmm6,%xmm0
pshufd $0xf5,%xmm0,%xmm0
pand   %xmm1,%xmm0
pshufd $0xf5,%xmm1,%xmm14
por    %xmm0,%xmm14
movdqa -0x80(%rsp),%xmm0
pxor   %xmm11,%xmm0
movdqa %xmm6,%xmm2
pcmpgtd %xmm0,%xmm2
pcmpeqd %xmm6,%xmm0
pshufd $0xf5,%xmm0,%xmm3
pand   %xmm2,%xmm3
pshufd $0xf5,%xmm2,%xmm12
por    %xmm3,%xmm12
movdqa %xmm8,%xmm2
pxor   %xmm11,%xmm2
movdqa %xmm6,%xmm3
pcmpgtd %xmm2,%xmm3
pcmpeqd %xmm6,%xmm2
pshufd $0xf5,%xmm2,%xmm2
pand   %xmm3,%xmm2
pshufd $0xf5,%xmm3,%xmm0
por    %xmm2,%xmm0
movdqa %xmm15,%xmm2
pxor   %xmm11,%xmm2
movdqa %xmm6,%xmm3
pcmpgtd %xmm2,%xmm3
pcmpeqd %xmm6,%xmm2
pshufd $0xf5,%xmm2,%xmm2
pand   %xmm3,%xmm2
pshufd $0xf5,%xmm3,%xmm15
por    %xmm2,%xmm15
movdqa -0x70(%rsp),%xmm2
pxor   %xmm11,%xmm2
movdqa %xmm6,%xmm3
pcmpgtd %xmm2,%xmm3
pcmpeqd %xmm6,%xmm2
pshufd $0xf5,%xmm2,%xmm2
pand   %xmm3,%xmm2
pshufd $0xf5,%xmm3,%xmm9
por    %xmm2,%xmm9
movdqa -0x50(%rsp),%xmm2
pxor   %xmm11,%xmm2
movdqa %xmm6,%xmm3
pcmpgtd %xmm2,%xmm3
pcmpeqd %xmm6,%xmm2
pshufd $0xf5,%xmm2,%xmm2
pand   %xmm3,%xmm2
pshufd $0xf5,%xmm3,%xmm8
por    %xmm2,%xmm8
movdqa -0x30(%rsp),%xmm2
pxor   %xmm11,%xmm2
movdqa %xmm6,%xmm3
pcmpgtd %xmm2,%xmm3
pcmpeqd %xmm6,%xmm2
pshufd $0xf5,%xmm2,%xmm5
pand   %xmm3,%xmm5
pshufd $0xf5,%xmm3,%xmm4
por    %xmm5,%xmm4
movdqa -0x20(%rsp),%xmm3
pxor   %xmm11,%xmm3
movdqa %xmm6,%xmm5
pcmpgtd %xmm3,%xmm5
pcmpeqd %xmm6,%xmm3
pshufd $0xf5,%xmm3,%xmm6
pand   %xmm5,%xmm6
pshufd $0xf5,%xmm5,%xmm3
por    %xmm6,%xmm3
movdqa %xmm10,%xmm5
pcmpeqd %xmm1,%xmm1
pxor   %xmm1,%xmm5
movdqa 0x40(%rsp),%xmm13
paddd  %xmm13,%xmm5
pslld  $0x3,%xmm5
movdqa %xmm5,%xmm7
pxor   %xmm2,%xmm2
punpckldq %xmm2,%xmm7
pand   %xmm14,%xmm7
movdqa -0x40(%rsp),%xmm10
movdqa %xmm10,%xmm11
pxor   %xmm1,%xmm11
pcmpeqd %xmm14,%xmm14
paddd  %xmm13,%xmm11
pslld  $0x3,%xmm11
punpckhdq %xmm2,%xmm5
pand   %xmm12,%xmm5
movdqa %xmm11,%xmm12
punpckldq %xmm2,%xmm12
pand   %xmm0,%xmm12
movdqa -0x60(%rsp),%xmm0
pxor   %xmm14,%xmm0
paddd  %xmm13,%xmm0
pslld  $0x3,%xmm0
punpckhdq %xmm2,%xmm11
pand   %xmm15,%xmm11
movdqa %xmm0,%xmm15
punpckldq %xmm2,%xmm15
pand   %xmm9,%xmm15
movdqa -0x10(%rsp),%xmm1
pxor   %xmm14,%xmm1
paddd  %xmm13,%xmm1
pslld  $0x3,%xmm1
punpckhdq %xmm2,%xmm0
pand   %xmm8,%xmm0
movdqa %xmm1,%xmm8
punpckldq %xmm2,%xmm8
pand   %xmm4,%xmm8
punpckhdq %xmm2,%xmm1
movdqa 0x20(%rsp),%xmm2
movdqa %xmm2,%xmm4
psrlq  %xmm7,%xmm4
pand   %xmm3,%xmm1
pshufd $0xee,%xmm7,%xmm3
movdqa %xmm2,%xmm7
psrlq  %xmm3,%xmm7
movsd  %xmm4,%xmm7
movdqa %xmm2,%xmm6
psrlq  %xmm5,%xmm6
pshufd $0xee,%xmm5,%xmm5
movdqa %xmm2,%xmm3
psrlq  %xmm5,%xmm3
movdqa %xmm2,%xmm4
psrlq  %xmm12,%xmm4
movsd  %xmm6,%xmm3
pshufd $0xee,%xmm12,%xmm6
movdqa %xmm2,%xmm12
psrlq  %xmm6,%xmm12
shufps $0x88,%xmm3,%xmm7
movsd  %xmm4,%xmm12
movdqa %xmm2,%xmm6
psrlq  %xmm11,%xmm6
pshufd $0xee,%xmm11,%xmm3
movdqa %xmm10,%xmm11
movdqa -0x20(%rsp),%xmm9
movdqa %xmm2,%xmm4
psrlq  %xmm3,%xmm4
movsd  %xmm6,%xmm4
shufps $0x88,%xmm4,%xmm12
movdqa %xmm2,%xmm4
psrlq  %xmm15,%xmm4
pshufd $0xee,%xmm15,%xmm3
movdqa 0xb0(%rsp),%xmm15
movdqa %xmm2,%xmm6
psrlq  %xmm3,%xmm6
movdqa %xmm2,%xmm3
psrlq  %xmm0,%xmm3
movsd  %xmm4,%xmm6
pshufd $0xee,%xmm0,%xmm0
movdqa %xmm2,%xmm5
psrlq  %xmm0,%xmm5
movsd  %xmm3,%xmm5
movdqa %xmm2,%xmm3
psrlq  %xmm8,%xmm3
pshufd $0xee,%xmm8,%xmm4
movdqa 0xa0(%rsp),%xmm8
movdqa %xmm2,%xmm0
psrlq  %xmm4,%xmm0
movdqa %xmm2,%xmm4
psrlq  %xmm1,%xmm4
shufps $0x88,%xmm5,%xmm6
pshufd $0xee,%xmm1,%xmm1
psrlq  %xmm1,%xmm2
movsd  %xmm3,%xmm0
movsd  %xmm4,%xmm2
shufps $0x88,%xmm2,%xmm0
movdqu 0x1(%rsi,%rbx,1),%xmm1
movdqa %xmm1,%xmm2
punpcklbw %xmm1,%xmm1
movdqa %xmm1,%xmm3
punpcklwd %xmm1,%xmm1
movaps 0x50(%rsp),%xmm14
andps  %xmm14,%xmm7
andnps %xmm1,%xmm14
punpckhbw %xmm2,%xmm2
punpckhwd %xmm3,%xmm3
movaps 0x60(%rsp),%xmm1
andps  %xmm1,%xmm12
andnps %xmm3,%xmm1
movdqa %xmm2,%xmm3
punpcklwd %xmm2,%xmm2
movaps 0x70(%rsp),%xmm4
andps  %xmm4,%xmm6
andnps %xmm2,%xmm4
punpckhwd %xmm3,%xmm3
movdqa 0x80(%rsp),%xmm2
pand   %xmm2,%xmm0
pandn  %xmm3,%xmm2
movdqa (%rsp),%xmm3
orps   %xmm14,%xmm7
orps   %xmm1,%xmm12
orps   %xmm4,%xmm6
movdqa 0xe0(%rsp),%xmm4
por    %xmm2,%xmm0
movdqa 0x10(%rsp),%xmm5
movaps 0x8a8(%rip),%xmm2
andps  %xmm2,%xmm7
andps  %xmm2,%xmm12
packuswb %xmm12,%xmm7
movdqa -0x30(%rsp),%xmm1
movdqa 0xd0(%rsp),%xmm13
andps  %xmm2,%xmm6
pand   %xmm2,%xmm0
packuswb %xmm0,%xmm6
packuswb %xmm6,%xmm7
movdqa 0x90(%rsp),%xmm6
movdqu %xmm7,0x1(%rsi,%rbx,1)
movdqa 0xc0(%rsp),%xmm10
add    $0x10,%rbx
movdqa 0x878(%rip),%xmm0
paddq  %xmm0,%xmm6
movdqa -0x80(%rsp),%xmm2
paddq  %xmm0,%xmm2
movdqa %xmm2,-0x80(%rsp)
paddq  %xmm0,%xmm8
paddq  %xmm0,%xmm15
movdqa -0x70(%rsp),%xmm2
paddq  %xmm0,%xmm2
movdqa %xmm2,-0x70(%rsp)
movdqa -0x50(%rsp),%xmm2
paddq  %xmm0,%xmm2
movdqa %xmm2,-0x50(%rsp)
paddq  %xmm0,%xmm1
movdqa %xmm1,%xmm7
paddq  %xmm0,%xmm9
movdqa 0x835(%rip),%xmm0
paddd  %xmm0,%xmm5
paddd  %xmm0,%xmm3
paddd  %xmm0,%xmm13
paddd  %xmm0,%xmm4
movdqa 0x82c(%rip),%xmm0
paddd  %xmm0,%xmm10
paddd  %xmm0,%xmm11
movdqa %xmm11,-0x40(%rsp)
movdqa -0x60(%rsp),%xmm1
paddd  %xmm0,%xmm1
movdqa %xmm1,-0x60(%rsp)
movdqa -0x10(%rsp),%xmm2
paddd  %xmm0,%xmm2
cmp    %rbx,%rdx
jne    12e0 <sdp_set_big_endian+0x1e0>
cmp    %rdx,%rcx
je     19d6 <sdp_set_big_endian+0x8d6>
sub    %r14d,%r8d
lea    -0x8(,%r8,8),%ebx
ff
mov    $0x8,%edx
sub    %r11d,%edx
mov    $0xff,%r8d
cs nopw 0x0(%rax,%rax,1)
mov    $0xff,%ebp
mov    %edx,%ecx
shr    %cl,%ebp
shl    %cl,%ebp
cmp    $0x8,%r11d
cmovge %r8d,%ebp
cmp    %r9,%r14
mov    $0x0,%ecx
cmovl  %ebx,%ecx
mov    %rdi,%rax
shr    %cl,%rax
movzbl (%rsi,%r14,1),%ecx
xor    %ecx,%eax
and    %ebp,%eax
xor    %ecx,%eax
mov    %al,(%rsi,%r14,1)
add    $0xfffffff8,%r11d
add    $0x1,%r14
add    $0xfffffff8,%ebx
add    $0x8,%edx
cmp    %r14,%r10
jne    1990 <sdp_set_big_endian+0x890>
add    $0xf0,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @sdp_set_big_endian(i64 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i64 %0, i64* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%14 = load i32, i32* %7
%15 = add nsw i32 %14, 1
store i32 %15, i32* %9
%16 = load i32, i32* %9
%17 = icmp ne i32 8, %16
br i1 %17, label %18, label %22
18: ; preds = %4
%19 = load i32, i32* %9
%20 = shl i32 1, %19
%21 = sub nsw i32 %20, 1
br label %23
22: ; preds = %4
br label %23
23: ; preds = %22, %18
%24 = phi i32 [ %21, %18 ], [ 255, %22 ]
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %8
%27 = sub nsw i32 %26, 1
%28 = srem i32 %27, 8
%29 = sub nsw i32 %25, %28
store i32 %29, i32* %12
%30 = load i32, i32* %12
%31 = icmp ne i32 0, %30
br i1 %31, label %32, label %45
32: ; preds = %23
%33 = load i32, i32* %12
%34 = icmp sgt i32 %33, 0
br i1 %34, label %35, label %37
35: ; preds = %32
%36 = load i32, i32* %12
br label %40
37: ; preds = %32
%38 = load i32, i32* %12
%39 = add nsw i32 8, %38
br label %40
40: ; preds = %37, %35
%41 = phi i32 [ %36, %35 ], [ %39, %37 ]
%42 = load i64, i64* %5
%43 = zext i32 %41 to i64
%44 = shl i64 %42, %43
store i64 %44, i64* %5
br label %45
45: ; preds = %40, %23
%46 = load i32, i32* %8
%47 = add nsw i32 %46, 15
%48 = load i32, i32* %9
%49 = sub nsw i32 %47, %48
%50 = sdiv i32 %49, 8
store i32 %50, i32* %11
store i32 0, i32* %12
br label %51
51: ; preds = %111, %45
%52 = load i32, i32* %12
%53 = load i32, i32* %11
%54 = icmp slt i32 %52, %53
br i1 %54, label %55, label %114
55: ; preds = %51
%56 = load i32, i32* %9
%57 = load i32, i32* %8
%58 = sub nsw i32 %56, %57
%59 = icmp sgt i32 %58, 0
br i1 %59, label %60, label %69
60: ; preds = %55
%61 = load i32, i32* %9
%62 = load i32, i32* %8
%63 = sub nsw i32 %61, %62
%64 = shl i32 1, %63
%65 = sub nsw i32 %64, 1
%66 = xor i32 %65, -1
%67 = load i32, i32* %10
%68 = and i32 %67, %66
store i32 %68, i32* %10
br label %69
69: ; preds = %60, %55
%70 = load i32, i32* %12
%71 = load i32, i32* %11
%72 = sub nsw i32 %71, 1
%73 = icmp slt i32 %70, %72
br i1 %73, label %74, label %85
74: ; preds = %69
%75 = load i64, i64* %5
%76 = load i32, i32* %11
%77 = load i32, i32* %12
%78 = sub nsw i32 %76, %77
%79 = sub nsw i32 %78, 1
%80 = mul nsw i32 %79, 8
%81 = zext i32 %80 to i64
%82 = lshr i64 %75, %81
%83 = and i64 %82, 255
%84 = trunc i64 %83 to i32
store i32 %84, i32* %13
br label %89
85: ; preds = %69
%86 = load i64, i64* %5
%87 = and i64 %86, 255
%88 = trunc i64 %87 to i32
store i32 %88, i32* %13
br label %89
89: ; preds = %85, %74
%90 = load i8*, i8** %6
%91 = load i32, i32* %12
%92 = sext i32 %91 to i64
%93 = getelementptr inbounds i8, i8* %90, i64 %92
%94 = load i8, i8* %93
%95 = zext i8 %94 to i32
%96 = load i32, i32* %10
%97 = xor i32 %96, -1
%98 = and i32 %95, %97
%99 = load i32, i32* %13
%100 = load i32, i32* %10
%101 = and i32 %99, %100
%102 = or i32 %98, %101
%103 = trunc i32 %102 to i8
%104 = load i8*, i8** %6
%105 = load i32, i32* %12
%106 = sext i32 %105 to i64
%107 = getelementptr inbounds i8, i8* %104, i64 %106
store i8 %103, i8* %107
store i32 255, i32* %10
%108 = load i32, i32* %9
%109 = load i32, i32* %8
%110 = sub nsw i32 %109, %108
store i32 %110, i32* %8
store i32 8, i32* %9
br label %111
111: ; preds = %89
%112 = load i32, i32* %12
%113 = add nsw i32 %112, 1
store i32 %113, i32* %12
br label %51
114: ; preds = %51
ret void
}

LLVM IR (-O2):
define void @sdp_set_big_endian(i64 %0, i8* nocapture %1, i32 %2, i32 %3) {
%5 = add nsw i32 %2, 1
%6 = add nsw i32 %3, -1
%7 = srem i32 %6, 8
%8 = sub nsw i32 %2, %7
%9 = icmp eq i32 %8, 0
%10 = icmp sgt i32 %8, 0
%11 = add nsw i32 %8, 8
%12 = select i1 %10, i32 %8, i32 %11
%13 = select i1 %9, i32 0, i32 %12
%14 = zext i32 %13 to i64
%15 = shl i64 %0, %14
%16 = add nsw i32 %3, 15
%17 = xor i32 %2, -1
%18 = add i32 %16, %17
%19 = sdiv i32 %18, 8
%20 = icmp sgt i32 %18, 7
br i1 %20, label %21, label %135
21: ; preds = %4
%22 = icmp eq i32 %5, 8
%23 = shl nsw i32 -1, %5
%24 = xor i32 %23, -1
%25 = select i1 %22, i32 255, i32 %24
%26 = add nsw i32 %19, -1
%27 = sext i32 %26 to i64
%28 = zext i32 %19 to i64
%29 = sub nsw i32 %5, %3
%30 = icmp sgt i32 %29, 0
%31 = shl nsw i32 -1, %29
%32 = select i1 %30, i32 %31, i32 -1
%33 = and i32 %32, %25
%34 = icmp ugt i32 %18, 15
%35 = shl nsw i32 %26, 3
%36 = select i1 %34, i32 %35, i32 0
%37 = zext i32 %36 to i64
%38 = lshr i64 %15, %37
%39 = trunc i64 %38 to i32
%40 = load i8, i8* %1
%41 = zext i8 %40 to i32
%42 = xor i32 %33, -1
%43 = and i32 %41, %42
%44 = and i32 %33, %39
%45 = or i32 %43, %44
%46 = trunc i32 %45 to i8
store i8 %46, i8* %1
%47 = and i32 %18, -8
%48 = icmp eq i32 %47, 8
br i1 %48, label %135, label %49
49: ; preds = %21
%50 = sub nsw i32 %3, %5
%51 = add nsw i64 %28, -1
%52 = icmp ult i64 %51, 16
br i1 %52, label %104, label %53
53: ; preds = %49
%54 = and i64 %51, -16
%55 = or i64 %54, 1
%56 = trunc i64 %54 to i32
%57 = mul i32 %56, -8
%58 = add i32 %50, %57
%59 = insertelement <16 x i32> poison, i32 %50, i64 0
%60 = shufflevector <16 x i32> %59, <16 x i32> poison, <16 x i32> zeroinitializer
%61 = add <16 x i32> %60, <i32 0, i32 -8, i32 -16, i32 -24, i32 -32, i32 -40, i32 -48, i32 -56, i32 -64, i32 -72, i32 -80, i32 -88, i32 -96, i32 -104, i32 -112, i32 -120>
%62 = insertelement <16 x i64> poison, i64 %27, i64 0
%63 = shufflevector <16 x i64> %62, <16 x i64> poison, <16 x i32> zeroinitializer
%64 = insertelement <16 x i32> poison, i32 %19, i64 0
%65 = shufflevector <16 x i32> %64, <16 x i32> poison, <16 x i32> zeroinitializer
%66 = insertelement <16 x i64> poison, i64 %15, i64 0
%67 = shufflevector <16 x i64> %66, <16 x i64> poison, <16 x i32> zeroinitializer
br label %68
68: ; preds = %68, %53
%69 = phi i64 [ 0, %53 ], [ %97, %68 ]
%70 = phi <16 x i64> [ <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15, i64 16>, %53 ], [ %98, %68 ]
%71 = phi <16 x i32> [ %61, %53 ], [ %99, %68 ]
%72 = phi <16 x i32> [ <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16>, %53 ], [ %100, %68 ]
%73 = or i64 %69, 1
%74 = sub nsw <16 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>, %71
%75 = icmp slt <16 x i32> %71, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%76 = shl nsw <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, %74
%77 = and <16 x i32> %76, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%78 = select <16 x i1> %75, <16 x i32> %77, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%79 = icmp slt <16 x i64> %70, %63
%80 = xor <16 x i32> %72, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
%81 = add nsw <16 x i32> %65, %80
%82 = shl nsw <16 x i32> %81, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
%83 = zext <16 x i32> %82 to <16 x i64>
%84 = select <16 x i1> %79, <16 x i64> %83, <16 x i64> zeroinitializer
%85 = lshr <16 x i64> %67, %84
%86 = trunc <16 x i64> %85 to <16 x i32>
%87 = getelementptr inbounds i8, i8* %1, i64 %73
%88 = bitcast i8* %87 to <16 x i8>*
%89 = load <16 x i8>, <16 x i8>* %88
%90 = zext <16 x i8> %89 to <16 x i32>
%91 = xor <16 x i32> %78, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
%92 = and <16 x i32> %90, %91
%93 = and <16 x i32> %78, %86
%94 = or <16 x i32> %92, %93
%95 = trunc <16 x i32> %94 to <16 x i8>
%96 = bitcast i8* %87 to <16 x i8>*
store <16 x i8> %95, <16 x i8>* %96
%97 = add nuw i64 %69, 16
%98 = add <16 x i64> %70, <i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16>
%99 = add <16 x i32> %71, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
%100 = add <16 x i32> %72, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
%101 = icmp eq i64 %97, %54
br i1 %101, label %102, label %68
102: ; preds = %68
%103 = icmp eq i64 %51, %54
br i1 %103, label %135, label %104
104: ; preds = %49, %102
%105 = phi i64 [ 1, %49 ], [ %55, %102 ]
%106 = phi i32 [ %50, %49 ], [ %58, %102 ]
br label %107
107: ; preds = %104, %107
%108 = phi i64 [ %133, %107 ], [ %105, %104 ]
%109 = phi i32 [ %132, %107 ], [ %106, %104 ]
%110 = trunc i64 %108 to i32
%111 = sub nsw i32 8, %109
%112 = icmp slt i32 %109, 8
%113 = shl nsw i32 -1, %111
%114 = and i32 %113, 255
%115 = select i1 %112, i32 %114, i32 255
%116 = icmp slt i64 %108, %27
%117 = xor i32 %110, -1
%118 = add nsw i32 %19, %117
%119 = shl nsw i32 %118, 3
%120 = zext i32 %119 to i64
%121 = select i1 %116, i64 %120, i64 0
%122 = lshr i64 %15, %121
%123 = trunc i64 %122 to i32
%124 = getelementptr inbounds i8, i8* %1, i64 %108
%125 = load i8, i8* %124
%126 = zext i8 %125 to i32
%127 = xor i32 %115, -1
%128 = and i32 %126, %127
%129 = and i32 %115, %123
%130 = or i32 %128, %129
%131 = trunc i32 %130 to i8
store i8 %131, i8* %124
%132 = add nsw i32 %109, -8
%133 = add nuw nsw i64 %108, 1
%134 = icmp eq i64 %133, %28
br i1 %134, label %135, label %107
135: ; preds = %107, %102, %21, %4
ret void
}