xunge/DecIR huggingface dataset:
int atoi(const char *s) {
  int n;
  n = 0;
  while ('0' <= *s && *s <= '9') {
    n = n * 10 + *s++ - '0';
  }
  return n;
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0xd(%rbp)
jg     1138 <atoi+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1148 <atoi+0x48>
jmp    116b <atoi+0x6b>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <atoi+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
mov    (%rdi),%cl
lea    -0x30(%rcx),%edx
xor    %eax,%eax
cmp    $0x9,%dl
ja     113b <atoi+0x3b>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
lea    -0x30(%rcx),%edx
add    $0x1,%rdi
cmp    $0xa,%dl
jb     1120 <atoi+0x20>
ret

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp sle i32 48, %7
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 57
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %25
16: ; preds = %14
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 10
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
%21 = load i8, i8* %19
%22 = sext i8 %21 to i32
%23 = add nsw i32 %18, %22
%24 = sub nsw i32 %23, 48
store i32 %24, i32* %3
br label %4
25: ; preds = %14
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @atoi(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i32 [ %13, %5 ], [ 0, %1 ]
%8 = phi i8* [ %11, %5 ], [ %0, %1 ]
%9 = zext i8 %6 to i32
%10 = mul nsw i32 %7, 10
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = add i32 %10, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %11
%15 = add i8 %14, -48
%16 = icmp ult i8 %15, 10
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
int cairo_code_draw_cheapTitle_get_height() { return 54; }


x86 assembly (clang, -O0):
<cairo_code_draw_cheapTitle_get_height>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_cheapTitle_get_height>:
mov    $0x36,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_cheapTitle_get_height() {
ret i32 54
}

LLVM IR (-O2):
define i32 @cairo_code_draw_cheapTitle_get_height() {
ret i32 54
}
int get_bgq_core(void) { return -1; }


x86 assembly (clang, -O0):
<get_bgq_core>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bgq_core>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @get_bgq_core() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @get_bgq_core() {
ret i32 -1
}
void color(char fg, char bg, char bd) {
  fg;
  bg;
  bd;
}


x86 assembly (clang, -O0):
<color>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<color>:
ret

LLVM IR (-O0):
define void @color(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
ret void
}

LLVM IR (-O2):
define void @color(i8 signext %0, i8 signext %1, i8 signext %2) {
ret void
}
/* Type definitions */
struct qcc_message_list {
  int dummy;
};
struct qcc_log_message {
  int dummy;
};
struct qcc_list_node {
  int dummy;
};
struct qcc_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ qcc_list_push_back(struct qcc_list *,
                                      struct qcc_list_node *);
void qcc_message_list_push_back(struct qcc_message_list *list,
                                struct qcc_log_message *node) {
  qcc_list_push_back((struct qcc_list *)list, (struct qcc_list_node *)node);
}


x86 assembly (clang, -O0):
<qcc_message_list_push_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <qcc_list_push_back@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcc_message_list_push_back>:
jmp    1030 <qcc_list_push_back@plt>

LLVM IR (-O0):
%struct.qcc_message_list = type { i32 }
%struct.qcc_log_message = type { i32 }
%struct.qcc_list = type { i32 }
%struct.qcc_list_node = type { i32 }
define void @qcc_message_list_push_back(%struct.qcc_message_list* %0, %struct.qcc_log_message* %1) {
%3 = alloca %struct.qcc_message_list*
%4 = alloca %struct.qcc_log_message*
store %struct.qcc_message_list* %0, %struct.qcc_message_list** %3
store %struct.qcc_log_message* %1, %struct.qcc_log_message** %4
%5 = load %struct.qcc_message_list*, %struct.qcc_message_list** %3
%6 = bitcast %struct.qcc_message_list* %5 to %struct.qcc_list*
%7 = load %struct.qcc_log_message*, %struct.qcc_log_message** %4
%8 = bitcast %struct.qcc_log_message* %7 to %struct.qcc_list_node*
%9 = call i32 @qcc_list_push_back(%struct.qcc_list* %6, %struct.qcc_list_node* %8)
ret void
}

LLVM IR (-O2):
%struct.qcc_message_list = type { i32 }
%struct.qcc_log_message = type { i32 }
%struct.qcc_list = type { i32 }
%struct.qcc_list_node = type { i32 }
define void @qcc_message_list_push_back(%struct.qcc_message_list* %0, %struct.qcc_log_message* %1) {
%3 = bitcast %struct.qcc_message_list* %0 to %struct.qcc_list*
%4 = bitcast %struct.qcc_log_message* %1 to %struct.qcc_list_node*
%5 = tail call i32 @qcc_list_push_back(%struct.qcc_list* %3, %struct.qcc_list_node* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DrawTextln132();
void drawtextln() { DrawTextln132(); }


x86 assembly (clang, -O0):
<drawtextln>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DrawTextln132@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawtextln>:
xor    %eax,%eax
jmp    1030 <DrawTextln132@plt>

LLVM IR (-O0):
define void @drawtextln() {
%1 = call i32 (...) @DrawTextln132()
ret void
}

LLVM IR (-O2):
define void @drawtextln() {
%1 = tail call i32 (...) @DrawTextln132()
ret void
}
/* Variables and functions */
char *malloc(size_t);
size_t strlen(char *);
int /*<<< orphan*/ strncpy(char *, char *, size_t);
char *getInfo() {
  char *name;
  size_t size;
  size = strlen("Dizzy  (C) 2004 Panayotis Katsaloulis "
                "http://www.panayotis.com under GNU GPL");
  name = malloc(size + 1);
  strncpy(name,
          ("Dizzy  (C) 2004 Panayotis Katsaloulis http://www.panayotis.com "
           "under GNU GPL"),
          size + 1);
  return name;
}


x86 assembly (clang, -O0):
<getInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
add    $0x1,%rdx
lea    0xe94(%rip),%rsi
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInfo>:
push   %rbx
mov    $0x4d,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    $0x4d,%edx
mov    %rax,%rdi
call   1030 <strncpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [77 x i8] c"Dizzy (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under GNU GPL\00"
define i8* @getInfo() {
%1 = alloca i8*
%2 = alloca i64
%3 = call i64 @strlen(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = add i64 %4, 1
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %1
%7 = load i8*, i8** %1
%8 = load i64, i64* %2
%9 = add i64 %8, 1
%10 = call i32 @strncpy(i8* %7, i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
@.str = [77 x i8] c"Dizzy (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under GNU GPL\00"
define i8* @getInfo() {
%1 = tail call dereferenceable_or_null(77) i8* @malloc(i64 77)
%2 = tail call i32 @strncpy(i8* %1, i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i64 77)
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void popf() { db(0x9D); }


x86 assembly (clang, -O0):
<popf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9d,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<popf>:
mov    $0x9d,%edi
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @popf() {
%1 = call i32 @db(i32 157)
ret void
}

LLVM IR (-O2):
define void @popf() {
%1 = tail call i32 @db(i32 157)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_timer_start(unsigned int);
int /*<<< orphan*/ sleep(unsigned int);
void pause_minutes(unsigned minutes) {
  set_timer_start(minutes);
  sleep(minutes * 60);
}


x86 assembly (clang, -O0):
<pause_minutes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <set_timer_start@plt>
imul   $0x3c,-0x4(%rbp),%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause_minutes>:
push   %rbx
mov    %edi,%ebx
call   1030 <set_timer_start@plt>
imul   $0x3c,%ebx,%edi
pop    %rbx
jmp    1040 <sleep@plt>

LLVM IR (-O0):
define void @pause_minutes(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @set_timer_start(i32 %3)
%5 = load i32, i32* %2
%6 = mul i32 %5, 60
%7 = call i32 @sleep(i32 %6)
ret void
}

LLVM IR (-O2):
define void @pause_minutes(i32 %0) {
%2 = tail call i32 @set_timer_start(i32 %0)
%3 = mul i32 %0, 60
%4 = tail call i32 @sleep(i32 %3)
ret void
}
void __attribute__((weak)) reboot(void) {}


x86 assembly (clang, -O0):
<reboot>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reboot>:
ret

LLVM IR (-O0):
define weak void @reboot() {
ret void
}

LLVM IR (-O2):
define weak void @reboot() {
ret void
}
int sblib_proc_count(void) { return 1; }


x86 assembly (clang, -O0):
<sblib_proc_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sblib_proc_count>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @sblib_proc_count() {
ret i32 1
}

LLVM IR (-O2):
define i32 @sblib_proc_count() {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ rewind(int /*<<< orphan*/ *);
__attribute__((__weak__, __always___)) void softboundcets_rewind(FILE *stream) {
  rewind(stream);
}


x86 assembly (clang, -O0):
<softboundcets_rewind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rewind@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_rewind>:
jmp    1030 <rewind@plt>

LLVM IR (-O0):
define weak void @softboundcets_rewind(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @rewind(i32* %3)
ret void
}

LLVM IR (-O2):
define weak void @softboundcets_rewind(i32* %0) {
%2 = tail call i32 @rewind(i32* %0)
ret void
}
/* Variables and functions */
int pigpio_command(int, int, int /*<<< orphan*/, int /*<<< orphan*/, int);
int wave_tx_repeat(int pi) { return pigpio_command(pi, 31, 0, 0, 1); }


x86 assembly (clang, -O0):
<wave_tx_repeat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1f,%esi
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    %ecx,%edx
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wave_tx_repeat>:
mov    $0x1f,%esi
xor    %edx,%edx
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @wave_tx_repeat(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pigpio_command(i32 %3, i32 31, i32 0, i32 0, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @wave_tx_repeat(i32 %0) {
%2 = tail call i32 @pigpio_command(i32 %0, i32 31, i32 0, i32 0, i32 1)
ret i32 %2
}
/* Variables and functions */
int check_arg_count(int, int);
int /*<<< orphan*/ report_count(int);
int /*<<< orphan*/ report_error(char *);
void cmd_wgetbkgrnd(int nargs, char **args) {
  if (check_arg_count(nargs, 1) == 1)
    return;
  report_count(1);
  report_error("UNSUPPORTED");
}


x86 assembly (clang, -O0):
<cmd_wgetbkgrnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <check_arg_count@plt>
cmp    $0x1,%eax
jne    115a <cmd_wgetbkgrnd+0x2a>
jmp    1170 <cmd_wgetbkgrnd+0x40>
mov    $0x1,%edi
call   1040 <report_count@plt>
lea    0xe95(%rip),%rdi
call   1050 <report_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_wgetbkgrnd>:
push   %rax
mov    $0x1,%esi
call   1030 <check_arg_count@plt>
cmp    $0x1,%eax
jne    1142 <cmd_wgetbkgrnd+0x12>
pop    %rax
ret
mov    $0x1,%edi
call   1040 <report_count@plt>
lea    0xead(%rip),%rdi
pop    %rax
jmp    1050 <report_error@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"UNSUPPORTED\00"
define void @cmd_wgetbkgrnd(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = call i32 @check_arg_count(i32 %5, i32 1)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
br label %12
9: ; preds = %2
%10 = call i32 @report_count(i32 1)
%11 = call i32 @report_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"UNSUPPORTED\00"
define void @cmd_wgetbkgrnd(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @check_arg_count(i32 %0, i32 1)
%4 = icmp eq i32 %3, 1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @report_count(i32 1)
%7 = tail call i32 @report_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %5
ret void
}
void UARTStdioInit(char i) {}


x86 assembly (clang, -O0):
<UARTStdioInit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTStdioInit>:
ret

LLVM IR (-O0):
define void @UARTStdioInit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @UARTStdioInit(i8 signext %0) {
ret void
}
/* Type definitions */
struct yaffs_obj {
  int dummy;
};

/* Variables and functions */
int yaffs_do_listxattr_reldir(struct yaffs_obj *, char const *, char *, int,
                              int);
int yaffs_listxattr_reldir(struct yaffs_obj *reldir, const char *path,
                           char *data, int size) {
  return yaffs_do_listxattr_reldir(reldir, path, data, size, 1);
}


x86 assembly (clang, -O0):
<yaffs_listxattr_reldir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x1,%r8d
call   1030 <yaffs_do_listxattr_reldir@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yaffs_listxattr_reldir>:
mov    $0x1,%r8d
jmp    1030 <yaffs_do_listxattr_reldir@plt>

LLVM IR (-O0):
%struct.yaffs_obj = type { i32 }
define i32 @yaffs_listxattr_reldir(%struct.yaffs_obj* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca %struct.yaffs_obj*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store %struct.yaffs_obj* %0, %struct.yaffs_obj** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load %struct.yaffs_obj*, %struct.yaffs_obj** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 @yaffs_do_listxattr_reldir(%struct.yaffs_obj* %9, i8* %10, i8* %11, i32 %12, i32 1)
ret i32 %13
}

LLVM IR (-O2):
%struct.yaffs_obj = type { i32 }
define i32 @yaffs_listxattr_reldir(%struct.yaffs_obj* %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @yaffs_do_listxattr_reldir(%struct.yaffs_obj* %0, i8* %1, i8* %2, i32 %3, i32 1)
ret i32 %5
}
/* Variables and functions */
char *_syscall_malloc(long);
char *_get_new_sar(long size, long align_size) {
  char *ret;
  long last_element;
  ret = _syscall_malloc(align_size);
  last_element = *(long *)(0x300003000);
  *(char **)last_element = ret;
  *((char **)(last_element + 8)) = ret + align_size;
  *((char **)(last_element + 16)) = ret + size;
  return ret;
}


x86 assembly (clang, -O0):
<_get_new_sar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <_syscall_malloc@plt>
mov    %rax,-0x18(%rbp)
movabs $0x300003000,%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
add    -0x10(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x18(%rbp),%rcx
add    -0x8(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,0x10(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_new_sar>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <_syscall_malloc@plt>
movabs $0x300003000,%rcx
mov    (%rcx),%rcx
mov    %rax,(%rcx)
add    %rax,%rbx
mov    %rbx,0x8(%rcx)
add    %rax,%r14
mov    %r14,0x10(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_get_new_sar(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %4
%8 = call i8* @_syscall_malloc(i64 %7)
store i8* %8, i8** %5
%9 = load i64, i64* inttoptr (i64 12884914176 to i64*)
store i64 %9, i64* %6
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = inttoptr i64 %11 to i8**
store i8* %10, i8** %12
%13 = load i8*, i8** %5
%14 = load i64, i64* %4
%15 = getelementptr inbounds i8, i8* %13, i64 %14
%16 = load i64, i64* %6
%17 = add nsw i64 %16, 8
%18 = inttoptr i64 %17 to i8**
store i8* %15, i8** %18
%19 = load i8*, i8** %5
%20 = load i64, i64* %3
%21 = getelementptr inbounds i8, i8* %19, i64 %20
%22 = load i64, i64* %6
%23 = add nsw i64 %22, 16
%24 = inttoptr i64 %23 to i8**
store i8* %21, i8** %24
%25 = load i8*, i8** %5
ret i8* %25
}

LLVM IR (-O2):
define i8* @_get_new_sar(i64 %0, i64 %1) {
%3 = tail call i8* @_syscall_malloc(i64 %1)
%4 = load i64, i64* inttoptr (i64 12884914176 to i64*)
%5 = inttoptr i64 %4 to i8**
store i8* %3, i8** %5
%6 = getelementptr inbounds i8, i8* %3, i64 %1
%7 = add nsw i64 %4, 8
%8 = inttoptr i64 %7 to i8**
store i8* %6, i8** %8
%9 = getelementptr inbounds i8, i8* %3, i64 %0
%10 = add nsw i64 %4, 16
%11 = inttoptr i64 %10 to i8**
store i8* %9, i8** %11
ret i8* %3
}
/* Type definitions */
struct t_relay_weechat_nicklist {
  int dummy;
};
struct t_hashtable {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
relay_weechat_nicklist_free(struct t_relay_weechat_nicklist *);
void relay_weechat_free_buffers_nicklist(struct t_hashtable *hashtable,
                                         const void *key, void *value) {
  (void)hashtable;
  (void)key;
  relay_weechat_nicklist_free((struct t_relay_weechat_nicklist *)value);
}


x86 assembly (clang, -O0):
<relay_weechat_free_buffers_nicklist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <relay_weechat_nicklist_free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<relay_weechat_free_buffers_nicklist>:
mov    %rdx,%rdi
jmp    1030 <relay_weechat_nicklist_free@plt>

LLVM IR (-O0):
%struct.t_hashtable = type { i32 }
%struct.t_relay_weechat_nicklist = type { i32 }
define void @relay_weechat_free_buffers_nicklist(%struct.t_hashtable* %0, i8* %1, i8* %2) {
%4 = alloca %struct.t_hashtable*
%5 = alloca i8*
%6 = alloca i8*
store %struct.t_hashtable* %0, %struct.t_hashtable** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.t_hashtable*, %struct.t_hashtable** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = bitcast i8* %9 to %struct.t_relay_weechat_nicklist*
%11 = call i32 @relay_weechat_nicklist_free(%struct.t_relay_weechat_nicklist* %10)
ret void
}

LLVM IR (-O2):
%struct.t_hashtable = type { i32 }
%struct.t_relay_weechat_nicklist = type { i32 }
define void @relay_weechat_free_buffers_nicklist(%struct.t_hashtable* nocapture readnone %0, i8* nocapture readnone %1, i8* %2) {
%4 = bitcast i8* %2 to %struct.t_relay_weechat_nicklist*
%5 = tail call i32 @relay_weechat_nicklist_free(%struct.t_relay_weechat_nicklist* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ op_write1(int);
void op_enc_dec_sp(void) { op_write1(0x3b); }


x86 assembly (clang, -O0):
<op_enc_dec_sp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b,%edi
call   1030 <op_write1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_enc_dec_sp>:
mov    $0x3b,%edi
jmp    1030 <op_write1@plt>

LLVM IR (-O0):
define void @op_enc_dec_sp() {
%1 = call i32 @op_write1(i32 59)
ret void
}

LLVM IR (-O2):
define void @op_enc_dec_sp() {
%1 = tail call i32 @op_write1(i32 59)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ protectedatoi(char *, int *);
int positive_atoi(char *data) {
  int value;
  if (!protectedatoi(data, &value))
    return -1;
  if (value < 0)
    return -1;
  return value;
}


x86 assembly (clang, -O0):
<positive_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1030 <protectedatoi@plt>
cmp    $0x0,%eax
jne    113e <positive_atoi+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <positive_atoi+0x4a>
cmpl   $0x0,-0x14(%rbp)
jge    1154 <positive_atoi+0x44>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <positive_atoi+0x4a>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<positive_atoi>:
push   %rax
lea    0x4(%rsp),%rsi
call   1030 <protectedatoi@plt>
mov    0x4(%rsp),%ecx
test   %ecx,%ecx
mov    $0xffffffff,%edx
cmovns %ecx,%edx
cmp    $0x1,%eax
sbb    %eax,%eax
or     %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @positive_atoi(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @protectedatoi(i8* %5, i32* %4)
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 -1, i32* %2
br label %15
9: ; preds = %1
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 -1, i32* %2
br label %15
13: ; preds = %9
%14 = load i32, i32* %4
store i32 %14, i32* %2
br label %15
15: ; preds = %13, %12, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @positive_atoi(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @protectedatoi(i8* %0, i32* %2)
%5 = icmp eq i32 %4, 0
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, -1
%8 = select i1 %7, i32 %6, i32 -1
%9 = select i1 %5, i32 -1, i32 %8
ret i32 %9
}
unsigned int required_bits(unsigned int x) {
  int bits = 31;
  while ((x & (1 << bits)) == 0 && bits)
    bits--;
  return bits;
}


x86 assembly (clang, -O0):
<required_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1f,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x10(%rbp),%ecx
and    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    113b <required_bits+0x3b>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    114b <required_bits+0x4b>
jmp    1159 <required_bits+0x59>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <required_bits+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<required_bits>:
mov    $0x1f,%eax
cs nopw 0x0(%rax,%rax,1)
nop
mov    %eax,%edx
add    $0xffffffff,%eax
setb   %cl
bt     %edx,%edi
jb     1121 <required_bits+0x21>
test   %cl,%cl
jne    1110 <required_bits+0x10>
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @required_bits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 31, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = icmp ne i32 %11, 0
br label %13
13: ; preds = %10, %4
%14 = phi i1 [ false, %4 ], [ %12, %10 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i32, i32* %3
%17 = add nsw i32 %16, -1
store i32 %17, i32* %3
br label %4
18: ; preds = %13
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @required_bits(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 31, %1 ], [ %9, %2 ]
%4 = shl nuw i32 1, %3
%5 = and i32 %4, %0
%6 = icmp eq i32 %5, 0
%7 = icmp ne i32 %3, 0
%8 = select i1 %6, i1 %7, i1 false
%9 = add nsw i32 %3, -1
br i1 %8, label %2, label %10
10: ; preds = %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  int a = 1, b = 2, c = 3, d = 0;
  if (a == 1)
    if (b != 2)
      if (c != 3)
        d = 1;
      else
        d = 2;
    else if (c != 3)
      d = 3;
    else
      d = 4;
  else
    d = 5;
  printf("%d\n", d);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1198 <main+0x88>
cmpl   $0x2,-0xc(%rbp)
je     1171 <main+0x61>
cmpl   $0x3,-0x10(%rbp)
je     1165 <main+0x55>
movl   $0x1,-0x14(%rbp)
jmp    116c <main+0x5c>
movl   $0x2,-0x14(%rbp)
jmp    1193 <main+0x83>
cmpl   $0x3,-0x10(%rbp)
je     1187 <main+0x77>
movl   $0x3,-0x14(%rbp)
jmp    118e <main+0x7e>
movl   $0x4,-0x14(%rbp)
jmp    1193 <main+0x83>
jmp    119f <main+0x8f>
movl   $0x5,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xe57(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
store i32 3, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %24
8: ; preds = %0
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 2
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load i32, i32* %4
%13 = icmp ne i32 %12, 3
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %5
br label %16
15: ; preds = %11
store i32 2, i32* %5
br label %16
16: ; preds = %15, %14
br label %23
17: ; preds = %8
%18 = load i32, i32* %4
%19 = icmp ne i32 %18, 3
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 3, i32* %5
br label %22
21: ; preds = %17
store i32 4, i32* %5
br label %22
22: ; preds = %21, %20
br label %23
23: ; preds = %22, %16
br label %25
24: ; preds = %0
store i32 5, i32* %5
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %5
%27 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %26)
%28 = load i32, i32* %1
ret i32 %28
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Ciencia da Computacao\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Ciencia da Computacao\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [22 x i8] c"Ciencia da Computacao\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int crypto_scalarmult_curve25519_base(unsigned char *, unsigned char *);
int crypto_box_curve25519xsalsa20poly1305_keypair(unsigned char *pk,
                                                  unsigned char *sk) {
  return crypto_scalarmult_curve25519_base(pk, sk);
}


x86 assembly (clang, -O0):
<crypto_box_curve25519xsalsa20poly1305_keypair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <crypto_scalarmult_curve25519_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_box_curve25519xsalsa20poly1305_keypair>:
jmp    1030 <crypto_scalarmult_curve25519_base@plt>

LLVM IR (-O0):
define i32 @crypto_box_curve25519xsalsa20poly1305_keypair(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @crypto_scalarmult_curve25519_base(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @crypto_box_curve25519xsalsa20poly1305_keypair(i8* %0, i8* %1) {
%3 = tail call i32 @crypto_scalarmult_curve25519_base(i8* %0, i8* %1)
ret i32 %3
}
void idris2_setupTerm() {}


x86 assembly (clang, -O0):
<idris2_setupTerm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idris2_setupTerm>:
ret

LLVM IR (-O0):
define void @idris2_setupTerm() {
ret void
}

LLVM IR (-O2):
define void @idris2_setupTerm() {
ret void
}
unsigned short int
unsignedshortint_ignoring_unsignedshortint(unsigned short int x,
                                           unsigned short int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedshortint_ignoring_unsignedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedshortint_ignoring_unsignedshortint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @unsignedshortint_ignoring_unsignedshortint(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @unsignedshortint_ignoring_unsignedshortint(i16 returned zeroext %0, i16 zeroext %1) {
ret i16 %0
}
/* Type definitions */
struct S_SHM_BLOCK {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dbg(int, char *, struct S_SHM_BLOCK *);
void _shm_init(struct S_SHM_BLOCK *shm_block) {
  dbg(0b00100000 | 0b00000100, "Initializing block: %p\n", shm_block);
}


x86 assembly (clang, -O0):
<_shm_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x24,%edi
lea    0xed4(%rip),%rsi
call   1030 <dbg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_shm_init>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rsi
mov    $0x24,%edi
jmp    1030 <dbg@plt>

LLVM IR (-O0):
%struct.S_SHM_BLOCK = type { i32 }
@.str = [24 x i8] c"Initializing block: %p\0A\00"
define void @_shm_init(%struct.S_SHM_BLOCK* %0) {
%2 = alloca %struct.S_SHM_BLOCK*
store %struct.S_SHM_BLOCK* %0, %struct.S_SHM_BLOCK** %2
%3 = load %struct.S_SHM_BLOCK*, %struct.S_SHM_BLOCK** %2
%4 = call i32 @dbg(i32 36, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), %struct.S_SHM_BLOCK* %3)
ret void
}

LLVM IR (-O2):
%struct.S_SHM_BLOCK = type { i32 }
@.str = [24 x i8] c"Initializing block: %p\0A\00"
define void @_shm_init(%struct.S_SHM_BLOCK* %0) {
%2 = tail call i32 @dbg(i32 36, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), %struct.S_SHM_BLOCK* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DMA13_DriverIRQHandler();
__attribute__((weak)) void DMA13_IRQHandler(void) { DMA13_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<DMA13_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DMA13_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA13_IRQHandler>:
xor    %eax,%eax
jmp    1030 <DMA13_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @DMA13_IRQHandler() {
%1 = call i32 (...) @DMA13_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @DMA13_IRQHandler() {
%1 = tail call i32 (...) @DMA13_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_banner() {
  printf("\n");
  printf("SDCUDA - A CUDA/CULA powered multiprocessing pipeline for spectral "
         "deconvolution.\n");
  printf("\n");
  printf("Authors:\tRob Barnsley (Oxford)\n");
  printf("\n");
}


x86 assembly (clang, -O0):
<print_banner>:
push   %rbp
mov    %rsp,%rbp
lea    0xf56(%rip),%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
lea    0xf3e(%rip),%rdi
call   1030 <printf@plt>
lea    0xf14(%rip),%rdi
call   1030 <printf@plt>
lea    0xf26(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_banner>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
lea    0xece(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
lea    0xf0a(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
@.str.1 = [83 x i8] c"SDCUDA - A CUDA/CULA powered multiprocessing pipeline for spectral deconvolution.\0A\00"
@.str.2 = [32 x i8] c"Authors:\09Rob Barnsley (Oxford)\0A\00"
define void @print_banner() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([83 x i8], [83 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [82 x i8] c"SDCUDA - A CUDA/CULA powered multiprocessing pipeline for spectral deconvolution.\00"
@str.3 = [31 x i8] c"Authors:\09Rob Barnsley (Oxford)\00"
define void @print_banner() {
%1 = tail call i32 @putchar(i32 10)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([82 x i8], [82 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @putchar(i32 10)
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str.3, i64 0, i64 0))
%5 = tail call i32 @putchar(i32 10)
ret void
}
double Time(void) { return 0.0; }


x86 assembly (clang, -O0):
<Time>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Time>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @Time() {
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @Time() {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void fail1(void) { abort(); }


x86 assembly (clang, -O0):
<fail1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<fail1>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @fail1() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @fail1() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_cond_destroy(int /*<<< orphan*/ *);
void EventClose(void *Handle) {
  if (Handle) {
    pthread_cond_destroy((pthread_cond_t *)Handle);
    free((pthread_cond_t *)Handle);
  }
}


x86 assembly (clang, -O0):
<EventClose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1149 <EventClose+0x29>
mov    -0x8(%rbp),%rdi
call   1040 <pthread_cond_destroy@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EventClose>:
test   %rdi,%rdi
je     1137 <EventClose+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <pthread_cond_destroy@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @EventClose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = call i32 @pthread_cond_destroy(i32* %7)
%9 = load i8*, i8** %2
%10 = bitcast i8* %9 to i32*
%11 = call i32 @free(i32* %10)
br label %12
12: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @EventClose(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i32*
%5 = tail call i32 @pthread_cond_destroy(i32* %4)
%6 = tail call i32 @free(i32* %4)
br label %7
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
int createSemAux(int /*<<< orphan*/);
int getSemId() { return createSemAux(0); }


x86 assembly (clang, -O0):
<getSemId>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <createSemAux@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSemId>:
xor    %edi,%edi
jmp    1030 <createSemAux@plt>

LLVM IR (-O0):
define i32 @getSemId() {
%1 = call i32 @createSemAux(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @getSemId() {
%1 = tail call i32 @createSemAux(i32 0)
ret i32 %1
}
/* Type definitions */
struct ibv_async_event {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ack_async_event(struct ibv_async_event *);
int /*<<< orphan*/ dmtcp_plugin_disable_ckpt();
int /*<<< orphan*/ dmtcp_plugin_enable_ckpt();
void ibv_ack_async_event(struct ibv_async_event *event) {
  dmtcp_plugin_disable_ckpt();
  _ack_async_event(event);
  dmtcp_plugin_enable_ckpt();
}


x86 assembly (clang, -O0):
<ibv_ack_async_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <dmtcp_plugin_disable_ckpt@plt>
mov    -0x8(%rbp),%rdi
call   1040 <_ack_async_event@plt>
mov    $0x0,%al
call   1050 <dmtcp_plugin_enable_ckpt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ibv_ack_async_event>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <dmtcp_plugin_disable_ckpt@plt>
mov    %rbx,%rdi
call   1040 <_ack_async_event@plt>
xor    %eax,%eax
pop    %rbx
jmp    1050 <dmtcp_plugin_enable_ckpt@plt>

LLVM IR (-O0):
%struct.ibv_async_event = type { i32 }
define void @ibv_ack_async_event(%struct.ibv_async_event* %0) {
%2 = alloca %struct.ibv_async_event*
store %struct.ibv_async_event* %0, %struct.ibv_async_event** %2
%3 = call i32 (...) @dmtcp_plugin_disable_ckpt()
%4 = load %struct.ibv_async_event*, %struct.ibv_async_event** %2
%5 = call i32 @_ack_async_event(%struct.ibv_async_event* %4)
%6 = call i32 (...) @dmtcp_plugin_enable_ckpt()
ret void
}

LLVM IR (-O2):
%struct.ibv_async_event = type { i32 }
define void @ibv_ack_async_event(%struct.ibv_async_event* %0) {
%2 = tail call i32 (...) @dmtcp_plugin_disable_ckpt()
%3 = tail call i32 @_ack_async_event(%struct.ibv_async_event* %0)
%4 = tail call i32 (...) @dmtcp_plugin_enable_ckpt()
ret void
}
long long llmax(long long a, long long b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<llmax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <llmax+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <llmax+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<llmax>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @llmax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @llmax(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_add_object_vtable(void *bus, void **slot, const char *path,
                         const char *interface, const void *vtable,
                         void *userdata) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_add_object_vtable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %eax,%eax
mov    0x2ebb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_add_object_vtable>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_add_object_vtable(i8* %0, i8** %1, i8* %2, i8* %3, i8* %4, i8* %5) {
%7 = alloca i8*
%8 = alloca i8**
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i8*
store i8* %0, i8** %7
store i8** %1, i8*** %8
store i8* %2, i8** %9
store i8* %3, i8** %10
store i8* %4, i8** %11
store i8* %5, i8** %12
%13 = load i32, i32* @EINVAL
%14 = sub nsw i32 0, %13
ret i32 %14
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_add_object_vtable(i8* nocapture readnone %0, i8** nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void swap_mem_uint64(uint64_t *a, uint64_t *b) {
  uint64_t tmp = *a;
  *a = *b;
  *b = tmp;
  return;
}


x86 assembly (clang, -O0):
<swap_mem_uint64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_mem_uint64>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap_mem_uint64(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap_mem_uint64(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
int do_420() { return 420; }


x86 assembly (clang, -O0):
<do_420>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1a4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_420>:
mov    $0x1a4,%eax
ret

LLVM IR (-O0):
define i32 @do_420() {
ret i32 420
}

LLVM IR (-O2):
define i32 @do_420() {
ret i32 420
}
/* Type definitions */
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int /*<<< orphan*/ FD_ZERO(int /*<<< orphan*/ *);
void sys_select_FD_ZERO(fd_set *set) { FD_ZERO(set); }


x86 assembly (clang, -O0):
<sys_select_FD_ZERO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <FD_ZERO@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_select_FD_ZERO>:
jmp    1030 <FD_ZERO@plt>

LLVM IR (-O0):
define void @sys_select_FD_ZERO(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @FD_ZERO(i32* %3)
ret void
}

LLVM IR (-O2):
define void @sys_select_FD_ZERO(i32* %0) {
%2 = tail call i32 @FD_ZERO(i32* %0)
ret void
}
int test_59_4(int *mem) { return __atomic_fetch_xor(mem + 0, 1, 4); }


x86 assembly (clang, -O0):
<test_59_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
xor    %esi,%edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    114b <test_59_4+0x4b>
jmp    1122 <test_59_4+0x22>
mov    -0x24(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_59_4>:
mov    (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
xor    $0x1,%ecx
lock cmpxchg %ecx,(%rdi)
jne    1110 <test_59_4+0x10>
ret

LLVM IR (-O0):
define i32 @test_59_4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 1, i32* %3
%7 = load i32, i32* %3
%8 = atomicrmw xor i32* %6, i32 %7 acq_rel
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_59_4(i32* nocapture %0) {
%2 = atomicrmw xor i32* %0, i32 1 acq_rel
ret i32 %2
}
/* Type definitions */
typedef int uint32_t;
typedef int int8_t;

/* Variables and functions */
int testBit_fun_int8_t(int8_t x, uint32_t i) { return (x & 1 << i) != 0; }


x86 assembly (clang, -O0):
<testBit_fun_int8_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testBit_fun_int8_t>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @testBit_fun_int8_t(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @testBit_fun_int8_t(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2SClockConfigure(uint32_t ui32Base, uint32_t ui32ClkConfig) {
  ;
  (*((volatile unsigned long *)(0x40021000 + 0x00000000))) =
      ui32ClkConfig & (0x00000004 | 0x00000003);
}


x86 assembly (clang, -O0):
<I2SClockConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7,%eax
movslq %eax,%rcx
mov    $0x40021000,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2SClockConfigure>:
and    $0x7,%esi
mov    %rsi,0x40021000
40
ret

LLVM IR (-O0):
define void @I2SClockConfigure(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 7
%7 = sext i32 %6 to i64
store volatile i64 %7, i64* inttoptr (i64 1073876992 to i64*)
ret void
}

LLVM IR (-O2):
define void @I2SClockConfigure(i32 %0, i32 %1) {
%3 = and i32 %1, 7
%4 = zext i32 %3 to i64
store volatile i64 %4, i64* inttoptr (i64 1073876992 to i64*)
ret void
}