xunge/DecIR huggingface dataset:
int backlight_set_brightness_default(struct backlight_device *dev) { return 0; }


x86 assembly (clang, -O0):
<backlight_set_brightness_default>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<backlight_set_brightness_default>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.backlight_device = type opaque
define i32 @backlight_set_brightness_default(%struct.backlight_device* %0) {
%2 = alloca %struct.backlight_device*
store %struct.backlight_device* %0, %struct.backlight_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.backlight_device = type opaque
define i32 @backlight_set_brightness_default(%struct.backlight_device* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_objective_j_comments() {
  test_parser_verify_parse(test_parser_sourcefile("objective_j", " //comment"),
                           "objective_j", "", "//comment", 0);
}


x86 assembly (clang, -O0):
<test_objective_j_comments>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xec4(%rip),%rdx
lea    0xebf(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_objective_j_comments>:
push   %rbx
lea    0xed8(%rip),%rbx
lea    0xedd(%rip),%rsi
mov    %rbx,%rdi
call   1030 <test_parser_sourcefile@plt>
lea    0xecd(%rip),%rdx
lea    0xec8(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
xor    %r8d,%r8d
pop    %rbx
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"objective_j\00"
@.str.1 = [11 x i8] c" //comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [10 x i8] c"//comment\00"
define void @test_objective_j_comments() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"objective_j\00"
@.str.1 = [11 x i8] c" //comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [10 x i8] c"//comment\00"
define void @test_objective_j_comments() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, char *);
int main(void) {
  char *insertUrDodgyCodeHere;
  printf("Enter your name: ");
  scanf("%s", insertUrDodgyCodeHere);
  printf("Hello, %s", insertUrDodgyCodeHere);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdi
call   1040 <scanf@plt>
mov    -0x10(%rbp),%rsi
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
call   1040 <scanf@plt>
lea    0xed0(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Enter your name: \00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [10 x i8] c"Hello, %s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"Enter your name: \00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [10 x i8] c"Hello, %s\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* undef)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* undef)
ret i32 0
}
void __DELETE_java_nio_charset_CodingErrorAction(void *me, void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_java_nio_charset_CodingErrorAction>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_java_nio_charset_CodingErrorAction>:
ret

LLVM IR (-O0):
define void @__DELETE_java_nio_charset_CodingErrorAction(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_java_nio_charset_CodingErrorAction(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void waitForTimeTick() {
  printf("'waitForTimeTick()': Not implemented yet.\n");
}


x86 assembly (clang, -O0):
<waitForTimeTick>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitForTimeTick>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"'waitForTimeTick()': Not implemented yet.\0A\00"
define void @waitForTimeTick() {
%1 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [42 x i8] c"'waitForTimeTick()': Not implemented yet.\00"
define void @waitForTimeTick() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int check_file_exists(char *filename) {
  FILE *file_check = fopen(filename, "r");
  if (file_check != NULL) {
    fclose(file_check);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<check_file_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1160 <check_file_exists+0x40>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
jmp    1167 <check_file_exists+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_file_exists>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1141 <check_file_exists+0x21>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32 @check_file_exists(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %4
%7 = load i32*, i32** %4
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32*, i32** %4
%11 = call i32 @fclose(i32* %10)
store i32 1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define i32 @check_file_exists(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fclose(i32* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_cvolume_get_fade() {
  printf("NOT IMPLEMENTED:"
         "pa_cvolume_get_fade"
         "\n");
}


x86 assembly (clang, -O0):
<pa_cvolume_get_fade>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_cvolume_get_fade>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"NOT IMPLEMENTED:pa_cvolume_get_fade\0A\00"
define i32 @pa_cvolume_get_fade() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [36 x i8] c"NOT IMPLEMENTED:pa_cvolume_get_fade\00"
define i32 @pa_cvolume_get_fade() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void g_node_insert() {}


x86 assembly (clang, -O0):
<g_node_insert>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_node_insert>:
ret

LLVM IR (-O0):
define void @g_node_insert() {
ret void
}

LLVM IR (-O2):
define void @g_node_insert() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2cSetAddress(int, unsigned char);
int i2c_smbus_read_byte(int);
int i2cReadByte(int i2cAdapter, unsigned char address) {
  int byte;
  i2cSetAddress(i2cAdapter, address);
  if ((byte = i2c_smbus_read_byte(i2cAdapter)) < 0) {
    return -1;
  }
  return byte;
}


x86 assembly (clang, -O0):
<i2cReadByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%edi
movzbl -0x9(%rbp),%esi
call   1040 <i2cSetAddress@plt>
mov    -0x8(%rbp),%edi
call   1030 <i2c_smbus_read_byte@plt>
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
jge    115d <i2cReadByte+0x3d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <i2cReadByte+0x43>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2cReadByte>:
push   %rbx
mov    %edi,%ebx
call   1040 <i2cSetAddress@plt>
mov    %ebx,%edi
call   1030 <i2c_smbus_read_byte@plt>
test   %eax,%eax
mov    $0xffffffff,%ecx
cmovs  %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @i2cReadByte(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
%6 = alloca i32
store i32 %0, i32* %4
store i8 %1, i8* %5
%7 = load i32, i32* %4
%8 = load i8, i8* %5
%9 = call i32 @i2cSetAddress(i32 %7, i8 zeroext %8)
%10 = load i32, i32* %4
%11 = call i32 @i2c_smbus_read_byte(i32 %10)
store i32 %11, i32* %6
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %6
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @i2cReadByte(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @i2cSetAddress(i32 %0, i8 zeroext %1)
%4 = tail call i32 @i2c_smbus_read_byte(i32 %0)
%5 = icmp sgt i32 %4, -1
%6 = select i1 %5, i32 %4, i32 -1
ret i32 %6
}
/* Type definitions */
struct Node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct Node *);
int /*<<< orphan*/ swap_parent(struct Node **, struct Node *,
                               int /*<<< orphan*/ *);
int /*<<< orphan*/ update_balance(struct Node **, struct Node *);
int /*<<< orphan*/ update_height(struct Node *);
void remove_leaf(struct Node **root, struct Node *node) {
  swap_parent(root, node, NULL);
  update_height(node);
  update_balance(root, node);
  free(node);
}


x86 assembly (clang, -O0):
<remove_leaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1050 <swap_parent@plt>
mov    -0x10(%rbp),%rdi
call   1060 <update_height@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <update_balance@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_leaf>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edx,%edx
call   1050 <swap_parent@plt>
mov    %rbx,%rdi
call   1060 <update_height@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <update_balance@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.Node = type { i32 }
define void @remove_leaf(%struct.Node** %0, %struct.Node* %1) {
%3 = alloca %struct.Node**
%4 = alloca %struct.Node*
store %struct.Node** %0, %struct.Node*** %3
store %struct.Node* %1, %struct.Node** %4
%5 = load %struct.Node**, %struct.Node*** %3
%6 = load %struct.Node*, %struct.Node** %4
%7 = call i32 @swap_parent(%struct.Node** %5, %struct.Node* %6, i32* null)
%8 = load %struct.Node*, %struct.Node** %4
%9 = call i32 @update_height(%struct.Node* %8)
%10 = load %struct.Node**, %struct.Node*** %3
%11 = load %struct.Node*, %struct.Node** %4
%12 = call i32 @update_balance(%struct.Node** %10, %struct.Node* %11)
%13 = load %struct.Node*, %struct.Node** %4
%14 = call i32 @free(%struct.Node* %13)
ret void
}

LLVM IR (-O2):
%struct.Node = type { i32 }
define void @remove_leaf(%struct.Node** %0, %struct.Node* %1) {
%3 = tail call i32 @swap_parent(%struct.Node** %0, %struct.Node* %1, i32* null)
%4 = tail call i32 @update_height(%struct.Node* %1)
%5 = tail call i32 @update_balance(%struct.Node** %0, %struct.Node* %1)
%6 = tail call i32 @free(%struct.Node* %1)
ret void
}
/* Variables and functions */
void stub1(char, double);
void testClosureBDrV(void (*closure)(char, double), char a1, double a2) {
  if (closure != NULL)
    (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureBDrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsd  %xmm0,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1133 <testClosureBDrV+0x33>
mov    -0x8(%rbp),%rax
mov    -0x9(%rbp),%cl
movsd  -0x18(%rbp),%xmm0
movsbl %cl,%edi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureBDrV>:
test   %rdi,%rdi
je     110e <testClosureBDrV+0xe>
mov    %rdi,%rax
movsbl %sil,%edi
jmp    *%rax
ret

LLVM IR (-O0):
define void @testClosureBDrV(void (i8, double)* %0, i8 signext %1, double %2) {
%4 = alloca void (i8, double)*
%5 = alloca i8
%6 = alloca double
store void (i8, double)* %0, void (i8, double)** %4
store i8 %1, i8* %5
store double %2, double* %6
%7 = load void (i8, double)*, void (i8, double)** %4
%8 = icmp ne void (i8, double)* %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load void (i8, double)*, void (i8, double)** %4
%11 = load i8, i8* %5
%12 = load double, double* %6
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
define void @testClosureBDrV(void (i8, double)* %0, i8 signext %1, double %2) {
%4 = icmp eq void (i8, double)* %0, null
br i1 %4, label %6, label %5
5: ; preds = %3
tail call void %0(i8 signext %1, double %2)
br label %6
6: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int sqrt(int);
void main() {
  int x = 99;
  int res = sqrt(x);
  printf("Squre root for %d is: %d\n", x, res);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x63,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <sqrt@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x63,%edi
call   1040 <sqrt@plt>
lea    0xece(%rip),%rdi
mov    $0x63,%esi
mov    %eax,%edx
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Squre root for %d is: %d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 99, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @sqrt(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Squre root for %d is: %d\0A\00"
define void @main() {
%1 = tail call i32 @sqrt(i32 99)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 99, i32 %1)
ret void
}
/* Variables and functions */
int parse_int(char const *, int /*<<< orphan*/ *, char);
int /*<<< orphan*/ sleep(int);
void do_sleep(const char *opt) {
  int s = parse_int(opt, NULL, '\0');
  sleep(s);
}


x86 assembly (clang, -O0):
<do_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <parse_int@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_sleep>:
push   %rax
xor    %esi,%esi
xor    %edx,%edx
call   1030 <parse_int@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sleep@plt>

LLVM IR (-O0):
define void @do_sleep(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @parse_int(i8* %4, i32* null, i8 signext 0)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @sleep(i32 %6)
ret void
}

LLVM IR (-O2):
define void @do_sleep(i8* %0) {
%2 = tail call i32 @parse_int(i8* %0, i32* null, i8 signext 0)
%3 = tail call i32 @sleep(i32 %2)
ret void
}
int __umoddi3() { return 0; }


x86 assembly (clang, -O0):
<__umoddi3>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__umoddi3>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__umoddi3() {
ret i32 0
}

LLVM IR (-O2):
define i32 @__umoddi3() {
ret i32 0
}
/* Variables and functions */
double exp(double);
double log(double);
double error_from_phred_quality(double Q) {
  return exp((log(10.0) * Q) / -10.0);
}


x86 assembly (clang, -O0):
<error_from_phred_quality>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xed3(%rip),%xmm0
call   1040 <log@plt>
mulsd  -0x8(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_from_phred_quality>:
mulsd  0xee8(%rip),%xmm0
divsd  0xee8(%rip),%xmm0
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @error_from_phred_quality(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call double @log(double 1.000000e+01)
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = fdiv double %5, -1.000000e+01
%7 = call double @exp(double %6)
ret double %7
}

LLVM IR (-O2):
define double @error_from_phred_quality(double %0) {
%2 = fmul double %0, 0x40026BB1BBB55516
%3 = fdiv double %2, -1.000000e+01
%4 = tail call double @exp(double %3)
ret double %4
}
void pst_debug_unlock() {}


x86 assembly (clang, -O0):
<pst_debug_unlock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pst_debug_unlock>:
ret

LLVM IR (-O0):
define void @pst_debug_unlock() {
ret void
}

LLVM IR (-O2):
define void @pst_debug_unlock() {
ret void
}
int idcTriggerZeroValueThroughCall(int i) { return 5 / i; }


x86 assembly (clang, -O0):
<idcTriggerZeroValueThroughCall>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x5,%eax
cltd
idivl  -0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<idcTriggerZeroValueThroughCall>:
mov    $0x5,%eax
xor    %edx,%edx
idiv   %edi
ret

LLVM IR (-O0):
define i32 @idcTriggerZeroValueThroughCall(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 5, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @idcTriggerZeroValueThroughCall(i32 %0) {
%2 = sdiv i32 5, %0
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
void FlashIntDisable(uint32_t ui32IntFlags) {
  (*((volatile uint32_t *)(0x400FD010))) &= ~(ui32IntFlags);
}


x86 assembly (clang, -O0):
<FlashIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    $0x400fd010,%ecx
mov    (%rcx),%ecx
and    %eax,%ecx
mov    $0x400fd010,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashIntDisable>:
mov    %edi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
not    %eax
and    %eax,0x400fd010
ret

LLVM IR (-O0):
define void @FlashIntDisable(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = xor i32 %3, -1
%5 = load volatile i32, i32* inttoptr (i64 1074778128 to i32*)
%6 = and i32 %5, %4
store volatile i32 %6, i32* inttoptr (i64 1074778128 to i32*)
ret void
}

LLVM IR (-O2):
define void @FlashIntDisable(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = xor i32 %3, -1
%5 = load volatile i32, i32* inttoptr (i64 1074778128 to i32*)
%6 = and i32 %5, %4
store volatile i32 %6, i32* inttoptr (i64 1074778128 to i32*)
ret void
}
void AYUVToNV21() {}


x86 assembly (clang, -O0):
<AYUVToNV21>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AYUVToNV21>:
ret

LLVM IR (-O0):
define void @AYUVToNV21() {
ret void
}

LLVM IR (-O2):
define void @AYUVToNV21() {
ret void
}
int pri_depth(struct arg *arg) { return 1; }


x86 assembly (clang, -O0):
<pri_depth>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pri_depth>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.arg = type opaque
define i32 @pri_depth(%struct.arg* %0) {
%2 = alloca %struct.arg*
store %struct.arg* %0, %struct.arg** %2
ret i32 1
}

LLVM IR (-O2):
%struct.arg = type opaque
define i32 @pri_depth(%struct.arg* nocapture readnone %0) {
ret i32 1
}
int test_imm_E9int8_reg(signed char val) {
  return ((val) & (-0xE9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E9int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff17,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E9int8_reg>:
test   $0xffffff17,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E9int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -233
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E9int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -233
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int strcmp(char const *const, char const *const);
int sort_builtins(const void *p1, const void *p2) {
  return (strcmp(*(const char *const *)p1, *(const char *const *)p2));
}


x86 assembly (clang, -O0):
<sort_builtins>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_builtins>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @sort_builtins(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @sort_builtins(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, struct timespec *);
void wait_tick() {
  struct timespec ts;
  ts.tv_sec = 0;
  ts.tv_nsec = 1000;
  nanosleep(&ts, &ts);
}


x86 assembly (clang, -O0):
<wait_tick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movl   $0x3e8,-0x10(%rbp)
lea    -0x10(%rbp),%rsi
mov    %rsi,%rdi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_tick>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
movl   $0x3e8,0x8(%rsp)
lea    0x8(%rsp),%rdi
mov    %rdi,%rsi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define void @wait_tick() {
%1 = alloca %struct.timespec
%2 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
store i64 0, i64* %2
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
store i32 1000, i32* %3
%4 = call i32 @nanosleep(%struct.timespec* %1, %struct.timespec* %1)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define void @wait_tick() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
store i64 0, i64* %3
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
store i32 1000, i32* %4
%5 = call i32 @nanosleep(%struct.timespec* %1, %struct.timespec* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutexattr_t;

/* Variables and functions */
int pthread_mutexattr_destroy(pthread_mutexattr_t *__attr) { return 0; }


x86 assembly (clang, -O0):
<pthread_mutexattr_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_mutexattr_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_mutexattr_destroy(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_mutexattr_destroy(i32* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct passwd {
  int dummy;
};

/* Variables and functions */
struct passwd *getpwnam(char const *);
struct passwd *sys_getpwnam(const char *name) {
  return getpwnam(name);
}


x86 assembly (clang, -O0):
<sys_getpwnam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getpwnam@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_getpwnam>:
jmp    1030 <getpwnam@plt>

LLVM IR (-O0):
%struct.passwd = type { i32 }
define %struct.passwd* @sys_getpwnam(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call %struct.passwd* @getpwnam(i8* %3)
ret %struct.passwd* %4
}

LLVM IR (-O2):
%struct.passwd = type { i32 }
define %struct.passwd* @sys_getpwnam(i8* nocapture %0) {
%2 = tail call %struct.passwd* @getpwnam(i8* %0)
ret %struct.passwd* %2
}
void PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc) {
  unsigned long ulRegVal;
  ulRegVal = (*((volatile unsigned long *)(0x4402D000 + 0x00000004)));
  ulRegVal = ((ulRegVal | ulLpdsWakeupSrc) & 0x91);
  (*((volatile unsigned long *)(0x4402D000 + 0x00000004))) = ulRegVal;
}


x86 assembly (clang, -O0):
<PRCMLPDSWakeupSourceEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x4402d004,%eax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
or     -0x8(%rbp),%rax
and    $0x91,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x4402d004,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMLPDSWakeupSourceEnable>:
mov    0x4402d004,%rax
44
or     %edi,%eax
and    $0x91,%eax
mov    %rax,0x4402d004
44
ret

LLVM IR (-O0):
define void @PRCMLPDSWakeupSourceEnable(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1141035012 to i64*)
store i64 %4, i64* %3
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = or i64 %5, %6
%8 = and i64 %7, 145
store i64 %8, i64* %3
%9 = load i64, i64* %3
store volatile i64 %9, i64* inttoptr (i64 1141035012 to i64*)
ret void
}

LLVM IR (-O2):
define void @PRCMLPDSWakeupSourceEnable(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1141035012 to i64*)
%3 = or i64 %2, %0
%4 = and i64 %3, 145
store volatile i64 %4, i64* inttoptr (i64 1141035012 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_sys_cfg_bss_status_usage(void) {
  printf("\nUsage : sys_cfg_bss_status\n");
  return;
}


x86 assembly (clang, -O0):
<print_sys_cfg_bss_status_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_sys_cfg_bss_status_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"\0AUsage : sys_cfg_bss_status\0A\00"
define void @print_sys_cfg_bss_status_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"\0AUsage : sys_cfg_bss_status\00"
define void @print_sys_cfg_bss_status_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_SET_I2C_BUS1_SDA_PIN() { set_io_bit(0x34, 5); }


x86 assembly (clang, -O0):
<TOSH_SET_I2C_BUS1_SDA_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x34,%edi
mov    $0x5,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_I2C_BUS1_SDA_PIN>:
mov    $0x34,%edi
mov    $0x5,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_I2C_BUS1_SDA_PIN() {
%1 = call i32 @set_io_bit(i32 52, i32 5)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_I2C_BUS1_SDA_PIN() {
%1 = tail call i32 @set_io_bit(i32 52, i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_create_and_parse();
int /*<<< orphan*/ test_timeticks();
int main() {
  test_create_and_parse();
  test_timeticks();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_create_and_parse@plt>
mov    $0x0,%al
call   1030 <test_timeticks@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_create_and_parse@plt>
xor    %eax,%eax
call   1030 <test_timeticks@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_create_and_parse()
%3 = call i32 (...) @test_timeticks()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_create_and_parse()
%2 = tail call i32 (...) @test_timeticks()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char const *);
int match_str(const void *str1, const void *str2) {
  return !strcmp((const char *)str1, (const char *)str2);
}


x86 assembly (clang, -O0):
<match_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_str>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @match_str(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @match_str(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ mkfifo(char *, int);
void adb_initarbiter(void) {
  ;
  mkfifo("/dev/adb_arbiter", 0666);
}


x86 assembly (clang, -O0):
<adb_initarbiter>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1b6,%esi
call   1030 <mkfifo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adb_initarbiter>:
lea    0xee9(%rip),%rdi
mov    $0x1b6,%esi
jmp    1030 <mkfifo@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"/dev/adb_arbiter\00"
define void @adb_initarbiter() {
%1 = call i32 @mkfifo(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 438)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"/dev/adb_arbiter\00"
define void @adb_initarbiter() {
%1 = tail call i32 @mkfifo(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 438)
ret void
}
void freeDblMatrix(double **p) {
  ;
  if (p == 0L)
    return;
  if (p[0] != 0L)
    free(p[0]);
  free(p);
}


x86 assembly (clang, -O0):
<freeDblMatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <freeDblMatrix+0x1c>
jmp    114f <freeDblMatrix+0x3f>
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1146 <freeDblMatrix+0x36>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeDblMatrix>:
test   %rdi,%rdi
je     112f <freeDblMatrix+0x1f>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1126 <freeDblMatrix+0x16>
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @freeDblMatrix(double** %0) {
%2 = alloca double**
store double** %0, double*** %2
%3 = load double**, double*** %2
%4 = icmp eq double** %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %19
6: ; preds = %1
%7 = load double**, double*** %2
%8 = getelementptr inbounds double*, double** %7, i64 0
%9 = load double*, double** %8
%10 = icmp ne double* %9, null
br i1 %10, label %11, label %16
11: ; preds = %6
%12 = load double**, double*** %2
%13 = getelementptr inbounds double*, double** %12, i64 0
%14 = load double*, double** %13
%15 = bitcast double* %14 to i8*
br label %16
16: ; preds = %11, %6
%17 = load double**, double*** %2
%18 = bitcast double** %17 to i8*
br label %19
19: ; preds = %16, %5
ret void
}

LLVM IR (-O2):
define void @freeDblMatrix(double** %0) {
%2 = icmp eq double** %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load double*, double** %0
%5 = icmp eq double* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = bitcast double* %4 to i8*
tail call void @free(i8* %7)
br label %8
8: ; preds = %6, %3
%9 = bitcast double** %0 to i8*
tail call void @free(i8* %9)
br label %10
10: ; preds = %1, %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(
      stderr,
      "Usage: tattachmt numusers numthreads numgetattrs iterations aname\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [67 x i8] c"Usage: tattachmt numusers numthreads numgetattrs iterations aname\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [67 x i8] c"Usage: tattachmt numusers numthreads numgetattrs iterations aname\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ qsort(void *, size_t const, size_t const,
                         int (*)(void const *, void const *));
void sort(void *start, const size_t count, const size_t size,
          int (*compare)(const void *, const void *)) {
  qsort(start, count, size, compare);
}


x86 assembly (clang, -O0):
<sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <qsort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort>:
jmp    1030 <qsort@plt>

LLVM IR (-O0):
define void @sort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%13 = call i32 @qsort(i8* %9, i64 %10, i64 %11, i32 (i8*, i8*)* %12)
ret void
}

LLVM IR (-O2):
define void @sort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* nocapture %3) {
%5 = tail call i32 @qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3)
ret void
}
ectoc(int c) {
  if (c & 0x0100)
    c = c ^ (0x0100 | 0x40);
  if (c & 0x0800)
    c = c & 255;
  return (c);
}


x86 assembly (clang, -O0):
<ectoc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x100,%eax
cmp    $0x0,%eax
je     1123 <ectoc+0x23>
mov    -0x4(%rbp),%eax
xor    $0x140,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x800,%eax
cmp    $0x0,%eax
je     113f <ectoc+0x3f>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ectoc>:
mov    %edi,%ecx
xor    $0x140,%ecx
test   $0x100,%edi
cmove  %edi,%ecx
test   $0x800,%ecx
movzbl %cl,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ectoc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 256
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = xor i32 %7, 320
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %2
%11 = and i32 %10, 2048
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %2
%15 = and i32 %14, 255
store i32 %15, i32* %2
br label %16
16: ; preds = %13, %9
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @ectoc(i32 %0) {
%2 = and i32 %0, 256
%3 = icmp eq i32 %2, 0
%4 = xor i32 %0, 320
%5 = select i1 %3, i32 %0, i32 %4
%6 = and i32 %5, 2048
%7 = icmp eq i32 %6, 0
%8 = and i32 %5, 255
%9 = select i1 %7, i32 %5, i32 %8
ret i32 %9
}
double saddle(double x, double y, double t) {
  return 2 * (x - x * x + y - y * y);
}


x86 assembly (clang, -O0):
<saddle>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  0xe89(%rip),%xmm0
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<saddle>:
movapd %xmm0,%xmm2
mulsd  %xmm0,%xmm2
subsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm1
subsd  %xmm1,%xmm0
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @saddle(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %4
%9 = load double, double* %4
%10 = fneg double %8
%11 = call double @llvm.fmuladd.f64(double %10, double %9, double %7)
%12 = load double, double* %5
%13 = fadd double %11, %12
%14 = load double, double* %5
%15 = load double, double* %5
%16 = fneg double %14
%17 = call double @llvm.fmuladd.f64(double %16, double %15, double %13)
%18 = fmul double 2.000000e+00, %17
ret double %18
}

LLVM IR (-O2):
define double @saddle(double %0, double %1, double %2) {
%4 = fneg double %0
%5 = tail call double @llvm.fmuladd.f64(double %4, double %0, double %0)
%6 = fadd double %5, %1
%7 = fneg double %1
%8 = tail call double @llvm.fmuladd.f64(double %7, double %1, double %6)
%9 = fmul double %8, 2.000000e+00
ret double %9
}
long long int max(long long int a, long long int b) { return (a < b) ? b : a; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <max+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <max+0x2f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovl  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @max(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
br label %12
10: ; preds = %2
%11 = load i64, i64* %3
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @max(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
int eq(x, y) { return x == y; }


x86 assembly (clang, -O0):
<eq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eq>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @eq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @eq(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int decode_sigmaster_char(char in) {
  switch (in) {
  case 'u':
  case 'U':
    return 0;
  case 'f':
  case 'F':
    return 1;
  case 'r':
  case 'R':
    return 2;
  case 'd':
  case 'D':
    return 3;
  case 'b':
  case 'B':
    return 4;
  case 'l':
  case 'L':
    return 5;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<decode_sigmaster_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffbe,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x33,%eax
ja     117c <decode_sigmaster_char+0x7c>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1183 <decode_sigmaster_char+0x83>
movl   $0x1,-0x4(%rbp)
jmp    1183 <decode_sigmaster_char+0x83>
movl   $0x2,-0x4(%rbp)
jmp    1183 <decode_sigmaster_char+0x83>
movl   $0x3,-0x4(%rbp)
jmp    1183 <decode_sigmaster_char+0x83>
movl   $0x4,-0x4(%rbp)
jmp    1183 <decode_sigmaster_char+0x83>
movl   $0x5,-0x4(%rbp)
jmp    1183 <decode_sigmaster_char+0x83>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_sigmaster_char>:
add    $0xffffffbe,%edi
cmp    $0x33,%edi
ja     1138 <decode_sigmaster_char+0x38>
xor    %eax,%eax
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x4,%eax
ret
mov    $0x3,%eax
ret
mov    $0x1,%eax
ret
mov    $0x5,%eax
ret
mov    $0x2,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @decode_sigmaster_char(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %12 [
i32 117, label %6
i32 85, label %6
i32 102, label %7
i32 70, label %7
i32 114, label %8
i32 82, label %8
i32 100, label %9
i32 68, label %9
i32 98, label %10
i32 66, label %10
i32 108, label %11
i32 76, label %11
]
6: ; preds = %1, %1
store i32 0, i32* %2
br label %13
7: ; preds = %1, %1
store i32 1, i32* %2
br label %13
8: ; preds = %1, %1
store i32 2, i32* %2
br label %13
9: ; preds = %1, %1
store i32 3, i32* %2
br label %13
10: ; preds = %1, %1
store i32 4, i32* %2
br label %13
11: ; preds = %1, %1
store i32 5, i32* %2
br label %13
12: ; preds = %1
store i32 -1, i32* %2
br label %13
13: ; preds = %12, %11, %10, %9, %8, %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @decode_sigmaster_char(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %8 [
i32 117, label %9
i32 85, label %9
i32 102, label %3
i32 70, label %3
i32 114, label %4
i32 82, label %4
i32 100, label %5
i32 68, label %5
i32 98, label %6
i32 66, label %6
i32 108, label %7
i32 76, label %7
]
3: ; preds = %1, %1
br label %9
4: ; preds = %1, %1
br label %9
5: ; preds = %1, %1
br label %9
6: ; preds = %1, %1
br label %9
7: ; preds = %1, %1
br label %9
8: ; preds = %1
br label %9
9: ; preds = %1, %1, %8, %7, %6, %5, %4, %3
%10 = phi i32 [ -1, %8 ], [ 5, %7 ], [ 4, %6 ], [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %10
}