xunge/DecIR huggingface dataset:
void radio_df_ant_switching_gpios_cfg(void) {}


x86 assembly (clang, -O0):
<radio_df_ant_switching_gpios_cfg>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_df_ant_switching_gpios_cfg>:
ret

LLVM IR (-O0):
define void @radio_df_ant_switching_gpios_cfg() {
ret void
}

LLVM IR (-O2):
define void @radio_df_ant_switching_gpios_cfg() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int /*<<< orphan*/ printNewLine();
int /*<<< orphan*/ printNum(int);
int processB(int argc, char **argv) {
  int counter = 2;
  print("Scheduler process B is running\n");
  while (counter > 0) {
    print("Scheduler process B: row ");
    printNum(counter);
    printNewLine();
    counter--;
  }
  return 0;
}


x86 assembly (clang, -O0):
<processB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x2,-0x14(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <print@plt>
cmpl   $0x0,-0x14(%rbp)
jle    1185 <processB+0x55>
lea    0xebd(%rip),%rdi
call   1030 <print@plt>
mov    -0x14(%rbp),%edi
call   1040 <printNum@plt>
mov    $0x0,%al
call   1050 <printNewLine@plt>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1152 <processB+0x22>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<processB>:
push   %rbx
lea    0xec8(%rip),%rdi
call   1030 <print@plt>
lea    0xedc(%rip),%rbx
mov    %rbx,%rdi
call   1030 <print@plt>
mov    $0x2,%edi
call   1040 <printNum@plt>
xor    %eax,%eax
call   1050 <printNewLine@plt>
mov    %rbx,%rdi
call   1030 <print@plt>
mov    $0x1,%edi
call   1040 <printNum@plt>
xor    %eax,%eax
call   1050 <printNewLine@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"Scheduler process B is running\0A\00"
@.str.1 = [26 x i8] c"Scheduler process B: row \00"
define i32 @processB(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 2, i32* %5
%6 = call i32 @print(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %5
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = call i32 @print(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%12 = load i32, i32* %5
%13 = call i32 @printNum(i32 %12)
%14 = call i32 (...) @printNewLine()
%15 = load i32, i32* %5
%16 = add nsw i32 %15, -1
store i32 %16, i32* %5
br label %7
17: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [32 x i8] c"Scheduler process B is running\0A\00"
@.str.1 = [26 x i8] c"Scheduler process B: row \00"
define i32 @processB(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @print(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @print(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @printNum(i32 2)
%6 = tail call i32 (...) @printNewLine()
%7 = tail call i32 @print(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%8 = tail call i32 @printNum(i32 1)
%9 = tail call i32 (...) @printNewLine()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
int /*<<< orphan*/ write(int, char *, int);
void display(char *str) {
  char *tmp;
  for (tmp = str; *tmp; tmp++) {
    write(1, tmp, 1);
    usleep(100);
  }
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     116c <display+0x4c>
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
mov    %edx,%edi
call   1030 <write@plt>
mov    $0x64,%edi
call   1040 <usleep@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1134 <display+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rbx
cmpb   $0x0,(%rdi)
je     1156 <display+0x36>
mov    %rdi,%rbx
nopl   0x0(%rax)
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    $0x64,%edi
call   1040 <usleep@plt>
cmpb   $0x0,0x1(%rbx)
lea    0x1(%rbx),%rbx
jne    1130 <display+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @display(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %13, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = call i32 @write(i32 1, i8* %10, i32 1)
%12 = call i32 @usleep(i32 100)
br label %13
13: ; preds = %9
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
br label %5
16: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @display(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %0, %1 ]
%6 = tail call i32 @write(i32 1, i8* %5, i32 1)
%7 = tail call i32 @usleep(i32 100)
%8 = getelementptr inbounds i8, i8* %5, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void inter_assumes_not_null(void *ptr, char *err) {
  if (NULL == ptr) {
    fprintf(stderr, "Unexpected null: %s", err);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<inter_assumes_not_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
jne    115f <inter_assumes_not_null+0x3f>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeb0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inter_assumes_not_null>:
test   %rdi,%rdi
je     1126 <inter_assumes_not_null+0x6>
ret
push   %rax
mov    %rsi,%rdx
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"Unexpected null: %s\00"
define void @inter_assumes_not_null(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* null, %5
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %4
%10 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %2
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"Unexpected null: %s\00"
define void @inter_assumes_not_null(i8* readnone %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %1)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, int const);
int strlen(char const *);
char *xmalloc(int);
char *xstrdup(const char *str) {
  const int len = strlen(str) + 1;
  char *res = xmalloc(sizeof(char) * len);
  memcpy(res, str, len);
  return res;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1050 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
lea    0x1(%rax),%ebp
mov    %ebp,%edi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1050 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i8* @xmalloc(i32 %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = load i8*, i8** %2
%15 = load i32, i32* %3
%16 = call i32 @memcpy(i8* %13, i8* %14, i32 %15)
%17 = load i8*, i8** %4
ret i8* %17
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @xmalloc(i32 %3)
%5 = tail call i32 @memcpy(i8* %4, i8* %0, i32 %3)
ret i8* %4
}
double g0(double x) { return 1.0; }


x86 assembly (clang, -O0):
<g0>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<g0>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @g0(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @g0(double %0) {
ret double 1.000000e+00
}
int network_init() { return 0; }


x86 assembly (clang, -O0):
<network_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<network_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @network_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @network_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ BSP_UART_SendByte(unsigned int, unsigned char);
void BSP_UART_SendCongestionBuffer(unsigned int port, unsigned char *pBuffer,
                                   unsigned int length) {
  unsigned int n;
  for (n = 0; n < length; n++) {
    BSP_UART_SendByte(port, pBuffer[n]);
  }
}


x86 assembly (clang, -O0):
<BSP_UART_SendCongestionBuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jae    1156 <BSP_UART_SendCongestionBuffer+0x46>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
movzbl (%rax,%rcx,1),%esi
call   1030 <BSP_UART_SendByte@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1129 <BSP_UART_SendCongestionBuffer+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_UART_SendCongestionBuffer>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edx,%edx
je     1146 <BSP_UART_SendCongestionBuffer+0x36>
mov    %rsi,%r14
mov    %edi,%r15d
mov    %edx,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%r14,%rbp,1),%esi
mov    %r15d,%edi
call   1030 <BSP_UART_SendByte@plt>
add    $0x1,%rbp
cmp    %rbp,%rbx
jne    1130 <BSP_UART_SendCongestionBuffer+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @BSP_UART_SendCongestionBuffer(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i8*, i8** %5
%15 = load i32, i32* %7
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = call i32 @BSP_UART_SendByte(i32 %13, i8 zeroext %18)
br label %20
20: ; preds = %12
%21 = load i32, i32* %7
%22 = add i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @BSP_UART_SendCongestionBuffer(i32 %0, i8* nocapture %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %14, label %5
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %12, %7 ]
%9 = getelementptr inbounds i8, i8* %1, i64 %8
%10 = load i8, i8* %9
%11 = tail call i32 @BSP_UART_SendByte(i32 %0, i8 zeroext %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %3
ret void
}
/* Type definitions */
struct s_map {
  int dummy;
};

/* Variables and functions */
int mapGetPrefixID(struct s_map *, void const *, int const);
void *mapGetValueByID(struct s_map *, int);
void *mapGetN(struct s_map *map, const void *prefix, const int prefixlen) {
  int id = mapGetPrefixID(map, prefix, prefixlen);
  if (id < 0)
    return NULL;
  return mapGetValueByID(map, id);
}


x86 assembly (clang, -O0):
<mapGetN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <mapGetPrefixID@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jge    115d <mapGetN+0x3d>
movq   $0x0,-0x8(%rbp)
jmp    116d <mapGetN+0x4d>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%esi
call   1040 <mapGetValueByID@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapGetN>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mapGetPrefixID@plt>
test   %eax,%eax
js     1138 <mapGetN+0x18>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <mapGetValueByID@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.s_map = type { i32 }
define i8* @mapGetN(%struct.s_map* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca %struct.s_map*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store %struct.s_map* %0, %struct.s_map** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load %struct.s_map*, %struct.s_map** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @mapGetPrefixID(%struct.s_map* %9, i8* %10, i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %3
store i8* null, i8** %4
br label %20
16: ; preds = %3
%17 = load %struct.s_map*, %struct.s_map** %5
%18 = load i32, i32* %8
%19 = call i8* @mapGetValueByID(%struct.s_map* %17, i32 %18)
store i8* %19, i8** %4
br label %20
20: ; preds = %16, %15
%21 = load i8*, i8** %4
ret i8* %21
}

LLVM IR (-O2):
%struct.s_map = type { i32 }
define i8* @mapGetN(%struct.s_map* %0, i8* %1, i32 %2) {
%4 = tail call i32 @mapGetPrefixID(%struct.s_map* %0, i8* %1, i32 %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i8* @mapGetValueByID(%struct.s_map* %0, i32 %4)
br label %8
8: ; preds = %3, %6
%9 = phi i8* [ %7, %6 ], [ null, %3 ]
ret i8* %9
}
void dcache_enable(void) { return; }


x86 assembly (clang, -O0):
<dcache_enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcache_enable>:
ret

LLVM IR (-O0):
define void @dcache_enable() {
ret void
}

LLVM IR (-O2):
define void @dcache_enable() {
ret void
}
int iHxFaceDispMsg(int iMsgType, int iConfirmFlag, unsigned char *pszPrompt1,
                   unsigned char *pszPrompt2, unsigned char *pszLanguage) {
  return (0);
}


x86 assembly (clang, -O0):
<iHxFaceDispMsg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iHxFaceDispMsg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @iHxFaceDispMsg(i32 %0, i32 %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
ret i32 0
}

LLVM IR (-O2):
define i32 @iHxFaceDispMsg(i32 %0, i32 %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ port_byte_out(int, unsigned char);
void setcursor(unsigned int row, unsigned int column) {
  int offset = ((row * 80 + column) * 2);
  port_byte_out(0x3D4, 14);
  port_byte_out(0x3D5, (unsigned char)(offset >> 8));
  port_byte_out(0x3D4, 15);
  port_byte_out(0x3D5, (unsigned char)(offset));
}


x86 assembly (clang, -O0):
<setcursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x50,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1030 <port_byte_out@plt>
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    $0x3d5,%edi
movzbl %al,%esi
call   1030 <port_byte_out@plt>
mov    $0x3d4,%edi
mov    $0xf,%esi
call   1030 <port_byte_out@plt>
mov    -0xc(%rbp),%eax
mov    $0x3d5,%edi
movzbl %al,%esi
call   1030 <port_byte_out@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setcursor>:
push   %rbp
push   %rbx
push   %rax
lea    (%rdi,%rdi,4),%ebx
shl    $0x4,%ebx
add    %esi,%ebx
lea    (%rbx,%rbx,1),%ebp
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1030 <port_byte_out@plt>
shr    $0x7,%ebx
movzbl %bl,%esi
mov    $0x3d5,%edi
call   1030 <port_byte_out@plt>
mov    $0x3d4,%edi
mov    $0xf,%esi
call   1030 <port_byte_out@plt>
movzbl %bpl,%esi
mov    $0x3d5,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <port_byte_out@plt>

LLVM IR (-O0):
define void @setcursor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = mul i32 %6, 80
%8 = load i32, i32* %4
%9 = add i32 %7, %8
%10 = mul i32 %9, 2
store i32 %10, i32* %5
%11 = call i32 @port_byte_out(i32 980, i8 zeroext 14)
%12 = load i32, i32* %5
%13 = ashr i32 %12, 8
%14 = trunc i32 %13 to i8
%15 = call i32 @port_byte_out(i32 981, i8 zeroext %14)
%16 = call i32 @port_byte_out(i32 980, i8 zeroext 15)
%17 = load i32, i32* %5
%18 = trunc i32 %17 to i8
%19 = call i32 @port_byte_out(i32 981, i8 zeroext %18)
ret void
}

LLVM IR (-O2):
define void @setcursor(i32 %0, i32 %1) {
%3 = mul i32 %0, 80
%4 = add i32 %3, %1
%5 = shl i32 %4, 1
%6 = tail call i32 @port_byte_out(i32 980, i8 zeroext 14)
%7 = lshr i32 %5, 8
%8 = trunc i32 %7 to i8
%9 = tail call i32 @port_byte_out(i32 981, i8 zeroext %8)
%10 = tail call i32 @port_byte_out(i32 980, i8 zeroext 15)
%11 = trunc i32 %5 to i8
%12 = tail call i32 @port_byte_out(i32 981, i8 zeroext %11)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x99() {
  Assert_real((ispunct(153) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              770, ("ispunct should be 0 for 0x99"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x99>:
push   %rbp
mov    %rsp,%rbp
mov    $0x99,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x302,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x99>:
push   %rax
mov    $0x99,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x302,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x99\00"
define void @t_ispunct_0x99() {
%1 = call i64 @ispunct(i32 153)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 770, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x99\00"
define void @t_ispunct_0x99() {
%1 = tail call i64 @ispunct(i32 153)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 770, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool equal(double a, double b) {
  bool ret = false;
  if ((a - b) < 0.0000000001 && (a - b) > (0 - 0.0000000001)) {
    ret = true;
  }
  return ret;
}


x86 assembly (clang, -O0):
<equal>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xed9(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1154 <equal+0x54>
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  0xec5(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1154 <equal+0x54>
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<equal>:
subsd  %xmm1,%xmm0
movsd  0xef4(%rip),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
ucomisd 0xeed(%rip),%xmm0
seta   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @equal(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %3
store double %1, double* %4
store i32 0, i32* %5
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fsub double %6, %7
%9 = fcmp olt double %8, 1.000000e-10
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load double, double* %3
%12 = load double, double* %4
%13 = fsub double %11, %12
%14 = fcmp ogt double %13, -1.000000e-10
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 1, i32* %5
br label %16
16: ; preds = %15, %10, %2
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
define i32 @equal(double %0, double %1) {
%3 = fsub double %0, %1
%4 = fcmp olt double %3, 1.000000e-10
%5 = fcmp ogt double %3, -1.000000e-10
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_wasm_data_drop(int);
void data_drop() { __builtin_wasm_data_drop(3); }


x86 assembly (clang, -O0):
<data_drop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <__builtin_wasm_data_drop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<data_drop>:
mov    $0x3,%edi
jmp    1030 <__builtin_wasm_data_drop@plt>

LLVM IR (-O0):
define void @data_drop() {
%1 = call i32 @__builtin_wasm_data_drop(i32 3)
ret void
}

LLVM IR (-O2):
define void @data_drop() {
%1 = tail call i32 @__builtin_wasm_data_drop(i32 3)
ret void
}
void rop3_5_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = *D | T;
  stk1 = ~stk1;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_5_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_5_1_1>:
mov    (%rdi),%al
mov    %edx,%ecx
or     %sil,%cl
or     %al,%cl
not    %cl
and    %al,%sil
and    %dl,%al
or     %sil,%al
or     %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_5_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8, i8* %7
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %7
%19 = load i8, i8* %7
%20 = zext i8 %19 to i32
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = xor i32 %22, -1
%24 = and i32 %20, %23
%25 = load i8, i8* %6
%26 = zext i8 %25 to i32
%27 = xor i32 %26, -1
%28 = and i32 %24, %27
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = and i32 %31, %33
%35 = or i32 %28, %34
%36 = load i8*, i8** %4
%37 = load i8, i8* %36
%38 = zext i8 %37 to i32
%39 = load i8, i8* %6
%40 = zext i8 %39 to i32
%41 = and i32 %38, %40
%42 = or i32 %35, %41
%43 = trunc i32 %42 to i8
%44 = load i8*, i8** %4
store i8 %43, i8* %44
ret void
}

LLVM IR (-O2):
define void @rop3_5_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = or i8 %5, %4
%7 = xor i8 %6, -1
%8 = and i8 %4, %1
%9 = or i8 %8, %7
%10 = and i8 %4, %2
%11 = or i8 %9, %10
store i8 %11, i8* %0
ret void
}
int abs(arg)
register int arg;
{ return (arg >= 0 ? arg : -arg); }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     111c <abs+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
void step_motor_off(void *stepmotor_address) {
  *((volatile int *)stepmotor_address + 5) = 0;
}


x86 assembly (clang, -O0):
<step_motor_off>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<step_motor_off>:
movl   $0x0,0x14(%rdi)
ret

LLVM IR (-O0):
define void @step_motor_off(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = getelementptr inbounds i32, i32* %4, i64 5
store volatile i32 0, i32* %5
ret void
}

LLVM IR (-O2):
define void @step_motor_off(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 20
%3 = bitcast i8* %2 to i32*
store volatile i32 0, i32* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/ *);
int /*<<< orphan*/ *led_data_file(int);
int gpio_write_led(int led, int value) {
  FILE *fp = led_data_file(led);
  if (fp == NULL)
    return -1;
  fputc(value + '0', fp);
  fputc('\n', fp);
  fflush(fp);
  return 0;
}


x86 assembly (clang, -O0):
<gpio_write_led>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <led_data_file@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1161 <gpio_write_led+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    1191 <gpio_write_led+0x61>
mov    -0xc(%rbp),%eax
add    $0x30,%eax
mov    -0x18(%rbp),%rsi
movsbl %al,%edi
call   1040 <fputc@plt>
mov    -0x18(%rbp),%rsi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    -0x18(%rbp),%rdi
call   1050 <fflush@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_write_led>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
call   1030 <led_data_file@plt>
test   %rax,%rax
je     116b <gpio_write_led+0x3b>
mov    %rax,%rbx
add    $0x30,%bpl
movsbl %bpl,%edi
mov    %rax,%rsi
call   1040 <fputc@plt>
mov    $0xa,%edi
mov    %rbx,%rsi
call   1040 <fputc@plt>
mov    %rbx,%rdi
call   1050 <fflush@plt>
xor    %eax,%eax
jmp    1170 <gpio_write_led+0x40>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @gpio_write_led(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = call i32* @led_data_file(i32 %7)
store i32* %8, i32** %6
%9 = load i32*, i32** %6
%10 = icmp eq i32* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %22
12: ; preds = %2
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 48
%15 = trunc i32 %14 to i8
%16 = load i32*, i32** %6
%17 = call i32 @fputc(i8 signext %15, i32* %16)
%18 = load i32*, i32** %6
%19 = call i32 @fputc(i8 signext 10, i32* %18)
%20 = load i32*, i32** %6
%21 = call i32 @fflush(i32* %20)
store i32 0, i32* %3
br label %22
22: ; preds = %12, %11
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @gpio_write_led(i32 %0, i32 %1) {
%3 = tail call i32* @led_data_file(i32 %0)
%4 = icmp eq i32* %3, null
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = trunc i32 %1 to i8
%7 = add i8 %6, 48
%8 = tail call i32 @fputc(i8 signext %7, i32* %3)
%9 = tail call i32 @fputc(i8 signext 10, i32* %3)
%10 = tail call i32 @fflush(i32* %3)
br label %11
11: ; preds = %2, %5
%12 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %12
}
void test71_Test_pollen__run__E() {}


x86 assembly (clang, -O0):
<test71_Test_pollen__run__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test71_Test_pollen__run__E>:
ret

LLVM IR (-O0):
define void @test71_Test_pollen__run__E() {
ret void
}

LLVM IR (-O2):
define void @test71_Test_pollen__run__E() {
ret void
}
/* Type definitions */
struct cpufreq_available_governors {
  int dummy;
};

/* Variables and functions */
struct cpufreq_available_governors *
sysfs_get_freq_available_governors(unsigned int);
struct cpufreq_available_governors *
cpufreq_get_available_governors(unsigned int cpu) {
  return sysfs_get_freq_available_governors(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_available_governors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfs_get_freq_available_governors@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_available_governors>:
jmp    1030 <sysfs_get_freq_available_governors@plt>

LLVM IR (-O0):
%struct.cpufreq_available_governors = type { i32 }
define %struct.cpufreq_available_governors* @cpufreq_get_available_governors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_available_governors* @sysfs_get_freq_available_governors(i32 %3)
ret %struct.cpufreq_available_governors* %4
}

LLVM IR (-O2):
%struct.cpufreq_available_governors = type { i32 }
define %struct.cpufreq_available_governors* @cpufreq_get_available_governors(i32 %0) {
%2 = tail call %struct.cpufreq_available_governors* @sysfs_get_freq_available_governors(i32 %0)
ret %struct.cpufreq_available_governors* %2
}
/* Variables and functions */
int /*<<< orphan*/ __simplePNG_is_little_endian();
int /*<<< orphan*/ __simplePNG_swap(void *, size_t);
void __simplePNG_to_bendian(void *data, size_t size) {
  if (!__simplePNG_is_little_endian())
    return;
  else
    __simplePNG_swap(data, size);
}


x86 assembly (clang, -O0):
<__simplePNG_to_bendian>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <__simplePNG_is_little_endian@plt>
cmp    $0x0,%eax
jne    1145 <__simplePNG_to_bendian+0x25>
jmp    1152 <__simplePNG_to_bendian+0x32>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <__simplePNG_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__simplePNG_to_bendian>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <__simplePNG_is_little_endian@plt>
test   %eax,%eax
je     1147 <__simplePNG_to_bendian+0x27>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <__simplePNG_swap@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @__simplePNG_to_bendian(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = call i32 (...) @__simplePNG_is_little_endian()
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
br label %12
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @__simplePNG_swap(i8* %9, i64 %10)
br label %12
12: ; preds = %7, %8
ret void
}

LLVM IR (-O2):
define void @__simplePNG_to_bendian(i8* %0, i64 %1) {
%3 = tail call i32 (...) @__simplePNG_is_little_endian()
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @__simplePNG_swap(i8* %0, i64 %1)
br label %7
7: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xe0() {
  Assert_real((isprint(224) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1125, ("isprint should be 0 for 0xe0"));
}


x86 assembly (clang, -O0):
<t_isprint_0xe0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x465,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xe0>:
push   %rax
mov    $0xe0,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x465,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xe0\00"
define void @t_isprint_0xe0() {
%1 = call i64 @isprint(i32 224)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1125, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xe0\00"
define void @t_isprint_0xe0() {
%1 = tail call i64 @isprint(i32 224)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1125, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct random {
  int dummy;
};

/* Variables and functions */
unsigned int random_uint(struct random *);
unsigned int random_uint_range(struct random *__restrict rand, unsigned int min,
                               unsigned int max) {
  return (random_uint(rand) % (max - min + 1)) + min;
}


x86 assembly (clang, -O0):
<random_uint_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <random_uint@plt>
mov    -0x10(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
add    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_uint_range>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
call   1030 <random_uint@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
xor    %edx,%edx
div    %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.random = type { i32 }
define i32 @random_uint_range(%struct.random* noalias %0, i32 %1, i32 %2) {
%4 = alloca %struct.random*
%5 = alloca i32
%6 = alloca i32
store %struct.random* %0, %struct.random** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.random*, %struct.random** %4
%8 = call i32 @random_uint(%struct.random* %7)
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = sub i32 %9, %10
%12 = add i32 %11, 1
%13 = urem i32 %8, %12
%14 = load i32, i32* %5
%15 = add i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
%struct.random = type { i32 }
define i32 @random_uint_range(%struct.random* noalias %0, i32 %1, i32 %2) {
%4 = tail call i32 @random_uint(%struct.random* %0)
%5 = sub i32 1, %1
%6 = add i32 %5, %2
%7 = urem i32 %4, %6
%8 = add i32 %7, %1
ret i32 %8
}
/* Variables and functions */
double pow(double, double);
double cbrt(double x) {
  if (x > 0.0)
    return pow(x, 1.0 / 3.0);
  else
    return -pow(-x, 1.0 / 3.0);
}


x86 assembly (clang, -O0):
<cbrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    114b <cbrt+0x3b>
movsd  -0x10(%rbp),%xmm0
movsd  0xec4(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    1190 <cbrt+0x80>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  0xe91(%rip),%xmm1
call   1030 <pow@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrt>:
push   %rax
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1129 <cbrt+0x19>
movsd  0xeed(%rip),%xmm1
pop    %rax
jmp    1030 <pow@plt>
xorpd  0xecf(%rip),%xmm0
movsd  0xed7(%rip),%xmm1
call   1030 <pow@plt>
xorpd  0xeba(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @cbrt(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load double, double* %3
%8 = call double @pow(double %7, double 0x3FD5555555555555)
store double %8, double* %2
br label %14
9: ; preds = %1
%10 = load double, double* %3
%11 = fneg double %10
%12 = call double @pow(double %11, double 0x3FD5555555555555)
%13 = fneg double %12
store double %13, double* %2
br label %14
14: ; preds = %9, %6
%15 = load double, double* %2
ret double %15
}

LLVM IR (-O2):
define double @cbrt(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call double @pow(double %0, double 0x3FD5555555555555)
br label %9
5: ; preds = %1
%6 = fneg double %0
%7 = tail call double @pow(double %6, double 0x3FD5555555555555)
%8 = fneg double %7
br label %9
9: ; preds = %5, %3
%10 = phi double [ %4, %3 ], [ %8, %5 ]
ret double %10
}
unsigned long long cpucycles(void) {
  unsigned long long result;
  __asm__ __volatile__(".byte 15;.byte 49\n"
                       "shlq $32,%%rdx\n"
                       "orq %%rdx,%%rax"
                       : "=a"(result)::"%rdx");
  return result;
}


x86 assembly (clang, -O0):
<cpucycles>:
push   %rbp
mov    %rsp,%rbp
rdtsc
shl    $0x20,%rdx
or     %rdx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpucycles>:
rdtsc
shl    $0x20,%rdx
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @cpucycles() {
%1 = alloca i64
%2 = call i64 asm sideeffect ".byte 15;.byte 49\0Ashlq $$32,%rdx\0Aorq %rdx,%rax", "={ax},~{rdx},~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @cpucycles() {
%1 = tail call i64 asm sideeffect ".byte 15;.byte 49\0Ashlq $$32,%rdx\0Aorq %rdx,%rax", "={ax},~{rdx},~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
unsigned char f47(unsigned char x, int y) {
  return (x >> y) | (x << ((-y) & (8 * sizeof(unsigned char) - 1)));
}


x86 assembly (clang, -O0):
<f47>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
movzbl -0x1(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
movslq %ecx,%rcx
and    $0x7,%rcx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f47>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
neg    %cl
and    $0x7,%cl
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f47(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i32, i32* %4
%8 = ashr i32 %6, %7
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = load i32, i32* %4
%12 = sub nsw i32 0, %11
%13 = sext i32 %12 to i64
%14 = and i64 %13, 7
%15 = trunc i64 %14 to i32
%16 = shl i32 %10, %15
%17 = or i32 %8, %16
%18 = trunc i32 %17 to i8
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @f47(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = lshr i32 %3, %1
%5 = sub nsw i32 0, %1
%6 = and i32 %5, 7
%7 = shl nuw nsw i32 %3, %6
%8 = or i32 %7, %4
%9 = trunc i32 %8 to i8
ret i8 %9
}
void InterruptTrigger(int InterruptSource) {
  ((volatile unsigned long *)(0xE000E000 + (0x200)))[(InterruptSource >> 5)] =
      1 << (InterruptSource & 31);
}


x86 assembly (clang, -O0):
<InterruptTrigger>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
movslq %eax,%rcx
mov    $0xe000e200,%eax
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<InterruptTrigger>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    $0xe000e200,%edx
mov    %rax,(%rdx,%rcx,8)
ret

LLVM IR (-O0):
define void @InterruptTrigger(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 31
%5 = shl i32 1, %4
%6 = sext i32 %5 to i64
%7 = load i32, i32* %2
%8 = ashr i32 %7, 5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i64, i64* inttoptr (i64 3758154240 to i64*), i64 %9
store volatile i64 %6, i64* %10
ret void
}

LLVM IR (-O2):
define void @InterruptTrigger(i32 %0) {
%2 = and i32 %0, 31
%3 = shl nuw i32 1, %2
%4 = sext i32 %3 to i64
%5 = ashr i32 %0, 5
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i64, i64* inttoptr (i64 3758154240 to i64*), i64 %6
store volatile i64 %4, i64* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ is_dir_empty(char const *);
scalar_t__ is_dir_writable(char const *);
int is_trash_valid(const char trash_dir[]) {
  return is_dir_writable(trash_dir) && !is_dir_empty(trash_dir);
}


x86 assembly (clang, -O0):
<is_trash_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <is_dir_writable@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
je     115b <is_trash_valid+0x3b>
mov    -0x8(%rbp),%rdi
call   1030 <is_dir_empty@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_trash_valid>:
push   %rbx
mov    %rdi,%rbx
call   1040 <is_dir_writable@plt>
test   %rax,%rax
je     1141 <is_trash_valid+0x21>
mov    %rbx,%rdi
call   1030 <is_dir_empty@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_trash_valid(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @is_dir_writable(i8* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @is_dir_empty(i8* %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_trash_valid(i8* %0) {
%2 = tail call i64 @is_dir_writable(i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @is_dir_empty(i8* %0)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
long long int Lmul(long long int x, long long int y) { return x * y; }


x86 assembly (clang, -O0):
<Lmul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lmul>:
mov    %rdi,%rax
imul   %rsi,%rax
ret

LLVM IR (-O0):
define i64 @Lmul(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = mul nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @Lmul(i64 %0, i64 %1) {
%3 = mul nsw i64 %1, %0
ret i64 %3
}
char *_dl_strcpy(char *dst, const char *src) {
  register char *ptr = dst;
  while (*src)
    *dst++ = *src++;
  *dst = '\0';
  return ptr;
}


x86 assembly (clang, -O0):
<_dl_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <_dl_strcpy+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    1114 <_dl_strcpy+0x14>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dl_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
mov    %rdi,%rdx
test   %cl,%cl
je     1131 <_dl_strcpy+0x31>
add    $0x1,%rsi
mov    %rax,%rdx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %cl,(%rdx)
add    $0x1,%rdx
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <_dl_strcpy+0x20>
movb   $0x0,(%rdx)
ret

LLVM IR (-O0):
define i8* @_dl_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
br label %7
17: ; preds = %7
%18 = load i8*, i8** %3
store i8 0, i8* %18
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @_dl_strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void cannotBeLocked(void) { printf("That cannot be locked.\n"); }


x86 assembly (clang, -O0):
<cannotBeLocked>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cannotBeLocked>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"That cannot be locked.\0A\00"
define void @cannotBeLocked() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"That cannot be locked.\00"
define void @cannotBeLocked() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret void
}