xunge/DecIR huggingface dataset:
float inv_sqrt(float x) {
  float xhalf = 0.5f * x;
  int i = *(int *)&x;
  i = 0x5f375a84 - (i >> 1);
  x = *(float *)&i;
  x = x * (1.5f - xhalf * x * x);
  return x;
}


x86 assembly (clang, -O0):
<inv_sqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f375a84,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe98(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_sqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f375a84,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xedb(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @inv_sqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32
store float %0, float* %2
%5 = load float, float* %2
%6 = fmul float 5.000000e-01, %5
store float %6, float* %3
%7 = bitcast float* %2 to i32*
%8 = load i32, i32* %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = ashr i32 %9, 1
%11 = sub nsw i32 1597463172, %10
store i32 %11, i32* %4
%12 = bitcast i32* %4 to float*
%13 = load float, float* %12
store float %13, float* %2
%14 = load float, float* %2
%15 = load float, float* %3
%16 = load float, float* %2
%17 = fmul float %15, %16
%18 = load float, float* %2
%19 = fneg float %17
%20 = call float @llvm.fmuladd.f32(float %19, float %18, float 1.500000e+00)
%21 = fmul float %14, %20
store float %21, float* %2
%22 = load float, float* %2
ret float %22
}

LLVM IR (-O2):
define float @inv_sqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597463172, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int strlen_imp(const char *str) {
  assert(str != NULL);
  int len = 0;
  while (*str != '\0') {
    str++;
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<strlen_imp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115f <strlen_imp+0x4f>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1135 <strlen_imp+0x25>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen_imp>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
cmpb   $0x0,(%rbx)
je     113d <strlen_imp+0x2d>
xor    %eax,%eax
nopl   0x0(%rax)
cmpb   $0x0,0x1(%rbx,%rax,1)
lea    0x1(%rax),%rax
jne    1130 <strlen_imp+0x20>
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @strlen_imp(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
store i32 0, i32* %3
br label %8
8: ; preds = %13, %1
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %2
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %8
18: ; preds = %8
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @strlen_imp(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %14, label %7
7: ; preds = %1, %7
%8 = phi i32 [ %11, %7 ], [ 0, %1 ]
%9 = phi i8* [ %10, %7 ], [ %0, %1 ]
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = add nuw nsw i32 %8, 1
%12 = load i8, i8* %10
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %7
14: ; preds = %7, %1
%15 = phi i32 [ 0, %1 ], [ %11, %7 ]
ret i32 %15
}
void gtk_window_type_get_type() {}


x86 assembly (clang, -O0):
<gtk_window_type_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_window_type_get_type>:
ret

LLVM IR (-O0):
define void @gtk_window_type_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_window_type_get_type() {
ret void
}
/* Variables and functions */
int CyBtldr_ParseDefaultCmdResult(unsigned char *, unsigned long,
                                  unsigned char *);
int CyBtldr_ParseProgramRowCmdResult(unsigned char *cmdBuf,
                                     unsigned long cmdSize,
                                     unsigned char *status) {
  return CyBtldr_ParseDefaultCmdResult(cmdBuf, cmdSize, status);
}


x86 assembly (clang, -O0):
<CyBtldr_ParseProgramRowCmdResult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <CyBtldr_ParseDefaultCmdResult@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CyBtldr_ParseProgramRowCmdResult>:
jmp    1030 <CyBtldr_ParseDefaultCmdResult@plt>

LLVM IR (-O0):
define i32 @CyBtldr_ParseProgramRowCmdResult(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i8*, i8** %6
%10 = call i32 @CyBtldr_ParseDefaultCmdResult(i8* %7, i64 %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @CyBtldr_ParseProgramRowCmdResult(i8* %0, i64 %1, i8* %2) {
%4 = tail call i32 @CyBtldr_ParseDefaultCmdResult(i8* %0, i64 %1, i8* %2)
ret i32 %4
}
void add_history(const char *line) {}


x86 assembly (clang, -O0):
<add_history>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_history>:
ret

LLVM IR (-O0):
define void @add_history(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @add_history(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/ *);
unsigned long push_hdr(const char *s, unsigned long offset, FILE *output) {
  fputs(s, output);
  offset += 110;
  return offset;
}


x86 assembly (clang, -O0):
<push_hdr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <fputs@plt>
mov    -0x10(%rbp),%rax
add    $0x6e,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<push_hdr>:
push   %rbx
mov    %rsi,%rbx
mov    %rdx,%rsi
call   1030 <fputs@plt>
add    $0x6e,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @push_hdr(i8* %0, i64 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i32*, i32** %6
%9 = call i32 @fputs(i8* %7, i32* %8)
%10 = load i64, i64* %5
%11 = add i64 %10, 110
store i64 %11, i64* %5
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @push_hdr(i8* nocapture %0, i64 %1, i32* nocapture %2) {
%4 = tail call i32 @fputs(i8* %0, i32* %2)
%5 = add i64 %1, 110
ret i64 %5
}
int isupper_save_space(int c) {
  if (c >= 'A' && c <= 'Z') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isupper_save_space>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     1127 <isupper_save_space+0x27>
cmpl   $0x5a,-0x8(%rbp)
jg     1127 <isupper_save_space+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <isupper_save_space+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper_save_space>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper_save_space(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @isupper_save_space(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void sgx_oc_cpuidex() {}


x86 assembly (clang, -O0):
<sgx_oc_cpuidex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgx_oc_cpuidex>:
ret

LLVM IR (-O0):
define void @sgx_oc_cpuidex() {
ret void
}

LLVM IR (-O2):
define void @sgx_oc_cpuidex() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ init_distance();
int /*<<< orphan*/ init_sliders();
void init_movegen() {
  init_distance();
  init_sliders();
}


x86 assembly (clang, -O0):
<init_movegen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_distance@plt>
mov    $0x0,%al
call   1040 <init_sliders@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_movegen>:
push   %rax
xor    %eax,%eax
call   1030 <init_distance@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <init_sliders@plt>

LLVM IR (-O0):
define void @init_movegen() {
%1 = call i32 (...) @init_distance()
%2 = call i32 (...) @init_sliders()
ret void
}

LLVM IR (-O2):
define void @init_movegen() {
%1 = tail call i32 (...) @init_distance()
%2 = tail call i32 (...) @init_sliders()
ret void
}
int test_imm_15uint16_reg(unsigned short val) {
  return ((val) & (-0x15 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_15uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffffeb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_15uint16_reg>:
test   $0xffeb,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_15uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -21
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_15uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -21
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
int gca_cmp_uint16(const void *aa, const void *bb) {
  const uint16_t a = *(const uint16_t *)aa;
  const uint16_t b = *(const uint16_t *)bb;
  return (((a) > (b)) - ((b) > (a)));
}


x86 assembly (clang, -O0):
<gca_cmp_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x20(%rbp),%rcx
cmp    -0x18(%rbp),%rcx
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gca_cmp_uint16>:
mov    (%rdi),%rcx
mov    (%rsi),%rdx
xor    %eax,%eax
xor    %esi,%esi
cmp    %rdx,%rcx
setg   %al
setl   %sil
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gca_cmp_uint16(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
store i64 %9, i64* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %6
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
%16 = zext i1 %15 to i32
%17 = load i64, i64* %6
%18 = load i64, i64* %5
%19 = icmp sgt i64 %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @gca_cmp_uint16(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = zext i1 %7 to i32
%9 = icmp sgt i64 %6, %4
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ computed_jump(int, int /*<<< orphan*/);
void op_ongosub() { computed_jump(1, 0); }


x86 assembly (clang, -O0):
<op_ongosub>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <computed_jump@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ongosub>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <computed_jump@plt>

LLVM IR (-O0):
define void @op_ongosub() {
%1 = call i32 @computed_jump(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @op_ongosub() {
%1 = tail call i32 @computed_jump(i32 1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, void *, size_t);
size_t strlen(char *);
int passwd_callback(char *pcszBuff, int size, int rwflag, void *pPass) {
  size_t unPass = strlen((char *)pPass);
  if (unPass > (size_t)size)
    unPass = (size_t)size;
  memcpy(pcszBuff, pPass, unPass);
  return (int)unPass;
}


x86 assembly (clang, -O0):
<passwd_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmp    %rcx,%rax
jbe    115c <passwd_callback+0x3c>
movslq -0xc(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<passwd_callback>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %esi,%r15d
mov    %rdi,%r14
mov    %rcx,%rdi
call   1030 <strlen@plt>
mov    %rax,%rbp
movslq %r15d,%rax
cmp    %rax,%rbp
cmova  %rax,%rbp
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rbp,%rdx
call   1040 <memcpy@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @passwd_callback(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load i8*, i8** %8
%11 = call i64 @strlen(i8* %10)
store i64 %11, i64* %9
%12 = load i64, i64* %9
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = icmp ugt i64 %12, %14
br i1 %15, label %16, label %19
16: ; preds = %4
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
store i64 %18, i64* %9
br label %19
19: ; preds = %16, %4
%20 = load i8*, i8** %5
%21 = load i8*, i8** %8
%22 = load i64, i64* %9
%23 = call i32 @memcpy(i8* %20, i8* %21, i64 %22)
%24 = load i64, i64* %9
%25 = trunc i64 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @passwd_callback(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = tail call i64 @strlen(i8* dereferenceable(1) %3)
%6 = sext i32 %1 to i64
%7 = icmp ugt i64 %5, %6
%8 = select i1 %7, i64 %6, i64 %5
%9 = tail call i32 @memcpy(i8* %0, i8* %3, i64 %8)
%10 = trunc i64 %8 to i32
ret i32 %10
}
void X509_get1_ocsp(void) {}


x86 assembly (clang, -O0):
<X509_get1_ocsp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_get1_ocsp>:
ret

LLVM IR (-O0):
define void @X509_get1_ocsp() {
ret void
}

LLVM IR (-O2):
define void @X509_get1_ocsp() {
ret void
}
/* Variables and functions */
unsigned char *generate_command_packet(int, int /*<<< orphan*/,
                                       int /*<<< orphan*/, int /*<<< orphan*/ *,
                                       int /*<<< orphan*/);
unsigned char *op_dev_rev() {
  return generate_command_packet(0x30, 0, 0, NULL, 0);
}


x86 assembly (clang, -O0):
<op_dev_rev>:
push   %rbp
mov    %rsp,%rbp
mov    $0x30,%edi
xor    %r8d,%r8d
xor    %eax,%eax
mov    %eax,%ecx
mov    %r8d,%esi
mov    %r8d,%edx
call   1030 <generate_command_packet@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_dev_rev>:
mov    $0x30,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <generate_command_packet@plt>

LLVM IR (-O0):
define i8* @op_dev_rev() {
%1 = call i8* @generate_command_packet(i32 48, i32 0, i32 0, i32* null, i32 0)
ret i8* %1
}

LLVM IR (-O2):
define i8* @op_dev_rev() {
%1 = tail call i8* @generate_command_packet(i32 48, i32 0, i32 0, i32* null, i32 0)
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ calc_disc(double, double, double);
double sqrt(int /*<<< orphan*/);
double calc_2root2(double a, double b, double c) {
  double root2;
  root2 = (-b - sqrt(calc_disc(a, b, c))) / (2 * a);
  return root2;
}


x86 assembly (clang, -O0):
<calc_2root2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <calc_disc@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
subsd  %xmm1,%xmm0
movsd  0xe79(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_2root2>:
sub    $0x28,%rsp
movsd  %xmm0,0x8(%rsp)
movaps 0xecf(%rip),%xmm3
xorps  %xmm1,%xmm3
movaps %xmm3,0x10(%rsp)
call   1030 <calc_disc@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
movapd 0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
movsd  0x8(%rsp),%xmm0
addsd  %xmm0,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @calc_2root2(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %5
%9 = fneg double %8
%10 = load double, double* %4
%11 = load double, double* %5
%12 = load double, double* %6
%13 = call i32 @calc_disc(double %10, double %11, double %12)
%14 = call double @sqrt(i32 %13)
%15 = fsub double %9, %14
%16 = load double, double* %4
%17 = fmul double 2.000000e+00, %16
%18 = fdiv double %15, %17
store double %18, double* %7
%19 = load double, double* %7
ret double %19
}

LLVM IR (-O2):
define double @calc_2root2(double %0, double %1, double %2) {
%4 = fneg double %1
%5 = tail call i32 @calc_disc(double %0, double %1, double %2)
%6 = tail call double @sqrt(i32 %5)
%7 = fsub double %4, %6
%8 = fmul double %0, 2.000000e+00
%9 = fdiv double %7, %8
ret double %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int arm32_read_p15_c1();
int /*<<< orphan*/ arm32_write_p15_c1(int);
void arm32_icache_enable(void) {
  uint32_t value = arm32_read_p15_c1();
  arm32_write_p15_c1(value | (1 << 12));
}


x86 assembly (clang, -O0):
<arm32_icache_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <arm32_read_p15_c1@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
or     $0x1000,%edi
call   1040 <arm32_write_p15_c1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm32_icache_enable>:
push   %rax
xor    %eax,%eax
call   1030 <arm32_read_p15_c1@plt>
or     $0x1000,%eax
mov    %eax,%edi
pop    %rax
jmp    1040 <arm32_write_p15_c1@plt>

LLVM IR (-O0):
define void @arm32_icache_enable() {
%1 = alloca i32
%2 = call i32 (...) @arm32_read_p15_c1()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = or i32 %3, 4096
%5 = call i32 @arm32_write_p15_c1(i32 %4)
ret void
}

LLVM IR (-O2):
define void @arm32_icache_enable() {
%1 = tail call i32 (...) @arm32_read_p15_c1()
%2 = or i32 %1, 4096
%3 = tail call i32 @arm32_write_p15_c1(i32 %2)
ret void
}
/* Variables and functions */
bool UT16_DIV_OVFCHK(unsigned short a, unsigned short b) {
  (void)(a);
  return !b;
}


x86 assembly (clang, -O0):
<UT16_DIV_OVFCHK>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
cmpw   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UT16_DIV_OVFCHK>:
xor    %eax,%eax
test   %esi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @UT16_DIV_OVFCHK(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
%7 = icmp ne i16 %6, 0
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @UT16_DIV_OVFCHK(i16 zeroext %0, i16 zeroext %1) {
%3 = icmp eq i16 %1, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int bc_compat_status_code(int waitstatus) {
  int rv = waitstatus;
  return rv;
}


x86 assembly (clang, -O0):
<bc_compat_status_code>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bc_compat_status_code>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @bc_compat_status_code(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @bc_compat_status_code(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memfatal(char *, size_t);
void *realloc(void *, size_t);
void *xrealloc(void *ptr, size_t newsize) {
  void *newptr;
  if (ptr)
    newptr = realloc(ptr, newsize);
  else
    newptr = malloc(newsize);
  if (!newptr)
    memfatal("realloc", newsize);
  return newptr;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1161 <xrealloc+0x31>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x18(%rbp)
jmp    116e <xrealloc+0x3e>
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1189 <xrealloc+0x59>
mov    -0x10(%rbp),%rsi
lea    0xe7c(%rip),%rdi
call   1030 <memfatal@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
test   %rdi,%rdi
je     1146 <xrealloc+0x16>
mov    %r14,%rsi
call   1050 <realloc@plt>
jmp    114e <xrealloc+0x1e>
mov    %r14,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1165 <xrealloc+0x35>
lea    0xea3(%rip),%rdi
mov    %r14,%rsi
call   1030 <memfatal@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"realloc\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i8* @realloc(i8* %9, i64 %10)
store i8* %11, i8** %5
br label %15
12: ; preds = %2
%13 = load i64, i64* %4
%14 = call i8* @malloc(i64 %13)
store i8* %14, i8** %5
br label %15
15: ; preds = %12, %8
%16 = load i8*, i8** %5
%17 = icmp ne i8* %16, null
br i1 %17, label %21, label %18
18: ; preds = %15
%19 = load i64, i64* %4
%20 = call i32 @memfatal(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %19)
br label %21
21: ; preds = %18, %15
%22 = load i8*, i8** %5
ret i8* %22
}

LLVM IR (-O2):
@.str = [8 x i8] c"realloc\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i8* @realloc(i8* %0, i64 %1)
br label %8
6: ; preds = %2
%7 = tail call i8* @malloc(i64 %1)
br label %8
8: ; preds = %6, %4
%9 = phi i8* [ %5, %4 ], [ %7, %6 ]
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = tail call i32 @memfatal(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %1)
br label %13
13: ; preds = %11, %8
ret i8* %9
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local1;
  {
    state[0UL] = (input[0UL] & 914778474UL) << 7U;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[0UL] &= state[local1];
      local1++;
    }
    output[0UL] = state[0UL] & 773635072U;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x3686696a,%rax
shl    $0x7,%rax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    $0x1,%rax
jae    114e <RandomFunc+0x4e>
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp,%rax,4),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1126 <RandomFunc+0x26>
mov    -0x14(%rbp),%ecx
and    $0x2e1cbc00,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    (%rdi),%eax
shl    $0x7,%eax
and    $0x214b400,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
%9 = load i32, i32* %8
%10 = zext i32 %9 to i64
%11 = and i64 %10, 914778474
%12 = shl i64 %11, 7
%13 = trunc i64 %12 to i32
%14 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %13, i32* %14
store i32 0, i32* %6
br label %15
15: ; preds = %19, %2
%16 = load i32, i32* %6
%17 = zext i32 %16 to i64
%18 = icmp ult i64 %17, 1
br i1 %18, label %19, label %29
19: ; preds = %15
%20 = load i32, i32* %6
%21 = zext i32 %20 to i64
%22 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 %21
%23 = load i32, i32* %22
%24 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%25 = load i32, i32* %24
%26 = and i32 %25, %23
store i32 %26, i32* %24
%27 = load i32, i32* %6
%28 = add i32 %27, 1
store i32 %28, i32* %6
br label %15
29: ; preds = %15
%30 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%31 = load i32, i32* %30
%32 = and i32 %31, 773635072
%33 = load i32*, i32** %4
%34 = getelementptr inbounds i32, i32* %33, i64 0
store i32 %32, i32* %34
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = shl i32 %3, 7
%5 = and i32 %4, 34911232
store i32 %5, i32* %1
ret void
}
int has_feat_lcd_more_source(void) { return 0; }


x86 assembly (clang, -O0):
<has_feat_lcd_more_source>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_feat_lcd_more_source>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @has_feat_lcd_more_source() {
ret i32 0
}

LLVM IR (-O2):
define i32 @has_feat_lcd_more_source() {
ret i32 0
}
/* Type definitions */
struct rexp_node {
  int dummy;
};

/* Variables and functions */
int rx_rexp_equal(struct rexp_node *, struct rexp_node *);
int unfa_equal(void *va, void *vb) {
  return rx_rexp_equal((struct rexp_node *)va, (struct rexp_node *)vb);
}


x86 assembly (clang, -O0):
<unfa_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rx_rexp_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unfa_equal>:
jmp    1030 <rx_rexp_equal@plt>

LLVM IR (-O0):
%struct.rexp_node = type { i32 }
define i32 @unfa_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.rexp_node*
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to %struct.rexp_node*
%9 = call i32 @rx_rexp_equal(%struct.rexp_node* %6, %struct.rexp_node* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.rexp_node = type { i32 }
define i32 @unfa_equal(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to %struct.rexp_node*
%4 = bitcast i8* %1 to %struct.rexp_node*
%5 = tail call i32 @rx_rexp_equal(%struct.rexp_node* %3, %struct.rexp_node* %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ERR_load_BIO_strings();
int /*<<< orphan*/ OpenSSL_add_all_algorithms();
int /*<<< orphan*/ SSL_library_init();
int /*<<< orphan*/ SSL_load_error_strings();
void init_openssl() {
  SSL_library_init();
  SSL_load_error_strings();
  ERR_load_BIO_strings();
  OpenSSL_add_all_algorithms();
}


x86 assembly (clang, -O0):
<init_openssl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SSL_library_init@plt>
mov    $0x0,%al
call   1050 <SSL_load_error_strings@plt>
mov    $0x0,%al
call   1060 <ERR_load_BIO_strings@plt>
mov    $0x0,%al
call   1040 <OpenSSL_add_all_algorithms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_openssl>:
push   %rax
xor    %eax,%eax
call   1030 <SSL_library_init@plt>
xor    %eax,%eax
call   1050 <SSL_load_error_strings@plt>
xor    %eax,%eax
call   1060 <ERR_load_BIO_strings@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <OpenSSL_add_all_algorithms@plt>

LLVM IR (-O0):
define void @init_openssl() {
%1 = call i32 (...) @SSL_library_init()
%2 = call i32 (...) @SSL_load_error_strings()
%3 = call i32 (...) @ERR_load_BIO_strings()
%4 = call i32 (...) @OpenSSL_add_all_algorithms()
ret void
}

LLVM IR (-O2):
define void @init_openssl() {
%1 = tail call i32 (...) @SSL_library_init()
%2 = tail call i32 (...) @SSL_load_error_strings()
%3 = tail call i32 (...) @ERR_load_BIO_strings()
%4 = tail call i32 (...) @OpenSSL_add_all_algorithms()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ restoreDefaults();
void fail(const char *message) {
  perror(message);
  restoreDefaults();
  exit(1);
}


x86 assembly (clang, -O0):
<fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x0,%al
call   1030 <restoreDefaults@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<fail>:
push   %rax
call   1040 <perror@plt>
xor    %eax,%eax
call   1030 <restoreDefaults@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @fail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 (...) @restoreDefaults()
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @fail(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 (...) @restoreDefaults()
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ displaySubArray(int *, int /*<<< orphan*/, int);
void displayElements(int array[], int length) {
  displaySubArray(array, 0, length - 1);
}


x86 assembly (clang, -O0):
<displayElements>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <displaySubArray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<displayElements>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <displaySubArray@plt>

LLVM IR (-O0):
define void @displayElements(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @displaySubArray(i32* %5, i32 0, i32 %7)
ret void
}

LLVM IR (-O2):
define void @displayElements(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @displaySubArray(i32* %0, i32 0, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ toshiba_set_lcd_brightness(int, int);
void Toshiba_lcdBrightness_DownOneStep(int use_hardware) {
  toshiba_set_lcd_brightness(-6, use_hardware);
}


x86 assembly (clang, -O0):
<Toshiba_lcdBrightness_DownOneStep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0xfffffffa,%edi
call   1030 <toshiba_set_lcd_brightness@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Toshiba_lcdBrightness_DownOneStep>:
mov    %edi,%esi
mov    $0xfffffffa,%edi
jmp    1030 <toshiba_set_lcd_brightness@plt>

LLVM IR (-O0):
define void @Toshiba_lcdBrightness_DownOneStep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @toshiba_set_lcd_brightness(i32 -6, i32 %3)
ret void
}

LLVM IR (-O2):
define void @Toshiba_lcdBrightness_DownOneStep(i32 %0) {
%2 = tail call i32 @toshiba_set_lcd_brightness(i32 -6, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ is_pow2(unsigned long);
unsigned long align(unsigned long x, unsigned long alignment) {
  assert(is_pow2(alignment));
  return (x + (alignment - 1)) & ~(alignment - 1);
}


x86 assembly (clang, -O0):
<align>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <is_pow2@plt>
mov    %eax,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<align>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <is_pow2@plt>
mov    %eax,%edi
call   1030 <assert@plt>
lea    (%r14,%rbx,1),%rax
add    $0xffffffffffffffff,%rax
neg    %rbx
and    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @align(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i32 @is_pow2(i64 %5)
%7 = call i32 @assert(i32 %6)
%8 = load i64, i64* %3
%9 = load i64, i64* %4
%10 = sub i64 %9, 1
%11 = add i64 %8, %10
%12 = load i64, i64* %4
%13 = sub i64 %12, 1
%14 = xor i64 %13, -1
%15 = and i64 %11, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @align(i64 %0, i64 %1) {
%3 = tail call i32 @is_pow2(i64 %1)
%4 = tail call i32 @assert(i32 %3)
%5 = add i64 %0, -1
%6 = add i64 %5, %1
%7 = sub i64 0, %1
%8 = and i64 %6, %7
ret i64 %8
}
void GPIOAutoIdleModeControl(unsigned int baseAdd, unsigned int modeFlag) {
  (*((volatile unsigned int *)(baseAdd + (0x10)))) &= ~((0x00000001u));
  (*((volatile unsigned int *)(baseAdd + (0x10)))) |=
      (modeFlag & (0x00000001u));
}


x86 assembly (clang, -O0):
<GPIOAutoIdleModeControl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0x1,%edx
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOAutoIdleModeControl>:
add    $0x10,%edi
andl   $0xfffffffe,(%rdi)
and    $0x1,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPIOAutoIdleModeControl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 16
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -2
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 1
%13 = load i32, i32* %3
%14 = add i32 %13, 16
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @GPIOAutoIdleModeControl(i32 %0, i32 %1) {
%3 = add i32 %0, 16
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -2
store volatile i32 %7, i32* %5
%8 = and i32 %1, 1
%9 = load volatile i32, i32* %5
%10 = or i32 %9, %8
store volatile i32 %10, i32* %5
ret void
}
int __attribute__((optimize("O0"))) path_to_inode(char *path) {
  int inode;
  __asm__("nop" ::"b"(path));
  __asm__("int $0x85" ::"a"(0x04));
  __asm__("movl %%edx, %0" : "=r"(inode));
  return inode;
}


x86 assembly (clang, -O0):
<path_to_inode>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rbx
nop
mov    $0x4,%eax
int    $0x85
mov    %edx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_to_inode>:
push   %rbx
mov    %rdi,%rbx
nop
mov    $0x4,%eax
int    $0x85
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @path_to_inode(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 asm "movl %edx, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @path_to_inode(i8* %0) {
tail call void asm sideeffect "nop", "{bx},~{dirflag},~{fpsr},~{flags}"(i8* %0)
tail call void asm sideeffect "int $$0x85", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 4)
%2 = tail call i32 asm "movl %edx, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i32 %2
}
/* Variables and functions */
scalar_t__ q_islower(int);
int q_toupper(int c) { return ((q_islower(c)) ? (c & ~('a' - 'A')) : c); }


x86 assembly (clang, -O0):
<q_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <q_islower@plt>
cmp    $0x0,%rax
je     113b <q_toupper+0x2b>
mov    -0x4(%rbp),%eax
and    $0xffffffdf,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <q_toupper+0x31>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<q_toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <q_islower@plt>
mov    %ebx,%ecx
and    $0xffffffdf,%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @q_toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @q_islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = and i32 %7, -33
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @q_toupper(i32 %0) {
%2 = tail call i64 @q_islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = and i32 %0, -33
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
void fn1() {}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
ret

LLVM IR (-O0):
define void @fn1() {
ret void
}

LLVM IR (-O2):
define void @fn1() {
ret void
}
int gstWord2Int(int word) {
  int value;
  if (word < 0 || word > 65535)
    return 0;
  if (word < 32768)
    return word;
  value = word ^ 65535;
  value += 1;
  value = -value;
  return value;
}


x86 assembly (clang, -O0):
<gstWord2Int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     111e <gstWord2Int+0x1e>
cmpl   $0xffff,-0x8(%rbp)
jle    112a <gstWord2Int+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1164 <gstWord2Int+0x64>
cmpl   $0x8000,-0x8(%rbp)
jge    1142 <gstWord2Int+0x42>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <gstWord2Int+0x64>
mov    -0x8(%rbp),%eax
xor    $0xffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gstWord2Int>:
mov    %edi,%ecx
xor    $0xffff0000,%ecx
cmp    $0x8000,%edi
cmovl  %edi,%ecx
xor    %eax,%eax
cmp    $0x10000,%edi
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gstWord2Int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 65535
br i1 %9, label %10, label %11
10: ; preds = %7, %1
store i32 0, i32* %2
br label %24
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 32768
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = load i32, i32* %3
store i32 %15, i32* %2
br label %24
16: ; preds = %11
%17 = load i32, i32* %3
%18 = xor i32 %17, 65535
store i32 %18, i32* %4
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
%21 = load i32, i32* %4
%22 = sub nsw i32 0, %21
store i32 %22, i32* %4
%23 = load i32, i32* %4
store i32 %23, i32* %2
br label %24
24: ; preds = %16, %14, %10
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @gstWord2Int(i32 %0) {
%2 = icmp ugt i32 %0, 65535
%3 = icmp slt i32 %0, 32768
%4 = xor i32 %0, -65536
%5 = select i1 %3, i32 %0, i32 %4
%6 = select i1 %2, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XESetError() {
  printf("XESetError called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XESetError>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XESetError>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"XESetError called\0A\00"
define i32 @XESetError() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [18 x i8] c"XESetError called\00"
define i32 @XESetError() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void misra_10_4(void) {
  char buf[1] = {'f'};
  const char c = '0';
  signed int x = buf[0] - c;
}


x86 assembly (clang, -O0):
<misra_10_4>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%al
mov    %al,-0x1(%rbp)
movb   $0x30,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<misra_10_4>:
ret

LLVM IR (-O0):
@__const.misra_10_4.buf = [1 x i8] c"f"
define void @misra_10_4() {
%1 = alloca [1 x i8]
%2 = alloca i8
%3 = alloca i32
%4 = bitcast [1 x i8]* %1 to i8*
store i8 48, i8* %2
%5 = getelementptr inbounds [1 x i8], [1 x i8]* %1, i64 0, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = sub nsw i32 %7, 48
store i32 %8, i32* %3
ret void
}

LLVM IR (-O2):
define void @misra_10_4() {
ret void
}
signed long int signedlongint_ignoring_longlong(signed long int x,
                                                long long y) {
  return x;
}


x86 assembly (clang, -O0):
<signedlongint_ignoring_longlong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlongint_ignoring_longlong>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlongint_ignoring_longlong(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlongint_ignoring_longlong(i64 returned %0, i64 %1) {
ret i64 %0
}
long long min(long long a, long long b) { return a > b ? b : a; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <min+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min+0x2f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovg  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @min(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
br label %12
10: ; preds = %2
%11 = load i64, i64* %3
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_CRL;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_item_dup(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_CRL_it;
X509_CRL *X509_CRL_dup(X509_CRL *x) { return ASN1_item_dup(&X509_CRL_it, x); }


x86 assembly (clang, -O0):
<X509_CRL_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    0x2eb9(%rip),%rdi
call   1030 <ASN1_item_dup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_CRL_dup>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rdi
jmp    1030 <ASN1_item_dup@plt>

LLVM IR (-O0):
@X509_CRL_it = global i32 0
define i32* @X509_CRL_dup(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @ASN1_item_dup(i32* @X509_CRL_it, i32* %3)
ret i32* %4
}

LLVM IR (-O2):
@X509_CRL_it = global i32 0
define i32* @X509_CRL_dup(i32* %0) {
%2 = tail call i32* @ASN1_item_dup(i32* @X509_CRL_it, i32* %0)
ret i32* %2
}
void led_status_card_activation_error(void) {}


x86 assembly (clang, -O0):
<led_status_card_activation_error>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_status_card_activation_error>:
ret

LLVM IR (-O0):
define void @led_status_card_activation_error() {
ret void
}

LLVM IR (-O2):
define void @led_status_card_activation_error() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void doNothing() {
  volatile int loopCount;
  for (;;) {
    sched_yield();
    loopCount++;
  }
}


x86 assembly (clang, -O0):
<doNothing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <sched_yield@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    %eax,-0x4(%rbp)
jmp    1118 <doNothing+0x8>

x86 assembly (clang, -O2):
<doNothing>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <sched_yield@plt>
addl   $0x1,0x4(%rsp)
jmp    1120 <doNothing+0x10>

LLVM IR (-O0):
define void @doNothing() {
%1 = alloca i32
br label %2
2: ; preds = %2, %0
%3 = call i32 (...) @sched_yield()
%4 = load volatile i32, i32* %1
%5 = add nsw i32 %4, 1
store volatile i32 %5, i32* %1
br label %2
}

LLVM IR (-O2):
define void @doNothing() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
br label %3
3: ; preds = %3, %0
%4 = tail call i32 (...) @sched_yield()
%5 = load volatile i32, i32* %1
%6 = add nsw i32 %5, 1
store volatile i32 %6, i32* %1
br label %3
}
int log_is_use_syslog(void) { return 0; }


x86 assembly (clang, -O0):
<log_is_use_syslog>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_is_use_syslog>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @log_is_use_syslog() {
ret i32 0
}

LLVM IR (-O2):
define i32 @log_is_use_syslog() {
ret i32 0
}
/* Variables and functions */
int *malloc(int);
int main(void) {
  int *data = malloc(10 * sizeof(int));
  data = NULL;
  data[2] = 20;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x28,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x14,0x8(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1030 <malloc@plt>
movl   $0x14,0x8
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @malloc(i32 40)
store i32* %3, i32** %2
store i32* null, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 2
store i32 20, i32* %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 40)
store i32 20, i32* inttoptr (i64 8 to i32*)
ret i32 0
}