unsigned char st_linear_to_Alaw(int sample) {
  static int exp_lut[128] = {
      1, 1, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5,
      5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
      6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 7, 7,
      7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
      7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
      7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7};
  int sign, exponent, mantissa;
  unsigned char Alawbyte;
  sign = ((~sample) >> 8) & 0x80;
  if (sign == 0)
    sample = -sample;
  if (sample > 31744)
    sample = 31744;
  if (sample >= 256) {
    exponent = exp_lut[(sample >> 8) & 0x7F];
    mantissa = (sample >> (exponent + 3)) & 0x0F;
    Alawbyte = ((exponent << 4) | mantissa);
  } else
    Alawbyte = (sample >> 4);
  Alawbyte ^= (sign ^ 0x55);
  return Alawbyte;
}


x86 assembly (clang, -O0):
<st_linear_to_Alaw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
sar    $0x8,%eax
and    $0x80,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112a <st_linear_to_Alaw+0x2a>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x7c00,-0x4(%rbp)
jle    113e <st_linear_to_Alaw+0x3e>
movl   $0x7c00,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
jl     1186 <st_linear_to_Alaw+0x86>
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0x7f,%eax
movslq %eax,%rcx
lea    0x2ed2(%rip),%rax
mov    (%rax,%rcx,4),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x3,%ecx
sar    %cl,%eax
and    $0xf,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
or     -0x10(%rbp),%eax
mov    %al,-0x11(%rbp)
jmp    118f <st_linear_to_Alaw+0x8f>
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%ecx
xor    $0x55,%ecx
movzbl -0x11(%rbp),%eax
xor    %ecx,%eax
mov    %al,-0x11(%rbp)
movzbl -0x11(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_linear_to_Alaw>:
mov    %edi,%edx
shr    $0x8,%edx
mov    %edi,%eax
neg    %eax
and    $0x80,%edx
cmove  %edi,%eax
cmp    $0x7c00,%eax
mov    $0x7c00,%esi
cmovl  %eax,%esi
cmp    $0x100,%esi
jl     1145 <st_linear_to_Alaw+0x45>
mov    %esi,%eax
shr    $0x8,%eax
lea    0xecd(%rip),%rcx
mov    (%rcx,%rax,4),%eax
lea    0x3(%rax),%ecx
shr    %cl,%esi
and    $0xf,%esi
shl    $0x4,%eax
or     %esi,%eax
jmp    114a <st_linear_to_Alaw+0x4a>
shr    $0x4,%esi
mov    %esi,%eax
xor    %edx,%eax
xor    $0xd5,%al
ret

LLVM IR (-O0):
@st_linear_to_Alaw.exp_lut = internal global [128 x i32] [i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 3, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7]
define zeroext i8 @st_linear_to_Alaw(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %2
%7 = load i32, i32* %2
%8 = xor i32 %7, -1
%9 = ashr i32 %8, 8
%10 = and i32 %9, 128
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load i32, i32* %2
%15 = sub nsw i32 0, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %13, %1
%17 = load i32, i32* %2
%18 = icmp sgt i32 %17, 31744
br i1 %18, label %19, label %20
19: ; preds = %16
store i32 31744, i32* %2
br label %20
20: ; preds = %19, %16
%21 = load i32, i32* %2
%22 = icmp sge i32 %21, 256
br i1 %22, label %23, label %40
23: ; preds = %20
%24 = load i32, i32* %2
%25 = ashr i32 %24, 8
%26 = and i32 %25, 127
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds [128 x i32], [128 x i32]* @st_linear_to_Alaw.exp_lut, i64 0, i64 %27
%29 = load i32, i32* %28
store i32 %29, i32* %4
%30 = load i32, i32* %2
%31 = load i32, i32* %4
%32 = add nsw i32 %31, 3
%33 = ashr i32 %30, %32
%34 = and i32 %33, 15
store i32 %34, i32* %5
%35 = load i32, i32* %4
%36 = shl i32 %35, 4
%37 = load i32, i32* %5
%38 = or i32 %36, %37
%39 = trunc i32 %38 to i8
store i8 %39, i8* %6
br label %44
40: ; preds = %20
%41 = load i32, i32* %2
%42 = ashr i32 %41, 4
%43 = trunc i32 %42 to i8
store i8 %43, i8* %6
br label %44
44: ; preds = %40, %23
%45 = load i32, i32* %3
%46 = xor i32 %45, 85
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = xor i32 %48, %46
%50 = trunc i32 %49 to i8
store i8 %50, i8* %6
%51 = load i8, i8* %6
ret i8 %51
}

LLVM IR (-O2):
@st_linear_to_Alaw.exp_lut = internal unnamed_addr constant [128 x i32] [i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 3, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7]
define zeroext i8 @st_linear_to_Alaw(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 128
%4 = icmp eq i32 %3, 0
%5 = sub nsw i32 0, %0
%6 = select i1 %4, i32 %0, i32 %5
%7 = icmp slt i32 %6, 31744
%8 = select i1 %7, i32 %6, i32 31744
%9 = icmp sgt i32 %8, 255
br i1 %9, label %10, label %20
10: ; preds = %1
%11 = lshr i32 %8, 8
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds [128 x i32], [128 x i32]* @st_linear_to_Alaw.exp_lut, i64 0, i64 %12
%14 = load i32, i32* %13
%15 = add nsw i32 %14, 3
%16 = lshr i32 %8, %15
%17 = and i32 %16, 15
%18 = shl i32 %14, 4
%19 = or i32 %17, %18
br label %22
20: ; preds = %1
%21 = lshr i32 %8, 4
br label %22
22: ; preds = %20, %10
%23 = phi i32 [ %19, %10 ], [ %21, %20 ]
%24 = xor i32 %23, %3
%25 = trunc i32 %24 to i8
%26 = xor i8 %25, -43
ret i8 %26
}