xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ f(int *, int, ...);
int main(int argc, char *argv[]) {
  int p;
#pragma omp task shared(p)
  { f(&p, 3, 2, 3, 4); }
#pragma omp taskwait
  if (p != (2 + 3 + 4))
    abort();
#pragma omp task shared(p)
  { f(&p, 0); }
#pragma omp taskwait
  if (p != 0)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
mov    $0x3,%ecx
mov    $0x2,%edx
mov    $0x4,%r8d
mov    %ecx,%esi
mov    $0x0,%al
call   1040 <f@plt>
cmpl   $0x9,-0x14(%rbp)
je     1164 <main+0x44>
mov    $0x0,%al
call   1030 <abort@plt>
lea    -0x14(%rbp),%rdi
xor    %esi,%esi
mov    $0x0,%al
call   1040 <f@plt>
cmpl   $0x0,-0x14(%rbp)
je     1182 <main+0x62>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
mov    $0x3,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
mov    $0x4,%r8d
xor    %eax,%eax
call   1040 <f@plt>
cmpl   $0x9,0x4(%rsp)
jne    1162 <main+0x42>
lea    0x4(%rsp),%rdi
xor    %esi,%esi
xor    %eax,%eax
call   1040 <f@plt>
cmpl   $0x0,0x4(%rsp)
jne    1162 <main+0x42>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (i32*, i32, ...) @f(i32* %6, i32 3, i32 2, i32 3, i32 4)
%8 = load i32, i32* %6
%9 = icmp ne i32 %8, 9
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %2
%13 = call i32 (i32*, i32, ...) @f(i32* %6, i32 0)
%14 = load i32, i32* %6
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = call i32 (...) @abort()
unreachable
18: ; preds = %12
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 (i32*, i32, ...) @f(i32* %3, i32 3, i32 2, i32 3, i32 4)
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 9
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %2
%11 = call i32 (i32*, i32, ...) @f(i32* %3, i32 0)
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %10
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %10
ret i32 0
}
void testClosureLLIrV(void (*closure)(long long, int), long long a1, int a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureLLIrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureLLIrV>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %edx,%esi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureLLIrV(void (i64, i32)* %0, i64 %1, i32 %2) {
%4 = alloca void (i64, i32)*
%5 = alloca i64
%6 = alloca i32
store void (i64, i32)* %0, void (i64, i32)** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load void (i64, i32)*, void (i64, i32)** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @testClosureLLIrV(void (i64, i32)* nocapture %0, i64 %1, i32 %2) {
tail call void %0(i64 %1, i32 %2)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  char *pw_passwd;
};

/* Variables and functions */
TYPE_1__ *getpwnam(char *);
int /*<<< orphan*/ printf(char *, char *);
int main() {
  printf("%s\n", getpwnam("zx")->pw_passwd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <getpwnam@plt>
mov    (%rax),%rsi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedc(%rip),%rdi
call   1040 <getpwnam@plt>
mov    (%rax),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i8* }
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [3 x i8] c"zx\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call %struct.TYPE_2__* @getpwnam(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%3 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %2, i32 0, i32 0
%4 = load i8*, i8** %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
%struct.TYPE_2__ = type { i8* }
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [3 x i8] c"zx\00"
define i32 @main() {
%1 = tail call %struct.TYPE_2__* @getpwnam(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%2 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %1, i64 0, i32 0
%3 = load i8*, i8** %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
void glProgramUniformMatrix4fv(void) { return; }


x86 assembly (clang, -O0):
<glProgramUniformMatrix4fv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glProgramUniformMatrix4fv>:
ret

LLVM IR (-O0):
define void @glProgramUniformMatrix4fv() {
ret void
}

LLVM IR (-O2):
define void @glProgramUniformMatrix4fv() {
ret void
}
unsigned long _SwapFourBytes(unsigned long w) {
  unsigned long tmp;
  tmp = (w & 0x000000ff);
  tmp = ((w & 0x0000ff00) >> 0x08) | (tmp << 0x08);
  tmp = ((w & 0x00ff0000) >> 0x10) | (tmp << 0x08);
  tmp = ((w & 0xff000000) >> 0x18) | (tmp << 0x08);
  return tmp;
}


x86 assembly (clang, -O0):
<_SwapFourBytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff00,%rax
shr    $0x8,%rax
mov    -0x10(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff0000,%rax
shr    $0x10,%rax
mov    -0x10(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
movabs $0xff000000,%rax
and    -0x8(%rbp),%rax
shr    $0x18,%rax
mov    -0x10(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_SwapFourBytes>:
mov    %rdi,%rax
bswap  %eax
ret

LLVM IR (-O0):
define i64 @_SwapFourBytes(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 255
store i64 %5, i64* %3
%6 = load i64, i64* %2
%7 = and i64 %6, 65280
%8 = lshr i64 %7, 8
%9 = load i64, i64* %3
%10 = shl i64 %9, 8
%11 = or i64 %8, %10
store i64 %11, i64* %3
%12 = load i64, i64* %2
%13 = and i64 %12, 16711680
%14 = lshr i64 %13, 16
%15 = load i64, i64* %3
%16 = shl i64 %15, 8
%17 = or i64 %14, %16
store i64 %17, i64* %3
%18 = load i64, i64* %2
%19 = and i64 %18, 4278190080
%20 = lshr i64 %19, 24
%21 = load i64, i64* %3
%22 = shl i64 %21, 8
%23 = or i64 %20, %22
store i64 %23, i64* %3
%24 = load i64, i64* %3
ret i64 %24
}

LLVM IR (-O2):
define i64 @_SwapFourBytes(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
%4 = zext i32 %3 to i64
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ foo(int);
int main() {
  foo(7);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x7,%edi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 7)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef size_t uint16_t;

/* Variables and functions */
uint16_t get_uint16(const uint8_t *buf, uint16_t pos) {
  return (buf[pos] << 8) | buf[pos + 1];
}


x86 assembly (clang, -O0):
<get_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rdx
or     0x4(%rcx,%rdx,4),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_uint16>:
mov    (%rdi,%rsi,4),%eax
shl    $0x8,%eax
or     0x4(%rdi,%rsi,4),%eax
cltq
ret

LLVM IR (-O0):
define i64 @get_uint16(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = getelementptr inbounds i32, i32* %5, i64 %6
%8 = load i32, i32* %7
%9 = shl i32 %8, 8
%10 = load i32*, i32** %3
%11 = load i64, i64* %4
%12 = add i64 %11, 1
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = or i32 %9, %14
%16 = sext i32 %15 to i64
ret i64 %16
}

LLVM IR (-O2):
define i64 @get_uint16(i32* nocapture %0, i64 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 %1
%4 = load i32, i32* %3
%5 = shl i32 %4, 8
%6 = add i64 %1, 1
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = or i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}
void ComputeCumulativeSumRow_C() {}


x86 assembly (clang, -O0):
<ComputeCumulativeSumRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ComputeCumulativeSumRow_C>:
ret

LLVM IR (-O0):
define void @ComputeCumulativeSumRow_C() {
ret void
}

LLVM IR (-O2):
define void @ComputeCumulativeSumRow_C() {
ret void
}
int ExampleLocalFunction(int param1, int param2) { return 0; }


x86 assembly (clang, -O0):
<ExampleLocalFunction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExampleLocalFunction>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ExampleLocalFunction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @ExampleLocalFunction(i32 %0, i32 %1) {
ret i32 0
}
int multiplication(int a, int b) { return a * b; }


x86 assembly (clang, -O0):
<multiplication>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiplication>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @multiplication(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @multiplication(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
void enable_interrupts() { __asm__ volatile("sti;nop"); }


x86 assembly (clang, -O0):
<enable_interrupts>:
push   %rbp
mov    %rsp,%rbp
sti
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_interrupts>:
sti
nop
ret

LLVM IR (-O0):
define void @enable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @enable_interrupts() {
tail call void asm sideeffect "sti;nop", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
scalar_t__ chdir(char *);
signed char sysfsparser_thermal_kernel_support() {
  if (chdir("/sys/class"
            "/thermal") < 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<sysfsparser_thermal_kernel_support>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <chdir@plt>
cmp    $0x0,%rax
jge    1137 <sysfsparser_thermal_kernel_support+0x27>
movb   $0x0,-0x1(%rbp)
jmp    113b <sysfsparser_thermal_kernel_support+0x2b>
movb   $0x1,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfsparser_thermal_kernel_support>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <chdir@plt>
test   %rax,%rax
setns  %al
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"/sys/class/thermal\00"
define signext i8 @sysfsparser_thermal_kernel_support() {
%1 = alloca i8
%2 = call i64 @chdir(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i8 0, i8* %1
br label %6
5: ; preds = %0
store i8 1, i8* %1
br label %6
6: ; preds = %5, %4
%7 = load i8, i8* %1
ret i8 %7
}

LLVM IR (-O2):
@.str = [19 x i8] c"/sys/class/thermal\00"
define signext i8 @sysfsparser_thermal_kernel_support() {
%1 = tail call i64 @chdir(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = lshr i64 %1, 63
%3 = trunc i64 %2 to i8
%4 = xor i8 %3, 1
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int (*)());
int main(void) {
  printf("%p\n", main);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    0x2ebb(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    0x2ec9(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%p\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 (...)* bitcast (i32 ()* @main to i32 (...)*))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%p\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 (...)* bitcast (i32 ()* @main to i32 (...)*))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ syscall(int, char *, int /*<<< orphan*/);
int recv(char *msg) { syscall(55, msg, 0); }


x86 assembly (clang, -O0):
<recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x37,%edi
xor    %edx,%edx
call   1030 <syscall@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recv>:
mov    %rdi,%rsi
mov    $0x37,%edi
xor    %edx,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @recv(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @syscall(i32 55, i8* %4, i32 0)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @recv(i8* %0) {
%2 = tail call i32 @syscall(i32 55, i8* %0, i32 0)
ret i32 undef
}
/* Variables and functions */
void *calloc(size_t, size_t);
void *fixup_null_alloc(size_t);
void *xcalloc(size_t n, size_t s) {
  void *p;
  p = calloc(n, s);
  if (p == 0)
    p = fixup_null_alloc(n);
  return p;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1159 <xcalloc+0x39>
mov    -0x8(%rbp),%rdi
call   1030 <fixup_null_alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <calloc@plt>
test   %rax,%rax
je     1130 <xcalloc+0x10>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <fixup_null_alloc@plt>

LLVM IR (-O0):
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i64, i64* %3
%13 = call i8* @fixup_null_alloc(i64 %12)
store i8* %13, i8** %5
br label %14
14: ; preds = %11, %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i8* @fixup_null_alloc(i64 %0)
br label %7
7: ; preds = %5, %2
%8 = phi i8* [ %6, %5 ], [ %3, %2 ]
ret i8* %8
}
void sections_enter() { ("sections_enter"); }


x86 assembly (clang, -O0):
<sections_enter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sections_enter>:
ret

LLVM IR (-O0):
@.str = [15 x i8] c"sections_enter\00"
define void @sections_enter() {
ret void
}

LLVM IR (-O2):
define void @sections_enter() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pc(int /*<<< orphan*/);
void pmc(const char *s) {
  while (*s)
    pc(*s++);
}


x86 assembly (clang, -O0):
<pmc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <pmc+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <pc@plt>
jmp    111c <pmc+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmc>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <pmc+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <pc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <pmc+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @pmc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @pc(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @pmc(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @pc(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
int isascii(int c) { return !((unsigned char)c & 0x80); }


x86 assembly (clang, -O0):
<isascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
and    $0x80,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isascii>:
xor    %eax,%eax
test   $0x80,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = zext i8 %4 to i32
%6 = and i32 %5, 128
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @isascii(i32 %0) {
%2 = lshr i32 %0, 7
%3 = and i32 %2, 1
%4 = xor i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int countPrimes(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char const *argv[]) {
  int n = 500000;
  printf("%d\n", countPrimes(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x7a120,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <countPrimes@plt>
mov    %eax,%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7a120,%edi
call   1040 <countPrimes@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 500000, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @countPrimes(i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @countPrimes(i32 500000)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ generic_qsort_recurse(void *, int /*<<< orphan*/, size_t,
                                         size_t,
                                         int (*)(void const *, void const *));
void generic_qsort(void *a, size_t n, size_t size,
                   int (*compare)(const void *, const void *)) {
  generic_qsort_recurse(a, 0, n - 1, size, compare);
}


x86 assembly (clang, -O0):
<generic_qsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
xor    %esi,%esi
call   1030 <generic_qsort_recurse@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generic_qsort>:
mov    %rcx,%r8
mov    %rdx,%rcx
lea    -0x1(%rsi),%rdx
xor    %esi,%esi
jmp    1030 <generic_qsort_recurse@plt>

LLVM IR (-O0):
define void @generic_qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = sub i64 %10, 1
%12 = load i64, i64* %7
%13 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%14 = call i32 @generic_qsort_recurse(i8* %9, i32 0, i64 %11, i64 %12, i32 (i8*, i8*)* %13)
ret void
}

LLVM IR (-O2):
define void @generic_qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3) {
%5 = add i64 %1, -1
%6 = tail call i32 @generic_qsort_recurse(i8* %0, i32 0, i64 %5, i64 %2, i32 (i8*, i8*)* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ta_oom_b(int /*<<< orphan*/);
int /*<<< orphan*/ ta_set_parent(void *, void *);
void *ta_xsteal_(void *ta_parent, void *ptr) {
  ta_oom_b(ta_set_parent(ptr, ta_parent));
  return ptr;
}


x86 assembly (clang, -O0):
<ta_xsteal_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <ta_set_parent@plt>
mov    %eax,%edi
call   1030 <ta_oom_b@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ta_xsteal_>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
mov    %rbx,%rdi
call   1040 <ta_set_parent@plt>
mov    %eax,%edi
call   1030 <ta_oom_b@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ta_xsteal_(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @ta_set_parent(i8* %5, i8* %6)
%8 = call i32 @ta_oom_b(i32 %7)
%9 = load i8*, i8** %4
ret i8* %9
}

LLVM IR (-O2):
define i8* @ta_xsteal_(i8* %0, i8* returned %1) {
%3 = tail call i32 @ta_set_parent(i8* %1, i8* %0)
%4 = tail call i32 @ta_oom_b(i32 %3)
ret i8* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ p264_pixel_avg_weight_w16_mmxext(int /*<<< orphan*/ *, int,
                                                    int /*<<< orphan*/ *, int,
                                                    int, int);
void p264_pixel_avg_weight_16x16_mmxext(uint8_t *dst, int i_dst, uint8_t *src,
                                        int i_src, int i_weight_dst) {
  p264_pixel_avg_weight_w16_mmxext(dst, i_dst, src, i_src, i_weight_dst, 16);
}


x86 assembly (clang, -O0):
<p264_pixel_avg_weight_16x16_mmxext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
mov    $0x10,%r9d
call   1030 <p264_pixel_avg_weight_w16_mmxext@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p264_pixel_avg_weight_16x16_mmxext>:
mov    $0x10,%r9d
jmp    1030 <p264_pixel_avg_weight_w16_mmxext@plt>

LLVM IR (-O0):
define void @p264_pixel_avg_weight_16x16_mmxext(i32* %0, i32 %1, i32* %2, i32 %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = load i32*, i32** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @p264_pixel_avg_weight_w16_mmxext(i32* %11, i32 %12, i32* %13, i32 %14, i32 %15, i32 16)
ret void
}

LLVM IR (-O2):
define void @p264_pixel_avg_weight_16x16_mmxext(i32* %0, i32 %1, i32* %2, i32 %3, i32 %4) {
%6 = tail call i32 @p264_pixel_avg_weight_w16_mmxext(i32* %0, i32 %1, i32* %2, i32 %3, i32 %4, i32 16)
ret void
}
void invlpg(void *address) { asm volatile("invlpg %0" ::"m"(address)); }


x86 assembly (clang, -O0):
<invlpg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
invlpg -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<invlpg>:
mov    %rdi,-0x8(%rsp)
invlpg -0x8(%rsp)
ret

LLVM IR (-O0):
define void @invlpg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @invlpg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ panic(char *, char *, int /*<<< orphan*/);
void int_07(void) { panic("Device Not Available", "#NM", 0); }


x86 assembly (clang, -O0):
<int_07>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef3(%rip),%rsi
xor    %edx,%edx
call   1030 <panic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_07>:
lea    0xee9(%rip),%rdi
lea    0xef7(%rip),%rsi
xor    %edx,%edx
jmp    1030 <panic@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Device Not Available\00"
@.str.1 = [4 x i8] c"#NM\00"
define void @int_07() {
%1 = call i32 @panic(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Device Not Available\00"
@.str.1 = [4 x i8] c"#NM\00"
define void @int_07() {
%1 = tail call i32 @panic(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ write(int, char *, int);
void clear_temp_buffer_cache() {
  int fd = open("/proc/sys/vm/drop_caches", O_WRONLY);
  write(fd, "3", 1);
  close(fd);
}


x86 assembly (clang, -O0):
<clear_temp_buffer_cache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
lea    0xeb8(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xebf(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_temp_buffer_cache>:
push   %rbx
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
lea    0xebf(%rip),%rdi
call   1050 <open@plt>
mov    %eax,%ebx
lea    0xeca(%rip),%rsi
mov    %eax,%edi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"/proc/sys/vm/drop_caches\00"
@O_WRONLY = global i32 0
@.str.1 = [2 x i8] c"3\00"
define void @clear_temp_buffer_cache() {
%1 = alloca i32
%2 = load i32, i32* @O_WRONLY
%3 = call i32 @open(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %2)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @write(i32 %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 1)
%6 = load i32, i32* %1
%7 = call i32 @close(i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"/proc/sys/vm/drop_caches\00"
@O_WRONLY = global i32 0
@.str.1 = [2 x i8] c"3\00"
define void @clear_temp_buffer_cache() {
%1 = load i32, i32* @O_WRONLY
%2 = tail call i32 @open(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @write(i32 %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 1)
%4 = tail call i32 @close(i32 %2)
ret void
}
void foo103() {}


x86 assembly (clang, -O0):
<foo103>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo103>:
ret

LLVM IR (-O0):
define void @foo103() {
ret void
}

LLVM IR (-O2):
define void @foo103() {
ret void
}
/* Type definitions */
struct entry {
  int dummy;
};

/* Variables and functions */
char *av_strdup(char *);
int cache_getfunc(struct entry *ent, const char *param, char **retp) {
  *retp = av_strdup("");
  return 0;
}


x86 assembly (clang, -O0):
<cache_getfunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed5(%rip),%rdi
call   1030 <av_strdup@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_getfunc>:
push   %rbx
mov    %rdx,%rbx
lea    0xee5(%rip),%rdi
call   1030 <av_strdup@plt>
mov    %rax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.entry = type { i32 }
@.str = [1 x i8] zeroinitializer
define i32 @cache_getfunc(%struct.entry* %0, i8* %1, i8** %2) {
%4 = alloca %struct.entry*
%5 = alloca i8*
%6 = alloca i8**
store %struct.entry* %0, %struct.entry** %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
%7 = call i8* @av_strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%8 = load i8**, i8*** %6
store i8* %7, i8** %8
ret i32 0
}

LLVM IR (-O2):
%struct.entry = type { i32 }
@.str = [1 x i8] zeroinitializer
define i32 @cache_getfunc(%struct.entry* nocapture readnone %0, i8* nocapture readnone %1, i8** nocapture writeonly %2) {
%4 = tail call i8* @av_strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store i8* %4, i8** %2
ret i32 0
}
void atomic_sync_xchg(volatile unsigned long *ptr, unsigned long val,
                      unsigned long *result) {
  __atomic_exchange(ptr, &val, result, 5);
}


x86 assembly (clang, -O0):
<atomic_sync_xchg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
xchg   %rcx,(%rdx)
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_sync_xchg>:
xchg   %rsi,(%rdi)
mov    %rsi,(%rdx)
ret

LLVM IR (-O0):
define void @atomic_sync_xchg(i64* %0, i64 %1, i64* %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i64*, i64** %4
%8 = load i64*, i64** %6
%9 = load i64, i64* %5
%10 = atomicrmw volatile xchg i64* %7, i64 %9 seq_cst
store i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @atomic_sync_xchg(i64* %0, i64 %1, i64* nocapture writeonly %2) {
%4 = atomicrmw volatile xchg i64* %0, i64 %1 seq_cst
store i64 %4, i64* %2
ret void
}
void set_ftrace_ops_ro(void) {}


x86 assembly (clang, -O0):
<set_ftrace_ops_ro>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ftrace_ops_ro>:
ret

LLVM IR (-O0):
define void @set_ftrace_ops_ro() {
ret void
}

LLVM IR (-O2):
define void @set_ftrace_ops_ro() {
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int strdupped_cmp(const void *a, const void *b) {
  char *c = *(char **)a;
  char *d = *(char **)b;
  return strcmp(c, d);
}


x86 assembly (clang, -O0):
<strdupped_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdupped_cmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @strdupped_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
%9 = load i8*, i8** %8
store i8* %9, i8** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
%12 = load i8*, i8** %11
store i8* %12, i8** %6
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = call i32 @strcmp(i8* %13, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @strdupped_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint8_t hi8(uint16_t val) { return val >> 8; }


x86 assembly (clang, -O0):
<hi8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hi8>:
mov    %edi,%eax
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @hi8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
ret i32 %4
}

LLVM IR (-O2):
define i32 @hi8(i32 %0) {
%2 = ashr i32 %0, 8
ret i32 %2
}
void RTSemEventRemoveSignaller(void) {}


x86 assembly (clang, -O0):
<RTSemEventRemoveSignaller>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSemEventRemoveSignaller>:
ret

LLVM IR (-O0):
define void @RTSemEventRemoveSignaller() {
ret void
}

LLVM IR (-O2):
define void @RTSemEventRemoveSignaller() {
ret void
}
int lid_open(void) { return 1; }


x86 assembly (clang, -O0):
<lid_open>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lid_open>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @lid_open() {
ret i32 1
}

LLVM IR (-O2):
define i32 @lid_open() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ gpio_direction(int, int);
int /*<<< orphan*/ gpio_export(int);
int /*<<< orphan*/ gpio_read(int, char *);
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  char state;
  gpio_export(17);
  gpio_direction(17, 50);
  gpio_read(17, &state);
  printf("GPIO Pin State: %c\n", state);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x11,%edi
call   1040 <gpio_export@plt>
mov    $0x11,%edi
mov    $0x32,%esi
call   1060 <gpio_direction@plt>
mov    $0x11,%edi
lea    -0x5(%rbp),%rsi
call   1050 <gpio_read@plt>
lea    0xe83(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x11,%edi
call   1040 <gpio_export@plt>
mov    $0x11,%edi
mov    $0x32,%esi
call   1060 <gpio_direction@plt>
lea    0x7(%rsp),%rsi
mov    $0x11,%edi
call   1050 <gpio_read@plt>
movsbl 0x7(%rsp),%esi
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"GPIO Pin State: %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call i32 @gpio_export(i32 17)
%4 = call i32 @gpio_direction(i32 17, i32 50)
%5 = call i32 @gpio_read(i32 17, i8* %2)
%6 = load i8, i8* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8 signext %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"GPIO Pin State: %c\0A\00"
define i32 @main() {
%1 = alloca i8
%2 = tail call i32 @gpio_export(i32 17)
%3 = tail call i32 @gpio_direction(i32 17, i32 50)
%4 = call i32 @gpio_read(i32 17, i8* %1)
%5 = load i8, i8* %1
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8 signext %5)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ PBKDF2PARAM;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ PBKDF2PARAM_it;
PBKDF2PARAM *d2i_PBKDF2PARAM(PBKDF2PARAM **a, const unsigned char **in,
                             long len) {
  return (PBKDF2PARAM *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                      &PBKDF2PARAM_it);
}


x86 assembly (clang, -O0):
<d2i_PBKDF2PARAM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2eb1(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PBKDF2PARAM>:
mov    0x2ed1(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@PBKDF2PARAM_it = global i32 0
define i32* @d2i_PBKDF2PARAM(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @PBKDF2PARAM_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@PBKDF2PARAM_it = global i32 0
define i32* @d2i_PBKDF2PARAM(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @PBKDF2PARAM_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Type definitions */
struct JellyEvent {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct JellyEvent *);
void jm_free_event(struct JellyEvent *event) { free(event); }


x86 assembly (clang, -O0):
<jm_free_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jm_free_event>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.JellyEvent = type { i32 }
define void @jm_free_event(%struct.JellyEvent* %0) {
%2 = alloca %struct.JellyEvent*
store %struct.JellyEvent* %0, %struct.JellyEvent** %2
%3 = load %struct.JellyEvent*, %struct.JellyEvent** %2
%4 = call i32 @free(%struct.JellyEvent* %3)
ret void
}

LLVM IR (-O2):
%struct.JellyEvent = type { i32 }
define void @jm_free_event(%struct.JellyEvent* nocapture %0) {
%2 = tail call i32 @free(%struct.JellyEvent* %0)
ret void
}
int test(void) {
  int a = 0;
  while (a < 10)
    a++;
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1123 <test+0x23>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test+0xb>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %5, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* %1
%7 = add nsw i32 %6, 1
store i32 %7, i32* %1
br label %2
8: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @test() {
ret i32 0
}
char tds_has_atomic(void) { return 0; }


x86 assembly (clang, -O0):
<tds_has_atomic>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tds_has_atomic>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @tds_has_atomic() {
ret i8 0
}

LLVM IR (-O2):
define signext i8 @tds_has_atomic() {
ret i8 0
}
void to_sign_short_store(__float128 a, short *p) { *p = (short)a; }


x86 assembly (clang, -O0):
<to_sign_short_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movaps %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movaps -0x10(%rbp),%xmm0
call   1130 <__fixtfsi>
mov    %ax,%cx
mov    -0x18(%rbp),%rax
mov    %cx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret
nopl   0x0(%rax)

x86 assembly (clang, -O2):
<to_sign_short_store>:
push   %rbx
mov    %rdi,%rbx
call   1110 <__fixtfsi>
mov    %ax,(%rbx)
pop    %rbx
ret
xchg   %ax,%ax

LLVM IR (-O0):
define void @to_sign_short_store(fp128 %0, i16* %1) {
%3 = alloca fp128
%4 = alloca i16*
store fp128 %0, fp128* %3
store i16* %1, i16** %4
%5 = load fp128, fp128* %3
%6 = fptosi fp128 %5 to i16
%7 = load i16*, i16** %4
store i16 %6, i16* %7
ret void
}

LLVM IR (-O2):
define void @to_sign_short_store(fp128 %0, i16* nocapture writeonly %1) {
%3 = fptosi fp128 %0 to i16
store i16 %3, i16* %1
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int sweep_quaddobl_real_run(void) {
  int fail, *b;
  double *c;
  int precision = 2;
  fail = _ada_use_c2phc4c(621, &precision, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<sweep_quaddobl_real_run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x2,-0x1c(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x26d,%edi
lea    -0x1c(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sweep_quaddobl_real_run>:
push   %rax
movl   $0x2,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x26d,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sweep_quaddobl_real_run() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca double*
%4 = alloca i32
store i32 2, i32* %4
%5 = load i32*, i32** %2
%6 = load double*, double** %3
%7 = call i32 @_ada_use_c2phc4c(i32 621, i32* %4, i32* %5, double* %6, i32 0)
store i32 %7, i32* %1
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @sweep_quaddobl_real_run() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 2, i32* %1
%3 = call i32 @_ada_use_c2phc4c(i32 621, i32* %1, i32* undef, double* undef, i32 0)
ret i32 %3
}
unsigned int RSHash(char *str) {
  unsigned int b = 378551;
  unsigned int a = 63689;
  unsigned int hash = 0;
  while (*str) {
    hash = hash * a + (*str++);
    a *= b;
  }
  return (hash & 0x7FFFFFFF);
}


x86 assembly (clang, -O0):
<RSHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x5c6b7,-0xc(%rbp)
movl   $0xf8c9,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1157 <RSHash+0x57>
mov    -0x14(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    111d <RSHash+0x1d>
mov    -0x14(%rbp),%eax
and    $0x7fffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSHash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1141 <RSHash+0x41>
add    $0x1,%rdi
mov    $0xf8c9,%edx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %eax,%esi
imul   %edx,%esi
movsbl %cl,%eax
add    %esi,%eax
imul   $0x5c6b7,%edx,%edx
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1120 <RSHash+0x20>
and    $0x7fffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @RSHash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
store i32 378551, i32* %3
store i32 63689, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %1
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = mul i32 %11, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %2
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = add i32 %13, %17
store i32 %18, i32* %5
%19 = load i32, i32* %3
%20 = load i32, i32* %4
%21 = mul i32 %20, %19
store i32 %21, i32* %4
br label %6
22: ; preds = %6
%23 = load i32, i32* %5
%24 = and i32 %23, 2147483647
ret i32 %24
}

LLVM IR (-O2):
define i32 @RSHash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %18, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %14, %4 ], [ %2, %1 ]
%6 = phi i32 [ %12, %4 ], [ 0, %1 ]
%7 = phi i32 [ %13, %4 ], [ 63689, %1 ]
%8 = phi i8* [ %10, %4 ], [ %0, %1 ]
%9 = mul i32 %6, %7
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = sext i8 %5 to i32
%12 = add i32 %9, %11
%13 = mul i32 %7, 378551
%14 = load i8, i8* %10
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4
%17 = and i32 %12, 2147483647
br label %18
18: ; preds = %16, %1
%19 = phi i32 [ 0, %1 ], [ %17, %16 ]
ret i32 %19
}
int slen(char *ins) {
  int index = 0;
  while (ins[index] != 0) {
    index++;
  }
  return index;
}


x86 assembly (clang, -O0):
<slen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <slen+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <slen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<slen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <slen+0x10>
ret

LLVM IR (-O0):
define i32 @slen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @slen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
int main(void) {
  int i = 0;
  int *p;
  while (i < 10) {
    int x = 2;
    i++;
    p = &x;
  }
  *p;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1139 <main+0x39>
movl   $0x2,-0x14(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1112 <main+0x12>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %11
8: ; preds = %5
store i32 2, i32* %4
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
store i32* %4, i32** %3
br label %5
11: ; preds = %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void update_entry(void *old_memory, void *new_memory, int new_size, char *file,
                  int line) {}


x86 assembly (clang, -O0):
<update_entry>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_entry>:
ret

LLVM IR (-O0):
define void @update_entry(i8* %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
ret void
}

LLVM IR (-O2):
define void @update_entry(i8* nocapture %0, i8* nocapture %1, i32 %2, i8* nocapture %3, i32 %4) {
ret void
}