#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
signed int fc8180_ppi_longread(void *handle, unsigned short addr,
                               unsigned int *data) {
  unsigned int length = 4;
  unsigned char cmd = 0x80 | 0x40 | ((length & 0x0f0000) >> 16);
  OAL_OBTAIN_SEMAPHORE();
  (*(volatile unsigned char *)(0x00)) = addr;
  (*(volatile unsigned char *)(0x00)) = addr >> 4;
  (*(volatile unsigned char *)(0x00)) = addr >> 8;
  (*(volatile unsigned char *)(0x00)) = addr >> 12;
  (*(volatile unsigned char *)(0x00)) = cmd >> 4;
  (*(volatile unsigned char *)(0x00)) = cmd;
  (*(volatile unsigned char *)(0x00)) = length >> 12;
  (*(volatile unsigned char *)(0x00)) = length >> 8;
  (*(volatile unsigned char *)(0x00)) = length >> 4;
  (*(volatile unsigned char *)(0x00)) = length;
  *data = ((*(volatile unsigned char *)(0x00)) & 0x0f) << 4;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f);
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f) << 12;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f) << 8;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f) << 20;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f) << 16;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f) << 28;
  *data |= ((*(volatile unsigned char *)(0x00)) & 0x0f) << 24;
  OAL_RELEASE_SEMAPHORE();
  return 0;
}


x86 assembly (clang, -O0):
<fc8180_ppi_longread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x4,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
and    $0xf0000,%eax
shr    $0x10,%eax
or     $0xc0,%eax
mov    %al,-0x1d(%rbp)
mov    $0x0,%al
call   1040 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0xa(%rbp),%ax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0x4,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
sar    $0xc,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
movzbl -0x1d(%rbp),%eax
sar    $0x4,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1d(%rbp),%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
shr    $0xc,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
shr    $0x4,%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
mov    %al,%cl
xor    %eax,%eax
mov    %cl,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0xc,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0x8,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0x14,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0x10,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0x1c,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
mov    (%rax),%al
movzbl %al,%ecx
and    $0xf,%ecx
shl    $0x18,%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8180_ppi_longread>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %esi,%ebx
xor    %eax,%eax
call   1040 <OAL_OBTAIN_SEMAPHORE@plt>
mov    %bl,0x0
mov    %ebx,%eax
shr    $0x4,%eax
mov    %al,0x0
mov    %bh,0x0
shr    $0xc,%ebx
mov    %bl,0x0
movb   $0xc,0x0
0c
movb   $0xc0,0x0
c0
movb   $0x0,0x0
movb   $0x0,0x0
movb   $0x0,0x0
movb   $0x4,0x0
04
mov    0x0,%al
shl    $0x4,%al
movzbl 0x0,%ecx
and    $0xf,%ecx
movzbl %al,%eax
or     %ecx,%eax
movzbl 0x0,%ecx
and    $0xf,%ecx
shl    $0xc,%ecx
or     %eax,%ecx
movzbl 0x0,%eax
and    $0xf,%eax
shl    $0x8,%eax
or     %ecx,%eax
movzbl 0x0,%ecx
and    $0xf,%ecx
shl    $0x14,%ecx
or     %eax,%ecx
movzbl 0x0,%eax
and    $0xf,%eax
shl    $0x10,%eax
or     %ecx,%eax
movzbl 0x0,%ecx
shl    $0x1c,%ecx
or     %eax,%ecx
movzbl 0x0,%eax
and    $0xf,%eax
shl    $0x18,%eax
or     %ecx,%eax
mov    %eax,(%r14)
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fc8180_ppi_longread(i8* %0, i16 zeroext %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i16 %1, i16* %5
store i32* %2, i32** %6
store i32 4, i32* %7
%9 = load i32, i32* %7
%10 = and i32 %9, 983040
%11 = lshr i32 %10, 16
%12 = or i32 192, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %8
%14 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%15 = load i16, i16* %5
%16 = trunc i16 %15 to i8
store volatile i8 %16, i8* null
%17 = load i16, i16* %5
%18 = zext i16 %17 to i32
%19 = ashr i32 %18, 4
%20 = trunc i32 %19 to i8
store volatile i8 %20, i8* null
%21 = load i16, i16* %5
%22 = zext i16 %21 to i32
%23 = ashr i32 %22, 8
%24 = trunc i32 %23 to i8
store volatile i8 %24, i8* null
%25 = load i16, i16* %5
%26 = zext i16 %25 to i32
%27 = ashr i32 %26, 12
%28 = trunc i32 %27 to i8
store volatile i8 %28, i8* null
%29 = load i8, i8* %8
%30 = zext i8 %29 to i32
%31 = ashr i32 %30, 4
%32 = trunc i32 %31 to i8
store volatile i8 %32, i8* null
%33 = load i8, i8* %8
store volatile i8 %33, i8* null
%34 = load i32, i32* %7
%35 = lshr i32 %34, 12
%36 = trunc i32 %35 to i8
store volatile i8 %36, i8* null
%37 = load i32, i32* %7
%38 = lshr i32 %37, 8
%39 = trunc i32 %38 to i8
store volatile i8 %39, i8* null
%40 = load i32, i32* %7
%41 = lshr i32 %40, 4
%42 = trunc i32 %41 to i8
store volatile i8 %42, i8* null
%43 = load i32, i32* %7
%44 = trunc i32 %43 to i8
store volatile i8 %44, i8* null
%45 = load volatile i8, i8* null
%46 = zext i8 %45 to i32
%47 = and i32 %46, 15
%48 = shl i32 %47, 4
%49 = load i32*, i32** %6
store i32 %48, i32* %49
%50 = load volatile i8, i8* null
%51 = zext i8 %50 to i32
%52 = and i32 %51, 15
%53 = load i32*, i32** %6
%54 = load i32, i32* %53
%55 = or i32 %54, %52
store i32 %55, i32* %53
%56 = load volatile i8, i8* null
%57 = zext i8 %56 to i32
%58 = and i32 %57, 15
%59 = shl i32 %58, 12
%60 = load i32*, i32** %6
%61 = load i32, i32* %60
%62 = or i32 %61, %59
store i32 %62, i32* %60
%63 = load volatile i8, i8* null
%64 = zext i8 %63 to i32
%65 = and i32 %64, 15
%66 = shl i32 %65, 8
%67 = load i32*, i32** %6
%68 = load i32, i32* %67
%69 = or i32 %68, %66
store i32 %69, i32* %67
%70 = load volatile i8, i8* null
%71 = zext i8 %70 to i32
%72 = and i32 %71, 15
%73 = shl i32 %72, 20
%74 = load i32*, i32** %6
%75 = load i32, i32* %74
%76 = or i32 %75, %73
store i32 %76, i32* %74
%77 = load volatile i8, i8* null
%78 = zext i8 %77 to i32
%79 = and i32 %78, 15
%80 = shl i32 %79, 16
%81 = load i32*, i32** %6
%82 = load i32, i32* %81
%83 = or i32 %82, %80
store i32 %83, i32* %81
%84 = load volatile i8, i8* null
%85 = zext i8 %84 to i32
%86 = and i32 %85, 15
%87 = shl i32 %86, 28
%88 = load i32*, i32** %6
%89 = load i32, i32* %88
%90 = or i32 %89, %87
store i32 %90, i32* %88
%91 = load volatile i8, i8* null
%92 = zext i8 %91 to i32
%93 = and i32 %92, 15
%94 = shl i32 %93, 24
%95 = load i32*, i32** %6
%96 = load i32, i32* %95
%97 = or i32 %96, %94
store i32 %97, i32* %95
%98 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8180_ppi_longread(i8* nocapture readnone %0, i16 zeroext %1, i32* nocapture writeonly %2) {
%4 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%5 = trunc i16 %1 to i8
store volatile i8 %5, i8* null
%6 = lshr i16 %1, 4
%7 = trunc i16 %6 to i8
store volatile i8 %7, i8* null
%8 = lshr i16 %1, 8
%9 = trunc i16 %8 to i8
store volatile i8 %9, i8* null
%10 = lshr i16 %1, 12
%11 = trunc i16 %10 to i8
store volatile i8 %11, i8* null
store volatile i8 12, i8* null
store volatile i8 -64, i8* null
store volatile i8 0, i8* null
store volatile i8 0, i8* null
store volatile i8 0, i8* null
store volatile i8 4, i8* null
%12 = load volatile i8, i8* null
%13 = shl i8 %12, 4
%14 = load volatile i8, i8* null
%15 = and i8 %14, 15
%16 = or i8 %15, %13
%17 = zext i8 %16 to i32
%18 = load volatile i8, i8* null
%19 = and i8 %18, 15
%20 = zext i8 %19 to i32
%21 = shl nuw nsw i32 %20, 12
%22 = or i32 %21, %17
%23 = load volatile i8, i8* null
%24 = and i8 %23, 15
%25 = zext i8 %24 to i32
%26 = shl nuw nsw i32 %25, 8
%27 = or i32 %26, %22
%28 = load volatile i8, i8* null
%29 = and i8 %28, 15
%30 = zext i8 %29 to i32
%31 = shl nuw nsw i32 %30, 20
%32 = or i32 %31, %27
%33 = load volatile i8, i8* null
%34 = and i8 %33, 15
%35 = zext i8 %34 to i32
%36 = shl nuw nsw i32 %35, 16
%37 = or i32 %36, %32
%38 = load volatile i8, i8* null
%39 = zext i8 %38 to i32
%40 = shl i32 %39, 28
%41 = or i32 %37, %40
%42 = load volatile i8, i8* null
%43 = and i8 %42, 15
%44 = zext i8 %43 to i32
%45 = shl nuw nsw i32 %44, 24
%46 = or i32 %45, %41
store i32 %46, i32* %2
%47 = tail call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 0
}