xunge/DecIR huggingface dataset:
/* Variables and functions */
int indice_de_ligne(char);
int char_ligne_valide(char ligne) {
  return indice_de_ligne(ligne) >= 0 && indice_de_ligne(ligne) < 8;
}


x86 assembly (clang, -O0):
<char_ligne_valide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <indice_de_ligne@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
jl     1149 <char_ligne_valide+0x39>
movsbl -0x1(%rbp),%edi
call   1030 <indice_de_ligne@plt>
cmp    $0x8,%eax
setl   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_ligne_valide>:
push   %rbx
mov    %edi,%ebx
call   1030 <indice_de_ligne@plt>
test   %eax,%eax
js     1130 <char_ligne_valide+0x20>
movsbl %bl,%edi
call   1030 <indice_de_ligne@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x8,%ecx
setl   %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @char_ligne_valide(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @indice_de_ligne(i8 signext %3)
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i32 @indice_de_ligne(i8 signext %7)
%9 = icmp slt i32 %8, 8
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @char_ligne_valide(i8 signext %0) {
%2 = tail call i32 @indice_de_ligne(i8 signext %0)
%3 = icmp sgt i32 %2, -1
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @indice_de_ligne(i8 signext %0)
%6 = icmp slt i32 %5, 8
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int i;
  i = __VERIFIER_nondet_int();
  while (i > 10) {
    if (i == 25) {
      i = 30;
    }
    if (i <= 30) {
      i = i - 1;
    } else {
      i = 20;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jle    1168 <main+0x58>
cmpl   $0x19,-0x8(%rbp)
jne    1144 <main+0x34>
movl   $0x1e,-0x8(%rbp)
cmpl   $0x1e,-0x8(%rbp)
jg     115c <main+0x4c>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1163 <main+0x53>
movl   $0x14,-0x8(%rbp)
jmp    1129 <main+0x19>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
cmp    $0xb,%eax
jl     1146 <main+0x36>
mov    $0x1e,%ecx
mov    $0x14,%edx
nopw   0x0(%rax,%rax,1)
cmp    $0x19,%eax
cmove  %ecx,%eax
cmp    $0x1f,%eax
lea    -0x1(%rax),%esi
cmovae %edx,%esi
mov    %esi,%eax
cmp    $0xa,%esi
ja     1130 <main+0x20>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %3, i32* %2
br label %4
4: ; preds = %18, %0
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 10
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 25
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 30, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 30
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %2
%16 = sub nsw i32 %15, 1
store i32 %16, i32* %2
br label %18
17: ; preds = %11
store i32 20, i32* %2
br label %18
18: ; preds = %17, %14
br label %4
19: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = icmp sgt i32 %1, 10
br i1 %2, label %3, label %11
3: ; preds = %0, %3
%4 = phi i32 [ %9, %3 ], [ %1, %0 ]
%5 = icmp eq i32 %4, 25
%6 = select i1 %5, i32 30, i32 %4
%7 = icmp ult i32 %6, 31
%8 = add nsw i32 %6, -1
%9 = select i1 %7, i32 %8, i32 20
%10 = icmp ugt i32 %9, 10
br i1 %10, label %3, label %11
11: ; preds = %3, %0
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int ftruncate(int, int /*<<< orphan*/);
__attribute__((__weak__, __always___)) int
softboundmpx_ftruncate(int fd, off_t length) {
  return ftruncate(fd, length);
}


x86 assembly (clang, -O0):
<softboundmpx_ftruncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <ftruncate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_ftruncate>:
jmp    1030 <ftruncate@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_ftruncate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ftruncate(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define weak i32 @softboundmpx_ftruncate(i32 %0, i32 %1) {
%3 = tail call i32 @ftruncate(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ region_write(int, int, int, int /*<<< orphan*/);
void i2c_stop(void) { region_write(((0xE1800000) + 4), 0x1, 5, 0); }


x86 assembly (clang, -O0):
<i2c_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe1800004,%edi
mov    $0x1,%esi
mov    $0x5,%edx
xor    %ecx,%ecx
call   1030 <region_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_stop>:
mov    $0xe1800004,%edi
mov    $0x1,%esi
mov    $0x5,%edx
xor    %ecx,%ecx
jmp    1030 <region_write@plt>

LLVM IR (-O0):
define void @i2c_stop() {
%1 = call i32 @region_write(i32 -511705084, i32 1, i32 5, i32 0)
ret void
}

LLVM IR (-O2):
define void @i2c_stop() {
%1 = tail call i32 @region_write(i32 -511705084, i32 1, i32 5, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initscr();
void init() { initscr(); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <initscr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
xor    %eax,%eax
jmp    1030 <initscr@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @initscr()
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @initscr()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sv_ClearSegment(int);
void sv_ClearAllSegments() {
  int i = 0;
  for (i = 0; i < 64; i++) {
    sv_ClearSegment(i);
  }
}


x86 assembly (clang, -O0):
<sv_ClearAllSegments>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x40,-0x4(%rbp)
jge    1146 <sv_ClearAllSegments+0x36>
mov    -0x4(%rbp),%edi
call   1030 <sv_ClearSegment@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1126 <sv_ClearAllSegments+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sv_ClearAllSegments>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <sv_ClearSegment@plt>
add    $0x1,%ebx
cmp    $0x40,%ebx
jne    1120 <sv_ClearAllSegments+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @sv_ClearAllSegments() {
%1 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 64
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @sv_ClearSegment(i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @sv_ClearAllSegments() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @sv_ClearSegment(i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 64
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
int compare_int(const void *p1, const void *p2) {
  int *v1 = (int *)p1;
  int *v2 = (int *)p2;
  if (*v1 > *v2)
    return 1;
  else if (*v1 < *v2)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jle    113a <compare_int+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    115f <compare_int+0x5f>
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jge    1158 <compare_int+0x58>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <compare_int+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setl   %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @compare_int(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %7
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = load i32*, i32** %7
%15 = load i32, i32* %14
%16 = icmp sgt i32 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %26
18: ; preds = %2
%19 = load i32*, i32** %6
%20 = load i32, i32* %19
%21 = load i32*, i32** %7
%22 = load i32, i32* %21
%23 = icmp slt i32 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 -1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @compare_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
%8 = icmp slt i32 %5, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Variables and functions */
scalar_t__ Bernoulli(double);
long Binomial(long n, double p) {
  long i, x = 0;
  for (i = 0; i < n; i++)
    x += Bernoulli(p);
  return (x);
}


x86 assembly (clang, -O0):
<Binomial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    1162 <Binomial+0x52>
movsd  -0x10(%rbp),%xmm0
call   1030 <Bernoulli@plt>
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1131 <Binomial+0x21>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Binomial>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
jle    1145 <Binomial+0x35>
mov    %rdi,%rbx
xor    %r14d,%r14d
movsd  %xmm0,(%rsp)
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsd  (%rsp),%xmm0
call   1030 <Bernoulli@plt>
add    %rax,%r14
add    $0xffffffffffffffff,%rbx
jne    1130 <Binomial+0x20>
jmp    1148 <Binomial+0x38>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @Binomial(i64 %0, double %1) {
%3 = alloca i64
%4 = alloca double
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store double %1, double* %4
store i64 0, i64* %6
store i64 0, i64* %5
br label %7
7: ; preds = %16, %2
%8 = load i64, i64* %5
%9 = load i64, i64* %3
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load double, double* %4
%13 = call i64 @Bernoulli(double %12)
%14 = load i64, i64* %6
%15 = add nsw i64 %14, %13
store i64 %15, i64* %6
br label %16
16: ; preds = %11
%17 = load i64, i64* %5
%18 = add nsw i64 %17, 1
store i64 %18, i64* %5
br label %7
19: ; preds = %7
%20 = load i64, i64* %6
ret i64 %20
}

LLVM IR (-O2):
define i64 @Binomial(i64 %0, double %1) {
%3 = icmp sgt i64 %0, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i64 [ %8, %4 ], [ 0, %2 ]
%6 = phi i64 [ %9, %4 ], [ 0, %2 ]
%7 = tail call i64 @Bernoulli(double %1)
%8 = add nsw i64 %7, %5
%9 = add nuw nsw i64 %6, 1
%10 = icmp eq i64 %9, %0
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = phi i64 [ 0, %2 ], [ %8, %4 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i = 65500;
  while (i--) {
    i++;
    printf("%d", i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffdc,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     1157 <main+0x47>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    $0xffdc,%esi
call   1030 <printf@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 65500, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 65500)
br label %1
}
void reverseInts(int *a, int length) {
  int halfLen = (length >> 1);
  int *end = a + length;
  int c;
  while (--halfLen >= 0) {
    c = *a;
    *a++ = *--end;
    *end = c;
  }
}


x86 assembly (clang, -O0):
<reverseInts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
jl     1173 <reverseInts+0x73>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xfffffffffffffffc,%rcx
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
jmp    1127 <reverseInts+0x27>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverseInts>:
cmp    $0x2,%esi
jl     1138 <reverseInts+0x38>
mov    %esi,%eax
shr    %esi
lea    (%rdi,%rax,4),%rax
add    $0xfffffffffffffffc,%rax
add    $0x1,%esi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    (%rdi),%ecx
mov    (%rax),%edx
mov    %edx,(%rdi)
add    $0x4,%rdi
mov    %ecx,(%rax)
add    $0xfffffffffffffffc,%rax
add    $0xffffffff,%esi
cmp    $0x1,%esi
ja     1120 <reverseInts+0x20>
ret

LLVM IR (-O0):
define void @reverseInts(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = ashr i32 %8, 1
store i32 %9, i32* %5
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
store i32* %13, i32** %6
br label %14
14: ; preds = %18, %2
%15 = load i32, i32* %5
%16 = add nsw i32 %15, -1
store i32 %16, i32* %5
%17 = icmp sge i32 %16, 0
br i1 %17, label %18, label %28
18: ; preds = %14
%19 = load i32*, i32** %3
%20 = load i32, i32* %19
store i32 %20, i32* %7
%21 = load i32*, i32** %6
%22 = getelementptr inbounds i32, i32* %21, i32 -1
store i32* %22, i32** %6
%23 = load i32, i32* %22
%24 = load i32*, i32** %3
%25 = getelementptr inbounds i32, i32* %24, i32 1
store i32* %25, i32** %3
store i32 %23, i32* %24
%26 = load i32, i32* %7
%27 = load i32*, i32** %6
store i32 %26, i32* %27
br label %14
28: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @reverseInts(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %18
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = lshr i32 %1, 1
br label %8
8: ; preds = %4, %8
%9 = phi i32* [ %16, %8 ], [ %0, %4 ]
%10 = phi i32* [ %14, %8 ], [ %6, %4 ]
%11 = phi i32 [ %12, %8 ], [ %7, %4 ]
%12 = add nsw i32 %11, -1
%13 = load i32, i32* %9
%14 = getelementptr inbounds i32, i32* %10, i64 -1
%15 = load i32, i32* %14
%16 = getelementptr inbounds i32, i32* %9, i64 1
store i32 %15, i32* %9
store i32 %13, i32* %14
%17 = icmp ugt i32 %11, 1
br i1 %17, label %8, label %18
18: ; preds = %8, %2
ret void
}
void renderer_finish(void) {}


x86 assembly (clang, -O0):
<renderer_finish>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<renderer_finish>:
ret

LLVM IR (-O0):
define void @renderer_finish() {
ret void
}

LLVM IR (-O2):
define void @renderer_finish() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
__attribute__((always_)) char *Bstrncpyz(char *dst, const char *src, size_t n) {
  strncpy(dst, src, n);
  dst[n - 1] = 0;
  return dst;
}


x86 assembly (clang, -O0):
<Bstrncpyz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bstrncpyz>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <strncpy@plt>
movb   $0x0,-0x1(%r14,%rbx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @Bstrncpyz(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @strncpy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
%12 = load i64, i64* %6
%13 = sub i64 %12, 1
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @Bstrncpyz(i8* returned %0, i8* %1, i64 %2) {
%4 = tail call i32 @strncpy(i8* %0, i8* %1, i64 %2)
%5 = add i64 %2, -1
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i8* %0
}
int unregister_chrdev(unsigned int i, const char *c) { return 0; }


x86 assembly (clang, -O0):
<unregister_chrdev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_chrdev>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @unregister_chrdev(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @unregister_chrdev(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET6;
int /*<<< orphan*/ SOCK_STREAM;
int /*<<< orphan*/ socket(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/);
void test_ipv6tcp() { socket(AF_INET6, SOCK_STREAM, 0); }


x86 assembly (clang, -O0):
<test_ipv6tcp>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <socket@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ipv6tcp>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <socket@plt>

LLVM IR (-O0):
@AF_INET6 = global i32 0
@SOCK_STREAM = global i32 0
define void @test_ipv6tcp() {
%1 = load i32, i32* @AF_INET6
%2 = load i32, i32* @SOCK_STREAM
%3 = call i32 @socket(i32 %1, i32 %2, i32 0)
ret void
}

LLVM IR (-O2):
@AF_INET6 = global i32 0
@SOCK_STREAM = global i32 0
define void @test_ipv6tcp() {
%1 = load i32, i32* @AF_INET6
%2 = load i32, i32* @SOCK_STREAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
ret void
}
/* Variables and functions */
scalar_t__ drv_CF_poll();
int /*<<< orphan*/ drv_CF_process_packet();
void drv_CF_timer(void __attribute__((unused)) * notused) {
  while (drv_CF_poll()) {
    drv_CF_process_packet();
  }
}


x86 assembly (clang, -O0):
<drv_CF_timer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <drv_CF_poll@plt>
cmp    $0x0,%rax
je     1149 <drv_CF_timer+0x29>
mov    $0x0,%al
call   1040 <drv_CF_process_packet@plt>
jmp    112c <drv_CF_timer+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_CF_timer>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <drv_CF_poll@plt>
test   %rax,%rax
je     1145 <drv_CF_timer+0x25>
xor    %eax,%eax
call   1040 <drv_CF_process_packet@plt>
jmp    1130 <drv_CF_timer+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @drv_CF_timer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %6, %1
%4 = call i64 (...) @drv_CF_poll()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = call i32 (...) @drv_CF_process_packet()
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @drv_CF_timer(i8* nocapture readnone %0) {
%2 = tail call i64 (...) @drv_CF_poll()
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 (...) @drv_CF_process_packet()
%6 = tail call i64 (...) @drv_CF_poll()
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %4
8: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
unsigned int le32put(void *p, uint32_t v) {
  uint8_t *a;
  a = p;
  a[0] = v;
  a[1] = v >> 8;
  a[2] = v >> 16;
  a[3] = v >> 24;
  return 4;
}


x86 assembly (clang, -O0):
<le32put>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<le32put>:
mov    %esi,(%rdi)
mov    %esi,%eax
sar    $0x8,%eax
mov    %eax,0x4(%rdi)
mov    %esi,%eax
sar    $0x10,%eax
mov    %eax,0x8(%rdi)
sar    $0x18,%esi
mov    %esi,0xc(%rdi)
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @le32put(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 0
store i32 %8, i32* %10
%11 = load i32, i32* %4
%12 = ashr i32 %11, 8
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %12, i32* %14
%15 = load i32, i32* %4
%16 = ashr i32 %15, 16
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i64 2
store i32 %16, i32* %18
%19 = load i32, i32* %4
%20 = ashr i32 %19, 24
%21 = load i32*, i32** %5
%22 = getelementptr inbounds i32, i32* %21, i64 3
store i32 %20, i32* %22
ret i32 4
}

LLVM IR (-O2):
define i32 @le32put(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
%4 = ashr i32 %1, 8
%5 = getelementptr inbounds i8, i8* %0, i64 4
%6 = bitcast i8* %5 to i32*
store i32 %4, i32* %6
%7 = ashr i32 %1, 16
%8 = getelementptr inbounds i8, i8* %0, i64 8
%9 = bitcast i8* %8 to i32*
store i32 %7, i32* %9
%10 = ashr i32 %1, 24
%11 = getelementptr inbounds i8, i8* %0, i64 12
%12 = bitcast i8* %11 to i32*
store i32 %10, i32* %12
ret i32 4
}
/* Variables and functions */
unsigned int processorClockFrequency();
unsigned int peripheralClockFrequency(void) {
  unsigned int divider;
  switch ((*(volatile unsigned long *)(0xE01FC000 + 0x100)) & 3) {
  case 0:
    divider = 4;
    break;
  case 1:
    divider = 1;
    break;
  case 2:
    divider = 2;
    break;
  }
  return processorClockFrequency() / divider;
}


x86 assembly (clang, -O0):
<peripheralClockFrequency>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xe01fc100,%eax
mov    (%rax),%rax
and    $0x3,%rax
mov    %rax,-0x10(%rbp)
je     1159 <peripheralClockFrequency+0x49>
jmp    1133 <peripheralClockFrequency+0x23>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
je     1165 <peripheralClockFrequency+0x55>
jmp    1146 <peripheralClockFrequency+0x36>
mov    -0x10(%rbp),%rax
sub    $0x2,%rax
je     1171 <peripheralClockFrequency+0x61>
jmp    1178 <peripheralClockFrequency+0x68>
movl   $0x4,-0x4(%rbp)
jmp    1178 <peripheralClockFrequency+0x68>
movl   $0x1,-0x4(%rbp)
jmp    1178 <peripheralClockFrequency+0x68>
movl   $0x2,-0x4(%rbp)
mov    $0x0,%al
call   1030 <processorClockFrequency@plt>
xor    %edx,%edx
divl   -0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<peripheralClockFrequency>:
push   %rbx
mov    $0xe01fc100,%eax
mov    (%rax),%rbx
and    $0x3,%ebx
xor    %eax,%eax
call   1030 <processorClockFrequency@plt>
mov    %eax,%ecx
shr    %ecx
mov    %eax,%edx
shr    $0x2,%edx
cmp    $0x1,%rbx
cmovne %edx,%eax
cmp    $0x2,%rbx
cmove  %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @peripheralClockFrequency() {
%1 = alloca i32
%2 = load volatile i64, i64* inttoptr (i64 3760177408 to i64*)
%3 = and i64 %2, 3
switch i64 %3, label %7 [
i64 0, label %4
i64 1, label %5
i64 2, label %6
]
4: ; preds = %0
store i32 4, i32* %1
br label %7
5: ; preds = %0
store i32 1, i32* %1
br label %7
6: ; preds = %0
store i32 2, i32* %1
br label %7
7: ; preds = %0, %6, %5, %4
%8 = call i32 (...) @processorClockFrequency()
%9 = load i32, i32* %1
%10 = udiv i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @peripheralClockFrequency() {
%1 = load volatile i64, i64* inttoptr (i64 3760177408 to i64*)
%2 = and i64 %1, 3
%3 = icmp eq i64 %2, 1
%4 = icmp eq i64 %2, 2
%5 = tail call i32 (...) @processorClockFrequency()
%6 = lshr i32 %5, 1
%7 = lshr i32 %5, 2
%8 = select i1 %3, i32 %5, i32 %7
%9 = select i1 %4, i32 %6, i32 %8
ret i32 %9
}
/* Variables and functions */
void clock_init(void) {}


x86 assembly (clang, -O0):
<clock_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_init>:
ret

LLVM IR (-O0):
define void @clock_init() {
ret void
}

LLVM IR (-O2):
define void @clock_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOTSUP;
int /*<<< orphan*/ errno;
int __utmpxname(const char *f) {
  errno = ENOTSUP;
  return -1;
}


x86 assembly (clang, -O0):
<__utmpxname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__utmpxname>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOTSUP = global i32 0
@errno = global i32 0
define i32 @__utmpxname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @ENOTSUP
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOTSUP = global i32 0
@errno = global i32 0
define i32 @__utmpxname(i8* nocapture readnone %0) {
%2 = load i32, i32* @ENOTSUP
store i32 %2, i32* @errno
ret i32 -1
}
/* Variables and functions */
int __infer_nondet_int();
int isgraph(int x) { return __infer_nondet_int(); }


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @__infer_nondet_int()
ret i32 %3
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ TimerInterrupt_1ms();
void TIM2_IRQHandler(void) { TimerInterrupt_1ms(); }


x86 assembly (clang, -O0):
<TIM2_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TimerInterrupt_1ms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM2_IRQHandler>:
xor    %eax,%eax
jmp    1030 <TimerInterrupt_1ms@plt>

LLVM IR (-O0):
define void @TIM2_IRQHandler() {
%1 = call i32 (...) @TimerInterrupt_1ms()
ret void
}

LLVM IR (-O2):
define void @TIM2_IRQHandler() {
%1 = tail call i32 (...) @TimerInterrupt_1ms()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void success() { printf("The process ended successfully. \n"); }


x86 assembly (clang, -O0):
<success>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<success>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"The process ended successfully. \0A\00"
define void @success() {
%1 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [33 x i8] c"The process ended successfully. \00"
define void @success() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool nrf51_errata_7(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_7>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_7>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_7() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_7() {
ret i32 0
}
void free(void *ptr __attribute__((unused))) {}


x86 assembly (clang, -O0):
<free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free>:
ret

LLVM IR (-O0):
define void @free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @free(i8* nocapture %0) {
ret void
}
void gdk_region_rectangle() {}


x86 assembly (clang, -O0):
<gdk_region_rectangle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_region_rectangle>:
ret

LLVM IR (-O0):
define void @gdk_region_rectangle() {
ret void
}

LLVM IR (-O2):
define void @gdk_region_rectangle() {
ret void
}
void swap2int(int *val1, int *val2) {
  *val1 = (*val1) ^ (*val2);
  *val2 = (*val1) ^ (*val2);
  *val1 = (*val1) ^ (*val2);
}


x86 assembly (clang, -O0):
<swap2int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap2int>:
mov    (%rsi),%eax
xor    (%rdi),%eax
mov    %eax,(%rdi)
xor    (%rsi),%eax
mov    %eax,(%rsi)
xor    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @swap2int(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = xor i32 %6, %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32*, i32** %3
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = xor i32 %12, %14
%16 = load i32*, i32** %4
store i32 %15, i32* %16
%17 = load i32*, i32** %3
%18 = load i32, i32* %17
%19 = load i32*, i32** %4
%20 = load i32, i32* %19
%21 = xor i32 %18, %20
%22 = load i32*, i32** %3
store i32 %21, i32* %22
ret void
}

LLVM IR (-O2):
define void @swap2int(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = xor i32 %4, %3
store i32 %5, i32* %0
%6 = load i32, i32* %1
%7 = xor i32 %6, %5
store i32 %7, i32* %1
%8 = load i32, i32* %0
%9 = xor i32 %8, %7
store i32 %9, i32* %0
ret void
}
/* Variables and functions */
int quotactl_fd(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/,
                void *);
int main(void) { return quotactl_fd(0, 0, 0, (void *)0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edx,%edx
xor    %eax,%eax
mov    %eax,%ecx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <quotactl_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <quotactl_fd@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @quotactl_fd(i32 0, i32 0, i32 0, i8* null)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @quotactl_fd(i32 0, i32 0, i32 0, i8* null)
ret i32 %1
}
/* Variables and functions */
void fwrite(void) {}


x86 assembly (clang, -O0):
<fwrite>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwrite>:
ret

LLVM IR (-O0):
define void @fwrite() {
ret void
}

LLVM IR (-O2):
define void @fwrite() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_NONBLOCK;
int diminuto_ipc_set_status(int, int, int /*<<< orphan*/);
int diminuto_ipc_set_nonblocking(int fd, int enable) {
  return diminuto_ipc_set_status(fd, enable, O_NONBLOCK);
}


x86 assembly (clang, -O0):
<diminuto_ipc_set_nonblocking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    0x2ebd(%rip),%rax
mov    (%rax),%edx
call   1030 <diminuto_ipc_set_status@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipc_set_nonblocking>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
jmp    1030 <diminuto_ipc_set_status@plt>

LLVM IR (-O0):
@O_NONBLOCK = global i32 0
define i32 @diminuto_ipc_set_nonblocking(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* @O_NONBLOCK
%8 = call i32 @diminuto_ipc_set_status(i32 %5, i32 %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@O_NONBLOCK = global i32 0
define i32 @diminuto_ipc_set_nonblocking(i32 %0, i32 %1) {
%3 = load i32, i32* @O_NONBLOCK
%4 = tail call i32 @diminuto_ipc_set_status(i32 %0, i32 %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndexedXE0(int);
int /*<<< orphan*/ STY8(int /*<<< orphan*/);
void Op94E0X1(void) { STY8(DirectIndexedXE0(2)); }


x86 assembly (clang, -O0):
<Op94E0X1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <DirectIndexedXE0@plt>
mov    %eax,%edi
call   1040 <STY8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op94E0X1>:
push   %rax
mov    $0x2,%edi
call   1030 <DirectIndexedXE0@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <STY8@plt>

LLVM IR (-O0):
define void @Op94E0X1() {
%1 = call i32 @DirectIndexedXE0(i32 2)
%2 = call i32 @STY8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op94E0X1() {
%1 = tail call i32 @DirectIndexedXE0(i32 2)
%2 = tail call i32 @STY8(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Delay_us(int);
void dynamic_delay_10us(unsigned char delay) {
  for (; delay > 0; delay -= 1)
    Delay_us(10);
}


x86 assembly (clang, -O0):
<dynamic_delay_10us>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x0,%eax
jle    1144 <dynamic_delay_10us+0x34>
mov    $0xa,%edi
call   1030 <Delay_us@plt>
movzbl -0x1(%rbp),%eax
sub    $0x1,%eax
mov    %al,-0x1(%rbp)
jmp    111e <dynamic_delay_10us+0xe>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dynamic_delay_10us>:
push   %rbx
test   %edi,%edi
je     112f <dynamic_delay_10us+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0xa,%edi
call   1030 <Delay_us@plt>
add    $0xff,%bl
jne    1120 <dynamic_delay_10us+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @dynamic_delay_10us(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %9, %1
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = call i32 @Delay_us(i32 10)
br label %9
9: ; preds = %7
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = sub nsw i32 %11, 1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @dynamic_delay_10us(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i8 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 @Delay_us(i32 10)
%6 = add i8 %4, -1
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
void lapic_enable(void) {}


x86 assembly (clang, -O0):
<lapic_enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lapic_enable>:
ret

LLVM IR (-O0):
define void @lapic_enable() {
ret void
}

LLVM IR (-O2):
define void @lapic_enable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ stdout;
int main(int argc, char const *argv[]) {
  while (1) {
    printf(":) ");
    fflush(stdout);
    sleep(1);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e87(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
jmp    1146 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xec5(%rip),%r14
mov    0x2e9e(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %r14,%rdi
call   1030 <printf@plt>
mov    (%rbx),%edi
call   1040 <fflush@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
jmp    1150 <main+0x20>

LLVM IR (-O0):
@.str = [4 x i8] c":) \00"
@stdout = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %2, %6
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @stdout
%9 = call i32 @fflush(i32 %8)
%10 = call i32 @sleep(i32 1)
br label %6
}

LLVM IR (-O2):
@.str = [4 x i8] c":) \00"
@stdout = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stdout
%6 = tail call i32 @fflush(i32 %5)
%7 = tail call i32 @sleep(i32 1)
br label %3
}
/* Type definitions */
struct address_space {
  int dummy;
};

/* Variables and functions */
unsigned long invalidate_mapping_pages(struct address_space *,
                                       int /*<<< orphan*/, unsigned long);
__attribute__((always_)) unsigned long __attribute__((deprecated))
invalidate_inode_pages(struct address_space *mapping) {
  return invalidate_mapping_pages(mapping, 0, ~0UL);
}


x86 assembly (clang, -O0):
<invalidate_inode_pages>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0xffffffffffffffff,%rdx
call   1030 <invalidate_mapping_pages@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalidate_inode_pages>:
xor    %esi,%esi
mov    $0xffffffffffffffff,%rdx
jmp    1030 <invalidate_mapping_pages@plt>

LLVM IR (-O0):
%struct.address_space = type { i32 }
define i64 @invalidate_inode_pages(%struct.address_space* %0) {
%2 = alloca %struct.address_space*
store %struct.address_space* %0, %struct.address_space** %2
%3 = load %struct.address_space*, %struct.address_space** %2
%4 = call i64 @invalidate_mapping_pages(%struct.address_space* %3, i32 0, i64 -1)
ret i64 %4
}

LLVM IR (-O2):
%struct.address_space = type { i32 }
define i64 @invalidate_inode_pages(%struct.address_space* %0) {
%2 = tail call i64 @invalidate_mapping_pages(%struct.address_space* %0, i32 0, i64 -1)
ret i64 %2
}
char fat_type(int num) {
  if (num < 4085) {
    return 1;
  } else {
    if (num < 65525)
      return 2;
    else
      return 3;
  }
  return 0;
}


x86 assembly (clang, -O0):
<fat_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xff5,-0x8(%rbp)
jge    111d <fat_type+0x1d>
movb   $0x1,-0x1(%rbp)
jmp    1137 <fat_type+0x37>
cmpl   $0xfff5,-0x8(%rbp)
jge    1133 <fat_type+0x33>
movb   $0x2,-0x1(%rbp)
jmp    1137 <fat_type+0x37>
movb   $0x3,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat_type>:
cmp    $0xfff5,%edi
setl   %al
xor    $0x3,%al
cmp    $0xff5,%edi
movzbl %al,%ecx
mov    $0x1,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @fat_type(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 4085
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 1, i8* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 65525
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 2, i8* %2
br label %12
11: ; preds = %7
store i8 3, i8* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i8, i8* %2
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @fat_type(i32 %0) {
%2 = icmp slt i32 %0, 4085
%3 = icmp slt i32 %0, 65525
%4 = select i1 %3, i8 2, i8 3
%5 = select i1 %2, i8 1, i8 %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x4f() {
  Assert_real((isspace(79) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              400, ("isspace should be 0 for O"));
}


x86 assembly (clang, -O0):
<t_isspace_0x4f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4f,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x190,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x4f>:
push   %rax
mov    $0x4f,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x190,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for O\00"
define void @t_isspace_0x4f() {
%1 = call i64 @isspace(i32 79)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 400, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for O\00"
define void @t_isspace_0x4f() {
%1 = tail call i64 @isspace(i32 79)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 400, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
size_t min_size(size_t x, size_t y) { return x < y ? x : y; }


x86 assembly (clang, -O0):
<min_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1127 <min_size+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min_size+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_size>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovb  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min_size(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min_size(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
char *eStrdup(char const *const);
char *stringCopy(const char *const string) {
  char *result = NULL;
  if (string != NULL)
    result = eStrdup(string);
  return result;
}


x86 assembly (clang, -O0):
<stringCopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113c <stringCopy+0x2c>
mov    -0x8(%rbp),%rdi
call   1030 <eStrdup@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringCopy>:
test   %rdi,%rdi
je     111a <stringCopy+0xa>
jmp    1030 <eStrdup@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @stringCopy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i8* @eStrdup(i8* %7)
store i8* %8, i8** %3
br label %9
9: ; preds = %6, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define i8* @stringCopy(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @eStrdup(i8* %0)
br label %5
5: ; preds = %3, %1
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
__attribute__((no, noclone)) int f7(signed char x, signed char y) {
  int a = x;
  int b = y;
  int c = a + b;
  return c & -4;
}


x86 assembly (clang, -O0):
<f7>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
movsbl -0x2(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0xfffffffc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7>:
lea    (%rdi,%rsi,1),%eax
and    $0xfffffffc,%eax
ret

LLVM IR (-O0):
define i32 @f7(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
store i32 %9, i32* %5
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = and i32 %15, -4
ret i32 %16
}

LLVM IR (-O2):
define i32 @f7(i8 signext %0, i8 signext %1) {
%3 = sext i8 %0 to i32
%4 = sext i8 %1 to i32
%5 = add nsw i32 %4, %3
%6 = and i32 %5, -4
ret i32 %6
}