xunge/DecIR huggingface dataset:
int popcnt(unsigned long val) {
  int i = 0, cnt = 0;
  while (val >> i) {
    if ((1UL << i) & val)
      cnt++;
    i++;
  }
  return cnt;
}


x86 assembly (clang, -O0):
<popcnt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shr    %cl,%rax
cmp    $0x0,%rax
je     115c <popcnt+0x5c>
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
and    -0x8(%rbp),%rax
cmp    $0x0,%rax
je     114e <popcnt+0x4e>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <popcnt+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcnt>:
test   %rdi,%rdi
je     1127 <popcnt+0x27>
xor    %ecx,%ecx
xor    %eax,%eax
nopl   0x0(%rax)
bt     %rcx,%rdi
adc    $0x0,%eax
add    $0x1,%rcx
mov    %rdi,%rdx
shr    %cl,%rdx
test   %rdx,%rdx
jne    1110 <popcnt+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @popcnt(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %21, %1
%6 = load i64, i64* %2
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = lshr i64 %6, %8
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %5
%12 = load i32, i32* %3
%13 = zext i32 %12 to i64
%14 = shl i64 1, %13
%15 = load i64, i64* %2
%16 = and i64 %14, %15
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %11
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %21
21: ; preds = %18, %11
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %5
24: ; preds = %5
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @popcnt(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %11, %3 ], [ 0, %1 ]
%5 = phi i32 [ %10, %3 ], [ 0, %1 ]
%6 = shl nuw i64 1, %4
%7 = and i64 %6, %0
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
%10 = add nuw nsw i32 %5, %9
%11 = add nuw nsw i64 %4, 1
%12 = lshr i64 %0, %11
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %3
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %10, %3 ]
ret i32 %15
}
/* Variables and functions */
double cos(double);
double geom_dV_sph_tpr(double xm[], double xp[]) {
  return (cos(xm[0]) - cos(xp[0])) * (xp[1] - xm[1]);
}


x86 assembly (clang, -O0):
<geom_dV_sph_tpr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <cos@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <cos@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    -0x8(%rbp),%rax
subsd  0x8(%rax),%xmm1
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<geom_dV_sph_tpr>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
movsd  (%rdi),%xmm0
call   1030 <cos@plt>
movsd  %xmm0,(%rsp)
movsd  (%rbx),%xmm0
call   1030 <cos@plt>
movsd  (%rsp),%xmm1
subsd  %xmm0,%xmm1
movsd  0x8(%rbx),%xmm0
subsd  0x8(%r14),%xmm0
mulsd  %xmm1,%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define double @geom_dV_sph_tpr(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = call double @cos(double %7)
%9 = load double*, double** %4
%10 = getelementptr inbounds double, double* %9, i64 0
%11 = load double, double* %10
%12 = call double @cos(double %11)
%13 = fsub double %8, %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = load double*, double** %3
%18 = getelementptr inbounds double, double* %17, i64 1
%19 = load double, double* %18
%20 = fsub double %16, %19
%21 = fmul double %13, %20
ret double %21
}

LLVM IR (-O2):
define double @geom_dV_sph_tpr(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = tail call double @cos(double %3)
%5 = load double, double* %1
%6 = tail call double @cos(double %5)
%7 = fsub double %4, %6
%8 = getelementptr inbounds double, double* %1, i64 1
%9 = load double, double* %8
%10 = getelementptr inbounds double, double* %0, i64 1
%11 = load double, double* %10
%12 = fsub double %9, %11
%13 = fmul double %7, %12
ret double %13
}
/* Variables and functions */
int pnmwriter_maxval(void *, unsigned int);
bool got_maxval(unsigned int maxval, void *userdata) {
  return pnmwriter_maxval(userdata, maxval);
}


x86 assembly (clang, -O0):
<got_maxval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1030 <pnmwriter_maxval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<got_maxval>:
mov    %edi,%eax
mov    %rsi,%rdi
mov    %eax,%esi
jmp    1030 <pnmwriter_maxval@plt>

LLVM IR (-O0):
define i32 @got_maxval(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @pnmwriter_maxval(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @got_maxval(i32 %0, i8* %1) {
%3 = tail call i32 @pnmwriter_maxval(i8* %1, i32 %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ init_srtos();
int main(void) { init_srtos(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_srtos@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <init_srtos@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @init_srtos()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init_srtos()
ret i32 0
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll13(struct __test_metadata *);
void wrapper_epoll13(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll13(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll13>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll13@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll13>:
jmp    1030 <epoll13@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll13(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll13(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll13(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll13(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char const *);
int eq(const char *a, const char *b) { return strcmp(a, b) == 0; }


x86 assembly (clang, -O0):
<eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eq>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @eq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @eq(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ svc_timer_ms();
int /*<<< orphan*/ usbPoll();
void usbSleep(uint32_t millis) {
  uint32_t start = svc_timer_ms();
  while ((svc_timer_ms() - start) < millis) {
    usbPoll();
  }
}


x86 assembly (clang, -O0):
<usbSleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <svc_timer_ms@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <svc_timer_ms@plt>
sub    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    1158 <usbSleep+0x38>
mov    $0x0,%al
call   1030 <usbPoll@plt>
jmp    1137 <usbSleep+0x17>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usbSleep>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <svc_timer_ms@plt>
mov    %rax,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <svc_timer_ms@plt>
sub    %rbx,%rax
cmp    %r14,%rax
jge    1158 <usbSleep+0x38>
xor    %eax,%eax
call   1030 <usbPoll@plt>
jmp    1140 <usbSleep+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @usbSleep(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = call i64 (...) @svc_timer_ms()
store i64 %4, i64* %3
br label %5
5: ; preds = %11, %1
%6 = call i64 (...) @svc_timer_ms()
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = load i64, i64* %2
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %5
%12 = call i32 (...) @usbPoll()
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @usbSleep(i64 %0) {
%2 = tail call i64 (...) @svc_timer_ms()
%3 = tail call i64 (...) @svc_timer_ms()
%4 = sub nsw i64 %3, %2
%5 = icmp slt i64 %4, %0
br i1 %5, label %6, label %11
6: ; preds = %1, %6
%7 = tail call i32 (...) @usbPoll()
%8 = tail call i64 (...) @svc_timer_ms()
%9 = sub nsw i64 %8, %2
%10 = icmp slt i64 %9, %0
br i1 %10, label %6, label %11
11: ; preds = %6, %1
ret void
}
/* Variables and functions */
scalar_t__ isnan(float);
__attribute__((__visibility__("hidden"))) float __math_invalidf(float x) {
  float y = (x - x) / (x - x);
  return isnan(x) ? y : (y);
}


x86 assembly (clang, -O0):
<__math_invalidf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
subss  -0x4(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
je     115d <__math_invalidf+0x4d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1167 <__math_invalidf+0x57>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__math_invalidf>:
push   %rax
movaps %xmm0,%xmm1
subss  %xmm0,%xmm1
divss  %xmm1,%xmm1
movss  %xmm1,0x4(%rsp)
call   1030 <isnan@plt>
movss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define hidden float @__math_invalidf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = load float, float* %2
%6 = fsub float %4, %5
%7 = load float, float* %2
%8 = load float, float* %2
%9 = fsub float %7, %8
%10 = fdiv float %6, %9
store float %10, float* %3
%11 = load float, float* %2
%12 = call i64 @isnan(float %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = load float, float* %3
br label %18
16: ; preds = %1
%17 = load float, float* %3
br label %18
18: ; preds = %16, %14
%19 = phi float [ %15, %14 ], [ %17, %16 ]
ret float %19
}

LLVM IR (-O2):
define hidden float @__math_invalidf(float %0) {
%2 = fsub float %0, %0
%3 = fdiv float %2, %2
%4 = tail call i64 @isnan(float %0)
ret float %3
}
void main(void) {
  char x = 10;
  const char *a = &x;
  char const *b = &x;
  char *const c = &x;
  const char *const d = &x;
  a = &x;
  b = &x;
  *c = 70;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movb   $0xa,-0x1(%rbp)
lea    -0x1(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x1(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x1(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x1(%rbp),%rax
mov    %rax,-0x28(%rbp)
lea    -0x1(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x1(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
movb   $0x46,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i8
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8 10, i8* %1
store i8* %1, i8** %2
store i8* %1, i8** %3
store i8* %1, i8** %4
store i8* %1, i8** %5
store i8* %1, i8** %2
store i8* %1, i8** %3
%6 = load i8*, i8** %4
store i8 70, i8* %6
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
int fork();
int fork1(void) {
  int pid;
  pid = fork();
  if (pid == -1)
    die("fork");
  return pid;
}


x86 assembly (clang, -O0):
<fork1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <fork@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    1148 <fork1+0x28>
lea    0xebd(%rip),%rdi
call   1030 <die@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork1>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    113b <fork1+0x1b>
lea    0xeca(%rip),%rdi
call   1030 <die@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fork\00"
define i32 @fork1() {
%1 = alloca i32
%2 = call i32 (...) @fork()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @die(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [5 x i8] c"fork\00"
define i32 @fork1() {
%1 = tail call i32 (...) @fork()
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @die(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 %1
}
int CaseDown(int dKey) {
  if ((dKey >= 'A') && (dKey <= 'Z')) {
    return dKey - 'A' + 'a';
  }
  return dKey;
}


x86 assembly (clang, -O0):
<CaseDown>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     112c <CaseDown+0x2c>
cmpl   $0x5a,-0x8(%rbp)
jg     112c <CaseDown+0x2c>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    1132 <CaseDown+0x32>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CaseDown>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @CaseDown(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 65
%12 = add nsw i32 %11, 97
store i32 %12, i32* %2
br label %15
13: ; preds = %6, %1
%14 = load i32, i32* %3
store i32 %14, i32* %2
br label %15
15: ; preds = %13, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @CaseDown(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Type definitions */
struct msghdr {
  int dummy;
};
typedef scalar_t__ ssize_t;

/* Variables and functions */
int errno;
scalar_t__ recvmsg(int, struct msghdr *, int);
ssize_t __sulong_posix_recvmsg(int socket, struct msghdr *message, int flags) {
  {
    int native_errno = errno;
    ssize_t result = recvmsg(socket, message, flags);
    if (result == (ssize_t)-1) {
      result = (ssize_t)(long)-errno;
    }
    errno = native_errno;
    return result;
  };
}


x86 assembly (clang, -O0):
<__sulong_posix_recvmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb7(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <recvmsg@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
jne    115d <__sulong_posix_recvmsg+0x4d>
xor    %eax,%eax
mov    0x2e8b(%rip),%rcx
sub    (%rcx),%eax
cltq
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%ecx
mov    0x2e79(%rip),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sulong_posix_recvmsg>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <recvmsg@plt>
movslq (%rbx),%rcx
neg    %rcx
cmp    $0xffffffffffffffff,%rax
cmove  %rcx,%rax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.msghdr = type { i32 }
@errno = global i32 0
define i64 @__sulong_posix_recvmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msghdr*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i32 %0, i32* %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
%9 = load i32, i32* @errno
store i32 %9, i32* %7
%10 = load i32, i32* %4
%11 = load %struct.msghdr*, %struct.msghdr** %5
%12 = load i32, i32* %6
%13 = call i64 @recvmsg(i32 %10, %struct.msghdr* %11, i32 %12)
store i64 %13, i64* %8
%14 = load i64, i64* %8
%15 = icmp eq i64 %14, -1
br i1 %15, label %16, label %20
16: ; preds = %3
%17 = load i32, i32* @errno
%18 = sub nsw i32 0, %17
%19 = sext i32 %18 to i64
store i64 %19, i64* %8
br label %20
20: ; preds = %16, %3
%21 = load i32, i32* %7
store i32 %21, i32* @errno
%22 = load i64, i64* %8
ret i64 %22
}

LLVM IR (-O2):
%struct.msghdr = type { i32 }
@errno = global i32 0
define i64 @__sulong_posix_recvmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = load i32, i32* @errno
%5 = tail call i64 @recvmsg(i32 %0, %struct.msghdr* %1, i32 %2)
%6 = icmp eq i64 %5, -1
%7 = load i32, i32* @errno
%8 = sub nsw i32 0, %7
%9 = sext i32 %8 to i64
%10 = select i1 %6, i64 %9, i64 %5
store i32 %4, i32* @errno
ret i64 %10
}
void atomic_lwfence() { __asm__ __volatile__("" ::: "memory"); }


x86 assembly (clang, -O0):
<atomic_lwfence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_lwfence>:
ret

LLVM IR (-O0):
define void @atomic_lwfence() {
ret void
}

LLVM IR (-O2):
define void @atomic_lwfence() {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
void foo707() {}


x86 assembly (clang, -O0):
<foo707>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo707>:
ret

LLVM IR (-O0):
define void @foo707() {
ret void
}

LLVM IR (-O2):
define void @foo707() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ embedded_ltoa(char *, long, int, int /*<<< orphan*/,
                                 int /*<<< orphan*/, int /*<<< orphan*/, char);
unsigned int embedded_prints(char *, int /*<<< orphan*/, int /*<<< orphan*/);
unsigned int print_hexa(long number) {
  char buffer[36];
  embedded_ltoa(buffer, number, 16, 0, 0, 0, 'a');
  return embedded_prints(buffer, 0, 0);
}


x86 assembly (clang, -O0):
<print_hexa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x10,%edx
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
movl   $0x61,(%rsp)
call   1030 <embedded_ltoa@plt>
lea    -0x30(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1040 <embedded_prints@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hexa>:
push   %rbx
sub    $0x40,%rsp
mov    %rdi,%rsi
movl   $0x61,(%rsp)
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x10,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <embedded_ltoa@plt>
mov    %rbx,%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <embedded_prints@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @print_hexa(i64 %0) {
%2 = alloca i64
%3 = alloca [36 x i8]
store i64 %0, i64* %2
%4 = getelementptr inbounds [36 x i8], [36 x i8]* %3, i64 0, i64 0
%5 = load i64, i64* %2
%6 = call i32 @embedded_ltoa(i8* %4, i64 %5, i32 16, i32 0, i32 0, i32 0, i8 signext 97)
%7 = getelementptr inbounds [36 x i8], [36 x i8]* %3, i64 0, i64 0
%8 = call i32 @embedded_prints(i8* %7, i32 0, i32 0)
ret i32 %8
}

LLVM IR (-O2):
define i32 @print_hexa(i64 %0) {
%2 = alloca [36 x i8]
%3 = getelementptr inbounds [36 x i8], [36 x i8]* %2, i64 0, i64 0
%4 = call i32 @embedded_ltoa(i8* %3, i64 %0, i32 16, i32 0, i32 0, i32 0, i8 signext 97)
%5 = call i32 @embedded_prints(i8* %3, i32 0, i32 0)
ret i32 %5
}
/* Variables and functions */
scalar_t__ usart_busy();
int /*<<< orphan*/ usart_putc(unsigned char);
void usart_wait_and_write(unsigned char dat) {
  while (usart_busy())
    ;
  usart_putc(dat);
}


x86 assembly (clang, -O0):
<usart_wait_and_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <usart_busy@plt>
cmp    $0x0,%rax
je     1144 <usart_wait_and_write+0x24>
jmp    112e <usart_wait_and_write+0xe>
movzbl -0x1(%rbp),%edi
call   1040 <usart_putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usart_wait_and_write>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <usart_busy@plt>
test   %rax,%rax
jne    1130 <usart_wait_and_write+0x10>
movzbl %bl,%edi
pop    %rbx
jmp    1040 <usart_putc@plt>

LLVM IR (-O0):
define void @usart_wait_and_write(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %6, %1
%4 = call i64 (...) @usart_busy()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %3
br label %3
7: ; preds = %3
%8 = load i8, i8* %2
%9 = call i32 @usart_putc(i8 zeroext %8)
ret void
}

LLVM IR (-O2):
define void @usart_wait_and_write(i8 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i64 (...) @usart_busy()
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %2
5: ; preds = %2
%6 = tail call i32 @usart_putc(i8 zeroext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ audio_ic_set_RecLRbalance();
int /*<<< orphan*/ menu_numeric_toggle(void *, int, int /*<<< orphan*/, int);
void audio_dgain_toggle(void *priv, int delta) {
  menu_numeric_toggle(priv, delta, 0, 15);
  audio_ic_set_RecLRbalance();
}


x86 assembly (clang, -O0):
<audio_dgain_toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
mov    $0xf,%ecx
call   1040 <menu_numeric_toggle@plt>
mov    $0x0,%al
call   1030 <audio_ic_set_RecLRbalance@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<audio_dgain_toggle>:
push   %rax
xor    %edx,%edx
mov    $0xf,%ecx
call   1040 <menu_numeric_toggle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <audio_ic_set_RecLRbalance@plt>

LLVM IR (-O0):
define void @audio_dgain_toggle(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @menu_numeric_toggle(i8* %5, i32 %6, i32 0, i32 15)
%8 = call i32 (...) @audio_ic_set_RecLRbalance()
ret void
}

LLVM IR (-O2):
define void @audio_dgain_toggle(i8* %0, i32 %1) {
%3 = tail call i32 @menu_numeric_toggle(i8* %0, i32 %1, i32 0, i32 15)
%4 = tail call i32 (...) @audio_ic_set_RecLRbalance()
ret void
}
/* Variables and functions */
char *strstr(const char *cs, const char *ct) {
  int d0, d1;
  register char *__res;
  __asm__ __volatile__("movl %6,%%edi\n\t"
                       "repne\n\t"
                       "scasb\n\t"
                       "notl %%ecx\n\t"
                       "decl %%ecx\n\t"
                       "movl %%ecx,%%edx\n"
                       "1:\tmovl %6,%%edi\n\t"
                       "movl %%esi,%%eax\n\t"
                       "movl %%edx,%%ecx\n\t"
                       "repe\n\t"
                       "cmpsb\n\t"
                       "je 2f\n\t"
                       "xchgl %%eax,%%esi\n\t"
                       "incl %%esi\n\t"
                       "cmpb $0,-1(%%eax)\n\t"
                       "jne 1b\n\t"
                       "xorl %%eax,%%eax\n\t"
                       "2:"
                       : "=a"(__res), "=&c"(d0), "=&S"(d1)
                       : "0"(0), "1"(0xffffffff), "2"(cs), "g"(ct)
                       : "dx", "di");
  return __res;
}


x86 assembly (clang, -O0):
<strstr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
xor    %eax,%eax
mov    $0xffffffff,%ecx
mov    -0x28(%rbp),%edi
repnz scas %es:(%rdi),%al
not    %ecx
dec    %ecx
mov    %ecx,%edx
mov    -0x28(%rbp),%edi
mov    %esi,%eax
mov    %edx,%ecx
repz cmpsb %es:(%rdi),%ds:(%rsi)
je     1149 <strstr+0x49>
xchg   %eax,%esi
inc    %esi
cmpb   $0x0,-0x1(%eax)
jne    112a <strstr+0x2a>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %esi,%eax
mov    %eax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i8* @strstr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call { i8*, i32, i8* } asm sideeffect "movl $6,%edi\0A\09repne\0A\09scasb\0A\09notl %ecx\0A\09decl %ecx\0A\09movl %ecx,%edx\0A1:\09movl $6,%edi\0A\09movl %esi,%eax\0A\09movl %edx,%ecx\0A\09repe\0A\09cmpsb\0A\09je 2f\0A\09xchgl %eax,%esi\0A\09incl %esi\0A\09cmpb $$0,-1(%eax)\0A\09jne 1b\0A\09xorl %eax,%eax\0A\092:", "={ax},=&{cx},=&{si},0,1,2,imr,~{dx},~{di},~{dirflag},~{fpsr},~{flags}"(i64 0, i32 -1, i8* %8, i8* %9)
%11 = extractvalue { i8*, i32, i8* } %10, 0
%12 = extractvalue { i8*, i32, i8* } %10, 1
%13 = extractvalue { i8*, i32, i8* } %10, 2
store i8* %11, i8** %7
store i32 %12, i32* %5
%14 = ptrtoint i8* %13 to i64
%15 = trunc i64 %14 to i32
store i32 %15, i32* %6
%16 = load i8*, i8** %7
ret i8* %16
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ memmove(int *, int *, int const);
extern void remove_element(int *a, const int a_cnt, const int at) {
  memmove(&(a[at]), &(a[at + 1]), (a_cnt - (at + 1)) * sizeof(int));
  return;
}


x86 assembly (clang, -O0):
<remove_element>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x2,%rax
add    %rax,%rsi
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
sub    %ecx,%eax
cltq
shl    $0x2,%rax
mov    %eax,%edx
call   1030 <memmove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_element>:
movslq %edx,%rdx
lea    (%rdi,%rdx,4),%rax
lea    (%rdi,%rdx,4),%rcx
add    $0x4,%rcx
sub    %edx,%esi
lea    -0x4(,%rsi,4),%edx
mov    %rax,%rdi
mov    %rcx,%rsi
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @remove_element(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
%11 = load i32*, i32** %4
%12 = load i32, i32* %6
%13 = add nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %11, i64 %14
%16 = load i32, i32* %5
%17 = load i32, i32* %6
%18 = add nsw i32 %17, 1
%19 = sub nsw i32 %16, %18
%20 = sext i32 %19 to i64
%21 = mul i64 %20, 4
%22 = trunc i64 %21 to i32
%23 = call i32 @memmove(i32* %10, i32* %15, i32 %22)
ret void
}

LLVM IR (-O2):
define void @remove_element(i32* %0, i32 %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = add nsw i32 %2, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = sub nsw i32 %1, %6
%10 = shl i32 %9, 2
%11 = tail call i32 @memmove(i32* %5, i32* %8, i32 %10)
ret void
}
/* Variables and functions */
int strcasecmp(char const *, char const *);
int ILLutil_strcasecmp(const char *s1, const char *s2) {
  return strcasecmp(s1, s2);
}


x86 assembly (clang, -O0):
<ILLutil_strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ILLutil_strcasecmp>:
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @ILLutil_strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ILLutil_strcasecmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ lua_newtag();
int /*<<< orphan*/ lua_pushnumber(int /*<<< orphan*/);
void newtag(void) { lua_pushnumber(lua_newtag()); }


x86 assembly (clang, -O0):
<newtag>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <lua_newtag@plt>
mov    %eax,%edi
call   1030 <lua_pushnumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<newtag>:
push   %rax
xor    %eax,%eax
call   1040 <lua_newtag@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <lua_pushnumber@plt>

LLVM IR (-O0):
define void @newtag() {
%1 = call i32 (...) @lua_newtag()
%2 = call i32 @lua_pushnumber(i32 %1)
ret void
}

LLVM IR (-O2):
define void @newtag() {
%1 = tail call i32 (...) @lua_newtag()
%2 = tail call i32 @lua_pushnumber(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ HMAC_CTX;

/* Variables and functions */
int /*<<< orphan*/ HMAC_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ OPENSSL_free(int /*<<< orphan*/ *);
void tnt_HMAC_CTX_free(HMAC_CTX *ctx) {
  HMAC_cleanup(ctx);
  OPENSSL_free(ctx);
}


x86 assembly (clang, -O0):
<tnt_HMAC_CTX_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <HMAC_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1040 <OPENSSL_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tnt_HMAC_CTX_free>:
push   %rbx
mov    %rdi,%rbx
call   1030 <HMAC_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <OPENSSL_free@plt>

LLVM IR (-O0):
define void @tnt_HMAC_CTX_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @HMAC_cleanup(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @OPENSSL_free(i32* %5)
ret void
}

LLVM IR (-O2):
define void @tnt_HMAC_CTX_free(i32* %0) {
%2 = tail call i32 @HMAC_cleanup(i32* %0)
%3 = tail call i32 @OPENSSL_free(i32* %0)
ret void
}
void PORT6_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PORT6_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PORT6_IRQHandler+0x9>
jmp    1109 <PORT6_IRQHandler+0x9>

x86 assembly (clang, -O2):
<PORT6_IRQHandler>:
jmp    1100 <PORT6_IRQHandler>

LLVM IR (-O0):
define void @PORT6_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PORT6_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ same_screen;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
int get_XCrossingEvent_same_screen(void *_p) {
  return (int)((XCrossingEvent *)_p)->same_screen;
}


x86 assembly (clang, -O0):
<get_XCrossingEvent_same_screen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCrossingEvent_same_screen>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XCrossingEvent_same_screen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XCrossingEvent_same_screen(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
unsigned int TXT_DecodeUTF8(char const **);
unsigned int TXT_UTF8_Strlen(const char *s) {
  const char *p;
  unsigned int result = 0;
  unsigned int c;
  for (p = s; *p != '\0';) {
    c = TXT_DecodeUTF8(&p);
    if (c == 0) {
      break;
    }
    ++result;
  }
  return result;
}


x86 assembly (clang, -O0):
<TXT_UTF8_Strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1164 <TXT_UTF8_Strlen+0x54>
lea    -0x10(%rbp),%rdi
call   1030 <TXT_DecodeUTF8@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1156 <TXT_UTF8_Strlen+0x46>
jmp    1164 <TXT_UTF8_Strlen+0x54>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112b <TXT_UTF8_Strlen+0x1b>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TXT_UTF8_Strlen>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,(%rsp)
cmpb   $0x0,(%rdi)
je     114a <TXT_UTF8_Strlen+0x3a>
xor    %ebx,%ebx
mov    %rsp,%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %r14,%rdi
call   1030 <TXT_DecodeUTF8@plt>
test   %eax,%eax
je     114c <TXT_UTF8_Strlen+0x3c>
add    $0x1,%ebx
mov    (%rsp),%rax
cmpb   $0x0,(%rax)
jne    1130 <TXT_UTF8_Strlen+0x20>
jmp    114c <TXT_UTF8_Strlen+0x3c>
xor    %ebx,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @TXT_UTF8_Strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
%6 = load i8*, i8** %2
store i8* %6, i8** %3
br label %7
7: ; preds = %17, %1
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %7
%13 = call i32 @TXT_DecodeUTF8(i8** %3)
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %12
br label %20
17: ; preds = %12
%18 = load i32, i32* %4
%19 = add i32 %18, 1
store i32 %19, i32* %4
br label %7
20: ; preds = %16, %7
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @TXT_UTF8_Strlen(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
store i8* %0, i8** %2
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %1, %10
%7 = phi i32 [ %11, %10 ], [ 0, %1 ]
%8 = call i32 @TXT_DecodeUTF8(i8** %2)
%9 = icmp eq i32 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = add i32 %7, 1
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %10, %6, %1
%16 = phi i32 [ 0, %1 ], [ %7, %6 ], [ %11, %10 ]
ret i32 %16
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int INT_MIN;
int32_t __hsail_rem_s32(int32_t dividend, int32_t divisor) {
  if (dividend == INT_MIN && divisor == -1)
    return 0;
  else
    return dividend % divisor;
}


x86 assembly (clang, -O0):
<__hsail_rem_s32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2ed4(%rip),%rcx
cmp    (%rcx),%eax
jne    1132 <__hsail_rem_s32+0x32>
cmpl   $0xffffffff,-0xc(%rbp)
jne    1132 <__hsail_rem_s32+0x32>
movl   $0x0,-0x4(%rbp)
jmp    113c <__hsail_rem_s32+0x3c>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hsail_rem_s32>:
cmp    $0xffffffff,%esi
jne    1113 <__hsail_rem_s32+0x13>
mov    0x2edc(%rip),%rcx
xor    %eax,%eax
cmp    %edi,(%rcx)
jne    1113 <__hsail_rem_s32+0x13>
ret
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @__hsail_rem_s32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* @INT_MIN
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %3
br label %17
13: ; preds = %9, %2
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = srem i32 %14, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %13, %12
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @__hsail_rem_s32(i32 %0, i32 %1) {
%3 = load i32, i32* @INT_MIN
%4 = icmp eq i32 %3, %0
%5 = icmp eq i32 %1, -1
%6 = and i1 %5, %4
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = srem i32 %0, %1
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ %8, %7 ], [ 0, %2 ]
ret i32 %10
}
/* Type definitions */
struct speed_limit {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct speed_limit *);
void freeSpeed_limit(struct speed_limit *sl) { free(sl); }


x86 assembly (clang, -O0):
<freeSpeed_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeSpeed_limit>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.speed_limit = type { i32 }
define void @freeSpeed_limit(%struct.speed_limit* %0) {
%2 = alloca %struct.speed_limit*
store %struct.speed_limit* %0, %struct.speed_limit** %2
%3 = load %struct.speed_limit*, %struct.speed_limit** %2
%4 = call i32 @free(%struct.speed_limit* %3)
ret void
}

LLVM IR (-O2):
%struct.speed_limit = type { i32 }
define void @freeSpeed_limit(%struct.speed_limit* nocapture %0) {
%2 = tail call i32 @free(%struct.speed_limit* %0)
ret void
}
cbuf28(f, n) { return (cbuf(f, n, 28)); }


x86 assembly (clang, -O0):
<cbuf28>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1c,%edx
mov    $0x0,%al
call   1030 <cbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf28>:
mov    $0x1c,%edx
xor    %eax,%eax
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf28(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %5, i32 %6, i32 28)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cbuf28(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %1, i32 28)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ is_valid_const(char const *);
const char *strip_zeroes(const char *a) {
  assert(a != NULL);
  assert(is_valid_const(a));
  while (*a == '0')
    a++;
  return a;
}


x86 assembly (clang, -O0):
<strip_zeroes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <is_valid_const@plt>
mov    %eax,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x30,%eax
jne    116f <strip_zeroes+0x4f>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    114e <strip_zeroes+0x2e>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strip_zeroes>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1030 <is_valid_const@plt>
mov    %eax,%edi
call   1040 <assert@plt>
add    $0xffffffffffffffff,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
cmpb   $0x30,0x1(%rbx)
lea    0x1(%rbx),%rbx
je     1150 <strip_zeroes+0x30>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @strip_zeroes(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load i8*, i8** %2
%8 = call i32 @is_valid_const(i8* %7)
%9 = call i32 @assert(i32 %8)
br label %10
10: ; preds = %15, %1
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 48
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %10
18: ; preds = %10
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @strip_zeroes(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @is_valid_const(i8* %0)
%6 = tail call i32 @assert(i32 %5)
br label %7
7: ; preds = %7, %1
%8 = phi i8* [ %0, %1 ], [ %11, %7 ]
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 48
%11 = getelementptr inbounds i8, i8* %8, i64 1
br i1 %10, label %7, label %12
12: ; preds = %7
ret i8* %8
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ send(int, void *, size_t, int /*<<< orphan*/);
ssize_t mywrite_swift_code(int fd, void *buf, size_t len) {
  return send(fd, buf, len, 0);
}


x86 assembly (clang, -O0):
<mywrite_swift_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywrite_swift_code>:
xor    %ecx,%ecx
jmp    1030 <send@plt>

LLVM IR (-O0):
define i32 @mywrite_swift_code(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @send(i32 %7, i8* %8, i64 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @mywrite_swift_code(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @send(i32 %0, i8* %1, i64 %2, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int const);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void error(const char *msg, const int exit_code) {
  fprintf(stderr, "erreur : %s\n", msg);
  exit(exit_code);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xebd(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0xc(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rdx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [13 x i8] c"erreur : %s\0A\00"
define void @error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* %4
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [13 x i8] c"erreur : %s\0A\00"
define void @error(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = tail call i32 @exit(i32 %1)
unreachable
}
void enable_interrupts() { __asm__ volatile("sti"); }


x86 assembly (clang, -O0):
<enable_interrupts>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_interrupts>:
sti
ret

LLVM IR (-O0):
define void @enable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @enable_interrupts() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void szl_ffi_obj_del(void *priv) { free(priv); }


x86 assembly (clang, -O0):
<szl_ffi_obj_del>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<szl_ffi_obj_del>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @szl_ffi_obj_del(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @szl_ffi_obj_del(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int;
typedef int /*<<< orphan*/ bool_t;
typedef int /*<<< orphan*/ XDR;

/* Variables and functions */
int /*<<< orphan*/ FALSE;
bool_t x_setpostn(XDR *xdrs, u_int pos) { return (FALSE); }


x86 assembly (clang, -O0):
<x_setpostn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_setpostn>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@FALSE = global i32 0
define i32 @x_setpostn(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* @FALSE
ret i32 %5
}

LLVM IR (-O2):
@FALSE = global i32 0
define i32 @x_setpostn(i32* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @FALSE
ret i32 %3
}
/* Variables and functions */
int sort(int *, int /*<<< orphan*/, int);
int count_opt(int array[], int size) { return sort(array, 0, size - 1); }


x86 assembly (clang, -O0):
<count_opt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <sort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_opt>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <sort@plt>

LLVM IR (-O0):
define i32 @count_opt(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @sort(i32* %5, i32 0, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @count_opt(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @sort(i32* %0, i32 0, i32 %3)
ret i32 %4
}
int test_imm_C2int8_mem(signed char *val) {
  return ((*val) & (0xC2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C2int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xc2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C2int8_mem>:
testb  $0xc2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C2int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 194
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C2int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -62
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}