xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef int uint16_t;

/* Variables and functions */
void USBHostPwrFaultEnable(uint32_t ui32Base) {
  ;
  (*((volatile uint16_t *)(ui32Base + 0x00000400))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<USBHostPwrFaultEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x400(%rax),%ecx
or     $0x10,%ecx
mov    %ecx,0x400(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostPwrFaultEnable>:
orl    $0x10,0x400(%rdi)
ret

LLVM IR (-O0):
define void @USBHostPwrFaultEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1024
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, 16
store volatile i32 %7, i32* %5
ret void
}

LLVM IR (-O2):
define void @USBHostPwrFaultEnable(i64 %0) {
%2 = add nsw i64 %0, 1024
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
%5 = or i32 %4, 16
store volatile i32 %5, i32* %3
ret void
}
int f(int a, int b, int c) {
  a -= (short)b * (c >> 16);
  return a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
movswl %ax,%ecx
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
imul   %eax,%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
movswl %si,%ecx
sar    $0x10,%edx
imul   %ecx,%edx
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = trunc i32 %7 to i16
%9 = sext i16 %8 to i32
%10 = load i32, i32* %6
%11 = ashr i32 %10, 16
%12 = mul nsw i32 %9, %11
%13 = load i32, i32* %4
%14 = sub nsw i32 %13, %12
store i32 %14, i32* %4
%15 = load i32, i32* %4
ret i32 %15
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 16
%5 = ashr exact i32 %4, 16
%6 = ashr i32 %2, 16
%7 = mul nsw i32 %5, %6
%8 = sub nsw i32 %0, %7
ret i32 %8
}
/* Variables and functions */
int read(int, unsigned short *, int);
int read_uint2_array(int f, unsigned short *iarray, int n) {
  int nread = read(f, iarray, n * 2);
  if (nread <= 0)
    return 0;
  return nread / 2;
}


x86 assembly (clang, -O0):
<read_uint2_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
shl    $0x1,%edx
call   1030 <read@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jg     114d <read_uint2_array+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    115b <read_uint2_array+0x4b>
mov    -0x18(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_uint2_array>:
push   %rax
add    %edx,%edx
call   1030 <read@plt>
test   %eax,%eax
jle    1127 <read_uint2_array+0x17>
mov    %eax,%ecx
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @read_uint2_array(i32 %0, i16* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i16*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i16* %1, i16** %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i16*, i16** %6
%11 = load i32, i32* %7
%12 = mul nsw i32 %11, 2
%13 = call i32 @read(i32 %9, i16* %10, i32 %12)
store i32 %13, i32* %8
%14 = load i32, i32* %8
%15 = icmp sle i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %3
store i32 0, i32* %4
br label %20
17: ; preds = %3
%18 = load i32, i32* %8
%19 = sdiv i32 %18, 2
store i32 %19, i32* %4
br label %20
20: ; preds = %17, %16
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @read_uint2_array(i32 %0, i16* nocapture %1, i32 %2) {
%4 = shl nsw i32 %2, 1
%5 = tail call i32 @read(i32 %0, i16* %1, i32 %4)
%6 = sdiv i32 %5, 2
%7 = icmp sgt i32 %5, 0
%8 = select i1 %7, i32 %6, i32 0
ret i32 %8
}
__int128_t quad_fetch_and_acquire(__int128_t *ptr, __int128_t value) {
  return __atomic_fetch_and(ptr, value, 2);
}


x86 assembly (clang, -O0):
<quad_fetch_and_acquire>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rdi,-0x28(%rbp)
mov    %rcx,-0x38(%rbp)
mov    %rax,-0x40(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x68(%rbp)
mov    %rax,-0x70(%rbp)
mov    -0x70(%rbp),%rsi
mov    -0x68(%rbp),%rdx
mov    $0x2,%ecx
call   1030 <__atomic_fetch_and_16@plt>
mov    %rax,-0x80(%rbp)
mov    %rdx,-0x78(%rbp)
mov    -0x80(%rbp),%rax
mov    -0x78(%rbp),%rcx
mov    %rcx,-0x58(%rbp)
mov    %rax,-0x60(%rbp)
mov    -0x60(%rbp),%rax
mov    -0x58(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quad_fetch_and_acquire>:
mov    $0x2,%ecx
jmp    1030 <__atomic_fetch_and_16@plt>

LLVM IR (-O0):
define { i64, i64 } @quad_fetch_and_acquire(i128* %0, i64 %1, i64 %2) {
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128*
%7 = alloca i128
%8 = alloca i128
%9 = alloca i128
%10 = alloca i128
%11 = alloca i128
%12 = bitcast i128* %5 to { i64, i64 }*
%13 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 0
store i64 %1, i64* %13
%14 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 1
store i64 %2, i64* %14
%15 = load i128, i128* %5
store i128* %0, i128** %6
store i128 %15, i128* %7
%16 = load i128*, i128** %6
%17 = load i128, i128* %7
store i128 %17, i128* %8
%18 = bitcast i128* %16 to i8*
%19 = load i128, i128* %8
store i128 %19, i128* %10
%20 = bitcast i128* %10 to { i64, i64 }*
%21 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 0
%22 = load i64, i64* %21
%23 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 1
%24 = load i64, i64* %23
%25 = call { i64, i64 } @__atomic_fetch_and_16(i8* %18, i64 %22, i64 %24, i32 2)
%26 = bitcast i128* %11 to { i64, i64 }*
%27 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 0
%28 = extractvalue { i64, i64 } %25, 0
store i64 %28, i64* %27
%29 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 1
%30 = extractvalue { i64, i64 } %25, 1
store i64 %30, i64* %29
%31 = load i128, i128* %11
store i128 %31, i128* %9
%32 = load i128, i128* %9
store i128 %32, i128* %4
%33 = bitcast i128* %4 to { i64, i64 }*
%34 = load { i64, i64 }, { i64, i64 }* %33
ret { i64, i64 } %34
}

LLVM IR (-O2):
define { i64, i64 } @quad_fetch_and_acquire(i128* %0, i64 %1, i64 %2) {
%4 = bitcast i128* %0 to i8*
%5 = tail call { i64, i64 } @__atomic_fetch_and_16(i8* %4, i64 %1, i64 %2, i32 2)
ret { i64, i64 } %5
}
void DH_free(void) {}


x86 assembly (clang, -O0):
<DH_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DH_free>:
ret

LLVM IR (-O0):
define void @DH_free() {
ret void
}

LLVM IR (-O2):
define void @DH_free() {
ret void
}
/* Variables and functions */
char *xstrdup(char *);
char *sndio_get_mixer_channel_name() { return xstrdup("moc"); }


x86 assembly (clang, -O0):
<sndio_get_mixer_channel_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <xstrdup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sndio_get_mixer_channel_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <xstrdup@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"moc\00"
define i8* @sndio_get_mixer_channel_name() {
%1 = call i8* @xstrdup(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [4 x i8] c"moc\00"
define i8* @sndio_get_mixer_channel_name() {
%1 = tail call i8* @xstrdup(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
const char *dlerror(void) { return "lol, no libdl on the PS3!"; }


x86 assembly (clang, -O0):
<dlerror>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlerror>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [26 x i8] c"lol, no libdl on the PS3!\00"
define i8* @dlerror() {
ret i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [26 x i8] c"lol, no libdl on the PS3!\00"
define i8* @dlerror() {
ret i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0)
}
void unit_cost_function() {}


x86 assembly (clang, -O0):
<unit_cost_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unit_cost_function>:
ret

LLVM IR (-O0):
define void @unit_cost_function() {
ret void
}

LLVM IR (-O2):
define void @unit_cost_function() {
ret void
}
void foo537() {}


x86 assembly (clang, -O0):
<foo537>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo537>:
ret

LLVM IR (-O0):
define void @foo537() {
ret void
}

LLVM IR (-O2):
define void @foo537() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i387_fxsave_to_cache(void const *);
void x86_64_store_fpregset(const void *buf) { i387_fxsave_to_cache(buf); }


x86 assembly (clang, -O0):
<x86_64_store_fpregset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <i387_fxsave_to_cache@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86_64_store_fpregset>:
jmp    1030 <i387_fxsave_to_cache@plt>

LLVM IR (-O0):
define void @x86_64_store_fpregset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @i387_fxsave_to_cache(i8* %3)
ret void
}

LLVM IR (-O2):
define void @x86_64_store_fpregset(i8* %0) {
%2 = tail call i32 @i387_fxsave_to_cache(i8* %0)
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int htonl(int);
uint64_t htonll(uint64_t ll) {
  uint64_t res;
  if (htonl(1) == 1)
    return ll;
  res = htonl(ll >> 32);
  res |= (uint64_t)(htonl((uint32_t)ll)) << 32;
  return res;
}


x86 assembly (clang, -O0):
<htonll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <htonl@plt>
cmp    $0x1,%eax
jne    1139 <htonll+0x29>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <htonll+0x56>
mov    -0x8(%rbp),%edi
mov    $0x20,%ecx
sar    %cl,%edi
call   1030 <htonl@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <htonl@plt>
mov    $0x20,%ecx
shl    %cl,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htonll>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
call   1030 <htonl@plt>
cmp    $0x1,%eax
je     112e <htonll+0x1e>
call   1030 <htonl@plt>
mov    %ebx,%edi
call   1030 <htonl@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @htonll(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = call i32 @htonl(i32 1)
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* %3
store i32 %8, i32* %2
br label %19
9: ; preds = %1
%10 = load i32, i32* %3
%11 = ashr i32 %10, 32
%12 = call i32 @htonl(i32 %11)
store i32 %12, i32* %4
%13 = load i32, i32* %3
%14 = call i32 @htonl(i32 %13)
%15 = shl i32 %14, 32
%16 = load i32, i32* %4
%17 = or i32 %16, %15
store i32 %17, i32* %4
%18 = load i32, i32* %4
store i32 %18, i32* %2
br label %19
19: ; preds = %9, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @htonll(i32 returned %0) {
%2 = tail call i32 @htonl(i32 1)
%3 = icmp eq i32 %2, 1
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @htonl(i32 poison)
%6 = tail call i32 @htonl(i32 %0)
br label %7
7: ; preds = %1, %4
ret i32 %0
}
/* Variables and functions */
unsigned char I2CAL_input_data();
int /*<<< orphan*/ I2CAL_output_clock(int);
int /*<<< orphan*/ I2CAL_output_data(int);
int /*<<< orphan*/ I2CAL_set_data_for_input();
int /*<<< orphan*/ I2CAL_set_data_for_output();
unsigned char ReceiveI2CAck(void) {
  unsigned char bit;
  I2CAL_set_data_for_input();
  I2CAL_output_data(1);
  I2CAL_output_clock(1);
  bit = I2CAL_input_data();
  I2CAL_output_clock(0);
  I2CAL_set_data_for_output();
  return !bit;
}


x86 assembly (clang, -O0):
<ReceiveI2CAck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <I2CAL_set_data_for_input@plt>
mov    $0x1,%edi
call   1030 <I2CAL_output_data@plt>
mov    $0x1,%edi
call   1050 <I2CAL_output_clock@plt>
mov    $0x0,%al
call   1070 <I2CAL_input_data@plt>
mov    %al,-0x1(%rbp)
xor    %edi,%edi
call   1050 <I2CAL_output_clock@plt>
mov    $0x0,%al
call   1040 <I2CAL_set_data_for_output@plt>
cmpb   $0x0,-0x1(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReceiveI2CAck>:
push   %rbx
xor    %eax,%eax
call   1060 <I2CAL_set_data_for_input@plt>
mov    $0x1,%edi
call   1030 <I2CAL_output_data@plt>
mov    $0x1,%edi
call   1050 <I2CAL_output_clock@plt>
xor    %eax,%eax
call   1070 <I2CAL_input_data@plt>
mov    %eax,%ebx
xor    %edi,%edi
call   1050 <I2CAL_output_clock@plt>
xor    %eax,%eax
call   1040 <I2CAL_set_data_for_output@plt>
test   %bl,%bl
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @ReceiveI2CAck() {
%1 = alloca i8
%2 = call i32 (...) @I2CAL_set_data_for_input()
%3 = call i32 @I2CAL_output_data(i32 1)
%4 = call i32 @I2CAL_output_clock(i32 1)
%5 = call zeroext i8 (...) @I2CAL_input_data()
store i8 %5, i8* %1
%6 = call i32 @I2CAL_output_clock(i32 0)
%7 = call i32 (...) @I2CAL_set_data_for_output()
%8 = load i8, i8* %1
%9 = icmp ne i8 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
%12 = trunc i32 %11 to i8
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @ReceiveI2CAck() {
%1 = tail call i32 (...) @I2CAL_set_data_for_input()
%2 = tail call i32 @I2CAL_output_data(i32 1)
%3 = tail call i32 @I2CAL_output_clock(i32 1)
%4 = tail call zeroext i8 (...) @I2CAL_input_data()
%5 = tail call i32 @I2CAL_output_clock(i32 0)
%6 = tail call i32 (...) @I2CAL_set_data_for_output()
%7 = icmp eq i8 %4, 0
%8 = zext i1 %7 to i8
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ cyield();
void cut_hair(void) {
  cyield();
  cyield();
  cyield();
  cyield();
  return;
}


x86 assembly (clang, -O0):
<cut_hair>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cyield@plt>
mov    $0x0,%al
call   1030 <cyield@plt>
mov    $0x0,%al
call   1030 <cyield@plt>
mov    $0x0,%al
call   1030 <cyield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cut_hair>:
push   %rax
xor    %eax,%eax
call   1030 <cyield@plt>
xor    %eax,%eax
call   1030 <cyield@plt>
xor    %eax,%eax
call   1030 <cyield@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <cyield@plt>

LLVM IR (-O0):
define void @cut_hair() {
%1 = call i32 (...) @cyield()
%2 = call i32 (...) @cyield()
%3 = call i32 (...) @cyield()
%4 = call i32 (...) @cyield()
ret void
}

LLVM IR (-O2):
define void @cut_hair() {
%1 = tail call i32 (...) @cyield()
%2 = tail call i32 (...) @cyield()
%3 = tail call i32 (...) @cyield()
%4 = tail call i32 (...) @cyield()
ret void
}
int test_imm_8Buint16_reg(unsigned short val) {
  return ((val) & (-0x8B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Buint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff75,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Buint16_reg>:
test   $0xff75,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Buint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -139
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Buint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -139
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
double __ocml_acosh_f64(double);
double acosh(double x) { return __ocml_acosh_f64(x); }


x86 assembly (clang, -O0):
<acosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_acosh_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acosh>:
jmp    1030 <__ocml_acosh_f64@plt>

LLVM IR (-O0):
define double @acosh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ocml_acosh_f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @acosh(double %0) {
%2 = tail call double @__ocml_acosh_f64(double %0)
ret double %2
}
char ToUppercase(char C) {
  if ('a' <= C && C <= 'z') {
    C = (C - 'a') + 'A';
  }
  return C;
}


x86 assembly (clang, -O0):
<ToUppercase>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1135 <ToUppercase+0x35>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     1135 <ToUppercase+0x35>
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ToUppercase>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @ToUppercase(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 97, %4
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 97
%14 = add nsw i32 %13, 65
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %16
16: ; preds = %10, %6, %1
%17 = load i8, i8* %2
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @ToUppercase(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t max(uint32_t x, uint32_t y) { return x > y ? x : y; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <max+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <max+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @max(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @max(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
extern void wg_free(void *mem) {
  if (mem) {
    free(mem);
  }
}


x86 assembly (clang, -O0):
<wg_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <wg_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wg_free>:
test   %rdi,%rdi
je     111a <wg_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @wg_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @wg_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
double f(double x) { return x * x * x + x - 6; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xed3(%rip),%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
addsd  %xmm1,%xmm0
addsd  0xee8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = load double, double* %2
%7 = load double, double* %2
%8 = call double @llvm.fmuladd.f64(double %5, double %6, double %7)
%9 = fsub double %8, 6.000000e+00
ret double %9
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = fmul double %0, %0
%3 = tail call double @llvm.fmuladd.f64(double %2, double %0, double %0)
%4 = fadd double %3, -6.000000e+00
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ ba();
int /*<<< orphan*/ compword(char *);
void iif() {
  compword("0bra");
  ba();
}


x86 assembly (clang, -O0):
<iif>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <compword@plt>
mov    $0x0,%al
call   1040 <ba@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iif>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <compword@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <ba@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"0bra\00"
define void @iif() {
%1 = call i32 @compword(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @ba()
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"0bra\00"
define void @iif() {
%1 = tail call i32 @compword(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @ba()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ double_bad();
int /*<<< orphan*/ loop_bad();
int main() {
  loop_bad();
  double_bad();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <loop_bad@plt>
mov    $0x0,%al
call   1030 <double_bad@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <loop_bad@plt>
xor    %eax,%eax
call   1030 <double_bad@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @loop_bad()
%2 = call i32 (...) @double_bad()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @loop_bad()
%2 = tail call i32 (...) @double_bad()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ brc(int /*<<< orphan*/, char);
void da(void) { brc(0, 'c'); }


x86 assembly (clang, -O0):
<da>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x63,%esi
call   1030 <brc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<da>:
xor    %edi,%edi
mov    $0x63,%esi
jmp    1030 <brc@plt>

LLVM IR (-O0):
define void @da() {
%1 = call i32 @brc(i32 0, i8 signext 99)
ret void
}

LLVM IR (-O2):
define void @da() {
%1 = tail call i32 @brc(i32 0, i8 signext 99)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ puts(char const *);
int main(void) {
  const char *hello = "Greetings from your Laptop!";
  char byebye[] = "So long now!";
  char *b;
  b = byebye;
  puts(hello);
  puts(b);
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xedb(%rip),%rax
mov    %rax,-0x1d(%rbp)
mov    0xed9(%rip),%eax
mov    %eax,-0x15(%rbp)
mov    0xed4(%rip),%al
mov    %al,-0x11(%rbp)
lea    -0x1d(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <puts@plt>
mov    -0x28(%rbp),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0x21776f6e20676e,%rax
mov    %rax,0xd(%rsp)
movabs $0x20676e6f6c206f53,%rax
6e 67 20
mov    %rax,0x8(%rsp)
lea    0xeb7(%rip),%rdi
call   1030 <puts@plt>
lea    0x8(%rsp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Greetings from your Laptop!\00"
@__const.main.byebye = [13 x i8] c"So long now!\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca [13 x i8]
%4 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8** %2
%5 = bitcast [13 x i8]* %3 to i8*
%6 = getelementptr inbounds [13 x i8], [13 x i8]* %3, i64 0, i64 0
store i8* %6, i8** %4
%7 = load i8*, i8** %2
%8 = call i32 @puts(i8* %7)
%9 = load i8*, i8** %4
%10 = call i32 @puts(i8* %9)
%11 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"Greetings from your Laptop!\00"
@__const.main.byebye = [13 x i8] c"So long now!\00"
define i32 @main() {
%1 = alloca [13 x i8]
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @puts(i8* %2)
%5 = tail call i32 (...) @getchar()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_COP8(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_COP8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_COP8>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_COP8() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_COP8() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
void mark(char *array, int start, int step) {
  int i;
  for (i = start; i < 1000000; i += step)
    array[i] = 1;
}


x86 assembly (clang, -O0):
<mark>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0xf4240,-0x14(%rbp)
jge    113b <mark+0x3b>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x1,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1114 <mark+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mark>:
cmp    $0xf423f,%esi
jg     111f <mark+0x1f>
movslq %esi,%rax
movslq %edx,%rcx
xchg   %ax,%ax
movb   $0x1,(%rdi,%rax,1)
add    %rcx,%rax
cmp    $0xf4240,%rax
jl     1110 <mark+0x10>
ret

LLVM IR (-O0):
define void @mark(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
store i32 %8, i32* %7
br label %9
9: ; preds = %17, %3
%10 = load i32, i32* %7
%11 = icmp slt i32 %10, 1000000
br i1 %11, label %12, label %21
12: ; preds = %9
%13 = load i8*, i8** %4
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 1, i8* %16
br label %17
17: ; preds = %12
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = add nsw i32 %19, %18
store i32 %20, i32* %7
br label %9
21: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @mark(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 1000000
br i1 %4, label %5, label %13
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = sext i32 %2 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ %6, %5 ], [ %11, %8 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %9
store i8 1, i8* %10
%11 = add i64 %9, %7
%12 = icmp slt i64 %11, 1000000
br i1 %12, label %8, label %13
13: ; preds = %8, %3
ret void
}
int hexval(int c) {
  if ('0' <= c && c <= '9')
    return c - '0';
  if ('A' <= c && c <= 'F')
    return 10 - 'A' + c;
  if ('a' <= c && c <= 'f')
    return 10 - 'a' + c;
  return 0;
}


x86 assembly (clang, -O0):
<hexval>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    $0x30,%eax
cmp    -0x8(%rbp),%eax
jg     112d <hexval+0x2d>
cmpl   $0x39,-0x8(%rbp)
jg     112d <hexval+0x2d>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1184 <hexval+0x84>
mov    $0x41,%eax
cmp    -0x8(%rbp),%eax
jg     1155 <hexval+0x55>
cmpl   $0x46,-0x8(%rbp)
jg     1155 <hexval+0x55>
mov    -0x8(%rbp),%eax
add    $0xffffffc9,%eax
mov    %eax,-0x4(%rbp)
jmp    1184 <hexval+0x84>
mov    $0x61,%eax
cmp    -0x8(%rbp),%eax
jg     117d <hexval+0x7d>
cmpl   $0x66,-0x8(%rbp)
jg     117d <hexval+0x7d>
mov    -0x8(%rbp),%eax
add    $0xffffffa9,%eax
mov    %eax,-0x4(%rbp)
jmp    1184 <hexval+0x84>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexval>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
jb     1124 <hexval+0x24>
lea    -0x41(%rdi),%eax
cmp    $0x5,%eax
ja     1116 <hexval+0x16>
add    $0xffffffc9,%edi
mov    %edi,%eax
ret
lea    -0x61(%rdi),%ecx
add    $0xffffffa9,%edi
xor    %eax,%eax
cmp    $0x6,%ecx
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @hexval(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 48, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 48
store i32 %11, i32* %2
br label %31
12: ; preds = %6, %1
%13 = load i32, i32* %3
%14 = icmp sle i32 65, %13
br i1 %14, label %15, label %21
15: ; preds = %12
%16 = load i32, i32* %3
%17 = icmp sle i32 %16, 70
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i32, i32* %3
%20 = add nsw i32 -55, %19
store i32 %20, i32* %2
br label %31
21: ; preds = %15, %12
%22 = load i32, i32* %3
%23 = icmp sle i32 97, %22
br i1 %23, label %24, label %30
24: ; preds = %21
%25 = load i32, i32* %3
%26 = icmp sle i32 %25, 102
br i1 %26, label %27, label %30
27: ; preds = %24
%28 = load i32, i32* %3
%29 = add nsw i32 -87, %28
store i32 %29, i32* %2
br label %31
30: ; preds = %24, %21
store i32 0, i32* %2
br label %31
31: ; preds = %30, %27, %18, %9
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @hexval(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = add i32 %0, -65
%6 = icmp ult i32 %5, 6
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = add nsw i32 %0, -55
br label %14
9: ; preds = %4
%10 = add i32 %0, -97
%11 = icmp ult i32 %10, 6
%12 = add nsw i32 %0, -87
%13 = select i1 %11, i32 %12, i32 0
br label %14
14: ; preds = %1, %9, %7
%15 = phi i32 [ %8, %7 ], [ %13, %9 ], [ %2, %1 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ die(char *, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
void die_perror(const char *func) { die("%s: %s\n", func, strerror(errno)); }


x86 assembly (clang, -O0):
<die_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
lea    0xeb1(%rip),%rdi
call   1030 <die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<die_perror>:
push   %rbx
mov    %rdi,%rbx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
lea    0xec7(%rip),%rdi
mov    %rbx,%rsi
mov    %eax,%edx
pop    %rbx
jmp    1030 <die@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @die_perror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @errno
%5 = call i32 @strerror(i32 %4)
%6 = call i32 @die(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @die_perror(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @strerror(i32 %2)
%4 = tail call i32 @die(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int);
char *make_sysfs_dev_name(int minor, char *buf, int len) {
  snprintf(buf, len, "ploop%d", minor >> 4);
  return buf;
}


x86 assembly (clang, -O0):
<make_sysfs_dev_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
lea    0xeca(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_sysfs_dev_name>:
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ecx
sar    $0x4,%ecx
lea    0xee0(%rip),%rax
mov    %rsi,%rdi
mov    %edx,%esi
mov    %rax,%rdx
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"ploop%d\00"
define i8* @make_sysfs_dev_name(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = ashr i32 %9, 4
%11 = call i32 @snprintf(i8* %7, i32 %8, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
@.str = [8 x i8] c"ploop%d\00"
define i8* @make_sysfs_dev_name(i32 %0, i8* returned %1, i32 %2) {
%4 = ashr i32 %0, 4
%5 = tail call i32 @snprintf(i8* %1, i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i8* %1
}
void TransformAlarmC__0__Counter__overflow(void) {}


x86 assembly (clang, -O0):
<TransformAlarmC__0__Counter__overflow>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TransformAlarmC__0__Counter__overflow>:
ret

LLVM IR (-O0):
define void @TransformAlarmC__0__Counter__overflow() {
ret void
}

LLVM IR (-O2):
define void @TransformAlarmC__0__Counter__overflow() {
ret void
}
int parOuImpar(int valor, int *quantidade) {
  if (valor % 2 == 0) {
    (*quantidade)++;
    return 1;
  } else
    return 0;
}


x86 assembly (clang, -O0):
<parOuImpar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1136 <parOuImpar+0x36>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    113d <parOuImpar+0x3d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parOuImpar>:
xor    %eax,%eax
test   $0x1,%dil
jne    1110 <parOuImpar+0x10>
addl   $0x1,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @parOuImpar(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
%7 = srem i32 %6, 2
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %10
store i32 1, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %9
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @parOuImpar(i32 %0, i32* nocapture %1) {
%3 = and i32 %0, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* %1
%7 = add nsw i32 %6, 1
store i32 %7, i32* %1
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ 1, %5 ], [ 0, %2 ]
ret i32 %9
}
int down_interruptible(struct semaphore *sem) {
  unsigned int ret;
  return ((int)ret);
}


x86 assembly (clang, -O0):
<down_interruptible>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<down_interruptible>:
ret

LLVM IR (-O0):
%struct.semaphore = type opaque
define i32 @down_interruptible(%struct.semaphore* %0) {
%2 = alloca %struct.semaphore*
%3 = alloca i32
store %struct.semaphore* %0, %struct.semaphore** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.semaphore = type opaque
define i32 @down_interruptible(%struct.semaphore* nocapture readnone %0) {
ret i32 undef
}
void iproc_msi_exit(struct iproc_pcie *pcie) {}


x86 assembly (clang, -O0):
<iproc_msi_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<iproc_msi_exit>:
ret

LLVM IR (-O0):
%struct.iproc_pcie = type opaque
define void @iproc_msi_exit(%struct.iproc_pcie* %0) {
%2 = alloca %struct.iproc_pcie*
store %struct.iproc_pcie* %0, %struct.iproc_pcie** %2
ret void
}

LLVM IR (-O2):
%struct.iproc_pcie = type opaque
define void @iproc_msi_exit(%struct.iproc_pcie* nocapture %0) {
ret void
}
void gtk_text_view_set_tabs() {}


x86 assembly (clang, -O0):
<gtk_text_view_set_tabs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_set_tabs>:
ret

LLVM IR (-O0):
define void @gtk_text_view_set_tabs() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_set_tabs() {
ret void
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void msleep(int ms) {
  struct timespec ts;
  ts.tv_sec = ms / 1000;
  ts.tv_nsec = (ms % 1000) * 1000000;
  nanosleep(&ts, NULL);
}


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
imul   $0xf4240,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
push   %rax
movslq %edi,%rax
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
mov    %ecx,(%rsp)
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
imul   $0xf4240,%eax,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @msleep(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 1000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = load i32, i32* %2
%8 = srem i32 %7, 1000
%9 = mul nsw i32 %8, 1000000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @msleep(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = sdiv i32 %0, 1000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %4, i32* %5
%6 = srem i32 %0, 1000
%7 = mul nsw i32 %6, 1000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nano_disabled_msg();
int do_mark(void) {
  nano_disabled_msg();
  return 1;
}


x86 assembly (clang, -O0):
<do_mark>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nano_disabled_msg@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_mark>:
push   %rax
xor    %eax,%eax
call   1030 <nano_disabled_msg@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @do_mark() {
%1 = call i32 (...) @nano_disabled_msg()
ret i32 1
}

LLVM IR (-O2):
define i32 @do_mark() {
%1 = tail call i32 (...) @nano_disabled_msg()
ret i32 1
}
int test_imm_1Duint16_reg(unsigned short val) {
  return ((val) & (-0x1D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Duint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffffe3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Duint16_reg>:
test   $0xffe3,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Duint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -29
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Duint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -29
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void ls_cost_nm6_decref(void) {}


x86 assembly (clang, -O0):
<ls_cost_nm6_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm6_decref>:
ret

LLVM IR (-O0):
define void @ls_cost_nm6_decref() {
ret void
}

LLVM IR (-O2):
define void @ls_cost_nm6_decref() {
ret void
}
int conditional(int x, int y, int z) {
  int a = (!x) << 31 >> 31;
  return (a & (y ^ z)) ^ y;
}


x86 assembly (clang, -O0):
<conditional>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
shl    $0x1f,%eax
sar    $0x1f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
xor    -0xc(%rbp),%ecx
and    %ecx,%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conditional>:
mov    %esi,%eax
test   %edi,%edi
cmove  %edx,%eax
ret

LLVM IR (-O0):
define i32 @conditional(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
%12 = shl i32 %11, 31
%13 = ashr i32 %12, 31
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = xor i32 %15, %16
%18 = and i32 %14, %17
%19 = load i32, i32* %5
%20 = xor i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @conditional(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i32 %2, i32 %1
ret i32 %5
}
/* Type definitions */
struct slist_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __slist_add(struct slist_node *, struct slist_node *);
void slist_add_after(struct slist_node *node, struct slist_node *new) {
  __slist_add(new, node);
}


x86 assembly (clang, -O0):
<slist_add_after>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <__slist_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slist_add_after>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <__slist_add@plt>

LLVM IR (-O0):
%struct.slist_node = type { i32 }
define void @slist_add_after(%struct.slist_node* %0, %struct.slist_node* %1) {
%3 = alloca %struct.slist_node*
%4 = alloca %struct.slist_node*
store %struct.slist_node* %0, %struct.slist_node** %3
store %struct.slist_node* %1, %struct.slist_node** %4
%5 = load %struct.slist_node*, %struct.slist_node** %4
%6 = load %struct.slist_node*, %struct.slist_node** %3
%7 = call i32 @__slist_add(%struct.slist_node* %5, %struct.slist_node* %6)
ret void
}

LLVM IR (-O2):
%struct.slist_node = type { i32 }
define void @slist_add_after(%struct.slist_node* %0, %struct.slist_node* %1) {
%3 = tail call i32 @__slist_add(%struct.slist_node* %1, %struct.slist_node* %0)
ret void
}
char *strlwr(a)
char *a;
{
  char *ret = a;
  while (*a != '\0') {
    if (isupper(*a))
      *a = tolower(*a);
    ++a;
  }
  return ret;
}


x86 assembly (clang, -O0):
<strlwr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     117e <strlwr+0x5e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1040 <isupper@plt>
cmp    $0x0,%eax
je     116d <strlwr+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1134 <strlwr+0x14>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlwr>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     1165 <strlwr+0x45>
lea    0x1(%r14),%rbx
jmp    114b <strlwr+0x2b>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     1165 <strlwr+0x45>
movsbl %al,%ebp
mov    %ebp,%edi
call   1040 <isupper@plt>
test   %eax,%eax
je     1140 <strlwr+0x20>
mov    %ebp,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
jmp    1140 <strlwr+0x20>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @strlwr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %23, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %26
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = call i32 @isupper(i32 %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %10
%17 = load i8*, i8** %2
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = call i32 @tolower(i32 %19)
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %2
store i8 %21, i8* %22
br label %23
23: ; preds = %16, %10
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %2
br label %5
26: ; preds = %5
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @strlwr(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1, %13
%5 = phi i8 [ %15, %13 ], [ %2, %1 ]
%6 = phi i8* [ %14, %13 ], [ %0, %1 ]
%7 = sext i8 %5 to i32
%8 = tail call i32 @isupper(i32 %7)
%9 = icmp eq i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %4
%11 = tail call i32 @tolower(i32 %7)
%12 = trunc i32 %11 to i8
store i8 %12, i8* %6
br label %13
13: ; preds = %10, %4
%14 = getelementptr inbounds i8, i8* %6, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %4
17: ; preds = %13, %1
ret i8* %0
}