xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t manipsize(size_t sz) {
  const size_t critical_stride = 4096, cacheline = 64, overhead = 32;
  if (sz < (critical_stride / 2))
    return sz;
  if (((sz + overhead) % critical_stride) > (2 * cacheline))
    return sz;
  return sz + 2 * cacheline;
}


x86 assembly (clang, -O0):
<manipsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x1000,-0x18(%rbp)
movq   $0x40,-0x20(%rbp)
movq   $0x20,-0x28(%rbp)
cmpq   $0x800,-0x10(%rbp)
jae    113b <manipsize+0x3b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1170 <manipsize+0x70>
mov    -0x10(%rbp),%rax
add    $0x20,%rax
and    $0xfff,%rax
cmp    $0x80,%rax
jbe    1162 <manipsize+0x62>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1170 <manipsize+0x70>
mov    -0x10(%rbp),%rax
add    $0x80,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<manipsize>:
mov    %rdi,%rax
cmp    $0x800,%rdi
jb     1126 <manipsize+0x26>
lea    0x20(%rax),%ecx
and    $0xfff,%ecx
lea    0x80(%rax),%rdx
cmp    $0x81,%ecx
cmovb  %rdx,%rax
ret

LLVM IR (-O0):
define i64 @manipsize(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 4096, i64* %4
store i64 64, i64* %5
store i64 32, i64* %6
%7 = load i64, i64* %3
%8 = icmp ult i64 %7, 2048
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i64, i64* %3
store i64 %10, i64* %2
br label %21
11: ; preds = %1
%12 = load i64, i64* %3
%13 = add i64 %12, 32
%14 = urem i64 %13, 4096
%15 = icmp ugt i64 %14, 128
br i1 %15, label %16, label %18
16: ; preds = %11
%17 = load i64, i64* %3
store i64 %17, i64* %2
br label %21
18: ; preds = %11
%19 = load i64, i64* %3
%20 = add i64 %19, 128
store i64 %20, i64* %2
br label %21
21: ; preds = %18, %16, %9
%22 = load i64, i64* %2
ret i64 %22
}

LLVM IR (-O2):
define i64 @manipsize(i64 %0) {
%2 = icmp ult i64 %0, 2048
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = add i64 %0, 32
%5 = and i64 %4, 4095
%6 = icmp ugt i64 %5, 128
%7 = add i64 %0, 128
%8 = select i1 %6, i64 %0, i64 %7
br label %9
9: ; preds = %3, %1
%10 = phi i64 [ %0, %1 ], [ %8, %3 ]
ret i64 %10
}
void wait() {
  volatile int i = 0xa000;
  while (i > 0) {
    --i;
  }
}


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
movl   $0xa000,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    $0x0,%eax
jle    1125 <wait+0x25>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <wait+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
movl   $0xa000,-0x4(%rsp)
cmpl   $0x0,-0x4(%rsp)
jle    111c <wait+0x1c>
nop
addl   $0xffffffff,-0x4(%rsp)
cmpl   $0x0,-0x4(%rsp)
jg     1110 <wait+0x10>
ret

LLVM IR (-O0):
define void @wait() {
%1 = alloca i32
store volatile i32 40960, i32* %1
br label %2
2: ; preds = %5, %0
%3 = load volatile i32, i32* %1
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load volatile i32, i32* %1
%7 = add nsw i32 %6, -1
store volatile i32 %7, i32* %1
br label %2
8: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @wait() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 40960, i32* %1
%3 = load volatile i32, i32* %1
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0, %5
%6 = load volatile i32, i32* %1
%7 = add nsw i32 %6, -1
store volatile i32 %7, i32* %1
%8 = load volatile i32, i32* %1
%9 = icmp sgt i32 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %0
ret void
}
/* Variables and functions */
int sscanf(char const *, char const *, void *);
bool _command_get_arg_sscanf(const char *arg_string, const char *format,
                             void *arg_value) {
  return sscanf(arg_string, format, arg_value) == 1;
}


x86 assembly (clang, -O0):
<_command_get_arg_sscanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <sscanf@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_command_get_arg_sscanf>:
push   %rax
call   1030 <sscanf@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_command_get_arg_sscanf(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @sscanf(i8* %7, i8* %8, i8* %9)
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @_command_get_arg_sscanf(i8* nocapture %0, i8* nocapture %1, i8* %2) {
%4 = tail call i32 @sscanf(i8* %0, i8* %1, i8* %2)
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
int index_bld_sstabnum(int tablet_num, int sstab_index) {
  int sstabnum;
  sstabnum = tablet_num;
  sstabnum <<= 16;
  sstabnum |= sstab_index;
  return sstabnum;
}


x86 assembly (clang, -O0):
<index_bld_sstabnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_bld_sstabnum>:
mov    %edi,%eax
shl    $0x10,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @index_bld_sstabnum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = shl i32 %7, 16
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = or i32 %10, %9
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @index_bld_sstabnum(i32 %0, i32 %1) {
%3 = shl i32 %0, 16
%4 = or i32 %3, %1
ret i32 %4
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _copy_balanced_tree(struct node *, struct node **);
struct node *btbalance(struct node *origin_tree) {
  struct node *balanced = NULL;
  _copy_balanced_tree(origin_tree, &balanced);
  return balanced;
}


x86 assembly (clang, -O0):
<btbalance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <_copy_balanced_tree@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btbalance>:
push   %rax
movq   $0x0,(%rsp)
mov    %rsp,%rsi
call   1030 <_copy_balanced_tree@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define %struct.node* @btbalance(%struct.node* %0) {
%2 = alloca %struct.node*
%3 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
store %struct.node* null, %struct.node** %3
%4 = load %struct.node*, %struct.node** %2
%5 = call i32 @_copy_balanced_tree(%struct.node* %4, %struct.node** %3)
%6 = load %struct.node*, %struct.node** %3
ret %struct.node* %6
}

LLVM IR (-O2):
%struct.node = type { i32 }
define %struct.node* @btbalance(%struct.node* %0) {
%2 = alloca %struct.node*
%3 = bitcast %struct.node** %2 to i8*
store %struct.node* null, %struct.node** %2
%4 = call i32 @_copy_balanced_tree(%struct.node* %0, %struct.node** %2)
%5 = load %struct.node*, %struct.node** %2
ret %struct.node* %5
}
double gsl_max(double a, double b) { return ((a) > (b) ? (a) : (b)); }


x86 assembly (clang, -O0):
<gsl_max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112d <gsl_max+0x2d>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <gsl_max+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsl_max>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @gsl_max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @gsl_max(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t isolate_lowest_set(uint32_t x) { return x & -x; }


x86 assembly (clang, -O0):
<isolate_lowest_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isolate_lowest_set>:
mov    %edi,%eax
neg    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @isolate_lowest_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
%6 = and i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @isolate_lowest_set(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = and i32 %2, %0
ret i32 %3
}
void parallel_domain_decomp2(E, GX) struct All_variables *E;
float *GX[4];
{ return; }


x86 assembly (clang, -O0):
<parallel_domain_decomp2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_domain_decomp2>:
ret

LLVM IR (-O0):
%struct.All_variables = type opaque
define void @parallel_domain_decomp2(%struct.All_variables* %0, float** %1) {
%3 = alloca %struct.All_variables*
%4 = alloca float**
store %struct.All_variables* %0, %struct.All_variables** %3
store float** %1, float*** %4
ret void
}

LLVM IR (-O2):
%struct.All_variables = type opaque
define void @parallel_domain_decomp2(%struct.All_variables* nocapture %0, float** nocapture %1) {
ret void
}
/* Variables and functions */
int ENOSYS;
int errno;
int lsetxattr(const char *path, const char *name, void *value, size_t size,
              int flags) {
  return (errno = ENOSYS, -1);
}


x86 assembly (clang, -O0):
<lsetxattr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsetxattr>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @lsetxattr(i8* %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%11 = load i32, i32* @ENOSYS
store i32 %11, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @lsetxattr(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i64 %3, i32 %4) {
%6 = load i32, i32* @ENOSYS
store i32 %6, i32* @errno
ret i32 -1
}
char fn2(void) { return 'B'; }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x42,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
mov    $0x42,%al
ret

LLVM IR (-O0):
define signext i8 @fn2() {
ret i8 66
}

LLVM IR (-O2):
define signext i8 @fn2() {
ret i8 66
}
/* Variables and functions */
int /*<<< orphan*/ is_url(char const *);
int /*<<< orphan*/ usage(char *, char const *);
void getopt_url(const char *optarg, const char **url) {
  if (!is_url(optarg))
    usage("Illegal url '%s'.", optarg);
  *url = optarg;
}


x86 assembly (clang, -O0):
<getopt_url>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <is_url@plt>
cmp    $0x0,%eax
jne    1152 <getopt_url+0x32>
mov    -0x8(%rbp),%rsi
lea    0xeb3(%rip),%rdi
call   1040 <usage@plt>
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getopt_url>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <is_url@plt>
test   %eax,%eax
jne    1142 <getopt_url+0x22>
lea    0xec6(%rip),%rdi
mov    %rbx,%rsi
call   1040 <usage@plt>
mov    %rbx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Illegal url '%s'.\00"
define void @getopt_url(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = call i32 @is_url(i8* %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = call i32 @usage(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %9)
br label %11
11: ; preds = %8, %2
%12 = load i8*, i8** %3
%13 = load i8**, i8*** %4
store i8* %12, i8** %13
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Illegal url '%s'.\00"
define void @getopt_url(i8* %0, i8** nocapture writeonly %1) {
%3 = tail call i32 @is_url(i8* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @usage(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %7
7: ; preds = %5, %2
store i8* %0, i8** %1
ret void
}
RX0AR1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((p0[x0]) <= (p1[1111111 / 4]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<RX0AR1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x28(%rbp),%rcx
cmp    0x10f444(%rcx),%eax
jg     113f <RX0AR1+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <RX0AR1+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RX0AR1>:
movslq %edx,%rax
mov    (%r8,%rax,4),%ecx
xor    %eax,%eax
cmp    0x10f444(%r9),%ecx
setle  %al
ret

LLVM IR (-O0):
define i32 @RX0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %13
%20 = getelementptr inbounds i32, i32* %19, i64 277777
%21 = load i32, i32* %20
%22 = icmp sle i32 %18, %21
br i1 %22, label %23, label %24
23: ; preds = %6
store i32 1, i32* %7
br label %25
24: ; preds = %6
store i32 0, i32* %7
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %7
ret i32 %26
}

LLVM IR (-O2):
define i32 @RX0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %4, i64 %7
%9 = load i32, i32* %8
%10 = getelementptr inbounds i32, i32* %5, i64 277777
%11 = load i32, i32* %10
%12 = icmp sle i32 %9, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
float flt_min2(float a, float b) { return (a <= b) ? a : b; }


x86 assembly (clang, -O0):
<flt_min2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     1130 <flt_min2+0x30>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <flt_min2+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flt_min2>:
movaps %xmm0,%xmm2
cmpless %xmm1,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @flt_min2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ole float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @flt_min2(float %0, float %1) {
%3 = fcmp ole float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
void elg_pform_mpi_finalize() {}


x86 assembly (clang, -O0):
<elg_pform_mpi_finalize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<elg_pform_mpi_finalize>:
ret

LLVM IR (-O0):
define void @elg_pform_mpi_finalize() {
ret void
}

LLVM IR (-O2):
define void @elg_pform_mpi_finalize() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ kdump(int);
int /*<<< orphan*/ printf(char *);
extern void key_id(void) {
  printf("\tKey ID - ");
  kdump(8);
  printf("\n");
}


x86 assembly (clang, -O0):
<key_id>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x8,%edi
call   1040 <kdump@plt>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_id>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
mov    $0x8,%edi
call   1050 <kdump@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\09Key ID - \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @key_id() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @kdump(i32 8)
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"\09Key ID - \00"
define void @key_id() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @kdump(i32 8)
%3 = tail call i32 @putchar(i32 10)
ret void
}
void g_object_unref() {}


x86 assembly (clang, -O0):
<g_object_unref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_object_unref>:
ret

LLVM IR (-O0):
define void @g_object_unref() {
ret void
}

LLVM IR (-O2):
define void @g_object_unref() {
ret void
}
void ade7758_uninitialize_ring(struct iio_ring_buffer *ring) {}


x86 assembly (clang, -O0):
<ade7758_uninitialize_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7758_uninitialize_ring>:
ret

LLVM IR (-O0):
%struct.iio_ring_buffer = type opaque
define void @ade7758_uninitialize_ring(%struct.iio_ring_buffer* %0) {
%2 = alloca %struct.iio_ring_buffer*
store %struct.iio_ring_buffer* %0, %struct.iio_ring_buffer** %2
ret void
}

LLVM IR (-O2):
%struct.iio_ring_buffer = type opaque
define void @ade7758_uninitialize_ring(%struct.iio_ring_buffer* nocapture %0) {
ret void
}
int lookup_module_symbol_attrs(unsigned long addr, unsigned long *size,
                               unsigned long *offset, char *modname,
                               char *name) {
  return -34;
}


x86 assembly (clang, -O0):
<lookup_module_symbol_attrs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    $0xffffffde,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookup_module_symbol_attrs>:
mov    $0xffffffde,%eax
ret

LLVM IR (-O0):
define i32 @lookup_module_symbol_attrs(i64 %0, i64* %1, i64* %2, i8* %3, i8* %4) {
%6 = alloca i64
%7 = alloca i64*
%8 = alloca i64*
%9 = alloca i8*
%10 = alloca i8*
store i64 %0, i64* %6
store i64* %1, i64** %7
store i64* %2, i64** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
ret i32 -34
}

LLVM IR (-O2):
define i32 @lookup_module_symbol_attrs(i64 %0, i64* nocapture readnone %1, i64* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
ret i32 -34
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void logger(const char *e) {
  fprintf(stderr, "\n\033[0;34m:: catwm-0.0.5 : %s \033[0;m\n", e);
}


x86 assembly (clang, -O0):
<logger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logger>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [35 x i8] c"\0A\1B[0;34m:: catwm-0.0.5 : %s \1B[0;m\0A\00"
define void @logger(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [35 x i8] c"\0A\1B[0;34m:: catwm-0.0.5 : %s \1B[0;m\0A\00"
define void @logger(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
double fma(double x, double y, double z) { return (x * y) + z; }


x86 assembly (clang, -O0):
<fma>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fma>:
mulsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @fma(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @llvm.fmuladd.f64(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @fma(double %0, double %1, double %2) {
%4 = tail call double @llvm.fmuladd.f64(double %0, double %1, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ clearLCDLine(int);
void LCDClear() {
  clearLCDLine(0);
  clearLCDLine(1);
}


x86 assembly (clang, -O0):
<LCDClear>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <clearLCDLine@plt>
mov    $0x1,%edi
call   1030 <clearLCDLine@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDClear>:
push   %rax
xor    %edi,%edi
call   1030 <clearLCDLine@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <clearLCDLine@plt>

LLVM IR (-O0):
define void @LCDClear() {
%1 = call i32 @clearLCDLine(i32 0)
%2 = call i32 @clearLCDLine(i32 1)
ret void
}

LLVM IR (-O2):
define void @LCDClear() {
%1 = tail call i32 @clearLCDLine(i32 0)
%2 = tail call i32 @clearLCDLine(i32 1)
ret void
}
void XkbAllocGeomColors() {}


x86 assembly (clang, -O0):
<XkbAllocGeomColors>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbAllocGeomColors>:
ret

LLVM IR (-O0):
define void @XkbAllocGeomColors() {
ret void
}

LLVM IR (-O2):
define void @XkbAllocGeomColors() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(unsigned int);
int main(void) {
  unsigned int x = 0;
  unsigned int y = 1;
  while (x < 6) {
    x++;
    y *= 2;
  }
  __VERIFIER_assert(y % 3);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x6,-0x8(%rbp)
jae    114e <main+0x3e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
mov    -0xc(%rbp),%eax
mov    $0x3,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%edi
call   1030 <__VERIFIER_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp ult i32 %5, 6
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add i32 %8, 1
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = mul i32 %10, 2
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
%14 = urem i32 %13, 3
%15 = call i32 @__VERIFIER_assert(i32 %14)
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__VERIFIER_assert(i32 1)
ret i32 0
}
unsigned long clzl(unsigned long x) { return __builtin_clzl(x); }


x86 assembly (clang, -O0):
<clzl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bsr    %rax,%rax
xor    $0x3f,%rax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<clzl>:
bsr    %rdi,%rax
xor    $0x3f,%rax
ret

LLVM IR (-O0):
define i64 @clzl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llvm.ctlz.i64(i64 %3, i1 true)
%5 = trunc i64 %4 to i32
%6 = sext i32 %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @clzl(i64 %0) {
%2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 true)
ret i64 %2
}
__attribute__((always_)) void __monitor(const void *eax, unsigned long ecx,
                                        unsigned long edx) {
  asm volatile(".byte 0x0f,0x01,0xc8;" : : "a"(eax), "c"(ecx), "d"(edx));
}


x86 assembly (clang, -O0):
<__monitor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rdx
monitor %rax,%ecx,%edx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__monitor>:
mov    %rsi,%rcx
mov    %rdi,%rax
monitor %rax,%ecx,%edx
ret

LLVM IR (-O0):
define void @__monitor(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
ret void
}

LLVM IR (-O2):
define void @__monitor(i8* %0, i64 %1, i64 %2) {
tail call void asm sideeffect ".byte 0x0f,0x01,0xc8;", "{ax},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i8* %0, i64 %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OpcodeNotDone();
void bgt(void) { OpcodeNotDone(); }


x86 assembly (clang, -O0):
<bgt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OpcodeNotDone@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bgt>:
xor    %eax,%eax
jmp    1030 <OpcodeNotDone@plt>

LLVM IR (-O0):
define void @bgt() {
%1 = call i32 (...) @OpcodeNotDone()
ret void
}

LLVM IR (-O2):
define void @bgt() {
%1 = tail call i32 (...) @OpcodeNotDone()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_count(int);
int main(void) {
  int i;
  for (i = 10; i > 0; --i)
    print_count(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1146 <main+0x36>
mov    -0x8(%rbp),%edi
call   1030 <print_count@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <print_count@plt>
mov    $0x9,%edi
call   1030 <print_count@plt>
mov    $0x8,%edi
call   1030 <print_count@plt>
mov    $0x7,%edi
call   1030 <print_count@plt>
mov    $0x6,%edi
call   1030 <print_count@plt>
mov    $0x5,%edi
call   1030 <print_count@plt>
mov    $0x4,%edi
call   1030 <print_count@plt>
mov    $0x3,%edi
call   1030 <print_count@plt>
mov    $0x2,%edi
call   1030 <print_count@plt>
mov    $0x1,%edi
call   1030 <print_count@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @print_count(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, -1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_count(i32 10)
%2 = tail call i32 @print_count(i32 9)
%3 = tail call i32 @print_count(i32 8)
%4 = tail call i32 @print_count(i32 7)
%5 = tail call i32 @print_count(i32 6)
%6 = tail call i32 @print_count(i32 5)
%7 = tail call i32 @print_count(i32 4)
%8 = tail call i32 @print_count(i32 3)
%9 = tail call i32 @print_count(i32 2)
%10 = tail call i32 @print_count(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cli_putstr(char *);
void nessie_print_footer(void) {
  cli_putstr("\r\n\r\n\r\n\r\nEnd of test vectors\r\n\r\n");
}


x86 assembly (clang, -O0):
<nessie_print_footer>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <cli_putstr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nessie_print_footer>:
lea    0xee9(%rip),%rdi
jmp    1030 <cli_putstr@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"\0D\0A\0D\0A\0D\0A\0D\0AEnd of test vectors\0D\0A\0D\0A\00"
define void @nessie_print_footer() {
%1 = call i32 @cli_putstr(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"\0D\0A\0D\0A\0D\0A\0D\0AEnd of test vectors\0D\0A\0D\0A\00"
define void @nessie_print_footer() {
%1 = tail call i32 @cli_putstr(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ CPUbasepriGet();
uint32_t IntPriorityMaskGet(void) { return (CPUbasepriGet()); }


x86 assembly (clang, -O0):
<IntPriorityMaskGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CPUbasepriGet@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntPriorityMaskGet>:
xor    %eax,%eax
jmp    1030 <CPUbasepriGet@plt>

LLVM IR (-O0):
define i32 @IntPriorityMaskGet() {
%1 = call i32 (...) @CPUbasepriGet()
ret i32 %1
}

LLVM IR (-O2):
define i32 @IntPriorityMaskGet() {
%1 = tail call i32 (...) @CPUbasepriGet()
ret i32 %1
}
const char *_Locale_abbrev_monthname(struct _Locale_time *__DUMMY_PAR1,
                                     int __DUMMY_PAR2) {
  return 0;
}


x86 assembly (clang, -O0):
<_Locale_abbrev_monthname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_abbrev_monthname>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct._Locale_time = type opaque
define i8* @_Locale_abbrev_monthname(%struct._Locale_time* %0, i32 %1) {
%3 = alloca %struct._Locale_time*
%4 = alloca i32
store %struct._Locale_time* %0, %struct._Locale_time** %3
store i32 %1, i32* %4
ret i8* null
}

LLVM IR (-O2):
%struct._Locale_time = type opaque
define noalias i8* @_Locale_abbrev_monthname(%struct._Locale_time* nocapture readnone %0, i32 %1) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ yalex();
int main(void) {
  yalex();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <yalex@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <yalex@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @yalex()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @yalex()
ret i32 0
}
void test___atomic_xor_fetch_2(int *mem) { __atomic_xor_fetch(mem, -1, 4); }


x86 assembly (clang, -O0):
<test___atomic_xor_fetch_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
xor    %esi,%edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    114b <test___atomic_xor_fetch_2+0x4b>
jmp    1122 <test___atomic_xor_fetch_2+0x22>
mov    -0x18(%rbp),%ecx
mov    -0x24(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_xor_fetch_2>:
lock xorl $0xffffffff,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_xor_fetch_2(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
store i32 -1, i32* %3
%6 = load i32, i32* %3
%7 = atomicrmw xor i32* %5, i32 %6 acq_rel
%8 = xor i32 %7, %6
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_xor_fetch_2(i32* nocapture %0) {
%2 = atomicrmw xor i32* %0, i32 -1 acq_rel
ret void
}
void div() {
  asm volatile("popq %%rbx\n\t"
               "popq %%rax\n\t"
               "idivq %%rbx\n\t"
               "pushq %%rax\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<div>:
push   %rbp
mov    %rsp,%rbp
pop    %rbx
pop    %rax
idiv   %rbx
push   %rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<div>:
pop    %rbx
pop    %rax
idiv   %rbx
push   %rax
ret

LLVM IR (-O0):
define void @div() {
ret void
}

LLVM IR (-O2):
define void @div() {
tail call void asm sideeffect "popq %rbx\0A\09popq %rax\0A\09idivq %rbx\0A\09pushq %rax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_MODULATE;
int /*<<< orphan*/ GL_REPLACE;
int /*<<< orphan*/ GL_TEXTURE_ENV;
int /*<<< orphan*/ GL_TEXTURE_ENV_MODE;
int /*<<< orphan*/ glTexEnvf(int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/);
void tfunc(void) {
  static int state;
  if (state ^= 1)
    glTexEnvf(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_REPLACE);
  else
    glTexEnvf(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_MODULATE);
}


x86 assembly (clang, -O0):
<tfunc>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f12(%rip),%eax
xor    $0x1,%eax
mov    %eax,0x2f09(%rip)
cmp    $0x0,%eax
je     1151 <tfunc+0x41>
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2ea4(%rip),%rax
mov    (%rax),%esi
mov    0x2e83(%rip),%rax
mov    (%rax),%edx
call   1030 <glTexEnvf@plt>
jmp    1171 <tfunc+0x61>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
mov    0x2e7f(%rip),%rax
mov    (%rax),%esi
mov    0x2e6e(%rip),%rax
mov    (%rax),%edx
call   1030 <glTexEnvf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tfunc>:
xorl   $0x1,0x2f15(%rip)
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
jne    1139 <tfunc+0x29>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edx
jmp    1030 <glTexEnvf@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edx
jmp    1030 <glTexEnvf@plt>

LLVM IR (-O0):
@tfunc.state = internal global i32 0
@GL_TEXTURE_ENV = global i32 0
@GL_TEXTURE_ENV_MODE = global i32 0
@GL_REPLACE = global i32 0
@GL_MODULATE = global i32 0
define void @tfunc() {
%1 = load i32, i32* @tfunc.state
%2 = xor i32 %1, 1
store i32 %2, i32* @tfunc.state
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = load i32, i32* @GL_TEXTURE_ENV
%6 = load i32, i32* @GL_TEXTURE_ENV_MODE
%7 = load i32, i32* @GL_REPLACE
%8 = call i32 @glTexEnvf(i32 %5, i32 %6, i32 %7)
br label %14
9: ; preds = %0
%10 = load i32, i32* @GL_TEXTURE_ENV
%11 = load i32, i32* @GL_TEXTURE_ENV_MODE
%12 = load i32, i32* @GL_MODULATE
%13 = call i32 @glTexEnvf(i32 %10, i32 %11, i32 %12)
br label %14
14: ; preds = %9, %4
ret void
}

LLVM IR (-O2):
@tfunc.state = internal unnamed_addr global i32 0
@GL_TEXTURE_ENV = global i32 0
@GL_TEXTURE_ENV_MODE = global i32 0
@GL_REPLACE = global i32 0
@GL_MODULATE = global i32 0
define void @tfunc() {
%1 = load i32, i32* @tfunc.state
%2 = xor i32 %1, 1
store i32 %2, i32* @tfunc.state
%3 = icmp eq i32 %2, 0
%4 = load i32, i32* @GL_TEXTURE_ENV
%5 = load i32, i32* @GL_TEXTURE_ENV_MODE
%6 = load i32, i32* @GL_MODULATE
%7 = load i32, i32* @GL_REPLACE
%8 = select i1 %3, i32 %6, i32 %7
%9 = tail call i32 @glTexEnvf(i32 %4, i32 %5, i32 %8)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int bits_getb(const uint8_t *vec, size_t size, uint8_t bit) {
  if (size <= (size_t)(bit >> 3)) {
    return -1;
  }
  return (*(vec + (bit >> 3)) & (1 << (bit & 0x07))) != 0;
}


x86 assembly (clang, -O0):
<bits_getb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
cmp    %rcx,%rax
ja     1131 <bits_getb+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <bits_getb+0x60>
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x1c(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bits_getb>:
mov    %edx,%eax
sar    $0x3,%eax
movslq %eax,%rcx
mov    $0xffffffff,%eax
cmp    %rsi,%rcx
jae    111f <bits_getb+0x1f>
mov    (%rdi,%rcx,4),%eax
and    $0x7,%dl
mov    %edx,%ecx
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bits_getb(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = load i32, i32* %7
%10 = ashr i32 %9, 3
%11 = sext i32 %10 to i64
%12 = icmp ule i64 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %27
14: ; preds = %3
%15 = load i32*, i32** %5
%16 = load i32, i32* %7
%17 = ashr i32 %16, 3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %15, i64 %18
%20 = load i32, i32* %19
%21 = load i32, i32* %7
%22 = and i32 %21, 7
%23 = shl i32 1, %22
%24 = and i32 %20, %23
%25 = icmp ne i32 %24, 0
%26 = zext i1 %25 to i32
store i32 %26, i32* %4
br label %27
27: ; preds = %14, %13
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @bits_getb(i32* nocapture %0, i64 %1, i32 %2) {
%4 = ashr i32 %2, 3
%5 = sext i32 %4 to i64
%6 = icmp ult i64 %5, %1
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = getelementptr inbounds i32, i32* %0, i64 %5
%9 = load i32, i32* %8
%10 = and i32 %2, 7
%11 = lshr i32 %9, %10
%12 = and i32 %11, 1
br label %13
13: ; preds = %3, %7
%14 = phi i32 [ %12, %7 ], [ -1, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void PrintError(char *sz) { printf("\nERROR: %s\n", sz); }


x86 assembly (clang, -O0):
<PrintError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintError>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"\0AERROR: %s\0A\00"
define void @PrintError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"\0AERROR: %s\0A\00"
define void @PrintError(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
unsigned int DQUOT_ORPHAN_COOKIE(struct inode *inode) { return 0; }


x86 assembly (clang, -O0):
<DQUOT_ORPHAN_COOKIE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DQUOT_ORPHAN_COOKIE>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
define i32 @DQUOT_ORPHAN_COOKIE(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
define i32 @DQUOT_ORPHAN_COOKIE(%struct.inode* nocapture readnone %0) {
ret i32 0
}
int CheckBreakpoint(int from, int to, int bArrBrkpt[]) {
  int i;
  for (i = from + 1; i < to; i++)
    if (bArrBrkpt[i])
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<CheckBreakpoint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1154 <CheckBreakpoint+0x54>
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
je     1141 <CheckBreakpoint+0x41>
movl   $0x0,-0x4(%rbp)
jmp    115b <CheckBreakpoint+0x5b>
jmp    1146 <CheckBreakpoint+0x46>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <CheckBreakpoint+0x17>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckBreakpoint>:
movslq %edi,%rax
movslq %esi,%rcx
add    $0x1,%rax
nopw   0x0(%rax,%rax,1)
cmp    %rcx,%rax
jge    1122 <CheckBreakpoint+0x22>
cmpl   $0x0,(%rdx,%rax,4)
lea    0x1(%rax),%rax
je     1110 <CheckBreakpoint+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @CheckBreakpoint(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
store i32 %10, i32* %8
br label %11
11: ; preds = %24, %3
%12 = load i32, i32* %8
%13 = load i32, i32* %6
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %27
15: ; preds = %11
%16 = load i32*, i32** %7
%17 = load i32, i32* %8
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
%20 = load i32, i32* %19
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %15
store i32 0, i32* %4
br label %28
23: ; preds = %15
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %11
27: ; preds = %11
store i32 1, i32* %4
br label %28
28: ; preds = %27, %22
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @CheckBreakpoint(i32 %0, i32 %1, i32* nocapture %2) {
%4 = sext i32 %0 to i64
%5 = sext i32 %1 to i64
br label %6
6: ; preds = %10, %3
%7 = phi i64 [ %8, %10 ], [ %4, %3 ]
%8 = add nsw i64 %7, 1
%9 = icmp slt i64 %8, %5
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = getelementptr inbounds i32, i32* %2, i64 %8
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %6, label %14
14: ; preds = %6, %10
%15 = phi i32 [ 0, %10 ], [ 1, %6 ]
ret i32 %15
}
void test() {
#pragma omp single
  ;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test() {
ret void
}

LLVM IR (-O2):
define void @test() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glad_glFlush();
void glFlush() { glad_glFlush(); }


x86 assembly (clang, -O0):
<glFlush>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glad_glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glFlush>:
xor    %eax,%eax
jmp    1030 <glad_glFlush@plt>

LLVM IR (-O0):
define void @glFlush() {
%1 = call i32 (...) @glad_glFlush()
ret void
}

LLVM IR (-O2):
define void @glFlush() {
%1 = tail call i32 (...) @glad_glFlush()
ret void
}
unsigned long trio_to_unsigned_long(const char *string, char **endp, int base) {
  assert(string);
  assert((base >= 2) && (base <= 36));
  return strtoul(string, endp, base);
}


x86 assembly (clang, -O0):
<trio_to_unsigned_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
xor    %eax,%eax
cmpl   $0x2,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jl     1157 <trio_to_unsigned_long+0x37>
cmpl   $0x24,-0x14(%rbp)
setle  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <strtoul@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trio_to_unsigned_long>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%r15d
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <assert@plt>
lea    -0x2(%r15),%eax
xor    %edi,%edi
cmp    $0x23,%eax
setb   %dil
xor    %eax,%eax
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <strtoul@plt>

LLVM IR (-O0):
define i64 @trio_to_unsigned_long(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %7)
%9 = load i32, i32* %6
%10 = icmp sge i32 %9, 2
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, i32* %6
%13 = icmp sle i32 %12, 36
br label %14
14: ; preds = %11, %3
%15 = phi i1 [ false, %3 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
%17 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %16)
%18 = load i8*, i8** %4
%19 = load i8**, i8*** %5
%20 = load i32, i32* %6
%21 = call i64 @strtoul(i8* %18, i8** %19, i32 %20)
ret i64 %21
}

LLVM IR (-O2):
define i64 @trio_to_unsigned_long(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %0)
%5 = add i32 %2, -2
%6 = icmp ult i32 %5, 35
%7 = zext i1 %6 to i32
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %7)
%9 = tail call i64 @strtoul(i8* %0, i8** %1, i32 %2)
ret i64 %9
}
int calc(int a, int b, int (*operation)(int, int)) { return operation(a, b); }


x86 assembly (clang, -O0):
<calc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc>:
jmp    *%rdx

LLVM IR (-O0):
define i32 @calc(i32 %0, i32 %1, i32 (i32, i32)* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32 (i32, i32)*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 (i32, i32)* %2, i32 (i32, i32)** %6
%7 = load i32 (i32, i32)*, i32 (i32, i32)** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call i32 %7(i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @calc(i32 %0, i32 %1, i32 (i32, i32)* nocapture %2) {
%4 = tail call i32 %2(i32 %0, i32 %1)
ret i32 %4
}
int g(int x, int y) {
  int ret;
  if (x <= y)
    ret = x + y;
  else
    ret = x - y;
  return ret;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1124 <g+0x24>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112d <g+0x2d>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %esi,%eax
neg    %eax
cmp    %esi,%edi
cmovle %esi,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
store i32 %12, i32* %5
br label %17
13: ; preds = %2
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = sub nsw i32 %14, %15
store i32 %16, i32* %5
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = sub i32 0, %1
%5 = select i1 %3, i32 %4, i32 %1
%6 = add i32 %5, %0
ret i32 %6
}