#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;
typedef int int8_t;

/* Variables and functions */
void GPIO_event_config(uint8_t pin, uint8_t type) {
  ;
  int8_t ev1 = pin - 32;
  if (type & 1) {
    if (ev1 < 0)
      (*((volatile uint32_t *)(0x0020004C))) = (1 << pin);
    else
      (*((volatile uint32_t *)(0x00200050))) = (1 << ev1);
  }
  if (type & 2) {
    if (ev1 < 0)
      (*((volatile uint32_t *)(0x00200058))) = (1 << pin);
    else
      (*((volatile uint32_t *)(0x0020005C))) = (1 << ev1);
  }
  if (type & 4) {
    if (ev1 < 0)
      (*((volatile uint32_t *)(0x00200064))) = (1 << pin);
    else
      (*((volatile uint32_t *)(0x00200068))) = (1 << ev1);
  }
  if (type & 8) {
    if (ev1 < 0)
      (*((volatile uint32_t *)(0x00200070))) = (1 << pin);
    else
      (*((volatile uint32_t *)(0x00200074))) = (1 << ev1);
  }
  if (type & 16) {
    if (ev1 < 0)
      (*((volatile uint32_t *)(0x0020007C))) = (1 << pin);
    else
      (*((volatile uint32_t *)(0x00200080))) = (1 << ev1);
  }
  if (type & 32) {
    if (ev1 < 0)
      (*((volatile uint32_t *)(0x00200088))) = (1 << pin);
    else
      (*((volatile uint32_t *)(0x0020008C))) = (1 << ev1);
  }
}


x86 assembly (clang, -O0):
<GPIO_event_config>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     115c <GPIO_event_config+0x5c>
cmpl   $0x0,-0xc(%rbp)
jge    1144 <GPIO_event_config+0x44>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x20004c,%eax
mov    %ecx,(%rax)
jmp    1157 <GPIO_event_config+0x57>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200050,%eax
mov    %ecx,(%rax)
jmp    115c <GPIO_event_config+0x5c>
mov    -0x8(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     11a5 <GPIO_event_config+0xa5>
cmpl   $0x0,-0xc(%rbp)
jge    118d <GPIO_event_config+0x8d>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200058,%eax
mov    %ecx,(%rax)
jmp    11a0 <GPIO_event_config+0xa0>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x20005c,%eax
mov    %ecx,(%rax)
jmp    11a5 <GPIO_event_config+0xa5>
mov    -0x8(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     11ee <GPIO_event_config+0xee>
cmpl   $0x0,-0xc(%rbp)
jge    11d6 <GPIO_event_config+0xd6>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200064,%eax
mov    %ecx,(%rax)
jmp    11e9 <GPIO_event_config+0xe9>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200068,%eax
mov    %ecx,(%rax)
jmp    11ee <GPIO_event_config+0xee>
mov    -0x8(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     1237 <GPIO_event_config+0x137>
cmpl   $0x0,-0xc(%rbp)
jge    121f <GPIO_event_config+0x11f>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200070,%eax
mov    %ecx,(%rax)
jmp    1232 <GPIO_event_config+0x132>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200074,%eax
mov    %ecx,(%rax)
jmp    1237 <GPIO_event_config+0x137>
mov    -0x8(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     1280 <GPIO_event_config+0x180>
cmpl   $0x0,-0xc(%rbp)
jge    1268 <GPIO_event_config+0x168>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x20007c,%eax
mov    %ecx,(%rax)
jmp    127b <GPIO_event_config+0x17b>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200080,%eax
mov    %ecx,(%rax)
jmp    1280 <GPIO_event_config+0x180>
mov    -0x8(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     12c9 <GPIO_event_config+0x1c9>
cmpl   $0x0,-0xc(%rbp)
jge    12b1 <GPIO_event_config+0x1b1>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200088,%eax
mov    %ecx,(%rax)
jmp    12c4 <GPIO_event_config+0x1c4>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x20008c,%eax
mov    %ecx,(%rax)
jmp    12c9 <GPIO_event_config+0x1c9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO_event_config>:
lea    -0x20(%rdi),%eax
test   $0x1,%sil
jne    1134 <GPIO_event_config+0x34>
test   $0x2,%sil
jne    1162 <GPIO_event_config+0x62>
test   $0x4,%sil
jne    1190 <GPIO_event_config+0x90>
test   $0x8,%sil
jne    11c6 <GPIO_event_config+0xc6>
test   $0x10,%sil
jne    11fc <GPIO_event_config+0xfc>
test   $0x20,%sil
jne    1232 <GPIO_event_config+0x132>
ret
mov    $0x1,%edx
cmp    $0x1f,%edi
jg     1151 <GPIO_event_config+0x51>
mov    %edi,%ecx
shl    %cl,%edx
mov    %edx,0x20004c
test   $0x2,%sil
je     110f <GPIO_event_config+0xf>
jmp    1162 <GPIO_event_config+0x62>
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,0x200050
test   $0x2,%sil
je     110f <GPIO_event_config+0xf>
mov    $0x1,%edx
cmp    $0x1f,%edi
jg     117f <GPIO_event_config+0x7f>
mov    %edi,%ecx
shl    %cl,%edx
mov    %edx,0x200058
test   $0x4,%sil
je     1115 <GPIO_event_config+0x15>
jmp    1190 <GPIO_event_config+0x90>
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,0x20005c
test   $0x4,%sil
je     1115 <GPIO_event_config+0x15>
mov    $0x1,%edx
cmp    $0x1f,%edi
jg     11b1 <GPIO_event_config+0xb1>
mov    %edi,%ecx
shl    %cl,%edx
mov    %edx,0x200064
test   $0x8,%sil
je     111f <GPIO_event_config+0x1f>
jmp    11c6 <GPIO_event_config+0xc6>
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,0x200068
test   $0x8,%sil
je     111f <GPIO_event_config+0x1f>
mov    $0x1,%edx
cmp    $0x1f,%edi
jg     11e7 <GPIO_event_config+0xe7>
mov    %edi,%ecx
shl    %cl,%edx
mov    %edx,0x200070
test   $0x10,%sil
je     1129 <GPIO_event_config+0x29>
jmp    11fc <GPIO_event_config+0xfc>
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,0x200074
test   $0x10,%sil
je     1129 <GPIO_event_config+0x29>
mov    $0x1,%edx
cmp    $0x1f,%edi
jg     121d <GPIO_event_config+0x11d>
mov    %edi,%ecx
shl    %cl,%edx
mov    %edx,0x20007c
test   $0x20,%sil
je     1133 <GPIO_event_config+0x33>
jmp    1232 <GPIO_event_config+0x132>
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,0x200080
test   $0x20,%sil
je     1133 <GPIO_event_config+0x33>
cmp    $0x1f,%edi
jg     1248 <GPIO_event_config+0x148>
mov    $0x1,%eax
mov    %edi,%ecx
shl    %cl,%eax
mov    %eax,0x200088
ret
mov    $0x1,%edx
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,0x20008c
ret

LLVM IR (-O0):
define void @GPIO_event_config(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %6, 32
store i32 %7, i32* %5
%8 = load i32, i32* %4
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %3
%16 = shl i32 1, %15
store volatile i32 %16, i32* inttoptr (i64 2097228 to i32*)
br label %20
17: ; preds = %11
%18 = load i32, i32* %5
%19 = shl i32 1, %18
store volatile i32 %19, i32* inttoptr (i64 2097232 to i32*)
br label %20
20: ; preds = %17, %14
br label %21
21: ; preds = %20, %2
%22 = load i32, i32* %4
%23 = and i32 %22, 2
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %35
25: ; preds = %21
%26 = load i32, i32* %5
%27 = icmp slt i32 %26, 0
br i1 %27, label %28, label %31
28: ; preds = %25
%29 = load i32, i32* %3
%30 = shl i32 1, %29
store volatile i32 %30, i32* inttoptr (i64 2097240 to i32*)
br label %34
31: ; preds = %25
%32 = load i32, i32* %5
%33 = shl i32 1, %32
store volatile i32 %33, i32* inttoptr (i64 2097244 to i32*)
br label %34
34: ; preds = %31, %28
br label %35
35: ; preds = %34, %21
%36 = load i32, i32* %4
%37 = and i32 %36, 4
%38 = icmp ne i32 %37, 0
br i1 %38, label %39, label %49
39: ; preds = %35
%40 = load i32, i32* %5
%41 = icmp slt i32 %40, 0
br i1 %41, label %42, label %45
42: ; preds = %39
%43 = load i32, i32* %3
%44 = shl i32 1, %43
store volatile i32 %44, i32* inttoptr (i64 2097252 to i32*)
br label %48
45: ; preds = %39
%46 = load i32, i32* %5
%47 = shl i32 1, %46
store volatile i32 %47, i32* inttoptr (i64 2097256 to i32*)
br label %48
48: ; preds = %45, %42
br label %49
49: ; preds = %48, %35
%50 = load i32, i32* %4
%51 = and i32 %50, 8
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %63
53: ; preds = %49
%54 = load i32, i32* %5
%55 = icmp slt i32 %54, 0
br i1 %55, label %56, label %59
56: ; preds = %53
%57 = load i32, i32* %3
%58 = shl i32 1, %57
store volatile i32 %58, i32* inttoptr (i64 2097264 to i32*)
br label %62
59: ; preds = %53
%60 = load i32, i32* %5
%61 = shl i32 1, %60
store volatile i32 %61, i32* inttoptr (i64 2097268 to i32*)
br label %62
62: ; preds = %59, %56
br label %63
63: ; preds = %62, %49
%64 = load i32, i32* %4
%65 = and i32 %64, 16
%66 = icmp ne i32 %65, 0
br i1 %66, label %67, label %77
67: ; preds = %63
%68 = load i32, i32* %5
%69 = icmp slt i32 %68, 0
br i1 %69, label %70, label %73
70: ; preds = %67
%71 = load i32, i32* %3
%72 = shl i32 1, %71
store volatile i32 %72, i32* inttoptr (i64 2097276 to i32*)
br label %76
73: ; preds = %67
%74 = load i32, i32* %5
%75 = shl i32 1, %74
store volatile i32 %75, i32* inttoptr (i64 2097280 to i32*)
br label %76
76: ; preds = %73, %70
br label %77
77: ; preds = %76, %63
%78 = load i32, i32* %4
%79 = and i32 %78, 32
%80 = icmp ne i32 %79, 0
br i1 %80, label %81, label %91
81: ; preds = %77
%82 = load i32, i32* %5
%83 = icmp slt i32 %82, 0
br i1 %83, label %84, label %87
84: ; preds = %81
%85 = load i32, i32* %3
%86 = shl i32 1, %85
store volatile i32 %86, i32* inttoptr (i64 2097288 to i32*)
br label %90
87: ; preds = %81
%88 = load i32, i32* %5
%89 = shl i32 1, %88
store volatile i32 %89, i32* inttoptr (i64 2097292 to i32*)
br label %90
90: ; preds = %87, %84
br label %91
91: ; preds = %90, %77
ret void
}

LLVM IR (-O2):
define void @GPIO_event_config(i32 %0, i32 %1) {
%3 = add nsw i32 %0, -32
%4 = and i32 %1, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %2
%7 = icmp slt i32 %0, 32
br i1 %7, label %8, label %10
8: ; preds = %6
%9 = shl nuw i32 1, %0
store volatile i32 %9, i32* inttoptr (i64 2097228 to i32*)
br label %12
10: ; preds = %6
%11 = shl nuw i32 1, %3
store volatile i32 %11, i32* inttoptr (i64 2097232 to i32*)
br label %12
12: ; preds = %8, %10, %2
%13 = and i32 %1, 2
%14 = icmp eq i32 %13, 0
br i1 %14, label %21, label %15
15: ; preds = %12
%16 = icmp slt i32 %0, 32
br i1 %16, label %17, label %19
17: ; preds = %15
%18 = shl nuw i32 1, %0
store volatile i32 %18, i32* inttoptr (i64 2097240 to i32*)
br label %21
19: ; preds = %15
%20 = shl nuw i32 1, %3
store volatile i32 %20, i32* inttoptr (i64 2097244 to i32*)
br label %21
21: ; preds = %17, %19, %12
%22 = and i32 %1, 4
%23 = icmp eq i32 %22, 0
br i1 %23, label %30, label %24
24: ; preds = %21
%25 = icmp slt i32 %0, 32
br i1 %25, label %26, label %28
26: ; preds = %24
%27 = shl nuw i32 1, %0
store volatile i32 %27, i32* inttoptr (i64 2097252 to i32*)
br label %30
28: ; preds = %24
%29 = shl nuw i32 1, %3
store volatile i32 %29, i32* inttoptr (i64 2097256 to i32*)
br label %30
30: ; preds = %26, %28, %21
%31 = and i32 %1, 8
%32 = icmp eq i32 %31, 0
br i1 %32, label %39, label %33
33: ; preds = %30
%34 = icmp slt i32 %0, 32
br i1 %34, label %35, label %37
35: ; preds = %33
%36 = shl nuw i32 1, %0
store volatile i32 %36, i32* inttoptr (i64 2097264 to i32*)
br label %39
37: ; preds = %33
%38 = shl nuw i32 1, %3
store volatile i32 %38, i32* inttoptr (i64 2097268 to i32*)
br label %39
39: ; preds = %35, %37, %30
%40 = and i32 %1, 16
%41 = icmp eq i32 %40, 0
br i1 %41, label %48, label %42
42: ; preds = %39
%43 = icmp slt i32 %0, 32
br i1 %43, label %44, label %46
44: ; preds = %42
%45 = shl nuw i32 1, %0
store volatile i32 %45, i32* inttoptr (i64 2097276 to i32*)
br label %48
46: ; preds = %42
%47 = shl nuw i32 1, %3
store volatile i32 %47, i32* inttoptr (i64 2097280 to i32*)
br label %48
48: ; preds = %44, %46, %39
%49 = and i32 %1, 32
%50 = icmp eq i32 %49, 0
br i1 %50, label %57, label %51
51: ; preds = %48
%52 = icmp slt i32 %0, 32
br i1 %52, label %53, label %55
53: ; preds = %51
%54 = shl nuw i32 1, %0
store volatile i32 %54, i32* inttoptr (i64 2097288 to i32*)
br label %57
55: ; preds = %51
%56 = shl nuw i32 1, %3
store volatile i32 %56, i32* inttoptr (i64 2097292 to i32*)
br label %57
57: ; preds = %53, %55, %48
ret void
}