xunge/DecIR huggingface dataset:
/* Type definitions */
struct msghdr {
  int dummy;
};

/* Variables and functions */
int sendmsg(int, struct msghdr const *, int);
int _gpgme_ath_sendmsg(int s, const struct msghdr *msg, int flags) {
  return sendmsg(s, msg, flags);
}


x86 assembly (clang, -O0):
<_gpgme_ath_sendmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <sendmsg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gpgme_ath_sendmsg>:
jmp    1030 <sendmsg@plt>

LLVM IR (-O0):
%struct.msghdr = type { i32 }
define i32 @_gpgme_ath_sendmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msghdr*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load %struct.msghdr*, %struct.msghdr** %5
%9 = load i32, i32* %6
%10 = call i32 @sendmsg(i32 %7, %struct.msghdr* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.msghdr = type { i32 }
define i32 @_gpgme_ath_sendmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = tail call i32 @sendmsg(i32 %0, %struct.msghdr* %1, i32 %2)
ret i32 %4
}
/* Type definitions */
struct posix_acl {
  int dummy;
};

/* Variables and functions */
int posix_acl_to_xattr(struct posix_acl *, void *, int);
int zpl_acl_to_xattr(struct posix_acl *acl, void *value, int size) {
  return (posix_acl_to_xattr(acl, value, size));
}


x86 assembly (clang, -O0):
<zpl_acl_to_xattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <posix_acl_to_xattr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zpl_acl_to_xattr>:
jmp    1030 <posix_acl_to_xattr@plt>

LLVM IR (-O0):
%struct.posix_acl = type { i32 }
define i32 @zpl_acl_to_xattr(%struct.posix_acl* %0, i8* %1, i32 %2) {
%4 = alloca %struct.posix_acl*
%5 = alloca i8*
%6 = alloca i32
store %struct.posix_acl* %0, %struct.posix_acl** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.posix_acl*, %struct.posix_acl** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @posix_acl_to_xattr(%struct.posix_acl* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.posix_acl = type { i32 }
define i32 @zpl_acl_to_xattr(%struct.posix_acl* %0, i8* %1, i32 %2) {
%4 = tail call i32 @posix_acl_to_xattr(%struct.posix_acl* %0, i8* %1, i32 %2)
ret i32 %4
}
float EaseLinearInOut(float t, float b, float c, float d) {
  return (c * t / d + b);
}


x86 assembly (clang, -O0):
<EaseLinearInOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<EaseLinearInOut>:
mulss  %xmm2,%xmm0
divss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @EaseLinearInOut(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = load float, float* %5
%11 = fmul float %9, %10
%12 = load float, float* %8
%13 = fdiv float %11, %12
%14 = load float, float* %6
%15 = fadd float %13, %14
ret float %15
}

LLVM IR (-O2):
define float @EaseLinearInOut(float %0, float %1, float %2, float %3) {
%5 = fmul float %0, %2
%6 = fdiv float %5, %3
%7 = fadd float %6, %1
ret float %7
}
void foo111(int p) {}


x86 assembly (clang, -O0):
<foo111>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo111>:
ret

LLVM IR (-O0):
define void @foo111(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo111(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ DSA;

/* Variables and functions */
int /*<<< orphan*/ *DSA_new_method(int /*<<< orphan*/ *);
DSA *DSA_new(void) { return DSA_new_method(NULL); }


x86 assembly (clang, -O0):
<DSA_new>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <DSA_new_method@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DSA_new>:
xor    %edi,%edi
jmp    1030 <DSA_new_method@plt>

LLVM IR (-O0):
define i32* @DSA_new() {
%1 = call i32* @DSA_new_method(i32* null)
ret i32* %1
}

LLVM IR (-O2):
define i32* @DSA_new() {
%1 = tail call i32* @DSA_new_method(i32* null)
ret i32* %1
}
void glXWaitGL(void) {}


x86 assembly (clang, -O0):
<glXWaitGL>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glXWaitGL>:
ret

LLVM IR (-O0):
define void @glXWaitGL() {
ret void
}

LLVM IR (-O2):
define void @glXWaitGL() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
struct cart_unif_data {
  int dummy;
};

/* Variables and functions */
struct cart_unif_data *cart_unif_add_chunk(struct cart_unif_data *, char *,
                                           int /*<<< orphan*/,
                                           int /*<<< orphan*/ *);
struct cart_unif_data *cart_unif_add_chr_chunk(struct cart_unif_data *chunks,
                                               uint32_t size, uint8_t *chr_data,
                                               int chip_number) {
  return cart_unif_add_chunk(chunks, "CHR0", size, chr_data);
}


x86 assembly (clang, -O0):
<cart_unif_add_chr_chunk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
lea    0xec8(%rip),%rsi
call   1030 <cart_unif_add_chunk@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cart_unif_add_chr_chunk>:
mov    %rdx,%rcx
mov    %esi,%edx
lea    0xee4(%rip),%rsi
jmp    1030 <cart_unif_add_chunk@plt>

LLVM IR (-O0):
%struct.cart_unif_data = type { i32 }
@.str = [5 x i8] c"CHR0\00"
define %struct.cart_unif_data* @cart_unif_add_chr_chunk(%struct.cart_unif_data* %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca %struct.cart_unif_data*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store %struct.cart_unif_data* %0, %struct.cart_unif_data** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load %struct.cart_unif_data*, %struct.cart_unif_data** %5
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = call %struct.cart_unif_data* @cart_unif_add_chunk(%struct.cart_unif_data* %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %10, i32* %11)
ret %struct.cart_unif_data* %12
}

LLVM IR (-O2):
%struct.cart_unif_data = type { i32 }
@.str = [5 x i8] c"CHR0\00"
define %struct.cart_unif_data* @cart_unif_add_chr_chunk(%struct.cart_unif_data* %0, i32 %1, i32* %2, i32 %3) {
%5 = tail call %struct.cart_unif_data* @cart_unif_add_chunk(%struct.cart_unif_data* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1, i32* %2)
ret %struct.cart_unif_data* %5
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void PECIIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  DEBUG_ASSERT(ulBase == 0x400B0000);
  DEBUG_ASSERT(pfnHandler != 0);
  IntRegister(123, pfnHandler);
  IntEnable(123);
}


x86 assembly (clang, -O0):
<PECIIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x400b0000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <DEBUG_ASSERT@plt>
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rsi
mov    $0x7b,%edi
call   1040 <IntRegister@plt>
mov    $0x7b,%edi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIIntRegister>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
cmp    $0x400b0000,%rdi
sete   %al
mov    %eax,%edi
call   1050 <DEBUG_ASSERT@plt>
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1050 <DEBUG_ASSERT@plt>
mov    $0x7b,%edi
mov    %rbx,%rsi
call   1040 <IntRegister@plt>
mov    $0x7b,%edi
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @PECIIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074462720
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load void ()*, void ()** %4
%10 = icmp ne void ()* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @DEBUG_ASSERT(i32 %11)
%13 = load void ()*, void ()** %4
%14 = bitcast void ()* %13 to void (...)*
%15 = call i32 @IntRegister(i32 123, void (...)* %14)
%16 = call i32 @IntEnable(i32 123)
ret void
}

LLVM IR (-O2):
define void @PECIIntRegister(i64 %0, void ()* %1) {
%3 = icmp eq i64 %0, 1074462720
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = icmp ne void ()* %1, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @DEBUG_ASSERT(i32 %7)
%9 = bitcast void ()* %1 to void (...)*
%10 = tail call i32 @IntRegister(i32 123, void (...)* %9)
%11 = tail call i32 @IntEnable(i32 123)
ret void
}
unsigned short get_user_word(const short *addr) { return *addr; }


x86 assembly (clang, -O0):
<get_user_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_user_word>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i16 @get_user_word(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @get_user_word(i16* nocapture %0) {
%2 = load i16, i16* %0
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ signal(int /*<<< orphan*/, void (*)(int));
void g_signal_usr1(void (*func)(int)) { signal(SIGUSR1, func); }


x86 assembly (clang, -O0):
<g_signal_usr1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_signal_usr1>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGUSR1 = global i32 0
define void @g_signal_usr1(void (i32)* %0) {
%2 = alloca void (i32)*
store void (i32)* %0, void (i32)** %2
%3 = load i32, i32* @SIGUSR1
%4 = load void (i32)*, void (i32)** %2
%5 = call i32 @signal(i32 %3, void (i32)* %4)
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
define void @g_signal_usr1(void (i32)* %0) {
%2 = load i32, i32* @SIGUSR1
%3 = tail call i32 @signal(i32 %2, void (i32)* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scalar_derefs(char *);
int gen_scalar_derefs(char *dirname) {
  scalar_derefs(dirname);
  return (0);
}


x86 assembly (clang, -O0):
<gen_scalar_derefs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <scalar_derefs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_scalar_derefs>:
push   %rax
call   1030 <scalar_derefs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_scalar_derefs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @scalar_derefs(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_scalar_derefs(i8* %0) {
%2 = tail call i32 @scalar_derefs(i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DoAYSQHQ(int);
void AYSoundHQ(void) {
  DoAYSQHQ(0);
  DoAYSQHQ(1);
  DoAYSQHQ(2);
}


x86 assembly (clang, -O0):
<AYSoundHQ>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <DoAYSQHQ@plt>
mov    $0x1,%edi
call   1030 <DoAYSQHQ@plt>
mov    $0x2,%edi
call   1030 <DoAYSQHQ@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AYSoundHQ>:
push   %rax
xor    %edi,%edi
call   1030 <DoAYSQHQ@plt>
mov    $0x1,%edi
call   1030 <DoAYSQHQ@plt>
mov    $0x2,%edi
pop    %rax
jmp    1030 <DoAYSQHQ@plt>

LLVM IR (-O0):
define void @AYSoundHQ() {
%1 = call i32 @DoAYSQHQ(i32 0)
%2 = call i32 @DoAYSQHQ(i32 1)
%3 = call i32 @DoAYSQHQ(i32 2)
ret void
}

LLVM IR (-O2):
define void @AYSoundHQ() {
%1 = tail call i32 @DoAYSQHQ(i32 0)
%2 = tail call i32 @DoAYSQHQ(i32 1)
%3 = tail call i32 @DoAYSQHQ(i32 2)
ret void
}
int test_imm_8Aint32_mem(int *val) {
  return ((*val) & (0x8A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Aint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x8a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Aint32_mem>:
testb  $0x8a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Aint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 138
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Aint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 138
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
float itof_native(int32_t i) { return (float)i; }


x86 assembly (clang, -O0):
<itof_native>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2ssq -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<itof_native>:
cvtsi2ss %rdi,%xmm0
ret

LLVM IR (-O0):
define float @itof_native(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to float
ret float %4
}

LLVM IR (-O2):
define float @itof_native(i64 %0) {
%2 = sitofp i64 %0 to float
ret float %2
}
void f4(void *const **bar) {
  const void ***p9 = (const void ***)bar;
  void *const **p11 = (void *const **)bar;
  void **const *p13 = (void **const *)bar;
  const void *const **p15 = (const void *const **)bar;
  const void **const *p17 = (const void **const *)bar;
  void *const *const *p19 = (void *const *const *)bar;
  const void *const *const *p21 = (const void *const *const *)bar;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x40(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
ret

LLVM IR (-O0):
define void @f4(i8*** %0) {
%2 = alloca i8***
%3 = alloca i8***
%4 = alloca i8***
%5 = alloca i8***
%6 = alloca i8***
%7 = alloca i8***
%8 = alloca i8***
%9 = alloca i8***
store i8*** %0, i8**** %2
%10 = load i8***, i8**** %2
store i8*** %10, i8**** %3
%11 = load i8***, i8**** %2
store i8*** %11, i8**** %4
%12 = load i8***, i8**** %2
store i8*** %12, i8**** %5
%13 = load i8***, i8**** %2
store i8*** %13, i8**** %6
%14 = load i8***, i8**** %2
store i8*** %14, i8**** %7
%15 = load i8***, i8**** %2
store i8*** %15, i8**** %8
%16 = load i8***, i8**** %2
store i8*** %16, i8**** %9
ret void
}

LLVM IR (-O2):
define void @f4(i8*** nocapture %0) {
ret void
}
int wpas_wps_ssid_wildcard_ok(struct wpa_supplicant *wpa_s,
                              struct wpa_ssid *ssid, struct wpa_scan_res *bss) {
  return 0;
}


x86 assembly (clang, -O0):
<wpas_wps_ssid_wildcard_ok>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_wps_ssid_wildcard_ok>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
%struct.wpa_ssid = type opaque
%struct.wpa_scan_res = type opaque
define i32 @wpas_wps_ssid_wildcard_ok(%struct.wpa_supplicant* %0, %struct.wpa_ssid* %1, %struct.wpa_scan_res* %2) {
%4 = alloca %struct.wpa_supplicant*
%5 = alloca %struct.wpa_ssid*
%6 = alloca %struct.wpa_scan_res*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %4
store %struct.wpa_ssid* %1, %struct.wpa_ssid** %5
store %struct.wpa_scan_res* %2, %struct.wpa_scan_res** %6
ret i32 0
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
%struct.wpa_ssid = type opaque
%struct.wpa_scan_res = type opaque
define i32 @wpas_wps_ssid_wildcard_ok(%struct.wpa_supplicant* nocapture readnone %0, %struct.wpa_ssid* nocapture readnone %1, %struct.wpa_scan_res* nocapture readnone %2) {
ret i32 0
}
int WinMain() { return 0; }


x86 assembly (clang, -O0):
<WinMain>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WinMain>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @WinMain() {
ret i32 0
}

LLVM IR (-O2):
define i32 @WinMain() {
ret i32 0
}
double CelsiusToFahrenheit(double c) { return (9.0 / 5.0 * c + 32); }


x86 assembly (clang, -O0):
<CelsiusToFahrenheit>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CelsiusToFahrenheit>:
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @CelsiusToFahrenheit(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fmuladd.f64(double 1.800000e+00, double %3, double 3.200000e+01)
ret double %4
}

LLVM IR (-O2):
define double @CelsiusToFahrenheit(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double 1.800000e+00, double 3.200000e+01)
ret double %2
}
void gtk_icon_set_ref() {}


x86 assembly (clang, -O0):
<gtk_icon_set_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_set_ref>:
ret

LLVM IR (-O0):
define void @gtk_icon_set_ref() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_set_ref() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ atol(char *);
char *xfrd_read_token(int /*<<< orphan*/ *);
int xfrd_read_time_t(FILE *in, time_t *v) {
  char *p = xfrd_read_token(in);
  if (!p)
    return 0;
  *v = atol(p);
  return 1;
}


x86 assembly (clang, -O0):
<xfrd_read_time_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <xfrd_read_token@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1154 <xfrd_read_time_t+0x34>
movl   $0x0,-0x4(%rbp)
jmp    116c <xfrd_read_time_t+0x4c>
mov    -0x20(%rbp),%rdi
call   1040 <atol@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfrd_read_time_t>:
push   %rbx
mov    %rsi,%rbx
call   1030 <xfrd_read_token@plt>
test   %rax,%rax
je     113f <xfrd_read_time_t+0x1f>
mov    %rax,%rdi
call   1040 <atol@plt>
mov    %eax,(%rbx)
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @xfrd_read_time_t(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8*
store i32* %0, i32** %4
store i32* %1, i32** %5
%7 = load i32*, i32** %4
%8 = call i8* @xfrd_read_token(i32* %7)
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 0, i32* %3
br label %16
12: ; preds = %2
%13 = load i8*, i8** %6
%14 = call i32 @atol(i8* %13)
%15 = load i32*, i32** %5
store i32 %14, i32* %15
store i32 1, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @xfrd_read_time_t(i32* %0, i32* nocapture writeonly %1) {
%3 = tail call i8* @xfrd_read_token(i32* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @atol(i8* %3)
store i32 %6, i32* %1
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 1, %5 ], [ 0, %2 ]
ret i32 %8
}
__attribute__((always_)) int select_nohz_load_balancer(int cpu) { return 0; }


x86 assembly (clang, -O0):
<select_nohz_load_balancer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<select_nohz_load_balancer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @select_nohz_load_balancer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @select_nohz_load_balancer(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_mem(void *p) {
  if (NULL != p) {
    free(p);
  }
}


x86 assembly (clang, -O0):
<free_mem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1131 <free_mem+0x21>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_mem>:
test   %rdi,%rdi
je     111a <free_mem+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @free_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* null, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @free_mem(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
char *addColor(char *, char *);
char *italic(char *str) { return addColor("3", str); }


x86 assembly (clang, -O0):
<italic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <addColor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<italic>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <addColor@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"3\00"
define i8* @italic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @addColor(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [2 x i8] c"3\00"
define i8* @italic(i8* %0) {
%2 = tail call i8* @addColor(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
/* Variables and functions */
double __ocml_fabs_f64(double);
double fabs(double x) { return __ocml_fabs_f64(x); }


x86 assembly (clang, -O0):
<fabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_fabs_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabs>:
jmp    1030 <__ocml_fabs_f64@plt>

LLVM IR (-O0):
define double @fabs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ocml_fabs_f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @fabs(double %0) {
%2 = tail call double @__ocml_fabs_f64(double %0)
ret double %2
}
/* Variables and functions */
int yahoo_M1Common(unsigned int, int);
int yahoo_f01_44(int Salt, int Parameter) {
  unsigned b = Salt ^ 0x373E6856;
  return yahoo_M1Common(b, Parameter);
}


x86 assembly (clang, -O0):
<yahoo_f01_44>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x373e6856,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <yahoo_M1Common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yahoo_f01_44>:
xor    $0x373e6856,%edi
jmp    1030 <yahoo_M1Common@plt>

LLVM IR (-O0):
define i32 @yahoo_f01_44(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = xor i32 %6, 926836822
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = call i32 @yahoo_M1Common(i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @yahoo_f01_44(i32 %0, i32 %1) {
%3 = xor i32 %0, 926836822
%4 = tail call i32 @yahoo_M1Common(i32 %3, i32 %1)
ret i32 %4
}
/* Variables and functions */
int getuid();
getruid() { return (getuid() & 0377); }


x86 assembly (clang, -O0):
<getruid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getuid@plt>
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getruid>:
push   %rax
xor    %eax,%eax
call   1030 <getuid@plt>
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getruid() {
%1 = call i32 (...) @getuid()
%2 = and i32 %1, 255
ret i32 %2
}

LLVM IR (-O2):
define i32 @getruid() {
%1 = tail call i32 (...) @getuid()
%2 = and i32 %1, 255
ret i32 %2
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int string_le(char *s1, char *s2, int k) {
  k = 0;
  return strcmp(s1, s2) <= 0;
}


x86 assembly (clang, -O0):
<string_le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
setle  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_le>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
setle  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @string_le(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i64 @strcmp(i8* %7, i8* %8)
%10 = icmp sle i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @string_le(i8* %0, i8* %1, i32 %2) {
%4 = tail call i64 @strcmp(i8* %0, i8* %1)
%5 = icmp slt i64 %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, int);
int /*<<< orphan*/ stderr;
void speex_warning_int(const char *str, int val) {
  fprintf(stderr, "warning: %s %d\n", str, val);
}


x86 assembly (clang, -O0):
<speex_warning_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<speex_warning_int>:
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
lea    0xedb(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [16 x i8] c"warning: %s %d\0A\00"
define void @speex_warning_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [16 x i8] c"warning: %s %d\0A\00"
define void @speex_warning_int(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mb();
extern void outb(unsigned char b, unsigned long addr) {
  *(volatile unsigned int *)((addr << 5) +
                             ((0xfffffc0000000000UL) + 0x1c0000000UL) + 0x00) =
      b * 0x01010101;
  mb();
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
imul   $0x1010101,%eax,%ecx
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
movabs $0xfffffc01c0000000,%rdx
fc ff ff
add    %rdx,%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <mb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
imul   $0x1010101,%edi,%eax
shl    $0x5,%rsi
movabs $0xfffffc01c0000000,%rcx
fc ff ff
mov    %eax,(%rsi,%rcx,1)
xor    %eax,%eax
jmp    1030 <mb@plt>

LLVM IR (-O0):
define void @outb(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = mul nsw i32 %6, 16843009
%8 = load i64, i64* %4
%9 = shl i64 %8, 5
%10 = add i64 %9, -4390530318336
%11 = add i64 %10, 0
%12 = inttoptr i64 %11 to i32*
store volatile i32 %7, i32* %12
%13 = call i32 (...) @mb()
ret void
}

LLVM IR (-O2):
define void @outb(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 16843009
%5 = shl i64 %1, 5
%6 = add i64 %5, -4390530318336
%7 = inttoptr i64 %6 to i32*
store volatile i32 %4, i32* %7
%8 = tail call i32 (...) @mb()
ret void
}
char const *gamma_str(int x) { return x ? "non-zero" : "zero"; }


x86 assembly (clang, -O0):
<gamma_str>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef3(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x0,%edx
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gamma_str>:
test   %edi,%edi
lea    0xefb(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"non-zero\00"
@.str.1 = [5 x i8] c"zero\00"
define i8* @gamma_str(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [9 x i8] c"non-zero\00"
@.str.1 = [5 x i8] c"zero\00"
define i8* @gamma_str(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
/* Type definitions */
struct edna {
  int dummy;
};

/* Variables and functions */
int do_insert(struct edna *);
int cmd_insert(struct edna *a) {
  int err = 0;
  while (!err)
    err = do_insert(a);
  if (err > 0)
    return err;
  else
    return 0;
}


x86 assembly (clang, -O0):
<cmd_insert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1139 <cmd_insert+0x29>
jmp    114a <cmd_insert+0x3a>
mov    -0x10(%rbp),%rdi
call   1030 <do_insert@plt>
mov    %eax,-0x14(%rbp)
jmp    1123 <cmd_insert+0x13>
cmpl   $0x0,-0x14(%rbp)
jle    115f <cmd_insert+0x4f>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <cmd_insert+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_insert>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <do_insert@plt>
test   %eax,%eax
je     1120 <cmd_insert+0x10>
xor    %ecx,%ecx
test   %eax,%eax
cmovns %eax,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.edna = type { i32 }
define i32 @cmd_insert(%struct.edna* %0) {
%2 = alloca i32
%3 = alloca %struct.edna*
%4 = alloca i32
store %struct.edna* %0, %struct.edna** %3
store i32 0, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load %struct.edna*, %struct.edna** %3
%11 = call i32 @do_insert(%struct.edna* %10)
store i32 %11, i32* %4
br label %5
12: ; preds = %5
%13 = load i32, i32* %4
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %12
%16 = load i32, i32* %4
store i32 %16, i32* %2
br label %18
17: ; preds = %12
store i32 0, i32* %2
br label %18
18: ; preds = %17, %15
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
%struct.edna = type { i32 }
define i32 @cmd_insert(%struct.edna* %0) {
br label %2
2: ; preds = %1, %2
%3 = tail call i32 @do_insert(%struct.edna* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
%6 = icmp sgt i32 %3, 0
%7 = select i1 %6, i32 %3, i32 0
ret i32 %7
}
void __main() {
  static int initialized;
  if (!initialized) {
    typedef void (*pfunc)();
    extern pfunc __ctors[];
    extern pfunc __ctors_end[];
    pfunc *p;
    initialized = 1;
    for (p = __ctors_end; p > __ctors;)
      (*--p)();
  }
}


x86 assembly (clang, -O0):
<__main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,0x2f15(%rip)
jne    1159 <__main+0x59>
movl   $0x1,0x2f05(%rip)
mov    0x2ec2(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    0x2e9f(%rip),%rax
cmp    %rax,-0x8(%rbp)
jbe    1154 <__main+0x54>
mov    -0x8(%rbp),%rcx
mov    %rcx,%rax
add    $0xfffffffffffffff8,%rax
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   *-0x8(%rcx)
jmp    112a <__main+0x2a>
jmp    1159 <__main+0x59>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__main>:
push   %r14
push   %rbx
push   %rax
cmpb   $0x0,0x2f19(%rip)
jne    1141 <__main+0x41>
movb   $0x1,0x2f10(%rip)
mov    0x2ecd(%rip),%rcx
cmp    0x2eae(%rip),%rcx
jbe    1141 <__main+0x41>
mov    0x2ea5(%rip),%r14
nopl   0x0(%rax,%rax,1)
lea    -0x8(%rcx),%rbx
xor    %eax,%eax
call   *-0x8(%rcx)
mov    %rbx,%rcx
cmp    %r14,%rbx
ja     1130 <__main+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__main.initialized = internal global i32 0
@__ctors_end = external global [0 x void (...)*]
@__ctors = external global [0 x void (...)*]
define void @__main() {
%1 = alloca void (...)**
%2 = load i32, i32* @__main.initialized
%3 = icmp ne i32 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %0
store i32 1, i32* @__main.initialized
store void (...)** getelementptr inbounds ([0 x void (...)*], [0 x void (...)*]* @__ctors_end, i64 0, i64 0), void (...)*** %1
br label %5
5: ; preds = %8, %4
%6 = load void (...)**, void (...)*** %1
%7 = icmp ugt void (...)** %6, getelementptr inbounds ([0 x void (...)*], [0 x void (...)*]* @__ctors, i64 0, i64 0)
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load void (...)**, void (...)*** %1
%10 = getelementptr inbounds void (...)*, void (...)** %9, i32 -1
store void (...)** %10, void (...)*** %1
%11 = load void (...)*, void (...)** %10
br label %5
12: ; preds = %5
br label %13
13: ; preds = %12, %0
ret void
}

LLVM IR (-O2):
@__main.initialized = internal unnamed_addr global i1 false
@__ctors_end = external global [0 x void (...)*]
@__ctors = external global [0 x void (...)*]
define void @__main() {
%1 = load i1, i1* @__main.initialized
br i1 %1, label %8, label %2
2: ; preds = %0
store i1 true, i1* @__main.initialized
br i1 icmp ugt (void (...)** getelementptr inbounds ([0 x void (...)*], [0 x void (...)*]* @__ctors_end, i64 0, i64 0), void (...)** getelementptr inbounds ([0 x void (...)*], [0 x void (...)*]* @__ctors, i64 0, i64 0)), label %3, label %8
3: ; preds = %2, %3
%4 = phi void (...)** [ %5, %3 ], [ getelementptr inbounds ([0 x void (...)*], [0 x void (...)*]* @__ctors_end, i64 0, i64 0), %2 ]
%5 = getelementptr inbounds void (...)*, void (...)** %4, i64 -1
%6 = load void (...)*, void (...)** %5
tail call void (...) %6()
%7 = icmp ugt void (...)** %5, getelementptr inbounds ([0 x void (...)*], [0 x void (...)*]* @__ctors, i64 0, i64 0)
br i1 %7, label %3, label %8
8: ; preds = %3, %2, %0
ret void
}
void on_each_second(void) {}


x86 assembly (clang, -O0):
<on_each_second>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_each_second>:
ret

LLVM IR (-O0):
define void @on_each_second() {
ret void
}

LLVM IR (-O2):
define void @on_each_second() {
ret void
}
/* Variables and functions */
int strlen(char *);
int countCharactersWithSpace(char inputString[]) {
  int characters = (strlen(inputString));
  return characters;
}


x86 assembly (clang, -O0):
<countCharactersWithSpace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<countCharactersWithSpace>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i32 @countCharactersWithSpace(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @countCharactersWithSpace(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void f5(int x) {
#pragma GCC optimization_level 2
  printf("%d\n", x);
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @f5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @f5(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int main() {
  int a = 6;
  int b = 6;
  int c = 6;
  int d = 8;
  if (a == 6) {
    a = 7;
  } else {
    a = 66;
  }
  if (c == 5) {
    c = 6;
  } else {
    goto ERROR;
  }
  if (a == 99) {
    goto END;
  }
  if (d == 13) {
    d = 12;
  } else {
  ERROR:
    return 1;
  }
END:
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
movl   $0x6,-0x10(%rbp)
movl   $0x8,-0x14(%rbp)
cmpl   $0x6,-0x8(%rbp)
jne    113d <main+0x3d>
movl   $0x7,-0x8(%rbp)
jmp    1144 <main+0x44>
movl   $0x42,-0x8(%rbp)
cmpl   $0x5,-0x10(%rbp)
jne    115a <main+0x5a>
movl   $0x6,-0x10(%rbp)
jmp    115f <main+0x5f>
jmp    1189 <main+0x89>
cmpl   $0x63,-0x8(%rbp)
jne    116e <main+0x6e>
jmp    119a <main+0x9a>
cmpl   $0xd,-0x14(%rbp)
jne    1184 <main+0x84>
movl   $0xc,-0x14(%rbp)
jmp    1195 <main+0x95>
jmp    1189 <main+0x89>
movl   $0x1,-0x4(%rbp)
jmp    11a1 <main+0xa1>
jmp    119a <main+0x9a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 6, i32* %2
store i32 6, i32* %3
store i32 6, i32* %4
store i32 8, i32* %5
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 6
br i1 %7, label %8, label %9
8: ; preds = %0
store i32 7, i32* %2
br label %10
9: ; preds = %0
store i32 66, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %4
%12 = icmp eq i32 %11, 5
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 6, i32* %4
br label %15
14: ; preds = %10
br label %24
15: ; preds = %13
%16 = load i32, i32* %2
%17 = icmp eq i32 %16, 99
br i1 %17, label %18, label %19
18: ; preds = %15
br label %26
19: ; preds = %15
%20 = load i32, i32* %5
%21 = icmp eq i32 %20, 13
br i1 %21, label %22, label %23
22: ; preds = %19
store i32 12, i32* %5
br label %25
23: ; preds = %19
br label %24
24: ; preds = %23, %14
store i32 1, i32* %1
br label %27
25: ; preds = %22
br label %26
26: ; preds = %25, %18
store i32 0, i32* %1
br label %27
27: ; preds = %26, %24
%28 = load i32, i32* %1
ret i32 %28
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
long double longdouble_ignoring_longlong(long double x, long long y) {
  return x;
}


x86 assembly (clang, -O0):
<longdouble_ignoring_longlong>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<longdouble_ignoring_longlong>:
fldt   0x8(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @longdouble_ignoring_longlong(x86_fp80 %0, i64 %1) {
%3 = alloca x86_fp80
%4 = alloca i64
store x86_fp80 %0, x86_fp80* %3
store i64 %1, i64* %4
%5 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @longdouble_ignoring_longlong(x86_fp80 returned %0, i64 %1) {
ret x86_fp80 %0
}
int waking_non_zero_trylock(struct semaphore *sem) { return 0; }


x86 assembly (clang, -O0):
<waking_non_zero_trylock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<waking_non_zero_trylock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.semaphore = type opaque
define i32 @waking_non_zero_trylock(%struct.semaphore* %0) {
%2 = alloca %struct.semaphore*
store %struct.semaphore* %0, %struct.semaphore** %2
ret i32 0
}

LLVM IR (-O2):
%struct.semaphore = type opaque
define i32 @waking_non_zero_trylock(%struct.semaphore* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void assert_equals(char *expected, char *actual, size_t sz) {
  int i;
  for (i = 0; i < sz; i++) {
    assert(expected[i] == actual[i]);
  }
}


x86 assembly (clang, -O0):
<assert_equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    116e <assert_equals+0x5e>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x10(%rbp),%rcx
movslq -0x1c(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    112b <assert_equals+0x1b>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_equals>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     114d <assert_equals+0x3d>
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
movzbl (%r15,%rbx,1),%eax
xor    %edi,%edi
cmp    (%r14,%rbx,1),%al
sete   %dil
call   1030 <assert@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <assert_equals+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @assert_equals(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i32 0, i32* %7
br label %8
8: ; preds = %29, %3
%9 = load i32, i32* %7
%10 = sext i32 %9 to i64
%11 = load i64, i64* %6
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %32
13: ; preds = %8
%14 = load i8*, i8** %4
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8*, i8** %5
%21 = load i32, i32* %7
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %19, %25
%27 = zext i1 %26 to i32
%28 = call i32 @assert(i32 %27)
br label %29
29: ; preds = %13
%30 = load i32, i32* %7
%31 = add nsw i32 %30, 1
store i32 %31, i32* %7
br label %8
32: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @assert_equals(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %16, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %14, %5 ], [ 0, %3 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = getelementptr inbounds i8, i8* %1, i64 %6
%10 = load i8, i8* %9
%11 = icmp eq i8 %8, %10
%12 = zext i1 %11 to i32
%13 = tail call i32 @assert(i32 %12)
%14 = add nuw i64 %6, 1
%15 = icmp eq i64 %14, %2
br i1 %15, label %16, label %5
16: ; preds = %5, %3
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ rax;

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
bool cpuid_therm_interrupt_enable_PowerLimitNotify(void) {
  uint64_t rax, rbx, rcx, rdx;
  int leaf = 6;
  cpuid(leaf, &rax, &rbx, &rcx, &rdx);
  if ((((uint64_t)(rax) &
        ((((uint64_t)1 << (((4)) - ((4)) + 1)) - 1) << ((4)))) >>
       (4)) == 1) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<cpuid_therm_interrupt_enable_PowerLimitNotify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x6,-0x18(%rbp)
mov    -0x18(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <cpuid@plt>
mov    -0x8(%rbp),%eax
and    $0x10,%eax
sar    $0x4,%eax
cmp    $0x1,%eax
jne    1155 <cpuid_therm_interrupt_enable_PowerLimitNotify+0x45>
movl   $0x1,-0x4(%rbp)
jmp    115c <cpuid_therm_interrupt_enable_PowerLimitNotify+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_therm_interrupt_enable_PowerLimitNotify>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    $0x6,%edi
call   1030 <cpuid@plt>
mov    0x8(%rsp),%eax
shr    $0x4,%eax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @cpuid_therm_interrupt_enable_PowerLimitNotify() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 6, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @cpuid(i32 %7, i32* %2, i32* %3, i32* %4, i32* %5)
%9 = load i32, i32* %2
%10 = and i32 %9, 16
%11 = ashr i32 %10, 4
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, i32* %1
br label %15
14: ; preds = %0
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @cpuid_therm_interrupt_enable_PowerLimitNotify() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @cpuid(i32 6, i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %1
%11 = lshr i32 %10, 4
%12 = and i32 %11, 1
ret i32 %12
}
double e() { return 2.71828182845904523536; }


x86 assembly (clang, -O0):
<e>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<e>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @e() {
ret double 0x4005BF0A8B145769
}

LLVM IR (-O2):
define double @e() {
ret double 0x4005BF0A8B145769
}
unsigned long x86_read_cr0() {
  unsigned long val;
  __asm__ __volatile__("mov %%cr0, %0" : "=r"(val));
  return val;
}


x86 assembly (clang, -O0):
<x86_read_cr0>:
push   %rbp
mov    %rsp,%rbp
mov    %cr0,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86_read_cr0>:
mov    %cr0,%rax
ret

LLVM IR (-O0):
define i64 @x86_read_cr0() {
%1 = alloca i64
%2 = call i64 asm sideeffect "mov %cr0, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @x86_read_cr0() {
%1 = tail call i64 asm sideeffect "mov %cr0, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ event_dispatch();
void simplehttp_run() { event_dispatch(); }


x86 assembly (clang, -O0):
<simplehttp_run>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <event_dispatch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<simplehttp_run>:
xor    %eax,%eax
jmp    1030 <event_dispatch@plt>

LLVM IR (-O0):
define void @simplehttp_run() {
%1 = call i32 (...) @event_dispatch()
ret void
}

LLVM IR (-O2):
define void @simplehttp_run() {
%1 = tail call i32 (...) @event_dispatch()
ret void
}