int main(int argc, char *argv[]) {
  __attribute__((vector_size(8 * sizeof(short)))) short v0 = {
      (short)argc, 2, 3, 4, 5, 6, 7};
  __attribute__((vector_size(8 * sizeof(short)))) short v1 = {2, 2, 2, 2,
                                                              2, 2, 2};
  __attribute__((vector_size(8 * sizeof(short)))) short r1, r2, r3, r4;
  int i = 8;
  r1 = v0 << 1;
  r2 = v0 >> 1;
  r3 = v0 << v1;
  r4 = v0 >> v1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movaps 0xee7(%rip),%xmm0
mov    -0x8(%rbp),%eax
pinsrw $0x0,%eax,%xmm0
movaps %xmm0,-0x20(%rbp)
movaps 0xee4(%rip),%xmm0
movaps %xmm0,-0x30(%rbp)
movl   $0x8,-0x74(%rbp)
movaps -0x20(%rbp),%xmm0
paddw  %xmm0,%xmm0
movaps %xmm0,-0x40(%rbp)
movaps -0x20(%rbp),%xmm0
psraw  $0x1,%xmm0
movaps %xmm0,-0x50(%rbp)
movaps -0x20(%rbp),%xmm0
movaps -0x30(%rbp),%xmm1
movaps %xmm1,%xmm2
punpckhwd %xmm3,%xmm2
pslld  $0x17,%xmm2
movaps 0xeb5(%rip),%xmm3
paddd  %xmm3,%xmm2
cvttps2dq %xmm2,%xmm2
pslld  $0x10,%xmm2
psrad  $0x10,%xmm2
punpcklwd %xmm4,%xmm1
pslld  $0x17,%xmm1
paddd  %xmm3,%xmm1
cvttps2dq %xmm1,%xmm1
pslld  $0x10,%xmm1
psrad  $0x10,%xmm1
packssdw %xmm2,%xmm1
pmullw %xmm1,%xmm0
movaps %xmm0,-0x60(%rbp)
movaps -0x20(%rbp),%xmm0
movaps -0x30(%rbp),%xmm2
psllw  $0xc,%xmm2
movaps %xmm2,%xmm3
psraw  $0xf,%xmm3
movaps %xmm3,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x8,%xmm0
pand   %xmm3,%xmm0
por    %xmm1,%xmm0
paddw  %xmm2,%xmm2
movaps %xmm2,%xmm3
psraw  $0xf,%xmm3
movaps %xmm3,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x4,%xmm0
pand   %xmm3,%xmm0
por    %xmm1,%xmm0
paddw  %xmm2,%xmm2
movaps %xmm2,%xmm3
psraw  $0xf,%xmm3
movaps %xmm3,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x2,%xmm0
pand   %xmm3,%xmm0
por    %xmm1,%xmm0
paddw  %xmm2,%xmm2
psraw  $0xf,%xmm2
movaps %xmm2,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x1,%xmm0
pand   %xmm2,%xmm0
por    %xmm1,%xmm0
movdqa %xmm0,-0x70(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca <8 x i16>
%7 = alloca <8 x i16>
%8 = alloca <8 x i16>
%9 = alloca <8 x i16>
%10 = alloca <8 x i16>
%11 = alloca <8 x i16>
%12 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%13 = load i32, i32* %4
%14 = trunc i32 %13 to i16
%15 = insertelement <8 x i16> undef, i16 %14, i32 0
%16 = insertelement <8 x i16> %15, i16 2, i32 1
%17 = insertelement <8 x i16> %16, i16 3, i32 2
%18 = insertelement <8 x i16> %17, i16 4, i32 3
%19 = insertelement <8 x i16> %18, i16 5, i32 4
%20 = insertelement <8 x i16> %19, i16 6, i32 5
%21 = insertelement <8 x i16> %20, i16 7, i32 6
%22 = insertelement <8 x i16> %21, i16 0, i32 7
store <8 x i16> %22, <8 x i16>* %6
store <8 x i16> <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 0>, <8 x i16>* %7
store i32 8, i32* %12
%23 = load <8 x i16>, <8 x i16>* %6
%24 = shl <8 x i16> %23, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
store <8 x i16> %24, <8 x i16>* %8
%25 = load <8 x i16>, <8 x i16>* %6
%26 = ashr <8 x i16> %25, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
store <8 x i16> %26, <8 x i16>* %9
%27 = load <8 x i16>, <8 x i16>* %6
%28 = load <8 x i16>, <8 x i16>* %7
%29 = shl <8 x i16> %27, %28
store <8 x i16> %29, <8 x i16>* %10
%30 = load <8 x i16>, <8 x i16>* %6
%31 = load <8 x i16>, <8 x i16>* %7
%32 = ashr <8 x i16> %30, %31
store <8 x i16> %32, <8 x i16>* %11
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}