xunge/DecIR huggingface dataset:
void ff_hevc_put_hevc_uni_w_qpel_v48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v48_10_sse4() {
ret void
}
/* Variables and functions */
scalar_t__ strchr(char *, char);
int brkany(char c, char *str) { return str && c && strchr(str, c); }


x86 assembly (clang, -O0):
<brkany>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     115b <brkany+0x4b>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     115b <brkany+0x4b>
mov    -0x10(%rbp),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brkany>:
xor    %eax,%eax
test   %dil,%dil
je     113a <brkany+0x2a>
test   %rsi,%rsi
je     113a <brkany+0x2a>
push   %rax
movsbl %dil,%eax
mov    %rsi,%rdi
mov    %eax,%esi
call   1030 <strchr@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @brkany(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %3
%14 = call i64 @strchr(i8* %12, i8 signext %13)
%15 = icmp ne i64 %14, 0
br label %16
16: ; preds = %11, %7, %2
%17 = phi i1 [ false, %7 ], [ false, %2 ], [ %15, %11 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @brkany(i8 signext %0, i8* %1) {
%3 = icmp ne i8* %1, null
%4 = icmp ne i8 %0, 0
%5 = and i1 %4, %3
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i64 @strchr(i8* %1, i8 signext %0)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %2
%11 = phi i32 [ 0, %2 ], [ %9, %6 ]
ret i32 %11
}
void _M2_RTgenif_finish(__attribute__((unused)) int argc,
                        __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_RTgenif_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_RTgenif_finish>:
ret

LLVM IR (-O0):
define void @_M2_RTgenif_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_RTgenif_finish(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_append_standard_solution(int n, int m, double *sol) {
  int *a, fail;
  int b[2];
  b[0] = n;
  b[1] = m;
  fail = _ada_use_c2phc4c(36, a, b, sol, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_append_standard_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
lea    -0x24(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x24,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_append_standard_solution>:
push   %rax
mov    %rdx,%rcx
mov    %edi,(%rsp)
mov    %esi,0x4(%rsp)
mov    %rsp,%rdx
mov    $0x24,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_append_standard_solution(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca [2 x i32]
store i32 %0, i32* %4
store i32 %1, i32* %5
store double* %2, double** %6
%10 = load i32, i32* %4
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %12, i32* %13
%14 = load i32*, i32** %7
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%16 = load double*, double** %6
%17 = call i32 @_ada_use_c2phc4c(i32 36, i32* %14, i32* %15, double* %16, i32 0)
store i32 %17, i32* %8
%18 = load i32, i32* %8
ret i32 %18
}

LLVM IR (-O2):
define i32 @solcon_append_standard_solution(i32 %0, i32 %1, double* %2) {
%4 = alloca [2 x i32]
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %7
%8 = call i32 @_ada_use_c2phc4c(i32 36, i32* undef, i32* %6, double* %2, i32 0)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;

/* Variables and functions */
int /*<<< orphan*/ NID_sha384;
int jksengine_digests_update(int /*<<< orphan*/ *, void const *, unsigned long,
                             int /*<<< orphan*/);
int jksengine_sha384_update(EVP_MD_CTX *ctx, const void *data,
                            unsigned long count) {
  ;
  return (jksengine_digests_update(ctx, data, count, NID_sha384));
}


x86 assembly (clang, -O0):
<jksengine_sha384_update>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rax
mov    (%rax),%ecx
call   1030 <jksengine_digests_update@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jksengine_sha384_update>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <jksengine_digests_update@plt>

LLVM IR (-O0):
@NID_sha384 = global i32 0
define i32 @jksengine_sha384_update(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = load i32, i32* @NID_sha384
%11 = call i32 @jksengine_digests_update(i32* %7, i8* %8, i64 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
@NID_sha384 = global i32 0
define i32 @jksengine_sha384_update(i32* %0, i8* %1, i64 %2) {
%4 = load i32, i32* @NID_sha384
%5 = tail call i32 @jksengine_digests_update(i32* %0, i8* %1, i64 %2, i32 %4)
ret i32 %5
}
void f2(int i) {}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
ret

LLVM IR (-O0):
define void @f2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @f2(i32 %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t hangul_compose_lvt(int32_t lvpart, int32_t tpart) {
  int32_t tindex = tpart - 0x11A7;
  int32_t s = lvpart + tindex;
  return s;
}


x86 assembly (clang, -O0):
<hangul_compose_lvt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x11a7,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hangul_compose_lvt>:
lea    (%rdi,%rsi,1),%rax
add    $0xffffffffffffee59,%rax
ret

LLVM IR (-O0):
define i64 @hangul_compose_lvt(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %4
%8 = sub nsw i64 %7, 4519
store i64 %8, i64* %5
%9 = load i64, i64* %3
%10 = load i64, i64* %5
%11 = add nsw i64 %9, %10
store i64 %11, i64* %6
%12 = load i64, i64* %6
ret i64 %12
}

LLVM IR (-O2):
define i64 @hangul_compose_lvt(i64 %0, i64 %1) {
%3 = add i64 %0, -4519
%4 = add i64 %3, %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ log_exit(char *, int);
void signal_exit(int sig) { log_exit("exit by singnal %d", sig); }


x86 assembly (clang, -O0):
<signal_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <log_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_exit>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <log_exit@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"exit by singnal %d\00"
define void @signal_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @log_exit(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"exit by singnal %d\00"
define void @signal_exit(i32 %0) {
%2 = tail call i32 @log_exit(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int send_event;
};
struct TYPE_4__ {
  TYPE_1__ xbutton;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xbutton_send_event(void *_p, int _v) {
  ((XEvent *)_p)->xbutton.send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xbutton_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xbutton_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xbutton_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xbutton_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void anull(double *x, int p) {
  int i;
  for (i = 0; i < p; i++) {
    x[i] = 0.0;
  }
}


x86 assembly (clang, -O0):
<anull>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <anull+0x3c>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <anull+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<anull>:
test   %esi,%esi
jle    1126 <anull+0x16>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @anull(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load double*, double** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double, double* %11, i64 %13
store double 0.000000e+00, double* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @anull(double* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast double* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 3
br label %8
8: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
char *fgets(char *, int, int /*<<< orphan*/ *);
int GetFastaHeaderLine(FILE *fp, char *header) {
  char *ret;
  ret = fgets(header, 2048, fp);
  if (ret != header) {
    return EOF;
  }
  return 1;
}


x86 assembly (clang, -O0):
<GetFastaHeaderLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x800,%esi
call   1030 <fgets@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     1155 <GetFastaHeaderLine+0x45>
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <GetFastaHeaderLine+0x4c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetFastaHeaderLine>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rdx
mov    %rsi,%rdi
mov    $0x800,%esi
call   1030 <fgets@plt>
mov    %rax,%rcx
mov    $0x1,%eax
cmp    %rbx,%rcx
je     113a <GetFastaHeaderLine+0x2a>
mov    0x2eb0(%rip),%rax
mov    (%rax),%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @GetFastaHeaderLine(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = load i32*, i32** %4
%9 = call i8* @fgets(i8* %7, i32 2048, i32* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = load i8*, i8** %5
%12 = icmp ne i8* %10, %11
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* @EOF
store i32 %14, i32* %3
br label %16
15: ; preds = %2
store i32 1, i32* %3
br label %16
16: ; preds = %15, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @GetFastaHeaderLine(i32* nocapture %0, i8* %1) {
%3 = tail call i8* @fgets(i8* %1, i32 2048, i32* %0)
%4 = icmp eq i8* %3, %1
%5 = load i32, i32* @EOF
%6 = select i1 %4, i32 1, i32 %5
ret i32 %6
}
unsigned long b_smp_set(void *codeptr, void *dataptr, unsigned long cpu) {
  unsigned long tlong;
  asm volatile("call *0x00100030"
               : "=a"(tlong)
               : "a"(codeptr), "d"(dataptr), "c"(cpu));
  return tlong;
}


x86 assembly (clang, -O0):
<b_smp_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   *0x100030
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_smp_set>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rax
call   *0x100030
ret

LLVM IR (-O0):
define i64 @b_smp_set(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 asm sideeffect "call *0x00100030", "={ax},{ax},{dx},{cx},~{dirflag},~{fpsr},~{flags}"(i8* %8, i8* %9, i64 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
ret i64 %12
}

LLVM IR (-O2):
define i64 @b_smp_set(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 asm sideeffect "call *0x00100030", "={ax},{ax},{dx},{cx},~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1, i64 %2)
ret i64 %4
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
int /*<<< orphan*/ gfx_pci_config_write(int, unsigned long);
int gfx_enable_softvga(void) {
  unsigned long reg_val;
  reg_val = gfx_pci_config_read(0x80009444);
  gfx_pci_config_write(0x80009444, reg_val & 0xfffffffe);
  reg_val = gfx_pci_config_read(0x80009444);
  if ((reg_val & 0x1) == 0)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<gfx_enable_softvga>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
movabs $0xfffffffe,%rsi
and    -0x10(%rbp),%rsi
mov    $0x80009444,%edi
call   1030 <gfx_pci_config_write@plt>
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    117a <gfx_enable_softvga+0x5a>
movl   $0x1,-0x4(%rbp)
jmp    1181 <gfx_enable_softvga+0x61>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_enable_softvga>:
push   %rax
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
and    $0xfffffffe,%eax
mov    $0x80009444,%edi
mov    %rax,%rsi
call   1030 <gfx_pci_config_write@plt>
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
not    %eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gfx_enable_softvga() {
%1 = alloca i32
%2 = alloca i64
%3 = call i64 @gfx_pci_config_read(i32 -2147445692)
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 4294967294
%6 = call i32 @gfx_pci_config_write(i32 -2147445692, i64 %5)
%7 = call i64 @gfx_pci_config_read(i32 -2147445692)
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = and i64 %8, 1
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 1, i32* %1
br label %13
12: ; preds = %0
store i32 0, i32* %1
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @gfx_enable_softvga() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147445692)
%2 = and i64 %1, 4294967294
%3 = tail call i32 @gfx_pci_config_write(i32 -2147445692, i64 %2)
%4 = tail call i64 @gfx_pci_config_read(i32 -2147445692)
%5 = trunc i64 %4 to i32
%6 = and i32 %5, 1
%7 = xor i32 %6, 1
ret i32 %7
}
int is_label(char *arr) {
  int i = 0;
  while (arr[i] != '\0') {
    if (arr[i] == ':') {
      arr[i] = '\0';
      return 1;
    }
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_label>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115f <is_label+0x5f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x3a,%eax
jne    1151 <is_label+0x51>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
movl   $0x1,-0x4(%rbp)
jmp    1166 <is_label+0x66>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <is_label+0xf>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_label>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1123 <is_label+0x23>
cmp    $0x3a,%cl
je     1126 <is_label+0x26>
add    $0x1,%rax
jmp    1110 <is_label+0x10>
xor    %eax,%eax
ret
mov    %eax,%eax
movb   $0x0,(%rdi,%rax,1)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_label(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %26, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %29
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 58
br i1 %20, label %21, label %26
21: ; preds = %13
%22 = load i8*, i8** %3
%23 = load i32, i32* %4
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %22, i64 %24
store i8 0, i8* %25
store i32 1, i32* %2
br label %30
26: ; preds = %13
%27 = load i32, i32* %4
%28 = add nsw i32 %27, 1
store i32 %28, i32* %4
br label %5
29: ; preds = %5
store i32 0, i32* %2
br label %30
30: ; preds = %29, %21
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @is_label(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i64 [ %10, %9 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %9 [
i8 0, label %11
i8 58, label %6
]
6: ; preds = %2
%7 = and i64 %3, 4294967295
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 0, i8* %8
br label %11
9: ; preds = %2
%10 = add nuw i64 %3, 1
br label %2
11: ; preds = %2, %6
%12 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %12
}
/* Variables and functions */
int random();
int duration() {
  int r = (random() % 5) + 1;
  return r;
}


x86 assembly (clang, -O0):
<duration>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <random@plt>
mov    $0x5,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<duration>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
add    %ecx,%eax
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @duration() {
%1 = alloca i32
%2 = call i32 (...) @random()
%3 = srem i32 %2, 5
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @duration() {
%1 = tail call i32 (...) @random()
%2 = srem i32 %1, 5
%3 = add nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int cmp_vector_array_idxs_max(void *, void const *, void const *);
int rcmp_vector_array_idxs_max(void *qsort_thunk_vp, const void *xvp,
                               const void *yvp) {
  return -1 * cmp_vector_array_idxs_max(qsort_thunk_vp, xvp, yvp);
}


x86 assembly (clang, -O0):
<rcmp_vector_array_idxs_max>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <cmp_vector_array_idxs_max@plt>
imul   $0xffffffff,%eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcmp_vector_array_idxs_max>:
push   %rax
call   1030 <cmp_vector_array_idxs_max@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rcmp_vector_array_idxs_max(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @cmp_vector_array_idxs_max(i8* %7, i8* %8, i8* %9)
%11 = mul nsw i32 -1, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @rcmp_vector_array_idxs_max(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @cmp_vector_array_idxs_max(i8* %0, i8* %1, i8* %2)
%5 = sub nsw i32 0, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int rand();
int main() {
  for (int i = 0; i < 8000; i++) {
    printf("%d \n", rand());
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1f40,-0x8(%rbp)
jge    1166 <main+0x46>
mov    $0x0,%al
call   1040 <rand@plt>
mov    %eax,%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1f40,%ebp
lea    0xed1(%rip),%rbx
nop
xor    %eax,%eax
call   1040 <rand@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
add    $0xffffffff,%ebp
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 8000
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = call i32 (...) @rand()
%8 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d \0A\00"
define i32 @main() {
br label %2
1: ; preds = %2
ret i32 0
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %6, %2 ]
%4 = tail call i32 (...) @rand()
%5 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = add nuw nsw i32 %3, 1
%7 = icmp eq i32 %6, 8000
br i1 %7, label %1, label %2
}
void deltas_wait_read_finished(void) {}


x86 assembly (clang, -O0):
<deltas_wait_read_finished>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deltas_wait_read_finished>:
ret

LLVM IR (-O0):
define void @deltas_wait_read_finished() {
ret void
}

LLVM IR (-O2):
define void @deltas_wait_read_finished() {
ret void
}
/* Variables and functions */
float logf(float);
float log2f(float f) { return logf(f) / logf(2.0f); }


x86 assembly (clang, -O0):
<log2f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <logf@plt>
movss  %xmm0,-0x8(%rbp)
movss  0xecc(%rip),%xmm0
call   1030 <logf@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2f>:
push   %rax
call   1030 <logf@plt>
divss  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @log2f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @logf(float %3)
%5 = call float @logf(float 2.000000e+00)
%6 = fdiv float %4, %5
ret float %6
}

LLVM IR (-O2):
define float @log2f(float %0) {
%2 = tail call float @logf(float %0)
%3 = fdiv float %2, 0x3FE62E4300000000
ret float %3
}
long double fabsl(long double x) { return ((x < 0) ? -x : x); }


x86 assembly (clang, -O0):
<fabsl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fldz
fucomip %st(1),%st
fstp   %st(0)
jbe    112b <fabsl+0x2b>
jmp    111e <fabsl+0x1e>
fldt   -0x10(%rbp)
fchs
fstpt  -0x1c(%rbp)
jmp    1131 <fabsl+0x31>
fldt   -0x10(%rbp)
fstpt  -0x1c(%rbp)
fldt   -0x1c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabsl>:
fldt   0x8(%rsp)
fldz
fucomip %st(1),%st
fld    %st(0)
fchs
fxch   %st(1)
fcmovnbe %st(1),%st
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fabsl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp olt x86_fp80 %3, 0xK00000000000000000000
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load x86_fp80, x86_fp80* %2
%7 = fneg x86_fp80 %6
br label %10
8: ; preds = %1
%9 = load x86_fp80, x86_fp80* %2
br label %10
10: ; preds = %8, %5
%11 = phi x86_fp80 [ %7, %5 ], [ %9, %8 ]
ret x86_fp80 %11
}

LLVM IR (-O2):
define x86_fp80 @fabsl(x86_fp80 %0) {
%2 = fcmp olt x86_fp80 %0, 0xK00000000000000000000
%3 = fneg x86_fp80 %0
%4 = select i1 %2, x86_fp80 %3, x86_fp80 %0
ret x86_fp80 %4
}
/* Variables and functions */
char *XtMalloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *savestr(const char *s) {
  char *n;
  if (!s)
    return 0;
  n = XtMalloc(strlen(s) + 1);
  if (n)
    strcpy(n, s);
  return n;
}


x86 assembly (clang, -O0):
<savestr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <savestr+0x24>
movq   $0x0,-0x8(%rbp)
jmp    118d <savestr+0x5d>
mov    -0x10(%rbp),%rdi
call   1050 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1040 <XtMalloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1185 <savestr+0x55>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<savestr>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115f <savestr+0x2f>
mov    %rdi,%r14
call   1050 <strlen@plt>
lea    0x1(%rax),%rdi
call   1040 <XtMalloc@plt>
test   %rax,%rax
je     115f <savestr+0x2f>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    1161 <savestr+0x31>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @savestr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %21
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %10, 1
%12 = call i8* @XtMalloc(i64 %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %19
15: ; preds = %8
%16 = load i8*, i8** %4
%17 = load i8*, i8** %3
%18 = call i32 @strcpy(i8* %16, i8* %17)
br label %19
19: ; preds = %15, %8
%20 = load i8*, i8** %4
store i8* %20, i8** %2
br label %21
21: ; preds = %19, %7
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @savestr(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @XtMalloc(i64 %5)
%7 = icmp eq i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %10
10: ; preds = %3, %8, %1
%11 = phi i8* [ null, %1 ], [ %6, %8 ], [ null, %3 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
int poweroff_go() {
  printf("Shutting down the system...\n");
  system("sudo shutdown -P 00");
  return 0;
}


x86 assembly (clang, -O0):
<poweroff_go>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
lea    0xee6(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<poweroff_go>:
push   %rax
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Shutting down the system...\0A\00"
@.str.1 = [20 x i8] c"sudo shutdown -P 00\00"
define i32 @poweroff_go() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [20 x i8] c"sudo shutdown -P 00\00"
@str = [28 x i8] c"Shutting down the system...\00"
define i32 @poweroff_go() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void f(void) {
  printf("1st strong f from %s\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/wcnnbdk1/hello_world/refs/heads/master/"
         "CLearning/CPrimerPlus/chap09/s1.c");
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef4(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0xee9(%rip),%rdi
lea    0xef8(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"1st strong f from %s\0A\00"
@.str.1 = [163 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/wcnnbdk1/hello_world/refs/heads/master/CLearning/CPrimerPlus/chap09/s1.c\00"
define void @f() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([163 x i8], [163 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"1st strong f from %s\0A\00"
@.str.1 = [163 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/wcnnbdk1/hello_world/refs/heads/master/CLearning/CPrimerPlus/chap09/s1.c\00"
define void @f() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([163 x i8], [163 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
double gsl_fdiv(double, double);
double gsl_nan(void) { return gsl_fdiv(0.0, 0.0); }


x86 assembly (clang, -O0):
<gsl_nan>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm1,%xmm1
movaps %xmm1,%xmm0
call   1030 <gsl_fdiv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsl_nan>:
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
jmp    1030 <gsl_fdiv@plt>

LLVM IR (-O0):
define double @gsl_nan() {
%1 = call double @gsl_fdiv(double 0.000000e+00, double 0.000000e+00)
ret double %1
}

LLVM IR (-O2):
define double @gsl_nan() {
%1 = tail call double @gsl_fdiv(double 0.000000e+00, double 0.000000e+00)
ret double %1
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int c(void) {
  puts("4");
  return 4;
}


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x4,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"4\00"
define i32 @c() {
%1 = call i32 @puts(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 4
}

LLVM IR (-O2):
@.str = [2 x i8] c"4\00"
define i32 @c() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 4
}
int ck_ssh_is_installed() { return 0; }


x86 assembly (clang, -O0):
<ck_ssh_is_installed>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ck_ssh_is_installed>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ck_ssh_is_installed() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ck_ssh_is_installed() {
ret i32 0
}
int mystrlen(char *s) {
  int i = 0;
  while (s[i])
    i++;
  return i;
}


x86 assembly (clang, -O0):
<mystrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     112f <mystrlen+0x2f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <mystrlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrlen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <mystrlen+0x10>
ret

LLVM IR (-O0):
define i32 @mystrlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @mystrlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
int fun1014() { return 1014; }


x86 assembly (clang, -O0):
<fun1014>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1014>:
mov    $0x3f6,%eax
ret

LLVM IR (-O0):
define i32 @fun1014() {
ret i32 1014
}

LLVM IR (-O2):
define i32 @fun1014() {
ret i32 1014
}
const char *SCIPgetGitHash(void) { return "b1c222a"; }


x86 assembly (clang, -O0):
<SCIPgetGitHash>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCIPgetGitHash>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"b1c222a\00"
define i8* @SCIPgetGitHash() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"b1c222a\00"
define i8* @SCIPgetGitHash() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int __attribute__((unused)) bitchk(const uint32_t *bs, int v) {
  if (bs[v >> 5] & (1 << (v & 31)))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<bitchk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x14(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1141 <bitchk+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1148 <bitchk+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitchk>:
mov    %esi,%ecx
mov    %esi,%eax
sar    $0x5,%eax
cltq
mov    (%rdi,%rax,4),%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bitchk(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %5
%8 = ashr i32 %7, 5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %6, i64 %9
%11 = load i32, i32* %10
%12 = load i32, i32* %5
%13 = and i32 %12, 31
%14 = shl i32 1, %13
%15 = and i32 %11, %14
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %19
18: ; preds = %2
store i32 0, i32* %3
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @bitchk(i32* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 5
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = and i32 %1, 31
%8 = lshr i32 %6, %7
%9 = and i32 %8, 1
ret i32 %9
}
int default_compare(const void *data1, const void *data2) {
  if (data1 == data2) {
    return 0;
  } else if (data1 < data2) {
    return -1;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<default_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1126 <default_compare+0x26>
movl   $0x0,-0x4(%rbp)
jmp    1147 <default_compare+0x47>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1140 <default_compare+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    1147 <default_compare+0x47>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_compare>:
xor    %ecx,%ecx
xor    %eax,%eax
cmp    %rsi,%rdi
setae  %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @default_compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = icmp eq i8* %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = icmp ult i8* %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 -1, i32* %3
br label %16
15: ; preds = %10
store i32 1, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @default_compare(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = icmp ult i8* %0, %1
%5 = select i1 %4, i32 -1, i32 1
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
unsigned xrop3_187_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~S;
  stk1 = D | stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_187_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_187_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_187_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = xor i32 %15, -1
store i32 %16, i32* %8
%17 = load i32, i32* %5
%18 = load i32, i32* %8
%19 = or i32 %17, %18
store i32 %19, i32* %7
%20 = load i32, i32* %7
%21 = load i32, i32* %6
%22 = xor i32 %21, -1
%23 = and i32 %20, %22
%24 = load i32, i32* %5
%25 = load i32, i32* %6
%26 = and i32 %24, %25
%27 = or i32 %23, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @xrop3_187_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = xor i32 %4, -1
ret i32 %5
}
void ff_hevc_put_hevc_bi_qpel_h12_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_h12_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_h12_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_h12_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_h12_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main() {
  int c = 1;
  while (c <= 100)
    printf("\n\t%d", c++);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     114c <main+0x3c>
mov    -0x8(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%esi
lea    0xee1(%rip),%rbx
nop
lea    0x1(%rsi),%ebp
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %ebp,%esi
cmp    $0x65,%ebp
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"\0A\09%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 100
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0A\09%d\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 1, %0 ], [ %3, %1 ]
%3 = add nuw nsw i32 %2, 1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %2)
%5 = icmp eq i32 %3, 101
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr,
          "Usage: hpcurve <options>\n"
          " options:\n"
          "         -g <ratio>            Gear ratio\n"
          "         -w <weight>           Weight in kilograms\n"
          "         -d <wheel-diameter>   current wheel diameter in mm\n"
          "         -D <wheel-dimension>  standard wheel dimension in mm\n"
          " output options:\n"
          "         -b <begin-rpm>\n"
          "         -e <end-rpm>\n"
          "         -s <step-rpm>\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [337 x i8] c"Usage: hpcurve <options>\0A options:\0A -g <ratio> Gear ratio\0A -w <weight> Weight in kilograms\0A -d <wheel-diameter> current wheel diameter in mm\0A -D <wheel-dimension> standard wheel dimension in mm\0A output options:\0A -b <begin-rpm>\0A -e <end-rpm>\0A -s <step-rpm>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([337 x i8], [337 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [337 x i8] c"Usage: hpcurve <options>\0A options:\0A -g <ratio> Gear ratio\0A -w <weight> Weight in kilograms\0A -d <wheel-diameter> current wheel diameter in mm\0A -D <wheel-dimension> standard wheel dimension in mm\0A output options:\0A -b <begin-rpm>\0A -e <end-rpm>\0A -s <step-rpm>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([337 x i8], [337 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void fini_0(void) { printf("fini array 0\n"); }


x86 assembly (clang, -O0):
<fini_0>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fini_0>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"fini array 0\0A\00"
define void @fini_0() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"fini array 0\00"
define void @fini_0() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_F4uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xF4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F4uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xf4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F4uint64_highword_reg>:
movabs $0xf400000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F4uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 244
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F4uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 1047972020224
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
void sprint_div(char *str) { sprintf(str, "DIV   AB                        "); }


x86 assembly (clang, -O0):
<sprint_div>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_div>:
movups 0xf09(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movups 0xeee(%rip),%xmm0
movups %xmm0,(%rdi)
movb   $0x0,0x20(%rdi)
ret

LLVM IR (-O0):
@.str = [33 x i8] c"DIV AB \00"
define void @sprint_div(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"DIV AB \00"
define void @sprint_div(i8* nocapture writeonly %0) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(33) %0, i8* align 1 dereferenceable(33) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 33, i1 false)
ret void
}