xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int vied_bit_slice(unsigned int, int /*<<< orphan*/, unsigned int);
unsigned int vied_bit_shift_OR(unsigned int val1, unsigned int numbits,
                               unsigned int val2) {
  return (val1 << numbits) | vied_bit_slice(val2, 0, numbits);
}


x86 assembly (clang, -O0):
<vied_bit_shift_OR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%edx
xor    %esi,%esi
call   1030 <vied_bit_slice@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vied_bit_shift_OR>:
push   %rbx
mov    %esi,%ecx
mov    %edi,%ebx
shl    %cl,%ebx
mov    %edx,%edi
xor    %esi,%esi
mov    %ecx,%edx
call   1030 <vied_bit_slice@plt>
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @vied_bit_shift_OR(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = shl i32 %7, %8
%10 = load i32, i32* %6
%11 = load i32, i32* %5
%12 = call i32 @vied_bit_slice(i32 %10, i32 0, i32 %11)
%13 = or i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @vied_bit_shift_OR(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %0, %1
%5 = tail call i32 @vied_bit_slice(i32 %2, i32 0, i32 %1)
%6 = or i32 %5, %4
ret i32 %6
}
int is_leap_year(int year) {
  if (year % 100 == 0) {
    return (year % 4 == 0 && year % 400 == 0) ? 1 : 0;
  }
  return (year % 4 == 0) ? 1 : 0;
}


x86 assembly (clang, -O0):
<is_leap_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1160 <is_leap_year+0x60>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x9(%rbp)
jne    1148 <is_leap_year+0x48>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    117b <is_leap_year+0x7b>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_leap_year>:
movslq %edi,%rdx
imul   $0x51eb851f,%rdx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%eax
mov    %edx,%esi
sub    %eax,%esi
setne  %al
and    $0x3,%edx
sete   %cl
or     %esi,%edx
je     1131 <is_leap_year+0x31>
and    %cl,%al
movzbl %al,%eax
ret
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
ror    $0x4,%eax
cmp    $0xa3d70b,%eax
setb   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_leap_year(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 4
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i32, i32* %3
%13 = srem i32 %12, 400
%14 = icmp eq i32 %13, 0
br label %15
15: ; preds = %11, %7
%16 = phi i1 [ false, %7 ], [ %14, %11 ]
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 1, i32 0
store i32 %18, i32* %2
br label %25
19: ; preds = %1
%20 = load i32, i32* %3
%21 = srem i32 %20, 4
%22 = icmp eq i32 %21, 0
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 1, i32 0
store i32 %24, i32* %2
br label %25
25: ; preds = %19, %15
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @is_leap_year(i32 %0) {
%2 = srem i32 %0, 100
%3 = icmp ne i32 %2, 0
%4 = and i32 %0, 3
%5 = icmp eq i32 %4, 0
%6 = xor i1 %5, true
%7 = or i1 %3, %6
%8 = and i1 %3, %5
br i1 %7, label %12, label %9
9: ; preds = %1
%10 = srem i32 %0, 400
%11 = icmp eq i32 %10, 0
br label %12
12: ; preds = %1, %9
%13 = phi i1 [ %11, %9 ], [ %8, %1 ]
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Type definitions */
struct ip6_rthdr0 {
  int dummy;
};
struct in6_addr {
  int dummy;
};
struct cmsghdr {
  int dummy;
};

/* Variables and functions */
size_t inet6_srcrt_space(int type, int segments) {
  if (type != 0 || segments > 24)
    return 0;
  return (sizeof(struct cmsghdr) + sizeof(struct ip6_rthdr0) +
          segments * sizeof(struct in6_addr));
}


x86 assembly (clang, -O0):
<inet6_srcrt_space>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    111e <inet6_srcrt_space+0x1e>
cmpl   $0x18,-0x10(%rbp)
jle    112b <inet6_srcrt_space+0x2b>
movq   $0x0,-0x8(%rbp)
jmp    113b <inet6_srcrt_space+0x3b>
movslq -0x10(%rbp),%rax
shl    $0x2,%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet6_srcrt_space>:
xor    %ecx,%ecx
cmp    $0x19,%esi
movslq %esi,%rax
lea    0x8(,%rax,4),%rax
cmovge %rcx,%rax
test   %edi,%edi
cmovne %rcx,%rax
ret

LLVM IR (-O0):
define i64 @inet6_srcrt_space(i32 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 24
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i64 0, i64* %3
br label %17
12: ; preds = %8
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = mul i64 %14, 4
%16 = add i64 8, %15
store i64 %16, i64* %3
br label %17
17: ; preds = %12, %11
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @inet6_srcrt_space(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
%4 = icmp sgt i32 %1, 24
%5 = or i1 %3, %4
%6 = sext i32 %1 to i64
%7 = shl nsw i64 %6, 2
%8 = add nsw i64 %7, 8
%9 = select i1 %5, i64 0, i64 %8
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ sgen(char *, char *, char *);
void cgldgw(char *s) { sgen("%s\t%s,%%rax", "movq", s); }


x86 assembly (clang, -O0):
<cgldgw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xede(%rip),%rsi
call   1030 <sgen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgldgw>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeeb(%rip),%rsi
jmp    1030 <sgen@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%s\09%s,%%rax\00"
@.str.1 = [5 x i8] c"movq\00"
define void @cgldgw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sgen(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s\09%s,%%rax\00"
@.str.1 = [5 x i8] c"movq\00"
define void @cgldgw(i8* %0) {
%2 = tail call i32 @sgen(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
void setfeenv_() {
  fenv_t envp;
  int stat;
}


x86 assembly (clang, -O0):
<setfeenv_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setfeenv_>:
ret

LLVM IR (-O0):
define void @setfeenv_() {
%1 = alloca i32
%2 = alloca i32
ret void
}

LLVM IR (-O2):
define void @setfeenv_() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mpz_t;

/* Variables and functions */
int /*<<< orphan*/ mpz_sub(int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void gmpint_subz(mpz_t *rop, mpz_t *op, mpz_t *op2) {
  mpz_sub(*rop, *op, *op2);
}


x86 assembly (clang, -O0):
<gmpint_subz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
call   1030 <mpz_sub@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gmpint_subz>:
mov    (%rdi),%edi
mov    (%rsi),%esi
mov    (%rdx),%edx
jmp    1030 <mpz_sub@plt>

LLVM IR (-O0):
define void @gmpint_subz(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = call i32 @mpz_sub(i32 %8, i32 %10, i32 %12)
ret void
}

LLVM IR (-O2):
define void @gmpint_subz(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = tail call i32 @mpz_sub(i32 %4, i32 %5, i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lcd_print(unsigned char const *);
int /*<<< orphan*/ set_cursor(int, int);
void BSP_LCD_display_str(char *str, int line, int pos) {
  set_cursor(line, pos);
  lcd_print((unsigned char const *)str);
}


x86 assembly (clang, -O0):
<BSP_LCD_display_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <set_cursor@plt>
mov    -0x8(%rbp),%rdi
call   1030 <lcd_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_LCD_display_str>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
mov    %edx,%esi
call   1040 <set_cursor@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <lcd_print@plt>

LLVM IR (-O0):
define void @BSP_LCD_display_str(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = call i32 @set_cursor(i32 %7, i32 %8)
%10 = load i8*, i8** %4
%11 = call i32 @lcd_print(i8* %10)
ret void
}

LLVM IR (-O2):
define void @BSP_LCD_display_str(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @set_cursor(i32 %1, i32 %2)
%5 = tail call i32 @lcd_print(i8* %0)
ret void
}
int myspin(int n) {
  long int i, sum = 0, nn;
  nn = (long int)n;
  for (i = 0; i < n; i++) {
    sum += i;
  }
  return (int)sum;
}


x86 assembly (clang, -O0):
<myspin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x18(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x20(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
cmp    %rcx,%rax
jge    114d <myspin+0x4d>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111f <myspin+0x1f>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myspin>:
test   %edi,%edi
jle    111c <myspin+0x1c>
movslq %edi,%rax
lea    -0x1(%rax),%rcx
add    $0xfffffffffffffffe,%rax
imul   %rcx,%rax
shr    %rax
add    %edi,%eax
add    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @myspin(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %4
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
store i64 %7, i64* %5
store i64 0, i64* %3
br label %8
8: ; preds = %17, %1
%9 = load i64, i64* %3
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = icmp slt i64 %9, %11
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = add nsw i64 %15, %14
store i64 %16, i64* %4
br label %17
17: ; preds = %13
%18 = load i64, i64* %3
%19 = add nsw i64 %18, 1
store i64 %19, i64* %3
br label %8
20: ; preds = %8
%21 = load i64, i64* %4
%22 = trunc i64 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @myspin(i32 %0) {
%2 = sext i32 %0 to i64
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %14
4: ; preds = %1
%5 = add nsw i64 %2, -1
%6 = zext i64 %5 to i65
%7 = add nsw i64 %2, -2
%8 = zext i64 %7 to i65
%9 = mul i65 %6, %8
%10 = lshr i65 %9, 1
%11 = trunc i65 %10 to i32
%12 = add i32 %11, %0
%13 = add i32 %12, -1
br label %14
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %13, %4 ]
ret i32 %15
}
void caller_2_2_2_2_1_2_2() {}


x86 assembly (clang, -O0):
<caller_2_2_2_2_1_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_2_2_2_2_1_2_2>:
ret

LLVM IR (-O0):
define void @caller_2_2_2_2_1_2_2() {
ret void
}

LLVM IR (-O2):
define void @caller_2_2_2_2_1_2_2() {
ret void
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int printlock_regspace2_uniform_64k(struct flashrom_flashctx *);
int printlock_w39v080a(struct flashrom_flashctx *);
int printlock_w39v080fa(struct flashrom_flashctx *flash) {
  int ret = 0;
  ret = printlock_w39v080a(flash);
  ret |= printlock_regspace2_uniform_64k(flash);
  return ret;
}


x86 assembly (clang, -O0):
<printlock_w39v080fa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <printlock_w39v080a@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printlock_regspace2_uniform_64k@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printlock_w39v080fa>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <printlock_w39v080a@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <printlock_regspace2_uniform_64k@plt>
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @printlock_w39v080fa(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
%3 = alloca i32
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
store i32 0, i32* %3
%4 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%5 = call i32 @printlock_w39v080a(%struct.flashrom_flashctx* %4)
store i32 %5, i32* %3
%6 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%7 = call i32 @printlock_regspace2_uniform_64k(%struct.flashrom_flashctx* %6)
%8 = load i32, i32* %3
%9 = or i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @printlock_w39v080fa(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @printlock_w39v080a(%struct.flashrom_flashctx* %0)
%3 = tail call i32 @printlock_regspace2_uniform_64k(%struct.flashrom_flashctx* %0)
%4 = or i32 %3, %2
ret i32 %4
}
/* Variables and functions */
int cbuf(int, int, int);
cbuf36(int f, int n) { return (cbuf(f, n, 36)); }


x86 assembly (clang, -O0):
<cbuf36>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x24,%edx
call   1030 <cbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf36>:
mov    $0x24,%edx
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf36(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @cbuf(i32 %5, i32 %6, i32 36)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cbuf36(i32 %0, i32 %1) {
%3 = tail call i32 @cbuf(i32 %0, i32 %1, i32 36)
ret i32 %3
}
int test_imm_92uint8_reg(unsigned char val) {
  return ((val) & (-0x92 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_92uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff6e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_92uint8_reg>:
test   $0x6e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_92uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -146
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_92uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 110
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void str_cat(char *t, char *s) {
  while (*t++)
    ;
  t--;
  while (*t++ = *s++)
    ;
}


x86 assembly (clang, -O0):
<str_cat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1129 <str_cat+0x29>
jmp    110c <str_cat+0xc>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1164 <str_cat+0x64>
jmp    1135 <str_cat+0x35>
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_cat>:
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1100 <str_cat>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,-0x1(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <str_cat+0x10>
ret

LLVM IR (-O0):
define void @str_cat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %3
%8 = load i8, i8* %6
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5
br label %5
11: ; preds = %5
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 -1
store i8* %13, i8** %3
br label %14
14: ; preds = %21, %11
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
store i8 %17, i8* %18
%20 = icmp ne i8 %17, 0
br i1 %20, label %21, label %22
21: ; preds = %14
br label %14
22: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @str_cat(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %5, %3 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %4
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %8
%9 = phi i8* [ %13, %8 ], [ %4, %3 ]
%10 = phi i8* [ %11, %8 ], [ %1, %3 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %10
%13 = getelementptr inbounds i8, i8* %9, i64 1
store i8 %12, i8* %9
%14 = icmp eq i8 %12, 0
br i1 %14, label %15, label %8
15: ; preds = %8
ret void
}
void ff_hevc_put_hevc_bi_w_qpel_h32_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_h32_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_h32_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_h32_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_h32_8_sse4() {
ret void
}
void trace_dot(unsigned int id, const char *point, int value) { return; }


x86 assembly (clang, -O0):
<trace_dot>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_dot>:
ret

LLVM IR (-O0):
define void @trace_dot(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @trace_dot(i32 %0, i8* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_seriesof_num(int);
int main(void) {
  int n = 15;
  get_seriesof_num(n);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xf,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <get_seriesof_num@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xf,%edi
call   1030 <get_seriesof_num@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 15, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @get_seriesof_num(i32 %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @get_seriesof_num(i32 15)
ret i32 0
}
int max(int x, int y) {
  int z;
  z = x > y ? x : y;
  return (z);
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <max+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1127 <max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
store i32 %14, i32* %5
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int _jobs_usage(void) {
  fputs("Usage: jobs [-l | -p][job_id...]\n  -l	provide information about "
        "listed jobs (default: all)\n  -p	display process group leaders "
        "ID about listed jobs (default: all)\n",
        stderr);
  return 1;
}


x86 assembly (clang, -O0):
<_jobs_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_jobs_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [163 x i8] c"Usage: jobs [-l | -p][job_id...]\0A -l\09provide information about listed jobs (default: all)\0A -p\09display process group leaders ID about listed jobs (default: all)\0A\00"
@stderr = global i32 0
define i32 @_jobs_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([163 x i8], [163 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}

LLVM IR (-O2):
@.str = [163 x i8] c"Usage: jobs [-l | -p][job_id...]\0A -l\09provide information about listed jobs (default: all)\0A -p\09display process group leaders ID about listed jobs (default: all)\0A\00"
@stderr = global i32 0
define i32 @_jobs_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([163 x i8], [163 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}
int isNumeric(const char *str, const int strLength) {
  int i;
  int temp;
  for (i = 0; i < strLength; i++) {
    temp = (int)str[i];
    if ((temp < 48) || (temp > 57)) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<isNumeric>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1160 <isNumeric+0x60>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x30,-0x1c(%rbp)
jl     1141 <isNumeric+0x41>
cmpl   $0x39,-0x1c(%rbp)
jle    114d <isNumeric+0x4d>
movl   $0x1,-0x4(%rbp)
jmp    1167 <isNumeric+0x67>
jmp    1152 <isNumeric+0x52>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <isNumeric+0x12>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNumeric>:
test   %esi,%esi
jle    1125 <isNumeric+0x25>
mov    %esi,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
movzbl (%rdi,%rcx,1),%edx
add    $0xc6,%dl
cmp    $0xf5,%dl
jbe    1128 <isNumeric+0x28>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <isNumeric+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isNumeric(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %8
8: ; preds = %26, %2
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %29
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
store i32 %18, i32* %7
%19 = load i32, i32* %7
%20 = icmp slt i32 %19, 48
br i1 %20, label %24, label %21
21: ; preds = %12
%22 = load i32, i32* %7
%23 = icmp sgt i32 %22, 57
br i1 %23, label %24, label %25
24: ; preds = %21, %12
store i32 1, i32* %3
br label %30
25: ; preds = %21
br label %26
26: ; preds = %25
%27 = load i32, i32* %6
%28 = add nsw i32 %27, 1
store i32 %28, i32* %6
br label %8
29: ; preds = %8
store i32 0, i32* %3
br label %30
30: ; preds = %29, %24
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @isNumeric(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %14, %5
br i1 %7, label %15, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %14, %6 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = add i8 %11, -58
%13 = icmp ult i8 %12, -10
%14 = add nuw nsw i64 %9, 1
br i1 %13, label %15, label %6
15: ; preds = %8, %6, %2
%16 = phi i32 [ 0, %2 ], [ 0, %6 ], [ 1, %8 ]
ret i32 %16
}
/* Variables and functions */
void *calloc(unsigned int, size_t);
int /*<<< orphan*/ sprintf(char *, char *, long, long);
void *new_voidFss(int n, size_t size) {
  static char s[70];
  void *p = calloc((unsigned)n, size);
  if (p == NULL) {
    sprintf(s, "new_void(): calloc(%ld,%ld) failed", (long)n, (long)size);
  }
  return p;
}


x86 assembly (clang, -O0):
<new_voidFss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1165 <new_voidFss+0x45>
movslq -0x4(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0x2ee7(%rip),%rdi
lea    0xea0(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_voidFss>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114f <new_voidFss+0x2f>
movslq %ebp,%rdx
lea    0x2f00(%rip),%rdi
lea    0xeb9(%rip),%rsi
mov    %r14,%rcx
call   1040 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@new_voidFss.s = internal global [70 x i8] zeroinitializer
@.str = [35 x i8] c"new_void(): calloc(%ld,%ld) failed\00"
define i8* @new_voidFss(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i8*
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = load i32, i32* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i32 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = load i64, i64* %4
%15 = call i32 @sprintf(i8* getelementptr inbounds ([70 x i8], [70 x i8]* @new_voidFss.s, i64 0, i64 0), i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i64 %13, i64 %14)
br label %16
16: ; preds = %11, %2
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
@new_voidFss.s = internal global [70 x i8] zeroinitializer
@.str = [35 x i8] c"new_void(): calloc(%ld,%ld) failed\00"
define i8* @new_voidFss(i32 %0, i64 %1) {
%3 = tail call i8* @calloc(i32 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = sext i32 %0 to i64
%7 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @new_voidFss.s, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i64 %6, i64 %1)
br label %8
8: ; preds = %5, %2
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ by_ptr_pp(int /*<<< orphan*/);
int /*<<< orphan*/ sub();
void sub_by_ptr_pp(uint32_t x) {
  by_ptr_pp(x);
  sub();
}


x86 assembly (clang, -O0):
<sub_by_ptr_pp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <by_ptr_pp@plt>
mov    $0x0,%al
call   1040 <sub@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_by_ptr_pp>:
push   %rax
call   1030 <by_ptr_pp@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <sub@plt>

LLVM IR (-O0):
define void @sub_by_ptr_pp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @by_ptr_pp(i32 %3)
%5 = call i32 (...) @sub()
ret void
}

LLVM IR (-O2):
define void @sub_by_ptr_pp(i32 %0) {
%2 = tail call i32 @by_ptr_pp(i32 %0)
%3 = tail call i32 (...) @sub()
ret void
}
unsigned char cast_int_uchar_fast(int x) { return (unsigned char)x; }


x86 assembly (clang, -O0):
<cast_int_uchar_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_int_uchar_fast>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @cast_int_uchar_fast(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @cast_int_uchar_fast(i32 %0) {
%2 = trunc i32 %0 to i8
ret i8 %2
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, long);
main() {
  long nc;
  nc = 0;
  while (getchar() != EOF) {
    ++nc;
  }
  printf("%ld\n", nc);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2ea3(%rip),%rcx
cmp    (%rcx),%rax
je     115f <main+0x3f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <main+0x17>
mov    -0x10(%rbp),%rsi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0xffffffffffffffff,%rbx
mov    0x2eb6(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
add    $0x1,%rbx
cmp    (%r14),%rax
jne    1140 <main+0x20>
lea    0xea9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
br label %3
3: ; preds = %7, %0
%4 = call i64 (...) @getchar()
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i64, i64* %2
%9 = add nsw i64 %8, 1
store i64 %9, i64* %2
br label %3
10: ; preds = %3
%11 = load i64, i64* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %11)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = phi i64 [ 0, %0 ], [ %6, %1 ]
%3 = tail call i64 (...) @getchar()
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
%6 = add nuw nsw i64 %2, 1
br i1 %5, label %7, label %1
7: ; preds = %1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %2)
ret i32 0
}
void RTTarSeekNextFile(void) {}


x86 assembly (clang, -O0):
<RTTarSeekNextFile>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTarSeekNextFile>:
ret

LLVM IR (-O0):
define void @RTTarSeekNextFile() {
ret void
}

LLVM IR (-O2):
define void @RTTarSeekNextFile() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
int gt(uint16_t a, uint16_t b) {
  if (b != 0 && (a > b || a == 0))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<gt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     113c <gt+0x3c>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jg     1130 <gt+0x30>
cmpq   $0x0,-0x10(%rbp)
jne    113c <gt+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1143 <gt+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt>:
test   %rsi,%rsi
je     1114 <gt+0x14>
mov    $0x1,%eax
test   %rdi,%rdi
je     1116 <gt+0x16>
cmp    %rsi,%rdi
jg     1116 <gt+0x16>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gt(i64 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i64, i64* %4
%10 = load i64, i64* %5
%11 = icmp sgt i64 %9, %10
br i1 %11, label %15, label %12
12: ; preds = %8
%13 = load i64, i64* %4
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12, %8
store i32 1, i32* %3
br label %17
16: ; preds = %12, %2
store i32 0, i32* %3
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @gt(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = icmp sgt i64 %0, %1
%6 = icmp eq i64 %0, 0
%7 = or i1 %6, %5
br i1 %7, label %9, label %8
8: ; preds = %4, %2
br label %9
9: ; preds = %4, %8
%10 = phi i32 [ 0, %8 ], [ 1, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ main_menu();
int start_process() { main_menu(); }


x86 assembly (clang, -O0):
<start_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <main_menu@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_process>:
xor    %eax,%eax
jmp    1030 <main_menu@plt>

LLVM IR (-O0):
define i32 @start_process() {
%1 = alloca i32
%2 = call i32 (...) @main_menu()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @start_process() {
%1 = tail call i32 (...) @main_menu()
ret i32 undef
}
int getwinsize(int fd, int *row, int *col) { return -1; }


x86 assembly (clang, -O0):
<getwinsize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getwinsize>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @getwinsize(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @getwinsize(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2) {
ret i32 -1
}
int length(char *s1) {
  int i;
  for (i = 0; s1[i] != '\0'; i++) {
  }
  return i;
}


x86 assembly (clang, -O0):
<length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1137 <length+0x37>
jmp    1129 <length+0x29>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<length>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <length+0x10>
ret

LLVM IR (-O0):
define i32 @length(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %4
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @length(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Type definitions */
struct stat {
  scalar_t__ st_size;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
__attribute__((__unused__)) bool existss(const char *pathname) {
  struct stat buf;
  return (stat(pathname, &buf) == 0 && buf.st_size != 0);
}


x86 assembly (clang, -O0):
<existss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <stat@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x11(%rbp)
jne    1146 <existss+0x36>
cmpq   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<existss>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
sete   %al
cmpq   $0x0,(%rsp)
setne  %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i32 @existss(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @stat(i8* %4, %struct.stat* %3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%9 = load i64, i64* %8
%10 = icmp ne i64 %9, 0
br label %11
11: ; preds = %7, %1
%12 = phi i1 [ false, %1 ], [ %10, %7 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i32 @existss(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = icmp ne i64 %7, 0
%9 = select i1 %5, i1 %8, i1 false
%10 = zext i1 %9 to i32
ret i32 %10
}
void foo402() {}


x86 assembly (clang, -O0):
<foo402>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo402>:
ret

LLVM IR (-O0):
define void @foo402() {
ret void
}

LLVM IR (-O2):
define void @foo402() {
ret void
}
/* Variables and functions */
int EXIT_FAILURE;
int EXIT_SUCCESS;
scalar_t__ creat(char *, int);
int main(void) {
  if (0 > creat("arnold.layne", 0644))
    return EXIT_FAILURE;
  else
    return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x1a4,%esi
call   1030 <creat@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jle    114f <main+0x3f>
mov    0x2e9b(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    115b <main+0x4b>
mov    0x2e82(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1a4,%esi
call   1030 <creat@plt>
test   %rax,%rax
jns    1130 <main+0x20>
mov    0x2eb2(%rip),%rax
jmp    1137 <main+0x27>
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"arnold.layne\00"
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @creat(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 420)
%3 = icmp sgt i64 0, %2
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = load i32, i32* @EXIT_FAILURE
store i32 %5, i32* %1
br label %8
6: ; preds = %0
%7 = load i32, i32* @EXIT_SUCCESS
store i32 %7, i32* %1
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [13 x i8] c"arnold.layne\00"
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i64 @creat(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 420)
%2 = icmp slt i64 %1, 0
%3 = load i32, i32* @EXIT_FAILURE
%4 = load i32, i32* @EXIT_SUCCESS
%5 = select i1 %2, i32 %3, i32 %4
ret i32 %5
}
int mt_lbprof_enable(void) { return 0; }


x86 assembly (clang, -O0):
<mt_lbprof_enable>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_lbprof_enable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mt_lbprof_enable() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mt_lbprof_enable() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void printFunction(void *data) { printf("%s", (char *)data); }


x86 assembly (clang, -O0):
<printFunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printFunction>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @printFunction(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @printFunction(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
char *getages() {
  char *name = "wang xi";
  char name1[] = "wang xi";
  return name;
}


x86 assembly (clang, -O0):
<getages>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    0xeea(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getages>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"wang xi\00"
@__const.getages.name1 = [8 x i8] c"wang xi\00"
define i8* @getages() {
%1 = alloca i8*
%2 = alloca [8 x i8]
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %1
%3 = bitcast [8 x i8]* %2 to i8*
%4 = load i8*, i8** %1
ret i8* %4
}

LLVM IR (-O2):
@.str = [8 x i8] c"wang xi\00"
define i8* @getages() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int sweep_get_dobldobl_target(int n, double *c) {
  int fail, ptos[2];
  ptos[0] = 1;
  ptos[1] = 1;
  fail = _ada_use_c2phc4c(619, ptos, &n, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<sweep_get_dobldobl_target>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x1c(%rbp)
movl   $0x1,-0x18(%rbp)
lea    -0x1c(%rbp),%rsi
mov    -0x10(%rbp),%rcx
mov    $0x26b,%edi
lea    -0x4(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sweep_get_dobldobl_target>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %edi,0xc(%rsp)
movabs $0x100000001,%rax
mov    %rax,0x10(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
mov    $0x26b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @sweep_get_dobldobl_target(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca [2 x i32]
store i32 %0, i32* %3
store double* %1, double** %4
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
store i32 1, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
store i32 1, i32* %8
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%10 = load double*, double** %4
%11 = call i32 @_ada_use_c2phc4c(i32 619, i32* %9, i32* %3, double* %10, i32 0)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @sweep_get_dobldobl_target(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
store i32 %0, i32* %3
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 1, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 1, i32* %7
%8 = call i32 @_ada_use_c2phc4c(i32 619, i32* %6, i32* %3, double* %1, i32 0)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ cgpushlit(int);
int /*<<< orphan*/ gentext();
int /*<<< orphan*/ spill();
void genpushlit(int n) {
  gentext();
  spill();
  cgpushlit(n);
}


x86 assembly (clang, -O0):
<genpushlit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <gentext@plt>
mov    $0x0,%al
call   1030 <spill@plt>
mov    -0x4(%rbp),%edi
call   1050 <cgpushlit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genpushlit>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <gentext@plt>
xor    %eax,%eax
call   1030 <spill@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1050 <cgpushlit@plt>

LLVM IR (-O0):
define void @genpushlit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @gentext()
%4 = call i32 (...) @spill()
%5 = load i32, i32* %2
%6 = call i32 @cgpushlit(i32 %5)
ret void
}

LLVM IR (-O2):
define void @genpushlit(i32 %0) {
%2 = tail call i32 (...) @gentext()
%3 = tail call i32 (...) @spill()
%4 = tail call i32 @cgpushlit(i32 %0)
ret void
}
/* Variables and functions */
int ffs64(unsigned long);
int ffz(unsigned long bitmask) { return ffs64(~bitmask); }


x86 assembly (clang, -O0):
<ffz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    $0xffffffffffffffff,%rdi
call   1030 <ffs64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffz>:
not    %rdi
jmp    1030 <ffs64@plt>

LLVM IR (-O0):
define i32 @ffz(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, -1
%5 = call i32 @ffs64(i64 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @ffz(i64 %0) {
%2 = xor i64 %0, -1
%3 = tail call i32 @ffs64(i64 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ put8(unsigned char);
void shl_reg64_imm8(unsigned int reg64, unsigned char imm8) {
  put8(0x48);
  put8(0xC1);
  put8(0xE0 + reg64);
  put8(imm8);
}


x86 assembly (clang, -O0):
<shl_reg64_imm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0xc1,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%eax
add    $0xe0,%eax
movzbl %al,%edi
call   1030 <put8@plt>
movzbl -0x5(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shl_reg64_imm8>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0xc1,%edi
call   1030 <put8@plt>
add    $0xe0,%bpl
movzbl %bpl,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @shl_reg64_imm8(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = call i32 @put8(i8 zeroext 72)
%6 = call i32 @put8(i8 zeroext -63)
%7 = load i32, i32* %3
%8 = add i32 224, %7
%9 = trunc i32 %8 to i8
%10 = call i32 @put8(i8 zeroext %9)
%11 = load i8, i8* %4
%12 = call i32 @put8(i8 zeroext %11)
ret void
}

LLVM IR (-O2):
define void @shl_reg64_imm8(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @put8(i8 zeroext 72)
%4 = tail call i32 @put8(i8 zeroext -63)
%5 = trunc i32 %0 to i8
%6 = add i8 %5, -32
%7 = tail call i32 @put8(i8 zeroext %6)
%8 = tail call i32 @put8(i8 zeroext %1)
ret void
}