xunge/DecIR huggingface dataset:
int cairo_code_draw_tabDial_get_width() { return 60; }


x86 assembly (clang, -O0):
<cairo_code_draw_tabDial_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_tabDial_get_width>:
mov    $0x3c,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_tabDial_get_width() {
ret i32 60
}

LLVM IR (-O2):
define i32 @cairo_code_draw_tabDial_get_width() {
ret i32 60
}
double fatorial(double n) {
  double r = 1L;
  double f;
  for (f = 1; f <= n; f = f + 1)
    r = r * f;
  return r;
}


x86 assembly (clang, -O0):
<fatorial>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xee2(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     115d <fatorial+0x5d>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xeb2(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1123 <fatorial+0x23>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatorial>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     112e <fatorial+0x2e>
movsd  0xeea(%rip),%xmm2
movapd %xmm2,%xmm3
movapd %xmm2,%xmm1
xchg   %ax,%ax
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm3
ucomisd %xmm3,%xmm0
jae    1120 <fatorial+0x20>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @fatorial(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
store double 1.000000e+00, double* %3
store double 1.000000e+00, double* %4
br label %5
5: ; preds = %13, %1
%6 = load double, double* %4
%7 = load double, double* %2
%8 = fcmp ole double %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load double, double* %3
%11 = load double, double* %4
%12 = fmul double %10, %11
store double %12, double* %3
br label %13
13: ; preds = %9
%14 = load double, double* %4
%15 = fadd double %14, 1.000000e+00
store double %15, double* %4
br label %5
16: ; preds = %5
%17 = load double, double* %3
ret double %17
}

LLVM IR (-O2):
define double @fatorial(double %0) {
%2 = fcmp ult double %0, 1.000000e+00
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi double [ %7, %3 ], [ 1.000000e+00, %1 ]
%5 = phi double [ %6, %3 ], [ 1.000000e+00, %1 ]
%6 = fmul double %5, %4
%7 = fadd double %4, 1.000000e+00
%8 = fcmp ugt double %7, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi double [ 1.000000e+00, %1 ], [ %6, %3 ]
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
long f() {
  if (32 - 2 * 16 + 1)
    if (1)
      if (0)
        if (1)
          if (1)
            return 12;
          else if (0)
            return 13;
          else if (1)
            if (1)
              return 15;
            else if ((293 + 35 - 43 * 12) + 188)
              return 23;
  while (5 == 1) {
    printf("neat\n");
  }
  return -1;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <f+0x9>
xor    %eax,%eax
test   $0x1,%al
jne    1128 <f+0x18>
jmp    1139 <f+0x29>
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
jmp    1119 <f+0x9>
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"neat\0A\00"
define i64 @f() {
br label %1
1: ; preds = %2, %0
br i1 false, label %2, label %4
2: ; preds = %1
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %1
4: ; preds = %1
ret i64 -1
}

LLVM IR (-O2):
define i64 @f() {
ret i64 -1
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, ...);
int set_nonblocking(int fd) {
  int old_option = fcntl(fd, F_GETFL);
  int new_option = old_option | O_NONBLOCK;
  fcntl(fd, F_SETFL, new_option);
  return old_option;
}


x86 assembly (clang, -O0):
<set_nonblocking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2ead(%rip),%rcx
or     (%rcx),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_nonblocking>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
call   1030 <fcntl@plt>
mov    %eax,%ebp
mov    0x2eba(%rip),%rax
mov    (%rax),%edx
or     %ebp,%edx
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <fcntl@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
@F_SETFL = global i32 0
define i32 @set_nonblocking(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* @F_GETFL
%7 = call i32 (i32, i32, ...) @fcntl(i32 %5, i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = load i32, i32* @O_NONBLOCK
%10 = or i32 %8, %9
store i32 %10, i32* %4
%11 = load i32, i32* %2
%12 = load i32, i32* @F_SETFL
%13 = load i32, i32* %4
%14 = call i32 (i32, i32, ...) @fcntl(i32 %11, i32 %12, i32 %13)
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
@F_SETFL = global i32 0
define i32 @set_nonblocking(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %2)
%4 = load i32, i32* @O_NONBLOCK
%5 = or i32 %4, %3
%6 = load i32, i32* @F_SETFL
%7 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %6, i32 %5)
ret i32 %3
}
int test_imm_47uint8_reg(unsigned char val) {
  return ((val) & (0x47 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_47uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x47,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_47uint8_reg>:
test   $0x47,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_47uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 71
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_47uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 71
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void symbol31_randomtag(void) {}


x86 assembly (clang, -O0):
<symbol31_randomtag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<symbol31_randomtag>:
ret

LLVM IR (-O0):
define void @symbol31_randomtag() {
ret void
}

LLVM IR (-O2):
define void @symbol31_randomtag() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(float *, unsigned char *, int);
float R4(unsigned char *p) {
  float r = 0.0;
  memcpy(&r, p, 4);
  return r;
}


x86 assembly (clang, -O0):
<R4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<R4>:
push   %rax
mov    %rdi,%rsi
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
movss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @R4(i8* %0) {
%2 = alloca i8*
%3 = alloca float
store i8* %0, i8** %2
store float 0.000000e+00, float* %3
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(float* %3, i8* %4, i32 4)
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @R4(i8* %0) {
%2 = alloca float
%3 = bitcast float* %2 to i8*
store float 0.000000e+00, float* %2
%4 = call i32 @memcpy(float* %2, i8* %0, i32 4)
%5 = load float, float* %2
ret float %5
}
/* Variables and functions */
scalar_t__ Z_OK;
int /*<<< orphan*/ die(char *);
scalar_t__ uncompress(void *, unsigned long *, void *, unsigned int);
size_t do_uncompress(void *in, void *out, unsigned len) {
  unsigned long destlen = 140000;
  if (uncompress(out, &destlen, in, len) != Z_OK)
    die("Couldn't uncompress chunk");
  return destlen;
}


x86 assembly (clang, -O0):
<do_uncompress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movq   $0x222e0,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    -0x20(%rbp),%rsi
call   1030 <uncompress@plt>
mov    0x2e9a(%rip),%rcx
cmp    (%rcx),%rax
je     116b <do_uncompress+0x4b>
lea    0xe9a(%rip),%rdi
call   1040 <die@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_uncompress>:
push   %rax
mov    %edx,%ecx
mov    %rsi,%rax
mov    %rdi,%rdx
movq   $0x222e0,(%rsp)
mov    %rsp,%rsi
mov    %rax,%rdi
call   1030 <uncompress@plt>
mov    0x2ead(%rip),%rcx
cmp    (%rcx),%rax
je     1154 <do_uncompress+0x34>
lea    0xeb1(%rip),%rdi
call   1040 <die@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
@Z_OK = global i64 0
@.str = [26 x i8] c"Couldn't uncompress chunk\00"
define i64 @do_uncompress(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i64 140000, i64* %7
%8 = load i8*, i8** %5
%9 = load i8*, i8** %4
%10 = load i32, i32* %6
%11 = call i64 @uncompress(i8* %8, i64* %7, i8* %9, i32 %10)
%12 = load i64, i64* @Z_OK
%13 = icmp ne i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @die(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %3
%17 = load i64, i64* %7
ret i64 %17
}

LLVM IR (-O2):
@Z_OK = global i64 0
@.str = [26 x i8] c"Couldn't uncompress chunk\00"
define i64 @do_uncompress(i8* %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
store i64 140000, i64* %4
%6 = call i64 @uncompress(i8* %1, i64* %4, i8* %0, i32 %2)
%7 = load i64, i64* @Z_OK
%8 = icmp eq i64 %6, %7
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = call i32 @die(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %3
%12 = load i64, i64* %4
ret i64 %12
}
void gtk_list_store_newv() {}


x86 assembly (clang, -O0):
<gtk_list_store_newv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_list_store_newv>:
ret

LLVM IR (-O0):
define void @gtk_list_store_newv() {
ret void
}

LLVM IR (-O2):
define void @gtk_list_store_newv() {
ret void
}
/* Type definitions */
typedef char *uint64_t;
typedef char *int64_t;

/* Variables and functions */
int64_t rdtsc(void) {
  uint64_t i;
  asm volatile(".byte 0x0f, 0x31; " : "=A"(i) :);
  return i;
}


x86 assembly (clang, -O0):
<rdtsc>:
push   %rbp
mov    %rsp,%rbp
rdtsc
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdtsc>:
rdtsc
ret

LLVM IR (-O0):
define i8* @rdtsc() {
%1 = alloca i8*
%2 = call i8* asm sideeffect ".byte 0x0f, 0x31; ", "=A,~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @rdtsc() {
%1 = tail call i8* asm sideeffect ".byte 0x0f, 0x31; ", "=A,~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_wrctl(int, int);
void _Nios2_Set_ctlreg_ienable(uint32_t value) {
  __builtin_wrctl(3, (int)value);
}


x86 assembly (clang, -O0):
<_Nios2_Set_ctlreg_ienable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%esi
mov    $0x3,%edi
call   1030 <__builtin_wrctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_Set_ctlreg_ienable>:
mov    %rdi,%rsi
mov    $0x3,%edi
jmp    1030 <__builtin_wrctl@plt>

LLVM IR (-O0):
define void @_Nios2_Set_ctlreg_ienable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @__builtin_wrctl(i32 3, i32 %4)
ret void
}

LLVM IR (-O2):
define void @_Nios2_Set_ctlreg_ienable(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @__builtin_wrctl(i32 3, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PrintAllWatchdogs();
int S626_WatchdogEnableGet(int);
int /*<<< orphan*/ S626_WatchdogEnableSet(int, int);
int /*<<< orphan*/ S626_WatchdogPeriodSet(int, int /*<<< orphan*/);
void Toggle(int brd) {
  int data;
  data = S626_WatchdogEnableGet(brd);
  if (data) {
    S626_WatchdogEnableSet(brd, 0);
  } else {
    S626_WatchdogPeriodSet(brd, 0);
    S626_WatchdogEnableSet(brd, 1);
  }
  PrintAllWatchdogs();
}


x86 assembly (clang, -O0):
<Toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <S626_WatchdogEnableGet@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     116f <Toggle+0x2f>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1050 <S626_WatchdogEnableSet@plt>
jmp    1186 <Toggle+0x46>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1060 <S626_WatchdogPeriodSet@plt>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1050 <S626_WatchdogEnableSet@plt>
mov    $0x0,%al
call   1030 <PrintAllWatchdogs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Toggle>:
push   %rbx
mov    %edi,%ebx
call   1040 <S626_WatchdogEnableGet@plt>
xor    %esi,%esi
test   %eax,%eax
jne    115c <Toggle+0x1c>
mov    %ebx,%edi
xor    %esi,%esi
call   1060 <S626_WatchdogPeriodSet@plt>
mov    $0x1,%esi
mov    %ebx,%edi
call   1050 <S626_WatchdogEnableSet@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <PrintAllWatchdogs@plt>

LLVM IR (-O0):
define void @Toggle(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @S626_WatchdogEnableGet(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @S626_WatchdogEnableSet(i32 %9, i32 0)
br label %16
11: ; preds = %1
%12 = load i32, i32* %2
%13 = call i32 @S626_WatchdogPeriodSet(i32 %12, i32 0)
%14 = load i32, i32* %2
%15 = call i32 @S626_WatchdogEnableSet(i32 %14, i32 1)
br label %16
16: ; preds = %11, %8
%17 = call i32 (...) @PrintAllWatchdogs()
ret void
}

LLVM IR (-O2):
define void @Toggle(i32 %0) {
%2 = tail call i32 @S626_WatchdogEnableGet(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @S626_WatchdogPeriodSet(i32 %0, i32 0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
%8 = tail call i32 @S626_WatchdogEnableSet(i32 %0, i32 %7)
%9 = tail call i32 (...) @PrintAllWatchdogs()
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int _cmp_int32_t(const void *_a, const void *_b) {
  const int32_t *a = _a, *b = _b;
  if (*a < *b)
    return -1;
  else if (*a > *b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<_cmp_int32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jge    113c <_cmp_int32_t+0x3c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <_cmp_int32_t+0x63>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jle    115c <_cmp_int32_t+0x5c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <_cmp_int32_t+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cmp_int32_t>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_cmp_int32_t(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64*
%7 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
store i64* %9, i64** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i64*
store i64* %11, i64** %7
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i64*, i64** %7
%15 = load i64, i64* %14
%16 = icmp slt i64 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %26
18: ; preds = %2
%19 = load i64*, i64** %6
%20 = load i64, i64* %19
%21 = load i64*, i64** %7
%22 = load i64, i64* %21
%23 = icmp sgt i64 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @_cmp_int32_t(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = icmp sgt i64 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISDIR(int /*<<< orphan*/);
scalar_t__ stat(char const *, struct stat *);
int fsop_path_isdir(const char *path) {
  struct stat st;
  if (stat(path, &st) < 0)
    return -1;
  return S_ISDIR(st.st_mode);
}


x86 assembly (clang, -O0):
<fsop_path_isdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <stat@plt>
cmp    $0x0,%rax
jge    114f <fsop_path_isdir+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <fsop_path_isdir+0x3a>
mov    -0x18(%rbp),%edi
call   1030 <S_ISDIR@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsop_path_isdir>:
push   %rax
mov    %rsp,%rsi
call   1040 <stat@plt>
test   %rax,%rax
js     1138 <fsop_path_isdir+0x18>
mov    (%rsp),%edi
call   1030 <S_ISDIR@plt>
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @fsop_path_isdir(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %13
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @S_ISDIR(i32 %11)
store i32 %12, i32* %2
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @fsop_path_isdir(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp slt i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @S_ISDIR(i32 %8)
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %9, %6 ], [ -1, %1 ]
ret i32 %11
}
/* Variables and functions */
int partition(int *, int, int);
void quick_sort(int a[], int p, int r) {
  int q;
  if (p < r) {
    q = partition(a, p, r);
    quick_sort(a, p, q - 1);
    quick_sort(a, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quick_sort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ http_download_file();
int main(int argc, char *argv[]) {
  http_download_file();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <http_download_file@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <http_download_file@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @http_download_file()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @http_download_file()
ret i32 0
}
/* Variables and functions */
int vle_compl_add_path_match(char const *);
int vle_compl_add_last_path_match(const char origin[]) {
  return vle_compl_add_path_match(origin);
}


x86 assembly (clang, -O0):
<vle_compl_add_last_path_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vle_compl_add_path_match@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vle_compl_add_last_path_match>:
jmp    1030 <vle_compl_add_path_match@plt>

LLVM IR (-O0):
define i32 @vle_compl_add_last_path_match(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @vle_compl_add_path_match(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @vle_compl_add_last_path_match(i8* %0) {
%2 = tail call i32 @vle_compl_add_path_match(i8* %0)
ret i32 %2
}
int LexIsEndOfLine(char c) { return (c == '\n' ? 1 : 0); }


x86 assembly (clang, -O0):
<LexIsEndOfLine>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0xa,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LexIsEndOfLine>:
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @LexIsEndOfLine(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 10
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
ret i32 %7
}

LLVM IR (-O2):
define i32 @LexIsEndOfLine(i8 signext %0) {
%2 = icmp eq i8 %0, 10
%3 = zext i1 %2 to i32
ret i32 %3
}
int mlx5dr_matcher_destroy(struct mlx5dr_matcher *matcher) { return 0; }


x86 assembly (clang, -O0):
<mlx5dr_matcher_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx5dr_matcher_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mlx5dr_matcher = type opaque
define i32 @mlx5dr_matcher_destroy(%struct.mlx5dr_matcher* %0) {
%2 = alloca %struct.mlx5dr_matcher*
store %struct.mlx5dr_matcher* %0, %struct.mlx5dr_matcher** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mlx5dr_matcher = type opaque
define i32 @mlx5dr_matcher_destroy(%struct.mlx5dr_matcher* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
char *wnn_perror();
void err(void) {
  printf(wnn_perror());
  printf("\n bye.\n");
  exit(1);
}


x86 assembly (clang, -O0):
<err>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <wnn_perror@plt>
mov    %rax,%rdi
call   1040 <printf@plt>
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<err>:
push   %rax
xor    %eax,%eax
call   1040 <wnn_perror@plt>
mov    %rax,%rdi
call   1050 <printf@plt>
lea    0xea9(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"\0A bye.\0A\00"
define void @err() {
%1 = call i8* (...) @wnn_perror()
%2 = call i32 @printf(i8* %1)
%3 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [7 x i8] c"\0A bye.\00"
define void @err() {
%1 = tail call i8* (...) @wnn_perror()
%2 = tail call i32 @printf(i8* dereferenceable(1) %1)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ foo_hello();
int baz_hello(void) {
  foo_hello();
  return 1;
}


x86 assembly (clang, -O0):
<baz_hello>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo_hello@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz_hello>:
push   %rax
xor    %eax,%eax
call   1030 <foo_hello@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @baz_hello() {
%1 = call i32 (...) @foo_hello()
ret i32 1
}

LLVM IR (-O2):
define i32 @baz_hello() {
%1 = tail call i32 (...) @foo_hello()
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ parse_cmdline(int, char **);
int /*<<< orphan*/ run_all_tests();
int main(int argc, char **argv) {
  parse_cmdline(argc, argv);
  run_all_tests();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <parse_cmdline@plt>
mov    $0x0,%al
call   1030 <run_all_tests@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <parse_cmdline@plt>
xor    %eax,%eax
call   1030 <run_all_tests@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @parse_cmdline(i32 %6, i8** %7)
%9 = call i32 (...) @run_all_tests()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @parse_cmdline(i32 %0, i8** %1)
%4 = tail call i32 (...) @run_all_tests()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(int argc, char **argv) {
  (void)argc;
  fprintf(
      stderr,
      "Usage: %s [OPTIONS] TARGET src1 [src2 [...]]\n"
      "Try and reverse hashes\n"
      "\n"
      "OPTIONS:\n"
      " -p, --preload    preload next table during computation\n"
      "                  faster for long chains, uses twice as much of memory\n"
      "\n"
      "TARGET:\n"
      " -x, --hash HASH  sets the target to HASH\n"
      " -f, --file FILE  read the targets from FILE (- for stdin, one per "
      "line)\n"
      " -r, --random N   targets are N random string hashes (benchmarking)\n",
      argv[0]);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    (%rsi),%rdx
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [398 x i8] c"Usage: %s [OPTIONS] TARGET src1 [src2 [...]]\0ATry and reverse hashes\0A\0AOPTIONS:\0A -p, --preload preload next table during computation\0A faster for long chains, uses twice as much of memory\0A\0ATARGET:\0A -x, --hash HASH sets the target to HASH\0A -f, --file FILE read the targets from FILE (- for stdin, one per line)\0A -r, --random N targets are N random string hashes (benchmarking)\0A\00"
define void @usage(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @stderr
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
%10 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([398 x i8], [398 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [398 x i8] c"Usage: %s [OPTIONS] TARGET src1 [src2 [...]]\0ATry and reverse hashes\0A\0AOPTIONS:\0A -p, --preload preload next table during computation\0A faster for long chains, uses twice as much of memory\0A\0ATARGET:\0A -x, --hash HASH sets the target to HASH\0A -f, --file FILE read the targets from FILE (- for stdin, one per line)\0A -r, --random N targets are N random string hashes (benchmarking)\0A\00"
define void @usage(i32 %0, i8** nocapture %1) {
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %1
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([398 x i8], [398 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ arp_cache_dump();
int /*<<< orphan*/ arp_resolve(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ kprintf(char *);
void arp_test() {
  uint32_t ip;
  uint8_t mac[6];
  kprintf("ARP test\n");
  ip = (192 << 24) | (168 << 16) | (0 << 8) | (103 << 0);
  arp_resolve(ip, mac);
  ip = (192 << 24) | (168 << 16) | (0 << 8) | (102 << 0);
  arp_resolve(ip, mac);
  ip = (192 << 24) | (168 << 16) | (1 << 8) | (100 << 0);
  arp_resolve(ip, mac);
  arp_cache_dump();
}


x86 assembly (clang, -O0):
<arp_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xec1(%rip),%rdi
call   1050 <kprintf@plt>
movl   $0xc0a80067,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1040 <arp_resolve@plt>
movl   $0xc0a80066,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1040 <arp_resolve@plt>
movl   $0xc0a80164,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1040 <arp_resolve@plt>
mov    $0x0,%al
call   1030 <arp_cache_dump@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arp_test>:
push   %rbx
sub    $0x20,%rsp
lea    0xec4(%rip),%rdi
call   1050 <kprintf@plt>
mov    %rsp,%rbx
mov    $0xc0a80067,%edi
mov    %rbx,%rsi
call   1040 <arp_resolve@plt>
mov    $0xc0a80066,%edi
mov    %rbx,%rsi
call   1040 <arp_resolve@plt>
mov    $0xc0a80164,%edi
mov    %rbx,%rsi
call   1040 <arp_resolve@plt>
xor    %eax,%eax
call   1030 <arp_cache_dump@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"ARP test\0A\00"
define void @arp_test() {
%1 = alloca i32
%2 = alloca [6 x i32]
%3 = call i32 @kprintf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
store i32 -1062731673, i32* %1
%4 = load i32, i32* %1
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%6 = call i32 @arp_resolve(i32 %4, i32* %5)
store i32 -1062731674, i32* %1
%7 = load i32, i32* %1
%8 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%9 = call i32 @arp_resolve(i32 %7, i32* %8)
store i32 -1062731420, i32* %1
%10 = load i32, i32* %1
%11 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%12 = call i32 @arp_resolve(i32 %10, i32* %11)
%13 = call i32 (...) @arp_cache_dump()
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"ARP test\0A\00"
define void @arp_test() {
%1 = alloca [6 x i32]
%2 = bitcast [6 x i32]* %1 to i8*
%3 = tail call i32 @kprintf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%5 = call i32 @arp_resolve(i32 -1062731673, i32* %4)
%6 = call i32 @arp_resolve(i32 -1062731674, i32* %4)
%7 = call i32 @arp_resolve(i32 -1062731420, i32* %4)
%8 = call i32 (...) @arp_cache_dump()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
void *realloc(void *, int);
void *zalloc(void *p, int sz, int osz) {
  p = realloc(p, sz);
  memset((char *)p + osz, 0, sz - osz);
  return p;
}


x86 assembly (clang, -O0):
<zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0x10(%rbp),%rax
add    %rax,%rdi
mov    -0xc(%rbp),%edx
sub    -0x10(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zalloc>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
call   1040 <realloc@plt>
mov    %rax,%rbx
movslq %r14d,%rax
lea    (%rbx,%rax,1),%rdi
sub    %eax,%ebp
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @zalloc(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i8* @realloc(i8* %7, i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = sub nsw i32 %14, %15
%17 = call i32 @memset(i8* %13, i32 0, i32 %16)
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @zalloc(i8* %0, i32 %1, i32 %2) {
%4 = tail call i8* @realloc(i8* %0, i32 %1)
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %4, i64 %5
%7 = sub nsw i32 %1, %2
%8 = tail call i32 @memset(i8* %6, i32 0, i32 %7)
ret i8* %4
}
/* Variables and functions */
long double sqrt(double);
long double sqrtl(long double x) { return sqrt((double)x); }


x86 assembly (clang, -O0):
<sqrtl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <sqrt@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrtl>:
fldt   0x8(%rsp)
fstpl  -0x8(%rsp)
movsd  -0x8(%rsp),%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define x86_fp80 @sqrtl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fptrunc x86_fp80 %3 to double
%5 = call x86_fp80 @sqrt(double %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @sqrtl(x86_fp80 %0) {
%2 = fptrunc x86_fp80 %0 to double
%3 = tail call x86_fp80 @sqrt(double %2)
ret x86_fp80 %3
}
/* Variables and functions */
int f339(int *);
int f340(int *p) { return f339(p); }


x86 assembly (clang, -O0):
<f340>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f339@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f340>:
jmp    1030 <f339@plt>

LLVM IR (-O0):
define i32 @f340(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f339(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f340(i32* %0) {
%2 = tail call i32 @f339(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_EXTENSIONS;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_EXTENSIONS_it;
X509_EXTENSIONS *d2i_X509_EXTENSIONS(X509_EXTENSIONS **a,
                                     const unsigned char **in, long len) {
  return (X509_EXTENSIONS *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                          &X509_EXTENSIONS_it);
}


x86 assembly (clang, -O0):
<d2i_X509_EXTENSIONS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_X509_EXTENSIONS>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@X509_EXTENSIONS_it = global i32 0
define i32* @d2i_X509_EXTENSIONS(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @X509_EXTENSIONS_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@X509_EXTENSIONS_it = global i32 0
define i32* @d2i_X509_EXTENSIONS(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @X509_EXTENSIONS_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
unsigned char Termios2TncomDataSize(struct termios *);
int /*<<< orphan*/ tcgetattr(int, struct termios *);
unsigned char GetPortDataSize(int PortFd) {
  struct termios PortSettings;
  tcgetattr(PortFd, &PortSettings);
  return Termios2TncomDataSize(&PortSettings);
}


x86 assembly (clang, -O0):
<GetPortDataSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1040 <tcgetattr@plt>
lea    -0x8(%rbp),%rdi
call   1030 <Termios2TncomDataSize@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetPortDataSize>:
push   %rbx
sub    $0x10,%rsp
lea    0x8(%rsp),%rbx
mov    %rbx,%rsi
call   1040 <tcgetattr@plt>
mov    %rbx,%rdi
call   1030 <Termios2TncomDataSize@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
define zeroext i8 @GetPortDataSize(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.termios
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @tcgetattr(i32 %4, %struct.termios* %3)
%6 = call zeroext i8 @Termios2TncomDataSize(%struct.termios* %3)
ret i8 %6
}

LLVM IR (-O2):
%struct.termios = type { i32 }
define zeroext i8 @GetPortDataSize(i32 %0) {
%2 = alloca %struct.termios
%3 = bitcast %struct.termios* %2 to i8*
%4 = call i32 @tcgetattr(i32 %0, %struct.termios* %2)
%5 = call zeroext i8 @Termios2TncomDataSize(%struct.termios* %2)
ret i8 %5
}
/* Type definitions */
struct flashctx {
  int dummy;
};

/* Variables and functions */
int spi_disable_blockprotect_generic(struct flashctx *, int, int /*<<< orphan*/,
                                     int /*<<< orphan*/);
int spi_disable_blockprotect(struct flashctx *flash) {
  return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0);
}


x86 assembly (clang, -O0):
<spi_disable_blockprotect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3c,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <spi_disable_blockprotect_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_disable_blockprotect>:
mov    $0x3c,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <spi_disable_blockprotect_generic@plt>

LLVM IR (-O0):
%struct.flashctx = type { i32 }
define i32 @spi_disable_blockprotect(%struct.flashctx* %0) {
%2 = alloca %struct.flashctx*
store %struct.flashctx* %0, %struct.flashctx** %2
%3 = load %struct.flashctx*, %struct.flashctx** %2
%4 = call i32 @spi_disable_blockprotect_generic(%struct.flashctx* %3, i32 60, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashctx = type { i32 }
define i32 @spi_disable_blockprotect(%struct.flashctx* %0) {
%2 = tail call i32 @spi_disable_blockprotect_generic(%struct.flashctx* %0, i32 60, i32 0, i32 0)
ret i32 %2
}
__attribute__((always_)) void file_check_state(struct file *filp) {}


x86 assembly (clang, -O0):
<file_check_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_check_state>:
ret

LLVM IR (-O0):
%struct.file = type opaque
define void @file_check_state(%struct.file* %0) {
%2 = alloca %struct.file*
store %struct.file* %0, %struct.file** %2
ret void
}

LLVM IR (-O2):
%struct.file = type opaque
define void @file_check_state(%struct.file* nocapture %0) {
ret void
}
int test_imm_49int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x49 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_49int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x49,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_49int64_highword_mem>:
testb  $0x49,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_49int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 73
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_49int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 313532612608
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_negate(int x) { return -x; }


x86 assembly (clang, -O0):
<test_negate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_negate>:
mov    %edi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @test_negate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_negate(i32 %0) {
%2 = sub nsw i32 0, %0
ret i32 %2
}
/* Variables and functions */
char *infixToPostfix(char *);
scalar_t__ malloc(int);
char *reverse(char *);
char *infixToPrefix(char *s) {
  char *out = (char *)malloc(sizeof(char) * 100);
  out = reverse(s);
  out = infixToPostfix(out);
  out = reverse(out);
  return out;
}


x86 assembly (clang, -O0):
<infixToPrefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x64,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <reverse@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <infixToPostfix@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <reverse@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<infixToPrefix>:
push   %rbx
mov    %rdi,%rbx
mov    $0x64,%edi
call   1050 <malloc@plt>
mov    %rbx,%rdi
call   1030 <reverse@plt>
mov    %rax,%rdi
call   1040 <infixToPostfix@plt>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define i8* @infixToPrefix(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 @malloc(i32 100)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = call i8* @reverse(i8* %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = call i8* @infixToPostfix(i8* %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = call i8* @reverse(i8* %10)
store i8* %11, i8** %3
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @infixToPrefix(i8* %0) {
%2 = tail call i64 @malloc(i32 100)
%3 = tail call i8* @reverse(i8* %0)
%4 = tail call i8* @infixToPostfix(i8* %3)
%5 = tail call i8* @reverse(i8* %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ put_byte(int, int);
__attribute__((always_)) void patch_NCAS_3_0_1_1753_extra(void) {
  put_byte(0x10079243, 0xEA);
}


x86 assembly (clang, -O0):
<patch_NCAS_3_0_1_1753_extra>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10079243,%edi
mov    $0xea,%esi
call   1030 <put_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<patch_NCAS_3_0_1_1753_extra>:
mov    $0x10079243,%edi
mov    $0xea,%esi
jmp    1030 <put_byte@plt>

LLVM IR (-O0):
define void @patch_NCAS_3_0_1_1753_extra() {
%1 = call i32 @put_byte(i32 268931651, i32 234)
ret void
}

LLVM IR (-O2):
define void @patch_NCAS_3_0_1_1753_extra() {
%1 = tail call i32 @put_byte(i32 268931651, i32 234)
ret void
}
/* Variables and functions */
char *nasm_strdup(char const *);
char *nasm_realpath(const char *rel_path) { return nasm_strdup(rel_path); }


x86 assembly (clang, -O0):
<nasm_realpath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nasm_strdup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nasm_realpath>:
jmp    1030 <nasm_strdup@plt>

LLVM IR (-O0):
define i8* @nasm_realpath(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @nasm_strdup(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @nasm_realpath(i8* %0) {
%2 = tail call i8* @nasm_strdup(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ arranet_recv_free(void *);
void tx_done(void *opaque) { arranet_recv_free(opaque); }


x86 assembly (clang, -O0):
<tx_done>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <arranet_recv_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tx_done>:
jmp    1030 <arranet_recv_free@plt>

LLVM IR (-O0):
define void @tx_done(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @arranet_recv_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @tx_done(i8* %0) {
%2 = tail call i32 @arranet_recv_free(i8* %0)
ret void
}
/* Variables and functions */
int bar(double);
int foo(int a) { return bar(2.0) + a + 1; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movsd  0xedd(%rip),%xmm0
call   1030 <bar@plt>
add    -0x4(%rbp),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %edi,%ebx
movsd  0xee5(%rip),%xmm0
call   1030 <bar@plt>
add    %ebx,%eax
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @bar(double 2.000000e+00)
%4 = load i32, i32* %2
%5 = add nsw i32 %3, %4
%6 = add nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = tail call i32 @bar(double 2.000000e+00)
%3 = add i32 %0, 1
%4 = add i32 %3, %2
ret i32 %4
}
int remove(const char *filename) { return 0; }


x86 assembly (clang, -O0):
<remove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @remove(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @remove(i8* nocapture readnone %0) {
ret i32 0
}