xunge/DecIR huggingface dataset:
int highest(int num) {
  int result = 1;
  if (!num) {
    return 0;
  }
  while (num >>= 1) {
    result <<= 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<highest>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1124 <highest+0x24>
movl   $0x0,-0x4(%rbp)
jmp    114f <highest+0x4f>
jmp    1129 <highest+0x29>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1149 <highest+0x49>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <highest+0x29>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<highest>:
test   %edi,%edi
je     111c <highest+0x1c>
mov    $0x1,%eax
cmp    $0x1,%edi
je     111b <highest+0x1b>
mov    %edi,%ecx
sar    %ecx
add    %eax,%eax
cmp    $0x4,%edi
mov    %ecx,%edi
jae    1110 <highest+0x10>
ret
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @highest(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %18
8: ; preds = %1
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %3
%11 = ashr i32 %10, 1
store i32 %11, i32* %3
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %4
%15 = shl i32 %14, 1
store i32 %15, i32* %4
br label %9
16: ; preds = %9
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %18
18: ; preds = %16, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @highest(i32 %0) {
switch i32 %0, label %2 [
i32 0, label %9
i32 1, label %8
]
2: ; preds = %1, %2
%3 = phi i32 [ %6, %2 ], [ 1, %1 ]
%4 = phi i32 [ %5, %2 ], [ %0, %1 ]
%5 = ashr i32 %4, 1
%6 = shl i32 %3, 1
%7 = icmp ult i32 %4, 4
br i1 %7, label %9, label %2
8: ; preds = %1
br label %9
9: ; preds = %2, %1, %8
%10 = phi i32 [ %0, %1 ], [ 1, %8 ], [ %6, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ convertGraphFromBitstreamEx(int, int /*<<< orphan*/);
void convertGraphFromBitstream(void) { convertGraphFromBitstreamEx(1, 0); }


x86 assembly (clang, -O0):
<convertGraphFromBitstream>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <convertGraphFromBitstreamEx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertGraphFromBitstream>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <convertGraphFromBitstreamEx@plt>

LLVM IR (-O0):
define void @convertGraphFromBitstream() {
%1 = call i32 @convertGraphFromBitstreamEx(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @convertGraphFromBitstream() {
%1 = tail call i32 @convertGraphFromBitstreamEx(i32 1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ freeze_gpio_out();
void operation_gpio_stop() { freeze_gpio_out(); }


x86 assembly (clang, -O0):
<operation_gpio_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <freeze_gpio_out@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<operation_gpio_stop>:
xor    %eax,%eax
jmp    1030 <freeze_gpio_out@plt>

LLVM IR (-O0):
define void @operation_gpio_stop() {
%1 = call i32 (...) @freeze_gpio_out()
ret void
}

LLVM IR (-O2):
define void @operation_gpio_stop() {
%1 = tail call i32 (...) @freeze_gpio_out()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void put_row(char row, char first, char mid, char last) {
  if (row == 'f')
    ft_putchar(first);
  else if (row == 'l')
    ft_putchar(last);
  else
    ft_putchar(mid);
}


x86 assembly (clang, -O0):
<put_row>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x66,%eax
jne    114a <put_row+0x3a>
movsbl -0x2(%rbp),%edi
call   1030 <ft_putchar@plt>
jmp    1173 <put_row+0x63>
movsbl -0x1(%rbp),%eax
cmp    $0x6c,%eax
jne    1165 <put_row+0x55>
movsbl -0x4(%rbp),%edi
call   1030 <ft_putchar@plt>
jmp    116e <put_row+0x5e>
movsbl -0x3(%rbp),%edi
call   1030 <ft_putchar@plt>
jmp    1173 <put_row+0x63>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_row>:
cmp    $0x66,%dil
je     1124 <put_row+0x14>
cmp    $0x6c,%dil
jne    112e <put_row+0x1e>
movsbl %cl,%edi
jmp    1030 <ft_putchar@plt>
mov    %esi,%ecx
movsbl %cl,%edi
jmp    1030 <ft_putchar@plt>
mov    %edx,%ecx
movsbl %cl,%edi
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @put_row(i8 signext %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8, i8* %5
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 102
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i8, i8* %6
%14 = call i32 @ft_putchar(i8 signext %13)
br label %26
15: ; preds = %4
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 108
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i8, i8* %8
%21 = call i32 @ft_putchar(i8 signext %20)
br label %25
22: ; preds = %15
%23 = load i8, i8* %7
%24 = call i32 @ft_putchar(i8 signext %23)
br label %25
25: ; preds = %22, %19
br label %26
26: ; preds = %25, %12
ret void
}

LLVM IR (-O2):
define void @put_row(i8 signext %0, i8 signext %1, i8 signext %2, i8 signext %3) {
switch i8 %0, label %6 [
i8 102, label %7
i8 108, label %5
]
5: ; preds = %4
br label %7
6: ; preds = %4
br label %7
7: ; preds = %4, %5, %6
%8 = phi i8 [ %3, %5 ], [ %2, %6 ], [ %1, %4 ]
%9 = tail call i32 @ft_putchar(i8 signext %8)
ret void
}
int hwlist_bluetooth_port(const char *value) { return 0; }


x86 assembly (clang, -O0):
<hwlist_bluetooth_port>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hwlist_bluetooth_port>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hwlist_bluetooth_port(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @hwlist_bluetooth_port(i8* nocapture readnone %0) {
ret i32 0
}
OP(fd, c1) {
  illegal_1();
  op_c1();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_c1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_c1@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_c1()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_c1()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, int);
void set_nonblock(int fd) {
  int fl = fcntl(fd, F_GETFL, 0);
  fcntl(fd, F_SETFL, fl | O_NONBLOCK);
}


x86 assembly (clang, -O0):
<set_nonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    0x2ea1(%rip),%rax
or     (%rax),%edx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_nonblock>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    0x2eae(%rip),%rcx
mov    (%rcx),%esi
mov    0x2eb5(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%edx
pop    %rbx
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @set_nonblock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_GETFL
%6 = call i32 @fcntl(i32 %4, i32 %5, i32 0)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* @F_SETFL
%9 = load i32, i32* %3
%10 = load i32, i32* @O_NONBLOCK
%11 = or i32 %9, %10
%12 = call i32 @fcntl(i32 %7, i32 %8, i32 %11)
ret void
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @set_nonblock(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 @fcntl(i32 %0, i32 %2, i32 0)
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %3
%7 = tail call i32 @fcntl(i32 %0, i32 %4, i32 %6)
ret void
}
long function1() {
  long a;
  int b;
  a = 1l << b;
  a = 1u << b;
  a = 65536l << b;
  a = 65536u << b;
  a = 65536 << b;
  a = 4294967296 << b;
  a = 65535 << b;
  a = 4294967295 << b;
  a = 0x7fffffff << b;
  a = 0x1fl << b;
  a = 0x1fu << b;
  a = 0x1FL << b;
  a = 0x1FU << b;
  return a;
}


x86 assembly (clang, -O0):
<function1>:
push   %rbp
mov    %rsp,%rbp
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%eax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x10000,%eax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x10000,%eax
shl    %cl,%eax
mov    %eax,%eax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x10000,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
movabs $0x100000000,%rax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0xffff,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0xffffffff,%eax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x7fffffff,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x1f,%eax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1f,%eax
shl    %cl,%eax
mov    %eax,%eax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x1f,%eax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1f,%eax
shl    %cl,%eax
mov    %eax,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function1>:
ret

LLVM IR (-O0):
define i64 @function1() {
%1 = alloca i64
%2 = alloca i32
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = shl i64 1, %4
store i64 %5, i64* %1
%6 = load i32, i32* %2
%7 = shl i32 1, %6
%8 = zext i32 %7 to i64
store i64 %8, i64* %1
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = shl i64 65536, %10
store i64 %11, i64* %1
%12 = load i32, i32* %2
%13 = shl i32 65536, %12
%14 = zext i32 %13 to i64
store i64 %14, i64* %1
%15 = load i32, i32* %2
%16 = shl i32 65536, %15
%17 = sext i32 %16 to i64
store i64 %17, i64* %1
%18 = load i32, i32* %2
%19 = zext i32 %18 to i64
%20 = shl i64 4294967296, %19
store i64 %20, i64* %1
%21 = load i32, i32* %2
%22 = shl i32 65535, %21
%23 = sext i32 %22 to i64
store i64 %23, i64* %1
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
%26 = shl i64 4294967295, %25
store i64 %26, i64* %1
%27 = load i32, i32* %2
%28 = shl i32 2147483647, %27
%29 = sext i32 %28 to i64
store i64 %29, i64* %1
%30 = load i32, i32* %2
%31 = zext i32 %30 to i64
%32 = shl i64 31, %31
store i64 %32, i64* %1
%33 = load i32, i32* %2
%34 = shl i32 31, %33
%35 = zext i32 %34 to i64
store i64 %35, i64* %1
%36 = load i32, i32* %2
%37 = zext i32 %36 to i64
%38 = shl i64 31, %37
store i64 %38, i64* %1
%39 = load i32, i32* %2
%40 = shl i32 31, %39
%41 = zext i32 %40 to i64
store i64 %41, i64* %1
%42 = load i64, i64* %1
ret i64 %42
}

LLVM IR (-O2):
define i64 @function1() {
ret i64 poison
}
__attribute__((noclone, no, noipa)) char *get_min_2(char *p) { return p - 1; }


x86 assembly (clang, -O0):
<get_min_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_min_2>:
lea    -0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @get_min_2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 -1
ret i8* %4
}

LLVM IR (-O2):
define i8* @get_min_2(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 -1
ret i8* %2
}
/* Type definitions */
typedef char *int64_t;

/* Variables and functions */
int64_t vmars_atomic_load_seq_cst_i64(int64_t *field) {
  int64_t i = *field;
  __asm__ volatile("" ::: "memory");
  return i;
}


x86 assembly (clang, -O0):
<vmars_atomic_load_seq_cst_i64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmars_atomic_load_seq_cst_i64>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i8* @vmars_atomic_load_seq_cst_i64(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @vmars_atomic_load_seq_cst_i64(i8** nocapture %0) {
%2 = load i8*, i8** %0
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret i8* %2
}
float square(float x) { return x * x; }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @square(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @square(float %0) {
%2 = fmul float %0, %0
ret float %2
}
int alignof_short() {
  struct s {
    char x;
    short int y;
  };
  return sizeof(char) + (sizeof(struct s) - (sizeof(char) + sizeof(short int)));
}


x86 assembly (clang, -O0):
<alignof_short>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alignof_short>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @alignof_short() {
ret i32 2
}

LLVM IR (-O2):
define i32 @alignof_short() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ a_or(void volatile *, long);
int /*<<< orphan*/ a_or_64(void volatile *, long);
void a_or_l(volatile void *p, long v) {
  if (sizeof(long) == sizeof(int))
    a_or(p, v);
  else
    a_or_64(p, v);
}


x86 assembly (clang, -O0):
<a_or_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <a_or_64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_or_l>:
jmp    1030 <a_or_64@plt>

LLVM IR (-O0):
define void @a_or_l(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @a_or_64(i8* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @a_or_l(i8* %0, i64 %1) {
%3 = tail call i32 @a_or_64(i8* %0, i64 %1)
ret void
}
int multi_line_while_conditional(a, b, c)
int a, b, c;
{
  while (a && b && c) {
    a--, b--, c--;
  }
  return 0;
}


x86 assembly (clang, -O0):
<multi_line_while_conditional>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0xd(%rbp)
je     1135 <multi_line_while_conditional+0x35>
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
je     1135 <multi_line_while_conditional+0x35>
cmpl   $0x0,-0xc(%rbp)
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1145 <multi_line_while_conditional+0x45>
jmp    1165 <multi_line_while_conditional+0x65>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    110d <multi_line_while_conditional+0xd>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multi_line_while_conditional>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @multi_line_while_conditional(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %18, %3
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %6
%15 = icmp ne i32 %14, 0
br label %16
16: ; preds = %13, %10, %7
%17 = phi i1 [ false, %10 ], [ false, %7 ], [ %15, %13 ]
br i1 %17, label %18, label %25
18: ; preds = %16
%19 = load i32, i32* %4
%20 = add nsw i32 %19, -1
store i32 %20, i32* %4
%21 = load i32, i32* %5
%22 = add nsw i32 %21, -1
store i32 %22, i32* %5
%23 = load i32, i32* %6
%24 = add nsw i32 %23, -1
store i32 %24, i32* %6
br label %7
25: ; preds = %16
ret i32 0
}

LLVM IR (-O2):
define i32 @multi_line_while_conditional(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
__attribute__((no)) int **retme(int **val) { return val; }


x86 assembly (clang, -O0):
<retme>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<retme>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32** @retme(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
ret i32** %3
}

LLVM IR (-O2):
define i32** @retme(i32** readnone returned %0) {
ret i32** %0
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void sing_break() {
  int milliseconds = 1800;
  struct timespec time;
  time.tv_sec = milliseconds / 1000;
  time.tv_nsec = (milliseconds % 1000) * 1000000;
  nanosleep(&time, NULL);
}


x86 assembly (clang, -O0):
<sing_break>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x708,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
imul   $0xf4240,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sing_break>:
push   %rax
movabs $0x2faf080000000001,%rax
08 af 2f
mov    %rax,(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @sing_break() {
%1 = alloca i32
%2 = alloca %struct.timespec
store i32 1800, i32* %1
%3 = load i32, i32* %1
%4 = sdiv i32 %3, 1000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 0
store i32 %4, i32* %5
%6 = load i32, i32* %1
%7 = srem i32 %6, 1000
%8 = mul nsw i32 %7, 1000000
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 1
store i32 %8, i32* %9
%10 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @sing_break() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
store i32 1, i32* %3
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
store i32 800000000, i32* %4
%5 = call i32 @nanosleep(%struct.timespec* %1, i32* null)
ret void
}
/* Variables and functions */
int aprspass(char *);
int /*<<< orphan*/ printf(char *, int);
main() {
  printf("APRSPASS: %d\n", aprspass("OH2MQK-1"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed8(%rip),%rdi
call   1040 <aprspass@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee6(%rip),%rdi
call   1040 <aprspass@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"APRSPASS: %d\0A\00"
@.str.1 = [9 x i8] c"OH2MQK-1\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @aprspass(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"APRSPASS: %d\0A\00"
@.str.1 = [9 x i8] c"OH2MQK-1\00"
define i32 @main() {
%1 = tail call i32 @aprspass(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ thrd_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  thrd_t t;
  printf("success!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"success!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [9 x i8] c"success!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
void *m_alloc(size_t, int /*<<< orphan*/, int /*<<< orphan*/ *, char *, int);
void *m_calloc_(size_t num, size_t size, char *file, int lineno) {
  return m_alloc(num * size, 0, NULL, file, lineno);
}


x86 assembly (clang, -O0):
<m_calloc_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
xor    %esi,%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <m_alloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_calloc_>:
mov    %ecx,%r8d
mov    %rdx,%rcx
imul   %rsi,%rdi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <m_alloc@plt>

LLVM IR (-O0):
define i8* @m_calloc_(i64 %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i64 %0, i64* %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = mul i64 %9, %10
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = call i8* @m_alloc(i64 %11, i32 0, i32* null, i8* %12, i32 %13)
ret i8* %14
}

LLVM IR (-O2):
define i8* @m_calloc_(i64 %0, i64 %1, i8* %2, i32 %3) {
%5 = mul i64 %1, %0
%6 = tail call i8* @m_alloc(i64 %5, i32 0, i32* null, i8* %2, i32 %3)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
scalar_t__ superlu_malloc(int);
int *intMalloc(int n) {
  int *buf;
  buf = (int *)superlu_malloc(n * sizeof(int));
  if (!buf) {
    fprintf(stderr, "SUPERLU_MALLOC failed for buf in intMalloc()\n");
    exit(1);
  }
  return (buf);
}


x86 assembly (clang, -O0):
<intMalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <superlu_malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1178 <intMalloc+0x48>
mov    0x2e80(%rip),%rax
mov    (%rax),%edi
lea    0xe97(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intMalloc>:
push   %rax
shl    $0x2,%edi
call   1040 <superlu_malloc@plt>
test   %rax,%rax
je     1140 <intMalloc+0x10>
pop    %rcx
ret
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"SUPERLU_MALLOC failed for buf in intMalloc()\0A\00"
define i32* @intMalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 4
%7 = trunc i64 %6 to i32
%8 = call i64 @superlu_malloc(i32 %7)
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %3
%10 = load i32*, i32** %3
%11 = icmp ne i32* %10, null
br i1 %11, label %16, label %12
12: ; preds = %1
%13 = load i32, i32* @stderr
%14 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %1
%17 = load i32*, i32** %3
ret i32* %17
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"SUPERLU_MALLOC failed for buf in intMalloc()\0A\00"
define i32* @intMalloc(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call i64 @superlu_malloc(i32 %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %1
%10 = inttoptr i64 %3 to i32*
ret i32* %10
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ *BIO_new_mem_buf(char *, size_t);
char *glue_strings(char const **, size_t *);
BIO *glue2bio(const char **pem, char **out) {
  size_t s = 0;
  *out = glue_strings(pem, &s);
  return BIO_new_mem_buf(*out, s);
}


x86 assembly (clang, -O0):
<glue2bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <glue_strings@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <BIO_new_mem_buf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glue2bio>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rsi
call   1030 <glue_strings@plt>
mov    %rax,(%rbx)
mov    0x8(%rsp),%rsi
mov    %rax,%rdi
call   1040 <BIO_new_mem_buf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32* @glue2bio(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
%5 = alloca i64
store i8** %0, i8*** %3
store i8** %1, i8*** %4
store i64 0, i64* %5
%6 = load i8**, i8*** %3
%7 = call i8* @glue_strings(i8** %6, i64* %5)
%8 = load i8**, i8*** %4
store i8* %7, i8** %8
%9 = load i8**, i8*** %4
%10 = load i8*, i8** %9
%11 = load i64, i64* %5
%12 = call i32* @BIO_new_mem_buf(i8* %10, i64 %11)
ret i32* %12
}

LLVM IR (-O2):
define i32* @glue2bio(i8** %0, i8** nocapture writeonly %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%5 = call i8* @glue_strings(i8** %0, i64* %3)
store i8* %5, i8** %1
%6 = load i64, i64* %3
%7 = call i32* @BIO_new_mem_buf(i8* %5, i64 %6)
ret i32* %7
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ recv(int, char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void handle_connection(int sock) {
  char buf[16];
  (void)recv(sock, buf, 128, 0);
  fprintf(stdout, "Got %s\n", buf);
  close(sock);
}


x86 assembly (clang, -O0):
<handle_connection>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    $0x80,%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
lea    -0x20(%rbp),%rdx
lea    0xe9e(%rip),%rsi
call   1050 <fprintf@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_connection>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebx
mov    %rsp,%r14
mov    %r14,%rsi
mov    $0x80,%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
mov    0x2e8e(%rip),%rax
mov    (%rax),%edi
lea    0xea5(%rip),%rsi
mov    %r14,%rdx
call   1050 <fprintf@plt>
mov    %ebx,%edi
call   1040 <close@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [8 x i8] c"Got %s\0A\00"
define void @handle_connection(i32 %0) {
%2 = alloca i32
%3 = alloca [16 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%6 = call i32 @recv(i32 %4, i8* %5, i32 128, i32 0)
%7 = load i32, i32* @stdout
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%9 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = load i32, i32* %2
%11 = call i32 @close(i32 %10)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [8 x i8] c"Got %s\0A\00"
define void @handle_connection(i32 %0) {
%2 = alloca [16 x i8]
%3 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%4 = call i32 @recv(i32 %0, i8* %3, i32 128, i32 0)
%5 = load i32, i32* @stdout
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %3)
%7 = call i32 @close(i32 %0)
ret void
}
int test_imm_4Dint8_reg(signed char val) {
  return ((val) & (-0x4D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Dint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffb3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Dint8_reg>:
test   $0xb3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Dint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -77
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Dint8_reg(i8 signext %0) {
%2 = and i8 %0, -77
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ read(int, char *, int);
void wait_for_signal(int fd) {
  char buf[5];
  read(fd, buf, 5);
}


x86 assembly (clang, -O0):
<wait_for_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x9(%rbp),%rsi
mov    $0x5,%edx
call   1030 <read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_signal>:
push   %rax
lea    0x3(%rsp),%rsi
mov    $0x5,%edx
call   1030 <read@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @wait_for_signal(i32 %0) {
%2 = alloca i32
%3 = alloca [5 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
%6 = call i32 @read(i32 %4, i8* %5, i32 5)
ret void
}

LLVM IR (-O2):
define void @wait_for_signal(i32 %0) {
%2 = alloca [5 x i8]
%3 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%4 = call i32 @read(i32 %0, i8* %3, i32 5)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
void fprint_add_data(FILE *stream, uint8_t data) {
  fprintf(stream,
          "ADD   A, #"
          "0x%02X"
          "                  ",
          data);
}


x86 assembly (clang, -O0):
<fprint_add_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_add_data>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"ADD A,x%02X \00"
define void @fprint_add_data(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"ADD A,x%02X \00"
define void @fprint_add_data(i32* nocapture %0, i32 %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int energymon_is_exclusive_odroid(void) { return 0; }


x86 assembly (clang, -O0):
<energymon_is_exclusive_odroid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<energymon_is_exclusive_odroid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @energymon_is_exclusive_odroid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @energymon_is_exclusive_odroid() {
ret i32 0
}
/* Variables and functions */
scalar_t__ flac_read_stat(unsigned int *);
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ usleep(double);
int main(int argc, char **argv) {
  unsigned int current = 0;
  while (1) {
    if (flac_read_stat(&current) == 0)
      printf("[P %f]\n", (double)current / 100.0);
    usleep(0.5 * 1000000);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
call   1040 <flac_read_stat@plt>
cmp    $0x0,%rax
jne    1180 <main+0x50>
mov    -0x14(%rbp),%eax
cvtsi2sd %rax,%xmm0
movsd  0xe90(%rip),%xmm1
divsd  %xmm1,%xmm0
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
movsd  0xe80(%rip),%xmm0
call   1050 <usleep@plt>
jmp    114d <main+0x1d>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rbx
lea    0xec8(%rip),%r14
jmp    115d <main+0x2d>
nopw   0x0(%rax,%rax,1)
movsd  0xeb0(%rip),%xmm0
call   1050 <usleep@plt>
mov    %rbx,%rdi
call   1040 <flac_read_stat@plt>
test   %rax,%rax
jne    1150 <main+0x20>
mov    0x4(%rsp),%eax
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
divsd  0xe82(%rip),%xmm0
mov    %r14,%rdi
call   1030 <printf@plt>
jmp    1150 <main+0x20>

LLVM IR (-O0):
@.str = [8 x i8] c"[P %f]\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %2, %15
%8 = call i64 @flac_read_stat(i32* %6)
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = load i32, i32* %6
%12 = uitofp i32 %11 to double
%13 = fdiv double %12, 1.000000e+02
%14 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %13)
br label %15
15: ; preds = %10, %7
%16 = call i32 @usleep(double 5.000000e+05)
br label %7
}

LLVM IR (-O2):
@.str = [8 x i8] c"[P %f]\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %3
br label %5
5: ; preds = %13, %2
%6 = call i64 @flac_read_stat(i32* %3)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i32, i32* %3
%10 = uitofp i32 %9 to double
%11 = fdiv double %10, 1.000000e+02
%12 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %11)
br label %13
13: ; preds = %8, %5
%14 = call i32 @usleep(double 5.000000e+05)
br label %5
}
unsigned xrop3_241_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D | S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_241_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_241_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
lea    (%rcx,%rdi,1),%eax
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
xor    $0xffffff00,%ecx
or     %edx,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_241_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_241_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = xor i32 %4, -256
%9 = or i32 %7, %8
%10 = xor i32 %5, -1
%11 = and i32 %9, %10
%12 = or i32 %11, %3
ret i32 %12
}
int test_restrict(int *restrict x, int *restrict y) {
  *x = 0;
  *y = 1;
  return *x;
}


x86 assembly (clang, -O0):
<test_restrict>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_restrict>:
movl   $0x0,(%rdi)
movl   $0x1,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_restrict(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 0, i32* %5
%6 = load i32*, i32** %4
store i32 1, i32* %6
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_restrict(i32* noalias nocapture writeonly %0, i32* noalias nocapture writeonly %1) {
store i32 0, i32* %0
store i32 1, i32* %1
ret i32 0
}
void msm_hsusb_set_vbus_state(int online) {}


x86 assembly (clang, -O0):
<msm_hsusb_set_vbus_state>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_hsusb_set_vbus_state>:
ret

LLVM IR (-O0):
define void @msm_hsusb_set_vbus_state(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @msm_hsusb_set_vbus_state(i32 %0) {
ret void
}
void RTProcCreate(void) {}


x86 assembly (clang, -O0):
<RTProcCreate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTProcCreate>:
ret

LLVM IR (-O0):
define void @RTProcCreate() {
ret void
}

LLVM IR (-O2):
define void @RTProcCreate() {
ret void
}
int fun998() { return 998; }


x86 assembly (clang, -O0):
<fun998>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3e6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun998>:
mov    $0x3e6,%eax
ret

LLVM IR (-O0):
define i32 @fun998() {
ret i32 998
}

LLVM IR (-O2):
define i32 @fun998() {
ret i32 998
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
uint64_t htole64(uint64_t host_64bits) { return host_64bits; }


x86 assembly (clang, -O0):
<htole64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htole64>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @htole64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @htole64(i32 returned %0) {
ret i32 %0
}
extern unsigned char get_fs_byte(const char *addr) {
  unsigned register char _v;
  __asm__("movb %%fs:%1,%0" : "=r"(_v) : "m"(*addr));
  return _v;
}


x86 assembly (clang, -O0):
<get_fs_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %fs:(%rax),%al
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fs_byte>:
mov    %fs:(%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @get_fs_byte(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8 asm "movb %fs:$1,$0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @get_fs_byte(i8* %0) {
%2 = tail call i8 asm "movb %fs:$1,$0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0)
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void test_columns(const char **columns) {
  int i = 0;
  while (columns[i]) {
    printf("%s\n", columns[i++]);
  }
}


x86 assembly (clang, -O0):
<test_columns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     115d <test_columns+0x4d>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
jmp    1123 <test_columns+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_columns>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%rsi
test   %rsi,%rsi
je     1144 <test_columns+0x34>
mov    %rdi,%rbx
add    $0x8,%rbx
lea    0xed6(%rip),%r14
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1030 <printf@plt>
mov    (%rbx),%rsi
add    $0x8,%rbx
test   %rsi,%rsi
jne    1130 <test_columns+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @test_columns(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i8**, i8*** %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i8*, i8** %12, i64 %15
%17 = load i8*, i8** %16
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %17)
br label %4
19: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @test_columns(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %10, %4 ], [ %2, %1 ]
%7 = add nuw i64 %5, 1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
%9 = getelementptr inbounds i8*, i8** %0, i64 %7
%10 = load i8*, i8** %9
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Type definitions */
struct timex {
  long offset;
};

/* Variables and functions */
long getter_offset(const struct timex *txc) { return txc->offset; }


x86 assembly (clang, -O0):
<getter_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getter_offset>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.timex = type { i64 }
define i64 @getter_offset(%struct.timex* %0) {
%2 = alloca %struct.timex*
store %struct.timex* %0, %struct.timex** %2
%3 = load %struct.timex*, %struct.timex** %2
%4 = getelementptr inbounds %struct.timex, %struct.timex* %3, i32 0, i32 0
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
%struct.timex = type { i64 }
define i64 @getter_offset(%struct.timex* nocapture %0) {
%2 = getelementptr inbounds %struct.timex, %struct.timex* %0, i64 0, i32 0
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
unsigned int REG_SPI_BASE(unsigned int);
__attribute__((always_)) __attribute__((flatten)) unsigned int
SPI_EXT3(unsigned int i) {
  return (REG_SPI_BASE(i) + 0xfc);
}


x86 assembly (clang, -O0):
<SPI_EXT3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <REG_SPI_BASE@plt>
add    $0xfc,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_EXT3>:
push   %rax
call   1030 <REG_SPI_BASE@plt>
add    $0xfc,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SPI_EXT3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @REG_SPI_BASE(i32 %3)
%5 = add i32 %4, 252
ret i32 %5
}

LLVM IR (-O2):
define i32 @SPI_EXT3(i32 %0) {
%2 = tail call i32 @REG_SPI_BASE(i32 %0)
%3 = add i32 %2, 252
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ __NR_dup3;
int syscall(int /*<<< orphan*/, int, int, int /*<<< orphan*/);
__attribute__((always_)) int _syscall_dup2(int oldfd, int newfd) {
  return syscall(__NR_dup3, oldfd, newfd, 0);
}


x86 assembly (clang, -O0):
<_syscall_dup2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
xor    %ecx,%ecx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_syscall_dup2>:
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
xor    %ecx,%ecx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_dup3 = global i32 0
define i32 @_syscall_dup2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @__NR_dup3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @syscall(i32 %5, i32 %6, i32 %7, i32 0)
ret i32 %8
}

LLVM IR (-O2):
@__NR_dup3 = global i32 0
define i32 @_syscall_dup2(i32 %0, i32 %1) {
%3 = load i32, i32* @__NR_dup3
%4 = tail call i32 @syscall(i32 %3, i32 %0, i32 %1, i32 0)
ret i32 %4
}