xunge/DecIR huggingface dataset:
/* Variables and functions */
int removexattr(char const *, char const *);
int ceph_os_removexattr(const char *path, const char *name) {
  int error = -1;
  error = removexattr(path, name);
  return (error);
}


x86 assembly (clang, -O0):
<ceph_os_removexattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xffffffff,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <removexattr@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_os_removexattr>:
jmp    1030 <removexattr@plt>

LLVM IR (-O0):
define i32 @ceph_os_removexattr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 -1, i32* %5
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @removexattr(i8* %6, i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @ceph_os_removexattr(i8* %0, i8* %1) {
%3 = tail call i32 @removexattr(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
scalar_t__ malloc(int);
char *alloc_1_byte(void) { return (char *)malloc(1); }


x86 assembly (clang, -O0):
<alloc_1_byte>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <malloc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_1_byte>:
mov    $0x1,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @alloc_1_byte() {
%1 = call i64 @malloc(i32 1)
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}

LLVM IR (-O2):
define i8* @alloc_1_byte() {
%1 = tail call i64 @malloc(i32 1)
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_ATan2F_init(void) {
  _hmt_register_covercase("HMM_ATan2F", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_ATan2F_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee9(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_ATan2F_init>:
lea    0xee9(%rip),%rdi
lea    0xeed(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"HMM_ATan2F\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_ATan2F_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"HMM_ATan2F\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_ATan2F_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int tls13_server_new_session_ticket_recv(struct tls13_ctx *ctx) { return 1; }


x86 assembly (clang, -O0):
<tls13_server_new_session_ticket_recv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tls13_server_new_session_ticket_recv>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.tls13_ctx = type opaque
define i32 @tls13_server_new_session_ticket_recv(%struct.tls13_ctx* %0) {
%2 = alloca %struct.tls13_ctx*
store %struct.tls13_ctx* %0, %struct.tls13_ctx** %2
ret i32 1
}

LLVM IR (-O2):
%struct.tls13_ctx = type opaque
define i32 @tls13_server_new_session_ticket_recv(%struct.tls13_ctx* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ system(char *);
int edit_xorg_file(void) {
  endwin();
  system(" /usr/bin/ee "
         " /etc/X11/xorg.conf");
  return 0;
}


x86 assembly (clang, -O0):
<edit_xorg_file>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <endwin@plt>
lea    0xece(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edit_xorg_file>:
push   %rax
xor    %eax,%eax
call   1040 <endwin@plt>
lea    0xed1(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [33 x i8] c" /usr/bin/ee /etc/X11/xorg.conf\00"
define i32 @edit_xorg_file() {
%1 = call i32 (...) @endwin()
%2 = call i32 @system(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [33 x i8] c" /usr/bin/ee /etc/X11/xorg.conf\00"
define i32 @edit_xorg_file() {
%1 = tail call i32 (...) @endwin()
%2 = tail call i32 @system(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct list_elem {
  int dummy;
};
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
struct list_elem *list_head(struct list const *);
struct list_elem *list_begin(const struct list *l) {
  assert(l != NULL);
  return list_head(l);
}


x86 assembly (clang, -O0):
<list_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1040 <list_head@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_begin>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <list_head@plt>

LLVM IR (-O0):
%struct.list_elem = type { i32 }
%struct.list = type { i32 }
define %struct.list_elem* @list_begin(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
%3 = load %struct.list*, %struct.list** %2
%4 = icmp ne %struct.list* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load %struct.list*, %struct.list** %2
%8 = call %struct.list_elem* @list_head(%struct.list* %7)
ret %struct.list_elem* %8
}

LLVM IR (-O2):
%struct.list_elem = type { i32 }
%struct.list = type { i32 }
define %struct.list_elem* @list_begin(%struct.list* %0) {
%2 = icmp ne %struct.list* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call %struct.list_elem* @list_head(%struct.list* %0)
ret %struct.list_elem* %5
}
/* Variables and functions */
int /*<<< orphan*/ ClearONOFF();
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_Z80(void) {
  DeinitFields();
  ClearONOFF();
}


x86 assembly (clang, -O0):
<SwitchFrom_Z80>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
mov    $0x0,%al
call   1040 <ClearONOFF@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_Z80>:
push   %rax
xor    %eax,%eax
call   1030 <DeinitFields@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <ClearONOFF@plt>

LLVM IR (-O0):
define void @SwitchFrom_Z80() {
%1 = call i32 (...) @DeinitFields()
%2 = call i32 (...) @ClearONOFF()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_Z80() {
%1 = tail call i32 (...) @DeinitFields()
%2 = tail call i32 (...) @ClearONOFF()
ret void
}
void spinlock_lock(int *lock) {
  while (!__sync_bool_compare_and_swap(lock, 0, 1))
    ;
}


x86 assembly (clang, -O0):
<spinlock_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
mov    $0x1,%edx
lock cmpxchg %edx,(%rcx)
mov    %eax,%ecx
sete   %al
xor    $0xff,%al
test   $0x1,%al
jne    112b <spinlock_lock+0x2b>
jmp    1130 <spinlock_lock+0x30>
jmp    1108 <spinlock_lock+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spinlock_lock>:
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
xor    %eax,%eax
lock cmpxchg %ecx,(%rdi)
jne    1110 <spinlock_lock+0x10>
ret

LLVM IR (-O0):
define void @spinlock_lock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
br label %3
3: ; preds = %8, %1
%4 = load i32*, i32** %2
%5 = cmpxchg i32* %4, i32 0, i32 1 seq_cst seq_cst
%6 = extractvalue { i32, i1 } %5, 1
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @spinlock_lock(i32* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = cmpxchg i32* %0, i32 0, i32 1 seq_cst seq_cst
%4 = extractvalue { i32, i1 } %3, 1
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
int gcd(int m, int n) {
  int t, r;
  if (m < n) {
    t = m;
    m = n;
    n = t;
  }
  r = m % n;
  if (r == 0) {
    return n;
  } else {
    return gcd(n, r);
  }
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <gcd+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    115b <gcd+0x4b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1169 <gcd+0x59>
mov    -0xc(%rbp),%edi
mov    -0x14(%rbp),%esi
call   1030 <gcd@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %edi,%eax
cmp    %edx,%edi
mov    %edx,%edi
cmovl  %eax,%edi
cmovl  %edx,%eax
cltd
idiv   %edi
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %6
%13 = load i32, i32* %5
store i32 %13, i32* %4
%14 = load i32, i32* %6
store i32 %14, i32* %5
br label %15
15: ; preds = %11, %2
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = srem i32 %16, %17
store i32 %18, i32* %7
%19 = load i32, i32* %7
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %15
%22 = load i32, i32* %5
store i32 %22, i32* %3
br label %27
23: ; preds = %15
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = call i32 @gcd(i32 %24, i32 %25)
store i32 %26, i32* %3
br label %27
27: ; preds = %23, %21
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %7, %3 ]
%5 = phi i32 [ %1, %2 ], [ %9, %3 ]
%6 = icmp slt i32 %4, %5
%7 = select i1 %6, i32 %4, i32 %5
%8 = select i1 %6, i32 %5, i32 %4
%9 = srem i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %3
11: ; preds = %3
ret i32 %7
}
int _is_statement_terminator(char c) { return c == ';'; }


x86 assembly (clang, -O0):
<_is_statement_terminator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x3b,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_statement_terminator>:
xor    %eax,%eax
cmp    $0x3b,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_is_statement_terminator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 59
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @_is_statement_terminator(i8 signext %0) {
%2 = icmp eq i8 %0, 59
%3 = zext i1 %2 to i32
ret i32 %3
}
int my_str_isnum(char *str) {
  int i;
  char c;
  i = 0;
  while (str[i] != '\0') {
    c = str[i];
    if (c < '0' || c > '9') {
      return (0);
    }
    i = i + 1;
  }
  return (1);
}


x86 assembly (clang, -O0):
<my_str_isnum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1166 <my_str_isnum+0x66>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x15(%rbp)
movsbl -0x15(%rbp),%eax
cmp    $0x30,%eax
jl     114c <my_str_isnum+0x4c>
movsbl -0x15(%rbp),%eax
cmp    $0x39,%eax
jle    1158 <my_str_isnum+0x58>
movl   $0x0,-0x4(%rbp)
jmp    116d <my_str_isnum+0x6d>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <my_str_isnum+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_str_isnum>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1123 <my_str_isnum+0x23>
add    $0x1,%rdi
nop
add    $0xc6,%cl
cmp    $0xf5,%cl
jbe    1124 <my_str_isnum+0x24>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <my_str_isnum+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_str_isnum(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 0, i32* %4
br label %6
6: ; preds = %28, %1
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %31
14: ; preds = %6
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %5
%20 = load i8, i8* %5
%21 = sext i8 %20 to i32
%22 = icmp slt i32 %21, 48
br i1 %22, label %27, label %23
23: ; preds = %14
%24 = load i8, i8* %5
%25 = sext i8 %24 to i32
%26 = icmp sgt i32 %25, 57
br i1 %26, label %27, label %28
27: ; preds = %23, %14
store i32 0, i32* %2
br label %32
28: ; preds = %23
%29 = load i32, i32* %4
%30 = add nsw i32 %29, 1
store i32 %30, i32* %4
br label %6
31: ; preds = %6
store i32 1, i32* %2
br label %32
32: ; preds = %31, %27
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @my_str_isnum(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %8
4: ; preds = %8
%5 = getelementptr inbounds i8, i8* %0, i64 %13
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %1, %4
%9 = phi i64 [ %13, %4 ], [ 0, %1 ]
%10 = phi i8 [ %6, %4 ], [ %2, %1 ]
%11 = add i8 %10, -58
%12 = icmp ult i8 %11, -10
%13 = add nuw i64 %9, 1
br i1 %12, label %14, label %4
14: ; preds = %8, %4, %1
%15 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %8 ]
ret i32 %15
}
void c64_start_freq_cia_a_nmi(void) {}


x86 assembly (clang, -O0):
<c64_start_freq_cia_a_nmi>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c64_start_freq_cia_a_nmi>:
ret

LLVM IR (-O0):
define void @c64_start_freq_cia_a_nmi() {
ret void
}

LLVM IR (-O2):
define void @c64_start_freq_cia_a_nmi() {
ret void
}
/* Variables and functions */
scalar_t__ ENOENT;
scalar_t__ errno;
int /*<<< orphan*/ libzahl_failure(scalar_t__);
void libzahl_memfailure(void) {
  if (!errno)
    errno = ENOENT;
  libzahl_failure(errno);
}


x86 assembly (clang, -O0):
<libzahl_memfailure>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
cmpq   $0x0,(%rax)
jne    1139 <libzahl_memfailure+0x29>
mov    0x2ea4(%rip),%rax
mov    (%rax),%rcx
mov    0x2eaa(%rip),%rax
mov    %rcx,(%rax)
mov    0x2ea0(%rip),%rax
mov    (%rax),%rdi
call   1030 <libzahl_failure@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<libzahl_memfailure>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%rdi
test   %rdi,%rdi
je     1124 <libzahl_memfailure+0x14>
jmp    1030 <libzahl_failure@plt>
mov    0x2ea5(%rip),%rcx
mov    (%rcx),%rdi
mov    %rdi,(%rax)
jmp    1030 <libzahl_failure@plt>

LLVM IR (-O0):
@errno = global i64 0
@ENOENT = global i64 0
define void @libzahl_memfailure() {
%1 = load i64, i64* @errno
%2 = icmp ne i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = load i64, i64* @ENOENT
store i64 %4, i64* @errno
br label %5
5: ; preds = %3, %0
%6 = load i64, i64* @errno
%7 = call i32 @libzahl_failure(i64 %6)
ret void
}

LLVM IR (-O2):
@errno = global i64 0
@ENOENT = global i64 0
define void @libzahl_memfailure() {
%1 = load i64, i64* @errno
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = load i64, i64* @ENOENT
store i64 %4, i64* @errno
br label %5
5: ; preds = %3, %0
%6 = phi i64 [ %4, %3 ], [ %1, %0 ]
%7 = tail call i32 @libzahl_failure(i64 %6)
ret void
}
int rcu_nocb_needs_gp(struct rcu_state *rsp) { return 0; }


x86 assembly (clang, -O0):
<rcu_nocb_needs_gp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_nocb_needs_gp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.rcu_state = type opaque
define i32 @rcu_nocb_needs_gp(%struct.rcu_state* %0) {
%2 = alloca %struct.rcu_state*
store %struct.rcu_state* %0, %struct.rcu_state** %2
ret i32 0
}

LLVM IR (-O2):
%struct.rcu_state = type opaque
define i32 @rcu_nocb_needs_gp(%struct.rcu_state* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sla_subet_(double *, double *, double *, double *, double *);
void slaSubet(double rc, double dc, double eq, double *rm, double *dm) {
  sla_subet_(&rc, &dc, &eq, rm, dm);
}


x86 assembly (clang, -O0):
<slaSubet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x28(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <sla_subet_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slaSubet>:
sub    $0x18,%rsp
mov    %rsi,%r8
mov    %rdi,%rcx
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
movsd  %xmm2,(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
call   1030 <sla_subet_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @slaSubet(double %0, double %1, double %2, double* %3, double* %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double*
%10 = alloca double*
store double %0, double* %6
store double %1, double* %7
store double %2, double* %8
store double* %3, double** %9
store double* %4, double** %10
%11 = load double*, double** %9
%12 = load double*, double** %10
%13 = call i32 @sla_subet_(double* %6, double* %7, double* %8, double* %11, double* %12)
ret void
}

LLVM IR (-O2):
define void @slaSubet(double %0, double %1, double %2, double* %3, double* %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %6
store double %1, double* %7
store double %2, double* %8
%9 = call i32 @sla_subet_(double* %6, double* %7, double* %8, double* %3, double* %4)
ret void
}
int test_imm_A4uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xA4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A4uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xa4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A4uint64_highword_mem>:
testb  $0xa4,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A4uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 164
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A4uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 704374636544
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
double divfl(double a, double b) { return a / b; }


x86 assembly (clang, -O0):
<divfl>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<divfl>:
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @divfl(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fdiv double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @divfl(double %0, double %1) {
%3 = fdiv double %0, %1
ret double %3
}
unsigned long foo(unsigned long a) { return a ^ 0x0000ffff; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %rdi,%rax
xor    $0xffff,%rax
ret

LLVM IR (-O0):
define i64 @foo(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, 65535
ret i64 %4
}

LLVM IR (-O2):
define i64 @foo(i64 %0) {
%2 = xor i64 %0, 65535
ret i64 %2
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int is_empty(struct node *top) { return top == NULL ? 1 : 0; }


x86 assembly (clang, -O0):
<is_empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_empty>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define i32 @is_empty(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
%3 = load %struct.node*, %struct.node** %2
%4 = icmp eq %struct.node* %3, null
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
%struct.node = type { i32 }
define i32 @is_empty(%struct.node* readnone %0) {
%2 = icmp eq %struct.node* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
void MUSIC_SetLoopFlag(int loopflag) {}


x86 assembly (clang, -O0):
<MUSIC_SetLoopFlag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MUSIC_SetLoopFlag>:
ret

LLVM IR (-O0):
define void @MUSIC_SetLoopFlag(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @MUSIC_SetLoopFlag(i32 %0) {
ret void
}
/* Variables and functions */
char *xaprintf(char *, char const *);
char *xstrdup(const char *s) { return xaprintf("%s", s); }


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <xaprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <xaprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @xaprintf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i8* @xstrdup(i8* %0) {
%2 = tail call i8* @xaprintf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ quota_ctl(unsigned int, int);
int quota_off(unsigned int, int /*<<< orphan*/);
int real_umount(unsigned int, char *);
int fsumount(unsigned int veid, char *root) {
  int ret;
  if (!(ret = real_umount(veid, root))) {
    if (!quota_ctl(veid, 2))
      ret = quota_off(veid, 0);
  }
  return ret;
}


x86 assembly (clang, -O0):
<fsumount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <real_umount@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
jne    117f <fsumount+0x4f>
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1050 <quota_ctl@plt>
cmp    $0x0,%eax
jne    117a <fsumount+0x4a>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <quota_off@plt>
mov    %eax,-0x14(%rbp)
jmp    117f <fsumount+0x4f>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsumount>:
push   %rbx
mov    %edi,%ebx
call   1040 <real_umount@plt>
test   %eax,%eax
jne    1150 <fsumount+0x20>
mov    %ebx,%edi
mov    $0x2,%esi
call   1050 <quota_ctl@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1152 <fsumount+0x22>
pop    %rbx
ret
mov    %ebx,%edi
xor    %esi,%esi
pop    %rbx
jmp    1030 <quota_off@plt>

LLVM IR (-O0):
define i32 @fsumount(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @real_umount(i32 %6, i8* %7)
store i32 %8, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %2
%11 = load i32, i32* %3
%12 = call i32 @quota_ctl(i32 %11, i32 2)
%13 = icmp ne i32 %12, 0
br i1 %13, label %17, label %14
14: ; preds = %10
%15 = load i32, i32* %3
%16 = call i32 @quota_off(i32 %15, i32 0)
store i32 %16, i32* %5
br label %17
17: ; preds = %14, %10
br label %18
18: ; preds = %17, %2
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @fsumount(i32 %0, i8* %1) {
%3 = tail call i32 @real_umount(i32 %0, i8* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = tail call i32 @quota_ctl(i32 %0, i32 2)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @quota_off(i32 %0, i32 0)
br label %10
10: ; preds = %5, %8, %2
%11 = phi i32 [ %3, %2 ], [ 0, %5 ], [ %9, %8 ]
ret i32 %11
}
int fun_2(int *x) {
  x += 155;
  return x[0] + x[1] + x[2] + x[3];
}


x86 assembly (clang, -O0):
<fun_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x26c,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
add    0x4(%rcx),%eax
mov    -0x8(%rbp),%rcx
add    0x8(%rcx),%eax
mov    -0x8(%rbp),%rcx
add    0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_2>:
movdqu 0x26c(%rdi),%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @fun_2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 155
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
%11 = add nsw i32 %7, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = add nsw i32 %11, %14
%16 = load i32*, i32** %2
%17 = getelementptr inbounds i32, i32* %16, i64 3
%18 = load i32, i32* %17
%19 = add nsw i32 %15, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @fun_2(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 155
%3 = bitcast i32* %2 to <4 x i32>*
%4 = load <4 x i32>, <4 x i32>* %3
%5 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %4)
ret i32 %5
}
int test_imm_17uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x17 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_17uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x17,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_17uint64_midword_reg>:
test   $0x170000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_17uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 23
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_17uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 1507328
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int repeticao(int v[], int n) {
  if (n == 1)
    return 0;
  return v[n - 1] == v[n - 2] || repeticao(v, n - 1);
}


x86 assembly (clang, -O0):
<repeticao>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1135 <repeticao+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1183 <repeticao+0x73>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%ecx
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
movslq %eax,%rsi
mov    $0x1,%al
cmp    (%rdx,%rsi,4),%ecx
mov    %al,-0x15(%rbp)
je     1178 <repeticao+0x68>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1030 <repeticao@plt>
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeticao>:
push   %rax
xor    %eax,%eax
cmp    $0x1,%esi
je     113b <repeticao+0x2b>
movslq %esi,%rcx
mov    -0x4(%rdi,%rcx,4),%edx
mov    $0x1,%eax
cmp    -0x8(%rdi,%rcx,4),%edx
je     113b <repeticao+0x2b>
add    $0xffffffff,%esi
call   1030 <repeticao@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @repeticao(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %32
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %10, i64 %13
%15 = load i32, i32* %14
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = sub nsw i32 %17, 2
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %16, i64 %19
%21 = load i32, i32* %20
%22 = icmp eq i32 %15, %21
br i1 %22, label %29, label %23
23: ; preds = %9
%24 = load i32*, i32** %4
%25 = load i32, i32* %5
%26 = sub nsw i32 %25, 1
%27 = call i32 @repeticao(i32* %24, i32 %26)
%28 = icmp ne i32 %27, 0
br label %29
29: ; preds = %23, %9
%30 = phi i1 [ true, %9 ], [ %28, %23 ]
%31 = zext i1 %30 to i32
store i32 %31, i32* %3
br label %32
32: ; preds = %29, %8
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @repeticao(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = add nsw i32 %1, -1
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = add nsw i32 %1, -2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %8, %12
br i1 %13, label %14, label %16
14: ; preds = %2, %4, %16
%15 = phi i32 [ %19, %16 ], [ 0, %2 ], [ 1, %4 ]
ret i32 %15
16: ; preds = %4
%17 = tail call i32 @repeticao(i32* %0, i32 %5)
%18 = icmp ne i32 %17, 0
%19 = zext i1 %18 to i32
br label %14
}
/* Type definitions */
typedef int /*<<< orphan*/ PICTURE_CODING_MODE_STRINGS;

/* Variables and functions */
int /*<<< orphan*/ print_enum(char *, char const **, int);
void print_picture_coding_mode() {
  static const char *PICTURE_CODING_MODE_STRINGS[] = {
      "Frames",
      "Fields",
  };
  print_enum("picture_coding_mode", PICTURE_CODING_MODE_STRINGS,
             (sizeof(PICTURE_CODING_MODE_STRINGS) /
              sizeof((PICTURE_CODING_MODE_STRINGS)[0])));
}


x86 assembly (clang, -O0):
<print_picture_coding_mode>:
push   %rbp
mov    %rsp,%rbp
lea    0xef3(%rip),%rdi
lea    0x2f0e(%rip),%rsi
mov    $0x2,%edx
call   1030 <print_enum@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_picture_coding_mode>:
lea    0xef7(%rip),%rdi
lea    0x2f12(%rip),%rsi
mov    $0x2,%edx
jmp    1030 <print_enum@plt>

LLVM IR (-O0):
@print_picture_coding_mode.PICTURE_CODING_MODE_STRINGS = internal global [2 x i8*] [i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i32 0, i32 0)]
@.str = [7 x i8] c"Frames\00"
@.str.1 = [7 x i8] c"Fields\00"
@.str.2 = [20 x i8] c"picture_coding_mode\00"
define void @print_picture_coding_mode() {
%1 = call i32 @print_enum(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @print_picture_coding_mode.PICTURE_CODING_MODE_STRINGS, i64 0, i64 0), i32 2)
ret void
}

LLVM IR (-O2):
@print_picture_coding_mode.PICTURE_CODING_MODE_STRINGS = internal global [2 x i8*] [i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i32 0, i32 0)]
@.str = [7 x i8] c"Frames\00"
@.str.1 = [7 x i8] c"Fields\00"
@.str.2 = [20 x i8] c"picture_coding_mode\00"
define void @print_picture_coding_mode() {
%1 = tail call i32 @print_enum(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @print_picture_coding_mode.PICTURE_CODING_MODE_STRINGS, i64 0, i64 0), i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bresenham(int, int, int, int);
int /*<<< orphan*/ gfx_color(int /*<<< orphan*/, int, int);
int /*<<< orphan*/ gfx_open(int, int, char *);
int /*<<< orphan*/ window_wait();
int main() {
  int width = 800;
  int height = 600;
  gfx_open(width, height, "Graphics Algorithms");
  gfx_color(0, 200, 100);
  int src_x = 20, src_y = 10, dest_x = 30, dest_y = 18;
  bresenham(src_x, src_y, dest_x, dest_y);
  window_wait();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x320,-0x4(%rbp)
movl   $0x258,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    0xe9d(%rip),%rdx
call   1050 <gfx_open@plt>
xor    %edi,%edi
mov    $0xc8,%esi
mov    $0x64,%edx
call   1040 <gfx_color@plt>
movl   $0x14,-0xc(%rbp)
movl   $0xa,-0x10(%rbp)
movl   $0x1e,-0x14(%rbp)
movl   $0x12,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <bresenham@plt>
mov    $0x0,%al
call   1060 <window_wait@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdx
mov    $0x320,%edi
mov    $0x258,%esi
call   1050 <gfx_open@plt>
xor    %edi,%edi
mov    $0xc8,%esi
mov    $0x64,%edx
call   1040 <gfx_color@plt>
mov    $0x14,%edi
mov    $0xa,%esi
mov    $0x1e,%edx
mov    $0x12,%ecx
call   1030 <bresenham@plt>
xor    %eax,%eax
call   1060 <window_wait@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Graphics Algorithms\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 800, i32* %1
store i32 600, i32* %2
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = call i32 @gfx_open(i32 %7, i32 %8, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @gfx_color(i32 0, i32 200, i32 100)
store i32 20, i32* %3
store i32 10, i32* %4
store i32 30, i32* %5
store i32 18, i32* %6
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @bresenham(i32 %11, i32 %12, i32 %13, i32 %14)
%16 = call i32 (...) @window_wait()
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"Graphics Algorithms\00"
define i32 @main() {
%1 = tail call i32 @gfx_open(i32 800, i32 600, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @gfx_color(i32 0, i32 200, i32 100)
%3 = tail call i32 @bresenham(i32 20, i32 10, i32 30, i32 18)
%4 = tail call i32 (...) @window_wait()
ret i32 0
}
/* Variables and functions */
int ERR;
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int getch();
int /*<<< orphan*/ stdin;
int get_key_pressed() {
  int ch = getch();
  if (ch != ERR) {
    return ch;
  }
  return (-1);
  fflush(stdin);
}


x86 assembly (clang, -O0):
<get_key_pressed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getch@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2ebc(%rip),%rcx
cmp    (%rcx),%eax
je     113f <get_key_pressed+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <get_key_pressed+0x36>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_key_pressed>:
push   %rax
xor    %eax,%eax
call   1030 <getch@plt>
mov    0x2ec9(%rip),%rcx
cmp    (%rcx),%eax
mov    $0xffffffff,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ERR = global i32 0
@stdin = global i32 0
define i32 @get_key_pressed() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @getch()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @ERR
%6 = icmp ne i32 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i32, i32* %2
store i32 %8, i32* %1
br label %10
9: ; preds = %0
store i32 -1, i32* %1
br label %10
10: ; preds = %9, %7
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@ERR = global i32 0
@stdin = global i32 0
define i32 @get_key_pressed() {
%1 = tail call i32 (...) @getch()
%2 = load i32, i32* @ERR
%3 = icmp eq i32 %1, %2
%4 = select i1 %3, i32 -1, i32 %1
ret i32 %4
}
char *g_zerom(char *input, char m) {
  while (input[0] && input[0] == m) {
    input++;
  }
  return input;
}


x86 assembly (clang, -O0):
<g_zerom>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xa(%rbp)
je     1136 <g_zerom+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
test   $0x1,%al
jne    1146 <g_zerom+0x46>
jmp    1157 <g_zerom+0x57>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110e <g_zerom+0xe>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_zerom>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
je     1121 <g_zerom+0x21>
cmp    %sil,%cl
je     1110 <g_zerom+0x10>
ret

LLVM IR (-O0):
define i8* @g_zerom(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
br label %5
5: ; preds = %21, %2
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %15, %17
br label %19
19: ; preds = %11, %5
%20 = phi i1 [ false, %5 ], [ %18, %11 ]
br i1 %20, label %21, label %24
21: ; preds = %19
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
br label %5
24: ; preds = %19
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @g_zerom(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %9, %3 ]
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
%7 = icmp eq i8 %5, %1
%8 = and i1 %6, %7
%9 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %8, label %3, label %10
10: ; preds = %3
ret i8* %4
}
/* Variables and functions */
#define SIGALRM 130
#define SIGCHLD 129
#define SIGUSR1 128
int /*<<< orphan*/ exit(int);
void child_handler(int signum) {
  switch (signum) {
  case SIGALRM:
    exit(1);
    break;
  case SIGUSR1:
    exit(0);
    break;
  case SIGCHLD:
    exit(1);
    break;
  }
}


x86 assembly (clang, -O0):
<child_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x80,%eax
je     1161 <child_handler+0x51>
jmp    1131 <child_handler+0x21>
mov    -0x8(%rbp),%eax
sub    $0x81,%eax
je     1168 <child_handler+0x58>
jmp    1144 <child_handler+0x34>
mov    -0x8(%rbp),%eax
sub    $0x82,%eax
jne    1172 <child_handler+0x62>
jmp    1157 <child_handler+0x47>
mov    $0x1,%edi
call   1030 <exit@plt>
xor    %edi,%edi
call   1030 <exit@plt>
mov    $0x1,%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_handler>:
push   %rax
cmp    $0x80,%edi
je     1135 <child_handler+0x25>
cmp    $0x81,%edi
je     112b <child_handler+0x1b>
cmp    $0x82,%edi
je     112b <child_handler+0x1b>
pop    %rax
ret
mov    $0x1,%edi
call   1030 <exit@plt>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @child_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %10 [
i32 130, label %4
i32 128, label %6
i32 129, label %8
]
4: ; preds = %1
%5 = call i32 @exit(i32 1)
unreachable
6: ; preds = %1
%7 = call i32 @exit(i32 0)
unreachable
8: ; preds = %1
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @child_handler(i32 %0) {
switch i32 %0, label %8 [
i32 130, label %2
i32 128, label %4
i32 129, label %6
]
2: ; preds = %1
%3 = tail call i32 @exit(i32 1)
unreachable
4: ; preds = %1
%5 = tail call i32 @exit(i32 0)
unreachable
6: ; preds = %1
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret void
}
void U010ToARGB() {}


x86 assembly (clang, -O0):
<U010ToARGB>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U010ToARGB>:
ret

LLVM IR (-O0):
define void @U010ToARGB() {
ret void
}

LLVM IR (-O2):
define void @U010ToARGB() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpneq_sd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmpneq_sd(__m128d __a, __m128d __b) {
  return _mm_cmpneq_sd(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpneq_sd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpneq_sd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpneq_sd>:
jmp    1030 <_mm_cmpneq_sd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpneq_sd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpneq_sd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpneq_sd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpneq_sd(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ remove_me();
int main(void) {
  int a = -100;
  int b = 2;
  int c = 3;
  int d = -5;
  int e = 3;
  int f = -100;
  while (a) {
    a = a + b;
    b = b + c;
    c = c + 4;
    d = d + 4;
    e = e + d;
    f = f + e;
    if (a != f)
      remove_me();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffff9c,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0xfffffffb,-0x14(%rbp)
movl   $0x3,-0x18(%rbp)
movl   $0xffffff9c,-0x1c(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     11a1 <main+0x91>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x1c(%rbp),%eax
je     119c <main+0x8c>
mov    $0x0,%al
call   1030 <remove_me@plt>
jmp    1149 <main+0x39>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %1
store i32 -100, i32* %2
store i32 2, i32* %3
store i32 3, i32* %4
store i32 -5, i32* %5
store i32 3, i32* %6
store i32 -100, i32* %7
br label %8
8: ; preds = %33, %0
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %34
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
store i32 %14, i32* %2
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
store i32 %17, i32* %3
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 4
store i32 %19, i32* %4
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 4
store i32 %21, i32* %5
%22 = load i32, i32* %6
%23 = load i32, i32* %5
%24 = add nsw i32 %22, %23
store i32 %24, i32* %6
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = add nsw i32 %25, %26
store i32 %27, i32* %7
%28 = load i32, i32* %2
%29 = load i32, i32* %7
%30 = icmp ne i32 %28, %29
br i1 %30, label %31, label %33
31: ; preds = %11
%32 = call i32 (...) @remove_me()
br label %33
33: ; preds = %31, %11
br label %8
34: ; preds = %8
%35 = load i32, i32* %1
ret i32 %35
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ scan_dir_or_archive(char *);
int main(void) {
  scan_dir_or_archive(".");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <scan_dir_or_archive@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <scan_dir_or_archive@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c".\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @scan_dir_or_archive(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c".\00"
define i32 @main() {
%1 = tail call i32 @scan_dir_or_archive(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void dummytest() {}


x86 assembly (clang, -O0):
<dummytest>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummytest>:
ret

LLVM IR (-O0):
define void @dummytest() {
ret void
}

LLVM IR (-O2):
define void @dummytest() {
ret void
}
/* Variables and functions */
scalar_t__ check_char(char *, char *);
int parse_line(char *buffert) {
  while (*buffert != '\n') {
    if (check_char(&(*buffert), &(*(buffert + 1)))) {
      return 1;
    }
    ++buffert;
  }
  return 0;
}


x86 assembly (clang, -O0):
<parse_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
je     1164 <parse_line+0x54>
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0x1,%rsi
call   1030 <check_char@plt>
cmp    $0x0,%rax
je     1153 <parse_line+0x43>
movl   $0x1,-0x4(%rbp)
jmp    116b <parse_line+0x5b>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <parse_line+0xc>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_line>:
push   %rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmpb   $0xa,(%rdi)
je     1140 <parse_line+0x30>
lea    0x1(%rdi),%rbx
mov    %rbx,%rsi
call   1030 <check_char@plt>
mov    %rbx,%rdi
test   %rax,%rax
je     1120 <parse_line+0x10>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @parse_line(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 10
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = call i64 @check_char(i8* %10, i8* %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 1, i32* %2
br label %20
16: ; preds = %9
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
br label %4
19: ; preds = %4
store i32 0, i32* %2
br label %20
20: ; preds = %19, %15
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @parse_line(i8* %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 10
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
%8 = tail call i64 @check_char(i8* %3, i8* %7)
%9 = icmp eq i64 %8, 0
br i1 %9, label %2, label %10
10: ; preds = %2, %6
%11 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %11
}