xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void sql_xfree(void *p) {
  if (NULL != p) {
    free(p);
  }
}


x86 assembly (clang, -O0):
<sql_xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1131 <sql_xfree+0x21>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sql_xfree>:
test   %rdi,%rdi
je     111a <sql_xfree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @sql_xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* null, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @sql_xfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int gid_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int getgroups(int gidsetlen, gid_t *gidset) {
  if (gidsetlen < 2) {
    errno = EINVAL;
    return -1;
  }
  gidset[0] = 100;
  gidset[1] = 0;
  return 2;
}


x86 assembly (clang, -O0):
<getgroups>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1133 <getgroups+0x33>
mov    0x2ebc(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebb(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <getgroups+0x4f>
mov    -0x10(%rbp),%rax
movl   $0x64,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,0x4(%rax)
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgroups>:
cmp    $0x1,%edi
jg     111d <getgroups+0x1d>
mov    0x2ecc(%rip),%rax
mov    (%rax),%eax
mov    0x2ecb(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret
movq   $0x64,(%rsi)
mov    $0x2,%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @getgroups(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* @EINVAL
store i32 %9, i32* @errno
store i32 -1, i32* %3
br label %15
10: ; preds = %2
%11 = load i32*, i32** %5
%12 = getelementptr inbounds i32, i32* %11, i64 0
store i32 100, i32* %12
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 0, i32* %14
store i32 2, i32* %3
br label %15
15: ; preds = %10, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @getgroups(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = load i32, i32* @EINVAL
store i32 %5, i32* @errno
br label %8
6: ; preds = %2
store i32 100, i32* %1
%7 = getelementptr inbounds i32, i32* %1, i64 1
store i32 0, i32* %7
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ -1, %4 ], [ 2, %6 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x12() {
  Assert_real((isalnum(18) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              95, ("isalnum should be 0 for 0x12"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x12>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x5f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x12>:
push   %rax
mov    $0x12,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x5f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x12\00"
define void @t_isalnum_0x12() {
%1 = call i64 @isalnum(i32 18)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 95, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x12\00"
define void @t_isalnum_0x12() {
%1 = tail call i64 @isalnum(i32 18)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 95, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("usage: compute_distrib -distlist <str> (REQUIRED)]\n\t[-outfile "
         "<str> (REQUIRED)]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [81 x i8] c"usage: compute_distrib -distlist <str> (REQUIRED)]\0A\09[-outfile <str> (REQUIRED)]\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [80 x i8] c"usage: compute_distrib -distlist <str> (REQUIRED)]\0A\09[-outfile <str> (REQUIRED)]\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([80 x i8], [80 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ calloc_test();
int /*<<< orphan*/ malloc_plus_memset_test();
int /*<<< orphan*/ malloc_test();
int main(int argc, char **argv) {
  malloc_test();
  calloc_test();
  malloc_plus_memset_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <malloc_test@plt>
mov    $0x0,%al
call   1030 <calloc_test@plt>
mov    $0x0,%al
call   1040 <malloc_plus_memset_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <malloc_test@plt>
xor    %eax,%eax
call   1030 <calloc_test@plt>
xor    %eax,%eax
call   1040 <malloc_plus_memset_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @malloc_test()
%7 = call i32 (...) @calloc_test()
%8 = call i32 (...) @malloc_plus_memset_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @malloc_test()
%4 = tail call i32 (...) @calloc_test()
%5 = tail call i32 (...) @malloc_plus_memset_test()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ check(unsigned int);
int /*<<< orphan*/ hash(char *);
unsigned int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
unsigned gencookie(char *s) {
  unsigned val;
  srand(hash(s));
  do
    val = rand();
  while (!check(val));
  return val;
}


x86 assembly (clang, -O0):
<gencookie>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hash@plt>
mov    %eax,%edi
call   1040 <srand@plt>
mov    $0x0,%al
call   1060 <rand@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <check@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    115c <gencookie+0x1c>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gencookie>:
push   %rbx
call   1030 <hash@plt>
mov    %eax,%edi
call   1040 <srand@plt>
nopl   (%rax)
xor    %eax,%eax
call   1060 <rand@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1050 <check@plt>
test   %eax,%eax
je     1150 <gencookie+0x10>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @gencookie(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @hash(i8* %4)
%6 = call i32 @srand(i32 %5)
br label %7
7: ; preds = %9, %1
%8 = call i32 (...) @rand()
store i32 %8, i32* %3
br label %9
9: ; preds = %7
%10 = load i32, i32* %3
%11 = call i32 @check(i32 %10)
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %7, label %14
14: ; preds = %9
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @gencookie(i8* %0) {
%2 = tail call i32 @hash(i8* %0)
%3 = tail call i32 @srand(i32 %2)
br label %4
4: ; preds = %4, %1
%5 = tail call i32 (...) @rand()
%6 = tail call i32 @check(i32 %5)
%7 = icmp eq i32 %6, 0
br i1 %7, label %4, label %8
8: ; preds = %4
ret i32 %5
}
long unsigned int swap(long unsigned int fnum) {
  long unsigned int rev;
  rev = 0;
  while (fnum > 0) {
    rev = rev * 10 + fnum % 10;
    fnum = fnum / 10;
  }
  return rev;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jbe    1154 <swap+0x54>
imul   $0xa,-0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
xor    %edx,%edx
div    %rcx
mov    -0x18(%rbp),%rax
add    %rdx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x8(%rbp)
jmp    1110 <swap+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
test   %rdi,%rdi
je     114a <swap+0x4a>
mov    %rdi,%rcx
xor    %eax,%eax
movabs $0xcccccccccccccccd,%r8
cc cc cc
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    (%rax,%rax,4),%rsi
mov    %rcx,%rax
mul    %r8
shr    $0x3,%rdx
lea    (%rdx,%rdx,1),%rax
lea    (%rax,%rax,4),%rax
mov    %rcx,%rdi
sub    %rax,%rdi
lea    (%rdi,%rsi,2),%rax
cmp    $0x9,%rcx
mov    %rdx,%rcx
ja     1120 <swap+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @swap(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ugt i64 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i64, i64* %3
%9 = mul i64 %8, 10
%10 = load i64, i64* %2
%11 = urem i64 %10, 10
%12 = add i64 %9, %11
store i64 %12, i64* %3
%13 = load i64, i64* %2
%14 = udiv i64 %13, 10
store i64 %14, i64* %2
br label %4
15: ; preds = %4
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @swap(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = mul i64 %4, 10
%7 = urem i64 %5, 10
%8 = add i64 %6, %7
%9 = udiv i64 %5, 10
%10 = icmp ult i64 %5, 10
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i64 [ 0, %1 ], [ %8, %3 ]
ret i64 %12
}
unsigned uDivTest2(unsigned X, unsigned Y) { return X / 1; }


x86 assembly (clang, -O0):
<uDivTest2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDivTest2>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @uDivTest2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = udiv i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @uDivTest2(i32 returned %0, i32 %1) {
ret i32 %0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int parity(uint32_t x) {
  x ^= x >> 16;
  x ^= x >> 8;
  x ^= x >> 4;
  return ((0x6996) >> (x & 0xf) & 1);
}


x86 assembly (clang, -O0):
<parity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
mov    $0x6996,%eax
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parity>:
mov    %edi,%eax
sar    $0x10,%eax
xor    %edi,%eax
mov    %eax,%edx
sar    $0x8,%edx
xor    %eax,%edx
mov    %edx,%ecx
shr    $0x4,%ecx
xor    %edx,%ecx
and    $0xf,%cl
mov    $0x6996,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @parity(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
%5 = load i32, i32* %2
%6 = xor i32 %5, %4
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = ashr i32 %7, 8
%9 = load i32, i32* %2
%10 = xor i32 %9, %8
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = ashr i32 %11, 4
%13 = load i32, i32* %2
%14 = xor i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = and i32 %15, 15
%17 = ashr i32 27030, %16
%18 = and i32 %17, 1
ret i32 %18
}

LLVM IR (-O2):
define i32 @parity(i32 %0) {
%2 = ashr i32 %0, 16
%3 = xor i32 %2, %0
%4 = ashr i32 %3, 8
%5 = xor i32 %4, %3
%6 = lshr i32 %5, 4
%7 = xor i32 %6, %5
%8 = and i32 %7, 15
%9 = lshr i32 27030, %8
%10 = and i32 %9, 1
ret i32 %10
}
int strange_order(int a, int b) {
  if (a == 0 || b == 0) {
    return 0;
  } else {
    return a % b;
  }
}


x86 assembly (clang, -O0):
<strange_order>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111e <strange_order+0x1e>
cmpl   $0x0,-0xc(%rbp)
jne    112a <strange_order+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1134 <strange_order+0x34>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strange_order>:
xor    %eax,%eax
test   %edi,%edi
je     1111 <strange_order+0x11>
test   %esi,%esi
je     1111 <strange_order+0x11>
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @strange_order(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 0, i32* %3
br label %16
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = srem i32 %13, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @strange_order(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = srem i32 %0, %1
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ sound_is_done(int);
int /*<<< orphan*/ sound_stop(int);
void state_gameover_destroy() {
  if (!sound_is_done(2)) {
    sound_stop(2);
  }
}


x86 assembly (clang, -O0):
<state_gameover_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1040 <sound_is_done@plt>
cmp    $0x0,%eax
jne    1141 <state_gameover_destroy+0x21>
mov    $0x2,%edi
call   1030 <sound_stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<state_gameover_destroy>:
push   %rax
mov    $0x2,%edi
call   1040 <sound_is_done@plt>
test   %eax,%eax
je     1131 <state_gameover_destroy+0x11>
pop    %rax
ret
mov    $0x2,%edi
pop    %rax
jmp    1030 <sound_stop@plt>

LLVM IR (-O0):
define void @state_gameover_destroy() {
%1 = call i32 @sound_is_done(i32 2)
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 @sound_stop(i32 2)
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @state_gameover_destroy() {
%1 = tail call i32 @sound_is_done(i32 2)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @sound_stop(i32 2)
br label %5
5: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR8F_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR8F_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR8F_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR8F_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR8F_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void HandleFunc_2(void) { printf("cleanup func2\n"); }


x86 assembly (clang, -O0):
<HandleFunc_2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HandleFunc_2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"cleanup func2\0A\00"
define void @HandleFunc_2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"cleanup func2\00"
define void @HandleFunc_2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
float f(void) { return 3.1415926; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f() {
ret float 0x400921FB40000000
}

LLVM IR (-O2):
define float @f() {
ret float 0x400921FB40000000
}
/* Type definitions */
struct threadpool {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct threadpool *);
int /*<<< orphan*/ threadpool_destroy(struct threadpool *);
void threadpool_delete(struct threadpool *__restrict pool) {
  threadpool_destroy(pool);
  free(pool);
}


x86 assembly (clang, -O0):
<threadpool_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <threadpool_destroy@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadpool_delete>:
push   %rbx
mov    %rdi,%rbx
call   1040 <threadpool_destroy@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.threadpool = type { i32 }
define void @threadpool_delete(%struct.threadpool* noalias %0) {
%2 = alloca %struct.threadpool*
store %struct.threadpool* %0, %struct.threadpool** %2
%3 = load %struct.threadpool*, %struct.threadpool** %2
%4 = call i32 @threadpool_destroy(%struct.threadpool* %3)
%5 = load %struct.threadpool*, %struct.threadpool** %2
%6 = call i32 @free(%struct.threadpool* %5)
ret void
}

LLVM IR (-O2):
%struct.threadpool = type { i32 }
define void @threadpool_delete(%struct.threadpool* noalias %0) {
%2 = tail call i32 @threadpool_destroy(%struct.threadpool* %0)
%3 = tail call i32 @free(%struct.threadpool* %0)
ret void
}
/* Type definitions */
struct shmid_ds {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __NR_shmctl;
int syscall(int /*<<< orphan*/, int, int, struct shmid_ds *);
int shmctl(int shmid, int cmd, struct shmid_ds *buf) {
  return syscall(__NR_shmctl, shmid, cmd, buf);
}


x86 assembly (clang, -O0):
<shmctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    0x2eb7(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmctl>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@__NR_shmctl = global i32 0
define i32 @shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.shmid_ds*
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.shmid_ds* %2, %struct.shmid_ds** %6
%7 = load i32, i32* @__NR_shmctl
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load %struct.shmid_ds*, %struct.shmid_ds** %6
%11 = call i32 @syscall(i32 %7, i32 %8, i32 %9, %struct.shmid_ds* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@__NR_shmctl = global i32 0
define i32 @shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2) {
%4 = load i32, i32* @__NR_shmctl
%5 = tail call i32 @syscall(i32 %4, i32 %0, i32 %1, %struct.shmid_ds* %2)
ret i32 %5
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_source_get_name(void *s, const char **name) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_source_get_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_source_get_name>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_source_get_name(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_source_get_name(i8* nocapture readnone %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int one_bits32(uint32_t x) {
  x = x - ((x >> 1) & 0x55555555);
  x = (x & 0x33333333) + ((x >> 2) & 0x33333333);
  x = (x + (x >> 4)) & 0x0F0F0F0F;
  return (x * 0x01010101) >> 24;
}


x86 assembly (clang, -O0):
<one_bits32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x55555555,%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x33333333,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
mov    %eax,-0x4(%rbp)
imul   $0x1010101,-0x4(%rbp),%eax
sar    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<one_bits32>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @one_bits32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 1
%6 = and i32 %5, 1431655765
%7 = sub nsw i32 %3, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = and i32 %8, 858993459
%10 = load i32, i32* %2
%11 = ashr i32 %10, 2
%12 = and i32 %11, 858993459
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
%14 = load i32, i32* %2
%15 = load i32, i32* %2
%16 = ashr i32 %15, 4
%17 = add nsw i32 %14, %16
%18 = and i32 %17, 252645135
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = mul nsw i32 %19, 16843009
%21 = ashr i32 %20, 24
ret i32 %21
}

LLVM IR (-O2):
define i32 @one_bits32(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = sub nsw i32 %0, %3
%5 = and i32 %4, 858993459
%6 = lshr i32 %4, 2
%7 = and i32 %6, 858993459
%8 = add nuw nsw i32 %7, %5
%9 = lshr i32 %8, 4
%10 = add nuw nsw i32 %9, %8
%11 = and i32 %10, 252645135
%12 = mul nsw i32 %11, 16843009
%13 = lshr i32 %12, 24
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_castps_si128(int /*<<< orphan*/);
int /*<<< orphan*/ _mm_castsi128_ps(int /*<<< orphan*/ const);
int /*<<< orphan*/ _mm_loadh_pi(int /*<<< orphan*/, int /*<<< orphan*/ const *);
__m128i loadh_epi64(const void *const src, const __m128i s) {
  return _mm_castps_si128(
      _mm_loadh_pi(_mm_castsi128_ps(s), (const __m64 *)src));
}


x86 assembly (clang, -O0):
<loadh_epi64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <_mm_castsi128_ps@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1050 <_mm_loadh_pi@plt>
mov    %eax,%edi
call   1030 <_mm_castps_si128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadh_epi64>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <_mm_castsi128_ps@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1050 <_mm_loadh_pi@plt>
mov    %eax,%edi
pop    %rbx
jmp    1030 <_mm_castps_si128@plt>

LLVM IR (-O0):
define i32 @loadh_epi64(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @_mm_castsi128_ps(i32 %5)
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = call i32 @_mm_loadh_pi(i32 %6, i32* %8)
%10 = call i32 @_mm_castps_si128(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @loadh_epi64(i8* %0, i32 %1) {
%3 = tail call i32 @_mm_castsi128_ps(i32 %1)
%4 = bitcast i8* %0 to i32*
%5 = tail call i32 @_mm_loadh_pi(i32 %3, i32* %4)
%6 = tail call i32 @_mm_castps_si128(i32 %5)
ret i32 %6
}
int main(void) {
  int *a;
  if (a) {
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     111b <main+0x1b>
jmp    111b <main+0x1b>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %6
5: ; preds = %0
br label %6
6: ; preds = %5, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int do_315() { return 315; }


x86 assembly (clang, -O0):
<do_315>:
push   %rbp
mov    %rsp,%rbp
mov    $0x13b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_315>:
mov    $0x13b,%eax
ret

LLVM IR (-O0):
define i32 @do_315() {
ret i32 315
}

LLVM IR (-O2):
define i32 @do_315() {
ret i32 315
}
int ehSimetrica() { return 1; }


x86 assembly (clang, -O0):
<ehSimetrica>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehSimetrica>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ehSimetrica() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ehSimetrica() {
ret i32 1
}
/* Variables and functions */
int strcmp(char *, char *);
int compare_string(void *a, void *b) {
  char *c = (char *)a;
  char *d = (char *)b;
  return strcmp(c, d);
}


x86 assembly (clang, -O0):
<compare_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_string>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @strcmp(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare_string(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ assert_or_panic(int);
void c_f64(double x) { assert_or_panic(x == 56.78); }


x86 assembly (clang, -O0):
<c_f64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert_or_panic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_f64>:
cmpeqsd 0xee7(%rip),%xmm0
movq   %xmm0,%rdi
and    $0x1,%edi
jmp    1030 <assert_or_panic@plt>

LLVM IR (-O0):
define void @c_f64(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oeq double %3, 5.678000e+01
%5 = zext i1 %4 to i32
%6 = call i32 @assert_or_panic(i32 %5)
ret void
}

LLVM IR (-O2):
define void @c_f64(double %0) {
%2 = fcmp oeq double %0, 5.678000e+01
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert_or_panic(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ serialWrite(int, int);
void sendETX(int fd) {
  serialWrite(fd, 0x04);
  printf("<ETX>\n");
}


x86 assembly (clang, -O0):
<sendETX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x4,%esi
call   1040 <serialWrite@plt>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendETX>:
push   %rax
mov    $0x4,%esi
call   1040 <serialWrite@plt>
lea    0xece(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"<ETX>\0A\00"
define void @sendETX(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @serialWrite(i32 %3, i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"<ETX>\00"
define void @sendETX(i32 %0) {
%2 = tail call i32 @serialWrite(i32 %0, i32 4)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
int disablePorts(unsigned short int base, unsigned short int count) {
  return 0;
}


x86 assembly (clang, -O0):
<disablePorts>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<disablePorts>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @disablePorts(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @disablePorts(i16 zeroext %0, i16 zeroext %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x52() {
  Assert_real((isxdigit(82) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              415, ("isxdigit should be 0 for R"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x52>:
push   %rbp
mov    %rsp,%rbp
mov    $0x52,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x19f,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x52>:
push   %rax
mov    $0x52,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x19f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for R\00"
define void @t_isxdigit_0x52() {
%1 = call i64 @isxdigit(i32 82)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for R\00"
define void @t_isxdigit_0x52() {
%1 = tail call i64 @isxdigit(i32 82)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void g_scanner_scope_foreach_symbol() {}


x86 assembly (clang, -O0):
<g_scanner_scope_foreach_symbol>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_scanner_scope_foreach_symbol>:
ret

LLVM IR (-O0):
define void @g_scanner_scope_foreach_symbol() {
ret void
}

LLVM IR (-O2):
define void @g_scanner_scope_foreach_symbol() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void sigsegv_handler(int sig) {
  printf("Received segmentation violation (SIGSEGV).  Good.\n");
  exit(0);
}


x86 assembly (clang, -O0):
<sigsegv_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sigsegv_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"Received segmentation violation (SIGSEGV). Good.\0A\00"
define void @sigsegv_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [50 x i8] c"Received segmentation violation (SIGSEGV). Good.\00"
define void @sigsegv_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void perc_usage() {
  fprintf(stderr, "usage: perc X\n");
  fprintf(stderr, "  returns the Xth percentile of the dataset\n");
}


x86 assembly (clang, -O0):
<perc_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xed6(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<perc_usage>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xee0(%rip),%rsi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"usage: perc X\0A\00"
@.str.1 = [45 x i8] c" returns the Xth percentile of the dataset\0A\00"
define void @perc_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"usage: perc X\0A\00"
@.str.1 = [45 x i8] c" returns the Xth percentile of the dataset\0A\00"
define void @perc_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ WEOF;
wint_t fputwc(wchar_t wc, FILE *stream) {
  ;
  return WEOF;
}


x86 assembly (clang, -O0):
<fputwc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputwc>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@WEOF = global i32 0
define i32 @fputwc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* @WEOF
ret i32 %5
}

LLVM IR (-O2):
@WEOF = global i32 0
define i32 @fputwc(i32 %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @WEOF
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int div_operator(int, int);
uint32_t mod_operator(uint32_t a, uint32_t b) {
  return a - div_operator(a, b) * b;
}


x86 assembly (clang, -O0):
<mod_operator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <div_operator@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%ecx
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_operator>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <div_operator@plt>
imul   %ebx,%eax
sub    %eax,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mod_operator(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @div_operator(i32 %6, i32 %7)
%9 = load i32, i32* %4
%10 = mul nsw i32 %8, %9
%11 = sub nsw i32 %5, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @mod_operator(i32 %0, i32 %1) {
%3 = tail call i32 @div_operator(i32 %0, i32 %1)
%4 = mul nsw i32 %3, %1
%5 = sub nsw i32 %0, %4
ret i32 %5
}
int fi1(int j, char *b, int i) { return j + b[i]; }


x86 assembly (clang, -O0):
<fi1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi1>:
movslq %edx,%rax
movsbl (%rsi,%rax,1),%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @fi1(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = add nsw i32 %7, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @fi1(i32 %0, i8* nocapture %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = add nsw i32 %7, %0
ret i32 %8
}
int magicNumber() { return 43110; }


x86 assembly (clang, -O0):
<magicNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa866,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<magicNumber>:
mov    $0xa866,%eax
ret

LLVM IR (-O0):
define i32 @magicNumber() {
ret i32 43110
}

LLVM IR (-O2):
define i32 @magicNumber() {
ret i32 43110
}
int load_asic(struct echoaudio *chip) { return 0; }


x86 assembly (clang, -O0):
<load_asic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_asic>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.echoaudio = type opaque
define i32 @load_asic(%struct.echoaudio* %0) {
%2 = alloca %struct.echoaudio*
store %struct.echoaudio* %0, %struct.echoaudio** %2
ret i32 0
}

LLVM IR (-O2):
%struct.echoaudio = type opaque
define i32 @load_asic(%struct.echoaudio* nocapture readnone %0) {
ret i32 0
}
int is_multibyte(const int byte) { return ((byte & 0xC0) == 0x80); }


x86 assembly (clang, -O0):
<is_multibyte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_multibyte>:
and    $0xc0,%edi
xor    %eax,%eax
cmp    $0x80,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_multibyte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 192
%5 = icmp eq i32 %4, 128
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_multibyte(i32 %0) {
%2 = and i32 %0, 192
%3 = icmp eq i32 %2, 128
%4 = zext i1 %3 to i32
ret i32 %4
}
signed short t6(signed short x) { return ++x; }


x86 assembly (clang, -O0):
<t6>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x2(%rbp)
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<t6>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define signext i16 @t6(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = add i16 %3, 1
store i16 %4, i16* %2
ret i16 %4
}

LLVM IR (-O2):
define signext i16 @t6(i16 signext %0) {
%2 = add i16 %0, 1
ret i16 %2
}
int noecho() { return (0); }


x86 assembly (clang, -O0):
<noecho>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<noecho>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @noecho() {
ret i32 0
}

LLVM IR (-O2):
define i32 @noecho() {
ret i32 0
}
void enable_powerfail(int enable) { enable = enable; }


x86 assembly (clang, -O0):
<enable_powerfail>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_powerfail>:
ret

LLVM IR (-O0):
define void @enable_powerfail(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @enable_powerfail(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int main() {
  while (1) {
    sleep(100);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x64,%edi
call   1030 <sleep@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x64,%edi
call   1030 <sleep@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @sleep(i32 100)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @sleep(i32 100)
br label %1
}
void GPU_vBlank(int val) {}


x86 assembly (clang, -O0):
<GPU_vBlank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPU_vBlank>:
ret

LLVM IR (-O0):
define void @GPU_vBlank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @GPU_vBlank(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void help(void) {
  fprintf(stderr, "Usage: generate_lif [-r] <input_file>\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<help>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [39 x i8] c"Usage: generate_lif [-r] <input_file>\0A\00"
@EXIT_FAILURE = global i32 0
define void @help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [39 x i8] c"Usage: generate_lif [-r] <input_file>\0A\00"
@EXIT_FAILURE = global i32 0
define void @help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
double asin(double);
double sin(double);
double sunmodel_obliquity_correction(double);
double sunmodel_sun_apparent_long(double, double);
double sunmodel_sun_declination(double t, double true_long) {
  double e, lambda, sint, theta;
  e = sunmodel_obliquity_correction(t);
  lambda = sunmodel_sun_apparent_long(t, true_long);
  sint = sin(e) * sin(lambda);
  theta = asin(sint);
  return theta;
}


x86 assembly (clang, -O0):
<sunmodel_sun_declination>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1060 <sunmodel_obliquity_correction@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1050 <sunmodel_sun_apparent_long@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <sin@plt>
movsd  %xmm0,-0x38(%rbp)
movsd  -0x20(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x38(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
call   1040 <asin@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sunmodel_sun_declination>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
call   1060 <sunmodel_obliquity_correction@plt>
movsd  %xmm0,(%rsp)
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
call   1050 <sunmodel_sun_apparent_long@plt>
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
call   1030 <sin@plt>
movsd  %xmm0,(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <sin@plt>
mulsd  (%rsp),%xmm0
add    $0x18,%rsp
jmp    1040 <asin@plt>

LLVM IR (-O0):
define double @sunmodel_sun_declination(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %3
store double %1, double* %4
%9 = load double, double* %3
%10 = call double @sunmodel_obliquity_correction(double %9)
store double %10, double* %5
%11 = load double, double* %3
%12 = load double, double* %4
%13 = call double @sunmodel_sun_apparent_long(double %11, double %12)
store double %13, double* %6
%14 = load double, double* %5
%15 = call double @sin(double %14)
%16 = load double, double* %6
%17 = call double @sin(double %16)
%18 = fmul double %15, %17
store double %18, double* %7
%19 = load double, double* %7
%20 = call double @asin(double %19)
store double %20, double* %8
%21 = load double, double* %8
ret double %21
}

LLVM IR (-O2):
define double @sunmodel_sun_declination(double %0, double %1) {
%3 = tail call double @sunmodel_obliquity_correction(double %0)
%4 = tail call double @sunmodel_sun_apparent_long(double %0, double %1)
%5 = tail call double @sin(double %3)
%6 = tail call double @sin(double %4)
%7 = fmul double %5, %6
%8 = tail call double @asin(double %7)
ret double %8
}