xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void TimerEventControl(uint32_t ui32Base, uint32_t ui32Timer,
                       uint32_t ui32Event) {
  ;

  ;
  ui32Timer &= 0x0000000C | 0x00000C00;
  (*((volatile unsigned long *)(ui32Base + 0x0000000C))) =
      (((*((volatile unsigned long *)(ui32Base + 0x0000000C))) & ~ui32Timer) |
       (ui32Event & ui32Timer));
}


x86 assembly (clang, -O0):
<TimerEventControl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xc0c,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%rcx
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
cltq
and    %rax,%rcx
mov    -0xc(%rbp),%eax
and    -0x8(%rbp),%eax
cltq
or     %rax,%rcx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerEventControl>:
and    $0xc0c,%esi
movslq %edi,%rax
mov    %esi,%ecx
not    %ecx
movslq %ecx,%rcx
and    0xc(%rax),%rcx
and    %edx,%esi
or     %rcx,%rsi
mov    %rsi,0xc(%rax)
ret

LLVM IR (-O0):
define void @TimerEventControl(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = and i32 %7, 3084
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = add nsw i32 %9, 12
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = load i32, i32* %5
%15 = xor i32 %14, -1
%16 = sext i32 %15 to i64
%17 = and i64 %13, %16
%18 = load i32, i32* %6
%19 = load i32, i32* %5
%20 = and i32 %18, %19
%21 = sext i32 %20 to i64
%22 = or i64 %17, %21
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 12
%25 = sext i32 %24 to i64
%26 = inttoptr i64 %25 to i64*
store volatile i64 %22, i64* %26
ret void
}

LLVM IR (-O2):
define void @TimerEventControl(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, 3084
%5 = add nsw i32 %0, 12
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = xor i32 %4, -1
%10 = sext i32 %9 to i64
%11 = and i64 %8, %10
%12 = and i32 %4, %2
%13 = zext i32 %12 to i64
%14 = or i64 %11, %13
store volatile i64 %14, i64* %7
ret void
}
volatile char *build_pusha(volatile char *tgt_addr) {
  (*(char *)tgt_addr) = 0x60;
  tgt_addr += 0x1;
  return (tgt_addr);
}


x86 assembly (clang, -O0):
<build_pusha>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x60,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_pusha>:
movb   $0x60,(%rdi)
lea    0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @build_pusha(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
store i8 96, i8* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %2
%6 = load i8*, i8** %2
ret i8* %6
}

LLVM IR (-O2):
define i8* @build_pusha(i8* writeonly %0) {
store i8 96, i8* %0
%2 = getelementptr inbounds i8, i8* %0, i64 1
ret i8* %2
}
char *s_text(yytext)
char *yytext;
{
  static char *rval = (char *)0;
  if (rval) {
    xfree(rval);
    rval = (char *)0;
  }
  rval = xstrdup(asc_str(yytext, -1));
  return rval;
}


x86 assembly (clang, -O0):
<s_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,0x2efc(%rip)
je     1163 <s_text+0x33>
mov    0x2eef(%rip),%rdi
mov    $0x0,%al
call   1030 <xfree@plt>
movq   $0x0,0x2edd(%rip)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
mov    $0x0,%al
call   1050 <asc_str@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1040 <xstrdup@plt>
cltq
mov    %rax,0x2ebb(%rip)
mov    0x2eb4(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_text>:
push   %rbx
mov    %rdi,%rbx
mov    0x2f05(%rip),%rdi
test   %rdi,%rdi
je     1152 <s_text+0x22>
xor    %eax,%eax
call   1030 <xfree@plt>
movq   $0x0,0x2eee(%rip)
mov    %rbx,%rdi
mov    $0xffffffff,%esi
xor    %eax,%eax
call   1050 <asc_str@plt>
mov    %eax,%edi
xor    %eax,%eax
call   1040 <xstrdup@plt>
cltq
mov    %rax,0x2ecd(%rip)
pop    %rbx
ret

LLVM IR (-O0):
@s_text.rval = internal global i8* null
define i8* @s_text(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** @s_text.rval
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** @s_text.rval
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @xfree to i32 (i8*, ...)*)(i8* %6)
store i8* null, i8** @s_text.rval
br label %8
8: ; preds = %5, %1
%9 = load i8*, i8** %2
%10 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @asc_str to i32 (i8*, i32, ...)*)(i8* %9, i32 -1)
%11 = call i32 (i32, ...) bitcast (i32 (...)* @xstrdup to i32 (i32, ...)*)(i32 %10)
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** @s_text.rval
%14 = load i8*, i8** @s_text.rval
ret i8* %14
}

LLVM IR (-O2):
@s_text.rval = internal unnamed_addr global i8* null
define i8* @s_text(i8* %0) {
%2 = load i8*, i8** @s_text.rval
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @xfree to i32 (i8*, ...)*)(i8* %2)
store i8* null, i8** @s_text.rval
br label %6
6: ; preds = %4, %1
%7 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @asc_str to i32 (i8*, i32, ...)*)(i8* %0, i32 -1)
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @xstrdup to i32 (i32, ...)*)(i32 %7)
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** @s_text.rval
ret i8* %10
}
char *string_string(const char *haystack, const char *needle) {}


x86 assembly (clang, -O0):
<string_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_string>:
ret

LLVM IR (-O0):
define i8* @string_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @string_string(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* undef
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int a[], int p, int r) {
  int q;
  if (p <= r) {
    q = partition(a, p, r);
    quicksort(a, p, q - 1);
    quicksort(a, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1174 <quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jg     1164 <quicksort+0x44>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
lea    0x1(%rbx),%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, %2
br i1 %4, label %11, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %7, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ diag(char *, char const *, char const *);
int /*<<< orphan*/ fail(char const *);
int /*<<< orphan*/ pass(char const *);
scalar_t__ strcmp(char const *, char const *);
void is_s(const char *got, const char *expected, const char *description) {
  if (strcmp(got, expected) == 0)
    pass(description);
  else {
    fail(description);
    diag("got %s but expected %s", got, expected);
  }
}


x86 assembly (clang, -O0):
<is_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1060 <strcmp@plt>
cmp    $0x0,%rax
jne    1179 <is_s+0x39>
mov    -0x18(%rbp),%rdi
call   1040 <pass@plt>
jmp    1196 <is_s+0x56>
mov    -0x18(%rbp),%rdi
call   1030 <fail@plt>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xe6f(%rip),%rdi
call   1050 <diag@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_s>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
call   1060 <strcmp@plt>
mov    %r15,%rdi
test   %rax,%rax
je     1177 <is_s+0x37>
call   1030 <fail@plt>
lea    0xe99(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <diag@plt>
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <pass@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"got %s but expected %s\00"
define void @is_s(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i64 @strcmp(i8* %7, i8* %8)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i8*, i8** %6
%13 = call i32 @pass(i8* %12)
br label %20
14: ; preds = %3
%15 = load i8*, i8** %6
%16 = call i32 @fail(i8* %15)
%17 = load i8*, i8** %4
%18 = load i8*, i8** %5
%19 = call i32 @diag(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %17, i8* %18)
br label %20
20: ; preds = %14, %11
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"got %s but expected %s\00"
define void @is_s(i8* %0, i8* %1, i8* %2) {
%4 = tail call i64 @strcmp(i8* %0, i8* %1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @pass(i8* %2)
br label %11
8: ; preds = %3
%9 = tail call i32 @fail(i8* %2)
%10 = tail call i32 @diag(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
br label %11
11: ; preds = %8, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(float *);
void vectorAverageShiftAndAdd(float **window, float *newEntry) {
  free(window[0]);
  for (size_t i = 1; i < 30; i++) {
    window[i - 1] = window[i];
  }
  window[30 - 1] = newEntry;
}


x86 assembly (clang, -O0):
<vectorAverageShiftAndAdd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
movq   $0x1,-0x18(%rbp)
cmpq   $0x1e,-0x18(%rbp)
jae    116c <vectorAverageShiftAndAdd+0x5c>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1134 <vectorAverageShiftAndAdd+0x24>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0xe8(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vectorAverageShiftAndAdd>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
lea    0x8(%rbx),%rsi
mov    $0xe8,%edx
mov    %rbx,%rdi
call   1040 <memmove@plt>
mov    %r14,0xe8(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @vectorAverageShiftAndAdd(float** %0, float* %1) {
%3 = alloca float**
%4 = alloca float*
%5 = alloca i64
store float** %0, float*** %3
store float* %1, float** %4
%6 = load float**, float*** %3
%7 = getelementptr inbounds float*, float** %6, i64 0
%8 = load float*, float** %7
%9 = call i32 @free(float* %8)
store i64 1, i64* %5
br label %10
10: ; preds = %22, %2
%11 = load i64, i64* %5
%12 = icmp ult i64 %11, 30
br i1 %12, label %13, label %25
13: ; preds = %10
%14 = load float**, float*** %3
%15 = load i64, i64* %5
%16 = getelementptr inbounds float*, float** %14, i64 %15
%17 = load float*, float** %16
%18 = load float**, float*** %3
%19 = load i64, i64* %5
%20 = sub i64 %19, 1
%21 = getelementptr inbounds float*, float** %18, i64 %20
store float* %17, float** %21
br label %22
22: ; preds = %13
%23 = load i64, i64* %5
%24 = add i64 %23, 1
store i64 %24, i64* %5
br label %10
25: ; preds = %10
%26 = load float*, float** %4
%27 = load float**, float*** %3
%28 = getelementptr inbounds float*, float** %27, i64 29
store float* %26, float** %28
ret void
}

LLVM IR (-O2):
define void @vectorAverageShiftAndAdd(float** nocapture %0, float* %1) {
%3 = bitcast float** %0 to i8*
%4 = load float*, float** %0
%5 = tail call i32 @free(float* %4)
%6 = getelementptr float*, float** %0, i64 1
%7 = bitcast float** %6 to i8*
%8 = getelementptr inbounds float*, float** %0, i64 29
store float* %1, float** %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ iscntrl(int);
void t_iscntrl_0x15() {
  Assert_real((iscntrl(21)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              110, ("iscntrl should be 1 for 0x15"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x15>:
push   %rbp
mov    %rsp,%rbp
mov    $0x15,%edi
call   1030 <iscntrl@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x6e,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x15>:
push   %rax
mov    $0x15,%edi
call   1030 <iscntrl@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x6e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x15\00"
define void @t_iscntrl_0x15() {
%1 = call i32 @iscntrl(i32 21)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x15\00"
define void @t_iscntrl_0x15() {
%1 = tail call i32 @iscntrl(i32 21)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int g2(int p[]) { return 3; }


x86 assembly (clang, -O0):
<g2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @g2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 3
}

LLVM IR (-O2):
define i32 @g2(i32* nocapture readnone %0) {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ writeseq(int);
void op_writeseqf() { writeseq(1); }


x86 assembly (clang, -O0):
<op_writeseqf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <writeseq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_writeseqf>:
mov    $0x1,%edi
jmp    1030 <writeseq@plt>

LLVM IR (-O0):
define void @op_writeseqf() {
%1 = call i32 @writeseq(i32 1)
ret void
}

LLVM IR (-O2):
define void @op_writeseqf() {
%1 = tail call i32 @writeseq(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_num(unsigned long long, int, char *);
void print_bin(unsigned long long n) { print_num(n, 2, "b%s\n"); }


x86 assembly (clang, -O0):
<print_bin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
lea    0xed4(%rip),%rdx
call   1030 <print_num@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_bin>:
lea    0xee9(%rip),%rdx
mov    $0x2,%esi
jmp    1030 <print_num@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"b%s\0A\00"
define void @print_bin(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @print_num(i64 %3, i32 2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"b%s\0A\00"
define void @print_bin(i64 %0) {
%2 = tail call i32 @print_num(i64 %0, i32 2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double luaL_check_number(int);
int /*<<< orphan*/ lua_pushnumber(int /*<<< orphan*/);
int /*<<< orphan*/ tan(double);
void math_tan(void) {
  lua_pushnumber(tan(
      ((luaL_check_number(1)) * (((double)3.14159265358979323846) / 180.0))));
}


x86 assembly (clang, -O0):
<math_tan>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <luaL_check_number@plt>
movsd  0xeba(%rip),%xmm1
mulsd  %xmm1,%xmm0
call   1050 <tan@plt>
mov    %eax,%edi
call   1040 <lua_pushnumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_tan>:
push   %rax
mov    $0x1,%edi
call   1030 <luaL_check_number@plt>
mulsd  0xebd(%rip),%xmm0
call   1050 <tan@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <lua_pushnumber@plt>

LLVM IR (-O0):
define void @math_tan() {
%1 = call double @luaL_check_number(i32 1)
%2 = fmul double %1, 0x3F91DF46A2529D39
%3 = call i32 @tan(double %2)
%4 = call i32 @lua_pushnumber(i32 %3)
ret void
}

LLVM IR (-O2):
define void @math_tan() {
%1 = tail call double @luaL_check_number(i32 1)
%2 = fmul double %1, 0x3F91DF46A2529D39
%3 = tail call i32 @tan(double %2)
%4 = tail call i32 @lua_pushnumber(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void rm_memory_default_free(void *pUserMem, void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<rm_memory_default_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rm_memory_default_free>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @rm_memory_default_free(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @rm_memory_default_free(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void local_mcu_ConsolePrint_printReal__E(float f) { printf("%f", (float)f); }


x86 assembly (clang, -O0):
<local_mcu_ConsolePrint_printReal__E>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_mcu_ConsolePrint_printReal__E>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define void @local_mcu_ConsolePrint_printReal__E(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define void @local_mcu_ConsolePrint_printReal__E(float %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %0)
ret void
}
long pascal_at(long row, long column) {
  if ((column == 1) || (row == column))
    return 1;
  else
    return pascal_at(row - 1, column - 1) + pascal_at(row - 1, column);
}


x86 assembly (clang, -O0):
<pascal_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
je     1139 <pascal_at+0x29>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1146 <pascal_at+0x36>
movq   $0x1,-0x8(%rbp)
jmp    117e <pascal_at+0x6e>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
mov    -0x18(%rbp),%rsi
sub    $0x1,%rsi
call   1030 <pascal_at@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <pascal_at@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pascal_at>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    $0x1,%r15d
cmp    $0x1,%rsi
je     1164 <pascal_at+0x54>
mov    %rsi,%r14
mov    %rdi,%rbx
cmp    %rsi,%rdi
je     1164 <pascal_at+0x54>
lea    -0x1(%r14),%r12
neg    %r14
add    $0xffffffffffffffff,%rbx
xor    %r15d,%r15d
nopl   (%rax)
mov    %rbx,%rdi
mov    %r12,%rsi
call   1030 <pascal_at@plt>
add    %rax,%r15
lea    (%r14,%rbx,1),%rax
add    $0xffffffffffffffff,%rax
add    $0xffffffffffffffff,%rbx
cmp    $0xffffffffffffffff,%rax
jne    1140 <pascal_at+0x30>
add    $0x1,%r15
mov    %r15,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @pascal_at(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 1
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i64, i64* %4
%10 = load i64, i64* %5
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %8, %2
store i64 1, i64* %3
br label %24
13: ; preds = %8
%14 = load i64, i64* %4
%15 = sub nsw i64 %14, 1
%16 = load i64, i64* %5
%17 = sub nsw i64 %16, 1
%18 = call i64 @pascal_at(i64 %15, i64 %17)
%19 = load i64, i64* %4
%20 = sub nsw i64 %19, 1
%21 = load i64, i64* %5
%22 = call i64 @pascal_at(i64 %20, i64 %21)
%23 = add nsw i64 %18, %22
store i64 %23, i64* %3
br label %24
24: ; preds = %13, %12
%25 = load i64, i64* %3
ret i64 %25
}

LLVM IR (-O2):
define i64 @pascal_at(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 1
%4 = icmp eq i64 %0, %1
%5 = or i1 %3, %4
br i1 %5, label %17, label %6
6: ; preds = %2
%7 = add nsw i64 %1, -1
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ %0, %6 ], [ %11, %8 ]
%10 = phi i64 [ 0, %6 ], [ %13, %8 ]
%11 = add nsw i64 %9, -1
%12 = tail call i64 @pascal_at(i64 %11, i64 %7)
%13 = add nsw i64 %12, %10
%14 = icmp eq i64 %11, %1
br i1 %14, label %15, label %8
15: ; preds = %8
%16 = add i64 %13, 1
br label %17
17: ; preds = %15, %2
%18 = phi i64 [ 1, %2 ], [ %16, %15 ]
ret i64 %18
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
int /*<<< orphan*/ scanf(char *, int *, int *, int *);
void main() {
  void exchange(int *q1, int *q2, int *q3);
  int a, b, c, *p1, *p2, *p3;
  scanf("%d,%d,%d", &a, &b, &c);
  p1 = &a, p2 = &b, p3 = &c;
  exchange(p1, p2, p3);
  printf("\n%d,%d,%d\n", a, b, c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
lea    -0xc(%rbp),%rcx
call   1040 <scanf@plt>
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1050 <exchange@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xe80(%rip),%rdi
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xec0(%rip),%rdi
lea    0xc(%rsp),%rbx
lea    0x8(%rsp),%r14
lea    0x4(%rsp),%r15
mov    %rbx,%rsi
mov    %r14,%rdx
mov    %r15,%rcx
call   1040 <scanf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1050 <exchange@plt>
mov    0xc(%rsp),%esi
mov    0x8(%rsp),%edx
mov    0x4(%rsp),%ecx
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d,%d,%d\00"
@.str.1 = [11 x i8] c"\0A%d,%d,%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = call i32 @scanf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3)
store i32* %1, i32** %4
store i32* %2, i32** %5
store i32* %3, i32** %6
%8 = load i32*, i32** %4
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %1
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %11, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d,%d,%d\00"
@.str.1 = [11 x i8] c"\0A%d,%d,%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = bitcast i32* %3 to i8*
%7 = call i32 @scanf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3)
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %8, i32 %9, i32 %10)
ret void
}
/* Variables and functions */
int socket(int, int, int);
int fdevent_socket_cloexec(int domain, int type, int protocol) {
  int fd;
  if (-1 != (fd = socket(domain, type, protocol))) {
  }
  return fd;
}


x86 assembly (clang, -O0):
<fdevent_socket_cloexec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <socket@plt>
mov    %eax,%ecx
mov    %ecx,-0x10(%rbp)
mov    $0xffffffff,%eax
cmp    %ecx,%eax
je     1146 <fdevent_socket_cloexec+0x36>
jmp    1146 <fdevent_socket_cloexec+0x36>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdevent_socket_cloexec>:
jmp    1030 <socket@plt>

LLVM IR (-O0):
define i32 @fdevent_socket_cloexec(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @socket(i32 %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = icmp ne i32 -1, %11
br i1 %12, label %13, label %14
13: ; preds = %3
br label %14
14: ; preds = %13, %3
%15 = load i32, i32* %7
ret i32 %15
}

LLVM IR (-O2):
define i32 @fdevent_socket_cloexec(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @socket(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ SPI_IOC_RD_MAX_SPEED_HZ;
scalar_t__ ioctl(int, int /*<<< orphan*/, int *);
int SPI_getMaxFrequency(int spidev_fd) {
  uint32_t frequency;
  if (ioctl(spidev_fd, SPI_IOC_RD_MAX_SPEED_HZ, &frequency) < 0)
    return -1;
  return frequency;
}


x86 assembly (clang, -O0):
<SPI_getMaxFrequency>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
lea    -0xc(%rbp),%rdx
call   1030 <ioctl@plt>
cmp    $0x0,%rax
jge    1146 <SPI_getMaxFrequency+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    114c <SPI_getMaxFrequency+0x3c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_getMaxFrequency>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <ioctl@plt>
mov    %rax,%rcx
mov    $0xffffffff,%eax
test   %rcx,%rcx
js     1135 <SPI_getMaxFrequency+0x25>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@SPI_IOC_RD_MAX_SPEED_HZ = global i32 0
define i32 @SPI_getMaxFrequency(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* @SPI_IOC_RD_MAX_SPEED_HZ
%7 = call i64 @ioctl(i32 %5, i32 %6, i32* %4)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %4
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@SPI_IOC_RD_MAX_SPEED_HZ = global i32 0
define i32 @SPI_getMaxFrequency(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @SPI_IOC_RD_MAX_SPEED_HZ
%5 = call i64 @ioctl(i32 %0, i32 %4, i32* %2)
%6 = icmp slt i64 %5, 0
%7 = load i32, i32* %2
%8 = select i1 %6, i32 -1, i32 %7
ret i32 %8
}
int test_imm_8Cuint8_mem(unsigned char *val) {
  return ((*val) & (-0x8C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Cuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff74,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Cuint8_mem>:
testb  $0x74,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Cuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -140
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Cuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 116
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int f409(int *);
int f410(int *p) { return f409(p); }


x86 assembly (clang, -O0):
<f410>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f409@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f410>:
jmp    1030 <f409@plt>

LLVM IR (-O0):
define i32 @f410(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f409(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f410(i32* %0) {
%2 = tail call i32 @f409(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ __softboundmpx_init();
int /*<<< orphan*/ __softboundmpx_stub();
void __softboundmpx_global_init() {
  __softboundmpx_init();
  __softboundmpx_stub();
}


x86 assembly (clang, -O0):
<__softboundmpx_global_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <__softboundmpx_init@plt>
mov    $0x0,%al
call   1030 <__softboundmpx_stub@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__softboundmpx_global_init>:
push   %rax
xor    %eax,%eax
call   1040 <__softboundmpx_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <__softboundmpx_stub@plt>

LLVM IR (-O0):
define void @__softboundmpx_global_init() {
%1 = call i32 (...) @__softboundmpx_init()
%2 = call i32 (...) @__softboundmpx_stub()
ret void
}

LLVM IR (-O2):
define void @__softboundmpx_global_init() {
%1 = tail call i32 (...) @__softboundmpx_init()
%2 = tail call i32 (...) @__softboundmpx_stub()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ runatc();
int main(int argc, char *argv[]) {
  runatc();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <runatc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <runatc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @runatc()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @runatc()
ret i32 0
}
int __isnanf(float x) { return 0; }


x86 assembly (clang, -O0):
<__isnanf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__isnanf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__isnanf(float %0) {
%2 = alloca float
store float %0, float* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @__isnanf(float %0) {
ret i32 0
}
int is_opr(char in) {
  if (in == 0x21 || in == 0x26 || in == 0x3D || in == 0x3C || in == 0x3E ||
      in == 0x7C || in == 0x2B || in == 0x7E) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_opr>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x21,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x26,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x3d,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x3c,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x3e,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x7c,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     1172 <is_opr+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x7e,%eax
jne    117e <is_opr+0x7e>
movl   $0x0,-0x4(%rbp)
jmp    1185 <is_opr+0x85>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_opr>:
xor    %eax,%eax
cmp    $0x3e,%dil
ja     111d <is_opr+0x1d>
movzbl %dil,%ecx
movabs $0x7000084200000000,%rdx
bt     %rcx,%rdx
jae    111d <is_opr+0x1d>
ret
cmp    $0x7c,%dil
je     111c <is_opr+0x1c>
cmp    $0x7e,%dil
je     111c <is_opr+0x1c>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_opr(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 33
br i1 %6, label %35, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 38
br i1 %10, label %35, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 61
br i1 %14, label %35, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 60
br i1 %18, label %35, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 62
br i1 %22, label %35, label %23
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 124
br i1 %26, label %35, label %27
27: ; preds = %23
%28 = load i8, i8* %3
%29 = sext i8 %28 to i32
%30 = icmp eq i32 %29, 43
br i1 %30, label %35, label %31
31: ; preds = %27
%32 = load i8, i8* %3
%33 = sext i8 %32 to i32
%34 = icmp eq i32 %33, 126
br i1 %34, label %35, label %36
35: ; preds = %31, %27, %23, %19, %15, %11, %7, %1
store i32 0, i32* %2
br label %37
36: ; preds = %31
store i32 1, i32* %2
br label %37
37: ; preds = %36, %35
%38 = load i32, i32* %2
ret i32 %38
}

LLVM IR (-O2):
define i32 @is_opr(i8 signext %0) {
switch i8 %0, label %2 [
i8 126, label %3
i8 124, label %3
i8 62, label %3
i8 61, label %3
i8 60, label %3
i8 43, label %3
i8 38, label %3
i8 33, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 1, %2 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ vecNd_mult_vecNd(double *, double const *, double const *,
                                    int);
void vec4d_mult_vec4d(double m[16], const double A[4], const double B[4]) {
  vecNd_mult_vecNd(m, A, B, 4);
}


x86 assembly (clang, -O0):
<vec4d_mult_vec4d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <vecNd_mult_vecNd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec4d_mult_vec4d>:
mov    $0x4,%ecx
jmp    1030 <vecNd_mult_vecNd@plt>

LLVM IR (-O0):
define void @vec4d_mult_vec4d(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load double*, double** %6
%10 = call i32 @vecNd_mult_vecNd(double* %7, double* %8, double* %9, i32 4)
ret void
}

LLVM IR (-O2):
define void @vec4d_mult_vec4d(double* %0, double* %1, double* %2) {
%4 = tail call i32 @vecNd_mult_vecNd(double* %0, double* %1, double* %2, i32 4)
ret void
}
/* Type definitions */
struct eqn_node {
  int dummy;
};

/* Variables and functions */
char const *eqn_next(struct eqn_node *, char, size_t *, int);
const char *eqn_nexttok(struct eqn_node *ep, size_t *sz) {
  return (eqn_next(ep, '"', sz, 1));
}


x86 assembly (clang, -O0):
<eqn_nexttok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x22,%esi
mov    $0x1,%ecx
call   1030 <eqn_next@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqn_nexttok>:
mov    %rsi,%rdx
mov    $0x22,%esi
mov    $0x1,%ecx
jmp    1030 <eqn_next@plt>

LLVM IR (-O0):
%struct.eqn_node = type { i32 }
define i8* @eqn_nexttok(%struct.eqn_node* %0, i64* %1) {
%3 = alloca %struct.eqn_node*
%4 = alloca i64*
store %struct.eqn_node* %0, %struct.eqn_node** %3
store i64* %1, i64** %4
%5 = load %struct.eqn_node*, %struct.eqn_node** %3
%6 = load i64*, i64** %4
%7 = call i8* @eqn_next(%struct.eqn_node* %5, i8 signext 34, i64* %6, i32 1)
ret i8* %7
}

LLVM IR (-O2):
%struct.eqn_node = type { i32 }
define i8* @eqn_nexttok(%struct.eqn_node* %0, i64* %1) {
%3 = tail call i8* @eqn_next(%struct.eqn_node* %0, i8 signext 34, i64* %1, i32 1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ calc_next_timer_value();
int /*<<< orphan*/ motion_machine(int /*<<< orphan*/);
int /*<<< orphan*/ send_hmdp_motion_to_servo();
void inter_routine_state_1() {
  calc_next_timer_value();
  send_hmdp_motion_to_servo();
  motion_machine(calc_next_timer_value());
}


x86 assembly (clang, -O0):
<inter_routine_state_1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <calc_next_timer_value@plt>
mov    $0x0,%al
call   1050 <send_hmdp_motion_to_servo@plt>
mov    $0x0,%al
call   1030 <calc_next_timer_value@plt>
mov    %eax,%edi
call   1040 <motion_machine@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<inter_routine_state_1>:
push   %rax
xor    %eax,%eax
call   1030 <calc_next_timer_value@plt>
xor    %eax,%eax
call   1050 <send_hmdp_motion_to_servo@plt>
xor    %eax,%eax
call   1030 <calc_next_timer_value@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <motion_machine@plt>

LLVM IR (-O0):
define void @inter_routine_state_1() {
%1 = call i32 (...) @calc_next_timer_value()
%2 = call i32 (...) @send_hmdp_motion_to_servo()
%3 = call i32 (...) @calc_next_timer_value()
%4 = call i32 @motion_machine(i32 %3)
ret void
}

LLVM IR (-O2):
define void @inter_routine_state_1() {
%1 = tail call i32 (...) @calc_next_timer_value()
%2 = tail call i32 (...) @send_hmdp_motion_to_servo()
%3 = tail call i32 (...) @calc_next_timer_value()
%4 = tail call i32 @motion_machine(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ imprimir(int, int, int);
int /*<<< orphan*/ ler(int *, int *);
int /*<<< orphan*/ multiplicar(int, int, int *);
int main(void) {
  int a, b, r;
  ler(&a, &b);
  multiplicar(a, b, &r);
  imprimir(a, b, r);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <ler@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    -0xc(%rbp),%rdx
call   1050 <multiplicar@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1040 <imprimir@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
lea    0xc(%rsp),%rsi
call   1030 <ler@plt>
mov    0x10(%rsp),%edi
mov    0xc(%rsp),%esi
lea    0x14(%rsp),%rdx
call   1050 <multiplicar@plt>
mov    0x10(%rsp),%edi
mov    0xc(%rsp),%esi
mov    0x14(%rsp),%edx
call   1040 <imprimir@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @ler(i32* %1, i32* %2)
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = call i32 @multiplicar(i32 %5, i32 %6, i32* %3)
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @imprimir(i32 %8, i32 %9, i32 %10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = bitcast i32* %3 to i8*
%7 = call i32 @ler(i32* %1, i32* %2)
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = call i32 @multiplicar(i32 %8, i32 %9, i32* %3)
%11 = load i32, i32* %1
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = call i32 @imprimir(i32 %11, i32 %12, i32 %13)
ret i32 0
}
double _mb(double n) { return (n / (1024. * 1024.)); }


x86 assembly (clang, -O0):
<_mb>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mb>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @_mb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 0x4130000000000000
ret double %4
}

LLVM IR (-O2):
define double @_mb(double %0) {
%2 = fmul double %0, 0x3EB0000000000000
ret double %2
}
/* Type definitions */
struct can_bittiming {
  unsigned int prop_seg;
  unsigned int phase_seg1;
  unsigned int phase_seg2;
};

/* Variables and functions */
unsigned int can_bit_time(const struct can_bittiming *bt) {
  return 1 + bt->prop_seg + bt->phase_seg1 + bt->phase_seg2;
}


x86 assembly (clang, -O0):
<can_bit_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
mov    -0x8(%rbp),%rcx
add    0x4(%rcx),%eax
mov    -0x8(%rbp),%rcx
add    0x8(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_bit_time>:
mov    (%rdi),%eax
mov    0x8(%rdi),%ecx
add    0x4(%rdi),%eax
add    %ecx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
%struct.can_bittiming = type { i32, i32, i32 }
define i32 @can_bit_time(%struct.can_bittiming* %0) {
%2 = alloca %struct.can_bittiming*
store %struct.can_bittiming* %0, %struct.can_bittiming** %2
%3 = load %struct.can_bittiming*, %struct.can_bittiming** %2
%4 = getelementptr inbounds %struct.can_bittiming, %struct.can_bittiming* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = add i32 1, %5
%7 = load %struct.can_bittiming*, %struct.can_bittiming** %2
%8 = getelementptr inbounds %struct.can_bittiming, %struct.can_bittiming* %7, i32 0, i32 1
%9 = load i32, i32* %8
%10 = add i32 %6, %9
%11 = load %struct.can_bittiming*, %struct.can_bittiming** %2
%12 = getelementptr inbounds %struct.can_bittiming, %struct.can_bittiming* %11, i32 0, i32 2
%13 = load i32, i32* %12
%14 = add i32 %10, %13
ret i32 %14
}

LLVM IR (-O2):
%struct.can_bittiming = type { i32, i32, i32 }
define i32 @can_bit_time(%struct.can_bittiming* nocapture %0) {
%2 = getelementptr inbounds %struct.can_bittiming, %struct.can_bittiming* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = add i32 %3, 1
%5 = getelementptr inbounds %struct.can_bittiming, %struct.can_bittiming* %0, i64 0, i32 1
%6 = load i32, i32* %5
%7 = add i32 %4, %6
%8 = getelementptr inbounds %struct.can_bittiming, %struct.can_bittiming* %0, i64 0, i32 2
%9 = load i32, i32* %8
%10 = add i32 %7, %9
ret i32 %10
}
/* Variables and functions */
int memcmp(char *, char *, int);
int strcmp(char *, char *);
int strlen(char *);
int str_headcmp(char *s, char *head) {
  int l = strlen(head);
  if (strlen(s) < l)
    return strcmp(s, head);
  return memcmp(s, head, l);
}


x86 assembly (clang, -O0):
<str_headcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
cmp    -0x1c(%rbp),%eax
jge    1173 <str_headcmp+0x43>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <strcmp@plt>
mov    %eax,-0x4(%rbp)
jmp    1186 <str_headcmp+0x56>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <memcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_headcmp>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
cmp    %ebp,%eax
jge    115f <str_headcmp+0x2f>
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <strcmp@plt>
mov    %ebp,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <memcmp@plt>

LLVM IR (-O0):
define i32 @str_headcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %6
%9 = load i8*, i8** %4
%10 = call i32 @strlen(i8* %9)
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i8*, i8** %4
%15 = load i8*, i8** %5
%16 = call i32 @strcmp(i8* %14, i8* %15)
store i32 %16, i32* %3
br label %22
17: ; preds = %2
%18 = load i8*, i8** %4
%19 = load i8*, i8** %5
%20 = load i32, i32* %6
%21 = call i32 @memcmp(i8* %18, i8* %19, i32 %20)
store i32 %21, i32* %3
br label %22
22: ; preds = %17, %13
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @str_headcmp(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @strlen(i8* %0)
%5 = icmp slt i32 %4, %3
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
br label %10
8: ; preds = %2
%9 = tail call i32 @memcmp(i8* %0, i8* %1, i32 %3)
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}
int lg(int x) {
  int l = -1;
  for (; x; x /= 2) {
    l++;
  }
  return l;
}


x86 assembly (clang, -O0):
<lg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1134 <lg+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <lg+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lg>:
mov    $0xffffffff,%eax
test   %edi,%edi
je     1124 <lg+0x24>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
shr    $0x1f,%ecx
add    %edi,%ecx
sar    %ecx
add    $0x1,%edi
cmp    $0x2,%edi
mov    %ecx,%edi
ja     1110 <lg+0x10>
ret

LLVM IR (-O0):
define i32 @lg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -1, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = sdiv i32 %11, 2
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @lg(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ -1, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nsw i32 %4, 1
%7 = sdiv i32 %5, 2
%8 = add i32 %5, 1
%9 = icmp ult i32 %8, 3
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ -1, %1 ], [ %6, %3 ]
ret i32 %11
}