#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SHAMD5IntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0xFFFFC010))) |=
      (((ui32IntFlags & 0x00010000) >> 14) |
       ((ui32IntFlags & 0x00020000) >> 16) |
       ((ui32IntFlags & 0x00040000) >> 19));
  (*((volatile uint32_t *)(ui32Base + 0x0000011C))) |=
      ui32IntFlags & 0x0000ffff;
  (*((volatile uint32_t *)(ui32Base + 0x00000110))) |= 0x00000004;
}


x86 assembly (clang, -O0):
<SHAMD5IntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
and    $0x10000,%edx
sar    $0xe,%edx
mov    -0x8(%rbp),%eax
and    $0x20000,%eax
sar    $0x10,%eax
or     %eax,%edx
mov    -0x8(%rbp),%eax
and    $0x40000,%eax
sar    $0x13,%eax
or     %eax,%edx
mov    -0x4(%rbp),%eax
add    $0xffffc010,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0xffff,%edx
mov    -0x4(%rbp),%eax
add    $0x11c,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x110,%eax
cltq
mov    (%rax),%ecx
or     $0x4,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5IntEnable>:
mov    %esi,%eax
movzwl %si,%ecx
shr    $0xe,%esi
and    $0x4,%esi
shr    $0x10,%eax
and    $0x2,%eax
or     %esi,%eax
lea    -0x3ff0(%rdi),%edx
or     %eax,(%rdx)
movslq %edi,%rax
or     %ecx,0x11c(%rax)
orl    $0x4,0x110(%rax)
ret

LLVM IR (-O0):
define void @SHAMD5IntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 65536
%7 = ashr i32 %6, 14
%8 = load i32, i32* %4
%9 = and i32 %8, 131072
%10 = ashr i32 %9, 16
%11 = or i32 %7, %10
%12 = load i32, i32* %4
%13 = and i32 %12, 262144
%14 = ashr i32 %13, 19
%15 = or i32 %11, %14
%16 = load i32, i32* %3
%17 = add i32 %16, -16368
%18 = zext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
%21 = or i32 %20, %15
store volatile i32 %21, i32* %19
%22 = load i32, i32* %4
%23 = and i32 %22, 65535
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 284
%26 = sext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
%28 = load volatile i32, i32* %27
%29 = or i32 %28, %23
store volatile i32 %29, i32* %27
%30 = load i32, i32* %3
%31 = add nsw i32 %30, 272
%32 = sext i32 %31 to i64
%33 = inttoptr i64 %32 to i32*
%34 = load volatile i32, i32* %33
%35 = or i32 %34, 4
store volatile i32 %35, i32* %33
ret void
}

LLVM IR (-O2):
define void @SHAMD5IntEnable(i32 %0, i32 %1) {
%3 = lshr i32 %1, 14
%4 = and i32 %3, 4
%5 = lshr i32 %1, 16
%6 = and i32 %5, 2
%7 = or i32 %4, %6
%8 = add i32 %0, -16368
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %7, %11
store volatile i32 %12, i32* %10
%13 = and i32 %1, 65535
%14 = add nsw i32 %0, 284
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %13
store volatile i32 %18, i32* %16
%19 = add nsw i32 %0, 272
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
%22 = load volatile i32, i32* %21
%23 = or i32 %22, 4
store volatile i32 %23, i32* %21
ret void
}