void UARTPinMuxSetup(unsigned int instanceNum, unsigned int modemCtrlChoice) {
  unsigned int svPinMuxRtsCts = 0;
  unsigned int svPinMuxTxdRxd = 0;
  if (0 == instanceNum) {
    if (1 == modemCtrlChoice) {
      svPinMuxRtsCts =
          ((*((volatile unsigned int *)((0x01C14000) + (0x120 + (3 * 4))))) &
           ~((0x0F000000u) | (0xF0000000u)));
      (*((volatile unsigned int *)((0x01C14000) + (0x120 + (3 * 4))))) =
          (((0x00000002u) << (0x00000018u)) | ((0x00000002u) << (0x0000001Cu)) |
           svPinMuxRtsCts);
    }
    svPinMuxTxdRxd =
        ((*((volatile unsigned int *)((0x01C14000) + (0x120 + (3 * 4))))) &
         ~((0x00F00000u) | (0x000F0000u)));
    (*((volatile unsigned int *)((0x01C14000) + (0x120 + (3 * 4))))) =
        (((0x00000002u) << (0x00000014u)) | ((0x00000002u) << (0x00000010u)) |
         svPinMuxTxdRxd);
  } else if (1 == instanceNum) {
    if (1 == modemCtrlChoice) {
      svPinMuxRtsCts =
          ((*((volatile unsigned int *)((0x01C14000) + (0x120 + (0 * 4))))) &
           ~((0x00F00000u) | (0x000F0000u)));
      (*((volatile unsigned int *)((0x01C14000) + (0x120 + (0 * 4))))) =
          (((0x00000004u) << (0x00000014u)) | ((0x00000004u) << (0x00000010u)) |
           svPinMuxRtsCts);
    }
    svPinMuxTxdRxd =
        ((*((volatile unsigned int *)((0x01C14000) + (0x120 + (4 * 4))))) &
         ~((0xF0000000u) | (0x0F000000u)));
    (*((volatile unsigned int *)((0x01C14000) + (0x120 + (4 * 4))))) =
        (((0x00000002u) << (0x0000001Cu)) | ((0x00000002u) << (0x00000018u)) |
         svPinMuxTxdRxd);
  } else if (2 == instanceNum) {
    if (1 == modemCtrlChoice) {
      svPinMuxRtsCts =
          ((*((volatile unsigned int *)((0x01C14000) + (0x120 + (0 * 4))))) &
           ~((0xF0000000u) | (0x0F000000u)));
      (*((volatile unsigned int *)((0x01C14000) + (0x120 + (0 * 4))))) =
          (((0x00000004u) << (0x0000001Cu)) | ((0x00000004u) << (0x00000018u)) |
           svPinMuxRtsCts);
    }
    svPinMuxTxdRxd =
        ((*((volatile unsigned int *)((0x01C14000) + (0x120 + (4 * 4))))) &
         ~((0x00F00000u) | (0x000F0000u)));
    (*((volatile unsigned int *)((0x01C14000) + (0x120 + (4 * 4))))) =
        (((0x00000002u) << (0x00000014u)) | ((0x00000002u) << (0x00000010u)) |
         svPinMuxTxdRxd);
  } else {
  }
}


x86 assembly (clang, -O0):
<UARTPinMuxSetup>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1174 <UARTPinMuxSetup+0x74>
mov    $0x1,%eax
cmp    -0x8(%rbp),%eax
jne    1150 <UARTPinMuxSetup+0x50>
mov    $0x1c1412c,%eax
mov    (%rax),%eax
and    $0xffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
or     $0x22000000,%ecx
mov    $0x1c1412c,%eax
mov    %ecx,(%rax)
mov    $0x1c1412c,%eax
mov    (%rax),%eax
and    $0xff00ffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
or     $0x220000,%ecx
mov    $0x1c1412c,%eax
mov    %ecx,(%rax)
jmp    1241 <UARTPinMuxSetup+0x141>
mov    $0x1,%eax
cmp    -0x4(%rbp),%eax
jne    11d3 <UARTPinMuxSetup+0xd3>
mov    $0x1,%eax
cmp    -0x8(%rbp),%eax
jne    11af <UARTPinMuxSetup+0xaf>
mov    $0x1c14120,%eax
mov    (%rax),%eax
and    $0xff00ffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
or     $0x440000,%ecx
mov    $0x1c14120,%eax
mov    %ecx,(%rax)
mov    $0x1c14130,%eax
mov    (%rax),%eax
and    $0xffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
or     $0x22000000,%ecx
mov    $0x1c14130,%eax
mov    %ecx,(%rax)
jmp    123c <UARTPinMuxSetup+0x13c>
mov    $0x2,%eax
cmp    -0x4(%rbp),%eax
jne    1232 <UARTPinMuxSetup+0x132>
mov    $0x1,%eax
cmp    -0x8(%rbp),%eax
jne    120e <UARTPinMuxSetup+0x10e>
mov    $0x1c14120,%eax
mov    (%rax),%eax
and    $0xffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
or     $0x44000000,%ecx
mov    $0x1c14120,%eax
mov    %ecx,(%rax)
mov    $0x1c14130,%eax
mov    (%rax),%eax
and    $0xff00ffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
or     $0x220000,%ecx
mov    $0x1c14130,%eax
mov    %ecx,(%rax)
jmp    1237 <UARTPinMuxSetup+0x137>
jmp    1237 <UARTPinMuxSetup+0x137>
jmp    123c <UARTPinMuxSetup+0x13c>
jmp    1241 <UARTPinMuxSetup+0x141>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTPinMuxSetup>:
cmp    $0x2,%edi
je     1148 <UARTPinMuxSetup+0x48>
cmp    $0x1,%edi
je     1178 <UARTPinMuxSetup+0x78>
test   %edi,%edi
jne    11ad <UARTPinMuxSetup+0xad>
cmp    $0x1,%esi
jne    112f <UARTPinMuxSetup+0x2f>
mov    $0xffffff,%eax
and    0x1c1412c,%eax
or     $0x22000000,%eax
mov    %eax,0x1c1412c
mov    $0xff00ffff,%eax
and    0x1c1412c,%eax
or     $0x220000,%eax
mov    %eax,0x1c1412c
ret
cmp    $0x1,%esi
jne    1165 <UARTPinMuxSetup+0x65>
mov    $0xffffff,%eax
and    0x1c14120,%eax
or     $0x44000000,%eax
mov    %eax,0x1c14120
mov    $0xff00ffff,%eax
and    0x1c14130,%eax
or     $0x220000,%eax
jmp    11a6 <UARTPinMuxSetup+0xa6>
cmp    $0x1,%esi
jne    1195 <UARTPinMuxSetup+0x95>
mov    $0xff00ffff,%eax
and    0x1c14120,%eax
or     $0x440000,%eax
mov    %eax,0x1c14120
mov    $0xffffff,%eax
and    0x1c14130,%eax
or     $0x22000000,%eax
mov    %eax,0x1c14130
ret

LLVM IR (-O0):
define void @UARTPinMuxSetup(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %3
%8 = icmp eq i32 0, %7
br i1 %8, label %9, label %22
9: ; preds = %2
%10 = load i32, i32* %4
%11 = icmp eq i32 1, %10
br i1 %11, label %12, label %17
12: ; preds = %9
%13 = load volatile i32, i32* inttoptr (i64 29442348 to i32*)
%14 = and i32 %13, 16777215
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = or i32 570425344, %15
store volatile i32 %16, i32* inttoptr (i64 29442348 to i32*)
br label %17
17: ; preds = %12, %9
%18 = load volatile i32, i32* inttoptr (i64 29442348 to i32*)
%19 = and i32 %18, -16711681
store i32 %19, i32* %6
%20 = load i32, i32* %6
%21 = or i32 2228224, %20
store volatile i32 %21, i32* inttoptr (i64 29442348 to i32*)
br label %57
22: ; preds = %2
%23 = load i32, i32* %3
%24 = icmp eq i32 1, %23
br i1 %24, label %25, label %38
25: ; preds = %22
%26 = load i32, i32* %4
%27 = icmp eq i32 1, %26
br i1 %27, label %28, label %33
28: ; preds = %25
%29 = load volatile i32, i32* inttoptr (i64 29442336 to i32*)
%30 = and i32 %29, -16711681
store i32 %30, i32* %5
%31 = load i32, i32* %5
%32 = or i32 4456448, %31
store volatile i32 %32, i32* inttoptr (i64 29442336 to i32*)
br label %33
33: ; preds = %28, %25
%34 = load volatile i32, i32* inttoptr (i64 29442352 to i32*)
%35 = and i32 %34, 16777215
store i32 %35, i32* %6
%36 = load i32, i32* %6
%37 = or i32 570425344, %36
store volatile i32 %37, i32* inttoptr (i64 29442352 to i32*)
br label %56
38: ; preds = %22
%39 = load i32, i32* %3
%40 = icmp eq i32 2, %39
br i1 %40, label %41, label %54
41: ; preds = %38
%42 = load i32, i32* %4
%43 = icmp eq i32 1, %42
br i1 %43, label %44, label %49
44: ; preds = %41
%45 = load volatile i32, i32* inttoptr (i64 29442336 to i32*)
%46 = and i32 %45, 16777215
store i32 %46, i32* %5
%47 = load i32, i32* %5
%48 = or i32 1140850688, %47
store volatile i32 %48, i32* inttoptr (i64 29442336 to i32*)
br label %49
49: ; preds = %44, %41
%50 = load volatile i32, i32* inttoptr (i64 29442352 to i32*)
%51 = and i32 %50, -16711681
store i32 %51, i32* %6
%52 = load i32, i32* %6
%53 = or i32 2228224, %52
store volatile i32 %53, i32* inttoptr (i64 29442352 to i32*)
br label %55
54: ; preds = %38
br label %55
55: ; preds = %54, %49
br label %56
56: ; preds = %55, %33
br label %57
57: ; preds = %56, %17
ret void
}

LLVM IR (-O2):
define void @UARTPinMuxSetup(i32 %0, i32 %1) {
switch i32 %0, label %33 [
i32 0, label %3
i32 1, label %13
i32 2, label %23
]
3: ; preds = %2
%4 = icmp eq i32 %1, 1
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = load volatile i32, i32* inttoptr (i64 29442348 to i32*)
%7 = and i32 %6, 16777215
%8 = or i32 %7, 570425344
store volatile i32 %8, i32* inttoptr (i64 29442348 to i32*)
br label %9
9: ; preds = %5, %3
%10 = load volatile i32, i32* inttoptr (i64 29442348 to i32*)
%11 = and i32 %10, -16711681
%12 = or i32 %11, 2228224
store volatile i32 %12, i32* inttoptr (i64 29442348 to i32*)
br label %33
13: ; preds = %2
%14 = icmp eq i32 %1, 1
br i1 %14, label %15, label %19
15: ; preds = %13
%16 = load volatile i32, i32* inttoptr (i64 29442336 to i32*)
%17 = and i32 %16, -16711681
%18 = or i32 %17, 4456448
store volatile i32 %18, i32* inttoptr (i64 29442336 to i32*)
br label %19
19: ; preds = %15, %13
%20 = load volatile i32, i32* inttoptr (i64 29442352 to i32*)
%21 = and i32 %20, 16777215
%22 = or i32 %21, 570425344
store volatile i32 %22, i32* inttoptr (i64 29442352 to i32*)
br label %33
23: ; preds = %2
%24 = icmp eq i32 %1, 1
br i1 %24, label %25, label %29
25: ; preds = %23
%26 = load volatile i32, i32* inttoptr (i64 29442336 to i32*)
%27 = and i32 %26, 16777215
%28 = or i32 %27, 1140850688
store volatile i32 %28, i32* inttoptr (i64 29442336 to i32*)
br label %29
29: ; preds = %25, %23
%30 = load volatile i32, i32* inttoptr (i64 29442352 to i32*)
%31 = and i32 %30, -16711681
%32 = or i32 %31, 2228224
store volatile i32 %32, i32* inttoptr (i64 29442352 to i32*)
br label %33
33: ; preds = %2, %19, %29, %9
ret void
}