xunge/DecIR huggingface dataset:
unsigned int min(unsigned int x, unsigned int y) {
  return y ^ ((x ^ y) & -(x < y));
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%edx
cmp    -0x8(%rbp),%edx
setb   %dl
and    $0x1,%dl
movzbl %dl,%esi
xor    %edx,%edx
sub    %esi,%edx
and    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = xor i32 %6, %7
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = icmp ult i32 %9, %10
%12 = zext i1 %11 to i32
%13 = sub nsw i32 0, %12
%14 = and i32 %8, %13
%15 = xor i32 %5, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  extern char *__progname;
  fprintf(stderr,
          "usage: %s [-cdfghlmnpqrstv] [-#num] [-1234 font] "
          "[-C class] [-i [numcols]]\n"
          "\t[-J job] [-Pprinter] [-T title] [-U user] "
          "[-wnum] [name ...]\n",
          __progname);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2e9c(%rip),%rax
mov    (%rax),%rdx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    0x2e9f(%rip),%rax
mov    (%rax),%rdx
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [138 x i8] c"usage: %s [-cdfghlmnpqrstv] [-#num] [-1234 font] [-C class] [-i [numcols]]\0A\09[-J job] [-Pprinter] [-T title] [-U user] [-wnum] [name ...]\0A\00"
@__progname = external global i8*
define void @usage() {
%1 = load i32, i32* @stderr
%2 = load i8*, i8** @__progname
%3 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([138 x i8], [138 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [138 x i8] c"usage: %s [-cdfghlmnpqrstv] [-#num] [-1234 font] [-C class] [-i [numcols]]\0A\09[-J job] [-Pprinter] [-T title] [-U user] [-wnum] [name ...]\0A\00"
@__progname = external global i8*
define void @usage() {
%1 = load i32, i32* @stderr
%2 = load i8*, i8** @__progname
%3 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([138 x i8], [138 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
int alphasort(const struct dirent **a, const struct dirent **b) {
  (void)a;
  (void)b;
  printf(">>> qpid CALL %s\n", __FUNCTION__);
  return 0;
}


x86 assembly (clang, -O0):
<alphasort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
lea    0xee4(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alphasort>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef3(%rip),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.dirent = type opaque
@.str = [18 x i8] c">>> qpid CALL %s\0A\00"
@__FUNCTION__.alphasort = [10 x i8] c"alphasort\00"
define i32 @alphasort(%struct.dirent** %0, %struct.dirent** %1) {
%3 = alloca %struct.dirent**
%4 = alloca %struct.dirent**
store %struct.dirent** %0, %struct.dirent*** %3
store %struct.dirent** %1, %struct.dirent*** %4
%5 = load %struct.dirent**, %struct.dirent*** %3
%6 = load %struct.dirent**, %struct.dirent*** %4
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.alphasort, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.dirent = type opaque
@.str = [18 x i8] c">>> qpid CALL %s\0A\00"
@__FUNCTION__.alphasort = [10 x i8] c"alphasort\00"
define i32 @alphasort(%struct.dirent** nocapture readnone %0, %struct.dirent** nocapture readnone %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.alphasort, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct rtrb_table {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *rtrb_delete(struct rtrb_table *, void *);
void *(rtrb_assert_delete)(struct rtrb_table *table, void *item) {
  void *p = rtrb_delete(table, item);
  assert(p != NULL);
  return p;
}


x86 assembly (clang, -O0):
<rtrb_assert_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rtrb_delete@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtrb_assert_delete>:
push   %rbx
call   1030 <rtrb_delete@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.rtrb_table = type { i32 }
define i8* @rtrb_assert_delete(%struct.rtrb_table* %0, i8* %1) {
%3 = alloca %struct.rtrb_table*
%4 = alloca i8*
%5 = alloca i8*
store %struct.rtrb_table* %0, %struct.rtrb_table** %3
store i8* %1, i8** %4
%6 = load %struct.rtrb_table*, %struct.rtrb_table** %3
%7 = load i8*, i8** %4
%8 = call i8* @rtrb_delete(%struct.rtrb_table* %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %5
ret i8* %13
}

LLVM IR (-O2):
%struct.rtrb_table = type { i32 }
define i8* @rtrb_assert_delete(%struct.rtrb_table* %0, i8* %1) {
%3 = tail call i8* @rtrb_delete(%struct.rtrb_table* %0, i8* %1)
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
ret i8* %3
}
/* Type definitions */
struct event_base {
  int dummy;
};
typedef int /*<<< orphan*/ evutil_socket_t;

/* Variables and functions */
int /*<<< orphan*/ startClient(struct event_base *);
void startClientTimer(evutil_socket_t fd, short events, void *ctx) {
  startClient((struct event_base *)ctx);
}


x86 assembly (clang, -O0):
<startClientTimer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <startClient@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<startClientTimer>:
mov    %rdx,%rdi
jmp    1030 <startClient@plt>

LLVM IR (-O0):
%struct.event_base = type { i32 }
define void @startClientTimer(i32 %0, i16 signext %1, i8* %2) {
%4 = alloca i32
%5 = alloca i16
%6 = alloca i8*
store i32 %0, i32* %4
store i16 %1, i16* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = bitcast i8* %7 to %struct.event_base*
%9 = call i32 @startClient(%struct.event_base* %8)
ret void
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
define void @startClientTimer(i32 %0, i16 signext %1, i8* %2) {
%4 = bitcast i8* %2 to %struct.event_base*
%5 = tail call i32 @startClient(%struct.event_base* %4)
ret void
}
void RTGetOptInit(void) {}


x86 assembly (clang, -O0):
<RTGetOptInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTGetOptInit>:
ret

LLVM IR (-O0):
define void @RTGetOptInit() {
ret void
}

LLVM IR (-O2):
define void @RTGetOptInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(int);
int /*<<< orphan*/ ft_putstr(char *);
void ft_putnbr_err(int nb) {
  ft_putstr("\x1B[31m");
  ft_putnbr(nb);
  ft_putstr("\x1B[0m");
}


x86 assembly (clang, -O0):
<ft_putnbr_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <ft_putstr@plt>
mov    -0x4(%rbp),%edi
call   1030 <ft_putnbr@plt>
lea    0xec0(%rip),%rdi
call   1040 <ft_putstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr_err>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1040 <ft_putstr@plt>
mov    %ebx,%edi
call   1030 <ft_putnbr@plt>
lea    0xec9(%rip),%rdi
pop    %rbx
jmp    1040 <ft_putstr@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[31m\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @ft_putnbr_err(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @ft_putstr(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @ft_putnbr(i32 %4)
%6 = call i32 @ft_putstr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[31m\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @ft_putnbr_err(i32 %0) {
%2 = tail call i32 @ft_putstr(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @ft_putnbr(i32 %0)
%4 = tail call i32 @ft_putstr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void bad2(int M, int N, int step, int matrix[M][step]) { matrix[0][0] = 0; }


x86 assembly (clang, -O0):
<bad2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
imul   $0x0,%rcx,%rcx
movl   $0x0,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad2>:
movl   $0x0,(%rcx)
ret

LLVM IR (-O0):
define void @bad2(i32 %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = zext i32 %9 to i64
%11 = load i32, i32* %7
%12 = zext i32 %11 to i64
%13 = load i32*, i32** %8
%14 = mul nsw i64 0, %12
%15 = getelementptr inbounds i32, i32* %13, i64 %14
%16 = getelementptr inbounds i32, i32* %15, i64 0
store i32 0, i32* %16
ret void
}

LLVM IR (-O2):
define void @bad2(i32 %0, i32 %1, i32 %2, i32* nocapture writeonly %3) {
store i32 0, i32* %3
ret void
}
void f1() {
  int i;
  float array[100];
  for (i = 0; i < 100; i++) {
    array[i] = i;
  }
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    113c <f1+0x3c>
cvtsi2ssl -0x4(%rbp),%xmm0
movslq -0x4(%rbp),%rax
movss  %xmm0,-0x1a0(%rbp,%rax,4)
ff ff
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1112 <f1+0x12>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
ret

LLVM IR (-O0):
define void @f1() {
%1 = alloca i32
%2 = alloca [100 x float]
store i32 0, i32* %1
br label %3
3: ; preds = %12, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %15
6: ; preds = %3
%7 = load i32, i32* %1
%8 = sitofp i32 %7 to float
%9 = load i32, i32* %1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [100 x float], [100 x float]* %2, i64 0, i64 %10
store float %8, float* %11
br label %12
12: ; preds = %6
%13 = load i32, i32* %1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %1
br label %3
15: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @f1() {
ret void
}
AR0I1(r0, r1, x0, x1, p0, p1) unsigned char r0, r1;
unsigned char *p0, *p1;
{
  if ((p0[10000000]) <= 33)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AR0I1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movzbl 0x989680(%rax),%eax
cmp    $0x21,%eax
jg     113e <AR0I1+0x3e>
movl   $0x1,-0x4(%rbp)
jmp    1145 <AR0I1+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AR0I1>:
xor    %eax,%eax
cmpb   $0x22,0x989680(%r8)
22
setb   %al
ret

LLVM IR (-O0):
define i32 @AR0I1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %12
%17 = getelementptr inbounds i8, i8* %16, i64 10000000
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = icmp sle i32 %19, 33
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @AR0I1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture %4, i8* nocapture readnone %5) {
%7 = getelementptr inbounds i8, i8* %4, i64 10000000
%8 = load i8, i8* %7
%9 = icmp ult i8 %8, 34
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ OpenForDay();
void Bank_Simulation(int CloseTime) { OpenForDay(); }


x86 assembly (clang, -O0):
<Bank_Simulation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <OpenForDay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bank_Simulation>:
xor    %eax,%eax
jmp    1030 <OpenForDay@plt>

LLVM IR (-O0):
define void @Bank_Simulation(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @OpenForDay()
ret void
}

LLVM IR (-O2):
define void @Bank_Simulation(i32 %0) {
%2 = tail call i32 (...) @OpenForDay()
ret void
}
long long bit11() { return 0x0000000000000800LL; }


x86 assembly (clang, -O0):
<bit11>:
push   %rbp
mov    %rsp,%rbp
mov    $0x800,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit11>:
mov    $0x800,%eax
ret

LLVM IR (-O0):
define i64 @bit11() {
ret i64 2048
}

LLVM IR (-O2):
define i64 @bit11() {
ret i64 2048
}
/* Variables and functions */
int /*<<< orphan*/ puts(int /*<<< orphan*/);
int /*<<< orphan*/ rat(char *);
int main(int argv, char **args) {
  puts(rat(args[1]));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <rat@plt>
mov    %eax,%edi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <rat@plt>
mov    %eax,%edi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @rat(i8* %8)
%10 = call i32 @puts(i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @rat(i8* %4)
%6 = tail call i32 @puts(i32 %5)
ret i32 0
}
/* Variables and functions */
char const *basename(char *);
const char *Sys_Basename(char *path) { return basename(path); }


x86 assembly (clang, -O0):
<Sys_Basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <basename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_Basename>:
jmp    1030 <basename@plt>

LLVM IR (-O0):
define i8* @Sys_Basename(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @basename(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @Sys_Basename(i8* %0) {
%2 = tail call i8* @basename(i8* %0)
ret i8* %2
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
float _randomInterval(float min, float max) {
  return min + ((float)rand() / (float)RAND_MAX) * (max - min);
}


x86 assembly (clang, -O0):
<_randomInterval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0xc(%rbp),%xmm1
cvtsi2ss %rax,%xmm0
mov    0x2ea4(%rip),%rax
cvtsi2ssq (%rax),%xmm2
divss  %xmm2,%xmm0
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_randomInterval>:
push   %rax
movss  %xmm1,0x4(%rsp)
movss  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm2
mov    0x2eb9(%rip),%rax
xorps  %xmm1,%xmm1
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm2
movss  0x4(%rsp),%xmm0
movss  (%rsp),%xmm1
subss  %xmm1,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define float @_randomInterval(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call i64 (...) @rand()
%7 = sitofp i64 %6 to float
%8 = load i64, i64* @RAND_MAX
%9 = sitofp i64 %8 to float
%10 = fdiv float %7, %9
%11 = load float, float* %4
%12 = load float, float* %3
%13 = fsub float %11, %12
%14 = call float @llvm.fmuladd.f32(float %10, float %13, float %5)
ret float %14
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define float @_randomInterval(float %0, float %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to float
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to float
%7 = fdiv float %4, %6
%8 = fsub float %1, %0
%9 = tail call float @llvm.fmuladd.f32(float %7, float %8, float %0)
ret float %9
}
void CycleLeft(unsigned char *row) {
  unsigned char temp = row[0];
  row[0] = row[1];
  row[1] = row[2];
  row[2] = row[3];
  row[3] = temp;
}


x86 assembly (clang, -O0):
<CycleLeft>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x8(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CycleLeft>:
mov    (%rdi),%al
mov    0x1(%rdi),%cl
mov    %cl,(%rdi)
movzwl 0x2(%rdi),%ecx
mov    %cx,0x1(%rdi)
mov    %al,0x3(%rdi)
ret

LLVM IR (-O0):
define void @CycleLeft(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
store i8 %6, i8* %3
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 %9, i8* %11
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i64 2
%14 = load i8, i8* %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 1
store i8 %14, i8* %16
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i64 3
%19 = load i8, i8* %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 2
store i8 %19, i8* %21
%22 = load i8, i8* %3
%23 = load i8*, i8** %2
%24 = getelementptr inbounds i8, i8* %23, i64 3
store i8 %22, i8* %24
ret void
}

LLVM IR (-O2):
define void @CycleLeft(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
store i8 %4, i8* %0
%5 = getelementptr inbounds i8, i8* %0, i64 2
%6 = load i8, i8* %5
store i8 %6, i8* %3
%7 = getelementptr inbounds i8, i8* %0, i64 3
%8 = load i8, i8* %7
store i8 %8, i8* %5
store i8 %2, i8* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void Copyright(void) {
  fprintf(
      stderr,
      "===================================================================\n"
      " TS 26.104                                                         \n"
      " R99   V3.4.0 2002-02                                              \n"
      " REL-4 V4.3.0 2002-02                                              \n"
      " 3GPP AMR Floating-point Speech Encoder                            \n"
      "===================================================================\n");
}


x86 assembly (clang, -O0):
<Copyright>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Copyright>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [409 x i8] c"===================================================================\0A TS 26.104 \0A R99 V3.4.0 2002-02 \0A REL-4 V4.3.0 2002-02 \0A 3GPP AMR Floating-point Speech Encoder \0A===================================================================\0A\00"
define void @Copyright() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([409 x i8], [409 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [409 x i8] c"===================================================================\0A TS 26.104 \0A R99 V3.4.0 2002-02 \0A REL-4 V4.3.0 2002-02 \0A 3GPP AMR Floating-point Speech Encoder \0A===================================================================\0A\00"
define void @Copyright() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([409 x i8], [409 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *strdup(char *);
char *strrchr(char *, char);
char *short_name(char *path) {
  char *s;
  s = strrchr(path, '\\');
  if (s == NULL)
    return strdup(path);
  else
    return strdup(s + 1);
}


x86 assembly (clang, -O0):
<short_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x5c,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115b <short_name+0x3b>
mov    -0x10(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x8(%rbp)
jmp    116c <short_name+0x4c>
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
call   1040 <strdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_name>:
push   %rbx
mov    %rdi,%rbx
mov    $0x5c,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
je     1140 <short_name+0x20>
add    $0x1,%rax
mov    %rax,%rdi
pop    %rbx
jmp    1040 <strdup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <strdup@plt>

LLVM IR (-O0):
define i8* @short_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 92)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = call i8* @strdup(i8* %10)
store i8* %11, i8** %2
br label %16
12: ; preds = %1
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = call i8* @strdup(i8* %14)
store i8* %15, i8** %2
br label %16
16: ; preds = %12, %9
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
define noalias i8* @short_name(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 92)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @strdup(i8* %0)
br label %9
6: ; preds = %1
%7 = getelementptr inbounds i8, i8* %2, i64 1
%8 = tail call i8* @strdup(i8* %7)
br label %9
9: ; preds = %6, %4
%10 = phi i8* [ %5, %4 ], [ %8, %6 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
void *thr_fn1(void *arg) {
  printf("thread 1 returning\n");
  sleep(5);
  return (void *)1;
}


x86 assembly (clang, -O0):
<thr_fn1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_fn1>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"thread 1 returning\0A\00"
define i8* @thr_fn1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @sleep(i32 5)
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
@str = [19 x i8] c"thread 1 returning\00"
define i8* @thr_fn1(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @sleep(i32 5)
ret i8* inttoptr (i64 1 to i8*)
}
__float128 f128_square(__float128 x) { return x * x; }


x86 assembly (clang, -O0):
<f128_square>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movaps %xmm0,-0x10(%rbp)
movaps -0x10(%rbp),%xmm1
movaps %xmm1,%xmm0
call   1120 <__multf3>
add    $0x10,%rsp
pop    %rbp
ret
xchg   %ax,%ax

x86 assembly (clang, -O2):
<f128_square>:
movaps %xmm0,%xmm1
jmp    1110 <__multf3>
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define fp128 @f128_square(fp128 %0) {
%2 = alloca fp128
store fp128 %0, fp128* %2
%3 = load fp128, fp128* %2
%4 = load fp128, fp128* %2
%5 = fmul fp128 %3, %4
ret fp128 %5
}

LLVM IR (-O2):
define fp128 @f128_square(fp128 %0) {
%2 = fmul fp128 %0, %0
ret fp128 %2
}
void gtk_text_buffer_create_tag() {}


x86 assembly (clang, -O0):
<gtk_text_buffer_create_tag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_buffer_create_tag>:
ret

LLVM IR (-O0):
define void @gtk_text_buffer_create_tag() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_buffer_create_tag() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int average;
  int grades[3];
  grades[0] = 80;
  grades[1] = 85;
  grades[2] = 90;
  average = (grades[0] + grades[1] + grades[2]) / 3;
  printf("The average of the 3 grades is: %d", average);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x50,-0x14(%rbp)
movl   $0x55,-0x10(%rbp)
movl   $0x5a,-0xc(%rbp)
mov    -0x14(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x55,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"The average of the 3 grades is: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [3 x i32]
store i32 0, i32* %1
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 0
store i32 80, i32* %4
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 1
store i32 85, i32* %5
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 2
store i32 90, i32* %6
%7 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 0
%8 = load i32, i32* %7
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 1
%10 = load i32, i32* %9
%11 = add nsw i32 %8, %10
%12 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 2
%13 = load i32, i32* %12
%14 = add nsw i32 %11, %13
%15 = sdiv i32 %14, 3
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"The average of the 3 grades is: %d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 85)
ret i32 0
}
int hybris_check_android_shared_mutex(int mutex_addr) {
  if ((mutex_addr <= 0xFFFF) && (mutex_addr & 0x2000))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<hybris_check_android_shared_mutex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffff,-0x8(%rbp)
jg     1131 <hybris_check_android_shared_mutex+0x31>
mov    -0x8(%rbp),%eax
and    $0x2000,%eax
cmp    $0x0,%eax
je     1131 <hybris_check_android_shared_mutex+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1138 <hybris_check_android_shared_mutex+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hybris_check_android_shared_mutex>:
cmp    $0x10000,%edi
setl   %al
shr    $0xd,%edi
and    $0x1,%edi
and    %al,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @hybris_check_android_shared_mutex(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 65535
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = and i32 %7, 8192
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
store i32 1, i32* %2
br label %12
11: ; preds = %6, %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @hybris_check_android_shared_mutex(i32 %0) {
%2 = icmp slt i32 %0, 65536
%3 = and i32 %0, 8192
%4 = icmp ne i32 %3, 0
%5 = and i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int powercap_sysfs_zone_set_enabled(char *, int /*<<< orphan*/ *, int,
                                    int /*<<< orphan*/);
int rapl_sysfs_zone_set_enabled(uint32_t zone, uint32_t sz, int is_sz,
                                uint32_t val) {
  uint32_t zones[2];
  zones[0] = zone;
  zones[1] = sz;
  ;
  return powercap_sysfs_zone_set_enabled("intel-rapl", zones, (is_sz ? 2 : 1),
                                         val);
}


x86 assembly (clang, -O0):
<rapl_sysfs_zone_set_enabled>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
lea    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
mov    $0x2,%eax
cmp    $0x0,%ecx
cmovne %eax,%edx
mov    -0x10(%rbp),%ecx
lea    0xeaf(%rip),%rdi
call   1030 <powercap_sysfs_zone_set_enabled@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rapl_sysfs_zone_set_enabled>:
push   %rax
mov    %edi,(%rsp)
mov    %esi,0x4(%rsp)
cmp    $0x1,%edx
mov    $0x2,%edx
sbb    $0x0,%edx
lea    0xed6(%rip),%rdi
mov    %rsp,%rsi
call   1030 <powercap_sysfs_zone_set_enabled@plt>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"intel-rapl\00"
define i32 @rapl_sysfs_zone_set_enabled(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca [2 x i32]
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %6
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %12, i32* %13
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%15 = load i32, i32* %7
%16 = icmp ne i32 %15, 0
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 2, i32 1
%19 = load i32, i32* %8
%20 = call i32 @powercap_sysfs_zone_set_enabled(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32* %14, i32 %18, i32 %19)
ret i32 %20
}

LLVM IR (-O2):
@.str = [11 x i8] c"intel-rapl\00"
define i32 @rapl_sysfs_zone_set_enabled(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca [2 x i32]
%6 = bitcast [2 x i32]* %5 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 0
store i32 %0, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 1
store i32 %1, i32* %8
%9 = icmp eq i32 %2, 0
%10 = select i1 %9, i32 1, i32 2
%11 = call i32 @powercap_sysfs_zone_set_enabled(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32* %7, i32 %10, i32 %3)
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strtol(char *, int /*<<< orphan*/ *, int);
int main() {
  printf("%ld\n", strtol("123:abc\n", NULL, 10));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xecf(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1040 <strtol@plt>
mov    %eax,%esi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedd(%rip),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1040 <strtol@plt>
lea    0xec5(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
@.str.1 = [9 x i8] c"123:abc\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @strtol(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32* null, i32 10)
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
@.str.1 = [9 x i8] c"123:abc\0A\00"
define i32 @main() {
%1 = tail call i32 @strtol(i8* nocapture getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32* null, i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t I2CFIFOStatus(uint32_t ui32Base) {
  ;
  return ((*((volatile unsigned long *)(ui32Base + 0x00000F08))));
}


x86 assembly (clang, -O0):
<I2CFIFOStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xf08(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CFIFOStatus>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0xf08(%rax),%rax
ret

LLVM IR (-O0):
define i64 @I2CFIFOStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 3848
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @I2CFIFOStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 3848
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}
void gestionnaire_sigusr1(int numero) {}


x86 assembly (clang, -O0):
<gestionnaire_sigusr1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gestionnaire_sigusr1>:
ret

LLVM IR (-O0):
define void @gestionnaire_sigusr1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gestionnaire_sigusr1(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test1(int);
int /*<<< orphan*/ test2(int);
int main() {
  test1(0x4000U);
  test2(0x4000U);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4000,%edi
call   1030 <test1@plt>
mov    $0x4000,%edi
call   1040 <test2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4000,%edi
call   1030 <test1@plt>
mov    $0x4000,%edi
call   1040 <test2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test1(i32 16384)
%3 = call i32 @test2(i32 16384)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test1(i32 16384)
%2 = tail call i32 @test2(i32 16384)
ret i32 0
}
/* Variables and functions */
int pigpio_command(int, int, unsigned int, unsigned int, int);
int set_pull_up_down(int pi, unsigned gpio, unsigned pud) {
  return pigpio_command(pi, 2, gpio, pud, 1);
}


x86 assembly (clang, -O0):
<set_pull_up_down>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0x2,%esi
mov    $0x1,%r8d
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pull_up_down>:
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x2,%esi
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @set_pull_up_down(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @pigpio_command(i32 %7, i32 2, i32 %8, i32 %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
define i32 @set_pull_up_down(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @pigpio_command(i32 %0, i32 2, i32 %1, i32 %2, i32 1)
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int si_pid;
};
typedef TYPE_1__ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void sig_handler(int sig, siginfo_t *info, void *t) {
  printf("Received signal: %d\n", sig);
  printf("Received message: %d\n", info->si_pid);
  return;
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_handler>:
push   %rbx
mov    %rsi,%rbx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
mov    (%rbx),%esi
lea    0xeea(%rip),%rdi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
@.str = [21 x i8] c"Received signal: %d\0A\00"
@.str.1 = [22 x i8] c"Received message: %d\0A\00"
define void @sig_handler(i32 %0, %struct.TYPE_3__* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.TYPE_3__*
%6 = alloca i8*
store i32 %0, i32* %4
store %struct.TYPE_3__* %1, %struct.TYPE_3__** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
@.str = [21 x i8] c"Received signal: %d\0A\00"
@.str.1 = [22 x i8] c"Received message: %d\0A\00"
define void @sig_handler(i32 %0, %struct.TYPE_3__* nocapture %1, i8* nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void displayHelp(char *argv0) {
  printf("StringCreate Documentation\nStringCreate is used to, given a .stl "
         "file from StringLearn, create a random string.\nUsage: %s <stlfile> "
         "[--stopX] -l length [-p new-ngram-chance]\nIf --stopX is enabled, "
         "StringCreate will stop when an X is reached.\n",
         argv0);
}


x86 assembly (clang, -O0):
<displayHelp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<displayHelp>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [243 x i8] c"StringCreate Documentation\0AStringCreate is used to, given a .stl file from StringLearn, create a random string.\0AUsage: %s <stlfile> [--stopX] -l length [-p new-ngram-chance]\0AIf --stopX is enabled, StringCreate will stop when an X is reached.\0A\00"
define void @displayHelp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([243 x i8], [243 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [243 x i8] c"StringCreate Documentation\0AStringCreate is used to, given a .stl file from StringLearn, create a random string.\0AUsage: %s <stlfile> [--stopX] -l length [-p new-ngram-chance]\0AIf --stopX is enabled, StringCreate will stop when an X is reached.\0A\00"
define void @displayHelp(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([243 x i8], [243 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _errorloop();
void HardFault_Handler() { _errorloop(); }


x86 assembly (clang, -O0):
<HardFault_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_errorloop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HardFault_Handler>:
xor    %eax,%eax
jmp    1030 <_errorloop@plt>

LLVM IR (-O0):
define void @HardFault_Handler() {
%1 = call i32 (...) @_errorloop()
ret void
}

LLVM IR (-O2):
define void @HardFault_Handler() {
%1 = tail call i32 (...) @_errorloop()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FCEU_QSimpleCommand(int);
int FCEUI_FDSEject(void) {
  FCEU_QSimpleCommand(0x19);
  return (1);
}


x86 assembly (clang, -O0):
<FCEUI_FDSEject>:
push   %rbp
mov    %rsp,%rbp
mov    $0x19,%edi
call   1030 <FCEU_QSimpleCommand@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FCEUI_FDSEject>:
push   %rax
mov    $0x19,%edi
call   1030 <FCEU_QSimpleCommand@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @FCEUI_FDSEject() {
%1 = call i32 @FCEU_QSimpleCommand(i32 25)
ret i32 1
}

LLVM IR (-O2):
define i32 @FCEUI_FDSEject() {
%1 = tail call i32 @FCEU_QSimpleCommand(i32 25)
ret i32 1
}
/* Variables and functions */
scalar_t__ ctrl(char);
scalar_t__ separator(char);
int terminator(char c) { return separator(c) || ctrl(c); }


x86 assembly (clang, -O0):
<terminator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <separator@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    115c <terminator+0x3c>
movsbl -0x1(%rbp),%edi
call   1040 <ctrl@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminator>:
push   %rbx
mov    %edi,%ebx
call   1030 <separator@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <terminator+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1040 <ctrl@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @terminator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @separator(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @ctrl(i8 signext %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @terminator(i8 signext %0) {
%2 = tail call i64 @separator(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @ctrl(i8 signext %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void noatime_on(void) { system("/bin/mount -o remount,noatime,nodiratime /"); }


x86 assembly (clang, -O0):
<noatime_on>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<noatime_on>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"/bin/mount -o remount,noatime,nodiratime /\00"
define void @noatime_on() {
%1 = call i32 @system(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"/bin/mount -o remount,noatime,nodiratime /\00"
define void @noatime_on() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ JHGPixels_GetMainResolution(int *, int *);
void codename_GetMainResolution(int *width, int *height) {
  JHGPixels_GetMainResolution(width, height);
}


x86 assembly (clang, -O0):
<codename_GetMainResolution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <JHGPixels_GetMainResolution@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<codename_GetMainResolution>:
jmp    1030 <JHGPixels_GetMainResolution@plt>

LLVM IR (-O0):
define void @codename_GetMainResolution(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @JHGPixels_GetMainResolution(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @codename_GetMainResolution(i32* %0, i32* %1) {
%3 = tail call i32 @JHGPixels_GetMainResolution(i32* %0, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void js_putchar(char x, char y, char z) {
  ft_putchar(x);
  ft_putchar(y);
  ft_putchar(z);
}


x86 assembly (clang, -O0):
<js_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <ft_putchar@plt>
movsbl -0x2(%rbp),%edi
call   1030 <ft_putchar@plt>
movsbl -0x3(%rbp),%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<js_putchar>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
call   1030 <ft_putchar@plt>
mov    %ebp,%edi
call   1030 <ft_putchar@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @js_putchar(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = call i32 @ft_putchar(i8 signext %7)
%9 = load i8, i8* %5
%10 = call i32 @ft_putchar(i8 signext %9)
%11 = load i8, i8* %6
%12 = call i32 @ft_putchar(i8 signext %11)
ret void
}

LLVM IR (-O2):
define void @js_putchar(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = tail call i32 @ft_putchar(i8 signext %0)
%5 = tail call i32 @ft_putchar(i8 signext %1)
%6 = tail call i32 @ft_putchar(i8 signext %2)
ret void
}
__attribute__((target("sse4.2,fma4"))) void foo_multi(int i, double d) {}


x86 assembly (clang, -O0):
<foo_multi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
vmovsd %xmm0,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_multi>:
ret

LLVM IR (-O0):
define void @foo_multi(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
ret void
}

LLVM IR (-O2):
define void @foo_multi(i32 %0, double %1) {
ret void
}