xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ putch(char);
void puthex1(char c) {
  if (c > 9)
    putch('A' + c - 10);
  else
    putch('0' + c);
}


x86 assembly (clang, -O0):
<puthex1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
jle    1142 <puthex1+0x32>
movsbl -0x1(%rbp),%eax
add    $0x41,%eax
sub    $0xa,%eax
movsbl %al,%edi
call   1030 <putch@plt>
jmp    1151 <puthex1+0x41>
movsbl -0x1(%rbp),%eax
add    $0x30,%eax
movsbl %al,%edi
call   1030 <putch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puthex1>:
cmp    $0xa,%dil
mov    $0x37,%eax
mov    $0x30,%ecx
cmovge %eax,%ecx
add    %dil,%cl
movsbl %cl,%edi
jmp    1030 <putch@plt>

LLVM IR (-O0):
define void @puthex1(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sgt i32 %4, 9
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = add nsw i32 65, %8
%10 = sub nsw i32 %9, 10
%11 = trunc i32 %10 to i8
%12 = call i32 @putch(i8 signext %11)
br label %19
13: ; preds = %1
%14 = load i8, i8* %2
%15 = sext i8 %14 to i32
%16 = add nsw i32 48, %15
%17 = trunc i32 %16 to i8
%18 = call i32 @putch(i8 signext %17)
br label %19
19: ; preds = %13, %6
ret void
}

LLVM IR (-O2):
define void @puthex1(i8 signext %0) {
%2 = icmp sgt i8 %0, 9
%3 = select i1 %2, i8 55, i8 48
%4 = add i8 %3, %0
%5 = tail call i32 @putch(i8 signext %4)
ret void
}
/* Variables and functions */
unsigned int XXH32_getIntermediateResult(void *);
int /*<<< orphan*/ free(void *);
unsigned int XXH32_result(void *state_in) {
  unsigned int h32 = XXH32_getIntermediateResult(state_in);
  free(state_in);
  return h32;
}


x86 assembly (clang, -O0):
<XXH32_result>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <XXH32_getIntermediateResult@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XXH32_result>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <XXH32_getIntermediateResult@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @XXH32_result(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @XXH32_getIntermediateResult(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @XXH32_result(i8* %0) {
%2 = tail call i32 @XXH32_getIntermediateResult(i8* %0)
%3 = tail call i32 @free(i8* %0)
ret i32 %2
}
/* Variables and functions */
unsigned int list_traverse(int, int /*<<< orphan*/ *, int /*<<< orphan*/ *);
bool test_list_traverse_null_params(void) {
  bool pass = false;
  unsigned int res = list_traverse(false, NULL, NULL);
  if (res == 1) {
    pass = true;
  }
  return pass;
}


x86 assembly (clang, -O0):
<test_list_traverse_null_params>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%edx
mov    %rdx,%rsi
call   1030 <list_traverse@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1141 <test_list_traverse_null_params+0x31>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_list_traverse_null_params>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <list_traverse@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_list_traverse_null_params() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @list_traverse(i32 0, i32* null, i32* null)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 1, i32* %1
br label %7
7: ; preds = %6, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_list_traverse_null_params() {
%1 = tail call i32 @list_traverse(i32 0, i32* null, i32* null)
%2 = icmp eq i32 %1, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
void interrupt_reserved_3(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<interrupt_reserved_3>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <interrupt_reserved_3+0x9>
jmp    1109 <interrupt_reserved_3+0x9>

x86 assembly (clang, -O2):
<interrupt_reserved_3>:
jmp    1100 <interrupt_reserved_3>

LLVM IR (-O0):
define void @interrupt_reserved_3() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @interrupt_reserved_3() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ flush(void *);
int /*<<< orphan*/ maccess(void *);
size_t rdtsc();
size_t onlyreload(void *addr) {
  maccess(addr);
  flush(addr);
  size_t time = rdtsc();
  maccess(addr);
  size_t delta = rdtsc() - time;
  return delta;
}


x86 assembly (clang, -O0):
<onlyreload>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <maccess@plt>
mov    -0x8(%rbp),%rdi
call   1030 <flush@plt>
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <maccess@plt>
mov    $0x0,%al
call   1040 <rdtsc@plt>
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<onlyreload>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1050 <maccess@plt>
mov    %rbx,%rdi
call   1030 <flush@plt>
xor    %eax,%eax
call   1040 <rdtsc@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1050 <maccess@plt>
xor    %eax,%eax
call   1040 <rdtsc@plt>
sub    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @onlyreload(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @maccess(i8* %5)
%7 = load i8*, i8** %2
%8 = call i32 @flush(i8* %7)
%9 = call i64 (...) @rdtsc()
store i64 %9, i64* %3
%10 = load i8*, i8** %2
%11 = call i32 @maccess(i8* %10)
%12 = call i64 (...) @rdtsc()
%13 = load i64, i64* %3
%14 = sub i64 %12, %13
store i64 %14, i64* %4
%15 = load i64, i64* %4
ret i64 %15
}

LLVM IR (-O2):
define i64 @onlyreload(i8* %0) {
%2 = tail call i32 @maccess(i8* %0)
%3 = tail call i32 @flush(i8* %0)
%4 = tail call i64 (...) @rdtsc()
%5 = tail call i32 @maccess(i8* %0)
%6 = tail call i64 (...) @rdtsc()
%7 = sub i64 %6, %4
ret i64 %7
}
/* Variables and functions */
int syscall(int, unsigned int, int);
int uv__eventfd2(unsigned int count, int flags) {
  return syscall(290, count, flags);
}


x86 assembly (clang, -O0):
<uv__eventfd2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x122,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uv__eventfd2>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x122,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @uv__eventfd2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @syscall(i32 290, i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @uv__eventfd2(i32 %0, i32 %1) {
%3 = tail call i32 @syscall(i32 290, i32 %0, i32 %1)
ret i32 %3
}
int test_imm_97int16_reg(short val) {
  return ((val) & (0x97 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_97int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x97,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_97int16_reg>:
test   $0x97,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_97int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 151
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_97int16_reg(i16 signext %0) {
%2 = and i16 %0, 151
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: kallsyms [--all-symbols] "
                  "[--use-data-section] "
                  "[--symbol-prefix=<prefix char>] "
                  "[--page-offset=<CONFIG_PAGE_OFFSET>] "
                  "[--base-relative] < in.map > out.S\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [158 x i8] c"Usage: kallsyms [--all-symbols] [--use-data-section] [--symbol-prefix=<prefix char>] [--page-offset=<CONFIG_PAGE_OFFSET>] [--base-relative] < in.map > out.S\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [158 x i8] c"Usage: kallsyms [--all-symbols] [--use-data-section] [--symbol-prefix=<prefix char>] [--page-offset=<CONFIG_PAGE_OFFSET>] [--base-relative] < in.map > out.S\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void MROnGetPositionRequestSink(int *seconds, int *absSeconds, int *count,
                                int *absCount) {}


x86 assembly (clang, -O0):
<MROnGetPositionRequestSink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MROnGetPositionRequestSink>:
ret

LLVM IR (-O0):
define void @MROnGetPositionRequestSink(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
ret void
}

LLVM IR (-O2):
define void @MROnGetPositionRequestSink(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture %3) {
ret void
}
/* Type definitions */
struct group {
  int gr_gid;
};

/* Variables and functions */
int posix___Group_gid___impl(struct group *recv) { return recv->gr_gid; }


x86 assembly (clang, -O0):
<posix___Group_gid___impl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix___Group_gid___impl>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.group = type { i32 }
define i32 @posix___Group_gid___impl(%struct.group* %0) {
%2 = alloca %struct.group*
store %struct.group* %0, %struct.group** %2
%3 = load %struct.group*, %struct.group** %2
%4 = getelementptr inbounds %struct.group, %struct.group* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.group = type { i32 }
define i32 @posix___Group_gid___impl(%struct.group* nocapture %0) {
%2 = getelementptr inbounds %struct.group, %struct.group* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
int get_highbyte(int word) {
  unsigned short temp;
  temp = word & 0xff00;
  temp = temp >> 8;
  return (int)temp;
}


x86 assembly (clang, -O0):
<get_highbyte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
mov    %ax,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
sar    $0x8,%eax
mov    %ax,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_highbyte>:
mov    %edi,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @get_highbyte(i32 %0) {
%2 = alloca i32
%3 = alloca i16
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 65280
%6 = trunc i32 %5 to i16
store i16 %6, i16* %3
%7 = load i16, i16* %3
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 8
%10 = trunc i32 %9 to i16
store i16 %10, i16* %3
%11 = load i16, i16* %3
%12 = zext i16 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @get_highbyte(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 255
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  int i = 4;
  int j = i ^ 6;
  printf("\n%d", j);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x6,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x2,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\0A%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 4, i32* %1
%3 = load i32, i32* %1
%4 = xor i32 %3, 6
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"\0A%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ genmul(long, double *, long, long *);
void pgnmul(long n, long ncat) {
  extern long *iwork;
  extern double *fwork;
  genmul(n, fwork, ncat, iwork);
}


x86 assembly (clang, -O0):
<pgnmul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec5(%rip),%rax
mov    (%rax),%rsi
mov    -0x10(%rbp),%rdx
mov    0x2e9f(%rip),%rax
mov    (%rax),%rcx
call   1030 <genmul@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgnmul>:
mov    %rsi,%rdx
mov    0x2ed6(%rip),%rax
mov    (%rax),%rsi
mov    0x2eb4(%rip),%rax
mov    (%rax),%rcx
jmp    1030 <genmul@plt>

LLVM IR (-O0):
@fwork = external global double*
@iwork = external global i64*
define void @pgnmul(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load double*, double** @fwork
%7 = load i64, i64* %4
%8 = load i64*, i64** @iwork
%9 = call i32 @genmul(i64 %5, double* %6, i64 %7, i64* %8)
ret void
}

LLVM IR (-O2):
@fwork = external global double*
@iwork = external global i64*
define void @pgnmul(i64 %0, i64 %1) {
%3 = load double*, double** @fwork
%4 = load i64*, i64** @iwork
%5 = tail call i32 @genmul(i64 %0, double* %3, i64 %1, i64* %4)
ret void
}
/* Variables and functions */
int assert_fail(char *, int);
int test(int r) {
  union {
    long l;
    unsigned char c[sizeof(long)];
  } u;
  u.l = 0;
  u.c[0] = 0x80;
  r &= ((u.l == 128) ? 1 : assert_fail("u.l == 128", 22));
  u.l = 0;
  u.c[sizeof(long) - 1] = 0x80;
  r &= ((u.l < 0) ? 1 : assert_fail("u.l < 0", 24));
  return r;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movb   $0x80,-0x10(%rbp)
cmpq   $0x80,-0x10(%rbp)
jne    1142 <test+0x32>
mov    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1156 <test+0x46>
lea    0xeb7(%rip),%rdi
mov    $0x16,%esi
call   1030 <assert_fail@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movb   $0x80,-0x9(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1183 <test+0x73>
mov    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1197 <test+0x87>
lea    0xe81(%rip),%rdi
mov    $0x18,%esi
call   1030 <assert_fail@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    %edi,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
%union.anon = type { i64 }
@.str = [11 x i8] c"u.l == 128\00"
@.str.1 = [8 x i8] c"u.l < 0\00"
define i32 @test(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
store i32 %0, i32* %2
%4 = bitcast %union.anon* %3 to i64*
store i64 0, i64* %4
%5 = bitcast %union.anon* %3 to [8 x i8]*
%6 = getelementptr inbounds [8 x i8], [8 x i8]* %5, i64 0, i64 0
store i8 -128, i8* %6
%7 = bitcast %union.anon* %3 to i64*
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, 128
br i1 %9, label %10, label %11
10: ; preds = %1
br label %13
11: ; preds = %1
%12 = call i32 @assert_fail(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 22)
br label %13
13: ; preds = %11, %10
%14 = phi i32 [ 1, %10 ], [ %12, %11 ]
%15 = load i32, i32* %2
%16 = and i32 %15, %14
store i32 %16, i32* %2
%17 = bitcast %union.anon* %3 to i64*
store i64 0, i64* %17
%18 = bitcast %union.anon* %3 to [8 x i8]*
%19 = getelementptr inbounds [8 x i8], [8 x i8]* %18, i64 0, i64 7
store i8 -128, i8* %19
%20 = bitcast %union.anon* %3 to i64*
%21 = load i64, i64* %20
%22 = icmp slt i64 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %13
br label %26
24: ; preds = %13
%25 = call i32 @assert_fail(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 24)
br label %26
26: ; preds = %24, %23
%27 = phi i32 [ 1, %23 ], [ %25, %24 ]
%28 = load i32, i32* %2
%29 = and i32 %28, %27
store i32 %29, i32* %2
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @test(i32 %0) {
%2 = and i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int M_PI;
float lash_distanceToRadians(const float distance, const float radius) {
  return (M_PI * 2) * (distance / ((M_PI * 2) * radius));
}


x86 assembly (clang, -O0):
<lash_distanceToRadians>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    0x2ed3(%rip),%rax
mov    (%rax),%eax
shl    $0x1,%eax
cvtsi2ss %eax,%xmm0
movss  -0x4(%rbp),%xmm1
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
shl    $0x1,%eax
cvtsi2ss %eax,%xmm2
mulss  -0x8(%rbp),%xmm2
divss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lash_distanceToRadians>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
add    %eax,%eax
cvtsi2ss %eax,%xmm2
mulss  %xmm2,%xmm1
divss  %xmm1,%xmm0
mulss  %xmm2,%xmm0
ret

LLVM IR (-O0):
@M_PI = global i32 0
define float @lash_distanceToRadians(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load i32, i32* @M_PI
%6 = mul nsw i32 %5, 2
%7 = sitofp i32 %6 to float
%8 = load float, float* %3
%9 = load i32, i32* @M_PI
%10 = mul nsw i32 %9, 2
%11 = sitofp i32 %10 to float
%12 = load float, float* %4
%13 = fmul float %11, %12
%14 = fdiv float %8, %13
%15 = fmul float %7, %14
ret float %15
}

LLVM IR (-O2):
@M_PI = global i32 0
define float @lash_distanceToRadians(float %0, float %1) {
%3 = load i32, i32* @M_PI
%4 = shl nsw i32 %3, 1
%5 = sitofp i32 %4 to float
%6 = fmul float %5, %1
%7 = fdiv float %0, %6
%8 = fmul float %7, %5
ret float %8
}
void P_memoryclose() {}


x86 assembly (clang, -O0):
<P_memoryclose>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<P_memoryclose>:
ret

LLVM IR (-O0):
define void @P_memoryclose() {
ret void
}

LLVM IR (-O2):
define void @P_memoryclose() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FlashWrite(int, int);
void FlashClearStatusRegister(void) { FlashWrite((0x0), (0x0050)); }


x86 assembly (clang, -O0):
<FlashClearStatusRegister>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x50,%esi
call   1030 <FlashWrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashClearStatusRegister>:
xor    %edi,%edi
mov    $0x50,%esi
jmp    1030 <FlashWrite@plt>

LLVM IR (-O0):
define void @FlashClearStatusRegister() {
%1 = call i32 @FlashWrite(i32 0, i32 80)
ret void
}

LLVM IR (-O2):
define void @FlashClearStatusRegister() {
%1 = tail call i32 @FlashWrite(i32 0, i32 80)
ret void
}
void pc_set_bit(unsigned int nr, unsigned long *bitmap) {
  unsigned long offset = nr / ((int)sizeof(unsigned long) * 8);
  unsigned long bit = nr & (((int)sizeof(unsigned long) * 8) - 1);
  bitmap[offset] |= 1UL << bit;
}


x86 assembly (clang, -O0):
<pc_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x6,%eax
mov    %eax,%eax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3f,%eax
mov    %eax,%eax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    $0x1,%edx
shl    %cl,%rdx
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
or     (%rax,%rcx,8),%rdx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pc_set_bit>:
mov    %edi,%ecx
mov    %edi,%eax
mov    $0x1,%edx
shl    %cl,%rdx
shr    $0x6,%eax
or     %rdx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
define void @pc_set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = udiv i32 %7, 64
%9 = zext i32 %8 to i64
store i64 %9, i64* %5
%10 = load i32, i32* %3
%11 = and i32 %10, 63
%12 = zext i32 %11 to i64
store i64 %12, i64* %6
%13 = load i64, i64* %6
%14 = shl i64 1, %13
%15 = load i64*, i64** %4
%16 = load i64, i64* %5
%17 = getelementptr inbounds i64, i64* %15, i64 %16
%18 = load i64, i64* %17
%19 = or i64 %18, %14
store i64 %19, i64* %17
ret void
}

LLVM IR (-O2):
define void @pc_set_bit(i32 %0, i64* nocapture %1) {
%3 = lshr i32 %0, 6
%4 = zext i32 %3 to i64
%5 = and i32 %0, 63
%6 = zext i32 %5 to i64
%7 = shl nuw i64 1, %6
%8 = getelementptr inbounds i64, i64* %1, i64 %4
%9 = load i64, i64* %8
%10 = or i64 %9, %7
store i64 %10, i64* %8
ret void
}
void XSaveContext() {}


x86 assembly (clang, -O0):
<XSaveContext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSaveContext>:
ret

LLVM IR (-O0):
define void @XSaveContext() {
ret void
}

LLVM IR (-O2):
define void @XSaveContext() {
ret void
}
/* Variables and functions */
int strlen(char *);
char *substring(char *string, int start) {
  int i;
  char *resp;
  for (i = start; i < strlen(string); i++) {
    resp[i - start] = string[i];
  }
  return resp;
}


x86 assembly (clang, -O0):
<substring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
cmp    %ecx,%eax
jge    116a <substring+0x5a>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%ecx
sub    -0xc(%rbp),%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1125 <substring+0x15>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<substring>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i8* @substring(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
store i32 %7, i32* %5
br label %8
8: ; preds = %25, %2
%9 = load i32, i32* %5
%10 = load i8*, i8** %3
%11 = call i32 @strlen(i8* %10)
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %28
13: ; preds = %8
%14 = load i8*, i8** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = load i8*, i8** %6
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = sub nsw i32 %20, %21
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %19, i64 %23
store i8 %18, i8* %24
br label %25
25: ; preds = %13
%26 = load i32, i32* %5
%27 = add nsw i32 %26, 1
store i32 %27, i32* %5
br label %8
28: ; preds = %8
%29 = load i8*, i8** %6
ret i8* %29
}

LLVM IR (-O2):
define noalias i8* @substring(i8* %0, i32 %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp sle i32 %3, %1
tail call void @llvm.assume(i1 %4)
ret i8* undef
}
/* Variables and functions */
size_t __calc_min(size_t a, size_t b) { return a > b ? b : a; }


x86 assembly (clang, -O0):
<__calc_min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1127 <__calc_min+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <__calc_min+0x2f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__calc_min>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmova  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @__calc_min(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ugt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
br label %12
10: ; preds = %2
%11 = load i64, i64* %3
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @__calc_min(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
extern double index_symm_matrix(double **A, int i, int j) {
  return i < j ? A[i][j - i] : A[j][i - j];
}


x86 assembly (clang, -O0):
<index_symm_matrix>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    113e <index_symm_matrix+0x3e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    -0x10(%rbp),%ecx
sub    -0xc(%rbp),%ecx
movslq %ecx,%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    115d <index_symm_matrix+0x5d>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    -0xc(%rbp),%ecx
sub    -0x10(%rbp),%ecx
movslq %ecx,%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_symm_matrix>:
mov    %esi,%eax
sub    %edx,%eax
mov    %edx,%ecx
cmovl  %esi,%ecx
neg    %eax
sub    %edx,%esi
cmovl  %eax,%esi
movslq %ecx,%rax
mov    (%rdi,%rax,8),%rax
movslq %esi,%rcx
movsd  (%rax,%rcx,8),%xmm0
ret

LLVM IR (-O0):
define double @index_symm_matrix(double** %0, i32 %1, i32 %2) {
%4 = alloca double**
%5 = alloca i32
%6 = alloca i32
store double** %0, double*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %22
10: ; preds = %3
%11 = load double**, double*** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double*, double** %11, i64 %13
%15 = load double*, double** %14
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = sub nsw i32 %16, %17
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds double, double* %15, i64 %19
%21 = load double, double* %20
br label %34
22: ; preds = %3
%23 = load double**, double*** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds double*, double** %23, i64 %25
%27 = load double*, double** %26
%28 = load i32, i32* %5
%29 = load i32, i32* %6
%30 = sub nsw i32 %28, %29
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds double, double* %27, i64 %31
%33 = load double, double* %32
br label %34
34: ; preds = %22, %10
%35 = phi double [ %21, %10 ], [ %33, %22 ]
ret double %35
}

LLVM IR (-O2):
define double @index_symm_matrix(double** nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
%5 = sub nsw i32 %1, %2
%6 = sub nsw i32 %2, %1
%7 = select i1 %4, i32 %6, i32 %5
%8 = select i1 %4, i32 %1, i32 %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds double*, double** %0, i64 %9
%11 = load double*, double** %10
%12 = sext i32 %7 to i64
%13 = getelementptr inbounds double, double* %11, i64 %12
%14 = load double, double* %13
ret double %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int system(char *);
int main(int argc, char **argv) {
  printf("Testing system().\n");
  int rc = system("ls -l main.c");
  printf("The command returned %d.\n", rc);
  return rc;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xec8(%rip),%rdi
call   1030 <system@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xec3(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeef(%rip),%rdi
call   1030 <puts@plt>
lea    0xebc(%rip),%rdi
call   1040 <system@plt>
mov    %eax,%ebx
lea    0xebb(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Testing system().\0A\00"
@.str.1 = [13 x i8] c"ls -l main.c\00"
@.str.2 = [26 x i8] c"The command returned %d.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %6
ret i32 %11
}

LLVM IR (-O2):
@.str.1 = [13 x i8] c"ls -l main.c\00"
@.str.2 = [26 x i8] c"The command returned %d.\0A\00"
@str = [18 x i8] c"Testing system().\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i32 %4)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ test_show_bytes(int);
int main() {
  test_show_bytes(12345);
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3039,%edi
call   1030 <test_show_bytes@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3039,%edi
call   1030 <test_show_bytes@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test_show_bytes(i32 12345)
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test_show_bytes(i32 12345)
ret i32 1
}
unsigned xrop3_239_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = D | stk3;
  stk1 = S | stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_239_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_239_0_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
lea    (%rdi,%rcx,1),%eax
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
not    %edx
or     %edx,%ecx
or     $0xff,%ecx
and    %edx,%ecx
or     %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_239_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = and i32 %31, %32
%34 = load i32, i32* %8
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = or i32 %33, %37
%39 = load i32, i32* %7
%40 = load i32, i32* %6
%41 = xor i32 %40, -1
%42 = and i32 %39, %41
%43 = load i32, i32* %5
%44 = and i32 %42, %43
%45 = or i32 %38, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_239_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = xor i32 %7, -1
%9 = or i32 %4, %8
%10 = or i32 %9, 255
%11 = and i32 %10, %8
%12 = or i32 %5, %6
%13 = or i32 %12, %11
ret i32 %13
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __sigtimedwait(const sigset_t *set, siginfo_t *info,
                   const struct timespec *timeout) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__sigtimedwait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sigtimedwait>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @__sigtimedwait(i32* %0, i32* %1, %struct.timespec* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca %struct.timespec*
store i32* %0, i32** %4
store i32* %1, i32** %5
store %struct.timespec* %2, %struct.timespec** %6
%7 = load i32, i32* @ENOSYS
%8 = call i32 @__set_errno(i32 %7)
ret i32 -1
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @__sigtimedwait(i32* nocapture readnone %0, i32* nocapture readnone %1, %struct.timespec* nocapture readnone %2) {
%4 = load i32, i32* @ENOSYS
%5 = tail call i32 @__set_errno(i32 %4)
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigemptyset(int /*<<< orphan*/ *);
void test(void) {
  sigset_t signal_set;
  int result;
  result = sigemptyset(&signal_set);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <sigemptyset@plt>
mov    %eax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <sigemptyset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @test() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @sigemptyset(i32* %1)
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @test() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigemptyset(i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ read(int, char *, int);
char Selective_ReadCharRaw(int fd) {
  char ch;
  read(fd, &ch, 1);
  return ch;
}


x86 assembly (clang, -O0):
<Selective_ReadCharRaw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
movsbl -0x5(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Selective_ReadCharRaw>:
push   %rax
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
mov    0x7(%rsp),%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @Selective_ReadCharRaw(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @read(i32 %4, i8* %3, i32 1)
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @Selective_ReadCharRaw(i32 %0) {
%2 = alloca i8
%3 = call i32 @read(i32 %0, i8* %2, i32 1)
%4 = load i8, i8* %2
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sigfpe_handler(int sig) { printf("SIGFPE recieved.\n"); }


x86 assembly (clang, -O0):
<sigfpe_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigfpe_handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"SIGFPE recieved.\0A\00"
define void @sigfpe_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"SIGFPE recieved.\00"
define void @sigfpe_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ vmefail();
void *xcalloc(size_t nmemb, size_t size) {
  register void *value;
  value = calloc(nmemb, size);
  if (value == NULL)
    vmefail();
  return value;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1153 <xcalloc+0x33>
mov    $0x0,%al
call   1040 <vmefail@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rbx
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <xcalloc+0x15>
xor    %eax,%eax
call   1040 <vmefail@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 (...) @vmefail()
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @vmefail()
br label %7
7: ; preds = %5, %2
ret i8* %3
}
int test_imm_98int8_reg(signed char val) {
  return ((val) & (-0x98 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_98int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff68,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_98int8_reg>:
test   $0xffffff68,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_98int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -152
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_98int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -152
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int fun1200() { return 1200; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x4b0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x4b0,%eax
ret

LLVM IR (-O0):
define i32 @fun1200() {
ret i32 1200
}

LLVM IR (-O2):
define i32 @fun1200() {
ret i32 1200
}
/* Variables and functions */
int /*<<< orphan*/ ft_strncpy_m(char *, char *, int);
scalar_t__ malloc(int);
void add_value(char **arr, char *src, int memory, int no_limit) {
  char *tmp;
  tmp = (char *)malloc(sizeof(char) * memory);
  if (no_limit == -1)
    ft_strncpy_m(tmp, src, -1);
  else
    ft_strncpy_m(tmp, src, memory);
  *arr = tmp;
}


x86 assembly (clang, -O0):
<add_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
movslq -0x14(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpl   $0xffffffff,-0x18(%rbp)
jne    116a <add_value+0x4a>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xffffffff,%edx
call   1030 <ft_strncpy_m@plt>
jmp    117a <add_value+0x5a>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <ft_strncpy_m@plt>
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_value>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %ecx,%r12d
mov    %edx,%ebp
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
cmp    $0xffffffff,%r12d
cmove  %r12d,%ebp
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1030 <ft_strncpy_m@plt>
mov    %rbx,(%r15)
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @add_value(i8** %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8*
store i8** %0, i8*** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %7
%11 = sext i32 %10 to i64
%12 = mul i64 1, %11
%13 = trunc i64 %12 to i32
%14 = call i64 @malloc(i32 %13)
%15 = inttoptr i64 %14 to i8*
store i8* %15, i8** %9
%16 = load i32, i32* %8
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %22
18: ; preds = %4
%19 = load i8*, i8** %9
%20 = load i8*, i8** %6
%21 = call i32 @ft_strncpy_m(i8* %19, i8* %20, i32 -1)
br label %27
22: ; preds = %4
%23 = load i8*, i8** %9
%24 = load i8*, i8** %6
%25 = load i32, i32* %7
%26 = call i32 @ft_strncpy_m(i8* %23, i8* %24, i32 %25)
br label %27
27: ; preds = %22, %18
%28 = load i8*, i8** %9
%29 = load i8**, i8*** %5
store i8* %28, i8** %29
ret void
}

LLVM IR (-O2):
define void @add_value(i8** nocapture writeonly %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i64 @malloc(i32 %2)
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i32 %3, -1
%8 = select i1 %7, i32 -1, i32 %2
%9 = tail call i32 @ft_strncpy_m(i8* %6, i8* %1, i32 %8)
store i8* %6, i8** %0
ret void
}
void RTLogFlushRC(void) {}


x86 assembly (clang, -O0):
<RTLogFlushRC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLogFlushRC>:
ret

LLVM IR (-O0):
define void @RTLogFlushRC() {
ret void
}

LLVM IR (-O2):
define void @RTLogFlushRC() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ posix_spawnattr_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int posix_spawnattr_init(posix_spawnattr_t *attr) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<posix_spawnattr_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawnattr_init>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_init(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawnattr_init(i32* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i32 -1
}
void PWMGenFaultTriggerSet(unsigned long ulBase, unsigned long ulGen,
                           unsigned long ulGroup,
                           unsigned long ulFaultTriggers) {
  ;
  ;
  ;
  ;

  ;

  ;
  if (ulGroup == 0) {
    (*((volatile unsigned long *)(((ulBase) + (ulGen)) + 0x00000034))) =
        ulFaultTriggers;
  } else {
    (*((volatile unsigned long *)(((ulBase) + (ulGen)) + 0x00000038))) =
        ulFaultTriggers;
  }
}


x86 assembly (clang, -O0):
<PWMGenFaultTriggerSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1134 <PWMGenFaultTriggerSet+0x34>
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,0x34(%rax)
jmp    1144 <PWMGenFaultTriggerSet+0x44>
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,0x38(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenFaultTriggerSet>:
xor    %eax,%eax
test   %rdx,%rdx
setne  %al
add    %rsi,%rdi
mov    %rcx,0x34(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @PWMGenFaultTriggerSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %4
%12 = load i64, i64* %8
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = add i64 %13, %14
%16 = add i64 %15, 52
%17 = inttoptr i64 %16 to i64*
store volatile i64 %12, i64* %17
br label %25
18: ; preds = %4
%19 = load i64, i64* %8
%20 = load i64, i64* %5
%21 = load i64, i64* %6
%22 = add i64 %20, %21
%23 = add i64 %22, 56
%24 = inttoptr i64 %23 to i64*
store volatile i64 %19, i64* %24
br label %25
25: ; preds = %18, %11
ret void
}

LLVM IR (-O2):
define void @PWMGenFaultTriggerSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %2, 0
%6 = add i64 %1, %0
%7 = select i1 %5, i64 52, i64 56
%8 = add i64 %6, %7
%9 = inttoptr i64 %8 to i64*
store volatile i64 %3, i64* %9
ret void
}
int baz(int a) { return a + 1; }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @baz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @baz(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}