#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ int32_t;
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int UINT64_C(int);
int /*<<< orphan*/ _mm_and_si128(int /*<<< orphan*/, int /*<<< orphan*/ const);
int /*<<< orphan*/ _mm_cmpgt_epi32(int /*<<< orphan*/ const,
                                   int /*<<< orphan*/ const);
int /*<<< orphan*/ _mm_cmplt_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_cvtsi32_si128(int);
int /*<<< orphan*/ _mm_set1_epi32(int /*<<< orphan*/);
int /*<<< orphan*/ _mm_setzero_si128();
int /*<<< orphan*/ _mm_sra_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_srli_epi32(int /*<<< orphan*/ const, int);
int /*<<< orphan*/ _mm_sub_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i gemmlowp_sse_rdivbypo2_s32(__m128i x, int exponent) {
  const __m128i mask =
      _mm_set1_epi32((int32_t)((UINT64_C(1) << exponent) - UINT64_C(1)));
  const __m128i remainder = _mm_and_si128(x, mask);
  const __m128i threshold = _mm_sub_epi32(
      _mm_srli_epi32(mask, 1), _mm_cmplt_epi32(x, _mm_setzero_si128()));
  return _mm_sub_epi32(_mm_sra_epi32(x, _mm_cvtsi32_si128(exponent)),
                       _mm_cmpgt_epi32(remainder, threshold));
}


x86 assembly (clang, -O0):
<gemmlowp_sse_rdivbypo2_s32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <UINT64_C@plt>
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x28(%rbp)
mov    $0x1,%edi
call   1030 <UINT64_C@plt>
mov    -0x28(%rbp),%edi
sub    %eax,%edi
call   1090 <_mm_set1_epi32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
call   10b0 <_mm_and_si128@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    $0x1,%esi
call   10a0 <_mm_srli_epi32@plt>
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    $0x0,%al
call   1050 <_mm_setzero_si128@plt>
mov    -0x24(%rbp),%edi
mov    %eax,%esi
call   10c0 <_mm_cmplt_epi32@plt>
mov    -0x20(%rbp),%edi
mov    %eax,%esi
call   1070 <_mm_sub_epi32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%edi
call   1080 <_mm_cvtsi32_si128@plt>
mov    -0x1c(%rbp),%edi
mov    %eax,%esi
call   1060 <_mm_sra_epi32@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x14(%rbp),%esi
call   1040 <_mm_cmpgt_epi32@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%esi
call   1070 <_mm_sub_epi32@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gemmlowp_sse_rdivbypo2_s32>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %edi,%ebx
mov    $0x1,%edi
call   1030 <UINT64_C@plt>
mov    %eax,%ebp
mov    %r15d,%ecx
shl    %cl,%ebp
mov    $0x1,%edi
call   1030 <UINT64_C@plt>
sub    %eax,%ebp
mov    %ebp,%edi
call   1090 <_mm_set1_epi32@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    %eax,%esi
call   10b0 <_mm_and_si128@plt>
mov    %eax,%r14d
mov    %ebp,%edi
mov    $0x1,%esi
call   10a0 <_mm_srli_epi32@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1050 <_mm_setzero_si128@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   10c0 <_mm_cmplt_epi32@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1070 <_mm_sub_epi32@plt>
mov    %eax,%ebp
mov    %r15d,%edi
call   1080 <_mm_cvtsi32_si128@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1060 <_mm_sra_epi32@plt>
mov    %eax,%ebx
mov    %r14d,%edi
mov    %ebp,%esi
call   1040 <_mm_cmpgt_epi32@plt>
mov    %ebx,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1070 <_mm_sub_epi32@plt>

LLVM IR (-O0):
define i32 @gemmlowp_sse_rdivbypo2_s32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = call i32 @UINT64_C(i32 1)
%9 = load i32, i32* %4
%10 = shl i32 %8, %9
%11 = call i32 @UINT64_C(i32 1)
%12 = sub nsw i32 %10, %11
%13 = call i32 @_mm_set1_epi32(i32 %12)
store i32 %13, i32* %5
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = call i32 @_mm_and_si128(i32 %14, i32 %15)
store i32 %16, i32* %6
%17 = load i32, i32* %5
%18 = call i32 @_mm_srli_epi32(i32 %17, i32 1)
%19 = load i32, i32* %3
%20 = call i32 (...) @_mm_setzero_si128()
%21 = call i32 @_mm_cmplt_epi32(i32 %19, i32 %20)
%22 = call i32 @_mm_sub_epi32(i32 %18, i32 %21)
store i32 %22, i32* %7
%23 = load i32, i32* %3
%24 = load i32, i32* %4
%25 = call i32 @_mm_cvtsi32_si128(i32 %24)
%26 = call i32 @_mm_sra_epi32(i32 %23, i32 %25)
%27 = load i32, i32* %6
%28 = load i32, i32* %7
%29 = call i32 @_mm_cmpgt_epi32(i32 %27, i32 %28)
%30 = call i32 @_mm_sub_epi32(i32 %26, i32 %29)
ret i32 %30
}

LLVM IR (-O2):
define i32 @gemmlowp_sse_rdivbypo2_s32(i32 %0, i32 %1) {
%3 = tail call i32 @UINT64_C(i32 1)
%4 = shl i32 %3, %1
%5 = tail call i32 @UINT64_C(i32 1)
%6 = sub nsw i32 %4, %5
%7 = tail call i32 @_mm_set1_epi32(i32 %6)
%8 = tail call i32 @_mm_and_si128(i32 %0, i32 %7)
%9 = tail call i32 @_mm_srli_epi32(i32 %7, i32 1)
%10 = tail call i32 (...) @_mm_setzero_si128()
%11 = tail call i32 @_mm_cmplt_epi32(i32 %0, i32 %10)
%12 = tail call i32 @_mm_sub_epi32(i32 %9, i32 %11)
%13 = tail call i32 @_mm_cvtsi32_si128(i32 %1)
%14 = tail call i32 @_mm_sra_epi32(i32 %0, i32 %13)
%15 = tail call i32 @_mm_cmpgt_epi32(i32 %8, i32 %12)
%16 = tail call i32 @_mm_sub_epi32(i32 %14, i32 %15)
ret i32 %16
}