xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
void print(unsigned m[], unsigned n) {
  unsigned i;
  for (i = 0; i < n; i++)
    printf("%8u", m[i]);
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1156 <print+0x46>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    (%rax,%rcx,4),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
je     1145 <print+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%8u\00"
define void @print(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = zext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%8u\00"
define void @print(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ block_end();
void close_if_block(const char *c_cond) { block_end(); }


x86 assembly (clang, -O0):
<close_if_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <block_end@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_if_block>:
xor    %eax,%eax
jmp    1030 <block_end@plt>

LLVM IR (-O0):
define void @close_if_block(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @block_end()
ret void
}

LLVM IR (-O2):
define void @close_if_block(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @block_end()
ret void
}
float dcn_bw_max2(const float arg1, const float arg2) {
  if (((arg1) != (arg1)))
    return arg2;
  if (((arg2) != (arg2)))
    return arg1;
  return arg1 > arg2 ? arg1 : arg2;
}


x86 assembly (clang, -O0):
<dcn_bw_max2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jne    1128 <dcn_bw_max2+0x28>
jp     1128 <dcn_bw_max2+0x28>
jmp    1137 <dcn_bw_max2+0x37>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1192 <dcn_bw_max2+0x92>
movss  -0xc(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jne    1151 <dcn_bw_max2+0x51>
jp     1151 <dcn_bw_max2+0x51>
jmp    1160 <dcn_bw_max2+0x60>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1192 <dcn_bw_max2+0x92>
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    117e <dcn_bw_max2+0x7e>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1188 <dcn_bw_max2+0x88>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcn_bw_max2>:
ucomiss %xmm0,%xmm0
jp     1111 <dcn_bw_max2+0x11>
ucomiss %xmm1,%xmm1
jp     110e <dcn_bw_max2+0xe>
maxss  %xmm1,%xmm0
movaps %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @dcn_bw_max2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %4
%8 = fcmp une float %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %5
store float %10, float* %3
br label %27
11: ; preds = %2
%12 = load float, float* %5
%13 = load float, float* %5
%14 = fcmp une float %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load float, float* %4
store float %16, float* %3
br label %27
17: ; preds = %11
%18 = load float, float* %4
%19 = load float, float* %5
%20 = fcmp ogt float %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = load float, float* %4
br label %25
23: ; preds = %17
%24 = load float, float* %5
br label %25
25: ; preds = %23, %21
%26 = phi float [ %22, %21 ], [ %24, %23 ]
store float %26, float* %3
br label %27
27: ; preds = %25, %15, %9
%28 = load float, float* %3
ret float %28
}

LLVM IR (-O2):
define float @dcn_bw_max2(float %0, float %1) {
%3 = fcmp uno float %0, 0.000000e+00
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = fcmp uno float %1, 0.000000e+00
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = fcmp ogt float %0, %1
%8 = select i1 %7, float %0, float %1
br label %9
9: ; preds = %4, %2, %6
%10 = phi float [ %8, %6 ], [ %1, %2 ], [ %0, %4 ]
ret float %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
scalar_t__ pthread_once;
scalar_t__ pthread_self;
void dltest(uint32_t **value1, uint32_t **value2) {
  *value1 = (uint32_t *)pthread_once;
  *value2 = (uint32_t *)pthread_self;
}


x86 assembly (clang, -O0):
<dltest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    0x2eb4(%rip),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dltest>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%rax
mov    %rax,(%rdi)
mov    0x2ec4(%rip),%rax
mov    (%rax),%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
@pthread_once = global i64 0
@pthread_self = global i64 0
define void @dltest(i32** %0, i32** %1) {
%3 = alloca i32**
%4 = alloca i32**
store i32** %0, i32*** %3
store i32** %1, i32*** %4
%5 = load i64, i64* @pthread_once
%6 = inttoptr i64 %5 to i32*
%7 = load i32**, i32*** %3
store i32* %6, i32** %7
%8 = load i64, i64* @pthread_self
%9 = inttoptr i64 %8 to i32*
%10 = load i32**, i32*** %4
store i32* %9, i32** %10
ret void
}

LLVM IR (-O2):
@pthread_once = global i64 0
@pthread_self = global i64 0
define void @dltest(i32** nocapture writeonly %0, i32** nocapture writeonly %1) {
%3 = load i64, i64* @pthread_once
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %0
%5 = load i64, i64* @pthread_self
%6 = inttoptr i64 %5 to i32*
store i32* %6, i32** %1
ret void
}
/* Type definitions */
struct error_context {
  int dummy;
};

/* Variables and functions */
scalar_t__ attr_copy_action(char const *, struct error_context *);
int attr_copy_check_permissions(const char *name, struct error_context *ctx) {
  return attr_copy_action(name, ctx) == 0;
}


x86 assembly (clang, -O0):
<attr_copy_check_permissions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <attr_copy_action@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<attr_copy_check_permissions>:
push   %rax
call   1030 <attr_copy_action@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.error_context = type { i32 }
define i32 @attr_copy_check_permissions(i8* %0, %struct.error_context* %1) {
%3 = alloca i8*
%4 = alloca %struct.error_context*
store i8* %0, i8** %3
store %struct.error_context* %1, %struct.error_context** %4
%5 = load i8*, i8** %3
%6 = load %struct.error_context*, %struct.error_context** %4
%7 = call i64 @attr_copy_action(i8* %5, %struct.error_context* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.error_context = type { i32 }
define i32 @attr_copy_check_permissions(i8* %0, %struct.error_context* %1) {
%3 = tail call i64 @attr_copy_action(i8* %0, %struct.error_context* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int truncate(char const *, int /*<<< orphan*/);
int fs_truncate(const char *path, int len) {
  return truncate(path, (off_t)len);
}


x86 assembly (clang, -O0):
<fs_truncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <truncate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_truncate>:
jmp    1030 <truncate@plt>

LLVM IR (-O0):
define i32 @fs_truncate(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @truncate(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fs_truncate(i8* %0, i32 %1) {
%3 = tail call i32 @truncate(i8* %0, i32 %1)
ret i32 %3
}
int reduce_capabilities(void) {
  int ret = 0;
  return ret;
}


x86 assembly (clang, -O0):
<reduce_capabilities>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reduce_capabilities>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @reduce_capabilities() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @reduce_capabilities() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ do_scrolling();
int /*<<< orphan*/ reset_colors();
int /*<<< orphan*/ set_test_colors();
int /*<<< orphan*/ show_graphic_rendition();
int test_color_screen(const char *the_title) {
  set_test_colors();
  do_scrolling();
  show_graphic_rendition();
  reset_colors();
  return 0;
}


x86 assembly (clang, -O0):
<test_color_screen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1060 <set_test_colors@plt>
mov    $0x0,%al
call   1050 <do_scrolling@plt>
mov    $0x0,%al
call   1040 <show_graphic_rendition@plt>
mov    $0x0,%al
call   1030 <reset_colors@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_color_screen>:
push   %rax
xor    %eax,%eax
call   1060 <set_test_colors@plt>
xor    %eax,%eax
call   1050 <do_scrolling@plt>
xor    %eax,%eax
call   1040 <show_graphic_rendition@plt>
xor    %eax,%eax
call   1030 <reset_colors@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_color_screen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @set_test_colors()
%4 = call i32 (...) @do_scrolling()
%5 = call i32 (...) @show_graphic_rendition()
%6 = call i32 (...) @reset_colors()
ret i32 0
}

LLVM IR (-O2):
define i32 @test_color_screen(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @set_test_colors()
%3 = tail call i32 (...) @do_scrolling()
%4 = tail call i32 (...) @show_graphic_rendition()
%5 = tail call i32 (...) @reset_colors()
ret i32 0
}
void outb(int portnum, int data) {
  asm("outb %%al, %%dx" ::"a"(data), "d"(portnum));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%edx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @outb(i32 %0, i32 %1) {
tail call void asm sideeffect "outb %al, %dx", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %1, i32 %0)
ret void
}
int adds_si_test2(int a, int b, int c) {
  int d = a + 0xfff;
  if (d <= 0)
    return a + c;
  else
    return b + d + c;
}


x86 assembly (clang, -O0):
<adds_si_test2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xfff,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jg     1130 <adds_si_test2+0x30>
mov    -0x8(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113c <adds_si_test2+0x3c>
mov    -0xc(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adds_si_test2>:
cmp    $0xfffff002,%edi
lea    0xfff(%rdi,%rsi,1),%eax
cmovl  %edi,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @adds_si_test2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 4095
store i32 %10, i32* %8
%11 = load i32, i32* %8
%12 = icmp sle i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* %7
%16 = add nsw i32 %14, %15
store i32 %16, i32* %4
br label %23
17: ; preds = %3
%18 = load i32, i32* %6
%19 = load i32, i32* %8
%20 = add nsw i32 %18, %19
%21 = load i32, i32* %7
%22 = add nsw i32 %20, %21
store i32 %22, i32* %4
br label %23
23: ; preds = %17, %13
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @adds_si_test2(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, -4094
%5 = add nsw i32 %0, 4095
%6 = add nsw i32 %5, %1
%7 = select i1 %4, i32 %0, i32 %6
%8 = add nsw i32 %7, %2
ret i32 %8
}
int nth_digit(int i, int n) {
  while (i--) {
    n /= 10;
  }
  return n % 10;
}


x86 assembly (clang, -O0):
<nth_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1131 <nth_digit+0x31>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    110a <nth_digit+0xa>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nth_digit>:
test   %edi,%edi
je     116c <nth_digit+0x6c>
lea    -0x1(%rdi),%r8d
mov    %edi,%ecx
and    $0x3,%ecx
je     1140 <nth_digit+0x40>
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movslq %esi,%rsi
imul   $0x66666667,%rsi,%rsi
mov    %rsi,%rax
shr    $0x3f,%rax
sar    $0x22,%rsi
add    %eax,%esi
add    $0x1,%edx
cmp    %edx,%ecx
jne    1120 <nth_digit+0x20>
sub    %edx,%edi
cmp    $0x3,%r8d
jb     116c <nth_digit+0x6c>
cs nopw 0x0(%rax,%rax,1)
movslq %esi,%rax
imul   $0x68db8bad,%rax,%rsi
mov    %rsi,%rax
shr    $0x3f,%rax
sar    $0x2c,%rsi
add    %eax,%esi
add    $0xfffffffc,%edi
jne    1150 <nth_digit+0x50>
movslq %esi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @nth_digit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, -1
store i32 %7, i32* %3
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 10
store i32 %11, i32* %4
br label %5
12: ; preds = %5
%13 = load i32, i32* %4
%14 = srem i32 %13, 10
ret i32 %14
}

LLVM IR (-O2):
define i32 @nth_digit(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %27, label %4
4: ; preds = %2
%5 = add i32 %0, -1
%6 = and i32 %0, 3
%7 = icmp eq i32 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %4, %8
%9 = phi i32 [ %13, %8 ], [ %1, %4 ]
%10 = phi i32 [ %12, %8 ], [ %0, %4 ]
%11 = phi i32 [ %14, %8 ], [ 0, %4 ]
%12 = add nsw i32 %10, -1
%13 = sdiv i32 %9, 10
%14 = add i32 %11, 1
%15 = icmp eq i32 %14, %6
br i1 %15, label %16, label %8
16: ; preds = %8, %4
%17 = phi i32 [ undef, %4 ], [ %13, %8 ]
%18 = phi i32 [ %1, %4 ], [ %13, %8 ]
%19 = phi i32 [ %0, %4 ], [ %12, %8 ]
%20 = icmp ult i32 %5, 3
br i1 %20, label %27, label %21
21: ; preds = %16, %21
%22 = phi i32 [ %25, %21 ], [ %18, %16 ]
%23 = phi i32 [ %24, %21 ], [ %19, %16 ]
%24 = add nsw i32 %23, -4
%25 = sdiv i32 %22, 10000
%26 = icmp eq i32 %24, 0
br i1 %26, label %27, label %21
27: ; preds = %16, %21, %2
%28 = phi i32 [ %1, %2 ], [ %17, %16 ], [ %25, %21 ]
%29 = srem i32 %28, 10
ret i32 %29
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/absyn.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [146 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/absyn.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([146 x i8], [146 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [146 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/absyn.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([146 x i8], [146 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
void remove_gesture_sensor(struct ssp_data *data) { return; }


x86 assembly (clang, -O0):
<remove_gesture_sensor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_gesture_sensor>:
ret

LLVM IR (-O0):
%struct.ssp_data = type opaque
define void @remove_gesture_sensor(%struct.ssp_data* %0) {
%2 = alloca %struct.ssp_data*
store %struct.ssp_data* %0, %struct.ssp_data** %2
ret void
}

LLVM IR (-O2):
%struct.ssp_data = type opaque
define void @remove_gesture_sensor(%struct.ssp_data* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t __attribute__((no)) vm_vaarg32(void *rf, void **ptr) {
  void *p = *ptr;
  p -= sizeof(uint32_t);
  uint32_t r = *(uint32_t *)p;
  *ptr = p;
  return r;
}


x86 assembly (clang, -O0):
<vm_vaarg32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0xfffffffffffffffc,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vm_vaarg32>:
mov    (%rsi),%rcx
mov    -0x4(%rcx),%eax
add    $0xfffffffffffffffc,%rcx
mov    %rcx,(%rsi)
ret

LLVM IR (-O0):
define i32 @vm_vaarg32(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i8** %1, i8*** %4
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = getelementptr i8, i8* %9, i64 -4
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
store i32 %13, i32* %6
%14 = load i8*, i8** %5
%15 = load i8**, i8*** %4
store i8* %14, i8** %15
%16 = load i32, i32* %6
ret i32 %16
}

LLVM IR (-O2):
define i32 @vm_vaarg32(i8* nocapture readnone %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = getelementptr i8, i8* %3, i64 -4
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i8* %4, i8** %1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xdb() {
  Assert_real((isalpha(219) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1100, ("isalpha should be 0 for 0xdb"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xdb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdb,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x44c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xdb>:
push   %rax
mov    $0xdb,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x44c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xdb\00"
define void @t_isalpha_0xdb() {
%1 = call i64 @isalpha(i32 219)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1100, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xdb\00"
define void @t_isalpha_0xdb() {
%1 = tail call i64 @isalpha(i32 219)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1100, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ detail;
};
typedef TYPE_1__ XFocusOutEvent;

/* Variables and functions */
int get_XFocusOutEvent_detail(void *_p) {
  return (int)((XFocusOutEvent *)_p)->detail;
}


x86 assembly (clang, -O0):
<get_XFocusOutEvent_detail>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XFocusOutEvent_detail>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XFocusOutEvent_detail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XFocusOutEvent_detail(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int mswin_minorver() { return (4); }


x86 assembly (clang, -O0):
<mswin_minorver>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mswin_minorver>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @mswin_minorver() {
ret i32 4
}

LLVM IR (-O2):
define i32 @mswin_minorver() {
ret i32 4
}
int pentagonal(int n) { return n * (3 * n - 1) / 2; }


x86 assembly (clang, -O0):
<pentagonal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x3,-0x4(%rbp),%ecx
sub    $0x1,%ecx
imul   %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<pentagonal>:
lea    (%rdi,%rdi,2),%ecx
add    $0xffffffff,%ecx
imul   %edi,%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @pentagonal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 3, %4
%6 = sub nsw i32 %5, 1
%7 = mul nsw i32 %3, %6
%8 = sdiv i32 %7, 2
ret i32 %8
}

LLVM IR (-O2):
define i32 @pentagonal(i32 %0) {
%2 = mul nsw i32 %0, 3
%3 = add nsw i32 %2, -1
%4 = mul nsw i32 %3, %0
%5 = sdiv i32 %4, 2
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int x;
};
typedef TYPE_1__ XEnterWindowEvent;

/* Variables and functions */
void set_XEnterWindowEvent_x(void *_p, int _v) {
  ((XEnterWindowEvent *)_p)->x = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEnterWindowEvent_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEnterWindowEvent_x>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XEnterWindowEvent_x(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XEnterWindowEvent_x(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int ffi_test_49(int x) { return x + 1; }


x86 assembly (clang, -O0):
<ffi_test_49>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_test_49>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ffi_test_49(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @ffi_test_49(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
unsigned long crb_pswitch(long action, long cpu_id) {
  return 0x8000000000000000ul;
}


x86 assembly (clang, -O0):
<crb_pswitch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0x8000000000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crb_pswitch>:
movabs $0x8000000000000000,%rax
ret

LLVM IR (-O0):
define i64 @crb_pswitch(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret i64 -9223372036854775808
}

LLVM IR (-O2):
define i64 @crb_pswitch(i64 %0, i64 %1) {
ret i64 -9223372036854775808
}
void free_float3(float ***a) {
  free(a[0][0]);
  free(a[0]);
  free(a);
}


x86 assembly (clang, -O0):
<free_float3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_float3>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    (%rbx),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_float3(float*** %0) {
%2 = alloca float***
store float*** %0, float**** %2
%3 = load float***, float**** %2
%4 = getelementptr inbounds float**, float*** %3, i64 0
%5 = load float**, float*** %4
%6 = getelementptr inbounds float*, float** %5, i64 0
%7 = load float*, float** %6
%8 = bitcast float* %7 to i8*
%9 = load float***, float**** %2
%10 = getelementptr inbounds float**, float*** %9, i64 0
%11 = load float**, float*** %10
%12 = bitcast float** %11 to i8*
%13 = load float***, float**** %2
%14 = bitcast float*** %13 to i8*
ret void
}

LLVM IR (-O2):
define void @free_float3(float*** nocapture %0) {
%2 = bitcast float*** %0 to i8***
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
tail call void @free(i8* %4)
%5 = bitcast float*** %0 to i8**
%6 = load i8*, i8** %5
tail call void @free(i8* %6)
%7 = bitcast float*** %0 to i8*
tail call void @free(i8* %7)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int /*<<< orphan*/ mtrace();
int /*<<< orphan*/ regcomp(int /*<<< orphan*/ *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ regfree(int /*<<< orphan*/ *);
int main(int argc, char **argv) {
  regex_t r;
  mtrace();
  regcomp(&r, "[a]\\|[a]\\{-2,}", 0);
  regfree(&r);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <mtrace@plt>
lea    -0x14(%rbp),%rdi
lea    0xeaf(%rip),%rsi
xor    %edx,%edx
call   1040 <regcomp@plt>
lea    -0x14(%rbp),%rdi
call   1030 <regfree@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
xor    %eax,%eax
call   1050 <mtrace@plt>
lea    0xebd(%rip),%rsi
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
xor    %edx,%edx
call   1040 <regcomp@plt>
mov    %rbx,%rdi
call   1030 <regfree@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"[a]\\|[a]\\{-2,}\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i32 (...) @mtrace()
%7 = call i32 @regcomp(i32* %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 0)
%8 = call i32 @regfree(i32* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"[a]\\|[a]\\{-2,}\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 (...) @mtrace()
%6 = call i32 @regcomp(i32* %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 0)
%7 = call i32 @regfree(i32* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ im_a_minion_01();
void test(void) {
  int i = 0U;
  int j = 0U;
  int a, b;
  int c, d;
  for (;;) {
    a = b;
  }
  for (i = 1; i < 100U; i++)
    b++;
  while (a > 10U)
    im_a_minion_01();
  while (a == 90U) {
    b++;
  }
  if (a == d)
    b = c;
  if (a == d) {
    a = d;
  }
  if (d > a)
    if (c > b)
      a++;
  if (a > c)
    b++;
  else if (a > b)
    c++;
  else if (a > d)
    d++;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1112 <test+0x12>

x86 assembly (clang, -O2):
<test>:
jmp    1100 <test>

LLVM IR (-O0):
define void @test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %7
7: ; preds = %7, %0
%8 = load i32, i32* %4
store i32 %8, i32* %3
br label %7
}

LLVM IR (-O2):
define void @test() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void busopen() {
  printf("TCP/IP not supported on this platform\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<busopen>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<busopen>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"TCP/IP not supported on this platform\0A\00"
define void @busopen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@str = [38 x i8] c"TCP/IP not supported on this platform\00"
define void @busopen() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -1)
unreachable
}
int test_imm_5Fuint32_mem(unsigned int *val) {
  return ((*val) & (0x5F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Fuint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x5f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Fuint32_mem>:
testb  $0x5f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Fuint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 95
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Fuint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 95
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ getenv(char *);
int main(int argc, char **argv) { getenv("PATH"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <getenv@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <getenv@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"PATH\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"PATH\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, int);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, int);
void convertPCGametypeToCE(void *gametype) {
  memcpy(gametype + 0xD4, gametype + 0x94, 0x08);
  memset(gametype + 0x94, 0, 0x08);
  memcpy(gametype + 0x9C, gametype + 0x7C, 0x18);
  memset(gametype + 0x7C, 0, 0x18);
}


x86 assembly (clang, -O0):
<convertPCGametypeToCE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0xd4,%rdi
mov    -0x8(%rbp),%rsi
add    $0x94,%rsi
mov    $0x8,%edx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rdi
add    $0x94,%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1030 <memset@plt>
mov    -0x8(%rbp),%rdi
add    $0x9c,%rdi
mov    -0x8(%rbp),%rsi
add    $0x7c,%rsi
mov    $0x18,%edx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rdi
add    $0x7c,%rdi
xor    %esi,%esi
mov    $0x18,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertPCGametypeToCE>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
add    $0xd4,%rdi
lea    0x94(%rbx),%r14
mov    %r14,%rsi
mov    $0x8,%edx
call   1040 <memcpy@plt>
mov    %r14,%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1030 <memset@plt>
lea    0x9c(%rbx),%rdi
add    $0x7c,%rbx
mov    %rbx,%rsi
mov    $0x18,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x18,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @convertPCGametypeToCE(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 212
%5 = load i8*, i8** %2
%6 = getelementptr i8, i8* %5, i64 148
%7 = call i32 @memcpy(i8* %4, i8* %6, i32 8)
%8 = load i8*, i8** %2
%9 = getelementptr i8, i8* %8, i64 148
%10 = call i32 @memset(i8* %9, i32 0, i32 8)
%11 = load i8*, i8** %2
%12 = getelementptr i8, i8* %11, i64 156
%13 = load i8*, i8** %2
%14 = getelementptr i8, i8* %13, i64 124
%15 = call i32 @memcpy(i8* %12, i8* %14, i32 24)
%16 = load i8*, i8** %2
%17 = getelementptr i8, i8* %16, i64 124
%18 = call i32 @memset(i8* %17, i32 0, i32 24)
ret void
}

LLVM IR (-O2):
define void @convertPCGametypeToCE(i8* %0) {
%2 = getelementptr i8, i8* %0, i64 212
%3 = getelementptr i8, i8* %0, i64 148
%4 = tail call i32 @memcpy(i8* %2, i8* %3, i32 8)
%5 = tail call i32 @memset(i8* %3, i32 0, i32 8)
%6 = getelementptr i8, i8* %0, i64 156
%7 = getelementptr i8, i8* %0, i64 124
%8 = tail call i32 @memcpy(i8* %6, i8* %7, i32 24)
%9 = tail call i32 @memset(i8* %7, i32 0, i32 24)
ret void
}
/* Variables and functions */
int f153(int *);
int f154(int *p) { return f153(p); }


x86 assembly (clang, -O0):
<f154>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f153@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f154>:
jmp    1030 <f153@plt>

LLVM IR (-O0):
define i32 @f154(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f153(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f154(i32* %0) {
%2 = tail call i32 @f153(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ memmove(char *, char *, int);
int strlen(char *);
void right_trim_serial_number(char *serial_number, int desired_digits) {
  int num_digits = strlen(serial_number);
  if (desired_digits < num_digits) {
    int offset = num_digits - desired_digits;
    memmove(serial_number, serial_number + offset, desired_digits);
    serial_number[desired_digits] = '\0';
  }
}


x86 assembly (clang, -O0):
<right_trim_serial_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1173 <right_trim_serial_number+0x53>
mov    -0x10(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0x14(%rbp),%rax
add    %rax,%rsi
mov    -0xc(%rbp),%edx
call   1040 <memmove@plt>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<right_trim_serial_number>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <strlen@plt>
sub    %ebp,%eax
jle    1148 <right_trim_serial_number+0x28>
movslq %eax,%rsi
add    %rbx,%rsi
mov    %rbx,%rdi
mov    %ebp,%edx
call   1040 <memmove@plt>
movslq %ebp,%rax
movb   $0x0,(%rbx,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @right_trim_serial_number(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %27
12: ; preds = %2
%13 = load i32, i32* %5
%14 = load i32, i32* %4
%15 = sub nsw i32 %13, %14
store i32 %15, i32* %6
%16 = load i8*, i8** %3
%17 = load i8*, i8** %3
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
%21 = load i32, i32* %4
%22 = call i32 @memmove(i8* %16, i8* %20, i32 %21)
%23 = load i8*, i8** %3
%24 = load i32, i32* %4
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 0, i8* %26
br label %27
27: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @right_trim_serial_number(i8* %0, i32 %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp sgt i32 %3, %1
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = sub nsw i32 %3, %1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = tail call i32 @memmove(i8* %0, i8* %8, i32 %1)
%10 = sext i32 %1 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
store i8 0, i8* %11
br label %12
12: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int arm32_read_p15_c1();
int /*<<< orphan*/ arm32_write_p15_c1(int);
void arm32_icache_disable(void) {
  uint32_t value = arm32_read_p15_c1();
  arm32_write_p15_c1(value & ~(1 << 12));
}


x86 assembly (clang, -O0):
<arm32_icache_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <arm32_read_p15_c1@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
and    $0xffffefff,%edi
call   1040 <arm32_write_p15_c1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm32_icache_disable>:
push   %rax
xor    %eax,%eax
call   1030 <arm32_read_p15_c1@plt>
and    $0xffffefff,%eax
mov    %eax,%edi
pop    %rax
jmp    1040 <arm32_write_p15_c1@plt>

LLVM IR (-O0):
define void @arm32_icache_disable() {
%1 = alloca i32
%2 = call i32 (...) @arm32_read_p15_c1()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = and i32 %3, -4097
%5 = call i32 @arm32_write_p15_c1(i32 %4)
ret void
}

LLVM IR (-O2):
define void @arm32_icache_disable() {
%1 = tail call i32 (...) @arm32_read_p15_c1()
%2 = and i32 %1, -4097
%3 = tail call i32 @arm32_write_p15_c1(i32 %2)
ret void
}
void gtk_file_chooser_unselect_uri() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_unselect_uri>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_unselect_uri>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_unselect_uri() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_unselect_uri() {
ret void
}
int get_rtc_hour(void) {
  (*(volatile unsigned int *)(0x7E005040)) |= (1 << 3);
  (*(volatile unsigned int *)(0x7E005040)) = 1;
  char value = (*(volatile unsigned int *)(0x7E005078));
  int hour = ((value >> 4) & 0x3) * 10 + (value & 0xF);
  (*(volatile unsigned int *)(0x7E005040)) = 0;
  return hour;
}


x86 assembly (clang, -O0):
<get_rtc_hour>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7e005040,%eax
mov    (%rax),%ecx
or     $0x8,%ecx
mov    $0x7e005040,%eax
mov    %ecx,(%rax)
mov    $0x7e005040,%eax
movl   $0x1,(%rax)
mov    $0x7e005078,%eax
mov    (%rax),%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sar    $0x4,%eax
and    $0x3,%eax
imul   $0xa,%eax,%eax
movsbl -0x1(%rbp),%ecx
and    $0xf,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0x7e005040,%eax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rtc_hour>:
orl    $0x8,0x7e005040
08
movl   $0x1,0x7e005040
mov    0x7e005078,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
and    $0x3,%ecx
lea    (%rcx,%rcx,4),%ecx
and    $0xf,%eax
lea    (%rax,%rcx,2),%eax
movl   $0x0,0x7e005040
ret

LLVM IR (-O0):
define i32 @get_rtc_hour() {
%1 = alloca i8
%2 = alloca i32
%3 = load volatile i32, i32* inttoptr (i64 2113949760 to i32*)
%4 = or i32 %3, 8
store volatile i32 %4, i32* inttoptr (i64 2113949760 to i32*)
store volatile i32 1, i32* inttoptr (i64 2113949760 to i32*)
%5 = load volatile i32, i32* inttoptr (i64 2113949816 to i32*)
%6 = trunc i32 %5 to i8
store i8 %6, i8* %1
%7 = load i8, i8* %1
%8 = sext i8 %7 to i32
%9 = ashr i32 %8, 4
%10 = and i32 %9, 3
%11 = mul nsw i32 %10, 10
%12 = load i8, i8* %1
%13 = sext i8 %12 to i32
%14 = and i32 %13, 15
%15 = add nsw i32 %11, %14
store i32 %15, i32* %2
store volatile i32 0, i32* inttoptr (i64 2113949760 to i32*)
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @get_rtc_hour() {
%1 = load volatile i32, i32* inttoptr (i64 2113949760 to i32*)
%2 = or i32 %1, 8
store volatile i32 %2, i32* inttoptr (i64 2113949760 to i32*)
store volatile i32 1, i32* inttoptr (i64 2113949760 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 2113949816 to i32*)
%4 = lshr i32 %3, 4
%5 = and i32 %4, 3
%6 = mul nuw nsw i32 %5, 10
%7 = and i32 %3, 15
%8 = add nuw nsw i32 %6, %7
store volatile i32 0, i32* inttoptr (i64 2113949760 to i32*)
ret i32 %8
}
void f3() {
  int a = 3;
  float b = a;
  double c;
  c = b + a;
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtsi2ssl -0x4(%rbp),%xmm1
addss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3() {
%1 = alloca i32
%2 = alloca float
%3 = alloca double
store i32 3, i32* %1
%4 = load i32, i32* %1
%5 = sitofp i32 %4 to float
store float %5, float* %2
%6 = load float, float* %2
%7 = load i32, i32* %1
%8 = sitofp i32 %7 to float
%9 = fadd float %6, %8
%10 = fpext float %9 to double
store double %10, double* %3
ret void
}

LLVM IR (-O2):
define void @f3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __p3dfft_MOD_p3dfft_get_precision(int *);
int p3dfft_get_precision() {
  int prec;
  __p3dfft_MOD_p3dfft_get_precision(&prec);
  return prec;
}


x86 assembly (clang, -O0):
<p3dfft_get_precision>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <__p3dfft_MOD_p3dfft_get_precision@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p3dfft_get_precision>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <__p3dfft_MOD_p3dfft_get_precision@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @p3dfft_get_precision() {
%1 = alloca i32
%2 = call i32 @__p3dfft_MOD_p3dfft_get_precision(i32* %1)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @p3dfft_get_precision() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @__p3dfft_MOD_p3dfft_get_precision(i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}