xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ dostep1();
int /*<<< orphan*/ dostep2();
void function1() {
  static int step = 0;
  switch (step) {
  case 1:
    dostep1();
    step++;
    break;
  case 2:
    dostep2();
    step++;
    break;
  }
}


x86 assembly (clang, -O0):
<function1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2f06(%rip),%eax
mov    %eax,-0x4(%rbp)
sub    $0x1,%eax
je     1150 <function1+0x30>
jmp    113f <function1+0x1f>
mov    -0x4(%rbp),%eax
sub    $0x2,%eax
je     116b <function1+0x4b>
jmp    1181 <function1+0x61>
mov    $0x0,%al
call   1040 <dostep1@plt>
mov    0x2ed7(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2ece(%rip)
jmp    1181 <function1+0x61>
mov    $0x0,%al
call   1030 <dostep2@plt>
mov    0x2ebc(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2eb3(%rip)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function1>:
ret

LLVM IR (-O0):
@function1.step = internal global i32 0
define void @function1() {
%1 = load i32, i32* @function1.step
switch i32 %1, label %10 [
i32 1, label %2
i32 2, label %6
]
2: ; preds = %0
%3 = call i32 (...) @dostep1()
%4 = load i32, i32* @function1.step
%5 = add nsw i32 %4, 1
store i32 %5, i32* @function1.step
br label %10
6: ; preds = %0
%7 = call i32 (...) @dostep2()
%8 = load i32, i32* @function1.step
%9 = add nsw i32 %8, 1
store i32 %9, i32* @function1.step
br label %10
10: ; preds = %0, %6, %2
ret void
}

LLVM IR (-O2):
define void @function1() {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long serial;
};
struct TYPE_4__ {
  TYPE_1__ xclient;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xclient_serial(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xclient.serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xclient_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xclient_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xclient_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xclient_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
void XGetAtomNames() {}


x86 assembly (clang, -O0):
<XGetAtomNames>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetAtomNames>:
ret

LLVM IR (-O0):
define void @XGetAtomNames() {
ret void
}

LLVM IR (-O2):
define void @XGetAtomNames() {
ret void
}
void convert_gyroscope_data(struct ssp_data *data) { return; }


x86 assembly (clang, -O0):
<convert_gyroscope_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_gyroscope_data>:
ret

LLVM IR (-O0):
%struct.ssp_data = type opaque
define void @convert_gyroscope_data(%struct.ssp_data* %0) {
%2 = alloca %struct.ssp_data*
store %struct.ssp_data* %0, %struct.ssp_data** %2
ret void
}

LLVM IR (-O2):
%struct.ssp_data = type opaque
define void @convert_gyroscope_data(%struct.ssp_data* nocapture %0) {
ret void
}
int test_imm_0Euint8_mem(unsigned char *val) {
  return ((*val) & (0x0E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Euint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Euint8_mem>:
testb  $0xe,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Euint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 14
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Euint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 14
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int shift_negative() { return -1 << 1; }


x86 assembly (clang, -O0):
<shift_negative>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift_negative>:
mov    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @shift_negative() {
ret i32 -2
}

LLVM IR (-O2):
define i32 @shift_negative() {
ret i32 -2
}
float clampCharToFloat(unsigned char value) { return ((float)value) / 255.0f; }


x86 assembly (clang, -O0):
<clampCharToFloat>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  0xee6(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clampCharToFloat>:
cvtsi2ss %edi,%xmm0
divss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @clampCharToFloat(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = uitofp i8 %3 to float
%5 = fdiv float %4, 2.550000e+02
ret float %5
}

LLVM IR (-O2):
define float @clampCharToFloat(i8 zeroext %0) {
%2 = uitofp i8 %0 to float
%3 = fdiv float %2, 2.550000e+02
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __wsum;

/* Variables and functions */
int /*<<< orphan*/ csum_partial_copy_generic(void const *, void *, int);
__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len) {
  return csum_partial_copy_generic(src, dst, len);
}


x86 assembly (clang, -O0):
<csum_partial_copy_nocheck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <csum_partial_copy_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<csum_partial_copy_nocheck>:
jmp    1030 <csum_partial_copy_generic@plt>

LLVM IR (-O0):
define i32 @csum_partial_copy_nocheck(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @csum_partial_copy_generic(i8* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @csum_partial_copy_nocheck(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @csum_partial_copy_generic(i8* %0, i8* %1, i32 %2)
ret i32 %4
}
int xmlUCSIsBraillePatterns(int code) {
  return (((code >= 0x2800) && (code <= 0x28FF)));
}


x86 assembly (clang, -O0):
<xmlUCSIsBraillePatterns>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x2800,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsBraillePatterns+0x26>
cmpl   $0x28ff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsBraillePatterns>:
and    $0xffffff00,%edi
xor    %eax,%eax
cmp    $0x2800,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsBraillePatterns(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 10240
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 10495
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsBraillePatterns(i32 %0) {
%2 = and i32 %0, -256
%3 = icmp eq i32 %2, 10240
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int mf_fstrnlen(char *, unsigned int);
int /*<<< orphan*/ strncpy(char *, char *, int);
void cpfstrtocstr(char *cString, char *fString, unsigned lenf) {
  int l;
  l = mf_fstrnlen(fString, lenf);
  strncpy(cString, fString, l);
  cString[l] = '\0';
  return;
}


x86 assembly (clang, -O0):
<cpfstrtocstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <mf_fstrnlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpfstrtocstr>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
mov    %edx,%esi
call   1040 <mf_fstrnlen@plt>
mov    %eax,%ebp
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncpy@plt>
movslq %ebp,%rax
movb   $0x0,(%r14,%rax,1)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @cpfstrtocstr(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @mf_fstrnlen(i8* %8, i32 %9)
store i32 %10, i32* %7
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = load i32, i32* %7
%14 = call i32 @strncpy(i8* %11, i8* %12, i32 %13)
%15 = load i8*, i8** %4
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 0, i8* %18
ret void
}

LLVM IR (-O2):
define void @cpfstrtocstr(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @mf_fstrnlen(i8* %1, i32 %2)
%5 = tail call i32 @strncpy(i8* %0, i8* %1, i32 %4)
%6 = sext i32 %4 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 0, i8* %7
ret void
}
/* Variables and functions */
long shim_enosys(int /*<<< orphan*/, int, unsigned long, void **, int const *,
                 int *, int);
long shim_move_pages(int pid, unsigned long count, void **pages,
                     const int *nodes, int *status, int flags) {
  return shim_enosys(0, pid, count, pages, nodes, status, flags);
}


x86 assembly (clang, -O0):
<shim_move_pages>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    -0x2c(%rbp),%eax
xor    %edi,%edi
mov    %eax,(%rsp)
call   1030 <shim_enosys@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_move_pages>:
push   %rax
mov    %r8,%rax
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    %r9d,(%rsp)
xor    %edi,%edi
mov    %rax,%r9
call   1030 <shim_enosys@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @shim_move_pages(i32 %0, i64 %1, i8** %2, i32* %3, i32* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i64
%9 = alloca i8**
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32
store i32 %0, i32* %7
store i64 %1, i64* %8
store i8** %2, i8*** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i64, i64* %8
%15 = load i8**, i8*** %9
%16 = load i32*, i32** %10
%17 = load i32*, i32** %11
%18 = load i32, i32* %12
%19 = call i64 @shim_enosys(i32 0, i32 %13, i64 %14, i8** %15, i32* %16, i32* %17, i32 %18)
ret i64 %19
}

LLVM IR (-O2):
define i64 @shim_move_pages(i32 %0, i64 %1, i8** %2, i32* %3, i32* %4, i32 %5) {
%7 = tail call i64 @shim_enosys(i32 0, i32 %0, i64 %1, i8** %2, i32* %3, i32* %4, i32 %5)
ret i64 %7
}
void _SPC_READ_DSP(void) {}


x86 assembly (clang, -O0):
<_SPC_READ_DSP>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_SPC_READ_DSP>:
ret

LLVM IR (-O0):
define void @_SPC_READ_DSP() {
ret void
}

LLVM IR (-O2):
define void @_SPC_READ_DSP() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
size_t int64PackSize(const int64_t *data) { return sizeof(*data); }


x86 assembly (clang, -O0):
<int64PackSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int64PackSize>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @int64PackSize(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i64 4
}

LLVM IR (-O2):
define i64 @int64PackSize(i32* nocapture readnone %0) {
ret i64 4
}
int abs_value(int t1, int t2) {
  int diff = t1 - t2;
  return ((diff < 0) ? (-1 * diff) : diff);
}


x86 assembly (clang, -O0):
<abs_value>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    112c <abs_value+0x2c>
imul   $0xffffffff,-0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1132 <abs_value+0x32>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_value>:
sub    %esi,%edi
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs_value(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %5
%13 = mul nsw i32 -1, %12
br label %16
14: ; preds = %2
%15 = load i32, i32* %5
br label %16
16: ; preds = %14, %11
%17 = phi i32 [ %13, %11 ], [ %15, %14 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @abs_value(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
%4 = tail call i32 @llvm.abs.i32(i32 %3, i1 true)
ret i32 %4
}
int __fp_unordered_compare(long double x, long double y) {
  unsigned short retval;
  __asm__ __volatile__("fucom %%st(1);"
                       "fnstsw;"
                       : "=a"(retval)
                       : "t"(x), "u"(y));
  return retval;
}


x86 assembly (clang, -O0):
<__fp_unordered_compare>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fxch   %st(1)
fucom  %st(1)
fnstsw %ax
fstp   %st(0)
fstp   %st(0)
mov    %ax,-0x22(%rbp)
movzwl -0x22(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fp_unordered_compare>:
fldt   0x8(%rsp)
fldt   0x18(%rsp)
fxch   %st(1)
fucom  %st(1)
fnstsw %ax
fstp   %st(0)
fstp   %st(0)
movzwl %ax,%eax
ret

LLVM IR (-O0):
define i32 @__fp_unordered_compare(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca i16
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80, x86_fp80* %4
%8 = call i16 asm sideeffect "fucom %st(1);fnstsw;", "={ax},{st},{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %6, x86_fp80 %7)
store i16 %8, i16* %5
%9 = load i16, i16* %5
%10 = zext i16 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @__fp_unordered_compare(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i16 asm sideeffect "fucom %st(1);fnstsw;", "={ax},{st},{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0, x86_fp80 %1)
%4 = zext i16 %3 to i32
ret i32 %4
}
int CalculateNthTriangularNumber(int num) {
  int triangular_number = 0;
  triangular_number = 0.5 * num * (num + 1);
  return triangular_number;
}


x86 assembly (clang, -O0):
<CalculateNthTriangularNumber>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xee5(%rip),%xmm0
mulsd  %xmm1,%xmm0
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CalculateNthTriangularNumber>:
cvtsi2sd %edi,%xmm0
mulsd  0xef4(%rip),%xmm0
add    $0x1,%edi
cvtsi2sd %edi,%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @CalculateNthTriangularNumber(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to double
%6 = fmul double 5.000000e-01, %5
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
%9 = sitofp i32 %8 to double
%10 = fmul double %6, %9
%11 = fptosi double %10 to i32
store i32 %11, i32* %3
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @CalculateNthTriangularNumber(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fmul double %2, 5.000000e-01
%4 = add nsw i32 %0, 1
%5 = sitofp i32 %4 to double
%6 = fmul double %3, %5
%7 = fptosi double %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xe6() {
  Assert_real((isxdigit(230) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              1155, ("isxdigit should be 0 for 0xe6"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xe6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe6,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x483,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xe6>:
push   %rax
mov    $0xe6,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x483,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xe6\00"
define void @t_isxdigit_0xe6() {
%1 = call i64 @isxdigit(i32 230)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xe6\00"
define void @t_isxdigit_0xe6() {
%1 = tail call i64 @isxdigit(i32 230)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef void *uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void *read_int_dec_or_hex(char *);
int send_req(int, int, void *, int);
int u_reg_write(int fd, char **argv) {
  int addr;
  uint32_t val;
  addr = read_int_dec_or_hex(argv[0]);
  val = read_int_dec_or_hex(argv[1]);
  printf("0x%08x\n", send_req(fd, addr, val, 1));
  return 0;
}


x86 assembly (clang, -O0):
<u_reg_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1050 <read_int_dec_or_hex@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <read_int_dec_or_hex@plt>
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    -0x20(%rbp),%rdx
mov    $0x1,%ecx
call   1040 <send_req@plt>
mov    %eax,%esi
lea    0xe84(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_reg_write>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%r14d
mov    (%rsi),%rdi
call   1050 <read_int_dec_or_hex@plt>
mov    %rax,%rbp
mov    0x8(%rbx),%rdi
call   1050 <read_int_dec_or_hex@plt>
mov    %r14d,%edi
mov    %ebp,%esi
mov    %rax,%rdx
mov    $0x1,%ecx
call   1040 <send_req@plt>
lea    0xe99(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"0x%08x\0A\00"
define i32 @u_reg_write(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
%10 = call i8* @read_int_dec_or_hex(i8* %9)
%11 = ptrtoint i8* %10 to i32
store i32 %11, i32* %5
%12 = load i8**, i8*** %4
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i8* @read_int_dec_or_hex(i8* %14)
store i8* %15, i8** %6
%16 = load i32, i32* %3
%17 = load i32, i32* %5
%18 = load i8*, i8** %6
%19 = call i32 @send_req(i32 %16, i32 %17, i8* %18, i32 1)
%20 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %19)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"0x%08x\0A\00"
define i32 @u_reg_write(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i8* @read_int_dec_or_hex(i8* %3)
%5 = ptrtoint i8* %4 to i64
%6 = trunc i64 %5 to i32
%7 = getelementptr inbounds i8*, i8** %1, i64 1
%8 = load i8*, i8** %7
%9 = tail call i8* @read_int_dec_or_hex(i8* %8)
%10 = tail call i32 @send_req(i32 %0, i32 %6, i8* %9, i32 1)
%11 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main_preinit1(void) {
  printf("main_preinit1"
         "\n");
}


x86 assembly (clang, -O0):
<main_preinit1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_preinit1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"main_preinit1\0A\00"
define void @main_preinit1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"main_preinit1\00"
define void @main_preinit1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ foo();
int main(void) {
  bar();
  foo();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bar@plt>
mov    $0x0,%al
call   1040 <foo@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
call   1040 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @bar()
%2 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @bar()
%2 = tail call i32 (...) @foo()
ret i32 0
}
/* Type definitions */
typedef long time_t;

/* Variables and functions */
long daylight_seconds(long const *);
long solar_noon(long const *);
time_t sun_rise(const time_t *timer) {
  long n;
  time_t t;
  t = solar_noon(timer);
  n = daylight_seconds(timer) / 2L;
  t -= n;
  return t;
}


x86 assembly (clang, -O0):
<sun_rise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <solar_noon@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <daylight_seconds@plt>
mov    $0x2,%ecx
cqto
idiv   %rcx
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sun_rise>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <solar_noon@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <daylight_seconds@plt>
mov    %rax,%rcx
shr    $0x3f,%rcx
add    %rax,%rcx
sar    %rcx
sub    %rcx,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @sun_rise(i64* %0) {
%2 = alloca i64*
%3 = alloca i64
%4 = alloca i64
store i64* %0, i64** %2
%5 = load i64*, i64** %2
%6 = call i64 @solar_noon(i64* %5)
store i64 %6, i64* %4
%7 = load i64*, i64** %2
%8 = call i64 @daylight_seconds(i64* %7)
%9 = sdiv i64 %8, 2
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = sub nsw i64 %11, %10
store i64 %12, i64* %4
%13 = load i64, i64* %4
ret i64 %13
}

LLVM IR (-O2):
define i64 @sun_rise(i64* %0) {
%2 = tail call i64 @solar_noon(i64* %0)
%3 = tail call i64 @daylight_seconds(i64* %0)
%4 = sdiv i64 %3, -2
%5 = add i64 %4, %2
ret i64 %5
}
void swap(int *arr, int i, int j) {
  int s = arr[i];
  arr[i] = arr[j];
  arr[j] = s;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
int execute_timer_settime() { return 0; }


x86 assembly (clang, -O0):
<execute_timer_settime>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_timer_settime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_timer_settime() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_timer_settime() {
ret i32 0
}
unsigned int RGB16(unsigned char red, unsigned char green, unsigned char blue) {
  return (unsigned int)(((red >> 3) << 11) | ((green >> 2) << 5) | (blue >> 3));
}


x86 assembly (clang, -O0):
<RGB16>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x3,%eax
shl    $0xb,%eax
movzbl -0x2(%rbp),%ecx
sar    $0x2,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
movzbl -0x3(%rbp),%ecx
sar    $0x3,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGB16>:
shr    $0x3,%dil
movzbl %dil,%eax
shl    $0xb,%eax
shr    $0x2,%sil
movzbl %sil,%ecx
shl    $0x5,%ecx
or     %eax,%ecx
shr    $0x3,%dl
movzbl %dl,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @RGB16(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = ashr i32 %8, 3
%10 = shl i32 %9, 11
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = ashr i32 %12, 2
%14 = shl i32 %13, 5
%15 = or i32 %10, %14
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = ashr i32 %17, 3
%19 = or i32 %15, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @RGB16(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = lshr i8 %0, 3
%5 = zext i8 %4 to i32
%6 = shl nuw nsw i32 %5, 11
%7 = lshr i8 %1, 2
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 5
%10 = or i32 %9, %6
%11 = lshr i8 %2, 3
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
ret i32 %13
}
int connect(const char *name) {
  asm volatile("movl %0, %%ebx" ::"m"(name) : "%ebx");
  return syscall(2);
}


x86 assembly (clang, -O0):
<connect>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
push   %rax
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%ebx
mov    $0x2,%edi
mov    $0x0,%al
call   1030 <syscall@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<connect>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,0x8(%rsp)
mov    0x8(%rsp),%ebx
mov    $0x2,%edi
xor    %eax,%eax
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @connect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @syscall to i32 (i32, ...)*)(i32 2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @connect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @syscall to i32 (i32, ...)*)(i32 2)
ret i32 %3
}
int foo2() { return 0; }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @foo2() {
ret i32 0
}
/* Variables and functions */
int term_write(char const *, int);
int sink_write_urgent_data(const char *buf, int len) {
  return term_write(buf, len);
}


x86 assembly (clang, -O0):
<sink_write_urgent_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <term_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sink_write_urgent_data>:
jmp    1030 <term_write@plt>

LLVM IR (-O0):
define i32 @sink_write_urgent_data(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @term_write(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @sink_write_urgent_data(i8* %0, i32 %1) {
%3 = tail call i32 @term_write(i8* %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ __asan_region_bounds(void *, void **, size_t *);
int64_t __asan_buffspace(const void *ptr) {
  void *base;
  size_t size;
  if (!__asan_region_bounds((void *)ptr, &base, &size))
    return -1;
  return ((int64_t)size) - (ptr - base);
}


x86 assembly (clang, -O0):
<__asan_buffspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1030 <__asan_region_bounds@plt>
cmp    $0x0,%eax
jne    1142 <__asan_buffspace+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    1159 <__asan_buffspace+0x49>
mov    -0x20(%rbp),%rax
cltq
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rdx
sub    %rdx,%rcx
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__asan_buffspace>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
call   1030 <__asan_region_bounds@plt>
mov    (%rsp),%ecx
sub    %ebx,%ecx
add    0x8(%rsp),%ecx
cmp    $0x1,%eax
sbb    %eax,%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__asan_buffspace(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @__asan_region_bounds(i8* %6, i8** %4, i64* %5)
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %1
store i32 -1, i32* %2
br label %21
10: ; preds = %1
%11 = load i64, i64* %5
%12 = trunc i64 %11 to i32
%13 = sext i32 %12 to i64
%14 = load i8*, i8** %3
%15 = load i8*, i8** %4
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
%19 = sub nsw i64 %13, %18
%20 = trunc i64 %19 to i32
store i32 %20, i32* %2
br label %21
21: ; preds = %10, %9
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @__asan_buffspace(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = bitcast i8** %2 to i8*
%5 = bitcast i64* %3 to i8*
%6 = call i32 @__asan_region_bounds(i8* %0, i8** %2, i64* %3)
%7 = icmp eq i32 %6, 0
%8 = load i64, i64* %3
%9 = load i8*, i8** %2
%10 = ptrtoint i8* %0 to i64
%11 = ptrtoint i8* %9 to i64
%12 = sub i64 %8, %10
%13 = add i64 %12, %11
%14 = trunc i64 %13 to i32
%15 = select i1 %7, i32 -1, i32 %14
ret i32 %15
}
__attribute__((no)) int foo(int x) {
  int c = x;
  if (x > 10)
    c += 2;
  else
    c -= 3;
  return c;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jle    1125 <foo+0x25>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <foo+0x2e>
mov    -0x8(%rbp),%eax
sub    $0x3,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
cmp    $0xb,%edi
setge  %al
lea    (%rax,%rax,4),%eax
add    %edi,%eax
add    $0xfffffffd,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 10
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 2
store i32 %9, i32* %3
br label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 3
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %7
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp sgt i32 %0, 10
%3 = select i1 %2, i32 2, i32 -3
%4 = add nsw i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __FlipImageBytes(void *, void *, int, int, unsigned int);
void FlipImageBytes(void *in, void *out, int width, int height,
                    unsigned int bpp) {
  __FlipImageBytes(in, out, width, height, bpp);
}


x86 assembly (clang, -O0):
<FlipImageBytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
call   1030 <__FlipImageBytes@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlipImageBytes>:
jmp    1030 <__FlipImageBytes@plt>

LLVM IR (-O0):
define void @FlipImageBytes(i8* %0, i8* %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @__FlipImageBytes(i8* %11, i8* %12, i32 %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @FlipImageBytes(i8* %0, i8* %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @__FlipImageBytes(i8* %0, i8* %1, i32 %2, i32 %3, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t psector_Read_AppSearchGranularity(void) {
  uint32_t (*p_psector_Read_AppSearchGranularity)(void);
  p_psector_Read_AppSearchGranularity = (uint32_t(*)(void))0x030052d5U;
  return p_psector_Read_AppSearchGranularity();
}


x86 assembly (clang, -O0):
<psector_Read_AppSearchGranularity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x30052d5,%eax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psector_Read_AppSearchGranularity>:
mov    $0x30052d5,%eax
jmp    *%rax

LLVM IR (-O0):
define i32 @psector_Read_AppSearchGranularity() {
%1 = alloca i32 ()*
store i32 ()* inttoptr (i64 50352853 to i32 ()*), i32 ()** %1
%2 = load i32 ()*, i32 ()** %1
%3 = call i32 %2()
ret i32 %3
}

LLVM IR (-O2):
define i32 @psector_Read_AppSearchGranularity() {
%1 = tail call i32 inttoptr (i64 50352853 to i32 ()*)()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ semInit(int, int);
int /*<<< orphan*/ semPtimeout(int, int);
void semPautounlock(int key, int secs) {
  if (!semPtimeout(key, secs)) {
    printf("DB P-operation did not succeed: perform auto-unlock %d\n", key);
    semInit(1, key);
  }
}


x86 assembly (clang, -O0):
<semPautounlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <semPtimeout@plt>
cmp    $0x0,%eax
jne    116e <semPautounlock+0x3e>
mov    -0x4(%rbp),%esi
lea    0xea4(%rip),%rdi
call   1040 <printf@plt>
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1050 <semInit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semPautounlock>:
push   %rbx
mov    %edi,%ebx
call   1030 <semPtimeout@plt>
test   %eax,%eax
je     113e <semPautounlock+0xe>
pop    %rbx
ret
lea    0xebb(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
mov    $0x1,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1050 <semInit@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"DB P-operation did not succeed: perform auto-unlock %d\0A\00"
define void @semPautounlock(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @semPtimeout(i32 %5, i32 %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %2
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %3
%13 = call i32 @semInit(i32 1, i32 %12)
br label %14
14: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@.str = [56 x i8] c"DB P-operation did not succeed: perform auto-unlock %d\0A\00"
define void @semPautounlock(i32 %0, i32 %1) {
%3 = tail call i32 @semPtimeout(i32 %0, i32 %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), i32 %0)
%7 = tail call i32 @semInit(i32 1, i32 %0)
br label %8
8: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stderr_putchar(char);
int /*<<< orphan*/ stderr_putstr(char *);
int put_error(char *error) {
  stderr_putstr("Error: ");
  stderr_putstr(error);
  stderr_putchar('\n');
  return (0);
}


x86 assembly (clang, -O0):
<put_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <stderr_putstr@plt>
mov    -0x8(%rbp),%rdi
call   1030 <stderr_putstr@plt>
mov    $0xa,%edi
call   1040 <stderr_putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_error>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <stderr_putstr@plt>
mov    %rbx,%rdi
call   1030 <stderr_putstr@plt>
mov    $0xa,%edi
call   1040 <stderr_putchar@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Error: \00"
define i32 @put_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @stderr_putstr(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @stderr_putstr(i8* %4)
%6 = call i32 @stderr_putchar(i8 signext 10)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"Error: \00"
define i32 @put_error(i8* %0) {
%2 = tail call i32 @stderr_putstr(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @stderr_putstr(i8* %0)
%4 = tail call i32 @stderr_putchar(i8 signext 10)
ret i32 0
}
/* Variables and functions */
int occurence(char *, char *);
int /*<<< orphan*/ printf(char *, char *, char *, int);
int main(void) {
  char *chaine = "langage c, langage java, langage php, langage python";
  char *mot = "langage";
  printf("Occurence de '%s' dans '%s' : %d\n", mot, chaine,
         occurence(chaine, mot));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xef4(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <occurence@plt>
mov    -0x28(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    %eax,%ecx
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%r14
lea    0xf03(%rip),%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <occurence@plt>
lea    0xef9(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
mov    %eax,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [53 x i8] c"langage c, langage java, langage php, langage python\00"
@.str.1 = [8 x i8] c"langage\00"
@.str.2 = [34 x i8] c"Occurence de '%s' dans '%s' : %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = load i8*, i8** %2
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = call i32 @occurence(i8* %6, i8* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.2, i64 0, i64 0), i8* %4, i8* %5, i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [53 x i8] c"langage c, langage java, langage php, langage python\00"
@.str.1 = [8 x i8] c"langage\00"
@.str.2 = [34 x i8] c"Occurence de '%s' dans '%s' : %d\0A\00"
define i32 @main() {
%1 = tail call i32 @occurence(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
unsigned short int f94(unsigned short int x, long int y) {
  return (x << ((-y) & (8 * sizeof(unsigned short) - 1))) + (x >> y);
}


x86 assembly (clang, -O0):
<f94>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0xf,%rcx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    -0x10(%rbp),%rcx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f94>:
mov    %esi,%ecx
neg    %cl
and    $0xf,%cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f94(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i64, i64* %4
%8 = sub nsw i64 0, %7
%9 = and i64 %8, 15
%10 = trunc i64 %9 to i32
%11 = shl i32 %6, %10
%12 = load i16, i16* %3
%13 = zext i16 %12 to i32
%14 = load i64, i64* %4
%15 = trunc i64 %14 to i32
%16 = ashr i32 %13, %15
%17 = add nsw i32 %11, %16
%18 = trunc i32 %17 to i16
ret i16 %18
}

LLVM IR (-O2):
define zeroext i16 @f94(i16 zeroext %0, i64 %1) {
%3 = zext i16 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 0, %4
%6 = and i32 %5, 15
%7 = shl nuw nsw i32 %3, %6
%8 = lshr i32 %3, %4
%9 = add nuw nsw i32 %7, %8
%10 = trunc i32 %9 to i16
ret i16 %10
}
int SyncTelToUTC(double newutc) { return 0; }


x86 assembly (clang, -O0):
<SyncTelToUTC>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SyncTelToUTC>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @SyncTelToUTC(double %0) {
%2 = alloca double
store double %0, double* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @SyncTelToUTC(double %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_ivector(int *v, long nl, long nh) { free((void *)(v + nl - 1)); }


x86 assembly (clang, -O0):
<free_ivector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
add    $0xfffffffffffffffc,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_ivector>:
lea    (%rdi,%rsi,4),%rdi
add    $0xfffffffffffffffc,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_ivector(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i32, i32* %7, i64 %8
%10 = getelementptr inbounds i32, i32* %9, i64 -1
%11 = bitcast i32* %10 to i8*
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @free_ivector(i32* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i32, i32* %0, i64 %1
%5 = getelementptr inbounds i32, i32* %4, i64 -1
%6 = bitcast i32* %5 to i8*
%7 = tail call i32 @free(i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_time();
int /*<<< orphan*/ usleep(int);
void *worker(void *arg) {
  long i = 0;
  for (i = 0; i < 1000; i++) {
    get_time();
    usleep(1);
  }
}


x86 assembly (clang, -O0):
<worker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x3e8,-0x18(%rbp)
jge    116c <worker+0x4c>
mov    $0x0,%al
call   1030 <get_time@plt>
mov    $0x1,%edi
call   1040 <usleep@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113c <worker+0x1c>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<worker>:
push   %rbx
mov    $0x3e8,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <get_time@plt>
mov    $0x1,%edi
call   1040 <usleep@plt>
add    $0xffffffffffffffff,%rbx
jne    1130 <worker+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i8* @worker(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 0, i64* %4
store i64 0, i64* %4
br label %5
5: ; preds = %11, %1
%6 = load i64, i64* %4
%7 = icmp slt i64 %6, 1000
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = call i32 (...) @get_time()
%10 = call i32 @usleep(i32 1)
br label %11
11: ; preds = %8
%12 = load i64, i64* %4
%13 = add nsw i64 %12, 1
store i64 %13, i64* %4
br label %5
14: ; preds = %5
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define noalias i8* @worker(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i64 [ 0, %1 ], [ %6, %2 ]
%4 = tail call i32 (...) @get_time()
%5 = tail call i32 @usleep(i32 1)
%6 = add nuw nsw i64 %3, 1
%7 = icmp eq i64 %6, 1000
br i1 %7, label %8, label %2
8: ; preds = %2
ret i8* undef
}
void blk_mq_debugfs_register_sched(struct request_queue *q) {}


x86 assembly (clang, -O0):
<blk_mq_debugfs_register_sched>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_mq_debugfs_register_sched>:
ret

LLVM IR (-O0):
%struct.request_queue = type opaque
define void @blk_mq_debugfs_register_sched(%struct.request_queue* %0) {
%2 = alloca %struct.request_queue*
store %struct.request_queue* %0, %struct.request_queue** %2
ret void
}

LLVM IR (-O2):
%struct.request_queue = type opaque
define void @blk_mq_debugfs_register_sched(%struct.request_queue* nocapture %0) {
ret void
}