xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void GlobalErrV(const char *fmt, va_list pArgs) {
  vfprintf(stderr, fmt, pArgs);
}


x86 assembly (clang, -O0):
<GlobalErrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <vfprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GlobalErrV>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <vfprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @GlobalErrV(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @GlobalErrV(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void grpcsharp_server_start() {
  fprintf(stderr, "Should never reach here");
  abort();
}


x86 assembly (clang, -O0):
<grpcsharp_server_start>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<grpcsharp_server_start>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_server_start() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_server_start() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int checkint(uint64_t iy) {
  int e = iy >> 52 & 0x7ff;
  if (e < 0x3ff)
    return 0;
  if (e > 0x3ff + 52)
    return 2;
  if (iy & ((1ULL << (0x3ff + 52 - e)) - 1))
    return 0;
  if (iy & (1ULL << (0x3ff + 52 - e)))
    return 1;
  return 2;
}


x86 assembly (clang, -O0):
<checkint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x34,%ecx
sar    %cl,%eax
and    $0x7ff,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x3ff,-0xc(%rbp)
jge    1132 <checkint+0x32>
movl   $0x0,-0x4(%rbp)
jmp    11ba <checkint+0xba>
cmpl   $0x433,-0xc(%rbp)
jle    114b <checkint+0x4b>
movl   $0x2,-0x4(%rbp)
jmp    11ba <checkint+0xba>
movslq -0x8(%rbp),%rax
mov    $0x433,%ecx
sub    -0xc(%rbp),%ecx
mov    %ecx,%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
sub    $0x1,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     1181 <checkint+0x81>
movl   $0x0,-0x4(%rbp)
jmp    11ba <checkint+0xba>
movslq -0x8(%rbp),%rax
mov    $0x433,%ecx
sub    -0xc(%rbp),%ecx
mov    %ecx,%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     11b3 <checkint+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11ba <checkint+0xba>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkint>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @checkint(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = ashr i32 %5, 52
%7 = and i32 %6, 2047
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 1023
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %37
11: ; preds = %1
%12 = load i32, i32* %4
%13 = icmp sgt i32 %12, 1075
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 2, i32* %2
br label %37
15: ; preds = %11
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = load i32, i32* %4
%19 = sub nsw i32 1075, %18
%20 = zext i32 %19 to i64
%21 = shl i64 1, %20
%22 = sub i64 %21, 1
%23 = and i64 %17, %22
%24 = icmp ne i64 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %15
store i32 0, i32* %2
br label %37
26: ; preds = %15
%27 = load i32, i32* %3
%28 = sext i32 %27 to i64
%29 = load i32, i32* %4
%30 = sub nsw i32 1075, %29
%31 = zext i32 %30 to i64
%32 = shl i64 1, %31
%33 = and i64 %28, %32
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %36
35: ; preds = %26
store i32 1, i32* %2
br label %37
36: ; preds = %26
store i32 2, i32* %2
br label %37
37: ; preds = %36, %35, %25, %14, %10
%38 = load i32, i32* %2
ret i32 %38
}

LLVM IR (-O2):
define i32 @checkint(i32 %0) {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ check_vect();
int main1(int, int *);
int main(void) {
  int m = 8;
  check_vect();
  return main1(m, &m);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x8,-0x8(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
mov    -0x8(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1040 <main1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x8,0x4(%rsp)
xor    %eax,%eax
call   1030 <check_vect@plt>
lea    0x4(%rsp),%rsi
mov    $0x8,%edi
call   1040 <main1@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 8, i32* %2
%3 = call i32 (...) @check_vect()
%4 = load i32, i32* %2
%5 = call i32 @main1(i32 %4, i32* %2)
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 8, i32* %1
%3 = tail call i32 (...) @check_vect()
%4 = call i32 @main1(i32 8, i32* %1)
ret i32 %4
}
/* Variables and functions */
double get_time();
int /*<<< orphan*/ init_data(float **, int);
scalar_t__ malloc(int);
int /*<<< orphan*/ pencil_sscal_n(int, double, int, float **);
int main() {
  double start_time, end_time;
  float(*A)[1024 * 1024 * 10][1] =
      (float(*)[1024 * 1024 * 10][1]) malloc(1024 * 1024 * 10 * sizeof(float));
  init_data(*A, 1024 * 1024 * 10);
  start_time = get_time();
  pencil_sscal_n(1024 * 1024 * 10, 10.0, 1, *A);
  end_time = get_time();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2800000,%edi
call   1060 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    $0xa00000,%esi
call   1030 <init_data@plt>
mov    $0x0,%al
call   1040 <get_time@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x20(%rbp),%rdx
mov    $0xa00000,%edi
movsd  0xe78(%rip),%xmm0
mov    $0x1,%esi
call   1050 <pencil_sscal_n@plt>
mov    $0x0,%al
call   1040 <get_time@plt>
movsd  %xmm0,-0x18(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x2800000,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0xa00000,%esi
call   1030 <init_data@plt>
xor    %eax,%eax
call   1040 <get_time@plt>
movsd  0xe96(%rip),%xmm0
mov    $0xa00000,%edi
mov    $0x1,%esi
mov    %rbx,%rdx
call   1050 <pencil_sscal_n@plt>
xor    %eax,%eax
call   1040 <get_time@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca [10485760 x [1 x float]]*
store i32 0, i32* %1
%5 = call i64 @malloc(i32 41943040)
%6 = inttoptr i64 %5 to [10485760 x [1 x float]]*
store [10485760 x [1 x float]]* %6, [10485760 x [1 x float]]** %4
%7 = load [10485760 x [1 x float]]*, [10485760 x [1 x float]]** %4
%8 = getelementptr inbounds [10485760 x [1 x float]], [10485760 x [1 x float]]* %7, i64 0, i64 0
%9 = bitcast [1 x float]* %8 to float**
%10 = call i32 @init_data(float** %9, i32 10485760)
%11 = call double (...) @get_time()
store double %11, double* %2
%12 = load [10485760 x [1 x float]]*, [10485760 x [1 x float]]** %4
%13 = getelementptr inbounds [10485760 x [1 x float]], [10485760 x [1 x float]]* %12, i64 0, i64 0
%14 = bitcast [1 x float]* %13 to float**
%15 = call i32 @pencil_sscal_n(i32 10485760, double 1.000000e+01, i32 1, float** %14)
%16 = call double (...) @get_time()
store double %16, double* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @malloc(i32 41943040)
%2 = inttoptr i64 %1 to float**
%3 = tail call i32 @init_data(float** %2, i32 10485760)
%4 = tail call double (...) @get_time()
%5 = tail call i32 @pencil_sscal_n(i32 10485760, double 1.000000e+01, i32 1, float** %2)
%6 = tail call double (...) @get_time()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
scalar_t__ strlen(char *);
void cmdline_parser_print_version(void) {
  printf("%s %s\n", (strlen("Hadoop-GIS") ? "Hadoop-GIS" : "Hadoop-GIS"),
         "0.01");
}


x86 assembly (clang, -O0):
<cmdline_parser_print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xedc(%rip),%rdi
call   1030 <strlen@plt>
lea    0xed0(%rip),%rsi
cmp    $0x0,%rax
cmovne %rsi,%rsi
lea    0xeba(%rip),%rdi
lea    0xec5(%rip),%rdx
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdline_parser_print_version>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
lea    0xeed(%rip),%rdx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [11 x i8] c"Hadoop-GIS\00"
@.str.2 = [5 x i8] c"0.01\00"
define void @cmdline_parser_print_version() {
%1 = call i64 @strlen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i64
%4 = select i1 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0)
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [11 x i8] c"Hadoop-GIS\00"
@.str.2 = [5 x i8] c"0.01\00"
define void @cmdline_parser_print_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int test_number();
int test_predef();
int test_variant();
int test_version();
int pgheader_test() {
  int ret;
  ret = 1;
  ret &= test_version();
  ret &= test_variant();
  ret &= test_predef();
  ret &= test_number();
  if (ret) {
    return 0;
  } else {
    return 7;
  }
}


x86 assembly (clang, -O0):
<pgheader_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x8(%rbp)
mov    $0x0,%al
call   1040 <test_version@plt>
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1060 <test_variant@plt>
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <test_predef@plt>
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <test_number@plt>
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1199 <pgheader_test+0x59>
movl   $0x0,-0x4(%rbp)
jmp    11a0 <pgheader_test+0x60>
movl   $0x7,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgheader_test>:
push   %rbp
push   %r14
push   %rbx
xor    %r14d,%r14d
xor    %eax,%eax
call   1040 <test_version@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1060 <test_variant@plt>
mov    %eax,%ebp
and    %ebx,%ebp
xor    %eax,%eax
call   1030 <test_predef@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <test_number@plt>
and    %ebx,%eax
and    %ebp,%eax
test   $0x1,%al
mov    $0x7,%eax
cmovne %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @pgheader_test() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %2
%3 = call i32 (...) @test_version()
%4 = load i32, i32* %2
%5 = and i32 %4, %3
store i32 %5, i32* %2
%6 = call i32 (...) @test_variant()
%7 = load i32, i32* %2
%8 = and i32 %7, %6
store i32 %8, i32* %2
%9 = call i32 (...) @test_predef()
%10 = load i32, i32* %2
%11 = and i32 %10, %9
store i32 %11, i32* %2
%12 = call i32 (...) @test_number()
%13 = load i32, i32* %2
%14 = and i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %0
store i32 0, i32* %1
br label %19
18: ; preds = %0
store i32 7, i32* %1
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
define i32 @pgheader_test() {
%1 = tail call i32 (...) @test_version()
%2 = and i32 %1, 1
%3 = tail call i32 (...) @test_variant()
%4 = and i32 %2, %3
%5 = tail call i32 (...) @test_predef()
%6 = and i32 %4, %5
%7 = tail call i32 (...) @test_number()
%8 = and i32 %6, %7
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 7, i32 0
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int binary_se(char *s1, char *s2) { return !strcmp(s1, s2); }


x86 assembly (clang, -O0):
<binary_se>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<binary_se>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @binary_se(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @binary_se(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int fun() {
  puts("this is fun");
  return 0;
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"this is fun\00"
define i32 @fun() {
%1 = call i32 @puts(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"this is fun\00"
define i32 @fun() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ img_register_jpeg();
int /*<<< orphan*/ img_register_png();
int /*<<< orphan*/ img_register_ppm();
int /*<<< orphan*/ img_register_rgbe();
void img_modules_init(void) {
  img_register_jpeg();
  img_register_png();
  img_register_ppm();
  img_register_rgbe();
}


x86 assembly (clang, -O0):
<img_modules_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <img_register_jpeg@plt>
mov    $0x0,%al
call   1030 <img_register_png@plt>
mov    $0x0,%al
call   1060 <img_register_ppm@plt>
mov    $0x0,%al
call   1050 <img_register_rgbe@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<img_modules_init>:
push   %rax
xor    %eax,%eax
call   1040 <img_register_jpeg@plt>
xor    %eax,%eax
call   1030 <img_register_png@plt>
xor    %eax,%eax
call   1060 <img_register_ppm@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <img_register_rgbe@plt>

LLVM IR (-O0):
define void @img_modules_init() {
%1 = call i32 (...) @img_register_jpeg()
%2 = call i32 (...) @img_register_png()
%3 = call i32 (...) @img_register_ppm()
%4 = call i32 (...) @img_register_rgbe()
ret void
}

LLVM IR (-O2):
define void @img_modules_init() {
%1 = tail call i32 (...) @img_register_jpeg()
%2 = tail call i32 (...) @img_register_png()
%3 = tail call i32 (...) @img_register_ppm()
%4 = tail call i32 (...) @img_register_rgbe()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TEST_create_tree();
int main(void) {
  TEST_create_tree();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <TEST_create_tree@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <TEST_create_tree@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @TEST_create_tree()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @TEST_create_tree()
ret i32 0
}
/* Variables and functions */
double exp(double const);
char f_exp(double *a, const double *b) {
  *a = exp(*b);
  return (0);
}


x86 assembly (clang, -O0):
<f_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <exp@plt>
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
xor    %eax,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_exp>:
push   %rbx
mov    %rdi,%rbx
movsd  (%rsi),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @f_exp(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %4
%6 = load double, double* %5
%7 = call double @exp(double %6)
%8 = load double*, double** %3
store double %7, double* %8
ret i8 0
}

LLVM IR (-O2):
define signext i8 @f_exp(double* nocapture writeonly %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = tail call double @exp(double %3)
store double %4, double* %0
ret i8 0
}
void max_heapsort(char *array, unsigned int idx) { return; }


x86 assembly (clang, -O0):
<max_heapsort>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_heapsort>:
ret

LLVM IR (-O0):
define void @max_heapsort(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @max_heapsort(i8* nocapture %0, i32 %1) {
ret void
}
void RTReqQueueProcess(void) {}


x86 assembly (clang, -O0):
<RTReqQueueProcess>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTReqQueueProcess>:
ret

LLVM IR (-O0):
define void @RTReqQueueProcess() {
ret void
}

LLVM IR (-O2):
define void @RTReqQueueProcess() {
ret void
}
void GetColumnOfPosition(long p_position, long *r_column) {
  *r_column = (p_position % 1000) + 1;
}


x86 assembly (clang, -O0):
<GetColumnOfPosition>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
add    $0x1,%rdx
mov    -0x10(%rbp),%rax
mov    %rdx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetColumnOfPosition>:
movabs $0x20c49ba5e353f7cf,%rcx
9b c4 20
mov    %rdi,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x7,%rdx
add    %rax,%rdx
imul   $0x3e8,%rdx,%rax
neg    %rax
add    %rdi,%rax
add    $0x1,%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @GetColumnOfPosition(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
%5 = load i64, i64* %3
%6 = srem i64 %5, 1000
%7 = add nsw i64 %6, 1
%8 = load i64*, i64** %4
store i64 %7, i64* %8
ret void
}

LLVM IR (-O2):
define void @GetColumnOfPosition(i64 %0, i64* nocapture writeonly %1) {
%3 = srem i64 %0, 1000
%4 = add nsw i64 %3, 1
store i64 %4, i64* %1
ret void
}
void foo179(int p) {}


x86 assembly (clang, -O0):
<foo179>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo179>:
ret

LLVM IR (-O0):
define void @foo179(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo179(i32 %0) {
ret void
}
int imx_ssi1_ac97_prepare(struct snd_pcm_substream *substream) {}


x86 assembly (clang, -O0):
<imx_ssi1_ac97_prepare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imx_ssi1_ac97_prepare>:
ret

LLVM IR (-O0):
%struct.snd_pcm_substream = type opaque
define i32 @imx_ssi1_ac97_prepare(%struct.snd_pcm_substream* %0) {
%2 = alloca i32
%3 = alloca %struct.snd_pcm_substream*
store %struct.snd_pcm_substream* %0, %struct.snd_pcm_substream** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
%struct.snd_pcm_substream = type opaque
define i32 @imx_ssi1_ac97_prepare(%struct.snd_pcm_substream* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void CmdQuit(int argc, char *argv[]) { exit(0); }


x86 assembly (clang, -O0):
<CmdQuit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<CmdQuit>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @CmdQuit(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @CmdQuit(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
void kol_paint_line(unsigned x1, unsigned y1, unsigned x2, unsigned y2,
                    unsigned c) {
  asm volatile("int $0x40" ::"a"(38), "b"(x1 * 65536 + x2),
               "c"(y1 * 65536 + y2), "d"(c));
}


x86 assembly (clang, -O0):
<kol_paint_line>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0xc(%rbp),%ebx
shl    $0x10,%ebx
add    -0x14(%rbp),%ebx
mov    -0x10(%rbp),%ecx
shl    $0x10,%ecx
add    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%edx
mov    $0x26,%eax
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_paint_line>:
push   %rbx
shl    $0x10,%edi
lea    (%rdi,%rdx,1),%ebx
shl    $0x10,%esi
add    %esi,%ecx
mov    $0x26,%eax
mov    %r8d,%edx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_paint_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = mul i32 %11, 65536
%13 = load i32, i32* %8
%14 = add i32 %12, %13
%15 = load i32, i32* %7
%16 = mul i32 %15, 65536
%17 = load i32, i32* %9
%18 = add i32 %16, %17
%19 = load i32, i32* %10
ret void
}

LLVM IR (-O2):
define void @kol_paint_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl i32 %0, 16
%7 = add i32 %6, %2
%8 = shl i32 %1, 16
%9 = add i32 %8, %3
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32 38, i32 %7, i32 %9, i32 %4)
ret void
}
/* Variables and functions */
char **CSPLIT_splitCookie(const char *setCookieHeader) { return NULL; }


x86 assembly (clang, -O0):
<CSPLIT_splitCookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CSPLIT_splitCookie>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8** @CSPLIT_splitCookie(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8** null
}

LLVM IR (-O2):
define noalias i8** @CSPLIT_splitCookie(i8* nocapture readnone %0) {
ret i8** null
}
/* Type definitions */
struct user_regs_struct {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_SETREGS;
int /*<<< orphan*/ ptrace(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/ *, struct user_regs_struct *);
void write_registers(pid_t pid, struct user_regs_struct *regs) {
  ptrace(PTRACE_SETREGS, pid, NULL, regs);
}


x86 assembly (clang, -O0):
<write_registers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edx
call   1030 <ptrace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_registers>:
mov    %rsi,%rcx
mov    %edi,%esi
mov    0x2ecc(%rip),%rax
mov    (%rax),%edi
xor    %edx,%edx
jmp    1030 <ptrace@plt>

LLVM IR (-O0):
%struct.user_regs_struct = type { i32 }
@PTRACE_SETREGS = global i32 0
define void @write_registers(i32 %0, %struct.user_regs_struct* %1) {
%3 = alloca i32
%4 = alloca %struct.user_regs_struct*
store i32 %0, i32* %3
store %struct.user_regs_struct* %1, %struct.user_regs_struct** %4
%5 = load i32, i32* @PTRACE_SETREGS
%6 = load i32, i32* %3
%7 = load %struct.user_regs_struct*, %struct.user_regs_struct** %4
%8 = call i32 @ptrace(i32 %5, i32 %6, i32* null, %struct.user_regs_struct* %7)
ret void
}

LLVM IR (-O2):
%struct.user_regs_struct = type { i32 }
@PTRACE_SETREGS = global i32 0
define void @write_registers(i32 %0, %struct.user_regs_struct* %1) {
%3 = load i32, i32* @PTRACE_SETREGS
%4 = tail call i32 @ptrace(i32 %3, i32 %0, i32* null, %struct.user_regs_struct* %1)
ret void
}
void UI_method_get_opener(void) {}


x86 assembly (clang, -O0):
<UI_method_get_opener>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_method_get_opener>:
ret

LLVM IR (-O0):
define void @UI_method_get_opener() {
ret void
}

LLVM IR (-O2):
define void @UI_method_get_opener() {
ret void
}
int fn4(int a, int b) {
  int tem1 = b + a;
  int tem2 = b & a;
  return tem1 - tem2;
}


x86 assembly (clang, -O0):
<fn4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn4>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = and i32 %10, %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = sub nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @fn4(i32 %0, i32 %1) {
%3 = or i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void T2DLP_errormsg() {
  printf("\n\nERROR.\n");
  printf("It appears as though a DLP-specific function was called.\n");
  printf("This software was compiled without DLP-specific libraries.\n");
  printf("Try running the software in DLP simulation mode with the -s "
         "switch.\n\n");
}


x86 assembly (clang, -O0):
<T2DLP_errormsg>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
lea    0xf11(%rip),%rdi
call   1030 <printf@plt>
lea    0xf41(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<T2DLP_errormsg>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xf12(%rip),%rdi
call   1030 <puts@plt>
lea    0xf41(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\0A\0AERROR.\0A\00"
@.str.1 = [58 x i8] c"It appears as though a DLP-specific function was called.\0A\00"
@.str.2 = [60 x i8] c"This software was compiled without DLP-specific libraries.\0A\00"
@.str.3 = [70 x i8] c"Try running the software in DLP simulation mode with the -s switch.\0A\0A\00"
define void @T2DLP_errormsg() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"\0A\0AERROR.\00"
@str.4 = [57 x i8] c"It appears as though a DLP-specific function was called.\00"
@str.5 = [59 x i8] c"This software was compiled without DLP-specific libraries.\00"
@str.6 = [69 x i8] c"Try running the software in DLP simulation mode with the -s switch.\0A\00"
define void @T2DLP_errormsg() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([57 x i8], [57 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([69 x i8], [69 x i8]* @str.6, i64 0, i64 0))
ret void
}
void outw(unsigned short port, unsigned short value) {
  asm volatile("outw %%ax, %%dx" ::"a"(value), "d"(port));
}


x86 assembly (clang, -O0):
<outw>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
mov    -0x2(%rbp),%dx
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw>:
mov    %esi,%eax
mov    %edi,%edx
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @outw(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @outw(i16 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "outw %ax, %dx", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %1, i16 %0)
ret void
}
void dbg_status(void) {}


x86 assembly (clang, -O0):
<dbg_status>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_status>:
ret

LLVM IR (-O0):
define void @dbg_status() {
ret void
}

LLVM IR (-O2):
define void @dbg_status() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ test_umask(int);
int main(void) {
  test_umask(0);
  test_umask(06);
  test_umask(026);
  test_umask(0126);
  test_umask(07777);
  test_umask(0107777);
  test_umask(-1);
  puts("+++ exited with 0 +++");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <test_umask@plt>
mov    $0x6,%edi
call   1040 <test_umask@plt>
mov    $0x16,%edi
call   1040 <test_umask@plt>
mov    $0x56,%edi
call   1040 <test_umask@plt>
mov    $0xfff,%edi
call   1040 <test_umask@plt>
mov    $0x8fff,%edi
call   1040 <test_umask@plt>
mov    $0xffffffff,%edi
call   1040 <test_umask@plt>
lea    0xe87(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <test_umask@plt>
mov    $0x6,%edi
call   1040 <test_umask@plt>
mov    $0x16,%edi
call   1040 <test_umask@plt>
mov    $0x56,%edi
call   1040 <test_umask@plt>
mov    $0xfff,%edi
call   1040 <test_umask@plt>
mov    $0x8fff,%edi
call   1040 <test_umask@plt>
mov    $0xffffffff,%edi
call   1040 <test_umask@plt>
lea    0xe95(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"+++ exited with 0 +++\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test_umask(i32 0)
%3 = call i32 @test_umask(i32 6)
%4 = call i32 @test_umask(i32 22)
%5 = call i32 @test_umask(i32 86)
%6 = call i32 @test_umask(i32 4095)
%7 = call i32 @test_umask(i32 36863)
%8 = call i32 @test_umask(i32 -1)
%9 = call i32 @puts(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"+++ exited with 0 +++\00"
define i32 @main() {
%1 = tail call i32 @test_umask(i32 0)
%2 = tail call i32 @test_umask(i32 6)
%3 = tail call i32 @test_umask(i32 22)
%4 = tail call i32 @test_umask(i32 86)
%5 = tail call i32 @test_umask(i32 4095)
%6 = tail call i32 @test_umask(i32 36863)
%7 = tail call i32 @test_umask(i32 -1)
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int prestupnyRok(int y) {
  if (y < 1600)
    return 0;
  if (y % 4 == 0 && y % 4000 != 0 && (y % 100 != 0 || y % 400 == 0))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<prestupnyRok>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x640,-0x8(%rbp)
jge    1120 <prestupnyRok+0x20>
movl   $0x0,-0x4(%rbp)
jmp    1183 <prestupnyRok+0x83>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    117c <prestupnyRok+0x7c>
mov    -0x8(%rbp),%eax
mov    $0xfa0,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     117c <prestupnyRok+0x7c>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1170 <prestupnyRok+0x70>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    117c <prestupnyRok+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    1183 <prestupnyRok+0x83>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prestupnyRok>:
xor    %eax,%eax
cmp    $0x640,%edi
jl     1156 <prestupnyRok+0x56>
test   $0x3,%dil
jne    1154 <prestupnyRok+0x54>
mov    %edi,%ecx
imul   $0x10624dd3,%rcx,%rax
shr    $0x28,%rax
imul   $0xfa0,%eax,%eax
mov    %edi,%edx
sub    %eax,%edx
je     1154 <prestupnyRok+0x54>
imul   $0xc28f5c29,%edi,%edx
ror    $0x2,%edx
mov    $0x1,%eax
cmp    $0x28f5c28,%edx
ja     1156 <prestupnyRok+0x56>
imul   $0x51eb851f,%rcx,%rcx
shr    $0x27,%rcx
imul   $0x190,%ecx,%ecx
sub    %ecx,%edi
je     1156 <prestupnyRok+0x56>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @prestupnyRok(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 1600
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %25
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 4
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %7
%12 = load i32, i32* %3
%13 = srem i32 %12, 4000
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %11
%16 = load i32, i32* %3
%17 = srem i32 %16, 100
%18 = icmp ne i32 %17, 0
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = load i32, i32* %3
%21 = srem i32 %20, 400
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %19, %15
store i32 1, i32* %2
br label %25
24: ; preds = %19, %11, %7
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23, %6
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @prestupnyRok(i32 %0) {
%2 = icmp slt i32 %0, 1600
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = and i32 %0, 3
%5 = icmp ne i32 %4, 0
%6 = urem i32 %0, 4000
%7 = icmp eq i32 %6, 0
%8 = or i1 %5, %7
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = urem i32 %0, 100
%11 = icmp ne i32 %10, 0
%12 = urem i32 %0, 400
%13 = icmp eq i32 %12, 0
%14 = or i1 %11, %13
br i1 %14, label %16, label %15
15: ; preds = %9, %3
br label %16
16: ; preds = %9, %1, %15
%17 = phi i32 [ 0, %15 ], [ 0, %1 ], [ 1, %9 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ my_malloc(size_t, char *);
int *my_malloci(size_t n, char *what) {
  return (int *)my_malloc((n ? n : 1) * sizeof(int), what);
}


x86 assembly (clang, -O0):
<my_malloci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <my_malloci+0x28>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1146 <my_malloci+0x36>
mov    $0x1,%eax
mov    %rax,-0x18(%rbp)
jmp    1146 <my_malloci+0x36>
mov    -0x18(%rbp),%rdi
shl    $0x2,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <my_malloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_malloci>:
lea    0x0(,%rdi,4),%rax
test   %rdi,%rdi
mov    $0x4,%edi
cmovne %rax,%rdi
jmp    1030 <my_malloc@plt>

LLVM IR (-O0):
define i32* @my_malloci(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i64, i64* %3
br label %10
9: ; preds = %2
br label %10
10: ; preds = %9, %7
%11 = phi i64 [ %8, %7 ], [ 1, %9 ]
%12 = mul i64 %11, 4
%13 = load i8*, i8** %4
%14 = call i64 @my_malloc(i64 %12, i8* %13)
%15 = inttoptr i64 %14 to i32*
ret i32* %15
}

LLVM IR (-O2):
define i32* @my_malloci(i64 %0, i8* %1) {
%3 = icmp eq i64 %0, 0
%4 = shl i64 %0, 2
%5 = select i1 %3, i64 4, i64 %4
%6 = tail call i64 @my_malloc(i64 %5, i8* %1)
%7 = inttoptr i64 %6 to i32*
ret i32* %7
}
/* Variables and functions */
int /*<<< orphan*/ crash1();
int do_action(char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(int argc, char **argv) {
  fprintf(stderr, "crasher: built at "
                  "11:56:55"
                  "!@\n");
  if (argc > 1) {
    return do_action(argv[1]);
  } else {
    crash1();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
lea    0xeaa(%rip),%rsi
call   1040 <fprintf@plt>
cmpl   $0x1,-0x8(%rbp)
jle    117a <main+0x4a>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <do_action@plt>
mov    %eax,-0x4(%rbp)
jmp    1188 <main+0x58>
mov    $0x0,%al
call   1050 <crash1@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
lea    0xeb8(%rip),%rsi
call   1040 <fprintf@plt>
cmp    $0x2,%ebp
jl     1161 <main+0x31>
mov    0x8(%rbx),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <do_action@plt>
xor    %eax,%eax
call   1050 <crash1@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [30 x i8] c"crasher: built at 11:56:55!@\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* %4
%9 = icmp sgt i32 %8, 1
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = call i32 @do_action(i8* %13)
store i32 %14, i32* %3
br label %18
15: ; preds = %2
%16 = call i32 (...) @crash1()
br label %17
17: ; preds = %15
store i32 0, i32* %3
br label %18
18: ; preds = %17, %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [30 x i8] c"crasher: built at 11:56:55!@\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%5 = icmp sgt i32 %0, 1
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = getelementptr inbounds i8*, i8** %1, i64 1
%8 = load i8*, i8** %7
%9 = tail call i32 @do_action(i8* %8)
br label %12
10: ; preds = %2
%11 = tail call i32 (...) @crash1()
br label %12
12: ; preds = %10, %6
%13 = phi i32 [ %9, %6 ], [ 0, %10 ]
ret i32 %13
}
/* Type definitions */
struct RNApaln_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_args(struct RNApaln_args_info *);
int /*<<< orphan*/ clear_given(struct RNApaln_args_info *);
int /*<<< orphan*/ init_args_info(struct RNApaln_args_info *);
void RNApaln_cmdline_parser_init(struct RNApaln_args_info *args_info) {
  clear_given(args_info);
  clear_args(args_info);
  init_args_info(args_info);
}


x86 assembly (clang, -O0):
<RNApaln_cmdline_parser_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <clear_given@plt>
mov    -0x8(%rbp),%rdi
call   1030 <clear_args@plt>
mov    -0x8(%rbp),%rdi
call   1050 <init_args_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNApaln_cmdline_parser_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <clear_given@plt>
mov    %rbx,%rdi
call   1030 <clear_args@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <init_args_info@plt>

LLVM IR (-O0):
%struct.RNApaln_args_info = type { i32 }
define void @RNApaln_cmdline_parser_init(%struct.RNApaln_args_info* %0) {
%2 = alloca %struct.RNApaln_args_info*
store %struct.RNApaln_args_info* %0, %struct.RNApaln_args_info** %2
%3 = load %struct.RNApaln_args_info*, %struct.RNApaln_args_info** %2
%4 = call i32 @clear_given(%struct.RNApaln_args_info* %3)
%5 = load %struct.RNApaln_args_info*, %struct.RNApaln_args_info** %2
%6 = call i32 @clear_args(%struct.RNApaln_args_info* %5)
%7 = load %struct.RNApaln_args_info*, %struct.RNApaln_args_info** %2
%8 = call i32 @init_args_info(%struct.RNApaln_args_info* %7)
ret void
}

LLVM IR (-O2):
%struct.RNApaln_args_info = type { i32 }
define void @RNApaln_cmdline_parser_init(%struct.RNApaln_args_info* %0) {
%2 = tail call i32 @clear_given(%struct.RNApaln_args_info* %0)
%3 = tail call i32 @clear_args(%struct.RNApaln_args_info* %0)
%4 = tail call i32 @init_args_info(%struct.RNApaln_args_info* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int detail;
};
typedef TYPE_1__ XFocusChangeEvent;

/* Variables and functions */
void set_XFocusChangeEvent_detail(void *_p, int _v) {
  ((XFocusChangeEvent *)_p)->detail = (int)_v;
}


x86 assembly (clang, -O0):
<set_XFocusChangeEvent_detail>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XFocusChangeEvent_detail>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XFocusChangeEvent_detail(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XFocusChangeEvent_detail(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void swift_storeEnumTagSinglePayloadGeneric(void) {}


x86 assembly (clang, -O0):
<swift_storeEnumTagSinglePayloadGeneric>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swift_storeEnumTagSinglePayloadGeneric>:
ret

LLVM IR (-O0):
define void @swift_storeEnumTagSinglePayloadGeneric() {
ret void
}

LLVM IR (-O2):
define void @swift_storeEnumTagSinglePayloadGeneric() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void Usage(char prog_name[]) {
  fprintf(stderr, "usage: %s <string to search for>\n", prog_name);
  exit(0);
}


x86 assembly (clang, -O0):
<Usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<Usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"usage: %s <string to search for>\0A\00"
define void @Usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"usage: %s <string to search for>\0A\00"
define void @Usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void calc2_error(int regs[26], int *base, const char *s) {
  ((void)(regs));
  ((void)(base));
  fprintf(stderr, "%s\n", s);
}


x86 assembly (clang, -O0):
<calc2_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rdx
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc2_error>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @calc2_error(i32* %0, i32* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %6
%11 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %10)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @calc2_error(i32* nocapture readnone %0, i32* nocapture readnone %1, i8* %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
int intcmp(void *a, void *b) { return *(int *)a - *(int *)b; }


x86 assembly (clang, -O0):
<intcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @intcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
void rotr(int *a, int *b, int *c) {
  int temp = *b;
  *b = *a;
  *a = *c;
  *c = temp;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rsi),%eax
mov    (%rdi),%ecx
mov    %ecx,(%rsi)
mov    (%rdx),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
store i32 %9, i32* %7
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = load i32*, i32** %5
store i32 %11, i32* %12
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = load i32*, i32** %4
store i32 %14, i32* %15
%16 = load i32, i32* %7
%17 = load i32*, i32** %6
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %1
%5 = load i32, i32* %0
store i32 %5, i32* %1
%6 = load i32, i32* %2
store i32 %6, i32* %0
store i32 %4, i32* %2
ret void
}