xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
int processors();
int main(int argc, char *argv[]) {
  int cpus = processors();
  printf("found %d processor%s\n", cpus, (cpus == 1 ? "" : "s"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <processors@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x14(%rbp),%ecx
lea    0xec9(%rip),%rdx
lea    0xec1(%rip),%rax
cmp    $0x1,%ecx
cmove  %rax,%rdx
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <processors@plt>
cmp    $0x1,%eax
lea    0xee3(%rip),%rcx
lea    0xedd(%rip),%rdx
cmove  %rcx,%rdx
lea    0xebc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"found %d processor%s\0A\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [2 x i8] c"s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @processors()
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = load i32, i32* %6
%10 = icmp eq i32 %9, 1
%11 = zext i1 %10 to i64
%12 = select i1 %10, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0)
%13 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %8, i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"found %d processor%s\0A\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [2 x i8] c"s\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @processors()
%4 = icmp eq i32 %3, 1
%5 = select i1 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3, i8* %5)
ret i32 0
}
/* Variables and functions */
int get_conn_fd(int /*<<< orphan*/, int);
int /*<<< orphan*/ inet_addr(char *);
int /*<<< orphan*/ mdaq_net_close2(int);
void SocketClose(char *ip, int port) {
  int fd = get_conn_fd(inet_addr(ip), port);
  if (fd > -1)
    mdaq_net_close2(fd);
}


x86 assembly (clang, -O0):
<SocketClose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <inet_addr@plt>
mov    %eax,%edi
mov    -0xc(%rbp),%esi
call   1040 <get_conn_fd@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0xffffffff,-0x10(%rbp)
jle    1167 <SocketClose+0x37>
mov    -0x10(%rbp),%edi
call   1030 <mdaq_net_close2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SocketClose>:
push   %rbx
mov    %esi,%ebx
call   1050 <inet_addr@plt>
mov    %eax,%edi
mov    %ebx,%esi
call   1040 <get_conn_fd@plt>
test   %eax,%eax
js     114d <SocketClose+0x1d>
mov    %eax,%edi
pop    %rbx
jmp    1030 <mdaq_net_close2@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @SocketClose(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @inet_addr(i8* %6)
%8 = load i32, i32* %4
%9 = call i32 @get_conn_fd(i32 %7, i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, -1
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %5
%14 = call i32 @mdaq_net_close2(i32 %13)
br label %15
15: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @SocketClose(i8* %0, i32 %1) {
%3 = tail call i32 @inet_addr(i8* %0)
%4 = tail call i32 @get_conn_fd(i32 %3, i32 %1)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @mdaq_net_close2(i32 %4)
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bail(char *);
int /*<<< orphan*/ curses_stop();
void sigint_handler() {
  curses_stop();
  bail("got SIGINT, cleaning up");
}


x86 assembly (clang, -O0):
<sigint_handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <curses_stop@plt>
lea    0xece(%rip),%rdi
call   1040 <bail@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigint_handler>:
push   %rax
xor    %eax,%eax
call   1030 <curses_stop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <bail@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"got SIGINT, cleaning up\00"
define void @sigint_handler() {
%1 = call i32 (...) @curses_stop()
%2 = call i32 @bail(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"got SIGINT, cleaning up\00"
define void @sigint_handler() {
%1 = tail call i32 (...) @curses_stop()
%2 = tail call i32 @bail(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int sheet_cell_callback(size_t row, size_t col, const char *value,
                        void *callbackdata) {
  if (col > 1)
    printf("\t");
  if (value)
    printf("%s", value);
  return 0;
}


x86 assembly (clang, -O0):
<sheet_cell_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x1,-0x10(%rbp)
jbe    1141 <sheet_cell_callback+0x31>
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
cmpq   $0x0,-0x18(%rbp)
je     115e <sheet_cell_callback+0x4e>
mov    -0x18(%rbp),%rsi
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sheet_cell_callback>:
push   %rbx
mov    %rdx,%rbx
cmp    $0x2,%rsi
jb     1134 <sheet_cell_callback+0x14>
mov    $0x9,%edi
call   1030 <putchar@plt>
test   %rbx,%rbx
je     114a <sheet_cell_callback+0x2a>
lea    0xec0(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\09\00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @sheet_cell_callback(i64 %0, i64 %1, i8* %2, i8* %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
store i64 %0, i64* %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i64, i64* %6
%10 = icmp ugt i64 %9, 1
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %4
%14 = load i8*, i8** %7
%15 = icmp ne i8* %14, null
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = load i8*, i8** %7
%18 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %17)
br label %19
19: ; preds = %16, %13
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%s\00"
define i32 @sheet_cell_callback(i64 %0, i64 %1, i8* %2, i8* nocapture readnone %3) {
%5 = icmp ugt i64 %1, 1
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @putchar(i32 9)
br label %8
8: ; preds = %6, %4
%9 = icmp eq i8* %2, null
br i1 %9, label %12, label %10
10: ; preds = %8
%11 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %2)
br label %12
12: ; preds = %10, %8
ret i32 0
}
/* Variables and functions */
int isinf(float);
int __pruabi_isinff(float a) { return isinf(a); }


x86 assembly (clang, -O0):
<__pruabi_isinff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isinf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pruabi_isinff>:
jmp    1030 <isinf@plt>

LLVM IR (-O0):
define i32 @__pruabi_isinff(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @isinf(float %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__pruabi_isinff(float %0) {
%2 = tail call i32 @isinf(float %0)
ret i32 %2
}
/* Variables and functions */
int fifo_write(char *);
int fifo_pre_music() { return fifo_write("pt_step -1\n"); }


x86 assembly (clang, -O0):
<fifo_pre_music>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fifo_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifo_pre_music>:
lea    0xee9(%rip),%rdi
jmp    1030 <fifo_write@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"pt_step -1\0A\00"
define i32 @fifo_pre_music() {
%1 = call i32 @fifo_write(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [12 x i8] c"pt_step -1\0A\00"
define i32 @fifo_pre_music() {
%1 = tail call i32 @fifo_write(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
int inteq(uint64_t a, uint64_t b) { return a == b; }


x86 assembly (clang, -O0):
<inteq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inteq>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @inteq(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @inteq(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int semctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int up_sem_destroy(int semid) { return semctl(semid, 0, IPC_RMID); }


x86 assembly (clang, -O0):
<up_sem_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1030 <semctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<up_sem_destroy>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
jmp    1030 <semctl@plt>

LLVM IR (-O0):
@IPC_RMID = global i32 0
define i32 @up_sem_destroy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @IPC_RMID
%5 = call i32 @semctl(i32 %3, i32 0, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define i32 @up_sem_destroy(i32 %0) {
%2 = load i32, i32* @IPC_RMID
%3 = tail call i32 @semctl(i32 %0, i32 0, i32 %2)
ret i32 %3
}
void imv_window_present(struct imv_window *window) { (void)window; }


x86 assembly (clang, -O0):
<imv_window_present>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<imv_window_present>:
ret

LLVM IR (-O0):
%struct.imv_window = type opaque
define void @imv_window_present(%struct.imv_window* %0) {
%2 = alloca %struct.imv_window*
store %struct.imv_window* %0, %struct.imv_window** %2
%3 = load %struct.imv_window*, %struct.imv_window** %2
ret void
}

LLVM IR (-O2):
%struct.imv_window = type opaque
define void @imv_window_present(%struct.imv_window* nocapture %0) {
ret void
}
int getrlimit(int resource, struct rlimit *rlim) {
  puts("# ");
  puts(__FUNCTION__);
  puts("()\n");
  delay(100000000);
  (void)(resource);
  (void)(rlim);
  return -1;
}


x86 assembly (clang, -O0):
<getrlimit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <puts@plt>
lea    0xebf(%rip),%rdi
mov    $0x0,%al
call   1030 <puts@plt>
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1030 <puts@plt>
mov    $0x5f5e100,%edi
mov    $0x0,%al
call   1040 <delay@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getrlimit>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <puts@plt>
lea    0xecd(%rip),%rdi
xor    %eax,%eax
call   1030 <puts@plt>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1030 <puts@plt>
mov    $0x5f5e100,%edi
xor    %eax,%eax
call   1040 <delay@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.rlimit = type opaque
@.str = [3 x i8] c"# \00"
@__FUNCTION__.getrlimit = [10 x i8] c"getrlimit\00"
@.str.1 = [4 x i8] c"()\0A\00"
define i32 @getrlimit(i32 %0, %struct.rlimit* %1) {
%3 = alloca i32
%4 = alloca %struct.rlimit*
store i32 %0, i32* %3
store %struct.rlimit* %1, %struct.rlimit** %4
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.getrlimit, i64 0, i64 0))
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 (i32, ...) bitcast (i32 (...)* @delay to i32 (i32, ...)*)(i32 100000000)
%9 = load i32, i32* %3
%10 = load %struct.rlimit*, %struct.rlimit** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.rlimit = type opaque
@.str = [3 x i8] c"# \00"
@__FUNCTION__.getrlimit = [10 x i8] c"getrlimit\00"
@.str.1 = [4 x i8] c"()\0A\00"
define i32 @getrlimit(i32 %0, %struct.rlimit* nocapture readnone %1) {
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__FUNCTION__.getrlimit, i64 0, i64 0))
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @delay to i32 (i32, ...)*)(i32 100000000)
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ checksys();
void main() { checksys(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <checksys@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <checksys@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @checksys()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @checksys()
ret void
}
unsigned local_to_vax_int_(const unsigned *i) { return *i; }


x86 assembly (clang, -O0):
<local_to_vax_int_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_to_vax_int_>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @local_to_vax_int_(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @local_to_vax_int_(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
void fa70(void) {
a:
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    p01C:
      goto p01C;
      goto a;
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa70>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <fa70+0x9>
jmp    1109 <fa70+0x9>

x86 assembly (clang, -O2):
<fa70>:
jmp    1100 <fa70>

LLVM IR (-O0):
define void @fa70() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %0
br label %8
8: ; preds = %8, %7
br label %8
9: ; No predecessors!
br label %10
10: ; preds = %10, %9
br label %10
11: ; preds = %11
br label %11
12: ; No predecessors!
br label %13
13: ; preds = %13, %12
br label %13
14: ; preds = %14
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa70() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_wifidirect_cfg_provisioning_params_usage(void) {
  printf("Usage : wifidirect_cfg_provisioning_params [<action> <configMethod> "
         "<devPassword>]\n");
  printf("      : Action 1: Request parameters 2: Response parameters.\n");
  printf("If provisioning protocol parameters are provided, "
         "'set' is performed otherwise 'get' is performed.\n");
  return;
}


x86 assembly (clang, -O0):
<print_wifidirect_cfg_provisioning_params_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf2d(%rip),%rdi
call   1030 <printf@plt>
lea    0xf5f(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_wifidirect_cfg_provisioning_params_usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf2f(%rip),%rdi
call   1030 <puts@plt>
lea    0xf60(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [84 x i8] c"Usage : wifidirect_cfg_provisioning_params [<action> <configMethod> <devPassword>]\0A\00"
@.str.1 = [62 x i8] c" : Action 1: Request parameters 2: Response parameters.\0A\00"
@.str.2 = [100 x i8] c"If provisioning protocol parameters are provided, 'set' is performed otherwise 'get' is performed.\0A\00"
define void @print_wifidirect_cfg_provisioning_params_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([84 x i8], [84 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([100 x i8], [100 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [83 x i8] c"Usage : wifidirect_cfg_provisioning_params [<action> <configMethod> <devPassword>]\00"
@str.3 = [61 x i8] c" : Action 1: Request parameters 2: Response parameters.\00"
@str.4 = [99 x i8] c"If provisioning protocol parameters are provided, 'set' is performed otherwise 'get' is performed.\00"
define void @print_wifidirect_cfg_provisioning_params_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([83 x i8], [83 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([61 x i8], [61 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([99 x i8], [99 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emsMark();
void errMark(void) { emsMark(); }


x86 assembly (clang, -O0):
<errMark>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <emsMark@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<errMark>:
xor    %eax,%eax
jmp    1030 <emsMark@plt>

LLVM IR (-O0):
define void @errMark() {
%1 = call i32 (...) @emsMark()
ret void
}

LLVM IR (-O2):
define void @errMark() {
%1 = tail call i32 (...) @emsMark()
ret void
}
/* Variables and functions */
unsigned int timer_tick();
void delay_micros(unsigned int period) {
  unsigned int start = timer_tick();
  while (timer_tick() - start < period) {
  }
}


x86 assembly (clang, -O0):
<delay_micros>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <timer_tick@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <timer_tick@plt>
sub    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    113d <delay_micros+0x2d>
jmp    1125 <delay_micros+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_micros>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <timer_tick@plt>
mov    %eax,%ebp
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <timer_tick@plt>
sub    %ebp,%eax
cmp    %ebx,%eax
jb     1120 <delay_micros+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @delay_micros(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @timer_tick()
store i32 %4, i32* %3
br label %5
5: ; preds = %11, %1
%6 = call i32 (...) @timer_tick()
%7 = load i32, i32* %3
%8 = sub i32 %6, %7
%9 = load i32, i32* %2
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %5
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @delay_micros(i32 %0) {
%2 = tail call i32 (...) @timer_tick()
br label %3
3: ; preds = %3, %1
%4 = tail call i32 (...) @timer_tick()
%5 = sub i32 %4, %2
%6 = icmp ult i32 %5, %0
br i1 %6, label %3, label %7
7: ; preds = %3
ret void
}
/* Type definitions */
struct timespec {
  unsigned long tv_sec;
  unsigned long tv_nsec;
};

/* Variables and functions */
struct timespec timespec_ms(unsigned long ms) {
  struct timespec ret = {.tv_sec = ms / 1000, .tv_nsec = (ms % 1000) * 1000000};
  return ret;
}


x86 assembly (clang, -O0):
<timespec_ms>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x3,%rax
movabs $0x20c49ba5e353f7cf,%rcx
9b c4 20
mul    %rcx
shr    $0x4,%rdx
mov    %rdx,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
shr    $0x3,%rax
mul    %rcx
mov    -0x20(%rbp),%rax
shr    $0x4,%rdx
imul   $0x3e8,%rdx,%rcx
sub    %rcx,%rax
imul   $0xf4240,%rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_ms>:
mov    %rdi,%rax
shr    $0x3,%rax
movabs $0x20c49ba5e353f7cf,%rcx
9b c4 20
mul    %rcx
mov    %rdx,%rax
shr    $0x4,%rax
imul   $0x3e8,%rax,%rcx
sub    %rcx,%rdi
imul   $0xf4240,%rdi,%rdx
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define { i64, i64 } @timespec_ms(i64 %0) {
%2 = alloca %struct.timespec
%3 = alloca i64
store i64 %0, i64* %3
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 0
%5 = load i64, i64* %3
%6 = udiv i64 %5, 1000
store i64 %6, i64* %4
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 1
%8 = load i64, i64* %3
%9 = urem i64 %8, 1000
%10 = mul i64 %9, 1000000
store i64 %10, i64* %7
%11 = bitcast %struct.timespec* %2 to { i64, i64 }*
%12 = load { i64, i64 }, { i64, i64 }* %11
ret { i64, i64 } %12
}

LLVM IR (-O2):
define { i64, i64 } @timespec_ms(i64 %0) {
%2 = udiv i64 %0, 1000
%3 = urem i64 %0, 1000
%4 = mul nuw nsw i64 %3, 1000000
%5 = insertvalue { i64, i64 } poison, i64 %2, 0
%6 = insertvalue { i64, i64 } %5, i64 %4, 1
ret { i64, i64 } %6
}
OP(ed, e9) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
int f1(int x, int y) {
  return (x & (-0x7fffffff - 1)) == (y & (-0x7fffffff - 1));
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80000000,%eax
mov    -0x8(%rbp),%ecx
and    $0x80000000,%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%eax
xor    %esi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, -2147483648
%7 = load i32, i32* %4
%8 = and i32 %7, -2147483648
%9 = icmp eq i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = xor i32 %0, %1
%4 = xor i32 %3, -1
%5 = lshr i32 %4, 31
ret i32 %5
}
void buspirate_dummy_6(struct programmer_t *pgm, const char *p) {}


x86 assembly (clang, -O0):
<buspirate_dummy_6>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<buspirate_dummy_6>:
ret

LLVM IR (-O0):
%struct.programmer_t = type opaque
define void @buspirate_dummy_6(%struct.programmer_t* %0, i8* %1) {
%3 = alloca %struct.programmer_t*
%4 = alloca i8*
store %struct.programmer_t* %0, %struct.programmer_t** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.programmer_t = type opaque
define void @buspirate_dummy_6(%struct.programmer_t* nocapture %0, i8* nocapture %1) {
ret void
}
double calctime(double tv_sec, double tv_nsec) {
  tv_nsec /= 1000000000;
  return tv_sec + tv_nsec;
}


x86 assembly (clang, -O0):
<calctime>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xee5(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calctime>:
divsd  0xef8(%rip),%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @calctime(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fdiv double %5, 1.000000e+09
store double %6, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = fadd double %7, %8
ret double %9
}

LLVM IR (-O2):
define double @calctime(double %0, double %1) {
%3 = fdiv double %1, 1.000000e+09
%4 = fadd double %3, %0
ret double %4
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
scalar_t__ rozofs_get_service_port_storaged_diag();
uint16_t rozofs_get_service_port_storio_diag(int idx) {
  return rozofs_get_service_port_storaged_diag() + idx;
}


x86 assembly (clang, -O0):
<rozofs_get_service_port_storio_diag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rozofs_get_service_port_storaged_diag@plt>
movslq -0x4(%rbp),%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rozofs_get_service_port_storio_diag>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rozofs_get_service_port_storaged_diag@plt>
movslq %ebx,%rcx
add    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @rozofs_get_service_port_storio_diag(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 (...) @rozofs_get_service_port_storaged_diag()
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = add nsw i64 %3, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @rozofs_get_service_port_storio_diag(i32 %0) {
%2 = tail call i64 (...) @rozofs_get_service_port_storaged_diag()
%3 = sext i32 %0 to i64
%4 = add nsw i64 %2, %3
ret i64 %4
}
f(a) {
  switch (a) {
  case 0x402:
    return a + 1;
  case 0x403:
    return a + 2;
  case 0x404:
    return a + 3;
  case 0x405:
    return a + 4;
  case 0x406:
    return 1;
  case 0x407:
    return 4;
  }
  return 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xfffffbfe,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x5,%eax
ja     1182 <f+0x82>
mov    -0x10(%rbp),%rax
lea    0xed7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <f+0x89>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <f+0x89>
mov    -0x8(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <f+0x89>
mov    -0x8(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <f+0x89>
movl   $0x1,-0x4(%rbp)
jmp    1189 <f+0x89>
movl   $0x4,-0x4(%rbp)
jmp    1189 <f+0x89>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
add    $0xfffffbfe,%edi
xor    %eax,%eax
cmp    $0x5,%edi
ja     111a <f+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %19 [
i32 1026, label %5
i32 1027, label %8
i32 1028, label %11
i32 1029, label %14
i32 1030, label %17
i32 1031, label %18
]
5: ; preds = %1
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %2
br label %20
8: ; preds = %1
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 2
store i32 %10, i32* %2
br label %20
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 3
store i32 %13, i32* %2
br label %20
14: ; preds = %1
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 4
store i32 %16, i32* %2
br label %20
17: ; preds = %1
store i32 1, i32* %2
br label %20
18: ; preds = %1
store i32 4, i32* %2
br label %20
19: ; preds = %1
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %17, %14, %11, %8, %5
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
@switch.table.f = [6 x i32] [i32 1027, i32 1029, i32 1031, i32 1033, i32 1, i32 4]
define i32 @f(i32 %0) {
%2 = add i32 %0, -1026
%3 = icmp ult i32 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.f, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_cvtsi32_si64(int);
__m64 test_mm_cvtsi32_si64(int a) { return _mm_cvtsi32_si64(a); }


x86 assembly (clang, -O0):
<test_mm_cvtsi32_si64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtsi32_si64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cvtsi32_si64>:
jmp    1030 <_mm_cvtsi32_si64@plt>

LLVM IR (-O0):
define i32 @test_mm_cvtsi32_si64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvtsi32_si64(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_cvtsi32_si64(i32 %0) {
%2 = tail call i32 @_mm_cvtsi32_si64(i32 %0)
ret i32 %2
}
/* Variables and functions */
unsigned long uart_read(int);
void uart_wait_tx_empty(void) {
  unsigned long status;
  do {
    status = uart_read(0x4);
  } while (!(status & (1 << 0)));
}


x86 assembly (clang, -O0):
<uart_wait_tx_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <uart_read@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1118 <uart_wait_tx_empty+0x8>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_wait_tx_empty>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x4,%edi
call   1030 <uart_read@plt>
test   $0x1,%al
je     1120 <uart_wait_tx_empty+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @uart_wait_tx_empty() {
%1 = alloca i64
br label %2
2: ; preds = %4, %0
%3 = call i64 @uart_read(i32 4)
store i64 %3, i64* %1
br label %4
4: ; preds = %2
%5 = load i64, i64* %1
%6 = and i64 %5, 1
%7 = icmp ne i64 %6, 0
%8 = xor i1 %7, true
br i1 %8, label %2, label %9
9: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @uart_wait_tx_empty() {
br label %1
1: ; preds = %1, %0
%2 = tail call i64 @uart_read(i32 4)
%3 = and i64 %2, 1
%4 = icmp eq i64 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XCirculateEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XCirculateEvent(void) {
  XCirculateEvent *_p = (XCirculateEvent *)malloc(sizeof(XCirculateEvent));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XCirculateEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XCirculateEvent+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XCirculateEvent>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XCirculateEvent+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XCirculateEvent() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XCirculateEvent() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ arm_arith_rsc(int /*<<< orphan*/);
int /*<<< orphan*/ arm_data_imm_op();
void arm_rsc_imm() { arm_arith_rsc(arm_data_imm_op()); }


x86 assembly (clang, -O0):
<arm_rsc_imm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <arm_data_imm_op@plt>
mov    %eax,%edi
call   1030 <arm_arith_rsc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_rsc_imm>:
push   %rax
xor    %eax,%eax
call   1040 <arm_data_imm_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <arm_arith_rsc@plt>

LLVM IR (-O0):
define void @arm_rsc_imm() {
%1 = call i32 (...) @arm_data_imm_op()
%2 = call i32 @arm_arith_rsc(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_rsc_imm() {
%1 = tail call i32 (...) @arm_data_imm_op()
%2 = tail call i32 @arm_arith_rsc(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hello_func();
int main(void) {
  hello_func();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hello_func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <hello_func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hello_func()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @hello_func()
ret i32 0
}
void g_signal_emit_valist() {}


x86 assembly (clang, -O0):
<g_signal_emit_valist>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_signal_emit_valist>:
ret

LLVM IR (-O0):
define void @g_signal_emit_valist() {
ret void
}

LLVM IR (-O2):
define void @g_signal_emit_valist() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, int);
void __attribute__((regparm(3))) memcpy_20(void *dest, void *src) {
  memcpy(dest, src, 20);
}


x86 assembly (clang, -O0):
<memcpy_20>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x14,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_20>:
mov    $0x14,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @memcpy_20(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 20)
ret void
}

LLVM IR (-O2):
define void @memcpy_20(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 20)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0xad() {
  Assert_real((isodigit(173) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              870, ("isodigit should be 0 for 0xad"));
}


x86 assembly (clang, -O0):
<t_isodigit_0xad>:
push   %rbp
mov    %rsp,%rbp
mov    $0xad,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x366,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0xad>:
push   %rax
mov    $0xad,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x366,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xad\00"
define void @t_isodigit_0xad() {
%1 = call i64 @isodigit(i32 173)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 870, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xad\00"
define void @t_isodigit_0xad() {
%1 = tail call i64 @isodigit(i32 173)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 870, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct ldpaa_dq {
  int dummy;
};

/* Variables and functions */
int ldpaa_dq_flags(struct ldpaa_dq const *);
int ldpaa_dq_is_pull(const struct ldpaa_dq *dq) {
  return (int)(ldpaa_dq_flags(dq) & 0x02);
}


x86 assembly (clang, -O0):
<ldpaa_dq_is_pull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ldpaa_dq_flags@plt>
and    $0x2,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldpaa_dq_is_pull>:
push   %rax
call   1030 <ldpaa_dq_flags@plt>
and    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.ldpaa_dq = type { i32 }
define i32 @ldpaa_dq_is_pull(%struct.ldpaa_dq* %0) {
%2 = alloca %struct.ldpaa_dq*
store %struct.ldpaa_dq* %0, %struct.ldpaa_dq** %2
%3 = load %struct.ldpaa_dq*, %struct.ldpaa_dq** %2
%4 = call i32 @ldpaa_dq_flags(%struct.ldpaa_dq* %3)
%5 = and i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
%struct.ldpaa_dq = type { i32 }
define i32 @ldpaa_dq_is_pull(%struct.ldpaa_dq* %0) {
%2 = tail call i32 @ldpaa_dq_flags(%struct.ldpaa_dq* %0)
%3 = and i32 %2, 2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void print_repeat_char(char c, size_t n) {
  for (size_t i = 0; i < n; i++)
    putchar(c);
}


x86 assembly (clang, -O0):
<print_repeat_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1152 <print_repeat_char+0x42>
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    112a <print_repeat_char+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_repeat_char>:
push   %rbp
push   %rbx
push   %rax
test   %rsi,%rsi
je     112d <print_repeat_char+0x1d>
mov    %rsi,%rbx
movsbl %dil,%ebp
nop
mov    %ebp,%edi
call   1030 <putchar@plt>
add    $0xffffffffffffffff,%rbx
jne    1120 <print_repeat_char+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @print_repeat_char(i8 signext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
%5 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %13, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8, i8* %3
%12 = call i32 @putchar(i8 signext %11)
br label %13
13: ; preds = %10
%14 = load i64, i64* %5
%15 = add i64 %14, 1
store i64 %15, i64* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @print_repeat_char(i8 signext %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %8, %5 ], [ 0, %2 ]
%7 = tail call i32 @putchar(i8 signext %0)
%8 = add nuw i64 %6, 1
%9 = icmp eq i64 %8, %1
br i1 %9, label %4, label %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char greeting[] = "Hello";
  printf("%s", greeting);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0xa(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x6(%rbp)
lea    -0xa(%rbp),%rsi
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movw   $0x6f,0x4(%rsp)
movl   $0x6c6c6548,(%rsp)
lea    0xee0(%rip),%rdi
mov    %rsp,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.greeting = [6 x i8] c"Hello\00"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i8]
store i32 0, i32* %1
%3 = bitcast [6 x i8]* %2 to i8*
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@__const.main.greeting = [6 x i8] c"Hello\00"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [6 x i8]
%2 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void cr(void) {
  printf("\n");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<cr>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cr>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
@stdout = global i32 0
define void @cr() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @cr() {
%1 = tail call i32 @putchar(i32 10)
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
void CG_CamSwitch_Cmd_f(void) {}


x86 assembly (clang, -O0):
<CG_CamSwitch_Cmd_f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_CamSwitch_Cmd_f>:
ret

LLVM IR (-O0):
define void @CG_CamSwitch_Cmd_f() {
ret void
}

LLVM IR (-O2):
define void @CG_CamSwitch_Cmd_f() {
ret void
}
int test_03(unsigned int a) { return a >= 0x80000000 ? -5 : 10; }


x86 assembly (clang, -O0):
<test_03>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0xa,%eax
mov    $0xfffffffb,%ecx
cmp    $0x80000000,%edx
cmovae %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_03>:
test   %edi,%edi
mov    $0xfffffffb,%ecx
mov    $0xa,%eax
cmovs  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_03(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp uge i32 %3, -2147483648
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 -5, i32 10
ret i32 %6
}

LLVM IR (-O2):
define i32 @test_03(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = select i1 %2, i32 -5, i32 10
ret i32 %3
}
void __attribute__((no)) bar(char *p_buffer) { p_buffer[255] = 1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x1,0xff(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
movb   $0x1,0xff(%rdi)
ret

LLVM IR (-O0):
define void @bar(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 255
store i8 1, i8* %4
ret void
}

LLVM IR (-O2):
define void @bar(i8* nocapture writeonly %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 255
store i8 1, i8* %2
ret void
}
int _getBitInd(const int bits) { return bits % 8; }


x86 assembly (clang, -O0):
<_getBitInd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getBitInd>:
mov    %edi,%eax
lea    0x7(%rax),%ecx
test   %edi,%edi
cmovns %edi,%ecx
and    $0xfffffff8,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_getBitInd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 8
ret i32 %4
}

LLVM IR (-O2):
define i32 @_getBitInd(i32 %0) {
%2 = srem i32 %0, 8
ret i32 %2
}
int foo(int x, int n) {
  int val;
  val = 1;
  if (n > 0) {
    if (n % 2 == 1)
      val = val * x;
    val = val * foo(x * x, n / 2);
  }
  return val;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1177 <foo+0x67>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    114d <foo+0x3d>
mov    -0xc(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
imul   -0x4(%rbp),%edi
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
call   1030 <foo@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %esi,%esi
jle    113a <foo+0x3a>
mov    $0x1,%r8d
mov    $0x1,%eax
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   $0x1,%sil
mov    %edi,%ecx
cmove  %r8d,%ecx
imul   %edi,%edi
shr    %edx
imul   %ecx,%eax
cmp    $0x1,%esi
mov    %edx,%esi
ja     1120 <foo+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 1, i32* %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %25
8: ; preds = %2
%9 = load i32, i32* %4
%10 = srem i32 %9, 2
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = load i32, i32* %5
%14 = load i32, i32* %3
%15 = mul nsw i32 %13, %14
store i32 %15, i32* %5
br label %16
16: ; preds = %12, %8
%17 = load i32, i32* %5
%18 = load i32, i32* %3
%19 = load i32, i32* %3
%20 = mul nsw i32 %18, %19
%21 = load i32, i32* %4
%22 = sdiv i32 %21, 2
%23 = call i32 @foo(i32 %20, i32 %22)
%24 = mul nsw i32 %17, %23
store i32 %24, i32* %5
br label %25
25: ; preds = %16, %2
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %15
4: ; preds = %2, %4
%5 = phi i32 [ %12, %4 ], [ %1, %2 ]
%6 = phi i32 [ %11, %4 ], [ %0, %2 ]
%7 = phi i32 [ %13, %4 ], [ 1, %2 ]
%8 = and i32 %5, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 1, i32 %6
%11 = mul nsw i32 %6, %6
%12 = lshr i32 %5, 1
%13 = mul nsw i32 %10, %7
%14 = icmp ult i32 %5, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi i32 [ 1, %2 ], [ %13, %4 ]
ret i32 %16
}
/* Variables and functions */
double floor(double);
double positive_round(double val) { return floor(val + 0.5); }


x86 assembly (clang, -O0):
<positive_round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<positive_round>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @positive_round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call double @llvm.floor.f64(double %4)
ret double %5
}

LLVM IR (-O2):
define double @positive_round(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call double @llvm.floor.f64(double %2)
ret double %3
}