xunge/DecIR huggingface dataset:
int moveleft(int start, int *intsnps, int snpsize, int pos) {
  int i = start;
  while (i >= 0 && intsnps[i] >= pos)
    --i;
  return i + 1;
}


x86 assembly (clang, -O0):
<moveleft>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x1c(%rbp)
mov    %al,-0x1d(%rbp)
jl     113a <moveleft+0x3a>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
setge  %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    114a <moveleft+0x4a>
jmp    1158 <moveleft+0x58>
mov    -0x1c(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <moveleft+0x17>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<moveleft>:
mov    %edi,%eax
test   %edi,%edi
js     1125 <moveleft+0x25>
cs nopw 0x0(%rax,%rax,1)
mov    %eax,%edx
cmp    %ecx,(%rsi,%rdx,4)
jl     1125 <moveleft+0x25>
lea    -0x1(%rax),%edx
test   %eax,%eax
mov    %edx,%eax
jg     1110 <moveleft+0x10>
mov    $0xffffffff,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @moveleft(i32 %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
store i32 %10, i32* %9
br label %11
11: ; preds = %24, %4
%12 = load i32, i32* %9
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %11
%15 = load i32*, i32** %6
%16 = load i32, i32* %9
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = load i32, i32* %8
%21 = icmp sge i32 %19, %20
br label %22
22: ; preds = %14, %11
%23 = phi i1 [ false, %11 ], [ %21, %14 ]
br i1 %23, label %24, label %27
24: ; preds = %22
%25 = load i32, i32* %9
%26 = add nsw i32 %25, -1
store i32 %26, i32* %9
br label %11
27: ; preds = %22
%28 = load i32, i32* %9
%29 = add nsw i32 %28, 1
ret i32 %29
}

LLVM IR (-O2):
define i32 @moveleft(i32 %0, i32* nocapture %1, i32 %2, i32 %3) {
%5 = icmp sgt i32 %0, -1
br i1 %5, label %6, label %15
6: ; preds = %4, %12
%7 = phi i32 [ %13, %12 ], [ %0, %4 ]
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %1, i64 %8
%10 = load i32, i32* %9
%11 = icmp slt i32 %10, %3
br i1 %11, label %15, label %12
12: ; preds = %6
%13 = add nsw i32 %7, -1
%14 = icmp sgt i32 %7, 0
br i1 %14, label %6, label %15
15: ; preds = %6, %12, %4
%16 = phi i32 [ %0, %4 ], [ -1, %12 ], [ %7, %6 ]
%17 = add nsw i32 %16, 1
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void onepole_note_free(void *data) { free(data); }


x86 assembly (clang, -O0):
<onepole_note_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<onepole_note_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @onepole_note_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @onepole_note_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sizes;

/* Variables and functions */
int test_loopback_all_sizes(int, int *, int);
int test_loopback_aligned(int fd) {
  int sizes[] = {1,   4,      8,          16,         24,         32,        64,
                 128, (1024), (1024 * 2), (1024 * 3), (1024 * 4), (5 * 1024)};
  return test_loopback_all_sizes(fd, sizes,
                                 (int)(sizeof(sizes) / sizeof((sizes)[0])));
}


x86 assembly (clang, -O0):
<test_loopback_aligned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xeca(%rip),%rsi
mov    $0x34,%edx
call   1040 <memcpy@plt>
mov    -0x4(%rbp),%edi
lea    -0x40(%rbp),%rsi
mov    $0xd,%edx
call   1030 <test_loopback_all_sizes@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_loopback_aligned>:
sub    $0x38,%rsp
mov    0xf16(%rip),%eax
mov    %eax,0x30(%rsp)
movaps 0xefb(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xedf(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec3(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0xd,%edx
call   1030 <test_loopback_all_sizes@plt>
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.test_loopback_aligned.sizes = [13 x i32] [i32 1, i32 4, i32 8, i32 16, i32 24, i32 32, i32 64, i32 128, i32 1024, i32 2048, i32 3072, i32 4096, i32 5120]
define i32 @test_loopback_aligned(i32 %0) {
%2 = alloca i32
%3 = alloca [13 x i32]
store i32 %0, i32* %2
%4 = bitcast [13 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [13 x i32], [13 x i32]* %3, i64 0, i64 0
%7 = call i32 @test_loopback_all_sizes(i32 %5, i32* %6, i32 13)
ret i32 %7
}

LLVM IR (-O2):
@__const.test_loopback_aligned.sizes = [13 x i32] [i32 1, i32 4, i32 8, i32 16, i32 24, i32 32, i32 64, i32 128, i32 1024, i32 2048, i32 3072, i32 4096, i32 5120]
define i32 @test_loopback_aligned(i32 %0) {
%2 = alloca [13 x i32]
%3 = bitcast [13 x i32]* %2 to i8*
%4 = getelementptr inbounds [13 x i32], [13 x i32]* %2, i64 0, i64 0
%5 = call i32 @test_loopback_all_sizes(i32 %0, i32* %4, i32 13)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int sam3HandshakeInternal(int);
int sam3tcpConnectIP(int /*<<< orphan*/, int);
int sam3HandshakeIP(uint32_t ip, int port) {
  int fd;
  if ((fd = sam3tcpConnectIP(ip, (port < 1 || port > 65535 ? 7656 : port))) < 0)
    return -1;
  return sam3HandshakeInternal(fd);
}


x86 assembly (clang, -O0):
<sam3HandshakeIP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0xc(%rbp)
jl     114b <sam3HandshakeIP+0x2b>
cmpl   $0xffff,-0xc(%rbp)
jle    1158 <sam3HandshakeIP+0x38>
mov    $0x1de8,%eax
mov    %eax,-0x18(%rbp)
jmp    115e <sam3HandshakeIP+0x3e>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1030 <sam3tcpConnectIP@plt>
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
jge    1181 <sam3HandshakeIP+0x61>
movl   $0xffffffff,-0x4(%rbp)
jmp    118c <sam3HandshakeIP+0x6c>
mov    -0x10(%rbp),%edi
call   1040 <sam3HandshakeInternal@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sam3HandshakeIP>:
push   %rax
lea    -0x10000(%rsi),%eax
cmp    $0xffff0001,%eax
mov    $0x1de8,%eax
cmovb  %eax,%esi
call   1030 <sam3tcpConnectIP@plt>
test   %eax,%eax
js     1145 <sam3HandshakeIP+0x25>
mov    %eax,%edi
pop    %rax
jmp    1040 <sam3HandshakeInternal@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sam3HandshakeIP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 1
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i32, i32* %5
%12 = icmp sgt i32 %11, 65535
br i1 %12, label %13, label %14
13: ; preds = %10, %2
br label %16
14: ; preds = %10
%15 = load i32, i32* %5
br label %16
16: ; preds = %14, %13
%17 = phi i32 [ 7656, %13 ], [ %15, %14 ]
%18 = call i32 @sam3tcpConnectIP(i32 %7, i32 %17)
store i32 %18, i32* %6
%19 = icmp slt i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 -1, i32* %3
br label %24
21: ; preds = %16
%22 = load i32, i32* %6
%23 = call i32 @sam3HandshakeInternal(i32 %22)
store i32 %23, i32* %3
br label %24
24: ; preds = %21, %20
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @sam3HandshakeIP(i32 %0, i32 %1) {
%3 = add i32 %1, -65536
%4 = icmp ult i32 %3, -65535
%5 = select i1 %4, i32 7656, i32 %1
%6 = tail call i32 @sam3tcpConnectIP(i32 %0, i32 %5)
%7 = icmp slt i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 @sam3HandshakeInternal(i32 %6)
br label %10
10: ; preds = %2, %8
%11 = phi i32 [ %9, %8 ], [ -1, %2 ]
ret i32 %11
}
void transport_cleanup(struct transport *tp) {}


x86 assembly (clang, -O0):
<transport_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<transport_cleanup>:
ret

LLVM IR (-O0):
%struct.transport = type opaque
define void @transport_cleanup(%struct.transport* %0) {
%2 = alloca %struct.transport*
store %struct.transport* %0, %struct.transport** %2
ret void
}

LLVM IR (-O2):
%struct.transport = type opaque
define void @transport_cleanup(%struct.transport* nocapture %0) {
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int KEYcompare(char *h, char *k) { return strcmp(h, k); }


x86 assembly (clang, -O0):
<KEYcompare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KEYcompare>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @KEYcompare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @KEYcompare(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
double __floatdidf(long i) { return (double)((int)i); }


x86 assembly (clang, -O0):
<__floatdidf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__floatdidf>:
cvtsi2sd %edi,%xmm0
ret

LLVM IR (-O0):
define double @__floatdidf(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = sitofp i32 %4 to double
ret double %5
}

LLVM IR (-O2):
define double @__floatdidf(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = sitofp i32 %2 to double
ret double %3
}
void checkWrap(int i) {
  switch (i) {
  case 0:
    break;
  case 1:
    break;
  case 2:
    break;
  case 3:
    break;
  case 4:
    break;
  case 5:
    break;
  case 6:
    break;
  case 7:
    break;
  case 8:
    break;
  case 9:
    break;
  case 10:
    break;
  case 11:
    break;
  case 12:
    break;
  case 13:
    break;
  case 14:
    break;
  case 15:
    break;
  case 16:
    break;
  case 17:
    break;
  case 18:
    break;
  case 19:
    break;
  }
}


x86 assembly (clang, -O0):
<checkWrap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x13,%rax
ja     1190 <checkWrap+0x90>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
jmp    1190 <checkWrap+0x90>
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkWrap>:
ret

LLVM IR (-O0):
define void @checkWrap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %24 [
i32 0, label %4
i32 1, label %5
i32 2, label %6
i32 3, label %7
i32 4, label %8
i32 5, label %9
i32 6, label %10
i32 7, label %11
i32 8, label %12
i32 9, label %13
i32 10, label %14
i32 11, label %15
i32 12, label %16
i32 13, label %17
i32 14, label %18
i32 15, label %19
i32 16, label %20
i32 17, label %21
i32 18, label %22
i32 19, label %23
]
4: ; preds = %1
br label %24
5: ; preds = %1
br label %24
6: ; preds = %1
br label %24
7: ; preds = %1
br label %24
8: ; preds = %1
br label %24
9: ; preds = %1
br label %24
10: ; preds = %1
br label %24
11: ; preds = %1
br label %24
12: ; preds = %1
br label %24
13: ; preds = %1
br label %24
14: ; preds = %1
br label %24
15: ; preds = %1
br label %24
16: ; preds = %1
br label %24
17: ; preds = %1
br label %24
18: ; preds = %1
br label %24
19: ; preds = %1
br label %24
20: ; preds = %1
br label %24
21: ; preds = %1
br label %24
22: ; preds = %1
br label %24
23: ; preds = %1
br label %24
24: ; preds = %1, %23, %22, %21, %20, %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5, %4
ret void
}

LLVM IR (-O2):
define void @checkWrap(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ kill_buffer_noconfirm(void *);
scalar_t__ strcmp(char *, char *);
void kill_buffer_confirm_cb(void *opaque, char *reply) {
  int yes_replied;
  if (!reply)
    return;
  yes_replied = (strcmp(reply, "yes") == 0);
  free(reply);
  if (!yes_replied)
    return;
  kill_buffer_noconfirm(opaque);
}


x86 assembly (clang, -O0):
<kill_buffer_confirm_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <kill_buffer_confirm_cb+0x20>
jmp    1190 <kill_buffer_confirm_cb+0x60>
mov    -0x10(%rbp),%rdi
lea    0xea5(%rip),%rsi
call   1050 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
cmpl   $0x0,-0x14(%rbp)
jne    1187 <kill_buffer_confirm_cb+0x57>
jmp    1190 <kill_buffer_confirm_cb+0x60>
mov    -0x8(%rbp),%rdi
call   1040 <kill_buffer_noconfirm@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill_buffer_confirm_cb>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     115f <kill_buffer_confirm_cb+0x2f>
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0xeb9(%rip),%rsi
mov    %rbx,%rdi
call   1050 <strcmp@plt>
mov    %rax,%r15
mov    %rbx,%rdi
call   1030 <free@plt>
test   %r15,%r15
je     1165 <kill_buffer_confirm_cb+0x35>
pop    %rbx
pop    %r14
pop    %r15
ret
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <kill_buffer_noconfirm@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"yes\00"
define void @kill_buffer_confirm_cb(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %2
br label %22
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = call i64 @strcmp(i8* %10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
store i32 %13, i32* %5
%14 = load i8*, i8** %4
%15 = call i32 @free(i8* %14)
%16 = load i32, i32* %5
%17 = icmp ne i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %9
br label %22
19: ; preds = %9
%20 = load i8*, i8** %3
%21 = call i32 @kill_buffer_noconfirm(i8* %20)
br label %22
22: ; preds = %19, %18, %8
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"yes\00"
define void @kill_buffer_confirm_cb(i8* %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = tail call i64 @strcmp(i8* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = tail call i32 @free(i8* %1)
br i1 %6, label %8, label %10
8: ; preds = %4
%9 = tail call i32 @kill_buffer_noconfirm(i8* %0)
br label %10
10: ; preds = %4, %2, %8
ret void
}
int _cmp_double(const void *_a, const void *_b) {
  const double *a = _a, *b = _b;
  if (*a < *b)
    return -1;
  else if (*a > *b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<_cmp_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x28(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
jbe    1142 <_cmp_double+0x42>
movl   $0xffffffff,-0x4(%rbp)
jmp    116b <_cmp_double+0x6b>
mov    -0x20(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x28(%rbp),%rax
ucomisd (%rax),%xmm0
jbe    1164 <_cmp_double+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <_cmp_double+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cmp_double>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_cmp_double(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double*
%7 = alloca double*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
store double* %9, double** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to double*
store double* %11, double** %7
%12 = load double*, double** %6
%13 = load double, double* %12
%14 = load double*, double** %7
%15 = load double, double* %14
%16 = fcmp olt double %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %26
18: ; preds = %2
%19 = load double*, double** %6
%20 = load double, double* %19
%21 = load double*, double** %7
%22 = load double, double* %21
%23 = fcmp ogt double %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @_cmp_double(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = bitcast i8* %1 to double*
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
%8 = fcmp ogt double %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
void signal_new_exception(struct vm_class *vmc, const char *template, ...) {
  return;
}


x86 assembly (clang, -O0):
<signal_new_exception>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_new_exception>:
ret

LLVM IR (-O0):
%struct.vm_class = type opaque
define void @signal_new_exception(%struct.vm_class* %0, i8* %1, ...) {
%3 = alloca %struct.vm_class*
%4 = alloca i8*
store %struct.vm_class* %0, %struct.vm_class** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.vm_class = type opaque
define void @signal_new_exception(%struct.vm_class* nocapture %0, i8* nocapture %1, ...) {
ret void
}
void gtk_box_reorder_child() {}


x86 assembly (clang, -O0):
<gtk_box_reorder_child>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_box_reorder_child>:
ret

LLVM IR (-O0):
define void @gtk_box_reorder_child() {
ret void
}

LLVM IR (-O2):
define void @gtk_box_reorder_child() {
ret void
}
/* Variables and functions */
int f297(int *);
int f298(int *p) { return f297(p); }


x86 assembly (clang, -O0):
<f298>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f297@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f298>:
jmp    1030 <f297@plt>

LLVM IR (-O0):
define i32 @f298(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f297(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f298(i32* %0) {
%2 = tail call i32 @f297(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t umax64(uint64_t a, uint64_t b) { return a >= b ? a : b; }


x86 assembly (clang, -O0):
<umax64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jl     1127 <umax64+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umax64+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umax64>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovl  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @umax64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sge i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umax64(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
free_buf(fd, buf) int fd;
char *buf;
{
  if (fd != -1)
    free(buf);
}


x86 assembly (clang, -O0):
<free_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
je     1132 <free_buf+0x22>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_buf>:
cmp    $0xffffffff,%edi
je     1122 <free_buf+0x12>
push   %rax
mov    %rsi,%rdi
call   1030 <free@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @free_buf(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i8*, i8** %5
br label %10
10: ; preds = %8, %2
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @free_buf(i32 %0, i8* nocapture %1) {
%3 = icmp eq i32 %0, -1
br i1 %3, label %5, label %4
4: ; preds = %2
tail call void @free(i8* %1)
br label %5
5: ; preds = %4, %2
ret i32 undef
}
int do_740() { return 740; }


x86 assembly (clang, -O0):
<do_740>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2e4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_740>:
mov    $0x2e4,%eax
ret

LLVM IR (-O0):
define i32 @do_740() {
ret i32 740
}

LLVM IR (-O2):
define i32 @do_740() {
ret i32 740
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t z80_cb_b8_res_7(uint8_t value) { return value & 0x7f; }


x86 assembly (clang, -O0):
<z80_cb_b8_res_7>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<z80_cb_b8_res_7>:
mov    %edi,%eax
and    $0x7f,%eax
ret

LLVM IR (-O0):
define i32 @z80_cb_b8_res_7(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 127
ret i32 %4
}

LLVM IR (-O2):
define i32 @z80_cb_b8_res_7(i32 %0) {
%2 = and i32 %0, 127
ret i32 %2
}
TAcquisBs() {}


x86 assembly (clang, -O0):
<TAcquisBs>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TAcquisBs>:
ret

LLVM IR (-O0):
define i32 @TAcquisBs() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @TAcquisBs() {
ret i32 undef
}
/* Variables and functions */
int bma222_read_reg_byte(int);
int /*<<< orphan*/ bma222_write_reg_byte(int, int);
int bma222_power_down(void) {
  bma222_write_reg_byte(0x17,
                        ((bma222_read_reg_byte(0x17) & ~0x10) | ((0) << 4)));
  bma222_write_reg_byte(0x11,
                        ((bma222_read_reg_byte(0x11) & ~0xc0) | ((2) << 6)));
  return (0);
}


x86 assembly (clang, -O0):
<bma222_power_down>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
call   1030 <bma222_read_reg_byte@plt>
mov    %eax,%esi
and    $0xffffffef,%esi
or     $0x0,%esi
mov    $0x17,%edi
call   1040 <bma222_write_reg_byte@plt>
mov    $0x11,%edi
call   1030 <bma222_read_reg_byte@plt>
mov    %eax,%esi
and    $0xffffff3f,%esi
or     $0x80,%esi
mov    $0x11,%edi
call   1040 <bma222_write_reg_byte@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bma222_power_down>:
push   %rax
mov    $0x17,%edi
call   1030 <bma222_read_reg_byte@plt>
and    $0xffffffef,%eax
mov    $0x17,%edi
mov    %eax,%esi
call   1040 <bma222_write_reg_byte@plt>
mov    $0x11,%edi
call   1030 <bma222_read_reg_byte@plt>
and    $0xffffff3f,%eax
lea    0x80(%rax),%esi
mov    $0x11,%edi
call   1040 <bma222_write_reg_byte@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bma222_power_down() {
%1 = call i32 @bma222_read_reg_byte(i32 23)
%2 = and i32 %1, -17
%3 = or i32 %2, 0
%4 = call i32 @bma222_write_reg_byte(i32 23, i32 %3)
%5 = call i32 @bma222_read_reg_byte(i32 17)
%6 = and i32 %5, -193
%7 = or i32 %6, 128
%8 = call i32 @bma222_write_reg_byte(i32 17, i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @bma222_power_down() {
%1 = tail call i32 @bma222_read_reg_byte(i32 23)
%2 = and i32 %1, -17
%3 = tail call i32 @bma222_write_reg_byte(i32 23, i32 %2)
%4 = tail call i32 @bma222_read_reg_byte(i32 17)
%5 = and i32 %4, -193
%6 = or i32 %5, 128
%7 = tail call i32 @bma222_write_reg_byte(i32 17, i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ good1();
void CWE535_Info_Exposure_Shell_Error__w32_char_01_good() { good1(); }


x86 assembly (clang, -O0):
<CWE535_Info_Exposure_Shell_Error__w32_char_01_good>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <good1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CWE535_Info_Exposure_Shell_Error__w32_char_01_good>:
xor    %eax,%eax
jmp    1030 <good1@plt>

LLVM IR (-O0):
define void @CWE535_Info_Exposure_Shell_Error__w32_char_01_good() {
%1 = call i32 (...) @good1()
ret void
}

LLVM IR (-O2):
define void @CWE535_Info_Exposure_Shell_Error__w32_char_01_good() {
%1 = tail call i32 (...) @good1()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void kernel___Pointer_free___impl(void *self) { free(self); }


x86 assembly (clang, -O0):
<kernel___Pointer_free___impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel___Pointer_free___impl>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @kernel___Pointer_free___impl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @kernel___Pointer_free___impl(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int bigbinary2i(char *binary) {
  int result = 0;
  int len = sizeof(result);
  int exp = 1;
  int i;
  for (i = len - 1; i >= 0; --i) {
    result += binary[i] * exp;
    exp <<= 8;
  }
  return result;
}


x86 assembly (clang, -O0):
<bigbinary2i>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x4,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jl     115d <bigbinary2i+0x5d>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
imul   -0x14(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
jmp    1126 <bigbinary2i+0x26>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bigbinary2i>:
movsbl 0x3(%rdi),%eax
movsbl 0x2(%rdi),%ecx
shl    $0x8,%ecx
add    %eax,%ecx
movsbl 0x1(%rdi),%edx
shl    $0x10,%edx
add    %ecx,%edx
movzbl (%rdi),%eax
shl    $0x18,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @bigbinary2i(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 4, i32* %4
store i32 1, i32* %5
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %6
br label %9
9: ; preds = %25, %1
%10 = load i32, i32* %6
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %28
12: ; preds = %9
%13 = load i8*, i8** %2
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i32, i32* %5
%20 = mul nsw i32 %18, %19
%21 = load i32, i32* %3
%22 = add nsw i32 %21, %20
store i32 %22, i32* %3
%23 = load i32, i32* %5
%24 = shl i32 %23, 8
store i32 %24, i32* %5
br label %25
25: ; preds = %12
%26 = load i32, i32* %6
%27 = add nsw i32 %26, -1
store i32 %27, i32* %6
br label %9
28: ; preds = %9
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @bigbinary2i(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = getelementptr inbounds i8, i8* %0, i64 2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = shl nsw i32 %7, 8
%9 = add nsw i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = shl nsw i32 %12, 16
%14 = add nsw i32 %13, %9
%15 = load i8, i8* %0
%16 = sext i8 %15 to i32
%17 = shl nsw i32 %16, 24
%18 = add nsw i32 %17, %14
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ pipe2string(char *);
int /*<<< orphan*/ set_path(int /*<<< orphan*/);
void add_pwd_to_path(void) { set_path(pipe2string("pwd")); }


x86 assembly (clang, -O0):
<add_pwd_to_path>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <pipe2string@plt>
mov    %eax,%edi
call   1040 <set_path@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_pwd_to_path>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <pipe2string@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <set_path@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"pwd\00"
define void @add_pwd_to_path() {
%1 = call i32 @pipe2string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @set_path(i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"pwd\00"
define void @add_pwd_to_path() {
%1 = tail call i32 @pipe2string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @set_path(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gen_op_st32(int, int);
void gen_op_stf32(int addr, int dest) { gen_op_st32(addr, dest); }


x86 assembly (clang, -O0):
<gen_op_stf32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <gen_op_st32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_op_stf32>:
jmp    1030 <gen_op_st32@plt>

LLVM IR (-O0):
define void @gen_op_stf32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @gen_op_st32(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @gen_op_stf32(i32 %0, i32 %1) {
%3 = tail call i32 @gen_op_st32(i32 %0, i32 %1)
ret void
}
int truncate(int value, int min, int max) {
  if (value > max)
    return max;
  if (value < min)
    return min;
  return value;
}


x86 assembly (clang, -O0):
<truncate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1124 <truncate+0x24>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <truncate+0x41>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113b <truncate+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <truncate+0x41>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncate>:
mov    %esi,%eax
cmp    %esi,%edi
cmovge %edi,%eax
cmp    %edx,%edi
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @truncate(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %7
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %7
store i32 %12, i32* %4
br label %21
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %6
store i32 %18, i32* %4
br label %21
19: ; preds = %13
%20 = load i32, i32* %5
store i32 %20, i32* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @truncate(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %2
%5 = icmp slt i32 %0, %1
%6 = select i1 %5, i32 %1, i32 %0
%7 = select i1 %4, i32 %2, i32 %6
ret i32 %7
}
long dt_time_to_d(long t) { return t / (60 * 60 * 24); }


x86 assembly (clang, -O0):
<dt_time_to_d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x15180,%ecx
cqto
idiv   %rcx
pop    %rbp
ret

x86 assembly (clang, -O2):
<dt_time_to_d>:
mov    %rdi,%rax
movabs $0x1845c8a0ce512957,%rcx
c8 45 18
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0xd,%rdx
add    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @dt_time_to_d(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sdiv i64 %3, 86400
ret i64 %4
}

LLVM IR (-O2):
define i64 @dt_time_to_d(i64 %0) {
%2 = sdiv i64 %0, 86400
ret i64 %2
}
void PVD_IRQHandler() {}


x86 assembly (clang, -O0):
<PVD_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PVD_IRQHandler>:
ret

LLVM IR (-O0):
define void @PVD_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @PVD_IRQHandler() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void radio_df_ant_switch_pattern_set(uint8_t pattern) {}


x86 assembly (clang, -O0):
<radio_df_ant_switch_pattern_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_df_ant_switch_pattern_set>:
ret

LLVM IR (-O0):
define void @radio_df_ant_switch_pattern_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @radio_df_ant_switch_pattern_set(i32 %0) {
ret void
}
unsigned int solve(long n) {
  long a = 0, s = 0;
  for (long i = 0; i < n; ++i) {
    a += i;
    s += i * i;
  }
  return a * a - s;
}


x86 assembly (clang, -O0):
<solve>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    115c <solve+0x5c>
mov    -0x20(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
imul   -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1120 <solve+0x20>
mov    -0x10(%rbp),%rax
imul   -0x10(%rbp),%rax
sub    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<solve>:
test   %rdi,%rdi
jle    1152 <solve+0x52>
lea    -0x1(%rdi),%rax
lea    -0x2(%rdi),%rcx
mul    %rcx
mov    %rax,%r8
mov    %rdx,%rsi
lea    -0x3(%rdi),%rcx
mul    %rcx
imul   %esi,%ecx
shld   $0x3f,%r8,%rsi
add    %ecx,%edx
shld   $0x3f,%rax,%rdx
movabs $0x5555555555555556,%rcx
55 55 55
imul   %rdx,%rcx
add    %rdi,%rcx
lea    (%rsi,%rsi,2),%rdx
lea    (%rsi,%rdi,1),%rax
add    $0xffffffffffffffff,%rax
add    %rdx,%rcx
add    $0xffffffffffffffff,%rcx
jmp    1156 <solve+0x56>
xor    %eax,%eax
xor    %ecx,%ecx
imul   %eax,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @solve(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
store i64 0, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %19, %1
%7 = load i64, i64* %5
%8 = load i64, i64* %2
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i64, i64* %5
%12 = load i64, i64* %3
%13 = add nsw i64 %12, %11
store i64 %13, i64* %3
%14 = load i64, i64* %5
%15 = load i64, i64* %5
%16 = mul nsw i64 %14, %15
%17 = load i64, i64* %4
%18 = add nsw i64 %17, %16
store i64 %18, i64* %4
br label %19
19: ; preds = %10
%20 = load i64, i64* %5
%21 = add nsw i64 %20, 1
store i64 %21, i64* %5
br label %6
22: ; preds = %6
%23 = load i64, i64* %3
%24 = load i64, i64* %3
%25 = mul nsw i64 %23, %24
%26 = load i64, i64* %4
%27 = sub nsw i64 %25, %26
%28 = trunc i64 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @solve(i64 %0) {
%2 = icmp sgt i64 %0, 0
br i1 %2, label %3, label %23
3: ; preds = %1
%4 = add nsw i64 %0, -1
%5 = zext i64 %4 to i65
%6 = add nsw i64 %0, -2
%7 = zext i64 %6 to i65
%8 = mul i65 %5, %7
%9 = lshr i65 %8, 1
%10 = trunc i65 %9 to i64
%11 = add i64 %10, %0
%12 = add nsw i64 %0, -3
%13 = zext i64 %12 to i65
%14 = mul i65 %8, %13
%15 = lshr i65 %14, 1
%16 = trunc i65 %15 to i64
%17 = mul i64 %16, 6148914691236517206
%18 = add i64 %17, %0
%19 = mul i64 %10, 3
%20 = add i64 %18, %19
%21 = add i64 %11, -1
%22 = add i64 %20, -1
br label %23
23: ; preds = %3, %1
%24 = phi i64 [ 0, %1 ], [ %21, %3 ]
%25 = phi i64 [ 0, %1 ], [ %22, %3 ]
%26 = mul nsw i64 %24, %24
%27 = sub nsw i64 %26, %25
%28 = trunc i64 %27 to i32
ret i32 %28
}
/* Variables and functions */
int htonl(int);
void buf_htonl(void *buf, int len) {
  int *buf_i = (int *)buf;
  int i;
  for (i = 0; i < (len / sizeof(int)) + 1; i++) {
    buf_i[i] = htonl(buf_i[i]);
  }
}


x86 assembly (clang, -O0):
<buf_htonl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
movslq -0xc(%rbp),%rcx
shr    $0x2,%rcx
add    $0x1,%rcx
cmp    %rcx,%rax
jae    1172 <buf_htonl+0x62>
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <htonl@plt>
mov    %eax,%edx
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    112e <buf_htonl+0x1e>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_htonl>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
movslq %esi,%r14
shr    $0x2,%r14
add    $0x1,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r15,%rbx,4),%edi
call   1030 <htonl@plt>
mov    %eax,(%r15,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <buf_htonl+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @buf_htonl(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
store i32 0, i32* %6
br label %9
9: ; preds = %28, %2
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = udiv i64 %13, 4
%15 = add i64 %14, 1
%16 = icmp ult i64 %11, %15
br i1 %16, label %17, label %31
17: ; preds = %9
%18 = load i32*, i32** %5
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = call i32 @htonl(i32 %22)
%24 = load i32*, i32** %5
%25 = load i32, i32* %6
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i32, i32* %24, i64 %26
store i32 %23, i32* %27
br label %28
28: ; preds = %17
%29 = load i32, i32* %6
%30 = add nsw i32 %29, 1
store i32 %30, i32* %6
br label %9
31: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @buf_htonl(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = sext i32 %1 to i64
%5 = lshr i64 %4, 2
br label %6
6: ; preds = %2, %6
%7 = phi i64 [ 0, %2 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %3, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @htonl(i32 %9)
store i32 %10, i32* %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %7, %5
br i1 %12, label %13, label %6
13: ; preds = %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x3a() {
  Assert_real((isxdigit(58) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              295, ("isxdigit should be 0 for :"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x3a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x127,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x3a>:
push   %rax
mov    $0x3a,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x127,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for :\00"
define void @t_isxdigit_0x3a() {
%1 = call i64 @isxdigit(i32 58)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 295, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for :\00"
define void @t_isxdigit_0x3a() {
%1 = tail call i64 @isxdigit(i32 58)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 295, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
unsigned int __builtin_aarch64_get_fpsr();
void fpsr_getter(void) { unsigned int fpsr = __builtin_aarch64_get_fpsr(); }


x86 assembly (clang, -O0):
<fpsr_getter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__builtin_aarch64_get_fpsr@plt>
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpsr_getter>:
xor    %eax,%eax
jmp    1030 <__builtin_aarch64_get_fpsr@plt>

LLVM IR (-O0):
define void @fpsr_getter() {
%1 = alloca i32
%2 = call i32 (...) @__builtin_aarch64_get_fpsr()
store i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @fpsr_getter() {
%1 = tail call i32 (...) @__builtin_aarch64_get_fpsr()
ret void
}
/* Type definitions */
typedef unsigned long long uint64_t;
struct timespec {
  unsigned long long tv_sec;
  unsigned long long tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
uint64_t record_get_time_usecs() {
  struct timespec now;
  clock_gettime(CLOCK_REALTIME, &now);
  return (now.tv_sec * 1000000ull) + (now.tv_nsec / 1000ull);
}


x86 assembly (clang, -O0):
<record_get_time_usecs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0xf4240,-0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<record_get_time_usecs>:
sub    $0x18,%rsp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
imul   $0xf4240,0x8(%rsp),%rcx
mov    0x10(%rsp),%rax
shr    $0x3,%rax
movabs $0x20c49ba5e353f7cf,%rdx
9b c4 20
mul    %rdx
shr    $0x4,%rdx
add    %rdx,%rcx
mov    %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
@CLOCK_REALTIME = global i32 0
define i64 @record_get_time_usecs() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_REALTIME
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%5 = load i64, i64* %4
%6 = mul i64 %5, 1000000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%8 = load i64, i64* %7
%9 = udiv i64 %8, 1000
%10 = add i64 %6, %9
ret i64 %10
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
@CLOCK_REALTIME = global i32 0
define i64 @record_get_time_usecs() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_REALTIME
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = mul i64 %6, 1000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i64, i64* %8
%10 = udiv i64 %9, 1000
%11 = add i64 %10, %7
ret i64 %11
}
int sync_test_and_set_bit(long nr, volatile unsigned long *addr) {
  unsigned char oldbit;
  asm volatile("lock; bts %2,%1\n\tsetc %0"
               : "=qm"(oldbit), "+m"((*(volatile long *)addr))
               : "Ir"(nr)
               : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<sync_test_and_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
lock bts %rcx,(%rax)
setb   -0x11(%rbp)
movzbl -0x11(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_test_and_set_bit>:
lock bts %rdi,(%rsi)
setb   -0x1(%rsp)
movzbl -0x1(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @sync_test_and_set_bit(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
%5 = alloca i8
store i64 %0, i64* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i64, i64* %3
%8 = load i8, i8* %5
%9 = zext i8 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @sync_test_and_set_bit(i64 %0, i64* %1) {
%3 = alloca i8
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ task_assert_flag(int, int);
void task_assert_fifo(int id) { task_assert_flag(id, (1 << 4)); }


x86 assembly (clang, -O0):
<task_assert_fifo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x10,%esi
call   1030 <task_assert_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_assert_fifo>:
mov    $0x10,%esi
jmp    1030 <task_assert_flag@plt>

LLVM IR (-O0):
define void @task_assert_fifo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @task_assert_flag(i32 %3, i32 16)
ret void
}

LLVM IR (-O2):
define void @task_assert_fifo(i32 %0) {
%2 = tail call i32 @task_assert_flag(i32 %0, i32 16)
ret void
}
/* Type definitions */
struct timeval {
  double tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double get_time() {
  struct timeval t;
  gettimeofday(&t, NULL);
  return (double)t.tv_sec + t.tv_usec / 1.0e6;
}


x86 assembly (clang, -O0):
<get_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xec8(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_time>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq 0x10(%rsp),%xmm1
movsd  0x8(%rsp),%xmm0
divsd  0xecb(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i64 }
define double @get_time() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = sitofp i64 %4 to double
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%7 = load double, double* %6
%8 = fdiv double %7, 1.000000e+06
%9 = fadd double %5, %8
ret double %9
}

LLVM IR (-O2):
%struct.timeval = type { double, i64 }
define double @get_time() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%8 = load double, double* %7
%9 = fdiv double %8, 1.000000e+06
%10 = fadd double %9, %6
ret double %10
}