#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ SysCtlDelay(int);
void SysCtlClockSet(uint32_t ui32Config) {
  uint32_t ui32Delay, ui32RCC, ui32RCC2;
  ui32RCC = (*((volatile uint32_t *)(0x400FE060)));
  ui32RCC2 = (*((volatile uint32_t *)(0x400FE070)));
  ui32RCC |= 0x00000800;
  ui32RCC &= ~(0x00400000);
  ui32RCC2 |= 0x00000800;
  (*((volatile uint32_t *)(0x400FE060))) = ui32RCC;
  (*((volatile uint32_t *)(0x400FE070))) = ui32RCC2;
  if ((ui32RCC & 0x00000001) && !(ui32Config & 0x00000001)) {
    ui32RCC &= (~0x00000001 | (ui32Config & 0x00000001));
    (*((volatile uint32_t *)(0x400FE058))) = 0x00000100;
    (*((volatile uint32_t *)(0x400FE060))) = ui32RCC;
    ui32Delay = 524288;
    while (((*((volatile uint32_t *)(0x400FE050))) & 0x00000100) == 0) {
      ui32Delay--;
      if (ui32Delay == 0) {
        break;
      }
    }
    if (ui32Delay == 0) {
      return;
    }
  }
  ui32RCC &= ~(0x000007C0 | 0x00000030);
  ui32RCC |= ui32Config & (0x000007C0 | 0x00000030);
  ui32RCC2 &= ~(0x80000000 | 0x00000070);
  ui32RCC2 |= ui32Config & (0x80000000 | 0x00000030);
  ui32RCC2 |= (ui32Config & 0x00000008) << 3;
  (*((volatile uint32_t *)(0x400FE060))) = ui32RCC;
  (*((volatile uint32_t *)(0x400FE070))) = ui32RCC2;
  ui32RCC &= ~0x00002000;
  ui32RCC |= ui32Config & 0x00002000;
  ui32RCC2 &= ~0x00002000;
  ui32RCC2 |= ui32Config & 0x00002000;
  (*((volatile uint32_t *)(0x400FE058))) = 0x00000040;
  if (ui32RCC2 & 0x80000000) {
    (*((volatile uint32_t *)(0x400FE070))) = ui32RCC2;
    (*((volatile uint32_t *)(0x400FE060))) = ui32RCC;
  } else {
    (*((volatile uint32_t *)(0x400FE060))) = ui32RCC;
    (*((volatile uint32_t *)(0x400FE070))) = ui32RCC2;
  }
  ui32RCC &= ~(0x07800000 | 0x00400000 | 0x00000001);
  ui32RCC |= ui32Config & (0x07800000 | 0x00400000 | 0x00000001);
  ui32RCC2 &= ~(0x1F800000);
  ui32RCC2 |= ui32Config & 0x1F800000;
  if (ui32Config & 0x40000000) {
    ui32RCC |= 0x00400000;
    ui32RCC2 &= ~(0x00400000);
    ui32RCC2 |= ui32Config & (0x40000000 | 0x00400000);
  } else {
    ui32RCC2 &= ~(0x40000000);
  }
  if (!(ui32Config & 0x00000800)) {
    for (ui32Delay = 32768; ui32Delay > 0; ui32Delay--) {
      if (((*((volatile uint32_t *)(0x400FE168))) & 0x00000001)) {
        break;
      }
    }
    ui32RCC &= ~(0x00000800);
    ui32RCC2 &= ~(0x00000800);
  }
  (*((volatile uint32_t *)(0x400FE060))) = ui32RCC;
  (*((volatile uint32_t *)(0x400FE070))) = ui32RCC2;
  SysCtlDelay(16);
}


x86 assembly (clang, -O0):
<SysCtlClockSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x400fe060,%eax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    $0x400fe070,%eax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     $0x800,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffbfffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
or     $0x800,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x400fe060,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    $0x400fe070,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     11f5 <SysCtlClockSet+0xe5>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    11f5 <SysCtlClockSet+0xe5>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
or     $0xfffffffe,%eax
and    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x400fe058,%eax
movl   $0x100,(%rax)
mov    -0xc(%rbp),%ecx
mov    $0x400fe060,%eax
mov    %ecx,(%rax)
movl   $0x80000,-0x8(%rbp)
mov    $0x400fe050,%eax
mov    (%rax),%eax
and    $0x100,%eax
cmp    $0x0,%eax
jne    11e1 <SysCtlClockSet+0xd1>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    11dc <SysCtlClockSet+0xcc>
jmp    11e1 <SysCtlClockSet+0xd1>
jmp    11af <SysCtlClockSet+0x9f>
cmpl   $0x0,-0x8(%rbp)
jne    11f0 <SysCtlClockSet+0xe0>
jmp    13bd <SysCtlClockSet+0x2ad>
jmp    11f5 <SysCtlClockSet+0xe5>
mov    -0xc(%rbp),%eax
and    $0xfffff80f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f0,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0x7fffff8f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80000030,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
shl    $0x3,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x400fe060,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    $0x400fe070,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xffffdfff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2000,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xffffdfff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x400fe058,%eax
movl   $0x40,(%rax)
mov    -0x10(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     12b1 <SysCtlClockSet+0x1a1>
mov    -0x10(%rbp),%ecx
mov    $0x400fe070,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    $0x400fe060,%eax
mov    %ecx,(%rax)
jmp    12c5 <SysCtlClockSet+0x1b5>
mov    -0xc(%rbp),%ecx
mov    $0x400fe060,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    $0x400fe070,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xf83ffffe,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7c00001,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xe07fffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f800000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x40000000,%eax
cmp    $0x0,%eax
je     1331 <SysCtlClockSet+0x221>
mov    -0xc(%rbp),%eax
or     $0x400000,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xffbfffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x40400000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    133c <SysCtlClockSet+0x22c>
mov    -0x10(%rbp),%eax
and    $0xbfffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x800,%eax
cmp    $0x0,%eax
jne    139f <SysCtlClockSet+0x28f>
movl   $0x8000,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1389 <SysCtlClockSet+0x279>
mov    $0x400fe168,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1376 <SysCtlClockSet+0x266>
jmp    1389 <SysCtlClockSet+0x279>
jmp    137b <SysCtlClockSet+0x26b>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1354 <SysCtlClockSet+0x244>
mov    -0xc(%rbp),%eax
and    $0xfffff7ff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xfffff7ff,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x400fe060,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    $0x400fe070,%eax
mov    %ecx,(%rax)
mov    $0x10,%edi
call   1030 <SysCtlDelay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlClockSet>:
mov    0x400fe060,%edx
mov    %edx,%ecx
and    $0xffbff7ff,%ecx
mov    $0x800,%eax
or     0x400fe070,%eax
or     $0x800,%ecx
mov    %ecx,0x400fe060
mov    %eax,0x400fe070
test   $0x1,%dil
jne    11b8 <SysCtlClockSet+0xa8>
and    $0x1,%edx
je     11b8 <SysCtlClockSet+0xa8>
and    $0xffbffffe,%ecx
movl   $0x100,0x400fe058
mov    %ecx,0x400fe060
mov    $0x80000,%edx
mov    $0x1,%esi
nopl   0x0(%rax)
testl  $0x100,0x400fe050
jne    11ae <SysCtlClockSet+0x9e>
testl  $0x100,0x400fe050
jne    11b0 <SysCtlClockSet+0xa0>
testl  $0x100,0x400fe050
jne    11b0 <SysCtlClockSet+0xa0>
testl  $0x100,0x400fe050
jne    11b0 <SysCtlClockSet+0xa0>
add    $0xfffffffc,%edx
jne    1170 <SysCtlClockSet+0x60>
jmp    12ca <SysCtlClockSet+0x1ba>
mov    %edx,%esi
test   %esi,%esi
je     12ca <SysCtlClockSet+0x1ba>
and    $0xfffff80f,%ecx
mov    %edi,%edx
and    $0x7f0,%edx
or     %ecx,%edx
and    $0x7fffff8f,%eax
mov    %edi,%ecx
and    $0x80000030,%ecx
mov    %edi,%esi
and    $0x8,%esi
lea    (%rcx,%rsi,8),%ecx
or     %eax,%ecx
mov    %edx,0x400fe060
mov    %ecx,0x400fe070
and    $0xffffdfff,%edx
mov    %edi,%eax
and    $0x2000,%eax
or     %eax,%edx
and    $0xffffdfff,%ecx
or     %eax,%ecx
movl   $0x40,0x400fe058
test   %edi,%edi
js     1223 <SysCtlClockSet+0x113>
mov    %edx,0x400fe060
mov    %ecx,0x400fe070
jmp    1231 <SysCtlClockSet+0x121>
mov    %ecx,0x400fe070
mov    %edx,0x400fe060
and    $0xf83ffffe,%edx
mov    %edi,%eax
and    $0x7c00001,%eax
or     %edx,%eax
and    $0xe07fffff,%ecx
mov    %edi,%edx
and    $0x1f800000,%edx
or     %ecx,%edx
test   $0x40000000,%edi
jne    126a <SysCtlClockSet+0x15a>
and    $0xbfffffff,%edx
mov    %edx,%ecx
test   $0x800,%edi
je     1287 <SysCtlClockSet+0x177>
jmp    12b2 <SysCtlClockSet+0x1a2>
or     $0x400000,%eax
and    $0xffbfffff,%edx
mov    %edi,%ecx
and    $0x40400000,%ecx
or     %edx,%ecx
test   $0x800,%edi
jne    12b2 <SysCtlClockSet+0x1a2>
mov    $0x8000,%edx
nopl   0x0(%rax)
mov    0x400fe168,%esi
test   $0x1,%sil
jne    12a7 <SysCtlClockSet+0x197>
lea    -0x1(%rdx),%esi
cmp    $0x1,%edx
mov    %esi,%edx
ja     1290 <SysCtlClockSet+0x180>
and    $0xfffff7ff,%eax
and    $0xfffff7ff,%ecx
mov    %eax,0x400fe060
mov    %ecx,0x400fe070
mov    $0x10,%edi
jmp    1030 <SysCtlDelay@plt>
ret

LLVM IR (-O0):
define void @SysCtlClockSet(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load volatile i32, i32* inttoptr (i64 1074782304 to i32*)
store i32 %6, i32* %4
%7 = load volatile i32, i32* inttoptr (i64 1074782320 to i32*)
store i32 %7, i32* %5
%8 = load i32, i32* %4
%9 = or i32 %8, 2048
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = and i32 %10, -4194305
store i32 %11, i32* %4
%12 = load i32, i32* %5
%13 = or i32 %12, 2048
store i32 %13, i32* %5
%14 = load i32, i32* %4
store volatile i32 %14, i32* inttoptr (i64 1074782304 to i32*)
%15 = load i32, i32* %5
store volatile i32 %15, i32* inttoptr (i64 1074782320 to i32*)
%16 = load i32, i32* %4
%17 = and i32 %16, 1
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %46
19: ; preds = %1
%20 = load i32, i32* %2
%21 = and i32 %20, 1
%22 = icmp ne i32 %21, 0
br i1 %22, label %46, label %23
23: ; preds = %19
%24 = load i32, i32* %2
%25 = and i32 %24, 1
%26 = or i32 -2, %25
%27 = load i32, i32* %4
%28 = and i32 %27, %26
store i32 %28, i32* %4
store volatile i32 256, i32* inttoptr (i64 1074782296 to i32*)
%29 = load i32, i32* %4
store volatile i32 %29, i32* inttoptr (i64 1074782304 to i32*)
store i32 524288, i32* %3
br label %30
30: ; preds = %40, %23
%31 = load volatile i32, i32* inttoptr (i64 1074782288 to i32*)
%32 = and i32 %31, 256
%33 = icmp eq i32 %32, 0
br i1 %33, label %34, label %41
34: ; preds = %30
%35 = load i32, i32* %3
%36 = add nsw i32 %35, -1
store i32 %36, i32* %3
%37 = load i32, i32* %3
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %40
39: ; preds = %34
br label %41
40: ; preds = %34
br label %30
41: ; preds = %39, %30
%42 = load i32, i32* %3
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %45
44: ; preds = %41
br label %141
45: ; preds = %41
br label %46
46: ; preds = %45, %19, %1
%47 = load i32, i32* %4
%48 = and i32 %47, -2033
store i32 %48, i32* %4
%49 = load i32, i32* %2
%50 = and i32 %49, 2032
%51 = load i32, i32* %4
%52 = or i32 %51, %50
store i32 %52, i32* %4
%53 = load i32, i32* %5
%54 = and i32 %53, 2147483535
store i32 %54, i32* %5
%55 = load i32, i32* %2
%56 = and i32 %55, -2147483600
%57 = load i32, i32* %5
%58 = or i32 %57, %56
store i32 %58, i32* %5
%59 = load i32, i32* %2
%60 = and i32 %59, 8
%61 = shl i32 %60, 3
%62 = load i32, i32* %5
%63 = or i32 %62, %61
store i32 %63, i32* %5
%64 = load i32, i32* %4
store volatile i32 %64, i32* inttoptr (i64 1074782304 to i32*)
%65 = load i32, i32* %5
store volatile i32 %65, i32* inttoptr (i64 1074782320 to i32*)
%66 = load i32, i32* %4
%67 = and i32 %66, -8193
store i32 %67, i32* %4
%68 = load i32, i32* %2
%69 = and i32 %68, 8192
%70 = load i32, i32* %4
%71 = or i32 %70, %69
store i32 %71, i32* %4
%72 = load i32, i32* %5
%73 = and i32 %72, -8193
store i32 %73, i32* %5
%74 = load i32, i32* %2
%75 = and i32 %74, 8192
%76 = load i32, i32* %5
%77 = or i32 %76, %75
store i32 %77, i32* %5
store volatile i32 64, i32* inttoptr (i64 1074782296 to i32*)
%78 = load i32, i32* %5
%79 = and i32 %78, -2147483648
%80 = icmp ne i32 %79, 0
br i1 %80, label %81, label %84
81: ; preds = %46
%82 = load i32, i32* %5
store volatile i32 %82, i32* inttoptr (i64 1074782320 to i32*)
%83 = load i32, i32* %4
store volatile i32 %83, i32* inttoptr (i64 1074782304 to i32*)
br label %87
84: ; preds = %46
%85 = load i32, i32* %4
store volatile i32 %85, i32* inttoptr (i64 1074782304 to i32*)
%86 = load i32, i32* %5
store volatile i32 %86, i32* inttoptr (i64 1074782320 to i32*)
br label %87
87: ; preds = %84, %81
%88 = load i32, i32* %4
%89 = and i32 %88, -130023426
store i32 %89, i32* %4
%90 = load i32, i32* %2
%91 = and i32 %90, 130023425
%92 = load i32, i32* %4
%93 = or i32 %92, %91
store i32 %93, i32* %4
%94 = load i32, i32* %5
%95 = and i32 %94, -528482305
store i32 %95, i32* %5
%96 = load i32, i32* %2
%97 = and i32 %96, 528482304
%98 = load i32, i32* %5
%99 = or i32 %98, %97
store i32 %99, i32* %5
%100 = load i32, i32* %2
%101 = and i32 %100, 1073741824
%102 = icmp ne i32 %101, 0
br i1 %102, label %103, label %112
103: ; preds = %87
%104 = load i32, i32* %4
%105 = or i32 %104, 4194304
store i32 %105, i32* %4
%106 = load i32, i32* %5
%107 = and i32 %106, -4194305
store i32 %107, i32* %5
%108 = load i32, i32* %2
%109 = and i32 %108, 1077936128
%110 = load i32, i32* %5
%111 = or i32 %110, %109
store i32 %111, i32* %5
br label %115
112: ; preds = %87
%113 = load i32, i32* %5
%114 = and i32 %113, -1073741825
store i32 %114, i32* %5
br label %115
115: ; preds = %112, %103
%116 = load i32, i32* %2
%117 = and i32 %116, 2048
%118 = icmp ne i32 %117, 0
br i1 %118, label %137, label %119
119: ; preds = %115
store i32 32768, i32* %3
br label %120
120: ; preds = %129, %119
%121 = load i32, i32* %3
%122 = icmp sgt i32 %121, 0
br i1 %122, label %123, label %132
123: ; preds = %120
%124 = load volatile i32, i32* inttoptr (i64 1074782568 to i32*)
%125 = and i32 %124, 1
%126 = icmp ne i32 %125, 0
br i1 %126, label %127, label %128
127: ; preds = %123
br label %132
128: ; preds = %123
br label %129
129: ; preds = %128
%130 = load i32, i32* %3
%131 = add nsw i32 %130, -1
store i32 %131, i32* %3
br label %120
132: ; preds = %127, %120
%133 = load i32, i32* %4
%134 = and i32 %133, -2049
store i32 %134, i32* %4
%135 = load i32, i32* %5
%136 = and i32 %135, -2049
store i32 %136, i32* %5
br label %137
137: ; preds = %132, %115
%138 = load i32, i32* %4
store volatile i32 %138, i32* inttoptr (i64 1074782304 to i32*)
%139 = load i32, i32* %5
store volatile i32 %139, i32* inttoptr (i64 1074782320 to i32*)
%140 = call i32 @SysCtlDelay(i32 16)
br label %141
141: ; preds = %137, %44
ret void
}

LLVM IR (-O2):
define void @SysCtlClockSet(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 1074782304 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1074782320 to i32*)
%4 = and i32 %2, -4196353
%5 = or i32 %4, 2048
%6 = or i32 %3, 2048
store volatile i32 %5, i32* inttoptr (i64 1074782304 to i32*)
store volatile i32 %6, i32* inttoptr (i64 1074782320 to i32*)
%7 = and i32 %2, 1
%8 = icmp ne i32 %7, 0
%9 = and i32 %0, 1
%10 = icmp eq i32 %9, 0
%11 = and i1 %10, %8
br i1 %11, label %12, label %37
12: ; preds = %1
%13 = and i32 %5, -4194306
store volatile i32 256, i32* inttoptr (i64 1074782296 to i32*)
store volatile i32 %13, i32* inttoptr (i64 1074782304 to i32*)
br label %14
14: ; preds = %31, %12
%15 = phi i32 [ 524288, %12 ], [ %32, %31 ]
%16 = load volatile i32, i32* inttoptr (i64 1074782288 to i32*)
%17 = and i32 %16, 256
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %34
19: ; preds = %14
%20 = load volatile i32, i32* inttoptr (i64 1074782288 to i32*)
%21 = and i32 %20, 256
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %34
23: ; preds = %19
%24 = load volatile i32, i32* inttoptr (i64 1074782288 to i32*)
%25 = and i32 %24, 256
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %34
27: ; preds = %23
%28 = load volatile i32, i32* inttoptr (i64 1074782288 to i32*)
%29 = and i32 %28, 256
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %34
31: ; preds = %27
%32 = add nsw i32 %15, -4
%33 = icmp eq i32 %32, 0
br i1 %33, label %92, label %14
34: ; preds = %27, %23, %19, %14
%35 = phi i32 [ %15, %14 ], [ 1, %19 ], [ 1, %23 ], [ 1, %27 ]
%36 = icmp eq i32 %35, 0
br i1 %36, label %92, label %37
37: ; preds = %34, %1
%38 = phi i32 [ %13, %34 ], [ %5, %1 ]
%39 = and i32 %38, -2033
%40 = and i32 %0, 2032
%41 = or i32 %39, %40
%42 = and i32 %6, 2147483535
%43 = and i32 %0, -2147483600
%44 = shl i32 %0, 3
%45 = and i32 %44, 64
%46 = or i32 %45, %43
%47 = or i32 %46, %42
store volatile i32 %41, i32* inttoptr (i64 1074782304 to i32*)
store volatile i32 %47, i32* inttoptr (i64 1074782320 to i32*)
%48 = and i32 %41, -8193
%49 = and i32 %0, 8192
%50 = or i32 %48, %49
%51 = and i32 %47, -8193
%52 = or i32 %51, %49
store volatile i32 64, i32* inttoptr (i64 1074782296 to i32*)
%53 = icmp sgt i32 %0, -1
br i1 %53, label %55, label %54
54: ; preds = %37
store volatile i32 %52, i32* inttoptr (i64 1074782320 to i32*)
store volatile i32 %50, i32* inttoptr (i64 1074782304 to i32*)
br label %56
55: ; preds = %37
store volatile i32 %50, i32* inttoptr (i64 1074782304 to i32*)
store volatile i32 %52, i32* inttoptr (i64 1074782320 to i32*)
br label %56
56: ; preds = %55, %54
%57 = and i32 %50, -130023426
%58 = and i32 %0, 130023425
%59 = or i32 %57, %58
%60 = and i32 %52, -528482305
%61 = and i32 %0, 528482304
%62 = or i32 %60, %61
%63 = and i32 %0, 1073741824
%64 = icmp eq i32 %63, 0
br i1 %64, label %70, label %65
65: ; preds = %56
%66 = or i32 %59, 4194304
%67 = and i32 %62, -4194305
%68 = and i32 %0, 1077936128
%69 = or i32 %67, %68
br label %72
70: ; preds = %56
%71 = and i32 %62, -1073741825
br label %72
72: ; preds = %70, %65
%73 = phi i32 [ %66, %65 ], [ %59, %70 ]
%74 = phi i32 [ %69, %65 ], [ %71, %70 ]
%75 = and i32 %0, 2048
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %88
77: ; preds = %72, %77
%78 = phi i32 [ %82, %77 ], [ 32768, %72 ]
%79 = load volatile i32, i32* inttoptr (i64 1074782568 to i32*)
%80 = and i32 %79, 1
%81 = icmp eq i32 %80, 0
%82 = add nsw i32 %78, -1
%83 = icmp ugt i32 %78, 1
%84 = select i1 %81, i1 %83, i1 false
br i1 %84, label %77, label %85
85: ; preds = %77
%86 = and i32 %73, -2049
%87 = and i32 %74, -2049
br label %88
88: ; preds = %85, %72
%89 = phi i32 [ %73, %72 ], [ %86, %85 ]
%90 = phi i32 [ %74, %72 ], [ %87, %85 ]
store volatile i32 %89, i32* inttoptr (i64 1074782304 to i32*)
store volatile i32 %90, i32* inttoptr (i64 1074782320 to i32*)
%91 = tail call i32 @SysCtlDelay(i32 16)
br label %92
92: ; preds = %31, %34, %88
ret void
}