xunge/DecIR huggingface dataset:
unsigned int f41(unsigned int x, int y) {
  return (x >> y) | (x << (8 * sizeof(unsigned int) - y));
}


x86 assembly (clang, -O0):
<f41>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
movslq -0x8(%rbp),%rsi
mov    $0x20,%ecx
sub    %rsi,%rcx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f41>:
mov    %esi,%ecx
mov    %edi,%eax
ror    %cl,%eax
ret

LLVM IR (-O0):
define i32 @f41(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = sub i64 32, %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %8, %12
%14 = or i32 %7, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f41(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = sub i32 32, %1
%5 = shl i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
void REMR3NotifyPhysRamRegister(void) {}


x86 assembly (clang, -O0):
<REMR3NotifyPhysRamRegister>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<REMR3NotifyPhysRamRegister>:
ret

LLVM IR (-O0):
define void @REMR3NotifyPhysRamRegister() {
ret void
}

LLVM IR (-O2):
define void @REMR3NotifyPhysRamRegister() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
usage() {
  printf("usage : cliecho adresseIP_serveur(x.x.x.x)  numero_port_serveur\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [65 x i8] c"usage : cliecho adresseIP_serveur(x.x.x.x) numero_port_serveur\0A\00"
define i32 @usage() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [64 x i8] c"usage : cliecho adresseIP_serveur(x.x.x.x) numero_port_serveur\00"
define i32 @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([64 x i8], [64 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void VP8FiltersInitNEON(void) {}


x86 assembly (clang, -O0):
<VP8FiltersInitNEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VP8FiltersInitNEON>:
ret

LLVM IR (-O0):
define void @VP8FiltersInitNEON() {
ret void
}

LLVM IR (-O2):
define void @VP8FiltersInitNEON() {
ret void
}
void g_date_strftime() {}


x86 assembly (clang, -O0):
<g_date_strftime>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_date_strftime>:
ret

LLVM IR (-O0):
define void @g_date_strftime() {
ret void
}

LLVM IR (-O2):
define void @g_date_strftime() {
ret void
}
/* Type definitions */
struct tree_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ is_balanced_aux(struct tree_node *, int *);
int is_balanced(struct tree_node *root) {
  int res;
  (void)is_balanced_aux(root, &res);
  return res;
}


x86 assembly (clang, -O0):
<is_balanced>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <is_balanced_aux@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_balanced>:
push   %rax
lea    0x4(%rsp),%rsi
call   1030 <is_balanced_aux@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tree_node = type { i32 }
define i32 @is_balanced(%struct.tree_node* %0) {
%2 = alloca %struct.tree_node*
%3 = alloca i32
store %struct.tree_node* %0, %struct.tree_node** %2
%4 = load %struct.tree_node*, %struct.tree_node** %2
%5 = call i32 @is_balanced_aux(%struct.tree_node* %4, i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.tree_node = type { i32 }
define i32 @is_balanced(%struct.tree_node* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @is_balanced_aux(%struct.tree_node* %0, i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
int openexr_dd_close() { return 1; }


x86 assembly (clang, -O0):
<openexr_dd_close>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<openexr_dd_close>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @openexr_dd_close() {
ret i32 1
}

LLVM IR (-O2):
define i32 @openexr_dd_close() {
ret i32 1
}
/* Variables and functions */
regchar() {
  register char x, *p;
  x = *p++;
  x = *++p;
  x = *p--;
  x = *--p;
}


x86 assembly (clang, -O0):
<regchar>:
push   %rbp
mov    %rsp,%rbp
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x5(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    0x1(%rax),%al
mov    %al,-0x5(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x5(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
mov    -0x1(%rax),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regchar>:
ret

LLVM IR (-O0):
define i32 @regchar() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8*
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %3
%6 = load i8, i8* %4
store i8 %6, i8* %2
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
%9 = load i8, i8* %8
store i8 %9, i8* %2
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 -1
store i8* %11, i8** %3
%12 = load i8, i8* %10
store i8 %12, i8* %2
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 -1
store i8* %14, i8** %3
%15 = load i8, i8* %14
store i8 %15, i8* %2
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @regchar() {
ret i32 undef
}
/* Type definitions */
struct triple {
  int dummy;
};
struct compile_state {
  int dummy;
};

/* Variables and functions */
struct triple *do_farg(struct compile_state *, struct triple *, unsigned int);
struct triple *farg(struct compile_state *state, struct triple *func,
                    unsigned index) {
  return do_farg(state, func, index + 2);
}


x86 assembly (clang, -O0):
<farg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
add    $0x2,%edx
call   1030 <do_farg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<farg>:
add    $0x2,%edx
jmp    1030 <do_farg@plt>

LLVM IR (-O0):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define %struct.triple* @farg(%struct.compile_state* %0, %struct.triple* %1, i32 %2) {
%4 = alloca %struct.compile_state*
%5 = alloca %struct.triple*
%6 = alloca i32
store %struct.compile_state* %0, %struct.compile_state** %4
store %struct.triple* %1, %struct.triple** %5
store i32 %2, i32* %6
%7 = load %struct.compile_state*, %struct.compile_state** %4
%8 = load %struct.triple*, %struct.triple** %5
%9 = load i32, i32* %6
%10 = add i32 %9, 2
%11 = call %struct.triple* @do_farg(%struct.compile_state* %7, %struct.triple* %8, i32 %10)
ret %struct.triple* %11
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define %struct.triple* @farg(%struct.compile_state* %0, %struct.triple* %1, i32 %2) {
%4 = add i32 %2, 2
%5 = tail call %struct.triple* @do_farg(%struct.compile_state* %0, %struct.triple* %1, i32 %4)
ret %struct.triple* %5
}
/* Variables and functions */
int create_crv(int);
int /*<<< orphan*/ edit_frz_crv(int);
int freeze_crv(int ind) {
  int i;
  i = create_crv(ind);
  if (i < 0)
    return (-1);
  edit_frz_crv(i);
  return (1);
}


x86 assembly (clang, -O0):
<freeze_crv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <create_crv@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    114c <freeze_crv+0x2c>
movl   $0xffffffff,-0x4(%rbp)
jmp    115b <freeze_crv+0x3b>
mov    -0xc(%rbp),%edi
call   1040 <edit_frz_crv@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeze_crv>:
push   %rax
call   1030 <create_crv@plt>
test   %eax,%eax
js     1138 <freeze_crv+0x18>
mov    %eax,%edi
call   1040 <edit_frz_crv@plt>
mov    $0x1,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @freeze_crv(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @create_crv(i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %13
10: ; preds = %1
%11 = load i32, i32* %4
%12 = call i32 @edit_frz_crv(i32 %11)
store i32 1, i32* %2
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @freeze_crv(i32 %0) {
%2 = tail call i32 @create_crv(i32 %0)
%3 = icmp slt i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @edit_frz_crv(i32 %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ -1, %1 ]
ret i32 %7
}
void TZX_Write_End(void) {}


x86 assembly (clang, -O0):
<TZX_Write_End>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TZX_Write_End>:
ret

LLVM IR (-O0):
define void @TZX_Write_End() {
ret void
}

LLVM IR (-O2):
define void @TZX_Write_End() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ slip_begin();
int /*<<< orphan*/ slip_end();
int /*<<< orphan*/ slip_out(int /*<<< orphan*/);
int device_send(char *sbuf, int len) {
  sbuf += 14;
  slip_begin();
  while (len--)
    slip_out(*sbuf++);
  slip_end();
  return 0;
}


x86 assembly (clang, -O0):
<device_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0xe,%rax
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <slip_begin@plt>
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     1182 <device_send+0x52>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1050 <slip_out@plt>
jmp    1152 <device_send+0x22>
mov    $0x0,%al
call   1040 <slip_end@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_send>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <slip_begin@plt>
test   %ebp,%ebp
je     1163 <device_send+0x33>
mov    %ebp,%ebp
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
movsbl 0xe(%r14,%rbx,1),%edi
call   1050 <slip_out@plt>
add    $0x1,%rbx
cmp    %ebx,%ebp
jne    1150 <device_send+0x20>
xor    %eax,%eax
call   1040 <slip_end@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @device_send(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 14
store i8* %6, i8** %3
%7 = call i32 (...) @slip_begin()
br label %8
8: ; preds = %12, %2
%9 = load i32, i32* %4
%10 = add nsw i32 %9, -1
store i32 %10, i32* %4
%11 = icmp ne i32 %9, 0
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = call i32 @slip_out(i32 %16)
br label %8
18: ; preds = %8
%19 = call i32 (...) @slip_end()
ret i32 0
}

LLVM IR (-O2):
define i32 @device_send(i8* nocapture %0, i32 %1) {
%3 = tail call i32 (...) @slip_begin()
%4 = icmp eq i32 %1, 0
br i1 %4, label %16, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %0, i64 14
br label %7
7: ; preds = %5, %7
%8 = phi i32 [ %10, %7 ], [ %1, %5 ]
%9 = phi i8* [ %11, %7 ], [ %6, %5 ]
%10 = add nsw i32 %8, -1
%11 = getelementptr inbounds i8, i8* %9, i64 1
%12 = load i8, i8* %9
%13 = sext i8 %12 to i32
%14 = tail call i32 @slip_out(i32 %13)
%15 = icmp eq i32 %10, 0
br i1 %15, label %16, label %7
16: ; preds = %7, %2
%17 = tail call i32 (...) @slip_end()
ret i32 0
}
/* Variables and functions */
float calculos();
int /*<<< orphan*/ printf(char *, float);
void main() {
  float result = calculos();
  printf("Global: %f\n", result);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <calculos@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <calculos@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Global: %f\0A\00"
define void @main() {
%1 = alloca float
%2 = call float (...) @calculos()
store float %2, float* %1
%3 = load float, float* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %3)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"Global: %f\0A\00"
define void @main() {
%1 = tail call float (...) @calculos()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %1)
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int compar(char **s1, char **s2) { return strcmp(*s1, *s2); }


x86 assembly (clang, -O0):
<compar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compar>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compar(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = call i32 @strcmp(i8* %6, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @compar(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
%5 = tail call i32 @strcmp(i8* dereferenceable(1) %3, i8* dereferenceable(1) %4)
ret i32 %5
}
int adis16201_configure_ring(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<adis16201_configure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16201_configure_ring>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @adis16201_configure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @adis16201_configure_ring(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
void printd(data, cnt) const unsigned char *data;
int cnt;
{
  if (cnt > 16)
    cnt = 16;
  while (cnt-- > 0) {
    printf(" %02x", *data);
    ++data;
  }
}


x86 assembly (clang, -O0):
<printd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x10,-0xc(%rbp)
jle    1130 <printd+0x20>
movl   $0x10,-0xc(%rbp)
jmp    1135 <printd+0x25>
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    116f <printd+0x5f>
mov    -0x8(%rbp),%rax
movzbl (%rax),%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1135 <printd+0x25>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printd>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
jle    1149 <printd+0x39>
mov    %rdi,%rbx
cmp    $0x10,%esi
mov    $0x10,%ebp
cmovb  %esi,%ebp
add    $0x1,%ebp
lea    0xed0(%rip),%r14
movzbl (%rbx),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0x1,%rbx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1130 <printd+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [6 x i8] c" %02x\00"
define void @printd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 16
br i1 %6, label %7, label %8
7: ; preds = %2
store i32 16, i32* %4
br label %8
8: ; preds = %7, %2
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %4
%11 = add nsw i32 %10, -1
store i32 %11, i32* %4
%12 = icmp sgt i32 %10, 0
br i1 %12, label %13, label %20
13: ; preds = %9
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %16)
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %9
20: ; preds = %9
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c" %02x\00"
define void @printd(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = icmp ult i32 %1, 16
%6 = select i1 %5, i32 %1, i32 16
br label %7
7: ; preds = %4, %7
%8 = phi i32 [ %10, %7 ], [ %6, %4 ]
%9 = phi i8* [ %14, %7 ], [ %0, %4 ]
%10 = add nsw i32 %8, -1
%11 = load i8, i8* %9
%12 = zext i8 %11 to i32
%13 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = getelementptr inbounds i8, i8* %9, i64 1
%15 = icmp ugt i32 %8, 1
br i1 %15, label %7, label %16
16: ; preds = %7, %2
ret void
}
/* Variables and functions */
int SpinLock(int);
int BSP_GetSpinlock(int id) { return SpinLock(id); }


x86 assembly (clang, -O0):
<BSP_GetSpinlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <SpinLock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_GetSpinlock>:
jmp    1030 <SpinLock@plt>

LLVM IR (-O0):
define i32 @BSP_GetSpinlock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @SpinLock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @BSP_GetSpinlock(i32 %0) {
%2 = tail call i32 @SpinLock(i32 %0)
ret i32 %2
}
void MergeRGBRow_NEON() {}


x86 assembly (clang, -O0):
<MergeRGBRow_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MergeRGBRow_NEON>:
ret

LLVM IR (-O0):
define void @MergeRGBRow_NEON() {
ret void
}

LLVM IR (-O2):
define void @MergeRGBRow_NEON() {
ret void
}
/* Variables and functions */
double __nv_dadd_ru(double, double);
double __dadd_ru(double __a, double __b) { return __nv_dadd_ru(__a, __b); }


x86 assembly (clang, -O0):
<__dadd_ru>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <__nv_dadd_ru@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dadd_ru>:
jmp    1030 <__nv_dadd_ru@plt>

LLVM IR (-O0):
define double @__dadd_ru(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @__nv_dadd_ru(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @__dadd_ru(double %0, double %1) {
%3 = tail call double @__nv_dadd_ru(double %0, double %1)
ret double %3
}
void i2d_PublicKey(void) {}


x86 assembly (clang, -O0):
<i2d_PublicKey>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_PublicKey>:
ret

LLVM IR (-O0):
define void @i2d_PublicKey() {
ret void
}

LLVM IR (-O2):
define void @i2d_PublicKey() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *, int);
int xrand(int /*<<< orphan*/, int);
int write_number(FILE *file) { return fprintf(file, "%d", xrand(0, 1000000)); }


x86 assembly (clang, -O0):
<write_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %edi,%edi
mov    $0xf4240,%esi
call   1040 <xrand@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%edx
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_number>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
mov    $0xf4240,%esi
call   1040 <xrand@plt>
lea    0xec9(%rip),%rsi
mov    %rbx,%rdi
mov    %eax,%edx
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @write_number(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @xrand(i32 0, i32 1000000)
%5 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @write_number(i32* nocapture %0) {
%2 = tail call i32 @xrand(i32 0, i32 1000000)
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 %3
}
__attribute__((always_)) __attribute__((const)) unsigned
av_bswap16(unsigned x) {
  __asm__("rorw $8, %w0" : "+r"(x));
  return x;
}


x86 assembly (clang, -O0):
<av_bswap16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
ror    $0x8,%ax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_bswap16>:
mov    %edi,%eax
ror    $0x8,%ax
ret

LLVM IR (-O0):
define i32 @av_bswap16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @av_bswap16(i32 %0) {
%2 = tail call i32 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i32 %2
}
/* Variables and functions */
double exp(double);
double sigmoid_activation(const double x) {
  return 1.0 / (1.0 + exp(-1.0 * x));
}


x86 assembly (clang, -O0):
<sigmoid_activation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  0xec9(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  0xebd(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigmoid_activation>:
push   %rax
xorpd  0xee7(%rip),%xmm0
call   1030 <exp@plt>
movsd  0xeea(%rip),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sigmoid_activation(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double -1.000000e+00, %3
%5 = call double @exp(double %4)
%6 = fadd double 1.000000e+00, %5
%7 = fdiv double 1.000000e+00, %6
ret double %7
}

LLVM IR (-O2):
define double @sigmoid_activation(double %0) {
%2 = fneg double %0
%3 = tail call double @exp(double %2)
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double 1.000000e+00, %4
ret double %5
}
void main_main() {}


x86 assembly (clang, -O0):
<main_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_main>:
ret

LLVM IR (-O0):
define void @main_main() {
ret void
}

LLVM IR (-O2):
define void @main_main() {
ret void
}
void EVP_DecryptUpdate(void) {}


x86 assembly (clang, -O0):
<EVP_DecryptUpdate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_DecryptUpdate>:
ret

LLVM IR (-O0):
define void @EVP_DecryptUpdate() {
ret void
}

LLVM IR (-O2):
define void @EVP_DecryptUpdate() {
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int fatfs_stat(char const *, struct stat *);
int _stat(const char *path, struct stat *buf) { return fatfs_stat(path, buf); }


x86 assembly (clang, -O0):
<_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fatfs_stat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_stat>:
jmp    1030 <fatfs_stat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @_stat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @fatfs_stat(i8* %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @_stat(i8* %0, %struct.stat* %1) {
%3 = tail call i32 @fatfs_stat(i8* %0, %struct.stat* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fail();
void failnotone(int v) {
  if (v != 1)
    fail();
}


x86 assembly (clang, -O0):
<failnotone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     112c <failnotone+0x1c>
mov    $0x0,%al
call   1030 <fail@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<failnotone>:
cmp    $0x1,%edi
jne    1116 <failnotone+0x6>
ret
xor    %eax,%eax
jmp    1030 <fail@plt>

LLVM IR (-O0):
define void @failnotone(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @fail()
br label %7
7: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @failnotone(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @fail()
br label %5
5: ; preds = %3, %1
ret void
}
double meps() {
  double eps = 1.0;
  while ((1.0 + eps) != 1.0) {
    eps /= 2.0;
  }
  eps *= 2.0;
  return eps;
}


x86 assembly (clang, -O0):
<meps>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xee7(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  0xeda(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    113b <meps+0x3b>
jp     113b <meps+0x3b>
jmp    1156 <meps+0x56>
movsd  -0x8(%rbp),%xmm0
movsd  0xec0(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1111 <meps+0x11>
movsd  0xeaa(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<meps>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @meps() {
%1 = alloca double
store double 1.000000e+00, double* %1
br label %2
2: ; preds = %6, %0
%3 = load double, double* %1
%4 = fadd double 1.000000e+00, %3
%5 = fcmp une double %4, 1.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load double, double* %1
%8 = fdiv double %7, 2.000000e+00
store double %8, double* %1
br label %2
9: ; preds = %2
%10 = load double, double* %1
%11 = fmul double %10, 2.000000e+00
store double %11, double* %1
%12 = load double, double* %1
ret double %12
}

LLVM IR (-O2):
define double @meps() {
ret double 0x3CB0000000000000
}
/* Variables and functions */
int mkchunk(int, char **);
int main(int argc, char *argv[]) { return mkchunk(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <mkchunk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <mkchunk@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @mkchunk(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @mkchunk(i32 %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
double fmod(int, int);
double generateLinearCongruence(void) {
  static double xn = 1;
  double value = xn;
  xn = fmod((5 * xn + 3), 4096);
  return value;
}


x86 assembly (clang, -O0):
<generateLinearCongruence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  0x2f08(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0x2efb(%rip),%xmm0
movsd  0xecb(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec7(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
mov    $0x1000,%esi
call   1030 <fmod@plt>
movsd  %xmm0,0x2ecd(%rip)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateLinearCongruence>:
push   %rax
movsd  0x2f0f(%rip),%xmm1
movsd  %xmm1,(%rsp)
movsd  0xeda(%rip),%xmm0
mulsd  %xmm1,%xmm0
addsd  0xed6(%rip),%xmm0
cvttsd2si %xmm0,%edi
mov    $0x1000,%esi
call   1030 <fmod@plt>
movsd  %xmm0,0x2ee0(%rip)
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@generateLinearCongruence.xn = internal global double 1.000000e+00
define double @generateLinearCongruence() {
%1 = alloca double
%2 = load double, double* @generateLinearCongruence.xn
store double %2, double* %1
%3 = load double, double* @generateLinearCongruence.xn
%4 = call double @llvm.fmuladd.f64(double 5.000000e+00, double %3, double 3.000000e+00)
%5 = fptosi double %4 to i32
%6 = call double @fmod(i32 %5, i32 4096)
store double %6, double* @generateLinearCongruence.xn
%7 = load double, double* %1
ret double %7
}

LLVM IR (-O2):
@generateLinearCongruence.xn = internal unnamed_addr global double 1.000000e+00
define double @generateLinearCongruence() {
%1 = load double, double* @generateLinearCongruence.xn
%2 = tail call double @llvm.fmuladd.f64(double %1, double 5.000000e+00, double 3.000000e+00)
%3 = fptosi double %2 to i32
%4 = tail call double @fmod(i32 %3, i32 4096)
store double %4, double* @generateLinearCongruence.xn
ret double %1
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int unlock_regspace2_uniform(struct flashrom_flashctx *, int);
int unlock_regspace2_uniform_64k(struct flashrom_flashctx *flash) {
  return unlock_regspace2_uniform(flash, 64 * 1024);
}


x86 assembly (clang, -O0):
<unlock_regspace2_uniform_64k>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x10000,%esi
call   1030 <unlock_regspace2_uniform@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlock_regspace2_uniform_64k>:
mov    $0x10000,%esi
jmp    1030 <unlock_regspace2_uniform@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @unlock_regspace2_uniform_64k(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @unlock_regspace2_uniform(%struct.flashrom_flashctx* %3, i32 65536)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @unlock_regspace2_uniform_64k(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @unlock_regspace2_uniform(%struct.flashrom_flashctx* %0, i32 65536)
ret i32 %2
}
int bar(int b) {
  int x = 1;
  return b - x;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    -0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = sub nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = add nsw i32 %0, -1
ret i32 %2
}
char *icl_zlib_description(void) {
  return "Lempel-Ziv zlib LZ77 Huffman used in gzip";
}


x86 assembly (clang, -O0):
<icl_zlib_description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<icl_zlib_description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [42 x i8] c"Lempel-Ziv zlib LZ77 Huffman used in gzip\00"
define i8* @icl_zlib_description() {
ret i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [42 x i8] c"Lempel-Ziv zlib LZ77 Huffman used in gzip\00"
define i8* @icl_zlib_description() {
ret i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef int /*<<< orphan*/ __s32;

/* Variables and functions */
int /*<<< orphan*/ i2c_smbus_access(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                    int, int /*<<< orphan*/);
__s32 i2c_smbus_write_byte(int file, __u8 value) {
  return i2c_smbus_access(file, 0, value, 1, 0);
}


x86 assembly (clang, -O0):
<i2c_smbus_write_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
xor    %r8d,%r8d
mov    $0x1,%ecx
mov    %r8d,%esi
call   1030 <i2c_smbus_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_write_byte>:
mov    %esi,%edx
xor    %esi,%esi
mov    $0x1,%ecx
xor    %r8d,%r8d
jmp    1030 <i2c_smbus_access@plt>

LLVM IR (-O0):
define i32 @i2c_smbus_write_byte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @i2c_smbus_access(i32 %5, i32 0, i32 %6, i32 1, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @i2c_smbus_write_byte(i32 %0, i32 %1) {
%3 = tail call i32 @i2c_smbus_access(i32 %0, i32 0, i32 %1, i32 1, i32 0)
ret i32 %3
}
void *t(void *v) {
  int *p = (int *)v;
  *p = 4711;
}


x86 assembly (clang, -O0):
<t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x1267,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t>:
movl   $0x1267,(%rdi)
ret

LLVM IR (-O0):
define i8* @t(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
store i32* %6, i32** %4
%7 = load i32*, i32** %4
store i32 4711, i32* %7
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
define noalias i8* @t(i8* nocapture writeonly %0) {
%2 = bitcast i8* %0 to i32*
store i32 4711, i32* %2
ret i8* undef
}
/* Variables and functions */
scalar_t__ hIsFinite(double);
scalar_t__ hIsInd(double);
scalar_t__ hIsInf(double);
int hIsNan(double d) { return !(hIsFinite(d) || hIsInf(d) || hIsInd(d)); }


x86 assembly (clang, -O0):
<hIsNan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <hIsFinite@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1189 <hIsNan+0x59>
movsd  -0x8(%rbp),%xmm0
call   1040 <hIsInf@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1189 <hIsNan+0x59>
movsd  -0x8(%rbp),%xmm0
call   1050 <hIsInd@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hIsNan>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <hIsFinite@plt>
xor    %ebx,%ebx
test   %rax,%rax
jne    116a <hIsNan+0x3a>
movsd  0x8(%rsp),%xmm0
call   1040 <hIsInf@plt>
test   %rax,%rax
jne    116a <hIsNan+0x3a>
movsd  0x8(%rsp),%xmm0
call   1050 <hIsInd@plt>
xor    %ebx,%ebx
test   %rax,%rax
sete   %bl
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hIsNan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @hIsFinite(double %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load double, double* %2
%8 = call i64 @hIsInf(double %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load double, double* %2
%12 = call i64 @hIsInd(double %11)
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = xor i1 %15, true
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @hIsNan(double %0) {
%2 = tail call i64 @hIsFinite(double %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i64 @hIsInf(double %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = tail call i64 @hIsInd(double %0)
%9 = icmp eq i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 0, %4 ], [ 0, %1 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int add(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int ret = add(10, 20);
  printf("add returned %d\n", ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
mov    $0x14,%esi
call   1030 <add@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
mov    $0x14,%esi
call   1030 <add@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"add returned %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @add(i32 10, i32 20)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"add returned %d\0A\00"
define i32 @main() {
%1 = tail call i32 @add(i32 10, i32 20)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
typedef int /*<<< orphan*/ result;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, char *, int);
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
uint16_t read_uint16(char *bgof_value) {
  uint16_t result;
  memcpy(&result, bgof_value, sizeof(result));
  return ntohs(result);
}


x86 assembly (clang, -O0):
<read_uint16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%edi
call   1040 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_uint16>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%edi
call   1040 <ntohs@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @read_uint16(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i32* %3, i8* %4, i32 4)
%6 = load i32, i32* %3
%7 = call i32 @ntohs(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_uint16(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i8* %0, i32 4)
%5 = load i32, i32* %2
%6 = call i32 @ntohs(i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ print_trace();
int /*<<< orphan*/ printf(char *);
void seg_handler(int sig) {
  printf("SIGSEGV signal caught. Backtrace: \n");
  print_trace();
}


x86 assembly (clang, -O0):
<seg_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <print_trace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seg_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <print_trace@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"SIGSEGV signal caught. Backtrace: \0A\00"
define void @seg_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @print_trace()
ret void
}

LLVM IR (-O2):
@str = [35 x i8] c"SIGSEGV signal caught. Backtrace: \00"
define void @seg_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @print_trace()
ret void
}
int test_imm_93int16_reg(short val) {
  return ((val) & (0x93 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_93int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x93,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_93int16_reg>:
test   $0x93,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_93int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 147
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_93int16_reg(i16 signext %0) {
%2 = and i16 %0, 147
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int int_cmp(const void *a, const void *b) {
  const int *ia = a, *ib = b;
  return *ia - *ib;
}


x86 assembly (clang, -O0):
<int_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_cmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @int_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @int_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int errno;
int /*<<< orphan*/ printf(char *);
void DoStuff(int inError) {
  if (inError)
    errno = 1234;
  else
    printf("Doing stuff!\n");
}


x86 assembly (clang, -O0):
<DoStuff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1137 <DoStuff+0x27>
mov    0x2eb4(%rip),%rax
movl   $0x4d2,(%rax)
jmp    1143 <DoStuff+0x33>
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoStuff>:
test   %edi,%edi
je     1122 <DoStuff+0x12>
mov    0x2ec5(%rip),%rax
movl   $0x4d2,(%rax)
ret
lea    0xed7(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@errno = global i32 0
@.str = [14 x i8] c"Doing stuff!\0A\00"
define void @DoStuff(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 1234, i32* @errno
br label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@str = [13 x i8] c"Doing stuff!\00"
define void @DoStuff(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %4, label %3
3: ; preds = %1
store i32 1234, i32* @errno
br label %6
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %4, %3
ret void
}
__attribute__((no, noclone)) signed __int128 t129_3add(unsigned __int128 y) {
  signed __int128 r;
  if (__builtin_add_overflow(
          (signed __int128)((
              -((signed __int128)(((unsigned __int128)1 << (16 * 8 - 1)) - 1)) -
              1)),
          y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t129_3add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
xor    %eax,%eax
movabs $0x8000000000000000,%rsi
add    %rsi,%rcx
mov    %eax,%r9d
mov    %r9,%r8
adc    $0xffffffffffffffff,%r8
adc    $0xffffffffffffffff,%r9
mov    %r8d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%rdi
xor    %r9,%rdi
xor    %r8,%rax
or     %rdi,%rax
mov    %rcx,%rdi
shr    $0x3f,%rdi
xor    %rdi,%rsi
or     %rsi,%rax
setne  %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1194 <t129_3add+0x84>
jmp    119b <t129_3add+0x8b>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t129_3add>:
mov    %rdi,%rax
movabs $0x8000000000000000,%rdx
add    %rsi,%rdx
ret

LLVM IR (-O0):
define { i64, i64 } @t129_3add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = zext i128 %11 to i129
%13 = call { i129, i1 } @llvm.sadd.with.overflow.i129(i129 -170141183460469231731687303715884105728, i129 %12)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = sext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t129_3add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = add nsw i129 %7, -170141183460469231731687303715884105728
%9 = trunc i129 %8 to i64
%10 = lshr i129 %8, 64
%11 = trunc i129 %10 to i64
%12 = insertvalue { i64, i64 } poison, i64 %9, 0
%13 = insertvalue { i64, i64 } %12, i64 %11, 1
ret { i64, i64 } %13
}
int test_imm_C8int8_reg(signed char val) {
  return ((val) & (-0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff38,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8int8_reg>:
test   $0xffffff38,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -200
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C8int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -200
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
scalar_t__ _U_Qfcmp(long double, long double, int);
int _U_Qfunge(long double a, long double b) {
  return (_U_Qfcmp(a, b, 1 | 2 | 4 | 16) != 0);
}


x86 assembly (clang, -O0):
<_U_Qfunge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
mov    $0x17,%edi
call   1030 <_U_Qfcmp@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_U_Qfunge>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fldt   0x40(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
mov    $0x17,%edi
call   1030 <_U_Qfcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @_U_Qfunge(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @_U_Qfcmp(x86_fp80 %5, x86_fp80 %6, i32 23)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @_U_Qfunge(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @_U_Qfcmp(x86_fp80 %0, x86_fp80 %1, i32 23)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}