xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ memset(float *, int /*<<< orphan*/, int);
void luft_matrix_ident(float out[16]) {
  memset(out, 0, 16 * sizeof(float));
  out[0] = out[5] = out[10] = out[15] = 1;
}


x86 assembly (clang, -O0):
<luft_matrix_ident>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x40,%edx
call   1030 <memset@plt>
mov    -0x8(%rbp),%rax
movss  0xec8(%rip),%xmm0
movss  %xmm0,0x3c(%rax)
mov    -0x8(%rbp),%rax
movss  0xeb7(%rip),%xmm0
movss  %xmm0,0x28(%rax)
mov    -0x8(%rbp),%rax
movss  0xea6(%rip),%xmm0
movss  %xmm0,0x14(%rax)
mov    -0x8(%rbp),%rax
movss  0xe95(%rip),%xmm0
movss  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<luft_matrix_ident>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x40,%edx
call   1030 <memset@plt>
movl   $0x3f800000,0x3c(%rbx)
movl   $0x3f800000,0x28(%rbx)
movl   $0x3f800000,0x14(%rbx)
movl   $0x3f800000,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @luft_matrix_ident(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @memset(float* %3, i32 0, i32 64)
%5 = load float*, float** %2
%6 = getelementptr inbounds float, float* %5, i64 15
store float 1.000000e+00, float* %6
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 10
store float 1.000000e+00, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 5
store float 1.000000e+00, float* %10
%11 = load float*, float** %2
%12 = getelementptr inbounds float, float* %11, i64 0
store float 1.000000e+00, float* %12
ret void
}

LLVM IR (-O2):
define void @luft_matrix_ident(float* %0) {
%2 = tail call i32 @memset(float* %0, i32 0, i32 64)
%3 = getelementptr inbounds float, float* %0, i64 15
store float 1.000000e+00, float* %3
%4 = getelementptr inbounds float, float* %0, i64 10
store float 1.000000e+00, float* %4
%5 = getelementptr inbounds float, float* %0, i64 5
store float 1.000000e+00, float* %5
store float 1.000000e+00, float* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIGSEGV;
int /*<<< orphan*/ sigdelset(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ sigfillset(int /*<<< orphan*/ *);
scalar_t__ sigwait(int /*<<< orphan*/ *, int *);
int sys_sigwait(void) {
  sigset_t sigset;
  int sig;
  sigfillset(&sigset);
  sigdelset(&sigset, SIGSEGV);
  if (sigwait(&sigset, &sig) != 0) {
    return -1;
  }
  return sig;
}


x86 assembly (clang, -O0):
<sys_sigwait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1030 <sigfillset@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdi
call   1040 <sigdelset@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1050 <sigwait@plt>
cmp    $0x0,%rax
je     1176 <sys_sigwait+0x46>
movl   $0xffffffff,-0x4(%rbp)
jmp    117c <sys_sigwait+0x4c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_sigwait>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <sigfillset@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1040 <sigdelset@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <sigwait@plt>
neg    %rax
sbb    %eax,%eax
or     0x8(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SIGSEGV = global i32 0
define i32 @sys_sigwait() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @sigfillset(i32* %2)
%5 = load i32, i32* @SIGSEGV
%6 = call i32 @sigdelset(i32* %2, i32 %5)
%7 = call i64 @sigwait(i32* %2, i32* %3)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 -1, i32* %1
br label %12
10: ; preds = %0
%11 = load i32, i32* %3
store i32 %11, i32* %1
br label %12
12: ; preds = %10, %9
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@SIGSEGV = global i32 0
define i32 @sys_sigwait() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @sigfillset(i32* %1)
%6 = load i32, i32* @SIGSEGV
%7 = call i32 @sigdelset(i32* %1, i32 %6)
%8 = call i64 @sigwait(i32* %1, i32* %2)
%9 = icmp eq i64 %8, 0
%10 = load i32, i32* %2
%11 = select i1 %9, i32 %10, i32 -1
ret i32 %11
}
void avio_rl24() {}


x86 assembly (clang, -O0):
<avio_rl24>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_rl24>:
ret

LLVM IR (-O0):
define void @avio_rl24() {
ret void
}

LLVM IR (-O2):
define void @avio_rl24() {
ret void
}
/* Type definitions */
struct FileEntry {
  int dummy;
};

/* Variables and functions */
int read_chunk_text(struct FileEntry *);
int get_next(struct FileEntry *f) { return read_chunk_text(f); }


x86 assembly (clang, -O0):
<get_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <read_chunk_text@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_next>:
jmp    1030 <read_chunk_text@plt>

LLVM IR (-O0):
%struct.FileEntry = type { i32 }
define i32 @get_next(%struct.FileEntry* %0) {
%2 = alloca %struct.FileEntry*
store %struct.FileEntry* %0, %struct.FileEntry** %2
%3 = load %struct.FileEntry*, %struct.FileEntry** %2
%4 = call i32 @read_chunk_text(%struct.FileEntry* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.FileEntry = type { i32 }
define i32 @get_next(%struct.FileEntry* %0) {
%2 = tail call i32 @read_chunk_text(%struct.FileEntry* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void gloc_stdout() { exit(1); }


x86 assembly (clang, -O0):
<gloc_stdout>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<gloc_stdout>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @gloc_stdout() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @gloc_stdout() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello Caracal!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Hello Caracal!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [15 x i8] c"Hello Caracal!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int main() {
  long cpuns = cpu_ns();
  asm volatile("" ::"r"(cpuns));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <cpu_ns@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <cpu_ns@plt>
cltq
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = call i32 (...) @cpu_ns()
%4 = sext i32 %3 to i64
store i64 %4, i64* %2
%5 = load i64, i64* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @cpu_ns()
%2 = sext i32 %1 to i64
tail call void asm sideeffect "", "r,~{dirflag},~{fpsr},~{flags}"(i64 %2)
ret i32 0
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_size;
};
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ fstat(int, struct stat *);
off_t filesize(int fd) {
  struct stat buf;
  fstat(fd, &buf);
  return buf.st_size;
}


x86 assembly (clang, -O0):
<filesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1030 <fstat@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesize>:
push   %rax
mov    %rsp,%rsi
call   1030 <fstat@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @filesize(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.stat
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fstat(i32 %4, %struct.stat* %3)
%6 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @filesize(i32 %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @fstat(i32 %0, %struct.stat* %2)
%5 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}
void jsr() {
  asm volatile("movq %%rsp, %%r8\n\t"
               "movq 0x18(%%rbp), %%rsp\n\t"
               "movq 0x10(%%rbp), %%rcx\n\t"
               "movq 0x8(%%rsp), %%rdx\n\t"
               "pushq %%rcx\n\t"
               "subq %%rdx, %%rcx\n\t"
               "movq %%rsp, 0x18(%%rbp)\n\t"
               "movq %%r8, %%rsp\n\t"
               "movq 0x10(%%rsp), %%rax\n\t"
               "movq (%%rax), %%rbx\n\t"
               "subq %%rcx, %%rbx\n\t"
               "addq %%rbx, 0x10(%%rbp)\n\t"
               "movq 0x18(%%rbp), %%rdx\n\t"
               "addq %%rbx, 0x8(%%rdx)\n\t"
               "jmp *%%rax\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<jsr>:
push   %rbp
mov    %rsp,%rbp
mov    %rsp,%r8
mov    0x18(%rbp),%rsp
mov    0x10(%rbp),%rcx
mov    0x8(%rsp),%rdx
push   %rcx
sub    %rdx,%rcx
mov    %rsp,0x18(%rbp)
mov    %r8,%rsp
mov    0x10(%rsp),%rax
mov    (%rax),%rbx
sub    %rcx,%rbx
add    %rbx,0x10(%rbp)
mov    0x18(%rbp),%rdx
add    %rbx,0x8(%rdx)
jmp    *%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsr>:
mov    %rsp,%r8
mov    0x18(%rbp),%rsp
mov    0x10(%rbp),%rcx
mov    0x8(%rsp),%rdx
push   %rcx
sub    %rdx,%rcx
mov    %rsp,0x18(%rbp)
mov    %r8,%rsp
mov    0x10(%rsp),%rax
mov    (%rax),%rbx
sub    %rcx,%rbx
add    %rbx,0x10(%rbp)
mov    0x18(%rbp),%rdx
add    %rbx,0x8(%rdx)
jmp    *%rax
ret

LLVM IR (-O0):
define void @jsr() {
ret void
}

LLVM IR (-O2):
define void @jsr() {
tail call void asm sideeffect "movq %rsp, %r8\0A\09movq 0x18(%rbp), %rsp\0A\09movq 0x10(%rbp), %rcx\0A\09movq 0x8(%rsp), %rdx\0A\09pushq %rcx\0A\09subq %rdx, %rcx\0A\09movq %rsp, 0x18(%rbp)\0A\09movq %r8, %rsp\0A\09movq 0x10(%rsp), %rax\0A\09movq (%rax), %rbx\0A\09subq %rcx, %rbx\0A\09addq %rbx, 0x10(%rbp)\0A\09movq 0x18(%rbp), %rdx\0A\09addq %rbx, 0x8(%rdx)\0A\09jmp *%rax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void adt_freesp(const char **a) { free((char *)*a); }


x86 assembly (clang, -O0):
<adt_freesp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adt_freesp>:
mov    (%rdi),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @adt_freesp(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
ret void
}

LLVM IR (-O2):
define void @adt_freesp(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_test(char const *);
void just_write(void) {
  const char *filename = "/cluster2/test/testfile";
  write_test(filename);
  return;
}


x86 assembly (clang, -O0):
<just_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <write_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<just_write>:
lea    0xee9(%rip),%rdi
jmp    1030 <write_test@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"/cluster2/test/testfile\00"
define void @just_write() {
%1 = alloca i8*
store i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @write_test(i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"/cluster2/test/testfile\00"
define void @just_write() {
%1 = tail call i32 @write_test(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void default_logger(const char *msg) { fprintf(stderr, "%s\n", msg); }


x86 assembly (clang, -O0):
<default_logger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_logger>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @default_logger(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @default_logger(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
unsigned long clock_diff(unsigned long start, unsigned long stop) {
  return (start - stop);
}


x86 assembly (clang, -O0):
<clock_diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_diff>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @clock_diff(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @clock_diff(i64 %0, i64 %1) {
%3 = sub i64 %0, %1
ret i64 %3
}
/* Variables and functions */
int shutdown(int, int);
int _shutdown(int socket, int how) { return shutdown(socket, how); }


x86 assembly (clang, -O0):
<_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_shutdown>:
jmp    1030 <shutdown@plt>

LLVM IR (-O0):
define i32 @_shutdown(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @shutdown(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @_shutdown(i32 %0, i32 %1) {
%3 = tail call i32 @shutdown(i32 %0, i32 %1)
ret i32 %3
}
__attribute__((const)) unsigned floor_po2(unsigned x) {
  x |= x >> 1;
  x |= x >> 2;
  x |= x >> 4;
  x |= x >> 8;
  x |= x >> 16;
  return x - (x >> 1);
}


x86 assembly (clang, -O0):
<floor_po2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<floor_po2>:
mov    %edi,%eax
shr    %eax
or     %edi,%eax
mov    %eax,%ecx
shr    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    %ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @floor_po2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 1
%5 = load i32, i32* %2
%6 = or i32 %5, %4
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = lshr i32 %7, 2
%9 = load i32, i32* %2
%10 = or i32 %9, %8
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = lshr i32 %11, 4
%13 = load i32, i32* %2
%14 = or i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = lshr i32 %15, 8
%17 = load i32, i32* %2
%18 = or i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = lshr i32 %19, 16
%21 = load i32, i32* %2
%22 = or i32 %21, %20
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = load i32, i32* %2
%25 = lshr i32 %24, 1
%26 = sub i32 %23, %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @floor_po2(i32 %0) {
%2 = lshr i32 %0, 1
%3 = or i32 %2, %0
%4 = lshr i32 %3, 2
%5 = or i32 %4, %3
%6 = lshr i32 %5, 4
%7 = or i32 %6, %5
%8 = lshr i32 %7, 8
%9 = or i32 %8, %7
%10 = lshr i32 %9, 16
%11 = or i32 %10, %9
%12 = lshr i32 %11, 1
%13 = sub i32 %11, %12
ret i32 %13
}
char *Q_strupr(char *s1) {
  char *s;
  s = s1;
  while (*s) {
    if (*s >= 'a' && *s <= 'z')
      *s = *s - 'a' + 'A';
    s++;
  }
  return s1;
}


x86 assembly (clang, -O0):
<Q_strupr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1163 <Q_strupr+0x63>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x61,%eax
jl     1152 <Q_strupr+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7a,%eax
jg     1152 <Q_strupr+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <Q_strupr+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_strupr>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     112c <Q_strupr+0x2c>
lea    0x1(%rax),%rdx
jmp    111b <Q_strupr+0x1b>
nop
movzbl (%rdx),%ecx
add    $0x1,%rdx
test   %cl,%cl
je     112c <Q_strupr+0x2c>
lea    -0x61(%rcx),%esi
cmp    $0x19,%sil
ja     1110 <Q_strupr+0x10>
add    $0xe0,%cl
mov    %cl,-0x1(%rdx)
jmp    1110 <Q_strupr+0x10>
ret

LLVM IR (-O0):
define i8* @Q_strupr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %27, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %30
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %27
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 122
br i1 %18, label %19, label %27
19: ; preds = %14
%20 = load i8*, i8** %3
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = sub nsw i32 %22, 97
%24 = add nsw i32 %23, 65
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %3
store i8 %25, i8* %26
br label %27
27: ; preds = %19, %14, %9
%28 = load i8*, i8** %3
%29 = getelementptr inbounds i8, i8* %28, i32 1
store i8* %29, i8** %3
br label %5
30: ; preds = %5
%31 = load i8*, i8** %2
ret i8* %31
}

LLVM IR (-O2):
define i8* @Q_strupr(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -97
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nsw i8 %5, -32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret i8* %0
}
void RTMsgError(void) {}


x86 assembly (clang, -O0):
<RTMsgError>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMsgError>:
ret

LLVM IR (-O0):
define void @RTMsgError() {
ret void
}

LLVM IR (-O2):
define void @RTMsgError() {
ret void
}
char *RCSid() {
  return RCSid("$Id: time.c,v 1.24.2.2 2013/07/03 14:10:54 sfeam Exp $");
}


x86 assembly (clang, -O0):
<RCSid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <RCSid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCSid>:
jmp    1100 <RCSid>

LLVM IR (-O0):
@.str = [55 x i8] c"$Id: time.c,v 1.24.2.2 2013/07/03 14:10:54 sfeam Exp $\00"
define i8* @RCSid() {
%1 = call i8* (i8*, ...) bitcast (i8* ()* @RCSid to i8* (i8*, ...)*)(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @RCSid() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
struct mat2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat2_identity(float *);
__attribute__((always_)) struct mat2 *psmat2_identity(struct mat2 *result) {
  mat2_identity((float *)result);
  return result;
}


x86 assembly (clang, -O0):
<psmat2_identity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mat2_identity@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat2_identity>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat2_identity@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat2 = type { i32 }
define %struct.mat2* @psmat2_identity(%struct.mat2* %0) {
%2 = alloca %struct.mat2*
store %struct.mat2* %0, %struct.mat2** %2
%3 = load %struct.mat2*, %struct.mat2** %2
%4 = bitcast %struct.mat2* %3 to float*
%5 = call i32 @mat2_identity(float* %4)
%6 = load %struct.mat2*, %struct.mat2** %2
ret %struct.mat2* %6
}

LLVM IR (-O2):
%struct.mat2 = type { i32 }
define %struct.mat2* @psmat2_identity(%struct.mat2* returned %0) {
%2 = bitcast %struct.mat2* %0 to float*
%3 = tail call i32 @mat2_identity(float* %2)
ret %struct.mat2* %0
}
float ludcmp_fabs(float n) {
  float f;
  if (n >= 0)
    f = n;
  else
    f = -n;
  return f;
}


x86 assembly (clang, -O0):
<ludcmp_fabs>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1129 <ludcmp_fabs+0x29>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1140 <ludcmp_fabs+0x40>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ludcmp_fabs>:
movaps 0xef9(%rip),%xmm2
xorps  %xmm0,%xmm2
xorps  %xmm1,%xmm1
cmpnless %xmm0,%xmm1
andps  %xmm1,%xmm2
andnps %xmm0,%xmm1
orps   %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @ludcmp_fabs(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fcmp oge float %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load float, float* %2
store float %7, float* %3
br label %11
8: ; preds = %1
%9 = load float, float* %2
%10 = fneg float %9
store float %10, float* %3
br label %11
11: ; preds = %8, %6
%12 = load float, float* %3
ret float %12
}

LLVM IR (-O2):
define float @ludcmp_fabs(float %0) {
%2 = fcmp ult float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %3, float %0
ret float %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ lcd_send_command(int);
void lcd_set_cursor(uint8_t row, uint8_t column) {
  column--;
  switch (row) {
  case 1:
    lcd_send_command(column |= 0x80);
    break;
  case 2:
    lcd_send_command(column |= (0x80 | 0x40));
    break;
  default:
    break;
  }
}


x86 assembly (clang, -O0):
<lcd_set_cursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1,%eax
je     114c <lcd_set_cursor+0x3c>
jmp    113b <lcd_set_cursor+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1162 <lcd_set_cursor+0x52>
jmp    1178 <lcd_set_cursor+0x68>
mov    -0x8(%rbp),%edi
or     $0x80,%edi
mov    %edi,-0x8(%rbp)
call   1030 <lcd_send_command@plt>
jmp    117d <lcd_set_cursor+0x6d>
mov    -0x8(%rbp),%edi
or     $0xc0,%edi
mov    %edi,-0x8(%rbp)
call   1030 <lcd_send_command@plt>
jmp    117d <lcd_set_cursor+0x6d>
jmp    117d <lcd_set_cursor+0x6d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_set_cursor>:
cmp    $0x1,%edi
je     1121 <lcd_set_cursor+0x11>
cmp    $0x2,%edi
jne    1132 <lcd_set_cursor+0x22>
mov    $0xc0,%eax
jmp    1126 <lcd_set_cursor+0x16>
mov    $0x80,%eax
add    $0xffffffff,%esi
or     %eax,%esi
mov    %esi,%edi
jmp    1030 <lcd_send_command@plt>
ret

LLVM IR (-O0):
define void @lcd_set_cursor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add nsw i32 %5, -1
store i32 %6, i32* %4
%7 = load i32, i32* %3
switch i32 %7, label %16 [
i32 1, label %8
i32 2, label %12
]
8: ; preds = %2
%9 = load i32, i32* %4
%10 = or i32 %9, 128
store i32 %10, i32* %4
%11 = call i32 @lcd_send_command(i32 %10)
br label %17
12: ; preds = %2
%13 = load i32, i32* %4
%14 = or i32 %13, 192
store i32 %14, i32* %4
%15 = call i32 @lcd_send_command(i32 %14)
br label %17
16: ; preds = %2
br label %17
17: ; preds = %16, %12, %8
ret void
}

LLVM IR (-O2):
define void @lcd_set_cursor(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
switch i32 %0, label %9 [
i32 1, label %5
i32 2, label %4
]
4: ; preds = %2
br label %5
5: ; preds = %2, %4
%6 = phi i32 [ 192, %4 ], [ 128, %2 ]
%7 = or i32 %3, %6
%8 = tail call i32 @lcd_send_command(i32 %7)
br label %9
9: ; preds = %5, %2
ret void
}
char *guess_content_type(struct FileInfo *info) { return "text/plain"; }


x86 assembly (clang, -O0):
<guess_content_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<guess_content_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
%struct.FileInfo = type opaque
@.str = [11 x i8] c"text/plain\00"
define i8* @guess_content_type(%struct.FileInfo* %0) {
%2 = alloca %struct.FileInfo*
store %struct.FileInfo* %0, %struct.FileInfo** %2
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.FileInfo = type opaque
@.str = [11 x i8] c"text/plain\00"
define i8* @guess_content_type(%struct.FileInfo* nocapture readnone %0) {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
scalar_t__ ilogbf(float);
int /*<<< orphan*/ link_failure_ilogbf();
void test_ilogbf(float f) {
  if (ilogbf(f) != ilogbf(f))
    link_failure_ilogbf();
}


x86 assembly (clang, -O0):
<test_ilogbf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <ilogbf@plt>
mov    %rax,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <ilogbf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_ilogbf+0x3c>
mov    $0x0,%al
call   1040 <link_failure_ilogbf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ilogbf>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1030 <ilogbf@plt>
mov    %rax,%rbx
movss  0xc(%rsp),%xmm0
call   1030 <ilogbf@plt>
cmp    %rax,%rbx
jne    1149 <test_ilogbf+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_ilogbf@plt>

LLVM IR (-O0):
define void @test_ilogbf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @ilogbf(float %3)
%5 = load float, float* %2
%6 = call i64 @ilogbf(float %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_ilogbf()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_ilogbf(float %0) {
%2 = tail call i64 @ilogbf(float %0)
%3 = tail call i64 @ilogbf(float %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_ilogbf()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRSETMAPPERFLAGS_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 1, torev);
}


x86 assembly (clang, -O0):
<U_WMRSETMAPPERFLAGS_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRSETMAPPERFLAGS_swap>:
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRSETMAPPERFLAGS_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 1, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRSETMAPPERFLAGS_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 1, i32 %1)
ret void
}
/* Variables and functions */
size_t strnlen(const char *s, size_t maxlen) {
  size_t n = 0;
  while (*s != '\0' && n < maxlen) {
    s++;
    n++;
  }
  return n;
}


x86 assembly (clang, -O0):
<strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x19(%rbp)
je     1137 <strnlen+0x37>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
setb   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1147 <strnlen+0x47>
jmp    1164 <strnlen+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strnlen+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen>:
xor    %eax,%eax
cmpb   $0x0,(%rdi)
je     1136 <strnlen+0x36>
test   %rsi,%rsi
je     1136 <strnlen+0x36>
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,(%rdi,%rcx,1)
je     1132 <strnlen+0x32>
cmp    %rsi,%rcx
mov    %rax,%rcx
jb     1120 <strnlen+0x20>
add    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @strnlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %6
%12 = load i64, i64* %5
%13 = load i64, i64* %4
%14 = icmp ult i64 %12, %13
br label %15
15: ; preds = %11, %6
%16 = phi i1 [ false, %6 ], [ %14, %11 ]
br i1 %16, label %17, label %22
17: ; preds = %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
%20 = load i64, i64* %5
%21 = add i64 %20, 1
store i64 %21, i64* %5
br label %6
22: ; preds = %15
%23 = load i64, i64* %5
ret i64 %23
}

LLVM IR (-O2):
define i64 @strnlen(i8* nocapture %0, i64 %1) {
%3 = load i8, i8* %0
%4 = icmp ne i8 %3, 0
%5 = icmp ne i64 %1, 0
%6 = and i1 %4, %5
br i1 %6, label %7, label %16
7: ; preds = %2, %7
%8 = phi i64 [ %11, %7 ], [ 0, %2 ]
%9 = phi i8* [ %10, %7 ], [ %0, %2 ]
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = add nuw i64 %8, 1
%12 = load i8, i8* %10
%13 = icmp ne i8 %12, 0
%14 = icmp ult i64 %11, %1
%15 = select i1 %13, i1 %14, i1 false
br i1 %15, label %7, label %16
16: ; preds = %7, %2
%17 = phi i64 [ 0, %2 ], [ %11, %7 ]
ret i64 %17
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void TtlUnmarshal_uint32_t(uint8_t **cursor, uint32_t *x) {
  uint8_t *buffer = *cursor;
  *x = ((buffer[0] << 24) | (buffer[1] << 16) | (buffer[2] << 8) |
        (buffer[3] << 0));
  *cursor += 4;
}


x86 assembly (clang, -O0):
<TtlUnmarshal_uint32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
shl    $0x18,%ecx
mov    -0x18(%rbp),%rax
mov    0x4(%rax),%eax
shl    $0x10,%eax
or     %eax,%ecx
mov    -0x18(%rbp),%rax
mov    0x8(%rax),%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x18(%rbp),%rax
mov    0xc(%rax),%eax
shl    $0x0,%eax
or     %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x10,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TtlUnmarshal_uint32_t>:
mov    (%rdi),%rax
mov    (%rax),%ecx
mov    0x4(%rax),%edx
shl    $0x18,%ecx
shl    $0x10,%edx
or     %ecx,%edx
mov    0x8(%rax),%ecx
shl    $0x8,%ecx
or     %edx,%ecx
or     0xc(%rax),%ecx
mov    %ecx,(%rsi)
add    $0x10,%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @TtlUnmarshal_uint32_t(i32** %0, i32* %1) {
%3 = alloca i32**
%4 = alloca i32*
%5 = alloca i32*
store i32** %0, i32*** %3
store i32* %1, i32** %4
%6 = load i32**, i32*** %3
%7 = load i32*, i32** %6
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = shl i32 %10, 24
%12 = load i32*, i32** %5
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32, i32* %13
%15 = shl i32 %14, 16
%16 = or i32 %11, %15
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i64 2
%19 = load i32, i32* %18
%20 = shl i32 %19, 8
%21 = or i32 %16, %20
%22 = load i32*, i32** %5
%23 = getelementptr inbounds i32, i32* %22, i64 3
%24 = load i32, i32* %23
%25 = shl i32 %24, 0
%26 = or i32 %21, %25
%27 = load i32*, i32** %4
store i32 %26, i32* %27
%28 = load i32**, i32*** %3
%29 = load i32*, i32** %28
%30 = getelementptr inbounds i32, i32* %29, i64 4
store i32* %30, i32** %28
ret void
}

LLVM IR (-O2):
define void @TtlUnmarshal_uint32_t(i32** nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32*, i32** %0
%4 = load i32, i32* %3
%5 = shl i32 %4, 24
%6 = getelementptr inbounds i32, i32* %3, i64 1
%7 = load i32, i32* %6
%8 = shl i32 %7, 16
%9 = or i32 %8, %5
%10 = getelementptr inbounds i32, i32* %3, i64 2
%11 = load i32, i32* %10
%12 = shl i32 %11, 8
%13 = or i32 %9, %12
%14 = getelementptr inbounds i32, i32* %3, i64 3
%15 = load i32, i32* %14
%16 = or i32 %13, %15
store i32 %16, i32* %1
%17 = getelementptr inbounds i32, i32* %3, i64 4
store i32* %17, i32** %0
ret void
}
double doubleAdd(double a, double b) { return a + b; }


x86 assembly (clang, -O0):
<doubleAdd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubleAdd>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @doubleAdd(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @doubleAdd(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
two() { return (2); }


x86 assembly (clang, -O0):
<two>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<two>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @two() {
ret i32 2
}

LLVM IR (-O2):
define i32 @two() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ add_output(char *);
void gtp_name(int gtp_argc, char gtp_argv[][20]) {
  add_output("HaiGo");
  return;
}


x86 assembly (clang, -O0):
<gtp_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <add_output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtp_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <add_output@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"HaiGo\00"
define void @gtp_name(i32 %0, [20 x i8]* %1) {
%3 = alloca i32
%4 = alloca [20 x i8]*
store i32 %0, i32* %3
store [20 x i8]* %1, [20 x i8]** %4
%5 = call i32 @add_output(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"HaiGo\00"
define void @gtp_name(i32 %0, [20 x i8]* nocapture readnone %1) {
%3 = tail call i32 @add_output(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
short ulaw2linear(unsigned char u_val) {
  short t;
  u_val = ~u_val;
  t = ((u_val & (0xf)) << 3) + (0x84);
  t <<= ((unsigned)u_val & (0x70)) >> (4);
  return ((u_val & (0x80)) ? ((0x84) - t) : (t - (0x84)));
}


x86 assembly (clang, -O0):
<ulaw2linear>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
shl    $0x3,%eax
add    $0x84,%eax
mov    %ax,-0x4(%rbp)
movzbl -0x1(%rbp),%ecx
and    $0x70,%ecx
shr    $0x4,%ecx
movswl -0x4(%rbp),%eax
shl    %cl,%eax
mov    %ax,-0x4(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1160 <ulaw2linear+0x60>
movswl -0x4(%rbp),%ecx
mov    $0x84,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    116c <ulaw2linear+0x6c>
movswl -0x4(%rbp),%eax
sub    $0x84,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulaw2linear>:
not    %dil
movzbl %dil,%edx
lea    0x0(,%rdx,8),%eax
or     $0x84,%eax
movzbl %al,%eax
mov    %edx,%ecx
shr    $0x4,%cl
and    $0x7,%cl
shl    %cl,%eax
mov    $0x84,%ecx
sub    %eax,%ecx
add    $0xffffff7c,%eax
test   $0x80,%dl
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @ulaw2linear(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i16
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = xor i32 %5, -1
%7 = trunc i32 %6 to i8
store i8 %7, i8* %2
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
%11 = shl i32 %10, 3
%12 = add nsw i32 %11, 132
%13 = trunc i32 %12 to i16
store i16 %13, i16* %3
%14 = load i8, i8* %2
%15 = zext i8 %14 to i32
%16 = and i32 %15, 112
%17 = lshr i32 %16, 4
%18 = load i16, i16* %3
%19 = sext i16 %18 to i32
%20 = shl i32 %19, %17
%21 = trunc i32 %20 to i16
store i16 %21, i16* %3
%22 = load i8, i8* %2
%23 = zext i8 %22 to i32
%24 = and i32 %23, 128
%25 = icmp ne i32 %24, 0
br i1 %25, label %26, label %30
26: ; preds = %1
%27 = load i16, i16* %3
%28 = sext i16 %27 to i32
%29 = sub nsw i32 132, %28
br label %34
30: ; preds = %1
%31 = load i16, i16* %3
%32 = sext i16 %31 to i32
%33 = sub nsw i32 %32, 132
br label %34
34: ; preds = %30, %26
%35 = phi i32 [ %29, %26 ], [ %33, %30 ]
%36 = trunc i32 %35 to i16
ret i16 %36
}

LLVM IR (-O2):
define signext i16 @ulaw2linear(i8 zeroext %0) {
%2 = xor i8 %0, -1
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 3
%5 = and i32 %4, 120
%6 = or i32 %5, 132
%7 = lshr i32 %3, 4
%8 = and i32 %7, 7
%9 = shl i32 %6, %8
%10 = and i32 %3, 128
%11 = icmp eq i32 %10, 0
%12 = sub nsw i32 132, %9
%13 = add nuw nsw i32 %9, 65404
%14 = select i1 %11, i32 %13, i32 %12
%15 = trunc i32 %14 to i16
ret i16 %15
}
/* Type definitions */
struct mcuio_packet {
  int dummy;
};

/* Variables and functions */
int mcuio_data_size(int /*<<< orphan*/);
int /*<<< orphan*/ mcuio_packet_type(struct mcuio_packet *);
unsigned mcuio_packet_data_size(struct mcuio_packet *p) {
  return mcuio_data_size(mcuio_packet_type(p));
}


x86 assembly (clang, -O0):
<mcuio_packet_data_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mcuio_packet_type@plt>
mov    %eax,%edi
call   1040 <mcuio_data_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcuio_packet_data_size>:
push   %rax
call   1030 <mcuio_packet_type@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <mcuio_data_size@plt>

LLVM IR (-O0):
%struct.mcuio_packet = type { i32 }
define i32 @mcuio_packet_data_size(%struct.mcuio_packet* %0) {
%2 = alloca %struct.mcuio_packet*
store %struct.mcuio_packet* %0, %struct.mcuio_packet** %2
%3 = load %struct.mcuio_packet*, %struct.mcuio_packet** %2
%4 = call i32 @mcuio_packet_type(%struct.mcuio_packet* %3)
%5 = call i32 @mcuio_data_size(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.mcuio_packet = type { i32 }
define i32 @mcuio_packet_data_size(%struct.mcuio_packet* %0) {
%2 = tail call i32 @mcuio_packet_type(%struct.mcuio_packet* %0)
%3 = tail call i32 @mcuio_data_size(i32 %2)
ret i32 %3
}
/* Variables and functions */
scalar_t__ random();
int /*<<< orphan*/ srandom(unsigned int);
int get_random_number(unsigned int seed) {
  int retval = 0;
  srandom(seed);
  return ((int)random());
}


x86 assembly (clang, -O0):
<get_random_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srandom@plt>
mov    $0x0,%al
call   1040 <random@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_random_number>:
push   %rax
call   1030 <srandom@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <random@plt>

LLVM IR (-O0):
define i32 @get_random_number(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i32 @srandom(i32 %4)
%6 = call i64 (...) @random()
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_random_number(i32 %0) {
%2 = tail call i32 @srandom(i32 %0)
%3 = tail call i64 (...) @random()
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int *, int *);
int _swap(int *a, int *b) { printf("\na address %p b address %p", a, b); }


x86 assembly (clang, -O0):
<_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_swap>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"\0Aa address %p b address %p\00"
define i32 @_swap(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %4
%7 = load i32*, i32** %5
%8 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32* %6, i32* %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@.str = [27 x i8] c"\0Aa address %p b address %p\00"
define i32 @_swap(i32* %0, i32* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32* %0, i32* %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ can_rx(int);
void FDCAN3_IT0_IRQ_Handler(void) { can_rx(2); }


x86 assembly (clang, -O0):
<FDCAN3_IT0_IRQ_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <can_rx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FDCAN3_IT0_IRQ_Handler>:
mov    $0x2,%edi
jmp    1030 <can_rx@plt>

LLVM IR (-O0):
define void @FDCAN3_IT0_IRQ_Handler() {
%1 = call i32 @can_rx(i32 2)
ret void
}

LLVM IR (-O2):
define void @FDCAN3_IT0_IRQ_Handler() {
%1 = tail call i32 @can_rx(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *name) {
  fprintf(stderr, "Usage: %s [options] u1,v1,w1 ... un,vn,wn\n", name);
  fprintf(stderr, "For more information type: %s -h \n\n", name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xee2(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ec2(%rip),%r14
mov    (%r14),%edi
lea    0xed8(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xef1(%rip),%rsi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [43 x i8] c"Usage: %s [options] u1,v1,w1 ... un,vn,wn\0A\00"
@.str.1 = [36 x i8] c"For more information type: %s -h \0A\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stderr
%7 = load i8*, i8** %2
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [43 x i8] c"Usage: %s [options] u1,v1,w1 ... un,vn,wn\0A\00"
@.str.1 = [36 x i8] c"For more information type: %s -h \0A\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
void bus_fault(void) {
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<bus_fault>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <bus_fault+0x9>
jmp    1109 <bus_fault+0x9>

x86 assembly (clang, -O2):
<bus_fault>:
jmp    1100 <bus_fault>

LLVM IR (-O0):
define void @bus_fault() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @bus_fault() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void fprint_ret(FILE *stream) {
  fprintf(stream, "RET                             ");
}


x86 assembly (clang, -O0):
<fprint_ret>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_ret>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x20,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"RET \00"
define void @fprint_ret(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"RET \00"
define void @fprint_ret(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 32, i64 1, i32* %0)
ret void
}
int toBCD(int dec) {
  if (dec >= 100)
    return -1;
  return (dec / 10) * 0x10 + dec % 10;
}


x86 assembly (clang, -O0):
<toBCD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jl     111d <toBCD+0x1d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1141 <toBCD+0x41>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toBCD>:
mov    $0xffffffff,%eax
cmp    $0x63,%edi
jg     1131 <toBCD+0x31>
movslq %edi,%rax
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
mov    %eax,%ecx
shl    $0x4,%ecx
add    %eax,%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%edi
add    %ecx,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @toBCD(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 100
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %14
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 10
%10 = mul nsw i32 %9, 16
%11 = load i32, i32* %3
%12 = srem i32 %11, 10
%13 = add nsw i32 %10, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %7, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @toBCD(i32 %0) {
%2 = icmp sgt i32 %0, 99
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = sdiv i32 %0, 10
%5 = shl nsw i32 %4, 4
%6 = srem i32 %0, 10
%7 = add nsw i32 %5, %6
br label %8
8: ; preds = %1, %3
%9 = phi i32 [ %7, %3 ], [ -1, %1 ]
ret i32 %9
}