xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ test_arrays();
int /*<<< orphan*/ test_structs();
int main() {
  test_arrays();
  test_structs();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_arrays@plt>
mov    $0x0,%al
call   1030 <test_structs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_arrays@plt>
xor    %eax,%eax
call   1030 <test_structs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_arrays()
%3 = call i32 (...) @test_structs()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_arrays()
%2 = tail call i32 (...) @test_structs()
ret i32 0
}
/* Variables and functions */
int maxSubSum(int const *, int /*<<< orphan*/, int);
int maxSubsequenceSum(const int A[], int n) { return maxSubSum(A, 0, n - 1); }


x86 assembly (clang, -O0):
<maxSubsequenceSum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <maxSubSum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxSubsequenceSum>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <maxSubSum@plt>

LLVM IR (-O0):
define i32 @maxSubsequenceSum(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @maxSubSum(i32* %5, i32 0, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @maxSubsequenceSum(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @maxSubSum(i32* %0, i32 0, i32 %3)
ret i32 %4
}
void IntPrioritySet(unsigned int intrNum, unsigned int priority,
                    unsigned int hostIntRoute) {
  (*((volatile unsigned int *)((0x48200000) + (0x100 + ((intrNum)*0x04))))) =
      ((priority << (0x00000002u)) & (0x000001FCu)) | hostIntRoute;
}


x86 assembly (clang, -O0):
<IntPrioritySet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
shl    $0x2,%ecx
and    $0x1fc,%ecx
or     -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
add    $0x100,%eax
add    $0x48200000,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntPrioritySet>:
and    $0x7f,%esi
shl    $0x2,%esi
or     %edx,%esi
lea    0x48200100(,%rdi,4),%eax
mov    %esi,(%rax)
ret

LLVM IR (-O0):
define void @IntPrioritySet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = shl i32 %7, 2
%9 = and i32 %8, 508
%10 = load i32, i32* %6
%11 = or i32 %9, %10
%12 = load i32, i32* %4
%13 = mul i32 %12, 4
%14 = add i32 256, %13
%15 = add i32 1210056704, %14
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
store volatile i32 %11, i32* %17
ret void
}

LLVM IR (-O2):
define void @IntPrioritySet(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 2
%5 = and i32 %4, 508
%6 = or i32 %5, %2
%7 = shl i32 %0, 2
%8 = add i32 %7, 1210056960
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void shortenurl_outlook(char *url, int urllen) { strcpy(url, "Exchange"); }


x86 assembly (clang, -O0):
<shortenurl_outlook>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed6(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shortenurl_outlook>:
lea    0xee9(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Exchange\00"
define void @shortenurl_outlook(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @strcpy(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"Exchange\00"
define void @shortenurl_outlook(i8* %0, i32 %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
void deallocate_tile(void **first_tile, void *p) {
  *(void **)p = *first_tile;
  *first_tile = p;
}


x86 assembly (clang, -O0):
<deallocate_tile>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<deallocate_tile>:
mov    (%rdi),%rax
mov    %rax,(%rsi)
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @deallocate_tile(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i8**
store i8* %6, i8** %8
%9 = load i8*, i8** %4
%10 = load i8**, i8*** %3
store i8* %9, i8** %10
ret void
}

LLVM IR (-O2):
define void @deallocate_tile(i8** nocapture %0, i8* %1) {
%3 = load i8*, i8** %0
%4 = bitcast i8* %1 to i8**
store i8* %3, i8** %4
store i8* %1, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(unsigned char, int);
int /*<<< orphan*/ uart_wait_to_tx_byte();
int /*<<< orphan*/ uart_wait_until_sent();
void uart_tx_byte(unsigned char data) {
  uart_wait_to_tx_byte();
  outb(data, 1016 + 0x00);
  uart_wait_until_sent();
}


x86 assembly (clang, -O0):
<uart_tx_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1050 <uart_wait_to_tx_byte@plt>
mov    $0x3f8,%esi
movzbl -0x1(%rbp),%edi
call   1030 <outb@plt>
mov    $0x0,%al
call   1040 <uart_wait_until_sent@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_tx_byte>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <uart_wait_to_tx_byte@plt>
mov    %ebx,%edi
mov    $0x3f8,%esi
call   1030 <outb@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <uart_wait_until_sent@plt>

LLVM IR (-O0):
define void @uart_tx_byte(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 (...) @uart_wait_to_tx_byte()
%4 = load i8, i8* %2
%5 = call i32 @outb(i8 zeroext %4, i32 1016)
%6 = call i32 (...) @uart_wait_until_sent()
ret void
}

LLVM IR (-O2):
define void @uart_tx_byte(i8 zeroext %0) {
%2 = tail call i32 (...) @uart_wait_to_tx_byte()
%3 = tail call i32 @outb(i8 zeroext %0, i32 1016)
%4 = tail call i32 (...) @uart_wait_until_sent()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ static_assert(int);
int main() {
  int i, c;
  i = 0;
  c = 0;
  while (i < 1000) {
    c = c + i;
    i = i + 1;
  }
  static_assert(c >= 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jge    1151 <main+0x41>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <main+0x1d>
cmpl   $0x0,-0xc(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <static_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <static_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 1000
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32, i32* %2
%10 = add nsw i32 %8, %9
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
%15 = icmp sge i32 %14, 0
%16 = zext i1 %15 to i32
%17 = call i32 @static_assert(i32 %16)
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @static_assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
char *cambiarEspacioDeString(char *s, int contadorMax, int cambioEnEspacio) {
  char *sAux;
  int i;
  sAux = (char *)malloc((contadorMax + cambioEnEspacio) * sizeof(char));
  memcpy(sAux, s, contadorMax * sizeof(char));
  free(s);
  return sAux;
}


x86 assembly (clang, -O0):
<cambiarEspacioDeString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cambiarEspacioDeString>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    (%rdx,%r15,1),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1040 <memcpy@plt>
mov    %r14,%rdi
call   1030 <free@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @cambiarEspacioDeString(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
%12 = sext i32 %11 to i64
%13 = mul i64 %12, 1
%14 = trunc i64 %13 to i32
%15 = call i64 @malloc(i32 %14)
%16 = inttoptr i64 %15 to i8*
store i8* %16, i8** %7
%17 = load i8*, i8** %7
%18 = load i8*, i8** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = mul i64 %20, 1
%22 = trunc i64 %21 to i32
%23 = call i32 @memcpy(i8* %17, i8* %18, i32 %22)
%24 = load i8*, i8** %4
%25 = call i32 @free(i8* %24)
%26 = load i8*, i8** %7
ret i8* %26
}

LLVM IR (-O2):
define i8* @cambiarEspacioDeString(i8* %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, %1
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @memcpy(i8* %6, i8* %0, i32 %1)
%8 = tail call i32 @free(i8* %0)
ret i8* %6
}
__attribute__((weak)) void fd_nrf8001_change_timing_request_success(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define weak void @fd_nrf8001_change_timing_request_success() {
ret void
}

LLVM IR (-O2):
define weak void @fd_nrf8001_change_timing_request_success() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int standard_diagonal_cascade_solutions(int a, int b) {
  int fail;
  double *c;
  fail = _ada_use_c2phc(271, &a, &b, c);
  return fail;
}


x86 assembly (clang, -O0):
<standard_diagonal_cascade_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x18(%rbp),%rcx
mov    $0x10f,%edi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<standard_diagonal_cascade_solutions>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
mov    $0x10f,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @standard_diagonal_cascade_solutions(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load double*, double** %6
%8 = call i32 @_ada_use_c2phc(i32 271, i32* %3, i32* %4, double* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @standard_diagonal_cascade_solutions(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @_ada_use_c2phc(i32 271, i32* %3, i32* %4, double* undef)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *our_malloc(size_t size) {
  void *ret = malloc(size);
  if (!ret) {
    fprintf(stderr, ("%s: Out of memory!\n"), "getopt");
    exit(3);
  }
  return (ret);
}


x86 assembly (clang, -O0):
<our_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    117a <our_malloc+0x4a>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
lea    0xea9(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x3,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<our_malloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <our_malloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
lea    0xec0(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x3,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"%s: Out of memory!\0A\00"
@.str.1 = [7 x i8] c"getopt\00"
define i8* @our_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%11 = call i32 @exit(i32 3)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"%s: Out of memory!\0A\00"
@.str.1 = [7 x i8] c"getopt\00"
define noalias i8* @our_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%7 = tail call i32 @exit(i32 3)
unreachable
8: ; preds = %1
ret i8* %2
}
int clearBit(int bitVector, int pos) {
  bitVector &= ~(1 << pos);
  return bitVector;
}


x86 assembly (clang, -O0):
<clearBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearBit>:
mov    %edi,%eax
btr    %esi,%eax
ret

LLVM IR (-O0):
define i32 @clearBit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = xor i32 %6, -1
%8 = load i32, i32* %3
%9 = and i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @clearBit(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = xor i32 %3, -1
%5 = and i32 %4, %0
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ __m256i;

/* Variables and functions */
void _mm256_store_epi32(void *, int /*<<< orphan*/);
void test_mm256_store_epi32(void *__P, __m256i __A) {
  return _mm256_store_epi32(__P, __A);
}


x86 assembly (clang, -O0):
<test_mm256_store_epi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_mm256_store_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm256_store_epi32>:
jmp    1030 <_mm256_store_epi32@plt>

LLVM IR (-O0):
define void @test_mm256_store_epi32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @test_mm256_store_epi32(i8* %0, i32 %1) {
tail call void @_mm256_store_epi32(i8* %0, i32 %1)
ret void
}
void mmc_finalize() {}


x86 assembly (clang, -O0):
<mmc_finalize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmc_finalize>:
ret

LLVM IR (-O0):
define void @mmc_finalize() {
ret void
}

LLVM IR (-O2):
define void @mmc_finalize() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
char *asctime(struct tm *);
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void dbg_print_timestamp() {
  time_t rawtime;
  struct tm *timeinfo;
  time(&rawtime);
  timeinfo = localtime(&rawtime);
  printf("%s   ", asctime(timeinfo));
}


x86 assembly (clang, -O0):
<dbg_print_timestamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1060 <time@plt>
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <asctime@plt>
mov    %rax,%rsi
lea    0xe8f(%rip),%rdi
call   1050 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_print_timestamp>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1060 <time@plt>
mov    %rbx,%rdi
call   1030 <localtime@plt>
mov    %rax,%rdi
call   1040 <asctime@plt>
lea    0xe97(%rip),%rdi
mov    %rax,%rsi
call   1050 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [6 x i8] c"%s \00"
define void @dbg_print_timestamp() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i32* %1)
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = call i8* @asctime(%struct.tm* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [6 x i8] c"%s \00"
define void @dbg_print_timestamp() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @time(i32* %1)
%4 = call %struct.tm* @localtime(i32* %1)
%5 = call i8* @asctime(%struct.tm* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}
int ismemberi(int x, int *y, int n) {
  int i;
  for (i = 0; i < n; ++i)
    if (x == y[i])
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<ismemberi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1154 <ismemberi+0x54>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jne    1141 <ismemberi+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <ismemberi+0x5b>
jmp    1146 <ismemberi+0x46>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <ismemberi+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ismemberi>:
test   %edx,%edx
jle    111e <ismemberi+0x1e>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %edi,(%rsi,%rcx,4)
je     1121 <ismemberi+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <ismemberi+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ismemberi(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32, i32* %5
%15 = load i32*, i32** %6
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = icmp eq i32 %14, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @ismemberi(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %1, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %0
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
void Wheels_2_SaveConfig(void) {}


x86 assembly (clang, -O0):
<Wheels_2_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wheels_2_SaveConfig>:
ret

LLVM IR (-O0):
define void @Wheels_2_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @Wheels_2_SaveConfig() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void no_symtab(FILE *in, FILE *out) { exit(0); }


x86 assembly (clang, -O0):
<no_symtab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<no_symtab>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @no_symtab(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @no_symtab(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int rand();
int genera_numero_casuale(void) { return (rand() % 3); }


x86 assembly (clang, -O0):
<genera_numero_casuale>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<genera_numero_casuale>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @genera_numero_casuale() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 3
ret i32 %2
}

LLVM IR (-O2):
define i32 @genera_numero_casuale() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 3
ret i32 %2
}
int fib(int param1) {
  int i0;
  int o0;
  int o0_1;
  i0 = param1;
  if (param1 > 1) {
    o0 = fib(param1 - 1);
    o0_1 = fib(param1 - 2);
    i0 = o0 + o0_1;
  }
  return i0;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    1150 <fib+0x40>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jl     1136 <fib+0x26>
xor    %ebp,%ebp
xchg   %ax,%ax
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1120 <fib+0x10>
jmp    1138 <fib+0x28>
mov    %ebx,%ecx
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %19
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 1
%12 = call i32 @fib(i32 %11)
store i32 %12, i32* %4
%13 = load i32, i32* %2
%14 = sub nsw i32 %13, 2
%15 = call i32 @fib(i32 %14)
store i32 %15, i32* %5
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = add nsw i32 %16, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %9, %1
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ugt i32 %4, 3
br i1 %10, label %3, label %11
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
char *extGetIpAdd(void) { return ((char *)0); }


x86 assembly (clang, -O0):
<extGetIpAdd>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<extGetIpAdd>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @extGetIpAdd() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @extGetIpAdd() {
ret i8* null
}
Fatal(msg) char *msg;
{
  printf("Fatal Error: %s\n", msg);
  exit(1);
}


x86 assembly (clang, -O0):
<Fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<Fatal>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Fatal Error: %s\0A\00"
define i32 @Fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %3)
unreachable
}

LLVM IR (-O2):
@.str = [17 x i8] c"Fatal Error: %s\0A\00"
define i32 @Fatal(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %0)
tail call void @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("          Seoul     10,312,545        +91,375\n          Pusan      "
         "3,567,910         +5,868\n        Incheon      2,758,296        "
         "+64,888\n          Daegu      2,511,676        +17,230\n        "
         "Gwangju      1,454,636        +29,774");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [230 x i8] c" Seoul 10,312,545 +91,375\0A Pusan 3,567,910 +5,868\0A Incheon 2,758,296 +64,888\0A Daegu 2,511,676 +17,230\0A Gwangju 1,454,636 +29,774\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([230 x i8], [230 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [230 x i8] c" Seoul 10,312,545 +91,375\0A Pusan 3,567,910 +5,868\0A Incheon 2,758,296 +64,888\0A Daegu 2,511,676 +17,230\0A Gwangju 1,454,636 +29,774\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([230 x i8], [230 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double b2mb(size_t byte) { return (double)byte / (double)(1 << 20); }


x86 assembly (clang, -O0):
<b2mb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movaps 0xf01(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xf00(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xec9(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<b2mb>:
movq   %rdi,%xmm1
punpckldq 0xef3(%rip),%xmm1
subpd  0xefb(%rip),%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
mulsd  0xef7(%rip),%xmm0
ret

LLVM IR (-O0):
define double @b2mb(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = uitofp i64 %3 to double
%5 = fdiv double %4, 0x4130000000000000
ret double %5
}

LLVM IR (-O2):
define double @b2mb(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = fmul double %2, 0x3EB0000000000000
ret double %3
}
unsigned long int unsignedlongint_ignoring_signedlongint(unsigned long int x,
                                                         signed long int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlongint_ignoring_signedlongint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlongint_ignoring_signedlongint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlongint_ignoring_signedlongint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlongint_ignoring_signedlongint(i64 returned %0, i64 %1) {
ret i64 %0
}
AR0I1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if ((p0[10000000]) <= 33)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AR0I1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movzwl 0x1312d00(%rax),%eax
cmp    $0x21,%eax
jg     113f <AR0I1+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <AR0I1+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AR0I1>:
xor    %eax,%eax
cmpw   $0x22,0x1312d00(%r8)
01 22
setb   %al
ret

LLVM IR (-O0):
define i32 @AR0I1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %12
%17 = getelementptr inbounds i16, i16* %16, i64 10000000
%18 = load i16, i16* %17
%19 = zext i16 %18 to i32
%20 = icmp sle i32 %19, 33
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @AR0I1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture %4, i16* nocapture readnone %5) {
%7 = getelementptr inbounds i16, i16* %4, i64 10000000
%8 = load i16, i16* %7
%9 = icmp ult i16 %8, 34
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Type definitions */
typedef int uint32_t;
struct in_addr {
  int s_addr;
};
typedef int in_addr_t;

/* Variables and functions */
in_addr_t inet_lnaof(struct in_addr in) {
  uint32_t h = in.s_addr;
  if (h >> 24 < 128)
    return h & 0xffffff;
  if (h >> 24 < 192)
    return h & 0xffff;
  return h & 0xff;
}


x86 assembly (clang, -O0):
<inet_lnaof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
cmp    $0x80,%eax
jge    112e <inet_lnaof+0x2e>
mov    -0xc(%rbp),%eax
and    $0xffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    115a <inet_lnaof+0x5a>
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
cmp    $0xc0,%eax
jge    114f <inet_lnaof+0x4f>
mov    -0xc(%rbp),%eax
and    $0xffff,%eax
mov    %eax,-0x4(%rbp)
jmp    115a <inet_lnaof+0x5a>
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_lnaof>:
mov    %edi,%eax
and    $0xffffff,%eax
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i32 @inet_lnaof(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.in_addr
%4 = alloca i32
%5 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
store i32 %0, i32* %5
%6 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = ashr i32 %8, 24
%10 = icmp slt i32 %9, 128
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i32, i32* %4
%13 = and i32 %12, 16777215
store i32 %13, i32* %2
br label %24
14: ; preds = %1
%15 = load i32, i32* %4
%16 = ashr i32 %15, 24
%17 = icmp slt i32 %16, 192
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, i32* %4
%20 = and i32 %19, 65535
store i32 %20, i32* %2
br label %24
21: ; preds = %14
%22 = load i32, i32* %4
%23 = and i32 %22, 255
store i32 %23, i32* %2
br label %24
24: ; preds = %21, %18, %11
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @inet_lnaof(i32 %0) {
%2 = and i32 %0, 16777215
ret i32 %2
}
void loadSensorsPreset() {}


x86 assembly (clang, -O0):
<loadSensorsPreset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadSensorsPreset>:
ret

LLVM IR (-O0):
define void @loadSensorsPreset() {
ret void
}

LLVM IR (-O2):
define void @loadSensorsPreset() {
ret void
}
unsigned xrop3_119_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned stk1;
  stk1 = D & S;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_119_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_119_0_0>:
mov    %edi,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_119_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 8
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
store i32 %16, i32* %7
%17 = load i32, i32* %7
%18 = xor i32 %17, -1
store i32 %18, i32* %7
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @xrop3_119_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = xor i32 %3, -1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ cov_arr_log(long double *, int, char *, char *);
int /*<<< orphan*/ cov_log(long double, char *, char *);
void cov_spec_arr_log(long double ideal[], int size, long double delta,
                      char *fn) {
  cov_arr_log(ideal, size, "ideal", fn);
  cov_log(delta, "delta", fn);
}


x86 assembly (clang, -O0):
<cov_spec_arr_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x10(%rbp)
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
fstpt  -0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x28(%rbp),%rcx
lea    0xeb5(%rip),%rdx
call   1030 <cov_arr_log@plt>
fldt   -0x20(%rbp)
mov    -0x28(%rbp),%rsi
mov    %rsp,%rax
fstpt  (%rax)
lea    0xea3(%rip),%rdi
call   1040 <cov_log@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cov_spec_arr_log>:
push   %rbx
mov    %rdx,%rbx
lea    0xed5(%rip),%rdx
mov    %rbx,%rcx
call   1030 <cov_arr_log@plt>
lea    0xecc(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <cov_log@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ideal\00"
@.str.1 = [6 x i8] c"delta\00"
define void @cov_spec_arr_log(x86_fp80* %0, i32 %1, x86_fp80 %2, i8* %3) {
%5 = alloca x86_fp80*
%6 = alloca i32
%7 = alloca x86_fp80
%8 = alloca i8*
store x86_fp80* %0, x86_fp80** %5
store i32 %1, i32* %6
store x86_fp80 %2, x86_fp80* %7
store i8* %3, i8** %8
%9 = load x86_fp80*, x86_fp80** %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %8
%12 = call i32 @cov_arr_log(x86_fp80* %9, i32 %10, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = load x86_fp80, x86_fp80* %7
%14 = load i8*, i8** %8
%15 = call i32 @cov_log(x86_fp80 %13, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %14)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ideal\00"
@.str.1 = [6 x i8] c"delta\00"
define void @cov_spec_arr_log(x86_fp80* %0, i32 %1, x86_fp80 %2, i8* %3) {
%5 = tail call i32 @cov_arr_log(x86_fp80* %0, i32 %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3)
%6 = tail call i32 @cov_log(x86_fp80 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}
void DeleteChars(Howmany) int Howmany;
{
  char Str[10];
  if (Howmany == 0)
    return;
  sprintf(Str, "\033[%dP", Howmany);
  WRITETEST(Str);
}


x86 assembly (clang, -O0):
<DeleteChars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    113a <DeleteChars+0x1a>
jmp    115a <DeleteChars+0x3a>
lea    -0xe(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb8(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
lea    -0xe(%rbp),%rdi
mov    $0x0,%al
call   1030 <WRITETEST@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DeleteChars>:
test   %edi,%edi
je     1150 <DeleteChars+0x30>
push   %rbx
sub    $0x10,%rsp
mov    %edi,%edx
lea    0xece(%rip),%rsi
lea    0x6(%rsp),%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <WRITETEST@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dP\00"
define void @DeleteChars(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %13
7: ; preds = %1
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%9 = load i32, i32* %2
%10 = call i32 (i8*, i8*, ...) @sprintf(i8* %8, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%12 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %11)
br label %13
13: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dP\00"
define void @DeleteChars(i32 %0) {
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = icmp eq i32 %0, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = call i32 (i8*, i8*, ...) @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %3)
br label %8
8: ; preds = %1, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_init(int, char **);
int /*<<< orphan*/ test_msg(char *, char *, int);
int main(int argc, char **argv) {
  test_init(argc, argv);
  test_msg("SKIP: %s:%d: "
           "Inotify not supported."
           "\n",
           "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
           "2022-01-22/02-19-57/repos/AuthenticEshkinKot/criu/refs/heads/"
           "master/test/zdtm/live/static/inotify_system.c",
           388);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <test_init@plt>
lea    0xeb7(%rip),%rdi
lea    0xed5(%rip),%rsi
mov    $0x184,%edx
call   1040 <test_msg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <test_init@plt>
lea    0xed3(%rip),%rdi
lea    0xef1(%rip),%rsi
mov    $0x184,%edx
call   1040 <test_msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"SKIP: %s:%d: Inotify not supported.\0A\00"
@.str.1 = [171 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AuthenticEshkinKot/criu/refs/heads/master/test/zdtm/live/static/inotify_system.c\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @test_init(i32 %6, i8** %7)
%9 = call i32 @test_msg(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([171 x i8], [171 x i8]* @.str.1, i64 0, i64 0), i32 388)
ret i32 0
}

LLVM IR (-O2):
@.str = [37 x i8] c"SKIP: %s:%d: Inotify not supported.\0A\00"
@.str.1 = [171 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AuthenticEshkinKot/criu/refs/heads/master/test/zdtm/live/static/inotify_system.c\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @test_init(i32 %0, i8** %1)
%4 = tail call i32 @test_msg(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([171 x i8], [171 x i8]* @.str.1, i64 0, i64 0), i32 388)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char getc(int /*<<< orphan*/ *);
int /*<<< orphan*/ putc(char, int /*<<< orphan*/ *);
void directive(FILE *fp, FILE *tp) {
  char a = '#';
  while (a != '\n') {
    putc(a, tp);
    a = getc(fp);
  }
  putc(a, tp);
}


x86 assembly (clang, -O0):
<directive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movb   $0x23,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0xa,%eax
je     1161 <directive+0x41>
mov    -0x11(%rbp),%al
mov    -0x10(%rbp),%rsi
movsbl %al,%edi
call   1030 <putc@plt>
mov    -0x8(%rbp),%rdi
call   1040 <getc@plt>
mov    %al,-0x11(%rbp)
jmp    1134 <directive+0x14>
mov    -0x11(%rbp),%al
mov    -0x10(%rbp),%rsi
movsbl %al,%edi
call   1030 <putc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<directive>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x23,%al
nopl   0x0(%rax)
movsbl %al,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
mov    %rbx,%rdi
call   1040 <getc@plt>
cmp    $0xa,%al
jne    1130 <directive+0x10>
mov    $0xa,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putc@plt>

LLVM IR (-O0):
define void @directive(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i8
store i32* %0, i32** %3
store i32* %1, i32** %4
store i8 35, i8* %5
br label %6
6: ; preds = %10, %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 10
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8, i8* %5
%12 = load i32*, i32** %4
%13 = call i32 @putc(i8 signext %11, i32* %12)
%14 = load i32*, i32** %3
%15 = call signext i8 @getc(i32* %14)
store i8 %15, i8* %5
br label %6
16: ; preds = %6
%17 = load i8, i8* %5
%18 = load i32*, i32** %4
%19 = call i32 @putc(i8 signext %17, i32* %18)
ret void
}

LLVM IR (-O2):
define void @directive(i32* nocapture %0, i32* nocapture %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i8 [ 35, %2 ], [ %6, %3 ]
%5 = tail call i32 @putc(i8 signext %4, i32* %1)
%6 = tail call signext i8 @getc(i32* %0)
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = tail call i32 @putc(i8 signext 10, i32* %1)
ret void
}
/* Type definitions */
struct Allocator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void stdlib_free(struct Allocator *const allocator, void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<stdlib_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_free>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.Allocator = type { i32 }
define void @stdlib_free(%struct.Allocator* %0, i8* %1) {
%3 = alloca %struct.Allocator*
%4 = alloca i8*
store %struct.Allocator* %0, %struct.Allocator** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
%struct.Allocator = type { i32 }
define void @stdlib_free(%struct.Allocator* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Type definitions */
struct hostlist_t {
  int dummy;
};

/* Variables and functions */
struct hostlist_t *hostlist_push(struct hostlist_t **, char *, int, int);
struct hostlist_t *hostlist_name_push(struct hostlist_t **hl, char *name) {
  return hostlist_push(hl, name, -1, -1);
}


x86 assembly (clang, -O0):
<hostlist_name_push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xffffffff,%ecx
mov    %ecx,%edx
call   1030 <hostlist_push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hostlist_name_push>:
mov    $0xffffffff,%edx
mov    $0xffffffff,%ecx
jmp    1030 <hostlist_push@plt>

LLVM IR (-O0):
%struct.hostlist_t = type { i32 }
define %struct.hostlist_t* @hostlist_name_push(%struct.hostlist_t** %0, i8* %1) {
%3 = alloca %struct.hostlist_t**
%4 = alloca i8*
store %struct.hostlist_t** %0, %struct.hostlist_t*** %3
store i8* %1, i8** %4
%5 = load %struct.hostlist_t**, %struct.hostlist_t*** %3
%6 = load i8*, i8** %4
%7 = call %struct.hostlist_t* @hostlist_push(%struct.hostlist_t** %5, i8* %6, i32 -1, i32 -1)
ret %struct.hostlist_t* %7
}

LLVM IR (-O2):
%struct.hostlist_t = type { i32 }
define %struct.hostlist_t* @hostlist_name_push(%struct.hostlist_t** %0, i8* %1) {
%3 = tail call %struct.hostlist_t* @hostlist_push(%struct.hostlist_t** %0, i8* %1, i32 -1, i32 -1)
ret %struct.hostlist_t* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t rfcomm_event_channel_opened_get_max_frame_size(const uint8_t *event) {
  return little_endian_read_16(event, 14);
}


x86 assembly (clang, -O0):
<rfcomm_event_channel_opened_get_max_frame_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xe,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfcomm_event_channel_opened_get_max_frame_size>:
mov    $0xe,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @rfcomm_event_channel_opened_get_max_frame_size(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 14)
ret i32 %4
}

LLVM IR (-O2):
define i32 @rfcomm_event_channel_opened_get_max_frame_size(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 14)
ret i32 %2
}