#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ NRF24_CE_Disable();
int NRF24_Read_Reg(int);
int /*<<< orphan*/ NRF24_Write_Reg(int, int);
int NRF24_SendPolling(void) {
  volatile uint8_t status, fifo_status;
  int ret;
  do {
    status = NRF24_Read_Reg(0x07);
    fifo_status = NRF24_Read_Reg(0x17);
    if (status & (1 << 4)) {
      ret = -1;
      break;
    }
    if (status & (1 << 5)) {
      ret = 0;
      break;
    }
  } while (1);
  NRF24_CE_Disable();
  NRF24_Write_Reg(0x07, (1 << 5));
  return ret;
}


x86 assembly (clang, -O0):
<NRF24_SendPolling>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x7,%edi
call   1030 <NRF24_Read_Reg@plt>
mov    %eax,-0x4(%rbp)
mov    $0x17,%edi
call   1030 <NRF24_Read_Reg@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     116d <NRF24_SendPolling+0x3d>
movl   $0xffffffff,-0xc(%rbp)
jmp    119c <NRF24_SendPolling+0x6c>
mov    -0x4(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     1188 <NRF24_SendPolling+0x58>
movl   $0x0,-0xc(%rbp)
jmp    119c <NRF24_SendPolling+0x6c>
jmp    118d <NRF24_SendPolling+0x5d>
mov    $0x1,%al
test   $0x1,%al
jne    1138 <NRF24_SendPolling+0x8>
jmp    119c <NRF24_SendPolling+0x6c>
mov    $0x0,%al
call   1040 <NRF24_CE_Disable@plt>
mov    $0x7,%edi
mov    $0x20,%esi
call   1050 <NRF24_Write_Reg@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NRF24_SendPolling>:
push   %rbx
sub    $0x10,%rsp
cs nopw 0x0(%rax,%rax,1)
nop
mov    $0x7,%edi
call   1030 <NRF24_Read_Reg@plt>
mov    %eax,0x8(%rsp)
mov    $0x17,%edi
call   1030 <NRF24_Read_Reg@plt>
mov    %eax,0xc(%rsp)
testl  $0x10,0x8(%rsp)
jne    1174 <NRF24_SendPolling+0x44>
testl  $0x20,0x8(%rsp)
je     1140 <NRF24_SendPolling+0x10>
xor    %ebx,%ebx
jmp    1179 <NRF24_SendPolling+0x49>
mov    $0xffffffff,%ebx
xor    %eax,%eax
call   1040 <NRF24_CE_Disable@plt>
mov    $0x7,%edi
mov    $0x20,%esi
call   1050 <NRF24_Write_Reg@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @NRF24_SendPolling() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
br label %4
4: ; preds = %17, %0
%5 = call i32 @NRF24_Read_Reg(i32 7)
store volatile i32 %5, i32* %1
%6 = call i32 @NRF24_Read_Reg(i32 23)
store volatile i32 %6, i32* %2
%7 = load volatile i32, i32* %1
%8 = and i32 %7, 16
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %4
store i32 -1, i32* %3
br label %18
11: ; preds = %4
%12 = load volatile i32, i32* %1
%13 = and i32 %12, 32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 0, i32* %3
br label %18
16: ; preds = %11
br label %17
17: ; preds = %16
br i1 true, label %4, label %18
18: ; preds = %17, %15, %10
%19 = call i32 (...) @NRF24_CE_Disable()
%20 = call i32 @NRF24_Write_Reg(i32 7, i32 32)
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @NRF24_SendPolling() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
br label %5
5: ; preds = %11, %0
%6 = tail call i32 @NRF24_Read_Reg(i32 7)
store volatile i32 %6, i32* %1
%7 = tail call i32 @NRF24_Read_Reg(i32 23)
store volatile i32 %7, i32* %2
%8 = load volatile i32, i32* %1
%9 = and i32 %8, 16
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = load volatile i32, i32* %1
%13 = and i32 %12, 32
%14 = icmp eq i32 %13, 0
br i1 %14, label %5, label %15
15: ; preds = %11, %5
%16 = phi i32 [ -1, %5 ], [ 0, %11 ]
%17 = tail call i32 (...) @NRF24_CE_Disable()
%18 = tail call i32 @NRF24_Write_Reg(i32 7, i32 32)
ret i32 %16
}