xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage_helper(char *str) { fprintf(stderr, "\t%s\n", str); }


x86 assembly (clang, -O0):
<usage_helper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage_helper>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [5 x i8] c"\09%s\0A\00"
define void @usage_helper(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [5 x i8] c"\09%s\0A\00"
define void @usage_helper(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ copyhdu();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ readheader();
int /*<<< orphan*/ readimage();
int /*<<< orphan*/ readtable();
int /*<<< orphan*/ selectrows();
int /*<<< orphan*/ writeascii();
int /*<<< orphan*/ writebintable();
int /*<<< orphan*/ writeimage();
int main() {
  writeimage();
  writeascii();
  writebintable();
  copyhdu();
  selectrows();
  readheader();
  readimage();
  readtable();
  printf("\nAll the cfitsio cookbook routines ran successfully.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10a0 <writeimage@plt>
mov    $0x0,%al
call   1080 <writeascii@plt>
mov    $0x0,%al
call   1030 <writebintable@plt>
mov    $0x0,%al
call   10b0 <copyhdu@plt>
mov    $0x0,%al
call   1050 <selectrows@plt>
mov    $0x0,%al
call   1070 <readheader@plt>
mov    $0x0,%al
call   1090 <readimage@plt>
mov    $0x0,%al
call   1040 <readtable@plt>
lea    0xe22(%rip),%rdi
call   1060 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   10a0 <writeimage@plt>
xor    %eax,%eax
call   1080 <writeascii@plt>
xor    %eax,%eax
call   1040 <writebintable@plt>
xor    %eax,%eax
call   10b0 <copyhdu@plt>
xor    %eax,%eax
call   1060 <selectrows@plt>
xor    %eax,%eax
call   1070 <readheader@plt>
xor    %eax,%eax
call   1090 <readimage@plt>
xor    %eax,%eax
call   1050 <readtable@plt>
lea    0xe30(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [54 x i8] c"\0AAll the cfitsio cookbook routines ran successfully.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @writeimage()
%3 = call i32 (...) @writeascii()
%4 = call i32 (...) @writebintable()
%5 = call i32 (...) @copyhdu()
%6 = call i32 (...) @selectrows()
%7 = call i32 (...) @readheader()
%8 = call i32 (...) @readimage()
%9 = call i32 (...) @readtable()
%10 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [53 x i8] c"\0AAll the cfitsio cookbook routines ran successfully.\00"
define i32 @main() {
%1 = tail call i32 (...) @writeimage()
%2 = tail call i32 (...) @writeascii()
%3 = tail call i32 (...) @writebintable()
%4 = tail call i32 (...) @copyhdu()
%5 = tail call i32 (...) @selectrows()
%6 = tail call i32 (...) @readheader()
%7 = tail call i32 (...) @readimage()
%8 = tail call i32 (...) @readtable()
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @str, i64 0, i64 0))
ret i32 0
}
__attribute__((always_)) void __setup_vector_irq(int cpu) {}


x86 assembly (clang, -O0):
<__setup_vector_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__setup_vector_irq>:
ret

LLVM IR (-O0):
define void @__setup_vector_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @__setup_vector_irq(i32 %0) {
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t dmsafe(int32_t addr) { return addr & 0x100 - 1; }


x86 assembly (clang, -O0):
<dmsafe>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmsafe>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @dmsafe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
ret i32 %4
}

LLVM IR (-O2):
define i32 @dmsafe(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
/* Variables and functions */
char *getenv(char const *);
int perf_config_bool(char const *, char const *);
int perf_env_bool(const char *k, int def) {
  const char *v = getenv(k);
  return v ? perf_config_bool(k, v) : def;
}


x86 assembly (clang, -O0):
<perf_env_bool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115c <perf_env_bool+0x3c>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <perf_config_bool@plt>
mov    %eax,-0x1c(%rbp)
jmp    1162 <perf_env_bool+0x42>
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_env_bool>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <getenv@plt>
test   %rax,%rax
je     1143 <perf_env_bool+0x23>
mov    %rbx,%rdi
mov    %rax,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <perf_config_bool@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @perf_env_bool(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i8* @getenv(i8* %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = load i8*, i8** %5
%13 = call i32 @perf_config_bool(i8* %11, i8* %12)
br label %16
14: ; preds = %2
%15 = load i32, i32* %4
br label %16
16: ; preds = %14, %10
%17 = phi i32 [ %13, %10 ], [ %15, %14 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @perf_env_bool(i8* %0, i32 %1) {
%3 = tail call i8* @getenv(i8* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @perf_config_bool(i8* %0, i8* %3)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ %1, %2 ]
ret i32 %8
}
swap(char *a, char *b) {
  char temp = *a;
  *a = *b;
  *b = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x19(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define i32 @swap(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
store i8 %8, i8* %6
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = load i8*, i8** %4
store i8 %10, i8* %11
%12 = load i8, i8* %6
%13 = load i8*, i8** %5
store i8 %12, i8* %13
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @swap(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret i32 undef
}
/* Variables and functions */
int f59(int *);
int f60(int *p) { return f59(p); }


x86 assembly (clang, -O0):
<f60>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f59@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f60>:
jmp    1030 <f59@plt>

LLVM IR (-O0):
define i32 @f60(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f59(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f60(i32* %0) {
%2 = tail call i32 @f59(i32* %0)
ret i32 %2
}
int fc8300_tuner_deinit(void *handle, unsigned short devid) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fc8300_tuner_deinit(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8300_tuner_deinit(i8* nocapture readnone %0, i16 zeroext %1) {
ret i32 0
}
void RTAssertMsg2AddWeak(void) {}


x86 assembly (clang, -O0):
<RTAssertMsg2AddWeak>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAssertMsg2AddWeak>:
ret

LLVM IR (-O0):
define void @RTAssertMsg2AddWeak() {
ret void
}

LLVM IR (-O2):
define void @RTAssertMsg2AddWeak() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _find_dynamic();
int /*<<< orphan*/ _read_elf_header(uintptr_t);
int elfsym_startup(uintptr_t baddr) {
  _read_elf_header(baddr);
  _find_dynamic();
  return 1;
}


x86 assembly (clang, -O0):
<elfsym_startup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_read_elf_header@plt>
mov    $0x0,%al
call   1040 <_find_dynamic@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<elfsym_startup>:
push   %rax
call   1030 <_read_elf_header@plt>
xor    %eax,%eax
call   1040 <_find_dynamic@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @elfsym_startup(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @_read_elf_header(i64 %3)
%5 = call i32 (...) @_find_dynamic()
ret i32 1
}

LLVM IR (-O2):
define i32 @elfsym_startup(i64 %0) {
%2 = tail call i32 @_read_elf_header(i64 %0)
%3 = tail call i32 (...) @_find_dynamic()
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ munmap(void *, int);
void stack_free(void *p, int size) {
  size_t sp = (size_t)p - size;
  munmap((void *)sp, size);
}


x86 assembly (clang, -O0):
<stack_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <munmap@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_free>:
movslq %esi,%rsi
sub    %rsi,%rdi
jmp    1030 <munmap@plt>

LLVM IR (-O0):
define void @stack_free(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %6 to i64
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = sub i64 %7, %9
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = inttoptr i64 %11 to i8*
%13 = load i32, i32* %4
%14 = call i32 @munmap(i8* %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @stack_free(i8* %0, i32 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = sext i32 %1 to i64
%5 = sub i64 %3, %4
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @munmap(i8* %6, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void radio_df_cte_length_set(uint8_t value) {}


x86 assembly (clang, -O0):
<radio_df_cte_length_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_df_cte_length_set>:
ret

LLVM IR (-O0):
define void @radio_df_cte_length_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @radio_df_cte_length_set(i32 %0) {
ret void
}
char c_isprint(unsigned char c) {
  if (c >= 0x20 && c <= 0x7e)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<c_isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x20,%eax
jl     112d <c_isprint+0x2d>
movzbl -0x2(%rbp),%eax
cmp    $0x7e,%eax
jg     112d <c_isprint+0x2d>
movb   $0x1,-0x1(%rbp)
jmp    1131 <c_isprint+0x31>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_isprint>:
add    $0xe0,%dil
cmp    $0x5f,%dil
setb   %al
ret

LLVM IR (-O0):
define signext i8 @c_isprint(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 32
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 126
br i1 %10, label %11, label %12
11: ; preds = %7
store i8 1, i8* %2
br label %13
12: ; preds = %7, %1
store i8 0, i8* %2
br label %13
13: ; preds = %12, %11
%14 = load i8, i8* %2
ret i8 %14
}

LLVM IR (-O2):
define signext i8 @c_isprint(i8 zeroext %0) {
%2 = add i8 %0, -32
%3 = icmp ult i8 %2, 95
%4 = zext i1 %3 to i8
ret i8 %4
}
int test_imm_9Fuint8_reg(unsigned char val) {
  return ((val) & (0x9F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Fuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x9f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Fuint8_reg>:
test   $0x9f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Fuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 159
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Fuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -97
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int main(int argc, char *argv[]) { asm("mov %eax, 0x0"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %eax,0x0
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    %eax,0x0
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
tail call void asm sideeffect "mov %eax, 0x0", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ print_tap_result(char *, unsigned long, char const *,
                                    int /*<<< orphan*/);
int /*<<< orphan*/ safe_printf(char *);
void tap_not_ok_va(unsigned long testnum, const char *msg, va_list ap) {
  print_tap_result("not ok", testnum, msg, ap);
  safe_printf("\n");
}


x86 assembly (clang, -O0):
<tap_not_ok_va>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xebb(%rip),%rdi
call   1040 <print_tap_result@plt>
lea    0xeb6(%rip),%rdi
call   1030 <safe_printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tap_not_ok_va>:
push   %rax
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xed0(%rip),%rdi
call   1040 <print_tap_result@plt>
lea    0xecb(%rip),%rdi
pop    %rax
jmp    1030 <safe_printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"not ok\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @tap_not_ok_va(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i64, i64* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @print_tap_result(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %7, i8* %8, i32 %9)
%11 = call i32 @safe_printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"not ok\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @tap_not_ok_va(i64 %0, i8* %1, i32 %2) {
%4 = tail call i32 @print_tap_result(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %0, i8* %1, i32 %2)
%5 = tail call i32 @safe_printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int a = 1;
  int b = 1;
  int *x;
  int rnd;
  if (rnd)
    x = &a;
  else
    x = &b;
  assert(*x == 1);
  b = 2;
  assert(a == 1);
  if (*x != 0) {
    assert(a == 1);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1144 <main+0x34>
lea    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    114c <main+0x3c>
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpl   $0x1,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movl   $0x2,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rax
cmpl   $0x0,(%rax)
je     1196 <main+0x86>
cmpl   $0x1,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 1, i32* %3
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
store i32* %2, i32** %4
br label %10
9: ; preds = %0
store i32* %3, i32** %4
br label %10
10: ; preds = %9, %8
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 1
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
store i32 2, i32* %3
%16 = load i32, i32* %2
%17 = icmp eq i32 %16, 1
%18 = zext i1 %17 to i32
%19 = call i32 @assert(i32 %18)
%20 = load i32*, i32** %4
%21 = load i32, i32* %20
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %10
%24 = load i32, i32* %2
%25 = icmp eq i32 %24, 1
%26 = zext i1 %25 to i32
%27 = call i32 @assert(i32 %26)
br label %28
28: ; preds = %23, %10
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
%3 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SerialWriteString(char *);
void iRobot_RawDigitLED(unsigned short digit_three, unsigned short digit_two,
                        unsigned short digit_one, unsigned short digit_zero) {
  char data[] = {163, digit_three, digit_two, digit_one, digit_zero};
  SerialWriteString(data);
}


x86 assembly (clang, -O0):
<iRobot_RawDigitLED>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cx,%ax
mov    %dx,%cx
mov    %si,%dx
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %dx,-0x4(%rbp)
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
movb   $0xa3,-0xd(%rbp)
mov    -0x2(%rbp),%ax
mov    %al,-0xc(%rbp)
mov    -0x4(%rbp),%ax
mov    %al,-0xb(%rbp)
mov    -0x6(%rbp),%ax
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%ax
mov    %al,-0x9(%rbp)
lea    -0xd(%rbp),%rdi
call   1030 <SerialWriteString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iRobot_RawDigitLED>:
push   %rax
movb   $0xa3,0x3(%rsp)
mov    %dil,0x4(%rsp)
mov    %sil,0x5(%rsp)
mov    %dl,0x6(%rsp)
mov    %cl,0x7(%rsp)
lea    0x3(%rsp),%rdi
call   1030 <SerialWriteString@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @iRobot_RawDigitLED(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
%9 = alloca [5 x i8]
store i16 %0, i16* %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%10 = getelementptr inbounds [5 x i8], [5 x i8]* %9, i64 0, i64 0
store i8 -93, i8* %10
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i16, i16* %5
%13 = trunc i16 %12 to i8
store i8 %13, i8* %11
%14 = getelementptr inbounds i8, i8* %11, i64 1
%15 = load i16, i16* %6
%16 = trunc i16 %15 to i8
store i8 %16, i8* %14
%17 = getelementptr inbounds i8, i8* %14, i64 1
%18 = load i16, i16* %7
%19 = trunc i16 %18 to i8
store i8 %19, i8* %17
%20 = getelementptr inbounds i8, i8* %17, i64 1
%21 = load i16, i16* %8
%22 = trunc i16 %21 to i8
store i8 %22, i8* %20
%23 = getelementptr inbounds [5 x i8], [5 x i8]* %9, i64 0, i64 0
%24 = call i32 @SerialWriteString(i8* %23)
ret void
}

LLVM IR (-O2):
define void @iRobot_RawDigitLED(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca [5 x i8]
%6 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
store i8 -93, i8* %6
%7 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 1
%8 = trunc i16 %0 to i8
store i8 %8, i8* %7
%9 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 2
%10 = trunc i16 %1 to i8
store i8 %10, i8* %9
%11 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 3
%12 = trunc i16 %2 to i8
store i8 %12, i8* %11
%13 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 4
%14 = trunc i16 %3 to i8
store i8 %14, i8* %13
%15 = call i32 @SerialWriteString(i8* %6)
ret void
}
/* Variables and functions */
int expr_tail(int);
int factor();
int expr() {
  int lvalue = factor();
  return expr_tail(lvalue);
}


x86 assembly (clang, -O0):
<expr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <factor@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <expr_tail@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr>:
push   %rax
xor    %eax,%eax
call   1040 <factor@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <expr_tail@plt>

LLVM IR (-O0):
define i32 @expr() {
%1 = alloca i32
%2 = call i32 (...) @factor()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @expr_tail(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @expr() {
%1 = tail call i32 (...) @factor()
%2 = tail call i32 @expr_tail(i32 %1)
ret i32 %2
}
void INT_Excep_PERIB_INTB186(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB186>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB186>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB186() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB186() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef scalar_t__ __s32;

/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ exit(int);
scalar_t__ i2c_smbus_read_byte_data(int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
__s32 mcp_i2c_Read_byte(int fd, __u8 address) {
  __s32 res = i2c_smbus_read_byte_data(fd, address);
  if (res < 0) {
    printf("error \n");
    close(fd);
    exit(1);
  }
  return res;
}


x86 assembly (clang, -O0):
<mcp_i2c_Read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1050 <i2c_smbus_read_byte_data@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1186 <mcp_i2c_Read_byte+0x46>
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
mov    $0x1,%edi
call   1060 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcp_i2c_Read_byte>:
push   %rbx
mov    %edi,%ebx
call   1050 <i2c_smbus_read_byte_data@plt>
test   %rax,%rax
js     114f <mcp_i2c_Read_byte+0xf>
pop    %rbx
ret
lea    0xeaa(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
call   1040 <close@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"error \0A\00"
define i64 @mcp_i2c_Read_byte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i64 @i2c_smbus_read_byte_data(i32 %6, i32 %7)
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* %3
%14 = call i32 @close(i32 %13)
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %2
%17 = load i64, i64* %5
ret i64 %17
}

LLVM IR (-O2):
@str = [7 x i8] c"error \00"
define i64 @mcp_i2c_Read_byte(i32 %0, i32 %1) {
%3 = tail call i64 @i2c_smbus_read_byte_data(i32 %0, i32 %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%7 = tail call i32 @close(i32 %0)
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret i64 %3
}
long double tanl(long double x) {
  long double tmp;
  __asm__ __volatile__("fldt %0;"
                       "fptan;"
                       "fdivrp;"
                       "fstpt %0;"
                       "fstpt %1"
                       : "=m"(x), "=m"(tmp)
                       : "m"(x));
  return x;
}


x86 assembly (clang, -O0):
<tanl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fptan
fdivrp %st,%st(1)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanl>:
fldt   0x8(%rsp)
fstpt  -0x28(%rsp)
fldt   -0x28(%rsp)
fptan
fdivrp %st,%st(1)
fstpt  -0x28(%rsp)
fstpt  -0x18(%rsp)
fldt   -0x28(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @tanl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @tanl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = bitcast x86_fp80* %3 to i8*
%5 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %5
}
void ENGINE_load_rdrand(void) {}


x86 assembly (clang, -O0):
<ENGINE_load_rdrand>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ENGINE_load_rdrand>:
ret

LLVM IR (-O0):
define void @ENGINE_load_rdrand() {
ret void
}

LLVM IR (-O2):
define void @ENGINE_load_rdrand() {
ret void
}
/* Variables and functions */
double log(scalar_t__);
scalar_t__ sqrt(double);
double asinh(double x) { return log(x + sqrt(x * x + 1)); }


x86 assembly (clang, -O0):
<asinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb3(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1040 <sqrt@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sd %rax,%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asinh>:
push   %rax
movsd  %xmm0,(%rsp)
mulsd  %xmm0,%xmm0
addsd  0xece(%rip),%xmm0
call   1040 <sqrt@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  (%rsp),%xmm0
cvttsd2si %xmm0,%rdi
pop    %rax
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @asinh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double %4, double %5, double 1.000000e+00)
%7 = call i64 @sqrt(double %6)
%8 = sitofp i64 %7 to double
%9 = fadd double %3, %8
%10 = fptosi double %9 to i64
%11 = call double @log(i64 %10)
ret double %11
}

LLVM IR (-O2):
define double @asinh(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double %0, double 1.000000e+00)
%3 = tail call i64 @sqrt(double %2)
%4 = sitofp i64 %3 to double
%5 = fadd double %4, %0
%6 = fptosi double %5 to i64
%7 = tail call double @log(i64 %6)
ret double %7
}
/* Variables and functions */
int rand();
void repeated_conditionals() {
  int a, b;
  a = rand();
  b = rand();
  if (a < b) {
    if (b > a) {
      b += a;
      return;
    }
  } else {
    if (b <= a) {
      a += b;
      return;
    }
  }
  return;
}


x86 assembly (clang, -O0):
<repeated_conditionals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1157 <repeated_conditionals+0x47>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jle    1152 <repeated_conditionals+0x42>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    117b <repeated_conditionals+0x6b>
jmp    1176 <repeated_conditionals+0x66>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1171 <repeated_conditionals+0x61>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117b <repeated_conditionals+0x6b>
jmp    1176 <repeated_conditionals+0x66>
jmp    117b <repeated_conditionals+0x6b>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeated_conditionals>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rand@plt>

LLVM IR (-O0):
define void @repeated_conditionals() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @rand()
store i32 %3, i32* %1
%4 = call i32 (...) @rand()
store i32 %4, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %17
8: ; preds = %0
%9 = load i32, i32* %2
%10 = load i32, i32* %1
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = load i32, i32* %1
%14 = load i32, i32* %2
%15 = add nsw i32 %14, %13
store i32 %15, i32* %2
br label %27
16: ; preds = %8
br label %26
17: ; preds = %0
%18 = load i32, i32* %2
%19 = load i32, i32* %1
%20 = icmp sle i32 %18, %19
br i1 %20, label %21, label %25
21: ; preds = %17
%22 = load i32, i32* %2
%23 = load i32, i32* %1
%24 = add nsw i32 %23, %22
store i32 %24, i32* %1
br label %27
25: ; preds = %17
br label %26
26: ; preds = %25, %16
br label %27
27: ; preds = %26, %21, %12
ret void
}

LLVM IR (-O2):
define void @repeated_conditionals() {
%1 = tail call i32 (...) @rand()
%2 = tail call i32 (...) @rand()
ret void
}
unsigned int hashMap_hash(unsigned int h) {
  h += ~(h << 9);
  h ^= ((h >> 14) | (h << 18));
  h += (h << 4);
  h ^= ((h >> 10) | (h << 22));
  return h;
}


x86 assembly (clang, -O0):
<hashMap_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x9,%eax
xor    $0xffffffff,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xe,%eax
mov    -0x4(%rbp),%ecx
shl    $0x12,%ecx
or     %ecx,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x4,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xa,%eax
mov    -0x4(%rbp),%ecx
shl    $0x16,%ecx
or     %ecx,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashMap_hash>:
mov    %edi,%eax
shl    $0x9,%eax
not    %eax
add    %edi,%eax
mov    %eax,%ecx
rol    $0x12,%ecx
xor    %eax,%ecx
mov    %ecx,%edx
shl    $0x4,%edx
add    %ecx,%edx
mov    %edx,%eax
rol    $0x16,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hashMap_hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 9
%5 = xor i32 %4, -1
%6 = load i32, i32* %2
%7 = add i32 %6, %5
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = lshr i32 %8, 14
%10 = load i32, i32* %2
%11 = shl i32 %10, 18
%12 = or i32 %9, %11
%13 = load i32, i32* %2
%14 = xor i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = shl i32 %15, 4
%17 = load i32, i32* %2
%18 = add i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = lshr i32 %19, 10
%21 = load i32, i32* %2
%22 = shl i32 %21, 22
%23 = or i32 %20, %22
%24 = load i32, i32* %2
%25 = xor i32 %24, %23
store i32 %25, i32* %2
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @hashMap_hash(i32 %0) {
%2 = shl i32 %0, 9
%3 = xor i32 %2, -1
%4 = add i32 %3, %0
%5 = tail call i32 @llvm.fshl.i32(i32 %4, i32 %4, i32 18)
%6 = xor i32 %5, %4
%7 = mul i32 %6, 17
%8 = lshr i32 %7, 10
%9 = mul i32 %6, 71303168
%10 = or i32 %8, %9
%11 = xor i32 %10, %7
ret i32 %11
}
/* Type definitions */
struct queue {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int queue_iterator(void *context, struct queue *queue, void *data) {
  (void)context;
  (void)queue;
  printf("%s ", (char *)data);
  return 0;
}


x86 assembly (clang, -O0):
<queue_iterator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<queue_iterator>:
push   %rax
lea    0xee8(%rip),%rdi
mov    %rdx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.queue = type { i32 }
@.str = [4 x i8] c"%s \00"
define i32 @queue_iterator(i8* %0, %struct.queue* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca %struct.queue*
%6 = alloca i8*
store i8* %0, i8** %4
store %struct.queue* %1, %struct.queue** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load %struct.queue*, %struct.queue** %5
%9 = load i8*, i8** %6
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
ret i32 0
}

LLVM IR (-O2):
%struct.queue = type { i32 }
@.str = [4 x i8] c"%s \00"
define i32 @queue_iterator(i8* nocapture readnone %0, %struct.queue* nocapture readnone %1, i8* %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
extern void __outwc(unsigned short value, unsigned short port) {
  __asm__ __volatile__("out"
                       "w"
                       " %"
                       "w"
                       "0,%"
                       ""
                       "1"
                       :
                       : "a"(value), "id"(port));
}


x86 assembly (clang, -O0):
<__outwc>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
mov    -0x4(%rbp),%dx
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__outwc>:
mov    %esi,%edx
mov    %edi,%eax
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @__outwc(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @__outwc(i16 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "outw ${0:w},$1", "{ax},i{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0, i16 %1)
ret void
}
void gtk_radio_button_new_with_mnemonic() {}


x86 assembly (clang, -O0):
<gtk_radio_button_new_with_mnemonic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_radio_button_new_with_mnemonic>:
ret

LLVM IR (-O0):
define void @gtk_radio_button_new_with_mnemonic() {
ret void
}

LLVM IR (-O2):
define void @gtk_radio_button_new_with_mnemonic() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sendbyte(char);
void txline(char *linebuffer, int count, char check) {
  while (count--) {
    sendbyte(*linebuffer++);
  }
  sendbyte(check);
}


x86 assembly (clang, -O0):
<txline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     1154 <txline+0x44>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <sendbyte@plt>
jmp    1124 <txline+0x14>
movsbl -0xd(%rbp),%edi
call   1030 <sendbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txline>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
test   %esi,%esi
je     1142 <txline+0x32>
mov    %rdi,%r15
mov    %esi,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl (%r15,%rbx,1),%edi
call   1030 <sendbyte@plt>
add    $0x1,%rbx
cmp    %ebx,%ebp
jne    1130 <txline+0x20>
movsbl %r14b,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <sendbyte@plt>

LLVM IR (-O0):
define void @txline(i8* %0, i32 %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8 %2, i8* %6
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %5
%9 = add nsw i32 %8, -1
store i32 %9, i32* %5
%10 = icmp ne i32 %8, 0
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = call i32 @sendbyte(i8 signext %14)
br label %7
16: ; preds = %7
%17 = load i8, i8* %6
%18 = call i32 @sendbyte(i8 signext %17)
ret void
}

LLVM IR (-O2):
define void @txline(i8* nocapture %0, i32 %1, i8 signext %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %13, label %5
5: ; preds = %3, %5
%6 = phi i8* [ %9, %5 ], [ %0, %3 ]
%7 = phi i32 [ %8, %5 ], [ %1, %3 ]
%8 = add nsw i32 %7, -1
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = load i8, i8* %6
%11 = tail call i32 @sendbyte(i8 signext %10)
%12 = icmp eq i32 %8, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %3
%14 = tail call i32 @sendbyte(i8 signext %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ aes_init_keygen_tables();
int gcm_initialize(void) {
  aes_init_keygen_tables();
  return (0);
}


x86 assembly (clang, -O0):
<gcm_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <aes_init_keygen_tables@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcm_initialize>:
push   %rax
xor    %eax,%eax
call   1030 <aes_init_keygen_tables@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gcm_initialize() {
%1 = call i32 (...) @aes_init_keygen_tables()
ret i32 0
}

LLVM IR (-O2):
define i32 @gcm_initialize() {
%1 = tail call i32 (...) @aes_init_keygen_tables()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x39() {
  Assert_real((isspace(57) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              290, ("isspace should be 0 for 9"));
}


x86 assembly (clang, -O0):
<t_isspace_0x39>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x122,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x39>:
push   %rax
mov    $0x39,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x122,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for 9\00"
define void @t_isspace_0x39() {
%1 = call i64 @isspace(i32 57)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 290, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for 9\00"
define void @t_isspace_0x39() {
%1 = tail call i64 @isspace(i32 57)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 290, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void testClosureLLFrV(void (*closure)(long long, float), long long a1,
                      float a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureLLFrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
movss  -0x14(%rbp),%xmm0
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureLLFrV>:
mov    %rdi,%rax
mov    %rsi,%rdi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureLLFrV(void (i64, float)* %0, i64 %1, float %2) {
%4 = alloca void (i64, float)*
%5 = alloca i64
%6 = alloca float
store void (i64, float)* %0, void (i64, float)** %4
store i64 %1, i64* %5
store float %2, float* %6
%7 = load void (i64, float)*, void (i64, float)** %4
%8 = load i64, i64* %5
%9 = load float, float* %6
ret void
}

LLVM IR (-O2):
define void @testClosureLLFrV(void (i64, float)* nocapture %0, i64 %1, float %2) {
tail call void %0(i64 %1, float %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M251_f(char *s) {
  debug("M251_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M251_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M251_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M251_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M251_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M251_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M251_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
int gpio_raw_int_state_get(unsigned gpio) { return -1; }


x86 assembly (clang, -O0):
<gpio_raw_int_state_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_raw_int_state_get>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @gpio_raw_int_state_get(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @gpio_raw_int_state_get(i32 %0) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_STORE_CTX;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int SSLX_CTX_verify_callback(int unused, X509_STORE_CTX *ctx) {
  fprintf(stderr, "SSLX_CTX_verify_callback \n");
  return 1;
}


x86 assembly (clang, -O0):
<SSLX_CTX_verify_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSLX_CTX_verify_callback>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"SSLX_CTX_verify_callback \0A\00"
define i32 @SSLX_CTX_verify_callback(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"SSLX_CTX_verify_callback \0A\00"
define i32 @SSLX_CTX_verify_callback(i32 %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
char *CMUTIL_StrLTrim(char *);
int /*<<< orphan*/ CMUTIL_StrRTrim(char *);
char *CMUTIL_StrTrim(char *inp) {
  CMUTIL_StrRTrim(inp);
  return CMUTIL_StrLTrim(inp);
}


x86 assembly (clang, -O0):
<CMUTIL_StrTrim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <CMUTIL_StrRTrim@plt>
mov    -0x8(%rbp),%rdi
call   1040 <CMUTIL_StrLTrim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMUTIL_StrTrim>:
push   %rbx
mov    %rdi,%rbx
call   1030 <CMUTIL_StrRTrim@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <CMUTIL_StrLTrim@plt>

LLVM IR (-O0):
define i8* @CMUTIL_StrTrim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @CMUTIL_StrRTrim(i8* %3)
%5 = load i8*, i8** %2
%6 = call i8* @CMUTIL_StrLTrim(i8* %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @CMUTIL_StrTrim(i8* %0) {
%2 = tail call i32 @CMUTIL_StrRTrim(i8* %0)
%3 = tail call i8* @CMUTIL_StrLTrim(i8* %0)
ret i8* %3
}
/* Variables and functions */
int strlen(char *);
int /*<<< orphan*/ strncat(char *, char *, int);
void strncat_overflow_0(char *y) {
  char x[4] = "12";
  if (strlen(y) == 4)
    strncat(x, y, strlen(y));
}


x86 assembly (clang, -O0):
<strncat_overflow_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xece(%rip),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x4,%eax
jne    116f <strncat_overflow_0+0x4f>
lea    -0xc(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <strncat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncat_overflow_0>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movl   $0x3231,0xc(%rsp)
call   1030 <strlen@plt>
cmp    $0x4,%eax
jne    1151 <strncat_overflow_0+0x31>
mov    %rbx,%rdi
call   1030 <strlen@plt>
lea    0xc(%rsp),%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1040 <strncat@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.strncat_overflow_0.x = [4 x i8] c"12\00\00"
define void @strncat_overflow_0(i8* %0) {
%2 = alloca i8*
%3 = alloca [4 x i8]
store i8* %0, i8** %2
%4 = bitcast [4 x i8]* %3 to i8*
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = icmp eq i32 %6, 4
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%10 = load i8*, i8** %2
%11 = load i8*, i8** %2
%12 = call i32 @strlen(i8* %11)
%13 = call i32 @strncat(i8* %9, i8* %10, i32 %12)
br label %14
14: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @strncat_overflow_0(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 12849, i32* %2
%4 = tail call i32 @strlen(i8* %0)
%5 = icmp eq i32 %4, 4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = tail call i32 @strlen(i8* %0)
%8 = call i32 @strncat(i8* %3, i8* %0, i32 %7)
br label %9
9: ; preds = %6, %1
ret void
}