xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int clock_t;

/* Variables and functions */
int CLOCKS_PER_SEC;
int clock();
void f_delay(int tenth_sec) {
  clock_t start_t, end_t;
  long int i;
  start_t = clock();
  do {
    for (i = 0; i < 10000000; i++)
      ;
    end_t = clock();
  } while ((end_t - start_t) < (tenth_sec * CLOCKS_PER_SEC) / 10);
  return;
}


x86 assembly (clang, -O0):
<f_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <clock@plt>
mov    %eax,-0x8(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x989680,-0x18(%rbp)
jge    1151 <f_delay+0x41>
jmp    1140 <f_delay+0x30>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    112d <f_delay+0x1d>
mov    $0x0,%al
call   1030 <clock@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2e7a(%rip),%rcx
imul   (%rcx),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
cmp    %ecx,%eax
jl     1125 <f_delay+0x15>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_delay>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <clock@plt>
mov    %eax,%ebp
mov    0x2ec2(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <clock@plt>
sub    %ebp,%eax
mov    (%r14),%ecx
imul   %ebx,%ecx
movslq %ecx,%rcx
imul   $0x66666667,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
cmp    %ecx,%eax
jl     1130 <f_delay+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i32 0
define void @f_delay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %2
%6 = call i32 (...) @clock()
store i32 %6, i32* %3
br label %7
7: ; preds = %17, %1
store i64 0, i64* %5
br label %8
8: ; preds = %12, %7
%9 = load i64, i64* %5
%10 = icmp slt i64 %9, 10000000
br i1 %10, label %11, label %15
11: ; preds = %8
br label %12
12: ; preds = %11
%13 = load i64, i64* %5
%14 = add nsw i64 %13, 1
store i64 %14, i64* %5
br label %8
15: ; preds = %8
%16 = call i32 (...) @clock()
store i32 %16, i32* %4
br label %17
17: ; preds = %15
%18 = load i32, i32* %4
%19 = load i32, i32* %3
%20 = sub nsw i32 %18, %19
%21 = load i32, i32* %2
%22 = load i32, i32* @CLOCKS_PER_SEC
%23 = mul nsw i32 %21, %22
%24 = sdiv i32 %23, 10
%25 = icmp slt i32 %20, %24
br i1 %25, label %7, label %26
26: ; preds = %17
ret void
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i32 0
define void @f_delay(i32 %0) {
%2 = tail call i32 (...) @clock()
br label %3
3: ; preds = %3, %1
%4 = tail call i32 (...) @clock()
%5 = sub nsw i32 %4, %2
%6 = load i32, i32* @CLOCKS_PER_SEC
%7 = mul nsw i32 %6, %0
%8 = sdiv i32 %7, 10
%9 = icmp slt i32 %5, %8
br i1 %9, label %3, label %10
10: ; preds = %3
ret void
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_addr;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int inet_pton(int /*<<< orphan*/, char const *, int /*<<< orphan*/ *);
int is_valid_ip(const char *ip) {
  if (!ip) {
    return 0;
  }
  struct sockaddr_in sa;
  int result = inet_pton(AF_INET, ip, &(sa.sin_addr));
  return result != 0;
}


x86 assembly (clang, -O0):
<is_valid_ip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <is_valid_ip+0x23>
movl   $0x0,-0x4(%rbp)
jmp    115b <is_valid_ip+0x4b>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <inet_pton@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_ip>:
test   %rdi,%rdi
je     1138 <is_valid_ip+0x28>
push   %rax
mov    %rdi,%rsi
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
call   1030 <inet_pton@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
define i32 @is_valid_ip(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.sockaddr_in
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 0, i32* %2
br label %17
9: ; preds = %1
%10 = load i32, i32* @AF_INET
%11 = load i8*, i8** %3
%12 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %4, i32 0, i32 0
%13 = call i32 @inet_pton(i32 %10, i8* %11, i32* %12)
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = icmp ne i32 %14, 0
%16 = zext i1 %15 to i32
store i32 %16, i32* %2
br label %17
17: ; preds = %9, %8
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
define i32 @is_valid_ip(i8* %0) {
%2 = alloca %struct.sockaddr_in
%3 = icmp eq i8* %0, null
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = bitcast %struct.sockaddr_in* %2 to i8*
%6 = load i32, i32* @AF_INET
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0
%8 = call i32 @inet_pton(i32 %6, i8* %0, i32* %7)
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %4
%12 = phi i32 [ %10, %4 ], [ 0, %1 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cglit(int v) { ngen("%s\t$%d,%%rax", "movq", v); }


x86 assembly (clang, -O0):
<cglit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cglit>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xeed(%rip),%rsi
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"%s\09$%d,%%rax\00"
@.str.1 = [5 x i8] c"movq\00"
define void @cglit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ngen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"%s\09$%d,%%rax\00"
@.str.1 = [5 x i8] c"movq\00"
define void @cglit(i32 %0) {
%2 = tail call i32 @ngen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
char *hash_plugin_summary(void) { return ("sha512 \t\tSHA-512 plugin"); }


x86 assembly (clang, -O0):
<hash_plugin_summary>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_summary>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [24 x i8] c"sha512 \09\09SHA-512 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [24 x i8] c"sha512 \09\09SHA-512 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
void CL_Frame(int msec) {}


x86 assembly (clang, -O0):
<CL_Frame>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CL_Frame>:
ret

LLVM IR (-O0):
define void @CL_Frame(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @CL_Frame(i32 %0) {
ret void
}
void gtk_tree_view_set_headers_visible() {}


x86 assembly (clang, -O0):
<gtk_tree_view_set_headers_visible>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_set_headers_visible>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_set_headers_visible() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_set_headers_visible() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("FAIL\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"FAIL\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"FAIL\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int calcul(int n, int b, int opr) {
  int sum = 0;
  if (opr == 1) {
    sum = n + b;
  } else if (opr == 0) {
    sum = n - b;
  }
  return sum;
}


x86 assembly (clang, -O0):
<calcul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    112c <calcul+0x2c>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1144 <calcul+0x44>
cmpl   $0x0,-0xc(%rbp)
jne    113f <calcul+0x3f>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1144 <calcul+0x44>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcul>:
test   %edx,%edx
je     1110 <calcul+0x10>
xor    %eax,%eax
cmp    $0x1,%edx
jne    1114 <calcul+0x14>
add    %edi,%esi
mov    %esi,%eax
ret
sub    %esi,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @calcul(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %6
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = add nsw i32 %11, %12
store i32 %13, i32* %7
br label %22
14: ; preds = %3
%15 = load i32, i32* %6
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = sub nsw i32 %18, %19
store i32 %20, i32* %7
br label %21
21: ; preds = %17, %14
br label %22
22: ; preds = %21, %10
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @calcul(i32 %0, i32 %1, i32 %2) {
switch i32 %2, label %8 [
i32 1, label %4
i32 0, label %6
]
4: ; preds = %3
%5 = add nsw i32 %1, %0
br label %8
6: ; preds = %3
%7 = sub nsw i32 %0, %1
br label %8
8: ; preds = %3, %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ], [ 0, %3 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void xumem_write32(void *base, int offset, uint32_t val) {
  volatile uint32_t *p = (volatile uint32_t *)((char *)base + offset);
  *p = val;
}


x86 assembly (clang, -O0):
<xumem_write32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xumem_write32>:
movslq %esi,%rax
mov    %edx,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @xumem_write32(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %7
%13 = load i32, i32* %6
%14 = load i32*, i32** %7
store volatile i32 %13, i32* %14
ret void
}

LLVM IR (-O2):
define void @xumem_write32(i8* %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = bitcast i8* %5 to i32*
store volatile i32 %2, i32* %6
ret void
}
void swap(char *a, char *b) {
  char temp;
  temp = *b;
  *b = *a;
  *a = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rsi),%al
mov    (%rdi),%cl
mov    %cl,(%rsi)
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = load i8*, i8** %4
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %3
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @swap(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = load i8, i8* %0
store i8 %4, i8* %1
store i8 %3, i8* %0
ret void
}
/* Variables and functions */
long long intLSR(long long);
long long mask_value(long long);
int /*<<< orphan*/ set_carry(int const);
long long topbit_mask();
long long int intRR(long long int x) {
  const int cry = x & 1;
  set_carry(cry);
  x = intLSR(x);
  if (cry)
    x |= topbit_mask();
  return mask_value(x);
}


x86 assembly (clang, -O0):
<intRR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <set_carry@plt>
mov    -0x8(%rbp),%rdi
call   1060 <intLSR@plt>
mov    %rax,-0x8(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1185 <intRR+0x45>
mov    $0x0,%al
call   1050 <topbit_mask@plt>
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mask_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intRR>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
and    $0x1,%edi
call   1030 <set_carry@plt>
mov    %rbx,%rdi
call   1060 <intLSR@plt>
mov    %rax,%r14
and    $0x1,%ebx
je     1169 <intRR+0x29>
xor    %eax,%eax
call   1050 <topbit_mask@plt>
or     %rax,%r14
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <mask_value@plt>

LLVM IR (-O0):
define i64 @intRR(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 1
%6 = trunc i64 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @set_carry(i32 %7)
%9 = load i64, i64* %2
%10 = call i64 @intLSR(i64 %9)
store i64 %10, i64* %2
%11 = load i32, i32* %3
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %1
%14 = call i64 (...) @topbit_mask()
%15 = load i64, i64* %2
%16 = or i64 %15, %14
store i64 %16, i64* %2
br label %17
17: ; preds = %13, %1
%18 = load i64, i64* %2
%19 = call i64 @mask_value(i64 %18)
ret i64 %19
}

LLVM IR (-O2):
define i64 @intRR(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = and i32 %2, 1
%4 = tail call i32 @set_carry(i32 %3)
%5 = tail call i64 @intLSR(i64 %0)
%6 = icmp eq i32 %3, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = tail call i64 (...) @topbit_mask()
%9 = or i64 %8, %5
br label %10
10: ; preds = %7, %1
%11 = phi i64 [ %9, %7 ], [ %5, %1 ]
%12 = tail call i64 @mask_value(i64 %11)
ret i64 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void store32(void *dst, uint32_t w) { *(uint32_t *)dst = w; }


x86 assembly (clang, -O0):
<store32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<store32>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @store32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @store32(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
__attribute((no, noclone)) long syscall(unsigned int number, ...) {
  long ret;
  asm volatile("movq %%rsi, %%rdi\n"
               "movq %%rdx, %%rsi\n"
               "movq %%rcx, %%rdx\n"
               "movq %%r8, %%r10\n"
               "movq %%r9, %%r8\n"
               "movq 8(%%rsp),%%r9\n"
               "syscall"
               : "=a"(ret)
               : "a"(number)
               : "r10", "rdi", "rsi", "rdx", "r8");
  return ret;
}


x86 assembly (clang, -O0):
<syscall>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%r10
mov    %r9,%r8
mov    0x8(%rsp),%r9
syscall
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall>:
mov    %edi,%eax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%r10
mov    %r9,%r8
mov    0x8(%rsp),%r9
syscall
ret

LLVM IR (-O0):
define i64 @syscall(i32 %0, ...) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 asm sideeffect "movq %rsi, %rdi\0Amovq %rdx, %rsi\0Amovq %rcx, %rdx\0Amovq %r8, %r10\0Amovq %r9, %r8\0Amovq 8(%rsp),%r9\0Asyscall", "={ax},{ax},~{r10},~{rdi},~{rsi},~{rdx},~{r8},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @syscall(i32 %0, ...) {
%2 = tail call i64 asm sideeffect "movq %rsi, %rdi\0Amovq %rdx, %rsi\0Amovq %rcx, %rdx\0Amovq %r8, %r10\0Amovq %r9, %r8\0Amovq 8(%rsp),%r9\0Asyscall", "={ax},{ax},~{r10},~{rdi},~{rsi},~{rdx},~{r8},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i64 %2
}
void bwb_Warning_InvalidParameter(char *Message) {
  bwx_DEBUG(__FUNCTION__);
  bwb_Warning(5, Message);
}


x86 assembly (clang, -O0):
<bwb_Warning_InvalidParameter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
mov    $0x0,%al
call   1030 <bwx_DEBUG@plt>
mov    -0x8(%rbp),%rsi
mov    $0x5,%edi
mov    $0x0,%al
call   1040 <bwb_Warning@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwb_Warning_InvalidParameter>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1030 <bwx_DEBUG@plt>
mov    $0x5,%edi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1040 <bwb_Warning@plt>

LLVM IR (-O0):
@__FUNCTION__.bwb_Warning_InvalidParameter = [29 x i8] c"bwb_Warning_InvalidParameter\00"
define void @bwb_Warning_InvalidParameter(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @bwx_DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @__FUNCTION__.bwb_Warning_InvalidParameter, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @bwb_Warning to i32 (i32, i8*, ...)*)(i32 5, i8* %4)
ret void
}

LLVM IR (-O2):
@__FUNCTION__.bwb_Warning_InvalidParameter = [29 x i8] c"bwb_Warning_InvalidParameter\00"
define void @bwb_Warning_InvalidParameter(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @bwx_DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @__FUNCTION__.bwb_Warning_InvalidParameter, i64 0, i64 0))
%3 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @bwb_Warning to i32 (i32, i8*, ...)*)(i32 5, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _rpmalloc_heap_release(void *, int /*<<< orphan*/, int);
void _rpmalloc_heap_release_raw(void *heapptr, int release_cache) {
  _rpmalloc_heap_release(heapptr, 0, release_cache);
}


x86 assembly (clang, -O0):
<_rpmalloc_heap_release_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <_rpmalloc_heap_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rpmalloc_heap_release_raw>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <_rpmalloc_heap_release@plt>

LLVM IR (-O0):
define void @_rpmalloc_heap_release_raw(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @_rpmalloc_heap_release(i8* %5, i32 0, i32 %6)
ret void
}

LLVM IR (-O2):
define void @_rpmalloc_heap_release_raw(i8* %0, i32 %1) {
%3 = tail call i32 @_rpmalloc_heap_release(i8* %0, i32 0, i32 %1)
ret void
}
unsigned int _uiCommKeepLogin(unsigned int uiCommType) { return (0x0000); }


x86 assembly (clang, -O0):
<_uiCommKeepLogin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uiCommKeepLogin>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_uiCommKeepLogin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @_uiCommKeepLogin(i32 %0) {
ret i32 0
}
void tmpindex_dump() {}


x86 assembly (clang, -O0):
<tmpindex_dump>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tmpindex_dump>:
ret

LLVM IR (-O0):
define void @tmpindex_dump() {
ret void
}

LLVM IR (-O2):
define void @tmpindex_dump() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int SSL_TLSEXT_ERR_NOACK;
int cb_server_rejects_npn(SSL *s, const unsigned char **data, unsigned int *len,
                          void *arg) {
  return SSL_TLSEXT_ERR_NOACK;
}


x86 assembly (clang, -O0):
<cb_server_rejects_npn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_server_rejects_npn>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SSL_TLSEXT_ERR_NOACK = global i32 0
define i32 @cb_server_rejects_npn(i32* %0, i8** %1, i32* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i8**
%7 = alloca i32*
%8 = alloca i8*
store i32* %0, i32** %5
store i8** %1, i8*** %6
store i32* %2, i32** %7
store i8* %3, i8** %8
%9 = load i32, i32* @SSL_TLSEXT_ERR_NOACK
ret i32 %9
}

LLVM IR (-O2):
@SSL_TLSEXT_ERR_NOACK = global i32 0
define i32 @cb_server_rejects_npn(i32* nocapture readnone %0, i8** nocapture readnone %1, i32* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = load i32, i32* @SSL_TLSEXT_ERR_NOACK
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ mmpi_send_driller(int, void *, size_t);
int /*<<< orphan*/ mmpi_send_frags(int, void *, size_t);
void mmpi_send(int dest_rank, void *buf, size_t size) {
  if (size >= (0ULL))
    mmpi_send_driller(dest_rank, buf, size);
  else
    mmpi_send_frags(dest_rank, buf, size);
}


x86 assembly (clang, -O0):
<mmpi_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jb     1153 <mmpi_send+0x33>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <mmpi_send_driller@plt>
jmp    1163 <mmpi_send+0x43>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mmpi_send_frags@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmpi_send>:
jmp    1030 <mmpi_send_driller@plt>

LLVM IR (-O0):
define void @mmpi_send(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp uge i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @mmpi_send_driller(i32 %10, i8* %11, i64 %12)
br label %19
14: ; preds = %3
%15 = load i32, i32* %4
%16 = load i8*, i8** %5
%17 = load i64, i64* %6
%18 = call i32 @mmpi_send_frags(i32 %15, i8* %16, i64 %17)
br label %19
19: ; preds = %14, %9
ret void
}

LLVM IR (-O2):
define void @mmpi_send(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @mmpi_send_driller(i32 %0, i8* %1, i64 %2)
ret void
}
int test_imm_FCint64_lowword_mem(long long *val) {
  return ((*val) & (0xFC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FCint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xfc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FCint64_lowword_mem>:
testb  $0xfc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FCint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 252
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FCint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 252
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct SN_env {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SN_close_env(struct SN_env *, int /*<<< orphan*/);
extern void romanian_UTF_8_close_env(struct SN_env *z) { SN_close_env(z, 0); }


x86 assembly (clang, -O0):
<romanian_UTF_8_close_env>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <SN_close_env@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<romanian_UTF_8_close_env>:
xor    %esi,%esi
jmp    1030 <SN_close_env@plt>

LLVM IR (-O0):
%struct.SN_env = type { i32 }
define void @romanian_UTF_8_close_env(%struct.SN_env* %0) {
%2 = alloca %struct.SN_env*
store %struct.SN_env* %0, %struct.SN_env** %2
%3 = load %struct.SN_env*, %struct.SN_env** %2
%4 = call i32 @SN_close_env(%struct.SN_env* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.SN_env = type { i32 }
define void @romanian_UTF_8_close_env(%struct.SN_env* %0) {
%2 = tail call i32 @SN_close_env(%struct.SN_env* %0, i32 0)
ret void
}
void MSP430TimerM$CompareA1$fired(void) {
  MSP430TimerM$CompareA1$default$fired();
}


x86 assembly (clang, -O0):
<MSP430TimerM$CompareA1$fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MSP430TimerM$CompareA1$default$fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSP430TimerM$CompareA1$fired>:
xor    %eax,%eax
jmp    1030 <MSP430TimerM$CompareA1$default$fired@plt>

LLVM IR (-O0):
define void @"MSP430TimerM$CompareA1$fired"() {
%1 = call i32 (...) @"MSP430TimerM$CompareA1$default$fired"()
ret void
}

LLVM IR (-O2):
define void @"MSP430TimerM$CompareA1$fired"() {
%1 = tail call i32 (...) @"MSP430TimerM$CompareA1$default$fired"()
ret void
}
int stringlength(char *s) {
  int len = 0;
  while (*s != '\0') {
    len++;
    s++;
  }
  return len;
}


x86 assembly (clang, -O0):
<stringlength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1139 <stringlength+0x39>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <stringlength+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringlength>:
cmpb   $0x0,(%rdi)
je     111c <stringlength+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <stringlength+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stringlength(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @stringlength(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ data;

/* Variables and functions */
int /*<<< orphan*/ kernel_read(unsigned long, unsigned long *, int);
unsigned long kernel_read_ulong(unsigned long kaddr) {
  unsigned long data;
  kernel_read(kaddr, &data, sizeof(data));
  return data;
}


x86 assembly (clang, -O0):
<kernel_read_ulong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <kernel_read@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_read_ulong>:
push   %rax
mov    %rsp,%rsi
mov    $0x8,%edx
call   1030 <kernel_read@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @kernel_read_ulong(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i32 @kernel_read(i64 %4, i64* %3, i32 8)
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @kernel_read_ulong(i64 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @kernel_read(i64 %0, i64* %2, i32 8)
%5 = load i64, i64* %2
ret i64 %5
}
void slurtotie() {}


x86 assembly (clang, -O0):
<slurtotie>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slurtotie>:
ret

LLVM IR (-O0):
define void @slurtotie() {
ret void
}

LLVM IR (-O2):
define void @slurtotie() {
ret void
}
A0AX1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((*((int *)10000000)) <= (((int *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<A0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    $0x989680,%eax
mov    (%rax),%eax
movslq -0x14(%rbp),%rdx
mov    $0xa98ac7,%ecx
cmp    (%rcx,%rdx,4),%eax
jg     113d <A0AX1+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1144 <A0AX1+0x44>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<A0AX1>:
mov    0x989680,%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(,%rcx,4),%edx
setle  %al
ret

LLVM IR (-O0):
define i32 @A0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* inttoptr (i64 10000000 to i32*)
%15 = load i32, i32* %11
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %16
%18 = load i32, i32* %17
%19 = icmp sle i32 %14, %18
br i1 %19, label %20, label %21
20: ; preds = %6
store i32 1, i32* %7
br label %22
21: ; preds = %6
store i32 0, i32* %7
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @A0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture readnone %5) {
%7 = load i32, i32* inttoptr (i64 10000000 to i32*)
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %8
%10 = load i32, i32* %9
%11 = icmp sle i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int easy(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  while (n != 0) {
    printf("%d\n", easy(n));
    scanf("%d", &n);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
je     1184 <main+0x54>
mov    -0x8(%rbp),%edi
call   1040 <easy@plt>
mov    %eax,%esi
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
lea    0xe8a(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
jmp    114f <main+0x1f>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xec0(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
test   %edi,%edi
je     1192 <main+0x62>
lea    0xeaa(%rip),%r14
lea    0xea0(%rip),%r15
lea    0xc(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
nop
call   1040 <easy@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
test   %edi,%edi
jne    1170 <main+0x40>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i32 @easy(i32 %8)
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
%11 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
br label %4
12: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %0, %6
%7 = phi i32 [ %11, %6 ], [ %4, %0 ]
%8 = call i32 @easy(i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
%10 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%11 = load i32, i32* %1
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %6
13: ; preds = %6, %0
ret i32 0
}
void foo(int a, ...) {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0, ...) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, ...) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ link_error();
void test111(void) {
  unsigned int l0 = 3 / 2 + 2;
  unsigned int l1 = l0 * 4;
  unsigned int l2 = 7;
  unsigned int l3 = l1 & l2;
  unsigned int l4 = 3;
  unsigned int l5 = l3 ^ l4;
  unsigned int l6 = 8;
  unsigned int l7 = l5 % l6;
  unsigned int l8 = 2;
  unsigned int l9 = l7 << l8;
  unsigned int l10 = l9 + 1;
  unsigned int l11 = l10 >> 2;
  if (l11 != 7)
    link_error();
}


x86 assembly (clang, -O0):
<test111>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0x8(%rbp)
movl   $0x7,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
movl   $0x8,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
xor    %edx,%edx
divl   -0x1c(%rbp)
mov    %edx,-0x20(%rbp)
movl   $0x2,-0x24(%rbp)
mov    -0x20(%rbp),%eax
mov    -0x24(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
shr    $0x2,%eax
mov    %eax,-0x30(%rbp)
cmpl   $0x7,-0x30(%rbp)
je     118f <test111+0x7f>
mov    $0x0,%al
call   1030 <link_error@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test111>:
ret

LLVM IR (-O0):
define void @test111() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 3, i32* %1
%13 = load i32, i32* %1
%14 = mul i32 %13, 4
store i32 %14, i32* %2
store i32 7, i32* %3
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = and i32 %15, %16
store i32 %17, i32* %4
store i32 3, i32* %5
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = xor i32 %18, %19
store i32 %20, i32* %6
store i32 8, i32* %7
%21 = load i32, i32* %6
%22 = load i32, i32* %7
%23 = urem i32 %21, %22
store i32 %23, i32* %8
store i32 2, i32* %9
%24 = load i32, i32* %8
%25 = load i32, i32* %9
%26 = shl i32 %24, %25
store i32 %26, i32* %10
%27 = load i32, i32* %10
%28 = add i32 %27, 1
store i32 %28, i32* %11
%29 = load i32, i32* %11
%30 = lshr i32 %29, 2
store i32 %30, i32* %12
%31 = load i32, i32* %12
%32 = icmp ne i32 %31, 7
br i1 %32, label %33, label %35
33: ; preds = %0
%34 = call i32 (...) @link_error()
br label %35
35: ; preds = %33, %0
ret void
}

LLVM IR (-O2):
define void @test111() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(char *, int, int, int /*<<< orphan*/ *);
int asmNewLine(FILE *file) { return fwrite("\n", sizeof(char), 1, file) == 1; }


x86 assembly (clang, -O0):
<asmNewLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    0xed9(%rip),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fwrite@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asmNewLine>:
push   %rax
mov    %rdi,%rcx
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @asmNewLine(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1, i32 1, i32* %3)
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define i32 @asmNewLine(i32* nocapture %0) {
%2 = tail call i32 @fwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1, i32 1, i32* %0)
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ FH_DU();
int /*<<< orphan*/ init();
int /*<<< orphan*/ interface();
int main(void) {
  unsigned int i;
  for (i = 0; i < 173; i++) {
    init();
    interface();
    FH_DU();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xad,-0x8(%rbp)
jae    1176 <main+0x46>
mov    $0x0,%al
call   1040 <init@plt>
mov    $0x0,%al
call   1030 <interface@plt>
mov    $0x0,%al
call   1050 <FH_DU@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1146 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xad,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <init@plt>
xor    %eax,%eax
call   1030 <interface@plt>
xor    %eax,%eax
call   1050 <FH_DU@plt>
add    $0xffffffff,%ebx
jne    1140 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 173
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = call i32 (...) @init()
%8 = call i32 (...) @interface()
%9 = call i32 (...) @FH_DU()
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %6, %1 ]
%3 = tail call i32 (...) @init()
%4 = tail call i32 (...) @interface()
%5 = tail call i32 (...) @FH_DU()
%6 = add nuw nsw i32 %2, 1
%7 = icmp eq i32 %6, 173
br i1 %7, label %8, label %1
8: ; preds = %1
ret i32 0
}
extern float ReturnFloat() { return (float)-4.5; }


x86 assembly (clang, -O0):
<ReturnFloat>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReturnFloat>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @ReturnFloat() {
ret float -4.500000e+00
}

LLVM IR (-O2):
define float @ReturnFloat() {
ret float -4.500000e+00
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void __iec_error(char *msg) {
  fprintf(stderr, "IEC 61131-3 runtime error. %s\n", msg);
}


x86 assembly (clang, -O0):
<__iec_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__iec_error>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"IEC 61131-3 runtime error. %s\0A\00"
define void @__iec_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"IEC 61131-3 runtime error. %s\0A\00"
define void @__iec_error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void usage(void) {
  die("usage: scc [-D def[=val]]... [-U def]... [-I dir]... "
      "[-L dir]... [-l dir]...\n"
      "           [-dgksw] [-m arch] [-M|-E|-S] [-o outfile] file...\n"
      "       scc [-D def[=val]]... [-U def]... [-I dir]... "
      "[-L dir]... [-l dir]...\n"
      "           [-dgksw] [-m arch] [-M|-E|-S] -c file...\n"
      "       scc [-D def[=val]]... [-U def]... [-I dir]... "
      "[-L dir]... [-l dir]...\n"
      "           [-dgksw] [-m arch] -c -o outfile file");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <die@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <die@plt>

LLVM IR (-O0):
@.str = [394 x i8] c"usage: scc [-D def[=val]]... [-U def]... [-I dir]... [-L dir]... [-l dir]...\0A [-dgksw] [-m arch] [-M|-E|-S] [-o outfile] file...\0A scc [-D def[=val]]... [-U def]... [-I dir]... [-L dir]... [-l dir]...\0A [-dgksw] [-m arch] [-M|-E|-S] -c file...\0A scc [-D def[=val]]... [-U def]... [-I dir]... [-L dir]... [-l dir]...\0A [-dgksw] [-m arch] -c -o outfile file\00"
define void @usage() {
%1 = call i32 @die(i8* getelementptr inbounds ([394 x i8], [394 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [394 x i8] c"usage: scc [-D def[=val]]... [-U def]... [-I dir]... [-L dir]... [-l dir]...\0A [-dgksw] [-m arch] [-M|-E|-S] [-o outfile] file...\0A scc [-D def[=val]]... [-U def]... [-I dir]... [-L dir]... [-l dir]...\0A [-dgksw] [-m arch] [-M|-E|-S] -c file...\0A scc [-D def[=val]]... [-U def]... [-I dir]... [-L dir]... [-l dir]...\0A [-dgksw] [-m arch] -c -o outfile file\00"
define void @usage() {
%1 = tail call i32 @die(i8* getelementptr inbounds ([394 x i8], [394 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int vasprintf(char **, char const *, int /*<<< orphan*/);
int s_vasprintf(char **buf, const char *format, va_list arg) {
  return vasprintf(buf, format, arg);
}


x86 assembly (clang, -O0):
<s_vasprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <vasprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_vasprintf>:
jmp    1030 <vasprintf@plt>

LLVM IR (-O0):
define i32 @s_vasprintf(i8** %0, i8* %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @vasprintf(i8** %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @s_vasprintf(i8** %0, i8* %1, i32 %2) {
%4 = tail call i32 @vasprintf(i8** %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ RTWDOG_DriverIRQHandler();
__attribute__((weak)) void RTWDOG_IRQHandler(void) {
  RTWDOG_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<RTWDOG_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <RTWDOG_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTWDOG_IRQHandler>:
xor    %eax,%eax
jmp    1030 <RTWDOG_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @RTWDOG_IRQHandler() {
%1 = call i32 (...) @RTWDOG_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @RTWDOG_IRQHandler() {
%1 = tail call i32 (...) @RTWDOG_DriverIRQHandler()
ret void
}
double foo(double a) { return a; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define double @foo(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @foo(double returned %0) {
ret double %0
}
/* Variables and functions */
int abs(int);
int manhattan(int x1, int y1, int x2, int y2) {
  return (abs(x1 - x2) + abs(y1 - y2));
}


x86 assembly (clang, -O0):
<manhattan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sub    -0xc(%rbp),%edi
call   1030 <abs@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%edi
sub    -0x10(%rbp),%edi
call   1030 <abs@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<manhattan>:
sub    %edx,%edi
mov    %edi,%edx
neg    %edx
cmovs  %edi,%edx
sub    %ecx,%esi
mov    %esi,%eax
neg    %eax
cmovs  %esi,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @manhattan(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %7
%11 = sub nsw i32 %9, %10
%12 = call i32 @abs(i32 %11)
%13 = load i32, i32* %6
%14 = load i32, i32* %8
%15 = sub nsw i32 %13, %14
%16 = call i32 @abs(i32 %15)
%17 = add nsw i32 %12, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @manhattan(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = sub nsw i32 %0, %2
%6 = tail call i32 @llvm.abs.i32(i32 %5, i1 true)
%7 = sub nsw i32 %1, %3
%8 = tail call i32 @llvm.abs.i32(i32 %7, i1 true)
%9 = add nuw nsw i32 %8, %6
ret i32 %9
}