xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printstr(char *);
int strlen(char *);
void printline(char *line) {
  int n = strlen(line);
  if (line[n - 1] == '\n')
    line[n - 1] = '\0';
  printstr(line);
}


x86 assembly (clang, -O0):
<printline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1163 <printline+0x43>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rdi
call   1040 <printstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printline>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
cmpb   $0xa,-0x1(%rax,%rbx,1)
jne    1137 <printline+0x17>
movb   $0x0,-0x1(%rbx,%rax,1)
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <printstr@plt>

LLVM IR (-O0):
define void @printline(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %20
14: ; preds = %1
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
store i8 0, i8* %19
br label %20
20: ; preds = %14, %1
%21 = load i8*, i8** %2
%22 = call i32 @printstr(i8* %21)
ret void
}

LLVM IR (-O2):
define void @printline(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %9
8: ; preds = %1
store i8 0, i8* %5
br label %9
9: ; preds = %8, %1
%10 = tail call i32 @printstr(i8* %0)
ret void
}
unsigned short shn_uchar_to_ushort_le(unsigned char *buf) {
  return (unsigned short)((buf[1] << 8) + buf[0]);
}


x86 assembly (clang, -O0):
<shn_uchar_to_ushort_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shn_uchar_to_ushort_le>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i16 @shn_uchar_to_ushort_le(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = add nsw i32 %7, %11
%13 = trunc i32 %12 to i16
ret i16 %13
}

LLVM IR (-O2):
define zeroext i16 @shn_uchar_to_ushort_le(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = zext i8 %3 to i16
%5 = shl nuw i16 %4, 8
%6 = load i8, i8* %0
%7 = zext i8 %6 to i16
%8 = or i16 %5, %7
ret i16 %8
}
/* Variables and functions */
char swim_rvc_bit();
char swim_rvc_ack(void) { return swim_rvc_bit(); }


x86 assembly (clang, -O0):
<swim_rvc_ack>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <swim_rvc_bit@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swim_rvc_ack>:
xor    %eax,%eax
jmp    1030 <swim_rvc_bit@plt>

LLVM IR (-O0):
define signext i8 @swim_rvc_ack() {
%1 = call signext i8 (...) @swim_rvc_bit()
ret i8 %1
}

LLVM IR (-O2):
define signext i8 @swim_rvc_ack() {
%1 = tail call signext i8 (...) @swim_rvc_bit()
ret i8 %1
}
void EXTI2_IRQHandler() {}


x86 assembly (clang, -O0):
<EXTI2_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EXTI2_IRQHandler>:
ret

LLVM IR (-O0):
define void @EXTI2_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @EXTI2_IRQHandler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void secretFunction() {
  printf("Congratulations!\n");
  printf("You have entered in the secret function!\n");
}


x86 assembly (clang, -O0):
<secretFunction>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeeb(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<secretFunction>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeed(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Congratulations!\0A\00"
@.str.1 = [42 x i8] c"You have entered in the secret function!\0A\00"
define void @secretFunction() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"Congratulations!\00"
@str.2 = [41 x i8] c"You have entered in the secret function!\00"
define void @secretFunction() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
int main(void) {
  char src[32] = "Hacking";
  char dst[32];
  strcpy(dst, src);
  printf("%s\n", dst);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec1(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x50(%rbp),%rdi
lea    -0x30(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0x50(%rbp),%rsi
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x40,%rsp
movaps 0xee4(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rbx
mov    %rsp,%rsi
mov    %rbx,%rdi
call   1030 <strcpy@plt>
lea    0xecd(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.src = [32 x i8] c"Hacking\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [32 x i8]
%3 = alloca [32 x i8]
store i32 0, i32* %1
%4 = bitcast [32 x i8]* %2 to i8*
%5 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%6 = getelementptr inbounds [32 x i8], [32 x i8]* %2, i64 0, i64 0
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@__const.main.src = [32 x i8] c"Hacking\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [32 x i8]
%2 = alloca [32 x i8]
%3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [32 x i8], [32 x i8]* %2, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* %3)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Type definitions */
struct section_hash_iter {
  int dummy;
};
struct section_hash {
  int dummy;
};
struct iterator {
  int dummy;
};
struct genhash_iter {
  int dummy;
};
struct genhash {
  int dummy;
};

/* Variables and functions */
struct iterator *genhash_value_iter_init(struct genhash_iter *,
                                         struct genhash const *);
struct iterator *
section_hash_value_iter_init(struct section_hash_iter *iter,
                             const struct section_hash *tthis) {
  return genhash_value_iter_init((struct genhash_iter *)iter,
                                 (const struct genhash *)tthis);
}


x86 assembly (clang, -O0):
<section_hash_value_iter_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <genhash_value_iter_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_hash_value_iter_init>:
jmp    1030 <genhash_value_iter_init@plt>

LLVM IR (-O0):
%struct.iterator = type { i32 }
%struct.section_hash_iter = type { i32 }
%struct.section_hash = type { i32 }
%struct.genhash_iter = type { i32 }
%struct.genhash = type { i32 }
define %struct.iterator* @section_hash_value_iter_init(%struct.section_hash_iter* %0, %struct.section_hash* %1) {
%3 = alloca %struct.section_hash_iter*
%4 = alloca %struct.section_hash*
store %struct.section_hash_iter* %0, %struct.section_hash_iter** %3
store %struct.section_hash* %1, %struct.section_hash** %4
%5 = load %struct.section_hash_iter*, %struct.section_hash_iter** %3
%6 = bitcast %struct.section_hash_iter* %5 to %struct.genhash_iter*
%7 = load %struct.section_hash*, %struct.section_hash** %4
%8 = bitcast %struct.section_hash* %7 to %struct.genhash*
%9 = call %struct.iterator* @genhash_value_iter_init(%struct.genhash_iter* %6, %struct.genhash* %8)
ret %struct.iterator* %9
}

LLVM IR (-O2):
%struct.iterator = type { i32 }
%struct.section_hash_iter = type { i32 }
%struct.section_hash = type { i32 }
%struct.genhash_iter = type { i32 }
%struct.genhash = type { i32 }
define %struct.iterator* @section_hash_value_iter_init(%struct.section_hash_iter* %0, %struct.section_hash* %1) {
%3 = bitcast %struct.section_hash_iter* %0 to %struct.genhash_iter*
%4 = bitcast %struct.section_hash* %1 to %struct.genhash*
%5 = tail call %struct.iterator* @genhash_value_iter_init(%struct.genhash_iter* %3, %struct.genhash* %4)
ret %struct.iterator* %5
}
/* Type definitions */
struct Cyc_Absyn_Exp {
  int dummy;
};

/* Variables and functions */
struct Cyc_Absyn_Exp *Cyc_Absyn_prim2_exp(unsigned int, struct Cyc_Absyn_Exp *,
                                          struct Cyc_Absyn_Exp *, unsigned int);
struct Cyc_Absyn_Exp *Cyc_Absyn_ugte_exp(struct Cyc_Absyn_Exp *e1,
                                         struct Cyc_Absyn_Exp *e2,
                                         unsigned loc) {
  struct Cyc_Absyn_Exp *_T0;
  _T0 = Cyc_Absyn_prim2_exp(24U, e1, e2, loc);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_Absyn_ugte_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x18,%edi
call   1030 <Cyc_Absyn_prim2_exp@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyn_ugte_exp>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x18,%edi
jmp    1030 <Cyc_Absyn_prim2_exp@plt>

LLVM IR (-O0):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Absyn_ugte_exp(%struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2) {
%4 = alloca %struct.Cyc_Absyn_Exp*
%5 = alloca %struct.Cyc_Absyn_Exp*
%6 = alloca i32
%7 = alloca %struct.Cyc_Absyn_Exp*
store %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp** %4
store %struct.Cyc_Absyn_Exp* %1, %struct.Cyc_Absyn_Exp** %5
store i32 %2, i32* %6
%8 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %4
%9 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %5
%10 = load i32, i32* %6
%11 = call %struct.Cyc_Absyn_Exp* @Cyc_Absyn_prim2_exp(i32 24, %struct.Cyc_Absyn_Exp* %8, %struct.Cyc_Absyn_Exp* %9, i32 %10)
store %struct.Cyc_Absyn_Exp* %11, %struct.Cyc_Absyn_Exp** %7
%12 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %7
ret %struct.Cyc_Absyn_Exp* %12
}

LLVM IR (-O2):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Absyn_ugte_exp(%struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2) {
%4 = tail call %struct.Cyc_Absyn_Exp* @Cyc_Absyn_prim2_exp(i32 24, %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2)
ret %struct.Cyc_Absyn_Exp* %4
}
int ft_binary_size(int c) {
  int otp;
  otp = 0;
  while (c) {
    c /= 2;
    otp++;
  }
  return (otp);
}


x86 assembly (clang, -O0):
<ft_binary_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1134 <ft_binary_size+0x34>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <ft_binary_size+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_binary_size>:
xor    %eax,%eax
test   %edi,%edi
je     1124 <ft_binary_size+0x24>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    $0x1f,%ecx
add    %edi,%ecx
sar    %ecx
add    $0x1,%eax
add    $0x1,%edi
cmp    $0x2,%edi
mov    %ecx,%edi
ja     1110 <ft_binary_size+0x10>
ret

LLVM IR (-O0):
define i32 @ft_binary_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sdiv i32 %8, 2
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @ft_binary_size(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = sdiv i32 %5, 2
%7 = add nuw nsw i32 %4, 1
%8 = add i32 %5, 1
%9 = icmp ult i32 %8, 3
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
void myFunction() {
  printf("Before asm\n");
  asm("movl %ecx, %eax\n\t");
  printf("After asm");
}


x86 assembly (clang, -O0):
<myFunction>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    %ecx,%eax
lea    0xee1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<myFunction>:
push   %rax
lea    0xee2(%rip),%rdi
call   1030 <puts@plt>
mov    %ecx,%eax
lea    0xeca(%rip),%rdi
xor    %eax,%eax
pop    %rcx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Before asm\0A\00"
@.str.1 = [10 x i8] c"After asm\00"
define void @myFunction() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [10 x i8] c"After asm\00"
@str = [11 x i8] c"Before asm\00"
define void @myFunction() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
tail call void asm sideeffect "movl %ecx, %eax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int main(int argc, char **argv) {
  switch (argc) {
  case 0:
    __attribute__((fallthrough));
  case 1:
    __attribute__((fallthrough));
  default:
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
test   %eax,%eax
je     1136 <main+0x36>
jmp    1125 <main+0x25>
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
je     113b <main+0x3b>
jmp    1140 <main+0x40>
jmp    113b <main+0x3b>
jmp    1140 <main+0x40>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
switch i32 %6, label %9 [
i32 0, label %7
i32 1, label %8
]
7: ; preds = %2
br label %8
8: ; preds = %2, %7
br label %9
9: ; preds = %2, %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int __syscall(char const *, int, int, int /*<<< orphan*/, int);
int open(const char *filename, int flags, int mode) {
  return __syscall(filename, flags, mode, 0, 0x401);
}


x86 assembly (clang, -O0):
<open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %ecx,%ecx
mov    $0x401,%r8d
call   1030 <__syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open>:
xor    %ecx,%ecx
mov    $0x401,%r8d
jmp    1030 <__syscall@plt>

LLVM IR (-O0):
define i32 @open(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @__syscall(i8* %7, i32 %8, i32 %9, i32 0, i32 1025)
ret i32 %10
}

LLVM IR (-O2):
define i32 @open(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @__syscall(i8* %0, i32 %1, i32 %2, i32 0, i32 1025)
ret i32 %4
}
int fcgi_data_iterator_has_data(
    const struct fcgi_data_list_iterator_s *iterator) {
  int retval = 0;
  if (iterator) {
    retval = 1;
  }
  return retval;
}


x86 assembly (clang, -O0):
<fcgi_data_iterator_has_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1121 <fcgi_data_iterator_has_data+0x21>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcgi_data_iterator_has_data>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
ret

LLVM IR (-O0):
%struct.fcgi_data_list_iterator_s = type opaque
define i32 @fcgi_data_iterator_has_data(%struct.fcgi_data_list_iterator_s* %0) {
%2 = alloca %struct.fcgi_data_list_iterator_s*
%3 = alloca i32
store %struct.fcgi_data_list_iterator_s* %0, %struct.fcgi_data_list_iterator_s** %2
store i32 0, i32* %3
%4 = load %struct.fcgi_data_list_iterator_s*, %struct.fcgi_data_list_iterator_s** %2
%5 = icmp ne %struct.fcgi_data_list_iterator_s* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %7
7: ; preds = %6, %1
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
%struct.fcgi_data_list_iterator_s = type opaque
define i32 @fcgi_data_iterator_has_data(%struct.fcgi_data_list_iterator_s* readnone %0) {
%2 = icmp ne %struct.fcgi_data_list_iterator_s* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
int test_imm_A6uint16_mem(unsigned short *val) {
  return ((*val) & (-0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff5a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6uint16_mem>:
movzwl (%rdi),%eax
test   $0xff5a,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -166
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A6uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -166
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int GLint;
typedef int GLenum;

/* Variables and functions */
#define GL_LIGHT_MODEL_AMBIENT 131
#define GL_LIGHT_MODEL_COLOR_CONTROL 130
#define GL_LIGHT_MODEL_LOCAL_VIEWER 129
#define GL_LIGHT_MODEL_TWO_SIDE 128
GLint __glLightModelfv_size(GLenum pname) {
  switch (pname) {
  case GL_LIGHT_MODEL_AMBIENT:
    return 4;
  case GL_LIGHT_MODEL_LOCAL_VIEWER:
    return 1;
  case GL_LIGHT_MODEL_TWO_SIDE:
    return 1;
  case GL_LIGHT_MODEL_COLOR_CONTROL:
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<__glLightModelfv_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     1160 <__glLightModelfv_size+0x60>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x4,-0x4(%rbp)
jmp    1167 <__glLightModelfv_size+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1167 <__glLightModelfv_size+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1167 <__glLightModelfv_size+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1167 <__glLightModelfv_size+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glLightModelfv_size>:
add    $0xffffff80,%edi
xor    %eax,%eax
cmp    $0x3,%edi
ja     1117 <__glLightModelfv_size+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @__glLightModelfv_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 131, label %5
i32 129, label %6
i32 128, label %7
i32 130, label %8
]
5: ; preds = %1
store i32 4, i32* %2
br label %10
6: ; preds = %1
store i32 1, i32* %2
br label %10
7: ; preds = %1
store i32 1, i32* %2
br label %10
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@switch.table.__glLightModelfv_size = [4 x i32] [i32 1, i32 1, i32 1, i32 4]
define i32 @__glLightModelfv_size(i32 %0) {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 4
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.__glLightModelfv_size, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int stable_mixed_volume(int *mv, int *smv) {
  int fail;
  double *c;
  fail = _ada_use_c2phc(79, mv, smv, c);
  return fail;
}


x86 assembly (clang, -O0):
<stable_mixed_volume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x4f,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stable_mixed_volume>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x4f,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @stable_mixed_volume(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double*
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = load i32*, i32** %4
%9 = load double*, double** %6
%10 = call i32 @_ada_use_c2phc(i32 79, i32* %7, i32* %8, double* %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @stable_mixed_volume(i32* %0, i32* %1) {
%3 = tail call i32 @_ada_use_c2phc(i32 79, i32* %0, i32* %1, double* undef)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ op_quick(char *);
void i_addq(void) { op_quick("add"); }


x86 assembly (clang, -O0):
<i_addq>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <op_quick@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_addq>:
lea    0xee9(%rip),%rdi
jmp    1030 <op_quick@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"add\00"
define void @i_addq() {
%1 = call i32 @op_quick(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"add\00"
define void @i_addq() {
%1 = tail call i32 @op_quick(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
void nfsd4_setup_layout_type(struct svc_export *exp) {}


x86 assembly (clang, -O0):
<nfsd4_setup_layout_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfsd4_setup_layout_type>:
ret

LLVM IR (-O0):
%struct.svc_export = type opaque
define void @nfsd4_setup_layout_type(%struct.svc_export* %0) {
%2 = alloca %struct.svc_export*
store %struct.svc_export* %0, %struct.svc_export** %2
ret void
}

LLVM IR (-O2):
%struct.svc_export = type opaque
define void @nfsd4_setup_layout_type(%struct.svc_export* nocapture %0) {
ret void
}
/* Variables and functions */
char *strncpy(char *, char *, int);
char *my_strncpy(char *dest, char *src, int len) {
  return strncpy(dest, src, len);
}


x86 assembly (clang, -O0):
<my_strncpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strncpy>:
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define i8* @my_strncpy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i8* @strncpy(i8* %7, i8* %8, i32 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @my_strncpy(i8* %0, i8* %1, i32 %2) {
%4 = tail call i8* @strncpy(i8* %0, i8* %1, i32 %2)
ret i8* %4
}
unsigned long clamp_value(unsigned long value, unsigned long min,
                          unsigned long max) {
  return (value < min ? min : (value > max ? max : value));
}


x86 assembly (clang, -O0):
<clamp_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    112b <clamp_value+0x2b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1156 <clamp_value+0x56>
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1146 <clamp_value+0x46>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    114e <clamp_value+0x4e>
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp_value>:
mov    %rdx,%rax
cmp    %rdx,%rdi
cmovbe %rdi,%rax
cmp    %rsi,%rdi
cmovb  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @clamp_value(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i64, i64* %5
br label %22
12: ; preds = %3
%13 = load i64, i64* %4
%14 = load i64, i64* %6
%15 = icmp ugt i64 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i64, i64* %6
br label %20
18: ; preds = %12
%19 = load i64, i64* %4
br label %20
20: ; preds = %18, %16
%21 = phi i64 [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi i64 [ %11, %10 ], [ %21, %20 ]
ret i64 %23
}

LLVM IR (-O2):
define i64 @clamp_value(i64 %0, i64 %1, i64 %2) {
%4 = icmp ult i64 %0, %1
%5 = icmp ugt i64 %0, %2
%6 = select i1 %5, i64 %2, i64 %0
%7 = select i1 %4, i64 %1, i64 %6
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void YKResetHandler() { exit(0); }


x86 assembly (clang, -O0):
<YKResetHandler>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<YKResetHandler>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @YKResetHandler() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @YKResetHandler() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
unsigned int get_nprocs();
char *gmk_alloc(int);
int /*<<< orphan*/ snprintf(char *, int, char *, unsigned int);
char *func_cpus(const char *nm, unsigned int argc, char **argv) {
  unsigned cpu_cnt = get_nprocs();
  char *res = gmk_alloc(8);
  snprintf(res, 8, "%u", cpu_cnt);
  return res;
}


x86 assembly (clang, -O0):
<func_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1050 <get_nprocs@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x8,%edi
call   1040 <gmk_alloc@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x1c(%rbp),%ecx
mov    $0x8,%esi
lea    0xe92(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_cpus>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <get_nprocs@plt>
mov    %eax,%ebp
mov    $0x8,%edi
call   1040 <gmk_alloc@plt>
mov    %rax,%rbx
lea    0xeb0(%rip),%rdx
mov    %rax,%rdi
mov    $0x8,%esi
mov    %ebp,%ecx
call   1030 <snprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%u\00"
define i8* @func_cpus(i8* %0, i32 %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%9 = call i32 (...) @get_nprocs()
store i32 %9, i32* %7
%10 = call i8* @gmk_alloc(i32 8)
store i8* %10, i8** %8
%11 = load i8*, i8** %8
%12 = load i32, i32* %7
%13 = call i32 @snprintf(i8* %11, i32 8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = load i8*, i8** %8
ret i8* %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"%u\00"
define i8* @func_cpus(i8* nocapture readnone %0, i32 %1, i8** nocapture readnone %2) {
%4 = tail call i32 (...) @get_nprocs()
%5 = tail call i8* @gmk_alloc(i32 8)
%6 = tail call i32 @snprintf(i8* %5, i32 8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i8* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint16_t;

/* Variables and functions */
uint16_t UINT16(const void *const ptr) { return *(const uint16_t *const)ptr; }


x86 assembly (clang, -O0):
<UINT16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UINT16>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @UINT16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @UINT16(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void uart0_putc(uint32_t sbyte) {
  while (!((*((volatile uint32_t *)0xE2900010)) & 0x02))
    ;
  (*((volatile uint32_t *)0xE2900020)) = sbyte;
}


x86 assembly (clang, -O0):
<uart0_putc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xe2900010,%eax
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1126 <uart0_putc+0x26>
jmp    112b <uart0_putc+0x2b>
jmp    1107 <uart0_putc+0x7>
mov    -0x4(%rbp),%ecx
mov    $0xe2900020,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart0_putc>:
mov    $0xe2900010,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testl  $0x2,(%rax)
je     1110 <uart0_putc+0x10>
mov    %edi,0x10(%rax)
ret

LLVM IR (-O0):
define void @uart0_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load volatile i32, i32* inttoptr (i64 3801088016 to i32*)
%5 = and i32 %4, 2
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
store volatile i32 %10, i32* inttoptr (i64 3801088032 to i32*)
ret void
}

LLVM IR (-O2):
define void @uart0_putc(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 3801088016 to i32*)
%4 = and i32 %3, 2
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
store volatile i32 %0, i32* inttoptr (i64 3801088032 to i32*)
ret void
}
/* Type definitions */
struct scatterlist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ offset_in_page(void const *);
int /*<<< orphan*/ sg_set_page(struct scatterlist *, int /*<<< orphan*/,
                               unsigned int, int /*<<< orphan*/);
int /*<<< orphan*/ virt_to_page(void const *);
void sg_set_buf(struct scatterlist *sg, const void *buf, unsigned int buflen) {
  sg_set_page(sg, virt_to_page(buf), buflen, offset_in_page(buf));
}


x86 assembly (clang, -O0):
<sg_set_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <virt_to_page@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <offset_in_page@plt>
mov    -0x28(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    %eax,%ecx
call   1040 <sg_set_page@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_set_buf>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%r15
mov    %rsi,%rdi
call   1030 <virt_to_page@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1050 <offset_in_page@plt>
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
mov    %eax,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <sg_set_page@plt>

LLVM IR (-O0):
%struct.scatterlist = type { i32 }
define void @sg_set_buf(%struct.scatterlist* %0, i8* %1, i32 %2) {
%4 = alloca %struct.scatterlist*
%5 = alloca i8*
%6 = alloca i32
store %struct.scatterlist* %0, %struct.scatterlist** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.scatterlist*, %struct.scatterlist** %4
%8 = load i8*, i8** %5
%9 = call i32 @virt_to_page(i8* %8)
%10 = load i32, i32* %6
%11 = load i8*, i8** %5
%12 = call i32 @offset_in_page(i8* %11)
%13 = call i32 @sg_set_page(%struct.scatterlist* %7, i32 %9, i32 %10, i32 %12)
ret void
}

LLVM IR (-O2):
%struct.scatterlist = type { i32 }
define void @sg_set_buf(%struct.scatterlist* %0, i8* %1, i32 %2) {
%4 = tail call i32 @virt_to_page(i8* %1)
%5 = tail call i32 @offset_in_page(i8* %1)
%6 = tail call i32 @sg_set_page(%struct.scatterlist* %0, i32 %4, i32 %2, i32 %5)
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR3D_set(void) { return U_WMRCORENONE_set("U_WMR3D"); }


x86 assembly (clang, -O0):
<U_WMR3D_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR3D_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR3D\00"
define i8* @U_WMR3D_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR3D\00"
define i8* @U_WMR3D_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ OneFunc();
void TwoFunc() {
  static int i = 0;
  ++i;
  if (i == 1) {
    OneFunc();
  }
}


x86 assembly (clang, -O0):
<TwoFunc>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f12(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f09(%rip)
cmpl   $0x1,0x2f02(%rip)
jne    1137 <TwoFunc+0x27>
mov    $0x0,%al
call   1030 <OneFunc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TwoFunc>:
mov    0x2f16(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f0d(%rip)
test   %eax,%eax
je     1124 <TwoFunc+0x14>
ret
xor    %eax,%eax
jmp    1030 <OneFunc@plt>

LLVM IR (-O0):
@TwoFunc.i = internal global i32 0
define void @TwoFunc() {
%1 = load i32, i32* @TwoFunc.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @TwoFunc.i
%3 = load i32, i32* @TwoFunc.i
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 (...) @OneFunc()
br label %7
7: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@TwoFunc.i = internal unnamed_addr global i32 0
define void @TwoFunc() {
%1 = load i32, i32* @TwoFunc.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @TwoFunc.i
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 (...) @OneFunc()
br label %6
6: ; preds = %4, %0
ret void
}
double quadraticEaseInOutd(double p) {
  if (p < 0.5) {
    return 2 * p * p;
  } else {
    return (-2 * p * p) + (4 * p) - 1;
  }
}


x86 assembly (clang, -O0):
<quadraticEaseInOutd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1138 <quadraticEaseInOutd+0x38>
movsd  0xefc(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1170 <quadraticEaseInOutd+0x70>
movsd  0xed8(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xebe(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xea1(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<quadraticEaseInOutd>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    111f <quadraticEaseInOutd+0x1f>
movapd %xmm0,%xmm1
addsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret
movsd  0xee1(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  0xed9(%rip),%xmm0
addsd  %xmm1,%xmm0
addsd  0xed5(%rip),%xmm0
ret

LLVM IR (-O0):
define double @quadraticEaseInOutd(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 5.000000e-01
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double, double* %3
%8 = fmul double 2.000000e+00, %7
%9 = load double, double* %3
%10 = fmul double %8, %9
store double %10, double* %2
br label %19
11: ; preds = %1
%12 = load double, double* %3
%13 = fmul double -2.000000e+00, %12
%14 = load double, double* %3
%15 = load double, double* %3
%16 = fmul double 4.000000e+00, %15
%17 = call double @llvm.fmuladd.f64(double %13, double %14, double %16)
%18 = fsub double %17, 1.000000e+00
store double %18, double* %2
br label %19
19: ; preds = %11, %6
%20 = load double, double* %2
ret double %20
}

LLVM IR (-O2):
define double @quadraticEaseInOutd(double %0) {
%2 = fcmp olt double %0, 5.000000e-01
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = fmul double %0, 2.000000e+00
%5 = fmul double %4, %0
br label %11
6: ; preds = %1
%7 = fmul double %0, -2.000000e+00
%8 = fmul double %0, 4.000000e+00
%9 = tail call double @llvm.fmuladd.f64(double %7, double %0, double %8)
%10 = fadd double %9, -1.000000e+00
br label %11
11: ; preds = %6, %3
%12 = phi double [ %5, %3 ], [ %10, %6 ]
ret double %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void error(void) { printf("** ERROR! Try Again! **\n"); }


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"** ERROR! Try Again! **\0A\00"
define void @error() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"** ERROR! Try Again! **\00"
define void @error() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
int g2(int (*p)[], int (*q)[3]) { return q <= p; }


x86 assembly (clang, -O0):
<g2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
cmp    %rcx,%rax
setbe  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2>:
xor    %eax,%eax
cmp    %rsi,%rdi
setae  %al
ret

LLVM IR (-O0):
define i32 @g2([0 x i32]* %0, [3 x i32]* %1) {
%3 = alloca [0 x i32]*
%4 = alloca [3 x i32]*
store [0 x i32]* %0, [0 x i32]** %3
store [3 x i32]* %1, [3 x i32]** %4
%5 = load [3 x i32]*, [3 x i32]** %4
%6 = load [0 x i32]*, [0 x i32]** %3
%7 = bitcast [0 x i32]* %6 to [3 x i32]*
%8 = icmp ule [3 x i32]* %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @g2([0 x i32]* readnone %0, [3 x i32]* readnone %1) {
%3 = bitcast [0 x i32]* %0 to [3 x i32]*
%4 = icmp uge [3 x i32]* %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
extern void extern_extern_postdeclared2(void) {}


x86 assembly (clang, -O0):
<extern_extern_postdeclared2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<extern_extern_postdeclared2>:
ret

LLVM IR (-O0):
define void @extern_extern_postdeclared2() {
ret void
}

LLVM IR (-O2):
define void @extern_extern_postdeclared2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello Windows\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello Windows\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello Windows\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int config_WITH_STAPI(void) { return 0; }


x86 assembly (clang, -O0):
<config_WITH_STAPI>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_WITH_STAPI>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_WITH_STAPI() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_WITH_STAPI() {
ret i32 0
}
void freeUIstack(void) {}


x86 assembly (clang, -O0):
<freeUIstack>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeUIstack>:
ret

LLVM IR (-O0):
define void @freeUIstack() {
ret void
}

LLVM IR (-O2):
define void @freeUIstack() {
ret void
}
/* Variables and functions */
int dhcp_client_stop(char *);
int handle_disconnect_specific(char *, char *);
char *is_specific();
int handle_disconnect(char *device) {
  char *id = is_specific();
  if (!id)
    return dhcp_client_stop(device);
  return handle_disconnect_specific(device, id);
}


x86 assembly (clang, -O0):
<handle_disconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <is_specific@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1163 <handle_disconnect+0x33>
mov    -0x10(%rbp),%rdi
call   1050 <dhcp_client_stop@plt>
mov    %eax,-0x4(%rbp)
jmp    1173 <handle_disconnect+0x43>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <handle_disconnect_specific@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_disconnect>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <is_specific@plt>
mov    %rbx,%rdi
test   %rax,%rax
je     114c <handle_disconnect+0x1c>
mov    %rax,%rsi
pop    %rbx
jmp    1030 <handle_disconnect_specific@plt>
pop    %rbx
jmp    1050 <dhcp_client_stop@plt>

LLVM IR (-O0):
define i32 @handle_disconnect(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = call i8* (...) @is_specific()
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @dhcp_client_stop(i8* %9)
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %4
%14 = call i32 @handle_disconnect_specific(i8* %12, i8* %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @handle_disconnect(i8* %0) {
%2 = tail call i8* (...) @is_specific()
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @dhcp_client_stop(i8* %0)
br label %8
6: ; preds = %1
%7 = tail call i32 @handle_disconnect_specific(i8* %0, i8* %2)
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %7, %6 ], [ %5, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_adds_pu16(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test_mm_adds_pu16(__m64 a, __m64 b) { return _mm_adds_pu16(a, b); }


x86 assembly (clang, -O0):
<test_mm_adds_pu16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_adds_pu16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_adds_pu16>:
jmp    1030 <_mm_adds_pu16@plt>

LLVM IR (-O0):
define i32 @test_mm_adds_pu16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_adds_pu16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_adds_pu16(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_adds_pu16(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
void *__dlsym(void *, char const *);
void *dlopen_helper(char *);
void *dlsym_helper(const char *name) {
  static void *cgdrv = NULL;
  if (!cgdrv)
    cgdrv = dlopen_helper("libcgdrv.so");
  return __dlsym(cgdrv, name);
}


x86 assembly (clang, -O0):
<dlsym_helper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,0x2f04(%rip)
jne    114d <dlsym_helper+0x2d>
lea    0xebf(%rip),%rdi
call   1030 <dlopen_helper@plt>
mov    %rax,0x2eeb(%rip)
mov    0x2ee4(%rip),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <__dlsym@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlsym_helper>:
push   %rbx
mov    %rdi,%rbx
mov    0x2f0d(%rip),%rdi
test   %rdi,%rdi
jne    1146 <dlsym_helper+0x26>
lea    0xec9(%rip),%rdi
call   1030 <dlopen_helper@plt>
mov    %rax,%rdi
mov    %rax,0x2ef2(%rip)
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <__dlsym@plt>

LLVM IR (-O0):
@dlsym_helper.cgdrv = internal global i8* null
@.str = [12 x i8] c"libcgdrv.so\00"
define i8* @dlsym_helper(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** @dlsym_helper.cgdrv
%4 = icmp ne i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = call i8* @dlopen_helper(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** @dlsym_helper.cgdrv
br label %7
7: ; preds = %5, %1
%8 = load i8*, i8** @dlsym_helper.cgdrv
%9 = load i8*, i8** %2
%10 = call i8* @__dlsym(i8* %8, i8* %9)
ret i8* %10
}

LLVM IR (-O2):
@dlsym_helper.cgdrv = internal unnamed_addr global i8* null
@.str = [12 x i8] c"libcgdrv.so\00"
define i8* @dlsym_helper(i8* %0) {
%2 = load i8*, i8** @dlsym_helper.cgdrv
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @dlopen_helper(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i8* %5, i8** @dlsym_helper.cgdrv
br label %6
6: ; preds = %4, %1
%7 = phi i8* [ %5, %4 ], [ %2, %1 ]
%8 = tail call i8* @__dlsym(i8* %7, i8* %0)
ret i8* %8
}
void foo022() {}


x86 assembly (clang, -O0):
<foo022>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo022>:
ret

LLVM IR (-O0):
define void @foo022() {
ret void
}

LLVM IR (-O2):
define void @foo022() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pintar_pantalla_paso2(void *, int);
void pintar_pantalla_paso1(void *mem, int size) {
  pintar_pantalla_paso2(mem, size);
}


x86 assembly (clang, -O0):
<pintar_pantalla_paso1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <pintar_pantalla_paso2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pintar_pantalla_paso1>:
jmp    1030 <pintar_pantalla_paso2@plt>

LLVM IR (-O0):
define void @pintar_pantalla_paso1(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @pintar_pantalla_paso2(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @pintar_pantalla_paso1(i8* %0, i32 %1) {
%3 = tail call i32 @pintar_pantalla_paso2(i8* %0, i32 %1)
ret void
}