xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ __print_float(double);
int /*<<< orphan*/ __print_int(int);
int main() {
  int a, b;
  float c, d;
  a = 5;
  b = 0;
  __print_int(a ? 2 : 4);
  __print_int(b ? 1 : 3);
  c = 6.34;
  d = 0.0;
  __print_int(c ? 7 : 9);
  __print_float(d ? 4.5 : 1.1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
test   %eax,%eax
sete   %al
movzbl %al,%ecx
mov    %ecx,%eax
lea    0x2(%rax,%rax,1),%edi
call   1040 <__print_int@plt>
mov    -0xc(%rbp),%eax
test   %eax,%eax
sete   %al
movzbl %al,%ecx
mov    %ecx,%eax
lea    0x1(%rax,%rax,1),%edi
call   1040 <__print_int@plt>
movl   $0x40cae148,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movss  -0x10(%rbp),%xmm1
xorps  %xmm0,%xmm0
movss  %xmm0,-0x18(%rbp)
cmpeqss %xmm1,%xmm0
movd   %xmm0,%ecx
and    $0x1,%ecx
mov    %ecx,%eax
lea    0x7(%rax,%rax,1),%edi
call   1040 <__print_int@plt>
movss  -0x18(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
cmpneqss %xmm1,%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
mov    %eax,%ecx
lea    0xe46(%rip),%rax
movsd  (%rax,%rcx,8),%xmm0
call   1030 <__print_float@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1040 <__print_int@plt>
mov    $0x3,%edi
call   1040 <__print_int@plt>
mov    $0x7,%edi
call   1040 <__print_int@plt>
movsd  0xeb9(%rip),%xmm0
call   1030 <__print_float@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store i32 0, i32* %1
store i32 5, i32* %2
store i32 0, i32* %3
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 2, i32 4
%10 = call i32 @__print_int(i32 %9)
%11 = load i32, i32* %3
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 3
%15 = call i32 @__print_int(i32 %14)
store float 0x40195C2900000000, float* %4
store float 0.000000e+00, float* %5
%16 = load float, float* %4
%17 = fcmp une float %16, 0.000000e+00
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 7, i32 9
%20 = call i32 @__print_int(i32 %19)
%21 = load float, float* %5
%22 = fcmp une float %21, 0.000000e+00
%23 = zext i1 %22 to i64
%24 = select i1 %22, double 4.500000e+00, double 1.100000e+00
%25 = call i32 @__print_float(double %24)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__print_int(i32 2)
%2 = tail call i32 @__print_int(i32 3)
%3 = tail call i32 @__print_int(i32 7)
%4 = tail call i32 @__print_float(double 1.100000e+00)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _print(char *);
int /*<<< orphan*/ _testhalt();
void bootentry() {
  _print("HELLO, WORLD!\n");
  _testhalt();
}


x86 assembly (clang, -O0):
<bootentry>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <_print@plt>
mov    $0x0,%al
call   1030 <_testhalt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bootentry>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <_print@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <_testhalt@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"HELLO, WORLD!\0A\00"
define void @bootentry() {
%1 = call i32 @_print(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @_testhalt()
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"HELLO, WORLD!\0A\00"
define void @bootentry() {
%1 = tail call i32 @_print(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @_testhalt()
ret void
}
void imv_window_set_title(struct imv_window *window, const char *title) {
  (void)window;
  (void)title;
}


x86 assembly (clang, -O0):
<imv_window_set_title>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<imv_window_set_title>:
ret

LLVM IR (-O0):
%struct.imv_window = type opaque
define void @imv_window_set_title(%struct.imv_window* %0, i8* %1) {
%3 = alloca %struct.imv_window*
%4 = alloca i8*
store %struct.imv_window* %0, %struct.imv_window** %3
store i8* %1, i8** %4
%5 = load %struct.imv_window*, %struct.imv_window** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
%struct.imv_window = type opaque
define void @imv_window_set_title(%struct.imv_window* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ flag;

/* Variables and functions */
int setsockopt(int, int, int, char const *, int);
int socket_setoption(int fd, int domain, int option, int _flag) {
  int flag = _flag;
  return setsockopt(fd, domain, option, (const char *)&flag, sizeof(flag));
}


x86 assembly (clang, -O0):
<socket_setoption>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    -0x14(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_setoption>:
push   %rax
mov    %ecx,0x4(%rsp)
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @socket_setoption(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %8
store i32 %10, i32* %9
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = bitcast i32* %9 to i8*
%15 = call i32 @setsockopt(i32 %11, i32 %12, i32 %13, i8* %14, i32 4)
ret i32 %15
}

LLVM IR (-O2):
define i32 @socket_setoption(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = bitcast i32* %5 to i8*
store i32 %3, i32* %5
%7 = call i32 @setsockopt(i32 %0, i32 %1, i32 %2, i8* %6, i32 4)
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uintmax_t;
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ ret;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
uintmax_t load_umax(uint8_t *buf) {
  uintmax_t ret;
  memcpy(&ret, buf, sizeof(ret));
  return ret;
}


x86 assembly (clang, -O0):
<load_umax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_umax>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @load_umax(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @memcpy(i32* %3, i32* %4, i32 4)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @load_umax(i32* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i32* %0, i32 4)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M579_f(char *s) {
  debug("M579_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M579_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M579_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M579_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M579_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M579_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M579_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
long long szzz() { return 0xffff000000000000LL; }


x86 assembly (clang, -O0):
<szzz>:
push   %rbp
mov    %rsp,%rbp
movabs $0xffff000000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<szzz>:
movabs $0xffff000000000000,%rax
ret

LLVM IR (-O0):
define i64 @szzz() {
ret i64 -281474976710656
}

LLVM IR (-O2):
define i64 @szzz() {
ret i64 -281474976710656
}
char *ind(buf, str)
register char *buf, *str;
{
  while (*str != '(')
    *buf++ = *str++;
  *buf = '\0';
  return (str);
}


x86 assembly (clang, -O0):
<ind>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x28,%eax
je     1143 <ind+0x43>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    110c <ind+0xc>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ind>:
mov    %rsi,%rax
mov    (%rsi),%cl
cmp    $0x28,%cl
je     1123 <ind+0x23>
nopw   0x0(%rax,%rax,1)
mov    %cl,(%rdi)
add    $0x1,%rdi
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
cmp    $0x28,%cl
jne    1110 <ind+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define i8* @ind(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 40
br i1 %9, label %10, label %16
10: ; preds = %5
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
%13 = load i8, i8* %11
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
store i8 %13, i8* %14
br label %5
16: ; preds = %5
%17 = load i8*, i8** %3
store i8 0, i8* %17
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @ind(i8* nocapture writeonly %0, i8* %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 40
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %9, %5 ], [ %1, %2 ]
%8 = phi i8* [ %10, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = getelementptr inbounds i8, i8* %8, i64 1
store i8 %6, i8* %8
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 40
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
%15 = phi i8* [ %1, %2 ], [ %9, %5 ]
store i8 0, i8* %14
ret i8* %15
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ swap(int, int);
int main() {
  int n = 0b10000000000;
  int m = 0b10101;
  int i = 2;
  int j = 6;
  char *num = "101";
  printf("%d\n", atoi(num));
  swap(10, 1);
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x400,-0x8(%rbp)
movl   $0x15,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
movl   $0x6,-0x14(%rbp)
lea    0xe9e(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,%esi
lea    0xe8c(%rip),%rdi
call   1030 <printf@plt>
mov    $0xa,%edi
mov    $0x1,%esi
call   1050 <swap@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x65,%esi
call   1030 <printf@plt>
mov    $0xa,%edi
mov    $0x1,%esi
call   1040 <swap@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"101\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 0, i32* %1
store i32 1024, i32* %2
store i32 21, i32* %3
store i32 2, i32* %4
store i32 6, i32* %5
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @atoi(i8* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
%10 = call i32 @swap(i32 10, i32 1)
ret i32 1
}

LLVM IR (-O2):
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 101)
%2 = tail call i32 @swap(i32 10, i32 1)
ret i32 1
}
char *langDbgDevMsxAudioMidi() { return "MSX Audio MIDI"; }


x86 assembly (clang, -O0):
<langDbgDevMsxAudioMidi>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langDbgDevMsxAudioMidi>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [15 x i8] c"MSX Audio MIDI\00"
define i8* @langDbgDevMsxAudioMidi() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [15 x i8] c"MSX Audio MIDI\00"
define i8* @langDbgDevMsxAudioMidi() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}
void need(charneeded) int charneeded;
{
  static char message[] = "need 'x'";
  message[6] = charneeded;
  error(message);
}


x86 assembly (clang, -O0):
<need>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,0x2f0a(%rip)
lea    0x2efd(%rip),%rdi
mov    $0x0,%al
call   1030 <error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<need>:
mov    %dil,0x2f17(%rip)
lea    0x2f0a(%rip),%rdi
xor    %eax,%eax
jmp    1030 <error@plt>

LLVM IR (-O0):
@need.message = internal global [9 x i8] c"need 'x'\00"
define void @need(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
store i8 %4, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @need.message, i64 0, i64 6)
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @need.message, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@need.message = internal global [9 x i8] c"need 'x'\00"
define void @need(i32 %0) {
%2 = trunc i32 %0 to i8
store i8 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @need.message, i64 0, i64 6)
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @need.message, i64 0, i64 0))
ret void
}
/* Variables and functions */
int detectPresence(char *);
scalar_t__ graphicMode();
int zenityPresent() {
  static int lZenityPresent = -1;
  if (lZenityPresent < 0) {
    lZenityPresent = detectPresence("zenity");
  }
  return lZenityPresent && graphicMode();
}


x86 assembly (clang, -O0):
<zenityPresent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,0x2f01(%rip)
jge    1147 <zenityPresent+0x27>
lea    0xec4(%rip),%rdi
call   1040 <detectPresence@plt>
mov    %eax,0x2ee9(%rip)
xor    %eax,%eax
cmpl   $0x0,0x2ee0(%rip)
mov    %al,-0x1(%rbp)
je     116a <zenityPresent+0x4a>
mov    $0x0,%al
call   1030 <graphicMode@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zenityPresent>:
push   %rax
mov    0x2f09(%rip),%eax
test   %eax,%eax
js     1143 <zenityPresent+0x23>
test   %eax,%eax
je     1159 <zenityPresent+0x39>
xor    %eax,%eax
call   1030 <graphicMode@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret
lea    0xeb6(%rip),%rdi
call   1040 <detectPresence@plt>
mov    %eax,0x2edb(%rip)
test   %eax,%eax
jne    112f <zenityPresent+0xf>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@zenityPresent.lZenityPresent = internal global i32 -1
@.str = [7 x i8] c"zenity\00"
define i32 @zenityPresent() {
%1 = load i32, i32* @zenityPresent.lZenityPresent
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 @detectPresence(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* @zenityPresent.lZenityPresent
br label %5
5: ; preds = %3, %0
%6 = load i32, i32* @zenityPresent.lZenityPresent
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = call i64 (...) @graphicMode()
%10 = icmp ne i64 %9, 0
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@zenityPresent.lZenityPresent = internal unnamed_addr global i32 -1
@.str = [7 x i8] c"zenity\00"
define i32 @zenityPresent() {
%1 = load i32, i32* @zenityPresent.lZenityPresent
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @detectPresence(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* @zenityPresent.lZenityPresent
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %4, %3 ], [ %1, %0 ]
%7 = icmp eq i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %5
%9 = tail call i64 (...) @graphicMode()
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ 0, %5 ], [ %11, %8 ]
ret i32 %13
}
void delete_key(void *k) {}


x86 assembly (clang, -O0):
<delete_key>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_key>:
ret

LLVM IR (-O0):
define void @delete_key(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @delete_key(i8* nocapture %0) {
ret void
}
char int_to_char(int i) {
  switch (i) {
  case 0:
    return 'N';
    break;
  case 1:
    return 'E';
    break;
  case 2:
    return 'S';
    break;
  case 3:
    return 'W';
    break;
  default:
    return -1;
    break;
  }
  return -1;
}


x86 assembly (clang, -O0):
<int_to_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     1150 <int_to_char+0x50>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x4e,-0x1(%rbp)
jmp    1154 <int_to_char+0x54>
movb   $0x45,-0x1(%rbp)
jmp    1154 <int_to_char+0x54>
movb   $0x53,-0x1(%rbp)
jmp    1154 <int_to_char+0x54>
movb   $0x57,-0x1(%rbp)
jmp    1154 <int_to_char+0x54>
movb   $0xff,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_char>:
lea    0x0(,%rdi,8),%ecx
mov    $0x5753454e,%edx
shr    %cl,%edx
cmp    $0x4,%edi
mov    $0xff,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @int_to_char(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i8 78, i8* %2
br label %10
6: ; preds = %1
store i8 69, i8* %2
br label %10
7: ; preds = %1
store i8 83, i8* %2
br label %10
8: ; preds = %1
store i8 87, i8* %2
br label %10
9: ; preds = %1
store i8 -1, i8* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i8, i8* %2
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @int_to_char(i32 %0) {
%2 = icmp ult i32 %0, 4
%3 = shl i32 %0, 3
%4 = lshr i32 1465075022, %3
%5 = trunc i32 %4 to i8
%6 = select i1 %2, i8 %5, i8 -1
ret i8 %6
}
unsigned int bit_count(unsigned int x) {
  x = x - ((x >> 1) & 0x55555555);
  x = (x & 0x33333333) + ((x >> 2) & 0x33333333);
  return (((x + (x >> 4)) & 0x0F0F0F0F) * 0x01010101) >> 24;
}


x86 assembly (clang, -O0):
<bit_count>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
and    $0x55555555,%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x33333333,%eax
mov    -0x4(%rbp),%ecx
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_count>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @bit_count(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = lshr i32 %4, 1
%6 = and i32 %5, 1431655765
%7 = sub i32 %3, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = and i32 %8, 858993459
%10 = load i32, i32* %2
%11 = lshr i32 %10, 2
%12 = and i32 %11, 858993459
%13 = add i32 %9, %12
store i32 %13, i32* %2
%14 = load i32, i32* %2
%15 = load i32, i32* %2
%16 = lshr i32 %15, 4
%17 = add i32 %14, %16
%18 = and i32 %17, 252645135
%19 = mul i32 %18, 16843009
%20 = lshr i32 %19, 24
ret i32 %20
}

LLVM IR (-O2):
define i32 @bit_count(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = sub i32 %0, %3
%5 = and i32 %4, 858993459
%6 = lshr i32 %4, 2
%7 = and i32 %6, 858993459
%8 = add nuw nsw i32 %7, %5
%9 = lshr i32 %8, 4
%10 = add nuw nsw i32 %9, %8
%11 = and i32 %10, 252645135
%12 = mul i32 %11, 16843009
%13 = lshr i32 %12, 24
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ casetm(int);
int /*<<< orphan*/ done3(int /*<<< orphan*/);
caseab() {
  casetm(1);
  done3(0);
}


x86 assembly (clang, -O0):
<caseab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <casetm@plt>
xor    %edi,%edi
call   1040 <done3@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caseab>:
push   %rax
mov    $0x1,%edi
call   1030 <casetm@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <done3@plt>

LLVM IR (-O0):
define i32 @caseab() {
%1 = alloca i32
%2 = call i32 @casetm(i32 1)
%3 = call i32 @done3(i32 0)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @caseab() {
%1 = tail call i32 @casetm(i32 1)
%2 = tail call i32 @done3(i32 0)
ret i32 undef
}
unsigned long long hPow10_ULL(int n) {
  ((void)0);
  unsigned long long ret = 1, a = 10;
  while (n > 0) {
    if (n & 1)
      ret *= a;
    a *= a;
    n >>= 1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<hPow10_ULL>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x1,-0x10(%rbp)
movq   $0xa,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1158 <hPow10_ULL+0x58>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113d <hPow10_ULL+0x3d>
mov    -0x18(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1117 <hPow10_ULL+0x17>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hPow10_ULL>:
test   %edi,%edi
jle    113d <hPow10_ULL+0x3d>
mov    $0x1,%r8d
mov    $0xa,%ecx
mov    $0x1,%eax
mov    %edi,%esi
cs nopw 0x0(%rax,%rax,1)
test   $0x1,%dil
mov    %rcx,%rdx
cmove  %r8,%rdx
imul   %rdx,%rax
imul   %rcx,%rcx
shr    %esi
cmp    $0x1,%edi
mov    %esi,%edi
ja     1120 <hPow10_ULL+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @hPow10_ULL(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
store i32 %0, i32* %2
store i64 1, i64* %3
store i64 10, i64* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %2
%10 = and i32 %9, 1
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = load i64, i64* %4
%14 = load i64, i64* %3
%15 = mul i64 %14, %13
store i64 %15, i64* %3
br label %16
16: ; preds = %12, %8
%17 = load i64, i64* %4
%18 = load i64, i64* %4
%19 = mul i64 %18, %17
store i64 %19, i64* %4
%20 = load i32, i32* %2
%21 = ashr i32 %20, 1
store i32 %21, i32* %2
br label %5
22: ; preds = %5
%23 = load i64, i64* %3
ret i64 %23
}

LLVM IR (-O2):
define i64 @hPow10_ULL(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %14
3: ; preds = %1, %3
%4 = phi i64 [ %11, %3 ], [ 10, %1 ]
%5 = phi i64 [ %10, %3 ], [ 1, %1 ]
%6 = phi i32 [ %12, %3 ], [ %0, %1 ]
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i64 1, i64 %4
%10 = mul i64 %9, %5
%11 = mul i64 %4, %4
%12 = lshr i32 %6, 1
%13 = icmp ult i32 %6, 2
br i1 %13, label %14, label %3
14: ; preds = %3, %1
%15 = phi i64 [ 1, %1 ], [ %10, %3 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ kprintf(char *, int);
void isrHandle16() { kprintf("ISR %d.\n", 16); }


x86 assembly (clang, -O0):
<isrHandle16>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x10,%esi
call   1030 <kprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isrHandle16>:
lea    0xee9(%rip),%rdi
mov    $0x10,%esi
jmp    1030 <kprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle16() {
%1 = call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 16)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle16() {
%1 = tail call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 16)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cgjump(int);
int /*<<< orphan*/ commit();
int /*<<< orphan*/ gentext();
void genjump(int dest) {
  gentext();
  commit();
  cgjump(dest);
}


x86 assembly (clang, -O0):
<genjump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <gentext@plt>
mov    $0x0,%al
call   1050 <commit@plt>
mov    -0x4(%rbp),%edi
call   1030 <cgjump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genjump>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <gentext@plt>
xor    %eax,%eax
call   1050 <commit@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <cgjump@plt>

LLVM IR (-O0):
define void @genjump(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @gentext()
%4 = call i32 (...) @commit()
%5 = load i32, i32* %2
%6 = call i32 @cgjump(i32 %5)
ret void
}

LLVM IR (-O2):
define void @genjump(i32 %0) {
%2 = tail call i32 (...) @gentext()
%3 = tail call i32 (...) @commit()
%4 = tail call i32 @cgjump(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void SHAMD5IntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  ;
  IntRegister(110, pfnHandler);
  IntEnable(110);
}


x86 assembly (clang, -O0):
<SHAMD5IntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x6e,%edi
call   1040 <IntRegister@plt>
mov    $0x6e,%edi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5IntRegister>:
push   %rax
mov    $0x6e,%edi
call   1040 <IntRegister@plt>
mov    $0x6e,%edi
pop    %rax
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @SHAMD5IntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%5 = load void ()*, void ()** %4
%6 = bitcast void ()* %5 to void (...)*
%7 = call i32 @IntRegister(i32 110, void (...)* %6)
%8 = call i32 @IntEnable(i32 110)
ret void
}

LLVM IR (-O2):
define void @SHAMD5IntRegister(i32 %0, void ()* %1) {
%3 = bitcast void ()* %1 to void (...)*
%4 = tail call i32 @IntRegister(i32 110, void (...)* %3)
%5 = tail call i32 @IntEnable(i32 110)
ret void
}
void ci_hdrc_host_destroy(struct ci_hdrc *ci) {}


x86 assembly (clang, -O0):
<ci_hdrc_host_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ci_hdrc_host_destroy>:
ret

LLVM IR (-O0):
%struct.ci_hdrc = type opaque
define void @ci_hdrc_host_destroy(%struct.ci_hdrc* %0) {
%2 = alloca %struct.ci_hdrc*
store %struct.ci_hdrc* %0, %struct.ci_hdrc** %2
ret void
}

LLVM IR (-O2):
%struct.ci_hdrc = type opaque
define void @ci_hdrc_host_destroy(%struct.ci_hdrc* nocapture %0) {
ret void
}
void disable_interrupts() { asm("cli"); }


x86 assembly (clang, -O0):
<disable_interrupts>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_interrupts>:
cli
ret

LLVM IR (-O0):
define void @disable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @disable_interrupts() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
unsigned long get_variable(int /*<<< orphan*/);
int /*<<< orphan*/ intern(char *);
unsigned long toi_funcall(unsigned long, int /*<<< orphan*/, int,
                          unsigned long);
unsigned long int kernel_write(unsigned long int recv, unsigned long int arg) {
  unsigned long int out;
  out = get_variable(intern("stdout"));
  return toi_funcall(out, intern("write"), 1, arg);
}


x86 assembly (clang, -O0):
<kernel_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb9(%rip),%rdi
call   1050 <intern@plt>
mov    %eax,%edi
call   1040 <get_variable@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    0xea1(%rip),%rdi
call   1050 <intern@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
mov    -0x10(%rbp),%rcx
mov    $0x1,%edx
call   1030 <toi_funcall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_write>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rdi
call   1050 <intern@plt>
mov    %eax,%edi
call   1040 <get_variable@plt>
mov    %rax,%rbx
lea    0xeb3(%rip),%rdi
call   1050 <intern@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    $0x1,%edx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <toi_funcall@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"stdout\00"
@.str.1 = [6 x i8] c"write\00"
define i64 @kernel_write(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = call i32 @intern(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%7 = call i64 @get_variable(i32 %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = call i32 @intern(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%10 = load i64, i64* %4
%11 = call i64 @toi_funcall(i64 %8, i32 %9, i32 1, i64 %10)
ret i64 %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"stdout\00"
@.str.1 = [6 x i8] c"write\00"
define i64 @kernel_write(i64 %0, i64 %1) {
%3 = tail call i32 @intern(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%4 = tail call i64 @get_variable(i32 %3)
%5 = tail call i32 @intern(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i64 @toi_funcall(i64 %4, i32 %5, i32 1, i64 %1)
ret i64 %6
}
int do_926() { return 926; }


x86 assembly (clang, -O0):
<do_926>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_926>:
mov    $0x39e,%eax
ret

LLVM IR (-O0):
define i32 @do_926() {
ret i32 926
}

LLVM IR (-O2):
define i32 @do_926() {
ret i32 926
}
/* Variables and functions */
int /*<<< orphan*/ og_startup();
int main() {
  og_startup();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <og_startup@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <og_startup@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @og_startup()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @og_startup()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ frag_more(int);
int /*<<< orphan*/ md_number_to_chars(int /*<<< orphan*/, int, int);
void out_four(int data) { md_number_to_chars(frag_more(4), data, 4); }


x86 assembly (clang, -O0):
<out_four>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <frag_more@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
mov    $0x4,%edx
call   1030 <md_number_to_chars@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_four>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1040 <frag_more@plt>
mov    %eax,%edi
mov    %ebx,%esi
mov    $0x4,%edx
pop    %rbx
jmp    1030 <md_number_to_chars@plt>

LLVM IR (-O0):
define void @out_four(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @frag_more(i32 4)
%4 = load i32, i32* %2
%5 = call i32 @md_number_to_chars(i32 %3, i32 %4, i32 4)
ret void
}

LLVM IR (-O2):
define void @out_four(i32 %0) {
%2 = tail call i32 @frag_more(i32 4)
%3 = tail call i32 @md_number_to_chars(i32 %2, i32 %0, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void iface1_func2(void) { printf("A - version 0 func2\n"); }


x86 assembly (clang, -O0):
<iface1_func2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iface1_func2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"A - version 0 func2\0A\00"
define void @iface1_func2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"A - version 0 func2\00"
define void @iface1_func2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int memcmp(void const *, void const *, int);
int cmp_32(const void *a, const void *b) { return memcmp(a, b, 32); }


x86 assembly (clang, -O0):
<cmp_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x20,%edx
call   1030 <memcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_32>:
mov    $0x20,%edx
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define i32 @cmp_32(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcmp(i8* %5, i8* %6, i32 32)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cmp_32(i8* %0, i8* %1) {
%3 = tail call i32 @memcmp(i8* %0, i8* %1, i32 32)
ret i32 %3
}
int round_up_div(int n, int d) { return n / d + ((n % d == 0) ? 0 : 1); }


x86 assembly (clang, -O0):
<round_up_div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %edx,%esi
mov    $0x1,%ecx
xor    %edx,%edx
cmp    $0x0,%esi
cmove  %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up_div>:
mov    %edi,%eax
cltd
idiv   %esi
cmp    $0x1,%edx
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @round_up_div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sdiv i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 0, i32 1
%14 = add nsw i32 %7, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @round_up_div(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
%4 = srem i32 %0, %1
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
%7 = add nsw i32 %3, %6
ret i32 %7
}
/* Variables and functions */
int strlen(char *);
int main() {
  char *p;
  p = "hello";
  return strlen(p) - 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
sub    $0x5,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <strlen@plt>
add    $0xfffffffb,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = sub nsw i32 %4, 5
ret i32 %5
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define i32 @main() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = add nsw i32 %1, -5
ret i32 %2
}
/* Variables and functions */
void *valloc(size_t);
void *ffts_aligned_malloc(size_t size) { return valloc(size); }


x86 assembly (clang, -O0):
<ffts_aligned_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <valloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffts_aligned_malloc>:
jmp    1030 <valloc@plt>

LLVM IR (-O0):
define i8* @ffts_aligned_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @valloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @ffts_aligned_malloc(i64 %0) {
%2 = tail call i8* @valloc(i64 %0)
ret i8* %2
}
void init_add_color_pt_funcs_c(void) {}


x86 assembly (clang, -O0):
<init_add_color_pt_funcs_c>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_add_color_pt_funcs_c>:
ret

LLVM IR (-O0):
define void @init_add_color_pt_funcs_c() {
ret void
}

LLVM IR (-O2):
define void @init_add_color_pt_funcs_c() {
ret void
}
int test_and_clear_bit(int nr, unsigned long *addr) {
  unsigned long mask = (1 << (nr));
  unsigned long old = *addr;
  *addr = old & ~mask;
  return (old & mask) != 0;
}


x86 assembly (clang, -O0):
<test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
and    -0x18(%rbp),%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_clear_bit>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    (%rsi),%rdx
mov    %rcx,%rax
not    %rax
and    %rdx,%rax
mov    %rax,(%rsi)
xor    %eax,%eax
test   %rcx,%rdx
setne  %al
ret

LLVM IR (-O0):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = shl i32 1, %7
%9 = sext i32 %8 to i64
store i64 %9, i64* %5
%10 = load i64*, i64** %4
%11 = load i64, i64* %10
store i64 %11, i64* %6
%12 = load i64, i64* %6
%13 = load i64, i64* %5
%14 = xor i64 %13, -1
%15 = and i64 %12, %14
%16 = load i64*, i64** %4
store i64 %15, i64* %16
%17 = load i64, i64* %6
%18 = load i64, i64* %5
%19 = and i64 %17, %18
%20 = icmp ne i64 %19, 0
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @test_and_clear_bit(i32 %0, i64* nocapture %1) {
%3 = shl nuw i32 1, %0
%4 = sext i32 %3 to i64
%5 = load i64, i64* %1
%6 = xor i64 %4, -1
%7 = and i64 %5, %6
store i64 %7, i64* %1
%8 = and i64 %5, %4
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Type definitions */
struct _fat_ptr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Cyc_Absyndump_dump_str(struct _fat_ptr *);
void Cyc_Absyndump_dumpvaropt(struct _fat_ptr *vo) {
  if (vo == 0)
    goto _TL93;
  Cyc_Absyndump_dump_str(vo);
  goto _TL94;
_TL93:
_TL94:;
}


x86 assembly (clang, -O0):
<Cyc_Absyndump_dumpvaropt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <Cyc_Absyndump_dumpvaropt+0x1c>
jmp    113a <Cyc_Absyndump_dumpvaropt+0x2a>
mov    -0x8(%rbp),%rdi
call   1030 <Cyc_Absyndump_dump_str@plt>
jmp    113f <Cyc_Absyndump_dumpvaropt+0x2f>
jmp    113f <Cyc_Absyndump_dumpvaropt+0x2f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyndump_dumpvaropt>:
test   %rdi,%rdi
je     111a <Cyc_Absyndump_dumpvaropt+0xa>
jmp    1030 <Cyc_Absyndump_dump_str@plt>
ret

LLVM IR (-O0):
%struct._fat_ptr = type { i32 }
define void @Cyc_Absyndump_dumpvaropt(%struct._fat_ptr* %0) {
%2 = alloca %struct._fat_ptr*
store %struct._fat_ptr* %0, %struct._fat_ptr** %2
%3 = load %struct._fat_ptr*, %struct._fat_ptr** %2
%4 = icmp eq %struct._fat_ptr* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load %struct._fat_ptr*, %struct._fat_ptr** %2
%8 = call i32 @Cyc_Absyndump_dump_str(%struct._fat_ptr* %7)
br label %10
9: ; preds = %5
br label %10
10: ; preds = %9, %6
ret void
}

LLVM IR (-O2):
%struct._fat_ptr = type { i32 }
define void @Cyc_Absyndump_dumpvaropt(%struct._fat_ptr* %0) {
%2 = icmp eq %struct._fat_ptr* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @Cyc_Absyndump_dump_str(%struct._fat_ptr* %0)
br label %5
5: ; preds = %1, %3
ret void
}
int test_imm_1Buint16_mem(unsigned short *val) {
  return ((*val) & (-0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffffe5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint16_mem>:
movzwl (%rdi),%eax
test   $0xffe5,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -27
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Buint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -27
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ kill(int /*<<< orphan*/, int);
int /*<<< orphan*/ signal(int, int /*<<< orphan*/);
void kill_group(pid_t pid, int signum) {
  kill(pid, signum);
  signal(signum, SIG_IGN);
  kill(0, signum);
}


x86 assembly (clang, -O0):
<kill_group>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <kill@plt>
mov    -0x8(%rbp),%edi
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    -0x8(%rbp),%esi
xor    %edi,%edi
call   1040 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill_group>:
push   %rbx
mov    %esi,%ebx
call   1040 <kill@plt>
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
call   1030 <signal@plt>
xor    %edi,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <kill@plt>

LLVM IR (-O0):
@SIG_IGN = global i32 0
define void @kill_group(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @kill(i32 %5, i32 %6)
%8 = load i32, i32* %4
%9 = load i32, i32* @SIG_IGN
%10 = call i32 @signal(i32 %8, i32 %9)
%11 = load i32, i32* %4
%12 = call i32 @kill(i32 0, i32 %11)
ret void
}

LLVM IR (-O2):
@SIG_IGN = global i32 0
define void @kill_group(i32 %0, i32 %1) {
%3 = tail call i32 @kill(i32 %0, i32 %1)
%4 = load i32, i32* @SIG_IGN
%5 = tail call i32 @signal(i32 %1, i32 %4)
%6 = tail call i32 @kill(i32 0, i32 %1)
ret void
}
short DINT_TO_INT(int var) {
  short newvar;
  if (var > 32767)
    newvar = 32767;
  else if (var < -32767)
    newvar = -32767;
  else
    newvar = (short)var;
  return newvar;
}


x86 assembly (clang, -O0):
<DINT_TO_INT>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x7fff,-0x4(%rbp)
jle    111f <DINT_TO_INT+0x1f>
movw   $0x7fff,-0x6(%rbp)
jmp    1143 <DINT_TO_INT+0x43>
cmpl   $0xffff8001,-0x4(%rbp)
jge    1137 <DINT_TO_INT+0x37>
movw   $0x8001,-0x6(%rbp)
jmp    113e <DINT_TO_INT+0x3e>
mov    -0x4(%rbp),%eax
mov    %ax,-0x6(%rbp)
jmp    1143 <DINT_TO_INT+0x43>
movswl -0x6(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DINT_TO_INT>:
cmp    $0xffff8002,%edi
mov    $0xffff8001,%ecx
cmovge %edi,%ecx
cmp    $0x7fff,%ecx
mov    $0x7fff,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @DINT_TO_INT(i32 %0) {
%2 = alloca i32
%3 = alloca i16
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 32767
br i1 %5, label %6, label %7
6: ; preds = %1
store i16 32767, i16* %3
br label %15
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, -32767
br i1 %9, label %10, label %11
10: ; preds = %7
store i16 -32767, i16* %3
br label %14
11: ; preds = %7
%12 = load i32, i32* %2
%13 = trunc i32 %12 to i16
store i16 %13, i16* %3
br label %14
14: ; preds = %11, %10
br label %15
15: ; preds = %14, %6
%16 = load i16, i16* %3
ret i16 %16
}

LLVM IR (-O2):
define signext i16 @DINT_TO_INT(i32 %0) {
%2 = icmp sgt i32 %0, -32767
%3 = select i1 %2, i32 %0, i32 -32767
%4 = icmp slt i32 %3, 32767
%5 = select i1 %4, i32 %3, i32 32767
%6 = trunc i32 %5 to i16
ret i16 %6
}
struct rsync_patch *rsync_patch_new(char *basefile, int outfd) {
  basefile = basefile;
  outfd = outfd;
  return 0;
}


x86 assembly (clang, -O0):
<rsync_patch_new>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsync_patch_new>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.rsync_patch = type opaque
define %struct.rsync_patch* @rsync_patch_new(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
store i8* %5, i8** %3
%6 = load i32, i32* %4
store i32 %6, i32* %4
ret %struct.rsync_patch* null
}

LLVM IR (-O2):
%struct.rsync_patch = type opaque
define noalias %struct.rsync_patch* @rsync_patch_new(i8* nocapture readnone %0, i32 %1) {
ret %struct.rsync_patch* null
}
int test_imm_F6uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xF6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F6uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf6,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F6uint64_highword_mem>:
testb  $0xf6,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F6uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 246
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F6uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1056561954816
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t ct_ne_u64(uint64_t x, uint64_t y) { return ((x - y) | (y - x)) >> 63; }


x86 assembly (clang, -O0):
<ct_ne_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
or     %ecx,%eax
mov    $0x3f,%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_ne_u64>:
ret

LLVM IR (-O0):
define i32 @ct_ne_u64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = sub nsw i32 %8, %9
%11 = or i32 %7, %10
%12 = ashr i32 %11, 63
ret i32 %12
}

LLVM IR (-O2):
define i32 @ct_ne_u64(i32 %0, i32 %1) {
ret i32 poison
}