xunge/DecIR huggingface dataset:
short absw(short a) {
  if (a < 0)
    return -a;
  return a;
}


x86 assembly (clang, -O0):
<absw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%eax
cmp    $0x0,%eax
jge    1129 <absw+0x29>
movswl -0x4(%rbp),%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %ax,-0x2(%rbp)
jmp    1131 <absw+0x31>
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<absw>:
mov    %edi,%eax
neg    %ax
cmovs  %di,%ax
ret

LLVM IR (-O0):
define signext i16 @absw(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i16, i16* %3
%9 = sext i16 %8 to i32
%10 = sub nsw i32 0, %9
%11 = trunc i32 %10 to i16
store i16 %11, i16* %2
br label %14
12: ; preds = %1
%13 = load i16, i16* %3
store i16 %13, i16* %2
br label %14
14: ; preds = %12, %7
%15 = load i16, i16* %2
ret i16 %15
}

LLVM IR (-O2):
define signext i16 @absw(i16 signext %0) {
%2 = tail call i16 @llvm.abs.i16(i16 %0, i1 false)
ret i16 %2
}
int ti_torad_start(double const *options) {
  (void)options;
  return 0;
}


x86 assembly (clang, -O0):
<ti_torad_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_torad_start>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ti_torad_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ti_torad_start(double* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateEnableExpClk(uint32_t ui32HibClk) {
  (*((volatile uint32_t *)(0x400FC010))) |= 0x00000040;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateEnableExpClk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x400fc010,%eax
mov    (%rax),%ecx
or     $0x40,%ecx
mov    $0x400fc010,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateEnableExpClk>:
orl    $0x40,0x400fc010
40
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateEnableExpClk(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load volatile i32, i32* inttoptr (i64 1074774032 to i32*)
%4 = or i32 %3, 64
store volatile i32 %4, i32* inttoptr (i64 1074774032 to i32*)
%5 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateEnableExpClk(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 1074774032 to i32*)
%3 = or i32 %2, 64
store volatile i32 %3, i32* inttoptr (i64 1074774032 to i32*)
%4 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
/* Variables and functions */
unsigned char __builtin_rotateright8(unsigned char, unsigned char);
unsigned char rotright8(unsigned char x, unsigned char y) {
  return __builtin_rotateright8(x, y);
}


x86 assembly (clang, -O0):
<rotright8>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
mov    -0x2(%rbp),%cl
ror    %cl,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotright8>:
mov    %esi,%ecx
mov    %edi,%eax
ror    %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @rotright8(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = load i8, i8* %4
%7 = call i8 @llvm.fshr.i8(i8 %5, i8 %5, i8 %6)
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @rotright8(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i8 @llvm.fshr.i8(i8 %0, i8 %0, i8 %1)
ret i8 %3
}
char GetEncoding4() { return 0x4d; }


x86 assembly (clang, -O0):
<GetEncoding4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4d,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetEncoding4>:
mov    $0x4d,%al
ret

LLVM IR (-O0):
define signext i8 @GetEncoding4() {
ret i8 77
}

LLVM IR (-O2):
define signext i8 @GetEncoding4() {
ret i8 77
}
/* Variables and functions */
int /*<<< orphan*/ Control_Reg_1_RestoreConfig();
void Control_Reg_1_Wakeup(void) { Control_Reg_1_RestoreConfig(); }


x86 assembly (clang, -O0):
<Control_Reg_1_Wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Control_Reg_1_RestoreConfig@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Control_Reg_1_Wakeup>:
xor    %eax,%eax
jmp    1030 <Control_Reg_1_RestoreConfig@plt>

LLVM IR (-O0):
define void @Control_Reg_1_Wakeup() {
%1 = call i32 (...) @Control_Reg_1_RestoreConfig()
ret void
}

LLVM IR (-O2):
define void @Control_Reg_1_Wakeup() {
%1 = tail call i32 (...) @Control_Reg_1_RestoreConfig()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
void print_msg(char *msg) { print(msg); }


x86 assembly (clang, -O0):
<print_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_msg>:
jmp    1030 <print@plt>

LLVM IR (-O0):
define void @print_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @print(i8* %3)
ret void
}

LLVM IR (-O2):
define void @print_msg(i8* %0) {
%2 = tail call i32 @print(i8* %0)
ret void
}
/* Type definitions */
struct derived {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void derived_private_function(struct derived *obj) {
  printf("derived_private_function!!\n");
}


x86 assembly (clang, -O0):
<derived_private_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<derived_private_function>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
%struct.derived = type { i32 }
@.str = [28 x i8] c"derived_private_function!!\0A\00"
define void @derived_private_function(%struct.derived* %0) {
%2 = alloca %struct.derived*
store %struct.derived* %0, %struct.derived** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.derived = type { i32 }
@str = [27 x i8] c"derived_private_function!!\00"
define void @derived_private_function(%struct.derived* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct sock_fprog {
  int dummy;
};

/* Variables and functions */
int __bpf_ipv4_hash(struct sock_fprog *, int);
int bpf_novlan_ipv4_hash(struct sock_fprog *fprog) {
  return __bpf_ipv4_hash(fprog, false);
}


x86 assembly (clang, -O0):
<bpf_novlan_ipv4_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <__bpf_ipv4_hash@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_novlan_ipv4_hash>:
xor    %esi,%esi
jmp    1030 <__bpf_ipv4_hash@plt>

LLVM IR (-O0):
%struct.sock_fprog = type { i32 }
define i32 @bpf_novlan_ipv4_hash(%struct.sock_fprog* %0) {
%2 = alloca %struct.sock_fprog*
store %struct.sock_fprog* %0, %struct.sock_fprog** %2
%3 = load %struct.sock_fprog*, %struct.sock_fprog** %2
%4 = call i32 @__bpf_ipv4_hash(%struct.sock_fprog* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.sock_fprog = type { i32 }
define i32 @bpf_novlan_ipv4_hash(%struct.sock_fprog* %0) {
%2 = tail call i32 @__bpf_ipv4_hash(%struct.sock_fprog* %0, i32 0)
ret i32 %2
}
int hasNextByte(unsigned int b) {
  if (!(b & 0x80))
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<hasNextByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    1124 <hasNextByte+0x24>
movl   $0x0,-0x4(%rbp)
jmp    112b <hasNextByte+0x2b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hasNextByte>:
mov    %edi,%eax
shr    $0x7,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @hasNextByte(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 128
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @hasNextByte(i32 %0) {
%2 = lshr i32 %0, 7
%3 = and i32 %2, 1
ret i32 %3
}
int Aig_Base2Log(unsigned n) {
  int r;
  if (n < 2)
    return n;
  for (r = 0, n--; n; n >>= 1, r++)
    ;
  return r;
}


x86 assembly (clang, -O0):
<Aig_Base2Log>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jae    111c <Aig_Base2Log+0x1c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <Aig_Base2Log+0x58>
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1152 <Aig_Base2Log+0x52>
jmp    113b <Aig_Base2Log+0x3b>
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112c <Aig_Base2Log+0x2c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Aig_Base2Log>:
mov    %edi,%eax
cmp    $0x2,%edi
jb     111c <Aig_Base2Log+0x1c>
mov    %eax,%ecx
add    $0xffffffff,%ecx
xor    %eax,%eax
mov    %ecx,%edx
shr    %edx
add    $0x1,%eax
cmp    $0x1,%ecx
mov    %edx,%ecx
ja     1110 <Aig_Base2Log+0x10>
ret

LLVM IR (-O0):
define i32 @Aig_Base2Log(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp ult i32 %5, 2
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* %3
store i32 %8, i32* %2
br label %23
9: ; preds = %1
store i32 0, i32* %4
%10 = load i32, i32* %3
%11 = add i32 %10, -1
store i32 %11, i32* %3
br label %12
12: ; preds = %16, %9
%13 = load i32, i32* %3
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %21
15: ; preds = %12
br label %16
16: ; preds = %15
%17 = load i32, i32* %3
%18 = lshr i32 %17, 1
store i32 %18, i32* %3
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %12
21: ; preds = %12
%22 = load i32, i32* %4
store i32 %22, i32* %2
br label %23
23: ; preds = %21, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @Aig_Base2Log(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = add i32 %0, -1
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ 0, %3 ]
%7 = phi i32 [ %8, %5 ], [ %4, %3 ]
%8 = lshr i32 %7, 1
%9 = add nuw nsw i32 %6, 1
%10 = icmp ult i32 %7, 2
br i1 %10, label %11, label %5
11: ; preds = %5, %1
%12 = phi i32 [ %0, %1 ], [ %9, %5 ]
ret i32 %12
}
void osd_init(int width, int height) {}


x86 assembly (clang, -O0):
<osd_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<osd_init>:
ret

LLVM IR (-O0):
define void @osd_init(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @osd_init(i32 %0, i32 %1) {
ret void
}
void check(int expectedState) {}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
ret

LLVM IR (-O0):
define void @check(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @check(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __fail(char *, char *, char *, int);
neverGetHere3(void) {
  __fail(
      "Shouldn't get here 3", "\"Shouldn't get here 3\"",
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/atsidaev/sdcc-z80-gas/refs/heads/master/"
      "cpctelera/tools/sdcc-3.6.8-r9946/src/support/regression/tests/logic.c",
      39);
  return 0;
}


x86 assembly (clang, -O0):
<neverGetHere3>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef3(%rip),%rsi
lea    0xf03(%rip),%rdx
mov    $0x27,%ecx
call   1030 <__fail@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<neverGetHere3>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef6(%rip),%rsi
lea    0xf06(%rip),%rdx
mov    $0x27,%ecx
call   1030 <__fail@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Shouldn't get here 3\00"
@.str.1 = [23 x i8] c"\22Shouldn't get here 3\22\00"
@.str.2 = [200 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/atsidaev/sdcc-z80-gas/refs/heads/master/cpctelera/tools/sdcc-3.6.8-r9946/src/support/regression/tests/logic.c\00"
define i32 @neverGetHere3() {
%1 = call i32 @__fail(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([200 x i8], [200 x i8]* @.str.2, i64 0, i64 0), i32 39)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"Shouldn't get here 3\00"
@.str.1 = [23 x i8] c"\22Shouldn't get here 3\22\00"
@.str.2 = [200 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/atsidaev/sdcc-z80-gas/refs/heads/master/cpctelera/tools/sdcc-3.6.8-r9946/src/support/regression/tests/logic.c\00"
define i32 @neverGetHere3() {
%1 = tail call i32 @__fail(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([200 x i8], [200 x i8]* @.str.2, i64 0, i64 0), i32 39)
ret i32 0
}
void SteamAPI_ISteamClient_RunFrame(void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamClient_RunFrame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamClient_RunFrame>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamClient_RunFrame = [31 x i8] c"SteamAPI_ISteamClient_RunFrame\00"
define void @SteamAPI_ISteamClient_RunFrame(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8], [31 x i8]* @__func__.SteamAPI_ISteamClient_RunFrame, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamClient_RunFrame = [31 x i8] c"SteamAPI_ISteamClient_RunFrame\00"
define void @SteamAPI_ISteamClient_RunFrame(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8], [31 x i8]* @__func__.SteamAPI_ISteamClient_RunFrame, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct b_tonegen {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ setMIDIDrawBar(struct b_tonegen *, int, unsigned char);
void setDrawbar25(void *d, unsigned char v) {
  setMIDIDrawBar((struct b_tonegen *)d, 25, v);
}


x86 assembly (clang, -O0):
<setDrawbar25>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x19,%esi
movzbl -0x9(%rbp),%edx
call   1030 <setMIDIDrawBar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDrawbar25>:
mov    %esi,%edx
mov    $0x19,%esi
jmp    1030 <setMIDIDrawBar@plt>

LLVM IR (-O0):
%struct.b_tonegen = type { i32 }
define void @setDrawbar25(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.b_tonegen*
%7 = load i8, i8* %4
%8 = call i32 @setMIDIDrawBar(%struct.b_tonegen* %6, i32 25, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
%struct.b_tonegen = type { i32 }
define void @setDrawbar25(i8* %0, i8 zeroext %1) {
%3 = bitcast i8* %0 to %struct.b_tonegen*
%4 = tail call i32 @setMIDIDrawBar(%struct.b_tonegen* %3, i32 25, i8 zeroext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("usage:\n"
         "   ldrdf [options] object modules ... [-llibrary ...]\n"
         "   ldrdf -r\n"
         "options:\n"
         "   -v[=n]          increase verbosity by 1, or set it to n\n"
         "   -a nn           set segment alignment value (default 16)\n"
         "   -s              strip public symbols\n"
         "   -dy             Unix-style dynamic linking\n"
         "   -o name         write output in file 'name'\n"
         "   -j path         specify objects search path\n"
         "   -L path         specify libraries search path\n"
         "   -g file         embed 'file' as a first header record with type "
         "'generic'\n"
         "   -mn name        add module name record at the beginning of output "
         "file\n");
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [582 x i8] c"usage:\0A ldrdf [options] object modules ... [-llibrary ...]\0A ldrdf -r\0Aoptions:\0A -v[=n] increase verbosity by 1, or set it to n\0A -a nn set segment alignment value (default 16)\0A -s strip public symbols\0A -dy Unix-style dynamic linking\0A -o name write output in file 'name'\0A -j path specify objects search path\0A -L path specify libraries search path\0A -g file embed 'file' as a first header record with type 'generic'\0A -mn name add module name record at the beginning of output file\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([582 x i8], [582 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [581 x i8] c"usage:\0A ldrdf [options] object modules ... [-llibrary ...]\0A ldrdf -r\0Aoptions:\0A -v[=n] increase verbosity by 1, or set it to n\0A -a nn set segment alignment value (default 16)\0A -s strip public symbols\0A -dy Unix-style dynamic linking\0A -o name write output in file 'name'\0A -j path specify objects search path\0A -L path specify libraries search path\0A -g file embed 'file' as a first header record with type 'generic'\0A -mn name add module name record at the beginning of output file\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([581 x i8], [581 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ ucontext_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ abort();
int /*<<< orphan*/ errno;
int /*<<< orphan*/ perror(char *);
int setcontext(const ucontext_t *ucp) {
  errno = ENOSYS;
  perror("setcontext");
  abort();
}


x86 assembly (clang, -O0):
<setcontext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%ecx
mov    0x2e9c(%rip),%rax
mov    %ecx,(%rax)
lea    0xebb(%rip),%rdi
call   1040 <perror@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<setcontext>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%eax
mov    0x2ea7(%rip),%rcx
mov    %eax,(%rcx)
lea    0xec6(%rip),%rdi
call   1040 <perror@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
@.str = [11 x i8] c"setcontext\00"
define i32 @setcontext(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
%4 = call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
@.str = [11 x i8] c"setcontext\00"
define i32 @setcontext(i32* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
%3 = tail call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ SET_CLKOUT_TO(int /*<<< orphan*/);
void SET_CLKOUT_LOW(void) { SET_CLKOUT_TO(0); }


x86 assembly (clang, -O0):
<SET_CLKOUT_LOW>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <SET_CLKOUT_TO@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SET_CLKOUT_LOW>:
xor    %edi,%edi
jmp    1030 <SET_CLKOUT_TO@plt>

LLVM IR (-O0):
define void @SET_CLKOUT_LOW() {
%1 = call i32 @SET_CLKOUT_TO(i32 0)
ret void
}

LLVM IR (-O2):
define void @SET_CLKOUT_LOW() {
%1 = tail call i32 @SET_CLKOUT_TO(i32 0)
ret void
}
int is_newline(char c) {
  if (c == '\r' || c == '\n')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_newline>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0xd,%eax
je     1124 <is_newline+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
jne    1130 <is_newline+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <is_newline+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_newline>:
cmp    $0xd,%dil
sete   %al
cmp    $0xa,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_newline(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 13
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 10
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %13
12: ; preds = %7
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_newline(i8 signext %0) {
%2 = icmp eq i8 %0, 13
%3 = icmp eq i8 %0, 10
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
char *int2strn(char *, int /*<<< orphan*/, unsigned int);
int /*<<< orphan*/ strlen(char *);
char *int2str(char *s, unsigned int cislo) {
  return int2strn(s, strlen(s), cislo);
}


x86 assembly (clang, -O0):
<int2str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
mov    -0xc(%rbp),%edx
call   1040 <int2strn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int2str>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <int2strn@plt>

LLVM IR (-O0):
define i8* @int2str(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = load i32, i32* %4
%9 = call i8* @int2strn(i8* %5, i32 %7, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
define i8* @int2str(i8* %0, i32 %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i8* @int2strn(i8* %0, i32 %3, i32 %1)
ret i8* %4
}
int main(void) {
  int x;
  int *y;
  x = 1;
  y = &x;
  printf("Address of x = %d, value of x = %d\n", &x, x);
  printf("Address of y = %d, value of y = %d, value of *y = %d\n", &y, y, *y);
  moo(9, y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edx
lea    0xebf(%rip),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdx
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
lea    0xec7(%rip),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
mov    $0x9,%edi
mov    $0x0,%al
call   1040 <moo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x1,0x4(%rsp)
lea    0x4(%rsp),%rbx
mov    %rbx,0x8(%rsp)
lea    0xec2(%rip),%rdi
mov    %rbx,%rsi
mov    $0x1,%edx
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x4(%rsp),%ecx
lea    0xecc(%rip),%rdi
lea    0x8(%rsp),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x8(%rsp),%rsi
mov    $0x9,%edi
xor    %eax,%eax
call   1040 <moo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Address of x = %d, value of x = %d\0A\00"
@.str.1 = [54 x i8] c"Address of y = %d, value of y = %d, value of *y = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 1, i32* %1
store i32* %1, i32** %2
%3 = load i32, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32* %1, i32 %3)
%5 = load i32*, i32** %2
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0), i32** %2, i32* %5, i32 %7)
%9 = load i32*, i32** %2
%10 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @moo to i32 (i32, i32*, ...)*)(i32 9, i32* %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [36 x i8] c"Address of x = %d, value of x = %d\0A\00"
@.str.1 = [54 x i8] c"Address of y = %d, value of y = %d, value of *y = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32** %2 to i8*
store i32 1, i32* %1
store i32* %1, i32** %2
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32* %1, i32 1)
%6 = load i32, i32* %1
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0), i32** %2, i32* %1, i32 %6)
%8 = load i32*, i32** %2
%9 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @moo to i32 (i32, i32*, ...)*)(i32 9, i32* %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int, size_t);
void __aeabi_memset(void *buf, size_t size, int c) { memset(buf, c, size); }


x86 assembly (clang, -O0):
<__aeabi_memset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <memset@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_memset>:
mov    %rsi,%rax
mov    %edx,%esi
mov    %rax,%rdx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @__aeabi_memset(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %6
%9 = load i64, i64* %5
%10 = call i32 @memset(i8* %7, i32 %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @__aeabi_memset(i8* %0, i64 %1, i32 %2) {
%4 = tail call i32 @memset(i8* %0, i32 %2, i64 %1)
ret void
}
float nvgRadToDeg(float rad) {
  return rad / 3.14159265358979323846264338327f * 180.0f;
}


x86 assembly (clang, -O0):
<nvgRadToDeg>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeee(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xede(%rip),%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvgRadToDeg>:
divss  0xef8(%rip),%xmm0
mulss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @nvgRadToDeg(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 0x400921FB60000000
%5 = fmul float %4, 1.800000e+02
ret float %5
}

LLVM IR (-O2):
define float @nvgRadToDeg(float %0) {
%2 = fdiv float %0, 0x400921FB60000000
%3 = fmul float %2, 1.800000e+02
ret float %3
}
/* Variables and functions */
unsigned long LONG_MAX;
unsigned long _dict_next_power(unsigned long size) {
  unsigned long i = 4;
  if (size >= LONG_MAX)
    return LONG_MAX;
  while (1) {
    if (i >= size)
      return i;
    i *= 2;
  }
  return 0;
}


x86 assembly (clang, -O0):
<_dict_next_power>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x4,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ec5(%rip),%rcx
cmp    (%rcx),%rax
jb     1137 <_dict_next_power+0x37>
mov    0x2eb5(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1168 <_dict_next_power+0x68>
jmp    113c <_dict_next_power+0x3c>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jb     1157 <_dict_next_power+0x57>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1168 <_dict_next_power+0x68>
mov    -0x18(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113c <_dict_next_power+0x3c>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dict_next_power>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rax
cmp    %rdi,%rax
jbe    112b <_dict_next_power+0x2b>
mov    $0x4,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rcx,%rax
add    %rcx,%rcx
cmp    %rdi,%rax
jb     1120 <_dict_next_power+0x20>
ret

LLVM IR (-O0):
@LONG_MAX = global i64 0
define i64 @_dict_next_power(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 4, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* @LONG_MAX
%7 = icmp uge i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i64, i64* @LONG_MAX
store i64 %9, i64* %2
br label %20
10: ; preds = %1
br label %11
11: ; preds = %10, %17
%12 = load i64, i64* %4
%13 = load i64, i64* %3
%14 = icmp uge i64 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i64, i64* %4
store i64 %16, i64* %2
br label %20
17: ; preds = %11
%18 = load i64, i64* %4
%19 = mul i64 %18, 2
store i64 %19, i64* %4
br label %11
20: ; preds = %15, %8
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
@LONG_MAX = global i64 0
define i64 @_dict_next_power(i64 %0) {
%2 = load i64, i64* @LONG_MAX
%3 = icmp ugt i64 %2, %0
br i1 %3, label %4, label %8
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 4, %1 ]
%6 = icmp ult i64 %5, %0
%7 = shl i64 %5, 1
br i1 %6, label %4, label %8
8: ; preds = %4, %1
%9 = phi i64 [ %2, %1 ], [ %5, %4 ]
ret i64 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ __swab64p(int /*<<< orphan*/ *);
void __swab64s(uint64_t *p) { *p = __swab64p(p); }


x86 assembly (clang, -O0):
<__swab64s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__swab64p@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__swab64s>:
push   %rbx
mov    %rdi,%rbx
call   1030 <__swab64p@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @__swab64s(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @__swab64p(i32* %3)
%5 = load i32*, i32** %2
store i32 %4, i32* %5
ret void
}

LLVM IR (-O2):
define void @__swab64s(i32* %0) {
%2 = tail call i32 @__swab64p(i32* %0)
store i32 %2, i32* %0
ret void
}
/* Type definitions */
struct tegra_core_opp_params {
  int dummy;
};
struct device {
  int dummy;
};

/* Variables and functions */
int ENODEV;
int devm_tegra_core_dev_init_opp_table(struct device *dev,
                                       struct tegra_core_opp_params *params) {
  return -ENODEV;
}


x86 assembly (clang, -O0):
<devm_tegra_core_dev_init_opp_table>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<devm_tegra_core_dev_init_opp_table>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.device = type { i32 }
%struct.tegra_core_opp_params = type { i32 }
@ENODEV = global i32 0
define i32 @devm_tegra_core_dev_init_opp_table(%struct.device* %0, %struct.tegra_core_opp_params* %1) {
%3 = alloca %struct.device*
%4 = alloca %struct.tegra_core_opp_params*
store %struct.device* %0, %struct.device** %3
store %struct.tegra_core_opp_params* %1, %struct.tegra_core_opp_params** %4
%5 = load i32, i32* @ENODEV
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
%struct.device = type { i32 }
%struct.tegra_core_opp_params = type { i32 }
@ENODEV = global i32 0
define i32 @devm_tegra_core_dev_init_opp_table(%struct.device* nocapture readnone %0, %struct.tegra_core_opp_params* nocapture readnone %1) {
%3 = load i32, i32* @ENODEV
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_PKEY;

/* Variables and functions */
int EVP_MAX_MD_SIZE;
int hmac_size(const EVP_PKEY *pkey) { return EVP_MAX_MD_SIZE; }


x86 assembly (clang, -O0):
<hmac_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hmac_size>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EVP_MAX_MD_SIZE = global i32 0
define i32 @hmac_size(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @EVP_MAX_MD_SIZE
ret i32 %3
}

LLVM IR (-O2):
@EVP_MAX_MD_SIZE = global i32 0
define i32 @hmac_size(i32* nocapture readnone %0) {
%2 = load i32, i32* @EVP_MAX_MD_SIZE
ret i32 %2
}
int test_imm_1Buint32_reg(unsigned int val) {
  return ((val) & (0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x1b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint32_reg>:
test   $0x1b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 27
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_1Buint32_reg(i32 %0) {
%2 = and i32 %0, 27
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
void evenMulti(int x, int y) {
  printf("The next largest even multiple of %i for %i is %i\n", x, y,
         x + y - x % y);
}


x86 assembly (clang, -O0):
<evenMulti>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
mov    -0xc(%rbp),%edx
sub    %eax,%ecx
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evenMulti>:
mov    %esi,%r8d
mov    %edi,%esi
lea    (%r8,%rsi,1),%ecx
mov    %edi,%eax
cltd
idiv   %r8d
sub    %edx,%ecx
lea    0xed8(%rip),%rdi
mov    %r8d,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"The next largest even multiple of %i for %i is %i\0A\00"
define void @evenMulti(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = sub nsw i32 %9, %12
%14 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6, i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [51 x i8] c"The next largest even multiple of %i for %i is %i\0A\00"
define void @evenMulti(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = srem i32 %0, %1
%5 = sub i32 %3, %4
%6 = tail call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ getpgid(int /*<<< orphan*/);
pid_t getpgrp() { return getpgid(0); }


x86 assembly (clang, -O0):
<getpgrp>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <getpgid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpgrp>:
xor    %edi,%edi
jmp    1030 <getpgid@plt>

LLVM IR (-O0):
define i32 @getpgrp() {
%1 = call i32 @getpgid(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @getpgrp() {
%1 = tail call i32 @getpgid(i32 0)
ret i32 %1
}
/* Variables and functions */
short *calloc(int, int);
int main() {
  short *val = calloc(5, sizeof(short));
  val[4] = 123;
  return val[4];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
mov    $0x2,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movw   $0x7b,0x8(%rax)
mov    -0x10(%rbp),%rax
movswl 0x8(%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x2,%esi
call   1030 <calloc@plt>
mov    $0x7b,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16*
store i32 0, i32* %1
%3 = call i16* @calloc(i32 5, i32 2)
store i16* %3, i16** %2
%4 = load i16*, i16** %2
%5 = getelementptr inbounds i16, i16* %4, i64 4
store i16 123, i16* %5
%6 = load i16*, i16** %2
%7 = getelementptr inbounds i16, i16* %6, i64 4
%8 = load i16, i16* %7
%9 = sext i16 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i16* @calloc(i32 5, i32 2)
ret i32 123
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int hash_func(const char *s) {
  int h = 0;
  assert(s != NULL);
  while (*s) {
    h = (h + *s) & (128U - 1);
    ++s;
  }
  return h;
}


x86 assembly (clang, -O0):
<hash_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1165 <hash_func+0x55>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
and    $0x7f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1135 <hash_func+0x25>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_func>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
mov    (%rbx),%cl
test   %cl,%cl
je     1147 <hash_func+0x37>
add    $0x1,%rbx
xor    %edx,%edx
xchg   %ax,%ax
movzbl %cl,%eax
add    %edx,%eax
and    $0x7f,%eax
movzbl (%rbx),%ecx
add    $0x1,%rbx
mov    %eax,%edx
test   %cl,%cl
jne    1130 <hash_func+0x20>
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hash_func(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
br label %8
8: ; preds = %12, %1
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i32, i32* %3
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = add nsw i32 %13, %16
%18 = and i32 %17, 127
store i32 %18, i32* %3
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
br label %8
21: ; preds = %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @hash_func(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %17, label %7
7: ; preds = %1, %7
%8 = phi i8 [ %15, %7 ], [ %5, %1 ]
%9 = phi i32 [ %13, %7 ], [ 0, %1 ]
%10 = phi i8* [ %14, %7 ], [ %0, %1 ]
%11 = zext i8 %8 to i32
%12 = add nuw nsw i32 %9, %11
%13 = and i32 %12, 127
%14 = getelementptr inbounds i8, i8* %10, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %7
17: ; preds = %7, %1
%18 = phi i32 [ 0, %1 ], [ %13, %7 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ B(int, int);
void A(int tmp) {
  if (tmp < 2)
    B(1, 2);
}


x86 assembly (clang, -O0):
<A>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    1134 <A+0x24>
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <B@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<A>:
cmp    $0x1,%edi
jg     1124 <A+0x14>
mov    $0x1,%edi
mov    $0x2,%esi
jmp    1030 <B@plt>
ret

LLVM IR (-O0):
define void @A(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 2
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @B(i32 1, i32 2)
br label %7
7: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @A(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @B(i32 1, i32 2)
br label %5
5: ; preds = %3, %1
ret void
}
int f16(int x, int y) {
  if (y > -17 && y < -1)
    return x % -y;
  return 34;
}


x86 assembly (clang, -O0):
<f16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0xffffffef,-0xc(%rbp)
jle    1131 <f16+0x31>
cmpl   $0xffffffff,-0xc(%rbp)
jge    1131 <f16+0x31>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
sub    -0xc(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,-0x4(%rbp)
jmp    1138 <f16+0x38>
movl   $0x22,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f16>:
lea    0x10(%rsi),%ecx
mov    $0x22,%eax
cmp    $0xe,%ecx
ja     1116 <f16+0x16>
neg    %esi
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sgt i32 %6, -17
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, -1
br i1 %10, label %11, label %16
11: ; preds = %8
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sub nsw i32 0, %13
%15 = srem i32 %12, %14
store i32 %15, i32* %3
br label %17
16: ; preds = %8, %2
store i32 34, i32* %3
br label %17
17: ; preds = %16, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @f16(i32 %0, i32 %1) {
%3 = add i32 %1, 16
%4 = icmp ult i32 %3, 15
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = sub nsw i32 0, %1
%7 = srem i32 %0, %6
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ %7, %5 ], [ 34, %2 ]
ret i32 %9
}
/* Variables and functions */
double getmean_double(int, double *);
double getmean(int n, double *data) { return getmean_double(n, data); }


x86 assembly (clang, -O0):
<getmean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <getmean_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getmean>:
jmp    1030 <getmean_double@plt>

LLVM IR (-O0):
define double @getmean(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
store i32 %0, i32* %3
store double* %1, double** %4
%5 = load i32, i32* %3
%6 = load double*, double** %4
%7 = call double @getmean_double(i32 %5, double* %6)
ret double %7
}

LLVM IR (-O2):
define double @getmean(i32 %0, double* %1) {
%3 = tail call double @getmean_double(i32 %0, double* %1)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
size_t write(int /*<<< orphan*/, char *, int);
void CON_Back(void) {
  char key;
  size_t size;
  key = '\b';
  size = write(STDOUT_FILENO, &key, 1);
  key = ' ';
  size = write(STDOUT_FILENO, &key, 1);
  key = '\b';
  size = write(STDOUT_FILENO, &key, 1);
}


x86 assembly (clang, -O0):
<CON_Back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x8,-0x1(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %rax,-0x10(%rbp)
movb   $0x20,-0x1(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %rax,-0x10(%rbp)
movb   $0x8,-0x1(%rbp)
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %rax,-0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CON_Back>:
push   %r14
push   %rbx
push   %rax
movb   $0x8,0x7(%rsp)
mov    0x2ed0(%rip),%r14
mov    (%r14),%edi
lea    0x7(%rsp),%rbx
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
movb   $0x20,0x7(%rsp)
mov    (%r14),%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
movb   $0x8,0x7(%rsp)
mov    (%r14),%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
define void @CON_Back() {
%1 = alloca i8
%2 = alloca i64
store i8 8, i8* %1
%3 = load i32, i32* @STDOUT_FILENO
%4 = call i64 @write(i32 %3, i8* %1, i32 1)
store i64 %4, i64* %2
store i8 32, i8* %1
%5 = load i32, i32* @STDOUT_FILENO
%6 = call i64 @write(i32 %5, i8* %1, i32 1)
store i64 %6, i64* %2
store i8 8, i8* %1
%7 = load i32, i32* @STDOUT_FILENO
%8 = call i64 @write(i32 %7, i8* %1, i32 1)
store i64 %8, i64* %2
ret void
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
define void @CON_Back() {
%1 = alloca i8
store i8 8, i8* %1
%2 = load i32, i32* @STDOUT_FILENO
%3 = call i64 @write(i32 %2, i8* %1, i32 1)
store i8 32, i8* %1
%4 = load i32, i32* @STDOUT_FILENO
%5 = call i64 @write(i32 %4, i8* %1, i32 1)
store i8 8, i8* %1
%6 = load i32, i32* @STDOUT_FILENO
%7 = call i64 @write(i32 %6, i8* %1, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
void nondet_cancel() { pthread_exit(NULL); }


x86 assembly (clang, -O0):
<nondet_cancel>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <pthread_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nondet_cancel>:
xor    %edi,%edi
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define void @nondet_cancel() {
%1 = call i32 @pthread_exit(i32* null)
ret void
}

LLVM IR (-O2):
define void @nondet_cancel() {
%1 = tail call i32 @pthread_exit(i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_isr();
__attribute__((weak)) void DEBUG_IRQHandler() { default_isr(); }


x86 assembly (clang, -O0):
<DEBUG_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_isr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DEBUG_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_isr@plt>

LLVM IR (-O0):
define weak void @DEBUG_IRQHandler() {
%1 = call i32 (...) @default_isr()
ret void
}

LLVM IR (-O2):
define weak void @DEBUG_IRQHandler() {
%1 = tail call i32 (...) @default_isr()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ *stem_internal(int /*<<< orphan*/ *, int);
wchar_t *stem_case_insensitive(wchar_t *word) { return stem_internal(word, 1); }


x86 assembly (clang, -O0):
<stem_case_insensitive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <stem_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stem_case_insensitive>:
mov    $0x1,%esi
jmp    1030 <stem_internal@plt>

LLVM IR (-O0):
define i32* @stem_case_insensitive(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @stem_internal(i32* %3, i32 1)
ret i32* %4
}

LLVM IR (-O2):
define i32* @stem_case_insensitive(i32* %0) {
%2 = tail call i32* @stem_internal(i32* %0, i32 1)
ret i32* %2
}