xunge/DecIR huggingface dataset:
unsigned int f57(unsigned int x, unsigned int y) {
  return (x << ((-y) & (8 * sizeof(unsigned int) - 1))) ^ (x >> y);
}


x86 assembly (clang, -O0):
<f57>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
mov    %ecx,%ecx
and    $0x1f,%rcx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f57>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f57(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub i32 0, %6
%8 = zext i32 %7 to i64
%9 = and i64 %8, 31
%10 = trunc i64 %9 to i32
%11 = shl i32 %5, %10
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = lshr i32 %12, %13
%15 = xor i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f57(i32 %0, i32 %1) {
%3 = sub i32 0, %1
%4 = and i32 %3, 31
%5 = shl i32 %0, %4
%6 = lshr i32 %0, %1
%7 = xor i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ callFB(int);
int /*<<< orphan*/ lua_pushstring(char *);
void call_arith(char *op) {
  lua_pushstring(op);
  callFB(3);
}


x86 assembly (clang, -O0):
<call_arith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <lua_pushstring@plt>
mov    $0x3,%edi
call   1030 <callFB@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_arith>:
push   %rax
call   1040 <lua_pushstring@plt>
mov    $0x3,%edi
pop    %rax
jmp    1030 <callFB@plt>

LLVM IR (-O0):
define void @call_arith(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @lua_pushstring(i8* %3)
%5 = call i32 @callFB(i32 3)
ret void
}

LLVM IR (-O2):
define void @call_arith(i8* %0) {
%2 = tail call i32 @lua_pushstring(i8* %0)
%3 = tail call i32 @callFB(i32 3)
ret void
}
/* Variables and functions */
long long __builtin_cmpb(long long, long long);
long long int do_compare(long long int a, long long int b) {
  return __builtin_cmpb(a, b);
}


x86 assembly (clang, -O0):
<do_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__builtin_cmpb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_compare>:
jmp    1030 <__builtin_cmpb@plt>

LLVM IR (-O0):
define i64 @do_compare(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @__builtin_cmpb(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @do_compare(i64 %0, i64 %1) {
%3 = tail call i64 @__builtin_cmpb(i64 %0, i64 %1)
ret i64 %3
}
void chase_pointers(void **data) {
  void *start = *data;
  void *current = start;
  do {
    current = *((void *volatile *)current);
  } while (current != start);
}


x86 assembly (clang, -O0):
<chase_pointers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    111b <chase_pointers+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chase_pointers>:
mov    (%rdi),%rax
mov    %rax,%rcx
cs nopw 0x0(%rax,%rax,1)
mov    (%rcx),%rcx
cmp    %rax,%rcx
jne    1110 <chase_pointers+0x10>
ret

LLVM IR (-O0):
define void @chase_pointers(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
%4 = alloca i8*
store i8** %0, i8*** %2
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
store i8* %6, i8** %3
%7 = load i8*, i8** %3
store i8* %7, i8** %4
br label %8
8: ; preds = %12, %1
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
%11 = load volatile i8*, i8** %10
store i8* %11, i8** %4
br label %12
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i8*, i8** %3
%15 = icmp ne i8* %13, %14
br i1 %15, label %8, label %16
16: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @chase_pointers(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %3, %1
%4 = phi i8* [ %2, %1 ], [ %6, %3 ]
%5 = bitcast i8* %4 to i8**
%6 = load volatile i8*, i8** %5
%7 = icmp eq i8* %6, %2
br i1 %7, label %8, label %3
8: ; preds = %3
ret void
}
void sys_set_priority(int higher) {}


x86 assembly (clang, -O0):
<sys_set_priority>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_set_priority>:
ret

LLVM IR (-O0):
define void @sys_set_priority(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sys_set_priority(i32 %0) {
ret void
}
/* Variables and functions */
void *calloc(int, int);
int /*<<< orphan*/ error(char *);
void *xalloc(int size) {
  void *b = calloc(1, size);
  if (!b)
    error("memory allocation failed");
  return b;
}


x86 assembly (clang, -O0):
<xalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1153 <xalloc+0x33>
lea    0xeb2(%rip),%rdi
call   1040 <error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xalloc>:
push   %rbx
mov    %edi,%esi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1141 <xalloc+0x21>
lea    0xec4(%rip),%rdi
call   1040 <error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"memory allocation failed\00"
define i8* @xalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @calloc(i32 1, i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [25 x i8] c"memory allocation failed\00"
define noalias i8* @xalloc(i32 %0) {
%2 = tail call i8* @calloc(i32 1, i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void foo_2_1_2_2_2_1_1_1_1() {}


x86 assembly (clang, -O0):
<foo_2_1_2_2_2_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_2_2_2_1_1_1_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_2_2_2_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_2_2_2_1_1_1_1() {
ret void
}
/* Type definitions */
struct cras_expr_value {
  int dummy;
};

/* Variables and functions */
int strlen(char const *);
int /*<<< orphan*/ value_set_string2(struct cras_expr_value *, char const *,
                                     char const *);
void value_set_string(struct cras_expr_value *value, const char *str) {
  value_set_string2(value, str, str + strlen(str));
}


x86 assembly (clang, -O0):
<value_set_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdx
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
cltq
add    %rax,%rdx
call   1040 <value_set_string2@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<value_set_string>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
movslq %eax,%rdx
add    %rbx,%rdx
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <value_set_string2@plt>

LLVM IR (-O0):
%struct.cras_expr_value = type { i32 }
define void @value_set_string(%struct.cras_expr_value* %0, i8* %1) {
%3 = alloca %struct.cras_expr_value*
%4 = alloca i8*
store %struct.cras_expr_value* %0, %struct.cras_expr_value** %3
store i8* %1, i8** %4
%5 = load %struct.cras_expr_value*, %struct.cras_expr_value** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = call i32 @value_set_string2(%struct.cras_expr_value* %5, i8* %6, i8* %11)
ret void
}

LLVM IR (-O2):
%struct.cras_expr_value = type { i32 }
define void @value_set_string(%struct.cras_expr_value* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = tail call i32 @value_set_string2(%struct.cras_expr_value* %0, i8* %1, i8* %5)
ret void
}
void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc) {}


x86 assembly (clang, -O0):
<nmk_pinctrl_db8540_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmk_pinctrl_db8540_init>:
ret

LLVM IR (-O0):
%struct.nmk_pinctrl_soc_data = type opaque
define void @nmk_pinctrl_db8540_init(%struct.nmk_pinctrl_soc_data** %0) {
%2 = alloca %struct.nmk_pinctrl_soc_data**
store %struct.nmk_pinctrl_soc_data** %0, %struct.nmk_pinctrl_soc_data*** %2
ret void
}

LLVM IR (-O2):
%struct.nmk_pinctrl_soc_data = type opaque
define void @nmk_pinctrl_db8540_init(%struct.nmk_pinctrl_soc_data** nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ mintaka_record3(int, int /*<<< orphan*/, int /*<<< orphan*/);
void mintaka_record2(int event, uint64_t value) {
  uint32_t low = (uint32_t)value;
  uint32_t high = (uint32_t)(value >> 32);
  mintaka_record3(event, low, high);
}


x86 assembly (clang, -O0):
<mintaka_record2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <mintaka_record3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mintaka_record2>:
jmp    1030 <mintaka_record3@plt>

LLVM IR (-O0):
define void @mintaka_record2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
store i32 %7, i32* %5
%8 = load i32, i32* %4
%9 = ashr i32 %8, 32
store i32 %9, i32* %6
%10 = load i32, i32* %3
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = call i32 @mintaka_record3(i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @mintaka_record2(i32 %0, i32 %1) {
%3 = tail call i32 @mintaka_record3(i32 %0, i32 %1, i32 poison)
ret void
}
/* Variables and functions */
__attribute__((visibility("default"))) const char *
sd_bus_track_next(void *track) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_track_next>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_track_next>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_track_next(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_track_next(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ version_init();
void win32_utf8_init(void) { version_init(); }


x86 assembly (clang, -O0):
<win32_utf8_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <version_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<win32_utf8_init>:
xor    %eax,%eax
jmp    1030 <version_init@plt>

LLVM IR (-O0):
define void @win32_utf8_init() {
%1 = call i32 (...) @version_init()
ret void
}

LLVM IR (-O2):
define void @win32_utf8_init() {
%1 = tail call i32 (...) @version_init()
ret void
}
double log2(double n) { return 0.0; }


x86 assembly (clang, -O0):
<log2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @log2(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @log2(double %0) {
ret double 0.000000e+00
}
short parseShortRegisterResponse(unsigned char *recBuffer, int offset) {
  unsigned char sBuffer[4];
  short *sPointer;
  sBuffer[0] = recBuffer[offset + 1];
  sBuffer[1] = recBuffer[offset];
  sPointer = (short *)sBuffer;
  return *sPointer;
}


x86 assembly (clang, -O0):
<parseShortRegisterResponse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0xf(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movswl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseShortRegisterResponse>:
movslq %esi,%rax
movzwl (%rdi,%rax,1),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define signext i16 @parseShortRegisterResponse(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [4 x i8]
%6 = alloca i16*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = load i8, i8* %11
%13 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
store i8 %12, i8* %13
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 1
store i8 %18, i8* %19
%20 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
%21 = bitcast i8* %20 to i16*
store i16* %21, i16** %6
%22 = load i16*, i16** %6
%23 = load i16, i16* %22
ret i16 %23
}

LLVM IR (-O2):
define signext i16 @parseShortRegisterResponse(i8* nocapture %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i16
%11 = shl nuw i16 %10, 8
%12 = zext i8 %6 to i16
%13 = or i16 %11, %12
ret i16 %13
}
int types_compare(int data_type_1, int data_type_2) {
  if (data_type_1 == data_type_2) {
    return 0;
  } else if ((data_type_1 == 2 && data_type_2 == 3) ||
             (data_type_1 == 3 && data_type_2 == 2)) {
    return 10;
  } else {
    return 4;
  }
}


x86 assembly (clang, -O0):
<types_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1122 <types_compare+0x22>
movl   $0x0,-0x4(%rbp)
jmp    115d <types_compare+0x5d>
cmpl   $0x2,-0x8(%rbp)
jne    1136 <types_compare+0x36>
cmpl   $0x3,-0xc(%rbp)
je     114a <types_compare+0x4a>
cmpl   $0x3,-0x8(%rbp)
jne    1156 <types_compare+0x56>
cmpl   $0x2,-0xc(%rbp)
jne    1156 <types_compare+0x56>
movl   $0xa,-0x4(%rbp)
jmp    115d <types_compare+0x5d>
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<types_compare>:
xor    %eax,%eax
cmp    %esi,%edi
je     1115 <types_compare+0x15>
cmp    $0x2,%edi
jne    1116 <types_compare+0x16>
mov    $0xa,%eax
cmp    $0x3,%esi
jne    1116 <types_compare+0x16>
ret
xor    $0x3,%edi
xor    $0x2,%esi
or     %edi,%esi
mov    $0xa,%ecx
mov    $0x4,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @types_compare(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %24
10: ; preds = %2
%11 = load i32, i32* %4
%12 = icmp eq i32 %11, 2
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %5
%15 = icmp eq i32 %14, 3
br i1 %15, label %22, label %16
16: ; preds = %13, %10
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 3
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = load i32, i32* %5
%21 = icmp eq i32 %20, 2
br i1 %21, label %22, label %23
22: ; preds = %19, %13
store i32 10, i32* %3
br label %24
23: ; preds = %19, %16
store i32 4, i32* %3
br label %24
24: ; preds = %23, %22, %9
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @types_compare(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = icmp eq i32 %0, 2
%6 = icmp eq i32 %1, 3
%7 = and i1 %5, %6
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = icmp eq i32 %0, 3
%10 = icmp eq i32 %1, 2
%11 = and i1 %9, %10
%12 = select i1 %11, i32 10, i32 4
br label %13
13: ; preds = %8, %4, %2
%14 = phi i32 [ 0, %2 ], [ 10, %4 ], [ %12, %8 ]
ret i32 %14
}
void skb_under_panic(struct sk_buff *skb, int len, void *here) {}


x86 assembly (clang, -O0):
<skb_under_panic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<skb_under_panic>:
ret

LLVM IR (-O0):
%struct.sk_buff = type opaque
define void @skb_under_panic(%struct.sk_buff* %0, i32 %1, i8* %2) {
%4 = alloca %struct.sk_buff*
%5 = alloca i32
%6 = alloca i8*
store %struct.sk_buff* %0, %struct.sk_buff** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
%struct.sk_buff = type opaque
define void @skb_under_panic(%struct.sk_buff* nocapture %0, i32 %1, i8* nocapture %2) {
ret void
}
unsigned long check_stack(unsigned long *base) {
  register unsigned long sp asm("sp");
  unsigned long retval = sp;
  *base = ((sp & ~0x1fff) + 0x380);
  return retval;
}


x86 assembly (clang, -O0):
<check_stack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
and    $0xffffffffffffe000,%rcx
add    $0x380,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_stack>:
movq   $0x380,(%rdi)
ret

LLVM IR (-O0):
define i64 @check_stack(i64* %0) {
%2 = alloca i64*
%3 = alloca i64
%4 = alloca i64
store i64* %0, i64** %2
%5 = load i64, i64* %3
store i64 %5, i64* %4
%6 = load i64, i64* %3
%7 = and i64 %6, -8192
%8 = add i64 %7, 896
%9 = load i64*, i64** %2
store i64 %8, i64* %9
%10 = load i64, i64* %4
ret i64 %10
}

LLVM IR (-O2):
define i64 @check_stack(i64* nocapture writeonly %0) {
store i64 896, i64* %0
ret i64 undef
}
void smsdvb_debugfs_register(void) {}


x86 assembly (clang, -O0):
<smsdvb_debugfs_register>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smsdvb_debugfs_register>:
ret

LLVM IR (-O0):
define void @smsdvb_debugfs_register() {
ret void
}

LLVM IR (-O2):
define void @smsdvb_debugfs_register() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void get_subarchitecture(void) { printf("v9"); }


x86 assembly (clang, -O0):
<get_subarchitecture>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_subarchitecture>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"v9\00"
define void @get_subarchitecture() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"v9\00"
define void @get_subarchitecture() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_outl(int /*<<< orphan*/, int);
int /*<<< orphan*/ generate_row(unsigned char, int);
void setup_node(void) {
  unsigned char row;
  for (row = 0; row < 2; row++) {
    __builtin_outl(generate_row(row, 2), 0x1234);
  }
}


x86 assembly (clang, -O0):
<setup_node>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x2,%eax
jge    1160 <setup_node+0x40>
mov    $0x2,%esi
movzbl -0x1(%rbp),%edi
call   1030 <generate_row@plt>
mov    %eax,%edi
mov    $0x1234,%esi
call   1040 <__builtin_outl@plt>
mov    -0x1(%rbp),%al
add    $0x1,%al
mov    %al,-0x1(%rbp)
jmp    112c <setup_node+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_node>:
push   %rax
xor    %edi,%edi
mov    $0x2,%esi
call   1030 <generate_row@plt>
mov    %eax,%edi
mov    $0x1234,%esi
call   1040 <__builtin_outl@plt>
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <generate_row@plt>
mov    %eax,%edi
mov    $0x1234,%esi
pop    %rax
jmp    1040 <__builtin_outl@plt>

LLVM IR (-O0):
define void @setup_node() {
%1 = alloca i8
store i8 0, i8* %1
br label %2
2: ; preds = %10, %0
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = icmp slt i32 %4, 2
br i1 %5, label %6, label %13
6: ; preds = %2
%7 = load i8, i8* %1
%8 = call i32 @generate_row(i8 zeroext %7, i32 2)
%9 = call i32 @__builtin_outl(i32 %8, i32 4660)
br label %10
10: ; preds = %6
%11 = load i8, i8* %1
%12 = add i8 %11, 1
store i8 %12, i8* %1
br label %2
13: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @setup_node() {
%1 = tail call i32 @generate_row(i8 zeroext 0, i32 2)
%2 = tail call i32 @__builtin_outl(i32 %1, i32 4660)
%3 = tail call i32 @generate_row(i8 zeroext 1, i32 2)
%4 = tail call i32 @__builtin_outl(i32 %3, i32 4660)
ret void
}
void av_probe_input_buffer2() {}


x86 assembly (clang, -O0):
<av_probe_input_buffer2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_probe_input_buffer2>:
ret

LLVM IR (-O0):
define void @av_probe_input_buffer2() {
ret void
}

LLVM IR (-O2):
define void @av_probe_input_buffer2() {
ret void
}
int memcheck(array, test, num)
char *array;
int test;
int num;
{
  int i = 0;
  while (array[i] == test && i < num)
    i++;
  if (i == num)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<memcheck>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
xor    %eax,%eax
cmp    -0x14(%rbp),%ecx
mov    %al,-0x1d(%rbp)
jne    113b <memcheck+0x3b>
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
setl   %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    114b <memcheck+0x4b>
jmp    1159 <memcheck+0x59>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <memcheck+0x15>
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jne    1171 <memcheck+0x71>
movl   $0x1,-0x4(%rbp)
jmp    1178 <memcheck+0x78>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcheck>:
movslq %edx,%r9
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl (%rdi,%rcx,1),%eax
lea    0x1(%rcx),%r8
cmp    %esi,%eax
jne    1124 <memcheck+0x24>
cmp    %r9,%rcx
mov    %r8,%rcx
jl     1110 <memcheck+0x10>
add    $0x1,%edx
xor    %eax,%eax
cmp    %r8d,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @memcheck(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i8*, i8** %5
%11 = load i32, i32* %8
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i32, i32* %6
%17 = icmp eq i32 %15, %16
br i1 %17, label %18, label %22
18: ; preds = %9
%19 = load i32, i32* %8
%20 = load i32, i32* %7
%21 = icmp slt i32 %19, %20
br label %22
22: ; preds = %18, %9
%23 = phi i1 [ false, %9 ], [ %21, %18 ]
br i1 %23, label %24, label %27
24: ; preds = %22
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %22
%28 = load i32, i32* %8
%29 = load i32, i32* %7
%30 = icmp eq i32 %28, %29
br i1 %30, label %31, label %32
31: ; preds = %27
store i32 1, i32* %4
br label %33
32: ; preds = %27
store i32 0, i32* %4
br label %33
33: ; preds = %32, %31
%34 = load i32, i32* %4
ret i32 %34
}

LLVM IR (-O2):
define i32 @memcheck(i8* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %2 to i64
br label %5
5: ; preds = %5, %3
%6 = phi i64 [ %13, %5 ], [ 0, %3 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, %1
%11 = icmp slt i64 %6, %4
%12 = select i1 %10, i1 %11, i1 false
%13 = add nuw nsw i64 %6, 1
br i1 %12, label %5, label %14
14: ; preds = %5
%15 = trunc i64 %6 to i32
%16 = icmp eq i32 %15, %2
%17 = zext i1 %16 to i32
ret i32 %17
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr8setBank0(int);
int /*<<< orphan*/ prg32setBank0(int);
void m147_setParams(uint16_t addr, uint8_t val) {
  (void)addr;
  chr8setBank0(((val >> 3) & 0xF) << 13);
  prg32setBank0((((val >> 6) & 2) | ((val >> 2) & 1)) << 15);
}


x86 assembly (clang, -O0):
<m147_setParams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
sar    $0x3,%edi
and    $0xf,%edi
shl    $0xd,%edi
call   1040 <chr8setBank0@plt>
mov    -0x8(%rbp),%edi
sar    $0x6,%edi
and    $0x2,%edi
mov    -0x8(%rbp),%eax
sar    $0x2,%eax
and    $0x1,%eax
or     %eax,%edi
shl    $0xf,%edi
call   1030 <prg32setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m147_setParams>:
push   %rbx
mov    %esi,%ebx
mov    %esi,%edi
and    $0x78,%edi
shl    $0xa,%edi
call   1040 <chr8setBank0@plt>
mov    %ebx,%eax
shr    $0x6,%eax
and    $0x2,%eax
shr    $0x2,%ebx
and    $0x1,%ebx
or     %eax,%ebx
shl    $0xf,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <prg32setBank0@plt>

LLVM IR (-O0):
define void @m147_setParams(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %6, 3
%8 = and i32 %7, 15
%9 = shl i32 %8, 13
%10 = call i32 @chr8setBank0(i32 %9)
%11 = load i32, i32* %4
%12 = ashr i32 %11, 6
%13 = and i32 %12, 2
%14 = load i32, i32* %4
%15 = ashr i32 %14, 2
%16 = and i32 %15, 1
%17 = or i32 %13, %16
%18 = shl i32 %17, 15
%19 = call i32 @prg32setBank0(i32 %18)
ret void
}

LLVM IR (-O2):
define void @m147_setParams(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = and i32 %3, 122880
%5 = tail call i32 @chr8setBank0(i32 %4)
%6 = lshr i32 %1, 6
%7 = and i32 %6, 2
%8 = lshr i32 %1, 2
%9 = and i32 %8, 1
%10 = or i32 %7, %9
%11 = shl nuw nsw i32 %10, 15
%12 = tail call i32 @prg32setBank0(i32 %11)
ret void
}
long double check_longdouble() { return 0; }


x86 assembly (clang, -O0):
<check_longdouble>:
push   %rbp
mov    %rsp,%rbp
fldz
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_longdouble>:
fldz
ret

LLVM IR (-O0):
define x86_fp80 @check_longdouble() {
ret x86_fp80 0xK00000000000000000000
}

LLVM IR (-O2):
define x86_fp80 @check_longdouble() {
ret x86_fp80 0xK00000000000000000000
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_BIT_STRING;

/* Variables and functions */
int M_ASN1_BIT_STRING_set(int /*<<< orphan*/ *, unsigned char *, int);
int ASN1_BIT_STRING_set(ASN1_BIT_STRING *x, unsigned char *d, int len) {
  return M_ASN1_BIT_STRING_set(x, d, len);
}


x86 assembly (clang, -O0):
<ASN1_BIT_STRING_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <M_ASN1_BIT_STRING_set@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_BIT_STRING_set>:
jmp    1030 <M_ASN1_BIT_STRING_set@plt>

LLVM IR (-O0):
define i32 @ASN1_BIT_STRING_set(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @M_ASN1_BIT_STRING_set(i32* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @ASN1_BIT_STRING_set(i32* %0, i8* %1, i32 %2) {
%4 = tail call i32 @M_ASN1_BIT_STRING_set(i32* %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
char *sspm_property_name(char *);
int sspm_is_mail_header(char *line) {
  char *name = sspm_property_name(line);
  if (name != 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<sspm_is_mail_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <sspm_property_name@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1140 <sspm_is_mail_header+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1147 <sspm_is_mail_header+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sspm_is_mail_header>:
push   %rax
call   1030 <sspm_property_name@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sspm_is_mail_header(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @sspm_property_name(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @sspm_is_mail_header(i8* %0) {
%2 = tail call i8* @sspm_property_name(i8* %0)
%3 = icmp ne i8* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int random();
void mkrand(char *rand) {
  int i;
  for (i = 0; i < 20; ++i)
    rand[i] = 0 + random() % 127 + 1;
}


x86 assembly (clang, -O0):
<mkrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x14,-0xc(%rbp)
jge    115f <mkrand+0x4f>
mov    $0x0,%al
call   1030 <random@plt>
mov    $0x7f,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x0,%eax
add    $0x1,%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <mkrand+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkrand>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <random@plt>
cltq
imul   $0xffffffff81020409,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x6,%ecx
add    %edx,%ecx
mov    %ecx,%edx
shl    $0x7,%edx
sub    %edx,%ecx
add    %eax,%ecx
add    $0x1,%cl
mov    %cl,(%r14,%rbx,1)
add    $0x1,%rbx
cmp    $0x14,%rbx
jne    1120 <mkrand+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @mkrand(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 20
br i1 %6, label %7, label %20
7: ; preds = %4
%8 = call i32 (...) @random()
%9 = srem i32 %8, 127
%10 = add nsw i32 0, %9
%11 = add nsw i32 %10, 1
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 %12, i8* %16
br label %17
17: ; preds = %7
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %4
20: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @mkrand(i8* nocapture writeonly %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i64 [ 0, %1 ], [ %9, %2 ]
%4 = tail call i32 (...) @random()
%5 = srem i32 %4, 127
%6 = trunc i32 %5 to i8
%7 = add nsw i8 %6, 1
%8 = getelementptr inbounds i8, i8* %0, i64 %3
store i8 %7, i8* %8
%9 = add nuw nsw i64 %3, 1
%10 = icmp eq i64 %9, 20
br i1 %10, label %11, label %2
11: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ matNd_transpose(double *, int);
void mat3d_transpose(double m[9]) { matNd_transpose(m, 3); }


x86 assembly (clang, -O0):
<mat3d_transpose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1030 <matNd_transpose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat3d_transpose>:
mov    $0x3,%esi
jmp    1030 <matNd_transpose@plt>

LLVM IR (-O0):
define void @mat3d_transpose(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @matNd_transpose(double* %3, i32 3)
ret void
}

LLVM IR (-O2):
define void @mat3d_transpose(double* %0) {
%2 = tail call i32 @matNd_transpose(double* %0, i32 3)
ret void
}
void DBGFR3MemReadString(void) {}


x86 assembly (clang, -O0):
<DBGFR3MemReadString>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3MemReadString>:
ret

LLVM IR (-O0):
define void @DBGFR3MemReadString() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3MemReadString() {
ret void
}
void socket_init(void) {}


x86 assembly (clang, -O0):
<socket_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_init>:
ret

LLVM IR (-O0):
define void @socket_init() {
ret void
}

LLVM IR (-O2):
define void @socket_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Triangle167(long, long, long, long, long, long,
                               unsigned long);
void triangle(long x1, long y1, long x2, long y2, long x3, long y3,
              unsigned long c) {
  Triangle167(x1, y1, x2, y2, x3, y3, c);
}


x86 assembly (clang, -O0):
<triangle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <Triangle167@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<triangle>:
jmp    1030 <Triangle167@plt>

LLVM IR (-O0):
define void @triangle(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) {
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
store i64 %0, i64* %8
store i64 %1, i64* %9
store i64 %2, i64* %10
store i64 %3, i64* %11
store i64 %4, i64* %12
store i64 %5, i64* %13
store i64 %6, i64* %14
%15 = load i64, i64* %8
%16 = load i64, i64* %9
%17 = load i64, i64* %10
%18 = load i64, i64* %11
%19 = load i64, i64* %12
%20 = load i64, i64* %13
%21 = load i64, i64* %14
%22 = call i32 @Triangle167(i64 %15, i64 %16, i64 %17, i64 %18, i64 %19, i64 %20, i64 %21)
ret void
}

LLVM IR (-O2):
define void @triangle(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) {
%8 = tail call i32 @Triangle167(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6)
ret void
}
/* Variables and functions */
unsigned long long strtoull(char const *, int /*<<< orphan*/ *, int);
unsigned long long parse_hex64(const char *s) {
  return (strtoull(s, NULL, 16));
}


x86 assembly (clang, -O0):
<parse_hex64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x10,%edx
call   1030 <strtoull@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_hex64>:
xor    %esi,%esi
mov    $0x10,%edx
jmp    1030 <strtoull@plt>

LLVM IR (-O0):
define i64 @parse_hex64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strtoull(i8* %3, i32* null, i32 16)
ret i64 %4
}

LLVM IR (-O2):
define i64 @parse_hex64(i8* nocapture %0) {
%2 = tail call i64 @strtoull(i8* nocapture %0, i32* null, i32 16)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xd6() {
  Assert_real((ispunct(214) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              1075, ("ispunct should be 0 for 0xd6"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xd6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd6,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x433,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xd6>:
push   %rax
mov    $0xd6,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x433,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xd6\00"
define void @t_ispunct_0xd6() {
%1 = call i64 @ispunct(i32 214)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1075, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xd6\00"
define void @t_ispunct_0xd6() {
%1 = tail call i64 @ispunct(i32 214)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1075, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_running_timers();
int run_timers(const char *command) {
  do_running_timers();
  return -1;
}


x86 assembly (clang, -O0):
<run_timers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <do_running_timers@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_timers>:
push   %rax
xor    %eax,%eax
call   1030 <do_running_timers@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @run_timers(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @do_running_timers()
ret i32 -1
}

LLVM IR (-O2):
define i32 @run_timers(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @do_running_timers()
ret i32 -1
}
int f1(int i) { return i ? i / 10 : 0; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1124 <f1+0x24>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    112e <f1+0x2e>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <f1+0x2e>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sdiv i32 %6, 10
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ %7, %5 ], [ 0, %8 ]
ret i32 %10
}

LLVM IR (-O2):
define i32 @f1(i32 %0) {
%2 = sdiv i32 %0, 10
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
int /*<<< orphan*/ ft_putstr(char const *);
void ft_putendl(char const *s) {
  ft_putstr(s);
  ft_putchar('\n');
}


x86 assembly (clang, -O0):
<ft_putendl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_putstr@plt>
mov    $0xa,%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl>:
push   %rax
call   1040 <ft_putstr@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_putendl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ft_putstr(i8* %3)
%5 = call i32 @ft_putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @ft_putendl(i8* %0) {
%2 = tail call i32 @ft_putstr(i8* %0)
%3 = tail call i32 @ft_putchar(i8 signext 10)
ret void
}
/* Variables and functions */
scalar_t__ isspace(char);
char *skip_ws(char *s) {
  while (isspace(*s)) {
    s++;
  }
  return s;
}


x86 assembly (clang, -O0):
<skip_ws>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1143 <skip_ws+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_ws+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_ws>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <skip_ws+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_ws(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @skip_ws(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isspace(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
/* Variables and functions */
double exp(double);
double log(double);
double POW(double x, double n) { return exp(n * log(x)); }


x86 assembly (clang, -O0):
<POW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
call   1030 <exp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<POW>:
push   %rax
movsd  %xmm1,(%rsp)
call   1040 <log@plt>
mulsd  (%rsp),%xmm0
pop    %rax
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @POW(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
%7 = call double @log(double %6)
%8 = fmul double %5, %7
%9 = call double @exp(double %8)
ret double %9
}

LLVM IR (-O2):
define double @POW(double %0, double %1) {
%3 = tail call double @log(double %0)
%4 = fmul double %3, %1
%5 = tail call double @exp(double %4)
ret double %5
}
/* Variables and functions */
unsigned short crc_cal_by_bit(unsigned char const *, unsigned int);
unsigned short crc16_ccitt(const unsigned char *buf, unsigned int len) {
  return crc_cal_by_bit(buf, len);
}


x86 assembly (clang, -O0):
<crc16_ccitt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <crc_cal_by_bit@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc16_ccitt>:
jmp    1030 <crc_cal_by_bit@plt>

LLVM IR (-O0):
define zeroext i16 @crc16_ccitt(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call zeroext i16 @crc_cal_by_bit(i8* %5, i32 %6)
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @crc16_ccitt(i8* %0, i32 %1) {
%3 = tail call zeroext i16 @crc_cal_by_bit(i8* %0, i32 %1)
ret i16 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ read(int, void *, size_t);
ssize_t syscall_read(int fildes, void *buf, size_t nbyte) {
  return read(fildes, buf, nbyte);
}


x86 assembly (clang, -O0):
<syscall_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall_read>:
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @syscall_read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @read(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @syscall_read(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
bool isnewline(char ch) { return ch == '\n' || ch == '\r'; }


x86 assembly (clang, -O0):
<isnewline>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     1129 <isnewline+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0xd,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnewline>:
cmp    $0xa,%dil
sete   %al
cmp    $0xd,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isnewline(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 10
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 13
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isnewline(i8 signext %0) {
%2 = icmp eq i8 %0, 10
%3 = icmp eq i8 %0, 13
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
adrx0adrx1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (((short *)10000000)[x0]) = (((short *)11111111)[x1]); }


x86 assembly (clang, -O0):
<adrx0adrx1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0x10(%rbp),%rcx
mov    $0xa98ac7,%eax
mov    (%rax,%rcx,2),%dx
movslq -0xc(%rbp),%rcx
mov    $0x989680,%eax
mov    %dx,(%rax,%rcx,2)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrx0adrx1_set>:
movslq %ecx,%rax
movzwl 0xa98ac7(%rax,%rax,1),%eax
movslq %edx,%rcx
mov    %ax,0x989680(%rcx,%rcx,1)
ret

LLVM IR (-O0):
define i32 @adrx0adrx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i32, i32* %11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %17
%19 = load i16, i16* %18
%20 = load i32, i32* %10
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i16, i16* inttoptr (i64 10000000 to i16*), i64 %21
store i16 %19, i16* %22
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @adrx0adrx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %7
%9 = load i16, i16* %8
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds i16, i16* inttoptr (i64 10000000 to i16*), i64 %10
store i16 %9, i16* %11
ret i32 undef
}
void foo(char c) {
  int i;
  i = c;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
store i32 %5, i32* %3
ret void
}

LLVM IR (-O2):
define void @foo(i8 signext %0) {
ret void
}