unsigned long long flip_G6(const unsigned long long discs_player,
                           const unsigned long long discs_opponent) {
  unsigned long long my_discs, opp_discs, r;
  unsigned long long flipped =
      (discs_opponent & 0X0000000000000400ULL) & (discs_player << 7);
  flipped |= (discs_opponent & 0X0000000000000200ULL) & (discs_player << 8);
  my_discs = discs_player & 0X0000000000F80000ULL;
  r = (discs_opponent + 0X0000000000040000ULL) & my_discs;
  if (r != 0) {
    flipped |= (r - 1) & 0X0000000000FC0000ULL;
  }
  my_discs = discs_player & 0X4020100800000000ULL;
  opp_discs = (discs_opponent & 0X0020100804000000ULL) | 0X3FDFEFF7F8000000ULL;
  r = (opp_discs + 0X0000000004000000ULL) & my_discs;
  if (r != 0) {
    flipped |= (r - 1) & 0X0020100804000000ULL;
  }
  my_discs = discs_player & 0X0202020200000000ULL;
  opp_discs = (discs_opponent & 0X0002020202000000ULL) | 0X01FDFDFDFC000000ULL;
  r = (opp_discs + 0X0000000002000000ULL) & my_discs;
  if (r != 0) {
    flipped |= (r - 1) & 0X0002020202000000ULL;
  }
  return flipped;
}


x86 assembly (clang, -O0):
<flip_G6>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x400,%rax
mov    -0x8(%rbp),%rcx
shl    $0x7,%rcx
and    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
and    $0x200,%rax
mov    -0x8(%rbp),%rcx
shl    $0x8,%rcx
and    %rcx,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
and    $0xf80000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x40000,%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     1183 <flip_G6+0x83>
mov    -0x28(%rbp),%rax
sub    $0x1,%rax
and    $0xfc0000,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
movabs $0x4020100800000000,%rax
10 20 40
and    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movabs $0x20100804000000,%rax
and    -0x10(%rbp),%rax
movabs $0x3fdfeff7f8000000,%rcx
ef df 3f
or     %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x4000000,%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     11ee <flip_G6+0xee>
mov    -0x28(%rbp),%rax
sub    $0x1,%rax
movabs $0x20100804000000,%rcx
and    %rcx,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
movabs $0x202020200000000,%rax
02 02 02
and    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movabs $0x2020202000000,%rax
and    -0x10(%rbp),%rax
movabs $0x1fdfdfdfc000000,%rcx
fd fd 01
or     %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x2000000,%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     1259 <flip_G6+0x159>
mov    -0x28(%rbp),%rax
sub    $0x1,%rax
movabs $0x2020202000000,%rcx
and    %rcx,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_G6>:
mov    %edi,%ecx
shl    $0x7,%ecx
and    %esi,%ecx
and    $0x400,%ecx
mov    %edi,%eax
shl    $0x8,%eax
and    %esi,%eax
and    $0x200,%eax
or     %rcx,%rax
lea    0x40000(%rsi),%ecx
and    %edi,%ecx
and    $0xf80000,%ecx
lea    -0x1(%rcx),%r9d
and    $0xfc0000,%r9d
test   %rcx,%rcx
cmove  %rcx,%r9
or     %rax,%r9
movabs $0x20100804000000,%r8
mov    %rsi,%rcx
and    %r8,%rcx
movabs $0x3fdfeff7fc000000,%rax
ef df 3f
add    %rcx,%rax
movabs $0x4020100800000000,%rcx
10 20 40
and    %rdi,%rcx
and    %rax,%rcx
lea    -0x1(%rcx),%rdx
and    %r8,%rdx
test   %rcx,%rcx
cmove  %rcx,%rdx
or     %r9,%rdx
movabs $0x2020202000000,%rcx
and    %rcx,%rsi
movabs $0x1fdfdfdfe000000,%rax
fd fd 01
add    %rsi,%rax
movabs $0x202020200000000,%rsi
02 02 02
and    %rdi,%rsi
and    %rax,%rsi
lea    -0x1(%rsi),%rax
and    %rcx,%rax
test   %rsi,%rsi
cmove  %rsi,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @flip_G6(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = and i64 %9, 1024
%11 = load i64, i64* %3
%12 = shl i64 %11, 7
%13 = and i64 %10, %12
store i64 %13, i64* %8
%14 = load i64, i64* %4
%15 = and i64 %14, 512
%16 = load i64, i64* %3
%17 = shl i64 %16, 8
%18 = and i64 %15, %17
%19 = load i64, i64* %8
%20 = or i64 %19, %18
store i64 %20, i64* %8
%21 = load i64, i64* %3
%22 = and i64 %21, 16252928
store i64 %22, i64* %5
%23 = load i64, i64* %4
%24 = add i64 %23, 262144
%25 = load i64, i64* %5
%26 = and i64 %24, %25
store i64 %26, i64* %7
%27 = load i64, i64* %7
%28 = icmp ne i64 %27, 0
br i1 %28, label %29, label %35
29: ; preds = %2
%30 = load i64, i64* %7
%31 = sub i64 %30, 1
%32 = and i64 %31, 16515072
%33 = load i64, i64* %8
%34 = or i64 %33, %32
store i64 %34, i64* %8
br label %35
35: ; preds = %29, %2
%36 = load i64, i64* %3
%37 = and i64 %36, 4620710844227911680
store i64 %37, i64* %5
%38 = load i64, i64* %4
%39 = and i64 %38, 9024825867632640
%40 = or i64 %39, 4602661192492646400
store i64 %40, i64* %6
%41 = load i64, i64* %6
%42 = add i64 %41, 67108864
%43 = load i64, i64* %5
%44 = and i64 %42, %43
store i64 %44, i64* %7
%45 = load i64, i64* %7
%46 = icmp ne i64 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %35
%48 = load i64, i64* %7
%49 = sub i64 %48, 1
%50 = and i64 %49, 9024825867632640
%51 = load i64, i64* %8
%52 = or i64 %51, %50
store i64 %52, i64* %8
br label %53
53: ; preds = %47, %35
%54 = load i64, i64* %3
%55 = and i64 %54, 144680345642467328
store i64 %55, i64* %5
%56 = load i64, i64* %4
%57 = and i64 %56, 565157600165888
%58 = or i64 %57, 143550030442135552
store i64 %58, i64* %6
%59 = load i64, i64* %6
%60 = add i64 %59, 33554432
%61 = load i64, i64* %5
%62 = and i64 %60, %61
store i64 %62, i64* %7
%63 = load i64, i64* %7
%64 = icmp ne i64 %63, 0
br i1 %64, label %65, label %71
65: ; preds = %53
%66 = load i64, i64* %7
%67 = sub i64 %66, 1
%68 = and i64 %67, 565157600165888
%69 = load i64, i64* %8
%70 = or i64 %69, %68
store i64 %70, i64* %8
br label %71
71: ; preds = %65, %53
%72 = load i64, i64* %8
ret i64 %72
}

LLVM IR (-O2):
define i64 @flip_G6(i64 %0, i64 %1) {
%3 = and i64 %1, 1024
%4 = shl i64 %0, 7
%5 = and i64 %3, %4
%6 = and i64 %1, 512
%7 = shl i64 %0, 8
%8 = and i64 %6, %7
%9 = or i64 %5, %8
%10 = and i64 %0, 16252928
%11 = add i64 %1, 262144
%12 = and i64 %10, %11
%13 = icmp eq i64 %12, 0
%14 = add nuw nsw i64 %12, 16777215
%15 = and i64 %14, 16515072
%16 = select i1 %13, i64 0, i64 %15
%17 = or i64 %9, %16
%18 = and i64 %0, 4620710844227911680
%19 = and i64 %1, 9024825867632640
%20 = add nuw nsw i64 %19, 4602661192559755264
%21 = and i64 %18, %20
%22 = icmp eq i64 %21, 0
%23 = add nuw nsw i64 %21, 18014398509481983
%24 = and i64 %23, 9024825867632640
%25 = select i1 %22, i64 0, i64 %24
%26 = or i64 %17, %25
%27 = and i64 %0, 144680345642467328
%28 = and i64 %1, 565157600165888
%29 = add nuw nsw i64 %28, 143550030475689984
%30 = and i64 %27, %29
%31 = icmp eq i64 %30, 0
%32 = add nuw nsw i64 %30, 1125899906842623
%33 = and i64 %32, 565157600165888
%34 = select i1 %31, i64 0, i64 %33
%35 = or i64 %26, %34
ret i64 %35
}