xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ RTLD_LAZY;
void *dlopen(char *, int /*<<< orphan*/);
void *dlsym(void *, char *);
long getFunctionAddress(char *funcName) {
  void *self = dlopen("libc.so.6", RTLD_LAZY);
  void *funcAddr = dlsym(self, funcName);
  return (long)funcAddr;
}


x86 assembly (clang, -O0):
<getFunctionAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
lea    0xec4(%rip),%rdi
call   1030 <dlopen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <dlsym@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFunctionAddress>:
push   %rbx
mov    %rdi,%rbx
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <dlopen@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <dlsym@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"libc.so.6\00"
@RTLD_LAZY = global i32 0
define i64 @getFunctionAddress(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i32, i32* @RTLD_LAZY
%6 = call i8* @dlopen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = load i8*, i8** %2
%9 = call i8* @dlsym(i8* %7, i8* %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = ptrtoint i8* %10 to i64
ret i64 %11
}

LLVM IR (-O2):
@.str = [10 x i8] c"libc.so.6\00"
@RTLD_LAZY = global i32 0
define i64 @getFunctionAddress(i8* %0) {
%2 = load i32, i32* @RTLD_LAZY
%3 = tail call i8* @dlopen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i8* @dlsym(i8* %3, i8* %0)
%5 = ptrtoint i8* %4 to i64
ret i64 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int open(char const *, int, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int open_file(const char *path, int flags, mode_t mode) {
  int fd;
  fd = open(path, flags, mode);
  if (fd < 0)
    perror(path);
  return fd;
}


x86 assembly (clang, -O0):
<open_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <open@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1157 <open_file+0x37>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_file>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <open@plt>
mov    %eax,%ebp
test   %eax,%eax
js     113a <open_file+0x1a>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
call   1040 <perror@plt>
jmp    1131 <open_file+0x11>

LLVM IR (-O0):
define i32 @open_file(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @open(i8* %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i8*, i8** %4
%16 = call i32 @perror(i8* %15)
br label %17
17: ; preds = %14, %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @open_file(i8* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @open(i8* %0, i32 %1, i32 %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @perror(i8* %0)
br label %8
8: ; preds = %6, %3
ret i32 %4
}
char caesarde(char c, int key) {
  if ((c != '\0') && (c != '\n') && (c != '\r')) {
    char out = c + key;
    return out;
  } else {
    return '\0';
  }
}


x86 assembly (clang, -O0):
<caesarde>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x0,%eax
je     1149 <caesarde+0x49>
movsbl -0x2(%rbp),%eax
cmp    $0xa,%eax
je     1149 <caesarde+0x49>
movsbl -0x2(%rbp),%eax
cmp    $0xd,%eax
je     1149 <caesarde+0x49>
movsbl -0x2(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    114d <caesarde+0x4d>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<caesarde>:
mov    %esi,%eax
cmp    $0xd,%dil
ja     111a <caesarde+0x1a>
movzbl %dil,%ecx
mov    $0x2401,%edx
bt     %rcx,%rdx
jae    111a <caesarde+0x1a>
xor    %eax,%eax
ret
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @caesarde(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i8
store i8 %0, i8* %4
store i32 %1, i32* %5
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %25
10: ; preds = %2
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 10
br i1 %13, label %14, label %25
14: ; preds = %10
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 13
br i1 %17, label %18, label %25
18: ; preds = %14
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = load i32, i32* %5
%22 = add nsw i32 %20, %21
%23 = trunc i32 %22 to i8
store i8 %23, i8* %6
%24 = load i8, i8* %6
store i8 %24, i8* %3
br label %26
25: ; preds = %14, %10, %2
store i8 0, i8* %3
br label %26
26: ; preds = %25, %18
%27 = load i8, i8* %3
ret i8 %27
}

LLVM IR (-O2):
define signext i8 @caesarde(i8 signext %0, i32 %1) {
switch i8 %0, label %3 [
i8 13, label %6
i8 10, label %6
i8 0, label %6
]
3: ; preds = %2
%4 = trunc i32 %1 to i8
%5 = add i8 %4, %0
br label %6
6: ; preds = %2, %2, %2, %3
%7 = phi i8 [ %5, %3 ], [ 0, %2 ], [ 0, %2 ], [ 0, %2 ]
ret i8 %7
}
/* Variables and functions */
float sinhf(float);
void sSinh_process(float bIn, float *bOut) { *bOut = sinhf(bIn); }


x86 assembly (clang, -O0):
<sSinh_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinhf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sSinh_process>:
push   %rbx
mov    %rdi,%rbx
call   1030 <sinhf@plt>
movss  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @sSinh_process(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = call float @sinhf(float %5)
%7 = load float*, float** %4
store float %6, float* %7
ret void
}

LLVM IR (-O2):
define void @sSinh_process(float %0, float* nocapture writeonly %1) {
%3 = tail call float @sinhf(float %0)
store float %3, float* %1
ret void
}
/* Type definitions */
struct coprthr_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _printcl(char *, int, char *, char *);
void *native_kernel(struct coprthr_device *dev, void *argp) {
  do {
    if ("<4>"
        "cmdcall_x86_64:native_kernel: unsupported"[1] <= '0')
      _printcl("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/browndeer/coprthr/refs/heads/"
               "parallellocalypse/src/libcoprthr/arch/x86_64/devcmds_x86_64.c",
               206, "clmesg",
               "<4>"
               "cmdcall_x86_64:native_kernel: unsupported");
  } while (0);
  return (0);
}


x86 assembly (clang, -O0):
<native_kernel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
jmp    1111 <native_kernel+0x11>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_kernel>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.coprthr_device = type { i32 }
define i8* @native_kernel(%struct.coprthr_device* %0, i8* %1) {
%3 = alloca %struct.coprthr_device*
%4 = alloca i8*
store %struct.coprthr_device* %0, %struct.coprthr_device** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %2
br label %6
6: ; preds = %5
ret i8* null
}

LLVM IR (-O2):
%struct.coprthr_device = type { i32 }
define noalias i8* @native_kernel(%struct.coprthr_device* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
int fun171() { return 171; }


x86 assembly (clang, -O0):
<fun171>:
push   %rbp
mov    %rsp,%rbp
mov    $0xab,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun171>:
mov    $0xab,%eax
ret

LLVM IR (-O0):
define i32 @fun171() {
ret i32 171
}

LLVM IR (-O2):
define i32 @fun171() {
ret i32 171
}
/* Type definitions */
typedef unsigned long uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ I2CSlaveEnable(int);
void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr) {
  ;
  ;
  I2CSlaveEnable(0x40002000);
  (*((volatile unsigned long *)(0x40002000 + 0x00000000))) = ui8SlaveAddr;
}


x86 assembly (clang, -O0):
<I2CSlaveInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x40002000,%edi
call   1030 <I2CSlaveEnable@plt>
mov    -0x10(%rbp),%rcx
mov    $0x40002000,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveInit>:
push   %rbx
mov    %rsi,%rbx
mov    $0x40002000,%edi
call   1030 <I2CSlaveEnable@plt>
mov    %rbx,0x40002000
40
pop    %rbx
ret

LLVM IR (-O0):
define void @I2CSlaveInit(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = call i32 @I2CSlaveEnable(i32 1073750016)
%6 = load i64, i64* %4
store volatile i64 %6, i64* inttoptr (i64 1073750016 to i64*)
ret void
}

LLVM IR (-O2):
define void @I2CSlaveInit(i32 %0, i64 %1) {
%3 = tail call i32 @I2CSlaveEnable(i32 1073750016)
store volatile i64 %1, i64* inttoptr (i64 1073750016 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void f(int x, int y) { printf("wow\n"); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"wow\0A\00"
define void @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"wow\00"
define void @f(i32 %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
void movCI(char *src, int *dst) { *dst = *src; }


x86 assembly (clang, -O0):
<movCI>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<movCI>:
movsbl (%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @movCI(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i32*, i32** %4
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @movCI(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
store i32 %4, i32* %1
ret void
}
void localinit(void) {}


x86 assembly (clang, -O0):
<localinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<localinit>:
ret

LLVM IR (-O0):
define void @localinit() {
ret void
}

LLVM IR (-O2):
define void @localinit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0x24() {
  Assert_real((islower(36) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              185, ("islower should be 0 for $"));
}


x86 assembly (clang, -O0):
<t_islower_0x24>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xb9,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x24>:
push   %rax
mov    $0x24,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xb9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for $\00"
define void @t_islower_0x24() {
%1 = call i64 @islower(i32 36)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for $\00"
define void @t_islower_0x24() {
%1 = tail call i64 @islower(i32 36)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nsc_assert(int);
void kmem_suballoc(void) {
  nsc_assert(0 && "This function is unimplemented.");
  ;
}


x86 assembly (clang, -O0):
<kmem_suballoc>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmem_suballoc>:
xor    %edi,%edi
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
define void @kmem_suballoc() {
%1 = call i32 @nsc_assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @kmem_suballoc() {
%1 = tail call i32 @nsc_assert(i32 0)
ret void
}
void put_unaligned_uint32(void *p, unsigned int datum) {
  struct {
    unsigned int d;
  } __attribute__((packed)) *pp = p;
  pp->d = datum;
}


x86 assembly (clang, -O0):
<put_unaligned_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_unaligned_uint32>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.anon = type { i32 }
define void @put_unaligned_uint32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.anon*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.anon*
store %struct.anon* %7, %struct.anon** %5
%8 = load i32, i32* %4
%9 = load %struct.anon*, %struct.anon** %5
%10 = getelementptr inbounds %struct.anon, %struct.anon* %9, i32 0, i32 0
store i32 %8, i32* %10
ret void
}

LLVM IR (-O2):
define void @put_unaligned_uint32(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void _gfortran_caf_critical(void) {}


x86 assembly (clang, -O0):
<_gfortran_caf_critical>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gfortran_caf_critical>:
ret

LLVM IR (-O0):
define void @_gfortran_caf_critical() {
ret void
}

LLVM IR (-O2):
define void @_gfortran_caf_critical() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void vt100_erase_screen(void) {
  printf("\x1b[2J");
  fflush(stdout);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[2J\00"
@stdout = global i32 0
define void @vt100_erase_screen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[2J\00"
@stdout = global i32 0
define void @vt100_erase_screen() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ refrelease(void *);
void refreplace(void **var, void *val) {
  void *deadite = *var;
  *var = val;
  refrelease(deadite);
}


x86 assembly (clang, -O0):
<refreplace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rdi
call   1030 <refrelease@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<refreplace>:
mov    (%rdi),%rax
mov    %rsi,(%rdi)
mov    %rax,%rdi
jmp    1030 <refrelease@plt>

LLVM IR (-O0):
define void @refreplace(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8* %7, i8** %5
%8 = load i8*, i8** %4
%9 = load i8**, i8*** %3
store i8* %8, i8** %9
%10 = load i8*, i8** %5
%11 = call i32 @refrelease(i8* %10)
ret void
}

LLVM IR (-O2):
define void @refreplace(i8** nocapture %0, i8* %1) {
%3 = load i8*, i8** %0
store i8* %1, i8** %0
%4 = tail call i32 @refrelease(i8* %3)
ret void
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ sprintf(char *, char *, char const *, char const *);
scalar_t__ strlen(char const *);
char *new_string(const char *name, const char *val) {
  char *retval = (char *)malloc(strlen(name) + strlen(val) + 2);
  if (retval != NULL) {
    sprintf(retval, "%s=%s", name, val);
  }
  return retval;
}


x86 assembly (clang, -O0):
<new_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
add    %rax,%rdi
add    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     118d <new_string+0x5d>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe78(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_string>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
lea    (%rbx,%rax,1),%rdi
add    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1175 <new_string+0x45>
lea    0xe99(%rip),%rsi
mov    %rbx,%rdi
mov    %r15,%rdx
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s=%s\00"
define i8* @new_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %7, %9
%11 = add nsw i64 %10, 2
%12 = call i64 @malloc(i64 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = icmp ne i8* %14, null
br i1 %15, label %16, label %21
16: ; preds = %2
%17 = load i8*, i8** %5
%18 = load i8*, i8** %3
%19 = load i8*, i8** %4
%20 = call i32 @sprintf(i8* %17, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %18, i8* %19)
br label %21
21: ; preds = %16, %2
%22 = load i8*, i8** %5
ret i8* %22
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s=%s\00"
define i8* @new_string(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add i64 %3, 2
%6 = add i64 %5, %4
%7 = tail call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
%9 = icmp eq i64 %7, 0
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = tail call i32 @sprintf(i8* %8, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
br label %12
12: ; preds = %10, %2
ret i8* %8
}
void coresight_cti_unmap_trigout(struct coresight_cti *cti, int trig, int ch) {}


x86 assembly (clang, -O0):
<coresight_cti_unmap_trigout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<coresight_cti_unmap_trigout>:
ret

LLVM IR (-O0):
%struct.coresight_cti = type opaque
define void @coresight_cti_unmap_trigout(%struct.coresight_cti* %0, i32 %1, i32 %2) {
%4 = alloca %struct.coresight_cti*
%5 = alloca i32
%6 = alloca i32
store %struct.coresight_cti* %0, %struct.coresight_cti** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.coresight_cti = type opaque
define void @coresight_cti_unmap_trigout(%struct.coresight_cti* nocapture %0, i32 %1, i32 %2) {
ret void
}
void atomic_thread_fence(memory_order_release_t) {
  __asm__ __volatile__("" : : : "memory");
}


x86 assembly (clang, -O0):
<atomic_thread_fence>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_thread_fence>:
ret

LLVM IR (-O0):
define void @atomic_thread_fence(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @atomic_thread_fence(i32 %0) {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
void plat_video_menu_end(void) {}


x86 assembly (clang, -O0):
<plat_video_menu_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plat_video_menu_end>:
ret

LLVM IR (-O0):
define void @plat_video_menu_end() {
ret void
}

LLVM IR (-O2):
define void @plat_video_menu_end() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x4b() {
  Assert_real((isdigit(75) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              380, ("isdigit should be 0 for K"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x4b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4b,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x17c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x4b>:
push   %rax
mov    $0x4b,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x17c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for K\00"
define void @t_isdigit_0x4b() {
%1 = call i64 @isdigit(i32 75)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 380, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for K\00"
define void @t_isdigit_0x4b() {
%1 = tail call i64 @isdigit(i32 75)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 380, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int rand();
void wo_repeated_conditionals() {
  int a, b;
  a = rand();
  b = rand();
  if (a < b) {
    b += a;
    return;
  } else {
    a += b;
    return;
  }
}


x86 assembly (clang, -O0):
<wo_repeated_conditionals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1146 <wo_repeated_conditionals+0x36>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    114f <wo_repeated_conditionals+0x3f>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wo_repeated_conditionals>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rand@plt>

LLVM IR (-O0):
define void @wo_repeated_conditionals() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @rand()
store i32 %3, i32* %1
%4 = call i32 (...) @rand()
store i32 %4, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %0
%9 = load i32, i32* %1
%10 = load i32, i32* %2
%11 = add nsw i32 %10, %9
store i32 %11, i32* %2
br label %16
12: ; preds = %0
%13 = load i32, i32* %2
%14 = load i32, i32* %1
%15 = add nsw i32 %14, %13
store i32 %15, i32* %1
br label %16
16: ; preds = %12, %8
ret void
}

LLVM IR (-O2):
define void @wo_repeated_conditionals() {
%1 = tail call i32 (...) @rand()
%2 = tail call i32 (...) @rand()
ret void
}
int ToUpper(int iChar) {
  return (iChar >= 'a' && iChar <= 'z') ? 'A' + (iChar - 'a') : iChar;
}


x86 assembly (clang, -O0):
<ToUpper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     112c <ToUpper+0x2c>
cmpl   $0x7a,-0x4(%rbp)
jg     112c <ToUpper+0x2c>
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <ToUpper+0x32>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ToUpper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ToUpper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 97
%11 = add nsw i32 65, %10
br label %14
12: ; preds = %5, %1
%13 = load i32, i32* %2
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ %11, %8 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @ToUpper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
void cvt_u8RGBA_u8RGBA(const uint8_t *src, uint8_t *dest, int w) {
  memcpy(dest, src, w * 4);
}


x86 assembly (clang, -O0):
<cvt_u8RGBA_u8RGBA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x14(%rbp),%edx
shl    $0x2,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvt_u8RGBA_u8RGBA>:
mov    %rdi,%rax
shl    $0x2,%edx
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cvt_u8RGBA_u8RGBA(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = mul nsw i32 %9, 4
%11 = call i32 @memcpy(i32* %7, i32* %8, i32 %10)
ret void
}

LLVM IR (-O2):
define void @cvt_u8RGBA_u8RGBA(i32* %0, i32* %1, i32 %2) {
%4 = shl nsw i32 %2, 2
%5 = tail call i32 @memcpy(i32* %1, i32* %0, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SmcConn;
typedef int /*<<< orphan*/ SmPointer;
typedef int /*<<< orphan*/ Bool;

/* Variables and functions */
int /*<<< orphan*/ SmcSaveYourselfDone(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ True;
void save_yourself(SmcConn conn, SmPointer client_data, int save_type,
                   Bool shutdown, int interact_style, Bool fast) {
  SmcSaveYourselfDone(conn, True);
}


x86 assembly (clang, -O0):
<save_yourself>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
call   1030 <SmcSaveYourselfDone@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_yourself>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <SmcSaveYourselfDone@plt>

LLVM IR (-O0):
@True = global i32 0
define void @save_yourself(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i32, i32* @True
%15 = call i32 @SmcSaveYourselfDone(i32 %13, i32 %14)
ret void
}

LLVM IR (-O2):
@True = global i32 0
define void @save_yourself(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = load i32, i32* @True
%8 = tail call i32 @SmcSaveYourselfDone(i32 %0, i32 %7)
ret void
}
void av_mediacodec_alloc_context() {}


x86 assembly (clang, -O0):
<av_mediacodec_alloc_context>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_mediacodec_alloc_context>:
ret

LLVM IR (-O0):
define void @av_mediacodec_alloc_context() {
ret void
}

LLVM IR (-O2):
define void @av_mediacodec_alloc_context() {
ret void
}
char ConverterDNAComplement(char Nucleotide) {
  switch (Nucleotide) {
  case 'A':
    return 'T';
  case 'T':
    return 'A';
  case 'C':
    return 'G';
  case 'G':
    return 'C';
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<ConverterDNAComplement>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x13,%eax
ja     1158 <ConverterDNAComplement+0x58>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x54,-0x1(%rbp)
jmp    115c <ConverterDNAComplement+0x5c>
movb   $0x41,-0x1(%rbp)
jmp    115c <ConverterDNAComplement+0x5c>
movb   $0x47,-0x1(%rbp)
jmp    115c <ConverterDNAComplement+0x5c>
movb   $0x43,-0x1(%rbp)
jmp    115c <ConverterDNAComplement+0x5c>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConverterDNAComplement>:
add    $0xffffffbf,%edi
cmp    $0x13,%edi
ja     111d <ConverterDNAComplement+0x1d>
mov    $0x54,%al
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x47,%al
ret
xor    %eax,%eax
ret
mov    $0x43,%al
ret
mov    $0x41,%al
ret

LLVM IR (-O0):
define signext i8 @ConverterDNAComplement(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 65, label %6
i32 84, label %7
i32 67, label %8
i32 71, label %9
]
6: ; preds = %1
store i8 84, i8* %2
br label %11
7: ; preds = %1
store i8 65, i8* %2
br label %11
8: ; preds = %1
store i8 71, i8* %2
br label %11
9: ; preds = %1
store i8 67, i8* %2
br label %11
10: ; preds = %1
store i8 0, i8* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6
%12 = load i8, i8* %2
ret i8 %12
}

LLVM IR (-O2):
define signext i8 @ConverterDNAComplement(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %6 [
i32 65, label %7
i32 84, label %3
i32 67, label %4
i32 71, label %5
]
3: ; preds = %1
br label %7
4: ; preds = %1
br label %7
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %5, %4, %3
%8 = phi i8 [ 0, %6 ], [ 67, %5 ], [ 71, %4 ], [ 65, %3 ], [ 84, %1 ]
ret i8 %8
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ getnanouptime(struct timespec *);
void getrawmonotonic(struct timespec *ts) { getnanouptime(ts); }


x86 assembly (clang, -O0):
<getrawmonotonic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getnanouptime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getrawmonotonic>:
jmp    1030 <getnanouptime@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @getrawmonotonic(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = call i32 @getnanouptime(%struct.timespec* %3)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @getrawmonotonic(%struct.timespec* %0) {
%2 = tail call i32 @getnanouptime(%struct.timespec* %0)
ret void
}
/* Variables and functions */
void *MAP_FAILED;
int /*<<< orphan*/ SYS_mremap;
intptr_t syscall4(int /*<<< orphan*/, uintptr_t, size_t, size_t, int);
void *sys_mremap(void *old_addr, size_t old_size, size_t new_size, int flags) {
  intptr_t ret =
      syscall4(SYS_mremap, (uintptr_t)old_addr, old_size, new_size, flags);
  if (ret < 0 && ret > -4096)
    return MAP_FAILED;
  return (void *)ret;
}


x86 assembly (clang, -O0):
<sys_mremap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <syscall4@plt>
mov    %rax,-0x30(%rbp)
cmpq   $0x0,-0x30(%rbp)
jge    1175 <sys_mremap+0x65>
cmpq   $0xfffffffffffff000,-0x30(%rbp)
ff
jle    1175 <sys_mremap+0x65>
mov    0x2e6f(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    117d <sys_mremap+0x6d>
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_mremap>:
push   %rax
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall4@plt>
cmp    $0xfffffffffffff001,%rax
jb     113d <sys_mremap+0x2d>
mov    0x2e9e(%rip),%rax
mov    (%rax),%rax
pop    %rcx
ret

LLVM IR (-O0):
@SYS_mremap = global i32 0
@MAP_FAILED = global i8* null
define i8* @sys_mremap(i8* %0, i64 %1, i64 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32
%10 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i32 %3, i32* %9
%11 = load i32, i32* @SYS_mremap
%12 = load i8*, i8** %6
%13 = ptrtoint i8* %12 to i64
%14 = load i64, i64* %7
%15 = load i64, i64* %8
%16 = load i32, i32* %9
%17 = call i64 @syscall4(i32 %11, i64 %13, i64 %14, i64 %15, i32 %16)
store i64 %17, i64* %10
%18 = load i64, i64* %10
%19 = icmp slt i64 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %4
%21 = load i64, i64* %10
%22 = icmp sgt i64 %21, -4096
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = load i8*, i8** @MAP_FAILED
store i8* %24, i8** %5
br label %28
25: ; preds = %20, %4
%26 = load i64, i64* %10
%27 = inttoptr i64 %26 to i8*
store i8* %27, i8** %5
br label %28
28: ; preds = %25, %23
%29 = load i8*, i8** %5
ret i8* %29
}

LLVM IR (-O2):
@SYS_mremap = global i32 0
@MAP_FAILED = global i8* null
define i8* @sys_mremap(i8* %0, i64 %1, i64 %2, i32 %3) {
%5 = load i32, i32* @SYS_mremap
%6 = ptrtoint i8* %0 to i64
%7 = tail call i64 @syscall4(i32 %5, i64 %6, i64 %1, i64 %2, i32 %3)
%8 = icmp ugt i64 %7, -4096
%9 = load i8*, i8** @MAP_FAILED
%10 = inttoptr i64 %7 to i8*
%11 = select i1 %8, i8* %9, i8* %10
ret i8* %11
}
int faked_compare(const void *a, const void *b) {
  unsigned long *a1 = (unsigned long *)a;
  unsigned long *b1 = (unsigned long *)b;
  if (*a1 < *b1)
    return 1;
  if (*a1 > *b1)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<faked_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jae    113c <faked_compare+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <faked_compare+0x63>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jbe    115c <faked_compare+0x5c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <faked_compare+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<faked_compare>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    %rcx,%rax
seta   %dl
neg    %edx
cmp    %rcx,%rax
mov    $0x1,%eax
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @faked_compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64*
%7 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
store i64* %9, i64** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i64*
store i64* %11, i64** %7
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i64*, i64** %7
%15 = load i64, i64* %14
%16 = icmp ult i64 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %26
18: ; preds = %2
%19 = load i64*, i64** %6
%20 = load i64, i64* %19
%21 = load i64*, i64** %7
%22 = load i64, i64* %21
%23 = icmp ugt i64 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 -1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @faked_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
%8 = icmp ugt i64 %5, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
int posix_get_current_tick();
time_t posix_get_current_sec() { return posix_get_current_tick() / 1000; }


x86 assembly (clang, -O0):
<posix_get_current_sec>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <posix_get_current_tick@plt>
mov    $0x3e8,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_get_current_sec>:
push   %rax
xor    %eax,%eax
call   1030 <posix_get_current_tick@plt>
cltq
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x26,%rax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @posix_get_current_sec() {
%1 = call i32 (...) @posix_get_current_tick()
%2 = sdiv i32 %1, 1000
ret i32 %2
}

LLVM IR (-O2):
define i32 @posix_get_current_sec() {
%1 = tail call i32 (...) @posix_get_current_tick()
%2 = sdiv i32 %1, 1000
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ idct8(int /*<<< orphan*/ *const, int /*<<< orphan*/ *const);
int /*<<< orphan*/ transpose_16bit_8x8(int /*<<< orphan*/ *const,
                                       int /*<<< orphan*/ *const);
void vpx_idct8_sse2(__m128i *const in) {
  transpose_16bit_8x8(in, in);
  idct8(in, in);
}


x86 assembly (clang, -O0):
<vpx_idct8_sse2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <transpose_16bit_8x8@plt>
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <idct8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpx_idct8_sse2>:
push   %rbx
mov    %rdi,%rbx
mov    %rdi,%rsi
call   1030 <transpose_16bit_8x8@plt>
mov    %rbx,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <idct8@plt>

LLVM IR (-O0):
define void @vpx_idct8_sse2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @transpose_16bit_8x8(i32* %3, i32* %4)
%6 = load i32*, i32** %2
%7 = load i32*, i32** %2
%8 = call i32 @idct8(i32* %6, i32* %7)
ret void
}

LLVM IR (-O2):
define void @vpx_idct8_sse2(i32* %0) {
%2 = tail call i32 @transpose_16bit_8x8(i32* %0, i32* %0)
%3 = tail call i32 @idct8(i32* %0, i32* %0)
ret void
}
char *one_zero() {
  static char *const base = (char *)1;
  static const unsigned long offset = 0;
  return base + offset;
}


x86 assembly (clang, -O0):
<one_zero>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<one_zero>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@one_zero.base = internal constant i8* inttoptr (i64 1 to i8*)
@one_zero.offset = internal constant i64 0
define i8* @one_zero() {
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
define i8* @one_zero() {
ret i8* inttoptr (i64 1 to i8*)
}
/* Variables and functions */
float fastInverseSqrt(float);
float fastSqrt(float x) {
  float invSqrt = fastInverseSqrt(x);
  return (invSqrt == 0.0f) ? 0.0 : 1.0f / invSqrt;
}


x86 assembly (clang, -O0):
<fastSqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <fastInverseSqrt@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    1150 <fastSqrt+0x40>
jp     1150 <fastSqrt+0x40>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1166 <fastSqrt+0x56>
movss  0xea8(%rip),%xmm0
divss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastSqrt>:
push   %rax
call   1030 <fastInverseSqrt@plt>
movaps %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomiss %xmm0,%xmm1
jne    1125 <fastSqrt+0x15>
jp     1125 <fastSqrt+0x15>
pop    %rax
ret
movss  0xed3(%rip),%xmm0
divss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fastSqrt(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @fastInverseSqrt(float %4)
store float %5, float* %3
%6 = load float, float* %3
%7 = fcmp oeq float %6, 0.000000e+00
br i1 %7, label %8, label %9
8: ; preds = %1
br label %13
9: ; preds = %1
%10 = load float, float* %3
%11 = fdiv float 1.000000e+00, %10
%12 = fpext float %11 to double
br label %13
13: ; preds = %9, %8
%14 = phi double [ 0.000000e+00, %8 ], [ %12, %9 ]
%15 = fptrunc double %14 to float
ret float %15
}

LLVM IR (-O2):
define float @fastSqrt(float %0) {
%2 = tail call float @fastInverseSqrt(float %0)
%3 = fcmp oeq float %2, 0.000000e+00
%4 = fdiv float 1.000000e+00, %2
%5 = select i1 %3, float 0.000000e+00, float %4
ret float %5
}
/* Type definitions */
struct bplus_tree {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct bplus_tree *);
void bplus_tree_deinit(struct bplus_tree *tree) { free(tree); }


x86 assembly (clang, -O0):
<bplus_tree_deinit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bplus_tree_deinit>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.bplus_tree = type { i32 }
define void @bplus_tree_deinit(%struct.bplus_tree* %0) {
%2 = alloca %struct.bplus_tree*
store %struct.bplus_tree* %0, %struct.bplus_tree** %2
%3 = load %struct.bplus_tree*, %struct.bplus_tree** %2
%4 = call i32 @free(%struct.bplus_tree* %3)
ret void
}

LLVM IR (-O2):
%struct.bplus_tree = type { i32 }
define void @bplus_tree_deinit(%struct.bplus_tree* nocapture %0) {
%2 = tail call i32 @free(%struct.bplus_tree* %0)
ret void
}
void reverse(char *s, int len) {
  int i = 0, j = len - 1;
  char tmp;
  while (i < j) {
    tmp = s[i];
    s[i] = s[j];
    s[j] = tmp;
    i++;
    j--;
  }
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1170 <reverse+0x70>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x15(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x15(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    111b <reverse+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
cmp    $0x2,%esi
jl     1131 <reverse+0x31>
mov    %esi,%eax
add    $0xfffffffffffffffe,%rax
xor    %ecx,%ecx
nopl   (%rax)
movzbl (%rdi,%rcx,1),%esi
movzbl 0x1(%rdi,%rax,1),%edx
mov    %dl,(%rdi,%rcx,1)
mov    %sil,0x1(%rdi,%rax,1)
add    $0x1,%rcx
lea    -0x1(%rax),%rdx
cmp    %rax,%rcx
mov    %rdx,%rax
jl     1110 <reverse+0x10>
ret

LLVM IR (-O0):
define void @reverse(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 1
store i32 %9, i32* %6
br label %10
10: ; preds = %14, %2
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %38
14: ; preds = %10
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %7
%20 = load i8*, i8** %3
%21 = load i32, i32* %6
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = load i8*, i8** %3
%26 = load i32, i32* %5
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %25, i64 %27
store i8 %24, i8* %28
%29 = load i8, i8* %7
%30 = load i8*, i8** %3
%31 = load i32, i32* %6
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds i8, i8* %30, i64 %32
store i8 %29, i8* %33
%34 = load i32, i32* %5
%35 = add nsw i32 %34, 1
store i32 %35, i32* %5
%36 = load i32, i32* %6
%37 = add nsw i32 %36, -1
store i32 %37, i32* %6
br label %10
38: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @reverse(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %17
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = add nsw i64 %5, -1
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %14, %7 ]
%9 = phi i64 [ %6, %4 ], [ %15, %7 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %8
%11 = load i8, i8* %10
%12 = getelementptr inbounds i8, i8* %0, i64 %9
%13 = load i8, i8* %12
store i8 %13, i8* %10
store i8 %11, i8* %12
%14 = add nuw nsw i64 %8, 1
%15 = add nsw i64 %9, -1
%16 = icmp slt i64 %14, %15
br i1 %16, label %7, label %17
17: ; preds = %7, %2
ret void
}