xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
int /*<<< orphan*/ ft_putstr(char *);
void ft_putchar_info(char c) {
  ft_putstr("\x1B[36m");
  ft_putchar(c);
  ft_putstr("\x1B[0m");
}


x86 assembly (clang, -O0):
<ft_putchar_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xecb(%rip),%rdi
call   1040 <ft_putstr@plt>
movsbl -0x1(%rbp),%edi
call   1030 <ft_putchar@plt>
lea    0xebc(%rip),%rdi
call   1040 <ft_putstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putchar_info>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1040 <ft_putstr@plt>
mov    %ebx,%edi
call   1030 <ft_putchar@plt>
lea    0xec9(%rip),%rdi
pop    %rbx
jmp    1040 <ft_putstr@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[36m\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @ft_putchar_info(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @ft_putstr(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = load i8, i8* %2
%5 = call i32 @ft_putchar(i8 signext %4)
%6 = call i32 @ft_putstr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[36m\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @ft_putchar_info(i8 signext %0) {
%2 = tail call i32 @ft_putstr(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @ft_putchar(i8 signext %0)
%4 = tail call i32 @ft_putstr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned long long rdtscll(void) {
  unsigned long long val;
  asm volatile(

      "rdtsc"
      : "=A"(val));
  return val;
}


x86 assembly (clang, -O0):
<rdtscll>:
push   %rbp
mov    %rsp,%rbp
rdtsc
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdtscll>:
rdtsc
ret

LLVM IR (-O0):
define i64 @rdtscll() {
%1 = alloca i64
%2 = call i64 asm sideeffect "rdtsc", "=A,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @rdtscll() {
%1 = tail call i64 asm sideeffect "rdtsc", "=A,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
void get_messages() {}


x86 assembly (clang, -O0):
<get_messages>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_messages>:
ret

LLVM IR (-O0):
define void @get_messages() {
ret void
}

LLVM IR (-O2):
define void @get_messages() {
ret void
}
int test_imm_E5int16_reg(short val) {
  return ((val) & (-0xE5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E5int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff1b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E5int16_reg>:
test   $0xff1b,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E5int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -229
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E5int16_reg(i16 signext %0) {
%2 = and i16 %0, -229
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void rop3_24_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk1 = S ^ T;
  stk2 = T ^ *D;
  stk1 = stk1 & stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_24_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xa(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_24_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
xor    %dl,%cl
and    %sil,%al
not    %sil
and    %dl,%sil
and    %cl,%sil
or     %al,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_24_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = xor i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = xor i32 %16, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %8
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %8
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %7
%28 = load i8, i8* %7
%29 = zext i8 %28 to i32
%30 = load i8, i8* %5
%31 = zext i8 %30 to i32
%32 = xor i32 %31, -1
%33 = and i32 %29, %32
%34 = load i8*, i8** %4
%35 = load i8, i8* %34
%36 = zext i8 %35 to i32
%37 = load i8, i8* %5
%38 = zext i8 %37 to i32
%39 = and i32 %36, %38
%40 = or i32 %33, %39
%41 = trunc i32 %40 to i8
%42 = load i8*, i8** %4
store i8 %41, i8* %42
ret void
}

LLVM IR (-O2):
define void @rop3_24_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %2
%6 = xor i8 %1, -1
%7 = and i8 %6, %2
%8 = and i8 %7, %5
%9 = and i8 %4, %1
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}
/* Variables and functions */
unsigned char rand();
unsigned int rand_single_bit(unsigned char size) {
  return (1L << (rand() % size));
}


x86 assembly (clang, -O0):
<rand_single_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movzbl %al,%eax
movzbl -0x1(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_single_bit>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
movzbl %al,%eax
div    %bl
movzbl %ah,%ecx
mov    $0x1,%eax
shl    %cl,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rand_single_bit(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call zeroext i8 (...) @rand()
%4 = zext i8 %3 to i32
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = srem i32 %4, %6
%8 = zext i32 %7 to i64
%9 = shl i64 1, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @rand_single_bit(i8 zeroext %0) {
%2 = tail call zeroext i8 (...) @rand()
%3 = urem i8 %2, %0
%4 = zext i8 %3 to i64
%5 = shl nuw i64 1, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Variables and functions */
int getpagesize();
scalar_t__ sbrk(int /*<<< orphan*/);
char *get_high_address(void) { return (char *)sbrk(0) + (4 * getpagesize()); }


x86 assembly (clang, -O0):
<get_high_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <sbrk@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <getpagesize@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
shl    $0x2,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_high_address>:
push   %rbx
xor    %edi,%edi
call   1030 <sbrk@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <getpagesize@plt>
shl    $0x2,%eax
cltq
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @get_high_address() {
%1 = call i64 @sbrk(i32 0)
%2 = inttoptr i64 %1 to i8*
%3 = call i32 (...) @getpagesize()
%4 = mul nsw i32 4, %3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %2, i64 %5
ret i8* %6
}

LLVM IR (-O2):
define i8* @get_high_address() {
%1 = tail call i64 @sbrk(i32 0)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 (...) @getpagesize()
%4 = shl nsw i32 %3, 2
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %2, i64 %5
ret i8* %6
}
void mut_mem_init(void) {}


x86 assembly (clang, -O0):
<mut_mem_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mut_mem_init>:
ret

LLVM IR (-O0):
define void @mut_mem_init() {
ret void
}

LLVM IR (-O2):
define void @mut_mem_init() {
ret void
}
int get_random_bytes(unsigned char *buf, int num) { return 0; }


x86 assembly (clang, -O0):
<get_random_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_random_bytes>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_random_bytes(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @get_random_bytes(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int getADC(int);
double signalVoltage(void) { return ((5. * getADC(1)) / 1023.); }


x86 assembly (clang, -O0):
<signalVoltage>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <getADC@plt>
cvtsi2sd %eax,%xmm1
movsd  0xede(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xeca(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<signalVoltage>:
push   %rax
mov    $0x1,%edi
call   1030 <getADC@plt>
cvtsi2sd %eax,%xmm0
mulsd  0xed9(%rip),%xmm0
divsd  0xed9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @signalVoltage() {
%1 = call i32 @getADC(i32 1)
%2 = sitofp i32 %1 to double
%3 = fmul double 5.000000e+00, %2
%4 = fdiv double %3, 1.023000e+03
ret double %4
}

LLVM IR (-O2):
define double @signalVoltage() {
%1 = tail call i32 @getADC(i32 1)
%2 = sitofp i32 %1 to double
%3 = fmul double %2, 5.000000e+00
%4 = fdiv double %3, 1.023000e+03
ret double %4
}
void RTMemEfTmpAllocZ(void) {}


x86 assembly (clang, -O0):
<RTMemEfTmpAllocZ>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemEfTmpAllocZ>:
ret

LLVM IR (-O0):
define void @RTMemEfTmpAllocZ() {
ret void
}

LLVM IR (-O2):
define void @RTMemEfTmpAllocZ() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void end_snd(int fd) {
  if (fd != 1)
    close(fd);
}


x86 assembly (clang, -O0):
<end_snd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     112d <end_snd+0x1d>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_snd>:
cmp    $0x1,%edi
jne    1116 <end_snd+0x6>
ret
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @end_snd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @end_snd(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @close(i32 %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int mt_genrand_int32();
long mt_genrand_int31(void) { return (long)(mt_genrand_int32() >> 1); }


x86 assembly (clang, -O0):
<mt_genrand_int31>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mt_genrand_int32@plt>
sar    $0x1,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_genrand_int31>:
push   %rax
xor    %eax,%eax
call   1030 <mt_genrand_int32@plt>
sar    %eax
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @mt_genrand_int31() {
%1 = call i32 (...) @mt_genrand_int32()
%2 = ashr i32 %1, 1
%3 = sext i32 %2 to i64
ret i64 %3
}

LLVM IR (-O2):
define i64 @mt_genrand_int31() {
%1 = tail call i32 (...) @mt_genrand_int32()
%2 = ashr i32 %1, 1
%3 = sext i32 %2 to i64
ret i64 %3
}
int am_config_init(void) { return 0; }


x86 assembly (clang, -O0):
<am_config_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<am_config_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @am_config_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @am_config_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mddhead(int osvers, int osrel, int ossub) {
  printf("disk           busy read/s KB/read  "
         "writ/s KB/writ avque avserv _mdd_");
}


x86 assembly (clang, -O0):
<mddhead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mddhead>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [70 x i8] c"disk busy read/s KB/read writ/s KB/writ avque avserv _mdd_\00"
define void @mddhead(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [70 x i8] c"disk busy read/s KB/read writ/s KB/writ avque avserv _mdd_\00"
define void @mddhead(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ int16_t;

/* Variables and functions */
int16_t min_s16(int16_t a, int16_t b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<min_s16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <min_s16+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min_s16+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_s16>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min_s16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min_s16(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int get();
int getnb() {
  int c;
  while ((c = get()) == ' ' || c == '\t')
    ;
  return (c);
}


x86 assembly (clang, -O0):
<getnb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <get@plt>
mov    %eax,%ecx
mov    %ecx,-0x4(%rbp)
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x5(%rbp)
je     113c <getnb+0x2c>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    114c <getnb+0x3c>
jmp    1151 <getnb+0x41>
jmp    1118 <getnb+0x8>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getnb>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <get@plt>
cmp    $0x9,%eax
je     1120 <getnb+0x10>
cmp    $0x20,%eax
je     1120 <getnb+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getnb() {
%1 = alloca i32
br label %2
2: ; preds = %10, %0
%3 = call i32 (...) @get()
store i32 %3, i32* %1
%4 = icmp eq i32 %3, 32
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load i32, i32* %1
%7 = icmp eq i32 %6, 9
br label %8
8: ; preds = %5, %2
%9 = phi i1 [ true, %2 ], [ %7, %5 ]
br i1 %9, label %10, label %11
10: ; preds = %8
br label %2
11: ; preds = %8
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @getnb() {
br label %1
1: ; preds = %3, %0
%2 = tail call i32 (...) @get()
switch i32 %2, label %4 [
i32 32, label %3
i32 9, label %3
]
3: ; preds = %1, %1
br label %1
4: ; preds = %1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ imprimir_info(char *);
void info(int numero_trozos, char *comando_troceado[]) {
  int i;
  for (i = 1; i < numero_trozos; i++) {
    imprimir_info(comando_troceado[i]);
  }
}


x86 assembly (clang, -O0):
<info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1151 <info+0x41>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <imprimir_info@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <info+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<info>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%edi
jl     1142 <info+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14,%rbx,8),%rdi
call   1030 <imprimir_info@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <info+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @info(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @imprimir_info(i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @info(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @imprimir_info(i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;
typedef int /*<<< orphan*/ BIGNUM;

/* Variables and functions */
char *BN_bn2dec(int /*<<< orphan*/ const *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ free(char *);
void BN_print_dec_fp(FILE *fp, const BIGNUM *num) {
  char *buf;
  buf = BN_bn2dec(num);
  if (buf == NULL)
    return;
  fprintf(fp, "%s", buf);
  free(buf);
}


x86 assembly (clang, -O0):
<BN_print_dec_fp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <BN_bn2dec@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115d <BN_print_dec_fp+0x2d>
jmp    117a <BN_print_dec_fp+0x4a>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xe94(%rip),%rsi
call   1050 <fprintf@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_print_dec_fp>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <BN_bn2dec@plt>
test   %rax,%rax
je     1161 <BN_print_dec_fp+0x31>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1050 <fputs@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @BN_print_dec_fp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i8*
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = call i8* @BN_bn2dec(i32* %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %11
10: ; preds = %2
br label %17
11: ; preds = %2
%12 = load i32*, i32** %3
%13 = load i8*, i8** %5
%14 = call i32 @fprintf(i32* %12, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %13)
%15 = load i8*, i8** %5
%16 = call i32 @free(i8* %15)
br label %17
17: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
define void @BN_print_dec_fp(i32* nocapture %0, i32* %1) {
%3 = tail call i8* @BN_bn2dec(i32* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @fputs(i8* %3, i32* %0)
%7 = tail call i32 @free(i8* %3)
br label %8
8: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f();
long main() { f(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <f@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <f@plt>

LLVM IR (-O0):
define i64 @main() {
%1 = alloca i64
%2 = call i32 (...) @f()
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @main() {
%1 = tail call i32 (...) @f()
ret i64 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
struct passwd {
  char *pw_name;
};

/* Variables and functions */
struct passwd *getpwuid(int /*<<< orphan*/);
char *user_name(uid_t id) {
  struct passwd *pw;
  pw = getpwuid(id);
  if (!pw)
    return NULL;
  return pw->pw_name;
}


x86 assembly (clang, -O0):
<user_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <getpwuid@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    113f <user_name+0x2f>
movq   $0x0,-0x8(%rbp)
jmp    114a <user_name+0x3a>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_name>:
push   %rax
call   1030 <getpwuid@plt>
test   %rax,%rax
je     1120 <user_name+0x10>
mov    (%rax),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.passwd = type { i8* }
define i8* @user_name(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca %struct.passwd*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call %struct.passwd* @getpwuid(i32 %5)
store %struct.passwd* %6, %struct.passwd** %4
%7 = load %struct.passwd*, %struct.passwd** %4
%8 = icmp ne %struct.passwd* %7, null
br i1 %8, label %10, label %9
9: ; preds = %1
store i8* null, i8** %2
br label %14
10: ; preds = %1
%11 = load %struct.passwd*, %struct.passwd** %4
%12 = getelementptr inbounds %struct.passwd, %struct.passwd* %11, i32 0, i32 0
%13 = load i8*, i8** %12
store i8* %13, i8** %2
br label %14
14: ; preds = %10, %9
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
%struct.passwd = type { i8* }
define i8* @user_name(i32 %0) {
%2 = tail call %struct.passwd* @getpwuid(i32 %0)
%3 = icmp eq %struct.passwd* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.passwd, %struct.passwd* %2, i64 0, i32 0
%6 = load i8*, i8** %5
br label %7
7: ; preds = %1, %4
%8 = phi i8* [ %6, %4 ], [ null, %1 ]
ret i8* %8
}
void foo4(int *a, int *b) {
  for (; a != b; a++)
    ;
}


x86 assembly (clang, -O0):
<foo4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1130 <foo4+0x30>
jmp    111f <foo4+0x1f>
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
jmp    110c <foo4+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo4>:
ret

LLVM IR (-O0):
define void @foo4(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
br label %5
5: ; preds = %10, %2
%6 = load i32*, i32** %3
%7 = load i32*, i32** %4
%8 = icmp ne i32* %6, %7
br i1 %8, label %9, label %13
9: ; preds = %5
br label %10
10: ; preds = %9
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i32 1
store i32* %12, i32** %3
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @foo4(i32* nocapture %0, i32* nocapture %1) {
ret void
}
/* Variables and functions */
int shftc_l(int *, int *, int *);
int intr_wrap_569(int p1, int p2, int p3) { return shftc_l(&p1, &p2, &p3); }


x86 assembly (clang, -O0):
<intr_wrap_569>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <shftc_l@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_569>:
sub    $0x18,%rsp
mov    %edi,0x14(%rsp)
mov    %esi,0x10(%rsp)
mov    %edx,0xc(%rsp)
lea    0x14(%rsp),%rdi
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1030 <shftc_l@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @intr_wrap_569(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @shftc_l(i32* %4, i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @intr_wrap_569(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @shftc_l(i32* %4, i32* %5, i32* %6)
ret i32 %7
}
_Complex char f22(void) {}


x86 assembly (clang, -O0):
<f22>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%ax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f22>:
ret

LLVM IR (-O0):
define i16 @f22() {
%1 = alloca { i8, i8 }
%2 = bitcast { i8, i8 }* %1 to i16*
%3 = load i16, i16* %2
ret i16 %3
}

LLVM IR (-O2):
define i16 @f22() {
ret i16 undef
}
/* Variables and functions */
int __ESBMC_sign(double);
int signbit(double d) { return __ESBMC_sign(d); }


x86 assembly (clang, -O0):
<signbit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ESBMC_sign@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signbit>:
jmp    1030 <__ESBMC_sign@plt>

LLVM IR (-O0):
define i32 @signbit(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @__ESBMC_sign(double %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @signbit(double %0) {
%2 = tail call i32 @__ESBMC_sign(double %0)
ret i32 %2
}
unsigned xrop3_93_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = T | stk3;
  stk1 = D & stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_93_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_93_0_0>:
not    %dil
or     %sil,%dil
movzbl %dil,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_93_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_93_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = xor i8 %0, -1
%4 = or i8 %3, %1
%5 = zext i8 %4 to i32
%6 = xor i32 %5, -1
ret i32 %6
}
int sunxi_clk_enable_prepare(struct clk *clk) { return 0; }


x86 assembly (clang, -O0):
<sunxi_clk_enable_prepare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sunxi_clk_enable_prepare>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.clk = type opaque
define i32 @sunxi_clk_enable_prepare(%struct.clk* %0) {
%2 = alloca %struct.clk*
store %struct.clk* %0, %struct.clk** %2
ret i32 0
}

LLVM IR (-O2):
%struct.clk = type opaque
define i32 @sunxi_clk_enable_prepare(%struct.clk* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void xgetbv() {
  db(0x0F);
  db(0x01);
  db(0xD0);
}


x86 assembly (clang, -O0):
<xgetbv>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
call   1030 <db@plt>
mov    $0x1,%edi
call   1030 <db@plt>
mov    $0xd0,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xgetbv>:
push   %rax
mov    $0xf,%edi
call   1030 <db@plt>
mov    $0x1,%edi
call   1030 <db@plt>
mov    $0xd0,%edi
pop    %rax
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @xgetbv() {
%1 = call i32 @db(i32 15)
%2 = call i32 @db(i32 1)
%3 = call i32 @db(i32 208)
ret void
}

LLVM IR (-O2):
define void @xgetbv() {
%1 = tail call i32 @db(i32 15)
%2 = tail call i32 @db(i32 1)
%3 = tail call i32 @db(i32 208)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_char;

/* Variables and functions */
int ns_name_uncompress(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *,
                       int /*<<< orphan*/ const *, char *, size_t);
int dn_expand(const u_char *msg, const u_char *eom, const u_char *src,
              char *dst, int dstsiz) {
  int n = ns_name_uncompress(msg, eom, src, dst, (size_t)dstsiz);
  if (n > 0 && dst[0] == '.') {
    dst[0] = '\0';
  }
  return n;
}


x86 assembly (clang, -O0):
<dn_expand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
movslq -0x24(%rbp),%r8
call   1030 <ns_name_uncompress@plt>
mov    %eax,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
jle    1169 <dn_expand+0x59>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
jne    1169 <dn_expand+0x59>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dn_expand>:
push   %rbx
mov    %rcx,%rbx
movslq %r8d,%r8
call   1030 <ns_name_uncompress@plt>
test   %eax,%eax
jle    1128 <dn_expand+0x18>
cmpb   $0x2e,(%rbx)
jne    1128 <dn_expand+0x18>
movb   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dn_expand(i32* %0, i32* %1, i32* %2, i8* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%12 = load i32*, i32** %6
%13 = load i32*, i32** %7
%14 = load i32*, i32** %8
%15 = load i8*, i8** %9
%16 = load i32, i32* %10
%17 = sext i32 %16 to i64
%18 = call i32 @ns_name_uncompress(i32* %12, i32* %13, i32* %14, i8* %15, i64 %17)
store i32 %18, i32* %11
%19 = load i32, i32* %11
%20 = icmp sgt i32 %19, 0
br i1 %20, label %21, label %30
21: ; preds = %5
%22 = load i8*, i8** %9
%23 = getelementptr inbounds i8, i8* %22, i64 0
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 46
br i1 %26, label %27, label %30
27: ; preds = %21
%28 = load i8*, i8** %9
%29 = getelementptr inbounds i8, i8* %28, i64 0
store i8 0, i8* %29
br label %30
30: ; preds = %27, %21, %5
%31 = load i32, i32* %11
ret i32 %31
}

LLVM IR (-O2):
define i32 @dn_expand(i32* %0, i32* %1, i32* %2, i8* %3, i32 %4) {
%6 = sext i32 %4 to i64
%7 = tail call i32 @ns_name_uncompress(i32* %0, i32* %1, i32* %2, i8* %3, i64 %6)
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %5
%10 = load i8, i8* %3
%11 = icmp eq i8 %10, 46
br i1 %11, label %12, label %13
12: ; preds = %9
store i8 0, i8* %3
br label %13
13: ; preds = %12, %9, %5
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ smsc911x_enable_multicast_reception();
void enableMulticastReception(void) { smsc911x_enable_multicast_reception(); }


x86 assembly (clang, -O0):
<enableMulticastReception>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <smsc911x_enable_multicast_reception@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<enableMulticastReception>:
xor    %eax,%eax
jmp    1030 <smsc911x_enable_multicast_reception@plt>

LLVM IR (-O0):
define void @enableMulticastReception() {
%1 = call i32 (...) @smsc911x_enable_multicast_reception()
ret void
}

LLVM IR (-O2):
define void @enableMulticastReception() {
%1 = tail call i32 (...) @smsc911x_enable_multicast_reception()
ret void
}
/* Variables and functions */
scalar_t__ get_suffix(char *);
int /*<<< orphan*/ strcpy(char *, char const *);
char *set_suffix(char *filename, const char *suffix) {
  strcpy((char *)get_suffix(filename), suffix);
  return filename;
}


x86 assembly (clang, -O0):
<set_suffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <get_suffix@plt>
mov    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_suffix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <get_suffix@plt>
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @set_suffix(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i64 @get_suffix(i8* %5)
%7 = inttoptr i64 %6 to i8*
%8 = load i8*, i8** %4
%9 = call i32 @strcpy(i8* %7, i8* %8)
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define i8* @set_suffix(i8* returned %0, i8* %1) {
%3 = tail call i64 @get_suffix(i8* %0)
%4 = inttoptr i64 %3 to i8*
%5 = tail call i32 @strcpy(i8* %4, i8* %1)
ret i8* %0
}
/* Variables and functions */
scalar_t__ TestBit(int);
int /*<<< orphan*/ printf(char *, int, char *);
int main() {
  printf("%d is %s\n", -1, TestBit(-1) ? "Neg" : "Possi");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1040 <TestBit@plt>
mov    %rax,%rcx
lea    0xecb(%rip),%rdx
lea    0xec0(%rip),%rax
cmp    $0x0,%rcx
cmovne %rax,%rdx
lea    0xea7(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%edi
call   1040 <TestBit@plt>
test   %rax,%rax
lea    0xed9(%rip),%rax
lea    0xece(%rip),%rdx
cmove  %rax,%rdx
lea    0xeb9(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%d is %s\0A\00"
@.str.1 = [4 x i8] c"Neg\00"
@.str.2 = [6 x i8] c"Possi\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @TestBit(i32 -1)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%6 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 -1, i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"%d is %s\0A\00"
@.str.1 = [4 x i8] c"Neg\00"
@.str.2 = [6 x i8] c"Possi\00"
define i32 @main() {
%1 = tail call i64 @TestBit(i32 -1)
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 -1, i8* %3)
ret i32 0
}
int main(void) {
  extern void func(void);
  func();
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
call   1030 <func@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <func@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
tail call void @func()
ret i32 1
}
void RGBAToYJRow_Any_NEON() {}


x86 assembly (clang, -O0):
<RGBAToYJRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGBAToYJRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @RGBAToYJRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @RGBAToYJRow_Any_NEON() {
ret void
}
OP(fd, f6) { op_f6(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_f6@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_f6@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_f6()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_f6()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ stdout;
void notimpl(const char *s) {
  fflush(stdout);
  fprintf(stderr, "\nAbnormal Termination  %s\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<notimpl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xea2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<notimpl>:
push   %rbx
mov    %rdi,%rbx
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
lea    0xeae(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stdout = global i32 0
@stderr = global i32 0
@.str = [27 x i8] c"\0AAbnormal Termination %s\0A\00"
define void @notimpl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stdout = global i32 0
@stderr = global i32 0
@.str = [27 x i8] c"\0AAbnormal Termination %s\0A\00"
define void @notimpl(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %0)
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ NOROM_IntRegister(int, void (*)());
void stub1(uint32_t);
void IOCIntRegister(void (*pfnHandler)(void)) {
  NOROM_IntRegister(16, pfnHandler);
  ((void (*)(uint32_t ui32Interrupt))(
      (uint32_t *)(((uint32_t *)0x10000180)[12]))[4])(16);
}


x86 assembly (clang, -O0):
<IOCIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x10,%edi
call   1030 <NOROM_IntRegister@plt>
mov    $0x10000180,%eax
mov    0x60(%rax),%rax
mov    $0x10,%edi
call   *0x20(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IOCIntRegister>:
push   %rax
mov    %rdi,%rsi
mov    $0x10,%edi
call   1030 <NOROM_IntRegister@plt>
mov    0x100001e0,%rax
10
mov    $0x10,%edi
pop    %rcx
jmp    *0x20(%rax)

LLVM IR (-O0):
define void @IOCIntRegister(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @NOROM_IntRegister(i32 16, void (...)* %4)
%6 = load i64, i64* getelementptr inbounds (i64, i64* inttoptr (i64 268435840 to i64*), i64 12)
%7 = inttoptr i64 %6 to i64*
%8 = getelementptr inbounds i64, i64* %7, i64 4
%9 = load i64, i64* %8
%10 = inttoptr i64 %9 to void (i64)*
ret void
}

LLVM IR (-O2):
define void @IOCIntRegister(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @NOROM_IntRegister(i32 16, void (...)* %2)
%4 = load i64, i64* inttoptr (i64 268435936 to i64*)
%5 = inttoptr i64 %4 to i64*
%6 = getelementptr inbounds i64, i64* %5, i64 4
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to void (i64)*
tail call void %8(i64 16)
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
int custom_check_arg_stopper(const char *argument) {
  if (strcmp(argument, "--") == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<custom_check_arg_stopper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1142 <custom_check_arg_stopper+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1149 <custom_check_arg_stopper+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<custom_check_arg_stopper>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"--\00"
define i32 @custom_check_arg_stopper(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [3 x i8] c"--\00"
define i32 @custom_check_arg_stopper(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/, int, char *, int);
int shim_klogctl(int type, char *bufp, int len) {
  return shim_enosys(0, type, bufp, len);
}


x86 assembly (clang, -O0):
<shim_klogctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_klogctl>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_klogctl(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @shim_enosys(i32 0, i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @shim_klogctl(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @shim_enosys(i32 0, i32 %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
int /*<<< orphan*/ gen_pop();
void gen_div(void) {
  gen_pop();
  gen_call("ccdiv");
}


x86 assembly (clang, -O0):
<gen_div>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xece(%rip),%rdi
call   1040 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_div>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <gen_call@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ccdiv\00"
define void @gen_div() {
%1 = call i32 (...) @gen_pop()
%2 = call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ccdiv\00"
define void @gen_div() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int execve(const char *filename, char *const argv[], char *const envp[]) {
  (void)filename;
  (void)argv;
  (void)envp;
  printf(">>> execve(%s,..,..)\n", filename);
  return -1;
}


x86 assembly (clang, -O0):
<execve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execve>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c">>> execve(%s,..,..)\0A\00"
define i32 @execve(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i8**, i8*** %6
%10 = load i8*, i8** %4
%11 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %10)
ret i32 -1
}

LLVM IR (-O2):
@.str = [22 x i8] c">>> execve(%s,..,..)\0A\00"
define i32 @execve(i8* %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 -1
}
int get_flcnt_id(int fl) {
  int s, h;
  h = fl / 10;
  s = fl - h * 10;
  return s * 1000 + h * 100;
}


x86 assembly (clang, -O0):
<get_flcnt_id>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   $0xa,-0xc(%rbp),%ecx
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
imul   $0x3e8,-0x8(%rbp),%eax
imul   $0x64,-0xc(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_flcnt_id>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,1),%edx
lea    (%rdx,%rdx,4),%edx
sub    %edx,%eax
imul   $0x3e8,%eax,%edx
imul   $0x64,%ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_flcnt_id(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 10
store i32 %6, i32* %4
%7 = load i32, i32* %2
%8 = load i32, i32* %4
%9 = mul nsw i32 %8, 10
%10 = sub nsw i32 %7, %9
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = mul nsw i32 %11, 1000
%13 = load i32, i32* %4
%14 = mul nsw i32 %13, 100
%15 = add nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_flcnt_id(i32 %0) {
%2 = sdiv i32 %0, 10
%3 = mul nsw i32 %2, -10
%4 = add i32 %3, %0
%5 = mul nsw i32 %4, 1000
%6 = mul nsw i32 %2, 100
%7 = add nsw i32 %5, %6
ret i32 %7
}
void iowait() { __asm__ volatile("outb %%al, $0x80" : : "a"(0)); }


x86 assembly (clang, -O0):
<iowait>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
out    %al,$0x80
pop    %rbp
ret

x86 assembly (clang, -O2):
<iowait>:
xor    %eax,%eax
out    %al,$0x80
ret

LLVM IR (-O0):
define void @iowait() {
ret void
}

LLVM IR (-O2):
define void @iowait() {
tail call void asm sideeffect "outb %al, $$0x80", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret void
}