xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fig02_05();
int /*<<< orphan*/ fig02_13();
int main(void) {
  fig02_05();
  fig02_13();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <fig02_05@plt>
mov    $0x0,%al
call   1030 <fig02_13@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <fig02_05@plt>
xor    %eax,%eax
call   1030 <fig02_13@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fig02_05()
%3 = call i32 (...) @fig02_13()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fig02_05()
%2 = tail call i32 (...) @fig02_13()
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int cichlid_rotate_right_64(int, int);
uint64_t Sigma1(uint64_t x) {
  return cichlid_rotate_right_64(x, 14) ^ cichlid_rotate_right_64(x, 18) ^
         cichlid_rotate_right_64(x, 41);
}


x86 assembly (clang, -O0):
<Sigma1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xe,%esi
call   1030 <cichlid_rotate_right_64@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x12,%esi
call   1030 <cichlid_rotate_right_64@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x29,%esi
call   1030 <cichlid_rotate_right_64@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sigma1>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
mov    $0xe,%esi
call   1030 <cichlid_rotate_right_64@plt>
mov    %eax,%r14d
mov    %ebx,%edi
mov    $0x12,%esi
call   1030 <cichlid_rotate_right_64@plt>
mov    %eax,%ebp
xor    %r14d,%ebp
mov    %ebx,%edi
mov    $0x29,%esi
call   1030 <cichlid_rotate_right_64@plt>
xor    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Sigma1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cichlid_rotate_right_64(i32 %3, i32 14)
%5 = load i32, i32* %2
%6 = call i32 @cichlid_rotate_right_64(i32 %5, i32 18)
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = call i32 @cichlid_rotate_right_64(i32 %8, i32 41)
%10 = xor i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @Sigma1(i32 %0) {
%2 = tail call i32 @cichlid_rotate_right_64(i32 %0, i32 14)
%3 = tail call i32 @cichlid_rotate_right_64(i32 %0, i32 18)
%4 = xor i32 %3, %2
%5 = tail call i32 @cichlid_rotate_right_64(i32 %0, i32 41)
%6 = xor i32 %4, %5
ret i32 %6
}
int test_imm_C1uint8_mem(unsigned char *val) {
  return ((*val) & (-0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff3f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1uint8_mem>:
testb  $0x3f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -193
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C1uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 63
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ptrace_() { printf("No stack trace available.\n"); }


x86 assembly (clang, -O0):
<ptrace_>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"No stack trace available.\0A\00"
define void @ptrace_() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [26 x i8] c"No stack trace available.\00"
define void @ptrace_() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void EXTI0_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<EXTI0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EXTI0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @EXTI0_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @EXTI0_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
unsigned int power(unsigned int base, unsigned int exponent) {
  if (exponent == 0) {
    return (1);
  }
  if (exponent == 1) {
    return (base);
  }
  unsigned int product = power(base, exponent / 2);
  if ((exponent % 2) == 0) {
    return (product * product);
  }
  return (base * product * product);
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1134 <power+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1186 <power+0x76>
cmpl   $0x1,-0xc(%rbp)
jne    1149 <power+0x39>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1186 <power+0x76>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
shr    $0x1,%esi
call   1030 <power@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1178 <power+0x68>
mov    -0x10(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1186 <power+0x76>
mov    -0x8(%rbp),%eax
imul   -0x10(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
je     1141 <power+0x31>
mov    %esi,%ebp
mov    %edi,%ebx
cmp    $0x1,%esi
je     1146 <power+0x36>
mov    %ebp,%esi
shr    %esi
mov    %ebx,%edi
call   1030 <power@plt>
test   $0x1,%bpl
mov    $0x1,%ecx
cmovne %ebx,%ecx
imul   %eax,%eax
imul   %ecx,%eax
mov    %eax,%ebx
jmp    1146 <power+0x36>
mov    $0x1,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @power(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %33
10: ; preds = %2
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, i32* %4
store i32 %14, i32* %3
br label %33
15: ; preds = %10
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = udiv i32 %17, 2
%19 = call i32 @power(i32 %16, i32 %18)
store i32 %19, i32* %6
%20 = load i32, i32* %5
%21 = urem i32 %20, 2
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %15
%24 = load i32, i32* %6
%25 = load i32, i32* %6
%26 = mul i32 %24, %25
store i32 %26, i32* %3
br label %33
27: ; preds = %15
%28 = load i32, i32* %4
%29 = load i32, i32* %6
%30 = mul i32 %28, %29
%31 = load i32, i32* %6
%32 = mul i32 %30, %31
store i32 %32, i32* %3
br label %33
33: ; preds = %27, %23, %13, %9
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @power(i32 %0, i32 %1) {
switch i32 %1, label %6 [
i32 0, label %4
i32 1, label %3
]
3: ; preds = %2
br label %4
4: ; preds = %3, %2, %6
%5 = phi i32 [ %13, %6 ], [ %0, %3 ], [ 1, %2 ]
ret i32 %5
6: ; preds = %2
%7 = lshr i32 %1, 1
%8 = tail call i32 @power(i32 %0, i32 %7)
%9 = and i32 %1, 1
%10 = icmp eq i32 %9, 0
%11 = select i1 %10, i32 1, i32 %0
%12 = mul i32 %8, %11
%13 = mul i32 %12, %8
br label %4
}
int execute_time() { return 0; }


x86 assembly (clang, -O0):
<execute_time>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_time>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_time() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_time() {
ret i32 0
}
void PWMGenFaultConfigure(unsigned long ulBase, unsigned long ulGen,
                          unsigned long ulMinFaultPeriod,
                          unsigned long ulFaultSenses) {
  ;
  ;
  ;

  ;
  (*((volatile unsigned long *)(((ulBase) + (ulGen)) + 0x0000003C))) =
      ulMinFaultPeriod;
  (*((volatile unsigned long *)(((ulBase) + 0x00000800 +
                                 ((ulGen)-0x00000040) * 2) +
                                0x00000000))) = ulFaultSenses;
}


x86 assembly (clang, -O0):
<PWMGenFaultConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,0x3c(%rax)
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    $0x800,%rax
mov    -0x10(%rbp),%rdx
sub    $0x40,%rdx
shl    $0x1,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenFaultConfigure>:
mov    %rdx,0x3c(%rdi,%rsi,1)
mov    %rcx,0x780(%rdi,%rsi,2)
ret

LLVM IR (-O0):
define void @PWMGenFaultConfigure(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = add i64 %10, %11
%13 = add i64 %12, 60
%14 = inttoptr i64 %13 to i64*
store volatile i64 %9, i64* %14
%15 = load i64, i64* %8
%16 = load i64, i64* %5
%17 = add i64 %16, 2048
%18 = load i64, i64* %6
%19 = sub i64 %18, 64
%20 = mul i64 %19, 2
%21 = add i64 %17, %20
%22 = add i64 %21, 0
%23 = inttoptr i64 %22 to i64*
store volatile i64 %15, i64* %23
ret void
}

LLVM IR (-O2):
define void @PWMGenFaultConfigure(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = add i64 %0, 60
%6 = add i64 %5, %1
%7 = inttoptr i64 %6 to i64*
store volatile i64 %2, i64* %7
%8 = shl i64 %1, 1
%9 = add i64 %0, 1920
%10 = add i64 %9, %8
%11 = inttoptr i64 %10 to i64*
store volatile i64 %3, i64* %11
ret void
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int fstat(int, struct stat *);
int /*<<< orphan*/ mode_native_to_git(int /*<<< orphan*/);
int git_fstat(int fd, struct stat *buf) {
  int rc = fstat(fd, buf);
  if (rc == 0)
    buf->st_mode = mode_native_to_git(buf->st_mode);
  return rc;
}


x86 assembly (clang, -O0):
<git_fstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <fstat@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    115b <git_fstat+0x3b>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <mode_native_to_git@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<git_fstat>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <fstat@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    113a <git_fstat+0x1a>
mov    (%rbx),%edi
call   1030 <mode_native_to_git@plt>
mov    %eax,(%rbx)
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @git_fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
%5 = alloca i32
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
%6 = load i32, i32* %3
%7 = load %struct.stat*, %struct.stat** %4
%8 = call i32 @fstat(i32 %6, %struct.stat* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load %struct.stat*, %struct.stat** %4
%13 = getelementptr inbounds %struct.stat, %struct.stat* %12, i32 0, i32 0
%14 = load i32, i32* %13
%15 = call i32 @mode_native_to_git(i32 %14)
%16 = load %struct.stat*, %struct.stat** %4
%17 = getelementptr inbounds %struct.stat, %struct.stat* %16, i32 0, i32 0
store i32 %15, i32* %17
br label %18
18: ; preds = %11, %2
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @git_fstat(i32 %0, %struct.stat* nocapture %1) {
%3 = tail call i32 @fstat(i32 %0, %struct.stat* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = getelementptr inbounds %struct.stat, %struct.stat* %1, i64 0, i32 0
%7 = load i32, i32* %6
%8 = tail call i32 @mode_native_to_git(i32 %7)
store i32 %8, i32* %6
br label %9
9: ; preds = %5, %2
ret i32 %3
}
unsigned long xdebug_hash_num(unsigned long key) {
  key += ~(key << 15);
  key ^= (key >> 10);
  key += (key << 3);
  key ^= (key >> 6);
  key += (key << 11);
  key ^= (key >> 16);
  return key;
}


x86 assembly (clang, -O0):
<xdebug_hash_num>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0xf,%rax
xor    $0xffffffffffffffff,%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0xa,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x6,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0xb,%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdebug_hash_num>:
mov    %rdi,%rax
shl    $0xf,%rax
not    %rax
add    %rdi,%rax
mov    %rax,%rcx
shr    $0xa,%rcx
xor    %rax,%rcx
lea    (%rcx,%rcx,8),%rax
mov    %rax,%rcx
shr    $0x6,%rcx
xor    %rax,%rcx
mov    %rcx,%rdx
shl    $0xb,%rdx
add    %rcx,%rdx
mov    %rdx,%rax
shr    $0x10,%rax
xor    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @xdebug_hash_num(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 15
%5 = xor i64 %4, -1
%6 = load i64, i64* %2
%7 = add i64 %6, %5
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = lshr i64 %8, 10
%10 = load i64, i64* %2
%11 = xor i64 %10, %9
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = shl i64 %12, 3
%14 = load i64, i64* %2
%15 = add i64 %14, %13
store i64 %15, i64* %2
%16 = load i64, i64* %2
%17 = lshr i64 %16, 6
%18 = load i64, i64* %2
%19 = xor i64 %18, %17
store i64 %19, i64* %2
%20 = load i64, i64* %2
%21 = shl i64 %20, 11
%22 = load i64, i64* %2
%23 = add i64 %22, %21
store i64 %23, i64* %2
%24 = load i64, i64* %2
%25 = lshr i64 %24, 16
%26 = load i64, i64* %2
%27 = xor i64 %26, %25
store i64 %27, i64* %2
%28 = load i64, i64* %2
ret i64 %28
}

LLVM IR (-O2):
define i64 @xdebug_hash_num(i64 %0) {
%2 = shl i64 %0, 15
%3 = xor i64 %2, -1
%4 = add i64 %3, %0
%5 = lshr i64 %4, 10
%6 = xor i64 %5, %4
%7 = mul i64 %6, 9
%8 = lshr i64 %7, 6
%9 = xor i64 %8, %7
%10 = mul i64 %9, 2049
%11 = lshr i64 %10, 16
%12 = xor i64 %11, %10
ret i64 %12
}
int test_imm_F4uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xF4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F4uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F4uint64_highword_mem>:
testb  $0xf4,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F4uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 244
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F4uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1047972020224
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int foo(int i) { return i - 5 < 10; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x5,%eax
cmp    $0xa,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
cmp    $0xf,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 5
%5 = icmp slt i32 %4, 10
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp slt i32 %0, 15
%3 = zext i1 %2 to i32
ret i32 %3
}
void foo(int x, float p) {
  int w;
  return;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca i32
store i32 %0, i32* %3
store float %1, float* %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, float %1) {
ret void
}
/* Type definitions */
struct port_interface {
  int dummy;
};

/* Variables and functions */
int gpio_bl_entry(struct port_interface *, char const *);
int init_bl_entry(struct port_interface *port, const char *seq) {
  if (seq)
    return gpio_bl_entry(port, seq);
  return 1;
}


x86 assembly (clang, -O0):
<init_bl_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1140 <init_bl_entry+0x30>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <gpio_bl_entry@plt>
mov    %eax,-0x4(%rbp)
jmp    1147 <init_bl_entry+0x37>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_bl_entry>:
test   %rsi,%rsi
je     111a <init_bl_entry+0xa>
jmp    1030 <gpio_bl_entry@plt>
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.port_interface = type { i32 }
define i32 @init_bl_entry(%struct.port_interface* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.port_interface*
%5 = alloca i8*
store %struct.port_interface* %0, %struct.port_interface** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load %struct.port_interface*, %struct.port_interface** %4
%10 = load i8*, i8** %5
%11 = call i32 @gpio_bl_entry(%struct.port_interface* %9, i8* %10)
store i32 %11, i32* %3
br label %13
12: ; preds = %2
store i32 1, i32* %3
br label %13
13: ; preds = %12, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
%struct.port_interface = type { i32 }
define i32 @init_bl_entry(%struct.port_interface* %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @gpio_bl_entry(%struct.port_interface* %0, i8* %1)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %5, %4 ], [ 1, %2 ]
ret i32 %7
}
/* Variables and functions */
int rill_row_cmp(void const *, void const *);
int row_cmp(const void *lhs, const void *rhs) { return rill_row_cmp(lhs, rhs); }


x86 assembly (clang, -O0):
<row_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rill_row_cmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<row_cmp>:
jmp    1030 <rill_row_cmp@plt>

LLVM IR (-O0):
define i32 @row_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @rill_row_cmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @row_cmp(i8* %0, i8* %1) {
%3 = tail call i32 @rill_row_cmp(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sendETX(int);
int /*<<< orphan*/ sendSTX(int);
int /*<<< orphan*/ sendchecksum(int);
int /*<<< orphan*/ senddata(int, int);
void reset_pic(int fd) {
  printf("SENDing RESET: ");
  sendSTX(fd);
  sendSTX(fd);
  senddata(fd, 0x00);
  senddata(fd, 0x00);
  sendchecksum(fd);
  sendETX(fd);
  printf("[OK => RESET Device]\n");
}


x86 assembly (clang, -O0):
<reset_pic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xe9e(%rip),%rdi
call   1060 <printf@plt>
mov    -0x4(%rbp),%edi
call   1050 <sendSTX@plt>
mov    -0x4(%rbp),%edi
call   1050 <sendSTX@plt>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <senddata@plt>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <senddata@plt>
mov    -0x4(%rbp),%edi
call   1030 <sendchecksum@plt>
mov    -0x4(%rbp),%edi
call   1070 <sendETX@plt>
lea    0xe6e(%rip),%rdi
call   1060 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_pic>:
push   %rbx
mov    %edi,%ebx
lea    0xe96(%rip),%rdi
call   1070 <printf@plt>
mov    %ebx,%edi
call   1060 <sendSTX@plt>
mov    %ebx,%edi
call   1060 <sendSTX@plt>
mov    %ebx,%edi
xor    %esi,%esi
call   1040 <senddata@plt>
mov    %ebx,%edi
xor    %esi,%esi
call   1040 <senddata@plt>
mov    %ebx,%edi
call   1030 <sendchecksum@plt>
mov    %ebx,%edi
call   1080 <sendETX@plt>
lea    0xe6c(%rip),%rdi
pop    %rbx
jmp    1050 <puts@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"SENDing RESET: \00"
@.str.1 = [22 x i8] c"[OK => RESET Device]\0A\00"
define void @reset_pic(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @sendSTX(i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @sendSTX(i32 %6)
%8 = load i32, i32* %2
%9 = call i32 @senddata(i32 %8, i32 0)
%10 = load i32, i32* %2
%11 = call i32 @senddata(i32 %10, i32 0)
%12 = load i32, i32* %2
%13 = call i32 @sendchecksum(i32 %12)
%14 = load i32, i32* %2
%15 = call i32 @sendETX(i32 %14)
%16 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"SENDing RESET: \00"
@str = [21 x i8] c"[OK => RESET Device]\00"
define void @reset_pic(i32 %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @sendSTX(i32 %0)
%4 = tail call i32 @sendSTX(i32 %0)
%5 = tail call i32 @senddata(i32 %0, i32 0)
%6 = tail call i32 @senddata(i32 %0, i32 0)
%7 = tail call i32 @sendchecksum(i32 %0)
%8 = tail call i32 @sendETX(i32 %0)
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ synchronize_sched_expedited();
__attribute__((always_)) void synchronize_rcu_bh_expedited(void) {
  synchronize_sched_expedited();
}


x86 assembly (clang, -O0):
<synchronize_rcu_bh_expedited>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <synchronize_sched_expedited@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<synchronize_rcu_bh_expedited>:
xor    %eax,%eax
jmp    1030 <synchronize_sched_expedited@plt>

LLVM IR (-O0):
define void @synchronize_rcu_bh_expedited() {
%1 = call i32 (...) @synchronize_sched_expedited()
ret void
}

LLVM IR (-O2):
define void @synchronize_rcu_bh_expedited() {
%1 = tail call i32 (...) @synchronize_sched_expedited()
ret void
}
/* Type definitions */
typedef unsigned int uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t pcg_output_xsh_rs_64_32(uint64_t state) {
  return (uint32_t)(((state >> 22u) ^ state) >> ((state >> 61u) + 22u));
}


x86 assembly (clang, -O0):
<pcg_output_xsh_rs_64_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x16,%eax
xor    -0x4(%rbp),%eax
mov    -0x4(%rbp),%edx
mov    $0x3d,%ecx
shr    %cl,%edx
mov    %edx,%ecx
add    $0x16,%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcg_output_xsh_rs_64_32>:
ret

LLVM IR (-O0):
define i32 @pcg_output_xsh_rs_64_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 22
%5 = load i32, i32* %2
%6 = xor i32 %4, %5
%7 = load i32, i32* %2
%8 = lshr i32 %7, 61
%9 = add i32 %8, 22
%10 = lshr i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @pcg_output_xsh_rs_64_32(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int _strcicmp(char const *, char const *);
int cstring_cmp(const void *a, const void *b) {
  const char *ia = (const char *)a;
  const char *ib = (const char *)b;
  return _strcicmp(ia, ib);
}


x86 assembly (clang, -O0):
<cstring_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <_strcicmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstring_cmp>:
jmp    1030 <_strcicmp@plt>

LLVM IR (-O0):
define i32 @cstring_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @_strcicmp(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @cstring_cmp(i8* %0, i8* %1) {
%3 = tail call i32 @_strcicmp(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
scalar_t__ isupper(char);
char *to_lowercase(char *str) {
  char *p;
  for (p = str; *p; p++)
    if (isupper(*p))
      *p += 'a' - 'A';
  return str;
}


x86 assembly (clang, -O0):
<to_lowercase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1169 <to_lowercase+0x59>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     1153 <to_lowercase+0x43>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
add    $0x20,%ecx
mov    %cl,(%rax)
jmp    1158 <to_lowercase+0x48>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <to_lowercase+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_lowercase>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     114e <to_lowercase+0x3e>
mov    %r14,%rbx
jmp    113c <to_lowercase+0x2c>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     114e <to_lowercase+0x3e>
movsbl %al,%edi
call   1030 <isupper@plt>
test   %rax,%rax
je     1130 <to_lowercase+0x20>
addb   $0x20,(%rbx)
jmp    1130 <to_lowercase+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @to_lowercase(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %21, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @isupper(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = add nsw i32 %17, 32
%19 = trunc i32 %18 to i8
store i8 %19, i8* %15
br label %20
20: ; preds = %14, %9
br label %21
21: ; preds = %20
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
br label %5
24: ; preds = %5
%25 = load i8*, i8** %2
ret i8* %25
}

LLVM IR (-O2):
define i8* @to_lowercase(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %12
%5 = phi i8 [ %14, %12 ], [ %2, %1 ]
%6 = phi i8* [ %13, %12 ], [ %0, %1 ]
%7 = tail call i64 @isupper(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i8, i8* %6
%11 = add i8 %10, 32
store i8 %11, i8* %6
br label %12
12: ; preds = %4, %9
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %12, %1
ret i8* %0
}
/* Variables and functions */
long long _atoi64(char const *);
long long atoll(const char *_c) { return _atoi64(_c); }


x86 assembly (clang, -O0):
<atoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_atoi64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoll>:
jmp    1030 <_atoi64@plt>

LLVM IR (-O0):
define i64 @atoll(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @_atoi64(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @atoll(i8* %0) {
%2 = tail call i64 @_atoi64(i8* %0)
ret i64 %2
}
/* Variables and functions */
double exp(double);
double f(double x) {
  double y;
  y = exp(x);
  return y;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double @exp(double %4)
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = tail call double @exp(double %0)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint16_t;

/* Variables and functions */
scalar_t__ CRC_16(int /*<<< orphan*/ *, int, scalar_t__);
int /*<<< orphan*/ memcpy(scalar_t__ *, int /*<<< orphan*/ *, int);
int check_CRC(uint8_t *buf, int size, uint16_t start_mask) {
  uint16_t calc_crc, actual_crc;
  memcpy(&actual_crc, &buf[size - 2], 2);
  calc_crc = CRC_16(buf, size - 2, start_mask);
  return (calc_crc == actual_crc);
}


x86 assembly (clang, -O0):
<check_CRC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
cltq
shl    $0x2,%rax
add    %rax,%rsi
lea    -0x28(%rbp),%rdi
mov    $0x2,%edx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
sub    $0x2,%esi
mov    -0x18(%rbp),%rdx
call   1030 <CRC_16@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_CRC>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %esi,%ebp
mov    %rdi,%rbx
movslq %esi,%rax
add    $0xfffffffe,%ebp
lea    (%rdi,%rax,4),%rsi
add    $0xfffffffffffffff8,%rsi
lea    0x8(%rsp),%rdi
mov    $0x2,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14,%rdx
call   1030 <CRC_16@plt>
xor    %ecx,%ecx
cmp    0x8(%rsp),%rax
sete   %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @check_CRC(i32* %0, i32 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i32* %0, i32** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%9 = load i32*, i32** %4
%10 = load i32, i32* %5
%11 = sub nsw i32 %10, 2
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %9, i64 %12
%14 = call i32 @memcpy(i64* %8, i32* %13, i32 2)
%15 = load i32*, i32** %4
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 2
%18 = load i64, i64* %6
%19 = call i64 @CRC_16(i32* %15, i32 %17, i64 %18)
store i64 %19, i64* %7
%20 = load i64, i64* %7
%21 = load i64, i64* %8
%22 = icmp eq i64 %20, %21
%23 = zext i1 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @check_CRC(i32* %0, i32 %1, i64 %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
%6 = add nsw i32 %1, -2
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = call i32 @memcpy(i64* %4, i32* %8, i32 2)
%10 = call i64 @CRC_16(i32* %0, i32 %6, i64 %2)
%11 = load i64, i64* %4
%12 = icmp eq i64 %10, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *sd_get_seats();
int main(int argc, char **argv) {
  printf("%s\n", sd_get_seats());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <sd_get_seats@plt>
mov    %rax,%rsi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <sd_get_seats@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i8* (...) @sd_get_seats()
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* (...) @sd_get_seats()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ CLIENT;

/* Variables and functions */
int /*<<< orphan*/ clnt_sperror(int /*<<< orphan*/ *, char const *);
int /*<<< orphan*/ fputs(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void clnt_perror(CLIENT *rpch, const char *msg) {
  (void)fputs(clnt_sperror(rpch, msg), stderr);
}


x86 assembly (clang, -O0):
<clnt_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <clnt_sperror@plt>
mov    %eax,%edi
mov    0x2e9a(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clnt_perror>:
push   %rax
call   1040 <clnt_sperror@plt>
mov    0x2eb3(%rip),%rcx
mov    (%rcx),%esi
mov    %eax,%edi
pop    %rax
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @clnt_perror(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @clnt_sperror(i32* %5, i8* %6)
%8 = load i32, i32* @stderr
%9 = call i32 @fputs(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @clnt_perror(i32* %0, i8* %1) {
%3 = tail call i32 @clnt_sperror(i32* %0, i8* %1)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputs(i32 %3, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  printf("argv = %s\n", argv[0]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    (%rsi),%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"argv = %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 0
%8 = load i8*, i8** %7
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"argv = %s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void output(int array[], int length) {
  int i = 0;
  for (i = 0; i < length; i++)
    printf("%4d", array[i]);
  printf("\n");
}


x86 assembly (clang, -O0):
<output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1160 <output+0x50>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xeb5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <output+0x1d>
lea    0xe9d(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <output+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <output+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%4d\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @output(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%4d\00"
define void @output(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
char *exmaildir(char *);
int strlen(char *);
char *m_maildir(char *folder) {
  char *cp, *ep;
  if ((cp = exmaildir(folder)) && (ep = cp + strlen(cp) - 1) > cp && *ep == '/')
    *ep = '\0';
  return cp;
}


x86 assembly (clang, -O0):
<m_maildir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <exmaildir@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1189 <m_maildir+0x69>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
cmp    -0x10(%rbp),%rax
jbe    1189 <m_maildir+0x69>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
jne    1189 <m_maildir+0x69>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_maildir>:
push   %rbx
call   1040 <exmaildir@plt>
mov    %rax,%rbx
test   %rax,%rax
je     114c <m_maildir+0x2c>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
add    %rbx,%rax
add    $0xffffffffffffffff,%rax
cmp    %rbx,%rax
jbe    114c <m_maildir+0x2c>
cmpb   $0x2f,(%rax)
jne    114c <m_maildir+0x2c>
movb   $0x0,(%rax)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @m_maildir(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @exmaildir(i8* %5)
store i8* %6, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %24
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i8*, i8** %3
%11 = call i32 @strlen(i8* %10)
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = getelementptr inbounds i8, i8* %13, i64 -1
store i8* %14, i8** %4
%15 = load i8*, i8** %3
%16 = icmp ugt i8* %14, %15
br i1 %16, label %17, label %24
17: ; preds = %8
%18 = load i8*, i8** %4
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 47
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = load i8*, i8** %4
store i8 0, i8* %23
br label %24
24: ; preds = %22, %17, %8, %1
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @m_maildir(i8* %0) {
%2 = tail call i8* @exmaildir(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = tail call i32 @strlen(i8* %2)
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %2, i64 %6
%8 = getelementptr inbounds i8, i8* %7, i64 -1
%9 = icmp ugt i8* %8, %2
br i1 %9, label %10, label %14
10: ; preds = %4
%11 = load i8, i8* %8
%12 = icmp eq i8 %11, 47
br i1 %12, label %13, label %14
13: ; preds = %10
store i8 0, i8* %8
br label %14
14: ; preds = %13, %10, %4, %1
ret i8* %2
}
void imu_impl_init(void) {}


x86 assembly (clang, -O0):
<imu_impl_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imu_impl_init>:
ret

LLVM IR (-O0):
define void @imu_impl_init() {
ret void
}

LLVM IR (-O2):
define void @imu_impl_init() {
ret void
}
int kaen_sensors_init(void) { return 0; }


x86 assembly (clang, -O0):
<kaen_sensors_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kaen_sensors_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kaen_sensors_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @kaen_sensors_init() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
off_t _lseek(int a, off_t b, int c) { return b; }


x86 assembly (clang, -O0):
<_lseek>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_lseek>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @_lseek(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
ret i32 %7
}

LLVM IR (-O2):
define i32 @_lseek(i32 %0, i32 returned %1, i32 %2) {
ret i32 %1
}
const char *Int_Definition(void) {
  return "struct Int {\n"
         "  int64_t val;\n"
         "};\n";
}


x86 assembly (clang, -O0):
<Int_Definition>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Int_Definition>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [32 x i8] c"struct Int {\0A int64_t val;\0A};\0A\00"
define i8* @Int_Definition() {
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [32 x i8] c"struct Int {\0A int64_t val;\0A};\0A\00"
define i8* @Int_Definition() {
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0)
}
int do_793() { return 793; }


x86 assembly (clang, -O0):
<do_793>:
push   %rbp
mov    %rsp,%rbp
mov    $0x319,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_793>:
mov    $0x319,%eax
ret

LLVM IR (-O0):
define i32 @do_793() {
ret i32 793
}

LLVM IR (-O2):
define i32 @do_793() {
ret i32 793
}
x(int i) {
  void *j[] = {&&x, &&y, &&z};
  goto *j[i];
x:
  return 2;
y:
  return 3;
z:
  return 5;
}


x86 assembly (clang, -O0):
<x>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    0x2d22(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0x2d1f(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0x2d1c(%rip),%rax
mov    %rax,-0x10(%rbp)
movslq -0x8(%rbp),%rax
mov    -0x20(%rbp,%rax,8),%rax
mov    %rax,-0x28(%rbp)
jmp    115e <x+0x5e>
movl   $0x2,-0x4(%rbp)
jmp    1159 <x+0x59>
movl   $0x3,-0x4(%rbp)
jmp    1159 <x+0x59>
movl   $0x5,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret
mov    -0x28(%rbp),%rax
jmp    *%rax

x86 assembly (clang, -O2):
<x>:
movslq %edi,%rax
lea    0x2d26(%rip),%rcx
jmp    *(%rcx,%rax,8)
mov    $0x2,%eax
ret
mov    $0x5,%eax
ret
mov    $0x3,%eax
ret

LLVM IR (-O0):
@__const.x.j = [3 x i8*] [i8* blockaddress(@x, %10), i8* blockaddress(@x, %11), i8* blockaddress(@x, %12)]
define i32 @x(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [3 x i8*]
store i32 %0, i32* %3
%5 = bitcast [3 x i8*]* %4 to i8*
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [3 x i8*], [3 x i8*]* %4, i64 0, i64 %7
%9 = load i8*, i8** %8
br label %15
10: ; preds = %15
store i32 2, i32* %2
br label %13
11: ; preds = %15
store i32 3, i32* %2
br label %13
12: ; preds = %15
store i32 5, i32* %2
br label %13
13: ; preds = %12, %11, %10
%14 = load i32, i32* %2
ret i32 %14
15: ; preds = %1
%16 = phi i8* [ %9, %1 ]
indirectbr i8* %16, [label %10, label %11, label %12]
}

LLVM IR (-O2):
@__const.x.j = [3 x i8*] [i8* blockaddress(@x, %7), i8* blockaddress(@x, %5), i8* blockaddress(@x, %6)]
define i32 @x(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds [3 x i8*], [3 x i8*]* @__const.x.j, i64 0, i64 %2
%4 = load i8*, i8** %3
indirectbr i8* %4, [label %7, label %5, label %6]
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %5
%8 = phi i32 [ 5, %6 ], [ 3, %5 ], [ 2, %1 ]
ret i32 %8
}
/* Variables and functions */
double strtod(char const *, int /*<<< orphan*/);
double atof(const char *s) { return strtod(s, 0); }


x86 assembly (clang, -O0):
<atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atof>:
xor    %esi,%esi
jmp    1030 <strtod@plt>

LLVM IR (-O0):
define double @atof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @strtod(i8* %3, i32 0)
ret double %4
}

LLVM IR (-O2):
define double @atof(i8* %0) {
%2 = tail call double @strtod(i8* %0, i32 0)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmple_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_cmple_ps(__m128 __a, __m128 __b) {
  return _mm_cmple_ps(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmple_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmple_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmple_ps>:
jmp    1030 <_mm_cmple_ps@plt>

LLVM IR (-O0):
define i32 @test_mm_cmple_ps(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmple_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmple_ps(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmple_ps(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ hexdecodemap();
int /*<<< orphan*/ hexencodemap_char();
int main() {
  hexencodemap_char();
  hexdecodemap();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <hexencodemap_char@plt>
mov    $0x0,%al
call   1030 <hexdecodemap@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <hexencodemap_char@plt>
xor    %eax,%eax
call   1030 <hexdecodemap@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hexencodemap_char()
%3 = call i32 (...) @hexdecodemap()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @hexencodemap_char()
%2 = tail call i32 (...) @hexdecodemap()
ret i32 0
}