xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ write_imm(int);
int /*<<< orphan*/ write_instr(int);
int rshift_handler(char **save) {
  write_instr(0x00);
  write_imm(0xE5);
  write_instr(0x28);
  return 0;
}


x86 assembly (clang, -O0):
<rshift_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0xe5,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rshift_handler>:
push   %rax
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0xe5,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rshift_handler(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @write_instr(i32 0)
%4 = call i32 @write_imm(i32 229)
%5 = call i32 @write_instr(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @rshift_handler(i8** nocapture readnone %0) {
%2 = tail call i32 @write_instr(i32 0)
%3 = tail call i32 @write_imm(i32 229)
%4 = tail call i32 @write_instr(i32 40)
ret i32 0
}
int is_separator(char c, char sep) {
  return (sep == ' ') ? (c == ' ' || c == '\t') : (c == sep);
}


x86 assembly (clang, -O0):
<is_separator>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x20,%eax
jne    114c <is_separator+0x4c>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x3(%rbp)
je     113c <is_separator+0x3c>
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
jmp    1161 <is_separator+0x61>
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_separator>:
cmp    $0x20,%sil
jne    111a <is_separator+0x1a>
cmp    $0x20,%dil
sete   %cl
cmp    $0x9,%dil
sete   %al
or     %cl,%al
movzbl %al,%eax
ret
cmp    %sil,%dil
sete   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_separator(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 32
br i1 %7, label %8, label %19
8: ; preds = %2
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 32
br i1 %11, label %16, label %12
12: ; preds = %8
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 9
br label %16
16: ; preds = %12, %8
%17 = phi i1 [ true, %8 ], [ %15, %12 ]
%18 = zext i1 %17 to i32
br label %26
19: ; preds = %2
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = load i8, i8* %4
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %21, %23
%25 = zext i1 %24 to i32
br label %26
26: ; preds = %19, %16
%27 = phi i32 [ %18, %16 ], [ %25, %19 ]
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_separator(i8 signext %0, i8 signext %1) {
%3 = icmp eq i8 %1, 32
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = icmp eq i8 %0, 32
%6 = icmp eq i8 %0, 9
%7 = or i1 %5, %6
br label %10
8: ; preds = %2
%9 = icmp eq i8 %0, %1
br label %10
10: ; preds = %8, %4
%11 = phi i1 [ %7, %4 ], [ %9, %8 ]
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
size_t hashtable_pot(size_t size) {
  size--;
  size |= size >> 1;
  size |= size >> 2;
  size |= size >> 8;
  size |= size >> 16;
  if (sizeof(size_t) == 8)
    size |= size >> (sizeof(size_t) * 4);
  return size + 1;
}


x86 assembly (clang, -O0):
<hashtable_pot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x20,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashtable_pot>:
lea    -0x1(%rdi),%rax
mov    %rax,%rcx
shr    %rcx
or     %rax,%rcx
mov    %rcx,%rax
shr    $0x2,%rax
or     %rcx,%rax
mov    %rax,%rcx
shr    $0x8,%rcx
or     %rax,%rcx
mov    %rcx,%rdx
shr    $0x10,%rdx
or     %rcx,%rdx
mov    %rdx,%rax
shr    $0x20,%rax
or     %rdx,%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @hashtable_pot(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, -1
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = lshr i64 %5, 1
%7 = load i64, i64* %2
%8 = or i64 %7, %6
store i64 %8, i64* %2
%9 = load i64, i64* %2
%10 = lshr i64 %9, 2
%11 = load i64, i64* %2
%12 = or i64 %11, %10
store i64 %12, i64* %2
%13 = load i64, i64* %2
%14 = lshr i64 %13, 8
%15 = load i64, i64* %2
%16 = or i64 %15, %14
store i64 %16, i64* %2
%17 = load i64, i64* %2
%18 = lshr i64 %17, 16
%19 = load i64, i64* %2
%20 = or i64 %19, %18
store i64 %20, i64* %2
%21 = load i64, i64* %2
%22 = lshr i64 %21, 32
%23 = load i64, i64* %2
%24 = or i64 %23, %22
store i64 %24, i64* %2
%25 = load i64, i64* %2
%26 = add i64 %25, 1
ret i64 %26
}

LLVM IR (-O2):
define i64 @hashtable_pot(i64 %0) {
%2 = add i64 %0, -1
%3 = lshr i64 %2, 1
%4 = or i64 %3, %2
%5 = lshr i64 %4, 2
%6 = or i64 %5, %4
%7 = lshr i64 %6, 8
%8 = or i64 %7, %6
%9 = lshr i64 %8, 16
%10 = or i64 %9, %8
%11 = lshr i64 %10, 32
%12 = or i64 %11, %10
%13 = add i64 %12, 1
ret i64 %13
}
void sstriping_cancel_req(void *vrt_req) {}


x86 assembly (clang, -O0):
<sstriping_cancel_req>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sstriping_cancel_req>:
ret

LLVM IR (-O0):
define void @sstriping_cancel_req(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @sstriping_cancel_req(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
scalar_t__ ctime(int /*<<< orphan*/ *);
int /*<<< orphan*/ strncpy(char *, scalar_t__, int);
int /*<<< orphan*/ time(int /*<<< orphan*/);
extern void time_vms(char timebuf[]) {
  time_t t;
  t = time(0);
  strncpy(timebuf, ctime(&t) + 11, 8);
}


x86 assembly (clang, -O0):
<time_vms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <ctime@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rsi
add    $0xb,%rsi
mov    $0x8,%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_vms>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1040 <ctime@plt>
lea    0xb(%rax),%rsi
mov    %rbx,%rdi
mov    $0x8,%edx
call   1030 <strncpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @time_vms(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 @time(i32 0)
store i32 %4, i32* %3
%5 = load i8*, i8** %2
%6 = call i64 @ctime(i32* %3)
%7 = add nsw i64 %6, 11
%8 = call i32 @strncpy(i8* %5, i64 %7, i32 8)
ret void
}

LLVM IR (-O2):
define void @time_vms(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = tail call i32 @time(i32 0)
store i32 %4, i32* %2
%5 = call i64 @ctime(i32* %2)
%6 = add nsw i64 %5, 11
%7 = call i32 @strncpy(i8* %0, i64 %6, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ swap(int *, int *);
int main() {
  int a = 10, b = 20;
  printf("Before swapping: a = %d and b = %d\n", a, b);
  swap(&a, &b);
  printf("After swapping: a = %d and b = %d\n", a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x14,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <swap@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0xa,0x4(%rsp)
movl   $0x14,(%rsp)
lea    0xec9(%rip),%rdi
mov    $0xa,%esi
mov    $0x14,%edx
call   1030 <printf@plt>
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <swap@plt>
mov    0x4(%rsp),%esi
mov    (%rsp),%edx
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Before swapping: a = %d and b = %d\0A\00"
@.str.1 = [35 x i8] c"After swapping: a = %d and b = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 20, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = call i32 @swap(i32* %2, i32* %3)
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [36 x i8] c"Before swapping: a = %d and b = %d\0A\00"
@.str.1 = [35 x i8] c"After swapping: a = %d and b = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 10, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 20, i32* %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 10, i32 20)
%6 = call i32 @swap(i32* %1, i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32 %8)
ret i32 0
}
/* Variables and functions */
int sunlink_impl(char const *, int const);
int sunlink(const char *path, const int options) {
  int ret = sunlink_impl(path, options);
  return ret;
}


x86 assembly (clang, -O0):
<sunlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sunlink_impl@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sunlink>:
jmp    1030 <sunlink_impl@plt>

LLVM IR (-O0):
define i32 @sunlink(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @sunlink_impl(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @sunlink(i8* %0, i32 %1) {
%3 = tail call i32 @sunlink_impl(i8* %0, i32 %1)
ret i32 %3
}
void CFGMR3QueryS64(void) {}


x86 assembly (clang, -O0):
<CFGMR3QueryS64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3QueryS64>:
ret

LLVM IR (-O0):
define void @CFGMR3QueryS64() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3QueryS64() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t rankbv_bits(size_t n) {
  uint32_t b = 0;
  while (n) {
    b++;
    n >>= 1;
  }
  return b;
}


x86 assembly (clang, -O0):
<rankbv_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <rankbv_bits+0x38>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <rankbv_bits+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rankbv_bits>:
xor    %eax,%eax
test   %rdi,%rdi
je     1120 <rankbv_bits+0x20>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
add    $0x1,%rax
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <rankbv_bits+0x10>
ret

LLVM IR (-O0):
define i64 @rankbv_bits(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 1
store i64 %9, i64* %3
%10 = load i64, i64* %2
%11 = lshr i64 %10, 1
store i64 %11, i64* %2
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @rankbv_bits(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %6, %3 ], [ 0, %1 ]
%5 = phi i64 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i64 %4, 1
%7 = lshr i64 %5, 1
%8 = icmp ult i64 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i64 [ 0, %1 ], [ %6, %3 ]
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ nc_term();
void ui_term() { nc_term(); }


x86 assembly (clang, -O0):
<ui_term>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nc_term@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_term>:
xor    %eax,%eax
jmp    1030 <nc_term@plt>

LLVM IR (-O0):
define void @ui_term() {
%1 = call i32 (...) @nc_term()
ret void
}

LLVM IR (-O2):
define void @ui_term() {
%1 = tail call i32 (...) @nc_term()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
unsigned long strftime(char *, unsigned long, char *, struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
unsigned long log_fd_write_time(char *buf, unsigned long free_bytes) {
  time_t t = time(NULL);
  struct tm *tmp = localtime(&t);
  return strftime(buf, free_bytes, "%F %T", tmp);
}


x86 assembly (clang, -O0):
<log_fd_write_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rcx
lea    0xe94(%rip),%rdx
call   1050 <strftime@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_fd_write_time>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
lea    0xeaa(%rip),%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rcx
call   1050 <strftime@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [6 x i8] c"%F %T\00"
define i64 @log_fd_write_time(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
%6 = alloca %struct.tm*
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = call i32 @time(i32* null)
store i32 %7, i32* %5
%8 = call %struct.tm* @localtime(i32* %5)
store %struct.tm* %8, %struct.tm** %6
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = load %struct.tm*, %struct.tm** %6
%12 = call i64 @strftime(i8* %9, i64 %10, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), %struct.tm* %11)
ret i64 %12
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [6 x i8] c"%F %T\00"
define i64 @log_fd_write_time(i8* %0, i64 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @time(i32* null)
store i32 %5, i32* %3
%6 = call %struct.tm* @localtime(i32* %3)
%7 = call i64 @strftime(i8* %0, i64 %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), %struct.tm* %6)
ret i64 %7
}
/* Type definitions */
struct aFILE {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _get_actual_fp(struct aFILE *);
int fputs(char const *, int /*<<< orphan*/);
int my_fputs(const char *s, struct aFILE *fp) {
  return fputs(s, _get_actual_fp(fp));
}


x86 assembly (clang, -O0):
<my_fputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <_get_actual_fp@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1030 <fputs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_fputs>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1040 <_get_actual_fp@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <fputs@plt>

LLVM IR (-O0):
%struct.aFILE = type { i32 }
define i32 @my_fputs(i8* %0, %struct.aFILE* %1) {
%3 = alloca i8*
%4 = alloca %struct.aFILE*
store i8* %0, i8** %3
store %struct.aFILE* %1, %struct.aFILE** %4
%5 = load i8*, i8** %3
%6 = load %struct.aFILE*, %struct.aFILE** %4
%7 = call i32 @_get_actual_fp(%struct.aFILE* %6)
%8 = call i32 @fputs(i8* %5, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.aFILE = type { i32 }
define i32 @my_fputs(i8* %0, %struct.aFILE* %1) {
%3 = tail call i32 @_get_actual_fp(%struct.aFILE* %1)
%4 = tail call i32 @fputs(i8* %0, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ chk_clr_request_npc_contract();
int /*<<< orphan*/ chk_set_request_npc_contract();
void chk_request_npc_contract(void) {
  chk_clr_request_npc_contract();
  chk_set_request_npc_contract();
}


x86 assembly (clang, -O0):
<chk_request_npc_contract>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <chk_clr_request_npc_contract@plt>
mov    $0x0,%al
call   1030 <chk_set_request_npc_contract@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chk_request_npc_contract>:
push   %rax
xor    %eax,%eax
call   1040 <chk_clr_request_npc_contract@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <chk_set_request_npc_contract@plt>

LLVM IR (-O0):
define void @chk_request_npc_contract() {
%1 = call i32 (...) @chk_clr_request_npc_contract()
%2 = call i32 (...) @chk_set_request_npc_contract()
ret void
}

LLVM IR (-O2):
define void @chk_request_npc_contract() {
%1 = tail call i32 (...) @chk_clr_request_npc_contract()
%2 = tail call i32 (...) @chk_set_request_npc_contract()
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int64_t;

/* Variables and functions */
uint32_t bitCount_fun_int64_t(int64_t x) {
  uint32_t r = x & 1;
  for (x = x >> 1 & 0x7fffffffffffffffll; x; x >>= 1)
    r += x & 1;
  return r;
}


x86 assembly (clang, -O0):
<bitCount_fun_int64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
cltq
movabs $0x7fffffffffffffff,%rcx
ff ff 7f
and    %rcx,%rax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114c <bitCount_fun_int64_t+0x4c>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1128 <bitCount_fun_int64_t+0x28>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitCount_fun_int64_t>:
mov    %edi,%eax
and    $0x1,%eax
cmp    $0x2,%edi
jb     1120 <bitCount_fun_int64_t+0x20>
mov    %edi,%ecx
nopl   0x0(%rax)
sar    %ecx
mov    %ecx,%edx
and    $0x1,%edx
add    %edx,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <bitCount_fun_int64_t+0x10>
ret

LLVM IR (-O0):
define i32 @bitCount_fun_int64_t(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 1
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = ashr i32 %6, 1
%8 = sext i32 %7 to i64
%9 = and i64 %8, 9223372036854775807
%10 = trunc i64 %9 to i32
store i32 %10, i32* %2
br label %11
11: ; preds = %19, %1
%12 = load i32, i32* %2
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %11
%15 = load i32, i32* %2
%16 = and i32 %15, 1
%17 = load i32, i32* %3
%18 = add nsw i32 %17, %16
store i32 %18, i32* %3
br label %19
19: ; preds = %14
%20 = load i32, i32* %2
%21 = ashr i32 %20, 1
store i32 %21, i32* %2
br label %11
22: ; preds = %11
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @bitCount_fun_int64_t(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp ult i32 %0, 2
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ %0, %1 ]
%6 = phi i32 [ %9, %4 ], [ %2, %1 ]
%7 = ashr i32 %5, 1
%8 = and i32 %7, 1
%9 = add nuw nsw i32 %8, %6
%10 = icmp ult i32 %5, 4
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ %2, %1 ], [ %9, %4 ]
ret i32 %12
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
float stdlib_strided_smeanwd(int, float *, int);
int main() {
  float x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
  int64_t N = 4;
  int64_t stride = 2;
  float v = stdlib_strided_smeanwd(N, x, stride);
  printf("mean: %f\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec8(%rip),%rax
mov    %rax,-0x8(%rbp)
movl   $0x4,-0x24(%rbp)
movl   $0x2,-0x28(%rbp)
mov    -0x24(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%edx
call   1040 <stdlib_strided_smeanwd@plt>
movss  %xmm0,-0x2c(%rbp)
movss  -0x2c(%rbp),%xmm0
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x4,%edi
mov    $0x2,%edx
call   1040 <stdlib_strided_smeanwd@plt>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [10 x i8] c"mean: %f\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
%5 = bitcast [8 x float]* %1 to i8*
store i32 4, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call float @stdlib_strided_smeanwd(i32 %6, float* %7, i32 %8)
store float %9, float* %4
%10 = load float, float* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), float %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [10 x i8] c"mean: %f\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = bitcast [8 x float]* %1 to i8*
%3 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%4 = call float @stdlib_strided_smeanwd(i32 4, float* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), float %4)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _TimerBaseValid(int);
void TimerRTCEnable(uint32_t ui32Base) {
  ASSERT(_TimerBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<TimerRTCEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_TimerBaseValid@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%ecx
or     $0x10,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerRTCEnable>:
push   %rbx
mov    %edi,%ebx
call   1040 <_TimerBaseValid@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
movslq %ebx,%rax
orl    $0x10,0xc(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @TimerRTCEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_TimerBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 12
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = or i32 %10, 16
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @TimerRTCEnable(i32 %0) {
%2 = tail call i32 @_TimerBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 12
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 16
store volatile i32 %8, i32* %6
ret void
}
void fatalsig(n) int n;
{ fatal("Fatal signal"); }


x86 assembly (clang, -O0):
<fatalsig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <fatal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatalsig>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Fatal signal\00"
define void @fatalsig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Fatal signal\00"
define void @fatalsig(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint64_t;

/* Variables and functions */
scalar_t__ unaligned_read_le32(int /*<<< orphan*/ const *);
uint64_t unaligned_read_le64(const void *_u) {
  const uint8_t *u = _u;
  return (((uint64_t)unaligned_read_le32(u + 4)) << 32) |
         ((uint64_t)unaligned_read_le32(u));
}


x86 assembly (clang, -O0):
<unaligned_read_le64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x10,%rdi
call   1030 <unaligned_read_le32@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <unaligned_read_le32@plt>
mov    %rax,%rcx
mov    -0x14(%rbp),%eax
or     %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaligned_read_le64>:
push   %rbx
mov    %rdi,%rbx
add    $0x10,%rdi
call   1030 <unaligned_read_le32@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <unaligned_read_le32@plt>

LLVM IR (-O0):
define i32 @unaligned_read_le64(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 4
%8 = call i64 @unaligned_read_le32(i32* %7)
%9 = trunc i64 %8 to i32
%10 = shl i32 %9, 32
%11 = load i32*, i32** %3
%12 = call i64 @unaligned_read_le32(i32* %11)
%13 = trunc i64 %12 to i32
%14 = or i32 %10, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @unaligned_read_le64(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = getelementptr inbounds i8, i8* %0, i64 16
%4 = bitcast i8* %3 to i32*
%5 = tail call i64 @unaligned_read_le32(i32* %4)
%6 = tail call i64 @unaligned_read_le32(i32* %2)
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR94_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR94_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR94_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR94_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR94_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
long partition(long *v, long length) { return 0; }


x86 assembly (clang, -O0):
<partition>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<partition>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @partition(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @partition(i64* nocapture readnone %0, i64 %1) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ version_is_valid(char const *);
void assert_version_valid(const char *version) {
  assert(version != NULL);
  assert(version_is_valid(version));
}


x86 assembly (clang, -O0):
<assert_version_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <version_is_valid@plt>
mov    %eax,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_version_valid>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1030 <version_is_valid@plt>
mov    %eax,%edi
pop    %rbx
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @assert_version_valid(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load i8*, i8** %2
%8 = call i32 @version_is_valid(i8* %7)
%9 = call i32 @assert(i32 %8)
ret void
}

LLVM IR (-O2):
define void @assert_version_valid(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @version_is_valid(i8* %0)
%6 = tail call i32 @assert(i32 %5)
ret void
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_10(uint64_t x) {
  __asm__("rolq $10, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_10>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0xa,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_10>:
mov    %rdi,%rax
rol    $0xa,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_10(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$10, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_10(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$10, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
float tf_bf(signed char x, float c) { return c / 3; }


x86 assembly (clang, -O0):
<tf_bf>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xee4(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tf_bf>:
divss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @tf_bf(i8 signext %0, float %1) {
%3 = alloca i8
%4 = alloca float
store i8 %0, i8* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = fdiv float %5, 3.000000e+00
ret float %6
}

LLVM IR (-O2):
define float @tf_bf(i8 signext %0, float %1) {
%3 = fdiv float %1, 3.000000e+00
ret float %3
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_25(uint64_t x) {
  __asm__("rolq $25, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_25>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x19,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_25>:
mov    %rdi,%rax
rol    $0x19,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_25(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$25, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_25(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$25, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
void thread_local_destructor(void *arg) {
  unsigned *count;
  if (arg == NULL)
    return;
  count = arg;
  (*count)++;
}


x86 assembly (clang, -O0):
<thread_local_destructor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1118 <thread_local_destructor+0x18>
jmp    112b <thread_local_destructor+0x2b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_local_destructor>:
test   %rdi,%rdi
je     1108 <thread_local_destructor+0x8>
addl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @thread_local_destructor(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
br label %13
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %3
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = add i32 %11, 1
store i32 %12, i32* %10
br label %13
13: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
define void @thread_local_destructor(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
%6 = add i32 %5, 1
store i32 %6, i32* %4
br label %7
7: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OpenFile313(char const *);
void openfile(const char *s) { OpenFile313(s); }


x86 assembly (clang, -O0):
<openfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <OpenFile313@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openfile>:
jmp    1030 <OpenFile313@plt>

LLVM IR (-O0):
define void @openfile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @OpenFile313(i8* %3)
ret void
}

LLVM IR (-O2):
define void @openfile(i8* %0) {
%2 = tail call i32 @OpenFile313(i8* %0)
ret void
}
int isinff(float x) {
  union {
    long s32;
    float f32;
  } u;
  long v;
  u.f32 = x;
  v = (u.s32 & 0x7fffffff) ^ 0x7f800000;
  return ~((v | -v) >> 31) & (u.s32 >> 30);
}


x86 assembly (clang, -O0):
<isinff>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7fffffff,%rax
xor    $0x7f800000,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x18(%rbp),%rcx
or     %rcx,%rax
sar    $0x1f,%rax
xor    $0xffffffffffffffff,%rax
mov    -0x10(%rbp),%rcx
sar    $0x1e,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isinff>:
movd   %xmm0,%eax
mov    %eax,%ecx
and    $0x7fffffff,%ecx
movabs $0x7fffffff807fffff,%rdx
ff ff 7f
xor    %rcx,%rdx
add    $0x1,%rdx
shr    $0x1f,%rdx
not    %edx
shr    $0x1e,%rax
and    %edx,%eax
ret

LLVM IR (-O0):
%union.anon = type { i64 }
define i32 @isinff(float %0) {
%2 = alloca float
%3 = alloca %union.anon
%4 = alloca i64
store float %0, float* %2
%5 = load float, float* %2
%6 = bitcast %union.anon* %3 to float*
store float %5, float* %6
%7 = bitcast %union.anon* %3 to i64*
%8 = load i64, i64* %7
%9 = and i64 %8, 2147483647
%10 = xor i64 %9, 2139095040
store i64 %10, i64* %4
%11 = load i64, i64* %4
%12 = load i64, i64* %4
%13 = sub nsw i64 0, %12
%14 = or i64 %11, %13
%15 = ashr i64 %14, 31
%16 = xor i64 %15, -1
%17 = bitcast %union.anon* %3 to i64*
%18 = load i64, i64* %17
%19 = ashr i64 %18, 30
%20 = and i64 %16, %19
%21 = trunc i64 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @isinff(float %0) {
%2 = bitcast float %0 to i32
%3 = zext i32 %2 to i64
%4 = and i64 %3, 2147483647
%5 = xor i64 %4, 9223372034715680767
%6 = add nuw i64 %5, 1
%7 = lshr i64 %6, 31
%8 = xor i64 %7, -1
%9 = lshr i64 %3, 30
%10 = and i64 %9, %8
%11 = trunc i64 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void fatal(const char *msg) { printf("  ERR: %s\n", msg); }


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatal>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c" ERR: %s\0A\00"
define void @fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c" ERR: %s\0A\00"
define void @fatal(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
long long uzus() { return 0x7fff00007fffffffLL; }


x86 assembly (clang, -O0):
<uzus>:
push   %rbp
mov    %rsp,%rbp
movabs $0x7fff00007fffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uzus>:
movabs $0x7fff00007fffffff,%rax
ret

LLVM IR (-O0):
define i64 @uzus() {
ret i64 9223090564025548799
}

LLVM IR (-O2):
define i64 @uzus() {
ret i64 9223090564025548799
}
/* Variables and functions */
int /*<<< orphan*/ func4();
void func1(int x) {
  int y = x + 4;
  func4();
}


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <func4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
xor    %eax,%eax
jmp    1030 <func4@plt>

LLVM IR (-O0):
define void @func1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 4
store i32 %5, i32* %3
%6 = call i32 (...) @func4()
ret void
}

LLVM IR (-O2):
define void @func1(i32 %0) {
%2 = tail call i32 (...) @func4()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ core12_swap(char *, int);
void U_EMRCREATEMONOBRUSH_swap(char *record, int torev) {
  core12_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_EMRCREATEMONOBRUSH_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core12_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRCREATEMONOBRUSH_swap>:
jmp    1030 <core12_swap@plt>

LLVM IR (-O0):
define void @U_EMRCREATEMONOBRUSH_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core12_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_EMRCREATEMONOBRUSH_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core12_swap(i8* %0, i32 %1)
ret void
}
int *cvt_alloc_chpos(len)
int len;
{
  int i;
  int *chpos = (int *)ecalloc(sizeof(int), len);
  for (i = 0; i < len; i++)
    chpos[i] = -1;
  return (chpos);
}


x86 assembly (clang, -O0):
<cvt_alloc_chpos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x4,%edi
mov    $0x0,%al
call   1030 <ecalloc@plt>
cltq
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1160 <cvt_alloc_chpos+0x50>
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
movl   $0xffffffff,(%rax,%rcx,4)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1137 <cvt_alloc_chpos+0x27>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvt_alloc_chpos>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x4,%edi
mov    %ebp,%esi
xor    %eax,%eax
call   1030 <ecalloc@plt>
movslq %eax,%rbx
test   %ebp,%ebp
jle    114d <cvt_alloc_chpos+0x2d>
mov    %ebp,%edx
shl    $0x2,%rdx
mov    %rbx,%rdi
mov    $0xff,%esi
call   1040 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32* @cvt_alloc_chpos(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 (i64, i32, ...) bitcast (i32 (...)* @ecalloc to i32 (i64, i32, ...)*)(i64 4, i32 %5)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store i32* %8, i32** %4
store i32 0, i32* %3
br label %9
9: ; preds = %18, %1
%10 = load i32, i32* %3
%11 = load i32, i32* %2
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i32*, i32** %4
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
store i32 -1, i32* %17
br label %18
18: ; preds = %13
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %9
21: ; preds = %9
%22 = load i32*, i32** %4
ret i32* %22
}

LLVM IR (-O2):
define i32* @cvt_alloc_chpos(i32 %0) {
%2 = tail call i32 (i64, i32, ...) bitcast (i32 (...)* @ecalloc to i32 (i64, i32, ...)*)(i64 4, i32 %0)
%3 = sext i32 %2 to i64
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = inttoptr i64 %3 to i8*
%7 = zext i32 %0 to i64
%8 = shl nuw nsw i64 %7, 2
br label %9
9: ; preds = %5, %1
%10 = inttoptr i64 %3 to i32*
ret i32* %10
}
int is_wdvarassign(s) const char *s;
{
  char *p = skip_wdvarname(s, 1);
  return p != s && p[0] == 1 && p[1] == '=';
}


x86 assembly (clang, -O0):
<is_wdvarassign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <skip_wdvarname@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
cmp    -0x8(%rbp),%rcx
mov    %al,-0x11(%rbp)
je     116b <is_wdvarassign+0x5b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
mov    %al,-0x11(%rbp)
jne    116b <is_wdvarassign+0x5b>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x3d,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_wdvarassign>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
mov    $0x1,%esi
xor    %eax,%eax
call   1030 <skip_wdvarname@plt>
cltq
cmp    %rbx,%rax
je     113a <is_wdvarassign+0x2a>
cmpb   $0x1,(%rax)
jne    113a <is_wdvarassign+0x2a>
xor    %ebp,%ebp
cmpb   $0x3d,0x1(%rax)
sete   %bpl
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_wdvarassign(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @skip_wdvarname to i32 (i8*, i32, ...)*)(i8* %4, i32 1)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = icmp ne i8* %8, %9
br i1 %10, label %11, label %23
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 1
br i1 %16, label %17, label %23
17: ; preds = %11
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 1
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 61
br label %23
23: ; preds = %17, %11, %1
%24 = phi i1 [ false, %11 ], [ false, %1 ], [ %22, %17 ]
%25 = zext i1 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_wdvarassign(i8* %0) {
%2 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @skip_wdvarname to i32 (i8*, i32, ...)*)(i8* %0, i32 1)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i8*
%5 = icmp eq i8* %4, %0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %4
%8 = icmp eq i8 %7, 1
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 61
%13 = zext i1 %12 to i32
br label %14
14: ; preds = %9, %6, %1
%15 = phi i32 [ 0, %6 ], [ 0, %1 ], [ %13, %9 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xd0() {
  Assert_real((isspace(208) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              1045, ("isspace should be 0 for 0xd0"));
}


x86 assembly (clang, -O0):
<t_isspace_0xd0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd0,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x415,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xd0>:
push   %rax
mov    $0xd0,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x415,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xd0\00"
define void @t_isspace_0xd0() {
%1 = call i64 @isspace(i32 208)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1045, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xd0\00"
define void @t_isspace_0xd0() {
%1 = tail call i64 @isspace(i32 208)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1045, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
char const *pubnub_uagent(void) {
  return "POSIX"
         "-PubNub-C-core/"
         "3.1.0";
}


x86 assembly (clang, -O0):
<pubnub_uagent>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pubnub_uagent>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [26 x i8] c"POSIX-PubNub-C-core/3.1.0\00"
define i8* @pubnub_uagent() {
ret i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [26 x i8] c"POSIX-PubNub-C-core/3.1.0\00"
define i8* @pubnub_uagent() {
ret i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ intrev(scalar_t__);
int isPalindrome(uint32_t i) { return (i == intrev(i)); }


x86 assembly (clang, -O0):
<isPalindrome>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <intrev@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPalindrome>:
push   %rbx
mov    %rdi,%rbx
call   1030 <intrev@plt>
xor    %ecx,%ecx
cmp    %rbx,%rax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isPalindrome(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @intrev(i64 %4)
%6 = icmp eq i64 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @isPalindrome(i64 %0) {
%2 = tail call i64 @intrev(i64 %0)
%3 = icmp eq i64 %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}