xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int wchar_t;

/* Variables and functions */
wchar_t test2(void) { return L'\\'; }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
mov    $0x5c,%eax
ret

LLVM IR (-O0):
define i32 @test2() {
ret i32 92
}

LLVM IR (-O2):
define i32 @test2() {
ret i32 92
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ perror(char const *);
void exit_on_error(const char *s) {
  perror(s);
  abort();
}


x86 assembly (clang, -O0):
<exit_on_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<exit_on_error>:
push   %rax
call   1040 <perror@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @exit_on_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @exit_on_error(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ floor(double);
int pmod(int /*<<< orphan*/, double);
int HourFromTime(double t) {
  return pmod(floor(t / ((60.0 * 60.0) * 1000.0)), 24.0);
}


x86 assembly (clang, -O0):
<HourFromTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <floor@plt>
mov    %eax,%edi
movsd  0xeb3(%rip),%xmm0
call   1040 <pmod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HourFromTime>:
push   %rax
divsd  0xed7(%rip),%xmm0
call   1030 <floor@plt>
movsd  0xed2(%rip),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1040 <pmod@plt>

LLVM IR (-O0):
define i32 @HourFromTime(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 3.600000e+06
%5 = call i32 @floor(double %4)
%6 = call i32 @pmod(i32 %5, double 2.400000e+01)
ret i32 %6
}

LLVM IR (-O2):
define i32 @HourFromTime(double %0) {
%2 = fdiv double %0, 3.600000e+06
%3 = tail call i32 @floor(double %2)
%4 = tail call i32 @pmod(i32 %3, double 2.400000e+01)
ret i32 %4
}
float FloatSLimit(float input, float limit) {
  if (input < -limit)
    return -limit;
  else if (input > limit)
    return limit;
  else
    return input;
}


x86 assembly (clang, -O0):
<FloatSLimit>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
ucomiss %xmm1,%xmm0
jbe    114a <FloatSLimit+0x4a>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1172 <FloatSLimit+0x72>
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1168 <FloatSLimit+0x68>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1172 <FloatSLimit+0x72>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FloatSLimit>:
movaps 0xef9(%rip),%xmm2
xorps  %xmm1,%xmm2
minss  %xmm0,%xmm1
cmpltss %xmm2,%xmm0
movaps %xmm0,%xmm3
andnps %xmm1,%xmm3
andps  %xmm2,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @FloatSLimit(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fneg float %7
%9 = fcmp olt float %6, %8
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load float, float* %5
%12 = fneg float %11
store float %12, float* %3
br label %21
13: ; preds = %2
%14 = load float, float* %4
%15 = load float, float* %5
%16 = fcmp ogt float %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load float, float* %5
store float %18, float* %3
br label %21
19: ; preds = %13
%20 = load float, float* %4
store float %20, float* %3
br label %21
21: ; preds = %19, %17, %10
%22 = load float, float* %3
ret float %22
}

LLVM IR (-O2):
define float @FloatSLimit(float %0, float %1) {
%3 = fneg float %1
%4 = fcmp ogt float %3, %0
%5 = fcmp ogt float %0, %1
%6 = select i1 %5, float %1, float %0
%7 = select i1 %4, float %3, float %6
ret float %7
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool h265hvcc_get_tier(const uint8_t *p) { return p[1] & 0x40; }


x86 assembly (clang, -O0):
<h265hvcc_get_tier>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
and    $0x40,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265hvcc_get_tier>:
mov    0x4(%rdi),%eax
and    $0x40,%eax
ret

LLVM IR (-O0):
define i32 @h265hvcc_get_tier(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
%6 = and i32 %5, 64
ret i32 %6
}

LLVM IR (-O2):
define i32 @h265hvcc_get_tier(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = and i32 %3, 64
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ indent_blank();
int /*<<< orphan*/ indent_increment_level(int);
int /*<<< orphan*/ indent_newline();
int /*<<< orphan*/ indent_putchar(char);
int /*<<< orphan*/ indent_valid_state();
void vrml_begin_list(void) {
  assert(indent_valid_state());
  indent_blank();
  indent_putchar('[');
  indent_increment_level(1);
  indent_newline();
}


x86 assembly (clang, -O0):
<vrml_begin_list>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <indent_valid_state@plt>
mov    %eax,%edi
call   1050 <assert@plt>
mov    $0x0,%al
call   1060 <indent_blank@plt>
mov    $0x5b,%edi
call   1070 <indent_putchar@plt>
mov    $0x1,%edi
call   1080 <indent_increment_level@plt>
mov    $0x0,%al
call   1040 <indent_newline@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrml_begin_list>:
push   %rax
xor    %eax,%eax
call   1030 <indent_valid_state@plt>
mov    %eax,%edi
call   1050 <assert@plt>
xor    %eax,%eax
call   1060 <indent_blank@plt>
mov    $0x5b,%edi
call   1070 <indent_putchar@plt>
mov    $0x1,%edi
call   1080 <indent_increment_level@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <indent_newline@plt>

LLVM IR (-O0):
define void @vrml_begin_list() {
%1 = call i32 (...) @indent_valid_state()
%2 = call i32 @assert(i32 %1)
%3 = call i32 (...) @indent_blank()
%4 = call i32 @indent_putchar(i8 signext 91)
%5 = call i32 @indent_increment_level(i32 1)
%6 = call i32 (...) @indent_newline()
ret void
}

LLVM IR (-O2):
define void @vrml_begin_list() {
%1 = tail call i32 (...) @indent_valid_state()
%2 = tail call i32 @assert(i32 %1)
%3 = tail call i32 (...) @indent_blank()
%4 = tail call i32 @indent_putchar(i8 signext 91)
%5 = tail call i32 @indent_increment_level(i32 1)
%6 = tail call i32 (...) @indent_newline()
ret void
}
int test_imm_9Bint16_reg(short val) {
  return ((val) & (0x9B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Bint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x9b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Bint16_reg>:
test   $0x9b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Bint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 155
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Bint16_reg(i16 signext %0) {
%2 = and i16 %0, 155
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct ecqv_gen_t {
  int dummy;
};

/* Variables and functions */
int ecqv_key_generation(struct ecqv_gen_t *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int ecqv_generate_keypair(struct ecqv_gen_t *ecqv_gen) {
  if (ecqv_key_generation(ecqv_gen) == -1) {
    fprintf(stderr, "Generating key pair failed.\n");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ecqv_generate_keypair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <ecqv_key_generation@plt>
cmp    $0xffffffff,%eax
jne    115f <ecqv_generate_keypair+0x3f>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xeb2(%rip),%rsi
call   1030 <fprintf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1166 <ecqv_generate_keypair+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecqv_generate_keypair>:
push   %rax
call   1040 <ecqv_key_generation@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xffffffff,%ecx
je     1131 <ecqv_generate_keypair+0x11>
pop    %rcx
ret
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
lea    0xebf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.ecqv_gen_t = type { i32 }
@stderr = global i32 0
@.str = [29 x i8] c"Generating key pair failed.\0A\00"
define i32 @ecqv_generate_keypair(%struct.ecqv_gen_t* %0) {
%2 = alloca i32
%3 = alloca %struct.ecqv_gen_t*
store %struct.ecqv_gen_t* %0, %struct.ecqv_gen_t** %3
%4 = load %struct.ecqv_gen_t*, %struct.ecqv_gen_t** %3
%5 = call i32 @ecqv_key_generation(%struct.ecqv_gen_t* %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.ecqv_gen_t = type { i32 }
@stderr = global i32 0
@.str = [29 x i8] c"Generating key pair failed.\0A\00"
define i32 @ecqv_generate_keypair(%struct.ecqv_gen_t* %0) {
%2 = tail call i32 @ecqv_key_generation(%struct.ecqv_gen_t* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %8
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ pthread_mutex_t;
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ make_timespec(struct timespec *, int);
int /*<<< orphan*/ pthread_cond_timedwait(int /*<<< orphan*/ *,
                                          int /*<<< orphan*/ *,
                                          struct timespec *);
void t_pthread_cond_wait(pthread_cond_t *cond, pthread_mutex_t *mutex) {
  struct timespec ts;
  make_timespec(&ts, 50);
  pthread_cond_timedwait(cond, mutex, &ts);
}


x86 assembly (clang, -O0):
<t_pthread_cond_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
mov    $0x32,%esi
call   1030 <make_timespec@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <pthread_cond_timedwait@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_pthread_cond_wait>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0x8(%rsp),%r15
mov    %r15,%rdi
mov    $0x32,%esi
call   1030 <make_timespec@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <pthread_cond_timedwait@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @t_pthread_cond_wait(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca %struct.timespec
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = call i32 @make_timespec(%struct.timespec* %5, i32 50)
%7 = load i32*, i32** %3
%8 = load i32*, i32** %4
%9 = call i32 @pthread_cond_timedwait(i32* %7, i32* %8, %struct.timespec* %5)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @t_pthread_cond_wait(i32* %0, i32* %1) {
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %3 to i8*
%5 = call i32 @make_timespec(%struct.timespec* %3, i32 50)
%6 = call i32 @pthread_cond_timedwait(i32* %0, i32* %1, %struct.timespec* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ strcpy(char *, char *);
int smashable(char *s) {
  char val[10];
  strcpy(val, s);
  printf("Loaded\n");
}


x86 assembly (clang, -O0):
<smashable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x1a(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smashable>:
sub    $0x18,%rsp
mov    %rdi,%rsi
lea    0xe(%rsp),%rdi
call   1030 <strcpy@plt>
lea    0xec8(%rip),%rdi
call   1040 <puts@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Loaded\0A\00"
define i32 @smashable(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [10 x i8]
store i8* %0, i8** %3
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %4, i64 0, i64 0
%6 = load i8*, i8** %3
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@str = [7 x i8] c"Loaded\00"
define i32 @smashable(i8* %0) {
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* %0)
%5 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void rcc_reset(void) {}


x86 assembly (clang, -O0):
<rcc_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcc_reset>:
ret

LLVM IR (-O0):
define void @rcc_reset() {
ret void
}

LLVM IR (-O2):
define void @rcc_reset() {
ret void
}
void add_history(p) char *p;
{}


x86 assembly (clang, -O0):
<add_history>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_history>:
ret

LLVM IR (-O0):
define void @add_history(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @add_history(i8* nocapture %0) {
ret void
}
int do_signbit_kf(__float128 a) { return __builtin_signbit(a); }


x86 assembly (clang, -O0):
<do_signbit_kf>:
push   %rbp
mov    %rsp,%rbp
movaps %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x3f,%rax
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_signbit_kf>:
movaps %xmm0,-0x18(%rsp)
mov    -0x10(%rsp),%rax
shr    $0x3f,%rax
ret

LLVM IR (-O0):
define i32 @do_signbit_kf(fp128 %0) {
%2 = alloca fp128
store fp128 %0, fp128* %2
%3 = load fp128, fp128* %2
%4 = bitcast fp128 %3 to i128
%5 = icmp slt i128 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @do_signbit_kf(fp128 %0) {
%2 = bitcast fp128 %0 to i128
%3 = lshr i128 %2, 127
%4 = trunc i128 %3 to i32
ret i32 %4
}
void E(void) {}


x86 assembly (clang, -O0):
<E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<E>:
ret

LLVM IR (-O0):
define void @E() {
ret void
}

LLVM IR (-O2):
define void @E() {
ret void
}
/* Type definitions */
typedef void group;

/* Variables and functions */
int /*<<< orphan*/ __softboundmpx_store_return_metadata(void *, char *);
void *getgrnam(char const *);
__attribute__((__weak__, __always___)) struct group *
softboundmpx_getgrnam(const char *name) {
  void *ret_ptr = getgrnam(name);
  __softboundmpx_store_return_metadata(ret_ptr, (char *)ret_ptr + 1024 * 1024);
  return ret_ptr;
}


x86 assembly (clang, -O0):
<softboundmpx_getgrnam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getgrnam@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0x100000,%rsi
call   1040 <__softboundmpx_store_return_metadata@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_getgrnam>:
push   %rbx
call   1030 <getgrnam@plt>
mov    %rax,%rbx
lea    0x100000(%rax),%rsi
mov    %rax,%rdi
call   1040 <__softboundmpx_store_return_metadata@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.group = type opaque
define weak %struct.group* @softboundmpx_getgrnam(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @getgrnam(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 1048576
%9 = call i32 @__softboundmpx_store_return_metadata(i8* %6, i8* %8)
%10 = load i8*, i8** %3
%11 = bitcast i8* %10 to %struct.group*
ret %struct.group* %11
}

LLVM IR (-O2):
%struct.group = type opaque
define weak %struct.group* @softboundmpx_getgrnam(i8* %0) {
%2 = tail call i8* @getgrnam(i8* %0)
%3 = getelementptr inbounds i8, i8* %2, i64 1048576
%4 = tail call i32 @__softboundmpx_store_return_metadata(i8* %2, i8* %3)
%5 = bitcast i8* %2 to %struct.group*
ret %struct.group* %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void test_assert_fail(void) { assert(0); }


x86 assembly (clang, -O0):
<test_assert_fail>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_assert_fail>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @test_assert_fail() {
%1 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @test_assert_fail() {
%1 = tail call i32 @assert(i32 0)
ret void
}
/* Type definitions */
typedef unsigned char uint16_t;

/* Variables and functions */
uint16_t get_uint16(unsigned char *buf) { return (buf[0] | (buf[1] << 8)); }


x86 assembly (clang, -O0):
<get_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_uint16>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @get_uint16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = trunc i32 %12 to i8
ret i8 %13
}

LLVM IR (-O2):
define zeroext i8 @get_uint16(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRF4_set(void) { return U_WMRCORENONE_set("U_WMRF4"); }


x86 assembly (clang, -O0):
<U_WMRF4_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRF4_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRF4\00"
define i8* @U_WMRF4_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRF4\00"
define i8* @U_WMRF4_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
struct route {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct route *);
void route_free(struct route *r) { free(r); }


x86 assembly (clang, -O0):
<route_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<route_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.route = type { i32 }
define void @route_free(%struct.route* %0) {
%2 = alloca %struct.route*
store %struct.route* %0, %struct.route** %2
%3 = load %struct.route*, %struct.route** %2
%4 = call i32 @free(%struct.route* %3)
ret void
}

LLVM IR (-O2):
%struct.route = type { i32 }
define void @route_free(%struct.route* nocapture %0) {
%2 = tail call i32 @free(%struct.route* %0)
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
extern int TakeInt64(int64_t x) {
  if (x == 0xFFFFFFFFFF)
    return 9;
  return 0;
}


x86 assembly (clang, -O0):
<TakeInt64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movslq -0x8(%rbp),%rax
movabs $0xffffffffff,%rcx
cmp    %rcx,%rax
jne    112a <TakeInt64+0x2a>
movl   $0x9,-0x4(%rbp)
jmp    1131 <TakeInt64+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TakeInt64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @TakeInt64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = icmp eq i64 %5, 1099511627775
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 9, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @TakeInt64(i32 %0) {
ret i32 0
}
int myisalnum(int c) {
  return (((c >= '0') && (c <= '9')) || ((c >= 'A') && (c <= 'Z')) ||
          ((c >= 'a') && (c <= 'z')) || (c >= 0x80) || (c < 0));
}


x86 assembly (clang, -O0):
<myisalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1120 <myisalnum+0x20>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116e <myisalnum+0x6e>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <myisalnum+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116e <myisalnum+0x6e>
cmpl   $0x61,-0x4(%rbp)
jl     1152 <myisalnum+0x52>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116e <myisalnum+0x6e>
mov    $0x1,%al
cmpl   $0x80,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jge    116e <myisalnum+0x6e>
cmpl   $0x0,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myisalnum>:
lea    -0x30(%rdi),%ecx
mov    $0x1,%eax
cmp    $0xa,%ecx
jb     112e <myisalnum+0x2e>
lea    -0x41(%rdi),%ecx
cmp    $0x1a,%ecx
jb     112e <myisalnum+0x2e>
lea    -0x61(%rdi),%ecx
mov    %edi,%eax
shr    $0x1f,%eax
cmp    $0x1a,%ecx
mov    $0x1,%ecx
cmovb  %ecx,%eax
cmp    $0x7f,%edi
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @myisalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %26, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %26, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 97
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 122
br i1 %19, label %26, label %20
20: ; preds = %17, %14
%21 = load i32, i32* %2
%22 = icmp sge i32 %21, 128
br i1 %22, label %26, label %23
23: ; preds = %20
%24 = load i32, i32* %2
%25 = icmp slt i32 %24, 0
br label %26
26: ; preds = %23, %20, %17, %11, %5
%27 = phi i1 [ true, %20 ], [ true, %17 ], [ true, %11 ], [ true, %5 ], [ %25, %23 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @myisalnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = add i32 %0, -65
%5 = icmp ult i32 %4, 26
%6 = or i1 %3, %5
br i1 %6, label %14, label %7
7: ; preds = %1
%8 = add i32 %0, -97
%9 = icmp ult i32 %8, 26
%10 = icmp sgt i32 %0, 127
%11 = or i1 %10, %9
%12 = lshr i32 %0, 31
%13 = select i1 %11, i32 1, i32 %12
br label %14
14: ; preds = %7, %1
%15 = phi i32 [ 1, %1 ], [ %13, %7 ]
ret i32 %15
}
/* Variables and functions */
int getResult(int, long double, long double);
int main() { return getResult(1, 3.0L, 5.0L); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %rsp,%rax
flds   0xed8(%rip)
fstpt  0x10(%rax)
flds   0xed3(%rip)
fstpt  (%rax)
mov    $0x1,%edi
call   1030 <getResult@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
flds   0xee6(%rip)
fstpt  0x10(%rsp)
flds   0xee0(%rip)
fstpt  (%rsp)
mov    $0x1,%edi
call   1030 <getResult@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @getResult(i32 1, x86_fp80 0xK4000C000000000000000, x86_fp80 0xK4001A000000000000000)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @getResult(i32 1, x86_fp80 0xK4000C000000000000000, x86_fp80 0xK4001A000000000000000)
ret i32 %1
}
/* Variables and functions */
int execvp(char *, char **);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(int argc, char *argv[]) {
  execvp("python3", argv);
  int error = execvp("python", argv);
  fprintf(stderr,
          "Error: Could not run python, is you PATH configured properly?\n");
  return error;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1040 <execvp@plt>
mov    -0x10(%rbp),%rsi
lea    0xeb7(%rip),%rdi
call   1040 <execvp@plt>
mov    %eax,-0x14(%rbp)
mov    0x2e80(%rip),%rax
mov    (%rax),%edi
lea    0xea6(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <execvp@plt>
lea    0xed1(%rip),%rdi
mov    %rbx,%rsi
call   1040 <execvp@plt>
mov    %eax,%ebx
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
lea    0xebe(%rip),%rsi
call   1030 <fprintf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"python3\00"
@.str.1 = [7 x i8] c"python\00"
@stderr = global i32 0
@.str.2 = [63 x i8] c"Error: Could not run python, is you PATH configured properly?\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = call i32 @execvp(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %7)
%9 = load i8**, i8*** %5
%10 = call i32 @execvp(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8** %9)
store i32 %10, i32* %6
%11 = load i32, i32* @stderr
%12 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str.2, i64 0, i64 0))
%13 = load i32, i32* %6
ret i32 %13
}

LLVM IR (-O2):
@.str = [8 x i8] c"python3\00"
@.str.1 = [7 x i8] c"python\00"
@stderr = global i32 0
@.str.2 = [63 x i8] c"Error: Could not run python, is you PATH configured properly?\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @execvp(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %1)
%4 = tail call i32 @execvp(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8** %1)
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str.2, i64 0, i64 0))
ret i32 %4
}
int foo() {
  static int table[] = {20, 69, 4, 12};
  static int idx;
  return table[idx++];
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f3a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f2f(%rip)
movslq %eax,%rcx
lea    0x2f11(%rip),%rax
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movslq 0x2f1d(%rip),%rax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f14(%rip)
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
@foo.table = internal global [4 x i32] [i32 20, i32 69, i32 4, i32 12]
@foo.idx = internal global i32 0
define i32 @foo() {
%1 = load i32, i32* @foo.idx
%2 = add nsw i32 %1, 1
store i32 %2, i32* @foo.idx
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds [4 x i32], [4 x i32]* @foo.table, i64 0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
@foo.table = internal unnamed_addr constant [4 x i32] [i32 20, i32 69, i32 4, i32 12]
@foo.idx = internal unnamed_addr global i32 0
define i32 @foo() {
%1 = load i32, i32* @foo.idx
%2 = add nsw i32 %1, 1
store i32 %2, i32* @foo.idx
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds [4 x i32], [4 x i32]* @foo.table, i64 0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
int divideBy255(int d) { return (d + 128 + (d >> 8)) >> 8; }


x86 assembly (clang, -O0):
<divideBy255>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
add    %ecx,%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divideBy255>:
mov    %edi,%eax
sar    $0x8,%eax
add    %edi,%eax
add    $0x80,%eax
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @divideBy255(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 128
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = add nsw i32 %4, %6
%8 = ashr i32 %7, 8
ret i32 %8
}

LLVM IR (-O2):
define i32 @divideBy255(i32 %0) {
%2 = add nsw i32 %0, 128
%3 = ashr i32 %0, 8
%4 = add nsw i32 %2, %3
%5 = ashr i32 %4, 8
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(unsigned char const);
void uart_write(const unsigned char *buffer, size_t size) {
  for (size_t i = 0; i < size; i++)
    uart_putc(buffer[i]);
}


x86 assembly (clang, -O0):
<uart_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1158 <uart_write+0x48>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movzbl (%rax,%rcx,1),%edi
call   1030 <uart_putc@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <uart_write+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_write>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1143 <uart_write+0x33>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%r14,%rbx,1),%edi
call   1030 <uart_putc@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <uart_write+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @uart_write(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = call i32 @uart_putc(i8 zeroext %14)
br label %16
16: ; preds = %10
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @uart_write(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %10, %5 ], [ 0, %2 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = tail call i32 @uart_putc(i8 zeroext %8)
%10 = add nuw i64 %6, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %4, label %5
}
void mul_z_poly(int src[]) {
  int i;
  for (i = (109 * 2) - 1; i > 0; i--)
    src[i] = src[i - 1];
  src[0] = 0;
}


x86 assembly (clang, -O0):
<mul_z_poly>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0xd9,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1142 <mul_z_poly+0x42>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <mul_z_poly+0xf>
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul_z_poly>:
push   %rbx
mov    %rdi,%rbx
add    $0x4,%rdi
mov    $0x364,%edx
mov    %rbx,%rsi
call   1030 <memmove@plt>
movl   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @mul_z_poly(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 217, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
%13 = load i32, i32* %12
%14 = load i32*, i32** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
store i32 %13, i32* %17
br label %18
18: ; preds = %7
%19 = load i32, i32* %3
%20 = add nsw i32 %19, -1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32*, i32** %2
%23 = getelementptr inbounds i32, i32* %22, i64 0
store i32 0, i32* %23
ret void
}

LLVM IR (-O2):
define void @mul_z_poly(i32* nocapture %0) {
%2 = bitcast i32* %0 to i8*
%3 = getelementptr i32, i32* %0, i64 1
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %0
ret void
}
void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna) {}


x86 assembly (clang, -O0):
<b43_nphy_set_rxantenna>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<b43_nphy_set_rxantenna>:
ret

LLVM IR (-O0):
%struct.b43_wldev = type opaque
define void @b43_nphy_set_rxantenna(%struct.b43_wldev* %0, i32 %1) {
%3 = alloca %struct.b43_wldev*
%4 = alloca i32
store %struct.b43_wldev* %0, %struct.b43_wldev** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.b43_wldev = type opaque
define void @b43_nphy_set_rxantenna(%struct.b43_wldev* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int fsync(int);
int shim_fsync(int fd) { return fsync(fd); }


x86 assembly (clang, -O0):
<shim_fsync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fsync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_fsync>:
jmp    1030 <fsync@plt>

LLVM IR (-O0):
define i32 @shim_fsync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fsync(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @shim_fsync(i32 %0) {
%2 = tail call i32 @fsync(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Lcd4_Cmd(int);
Lcd4_Clear() {
  Lcd4_Cmd(0);
  Lcd4_Cmd(1);
}


x86 assembly (clang, -O0):
<Lcd4_Clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <Lcd4_Cmd@plt>
mov    $0x1,%edi
call   1030 <Lcd4_Cmd@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lcd4_Clear>:
push   %rax
xor    %edi,%edi
call   1030 <Lcd4_Cmd@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <Lcd4_Cmd@plt>

LLVM IR (-O0):
define i32 @Lcd4_Clear() {
%1 = alloca i32
%2 = call i32 @Lcd4_Cmd(i32 0)
%3 = call i32 @Lcd4_Cmd(i32 1)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @Lcd4_Clear() {
%1 = tail call i32 @Lcd4_Cmd(i32 0)
%2 = tail call i32 @Lcd4_Cmd(i32 1)
ret i32 undef
}
signed char f9(signed char a, signed char b) {
  unsigned short c;
  return __builtin_mul_overflow(a, b, &c);
}


x86 assembly (clang, -O0):
<f9>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edx
movsbl -0x2(%rbp),%eax
imul   %eax,%edx
xor    %eax,%eax
mov    %dx,%cx
shr    $0x10,%edx
and    $0x1,%edx
or     %dl,%al
mov    %cx,-0x4(%rbp)
and    $0x1,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f9>:
mov    %edi,%eax
imul   %esi,%eax
shr    $0x10,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define signext i8 @f9(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i16
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %3
%7 = load i8, i8* %4
%8 = sext i8 %6 to i17
%9 = sext i8 %7 to i17
%10 = call { i17, i1 } @llvm.smul.with.overflow.i17(i17 %8, i17 %9)
%11 = extractvalue { i17, i1 } %10, 1
%12 = extractvalue { i17, i1 } %10, 0
%13 = trunc i17 %12 to i16
%14 = zext i16 %13 to i17
%15 = icmp ne i17 %12, %14
%16 = or i1 %11, %15
store i16 %13, i16* %5
%17 = zext i1 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @f9(i8 signext %0, i8 signext %1) {
%3 = sext i8 %0 to i17
%4 = sext i8 %1 to i17
%5 = mul nsw i17 %4, %3
%6 = lshr i17 %5, 16
%7 = trunc i17 %6 to i8
ret i8 %7
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\nThe World is a vampire.");
  printf("\nY Luisin llega tarde porque no sabe aparcar :D\n\n");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"\0AThe World is a vampire.\00"
@.str.1 = [50 x i8] c"\0AY Luisin llega tarde porque no sabe aparcar :D\0A\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}

LLVM IR (-O2):
@.str = [25 x i8] c"\0AThe World is a vampire.\00"
@EXIT_SUCCESS = global i32 0
@str = [49 x i8] c"\0AY Luisin llega tarde porque no sabe aparcar :D\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
void executeOnThreadPool(struct pumaThreadPool *tp,
                         void (*workFunction)(void *arg), void *arg) {
#pragma omp parallel num_threads(tp->numThreads)
  { workFunction(arg); }
}


x86 assembly (clang, -O0):
<executeOnThreadPool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rdi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<executeOnThreadPool>:
mov    %rdx,%rdi
jmp    *%rsi

LLVM IR (-O0):
%struct.pumaThreadPool = type opaque
define void @executeOnThreadPool(%struct.pumaThreadPool* %0, void (i8*)* %1, i8* %2) {
%4 = alloca %struct.pumaThreadPool*
%5 = alloca void (i8*)*
%6 = alloca i8*
store %struct.pumaThreadPool* %0, %struct.pumaThreadPool** %4
store void (i8*)* %1, void (i8*)** %5
store i8* %2, i8** %6
%7 = load void (i8*)*, void (i8*)** %5
%8 = load i8*, i8** %6
ret void
}

LLVM IR (-O2):
%struct.pumaThreadPool = type opaque
define void @executeOnThreadPool(%struct.pumaThreadPool* nocapture readnone %0, void (i8*)* nocapture %1, i8* %2) {
tail call void %1(i8* %2)
ret void
}
/* Variables and functions */
int getcns(int);
int cmd_gps_status(int argc, char **argv) { return getcns(0x0F03); }


x86 assembly (clang, -O0):
<cmd_gps_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xf03,%edi
call   1030 <getcns@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_gps_status>:
mov    $0xf03,%edi
jmp    1030 <getcns@plt>

LLVM IR (-O0):
define i32 @cmd_gps_status(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @getcns(i32 3843)
ret i32 %5
}

LLVM IR (-O2):
define i32 @cmd_gps_status(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @getcns(i32 3843)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
void errw(char *program, char *filespc) {
  fprintf(stderr, "%s: %s write error\n", program, filespc);
  exit(-1);
}


x86 assembly (clang, -O0):
<errw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xeb8(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<errw>:
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"%s: %s write error\0A\00"
define void @errw(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
%9 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"%s: %s write error\0A\00"
define void @errw(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%5 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
unsigned short permute(unsigned short, int *, int, int);
unsigned short pEight(unsigned short key) {
  unsigned short postPEight;
  int pEightBox[8] = {6, 3, 7, 4, 8, 5, 10, 9};
  postPEight = permute(key, pEightBox, 10, 8);
  return postPEight;
}


x86 assembly (clang, -O0):
<pEight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed1(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x2(%rbp),%ax
lea    -0x30(%rbp),%rsi
mov    $0xa,%edx
mov    $0x8,%ecx
movzwl %ax,%edi
call   1030 <permute@plt>
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pEight>:
sub    $0x28,%rsp
movaps 0xef5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0xa,%edx
mov    $0x8,%ecx
call   1030 <permute@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.pEight.pEightBox = [8 x i32] [i32 6, i32 3, i32 7, i32 4, i32 8, i32 5, i32 10, i32 9]
define zeroext i16 @pEight(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
%4 = alloca [8 x i32]
store i16 %0, i16* %2
%5 = bitcast [8 x i32]* %4 to i8*
%6 = load i16, i16* %2
%7 = getelementptr inbounds [8 x i32], [8 x i32]* %4, i64 0, i64 0
%8 = call zeroext i16 @permute(i16 zeroext %6, i32* %7, i32 10, i32 8)
store i16 %8, i16* %3
%9 = load i16, i16* %3
ret i16 %9
}

LLVM IR (-O2):
@__const.pEight.pEightBox = [8 x i32] [i32 6, i32 3, i32 7, i32 4, i32 8, i32 5, i32 10, i32 9]
define zeroext i16 @pEight(i16 zeroext %0) {
%2 = alloca [8 x i32]
%3 = bitcast [8 x i32]* %2 to i8*
%4 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%5 = call zeroext i16 @permute(i16 zeroext %0, i32* %4, i32 10, i32 8)
ret i16 %5
}
/* Variables and functions */
int /*<<< orphan*/ get_other_commands();
void sig_alrm_handler(int sig) { get_other_commands(); }


x86 assembly (clang, -O0):
<sig_alrm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <get_other_commands@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_alrm_handler>:
xor    %eax,%eax
jmp    1030 <get_other_commands@plt>

LLVM IR (-O0):
define void @sig_alrm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @get_other_commands()
ret void
}

LLVM IR (-O2):
define void @sig_alrm_handler(i32 %0) {
%2 = tail call i32 (...) @get_other_commands()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trigger_interrupt(int, int);
void trigger_fixed_interrupt(int addr) { trigger_interrupt(addr, 1); }


x86 assembly (clang, -O0):
<trigger_fixed_interrupt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <trigger_interrupt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trigger_fixed_interrupt>:
mov    $0x1,%esi
jmp    1030 <trigger_interrupt@plt>

LLVM IR (-O0):
define void @trigger_fixed_interrupt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @trigger_interrupt(i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @trigger_fixed_interrupt(i32 %0) {
%2 = tail call i32 @trigger_interrupt(i32 %0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_hello() { printf("MySQL Embeddet Tutorial\n"); }


x86 assembly (clang, -O0):
<print_hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hello>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"MySQL Embeddet Tutorial\0A\00"
define void @print_hello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"MySQL Embeddet Tutorial\00"
define void @print_hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
int twist_u_on_sliceedge(sliceedge)
int sliceedge;
{
  int temp_arr[12];
  sliceedge_unpack(sliceedge, temp_arr);
  four_cycle(temp_arr, 1, 2, 3, 0);
  return sliceedge_pack(temp_arr);
}


x86 assembly (clang, -O0):
<twist_u_on_sliceedge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x40(%rbp),%rsi
mov    $0x0,%al
call   1050 <sliceedge_unpack@plt>
lea    -0x40(%rbp),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
xor    %r8d,%r8d
mov    $0x0,%al
call   1040 <four_cycle@plt>
lea    -0x40(%rbp),%rdi
mov    $0x0,%al
call   1030 <sliceedge_pack@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twist_u_on_sliceedge>:
push   %rbx
sub    $0x30,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1050 <sliceedge_unpack@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
xor    %r8d,%r8d
xor    %eax,%eax
call   1040 <four_cycle@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <sliceedge_pack@plt>
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @twist_u_on_sliceedge(i32 %0) {
%2 = alloca i32
%3 = alloca [12 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%6 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @sliceedge_unpack to i32 (i32, i32*, ...)*)(i32 %4, i32* %5)
%7 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%8 = call i32 (i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @four_cycle to i32 (i32*, i32, i32, i32, i32, ...)*)(i32* %7, i32 1, i32 2, i32 3, i32 0)
%9 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%10 = call i32 (i32*, ...) bitcast (i32 (...)* @sliceedge_pack to i32 (i32*, ...)*)(i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @twist_u_on_sliceedge(i32 %0) {
%2 = alloca [12 x i32]
%3 = bitcast [12 x i32]* %2 to i8*
%4 = getelementptr inbounds [12 x i32], [12 x i32]* %2, i64 0, i64 0
%5 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @sliceedge_unpack to i32 (i32, i32*, ...)*)(i32 %0, i32* %4)
%6 = call i32 (i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @four_cycle to i32 (i32*, i32, i32, i32, i32, ...)*)(i32* %4, i32 1, i32 2, i32 3, i32 0)
%7 = call i32 (i32*, ...) bitcast (i32 (...)* @sliceedge_pack to i32 (i32*, ...)*)(i32* %4)
ret i32 %7
}
/* Variables and functions */
scalar_t__ getpid();
long int rfs__getpid(void) { return (long int)getpid(); }


x86 assembly (clang, -O0):
<rfs__getpid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfs__getpid>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i64 @rfs__getpid() {
%1 = call i64 (...) @getpid()
ret i64 %1
}

LLVM IR (-O2):
define i64 @rfs__getpid() {
%1 = tail call i64 (...) @getpid()
ret i64 %1
}