#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void helpmessage() {
  fprintf(stderr, "blif2Verilog [-options] netlist \n");
  fprintf(stderr, "\n");
  fprintf(stderr, "blif2Verilog converts a netlist in blif format \n");
  fprintf(stderr, "to Verilog format. Output on stdout\n");
  fprintf(stderr, "\n");
  fprintf(stderr, "option, -h this message\n");
  fprintf(stderr, "option, -p means: don't add power nodes to instances\n");
  fprintf(stderr, "        only nodes present in the .gate statement used\n");
  exit(2);
}


x86 assembly (clang, -O0):
<helpmessage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xf08(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e61(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e4c(%rip),%rax
mov    (%rax),%edi
lea    0xedb(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e37(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e22(%rip),%rax
mov    (%rax),%edi
lea    0xf00(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<helpmessage>:
push   %r14
push   %rbx
push   %rax
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf0f(%rip),%r14
mov    %r14,%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xef2(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
mov    %r14,%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xeff(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf0a(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf32(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"blif2Verilog [-options] netlist \0A\00"
@.str.1 = [2 x i8] c"\0A\00"
@.str.2 = [49 x i8] c"blif2Verilog converts a netlist in blif format \0A\00"
@.str.3 = [37 x i8] c"to Verilog format. Output on stdout\0A\00"
@.str.4 = [25 x i8] c"option, -h this message\0A\00"
@.str.5 = [54 x i8] c"option, -p means: don't add power nodes to instances\0A\00"
@.str.6 = [56 x i8] c" only nodes present in the .gate statement used\0A\00"
define void @helpmessage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.2, i64 0, i64 0))
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.3, i64 0, i64 0))
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%11 = load i32, i32* @stderr
%12 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.4, i64 0, i64 0))
%13 = load i32, i32* @stderr
%14 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.5, i64 0, i64 0))
%15 = load i32, i32* @stderr
%16 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.6, i64 0, i64 0))
%17 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"blif2Verilog [-options] netlist \0A\00"
@.str.1 = [2 x i8] c"\0A\00"
@.str.2 = [49 x i8] c"blif2Verilog converts a netlist in blif format \0A\00"
@.str.3 = [37 x i8] c"to Verilog format. Output on stdout\0A\00"
@.str.4 = [25 x i8] c"option, -h this message\0A\00"
@.str.5 = [54 x i8] c"option, -p means: don't add power nodes to instances\0A\00"
@.str.6 = [56 x i8] c" only nodes present in the .gate statement used\0A\00"
define void @helpmessage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.2, i64 0, i64 0))
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.3, i64 0, i64 0))
%9 = load i32, i32* @stderr
%10 = tail call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%11 = load i32, i32* @stderr
%12 = tail call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.4, i64 0, i64 0))
%13 = load i32, i32* @stderr
%14 = tail call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.5, i64 0, i64 0))
%15 = load i32, i32* @stderr
%16 = tail call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.6, i64 0, i64 0))
%17 = tail call i32 @exit(i32 2)
unreachable
}