#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int int32_t;

/* Variables and functions */
float invsqrt_f(float x) {
  int32_t i;
  float xhalf = x * .5f;
  i = *(int32_t *)&x;
  i = 0x5f3759df - (i >> 1);
  x = *(float *)&i;
  x = x * (1.5f - (xhalf * x * x));
  x = x * (1.5f - (xhalf * x * x));
  return x;
}


x86 assembly (clang, -O0):
<invsqrt_f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f3759df,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe98(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe5e(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<invsqrt_f>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f3759df,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
movaps %xmm0,%xmm2
mulss  %xmm1,%xmm2
mulss  %xmm1,%xmm2
movss  0xed8(%rip),%xmm3
addss  %xmm3,%xmm2
mulss  %xmm1,%xmm2
mulss  %xmm2,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm3,%xmm0
mulss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @invsqrt_f(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca float
store float %0, float* %2
%5 = load float, float* %2
%6 = fmul float %5, 5.000000e-01
store float %6, float* %4
%7 = bitcast float* %2 to i32*
%8 = load i32, i32* %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = ashr i32 %9, 1
%11 = sub nsw i32 1597463007, %10
store i32 %11, i32* %3
%12 = bitcast i32* %3 to float*
%13 = load float, float* %12
store float %13, float* %2
%14 = load float, float* %2
%15 = load float, float* %4
%16 = load float, float* %2
%17 = fmul float %15, %16
%18 = load float, float* %2
%19 = fneg float %17
%20 = call float @llvm.fmuladd.f32(float %19, float %18, float 1.500000e+00)
%21 = fmul float %14, %20
store float %21, float* %2
%22 = load float, float* %2
%23 = load float, float* %4
%24 = load float, float* %2
%25 = fmul float %23, %24
%26 = load float, float* %2
%27 = fneg float %25
%28 = call float @llvm.fmuladd.f32(float %27, float %26, float 1.500000e+00)
%29 = fmul float %22, %28
store float %29, float* %2
%30 = load float, float* %2
ret float %30
}

LLVM IR (-O2):
define float @invsqrt_f(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597463007, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
%10 = fmul float %6, %9
%11 = tail call float @llvm.fmuladd.f32(float %10, float %9, float 1.500000e+00)
%12 = fmul float %9, %11
ret float %12
}