xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ const_time_select(unsigned int, unsigned int, unsigned int);
int const_time_select_int(unsigned int mask, int true_val, int false_val) {
  return (int)const_time_select(mask, (unsigned int)true_val,
                                (unsigned int)false_val);
}


x86 assembly (clang, -O0):
<const_time_select_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <const_time_select@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<const_time_select_int>:
jmp    1030 <const_time_select@plt>

LLVM IR (-O0):
define i32 @const_time_select_int(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i64 @const_time_select(i32 %7, i32 %8, i32 %9)
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @const_time_select_int(i32 %0, i32 %1, i32 %2) {
%4 = tail call i64 @const_time_select(i32 %0, i32 %1, i32 %2)
%5 = trunc i64 %4 to i32
ret i32 %5
}
falGetAtomName() { return 0; }


x86 assembly (clang, -O0):
<falGetAtomName>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<falGetAtomName>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @falGetAtomName() {
ret i32 0
}

LLVM IR (-O2):
define i32 @falGetAtomName() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ alarm(int);
void alarm_handler(int sig __attribute__((unused))) { alarm(1); }


x86 assembly (clang, -O0):
<alarm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <alarm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alarm_handler>:
mov    $0x1,%edi
jmp    1030 <alarm@plt>

LLVM IR (-O0):
define void @alarm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @alarm(i32 1)
ret void
}

LLVM IR (-O2):
define void @alarm_handler(i32 %0) {
%2 = tail call i32 @alarm(i32 1)
ret void
}
/* Variables and functions */
scalar_t__ atof(char const *);
float stringToFloat(char *string) { return (float)atof((const char *)string); }


x86 assembly (clang, -O0):
<stringToFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atof@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringToFloat>:
push   %rax
call   1030 <atof@plt>
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @stringToFloat(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @atof(i8* %3)
%5 = sitofp i64 %4 to float
ret float %5
}

LLVM IR (-O2):
define float @stringToFloat(i8* nocapture %0) {
%2 = tail call i64 @atof(i8* %0)
%3 = sitofp i64 %2 to float
ret float %3
}
int FSA_Close(int fd) { return ((int (*)(int fd))0x08129368)(fd); }


x86 assembly (clang, -O0):
<FSA_Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8129368,%eax
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FSA_Close>:
mov    $0x8129368,%eax
jmp    *%rax

LLVM IR (-O0):
define i32 @FSA_Close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 inttoptr (i64 135435112 to i32 (i32)*)(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @FSA_Close(i32 %0) {
%2 = tail call i32 inttoptr (i64 135435112 to i32 (i32)*)(i32 %0)
ret i32 %2
}
/* Variables and functions */
double fpower(int, int);
int /*<<< orphan*/ printf(char *, int, double, double);
int main() {
  for (int i = 0; i < 500; ++i) {
    printf("%d %0.f %0.f\n", i, fpower(2, i), fpower(-3, i));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1f4,-0x8(%rbp)
jge    118d <main+0x6d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x2,%edi
call   1040 <fpower@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    $0xfffffffd,%edi
call   1040 <fpower@plt>
mov    -0x14(%rbp),%esi
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
lea    0xe86(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    $0x2,%edi
mov    %ebx,%esi
call   1040 <fpower@plt>
movsd  %xmm0,(%rsp)
mov    $0xfffffffd,%edi
mov    %ebx,%esi
call   1040 <fpower@plt>
movaps %xmm0,%xmm1
mov    %r14,%rdi
mov    %ebx,%esi
movsd  (%rsp),%xmm0
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x1f4,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%d %0.f %0.f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %13, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 500
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call double @fpower(i32 2, i32 %8)
%10 = load i32, i32* %2
%11 = call double @fpower(i32 -3, i32 %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %7, double %9, double %11)
br label %13
13: ; preds = %6
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %3
16: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"%d %0.f %0.f\0A\00"
define i32 @main() {
br label %2
1: ; preds = %2
ret i32 0
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %7, %2 ]
%4 = tail call double @fpower(i32 2, i32 %3)
%5 = tail call double @fpower(i32 -3, i32 %3)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %3, double %4, double %5)
%7 = add nuw nsw i32 %3, 1
%8 = icmp eq i32 %7, 500
br i1 %8, label %1, label %2
}
/* Type definitions */
struct pfixstack {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ PopItem(struct pfixstack **);
void ClearEvalStack(struct pfixstack **stackptr) {
  while (*stackptr != NULL)
    PopItem(stackptr);
}


x86 assembly (clang, -O0):
<ClearEvalStack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1138 <ClearEvalStack+0x28>
mov    -0x8(%rbp),%rdi
call   1030 <PopItem@plt>
jmp    111c <ClearEvalStack+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearEvalStack>:
push   %rbx
cmpq   $0x0,(%rdi)
je     112e <ClearEvalStack+0x1e>
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <PopItem@plt>
cmpq   $0x0,(%rbx)
jne    1120 <ClearEvalStack+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.pfixstack = type { i32 }
define void @ClearEvalStack(%struct.pfixstack** %0) {
%2 = alloca %struct.pfixstack**
store %struct.pfixstack** %0, %struct.pfixstack*** %2
br label %3
3: ; preds = %7, %1
%4 = load %struct.pfixstack**, %struct.pfixstack*** %2
%5 = load %struct.pfixstack*, %struct.pfixstack** %4
%6 = icmp ne %struct.pfixstack* %5, null
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load %struct.pfixstack**, %struct.pfixstack*** %2
%9 = call i32 @PopItem(%struct.pfixstack** %8)
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
%struct.pfixstack = type { i32 }
define void @ClearEvalStack(%struct.pfixstack** %0) {
%2 = load %struct.pfixstack*, %struct.pfixstack** %0
%3 = icmp eq %struct.pfixstack* %2, null
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 @PopItem(%struct.pfixstack** %0)
%6 = load %struct.pfixstack*, %struct.pfixstack** %0
%7 = icmp eq %struct.pfixstack* %6, null
br i1 %7, label %8, label %4
8: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void put_u32le(unsigned char *p, uint32_t u) {
  p[0] = u;
  p[1] = u >> 8;
  p[2] = u >> 16;
  p[3] = u >> 24;
}


x86 assembly (clang, -O0):
<put_u32le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_u32le>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @put_u32le(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = trunc i32 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 %6, i8* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8 %11, i8* %13
%14 = load i32, i32* %4
%15 = ashr i32 %14, 16
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i64 2
store i8 %16, i8* %18
%19 = load i32, i32* %4
%20 = ashr i32 %19, 24
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 3
store i8 %21, i8* %23
ret void
}

LLVM IR (-O2):
define void @put_u32le(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
%4 = lshr i32 %1, 8
%5 = trunc i32 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i32 %1, 16
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i32 %1, 24
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
__typeof__(memmove(1, 1, "")) test_memmove_116(void) {
  return memmove(1, 1, "");
}


x86 assembly (clang, -O0):
<test_memmove_116>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdx
mov    $0x1,%esi
mov    %rsi,%rdi
call   1030 <memmove@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_memmove_116>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @test_memmove_116() {
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
define i8* @test_memmove_116() {
ret i8* inttoptr (i64 1 to i8*)
}
/* Type definitions */
struct varyad {
  int dummy;
};

/* Variables and functions */
size_t _size(struct varyad const *, size_t);
size_t _item_len(const struct varyad *v, size_t i) {
  if (i) {
    return _size(v, i) - _size(v, i - 1);
  } else {
    return _size(v, i);
  }
}


x86 assembly (clang, -O0):
<_item_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1160 <_item_len+0x50>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <_size@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
sub    $0x1,%rsi
call   1030 <_size@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1171 <_item_len+0x61>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <_size@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_item_len>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %rsi,%rsi
je     1146 <_item_len+0x36>
mov    %rsi,%rbx
mov    %r14,%rdi
call   1030 <_size@plt>
mov    %rax,%r15
add    $0xffffffffffffffff,%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <_size@plt>
sub    %rax,%r15
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret
mov    %r14,%rdi
xor    %esi,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <_size@plt>

LLVM IR (-O0):
%struct.varyad = type { i32 }
define i64 @_item_len(%struct.varyad* %0, i64 %1) {
%3 = alloca i64
%4 = alloca %struct.varyad*
%5 = alloca i64
store %struct.varyad* %0, %struct.varyad** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load %struct.varyad*, %struct.varyad** %4
%10 = load i64, i64* %5
%11 = call i64 @_size(%struct.varyad* %9, i64 %10)
%12 = load %struct.varyad*, %struct.varyad** %4
%13 = load i64, i64* %5
%14 = sub i64 %13, 1
%15 = call i64 @_size(%struct.varyad* %12, i64 %14)
%16 = sub i64 %11, %15
store i64 %16, i64* %3
br label %21
17: ; preds = %2
%18 = load %struct.varyad*, %struct.varyad** %4
%19 = load i64, i64* %5
%20 = call i64 @_size(%struct.varyad* %18, i64 %19)
store i64 %20, i64* %3
br label %21
21: ; preds = %17, %8
%22 = load i64, i64* %3
ret i64 %22
}

LLVM IR (-O2):
%struct.varyad = type { i32 }
define i64 @_item_len(%struct.varyad* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = tail call i64 @_size(%struct.varyad* %0, i64 %1)
%6 = add i64 %1, -1
%7 = tail call i64 @_size(%struct.varyad* %0, i64 %6)
%8 = sub i64 %5, %7
br label %11
9: ; preds = %2
%10 = tail call i64 @_size(%struct.varyad* %0, i64 0)
br label %11
11: ; preds = %9, %4
%12 = phi i64 [ %8, %4 ], [ %10, %9 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
int smp_sys_getpid_byname(char *);
void smp_test_sys_name2pid() {
  sleep(10);
  int pid = smp_sys_getpid_byname("smpcil");
  printf("pid %d\n", pid);
}


x86 assembly (clang, -O0):
<smp_test_sys_name2pid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa,%edi
call   1050 <sleep@plt>
lea    0xeb7(%rip),%rdi
call   1030 <smp_sys_getpid_byname@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xeac(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_test_sys_name2pid>:
push   %rax
mov    $0xa,%edi
call   1050 <sleep@plt>
lea    0xebe(%rip),%rdi
call   1030 <smp_sys_getpid_byname@plt>
lea    0xeb9(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"smpcil\00"
@.str.1 = [8 x i8] c"pid %d\0A\00"
define void @smp_test_sys_name2pid() {
%1 = alloca i32
%2 = call i32 @sleep(i32 10)
%3 = call i32 @smp_sys_getpid_byname(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"smpcil\00"
@.str.1 = [8 x i8] c"pid %d\0A\00"
define void @smp_test_sys_name2pid() {
%1 = tail call i32 @sleep(i32 10)
%2 = tail call i32 @smp_sys_getpid_byname(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %2)
ret void
}
int sq(int x) { return x * x; }


x86 assembly (clang, -O0):
<sq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @sq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sq(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char);
unsigned char read_do(int n) {
  unsigned char val;
  val = ((n % 3) != 0);
  printf("DO %d, return %c\n", n, val ? 'T' : 'F');
  return val;
}


x86 assembly (clang, -O0):
<read_do>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%esi
movzbl -0x5(%rbp),%edx
mov    $0x46,%eax
mov    $0x54,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
lea    0xeae(%rip),%rdi
movsbl %al,%edx
call   1030 <printf@plt>
movzbl -0x5(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_do>:
push   %rbx
mov    %edi,%esi
imul   $0xaaaaaaab,%edi,%eax
add    $0x2aaaaaaa,%eax
cmp    $0x55555555,%eax
setae  %bl
mov    $0x54,%eax
mov    $0x46,%edx
cmovae %eax,%edx
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"DO %d, return %c\0A\00"
define zeroext i8 @read_do(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 3
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i32, i32* %2
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 84, i32 70
%15 = trunc i32 %14 to i8
%16 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %9, i8 signext %15)
%17 = load i8, i8* %3
ret i8 %17
}

LLVM IR (-O2):
@.str = [18 x i8] c"DO %d, return %c\0A\00"
define zeroext i8 @read_do(i32 %0) {
%2 = srem i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i8
%5 = select i1 %3, i8 84, i8 70
%6 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %5)
ret i8 %4
}
/* Type definitions */
struct hiena_mfrag {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct hiena_mfrag *);
void mfrag_cleanup(struct hiena_mfrag *mf) {
  if (mf != NULL)
    free(mf);
}


x86 assembly (clang, -O0):
<mfrag_cleanup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <mfrag_cleanup+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mfrag_cleanup>:
test   %rdi,%rdi
je     111a <mfrag_cleanup+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.hiena_mfrag = type { i32 }
define void @mfrag_cleanup(%struct.hiena_mfrag* %0) {
%2 = alloca %struct.hiena_mfrag*
store %struct.hiena_mfrag* %0, %struct.hiena_mfrag** %2
%3 = load %struct.hiena_mfrag*, %struct.hiena_mfrag** %2
%4 = icmp ne %struct.hiena_mfrag* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.hiena_mfrag*, %struct.hiena_mfrag** %2
%7 = call i32 @free(%struct.hiena_mfrag* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.hiena_mfrag = type { i32 }
define void @mfrag_cleanup(%struct.hiena_mfrag* %0) {
%2 = icmp eq %struct.hiena_mfrag* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.hiena_mfrag* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int gcd(int, int);
int lcm(int x, int y) { return (x * y) / gcd(x, y); }


x86 assembly (clang, -O0):
<lcm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <gcd@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcm>:
push   %rbx
mov    %esi,%ebx
imul   %edi,%ebx
call   1030 <gcd@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
pop    %rbx
ret

LLVM IR (-O0):
define i32 @lcm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @gcd(i32 %8, i32 %9)
%11 = sdiv i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @lcm(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = tail call i32 @gcd(i32 %0, i32 %1)
%5 = sdiv i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ MyLibraryFunctionToTest();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Test 2 for MyLibrary:\n");
  MyLibraryFunctionToTest();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <MyLibraryFunctionToTest@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <MyLibraryFunctionToTest@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Test 2 for MyLibrary:\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @MyLibraryFunctionToTest()
ret i32 0
}

LLVM IR (-O2):
@str = [22 x i8] c"Test 2 for MyLibrary:\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @MyLibraryFunctionToTest()
ret i32 0
}
int good(int *p) { return p && *p == 0; }


x86 assembly (clang, -O0):
<good>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1125 <good+0x25>
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<good>:
xor    %eax,%eax
test   %rdi,%rdi
je     110d <good+0xd>
cmpl   $0x0,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @good(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ false, %1 ], [ %8, %5 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @good(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load i32, i32* %0
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
scalar_t__ strncmp(char const *, char const *, int);
bool correct_name_order(const char *prev, const char *line, int start,
                        int len) {
  return strncmp(prev, line + start, len) < 0;
}


x86 assembly (clang, -O0):
<correct_name_order>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rax
add    %rax,%rsi
mov    -0x18(%rbp),%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<correct_name_order>:
push   %rax
movslq %edx,%rax
add    %rax,%rsi
mov    %ecx,%edx
call   1030 <strncmp@plt>
shr    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @correct_name_order(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i32, i32* %8
%15 = call i64 @strncmp(i8* %9, i8* %13, i32 %14)
%16 = icmp slt i64 %15, 0
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @correct_name_order(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %1, i64 %5
%7 = tail call i64 @strncmp(i8* %0, i8* %6, i32 %3)
%8 = lshr i64 %7, 63
%9 = trunc i64 %8 to i32
ret i32 %9
}
/* Variables and functions */
char *dp_strchr(char *, char);
char *memory_maps_one_line_map_name(char *line) {
  char *tmp;
  tmp = dp_strchr(line, '/');
  if (!tmp) {
    tmp = dp_strchr(line, '[');
  }
  return tmp;
}


x86 assembly (clang, -O0):
<memory_maps_one_line_map_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <dp_strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114b <memory_maps_one_line_map_name+0x3b>
mov    -0x8(%rbp),%rdi
mov    $0x5b,%esi
call   1030 <dp_strchr@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_maps_one_line_map_name>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <dp_strchr@plt>
test   %rax,%rax
je     1125 <memory_maps_one_line_map_name+0x15>
pop    %rbx
ret
mov    %rbx,%rdi
mov    $0x5b,%esi
pop    %rbx
jmp    1030 <dp_strchr@plt>

LLVM IR (-O0):
define i8* @memory_maps_one_line_map_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @dp_strchr(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = call i8* @dp_strchr(i8* %9, i8 signext 91)
store i8* %10, i8** %3
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @memory_maps_one_line_map_name(i8* %0) {
%2 = tail call i8* @dp_strchr(i8* %0, i8 signext 47)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @dp_strchr(i8* %0, i8 signext 91)
br label %6
6: ; preds = %4, %1
%7 = phi i8* [ %2, %1 ], [ %5, %4 ]
ret i8* %7
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable) {
  ;
  if (bEnable) {
    (*((volatile uint32_t *)(ui32Base + 0x00000820))) |= 0x00000001;
  } else {
    (*((volatile uint32_t *)(ui32Base + 0x00000820))) &= ~0x00000001;
  }
}


x86 assembly (clang, -O0):
<I2CSlaveACKOverride>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112a <I2CSlaveACKOverride+0x2a>
mov    -0x4(%rbp),%eax
add    $0x820,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
jmp    113b <I2CSlaveACKOverride+0x3b>
mov    -0x4(%rbp),%eax
add    $0x820,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveACKOverride>:
xor    %eax,%eax
test   %esi,%esi
setne  %al
movslq %edi,%rcx
mov    0x820(%rcx),%edx
and    $0xfffffffe,%edx
or     %edx,%eax
mov    %eax,0x820(%rcx)
ret

LLVM IR (-O0):
define void @I2CSlaveACKOverride(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 2080
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = or i32 %12, 1
store volatile i32 %13, i32* %11
br label %21
14: ; preds = %2
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 2080
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
%20 = and i32 %19, -2
store volatile i32 %20, i32* %18
br label %21
21: ; preds = %14, %7
ret void
}

LLVM IR (-O2):
define void @I2CSlaveACKOverride(i32 %0, i32 %1) {
%3 = icmp ne i32 %1, 0
%4 = add nsw i32 %0, 2080
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -2
%9 = zext i1 %3 to i32
%10 = or i32 %8, %9
store volatile i32 %10, i32* %6
ret void
}
int test_imm_55int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x55 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_55int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x55,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_55int64_highword_mem>:
testb  $0x55,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_55int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 85
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_55int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 365072220160
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ POLICY_MAPPING;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ POLICY_MAPPING_it;
void POLICY_MAPPING_free(POLICY_MAPPING *a) {
  ASN1_item_free((ASN1_VALUE *)a, &POLICY_MAPPING_it);
}


x86 assembly (clang, -O0):
<POLICY_MAPPING_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<POLICY_MAPPING_free>:
mov    0x2ed1(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@POLICY_MAPPING_it = global i32 0
define void @POLICY_MAPPING_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @POLICY_MAPPING_it)
ret void
}

LLVM IR (-O2):
@POLICY_MAPPING_it = global i32 0
define void @POLICY_MAPPING_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @POLICY_MAPPING_it)
ret void
}
void RTAvlGCPtrRemove(void) {}


x86 assembly (clang, -O0):
<RTAvlGCPtrRemove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlGCPtrRemove>:
ret

LLVM IR (-O0):
define void @RTAvlGCPtrRemove() {
ret void
}

LLVM IR (-O2):
define void @RTAvlGCPtrRemove() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _m_pinsrw(int /*<<< orphan*/, int, int);
__m64 __m_pinsrw(__m64 A, int B, int const I) { return _m_pinsrw(A, B, 1); }


x86 assembly (clang, -O0):
<__m_pinsrw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
call   1030 <_m_pinsrw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__m_pinsrw>:
mov    $0x1,%edx
jmp    1030 <_m_pinsrw@plt>

LLVM IR (-O0):
define i32 @__m_pinsrw(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @_m_pinsrw(i32 %7, i32 %8, i32 1)
ret i32 %9
}

LLVM IR (-O2):
define i32 @__m_pinsrw(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @_m_pinsrw(i32 %0, i32 %1, i32 1)
ret i32 %4
}
/* Type definitions */
struct inode {
  int dummy;
};

/* Variables and functions */
int locks_mandatory_locked(struct inode *);
scalar_t__ mandatory_lock(struct inode *);
__attribute__((always_)) int locks_verify_locked(struct inode *inode) {
  if (mandatory_lock(inode))
    return locks_mandatory_locked(inode);
  return 0;
}


x86 assembly (clang, -O0):
<locks_verify_locked>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <mandatory_lock@plt>
cmp    $0x0,%rax
je     1150 <locks_verify_locked+0x30>
mov    -0x10(%rbp),%rdi
call   1040 <locks_mandatory_locked@plt>
mov    %eax,-0x4(%rbp)
jmp    1157 <locks_verify_locked+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<locks_verify_locked>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mandatory_lock@plt>
test   %rax,%rax
je     1137 <locks_verify_locked+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <locks_mandatory_locked@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.inode = type { i32 }
define i32 @locks_verify_locked(%struct.inode* %0) {
%2 = alloca i32
%3 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %3
%4 = load %struct.inode*, %struct.inode** %3
%5 = call i64 @mandatory_lock(%struct.inode* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load %struct.inode*, %struct.inode** %3
%9 = call i32 @locks_mandatory_locked(%struct.inode* %8)
store i32 %9, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.inode = type { i32 }
define i32 @locks_verify_locked(%struct.inode* %0) {
%2 = tail call i64 @mandatory_lock(%struct.inode* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @locks_mandatory_locked(%struct.inode* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ timespec_add_nsec(struct timespec *, struct timespec const *,
                                     int);
void timespec_add_msec(struct timespec *r, const struct timespec *a,
                       int64_t b) {
  timespec_add_nsec(r, a, b * 1000000);
}


x86 assembly (clang, -O0):
<timespec_add_msec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
imul   $0xf4240,-0x14(%rbp),%edx
call   1030 <timespec_add_nsec@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_add_msec>:
imul   $0xf4240,%edx,%edx
jmp    1030 <timespec_add_nsec@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @timespec_add_msec(%struct.timespec* %0, %struct.timespec* %1, i32 %2) {
%4 = alloca %struct.timespec*
%5 = alloca %struct.timespec*
%6 = alloca i32
store %struct.timespec* %0, %struct.timespec** %4
store %struct.timespec* %1, %struct.timespec** %5
store i32 %2, i32* %6
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = load %struct.timespec*, %struct.timespec** %5
%9 = load i32, i32* %6
%10 = mul nsw i32 %9, 1000000
%11 = call i32 @timespec_add_nsec(%struct.timespec* %7, %struct.timespec* %8, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @timespec_add_msec(%struct.timespec* %0, %struct.timespec* %1, i32 %2) {
%4 = mul nsw i32 %2, 1000000
%5 = tail call i32 @timespec_add_nsec(%struct.timespec* %0, %struct.timespec* %1, i32 %4)
ret void
}
int _fork() { return -1; }


x86 assembly (clang, -O0):
<_fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fork>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_fork() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @_fork() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ xml_deinit();
void lmx_rd_deinit(void) { xml_deinit(); }


x86 assembly (clang, -O0):
<lmx_rd_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <xml_deinit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lmx_rd_deinit>:
xor    %eax,%eax
jmp    1030 <xml_deinit@plt>

LLVM IR (-O0):
define void @lmx_rd_deinit() {
%1 = call i32 (...) @xml_deinit()
ret void
}

LLVM IR (-O2):
define void @lmx_rd_deinit() {
%1 = tail call i32 (...) @xml_deinit()
ret void
}
/* Variables and functions */
size_t base32_decoding_length(size_t src_len) { return ((src_len * 5) / 8); }


x86 assembly (clang, -O0):
<base32_decoding_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
imul   $0x5,-0x8(%rbp),%rax
shr    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base32_decoding_length>:
lea    (%rdi,%rdi,4),%rax
shr    $0x3,%rax
ret

LLVM IR (-O0):
define i64 @base32_decoding_length(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 5
%5 = udiv i64 %4, 8
ret i64 %5
}

LLVM IR (-O2):
define i64 @base32_decoding_length(i64 %0) {
%2 = mul i64 %0, 5
%3 = lshr i64 %2, 3
ret i64 %3
}
void __stack_chk_fail_local(void) { return; }


x86 assembly (clang, -O0):
<__stack_chk_fail_local>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stack_chk_fail_local>:
ret

LLVM IR (-O0):
define void @__stack_chk_fail_local() {
ret void
}

LLVM IR (-O2):
define void @__stack_chk_fail_local() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_apply(void (*)(), int /*<<< orphan*/, int);
int /*<<< orphan*/ __builtin_apply_args();
int /*<<< orphan*/ __builtin_return(int /*<<< orphan*/);
int /*<<< orphan*/ foo(int);
double bar(int arg) {
  foo(arg);
  __builtin_return(
      __builtin_apply((void (*)())foo, __builtin_apply_args(), 16));
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1060 <foo@plt>
mov    $0x0,%al
call   1040 <__builtin_apply_args@plt>
mov    %eax,%esi
mov    0x2e95(%rip),%rdi
mov    $0x10,%edx
call   1050 <__builtin_apply@plt>
mov    %eax,%edi
call   1030 <__builtin_return@plt>
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbx
call   1060 <foo@plt>
mov    0x2eab(%rip),%rbx
xor    %eax,%eax
call   1040 <__builtin_apply_args@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    $0x10,%edx
call   1050 <__builtin_apply@plt>
mov    %eax,%edi
pop    %rbx
jmp    1030 <__builtin_return@plt>

LLVM IR (-O0):
define double @bar(i32 %0) {
%2 = alloca double
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @foo(i32 %4)
%6 = call i32 (...) @__builtin_apply_args()
%7 = call i32 @__builtin_apply(void (...)* bitcast (i32 (i32)* @foo to void (...)*), i32 %6, i32 16)
%8 = call i32 @__builtin_return(i32 %7)
%9 = load double, double* %2
ret double %9
}

LLVM IR (-O2):
define double @bar(i32 %0) {
%2 = tail call i32 @foo(i32 %0)
%3 = tail call i32 (...) @__builtin_apply_args()
%4 = tail call i32 @__builtin_apply(void (...)* bitcast (i32 (i32)* @foo to void (...)*), i32 %3, i32 16)
%5 = tail call i32 @__builtin_return(i32 %4)
ret double undef
}
/* Variables and functions */
int sqrt(int);
int abs(int x) { return sqrt(x * x); }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
imul   -0x4(%rbp),%edi
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
imul   %edi,%edi
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
%6 = call i32 @sqrt(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = tail call i32 @sqrt(i32 %2)
ret i32 %3
}
int ti_trix_start(double const *options) {
  const int period = (int)options[0];
  return ((period - 1) * 3) + 1;
}


x86 assembly (clang, -O0):
<ti_trix_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttsd2si (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
imul   $0x3,%eax,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_trix_start>:
cvttsd2si (%rdi),%eax
lea    (%rax,%rax,2),%eax
add    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @ti_trix_start(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
%4 = load double*, double** %2
%5 = getelementptr inbounds double, double* %4, i64 0
%6 = load double, double* %5
%7 = fptosi double %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = mul nsw i32 %9, 3
%11 = add nsw i32 %10, 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @ti_trix_start(double* nocapture %0) {
%2 = load double, double* %0
%3 = fptosi double %2 to i32
%4 = mul i32 %3, 3
%5 = add i32 %4, -2
ret i32 %5
}
/* Variables and functions */
long hv_generic(int, unsigned int, unsigned long, unsigned long);
long hv_reg_crq(unsigned int unit, unsigned long qaddr, unsigned long qsize) {
  return hv_generic(0xFC, unit, qaddr, qsize);
}


x86 assembly (clang, -O0):
<hv_reg_crq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0xfc,%edi
call   1030 <hv_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hv_reg_crq>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0xfc,%edi
jmp    1030 <hv_generic@plt>

LLVM IR (-O0):
define i64 @hv_reg_crq(i32 %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i64 @hv_generic(i32 252, i32 %7, i64 %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @hv_reg_crq(i32 %0, i64 %1, i64 %2) {
%4 = tail call i64 @hv_generic(i32 252, i32 %0, i64 %1, i64 %2)
ret i64 %4
}
void async_synchronize_full_domain(struct list_head *list) {}


x86 assembly (clang, -O0):
<async_synchronize_full_domain>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<async_synchronize_full_domain>:
ret

LLVM IR (-O0):
%struct.list_head = type opaque
define void @async_synchronize_full_domain(%struct.list_head* %0) {
%2 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %2
ret void
}

LLVM IR (-O2):
%struct.list_head = type opaque
define void @async_synchronize_full_domain(%struct.list_head* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(int, int /*<<< orphan*/, char *);
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *p = malloc(size);
  if (p == NULL)
    error(1, 0, "Out of memory, malloc failed");
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1157 <xmalloc+0x37>
mov    $0x1,%edi
xor    %esi,%esi
lea    0xeae(%rip),%rdx
call   1040 <error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1141 <xmalloc+0x21>
lea    0xecb(%rip),%rdx
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Out of memory, malloc failed\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @error(i32 1, i32 0, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [29 x i8] c"Out of memory, malloc failed\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @error(i32 1, i32 0, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ CTIMER1_DriverIRQHandler();
__attribute__((weak)) void CTIMER1_IRQHandler(void) {
  CTIMER1_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<CTIMER1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CTIMER1_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CTIMER1_IRQHandler>:
xor    %eax,%eax
jmp    1030 <CTIMER1_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @CTIMER1_IRQHandler() {
%1 = call i32 (...) @CTIMER1_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @CTIMER1_IRQHandler() {
%1 = tail call i32 (...) @CTIMER1_DriverIRQHandler()
ret void
}
/* Variables and functions */
char *strchr(char *, char);
int HasDot(char *lps) {
  char *p = strchr(lps, '.');
  if (p)
    return (int)((p - lps) + 1);
  return 0;
}


x86 assembly (clang, -O0):
<HasDot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2e,%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1150 <HasDot+0x40>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
add    $0x1,%rax
mov    %eax,-0x4(%rbp)
jmp    1157 <HasDot+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HasDot>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2e,%esi
call   1030 <strchr@plt>
mov    %eax,%edx
sub    %ebx,%edx
add    $0x1,%edx
xor    %ecx,%ecx
test   %rax,%rax
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @HasDot(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strchr(i8* %5, i8 signext 46)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %17
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = load i8*, i8** %3
%12 = ptrtoint i8* %10 to i64
%13 = ptrtoint i8* %11 to i64
%14 = sub i64 %12, %13
%15 = add nsw i64 %14, 1
%16 = trunc i64 %15 to i32
store i32 %16, i32* %2
br label %18
17: ; preds = %1
store i32 0, i32* %2
br label %18
18: ; preds = %17, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @HasDot(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 46)
%3 = icmp eq i8* %2, null
%4 = ptrtoint i8* %2 to i64
%5 = ptrtoint i8* %0 to i64
%6 = sub i64 %4, %5
%7 = trunc i64 %6 to i32
%8 = add i32 %7, 1
%9 = select i1 %3, i32 0, i32 %8
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ __setCHRBank2Low(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ vrc2_4_SetChrROMBank2();
void vrc2_4_setParamsCXX0(uint16_t addr, uint8_t val) {
  __setCHRBank2Low(addr, val);
  vrc2_4_SetChrROMBank2();
}


x86 assembly (clang, -O0):
<vrc2_4_setParamsCXX0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__setCHRBank2Low@plt>
mov    $0x0,%al
call   1040 <vrc2_4_SetChrROMBank2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrc2_4_setParamsCXX0>:
push   %rax
call   1030 <__setCHRBank2Low@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <vrc2_4_SetChrROMBank2@plt>

LLVM IR (-O0):
define void @vrc2_4_setParamsCXX0(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__setCHRBank2Low(i32 %5, i32 %6)
%8 = call i32 (...) @vrc2_4_SetChrROMBank2()
ret void
}

LLVM IR (-O2):
define void @vrc2_4_setParamsCXX0(i32 %0, i32 %1) {
%3 = tail call i32 @__setCHRBank2Low(i32 %0, i32 %1)
%4 = tail call i32 (...) @vrc2_4_SetChrROMBank2()
ret void
}
/* Variables and functions */
int totemmrp_my_family_get();
int totempg_my_family_get(void) { return (totemmrp_my_family_get()); }


x86 assembly (clang, -O0):
<totempg_my_family_get>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <totemmrp_my_family_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<totempg_my_family_get>:
xor    %eax,%eax
jmp    1030 <totemmrp_my_family_get@plt>

LLVM IR (-O0):
define i32 @totempg_my_family_get() {
%1 = call i32 (...) @totemmrp_my_family_get()
ret i32 %1
}

LLVM IR (-O2):
define i32 @totempg_my_family_get() {
%1 = tail call i32 (...) @totemmrp_my_family_get()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void title(const char *title) { printf("=======\n  %s\n=======\n", title); }


x86 assembly (clang, -O0):
<title>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<title>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"=======\0A %s\0A=======\0A\00"
define void @title(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"=======\0A %s\0A=======\0A\00"
define void @title(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}