#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void SHAMD5IntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT(ui32Base == 0x44034000);
  ASSERT((ui32IntFlags == 0x00000008) || (ui32IntFlags == 0x00000004) ||
         (ui32IntFlags == 0x00000002) || (ui32IntFlags == 0x00000001));
  (*((volatile uint32_t *)(ui32Base + 0xFFFFC010))) &=
      ~(((ui32IntFlags & 0x00010000) >> 14) |
        ((ui32IntFlags & 0x00020000) >> 16) |
        ((ui32IntFlags & 0x00040000) >> 19));
  (*((volatile uint32_t *)(ui32Base + 0x0000011C))) &=
      ~(ui32IntFlags & 0x0000ffff);
  if ((*((volatile uint32_t *)(ui32Base + 0x0000011C))) == 0x0) {
    (*((volatile uint32_t *)(ui32Base + 0x00000110))) &= ~0x00000004;
  }
}


x86 assembly (clang, -O0):
<SHAMD5IntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x44034000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0x8,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1169 <SHAMD5IntDisable+0x59>
mov    $0x1,%al
cmpl   $0x4,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1169 <SHAMD5IntDisable+0x59>
mov    $0x1,%al
cmpl   $0x2,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1169 <SHAMD5IntDisable+0x59>
cmpl   $0x1,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%edx
and    $0x10000,%edx
sar    $0xe,%edx
mov    -0x8(%rbp),%eax
and    $0x20000,%eax
sar    $0x10,%eax
or     %eax,%edx
mov    -0x8(%rbp),%eax
and    $0x40000,%eax
sar    $0x13,%eax
or     %eax,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0xffffc010,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0xffff,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0x11c,%eax
cltq
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x11c,%eax
cltq
mov    (%rax),%eax
cmp    $0x0,%eax
jne    11f1 <SHAMD5IntDisable+0xe1>
mov    -0x4(%rbp),%eax
add    $0x110,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffb,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5IntDisable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x44034000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
cmp    $0x8,%ebp
ja     113c <SHAMD5IntDisable+0x2c>
mov    $0x1,%edi
mov    $0x114,%eax
bt     %ebp,%eax
jb     1145 <SHAMD5IntDisable+0x35>
xor    %edi,%edi
cmp    $0x1,%ebp
sete   %dil
call   1030 <ASSERT@plt>
mov    %ebp,%ecx
not    %ecx
mov    %ebp,%eax
shr    $0xe,%eax
and    $0x4,%eax
shr    $0x10,%ebp
and    $0x2,%ebp
or     %eax,%ebp
not    %ebp
lea    -0x3ff0(%rbx),%eax
and    %ebp,(%rax)
or     $0xffff0000,%ecx
movslq %ebx,%rax
and    %ecx,0x11c(%rax)
cmpl   $0x0,0x11c(%rax)
jne    1187 <SHAMD5IntDisable+0x77>
andl   $0xfffffffb,0x110(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @SHAMD5IntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141063680
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 8
br i1 %10, label %20, label %11
11: ; preds = %2
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 4
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 2
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 1
br label %20
20: ; preds = %17, %14, %11, %2
%21 = phi i1 [ true, %14 ], [ true, %11 ], [ true, %2 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
%23 = call i32 @ASSERT(i32 %22)
%24 = load i32, i32* %4
%25 = and i32 %24, 65536
%26 = ashr i32 %25, 14
%27 = load i32, i32* %4
%28 = and i32 %27, 131072
%29 = ashr i32 %28, 16
%30 = or i32 %26, %29
%31 = load i32, i32* %4
%32 = and i32 %31, 262144
%33 = ashr i32 %32, 19
%34 = or i32 %30, %33
%35 = xor i32 %34, -1
%36 = load i32, i32* %3
%37 = add i32 %36, -16368
%38 = zext i32 %37 to i64
%39 = inttoptr i64 %38 to i32*
%40 = load volatile i32, i32* %39
%41 = and i32 %40, %35
store volatile i32 %41, i32* %39
%42 = load i32, i32* %4
%43 = and i32 %42, 65535
%44 = xor i32 %43, -1
%45 = load i32, i32* %3
%46 = add nsw i32 %45, 284
%47 = sext i32 %46 to i64
%48 = inttoptr i64 %47 to i32*
%49 = load volatile i32, i32* %48
%50 = and i32 %49, %44
store volatile i32 %50, i32* %48
%51 = load i32, i32* %3
%52 = add nsw i32 %51, 284
%53 = sext i32 %52 to i64
%54 = inttoptr i64 %53 to i32*
%55 = load volatile i32, i32* %54
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %64
57: ; preds = %20
%58 = load i32, i32* %3
%59 = add nsw i32 %58, 272
%60 = sext i32 %59 to i64
%61 = inttoptr i64 %60 to i32*
%62 = load volatile i32, i32* %61
%63 = and i32 %62, -5
store volatile i32 %63, i32* %61
br label %64
64: ; preds = %57, %20
ret void
}

LLVM IR (-O2):
define void @SHAMD5IntDisable(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1141063680
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
switch i32 %1, label %6 [
i32 8, label %9
i32 4, label %9
i32 2, label %9
]
6: ; preds = %2
%7 = icmp eq i32 %1, 1
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %2, %2, %2, %6
%10 = phi i32 [ 1, %2 ], [ %8, %6 ], [ 1, %2 ], [ 1, %2 ]
%11 = tail call i32 @ASSERT(i32 %10)
%12 = lshr i32 %1, 14
%13 = and i32 %12, 4
%14 = lshr i32 %1, 16
%15 = and i32 %14, 2
%16 = or i32 %13, %15
%17 = xor i32 %16, -1
%18 = add i32 %0, -16368
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
%21 = load volatile i32, i32* %20
%22 = and i32 %21, %17
store volatile i32 %22, i32* %20
%23 = and i32 %1, 65535
%24 = xor i32 %23, -1
%25 = add nsw i32 %0, 284
%26 = sext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
%28 = load volatile i32, i32* %27
%29 = and i32 %28, %24
store volatile i32 %29, i32* %27
%30 = load volatile i32, i32* %27
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %38
32: ; preds = %9
%33 = add nsw i32 %0, 272
%34 = sext i32 %33 to i64
%35 = inttoptr i64 %34 to i32*
%36 = load volatile i32, i32* %35
%37 = and i32 %36, -5
store volatile i32 %37, i32* %35
br label %38
38: ; preds = %32, %9
ret void
}