xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void print_refc_string(FILE *output, char *obj) {
  if (obj) {
    fprintf(output, "%s : %d", obj, (*(int *)((void *)(((int *)obj) - 1))));
  } else {
    fprintf(output, "<NULL>");
  }
}


x86 assembly (clang, -O0):
<print_refc_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114d <print_refc_string+0x3d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x10(%rbp),%rax
mov    -0x4(%rax),%ecx
lea    0xebf(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
jmp    115f <print_refc_string+0x4f>
mov    -0x8(%rbp),%rdi
lea    0xeb0(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_refc_string>:
mov    %rdi,%rax
test   %rsi,%rsi
je     113f <print_refc_string+0x1f>
mov    %rsi,%rdx
mov    -0x4(%rsi),%ecx
lea    0xecb(%rip),%rsi
mov    %rax,%rdi
xor    %eax,%eax
jmp    1030 <fprintf@plt>
lea    0xec2(%rip),%rdi
mov    $0x6,%esi
mov    $0x1,%edx
mov    %rax,%rcx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s : %d\00"
@.str.1 = [7 x i8] c"<NULL>\00"
define void @print_refc_string(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %17
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = load i8*, i8** %4
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = getelementptr inbounds i32, i32* %11, i64 -1
%13 = bitcast i32* %12 to i8*
%14 = bitcast i8* %13 to i32*
%15 = load i32, i32* %14
%16 = call i32 (i32*, i8*, ...) @fprintf(i32* %8, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %9, i32 %15)
br label %20
17: ; preds = %2
%18 = load i32*, i32** %3
%19 = call i32 (i32*, i8*, ...) @fprintf(i32* %18, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %20
20: ; preds = %17, %7
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s : %d\00"
@.str.1 = [7 x i8] c"<NULL>\00"
define void @print_refc_string(i32* nocapture %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, i8* %1, i64 -4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %7)
br label %11
9: ; preds = %2
%10 = tail call i64 @fwrite(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 6, i64 1, i32* %0)
br label %11
11: ; preds = %9, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ smal_mark_queue_mark(int /*<<< orphan*/);
void smal_mark_queue_mark_all() { smal_mark_queue_mark(0); }


x86 assembly (clang, -O0):
<smal_mark_queue_mark_all>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <smal_mark_queue_mark@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smal_mark_queue_mark_all>:
xor    %edi,%edi
jmp    1030 <smal_mark_queue_mark@plt>

LLVM IR (-O0):
define void @smal_mark_queue_mark_all() {
%1 = call i32 @smal_mark_queue_mark(i32 0)
ret void
}

LLVM IR (-O2):
define void @smal_mark_queue_mark_all() {
%1 = tail call i32 @smal_mark_queue_mark(i32 0)
ret void
}
/* Variables and functions */
int ENODATA;
int /*<<< orphan*/ asprintf(char **, char *, char const *, int);
int error_missing_arguments(const char *__restrict o, int n, char **msg) {
  if (msg)
    asprintf(msg, "option \"%s\" expects %d more argument(s)", o, n);
  return -ENODATA;
}


x86 assembly (clang, -O0):
<error_missing_arguments>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1145 <error_missing_arguments+0x35>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xec0(%rip),%rsi
call   1030 <asprintf@plt>
xor    %eax,%eax
mov    0x2e9a(%rip),%rcx
sub    (%rcx),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_missing_arguments>:
push   %rax
test   %rdx,%rdx
je     112d <error_missing_arguments+0x1d>
mov    %esi,%ecx
mov    %rdi,%rax
lea    0xede(%rip),%rsi
mov    %rdx,%rdi
mov    %rax,%rdx
call   1030 <asprintf@plt>
mov    0x2eb4(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"option \22%s\22 expects %d more argument(s)\00"
@ENODATA = global i32 0
define i32 @error_missing_arguments(i8* noalias %0, i32 %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8**
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load i8**, i8*** %6
%8 = icmp ne i8** %7, null
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i8**, i8*** %6
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = call i32 @asprintf(i8** %10, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %11, i32 %12)
br label %14
14: ; preds = %9, %3
%15 = load i32, i32* @ENODATA
%16 = sub nsw i32 0, %15
ret i32 %16
}

LLVM IR (-O2):
@.str = [40 x i8] c"option \22%s\22 expects %d more argument(s)\00"
@ENODATA = global i32 0
define i32 @error_missing_arguments(i8* noalias %0, i32 %1, i8** %2) {
%4 = icmp eq i8** %2, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @asprintf(i8** %2, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
br label %7
7: ; preds = %5, %3
%8 = load i32, i32* @ENODATA
%9 = sub nsw i32 0, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xb3() {
  Assert_real((iscntrl(179) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              900, ("iscntrl should be 0 for 0xb3"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xb3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb3,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x384,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xb3>:
push   %rax
mov    $0xb3,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x384,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xb3\00"
define void @t_iscntrl_0xb3() {
%1 = call i64 @iscntrl(i32 179)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 900, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xb3\00"
define void @t_iscntrl_0xb3() {
%1 = tail call i64 @iscntrl(i32 179)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 900, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void marker2() {}


x86 assembly (clang, -O0):
<marker2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<marker2>:
ret

LLVM IR (-O0):
define void @marker2() {
ret void
}

LLVM IR (-O2):
define void @marker2() {
ret void
}
int _capture_pos(int w, int x, int y) {
  int pos = 0;
  pos = y * (w + 1) + x;
  return pos;
}


x86 assembly (clang, -O0):
<_capture_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_capture_pos>:
lea    0x1(%rdi),%eax
imul   %edx,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @_capture_pos(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = add nsw i32 %9, 1
%11 = mul nsw i32 %8, %10
%12 = load i32, i32* %5
%13 = add nsw i32 %11, %12
store i32 %13, i32* %7
%14 = load i32, i32* %7
ret i32 %14
}

LLVM IR (-O2):
define i32 @_capture_pos(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %0, 1
%5 = mul nsw i32 %4, %2
%6 = add nsw i32 %5, %1
ret i32 %6
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ gpioIntClear(int, int);
scalar_t__ gpioIntStatus(int, int);
void PIOINT3_IRQHandler(void) {
  uint32_t regVal;
  regVal = gpioIntStatus(3, 1);
  if (regVal) {
    gpioIntClear(3, 1);
  }
  return;
}


x86 assembly (clang, -O0):
<PIOINT3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
mov    $0x1,%esi
call   1040 <gpioIntStatus@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1155 <PIOINT3_IRQHandler+0x35>
mov    $0x3,%edi
mov    $0x1,%esi
call   1030 <gpioIntClear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIOINT3_IRQHandler>:
push   %rax
mov    $0x3,%edi
mov    $0x1,%esi
call   1040 <gpioIntStatus@plt>
test   %rax,%rax
je     1145 <PIOINT3_IRQHandler+0x25>
mov    $0x3,%edi
mov    $0x1,%esi
pop    %rax
jmp    1030 <gpioIntClear@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @PIOINT3_IRQHandler() {
%1 = alloca i64
%2 = call i64 @gpioIntStatus(i32 3, i32 1)
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @gpioIntClear(i32 3, i32 1)
br label %7
7: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
define void @PIOINT3_IRQHandler() {
%1 = tail call i64 @gpioIntStatus(i32 3, i32 1)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @gpioIntClear(i32 3, i32 1)
br label %5
5: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xed() {
  Assert_real((islower(237) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1190, ("islower should be 0 for 0xed"));
}


x86 assembly (clang, -O0):
<t_islower_0xed>:
push   %rbp
mov    %rsp,%rbp
mov    $0xed,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4a6,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xed>:
push   %rax
mov    $0xed,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4a6,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xed\00"
define void @t_islower_0xed() {
%1 = call i64 @islower(i32 237)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1190, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xed\00"
define void @t_islower_0xed() {
%1 = tail call i64 @islower(i32 237)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1190, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
double exp(double);
double tanh(double x) {
  double dexp2;
  dexp2 = exp(-2.0 * x);
  return ((1.0 - dexp2) / (1.0 + dexp2));
}


x86 assembly (clang, -O0):
<tanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xec4(%rip),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  0xeb7(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanh>:
push   %rax
mulsd  0xee7(%rip),%xmm0
call   1030 <exp@plt>
movsd  0xee2(%rip),%xmm2
movapd %xmm2,%xmm1
subsd  %xmm0,%xmm1
addsd  %xmm2,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @tanh(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double -2.000000e+00, %4
%6 = call double @exp(double %5)
store double %6, double* %3
%7 = load double, double* %3
%8 = fsub double 1.000000e+00, %7
%9 = load double, double* %3
%10 = fadd double 1.000000e+00, %9
%11 = fdiv double %8, %10
ret double %11
}

LLVM IR (-O2):
define double @tanh(double %0) {
%2 = fmul double %0, -2.000000e+00
%3 = tail call double @exp(double %2)
%4 = fsub double 1.000000e+00, %3
%5 = fadd double %3, 1.000000e+00
%6 = fdiv double %4, %5
ret double %6
}
int little_endian(void) {
  unsigned long *wp;
  unsigned char str[4] = {'A', 'B', 'C', 'D'};
  wp = (unsigned long *)str;
  if (str[0] == (unsigned char)(*wp & 0xFF)) {
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<little_endian>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%eax
mov    %eax,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
movzbl -0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%rcx
and    $0xff,%rcx
movzbl %cl,%ecx
cmp    %ecx,%eax
jne    113e <little_endian+0x3e>
movl   $0x1,-0x4(%rbp)
jmp    1145 <little_endian+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@__const.little_endian.str = [4 x i8] c"ABCD"
define i32 @little_endian() {
%1 = alloca i32
%2 = alloca i64*
%3 = alloca [4 x i8]
%4 = bitcast [4 x i8]* %3 to i8*
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%6 = bitcast i8* %5 to i64*
store i64* %6, i64** %2
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = load i64*, i64** %2
%11 = load i64, i64* %10
%12 = and i64 %11, 255
%13 = trunc i64 %12 to i8
%14 = zext i8 %13 to i32
%15 = icmp eq i32 %9, %14
br i1 %15, label %16, label %17
16: ; preds = %0
store i32 1, i32* %1
br label %18
17: ; preds = %0
store i32 0, i32* %1
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %1
ret i32 %19
}

LLVM IR (-O2):
define i32 @little_endian() {
ret i32 1
}
int multi(char a, short b, int c, double d) {
  a = 'x';
  b = 15236;
  c = 12345678;
  d = 3.14159;
  return c;
}


x86 assembly (clang, -O0):
<multi>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movb   $0x78,-0x1(%rbp)
movw   $0x3b84,-0x4(%rbp)
movl   $0xbc614e,-0x8(%rbp)
movsd  0xece(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multi>:
mov    $0xbc614e,%eax
ret

LLVM IR (-O0):
define i32 @multi(i8 signext %0, i16 signext %1, i32 %2, double %3) {
%5 = alloca i8
%6 = alloca i16
%7 = alloca i32
%8 = alloca double
store i8 %0, i8* %5
store i16 %1, i16* %6
store i32 %2, i32* %7
store double %3, double* %8
store i8 120, i8* %5
store i16 15236, i16* %6
store i32 12345678, i32* %7
store double 3.141590e+00, double* %8
%9 = load i32, i32* %7
ret i32 %9
}

LLVM IR (-O2):
define i32 @multi(i8 signext %0, i16 signext %1, i32 %2, double %3) {
ret i32 12345678
}
int test_imm_71uint16_reg(unsigned short val) {
  return ((val) & (0x71 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_71uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x71,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_71uint16_reg>:
test   $0x71,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_71uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 113
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_71uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 113
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct rtattr {
  int dummy;
};
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
__u8 rta_getattr_u8(const struct rtattr *rta) {
  return *(__u8 *)((
      void *)(((char *)(rta)) +
              ((((sizeof(struct rtattr)) + 4U - 1) & ~(4U - 1)) + (0))));
}


x86 assembly (clang, -O0):
<rta_getattr_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rta_getattr_u8>:
mov    0x4(%rdi),%eax
ret

LLVM IR (-O0):
%struct.rtattr = type { i32 }
define i32 @rta_getattr_u8(%struct.rtattr* %0) {
%2 = alloca %struct.rtattr*
store %struct.rtattr* %0, %struct.rtattr** %2
%3 = load %struct.rtattr*, %struct.rtattr** %2
%4 = bitcast %struct.rtattr* %3 to i8*
%5 = getelementptr inbounds i8, i8* %4, i64 4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.rtattr = type { i32 }
define i32 @rta_getattr_u8(%struct.rtattr* nocapture %0) {
%2 = getelementptr inbounds %struct.rtattr, %struct.rtattr* %0, i64 1, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int filterAdultWeight_value(int AdultWeight, int noadultpages) {
  if (noadultpages > 10) {
    if (AdultWeight >= 50) {
      printf("filterAdultWeight_value: filtered %i\n", AdultWeight);
      return 1;
    } else {
      return 0;
    }
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<filterAdultWeight_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jle    1159 <filterAdultWeight_value+0x49>
cmpl   $0x32,-0x8(%rbp)
jl     114d <filterAdultWeight_value+0x3d>
mov    -0x8(%rbp),%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    1160 <filterAdultWeight_value+0x50>
movl   $0x0,-0x4(%rbp)
jmp    1160 <filterAdultWeight_value+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filterAdultWeight_value>:
xor    %eax,%eax
cmp    $0x32,%edi
jl     1136 <filterAdultWeight_value+0x26>
cmp    $0xb,%esi
jl     1136 <filterAdultWeight_value+0x26>
push   %rax
mov    %edi,%ecx
lea    0xeda(%rip),%rdi
mov    %ecx,%esi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [38 x i8] c"filterAdultWeight_value: filtered %i\0A\00"
define i32 @filterAdultWeight_value(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sgt i32 %6, 10
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp sge i32 %9, 50
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %4
%13 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %12)
store i32 1, i32* %3
br label %16
14: ; preds = %8
store i32 0, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [38 x i8] c"filterAdultWeight_value: filtered %i\0A\00"
define i32 @filterAdultWeight_value(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 10
%4 = icmp sgt i32 %0, 49
%5 = and i1 %4, %3
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t int64_fetch_add(int64_t *p, int64_t incr) {
  int64_t t = *p;
  *p += incr;
  return t;
}


x86 assembly (clang, -O0):
<int64_fetch_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int64_fetch_add>:
mov    (%rdi),%rax
add    %rax,%rsi
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define i64 @int64_fetch_add(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%6 = load i64*, i64** %3
%7 = load i64, i64* %6
store i64 %7, i64* %5
%8 = load i64, i64* %4
%9 = load i64*, i64** %3
%10 = load i64, i64* %9
%11 = add nsw i64 %10, %8
store i64 %11, i64* %9
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @int64_fetch_add(i64* nocapture %0, i64 %1) {
%3 = load i64, i64* %0
%4 = add nsw i64 %3, %1
store i64 %4, i64* %0
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x75() {
  Assert_real((iscntrl(117) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              590, ("iscntrl should be 0 for u"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x75>:
push   %rbp
mov    %rsp,%rbp
mov    $0x75,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x24e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x75>:
push   %rax
mov    $0x75,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x24e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for u\00"
define void @t_iscntrl_0x75() {
%1 = call i64 @iscntrl(i32 117)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 590, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for u\00"
define void @t_iscntrl_0x75() {
%1 = tail call i64 @iscntrl(i32 117)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 590, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void sort_extable(struct exception_table_entry *start,
                  struct exception_table_entry *finish) {}


x86 assembly (clang, -O0):
<sort_extable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_extable>:
ret

LLVM IR (-O0):
%struct.exception_table_entry = type opaque
define void @sort_extable(%struct.exception_table_entry* %0, %struct.exception_table_entry* %1) {
%3 = alloca %struct.exception_table_entry*
%4 = alloca %struct.exception_table_entry*
store %struct.exception_table_entry* %0, %struct.exception_table_entry** %3
store %struct.exception_table_entry* %1, %struct.exception_table_entry** %4
ret void
}

LLVM IR (-O2):
%struct.exception_table_entry = type opaque
define void @sort_extable(%struct.exception_table_entry* nocapture %0, %struct.exception_table_entry* nocapture %1) {
ret void
}
unsigned short SwapEndianWord(unsigned short Data) {
  unsigned char A, B;
  A = (unsigned char)((Data >> 8) & 0x0ff);
  B = (unsigned char)(Data & 0x0ff);
  return (unsigned short)((unsigned short)A | ((unsigned short)B << 8));
}


x86 assembly (clang, -O0):
<SwapEndianWord>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,-0x3(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
mov    %al,-0x4(%rbp)
movzbl -0x3(%rbp),%eax
movzwl %ax,%eax
movzbl -0x4(%rbp),%ecx
movzwl %cx,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwapEndianWord>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @SwapEndianWord(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
%4 = alloca i8
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = zext i16 %5 to i32
%7 = ashr i32 %6, 8
%8 = and i32 %7, 255
%9 = trunc i32 %8 to i8
store i8 %9, i8* %3
%10 = load i16, i16* %2
%11 = zext i16 %10 to i32
%12 = and i32 %11, 255
%13 = trunc i32 %12 to i8
store i8 %13, i8* %4
%14 = load i8, i8* %3
%15 = zext i8 %14 to i16
%16 = zext i16 %15 to i32
%17 = load i8, i8* %4
%18 = zext i8 %17 to i16
%19 = zext i16 %18 to i32
%20 = shl i32 %19, 8
%21 = or i32 %16, %20
%22 = trunc i32 %21 to i16
ret i16 %22
}

LLVM IR (-O2):
define zeroext i16 @SwapEndianWord(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int swap32(int);
uint32_t rb_htole32(uint32_t x) {
  uint32_t test = 0x12345678;
  unsigned char *p = (unsigned char *)&test;
  if (p[0] == 0x12) {
    return swap32(x);
  } else {
    return x;
  }
}


x86 assembly (clang, -O0):
<rb_htole32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x12345678,-0xc(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x12,%eax
jne    114a <rb_htole32+0x3a>
mov    -0x8(%rbp),%edi
call   1030 <swap32@plt>
mov    %eax,-0x4(%rbp)
jmp    1150 <rb_htole32+0x40>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_htole32>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @rb_htole32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 305419896, i32* %4
%6 = bitcast i32* %4 to i8*
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = icmp eq i32 %10, 18
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32, i32* %3
%14 = call i32 @swap32(i32 %13)
store i32 %14, i32* %2
br label %17
15: ; preds = %1
%16 = load i32, i32* %3
store i32 %16, i32* %2
br label %17
17: ; preds = %15, %12
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @rb_htole32(i32 returned %0) {
ret i32 %0
}
int head_check(unsigned long head) {
  if (((head & 0xffe00000) != 0xffe00000) || (!((head >> 17) & 3)) ||
      (((head >> 12) & 0xf) == 0xf) || (((head >> 12) & 0xf) == 0x0) ||
      (((head >> 10) & 0x3) == 0x3)) {
    return 0;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<head_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movabs $0xffe00000,%rax
and    -0x10(%rbp),%rax
mov    $0xffe00000,%ecx
cmp    %rcx,%rax
jne    117c <head_check+0x7c>
mov    -0x10(%rbp),%rax
shr    $0x11,%rax
and    $0x3,%rax
cmp    $0x0,%rax
je     117c <head_check+0x7c>
mov    -0x10(%rbp),%rax
shr    $0xc,%rax
and    $0xf,%rax
cmp    $0xf,%rax
je     117c <head_check+0x7c>
mov    -0x10(%rbp),%rax
shr    $0xc,%rax
and    $0xf,%rax
cmp    $0x0,%rax
je     117c <head_check+0x7c>
mov    -0x10(%rbp),%rax
shr    $0xa,%rax
and    $0x3,%rax
cmp    $0x3,%rax
jne    1188 <head_check+0x88>
movl   $0x0,-0x4(%rbp)
jmp    118f <head_check+0x8f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<head_check>:
mov    %edi,%ecx
not    %ecx
xor    %eax,%eax
test   $0xffe00000,%ecx
jne    112a <head_check+0x2a>
mov    %edi,%ecx
and    $0x60000,%ecx
test   %rcx,%rcx
je     112a <head_check+0x2a>
mov    %edi,%ecx
shr    $0xc,%ecx
and    $0xf,%ecx
je     112a <head_check+0x2a>
cmp    $0xf,%ecx
jne    112b <head_check+0x2b>
ret
not    %edi
xor    %eax,%eax
test   $0xc00,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @head_check(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 4292870144
%6 = icmp ne i64 %5, 4292870144
br i1 %6, label %27, label %7
7: ; preds = %1
%8 = load i64, i64* %3
%9 = lshr i64 %8, 17
%10 = and i64 %9, 3
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %27
12: ; preds = %7
%13 = load i64, i64* %3
%14 = lshr i64 %13, 12
%15 = and i64 %14, 15
%16 = icmp eq i64 %15, 15
br i1 %16, label %27, label %17
17: ; preds = %12
%18 = load i64, i64* %3
%19 = lshr i64 %18, 12
%20 = and i64 %19, 15
%21 = icmp eq i64 %20, 0
br i1 %21, label %27, label %22
22: ; preds = %17
%23 = load i64, i64* %3
%24 = lshr i64 %23, 10
%25 = and i64 %24, 3
%26 = icmp eq i64 %25, 3
br i1 %26, label %27, label %28
27: ; preds = %22, %17, %12, %7, %1
store i32 0, i32* %2
br label %29
28: ; preds = %22
store i32 1, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @head_check(i64 %0) {
%2 = and i64 %0, 4292870144
%3 = icmp ne i64 %2, 4292870144
%4 = and i64 %0, 393216
%5 = icmp eq i64 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %14, label %7
7: ; preds = %1
%8 = lshr i64 %0, 12
%9 = and i64 %8, 15
switch i64 %9, label %10 [
i64 15, label %14
i64 0, label %14
]
10: ; preds = %7
%11 = and i64 %0, 3072
%12 = icmp ne i64 %11, 3072
%13 = zext i1 %12 to i32
br label %14
14: ; preds = %10, %1, %7, %7
%15 = phi i32 [ 0, %7 ], [ 0, %7 ], [ 0, %1 ], [ %13, %10 ]
ret i32 %15
}
/* Variables and functions */
int f74(int *);
int f75(int *p) { return f74(p); }


x86 assembly (clang, -O0):
<f75>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f74@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f75>:
jmp    1030 <f74@plt>

LLVM IR (-O0):
define i32 @f75(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f74(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f75(i32* %0) {
%2 = tail call i32 @f74(i32* %0)
ret i32 %2
}
__attribute__((no, noclone)) unsigned char t109_4add(int x) {
  __int128 y = (5);
  unsigned char r;
  if (__builtin_add_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t109_4add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x5,-0x20(%rbp)
movslq -0x4(%rbp),%rdx
mov    %rdx,%rsi
sar    $0x3f,%rsi
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rdx
adc    %rax,%rsi
seto   %al
mov    %dl,%cl
and    $0xffffffffffffff00,%rdx
or     %rsi,%rdx
setne  %dl
or     %dl,%al
mov    %cl,-0x21(%rbp)
test   $0x1,%al
jne    1168 <t109_4add+0x58>
jmp    116f <t109_4add+0x5f>
mov    $0x0,%al
call   1030 <bar@plt>
movzbl -0x21(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t109_4add>:
push   %rbx
movslq %edi,%rbx
mov    %rbx,%rax
sar    $0x3f,%rax
add    $0x5,%rbx
adc    $0x0,%rax
cmp    $0x100,%rbx
sbb    $0x0,%rax
jb     1137 <t109_4add+0x27>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @t109_4add(i32 %0) {
%2 = alloca i32
%3 = alloca i128
%4 = alloca i8
store i32 %0, i32* %2
store i128 5, i128* %3
%5 = load i32, i32* %2
%6 = load i128, i128* %3
%7 = sext i32 %5 to i128
%8 = call { i128, i1 } @llvm.sadd.with.overflow.i128(i128 %7, i128 %6)
%9 = extractvalue { i128, i1 } %8, 1
%10 = extractvalue { i128, i1 } %8, 0
%11 = trunc i128 %10 to i8
%12 = zext i8 %11 to i128
%13 = icmp ne i128 %10, %12
%14 = or i1 %9, %13
store i8 %11, i8* %4
br i1 %14, label %15, label %17
15: ; preds = %1
%16 = call i32 (...) @bar()
br label %17
17: ; preds = %15, %1
%18 = load i8, i8* %4
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @t109_4add(i32 %0) {
%2 = sext i32 %0 to i128
%3 = add nsw i128 %2, 5
%4 = icmp ugt i128 %3, 255
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (...) @bar()
br label %7
7: ; preds = %5, %1
%8 = trunc i128 %3 to i8
ret i8 %8
}
/* Type definitions */
struct notifier_block {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ zf_timer_off();
int zf_notify_sys(struct notifier_block *this, unsigned long code,
                  void *unused) {
  {
    if (code == 1UL) {
      zf_timer_off();
    } else if (code == 2UL) {
      zf_timer_off();
    }
    return (0);
  }
}


x86 assembly (clang, -O0):
<zf_notify_sys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x1,-0x10(%rbp)
jne    113b <zf_notify_sys+0x2b>
mov    $0x0,%al
call   1030 <zf_timer_off@plt>
jmp    1152 <zf_notify_sys+0x42>
cmpq   $0x2,-0x10(%rbp)
jne    114d <zf_notify_sys+0x3d>
mov    $0x0,%al
call   1030 <zf_timer_off@plt>
jmp    1152 <zf_notify_sys+0x42>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zf_notify_sys>:
add    $0xffffffffffffffff,%rsi
cmp    $0x1,%rsi
ja     1126 <zf_notify_sys+0x16>
push   %rax
xor    %eax,%eax
call   1030 <zf_timer_off@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.notifier_block = type { i32 }
define i32 @zf_notify_sys(%struct.notifier_block* %0, i64 %1, i8* %2) {
%4 = alloca %struct.notifier_block*
%5 = alloca i64
%6 = alloca i8*
store %struct.notifier_block* %0, %struct.notifier_block** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i64, i64* %5
%8 = icmp eq i64 %7, 1
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 (...) @zf_timer_off()
br label %17
11: ; preds = %3
%12 = load i64, i64* %5
%13 = icmp eq i64 %12, 2
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = call i32 (...) @zf_timer_off()
br label %16
16: ; preds = %14, %11
br label %17
17: ; preds = %16, %9
ret i32 0
}

LLVM IR (-O2):
%struct.notifier_block = type { i32 }
define i32 @zf_notify_sys(%struct.notifier_block* nocapture readnone %0, i64 %1, i8* nocapture readnone %2) {
%4 = add i64 %1, -1
%5 = icmp ult i64 %4, 2
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @zf_timer_off()
br label %8
8: ; preds = %3, %6
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ B();
int /*<<< orphan*/ printf(char *);
int A(void) {
  printf("enter A\n");
  B();
  printf("exit A\n");
}


x86 assembly (clang, -O0):
<A>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <B@plt>
lea    0xec7(%rip),%rdi
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<A>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <B@plt>
lea    0xecd(%rip),%rdi
pop    %rax
jmp    1040 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"enter A\0A\00"
@.str.1 = [8 x i8] c"exit A\0A\00"
define i32 @A() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @B()
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@str = [8 x i8] c"enter A\00"
@str.2 = [7 x i8] c"exit A\00"
define i32 @A() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @B()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str.2, i64 0, i64 0))
ret i32 undef
}
short distanceSquared(short x1, short y1, short x2, short y2) {
  return (x1 - x2) * (x1 - x2) + (y1 - y2) * (y1 - y2);
}


x86 assembly (clang, -O0):
<distanceSquared>:
push   %rbp
mov    %rsp,%rbp
mov    %cx,%ax
mov    %dx,%cx
mov    %si,%dx
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %dx,-0x4(%rbp)
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x6(%rbp),%ecx
sub    %ecx,%eax
movswl -0x2(%rbp),%ecx
movswl -0x6(%rbp),%edx
sub    %edx,%ecx
imul   %ecx,%eax
movswl -0x4(%rbp),%ecx
movswl -0x8(%rbp),%edx
sub    %edx,%ecx
movswl -0x4(%rbp),%edx
movswl -0x8(%rbp),%esi
sub    %esi,%edx
imul   %edx,%ecx
add    %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<distanceSquared>:
movzwl %di,%edi
movzwl %dx,%eax
sub    %eax,%edi
imul   %edi,%edi
movzwl %si,%eax
movzwl %cx,%ecx
sub    %ecx,%eax
imul   %eax,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @distanceSquared(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3) {
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
store i16 %0, i16* %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%9 = load i16, i16* %5
%10 = sext i16 %9 to i32
%11 = load i16, i16* %7
%12 = sext i16 %11 to i32
%13 = sub nsw i32 %10, %12
%14 = load i16, i16* %5
%15 = sext i16 %14 to i32
%16 = load i16, i16* %7
%17 = sext i16 %16 to i32
%18 = sub nsw i32 %15, %17
%19 = mul nsw i32 %13, %18
%20 = load i16, i16* %6
%21 = sext i16 %20 to i32
%22 = load i16, i16* %8
%23 = sext i16 %22 to i32
%24 = sub nsw i32 %21, %23
%25 = load i16, i16* %6
%26 = sext i16 %25 to i32
%27 = load i16, i16* %8
%28 = sext i16 %27 to i32
%29 = sub nsw i32 %26, %28
%30 = mul nsw i32 %24, %29
%31 = add nsw i32 %19, %30
%32 = trunc i32 %31 to i16
ret i16 %32
}

LLVM IR (-O2):
define signext i16 @distanceSquared(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3) {
%5 = zext i16 %0 to i32
%6 = zext i16 %2 to i32
%7 = sub nsw i32 %5, %6
%8 = mul i32 %7, %7
%9 = zext i16 %1 to i32
%10 = zext i16 %3 to i32
%11 = sub nsw i32 %9, %10
%12 = mul i32 %11, %11
%13 = add i32 %12, %8
%14 = trunc i32 %13 to i16
ret i16 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p384_opp(uintptr_t, uintptr_t);
void fiat_p384_opp(uint32_t out1[12], const uint32_t arg1[12]) {
  internal_fiat_p384_opp((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p384_opp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_p384_opp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p384_opp>:
jmp    1030 <internal_fiat_p384_opp@plt>

LLVM IR (-O0):
define void @fiat_p384_opp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_p384_opp(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_p384_opp(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_p384_opp(i64 %3, i64 %4)
ret void
}
/* Variables and functions */
int eImpar(int);
bool ePar(int numero) {
  if (numero == 0)
    return true;
  else
    return eImpar(numero - 1);
}


x86 assembly (clang, -O0):
<ePar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <ePar+0x21>
movl   $0x1,-0x4(%rbp)
jmp    113f <ePar+0x2f>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <eImpar@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ePar>:
test   %edi,%edi
je     111c <ePar+0xc>
add    $0xffffffff,%edi
jmp    1030 <eImpar@plt>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ePar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @eImpar(i32 %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %7, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ePar(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @eImpar(i32 %4)
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ 1, %1 ]
ret i32 %7
}
const char *fmt_to_text(int fmt) {
  switch (fmt) {
  case 1:
    return "JPEG";
  case 2:
    return "PNG";
  case 3:
    return "PPM";
  default:
    return "?";
  }
}


x86 assembly (clang, -O0):
<fmt_to_text>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x1,%eax
je     113d <fmt_to_text+0x3d>
jmp    111b <fmt_to_text+0x1b>
mov    -0x10(%rbp),%eax
sub    $0x2,%eax
je     114d <fmt_to_text+0x4d>
jmp    112c <fmt_to_text+0x2c>
mov    -0x10(%rbp),%eax
sub    $0x3,%eax
je     115d <fmt_to_text+0x5d>
jmp    116d <fmt_to_text+0x6d>
lea    0xebc(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1178 <fmt_to_text+0x78>
lea    0xeb1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1178 <fmt_to_text+0x78>
lea    0xea5(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1178 <fmt_to_text+0x78>
lea    0xe99(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_to_text>:
add    $0xffffffff,%edi
cmp    $0x2,%edi
ja     111a <fmt_to_text+0x1a>
movslq %edi,%rax
lea    0xefe(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
lea    0xeec(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"JPEG\00"
@.str.1 = [4 x i8] c"PNG\00"
@.str.2 = [4 x i8] c"PPM\00"
@.str.3 = [2 x i8] c"?\00"
define i8* @fmt_to_text(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
]
5: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %9
6: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %9
7: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %9
8: ; preds = %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@.str = [5 x i8] c"JPEG\00"
@.str.1 = [4 x i8] c"PNG\00"
@.str.2 = [4 x i8] c"PPM\00"
@.str.3 = [2 x i8] c"?\00"
@reltable.fmt_to_text = [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str to i64), i64 ptrtoint ([3 x i32]* @reltable.fmt_to_text to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([4 x i8]* @.str.1 to i64), i64 ptrtoint ([3 x i32]* @reltable.fmt_to_text to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([4 x i8]* @.str.2 to i64), i64 ptrtoint ([3 x i32]* @reltable.fmt_to_text to i64)) to i32)]
define i8* @fmt_to_text(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = shl i64 %5, 2
%7 = call i8* @llvm.load.relative.i64(i8* bitcast ([3 x i32]* @reltable.fmt_to_text to i8*), i64 %6)
br label %8
8: ; preds = %1, %4
%9 = phi i8* [ %7, %4 ], [ getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), %1 ]
ret i8* %9
}
void vga_switcheroo_fini_domain_pm_ops(struct device *dev) {}


x86 assembly (clang, -O0):
<vga_switcheroo_fini_domain_pm_ops>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_switcheroo_fini_domain_pm_ops>:
ret

LLVM IR (-O0):
%struct.device = type opaque
define void @vga_switcheroo_fini_domain_pm_ops(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret void
}

LLVM IR (-O2):
%struct.device = type opaque
define void @vga_switcheroo_fini_domain_pm_ops(%struct.device* nocapture %0) {
ret void
}
void test_no_clause() {
  int i;
#pragma omp target teams distribute parallel for simd
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target teams distribute parallel for simd
  ++i;
}


x86 assembly (clang, -O0):
<test_no_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_no_clause+0x28>
jmp    111a <test_no_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_no_clause+0xb>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_no_clause>:
ret

LLVM IR (-O0):
define void @test_no_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
ret void
}

LLVM IR (-O2):
define void @test_no_clause() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ drawMap(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
void drawMapAll() { drawMap(0, 0, 48, 48); }


x86 assembly (clang, -O0):
<drawMapAll>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    $0x30,%ecx
mov    %esi,%edi
mov    %ecx,%edx
call   1030 <drawMap@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawMapAll>:
xor    %edi,%edi
xor    %esi,%esi
mov    $0x30,%edx
mov    $0x30,%ecx
jmp    1030 <drawMap@plt>

LLVM IR (-O0):
define void @drawMapAll() {
%1 = call i32 @drawMap(i32 0, i32 0, i32 48, i32 48)
ret void
}

LLVM IR (-O2):
define void @drawMapAll() {
%1 = tail call i32 @drawMap(i32 0, i32 0, i32 48, i32 48)
ret void
}
void RTReqQueueAlloc(void) {}


x86 assembly (clang, -O0):
<RTReqQueueAlloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTReqQueueAlloc>:
ret

LLVM IR (-O0):
define void @RTReqQueueAlloc() {
ret void
}

LLVM IR (-O2):
define void @RTReqQueueAlloc() {
ret void
}