#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef scalar_t__ ulBase;

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int PWMGenValid(unsigned long);
void PWMGenIntTrigEnable(unsigned long ulBase, unsigned long ulGen,
                         unsigned long ulIntTrig) {
  DEBUG_ASSERT((ulBase == 0x40028000) || (ulBase == 0x40029000));
  DEBUG_ASSERT(PWMGenValid(ulGen));
  DEBUG_ASSERT(
      (ulIntTrig & ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008 |
                     0x00000010 | 0x00000020 | 0x00000100 | 0x00000200 |
                     0x00000400 | 0x00000800 | 0x00001000 | 0x00002000)) == 0);
  (*((volatile unsigned long *)(((ulBase) + (ulGen)) + 0x00000004))) |=
      ulIntTrig;
}


x86 assembly (clang, -O0):
<PWMGenIntTrigEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%al
cmpq   $0x40028000,-0x8(%rbp)
40
mov    %al,-0x19(%rbp)
je     1155 <PWMGenIntTrigEnable+0x35>
cmpq   $0x40029000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdi
call   1040 <PWMGenValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x18(%rbp),%rax
and    $0xffffffffffffc0c0,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    0x4(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x4(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntTrigEnable>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40028000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    %r15,%rdi
call   1040 <PWMGenValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
test   $0xffffffffffffc0c0,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
or     %r14,0x4(%rbx,%r15,1)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @PWMGenIntTrigEnable(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 1073905664
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i64, i64* %4
%11 = icmp eq i64 %10, 1073909760
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ true, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @DEBUG_ASSERT(i32 %14)
%16 = load i64, i64* %5
%17 = call i32 @PWMGenValid(i64 %16)
%18 = call i32 @DEBUG_ASSERT(i32 %17)
%19 = load i64, i64* %6
%20 = and i64 %19, -16192
%21 = icmp eq i64 %20, 0
%22 = zext i1 %21 to i32
%23 = call i32 @DEBUG_ASSERT(i32 %22)
%24 = load i64, i64* %6
%25 = load i64, i64* %4
%26 = load i64, i64* %5
%27 = add i64 %25, %26
%28 = add i64 %27, 4
%29 = inttoptr i64 %28 to i64*
%30 = load volatile i64, i64* %29
%31 = or i64 %30, %24
store volatile i64 %31, i64* %29
ret void
}

LLVM IR (-O2):
define void @PWMGenIntTrigEnable(i64 %0, i64 %1, i64 %2) {
%4 = and i64 %0, -4097
%5 = icmp eq i64 %4, 1073905664
%6 = zext i1 %5 to i32
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = tail call i32 @PWMGenValid(i64 %1)
%9 = tail call i32 @DEBUG_ASSERT(i32 %8)
%10 = and i64 %2, -16192
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
%13 = tail call i32 @DEBUG_ASSERT(i32 %12)
%14 = add i64 %0, 4
%15 = add i64 %14, %1
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
%18 = or i64 %17, %2
store volatile i64 %18, i64* %16
ret void
}