xunge/DecIR huggingface dataset:
int EsNumero(char caracter2[]) {
  if (caracter2 >= '0' && caracter2 <= '9') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<EsNumero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    $0x30,%eax
cmp    %rax,-0x10(%rbp)
jb     1132 <EsNumero+0x32>
mov    $0x39,%eax
cmp    %rax,-0x10(%rbp)
ja     1132 <EsNumero+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1139 <EsNumero+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EsNumero>:
cmp    $0x30,%rdi
setae  %al
cmp    $0x3a,%rdi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @EsNumero(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp uge i8* %4, inttoptr (i64 48 to i8*)
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = icmp ule i8* %7, inttoptr (i64 57 to i8*)
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @EsNumero(i8* readnone %0) {
%2 = icmp uge i8* %0, inttoptr (i64 48 to i8*)
%3 = icmp ule i8* %0, inttoptr (i64 57 to i8*)
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
void RTAvlrUIntPtrDestroy(void) {}


x86 assembly (clang, -O0):
<RTAvlrUIntPtrDestroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlrUIntPtrDestroy>:
ret

LLVM IR (-O0):
define void @RTAvlrUIntPtrDestroy() {
ret void
}

LLVM IR (-O2):
define void @RTAvlrUIntPtrDestroy() {
ret void
}
/* Variables and functions */
int renameat(int, char const *, int, char const *);
__attribute__((__weak__, __always___)) int
softboundcets_renameat(int olddirfd, const char *oldpath, int newdirfd,
                       const char *newpath) {
  return renameat(olddirfd, oldpath, newdirfd, newpath);
}


x86 assembly (clang, -O0):
<softboundcets_renameat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1030 <renameat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_renameat>:
jmp    1030 <renameat@plt>

LLVM IR (-O0):
define weak i32 @softboundcets_renameat(i32 %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %8
%13 = call i32 @renameat(i32 %9, i8* %10, i32 %11, i8* %12)
ret i32 %13
}

LLVM IR (-O2):
define weak i32 @softboundcets_renameat(i32 %0, i8* %1, i32 %2, i8* %3) {
%5 = tail call i32 @renameat(i32 %0, i8* %1, i32 %2, i8* %3)
ret i32 %5
}
const int omp_get_max_threads() { return 1; }


x86 assembly (clang, -O0):
<omp_get_max_threads>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omp_get_max_threads>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @omp_get_max_threads() {
ret i32 1
}

LLVM IR (-O2):
define i32 @omp_get_max_threads() {
ret i32 1
}
unsigned short int cast_uint_ushort(unsigned int x) {
  return (unsigned short int)x;
}


x86 assembly (clang, -O0):
<cast_uint_ushort>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_uint_ushort>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @cast_uint_ushort(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @cast_uint_ushort(i32 %0) {
%2 = trunc i32 %0 to i16
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void par(void) { printf("par\n"); }


x86 assembly (clang, -O0):
<par>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<par>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"par\0A\00"
define void @par() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"par\00"
define void @par() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
void Kentec320x240x16_SSD2119Flush(void *pvDisplayData) {}


x86 assembly (clang, -O0):
<Kentec320x240x16_SSD2119Flush>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kentec320x240x16_SSD2119Flush>:
ret

LLVM IR (-O0):
define void @Kentec320x240x16_SSD2119Flush(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @Kentec320x240x16_SSD2119Flush(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_context_process();
unsigned long nondet_ulong();
unsigned long copy_to_user(void *to, void const *from, unsigned long n) {
  unsigned long tmp;
  {
    assert_context_process();
    tmp = nondet_ulong();
    return (tmp);
  }
}


x86 assembly (clang, -O0):
<copy_to_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <assert_context_process@plt>
mov    $0x0,%al
call   1040 <nondet_ulong@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_to_user>:
push   %rax
xor    %eax,%eax
call   1030 <assert_context_process@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <nondet_ulong@plt>

LLVM IR (-O0):
define i64 @copy_to_user(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = call i32 (...) @assert_context_process()
%9 = call i64 (...) @nondet_ulong()
store i64 %9, i64* %7
%10 = load i64, i64* %7
ret i64 %10
}

LLVM IR (-O2):
define i64 @copy_to_user(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2) {
%4 = tail call i32 (...) @assert_context_process()
%5 = tail call i64 (...) @nondet_ulong()
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void func_2(void) { printf("func_2\n"); }


x86 assembly (clang, -O0):
<func_2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"func_2\0A\00"
define void @func_2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"func_2\00"
define void @func_2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
__attribute__((always_)) int is_dt_block(uint32_t op) {
  return !((op & 0x0E000000) ^ 0x08000000);
}


x86 assembly (clang, -O0):
<is_dt_block>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xe000000,%eax
xor    $0x8000000,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dt_block>:
and    $0xe000000,%edi
xor    %eax,%eax
cmp    $0x8000000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_dt_block(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 234881024
%5 = xor i32 %4, 134217728
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_dt_block(i32 %0) {
%2 = and i32 %0, 234881024
%3 = icmp eq i32 %2, 134217728
%4 = zext i1 %3 to i32
ret i32 %4
}
void __hv_load_f(float *bIn, float *bOut) { *bOut = *bIn; }


x86 assembly (clang, -O0):
<__hv_load_f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hv_load_f>:
movss  (%rdi),%xmm0
movss  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @__hv_load_f(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = load float*, float** %4
store float %6, float* %7
ret void
}

LLVM IR (-O2):
define void @__hv_load_f(float* nocapture %0, float* nocapture writeonly %1) {
%3 = load float, float* %0
store float %3, float* %1
ret void
}
int main() {
  int ascending();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void _M2_bounce_finish(__attribute__((unused)) int argc,
                       __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_bounce_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_bounce_finish>:
ret

LLVM IR (-O0):
define void @_M2_bounce_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_bounce_finish(i32 %0, i8** nocapture %1) {
ret void
}
void sk_set_ip(union sockunion *sk, char *ip) {}


x86 assembly (clang, -O0):
<sk_set_ip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_set_ip>:
ret

LLVM IR (-O0):
%union.sockunion = type opaque
define void @sk_set_ip(%union.sockunion* %0, i8* %1) {
%3 = alloca %union.sockunion*
%4 = alloca i8*
store %union.sockunion* %0, %union.sockunion** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%union.sockunion = type opaque
define void @sk_set_ip(%union.sockunion* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
scalar_t__ lseek(int, int /*<<< orphan*/, int /*<<< orphan*/);
int read(int, char *, int);
long blkdev_valid_offset(int fd, off_t offset) {
  char ch;
  if (lseek(fd, offset, 0) < 0)
    return 0;
  if (read(fd, &ch, 1) < 1)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<blkdev_valid_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
xor    %edx,%edx
call   1030 <lseek@plt>
cmp    $0x0,%rax
jge    1152 <blkdev_valid_offset+0x32>
movq   $0x0,-0x8(%rbp)
jmp    1181 <blkdev_valid_offset+0x61>
mov    -0xc(%rbp),%edi
lea    -0x11(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
cmp    $0x1,%eax
jge    1179 <blkdev_valid_offset+0x59>
movq   $0x0,-0x8(%rbp)
jmp    1181 <blkdev_valid_offset+0x61>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blkdev_valid_offset>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
xor    %ebx,%ebx
xor    %edx,%edx
call   1030 <lseek@plt>
test   %rax,%rax
js     114b <blkdev_valid_offset+0x2b>
lea    0x7(%rsp),%rsi
mov    %ebp,%edi
mov    $0x1,%edx
call   1040 <read@plt>
xor    %ebx,%ebx
test   %eax,%eax
setg   %bl
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i64 @blkdev_valid_offset(i32 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i64 @lseek(i32 %7, i32 %8, i32 0)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i64 0, i64* %3
br label %18
12: ; preds = %2
%13 = load i32, i32* %4
%14 = call i32 @read(i32 %13, i8* %6, i32 1)
%15 = icmp slt i32 %14, 1
br i1 %15, label %16, label %17
16: ; preds = %12
store i64 0, i64* %3
br label %18
17: ; preds = %12
store i64 1, i64* %3
br label %18
18: ; preds = %17, %16, %11
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @blkdev_valid_offset(i32 %0, i32 %1) {
%3 = alloca i8
%4 = tail call i64 @lseek(i32 %0, i32 %1, i32 0)
%5 = icmp slt i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = call i32 @read(i32 %0, i8* %3, i32 1)
%8 = icmp sgt i32 %7, 0
%9 = zext i1 %8 to i64
br label %10
10: ; preds = %6, %2
%11 = phi i64 [ 0, %2 ], [ %9, %6 ]
ret i64 %11
}
int test_imm_84int8_reg(signed char val) {
  return ((val) & (0x84 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_84int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x84,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_84int8_reg>:
test   $0x84,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_84int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 132
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_84int8_reg(i8 signext %0) {
%2 = and i8 %0, -124
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
const char *Net_HttpServerUrl(void) { return ""; }


x86 assembly (clang, -O0):
<Net_HttpServerUrl>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Net_HttpServerUrl>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @Net_HttpServerUrl() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @Net_HttpServerUrl() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *progname) {
  fprintf(stderr, "%s by elektron and thebombzen\n", progname);
  fprintf(stderr, "    %s [--help] file1 [fileN...]\n\n", progname);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed6(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ec2(%rip),%r14
mov    (%r14),%edi
lea    0xed8(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xee5(%rip),%rsi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"%s by elektron and thebombzen\0A\00"
@.str.1 = [35 x i8] c" %s [--help] file1 [fileN...]\0A\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stderr
%7 = load i8*, i8** %2
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"%s by elektron and thebombzen\0A\00"
@.str.1 = [35 x i8] c" %s [--help] file1 [fileN...]\0A\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void signalHandler2(int signum) {
  printf("2222 Capture signal number:%d\n", signum);
}


x86 assembly (clang, -O0):
<signalHandler2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signalHandler2>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"2222 Capture signal number:%d\0A\00"
define void @signalHandler2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"2222 Capture signal number:%d\0A\00"
define void @signalHandler2(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ release_pop(void *, int);
void release(void *r) { release_pop(r, 1); }


x86 assembly (clang, -O0):
<release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <release_pop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<release>:
mov    $0x1,%esi
jmp    1030 <release_pop@plt>

LLVM IR (-O0):
define void @release(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @release_pop(i8* %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @release(i8* %0) {
%2 = tail call i32 @release_pop(i8* %0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void whoAreYou(char identity[]) {
  strcpy(identity, "Sepehr Sameni - 810192392");
}


x86 assembly (clang, -O0):
<whoAreYou>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<whoAreYou>:
lea    0xee9(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Sepehr Sameni - 810192392\00"
define void @whoAreYou(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Sepehr Sameni - 810192392\00"
define void @whoAreYou(i8* %0) {
%2 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rot32r6(uint32_t x) { return (x >> 6) | (x << 26); }


x86 assembly (clang, -O0):
<rot32r6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x6,%eax
mov    -0x4(%rbp),%ecx
shl    $0x1a,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot32r6>:
mov    %edi,%eax
sar    $0x6,%eax
shl    $0x1a,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rot32r6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 6
%5 = load i32, i32* %2
%6 = shl i32 %5, 26
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @rot32r6(i32 %0) {
%2 = ashr i32 %0, 6
%3 = shl i32 %0, 26
%4 = or i32 %2, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ CX4_immediate_reg(int /*<<< orphan*/);
int /*<<< orphan*/ CX4_str(int /*<<< orphan*/, int);
void CX4_op5c(void) {
  CX4_str(0, 0x000000);
  CX4_immediate_reg(0);
}


x86 assembly (clang, -O0):
<CX4_op5c>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1040 <CX4_str@plt>
xor    %edi,%edi
call   1030 <CX4_immediate_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CX4_op5c>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <CX4_str@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <CX4_immediate_reg@plt>

LLVM IR (-O0):
define void @CX4_op5c() {
%1 = call i32 @CX4_str(i32 0, i32 0)
%2 = call i32 @CX4_immediate_reg(i32 0)
ret void
}

LLVM IR (-O2):
define void @CX4_op5c() {
%1 = tail call i32 @CX4_str(i32 0, i32 0)
%2 = tail call i32 @CX4_immediate_reg(i32 0)
ret void
}
/* Variables and functions */
int syscall(int, int);
int fchdir(int fd) { return syscall(133, fd); }


x86 assembly (clang, -O0):
<fchdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x85,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchdir>:
mov    %edi,%esi
mov    $0x85,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @fchdir(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @syscall(i32 133, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fchdir(i32 %0) {
%2 = tail call i32 @syscall(i32 133, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ sg_print_scsi_status(int);
void sg_print_status(int masked_status) {
  int scsi_status = (masked_status << 1) & 0x7e;
  sg_print_scsi_status(scsi_status);
}


x86 assembly (clang, -O0):
<sg_print_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
and    $0x7e,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sg_print_scsi_status@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_print_status>:
add    %edi,%edi
and    $0x7e,%edi
jmp    1030 <sg_print_scsi_status@plt>

LLVM IR (-O0):
define void @sg_print_status(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = shl i32 %4, 1
%6 = and i32 %5, 126
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @sg_print_scsi_status(i32 %7)
ret void
}

LLVM IR (-O2):
define void @sg_print_status(i32 %0) {
%2 = shl i32 %0, 1
%3 = and i32 %2, 126
%4 = tail call i32 @sg_print_scsi_status(i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ isNumericOk(char *, int, int);
int /*<<< orphan*/ setConfigTextValue(char *, char *);
int updateMonitorInterval(char *value) {
  if (isNumericOk(value, 1000, 30000)) {
    setConfigTextValue("web.monitor_interval", value);
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<updateMonitorInterval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x3e8,%esi
mov    $0x7530,%edx
call   1040 <isNumericOk@plt>
cmp    $0x0,%rax
je     1165 <updateMonitorInterval+0x45>
mov    -0x10(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1030 <setConfigTextValue@plt>
movl   $0x1,-0x4(%rbp)
jmp    116c <updateMonitorInterval+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateMonitorInterval>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3e8,%esi
mov    $0x7530,%edx
call   1040 <isNumericOk@plt>
test   %rax,%rax
je     114e <updateMonitorInterval+0x2e>
lea    0xec1(%rip),%rdi
mov    %rbx,%rsi
call   1030 <setConfigTextValue@plt>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"web.monitor_interval\00"
define i32 @updateMonitorInterval(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @isNumericOk(i8* %4, i32 1000, i32 30000)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @setConfigTextValue(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %8)
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [21 x i8] c"web.monitor_interval\00"
define i32 @updateMonitorInterval(i8* %0) {
%2 = tail call i64 @isNumericOk(i8* %0, i32 1000, i32 30000)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @setConfigTextValue(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ cat1();
int /*<<< orphan*/ rot32_sem();
void rot65_sem() {
  rot32_sem();
  cat1();
}


x86 assembly (clang, -O0):
<rot65_sem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <rot32_sem@plt>
mov    $0x0,%al
call   1030 <cat1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot65_sem>:
push   %rax
xor    %eax,%eax
call   1040 <rot32_sem@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <cat1@plt>

LLVM IR (-O0):
define void @rot65_sem() {
%1 = call i32 (...) @rot32_sem()
%2 = call i32 (...) @cat1()
ret void
}

LLVM IR (-O2):
define void @rot65_sem() {
%1 = tail call i32 (...) @rot32_sem()
%2 = tail call i32 (...) @cat1()
ret void
}
/* Type definitions */
struct nlattr {
  int dummy;
};
struct msg_buff {
  int dummy;
};

/* Variables and functions */
struct nlattr *__nla_reserve(struct msg_buff *, int, int);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/, void const *, int);
int /*<<< orphan*/ nla_data(struct nlattr *);
void __nla_put(struct msg_buff *msg, int attrtype, int attrlen,
               const void *data) {
  struct nlattr *nla;
  nla = __nla_reserve(msg, attrtype, attrlen);
  memcpy(nla_data(nla), data, attrlen);
}


x86 assembly (clang, -O0):
<__nla_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <__nla_reserve@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <nla_data@plt>
mov    %eax,%edi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%edx
call   1050 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__nla_put>:
push   %rbp
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %edx,%ebp
call   1030 <__nla_reserve@plt>
mov    %rax,%rdi
call   1040 <nla_data@plt>
mov    %eax,%edi
mov    %rbx,%rsi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <memcpy@plt>

LLVM IR (-O0):
%struct.msg_buff = type { i32 }
%struct.nlattr = type { i32 }
define void @__nla_put(%struct.msg_buff* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.msg_buff*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca %struct.nlattr*
store %struct.msg_buff* %0, %struct.msg_buff** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load %struct.msg_buff*, %struct.msg_buff** %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = call %struct.nlattr* @__nla_reserve(%struct.msg_buff* %10, i32 %11, i32 %12)
store %struct.nlattr* %13, %struct.nlattr** %9
%14 = load %struct.nlattr*, %struct.nlattr** %9
%15 = call i32 @nla_data(%struct.nlattr* %14)
%16 = load i8*, i8** %8
%17 = load i32, i32* %7
%18 = call i32 @memcpy(i32 %15, i8* %16, i32 %17)
ret void
}

LLVM IR (-O2):
%struct.msg_buff = type { i32 }
%struct.nlattr = type { i32 }
define void @__nla_put(%struct.msg_buff* %0, i32 %1, i32 %2, i8* %3) {
%5 = tail call %struct.nlattr* @__nla_reserve(%struct.msg_buff* %0, i32 %1, i32 %2)
%6 = tail call i32 @nla_data(%struct.nlattr* %5)
%7 = tail call i32 @memcpy(i32 %6, i8* %3, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ display();
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ init();
int /*<<< orphan*/ select();
int /*<<< orphan*/ sort();
int main(void) {
  init();
  select();
  sort();
  display();
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <init@plt>
mov    $0x0,%al
call   1070 <select@plt>
mov    $0x0,%al
call   1040 <sort@plt>
mov    $0x0,%al
call   1030 <display@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <init@plt>
xor    %eax,%eax
call   1070 <select@plt>
xor    %eax,%eax
call   1040 <sort@plt>
xor    %eax,%eax
call   1030 <display@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init()
%3 = call i32 (...) @select()
%4 = call i32 (...) @sort()
%5 = call i32 (...) @display()
%6 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init()
%2 = tail call i32 (...) @select()
%3 = tail call i32 (...) @sort()
%4 = tail call i32 (...) @display()
%5 = tail call i32 (...) @getchar()
ret i32 0
}
/* Type definitions */
typedef int ulong;
typedef int uint;

/* Variables and functions */
uint mindex(ulong hash, ulong size) { return hash & (size - 1); }


x86 assembly (clang, -O0):
<mindex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mindex>:
lea    -0x1(%rsi),%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mindex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = and i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @mindex(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ CX4_immediate_reg(int);
void CX4_op78(void) { CX4_immediate_reg(39); }


x86 assembly (clang, -O0):
<CX4_op78>:
push   %rbp
mov    %rsp,%rbp
mov    $0x27,%edi
call   1030 <CX4_immediate_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CX4_op78>:
mov    $0x27,%edi
jmp    1030 <CX4_immediate_reg@plt>

LLVM IR (-O0):
define void @CX4_op78() {
%1 = call i32 @CX4_immediate_reg(i32 39)
ret void
}

LLVM IR (-O2):
define void @CX4_op78() {
%1 = tail call i32 @CX4_immediate_reg(i32 39)
ret void
}
__float128 from_uns_int_load_4(unsigned int *a) { return (__float128)a[4]; }


x86 assembly (clang, -O0):
<from_uns_int_load_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%edi
call   1120 <__floatunsitf>
add    $0x10,%rsp
pop    %rbp
ret
xchg   %ax,%ax

x86 assembly (clang, -O2):
<from_uns_int_load_4>:
push   %rax
mov    0x10(%rdi),%edi
call   1110 <__floatunsitf>
pop    %rax
ret
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define fp128 @from_uns_int_load_4(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
%6 = uitofp i32 %5 to fp128
ret fp128 %6
}

LLVM IR (-O2):
define fp128 @from_uns_int_load_4(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = uitofp i32 %3 to fp128
ret fp128 %4
}
/* Variables and functions */
float rgaussian(float, float);
float gaussian() {
  float sigma = .166666;
  float mu = .5;
  return rgaussian(sigma, mu);
}


x86 assembly (clang, -O0):
<gaussian>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xee4(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xed3(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <rgaussian@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gaussian>:
movss  0xee8(%rip),%xmm0
movss  0xee4(%rip),%xmm1
jmp    1030 <rgaussian@plt>

LLVM IR (-O0):
define float @gaussian() {
%1 = alloca float
%2 = alloca float
store float 0x3FC5554FC0000000, float* %1
store float 5.000000e-01, float* %2
%3 = load float, float* %1
%4 = load float, float* %2
%5 = call float @rgaussian(float %3, float %4)
ret float %5
}

LLVM IR (-O2):
define float @gaussian() {
%1 = tail call float @rgaussian(float 0x3FC5554FC0000000, float 5.000000e-01)
ret float %1
}
void wpa_reconnect_to_network() {}


x86 assembly (clang, -O0):
<wpa_reconnect_to_network>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_reconnect_to_network>:
ret

LLVM IR (-O0):
define void @wpa_reconnect_to_network() {
ret void
}

LLVM IR (-O2):
define void @wpa_reconnect_to_network() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ malloc(int);
int main(int argc, char *argv[]) {
  (void)malloc(10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xa,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @malloc(i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @malloc(i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ signal(int, void (*)(int));
void ignore_sig(int signum) { signal(signum, ignore_sig); }


x86 assembly (clang, -O0):
<ignore_sig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rsi
call   1030 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_sig>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <signal@plt>

LLVM IR (-O0):
define void @ignore_sig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @signal(i32 %3, void (i32)* @ignore_sig)
ret void
}

LLVM IR (-O2):
define void @ignore_sig(i32 %0) {
%2 = tail call i32 @signal(i32 %0, void (i32)* @ignore_sig)
ret void
}
int isblank(int ch) { return (ch == ' ' || ch == '\t'); }


x86 assembly (clang, -O0):
<isblank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <isblank+0x20>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isblank>:
cmp    $0x20,%edi
sete   %al
cmp    $0x9,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isblank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isblank(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = icmp eq i32 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t USBDevSpeedGet(uint32_t ui32Base) {
  ;
  if ((*((volatile uint8_t *)(ui32Base + 0x00000001))) & 0x00000010) {
    return (0x00000002);
  }
  return (0x00000001);
}


x86 assembly (clang, -O0):
<USBDevSpeedGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
cltq
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     1129 <USBDevSpeedGet+0x29>
movl   $0x2,-0x4(%rbp)
jmp    1130 <USBDevSpeedGet+0x30>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBDevSpeedGet>:
movslq %edi,%rax
mov    0x1(%rax),%eax
and    $0x10,%eax
cmp    $0x1,%eax
mov    $0x2,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @USBDevSpeedGet(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, 16
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 2, i32* %2
br label %13
12: ; preds = %1
store i32 1, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @USBDevSpeedGet(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 16
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i32 1, i32 2
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void C_ABORT() { abort(); }


x86 assembly (clang, -O0):
<C_ABORT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<C_ABORT>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @C_ABORT() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @C_ABORT() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void CopyV6IP(uint32_t *dst, uint32_t *src) {
  dst[0] = src[0];
  dst[1] = src[1];
  dst[2] = src[2];
  dst[3] = src[3];
}


x86 assembly (clang, -O0):
<CopyV6IP>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x10(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CopyV6IP>:
mov    (%rsi),%eax
mov    %eax,(%rdi)
mov    0x4(%rsi),%eax
mov    %eax,0x4(%rdi)
mov    0x8(%rsi),%eax
mov    %eax,0x8(%rdi)
mov    0xc(%rsi),%eax
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @CopyV6IP(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %12, i32* %14
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 2
%17 = load i32, i32* %16
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 2
store i32 %17, i32* %19
%20 = load i32*, i32** %4
%21 = getelementptr inbounds i32, i32* %20, i64 3
%22 = load i32, i32* %21
%23 = load i32*, i32** %3
%24 = getelementptr inbounds i32, i32* %23, i64 3
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @CopyV6IP(i32* nocapture writeonly %0, i32* nocapture %1) {
%3 = load i32, i32* %1
store i32 %3, i32* %0
%4 = getelementptr inbounds i32, i32* %1, i64 1
%5 = load i32, i32* %4
%6 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %5, i32* %6
%7 = getelementptr inbounds i32, i32* %1, i64 2
%8 = load i32, i32* %7
%9 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %8, i32* %9
%10 = getelementptr inbounds i32, i32* %1, i64 3
%11 = load i32, i32* %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %11, i32* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, char *);
void function_real_date_end(char *end) {
  write("json-task.json", "\"real-end-date\":\"%s\", ", end);
}


x86 assembly (clang, -O0):
<function_real_date_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_real_date_end>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [23 x i8] c"\22real-end-date\22:\22%s\22, \00"
define void @function_real_date_end(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [23 x i8] c"\22real-end-date\22:\22%s\22, \00"
define void @function_real_date_end(i8* %0) {
%2 = tail call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long sibling;
};
typedef TYPE_1__ XWindowChanges;

/* Variables and functions */
void set_XWindowChanges_sibling(void *_p, unsigned long _v) {
  ((XWindowChanges *)_p)->sibling = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XWindowChanges_sibling>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XWindowChanges_sibling>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XWindowChanges_sibling(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XWindowChanges_sibling(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear_bit(int, unsigned long volatile *);
int test_bit(int, unsigned long volatile *);
int test_and_clear_bit(int nr, volatile unsigned long *addr) {
  int oldbit = test_bit(nr, addr);
  clear_bit(nr, addr);
  return oldbit;
}


x86 assembly (clang, -O0):
<test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <test_bit@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <clear_bit@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_clear_bit>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
call   1040 <test_bit@plt>
mov    %eax,%r14d
mov    %ebp,%edi
mov    %rbx,%rsi
call   1030 <clear_bit@plt>
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i32, i32* %3
%7 = load i64*, i64** %4
%8 = call i32 @test_bit(i32 %6, i64* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i64*, i64** %4
%11 = call i32 @clear_bit(i32 %9, i64* %10)
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = tail call i32 @test_bit(i32 %0, i64* %1)
%4 = tail call i32 @clear_bit(i32 %0, i64* %1)
ret i32 %3
}
/* Variables and functions */
int frobcmp(char const *, char const *);
int frobcmpp(char const **a, char const **b) { return frobcmp(*a, *b); }


x86 assembly (clang, -O0):
<frobcmpp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <frobcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<frobcmpp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <frobcmp@plt>

LLVM IR (-O0):
define i32 @frobcmpp(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = call i32 @frobcmp(i8* %6, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @frobcmpp(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
%5 = tail call i32 @frobcmp(i8* %3, i8* %4)
ret i32 %5
}
int score(int s, int r) {
  return s + r == 3 ? 1000 : (s == r ? 100 : (s < r ? r * 10 + s : s * 10 + r));
}


x86 assembly (clang, -O0):
<score>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
cmp    $0x3,%eax
jne    1126 <score+0x26>
mov    $0x3e8,%eax
mov    %eax,-0xc(%rbp)
jmp    1170 <score+0x70>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    113f <score+0x3f>
mov    $0x64,%eax
mov    %eax,-0x10(%rbp)
jmp    116a <score+0x6a>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115a <score+0x5a>
imul   $0xa,-0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1164 <score+0x64>
imul   $0xa,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<score>:
lea    (%rsi,%rdi,1),%ecx
mov    $0x3e8,%eax
cmp    $0x3,%ecx
je     1125 <score+0x25>
mov    $0x64,%eax
cmp    %esi,%edi
je     1125 <score+0x25>
jge    111f <score+0x1f>
lea    (%rsi,%rsi,4),%eax
lea    (%rdi,%rax,2),%eax
ret
lea    (%rdi,%rdi,4),%eax
lea    (%rsi,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @score(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = icmp eq i32 %7, 3
br i1 %8, label %9, label %10
9: ; preds = %2
br label %33
10: ; preds = %2
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = icmp eq i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
br label %31
15: ; preds = %10
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %24
19: ; preds = %15
%20 = load i32, i32* %4
%21 = mul nsw i32 %20, 10
%22 = load i32, i32* %3
%23 = add nsw i32 %21, %22
br label %29
24: ; preds = %15
%25 = load i32, i32* %3
%26 = mul nsw i32 %25, 10
%27 = load i32, i32* %4
%28 = add nsw i32 %26, %27
br label %29
29: ; preds = %24, %19
%30 = phi i32 [ %23, %19 ], [ %28, %24 ]
br label %31
31: ; preds = %29, %14
%32 = phi i32 [ 100, %14 ], [ %30, %29 ]
br label %33
33: ; preds = %31, %9
%34 = phi i32 [ 1000, %9 ], [ %32, %31 ]
ret i32 %34
}

LLVM IR (-O2):
define i32 @score(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = icmp eq i32 %3, 3
br i1 %4, label %15, label %5
5: ; preds = %2
%6 = icmp eq i32 %0, %1
br i1 %6, label %15, label %7
7: ; preds = %5
%8 = icmp slt i32 %0, %1
br i1 %8, label %9, label %12
9: ; preds = %7
%10 = mul nsw i32 %1, 10
%11 = add nsw i32 %10, %0
br label %15
12: ; preds = %7
%13 = mul nsw i32 %0, 10
%14 = add nsw i32 %13, %1
br label %15
15: ; preds = %5, %12, %9, %2
%16 = phi i32 [ 1000, %2 ], [ 100, %5 ], [ %11, %9 ], [ %14, %12 ]
ret i32 %16
}
int abs(int a) {
  if (a < 0)
    return a * -1;
  else
    return a;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <abs+0x1d>
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1123 <abs+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = mul nsw i32 %7, -1
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}