#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t ADCClockConfigGet(uint32_t ui32Base, uint32_t *pui32ClockDiv) {
  uint32_t ui32Config;
  ;
  ui32Config = (*((volatile uint32_t *)(ui32Base + 0x00000FC8)));
  if (pui32ClockDiv) {
    *pui32ClockDiv = ((ui32Config & 0x000003F0) >> 4) + 1;
  }
  ui32Config &= ~0x000003F0;
  ui32Config = ((*((volatile uint32_t *)(ui32Base + 0x00000FC4))) & 0x0000000F)
               << 4;
  return (ui32Config);
}


x86 assembly (clang, -O0):
<ADCClockConfigGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfc8,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113a <ADCClockConfigGet+0x3a>
mov    -0x14(%rbp),%ecx
and    $0x3f0,%ecx
sar    $0x4,%ecx
add    $0x1,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
and    $0xfffffc0f,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfc4,%eax
cltq
mov    (%rax),%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCClockConfigGet>:
movslq %edi,%rax
mov    0xfc8(%rax),%ecx
test   %rsi,%rsi
je     1119 <ADCClockConfigGet+0x19>
shr    $0x4,%ecx
and    $0x3f,%ecx
add    $0x1,%ecx
mov    %ecx,(%rsi)
mov    0xfc4(%rax),%eax
shl    $0x4,%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @ADCClockConfigGet(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 4040
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
store i32 %10, i32* %5
%11 = load i32*, i32** %4
%12 = icmp ne i32* %11, null
br i1 %12, label %13, label %19
13: ; preds = %2
%14 = load i32, i32* %5
%15 = and i32 %14, 1008
%16 = ashr i32 %15, 4
%17 = add nsw i32 %16, 1
%18 = load i32*, i32** %4
store i32 %17, i32* %18
br label %19
19: ; preds = %13, %2
%20 = load i32, i32* %5
%21 = and i32 %20, -1009
store i32 %21, i32* %5
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 4036
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
%26 = load volatile i32, i32* %25
%27 = and i32 %26, 15
%28 = shl i32 %27, 4
store i32 %28, i32* %5
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @ADCClockConfigGet(i32 %0, i32* writeonly %1) {
%3 = add nsw i32 %0, 4040
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = icmp eq i32* %1, null
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = lshr i32 %6, 4
%10 = and i32 %9, 63
%11 = add nuw nsw i32 %10, 1
store i32 %11, i32* %1
br label %12
12: ; preds = %8, %2
%13 = add nsw i32 %0, 4036
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = shl i32 %16, 4
%18 = and i32 %17, 240
ret i32 %18
}