#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct XCSF {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cond_param_defaults_dgp(struct XCSF *);
int /*<<< orphan*/ cond_param_defaults_gp(struct XCSF *);
int /*<<< orphan*/ cond_param_defaults_neural(struct XCSF *);
int /*<<< orphan*/ cond_param_set_bits(struct XCSF *, int);
int /*<<< orphan*/ cond_param_set_eta(struct XCSF *, int /*<<< orphan*/);
int /*<<< orphan*/ cond_param_set_max(struct XCSF *, int);
int /*<<< orphan*/ cond_param_set_min(struct XCSF *, int /*<<< orphan*/);
int /*<<< orphan*/ cond_param_set_p_dontcare(struct XCSF *, double);
int /*<<< orphan*/ cond_param_set_spread_min(struct XCSF *, double);
int /*<<< orphan*/ cond_param_set_type(struct XCSF *, int);
void cond_param_defaults(struct XCSF *xcsf) {
  cond_param_set_type(xcsf, (1));
  cond_param_set_eta(xcsf, 0);
  cond_param_set_min(xcsf, 0);
  cond_param_set_max(xcsf, 1);
  cond_param_set_spread_min(xcsf, 0.1);
  cond_param_set_p_dontcare(xcsf, 0.5);
  cond_param_set_bits(xcsf, 1);
  cond_param_defaults_neural(xcsf);
  cond_param_defaults_dgp(xcsf);
  cond_param_defaults_gp(xcsf);
}


x86 assembly (clang, -O0):
<cond_param_defaults>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1060 <cond_param_set_type@plt>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   10c0 <cond_param_set_eta@plt>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   10a0 <cond_param_set_min@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   10b0 <cond_param_set_max@plt>
mov    -0x8(%rbp),%rdi
movsd  0xe1e(%rip),%xmm0
call   1030 <cond_param_set_spread_min@plt>
mov    -0x8(%rbp),%rdi
movsd  0xe05(%rip),%xmm0
call   1050 <cond_param_set_p_dontcare@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1070 <cond_param_set_bits@plt>
mov    -0x8(%rbp),%rdi
call   1040 <cond_param_defaults_neural@plt>
mov    -0x8(%rbp),%rdi
call   1090 <cond_param_defaults_dgp@plt>
mov    -0x8(%rbp),%rdi
call   1080 <cond_param_defaults_gp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cond_param_defaults>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%esi
call   1060 <cond_param_set_type@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   10c0 <cond_param_set_eta@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   10a0 <cond_param_set_min@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   10b0 <cond_param_set_max@plt>
movsd  0xe29(%rip),%xmm0
mov    %rbx,%rdi
call   1030 <cond_param_set_spread_min@plt>
movsd  0xe21(%rip),%xmm0
mov    %rbx,%rdi
call   1050 <cond_param_set_p_dontcare@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1070 <cond_param_set_bits@plt>
mov    %rbx,%rdi
call   1040 <cond_param_defaults_neural@plt>
mov    %rbx,%rdi
call   1090 <cond_param_defaults_dgp@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1080 <cond_param_defaults_gp@plt>

LLVM IR (-O0):
%struct.XCSF = type { i32 }
define void @cond_param_defaults(%struct.XCSF* %0) {
%2 = alloca %struct.XCSF*
store %struct.XCSF* %0, %struct.XCSF** %2
%3 = load %struct.XCSF*, %struct.XCSF** %2
%4 = call i32 @cond_param_set_type(%struct.XCSF* %3, i32 1)
%5 = load %struct.XCSF*, %struct.XCSF** %2
%6 = call i32 @cond_param_set_eta(%struct.XCSF* %5, i32 0)
%7 = load %struct.XCSF*, %struct.XCSF** %2
%8 = call i32 @cond_param_set_min(%struct.XCSF* %7, i32 0)
%9 = load %struct.XCSF*, %struct.XCSF** %2
%10 = call i32 @cond_param_set_max(%struct.XCSF* %9, i32 1)
%11 = load %struct.XCSF*, %struct.XCSF** %2
%12 = call i32 @cond_param_set_spread_min(%struct.XCSF* %11, double 1.000000e-01)
%13 = load %struct.XCSF*, %struct.XCSF** %2
%14 = call i32 @cond_param_set_p_dontcare(%struct.XCSF* %13, double 5.000000e-01)
%15 = load %struct.XCSF*, %struct.XCSF** %2
%16 = call i32 @cond_param_set_bits(%struct.XCSF* %15, i32 1)
%17 = load %struct.XCSF*, %struct.XCSF** %2
%18 = call i32 @cond_param_defaults_neural(%struct.XCSF* %17)
%19 = load %struct.XCSF*, %struct.XCSF** %2
%20 = call i32 @cond_param_defaults_dgp(%struct.XCSF* %19)
%21 = load %struct.XCSF*, %struct.XCSF** %2
%22 = call i32 @cond_param_defaults_gp(%struct.XCSF* %21)
ret void
}

LLVM IR (-O2):
%struct.XCSF = type { i32 }
define void @cond_param_defaults(%struct.XCSF* %0) {
%2 = tail call i32 @cond_param_set_type(%struct.XCSF* %0, i32 1)
%3 = tail call i32 @cond_param_set_eta(%struct.XCSF* %0, i32 0)
%4 = tail call i32 @cond_param_set_min(%struct.XCSF* %0, i32 0)
%5 = tail call i32 @cond_param_set_max(%struct.XCSF* %0, i32 1)
%6 = tail call i32 @cond_param_set_spread_min(%struct.XCSF* %0, double 1.000000e-01)
%7 = tail call i32 @cond_param_set_p_dontcare(%struct.XCSF* %0, double 5.000000e-01)
%8 = tail call i32 @cond_param_set_bits(%struct.XCSF* %0, i32 1)
%9 = tail call i32 @cond_param_defaults_neural(%struct.XCSF* %0)
%10 = tail call i32 @cond_param_defaults_dgp(%struct.XCSF* %0)
%11 = tail call i32 @cond_param_defaults_gp(%struct.XCSF* %0)
ret void
}