xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ off_t;

/* Variables and functions */
int /*<<< orphan*/ Sys_failure(char *);
scalar_t__ lseek(int, scalar_t__, int);
off_t Lseek(int fildes, off_t offset, int whence) {
  off_t retval;
  retval = lseek(fildes, offset, whence);
  if (retval == (off_t)-1)
    Sys_failure("lseek");
  return retval;
}


x86 assembly (clang, -O0):
<Lseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <lseek@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
jne    115c <Lseek+0x3c>
lea    0xea9(%rip),%rdi
call   1040 <Sys_failure@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lseek>:
push   %rbx
call   1030 <lseek@plt>
mov    %rax,%rbx
cmp    $0xffffffffffffffff,%rax
jne    113b <Lseek+0x1b>
lea    0xeca(%rip),%rdi
call   1040 <Sys_failure@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"lseek\00"
define i64 @Lseek(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i64, i64* %5
%10 = load i32, i32* %6
%11 = call i64 @lseek(i32 %8, i64 %9, i32 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = icmp eq i64 %12, -1
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @Sys_failure(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %3
%17 = load i64, i64* %7
ret i64 %17
}

LLVM IR (-O2):
@.str = [6 x i8] c"lseek\00"
define i64 @Lseek(i32 %0, i64 %1, i32 %2) {
%4 = tail call i64 @lseek(i32 %0, i64 %1, i32 %2)
%5 = icmp eq i64 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @Sys_failure(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i64 %4
}
int baz() { return 7; }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @baz() {
ret i32 7
}

LLVM IR (-O2):
define i32 @baz() {
ret i32 7
}
int condition_doubleQuote(char c) { return c == '\"'; }


x86 assembly (clang, -O0):
<condition_doubleQuote>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x22,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<condition_doubleQuote>:
xor    %eax,%eax
cmp    $0x22,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @condition_doubleQuote(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 34
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @condition_doubleQuote(i8 signext %0) {
%2 = icmp eq i8 %0, 34
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct mesh_var {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ quad_border_cond(struct mesh_var *, int const, int const,
                                    int, int, int, int);
int /*<<< orphan*/ quad_mesh(struct mesh_var *, int const, int const);
void oblique_periodic_mesh(struct mesh_var *mv) {
  const int n_x_a = 0, n_y_a = 2;
  quad_mesh(mv, n_x_a, n_y_a);
  quad_border_cond(mv, n_x_a, n_y_a, -70, -3, -70, -3);
}


x86 assembly (clang, -O0):
<oblique_periodic_mesh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x2,%edx
call   1030 <quad_mesh@plt>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x2,%edx
mov    $0xffffffba,%r9d
mov    $0xfffffffd,%r8d
mov    %r9d,%ecx
movl   $0xfffffffd,(%rsp)
call   1040 <quad_border_cond@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oblique_periodic_mesh>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x2,%edx
call   1030 <quad_mesh@plt>
movl   $0xfffffffd,(%rsp)
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x2,%edx
mov    $0xffffffba,%ecx
mov    $0xfffffffd,%r8d
mov    $0xffffffba,%r9d
call   1040 <quad_border_cond@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.mesh_var = type { i32 }
define void @oblique_periodic_mesh(%struct.mesh_var* %0) {
%2 = alloca %struct.mesh_var*
%3 = alloca i32
%4 = alloca i32
store %struct.mesh_var* %0, %struct.mesh_var** %2
store i32 0, i32* %3
store i32 2, i32* %4
%5 = load %struct.mesh_var*, %struct.mesh_var** %2
%6 = call i32 @quad_mesh(%struct.mesh_var* %5, i32 0, i32 2)
%7 = load %struct.mesh_var*, %struct.mesh_var** %2
%8 = call i32 @quad_border_cond(%struct.mesh_var* %7, i32 0, i32 2, i32 -70, i32 -3, i32 -70, i32 -3)
ret void
}

LLVM IR (-O2):
%struct.mesh_var = type { i32 }
define void @oblique_periodic_mesh(%struct.mesh_var* %0) {
%2 = tail call i32 @quad_mesh(%struct.mesh_var* %0, i32 0, i32 2)
%3 = tail call i32 @quad_border_cond(%struct.mesh_var* %0, i32 0, i32 2, i32 -70, i32 -3, i32 -70, i32 -3)
ret void
}
float rintf(float x) {
  float retval = 0.0F;
  __asm__ __volatile__("frndint;" : "=t"(retval) : "0"(x));
  return retval;
}


x86 assembly (clang, -O0):
<rintf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
flds   -0xc(%rbp)
frndint
fstps  -0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rintf>:
movss  %xmm0,-0x4(%rsp)
flds   -0x4(%rsp)
frndint
fstps  -0x8(%rsp)
movss  -0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @rintf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
store float 0.000000e+00, float* %3
%4 = load float, float* %2
%5 = call float asm sideeffect "frndint;", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @rintf(float %0) {
%2 = tail call float asm sideeffect "frndint;", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %0)
ret float %2
}
void abc6defghijklmnopqrstuvwxzy() {}


x86 assembly (clang, -O0):
<abc6defghijklmnopqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abc6defghijklmnopqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @abc6defghijklmnopqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @abc6defghijklmnopqrstuvwxzy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2cslave_EnableNAK(int /*<<< orphan*/);
void i2c0slave_EnableNAK(void) { i2cslave_EnableNAK(0); }


x86 assembly (clang, -O0):
<i2c0slave_EnableNAK>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <i2cslave_EnableNAK@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c0slave_EnableNAK>:
xor    %edi,%edi
jmp    1030 <i2cslave_EnableNAK@plt>

LLVM IR (-O0):
define void @i2c0slave_EnableNAK() {
%1 = call i32 @i2cslave_EnableNAK(i32 0)
ret void
}

LLVM IR (-O2):
define void @i2c0slave_EnableNAK() {
%1 = tail call i32 @i2cslave_EnableNAK(i32 0)
ret void
}
/* Variables and functions */
double pow(double, double);
double trap(double xi, double h) {
  return pow(xi, (double)7) + pow((xi + h), (double)7);
}


x86 assembly (clang, -O0):
<trap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed1(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  0xeb5(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trap>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,(%rsp)
movsd  0xed9(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
addsd  (%rsp),%xmm0
movsd  0xebb(%rip),%xmm1
call   1030 <pow@plt>
addsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @trap(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @pow(double %5, double 7.000000e+00)
%7 = load double, double* %3
%8 = load double, double* %4
%9 = fadd double %7, %8
%10 = call double @pow(double %9, double 7.000000e+00)
%11 = fadd double %6, %10
ret double %11
}

LLVM IR (-O2):
define double @trap(double %0, double %1) {
%3 = tail call double @pow(double %0, double 7.000000e+00)
%4 = fadd double %0, %1
%5 = tail call double @pow(double %4, double 7.000000e+00)
%6 = fadd double %3, %5
ret double %6
}
struct stack {
  char arr[100];
  int top;
} initStack(struct stack *s) {
  s->top = -1;
}


x86 assembly (clang, -O0):
<initStack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,%rax
mov    %rsi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
movl   $0xffffffff,0x64(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initStack>:
mov    %rdi,%rax
movl   $0xffffffff,0x64(%rsi)
ret

LLVM IR (-O0):
%struct.stack = type { [100 x i8], i32 }
define void @initStack(%struct.stack* noalias sret(%struct.stack) align 4 %0, %struct.stack* %1) {
%3 = alloca %struct.stack*
store %struct.stack* %1, %struct.stack** %3
%4 = load %struct.stack*, %struct.stack** %3
%5 = getelementptr inbounds %struct.stack, %struct.stack* %4, i32 0, i32 1
store i32 -1, i32* %5
ret void
}

LLVM IR (-O2):
%struct.stack = type { [100 x i8], i32 }
define void @initStack(%struct.stack* noalias nocapture readnone sret(%struct.stack) align 4 %0, %struct.stack* nocapture writeonly %1) {
%3 = getelementptr inbounds %struct.stack, %struct.stack* %1, i64 0, i32 1
store i32 -1, i32* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ __glGetMap_size(int /*<<< orphan*/, int /*<<< orphan*/);
GLint __glGetMapfv_size(GLenum target, GLenum query) {
  return __glGetMap_size(target, query);
}


x86 assembly (clang, -O0):
<__glGetMapfv_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__glGetMap_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glGetMapfv_size>:
jmp    1030 <__glGetMap_size@plt>

LLVM IR (-O0):
define i32 @__glGetMapfv_size(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__glGetMap_size(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @__glGetMapfv_size(i32 %0, i32 %1) {
%3 = tail call i32 @__glGetMap_size(i32 %0, i32 %1)
ret i32 %3
}
__typeof__(isalpha((void *)1)) test_isalpha_15(void) {
  return isalpha((void *)1);
}


x86 assembly (clang, -O0):
<test_isalpha_15>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
mov    %eax,%edi
call   1030 <isalpha@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_isalpha_15>:
mov    $0x1,%edi
jmp    1030 <isalpha@plt>

LLVM IR (-O0):
define i32 @test_isalpha_15() {
%1 = call i32 @isalpha(i32 ptrtoint (i8* inttoptr (i64 1 to i8*) to i32))
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_isalpha_15() {
%1 = tail call i32 @isalpha(i32 1)
ret i32 %1
}
void board_debug_uart_init(void) {}


x86 assembly (clang, -O0):
<board_debug_uart_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_debug_uart_init>:
ret

LLVM IR (-O0):
define void @board_debug_uart_init() {
ret void
}

LLVM IR (-O2):
define void @board_debug_uart_init() {
ret void
}
int test_imm_3Eint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x3E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Eint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x3e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Eint64_midword_mem>:
testb  $0x3e,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Eint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 62
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Eint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 4063232
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int obrisiSlRed(char *string) {
  int i = 0;
  while (string[i] != '\0') {
    if (string[i] == '\n')
      string[i] = '\0';
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<obrisiSlRed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1153 <obrisiSlRed+0x53>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1145 <obrisiSlRed+0x45>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <obrisiSlRed+0xf>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<obrisiSlRed>:
jmp    1117 <obrisiSlRed+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x0,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0xa,%al
je     1110 <obrisiSlRed+0x10>
test   %al,%al
jne    1113 <obrisiSlRed+0x13>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @obrisiSlRed(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %25, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %28
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 10
br i1 %19, label %20, label %25
20: ; preds = %12
%21 = load i8*, i8** %2
%22 = load i32, i32* %3
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 0, i8* %24
br label %25
25: ; preds = %20, %12
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 1
store i32 %27, i32* %3
br label %4
28: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @obrisiSlRed(i8* nocapture %0) {
br label %2
2: ; preds = %7, %1
%3 = phi i64 [ %8, %7 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %7 [
i8 0, label %9
i8 10, label %6
]
6: ; preds = %2
store i8 0, i8* %4
br label %7
7: ; preds = %2, %6
%8 = add nuw i64 %3, 1
br label %2
9: ; preds = %2
ret i32 0
}
void _ufc_clearmem(start, cnt) char *start;
int cnt;
{
  while (cnt--)
    *start++ = '\0';
}


x86 assembly (clang, -O0):
<_ufc_clearmem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     1136 <_ufc_clearmem+0x36>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x0,(%rax)
jmp    110b <_ufc_clearmem+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ufc_clearmem>:
test   %esi,%esi
je     1122 <_ufc_clearmem+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @_ufc_clearmem(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
store i8 0, i8* %10
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @_ufc_clearmem(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
int test_imm_C4uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xc4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4uint64_lowword_mem>:
testb  $0xc4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 196
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C4uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 196
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ shutdown(int, int);
void _vthttp_close(int sock) {
  shutdown(sock, 2);
  close(sock);
}


x86 assembly (clang, -O0):
<_vthttp_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1030 <shutdown@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vthttp_close>:
push   %rbx
mov    %edi,%ebx
mov    $0x2,%esi
call   1030 <shutdown@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>

LLVM IR (-O0):
define void @_vthttp_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @shutdown(i32 %3, i32 2)
%5 = load i32, i32* %2
%6 = call i32 @close(i32 %5)
ret void
}

LLVM IR (-O2):
define void @_vthttp_close(i32 %0) {
%2 = tail call i32 @shutdown(i32 %0, i32 2)
%3 = tail call i32 @close(i32 %0)
ret void
}
void ldap_flush_read_buffer(int sock) {}


x86 assembly (clang, -O0):
<ldap_flush_read_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldap_flush_read_buffer>:
ret

LLVM IR (-O0):
define void @ldap_flush_read_buffer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @ldap_flush_read_buffer(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ DBL_MIN;
double random_double_exclusive(double, scalar_t__);
double random_double_inclusive(double lower, double upper) {
  return random_double_exclusive(lower, upper + DBL_MIN);
}


x86 assembly (clang, -O0):
<random_double_inclusive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mov    0x2ead(%rip),%rax
cvtsi2sdq (%rax),%xmm2
addsd  %xmm2,%xmm1
cvttsd2si %xmm1,%rdi
call   1030 <random_double_exclusive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_double_inclusive>:
mov    0x2ec9(%rip),%rax
cvtsi2sdq (%rax),%xmm2
addsd  %xmm1,%xmm2
cvttsd2si %xmm2,%rdi
jmp    1030 <random_double_exclusive@plt>

LLVM IR (-O0):
@DBL_MIN = global i64 0
define double @random_double_inclusive(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = load i64, i64* @DBL_MIN
%8 = sitofp i64 %7 to double
%9 = fadd double %6, %8
%10 = fptosi double %9 to i64
%11 = call double @random_double_exclusive(double %5, i64 %10)
ret double %11
}

LLVM IR (-O2):
@DBL_MIN = global i64 0
define double @random_double_inclusive(double %0, double %1) {
%3 = load i64, i64* @DBL_MIN
%4 = sitofp i64 %3 to double
%5 = fadd double %4, %1
%6 = fptosi double %5 to i64
%7 = tail call double @random_double_exclusive(double %0, i64 %6)
ret double %7
}
double _testfunc_d_bhilfd(signed char b, short h, int i, long l, float f,
                          double d) {
  return (double)(b + h + i + l + f + d);
}


x86 assembly (clang, -O0):
<_testfunc_d_bhilfd>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    %rcx,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  %xmm1,-0x20(%rbp)
movsbl -0x1(%rbp),%eax
movswl -0x4(%rbp),%ecx
add    %ecx,%eax
add    -0x8(%rbp),%eax
cltq
add    -0x10(%rbp),%rax
cvtsi2ss %rax,%xmm0
addss  -0x14(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
addsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_testfunc_d_bhilfd>:
add    %esi,%edi
add    %edx,%edi
movslq %edi,%rax
add    %rcx,%rax
cvtsi2ss %rax,%xmm2
addss  %xmm0,%xmm2
xorps  %xmm0,%xmm0
cvtss2sd %xmm2,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @_testfunc_d_bhilfd(i8 signext %0, i16 signext %1, i32 %2, i64 %3, float %4, double %5) {
%7 = alloca i8
%8 = alloca i16
%9 = alloca i32
%10 = alloca i64
%11 = alloca float
%12 = alloca double
store i8 %0, i8* %7
store i16 %1, i16* %8
store i32 %2, i32* %9
store i64 %3, i64* %10
store float %4, float* %11
store double %5, double* %12
%13 = load i8, i8* %7
%14 = sext i8 %13 to i32
%15 = load i16, i16* %8
%16 = sext i16 %15 to i32
%17 = add nsw i32 %14, %16
%18 = load i32, i32* %9
%19 = add nsw i32 %17, %18
%20 = sext i32 %19 to i64
%21 = load i64, i64* %10
%22 = add nsw i64 %20, %21
%23 = sitofp i64 %22 to float
%24 = load float, float* %11
%25 = fadd float %23, %24
%26 = fpext float %25 to double
%27 = load double, double* %12
%28 = fadd double %26, %27
ret double %28
}

LLVM IR (-O2):
define double @_testfunc_d_bhilfd(i8 signext %0, i16 signext %1, i32 %2, i64 %3, float %4, double %5) {
%7 = sext i8 %0 to i32
%8 = sext i16 %1 to i32
%9 = add nsw i32 %8, %7
%10 = add nsw i32 %9, %2
%11 = sext i32 %10 to i64
%12 = add nsw i64 %11, %3
%13 = sitofp i64 %12 to float
%14 = fadd float %13, %4
%15 = fpext float %14 to double
%16 = fadd double %15, %5
ret double %16
}
unsigned xrop3_153_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned stk1;
  stk1 = D ^ S;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_153_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_153_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
xor    $0xffffff00,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_153_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 8
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = xor i32 %14, %15
store i32 %16, i32* %7
%17 = load i32, i32* %7
%18 = xor i32 %17, -1
store i32 %18, i32* %7
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @xrop3_153_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = xor i32 %4, -256
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int, size_t);
void NaClFillMemoryRegionWithHalt(void *start, size_t size) {
  memset(start, 0xf4, size);
}


x86 assembly (clang, -O0):
<NaClFillMemoryRegionWithHalt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0xf4,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NaClFillMemoryRegionWithHalt>:
mov    %rsi,%rdx
mov    $0xf4,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @NaClFillMemoryRegionWithHalt(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @memset(i8* %5, i32 244, i64 %6)
ret void
}

LLVM IR (-O2):
define void @NaClFillMemoryRegionWithHalt(i8* %0, i64 %1) {
%3 = tail call i32 @memset(i8* %0, i32 244, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int func() { printf("Hello World\n"); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
define i32 @func() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello World\00"
define i32 @func() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ board_up();
int /*<<< orphan*/ write(int, char *, int);
void event_handler_client_in_up(int fd) {
  write(fd, "\0", 1);
  board_up();
}


x86 assembly (clang, -O0):
<event_handler_client_in_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xecb(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    $0x0,%al
call   1040 <board_up@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_handler_client_in_up>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <board_up@plt>

LLVM IR (-O0):
@.str = [2 x i8] zeroinitializer
define void @event_handler_client_in_up(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @write(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%5 = call i32 (...) @board_up()
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] zeroinitializer
define void @event_handler_client_in_up(i32 %0) {
%2 = tail call i32 @write(i32 %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%3 = tail call i32 (...) @board_up()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint64_t;

/* Variables and functions */
int /*<<< orphan*/ fwrite(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void bear_print(uint8_t *head) {
  uint64_t length = (*(uint64_t *)head) & ~0x8000000000000000;
  fwrite(head + 8, sizeof(*head), length, stdout);
}


x86 assembly (clang, -O0):
<bear_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movslq (%rax),%rax
movabs $0x7fffffffffffffff,%rcx
ff ff 7f
and    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x20,%rdi
mov    -0xc(%rbp),%edx
mov    0x2e9b(%rip),%rax
mov    (%rax),%ecx
mov    $0x4,%esi
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bear_print>:
mov    (%rdi),%edx
add    $0x20,%rdi
mov    0x2ec3(%rip),%rax
mov    (%rax),%ecx
mov    $0x4,%esi
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @bear_print(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = and i64 %6, 9223372036854775807
%8 = trunc i64 %7 to i32
store i32 %8, i32* %3
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 8
%11 = load i32, i32* %3
%12 = load i32, i32* @stdout
%13 = call i32 @fwrite(i32* %10, i32 4, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @bear_print(i32* %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 8
%4 = load i32, i32* @stdout
%5 = tail call i32 @fwrite(i32* %3, i32 4, i32 %2, i32 %4)
ret void
}
void cppfile() {}


x86 assembly (clang, -O0):
<cppfile>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cppfile>:
ret

LLVM IR (-O0):
define void @cppfile() {
ret void
}

LLVM IR (-O2):
define void @cppfile() {
ret void
}
int f(int a) { return a + 3; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x3(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 3
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ reset();
void picosat_reset(void) { reset(); }


x86 assembly (clang, -O0):
<picosat_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <reset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<picosat_reset>:
xor    %eax,%eax
jmp    1030 <reset@plt>

LLVM IR (-O0):
define void @picosat_reset() {
%1 = call i32 (...) @reset()
ret void
}

LLVM IR (-O2):
define void @picosat_reset() {
%1 = tail call i32 (...) @reset()
ret void
}
IR0IR1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if ((*p0) <= (*p1))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<IR0IR1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x28(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x30(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
jb     1142 <IR0IR1+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1149 <IR0IR1+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IR0IR1>:
movsd  (%rcx),%xmm0
xor    %eax,%eax
ucomisd (%rdx),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @IR0IR1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %12
%15 = load double, double* %14
%16 = load double*, double** %13
%17 = load double, double* %16
%18 = fcmp ole double %15, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @IR0IR1(double %0, double %1, i32 %2, i32 %3, double* nocapture %4, double* nocapture %5) {
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fcmp ole double %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
double fabs(double);
bool check_unsigned_error(double calculated, double reference,
                          double threshold) {
  double err = calculated - reference;
  return (fabs(err) <= fabs(calculated) * threshold);
}


x86 assembly (clang, -O0):
<check_unsigned_error>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm1
movaps 0xed2(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movaps 0xec2(%rip),%xmm2
pand   %xmm2,%xmm0
mulsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_unsigned_error>:
movapd %xmm0,%xmm3
subsd  %xmm1,%xmm3
movapd 0xef0(%rip),%xmm1
andpd  %xmm1,%xmm3
andpd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
xor    %eax,%eax
ucomisd %xmm3,%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @check_unsigned_error(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
%9 = load double, double* %5
%10 = fsub double %8, %9
store double %10, double* %7
%11 = load double, double* %7
%12 = call double @llvm.fabs.f64(double %11)
%13 = load double, double* %4
%14 = call double @llvm.fabs.f64(double %13)
%15 = load double, double* %6
%16 = fmul double %14, %15
%17 = fcmp ole double %12, %16
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @check_unsigned_error(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = tail call double @llvm.fabs.f64(double %4)
%6 = tail call double @llvm.fabs.f64(double %0)
%7 = fmul double %6, %2
%8 = fcmp ole double %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ erase();
int /*<<< orphan*/ move(int /*<<< orphan*/, int /*<<< orphan*/);
void console_clear(void) {
  erase();
  move(0, 0);
}


x86 assembly (clang, -O0):
<console_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <erase@plt>
xor    %esi,%esi
mov    %esi,%edi
call   1040 <move@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_clear>:
push   %rax
xor    %eax,%eax
call   1030 <erase@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <move@plt>

LLVM IR (-O0):
define void @console_clear() {
%1 = call i32 (...) @erase()
%2 = call i32 @move(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @console_clear() {
%1 = tail call i32 (...) @erase()
%2 = tail call i32 @move(i32 0, i32 0)
ret void
}
unsigned my_rand_r(unsigned *seedp) {
  unsigned x = *seedp * 1664525u + 1013904223u;
  *seedp = x;
  return (x >> 16) & 0x7fff;
}


x86 assembly (clang, -O0):
<my_rand_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x19660d,(%rax),%eax
add    $0x3c6ef35f,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x10,%eax
and    $0x7fff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_rand_r>:
imul   $0x19660d,(%rdi),%eax
add    $0x3c6ef35f,%eax
mov    %eax,(%rdi)
shr    $0x10,%eax
and    $0x7fff,%eax
ret

LLVM IR (-O0):
define i32 @my_rand_r(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = mul i32 %5, 1664525
%7 = add i32 %6, 1013904223
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = load i32*, i32** %2
store i32 %8, i32* %9
%10 = load i32, i32* %3
%11 = lshr i32 %10, 16
%12 = and i32 %11, 32767
ret i32 %12
}

LLVM IR (-O2):
define i32 @my_rand_r(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul i32 %2, 1664525
%4 = add i32 %3, 1013904223
store i32 %4, i32* %0
%5 = lshr i32 %4, 16
%6 = and i32 %5, 32767
ret i32 %6
}
float lmath_minf(float val, float max) { return val < max ? max : val; }


x86 assembly (clang, -O0):
<lmath_minf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <lmath_minf+0x30>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <lmath_minf+0x3a>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lmath_minf>:
maxss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @lmath_minf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %4
br label %12
10: ; preds = %2
%11 = load float, float* %3
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @lmath_minf(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %1, float %0
ret float %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int initial_state;
};
typedef TYPE_1__ XWMHints;

/* Variables and functions */
void set_XWMHints_initial_state(void *_p, int _v) {
  ((XWMHints *)_p)->initial_state = (int)_v;
}


x86 assembly (clang, -O0):
<set_XWMHints_initial_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XWMHints_initial_state>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XWMHints_initial_state(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XWMHints_initial_state(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int check_arg_count(int, int);
int /*<<< orphan*/ report_count(int);
int /*<<< orphan*/ report_error(char *);
void cmd_mvadd_wchstr(int nargs, char **args) {
  if (check_arg_count(nargs, 1) == 1)
    return;
  report_count(1);
  report_error("UNSUPPORTED");
}


x86 assembly (clang, -O0):
<cmd_mvadd_wchstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <check_arg_count@plt>
cmp    $0x1,%eax
jne    115a <cmd_mvadd_wchstr+0x2a>
jmp    1170 <cmd_mvadd_wchstr+0x40>
mov    $0x1,%edi
call   1040 <report_count@plt>
lea    0xe95(%rip),%rdi
call   1050 <report_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_mvadd_wchstr>:
push   %rax
mov    $0x1,%esi
call   1030 <check_arg_count@plt>
cmp    $0x1,%eax
jne    1142 <cmd_mvadd_wchstr+0x12>
pop    %rax
ret
mov    $0x1,%edi
call   1040 <report_count@plt>
lea    0xead(%rip),%rdi
pop    %rax
jmp    1050 <report_error@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"UNSUPPORTED\00"
define void @cmd_mvadd_wchstr(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = call i32 @check_arg_count(i32 %5, i32 1)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
br label %12
9: ; preds = %2
%10 = call i32 @report_count(i32 1)
%11 = call i32 @report_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"UNSUPPORTED\00"
define void @cmd_mvadd_wchstr(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @check_arg_count(i32 %0, i32 1)
%4 = icmp eq i32 %3, 1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @report_count(i32 1)
%7 = tail call i32 @report_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %5
ret void
}
/* Variables and functions */
int sprintf(char *, char *, int);
int smp_sio_int2string(char *buffer, int n) { return sprintf(buffer, "%d", n); }


x86 assembly (clang, -O0):
<smp_sio_int2string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_sio_int2string>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @smp_sio_int2string(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @smp_sio_int2string(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 %3
}
void glGetShaderPrecisionFormat(void) { return; }


x86 assembly (clang, -O0):
<glGetShaderPrecisionFormat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGetShaderPrecisionFormat>:
ret

LLVM IR (-O0):
define void @glGetShaderPrecisionFormat() {
ret void
}

LLVM IR (-O2):
define void @glGetShaderPrecisionFormat() {
ret void
}
int pl_on_lib_exit(void) { return 0; }


x86 assembly (clang, -O0):
<pl_on_lib_exit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pl_on_lib_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pl_on_lib_exit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pl_on_lib_exit() {
ret i32 0
}
/* Variables and functions */
char *lefttrim(char *, char);
char *ltrimt(char *str) { return lefttrim(str, '\t'); }


x86 assembly (clang, -O0):
<ltrimt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x9,%esi
call   1030 <lefttrim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltrimt>:
mov    $0x9,%esi
jmp    1030 <lefttrim@plt>

LLVM IR (-O0):
define i8* @ltrimt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @lefttrim(i8* %3, i8 signext 9)
ret i8* %4
}

LLVM IR (-O2):
define i8* @ltrimt(i8* %0) {
%2 = tail call i8* @lefttrim(i8* %0, i8 signext 9)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
size_t StringUtilities_code_point_length_for_part(int /*<<< orphan*/ const *,
                                                  size_t);
size_t wcslen(int /*<<< orphan*/ const *);
size_t StringUtilities_code_point_length(const wchar_t *string) {
  if (sizeof(wchar_t) > 2) {
    return wcslen(string);
  } else {
    return StringUtilities_code_point_length_for_part(string, wcslen(string));
  }
}


x86 assembly (clang, -O0):
<StringUtilities_code_point_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wcslen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StringUtilities_code_point_length>:
jmp    1030 <wcslen@plt>

LLVM IR (-O0):
define i64 @StringUtilities_code_point_length(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i64 @wcslen(i32* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @StringUtilities_code_point_length(i32* nocapture %0) {
%2 = tail call i64 @wcslen(i32* %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ sentinel();
int decr(int i) {
  sentinel();
  return i - 1;
}


x86 assembly (clang, -O0):
<decr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <sentinel@plt>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decr>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <sentinel@plt>
add    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @decr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @sentinel()
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @decr(i32 %0) {
%2 = tail call i32 (...) @sentinel()
%3 = add nsw i32 %0, -1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ dynarray_nochk_add_array(void ***, void **);
int /*<<< orphan*/ dynarray_nochk_free(void ***, int /*<<< orphan*/ *);
void dynarray_nochk_add_tmparray(void ***par, void **ar2) {
  dynarray_nochk_add_array(par, ar2);
  dynarray_nochk_free(&ar2, NULL);
}


x86 assembly (clang, -O0):
<dynarray_nochk_add_tmparray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <dynarray_nochk_add_array@plt>
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <dynarray_nochk_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dynarray_nochk_add_tmparray>:
push   %rax
mov    %rsi,(%rsp)
call   1040 <dynarray_nochk_add_array@plt>
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <dynarray_nochk_free@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @dynarray_nochk_add_tmparray(i8*** %0, i8** %1) {
%3 = alloca i8***
%4 = alloca i8**
store i8*** %0, i8**** %3
store i8** %1, i8*** %4
%5 = load i8***, i8**** %3
%6 = load i8**, i8*** %4
%7 = call i32 @dynarray_nochk_add_array(i8*** %5, i8** %6)
%8 = call i32 @dynarray_nochk_free(i8*** %4, i32* null)
ret void
}

LLVM IR (-O2):
define void @dynarray_nochk_add_tmparray(i8*** %0, i8** %1) {
%3 = alloca i8**
store i8** %1, i8*** %3
%4 = tail call i32 @dynarray_nochk_add_array(i8*** %0, i8** %1)
%5 = call i32 @dynarray_nochk_free(i8*** %3, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glPushMatrix();
void qglPushMatrix(void) { glPushMatrix(); }


x86 assembly (clang, -O0):
<qglPushMatrix>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glPushMatrix@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<qglPushMatrix>:
xor    %eax,%eax
jmp    1030 <glPushMatrix@plt>

LLVM IR (-O0):
define void @qglPushMatrix() {
%1 = call i32 (...) @glPushMatrix()
ret void
}

LLVM IR (-O2):
define void @qglPushMatrix() {
%1 = tail call i32 (...) @glPushMatrix()
ret void
}
int main() {
  int i = 3;
  int a[3] = {1, 2, 3};
  int *p;
  p = &a[--i];
  return *p;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    0xee7(%rip),%rax
mov    %rax,-0x14(%rbp)
mov    0xee5(%rip),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
movslq %eax,%rcx
lea    -0x14(%rbp),%rax
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
@__const.main.a = [3 x i32] [i32 1, i32 2, i32 3]
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [3 x i32]
%4 = alloca i32*
store i32 0, i32* %1
store i32 3, i32* %2
%5 = bitcast [3 x i32]* %3 to i8*
%6 = load i32, i32* %2
%7 = add nsw i32 %6, -1
store i32 %7, i32* %2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 %8
store i32* %9, i32** %4
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
ret i32 3
}
int mix(int x, int y) {
  int mask = 0xff;
  int last_byte = x & mask;
  int except_last_byte = y & ~mask;
  return last_byte | except_last_byte;
}


x86 assembly (clang, -O0):
<mix>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0xff,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
or     -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mix>:
movzbl %dil,%eax
and    $0xffffff00,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @mix(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 255, i32* %5
%8 = load i32, i32* %3
%9 = load i32, i32* %5
%10 = and i32 %8, %9
store i32 %10, i32* %6
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = xor i32 %12, -1
%14 = and i32 %11, %13
store i32 %14, i32* %7
%15 = load i32, i32* %6
%16 = load i32, i32* %7
%17 = or i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @mix(i32 %0, i32 %1) {
%3 = and i32 %0, 255
%4 = and i32 %1, -256
%5 = or i32 %4, %3
ret i32 %5
}