xunge/DecIR huggingface dataset:
/* Variables and functions */
void *string_dup(char *);
void *rcxb_rawnamenode_hook_copy(void *hook) {
  char *rawname = (char *)hook;
  if (rawname) {
    return string_dup(rawname);
  }
  return NULL;
}


x86 assembly (clang, -O0):
<rcxb_rawnamenode_hook_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1141 <rcxb_rawnamenode_hook_copy+0x31>
mov    -0x18(%rbp),%rdi
call   1030 <string_dup@plt>
mov    %rax,-0x8(%rbp)
jmp    1149 <rcxb_rawnamenode_hook_copy+0x39>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcxb_rawnamenode_hook_copy>:
test   %rdi,%rdi
je     111a <rcxb_rawnamenode_hook_copy+0xa>
jmp    1030 <string_dup@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @rcxb_rawnamenode_hook_copy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %4
%10 = call i8* @string_dup(i8* %9)
store i8* %10, i8** %2
br label %12
11: ; preds = %1
store i8* null, i8** %2
br label %12
12: ; preds = %11, %8
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
define i8* @rcxb_rawnamenode_hook_copy(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @string_dup(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_PCMPEQW(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0x75);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
}


x86 assembly (clang, -O0):
<MMX_PCMPEQW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0x75,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_PCMPEQW>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0x75,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_PCMPEQW(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 117)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @MMX_PCMPEQW(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 117)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 192
%9 = tail call i32 @addbyte(i32 %8)
ret void
}
char *exportPath() { return "/sys/class/gpio/export"; }


x86 assembly (clang, -O0):
<exportPath>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exportPath>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [23 x i8] c"/sys/class/gpio/export\00"
define i8* @exportPath() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [23 x i8] c"/sys/class/gpio/export\00"
define i8* @exportPath() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR4D_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR4D_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR4D_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR4D_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR4D_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
long evalucom() {
  if (test("~"))
    return (~evalfuns());
  else
    return (evalunot());
}


x86 assembly (clang, -O0):
<evalucom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1050 <test@plt>
cmp    $0x0,%eax
je     1164 <evalucom+0x34>
mov    $0x0,%al
call   1030 <evalfuns@plt>
xor    $0xffffffff,%eax
cltq
mov    %rax,-0x8(%rbp)
jmp    1171 <evalucom+0x41>
mov    $0x0,%al
call   1040 <evalunot@plt>
cltq
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evalucom>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1050 <test@plt>
test   %eax,%eax
je     114e <evalucom+0x1e>
xor    %eax,%eax
call   1030 <evalfuns@plt>
not    %eax
jmp    1155 <evalucom+0x25>
xor    %eax,%eax
call   1040 <evalunot@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"~\00"
define i64 @evalucom() {
%1 = alloca i64
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @test to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = call i32 (...) @evalfuns()
%6 = xor i32 %5, -1
%7 = sext i32 %6 to i64
store i64 %7, i64* %1
br label %11
8: ; preds = %0
%9 = call i32 (...) @evalunot()
%10 = sext i32 %9 to i64
store i64 %10, i64* %1
br label %11
11: ; preds = %8, %4
%12 = load i64, i64* %1
ret i64 %12
}

LLVM IR (-O2):
@.str = [2 x i8] c"~\00"
define i64 @evalucom() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @test to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32 (...) @evalfuns()
%5 = xor i32 %4, -1
br label %8
6: ; preds = %0
%7 = tail call i32 (...) @evalunot()
br label %8
8: ; preds = %6, %3
%9 = phi i32 [ %5, %3 ], [ %7, %6 ]
%10 = sext i32 %9 to i64
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ gen_is_atom(int);
bool gen_is_mobile(int devid) {
  assert(!gen_is_atom(devid));
  return ((devid & 0xf) == 0x6);
}


x86 assembly (clang, -O0):
<gen_is_mobile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <gen_is_atom@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
and    $0xf,%eax
cmp    $0x6,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_is_mobile>:
push   %rbx
mov    %edi,%ebx
call   1040 <gen_is_atom@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
and    $0xf,%ebx
xor    %eax,%eax
cmp    $0x6,%ebx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @gen_is_mobile(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gen_is_atom(i32 %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %2
%10 = and i32 %9, 15
%11 = icmp eq i32 %10, 6
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @gen_is_mobile(i32 %0) {
%2 = tail call i32 @gen_is_atom(i32 %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = and i32 %0, 15
%7 = icmp eq i32 %6, 6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
char *strncat(char *, char *, int /*<<< orphan*/);
char *strcat(char *dst, char *src) { return strncat(dst, src, strlen(src)); }


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <strncat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <strncat@plt>

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i8* @strncat(i8* %5, i8* %6, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
define i8* @strcat(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i8* @strncat(i8* %0, i8* %1, i32 %3)
ret i8* %4
}
void genbeq_out() {}


x86 assembly (clang, -O0):
<genbeq_out>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbeq_out>:
ret

LLVM IR (-O0):
define void @genbeq_out() {
ret void
}

LLVM IR (-O2):
define void @genbeq_out() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clrscr();
int /*<<< orphan*/ gotoxy(int, int);
int /*<<< orphan*/ printf(char *);
int waitForAnyKey();
int getGameSpeed(void) {
  int speed;
  clrscr();
  do {
    gotoxy(10, 5);
    printf("Select The game speed between 1 and 9.");
    speed = waitForAnyKey() - 48;
  } while (speed < 1 || speed > 9);
  return (speed);
}


x86 assembly (clang, -O0):
<getGameSpeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <clrscr@plt>
mov    $0xa,%edi
mov    $0x5,%esi
call   1060 <gotoxy@plt>
lea    0xe9b(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <waitForAnyKey@plt>
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1190 <getGameSpeed+0x50>
cmpl   $0x9,-0x4(%rbp)
setg   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    114f <getGameSpeed+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getGameSpeed>:
push   %rbx
xor    %eax,%eax
call   1030 <clrscr@plt>
lea    0xeb1(%rip),%rbx
nop
mov    $0xa,%edi
mov    $0x5,%esi
call   1060 <gotoxy@plt>
mov    %rbx,%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <waitForAnyKey@plt>
lea    -0x3a(%rax),%ecx
cmp    $0xfffffff7,%ecx
jb     1150 <getGameSpeed+0x10>
add    $0xffffffd0,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"Select The game speed between 1 and 9.\00"
define i32 @getGameSpeed() {
%1 = alloca i32
%2 = call i32 (...) @clrscr()
br label %3
3: ; preds = %14, %0
%4 = call i32 @gotoxy(i32 10, i32 5)
%5 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (...) @waitForAnyKey()
%7 = sub nsw i32 %6, 48
store i32 %7, i32* %1
br label %8
8: ; preds = %3
%9 = load i32, i32* %1
%10 = icmp slt i32 %9, 1
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %1
%13 = icmp sgt i32 %12, 9
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ true, %8 ], [ %13, %11 ]
br i1 %15, label %3, label %16
16: ; preds = %14
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
@.str = [39 x i8] c"Select The game speed between 1 and 9.\00"
define i32 @getGameSpeed() {
%1 = tail call i32 (...) @clrscr()
br label %2
2: ; preds = %2, %0
%3 = tail call i32 @gotoxy(i32 10, i32 5)
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 (...) @waitForAnyKey()
%6 = add i32 %5, -58
%7 = icmp ult i32 %6, -9
br i1 %7, label %2, label %8
8: ; preds = %2
%9 = add nsw i32 %5, -48
ret i32 %9
}
int slimproto_get_socketsendflags() { return 0; }


x86 assembly (clang, -O0):
<slimproto_get_socketsendflags>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<slimproto_get_socketsendflags>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @slimproto_get_socketsendflags() {
ret i32 0
}

LLVM IR (-O2):
define i32 @slimproto_get_socketsendflags() {
ret i32 0
}
int thirdBits(void) {
  int a, b, c;
  a = 0x49;
  b = (a << 9);
  c = (b | a);
  return (c << 15) | c;
}


x86 assembly (clang, -O0):
<thirdBits>:
push   %rbp
mov    %rsp,%rbp
movl   $0x49,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x9,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
or     -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0xf,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thirdBits>:
mov    $0x49249249,%eax
ret

LLVM IR (-O0):
define i32 @thirdBits() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 73, i32* %1
%4 = load i32, i32* %1
%5 = shl i32 %4, 9
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = load i32, i32* %1
%8 = or i32 %6, %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = shl i32 %9, 15
%11 = load i32, i32* %3
%12 = or i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @thirdBits() {
ret i32 1227133513
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct wl_resource {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_resource_post_event(struct wl_resource *, int,
                                          int /*<<< orphan*/,
                                          struct wl_resource *);
void wl_pointer_send_leave(struct wl_resource *resource_, uint32_t serial,
                           struct wl_resource *surface) {
  wl_resource_post_event(resource_, 1, serial, surface);
}


x86 assembly (clang, -O0):
<wl_pointer_send_leave>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
call   1030 <wl_resource_post_event@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_pointer_send_leave>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <wl_resource_post_event@plt>

LLVM IR (-O0):
%struct.wl_resource = type { i32 }
define void @wl_pointer_send_leave(%struct.wl_resource* %0, i32 %1, %struct.wl_resource* %2) {
%4 = alloca %struct.wl_resource*
%5 = alloca i32
%6 = alloca %struct.wl_resource*
store %struct.wl_resource* %0, %struct.wl_resource** %4
store i32 %1, i32* %5
store %struct.wl_resource* %2, %struct.wl_resource** %6
%7 = load %struct.wl_resource*, %struct.wl_resource** %4
%8 = load i32, i32* %5
%9 = load %struct.wl_resource*, %struct.wl_resource** %6
%10 = call i32 @wl_resource_post_event(%struct.wl_resource* %7, i32 1, i32 %8, %struct.wl_resource* %9)
ret void
}

LLVM IR (-O2):
%struct.wl_resource = type { i32 }
define void @wl_pointer_send_leave(%struct.wl_resource* %0, i32 %1, %struct.wl_resource* %2) {
%4 = tail call i32 @wl_resource_post_event(%struct.wl_resource* %0, i32 1, i32 %1, %struct.wl_resource* %2)
ret void
}
int fun371() { return 371; }


x86 assembly (clang, -O0):
<fun371>:
push   %rbp
mov    %rsp,%rbp
mov    $0x173,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun371>:
mov    $0x173,%eax
ret

LLVM IR (-O0):
define i32 @fun371() {
ret i32 371
}

LLVM IR (-O2):
define i32 @fun371() {
ret i32 371
}
/* Variables and functions */
int raise(int);
int raise_signal(int signum) { return raise(signum); }


x86 assembly (clang, -O0):
<raise_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <raise@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raise_signal>:
jmp    1030 <raise@plt>

LLVM IR (-O0):
define i32 @raise_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @raise(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @raise_signal(i32 %0) {
%2 = tail call i32 @raise(i32 %0)
ret i32 %2
}
/* Variables and functions */
int core10_swap(char *, int);
int U_EMRPOLYPOLYGON16_swap(char *record, int torev) {
  return (core10_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMRPOLYPOLYGON16_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core10_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRPOLYPOLYGON16_swap>:
jmp    1030 <core10_swap@plt>

LLVM IR (-O0):
define i32 @U_EMRPOLYPOLYGON16_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core10_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMRPOLYPOLYGON16_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core10_swap(i8* %0, i32 %1)
ret i32 %3
}
void gtk_tree_view_map_expanded_rows() {}


x86 assembly (clang, -O0):
<gtk_tree_view_map_expanded_rows>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_map_expanded_rows>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_map_expanded_rows() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_map_expanded_rows() {
ret void
}
/* Variables and functions */
bool nrf52_errata_160(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_160>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_160>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_160() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_160() {
ret i32 0
}
/* Variables and functions */
int EXIT_SUCCESS;
int main(int argc, char *argv[]) {
  int a = 7;
  if (a > 7)
    a = 2;
  else
    a = 3;
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x7,-0x14(%rbp)
cmpl   $0x7,-0x14(%rbp)
jle    112f <main+0x2f>
movl   $0x2,-0x14(%rbp)
jmp    1136 <main+0x36>
movl   $0x3,-0x14(%rbp)
mov    0x2ea3(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 7, i32* %6
%7 = load i32, i32* %6
%8 = icmp sgt i32 %7, 7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 2, i32* %6
br label %11
10: ; preds = %2
store i32 3, i32* %6
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* @EXIT_SUCCESS
ret i32 %12
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Variables and functions */
int __gen_tempname(char *, int /*<<< orphan*/, int, int /*<<< orphan*/);
int mkostemp(char *template, int flags) {
  return __gen_tempname(template, 0, flags, 0);
}


x86 assembly (clang, -O0):
<mkostemp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %ecx,%ecx
mov    %ecx,%esi
call   1030 <__gen_tempname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkostemp>:
mov    %esi,%edx
xor    %esi,%esi
xor    %ecx,%ecx
jmp    1030 <__gen_tempname@plt>

LLVM IR (-O0):
define i32 @mkostemp(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @__gen_tempname(i8* %5, i32 0, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @mkostemp(i8* %0, i32 %1) {
%3 = tail call i32 @__gen_tempname(i8* %0, i32 0, i32 %1, i32 0)
ret i32 %3
}
/* Type definitions */
typedef int int8_t;

/* Variables and functions */
int hd44780_ll_instruction_read();
int8_t hd44780_is_busy(void) {
  if (hd44780_ll_instruction_read() & 0x80) {
    return (-1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<hd44780_is_busy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <hd44780_ll_instruction_read@plt>
and    $0x80,%eax
cmp    $0x0,%eax
je     1139 <hd44780_is_busy+0x29>
movl   $0xffffffff,-0x4(%rbp)
jmp    1140 <hd44780_is_busy+0x30>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hd44780_is_busy>:
push   %rax
xor    %eax,%eax
call   1030 <hd44780_ll_instruction_read@plt>
movsbl %al,%eax
sar    $0x7,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hd44780_is_busy() {
%1 = alloca i32
%2 = call i32 (...) @hd44780_ll_instruction_read()
%3 = and i32 %2, 128
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 -1, i32* %1
br label %7
6: ; preds = %0
store i32 0, i32* %1
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @hd44780_is_busy() {
%1 = tail call i32 (...) @hd44780_ll_instruction_read()
%2 = shl i32 %1, 24
%3 = ashr i32 %2, 31
ret i32 %3
}
/* Type definitions */
struct user_regs_struct {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_GETREGS;
int /*<<< orphan*/ ptrace(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/ *, struct user_regs_struct *);
void read_registers(pid_t pid, struct user_regs_struct *regs) {
  ptrace(PTRACE_GETREGS, pid, NULL, regs);
}


x86 assembly (clang, -O0):
<read_registers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edx
call   1030 <ptrace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_registers>:
mov    %rsi,%rcx
mov    %edi,%esi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
xor    %edx,%edx
jmp    1030 <ptrace@plt>

LLVM IR (-O0):
%struct.user_regs_struct = type { i32 }
@PTRACE_GETREGS = global i32 0
define void @read_registers(i32 %0, %struct.user_regs_struct* %1) {
%3 = alloca i32
%4 = alloca %struct.user_regs_struct*
store i32 %0, i32* %3
store %struct.user_regs_struct* %1, %struct.user_regs_struct** %4
%5 = load i32, i32* @PTRACE_GETREGS
%6 = load i32, i32* %3
%7 = load %struct.user_regs_struct*, %struct.user_regs_struct** %4
%8 = call i32 @ptrace(i32 %5, i32 %6, i32* null, %struct.user_regs_struct* %7)
ret void
}

LLVM IR (-O2):
%struct.user_regs_struct = type { i32 }
@PTRACE_GETREGS = global i32 0
define void @read_registers(i32 %0, %struct.user_regs_struct* %1) {
%3 = load i32, i32* @PTRACE_GETREGS
%4 = tail call i32 @ptrace(i32 %3, i32 %0, i32* null, %struct.user_regs_struct* %1)
ret void
}
int test_imm_50uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x50 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_50uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x50,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_50uint64_highword_mem>:
testb  $0x50,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_50uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 80
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_50uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 343597383680
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
con_flo(d) double d;
{
  if (d > 3.00001 || d < 2.99999)
    e(1);
}


x86 assembly (clang, -O0):
<con_flo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
ja     1147 <con_flo+0x37>
movsd  0xecc(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1153 <con_flo+0x43>
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <e@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<con_flo>:
push   %rax
ucomisd 0xee7(%rip),%xmm0
ja     112b <con_flo+0x1b>
movsd  0xee5(%rip),%xmm1
ucomisd %xmm0,%xmm1
ja     112b <con_flo+0x1b>
pop    %rcx
ret
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <e@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @con_flo(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 3.000010e+00
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load double, double* %3
%8 = fcmp olt double %7, 2.999990e+00
br i1 %8, label %9, label %11
9: ; preds = %6, %1
%10 = call i32 (i32, ...) bitcast (i32 (...)* @e to i32 (i32, ...)*)(i32 1)
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @con_flo(double %0) {
%2 = fcmp ogt double %0, 3.000010e+00
%3 = fcmp olt double %0, 2.999990e+00
%4 = or i1 %2, %3
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @e to i32 (i32, ...)*)(i32 1)
br label %7
7: ; preds = %1, %5
ret i32 undef
}
/* Variables and functions */
int NR_OPEN;
int /*<<< orphan*/ close(int /*<<< orphan*/);
int /*<<< orphan*/ execvp(char *, char **);
int main(int argc, char **argv) {
  int fd = 3;
  while (fd < NR_OPEN)
    close(fd++);
  execvp("lvm", argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    0x2e99(%rip),%rcx
cmp    (%rcx),%eax
jge    1164 <main+0x44>
mov    -0x14(%rbp),%edi
mov    %edi,%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
call   1030 <close@plt>
jmp    113d <main+0x1d>
mov    -0x10(%rbp),%rsi
lea    0xe91(%rip),%rdi
call   1040 <execvp@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    0x2eb2(%rip),%rbx
cmpl   $0x4,(%rbx)
jl     114e <main+0x2e>
mov    $0x3,%edi
nopl   0x0(%rax,%rax,1)
lea    0x1(%rdi),%ebp
call   1030 <close@plt>
mov    %ebp,%edi
cmp    (%rbx),%ebp
jl     1140 <main+0x20>
lea    0xeab(%rip),%rdi
mov    %r14,%rsi
call   1040 <execvp@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@NR_OPEN = global i32 0
@.str = [4 x i8] c"lvm\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 3, i32* %6
br label %7
7: ; preds = %11, %2
%8 = load i32, i32* %6
%9 = load i32, i32* @NR_OPEN
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i32, i32* %6
%13 = add nsw i32 %12, 1
store i32 %13, i32* %6
%14 = call i32 @close(i32 %12)
br label %7
15: ; preds = %7
%16 = load i8**, i8*** %5
%17 = call i32 @execvp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %16)
ret i32 0
}

LLVM IR (-O2):
@NR_OPEN = global i32 0
@.str = [4 x i8] c"lvm\00"
define i32 @main(i32 %0, i8** %1) {
%3 = load i32, i32* @NR_OPEN
%4 = icmp sgt i32 %3, 3
br i1 %4, label %5, label %11
5: ; preds = %2, %5
%6 = phi i32 [ %7, %5 ], [ 3, %2 ]
%7 = add nuw nsw i32 %6, 1
%8 = tail call i32 @close(i32 %6)
%9 = load i32, i32* @NR_OPEN
%10 = icmp slt i32 %7, %9
br i1 %10, label %5, label %11
11: ; preds = %5, %2
%12 = tail call i32 @execvp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xa0() {
  Assert_real((isxdigit(160) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              805, ("isxdigit should be 0 for 0xa0"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xa0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa0,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x325,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xa0>:
push   %rax
mov    $0xa0,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x325,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xa0\00"
define void @t_isxdigit_0xa0() {
%1 = call i64 @isxdigit(i32 160)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 805, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xa0\00"
define void @t_isxdigit_0xa0() {
%1 = tail call i64 @isxdigit(i32 160)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 805, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void fa47(void) {
P0A:
  goto P0A;
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    p01B:
      goto p01B;
      goto a;
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    a:
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa47>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa47+0x4>

x86 assembly (clang, -O2):
<fa47>:
jmp    1100 <fa47>

LLVM IR (-O0):
define void @fa47() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; No predecessors!
br label %11
11: ; preds = %11, %10
br label %11
12: ; preds = %12
br label %12
13: ; preds = %13
br label %13
14: ; No predecessors!
br label %15
15: ; preds = %15, %14
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa47() {
br label %1
1: ; preds = %1, %0
br label %1
}
void libc_rand_deinit(void) {}


x86 assembly (clang, -O0):
<libc_rand_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libc_rand_deinit>:
ret

LLVM IR (-O0):
define void @libc_rand_deinit() {
ret void
}

LLVM IR (-O2):
define void @libc_rand_deinit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void FLASH_pp_on() {
  mbus_remote_register_write(0x5, 0x09, 0x0 << 6 | 0x1 << 5 | 0x6 << 1 | 0x1);
}


x86 assembly (clang, -O0):
<FLASH_pp_on>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x9,%esi
mov    $0x2d,%edx
call   1030 <mbus_remote_register_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FLASH_pp_on>:
mov    $0x5,%edi
mov    $0x9,%esi
mov    $0x2d,%edx
jmp    1030 <mbus_remote_register_write@plt>

LLVM IR (-O0):
define void @FLASH_pp_on() {
%1 = call i32 @mbus_remote_register_write(i32 5, i32 9, i32 45)
ret void
}

LLVM IR (-O2):
define void @FLASH_pp_on() {
%1 = tail call i32 @mbus_remote_register_write(i32 5, i32 9, i32 45)
ret void
}
void add_two_numbers(double a, double b, double *c) { *c = a + b; }


x86 assembly (clang, -O0):
<add_two_numbers>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_two_numbers>:
addsd  %xmm1,%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @add_two_numbers(double %0, double %1, double* %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double*
store double %0, double* %4
store double %1, double* %5
store double* %2, double** %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fadd double %7, %8
%10 = load double*, double** %6
store double %9, double* %10
ret void
}

LLVM IR (-O2):
define void @add_two_numbers(double %0, double %1, double* nocapture writeonly %2) {
%4 = fadd double %0, %1
store double %4, double* %2
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *calloc(size_t nmemb, size_t size) {
  void *buf;
  buf = malloc(nmemb * size);
  if (buf != 0) {
    memset(buf, 0, nmemb * size);
  }
  return buf;
}


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1161 <calloc+0x41>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
imul   -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %rax,%rax
je     1148 <calloc+0x28>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = mul i64 %6, %7
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %18
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = mul i64 %14, %15
%17 = call i32 @memset(i8* %13, i32 0, i64 %16)
br label %18
18: ; preds = %12, %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @memset(i8* %4, i32 0, i64 %3)
br label %8
8: ; preds = %6, %2
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ SV_MasterGameCompleteStatus();
void SV_GameCompleteStatus_f(void) { SV_MasterGameCompleteStatus(); }


x86 assembly (clang, -O0):
<SV_GameCompleteStatus_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SV_MasterGameCompleteStatus@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SV_GameCompleteStatus_f>:
xor    %eax,%eax
jmp    1030 <SV_MasterGameCompleteStatus@plt>

LLVM IR (-O0):
define void @SV_GameCompleteStatus_f() {
%1 = call i32 (...) @SV_MasterGameCompleteStatus()
ret void
}

LLVM IR (-O2):
define void @SV_GameCompleteStatus_f() {
%1 = tail call i32 (...) @SV_MasterGameCompleteStatus()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ httpdate_snprint(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int log_date(FILE *stream) {
  char date[256];
  httpdate_snprint(date, 256, time(NULL));
  return fprintf(stream, "[%s] ", date);
}


x86 assembly (clang, -O0):
<log_date>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x110(%rbp),%rax
mov    %rax,-0x118(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    -0x118(%rbp),%rdi
mov    %eax,%edx
mov    $0x100,%esi
call   1050 <httpdate_snprint@plt>
mov    -0x8(%rbp),%rdi
lea    -0x110(%rbp),%rdx
lea    0xe85(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_date>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <time@plt>
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x100,%esi
mov    %eax,%edx
call   1050 <httpdate_snprint@plt>
lea    0xea3(%rip),%rsi
mov    %rbx,%rdi
mov    %r14,%rdx
call   1030 <fprintf@plt>
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"[%s] \00"
define i32 @log_date(i32* %0) {
%2 = alloca i32*
%3 = alloca [256 x i8]
store i32* %0, i32** %2
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @time(i32* null)
%6 = call i32 @httpdate_snprint(i8* %4, i32 256, i32 %5)
%7 = load i32*, i32** %2
%8 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%9 = call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 %9
}

LLVM IR (-O2):
@.str = [6 x i8] c"[%s] \00"
define i32 @log_date(i32* nocapture %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @time(i32* null)
%5 = call i32 @httpdate_snprint(i8* %3, i32 256, i32 %4)
%6 = call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %6
}
double mod(double x, double oneoverm, double m) {
  return x - m * ((double)((unsigned long long)(x * oneoverm)));
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm3
movaps %xmm1,%xmm2
mulsd  %xmm3,%xmm2
movaps %xmm2,%xmm3
cvttsd2si %xmm3,%rax
mov    %rax,%rdx
sar    $0x3f,%rdx
movsd  0xec0(%rip),%xmm3
subsd  %xmm3,%xmm2
cvttsd2si %xmm2,%rcx
and    %rdx,%rcx
or     %rcx,%rax
movq   %rax,%xmm2
movaps 0xeb5(%rip),%xmm3
punpckldq %xmm3,%xmm2
movapd 0xeb9(%rip),%xmm3
subpd  %xmm3,%xmm2
movaps %xmm2,%xmm3
unpckhpd %xmm2,%xmm2
addsd  %xmm3,%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%rax
mov    %rax,%rcx
subsd  0xeec(%rip),%xmm1
cvttsd2si %xmm1,%rdx
sar    $0x3f,%rcx
and    %rcx,%rdx
or     %rax,%rdx
movq   %rdx,%xmm1
punpckldq 0xee0(%rip),%xmm1
subpd  0xee8(%rip),%xmm1
movapd %xmm1,%xmm3
unpckhpd %xmm1,%xmm3
addsd  %xmm1,%xmm3
mulsd  %xmm2,%xmm3
subsd  %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @mod(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %6
%9 = load double, double* %4
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = fptoui double %11 to i64
%13 = uitofp i64 %12 to double
%14 = fneg double %8
%15 = call double @llvm.fmuladd.f64(double %14, double %13, double %7)
ret double %15
}

LLVM IR (-O2):
define double @mod(double %0, double %1, double %2) {
%4 = fmul double %0, %1
%5 = fptoui double %4 to i64
%6 = uitofp i64 %5 to double
%7 = fneg double %2
%8 = tail call double @llvm.fmuladd.f64(double %7, double %6, double %0)
ret double %8
}
/* Type definitions */
typedef int /*<<< orphan*/ c;

/* Variables and functions */
int /*<<< orphan*/ print(char *, int);
void printi(int i) {
  if (i / 10 != 0)
    printi(i / 10);
  char c = (char)(i % 10 + 48);
  print(&c, sizeof(c));
}


x86 assembly (clang, -O0):
<printi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
cmp    $0x0,%eax
je     1151 <printi+0x31>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <printi@plt>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x30,%edx
mov    %dl,%al
mov    %al,-0x5(%rbp)
lea    -0x5(%rbp),%rdi
mov    $0x1,%esi
call   1040 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printi>:
push   %rbx
sub    $0x10,%rsp
lea    0x9(%rdi),%eax
movslq %edi,%rbx
cmp    $0x13,%eax
jb     1149 <printi+0x29>
imul   $0x66666667,%rbx,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
sar    $0x22,%rdi
add    %eax,%edi
call   1030 <printi@plt>
imul   $0x66666667,%rbx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x22,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%ebx
add    $0x30,%bl
mov    %bl,0xf(%rsp)
lea    0xf(%rsp),%rdi
mov    $0x1,%esi
call   1040 <print@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @printi(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 10
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sdiv i32 %8, 10
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 10
%13 = add nsw i32 %12, 48
%14 = trunc i32 %13 to i8
store i8 %14, i8* %3
%15 = call i32 @print(i8* %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @printi(i32 %0) {
%2 = alloca i8
%3 = add i32 %0, 9
%4 = icmp ult i32 %3, 19
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = sdiv i32 %0, 10
tail call void @printi(i32 %6)
br label %7
7: ; preds = %5, %1
%8 = srem i32 %0, 10
%9 = trunc i32 %8 to i8
%10 = add nsw i8 %9, 48
store i8 %10, i8* %2
%11 = call i32 @print(i8* %2, i32 1)
ret void
}
/* Variables and functions */
double ln(scalar_t__);
scalar_t__ sqrt(double);
double arccosh(double n) { return ln(n + sqrt(n * n - 1)); }


x86 assembly (clang, -O0):
<arccosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb3(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sd %rax,%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1040 <ln@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arccosh>:
push   %rax
movsd  %xmm0,(%rsp)
mulsd  %xmm0,%xmm0
addsd  0xece(%rip),%xmm0
call   1030 <sqrt@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  (%rsp),%xmm0
cvttsd2si %xmm0,%rdi
pop    %rax
jmp    1040 <ln@plt>

LLVM IR (-O0):
define double @arccosh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double %4, double %5, double -1.000000e+00)
%7 = call i64 @sqrt(double %6)
%8 = sitofp i64 %7 to double
%9 = fadd double %3, %8
%10 = fptosi double %9 to i64
%11 = call double @ln(i64 %10)
ret double %11
}

LLVM IR (-O2):
define double @arccosh(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double %0, double -1.000000e+00)
%3 = tail call i64 @sqrt(double %2)
%4 = sitofp i64 %3 to double
%5 = fadd double %4, %0
%6 = fptosi double %5 to i64
%7 = tail call double @ln(i64 %6)
ret double %7
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t encode_base(const char base) {
  switch (base) {
  case 'A':
  case 'a':
    return 0x0;
  case 'C':
  case 'c':
    return 0x1;
  case 'G':
  case 'g':
    return 0x2;
  case 'T':
  case 't':
    return 0x3;
  case 'N':
  case 'n':
    return 0x4;
  default:
    return 0x7;
  }
}


x86 assembly (clang, -O0):
<encode_base>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x33,%eax
ja     1170 <encode_base+0x70>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1177 <encode_base+0x77>
movl   $0x1,-0x4(%rbp)
jmp    1177 <encode_base+0x77>
movl   $0x2,-0x4(%rbp)
jmp    1177 <encode_base+0x77>
movl   $0x3,-0x4(%rbp)
jmp    1177 <encode_base+0x77>
movl   $0x4,-0x4(%rbp)
jmp    1177 <encode_base+0x77>
movl   $0x7,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_base>:
add    $0xffffffbf,%edi
cmp    $0x33,%edi
ja     1132 <encode_base+0x32>
xor    %eax,%eax
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x1,%eax
ret
mov    $0x2,%eax
ret
mov    $0x4,%eax
ret
mov    $0x3,%eax
ret
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @encode_base(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %11 [
i32 65, label %6
i32 97, label %6
i32 67, label %7
i32 99, label %7
i32 71, label %8
i32 103, label %8
i32 84, label %9
i32 116, label %9
i32 78, label %10
i32 110, label %10
]
6: ; preds = %1, %1
store i32 0, i32* %2
br label %12
7: ; preds = %1, %1
store i32 1, i32* %2
br label %12
8: ; preds = %1, %1
store i32 2, i32* %2
br label %12
9: ; preds = %1, %1
store i32 3, i32* %2
br label %12
10: ; preds = %1, %1
store i32 4, i32* %2
br label %12
11: ; preds = %1
store i32 7, i32* %2
br label %12
12: ; preds = %11, %10, %9, %8, %7, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @encode_base(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %7 [
i32 65, label %8
i32 97, label %8
i32 67, label %3
i32 99, label %3
i32 71, label %4
i32 103, label %4
i32 84, label %5
i32 116, label %5
i32 78, label %6
i32 110, label %6
]
3: ; preds = %1, %1
br label %8
4: ; preds = %1, %1
br label %8
5: ; preds = %1, %1
br label %8
6: ; preds = %1, %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %1, %7, %6, %5, %4, %3
%9 = phi i32 [ 7, %7 ], [ 4, %6 ], [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %9
}
int test_imm_9Eint64_midword_reg(long long val) {
  return ((val >> 16) & (0x9E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Eint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x9e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Eint64_midword_reg>:
test   $0x9e0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Eint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 158
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Eint64_midword_reg(i64 %0) {
%2 = and i64 %0, 10354688
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}