xunge/DecIR huggingface dataset:
void mread(fd, address, bytes) int fd, bytes;
char *address;
{
  if (bread(fd, address, bytes) != bytes)
    error("Tar: read error.", ((char *)0));
}


x86 assembly (clang, -O0):
<mread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x0,%al
call   1030 <bread@plt>
cmp    -0x14(%rbp),%eax
je     115e <mread+0x3e>
lea    0xead(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x0,%al
call   1040 <error@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mread>:
push   %rbx
mov    %edx,%ebx
xor    %eax,%eax
call   1030 <bread@plt>
cmp    %ebx,%eax
jne    1130 <mread+0x10>
pop    %rbx
ret
lea    0xec9(%rip),%rdi
xor    %esi,%esi
xor    %eax,%eax
pop    %rbx
jmp    1040 <error@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Tar: read error.\00"
define void @mread(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @bread to i32 (i32, i8*, i32, ...)*)(i32 %7, i8* %8, i32 %9)
%11 = load i32, i32* %6
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* null)
br label %15
15: ; preds = %13, %3
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Tar: read error.\00"
define void @mread(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @bread to i32 (i32, i8*, i32, ...)*)(i32 %0, i8* %1, i32 %2)
%5 = icmp eq i32 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* null)
br label %8
8: ; preds = %6, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Driver_Display_Bitmap(char *, int, int);
void Display_Bitmap_On_Screen(char *buffer, int line, int col) {
  Driver_Display_Bitmap(buffer, line, col);
}


x86 assembly (clang, -O0):
<Display_Bitmap_On_Screen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <Driver_Display_Bitmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Display_Bitmap_On_Screen>:
jmp    1030 <Driver_Display_Bitmap@plt>

LLVM IR (-O0):
define void @Display_Bitmap_On_Screen(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @Driver_Display_Bitmap(i8* %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @Display_Bitmap_On_Screen(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @Driver_Display_Bitmap(i8* %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lprintf(char *, int);
int system(char *);
void start_gconf(void) {
  int ret;
  ret = system("gconftool-2 --spawn");
  if (ret)
    lprintf("failure to start gconftool-2: %d", ret);
}


x86 assembly (clang, -O0):
<start_gconf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <system@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1150 <start_gconf+0x30>
mov    -0x4(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1040 <lprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_gconf>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
test   %eax,%eax
je     1140 <start_gconf+0x20>
lea    0xedc(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <lprintf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [20 x i8] c"gconftool-2 --spawn\00"
@.str.1 = [33 x i8] c"failure to start gconftool-2: %d\00"
define void @start_gconf() {
%1 = alloca i32
%2 = call i32 @system(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32, i32* %1
%7 = call i32 @lprintf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"gconftool-2 --spawn\00"
@.str.1 = [33 x i8] c"failure to start gconftool-2: %d\00"
define void @start_gconf() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @lprintf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %1)
br label %5
5: ; preds = %3, %0
ret void
}
/* Type definitions */
struct EmuState {
  int dummy;
};

/* Variables and functions */
int EXIT_FAILURE;
int decode_dummy(struct EmuState *state) { return EXIT_FAILURE; }


x86 assembly (clang, -O0):
<decode_dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_dummy>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.EmuState = type { i32 }
@EXIT_FAILURE = global i32 0
define i32 @decode_dummy(%struct.EmuState* %0) {
%2 = alloca %struct.EmuState*
store %struct.EmuState* %0, %struct.EmuState** %2
%3 = load i32, i32* @EXIT_FAILURE
ret i32 %3
}

LLVM IR (-O2):
%struct.EmuState = type { i32 }
@EXIT_FAILURE = global i32 0
define i32 @decode_dummy(%struct.EmuState* nocapture readnone %0) {
%2 = load i32, i32* @EXIT_FAILURE
ret i32 %2
}
void check_negative_sized_VLA_3() {
  int x = -1;
  int vla[x];
}


x86 assembly (clang, -O0):
<check_negative_sized_VLA_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_negative_sized_VLA_3>:
ret

LLVM IR (-O0):
define void @check_negative_sized_VLA_3() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
store i32 -1, i32* %1
%4 = load i32, i32* %1
%5 = zext i32 %4 to i64
%6 = call i8* @llvm.stacksave()
store i8* %6, i8** %2
%7 = alloca i32, i64 %5
store i64 %5, i64* %3
%8 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @check_negative_sized_VLA_3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ splitSumInner(int, int, int);
void splitSum(int original, int flag) { splitSumInner(original, 1, flag); }


x86 assembly (clang, -O0):
<splitSum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x1,%esi
call   1030 <splitSumInner@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<splitSum>:
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <splitSumInner@plt>

LLVM IR (-O0):
define void @splitSum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @splitSumInner(i32 %5, i32 1, i32 %6)
ret void
}

LLVM IR (-O2):
define void @splitSum(i32 %0, i32 %1) {
%3 = tail call i32 @splitSumInner(i32 %0, i32 1, i32 %1)
ret void
}
/* Type definitions */
struct char_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ send_to_char(char *, struct char_data *);
void do_practice(struct char_data *ch, char *arg, int cmd) {
  send_to_char("You can only practise in a guild.\r\n", ch);
}


x86 assembly (clang, -O0):
<do_practice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed2(%rip),%rdi
call   1030 <send_to_char@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_practice>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <send_to_char@plt>

LLVM IR (-O0):
%struct.char_data = type { i32 }
@.str = [36 x i8] c"You can only practise in a guild.\0D\0A\00"
define void @do_practice(%struct.char_data* %0, i8* %1, i32 %2) {
%4 = alloca %struct.char_data*
%5 = alloca i8*
%6 = alloca i32
store %struct.char_data* %0, %struct.char_data** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.char_data*, %struct.char_data** %4
%8 = call i32 @send_to_char(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), %struct.char_data* %7)
ret void
}

LLVM IR (-O2):
%struct.char_data = type { i32 }
@.str = [36 x i8] c"You can only practise in a guild.\0D\0A\00"
define void @do_practice(%struct.char_data* %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 @send_to_char(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), %struct.char_data* %0)
ret void
}
int shrink_async_thread_pool() { return 0; }


x86 assembly (clang, -O0):
<shrink_async_thread_pool>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shrink_async_thread_pool>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @shrink_async_thread_pool() {
ret i32 0
}

LLVM IR (-O2):
define i32 @shrink_async_thread_pool() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int /*<<< orphan*/ *malloc(int);
int /*<<< orphan*/ memset(int /*<<< orphan*/ *, int /*<<< orphan*/, int);
fd_set *llio_alloc_fdset() {
  fd_set *set;
  set = malloc(sizeof(fd_set));
  if (!set)
    return NULL;
  memset(set, 0, sizeof(fd_set));
  return set;
}


x86 assembly (clang, -O0):
<llio_alloc_fdset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <llio_alloc_fdset+0x2e>
movq   $0x0,-0x8(%rbp)
jmp    1166 <llio_alloc_fdset+0x46>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<llio_alloc_fdset>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1142 <llio_alloc_fdset+0x22>
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32* @llio_alloc_fdset() {
%1 = alloca i32*
%2 = alloca i32*
%3 = call i32* @malloc(i32 4)
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %7, label %6
6: ; preds = %0
store i32* null, i32** %1
br label %11
7: ; preds = %0
%8 = load i32*, i32** %2
%9 = call i32 @memset(i32* %8, i32 0, i32 4)
%10 = load i32*, i32** %2
store i32* %10, i32** %1
br label %11
11: ; preds = %7, %6
%12 = load i32*, i32** %1
ret i32* %12
}

LLVM IR (-O2):
define i32* @llio_alloc_fdset() {
%1 = tail call i32* @malloc(i32 4)
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @memset(i32* %1, i32 0, i32 4)
br label %5
5: ; preds = %0, %3
ret i32* %1
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void AnsiTerm_cursor_up(uint16_t cells) { printf("\x1B[%dA", cells); }


x86 assembly (clang, -O0):
<AnsiTerm_cursor_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnsiTerm_cursor_up>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dA\00"
define void @AnsiTerm_cursor_up(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dA\00"
define void @AnsiTerm_cursor_up(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/, int /*<<< orphan*/);
int main(int argc, char **argv) {
  int n = 1;
  printf("%d %d\n", n++, n++);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edx
mov    %edx,%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 1, i32* %5
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = add nsw i32 %8, 1
store i32 %9, i32* %5
%10 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 1, i32 2)
ret i32 0
}
void triple_swap(unsigned char *a, unsigned char *b, unsigned char *c) {
  unsigned char t = *c;
  *c = *b;
  *b = *a;
  *a = t;
}


x86 assembly (clang, -O0):
<triple_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x19(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<triple_swap>:
mov    (%rdx),%al
mov    (%rsi),%cl
mov    %cl,(%rdx)
mov    (%rdi),%cl
mov    %cl,(%rsi)
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @triple_swap(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = load i8, i8* %8
store i8 %9, i8* %7
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = load i8*, i8** %6
store i8 %11, i8* %12
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = load i8*, i8** %5
store i8 %14, i8* %15
%16 = load i8, i8* %7
%17 = load i8*, i8** %4
store i8 %16, i8* %17
ret void
}

LLVM IR (-O2):
define void @triple_swap(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
%4 = load i8, i8* %2
%5 = load i8, i8* %1
store i8 %5, i8* %2
%6 = load i8, i8* %0
store i8 %6, i8* %1
store i8 %4, i8* %0
ret void
}
/* Variables and functions */
double log(double);
double intr_wrap_048(double p1) { return log(p1); }


x86 assembly (clang, -O0):
<intr_wrap_048>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_048>:
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @intr_wrap_048(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log(double %3)
ret double %4
}

LLVM IR (-O2):
define double @intr_wrap_048(double %0) {
%2 = tail call double @log(double %0)
ret double %2
}
/* Variables and functions */
size_t get_max_value(size_t minval, size_t maxval, size_t defval) {
  if (minval > maxval) {
    return defval;
  }
  return maxval;
}


x86 assembly (clang, -O0):
<get_max_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    112b <get_max_value+0x2b>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1133 <get_max_value+0x33>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_max_value>:
mov    %rdx,%rax
cmp    %rsi,%rdi
cmovbe %rsi,%rax
ret

LLVM IR (-O0):
define i64 @get_max_value(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = icmp ugt i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i64, i64* %7
store i64 %12, i64* %4
br label %15
13: ; preds = %3
%14 = load i64, i64* %6
store i64 %14, i64* %4
br label %15
15: ; preds = %13, %11
%16 = load i64, i64* %4
ret i64 %16
}

LLVM IR (-O2):
define i64 @get_max_value(i64 %0, i64 %1, i64 %2) {
%4 = icmp ugt i64 %0, %1
%5 = select i1 %4, i64 %2, i64 %1
ret i64 %5
}
extern void __outl(unsigned int value, unsigned short port) {
  __asm__ __volatile__("out"
                       "l"
                       " %"
                       "0,%"
                       "w"
                       "1"
                       :
                       : "a"(value), "d"(port));
}


x86 assembly (clang, -O0):
<__outl>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x6(%rbp),%dx
out    %eax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__outl>:
mov    %esi,%edx
mov    %edi,%eax
out    %eax,(%dx)
ret

LLVM IR (-O0):
define void @__outl(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i32, i32* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @__outl(i32 %0, i16 zeroext %1) {
tail call void asm sideeffect "outl $0,${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i16 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fib(int);
int foo(void) { fib(32); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x20,%edi
call   1030 <fib@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x20,%edi
jmp    1030 <fib@plt>

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = call i32 @fib(i32 32)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @foo() {
%1 = tail call i32 @fib(i32 32)
ret i32 undef
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR7E_get(void) { return U_WMRCORENONE_get("U_WMR7E"); }


x86 assembly (clang, -O0):
<U_WMR7E_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR7E_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR7E\00"
define i32 @U_WMR7E_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR7E\00"
define i32 @U_WMR7E_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void display_boden(int x, int y, int xpos, int ypos) {}


x86 assembly (clang, -O0):
<display_boden>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_boden>:
ret

LLVM IR (-O0):
define void @display_boden(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @display_boden(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t clampi(int v) {
  if (v < 0)
    return 0;
  else if (v > 255)
    return 255;
  else
    return (uint8_t)v;
}


x86 assembly (clang, -O0):
<clampi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <clampi+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    113c <clampi+0x3c>
cmpl   $0xff,-0x8(%rbp)
jle    1136 <clampi+0x36>
movl   $0xff,-0x4(%rbp)
jmp    113c <clampi+0x3c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clampi>:
cmp    $0xff,%edi
mov    $0xff,%ecx
cmovl  %edi,%ecx
xor    %eax,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @clampi(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 255
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 255, i32* %2
br label %13
11: ; preds = %7
%12 = load i32, i32* %3
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %10, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @clampi(i32 %0) {
%2 = icmp slt i32 %0, 255
%3 = select i1 %2, i32 %0, i32 255
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ err;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char *);
int /*<<< orphan*/ sp_werror(char *, int);
int /*<<< orphan*/ strerror_r(int, char *, int);
void sp_suerror(char *s, int ecode) {
  char err[256];
  char buf[512];
  strerror_r(ecode, err, sizeof(err));
  snprintf(buf, sizeof(buf), "%s: %s", s, err);
  sp_werror(buf, ecode);
}


x86 assembly (clang, -O0):
<sp_suerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x310,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
lea    -0x110(%rbp),%rsi
mov    $0x100,%edx
call   1050 <strerror_r@plt>
lea    -0x310(%rbp),%rdi
mov    -0x8(%rbp),%rcx
lea    -0x110(%rbp),%r8
mov    $0x200,%esi
lea    0xe8c(%rip),%rdx
call   1040 <snprintf@plt>
lea    -0x310(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sp_werror@plt>
add    $0x310,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_suerror>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x308,%rsp
mov    %esi,%ebx
mov    %rdi,%r14
mov    %rsp,%r15
mov    %esi,%edi
mov    %r15,%rsi
mov    $0x100,%edx
call   1050 <strerror_r@plt>
lea    0xea4(%rip),%rdx
lea    0x100(%rsp),%r12
mov    %r12,%rdi
mov    $0x200,%esi
mov    %r14,%rcx
mov    %r15,%r8
call   1040 <snprintf@plt>
mov    %r12,%rdi
mov    %ebx,%esi
call   1030 <sp_werror@plt>
add    $0x308,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%s: %s\00"
define void @sp_suerror(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [256 x i8]
%6 = alloca [512 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%9 = call i32 @strerror_r(i32 %7, i8* %8, i32 256)
%10 = getelementptr inbounds [512 x i8], [512 x i8]* %6, i64 0, i64 0
%11 = load i8*, i8** %3
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%13 = call i32 @snprintf(i8* %10, i32 512, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %11, i8* %12)
%14 = getelementptr inbounds [512 x i8], [512 x i8]* %6, i64 0, i64 0
%15 = load i32, i32* %4
%16 = call i32 @sp_werror(i8* %14, i32 %15)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s: %s\00"
define void @sp_suerror(i8* %0, i32 %1) {
%3 = alloca [256 x i8]
%4 = alloca [512 x i8]
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%6 = getelementptr inbounds [512 x i8], [512 x i8]* %4, i64 0, i64 0
%7 = call i32 @strerror_r(i32 %1, i8* %5, i32 256)
%8 = call i32 @snprintf(i8* %6, i32 512, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %5)
%9 = call i32 @sp_werror(i8* %6, i32 %1)
ret void
}
void delay(int cnt) {
  int i;
  for (i = 0; i < cnt; i++)
    __asm__("nop");
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1129 <delay+0x29>
nop
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <delay+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
test   %edi,%edi
jle    1116 <delay+0x16>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
nop
add    $0xffffffff,%edi
jne    1110 <delay+0x10>
ret

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %7
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ 0, %1 ]
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%5 = add nuw nsw i32 %4, 1
%6 = icmp eq i32 %5, %0
br i1 %6, label %7, label %3
7: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ __stdfix_sat_uhk(scalar_t__);
uint32_t __stdfix_ssub_uhk(uint32_t x, uint32_t y) {
  return (__stdfix_sat_uhk((uint32_t)x - (uint32_t)y));
}


x86 assembly (clang, -O0):
<__stdfix_ssub_uhk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
sub    -0x10(%rbp),%rdi
call   1030 <__stdfix_sat_uhk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_ssub_uhk>:
sub    %rsi,%rdi
jmp    1030 <__stdfix_sat_uhk@plt>

LLVM IR (-O0):
define i64 @__stdfix_ssub_uhk(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
%8 = call i64 @__stdfix_sat_uhk(i64 %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @__stdfix_ssub_uhk(i64 %0, i64 %1) {
%3 = sub nsw i64 %0, %1
%4 = tail call i64 @__stdfix_sat_uhk(i64 %3)
ret i64 %4
}
__attribute__((always_)) void
percpu_counter_destroy(struct percpu_counter *fbc) {}


x86 assembly (clang, -O0):
<percpu_counter_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<percpu_counter_destroy>:
ret

LLVM IR (-O0):
%struct.percpu_counter = type opaque
define void @percpu_counter_destroy(%struct.percpu_counter* %0) {
%2 = alloca %struct.percpu_counter*
store %struct.percpu_counter* %0, %struct.percpu_counter** %2
ret void
}

LLVM IR (-O2):
%struct.percpu_counter = type opaque
define void @percpu_counter_destroy(%struct.percpu_counter* nocapture %0) {
ret void
}
int bitfinder(int a, int b) {
  b = b >> a;
  int r = b & 1;
  return r;
}


x86 assembly (clang, -O0):
<bitfinder>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitfinder>:
mov    %esi,%eax
mov    %edi,%ecx
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bitfinder(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = ashr i32 %6, %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = and i32 %9, 1
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @bitfinder(i32 %0, i32 %1) {
%3 = lshr i32 %1, %0
%4 = and i32 %3, 1
ret i32 %4
}
int lcd_mod_is_valid(int mod) { return 0; }


x86 assembly (clang, -O0):
<lcd_mod_is_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_mod_is_valid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lcd_mod_is_valid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @lcd_mod_is_valid(i32 %0) {
ret i32 0
}
/* Variables and functions */
int accept(int const, int /*<<< orphan*/, int /*<<< orphan*/);
int net_accept(const int sock) { return accept(sock, 0, 0); }


x86 assembly (clang, -O0):
<net_accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <accept@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_accept>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <accept@plt>

LLVM IR (-O0):
define i32 @net_accept(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @accept(i32 %3, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @net_accept(i32 %0) {
%2 = tail call i32 @accept(i32 %0, i32 0, i32 0)
ret i32 %2
}
int f(void) { return 3; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 3
}

LLVM IR (-O2):
define i32 @f() {
ret i32 3
}
/* Variables and functions */
char const *iamareffunc(char);
__attribute__((no, hot)) const char *ihaveareffunc(char opt) {
  return iamareffunc(opt + 1);
}


x86 assembly (clang, -O0):
<ihaveareffunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x1,%eax
movsbl %al,%edi
call   1030 <iamareffunc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ihaveareffunc>:
add    $0x1,%dil
movsbl %dil,%edi
jmp    1030 <iamareffunc@plt>
nopl   (%rax)

LLVM IR (-O0):
define i8* @ihaveareffunc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = add nsw i32 %4, 1
%6 = trunc i32 %5 to i8
%7 = call i8* @iamareffunc(i8 signext %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @ihaveareffunc(i8 signext %0) {
%2 = add i8 %0, 1
%3 = tail call i8* @iamareffunc(i8 signext %2)
ret i8* %3
}
/* Variables and functions */
int getpagesize();
int pd_getpagesize() { return getpagesize(); }


x86 assembly (clang, -O0):
<pd_getpagesize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpagesize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pd_getpagesize>:
xor    %eax,%eax
jmp    1030 <getpagesize@plt>

LLVM IR (-O0):
define i32 @pd_getpagesize() {
%1 = call i32 (...) @getpagesize()
ret i32 %1
}

LLVM IR (-O2):
define i32 @pd_getpagesize() {
%1 = tail call i32 (...) @getpagesize()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ print_target_indices(char *, int const *);
void print_display_device_target_indices(const int *pData) {
  print_target_indices("DPY", pData);
}


x86 assembly (clang, -O0):
<print_display_device_target_indices>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <print_target_indices@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_display_device_target_indices>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <print_target_indices@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"DPY\00"
define void @print_display_device_target_indices(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @print_target_indices(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"DPY\00"
define void @print_display_device_target_indices(i32* %0) {
%2 = tail call i32 @print_target_indices(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %0)
ret void
}
/* Type definitions */
struct h261_picparm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct h261_picparm *);
void h261_del_picparm(struct h261_picparm *picparm) { free(picparm); }


x86 assembly (clang, -O0):
<h261_del_picparm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h261_del_picparm>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.h261_picparm = type { i32 }
define void @h261_del_picparm(%struct.h261_picparm* %0) {
%2 = alloca %struct.h261_picparm*
store %struct.h261_picparm* %0, %struct.h261_picparm** %2
%3 = load %struct.h261_picparm*, %struct.h261_picparm** %2
%4 = call i32 @free(%struct.h261_picparm* %3)
ret void
}

LLVM IR (-O2):
%struct.h261_picparm = type { i32 }
define void @h261_del_picparm(%struct.h261_picparm* nocapture %0) {
%2 = tail call i32 @free(%struct.h261_picparm* %0)
ret void
}
void EPIConfigGPModeSet(unsigned long ulBase, unsigned long ulConfig,
                        unsigned long ulFrameCount, unsigned long ulMaxWait) {
  ;
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000014))) =
      ((ulConfig & 0x00000100) ? 0x80000000 : 0);
  ulConfig &= ~0x03C00000;
  ulConfig |= ulFrameCount << 22;
  ulConfig &= ~0x0000FF00;
  ulConfig |= ulMaxWait << 8;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = ulConfig;
}


x86 assembly (clang, -O0):
<EPIConfigGPModeSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdx
and    $0x100,%rdx
xor    %eax,%eax
mov    $0x80000000,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x14(%rax)
mov    -0x10(%rbp),%rax
and    $0xfffffffffc3fffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x16,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xffffffffffff00ff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x8,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIConfigGPModeSet>:
mov    %esi,%eax
and    $0x100,%eax
shl    $0x17,%rax
mov    %rax,0x14(%rdi)
and    $0xfffffffffc3f00ff,%rsi
shl    $0x16,%rdx
or     %rsi,%rdx
shl    $0x8,%rcx
or     %rdx,%rcx
mov    %rcx,0x10(%rdi)
ret

LLVM IR (-O0):
define void @EPIConfigGPModeSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %6
%10 = and i64 %9, 256
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 -2147483648, i32 0
%14 = zext i32 %13 to i64
%15 = load i64, i64* %5
%16 = add i64 %15, 20
%17 = inttoptr i64 %16 to i64*
store volatile i64 %14, i64* %17
%18 = load i64, i64* %6
%19 = and i64 %18, -62914561
store i64 %19, i64* %6
%20 = load i64, i64* %7
%21 = shl i64 %20, 22
%22 = load i64, i64* %6
%23 = or i64 %22, %21
store i64 %23, i64* %6
%24 = load i64, i64* %6
%25 = and i64 %24, -65281
store i64 %25, i64* %6
%26 = load i64, i64* %8
%27 = shl i64 %26, 8
%28 = load i64, i64* %6
%29 = or i64 %28, %27
store i64 %29, i64* %6
%30 = load i64, i64* %6
%31 = load i64, i64* %5
%32 = add i64 %31, 16
%33 = inttoptr i64 %32 to i64*
store volatile i64 %30, i64* %33
ret void
}

LLVM IR (-O2):
define void @EPIConfigGPModeSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = shl i64 %1, 23
%6 = and i64 %5, 2147483648
%7 = add i64 %0, 20
%8 = inttoptr i64 %7 to i64*
store volatile i64 %6, i64* %8
%9 = and i64 %1, -62979841
%10 = shl i64 %2, 22
%11 = or i64 %10, %9
%12 = shl i64 %3, 8
%13 = or i64 %11, %12
%14 = add i64 %0, 16
%15 = inttoptr i64 %14 to i64*
store volatile i64 %13, i64* %15
ret void
}
/* Variables and functions */
unsigned long GetFPSL35();
unsigned long getfpsl() { return GetFPSL35(); }


x86 assembly (clang, -O0):
<getfpsl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GetFPSL35@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getfpsl>:
xor    %eax,%eax
jmp    1030 <GetFPSL35@plt>

LLVM IR (-O0):
define i64 @getfpsl() {
%1 = call i64 (...) @GetFPSL35()
ret i64 %1
}

LLVM IR (-O2):
define i64 @getfpsl() {
%1 = tail call i64 (...) @GetFPSL35()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ assert(char const *);
scalar_t__ strstr(char const *, char const *);
int trio_contains(const char *string, const char *substring) {
  assert(string);
  assert(substring);
  return (0 != strstr(string, substring));
}


x86 assembly (clang, -O0):
<trio_contains>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strstr@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trio_contains>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %r14,%rdi
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <strstr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @trio_contains(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @assert(i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i64 @strstr(i8* %9, i8* %10)
%12 = icmp ne i64 0, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @trio_contains(i8* %0, i8* %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = tail call i32 @assert(i8* %1)
%5 = tail call i64 @strstr(i8* %0, i8* %1)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ GameLoop();
int /*<<< orphan*/ InitGame();
int /*<<< orphan*/ printf(char *);
int main() {
  InitGame();
  printf("You are X. AI is O.\n");
  GameLoop();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <InitGame@plt>
lea    0xeb3(%rip),%rdi
call   1050 <printf@plt>
mov    $0x0,%al
call   1030 <GameLoop@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <InitGame@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <GameLoop@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"You are X. AI is O.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @InitGame()
%3 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @GameLoop()
ret i32 0
}

LLVM IR (-O2):
@str = [20 x i8] c"You are X. AI is O.\00"
define i32 @main() {
%1 = tail call i32 (...) @InitGame()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @GameLoop()
ret i32 0
}
void gtk_tree_view_get_type() {}


x86 assembly (clang, -O0):
<gtk_tree_view_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_get_type>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_get_type() {
ret void
}
/* Variables and functions */
char *strchr(const char *s, int c) {
  do {
    if (*s == ((char)c)) {
      return (char *)s;
    }
  } while (*s++);
  return NULL;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x14(%rbp),%ecx
movsbl %cl,%ecx
cmp    %ecx,%eax
jne    112d <strchr+0x2d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <strchr+0x52>
jmp    1132 <strchr+0x32>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,(%rax)
jne    110b <strchr+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
movsbl %sil,%ecx
nopw   0x0(%rax,%rax,1)
movsbl (%rax),%edx
cmp    %edx,%ecx
je     1121 <strchr+0x21>
add    $0x1,%rax
test   %dl,%dl
jne    1110 <strchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = trunc i32 %10 to i8
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %9, %12
br i1 %13, label %14, label %16
14: ; preds = %6
%15 = load i8*, i8** %4
store i8* %15, i8** %3
br label %23
16: ; preds = %6
br label %17
17: ; preds = %16
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %4
%20 = load i8, i8* %18
%21 = icmp ne i8 %20, 0
br i1 %21, label %6, label %22
22: ; preds = %17
store i8* null, i8** %3
br label %23
23: ; preds = %22, %14
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
%3 = shl i32 %1, 24
%4 = ashr exact i32 %3, 24
br label %5
5: ; preds = %10, %2
%6 = phi i8* [ %0, %2 ], [ %11, %10 ]
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %4, %8
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = icmp eq i8 %7, 0
br i1 %12, label %13, label %5
13: ; preds = %10, %5
%14 = phi i8* [ %6, %5 ], [ null, %10 ]
ret i8* %14
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *, int, char *);
void fprintf_int(FILE *s, char *m1, int x, char *m2) {
  fprintf(s, "%s = %d%s", m1, x, m2);
}


x86 assembly (clang, -O0):
<fprintf_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%r8
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprintf_int>:
mov    %rcx,%r8
mov    %edx,%ecx
mov    %rsi,%rdx
lea    0xee1(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"%s = %d%s\00"
define void @fprintf_int(i32* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i32* %0, i32** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %8
%13 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %10, i32 %11, i8* %12)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%s = %d%s\00"
define void @fprintf_int(i32* nocapture %0, i8* %1, i32 %2, i8* %3) {
%5 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2, i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
scalar_t__ getgroups(int, short *);
int setgroups(int, short *);
int main() {
  short x[4];
  x[0] = x[1] = 0;
  if (getgroups(1, x) == 0)
    if (setgroups(1, x) == -1)
      _exit(1);
  _exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movw   $0x0,-0xa(%rbp)
movw   $0x0,-0xc(%rbp)
lea    -0xc(%rbp),%rsi
mov    $0x1,%edi
call   1050 <getgroups@plt>
cmp    $0x0,%rax
jne    1189 <main+0x59>
lea    -0xc(%rbp),%rsi
mov    $0x1,%edi
call   1040 <setgroups@plt>
cmp    $0xffffffff,%eax
jne    1184 <main+0x54>
mov    $0x1,%edi
call   1030 <_exit@plt>
jmp    1189 <main+0x59>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,(%rsp)
mov    %rsp,%rsi
mov    $0x1,%edi
call   1050 <getgroups@plt>
test   %rax,%rax
jne    1166 <main+0x36>
mov    %rsp,%rsi
mov    $0x1,%edi
call   1040 <setgroups@plt>
cmp    $0xffffffff,%eax
jne    1166 <main+0x36>
mov    $0x1,%edi
call   1030 <_exit@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i16]
store i32 0, i32* %1
%3 = getelementptr inbounds [4 x i16], [4 x i16]* %2, i64 0, i64 1
store i16 0, i16* %3
%4 = getelementptr inbounds [4 x i16], [4 x i16]* %2, i64 0, i64 0
store i16 0, i16* %4
%5 = getelementptr inbounds [4 x i16], [4 x i16]* %2, i64 0, i64 0
%6 = call i64 @getgroups(i32 1, i16* %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %0
%9 = getelementptr inbounds [4 x i16], [4 x i16]* %2, i64 0, i64 0
%10 = call i32 @setgroups(i32 1, i16* %9)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 @_exit(i32 1)
unreachable
14: ; preds = %8
br label %15
15: ; preds = %14, %0
%16 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [4 x i16]
%2 = bitcast [4 x i16]* %1 to i8*
%3 = getelementptr inbounds [4 x i16], [4 x i16]* %1, i64 0, i64 1
store i16 0, i16* %3
%4 = getelementptr inbounds [4 x i16], [4 x i16]* %1, i64 0, i64 0
store i16 0, i16* %4
%5 = call i64 @getgroups(i32 1, i16* %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %0
%8 = call i32 @setgroups(i32 1, i16* %4)
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @_exit(i32 1)
unreachable
12: ; preds = %7, %0
%13 = call i32 @_exit(i32 0)
unreachable
}
void pm_access(struct pm_dev *dev) {}


x86 assembly (clang, -O0):
<pm_access>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm_access>:
ret

LLVM IR (-O0):
%struct.pm_dev = type opaque
define void @pm_access(%struct.pm_dev* %0) {
%2 = alloca %struct.pm_dev*
store %struct.pm_dev* %0, %struct.pm_dev** %2
ret void
}

LLVM IR (-O2):
%struct.pm_dev = type opaque
define void @pm_access(%struct.pm_dev* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OnePointIteration(double);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void TestOnePointIteration() {
  printf("Test One Point Iteration: for x=3.0; root = %lf\n",
         OnePointIteration(3.0));
}


x86 assembly (clang, -O0):
<TestOnePointIteration>:
push   %rbp
mov    %rsp,%rbp
movsd  0xed4(%rip),%xmm0
call   1040 <OnePointIteration@plt>
mov    %eax,%esi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestOnePointIteration>:
push   %rax
movsd  0xed7(%rip),%xmm0
call   1040 <OnePointIteration@plt>
lea    0xed3(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"Test One Point Iteration: for x=3.0; root = %lf\0A\00"
define void @TestOnePointIteration() {
%1 = call i32 @OnePointIteration(double 3.000000e+00)
%2 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [49 x i8] c"Test One Point Iteration: for x=3.0; root = %lf\0A\00"
define void @TestOnePointIteration() {
%1 = tail call i32 @OnePointIteration(double 3.000000e+00)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}