xunge/DecIR huggingface dataset:
/* Variables and functions */
#define SIGCHLD 129
#define SIGHUP 128
int /*<<< orphan*/ _inetd_sigchld();
int /*<<< orphan*/ _inetd_sighup();
void _inetd_sighandler(int signum) {
  switch (signum) {
  case SIGCHLD:
    _inetd_sigchld();
    break;
  case SIGHUP:
    _inetd_sighup();
    break;
  }
}


x86 assembly (clang, -O0):
<_inetd_sighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x80,%eax
je     1160 <_inetd_sighandler+0x40>
jmp    1141 <_inetd_sighandler+0x21>
mov    -0x8(%rbp),%eax
sub    $0x81,%eax
jne    1167 <_inetd_sighandler+0x47>
jmp    1154 <_inetd_sighandler+0x34>
mov    $0x0,%al
call   1040 <_inetd_sigchld@plt>
jmp    1167 <_inetd_sighandler+0x47>
mov    $0x0,%al
call   1030 <_inetd_sighup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_inetd_sighandler>:
cmp    $0x80,%edi
je     1137 <_inetd_sighandler+0x17>
cmp    $0x81,%edi
jne    113e <_inetd_sighandler+0x1e>
xor    %eax,%eax
jmp    1040 <_inetd_sigchld@plt>
xor    %eax,%eax
jmp    1030 <_inetd_sighup@plt>
ret

LLVM IR (-O0):
define void @_inetd_sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 129, label %4
i32 128, label %6
]
4: ; preds = %1
%5 = call i32 (...) @_inetd_sigchld()
br label %8
6: ; preds = %1
%7 = call i32 (...) @_inetd_sighup()
br label %8
8: ; preds = %1, %6, %4
ret void
}

LLVM IR (-O2):
define void @_inetd_sighandler(i32 %0) {
switch i32 %0, label %6 [
i32 129, label %2
i32 128, label %4
]
2: ; preds = %1
%3 = tail call i32 (...) @_inetd_sigchld()
br label %6
4: ; preds = %1
%5 = tail call i32 (...) @_inetd_sighup()
br label %6
6: ; preds = %1, %4, %2
ret void
}
long long int __attribute__((no, noclone))
foo(long long int i, long long int j) {
  asm("");
  return i + j;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i64 @foo(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @foo(i64 %0, i64 %1) {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
%3 = add nsw i64 %1, %0
ret i64 %3
}
int is_in_bound(int *arr, int size, int *ptr) {
  if (ptr - arr > 0 && ptr - arr < size) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
cmp    $0x0,%rax
jle    1150 <is_in_bound+0x50>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
movslq -0x14(%rbp),%rcx
cmp    %rcx,%rax
jge    1150 <is_in_bound+0x50>
movl   $0x1,-0x4(%rbp)
jmp    1157 <is_in_bound+0x57>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
sub    %rdi,%rdx
test   %rdx,%rdx
jle    1119 <is_in_bound+0x19>
shr    $0x2,%rdx
movslq %esi,%rcx
mov    $0x1,%eax
cmp    %rcx,%rdx
jl     111b <is_in_bound+0x1b>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i32*, i32** %7
%9 = load i32*, i32** %5
%10 = ptrtoint i32* %8 to i64
%11 = ptrtoint i32* %9 to i64
%12 = sub i64 %10, %11
%13 = sdiv exact i64 %12, 4
%14 = icmp sgt i64 %13, 0
br i1 %14, label %15, label %26
15: ; preds = %3
%16 = load i32*, i32** %7
%17 = load i32*, i32** %5
%18 = ptrtoint i32* %16 to i64
%19 = ptrtoint i32* %17 to i64
%20 = sub i64 %18, %19
%21 = sdiv exact i64 %20, 4
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = icmp slt i64 %21, %23
br i1 %24, label %25, label %26
25: ; preds = %15
store i32 1, i32* %4
br label %27
26: ; preds = %15, %3
store i32 0, i32* %4
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = ptrtoint i32* %2 to i64
%5 = ptrtoint i32* %0 to i64
%6 = sub i64 %4, %5
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %3
%9 = lshr exact i64 %6, 2
%10 = sext i32 %1 to i64
%11 = icmp slt i64 %9, %10
br i1 %11, label %13, label %12
12: ; preds = %8, %3
br label %13
13: ; preds = %8, %12
%14 = phi i32 [ 0, %12 ], [ 1, %8 ]
ret i32 %14
}
int int_ops_sll(int l, int r) { return l << r; }


x86 assembly (clang, -O0):
<int_ops_sll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_ops_sll>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @int_ops_sll(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @int_ops_sll(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
ret i32 %3
}
/* Type definitions */
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pci_lock_rescan_remove();
int /*<<< orphan*/ pci_stop_and_remove_bus_device(struct pci_dev *);
int /*<<< orphan*/ pci_unlock_rescan_remove();
void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev) {
  pci_lock_rescan_remove();
  pci_stop_and_remove_bus_device(dev);
  pci_unlock_rescan_remove();
}


x86 assembly (clang, -O0):
<pci_stop_and_remove_bus_device_locked>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <pci_lock_rescan_remove@plt>
mov    -0x8(%rbp),%rdi
call   1050 <pci_stop_and_remove_bus_device@plt>
mov    $0x0,%al
call   1030 <pci_unlock_rescan_remove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_stop_and_remove_bus_device_locked>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <pci_lock_rescan_remove@plt>
mov    %rbx,%rdi
call   1050 <pci_stop_and_remove_bus_device@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <pci_unlock_rescan_remove@plt>

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
define void @pci_stop_and_remove_bus_device_locked(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
%3 = call i32 (...) @pci_lock_rescan_remove()
%4 = load %struct.pci_dev*, %struct.pci_dev** %2
%5 = call i32 @pci_stop_and_remove_bus_device(%struct.pci_dev* %4)
%6 = call i32 (...) @pci_unlock_rescan_remove()
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
define void @pci_stop_and_remove_bus_device_locked(%struct.pci_dev* %0) {
%2 = tail call i32 (...) @pci_lock_rescan_remove()
%3 = tail call i32 @pci_stop_and_remove_bus_device(%struct.pci_dev* %0)
%4 = tail call i32 (...) @pci_unlock_rescan_remove()
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ die(char *);
scalar_t__ fork();
int in_child_process() {
  pid_t child = fork();
  if (child < 0) {
    die("Could not fork process\n");
  }
  return !child;
}


x86 assembly (clang, -O0):
<in_child_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <fork@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    114a <in_child_process+0x2a>
lea    0xebb(%rip),%rdi
call   1030 <die@plt>
cmpq   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_child_process>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
mov    %rax,%rbx
test   %rax,%rax
jns    113c <in_child_process+0x1c>
lea    0xec9(%rip),%rdi
call   1030 <die@plt>
xor    %eax,%eax
test   %rbx,%rbx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"Could not fork process\0A\00"
define i32 @in_child_process() {
%1 = alloca i64
%2 = call i64 (...) @fork()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @die(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = load i64, i64* %1
%9 = icmp ne i64 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@.str = [24 x i8] c"Could not fork process\0A\00"
define i32 @in_child_process() {
%1 = tail call i64 (...) @fork()
%2 = icmp slt i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @die(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
%6 = icmp eq i64 %1, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t direct_write8(volatile uint8_t *addr, uint8_t dat) {
  *addr = dat;
  return dat;
}


x86 assembly (clang, -O0):
<direct_write8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<direct_write8>:
mov    %esi,%eax
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define i32 @direct_write8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store volatile i32 %5, i32* %6
%7 = load i32, i32* %4
ret i32 %7
}

LLVM IR (-O2):
define i32 @direct_write8(i32* %0, i32 returned %1) {
store volatile i32 %1, i32* %0
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ string_quicksort(char **, int /*<<< orphan*/, unsigned int);
void string_quick_sort(char **strings, unsigned int arr_size) {
  if (strings == 0 || arr_size == 0)
    return;
  string_quicksort(strings, 0, arr_size - 1);
}


x86 assembly (clang, -O0):
<string_quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1134 <string_quick_sort+0x24>
cmpl   $0x0,-0xc(%rbp)
jne    1139 <string_quick_sort+0x29>
jmp    114a <string_quick_sort+0x3a>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <string_quicksort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_quick_sort>:
test   %rdi,%rdi
je     1125 <string_quick_sort+0x15>
mov    %esi,%edx
test   %esi,%esi
je     1125 <string_quick_sort+0x15>
add    $0xffffffff,%edx
xor    %esi,%esi
jmp    1030 <string_quicksort@plt>
ret

LLVM IR (-O0):
define void @string_quick_sort(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = icmp eq i8** %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %2
br label %16
11: ; preds = %7
%12 = load i8**, i8*** %3
%13 = load i32, i32* %4
%14 = sub i32 %13, 1
%15 = call i32 @string_quicksort(i8** %12, i32 0, i32 %14)
br label %16
16: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
define void @string_quick_sort(i8** %0, i32 %1) {
%3 = icmp eq i8** %0, null
%4 = icmp eq i32 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = add i32 %1, -1
%8 = tail call i32 @string_quicksort(i8** %0, i32 0, i32 %7)
br label %9
9: ; preds = %2, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help() {
  printf(
      "arpreply target options:\n"
      " --arpreply-mac address           : source MAC of generated reply\n"
      " --arpreply-target target         : ACCEPT, DROP, RETURN or CONTINUE\n"
      "                                    (standard target is DROP)\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [223 x i8] c"arpreply target options:\0A --arpreply-mac address : source MAC of generated reply\0A --arpreply-target target : ACCEPT, DROP, RETURN or CONTINUE\0A (standard target is DROP)\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([223 x i8], [223 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [222 x i8] c"arpreply target options:\0A --arpreply-mac address : source MAC of generated reply\0A --arpreply-target target : ACCEPT, DROP, RETURN or CONTINUE\0A (standard target is DROP)\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([222 x i8], [222 x i8]* @str, i64 0, i64 0))
ret void
}
void Friction(double F[2], const double q[2], const double qdot[2]) {
  F[0] = 50 * qdot[0];
  F[1] = 50 * qdot[1];
}


x86 assembly (clang, -O0):
<Friction>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsd  0xee4(%rip),%xmm0
mulsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
movsd  0xecc(%rip),%xmm0
mulsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Friction>:
movsd  0xef8(%rip),%xmm0
movsd  (%rdx),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,(%rdi)
mulsd  0x8(%rdx),%xmm0
movsd  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @Friction(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %6
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = fmul double 5.000000e+01, %9
%11 = load double*, double** %4
%12 = getelementptr inbounds double, double* %11, i64 0
store double %10, double* %12
%13 = load double*, double** %6
%14 = getelementptr inbounds double, double* %13, i64 1
%15 = load double, double* %14
%16 = fmul double 5.000000e+01, %15
%17 = load double*, double** %4
%18 = getelementptr inbounds double, double* %17, i64 1
store double %16, double* %18
ret void
}

LLVM IR (-O2):
define void @Friction(double* nocapture writeonly %0, double* nocapture readnone %1, double* nocapture %2) {
%4 = load double, double* %2
%5 = fmul double %4, 5.000000e+01
store double %5, double* %0
%6 = getelementptr inbounds double, double* %2, i64 1
%7 = load double, double* %6
%8 = fmul double %7, 5.000000e+01
%9 = getelementptr inbounds double, double* %0, i64 1
store double %8, double* %9
ret void
}
/* Variables and functions */
size_t func_inputs_max(void) { return 2; }


x86 assembly (clang, -O0):
<func_inputs_max>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_inputs_max>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i64 @func_inputs_max() {
ret i64 2
}

LLVM IR (-O2):
define i64 @func_inputs_max() {
ret i64 2
}
/* Variables and functions */
char *fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
char *VM_getline(char *buf, int size) { return fgets(buf, size, stdin); }


x86 assembly (clang, -O0):
<VM_getline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
call   1030 <fgets@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VM_getline>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
jmp    1030 <fgets@plt>

LLVM IR (-O0):
@stdin = global i32 0
define i8* @VM_getline(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @stdin
%8 = call i8* @fgets(i8* %5, i32 %6, i32 %7)
ret i8* %8
}

LLVM IR (-O2):
@stdin = global i32 0
define i8* @VM_getline(i8* %0, i32 %1) {
%3 = load i32, i32* @stdin
%4 = tail call i8* @fgets(i8* %0, i32 %1, i32 %3)
ret i8* %4
}
/* Variables and functions */
double sla_pa(double *, double *, double *);
double csla_pa(double ha, double dec, double phi) {
  return sla_pa(&ha, &dec, &phi);
}


x86 assembly (clang, -O0):
<csla_pa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <sla_pa@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<csla_pa>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
movsd  %xmm2,(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
call   1030 <sla_pa@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @csla_pa(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = call double @sla_pa(double* %4, double* %5, double* %6)
ret double %7
}

LLVM IR (-O2):
define double @csla_pa(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = call double @sla_pa(double* %4, double* %5, double* %6)
ret double %7
}
/* Variables and functions */
int chaz_CC_test_macro(char *, char const *);
int chaz_CC_test_sun_c_version(const char *predicate) {
  return chaz_CC_test_macro("__SUNPRO_C", predicate);
}


x86 assembly (clang, -O0):
<chaz_CC_test_sun_c_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <chaz_CC_test_macro@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_CC_test_sun_c_version>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <chaz_CC_test_macro@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"__SUNPRO_C\00"
define i32 @chaz_CC_test_sun_c_version(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @chaz_CC_test_macro(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [11 x i8] c"__SUNPRO_C\00"
define i32 @chaz_CC_test_sun_c_version(i8* %0) {
%2 = tail call i32 @chaz_CC_test_macro(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
unsigned char ccmram_get(unsigned int address) {
  return ((unsigned char *)0x10000000)[address];
}


x86 assembly (clang, -O0):
<ccmram_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    $0x10000000,%eax
movzbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccmram_get>:
mov    %edi,%eax
mov    0x10000000(%rax),%al
ret

LLVM IR (-O0):
define zeroext i8 @ccmram_get(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* inttoptr (i64 268435456 to i8*), i64 %4
%6 = load i8, i8* %5
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @ccmram_get(i32 %0) {
%2 = zext i32 %0 to i64
%3 = getelementptr inbounds i8, i8* inttoptr (i64 268435456 to i8*), i64 %2
%4 = load i8, i8* %3
ret i8 %4
}
/* Variables and functions */
int _ctype_lookup(int);
int isgraph(int c) { return _ctype_lookup(c) & (0x10 | 0x01 | 0x02 | 0x04); }


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_ctype_lookup@plt>
and    $0x17,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
push   %rax
call   1030 <_ctype_lookup@plt>
and    $0x17,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_ctype_lookup(i32 %3)
%5 = and i32 %4, 23
ret i32 %5
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
%2 = tail call i32 @_ctype_lookup(i32 %0)
%3 = and i32 %2, 23
ret i32 %3
}
int os_net_init(void) { return 0; }


x86 assembly (clang, -O0):
<os_net_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_net_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @os_net_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @os_net_init() {
ret i32 0
}
/* Variables and functions */
char *strchr(char const *, char);
int strlen(char const *);
unsigned get_basename_without_extension_len(const char *basename) {
  const char *retval = strchr(basename, '.');
  return retval ? retval - basename : strlen(basename);
}


x86 assembly (clang, -O0):
<get_basename_without_extension_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115d <get_basename_without_extension_len+0x3d>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    116c <get_basename_without_extension_len+0x4c>
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_basename_without_extension_len>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2e,%esi
call   1040 <strchr@plt>
test   %rax,%rax
je     1138 <get_basename_without_extension_len+0x18>
sub    %rbx,%rax
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_basename_without_extension_len(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i8 signext 46)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i8*, i8** %2
%11 = ptrtoint i8* %9 to i64
%12 = ptrtoint i8* %10 to i64
%13 = sub i64 %11, %12
br label %18
14: ; preds = %1
%15 = load i8*, i8** %2
%16 = call i32 @strlen(i8* %15)
%17 = sext i32 %16 to i64
br label %18
18: ; preds = %14, %8
%19 = phi i64 [ %13, %8 ], [ %17, %14 ]
%20 = trunc i64 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @get_basename_without_extension_len(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 46)
%3 = icmp eq i8* %2, null
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = ptrtoint i8* %2 to i64
%6 = ptrtoint i8* %0 to i64
%7 = sub i64 %5, %6
br label %11
8: ; preds = %1
%9 = tail call i32 @strlen(i8* %0)
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %8, %4
%12 = phi i64 [ %7, %4 ], [ %10, %8 ]
%13 = trunc i64 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void display(int *array, int size) {
  for (int i = 0; i < size; i++) {
    printf("%d, ", array[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <display+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <display+0x16>
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <display+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <display+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%d, \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @display(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d, \00"
define void @display(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
void orgfx_vga_set_vbara(unsigned int addr) {
  *((volatile unsigned int *)((0x97000000 + 0x014))) = addr;
}


x86 assembly (clang, -O0):
<orgfx_vga_set_vbara>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x97000014,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<orgfx_vga_set_vbara>:
mov    $0x97000014,%eax
mov    %edi,(%rax)
ret

LLVM IR (-O0):
define void @orgfx_vga_set_vbara(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 2533359636 to i32*)
ret void
}

LLVM IR (-O2):
define void @orgfx_vga_set_vbara(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 2533359636 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ latent_use_after_free(int, int *);
int *malloc(int);
int main(int argc, char **argv) {
  int *x = malloc(sizeof(int));
  if (x) {
    latent_use_after_free(argc, x);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115b <main+0x3b>
mov    -0x8(%rbp),%edi
mov    -0x18(%rbp),%rsi
call   1040 <latent_use_after_free@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <malloc@plt>
test   %rax,%rax
je     113c <main+0x1c>
mov    %ebx,%edi
mov    %rax,%rsi
call   1040 <latent_use_after_free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32* @malloc(i32 4)
store i32* %7, i32** %6
%8 = load i32*, i32** %6
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32*, i32** %6
%13 = call i32 @latent_use_after_free(i32 %11, i32* %12)
br label %14
14: ; preds = %10, %2
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* @malloc(i32 4)
%4 = icmp eq i32* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @latent_use_after_free(i32 %0, i32* %3)
br label %7
7: ; preds = %5, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int write(int, int *, int);
int writeport_bin(int fd, int t) {
  int n = write(fd, &t, 1);
  if (n < 0)
    fputs("write() failed!\n", stderr);
  return 0;
}


x86 assembly (clang, -O0):
<writeport_bin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1161 <writeport_bin+0x41>
mov    0x2e8d(%rip),%rax
mov    (%rax),%esi
lea    0xea4(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeport_bin>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
test   %eax,%eax
jns    114d <writeport_bin+0x2d>
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
lea    0xeb8(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"write() failed!\0A\00"
@stderr = global i32 0
define i32 @writeport_bin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @write(i32 %6, i32* %4, i32 1)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = call i32 @fputs(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %10, %2
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"write() failed!\0A\00"
@stderr = global i32 0
define i32 @writeport_bin(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @write(i32 %0, i32* %3, i32 1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, i32* @stderr
%8 = tail call i32 @fputs(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6, %2
ret i32 0
}
void ff_hevc_put_hevc_uni_qpel_h48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_h48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_h48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_h48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_h48_10_sse4() {
ret void
}
int dummy_2(int a, int b, int c) { return a + b + c; }


x86 assembly (clang, -O0):
<dummy_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_2>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @dummy_2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @dummy_2(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ type;
};
typedef TYPE_1__ XExposeEvent;

/* Variables and functions */
int get_XExposeEvent_type(void *_p) { return (int)((XExposeEvent *)_p)->type; }


x86 assembly (clang, -O0):
<get_XExposeEvent_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XExposeEvent_type>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XExposeEvent_type(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XExposeEvent_type(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int HelpItem52(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem52>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem52>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem52() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem52() {
ret i32 0
}
/* Variables and functions */
float atan2(float, float);
float hypot(float, float);
void from_cartesian_to_polar(float *y, float *x) {
  y[0] = hypot(x[0], x[1]);
  y[1] = atan2(x[1], x[0]);
}


x86 assembly (clang, -O0):
<from_cartesian_to_polar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm1
call   1040 <hypot@plt>
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm1
call   1030 <atan2@plt>
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_cartesian_to_polar>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
movss  (%rsi),%xmm0
movss  0x4(%rsi),%xmm1
call   1040 <hypot@plt>
movss  %xmm0,(%r14)
movss  (%rbx),%xmm1
movss  0x4(%rbx),%xmm0
call   1030 <atan2@plt>
movss  %xmm0,0x4(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @from_cartesian_to_polar(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 1
%10 = load float, float* %9
%11 = call float @hypot(float %7, float %10)
%12 = load float*, float** %3
%13 = getelementptr inbounds float, float* %12, i64 0
store float %11, float* %13
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = load float*, float** %4
%18 = getelementptr inbounds float, float* %17, i64 0
%19 = load float, float* %18
%20 = call float @atan2(float %16, float %19)
%21 = load float*, float** %3
%22 = getelementptr inbounds float, float* %21, i64 1
store float %20, float* %22
ret void
}

LLVM IR (-O2):
define void @from_cartesian_to_polar(float* nocapture writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = getelementptr inbounds float, float* %1, i64 1
%5 = load float, float* %4
%6 = tail call float @hypot(float %3, float %5)
store float %6, float* %0
%7 = load float, float* %4
%8 = load float, float* %1
%9 = tail call float @atan2(float %7, float %8)
%10 = getelementptr inbounds float, float* %0, i64 1
store float %9, float* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *const, unsigned int);
bool fi_array_data_copy(const void *const src, void *dest, unsigned n) {
  if (src && dest) {
    memcpy(dest, src, n);
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<fi_array_data_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1155 <fi_array_data_copy+0x45>
cmpq   $0x0,-0x18(%rbp)
je     1155 <fi_array_data_copy+0x45>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <memcpy@plt>
movl   $0x1,-0x4(%rbp)
jmp    115c <fi_array_data_copy+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi_array_data_copy>:
xor    %eax,%eax
test   %rdi,%rdi
je     1134 <fi_array_data_copy+0x24>
test   %rsi,%rsi
je     1134 <fi_array_data_copy+0x24>
push   %rax
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    %rcx,%rsi
call   1030 <memcpy@plt>
mov    $0x1,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @fi_array_data_copy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %18
10: ; preds = %3
%11 = load i8*, i8** %6
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %18
13: ; preds = %10
%14 = load i8*, i8** %6
%15 = load i8*, i8** %5
%16 = load i32, i32* %7
%17 = call i32 @memcpy(i8* %14, i8* %15, i32 %16)
store i32 1, i32* %4
br label %19
18: ; preds = %10, %3
store i32 0, i32* %4
br label %19
19: ; preds = %18, %13
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @fi_array_data_copy(i8* %0, i8* %1, i32 %2) {
%4 = icmp ne i8* %0, null
%5 = icmp ne i8* %1, null
%6 = and i1 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @memcpy(i8* %1, i8* %0, i32 %2)
br label %9
9: ; preds = %3, %7
%10 = phi i32 [ 1, %7 ], [ 0, %3 ]
ret i32 %10
}
/* Type definitions */
struct ln_gal_posn {
  int dummy;
};
struct ln_equ_posn {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ln_get_equ_from_gal(struct ln_gal_posn *,
                                       struct ln_equ_posn *);
int /*<<< orphan*/ ln_get_equ_prec2(struct ln_equ_posn *, double, double,
                                    struct ln_equ_posn *);
void ln_get_equ2000_from_gal(struct ln_gal_posn *gal, struct ln_equ_posn *equ) {
  ln_get_equ_from_gal(gal, equ);
  ln_get_equ_prec2(equ, 2433282.4235, 2451545.0, equ);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <ln_get_equ_from_gal@plt>
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsd  0xeb3(%rip),%xmm0
movsd  0xeb3(%rip),%xmm1
call   1030 <ln_get_equ_prec2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbx
mov    %rsi,%rbx
call   1040 <ln_get_equ_from_gal@plt>
movsd  0xecf(%rip),%xmm0
movsd  0xecf(%rip),%xmm1
mov    %rbx,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <ln_get_equ_prec2@plt>

LLVM IR (-O0):
%struct.ln_gal_posn = type { i32 }
%struct.ln_equ_posn = type { i32 }
define void @ln_get_equ2000_from_gal(%struct.ln_gal_posn* %0, %struct.ln_equ_posn* %1) {
%3 = alloca %struct.ln_gal_posn*
%4 = alloca %struct.ln_equ_posn*
store %struct.ln_gal_posn* %0, %struct.ln_gal_posn** %3
store %struct.ln_equ_posn* %1, %struct.ln_equ_posn** %4
%5 = load %struct.ln_gal_posn*, %struct.ln_gal_posn** %3
%6 = load %struct.ln_equ_posn*, %struct.ln_equ_posn** %4
%7 = call i32 @ln_get_equ_from_gal(%struct.ln_gal_posn* %5, %struct.ln_equ_posn* %6)
%8 = load %struct.ln_equ_posn*, %struct.ln_equ_posn** %4
%9 = load %struct.ln_equ_posn*, %struct.ln_equ_posn** %4
%10 = call i32 @ln_get_equ_prec2(%struct.ln_equ_posn* %8, double 0x4142908136353F7D, double 0x4142B42C80000000, %struct.ln_equ_posn* %9)
ret void
}

LLVM IR (-O2):
%struct.ln_gal_posn = type { i32 }
%struct.ln_equ_posn = type { i32 }
define void @ln_get_equ2000_from_gal(%struct.ln_gal_posn* %0, %struct.ln_equ_posn* %1) {
%3 = tail call i32 @ln_get_equ_from_gal(%struct.ln_gal_posn* %0, %struct.ln_equ_posn* %1)
%4 = tail call i32 @ln_get_equ_prec2(%struct.ln_equ_posn* %1, double 0x4142908136353F7D, double 0x4142B42C80000000, %struct.ln_equ_posn* %1)
ret void
}
/* Variables and functions */
int check_execveat_invoked_rc(int, char const *, int, int, int);
int check_execveat(int fd, const char *path, int flags) {
  return check_execveat_invoked_rc(fd, path, flags, 99, 99);
}


x86 assembly (clang, -O0):
<check_execveat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x63,%r8d
mov    %r8d,%ecx
call   1030 <check_execveat_invoked_rc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_execveat>:
mov    $0x63,%ecx
mov    $0x63,%r8d
jmp    1030 <check_execveat_invoked_rc@plt>

LLVM IR (-O0):
define i32 @check_execveat(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @check_execveat_invoked_rc(i32 %7, i8* %8, i32 %9, i32 99, i32 99)
ret i32 %10
}

LLVM IR (-O2):
define i32 @check_execveat(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @check_execveat_invoked_rc(i32 %0, i8* %1, i32 %2, i32 99, i32 99)
ret i32 %4
}
void SDCard_DisableRxInt(void) {}


x86 assembly (clang, -O0):
<SDCard_DisableRxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDCard_DisableRxInt>:
ret

LLVM IR (-O0):
define void @SDCard_DisableRxInt() {
ret void
}

LLVM IR (-O2):
define void @SDCard_DisableRxInt() {
ret void
}
/* Variables and functions */
scalar_t__ CallBack2(int, void *, void *);
int VarNameToDataType(const char *varName, int *dataTypePtr) {
  return (int)CallBack2(190, (void *)varName, (void *)dataTypePtr);
}


x86 assembly (clang, -O0):
<VarNameToDataType>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0xbe,%edi
call   1030 <CallBack2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VarNameToDataType>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0xbe,%edi
jmp    1030 <CallBack2@plt>

LLVM IR (-O0):
define i32 @VarNameToDataType(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = bitcast i32* %6 to i8*
%8 = call i64 @CallBack2(i32 190, i8* %5, i8* %7)
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @VarNameToDataType(i8* %0, i32* %1) {
%3 = bitcast i32* %1 to i8*
%4 = tail call i64 @CallBack2(i32 190, i8* %0, i8* %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ fexcept_t;

/* Variables and functions */
int /*<<< orphan*/ fetestexcept(int);
int fegetexceptflag(fexcept_t *f, int m) {
  *f = fetestexcept(m);
  return 0;
}


x86 assembly (clang, -O0):
<fegetexceptflag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <fetestexcept@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fegetexceptflag>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <fetestexcept@plt>
mov    %eax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fegetexceptflag(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @fetestexcept(i32 %5)
%7 = load i32*, i32** %3
store i32 %6, i32* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @fegetexceptflag(i32* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @fetestexcept(i32 %1)
store i32 %3, i32* %0
ret i32 0
}
/* Type definitions */
struct fb {
  int dummy;
};

/* Variables and functions */
scalar_t__ cursorIn(struct fb *, int, int, int, int);
int /*<<< orphan*/ showCursor(struct fb *);
void showCursorIn(struct fb *self, int l, int r, int t, int b) {
  if (cursorIn(self, l, r, t, b))
    showCursor(self);
}


x86 assembly (clang, -O0):
<showCursorIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
call   1040 <cursorIn@plt>
cmp    $0x0,%rax
je     1162 <showCursorIn+0x42>
mov    -0x8(%rbp),%rdi
call   1030 <showCursor@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showCursorIn>:
push   %rbx
mov    %rdi,%rbx
call   1040 <cursorIn@plt>
test   %rax,%rax
je     1137 <showCursorIn+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <showCursor@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.fb = type { i32 }
define void @showCursorIn(%struct.fb* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.fb*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.fb* %0, %struct.fb** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.fb*, %struct.fb** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i64 @cursorIn(%struct.fb* %11, i32 %12, i32 %13, i32 %14, i32 %15)
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %5
%19 = load %struct.fb*, %struct.fb** %6
%20 = call i32 @showCursor(%struct.fb* %19)
br label %21
21: ; preds = %18, %5
ret void
}

LLVM IR (-O2):
%struct.fb = type { i32 }
define void @showCursorIn(%struct.fb* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i64 @cursorIn(%struct.fb* %0, i32 %1, i32 %2, i32 %3, i32 %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 @showCursor(%struct.fb* %0)
br label %10
10: ; preds = %8, %5
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double stdlib_strided_dsmeanpn(int, float *, int);
int main() {
  float x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
  int64_t N = 4;
  int64_t stride = 2;
  double v = stdlib_strided_dsmeanpn(N, x, stride);
  printf("mean: %lf\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec8(%rip),%rax
mov    %rax,-0x8(%rbp)
movl   $0x4,-0x24(%rbp)
movl   $0x2,-0x28(%rbp)
mov    -0x24(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%edx
call   1040 <stdlib_strided_dsmeanpn@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x4,%edi
mov    $0x2,%edx
call   1040 <stdlib_strided_dsmeanpn@plt>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [11 x i8] c"mean: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = bitcast [8 x float]* %1 to i8*
store i32 4, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call double @stdlib_strided_dsmeanpn(i32 %6, float* %7, i32 %8)
store double %9, double* %4
%10 = load double, double* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [11 x i8] c"mean: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = bitcast [8 x float]* %1 to i8*
%3 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%4 = call double @stdlib_strided_dsmeanpn(i32 4, float* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), double %4)
ret i32 0
}