xunge/DecIR huggingface dataset:
/* Type definitions */
struct Cyc_Queue_Queue {
  int dummy;
};

/* Variables and functions */
void *Cyc_Queue_noalias_take(struct Cyc_Queue_Queue *, int /*<<< orphan*/);
void *Cyc_Queue_ptr_take(struct Cyc_Queue_Queue *q) {
  return Cyc_Queue_noalias_take(q, 0);
}


x86 assembly (clang, -O0):
<Cyc_Queue_ptr_take>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <Cyc_Queue_noalias_take@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Queue_ptr_take>:
xor    %esi,%esi
jmp    1030 <Cyc_Queue_noalias_take@plt>

LLVM IR (-O0):
%struct.Cyc_Queue_Queue = type { i32 }
define i8* @Cyc_Queue_ptr_take(%struct.Cyc_Queue_Queue* %0) {
%2 = alloca %struct.Cyc_Queue_Queue*
store %struct.Cyc_Queue_Queue* %0, %struct.Cyc_Queue_Queue** %2
%3 = load %struct.Cyc_Queue_Queue*, %struct.Cyc_Queue_Queue** %2
%4 = call i8* @Cyc_Queue_noalias_take(%struct.Cyc_Queue_Queue* %3, i32 0)
ret i8* %4
}

LLVM IR (-O2):
%struct.Cyc_Queue_Queue = type { i32 }
define i8* @Cyc_Queue_ptr_take(%struct.Cyc_Queue_Queue* %0) {
%2 = tail call i8* @Cyc_Queue_noalias_take(%struct.Cyc_Queue_Queue* %0, i32 0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello World");
  printf("\nBye bye");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Hello World\00"
@.str.1 = [9 x i8] c"\0ABye bye\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Hello World\00"
@.str.1 = [9 x i8] c"\0ABye bye\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
char getch_(int /*<<< orphan*/);
char getch() { return getch_(0); }


x86 assembly (clang, -O0):
<getch>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <getch_@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getch>:
xor    %edi,%edi
jmp    1030 <getch_@plt>

LLVM IR (-O0):
define signext i8 @getch() {
%1 = call signext i8 @getch_(i32 0)
ret i8 %1
}

LLVM IR (-O2):
define signext i8 @getch() {
%1 = tail call signext i8 @getch_(i32 0)
ret i8 %1
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
void idt_irq3(void) { print("IRQ 3"); }


x86 assembly (clang, -O0):
<idt_irq3>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<idt_irq3>:
lea    0xee9(%rip),%rdi
jmp    1030 <print@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"IRQ 3\00"
define void @idt_irq3() {
%1 = call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"IRQ 3\00"
define void @idt_irq3() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_61int32_reg(int val) { return ((val) & (0x61 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_61int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x61,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_61int32_reg>:
test   $0x61,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_61int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 97
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_61int32_reg(i32 %0) {
%2 = and i32 %0, 97
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int file_has_acl(char const *file, struct stat const *filestat) { return 0; }


x86 assembly (clang, -O0):
<file_has_acl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_has_acl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.stat = type opaque
define i32 @file_has_acl(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
ret i32 0
}

LLVM IR (-O2):
%struct.stat = type opaque
define i32 @file_has_acl(i8* nocapture readnone %0, %struct.stat* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void CheckNullArgumentError(void *ptr, char *whatIsNull, char *message) {
  if (ptr == NULL) {
    fprintf(stderr, "\nArgument provided cannot be null: %s.", whatIsNull);
    fprintf(stderr, message);
    abort();
  }
}


x86 assembly (clang, -O0):
<CheckNullArgumentError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1175 <CheckNullArgumentError+0x55>
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xead(%rip),%rsi
mov    $0x0,%al
call   1040 <fprintf@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rsi
mov    $0x0,%al
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckNullArgumentError>:
test   %rdi,%rdi
je     1126 <CheckNullArgumentError+0x6>
ret
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rsi,%rdx
mov    0x2ea9(%rip),%r14
mov    (%r14),%edi
lea    0xebf(%rip),%rsi
xor    %eax,%eax
call   1040 <fprintf@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [39 x i8] c"\0AArgument provided cannot be null: %s.\00"
define void @CheckNullArgumentError(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i32, i32* @stderr
%11 = load i8*, i8** %5
%12 = call i32 (i32, i8*, ...) @fprintf(i32 %10, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = load i32, i32* @stderr
%14 = load i8*, i8** %6
%15 = call i32 (i32, i8*, ...) @fprintf(i32 %13, i8* %14)
%16 = call i32 (...) @abort()
unreachable
17: ; preds = %3
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [39 x i8] c"\0AArgument provided cannot be null: %s.\00"
define void @CheckNullArgumentError(i8* readnone %0, i8* %1, i8* %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %5, label %11
5: ; preds = %3
%6 = load i32, i32* @stderr
%7 = tail call i32 (i32, i8*, ...) @fprintf(i32 %6, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8* %1)
%8 = load i32, i32* @stderr
%9 = tail call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* %2)
%10 = tail call i32 (...) @abort()
unreachable
11: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteWord(unsigned short, unsigned short);
void SensorSetReg_Test(unsigned short uAddr, unsigned short uVal) {
  VIM_SIF_I2cWriteWord(uAddr, uVal);
}


x86 assembly (clang, -O0):
<SensorSetReg_Test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
movzwl %ax,%edi
movzwl -0x4(%rbp),%esi
call   1030 <VIM_SIF_I2cWriteWord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetReg_Test>:
jmp    1030 <VIM_SIF_I2cWriteWord@plt>

LLVM IR (-O0):
define void @SensorSetReg_Test(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
%7 = call i32 @VIM_SIF_I2cWriteWord(i16 zeroext %5, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_Test(i16 zeroext %0, i16 zeroext %1) {
%3 = tail call i32 @VIM_SIF_I2cWriteWord(i16 zeroext %0, i16 zeroext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ factorial(int);
int /*<<< orphan*/ hal(int);
int main(void) {
  factorial(10);
  for (int i = 0; i < 100; i++)
    hal(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <factorial@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jge    1160 <main+0x40>
mov    -0x8(%rbp),%edi
call   1040 <hal@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1140 <main+0x20>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xa,%edi
call   1030 <factorial@plt>
xor    %ebx,%ebx
nopl   (%rax)
mov    %ebx,%edi
call   1040 <hal@plt>
add    $0x1,%ebx
cmp    $0x64,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @factorial(i32 10)
store i32 0, i32* %2
br label %4
4: ; preds = %10, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i32 @hal(i32 %8)
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @factorial(i32 10)
br label %3
2: ; preds = %3
ret i32 0
3: ; preds = %0, %3
%4 = phi i32 [ 0, %0 ], [ %6, %3 ]
%5 = tail call i32 @hal(i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 100
br i1 %7, label %2, label %3
}
int test() {
  int a, *b;
  a = 10;
  b = &a;
  *b = 100;
  a++;
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
movl   $0xa,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x64,(%rax)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = alloca i32*
store i32 10, i32* %1
store i32* %1, i32** %2
%3 = load i32*, i32** %2
store i32 100, i32* %3
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @test() {
ret i32 0
}
unsigned char unsignedchar_ignoring_longlong(unsigned char x, long long y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedchar_ignoring_longlong>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedchar_ignoring_longlong>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @unsignedchar_ignoring_longlong(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
ret i8 %5
}

LLVM IR (-O2):
define zeroext i8 @unsignedchar_ignoring_longlong(i8 returned zeroext %0, i64 %1) {
ret i8 %0
}
/* Variables and functions */
int system_core(char *, int /*<<< orphan*/, int /*<<< orphan*/, char *);
int safe_system(char *command) {
  return system_core(command, 0, 0, "safe_system");
}


x86 assembly (clang, -O0):
<safe_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
lea    0xed7(%rip),%rcx
mov    %edx,%esi
call   1030 <system_core@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_system>:
lea    0xee9(%rip),%rcx
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <system_core@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"safe_system\00"
define i32 @safe_system(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @system_core(i8* %3, i32 0, i32 0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [12 x i8] c"safe_system\00"
define i32 @safe_system(i8* %0) {
%2 = tail call i32 @system_core(i8* %0, i32 0, i32 0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
long double test_fabsl(long double x) { return __builtin_fabsl(x); }


x86 assembly (clang, -O0):
<test_fabsl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fabs
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fabsl>:
fldt   0x8(%rsp)
fabs
ret

LLVM IR (-O0):
define x86_fp80 @test_fabsl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @test_fabsl(x86_fp80 %0) {
%2 = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int /*<<< orphan*/ LockToggled(int);
int xLockModifier(int /*<<< orphan*/);
int /*<<< orphan*/ xModifierMask(int);
int ToggleOn(int lock) {
  int result;
  if (!LockToggled(lock)) {
    result = xLockModifier(xModifierMask(lock));
  }
  return result;
}


x86 assembly (clang, -O0):
<ToggleOn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <LockToggled@plt>
cmp    $0x0,%eax
jne    115e <ToggleOn+0x2e>
mov    -0x4(%rbp),%edi
call   1030 <xModifierMask@plt>
mov    %eax,%edi
call   1040 <xLockModifier@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ToggleOn>:
push   %rbx
mov    %edi,%ebx
call   1050 <LockToggled@plt>
test   %eax,%eax
je     113e <ToggleOn+0xe>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <xModifierMask@plt>
mov    %eax,%edi
pop    %rbx
jmp    1040 <xLockModifier@plt>

LLVM IR (-O0):
define i32 @ToggleOn(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @LockToggled(i32 %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i32, i32* %2
%9 = call i32 @xModifierMask(i32 %8)
%10 = call i32 @xLockModifier(i32 %9)
store i32 %10, i32* %3
br label %11
11: ; preds = %7, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @ToggleOn(i32 %0) {
%2 = tail call i32 @LockToggled(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @xModifierMask(i32 %0)
%6 = tail call i32 @xLockModifier(i32 %5)
br label %7
7: ; preds = %4, %1
%8 = phi i32 [ undef, %1 ], [ %6, %4 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ clear_trace();
int /*<<< orphan*/ disable_tracing();
int /*<<< orphan*/ reset_events();
int /*<<< orphan*/ set_plugin(char *);
int /*<<< orphan*/ update_ftrace_pid(char *, int);
void disable_all(void) {
  disable_tracing();
  set_plugin("nop");
  reset_events();
  update_ftrace_pid("", 1);
  update_ftrace_pid(NULL, 0);
  clear_trace();
}


x86 assembly (clang, -O0):
<disable_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <disable_tracing@plt>
lea    0xe9e(%rip),%rdi
call   1030 <set_plugin@plt>
mov    $0x0,%al
call   1040 <reset_events@plt>
lea    0xe8e(%rip),%rdi
mov    $0x1,%esi
call   1060 <update_ftrace_pid@plt>
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
call   1060 <update_ftrace_pid@plt>
mov    $0x0,%al
call   1070 <clear_trace@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_all>:
push   %rax
xor    %eax,%eax
call   1050 <disable_tracing@plt>
lea    0xea1(%rip),%rdi
call   1030 <set_plugin@plt>
xor    %eax,%eax
call   1040 <reset_events@plt>
lea    0xe91(%rip),%rdi
mov    $0x1,%esi
call   1060 <update_ftrace_pid@plt>
xor    %edi,%edi
xor    %esi,%esi
call   1060 <update_ftrace_pid@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <clear_trace@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"nop\00"
@.str.1 = [1 x i8] zeroinitializer
define void @disable_all() {
%1 = call i32 (...) @disable_tracing()
%2 = call i32 @set_plugin(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @reset_events()
%4 = call i32 @update_ftrace_pid(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
%5 = call i32 @update_ftrace_pid(i8* null, i32 0)
%6 = call i32 (...) @clear_trace()
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"nop\00"
@.str.1 = [1 x i8] zeroinitializer
define void @disable_all() {
%1 = tail call i32 (...) @disable_tracing()
%2 = tail call i32 @set_plugin(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @reset_events()
%4 = tail call i32 @update_ftrace_pid(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
%5 = tail call i32 @update_ftrace_pid(i8* null, i32 0)
%6 = tail call i32 (...) @clear_trace()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit_1_or_2_operandsl_vartext(char *, char *);
void special_fsubrpl(void) { emit_1_or_2_operandsl_vartext("fsubrp", "fsubp"); }


x86 assembly (clang, -O0):
<special_fsubrpl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <emit_1_or_2_operandsl_vartext@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<special_fsubrpl>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
jmp    1030 <emit_1_or_2_operandsl_vartext@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"fsubrp\00"
@.str.1 = [6 x i8] c"fsubp\00"
define void @special_fsubrpl() {
%1 = call i32 @emit_1_or_2_operandsl_vartext(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"fsubrp\00"
@.str.1 = [6 x i8] c"fsubp\00"
define void @special_fsubrpl() {
%1 = tail call i32 @emit_1_or_2_operandsl_vartext(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ stdout;
char *unrez_pict_opname(int);
void show_opcode(int opcode) {
  const char *opname;
  printf("  op $%04x", opcode);
  opname = unrez_pict_opname(opcode);
  if (opname != NULL) {
    printf(" %s", opname);
  }
  fputc('\n', stdout);
}


x86 assembly (clang, -O0):
<show_opcode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1050 <unrez_pict_opname@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1175 <show_opcode+0x45>
mov    -0x10(%rbp),%rsi
lea    0xe9d(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    0x2e64(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_opcode>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <printf@plt>
mov    %ebx,%edi
call   1050 <unrez_pict_opname@plt>
test   %rax,%rax
je     1160 <show_opcode+0x30>
lea    0xeb5(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x2e79(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
pop    %rbx
jmp    1040 <fputc@plt>

LLVM IR (-O0):
@.str = [11 x i8] c" op $%04x\00"
@.str.1 = [4 x i8] c" %s\00"
@stdout = global i32 0
define void @show_opcode(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
%7 = call i8* @unrez_pict_opname(i32 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10, %1
%14 = load i32, i32* @stdout
%15 = call i32 @fputc(i8 signext 10, i32 %14)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c" op $%04x\00"
@.str.1 = [4 x i8] c" %s\00"
@stdout = global i32 0
define void @show_opcode(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i8* @unrez_pict_opname(i32 %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %3)
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* @stdout
%9 = tail call i32 @fputc(i8 signext 10, i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(unsigned int);
void f4(int size) {
  if (size > 0) {
    void *ptr = malloc((unsigned)size);
    free(ptr);
  }
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    114a <f4+0x2a>
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
test   %edi,%edi
jle    1133 <f4+0x13>
push   %rax
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @f4(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i8* @malloc(i32 %7)
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = call i32 @free(i8* %9)
br label %11
11: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @f4(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i8* @malloc(i32 %0)
%5 = tail call i32 @free(i8* %4)
br label %6
6: ; preds = %3, %1
ret void
}
/* Type definitions */
struct CRYPTO_dynlock_value {
  int dummy;
};

/* Variables and functions */
int CRYPTO_LOCK;
int /*<<< orphan*/ d0_lockmutex(void *);
int /*<<< orphan*/ d0_unlockmutex(void *);
void dyn_lock_function(int mode, struct CRYPTO_dynlock_value *l,
                       const char *file, int line) {
  void *m = (void *)l;
  if (mode & CRYPTO_LOCK)
    d0_lockmutex(m);
  else
    d0_unlockmutex(m);
}


x86 assembly (clang, -O0):
<dyn_lock_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ea0(%rip),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
je     1161 <dyn_lock_function+0x41>
mov    -0x28(%rbp),%rdi
call   1040 <d0_lockmutex@plt>
jmp    116a <dyn_lock_function+0x4a>
mov    -0x28(%rbp),%rdi
call   1030 <d0_unlockmutex@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dyn_lock_function>:
mov    0x2ec1(%rip),%rax
test   %edi,(%rax)
je     1133 <dyn_lock_function+0x13>
mov    %rsi,%rdi
jmp    1040 <d0_lockmutex@plt>
mov    %rsi,%rdi
jmp    1030 <d0_unlockmutex@plt>

LLVM IR (-O0):
%struct.CRYPTO_dynlock_value = type { i32 }
@CRYPTO_LOCK = global i32 0
define void @dyn_lock_function(i32 %0, %struct.CRYPTO_dynlock_value* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca %struct.CRYPTO_dynlock_value*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
store i32 %0, i32* %5
store %struct.CRYPTO_dynlock_value* %1, %struct.CRYPTO_dynlock_value** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load %struct.CRYPTO_dynlock_value*, %struct.CRYPTO_dynlock_value** %6
%11 = bitcast %struct.CRYPTO_dynlock_value* %10 to i8*
store i8* %11, i8** %9
%12 = load i32, i32* %5
%13 = load i32, i32* @CRYPTO_LOCK
%14 = and i32 %12, %13
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %4
%17 = load i8*, i8** %9
%18 = call i32 @d0_lockmutex(i8* %17)
br label %22
19: ; preds = %4
%20 = load i8*, i8** %9
%21 = call i32 @d0_unlockmutex(i8* %20)
br label %22
22: ; preds = %19, %16
ret void
}

LLVM IR (-O2):
%struct.CRYPTO_dynlock_value = type { i32 }
@CRYPTO_LOCK = global i32 0
define void @dyn_lock_function(i32 %0, %struct.CRYPTO_dynlock_value* %1, i8* nocapture readnone %2, i32 %3) {
%5 = bitcast %struct.CRYPTO_dynlock_value* %1 to i8*
%6 = load i32, i32* @CRYPTO_LOCK
%7 = and i32 %6, %0
%8 = icmp eq i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = tail call i32 @d0_lockmutex(i8* %5)
br label %13
11: ; preds = %4
%12 = tail call i32 @d0_unlockmutex(i8* %5)
br label %13
13: ; preds = %11, %9
ret void
}
/* Variables and functions */
int random_int();
int do_it_faggot(int p) {
  if (random_int() % 100 < p) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<do_it_faggot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <random_int@plt>
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    -0x8(%rbp),%edx
jge    113f <do_it_faggot+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <do_it_faggot+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_it_faggot>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <random_int@plt>
movslq %eax,%rcx
imul   $0x51eb851f,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rax
add    %edx,%eax
imul   $0x64,%eax,%eax
sub    %eax,%ecx
xor    %eax,%eax
cmp    %ebx,%ecx
setl   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @do_it_faggot(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @random_int()
%5 = srem i32 %4, 100
%6 = load i32, i32* %3
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @do_it_faggot(i32 %0) {
%2 = tail call i32 (...) @random_int()
%3 = srem i32 %2, 100
%4 = icmp slt i32 %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ IF_fctD_1(int /*<<< orphan*/);
int /*<<< orphan*/ y0;
void IF_y0(void) { IF_fctD_1(y0); }


x86 assembly (clang, -O0):
<IF_y0>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <IF_fctD_1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_y0>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <IF_fctD_1@plt>

LLVM IR (-O0):
@y0 = global i32 0
define void @IF_y0() {
%1 = load i32, i32* @y0
%2 = call i32 @IF_fctD_1(i32 %1)
ret void
}

LLVM IR (-O2):
@y0 = global i32 0
define void @IF_y0() {
%1 = load i32, i32* @y0
%2 = tail call i32 @IF_fctD_1(i32 %1)
ret void
}
/* Variables and functions */
double log10(scalar_t__);
scalar_t__ pow(double, double);
double gt_quality_phred_to_solexa(double phredscore) {
  return 10.0 * log10(pow(10.0, ((double)phredscore / 10.0)) - 1);
}


x86 assembly (clang, -O0):
<gt_quality_phred_to_solexa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xec6(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xeba(%rip),%xmm0
call   1030 <pow@plt>
mov    %rax,%rdi
sub    $0x1,%rdi
call   1040 <log10@plt>
movaps %xmm0,%xmm1
movsd  0xe9e(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_quality_phred_to_solexa>:
push   %rax
movapd %xmm0,%xmm1
movsd  0xed3(%rip),%xmm0
divsd  %xmm0,%xmm1
call   1030 <pow@plt>
lea    -0x1(%rax),%rdi
call   1040 <log10@plt>
mulsd  0xeb9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @gt_quality_phred_to_solexa(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+01
%5 = call i64 @pow(double 1.000000e+01, double %4)
%6 = sub nsw i64 %5, 1
%7 = call double @log10(i64 %6)
%8 = fmul double 1.000000e+01, %7
ret double %8
}

LLVM IR (-O2):
define double @gt_quality_phred_to_solexa(double %0) {
%2 = fdiv double %0, 1.000000e+01
%3 = tail call i64 @pow(double 1.000000e+01, double %2)
%4 = add nsw i64 %3, -1
%5 = tail call double @log10(i64 %4)
%6 = fmul double %5, 1.000000e+01
ret double %6
}
int hm2min(int hm) { return hm / 100 * 60 + hm % 100; }


x86 assembly (clang, -O0):
<hm2min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
imul   $0x3c,%eax,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
add    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hm2min>:
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rcx
add    %edx,%ecx
imul   $0x3c,%ecx,%edx
imul   $0x64,%ecx,%ecx
sub    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hm2min(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 100
%5 = mul nsw i32 %4, 60
%6 = load i32, i32* %2
%7 = srem i32 %6, 100
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @hm2min(i32 %0) {
%2 = sdiv i32 %0, 100
%3 = mul nsw i32 %2, 60
%4 = srem i32 %0, 100
%5 = add nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
unsigned char *haval192_buffer(unsigned char *, unsigned char const *, size_t);
unsigned char *hash_buffer_haval192(unsigned char *out, const unsigned char *in,
                                    size_t in_len) {
  return haval192_buffer(out, in, in_len);
}


x86 assembly (clang, -O0):
<hash_buffer_haval192>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <haval192_buffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_buffer_haval192>:
jmp    1030 <haval192_buffer@plt>

LLVM IR (-O0):
define i8* @hash_buffer_haval192(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @haval192_buffer(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @hash_buffer_haval192(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @haval192_buffer(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ uart_write(char);
void Putchar(char c) { uart_write(c); }


x86 assembly (clang, -O0):
<Putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <uart_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Putchar>:
jmp    1030 <uart_write@plt>

LLVM IR (-O0):
define void @Putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @uart_write(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @Putchar(i8 signext %0) {
%2 = tail call i32 @uart_write(i8 signext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pattern(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  printf("%d", n);
  pattern(n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <pattern@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    0xc(%rsp),%edi
call   1040 <pattern@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @pattern(i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %1
%7 = call i32 @pattern(i32 %6)
ret i32 0
}
/* Type definitions */
struct opencl_x86_device_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void opencl_x86_device_mem_free(struct opencl_x86_device_t *device, void *ptr) {
  free(ptr);
}


x86 assembly (clang, -O0):
<opencl_x86_device_mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opencl_x86_device_mem_free>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.opencl_x86_device_t = type { i32 }
define void @opencl_x86_device_mem_free(%struct.opencl_x86_device_t* %0, i8* %1) {
%3 = alloca %struct.opencl_x86_device_t*
%4 = alloca i8*
store %struct.opencl_x86_device_t* %0, %struct.opencl_x86_device_t** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
%struct.opencl_x86_device_t = type { i32 }
define void @opencl_x86_device_mem_free(%struct.opencl_x86_device_t* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __delay_cycles(int);
void delay_ms(int ms) {
  while (ms--) {
    __delay_cycles(12005);
  }
}


x86 assembly (clang, -O0):
<delay_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     113e <delay_ms+0x2e>
mov    $0x2ee5,%edi
call   1030 <__delay_cycles@plt>
jmp    111b <delay_ms+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_ms>:
push   %rbx
test   %edi,%edi
je     112f <delay_ms+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x2ee5,%edi
call   1030 <__delay_cycles@plt>
add    $0xffffffff,%ebx
jne    1120 <delay_ms+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @delay_ms(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @__delay_cycles(i32 12005)
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @delay_ms(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 @__delay_cycles(i32 12005)
%7 = icmp eq i32 %5, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int g(int);
int f(int x) { return g(x); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
jmp    1030 <g@plt>

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @g(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = tail call i32 @g(i32 %0)
ret i32 %2
}
int main() {
  int i = 0;
  for (;;) {
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %3, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
br label %3
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int fread(void *, size_t, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ perror(char *);
void ckfread(void *ptr, size_t size, FILE *stream) {
  if (fread(ptr, size, 1, stream) < 1) {
    perror("fread non riuscita");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<ckfread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0x1,%edx
call   1030 <fread@plt>
cmp    $0x1,%eax
jge    1179 <ckfread+0x49>
lea    0xe96(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ckfread>:
push   %rax
mov    %rdx,%rcx
mov    $0x1,%edx
call   1030 <fread@plt>
test   %eax,%eax
jle    1144 <ckfread+0x14>
pop    %rax
ret
lea    0xeb5(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"fread non riuscita\00"
define void @ckfread(i8* %0, i64 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i32*, i32** %6
%10 = call i32 @fread(i8* %7, i64 %8, i32 1, i32* %9)
%11 = icmp slt i32 %10, 1
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = call i32 @perror(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"fread non riuscita\00"
define void @ckfread(i8* nocapture %0, i64 %1, i32* nocapture %2) {
%4 = tail call i32 @fread(i8* %0, i64 %1, i32 1, i32* %2)
%5 = icmp slt i32 %4, 1
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("\nautotool-demo says hello\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"\0Aautotool-demo says hello\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [26 x i8] c"\0Aautotool-demo says hello\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ *stderr;
int /*<<< orphan*/ *stdin;
int /*<<< orphan*/ *stdout;
int main() {
  if (stdin != NULL)
    if (stderr != NULL)
      if (stdout != NULL)
        return EXIT_SUCCESS;
      else
        return 3;
    else
      return 2;
  else
    return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ed6(%rip),%rax
cmpq   $0x0,(%rax)
je     1167 <main+0x67>
mov    0x2eb5(%rip),%rax
cmpq   $0x0,(%rax)
je     115b <main+0x5b>
mov    0x2e9c(%rip),%rax
cmpq   $0x0,(%rax)
je     114f <main+0x4f>
mov    0x2e83(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    116e <main+0x6e>
movl   $0x3,-0x4(%rbp)
jmp    116e <main+0x6e>
movl   $0x2,-0x4(%rbp)
jmp    116e <main+0x6e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ee1(%rip),%rax
cmpq   $0x0,(%rax)
je     1136 <main+0x36>
mov    0x2ec4(%rip),%rax
cmpq   $0x0,(%rax)
je     113c <main+0x3c>
mov    0x2eaf(%rip),%rax
cmpq   $0x0,(%rax)
mov    $0x3,%eax
je     1135 <main+0x35>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
ret
mov    $0x1,%eax
ret
mov    $0x2,%eax
ret

LLVM IR (-O0):
@stdin = global i32* null
@stderr = global i32* null
@stdout = global i32* null
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32*, i32** @stdin
%3 = icmp ne i32* %2, null
br i1 %3, label %4, label %14
4: ; preds = %0
%5 = load i32*, i32** @stderr
%6 = icmp ne i32* %5, null
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32*, i32** @stdout
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = load i32, i32* @EXIT_SUCCESS
store i32 %11, i32* %1
br label %15
12: ; preds = %7
store i32 3, i32* %1
br label %15
13: ; preds = %4
store i32 2, i32* %1
br label %15
14: ; preds = %0
store i32 1, i32* %1
br label %15
15: ; preds = %14, %13, %12, %10
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
@stdin = global i32* null
@stderr = global i32* null
@stdout = global i32* null
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32*, i32** @stdin
%2 = icmp eq i32* %1, null
br i1 %2, label %11, label %3
3: ; preds = %0
%4 = load i32*, i32** @stderr
%5 = icmp eq i32* %4, null
br i1 %5, label %11, label %6
6: ; preds = %3
%7 = load i32*, i32** @stdout
%8 = icmp eq i32* %7, null
%9 = load i32, i32* @EXIT_SUCCESS
%10 = select i1 %8, i32 3, i32 %9
br label %11
11: ; preds = %6, %0, %3
%12 = phi i32 [ 2, %3 ], [ 1, %0 ], [ %10, %6 ]
ret i32 %12
}
void xdrhdrsub() { return; }


x86 assembly (clang, -O0):
<xdrhdrsub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdrhdrsub>:
ret

LLVM IR (-O0):
define void @xdrhdrsub() {
ret void
}

LLVM IR (-O2):
define void @xdrhdrsub() {
ret void
}
const char *deviceIOGetName(void) { return "IO"; }


x86 assembly (clang, -O0):
<deviceIOGetName>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deviceIOGetName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"IO\00"
define i8* @deviceIOGetName() {
ret i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [3 x i8] c"IO\00"
define i8* @deviceIOGetName() {
ret i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct cl_node {
  int dummy;
};

/* Variables and functions */
struct cl_node *cl_node_black(struct cl_node *);
scalar_t__ cl_node_is_red(struct cl_node *);
struct cl_node *cl_node_red(struct cl_node *);
struct cl_node *cl_node_flip(struct cl_node *n) {
  return cl_node_is_red(n) ? cl_node_black(n) : cl_node_red(n);
}


x86 assembly (clang, -O0):
<cl_node_flip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cl_node_is_red@plt>
cmp    $0x0,%rax
je     1161 <cl_node_flip+0x31>
mov    -0x8(%rbp),%rdi
call   1050 <cl_node_black@plt>
mov    %rax,-0x10(%rbp)
jmp    116e <cl_node_flip+0x3e>
mov    -0x8(%rbp),%rdi
call   1040 <cl_node_red@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_node_flip>:
push   %rbx
mov    %rdi,%rbx
call   1030 <cl_node_is_red@plt>
mov    %rbx,%rdi
test   %rax,%rax
je     1147 <cl_node_flip+0x17>
pop    %rbx
jmp    1050 <cl_node_black@plt>
pop    %rbx
jmp    1040 <cl_node_red@plt>

LLVM IR (-O0):
%struct.cl_node = type { i32 }
define %struct.cl_node* @cl_node_flip(%struct.cl_node* %0) {
%2 = alloca %struct.cl_node*
store %struct.cl_node* %0, %struct.cl_node** %2
%3 = load %struct.cl_node*, %struct.cl_node** %2
%4 = call i64 @cl_node_is_red(%struct.cl_node* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.cl_node*, %struct.cl_node** %2
%8 = call %struct.cl_node* @cl_node_black(%struct.cl_node* %7)
br label %12
9: ; preds = %1
%10 = load %struct.cl_node*, %struct.cl_node** %2
%11 = call %struct.cl_node* @cl_node_red(%struct.cl_node* %10)
br label %12
12: ; preds = %9, %6
%13 = phi %struct.cl_node* [ %8, %6 ], [ %11, %9 ]
ret %struct.cl_node* %13
}

LLVM IR (-O2):
%struct.cl_node = type { i32 }
define %struct.cl_node* @cl_node_flip(%struct.cl_node* %0) {
%2 = tail call i64 @cl_node_is_red(%struct.cl_node* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call %struct.cl_node* @cl_node_black(%struct.cl_node* %0)
br label %8
6: ; preds = %1
%7 = tail call %struct.cl_node* @cl_node_red(%struct.cl_node* %0)
br label %8
8: ; preds = %6, %4
%9 = phi %struct.cl_node* [ %5, %4 ], [ %7, %6 ]
ret %struct.cl_node* %9
}
void f3(int a) {
  switch (!!a) {
  case 3:
    break;
  }
  switch (!a) {
  case 3:
    break;
  }
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
test   %al,%al
jne    111b <f3+0x1b>
jmp    1116 <f3+0x16>
jmp    111b <f3+0x1b>
mov    $0x1,%al
test   %al,%al
jne    112f <f3+0x2f>
jmp    112a <f3+0x2a>
jmp    112f <f3+0x2f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
switch i32 %7, label %9 [
i32 3, label %8
]
8: ; preds = %1
br label %9
9: ; preds = %1, %8
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
switch i32 %13, label %15 [
i32 3, label %14
]
14: ; preds = %9
br label %15
15: ; preds = %9, %14
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0) {
ret void
}