xunge/DecIR huggingface dataset:
/* Type definitions */
struct wl_proxy {
  int dummy;
};
struct wl_compositor {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_set_user_data(struct wl_proxy *, void *);
void wl_compositor_set_user_data(struct wl_compositor *wl_compositor,
                                 void *user_data) {
  wl_proxy_set_user_data((struct wl_proxy *)wl_compositor, user_data);
}


x86 assembly (clang, -O0):
<wl_compositor_set_user_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <wl_proxy_set_user_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_compositor_set_user_data>:
jmp    1030 <wl_proxy_set_user_data@plt>

LLVM IR (-O0):
%struct.wl_compositor = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_compositor_set_user_data(%struct.wl_compositor* %0, i8* %1) {
%3 = alloca %struct.wl_compositor*
%4 = alloca i8*
store %struct.wl_compositor* %0, %struct.wl_compositor** %3
store i8* %1, i8** %4
%5 = load %struct.wl_compositor*, %struct.wl_compositor** %3
%6 = bitcast %struct.wl_compositor* %5 to %struct.wl_proxy*
%7 = load i8*, i8** %4
%8 = call i32 @wl_proxy_set_user_data(%struct.wl_proxy* %6, i8* %7)
ret void
}

LLVM IR (-O2):
%struct.wl_compositor = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_compositor_set_user_data(%struct.wl_compositor* %0, i8* %1) {
%3 = bitcast %struct.wl_compositor* %0 to %struct.wl_proxy*
%4 = tail call i32 @wl_proxy_set_user_data(%struct.wl_proxy* %3, i8* %1)
ret void
}
void psp_joypad_destroy(void) {}


x86 assembly (clang, -O0):
<psp_joypad_destroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psp_joypad_destroy>:
ret

LLVM IR (-O0):
define void @psp_joypad_destroy() {
ret void
}

LLVM IR (-O2):
define void @psp_joypad_destroy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XGetErrorDatabaseText() {
  printf("XGetErrorDatabaseText called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XGetErrorDatabaseText>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetErrorDatabaseText>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"XGetErrorDatabaseText called\0A\00"
define i32 @XGetErrorDatabaseText() {
%1 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [29 x i8] c"XGetErrorDatabaseText called\00"
define i32 @XGetErrorDatabaseText() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int rcu_read_lock_held(void) { return 1; }


x86 assembly (clang, -O0):
<rcu_read_lock_held>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_read_lock_held>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @rcu_read_lock_held() {
ret i32 1
}

LLVM IR (-O2):
define i32 @rcu_read_lock_held() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int test_ecc_b163();
int main(void) {
  printf("\ntest_ecc_b163: %d\n", test_ecc_b163());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_ecc_b163@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_ecc_b163@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"\0Atest_ecc_b163: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_ecc_b163()
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"\0Atest_ecc_b163: %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @test_ecc_b163()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ estimation();
int /*<<< orphan*/ load_idx();
int main(int argc, char **argv) {
  load_idx();
  estimation();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <load_idx@plt>
mov    $0x0,%al
call   1030 <estimation@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <load_idx@plt>
xor    %eax,%eax
call   1030 <estimation@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @load_idx()
%7 = call i32 (...) @estimation()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @load_idx()
%4 = tail call i32 (...) @estimation()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void main() { printf("%ld\n", sizeof(int)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
mov    $0x4,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
define void @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void _mu_test_preprocess(const char *funcname) {
  printf("test: %s()\n", funcname);
}


x86 assembly (clang, -O0):
<_mu_test_preprocess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mu_test_preprocess>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"test: %s()\0A\00"
define void @_mu_test_preprocess(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"test: %s()\0A\00"
define void @_mu_test_preprocess(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void gtk_image_get_pixbuf() {}


x86 assembly (clang, -O0):
<gtk_image_get_pixbuf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_image_get_pixbuf>:
ret

LLVM IR (-O0):
define void @gtk_image_get_pixbuf() {
ret void
}

LLVM IR (-O2):
define void @gtk_image_get_pixbuf() {
ret void
}
__attribute__((always_)) void debug_show_all_locks(void) {}


x86 assembly (clang, -O0):
<debug_show_all_locks>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_show_all_locks>:
ret

LLVM IR (-O0):
define void @debug_show_all_locks() {
ret void
}

LLVM IR (-O2):
define void @debug_show_all_locks() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SNAPSHOT_FREEZE;
int ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int freeze(int dev) { return ioctl(dev, SNAPSHOT_FREEZE, 0); }


x86 assembly (clang, -O0):
<freeze>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ecb(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeze>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
@SNAPSHOT_FREEZE = global i32 0
define i32 @freeze(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SNAPSHOT_FREEZE
%5 = call i32 @ioctl(i32 %3, i32 %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
@SNAPSHOT_FREEZE = global i32 0
define i32 @freeze(i32 %0) {
%2 = load i32, i32* @SNAPSHOT_FREEZE
%3 = tail call i32 @ioctl(i32 %0, i32 %2, i32 0)
ret i32 %3
}
void setDoublePrecision() {}


x86 assembly (clang, -O0):
<setDoublePrecision>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDoublePrecision>:
ret

LLVM IR (-O0):
define void @setDoublePrecision() {
ret void
}

LLVM IR (-O2):
define void @setDoublePrecision() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int scanf(char *, double *);
void simpleCalc() {
  double sum = 0, v;
  while (scanf("%lf", &v) == 1)
    printf("\t%.2f\n", sum += v);
}


x86 assembly (clang, -O0):
<simpleCalc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
lea    0xec9(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
cmp    $0x1,%eax
jne    1169 <simpleCalc+0x49>
movsd  -0x10(%rbp),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
jmp    1130 <simpleCalc+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simpleCalc>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xed0(%rip),%rdi
lea    0x8(%rsp),%rsi
call   1040 <scanf@plt>
cmp    $0x1,%eax
jne    118d <simpleCalc+0x6d>
xorpd  %xmm0,%xmm0
lea    0xeba(%rip),%r14
lea    0xeaf(%rip),%r15
lea    0x8(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
addsd  0x8(%rsp),%xmm0
movsd  %xmm0,(%rsp)
mov    %r14,%rdi
movsd  (%rsp),%xmm0
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm0
cmp    $0x1,%eax
je     1160 <simpleCalc+0x40>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [7 x i8] c"\09%.2f\0A\00"
define void @simpleCalc() {
%1 = alloca double
%2 = alloca double
store double 0.000000e+00, double* %1
br label %3
3: ; preds = %6, %0
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = load double, double* %2
%8 = load double, double* %1
%9 = fadd double %8, %7
store double %9, double* %1
%10 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), double %9)
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [7 x i8] c"\09%.2f\0A\00"
define void @simpleCalc() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %12
5: ; preds = %0, %5
%6 = phi double [ %8, %5 ], [ 0.000000e+00, %0 ]
%7 = load double, double* %1
%8 = fadd double %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), double %8)
%10 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%11 = icmp eq i32 %10, 1
br i1 %11, label %5, label %12
12: ; preds = %5, %0
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int intcelcon_make_subdivision(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc4c(758, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<intcelcon_make_subdivision>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x2f6,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcelcon_make_subdivision>:
mov    $0x2f6,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @intcelcon_make_subdivision() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 758, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @intcelcon_make_subdivision() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 758, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
unsigned long PWMGenIntGet(unsigned long, unsigned long);
void PWMGenIntRegister(unsigned long ulBase, unsigned long ulGen,
                       void (*pfnIntHandler)(void)) {
  unsigned long ulInt;
  ;
  ;
  ulInt = PWMGenIntGet(ulBase, ulGen);
  IntRegister(ulInt, pfnIntHandler);
  IntEnable(ulInt);
}


x86 assembly (clang, -O0):
<PWMGenIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <PWMGenIntGet@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <IntRegister@plt>
mov    -0x20(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
call   1040 <PWMGenIntGet@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1050 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @PWMGenIntRegister(i64 %0, i64 %1, void ()* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca void ()*
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store void ()* %2, void ()** %6
%8 = load i64, i64* %4
%9 = load i64, i64* %5
%10 = call i64 @PWMGenIntGet(i64 %8, i64 %9)
store i64 %10, i64* %7
%11 = load i64, i64* %7
%12 = load void ()*, void ()** %6
%13 = bitcast void ()* %12 to void (...)*
%14 = call i32 @IntRegister(i64 %11, void (...)* %13)
%15 = load i64, i64* %7
%16 = call i32 @IntEnable(i64 %15)
ret void
}

LLVM IR (-O2):
define void @PWMGenIntRegister(i64 %0, i64 %1, void ()* %2) {
%4 = tail call i64 @PWMGenIntGet(i64 %0, i64 %1)
%5 = bitcast void ()* %2 to void (...)*
%6 = tail call i32 @IntRegister(i64 %4, void (...)* %5)
%7 = tail call i32 @IntEnable(i64 %4)
ret void
}
/* Type definitions */
typedef int uint32_t;
struct cl_rhash_table {
  int dummy;
};

/* Variables and functions */
int cl_rhash_table_size(struct cl_rhash_table const *);
uint32_t cl_rhash_table_limit(const struct cl_rhash_table *tbl) {
  uint32_t n_size = cl_rhash_table_size(tbl);
  return n_size - (n_size / 4);
}


x86 assembly (clang, -O0):
<cl_rhash_table_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cl_rhash_table_size@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_rhash_table_limit>:
push   %rax
call   1030 <cl_rhash_table_size@plt>
lea    0x3(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
sar    $0x2,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.cl_rhash_table = type { i32 }
define i32 @cl_rhash_table_limit(%struct.cl_rhash_table* %0) {
%2 = alloca %struct.cl_rhash_table*
%3 = alloca i32
store %struct.cl_rhash_table* %0, %struct.cl_rhash_table** %2
%4 = load %struct.cl_rhash_table*, %struct.cl_rhash_table** %2
%5 = call i32 @cl_rhash_table_size(%struct.cl_rhash_table* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %3
%8 = sdiv i32 %7, 4
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
%struct.cl_rhash_table = type { i32 }
define i32 @cl_rhash_table_limit(%struct.cl_rhash_table* %0) {
%2 = tail call i32 @cl_rhash_table_size(%struct.cl_rhash_table* %0)
%3 = sdiv i32 %2, -4
%4 = add i32 %3, %2
ret i32 %4
}
/* Variables and functions */
int helperPrimitiveBlockClosure_ValueWithArguments(int, int *,
                                                   int /*<<< orphan*/);
int primitiveBlockClosure_Value(int receiver, int *arguments) {
  return helperPrimitiveBlockClosure_ValueWithArguments(receiver, arguments, 0);
}


x86 assembly (clang, -O0):
<primitiveBlockClosure_Value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <helperPrimitiveBlockClosure_ValueWithArguments@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<primitiveBlockClosure_Value>:
xor    %edx,%edx
jmp    1030 <helperPrimitiveBlockClosure_ValueWithArguments@plt>

LLVM IR (-O0):
define i32 @primitiveBlockClosure_Value(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @helperPrimitiveBlockClosure_ValueWithArguments(i32 %5, i32* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @primitiveBlockClosure_Value(i32 %0, i32* %1) {
%3 = tail call i32 @helperPrimitiveBlockClosure_ValueWithArguments(i32 %0, i32* %1, i32 0)
ret i32 %3
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char *);
int strlen(char *);
int copiarString(void *destino, const void *origen) {
  char **d = (char **)destino;
  char **o = (char **)origen;
  int len = strlen(*o);
  *d = malloc((len + 1) * sizeof(char));
  strcpy(*d, *o);
  return 0;
}


x86 assembly (clang, -O0):
<copiarString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
mov    -0x20(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcpy@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copiarString>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    (%rsi),%rdi
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,(%r14)
mov    (%rbx),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @copiarString(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i8**
store i8** %9, i8*** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
store i8** %11, i8*** %6
%12 = load i8**, i8*** %6
%13 = load i8*, i8** %12
%14 = call i32 @strlen(i8* %13)
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = add nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = mul i64 %17, 1
%19 = trunc i64 %18 to i32
%20 = call i8* @malloc(i32 %19)
%21 = load i8**, i8*** %5
store i8* %20, i8** %21
%22 = load i8**, i8*** %5
%23 = load i8*, i8** %22
%24 = load i8**, i8*** %6
%25 = load i8*, i8** %24
%26 = call i32 @strcpy(i8* %23, i8* %25)
ret i32 0
}

LLVM IR (-O2):
define i32 @copiarString(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load i8*, i8** %4
%6 = tail call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = tail call i8* @malloc(i32 %7)
store i8* %8, i8** %3
%9 = load i8*, i8** %4
%10 = tail call i32 @strcpy(i8* %8, i8* %9)
ret i32 0
}
/* Variables and functions */
int runtime_rt0_go(int, char **);
int main(int argc, char **argv) { return runtime_rt0_go(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <runtime_rt0_go@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <runtime_rt0_go@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @runtime_rt0_go(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @runtime_rt0_go(i32 %0, i8** %1)
ret i32 %3
}
char *langRomTypeKonamiScc() { return "Konami SCC"; }


x86 assembly (clang, -O0):
<langRomTypeKonamiScc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeKonamiScc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Konami SCC\00"
define i8* @langRomTypeKonamiScc() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"Konami SCC\00"
define i8* @langRomTypeKonamiScc() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int rand();
void *rand_page() {
  uint64_t res = 0;
  for (int i = 0; i < 3; i++) {
    res = (res << 16) ^ rand();
  }
  res = res & 0x00007FFFFFFFFFFF;
  return (void *)(res & ~0xfffLL);
}


x86 assembly (clang, -O0):
<rand_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    1158 <rand_page+0x48>
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <rand_page+0x16>
movslq -0x4(%rbp),%rax
movabs $0x7fffffffffff,%rcx
and    %rcx,%rax
mov    %eax,-0x4(%rbp)
movslq -0x4(%rbp),%rax
and    $0xfffffffffffff000,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_page>:
push   %rbx
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%ebx
shl    $0x10,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
and    $0xfffff000,%eax
xor    %ebx,%eax
cltq
pop    %rbx
ret

LLVM IR (-O0):
define i8* @rand_page() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %1
%8 = shl i32 %7, 16
%9 = call i32 (...) @rand()
%10 = xor i32 %8, %9
store i32 %10, i32* %1
br label %11
11: ; preds = %6
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %3
14: ; preds = %3
%15 = load i32, i32* %1
%16 = sext i32 %15 to i64
%17 = and i64 %16, 140737488355327
%18 = trunc i64 %17 to i32
store i32 %18, i32* %1
%19 = load i32, i32* %1
%20 = sext i32 %19 to i64
%21 = and i64 %20, -4096
%22 = inttoptr i64 %21 to i8*
ret i8* %22
}

LLVM IR (-O2):
define i8* @rand_page() {
%1 = tail call i32 (...) @rand()
%2 = tail call i32 (...) @rand()
%3 = shl i32 %2, 16
%4 = tail call i32 (...) @rand()
%5 = and i32 %4, -4096
%6 = xor i32 %5, %3
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}
/* Variables and functions */
int strlen(char *);
int xstrlen(char *p) { return strlen(p); }


x86 assembly (clang, -O0):
<xstrlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrlen>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i32 @xstrlen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @xstrlen(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
ret i32 %2
}
int test_imm_CBint16_mem(short *val) {
  return ((*val) & (0xCB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CBint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xcb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CBint16_mem>:
testb  $0xcb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CBint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 203
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_CBint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 203
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int remove_share_mem(int shmid) { return 1; }


x86 assembly (clang, -O0):
<remove_share_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_share_mem>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @remove_share_mem(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @remove_share_mem(i32 %0) {
ret i32 1
}
unsigned int AlcLRUCHash(unsigned int k) {
  k = (k + 0x7ed55d16) + (k << 12);
  k = (k ^ 0xc761c23c) ^ (k >> 19);
  k = (k + 0x165667b1) + (k << 5);
  k = (k + 0xd3a2646c) ^ (k << 9);
  k = (k + 0xfd7046c5) + (k << 3);
  k = (k ^ 0xb55a4f09) ^ (k >> 16);
  return (k);
}


x86 assembly (clang, -O0):
<AlcLRUCHash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x7ed55d16,%eax
mov    -0x4(%rbp),%ecx
shl    $0xc,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xc761c23c,%eax
mov    -0x4(%rbp),%ecx
shr    $0x13,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x165667b1,%eax
mov    -0x4(%rbp),%ecx
shl    $0x5,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xd3a2646c,%eax
mov    -0x4(%rbp),%ecx
shl    $0x9,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfd7046c5,%eax
mov    -0x4(%rbp),%ecx
shl    $0x3,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xb55a4f09,%eax
mov    -0x4(%rbp),%ecx
shr    $0x10,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AlcLRUCHash>:
mov    %edi,%eax
shl    $0xc,%eax
add    %edi,%eax
add    $0x7ed55d16,%eax
mov    %eax,%ecx
shr    $0x13,%ecx
xor    %eax,%ecx
xor    $0xc761c23c,%ecx
mov    %ecx,%eax
shl    $0x5,%eax
lea    (%rcx,%rax,1),%edx
shl    $0x9,%edx
add    %ecx,%eax
add    $0xe9f8cc1d,%eax
add    $0xaccf6200,%edx
xor    %eax,%edx
lea    (%rdx,%rdx,8),%ecx
add    $0xfd7046c5,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
xor    %ecx,%eax
xor    $0xb55a4f09,%eax
ret

LLVM IR (-O0):
define i32 @AlcLRUCHash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 2127912214
%5 = load i32, i32* %2
%6 = shl i32 %5, 12
%7 = add i32 %4, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = xor i32 %8, -949894596
%10 = load i32, i32* %2
%11 = lshr i32 %10, 19
%12 = xor i32 %9, %11
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = add i32 %13, 374761393
%15 = load i32, i32* %2
%16 = shl i32 %15, 5
%17 = add i32 %14, %16
store i32 %17, i32* %2
%18 = load i32, i32* %2
%19 = add i32 %18, -744332180
%20 = load i32, i32* %2
%21 = shl i32 %20, 9
%22 = xor i32 %19, %21
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = add i32 %23, -42973499
%25 = load i32, i32* %2
%26 = shl i32 %25, 3
%27 = add i32 %24, %26
store i32 %27, i32* %2
%28 = load i32, i32* %2
%29 = xor i32 %28, -1252372727
%30 = load i32, i32* %2
%31 = lshr i32 %30, 16
%32 = xor i32 %29, %31
store i32 %32, i32* %2
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @AlcLRUCHash(i32 %0) {
%2 = add i32 %0, 2127912214
%3 = shl i32 %0, 12
%4 = add i32 %2, %3
%5 = lshr i32 %4, 19
%6 = xor i32 %4, %5
%7 = xor i32 %6, -949894596
%8 = add i32 %7, 374761393
%9 = shl i32 %7, 5
%10 = add i32 %8, %9
%11 = add i32 %10, -744332180
%12 = shl i32 %10, 9
%13 = xor i32 %11, %12
%14 = add i32 %13, -42973499
%15 = shl i32 %13, 3
%16 = add i32 %14, %15
%17 = lshr i32 %16, 16
%18 = xor i32 %16, %17
%19 = xor i32 %18, -1252372727
ret i32 %19
}
int testBit_fun_llong(long long x, unsigned i) { return (x & 1 << i) != 0; }


x86 assembly (clang, -O0):
<testBit_fun_llong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testBit_fun_llong>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
xor    %eax,%eax
test   %rdi,%rcx
setne  %al
ret

LLVM IR (-O0):
define i32 @testBit_fun_llong(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = sext i32 %7 to i64
%9 = and i64 %5, %8
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @testBit_fun_llong(i64 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = sext i32 %3 to i64
%5 = and i64 %4, %0
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int t2();
int t4();
main() {
  if (t2() != 4096)
    abort();
  if (t4() != 4096)
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <t2@plt>
cmp    $0x1000,%eax
je     1168 <main+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x0,%al
call   1050 <t4@plt>
cmp    $0x1000,%eax
je     1181 <main+0x41>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <t2@plt>
cmp    $0x1000,%eax
jne    1164 <main+0x24>
xor    %eax,%eax
call   1050 <t4@plt>
cmp    $0x1000,%eax
jne    1164 <main+0x24>
xor    %edi,%edi
call   1060 <exit@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @t2()
%3 = icmp ne i32 %2, 4096
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i32 (...) @t4()
%8 = icmp ne i32 %7, 4096
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %6
%12 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @t2()
%2 = icmp eq i32 %1, 4096
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 (...) @t4()
%7 = icmp eq i32 %6, 4096
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %5
%11 = tail call i32 @exit(i32 0)
unreachable
}
int test_imm_E2uint32_reg(unsigned int val) {
  return ((val) & (0xE2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E2uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xe2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E2uint32_reg>:
test   $0xe2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E2uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 226
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_E2uint32_reg(i32 %0) {
%2 = and i32 %0, 226
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void PrintArr(int arr[], int n) {
  int i;
  for (i = 0; i < n; ++i) {
    printf("%d ", arr[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<PrintArr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <PrintArr+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <PrintArr+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintArr>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <PrintArr+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <PrintArr+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @PrintArr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @PrintArr(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
int calcpitch(int width, int bitcount, int granbits) {
  return (width * ((bitcount + 7) >> 3) >> granbits) << granbits;
}


x86 assembly (clang, -O0):
<calcpitch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x7,%ecx
sar    $0x3,%ecx
imul   %ecx,%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcpitch>:
mov    %edx,%ecx
lea    0x7(%rsi),%eax
sar    $0x3,%eax
imul   %edi,%eax
shr    %cl,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @calcpitch(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %8, 7
%10 = ashr i32 %9, 3
%11 = mul nsw i32 %7, %10
%12 = load i32, i32* %6
%13 = ashr i32 %11, %12
%14 = load i32, i32* %6
%15 = shl i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @calcpitch(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, 7
%5 = ashr i32 %4, 3
%6 = mul nsw i32 %5, %0
%7 = shl nsw i32 -1, %2
%8 = and i32 %6, %7
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ AUTH;

/* Variables and functions */
void authnone_verf(AUTH *x) { (void)x; }


x86 assembly (clang, -O0):
<authnone_verf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<authnone_verf>:
ret

LLVM IR (-O0):
define void @authnone_verf(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @authnone_verf(i32* nocapture %0) {
ret void
}
void foo791(int p) {}


x86 assembly (clang, -O0):
<foo791>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo791>:
ret

LLVM IR (-O0):
define void @foo791(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo791(i32 %0) {
ret void
}
void turn_breakpoint_off() {}


x86 assembly (clang, -O0):
<turn_breakpoint_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<turn_breakpoint_off>:
ret

LLVM IR (-O0):
define void @turn_breakpoint_off() {
ret void
}

LLVM IR (-O2):
define void @turn_breakpoint_off() {
ret void
}
int hexdig(c)
register int c;
{
  if (c <= '9')
    return (c - '0');
  else if (c <= 'F')
    return (c - 'A' + 10);
  else
    return (c - 'a' + 10);
}


x86 assembly (clang, -O0):
<hexdig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x39,-0x8(%rbp)
jg     111f <hexdig+0x1f>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <hexdig+0x46>
cmpl   $0x46,-0x8(%rbp)
jg     113a <hexdig+0x3a>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <hexdig+0x46>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexdig>:
xor    %ecx,%ecx
cmp    $0x47,%edi
setb   %cl
shl    $0x5,%ecx
add    $0xffffffa9,%ecx
cmp    $0x3a,%edi
mov    $0xffffffd0,%eax
cmovge %ecx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @hexdig(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 57
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 48
store i32 %8, i32* %2
br label %20
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 70
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 65
%15 = add nsw i32 %14, 10
store i32 %15, i32* %2
br label %20
16: ; preds = %9
%17 = load i32, i32* %3
%18 = sub nsw i32 %17, 97
%19 = add nsw i32 %18, 10
store i32 %19, i32* %2
br label %20
20: ; preds = %16, %12, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @hexdig(i32 %0) {
%2 = icmp slt i32 %0, 58
%3 = icmp ult i32 %0, 71
%4 = select i1 %3, i32 -55, i32 -87
%5 = select i1 %2, i32 -48, i32 %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
unsigned long int
unsignedlongint_ignoring_unsignedlonglong(unsigned long int x,
                                          unsigned long long y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlongint_ignoring_unsignedlonglong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlongint_ignoring_unsignedlonglong>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlongint_ignoring_unsignedlonglong(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlongint_ignoring_unsignedlonglong(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Variables and functions */
double scs_cos_ru(double);
double cos_ru(double x) { return scs_cos_ru(x); }


x86 assembly (clang, -O0):
<cos_ru>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <scs_cos_ru@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cos_ru>:
jmp    1030 <scs_cos_ru@plt>

LLVM IR (-O0):
define double @cos_ru(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @scs_cos_ru(double %3)
ret double %4
}

LLVM IR (-O2):
define double @cos_ru(double %0) {
%2 = tail call double @scs_cos_ru(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ check_c_timer_events();
int check_ircd_buffer();
int /*<<< orphan*/ check_u_timer_events();
int irc_DoEvents(void) {
  check_u_timer_events();
  check_c_timer_events();
  return check_ircd_buffer();
}


x86 assembly (clang, -O0):
<irc_DoEvents>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <check_u_timer_events@plt>
mov    $0x0,%al
call   1030 <check_c_timer_events@plt>
mov    $0x0,%al
call   1050 <check_ircd_buffer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_DoEvents>:
push   %rax
xor    %eax,%eax
call   1040 <check_u_timer_events@plt>
xor    %eax,%eax
call   1030 <check_c_timer_events@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <check_ircd_buffer@plt>

LLVM IR (-O0):
define i32 @irc_DoEvents() {
%1 = call i32 (...) @check_u_timer_events()
%2 = call i32 (...) @check_c_timer_events()
%3 = call i32 (...) @check_ircd_buffer()
ret i32 %3
}

LLVM IR (-O2):
define i32 @irc_DoEvents() {
%1 = tail call i32 (...) @check_u_timer_events()
%2 = tail call i32 (...) @check_c_timer_events()
%3 = tail call i32 (...) @check_ircd_buffer()
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char const *);
int /*<<< orphan*/ pver();
void usage(const char *name) {
  pver();
  printf("Usage: %s [global options] {subcmd} {imgfile} [options]\n", name);
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <pver@plt>
mov    -0x8(%rbp),%rsi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <pver@plt>
lea    0xebe(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"Usage: %s [global options] {subcmd} {imgfile} [options]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @pver()
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [57 x i8] c"Usage: %s [global options] {subcmd} {imgfile} [options]\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 (...) @pver()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ c2_pulse();
int gpio_get(int, int);
uint32_t c2_recv(int bits) {
  uint32_t v = 0;
  int i;
  for (i = 0; i != bits; i++) {
    v |= gpio_get(4, 13) << i;
    c2_pulse();
  }
  return v;
}


x86 assembly (clang, -O0):
<c2_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
je     1174 <c2_recv+0x54>
mov    $0x4,%edi
mov    $0xd,%esi
call   1040 <gpio_get@plt>
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <c2_pulse@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1139 <c2_recv+0x19>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c2_recv>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
je     1156 <c2_recv+0x36>
mov    %edi,%r14d
xor    %ebx,%ebx
xor    %ebp,%ebp
nop
mov    $0x4,%edi
mov    $0xd,%esi
call   1040 <gpio_get@plt>
mov    %ebx,%ecx
shl    %cl,%eax
or     %eax,%ebp
xor    %eax,%eax
call   1030 <c2_pulse@plt>
add    $0x1,%ebx
cmp    %ebx,%r14d
jne    1130 <c2_recv+0x10>
jmp    1158 <c2_recv+0x38>
xor    %ebp,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @c2_recv(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp ne i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = call i32 @gpio_get(i32 4, i32 13)
%11 = load i32, i32* %4
%12 = shl i32 %10, %11
%13 = load i32, i32* %3
%14 = or i32 %13, %12
store i32 %14, i32* %3
%15 = call i32 (...) @c2_pulse()
br label %16
16: ; preds = %9
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @c2_recv(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ 0, %1 ]
%6 = tail call i32 @gpio_get(i32 4, i32 13)
%7 = shl i32 %6, %4
%8 = or i32 %7, %5
%9 = tail call i32 (...) @c2_pulse()
%10 = add nuw nsw i32 %4, 1
%11 = icmp eq i32 %10, %0
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %13
}
void tt_complex_add(double *out, const double *in1, const double *in2) {
  out[0] = in1[0] + in2[0];
  out[1] = in1[1] + in2[1];
}


x86 assembly (clang, -O0):
<tt_complex_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
addsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
addsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tt_complex_add>:
movsd  (%rsi),%xmm0
addsd  (%rdx),%xmm0
movsd  %xmm0,(%rdi)
movsd  0x8(%rsi),%xmm0
addsd  0x8(%rdx),%xmm0
movsd  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @tt_complex_add(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %5
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double*, double** %6
%11 = getelementptr inbounds double, double* %10, i64 0
%12 = load double, double* %11
%13 = fadd double %9, %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 0
store double %13, double* %15
%16 = load double*, double** %5
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = load double*, double** %6
%20 = getelementptr inbounds double, double* %19, i64 1
%21 = load double, double* %20
%22 = fadd double %18, %21
%23 = load double*, double** %4
%24 = getelementptr inbounds double, double* %23, i64 1
store double %22, double* %24
ret void
}

LLVM IR (-O2):
define void @tt_complex_add(double* nocapture writeonly %0, double* nocapture %1, double* nocapture %2) {
%4 = load double, double* %1
%5 = load double, double* %2
%6 = fadd double %4, %5
store double %6, double* %0
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %2, i64 1
%10 = load double, double* %9
%11 = fadd double %8, %10
%12 = getelementptr inbounds double, double* %0, i64 1
store double %11, double* %12
ret void
}