xunge/DecIR huggingface dataset:
void testOffsetPassedAsConst() {
  char *string = malloc(sizeof(char) * 10);
  string += 1;
  passConstPtr(string);
  free(string);
}


x86 assembly (clang, -O0):
<testOffsetPassedAsConst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <passConstPtr@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testOffsetPassedAsConst>:
push   %rbx
mov    $0xa,%edi
call   1050 <malloc@plt>
lea    0x1(%rax),%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <passConstPtr@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @testOffsetPassedAsConst() {
%1 = alloca i8*
%2 = call i8* @malloc(i64 10)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = getelementptr inbounds i8, i8* %3, i64 1
store i8* %4, i8** %1
%5 = load i8*, i8** %1
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @passConstPtr to i32 (i8*, ...)*)(i8* %5)
%7 = load i8*, i8** %1
ret void
}

LLVM IR (-O2):
define void @testOffsetPassedAsConst() {
%1 = tail call dereferenceable_or_null(10) i8* @malloc(i64 10)
%2 = getelementptr inbounds i8, i8* %1, i64 1
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @passConstPtr to i32 (i8*, ...)*)(i8* %2)
tail call void @free(i8* %2)
ret void
}
int test_imm_FBint16_mem(short *val) {
  return ((*val) & (0xFB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FBint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xfb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FBint16_mem>:
testb  $0xfb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FBint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 251
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_FBint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 251
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ array_of_zero_size();
int /*<<< orphan*/ array_type_comp();
int /*<<< orphan*/ t1();
int /*<<< orphan*/ t2();
int /*<<< orphan*/ t3();
int /*<<< orphan*/ t4();
int /*<<< orphan*/ t5();
int /*<<< orphan*/ t6();
int /*<<< orphan*/ t7();
int main() {
  t1();
  t2();
  t3();
  t4();
  t5();
  t6();
  t7();
  array_of_zero_size();
  array_type_comp();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <t1@plt>
mov    $0x0,%al
call   1090 <t2@plt>
mov    $0x0,%al
call   1050 <t3@plt>
mov    $0x0,%al
call   10a0 <t4@plt>
mov    $0x0,%al
call   1060 <t5@plt>
mov    $0x0,%al
call   10b0 <t6@plt>
mov    $0x0,%al
call   1070 <t7@plt>
mov    $0x0,%al
call   1030 <array_of_zero_size@plt>
mov    $0x0,%al
call   1080 <array_type_comp@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <t1@plt>
xor    %eax,%eax
call   1090 <t2@plt>
xor    %eax,%eax
call   1050 <t3@plt>
xor    %eax,%eax
call   10a0 <t4@plt>
xor    %eax,%eax
call   1060 <t5@plt>
xor    %eax,%eax
call   10b0 <t6@plt>
xor    %eax,%eax
call   1070 <t7@plt>
xor    %eax,%eax
call   1030 <array_of_zero_size@plt>
xor    %eax,%eax
call   1080 <array_type_comp@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @t1()
%3 = call i32 (...) @t2()
%4 = call i32 (...) @t3()
%5 = call i32 (...) @t4()
%6 = call i32 (...) @t5()
%7 = call i32 (...) @t6()
%8 = call i32 (...) @t7()
%9 = call i32 (...) @array_of_zero_size()
%10 = call i32 (...) @array_type_comp()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @t1()
%2 = tail call i32 (...) @t2()
%3 = tail call i32 (...) @t3()
%4 = tail call i32 (...) @t4()
%5 = tail call i32 (...) @t5()
%6 = tail call i32 (...) @t6()
%7 = tail call i32 (...) @t7()
%8 = tail call i32 (...) @array_of_zero_size()
%9 = tail call i32 (...) @array_type_comp()
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint64_t;
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int fallocate(int, int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int native_fallocate(int fd, uint64_t len) {
  return fallocate(fd, 0, 0, (off_t)len);
}


x86 assembly (clang, -O0):
<native_fallocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
xor    %edx,%edx
mov    %edx,%esi
call   1030 <fallocate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_fallocate>:
mov    %rsi,%rcx
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <fallocate@plt>

LLVM IR (-O0):
define i32 @native_fallocate(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = trunc i64 %6 to i32
%8 = call i32 @fallocate(i32 %5, i32 0, i32 0, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @native_fallocate(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = tail call i32 @fallocate(i32 %0, i32 0, i32 0, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EVIOCGRAB;
int ioctl(int, int /*<<< orphan*/, int);
int evf_input_grab(int fd) { return ioctl(fd, EVIOCGRAB, 1); }


x86 assembly (clang, -O0):
<evf_input_grab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evf_input_grab>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edx
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
@EVIOCGRAB = global i32 0
define i32 @evf_input_grab(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @EVIOCGRAB
%5 = call i32 @ioctl(i32 %3, i32 %4, i32 1)
ret i32 %5
}

LLVM IR (-O2):
@EVIOCGRAB = global i32 0
define i32 @evf_input_grab(i32 %0) {
%2 = load i32, i32* @EVIOCGRAB
%3 = tail call i32 @ioctl(i32 %0, i32 %2, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ arm_arith_rsc(int /*<<< orphan*/);
int /*<<< orphan*/ arm_data_regi_op();
void arm_rsc_regi() { arm_arith_rsc(arm_data_regi_op()); }


x86 assembly (clang, -O0):
<arm_rsc_regi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <arm_data_regi_op@plt>
mov    %eax,%edi
call   1030 <arm_arith_rsc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_rsc_regi>:
push   %rax
xor    %eax,%eax
call   1040 <arm_data_regi_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <arm_arith_rsc@plt>

LLVM IR (-O0):
define void @arm_rsc_regi() {
%1 = call i32 (...) @arm_data_regi_op()
%2 = call i32 @arm_arith_rsc(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_rsc_regi() {
%1 = tail call i32 (...) @arm_data_regi_op()
%2 = tail call i32 @arm_arith_rsc(i32 %1)
ret void
}
/* Type definitions */
struct target {
  int dummy;
};

/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ snprintf(char *, int, char *);
char *dump_sys_munlockall(int depth, struct target *target) {
  char *param_str = malloc(5);
  snprintf(param_str, 5, "void");
  return param_str;
}


x86 assembly (clang, -O0):
<dump_sys_munlockall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x5,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x5,%esi
lea    0xeb3(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_sys_munlockall>:
push   %rbx
mov    $0x5,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rdx
mov    %rax,%rdi
mov    $0x5,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.target = type { i32 }
@.str = [5 x i8] c"void\00"
define i8* @dump_sys_munlockall(i32 %0, %struct.target* %1) {
%3 = alloca i32
%4 = alloca %struct.target*
%5 = alloca i8*
store i32 %0, i32* %3
store %struct.target* %1, %struct.target** %4
%6 = call i8* @malloc(i32 5)
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = call i32 @snprintf(i8* %7, i32 5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %5
ret i8* %9
}

LLVM IR (-O2):
%struct.target = type { i32 }
@.str = [5 x i8] c"void\00"
define i8* @dump_sys_munlockall(i32 %0, %struct.target* nocapture readnone %1) {
%3 = tail call dereferenceable_or_null(5) i8* @malloc(i32 5)
%4 = tail call i32 @snprintf(i8* %3, i32 5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
void rop3_16_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | S;
  stk2 = ~stk2;
  stk1 = T & stk2;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_16_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_16_0_1>:
not    %sil
and    %dl,%sil
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_16_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8, i8* %6
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = and i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = and i32 %27, %29
%31 = load i8, i8* %7
%32 = zext i8 %31 to i32
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = or i32 %30, %36
%38 = load i8, i8* %6
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = xor i32 %41, -1
%43 = and i32 %39, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = and i32 %43, %46
%48 = or i32 %37, %47
%49 = trunc i32 %48 to i8
%50 = load i8*, i8** %4
store i8 %49, i8* %50
ret void
}

LLVM IR (-O2):
define void @rop3_16_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %1, -1
%6 = and i8 %5, %2
%7 = and i8 %6, %4
store i8 %7, i8* %0
ret void
}
/* Variables and functions */
double RAND_MAX;
double rand();
long TestingJittered(long index, long total) {
  return (rand() * 1.0 / RAND_MAX <= 0.9) ? index : (index - 2);
}


x86 assembly (clang, -O0):
<TestingJittered>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movaps %xmm0,%xmm1
movsd  0xed6(%rip),%xmm0
mulsd  %xmm0,%xmm1
mov    0x2eab(%rip),%rax
divsd  (%rax),%xmm1
movsd  0xeb7(%rip),%xmm0
ucomisd %xmm1,%xmm0
jb     1160 <TestingJittered+0x50>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    116c <TestingJittered+0x5c>
mov    -0x8(%rbp),%rax
sub    $0x2,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestingJittered>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <rand@plt>
mov    0x2ec6(%rip),%rax
divsd  (%rax),%xmm0
lea    -0x2(%rbx),%rax
movsd  0xece(%rip),%xmm1
ucomisd %xmm0,%xmm1
cmovae %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define i64 @TestingJittered(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call double (...) @rand()
%6 = fmul double %5, 1.000000e+00
%7 = load double, double* @RAND_MAX
%8 = fdiv double %6, %7
%9 = fcmp ole double %8, 9.000000e-01
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i64, i64* %3
br label %15
12: ; preds = %2
%13 = load i64, i64* %3
%14 = sub nsw i64 %13, 2
br label %15
15: ; preds = %12, %10
%16 = phi i64 [ %11, %10 ], [ %14, %12 ]
ret i64 %16
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define i64 @TestingJittered(i64 %0, i64 %1) {
%3 = tail call double (...) @rand()
%4 = load double, double* @RAND_MAX
%5 = fdiv double %3, %4
%6 = fcmp ole double %5, 9.000000e-01
%7 = add nsw i64 %0, -2
%8 = select i1 %6, i64 %0, i64 %7
ret i64 %8
}
/* Variables and functions */
long long log(int);
long long int logtwo(double x) { return (log(x) / log(2)); }


x86 assembly (clang, -O0):
<logtwo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%edi
call   1030 <log@plt>
mov    %rax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <log@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cqto
idiv   %rcx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logtwo>:
push   %rbx
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mov    %rax,%rbx
mov    $0x2,%edi
call   1030 <log@plt>
mov    %rax,%rcx
mov    %rbx,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     1140 <logtwo+0x30>
mov    %rbx,%rax
cqto
idiv   %rcx
pop    %rbx
ret
mov    %ebx,%eax
xor    %edx,%edx
div    %ecx
pop    %rbx
ret

LLVM IR (-O0):
define i64 @logtwo(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fptosi double %3 to i32
%5 = call i64 @log(i32 %4)
%6 = call i64 @log(i32 2)
%7 = sdiv i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @logtwo(double %0) {
%2 = fptosi double %0 to i32
%3 = tail call i64 @log(i32 %2)
%4 = tail call i64 @log(i32 2)
%5 = sdiv i64 %3, %4
ret i64 %5
}
void asn1_add_error(void) {}


x86 assembly (clang, -O0):
<asn1_add_error>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asn1_add_error>:
ret

LLVM IR (-O0):
define void @asn1_add_error() {
ret void
}

LLVM IR (-O2):
define void @asn1_add_error() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t rgb24_to_rgb16(uint32_t val) {
  return ((val >> 3) & 0x1F) + (((val >> 10) & 0x3F) << 5) +
         (((val >> 19) & 0x1F) << 11);
}


x86 assembly (clang, -O0):
<rgb24_to_rgb16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
and    $0x1f,%eax
mov    -0x4(%rbp),%ecx
sar    $0xa,%ecx
and    $0x3f,%ecx
shl    $0x5,%ecx
add    %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x13,%ecx
and    $0x1f,%ecx
shl    $0xb,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb24_to_rgb16>:
mov    %edi,%ecx
shr    $0x3,%ecx
and    $0x1f,%ecx
mov    %edi,%eax
shr    $0x5,%eax
and    $0x7e0,%eax
or     %ecx,%eax
shr    $0x8,%edi
and    $0xf800,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rgb24_to_rgb16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 3
%5 = and i32 %4, 31
%6 = load i32, i32* %2
%7 = ashr i32 %6, 10
%8 = and i32 %7, 63
%9 = shl i32 %8, 5
%10 = add nsw i32 %5, %9
%11 = load i32, i32* %2
%12 = ashr i32 %11, 19
%13 = and i32 %12, 31
%14 = shl i32 %13, 11
%15 = add nsw i32 %10, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @rgb24_to_rgb16(i32 %0) {
%2 = lshr i32 %0, 3
%3 = and i32 %2, 31
%4 = lshr i32 %0, 5
%5 = and i32 %4, 2016
%6 = or i32 %3, %5
%7 = lshr i32 %0, 8
%8 = and i32 %7, 63488
%9 = or i32 %6, %8
ret i32 %9
}
/* Type definitions */
typedef scalar_t__ uint_fast8_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_LESS_THAN_uint_fast8_t(uint_fast8_t const k1,
                                              uint_fast8_t const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_LESS_THAN_uint_fast8_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_LESS_THAN_uint_fast8_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint_fast8_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint_fast8_t(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int atof_vax_sizeof(int letter) {
  int return_value;
  switch (letter) {
  case 'f':
  case 'F':
    return_value = 4;
    break;
  case 'd':
  case 'D':
  case 'g':
  case 'G':
    return_value = 8;
    break;
  case 'h':
  case 'H':
    return_value = 16;
    break;
  default:
    return_value = 0;
    break;
  }
  return return_value;
}


x86 assembly (clang, -O0):
<atof_vax_sizeof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x44,%eax
je     119e <atof_vax_sizeof+0x9e>
jmp    111b <atof_vax_sizeof+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x46,%eax
je     1192 <atof_vax_sizeof+0x92>
jmp    112c <atof_vax_sizeof+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x47,%eax
je     119e <atof_vax_sizeof+0x9e>
jmp    113d <atof_vax_sizeof+0x3d>
mov    -0xc(%rbp),%eax
sub    $0x48,%eax
je     11aa <atof_vax_sizeof+0xaa>
jmp    114e <atof_vax_sizeof+0x4e>
mov    -0xc(%rbp),%eax
sub    $0x64,%eax
je     119e <atof_vax_sizeof+0x9e>
jmp    115f <atof_vax_sizeof+0x5f>
mov    -0xc(%rbp),%eax
sub    $0x66,%eax
je     1192 <atof_vax_sizeof+0x92>
jmp    1170 <atof_vax_sizeof+0x70>
mov    -0xc(%rbp),%eax
sub    $0x67,%eax
je     119e <atof_vax_sizeof+0x9e>
jmp    1181 <atof_vax_sizeof+0x81>
mov    -0xc(%rbp),%eax
sub    $0x68,%eax
je     11aa <atof_vax_sizeof+0xaa>
jmp    11b6 <atof_vax_sizeof+0xb6>
movl   $0x4,-0x8(%rbp)
jmp    11bd <atof_vax_sizeof+0xbd>
movl   $0x8,-0x8(%rbp)
jmp    11bd <atof_vax_sizeof+0xbd>
movl   $0x10,-0x8(%rbp)
jmp    11bd <atof_vax_sizeof+0xbd>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atof_vax_sizeof>:
add    $0xffffffbc,%edi
cmp    $0x24,%edi
ja     1149 <atof_vax_sizeof+0x49>
movabs $0x900000009,%rax
bt     %rdi,%rax
jb     1143 <atof_vax_sizeof+0x43>
mov    $0x4,%eax
movabs $0x400000004,%rcx
bt     %rdi,%rcx
jb     114b <atof_vax_sizeof+0x4b>
movabs $0x1000000010,%rax
bt     %rdi,%rax
jae    1149 <atof_vax_sizeof+0x49>
mov    $0x10,%eax
ret
mov    $0x8,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @atof_vax_sizeof(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %8 [
i32 102, label %5
i32 70, label %5
i32 100, label %6
i32 68, label %6
i32 103, label %6
i32 71, label %6
i32 104, label %7
i32 72, label %7
]
5: ; preds = %1, %1
store i32 4, i32* %3
br label %9
6: ; preds = %1, %1, %1, %1
store i32 8, i32* %3
br label %9
7: ; preds = %1, %1
store i32 16, i32* %3
br label %9
8: ; preds = %1
store i32 0, i32* %3
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @atof_vax_sizeof(i32 %0) {
switch i32 %0, label %4 [
i32 102, label %5
i32 70, label %5
i32 100, label %2
i32 68, label %2
i32 103, label %2
i32 71, label %2
i32 104, label %3
i32 72, label %3
]
2: ; preds = %1, %1, %1, %1
br label %5
3: ; preds = %1, %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %1, %4, %3, %2
%6 = phi i32 [ 0, %4 ], [ 16, %3 ], [ 8, %2 ], [ 4, %1 ], [ 4, %1 ]
ret i32 %6
}
/* Type definitions */
struct vec4i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec4i_assign(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
__attribute__((always_)) struct vec4i *psvec4i_assign(struct vec4i *result,
                                                      struct vec4i *a) {
  vec4i_assign((int32_t *)result, (int32_t *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec4i_assign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec4i_assign@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4i_assign>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4i_assign@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4i = type { i32 }
define %struct.vec4i* @psvec4i_assign(%struct.vec4i* %0, %struct.vec4i* %1) {
%3 = alloca %struct.vec4i*
%4 = alloca %struct.vec4i*
store %struct.vec4i* %0, %struct.vec4i** %3
store %struct.vec4i* %1, %struct.vec4i** %4
%5 = load %struct.vec4i*, %struct.vec4i** %3
%6 = bitcast %struct.vec4i* %5 to i32*
%7 = load %struct.vec4i*, %struct.vec4i** %4
%8 = bitcast %struct.vec4i* %7 to i32*
%9 = call i32 @vec4i_assign(i32* %6, i32* %8)
%10 = load %struct.vec4i*, %struct.vec4i** %3
ret %struct.vec4i* %10
}

LLVM IR (-O2):
%struct.vec4i = type { i32 }
define %struct.vec4i* @psvec4i_assign(%struct.vec4i* returned %0, %struct.vec4i* %1) {
%3 = getelementptr %struct.vec4i, %struct.vec4i* %0, i64 0, i32 0
%4 = getelementptr %struct.vec4i, %struct.vec4i* %1, i64 0, i32 0
%5 = tail call i32 @vec4i_assign(i32* %3, i32* %4)
ret %struct.vec4i* %0
}
int mpc_boundary_newline_anchor(char prev, char next) {
  (void)next;
  return prev == '\n';
}


x86 assembly (clang, -O0):
<mpc_boundary_newline_anchor>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpc_boundary_newline_anchor>:
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @mpc_boundary_newline_anchor(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 10
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @mpc_boundary_newline_anchor(i8 signext %0, i8 signext %1) {
%3 = icmp eq i8 %0, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
int Max2(int a, int b) { return (a > b ? a : b); }


x86 assembly (clang, -O0):
<Max2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <Max2+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <Max2+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Max2>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @Max2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @Max2(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
struct stat {
  size_t st_size;
};

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int fstat(int, struct stat *);
int /*<<< orphan*/ perror(char *);
size_t file_size(int fd) {
  struct stat sb;
  if (fstat(fd, &sb) == -1)
    do {
      perror("fstat");
      exit(EXIT_FAILURE);
    } while (0);
  return sb.st_size;
}


x86 assembly (clang, -O0):
<file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1050 <fstat@plt>
cmp    $0xffffffff,%eax
jne    116f <file_size+0x3f>
jmp    1155 <file_size+0x25>
lea    0xea4(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_size>:
push   %rax
mov    %rsp,%rsi
call   1050 <fstat@plt>
cmp    $0xffffffff,%eax
je     1144 <file_size+0x14>
mov    (%rsp),%rax
pop    %rcx
ret
lea    0xeb5(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
%struct.stat = type { i64 }
@.str = [6 x i8] c"fstat\00"
@EXIT_FAILURE = global i32 0
define i64 @file_size(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.stat
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fstat(i32 %4, %struct.stat* %3)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %13
7: ; preds = %1
br label %8
8: ; preds = %7
%9 = call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @EXIT_FAILURE
%11 = call i32 @exit(i32 %10)
unreachable
12: ; No predecessors!
br label %13
13: ; preds = %12, %1
%14 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%15 = load i64, i64* %14
ret i64 %15
}

LLVM IR (-O2):
%struct.stat = type { i64 }
@.str = [6 x i8] c"fstat\00"
@EXIT_FAILURE = global i32 0
define i64 @file_size(i32 %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @fstat(i32 %0, %struct.stat* %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = tail call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
%11 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%12 = load i64, i64* %11
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  unsigned short int allbits = -1;
  short int signedallbits = allbits;
  int unsignedtosigned = allbits;
  unsigned int unsignedtounsigned = allbits;
  int signedtosigned = signedallbits;
  unsigned int signedtounsigned = signedallbits;
  if (unsignedtosigned == 65535 && unsignedtounsigned == 65535 &&
      signedtosigned == -1 && signedtounsigned == 4294967295) {
    assert(1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movw   $0xffff,-0x6(%rbp)
mov    -0x6(%rbp),%ax
mov    %ax,-0x8(%rbp)
movzwl -0x6(%rbp),%eax
mov    %eax,-0xc(%rbp)
movzwl -0x6(%rbp),%eax
mov    %eax,-0x10(%rbp)
movswl -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
movswl -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
cmpl   $0xffff,-0xc(%rbp)
jne    1188 <main+0x78>
cmpl   $0xffff,-0x10(%rbp)
jne    1188 <main+0x78>
cmpl   $0xffffffff,-0x14(%rbp)
jne    1188 <main+0x78>
mov    -0x18(%rbp),%eax
mov    $0xffffffff,%ecx
cmp    %rcx,%rax
jne    1188 <main+0x78>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
%3 = alloca i16
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %1
store i16 -1, i16* %2
%8 = load i16, i16* %2
store i16 %8, i16* %3
%9 = load i16, i16* %2
%10 = zext i16 %9 to i32
store i32 %10, i32* %4
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
store i32 %12, i32* %5
%13 = load i16, i16* %3
%14 = sext i16 %13 to i32
store i32 %14, i32* %6
%15 = load i16, i16* %3
%16 = sext i16 %15 to i32
store i32 %16, i32* %7
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 65535
br i1 %18, label %19, label %31
19: ; preds = %0
%20 = load i32, i32* %5
%21 = icmp eq i32 %20, 65535
br i1 %21, label %22, label %31
22: ; preds = %19
%23 = load i32, i32* %6
%24 = icmp eq i32 %23, -1
br i1 %24, label %25, label %31
25: ; preds = %22
%26 = load i32, i32* %7
%27 = zext i32 %26 to i64
%28 = icmp eq i64 %27, 4294967295
br i1 %28, label %29, label %31
29: ; preds = %25
%30 = call i32 @assert(i32 1)
br label %31
31: ; preds = %29, %25, %22, %19, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int pm8xxx_mpp_cfg(unsigned int, int, unsigned int, unsigned int);
int pm8xxx_mpp_config_dtest_sink(unsigned mpp, unsigned level,
                                 unsigned control) {
  return pm8xxx_mpp_cfg(mpp, 6, level, control);
}


x86 assembly (clang, -O0):
<pm8xxx_mpp_config_dtest_sink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0x6,%esi
call   1030 <pm8xxx_mpp_cfg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm8xxx_mpp_config_dtest_sink>:
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x6,%esi
jmp    1030 <pm8xxx_mpp_cfg@plt>

LLVM IR (-O0):
define i32 @pm8xxx_mpp_config_dtest_sink(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @pm8xxx_mpp_cfg(i32 %7, i32 6, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @pm8xxx_mpp_config_dtest_sink(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @pm8xxx_mpp_cfg(i32 %0, i32 6, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void ui_help(void) {
  char *helpstr = "u - units\n"
                  "i - unit info\n"
                  "s - show map\n"
                  "m - move\n"
                  "a - attack\n"
                  "t - end turn\n"
                  "h - help\n"
                  "q - quit\n"
                  "p - show player id\n";
  puts(helpstr);
}


x86 assembly (clang, -O0):
<ui_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [108 x i8] c"u - units\0Ai - unit info\0As - show map\0Am - move\0Aa - attack\0At - end turn\0Ah - help\0Aq - quit\0Ap - show player id\0A\00"
define void @ui_help() {
%1 = alloca i8*
store i8* getelementptr inbounds ([108 x i8], [108 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @puts(i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [108 x i8] c"u - units\0Ai - unit info\0As - show map\0Am - move\0Aa - attack\0At - end turn\0Ah - help\0Aq - quit\0Ap - show player id\0A\00"
define void @ui_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([108 x i8], [108 x i8]* @.str, i64 0, i64 0))
ret void
}
void dsi_wait_pll_hsdiv_dispc_active(void) {}


x86 assembly (clang, -O0):
<dsi_wait_pll_hsdiv_dispc_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsi_wait_pll_hsdiv_dispc_active>:
ret

LLVM IR (-O0):
define void @dsi_wait_pll_hsdiv_dispc_active() {
ret void
}

LLVM IR (-O2):
define void @dsi_wait_pll_hsdiv_dispc_active() {
ret void
}
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int cpu_to_le16(int);
int ieee80211_is_coding_coding(__le16 fc) {
  return (fc & cpu_to_le16(0x000c | 0x00f0)) == cpu_to_le16(0x000c | 0x0000);
}


x86 assembly (clang, -O0):
<ieee80211_is_coding_coding>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xfc,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0xc,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_is_coding_coding>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0xfc,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ebp
and    %ebx,%ebp
mov    $0xc,%edi
call   1030 <cpu_to_le16@plt>
xor    %ecx,%ecx
cmp    %eax,%ebp
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ieee80211_is_coding_coding(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cpu_to_le16(i32 252)
%5 = and i32 %3, %4
%6 = call i32 @cpu_to_le16(i32 12)
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ieee80211_is_coding_coding(i32 %0) {
%2 = tail call i32 @cpu_to_le16(i32 252)
%3 = and i32 %2, %0
%4 = tail call i32 @cpu_to_le16(i32 12)
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int test_imm_F8uint8_mem(unsigned char *val) {
  return ((*val) & (-0xF8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F8uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff08,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F8uint8_mem>:
testb  $0x8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F8uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -248
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F8uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 8
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ timer_t;

/* Variables and functions */
int /*<<< orphan*/ Log(int, char *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
scalar_t__ timer_delete(int /*<<< orphan*/);
int stop_watchdog(timer_t timerid) {
  if (timer_delete(timerid) < 0) {
    Log(4, "Failed to stop watchdog timer: %s", strerror(errno));
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<stop_watchdog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <timer_delete@plt>
cmp    $0x0,%rax
jge    117a <stop_watchdog+0x4a>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %eax,%edx
mov    $0x4,%edi
lea    0xe97(%rip),%rsi
call   1040 <Log@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1181 <stop_watchdog+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_watchdog>:
push   %rax
call   1030 <timer_delete@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
js     1142 <stop_watchdog+0x12>
pop    %rcx
ret
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xea9(%rip),%rsi
mov    $0x4,%edi
mov    %eax,%edx
call   1040 <Log@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"Failed to stop watchdog timer: %s\00"
@errno = global i32 0
define i32 @stop_watchdog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @timer_delete(i32 %4)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* @errno
%9 = call i32 @strerror(i32 %8)
%10 = call i32 @Log(i32 4, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %9)
store i32 -1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [34 x i8] c"Failed to stop watchdog timer: %s\00"
@errno = global i32 0
define i32 @stop_watchdog(i32 %0) {
%2 = tail call i64 @timer_delete(i32 %0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @errno
%6 = tail call i32 @strerror(i32 %5)
%7 = tail call i32 @Log(i32 4, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int japi_getdanger(int);
int j_getdanger(int arg0) { return (japi_getdanger(arg0)); }


x86 assembly (clang, -O0):
<j_getdanger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_getdanger@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_getdanger>:
jmp    1030 <japi_getdanger@plt>

LLVM IR (-O0):
define i32 @j_getdanger(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_getdanger(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_getdanger(i32 %0) {
%2 = tail call i32 @japi_getdanger(i32 %0)
ret i32 %2
}
/* Variables and functions */
int japi_getxpos(int);
int j_getxpos(int arg0) { return (japi_getxpos(arg0)); }


x86 assembly (clang, -O0):
<j_getxpos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_getxpos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_getxpos>:
jmp    1030 <japi_getxpos@plt>

LLVM IR (-O0):
define i32 @j_getxpos(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_getxpos(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_getxpos(i32 %0) {
%2 = tail call i32 @japi_getxpos(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void common() { printf("hello\n"); }


x86 assembly (clang, -O0):
<common>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<common>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"hello\0A\00"
define void @common() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"hello\00"
define void @common() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
int ind3D(int i, int j, int k, int nrow, int ncol, int ndep) {
  int ind = nrow * ncol * k + nrow * j + i;
  return ind;
}


x86 assembly (clang, -O0):
<ind3D>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x10(%rbp),%eax
imul   -0x14(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
imul   -0x8(%rbp),%ecx
add    %ecx,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ind3D>:
imul   %r8d,%edx
lea    (%rdx,%rsi,1),%eax
imul   %ecx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ind3D(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%14 = load i32, i32* %10
%15 = load i32, i32* %11
%16 = mul nsw i32 %14, %15
%17 = load i32, i32* %9
%18 = mul nsw i32 %16, %17
%19 = load i32, i32* %10
%20 = load i32, i32* %8
%21 = mul nsw i32 %19, %20
%22 = add nsw i32 %18, %21
%23 = load i32, i32* %7
%24 = add nsw i32 %22, %23
store i32 %24, i32* %13
%25 = load i32, i32* %13
ret i32 %25
}

LLVM IR (-O2):
define i32 @ind3D(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = mul i32 %4, %2
%8 = add i32 %7, %1
%9 = mul i32 %8, %3
%10 = add i32 %9, %0
ret i32 %10
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};
struct dirent {
  int /*<<< orphan*/ d_name;
};

/* Variables and functions */
scalar_t__ S_ISREG(int /*<<< orphan*/);
int /*<<< orphan*/ stat(int /*<<< orphan*/, struct stat *);
int mail_file_filter(const struct dirent *en) {
  struct stat buf;
  stat(en->d_name, &buf);
  if (S_ISREG(buf.st_mode))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<mail_file_filter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
mov    -0x18(%rbp),%edi
call   1040 <S_ISREG@plt>
cmp    $0x0,%rax
je     1159 <mail_file_filter+0x39>
movl   $0x1,-0x4(%rbp)
jmp    1160 <mail_file_filter+0x40>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mail_file_filter>:
push   %rax
mov    (%rdi),%edi
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    (%rsp),%edi
call   1040 <S_ISREG@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.dirent = type { i32 }
%struct.stat = type { i32 }
define i32 @mail_file_filter(%struct.dirent* %0) {
%2 = alloca i32
%3 = alloca %struct.dirent*
%4 = alloca %struct.stat
store %struct.dirent* %0, %struct.dirent** %3
%5 = load %struct.dirent*, %struct.dirent** %3
%6 = getelementptr inbounds %struct.dirent, %struct.dirent* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = call i32 @stat(i32 %7, %struct.stat* %4)
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%10 = load i32, i32* %9
%11 = call i64 @S_ISREG(i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %1
store i32 1, i32* %2
br label %15
14: ; preds = %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.dirent = type { i32 }
%struct.stat = type { i32 }
define i32 @mail_file_filter(%struct.dirent* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = call i32 @stat(i32 %5, %struct.stat* %2)
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = call i64 @S_ISREG(i32 %8)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int __builtin_rx_xchg(int);
int exchange(int arg1, int arg2) {
  arg1 = __builtin_rx_xchg(arg2);
  return arg1;
}


x86 assembly (clang, -O0):
<exchange>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <__builtin_rx_xchg@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exchange>:
mov    %esi,%edi
jmp    1030 <__builtin_rx_xchg@plt>

LLVM IR (-O0):
define i32 @exchange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @__builtin_rx_xchg(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @exchange(i32 %0, i32 %1) {
%3 = tail call i32 @__builtin_rx_xchg(i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char *);
int ReadYesNoPullDown(const char *cLabel) {
  if (!strcmp(cLabel, "Yes"))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ReadYesNoPullDown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
jne    1141 <ReadYesNoPullDown+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1148 <ReadYesNoPullDown+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadYesNoPullDown>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"Yes\00"
define i32 @ReadYesNoPullDown(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @strcmp(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [4 x i8] c"Yes\00"
define i32 @ReadYesNoPullDown(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(4) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
float stayHalfLinearInterpolation(float p) {
  if (p < 0.292) {
    return 0;
  } else {
    return -2 * (p - 1) * (p - 1) + 1;
  }
}


x86 assembly (clang, -O0):
<stayHalfLinearInterpolation>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <stayHalfLinearInterpolation+0x31>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1174 <stayHalfLinearInterpolation+0x74>
movss  -0x8(%rbp),%xmm1
movss  0xeca(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xec2(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  -0x8(%rbp),%xmm1
movss  0xead(%rip),%xmm2
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  0xe9d(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<stayHalfLinearInterpolation>:
cvtss2sd %xmm0,%xmm1
movsd  0xef4(%rip),%xmm2
ucomisd %xmm1,%xmm2
xorps  %xmm1,%xmm1
ja     1135 <stayHalfLinearInterpolation+0x35>
addss  0xeeb(%rip),%xmm0
movss  0xee7(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
addss  0xedb(%rip),%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @stayHalfLinearInterpolation(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = fcmp olt double %5, 2.920000e-01
br i1 %6, label %7, label %8
7: ; preds = %1
store float 0.000000e+00, float* %2
br label %15
8: ; preds = %1
%9 = load float, float* %3
%10 = fsub float %9, 1.000000e+00
%11 = fmul float -2.000000e+00, %10
%12 = load float, float* %3
%13 = fsub float %12, 1.000000e+00
%14 = call float @llvm.fmuladd.f32(float %11, float %13, float 1.000000e+00)
store float %14, float* %2
br label %15
15: ; preds = %8, %7
%16 = load float, float* %2
ret float %16
}

LLVM IR (-O2):
define float @stayHalfLinearInterpolation(float %0) {
%2 = fpext float %0 to double
%3 = fcmp olt double %2, 2.920000e-01
%4 = fadd float %0, -1.000000e+00
%5 = fmul float %4, -2.000000e+00
%6 = tail call float @llvm.fmuladd.f32(float %5, float %4, float 1.000000e+00)
%7 = select i1 %3, float 0.000000e+00, float %6
ret float %7
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int clear_standard_Laurent_data(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(771, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<clear_standard_Laurent_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x303,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_standard_Laurent_data>:
mov    $0x303,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @clear_standard_Laurent_data() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 771, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @clear_standard_Laurent_data() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 771, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}