#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ nvic_irq_enable(int);
int /*<<< orphan*/ nvic_irq_setprio(int, int /*<<< orphan*/);
int /*<<< orphan*/ usart1_init();
int /*<<< orphan*/ usart2_init();
int usart_init(uint32_t dev, uint32_t bitrate, uint8_t data, char parity,
               uint8_t stop) {
  uint32_t reg;
  int rtscts = 0;
  if (dev == (0x40013800UL)) {
    usart1_init();
  } else if (dev == (0x40004400UL))
    usart2_init();
  else
    return -1;
  (*((volatile uint32_t *)(dev + 0x00))) &= ~((1 << 0));
  (*((volatile uint32_t *)(dev + 0x00))) |= ((1 << 3) | (1 << 2));
  (*((volatile uint32_t *)(dev + 0x0C))) = 40000000 / (bitrate);
  if (data == 8)
    (*((volatile uint32_t *)(dev + 0x00))) &= ~(1 << 28);
  else
    (*((volatile uint32_t *)(dev + 0x00))) |= (1 << 28);
  switch (parity) {
  case 'O':
    (*((volatile uint32_t *)(dev + 0x00))) |= (1 << 9);
  case 'E':
    (*((volatile uint32_t *)(dev + 0x00))) |= (1 << 10);
    break;
  default:
    (*((volatile uint32_t *)(dev + 0x00))) &= ~((1 << 10) | (1 << 9));
  }
  (void)stop;
  if (rtscts)
    (*((volatile uint32_t *)(dev + 0x08))) |= (1 << 9) | (1 << 8);
  if (dev == (0x40013800UL)) {
    (*((volatile uint32_t *)(dev + 0x00))) |= (1 << 5) | (1 << 8);
    (*((volatile uint32_t *)(dev + 0x08))) |= (1 << 0);
    nvic_irq_enable((37));
    nvic_irq_setprio((37), 0);
  }
  (*((volatile uint32_t *)(dev + 0x00))) |= (1 << 0);
  return 0;
}


x86 assembly (clang, -O0):
<usart_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %cl,%al
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    %r8d,-0x18(%rbp)
movl   $0x0,-0x20(%rbp)
movslq -0x8(%rbp),%rax
cmp    $0x40013800,%rax
jne    117d <usart_init+0x3d>
mov    $0x0,%al
call   1050 <usart1_init@plt>
jmp    11aa <usart_init+0x6a>
movslq -0x8(%rbp),%rax
cmp    $0x40004400,%rax
jne    1199 <usart_init+0x59>
mov    $0x0,%al
call   1030 <usart2_init@plt>
jmp    11a5 <usart_init+0x65>
movl   $0xffffffff,-0x4(%rbp)
jmp    12ea <usart_init+0x1aa>
jmp    11aa <usart_init+0x6a>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     $0xc,%ecx
mov    %ecx,(%rax)
mov    $0x2625a00,%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    $0xc,%eax
cltq
mov    %ecx,(%rax)
cmpl   $0x8,-0x10(%rbp)
jne    11fe <usart_init+0xbe>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
and    $0xefffffff,%ecx
mov    %ecx,(%rax)
jmp    1210 <usart_init+0xd0>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     $0x10000000,%ecx
mov    %ecx,(%rax)
movsbl -0x11(%rbp),%eax
mov    %eax,-0x24(%rbp)
sub    $0x45,%eax
je     1248 <usart_init+0x108>
jmp    1225 <usart_init+0xe5>
mov    -0x24(%rbp),%eax
sub    $0x4f,%eax
jne    125f <usart_init+0x11f>
jmp    1236 <usart_init+0xf6>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     $0x200,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     $0x400,%ecx
mov    %ecx,(%rax)
jmp    1271 <usart_init+0x131>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
and    $0xfffff9ff,%ecx
mov    %ecx,(%rax)
cmpl   $0x0,-0x20(%rbp)
je     128d <usart_init+0x14d>
mov    -0x8(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     $0x300,%ecx
mov    %ecx,(%rax)
movslq -0x8(%rbp),%rax
cmp    $0x40013800,%rax
jne    12d4 <usart_init+0x194>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     $0x120,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
mov    $0x25,%edi
call   1060 <nvic_irq_enable@plt>
mov    $0x25,%edi
xor    %esi,%esi
call   1040 <nvic_irq_setprio@plt>
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usart_init>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%r12d
mov    %edi,%ebx
cmp    $0x40013800,%edi
jne    1164 <usart_init+0x24>
xor    %eax,%eax
call   1050 <usart1_init@plt>
jmp    117c <usart_init+0x3c>
mov    $0xffffffff,%eax
cmp    $0x40004400,%ebx
jne    120c <usart_init+0xcc>
xor    %eax,%eax
call   1030 <usart2_init@plt>
movslq %ebx,%rbp
andl   $0xfffffffe,0x0(%rbp)
orl    $0xc,0x0(%rbp)
mov    $0x2625a00,%eax
xor    %edx,%edx
idiv   %r12d
mov    %ebx,%ecx
mov    %eax,0xc(%rcx)
xor    %eax,%eax
cmp    $0x8,%r15d
setne  %al
mov    $0xefffffff,%ecx
and    0x0(%rbp),%ecx
shl    $0x1c,%eax
or     %ecx,%eax
mov    %eax,0x0(%rbp)
movsbl %r14b,%eax
cmp    $0x45,%eax
je     11c4 <usart_init+0x84>
cmp    $0x4f,%eax
jne    11ce <usart_init+0x8e>
orl    $0x200,0x0(%rbp)
mov    $0x400,%eax
or     0x0(%rbp),%eax
jmp    11d6 <usart_init+0x96>
mov    $0xfffff9ff,%eax
and    0x0(%rbp),%eax
mov    %eax,0x0(%rbp)
cmp    $0x40013800,%ebx
jne    1206 <usart_init+0xc6>
orl    $0x120,0x0(%rbp)
orl    $0x1,0x40013808
01
mov    $0x25,%edi
call   1060 <nvic_irq_enable@plt>
mov    $0x25,%edi
xor    %esi,%esi
call   1040 <nvic_irq_setprio@plt>
orl    $0x1,0x0(%rbp)
xor    %eax,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @usart_init(i32 %0, i32 %1, i32 %2, i8 signext %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i8 %3, i8* %10
store i32 %4, i32* %11
store i32 0, i32* %13
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = icmp eq i64 %15, 1073821696
br i1 %16, label %17, label %19
17: ; preds = %5
%18 = call i32 (...) @usart1_init()
br label %27
19: ; preds = %5
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = icmp eq i64 %21, 1073759232
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = call i32 (...) @usart2_init()
br label %26
25: ; preds = %19
store i32 -1, i32* %6
br label %123
26: ; preds = %23
br label %27
27: ; preds = %26, %17
%28 = load i32, i32* %7
%29 = add nsw i32 %28, 0
%30 = sext i32 %29 to i64
%31 = inttoptr i64 %30 to i32*
%32 = load volatile i32, i32* %31
%33 = and i32 %32, -2
store volatile i32 %33, i32* %31
%34 = load i32, i32* %7
%35 = add nsw i32 %34, 0
%36 = sext i32 %35 to i64
%37 = inttoptr i64 %36 to i32*
%38 = load volatile i32, i32* %37
%39 = or i32 %38, 12
store volatile i32 %39, i32* %37
%40 = load i32, i32* %8
%41 = sdiv i32 40000000, %40
%42 = load i32, i32* %7
%43 = add nsw i32 %42, 12
%44 = sext i32 %43 to i64
%45 = inttoptr i64 %44 to i32*
store volatile i32 %41, i32* %45
%46 = load i32, i32* %9
%47 = icmp eq i32 %46, 8
br i1 %47, label %48, label %55
48: ; preds = %27
%49 = load i32, i32* %7
%50 = add nsw i32 %49, 0
%51 = sext i32 %50 to i64
%52 = inttoptr i64 %51 to i32*
%53 = load volatile i32, i32* %52
%54 = and i32 %53, -268435457
store volatile i32 %54, i32* %52
br label %62
55: ; preds = %27
%56 = load i32, i32* %7
%57 = add nsw i32 %56, 0
%58 = sext i32 %57 to i64
%59 = inttoptr i64 %58 to i32*
%60 = load volatile i32, i32* %59
%61 = or i32 %60, 268435456
store volatile i32 %61, i32* %59
br label %62
62: ; preds = %55, %48
%63 = load i8, i8* %10
%64 = sext i8 %63 to i32
switch i32 %64, label %79 [
i32 79, label %65
i32 69, label %72
]
65: ; preds = %62
%66 = load i32, i32* %7
%67 = add nsw i32 %66, 0
%68 = sext i32 %67 to i64
%69 = inttoptr i64 %68 to i32*
%70 = load volatile i32, i32* %69
%71 = or i32 %70, 512
store volatile i32 %71, i32* %69
br label %72
72: ; preds = %62, %65
%73 = load i32, i32* %7
%74 = add nsw i32 %73, 0
%75 = sext i32 %74 to i64
%76 = inttoptr i64 %75 to i32*
%77 = load volatile i32, i32* %76
%78 = or i32 %77, 1024
store volatile i32 %78, i32* %76
br label %86
79: ; preds = %62
%80 = load i32, i32* %7
%81 = add nsw i32 %80, 0
%82 = sext i32 %81 to i64
%83 = inttoptr i64 %82 to i32*
%84 = load volatile i32, i32* %83
%85 = and i32 %84, -1537
store volatile i32 %85, i32* %83
br label %86
86: ; preds = %79, %72
%87 = load i32, i32* %11
%88 = load i32, i32* %13
%89 = icmp ne i32 %88, 0
br i1 %89, label %90, label %97
90: ; preds = %86
%91 = load i32, i32* %7
%92 = add nsw i32 %91, 8
%93 = sext i32 %92 to i64
%94 = inttoptr i64 %93 to i32*
%95 = load volatile i32, i32* %94
%96 = or i32 %95, 768
store volatile i32 %96, i32* %94
br label %97
97: ; preds = %90, %86
%98 = load i32, i32* %7
%99 = sext i32 %98 to i64
%100 = icmp eq i64 %99, 1073821696
br i1 %100, label %101, label %116
101: ; preds = %97
%102 = load i32, i32* %7
%103 = add nsw i32 %102, 0
%104 = sext i32 %103 to i64
%105 = inttoptr i64 %104 to i32*
%106 = load volatile i32, i32* %105
%107 = or i32 %106, 288
store volatile i32 %107, i32* %105
%108 = load i32, i32* %7
%109 = add nsw i32 %108, 8
%110 = sext i32 %109 to i64
%111 = inttoptr i64 %110 to i32*
%112 = load volatile i32, i32* %111
%113 = or i32 %112, 1
store volatile i32 %113, i32* %111
%114 = call i32 @nvic_irq_enable(i32 37)
%115 = call i32 @nvic_irq_setprio(i32 37, i32 0)
br label %116
116: ; preds = %101, %97
%117 = load i32, i32* %7
%118 = add nsw i32 %117, 0
%119 = sext i32 %118 to i64
%120 = inttoptr i64 %119 to i32*
%121 = load volatile i32, i32* %120
%122 = or i32 %121, 1
store volatile i32 %122, i32* %120
store i32 0, i32* %6
br label %123
123: ; preds = %116, %25
%124 = load i32, i32* %6
ret i32 %124
}

LLVM IR (-O2):
define i32 @usart_init(i32 %0, i32 %1, i32 %2, i8 signext %3, i32 %4) {
%6 = sext i32 %0 to i64
%7 = icmp eq i32 %0, 1073821696
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 (...) @usart1_init()
br label %14
10: ; preds = %5
%11 = icmp eq i32 %0, 1073759232
br i1 %11, label %12, label %51
12: ; preds = %10
%13 = tail call i32 (...) @usart2_init()
br label %14
14: ; preds = %12, %8
%15 = inttoptr i64 %6 to i32*
%16 = load volatile i32, i32* %15
%17 = and i32 %16, -2
store volatile i32 %17, i32* %15
%18 = load volatile i32, i32* %15
%19 = or i32 %18, 12
store volatile i32 %19, i32* %15
%20 = sdiv i32 40000000, %1
%21 = add nuw nsw i32 %0, 12
%22 = zext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %20, i32* %23
%24 = icmp eq i32 %2, 8
%25 = load volatile i32, i32* %15
%26 = and i32 %25, -268435457
%27 = select i1 %24, i32 0, i32 268435456
%28 = or i32 %26, %27
store volatile i32 %28, i32* %15
%29 = sext i8 %3 to i32
switch i32 %29, label %36 [
i32 79, label %30
i32 69, label %33
]
30: ; preds = %14
%31 = load volatile i32, i32* %15
%32 = or i32 %31, 512
store volatile i32 %32, i32* %15
br label %33
33: ; preds = %14, %30
%34 = load volatile i32, i32* %15
%35 = or i32 %34, 1024
br label %39
36: ; preds = %14
%37 = load volatile i32, i32* %15
%38 = and i32 %37, -1537
br label %39
39: ; preds = %33, %36
%40 = phi i32 [ %35, %33 ], [ %38, %36 ]
store volatile i32 %40, i32* %15
br i1 %7, label %41, label %48
41: ; preds = %39
%42 = load volatile i32, i32* %15
%43 = or i32 %42, 288
store volatile i32 %43, i32* %15
%44 = load volatile i32, i32* inttoptr (i64 1073821704 to i32*)
%45 = or i32 %44, 1
store volatile i32 %45, i32* inttoptr (i64 1073821704 to i32*)
%46 = tail call i32 @nvic_irq_enable(i32 37)
%47 = tail call i32 @nvic_irq_setprio(i32 37, i32 0)
br label %48
48: ; preds = %41, %39
%49 = load volatile i32, i32* %15
%50 = or i32 %49, 1
store volatile i32 %50, i32* %15
br label %51
51: ; preds = %10, %48
%52 = phi i32 [ 0, %48 ], [ -1, %10 ]
ret i32 %52
}