xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ COND_MI();
int /*<<< orphan*/ EA_A7_PD_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_smi_8_pd7(void) {
  m68ki_write_8(EA_A7_PD_8(), COND_MI() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_smi_8_pd7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PD_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_MI@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_smi_8_pd7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PD_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_MI@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_smi_8_pd7() {
%1 = call i32 (...) @EA_A7_PD_8()
%2 = call i64 (...) @COND_MI()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_smi_8_pd7() {
%1 = tail call i32 (...) @EA_A7_PD_8()
%2 = tail call i64 (...) @COND_MI()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
int get_ohci_interval(int interval) {
  int i, bInterval = 1;
  for (i = 0; i < 5; i++) {
    interval >>= 1;
    if (interval == 0)
      return bInterval;
    bInterval *= 2;
  }
  return 32;
}


x86 assembly (clang, -O0):
<get_ohci_interval>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    1154 <get_ohci_interval+0x54>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    113d <get_ohci_interval+0x3d>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115b <get_ohci_interval+0x5b>
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <get_ohci_interval+0x15>
movl   $0x20,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ohci_interval>:
mov    $0x1,%eax
cmp    $0x2,%edi
jb     1136 <get_ohci_interval+0x36>
mov    $0x2,%eax
cmp    $0x4,%edi
jb     1136 <get_ohci_interval+0x36>
mov    $0x4,%eax
cmp    $0x8,%edi
jb     1136 <get_ohci_interval+0x36>
mov    $0x8,%eax
cmp    $0x10,%edi
jb     1136 <get_ohci_interval+0x36>
xor    %eax,%eax
cmp    $0x20,%edi
setae  %al
shl    $0x4,%eax
add    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @get_ohci_interval(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %5
store i32 0, i32* %4
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 5
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i32, i32* %3
%11 = ashr i32 %10, 1
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = load i32, i32* %5
store i32 %15, i32* %2
br label %23
16: ; preds = %9
%17 = load i32, i32* %5
%18 = mul nsw i32 %17, 2
store i32 %18, i32* %5
br label %19
19: ; preds = %16
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %6
22: ; preds = %6
store i32 32, i32* %2
br label %23
23: ; preds = %22, %14
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @get_ohci_interval(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 4
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 8
br i1 %6, label %12, label %7
7: ; preds = %5
%8 = icmp ult i32 %0, 16
br i1 %8, label %12, label %9
9: ; preds = %7
%10 = icmp ult i32 %0, 32
%11 = select i1 %10, i32 16, i32 32
br label %12
12: ; preds = %9, %7, %5, %3, %1
%13 = phi i32 [ 1, %1 ], [ 2, %3 ], [ 4, %5 ], [ 8, %7 ], [ %11, %9 ]
ret i32 %13
}
void _Z_qfatal(str) char *str;
{
  V_cleanup();
  O_cleanup();
  Z_complain(str);
  _Z_errexit();
}


x86 assembly (clang, -O0):
<_Z_qfatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <V_cleanup@plt>
mov    $0x0,%al
call   1060 <O_cleanup@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <Z_complain@plt>
mov    $0x0,%al
call   1040 <_Z_errexit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Z_qfatal>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <V_cleanup@plt>
xor    %eax,%eax
call   1060 <O_cleanup@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <Z_complain@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <_Z_errexit@plt>

LLVM IR (-O0):
define void @_Z_qfatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @V_cleanup()
%4 = call i32 (...) @O_cleanup()
%5 = load i8*, i8** %2
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @Z_complain to i32 (i8*, ...)*)(i8* %5)
%7 = call i32 (...) @_Z_errexit()
ret void
}

LLVM IR (-O2):
define void @_Z_qfatal(i8* %0) {
%2 = tail call i32 (...) @V_cleanup()
%3 = tail call i32 (...) @O_cleanup()
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @Z_complain to i32 (i8*, ...)*)(i8* %0)
%5 = tail call i32 (...) @_Z_errexit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TCIOFLUSH;
int tcflush(int const, int /*<<< orphan*/);
int /*<<< orphan*/ usleep(int);
int serial_flush(const int fd) {
  int ret;
  usleep(10000);
  ret = tcflush(fd, TCIOFLUSH);
  usleep(1000000);
  return ret;
}


x86 assembly (clang, -O0):
<serial_flush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2710,%edi
call   1040 <usleep@plt>
mov    -0x4(%rbp),%edi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
call   1030 <tcflush@plt>
mov    %eax,-0x8(%rbp)
mov    $0xf4240,%edi
call   1040 <usleep@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_flush>:
push   %rbx
mov    %edi,%ebx
mov    $0x2710,%edi
call   1040 <usleep@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
call   1030 <tcflush@plt>
mov    %eax,%ebx
mov    $0xf4240,%edi
call   1040 <usleep@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@TCIOFLUSH = global i32 0
define i32 @serial_flush(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @usleep(i32 10000)
%5 = load i32, i32* %2
%6 = load i32, i32* @TCIOFLUSH
%7 = call i32 @tcflush(i32 %5, i32 %6)
store i32 %7, i32* %3
%8 = call i32 @usleep(i32 1000000)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@TCIOFLUSH = global i32 0
define i32 @serial_flush(i32 %0) {
%2 = tail call i32 @usleep(i32 10000)
%3 = load i32, i32* @TCIOFLUSH
%4 = tail call i32 @tcflush(i32 %0, i32 %3)
%5 = tail call i32 @usleep(i32 1000000)
ret i32 %4
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int padcon_write_homotopy_continuation_parameters_to_defined_output(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc4c(874, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<padcon_write_homotopy_continuation_parameters_to_defined_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x36a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padcon_write_homotopy_continuation_parameters_to_defined_output>:
mov    $0x36a,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @padcon_write_homotopy_continuation_parameters_to_defined_output() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 874, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @padcon_write_homotopy_continuation_parameters_to_defined_output() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 874, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t av_clip64_c(int64_t a, int64_t amin, int64_t amax) {
  if (a < amin)
    return amin;
  else if (a > amax)
    return amax;
  else
    return a;
}


x86 assembly (clang, -O0):
<av_clip64_c>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    112b <av_clip64_c+0x2b>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <av_clip64_c+0x4e>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jle    1146 <av_clip64_c+0x46>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <av_clip64_c+0x4e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_clip64_c>:
mov    %rdx,%rax
cmp    %rdx,%rdi
cmovle %rdi,%rax
cmp    %rsi,%rdi
cmovl  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @av_clip64_c(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i64, i64* %6
store i64 %12, i64* %4
br label %21
13: ; preds = %3
%14 = load i64, i64* %5
%15 = load i64, i64* %7
%16 = icmp sgt i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i64, i64* %7
store i64 %18, i64* %4
br label %21
19: ; preds = %13
%20 = load i64, i64* %5
store i64 %20, i64* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i64, i64* %4
ret i64 %22
}

LLVM IR (-O2):
define i64 @av_clip64_c(i64 %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %0, %1
%5 = icmp sgt i64 %0, %2
%6 = select i1 %5, i64 %2, i64 %0
%7 = select i1 %4, i64 %1, i64 %6
ret i64 %7
}
int gcd(int first, int second) {
  if (first % second == 0)
    return second;
  else
    gcd(second, first % second);
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1139 <gcd+0x29>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114a <gcd+0x3a>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     111b <gcd+0x1b>
mov    %esi,%eax
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = srem i32 %6, %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %5
store i32 %11, i32* %3
br label %18
12: ; preds = %2
%13 = load i32, i32* %5
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = srem i32 %14, %15
%17 = call i32 @gcd(i32 %13, i32 %16)
br label %18
18: ; preds = %10, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 returned %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %8, %5 ], [ %3, %2 ]
%7 = phi i32 [ %6, %5 ], [ %1, %2 ]
%8 = srem i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %5
10: ; preds = %5, %2
ret i32 %1
}
/* Type definitions */
struct NODE {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct NODE *);
void destroy_nodes(int n_nodes, struct NODE *node) { free(node); }


x86 assembly (clang, -O0):
<destroy_nodes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_nodes>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.NODE = type { i32 }
define void @destroy_nodes(i32 %0, %struct.NODE* %1) {
%3 = alloca i32
%4 = alloca %struct.NODE*
store i32 %0, i32* %3
store %struct.NODE* %1, %struct.NODE** %4
%5 = load %struct.NODE*, %struct.NODE** %4
%6 = call i32 @free(%struct.NODE* %5)
ret void
}

LLVM IR (-O2):
%struct.NODE = type { i32 }
define void @destroy_nodes(i32 %0, %struct.NODE* nocapture %1) {
%3 = tail call i32 @free(%struct.NODE* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_exit(int *);
void egs_exit__(int *status) { my_exit(status); }


x86 assembly (clang, -O0):
<egs_exit__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <my_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<egs_exit__>:
jmp    1030 <my_exit@plt>

LLVM IR (-O0):
define void @egs_exit__(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @my_exit(i32* %3)
ret void
}

LLVM IR (-O2):
define void @egs_exit__(i32* %0) {
%2 = tail call i32 @my_exit(i32* %0)
ret void
}
/* Variables and functions */
double __nv_atan2(double, double);
double atan2(double __a, double __b) { return __nv_atan2(__a, __b); }


x86 assembly (clang, -O0):
<atan2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <__nv_atan2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan2>:
jmp    1030 <__nv_atan2@plt>

LLVM IR (-O0):
define double @atan2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @__nv_atan2(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @atan2(double %0, double %1) {
%3 = tail call double @__nv_atan2(double %0, double %1)
ret double %3
}
void text_start(struct piece **t, struct piece *a) { t[0] = a, t[1] = 0; }


x86 assembly (clang, -O0):
<text_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
movq   $0x0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<text_start>:
mov    %rsi,(%rdi)
movq   $0x0,0x8(%rdi)
ret

LLVM IR (-O0):
%struct.piece = type opaque
define void @text_start(%struct.piece** %0, %struct.piece* %1) {
%3 = alloca %struct.piece**
%4 = alloca %struct.piece*
store %struct.piece** %0, %struct.piece*** %3
store %struct.piece* %1, %struct.piece** %4
%5 = load %struct.piece*, %struct.piece** %4
%6 = load %struct.piece**, %struct.piece*** %3
%7 = getelementptr inbounds %struct.piece*, %struct.piece** %6, i64 0
store %struct.piece* %5, %struct.piece** %7
%8 = load %struct.piece**, %struct.piece*** %3
%9 = getelementptr inbounds %struct.piece*, %struct.piece** %8, i64 1
store %struct.piece* null, %struct.piece** %9
ret void
}

LLVM IR (-O2):
%struct.piece = type opaque
define void @text_start(%struct.piece** nocapture writeonly %0, %struct.piece* %1) {
store %struct.piece* %1, %struct.piece** %0
%3 = getelementptr inbounds %struct.piece*, %struct.piece** %0, i64 1
store %struct.piece* null, %struct.piece** %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
scalar_t__ strchr(char const *, char);
int user_update(char const *, int);
int user_add(const char *user) {
  if (strchr(user, ':') || strchr(user, '#')) {
    printf("User name can't contains # or :\n");
    return -1;
  }
  return user_update(user, 1);
}


x86 assembly (clang, -O0):
<user_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x3a,%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
jne    116c <user_add+0x3c>
mov    -0x10(%rbp),%rdi
mov    $0x23,%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
je     1184 <user_add+0x54>
lea    0xe8d(%rip),%rdi
call   1040 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1195 <user_add+0x65>
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1050 <user_update@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_add>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3a,%esi
call   1040 <strchr@plt>
test   %rax,%rax
jne    1155 <user_add+0x25>
mov    %rbx,%rdi
mov    $0x23,%esi
call   1040 <strchr@plt>
test   %rax,%rax
je     1168 <user_add+0x38>
lea    0xea4(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret
mov    %rbx,%rdi
mov    $0x1,%esi
pop    %rbx
jmp    1050 <user_update@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"User name can't contains # or :\0A\00"
define i32 @user_add(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strchr(i8* %4, i8 signext 58)
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i64 @strchr(i8* %8, i8 signext 35)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %7, %1
%12 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %16
13: ; preds = %7
%14 = load i8*, i8** %3
%15 = call i32 @user_update(i8* %14, i32 1)
store i32 %15, i32* %2
br label %16
16: ; preds = %13, %11
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@str = [32 x i8] c"User name can't contains # or :\00"
define i32 @user_add(i8* %0) {
%2 = tail call i64 @strchr(i8* %0, i8 signext 58)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i64 @strchr(i8* %0, i8 signext 35)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4, %1
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
br label %11
9: ; preds = %4
%10 = tail call i32 @user_update(i8* %0, i32 1)
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ -1, %7 ], [ %10, %9 ]
ret i32 %12
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t rdtsc() {
  uint64_t tsc;
  __asm__("cpuid         \n"
          "rdtsc         \n"
          "shl $32,%%rdx \n"
          "or  %%rdx,%%rax \n"
          : "=a"(tsc)
          :
          : "ebx", "ecx", "edx", "cc");
  return tsc;
}


x86 assembly (clang, -O0):
<rdtsc>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
cpuid
rdtsc
shl    $0x20,%rdx
or     %rdx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdtsc>:
push   %rbx
cpuid
rdtsc
shl    $0x20,%rdx
or     %rdx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @rdtsc() {
%1 = alloca i8*
%2 = call i8* asm "cpuid \0Ardtsc \0Ashl $$32,%rdx \0Aor %rdx,%rax \0A", "={ax},~{ebx},~{ecx},~{edx},~{cc},~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @rdtsc() {
%1 = tail call i8* asm "cpuid \0Ardtsc \0Ashl $$32,%rdx \0Aor %rdx,%rax \0A", "={ax},~{ebx},~{ecx},~{edx},~{cc},~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hci_event_extended_inquiry_response_get_page_scan_repetition_mode(
    const uint8_t *event) {
  return event[9];
}


x86 assembly (clang, -O0):
<hci_event_extended_inquiry_response_get_page_scan_repetition_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_event_extended_inquiry_response_get_page_scan_repetition_mode>:
mov    0x24(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hci_event_extended_inquiry_response_get_page_scan_repetition_mode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 9
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hci_event_extended_inquiry_response_get_page_scan_repetition_mode(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 9
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int /*<<< orphan*/ getmaxyx(int /*<<< orphan*/ *, int, int);
int /*<<< orphan*/ mvwaddch(int /*<<< orphan*/ *, int, int, int);
void fill_win(WINDOW *win, int ch) {
  int lines, cols, i, j;
  getmaxyx(win, lines, cols);
  for (i = 0; i < lines; i++)
    for (j = 0; j < cols; j++)
      mvwaddch(win, i, j, ch);
}


x86 assembly (clang, -O0):
<fill_win>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <getmaxyx@plt>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1197 <fill_win+0x77>
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1184 <fill_win+0x64>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%esi
mov    -0x1c(%rbp),%edx
mov    -0xc(%rbp),%ecx
call   1040 <mvwaddch@plt>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1158 <fill_win+0x38>
jmp    1189 <fill_win+0x69>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1145 <fill_win+0x25>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_win>:
jmp    1030 <getmaxyx@plt>

LLVM IR (-O0):
define void @fill_win(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%9 = load i32*, i32** %3
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @getmaxyx(i32* %9, i32 %10, i32 %11)
store i32 0, i32* %7
br label %13
13: ; preds = %32, %2
%14 = load i32, i32* %7
%15 = load i32, i32* %5
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %35
17: ; preds = %13
store i32 0, i32* %8
br label %18
18: ; preds = %28, %17
%19 = load i32, i32* %8
%20 = load i32, i32* %6
%21 = icmp slt i32 %19, %20
br i1 %21, label %22, label %31
22: ; preds = %18
%23 = load i32*, i32** %3
%24 = load i32, i32* %7
%25 = load i32, i32* %8
%26 = load i32, i32* %4
%27 = call i32 @mvwaddch(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %22
%29 = load i32, i32* %8
%30 = add nsw i32 %29, 1
store i32 %30, i32* %8
br label %18
31: ; preds = %18
br label %32
32: ; preds = %31
%33 = load i32, i32* %7
%34 = add nsw i32 %33, 1
store i32 %34, i32* %7
br label %13
35: ; preds = %13
ret void
}

LLVM IR (-O2):
define void @fill_win(i32* %0, i32 %1) {
%3 = tail call i32 @getmaxyx(i32* %0, i32 undef, i32 undef)
ret void
}
int test_imm_B1int16_reg(short val) {
  return ((val) & (-0xB1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B1int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff4f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B1int16_reg>:
test   $0xff4f,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B1int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -177
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B1int16_reg(i16 signext %0) {
%2 = and i16 %0, -177
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
const char *Zip_Definition(void) {
  return "struct Zip {\n"
         "  var iters;\n"
         "  var values;\n"
         "};\n";
}


x86 assembly (clang, -O0):
<Zip_Definition>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Zip_Definition>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [44 x i8] c"struct Zip {\0A var iters;\0A var values;\0A};\0A\00"
define i8* @Zip_Definition() {
ret i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [44 x i8] c"struct Zip {\0A var iters;\0A var values;\0A};\0A\00"
define i8* @Zip_Definition() {
ret i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0)
}
int event_base_priority_init(struct event_base *base, int npri) { return 0; }


x86 assembly (clang, -O0):
<event_base_priority_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_base_priority_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.event_base = type opaque
define i32 @event_base_priority_init(%struct.event_base* %0, i32 %1) {
%3 = alloca %struct.event_base*
%4 = alloca i32
store %struct.event_base* %0, %struct.event_base** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.event_base = type opaque
define i32 @event_base_priority_init(%struct.event_base* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_DETACH;
int /*<<< orphan*/ ptrace(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void detach(pid_t pid) { ptrace(PTRACE_DETACH, pid, NULL, NULL); }


x86 assembly (clang, -O0):
<detach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rdx
call   1030 <ptrace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<detach>:
mov    %edi,%esi
mov    0x2ecf(%rip),%rax
mov    (%rax),%edi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <ptrace@plt>

LLVM IR (-O0):
@PTRACE_DETACH = global i32 0
define void @detach(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @PTRACE_DETACH
%4 = load i32, i32* %2
%5 = call i32 @ptrace(i32 %3, i32 %4, i32* null, i32* null)
ret void
}

LLVM IR (-O2):
@PTRACE_DETACH = global i32 0
define void @detach(i32 %0) {
%2 = load i32, i32* @PTRACE_DETACH
%3 = tail call i32 @ptrace(i32 %2, i32 %0, i32* null, i32* null)
ret void
}
imm0reg1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if (22 <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<imm0reg1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xed7(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     113f <imm0reg1+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <imm0reg1+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imm0reg1>:
xor    %eax,%eax
ucomisd 0xef6(%rip),%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @imm0reg1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double, double* %9
%15 = fcmp ole double 2.200000e+01, %14
br i1 %15, label %16, label %17
16: ; preds = %6
store i32 1, i32* %7
br label %18
17: ; preds = %6
store i32 0, i32* %7
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @imm0reg1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture readnone %5) {
%7 = fcmp oge double %1, 2.200000e+01
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
struct BSTIterator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct BSTIterator *);
void bstIteratorFree(struct BSTIterator *obj) { free(obj); }


x86 assembly (clang, -O0):
<bstIteratorFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bstIteratorFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.BSTIterator = type { i32 }
define void @bstIteratorFree(%struct.BSTIterator* %0) {
%2 = alloca %struct.BSTIterator*
store %struct.BSTIterator* %0, %struct.BSTIterator** %2
%3 = load %struct.BSTIterator*, %struct.BSTIterator** %2
%4 = call i32 @free(%struct.BSTIterator* %3)
ret void
}

LLVM IR (-O2):
%struct.BSTIterator = type { i32 }
define void @bstIteratorFree(%struct.BSTIterator* nocapture %0) {
%2 = tail call i32 @free(%struct.BSTIterator* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void az_zero_memory_(void *ptr, size_t size) { memset(ptr, 0, size); }


x86 assembly (clang, -O0):
<az_zero_memory_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<az_zero_memory_>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @az_zero_memory_(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @memset(i8* %5, i32 0, i64 %6)
ret void
}

LLVM IR (-O2):
define void @az_zero_memory_(i8* %0, i64 %1) {
%3 = tail call i32 @memset(i8* %0, i32 0, i64 %1)
ret void
}
/* Type definitions */
struct RNAheat_args_info {
  int dummy;
};

/* Variables and functions */
int RNAheat_cmdline_parser2(int, char **, struct RNAheat_args_info *,
                            int /*<<< orphan*/, int, int);
int RNAheat_cmdline_parser(int argc, char **argv,
                           struct RNAheat_args_info *args_info) {
  return RNAheat_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<RNAheat_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <RNAheat_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAheat_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <RNAheat_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.RNAheat_args_info = type { i32 }
define i32 @RNAheat_cmdline_parser(i32 %0, i8** %1, %struct.RNAheat_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.RNAheat_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.RNAheat_args_info* %2, %struct.RNAheat_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.RNAheat_args_info*, %struct.RNAheat_args_info** %6
%10 = call i32 @RNAheat_cmdline_parser2(i32 %7, i8** %8, %struct.RNAheat_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.RNAheat_args_info = type { i32 }
define i32 @RNAheat_cmdline_parser(i32 %0, i8** %1, %struct.RNAheat_args_info* %2) {
%4 = tail call i32 @RNAheat_cmdline_parser2(i32 %0, i8** %1, %struct.RNAheat_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
void __raw_writeb(unsigned char value, unsigned int ptr) {
  *((volatile unsigned char *)ptr) = value;
}


x86 assembly (clang, -O0):
<__raw_writeb>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x8(%rbp),%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__raw_writeb>:
mov    %esi,%eax
mov    %dil,(%rax)
ret

LLVM IR (-O0):
define void @__raw_writeb(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
store volatile i8 %5, i8* %8
ret void
}

LLVM IR (-O2):
define void @__raw_writeb(i8 zeroext %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = inttoptr i64 %3 to i8*
store volatile i8 %0, i8* %4
ret void
}
int tegra_emc_enable_eack(void) { return 0; }


x86 assembly (clang, -O0):
<tegra_emc_enable_eack>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_emc_enable_eack>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tegra_emc_enable_eack() {
ret i32 0
}

LLVM IR (-O2):
define i32 @tegra_emc_enable_eack() {
ret i32 0
}
/* Variables and functions */
__attribute((always_)) void d(int vm[2][g()]) {}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
xor    %eax,%eax
jmp    1030 <g@plt>

LLVM IR (-O0):
define void @d(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 (...) @g()
%4 = zext i32 %3 to i64
ret void
}

LLVM IR (-O2):
define void @d(i32* nocapture readnone %0) {
%2 = tail call i32 (...) @g()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;

/* Variables and functions */
int /*<<< orphan*/ X509_NAME_cmp(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ X509_get_issuer_name(int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_get_subject_name(int /*<<< orphan*/ *);
int isselfsigned(X509 *cert) {
  return !X509_NAME_cmp(X509_get_subject_name(cert),
                        X509_get_issuer_name(cert));
}


x86 assembly (clang, -O0):
<isselfsigned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <X509_get_subject_name@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <X509_get_issuer_name@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1050 <X509_NAME_cmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isselfsigned>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <X509_get_subject_name@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <X509_get_issuer_name@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1050 <X509_NAME_cmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @isselfsigned(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @X509_get_subject_name(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @X509_get_issuer_name(i32* %5)
%7 = call i32 @X509_NAME_cmp(i32 %4, i32 %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isselfsigned(i32* %0) {
%2 = tail call i32 @X509_get_subject_name(i32* %0)
%3 = tail call i32 @X509_get_issuer_name(i32* %0)
%4 = tail call i32 @X509_NAME_cmp(i32 %2, i32 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void myHandler(int i) { printf("signal %d received.\n", i); }


x86 assembly (clang, -O0):
<myHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myHandler>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"signal %d received.\0A\00"
define void @myHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"signal %d received.\0A\00"
define void @myHandler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ leftShift(int, int);
int rightShift(int /*<<< orphan*/, int);
int getImmediate(int instruction) {
  return rightShift(leftShift(instruction, 16), 16);
}


x86 assembly (clang, -O0):
<getImmediate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x10,%esi
call   1040 <leftShift@plt>
mov    %eax,%edi
mov    $0x10,%esi
call   1030 <rightShift@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getImmediate>:
push   %rax
mov    $0x10,%esi
call   1040 <leftShift@plt>
mov    %eax,%edi
mov    $0x10,%esi
pop    %rax
jmp    1030 <rightShift@plt>

LLVM IR (-O0):
define i32 @getImmediate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @leftShift(i32 %3, i32 16)
%5 = call i32 @rightShift(i32 %4, i32 16)
ret i32 %5
}

LLVM IR (-O2):
define i32 @getImmediate(i32 %0) {
%2 = tail call i32 @leftShift(i32 %0, i32 16)
%3 = tail call i32 @rightShift(i32 %2, i32 16)
ret i32 %3
}
void write_byte(unsigned int addr, unsigned char data) {
  while (*((volatile unsigned char *)(0x3F)) & (1 << 1))
    ;
  *((volatile unsigned char *)(0x41)) = addr;
  *((volatile unsigned char *)(0x40)) = data;
  (*((volatile unsigned char *)(0x3F)) |= (1 << 2));
  (*((volatile unsigned char *)(0x3F)) |= (1 << 1));
}


x86 assembly (clang, -O0):
<write_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    $0x3f,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1128 <write_byte+0x28>
jmp    110d <write_byte+0xd>
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    $0x41,%eax
mov    %cl,(%rax)
mov    -0x5(%rbp),%cl
mov    $0x40,%eax
mov    %cl,(%rax)
mov    $0x3f,%eax
mov    (%rax),%al
movzbl %al,%eax
or     $0x4,%eax
mov    %al,%cl
mov    $0x3f,%eax
mov    %cl,(%rax)
mov    $0x3f,%eax
mov    (%rax),%al
movzbl %al,%eax
or     $0x2,%eax
mov    %al,%cl
mov    $0x3f,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_byte>:
testb  $0x2,0x3f
02
jne    1100 <write_byte>
mov    %dil,0x41
mov    %sil,0x40
orb    $0x4,0x3f
04
orb    $0x2,0x3f
02
ret

LLVM IR (-O0):
define void @write_byte(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
br label %5
5: ; preds = %10, %2
%6 = load volatile i8, i8* inttoptr (i64 63 to i8*)
%7 = zext i8 %6 to i32
%8 = and i32 %7, 2
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5
br label %5
11: ; preds = %5
%12 = load i32, i32* %3
%13 = trunc i32 %12 to i8
store volatile i8 %13, i8* inttoptr (i64 65 to i8*)
%14 = load i8, i8* %4
store volatile i8 %14, i8* inttoptr (i64 64 to i8*)
%15 = load volatile i8, i8* inttoptr (i64 63 to i8*)
%16 = zext i8 %15 to i32
%17 = or i32 %16, 4
%18 = trunc i32 %17 to i8
store volatile i8 %18, i8* inttoptr (i64 63 to i8*)
%19 = load volatile i8, i8* inttoptr (i64 63 to i8*)
%20 = zext i8 %19 to i32
%21 = or i32 %20, 2
%22 = trunc i32 %21 to i8
store volatile i8 %22, i8* inttoptr (i64 63 to i8*)
ret void
}

LLVM IR (-O2):
define void @write_byte(i32 %0, i8 zeroext %1) {
br label %3
3: ; preds = %3, %2
%4 = load volatile i8, i8* inttoptr (i64 63 to i8*)
%5 = and i8 %4, 2
%6 = icmp eq i8 %5, 0
br i1 %6, label %7, label %3
7: ; preds = %3
%8 = trunc i32 %0 to i8
store volatile i8 %8, i8* inttoptr (i64 65 to i8*)
store volatile i8 %1, i8* inttoptr (i64 64 to i8*)
%9 = load volatile i8, i8* inttoptr (i64 63 to i8*)
%10 = or i8 %9, 4
store volatile i8 %10, i8* inttoptr (i64 63 to i8*)
%11 = load volatile i8, i8* inttoptr (i64 63 to i8*)
%12 = or i8 %11, 2
store volatile i8 %12, i8* inttoptr (i64 63 to i8*)
ret void
}
float price(float gallon, int size) { return gallon * size; }


x86 assembly (clang, -O0):
<price>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
cvtsi2ssl -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<price>:
cvtsi2ss %edi,%xmm1
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @price(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
store float %0, float* %3
store i32 %1, i32* %4
%5 = load float, float* %3
%6 = load i32, i32* %4
%7 = sitofp i32 %6 to float
%8 = fmul float %5, %7
ret float %8
}

LLVM IR (-O2):
define float @price(float %0, i32 %1) {
%3 = sitofp i32 %1 to float
%4 = fmul float %3, %0
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int /*<<< orphan*/ getid(int);
int /*<<< orphan*/ print(int /*<<< orphan*/);
void main() {
  int n;
  getid(n);
  print(f(n));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
call   1040 <getid@plt>
mov    -0x4(%rbp),%edi
call   1030 <f@plt>
mov    %eax,%edi
call   1050 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <getid@plt>
call   1030 <f@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <print@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = call i32 @getid(i32 %2)
%4 = load i32, i32* %1
%5 = call i32 @f(i32 %4)
%6 = call i32 @print(i32 %5)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @getid(i32 undef)
%2 = tail call i32 @f(i32 undef)
%3 = tail call i32 @print(i32 %2)
ret void
}
void swap(int *a, int *b) {
  int temp;
  temp = *a;
  *a = *b;
  *b = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
void foo(struct foo *ptr) {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
%struct.foo = type opaque
define void @foo(%struct.foo* %0) {
%2 = alloca %struct.foo*
store %struct.foo* %0, %struct.foo** %2
ret void
}

LLVM IR (-O2):
%struct.foo = type opaque
define void @foo(%struct.foo* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo_lock();
void fn1(int i) {
  foo_lock();
  i++;
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo_lock@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
xor    %eax,%eax
jmp    1030 <foo_lock@plt>

LLVM IR (-O0):
define void @fn1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @foo_lock()
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
ret void
}

LLVM IR (-O2):
define void @fn1(i32 %0) {
%2 = tail call i32 (...) @foo_lock()
ret void
}
long greatestCommonDivisorEuclidRecursive(long a, long b) {
  if (b == 0)
    return a;
  else
    return greatestCommonDivisorEuclidRecursive(b, a % b);
}


x86 assembly (clang, -O0):
<greatestCommonDivisorEuclidRecursive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1138 <greatestCommonDivisorEuclidRecursive+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <greatestCommonDivisorEuclidRecursive+0x42>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
mov    %rdx,%rsi
call   1030 <greatestCommonDivisorEuclidRecursive@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<greatestCommonDivisorEuclidRecursive>:
mov    %rdi,%rax
test   %rsi,%rsi
je     1135 <greatestCommonDivisorEuclidRecursive+0x35>
mov    %rsi,%rdx
jmp    111d <greatestCommonDivisorEuclidRecursive+0x1d>
nopl   (%rax)
cqto
idiv   %rcx
mov    %rcx,%rax
test   %rdx,%rdx
je     1132 <greatestCommonDivisorEuclidRecursive+0x32>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <greatestCommonDivisorEuclidRecursive+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <greatestCommonDivisorEuclidRecursive+0x15>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @greatestCommonDivisorEuclidRecursive(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
store i64 %9, i64* %3
br label %16
10: ; preds = %2
%11 = load i64, i64* %5
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = srem i64 %12, %13
%15 = call i64 @greatestCommonDivisorEuclidRecursive(i64 %11, i64 %14)
store i64 %15, i64* %3
br label %16
16: ; preds = %10, %8
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @greatestCommonDivisorEuclidRecursive(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ %1, %2 ]
%6 = phi i64 [ %5, %4 ], [ %0, %2 ]
%7 = srem i64 %6, %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i64 [ %0, %2 ], [ %5, %4 ]
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void resume_usb(void) {
  system("reg s 0xb01c0000");
  system("reg w 54 0x1100");
  system("reg w 54 0x1004");
}


x86 assembly (clang, -O0):
<resume_usb>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
lea    0xeea(%rip),%rdi
call   1030 <system@plt>
lea    0xeee(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<resume_usb>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
lea    0xeed(%rip),%rdi
call   1030 <system@plt>
lea    0xef1(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"reg s 0xb01c0000\00"
@.str.1 = [16 x i8] c"reg w 54 0x1100\00"
@.str.2 = [16 x i8] c"reg w 54 0x1004\00"
define void @resume_usb() {
%1 = call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"reg s 0xb01c0000\00"
@.str.1 = [16 x i8] c"reg w 54 0x1100\00"
@.str.2 = [16 x i8] c"reg w 54 0x1004\00"
define void @resume_usb() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @system(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool SHAREMIND_SET_KEY_LESS_THAN_unsigned_int(unsigned int const k1,
                                              unsigned int const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_LESS_THAN_unsigned_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_LESS_THAN_unsigned_int>:
xor    %eax,%eax
cmp    %esi,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_unsigned_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_unsigned_int(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}