xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ array_access_Ok(int /*<<< orphan*/, int /*<<< orphan*/);
void call_array_access_Ok() { array_access_Ok(0, 0); }


x86 assembly (clang, -O0):
<call_array_access_Ok>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <array_access_Ok@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_array_access_Ok>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <array_access_Ok@plt>

LLVM IR (-O0):
define void @call_array_access_Ok() {
%1 = call i32 @array_access_Ok(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @call_array_access_Ok() {
%1 = tail call i32 @array_access_Ok(i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die_if_null(void *);
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *t;
  if (size == 0)
    return NULL;
  t = malloc(size);
  die_if_null(t);
  return t;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <xmalloc+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1162 <xmalloc+0x42>
mov    -0x10(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <die_if_null@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
test   %rdi,%rdi
je     1138 <xmalloc+0x18>
call   1030 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <die_if_null@plt>
jmp    113a <xmalloc+0x1a>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xmalloc(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %14
8: ; preds = %1
%9 = load i64, i64* %3
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @die_if_null(i8* %11)
%13 = load i8*, i8** %4
store i8* %13, i8** %2
br label %14
14: ; preds = %8, %7
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @xmalloc(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i8* @malloc(i64 %0)
%5 = tail call i32 @die_if_null(i8* %4)
br label %6
6: ; preds = %1, %3
%7 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %7
}
void dump_options(struct trusted_key_options *o) {}


x86 assembly (clang, -O0):
<dump_options>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_options>:
ret

LLVM IR (-O0):
%struct.trusted_key_options = type opaque
define void @dump_options(%struct.trusted_key_options* %0) {
%2 = alloca %struct.trusted_key_options*
store %struct.trusted_key_options* %0, %struct.trusted_key_options** %2
ret void
}

LLVM IR (-O2):
%struct.trusted_key_options = type opaque
define void @dump_options(%struct.trusted_key_options* nocapture %0) {
ret void
}
int calculate_checksum(int copterid, int command, int value) {
  int sum = copterid + command + value;
  return (256 - (sum % 256)) & 0xFF;
}


x86 assembly (clang, -O0):
<calculate_checksum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    $0x100,%eax
sub    %edx,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_checksum>:
add    %esi,%edi
add    %edx,%edi
neg    %edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @calculate_checksum(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = add nsw i32 %8, %9
%11 = load i32, i32* %6
%12 = add nsw i32 %10, %11
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = srem i32 %13, 256
%15 = sub nsw i32 256, %14
%16 = and i32 %15, 255
ret i32 %16
}

LLVM IR (-O2):
define i32 @calculate_checksum(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %0, %1
%5 = add nsw i32 %4, %2
%6 = sub i32 0, %5
%7 = and i32 %6, 255
ret i32 %7
}
void TSN_apply(struct arguments *arguments) {}


x86 assembly (clang, -O0):
<TSN_apply>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TSN_apply>:
ret

LLVM IR (-O0):
%struct.arguments = type opaque
define void @TSN_apply(%struct.arguments* %0) {
%2 = alloca %struct.arguments*
store %struct.arguments* %0, %struct.arguments** %2
ret void
}

LLVM IR (-O2):
%struct.arguments = type opaque
define void @TSN_apply(%struct.arguments* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x0e() {
  Assert_real((isgraph(14) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              75, ("isgraph should be 0 for 0x0e"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x0e>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4b,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x0e>:
push   %rax
mov    $0xe,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4b,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x0e\00"
define void @t_isgraph_0x0e() {
%1 = call i64 @isgraph(i32 14)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 75, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x0e\00"
define void @t_isgraph_0x0e() {
%1 = tail call i64 @isgraph(i32 14)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 75, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_stringops_0(int);
void test_stringops_with_values_0(int common, int not_common) {
  int i;
  for (i = 0; i < 1000; i++) {
    if (i > 990)
      test_stringops_0(not_common);
    else
      test_stringops_0(common);
  }
}


x86 assembly (clang, -O0):
<test_stringops_with_values_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3e8,-0xc(%rbp)
jge    1167 <test_stringops_with_values_0+0x57>
cmpl   $0x3de,-0xc(%rbp)
jle    114c <test_stringops_with_values_0+0x3c>
mov    -0x8(%rbp),%edi
call   1030 <test_stringops_0@plt>
jmp    1154 <test_stringops_with_values_0+0x44>
mov    -0x4(%rbp),%edi
call   1030 <test_stringops_0@plt>
jmp    1159 <test_stringops_with_values_0+0x49>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1125 <test_stringops_with_values_0+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_stringops_with_values_0>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
cmp    $0x3df,%ebx
mov    %ebp,%edi
cmovae %r14d,%edi
call   1030 <test_stringops_0@plt>
add    $0x1,%ebx
cmp    $0x3e8,%ebx
jne    1120 <test_stringops_with_values_0+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @test_stringops_with_values_0(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 1000
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 990
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %4
%14 = call i32 @test_stringops_0(i32 %13)
br label %18
15: ; preds = %9
%16 = load i32, i32* %3
%17 = call i32 @test_stringops_0(i32 %16)
br label %18
18: ; preds = %15, %12
br label %19
19: ; preds = %18
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @test_stringops_with_values_0(i32 %0, i32 %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %8, %3 ]
%5 = icmp ugt i32 %4, 990
%6 = select i1 %5, i32 %1, i32 %0
%7 = tail call i32 @test_stringops_0(i32 %6)
%8 = add nuw nsw i32 %4, 1
%9 = icmp eq i32 %8, 1000
br i1 %9, label %10, label %3
10: ; preds = %3
ret void
}
/* Type definitions */
struct nc_buff {
  int dummy;
};

/* Variables and functions */
int ip_build_header(struct nc_buff *);
int transmit_data(struct nc_buff *);
int ip_send_data(struct nc_buff *ncb) {
  int err;
  err = ip_build_header(ncb);
  if (err < 0)
    return err;
  return transmit_data(ncb);
}


x86 assembly (clang, -O0):
<ip_send_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ip_build_header@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    114d <ip_send_data+0x2d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <ip_send_data+0x39>
mov    -0x10(%rbp),%rdi
call   1040 <transmit_data@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_send_data>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ip_build_header@plt>
test   %eax,%eax
js     1136 <ip_send_data+0x16>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <transmit_data@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.nc_buff = type { i32 }
define i32 @ip_send_data(%struct.nc_buff* %0) {
%2 = alloca i32
%3 = alloca %struct.nc_buff*
%4 = alloca i32
store %struct.nc_buff* %0, %struct.nc_buff** %3
%5 = load %struct.nc_buff*, %struct.nc_buff** %3
%6 = call i32 @ip_build_header(%struct.nc_buff* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load %struct.nc_buff*, %struct.nc_buff** %3
%13 = call i32 @transmit_data(%struct.nc_buff* %12)
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.nc_buff = type { i32 }
define i32 @ip_send_data(%struct.nc_buff* %0) {
%2 = tail call i32 @ip_build_header(%struct.nc_buff* %0)
%3 = icmp slt i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @transmit_data(%struct.nc_buff* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ %2, %1 ]
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ time_t;

/* Variables and functions */
int /*<<< orphan*/ perrordie(char *);
scalar_t__ time(scalar_t__ *);
time_t safe_time(time_t *tloc) {
  time_t t = time(tloc);
  if (t == (time_t)-1)
    perrordie("time");
  return t;
}


x86 assembly (clang, -O0):
<safe_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <time@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0xffffffffffffffff,-0x10(%rbp)
jne    1150 <safe_time+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <perrordie@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_time>:
push   %rbx
call   1030 <time@plt>
mov    %rax,%rbx
cmp    $0xffffffffffffffff,%rax
jne    113b <safe_time+0x1b>
lea    0xeca(%rip),%rdi
call   1040 <perrordie@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"time\00"
define i64 @safe_time(i64* %0) {
%2 = alloca i64*
%3 = alloca i64
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = call i64 @time(i64* %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp eq i64 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @perrordie(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i64, i64* %3
ret i64 %11
}

LLVM IR (-O2):
@.str = [5 x i8] c"time\00"
define i64 @safe_time(i64* %0) {
%2 = tail call i64 @time(i64* %0)
%3 = icmp eq i64 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perrordie(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i64 %2
}
int Cyc_Absyn_copy_reentrant(int t) { return t; }


x86 assembly (clang, -O0):
<Cyc_Absyn_copy_reentrant>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyn_copy_reentrant>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @Cyc_Absyn_copy_reentrant(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @Cyc_Absyn_copy_reentrant(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
float __ocml_sub_rtz_f32(float, float);
float __fsub_rz(float x, float y) { return __ocml_sub_rtz_f32(x, y); }


x86 assembly (clang, -O0):
<__fsub_rz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__ocml_sub_rtz_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fsub_rz>:
jmp    1030 <__ocml_sub_rtz_f32@plt>

LLVM IR (-O0):
define float @__fsub_rz(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @__ocml_sub_rtz_f32(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @__fsub_rz(float %0, float %1) {
%3 = tail call float @__ocml_sub_rtz_f32(float %0, float %1)
ret float %3
}
/* Variables and functions */
scalar_t__ errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void checkerror(char *s) {
  if (errno) {
    perror(s);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<checkerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
cmpq   $0x0,(%rax)
je     1150 <checkerror+0x30>
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkerror>:
push   %rax
mov    0x2eb8(%rip),%rax
cmpq   $0x0,(%rax)
jne    1130 <checkerror+0x10>
pop    %rax
ret
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@errno = global i64 0
define void @checkerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i64, i64* @errno
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @perror(i8* %6)
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@errno = global i64 0
define void @checkerror(i8* nocapture %0) {
%2 = load i64, i64* @errno
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @perror(i8* %0)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
uint16_t umod16(uint16_t a, uint16_t b) {
  uint16_t r;
  if (b == 0) {
    fprintf(stderr, "Should not happen\n");
    exit(EXIT_FAILURE);
  }
  r = a % b;
  return r;
}


x86 assembly (clang, -O0):
<umod16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    115b <umod16+0x3b>
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
lea    0xeb8(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umod16>:
test   %esi,%esi
je     112c <umod16+0xc>
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret
push   %rax
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"Should not happen\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @umod16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %2
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = srem i32 %14, %15
store i32 %16, i32* %5
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"Should not happen\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @umod16(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %2
%10 = srem i32 %0, %1
ret i32 %10
}
int normal_fun() {
  printf("%s()\n", __func__);
  abort();
  return 0;
}


x86 assembly (clang, -O0):
<normal_fun>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed4(%rip),%rsi
mov    $0x0,%al
call   1040 <printf@plt>
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<normal_fun>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed7(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s()\0A\00"
@__func__.normal_fun = [11 x i8] c"normal_fun\00"
define i32 @normal_fun() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.normal_fun, i64 0, i64 0))
unreachable
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s()\0A\00"
@__func__.normal_fun = [11 x i8] c"normal_fun\00"
define i32 @normal_fun() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.normal_fun, i64 0, i64 0))
tail call void @abort()
unreachable
}
void NV12ToARGBRow_Any_NEON() {}


x86 assembly (clang, -O0):
<NV12ToARGBRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV12ToARGBRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @NV12ToARGBRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @NV12ToARGBRow_Any_NEON() {
ret void
}
void yy_4_InternalLinkAutoCorrect(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_4_InternalLinkAutoCorrect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_4_InternalLinkAutoCorrect>:
ret

LLVM IR (-O0):
define void @yy_4_InternalLinkAutoCorrect(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_4_InternalLinkAutoCorrect(i8* nocapture %0, i32 %1) {
ret void
}
void decomma(char *s) {
  char *d = s;
  char c;
  for (;;) {
    c = *s++;
    if (c != ',')
      *d++ = c;
    if (c == 0)
      break;
  }
}


x86 assembly (clang, -O0):
<decomma>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x2c,%eax
je     1145 <decomma+0x45>
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
movsbl -0x11(%rbp),%eax
cmp    $0x0,%eax
jne    1157 <decomma+0x57>
jmp    115c <decomma+0x5c>
jmp    1110 <decomma+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<decomma>:
mov    %rdi,%rax
jmp    1118 <decomma+0x18>
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%rax
test   %cl,%cl
je     1128 <decomma+0x28>
movzbl (%rax),%ecx
cmp    $0x2c,%cl
je     1110 <decomma+0x10>
mov    %cl,(%rdi)
add    $0x1,%rdi
jmp    1110 <decomma+0x10>
ret

LLVM IR (-O0):
define void @decomma(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
br label %6
6: ; preds = %22, %1
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %2
%9 = load i8, i8* %7
store i8 %9, i8* %4
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 44
br i1 %12, label %13, label %17
13: ; preds = %6
%14 = load i8, i8* %4
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
br label %17
17: ; preds = %13, %6
%18 = load i8, i8* %4
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %17
br label %23
22: ; preds = %17
br label %6
23: ; preds = %21
ret void
}

LLVM IR (-O2):
define void @decomma(i8* nocapture %0) {
br label %2
2: ; preds = %10, %1
%3 = phi i8* [ %0, %1 ], [ %11, %10 ]
%4 = phi i8* [ %0, %1 ], [ %5, %10 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %4
%7 = icmp eq i8 %6, 44
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = getelementptr inbounds i8, i8* %3, i64 1
store i8 %6, i8* %3
br label %10
10: ; preds = %8, %2
%11 = phi i8* [ %9, %8 ], [ %3, %2 ]
%12 = icmp eq i8 %6, 0
br i1 %12, label %13, label %2
13: ; preds = %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_llabs();
scalar_t__ llabs(long long);
void test_llabs(long long x) {
  if (llabs(x) != llabs(x))
    link_failure_llabs();
}


x86 assembly (clang, -O0):
<test_llabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <llabs@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <llabs@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     1159 <test_llabs+0x39>
mov    $0x0,%al
call   1040 <link_failure_llabs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_llabs>:
ret

LLVM IR (-O0):
define void @test_llabs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llabs(i64 %3)
%5 = load i64, i64* %2
%6 = call i64 @llabs(i64 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_llabs()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_llabs(i64 %0) {
ret void
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, oldx;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  while (x >= 0 && y >= 0) {
    oldx = x;
    x = y - 1;
    y = oldx - 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
jl     114c <main+0x3c>
cmpl   $0x0,-0xc(%rbp)
setge  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115c <main+0x4c>
jmp    1179 <main+0x69>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <main+0x23>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
br label %7
7: ; preds = %15, %0
%8 = load i32, i32* %2
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 0
br label %13
13: ; preds = %10, %7
%14 = phi i1 [ false, %7 ], [ %12, %10 ]
br i1 %14, label %15, label %21
15: ; preds = %13
%16 = load i32, i32* %2
store i32 %16, i32* %4
%17 = load i32, i32* %3
%18 = sub nsw i32 %17, 1
store i32 %18, i32* %2
%19 = load i32, i32* %4
%20 = sub nsw i32 %19, 1
store i32 %20, i32* %3
br label %7
21: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
long long cmmdc(long long a, long long b) {
  long long r;
  while (b) {
    r = a % b;
    a = b;
    b = r;
  }
  return a;
}


x86 assembly (clang, -O0):
<cmmdc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113a <cmmdc+0x3a>
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    110c <cmmdc+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmmdc>:
mov    %rdi,%rax
test   %rsi,%rsi
je     1135 <cmmdc+0x35>
mov    %rsi,%rdx
jmp    111d <cmmdc+0x1d>
nopl   (%rax)
cqto
idiv   %rcx
mov    %rcx,%rax
test   %rdx,%rdx
je     1132 <cmmdc+0x32>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <cmmdc+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <cmmdc+0x15>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @cmmdc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
br label %6
6: ; preds = %9, %2
%7 = load i64, i64* %4
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = srem i64 %10, %11
store i64 %12, i64* %5
%13 = load i64, i64* %4
store i64 %13, i64* %3
%14 = load i64, i64* %5
store i64 %14, i64* %4
br label %6
15: ; preds = %6
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @cmmdc(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %6, %4 ], [ %0, %2 ]
%6 = phi i64 [ %7, %4 ], [ %1, %2 ]
%7 = srem i64 %5, %6
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i64 [ %0, %2 ], [ %6, %4 ]
ret i64 %10
}
/* Variables and functions */
void *trace_malloc(size_t, char *);
void *trace_malloc_gmp(size_t size) { return trace_malloc(size, "GMP"); }


x86 assembly (clang, -O0):
<trace_malloc_gmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <trace_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_malloc_gmp>:
lea    0xee9(%rip),%rsi
jmp    1030 <trace_malloc@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"GMP\00"
define i8* @trace_malloc_gmp(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @trace_malloc(i64 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [4 x i8] c"GMP\00"
define i8* @trace_malloc_gmp(i64 %0) {
%2 = tail call i8* @trace_malloc(i64 %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
/* Type definitions */
typedef int uint8_t;
typedef int int16_t;

/* Variables and functions */
uint8_t clamp_u8(int16_t x) { return (x & (0xff00)) ? ((-x) >> 15) & 0xff : x; }


x86 assembly (clang, -O0):
<clamp_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
cmp    $0x0,%eax
je     112d <clamp_u8+0x2d>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
sar    $0xf,%eax
and    $0xff,%eax
mov    %eax,-0x8(%rbp)
jmp    1133 <clamp_u8+0x33>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp_u8>:
mov    %edi,%eax
neg    %eax
shr    $0xf,%eax
test   $0xff00,%edi
movzbl %al,%eax
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @clamp_u8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 0, %7
%9 = ashr i32 %8, 15
%10 = and i32 %9, 255
br label %13
11: ; preds = %1
%12 = load i32, i32* %2
br label %13
13: ; preds = %11, %6
%14 = phi i32 [ %10, %6 ], [ %12, %11 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @clamp_u8(i32 %0) {
%2 = and i32 %0, 65280
%3 = icmp eq i32 %2, 0
%4 = sub nsw i32 0, %0
%5 = lshr i32 %4, 15
%6 = and i32 %5, 255
%7 = select i1 %3, i32 %0, i32 %6
ret i32 %7
}
void XcmsCreateCCC() {}


x86 assembly (clang, -O0):
<XcmsCreateCCC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XcmsCreateCCC>:
ret

LLVM IR (-O0):
define void @XcmsCreateCCC() {
ret void
}

LLVM IR (-O2):
define void @XcmsCreateCCC() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mainthread();
void *mainthreadptr() { mainthread(); }


x86 assembly (clang, -O0):
<mainthreadptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <mainthread@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mainthreadptr>:
xor    %eax,%eax
jmp    1030 <mainthread@plt>

LLVM IR (-O0):
define i8* @mainthreadptr() {
%1 = alloca i8*
%2 = call i32 (...) @mainthread()
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define noalias i8* @mainthreadptr() {
%1 = tail call i32 (...) @mainthread()
ret i8* undef
}
void demo_segmenter(char *datacfg, char *cfgfile, char *weightfile,
                    int cam_index, const char *filename) {}


x86 assembly (clang, -O0):
<demo_segmenter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<demo_segmenter>:
ret

LLVM IR (-O0):
define void @demo_segmenter(i8* %0, i8* %1, i8* %2, i32 %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i8* %4, i8** %10
ret void
}

LLVM IR (-O2):
define void @demo_segmenter(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2, i32 %3, i8* nocapture %4) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
void f7() {
  char *x = (char *)malloc(4);
  free(x);
  x[0] = 'a';
}


x86 assembly (clang, -O0):
<f7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movb   $0x61,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <free@plt>
movb   $0x61,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @f7() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call i32 @free(i8* %4)
%6 = load i8*, i8** %1
%7 = getelementptr inbounds i8, i8* %6, i64 0
store i8 97, i8* %7
ret void
}

LLVM IR (-O2):
define void @f7() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @free(i8* %2)
store i8 97, i8* %2
ret void
}
int tracemalloc_dump() { return 0; }


x86 assembly (clang, -O0):
<tracemalloc_dump>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tracemalloc_dump>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tracemalloc_dump() {
ret i32 0
}

LLVM IR (-O2):
define i32 @tracemalloc_dump() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PIN_INT4_DriverIRQHandler();
__attribute__((weak)) void PIN_INT4_IRQHandler(void) {
  PIN_INT4_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PIN_INT4_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PIN_INT4_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIN_INT4_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PIN_INT4_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PIN_INT4_IRQHandler() {
%1 = call i32 (...) @PIN_INT4_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PIN_INT4_IRQHandler() {
%1 = tail call i32 (...) @PIN_INT4_DriverIRQHandler()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ DES_cblock;

/* Variables and functions */
scalar_t__ DES_is_weak_key(int /*<<< orphan*/ *);
int /*<<< orphan*/ DES_set_odd_parity(int /*<<< orphan*/ *);
int /*<<< orphan*/ arc4random_buf(int /*<<< orphan*/ *, int);
int DES_random_key(DES_cblock *ret) {
  do {
    arc4random_buf(ret, sizeof(DES_cblock));
    DES_set_odd_parity(ret);
  } while (DES_is_weak_key(ret));
  return (1);
}


x86 assembly (clang, -O0):
<DES_random_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <arc4random_buf@plt>
mov    -0x8(%rbp),%rdi
call   1050 <DES_set_odd_parity@plt>
mov    -0x8(%rbp),%rdi
call   1040 <DES_is_weak_key@plt>
cmp    $0x0,%rax
jne    113c <DES_random_key+0xc>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DES_random_key>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
mov    $0x4,%esi
call   1030 <arc4random_buf@plt>
mov    %rbx,%rdi
call   1050 <DES_set_odd_parity@plt>
mov    %rbx,%rdi
call   1040 <DES_is_weak_key@plt>
test   %rax,%rax
jne    1140 <DES_random_key+0x10>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @DES_random_key(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
br label %3
3: ; preds = %8, %1
%4 = load i32*, i32** %2
%5 = call i32 @arc4random_buf(i32* %4, i32 4)
%6 = load i32*, i32** %2
%7 = call i32 @DES_set_odd_parity(i32* %6)
br label %8
8: ; preds = %3
%9 = load i32*, i32** %2
%10 = call i64 @DES_is_weak_key(i32* %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %3, label %12
12: ; preds = %8
ret i32 1
}

LLVM IR (-O2):
define i32 @DES_random_key(i32* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @arc4random_buf(i32* %0, i32 4)
%4 = tail call i32 @DES_set_odd_parity(i32* %0)
%5 = tail call i64 @DES_is_weak_key(i32* %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %2
7: ; preds = %2
ret i32 1
}
int xtensa_lsi4x4(v)
int v;
{ return (v & 3) == 0 && (v >= 0 && v <= 60); }


x86 assembly (clang, -O0):
<xtensa_lsi4x4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jne    113a <xtensa_lsi4x4+0x3a>
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1134 <xtensa_lsi4x4+0x34>
cmpl   $0x3c,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtensa_lsi4x4>:
test   $0x3,%dil
sete   %al
cmp    $0x3d,%edi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @xtensa_lsi4x4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 60
br label %12
12: ; preds = %9, %6
%13 = phi i1 [ false, %6 ], [ %11, %9 ]
br label %14
14: ; preds = %12, %1
%15 = phi i1 [ false, %1 ], [ %13, %12 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @xtensa_lsi4x4(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = icmp ult i32 %0, 61
%5 = and i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
void *my_zeroit(void *s, size_t n) {
  char *cp = (char *)s;
  while (n > 0) {
    *cp++ = 0;
    n--;
  }
  return s;
}


x86 assembly (clang, -O0):
<my_zeroit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jbe    1142 <my_zeroit+0x42>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    1114 <my_zeroit+0x14>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_zeroit>:
push   %rbx
mov    %rdi,%rbx
test   %rsi,%rsi
je     1126 <my_zeroit+0x16>
mov    %rsi,%rdx
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @my_zeroit(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %10, %2
%8 = load i64, i64* %4
%9 = icmp ugt i64 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
store i8 0, i8* %11
%13 = load i64, i64* %4
%14 = add i64 %13, -1
store i64 %14, i64* %4
br label %7
15: ; preds = %7
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @my_zeroit(i8* returned writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %2
br label %5
5: ; preds = %4, %2
ret i8* %0
}
char get_c(char a, int b) {
  a = a + b;
  return (a);
}


x86 assembly (clang, -O0):
<get_c>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_c>:
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define signext i8 @get_c(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
%9 = trunc i32 %8 to i8
store i8 %9, i8* %3
%10 = load i8, i8* %3
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @get_c(i8 signext %0, i32 %1) {
%3 = trunc i32 %1 to i8
%4 = add i8 %3, %0
ret i8 %4
}
void addition_int(struct addition_options_int *options, int *in0, int *in1,
                  int *out0) {
  *out0 = *in0 + *in1;
}


x86 assembly (clang, -O0):
<addition_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
add    (%rax),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addition_int>:
mov    (%rdx),%eax
add    (%rsi),%eax
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
%struct.addition_options_int = type opaque
define void @addition_int(%struct.addition_options_int* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca %struct.addition_options_int*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store %struct.addition_options_int* %0, %struct.addition_options_int** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %6
%10 = load i32, i32* %9
%11 = load i32*, i32** %7
%12 = load i32, i32* %11
%13 = add nsw i32 %10, %12
%14 = load i32*, i32** %8
store i32 %13, i32* %14
ret void
}

LLVM IR (-O2):
%struct.addition_options_int = type opaque
define void @addition_int(%struct.addition_options_int* nocapture readnone %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture writeonly %3) {
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, %5
store i32 %7, i32* %3
ret void
}
unsigned long long rdmsr(unsigned index) {
  unsigned a, d;
  asm volatile("rdmsr" : "=a"(a), "=d"(d) : "c"(index));
  return ((unsigned long long)d << 32) | a;
}


x86 assembly (clang, -O0):
<rdmsr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
rdmsr
mov    %eax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x20,%rax
mov    -0x8(%rbp),%ecx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdmsr>:
mov    %edi,%ecx
rdmsr
shl    $0x20,%rdx
mov    %eax,%eax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @rdmsr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %5)
%7 = extractvalue { i32, i32 } %6, 0
%8 = extractvalue { i32, i32 } %6, 1
store i32 %7, i32* %3
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = shl i64 %10, 32
%12 = load i32, i32* %3
%13 = zext i32 %12 to i64
%14 = or i64 %11, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @rdmsr(i32 %0) {
%2 = tail call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
%3 = extractvalue { i32, i32 } %2, 0
%4 = extractvalue { i32, i32 } %2, 1
%5 = zext i32 %4 to i64
%6 = shl nuw i64 %5, 32
%7 = zext i32 %3 to i64
%8 = or i64 %6, %7
ret i64 %8
}
/* Variables and functions */
double __nv_norm3d(double, double, double);
double norm3d(double __a, double __b, double __c) {
  return __nv_norm3d(__a, __b, __c);
}


x86 assembly (clang, -O0):
<norm3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <__nv_norm3d@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm3d>:
jmp    1030 <__nv_norm3d@plt>

LLVM IR (-O0):
define double @norm3d(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @__nv_norm3d(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @norm3d(double %0, double %1, double %2) {
%4 = tail call double @__nv_norm3d(double %0, double %1, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int /*<<< orphan*/ printid(int);
int main() {
  int a = 64, b = 36, c;
  c = a >> b;
  print("c 4");
  printid(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x40,-0x8(%rbp)
movl   $0x24,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
lea    0xeb1(%rip),%rdi
call   1030 <print@plt>
mov    -0x10(%rbp),%edi
call   1040 <printid@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <print@plt>
call   1040 <printid@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"c 4\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 64, i32* %2
store i32 36, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = ashr i32 %5, %6
store i32 %7, i32* %4
%8 = call i32 @print(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* %4
%10 = call i32 @printid(i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"c 4\00"
define i32 @main() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printid(i32 poison)
ret i32 0
}
/* Variables and functions */
double fmod(double, double);
double fmodulo(double v1, double v2) {
  return (v1 >= 0) ? ((v1 < v2) ? v1 : fmod(v1, v2)) : (fmod(v1, v2) + v2);
}


x86 assembly (clang, -O0):
<fmodulo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     117a <fmodulo+0x6a>
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1157 <fmodulo+0x47>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    116b <fmodulo+0x5b>
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <fmod@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1193 <fmodulo+0x83>
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <fmod@plt>
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmodulo>:
xorpd  %xmm2,%xmm2
ucomisd %xmm2,%xmm0
jae    1130 <fmodulo+0x20>
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <fmod@plt>
addsd  (%rsp),%xmm0
add    $0x8,%rsp
jmp    1136 <fmodulo+0x26>
ucomisd %xmm0,%xmm1
jbe    1137 <fmodulo+0x27>
ret
jmp    1030 <fmod@plt>

LLVM IR (-O0):
define double @fmodulo(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fcmp oge double %5, 0.000000e+00
br i1 %6, label %7, label %19
7: ; preds = %2
%8 = load double, double* %3
%9 = load double, double* %4
%10 = fcmp olt double %8, %9
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = load double, double* %3
br label %17
13: ; preds = %7
%14 = load double, double* %3
%15 = load double, double* %4
%16 = call double @fmod(double %14, double %15)
br label %17
17: ; preds = %13, %11
%18 = phi double [ %12, %11 ], [ %16, %13 ]
br label %25
19: ; preds = %2
%20 = load double, double* %3
%21 = load double, double* %4
%22 = call double @fmod(double %20, double %21)
%23 = load double, double* %4
%24 = fadd double %22, %23
br label %25
25: ; preds = %19, %17
%26 = phi double [ %18, %17 ], [ %24, %19 ]
ret double %26
}

LLVM IR (-O2):
define double @fmodulo(double %0, double %1) {
%3 = fcmp ult double %0, 0.000000e+00
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = fcmp olt double %0, %1
br i1 %5, label %11, label %6
6: ; preds = %4
%7 = tail call double @fmod(double %0, double %1)
br label %11
8: ; preds = %2
%9 = tail call double @fmod(double %0, double %1)
%10 = fadd double %9, %1
br label %11
11: ; preds = %4, %6, %8
%12 = phi double [ %10, %8 ], [ %7, %6 ], [ %0, %4 ]
ret double %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_deps_header(void) {
  printf("tasks which wait for deadlock loop:\n");
}


x86 assembly (clang, -O0):
<print_deps_header>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_deps_header>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"tasks which wait for deadlock loop:\0A\00"
define void @print_deps_header() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [36 x i8] c"tasks which wait for deadlock loop:\00"
define void @print_deps_header() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret void
}
int mian() {}


x86 assembly (clang, -O0):
<mian>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mian>:
ret

LLVM IR (-O0):
define i32 @mian() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @mian() {
ret i32 undef
}