xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
void s2cM(const uint16_t s, uint8_t *c) {
  memcpy(c, &s, sizeof(uint16_t));
  return;
}


x86 assembly (clang, -O0):
<s2cM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2cM>:
push   %rax
mov    %rsi,%rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    %rax,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @s2cM(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @memcpy(i32* %5, i32* %3, i32 4)
ret void
}

LLVM IR (-O2):
define void @s2cM(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @memcpy(i32* %1, i32* %3, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ms_sleep(int);
void lcd_char(char c) {
  (*(volatile unsigned char *)(0x3FFFC000 + 0x74)) = c;
  (*(volatile unsigned long *)(0x3FFFC000 + 0x58)) = 4;
  (*(volatile unsigned long *)(0x3FFFC000 + 0x58)) = 8;
  (*(volatile unsigned long *)(0x3FFFC000 + 0x5C)) = 8;
  ms_sleep(8);
}


x86 assembly (clang, -O0):
<lcd_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%cl
mov    $0x3fffc074,%eax
mov    %cl,(%rax)
mov    $0x3fffc058,%eax
movq   $0x4,(%rax)
mov    $0x3fffc058,%eax
movq   $0x8,(%rax)
mov    $0x3fffc05c,%eax
movq   $0x8,(%rax)
mov    $0x8,%edi
call   1030 <ms_sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_char>:
mov    %dil,0x3fffc074
3f
movq   $0x4,0x3fffc058
movq   $0x8,0x3fffc058
movq   $0x8,0x3fffc05c
mov    $0x8,%edi
jmp    1030 <ms_sleep@plt>

LLVM IR (-O0):
define void @lcd_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
store volatile i8 %3, i8* inttoptr (i64 1073725556 to i8*)
store volatile i64 4, i64* inttoptr (i64 1073725528 to i64*)
store volatile i64 8, i64* inttoptr (i64 1073725528 to i64*)
store volatile i64 8, i64* inttoptr (i64 1073725532 to i64*)
%4 = call i32 @ms_sleep(i32 8)
ret void
}

LLVM IR (-O2):
define void @lcd_char(i8 signext %0) {
store volatile i8 %0, i8* inttoptr (i64 1073725556 to i8*)
store volatile i64 4, i64* inttoptr (i64 1073725528 to i64*)
store volatile i64 8, i64* inttoptr (i64 1073725528 to i64*)
store volatile i64 8, i64* inttoptr (i64 1073725532 to i64*)
%2 = tail call i32 @ms_sleep(i32 8)
ret void
}
unsigned char read_disk(unsigned char drive_head, unsigned char sector,
                        unsigned char cylinder1, unsigned char cylinder2) {
  unsigned char tmp = drive_head;
  tmp += sector;
  tmp += cylinder1;
  tmp += cylinder2;
  return tmp;
}


x86 assembly (clang, -O0):
<read_disk>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x5(%rbp)
movzbl -0x2(%rbp),%ecx
movzbl -0x5(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x5(%rbp)
movzbl -0x3(%rbp),%ecx
movzbl -0x5(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x5(%rbp)
movzbl -0x4(%rbp),%ecx
movzbl -0x5(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_disk>:
lea    (%rsi,%rdi,1),%eax
add    %dl,%al
add    %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @read_disk(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%10 = load i8, i8* %5
store i8 %10, i8* %9
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = load i8, i8* %9
%14 = zext i8 %13 to i32
%15 = add nsw i32 %14, %12
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %7
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = add nsw i32 %20, %18
%22 = trunc i32 %21 to i8
store i8 %22, i8* %9
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = load i8, i8* %9
%26 = zext i8 %25 to i32
%27 = add nsw i32 %26, %24
%28 = trunc i32 %27 to i8
store i8 %28, i8* %9
%29 = load i8, i8* %9
ret i8 %29
}

LLVM IR (-O2):
define zeroext i8 @read_disk(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = add i8 %1, %0
%6 = add i8 %5, %2
%7 = add i8 %6, %3
ret i8 %7
}
int is_mem_section_removable(unsigned long pfn, unsigned long nr_pages) {
  return 0;
}


x86 assembly (clang, -O0):
<is_mem_section_removable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_mem_section_removable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_mem_section_removable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @is_mem_section_removable(i64 %0, i64 %1) {
ret i32 0
}
void memSaveGame() {}


x86 assembly (clang, -O0):
<memSaveGame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memSaveGame>:
ret

LLVM IR (-O0):
define void @memSaveGame() {
ret void
}

LLVM IR (-O2):
define void @memSaveGame() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p224_add(uintptr_t, uintptr_t, uintptr_t);
void fiat_p224_add(uint32_t out1[7], const uint32_t arg1[7],
                   const uint32_t arg2[7]) {
  internal_fiat_p224_add((uintptr_t)out1, (uintptr_t)arg1, (uintptr_t)arg2);
}


x86 assembly (clang, -O0):
<fiat_p224_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <internal_fiat_p224_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p224_add>:
jmp    1030 <internal_fiat_p224_add@plt>

LLVM IR (-O0):
define void @fiat_p224_add(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = load i32*, i32** %5
%10 = ptrtoint i32* %9 to i64
%11 = load i32*, i32** %6
%12 = ptrtoint i32* %11 to i64
%13 = call i32 @internal_fiat_p224_add(i64 %8, i64 %10, i64 %12)
ret void
}

LLVM IR (-O2):
define void @fiat_p224_add(i32* %0, i32* %1, i32* %2) {
%4 = ptrtoint i32* %0 to i64
%5 = ptrtoint i32* %1 to i64
%6 = ptrtoint i32* %2 to i64
%7 = tail call i32 @internal_fiat_p224_add(i64 %4, i64 %5, i64 %6)
ret void
}
/* Variables and functions */
size_t partition(int *, size_t);
void quick_sort(int A[], size_t n) {
  if (n > 0) {
    size_t p = partition(A, n);
    quick_sort(A, p);
    quick_sort(A + p + 1, n - p - 1);
  }
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jbe    117d <quick_sort+0x5d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <partition@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
add    $0x4,%rdi
mov    -0x10(%rbp),%rsi
sub    -0x18(%rbp),%rsi
sub    $0x1,%rsi
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1159 <quick_sort+0x39>
mov    %rsi,%r14
mov    %rdi,%r15
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <partition@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %rax,%rsi
call   1040 <quick_sort@plt>
lea    (%r15,%rbx,4),%r15
add    $0x4,%r15
not    %rbx
add    %rbx,%r14
jne    1130 <quick_sort+0x10>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = icmp ugt i64 %6, 0
br i1 %7, label %8, label %22
8: ; preds = %2
%9 = load i32*, i32** %3
%10 = load i64, i64* %4
%11 = call i64 @partition(i32* %9, i64 %10)
store i64 %11, i64* %5
%12 = load i32*, i32** %3
%13 = load i64, i64* %5
%14 = load i32*, i32** %3
%15 = load i64, i64* %5
%16 = getelementptr inbounds i32, i32* %14, i64 %15
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i64, i64* %4
%19 = load i64, i64* %5
%20 = sub i64 %18, %19
%21 = sub i64 %20, 1
br label %22
22: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %11, %4 ], [ %1, %2 ]
%6 = phi i32* [ %9, %4 ], [ %0, %2 ]
%7 = tail call i64 @partition(i32* %6, i64 %5)
tail call void @quick_sort(i32* %6, i64 %7)
%8 = getelementptr inbounds i32, i32* %6, i64 1
%9 = getelementptr inbounds i32, i32* %8, i64 %7
%10 = xor i64 %7, -1
%11 = add i64 %5, %10
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
                     unsigned long end) {}


x86 assembly (clang, -O0):
<flush_tlb_range>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_tlb_range>:
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define void @flush_tlb_range(%struct.vm_area_struct* %0, i64 %1, i64 %2) {
%4 = alloca %struct.vm_area_struct*
%5 = alloca i64
%6 = alloca i64
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define void @flush_tlb_range(%struct.vm_area_struct* nocapture %0, i64 %1, i64 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memblockq_push_align() {
  printf("NOT IMPLEMENTED:"
         "pa_memblockq_push_align"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memblockq_push_align>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memblockq_push_align>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"NOT IMPLEMENTED:pa_memblockq_push_align\0A\00"
define i32 @pa_memblockq_push_align() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [40 x i8] c"NOT IMPLEMENTED:pa_memblockq_push_align\00"
define i32 @pa_memblockq_push_align() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
__attribute__((always_)) unsigned long _get_base(char *addr) {
  unsigned long __base;
  __asm__("movb %3,%%dh\n\t"
          "movb %2,%%dl\n\t"
          "shll $16,%%edx\n\t"
          "movw %1,%%dx"
          : "=&d"(__base)
          : "m"(*((addr) + 2)), "m"(*((addr) + 4)), "m"(*((addr) + 7)));
  return __base;
}


x86 assembly (clang, -O0):
<_get_base>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x2,%rax
mov    -0x8(%rbp),%rcx
add    $0x4,%rcx
mov    -0x8(%rbp),%rsi
add    $0x7,%rsi
mov    (%rsi),%dh
mov    (%rcx),%dl
shl    $0x10,%edx
mov    (%rax),%dx
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_base>:
mov    0x7(%rdi),%dh
mov    0x4(%rdi),%dl
shl    $0x10,%edx
mov    0x2(%rdi),%dx
mov    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @_get_base(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 2
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 4
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 7
%10 = call i64 asm "movb $3,%dh\0A\09movb $2,%dl\0A\09shll $$16,%edx\0A\09movw $1,%dx", "=&{dx},*m,*m,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %5, i8* elementtype(i8) %7, i8* elementtype(i8) %9)
store i64 %10, i64* %3
%11 = load i64, i64* %3
ret i64 %11
}

LLVM IR (-O2):
define i64 @_get_base(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 2
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = getelementptr inbounds i8, i8* %0, i64 7
%5 = tail call i64 asm "movb $3,%dh\0A\09movb $2,%dl\0A\09shll $$16,%edx\0A\09movw $1,%dx", "=&{dx},*m,*m,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %2, i8* elementtype(i8) %3, i8* elementtype(i8) %4)
ret i64 %5
}
/* Variables and functions */
float fmax(float, float);
float fmax3(float _a, float _b, float _c) { return fmax(_a, fmax(_b, _c)); }


x86 assembly (clang, -O0):
<fmax3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
call   1030 <fmax@plt>
movaps %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
call   1030 <fmax@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmax3>:
movaps %xmm1,%xmm3
cmpunordss %xmm1,%xmm3
movaps %xmm3,%xmm4
andps  %xmm2,%xmm4
maxss  %xmm1,%xmm2
andnps %xmm2,%xmm3
orps   %xmm4,%xmm3
movaps %xmm3,%xmm1
maxss  %xmm0,%xmm1
cmpunordss %xmm0,%xmm0
movaps %xmm0,%xmm2
andps  %xmm3,%xmm2
andnps %xmm1,%xmm0
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @fmax3(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @fmax(float %8, float %9)
%11 = call float @fmax(float %7, float %10)
ret float %11
}

LLVM IR (-O2):
define float @fmax3(float %0, float %1, float %2) {
%4 = tail call nsz float @llvm.maxnum.f32(float %1, float %2)
%5 = tail call nsz float @llvm.maxnum.f32(float %0, float %4)
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() {
  printf("\n\n  Hello LEON3 World!!!\n");
  printf("\n  Simulation will now be halted through error mode...\n\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"\0A\0A Hello LEON3 World!!!\0A\00"
@.str.1 = [57 x i8] c"\0A Simulation will now be halted through error mode...\0A\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"\0A\0A Hello LEON3 World!!!\00"
@str.2 = [56 x i8] c"\0A Simulation will now be halted through error mode...\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
unsigned long long max_memory() { return 96 * 1024 * 1024; }


x86 assembly (clang, -O0):
<max_memory>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_memory>:
mov    $0x6000000,%eax
ret

LLVM IR (-O0):
define i64 @max_memory() {
ret i64 100663296
}

LLVM IR (-O2):
define i64 @max_memory() {
ret i64 100663296
}
void g_option_group_set_translation_domain() {}


x86 assembly (clang, -O0):
<g_option_group_set_translation_domain>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_option_group_set_translation_domain>:
ret

LLVM IR (-O0):
define void @g_option_group_set_translation_domain() {
ret void
}

LLVM IR (-O2):
define void @g_option_group_set_translation_domain() {
ret void
}
void foo_2_1_2_1_2_2_2_2_2() {}


x86 assembly (clang, -O0):
<foo_2_1_2_1_2_2_2_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_2_1_2_2_2_2_2>:
ret

LLVM IR (-O0):
define void @foo_2_1_2_1_2_2_2_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_2_1_2_2_2_2_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ab_thread_run();
int /*<<< orphan*/ abcontext_is_master();
int /*<<< orphan*/ abevent_once();
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ event_node_empty();
void abevent_loop() {
  assert(abcontext_is_master());
  ab_thread_run();
  while (!event_node_empty()) {
    abevent_once();
    ab_thread_run();
  }
}


x86 assembly (clang, -O0):
<abevent_loop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <abcontext_is_master@plt>
mov    %eax,%edi
call   1040 <assert@plt>
mov    $0x0,%al
call   1060 <ab_thread_run@plt>
mov    $0x0,%al
call   1050 <event_node_empty@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1185 <abevent_loop+0x35>
jmp    1198 <abevent_loop+0x48>
mov    $0x0,%al
call   1030 <abevent_once@plt>
mov    $0x0,%al
call   1060 <ab_thread_run@plt>
jmp    1169 <abevent_loop+0x19>
pop    %rbp
ret

x86 assembly (clang, -O2):
<abevent_loop>:
push   %rax
xor    %eax,%eax
call   1070 <abcontext_is_master@plt>
mov    %eax,%edi
call   1040 <assert@plt>
nop
xor    %eax,%eax
call   1060 <ab_thread_run@plt>
xor    %eax,%eax
call   1050 <event_node_empty@plt>
test   %eax,%eax
jne    117b <abevent_loop+0x2b>
xor    %eax,%eax
call   1030 <abevent_once@plt>
jmp    1160 <abevent_loop+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @abevent_loop() {
%1 = call i32 (...) @abcontext_is_master()
%2 = call i32 @assert(i32 %1)
%3 = call i32 (...) @ab_thread_run()
br label %4
4: ; preds = %8, %0
%5 = call i32 (...) @event_node_empty()
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = call i32 (...) @abevent_once()
%10 = call i32 (...) @ab_thread_run()
br label %4
11: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @abevent_loop() {
%1 = tail call i32 (...) @abcontext_is_master()
%2 = tail call i32 @assert(i32 %1)
%3 = tail call i32 (...) @ab_thread_run()
%4 = tail call i32 (...) @event_node_empty()
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %0, %6
%7 = tail call i32 (...) @abevent_once()
%8 = tail call i32 (...) @ab_thread_run()
%9 = tail call i32 (...) @event_node_empty()
%10 = icmp eq i32 %9, 0
br i1 %10, label %6, label %11
11: ; preds = %6, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vga_set_14font();
int /*<<< orphan*/ vga_set_480_scanlines(int);
void vga_set_80x34(void) {
  vga_set_14font();
  vga_set_480_scanlines(0xdb);
}


x86 assembly (clang, -O0):
<vga_set_80x34>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <vga_set_14font@plt>
mov    $0xdb,%edi
call   1040 <vga_set_480_scanlines@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_set_80x34>:
push   %rax
xor    %eax,%eax
call   1030 <vga_set_14font@plt>
mov    $0xdb,%edi
pop    %rax
jmp    1040 <vga_set_480_scanlines@plt>

LLVM IR (-O0):
define void @vga_set_80x34() {
%1 = call i32 (...) @vga_set_14font()
%2 = call i32 @vga_set_480_scanlines(i32 219)
ret void
}

LLVM IR (-O2):
define void @vga_set_80x34() {
%1 = tail call i32 (...) @vga_set_14font()
%2 = tail call i32 @vga_set_480_scanlines(i32 219)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int who_am_i();
int main(int argc, char **argv) {
  if (argc > 1) {
    fprintf(stderr, "usage: whoami\n");
    return 1;
  }
  return who_am_i();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1161 <main+0x41>
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
call   1040 <fprintf@plt>
movl   $0x1,-0x4(%rbp)
jmp    116b <main+0x4b>
mov    $0x0,%al
call   1030 <who_am_i@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jl     1142 <main+0x22>
push   %rax
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
jmp    1030 <who_am_i@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"usage: whoami\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %3
br label %13
11: ; preds = %2
%12 = call i32 (...) @who_am_i()
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"usage: whoami\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %2
%8 = tail call i32 (...) @who_am_i()
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ 1, %4 ], [ %8, %7 ]
ret i32 %10
}
/* Variables and functions */
void f(int x, int y) {
  if (x)
    goto A;
  if (y)
    goto B;
  return;
A:
  __attribute__((cold)) g();
  return;
B:
  __attribute__((hot)) h();
  return;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113d <f+0x1d>
jmp    1151 <f+0x31>
cmpl   $0x0,-0x8(%rbp)
je     114c <f+0x2c>
jmp    115d <f+0x3d>
jmp    1164 <f+0x44>
mov    $0x0,%al
call   1040 <g@plt>
jmp    1164 <f+0x44>
mov    $0x0,%al
call   1030 <h@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
test   %edi,%edi
je     112b <f+0xb>
xor    %eax,%eax
jmp    1040 <g@plt>
test   %esi,%esi
je     1136 <f+0x16>
xor    %eax,%eax
jmp    1030 <h@plt>
ret

LLVM IR (-O0):
define void @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
br label %13
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
br label %15
12: ; preds = %8
br label %17
13: ; preds = %7
%14 = call i32 (...) @g()
br label %17
15: ; preds = %11
%16 = call i32 (...) @h()
br label %17
17: ; preds = %15, %13, %12
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = icmp eq i32 %1, 0
br i1 %5, label %10, label %8
6: ; preds = %2
%7 = tail call i32 (...) @g()
br label %10
8: ; preds = %4
%9 = tail call i32 (...) @h()
br label %10
10: ; preds = %4, %8, %6
ret void
}
void exm_log_shutdown(void) {}


x86 assembly (clang, -O0):
<exm_log_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exm_log_shutdown>:
ret

LLVM IR (-O0):
define void @exm_log_shutdown() {
ret void
}

LLVM IR (-O2):
define void @exm_log_shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lt_fatal(char *, int, char *);
scalar_t__ malloc(size_t);
void *xmalloc(size_t num) {
  void *p = (void *)malloc(num);
  if (!p)
    lt_fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
             "2022-01-22/02-19-57/repos/paulcdejean/AeonTick/refs/heads/master/"
             "libtermkey-0.17/.libs/lt-demo-glib.c",
             311, "memory exhausted");
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115c <xmalloc+0x3c>
lea    0xeb5(%rip),%rdi
mov    $0x137,%esi
lea    0xf4f(%rip),%rdx
call   1030 <lt_fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1146 <xmalloc+0x26>
lea    0xecb(%rip),%rdi
lea    0xf6a(%rip),%rdx
mov    $0x137,%esi
call   1030 <lt_fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [166 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/paulcdejean/AeonTick/refs/heads/master/libtermkey-0.17/.libs/lt-demo-glib.c\00"
@.str.1 = [17 x i8] c"memory exhausted\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @malloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = call i32 @lt_fatal(i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str, i64 0, i64 0), i32 311, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [166 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/paulcdejean/AeonTick/refs/heads/master/libtermkey-0.17/.libs/lt-demo-glib.c\00"
@.str.1 = [17 x i8] c"memory exhausted\00"
define i8* @xmalloc(i64 %0) {
%2 = tail call i64 @malloc(i64 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @lt_fatal(i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str, i64 0, i64 0), i32 311, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = inttoptr i64 %2 to i8*
ret i8* %7
}
void init_uart(void) {
  (*((volatile unsigned long *)0x7F008000)) &= ~0xff;
  (*((volatile unsigned long *)0x7F008000)) |= 0x22;
  (*((volatile unsigned long *)0x7F005000)) = 0x3;
  (*((volatile unsigned long *)0x7F005004)) = 0x5;
  (*((volatile unsigned long *)0x7F005008)) = 0x01;
  (*((volatile unsigned long *)0x7F00500C)) = 0;
  (*((volatile unsigned short *)0x7F005028)) = 35;
  (*((volatile unsigned short *)0x7F00502C)) = 0x1;
}


x86 assembly (clang, -O0):
<init_uart>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f008000,%eax
mov    (%rax),%rcx
and    $0xffffffffffffff00,%rcx
mov    $0x7f008000,%eax
mov    %rcx,(%rax)
mov    $0x7f008000,%eax
mov    (%rax),%rcx
or     $0x22,%rcx
mov    $0x7f008000,%eax
mov    %rcx,(%rax)
mov    $0x7f005000,%eax
movq   $0x3,(%rax)
mov    $0x7f005004,%eax
movq   $0x5,(%rax)
mov    $0x7f005008,%eax
movq   $0x1,(%rax)
mov    $0x7f00500c,%eax
movq   $0x0,(%rax)
mov    $0x7f005028,%eax
movw   $0x23,(%rax)
mov    $0x7f00502c,%eax
movw   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_uart>:
andq   $0xffffffffffffff00,0x7f008000
orq    $0x22,0x7f008000
7f 22
movq   $0x3,0x7f005000
movq   $0x5,0x7f005004
movq   $0x1,0x7f005008
movq   $0x0,0x7f00500c
movw   $0x23,0x7f005028
movw   $0x1,0x7f00502c
ret

LLVM IR (-O0):
define void @init_uart() {
%1 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%2 = and i64 %1, -256
store volatile i64 %2, i64* inttoptr (i64 2130739200 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%4 = or i64 %3, 34
store volatile i64 %4, i64* inttoptr (i64 2130739200 to i64*)
store volatile i64 3, i64* inttoptr (i64 2130726912 to i64*)
store volatile i64 5, i64* inttoptr (i64 2130726916 to i64*)
store volatile i64 1, i64* inttoptr (i64 2130726920 to i64*)
store volatile i64 0, i64* inttoptr (i64 2130726924 to i64*)
store volatile i16 35, i16* inttoptr (i64 2130726952 to i16*)
store volatile i16 1, i16* inttoptr (i64 2130726956 to i16*)
ret void
}

LLVM IR (-O2):
define void @init_uart() {
%1 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%2 = and i64 %1, -256
store volatile i64 %2, i64* inttoptr (i64 2130739200 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 2130739200 to i64*)
%4 = or i64 %3, 34
store volatile i64 %4, i64* inttoptr (i64 2130739200 to i64*)
store volatile i64 3, i64* inttoptr (i64 2130726912 to i64*)
store volatile i64 5, i64* inttoptr (i64 2130726916 to i64*)
store volatile i64 1, i64* inttoptr (i64 2130726920 to i64*)
store volatile i64 0, i64* inttoptr (i64 2130726924 to i64*)
store volatile i16 35, i16* inttoptr (i64 2130726952 to i16*)
store volatile i16 1, i16* inttoptr (i64 2130726956 to i16*)
ret void
}
int fun577() { return 577; }


x86 assembly (clang, -O0):
<fun577>:
push   %rbp
mov    %rsp,%rbp
mov    $0x241,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun577>:
mov    $0x241,%eax
ret

LLVM IR (-O0):
define i32 @fun577() {
ret i32 577
}

LLVM IR (-O2):
define i32 @fun577() {
ret i32 577
}
int foo1() { return 0; }


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo1() {
ret i32 0
}

LLVM IR (-O2):
define i32 @foo1() {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ rax;

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
bool cpuid_misc_enable_TurboModeDisable(void) {
  uint64_t rax, rbx, rcx, rdx;
  int leaf = 6;
  cpuid(leaf, &rax, &rbx, &rcx, &rdx);
  if ((((uint64_t)(rax) &
        ((((uint64_t)1 << (((1)) - ((1)) + 1)) - 1) << ((1)))) >>
       (1)) == 1) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<cpuid_misc_enable_TurboModeDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x6,-0x18(%rbp)
mov    -0x18(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <cpuid@plt>
mov    -0x8(%rbp),%eax
and    $0x2,%eax
sar    $0x1,%eax
cmp    $0x1,%eax
jne    1155 <cpuid_misc_enable_TurboModeDisable+0x45>
movl   $0x1,-0x4(%rbp)
jmp    115c <cpuid_misc_enable_TurboModeDisable+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_misc_enable_TurboModeDisable>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    $0x6,%edi
call   1030 <cpuid@plt>
mov    0x8(%rsp),%eax
shr    %eax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @cpuid_misc_enable_TurboModeDisable() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 6, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @cpuid(i32 %7, i32* %2, i32* %3, i32* %4, i32* %5)
%9 = load i32, i32* %2
%10 = and i32 %9, 2
%11 = ashr i32 %10, 1
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, i32* %1
br label %15
14: ; preds = %0
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @cpuid_misc_enable_TurboModeDisable() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @cpuid(i32 6, i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %1
%11 = lshr i32 %10, 1
%12 = and i32 %11, 1
ret i32 %12
}
unsigned add(unsigned a, unsigned b, unsigned c) { return a + b + c; }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add i32 %7, %8
%10 = load i32, i32* %6
%11 = add i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1, i32 %2) {
%4 = add i32 %1, %0
%5 = add i32 %4, %2
ret i32 %5
}
int test(int i) { return i % 2; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    %edi,%eax
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @test(i32 %0) {
%2 = srem i32 %0, 2
ret i32 %2
}
double cels2fahr(double celsius) { return celsius * 9.0 / 5.0 + 32.0; }


x86 assembly (clang, -O0):
<cels2fahr>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeff(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xed6(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cels2fahr>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @cels2fahr(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 9.000000e+00
%5 = fdiv double %4, 5.000000e+00
%6 = fadd double %5, 3.200000e+01
ret double %6
}

LLVM IR (-O2):
define double @cels2fahr(double %0) {
%2 = fmul double %0, 9.000000e+00
%3 = fdiv double %2, 5.000000e+00
%4 = fadd double %3, 3.200000e+01
ret double %4
}
int isDecDigit(const char digito) { return digito >= '0' && digito <= '9'; }


x86 assembly (clang, -O0):
<isDecDigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isDecDigit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isDecDigit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isDecDigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isDecDigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
double dnot(x)
double x;
{ return ((double)(x == 0.0)); }


x86 assembly (clang, -O0):
<dnot>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dnot>:
xorpd  %xmm1,%xmm1
cmpeqsd %xmm1,%xmm0
movsd  0xeef(%rip),%xmm1
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dnot(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oeq double %3, 0.000000e+00
%5 = zext i1 %4 to i32
%6 = sitofp i32 %5 to double
ret double %6
}

LLVM IR (-O2):
define double @dnot(double %0) {
%2 = fcmp oeq double %0, 0.000000e+00
%3 = uitofp i1 %2 to double
ret double %3
}
int Float_to_MINUS_int(float x) { return (int)x; }


x86 assembly (clang, -O0):
<Float_to_MINUS_int>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Float_to_MINUS_int>:
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @Float_to_MINUS_int(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fptosi float %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @Float_to_MINUS_int(float %0) {
%2 = fptosi float %0 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_lvector(long *v, long int nl, long int nh) {
  free((char *)(v + nl - 1));
}


x86 assembly (clang, -O0):
<free_lvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_lvector>:
lea    (%rdi,%rsi,8),%rdi
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_lvector(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i64, i64* %7, i64 %8
%10 = getelementptr inbounds i64, i64* %9, i64 -1
%11 = bitcast i64* %10 to i8*
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @free_lvector(i64* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i64, i64* %0, i64 %1
%5 = getelementptr inbounds i64, i64* %4, i64 -1
%6 = bitcast i64* %5 to i8*
%7 = tail call i32 @free(i8* %6)
ret void
}
__attribute__((section(".after_vectors"))) void BusFault_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<BusFault_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <BusFault_Handler+0x9>
jmp    1109 <BusFault_Handler+0x9>

x86 assembly (clang, -O2):
<BusFault_Handler>:
jmp    1100 <BusFault_Handler>

LLVM IR (-O0):
define void @BusFault_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @BusFault_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
int main(argc, argv)
int argc;
char **argv;
{
  if (argc < 2) {
    usage();
  } else {
    cmdinit(argc, argv);
    parse();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    115c <main+0x2c>
mov    $0x0,%al
call   1030 <usage@plt>
jmp    1171 <main+0x41>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1040 <cmdinit@plt>
mov    $0x0,%al
call   1050 <parse@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
cmp    $0x1,%edi
jg     113f <main+0xf>
call   1030 <usage@plt>
jmp    114b <main+0x1b>
call   1040 <cmdinit@plt>
xor    %eax,%eax
call   1050 <parse@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @usage()
br label %15
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i8**, i8*** %5
%13 = call i32 (i32, i8**, ...) bitcast (i32 (...)* @cmdinit to i32 (i32, i8**, ...)*)(i32 %11, i8** %12)
%14 = call i32 (...) @parse()
br label %15
15: ; preds = %10, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @usage()
br label %9
6: ; preds = %2
%7 = tail call i32 (i32, i8**, ...) bitcast (i32 (...)* @cmdinit to i32 (i32, i8**, ...)*)(i32 %0, i8** %1)
%8 = tail call i32 (...) @parse()
br label %9
9: ; preds = %6, %4
ret i32 0
}
char *langRomTypeEseRam() { return "Ese-RAM"; }


x86 assembly (clang, -O0):
<langRomTypeEseRam>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeEseRam>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Ese-RAM\00"
define i8* @langRomTypeEseRam() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"Ese-RAM\00"
define i8* @langRomTypeEseRam() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
void genbeql_out() {}


x86 assembly (clang, -O0):
<genbeql_out>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbeql_out>:
ret

LLVM IR (-O0):
define void @genbeql_out() {
ret void
}

LLVM IR (-O2):
define void @genbeql_out() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ T();
int /*<<< orphan*/ printf(char *);
int H() {
  printf(".");
  T();
}


x86 assembly (clang, -O0):
<H>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <T@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H>:
push   %rax
mov    $0x2e,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <T@plt>

LLVM IR (-O0):
@.str = [2 x i8] c".\00"
define i32 @H() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @T()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @H() {
%1 = tail call i32 @putchar(i32 46)
%2 = tail call i32 (...) @T()
ret i32 undef
}
void gtk_clipboard_get() {}


x86 assembly (clang, -O0):
<gtk_clipboard_get>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_clipboard_get>:
ret

LLVM IR (-O0):
define void @gtk_clipboard_get() {
ret void
}

LLVM IR (-O2):
define void @gtk_clipboard_get() {
ret void
}
int rfoo(int *restrict a, int *restrict b) {
  *a = 5;
  *b = 6;
  return *a + *b;
}


x86 assembly (clang, -O0):
<rfoo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x6,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfoo>:
movl   $0x5,(%rdi)
movl   $0x6,(%rsi)
mov    $0xb,%eax
ret

LLVM IR (-O0):
define i32 @rfoo(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 5, i32* %5
%6 = load i32*, i32** %4
store i32 6, i32* %6
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = add nsw i32 %8, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @rfoo(i32* noalias nocapture writeonly %0, i32* noalias nocapture writeonly %1) {
store i32 5, i32* %0
store i32 6, i32* %1
ret i32 11
}
int my_strcmp(char *s, char *sc) {
  int i = 0, j = 0;
  while (s[i++] == sc[j++])
    if (sc[j - 1] == ' ')
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<my_strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x1c(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%edx
mov    %edx,%esi
add    $0x1,%esi
mov    %esi,-0x20(%rbp)
movslq %edx,%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    1179 <my_strcmp+0x79>
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
jne    1174 <my_strcmp+0x74>
movl   $0x1,-0x4(%rbp)
jmp    1180 <my_strcmp+0x80>
jmp    111a <my_strcmp+0x1a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strcmp>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rdi,%rcx,1),%edx
cmp    (%rsi,%rcx,1),%dl
jne    1127 <my_strcmp+0x27>
add    $0x1,%rcx
cmp    $0x20,%dl
jne    1110 <my_strcmp+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @my_strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 0, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %34, %2
%9 = load i8*, i8** %4
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 1
store i32 %11, i32* %6
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i8*, i8** %5
%17 = load i32, i32* %7
%18 = add nsw i32 %17, 1
store i32 %18, i32* %7
%19 = sext i32 %17 to i64
%20 = getelementptr inbounds i8, i8* %16, i64 %19
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %15, %22
br i1 %23, label %24, label %35
24: ; preds = %8
%25 = load i8*, i8** %5
%26 = load i32, i32* %7
%27 = sub nsw i32 %26, 1
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i8, i8* %25, i64 %28
%30 = load i8, i8* %29
%31 = sext i8 %30 to i32
%32 = icmp eq i32 %31, 32
br i1 %32, label %33, label %34
33: ; preds = %24
store i32 1, i32* %3
br label %36
34: ; preds = %24
br label %8
35: ; preds = %8
store i32 0, i32* %3
br label %36
36: ; preds = %35, %33
%37 = load i32, i32* %3
ret i32 %37
}

LLVM IR (-O2):
define i32 @my_strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %10, %2
%4 = phi i64 [ %11, %10 ], [ 0, %2 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %1, i64 %4
%8 = load i8, i8* %7
%9 = icmp eq i8 %6, %8
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = add nuw i64 %4, 1
%12 = icmp eq i8 %6, 32
br i1 %12, label %13, label %3
13: ; preds = %3, %10
%14 = phi i32 [ 1, %10 ], [ 0, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_MD_C and/or MBEDTLS_FS_IO not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [48 x i8] c"MBEDTLS_MD_C and/or MBEDTLS_FS_IO not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [47 x i8] c"MBEDTLS_MD_C and/or MBEDTLS_FS_IO not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int fce(int, int);
__attribute__((no)) int f0(int a) { return fce(a, 5) + fce(a, 7); }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x5,%esi
call   1030 <fce@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x7,%esi
call   1030 <fce@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x5,%esi
call   1030 <fce@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    $0x7,%esi
call   1030 <fce@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @f0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fce(i32 %3, i32 5)
%5 = load i32, i32* %2
%6 = call i32 @fce(i32 %5, i32 7)
%7 = add nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @f0(i32 %0) {
%2 = tail call i32 @fce(i32 %0, i32 5)
%3 = tail call i32 @fce(i32 %0, i32 7)
%4 = add nsw i32 %3, %2
ret i32 %4
}
void foo() {
  do {
  } while (1);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <foo+0x9>
jmp    110e <foo+0xe>
mov    $0x1,%al
test   $0x1,%al
jne    1109 <foo+0x9>
jmp    111d <foo+0x1d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
jmp    1100 <foo>

LLVM IR (-O0):
define void @foo() {
br label %1
1: ; preds = %2, %0
br label %2
2: ; preds = %1
br i1 true, label %1, label %3
3: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @foo() {
br label %1
1: ; preds = %1, %0
br label %1
}