xunge/DecIR huggingface dataset:
int test_oneand(unsigned int d) { return __builtin_popcount(1 & d); }


x86 assembly (clang, -O0):
<test_oneand>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1,%ecx
mov    %ecx,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%ecx
mov    %ecx,%eax
and    $0x33333333,%eax
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_oneand>:
mov    %edi,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_oneand(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 1, %3
%5 = call i32 @llvm.ctpop.i32(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @test_oneand(i32 %0) {
%2 = and i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
int main(void) {
  unsigned int bitpat_get(unsigned int value, int n, int count);
  unsigned int bits;
  unsigned int value = 0xe1f4;
  int n = 27, count = 3;
  bits = bitpat_get(value, n, count);
  printf("%o\n", bits);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xe1f4,-0xc(%rbp)
movl   $0x1b,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <bitpat_get@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xe1f4,%edi
mov    $0x1b,%esi
mov    $0x3,%edx
call   1030 <bitpat_get@plt>
lea    0xec4(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%o\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 57844, i32* %3
store i32 27, i32* %4
store i32 3, i32* %5
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @bitpat_get(i32 %6, i32 %7, i32 %8)
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%o\0A\00"
define i32 @main() {
%1 = tail call i32 @bitpat_get(i32 57844, i32 27, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_ACE(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_ACE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_ACE>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_ACE() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_ACE() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ popNarray(char *, unsigned int);
void popreal32array_(void *x, unsigned int *n) {
  popNarray((char *)x, (*n * 32));
}


x86 assembly (clang, -O0):
<popreal32array_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
shl    $0x5,%esi
call   1030 <popNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<popreal32array_>:
mov    (%rsi),%esi
shl    $0x5,%esi
jmp    1030 <popNarray@plt>

LLVM IR (-O0):
define void @popreal32array_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = mul i32 %7, 32
%9 = call i32 @popNarray(i8* %5, i32 %8)
ret void
}

LLVM IR (-O2):
define void @popreal32array_(i8* %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = shl i32 %3, 5
%5 = tail call i32 @popNarray(i8* %0, i32 %4)
ret void
}
float FfbCos(float angle) { return 0; }


x86 assembly (clang, -O0):
<FfbCos>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FfbCos>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @FfbCos(float %0) {
%2 = alloca float
store float %0, float* %2
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @FfbCos(float %0) {
ret float 0.000000e+00
}
int f0(int x, unsigned y) { return x < y; }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
xor    %eax,%eax
cmp    %esi,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @f0(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @f0(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int afunc(int x, int y) { return x * y; }


x86 assembly (clang, -O0):
<afunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<afunc>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @afunc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @afunc(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
void eim_iomux_config() {}


x86 assembly (clang, -O0):
<eim_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eim_iomux_config>:
ret

LLVM IR (-O0):
define void @eim_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @eim_iomux_config() {
ret void
}
void gpio5_iomux_config() {}


x86 assembly (clang, -O0):
<gpio5_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio5_iomux_config>:
ret

LLVM IR (-O0):
define void @gpio5_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @gpio5_iomux_config() {
ret void
}
/* Type definitions */
struct winsize {
  int ws_row;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ ued_get_winsize(struct winsize *);
void ued_goto_lastrow(void) {
  struct winsize w;
  ued_get_winsize(&w);
  printf("\033[%d;%dH", w.ws_row, 0);
}


x86 assembly (clang, -O0):
<ued_goto_lastrow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1040 <ued_get_winsize@plt>
mov    -0x8(%rbp),%esi
lea    0xec5(%rip),%rdi
xor    %edx,%edx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ued_goto_lastrow>:
push   %rax
mov    %rsp,%rdi
call   1040 <ued_get_winsize@plt>
mov    (%rsp),%esi
lea    0xecd(%rip),%rdi
xor    %edx,%edx
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.winsize = type { i32 }
@.str = [9 x i8] c"\1B[%d;%dH\00"
define void @ued_goto_lastrow() {
%1 = alloca %struct.winsize
%2 = call i32 @ued_get_winsize(%struct.winsize* %1)
%3 = getelementptr inbounds %struct.winsize, %struct.winsize* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4, i32 0)
ret void
}

LLVM IR (-O2):
%struct.winsize = type { i32 }
@.str = [9 x i8] c"\1B[%d;%dH\00"
define void @ued_goto_lastrow() {
%1 = alloca %struct.winsize
%2 = bitcast %struct.winsize* %1 to i8*
%3 = call i32 @ued_get_winsize(%struct.winsize* %1)
%4 = getelementptr inbounds %struct.winsize, %struct.winsize* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5, i32 0)
ret void
}
void AsicRfTuningExec(void *SystemSpecific1, void *FunctionContext,
                      void *SystemSpecific2, void *SystemSpecific3) {}


x86 assembly (clang, -O0):
<AsicRfTuningExec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AsicRfTuningExec>:
ret

LLVM IR (-O0):
define void @AsicRfTuningExec(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret void
}

LLVM IR (-O2):
define void @AsicRfTuningExec(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
ret void
}
/* Type definitions */
typedef char *ssize_t;

/* Variables and functions */
ssize_t my_write(int fd, const void *buf, size_t size) {
  ssize_t ret;
  __asm__ __volatile__("syscall"
                       : "=a"(ret)
                       : "0"(1), "D"(fd), "S"(buf), "d"(size)
                       : "cc", "rcx", "r11", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<my_write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x1,%eax
syscall
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_write>:
mov    $0x1,%eax
syscall
ret

LLVM IR (-O0):
define i8* @my_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i8* asm sideeffect "syscall", "={ax},0,{di},{si},{dx},~{cc},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 1, i32 %8, i8* %9, i64 %10)
store i8* %11, i8** %7
%12 = load i8*, i8** %7
ret i8* %12
}

LLVM IR (-O2):
define i8* @my_write(i32 %0, i8* %1, i64 %2) {
%4 = tail call i8* asm sideeffect "syscall", "={ax},0,{di},{si},{dx},~{cc},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 1, i32 %0, i8* %1, i64 %2)
ret i8* %4
}
void ptrace_sandbox_permit_fcntl(struct pt_sandbox *p_sandbox) {
  (void)p_sandbox;
}


x86 assembly (clang, -O0):
<ptrace_sandbox_permit_fcntl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_sandbox_permit_fcntl>:
ret

LLVM IR (-O0):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_fcntl(%struct.pt_sandbox* %0) {
%2 = alloca %struct.pt_sandbox*
store %struct.pt_sandbox* %0, %struct.pt_sandbox** %2
%3 = load %struct.pt_sandbox*, %struct.pt_sandbox** %2
ret void
}

LLVM IR (-O2):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_fcntl(%struct.pt_sandbox* nocapture %0) {
ret void
}
int prog_min(int a, int b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<prog_min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <prog_min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <prog_min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prog_min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @prog_min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @prog_min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
char *get_msg();
int /*<<< orphan*/ printf(char *, char *);
void print_greetings(void) { printf("Hello. This is a '%s'\n", get_msg()); }


x86 assembly (clang, -O0):
<print_greetings>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <get_msg@plt>
mov    %rax,%rsi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_greetings>:
push   %rax
xor    %eax,%eax
call   1040 <get_msg@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Hello. This is a '%s'\0A\00"
define void @print_greetings() {
%1 = call i8* (...) @get_msg()
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"Hello. This is a '%s'\0A\00"
define void @print_greetings() {
%1 = tail call i8* (...) @get_msg()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
const char *Foo() { return "*** Word \"%s\" on line %d is not"; }


x86 assembly (clang, -O0):
<Foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Foo>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [32 x i8] c"*** Word \22%s\22 on line %d is not\00"
define i8* @Foo() {
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [32 x i8] c"*** Word \22%s\22 on line %d is not\00"
define i8* @Foo() {
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int strcmp(char const *, char const *);
int save_strcmp(const char *s1, const char *s2) {
  if ((!s1) && (!s2)) {
    return (0);
  }
  if ((!s1) || (!s2)) {
    return (-1);
  }
  return (strcmp(s1, s2));
}


x86 assembly (clang, -O0):
<save_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1142 <save_strcmp+0x32>
cmpq   $0x0,-0x18(%rbp)
jne    1142 <save_strcmp+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1174 <save_strcmp+0x64>
cmpq   $0x0,-0x10(%rbp)
je     1158 <save_strcmp+0x48>
cmpq   $0x0,-0x18(%rbp)
jne    1164 <save_strcmp+0x54>
movl   $0xffffffff,-0x4(%rbp)
jmp    1174 <save_strcmp+0x64>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_strcmp>:
xor    %eax,%eax
mov    %rdi,%rcx
or     %rsi,%rcx
je     112e <save_strcmp+0x1e>
mov    $0xffffffff,%eax
test   %rdi,%rdi
je     112e <save_strcmp+0x1e>
test   %rsi,%rsi
je     112e <save_strcmp+0x1e>
jmp    1030 <strcmp@plt>
ret

LLVM IR (-O0):
define i32 @save_strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %8
store i32 0, i32* %3
br label %23
12: ; preds = %8, %2
%13 = load i8*, i8** %4
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i8*, i8** %5
%17 = icmp ne i8* %16, null
br i1 %17, label %19, label %18
18: ; preds = %15, %12
store i32 -1, i32* %3
br label %23
19: ; preds = %15
%20 = load i8*, i8** %4
%21 = load i8*, i8** %5
%22 = call i32 @strcmp(i8* %20, i8* %21)
store i32 %22, i32* %3
br label %23
23: ; preds = %19, %18, %11
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @save_strcmp(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = or i1 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = and i1 %3, %4
br i1 %7, label %8, label %10
8: ; preds = %6
%9 = tail call i32 @strcmp(i8* %0, i8* %1)
br label %10
10: ; preds = %6, %2, %8
%11 = phi i32 [ %9, %8 ], [ 0, %2 ], [ -1, %6 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) { fprintf(stderr, "Usage: micrond <crondir>\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"Usage: micrond <crondir>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"Usage: micrond <crondir>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}
int main() {
  int i = (5, 6), k;
  1, 2, 3;
  1, (2, 3);
  int ii, j;
  i = 5, j = 6;
  int kk = (i, j);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x6,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
store i32 6, i32* %2
store i32 5, i32* %2
store i32 6, i32* %5
%7 = load i32, i32* %2
%8 = load i32, i32* %5
store i32 %8, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("updatedb only works on Microsoft Windows\n");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [42 x i8] c"updatedb only works on Microsoft Windows\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [41 x i8] c"updatedb only works on Microsoft Windows\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
long O_NONBLOCK;
long fcntl(int, int /*<<< orphan*/, long);
void set_sock_blocking_mode(int sock) {
  long arg = fcntl(sock, F_GETFL, NULL);
  arg &= ~O_NONBLOCK;
  fcntl(sock, F_SETFL, arg);
}


x86 assembly (clang, -O0):
<set_sock_blocking_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <fcntl@plt>
mov    %rax,-0x10(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%rax
xor    $0xffffffffffffffff,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e84(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_sock_blocking_mode>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    0x2ebe(%rip),%rcx
mov    (%rcx),%rdx
not    %rdx
and    %rax,%rdx
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
pop    %rbx
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_GETFL = global i32 0
@O_NONBLOCK = global i64 0
@F_SETFL = global i32 0
define void @set_sock_blocking_mode(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_GETFL
%6 = call i64 @fcntl(i32 %4, i32 %5, i64 0)
store i64 %6, i64* %3
%7 = load i64, i64* @O_NONBLOCK
%8 = xor i64 %7, -1
%9 = load i64, i64* %3
%10 = and i64 %9, %8
store i64 %10, i64* %3
%11 = load i32, i32* %2
%12 = load i32, i32* @F_SETFL
%13 = load i64, i64* %3
%14 = call i64 @fcntl(i32 %11, i32 %12, i64 %13)
ret void
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@O_NONBLOCK = global i64 0
@F_SETFL = global i32 0
define void @set_sock_blocking_mode(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i64 @fcntl(i32 %0, i32 %2, i64 0)
%4 = load i64, i64* @O_NONBLOCK
%5 = xor i64 %4, -1
%6 = and i64 %3, %5
%7 = load i32, i32* @F_SETFL
%8 = tail call i64 @fcntl(i32 %0, i32 %7, i64 %6)
ret void
}
/* Variables and functions */
char *strdup(char const *);
char *get_canonical_hostname(const char *hostname) { return strdup(hostname); }


x86 assembly (clang, -O0):
<get_canonical_hostname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strdup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_canonical_hostname>:
jmp    1030 <strdup@plt>

LLVM IR (-O0):
define i8* @get_canonical_hostname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strdup(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @get_canonical_hostname(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void xxx(void) { printf("xxx\n"); }


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"xxx\0A\00"
define void @xxx() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"xxx\00"
define void @xxx() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct B {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ foo(struct B *);
void bar(struct B *p) { foo(p); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <foo@plt>

LLVM IR (-O0):
%struct.B = type { i32 }
define void @bar(%struct.B* %0) {
%2 = alloca %struct.B*
store %struct.B* %0, %struct.B** %2
%3 = load %struct.B*, %struct.B** %2
%4 = call i32 @foo(%struct.B* %3)
ret void
}

LLVM IR (-O2):
%struct.B = type { i32 }
define void @bar(%struct.B* %0) {
%2 = tail call i32 @foo(%struct.B* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int bar() {
  foo();
  return 1;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = call i32 (...) @foo()
ret i32 1
}

LLVM IR (-O2):
define i32 @bar() {
%1 = tail call i32 (...) @foo()
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMROFFSETWINDOWORG_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 2, torev);
}


x86 assembly (clang, -O0):
<U_WMROFFSETWINDOWORG_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x2,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMROFFSETWINDOWORG_swap>:
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMROFFSETWINDOWORG_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 2, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMROFFSETWINDOWORG_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 2, i32 %1)
ret void
}
void PM_Animate(void) {}


x86 assembly (clang, -O0):
<PM_Animate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PM_Animate>:
ret

LLVM IR (-O0):
define void @PM_Animate() {
ret void
}

LLVM IR (-O2):
define void @PM_Animate() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ barrier();
void putc(int c) {
  while ((*(volatile unsigned int *)0xc11084cc) & (1 << 21)) {
    barrier();
  }
  (*(volatile unsigned int *)0xc11084c4) = c;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xc11084cc,%eax
mov    (%rax),%eax
and    $0x200000,%eax
cmp    $0x0,%eax
je     113c <putc+0x2c>
mov    $0x0,%al
call   1030 <barrier@plt>
jmp    111b <putc+0xb>
mov    -0x4(%rbp),%ecx
mov    $0xc11084c4,%eax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0xc11084cc,%ebx
testl  $0x200000,(%rbx)
je     113f <putc+0x2f>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <barrier@plt>
testl  $0x200000,(%rbx)
jne    1130 <putc+0x20>
mov    %ebp,-0x8(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* inttoptr (i64 3239085260 to i32*)
%5 = and i32 %4, 2097152
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @barrier()
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
store volatile i32 %10, i32* inttoptr (i64 3239085252 to i32*)
ret void
}

LLVM IR (-O2):
define void @putc(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 3239085260 to i32*)
%3 = and i32 %2, 2097152
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %1, %5
%6 = tail call i32 (...) @barrier()
%7 = load volatile i32, i32* inttoptr (i64 3239085260 to i32*)
%8 = and i32 %7, 2097152
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %5
10: ; preds = %5, %1
store volatile i32 %0, i32* inttoptr (i64 3239085252 to i32*)
ret void
}
/* Type definitions */
struct block {
  int dummy;
};

/* Variables and functions */
struct block *gen_uncond(int);
struct block *gen_true() {
  return gen_uncond(1);
}


x86 assembly (clang, -O0):
<gen_true>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <gen_uncond@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_true>:
mov    $0x1,%edi
jmp    1030 <gen_uncond@plt>

LLVM IR (-O0):
%struct.block = type { i32 }
define %struct.block* @gen_true() {
%1 = call %struct.block* @gen_uncond(i32 1)
ret %struct.block* %1
}

LLVM IR (-O2):
%struct.block = type { i32 }
define %struct.block* @gen_true() {
%1 = tail call %struct.block* @gen_uncond(i32 1)
ret %struct.block* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int main() { FILE *fp; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void awesome() { printf("awwwwwww yeaaahhhhh! All awesome, all the time!\n"); }


x86 assembly (clang, -O0):
<awesome>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<awesome>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"awwwwwww yeaaahhhhh! All awesome, all the time!\0A\00"
define void @awesome() {
%1 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [48 x i8] c"awwwwwww yeaaahhhhh! All awesome, all the time!\00"
define void @awesome() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned int _unpkhu4(unsigned int src1) {
  unsigned v0 = src1 >> 24;
  unsigned v1 = (src1 >> 16) & 0xff;
  return (v0 << 16) | v1;
}


x86 assembly (clang, -O0):
<_unpkhu4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x18,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
and    $0xff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_unpkhu4>:
mov    %edi,%eax
shr    $0x10,%eax
movzbl %al,%eax
shr    $0x8,%edi
and    $0xff0000,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @_unpkhu4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = lshr i32 %5, 24
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = lshr i32 %7, 16
%9 = and i32 %8, 255
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = shl i32 %10, 16
%12 = load i32, i32* %4
%13 = or i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @_unpkhu4(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 255
%4 = lshr i32 %0, 8
%5 = and i32 %4, 16711680
%6 = or i32 %5, %3
ret i32 %6
}
void hdd1(void) { return; }


x86 assembly (clang, -O0):
<hdd1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdd1>:
ret

LLVM IR (-O0):
define void @hdd1() {
ret void
}

LLVM IR (-O2):
define void @hdd1() {
ret void
}
void gtk_container_foreach() {}


x86 assembly (clang, -O0):
<gtk_container_foreach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_container_foreach>:
ret

LLVM IR (-O0):
define void @gtk_container_foreach() {
ret void
}

LLVM IR (-O2):
define void @gtk_container_foreach() {
ret void
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_div_ab(struct em8051 *aCPU, int aPosition, char *aBuffer) {
  sprintf(aBuffer, "DIV   AB");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_div_ab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_div_ab>:
movabs $0x4241202020564944,%rax
20 41 42
mov    %rax,(%rdx)
movb   $0x0,0x8(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [9 x i8] c"DIV AB\00"
define i32 @disasm_div_ab(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
@.str = [9 x i8] c"DIV AB\00"
define i32 @disasm_div_ab(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(9) %2, i8* align 1 dereferenceable(9) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 9, i1 false)
ret i32 1
}
/* Variables and functions */
double arctan2(int /*<<< orphan*/, double);
int /*<<< orphan*/ my_sqrt(int);
double arccos(double xnum) {
  return arctan2(my_sqrt((1 + xnum) * (1 - xnum)), xnum);
}


x86 assembly (clang, -O0):
<arccos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xecb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  0xebe(%rip),%xmm1
subsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <my_sqrt@plt>
mov    %eax,%edi
movsd  -0x8(%rbp),%xmm0
call   1040 <arctan2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arccos>:
push   %rax
movsd  %xmm0,(%rsp)
movsd  0xed2(%rip),%xmm2
movapd %xmm0,%xmm1
addsd  %xmm2,%xmm1
subsd  %xmm0,%xmm2
mulsd  %xmm1,%xmm2
cvttsd2si %xmm2,%edi
call   1030 <my_sqrt@plt>
mov    %eax,%edi
movsd  (%rsp),%xmm0
pop    %rax
jmp    1040 <arctan2@plt>

LLVM IR (-O0):
define double @arccos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double 1.000000e+00, %3
%5 = load double, double* %2
%6 = fsub double 1.000000e+00, %5
%7 = fmul double %4, %6
%8 = fptosi double %7 to i32
%9 = call i32 @my_sqrt(i32 %8)
%10 = load double, double* %2
%11 = call double @arctan2(i32 %9, double %10)
ret double %11
}

LLVM IR (-O2):
define double @arccos(double %0) {
%2 = fadd double %0, 1.000000e+00
%3 = fsub double 1.000000e+00, %0
%4 = fmul double %2, %3
%5 = fptosi double %4 to i32
%6 = tail call i32 @my_sqrt(i32 %5)
%7 = tail call double @arctan2(i32 %6, double %0)
ret double %7
}
float dist2(float x1, float y1, float x2, float y2) {
  return (x1 - x2) * (x1 - x2) + (y1 - y2) * (y1 - y2);
}


x86 assembly (clang, -O0):
<dist2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
subss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
subss  -0x10(%rbp),%xmm1
movss  -0x8(%rbp),%xmm3
subss  -0x10(%rbp),%xmm3
mulss  %xmm3,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist2>:
subss  %xmm2,%xmm0
subss  %xmm3,%xmm1
mulss  %xmm1,%xmm1
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @dist2(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %7
%11 = fsub float %9, %10
%12 = load float, float* %5
%13 = load float, float* %7
%14 = fsub float %12, %13
%15 = load float, float* %6
%16 = load float, float* %8
%17 = fsub float %15, %16
%18 = load float, float* %6
%19 = load float, float* %8
%20 = fsub float %18, %19
%21 = fmul float %17, %20
%22 = call float @llvm.fmuladd.f32(float %11, float %14, float %21)
ret float %22
}

LLVM IR (-O2):
define float @dist2(float %0, float %1, float %2, float %3) {
%5 = fsub float %0, %2
%6 = fsub float %1, %3
%7 = fmul float %6, %6
%8 = tail call float @llvm.fmuladd.f32(float %5, float %5, float %7)
ret float %8
}
int d(const char *s1, const char *s2) {
  int c1, c2;
  const char *s = s1;
  const char *t = s2;
  do {
    c1 = *s++;
    c2 = *t++;
    if (c1 == '\0')
      return c1 - c2;
  } while (c1 == c2);
  return c1 - c2;
}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x28(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x30(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    115e <d+0x5e>
mov    -0x1c(%rbp),%eax
sub    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1178 <d+0x78>
jmp    1163 <d+0x63>
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
je     111c <d+0x1c>
mov    -0x1c(%rbp),%eax
sub    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi,%rcx,1),%eax
movzbl (%rsi,%rcx,1),%edx
test   %eax,%eax
je     1124 <d+0x24>
add    $0x1,%rcx
cmp    %dl,%al
je     1110 <d+0x10>
movsbl %dl,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @d(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%10 = load i8*, i8** %4
store i8* %10, i8** %8
%11 = load i8*, i8** %5
store i8* %11, i8** %9
br label %12
12: ; preds = %28, %2
%13 = load i8*, i8** %8
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %8
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
store i32 %16, i32* %6
%17 = load i8*, i8** %9
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %9
%19 = load i8, i8* %17
%20 = sext i8 %19 to i32
store i32 %20, i32* %7
%21 = load i32, i32* %6
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %12
%24 = load i32, i32* %6
%25 = load i32, i32* %7
%26 = sub nsw i32 %24, %25
store i32 %26, i32* %3
br label %36
27: ; preds = %12
br label %28
28: ; preds = %27
%29 = load i32, i32* %6
%30 = load i32, i32* %7
%31 = icmp eq i32 %29, %30
br i1 %31, label %12, label %32
32: ; preds = %28
%33 = load i32, i32* %6
%34 = load i32, i32* %7
%35 = sub nsw i32 %33, %34
store i32 %35, i32* %3
br label %36
36: ; preds = %32, %23
%37 = load i32, i32* %3
ret i32 %37
}

LLVM IR (-O2):
define i32 @d(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = phi i8* [ %1, %2 ], [ %9, %3 ]
%6 = load i8, i8* %4
%7 = load i8, i8* %5
%8 = icmp ne i8 %6, 0
%9 = getelementptr inbounds i8, i8* %5, i64 1
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = icmp eq i8 %6, %7
%12 = select i1 %8, i1 %11, i1 false
br i1 %12, label %3, label %13
13: ; preds = %3
%14 = sext i8 %6 to i32
%15 = sext i8 %7 to i32
%16 = sub nsw i32 %14, %15
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ usleep(int);
int /*<<< orphan*/ write(int, char *, int);
void setKeyerSpeed(int fd, int speed) {
  char cmd[8];
  if (speed < 9 || speed > 50)
    return;
  sprintf(cmd, "KS%03d;", speed);
  write(fd, cmd, 6);
  usleep(100e3);
}


x86 assembly (clang, -O0):
<setKeyerSpeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
jl     1152 <setKeyerSpeed+0x22>
cmpl   $0x32,-0x8(%rbp)
jle    1157 <setKeyerSpeed+0x27>
jmp    1185 <setKeyerSpeed+0x55>
lea    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%edx
lea    0xe9b(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
mov    $0x6,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1050 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setKeyerSpeed>:
mov    %esi,%edx
lea    -0x33(%rdx),%eax
cmp    $0xffffffd6,%eax
jae    113b <setKeyerSpeed+0xb>
ret
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0xeb8(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <sprintf@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x6,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <usleep@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"KS%03d;\00"
define void @setKeyerSpeed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [8 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 9
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 50
br i1 %10, label %11, label %12
11: ; preds = %8, %2
br label %20
12: ; preds = %8
%13 = getelementptr inbounds [8 x i8], [8 x i8]* %5, i64 0, i64 0
%14 = load i32, i32* %4
%15 = call i32 @sprintf(i8* %13, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %14)
%16 = load i32, i32* %3
%17 = getelementptr inbounds [8 x i8], [8 x i8]* %5, i64 0, i64 0
%18 = call i32 @write(i32 %16, i8* %17, i32 6)
%19 = call i32 @usleep(i32 100000)
br label %20
20: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"KS%03d;\00"
define void @setKeyerSpeed(i32 %0, i32 %1) {
%3 = alloca [8 x i8]
%4 = getelementptr inbounds [8 x i8], [8 x i8]* %3, i64 0, i64 0
%5 = add i32 %1, -51
%6 = icmp ult i32 %5, -42
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %1)
%9 = call i32 @write(i32 %0, i8* %4, i32 6)
%10 = tail call i32 @usleep(i32 100000)
br label %11
11: ; preds = %2, %7
ret void
}
void test___atomic_or_fetch_1(short *mem) { __atomic_or_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test___atomic_or_fetch_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
or     %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test___atomic_or_fetch_1+0x5d>
jmp    1125 <test___atomic_or_fetch_1+0x25>
mov    -0x10(%rbp),%cx
mov    -0x1a(%rbp),%ax
or     %cx,%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_or_fetch_1>:
lock orw $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_or_fetch_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw or i16* %5, i16 %6 acq_rel
%8 = or i16 %7, %6
store i16 %8, i16* %4
%9 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_or_fetch_1(i16* nocapture %0) {
%2 = atomicrmw or i16* %0, i16 1 acq_rel
ret void
}
void uart1_iomux_config() {}


x86 assembly (clang, -O0):
<uart1_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart1_iomux_config>:
ret

LLVM IR (-O0):
define void @uart1_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @uart1_iomux_config() {
ret void
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int helper(struct TreeNode *);
bool isBalanced(struct TreeNode *root) { return helper(root) != -1; }


x86 assembly (clang, -O0):
<isBalanced>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <helper@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBalanced>:
push   %rax
call   1030 <helper@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32 @isBalanced(%struct.TreeNode* %0) {
%2 = alloca %struct.TreeNode*
store %struct.TreeNode* %0, %struct.TreeNode** %2
%3 = load %struct.TreeNode*, %struct.TreeNode** %2
%4 = call i32 @helper(%struct.TreeNode* %3)
%5 = icmp ne i32 %4, -1
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32 @isBalanced(%struct.TreeNode* %0) {
%2 = tail call i32 @helper(%struct.TreeNode* %0)
%3 = icmp ne i32 %2, -1
%4 = zext i1 %3 to i32
ret i32 %4
}
double fabs(double x) {}


x86 assembly (clang, -O0):
<fabs>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabs>:
ret

LLVM IR (-O0):
define double @fabs(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %2
ret double %4
}

LLVM IR (-O2):
define double @fabs(double %0) {
ret double undef
}
/* Variables and functions */
int /*<<< orphan*/ floor(double);
double harm(int /*<<< orphan*/);
double e_harm(long n) { return 0.5 * harm(floor((double)n / 2.0)); }


x86 assembly (clang, -O0):
<e_harm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1040 <floor@plt>
mov    %eax,%edi
call   1030 <harm@plt>
movaps %xmm0,%xmm1
movsd  0xeab(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_harm>:
push   %rax
cvtsi2sd %rdi,%xmm0
mulsd  0xed2(%rip),%xmm0
call   1040 <floor@plt>
mov    %eax,%edi
call   1030 <harm@plt>
mulsd  0xebe(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @e_harm(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to double
%5 = fdiv double %4, 2.000000e+00
%6 = call i32 @floor(double %5)
%7 = call double @harm(i32 %6)
%8 = fmul double 5.000000e-01, %7
ret double %8
}

LLVM IR (-O2):
define double @e_harm(i64 %0) {
%2 = sitofp i64 %0 to double
%3 = fmul double %2, 5.000000e-01
%4 = tail call i32 @floor(double %3)
%5 = tail call double @harm(i32 %4)
%6 = fmul double %5, 5.000000e-01
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, unsigned char);
int /*<<< orphan*/ stdout;
void sendbyte(unsigned char byte) {
  printf("%c", byte);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<sendbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xecb(%rip),%rdi
movzbl -0x1(%rbp),%esi
call   1030 <printf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendbyte>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@stdout = global i32 0
define void @sendbyte(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
%5 = load i32, i32* @stdout
%6 = call i32 @fflush(i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
@stdout = global i32 0
define void @sendbyte(i8 zeroext %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 zeroext %0)
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
ret void
}
swap(int *mat, int i, int j) {
  int temp = mat[i];
  mat[i] = mat[j];
  mat[j] = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%edx
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define i32 @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
%13 = load i32, i32* %12
store i32 %13, i32* %8
%14 = load i32*, i32** %5
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %5
%20 = load i32, i32* %6
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
store i32 %18, i32* %22
%23 = load i32, i32* %8
%24 = load i32*, i32** %5
%25 = load i32, i32* %7
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i32, i32* %24, i64 %26
store i32 %23, i32* %27
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret i32 undef
}