#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void EMACIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT((ui32IntFlags &
          ~(0x00004000 | 0x00002000 | 0x00000400 | 0x00000200 | 0x00000100 |
            0x00000080 | 0x00000040 | 0x00000020 | 0x00000010 | 0x00000008 |
            0x00000004 | 0x00000002 | 0x00000001 | 0x00010000 | 0x00008000 |
            0x80000000)) == 0);
  if (ui32IntFlags & (0x00000001 | 0x00000040 | 0x00004000 | 0x00000004)) {
    ui32IntFlags |= 0x00010000;
  }
  if (ui32IntFlags &
      (0x00000002 | 0x00000008 | 0x00000010 | 0x00000020 | 0x00000080 |
       0x00000100 | 0x00000200 | 0x00000400 | 0x00002000)) {
    ui32IntFlags |= 0x00008000;
  }
  if (ui32IntFlags & ~0x80000000) {
    (*((volatile uint32_t *)(ui32Base + 0x00000C1C))) |=
        ui32IntFlags & ~0x80000000;
  }
  if (ui32IntFlags & 0x80000000) {
    (*((volatile uint32_t *)(ui32Base + 0x00000FD4))) |= 0x00000001;
  }
}


x86 assembly (clang, -O0):
<EMACIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7ffe1800,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0x4045,%eax
cmp    $0x0,%eax
je     1152 <EMACIntEnable+0x42>
mov    -0x8(%rbp),%eax
or     $0x10000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x27ba,%eax
cmp    $0x0,%eax
je     116e <EMACIntEnable+0x5e>
mov    -0x8(%rbp),%eax
or     $0x8000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7fffffff,%eax
cmp    $0x0,%eax
je     1198 <EMACIntEnable+0x88>
mov    -0x8(%rbp),%edx
and    $0x7fffffff,%edx
mov    -0x4(%rbp),%eax
add    $0xc1c,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     11ba <EMACIntEnable+0xaa>
mov    -0x4(%rbp),%eax
add    $0xfd4,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACIntEnable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
test   $0x7ffe1800,%esi
sete   %dil
call   1030 <ASSERT@plt>
mov    %ebx,%ecx
or     $0x10000,%ecx
test   $0x4045,%ebx
cmove  %ebx,%ecx
mov    %ecx,%eax
or     $0x8000,%eax
test   $0x27ba,%ecx
cmove  %ecx,%eax
mov    %eax,%edx
movslq %ebp,%rcx
and    $0x7fffffff,%edx
je     115c <EMACIntEnable+0x4c>
or     %edx,0xc1c(%rcx)
test   %eax,%eax
jns    1167 <EMACIntEnable+0x57>
orl    $0x1,0xfd4(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @EMACIntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 2147358720
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
%9 = call i32 @ASSERT(i32 %8)
%10 = load i32, i32* %4
%11 = and i32 %10, 16453
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = load i32, i32* %4
%15 = or i32 %14, 65536
store i32 %15, i32* %4
br label %16
16: ; preds = %13, %2
%17 = load i32, i32* %4
%18 = and i32 %17, 10170
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %16
%21 = load i32, i32* %4
%22 = or i32 %21, 32768
store i32 %22, i32* %4
br label %23
23: ; preds = %20, %16
%24 = load i32, i32* %4
%25 = and i32 %24, 2147483647
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %36
27: ; preds = %23
%28 = load i32, i32* %4
%29 = and i32 %28, 2147483647
%30 = load i32, i32* %3
%31 = add nsw i32 %30, 3100
%32 = sext i32 %31 to i64
%33 = inttoptr i64 %32 to i32*
%34 = load volatile i32, i32* %33
%35 = or i32 %34, %29
store volatile i32 %35, i32* %33
br label %36
36: ; preds = %27, %23
%37 = load i32, i32* %4
%38 = and i32 %37, -2147483648
%39 = icmp ne i32 %38, 0
br i1 %39, label %40, label %47
40: ; preds = %36
%41 = load i32, i32* %3
%42 = add nsw i32 %41, 4052
%43 = sext i32 %42 to i64
%44 = inttoptr i64 %43 to i32*
%45 = load volatile i32, i32* %44
%46 = or i32 %45, 1
store volatile i32 %46, i32* %44
br label %47
47: ; preds = %40, %36
ret void
}

LLVM IR (-O2):
define void @EMACIntEnable(i32 %0, i32 %1) {
%3 = and i32 %1, 2147358720
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = and i32 %1, 16453
%8 = icmp eq i32 %7, 0
%9 = or i32 %1, 65536
%10 = select i1 %8, i32 %1, i32 %9
%11 = and i32 %10, 10170
%12 = icmp eq i32 %11, 0
%13 = or i32 %10, 32768
%14 = select i1 %12, i32 %10, i32 %13
%15 = and i32 %14, 2147483647
%16 = icmp eq i32 %15, 0
br i1 %16, label %23, label %17
17: ; preds = %2
%18 = add nsw i32 %0, 3100
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
%21 = load volatile i32, i32* %20
%22 = or i32 %21, %15
store volatile i32 %22, i32* %20
br label %23
23: ; preds = %17, %2
%24 = icmp sgt i32 %14, -1
br i1 %24, label %31, label %25
25: ; preds = %23
%26 = add nsw i32 %0, 4052
%27 = sext i32 %26 to i64
%28 = inttoptr i64 %27 to i32*
%29 = load volatile i32, i32* %28
%30 = or i32 %29, 1
store volatile i32 %30, i32* %28
br label %31
31: ; preds = %25, %23
ret void
}