xunge/DecIR huggingface dataset:
int I_NoAppServicesCheckForRestart(void) { return 0; }


x86 assembly (clang, -O0):
<I_NoAppServicesCheckForRestart>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_NoAppServicesCheckForRestart>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @I_NoAppServicesCheckForRestart() {
ret i32 0
}

LLVM IR (-O2):
define i32 @I_NoAppServicesCheckForRestart() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
void save_patch_rule(FILE *fr, char *buf) { fputs(buf, fr); }


x86 assembly (clang, -O0):
<save_patch_rule>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_patch_rule>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
define void @save_patch_rule(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32*, i32** %3
%7 = call i32 @fputs(i8* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @save_patch_rule(i32* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @fputs(i8* %1, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void main_main() {
  int res;
  res = (1 == 1) ? 1 : (2 == 2) ? 2 : 3;
  if (res != 1)
    printf("Fail1:%d\n", res);
  else
    printf("OK\n");
}


x86 assembly (clang, -O0):
<main_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     113f <main_main+0x2f>
mov    -0x4(%rbp),%esi
lea    0xecd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    114d <main_main+0x3d>
lea    0xec4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Fail1:%d\0A\00"
@.str.1 = [4 x i8] c"OK\0A\00"
define void @main_main() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
%3 = icmp ne i32 %2, 1
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = load i32, i32* %1
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
br label %9
7: ; preds = %0
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %4
ret void
}

LLVM IR (-O2):
@str = [3 x i8] c"OK\00"
define void @main_main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TCIFLUSH;
int /*<<< orphan*/ printf(char *);
int tcflush(int, int /*<<< orphan*/);
int portflush(int fd) {
  int len = 1, n = 0;
  n = 1;
  while (n != 0) {
    n = tcflush(fd, TCIFLUSH);
  }
  if (n == 0)
    printf("successful buffer flush \n");
  return 1;
}


x86 assembly (clang, -O0):
<portflush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1163 <portflush+0x43>
mov    -0x4(%rbp),%edi
mov    0x2e8c(%rip),%rax
mov    (%rax),%esi
call   1030 <tcflush@plt>
mov    %eax,-0xc(%rbp)
jmp    1140 <portflush+0x20>
cmpl   $0x0,-0xc(%rbp)
jne    1179 <portflush+0x59>
lea    0xe8c(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<portflush>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eb3(%rip),%r14
nopl   (%rax)
mov    (%r14),%esi
mov    %ebx,%edi
call   1040 <tcflush@plt>
test   %eax,%eax
jne    1130 <portflush+0x10>
lea    0xebb(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@TCIFLUSH = global i32 0
@.str = [26 x i8] c"successful buffer flush \0A\00"
define i32 @portflush(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 0, i32* %4
store i32 1, i32* %4
br label %5
5: ; preds = %8, %1
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, i32* %2
%10 = load i32, i32* @TCIFLUSH
%11 = call i32 @tcflush(i32 %9, i32 %10)
store i32 %11, i32* %4
br label %5
12: ; preds = %5
%13 = load i32, i32* %4
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %12
%16 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %12
ret i32 1
}

LLVM IR (-O2):
@TCIFLUSH = global i32 0
@str = [25 x i8] c"successful buffer flush \00"
define i32 @portflush(i32 %0) {
br label %2
2: ; preds = %1, %2
%3 = load i32, i32* @TCIFLUSH
%4 = tail call i32 @tcflush(i32 %0, i32 %3)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int xatoll(char const *);
int xatoi(const char *str) { return xatoll(str); }


x86 assembly (clang, -O0):
<xatoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <xatoll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xatoi>:
jmp    1030 <xatoll@plt>

LLVM IR (-O0):
define i32 @xatoi(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @xatoll(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @xatoi(i8* %0) {
%2 = tail call i32 @xatoll(i8* %0)
ret i32 %2
}
const char *dirname(char *path) { return "error"; }


x86 assembly (clang, -O0):
<dirname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dirname>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"error\00"
define i8* @dirname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"error\00"
define i8* @dirname(i8* nocapture readnone %0) {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct __sk_buff {
  int dummy;
};
typedef int /*<<< orphan*/ ____fmt;

/* Variables and functions */
int TC_H_MAKE(int, int);
int /*<<< orphan*/ trace_printk(char *, int);
__attribute__((section("aaa"), used)) int cls_aaa(struct __sk_buff *skb) {
  ({
    char ____fmt[] = "aaa\n";
    trace_printk(____fmt, sizeof(____fmt));
  });
  return TC_H_MAKE(1, 42);
}


x86 assembly (clang, -O0):
<cls_aaa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xece(%rip),%eax
mov    %eax,-0xd(%rbp)
mov    0xec9(%rip),%al
mov    %al,-0x9(%rbp)
lea    -0xd(%rbp),%rdi
mov    $0x5,%esi
call   1030 <trace_printk@plt>
mov    %eax,-0x14(%rbp)
mov    $0x1,%edi
mov    $0x2a,%esi
call   1040 <TC_H_MAKE@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cls_aaa>:
push   %rax
movb   $0x0,0x4(%rsp)
movl   $0xa616161,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
call   1030 <trace_printk@plt>
mov    $0x1,%edi
mov    $0x2a,%esi
call   1040 <TC_H_MAKE@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.__sk_buff = type { i32 }
@__const.cls_aaa.____fmt = [5 x i8] c"aaa\0A\00"
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.__sk_buff*)* @cls_aaa to i8*)], section "llvm.metadata"
define i32 @cls_aaa(%struct.__sk_buff* %0) section "aaa" {
%2 = alloca %struct.__sk_buff*
%3 = alloca [5 x i8]
%4 = alloca i32
store %struct.__sk_buff* %0, %struct.__sk_buff** %2
%5 = bitcast [5 x i8]* %3 to i8*
%6 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
%7 = call i32 @trace_printk(i8* %6, i32 5)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @TC_H_MAKE(i32 1, i32 42)
ret i32 %9
}

LLVM IR (-O2):
%struct.__sk_buff = type { i32 }
@__const.cls_aaa.____fmt = [5 x i8] c"aaa\0A\00"
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.__sk_buff*)* @cls_aaa to i8*)], section "llvm.metadata"
define i32 @cls_aaa(%struct.__sk_buff* nocapture readnone %0) section "aaa" {
%2 = alloca [5 x i8]
%3 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%4 = call i32 @trace_printk(i8* %3, i32 5)
%5 = call i32 @TC_H_MAKE(i32 1, i32 42)
ret i32 %5
}
unsigned xchg_32(void *ptr, unsigned x) {
  __asm__ __volatile__("xchgl %0,%1"
                       : "=r"(x)
                       : "m"(*(volatile unsigned *)ptr), "0"(x)
                       : "memory");
  return x;
}


x86 assembly (clang, -O0):
<xchg_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
xchg   %eax,(%rcx)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xchg_32>:
mov    %esi,%eax
xchg   %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @xchg_32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
%8 = call i32 asm sideeffect "xchgl $0,$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %6, i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @xchg_32(i8* %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i32 asm sideeffect "xchgl $0,$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %3, i32 %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mibb(void) { printf("Mibb\n"); }


x86 assembly (clang, -O0):
<mibb>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mibb>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"Mibb\0A\00"
define void @mibb() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"Mibb\00"
define void @mibb() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret void
}
int hybris_check_android_shared_mutex(unsigned int mutex_addr) {
  if ((mutex_addr <= 0xFFFF) && (mutex_addr & 0x2000))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<hybris_check_android_shared_mutex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffff,-0x8(%rbp)
ja     1131 <hybris_check_android_shared_mutex+0x31>
mov    -0x8(%rbp),%eax
and    $0x2000,%eax
cmp    $0x0,%eax
je     1131 <hybris_check_android_shared_mutex+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1138 <hybris_check_android_shared_mutex+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hybris_check_android_shared_mutex>:
and    $0xffff2000,%edi
xor    %eax,%eax
cmp    $0x2000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @hybris_check_android_shared_mutex(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ule i32 %4, 65535
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = and i32 %7, 8192
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
store i32 1, i32* %2
br label %12
11: ; preds = %6, %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @hybris_check_android_shared_mutex(i32 %0) {
%2 = and i32 %0, -57344
%3 = icmp eq i32 %2, 8192
%4 = zext i1 %3 to i32
ret i32 %4
}
void LockOSThread(void) {}


x86 assembly (clang, -O0):
<LockOSThread>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LockOSThread>:
ret

LLVM IR (-O0):
define void @LockOSThread() {
ret void
}

LLVM IR (-O2):
define void @LockOSThread() {
ret void
}
/* Variables and functions */
int f234(int *);
int f235(int *p) { return f234(p); }


x86 assembly (clang, -O0):
<f235>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f234@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f235>:
jmp    1030 <f234@plt>

LLVM IR (-O0):
define i32 @f235(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f234(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f235(i32* %0) {
%2 = tail call i32 @f234(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ japi_disable(int);
void j_disable(int arg0) { japi_disable(arg0); }


x86 assembly (clang, -O0):
<j_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_disable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_disable>:
jmp    1030 <japi_disable@plt>

LLVM IR (-O0):
define void @j_disable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_disable(i32 %3)
ret void
}

LLVM IR (-O2):
define void @j_disable(i32 %0) {
%2 = tail call i32 @japi_disable(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) { puts("Hello World!"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ write(int, char *, int);
int main() {
  int fd = open("/dev/hello", O_WRONLY);
  char dt[100] = "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
                 "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb";
  dt[40] = 0;
  dt[60] = 0;
  dt[80] = 0;
  write(fd, dt, 100);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
lea    0xeb8(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x4(%rbp)
lea    -0x70(%rbp),%rdi
mov    $0x62,%esi
mov    $0x64,%edx
call   1040 <memset@plt>
movb   $0x0,-0x48(%rbp)
movb   $0x0,-0x34(%rbp)
movb   $0x0,-0x20(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x70(%rbp),%rsi
mov    $0x64,%edx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x68,%rsp
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1040 <open@plt>
movaps 0xec0(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
movl   $0x62626262,0x60(%rsp)
62
movb   $0x0,0x28(%rsp)
movb   $0x0,0x3c(%rsp)
movb   $0x0,0x50(%rsp)
mov    %rsp,%rsi
mov    %eax,%edi
mov    $0x64,%edx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x68,%rsp
ret

LLVM IR (-O0):
@.str = [11 x i8] c"/dev/hello\00"
@O_WRONLY = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i8]
%3 = load i32, i32* @O_WRONLY
%4 = call i32 @open(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
store i32 %4, i32* %1
%5 = bitcast [100 x i8]* %2 to i8*
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 40
store i8 0, i8* %6
%7 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 60
store i8 0, i8* %7
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 80
store i8 0, i8* %8
%9 = load i32, i32* %1
%10 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%11 = call i32 @write(i32 %9, i8* %10, i32 100)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"/dev/hello\00"
@O_WRONLY = global i32 0
define i32 @main() {
%1 = alloca [100 x i8]
%2 = load i32, i32* @O_WRONLY
%3 = tail call i32 @open(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 40
store i8 0, i8* %5
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 60
store i8 0, i8* %6
%7 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 80
store i8 0, i8* %7
%8 = call i32 @write(i32 %3, i8* %4, i32 100)
ret i32 0
}
/* Variables and functions */
size_t utf8_count(char const *);
size_t tchar_count(char const *in) { return utf8_count(in); }


x86 assembly (clang, -O0):
<tchar_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <utf8_count@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tchar_count>:
jmp    1030 <utf8_count@plt>

LLVM IR (-O0):
define i64 @tchar_count(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @utf8_count(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @tchar_count(i8* %0) {
%2 = tail call i64 @utf8_count(i8* %0)
ret i64 %2
}
/* Variables and functions */
void *thMutex();
void *thFastMutex() { return (thMutex()); }


x86 assembly (clang, -O0):
<thFastMutex>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <thMutex@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<thFastMutex>:
xor    %eax,%eax
jmp    1030 <thMutex@plt>

LLVM IR (-O0):
define i8* @thFastMutex() {
%1 = call i8* (...) @thMutex()
ret i8* %1
}

LLVM IR (-O2):
define i8* @thFastMutex() {
%1 = tail call i8* (...) @thMutex()
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void badusage(void) {
  fprintf(stderr, "Usage: gpaxioms [-ip d/s[dr]] [-op d/s] [-silent] [-v] [-l] "
                  "[-f] [-n]\n");
  fprintf(stderr, "\t\t[-cos] groupname [cosname].\n");
  exit(1);
}


x86 assembly (clang, -O0):
<badusage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xefe(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<badusage>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf08(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [71 x i8] c"Usage: gpaxioms [-ip d/s[dr]] [-op d/s] [-silent] [-v] [-l] [-f] [-n]\0A\00"
@.str.1 = [31 x i8] c"\09\09[-cos] groupname [cosname].\0A\00"
define void @badusage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [71 x i8] c"Usage: gpaxioms [-ip d/s[dr]] [-op d/s] [-silent] [-v] [-l] [-f] [-n]\0A\00"
@.str.1 = [31 x i8] c"\09\09[-cos] groupname [cosname].\0A\00"
define void @badusage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
}
unsigned xchg_32(void *ptr, unsigned x) {
  asm volatile("xchgl %0,%1"
               : "=r"(x)
               : "m"(*(volatile unsigned *)ptr), "0"(x)
               : "memory");
  return x;
}


x86 assembly (clang, -O0):
<xchg_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
xchg   %eax,(%rcx)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xchg_32>:
mov    %esi,%eax
xchg   %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @xchg_32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
%8 = call i32 asm sideeffect "xchgl $0,$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %6, i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @xchg_32(i8* %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i32 asm sideeffect "xchgl $0,$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %3, i32 %1)
ret i32 %4
}
void lshift2w(int distance, int data[]) {
  data[0] <<= distance;
  data[0] |= (data[1] & 0x00FFFFFF) >> (24 - distance);
  data[0] &= 0x00FFFFFF;
  data[1] <<= distance;
  data[1] &= 0x00FFFFFF;
}


x86 assembly (clang, -O0):
<lshift2w>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
shl    %cl,%edx
mov    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
and    $0xffffff,%eax
mov    $0x18,%ecx
sub    -0x4(%rbp),%ecx
sar    %cl,%eax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
and    $0xffffff,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%edx
shl    %cl,%edx
mov    %edx,%ecx
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%ecx
and    $0xffffff,%ecx
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lshift2w>:
mov    %edi,%r8d
mov    (%rsi),%eax
mov    %r8d,%ecx
shl    %cl,%eax
mov    0x4(%rsi),%edi
mov    %edi,%edx
and    $0xffffff,%edx
mov    $0x18,%cl
sub    %r8b,%cl
shr    %cl,%edx
or     %eax,%edx
mov    %r8d,%ecx
shl    %cl,%edi
and    $0xffffff,%edx
mov    %edx,(%rsi)
and    $0xffffff,%edi
mov    %edi,0x4(%rsi)
ret

LLVM IR (-O0):
define void @lshift2w(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = shl i32 %8, %5
store i32 %9, i32* %7
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = and i32 %12, 16777215
%14 = load i32, i32* %3
%15 = sub nsw i32 24, %14
%16 = ashr i32 %13, %15
%17 = load i32*, i32** %4
%18 = getelementptr inbounds i32, i32* %17, i64 0
%19 = load i32, i32* %18
%20 = or i32 %19, %16
store i32 %20, i32* %18
%21 = load i32*, i32** %4
%22 = getelementptr inbounds i32, i32* %21, i64 0
%23 = load i32, i32* %22
%24 = and i32 %23, 16777215
store i32 %24, i32* %22
%25 = load i32, i32* %3
%26 = load i32*, i32** %4
%27 = getelementptr inbounds i32, i32* %26, i64 1
%28 = load i32, i32* %27
%29 = shl i32 %28, %25
store i32 %29, i32* %27
%30 = load i32*, i32** %4
%31 = getelementptr inbounds i32, i32* %30, i64 1
%32 = load i32, i32* %31
%33 = and i32 %32, 16777215
store i32 %33, i32* %31
ret void
}

LLVM IR (-O2):
define void @lshift2w(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = shl i32 %3, %0
%5 = getelementptr inbounds i32, i32* %1, i64 1
%6 = load i32, i32* %5
%7 = and i32 %6, 16777215
%8 = sub nsw i32 24, %0
%9 = lshr i32 %7, %8
%10 = or i32 %9, %4
%11 = and i32 %10, 16777215
store i32 %11, i32* %1
%12 = shl i32 %6, %0
%13 = and i32 %12, 16777215
store i32 %13, i32* %5
ret void
}
/* Variables and functions */
scalar_t__ Log__aspect_switched_on(int);
int /*<<< orphan*/ Log__close();
int /*<<< orphan*/ Memory__free();
int /*<<< orphan*/ Memory__log_statistics();
void Inlib__end(void) {
  if (Log__aspect_switched_on(2))
    Memory__log_statistics();
  Log__close();
  Memory__free();
}


x86 assembly (clang, -O0):
<Inlib__end>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1060 <Log__aspect_switched_on@plt>
cmp    $0x0,%rax
je     115f <Inlib__end+0x1f>
mov    $0x0,%al
call   1030 <Memory__log_statistics@plt>
mov    $0x0,%al
call   1040 <Log__close@plt>
mov    $0x0,%al
call   1050 <Memory__free@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Inlib__end>:
push   %rax
mov    $0x2,%edi
call   1060 <Log__aspect_switched_on@plt>
test   %rax,%rax
je     1157 <Inlib__end+0x17>
xor    %eax,%eax
call   1030 <Memory__log_statistics@plt>
xor    %eax,%eax
call   1040 <Log__close@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <Memory__free@plt>

LLVM IR (-O0):
define void @Inlib__end() {
%1 = call i64 @Log__aspect_switched_on(i32 2)
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @Memory__log_statistics()
br label %5
5: ; preds = %3, %0
%6 = call i32 (...) @Log__close()
%7 = call i32 (...) @Memory__free()
ret void
}

LLVM IR (-O2):
define void @Inlib__end() {
%1 = tail call i64 @Log__aspect_switched_on(i32 2)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @Memory__log_statistics()
br label %5
5: ; preds = %3, %0
%6 = tail call i32 (...) @Log__close()
%7 = tail call i32 (...) @Memory__free()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void utils() { printf("this is utils\n"); }


x86 assembly (clang, -O0):
<utils>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utils>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"this is utils\0A\00"
define void @utils() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"this is utils\00"
define void @utils() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
void m68k_write_memory_16(unsigned int address, unsigned int value) {
  (void)address;
  (void)value;
}


x86 assembly (clang, -O0):
<m68k_write_memory_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_write_memory_16>:
ret

LLVM IR (-O0):
define void @m68k_write_memory_16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @m68k_write_memory_16(i32 %0, i32 %1) {
ret void
}
unsigned pt_flags_to_bin_noC(const unsigned flags) {
  return (flags >> 2 & 3u) * 3 + (flags & 3u);
}


x86 assembly (clang, -O0):
<pt_flags_to_bin_noC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
and    $0x3,%eax
imul   $0x3,%eax,%eax
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pt_flags_to_bin_noC>:
mov    %edi,%eax
shr    $0x2,%eax
and    $0x3,%eax
lea    (%rax,%rax,2),%eax
and    $0x3,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @pt_flags_to_bin_noC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 2
%5 = and i32 %4, 3
%6 = mul i32 %5, 3
%7 = load i32, i32* %2
%8 = and i32 %7, 3
%9 = add i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @pt_flags_to_bin_noC(i32 %0) {
%2 = lshr i32 %0, 2
%3 = and i32 %2, 3
%4 = mul nuw nsw i32 %3, 3
%5 = and i32 %0, 3
%6 = add nuw nsw i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ rtv_DisableFicInterrupt(unsigned int);
int /*<<< orphan*/ rtv_Disable_FIC();
void rtv_CloseFIC(unsigned int nOpenedSubChNum) {
  rtv_Disable_FIC();
  rtv_DisableFicInterrupt(nOpenedSubChNum);
}


x86 assembly (clang, -O0):
<rtv_CloseFIC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <rtv_Disable_FIC@plt>
mov    -0x4(%rbp),%edi
call   1030 <rtv_DisableFicInterrupt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtv_CloseFIC>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <rtv_Disable_FIC@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <rtv_DisableFicInterrupt@plt>

LLVM IR (-O0):
define void @rtv_CloseFIC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rtv_Disable_FIC()
%4 = load i32, i32* %2
%5 = call i32 @rtv_DisableFicInterrupt(i32 %4)
ret void
}

LLVM IR (-O2):
define void @rtv_CloseFIC(i32 %0) {
%2 = tail call i32 (...) @rtv_Disable_FIC()
%3 = tail call i32 @rtv_DisableFicInterrupt(i32 %0)
ret void
}
int _fips_qcrypto_sha_selftest(struct fips_selftest_data *selftest_d) {
  return 0;
}


x86 assembly (clang, -O0):
<_fips_qcrypto_sha_selftest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fips_qcrypto_sha_selftest>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fips_selftest_data = type opaque
define i32 @_fips_qcrypto_sha_selftest(%struct.fips_selftest_data* %0) {
%2 = alloca %struct.fips_selftest_data*
store %struct.fips_selftest_data* %0, %struct.fips_selftest_data** %2
ret i32 0
}

LLVM IR (-O2):
%struct.fips_selftest_data = type opaque
define i32 @_fips_qcrypto_sha_selftest(%struct.fips_selftest_data* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
long strtol(char const *, char **, int);
int str_to_int(const char *str, long int *val) {
  char *end;
  *val = strtol(str, &end, 10);
  if (*str == 0 || *end != 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<str_to_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x20(%rbp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115c <str_to_int+0x4c>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1168 <str_to_int+0x58>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <str_to_int+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_to_int>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsp,%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %rax,(%r14)
cmpb   $0x0,(%rbx)
je     113b <str_to_int+0x2b>
mov    (%rsp),%rax
xor    %ecx,%ecx
cmp    (%rax),%cl
sbb    %eax,%eax
jmp    1140 <str_to_int+0x30>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @str_to_int(i8* %0, i64* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i8*
store i8* %0, i8** %4
store i64* %1, i64** %5
%7 = load i8*, i8** %4
%8 = call i64 @strtol(i8* %7, i8** %6, i32 10)
%9 = load i64*, i64** %5
store i64 %8, i64* %9
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 0
br i1 %13, label %19, label %14
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14, %2
store i32 -1, i32* %3
br label %21
20: ; preds = %14
store i32 0, i32* %3
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @str_to_int(i8* %0, i64* nocapture writeonly %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = call i64 @strtol(i8* %0, i8** %3, i32 10)
store i64 %5, i64* %1
%6 = load i8, i8* %0
%7 = icmp eq i8 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
%12 = sext i1 %11 to i32
br label %13
13: ; preds = %8, %2
%14 = phi i32 [ -1, %2 ], [ %12, %8 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ parallel_clr_ndac(int);
int /*<<< orphan*/ parallel_set_ndac(int);
void parallel_cpu_set_ndac(unsigned char val) {
  if (val) {
    parallel_set_ndac(0x02);
  } else {
    parallel_clr_ndac(~0x02);
  }
}


x86 assembly (clang, -O0):
<parallel_cpu_set_ndac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1147 <parallel_cpu_set_ndac+0x27>
mov    $0x2,%edi
call   1040 <parallel_set_ndac@plt>
jmp    1151 <parallel_cpu_set_ndac+0x31>
mov    $0xfffffffd,%edi
call   1030 <parallel_clr_ndac@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_cpu_set_ndac>:
test   %edi,%edi
je     112e <parallel_cpu_set_ndac+0xe>
mov    $0x2,%edi
jmp    1040 <parallel_set_ndac@plt>
mov    $0xfffffffd,%edi
jmp    1030 <parallel_clr_ndac@plt>

LLVM IR (-O0):
define void @parallel_cpu_set_ndac(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @parallel_set_ndac(i32 2)
br label %9
7: ; preds = %1
%8 = call i32 @parallel_clr_ndac(i32 -3)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @parallel_cpu_set_ndac(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @parallel_set_ndac(i32 2)
br label %7
5: ; preds = %1
%6 = tail call i32 @parallel_clr_ndac(i32 -3)
br label %7
7: ; preds = %5, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void __attribute__((weak))
usr_mlme_sync_loss_ind(uint8_t LossReason, uint16_t PANId,
                       uint8_t LogicalChannel, uint8_t ChannelPage) {
  LossReason = LossReason;
  PANId = PANId;
  LogicalChannel = LogicalChannel;
  ChannelPage = ChannelPage;
}


x86 assembly (clang, -O0):
<usr_mlme_sync_loss_ind>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<usr_mlme_sync_loss_ind>:
ret

LLVM IR (-O0):
define weak void @usr_mlme_sync_loss_ind(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
store i32 %9, i32* %5
%10 = load i32, i32* %6
store i32 %10, i32* %6
%11 = load i32, i32* %7
store i32 %11, i32* %7
%12 = load i32, i32* %8
store i32 %12, i32* %8
ret void
}

LLVM IR (-O2):
define weak void @usr_mlme_sync_loss_ind(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
/* Variables and functions */
scalar_t__ malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
__attribute__((malloc, nonnull(1))) char *lcc_strdup(const char *str) {
  size_t strsize;
  char *ret;
  strsize = strlen(str) + 1;
  ret = (char *)malloc(strsize);
  if (ret != NULL)
    memcpy(ret, str, strsize);
  return (ret);
}


x86 assembly (clang, -O0):
<lcc_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1177 <lcc_strdup+0x47>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcc_strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1161 <lcc_strdup+0x31>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define noalias i8* @lcc_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i64 @malloc(i64 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %4
%12 = load i8*, i8** %4
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %19
14: ; preds = %1
%15 = load i8*, i8** %4
%16 = load i8*, i8** %2
%17 = load i64, i64* %3
%18 = call i32 @memcpy(i8* %15, i8* %16, i64 %17)
br label %19
19: ; preds = %14, %1
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define noalias i8* @lcc_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i64 @malloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i64 %5, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @memcpy(i8* %6, i8* %0, i64 %4)
br label %10
10: ; preds = %8, %1
ret i8* %6
}
int myfunc() { return 42; }


x86 assembly (clang, -O0):
<myfunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myfunc>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @myfunc() {
ret i32 42
}

LLVM IR (-O2):
define i32 @myfunc() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void beep_down(int n) { printf("beep_down(%d)\n", n); }


x86 assembly (clang, -O0):
<beep_down>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beep_down>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"beep_down(%d)\0A\00"
define void @beep_down(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"beep_down(%d)\0A\00"
define void @beep_down(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int *hop(int *elem) { return elem + *(elem); }


x86 assembly (clang, -O0):
<hop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq (%rcx),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hop>:
movslq (%rdi),%rax
lea    (%rdi,%rax,4),%rax
ret

LLVM IR (-O0):
define i32* @hop(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* %3, i64 %6
ret i32* %7
}

LLVM IR (-O2):
define i32* @hop(i32* %0) {
%2 = load i32, i32* %0
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
ret i32* %4
}
int strcmp(const char *d, const char *s) {
  char *s1 = (char *)d, *s2 = (char *)s, c1, c2;
  while ((c1 = *s1++) == (c2 = *s2++) && c1)
    ;
  return c1 - c2;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%al
mov    %al,-0x21(%rbp)
movsbl %al,%ecx
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    (%rax),%al
mov    %al,-0x22(%rbp)
movsbl %al,%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x23(%rbp)
jne    1164 <strcmp+0x64>
movsbl -0x21(%rbp),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x23(%rbp)
mov    -0x23(%rbp),%al
test   $0x1,%al
jne    1174 <strcmp+0x74>
jmp    1179 <strcmp+0x79>
jmp    111c <strcmp+0x1c>
movsbl -0x21(%rbp),%eax
movsbl -0x22(%rbp),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi,%rcx,1),%eax
movzbl (%rsi,%rcx,1),%edx
test   %eax,%eax
je     1124 <strcmp+0x24>
add    $0x1,%rcx
cmp    %dl,%al
je     1110 <strcmp+0x10>
movsbl %dl,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%9 = load i8*, i8** %3
store i8* %9, i8** %5
%10 = load i8*, i8** %4
store i8* %10, i8** %6
br label %11
11: ; preds = %27, %2
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
%14 = load i8, i8* %12
store i8 %14, i8* %7
%15 = sext i8 %14 to i32
%16 = load i8*, i8** %6
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %6
%18 = load i8, i8* %16
store i8 %18, i8* %8
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %15, %19
br i1 %20, label %21, label %25
21: ; preds = %11
%22 = load i8, i8* %7
%23 = sext i8 %22 to i32
%24 = icmp ne i32 %23, 0
br label %25
25: ; preds = %21, %11
%26 = phi i1 [ false, %11 ], [ %24, %21 ]
br i1 %26, label %27, label %28
27: ; preds = %25
br label %11
28: ; preds = %25
%29 = load i8, i8* %7
%30 = sext i8 %29 to i32
%31 = load i8, i8* %8
%32 = sext i8 %31 to i32
%33 = sub nsw i32 %30, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %8, %3 ]
%5 = phi i8* [ %0, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = load i8, i8* %4
%10 = icmp eq i8 %7, %9
%11 = icmp ne i8 %7, 0
%12 = and i1 %11, %10
br i1 %12, label %3, label %13
13: ; preds = %3
%14 = sext i8 %7 to i32
%15 = sext i8 %9 to i32
%16 = sub nsw i32 %14, %15
ret i32 %16
}
/* Variables and functions */
int strlen(char *);
ehMaiscula(char nome[]) {
  for (int i = 0; i < strlen(nome); i++) {
    if (nome[i] >= 'A' && nome[i] <= 'Z') {
      return 1;
    } else {
      return 0;
    }
  }
}


x86 assembly (clang, -O0):
<ehMaiscula>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jge    117c <ehMaiscula+0x6c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x41,%eax
jl     1175 <ehMaiscula+0x65>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x5a,%eax
jg     1175 <ehMaiscula+0x65>
movl   $0x1,-0x4(%rbp)
jmp    117c <ehMaiscula+0x6c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehMaiscula>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    112c <ehMaiscula+0x1c>
mov    (%rbx),%cl
add    $0xbf,%cl
xor    %eax,%eax
cmp    $0x1a,%cl
setb   %al
pop    %rbx
ret
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ehMaiscula(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %28, %1
%6 = load i32, i32* %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %31
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp sge i32 %16, 65
br i1 %17, label %18, label %27
18: ; preds = %10
%19 = load i8*, i8** %3
%20 = load i32, i32* %4
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 90
br i1 %25, label %26, label %27
26: ; preds = %18
store i32 1, i32* %2
br label %31
27: ; preds = %18, %10
store i32 0, i32* %2
br label %31
28: ; No predecessors!
%29 = load i32, i32* %4
%30 = add nsw i32 %29, 1
store i32 %30, i32* %4
br label %5
31: ; preds = %26, %27, %5
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @ehMaiscula(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i8, i8* %0
%6 = add i8 %5, -65
%7 = icmp ult i8 %6, 26
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ undef, %1 ], [ %8, %4 ]
ret i32 %10
}
void NV21ToRGB24Row_SSSE3() {}


x86 assembly (clang, -O0):
<NV21ToRGB24Row_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV21ToRGB24Row_SSSE3>:
ret

LLVM IR (-O0):
define void @NV21ToRGB24Row_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @NV21ToRGB24Row_SSSE3() {
ret void
}
void simEnd(void) { return; }


x86 assembly (clang, -O0):
<simEnd>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simEnd>:
ret

LLVM IR (-O0):
define void @simEnd() {
ret void
}

LLVM IR (-O2):
define void @simEnd() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpgt_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i test_mm_cmpgt_epi32(__m128i A, __m128i B) {
  return _mm_cmpgt_epi32(A, B);
}


x86 assembly (clang, -O0):
<test_mm_cmpgt_epi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpgt_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpgt_epi32>:
jmp    1030 <_mm_cmpgt_epi32@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpgt_epi32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpgt_epi32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpgt_epi32(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpgt_epi32(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int close(int);
int mmp_close(int fd) { return close(fd); }


x86 assembly (clang, -O0):
<mmp_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmp_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @mmp_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mmp_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ gendep__register_write(int, void const *, size_t);
int /*<<< orphan*/ real_write(int, void const *, size_t);
ssize_t __write(int fd, __const void *buf, size_t count) {
  gendep__register_write(fd, buf, count);
  return (real_write(fd, buf, count));
}


x86 assembly (clang, -O0):
<__write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <gendep__register_write@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <real_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__write>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
call   1030 <gendep__register_write@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <real_write@plt>

LLVM IR (-O0):
define i32 @__write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @gendep__register_write(i32 %7, i8* %8, i64 %9)
%11 = load i32, i32* %4
%12 = load i8*, i8** %5
%13 = load i64, i64* %6
%14 = call i32 @real_write(i32 %11, i8* %12, i64 %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @__write(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @gendep__register_write(i32 %0, i8* %1, i64 %2)
%5 = tail call i32 @real_write(i32 %0, i8* %1, i64 %2)
ret i32 %5
}