xunge/DecIR huggingface dataset:
char *getstring(scp, cp)
struct scblk *scp;
char *cp;
{ return checkstr(scp) ? savestr(scp, cp) : (char *)0L; }


x86 assembly (clang, -O0):
<getstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <checkstr@plt>
cmp    $0x0,%eax
je     115e <getstring+0x3e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1040 <savestr@plt>
cltq
mov    %rax,-0x18(%rbp)
jmp    1169 <getstring+0x49>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    1169 <getstring+0x49>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getstring>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %r15d,%r15d
xor    %eax,%eax
call   1030 <checkstr@plt>
test   %eax,%eax
je     1149 <getstring+0x29>
mov    %rbx,%rdi
mov    %r14,%rsi
xor    %eax,%eax
call   1040 <savestr@plt>
movslq %eax,%r15
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.scblk = type opaque
define i8* @getstring(%struct.scblk* %0, i8* %1) {
%3 = alloca %struct.scblk*
%4 = alloca i8*
store %struct.scblk* %0, %struct.scblk** %3
store i8* %1, i8** %4
%5 = load %struct.scblk*, %struct.scblk** %3
%6 = call i32 (%struct.scblk*, ...) bitcast (i32 (...)* @checkstr to i32 (%struct.scblk*, ...)*)(%struct.scblk* %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load %struct.scblk*, %struct.scblk** %3
%10 = load i8*, i8** %4
%11 = call i32 (%struct.scblk*, i8*, ...) bitcast (i32 (...)* @savestr to i32 (%struct.scblk*, i8*, ...)*)(%struct.scblk* %9, i8* %10)
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
br label %15
14: ; preds = %2
br label %15
15: ; preds = %14, %8
%16 = phi i8* [ %13, %8 ], [ null, %14 ]
ret i8* %16
}

LLVM IR (-O2):
%struct.scblk = type opaque
define i8* @getstring(%struct.scblk* %0, i8* %1) {
%3 = tail call i32 (%struct.scblk*, ...) bitcast (i32 (...)* @checkstr to i32 (%struct.scblk*, ...)*)(%struct.scblk* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 (%struct.scblk*, i8*, ...) bitcast (i32 (...)* @savestr to i32 (%struct.scblk*, i8*, ...)*)(%struct.scblk* %0, i8* %1)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
br label %9
9: ; preds = %2, %5
%10 = phi i8* [ %8, %5 ], [ null, %2 ]
ret i8* %10
}
int intel_fbdev_init(struct drm_device *dev) { return 0; }


x86 assembly (clang, -O0):
<intel_fbdev_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_fbdev_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.drm_device = type opaque
define i32 @intel_fbdev_init(%struct.drm_device* %0) {
%2 = alloca %struct.drm_device*
store %struct.drm_device* %0, %struct.drm_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.drm_device = type opaque
define i32 @intel_fbdev_init(%struct.drm_device* nocapture readnone %0) {
ret i32 0
}
int somavet(int v[]) {
  int i, soma = 0;
  for (i = 0; i < 10; i++)
    soma = soma + v[i];
  return soma;
}


x86 assembly (clang, -O0):
<somavet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    113f <somavet+0x3f>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <somavet+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<somavet>:
movdqu 0x8(%rdi),%xmm0
movdqu 0x18(%rdi),%xmm1
paddd  %xmm0,%xmm1
pshufd $0xee,%xmm1,%xmm0
paddd  %xmm1,%xmm0
pshufd $0x55,%xmm0,%xmm1
paddd  %xmm0,%xmm1
movd   %xmm1,%eax
add    0x4(%rdi),%eax
add    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @somavet(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32*, i32** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = add nsw i32 %9, %14
store i32 %15, i32* %4
br label %16
16: ; preds = %8
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @somavet(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = getelementptr inbounds i32, i32* %0, i64 2
%6 = bitcast i32* %5 to <8 x i32>*
%7 = load <8 x i32>, <8 x i32>* %6
%8 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %7)
%9 = add nsw i32 %8, %4
%10 = add nsw i32 %9, %2
ret i32 %10
}
/* Variables and functions */
scalar_t__ config_WITH_CARDREADER();
int config_CARDREADER_PHOENIX(void) { return config_WITH_CARDREADER() ? 1 : 0; }


x86 assembly (clang, -O0):
<config_CARDREADER_PHOENIX>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <config_WITH_CARDREADER@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_CARDREADER_PHOENIX>:
push   %rax
xor    %eax,%eax
call   1030 <config_WITH_CARDREADER@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @config_CARDREADER_PHOENIX() {
%1 = call i64 (...) @config_WITH_CARDREADER()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i64
%4 = select i1 %2, i32 1, i32 0
ret i32 %4
}

LLVM IR (-O2):
define i32 @config_CARDREADER_PHOENIX() {
%1 = tail call i64 (...) @config_WITH_CARDREADER()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x17_setup() {
  char cmd[256];
  sprintf(cmd,
          "iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x17_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x17_setup>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x17_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x17_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
int nearest(float a) {
  int r = (int)(a * 1024.0f);
  r = (r + 512) >> 10;
  return (r);
}


x86 assembly (clang, -O0):
<nearest>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x200,%eax
sar    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nearest>:
mulss  0xef8(%rip),%xmm0
cvttss2si %xmm0,%eax
add    $0x200,%eax
sar    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @nearest(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = load float, float* %2
%5 = fmul float %4, 1.024000e+03
%6 = fptosi float %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 512
%9 = ashr i32 %8, 10
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @nearest(float %0) {
%2 = fmul float %0, 1.024000e+03
%3 = fptosi float %2 to i32
%4 = add nsw i32 %3, 512
%5 = ashr i32 %4, 10
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
int /*<<< orphan*/ memmove(char *, char *, int);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
int test10(void) {
  char tab[10];
  char tab1[10];
  memset(tab, 0, 10);
  memcpy(tab, tab1, 10);
  memmove(tab, tab1, 10);
  return 0;
}


x86 assembly (clang, -O0):
<test10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0xa(%rbp),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <memset@plt>
lea    -0xa(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0xa,%edx
call   1040 <memcpy@plt>
lea    -0xa(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0xa,%edx
call   1050 <memmove@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test10>:
push   %r14
push   %rbx
sub    $0x18,%rsp
lea    0xe(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <memset@plt>
lea    0x4(%rsp),%r14
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0xa,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0xa,%edx
call   1050 <memmove@plt>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @test10() {
%1 = alloca [10 x i8]
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%4 = call i32 @memset(i8* %3, i32 0, i32 10)
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%6 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 10)
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%9 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%10 = call i32 @memmove(i8* %8, i8* %9, i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @test10() {
%1 = alloca [10 x i8]
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%5 = call i32 @memset(i8* %3, i32 0, i32 10)
%6 = call i32 @memcpy(i8* %3, i8* %4, i32 10)
%7 = call i32 @memmove(i8* %3, i8* %4, i32 10)
ret i32 0
}
void dj_free_mod(char mod_num) {}


x86 assembly (clang, -O0):
<dj_free_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dj_free_mod>:
ret

LLVM IR (-O0):
define void @dj_free_mod(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @dj_free_mod(i8 signext %0) {
ret void
}
/* Variables and functions */
long double log2(double);
__attribute__((weak)) long double log2l(long double x) {
  return log2((double)x);
}


x86 assembly (clang, -O0):
<log2l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <log2@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2l>:
fldt   0x8(%rsp)
fstpl  -0x8(%rsp)
movsd  -0x8(%rsp),%xmm0
jmp    1030 <log2@plt>

LLVM IR (-O0):
define weak x86_fp80 @log2l(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fptrunc x86_fp80 %3 to double
%5 = call x86_fp80 @log2(double %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define weak x86_fp80 @log2l(x86_fp80 %0) {
%2 = fptrunc x86_fp80 %0 to double
%3 = tail call x86_fp80 @log2(double %2)
ret x86_fp80 %3
}
double degToRad(const double angleDeg) {
  return (3.141592653589793238462643 * angleDeg / 180.0);
}


x86 assembly (clang, -O0):
<degToRad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<degToRad>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @degToRad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 0x400921FB54442D18, %3
%5 = fdiv double %4, 1.800000e+02
ret double %5
}

LLVM IR (-O2):
define double @degToRad(double %0) {
%2 = fmul double %0, 0x400921FB54442D18
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
void init_assembler(void *block_jumps_table, int block_jumps_number,
                    void *block_riprel_table, int block_riprel_number) {}


x86 assembly (clang, -O0):
<init_assembler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_assembler>:
ret

LLVM IR (-O0):
define void @init_assembler(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @init_assembler(i8* nocapture %0, i32 %1, i8* nocapture %2, i32 %3) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
FILE *open_file_for_writing(char *externalname) {
  FILE *fd;
  fd = fopen(externalname, "w");
  if (fd == NULL) {
    fprintf(stderr, "Cannot open file %s\n", externalname);
    exit(1);
  }
  return fd;
}


x86 assembly (clang, -O0):
<open_file_for_writing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    117e <open_file_for_writing+0x4e>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xe93(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_file_for_writing>:
push   %rbx
mov    %rdi,%rbx
lea    0xec5(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1147 <open_file_for_writing+0x17>
pop    %rbx
ret
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
lea    0xeab(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
@stderr = global i32 0
@.str.1 = [21 x i8] c"Cannot open file %s\0A\00"
define i32* @open_file_for_writing(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = icmp eq i32* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %2
%11 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* %10)
%12 = call i32 @exit(i32 1)
unreachable
13: ; preds = %1
%14 = load i32*, i32** %3
ret i32* %14
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
@stderr = global i32 0
@.str.1 = [21 x i8] c"Cannot open file %s\0A\00"
define noalias i32* @open_file_for_writing(i8* %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret i32* %2
}
void LimitShort(short *a, short min, short max) {
  if (*a < min)
    *a = min;
  if (*a > max)
    *a = max;
}


x86 assembly (clang, -O0):
<LimitShort>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %si,%cx
mov    %rdi,-0x8(%rbp)
mov    %cx,-0xa(%rbp)
mov    %ax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
movswl -0xa(%rbp),%ecx
cmp    %ecx,%eax
jge    1134 <LimitShort+0x34>
mov    -0xa(%rbp),%cx
mov    -0x8(%rbp),%rax
mov    %cx,(%rax)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
movswl -0xc(%rbp),%ecx
cmp    %ecx,%eax
jle    1152 <LimitShort+0x52>
mov    -0xc(%rbp),%cx
mov    -0x8(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LimitShort>:
movzwl (%rdi),%eax
cmp    %si,%ax
cmovl  %esi,%eax
jl     1111 <LimitShort+0x11>
cmp    %dx,%ax
jg     1111 <LimitShort+0x11>
ret
cmp    %dx,%ax
cmovg  %edx,%eax
mov    %ax,(%rdi)
ret

LLVM IR (-O0):
define void @LimitShort(i16* %0, i16 signext %1, i16 signext %2) {
%4 = alloca i16*
%5 = alloca i16
%6 = alloca i16
store i16* %0, i16** %4
store i16 %1, i16* %5
store i16 %2, i16* %6
%7 = load i16*, i16** %4
%8 = load i16, i16* %7
%9 = sext i16 %8 to i32
%10 = load i16, i16* %5
%11 = sext i16 %10 to i32
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = load i16, i16* %5
%15 = load i16*, i16** %4
store i16 %14, i16* %15
br label %16
16: ; preds = %13, %3
%17 = load i16*, i16** %4
%18 = load i16, i16* %17
%19 = sext i16 %18 to i32
%20 = load i16, i16* %6
%21 = sext i16 %20 to i32
%22 = icmp sgt i32 %19, %21
br i1 %22, label %23, label %26
23: ; preds = %16
%24 = load i16, i16* %6
%25 = load i16*, i16** %4
store i16 %24, i16* %25
br label %26
26: ; preds = %23, %16
ret void
}

LLVM IR (-O2):
define void @LimitShort(i16* nocapture %0, i16 signext %1, i16 signext %2) {
%4 = load i16, i16* %0
%5 = icmp slt i16 %4, %1
%6 = select i1 %5, i16 %1, i16 %4
%7 = icmp sgt i16 %6, %2
%8 = or i1 %5, %7
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = select i1 %7, i16 %2, i16 %6
store i16 %10, i16* %0
br label %11
11: ; preds = %3, %9
ret void
}
PHP_METHOD(fnx_request_simple, __clone) {}


x86 assembly (clang, -O0):
<PHP_METHOD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PHP_METHOD>:
ret

LLVM IR (-O0):
define i32 @PHP_METHOD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @PHP_METHOD(i32 %0, i32 %1) {
ret i32 undef
}
int bitGetSize(int nbits) { return (nbits + 7) / 8; }


x86 assembly (clang, -O0):
<bitGetSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x7,%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitGetSize>:
lea    0x7(%rdi),%ecx
lea    0xe(%rdi),%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @bitGetSize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 7
%5 = sdiv i32 %4, 8
ret i32 %5
}

LLVM IR (-O2):
define i32 @bitGetSize(i32 %0) {
%2 = add nsw i32 %0, 7
%3 = sdiv i32 %2, 8
ret i32 %3
}
/* Variables and functions */
unsigned int MurmurHash2(char const *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
unsigned int util_string_hash32(const char *str) {
  return MurmurHash2(str, strlen(str), 0);
}


x86 assembly (clang, -O0):
<util_string_hash32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
xor    %edx,%edx
call   1040 <MurmurHash2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_string_hash32>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
xor    %edx,%edx
pop    %rbx
jmp    1040 <MurmurHash2@plt>

LLVM IR (-O0):
define i32 @util_string_hash32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @MurmurHash2(i8* %3, i32 %5, i32 0)
ret i32 %6
}

LLVM IR (-O2):
define i32 @util_string_hash32(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @MurmurHash2(i8* %0, i32 %2, i32 0)
ret i32 %3
}
int verificaNumero(int numero) {
  if (numero < 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verificaNumero>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <verificaNumero+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1124 <verificaNumero+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificaNumero>:
mov    %edi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @verificaNumero(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @verificaNumero(i32 %0) {
%2 = xor i32 %0, -1
%3 = lshr i32 %2, 31
ret i32 %3
}
void RTVfsParsePathAppend(void) {}


x86 assembly (clang, -O0):
<RTVfsParsePathAppend>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsParsePathAppend>:
ret

LLVM IR (-O0):
define void @RTVfsParsePathAppend() {
ret void
}

LLVM IR (-O2):
define void @RTVfsParsePathAppend() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bit_hl(int);
void opcb_76() { bit_hl(6); }


x86 assembly (clang, -O0):
<opcb_76>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <bit_hl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcb_76>:
mov    $0x6,%edi
jmp    1030 <bit_hl@plt>

LLVM IR (-O0):
define void @opcb_76() {
%1 = call i32 @bit_hl(i32 6)
ret void
}

LLVM IR (-O2):
define void @opcb_76() {
%1 = tail call i32 @bit_hl(i32 6)
ret void
}
/* Variables and functions */
scalar_t__ is_snb(unsigned int, unsigned int);
double discover_bclk(unsigned int family, unsigned int model) {
  if (is_snb(family, model))
    return 100.00;
  else
    return 133.33;
}


x86 assembly (clang, -O0):
<discover_bclk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <is_snb@plt>
cmp    $0x0,%rax
je     1145 <discover_bclk+0x35>
movsd  0xecd(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1152 <discover_bclk+0x42>
movsd  0xeb3(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<discover_bclk>:
push   %rax
call   1030 <is_snb@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
lea    0xedb(%rip),%rax
movsd  (%rax,%rcx,8),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @discover_bclk(i32 %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i64 @is_snb(i32 %6, i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store double 1.000000e+02, double* %3
br label %12
11: ; preds = %2
store double 1.333300e+02, double* %3
br label %12
12: ; preds = %11, %10
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
define double @discover_bclk(i32 %0, i32 %1) {
%3 = tail call i64 @is_snb(i32 %0, i32 %1)
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, double 1.333300e+02, double 1.000000e+02
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
int main() {
  printf("hello");
  system("pause");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
lea    0xec4(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed2(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [6 x i8] c"pause\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@.str.1 = [6 x i8] c"pause\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ detachInterrupt(int);
int /*<<< orphan*/ ino(int);
void detachInterruptX(int x, int ir) {
  ino(x);
  detachInterrupt(ir);
  return;
}


x86 assembly (clang, -O0):
<detachInterruptX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ino@plt>
mov    -0x8(%rbp),%edi
call   1040 <detachInterrupt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<detachInterruptX>:
push   %rbx
mov    %esi,%ebx
call   1030 <ino@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <detachInterrupt@plt>

LLVM IR (-O0):
define void @detachInterruptX(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @ino(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @detachInterrupt(i32 %7)
ret void
}

LLVM IR (-O2):
define void @detachInterruptX(i32 %0, i32 %1) {
%3 = tail call i32 @ino(i32 %0)
%4 = tail call i32 @detachInterrupt(i32 %1)
ret void
}
/* Variables and functions */
int nvidia_mcp_gpio_set(int, int);
int nvidia_mcp_gpio8_raise(void) { return nvidia_mcp_gpio_set(0x08, 1); }


x86 assembly (clang, -O0):
<nvidia_mcp_gpio8_raise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
mov    $0x1,%esi
call   1030 <nvidia_mcp_gpio_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvidia_mcp_gpio8_raise>:
mov    $0x8,%edi
mov    $0x1,%esi
jmp    1030 <nvidia_mcp_gpio_set@plt>

LLVM IR (-O0):
define i32 @nvidia_mcp_gpio8_raise() {
%1 = call i32 @nvidia_mcp_gpio_set(i32 8, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @nvidia_mcp_gpio8_raise() {
%1 = tail call i32 @nvidia_mcp_gpio_set(i32 8, i32 1)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ printf(char *);
void test_lockfile() {
  printf("unimplemented test\n");
  abort();
}


x86 assembly (clang, -O0):
<test_lockfile>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<test_lockfile>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"unimplemented test\0A\00"
define void @test_lockfile() {
%1 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@str = [19 x i8] c"unimplemented test\00"
define void @test_lockfile() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
struct GifFileType {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ErrorGIFNotAvailable();
void GIFDisplayError(const struct GifFileType *const gif, int gif_error) {
  (void)gif;
  (void)gif_error;
  ErrorGIFNotAvailable();
}


x86 assembly (clang, -O0):
<GIFDisplayError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <ErrorGIFNotAvailable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GIFDisplayError>:
xor    %eax,%eax
jmp    1030 <ErrorGIFNotAvailable@plt>

LLVM IR (-O0):
%struct.GifFileType = type { i32 }
define void @GIFDisplayError(%struct.GifFileType* %0, i32 %1) {
%3 = alloca %struct.GifFileType*
%4 = alloca i32
store %struct.GifFileType* %0, %struct.GifFileType** %3
store i32 %1, i32* %4
%5 = load %struct.GifFileType*, %struct.GifFileType** %3
%6 = load i32, i32* %4
%7 = call i32 (...) @ErrorGIFNotAvailable()
ret void
}

LLVM IR (-O2):
%struct.GifFileType = type { i32 }
define void @GIFDisplayError(%struct.GifFileType* nocapture readnone %0, i32 %1) {
%3 = tail call i32 (...) @ErrorGIFNotAvailable()
ret void
}
/* Variables and functions */
scalar_t__ __infer_nondet_int();
int /*<<< orphan*/ exit(int);
void exit_at_end_of_if_good() {
  if (__infer_nondet_int()) {
    exit(4);
  }
}


x86 assembly (clang, -O0):
<exit_at_end_of_if_good>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
cmp    $0x0,%rax
je     113f <exit_at_end_of_if_good+0x1f>
mov    $0x4,%edi
call   1040 <exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_at_end_of_if_good>:
push   %rax
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
test   %rax,%rax
jne    112f <exit_at_end_of_if_good+0xf>
pop    %rax
ret
mov    $0x4,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @exit_at_end_of_if_good() {
%1 = call i64 (...) @__infer_nondet_int()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 @exit(i32 4)
unreachable
5: ; preds = %0
ret void
}

LLVM IR (-O2):
define void @exit_at_end_of_if_good() {
%1 = tail call i64 (...) @__infer_nondet_int()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @exit(i32 4)
unreachable
5: ; preds = %0
ret void
}
int NOP(void) { return 1; }


x86 assembly (clang, -O0):
<NOP>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOP>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @NOP() {
ret i32 1
}

LLVM IR (-O2):
define i32 @NOP() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ statusbar(char *);
void print_numlock_warning(void) {
  static int didmsg = 0;
  if (!didmsg) {
    statusbar(
        ("NumLock glitch detected.  Keypad will malfunction with NumLock off"));
    didmsg = 1;
  }
}


x86 assembly (clang, -O0):
<print_numlock_warning>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f11(%rip)
jne    1137 <print_numlock_warning+0x27>
lea    0xed8(%rip),%rdi
call   1030 <statusbar@plt>
movl   $0x1,0x2ef5(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_numlock_warning>:
push   %rax
cmpb   $0x0,0x2f14(%rip)
jne    112d <print_numlock_warning+0x1d>
lea    0xedf(%rip),%rdi
call   1030 <statusbar@plt>
movb   $0x1,0x2eff(%rip)
pop    %rax
ret

LLVM IR (-O0):
@print_numlock_warning.didmsg = internal global i32 0
@.str = [67 x i8] c"NumLock glitch detected. Keypad will malfunction with NumLock off\00"
define void @print_numlock_warning() {
%1 = load i32, i32* @print_numlock_warning.didmsg
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 @statusbar(i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* @print_numlock_warning.didmsg
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@print_numlock_warning.didmsg = internal unnamed_addr global i1 false
@.str = [67 x i8] c"NumLock glitch detected. Keypad will malfunction with NumLock off\00"
define void @print_numlock_warning() {
%1 = load i1, i1* @print_numlock_warning.didmsg
br i1 %1, label %4, label %2
2: ; preds = %0
%3 = tail call i32 @statusbar(i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0))
store i1 true, i1* @print_numlock_warning.didmsg
br label %4
4: ; preds = %2, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ ispunct(int);
void t_ispunct_0x24() {
  Assert_real((ispunct(36)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              185, ("ispunct should be 1 for $"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x24>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24,%edi
call   1030 <ispunct@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xb9,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x24>:
push   %rax
mov    $0x24,%edi
call   1030 <ispunct@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0xb9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 1 for $\00"
define void @t_ispunct_0x24() {
%1 = call i32 @ispunct(i32 36)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 1 for $\00"
define void @t_ispunct_0x24() {
%1 = tail call i32 @ispunct(i32 36)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hasarg(char const *);
int /*<<< orphan*/ oopsx(char *);
void needarg(const char *buf) {
  if (!hasarg(buf))
    oopsx("needarg");
}


x86 assembly (clang, -O0):
<needarg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <hasarg@plt>
cmp    $0x0,%eax
jne    114a <needarg+0x2a>
lea    0xebb(%rip),%rdi
call   1030 <oopsx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<needarg>:
push   %rax
call   1040 <hasarg@plt>
test   %eax,%eax
je     112c <needarg+0xc>
pop    %rax
ret
lea    0xecd(%rip),%rdi
pop    %rax
jmp    1030 <oopsx@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"needarg\00"
define void @needarg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @hasarg(i8* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @oopsx(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"needarg\00"
define void @needarg(i8* %0) {
%2 = tail call i32 @hasarg(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @oopsx(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
void set_pmu_sleep_clk_fastest() {}


x86 assembly (clang, -O0):
<set_pmu_sleep_clk_fastest>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pmu_sleep_clk_fastest>:
ret

LLVM IR (-O0):
define void @set_pmu_sleep_clk_fastest() {
ret void
}

LLVM IR (-O2):
define void @set_pmu_sleep_clk_fastest() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void wait(int time) {
  int ct = 0;
  int i = 0;
  while (ct < time) {
    i = 0;
    while (i++ < 100000)
      ;
    {
      ct++;
      printf("killing process in %d time...\n", time - ct);
    }
  }
}


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1177 <wait+0x67>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x186a0,%eax
jge    1157 <wait+0x47>
jmp    113c <wait+0x2c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%esi
sub    -0x8(%rbp),%esi
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
jmp    1129 <wait+0x19>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    113f <wait+0x2f>
mov    %edi,%ebx
add    $0xffffffff,%ebx
lea    0xedc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
jb     1130 <wait+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [31 x i8] c"killing process in %d time...\0A\00"
define void @wait(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %22
9: ; preds = %5
store i32 0, i32* %4
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
%13 = icmp slt i32 %11, 100000
br i1 %13, label %14, label %15
14: ; preds = %10
br label %10
15: ; preds = %10
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
%18 = load i32, i32* %2
%19 = load i32, i32* %3
%20 = sub nsw i32 %18, %19
%21 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %20)
br label %5
22: ; preds = %5
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"killing process in %d time...\0A\00"
define void @wait(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ 0, %1 ]
%5 = add nuw nsw i32 %4, 1
%6 = sub nsw i32 %0, %5
%7 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = icmp eq i32 %5, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
/* Type definitions */
struct cpufreq_available_frequencies {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
cpufreq_put_available_frequencies(struct cpufreq_available_frequencies *);
void cpufreq_put_boost_frequencies(struct cpufreq_available_frequencies *any) {
  cpufreq_put_available_frequencies(any);
}


x86 assembly (clang, -O0):
<cpufreq_put_boost_frequencies>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cpufreq_put_available_frequencies@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_put_boost_frequencies>:
jmp    1030 <cpufreq_put_available_frequencies@plt>

LLVM IR (-O0):
%struct.cpufreq_available_frequencies = type { i32 }
define void @cpufreq_put_boost_frequencies(%struct.cpufreq_available_frequencies* %0) {
%2 = alloca %struct.cpufreq_available_frequencies*
store %struct.cpufreq_available_frequencies* %0, %struct.cpufreq_available_frequencies** %2
%3 = load %struct.cpufreq_available_frequencies*, %struct.cpufreq_available_frequencies** %2
%4 = call i32 @cpufreq_put_available_frequencies(%struct.cpufreq_available_frequencies* %3)
ret void
}

LLVM IR (-O2):
%struct.cpufreq_available_frequencies = type { i32 }
define void @cpufreq_put_boost_frequencies(%struct.cpufreq_available_frequencies* %0) {
%2 = tail call i32 @cpufreq_put_available_frequencies(%struct.cpufreq_available_frequencies* %0)
ret void
}
void nand_ready() {
  while ((*((volatile unsigned long *)0x70200028) & 0x1) == 0)
    ;
}


x86 assembly (clang, -O0):
<nand_ready>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <nand_ready+0x9>
mov    $0x70200028,%eax
mov    (%rax),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    1124 <nand_ready+0x24>
jmp    1109 <nand_ready+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_ready>:
testq  $0x1,0x70200028
je     1100 <nand_ready>
ret

LLVM IR (-O0):
define void @nand_ready() {
br label %1
1: ; preds = %5, %0
%2 = load volatile i64, i64* inttoptr (i64 1881145384 to i64*)
%3 = and i64 %2, 1
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @nand_ready() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i64, i64* inttoptr (i64 1881145384 to i64*)
%3 = and i64 %2, 1
%4 = icmp eq i64 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
ret void
}
int c(int a, float b) { return 0; }


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %3
store float %1, float* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @c(i32 %0, float %1) {
ret i32 0
}
int bar(int foo) { return (int)(((unsigned long long)(long long)foo) / 8); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shr    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %edi,%eax
sar    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = udiv i64 %4, 8
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = ashr i32 %0, 3
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Write(int, int /*<<< orphan*/ *, long, long,
                         int /*<<< orphan*/, int /*<<< orphan*/);
void send_wind(long a, long b) { Write(30, NULL, a, b, 0, 0); }


x86 assembly (clang, -O0):
<send_wind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x1e,%edi
xor    %eax,%eax
mov    %eax,%esi
xor    %r9d,%r9d
mov    %r9d,%r8d
call   1030 <Write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_wind>:
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    $0x1e,%edi
xor    %esi,%esi
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <Write@plt>

LLVM IR (-O0):
define void @send_wind(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @Write(i32 30, i32* null, i64 %5, i64 %6, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @send_wind(i64 %0, i64 %1) {
%3 = tail call i32 @Write(i32 30, i32* null, i64 %0, i64 %1, i32 0, i32 0)
ret void
}
/* Variables and functions */
int rand();
int m_n_rand(int m, int n) {
  if (n < m) {
    int tmp_s_w_a_p_h_ = (int)(m);
    (m) = (int)(n);
    (n) = tmp_s_w_a_p_h_;
  };
  return m + rand() % (n - m + 1);
}


x86 assembly (clang, -O0):
<m_n_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    113c <m_n_rand+0x2c>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
add    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_n_rand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
cmp    %edi,%esi
mov    %esi,%ebp
cmovl  %edi,%ebp
cmovl  %esi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebx,%ebp
add    $0x1,%ebp
cltd
idiv   %ebp
add    %edx,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @m_n_rand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
store i32 %10, i32* %5
%11 = load i32, i32* %4
store i32 %11, i32* %3
%12 = load i32, i32* %5
store i32 %12, i32* %4
br label %13
13: ; preds = %9, %2
%14 = load i32, i32* %3
%15 = call i32 (...) @rand()
%16 = load i32, i32* %4
%17 = load i32, i32* %3
%18 = sub nsw i32 %16, %17
%19 = add nsw i32 %18, 1
%20 = srem i32 %15, %19
%21 = add nsw i32 %14, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @m_n_rand(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, %0
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = tail call i32 (...) @rand()
%7 = sub i32 1, %5
%8 = add i32 %7, %4
%9 = srem i32 %6, %8
%10 = add nsw i32 %9, %5
ret i32 %10
}
/* Variables and functions */
unsigned char GET32(int);
unsigned char uart_getc() {
  while (1) {
    if (GET32(0x3F215054) & 0x01)
      break;
  }
  return GET32(0x3F215040);
}


x86 assembly (clang, -O0):
<uart_getc>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <uart_getc+0x9>
mov    $0x3f215054,%edi
call   1030 <GET32@plt>
movzbl %al,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1137 <uart_getc+0x27>
jmp    113c <uart_getc+0x2c>
jmp    1119 <uart_getc+0x9>
mov    $0x3f215040,%edi
call   1030 <GET32@plt>
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_getc>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x3f215054,%edi
call   1030 <GET32@plt>
test   $0x1,%al
je     1120 <uart_getc+0x10>
mov    $0x3f215040,%edi
pop    %rax
jmp    1030 <GET32@plt>

LLVM IR (-O0):
define zeroext i8 @uart_getc() {
br label %1
1: ; preds = %0, %7
%2 = call zeroext i8 @GET32(i32 1059147860)
%3 = zext i8 %2 to i32
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %8
7: ; preds = %1
br label %1
8: ; preds = %6
%9 = call zeroext i8 @GET32(i32 1059147840)
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @uart_getc() {
br label %1
1: ; preds = %1, %0
%2 = tail call zeroext i8 @GET32(i32 1059147860)
%3 = and i8 %2, 1
%4 = icmp eq i8 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = tail call zeroext i8 @GET32(i32 1059147840)
ret i8 %6
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t stringEqual(char *string1, char *string2) {
  while (*string1 > 0) {
    if (*string1 != *string2)
      return 0;
    string1++;
    string2++;
  }
  return 1;
}


x86 assembly (clang, -O0):
<stringEqual>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jle    115b <stringEqual+0x5b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     113e <stringEqual+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    1162 <stringEqual+0x62>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    110c <stringEqual+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringEqual>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
jle    1122 <stringEqual+0x22>
xor    %edx,%edx
nopl   (%rax)
cmp    (%rsi,%rdx,1),%cl
jne    1123 <stringEqual+0x23>
movzbl 0x1(%rdi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jg     1110 <stringEqual+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stringEqual(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %25
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8*, i8** %5
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %14, %17
br i1 %18, label %19, label %20
19: ; preds = %11
store i32 0, i32* %3
br label %26
20: ; preds = %11
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
br label %6
25: ; preds = %6
store i32 1, i32* %3
br label %26
26: ; preds = %25, %19
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @stringEqual(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp sgt i8 %3, 0
br i1 %4, label %5, label %16
5: ; preds = %2, %11
%6 = phi i8 [ %14, %11 ], [ %3, %2 ]
%7 = phi i8* [ %13, %11 ], [ %1, %2 ]
%8 = phi i8* [ %12, %11 ], [ %0, %2 ]
%9 = load i8, i8* %7
%10 = icmp eq i8 %6, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = load i8, i8* %12
%15 = icmp sgt i8 %14, 0
br i1 %15, label %5, label %16
16: ; preds = %5, %11, %2
%17 = phi i32 [ 1, %2 ], [ 1, %11 ], [ 0, %5 ]
ret i32 %17
}