double SIM_power_dataoutput_delay(C, B, A, Ndbl, Nspd, Ndwl, inrisetime,
                                  outrisetime)
int C, B, A, Ndbl, Nspd, Ndwl;
double *outrisetime, inrisetime;
{
  double Ceq, Rwire, Rline;
  double aspectRatio;
  double ramBlocks;
  double tf;
  double nordel, outdel, nextinputtime;
  double hstack, vstack;
  aspectRatio = (2.0 * C) / (8.0 * B * B * A * A * Ndbl * Ndbl * Nspd * Nspd);
  hstack = (aspectRatio > 1.0) ? aspectRatio : 1.0 / aspectRatio;
  ramBlocks = Ndwl * Ndbl;
  hstack = hstack * sqrt(ramBlocks / hstack);
  vstack = ramBlocks / hstack;
  Ceq = 2 * SIM_power_draincap((6.0 * 0.0875), 1, 1) +
        SIM_power_draincap((40.0 * 0.0875), 0, 2) +
        SIM_power_gatecap((48.0 * 0.0875), 10.0);
  tf = Ceq * SIM_power_transreson((40.0 * 0.0875), 0, 2);
  nordel =
      SIM_power_horowitz(inrisetime, tf, (4.310000e-01), (4.250000e-01), 0);
  nextinputtime = nordel / ((4.250000e-01));
  Ceq = (SIM_power_draincap((48.0 * 0.0875), 1, 1) +
         SIM_power_draincap((80.0 * 0.0875), 0, 1)) *
            ((8 * B * A) / (64)) +
        (1.8e-15 * ((172.2157) * (0.0875 * 0.0875))) *
            (8 * B * A * Nspd * (vstack)) +
        (0.5e-12 * 0.0875);
  Rwire = (0.080 * ((160.0000) * (0.0875 * 0.0875))) *
          (8 * B * A * Nspd * (vstack)) / 2;
  tf = Ceq * (SIM_power_transreson((80.0 * 0.0875), 0, 1) + Rwire);
  outdel = SIM_power_horowitz(nextinputtime, tf, (4.250000e-01), 0.5, 1);
  *outrisetime = outdel / 0.5;
  return (outdel + nordel);
}


x86 assembly (clang, -O0):
<SIM_power_dataoutput_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0xb0,%rsp
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xe8b(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsi2sdl -0x8(%rbp),%xmm2
movsd  0xe72(%rip),%xmm1
mulsd  %xmm2,%xmm1
cvtsi2sdl -0x8(%rbp),%xmm2
mulsd  %xmm2,%xmm1
cvtsi2sdl -0xc(%rbp),%xmm2
mulsd  %xmm2,%xmm1
cvtsi2sdl -0xc(%rbp),%xmm2
mulsd  %xmm2,%xmm1
cvtsi2sdl -0x10(%rbp),%xmm2
mulsd  %xmm2,%xmm1
cvtsi2sdl -0x10(%rbp),%xmm2
mulsd  %xmm2,%xmm1
cvtsi2sdl -0x14(%rbp),%xmm2
mulsd  %xmm2,%xmm1
cvtsi2sdl -0x14(%rbp),%xmm2
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  -0x40(%rbp),%xmm0
movsd  0xe11(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1208 <SIM_power_dataoutput_delay+0xb8>
movsd  -0x40(%rbp),%xmm0
movsd  %xmm0,-0x80(%rbp)
jmp    121a <SIM_power_dataoutput_delay+0xca>
movsd  0xdf0(%rip),%xmm0
divsd  -0x40(%rbp),%xmm0
movsd  %xmm0,-0x80(%rbp)
movsd  -0x80(%rbp),%xmm0
movsd  %xmm0,-0x70(%rbp)
mov    -0x18(%rbp),%eax
imul   -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x48(%rbp)
movsd  -0x70(%rbp),%xmm0
movsd  %xmm0,-0xa8(%rbp)
ff
movsd  -0x48(%rbp),%xmm0
divsd  -0x70(%rbp),%xmm0
call   1070 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0xa8(%rbp),%xmm0
ff
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x70(%rbp)
movsd  -0x48(%rbp),%xmm0
divsd  -0x70(%rbp),%xmm0
movsd  %xmm0,-0x78(%rbp)
movsd  0xded(%rip),%xmm0
mov    $0x1,%esi
mov    %esi,%edi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
shl    $0x1,%eax
mov    %eax,-0xa0(%rbp)
movsd  0xdbe(%rip),%xmm0
xor    %edi,%edi
mov    $0x2,%esi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
mov    %eax,%ecx
mov    -0xa0(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x9c(%rbp)
movsd  0xd88(%rip),%xmm0
movsd  0xd98(%rip),%xmm1
mov    $0x2,%al
call   1060 <SIM_power_gatecap@plt>
mov    %eax,%ecx
mov    -0x9c(%rbp),%eax
add    %ecx,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x98(%rbp)
ff
movsd  0xd61(%rip),%xmm0
xor    %edi,%edi
mov    $0x2,%esi
mov    $0x1,%al
call   1030 <SIM_power_transreson@plt>
movsd  -0x98(%rbp),%xmm0
ff
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x50(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  -0x50(%rbp),%xmm1
movsd  0xd24(%rip),%xmm2
movsd  0xcec(%rip),%xmm3
xor    %edi,%edi
mov    $0x4,%al
call   1050 <SIM_power_horowitz@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x58(%rbp)
movsd  -0x58(%rbp),%xmm0
movsd  0xccd(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x68(%rbp)
movsd  0xce4(%rip),%xmm0
mov    $0x1,%esi
mov    %esi,%edi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
mov    %eax,-0x90(%rbp)
movsd  0xca8(%rip),%xmm0
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
mov    %eax,%ecx
mov    -0x90(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8c(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
imul   -0xc(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8c(%rbp),%eax
imul   %ecx,%eax
cvtsi2sd %eax,%xmm1
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
imul   -0xc(%rbp),%eax
imul   -0x14(%rbp),%eax
cvtsi2sd %eax,%xmm0
mulsd  -0x78(%rbp),%xmm0
movsd  0xc62(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xc4a(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
imul   -0xc(%rbp),%eax
imul   -0x14(%rbp),%eax
cvtsi2sd %eax,%xmm1
mulsd  -0x78(%rbp),%xmm1
movsd  0xc1a(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xbee(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x88(%rbp)
ff
movsd  0xbe8(%rip),%xmm0
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x1,%al
call   1030 <SIM_power_transreson@plt>
movsd  -0x88(%rbp),%xmm0
ff
cvtsi2sd %eax,%xmm1
addsd  -0x30(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x50(%rbp)
movsd  -0x68(%rbp),%xmm0
movsd  -0x50(%rbp),%xmm1
movsd  0xba6(%rip),%xmm2
movsd  0xb96(%rip),%xmm3
mov    $0x1,%edi
mov    $0x4,%al
call   1050 <SIM_power_horowitz@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x60(%rbp)
movsd  -0x60(%rbp),%xmm0
movsd  0xb74(%rip),%xmm1
divsd  %xmm1,%xmm0
mov    0x10(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x60(%rbp),%xmm0
addsd  -0x58(%rbp),%xmm0
add    $0xb0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIM_power_dataoutput_delay>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x20,%rsp
movsd  %xmm0,0x10(%rsp)
mov    %r8d,%r14d
mov    %edx,%r15d
mov    %esi,%ebx
cvtsi2sd %edi,%xmm2
xorps  %xmm0,%xmm0
cvtsi2sd %esi,%xmm0
addsd  %xmm2,%xmm2
movsd  0xe7f(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsi2sd %ecx,%xmm0
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsi2sd %r8d,%xmm0
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
divsd  %xmm1,%xmm2
ucomisd 0xe45(%rip),%xmm2
ja     11d5 <SIM_power_dataoutput_delay+0x85>
movsd  0xe3b(%rip),%xmm0
divsd  %xmm2,%xmm0
movapd %xmm0,%xmm2
mov    0x50(%rsp),%r12
imul   %ecx,%r9d
xorps  %xmm0,%xmm0
cvtsi2sd %r9d,%xmm0
movsd  %xmm0,0x8(%rsp)
divsd  %xmm2,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1200 <SIM_power_dataoutput_delay+0xb0>
sqrtsd %xmm0,%xmm0
jmp    120f <SIM_power_dataoutput_delay+0xbf>
movsd  %xmm2,(%rsp)
call   1070 <sqrt@plt>
movsd  (%rsp),%xmm2
mulsd  %xmm0,%xmm2
movsd  0x8(%rsp),%xmm0
divsd  %xmm2,%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0xde5(%rip),%xmm0
mov    $0x1,%edi
mov    $0x1,%esi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
mov    %eax,%ebp
movsd  0xdd2(%rip),%xmm0
xor    %edi,%edi
mov    $0x2,%esi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
lea    (%rax,%rbp,2),%ebp
movsd  0xdc1(%rip),%xmm0
movsd  0xdc1(%rip),%xmm1
mov    $0x2,%al
call   1060 <SIM_power_gatecap@plt>
add    %ebp,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
movsd  %xmm0,(%rsp)
movsd  0xd94(%rip),%xmm0
xor    %edi,%edi
mov    $0x2,%esi
mov    $0x1,%al
call   1030 <SIM_power_transreson@plt>
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
mulsd  (%rsp),%xmm1
movsd  0xd8a(%rip),%xmm2
movsd  0xd8a(%rip),%xmm3
movsd  0x10(%rsp),%xmm0
xor    %edi,%edi
mov    $0x4,%al
call   1050 <SIM_power_horowitz@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
movsd  %xmm0,0x10(%rsp)
divsd  0xd66(%rip),%xmm0
movsd  %xmm0,(%rsp)
movsd  0xd41(%rip),%xmm0
mov    $0x1,%edi
mov    $0x1,%esi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
mov    %eax,%ebp
movsd  0xd46(%rip),%xmm0
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x1,%al
call   1040 <SIM_power_draincap@plt>
add    %ebp,%eax
imul   %r15d,%ebx
mov    %ebx,%ecx
shl    $0x3,%ecx
lea    0x3f(,%rbx,8),%edx
test   %ecx,%ecx
cmovns %ecx,%edx
sar    $0x6,%edx
imul   %eax,%edx
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
imul   %r14d,%ecx
xorps  %xmm1,%xmm1
cvtsi2sd %ecx,%xmm1
mulsd  0x8(%rsp),%xmm1
movsd  0xd03(%rip),%xmm2
mulsd  %xmm1,%xmm2
addsd  %xmm0,%xmm2
addsd  0xcfb(%rip),%xmm2
movsd  %xmm2,0x8(%rsp)
mulsd  0xcf5(%rip),%xmm1
mulsd  0xcf5(%rip),%xmm1
movsd  %xmm1,0x18(%rsp)
movsd  0xcc7(%rip),%xmm0
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x1,%al
call   1030 <SIM_power_transreson@plt>
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
addsd  0x18(%rsp),%xmm1
mulsd  0x8(%rsp),%xmm1
movsd  (%rsp),%xmm0
movsd  0xc91(%rip),%xmm2
movsd  0xcb1(%rip),%xmm3
mov    $0x1,%edi
mov    $0x4,%al
call   1050 <SIM_power_horowitz@plt>
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
movsd  0x10(%rsp),%xmm0
addsd  %xmm1,%xmm0
addsd  %xmm1,%xmm1
movsd  %xmm1,(%r12)
add    $0x20,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define double @SIM_power_dataoutput_delay(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, double %6, double* %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca double
%16 = alloca double*
%17 = alloca double
%18 = alloca double
%19 = alloca double
%20 = alloca double
%21 = alloca double
%22 = alloca double
%23 = alloca double
%24 = alloca double
%25 = alloca double
%26 = alloca double
%27 = alloca double
store i32 %0, i32* %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store double %6, double* %15
store double* %7, double** %16
%28 = load i32, i32* %9
%29 = sitofp i32 %28 to double
%30 = fmul double 2.000000e+00, %29
%31 = load i32, i32* %10
%32 = sitofp i32 %31 to double
%33 = fmul double 8.000000e+00, %32
%34 = load i32, i32* %10
%35 = sitofp i32 %34 to double
%36 = fmul double %33, %35
%37 = load i32, i32* %11
%38 = sitofp i32 %37 to double
%39 = fmul double %36, %38
%40 = load i32, i32* %11
%41 = sitofp i32 %40 to double
%42 = fmul double %39, %41
%43 = load i32, i32* %12
%44 = sitofp i32 %43 to double
%45 = fmul double %42, %44
%46 = load i32, i32* %12
%47 = sitofp i32 %46 to double
%48 = fmul double %45, %47
%49 = load i32, i32* %13
%50 = sitofp i32 %49 to double
%51 = fmul double %48, %50
%52 = load i32, i32* %13
%53 = sitofp i32 %52 to double
%54 = fmul double %51, %53
%55 = fdiv double %30, %54
store double %55, double* %20
%56 = load double, double* %20
%57 = fcmp ogt double %56, 1.000000e+00
br i1 %57, label %58, label %60
58: ; preds = %8
%59 = load double, double* %20
br label %63
60: ; preds = %8
%61 = load double, double* %20
%62 = fdiv double 1.000000e+00, %61
br label %63
63: ; preds = %60, %58
%64 = phi double [ %59, %58 ], [ %62, %60 ]
store double %64, double* %26
%65 = load i32, i32* %14
%66 = load i32, i32* %12
%67 = mul nsw i32 %65, %66
%68 = sitofp i32 %67 to double
store double %68, double* %21
%69 = load double, double* %26
%70 = load double, double* %21
%71 = load double, double* %26
%72 = fdiv double %70, %71
%73 = call double @sqrt(double %72)
%74 = fmul double %69, %73
store double %74, double* %26
%75 = load double, double* %21
%76 = load double, double* %26
%77 = fdiv double %75, %76
store double %77, double* %27
%78 = call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 0x3FE0CCCCCCCCCCCC, i32 1, i32 1)
%79 = mul nsw i32 2, %78
%80 = call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 3.500000e+00, i32 0, i32 2)
%81 = add nsw i32 %79, %80
%82 = call i32 (double, double, ...) bitcast (i32 (...)* @SIM_power_gatecap to i32 (double, double, ...)*)(double 0x4010CCCCCCCCCCCC, double 1.000000e+01)
%83 = add nsw i32 %81, %82
%84 = sitofp i32 %83 to double
store double %84, double* %17
%85 = load double, double* %17
%86 = call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_transreson to i32 (double, i32, i32, ...)*)(double 3.500000e+00, i32 0, i32 2)
%87 = sitofp i32 %86 to double
%88 = fmul double %85, %87
store double %88, double* %22
%89 = load double, double* %15
%90 = load double, double* %22
%91 = call i32 (double, double, double, double, i32, ...) bitcast (i32 (...)* @SIM_power_horowitz to i32 (double, double, double, double, i32, ...)*)(double %89, double %90, double 4.310000e-01, double 4.250000e-01, i32 0)
%92 = sitofp i32 %91 to double
store double %92, double* %23
%93 = load double, double* %23
%94 = fdiv double %93, 4.250000e-01
store double %94, double* %25
%95 = call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 0x4010CCCCCCCCCCCC, i32 1, i32 1)
%96 = call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 7.000000e+00, i32 0, i32 1)
%97 = add nsw i32 %95, %96
%98 = load i32, i32* %10
%99 = mul nsw i32 8, %98
%100 = load i32, i32* %11
%101 = mul nsw i32 %99, %100
%102 = sdiv i32 %101, 64
%103 = mul nsw i32 %97, %102
%104 = sitofp i32 %103 to double
%105 = load i32, i32* %10
%106 = mul nsw i32 8, %105
%107 = load i32, i32* %11
%108 = mul nsw i32 %106, %107
%109 = load i32, i32* %13
%110 = mul nsw i32 %108, %109
%111 = sitofp i32 %110 to double
%112 = load double, double* %27
%113 = fmul double %111, %112
%114 = call double @llvm.fmuladd.f64(double 0x3CE56091276E6568, double %113, double %104)
%115 = fadd double %114, 0x3D28A10A1B4047B1
store double %115, double* %17
%116 = load i32, i32* %10
%117 = mul nsw i32 8, %116
%118 = load i32, i32* %11
%119 = mul nsw i32 %117, %118
%120 = load i32, i32* %13
%121 = mul nsw i32 %119, %120
%122 = sitofp i32 %121 to double
%123 = load double, double* %27
%124 = fmul double %122, %123
%125 = fmul double 0x3FB916872B020C49, %124
%126 = fdiv double %125, 2.000000e+00
store double %126, double* %18
%127 = load double, double* %17
%128 = call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_transreson to i32 (double, i32, i32, ...)*)(double 7.000000e+00, i32 0, i32 1)
%129 = sitofp i32 %128 to double
%130 = load double, double* %18
%131 = fadd double %129, %130
%132 = fmul double %127, %131
store double %132, double* %22
%133 = load double, double* %25
%134 = load double, double* %22
%135 = call i32 (double, double, double, double, i32, ...) bitcast (i32 (...)* @SIM_power_horowitz to i32 (double, double, double, double, i32, ...)*)(double %133, double %134, double 4.250000e-01, double 5.000000e-01, i32 1)
%136 = sitofp i32 %135 to double
store double %136, double* %24
%137 = load double, double* %24
%138 = fdiv double %137, 5.000000e-01
%139 = load double*, double** %16
store double %138, double* %139
%140 = load double, double* %24
%141 = load double, double* %23
%142 = fadd double %140, %141
ret double %142
}

LLVM IR (-O2):
define double @SIM_power_dataoutput_delay(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, double %6, double* nocapture writeonly %7) {
%9 = sitofp i32 %0 to double
%10 = fmul double %9, 2.000000e+00
%11 = sitofp i32 %1 to double
%12 = fmul double %11, 8.000000e+00
%13 = fmul double %12, %11
%14 = sitofp i32 %2 to double
%15 = fmul double %13, %14
%16 = fmul double %15, %14
%17 = sitofp i32 %3 to double
%18 = fmul double %16, %17
%19 = fmul double %18, %17
%20 = sitofp i32 %4 to double
%21 = fmul double %19, %20
%22 = fmul double %21, %20
%23 = fdiv double %10, %22
%24 = fcmp ogt double %23, 1.000000e+00
%25 = fdiv double 1.000000e+00, %23
%26 = select i1 %24, double %23, double %25
%27 = mul nsw i32 %5, %3
%28 = sitofp i32 %27 to double
%29 = fdiv double %28, %26
%30 = tail call double @sqrt(double %29)
%31 = fmul double %26, %30
%32 = fdiv double %28, %31
%33 = tail call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 0x3FE0CCCCCCCCCCCC, i32 1, i32 1)
%34 = shl nsw i32 %33, 1
%35 = tail call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 3.500000e+00, i32 0, i32 2)
%36 = add nsw i32 %34, %35
%37 = tail call i32 (double, double, ...) bitcast (i32 (...)* @SIM_power_gatecap to i32 (double, double, ...)*)(double 0x4010CCCCCCCCCCCC, double 1.000000e+01)
%38 = add nsw i32 %36, %37
%39 = sitofp i32 %38 to double
%40 = tail call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_transreson to i32 (double, i32, i32, ...)*)(double 3.500000e+00, i32 0, i32 2)
%41 = sitofp i32 %40 to double
%42 = fmul double %39, %41
%43 = tail call i32 (double, double, double, double, i32, ...) bitcast (i32 (...)* @SIM_power_horowitz to i32 (double, double, double, double, i32, ...)*)(double %6, double %42, double 4.310000e-01, double 4.250000e-01, i32 0)
%44 = sitofp i32 %43 to double
%45 = fdiv double %44, 4.250000e-01
%46 = tail call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 0x4010CCCCCCCCCCCC, i32 1, i32 1)
%47 = tail call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_draincap to i32 (double, i32, i32, ...)*)(double 7.000000e+00, i32 0, i32 1)
%48 = add nsw i32 %47, %46
%49 = shl nsw i32 %1, 3
%50 = mul nsw i32 %49, %2
%51 = sdiv i32 %50, 64
%52 = mul nsw i32 %48, %51
%53 = sitofp i32 %52 to double
%54 = mul nsw i32 %50, %4
%55 = sitofp i32 %54 to double
%56 = fmul double %32, %55
%57 = tail call double @llvm.fmuladd.f64(double %56, double 0x3CE56091276E6568, double %53)
%58 = fadd double %57, 0x3D28A10A1B4047B1
%59 = fmul double %56, 0x3FB916872B020C49
%60 = fmul double %59, 5.000000e-01
%61 = tail call i32 (double, i32, i32, ...) bitcast (i32 (...)* @SIM_power_transreson to i32 (double, i32, i32, ...)*)(double 7.000000e+00, i32 0, i32 1)
%62 = sitofp i32 %61 to double
%63 = fadd double %60, %62
%64 = fmul double %63, %58
%65 = tail call i32 (double, double, double, double, i32, ...) bitcast (i32 (...)* @SIM_power_horowitz to i32 (double, double, double, double, i32, ...)*)(double %45, double %64, double 4.250000e-01, double 5.000000e-01, i32 1)
%66 = sitofp i32 %65 to double
%67 = fmul double %66, 2.000000e+00
store double %67, double* %7
%68 = fadd double %44, %66
ret double %68
}